2 files changed, 9 insertions, 17 deletions

diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c
index 5617cfdadc5c..d590a99930fa 100644
--- a/drivers/pci/hotplug/cpqphp_core.c
+++ b/drivers/pci/hotplug/cpqphp_core.c
@@ -796,7 +796,6 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         u8 num_of_slots = 0;
         u8 hp_slot = 0;
         u8 device;
-        u8 rev;
         u8 bus_cap;
         u16 temp_word;
         u16 vendor_id;
@@ -823,9 +822,8 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         }
         dbg("Vendor ID: %x\n", vendor_id);
 
-        rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
-        dbg("revision: %d\n", rev);
-        if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
+        dbg("revision: %d\n", pdev->revision);
+        if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
                 err(msg_HPC_rev_error);
                 rc = -ENODEV;
                 goto err_disable_device;
@@ -836,7 +834,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
          * For Intel, each SSID bit identifies a PHP capability.
          * Also Intel HPC's may have RID=0.
          */
-        if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
+        if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
                 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
                 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
                 if (rc) {
@@ -870,7 +868,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 
                 switch (subsystem_vid) {
                         case PCI_VENDOR_ID_COMPAQ:
-                                if (rev >= 0x13) { /* CIOBX */
+                                if (pdev->revision >= 0x13) { /* CIOBX */
                                         ctrl->push_flag = 1;
                                         ctrl->slot_switch_type = 1;
                                         ctrl->push_button = 1;
@@ -1075,7 +1073,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
 
         ctrl->bus = pdev->bus->number;
-        ctrl->rev = rev;
+        ctrl->rev = pdev->revision;
         dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
                 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
 
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 75bd6a8648f6..f75ade6f0602 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -587,10 +587,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA,	PCI_DEVICE_ID_VIA_8237,		quirk_via_v
  */
 static void __devinit quirk_amd_ioapic(struct pci_dev *dev)
 {
-        u8 rev;
-
-        pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
-        if (rev >= 0x02) {
+        if (dev->revision >= 0x02) {
                 printk(KERN_WARNING "I/O APIC: AMD Erratum #22 may be present. In the event of instability try\n");
                 printk(KERN_WARNING "        : booting with the \"noapic\" option.\n");
         }
@@ -610,13 +607,12 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI,	PCI_ANY_ID,			quirk_ioapic_rmw );
 #define AMD8131_NIOAMODE_BIT 0
 static void quirk_amd_8131_ioapic(struct pci_dev *dev)
 { 
-        unsigned char revid, tmp;
+        unsigned char tmp;
         
         if (nr_ioapics == 0) 
                 return;
 
-        pci_read_config_byte(dev, PCI_REVISION_ID, &revid);
-        if (revid == AMD8131_revA0 || revid == AMD8131_revB0) {
+        if (dev->revision == AMD8131_revA0 || dev->revision == AMD8131_revB0) {
                 printk(KERN_INFO "Fixing up AMD8131 IOAPIC mode\n"); 
                 pci_read_config_byte( dev, AMD8131_MISC, &tmp);
                 tmp &= ~(1 << AMD8131_NIOAMODE_BIT);
@@ -859,10 +855,8 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_CYRIX,	PCI_DEVICE_ID_CYRIX_PCI_MASTER, qu
 static void quirk_disable_pxb(struct pci_dev *pdev)
 {
         u16 config;
-        u8 rev;
         
-        pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
-        if (rev != 0x04)                /* Only C0 requires this */
+        if (pdev->revision != 0x04)             /* Only C0 requires this */
                 return;
         pci_read_config_word(pdev, 0x40, &config);
         if (config & (1<<6)) {