9 files changed, 130 insertions, 47 deletions

diff --git a/drivers/pci/irq.c b/drivers/pci/irq.c
index e5f69a43b1b1..b008cf86b9c3 100644
--- a/drivers/pci/irq.c
+++ b/drivers/pci/irq.c
@@ -14,11 +14,11 @@ static void pci_note_irq_problem(struct pci_dev *pdev, const char *reason)
 {
         struct pci_dev *parent = to_pci_dev(pdev->dev.parent);
 
-        dev_printk(KERN_ERR, &pdev->dev,
-                   "Potentially misrouted IRQ (Bridge %s %04x:%04x)\n",
-                   dev_name(&parent->dev), parent->vendor, parent->device);
-        dev_printk(KERN_ERR, &pdev->dev, "%s\n", reason);
-        dev_printk(KERN_ERR, &pdev->dev, "Please report to linux-kernel@vger.kernel.org\n");
+        dev_err(&pdev->dev,
+                "Potentially misrouted IRQ (Bridge %s %04x:%04x)\n",
+                dev_name(&parent->dev), parent->vendor, parent->device);
+        dev_err(&pdev->dev, "%s\n", reason);
+        dev_err(&pdev->dev, "Please report to linux-kernel@vger.kernel.org\n");
         WARN_ON(1);
 }
 
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 94c6e2aa03d6..11d9c8a9d0d0 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -1023,10 +1023,10 @@ static int pci_pm_runtime_suspend(struct device *dev)
                 return 0;
         }
 
-        if (!pci_dev->state_saved)
+        if (!pci_dev->state_saved) {
                 pci_save_state(pci_dev);
-
-        pci_finish_runtime_suspend(pci_dev);
+                pci_finish_runtime_suspend(pci_dev);
+        }
 
         return 0;
 }
diff --git a/drivers/pci/pci-stub.c b/drivers/pci/pci-stub.c
index 775e933c2225..6e47c519c510 100644
--- a/drivers/pci/pci-stub.c
+++ b/drivers/pci/pci-stub.c
@@ -28,7 +28,7 @@ MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the stub driver, format is "
 
 static int pci_stub_probe(struct pci_dev *dev, const struct pci_device_id *id)
 {
-        dev_printk(KERN_INFO, &dev->dev, "claimed by stub\n");
+        dev_info(&dev->dev, "claimed by stub\n");
         return 0;
 }
 
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 54858838f098..05a510d1bb30 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1578,15 +1578,25 @@ void pci_pme_active(struct pci_dev *dev, bool enable)
 
         pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);
 
-        /* PCI (as opposed to PCIe) PME requires that the device have
-           its PME# line hooked up correctly. Not all hardware vendors
-           do this, so the PME never gets delivered and the device
-           remains asleep. The easiest way around this is to
-           periodically walk the list of suspended devices and check
-           whether any have their PME flag set. The assumption is that
-           we'll wake up often enough anyway that this won't be a huge
-           hit, and the power savings from the devices will still be a
-           win. */
+        /*
+         * PCI (as opposed to PCIe) PME requires that the device have
+         * its PME# line hooked up correctly. Not all hardware vendors
+         * do this, so the PME never gets delivered and the device
+         * remains asleep. The easiest way around this is to
+         * periodically walk the list of suspended devices and check
+         * whether any have their PME flag set. The assumption is that
+         * we'll wake up often enough anyway that this won't be a huge
+         * hit, and the power savings from the devices will still be a
+         * win.
+         *
+         * Although PCIe uses in-band PME message instead of PME# line
+         * to report PME, PME does not work for some PCIe devices in
+         * reality.  For example, there are devices that set their PME
+         * status bits, but don't really bother to send a PME message;
+         * there are PCI Express Root Ports that don't bother to
+         * trigger interrupts when they receive PME messages from the
+         * devices below.  So PME poll is used for PCIe devices too.
+         */
 
         if (dev->pme_poll) {
                 struct pci_pme_device *pme_dev;
@@ -3833,14 +3843,13 @@ static void __devinit pci_no_domains(void)
 }
 
 /**
- * pci_ext_cfg_enabled - can we access extended PCI config space?
- * @dev: The PCI device of the root bridge.
+ * pci_ext_cfg_avail - can we access extended PCI config space?
  *
  * Returns 1 if we can access PCI extended config space (offsets
  * greater than 0xff). This is the default implementation. Architecture
  * implementations can override this.
  */
-int __weak pci_ext_cfg_avail(struct pci_dev *dev)
+int __weak pci_ext_cfg_avail(void)
 {
         return 1;
 }
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 213753b283a6..3da9ecc9ab84 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -242,8 +242,7 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
                 return;
 
         /* Training failed. Restore common clock configurations */
-        dev_printk(KERN_ERR, &parent->dev,
-                   "ASPM: Could not configure common clock\n");
+        dev_err(&parent->dev, "ASPM: Could not configure common clock\n");
         list_for_each_entry(child, &linkbus->devices, bus_list)
                 pcie_capability_write_word(child, PCI_EXP_LNKCTL,
                                            child_reg[PCI_FUNC(child->devfn)]);
@@ -507,9 +506,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
                  */
                 pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32);
                 if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) {
-                        dev_printk(KERN_INFO, &child->dev, "disabling ASPM"
-                                " on pre-1.1 PCIe device.  You can enable it"
-                                " with 'pcie_aspm=force'\n");
+                        dev_info(&child->dev, "disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'\n");
                         return -EINVAL;
                 }
         }
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index ec909afa90b6..59cf1ba34936 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1890,6 +1890,28 @@ unsigned int __ref pci_rescan_bus_bridge_resize(struct pci_dev *bridge)
         return max;
 }
 
+/**
+ * pci_rescan_bus - scan a PCI bus for devices.
+ * @bus: PCI bus to scan
+ *
+ * Scan a PCI bus and child buses for new devices, adds them,
+ * and enables them.
+ *
+ * Returns the max number of subordinate bus discovered.
+ */
+unsigned int __ref pci_rescan_bus(struct pci_bus *bus)
+{
+        unsigned int max;
+
+        max = pci_scan_child_bus(bus);
+        pci_assign_unassigned_bus_resources(bus);
+        pci_enable_bridges(bus);
+        pci_bus_add_devices(bus);
+
+        return max;
+}
+EXPORT_SYMBOL_GPL(pci_rescan_bus);
+
 EXPORT_SYMBOL(pci_add_new_bus);
 EXPORT_SYMBOL(pci_scan_slot);
 EXPORT_SYMBOL(pci_scan_bridge);
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 7a451ff56ecc..0c59f7aba12b 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1790,6 +1790,45 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA_2,
                          PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE,
                          quirk_tc86c001_ide);
 
+/*
+ * PLX PCI 9050 PCI Target bridge controller has an errata that prevents the
+ * local configuration registers accessible via BAR0 (memory) or BAR1 (i/o)
+ * being read correctly if bit 7 of the base address is set.
+ * The BAR0 or BAR1 region may be disabled (size 0) or enabled (size 128).
+ * Re-allocate the regions to a 256-byte boundary if necessary.
+ */
+static void __devinit quirk_plx_pci9050(struct pci_dev *dev)
+{
+        unsigned int bar;
+
+        /* Fixed in revision 2 (PCI 9052). */
+        if (dev->revision >= 2)
+                return;
+        for (bar = 0; bar <= 1; bar++)
+                if (pci_resource_len(dev, bar) == 0x80 &&
+                    (pci_resource_start(dev, bar) & 0x80)) {
+                        struct resource *r = &dev->resource[bar];
+                        dev_info(&dev->dev,
+                                 "Re-allocating PLX PCI 9050 BAR %u to length 256 to avoid bit 7 bug\n",
+                                 bar);
+                        r->start = 0;
+                        r->end = 0xff;
+                }
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
+                         quirk_plx_pci9050);
+/*
+ * The following Meilhaus (vendor ID 0x1402) device IDs (amongst others)
+ * may be using the PLX PCI 9050: 0x0630, 0x0940, 0x0950, 0x0960, 0x100b,
+ * 0x1400, 0x140a, 0x140b, 0x14e0, 0x14ea, 0x14eb, 0x1604, 0x1608, 0x160c,
+ * 0x168f, 0x2000, 0x2600, 0x3000, 0x810a, 0x810b.
+ *
+ * Currently, device IDs 0x2000 and 0x2600 are used by the Comedi "me_daq"
+ * driver.
+ */
+DECLARE_PCI_FIXUP_HEADER(0x1402, 0x2000, quirk_plx_pci9050);
+DECLARE_PCI_FIXUP_HEADER(0x1402, 0x2600, quirk_plx_pci9050);
+
 static void __devinit quirk_netmos(struct pci_dev *dev)
 {
         unsigned int num_parallel = (dev->subsystem_device & 0xf0) >> 4;
diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c
index 513972f3ed13..7c0fd9252e6f 100644
--- a/drivers/pci/remove.c
+++ b/drivers/pci/remove.c
@@ -111,3 +111,39 @@ void pci_stop_and_remove_bus_device(struct pci_dev *dev)
         pci_remove_bus_device(dev);
 }
 EXPORT_SYMBOL(pci_stop_and_remove_bus_device);
+
+void pci_stop_root_bus(struct pci_bus *bus)
+{
+        struct pci_dev *child, *tmp;
+        struct pci_host_bridge *host_bridge;
+
+        if (!pci_is_root_bus(bus))
+                return;
+
+        host_bridge = to_pci_host_bridge(bus->bridge);
+        list_for_each_entry_safe_reverse(child, tmp,
+                                         &bus->devices, bus_list)
+                pci_stop_bus_device(child);
+
+        /* stop the host bridge */
+        device_del(&host_bridge->dev);
+}
+
+void pci_remove_root_bus(struct pci_bus *bus)
+{
+        struct pci_dev *child, *tmp;
+        struct pci_host_bridge *host_bridge;
+
+        if (!pci_is_root_bus(bus))
+                return;
+
+        host_bridge = to_pci_host_bridge(bus->bridge);
+        list_for_each_entry_safe(child, tmp,
+                                 &bus->devices, bus_list)
+                pci_remove_bus_device(child);
+        pci_remove_bus(bus);
+        host_bridge->bus = NULL;
+
+        /* remove the host bridge */
+        put_device(&host_bridge->dev);
+}
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 1e808ca338f8..6d3591d57ea0 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -1550,25 +1550,12 @@ enable_all:
 }
 EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);
 
-#ifdef CONFIG_HOTPLUG
-/**
- * pci_rescan_bus - scan a PCI bus for devices.
- * @bus: PCI bus to scan
- *
- * Scan a PCI bus and child buses for new devices, adds them,
- * and enables them.
- *
- * Returns the max number of subordinate bus discovered.
- */
-unsigned int __ref pci_rescan_bus(struct pci_bus *bus)
+void pci_assign_unassigned_bus_resources(struct pci_bus *bus)
 {
-        unsigned int max;
         struct pci_dev *dev;
         LIST_HEAD(add_list); /* list of resources that
                                         want additional resources */
 
-        max = pci_scan_child_bus(bus);
-
         down_read(&pci_bus_sem);
         list_for_each_entry(dev, &bus->devices, bus_list)
                 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
@@ -1579,11 +1566,4 @@ unsigned int __ref pci_rescan_bus(struct pci_bus *bus)
         up_read(&pci_bus_sem);
         __pci_bus_assign_resources(bus, &add_list, NULL);
         BUG_ON(!list_empty(&add_list));
-
-        pci_enable_bridges(bus);
-        pci_bus_add_devices(bus);
-
-        return max;
 }
-EXPORT_SYMBOL_GPL(pci_rescan_bus);
-#endif