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-rw-r--r--drivers/pci/Kconfig21
-rw-r--r--drivers/pci/Makefile6
-rw-r--r--drivers/pci/bus.c54
-rw-r--r--drivers/pci/dmar.c14
-rw-r--r--drivers/pci/hotplug/acpi_pcihp.c6
-rw-r--r--drivers/pci/hotplug/cpqphp_sysfs.c13
-rw-r--r--drivers/pci/hotplug/ibmphp_hpc.c4
-rw-r--r--drivers/pci/hotplug/pciehp.h18
-rw-r--r--drivers/pci/hotplug/pciehp_acpi.c4
-rw-r--r--drivers/pci/hotplug/pciehp_core.c22
-rw-r--r--drivers/pci/hotplug/pciehp_ctrl.c9
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c20
-rw-r--r--drivers/pci/hotplug/shpchp.h2
-rw-r--r--drivers/pci/hotplug/shpchp_core.c20
-rw-r--r--drivers/pci/hotplug/shpchp_ctrl.c7
-rw-r--r--drivers/pci/hotplug/shpchp_hpc.c26
-rw-r--r--drivers/pci/htirq.c22
-rw-r--r--drivers/pci/intel-iommu.c117
-rw-r--r--drivers/pci/intr_remapping.c212
-rw-r--r--drivers/pci/iov.c2
-rw-r--r--drivers/pci/msi.c52
-rw-r--r--drivers/pci/msi.h4
-rw-r--r--drivers/pci/pci.c79
-rw-r--r--drivers/pci/pci.h10
-rw-r--r--drivers/pci/pcie/Makefile3
-rw-r--r--drivers/pci/pcie/aer/aer_inject.c1
-rw-r--r--drivers/pci/pcie/aer/aerdrv.c9
-rw-r--r--drivers/pci/pcie/aer/aerdrv.h3
-rw-r--r--drivers/pci/pcie/aer/aerdrv_acpi.c70
-rw-r--r--drivers/pci/pcie/aer/aerdrv_core.c16
-rw-r--r--drivers/pci/pcie/pme.c (renamed from drivers/pci/pcie/pme/pcie_pme.c)66
-rw-r--r--drivers/pci/pcie/pme/Makefile8
-rw-r--r--drivers/pci/pcie/pme/pcie_pme.h28
-rw-r--r--drivers/pci/pcie/pme/pcie_pme_acpi.c54
-rw-r--r--drivers/pci/pcie/portdrv.h22
-rw-r--r--drivers/pci/pcie/portdrv_acpi.c77
-rw-r--r--drivers/pci/pcie/portdrv_core.c53
-rw-r--r--drivers/pci/pcie/portdrv_pci.c38
-rw-r--r--drivers/pci/probe.c4
-rw-r--r--drivers/pci/proc.c4
-rw-r--r--drivers/pci/quirks.c54
-rw-r--r--drivers/pci/setup-res.c2
-rw-r--r--drivers/pci/slot.c2
-rw-r--r--drivers/pci/xen-pcifront.c1148
44 files changed, 1807 insertions, 599 deletions
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 34ef70d562b2..5b1630e4e9e3 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -40,6 +40,27 @@ config PCI_STUB
40 40
41 When in doubt, say N. 41 When in doubt, say N.
42 42
43config XEN_PCIDEV_FRONTEND
44 tristate "Xen PCI Frontend"
45 depends on PCI && X86 && XEN
46 select HOTPLUG
47 select PCI_XEN
48 default y
49 help
50 The PCI device frontend driver allows the kernel to import arbitrary
51 PCI devices from a PCI backend to support PCI driver domains.
52
53config XEN_PCIDEV_FE_DEBUG
54 bool "Xen PCI Frontend debugging"
55 depends on XEN_PCIDEV_FRONTEND && PCI_DEBUG
56 help
57 Say Y here if you want the Xen PCI frontend to produce a bunch of debug
58 messages to the system log. Select this if you are having a
59 problem with Xen PCI frontend support and want to see more of what is
60 going on.
61
62 When in doubt, say N.
63
43config HT_IRQ 64config HT_IRQ
44 bool "Interrupts on hypertransport devices" 65 bool "Interrupts on hypertransport devices"
45 default y 66 default y
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index dc1aa0922868..f01e344cf4bd 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -65,6 +65,6 @@ obj-$(CONFIG_PCI_SYSCALL) += syscall.o
65 65
66obj-$(CONFIG_PCI_STUB) += pci-stub.o 66obj-$(CONFIG_PCI_STUB) += pci-stub.o
67 67
68ifeq ($(CONFIG_PCI_DEBUG),y) 68obj-$(CONFIG_XEN_PCIDEV_FRONTEND) += xen-pcifront.o
69EXTRA_CFLAGS += -DDEBUG 69
70endif 70ccflags-$(CONFIG_PCI_DEBUG) := -DDEBUG
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 7f0af0e9b826..5624db8c9ad0 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -64,6 +64,49 @@ void pci_bus_remove_resources(struct pci_bus *bus)
64 } 64 }
65} 65}
66 66
67/*
68 * Find the highest-address bus resource below the cursor "res". If the
69 * cursor is NULL, return the highest resource.
70 */
71static struct resource *pci_bus_find_resource_prev(struct pci_bus *bus,
72 unsigned int type,
73 struct resource *res)
74{
75 struct resource *r, *prev = NULL;
76 int i;
77
78 pci_bus_for_each_resource(bus, r, i) {
79 if (!r)
80 continue;
81
82 if ((r->flags & IORESOURCE_TYPE_BITS) != type)
83 continue;
84
85 /* If this resource is at or past the cursor, skip it */
86 if (res) {
87 if (r == res)
88 continue;
89 if (r->end > res->end)
90 continue;
91 if (r->end == res->end && r->start > res->start)
92 continue;
93 }
94
95 if (!prev)
96 prev = r;
97
98 /*
99 * A small resource is higher than a large one that ends at
100 * the same address.
101 */
102 if (r->end > prev->end ||
103 (r->end == prev->end && r->start > prev->start))
104 prev = r;
105 }
106
107 return prev;
108}
109
67/** 110/**
68 * pci_bus_alloc_resource - allocate a resource from a parent bus 111 * pci_bus_alloc_resource - allocate a resource from a parent bus
69 * @bus: PCI bus 112 * @bus: PCI bus
@@ -89,9 +132,10 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
89 resource_size_t), 132 resource_size_t),
90 void *alignf_data) 133 void *alignf_data)
91{ 134{
92 int i, ret = -ENOMEM; 135 int ret = -ENOMEM;
93 struct resource *r; 136 struct resource *r;
94 resource_size_t max = -1; 137 resource_size_t max = -1;
138 unsigned int type = res->flags & IORESOURCE_TYPE_BITS;
95 139
96 type_mask |= IORESOURCE_IO | IORESOURCE_MEM; 140 type_mask |= IORESOURCE_IO | IORESOURCE_MEM;
97 141
@@ -99,10 +143,9 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
99 if (!(res->flags & IORESOURCE_MEM_64)) 143 if (!(res->flags & IORESOURCE_MEM_64))
100 max = PCIBIOS_MAX_MEM_32; 144 max = PCIBIOS_MAX_MEM_32;
101 145
102 pci_bus_for_each_resource(bus, r, i) { 146 /* Look for space at highest addresses first */
103 if (!r) 147 r = pci_bus_find_resource_prev(bus, type, NULL);
104 continue; 148 for ( ; r; r = pci_bus_find_resource_prev(bus, type, r)) {
105
106 /* type_mask must match */ 149 /* type_mask must match */
107 if ((res->flags ^ r->flags) & type_mask) 150 if ((res->flags ^ r->flags) & type_mask)
108 continue; 151 continue;
@@ -299,6 +342,7 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
299 } 342 }
300 up_read(&pci_bus_sem); 343 up_read(&pci_bus_sem);
301} 344}
345EXPORT_SYMBOL_GPL(pci_walk_bus);
302 346
303EXPORT_SYMBOL(pci_bus_alloc_resource); 347EXPORT_SYMBOL(pci_bus_alloc_resource);
304EXPORT_SYMBOL_GPL(pci_bus_add_device); 348EXPORT_SYMBOL_GPL(pci_bus_add_device);
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index 0a19708074c2..0157708d474d 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -36,6 +36,7 @@
36#include <linux/tboot.h> 36#include <linux/tboot.h>
37#include <linux/dmi.h> 37#include <linux/dmi.h>
38#include <linux/slab.h> 38#include <linux/slab.h>
39#include <asm/iommu_table.h>
39 40
40#define PREFIX "DMAR: " 41#define PREFIX "DMAR: "
41 42
@@ -687,7 +688,7 @@ failed:
687 return 0; 688 return 0;
688} 689}
689 690
690void __init detect_intel_iommu(void) 691int __init detect_intel_iommu(void)
691{ 692{
692 int ret; 693 int ret;
693 694
@@ -723,6 +724,8 @@ void __init detect_intel_iommu(void)
723 } 724 }
724 early_acpi_os_unmap_memory(dmar_tbl, dmar_tbl_size); 725 early_acpi_os_unmap_memory(dmar_tbl, dmar_tbl_size);
725 dmar_tbl = NULL; 726 dmar_tbl = NULL;
727
728 return ret ? 1 : -ENODEV;
726} 729}
727 730
728 731
@@ -1221,9 +1224,9 @@ const char *dmar_get_fault_reason(u8 fault_reason, int *fault_type)
1221 } 1224 }
1222} 1225}
1223 1226
1224void dmar_msi_unmask(unsigned int irq) 1227void dmar_msi_unmask(struct irq_data *data)
1225{ 1228{
1226 struct intel_iommu *iommu = get_irq_data(irq); 1229 struct intel_iommu *iommu = irq_data_get_irq_data(data);
1227 unsigned long flag; 1230 unsigned long flag;
1228 1231
1229 /* unmask it */ 1232 /* unmask it */
@@ -1234,10 +1237,10 @@ void dmar_msi_unmask(unsigned int irq)
1234 spin_unlock_irqrestore(&iommu->register_lock, flag); 1237 spin_unlock_irqrestore(&iommu->register_lock, flag);
1235} 1238}
1236 1239
1237void dmar_msi_mask(unsigned int irq) 1240void dmar_msi_mask(struct irq_data *data)
1238{ 1241{
1239 unsigned long flag; 1242 unsigned long flag;
1240 struct intel_iommu *iommu = get_irq_data(irq); 1243 struct intel_iommu *iommu = irq_data_get_irq_data(data);
1241 1244
1242 /* mask it */ 1245 /* mask it */
1243 spin_lock_irqsave(&iommu->register_lock, flag); 1246 spin_lock_irqsave(&iommu->register_lock, flag);
@@ -1455,3 +1458,4 @@ int __init dmar_ir_support(void)
1455 return 0; 1458 return 0;
1456 return dmar->flags & 0x1; 1459 return dmar->flags & 0x1;
1457} 1460}
1461IOMMU_INIT_POST(detect_intel_iommu);
diff --git a/drivers/pci/hotplug/acpi_pcihp.c b/drivers/pci/hotplug/acpi_pcihp.c
index 45fcc1e96df9..3bc72d18b121 100644
--- a/drivers/pci/hotplug/acpi_pcihp.c
+++ b/drivers/pci/hotplug/acpi_pcihp.c
@@ -338,9 +338,7 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *pdev, u32 flags)
338 acpi_handle chandle, handle; 338 acpi_handle chandle, handle;
339 struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL }; 339 struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL };
340 340
341 flags &= (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL | 341 flags &= OSC_SHPC_NATIVE_HP_CONTROL;
342 OSC_SHPC_NATIVE_HP_CONTROL |
343 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
344 if (!flags) { 342 if (!flags) {
345 err("Invalid flags %u specified!\n", flags); 343 err("Invalid flags %u specified!\n", flags);
346 return -EINVAL; 344 return -EINVAL;
@@ -360,7 +358,7 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *pdev, u32 flags)
360 acpi_get_name(handle, ACPI_FULL_PATHNAME, &string); 358 acpi_get_name(handle, ACPI_FULL_PATHNAME, &string);
361 dbg("Trying to get hotplug control for %s\n", 359 dbg("Trying to get hotplug control for %s\n",
362 (char *)string.pointer); 360 (char *)string.pointer);
363 status = acpi_pci_osc_control_set(handle, flags); 361 status = acpi_pci_osc_control_set(handle, &flags, flags);
364 if (ACPI_SUCCESS(status)) 362 if (ACPI_SUCCESS(status))
365 goto got_one; 363 goto got_one;
366 if (status == AE_SUPPORT) 364 if (status == AE_SUPPORT)
diff --git a/drivers/pci/hotplug/cpqphp_sysfs.c b/drivers/pci/hotplug/cpqphp_sysfs.c
index 56215322930a..4cb30447a486 100644
--- a/drivers/pci/hotplug/cpqphp_sysfs.c
+++ b/drivers/pci/hotplug/cpqphp_sysfs.c
@@ -34,10 +34,11 @@
34#include <linux/workqueue.h> 34#include <linux/workqueue.h>
35#include <linux/pci.h> 35#include <linux/pci.h>
36#include <linux/pci_hotplug.h> 36#include <linux/pci_hotplug.h>
37#include <linux/smp_lock.h> 37#include <linux/mutex.h>
38#include <linux/debugfs.h> 38#include <linux/debugfs.h>
39#include "cpqphp.h" 39#include "cpqphp.h"
40 40
41static DEFINE_MUTEX(cpqphp_mutex);
41static int show_ctrl (struct controller *ctrl, char *buf) 42static int show_ctrl (struct controller *ctrl, char *buf)
42{ 43{
43 char *out = buf; 44 char *out = buf;
@@ -147,7 +148,7 @@ static int open(struct inode *inode, struct file *file)
147 struct ctrl_dbg *dbg; 148 struct ctrl_dbg *dbg;
148 int retval = -ENOMEM; 149 int retval = -ENOMEM;
149 150
150 lock_kernel(); 151 mutex_lock(&cpqphp_mutex);
151 dbg = kmalloc(sizeof(*dbg), GFP_KERNEL); 152 dbg = kmalloc(sizeof(*dbg), GFP_KERNEL);
152 if (!dbg) 153 if (!dbg)
153 goto exit; 154 goto exit;
@@ -160,7 +161,7 @@ static int open(struct inode *inode, struct file *file)
160 file->private_data = dbg; 161 file->private_data = dbg;
161 retval = 0; 162 retval = 0;
162exit: 163exit:
163 unlock_kernel(); 164 mutex_unlock(&cpqphp_mutex);
164 return retval; 165 return retval;
165} 166}
166 167
@@ -169,7 +170,7 @@ static loff_t lseek(struct file *file, loff_t off, int whence)
169 struct ctrl_dbg *dbg; 170 struct ctrl_dbg *dbg;
170 loff_t new = -1; 171 loff_t new = -1;
171 172
172 lock_kernel(); 173 mutex_lock(&cpqphp_mutex);
173 dbg = file->private_data; 174 dbg = file->private_data;
174 175
175 switch (whence) { 176 switch (whence) {
@@ -181,10 +182,10 @@ static loff_t lseek(struct file *file, loff_t off, int whence)
181 break; 182 break;
182 } 183 }
183 if (new < 0 || new > dbg->size) { 184 if (new < 0 || new > dbg->size) {
184 unlock_kernel(); 185 mutex_unlock(&cpqphp_mutex);
185 return -EINVAL; 186 return -EINVAL;
186 } 187 }
187 unlock_kernel(); 188 mutex_unlock(&cpqphp_mutex);
188 return (file->f_pos = new); 189 return (file->f_pos = new);
189} 190}
190 191
diff --git a/drivers/pci/hotplug/ibmphp_hpc.c b/drivers/pci/hotplug/ibmphp_hpc.c
index 1aaf3f32d3cd..f59ed30512b5 100644
--- a/drivers/pci/hotplug/ibmphp_hpc.c
+++ b/drivers/pci/hotplug/ibmphp_hpc.c
@@ -133,8 +133,8 @@ void __init ibmphp_hpc_initvars (void)
133 debug ("%s - Entry\n", __func__); 133 debug ("%s - Entry\n", __func__);
134 134
135 mutex_init(&sem_hpcaccess); 135 mutex_init(&sem_hpcaccess);
136 init_MUTEX (&semOperations); 136 sema_init(&semOperations, 1);
137 init_MUTEX_LOCKED (&sem_exit); 137 sema_init(&sem_exit, 0);
138 to_debug = 0; 138 to_debug = 0;
139 139
140 debug ("%s - Exit\n", __func__); 140 debug ("%s - Exit\n", __func__);
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index 4ed76b47b6dc..838f571027b7 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -36,6 +36,7 @@
36#include <linux/sched.h> /* signal_pending() */ 36#include <linux/sched.h> /* signal_pending() */
37#include <linux/pcieport_if.h> 37#include <linux/pcieport_if.h>
38#include <linux/mutex.h> 38#include <linux/mutex.h>
39#include <linux/workqueue.h>
39 40
40#define MY_NAME "pciehp" 41#define MY_NAME "pciehp"
41 42
@@ -44,6 +45,7 @@ extern int pciehp_poll_time;
44extern int pciehp_debug; 45extern int pciehp_debug;
45extern int pciehp_force; 46extern int pciehp_force;
46extern struct workqueue_struct *pciehp_wq; 47extern struct workqueue_struct *pciehp_wq;
48extern struct workqueue_struct *pciehp_ordered_wq;
47 49
48#define dbg(format, arg...) \ 50#define dbg(format, arg...) \
49do { \ 51do { \
@@ -176,19 +178,11 @@ static inline void pciehp_firmware_init(void)
176{ 178{
177 pciehp_acpi_slot_detection_init(); 179 pciehp_acpi_slot_detection_init();
178} 180}
179
180static inline int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev)
181{
182 int retval;
183 u32 flags = (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL |
184 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
185 retval = acpi_get_hp_hw_control_from_firmware(dev, flags);
186 if (retval)
187 return retval;
188 return pciehp_acpi_slot_detection_check(dev);
189}
190#else 181#else
191#define pciehp_firmware_init() do {} while (0) 182#define pciehp_firmware_init() do {} while (0)
192#define pciehp_get_hp_hw_control_from_firmware(dev) 0 183static inline int pciehp_acpi_slot_detection_check(struct pci_dev *dev)
184{
185 return 0;
186}
193#endif /* CONFIG_ACPI */ 187#endif /* CONFIG_ACPI */
194#endif /* _PCIEHP_H */ 188#endif /* _PCIEHP_H */
diff --git a/drivers/pci/hotplug/pciehp_acpi.c b/drivers/pci/hotplug/pciehp_acpi.c
index 1f4000a5a108..2574700db461 100644
--- a/drivers/pci/hotplug/pciehp_acpi.c
+++ b/drivers/pci/hotplug/pciehp_acpi.c
@@ -85,9 +85,7 @@ static int __init dummy_probe(struct pcie_device *dev)
85 acpi_handle handle; 85 acpi_handle handle;
86 struct dummy_slot *slot, *tmp; 86 struct dummy_slot *slot, *tmp;
87 struct pci_dev *pdev = dev->port; 87 struct pci_dev *pdev = dev->port;
88 /* Note: pciehp_detect_mode != PCIEHP_DETECT_ACPI here */ 88
89 if (pciehp_get_hp_hw_control_from_firmware(pdev))
90 return -ENODEV;
91 pos = pci_pcie_cap(pdev); 89 pos = pci_pcie_cap(pdev);
92 if (!pos) 90 if (!pos)
93 return -ENODEV; 91 return -ENODEV;
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index 3588ea61b0dd..7ac8358df8fd 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -43,6 +43,7 @@ int pciehp_poll_mode;
43int pciehp_poll_time; 43int pciehp_poll_time;
44int pciehp_force; 44int pciehp_force;
45struct workqueue_struct *pciehp_wq; 45struct workqueue_struct *pciehp_wq;
46struct workqueue_struct *pciehp_ordered_wq;
46 47
47#define DRIVER_VERSION "0.4" 48#define DRIVER_VERSION "0.4"
48#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>" 49#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
@@ -59,7 +60,7 @@ module_param(pciehp_force, bool, 0644);
59MODULE_PARM_DESC(pciehp_debug, "Debugging mode enabled or not"); 60MODULE_PARM_DESC(pciehp_debug, "Debugging mode enabled or not");
60MODULE_PARM_DESC(pciehp_poll_mode, "Using polling mechanism for hot-plug events or not"); 61MODULE_PARM_DESC(pciehp_poll_mode, "Using polling mechanism for hot-plug events or not");
61MODULE_PARM_DESC(pciehp_poll_time, "Polling mechanism frequency, in seconds"); 62MODULE_PARM_DESC(pciehp_poll_time, "Polling mechanism frequency, in seconds");
62MODULE_PARM_DESC(pciehp_force, "Force pciehp, even if _OSC and OSHP are missing"); 63MODULE_PARM_DESC(pciehp_force, "Force pciehp, even if OSHP is missing");
63 64
64#define PCIE_MODULE_NAME "pciehp" 65#define PCIE_MODULE_NAME "pciehp"
65 66
@@ -235,7 +236,7 @@ static int pciehp_probe(struct pcie_device *dev)
235 dev_info(&dev->device, 236 dev_info(&dev->device,
236 "Bypassing BIOS check for pciehp use on %s\n", 237 "Bypassing BIOS check for pciehp use on %s\n",
237 pci_name(dev->port)); 238 pci_name(dev->port));
238 else if (pciehp_get_hp_hw_control_from_firmware(dev->port)) 239 else if (pciehp_acpi_slot_detection_check(dev->port))
239 goto err_out_none; 240 goto err_out_none;
240 241
241 ctrl = pcie_init(dev); 242 ctrl = pcie_init(dev);
@@ -340,18 +341,33 @@ static int __init pcied_init(void)
340{ 341{
341 int retval = 0; 342 int retval = 0;
342 343
344 pciehp_wq = alloc_workqueue("pciehp", 0, 0);
345 if (!pciehp_wq)
346 return -ENOMEM;
347
348 pciehp_ordered_wq = alloc_ordered_workqueue("pciehp_ordered", 0);
349 if (!pciehp_ordered_wq) {
350 destroy_workqueue(pciehp_wq);
351 return -ENOMEM;
352 }
353
343 pciehp_firmware_init(); 354 pciehp_firmware_init();
344 retval = pcie_port_service_register(&hpdriver_portdrv); 355 retval = pcie_port_service_register(&hpdriver_portdrv);
345 dbg("pcie_port_service_register = %d\n", retval); 356 dbg("pcie_port_service_register = %d\n", retval);
346 info(DRIVER_DESC " version: " DRIVER_VERSION "\n"); 357 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
347 if (retval) 358 if (retval) {
359 destroy_workqueue(pciehp_ordered_wq);
360 destroy_workqueue(pciehp_wq);
348 dbg("Failure to register service\n"); 361 dbg("Failure to register service\n");
362 }
349 return retval; 363 return retval;
350} 364}
351 365
352static void __exit pcied_cleanup(void) 366static void __exit pcied_cleanup(void)
353{ 367{
354 dbg("unload_pciehpd()\n"); 368 dbg("unload_pciehpd()\n");
369 destroy_workqueue(pciehp_ordered_wq);
370 destroy_workqueue(pciehp_wq);
355 pcie_port_service_unregister(&hpdriver_portdrv); 371 pcie_port_service_unregister(&hpdriver_portdrv);
356 info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n"); 372 info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n");
357} 373}
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c
index 8f58148be044..085dbb5fc168 100644
--- a/drivers/pci/hotplug/pciehp_ctrl.c
+++ b/drivers/pci/hotplug/pciehp_ctrl.c
@@ -32,7 +32,6 @@
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/slab.h> 33#include <linux/slab.h>
34#include <linux/pci.h> 34#include <linux/pci.h>
35#include <linux/workqueue.h>
36#include "../pci.h" 35#include "../pci.h"
37#include "pciehp.h" 36#include "pciehp.h"
38 37
@@ -50,7 +49,7 @@ static int queue_interrupt_event(struct slot *p_slot, u32 event_type)
50 info->p_slot = p_slot; 49 info->p_slot = p_slot;
51 INIT_WORK(&info->work, interrupt_event_handler); 50 INIT_WORK(&info->work, interrupt_event_handler);
52 51
53 schedule_work(&info->work); 52 queue_work(pciehp_wq, &info->work);
54 53
55 return 0; 54 return 0;
56} 55}
@@ -345,7 +344,7 @@ void pciehp_queue_pushbutton_work(struct work_struct *work)
345 kfree(info); 344 kfree(info);
346 goto out; 345 goto out;
347 } 346 }
348 queue_work(pciehp_wq, &info->work); 347 queue_work(pciehp_ordered_wq, &info->work);
349 out: 348 out:
350 mutex_unlock(&p_slot->lock); 349 mutex_unlock(&p_slot->lock);
351} 350}
@@ -378,7 +377,7 @@ static void handle_button_press_event(struct slot *p_slot)
378 if (ATTN_LED(ctrl)) 377 if (ATTN_LED(ctrl))
379 pciehp_set_attention_status(p_slot, 0); 378 pciehp_set_attention_status(p_slot, 0);
380 379
381 schedule_delayed_work(&p_slot->work, 5*HZ); 380 queue_delayed_work(pciehp_wq, &p_slot->work, 5*HZ);
382 break; 381 break;
383 case BLINKINGOFF_STATE: 382 case BLINKINGOFF_STATE:
384 case BLINKINGON_STATE: 383 case BLINKINGON_STATE:
@@ -440,7 +439,7 @@ static void handle_surprise_event(struct slot *p_slot)
440 else 439 else
441 p_slot->state = POWERON_STATE; 440 p_slot->state = POWERON_STATE;
442 441
443 queue_work(pciehp_wq, &info->work); 442 queue_work(pciehp_ordered_wq, &info->work);
444} 443}
445 444
446static void interrupt_event_handler(struct work_struct *work) 445static void interrupt_event_handler(struct work_struct *work)
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 0cd42047d89b..50a23da5d24d 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -41,8 +41,6 @@
41#include "../pci.h" 41#include "../pci.h"
42#include "pciehp.h" 42#include "pciehp.h"
43 43
44static atomic_t pciehp_num_controllers = ATOMIC_INIT(0);
45
46static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value) 44static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value)
47{ 45{
48 struct pci_dev *dev = ctrl->pcie->port; 46 struct pci_dev *dev = ctrl->pcie->port;
@@ -805,8 +803,8 @@ static void pcie_cleanup_slot(struct controller *ctrl)
805{ 803{
806 struct slot *slot = ctrl->slot; 804 struct slot *slot = ctrl->slot;
807 cancel_delayed_work(&slot->work); 805 cancel_delayed_work(&slot->work);
808 flush_scheduled_work();
809 flush_workqueue(pciehp_wq); 806 flush_workqueue(pciehp_wq);
807 flush_workqueue(pciehp_ordered_wq);
810 kfree(slot); 808 kfree(slot);
811} 809}
812 810
@@ -912,16 +910,6 @@ struct controller *pcie_init(struct pcie_device *dev)
912 /* Disable sotfware notification */ 910 /* Disable sotfware notification */
913 pcie_disable_notification(ctrl); 911 pcie_disable_notification(ctrl);
914 912
915 /*
916 * If this is the first controller to be initialized,
917 * initialize the pciehp work queue
918 */
919 if (atomic_add_return(1, &pciehp_num_controllers) == 1) {
920 pciehp_wq = create_singlethread_workqueue("pciehpd");
921 if (!pciehp_wq)
922 goto abort_ctrl;
923 }
924
925 ctrl_info(ctrl, "HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", 913 ctrl_info(ctrl, "HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n",
926 pdev->vendor, pdev->device, pdev->subsystem_vendor, 914 pdev->vendor, pdev->device, pdev->subsystem_vendor,
927 pdev->subsystem_device); 915 pdev->subsystem_device);
@@ -941,11 +929,5 @@ void pciehp_release_ctrl(struct controller *ctrl)
941{ 929{
942 pcie_shutdown_notification(ctrl); 930 pcie_shutdown_notification(ctrl);
943 pcie_cleanup_slot(ctrl); 931 pcie_cleanup_slot(ctrl);
944 /*
945 * If this is the last controller to be released, destroy the
946 * pciehp work queue
947 */
948 if (atomic_dec_and_test(&pciehp_num_controllers))
949 destroy_workqueue(pciehp_wq);
950 kfree(ctrl); 932 kfree(ctrl);
951} 933}
diff --git a/drivers/pci/hotplug/shpchp.h b/drivers/pci/hotplug/shpchp.h
index d2627e1c3ac1..e0c90e643b5f 100644
--- a/drivers/pci/hotplug/shpchp.h
+++ b/drivers/pci/hotplug/shpchp.h
@@ -35,6 +35,7 @@
35#include <linux/delay.h> 35#include <linux/delay.h>
36#include <linux/sched.h> /* signal_pending(), struct timer_list */ 36#include <linux/sched.h> /* signal_pending(), struct timer_list */
37#include <linux/mutex.h> 37#include <linux/mutex.h>
38#include <linux/workqueue.h>
38 39
39#if !defined(MODULE) 40#if !defined(MODULE)
40 #define MY_NAME "shpchp" 41 #define MY_NAME "shpchp"
@@ -46,6 +47,7 @@ extern int shpchp_poll_mode;
46extern int shpchp_poll_time; 47extern int shpchp_poll_time;
47extern int shpchp_debug; 48extern int shpchp_debug;
48extern struct workqueue_struct *shpchp_wq; 49extern struct workqueue_struct *shpchp_wq;
50extern struct workqueue_struct *shpchp_ordered_wq;
49 51
50#define dbg(format, arg...) \ 52#define dbg(format, arg...) \
51do { \ 53do { \
diff --git a/drivers/pci/hotplug/shpchp_core.c b/drivers/pci/hotplug/shpchp_core.c
index a7bd5048396e..aca972bbfb4c 100644
--- a/drivers/pci/hotplug/shpchp_core.c
+++ b/drivers/pci/hotplug/shpchp_core.c
@@ -33,7 +33,6 @@
33#include <linux/types.h> 33#include <linux/types.h>
34#include <linux/slab.h> 34#include <linux/slab.h>
35#include <linux/pci.h> 35#include <linux/pci.h>
36#include <linux/workqueue.h>
37#include "shpchp.h" 36#include "shpchp.h"
38 37
39/* Global variables */ 38/* Global variables */
@@ -41,6 +40,7 @@ int shpchp_debug;
41int shpchp_poll_mode; 40int shpchp_poll_mode;
42int shpchp_poll_time; 41int shpchp_poll_time;
43struct workqueue_struct *shpchp_wq; 42struct workqueue_struct *shpchp_wq;
43struct workqueue_struct *shpchp_ordered_wq;
44 44
45#define DRIVER_VERSION "0.4" 45#define DRIVER_VERSION "0.4"
46#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>" 46#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
@@ -174,8 +174,8 @@ void cleanup_slots(struct controller *ctrl)
174 slot = list_entry(tmp, struct slot, slot_list); 174 slot = list_entry(tmp, struct slot, slot_list);
175 list_del(&slot->slot_list); 175 list_del(&slot->slot_list);
176 cancel_delayed_work(&slot->work); 176 cancel_delayed_work(&slot->work);
177 flush_scheduled_work();
178 flush_workqueue(shpchp_wq); 177 flush_workqueue(shpchp_wq);
178 flush_workqueue(shpchp_ordered_wq);
179 pci_hp_deregister(slot->hotplug_slot); 179 pci_hp_deregister(slot->hotplug_slot);
180 } 180 }
181} 181}
@@ -360,9 +360,23 @@ static int __init shpcd_init(void)
360{ 360{
361 int retval = 0; 361 int retval = 0;
362 362
363 shpchp_wq = alloc_ordered_workqueue("shpchp", 0);
364 if (!shpchp_wq)
365 return -ENOMEM;
366
367 shpchp_ordered_wq = alloc_ordered_workqueue("shpchp_ordered", 0);
368 if (!shpchp_ordered_wq) {
369 destroy_workqueue(shpchp_wq);
370 return -ENOMEM;
371 }
372
363 retval = pci_register_driver(&shpc_driver); 373 retval = pci_register_driver(&shpc_driver);
364 dbg("%s: pci_register_driver = %d\n", __func__, retval); 374 dbg("%s: pci_register_driver = %d\n", __func__, retval);
365 info(DRIVER_DESC " version: " DRIVER_VERSION "\n"); 375 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
376 if (retval) {
377 destroy_workqueue(shpchp_ordered_wq);
378 destroy_workqueue(shpchp_wq);
379 }
366 return retval; 380 return retval;
367} 381}
368 382
@@ -370,6 +384,8 @@ static void __exit shpcd_cleanup(void)
370{ 384{
371 dbg("unload_shpchpd()\n"); 385 dbg("unload_shpchpd()\n");
372 pci_unregister_driver(&shpc_driver); 386 pci_unregister_driver(&shpc_driver);
387 destroy_workqueue(shpchp_ordered_wq);
388 destroy_workqueue(shpchp_wq);
373 info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n"); 389 info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n");
374} 390}
375 391
diff --git a/drivers/pci/hotplug/shpchp_ctrl.c b/drivers/pci/hotplug/shpchp_ctrl.c
index 3387fbfb0c54..b00b09bdd38a 100644
--- a/drivers/pci/hotplug/shpchp_ctrl.c
+++ b/drivers/pci/hotplug/shpchp_ctrl.c
@@ -32,7 +32,6 @@
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/slab.h> 33#include <linux/slab.h>
34#include <linux/pci.h> 34#include <linux/pci.h>
35#include <linux/workqueue.h>
36#include "../pci.h" 35#include "../pci.h"
37#include "shpchp.h" 36#include "shpchp.h"
38 37
@@ -52,7 +51,7 @@ static int queue_interrupt_event(struct slot *p_slot, u32 event_type)
52 info->p_slot = p_slot; 51 info->p_slot = p_slot;
53 INIT_WORK(&info->work, interrupt_event_handler); 52 INIT_WORK(&info->work, interrupt_event_handler);
54 53
55 schedule_work(&info->work); 54 queue_work(shpchp_wq, &info->work);
56 55
57 return 0; 56 return 0;
58} 57}
@@ -457,7 +456,7 @@ void shpchp_queue_pushbutton_work(struct work_struct *work)
457 kfree(info); 456 kfree(info);
458 goto out; 457 goto out;
459 } 458 }
460 queue_work(shpchp_wq, &info->work); 459 queue_work(shpchp_ordered_wq, &info->work);
461 out: 460 out:
462 mutex_unlock(&p_slot->lock); 461 mutex_unlock(&p_slot->lock);
463} 462}
@@ -505,7 +504,7 @@ static void handle_button_press_event(struct slot *p_slot)
505 p_slot->hpc_ops->green_led_blink(p_slot); 504 p_slot->hpc_ops->green_led_blink(p_slot);
506 p_slot->hpc_ops->set_attention_status(p_slot, 0); 505 p_slot->hpc_ops->set_attention_status(p_slot, 0);
507 506
508 schedule_delayed_work(&p_slot->work, 5*HZ); 507 queue_delayed_work(shpchp_wq, &p_slot->work, 5*HZ);
509 break; 508 break;
510 case BLINKINGOFF_STATE: 509 case BLINKINGOFF_STATE:
511 case BLINKINGON_STATE: 510 case BLINKINGON_STATE:
diff --git a/drivers/pci/hotplug/shpchp_hpc.c b/drivers/pci/hotplug/shpchp_hpc.c
index d3985e7deab7..36547f0ce305 100644
--- a/drivers/pci/hotplug/shpchp_hpc.c
+++ b/drivers/pci/hotplug/shpchp_hpc.c
@@ -179,8 +179,6 @@
179#define SLOT_EVENT_LATCH 0x2 179#define SLOT_EVENT_LATCH 0x2
180#define SLOT_SERR_INT_MASK 0x3 180#define SLOT_SERR_INT_MASK 0x3
181 181
182static atomic_t shpchp_num_controllers = ATOMIC_INIT(0);
183
184static irqreturn_t shpc_isr(int irq, void *dev_id); 182static irqreturn_t shpc_isr(int irq, void *dev_id);
185static void start_int_poll_timer(struct controller *ctrl, int sec); 183static void start_int_poll_timer(struct controller *ctrl, int sec);
186static int hpc_check_cmd_status(struct controller *ctrl); 184static int hpc_check_cmd_status(struct controller *ctrl);
@@ -614,13 +612,6 @@ static void hpc_release_ctlr(struct controller *ctrl)
614 612
615 iounmap(ctrl->creg); 613 iounmap(ctrl->creg);
616 release_mem_region(ctrl->mmio_base, ctrl->mmio_size); 614 release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
617
618 /*
619 * If this is the last controller to be released, destroy the
620 * shpchpd work queue
621 */
622 if (atomic_dec_and_test(&shpchp_num_controllers))
623 destroy_workqueue(shpchp_wq);
624} 615}
625 616
626static int hpc_power_on_slot(struct slot * slot) 617static int hpc_power_on_slot(struct slot * slot)
@@ -1077,9 +1068,8 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
1077 1068
1078 rc = request_irq(ctrl->pci_dev->irq, shpc_isr, IRQF_SHARED, 1069 rc = request_irq(ctrl->pci_dev->irq, shpc_isr, IRQF_SHARED,
1079 MY_NAME, (void *)ctrl); 1070 MY_NAME, (void *)ctrl);
1080 ctrl_dbg(ctrl, "request_irq %d for hpc%d (returns %d)\n", 1071 ctrl_dbg(ctrl, "request_irq %d (returns %d)\n",
1081 ctrl->pci_dev->irq, 1072 ctrl->pci_dev->irq, rc);
1082 atomic_read(&shpchp_num_controllers), rc);
1083 if (rc) { 1073 if (rc) {
1084 ctrl_err(ctrl, "Can't get irq %d for the hotplug " 1074 ctrl_err(ctrl, "Can't get irq %d for the hotplug "
1085 "controller\n", ctrl->pci_dev->irq); 1075 "controller\n", ctrl->pci_dev->irq);
@@ -1092,18 +1082,6 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
1092 shpc_get_cur_bus_speed(ctrl); 1082 shpc_get_cur_bus_speed(ctrl);
1093 1083
1094 /* 1084 /*
1095 * If this is the first controller to be initialized,
1096 * initialize the shpchpd work queue
1097 */
1098 if (atomic_add_return(1, &shpchp_num_controllers) == 1) {
1099 shpchp_wq = create_singlethread_workqueue("shpchpd");
1100 if (!shpchp_wq) {
1101 rc = -ENOMEM;
1102 goto abort_iounmap;
1103 }
1104 }
1105
1106 /*
1107 * Unmask all event interrupts of all slots 1085 * Unmask all event interrupts of all slots
1108 */ 1086 */
1109 for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) { 1087 for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
diff --git a/drivers/pci/htirq.c b/drivers/pci/htirq.c
index 98abf8b91294..834842aa5bbf 100644
--- a/drivers/pci/htirq.c
+++ b/drivers/pci/htirq.c
@@ -57,28 +57,22 @@ void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
57 *msg = cfg->msg; 57 *msg = cfg->msg;
58} 58}
59 59
60void mask_ht_irq(unsigned int irq) 60void mask_ht_irq(struct irq_data *data)
61{ 61{
62 struct ht_irq_cfg *cfg; 62 struct ht_irq_cfg *cfg = irq_data_get_irq_data(data);
63 struct ht_irq_msg msg; 63 struct ht_irq_msg msg = cfg->msg;
64
65 cfg = get_irq_data(irq);
66 64
67 msg = cfg->msg;
68 msg.address_lo |= 1; 65 msg.address_lo |= 1;
69 write_ht_irq_msg(irq, &msg); 66 write_ht_irq_msg(data->irq, &msg);
70} 67}
71 68
72void unmask_ht_irq(unsigned int irq) 69void unmask_ht_irq(struct irq_data *data)
73{ 70{
74 struct ht_irq_cfg *cfg; 71 struct ht_irq_cfg *cfg = irq_data_get_irq_data(data);
75 struct ht_irq_msg msg; 72 struct ht_irq_msg msg = cfg->msg;
76
77 cfg = get_irq_data(irq);
78 73
79 msg = cfg->msg;
80 msg.address_lo &= ~1; 74 msg.address_lo &= ~1;
81 write_ht_irq_msg(irq, &msg); 75 write_ht_irq_msg(data->irq, &msg);
82} 76}
83 77
84/** 78/**
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index c3ceebb5be84..4789f8e8bf7a 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -71,6 +71,49 @@
71#define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32)) 71#define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32))
72#define DMA_64BIT_PFN IOVA_PFN(DMA_BIT_MASK(64)) 72#define DMA_64BIT_PFN IOVA_PFN(DMA_BIT_MASK(64))
73 73
74/* page table handling */
75#define LEVEL_STRIDE (9)
76#define LEVEL_MASK (((u64)1 << LEVEL_STRIDE) - 1)
77
78static inline int agaw_to_level(int agaw)
79{
80 return agaw + 2;
81}
82
83static inline int agaw_to_width(int agaw)
84{
85 return 30 + agaw * LEVEL_STRIDE;
86}
87
88static inline int width_to_agaw(int width)
89{
90 return (width - 30) / LEVEL_STRIDE;
91}
92
93static inline unsigned int level_to_offset_bits(int level)
94{
95 return (level - 1) * LEVEL_STRIDE;
96}
97
98static inline int pfn_level_offset(unsigned long pfn, int level)
99{
100 return (pfn >> level_to_offset_bits(level)) & LEVEL_MASK;
101}
102
103static inline unsigned long level_mask(int level)
104{
105 return -1UL << level_to_offset_bits(level);
106}
107
108static inline unsigned long level_size(int level)
109{
110 return 1UL << level_to_offset_bits(level);
111}
112
113static inline unsigned long align_to_level(unsigned long pfn, int level)
114{
115 return (pfn + level_size(level) - 1) & level_mask(level);
116}
74 117
75/* VT-d pages must always be _smaller_ than MM pages. Otherwise things 118/* VT-d pages must always be _smaller_ than MM pages. Otherwise things
76 are never going to work. */ 119 are never going to work. */
@@ -434,8 +477,6 @@ void free_iova_mem(struct iova *iova)
434} 477}
435 478
436 479
437static inline int width_to_agaw(int width);
438
439static int __iommu_calculate_agaw(struct intel_iommu *iommu, int max_gaw) 480static int __iommu_calculate_agaw(struct intel_iommu *iommu, int max_gaw)
440{ 481{
441 unsigned long sagaw; 482 unsigned long sagaw;
@@ -646,51 +687,6 @@ out:
646 spin_unlock_irqrestore(&iommu->lock, flags); 687 spin_unlock_irqrestore(&iommu->lock, flags);
647} 688}
648 689
649/* page table handling */
650#define LEVEL_STRIDE (9)
651#define LEVEL_MASK (((u64)1 << LEVEL_STRIDE) - 1)
652
653static inline int agaw_to_level(int agaw)
654{
655 return agaw + 2;
656}
657
658static inline int agaw_to_width(int agaw)
659{
660 return 30 + agaw * LEVEL_STRIDE;
661
662}
663
664static inline int width_to_agaw(int width)
665{
666 return (width - 30) / LEVEL_STRIDE;
667}
668
669static inline unsigned int level_to_offset_bits(int level)
670{
671 return (level - 1) * LEVEL_STRIDE;
672}
673
674static inline int pfn_level_offset(unsigned long pfn, int level)
675{
676 return (pfn >> level_to_offset_bits(level)) & LEVEL_MASK;
677}
678
679static inline unsigned long level_mask(int level)
680{
681 return -1UL << level_to_offset_bits(level);
682}
683
684static inline unsigned long level_size(int level)
685{
686 return 1UL << level_to_offset_bits(level);
687}
688
689static inline unsigned long align_to_level(unsigned long pfn, int level)
690{
691 return (pfn + level_size(level) - 1) & level_mask(level);
692}
693
694static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain, 690static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
695 unsigned long pfn) 691 unsigned long pfn)
696{ 692{
@@ -3761,6 +3757,33 @@ static void __devinit quirk_iommu_rwbf(struct pci_dev *dev)
3761 3757
3762DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf); 3758DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);
3763 3759
3760#define GGC 0x52
3761#define GGC_MEMORY_SIZE_MASK (0xf << 8)
3762#define GGC_MEMORY_SIZE_NONE (0x0 << 8)
3763#define GGC_MEMORY_SIZE_1M (0x1 << 8)
3764#define GGC_MEMORY_SIZE_2M (0x3 << 8)
3765#define GGC_MEMORY_VT_ENABLED (0x8 << 8)
3766#define GGC_MEMORY_SIZE_2M_VT (0x9 << 8)
3767#define GGC_MEMORY_SIZE_3M_VT (0xa << 8)
3768#define GGC_MEMORY_SIZE_4M_VT (0xb << 8)
3769
3770static void __devinit quirk_calpella_no_shadow_gtt(struct pci_dev *dev)
3771{
3772 unsigned short ggc;
3773
3774 if (pci_read_config_word(dev, GGC, &ggc))
3775 return;
3776
3777 if (!(ggc & GGC_MEMORY_VT_ENABLED)) {
3778 printk(KERN_INFO "DMAR: BIOS has allocated no shadow GTT; disabling IOMMU for graphics\n");
3779 dmar_map_gfx = 0;
3780 }
3781}
3782DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0040, quirk_calpella_no_shadow_gtt);
3783DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0044, quirk_calpella_no_shadow_gtt);
3784DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0062, quirk_calpella_no_shadow_gtt);
3785DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x006a, quirk_calpella_no_shadow_gtt);
3786
3764/* On Tylersburg chipsets, some BIOSes have been known to enable the 3787/* On Tylersburg chipsets, some BIOSes have been known to enable the
3765 ISOCH DMAR unit for the Azalia sound device, but not give it any 3788 ISOCH DMAR unit for the Azalia sound device, but not give it any
3766 TLB entries, which causes it to deadlock. Check for that. We do 3789 TLB entries, which causes it to deadlock. Check for that. We do
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index fd1d2867cdcc..ec87cd66f3eb 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -46,109 +46,24 @@ static __init int setup_intremap(char *str)
46} 46}
47early_param("intremap", setup_intremap); 47early_param("intremap", setup_intremap);
48 48
49struct irq_2_iommu {
50 struct intel_iommu *iommu;
51 u16 irte_index;
52 u16 sub_handle;
53 u8 irte_mask;
54};
55
56#ifdef CONFIG_GENERIC_HARDIRQS
57static struct irq_2_iommu *get_one_free_irq_2_iommu(int node)
58{
59 struct irq_2_iommu *iommu;
60
61 iommu = kzalloc_node(sizeof(*iommu), GFP_ATOMIC, node);
62 printk(KERN_DEBUG "alloc irq_2_iommu on node %d\n", node);
63
64 return iommu;
65}
66
67static struct irq_2_iommu *irq_2_iommu(unsigned int irq)
68{
69 struct irq_desc *desc;
70
71 desc = irq_to_desc(irq);
72
73 if (WARN_ON_ONCE(!desc))
74 return NULL;
75
76 return desc->irq_2_iommu;
77}
78
79static struct irq_2_iommu *irq_2_iommu_alloc(unsigned int irq)
80{
81 struct irq_desc *desc;
82 struct irq_2_iommu *irq_iommu;
83
84 desc = irq_to_desc(irq);
85 if (!desc) {
86 printk(KERN_INFO "can not get irq_desc for %d\n", irq);
87 return NULL;
88 }
89
90 irq_iommu = desc->irq_2_iommu;
91
92 if (!irq_iommu)
93 desc->irq_2_iommu = get_one_free_irq_2_iommu(irq_node(irq));
94
95 return desc->irq_2_iommu;
96}
97
98#else /* !CONFIG_SPARSE_IRQ */
99
100static struct irq_2_iommu irq_2_iommuX[NR_IRQS];
101
102static struct irq_2_iommu *irq_2_iommu(unsigned int irq)
103{
104 if (irq < nr_irqs)
105 return &irq_2_iommuX[irq];
106
107 return NULL;
108}
109static struct irq_2_iommu *irq_2_iommu_alloc(unsigned int irq)
110{
111 return irq_2_iommu(irq);
112}
113#endif
114
115static DEFINE_SPINLOCK(irq_2_ir_lock); 49static DEFINE_SPINLOCK(irq_2_ir_lock);
116 50
117static struct irq_2_iommu *valid_irq_2_iommu(unsigned int irq) 51static struct irq_2_iommu *irq_2_iommu(unsigned int irq)
118{
119 struct irq_2_iommu *irq_iommu;
120
121 irq_iommu = irq_2_iommu(irq);
122
123 if (!irq_iommu)
124 return NULL;
125
126 if (!irq_iommu->iommu)
127 return NULL;
128
129 return irq_iommu;
130}
131
132int irq_remapped(int irq)
133{ 52{
134 return valid_irq_2_iommu(irq) != NULL; 53 struct irq_cfg *cfg = get_irq_chip_data(irq);
54 return cfg ? &cfg->irq_2_iommu : NULL;
135} 55}
136 56
137int get_irte(int irq, struct irte *entry) 57int get_irte(int irq, struct irte *entry)
138{ 58{
139 int index; 59 struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
140 struct irq_2_iommu *irq_iommu;
141 unsigned long flags; 60 unsigned long flags;
61 int index;
142 62
143 if (!entry) 63 if (!entry || !irq_iommu)
144 return -1; 64 return -1;
145 65
146 spin_lock_irqsave(&irq_2_ir_lock, flags); 66 spin_lock_irqsave(&irq_2_ir_lock, flags);
147 irq_iommu = valid_irq_2_iommu(irq);
148 if (!irq_iommu) {
149 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
150 return -1;
151 }
152 67
153 index = irq_iommu->irte_index + irq_iommu->sub_handle; 68 index = irq_iommu->irte_index + irq_iommu->sub_handle;
154 *entry = *(irq_iommu->iommu->ir_table->base + index); 69 *entry = *(irq_iommu->iommu->ir_table->base + index);
@@ -160,20 +75,14 @@ int get_irte(int irq, struct irte *entry)
160int alloc_irte(struct intel_iommu *iommu, int irq, u16 count) 75int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
161{ 76{
162 struct ir_table *table = iommu->ir_table; 77 struct ir_table *table = iommu->ir_table;
163 struct irq_2_iommu *irq_iommu; 78 struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
164 u16 index, start_index; 79 u16 index, start_index;
165 unsigned int mask = 0; 80 unsigned int mask = 0;
166 unsigned long flags; 81 unsigned long flags;
167 int i; 82 int i;
168 83
169 if (!count) 84 if (!count || !irq_iommu)
170 return -1;
171
172#ifndef CONFIG_SPARSE_IRQ
173 /* protect irq_2_iommu_alloc later */
174 if (irq >= nr_irqs)
175 return -1; 85 return -1;
176#endif
177 86
178 /* 87 /*
179 * start the IRTE search from index 0. 88 * start the IRTE search from index 0.
@@ -214,13 +123,6 @@ int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
214 for (i = index; i < index + count; i++) 123 for (i = index; i < index + count; i++)
215 table->base[i].present = 1; 124 table->base[i].present = 1;
216 125
217 irq_iommu = irq_2_iommu_alloc(irq);
218 if (!irq_iommu) {
219 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
220 printk(KERN_ERR "can't allocate irq_2_iommu\n");
221 return -1;
222 }
223
224 irq_iommu->iommu = iommu; 126 irq_iommu->iommu = iommu;
225 irq_iommu->irte_index = index; 127 irq_iommu->irte_index = index;
226 irq_iommu->sub_handle = 0; 128 irq_iommu->sub_handle = 0;
@@ -244,17 +146,14 @@ static int qi_flush_iec(struct intel_iommu *iommu, int index, int mask)
244 146
245int map_irq_to_irte_handle(int irq, u16 *sub_handle) 147int map_irq_to_irte_handle(int irq, u16 *sub_handle)
246{ 148{
247 int index; 149 struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
248 struct irq_2_iommu *irq_iommu;
249 unsigned long flags; 150 unsigned long flags;
151 int index;
250 152
251 spin_lock_irqsave(&irq_2_ir_lock, flags); 153 if (!irq_iommu)
252 irq_iommu = valid_irq_2_iommu(irq);
253 if (!irq_iommu) {
254 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
255 return -1; 154 return -1;
256 }
257 155
156 spin_lock_irqsave(&irq_2_ir_lock, flags);
258 *sub_handle = irq_iommu->sub_handle; 157 *sub_handle = irq_iommu->sub_handle;
259 index = irq_iommu->irte_index; 158 index = irq_iommu->irte_index;
260 spin_unlock_irqrestore(&irq_2_ir_lock, flags); 159 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
@@ -263,18 +162,13 @@ int map_irq_to_irte_handle(int irq, u16 *sub_handle)
263 162
264int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle) 163int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
265{ 164{
266 struct irq_2_iommu *irq_iommu; 165 struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
267 unsigned long flags; 166 unsigned long flags;
268 167
269 spin_lock_irqsave(&irq_2_ir_lock, flags); 168 if (!irq_iommu)
270
271 irq_iommu = irq_2_iommu_alloc(irq);
272
273 if (!irq_iommu) {
274 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
275 printk(KERN_ERR "can't allocate irq_2_iommu\n");
276 return -1; 169 return -1;
277 } 170
171 spin_lock_irqsave(&irq_2_ir_lock, flags);
278 172
279 irq_iommu->iommu = iommu; 173 irq_iommu->iommu = iommu;
280 irq_iommu->irte_index = index; 174 irq_iommu->irte_index = index;
@@ -286,43 +180,18 @@ int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
286 return 0; 180 return 0;
287} 181}
288 182
289int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index)
290{
291 struct irq_2_iommu *irq_iommu;
292 unsigned long flags;
293
294 spin_lock_irqsave(&irq_2_ir_lock, flags);
295 irq_iommu = valid_irq_2_iommu(irq);
296 if (!irq_iommu) {
297 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
298 return -1;
299 }
300
301 irq_iommu->iommu = NULL;
302 irq_iommu->irte_index = 0;
303 irq_iommu->sub_handle = 0;
304 irq_2_iommu(irq)->irte_mask = 0;
305
306 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
307
308 return 0;
309}
310
311int modify_irte(int irq, struct irte *irte_modified) 183int modify_irte(int irq, struct irte *irte_modified)
312{ 184{
313 int rc; 185 struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
314 int index;
315 struct irte *irte;
316 struct intel_iommu *iommu; 186 struct intel_iommu *iommu;
317 struct irq_2_iommu *irq_iommu;
318 unsigned long flags; 187 unsigned long flags;
188 struct irte *irte;
189 int rc, index;
319 190
320 spin_lock_irqsave(&irq_2_ir_lock, flags); 191 if (!irq_iommu)
321 irq_iommu = valid_irq_2_iommu(irq);
322 if (!irq_iommu) {
323 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
324 return -1; 192 return -1;
325 } 193
194 spin_lock_irqsave(&irq_2_ir_lock, flags);
326 195
327 iommu = irq_iommu->iommu; 196 iommu = irq_iommu->iommu;
328 197
@@ -339,31 +208,6 @@ int modify_irte(int irq, struct irte *irte_modified)
339 return rc; 208 return rc;
340} 209}
341 210
342int flush_irte(int irq)
343{
344 int rc;
345 int index;
346 struct intel_iommu *iommu;
347 struct irq_2_iommu *irq_iommu;
348 unsigned long flags;
349
350 spin_lock_irqsave(&irq_2_ir_lock, flags);
351 irq_iommu = valid_irq_2_iommu(irq);
352 if (!irq_iommu) {
353 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
354 return -1;
355 }
356
357 iommu = irq_iommu->iommu;
358
359 index = irq_iommu->irte_index + irq_iommu->sub_handle;
360
361 rc = qi_flush_iec(iommu, index, irq_iommu->irte_mask);
362 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
363
364 return rc;
365}
366
367struct intel_iommu *map_hpet_to_ir(u8 hpet_id) 211struct intel_iommu *map_hpet_to_ir(u8 hpet_id)
368{ 212{
369 int i; 213 int i;
@@ -420,16 +264,14 @@ static int clear_entries(struct irq_2_iommu *irq_iommu)
420 264
421int free_irte(int irq) 265int free_irte(int irq)
422{ 266{
423 int rc = 0; 267 struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
424 struct irq_2_iommu *irq_iommu;
425 unsigned long flags; 268 unsigned long flags;
269 int rc;
426 270
427 spin_lock_irqsave(&irq_2_ir_lock, flags); 271 if (!irq_iommu)
428 irq_iommu = valid_irq_2_iommu(irq);
429 if (!irq_iommu) {
430 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
431 return -1; 272 return -1;
432 } 273
274 spin_lock_irqsave(&irq_2_ir_lock, flags);
433 275
434 rc = clear_entries(irq_iommu); 276 rc = clear_entries(irq_iommu);
435 277
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index ce6a3666b3d9..553d8ee55c1c 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -608,7 +608,7 @@ int pci_iov_resource_bar(struct pci_dev *dev, int resno,
608 * the VF BAR size multiplied by the number of VFs. The alignment 608 * the VF BAR size multiplied by the number of VFs. The alignment
609 * is just the VF BAR size. 609 * is just the VF BAR size.
610 */ 610 */
611int pci_sriov_resource_alignment(struct pci_dev *dev, int resno) 611resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
612{ 612{
613 struct resource tmp; 613 struct resource tmp;
614 enum pci_bar_type type; 614 enum pci_bar_type type;
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 69b7be33b3a2..7c24dcef2989 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -35,7 +35,12 @@ int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
35#endif 35#endif
36 36
37#ifndef arch_setup_msi_irqs 37#ifndef arch_setup_msi_irqs
38int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 38# define arch_setup_msi_irqs default_setup_msi_irqs
39# define HAVE_DEFAULT_MSI_SETUP_IRQS
40#endif
41
42#ifdef HAVE_DEFAULT_MSI_SETUP_IRQS
43int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
39{ 44{
40 struct msi_desc *entry; 45 struct msi_desc *entry;
41 int ret; 46 int ret;
@@ -60,7 +65,12 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
60#endif 65#endif
61 66
62#ifndef arch_teardown_msi_irqs 67#ifndef arch_teardown_msi_irqs
63void arch_teardown_msi_irqs(struct pci_dev *dev) 68# define arch_teardown_msi_irqs default_teardown_msi_irqs
69# define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
70#endif
71
72#ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS
73void default_teardown_msi_irqs(struct pci_dev *dev)
64{ 74{
65 struct msi_desc *entry; 75 struct msi_desc *entry;
66 76
@@ -170,33 +180,31 @@ static void msix_mask_irq(struct msi_desc *desc, u32 flag)
170 desc->masked = __msix_mask_irq(desc, flag); 180 desc->masked = __msix_mask_irq(desc, flag);
171} 181}
172 182
173static void msi_set_mask_bit(unsigned irq, u32 flag) 183static void msi_set_mask_bit(struct irq_data *data, u32 flag)
174{ 184{
175 struct msi_desc *desc = get_irq_msi(irq); 185 struct msi_desc *desc = irq_data_get_msi(data);
176 186
177 if (desc->msi_attrib.is_msix) { 187 if (desc->msi_attrib.is_msix) {
178 msix_mask_irq(desc, flag); 188 msix_mask_irq(desc, flag);
179 readl(desc->mask_base); /* Flush write to device */ 189 readl(desc->mask_base); /* Flush write to device */
180 } else { 190 } else {
181 unsigned offset = irq - desc->dev->irq; 191 unsigned offset = data->irq - desc->dev->irq;
182 msi_mask_irq(desc, 1 << offset, flag << offset); 192 msi_mask_irq(desc, 1 << offset, flag << offset);
183 } 193 }
184} 194}
185 195
186void mask_msi_irq(unsigned int irq) 196void mask_msi_irq(struct irq_data *data)
187{ 197{
188 msi_set_mask_bit(irq, 1); 198 msi_set_mask_bit(data, 1);
189} 199}
190 200
191void unmask_msi_irq(unsigned int irq) 201void unmask_msi_irq(struct irq_data *data)
192{ 202{
193 msi_set_mask_bit(irq, 0); 203 msi_set_mask_bit(data, 0);
194} 204}
195 205
196void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) 206void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
197{ 207{
198 struct msi_desc *entry = get_irq_desc_msi(desc);
199
200 BUG_ON(entry->dev->current_state != PCI_D0); 208 BUG_ON(entry->dev->current_state != PCI_D0);
201 209
202 if (entry->msi_attrib.is_msix) { 210 if (entry->msi_attrib.is_msix) {
@@ -227,15 +235,13 @@ void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
227 235
228void read_msi_msg(unsigned int irq, struct msi_msg *msg) 236void read_msi_msg(unsigned int irq, struct msi_msg *msg)
229{ 237{
230 struct irq_desc *desc = irq_to_desc(irq); 238 struct msi_desc *entry = get_irq_msi(irq);
231 239
232 read_msi_msg_desc(desc, msg); 240 __read_msi_msg(entry, msg);
233} 241}
234 242
235void get_cached_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) 243void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
236{ 244{
237 struct msi_desc *entry = get_irq_desc_msi(desc);
238
239 /* Assert that the cache is valid, assuming that 245 /* Assert that the cache is valid, assuming that
240 * valid messages are not all-zeroes. */ 246 * valid messages are not all-zeroes. */
241 BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo | 247 BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
@@ -246,15 +252,13 @@ void get_cached_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
246 252
247void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) 253void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
248{ 254{
249 struct irq_desc *desc = irq_to_desc(irq); 255 struct msi_desc *entry = get_irq_msi(irq);
250 256
251 get_cached_msi_msg_desc(desc, msg); 257 __get_cached_msi_msg(entry, msg);
252} 258}
253 259
254void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) 260void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
255{ 261{
256 struct msi_desc *entry = get_irq_desc_msi(desc);
257
258 if (entry->dev->current_state != PCI_D0) { 262 if (entry->dev->current_state != PCI_D0) {
259 /* Don't touch the hardware now */ 263 /* Don't touch the hardware now */
260 } else if (entry->msi_attrib.is_msix) { 264 } else if (entry->msi_attrib.is_msix) {
@@ -292,9 +296,9 @@ void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
292 296
293void write_msi_msg(unsigned int irq, struct msi_msg *msg) 297void write_msi_msg(unsigned int irq, struct msi_msg *msg)
294{ 298{
295 struct irq_desc *desc = irq_to_desc(irq); 299 struct msi_desc *entry = get_irq_msi(irq);
296 300
297 write_msi_msg_desc(desc, msg); 301 __write_msi_msg(entry, msg);
298} 302}
299 303
300static void free_msi_irqs(struct pci_dev *dev) 304static void free_msi_irqs(struct pci_dev *dev)
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index de27c1cb5a2b..feff3bee6fe5 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -22,8 +22,8 @@
22#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) 22#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT))
23#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) 23#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT))
24 24
25#define msix_table_offset_reg(base) (base + 0x04) 25#define msix_table_offset_reg(base) (base + PCI_MSIX_TABLE)
26#define msix_pba_offset_reg(base) (base + 0x08) 26#define msix_pba_offset_reg(base) (base + PCI_MSIX_PBA)
27#define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) 27#define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1)
28#define multi_msix_capable(control) msix_table_size((control)) 28#define multi_msix_capable(control) msix_table_size((control))
29 29
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 7fa3cbd742c5..e98c8104297b 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -38,6 +38,19 @@ EXPORT_SYMBOL(pci_pci_problems);
38 38
39unsigned int pci_pm_d3_delay; 39unsigned int pci_pm_d3_delay;
40 40
41static void pci_pme_list_scan(struct work_struct *work);
42
43static LIST_HEAD(pci_pme_list);
44static DEFINE_MUTEX(pci_pme_list_mutex);
45static DECLARE_DELAYED_WORK(pci_pme_work, pci_pme_list_scan);
46
47struct pci_pme_device {
48 struct list_head list;
49 struct pci_dev *dev;
50};
51
52#define PME_TIMEOUT 1000 /* How long between PME checks */
53
41static void pci_dev_d3_sleep(struct pci_dev *dev) 54static void pci_dev_d3_sleep(struct pci_dev *dev)
42{ 55{
43 unsigned int delay = dev->d3_delay; 56 unsigned int delay = dev->d3_delay;
@@ -1331,6 +1344,32 @@ bool pci_pme_capable(struct pci_dev *dev, pci_power_t state)
1331 return !!(dev->pme_support & (1 << state)); 1344 return !!(dev->pme_support & (1 << state));
1332} 1345}
1333 1346
1347static void pci_pme_list_scan(struct work_struct *work)
1348{
1349 struct pci_pme_device *pme_dev;
1350
1351 mutex_lock(&pci_pme_list_mutex);
1352 if (!list_empty(&pci_pme_list)) {
1353 list_for_each_entry(pme_dev, &pci_pme_list, list)
1354 pci_pme_wakeup(pme_dev->dev, NULL);
1355 schedule_delayed_work(&pci_pme_work, msecs_to_jiffies(PME_TIMEOUT));
1356 }
1357 mutex_unlock(&pci_pme_list_mutex);
1358}
1359
1360/**
1361 * pci_external_pme - is a device an external PCI PME source?
1362 * @dev: PCI device to check
1363 *
1364 */
1365
1366static bool pci_external_pme(struct pci_dev *dev)
1367{
1368 if (pci_is_pcie(dev) || dev->bus->number == 0)
1369 return false;
1370 return true;
1371}
1372
1334/** 1373/**
1335 * pci_pme_active - enable or disable PCI device's PME# function 1374 * pci_pme_active - enable or disable PCI device's PME# function
1336 * @dev: PCI device to handle. 1375 * @dev: PCI device to handle.
@@ -1354,6 +1393,44 @@ void pci_pme_active(struct pci_dev *dev, bool enable)
1354 1393
1355 pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr); 1394 pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);
1356 1395
1396 /* PCI (as opposed to PCIe) PME requires that the device have
1397 its PME# line hooked up correctly. Not all hardware vendors
1398 do this, so the PME never gets delivered and the device
1399 remains asleep. The easiest way around this is to
1400 periodically walk the list of suspended devices and check
1401 whether any have their PME flag set. The assumption is that
1402 we'll wake up often enough anyway that this won't be a huge
1403 hit, and the power savings from the devices will still be a
1404 win. */
1405
1406 if (pci_external_pme(dev)) {
1407 struct pci_pme_device *pme_dev;
1408 if (enable) {
1409 pme_dev = kmalloc(sizeof(struct pci_pme_device),
1410 GFP_KERNEL);
1411 if (!pme_dev)
1412 goto out;
1413 pme_dev->dev = dev;
1414 mutex_lock(&pci_pme_list_mutex);
1415 list_add(&pme_dev->list, &pci_pme_list);
1416 if (list_is_singular(&pci_pme_list))
1417 schedule_delayed_work(&pci_pme_work,
1418 msecs_to_jiffies(PME_TIMEOUT));
1419 mutex_unlock(&pci_pme_list_mutex);
1420 } else {
1421 mutex_lock(&pci_pme_list_mutex);
1422 list_for_each_entry(pme_dev, &pci_pme_list, list) {
1423 if (pme_dev->dev == dev) {
1424 list_del(&pme_dev->list);
1425 kfree(pme_dev);
1426 break;
1427 }
1428 }
1429 mutex_unlock(&pci_pme_list_mutex);
1430 }
1431 }
1432
1433out:
1357 dev_printk(KERN_DEBUG, &dev->dev, "PME# %s\n", 1434 dev_printk(KERN_DEBUG, &dev->dev, "PME# %s\n",
1358 enable ? "enabled" : "disabled"); 1435 enable ? "enabled" : "disabled");
1359} 1436}
@@ -2689,7 +2766,7 @@ int pcie_get_readrq(struct pci_dev *dev)
2689 2766
2690 ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl); 2767 ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
2691 if (!ret) 2768 if (!ret)
2692 ret = 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12); 2769 ret = 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12);
2693 2770
2694 return ret; 2771 return ret;
2695} 2772}
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 679c39de6a89..f5c7c382765f 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -63,11 +63,8 @@ struct pci_platform_pm_ops {
63extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops); 63extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
64extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 64extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
65extern void pci_disable_enabled_device(struct pci_dev *dev); 65extern void pci_disable_enabled_device(struct pci_dev *dev);
66extern bool pci_check_pme_status(struct pci_dev *dev);
67extern int pci_finish_runtime_suspend(struct pci_dev *dev); 66extern int pci_finish_runtime_suspend(struct pci_dev *dev);
68extern void pci_wakeup_event(struct pci_dev *dev);
69extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); 67extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
70extern void pci_pme_wakeup_bus(struct pci_bus *bus);
71extern void pci_pm_init(struct pci_dev *dev); 68extern void pci_pm_init(struct pci_dev *dev);
72extern void platform_pci_wakeup_init(struct pci_dev *dev); 69extern void platform_pci_wakeup_init(struct pci_dev *dev);
73extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); 70extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
@@ -140,8 +137,10 @@ static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
140 137
141#ifdef CONFIG_PCIEAER 138#ifdef CONFIG_PCIEAER
142void pci_no_aer(void); 139void pci_no_aer(void);
140bool pci_aer_available(void);
143#else 141#else
144static inline void pci_no_aer(void) { } 142static inline void pci_no_aer(void) { }
143static inline bool pci_aer_available(void) { return false; }
145#endif 144#endif
146 145
147static inline int pci_no_d1d2(struct pci_dev *dev) 146static inline int pci_no_d1d2(struct pci_dev *dev)
@@ -262,7 +261,8 @@ extern int pci_iov_init(struct pci_dev *dev);
262extern void pci_iov_release(struct pci_dev *dev); 261extern void pci_iov_release(struct pci_dev *dev);
263extern int pci_iov_resource_bar(struct pci_dev *dev, int resno, 262extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
264 enum pci_bar_type *type); 263 enum pci_bar_type *type);
265extern int pci_sriov_resource_alignment(struct pci_dev *dev, int resno); 264extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev,
265 int resno);
266extern void pci_restore_iov_state(struct pci_dev *dev); 266extern void pci_restore_iov_state(struct pci_dev *dev);
267extern int pci_iov_bus_range(struct pci_bus *bus); 267extern int pci_iov_bus_range(struct pci_bus *bus);
268 268
@@ -318,7 +318,7 @@ static inline int pci_ats_enabled(struct pci_dev *dev)
318} 318}
319#endif /* CONFIG_PCI_IOV */ 319#endif /* CONFIG_PCI_IOV */
320 320
321static inline int pci_resource_alignment(struct pci_dev *dev, 321static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
322 struct resource *res) 322 struct resource *res)
323{ 323{
324#ifdef CONFIG_PCI_IOV 324#ifdef CONFIG_PCI_IOV
diff --git a/drivers/pci/pcie/Makefile b/drivers/pci/pcie/Makefile
index ea654545e7c4..00c62df5a9fc 100644
--- a/drivers/pci/pcie/Makefile
+++ b/drivers/pci/pcie/Makefile
@@ -6,10 +6,11 @@
6obj-$(CONFIG_PCIEASPM) += aspm.o 6obj-$(CONFIG_PCIEASPM) += aspm.o
7 7
8pcieportdrv-y := portdrv_core.o portdrv_pci.o portdrv_bus.o 8pcieportdrv-y := portdrv_core.o portdrv_pci.o portdrv_bus.o
9pcieportdrv-$(CONFIG_ACPI) += portdrv_acpi.o
9 10
10obj-$(CONFIG_PCIEPORTBUS) += pcieportdrv.o 11obj-$(CONFIG_PCIEPORTBUS) += pcieportdrv.o
11 12
12# Build PCI Express AER if needed 13# Build PCI Express AER if needed
13obj-$(CONFIG_PCIEAER) += aer/ 14obj-$(CONFIG_PCIEAER) += aer/
14 15
15obj-$(CONFIG_PCIE_PME) += pme/ 16obj-$(CONFIG_PCIE_PME) += pme.o
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 909924692b8a..b3cf6223f63a 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -472,6 +472,7 @@ static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf,
472static const struct file_operations aer_inject_fops = { 472static const struct file_operations aer_inject_fops = {
473 .write = aer_inject_write, 473 .write = aer_inject_write,
474 .owner = THIS_MODULE, 474 .owner = THIS_MODULE,
475 .llseek = noop_llseek,
475}; 476};
476 477
477static struct miscdevice aer_inject_device = { 478static struct miscdevice aer_inject_device = {
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 484cc55194b8..2b2b6508efde 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -72,6 +72,11 @@ void pci_no_aer(void)
72 pcie_aer_disable = 1; /* has priority over 'forceload' */ 72 pcie_aer_disable = 1; /* has priority over 'forceload' */
73} 73}
74 74
75bool pci_aer_available(void)
76{
77 return !pcie_aer_disable && pci_msi_enabled();
78}
79
75static int set_device_error_reporting(struct pci_dev *dev, void *data) 80static int set_device_error_reporting(struct pci_dev *dev, void *data)
76{ 81{
77 bool enable = *((bool *)data); 82 bool enable = *((bool *)data);
@@ -411,9 +416,7 @@ static void aer_error_resume(struct pci_dev *dev)
411 */ 416 */
412static int __init aer_service_init(void) 417static int __init aer_service_init(void)
413{ 418{
414 if (pcie_aer_disable) 419 if (!pci_aer_available() || aer_acpi_firmware_first())
415 return -ENXIO;
416 if (!pci_msi_enabled())
417 return -ENXIO; 420 return -ENXIO;
418 return pcie_port_service_register(&aerdriver); 421 return pcie_port_service_register(&aerdriver);
419} 422}
diff --git a/drivers/pci/pcie/aer/aerdrv.h b/drivers/pci/pcie/aer/aerdrv.h
index 80c11d131499..9656e3060412 100644
--- a/drivers/pci/pcie/aer/aerdrv.h
+++ b/drivers/pci/pcie/aer/aerdrv.h
@@ -132,6 +132,7 @@ static inline int aer_osc_setup(struct pcie_device *pciedev)
132 132
133#ifdef CONFIG_ACPI_APEI 133#ifdef CONFIG_ACPI_APEI
134extern int pcie_aer_get_firmware_first(struct pci_dev *pci_dev); 134extern int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
135extern bool aer_acpi_firmware_first(void);
135#else 136#else
136static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev) 137static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
137{ 138{
@@ -139,6 +140,8 @@ static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
139 return pci_dev->__aer_firmware_first; 140 return pci_dev->__aer_firmware_first;
140 return 0; 141 return 0;
141} 142}
143
144static inline bool aer_acpi_firmware_first(void) { return false; }
142#endif 145#endif
143 146
144static inline void pcie_aer_force_firmware_first(struct pci_dev *pci_dev, 147static inline void pcie_aer_force_firmware_first(struct pci_dev *pci_dev,
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index f278d7b0d95d..275bf158ffa7 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -19,42 +19,6 @@
19#include <acpi/apei.h> 19#include <acpi/apei.h>
20#include "aerdrv.h" 20#include "aerdrv.h"
21 21
22/**
23 * aer_osc_setup - run ACPI _OSC method
24 * @pciedev: pcie_device which AER is being enabled on
25 *
26 * @return: Zero on success. Nonzero otherwise.
27 *
28 * Invoked when PCIe bus loads AER service driver. To avoid conflict with
29 * BIOS AER support requires BIOS to yield AER control to OS native driver.
30 **/
31int aer_osc_setup(struct pcie_device *pciedev)
32{
33 acpi_status status = AE_NOT_FOUND;
34 struct pci_dev *pdev = pciedev->port;
35 acpi_handle handle = NULL;
36
37 if (acpi_pci_disabled)
38 return -1;
39
40 handle = acpi_find_root_bridge_handle(pdev);
41 if (handle) {
42 status = acpi_pci_osc_control_set(handle,
43 OSC_PCI_EXPRESS_AER_CONTROL |
44 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
45 }
46
47 if (ACPI_FAILURE(status)) {
48 dev_printk(KERN_DEBUG, &pciedev->device, "AER service couldn't "
49 "init device: %s\n",
50 (status == AE_SUPPORT || status == AE_NOT_FOUND) ?
51 "no _OSC support" : "_OSC failed");
52 return -1;
53 }
54
55 return 0;
56}
57
58#ifdef CONFIG_ACPI_APEI 22#ifdef CONFIG_ACPI_APEI
59static inline int hest_match_pci(struct acpi_hest_aer_common *p, 23static inline int hest_match_pci(struct acpi_hest_aer_common *p,
60 struct pci_dev *pci) 24 struct pci_dev *pci)
@@ -129,4 +93,38 @@ int pcie_aer_get_firmware_first(struct pci_dev *dev)
129 aer_set_firmware_first(dev); 93 aer_set_firmware_first(dev);
130 return dev->__aer_firmware_first; 94 return dev->__aer_firmware_first;
131} 95}
96
97static bool aer_firmware_first;
98
99static int aer_hest_parse_aff(struct acpi_hest_header *hest_hdr, void *data)
100{
101 struct acpi_hest_aer_common *p;
102
103 if (aer_firmware_first)
104 return 0;
105
106 switch (hest_hdr->type) {
107 case ACPI_HEST_TYPE_AER_ROOT_PORT:
108 case ACPI_HEST_TYPE_AER_ENDPOINT:
109 case ACPI_HEST_TYPE_AER_BRIDGE:
110 p = (struct acpi_hest_aer_common *)(hest_hdr + 1);
111 aer_firmware_first = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST);
112 default:
113 return 0;
114 }
115}
116
117/**
118 * aer_acpi_firmware_first - Check if APEI should control AER.
119 */
120bool aer_acpi_firmware_first(void)
121{
122 static bool parsed = false;
123
124 if (!parsed) {
125 apei_hest_parse(aer_hest_parse_aff, NULL);
126 parsed = true;
127 }
128 return aer_firmware_first;
129}
132#endif 130#endif
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index fc0b5a93e1de..43421fbe080a 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -754,7 +754,7 @@ void aer_isr(struct work_struct *work)
754{ 754{
755 struct aer_rpc *rpc = container_of(work, struct aer_rpc, dpc_handler); 755 struct aer_rpc *rpc = container_of(work, struct aer_rpc, dpc_handler);
756 struct pcie_device *p_device = rpc->rpd; 756 struct pcie_device *p_device = rpc->rpd;
757 struct aer_err_source e_src; 757 struct aer_err_source uninitialized_var(e_src);
758 758
759 mutex_lock(&rpc->rpc_mutex); 759 mutex_lock(&rpc->rpc_mutex);
760 while (get_e_source(rpc, &e_src)) 760 while (get_e_source(rpc, &e_src))
@@ -772,22 +772,10 @@ void aer_isr(struct work_struct *work)
772 */ 772 */
773int aer_init(struct pcie_device *dev) 773int aer_init(struct pcie_device *dev)
774{ 774{
775 if (pcie_aer_get_firmware_first(dev->port)) {
776 dev_printk(KERN_DEBUG, &dev->device,
777 "PCIe errors handled by platform firmware.\n");
778 goto out;
779 }
780
781 if (aer_osc_setup(dev))
782 goto out;
783
784 return 0;
785out:
786 if (forceload) { 775 if (forceload) {
787 dev_printk(KERN_DEBUG, &dev->device, 776 dev_printk(KERN_DEBUG, &dev->device,
788 "aerdrv forceload requested.\n"); 777 "aerdrv forceload requested.\n");
789 pcie_aer_force_firmware_first(dev->port, 0); 778 pcie_aer_force_firmware_first(dev->port, 0);
790 return 0;
791 } 779 }
792 return -ENXIO; 780 return 0;
793} 781}
diff --git a/drivers/pci/pcie/pme/pcie_pme.c b/drivers/pci/pcie/pme.c
index bbdea18693d9..2f3c90407227 100644
--- a/drivers/pci/pcie/pme/pcie_pme.c
+++ b/drivers/pci/pcie/pme.c
@@ -23,38 +23,13 @@
23#include <linux/pci-acpi.h> 23#include <linux/pci-acpi.h>
24#include <linux/pm_runtime.h> 24#include <linux/pm_runtime.h>
25 25
26#include "../../pci.h" 26#include "../pci.h"
27#include "pcie_pme.h" 27#include "portdrv.h"
28 28
29#define PCI_EXP_RTSTA_PME 0x10000 /* PME status */ 29#define PCI_EXP_RTSTA_PME 0x10000 /* PME status */
30#define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */ 30#define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */
31 31
32/* 32/*
33 * If set, this switch will prevent the PCIe root port PME service driver from
34 * being registered. Consequently, the interrupt-based PCIe PME signaling will
35 * not be used by any PCIe root ports in that case.
36 */
37static bool pcie_pme_disabled = true;
38
39/*
40 * The PCI Express Base Specification 2.0, Section 6.1.8, states the following:
41 * "In order to maintain compatibility with non-PCI Express-aware system
42 * software, system power management logic must be configured by firmware to use
43 * the legacy mechanism of signaling PME by default. PCI Express-aware system
44 * software must notify the firmware prior to enabling native, interrupt-based
45 * PME signaling." However, if the platform doesn't provide us with a suitable
46 * notification mechanism or the notification fails, it is not clear whether or
47 * not we are supposed to use the interrupt-based PCIe PME signaling. The
48 * switch below can be used to indicate the desired behaviour. When set, it
49 * will make the kernel use the interrupt-based PCIe PME signaling regardless of
50 * the platform notification status, although the kernel will attempt to notify
51 * the platform anyway. When unset, it will prevent the kernel from using the
52 * the interrupt-based PCIe PME signaling if the platform notification fails,
53 * which is the default.
54 */
55static bool pcie_pme_force_enable;
56
57/*
58 * If this switch is set, MSI will not be used for PCIe PME signaling. This 33 * If this switch is set, MSI will not be used for PCIe PME signaling. This
59 * causes the PCIe port driver to use INTx interrupts only, but it turns out 34 * causes the PCIe port driver to use INTx interrupts only, but it turns out
60 * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based 35 * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
@@ -64,38 +39,13 @@ bool pcie_pme_msi_disabled;
64 39
65static int __init pcie_pme_setup(char *str) 40static int __init pcie_pme_setup(char *str)
66{ 41{
67 if (!strncmp(str, "auto", 4)) 42 if (!strncmp(str, "nomsi", 5))
68 pcie_pme_disabled = false; 43 pcie_pme_msi_disabled = true;
69 else if (!strncmp(str, "force", 5))
70 pcie_pme_force_enable = true;
71
72 str = strchr(str, ',');
73 if (str) {
74 str++;
75 str += strspn(str, " \t");
76 if (*str && !strcmp(str, "nomsi"))
77 pcie_pme_msi_disabled = true;
78 }
79 44
80 return 1; 45 return 1;
81} 46}
82__setup("pcie_pme=", pcie_pme_setup); 47__setup("pcie_pme=", pcie_pme_setup);
83 48
84/**
85 * pcie_pme_platform_setup - Ensure that the kernel controls the PCIe PME.
86 * @srv: PCIe PME root port service to use for carrying out the check.
87 *
88 * Notify the platform that the native PCIe PME is going to be used and return
89 * 'true' if the control of the PCIe PME registers has been acquired from the
90 * platform.
91 */
92static bool pcie_pme_platform_setup(struct pcie_device *srv)
93{
94 if (!pcie_pme_platform_notify(srv))
95 return true;
96 return pcie_pme_force_enable;
97}
98
99struct pcie_pme_service_data { 49struct pcie_pme_service_data {
100 spinlock_t lock; 50 spinlock_t lock;
101 struct pcie_device *srv; 51 struct pcie_device *srv;
@@ -108,7 +58,7 @@ struct pcie_pme_service_data {
108 * @dev: PCIe root port or event collector. 58 * @dev: PCIe root port or event collector.
109 * @enable: Enable or disable the interrupt. 59 * @enable: Enable or disable the interrupt.
110 */ 60 */
111static void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable) 61void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
112{ 62{
113 int rtctl_pos; 63 int rtctl_pos;
114 u16 rtctl; 64 u16 rtctl;
@@ -417,9 +367,6 @@ static int pcie_pme_probe(struct pcie_device *srv)
417 struct pcie_pme_service_data *data; 367 struct pcie_pme_service_data *data;
418 int ret; 368 int ret;
419 369
420 if (!pcie_pme_platform_setup(srv))
421 return -EACCES;
422
423 data = kzalloc(sizeof(*data), GFP_KERNEL); 370 data = kzalloc(sizeof(*data), GFP_KERNEL);
424 if (!data) 371 if (!data)
425 return -ENOMEM; 372 return -ENOMEM;
@@ -509,8 +456,7 @@ static struct pcie_port_service_driver pcie_pme_driver = {
509 */ 456 */
510static int __init pcie_pme_service_init(void) 457static int __init pcie_pme_service_init(void)
511{ 458{
512 return pcie_pme_disabled ? 459 return pcie_port_service_register(&pcie_pme_driver);
513 -ENODEV : pcie_port_service_register(&pcie_pme_driver);
514} 460}
515 461
516module_init(pcie_pme_service_init); 462module_init(pcie_pme_service_init);
diff --git a/drivers/pci/pcie/pme/Makefile b/drivers/pci/pcie/pme/Makefile
deleted file mode 100644
index 8b9238053080..000000000000
--- a/drivers/pci/pcie/pme/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for PCI-Express Root Port PME signaling driver
3#
4
5obj-$(CONFIG_PCIE_PME) += pmedriver.o
6
7pmedriver-objs := pcie_pme.o
8pmedriver-$(CONFIG_ACPI) += pcie_pme_acpi.o
diff --git a/drivers/pci/pcie/pme/pcie_pme.h b/drivers/pci/pcie/pme/pcie_pme.h
deleted file mode 100644
index b30d2b7c9775..000000000000
--- a/drivers/pci/pcie/pme/pcie_pme.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * drivers/pci/pcie/pme/pcie_pme.h
3 *
4 * PCI Express Root Port PME signaling support
5 *
6 * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
7 */
8
9#ifndef _PCIE_PME_H_
10#define _PCIE_PME_H_
11
12struct pcie_device;
13
14#ifdef CONFIG_ACPI
15extern int pcie_pme_acpi_setup(struct pcie_device *srv);
16
17static inline int pcie_pme_platform_notify(struct pcie_device *srv)
18{
19 return pcie_pme_acpi_setup(srv);
20}
21#else /* !CONFIG_ACPI */
22static inline int pcie_pme_platform_notify(struct pcie_device *srv)
23{
24 return 0;
25}
26#endif /* !CONFIG_ACPI */
27
28#endif
diff --git a/drivers/pci/pcie/pme/pcie_pme_acpi.c b/drivers/pci/pcie/pme/pcie_pme_acpi.c
deleted file mode 100644
index 83ab2287ae3f..000000000000
--- a/drivers/pci/pcie/pme/pcie_pme_acpi.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * PCIe Native PME support, ACPI-related part
3 *
4 * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License V2. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/pci.h>
12#include <linux/kernel.h>
13#include <linux/errno.h>
14#include <linux/acpi.h>
15#include <linux/pci-acpi.h>
16#include <linux/pcieport_if.h>
17
18/**
19 * pcie_pme_acpi_setup - Request the ACPI BIOS to release control over PCIe PME.
20 * @srv - PCIe PME service for a root port or event collector.
21 *
22 * Invoked when the PCIe bus type loads PCIe PME service driver. To avoid
23 * conflict with the BIOS PCIe support requires the BIOS to yield PCIe PME
24 * control to the kernel.
25 */
26int pcie_pme_acpi_setup(struct pcie_device *srv)
27{
28 acpi_status status = AE_NOT_FOUND;
29 struct pci_dev *port = srv->port;
30 acpi_handle handle;
31 int error = 0;
32
33 if (acpi_pci_disabled)
34 return -ENOSYS;
35
36 dev_info(&port->dev, "Requesting control of PCIe PME from ACPI BIOS\n");
37
38 handle = acpi_find_root_bridge_handle(port);
39 if (!handle)
40 return -EINVAL;
41
42 status = acpi_pci_osc_control_set(handle,
43 OSC_PCI_EXPRESS_PME_CONTROL |
44 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
45 if (ACPI_FAILURE(status)) {
46 dev_info(&port->dev,
47 "Failed to receive control of PCIe PME service: %s\n",
48 (status == AE_SUPPORT || status == AE_NOT_FOUND) ?
49 "no _OSC support" : "ACPI _OSC failed");
50 error = -ENODEV;
51 }
52
53 return error;
54}
diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h
index 813a5c3427b6..7b5aba0a3291 100644
--- a/drivers/pci/pcie/portdrv.h
+++ b/drivers/pci/pcie/portdrv.h
@@ -20,6 +20,9 @@
20 20
21#define get_descriptor_id(type, service) (((type - 4) << 4) | service) 21#define get_descriptor_id(type, service) (((type - 4) << 4) | service)
22 22
23extern bool pcie_ports_disabled;
24extern bool pcie_ports_auto;
25
23extern struct bus_type pcie_port_bus_type; 26extern struct bus_type pcie_port_bus_type;
24extern int pcie_port_device_register(struct pci_dev *dev); 27extern int pcie_port_device_register(struct pci_dev *dev);
25#ifdef CONFIG_PM 28#ifdef CONFIG_PM
@@ -30,6 +33,8 @@ extern void pcie_port_device_remove(struct pci_dev *dev);
30extern int __must_check pcie_port_bus_register(void); 33extern int __must_check pcie_port_bus_register(void);
31extern void pcie_port_bus_unregister(void); 34extern void pcie_port_bus_unregister(void);
32 35
36struct pci_dev;
37
33#ifdef CONFIG_PCIE_PME 38#ifdef CONFIG_PCIE_PME
34extern bool pcie_pme_msi_disabled; 39extern bool pcie_pme_msi_disabled;
35 40
@@ -42,9 +47,26 @@ static inline bool pcie_pme_no_msi(void)
42{ 47{
43 return pcie_pme_msi_disabled; 48 return pcie_pme_msi_disabled;
44} 49}
50
51extern void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
45#else /* !CONFIG_PCIE_PME */ 52#else /* !CONFIG_PCIE_PME */
46static inline void pcie_pme_disable_msi(void) {} 53static inline void pcie_pme_disable_msi(void) {}
47static inline bool pcie_pme_no_msi(void) { return false; } 54static inline bool pcie_pme_no_msi(void) { return false; }
55static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}
48#endif /* !CONFIG_PCIE_PME */ 56#endif /* !CONFIG_PCIE_PME */
49 57
58#ifdef CONFIG_ACPI
59extern int pcie_port_acpi_setup(struct pci_dev *port, int *mask);
60
61static inline int pcie_port_platform_notify(struct pci_dev *port, int *mask)
62{
63 return pcie_port_acpi_setup(port, mask);
64}
65#else /* !CONFIG_ACPI */
66static inline int pcie_port_platform_notify(struct pci_dev *port, int *mask)
67{
68 return 0;
69}
70#endif /* !CONFIG_ACPI */
71
50#endif /* _PORTDRV_H_ */ 72#endif /* _PORTDRV_H_ */
diff --git a/drivers/pci/pcie/portdrv_acpi.c b/drivers/pci/pcie/portdrv_acpi.c
new file mode 100644
index 000000000000..5982b6a63b89
--- /dev/null
+++ b/drivers/pci/pcie/portdrv_acpi.c
@@ -0,0 +1,77 @@
1/*
2 * PCIe Port Native Services Support, ACPI-Related Part
3 *
4 * Copyright (C) 2010 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License V2. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/pci.h>
12#include <linux/kernel.h>
13#include <linux/errno.h>
14#include <linux/acpi.h>
15#include <linux/pci-acpi.h>
16#include <linux/pcieport_if.h>
17
18#include "aer/aerdrv.h"
19#include "../pci.h"
20
21/**
22 * pcie_port_acpi_setup - Request the BIOS to release control of PCIe services.
23 * @port: PCIe Port service for a root port or event collector.
24 * @srv_mask: Bit mask of services that can be enabled for @port.
25 *
26 * Invoked when @port is identified as a PCIe port device. To avoid conflicts
27 * with the BIOS PCIe port native services support requires the BIOS to yield
28 * control of these services to the kernel. The mask of services that the BIOS
29 * allows to be enabled for @port is written to @srv_mask.
30 *
31 * NOTE: It turns out that we cannot do that for individual port services
32 * separately, because that would make some systems work incorrectly.
33 */
34int pcie_port_acpi_setup(struct pci_dev *port, int *srv_mask)
35{
36 acpi_status status;
37 acpi_handle handle;
38 u32 flags;
39
40 if (acpi_pci_disabled)
41 return 0;
42
43 handle = acpi_find_root_bridge_handle(port);
44 if (!handle)
45 return -EINVAL;
46
47 flags = OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL
48 | OSC_PCI_EXPRESS_NATIVE_HP_CONTROL
49 | OSC_PCI_EXPRESS_PME_CONTROL;
50
51 if (pci_aer_available()) {
52 if (aer_acpi_firmware_first())
53 dev_dbg(&port->dev, "PCIe errors handled by BIOS.\n");
54 else
55 flags |= OSC_PCI_EXPRESS_AER_CONTROL;
56 }
57
58 status = acpi_pci_osc_control_set(handle, &flags,
59 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
60 if (ACPI_FAILURE(status)) {
61 dev_dbg(&port->dev, "ACPI _OSC request failed (code %d)\n",
62 status);
63 return -ENODEV;
64 }
65
66 dev_info(&port->dev, "ACPI _OSC control granted for 0x%02x\n", flags);
67
68 *srv_mask = PCIE_PORT_SERVICE_VC;
69 if (flags & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)
70 *srv_mask |= PCIE_PORT_SERVICE_HP;
71 if (flags & OSC_PCI_EXPRESS_PME_CONTROL)
72 *srv_mask |= PCIE_PORT_SERVICE_PME;
73 if (flags & OSC_PCI_EXPRESS_AER_CONTROL)
74 *srv_mask |= PCIE_PORT_SERVICE_AER;
75
76 return 0;
77}
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index e73effbe402c..a9c222d79ebc 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -14,6 +14,8 @@
14#include <linux/string.h> 14#include <linux/string.h>
15#include <linux/slab.h> 15#include <linux/slab.h>
16#include <linux/pcieport_if.h> 16#include <linux/pcieport_if.h>
17#include <linux/aer.h>
18#include <linux/pci-aspm.h>
17 19
18#include "../pci.h" 20#include "../pci.h"
19#include "portdrv.h" 21#include "portdrv.h"
@@ -236,24 +238,64 @@ static int get_port_device_capability(struct pci_dev *dev)
236 int services = 0, pos; 238 int services = 0, pos;
237 u16 reg16; 239 u16 reg16;
238 u32 reg32; 240 u32 reg32;
241 int cap_mask;
242 int err;
243
244 err = pcie_port_platform_notify(dev, &cap_mask);
245 if (pcie_ports_auto) {
246 if (err) {
247 pcie_no_aspm();
248 return 0;
249 }
250 } else {
251 cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
252 | PCIE_PORT_SERVICE_VC;
253 if (pci_aer_available())
254 cap_mask |= PCIE_PORT_SERVICE_AER;
255 }
239 256
240 pos = pci_pcie_cap(dev); 257 pos = pci_pcie_cap(dev);
241 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16); 258 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
242 /* Hot-Plug Capable */ 259 /* Hot-Plug Capable */
243 if (reg16 & PCI_EXP_FLAGS_SLOT) { 260 if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) {
244 pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32); 261 pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32);
245 if (reg32 & PCI_EXP_SLTCAP_HPC) 262 if (reg32 & PCI_EXP_SLTCAP_HPC) {
246 services |= PCIE_PORT_SERVICE_HP; 263 services |= PCIE_PORT_SERVICE_HP;
264 /*
265 * Disable hot-plug interrupts in case they have been
266 * enabled by the BIOS and the hot-plug service driver
267 * is not loaded.
268 */
269 pos += PCI_EXP_SLTCTL;
270 pci_read_config_word(dev, pos, &reg16);
271 reg16 &= ~(PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
272 pci_write_config_word(dev, pos, reg16);
273 }
247 } 274 }
248 /* AER capable */ 275 /* AER capable */
249 if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) 276 if ((cap_mask & PCIE_PORT_SERVICE_AER)
277 && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
250 services |= PCIE_PORT_SERVICE_AER; 278 services |= PCIE_PORT_SERVICE_AER;
279 /*
280 * Disable AER on this port in case it's been enabled by the
281 * BIOS (the AER service driver will enable it when necessary).
282 */
283 pci_disable_pcie_error_reporting(dev);
284 }
251 /* VC support */ 285 /* VC support */
252 if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC)) 286 if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
253 services |= PCIE_PORT_SERVICE_VC; 287 services |= PCIE_PORT_SERVICE_VC;
254 /* Root ports are capable of generating PME too */ 288 /* Root ports are capable of generating PME too */
255 if (dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) 289 if ((cap_mask & PCIE_PORT_SERVICE_PME)
290 && dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) {
256 services |= PCIE_PORT_SERVICE_PME; 291 services |= PCIE_PORT_SERVICE_PME;
292 /*
293 * Disable PME interrupt on this port in case it's been enabled
294 * by the BIOS (the PME service driver will enable it when
295 * necessary).
296 */
297 pcie_pme_interrupt_enable(dev, false);
298 }
257 299
258 return services; 300 return services;
259} 301}
@@ -494,6 +536,9 @@ static void pcie_port_shutdown_service(struct device *dev) {}
494 */ 536 */
495int pcie_port_service_register(struct pcie_port_service_driver *new) 537int pcie_port_service_register(struct pcie_port_service_driver *new)
496{ 538{
539 if (pcie_ports_disabled)
540 return -ENODEV;
541
497 new->driver.name = (char *)new->name; 542 new->driver.name = (char *)new->name;
498 new->driver.bus = &pcie_port_bus_type; 543 new->driver.bus = &pcie_port_bus_type;
499 new->driver.probe = pcie_port_probe_service; 544 new->driver.probe = pcie_port_probe_service;
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index 3debed25e46b..f9033e190fb6 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -15,6 +15,7 @@
15#include <linux/pcieport_if.h> 15#include <linux/pcieport_if.h>
16#include <linux/aer.h> 16#include <linux/aer.h>
17#include <linux/dmi.h> 17#include <linux/dmi.h>
18#include <linux/pci-aspm.h>
18 19
19#include "portdrv.h" 20#include "portdrv.h"
20#include "aer/aerdrv.h" 21#include "aer/aerdrv.h"
@@ -29,6 +30,31 @@ MODULE_AUTHOR(DRIVER_AUTHOR);
29MODULE_DESCRIPTION(DRIVER_DESC); 30MODULE_DESCRIPTION(DRIVER_DESC);
30MODULE_LICENSE("GPL"); 31MODULE_LICENSE("GPL");
31 32
33/* If this switch is set, PCIe port native services should not be enabled. */
34bool pcie_ports_disabled;
35
36/*
37 * If this switch is set, ACPI _OSC will be used to determine whether or not to
38 * enable PCIe port native services.
39 */
40bool pcie_ports_auto = true;
41
42static int __init pcie_port_setup(char *str)
43{
44 if (!strncmp(str, "compat", 6)) {
45 pcie_ports_disabled = true;
46 } else if (!strncmp(str, "native", 6)) {
47 pcie_ports_disabled = false;
48 pcie_ports_auto = false;
49 } else if (!strncmp(str, "auto", 4)) {
50 pcie_ports_disabled = false;
51 pcie_ports_auto = true;
52 }
53
54 return 1;
55}
56__setup("pcie_ports=", pcie_port_setup);
57
32/* global data */ 58/* global data */
33 59
34static int pcie_portdrv_restore_config(struct pci_dev *dev) 60static int pcie_portdrv_restore_config(struct pci_dev *dev)
@@ -301,6 +327,11 @@ static int __init pcie_portdrv_init(void)
301{ 327{
302 int retval; 328 int retval;
303 329
330 if (pcie_ports_disabled) {
331 pcie_no_aspm();
332 return -EACCES;
333 }
334
304 dmi_check_system(pcie_portdrv_dmi_table); 335 dmi_check_system(pcie_portdrv_dmi_table);
305 336
306 retval = pcie_port_bus_register(); 337 retval = pcie_port_bus_register();
@@ -315,11 +346,4 @@ static int __init pcie_portdrv_init(void)
315 return retval; 346 return retval;
316} 347}
317 348
318static void __exit pcie_portdrv_exit(void)
319{
320 pci_unregister_driver(&pcie_portdriver);
321 pcie_port_bus_unregister();
322}
323
324module_init(pcie_portdrv_init); 349module_init(pcie_portdrv_init);
325module_exit(pcie_portdrv_exit);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 12625d90f8b5..c84900da3c59 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -961,8 +961,8 @@ int pci_setup_device(struct pci_dev *dev)
961 dev->class = class; 961 dev->class = class;
962 class >>= 8; 962 class >>= 8;
963 963
964 dev_dbg(&dev->dev, "found [%04x:%04x] class %06x header type %02x\n", 964 dev_printk(KERN_DEBUG, &dev->dev, "[%04x:%04x] type %d class %#08x\n",
965 dev->vendor, dev->device, class, dev->hdr_type); 965 dev->vendor, dev->device, dev->hdr_type, class);
966 966
967 /* need to have dev->class ready */ 967 /* need to have dev->class ready */
968 dev->cfg_size = pci_cfg_space_size(dev); 968 dev->cfg_size = pci_cfg_space_size(dev);
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index 01f0306525a5..297b72c880a1 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -212,8 +212,6 @@ static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
212#endif /* HAVE_PCI_MMAP */ 212#endif /* HAVE_PCI_MMAP */
213 int ret = 0; 213 int ret = 0;
214 214
215 lock_kernel();
216
217 switch (cmd) { 215 switch (cmd) {
218 case PCIIOC_CONTROLLER: 216 case PCIIOC_CONTROLLER:
219 ret = pci_domain_nr(dev->bus); 217 ret = pci_domain_nr(dev->bus);
@@ -242,7 +240,6 @@ static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
242 break; 240 break;
243 }; 241 };
244 242
245 unlock_kernel();
246 return ret; 243 return ret;
247} 244}
248 245
@@ -306,6 +303,7 @@ static const struct file_operations proc_bus_pci_operations = {
306 .read = proc_bus_pci_read, 303 .read = proc_bus_pci_read,
307 .write = proc_bus_pci_write, 304 .write = proc_bus_pci_write,
308 .unlocked_ioctl = proc_bus_pci_ioctl, 305 .unlocked_ioctl = proc_bus_pci_ioctl,
306 .compat_ioctl = proc_bus_pci_ioctl,
309#ifdef HAVE_PCI_MMAP 307#ifdef HAVE_PCI_MMAP
310 .open = proc_bus_pci_open, 308 .open = proc_bus_pci_open,
311 .release = proc_bus_pci_release, 309 .release = proc_bus_pci_release,
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 89ed181cd90c..f5c63fe9db5c 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -163,6 +163,26 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_2, quirk_isa_d
163DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_3, quirk_isa_dma_hangs); 163DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_3, quirk_isa_dma_hangs);
164 164
165/* 165/*
166 * Intel NM10 "TigerPoint" LPC PM1a_STS.BM_STS must be clear
167 * for some HT machines to use C4 w/o hanging.
168 */
169static void __devinit quirk_tigerpoint_bm_sts(struct pci_dev *dev)
170{
171 u32 pmbase;
172 u16 pm1a;
173
174 pci_read_config_dword(dev, 0x40, &pmbase);
175 pmbase = pmbase & 0xff80;
176 pm1a = inw(pmbase);
177
178 if (pm1a & 0x10) {
179 dev_info(&dev->dev, FW_BUG "TigerPoint LPC.BM_STS cleared\n");
180 outw(0x10, pmbase);
181 }
182}
183DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TGP_LPC, quirk_tigerpoint_bm_sts);
184
185/*
166 * Chipsets where PCI->PCI transfers vanish or hang 186 * Chipsets where PCI->PCI transfers vanish or hang
167 */ 187 */
168static void __devinit quirk_nopcipci(struct pci_dev *dev) 188static void __devinit quirk_nopcipci(struct pci_dev *dev)
@@ -206,6 +226,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82439TX, quir
206 * VIA Apollo KT133 needs PCI latency patch 226 * VIA Apollo KT133 needs PCI latency patch
207 * Made according to a windows driver based patch by George E. Breese 227 * Made according to a windows driver based patch by George E. Breese
208 * see PCI Latency Adjust on http://www.viahardware.com/download/viatweak.shtm 228 * see PCI Latency Adjust on http://www.viahardware.com/download/viatweak.shtm
229 * and http://www.georgebreese.com/net/software/#PCI
209 * Also see http://www.au-ja.org/review-kt133a-1-en.phtml for 230 * Also see http://www.au-ja.org/review-kt133a-1-en.phtml for
210 * the info on which Mr Breese based his work. 231 * the info on which Mr Breese based his work.
211 * 232 *
@@ -996,7 +1017,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA, 0x605, quirk_transparent_bridge)
996/* 1017/*
997 * Common misconfiguration of the MediaGX/Geode PCI master that will 1018 * Common misconfiguration of the MediaGX/Geode PCI master that will
998 * reduce PCI bandwidth from 70MB/s to 25MB/s. See the GXM/GXLV/GX1 1019 * reduce PCI bandwidth from 70MB/s to 25MB/s. See the GXM/GXLV/GX1
999 * datasheets found at http://www.national.com/ds/GX for info on what 1020 * datasheets found at http://www.national.com/analog for info on what
1000 * these bits do. <christer@weinigel.se> 1021 * these bits do. <christer@weinigel.se>
1001 */ 1022 */
1002static void quirk_mediagx_master(struct pci_dev *dev) 1023static void quirk_mediagx_master(struct pci_dev *dev)
@@ -2276,6 +2297,37 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
2276 PCI_DEVICE_ID_NVIDIA_NVENET_15, 2297 PCI_DEVICE_ID_NVIDIA_NVENET_15,
2277 nvenet_msi_disable); 2298 nvenet_msi_disable);
2278 2299
2300/*
2301 * Some versions of the MCP55 bridge from nvidia have a legacy irq routing
2302 * config register. This register controls the routing of legacy interrupts
2303 * from devices that route through the MCP55. If this register is misprogramed
2304 * interrupts are only sent to the bsp, unlike conventional systems where the
2305 * irq is broadxast to all online cpus. Not having this register set
2306 * properly prevents kdump from booting up properly, so lets make sure that
2307 * we have it set correctly.
2308 * Note this is an undocumented register.
2309 */
2310static void __devinit nvbridge_check_legacy_irq_routing(struct pci_dev *dev)
2311{
2312 u32 cfg;
2313
2314 pci_read_config_dword(dev, 0x74, &cfg);
2315
2316 if (cfg & ((1 << 2) | (1 << 15))) {
2317 printk(KERN_INFO "Rewriting irq routing register on MCP55\n");
2318 cfg &= ~((1 << 2) | (1 << 15));
2319 pci_write_config_dword(dev, 0x74, cfg);
2320 }
2321}
2322
2323DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
2324 PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V0,
2325 nvbridge_check_legacy_irq_routing);
2326
2327DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
2328 PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V4,
2329 nvbridge_check_legacy_irq_routing);
2330
2279static int __devinit ht_check_msi_mapping(struct pci_dev *dev) 2331static int __devinit ht_check_msi_mapping(struct pci_dev *dev)
2280{ 2332{
2281 int pos, ttl = 48; 2333 int pos, ttl = 48;
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 2aaa13150de3..bc0e6eea0fff 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -85,7 +85,7 @@ void pci_update_resource(struct pci_dev *dev, int resno)
85 } 85 }
86 } 86 }
87 res->flags &= ~IORESOURCE_UNSET; 87 res->flags &= ~IORESOURCE_UNSET;
88 dev_info(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx]\n", 88 dev_info(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n",
89 resno, res, (unsigned long long)region.start, 89 resno, res, (unsigned long long)region.start,
90 (unsigned long long)region.end); 90 (unsigned long long)region.end);
91} 91}
diff --git a/drivers/pci/slot.c b/drivers/pci/slot.c
index 659eaa0fc48f..968cfea04f74 100644
--- a/drivers/pci/slot.c
+++ b/drivers/pci/slot.c
@@ -49,7 +49,7 @@ static ssize_t address_read_file(struct pci_slot *slot, char *buf)
49} 49}
50 50
51/* these strings match up with the values in pci_bus_speed */ 51/* these strings match up with the values in pci_bus_speed */
52static char *pci_bus_speed_strings[] = { 52static const char *pci_bus_speed_strings[] = {
53 "33 MHz PCI", /* 0x00 */ 53 "33 MHz PCI", /* 0x00 */
54 "66 MHz PCI", /* 0x01 */ 54 "66 MHz PCI", /* 0x01 */
55 "66 MHz PCI-X", /* 0x02 */ 55 "66 MHz PCI-X", /* 0x02 */
diff --git a/drivers/pci/xen-pcifront.c b/drivers/pci/xen-pcifront.c
new file mode 100644
index 000000000000..a87c4985326e
--- /dev/null
+++ b/drivers/pci/xen-pcifront.c
@@ -0,0 +1,1148 @@
1/*
2 * Xen PCI Frontend.
3 *
4 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
5 */
6#include <linux/module.h>
7#include <linux/init.h>
8#include <linux/mm.h>
9#include <xen/xenbus.h>
10#include <xen/events.h>
11#include <xen/grant_table.h>
12#include <xen/page.h>
13#include <linux/spinlock.h>
14#include <linux/pci.h>
15#include <linux/msi.h>
16#include <xen/xenbus.h>
17#include <xen/interface/io/pciif.h>
18#include <asm/xen/pci.h>
19#include <linux/interrupt.h>
20#include <asm/atomic.h>
21#include <linux/workqueue.h>
22#include <linux/bitops.h>
23#include <linux/time.h>
24
25#define INVALID_GRANT_REF (0)
26#define INVALID_EVTCHN (-1)
27
28struct pci_bus_entry {
29 struct list_head list;
30 struct pci_bus *bus;
31};
32
33#define _PDEVB_op_active (0)
34#define PDEVB_op_active (1 << (_PDEVB_op_active))
35
36struct pcifront_device {
37 struct xenbus_device *xdev;
38 struct list_head root_buses;
39
40 int evtchn;
41 int gnt_ref;
42
43 int irq;
44
45 /* Lock this when doing any operations in sh_info */
46 spinlock_t sh_info_lock;
47 struct xen_pci_sharedinfo *sh_info;
48 struct work_struct op_work;
49 unsigned long flags;
50
51};
52
53struct pcifront_sd {
54 int domain;
55 struct pcifront_device *pdev;
56};
57
58static inline struct pcifront_device *
59pcifront_get_pdev(struct pcifront_sd *sd)
60{
61 return sd->pdev;
62}
63
64static inline void pcifront_init_sd(struct pcifront_sd *sd,
65 unsigned int domain, unsigned int bus,
66 struct pcifront_device *pdev)
67{
68 sd->domain = domain;
69 sd->pdev = pdev;
70}
71
72static DEFINE_SPINLOCK(pcifront_dev_lock);
73static struct pcifront_device *pcifront_dev;
74
75static int verbose_request;
76module_param(verbose_request, int, 0644);
77
78static int errno_to_pcibios_err(int errno)
79{
80 switch (errno) {
81 case XEN_PCI_ERR_success:
82 return PCIBIOS_SUCCESSFUL;
83
84 case XEN_PCI_ERR_dev_not_found:
85 return PCIBIOS_DEVICE_NOT_FOUND;
86
87 case XEN_PCI_ERR_invalid_offset:
88 case XEN_PCI_ERR_op_failed:
89 return PCIBIOS_BAD_REGISTER_NUMBER;
90
91 case XEN_PCI_ERR_not_implemented:
92 return PCIBIOS_FUNC_NOT_SUPPORTED;
93
94 case XEN_PCI_ERR_access_denied:
95 return PCIBIOS_SET_FAILED;
96 }
97 return errno;
98}
99
100static inline void schedule_pcifront_aer_op(struct pcifront_device *pdev)
101{
102 if (test_bit(_XEN_PCIB_active, (unsigned long *)&pdev->sh_info->flags)
103 && !test_and_set_bit(_PDEVB_op_active, &pdev->flags)) {
104 dev_dbg(&pdev->xdev->dev, "schedule aer frontend job\n");
105 schedule_work(&pdev->op_work);
106 }
107}
108
109static int do_pci_op(struct pcifront_device *pdev, struct xen_pci_op *op)
110{
111 int err = 0;
112 struct xen_pci_op *active_op = &pdev->sh_info->op;
113 unsigned long irq_flags;
114 evtchn_port_t port = pdev->evtchn;
115 unsigned irq = pdev->irq;
116 s64 ns, ns_timeout;
117 struct timeval tv;
118
119 spin_lock_irqsave(&pdev->sh_info_lock, irq_flags);
120
121 memcpy(active_op, op, sizeof(struct xen_pci_op));
122
123 /* Go */
124 wmb();
125 set_bit(_XEN_PCIF_active, (unsigned long *)&pdev->sh_info->flags);
126 notify_remote_via_evtchn(port);
127
128 /*
129 * We set a poll timeout of 3 seconds but give up on return after
130 * 2 seconds. It is better to time out too late rather than too early
131 * (in the latter case we end up continually re-executing poll() with a
132 * timeout in the past). 1s difference gives plenty of slack for error.
133 */
134 do_gettimeofday(&tv);
135 ns_timeout = timeval_to_ns(&tv) + 2 * (s64)NSEC_PER_SEC;
136
137 xen_clear_irq_pending(irq);
138
139 while (test_bit(_XEN_PCIF_active,
140 (unsigned long *)&pdev->sh_info->flags)) {
141 xen_poll_irq_timeout(irq, jiffies + 3*HZ);
142 xen_clear_irq_pending(irq);
143 do_gettimeofday(&tv);
144 ns = timeval_to_ns(&tv);
145 if (ns > ns_timeout) {
146 dev_err(&pdev->xdev->dev,
147 "pciback not responding!!!\n");
148 clear_bit(_XEN_PCIF_active,
149 (unsigned long *)&pdev->sh_info->flags);
150 err = XEN_PCI_ERR_dev_not_found;
151 goto out;
152 }
153 }
154
155 /*
156 * We might lose backend service request since we
157 * reuse same evtchn with pci_conf backend response. So re-schedule
158 * aer pcifront service.
159 */
160 if (test_bit(_XEN_PCIB_active,
161 (unsigned long *)&pdev->sh_info->flags)) {
162 dev_err(&pdev->xdev->dev,
163 "schedule aer pcifront service\n");
164 schedule_pcifront_aer_op(pdev);
165 }
166
167 memcpy(op, active_op, sizeof(struct xen_pci_op));
168
169 err = op->err;
170out:
171 spin_unlock_irqrestore(&pdev->sh_info_lock, irq_flags);
172 return err;
173}
174
175/* Access to this function is spinlocked in drivers/pci/access.c */
176static int pcifront_bus_read(struct pci_bus *bus, unsigned int devfn,
177 int where, int size, u32 *val)
178{
179 int err = 0;
180 struct xen_pci_op op = {
181 .cmd = XEN_PCI_OP_conf_read,
182 .domain = pci_domain_nr(bus),
183 .bus = bus->number,
184 .devfn = devfn,
185 .offset = where,
186 .size = size,
187 };
188 struct pcifront_sd *sd = bus->sysdata;
189 struct pcifront_device *pdev = pcifront_get_pdev(sd);
190
191 if (verbose_request)
192 dev_info(&pdev->xdev->dev,
193 "read dev=%04x:%02x:%02x.%01x - offset %x size %d\n",
194 pci_domain_nr(bus), bus->number, PCI_SLOT(devfn),
195 PCI_FUNC(devfn), where, size);
196
197 err = do_pci_op(pdev, &op);
198
199 if (likely(!err)) {
200 if (verbose_request)
201 dev_info(&pdev->xdev->dev, "read got back value %x\n",
202 op.value);
203
204 *val = op.value;
205 } else if (err == -ENODEV) {
206 /* No device here, pretend that it just returned 0 */
207 err = 0;
208 *val = 0;
209 }
210
211 return errno_to_pcibios_err(err);
212}
213
214/* Access to this function is spinlocked in drivers/pci/access.c */
215static int pcifront_bus_write(struct pci_bus *bus, unsigned int devfn,
216 int where, int size, u32 val)
217{
218 struct xen_pci_op op = {
219 .cmd = XEN_PCI_OP_conf_write,
220 .domain = pci_domain_nr(bus),
221 .bus = bus->number,
222 .devfn = devfn,
223 .offset = where,
224 .size = size,
225 .value = val,
226 };
227 struct pcifront_sd *sd = bus->sysdata;
228 struct pcifront_device *pdev = pcifront_get_pdev(sd);
229
230 if (verbose_request)
231 dev_info(&pdev->xdev->dev,
232 "write dev=%04x:%02x:%02x.%01x - "
233 "offset %x size %d val %x\n",
234 pci_domain_nr(bus), bus->number,
235 PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, val);
236
237 return errno_to_pcibios_err(do_pci_op(pdev, &op));
238}
239
240struct pci_ops pcifront_bus_ops = {
241 .read = pcifront_bus_read,
242 .write = pcifront_bus_write,
243};
244
245#ifdef CONFIG_PCI_MSI
246static int pci_frontend_enable_msix(struct pci_dev *dev,
247 int **vector, int nvec)
248{
249 int err;
250 int i;
251 struct xen_pci_op op = {
252 .cmd = XEN_PCI_OP_enable_msix,
253 .domain = pci_domain_nr(dev->bus),
254 .bus = dev->bus->number,
255 .devfn = dev->devfn,
256 .value = nvec,
257 };
258 struct pcifront_sd *sd = dev->bus->sysdata;
259 struct pcifront_device *pdev = pcifront_get_pdev(sd);
260 struct msi_desc *entry;
261
262 if (nvec > SH_INFO_MAX_VEC) {
263 dev_err(&dev->dev, "too much vector for pci frontend: %x."
264 " Increase SH_INFO_MAX_VEC.\n", nvec);
265 return -EINVAL;
266 }
267
268 i = 0;
269 list_for_each_entry(entry, &dev->msi_list, list) {
270 op.msix_entries[i].entry = entry->msi_attrib.entry_nr;
271 /* Vector is useless at this point. */
272 op.msix_entries[i].vector = -1;
273 i++;
274 }
275
276 err = do_pci_op(pdev, &op);
277
278 if (likely(!err)) {
279 if (likely(!op.value)) {
280 /* we get the result */
281 for (i = 0; i < nvec; i++)
282 *(*vector+i) = op.msix_entries[i].vector;
283 return 0;
284 } else {
285 printk(KERN_DEBUG "enable msix get value %x\n",
286 op.value);
287 return op.value;
288 }
289 } else {
290 dev_err(&dev->dev, "enable msix get err %x\n", err);
291 return err;
292 }
293}
294
295static void pci_frontend_disable_msix(struct pci_dev *dev)
296{
297 int err;
298 struct xen_pci_op op = {
299 .cmd = XEN_PCI_OP_disable_msix,
300 .domain = pci_domain_nr(dev->bus),
301 .bus = dev->bus->number,
302 .devfn = dev->devfn,
303 };
304 struct pcifront_sd *sd = dev->bus->sysdata;
305 struct pcifront_device *pdev = pcifront_get_pdev(sd);
306
307 err = do_pci_op(pdev, &op);
308
309 /* What should do for error ? */
310 if (err)
311 dev_err(&dev->dev, "pci_disable_msix get err %x\n", err);
312}
313
314static int pci_frontend_enable_msi(struct pci_dev *dev, int **vector)
315{
316 int err;
317 struct xen_pci_op op = {
318 .cmd = XEN_PCI_OP_enable_msi,
319 .domain = pci_domain_nr(dev->bus),
320 .bus = dev->bus->number,
321 .devfn = dev->devfn,
322 };
323 struct pcifront_sd *sd = dev->bus->sysdata;
324 struct pcifront_device *pdev = pcifront_get_pdev(sd);
325
326 err = do_pci_op(pdev, &op);
327 if (likely(!err)) {
328 *(*vector) = op.value;
329 } else {
330 dev_err(&dev->dev, "pci frontend enable msi failed for dev "
331 "%x:%x\n", op.bus, op.devfn);
332 err = -EINVAL;
333 }
334 return err;
335}
336
337static void pci_frontend_disable_msi(struct pci_dev *dev)
338{
339 int err;
340 struct xen_pci_op op = {
341 .cmd = XEN_PCI_OP_disable_msi,
342 .domain = pci_domain_nr(dev->bus),
343 .bus = dev->bus->number,
344 .devfn = dev->devfn,
345 };
346 struct pcifront_sd *sd = dev->bus->sysdata;
347 struct pcifront_device *pdev = pcifront_get_pdev(sd);
348
349 err = do_pci_op(pdev, &op);
350 if (err == XEN_PCI_ERR_dev_not_found) {
351 /* XXX No response from backend, what shall we do? */
352 printk(KERN_DEBUG "get no response from backend for disable MSI\n");
353 return;
354 }
355 if (err)
356 /* how can pciback notify us fail? */
357 printk(KERN_DEBUG "get fake response frombackend\n");
358}
359
360static struct xen_pci_frontend_ops pci_frontend_ops = {
361 .enable_msi = pci_frontend_enable_msi,
362 .disable_msi = pci_frontend_disable_msi,
363 .enable_msix = pci_frontend_enable_msix,
364 .disable_msix = pci_frontend_disable_msix,
365};
366
367static void pci_frontend_registrar(int enable)
368{
369 if (enable)
370 xen_pci_frontend = &pci_frontend_ops;
371 else
372 xen_pci_frontend = NULL;
373};
374#else
375static inline void pci_frontend_registrar(int enable) { };
376#endif /* CONFIG_PCI_MSI */
377
378/* Claim resources for the PCI frontend as-is, backend won't allow changes */
379static int pcifront_claim_resource(struct pci_dev *dev, void *data)
380{
381 struct pcifront_device *pdev = data;
382 int i;
383 struct resource *r;
384
385 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
386 r = &dev->resource[i];
387
388 if (!r->parent && r->start && r->flags) {
389 dev_info(&pdev->xdev->dev, "claiming resource %s/%d\n",
390 pci_name(dev), i);
391 if (pci_claim_resource(dev, i)) {
392 dev_err(&pdev->xdev->dev, "Could not claim "
393 "resource %s/%d! Device offline. Try "
394 "giving less than 4GB to domain.\n",
395 pci_name(dev), i);
396 }
397 }
398 }
399
400 return 0;
401}
402
403static int __devinit pcifront_scan_bus(struct pcifront_device *pdev,
404 unsigned int domain, unsigned int bus,
405 struct pci_bus *b)
406{
407 struct pci_dev *d;
408 unsigned int devfn;
409
410 /* Scan the bus for functions and add.
411 * We omit handling of PCI bridge attachment because pciback prevents
412 * bridges from being exported.
413 */
414 for (devfn = 0; devfn < 0x100; devfn++) {
415 d = pci_get_slot(b, devfn);
416 if (d) {
417 /* Device is already known. */
418 pci_dev_put(d);
419 continue;
420 }
421
422 d = pci_scan_single_device(b, devfn);
423 if (d)
424 dev_info(&pdev->xdev->dev, "New device on "
425 "%04x:%02x:%02x.%02x found.\n", domain, bus,
426 PCI_SLOT(devfn), PCI_FUNC(devfn));
427 }
428
429 return 0;
430}
431
432static int __devinit pcifront_scan_root(struct pcifront_device *pdev,
433 unsigned int domain, unsigned int bus)
434{
435 struct pci_bus *b;
436 struct pcifront_sd *sd = NULL;
437 struct pci_bus_entry *bus_entry = NULL;
438 int err = 0;
439
440#ifndef CONFIG_PCI_DOMAINS
441 if (domain != 0) {
442 dev_err(&pdev->xdev->dev,
443 "PCI Root in non-zero PCI Domain! domain=%d\n", domain);
444 dev_err(&pdev->xdev->dev,
445 "Please compile with CONFIG_PCI_DOMAINS\n");
446 err = -EINVAL;
447 goto err_out;
448 }
449#endif
450
451 dev_info(&pdev->xdev->dev, "Creating PCI Frontend Bus %04x:%02x\n",
452 domain, bus);
453
454 bus_entry = kmalloc(sizeof(*bus_entry), GFP_KERNEL);
455 sd = kmalloc(sizeof(*sd), GFP_KERNEL);
456 if (!bus_entry || !sd) {
457 err = -ENOMEM;
458 goto err_out;
459 }
460 pcifront_init_sd(sd, domain, bus, pdev);
461
462 b = pci_scan_bus_parented(&pdev->xdev->dev, bus,
463 &pcifront_bus_ops, sd);
464 if (!b) {
465 dev_err(&pdev->xdev->dev,
466 "Error creating PCI Frontend Bus!\n");
467 err = -ENOMEM;
468 goto err_out;
469 }
470
471 bus_entry->bus = b;
472
473 list_add(&bus_entry->list, &pdev->root_buses);
474
475 /* pci_scan_bus_parented skips devices which do not have a have
476 * devfn==0. The pcifront_scan_bus enumerates all devfn. */
477 err = pcifront_scan_bus(pdev, domain, bus, b);
478
479 /* Claim resources before going "live" with our devices */
480 pci_walk_bus(b, pcifront_claim_resource, pdev);
481
482 /* Create SysFS and notify udev of the devices. Aka: "going live" */
483 pci_bus_add_devices(b);
484
485 return err;
486
487err_out:
488 kfree(bus_entry);
489 kfree(sd);
490
491 return err;
492}
493
494static int __devinit pcifront_rescan_root(struct pcifront_device *pdev,
495 unsigned int domain, unsigned int bus)
496{
497 int err;
498 struct pci_bus *b;
499
500#ifndef CONFIG_PCI_DOMAINS
501 if (domain != 0) {
502 dev_err(&pdev->xdev->dev,
503 "PCI Root in non-zero PCI Domain! domain=%d\n", domain);
504 dev_err(&pdev->xdev->dev,
505 "Please compile with CONFIG_PCI_DOMAINS\n");
506 return -EINVAL;
507 }
508#endif
509
510 dev_info(&pdev->xdev->dev, "Rescanning PCI Frontend Bus %04x:%02x\n",
511 domain, bus);
512
513 b = pci_find_bus(domain, bus);
514 if (!b)
515 /* If the bus is unknown, create it. */
516 return pcifront_scan_root(pdev, domain, bus);
517
518 err = pcifront_scan_bus(pdev, domain, bus, b);
519
520 /* Claim resources before going "live" with our devices */
521 pci_walk_bus(b, pcifront_claim_resource, pdev);
522
523 /* Create SysFS and notify udev of the devices. Aka: "going live" */
524 pci_bus_add_devices(b);
525
526 return err;
527}
528
529static void free_root_bus_devs(struct pci_bus *bus)
530{
531 struct pci_dev *dev;
532
533 while (!list_empty(&bus->devices)) {
534 dev = container_of(bus->devices.next, struct pci_dev,
535 bus_list);
536 dev_dbg(&dev->dev, "removing device\n");
537 pci_remove_bus_device(dev);
538 }
539}
540
541static void pcifront_free_roots(struct pcifront_device *pdev)
542{
543 struct pci_bus_entry *bus_entry, *t;
544
545 dev_dbg(&pdev->xdev->dev, "cleaning up root buses\n");
546
547 list_for_each_entry_safe(bus_entry, t, &pdev->root_buses, list) {
548 list_del(&bus_entry->list);
549
550 free_root_bus_devs(bus_entry->bus);
551
552 kfree(bus_entry->bus->sysdata);
553
554 device_unregister(bus_entry->bus->bridge);
555 pci_remove_bus(bus_entry->bus);
556
557 kfree(bus_entry);
558 }
559}
560
561static pci_ers_result_t pcifront_common_process(int cmd,
562 struct pcifront_device *pdev,
563 pci_channel_state_t state)
564{
565 pci_ers_result_t result;
566 struct pci_driver *pdrv;
567 int bus = pdev->sh_info->aer_op.bus;
568 int devfn = pdev->sh_info->aer_op.devfn;
569 struct pci_dev *pcidev;
570 int flag = 0;
571
572 dev_dbg(&pdev->xdev->dev,
573 "pcifront AER process: cmd %x (bus:%x, devfn%x)",
574 cmd, bus, devfn);
575 result = PCI_ERS_RESULT_NONE;
576
577 pcidev = pci_get_bus_and_slot(bus, devfn);
578 if (!pcidev || !pcidev->driver) {
579 dev_err(&pcidev->dev,
580 "device or driver is NULL\n");
581 return result;
582 }
583 pdrv = pcidev->driver;
584
585 if (get_driver(&pdrv->driver)) {
586 if (pdrv->err_handler && pdrv->err_handler->error_detected) {
587 dev_dbg(&pcidev->dev,
588 "trying to call AER service\n");
589 if (pcidev) {
590 flag = 1;
591 switch (cmd) {
592 case XEN_PCI_OP_aer_detected:
593 result = pdrv->err_handler->
594 error_detected(pcidev, state);
595 break;
596 case XEN_PCI_OP_aer_mmio:
597 result = pdrv->err_handler->
598 mmio_enabled(pcidev);
599 break;
600 case XEN_PCI_OP_aer_slotreset:
601 result = pdrv->err_handler->
602 slot_reset(pcidev);
603 break;
604 case XEN_PCI_OP_aer_resume:
605 pdrv->err_handler->resume(pcidev);
606 break;
607 default:
608 dev_err(&pdev->xdev->dev,
609 "bad request in aer recovery "
610 "operation!\n");
611
612 }
613 }
614 }
615 put_driver(&pdrv->driver);
616 }
617 if (!flag)
618 result = PCI_ERS_RESULT_NONE;
619
620 return result;
621}
622
623
624static void pcifront_do_aer(struct work_struct *data)
625{
626 struct pcifront_device *pdev =
627 container_of(data, struct pcifront_device, op_work);
628 int cmd = pdev->sh_info->aer_op.cmd;
629 pci_channel_state_t state =
630 (pci_channel_state_t)pdev->sh_info->aer_op.err;
631
632 /*If a pci_conf op is in progress,
633 we have to wait until it is done before service aer op*/
634 dev_dbg(&pdev->xdev->dev,
635 "pcifront service aer bus %x devfn %x\n",
636 pdev->sh_info->aer_op.bus, pdev->sh_info->aer_op.devfn);
637
638 pdev->sh_info->aer_op.err = pcifront_common_process(cmd, pdev, state);
639
640 /* Post the operation to the guest. */
641 wmb();
642 clear_bit(_XEN_PCIB_active, (unsigned long *)&pdev->sh_info->flags);
643 notify_remote_via_evtchn(pdev->evtchn);
644
645 /*in case of we lost an aer request in four lines time_window*/
646 smp_mb__before_clear_bit();
647 clear_bit(_PDEVB_op_active, &pdev->flags);
648 smp_mb__after_clear_bit();
649
650 schedule_pcifront_aer_op(pdev);
651
652}
653
654static irqreturn_t pcifront_handler_aer(int irq, void *dev)
655{
656 struct pcifront_device *pdev = dev;
657 schedule_pcifront_aer_op(pdev);
658 return IRQ_HANDLED;
659}
660static int pcifront_connect(struct pcifront_device *pdev)
661{
662 int err = 0;
663
664 spin_lock(&pcifront_dev_lock);
665
666 if (!pcifront_dev) {
667 dev_info(&pdev->xdev->dev, "Installing PCI frontend\n");
668 pcifront_dev = pdev;
669 } else {
670 dev_err(&pdev->xdev->dev, "PCI frontend already installed!\n");
671 err = -EEXIST;
672 }
673
674 spin_unlock(&pcifront_dev_lock);
675
676 return err;
677}
678
679static void pcifront_disconnect(struct pcifront_device *pdev)
680{
681 spin_lock(&pcifront_dev_lock);
682
683 if (pdev == pcifront_dev) {
684 dev_info(&pdev->xdev->dev,
685 "Disconnecting PCI Frontend Buses\n");
686 pcifront_dev = NULL;
687 }
688
689 spin_unlock(&pcifront_dev_lock);
690}
691static struct pcifront_device *alloc_pdev(struct xenbus_device *xdev)
692{
693 struct pcifront_device *pdev;
694
695 pdev = kzalloc(sizeof(struct pcifront_device), GFP_KERNEL);
696 if (pdev == NULL)
697 goto out;
698
699 pdev->sh_info =
700 (struct xen_pci_sharedinfo *)__get_free_page(GFP_KERNEL);
701 if (pdev->sh_info == NULL) {
702 kfree(pdev);
703 pdev = NULL;
704 goto out;
705 }
706 pdev->sh_info->flags = 0;
707
708 /*Flag for registering PV AER handler*/
709 set_bit(_XEN_PCIB_AERHANDLER, (void *)&pdev->sh_info->flags);
710
711 dev_set_drvdata(&xdev->dev, pdev);
712 pdev->xdev = xdev;
713
714 INIT_LIST_HEAD(&pdev->root_buses);
715
716 spin_lock_init(&pdev->sh_info_lock);
717
718 pdev->evtchn = INVALID_EVTCHN;
719 pdev->gnt_ref = INVALID_GRANT_REF;
720 pdev->irq = -1;
721
722 INIT_WORK(&pdev->op_work, pcifront_do_aer);
723
724 dev_dbg(&xdev->dev, "Allocated pdev @ 0x%p pdev->sh_info @ 0x%p\n",
725 pdev, pdev->sh_info);
726out:
727 return pdev;
728}
729
730static void free_pdev(struct pcifront_device *pdev)
731{
732 dev_dbg(&pdev->xdev->dev, "freeing pdev @ 0x%p\n", pdev);
733
734 pcifront_free_roots(pdev);
735
736 /*For PCIE_AER error handling job*/
737 flush_scheduled_work();
738
739 if (pdev->irq >= 0)
740 unbind_from_irqhandler(pdev->irq, pdev);
741
742 if (pdev->evtchn != INVALID_EVTCHN)
743 xenbus_free_evtchn(pdev->xdev, pdev->evtchn);
744
745 if (pdev->gnt_ref != INVALID_GRANT_REF)
746 gnttab_end_foreign_access(pdev->gnt_ref, 0 /* r/w page */,
747 (unsigned long)pdev->sh_info);
748 else
749 free_page((unsigned long)pdev->sh_info);
750
751 dev_set_drvdata(&pdev->xdev->dev, NULL);
752
753 kfree(pdev);
754}
755
756static int pcifront_publish_info(struct pcifront_device *pdev)
757{
758 int err = 0;
759 struct xenbus_transaction trans;
760
761 err = xenbus_grant_ring(pdev->xdev, virt_to_mfn(pdev->sh_info));
762 if (err < 0)
763 goto out;
764
765 pdev->gnt_ref = err;
766
767 err = xenbus_alloc_evtchn(pdev->xdev, &pdev->evtchn);
768 if (err)
769 goto out;
770
771 err = bind_evtchn_to_irqhandler(pdev->evtchn, pcifront_handler_aer,
772 0, "pcifront", pdev);
773
774 if (err < 0)
775 return err;
776
777 pdev->irq = err;
778
779do_publish:
780 err = xenbus_transaction_start(&trans);
781 if (err) {
782 xenbus_dev_fatal(pdev->xdev, err,
783 "Error writing configuration for backend "
784 "(start transaction)");
785 goto out;
786 }
787
788 err = xenbus_printf(trans, pdev->xdev->nodename,
789 "pci-op-ref", "%u", pdev->gnt_ref);
790 if (!err)
791 err = xenbus_printf(trans, pdev->xdev->nodename,
792 "event-channel", "%u", pdev->evtchn);
793 if (!err)
794 err = xenbus_printf(trans, pdev->xdev->nodename,
795 "magic", XEN_PCI_MAGIC);
796
797 if (err) {
798 xenbus_transaction_end(trans, 1);
799 xenbus_dev_fatal(pdev->xdev, err,
800 "Error writing configuration for backend");
801 goto out;
802 } else {
803 err = xenbus_transaction_end(trans, 0);
804 if (err == -EAGAIN)
805 goto do_publish;
806 else if (err) {
807 xenbus_dev_fatal(pdev->xdev, err,
808 "Error completing transaction "
809 "for backend");
810 goto out;
811 }
812 }
813
814 xenbus_switch_state(pdev->xdev, XenbusStateInitialised);
815
816 dev_dbg(&pdev->xdev->dev, "publishing successful!\n");
817
818out:
819 return err;
820}
821
822static int __devinit pcifront_try_connect(struct pcifront_device *pdev)
823{
824 int err = -EFAULT;
825 int i, num_roots, len;
826 char str[64];
827 unsigned int domain, bus;
828
829
830 /* Only connect once */
831 if (xenbus_read_driver_state(pdev->xdev->nodename) !=
832 XenbusStateInitialised)
833 goto out;
834
835 err = pcifront_connect(pdev);
836 if (err) {
837 xenbus_dev_fatal(pdev->xdev, err,
838 "Error connecting PCI Frontend");
839 goto out;
840 }
841
842 err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend,
843 "root_num", "%d", &num_roots);
844 if (err == -ENOENT) {
845 xenbus_dev_error(pdev->xdev, err,
846 "No PCI Roots found, trying 0000:00");
847 err = pcifront_scan_root(pdev, 0, 0);
848 num_roots = 0;
849 } else if (err != 1) {
850 if (err == 0)
851 err = -EINVAL;
852 xenbus_dev_fatal(pdev->xdev, err,
853 "Error reading number of PCI roots");
854 goto out;
855 }
856
857 for (i = 0; i < num_roots; i++) {
858 len = snprintf(str, sizeof(str), "root-%d", i);
859 if (unlikely(len >= (sizeof(str) - 1))) {
860 err = -ENOMEM;
861 goto out;
862 }
863
864 err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend, str,
865 "%x:%x", &domain, &bus);
866 if (err != 2) {
867 if (err >= 0)
868 err = -EINVAL;
869 xenbus_dev_fatal(pdev->xdev, err,
870 "Error reading PCI root %d", i);
871 goto out;
872 }
873
874 err = pcifront_scan_root(pdev, domain, bus);
875 if (err) {
876 xenbus_dev_fatal(pdev->xdev, err,
877 "Error scanning PCI root %04x:%02x",
878 domain, bus);
879 goto out;
880 }
881 }
882
883 err = xenbus_switch_state(pdev->xdev, XenbusStateConnected);
884
885out:
886 return err;
887}
888
889static int pcifront_try_disconnect(struct pcifront_device *pdev)
890{
891 int err = 0;
892 enum xenbus_state prev_state;
893
894
895 prev_state = xenbus_read_driver_state(pdev->xdev->nodename);
896
897 if (prev_state >= XenbusStateClosing)
898 goto out;
899
900 if (prev_state == XenbusStateConnected) {
901 pcifront_free_roots(pdev);
902 pcifront_disconnect(pdev);
903 }
904
905 err = xenbus_switch_state(pdev->xdev, XenbusStateClosed);
906
907out:
908
909 return err;
910}
911
912static int __devinit pcifront_attach_devices(struct pcifront_device *pdev)
913{
914 int err = -EFAULT;
915 int i, num_roots, len;
916 unsigned int domain, bus;
917 char str[64];
918
919 if (xenbus_read_driver_state(pdev->xdev->nodename) !=
920 XenbusStateReconfiguring)
921 goto out;
922
923 err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend,
924 "root_num", "%d", &num_roots);
925 if (err == -ENOENT) {
926 xenbus_dev_error(pdev->xdev, err,
927 "No PCI Roots found, trying 0000:00");
928 err = pcifront_rescan_root(pdev, 0, 0);
929 num_roots = 0;
930 } else if (err != 1) {
931 if (err == 0)
932 err = -EINVAL;
933 xenbus_dev_fatal(pdev->xdev, err,
934 "Error reading number of PCI roots");
935 goto out;
936 }
937
938 for (i = 0; i < num_roots; i++) {
939 len = snprintf(str, sizeof(str), "root-%d", i);
940 if (unlikely(len >= (sizeof(str) - 1))) {
941 err = -ENOMEM;
942 goto out;
943 }
944
945 err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend, str,
946 "%x:%x", &domain, &bus);
947 if (err != 2) {
948 if (err >= 0)
949 err = -EINVAL;
950 xenbus_dev_fatal(pdev->xdev, err,
951 "Error reading PCI root %d", i);
952 goto out;
953 }
954
955 err = pcifront_rescan_root(pdev, domain, bus);
956 if (err) {
957 xenbus_dev_fatal(pdev->xdev, err,
958 "Error scanning PCI root %04x:%02x",
959 domain, bus);
960 goto out;
961 }
962 }
963
964 xenbus_switch_state(pdev->xdev, XenbusStateConnected);
965
966out:
967 return err;
968}
969
970static int pcifront_detach_devices(struct pcifront_device *pdev)
971{
972 int err = 0;
973 int i, num_devs;
974 unsigned int domain, bus, slot, func;
975 struct pci_bus *pci_bus;
976 struct pci_dev *pci_dev;
977 char str[64];
978
979 if (xenbus_read_driver_state(pdev->xdev->nodename) !=
980 XenbusStateConnected)
981 goto out;
982
983 err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend, "num_devs", "%d",
984 &num_devs);
985 if (err != 1) {
986 if (err >= 0)
987 err = -EINVAL;
988 xenbus_dev_fatal(pdev->xdev, err,
989 "Error reading number of PCI devices");
990 goto out;
991 }
992
993 /* Find devices being detached and remove them. */
994 for (i = 0; i < num_devs; i++) {
995 int l, state;
996 l = snprintf(str, sizeof(str), "state-%d", i);
997 if (unlikely(l >= (sizeof(str) - 1))) {
998 err = -ENOMEM;
999 goto out;
1000 }
1001 err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend, str, "%d",
1002 &state);
1003 if (err != 1)
1004 state = XenbusStateUnknown;
1005
1006 if (state != XenbusStateClosing)
1007 continue;
1008
1009 /* Remove device. */
1010 l = snprintf(str, sizeof(str), "vdev-%d", i);
1011 if (unlikely(l >= (sizeof(str) - 1))) {
1012 err = -ENOMEM;
1013 goto out;
1014 }
1015 err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend, str,
1016 "%x:%x:%x.%x", &domain, &bus, &slot, &func);
1017 if (err != 4) {
1018 if (err >= 0)
1019 err = -EINVAL;
1020 xenbus_dev_fatal(pdev->xdev, err,
1021 "Error reading PCI device %d", i);
1022 goto out;
1023 }
1024
1025 pci_bus = pci_find_bus(domain, bus);
1026 if (!pci_bus) {
1027 dev_dbg(&pdev->xdev->dev, "Cannot get bus %04x:%02x\n",
1028 domain, bus);
1029 continue;
1030 }
1031 pci_dev = pci_get_slot(pci_bus, PCI_DEVFN(slot, func));
1032 if (!pci_dev) {
1033 dev_dbg(&pdev->xdev->dev,
1034 "Cannot get PCI device %04x:%02x:%02x.%02x\n",
1035 domain, bus, slot, func);
1036 continue;
1037 }
1038 pci_remove_bus_device(pci_dev);
1039 pci_dev_put(pci_dev);
1040
1041 dev_dbg(&pdev->xdev->dev,
1042 "PCI device %04x:%02x:%02x.%02x removed.\n",
1043 domain, bus, slot, func);
1044 }
1045
1046 err = xenbus_switch_state(pdev->xdev, XenbusStateReconfiguring);
1047
1048out:
1049 return err;
1050}
1051
1052static void __init_refok pcifront_backend_changed(struct xenbus_device *xdev,
1053 enum xenbus_state be_state)
1054{
1055 struct pcifront_device *pdev = dev_get_drvdata(&xdev->dev);
1056
1057 switch (be_state) {
1058 case XenbusStateUnknown:
1059 case XenbusStateInitialising:
1060 case XenbusStateInitWait:
1061 case XenbusStateInitialised:
1062 case XenbusStateClosed:
1063 break;
1064
1065 case XenbusStateConnected:
1066 pcifront_try_connect(pdev);
1067 break;
1068
1069 case XenbusStateClosing:
1070 dev_warn(&xdev->dev, "backend going away!\n");
1071 pcifront_try_disconnect(pdev);
1072 break;
1073
1074 case XenbusStateReconfiguring:
1075 pcifront_detach_devices(pdev);
1076 break;
1077
1078 case XenbusStateReconfigured:
1079 pcifront_attach_devices(pdev);
1080 break;
1081 }
1082}
1083
1084static int pcifront_xenbus_probe(struct xenbus_device *xdev,
1085 const struct xenbus_device_id *id)
1086{
1087 int err = 0;
1088 struct pcifront_device *pdev = alloc_pdev(xdev);
1089
1090 if (pdev == NULL) {
1091 err = -ENOMEM;
1092 xenbus_dev_fatal(xdev, err,
1093 "Error allocating pcifront_device struct");
1094 goto out;
1095 }
1096
1097 err = pcifront_publish_info(pdev);
1098 if (err)
1099 free_pdev(pdev);
1100
1101out:
1102 return err;
1103}
1104
1105static int pcifront_xenbus_remove(struct xenbus_device *xdev)
1106{
1107 struct pcifront_device *pdev = dev_get_drvdata(&xdev->dev);
1108 if (pdev)
1109 free_pdev(pdev);
1110
1111 return 0;
1112}
1113
1114static const struct xenbus_device_id xenpci_ids[] = {
1115 {"pci"},
1116 {""},
1117};
1118
1119static struct xenbus_driver xenbus_pcifront_driver = {
1120 .name = "pcifront",
1121 .owner = THIS_MODULE,
1122 .ids = xenpci_ids,
1123 .probe = pcifront_xenbus_probe,
1124 .remove = pcifront_xenbus_remove,
1125 .otherend_changed = pcifront_backend_changed,
1126};
1127
1128static int __init pcifront_init(void)
1129{
1130 if (!xen_pv_domain() || xen_initial_domain())
1131 return -ENODEV;
1132
1133 pci_frontend_registrar(1 /* enable */);
1134
1135 return xenbus_register_frontend(&xenbus_pcifront_driver);
1136}
1137
1138static void __exit pcifront_cleanup(void)
1139{
1140 xenbus_unregister_driver(&xenbus_pcifront_driver);
1141 pci_frontend_registrar(0 /* disable */);
1142}
1143module_init(pcifront_init);
1144module_exit(pcifront_cleanup);
1145
1146MODULE_DESCRIPTION("Xen PCI passthrough frontend.");
1147MODULE_LICENSE("GPL");
1148MODULE_ALIAS("xen:pci");
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-06 00:25:58 -0500