20 files changed, 254 insertions, 207 deletions

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 3cfb0a3575e6..f1dd81a1d592 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -19,7 +19,7 @@ config PCI_MSI
 
 config PCI_MULTITHREAD_PROBE
         bool "PCI Multi-threaded probe (EXPERIMENTAL)"
-        depends on PCI && EXPERIMENTAL && BROKEN
+        depends on PCI && EXPERIMENTAL
         help
           Say Y here if you want the PCI core to spawn a new thread for
           every PCI device that is probed.  This can cause a huge
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index ea16805a153c..73a58c73d526 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -1,6 +1,7 @@
 #include <linux/pci.h>
 #include <linux/module.h>
 #include <linux/ioport.h>
+#include <linux/wait.h>
 
 #include "pci.h"
 
@@ -63,30 +64,42 @@ EXPORT_SYMBOL(pci_bus_write_config_byte);
 EXPORT_SYMBOL(pci_bus_write_config_word);
 EXPORT_SYMBOL(pci_bus_write_config_dword);
 
-static u32 pci_user_cached_config(struct pci_dev *dev, int pos)
-{
-        u32 data;
+/*
+ * The following routines are to prevent the user from accessing PCI config
+ * space when it's unsafe to do so.  Some devices require this during BIST and
+ * we're required to prevent it during D-state transitions.
+ *
+ * We have a bit per device to indicate it's blocked and a global wait queue
+ * for callers to sleep on until devices are unblocked.
+ */
+static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait);
 
-        data = dev->saved_config_space[pos/sizeof(dev->saved_config_space[0])];
-        data >>= (pos % sizeof(dev->saved_config_space[0])) * 8;
-        return data;
+static noinline void pci_wait_ucfg(struct pci_dev *dev)
+{
+        DECLARE_WAITQUEUE(wait, current);
+
+        __add_wait_queue(&pci_ucfg_wait, &wait);
+        do {
+                set_current_state(TASK_UNINTERRUPTIBLE);
+                spin_unlock_irq(&pci_lock);
+                schedule();
+                spin_lock_irq(&pci_lock);
+        } while (dev->block_ucfg_access);
+        __remove_wait_queue(&pci_ucfg_wait, &wait);
 }
 
 #define PCI_USER_READ_CONFIG(size,type)                                 \
 int pci_user_read_config_##size                                         \
         (struct pci_dev *dev, int pos, type *val)                       \
 {                                                                       \
-        unsigned long flags;                                            \
         int ret = 0;                                                    \
         u32 data = -1;                                                  \
         if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
-        spin_lock_irqsave(&pci_lock, flags);                            \
-        if (likely(!dev->block_ucfg_access))                            \
-                ret = dev->bus->ops->read(dev->bus, dev->devfn,         \
+        spin_lock_irq(&pci_lock);                                       \
+        if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev);       \
+        ret = dev->bus->ops->read(dev->bus, dev->devfn,                 \
                                         pos, sizeof(type), &data);      \
-        else if (pos < sizeof(dev->saved_config_space))                 \
-                data = pci_user_cached_config(dev, pos);                \
-        spin_unlock_irqrestore(&pci_lock, flags);                       \
+        spin_unlock_irq(&pci_lock);                                     \
         *val = (type)data;                                              \
         return ret;                                                     \
 }
@@ -95,14 +108,13 @@ int pci_user_read_config_##size						\
 int pci_user_write_config_##size                                        \
         (struct pci_dev *dev, int pos, type val)                        \
 {                                                                       \
-        unsigned long flags;                                            \
         int ret = -EIO;                                                 \
         if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
-        spin_lock_irqsave(&pci_lock, flags);                            \
-        if (likely(!dev->block_ucfg_access))                            \
-                ret = dev->bus->ops->write(dev->bus, dev->devfn,        \
+        spin_lock_irq(&pci_lock);                                       \
+        if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev);       \
+        ret = dev->bus->ops->write(dev->bus, dev->devfn,                \
                                         pos, sizeof(type), val);        \
-        spin_unlock_irqrestore(&pci_lock, flags);                       \
+        spin_unlock_irq(&pci_lock);                                     \
         return ret;                                                     \
 }
 
@@ -117,21 +129,23 @@ PCI_USER_WRITE_CONFIG(dword, u32)
  * pci_block_user_cfg_access - Block userspace PCI config reads/writes
  * @dev:        pci device struct
  *
- * This function blocks any userspace PCI config accesses from occurring.
- * When blocked, any writes will be bit bucketed and reads will return the
- * data saved using pci_save_state for the first 64 bytes of config
- * space and return 0xff for all other config reads.
- **/
+ * When user access is blocked, any reads or writes to config space will
+ * sleep until access is unblocked again.  We don't allow nesting of
+ * block/unblock calls.
+ */
 void pci_block_user_cfg_access(struct pci_dev *dev)
 {
         unsigned long flags;
+        int was_blocked;
 
-        pci_save_state(dev);
-
-        /* spinlock to synchronize with anyone reading config space now */
         spin_lock_irqsave(&pci_lock, flags);
+        was_blocked = dev->block_ucfg_access;
         dev->block_ucfg_access = 1;
         spin_unlock_irqrestore(&pci_lock, flags);
+
+        /* If we BUG() inside the pci_lock, we're guaranteed to hose
+         * the machine */
+        BUG_ON(was_blocked);
 }
 EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
 
@@ -140,14 +154,19 @@ EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
  * @dev:        pci device struct
  *
  * This function allows userspace PCI config accesses to resume.
- **/
+ */
 void pci_unblock_user_cfg_access(struct pci_dev *dev)
 {
         unsigned long flags;
 
-        /* spinlock to synchronize with anyone reading saved config space */
         spin_lock_irqsave(&pci_lock, flags);
+
+        /* This indicates a problem in the caller, but we don't need
+         * to kill them, unlike a double-block above. */
+        WARN_ON(!dev->block_ucfg_access);
+
         dev->block_ucfg_access = 0;
+        wake_up_all(&pci_ucfg_wait);
         spin_unlock_irqrestore(&pci_lock, flags);
 }
 EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);
diff --git a/drivers/pci/hotplug/acpiphp.h b/drivers/pci/hotplug/acpiphp.h
index 59c5b242d86d..ddbadd95387e 100644
--- a/drivers/pci/hotplug/acpiphp.h
+++ b/drivers/pci/hotplug/acpiphp.h
@@ -62,10 +62,10 @@ struct acpiphp_slot;
 struct slot {
         struct hotplug_slot     *hotplug_slot;
         struct acpiphp_slot     *acpi_slot;
+        struct hotplug_slot_info info;
+        char name[SLOT_NAME_SIZE];
 };
 
-
-
 /**
  * struct acpiphp_bridge - PCI bridge information
  *
diff --git a/drivers/pci/hotplug/acpiphp_core.c b/drivers/pci/hotplug/acpiphp_core.c
index c57d9d5ce84e..40c79b03c7ef 100644
--- a/drivers/pci/hotplug/acpiphp_core.c
+++ b/drivers/pci/hotplug/acpiphp_core.c
@@ -303,25 +303,15 @@ static int __init init_acpi(void)
         /* read initial number of slots */
         if (!retval) {
                 num_slots = acpiphp_get_num_slots();
-                if (num_slots == 0)
+                if (num_slots == 0) {
+                        acpiphp_glue_exit();
                         retval = -ENODEV;
+                }
         }
 
         return retval;
 }
 
-
-/**
- * make_slot_name - make a slot name that appears in pcihpfs
- * @slot: slot to name
- *
- */
-static void make_slot_name(struct slot *slot)
-{
-        snprintf(slot->hotplug_slot->name, SLOT_NAME_SIZE, "%u",
-                 slot->acpi_slot->sun);
-}
-
 /**
  * release_slot - free up the memory used by a slot
  * @hotplug_slot: slot to free
@@ -332,8 +322,6 @@ static void release_slot(struct hotplug_slot *hotplug_slot)
 
         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 
-        kfree(slot->hotplug_slot->info);
-        kfree(slot->hotplug_slot->name);
         kfree(slot->hotplug_slot);
         kfree(slot);
 }
@@ -342,26 +330,19 @@ static void release_slot(struct hotplug_slot *hotplug_slot)
 int acpiphp_register_hotplug_slot(struct acpiphp_slot *acpiphp_slot)
 {
         struct slot *slot;
-        struct hotplug_slot *hotplug_slot;
-        struct hotplug_slot_info *hotplug_slot_info;
         int retval = -ENOMEM;
 
         slot = kzalloc(sizeof(*slot), GFP_KERNEL);
         if (!slot)
                 goto error;
 
-        slot->hotplug_slot = kzalloc(sizeof(*hotplug_slot), GFP_KERNEL);
+        slot->hotplug_slot = kzalloc(sizeof(*slot->hotplug_slot), GFP_KERNEL);
         if (!slot->hotplug_slot)
                 goto error_slot;
 
-        slot->hotplug_slot->info = kzalloc(sizeof(*hotplug_slot_info),
-                                           GFP_KERNEL);
-        if (!slot->hotplug_slot->info)
-                goto error_hpslot;
+        slot->hotplug_slot->info = &slot->info;
 
-        slot->hotplug_slot->name = kzalloc(SLOT_NAME_SIZE, GFP_KERNEL);
-        if (!slot->hotplug_slot->name)
-                goto error_info;
+        slot->hotplug_slot->name = slot->name;
 
         slot->hotplug_slot->private = slot;
         slot->hotplug_slot->release = &release_slot;
@@ -376,21 +357,17 @@ int acpiphp_register_hotplug_slot(struct acpiphp_slot *acpiphp_slot)
         slot->hotplug_slot->info->cur_bus_speed = PCI_SPEED_UNKNOWN;
 
         acpiphp_slot->slot = slot;
-        make_slot_name(slot);
+        snprintf(slot->name, sizeof(slot->name), "%u", slot->acpi_slot->sun);
 
         retval = pci_hp_register(slot->hotplug_slot);
         if (retval) {
                 err("pci_hp_register failed with error %d\n", retval);
-                goto error_name;
+                goto error_hpslot;
         }
 
         info("Slot [%s] registered\n", slot->hotplug_slot->name);
 
         return 0;
-error_name:
-        kfree(slot->hotplug_slot->name);
-error_info:
-        kfree(slot->hotplug_slot->info);
 error_hpslot:
         kfree(slot->hotplug_slot);
 error_slot:
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index 16167b016266..0b9d0db1590a 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -1693,14 +1693,10 @@ void __exit acpiphp_glue_exit(void)
  */
 int __init acpiphp_get_num_slots(void)
 {
-        struct list_head *node;
         struct acpiphp_bridge *bridge;
-        int num_slots;
-
-        num_slots = 0;
+        int num_slots = 0;
 
-        list_for_each (node, &bridge_list) {
-                bridge = (struct acpiphp_bridge *)node;
+        list_for_each_entry (bridge, &bridge_list, list) {
                 dbg("Bus %04x:%02x has %d slot%s\n",
                                 pci_domain_nr(bridge->pci_bus),
                                 bridge->pci_bus->number, bridge->nr_slots,
diff --git a/drivers/pci/hotplug/ibmphp_pci.c b/drivers/pci/hotplug/ibmphp_pci.c
index d87a9e3eaeeb..d8f05d7a3c72 100644
--- a/drivers/pci/hotplug/ibmphp_pci.c
+++ b/drivers/pci/hotplug/ibmphp_pci.c
@@ -1371,12 +1371,12 @@ static int unconfigure_boot_bridge (u8 busno, u8 device, u8 function)
         }
 
         bus = ibmphp_find_res_bus (sec_number);
-        debug ("bus->busno is %x\n", bus->busno);
-        debug ("sec_number is %x\n", sec_number);
         if (!bus) {
                 err ("cannot find Bus structure for the bridged device\n");
                 return -EINVAL;
         }
+        debug("bus->busno is %x\n", bus->busno);
+        debug("sec_number is %x\n", sec_number);
 
         ibmphp_remove_bus (bus, busno);
 
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index f93e81e2d2c7..f13f31323e85 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -521,14 +521,9 @@ static void __exit unload_pciehpd(void)
 
 }
 
-static int hpdriver_context = 0;
-
 static void pciehp_remove (struct pcie_device *device)
 {
-        printk("%s ENTRY\n", __FUNCTION__);     
-        printk("%s -> Call free_irq for irq = %d\n",  
-                __FUNCTION__, device->irq);
-        free_irq(device->irq, &hpdriver_context);
+        /* XXX - Needs to be adapted to device driver model */
 }
 
 #ifdef CONFIG_PM
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 1c551c697c35..6d3f580f2666 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -718,8 +718,6 @@ static void hpc_release_ctlr(struct controller *ctrl)
                 if (php_ctlr->irq) {
                         free_irq(php_ctlr->irq, ctrl);
                         php_ctlr->irq = 0;
-                        if (!pcie_mch_quirk) 
-                                pci_disable_msi(php_ctlr->pci_dev);
                 }
         }
         if (php_ctlr->pci_dev) 
diff --git a/drivers/pci/hotplug/rpadlpar_core.c b/drivers/pci/hotplug/rpadlpar_core.c
index 46825fee3ae4..72383467a0d5 100644
--- a/drivers/pci/hotplug/rpadlpar_core.c
+++ b/drivers/pci/hotplug/rpadlpar_core.c
@@ -63,7 +63,7 @@ static struct device_node *find_php_slot_pci_node(char *drc_name,
         char *type;
         int rc;
 
-        while ((np = of_find_node_by_type(np, "pci"))) {
+        while ((np = of_find_node_by_name(np, "pci"))) {
                 rc = rpaphp_get_drc_props(np, NULL, &name, &type, NULL);
                 if (rc == 0)
                         if (!strcmp(drc_name, name) && !strcmp(drc_type, type))
diff --git a/drivers/pci/hotplug/rpaphp_core.c b/drivers/pci/hotplug/rpaphp_core.c
index 141486df235b..71a2cb8baa4a 100644
--- a/drivers/pci/hotplug/rpaphp_core.c
+++ b/drivers/pci/hotplug/rpaphp_core.c
@@ -356,7 +356,7 @@ static int __init rpaphp_init(void)
         info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
         init_MUTEX(&rpaphp_sem);
 
-        while ((dn = of_find_node_by_type(dn, "pci")))
+        while ((dn = of_find_node_by_name(dn, "pci")))
                 rpaphp_add_slot(dn);
 
         return 0;
diff --git a/drivers/pci/hotplug/sgi_hotplug.c b/drivers/pci/hotplug/sgi_hotplug.c
index b62ad31a9739..5d188c558386 100644
--- a/drivers/pci/hotplug/sgi_hotplug.c
+++ b/drivers/pci/hotplug/sgi_hotplug.c
@@ -205,21 +205,6 @@ static struct hotplug_slot * sn_hp_destroy(void)
         return bss_hotplug_slot;
 }
 
-static void sn_bus_alloc_data(struct pci_dev *dev)
-{
-        struct pci_bus *subordinate_bus;
-        struct pci_dev *child;
-
-        sn_pci_fixup_slot(dev);
-
-        /* Recursively sets up the sn_irq_info structs */
-        if (dev->subordinate) {
-                subordinate_bus = dev->subordinate;
-                list_for_each_entry(child, &subordinate_bus->devices, bus_list)
-                        sn_bus_alloc_data(child);
-        }
-}
-
 static void sn_bus_free_data(struct pci_dev *dev)
 {
         struct pci_bus *subordinate_bus;
@@ -337,6 +322,11 @@ static int sn_slot_disable(struct hotplug_slot *bss_hotplug_slot,
         return rc;
 }
 
+/*
+ * Power up and configure the slot via a SAL call to PROM.
+ * Scan slot (and any children), do any platform specific fixup,
+ * and find device driver.
+ */
 static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
 {
         struct slot *slot = bss_hotplug_slot->private;
@@ -345,6 +335,7 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
         int func, num_funcs;
         int new_ppb = 0;
         int rc;
+        void pcibios_fixup_device_resources(struct pci_dev *);
 
         /* Serialize the Linux PCI infrastructure */
         mutex_lock(&sn_hotplug_mutex);
@@ -367,9 +358,6 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
                 return -ENODEV;
         }
 
-        sn_pci_controller_fixup(pci_domain_nr(slot->pci_bus),
-                                slot->pci_bus->number,
-                                slot->pci_bus);
         /*
          * Map SN resources for all functions on the card
          * to the Linux PCI interface and tell the drivers
@@ -380,6 +368,13 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
                                    PCI_DEVFN(slot->device_num + 1,
                                              PCI_FUNC(func)));
                 if (dev) {
+                        /* Need to do slot fixup on PPB before fixup of children
+                         * (PPB's pcidev_info needs to be in pcidev_info list
+                         * before child's SN_PCIDEV_INFO() call to setup
+                         * pdi_host_pcidev_info).
+                         */
+                        pcibios_fixup_device_resources(dev);
+                        sn_pci_fixup_slot(dev);
                         if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
                                 unsigned char sec_bus;
                                 pci_read_config_byte(dev, PCI_SECONDARY_BUS,
@@ -387,12 +382,8 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
                                 new_bus = pci_add_new_bus(dev->bus, dev,
                                                           sec_bus);
                                 pci_scan_child_bus(new_bus);
-                                sn_pci_controller_fixup(pci_domain_nr(new_bus),
-                                                        new_bus->number,
-                                                        new_bus);
                                 new_ppb = 1;
                         }
-                        sn_bus_alloc_data(dev);
                         pci_dev_put(dev);
                 }
         }
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index f0cca1772f9c..3898f5237144 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -6,14 +6,6 @@
 #ifndef MSI_H
 #define MSI_H
 
-/*
- * MSI-X Address Register
- */
-#define PCI_MSIX_FLAGS_QSIZE            0x7FF
-#define PCI_MSIX_FLAGS_ENABLE           (1 << 15)
-#define PCI_MSIX_FLAGS_BIRMASK          (7 << 0)
-#define PCI_MSIX_FLAGS_BITMASK          (1 << 0)
-
 #define PCI_MSIX_ENTRY_SIZE                     16
 #define  PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET       0
 #define  PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET       4
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index bb7456c1dbac..a064f36a0805 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -36,6 +36,7 @@ acpi_query_osc (
         struct acpi_buffer      output = {ACPI_ALLOCATE_BUFFER, NULL};
         union acpi_object       *out_obj;
         u32                     osc_dw0;
+        acpi_status *ret_status = (acpi_status *)retval;
 
         
         /* Setting up input parameters */
@@ -56,6 +57,7 @@ acpi_query_osc (
         if (ACPI_FAILURE (status)) {
                 printk(KERN_DEBUG  
                         "Evaluate _OSC Set fails. Status = 0x%04x\n", status);
+                *ret_status = status;
                 return status;
         }
         out_obj = output.pointer;
@@ -90,6 +92,7 @@ acpi_query_osc (
 
 query_osc_out:
         kfree(output.pointer);
+        *ret_status = status;
         return status;
 }
 
@@ -166,6 +169,7 @@ run_osc_out:
 acpi_status pci_osc_support_set(u32 flags)
 {
         u32 temp;
+        acpi_status retval;
 
         if (!(flags & OSC_SUPPORT_MASKS)) {
                 return AE_TYPE;
@@ -179,9 +183,13 @@ acpi_status pci_osc_support_set(u32 flags)
         acpi_get_devices ( PCI_ROOT_HID_STRING,
                         acpi_query_osc,
                         ctrlset_buf,
-                        NULL );
+                        (void **) &retval );
         ctrlset_buf[OSC_QUERY_TYPE] = !OSC_QUERY_ENABLE;
         ctrlset_buf[OSC_CONTROL_TYPE] = temp;
+        if (ACPI_FAILURE(retval)) {
+                /* no osc support at all */
+                ctrlset_buf[OSC_SUPPORT_TYPE] = 0;
+        }
         return AE_OK;
 }
 EXPORT_SYMBOL(pci_osc_support_set);
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 194f1d21d3d7..e5ae3a0c13bb 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -329,8 +329,8 @@ static int pci_default_resume(struct pci_dev *pci_dev)
         /* restore the PCI config space */
         pci_restore_state(pci_dev);
         /* if the device was enabled before suspend, reenable */
-        if (pci_dev->is_enabled)
-                retval = pci_enable_device(pci_dev);
+        if (atomic_read(&pci_dev->enable_cnt))
+                retval = __pci_enable_device(pci_dev);
         /* if the device was busmaster before the suspend, make it busmaster again */
         if (pci_dev->is_busmaster)
                 pci_set_master(pci_dev);
@@ -445,9 +445,12 @@ int __pci_register_driver(struct pci_driver *drv, struct module *owner)
 
         /* register with core */
         error = driver_register(&drv->driver);
+        if (error)
+                return error;
 
-        if (!error)
-                error = pci_create_newid_file(drv);
+        error = pci_create_newid_file(drv);
+        if (error)
+                driver_unregister(&drv->driver);
 
         return error;
 }
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index f952bfea48a6..7a94076752d0 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -42,7 +42,6 @@ pci_config_attr(subsystem_vendor, "0x%04x\n");
 pci_config_attr(subsystem_device, "0x%04x\n");
 pci_config_attr(class, "0x%06x\n");
 pci_config_attr(irq, "%u\n");
-pci_config_attr(is_enabled, "%u\n");
 
 static ssize_t broken_parity_status_show(struct device *dev,
                                          struct device_attribute *attr,
@@ -112,26 +111,36 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
                        (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
                        (u8)(pci_dev->class));
 }
-static ssize_t
-is_enabled_store(struct device *dev, struct device_attribute *attr,
-                const char *buf, size_t count)
+
+static ssize_t is_enabled_store(struct device *dev,
+                                struct device_attribute *attr, const char *buf,
+                                size_t count)
 {
+        ssize_t result = -EINVAL;
         struct pci_dev *pdev = to_pci_dev(dev);
-        int retval = 0;
 
         /* this can crash the machine when done on the "wrong" device */
         if (!capable(CAP_SYS_ADMIN))
                 return count;
 
-        if (*buf == '0')
-                pci_disable_device(pdev);
+        if (*buf == '0') {
+                if (atomic_read(&pdev->enable_cnt) != 0)
+                        pci_disable_device(pdev);
+                else
+                        result = -EIO;
+        } else if (*buf == '1')
+                result = pci_enable_device(pdev);
+
+        return result < 0 ? result : count;
+}
 
-        if (*buf == '1')
-                retval = pci_enable_device(pdev);
+static ssize_t is_enabled_show(struct device *dev,
+                               struct device_attribute *attr, char *buf)
+{
+        struct pci_dev *pdev;
 
-        if (retval)
-                return retval;
-        return count;
+        pdev = to_pci_dev (dev);
+        return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
 }
 
 static ssize_t
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index a544997399b3..5a14b73cf3a1 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -490,6 +490,47 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
         kfree(save_state);
 }
 
+
+static int pci_save_pcix_state(struct pci_dev *dev)
+{
+        int pos, i = 0;
+        struct pci_cap_saved_state *save_state;
+        u16 *cap;
+
+        pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
+        if (pos <= 0)
+                return 0;
+
+        save_state = kzalloc(sizeof(*save_state) + sizeof(u16), GFP_KERNEL);
+        if (!save_state) {
+                dev_err(&dev->dev, "Out of memory in pci_save_pcie_state\n");
+                return -ENOMEM;
+        }
+        cap = (u16 *)&save_state->data[0];
+
+        pci_read_config_word(dev, pos + PCI_X_CMD, &cap[i++]);
+        pci_add_saved_cap(dev, save_state);
+        return 0;
+}
+
+static void pci_restore_pcix_state(struct pci_dev *dev)
+{
+        int i = 0, pos;
+        struct pci_cap_saved_state *save_state;
+        u16 *cap;
+
+        save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX);
+        pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
+        if (!save_state || pos <= 0)
+                return;
+        cap = (u16 *)&save_state->data[0];
+
+        pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]);
+        pci_remove_saved_cap(save_state);
+        kfree(save_state);
+}
+
+
 /**
  * pci_save_state - save the PCI configuration space of a device before suspending
  * @dev: - PCI device that we're dealing with
@@ -507,6 +548,8 @@ pci_save_state(struct pci_dev *dev)
                 return i;
         if ((i = pci_save_pcie_state(dev)) != 0)
                 return i;
+        if ((i = pci_save_pcix_state(dev)) != 0)
+                return i;
         return 0;
 }
 
@@ -538,6 +581,7 @@ pci_restore_state(struct pci_dev *dev)
                                 dev->saved_config_space[i]);
                 }
         }
+        pci_restore_pcix_state(dev);
         pci_restore_msi_state(dev);
         pci_restore_msix_state(dev);
         return 0;
@@ -568,30 +612,51 @@ pci_enable_device_bars(struct pci_dev *dev, int bars)
 }
 
 /**
- * pci_enable_device - Initialize device before it's used by a driver.
+ * __pci_enable_device - Initialize device before it's used by a driver.
  * @dev: PCI device to be initialized
  *
  *  Initialize device before it's used by a driver. Ask low-level code
  *  to enable I/O and memory. Wake up the device if it was suspended.
  *  Beware, this function can fail.
+ *
+ * Note this function is a backend and is not supposed to be called by
+ * normal code, use pci_enable_device() instead.
  */
 int
-pci_enable_device(struct pci_dev *dev)
+__pci_enable_device(struct pci_dev *dev)
 {
         int err;
 
-        if (dev->is_enabled)
-                return 0;
-
         err = pci_enable_device_bars(dev, (1 << PCI_NUM_RESOURCES) - 1);
         if (err)
                 return err;
         pci_fixup_device(pci_fixup_enable, dev);
-        dev->is_enabled = 1;
         return 0;
 }
 
 /**
+ * pci_enable_device - Initialize device before it's used by a driver.
+ * @dev: PCI device to be initialized
+ *
+ *  Initialize device before it's used by a driver. Ask low-level code
+ *  to enable I/O and memory. Wake up the device if it was suspended.
+ *  Beware, this function can fail.
+ *
+ *  Note we don't actually enable the device many times if we call
+ *  this function repeatedly (we just increment the count).
+ */
+int pci_enable_device(struct pci_dev *dev)
+{
+        int result;
+        if (atomic_add_return(1, &dev->enable_cnt) > 1)
+                return 0;               /* already enabled */
+        result = __pci_enable_device(dev);
+        if (result < 0)
+                atomic_dec(&dev->enable_cnt);
+        return result;
+}
+
+/**
  * pcibios_disable_device - disable arch specific PCI resources for device dev
  * @dev: the PCI device to disable
  *
@@ -607,12 +672,18 @@ void __attribute__ ((weak)) pcibios_disable_device (struct pci_dev *dev) {}
  *
  * Signal to the system that the PCI device is not in use by the system
  * anymore.  This only involves disabling PCI bus-mastering, if active.
+ *
+ * Note we don't actually disable the device until all callers of
+ * pci_device_enable() have called pci_device_disable().
  */
 void
 pci_disable_device(struct pci_dev *dev)
 {
         u16 pci_command;
 
+        if (atomic_sub_return(1, &dev->enable_cnt) != 0)
+                return;
+
         if (dev->msi_enabled)
                 disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI),
                         PCI_CAP_ID_MSI);
@@ -628,7 +699,6 @@ pci_disable_device(struct pci_dev *dev)
         dev->is_busmaster = 0;
 
         pcibios_disable_device(dev);
-        dev->is_enabled = 0;
 }
 
 /**
@@ -831,22 +901,38 @@ pci_set_master(struct pci_dev *dev)
         pcibios_set_master(dev);
 }
 
-#ifndef HAVE_ARCH_PCI_MWI
+#ifdef PCI_DISABLE_MWI
+int pci_set_mwi(struct pci_dev *dev)
+{
+        return 0;
+}
+
+void pci_clear_mwi(struct pci_dev *dev)
+{
+}
+
+#else
+
+#ifndef PCI_CACHE_LINE_BYTES
+#define PCI_CACHE_LINE_BYTES L1_CACHE_BYTES
+#endif
+
 /* This can be overridden by arch code. */
-u8 pci_cache_line_size = L1_CACHE_BYTES >> 2;
+/* Don't forget this is measured in 32-bit words, not bytes */
+u8 pci_cache_line_size = PCI_CACHE_LINE_BYTES / 4;
 
 /**
- * pci_generic_prep_mwi - helper function for pci_set_mwi
- * @dev: the PCI device for which MWI is enabled
+ * pci_set_cacheline_size - ensure the CACHE_LINE_SIZE register is programmed
+ * @dev: the PCI device for which MWI is to be enabled
  *
- * Helper function for generic implementation of pcibios_prep_mwi
- * function.  Originally copied from drivers/net/acenic.c.
+ * Helper function for pci_set_mwi.
+ * Originally copied from drivers/net/acenic.c.
  * Copyright 1998-2001 by Jes Sorensen, <jes@trained-monkey.org>.
  *
  * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  */
 static int
-pci_generic_prep_mwi(struct pci_dev *dev)
+pci_set_cacheline_size(struct pci_dev *dev)
 {
         u8 cacheline_size;
 
@@ -872,7 +958,6 @@ pci_generic_prep_mwi(struct pci_dev *dev)
 
         return -EINVAL;
 }
-#endif /* !HAVE_ARCH_PCI_MWI */
 
 /**
  * pci_set_mwi - enables memory-write-invalidate PCI transaction
@@ -890,12 +975,7 @@ pci_set_mwi(struct pci_dev *dev)
         int rc;
         u16 cmd;
 
-#ifdef HAVE_ARCH_PCI_MWI
-        rc = pcibios_prep_mwi(dev);
-#else
-        rc = pci_generic_prep_mwi(dev);
-#endif
-
+        rc = pci_set_cacheline_size(dev);
         if (rc)
                 return rc;
 
@@ -926,6 +1006,7 @@ pci_clear_mwi(struct pci_dev *dev)
                 pci_write_config_word(dev, PCI_COMMAND, cmd);
         }
 }
+#endif /* ! PCI_DISABLE_MWI */
 
 /**
  * pci_intx - enables/disables PCI INTx for device dev
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 6bf327db5c5e..398852f526a6 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -1,5 +1,6 @@
 /* Functions internal to the PCI core code */
 
+extern int __must_check __pci_enable_device(struct pci_dev *);
 extern int pci_uevent(struct device *dev, char **envp, int num_envp,
                       char *buffer, int buffer_size);
 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index e159d6604494..0eeac60042b3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -679,6 +679,33 @@ static int pci_setup_device(struct pci_dev * dev)
                 pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
                 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
                 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
+
+                /*
+                 *      Do the ugly legacy mode stuff here rather than broken chip
+                 *      quirk code. Legacy mode ATA controllers have fixed
+                 *      addresses. These are not always echoed in BAR0-3, and
+                 *      BAR0-3 in a few cases contain junk!
+                 */
+                if (class == PCI_CLASS_STORAGE_IDE) {
+                        u8 progif;
+                        pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
+                        if ((progif & 1) == 0) {
+                                dev->resource[0].start = 0x1F0;
+                                dev->resource[0].end = 0x1F7;
+                                dev->resource[0].flags = IORESOURCE_IO;
+                                dev->resource[1].start = 0x3F6;
+                                dev->resource[1].end = 0x3F6;
+                                dev->resource[1].flags = IORESOURCE_IO;
+                        }
+                        if ((progif & 4) == 0) {
+                                dev->resource[2].start = 0x170;
+                                dev->resource[2].end = 0x177;
+                                dev->resource[2].flags = IORESOURCE_IO;
+                                dev->resource[3].start = 0x376;
+                                dev->resource[3].end = 0x376;
+                                dev->resource[3].flags = IORESOURCE_IO;
+                        }
+                }
                 break;
 
         case PCI_HEADER_TYPE_BRIDGE:                /* bridge header */
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 5b4483811691..9ca9b9bf6160 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -797,56 +797,6 @@ static void __init quirk_mediagx_master(struct pci_dev *dev)
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX,    PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master );
 
 /*
- * As per PCI spec, ignore base address registers 0-3 of the IDE controllers
- * running in Compatible mode (bits 0 and 2 in the ProgIf for primary and
- * secondary channels respectively). If the device reports Compatible mode
- * but does use BAR0-3 for address decoding, we assume that firmware has
- * programmed these BARs with standard values (0x1f0,0x3f4 and 0x170,0x374).
- * Exceptions (if they exist) must be handled in chip/architecture specific
- * fixups.
- *
- * Note: for non x86 people. You may need an arch specific quirk to handle
- * moving IDE devices to native mode as well. Some plug in card devices power
- * up in compatible mode and assume the BIOS will adjust them.
- *
- * Q: should we load the 0x1f0,0x3f4 into the registers or zap them as
- * we do now ? We don't want is pci_enable_device to come along
- * and assign new resources. Both approaches work for that.
- */ 
-static void __devinit quirk_ide_bases(struct pci_dev *dev)
-{
-       struct resource *res;
-       int first_bar = 2, last_bar = 0;
-
-       if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
-               return;
-
-       res = &dev->resource[0];
-
-       /* primary channel: ProgIf bit 0, BAR0, BAR1 */
-       if (!(dev->class & 1) && (res[0].flags || res[1].flags)) { 
-               res[0].start = res[0].end = res[0].flags = 0;
-               res[1].start = res[1].end = res[1].flags = 0;
-               first_bar = 0;
-               last_bar = 1;
-       }
-
-       /* secondary channel: ProgIf bit 2, BAR2, BAR3 */
-       if (!(dev->class & 4) && (res[2].flags || res[3].flags)) { 
-               res[2].start = res[2].end = res[2].flags = 0;
-               res[3].start = res[3].end = res[3].flags = 0;
-               last_bar = 3;
-       }
-
-       if (!last_bar)
-               return;
-
-       printk(KERN_INFO "PCI: Ignoring BAR%d-%d of IDE controller %s\n",
-              first_bar, last_bar, pci_name(dev));
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_ide_bases);
-
-/*
  *      Ensure C0 rev restreaming is off. This is normally done by
  *      the BIOS but in the odd case it is not the results are corruption
  *      hence the presence of a Linux check
@@ -880,11 +830,10 @@ static void __devinit quirk_svwks_csb5ide(struct pci_dev *pdev)
                 prog &= ~5;
                 pdev->class &= ~5;
                 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
-                /* need to re-assign BARs for compat mode */
-                quirk_ide_bases(pdev);
+                /* PCI layer will sort out resources */
         }
 }
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide );
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide );
 
 /*
  *      Intel 82801CAM ICH3-M datasheet says IDE modes must be the same
@@ -900,11 +849,9 @@ static void __init quirk_ide_samemode(struct pci_dev *pdev)
                 prog &= ~5;
                 pdev->class &= ~5;
                 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
-                /* need to re-assign BARs for compat mode */
-                quirk_ide_bases(pdev);
         }
 }
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, quirk_ide_samemode);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, quirk_ide_samemode);
 
 /* This was originally an Alpha specific thing, but it really fits here.
  * The i82375 PCI/EISA bridge appears as non-classified. Fix that.
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c
index e1dcefc69bb4..d087e0817715 100644
--- a/drivers/pci/rom.c
+++ b/drivers/pci/rom.c
@@ -81,7 +81,8 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
                 start = (loff_t)0xC0000;
                 *size = 0x20000; /* cover C000:0 through E000:0 */
         } else {
-                if (res->flags & IORESOURCE_ROM_COPY) {
+                if (res->flags &
+                        (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) {
                         *size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
                         return (void __iomem *)(unsigned long)
                                 pci_resource_start(pdev, PCI_ROM_RESOURCE);
@@ -165,7 +166,8 @@ void __iomem *pci_map_rom_copy(struct pci_dev *pdev, size_t *size)
         if (!rom)
                 return NULL;
 
-        if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_SHADOW))
+        if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_SHADOW |
+                          IORESOURCE_ROM_BIOS_COPY))
                 return rom;
 
         res->start = (unsigned long)kmalloc(*size, GFP_KERNEL);
@@ -191,7 +193,7 @@ void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
 {
         struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
 
-        if (res->flags & IORESOURCE_ROM_COPY)
+        if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY))
                 return;
 
         iounmap(rom);
@@ -215,6 +217,7 @@ void pci_remove_rom(struct pci_dev *pdev)
                 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
         if (!(res->flags & (IORESOURCE_ROM_ENABLE |
                             IORESOURCE_ROM_SHADOW |
+                            IORESOURCE_ROM_BIOS_COPY |
                             IORESOURCE_ROM_COPY)))
                 pci_disable_rom(pdev);
 }