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-rw-r--r--drivers/pci/.gitignore4
-rw-r--r--drivers/pci/access.c91
-rw-r--r--drivers/pci/hotplug.c4
-rw-r--r--drivers/pci/hotplug/acpiphp_glue.c8
-rw-r--r--drivers/pci/hotplug/cpcihp_generic.c1
-rw-r--r--drivers/pci/hotplug/cpcihp_zt5550.c26
-rw-r--r--drivers/pci/hotplug/cpqphp_core.c24
-rw-r--r--drivers/pci/hotplug/cpqphp_pci.c15
-rw-r--r--drivers/pci/hotplug/fakephp.c2
-rw-r--r--drivers/pci/hotplug/ibmphp_core.c2
-rw-r--r--drivers/pci/hotplug/pciehp.h134
-rw-r--r--drivers/pci/hotplug/pciehp_core.c108
-rw-r--r--drivers/pci/hotplug/pciehp_ctrl.c1980
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c125
-rw-r--r--drivers/pci/hotplug/pciehp_pci.c840
-rw-r--r--drivers/pci/hotplug/pciehprm.h52
-rw-r--r--drivers/pci/hotplug/pciehprm_acpi.c1727
-rw-r--r--drivers/pci/hotplug/pciehprm_nonacpi.c464
-rw-r--r--drivers/pci/hotplug/pciehprm_nonacpi.h56
-rw-r--r--drivers/pci/hotplug/rpadlpar_core.c84
-rw-r--r--drivers/pci/hotplug/rpadlpar_sysfs.c4
-rw-r--r--drivers/pci/hotplug/rpaphp.h5
-rw-r--r--drivers/pci/hotplug/rpaphp_core.c5
-rw-r--r--drivers/pci/hotplug/rpaphp_pci.c91
-rw-r--r--drivers/pci/hotplug/rpaphp_slot.c3
-rw-r--r--drivers/pci/hotplug/sgi_hotplug.c6
-rw-r--r--drivers/pci/hotplug/shpchp.h124
-rw-r--r--drivers/pci/hotplug/shpchp_core.c111
-rw-r--r--drivers/pci/hotplug/shpchp_ctrl.c2034
-rw-r--r--drivers/pci/hotplug/shpchp_hpc.c177
-rw-r--r--drivers/pci/hotplug/shpchp_pci.c861
-rw-r--r--drivers/pci/hotplug/shpchp_sysfs.c119
-rw-r--r--drivers/pci/hotplug/shpchprm.h55
-rw-r--r--drivers/pci/hotplug/shpchprm_acpi.c1649
-rw-r--r--drivers/pci/hotplug/shpchprm_legacy.c395
-rw-r--r--drivers/pci/hotplug/shpchprm_legacy.h113
-rw-r--r--drivers/pci/hotplug/shpchprm_nonacpi.c391
-rw-r--r--drivers/pci/hotplug/shpchprm_nonacpi.h56
-rw-r--r--drivers/pci/msi.c22
-rw-r--r--drivers/pci/pci-acpi.c12
-rw-r--r--drivers/pci/pci-driver.c31
-rw-r--r--drivers/pci/pci-sysfs.c22
-rw-r--r--drivers/pci/pci.c68
-rw-r--r--drivers/pci/pci.h7
-rw-r--r--drivers/pci/pcie/portdrv_core.c6
-rw-r--r--drivers/pci/pcie/portdrv_pci.c1
-rw-r--r--drivers/pci/probe.c23
-rw-r--r--drivers/pci/proc.c28
-rw-r--r--drivers/pci/quirks.c412
-rw-r--r--drivers/pci/rom.c1
-rw-r--r--drivers/pci/setup-bus.c2
-rw-r--r--drivers/pci/syscall.c14
52 files changed, 1292 insertions, 11303 deletions
diff --git a/drivers/pci/.gitignore b/drivers/pci/.gitignore
new file mode 100644
index 000000000000..f297ca8d313e
--- /dev/null
+++ b/drivers/pci/.gitignore
@@ -0,0 +1,4 @@
1classlist.h
2devlist.h
3gen-devlist
4
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 24a76de49f41..ea16805a153c 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -2,6 +2,8 @@
2#include <linux/module.h> 2#include <linux/module.h>
3#include <linux/ioport.h> 3#include <linux/ioport.h>
4 4
5#include "pci.h"
6
5/* 7/*
6 * This interrupt-safe spinlock protects all accesses to PCI 8 * This interrupt-safe spinlock protects all accesses to PCI
7 * configuration space. 9 * configuration space.
@@ -60,3 +62,92 @@ EXPORT_SYMBOL(pci_bus_read_config_dword);
60EXPORT_SYMBOL(pci_bus_write_config_byte); 62EXPORT_SYMBOL(pci_bus_write_config_byte);
61EXPORT_SYMBOL(pci_bus_write_config_word); 63EXPORT_SYMBOL(pci_bus_write_config_word);
62EXPORT_SYMBOL(pci_bus_write_config_dword); 64EXPORT_SYMBOL(pci_bus_write_config_dword);
65
66static u32 pci_user_cached_config(struct pci_dev *dev, int pos)
67{
68 u32 data;
69
70 data = dev->saved_config_space[pos/sizeof(dev->saved_config_space[0])];
71 data >>= (pos % sizeof(dev->saved_config_space[0])) * 8;
72 return data;
73}
74
75#define PCI_USER_READ_CONFIG(size,type) \
76int pci_user_read_config_##size \
77 (struct pci_dev *dev, int pos, type *val) \
78{ \
79 unsigned long flags; \
80 int ret = 0; \
81 u32 data = -1; \
82 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
83 spin_lock_irqsave(&pci_lock, flags); \
84 if (likely(!dev->block_ucfg_access)) \
85 ret = dev->bus->ops->read(dev->bus, dev->devfn, \
86 pos, sizeof(type), &data); \
87 else if (pos < sizeof(dev->saved_config_space)) \
88 data = pci_user_cached_config(dev, pos); \
89 spin_unlock_irqrestore(&pci_lock, flags); \
90 *val = (type)data; \
91 return ret; \
92}
93
94#define PCI_USER_WRITE_CONFIG(size,type) \
95int pci_user_write_config_##size \
96 (struct pci_dev *dev, int pos, type val) \
97{ \
98 unsigned long flags; \
99 int ret = -EIO; \
100 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
101 spin_lock_irqsave(&pci_lock, flags); \
102 if (likely(!dev->block_ucfg_access)) \
103 ret = dev->bus->ops->write(dev->bus, dev->devfn, \
104 pos, sizeof(type), val); \
105 spin_unlock_irqrestore(&pci_lock, flags); \
106 return ret; \
107}
108
109PCI_USER_READ_CONFIG(byte, u8)
110PCI_USER_READ_CONFIG(word, u16)
111PCI_USER_READ_CONFIG(dword, u32)
112PCI_USER_WRITE_CONFIG(byte, u8)
113PCI_USER_WRITE_CONFIG(word, u16)
114PCI_USER_WRITE_CONFIG(dword, u32)
115
116/**
117 * pci_block_user_cfg_access - Block userspace PCI config reads/writes
118 * @dev: pci device struct
119 *
120 * This function blocks any userspace PCI config accesses from occurring.
121 * When blocked, any writes will be bit bucketed and reads will return the
122 * data saved using pci_save_state for the first 64 bytes of config
123 * space and return 0xff for all other config reads.
124 **/
125void pci_block_user_cfg_access(struct pci_dev *dev)
126{
127 unsigned long flags;
128
129 pci_save_state(dev);
130
131 /* spinlock to synchronize with anyone reading config space now */
132 spin_lock_irqsave(&pci_lock, flags);
133 dev->block_ucfg_access = 1;
134 spin_unlock_irqrestore(&pci_lock, flags);
135}
136EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
137
138/**
139 * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes
140 * @dev: pci device struct
141 *
142 * This function allows userspace PCI config accesses to resume.
143 **/
144void pci_unblock_user_cfg_access(struct pci_dev *dev)
145{
146 unsigned long flags;
147
148 /* spinlock to synchronize with anyone reading saved config space */
149 spin_lock_irqsave(&pci_lock, flags);
150 dev->block_ucfg_access = 0;
151 spin_unlock_irqrestore(&pci_lock, flags);
152}
153EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);
diff --git a/drivers/pci/hotplug.c b/drivers/pci/hotplug.c
index 10444988a10b..e1743be31909 100644
--- a/drivers/pci/hotplug.c
+++ b/drivers/pci/hotplug.c
@@ -7,7 +7,6 @@ int pci_hotplug (struct device *dev, char **envp, int num_envp,
7 char *buffer, int buffer_size) 7 char *buffer, int buffer_size)
8{ 8{
9 struct pci_dev *pdev; 9 struct pci_dev *pdev;
10 char *scratch;
11 int i = 0; 10 int i = 0;
12 int length = 0; 11 int length = 0;
13 12
@@ -18,9 +17,6 @@ int pci_hotplug (struct device *dev, char **envp, int num_envp,
18 if (!pdev) 17 if (!pdev)
19 return -ENODEV; 18 return -ENODEV;
20 19
21 scratch = buffer;
22
23
24 if (add_hotplug_env_var(envp, num_envp, &i, 20 if (add_hotplug_env_var(envp, num_envp, &i,
25 buffer, buffer_size, &length, 21 buffer, buffer_size, &length,
26 "PCI_CLASS=%04X", pdev->class)) 22 "PCI_CLASS=%04X", pdev->class))
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index 424e7de181ae..8e21f6ab89a1 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -58,6 +58,9 @@ static LIST_HEAD(bridge_list);
58 58
59static void handle_hotplug_event_bridge (acpi_handle, u32, void *); 59static void handle_hotplug_event_bridge (acpi_handle, u32, void *);
60static void handle_hotplug_event_func (acpi_handle, u32, void *); 60static void handle_hotplug_event_func (acpi_handle, u32, void *);
61static void acpiphp_sanitize_bus(struct pci_bus *bus);
62static void acpiphp_set_hpp_values(acpi_handle handle, struct pci_bus *bus);
63
61 64
62/* 65/*
63 * initialization & terminatation routines 66 * initialization & terminatation routines
@@ -796,8 +799,13 @@ static int enable_device(struct acpiphp_slot *slot)
796 } 799 }
797 } 800 }
798 801
802 pci_bus_size_bridges(bus);
799 pci_bus_assign_resources(bus); 803 pci_bus_assign_resources(bus);
804 acpiphp_sanitize_bus(bus);
805 pci_enable_bridges(bus);
800 pci_bus_add_devices(bus); 806 pci_bus_add_devices(bus);
807 acpiphp_set_hpp_values(DEVICE_ACPI_HANDLE(&bus->self->dev), bus);
808 acpiphp_configure_ioapics(DEVICE_ACPI_HANDLE(&bus->self->dev));
801 809
802 /* associate pci_dev to our representation */ 810 /* associate pci_dev to our representation */
803 list_for_each (l, &slot->funcs) { 811 list_for_each (l, &slot->funcs) {
diff --git a/drivers/pci/hotplug/cpcihp_generic.c b/drivers/pci/hotplug/cpcihp_generic.c
index a62a4345b466..2d4639d6841f 100644
--- a/drivers/pci/hotplug/cpcihp_generic.c
+++ b/drivers/pci/hotplug/cpcihp_generic.c
@@ -39,6 +39,7 @@
39#include <linux/init.h> 39#include <linux/init.h>
40#include <linux/errno.h> 40#include <linux/errno.h>
41#include <linux/pci.h> 41#include <linux/pci.h>
42#include <linux/string.h>
42#include "cpci_hotplug.h" 43#include "cpci_hotplug.h"
43 44
44#define DRIVER_VERSION "0.1" 45#define DRIVER_VERSION "0.1"
diff --git a/drivers/pci/hotplug/cpcihp_zt5550.c b/drivers/pci/hotplug/cpcihp_zt5550.c
index e9928024be78..f7cb00da38df 100644
--- a/drivers/pci/hotplug/cpcihp_zt5550.c
+++ b/drivers/pci/hotplug/cpcihp_zt5550.c
@@ -36,6 +36,7 @@
36#include <linux/init.h> 36#include <linux/init.h>
37#include <linux/errno.h> 37#include <linux/errno.h>
38#include <linux/pci.h> 38#include <linux/pci.h>
39#include <linux/signal.h> /* SA_SHIRQ */
39#include "cpci_hotplug.h" 40#include "cpci_hotplug.h"
40#include "cpcihp_zt5550.h" 41#include "cpcihp_zt5550.h"
41 42
@@ -78,11 +79,20 @@ static void __iomem *csr_int_mask;
78 79
79static int zt5550_hc_config(struct pci_dev *pdev) 80static int zt5550_hc_config(struct pci_dev *pdev)
80{ 81{
82 int ret;
83
81 /* Since we know that no boards exist with two HC chips, treat it as an error */ 84 /* Since we know that no boards exist with two HC chips, treat it as an error */
82 if(hc_dev) { 85 if(hc_dev) {
83 err("too many host controller devices?"); 86 err("too many host controller devices?");
84 return -EBUSY; 87 return -EBUSY;
85 } 88 }
89
90 ret = pci_enable_device(pdev);
91 if(ret) {
92 err("cannot enable %s\n", pci_name(pdev));
93 return ret;
94 }
95
86 hc_dev = pdev; 96 hc_dev = pdev;
87 dbg("hc_dev = %p", hc_dev); 97 dbg("hc_dev = %p", hc_dev);
88 dbg("pci resource start %lx", pci_resource_start(hc_dev, 1)); 98 dbg("pci resource start %lx", pci_resource_start(hc_dev, 1));
@@ -91,7 +101,8 @@ static int zt5550_hc_config(struct pci_dev *pdev)
91 if(!request_mem_region(pci_resource_start(hc_dev, 1), 101 if(!request_mem_region(pci_resource_start(hc_dev, 1),
92 pci_resource_len(hc_dev, 1), MY_NAME)) { 102 pci_resource_len(hc_dev, 1), MY_NAME)) {
93 err("cannot reserve MMIO region"); 103 err("cannot reserve MMIO region");
94 return -ENOMEM; 104 ret = -ENOMEM;
105 goto exit_disable_device;
95 } 106 }
96 107
97 hc_registers = 108 hc_registers =
@@ -99,9 +110,8 @@ static int zt5550_hc_config(struct pci_dev *pdev)
99 if(!hc_registers) { 110 if(!hc_registers) {
100 err("cannot remap MMIO region %lx @ %lx", 111 err("cannot remap MMIO region %lx @ %lx",
101 pci_resource_len(hc_dev, 1), pci_resource_start(hc_dev, 1)); 112 pci_resource_len(hc_dev, 1), pci_resource_start(hc_dev, 1));
102 release_mem_region(pci_resource_start(hc_dev, 1), 113 ret = -ENODEV;
103 pci_resource_len(hc_dev, 1)); 114 goto exit_release_region;
104 return -ENODEV;
105 } 115 }
106 116
107 csr_hc_index = hc_registers + CSR_HCINDEX; 117 csr_hc_index = hc_registers + CSR_HCINDEX;
@@ -124,6 +134,13 @@ static int zt5550_hc_config(struct pci_dev *pdev)
124 writeb((u8) ALL_DIRECT_INTS_MASK, csr_int_mask); 134 writeb((u8) ALL_DIRECT_INTS_MASK, csr_int_mask);
125 dbg("disabled timer0, timer1 and ENUM interrupts"); 135 dbg("disabled timer0, timer1 and ENUM interrupts");
126 return 0; 136 return 0;
137
138exit_release_region:
139 release_mem_region(pci_resource_start(hc_dev, 1),
140 pci_resource_len(hc_dev, 1));
141exit_disable_device:
142 pci_disable_device(hc_dev);
143 return ret;
127} 144}
128 145
129static int zt5550_hc_cleanup(void) 146static int zt5550_hc_cleanup(void)
@@ -134,6 +151,7 @@ static int zt5550_hc_cleanup(void)
134 iounmap(hc_registers); 151 iounmap(hc_registers);
135 release_mem_region(pci_resource_start(hc_dev, 1), 152 release_mem_region(pci_resource_start(hc_dev, 1),
136 pci_resource_len(hc_dev, 1)); 153 pci_resource_len(hc_dev, 1));
154 pci_disable_device(hc_dev);
137 return 0; 155 return 0;
138} 156}
139 157
diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c
index 8c6d3987d461..9aed8efe6a11 100644
--- a/drivers/pci/hotplug/cpqphp_core.c
+++ b/drivers/pci/hotplug/cpqphp_core.c
@@ -794,12 +794,21 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
794 u32 rc; 794 u32 rc;
795 struct controller *ctrl; 795 struct controller *ctrl;
796 struct pci_func *func; 796 struct pci_func *func;
797 int err;
798
799 err = pci_enable_device(pdev);
800 if (err) {
801 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
802 pci_name(pdev), err);
803 return err;
804 }
797 805
798 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery 806 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
799 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id); 807 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
800 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) { 808 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
801 err(msg_HPC_non_compaq_or_intel); 809 err(msg_HPC_non_compaq_or_intel);
802 return -ENODEV; 810 rc = -ENODEV;
811 goto err_disable_device;
803 } 812 }
804 dbg("Vendor ID: %x\n", vendor_id); 813 dbg("Vendor ID: %x\n", vendor_id);
805 814
@@ -807,7 +816,8 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
807 dbg("revision: %d\n", rev); 816 dbg("revision: %d\n", rev);
808 if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) { 817 if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
809 err(msg_HPC_rev_error); 818 err(msg_HPC_rev_error);
810 return -ENODEV; 819 rc = -ENODEV;
820 goto err_disable_device;
811 } 821 }
812 822
813 /* Check for the proper subsytem ID's 823 /* Check for the proper subsytem ID's
@@ -820,18 +830,20 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
820 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid); 830 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
821 if (rc) { 831 if (rc) {
822 err("%s : pci_read_config_word failed\n", __FUNCTION__); 832 err("%s : pci_read_config_word failed\n", __FUNCTION__);
823 return rc; 833 goto err_disable_device;
824 } 834 }
825 dbg("Subsystem Vendor ID: %x\n", subsystem_vid); 835 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
826 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) { 836 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
827 err(msg_HPC_non_compaq_or_intel); 837 err(msg_HPC_non_compaq_or_intel);
828 return -ENODEV; 838 rc = -ENODEV;
839 goto err_disable_device;
829 } 840 }
830 841
831 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL); 842 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL);
832 if (!ctrl) { 843 if (!ctrl) {
833 err("%s : out of memory\n", __FUNCTION__); 844 err("%s : out of memory\n", __FUNCTION__);
834 return -ENOMEM; 845 rc = -ENOMEM;
846 goto err_disable_device;
835 } 847 }
836 memset(ctrl, 0, sizeof(struct controller)); 848 memset(ctrl, 0, sizeof(struct controller));
837 849
@@ -1264,6 +1276,8 @@ err_free_bus:
1264 kfree(ctrl->pci_bus); 1276 kfree(ctrl->pci_bus);
1265err_free_ctrl: 1277err_free_ctrl:
1266 kfree(ctrl); 1278 kfree(ctrl);
1279err_disable_device:
1280 pci_disable_device(pdev);
1267 return rc; 1281 return rc;
1268} 1282}
1269 1283
diff --git a/drivers/pci/hotplug/cpqphp_pci.c b/drivers/pci/hotplug/cpqphp_pci.c
index 93e39c4096a9..00b81a7bdd26 100644
--- a/drivers/pci/hotplug/cpqphp_pci.c
+++ b/drivers/pci/hotplug/cpqphp_pci.c
@@ -259,8 +259,7 @@ static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num
259 sizeof(struct irq_routing_table)) / sizeof(struct irq_info); 259 sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
260 // Make sure I got at least one entry 260 // Make sure I got at least one entry
261 if (len == 0) { 261 if (len == 0) {
262 if (PCIIRQRoutingInfoLength != NULL) 262 kfree(PCIIRQRoutingInfoLength );
263 kfree(PCIIRQRoutingInfoLength );
264 return -1; 263 return -1;
265 } 264 }
266 265
@@ -275,8 +274,7 @@ static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num
275 ctrl->pci_bus->number = tbus; 274 ctrl->pci_bus->number = tbus;
276 pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work); 275 pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work);
277 if (!nobridge || (work == 0xffffffff)) { 276 if (!nobridge || (work == 0xffffffff)) {
278 if (PCIIRQRoutingInfoLength != NULL) 277 kfree(PCIIRQRoutingInfoLength );
279 kfree(PCIIRQRoutingInfoLength );
280 return 0; 278 return 0;
281 } 279 }
282 280
@@ -289,20 +287,17 @@ static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num
289 dbg("Scan bus for Non Bridge: bus %d\n", tbus); 287 dbg("Scan bus for Non Bridge: bus %d\n", tbus);
290 if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) { 288 if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) {
291 *bus_num = tbus; 289 *bus_num = tbus;
292 if (PCIIRQRoutingInfoLength != NULL) 290 kfree(PCIIRQRoutingInfoLength );
293 kfree(PCIIRQRoutingInfoLength );
294 return 0; 291 return 0;
295 } 292 }
296 } else { 293 } else {
297 if (PCIIRQRoutingInfoLength != NULL) 294 kfree(PCIIRQRoutingInfoLength );
298 kfree(PCIIRQRoutingInfoLength );
299 return 0; 295 return 0;
300 } 296 }
301 297
302 } 298 }
303 } 299 }
304 if (PCIIRQRoutingInfoLength != NULL) 300 kfree(PCIIRQRoutingInfoLength );
305 kfree(PCIIRQRoutingInfoLength );
306 return -1; 301 return -1;
307} 302}
308 303
diff --git a/drivers/pci/hotplug/fakephp.c b/drivers/pci/hotplug/fakephp.c
index 8e47fa66e25e..060d74775d7b 100644
--- a/drivers/pci/hotplug/fakephp.c
+++ b/drivers/pci/hotplug/fakephp.c
@@ -37,6 +37,8 @@
37#include <linux/module.h> 37#include <linux/module.h>
38#include <linux/pci.h> 38#include <linux/pci.h>
39#include <linux/init.h> 39#include <linux/init.h>
40#include <linux/string.h>
41#include <linux/slab.h>
40#include "pci_hotplug.h" 42#include "pci_hotplug.h"
41#include "../pci.h" 43#include "../pci.h"
42 44
diff --git a/drivers/pci/hotplug/ibmphp_core.c b/drivers/pci/hotplug/ibmphp_core.c
index 0392e004258f..aabf1e70b528 100644
--- a/drivers/pci/hotplug/ibmphp_core.c
+++ b/drivers/pci/hotplug/ibmphp_core.c
@@ -1077,7 +1077,7 @@ static int enable_slot(struct hotplug_slot *hs)
1077 if (rc) { 1077 if (rc) {
1078 err("Adding this card exceeds the limitations of this bus.\n"); 1078 err("Adding this card exceeds the limitations of this bus.\n");
1079 err("(i.e., >1 133MHz cards running on same bus, or " 1079 err("(i.e., >1 133MHz cards running on same bus, or "
1080 ">2 66 PCI cards running on same bus\n."); 1080 ">2 66 PCI cards running on same bus.\n");
1081 err("Try hot-adding into another bus\n"); 1081 err("Try hot-adding into another bus\n");
1082 rc = -EINVAL; 1082 rc = -EINVAL;
1083 goto error_nopower; 1083 goto error_nopower;
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index 061ead21ef14..6a61b9f286e1 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -32,8 +32,6 @@
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/pci.h> 33#include <linux/pci.h>
34#include <linux/delay.h> 34#include <linux/delay.h>
35#include <asm/semaphore.h>
36#include <asm/io.h>
37#include <linux/pcieport_if.h> 35#include <linux/pcieport_if.h>
38#include "pci_hotplug.h" 36#include "pci_hotplug.h"
39 37
@@ -42,6 +40,7 @@
42extern int pciehp_poll_mode; 40extern int pciehp_poll_mode;
43extern int pciehp_poll_time; 41extern int pciehp_poll_time;
44extern int pciehp_debug; 42extern int pciehp_debug;
43extern int pciehp_force;
45 44
46/*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/ 45/*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/
47#define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0) 46#define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0)
@@ -49,25 +48,11 @@ extern int pciehp_debug;
49#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg) 48#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
50#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg) 49#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
51 50
52struct pci_func { 51struct hotplug_params {
53 struct pci_func *next; 52 u8 cache_line_size;
54 u8 bus; 53 u8 latency_timer;
55 u8 device; 54 u8 enable_serr;
56 u8 function; 55 u8 enable_perr;
57 u8 is_a_board;
58 u16 status;
59 u8 configured;
60 u8 switch_save;
61 u8 presence_save;
62 u32 base_length[0x06];
63 u8 base_type[0x06];
64 u16 reserved2;
65 u32 config_space[0x20];
66 struct pci_resource *mem_head;
67 struct pci_resource *p_mem_head;
68 struct pci_resource *io_head;
69 struct pci_resource *bus_head;
70 struct pci_dev* pci_dev;
71}; 56};
72 57
73struct slot { 58struct slot {
@@ -75,13 +60,7 @@ struct slot {
75 u8 bus; 60 u8 bus;
76 u8 device; 61 u8 device;
77 u32 number; 62 u32 number;
78 u8 is_a_board;
79 u8 configured;
80 u8 state; 63 u8 state;
81 u8 switch_save;
82 u8 presence_save;
83 u32 capabilities;
84 u16 reserved2;
85 struct timer_list task_event; 64 struct timer_list task_event;
86 u8 hp_slot; 65 u8 hp_slot;
87 struct controller *ctrl; 66 struct controller *ctrl;
@@ -90,42 +69,47 @@ struct slot {
90 struct list_head slot_list; 69 struct list_head slot_list;
91}; 70};
92 71
93struct pci_resource {
94 struct pci_resource * next;
95 u32 base;
96 u32 length;
97};
98
99struct event_info { 72struct event_info {
100 u32 event_type; 73 u32 event_type;
101 u8 hp_slot; 74 u8 hp_slot;
102}; 75};
103 76
77typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id);
78
79struct php_ctlr_state_s {
80 struct php_ctlr_state_s *pnext;
81 struct pci_dev *pci_dev;
82 unsigned int irq;
83 unsigned long flags; /* spinlock's */
84 u32 slot_device_offset;
85 u32 num_slots;
86 struct timer_list int_poll_timer; /* Added for poll event */
87 php_intr_callback_t attention_button_callback;
88 php_intr_callback_t switch_change_callback;
89 php_intr_callback_t presence_change_callback;
90 php_intr_callback_t power_fault_callback;
91 void *callback_instance_id;
92 struct ctrl_reg *creg; /* Ptr to controller register space */
93};
94
95#define MAX_EVENTS 10
104struct controller { 96struct controller {
105 struct controller *next; 97 struct controller *next;
106 struct semaphore crit_sect; /* critical section semaphore */ 98 struct semaphore crit_sect; /* critical section semaphore */
107 void *hpc_ctlr_handle; /* HPC controller handle */ 99 struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */
108 int num_slots; /* Number of slots on ctlr */ 100 int num_slots; /* Number of slots on ctlr */
109 int slot_num_inc; /* 1 or -1 */ 101 int slot_num_inc; /* 1 or -1 */
110 struct pci_resource *mem_head;
111 struct pci_resource *p_mem_head;
112 struct pci_resource *io_head;
113 struct pci_resource *bus_head;
114 struct pci_dev *pci_dev; 102 struct pci_dev *pci_dev;
115 struct pci_bus *pci_bus; 103 struct pci_bus *pci_bus;
116 struct event_info event_queue[10]; 104 struct event_info event_queue[MAX_EVENTS];
117 struct slot *slot; 105 struct slot *slot;
118 struct hpc_ops *hpc_ops; 106 struct hpc_ops *hpc_ops;
119 wait_queue_head_t queue; /* sleep & wake process */ 107 wait_queue_head_t queue; /* sleep & wake process */
120 u8 next_event; 108 u8 next_event;
121 u8 seg;
122 u8 bus; 109 u8 bus;
123 u8 device; 110 u8 device;
124 u8 function; 111 u8 function;
125 u8 rev;
126 u8 slot_device_offset; 112 u8 slot_device_offset;
127 u8 add_support;
128 enum pci_bus_speed speed;
129 u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */ 113 u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */
130 u8 slot_bus; /* Bus where the slots handled by this controller sit */ 114 u8 slot_bus; /* Bus where the slots handled by this controller sit */
131 u8 ctrlcap; 115 u8 ctrlcap;
@@ -133,20 +117,6 @@ struct controller {
133 u8 cap_base; 117 u8 cap_base;
134}; 118};
135 119
136struct irq_mapping {
137 u8 barber_pole;
138 u8 valid_INT;
139 u8 interrupt[4];
140};
141
142struct resource_lists {
143 struct pci_resource *mem_head;
144 struct pci_resource *p_mem_head;
145 struct pci_resource *io_head;
146 struct pci_resource *bus_head;
147 struct irq_mapping *irqs;
148};
149
150#define INT_BUTTON_IGNORE 0 120#define INT_BUTTON_IGNORE 0
151#define INT_PRESENCE_ON 1 121#define INT_PRESENCE_ON 1
152#define INT_PRESENCE_OFF 2 122#define INT_PRESENCE_OFF 2
@@ -200,21 +170,14 @@ struct resource_lists {
200 * error Messages 170 * error Messages
201 */ 171 */
202#define msg_initialization_err "Initialization failure, error=%d\n" 172#define msg_initialization_err "Initialization failure, error=%d\n"
203#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
204#define msg_HPC_non_pcie "The PCI hot plug controller is not supported by this driver.\n"
205#define msg_HPC_not_supported "This system is not supported by this version of pciephd module. Upgrade to a newer version of pciehpd\n"
206#define msg_unable_to_save "Unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
207#define msg_button_on "PCI slot #%d - powering on due to button press.\n" 173#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
208#define msg_button_off "PCI slot #%d - powering off due to button press.\n" 174#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
209#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n" 175#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
210#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n" 176#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
211 177
212/* controller functions */ 178/* controller functions */
213extern int pciehprm_find_available_resources (struct controller *ctrl);
214extern int pciehp_event_start_thread (void); 179extern int pciehp_event_start_thread (void);
215extern void pciehp_event_stop_thread (void); 180extern void pciehp_event_stop_thread (void);
216extern struct pci_func *pciehp_slot_create (unsigned char busnumber);
217extern struct pci_func *pciehp_slot_find (unsigned char bus, unsigned char device, unsigned char index);
218extern int pciehp_enable_slot (struct slot *slot); 181extern int pciehp_enable_slot (struct slot *slot);
219extern int pciehp_disable_slot (struct slot *slot); 182extern int pciehp_disable_slot (struct slot *slot);
220 183
@@ -224,25 +187,17 @@ extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id);
224extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id); 187extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
225/* extern void long_delay (int delay); */ 188/* extern void long_delay (int delay); */
226 189
227/* resource functions */
228extern int pciehp_resource_sort_and_combine (struct pci_resource **head);
229
230/* pci functions */ 190/* pci functions */
231extern int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num); 191extern int pciehp_configure_device (struct slot *p_slot);
232/*extern int pciehp_get_bus_dev (struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/ 192extern int pciehp_unconfigure_device (struct slot *p_slot);
233extern int pciehp_save_config (struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num); 193extern int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev);
234extern int pciehp_save_used_resources (struct controller *ctrl, struct pci_func * func, int flag); 194extern void pciehp_get_hp_params_from_firmware(struct pci_dev *dev,
235extern int pciehp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot); 195 struct hotplug_params *hpp);
236extern void pciehp_destroy_board_resources (struct pci_func * func); 196
237extern int pciehp_return_board_resources (struct pci_func * func, struct resource_lists * resources);
238extern void pciehp_destroy_resource_list (struct resource_lists * resources);
239extern int pciehp_configure_device (struct controller* ctrl, struct pci_func* func);
240extern int pciehp_unconfigure_device (struct pci_func* func);
241 197
242 198
243/* Global variables */ 199/* Global variables */
244extern struct controller *pciehp_ctrl_list; 200extern struct controller *pciehp_ctrl_list;
245extern struct pci_func *pciehp_slot_list[256];
246 201
247/* Inline functions */ 202/* Inline functions */
248 203
@@ -252,12 +207,9 @@ static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device)
252 207
253 p_slot = ctrl->slot; 208 p_slot = ctrl->slot;
254 209
255 dbg("p_slot = %p\n", p_slot);
256
257 while (p_slot && (p_slot->device != device)) { 210 while (p_slot && (p_slot->device != device)) {
258 tmp_slot = p_slot; 211 tmp_slot = p_slot;
259 p_slot = p_slot->next; 212 p_slot = p_slot->next;
260 dbg("In while loop, p_slot = %p\n", p_slot);
261 } 213 }
262 if (p_slot == NULL) { 214 if (p_slot == NULL) {
263 err("ERROR: pciehp_find_slot device=0x%x\n", device); 215 err("ERROR: pciehp_find_slot device=0x%x\n", device);
@@ -273,7 +225,6 @@ static inline int wait_for_ctrl_irq(struct controller *ctrl)
273 225
274 DECLARE_WAITQUEUE(wait, current); 226 DECLARE_WAITQUEUE(wait, current);
275 227
276 dbg("%s : start\n", __FUNCTION__);
277 add_wait_queue(&ctrl->queue, &wait); 228 add_wait_queue(&ctrl->queue, &wait);
278 if (!pciehp_poll_mode) 229 if (!pciehp_poll_mode)
279 /* Sleep for up to 1 second */ 230 /* Sleep for up to 1 second */
@@ -285,19 +236,9 @@ static inline int wait_for_ctrl_irq(struct controller *ctrl)
285 if (signal_pending(current)) 236 if (signal_pending(current))
286 retval = -EINTR; 237 retval = -EINTR;
287 238
288 dbg("%s : end\n", __FUNCTION__);
289 return retval; 239 return retval;
290} 240}
291 241
292/* Puts node back in the resource list pointed to by head */
293static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
294{
295 if (!node || !head)
296 return;
297 node->next = *head;
298 *head = node;
299}
300
301#define SLOT_NAME_SIZE 10 242#define SLOT_NAME_SIZE 10
302 243
303static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot) 244static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
@@ -311,14 +252,7 @@ enum php_ctlr_type {
311 ACPI 252 ACPI
312}; 253};
313 254
314typedef u8(*php_intr_callback_t) (unsigned int change_id, void *instance_id); 255int pcie_init(struct controller *ctrl, struct pcie_device *dev);
315
316int pcie_init(struct controller *ctrl, struct pcie_device *dev,
317 php_intr_callback_t attention_button_callback,
318 php_intr_callback_t switch_change_callback,
319 php_intr_callback_t presence_change_callback,
320 php_intr_callback_t power_fault_callback);
321
322 256
323/* This has no meaning for PCI Express, as there is only 1 slot per port */ 257/* This has no meaning for PCI Express, as there is only 1 slot per port */
324int pcie_get_ctlr_slot_config(struct controller *ctrl, 258int pcie_get_ctlr_slot_config(struct controller *ctrl,
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index cafc7eadcf80..8df704860348 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -27,27 +27,20 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/moduleparam.h> 31#include <linux/moduleparam.h>
33#include <linux/kernel.h> 32#include <linux/kernel.h>
34#include <linux/types.h> 33#include <linux/types.h>
35#include <linux/proc_fs.h>
36#include <linux/slab.h>
37#include <linux/workqueue.h>
38#include <linux/pci.h> 34#include <linux/pci.h>
39#include <linux/init.h>
40#include <asm/uaccess.h>
41#include "pciehp.h" 35#include "pciehp.h"
42#include "pciehprm.h"
43#include <linux/interrupt.h> 36#include <linux/interrupt.h>
44 37
45/* Global variables */ 38/* Global variables */
46int pciehp_debug; 39int pciehp_debug;
47int pciehp_poll_mode; 40int pciehp_poll_mode;
48int pciehp_poll_time; 41int pciehp_poll_time;
42int pciehp_force;
49struct controller *pciehp_ctrl_list; 43struct controller *pciehp_ctrl_list;
50struct pci_func *pciehp_slot_list[256];
51 44
52#define DRIVER_VERSION "0.4" 45#define DRIVER_VERSION "0.4"
53#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>" 46#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
@@ -60,9 +53,11 @@ MODULE_LICENSE("GPL");
60module_param(pciehp_debug, bool, 0644); 53module_param(pciehp_debug, bool, 0644);
61module_param(pciehp_poll_mode, bool, 0644); 54module_param(pciehp_poll_mode, bool, 0644);
62module_param(pciehp_poll_time, int, 0644); 55module_param(pciehp_poll_time, int, 0644);
56module_param(pciehp_force, bool, 0644);
63MODULE_PARM_DESC(pciehp_debug, "Debugging mode enabled or not"); 57MODULE_PARM_DESC(pciehp_debug, "Debugging mode enabled or not");
64MODULE_PARM_DESC(pciehp_poll_mode, "Using polling mechanism for hot-plug events or not"); 58MODULE_PARM_DESC(pciehp_poll_mode, "Using polling mechanism for hot-plug events or not");
65MODULE_PARM_DESC(pciehp_poll_time, "Polling mechanism frequency, in seconds"); 59MODULE_PARM_DESC(pciehp_poll_time, "Polling mechanism frequency, in seconds");
60MODULE_PARM_DESC(pciehp_force, "Force pciehp, even if _OSC and OSHP are missing");
66 61
67#define PCIE_MODULE_NAME "pciehp" 62#define PCIE_MODULE_NAME "pciehp"
68 63
@@ -114,8 +109,6 @@ static int init_slots(struct controller *ctrl)
114 u32 slot_number; 109 u32 slot_number;
115 int result = -ENOMEM; 110 int result = -ENOMEM;
116 111
117 dbg("%s\n",__FUNCTION__);
118
119 number_of_slots = ctrl->num_slots; 112 number_of_slots = ctrl->num_slots;
120 slot_device = ctrl->slot_device_offset; 113 slot_device = ctrl->slot_device_offset;
121 slot_number = ctrl->first_slot; 114 slot_number = ctrl->first_slot;
@@ -370,7 +363,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
370 u8 value; 363 u8 value;
371 struct pci_dev *pdev; 364 struct pci_dev *pdev;
372 365
373 dbg("%s: Called by hp_drv\n", __FUNCTION__);
374 ctrl = kmalloc(sizeof(*ctrl), GFP_KERNEL); 366 ctrl = kmalloc(sizeof(*ctrl), GFP_KERNEL);
375 if (!ctrl) { 367 if (!ctrl) {
376 err("%s : out of memory\n", __FUNCTION__); 368 err("%s : out of memory\n", __FUNCTION__);
@@ -378,22 +370,15 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
378 } 370 }
379 memset(ctrl, 0, sizeof(struct controller)); 371 memset(ctrl, 0, sizeof(struct controller));
380 372
381 dbg("%s: DRV_thread pid = %d\n", __FUNCTION__, current->pid);
382
383 pdev = dev->port; 373 pdev = dev->port;
374 ctrl->pci_dev = pdev;
384 375
385 rc = pcie_init(ctrl, dev, 376 rc = pcie_init(ctrl, dev);
386 (php_intr_callback_t) pciehp_handle_attention_button,
387 (php_intr_callback_t) pciehp_handle_switch_change,
388 (php_intr_callback_t) pciehp_handle_presence_change,
389 (php_intr_callback_t) pciehp_handle_power_fault);
390 if (rc) { 377 if (rc) {
391 dbg("%s: controller initialization failed\n", PCIE_MODULE_NAME); 378 dbg("%s: controller initialization failed\n", PCIE_MODULE_NAME);
392 goto err_out_free_ctrl; 379 goto err_out_free_ctrl;
393 } 380 }
394 381
395 ctrl->pci_dev = pdev;
396
397 pci_set_drvdata(pdev, ctrl); 382 pci_set_drvdata(pdev, ctrl);
398 383
399 ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL); 384 ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
@@ -402,7 +387,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
402 rc = -ENOMEM; 387 rc = -ENOMEM;
403 goto err_out_unmap_mmio_region; 388 goto err_out_unmap_mmio_region;
404 } 389 }
405 dbg("%s: ctrl->pci_bus %p\n", __FUNCTION__, ctrl->pci_bus);
406 memcpy (ctrl->pci_bus, pdev->bus, sizeof (*ctrl->pci_bus)); 390 memcpy (ctrl->pci_bus, pdev->bus, sizeof (*ctrl->pci_bus));
407 ctrl->bus = pdev->bus->number; /* ctrl bus */ 391 ctrl->bus = pdev->bus->number; /* ctrl bus */
408 ctrl->slot_bus = pdev->subordinate->number; /* bus controlled by this HPC */ 392 ctrl->slot_bus = pdev->subordinate->number; /* bus controlled by this HPC */
@@ -424,25 +408,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
424 first_device_num = ctrl->slot_device_offset; 408 first_device_num = ctrl->slot_device_offset;
425 num_ctlr_slots = ctrl->num_slots; 409 num_ctlr_slots = ctrl->num_slots;
426 410
427 /* Store PCI Config Space for all devices on this bus */
428 dbg("%s: Before calling pciehp_save_config, ctrl->bus %x,ctrl->slot_bus %x\n",
429 __FUNCTION__,ctrl->bus, ctrl->slot_bus);
430 rc = pciehp_save_config(ctrl, ctrl->slot_bus, num_ctlr_slots, first_device_num);
431 if (rc) {
432 err("%s: unable to save PCI configuration data, error %d\n", __FUNCTION__, rc);
433 goto err_out_free_ctrl_bus;
434 }
435
436 /* Get IO, memory, and IRQ resources for new devices */
437 rc = pciehprm_find_available_resources(ctrl);
438 ctrl->add_support = !rc;
439
440 if (rc) {
441 dbg("pciehprm_find_available_resources = %#x\n", rc);
442 err("unable to locate PCI configuration resources for hot plug add.\n");
443 goto err_out_free_ctrl_bus;
444 }
445
446 /* Setup the slot information structures */ 411 /* Setup the slot information structures */
447 rc = init_slots(ctrl); 412 rc = init_slots(ctrl);
448 if (rc) { 413 if (rc) {
@@ -451,7 +416,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
451 } 416 }
452 417
453 t_slot = pciehp_find_slot(ctrl, first_device_num); 418 t_slot = pciehp_find_slot(ctrl, first_device_num);
454 dbg("%s: t_slot %p\n", __FUNCTION__, t_slot);
455 419
456 /* Finish setting up the hot plug ctrl device */ 420 /* Finish setting up the hot plug ctrl device */
457 ctrl->next_event = 0; 421 ctrl->next_event = 0;
@@ -468,7 +432,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
468 down(&ctrl->crit_sect); 432 down(&ctrl->crit_sect);
469 433
470 t_slot->hpc_ops->get_adapter_status(t_slot, &value); /* Check if slot is occupied */ 434 t_slot->hpc_ops->get_adapter_status(t_slot, &value); /* Check if slot is occupied */
471 dbg("%s: adpater value %x\n", __FUNCTION__, value);
472 435
473 if ((POWER_CTRL(ctrl->ctrlcap)) && !value) { 436 if ((POWER_CTRL(ctrl->ctrlcap)) && !value) {
474 rc = t_slot->hpc_ops->power_off_slot(t_slot); /* Power off slot if not occupied*/ 437 rc = t_slot->hpc_ops->power_off_slot(t_slot); /* Power off slot if not occupied*/
@@ -501,7 +464,6 @@ err_out_none:
501 464
502static int pcie_start_thread(void) 465static int pcie_start_thread(void)
503{ 466{
504 int loop;
505 int retval = 0; 467 int retval = 0;
506 468
507 dbg("Initialize + Start the notification/polling mechanism \n"); 469 dbg("Initialize + Start the notification/polling mechanism \n");
@@ -512,32 +474,11 @@ static int pcie_start_thread(void)
512 return retval; 474 return retval;
513 } 475 }
514 476
515 dbg("Initialize slot lists\n");
516 /* One slot list for each bus in the system */
517 for (loop = 0; loop < 256; loop++) {
518 pciehp_slot_list[loop] = NULL;
519 }
520
521 return retval; 477 return retval;
522} 478}
523 479
524static inline void __exit
525free_pciehp_res(struct pci_resource *res)
526{
527 struct pci_resource *tres;
528
529 while (res) {
530 tres = res;
531 res = res->next;
532 kfree(tres);
533 }
534}
535
536static void __exit unload_pciehpd(void) 480static void __exit unload_pciehpd(void)
537{ 481{
538 struct pci_func *next;
539 struct pci_func *TempSlot;
540 int loop;
541 struct controller *ctrl; 482 struct controller *ctrl;
542 struct controller *tctrl; 483 struct controller *tctrl;
543 484
@@ -546,11 +487,6 @@ static void __exit unload_pciehpd(void)
546 while (ctrl) { 487 while (ctrl) {
547 cleanup_slots(ctrl); 488 cleanup_slots(ctrl);
548 489
549 free_pciehp_res(ctrl->io_head);
550 free_pciehp_res(ctrl->mem_head);
551 free_pciehp_res(ctrl->p_mem_head);
552 free_pciehp_res(ctrl->bus_head);
553
554 kfree (ctrl->pci_bus); 490 kfree (ctrl->pci_bus);
555 491
556 ctrl->hpc_ops->release_ctlr(ctrl); 492 ctrl->hpc_ops->release_ctlr(ctrl);
@@ -561,20 +497,6 @@ static void __exit unload_pciehpd(void)
561 kfree(tctrl); 497 kfree(tctrl);
562 } 498 }
563 499
564 for (loop = 0; loop < 256; loop++) {
565 next = pciehp_slot_list[loop];
566 while (next != NULL) {
567 free_pciehp_res(next->io_head);
568 free_pciehp_res(next->mem_head);
569 free_pciehp_res(next->p_mem_head);
570 free_pciehp_res(next->bus_head);
571
572 TempSlot = next;
573 next = next->next;
574 kfree(TempSlot);
575 }
576 }
577
578 /* Stop the notification mechanism */ 500 /* Stop the notification mechanism */
579 pciehp_event_stop_thread(); 501 pciehp_event_stop_thread();
580 502
@@ -639,21 +561,16 @@ static int __init pcied_init(void)
639 if (retval) 561 if (retval)
640 goto error_hpc_init; 562 goto error_hpc_init;
641 563
642 retval = pciehprm_init(PCI); 564 retval = pcie_port_service_register(&hpdriver_portdrv);
643 if (!retval) { 565 dbg("pcie_port_service_register = %d\n", retval);
644 retval = pcie_port_service_register(&hpdriver_portdrv); 566 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
645 dbg("pcie_port_service_register = %d\n", retval); 567 if (retval)
646 info(DRIVER_DESC " version: " DRIVER_VERSION "\n"); 568 dbg("%s: Failure to register service\n", __FUNCTION__);
647 if (retval)
648 dbg("%s: Failure to register service\n", __FUNCTION__);
649 }
650 569
651error_hpc_init: 570error_hpc_init:
652 if (retval) { 571 if (retval) {
653 pciehprm_cleanup();
654 pciehp_event_stop_thread(); 572 pciehp_event_stop_thread();
655 } else 573 };
656 pciehprm_print_pirt();
657 574
658 return retval; 575 return retval;
659} 576}
@@ -663,9 +580,6 @@ static void __exit pcied_cleanup(void)
663 dbg("unload_pciehpd()\n"); 580 dbg("unload_pciehpd()\n");
664 unload_pciehpd(); 581 unload_pciehpd();
665 582
666 pciehprm_cleanup();
667
668 dbg("pcie_port_service_unregister\n");
669 pcie_port_service_unregister(&hpdriver_portdrv); 583 pcie_port_service_unregister(&hpdriver_portdrv);
670 584
671 info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n"); 585 info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n");
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c
index 898f6da6f0de..83c4b865718a 100644
--- a/drivers/pci/hotplug/pciehp_ctrl.c
+++ b/drivers/pci/hotplug/pciehp_ctrl.c
@@ -27,25 +27,14 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/workqueue.h>
36#include <linux/interrupt.h>
37#include <linux/delay.h>
38#include <linux/wait.h>
39#include <linux/smp_lock.h> 33#include <linux/smp_lock.h>
40#include <linux/pci.h> 34#include <linux/pci.h>
41#include "../pci.h" 35#include "../pci.h"
42#include "pciehp.h" 36#include "pciehp.h"
43#include "pciehprm.h"
44 37
45static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
46 u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
47static int configure_new_function( struct controller *ctrl, struct pci_func *func,
48 u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
49static void interrupt_event_handler(struct controller *ctrl); 38static void interrupt_event_handler(struct controller *ctrl);
50 39
51static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */ 40static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */
@@ -60,22 +49,18 @@ u8 pciehp_handle_attention_button(u8 hp_slot, void *inst_id)
60 struct slot *p_slot; 49 struct slot *p_slot;
61 u8 rc = 0; 50 u8 rc = 0;
62 u8 getstatus; 51 u8 getstatus;
63 struct pci_func *func;
64 struct event_info *taskInfo; 52 struct event_info *taskInfo;
65 53
66 /* Attention Button Change */ 54 /* Attention Button Change */
67 dbg("pciehp: Attention button interrupt received.\n"); 55 dbg("pciehp: Attention button interrupt received.\n");
68 56
69 func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
70
71 /* This is the structure that tells the worker thread what to do */ 57 /* This is the structure that tells the worker thread what to do */
72 taskInfo = &(ctrl->event_queue[ctrl->next_event]); 58 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
73 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 59 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
74 60
75 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
76 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 61 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
77 62
78 ctrl->next_event = (ctrl->next_event + 1) % 10; 63 ctrl->next_event = (ctrl->next_event + 1) % MAX_EVENTS;
79 taskInfo->hp_slot = hp_slot; 64 taskInfo->hp_slot = hp_slot;
80 65
81 rc++; 66 rc++;
@@ -117,24 +102,20 @@ u8 pciehp_handle_switch_change(u8 hp_slot, void *inst_id)
117 struct slot *p_slot; 102 struct slot *p_slot;
118 u8 rc = 0; 103 u8 rc = 0;
119 u8 getstatus; 104 u8 getstatus;
120 struct pci_func *func;
121 struct event_info *taskInfo; 105 struct event_info *taskInfo;
122 106
123 /* Switch Change */ 107 /* Switch Change */
124 dbg("pciehp: Switch interrupt received.\n"); 108 dbg("pciehp: Switch interrupt received.\n");
125 109
126 func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
127
128 /* This is the structure that tells the worker thread 110 /* This is the structure that tells the worker thread
129 * what to do 111 * what to do
130 */ 112 */
131 taskInfo = &(ctrl->event_queue[ctrl->next_event]); 113 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
132 ctrl->next_event = (ctrl->next_event + 1) % 10; 114 ctrl->next_event = (ctrl->next_event + 1) % MAX_EVENTS;
133 taskInfo->hp_slot = hp_slot; 115 taskInfo->hp_slot = hp_slot;
134 116
135 rc++; 117 rc++;
136 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 118 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
137 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
138 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 119 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
139 120
140 if (getstatus) { 121 if (getstatus) {
@@ -142,14 +123,12 @@ u8 pciehp_handle_switch_change(u8 hp_slot, void *inst_id)
142 * Switch opened 123 * Switch opened
143 */ 124 */
144 info("Latch open on Slot(%d)\n", ctrl->first_slot + hp_slot); 125 info("Latch open on Slot(%d)\n", ctrl->first_slot + hp_slot);
145 func->switch_save = 0;
146 taskInfo->event_type = INT_SWITCH_OPEN; 126 taskInfo->event_type = INT_SWITCH_OPEN;
147 } else { 127 } else {
148 /* 128 /*
149 * Switch closed 129 * Switch closed
150 */ 130 */
151 info("Latch close on Slot(%d)\n", ctrl->first_slot + hp_slot); 131 info("Latch close on Slot(%d)\n", ctrl->first_slot + hp_slot);
152 func->switch_save = 0x10;
153 taskInfo->event_type = INT_SWITCH_CLOSE; 132 taskInfo->event_type = INT_SWITCH_CLOSE;
154 } 133 }
155 134
@@ -163,20 +142,17 @@ u8 pciehp_handle_presence_change(u8 hp_slot, void *inst_id)
163{ 142{
164 struct controller *ctrl = (struct controller *) inst_id; 143 struct controller *ctrl = (struct controller *) inst_id;
165 struct slot *p_slot; 144 struct slot *p_slot;
166 u8 rc = 0; 145 u8 presence_save, rc = 0;
167 struct pci_func *func;
168 struct event_info *taskInfo; 146 struct event_info *taskInfo;
169 147
170 /* Presence Change */ 148 /* Presence Change */
171 dbg("pciehp: Presence/Notify input change.\n"); 149 dbg("pciehp: Presence/Notify input change.\n");
172 150
173 func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
174
175 /* This is the structure that tells the worker thread 151 /* This is the structure that tells the worker thread
176 * what to do 152 * what to do
177 */ 153 */
178 taskInfo = &(ctrl->event_queue[ctrl->next_event]); 154 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
179 ctrl->next_event = (ctrl->next_event + 1) % 10; 155 ctrl->next_event = (ctrl->next_event + 1) % MAX_EVENTS;
180 taskInfo->hp_slot = hp_slot; 156 taskInfo->hp_slot = hp_slot;
181 157
182 rc++; 158 rc++;
@@ -185,8 +161,8 @@ u8 pciehp_handle_presence_change(u8 hp_slot, void *inst_id)
185 /* Switch is open, assume a presence change 161 /* Switch is open, assume a presence change
186 * Save the presence state 162 * Save the presence state
187 */ 163 */
188 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); 164 p_slot->hpc_ops->get_adapter_status(p_slot, &presence_save);
189 if (func->presence_save) { 165 if (presence_save) {
190 /* 166 /*
191 * Card Present 167 * Card Present
192 */ 168 */
@@ -211,19 +187,16 @@ u8 pciehp_handle_power_fault(u8 hp_slot, void *inst_id)
211 struct controller *ctrl = (struct controller *) inst_id; 187 struct controller *ctrl = (struct controller *) inst_id;
212 struct slot *p_slot; 188 struct slot *p_slot;
213 u8 rc = 0; 189 u8 rc = 0;
214 struct pci_func *func;
215 struct event_info *taskInfo; 190 struct event_info *taskInfo;
216 191
217 /* power fault */ 192 /* power fault */
218 dbg("pciehp: Power fault interrupt received.\n"); 193 dbg("pciehp: Power fault interrupt received.\n");
219 194
220 func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
221
222 /* this is the structure that tells the worker thread 195 /* this is the structure that tells the worker thread
223 * what to do 196 * what to do
224 */ 197 */
225 taskInfo = &(ctrl->event_queue[ctrl->next_event]); 198 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
226 ctrl->next_event = (ctrl->next_event + 1) % 10; 199 ctrl->next_event = (ctrl->next_event + 1) % MAX_EVENTS;
227 taskInfo->hp_slot = hp_slot; 200 taskInfo->hp_slot = hp_slot;
228 201
229 rc++; 202 rc++;
@@ -234,7 +207,6 @@ u8 pciehp_handle_power_fault(u8 hp_slot, void *inst_id)
234 * power fault Cleared 207 * power fault Cleared
235 */ 208 */
236 info("Power fault cleared on Slot(%d)\n", ctrl->first_slot + hp_slot); 209 info("Power fault cleared on Slot(%d)\n", ctrl->first_slot + hp_slot);
237 func->status = 0x00;
238 taskInfo->event_type = INT_POWER_FAULT_CLEAR; 210 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
239 } else { 211 } else {
240 /* 212 /*
@@ -242,8 +214,6 @@ u8 pciehp_handle_power_fault(u8 hp_slot, void *inst_id)
242 */ 214 */
243 info("Power fault on Slot(%d)\n", ctrl->first_slot + hp_slot); 215 info("Power fault on Slot(%d)\n", ctrl->first_slot + hp_slot);
244 taskInfo->event_type = INT_POWER_FAULT; 216 taskInfo->event_type = INT_POWER_FAULT;
245 /* set power fault status for this board */
246 func->status = 0xFF;
247 info("power fault bit %x set\n", hp_slot); 217 info("power fault bit %x set\n", hp_slot);
248 } 218 }
249 if (rc) 219 if (rc)
@@ -252,810 +222,6 @@ u8 pciehp_handle_power_fault(u8 hp_slot, void *inst_id)
252 return rc; 222 return rc;
253} 223}
254 224
255
256/**
257 * sort_by_size: sort nodes by their length, smallest first.
258 *
259 * @head: list to sort
260 */
261static int sort_by_size(struct pci_resource **head)
262{
263 struct pci_resource *current_res;
264 struct pci_resource *next_res;
265 int out_of_order = 1;
266
267 if (!(*head))
268 return 1;
269
270 if (!((*head)->next))
271 return 0;
272
273 while (out_of_order) {
274 out_of_order = 0;
275
276 /* Special case for swapping list head */
277 if (((*head)->next) &&
278 ((*head)->length > (*head)->next->length)) {
279 out_of_order++;
280 current_res = *head;
281 *head = (*head)->next;
282 current_res->next = (*head)->next;
283 (*head)->next = current_res;
284 }
285
286 current_res = *head;
287
288 while (current_res->next && current_res->next->next) {
289 if (current_res->next->length > current_res->next->next->length) {
290 out_of_order++;
291 next_res = current_res->next;
292 current_res->next = current_res->next->next;
293 current_res = current_res->next;
294 next_res->next = current_res->next;
295 current_res->next = next_res;
296 } else
297 current_res = current_res->next;
298 }
299 } /* End of out_of_order loop */
300
301 return 0;
302}
303
304
305/*
306 * sort_by_max_size
307 *
308 * Sorts nodes on the list by their length.
309 * Largest first.
310 *
311 */
312static int sort_by_max_size(struct pci_resource **head)
313{
314 struct pci_resource *current_res;
315 struct pci_resource *next_res;
316 int out_of_order = 1;
317
318 if (!(*head))
319 return 1;
320
321 if (!((*head)->next))
322 return 0;
323
324 while (out_of_order) {
325 out_of_order = 0;
326
327 /* Special case for swapping list head */
328 if (((*head)->next) &&
329 ((*head)->length < (*head)->next->length)) {
330 out_of_order++;
331 current_res = *head;
332 *head = (*head)->next;
333 current_res->next = (*head)->next;
334 (*head)->next = current_res;
335 }
336
337 current_res = *head;
338
339 while (current_res->next && current_res->next->next) {
340 if (current_res->next->length < current_res->next->next->length) {
341 out_of_order++;
342 next_res = current_res->next;
343 current_res->next = current_res->next->next;
344 current_res = current_res->next;
345 next_res->next = current_res->next;
346 current_res->next = next_res;
347 } else
348 current_res = current_res->next;
349 }
350 } /* End of out_of_order loop */
351
352 return 0;
353}
354
355
356/**
357 * do_pre_bridge_resource_split: return one unused resource node
358 * @head: list to scan
359 *
360 */
361static struct pci_resource *
362do_pre_bridge_resource_split(struct pci_resource **head,
363 struct pci_resource **orig_head, u32 alignment)
364{
365 struct pci_resource *prevnode = NULL;
366 struct pci_resource *node;
367 struct pci_resource *split_node;
368 u32 rc;
369 u32 temp_dword;
370 dbg("do_pre_bridge_resource_split\n");
371
372 if (!(*head) || !(*orig_head))
373 return NULL;
374
375 rc = pciehp_resource_sort_and_combine(head);
376
377 if (rc)
378 return NULL;
379
380 if ((*head)->base != (*orig_head)->base)
381 return NULL;
382
383 if ((*head)->length == (*orig_head)->length)
384 return NULL;
385
386
387 /* If we got here, there the bridge requires some of the resource, but
388 * we may be able to split some off of the front
389 */
390 node = *head;
391
392 if (node->length & (alignment -1)) {
393 /* this one isn't an aligned length, so we'll make a new entry
394 * and split it up.
395 */
396 split_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
397
398 if (!split_node)
399 return NULL;
400
401 temp_dword = (node->length | (alignment-1)) + 1 - alignment;
402
403 split_node->base = node->base;
404 split_node->length = temp_dword;
405
406 node->length -= temp_dword;
407 node->base += split_node->length;
408
409 /* Put it in the list */
410 *head = split_node;
411 split_node->next = node;
412 }
413
414 if (node->length < alignment)
415 return NULL;
416
417 /* Now unlink it */
418 if (*head == node) {
419 *head = node->next;
420 } else {
421 prevnode = *head;
422 while (prevnode->next != node)
423 prevnode = prevnode->next;
424
425 prevnode->next = node->next;
426 }
427 node->next = NULL;
428
429 return node;
430}
431
432
433/**
434 * do_bridge_resource_split: return one unused resource node
435 * @head: list to scan
436 *
437 */
438static struct pci_resource *
439do_bridge_resource_split(struct pci_resource **head, u32 alignment)
440{
441 struct pci_resource *prevnode = NULL;
442 struct pci_resource *node;
443 u32 rc;
444 u32 temp_dword;
445
446 if (!(*head))
447 return NULL;
448
449 rc = pciehp_resource_sort_and_combine(head);
450
451 if (rc)
452 return NULL;
453
454 node = *head;
455
456 while (node->next) {
457 prevnode = node;
458 node = node->next;
459 kfree(prevnode);
460 }
461
462 if (node->length < alignment) {
463 kfree(node);
464 return NULL;
465 }
466
467 if (node->base & (alignment - 1)) {
468 /* Short circuit if adjusted size is too small */
469 temp_dword = (node->base | (alignment-1)) + 1;
470 if ((node->length - (temp_dword - node->base)) < alignment) {
471 kfree(node);
472 return NULL;
473 }
474
475 node->length -= (temp_dword - node->base);
476 node->base = temp_dword;
477 }
478
479 if (node->length & (alignment - 1)) {
480 /* There's stuff in use after this node */
481 kfree(node);
482 return NULL;
483 }
484
485 return node;
486}
487
488
489/*
490 * get_io_resource
491 *
492 * this function sorts the resource list by size and then
493 * returns the first node of "size" length that is not in the
494 * ISA aliasing window. If it finds a node larger than "size"
495 * it will split it up.
496 *
497 * size must be a power of two.
498 */
499static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size)
500{
501 struct pci_resource *prevnode;
502 struct pci_resource *node;
503 struct pci_resource *split_node = NULL;
504 u32 temp_dword;
505
506 if (!(*head))
507 return NULL;
508
509 if ( pciehp_resource_sort_and_combine(head) )
510 return NULL;
511
512 if ( sort_by_size(head) )
513 return NULL;
514
515 for (node = *head; node; node = node->next) {
516 if (node->length < size)
517 continue;
518
519 if (node->base & (size - 1)) {
520 /* this one isn't base aligned properly
521 so we'll make a new entry and split it up */
522 temp_dword = (node->base | (size-1)) + 1;
523
524 /*/ Short circuit if adjusted size is too small */
525 if ((node->length - (temp_dword - node->base)) < size)
526 continue;
527
528 split_node = kmalloc(sizeof(struct pci_resource),
529 GFP_KERNEL);
530
531 if (!split_node)
532 return NULL;
533
534 split_node->base = node->base;
535 split_node->length = temp_dword - node->base;
536 node->base = temp_dword;
537 node->length -= split_node->length;
538
539 /* Put it in the list */
540 split_node->next = node->next;
541 node->next = split_node;
542 } /* End of non-aligned base */
543
544 /* Don't need to check if too small since we already did */
545 if (node->length > size) {
546 /* this one is longer than we need
547 so we'll make a new entry and split it up */
548 split_node = kmalloc(sizeof(struct pci_resource),
549 GFP_KERNEL);
550
551 if (!split_node)
552 return NULL;
553
554 split_node->base = node->base + size;
555 split_node->length = node->length - size;
556 node->length = size;
557
558 /* Put it in the list */
559 split_node->next = node->next;
560 node->next = split_node;
561 } /* End of too big on top end */
562
563 /* For IO make sure it's not in the ISA aliasing space */
564 if (node->base & 0x300L)
565 continue;
566
567 /* If we got here, then it is the right size
568 Now take it out of the list */
569 if (*head == node) {
570 *head = node->next;
571 } else {
572 prevnode = *head;
573 while (prevnode->next != node)
574 prevnode = prevnode->next;
575
576 prevnode->next = node->next;
577 }
578 node->next = NULL;
579 /* Stop looping */
580 break;
581 }
582
583 return node;
584}
585
586
587/*
588 * get_max_resource
589 *
590 * Gets the largest node that is at least "size" big from the
591 * list pointed to by head. It aligns the node on top and bottom
592 * to "size" alignment before returning it.
593 * J.I. modified to put max size limits of; 64M->32M->16M->8M->4M->1M
594 * This is needed to avoid allocating entire ACPI _CRS res to one child bridge/slot.
595 */
596static struct pci_resource *get_max_resource(struct pci_resource **head, u32 size)
597{
598 struct pci_resource *max;
599 struct pci_resource *temp;
600 struct pci_resource *split_node;
601 u32 temp_dword;
602 u32 max_size[] = { 0x4000000, 0x2000000, 0x1000000, 0x0800000, 0x0400000, 0x0200000, 0x0100000, 0x00 };
603 int i;
604
605 if (!(*head))
606 return NULL;
607
608 if (pciehp_resource_sort_and_combine(head))
609 return NULL;
610
611 if (sort_by_max_size(head))
612 return NULL;
613
614 for (max = *head;max; max = max->next) {
615
616 /* If not big enough we could probably just bail,
617 instead we'll continue to the next. */
618 if (max->length < size)
619 continue;
620
621 if (max->base & (size - 1)) {
622 /* this one isn't base aligned properly
623 so we'll make a new entry and split it up */
624 temp_dword = (max->base | (size-1)) + 1;
625
626 /* Short circuit if adjusted size is too small */
627 if ((max->length - (temp_dword - max->base)) < size)
628 continue;
629
630 split_node = kmalloc(sizeof(struct pci_resource),
631 GFP_KERNEL);
632
633 if (!split_node)
634 return NULL;
635
636 split_node->base = max->base;
637 split_node->length = temp_dword - max->base;
638 max->base = temp_dword;
639 max->length -= split_node->length;
640
641 /* Put it next in the list */
642 split_node->next = max->next;
643 max->next = split_node;
644 }
645
646 if ((max->base + max->length) & (size - 1)) {
647 /* this one isn't end aligned properly at the top
648 so we'll make a new entry and split it up */
649 split_node = kmalloc(sizeof(struct pci_resource),
650 GFP_KERNEL);
651
652 if (!split_node)
653 return NULL;
654 temp_dword = ((max->base + max->length) & ~(size - 1));
655 split_node->base = temp_dword;
656 split_node->length = max->length + max->base
657 - split_node->base;
658 max->length -= split_node->length;
659
660 /* Put it in the list */
661 split_node->next = max->next;
662 max->next = split_node;
663 }
664
665 /* Make sure it didn't shrink too much when we aligned it */
666 if (max->length < size)
667 continue;
668
669 for ( i = 0; max_size[i] > size; i++) {
670 if (max->length > max_size[i]) {
671 split_node = kmalloc(sizeof(struct pci_resource),
672 GFP_KERNEL);
673 if (!split_node)
674 break; /* return NULL; */
675 split_node->base = max->base + max_size[i];
676 split_node->length = max->length - max_size[i];
677 max->length = max_size[i];
678 /* Put it next in the list */
679 split_node->next = max->next;
680 max->next = split_node;
681 break;
682 }
683 }
684
685 /* Now take it out of the list */
686 temp = (struct pci_resource*) *head;
687 if (temp == max) {
688 *head = max->next;
689 } else {
690 while (temp && temp->next != max) {
691 temp = temp->next;
692 }
693
694 temp->next = max->next;
695 }
696
697 max->next = NULL;
698 return max;
699 }
700
701 /* If we get here, we couldn't find one */
702 return NULL;
703}
704
705
706/*
707 * get_resource
708 *
709 * this function sorts the resource list by size and then
710 * returns the first node of "size" length. If it finds a node
711 * larger than "size" it will split it up.
712 *
713 * size must be a power of two.
714 */
715static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
716{
717 struct pci_resource *prevnode;
718 struct pci_resource *node;
719 struct pci_resource *split_node;
720 u32 temp_dword;
721
722 if (!(*head))
723 return NULL;
724
725 if ( pciehp_resource_sort_and_combine(head) )
726 return NULL;
727
728 if ( sort_by_size(head) )
729 return NULL;
730
731 for (node = *head; node; node = node->next) {
732 dbg("%s: req_size =0x%x node=%p, base=0x%x, length=0x%x\n",
733 __FUNCTION__, size, node, node->base, node->length);
734 if (node->length < size)
735 continue;
736
737 if (node->base & (size - 1)) {
738 dbg("%s: not aligned\n", __FUNCTION__);
739 /* this one isn't base aligned properly
740 so we'll make a new entry and split it up */
741 temp_dword = (node->base | (size-1)) + 1;
742
743 /* Short circuit if adjusted size is too small */
744 if ((node->length - (temp_dword - node->base)) < size)
745 continue;
746
747 split_node = kmalloc(sizeof(struct pci_resource),
748 GFP_KERNEL);
749
750 if (!split_node)
751 return NULL;
752
753 split_node->base = node->base;
754 split_node->length = temp_dword - node->base;
755 node->base = temp_dword;
756 node->length -= split_node->length;
757
758 /* Put it in the list */
759 split_node->next = node->next;
760 node->next = split_node;
761 } /* End of non-aligned base */
762
763 /* Don't need to check if too small since we already did */
764 if (node->length > size) {
765 dbg("%s: too big\n", __FUNCTION__);
766 /* this one is longer than we need
767 so we'll make a new entry and split it up */
768 split_node = kmalloc(sizeof(struct pci_resource),
769 GFP_KERNEL);
770
771 if (!split_node)
772 return NULL;
773
774 split_node->base = node->base + size;
775 split_node->length = node->length - size;
776 node->length = size;
777
778 /* Put it in the list */
779 split_node->next = node->next;
780 node->next = split_node;
781 } /* End of too big on top end */
782
783 dbg("%s: got one!!!\n", __FUNCTION__);
784 /* If we got here, then it is the right size
785 Now take it out of the list */
786 if (*head == node) {
787 *head = node->next;
788 } else {
789 prevnode = *head;
790 while (prevnode->next != node)
791 prevnode = prevnode->next;
792
793 prevnode->next = node->next;
794 }
795 node->next = NULL;
796 /* Stop looping */
797 break;
798 }
799 return node;
800}
801
802
803/*
804 * pciehp_resource_sort_and_combine
805 *
806 * Sorts all of the nodes in the list in ascending order by
807 * their base addresses. Also does garbage collection by
808 * combining adjacent nodes.
809 *
810 * returns 0 if success
811 */
812int pciehp_resource_sort_and_combine(struct pci_resource **head)
813{
814 struct pci_resource *node1;
815 struct pci_resource *node2;
816 int out_of_order = 1;
817
818 dbg("%s: head = %p, *head = %p\n", __FUNCTION__, head, *head);
819
820 if (!(*head))
821 return 1;
822
823 dbg("*head->next = %p\n",(*head)->next);
824
825 if (!(*head)->next)
826 return 0; /* only one item on the list, already sorted! */
827
828 dbg("*head->base = 0x%x\n",(*head)->base);
829 dbg("*head->next->base = 0x%x\n",(*head)->next->base);
830 while (out_of_order) {
831 out_of_order = 0;
832
833 /* Special case for swapping list head */
834 if (((*head)->next) &&
835 ((*head)->base > (*head)->next->base)) {
836 node1 = *head;
837 (*head) = (*head)->next;
838 node1->next = (*head)->next;
839 (*head)->next = node1;
840 out_of_order++;
841 }
842
843 node1 = (*head);
844
845 while (node1->next && node1->next->next) {
846 if (node1->next->base > node1->next->next->base) {
847 out_of_order++;
848 node2 = node1->next;
849 node1->next = node1->next->next;
850 node1 = node1->next;
851 node2->next = node1->next;
852 node1->next = node2;
853 } else
854 node1 = node1->next;
855 }
856 } /* End of out_of_order loop */
857
858 node1 = *head;
859
860 while (node1 && node1->next) {
861 if ((node1->base + node1->length) == node1->next->base) {
862 /* Combine */
863 dbg("8..\n");
864 node1->length += node1->next->length;
865 node2 = node1->next;
866 node1->next = node1->next->next;
867 kfree(node2);
868 } else
869 node1 = node1->next;
870 }
871
872 return 0;
873}
874
875
876/**
877 * pciehp_slot_create - Creates a node and adds it to the proper bus.
878 * @busnumber - bus where new node is to be located
879 *
880 * Returns pointer to the new node or NULL if unsuccessful
881 */
882struct pci_func *pciehp_slot_create(u8 busnumber)
883{
884 struct pci_func *new_slot;
885 struct pci_func *next;
886 dbg("%s: busnumber %x\n", __FUNCTION__, busnumber);
887 new_slot = kmalloc(sizeof(struct pci_func), GFP_KERNEL);
888
889 if (new_slot == NULL)
890 return new_slot;
891
892 memset(new_slot, 0, sizeof(struct pci_func));
893
894 new_slot->next = NULL;
895 new_slot->configured = 1;
896
897 if (pciehp_slot_list[busnumber] == NULL) {
898 pciehp_slot_list[busnumber] = new_slot;
899 } else {
900 next = pciehp_slot_list[busnumber];
901 while (next->next != NULL)
902 next = next->next;
903 next->next = new_slot;
904 }
905 return new_slot;
906}
907
908
909/**
910 * slot_remove - Removes a node from the linked list of slots.
911 * @old_slot: slot to remove
912 *
913 * Returns 0 if successful, !0 otherwise.
914 */
915static int slot_remove(struct pci_func * old_slot)
916{
917 struct pci_func *next;
918
919 if (old_slot == NULL)
920 return 1;
921
922 next = pciehp_slot_list[old_slot->bus];
923
924 if (next == NULL)
925 return 1;
926
927 if (next == old_slot) {
928 pciehp_slot_list[old_slot->bus] = old_slot->next;
929 pciehp_destroy_board_resources(old_slot);
930 kfree(old_slot);
931 return 0;
932 }
933
934 while ((next->next != old_slot) && (next->next != NULL)) {
935 next = next->next;
936 }
937
938 if (next->next == old_slot) {
939 next->next = old_slot->next;
940 pciehp_destroy_board_resources(old_slot);
941 kfree(old_slot);
942 return 0;
943 } else
944 return 2;
945}
946
947
948/**
949 * bridge_slot_remove - Removes a node from the linked list of slots.
950 * @bridge: bridge to remove
951 *
952 * Returns 0 if successful, !0 otherwise.
953 */
954static int bridge_slot_remove(struct pci_func *bridge)
955{
956 u8 subordinateBus, secondaryBus;
957 u8 tempBus;
958 struct pci_func *next;
959
960 if (bridge == NULL)
961 return 1;
962
963 secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
964 subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
965
966 for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
967 next = pciehp_slot_list[tempBus];
968
969 while (!slot_remove(next)) {
970 next = pciehp_slot_list[tempBus];
971 }
972 }
973
974 next = pciehp_slot_list[bridge->bus];
975
976 if (next == NULL) {
977 return 1;
978 }
979
980 if (next == bridge) {
981 pciehp_slot_list[bridge->bus] = bridge->next;
982 kfree(bridge);
983 return 0;
984 }
985
986 while ((next->next != bridge) && (next->next != NULL)) {
987 next = next->next;
988 }
989
990 if (next->next == bridge) {
991 next->next = bridge->next;
992 kfree(bridge);
993 return 0;
994 } else
995 return 2;
996}
997
998
999/**
1000 * pciehp_slot_find - Looks for a node by bus, and device, multiple functions accessed
1001 * @bus: bus to find
1002 * @device: device to find
1003 * @index: is 0 for first function found, 1 for the second...
1004 *
1005 * Returns pointer to the node if successful, %NULL otherwise.
1006 */
1007struct pci_func *pciehp_slot_find(u8 bus, u8 device, u8 index)
1008{
1009 int found = -1;
1010 struct pci_func *func;
1011
1012 func = pciehp_slot_list[bus];
1013 dbg("%s: bus %x device %x index %x\n",
1014 __FUNCTION__, bus, device, index);
1015 if (func != NULL) {
1016 dbg("%s: func-> bus %x device %x function %x pci_dev %p\n",
1017 __FUNCTION__, func->bus, func->device, func->function,
1018 func->pci_dev);
1019 } else
1020 dbg("%s: func == NULL\n", __FUNCTION__);
1021
1022 if ((func == NULL) || ((func->device == device) && (index == 0)))
1023 return func;
1024
1025 if (func->device == device)
1026 found++;
1027
1028 while (func->next != NULL) {
1029 func = func->next;
1030
1031 dbg("%s: In while loop, func-> bus %x device %x function %x pci_dev %p\n",
1032 __FUNCTION__, func->bus, func->device, func->function,
1033 func->pci_dev);
1034 if (func->device == device)
1035 found++;
1036 dbg("%s: while loop, found %d, index %d\n", __FUNCTION__,
1037 found, index);
1038
1039 if ((found == index) || (func->function == index)) {
1040 dbg("%s: Found bus %x dev %x func %x\n", __FUNCTION__,
1041 func->bus, func->device, func->function);
1042 return func;
1043 }
1044 }
1045
1046 return NULL;
1047}
1048
1049static int is_bridge(struct pci_func * func)
1050{
1051 /* Check the header type */
1052 if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1053 return 1;
1054 else
1055 return 0;
1056}
1057
1058
1059/* The following routines constitute the bulk of the 225/* The following routines constitute the bulk of the
1060 hotplug controller logic 226 hotplug controller logic
1061 */ 227 */
@@ -1100,20 +266,17 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot)
1100 * Configures board 266 * Configures board
1101 * 267 *
1102 */ 268 */
1103static u32 board_added(struct pci_func * func, struct controller * ctrl) 269static int board_added(struct slot *p_slot)
1104{ 270{
1105 u8 hp_slot; 271 u8 hp_slot;
1106 int index; 272 int rc = 0;
1107 u32 temp_register = 0xFFFFFFFF; 273 struct controller *ctrl = p_slot->ctrl;
1108 u32 rc = 0;
1109 struct pci_func *new_func = NULL;
1110 struct slot *p_slot;
1111 struct resource_lists res_lists;
1112 274
1113 p_slot = pciehp_find_slot(ctrl, func->device); 275 hp_slot = p_slot->device - ctrl->slot_device_offset;
1114 hp_slot = func->device - ctrl->slot_device_offset;
1115 276
1116 dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n", __FUNCTION__, func->device, ctrl->slot_device_offset, hp_slot); 277 dbg("%s: slot device, slot offset, hp slot = %d, %d ,%d\n",
278 __FUNCTION__, p_slot->device,
279 ctrl->slot_device_offset, hp_slot);
1117 280
1118 /* Wait for exclusive access to hardware */ 281 /* Wait for exclusive access to hardware */
1119 down(&ctrl->crit_sect); 282 down(&ctrl->crit_sect);
@@ -1141,9 +304,7 @@ static u32 board_added(struct pci_func * func, struct controller * ctrl)
1141 up(&ctrl->crit_sect); 304 up(&ctrl->crit_sect);
1142 305
1143 /* Wait for ~1 second */ 306 /* Wait for ~1 second */
1144 dbg("%s: before long_delay\n", __FUNCTION__);
1145 wait_for_ctrl_irq (ctrl); 307 wait_for_ctrl_irq (ctrl);
1146 dbg("%s: afterlong_delay\n", __FUNCTION__);
1147 308
1148 /* Check link training status */ 309 /* Check link training status */
1149 rc = p_slot->hpc_ops->check_lnk_status(ctrl); 310 rc = p_slot->hpc_ops->check_lnk_status(ctrl);
@@ -1153,98 +314,42 @@ static u32 board_added(struct pci_func * func, struct controller * ctrl)
1153 return rc; 314 return rc;
1154 } 315 }
1155 316
1156 dbg("%s: func status = %x\n", __FUNCTION__, func->status);
1157
1158 /* Check for a power fault */ 317 /* Check for a power fault */
1159 if (func->status == 0xFF) { 318 if (p_slot->hpc_ops->query_power_fault(p_slot)) {
1160 /* power fault occurred, but it was benign */ 319 dbg("%s: power fault detected\n", __FUNCTION__);
1161 temp_register = 0xFFFFFFFF;
1162 dbg("%s: temp register set to %x by power fault\n", __FUNCTION__, temp_register);
1163 rc = POWER_FAILURE; 320 rc = POWER_FAILURE;
1164 func->status = 0; 321 goto err_exit;
1165 } else {
1166 /* Get vendor/device ID u32 */
1167 rc = pci_bus_read_config_dword (ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function),
1168 PCI_VENDOR_ID, &temp_register);
1169 dbg("%s: pci_bus_read_config_dword returns %d\n", __FUNCTION__, rc);
1170 dbg("%s: temp_register is %x\n", __FUNCTION__, temp_register);
1171
1172 if (rc != 0) {
1173 /* Something's wrong here */
1174 temp_register = 0xFFFFFFFF;
1175 dbg("%s: temp register set to %x by error\n", __FUNCTION__, temp_register);
1176 }
1177 /* Preset return code. It will be changed later if things go okay. */
1178 rc = NO_ADAPTER_PRESENT;
1179 } 322 }
1180 323
1181 /* All F's is an empty slot or an invalid board */ 324 rc = pciehp_configure_device(p_slot);
1182 if (temp_register != 0xFFFFFFFF) { /* Check for a board in the slot */ 325 if (rc) {
1183 res_lists.io_head = ctrl->io_head; 326 err("Cannot add device 0x%x:%x\n", p_slot->bus,
1184 res_lists.mem_head = ctrl->mem_head; 327 p_slot->device);
1185 res_lists.p_mem_head = ctrl->p_mem_head; 328 goto err_exit;
1186 res_lists.bus_head = ctrl->bus_head; 329 }
1187 res_lists.irqs = NULL;
1188
1189 rc = configure_new_device(ctrl, func, 0, &res_lists, 0, 0);
1190 dbg("%s: back from configure_new_device\n", __FUNCTION__);
1191
1192 ctrl->io_head = res_lists.io_head;
1193 ctrl->mem_head = res_lists.mem_head;
1194 ctrl->p_mem_head = res_lists.p_mem_head;
1195 ctrl->bus_head = res_lists.bus_head;
1196
1197 pciehp_resource_sort_and_combine(&(ctrl->mem_head));
1198 pciehp_resource_sort_and_combine(&(ctrl->p_mem_head));
1199 pciehp_resource_sort_and_combine(&(ctrl->io_head));
1200 pciehp_resource_sort_and_combine(&(ctrl->bus_head));
1201
1202 if (rc) {
1203 set_slot_off(ctrl, p_slot);
1204 return rc;
1205 }
1206 pciehp_save_slot_config(ctrl, func);
1207 330
1208 func->status = 0; 331 /*
1209 func->switch_save = 0x10; 332 * Some PCI Express root ports require fixup after hot-plug operation.
1210 func->is_a_board = 0x01; 333 */
334 if (pcie_mch_quirk)
335 pci_fixup_device(pci_fixup_final, ctrl->pci_dev);
336 if (PWR_LED(ctrl->ctrlcap)) {
337 /* Wait for exclusive access to hardware */
338 down(&ctrl->crit_sect);
1211 339
1212 /* next, we will instantiate the linux pci_dev structures 340 p_slot->hpc_ops->green_led_on(p_slot);
1213 * (with appropriate driver notification, if already present)
1214 */
1215 index = 0;
1216 do {
1217 new_func = pciehp_slot_find(ctrl->slot_bus, func->device, index++);
1218 if (new_func && !new_func->pci_dev) {
1219 dbg("%s:call pci_hp_configure_dev, func %x\n",
1220 __FUNCTION__, index);
1221 pciehp_configure_device(ctrl, new_func);
1222 }
1223 } while (new_func);
1224
1225 /*
1226 * Some PCI Express root ports require fixup after hot-plug operation.
1227 */
1228 if (pcie_mch_quirk)
1229 pci_fixup_device(pci_fixup_final, ctrl->pci_dev);
1230
1231 if (PWR_LED(ctrl->ctrlcap)) {
1232 /* Wait for exclusive access to hardware */
1233 down(&ctrl->crit_sect);
1234
1235 p_slot->hpc_ops->green_led_on(p_slot);
1236 341
1237 /* Wait for the command to complete */ 342 /* Wait for the command to complete */
1238 wait_for_ctrl_irq (ctrl); 343 wait_for_ctrl_irq (ctrl);
1239 344
1240 /* Done with exclusive hardware access */ 345 /* Done with exclusive hardware access */
1241 up(&ctrl->crit_sect); 346 up(&ctrl->crit_sect);
1242 } 347 }
1243 } else {
1244 set_slot_off(ctrl, p_slot);
1245 return -1;
1246 }
1247 return 0; 348 return 0;
349
350err_exit:
351 set_slot_off(ctrl, p_slot);
352 return -1;
1248} 353}
1249 354
1250 355
@@ -1252,56 +357,23 @@ static u32 board_added(struct pci_func * func, struct controller * ctrl)
1252 * remove_board - Turns off slot and LED's 357 * remove_board - Turns off slot and LED's
1253 * 358 *
1254 */ 359 */
1255static u32 remove_board(struct pci_func *func, struct controller *ctrl) 360static int remove_board(struct slot *p_slot)
1256{ 361{
1257 int index;
1258 u8 skip = 0;
1259 u8 device; 362 u8 device;
1260 u8 hp_slot; 363 u8 hp_slot;
1261 u32 rc; 364 int rc;
1262 struct resource_lists res_lists; 365 struct controller *ctrl = p_slot->ctrl;
1263 struct pci_func *temp_func;
1264 struct slot *p_slot;
1265
1266 if (func == NULL)
1267 return 1;
1268 366
1269 if (pciehp_unconfigure_device(func)) 367 if (pciehp_unconfigure_device(p_slot))
1270 return 1; 368 return 1;
1271 369
1272 device = func->device; 370 device = p_slot->device;
1273 371
1274 hp_slot = func->device - ctrl->slot_device_offset; 372 hp_slot = p_slot->device - ctrl->slot_device_offset;
1275 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 373 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1276 374
1277 dbg("In %s, hp_slot = %d\n", __FUNCTION__, hp_slot); 375 dbg("In %s, hp_slot = %d\n", __FUNCTION__, hp_slot);
1278 376
1279 if ((ctrl->add_support) &&
1280 !(func->bus_head || func->mem_head || func->p_mem_head || func->io_head)) {
1281 /* Here we check to see if we've saved any of the board's
1282 * resources already. If so, we'll skip the attempt to
1283 * determine what's being used.
1284 */
1285 index = 0;
1286
1287 temp_func = func;
1288
1289 while ((temp_func = pciehp_slot_find(temp_func->bus, temp_func->device, index++))) {
1290 if (temp_func->bus_head || temp_func->mem_head
1291 || temp_func->p_mem_head || temp_func->io_head) {
1292 skip = 1;
1293 break;
1294 }
1295 }
1296
1297 if (!skip)
1298 rc = pciehp_save_used_resources(ctrl, func, DISABLE_CARD);
1299 }
1300 /* Change status to shutdown */
1301 if (func->is_a_board)
1302 func->status = 0x01;
1303 func->configured = 0;
1304
1305 /* Wait for exclusive access to hardware */ 377 /* Wait for exclusive access to hardware */
1306 down(&ctrl->crit_sect); 378 down(&ctrl->crit_sect);
1307 379
@@ -1328,56 +400,6 @@ static u32 remove_board(struct pci_func *func, struct controller *ctrl)
1328 /* Done with exclusive hardware access */ 400 /* Done with exclusive hardware access */
1329 up(&ctrl->crit_sect); 401 up(&ctrl->crit_sect);
1330 402
1331 if (ctrl->add_support) {
1332 while (func) {
1333 res_lists.io_head = ctrl->io_head;
1334 res_lists.mem_head = ctrl->mem_head;
1335 res_lists.p_mem_head = ctrl->p_mem_head;
1336 res_lists.bus_head = ctrl->bus_head;
1337
1338 dbg("Returning resources to ctlr lists for (B/D/F) = (%#x/%#x/%#x)\n",
1339 func->bus, func->device, func->function);
1340
1341 pciehp_return_board_resources(func, &res_lists);
1342
1343 ctrl->io_head = res_lists.io_head;
1344 ctrl->mem_head = res_lists.mem_head;
1345 ctrl->p_mem_head = res_lists.p_mem_head;
1346 ctrl->bus_head = res_lists.bus_head;
1347
1348 pciehp_resource_sort_and_combine(&(ctrl->mem_head));
1349 pciehp_resource_sort_and_combine(&(ctrl->p_mem_head));
1350 pciehp_resource_sort_and_combine(&(ctrl->io_head));
1351 pciehp_resource_sort_and_combine(&(ctrl->bus_head));
1352
1353 if (is_bridge(func)) {
1354 dbg("PCI Bridge Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n",
1355 ctrl->seg, func->bus, func->device, func->function);
1356 bridge_slot_remove(func);
1357 } else {
1358 dbg("PCI Function Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n",
1359 ctrl->seg, func->bus, func->device, func->function);
1360 slot_remove(func);
1361 }
1362
1363 func = pciehp_slot_find(ctrl->slot_bus, device, 0);
1364 }
1365
1366 /* Setup slot structure with entry for empty slot */
1367 func = pciehp_slot_create(ctrl->slot_bus);
1368
1369 if (func == NULL) {
1370 return 1;
1371 }
1372
1373 func->bus = ctrl->slot_bus;
1374 func->device = device;
1375 func->function = 0;
1376 func->configured = 0;
1377 func->switch_save = 0x10;
1378 func->is_a_board = 0;
1379 }
1380
1381 return 0; 403 return 0;
1382} 404}
1383 405
@@ -1411,13 +433,15 @@ static void pciehp_pushbutton_thread(unsigned long slot)
1411 p_slot->hpc_ops->get_power_status(p_slot, &getstatus); 433 p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1412 if (getstatus) { 434 if (getstatus) {
1413 p_slot->state = POWEROFF_STATE; 435 p_slot->state = POWEROFF_STATE;
1414 dbg("In power_down_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device); 436 dbg("%s: disabling bus:device(%x:%x)\n", __FUNCTION__,
437 p_slot->bus, p_slot->device);
1415 438
1416 pciehp_disable_slot(p_slot); 439 pciehp_disable_slot(p_slot);
1417 p_slot->state = STATIC_STATE; 440 p_slot->state = STATIC_STATE;
1418 } else { 441 } else {
1419 p_slot->state = POWERON_STATE; 442 p_slot->state = POWERON_STATE;
1420 dbg("In add_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device); 443 dbg("%s: adding bus:device(%x:%x)\n", __FUNCTION__,
444 p_slot->bus, p_slot->device);
1421 445
1422 if (pciehp_enable_slot(p_slot) && PWR_LED(p_slot->ctrl->ctrlcap)) { 446 if (pciehp_enable_slot(p_slot) && PWR_LED(p_slot->ctrl->ctrlcap)) {
1423 /* Wait for exclusive access to hardware */ 447 /* Wait for exclusive access to hardware */
@@ -1459,13 +483,15 @@ static void pciehp_surprise_rm_thread(unsigned long slot)
1459 p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus); 483 p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus);
1460 if (!getstatus) { 484 if (!getstatus) {
1461 p_slot->state = POWEROFF_STATE; 485 p_slot->state = POWEROFF_STATE;
1462 dbg("In removing board, b:d(%x:%x)\n", p_slot->bus, p_slot->device); 486 dbg("%s: removing bus:device(%x:%x)\n",
487 __FUNCTION__, p_slot->bus, p_slot->device);
1463 488
1464 pciehp_disable_slot(p_slot); 489 pciehp_disable_slot(p_slot);
1465 p_slot->state = STATIC_STATE; 490 p_slot->state = STATIC_STATE;
1466 } else { 491 } else {
1467 p_slot->state = POWERON_STATE; 492 p_slot->state = POWERON_STATE;
1468 dbg("In add_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device); 493 dbg("%s: adding bus:device(%x:%x)\n",
494 __FUNCTION__, p_slot->bus, p_slot->device);
1469 495
1470 if (pciehp_enable_slot(p_slot) && PWR_LED(p_slot->ctrl->ctrlcap)) { 496 if (pciehp_enable_slot(p_slot) && PWR_LED(p_slot->ctrl->ctrlcap)) {
1471 /* Wait for exclusive access to hardware */ 497 /* Wait for exclusive access to hardware */
@@ -1531,7 +557,6 @@ int pciehp_event_start_thread(void)
1531 err ("Can't start up our event thread\n"); 557 err ("Can't start up our event thread\n");
1532 return -1; 558 return -1;
1533 } 559 }
1534 dbg("Our event thread pid = %d\n", pid);
1535 return 0; 560 return 0;
1536} 561}
1537 562
@@ -1539,9 +564,7 @@ int pciehp_event_start_thread(void)
1539void pciehp_event_stop_thread(void) 564void pciehp_event_stop_thread(void)
1540{ 565{
1541 event_finished = 1; 566 event_finished = 1;
1542 dbg("event_thread finish command given\n");
1543 up(&event_semaphore); 567 up(&event_semaphore);
1544 dbg("wait for event_thread to exit\n");
1545 down(&event_exit); 568 down(&event_exit);
1546} 569}
1547 570
@@ -1573,7 +596,6 @@ static void interrupt_event_handler(struct controller *ctrl)
1573{ 596{
1574 int loop = 0; 597 int loop = 0;
1575 int change = 1; 598 int change = 1;
1576 struct pci_func *func;
1577 u8 hp_slot; 599 u8 hp_slot;
1578 u8 getstatus; 600 u8 getstatus;
1579 struct slot *p_slot; 601 struct slot *p_slot;
@@ -1581,16 +603,12 @@ static void interrupt_event_handler(struct controller *ctrl)
1581 while (change) { 603 while (change) {
1582 change = 0; 604 change = 0;
1583 605
1584 for (loop = 0; loop < 10; loop++) { 606 for (loop = 0; loop < MAX_EVENTS; loop++) {
1585 if (ctrl->event_queue[loop].event_type != 0) { 607 if (ctrl->event_queue[loop].event_type != 0) {
1586 hp_slot = ctrl->event_queue[loop].hp_slot; 608 hp_slot = ctrl->event_queue[loop].hp_slot;
1587 609
1588 func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
1589
1590 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 610 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1591 611
1592 dbg("hp_slot %d, func %p, p_slot %p\n", hp_slot, func, p_slot);
1593
1594 if (ctrl->event_queue[loop].event_type == INT_BUTTON_CANCEL) { 612 if (ctrl->event_queue[loop].event_type == INT_BUTTON_CANCEL) {
1595 dbg("button cancel\n"); 613 dbg("button cancel\n");
1596 del_timer(&p_slot->task_event); 614 del_timer(&p_slot->task_event);
@@ -1682,7 +700,6 @@ static void interrupt_event_handler(struct controller *ctrl)
1682 p_slot->task_event.function = (void (*)(unsigned long)) pushbutton_helper_thread; 700 p_slot->task_event.function = (void (*)(unsigned long)) pushbutton_helper_thread;
1683 p_slot->task_event.data = (unsigned long) p_slot; 701 p_slot->task_event.data = (unsigned long) p_slot;
1684 702
1685 dbg("add_timer p_slot = %p\n", (void *) p_slot);
1686 add_timer(&p_slot->task_event); 703 add_timer(&p_slot->task_event);
1687 } 704 }
1688 } 705 }
@@ -1737,13 +754,6 @@ int pciehp_enable_slot(struct slot *p_slot)
1737{ 754{
1738 u8 getstatus = 0; 755 u8 getstatus = 0;
1739 int rc; 756 int rc;
1740 struct pci_func *func;
1741
1742 func = pciehp_slot_find(p_slot->bus, p_slot->device, 0);
1743 if (!func) {
1744 dbg("%s: Error! slot NULL\n", __FUNCTION__);
1745 return 1;
1746 }
1747 757
1748 /* Check to see if (latch closed, card present, power off) */ 758 /* Check to see if (latch closed, card present, power off) */
1749 down(&p_slot->ctrl->crit_sect); 759 down(&p_slot->ctrl->crit_sect);
@@ -1773,45 +783,11 @@ int pciehp_enable_slot(struct slot *p_slot)
1773 } 783 }
1774 up(&p_slot->ctrl->crit_sect); 784 up(&p_slot->ctrl->crit_sect);
1775 785
1776 slot_remove(func);
1777
1778 func = pciehp_slot_create(p_slot->bus);
1779 if (func == NULL)
1780 return 1;
1781
1782 func->bus = p_slot->bus;
1783 func->device = p_slot->device;
1784 func->function = 0;
1785 func->configured = 0;
1786 func->is_a_board = 1;
1787
1788 /* We have to save the presence info for these slots */
1789 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
1790 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 786 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1791 func->switch_save = !getstatus? 0x10:0;
1792 787
1793 rc = board_added(func, p_slot->ctrl); 788 rc = board_added(p_slot);
1794 if (rc) { 789 if (rc) {
1795 if (is_bridge(func))
1796 bridge_slot_remove(func);
1797 else
1798 slot_remove(func);
1799
1800 /* Setup slot structure with entry for empty slot */
1801 func = pciehp_slot_create(p_slot->bus);
1802 if (func == NULL)
1803 return 1; /* Out of memory */
1804
1805 func->bus = p_slot->bus;
1806 func->device = p_slot->device;
1807 func->function = 0;
1808 func->configured = 0;
1809 func->is_a_board = 1;
1810
1811 /* We have to save the presence info for these slots */
1812 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
1813 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 790 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1814 func->switch_save = !getstatus? 0x10:0;
1815 } 791 }
1816 792
1817 if (p_slot) 793 if (p_slot)
@@ -1823,14 +799,8 @@ int pciehp_enable_slot(struct slot *p_slot)
1823 799
1824int pciehp_disable_slot(struct slot *p_slot) 800int pciehp_disable_slot(struct slot *p_slot)
1825{ 801{
1826 u8 class_code, header_type, BCR;
1827 u8 index = 0;
1828 u8 getstatus = 0; 802 u8 getstatus = 0;
1829 u32 rc = 0;
1830 int ret = 0; 803 int ret = 0;
1831 unsigned int devfn;
1832 struct pci_bus *pci_bus = p_slot->ctrl->pci_dev->subordinate;
1833 struct pci_func *func;
1834 804
1835 if (!p_slot->ctrl) 805 if (!p_slot->ctrl)
1836 return 1; 806 return 1;
@@ -1867,838 +837,8 @@ int pciehp_disable_slot(struct slot *p_slot)
1867 837
1868 up(&p_slot->ctrl->crit_sect); 838 up(&p_slot->ctrl->crit_sect);
1869 839
1870 func = pciehp_slot_find(p_slot->bus, p_slot->device, index++); 840 ret = remove_board(p_slot);
1871 841 update_slot_info(p_slot);
1872 /* Make sure there are no video controllers here 842 return ret;
1873 * for all func of p_slot
1874 */
1875 while (func && !rc) {
1876 pci_bus->number = func->bus;
1877 devfn = PCI_DEVFN(func->device, func->function);
1878
1879 /* Check the Class Code */
1880 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
1881 if (rc)
1882 return rc;
1883
1884 if (class_code == PCI_BASE_CLASS_DISPLAY) {
1885 /* Display/Video adapter (not supported) */
1886 rc = REMOVE_NOT_SUPPORTED;
1887 } else {
1888 /* See if it's a bridge */
1889 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1890 if (rc)
1891 return rc;
1892
1893 /* If it's a bridge, check the VGA Enable bit */
1894 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
1895 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
1896 if (rc)
1897 return rc;
1898
1899 /* If the VGA Enable bit is set, remove isn't supported */
1900 if (BCR & PCI_BRIDGE_CTL_VGA) {
1901 rc = REMOVE_NOT_SUPPORTED;
1902 }
1903 }
1904 }
1905
1906 func = pciehp_slot_find(p_slot->bus, p_slot->device, index++);
1907 }
1908
1909 func = pciehp_slot_find(p_slot->bus, p_slot->device, 0);
1910 if ((func != NULL) && !rc) {
1911 rc = remove_board(func, p_slot->ctrl);
1912 } else if (!rc)
1913 rc = 1;
1914
1915 if (p_slot)
1916 update_slot_info(p_slot);
1917
1918 return rc;
1919}
1920
1921
1922/**
1923 * configure_new_device - Configures the PCI header information of one board.
1924 *
1925 * @ctrl: pointer to controller structure
1926 * @func: pointer to function structure
1927 * @behind_bridge: 1 if this is a recursive call, 0 if not
1928 * @resources: pointer to set of resource lists
1929 *
1930 * Returns 0 if success
1931 *
1932 */
1933static u32 configure_new_device(struct controller * ctrl, struct pci_func * func,
1934 u8 behind_bridge, struct resource_lists * resources, u8 bridge_bus, u8 bridge_dev)
1935{
1936 u8 temp_byte, function, max_functions, stop_it;
1937 int rc;
1938 u32 ID;
1939 struct pci_func *new_slot;
1940 struct pci_bus lpci_bus, *pci_bus;
1941 int index;
1942
1943 new_slot = func;
1944
1945 dbg("%s\n", __FUNCTION__);
1946 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
1947 pci_bus = &lpci_bus;
1948 pci_bus->number = func->bus;
1949
1950 /* Check for Multi-function device */
1951 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
1952 if (rc) {
1953 dbg("%s: rc = %d\n", __FUNCTION__, rc);
1954 return rc;
1955 }
1956
1957 if (temp_byte & 0x80) /* Multi-function device */
1958 max_functions = 8;
1959 else
1960 max_functions = 1;
1961
1962 function = 0;
1963
1964 do {
1965 rc = configure_new_function(ctrl, new_slot, behind_bridge,
1966 resources, bridge_bus, bridge_dev);
1967
1968 if (rc) {
1969 dbg("configure_new_function failed: %d\n", rc);
1970 index = 0;
1971
1972 while (new_slot) {
1973 new_slot = pciehp_slot_find(new_slot->bus,
1974 new_slot->device, index++);
1975
1976 if (new_slot)
1977 pciehp_return_board_resources(new_slot,
1978 resources);
1979 }
1980
1981 return rc;
1982 }
1983
1984 function++;
1985
1986 stop_it = 0;
1987
1988 /* The following loop skips to the next present function
1989 * and creates a board structure
1990 */
1991
1992 while ((function < max_functions) && (!stop_it)) {
1993 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
1994
1995 if (ID == 0xFFFFFFFF) { /* There's nothing there. */
1996 function++;
1997 } else { /* There's something there */
1998 /* Setup slot structure. */
1999 new_slot = pciehp_slot_create(func->bus);
2000
2001 if (new_slot == NULL) {
2002 /* Out of memory */
2003 return 1;
2004 }
2005
2006 new_slot->bus = func->bus;
2007 new_slot->device = func->device;
2008 new_slot->function = function;
2009 new_slot->is_a_board = 1;
2010 new_slot->status = 0;
2011
2012 stop_it++;
2013 }
2014 }
2015
2016 } while (function < max_functions);
2017 dbg("returning from %s\n", __FUNCTION__);
2018
2019 return 0;
2020}
2021
2022/*
2023 * Configuration logic that involves the hotplug data structures and
2024 * their bookkeeping
2025 */
2026
2027/**
2028 * configure_bridge: fill bridge's registers, either configure or disable it.
2029 */
2030static int
2031configure_bridge(struct pci_bus *pci_bus, unsigned int devfn,
2032 struct pci_resource *mem_node,
2033 struct pci_resource **hold_mem_node,
2034 int base_addr, int limit_addr)
2035{
2036 u16 temp_word;
2037 u32 rc;
2038
2039 if (mem_node) {
2040 memcpy(*hold_mem_node, mem_node, sizeof(struct pci_resource));
2041 mem_node->next = NULL;
2042
2043 /* set Mem base and Limit registers */
2044 RES_CHECK(mem_node->base, 16);
2045 temp_word = (u16)(mem_node->base >> 16);
2046 rc = pci_bus_write_config_word(pci_bus, devfn, base_addr, temp_word);
2047
2048 RES_CHECK(mem_node->base + mem_node->length - 1, 16);
2049 temp_word = (u16)((mem_node->base + mem_node->length - 1) >> 16);
2050 rc = pci_bus_write_config_word(pci_bus, devfn, limit_addr, temp_word);
2051 } else {
2052 temp_word = 0xFFFF;
2053 rc = pci_bus_write_config_word(pci_bus, devfn, base_addr, temp_word);
2054
2055 temp_word = 0x0000;
2056 rc = pci_bus_write_config_word(pci_bus, devfn, limit_addr, temp_word);
2057
2058 kfree(*hold_mem_node);
2059 *hold_mem_node = NULL;
2060 }
2061 return rc;
2062}
2063
2064static int
2065configure_new_bridge(struct controller *ctrl, struct pci_func *func,
2066 u8 behind_bridge, struct resource_lists *resources,
2067 struct pci_bus *pci_bus)
2068{
2069 int cloop;
2070 u8 temp_byte;
2071 u8 device;
2072 u16 temp_word;
2073 u32 rc;
2074 u32 ID;
2075 unsigned int devfn;
2076 struct pci_resource *mem_node;
2077 struct pci_resource *p_mem_node;
2078 struct pci_resource *io_node;
2079 struct pci_resource *bus_node;
2080 struct pci_resource *hold_mem_node;
2081 struct pci_resource *hold_p_mem_node;
2082 struct pci_resource *hold_IO_node;
2083 struct pci_resource *hold_bus_node;
2084 struct irq_mapping irqs;
2085 struct pci_func *new_slot;
2086 struct resource_lists temp_resources;
2087
2088 devfn = PCI_DEVFN(func->device, func->function);
2089
2090 /* set Primary bus */
2091 dbg("set Primary bus = 0x%x\n", func->bus);
2092 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
2093 if (rc)
2094 return rc;
2095
2096 /* find range of busses to use */
2097 bus_node = get_max_resource(&resources->bus_head, 1L);
2098
2099 /* If we don't have any busses to allocate, we can't continue */
2100 if (!bus_node) {
2101 err("Got NO bus resource to use\n");
2102 return -ENOMEM;
2103 }
2104 dbg("Got ranges of buses to use: base:len=0x%x:%x\n", bus_node->base, bus_node->length);
2105
2106 /* set Secondary bus */
2107 temp_byte = (u8)bus_node->base;
2108 dbg("set Secondary bus = 0x%x\n", temp_byte);
2109 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2110 if (rc)
2111 return rc;
2112
2113 /* set subordinate bus */
2114 temp_byte = (u8)(bus_node->base + bus_node->length - 1);
2115 dbg("set subordinate bus = 0x%x\n", temp_byte);
2116 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2117 if (rc)
2118 return rc;
2119
2120 /* Set HP parameters (Cache Line Size, Latency Timer) */
2121 rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
2122 if (rc)
2123 return rc;
2124
2125 /* Setup the IO, memory, and prefetchable windows */
2126
2127 io_node = get_max_resource(&(resources->io_head), 0x1000L);
2128 if (io_node) {
2129 dbg("io_node(base, len, next) (%x, %x, %p)\n", io_node->base,
2130 io_node->length, io_node->next);
2131 }
2132
2133 mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
2134 if (mem_node) {
2135 dbg("mem_node(base, len, next) (%x, %x, %p)\n", mem_node->base,
2136 mem_node->length, mem_node->next);
2137 }
2138
2139 if (resources->p_mem_head)
2140 p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000L);
2141 else {
2142 /*
2143 * In some platform implementation, MEM and PMEM are not
2144 * distinguished, and hence ACPI _CRS has only MEM entries
2145 * for both MEM and PMEM.
2146 */
2147 dbg("using MEM for PMEM\n");
2148 p_mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
2149 }
2150 if (p_mem_node) {
2151 dbg("p_mem_node(base, len, next) (%x, %x, %p)\n", p_mem_node->base,
2152 p_mem_node->length, p_mem_node->next);
2153 }
2154
2155 /* set up the IRQ info */
2156 if (!resources->irqs) {
2157 irqs.barber_pole = 0;
2158 irqs.interrupt[0] = 0;
2159 irqs.interrupt[1] = 0;
2160 irqs.interrupt[2] = 0;
2161 irqs.interrupt[3] = 0;
2162 irqs.valid_INT = 0;
2163 } else {
2164 irqs.barber_pole = resources->irqs->barber_pole;
2165 irqs.interrupt[0] = resources->irqs->interrupt[0];
2166 irqs.interrupt[1] = resources->irqs->interrupt[1];
2167 irqs.interrupt[2] = resources->irqs->interrupt[2];
2168 irqs.interrupt[3] = resources->irqs->interrupt[3];
2169 irqs.valid_INT = resources->irqs->valid_INT;
2170 }
2171
2172 /* set up resource lists that are now aligned on top and bottom
2173 * for anything behind the bridge.
2174 */
2175 temp_resources.bus_head = bus_node;
2176 temp_resources.io_head = io_node;
2177 temp_resources.mem_head = mem_node;
2178 temp_resources.p_mem_head = p_mem_node;
2179 temp_resources.irqs = &irqs;
2180
2181 /* Make copies of the nodes we are going to pass down so that
2182 * if there is a problem,we can just use these to free resources
2183 */
2184 hold_bus_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2185 hold_IO_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2186 hold_mem_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2187 hold_p_mem_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2188
2189 if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2190 kfree(hold_bus_node);
2191 kfree(hold_IO_node);
2192 kfree(hold_mem_node);
2193 kfree(hold_p_mem_node);
2194
2195 return 1;
2196 }
2197
2198 memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2199
2200 bus_node->base += 1;
2201 bus_node->length -= 1;
2202 bus_node->next = NULL;
2203
2204 /* If we have IO resources copy them and fill in the bridge's
2205 * IO range registers
2206 */
2207 if (io_node) {
2208 memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2209 io_node->next = NULL;
2210
2211 /* set IO base and Limit registers */
2212 RES_CHECK(io_node->base, 8);
2213 temp_byte = (u8)(io_node->base >> 8);
2214 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
2215
2216 RES_CHECK(io_node->base + io_node->length - 1, 8);
2217 temp_byte = (u8)((io_node->base + io_node->length - 1) >> 8);
2218 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2219 } else {
2220 kfree(hold_IO_node);
2221 hold_IO_node = NULL;
2222 }
2223
2224 /* If we have memory resources copy them and fill in the bridge's
2225 * memory range registers. Otherwise, fill in the range
2226 * registers with values that disable them.
2227 */
2228 rc = configure_bridge(pci_bus, devfn, mem_node, &hold_mem_node,
2229 PCI_MEMORY_BASE, PCI_MEMORY_LIMIT);
2230
2231 /* If we have prefetchable memory resources copy them and
2232 * fill in the bridge's memory range registers. Otherwise,
2233 * fill in the range registers with values that disable them.
2234 */
2235 rc = configure_bridge(pci_bus, devfn, p_mem_node, &hold_p_mem_node,
2236 PCI_PREF_MEMORY_BASE, PCI_PREF_MEMORY_LIMIT);
2237
2238 /* Adjust this to compensate for extra adjustment in first loop */
2239 irqs.barber_pole--;
2240
2241 rc = 0;
2242
2243 /* Here we actually find the devices and configure them */
2244 for (device = 0; (device <= 0x1F) && !rc; device++) {
2245 irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2246
2247 ID = 0xFFFFFFFF;
2248 pci_bus->number = hold_bus_node->base;
2249 pci_bus_read_config_dword (pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
2250 pci_bus->number = func->bus;
2251
2252 if (ID != 0xFFFFFFFF) { /* device Present */
2253 /* Setup slot structure. */
2254 new_slot = pciehp_slot_create(hold_bus_node->base);
2255
2256 if (new_slot == NULL) {
2257 /* Out of memory */
2258 rc = -ENOMEM;
2259 continue;
2260 }
2261
2262 new_slot->bus = hold_bus_node->base;
2263 new_slot->device = device;
2264 new_slot->function = 0;
2265 new_slot->is_a_board = 1;
2266 new_slot->status = 0;
2267
2268 rc = configure_new_device(ctrl, new_slot, 1,
2269 &temp_resources, func->bus,
2270 func->device);
2271 dbg("configure_new_device rc=0x%x\n",rc);
2272 } /* End of IF (device in slot?) */
2273 } /* End of FOR loop */
2274
2275 if (rc) {
2276 pciehp_destroy_resource_list(&temp_resources);
2277
2278 return_resource(&(resources->bus_head), hold_bus_node);
2279 return_resource(&(resources->io_head), hold_IO_node);
2280 return_resource(&(resources->mem_head), hold_mem_node);
2281 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2282 return(rc);
2283 }
2284
2285 /* save the interrupt routing information */
2286 if (resources->irqs) {
2287 resources->irqs->interrupt[0] = irqs.interrupt[0];
2288 resources->irqs->interrupt[1] = irqs.interrupt[1];
2289 resources->irqs->interrupt[2] = irqs.interrupt[2];
2290 resources->irqs->interrupt[3] = irqs.interrupt[3];
2291 resources->irqs->valid_INT = irqs.valid_INT;
2292 } else if (!behind_bridge) {
2293 /* We need to hook up the interrupts here */
2294 for (cloop = 0; cloop < 4; cloop++) {
2295 if (irqs.valid_INT & (0x01 << cloop)) {
2296 rc = pciehp_set_irq(func->bus, func->device,
2297 0x0A + cloop, irqs.interrupt[cloop]);
2298 if (rc) {
2299 pciehp_destroy_resource_list (&temp_resources);
2300 return_resource(&(resources->bus_head), hold_bus_node);
2301 return_resource(&(resources->io_head), hold_IO_node);
2302 return_resource(&(resources->mem_head), hold_mem_node);
2303 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2304 return rc;
2305 }
2306 }
2307 } /* end of for loop */
2308 }
2309
2310 /* Return unused bus resources
2311 * First use the temporary node to store information for the board
2312 */
2313 if (hold_bus_node && bus_node && temp_resources.bus_head) {
2314 hold_bus_node->length = bus_node->base - hold_bus_node->base;
2315
2316 hold_bus_node->next = func->bus_head;
2317 func->bus_head = hold_bus_node;
2318
2319 temp_byte = (u8)(temp_resources.bus_head->base - 1);
2320
2321 /* set subordinate bus */
2322 dbg("re-set subordinate bus = 0x%x\n", temp_byte);
2323 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2324
2325 if (temp_resources.bus_head->length == 0) {
2326 kfree(temp_resources.bus_head);
2327 temp_resources.bus_head = NULL;
2328 } else {
2329 dbg("return bus res of b:d(0x%x:%x) base:len(0x%x:%x)\n",
2330 func->bus, func->device, temp_resources.bus_head->base, temp_resources.bus_head->length);
2331 return_resource(&(resources->bus_head), temp_resources.bus_head);
2332 }
2333 }
2334
2335 /* If we have IO space available and there is some left,
2336 * return the unused portion
2337 */
2338 if (hold_IO_node && temp_resources.io_head) {
2339 io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2340 &hold_IO_node, 0x1000);
2341
2342 /* Check if we were able to split something off */
2343 if (io_node) {
2344 hold_IO_node->base = io_node->base + io_node->length;
2345
2346 RES_CHECK(hold_IO_node->base, 8);
2347 temp_byte = (u8)((hold_IO_node->base) >> 8);
2348 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
2349
2350 return_resource(&(resources->io_head), io_node);
2351 }
2352
2353 io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2354
2355 /* Check if we were able to split something off */
2356 if (io_node) {
2357 /* First use the temporary node to store information for the board */
2358 hold_IO_node->length = io_node->base - hold_IO_node->base;
2359
2360 /* If we used any, add it to the board's list */
2361 if (hold_IO_node->length) {
2362 hold_IO_node->next = func->io_head;
2363 func->io_head = hold_IO_node;
2364
2365 RES_CHECK(io_node->base - 1, 8);
2366 temp_byte = (u8)((io_node->base - 1) >> 8);
2367 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2368
2369 return_resource(&(resources->io_head), io_node);
2370 } else {
2371 /* it doesn't need any IO */
2372 temp_byte = 0x00;
2373 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2374
2375 return_resource(&(resources->io_head), io_node);
2376 kfree(hold_IO_node);
2377 }
2378 } else {
2379 /* it used most of the range */
2380 hold_IO_node->next = func->io_head;
2381 func->io_head = hold_IO_node;
2382 }
2383 } else if (hold_IO_node) {
2384 /* it used the whole range */
2385 hold_IO_node->next = func->io_head;
2386 func->io_head = hold_IO_node;
2387 }
2388
2389 /* If we have memory space available and there is some left,
2390 * return the unused portion
2391 */
2392 if (hold_mem_node && temp_resources.mem_head) {
2393 mem_node = do_pre_bridge_resource_split(&(temp_resources.mem_head), &hold_mem_node, 0x100000L);
2394
2395 /* Check if we were able to split something off */
2396 if (mem_node) {
2397 hold_mem_node->base = mem_node->base + mem_node->length;
2398
2399 RES_CHECK(hold_mem_node->base, 16);
2400 temp_word = (u16)((hold_mem_node->base) >> 16);
2401 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2402
2403 return_resource(&(resources->mem_head), mem_node);
2404 }
2405
2406 mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000L);
2407
2408 /* Check if we were able to split something off */
2409 if (mem_node) {
2410 /* First use the temporary node to store information for the board */
2411 hold_mem_node->length = mem_node->base - hold_mem_node->base;
2412
2413 if (hold_mem_node->length) {
2414 hold_mem_node->next = func->mem_head;
2415 func->mem_head = hold_mem_node;
2416
2417 /* configure end address */
2418 RES_CHECK(mem_node->base - 1, 16);
2419 temp_word = (u16)((mem_node->base - 1) >> 16);
2420 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2421
2422 /* Return unused resources to the pool */
2423 return_resource(&(resources->mem_head), mem_node);
2424 } else {
2425 /* it doesn't need any Mem */
2426 temp_word = 0x0000;
2427 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2428
2429 return_resource(&(resources->mem_head), mem_node);
2430 kfree(hold_mem_node);
2431 }
2432 } else {
2433 /* it used most of the range */
2434 hold_mem_node->next = func->mem_head;
2435 func->mem_head = hold_mem_node;
2436 }
2437 } else if (hold_mem_node) {
2438 /* it used the whole range */
2439 hold_mem_node->next = func->mem_head;
2440 func->mem_head = hold_mem_node;
2441 }
2442
2443 /* If we have prefetchable memory space available and there is some
2444 * left at the end, return the unused portion
2445 */
2446 if (hold_p_mem_node && temp_resources.p_mem_head) {
2447 p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2448 &hold_p_mem_node, 0x100000L);
2449
2450 /* Check if we were able to split something off */
2451 if (p_mem_node) {
2452 hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2453
2454 RES_CHECK(hold_p_mem_node->base, 16);
2455 temp_word = (u16)((hold_p_mem_node->base) >> 16);
2456 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2457
2458 return_resource(&(resources->p_mem_head), p_mem_node);
2459 }
2460
2461 p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000L);
2462
2463 /* Check if we were able to split something off */
2464 if (p_mem_node) {
2465 /* First use the temporary node to store information for the board */
2466 hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2467
2468 /* If we used any, add it to the board's list */
2469 if (hold_p_mem_node->length) {
2470 hold_p_mem_node->next = func->p_mem_head;
2471 func->p_mem_head = hold_p_mem_node;
2472
2473 RES_CHECK(p_mem_node->base - 1, 16);
2474 temp_word = (u16)((p_mem_node->base - 1) >> 16);
2475 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2476
2477 return_resource(&(resources->p_mem_head), p_mem_node);
2478 } else {
2479 /* it doesn't need any PMem */
2480 temp_word = 0x0000;
2481 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2482
2483 return_resource(&(resources->p_mem_head), p_mem_node);
2484 kfree(hold_p_mem_node);
2485 }
2486 } else {
2487 /* it used the most of the range */
2488 hold_p_mem_node->next = func->p_mem_head;
2489 func->p_mem_head = hold_p_mem_node;
2490 }
2491 } else if (hold_p_mem_node) {
2492 /* it used the whole range */
2493 hold_p_mem_node->next = func->p_mem_head;
2494 func->p_mem_head = hold_p_mem_node;
2495 }
2496
2497 /* We should be configuring an IRQ and the bridge's base address
2498 * registers if it needs them. Although we have never seen such
2499 * a device
2500 */
2501
2502 pciehprm_enable_card(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
2503
2504 dbg("PCI Bridge Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device, func->function);
2505
2506 return rc;
2507} 843}
2508 844
2509/**
2510 * configure_new_function - Configures the PCI header information of one device
2511 *
2512 * @ctrl: pointer to controller structure
2513 * @func: pointer to function structure
2514 * @behind_bridge: 1 if this is a recursive call, 0 if not
2515 * @resources: pointer to set of resource lists
2516 *
2517 * Calls itself recursively for bridged devices.
2518 * Returns 0 if success
2519 *
2520 */
2521static int
2522configure_new_function(struct controller *ctrl, struct pci_func *func,
2523 u8 behind_bridge, struct resource_lists *resources,
2524 u8 bridge_bus, u8 bridge_dev)
2525{
2526 int cloop;
2527 u8 temp_byte;
2528 u8 class_code;
2529 u32 rc;
2530 u32 temp_register;
2531 u32 base;
2532 unsigned int devfn;
2533 struct pci_resource *mem_node;
2534 struct pci_resource *io_node;
2535 struct pci_bus lpci_bus, *pci_bus;
2536
2537 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
2538 pci_bus = &lpci_bus;
2539 pci_bus->number = func->bus;
2540 devfn = PCI_DEVFN(func->device, func->function);
2541
2542 /* Check for Bridge */
2543 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2544 if (rc)
2545 return rc;
2546 dbg("%s: bus %x dev %x func %x temp_byte = %x\n", __FUNCTION__,
2547 func->bus, func->device, func->function, temp_byte);
2548
2549 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
2550 rc = configure_new_bridge(ctrl, func, behind_bridge, resources,
2551 pci_bus);
2552
2553 if (rc)
2554 return rc;
2555 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2556 /* Standard device */
2557 u64 base64;
2558 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2559
2560 if (class_code == PCI_BASE_CLASS_DISPLAY)
2561 return DEVICE_TYPE_NOT_SUPPORTED;
2562
2563 /* Figure out IO and memory needs */
2564 for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
2565 temp_register = 0xFFFFFFFF;
2566
2567 rc = pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
2568 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
2569 dbg("Bar[%x]=0x%x on bus:dev:func(0x%x:%x:%x)\n", cloop, temp_register,
2570 func->bus, func->device, func->function);
2571
2572 if (!temp_register)
2573 continue;
2574
2575 base64 = 0L;
2576 if (temp_register & PCI_BASE_ADDRESS_SPACE_IO) {
2577 /* Map IO */
2578
2579 /* set base = amount of IO space */
2580 base = temp_register & 0xFFFFFFFC;
2581 base = ~base + 1;
2582
2583 dbg("NEED IO length(0x%x)\n", base);
2584 io_node = get_io_resource(&(resources->io_head),(ulong)base);
2585
2586 /* allocate the resource to the board */
2587 if (io_node) {
2588 dbg("Got IO base=0x%x(length=0x%x)\n", io_node->base, io_node->length);
2589 base = (u32)io_node->base;
2590 io_node->next = func->io_head;
2591 func->io_head = io_node;
2592 } else {
2593 err("Got NO IO resource(length=0x%x)\n", base);
2594 return -ENOMEM;
2595 }
2596 } else { /* map MEM */
2597 int prefetchable = 1;
2598 struct pci_resource **res_node = &func->p_mem_head;
2599 char *res_type_str = "PMEM";
2600 u32 temp_register2;
2601
2602 if (!(temp_register & PCI_BASE_ADDRESS_MEM_PREFETCH)) {
2603 prefetchable = 0;
2604 res_node = &func->mem_head;
2605 res_type_str++;
2606 }
2607
2608 base = temp_register & 0xFFFFFFF0;
2609 base = ~base + 1;
2610
2611 switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
2612 case PCI_BASE_ADDRESS_MEM_TYPE_32:
2613 dbg("NEED 32 %s bar=0x%x(length=0x%x)\n", res_type_str, temp_register, base);
2614
2615 if (prefetchable && resources->p_mem_head)
2616 mem_node=get_resource(&(resources->p_mem_head), (ulong)base);
2617 else {
2618 if (prefetchable)
2619 dbg("using MEM for PMEM\n");
2620 mem_node = get_resource(&(resources->mem_head), (ulong)base);
2621 }
2622
2623 /* allocate the resource to the board */
2624 if (mem_node) {
2625 base = (u32)mem_node->base;
2626 mem_node->next = *res_node;
2627 *res_node = mem_node;
2628 dbg("Got 32 %s base=0x%x(length=0x%x)\n", res_type_str, mem_node->base,
2629 mem_node->length);
2630 } else {
2631 err("Got NO 32 %s resource(length=0x%x)\n", res_type_str, base);
2632 return -ENOMEM;
2633 }
2634 break;
2635 case PCI_BASE_ADDRESS_MEM_TYPE_64:
2636 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
2637 dbg("NEED 64 %s bar=0x%x:%x(length=0x%x)\n", res_type_str, temp_register2,
2638 temp_register, base);
2639
2640 if (prefetchable && resources->p_mem_head)
2641 mem_node = get_resource(&(resources->p_mem_head), (ulong)base);
2642 else {
2643 if (prefetchable)
2644 dbg("using MEM for PMEM\n");
2645 mem_node = get_resource(&(resources->mem_head), (ulong)base);
2646 }
2647
2648 /* allocate the resource to the board */
2649 if (mem_node) {
2650 base64 = mem_node->base;
2651 mem_node->next = *res_node;
2652 *res_node = mem_node;
2653 dbg("Got 64 %s base=0x%x:%x(length=%x)\n", res_type_str, (u32)(base64 >> 32),
2654 (u32)base64, mem_node->length);
2655 } else {
2656 err("Got NO 64 %s resource(length=0x%x)\n", res_type_str, base);
2657 return -ENOMEM;
2658 }
2659 break;
2660 default:
2661 dbg("reserved BAR type=0x%x\n", temp_register);
2662 break;
2663 }
2664
2665 }
2666
2667 if (base64) {
2668 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
2669 cloop += 4;
2670 base64 >>= 32;
2671
2672 if (base64) {
2673 dbg("%s: high dword of base64(0x%x) set to 0\n", __FUNCTION__, (u32)base64);
2674 base64 = 0x0L;
2675 }
2676
2677 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
2678 } else {
2679 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2680 }
2681 } /* End of base register loop */
2682
2683 /* disable ROM base Address */
2684 rc = pci_bus_write_config_dword (pci_bus, devfn, PCI_ROM_ADDRESS, 0x00);
2685
2686 /* Set HP parameters (Cache Line Size, Latency Timer) */
2687 rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL);
2688 if (rc)
2689 return rc;
2690
2691 pciehprm_enable_card(ctrl, func, PCI_HEADER_TYPE_NORMAL);
2692
2693 dbg("PCI function Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device,
2694 func->function);
2695 } /* End of Not-A-Bridge else */
2696 else {
2697 /* It's some strange type of PCI adapter (Cardbus?) */
2698 return DEVICE_TYPE_NOT_SUPPORTED;
2699 }
2700
2701 func->configured = 1;
2702
2703 return 0;
2704}
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 7a0e27f0e063..0b8b26beb163 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -27,16 +27,12 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/kernel.h> 30#include <linux/kernel.h>
32#include <linux/module.h> 31#include <linux/module.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/vmalloc.h>
36#include <linux/interrupt.h>
37#include <linux/spinlock.h>
38#include <linux/pci.h> 33#include <linux/pci.h>
39#include <asm/system.h> 34#include <linux/interrupt.h>
35
40#include "../pci.h" 36#include "../pci.h"
41#include "pciehp.h" 37#include "pciehp.h"
42 38
@@ -217,23 +213,6 @@ static int pcie_cap_base = 0; /* Base of the PCI Express capability item struct
217#define MRL_STATE 0x0020 213#define MRL_STATE 0x0020
218#define PRSN_STATE 0x0040 214#define PRSN_STATE 0x0040
219 215
220struct php_ctlr_state_s {
221 struct php_ctlr_state_s *pnext;
222 struct pci_dev *pci_dev;
223 unsigned int irq;
224 unsigned long flags; /* spinlock's */
225 u32 slot_device_offset;
226 u32 num_slots;
227 struct timer_list int_poll_timer; /* Added for poll event */
228 php_intr_callback_t attention_button_callback;
229 php_intr_callback_t switch_change_callback;
230 php_intr_callback_t presence_change_callback;
231 php_intr_callback_t power_fault_callback;
232 void *callback_instance_id;
233 struct ctrl_reg *creg; /* Ptr to controller register space */
234};
235
236
237static spinlock_t hpc_event_lock; 216static spinlock_t hpc_event_lock;
238 217
239DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */ 218DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */
@@ -297,7 +276,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
297 276
298 DBG_ENTER_ROUTINE 277 DBG_ENTER_ROUTINE
299 278
300 dbg("%s : Enter\n", __FUNCTION__);
301 if (!php_ctlr) { 279 if (!php_ctlr) {
302 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 280 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
303 return -1; 281 return -1;
@@ -308,7 +286,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
308 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 286 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
309 return retval; 287 return retval;
310 } 288 }
311 dbg("%s : hp_register_read_word SLOT_STATUS %x\n", __FUNCTION__, slot_status);
312 289
313 if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { 290 if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) {
314 /* After 1 sec and CMD_COMPLETED still not set, just proceed forward to issue 291 /* After 1 sec and CMD_COMPLETED still not set, just proceed forward to issue
@@ -316,14 +293,11 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
316 dbg("%s : CMD_COMPLETED not clear after 1 sec.\n", __FUNCTION__); 293 dbg("%s : CMD_COMPLETED not clear after 1 sec.\n", __FUNCTION__);
317 } 294 }
318 295
319 dbg("%s: Before hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, cmd);
320 retval = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), cmd | CMD_CMPL_INTR_ENABLE); 296 retval = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), cmd | CMD_CMPL_INTR_ENABLE);
321 if (retval) { 297 if (retval) {
322 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 298 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
323 return retval; 299 return retval;
324 } 300 }
325 dbg("%s : hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, cmd | CMD_CMPL_INTR_ENABLE);
326 dbg("%s : Exit\n", __FUNCTION__);
327 301
328 DBG_LEAVE_ROUTINE 302 DBG_LEAVE_ROUTINE
329 return retval; 303 return retval;
@@ -509,7 +483,6 @@ static int hpc_query_power_fault(struct slot * slot)
509 u16 slot_status; 483 u16 slot_status;
510 u8 pwr_fault; 484 u8 pwr_fault;
511 int retval = 0; 485 int retval = 0;
512 u8 status;
513 486
514 DBG_ENTER_ROUTINE 487 DBG_ENTER_ROUTINE
515 488
@@ -521,15 +494,13 @@ static int hpc_query_power_fault(struct slot * slot)
521 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status); 494 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status);
522 495
523 if (retval) { 496 if (retval) {
524 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 497 err("%s : Cannot check for power fault\n", __FUNCTION__);
525 return retval; 498 return retval;
526 } 499 }
527 pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1); 500 pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1);
528 status = (pwr_fault != 1) ? 1 : 0;
529 501
530 DBG_LEAVE_ROUTINE 502 DBG_LEAVE_ROUTINE
531 /* Note: Logic 0 => fault */ 503 return pwr_fault;
532 return status;
533} 504}
534 505
535static int hpc_set_attention_status(struct slot *slot, u8 value) 506static int hpc_set_attention_status(struct slot *slot, u8 value)
@@ -539,7 +510,8 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
539 u16 slot_ctrl; 510 u16 slot_ctrl;
540 int rc = 0; 511 int rc = 0;
541 512
542 dbg("%s: \n", __FUNCTION__); 513 DBG_ENTER_ROUTINE
514
543 if (!php_ctlr) { 515 if (!php_ctlr) {
544 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 516 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
545 return -1; 517 return -1;
@@ -555,7 +527,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
555 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 527 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
556 return rc; 528 return rc;
557 } 529 }
558 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
559 530
560 switch (value) { 531 switch (value) {
561 case 0 : /* turn off */ 532 case 0 : /* turn off */
@@ -576,6 +547,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
576 pcie_write_cmd(slot, slot_cmd); 547 pcie_write_cmd(slot, slot_cmd);
577 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 548 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
578 549
550 DBG_LEAVE_ROUTINE
579 return rc; 551 return rc;
580} 552}
581 553
@@ -587,7 +559,8 @@ static void hpc_set_green_led_on(struct slot *slot)
587 u16 slot_ctrl; 559 u16 slot_ctrl;
588 int rc = 0; 560 int rc = 0;
589 561
590 dbg("%s: \n", __FUNCTION__); 562 DBG_ENTER_ROUTINE
563
591 if (!php_ctlr) { 564 if (!php_ctlr) {
592 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 565 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
593 return ; 566 return ;
@@ -604,7 +577,6 @@ static void hpc_set_green_led_on(struct slot *slot)
604 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 577 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
605 return; 578 return;
606 } 579 }
607 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
608 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0100; 580 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0100;
609 if (!pciehp_poll_mode) 581 if (!pciehp_poll_mode)
610 slot_cmd = slot_cmd | HP_INTR_ENABLE; 582 slot_cmd = slot_cmd | HP_INTR_ENABLE;
@@ -612,6 +584,7 @@ static void hpc_set_green_led_on(struct slot *slot)
612 pcie_write_cmd(slot, slot_cmd); 584 pcie_write_cmd(slot, slot_cmd);
613 585
614 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 586 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
587 DBG_LEAVE_ROUTINE
615 return; 588 return;
616} 589}
617 590
@@ -622,7 +595,8 @@ static void hpc_set_green_led_off(struct slot *slot)
622 u16 slot_ctrl; 595 u16 slot_ctrl;
623 int rc = 0; 596 int rc = 0;
624 597
625 dbg("%s: \n", __FUNCTION__); 598 DBG_ENTER_ROUTINE
599
626 if (!php_ctlr) { 600 if (!php_ctlr) {
627 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 601 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
628 return ; 602 return ;
@@ -639,7 +613,6 @@ static void hpc_set_green_led_off(struct slot *slot)
639 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 613 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
640 return; 614 return;
641 } 615 }
642 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
643 616
644 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0300; 617 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0300;
645 618
@@ -648,6 +621,7 @@ static void hpc_set_green_led_off(struct slot *slot)
648 pcie_write_cmd(slot, slot_cmd); 621 pcie_write_cmd(slot, slot_cmd);
649 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 622 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
650 623
624 DBG_LEAVE_ROUTINE
651 return; 625 return;
652} 626}
653 627
@@ -658,7 +632,8 @@ static void hpc_set_green_led_blink(struct slot *slot)
658 u16 slot_ctrl; 632 u16 slot_ctrl;
659 int rc = 0; 633 int rc = 0;
660 634
661 dbg("%s: \n", __FUNCTION__); 635 DBG_ENTER_ROUTINE
636
662 if (!php_ctlr) { 637 if (!php_ctlr) {
663 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 638 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
664 return ; 639 return ;
@@ -675,7 +650,6 @@ static void hpc_set_green_led_blink(struct slot *slot)
675 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 650 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
676 return; 651 return;
677 } 652 }
678 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
679 653
680 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0200; 654 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0200;
681 655
@@ -684,6 +658,7 @@ static void hpc_set_green_led_blink(struct slot *slot)
684 pcie_write_cmd(slot, slot_cmd); 658 pcie_write_cmd(slot, slot_cmd);
685 659
686 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 660 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
661 DBG_LEAVE_ROUTINE
687 return; 662 return;
688} 663}
689 664
@@ -775,12 +750,11 @@ static int hpc_power_on_slot(struct slot * slot)
775{ 750{
776 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 751 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
777 u16 slot_cmd; 752 u16 slot_cmd;
778 u16 slot_ctrl; 753 u16 slot_ctrl, slot_status;
779 754
780 int retval = 0; 755 int retval = 0;
781 756
782 DBG_ENTER_ROUTINE 757 DBG_ENTER_ROUTINE
783 dbg("%s: \n", __FUNCTION__);
784 758
785 if (!php_ctlr) { 759 if (!php_ctlr) {
786 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 760 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
@@ -793,14 +767,20 @@ static int hpc_power_on_slot(struct slot * slot)
793 return -1; 767 return -1;
794 } 768 }
795 769
770 /* Clear sticky power-fault bit from previous power failures */
771 hp_register_read_word(php_ctlr->pci_dev,
772 SLOT_STATUS(slot->ctrl->cap_base), slot_status);
773 slot_status &= PWR_FAULT_DETECTED;
774 if (slot_status)
775 hp_register_write_word(php_ctlr->pci_dev,
776 SLOT_STATUS(slot->ctrl->cap_base), slot_status);
777
796 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl); 778 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
797 779
798 if (retval) { 780 if (retval) {
799 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 781 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
800 return retval; 782 return retval;
801 } 783 }
802 dbg("%s: SLOT_CTRL %x, value read %xn", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base),
803 slot_ctrl);
804 784
805 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON; 785 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON;
806 786
@@ -829,7 +809,6 @@ static int hpc_power_off_slot(struct slot * slot)
829 int retval = 0; 809 int retval = 0;
830 810
831 DBG_ENTER_ROUTINE 811 DBG_ENTER_ROUTINE
832 dbg("%s: \n", __FUNCTION__);
833 812
834 if (!php_ctlr) { 813 if (!php_ctlr) {
835 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 814 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
@@ -848,8 +827,6 @@ static int hpc_power_off_slot(struct slot * slot)
848 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 827 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
849 return retval; 828 return retval;
850 } 829 }
851 dbg("%s: SLOT_CTRL %x, value read %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base),
852 slot_ctrl);
853 830
854 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF; 831 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF;
855 832
@@ -924,7 +901,6 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
924 return IRQ_NONE; 901 return IRQ_NONE;
925 } 902 }
926 903
927 dbg("%s: Set Mask Hot-plug Interrupt Enable\n", __FUNCTION__);
928 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word); 904 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
929 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; 905 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;
930 906
@@ -933,7 +909,6 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
933 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 909 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
934 return IRQ_NONE; 910 return IRQ_NONE;
935 } 911 }
936 dbg("%s: hp_register_write_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
937 912
938 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 913 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
939 if (rc) { 914 if (rc) {
@@ -949,14 +924,12 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
949 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 924 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
950 return IRQ_NONE; 925 return IRQ_NONE;
951 } 926 }
952 dbg("%s: hp_register_write_word SLOT_STATUS with value %x\n", __FUNCTION__, temp_word);
953 } 927 }
954 928
955 if (intr_loc & CMD_COMPLETED) { 929 if (intr_loc & CMD_COMPLETED) {
956 /* 930 /*
957 * Command Complete Interrupt Pending 931 * Command Complete Interrupt Pending
958 */ 932 */
959 dbg("%s: In Command Complete Interrupt Pending\n", __FUNCTION__);
960 wake_up_interruptible(&ctrl->queue); 933 wake_up_interruptible(&ctrl->queue);
961 } 934 }
962 935
@@ -989,7 +962,6 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
989 } 962 }
990 963
991 dbg("%s: Unmask Hot-plug Interrupt Enable\n", __FUNCTION__); 964 dbg("%s: Unmask Hot-plug Interrupt Enable\n", __FUNCTION__);
992 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
993 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; 965 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;
994 966
995 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word); 967 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
@@ -997,14 +969,12 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
997 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 969 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
998 return IRQ_NONE; 970 return IRQ_NONE;
999 } 971 }
1000 dbg("%s: hp_register_write_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
1001 972
1002 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 973 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1003 if (rc) { 974 if (rc) {
1004 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 975 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1005 return IRQ_NONE; 976 return IRQ_NONE;
1006 } 977 }
1007 dbg("%s: hp_register_read_word SLOT_STATUS with value %x\n", __FUNCTION__, slot_status);
1008 978
1009 /* Clear command complete interrupt caused by this write */ 979 /* Clear command complete interrupt caused by this write */
1010 temp_word = 0x1F; 980 temp_word = 0x1F;
@@ -1248,12 +1218,7 @@ static struct hpc_ops pciehp_hpc_ops = {
1248 .check_lnk_status = hpc_check_lnk_status, 1218 .check_lnk_status = hpc_check_lnk_status,
1249}; 1219};
1250 1220
1251int pcie_init(struct controller * ctrl, 1221int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1252 struct pcie_device *dev,
1253 php_intr_callback_t attention_button_callback,
1254 php_intr_callback_t switch_change_callback,
1255 php_intr_callback_t presence_change_callback,
1256 php_intr_callback_t power_fault_callback)
1257{ 1222{
1258 struct php_ctlr_state_s *php_ctlr, *p; 1223 struct php_ctlr_state_s *php_ctlr, *p;
1259 void *instance_id = ctrl; 1224 void *instance_id = ctrl;
@@ -1282,8 +1247,8 @@ int pcie_init(struct controller * ctrl,
1282 pdev = dev->port; 1247 pdev = dev->port;
1283 php_ctlr->pci_dev = pdev; /* save pci_dev in context */ 1248 php_ctlr->pci_dev = pdev; /* save pci_dev in context */
1284 1249
1285 dbg("%s: pdev->vendor %x pdev->device %x\n", __FUNCTION__, 1250 dbg("%s: hotplug controller vendor id 0x%x device id 0x%x\n",
1286 pdev->vendor, pdev->device); 1251 __FUNCTION__, pdev->vendor, pdev->device);
1287 1252
1288 saved_cap_base = pcie_cap_base; 1253 saved_cap_base = pcie_cap_base;
1289 1254
@@ -1340,8 +1305,6 @@ int pcie_init(struct controller * ctrl,
1340 first = 0; 1305 first = 0;
1341 } 1306 }
1342 1307
1343 dbg("pdev = %p: b:d:f:irq=0x%x:%x:%x:%x\n", pdev, pdev->bus->number,
1344 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), dev->irq);
1345 for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++) 1308 for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++)
1346 if (pci_resource_len(pdev, rc) > 0) 1309 if (pci_resource_len(pdev, rc) > 0)
1347 dbg("pci resource[%d] start=0x%lx(len=0x%lx)\n", rc, 1310 dbg("pci resource[%d] start=0x%lx(len=0x%lx)\n", rc,
@@ -1359,13 +1322,12 @@ int pcie_init(struct controller * ctrl,
1359 1322
1360 /* find the IRQ */ 1323 /* find the IRQ */
1361 php_ctlr->irq = dev->irq; 1324 php_ctlr->irq = dev->irq;
1362 dbg("HPC interrupt = %d\n", php_ctlr->irq);
1363 1325
1364 /* Save interrupt callback info */ 1326 /* Save interrupt callback info */
1365 php_ctlr->attention_button_callback = attention_button_callback; 1327 php_ctlr->attention_button_callback = pciehp_handle_attention_button;
1366 php_ctlr->switch_change_callback = switch_change_callback; 1328 php_ctlr->switch_change_callback = pciehp_handle_switch_change;
1367 php_ctlr->presence_change_callback = presence_change_callback; 1329 php_ctlr->presence_change_callback = pciehp_handle_presence_change;
1368 php_ctlr->power_fault_callback = power_fault_callback; 1330 php_ctlr->power_fault_callback = pciehp_handle_power_fault;
1369 php_ctlr->callback_instance_id = instance_id; 1331 php_ctlr->callback_instance_id = instance_id;
1370 1332
1371 /* return PCI Controller Info */ 1333 /* return PCI Controller Info */
@@ -1387,15 +1349,12 @@ int pcie_init(struct controller * ctrl,
1387 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 1349 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
1388 goto abort_free_ctlr; 1350 goto abort_free_ctlr;
1389 } 1351 }
1390 dbg("%s : Mask HPIE hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, temp_word);
1391 1352
1392 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 1353 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1393 if (rc) { 1354 if (rc) {
1394 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1355 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1395 goto abort_free_ctlr; 1356 goto abort_free_ctlr;
1396 } 1357 }
1397 dbg("%s: Mask HPIE SLOT_STATUS offset %x reads slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base)
1398 , slot_status);
1399 1358
1400 temp_word = 0x1F; /* Clear all events */ 1359 temp_word = 0x1F; /* Clear all events */
1401 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 1360 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
@@ -1403,7 +1362,6 @@ int pcie_init(struct controller * ctrl,
1403 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1362 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1404 goto abort_free_ctlr; 1363 goto abort_free_ctlr;
1405 } 1364 }
1406 dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), temp_word);
1407 1365
1408 if (pciehp_poll_mode) {/* Install interrupt polling code */ 1366 if (pciehp_poll_mode) {/* Install interrupt polling code */
1409 /* Install and start the interrupt polling timer */ 1367 /* Install and start the interrupt polling timer */
@@ -1419,13 +1377,14 @@ int pcie_init(struct controller * ctrl,
1419 } 1377 }
1420 } 1378 }
1421 1379
1380 dbg("pciehp ctrl b:d:f:irq=0x%x:%x:%x:%x\n", pdev->bus->number,
1381 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), dev->irq);
1382
1422 rc = hp_register_read_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word); 1383 rc = hp_register_read_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
1423 if (rc) { 1384 if (rc) {
1424 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 1385 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
1425 goto abort_free_ctlr; 1386 goto abort_free_ctlr;
1426 } 1387 }
1427 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL(ctrl->cap_base), temp_word);
1428 dbg("%s: slot_cap %x\n", __FUNCTION__, slot_cap);
1429 1388
1430 intr_enable = intr_enable | PRSN_DETECT_ENABLE; 1389 intr_enable = intr_enable | PRSN_DETECT_ENABLE;
1431 1390
@@ -1445,7 +1404,6 @@ int pcie_init(struct controller * ctrl,
1445 } else { 1404 } else {
1446 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; 1405 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;
1447 } 1406 }
1448 dbg("%s: temp_word %x\n", __FUNCTION__, temp_word);
1449 1407
1450 /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */ 1408 /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */
1451 rc = hp_register_write_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word); 1409 rc = hp_register_write_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
@@ -1453,14 +1411,11 @@ int pcie_init(struct controller * ctrl,
1453 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 1411 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
1454 goto abort_free_ctlr; 1412 goto abort_free_ctlr;
1455 } 1413 }
1456 dbg("%s : Unmask HPIE hp_register_write_word SLOT_CTRL with %x\n", __FUNCTION__, temp_word);
1457 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 1414 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1458 if (rc) { 1415 if (rc) {
1459 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1416 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1460 goto abort_free_ctlr; 1417 goto abort_free_ctlr;
1461 } 1418 }
1462 dbg("%s: Unmask HPIE SLOT_STATUS offset %x reads slot_status %x\n", __FUNCTION__,
1463 SLOT_STATUS(ctrl->cap_base), slot_status);
1464 1419
1465 temp_word = 0x1F; /* Clear all events */ 1420 temp_word = 0x1F; /* Clear all events */
1466 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 1421 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
@@ -1468,8 +1423,16 @@ int pcie_init(struct controller * ctrl,
1468 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1423 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1469 goto abort_free_ctlr; 1424 goto abort_free_ctlr;
1470 } 1425 }
1471 dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), temp_word);
1472 1426
1427 if (pciehp_force) {
1428 dbg("Bypassing BIOS check for pciehp use on %s\n",
1429 pci_name(ctrl->pci_dev));
1430 } else {
1431 rc = pciehp_get_hp_hw_control_from_firmware(ctrl->pci_dev);
1432 if (rc)
1433 goto abort_free_ctlr;
1434 }
1435
1473 /* Add this HPC instance into the HPC list */ 1436 /* Add this HPC instance into the HPC list */
1474 spin_lock(&list_lock); 1437 spin_lock(&list_lock);
1475 if (php_ctlr_list_head == 0) { 1438 if (php_ctlr_list_head == 0) {
diff --git a/drivers/pci/hotplug/pciehp_pci.c b/drivers/pci/hotplug/pciehp_pci.c
index 33b539b34f7e..647673a7d224 100644
--- a/drivers/pci/hotplug/pciehp_pci.c
+++ b/drivers/pci/hotplug/pciehp_pci.c
@@ -27,801 +27,111 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/workqueue.h>
36#include <linux/proc_fs.h>
37#include <linux/pci.h> 33#include <linux/pci.h>
38#include "../pci.h" 34#include "../pci.h"
39#include "pciehp.h" 35#include "pciehp.h"
40#ifndef CONFIG_IA64
41#include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependant we are... */
42#endif
43 36
44 37
45int pciehp_configure_device (struct controller* ctrl, struct pci_func* func) 38int pciehp_configure_device(struct slot *p_slot)
46{ 39{
47 unsigned char bus; 40 struct pci_dev *dev;
48 struct pci_bus *child; 41 struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate;
49 int num; 42 int num, fn;
50 43
51 if (func->pci_dev == NULL) 44 dev = pci_find_slot(p_slot->bus, PCI_DEVFN(p_slot->device, 0));
52 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function)); 45 if (dev) {
53 46 err("Device %s already exists at %x:%x, cannot hot-add\n",
54 /* Still NULL ? Well then scan for it ! */ 47 pci_name(dev), p_slot->bus, p_slot->device);
55 if (func->pci_dev == NULL) { 48 return -EINVAL;
56 dbg("%s: pci_dev still null. do pci_scan_slot\n", __FUNCTION__);
57
58 num = pci_scan_slot(ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function));
59
60 if (num)
61 pci_bus_add_devices(ctrl->pci_dev->subordinate);
62
63 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
64 if (func->pci_dev == NULL) {
65 dbg("ERROR: pci_dev still null\n");
66 return 0;
67 }
68 } 49 }
69 50
70 if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { 51 num = pci_scan_slot(parent, PCI_DEVFN(p_slot->device, 0));
71 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus); 52 if (num == 0) {
72 child = pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus); 53 err("No new device found\n");
73 pci_do_scan_bus(child); 54 return -ENODEV;
55 }
74 56
57 for (fn = 0; fn < 8; fn++) {
58 if (!(dev = pci_find_slot(p_slot->bus,
59 PCI_DEVFN(p_slot->device, fn))))
60 continue;
61 if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
62 err("Cannot hot-add display device %s\n",
63 pci_name(dev));
64 continue;
65 }
66 if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||
67 (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) {
68 /* Find an unused bus number for the new bridge */
69 struct pci_bus *child;
70 unsigned char busnr, start = parent->secondary;
71 unsigned char end = parent->subordinate;
72 for (busnr = start; busnr <= end; busnr++) {
73 if (!pci_find_bus(pci_domain_nr(parent),
74 busnr))
75 break;
76 }
77 if (busnr >= end) {
78 err("No free bus for hot-added bridge\n");
79 continue;
80 }
81 child = pci_add_new_bus(parent, dev, busnr);
82 if (!child) {
83 err("Cannot add new bus for %s\n",
84 pci_name(dev));
85 continue;
86 }
87 child->subordinate = pci_do_scan_bus(child);
88 pci_bus_size_bridges(child);
89 }
90 /* TBD: program firmware provided _HPP values */
91 /* program_fw_provided_values(dev); */
75 } 92 }
76 93
94 pci_bus_assign_resources(parent);
95 pci_bus_add_devices(parent);
96 pci_enable_bridges(parent);
77 return 0; 97 return 0;
78} 98}
79 99
80 100int pciehp_unconfigure_device(struct slot *p_slot)
81int pciehp_unconfigure_device(struct pci_func* func)
82{ 101{
83 int rc = 0; 102 int rc = 0;
84 int j; 103 int j;
85 struct pci_bus *pbus; 104 u8 bctl = 0;
86 105
87 dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus, 106 dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus,
88 func->device, func->function); 107 p_slot->device);
89 pbus = func->pci_dev->bus;
90 108
91 for (j=0; j<8 ; j++) { 109 for (j=0; j<8 ; j++) {
92 struct pci_dev* temp = pci_find_slot(func->bus, 110 struct pci_dev* temp = pci_find_slot(p_slot->bus,
93 (func->device << 3) | j); 111 (p_slot->device << 3) | j);
94 if (temp) { 112 if (!temp)
95 pci_remove_bus_device(temp); 113 continue;
114 if ((temp->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
115 err("Cannot remove display device %s\n",
116 pci_name(temp));
117 continue;
96 } 118 }
119 if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
120 pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, &bctl);
121 if (bctl & PCI_BRIDGE_CTL_VGA) {
122 err("Cannot remove display device %s\n",
123 pci_name(temp));
124 continue;
125 }
126 }
127 pci_remove_bus_device(temp);
97 } 128 }
98 /* 129 /*
99 * Some PCI Express root ports require fixup after hot-plug operation. 130 * Some PCI Express root ports require fixup after hot-plug operation.
100 */ 131 */
101 if (pcie_mch_quirk) 132 if (pcie_mch_quirk)
102 pci_fixup_device(pci_fixup_final, pbus->self); 133 pci_fixup_device(pci_fixup_final, p_slot->ctrl->pci_dev);
103 134
104 return rc; 135 return rc;
105} 136}
106 137
107/*
108 * pciehp_set_irq
109 *
110 * @bus_num: bus number of PCI device
111 * @dev_num: device number of PCI device
112 * @slot: pointer to u8 where slot number will be returned
113 */
114int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
115{
116#if defined(CONFIG_X86) && !defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_64)
117 int rc;
118 u16 temp_word;
119 struct pci_dev fakedev;
120 struct pci_bus fakebus;
121
122 fakedev.devfn = dev_num << 3;
123 fakedev.bus = &fakebus;
124 fakebus.number = bus_num;
125 dbg("%s: dev %d, bus %d, pin %d, num %d\n",
126 __FUNCTION__, dev_num, bus_num, int_pin, irq_num);
127 rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
128 dbg("%s: rc %d\n", __FUNCTION__, rc);
129 if (!rc)
130 return !rc;
131
132 /* set the Edge Level Control Register (ELCR) */
133 temp_word = inb(0x4d0);
134 temp_word |= inb(0x4d1) << 8;
135
136 temp_word |= 0x01 << irq_num;
137
138 /* This should only be for x86 as it sets the Edge Level Control Register */
139 outb((u8) (temp_word & 0xFF), 0x4d0);
140 outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
141#endif
142 return 0;
143}
144
145/* More PCI configuration routines; this time centered around hotplug controller */
146
147
148/*
149 * pciehp_save_config
150 *
151 * Reads configuration for all slots in a PCI bus and saves info.
152 *
153 * Note: For non-hot plug busses, the slot # saved is the device #
154 *
155 * returns 0 if success
156 */
157int pciehp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num)
158{
159 int rc;
160 u8 class_code;
161 u8 header_type;
162 u32 ID;
163 u8 secondary_bus;
164 struct pci_func *new_slot;
165 int sub_bus;
166 int max_functions;
167 int function;
168 u8 DevError;
169 int device = 0;
170 int cloop = 0;
171 int stop_it;
172 int index;
173 int is_hot_plug = num_ctlr_slots || first_device_num;
174 struct pci_bus lpci_bus, *pci_bus;
175 int FirstSupported, LastSupported;
176
177 dbg("%s: Enter\n", __FUNCTION__);
178
179 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
180 pci_bus = &lpci_bus;
181
182 dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__,
183 num_ctlr_slots, first_device_num);
184
185 /* Decide which slots are supported */
186 if (is_hot_plug) {
187 /*********************************
188 * is_hot_plug is the slot mask
189 *********************************/
190 FirstSupported = first_device_num;
191 LastSupported = FirstSupported + num_ctlr_slots - 1;
192 } else {
193 FirstSupported = 0;
194 LastSupported = 0x1F;
195 }
196
197 dbg("FirstSupported = %d, LastSupported = %d\n", FirstSupported,
198 LastSupported);
199
200 /* Save PCI configuration space for all devices in supported slots */
201 dbg("%s: pci_bus->number = %x\n", __FUNCTION__, pci_bus->number);
202 pci_bus->number = busnumber;
203 dbg("%s: bus = %x, dev = %x\n", __FUNCTION__, busnumber, device);
204 for (device = FirstSupported; device <= LastSupported; device++) {
205 ID = 0xFFFFFFFF;
206 rc = pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0),
207 PCI_VENDOR_ID, &ID);
208
209 if (ID != 0xFFFFFFFF) { /* device in slot */
210 dbg("%s: ID = %x\n", __FUNCTION__, ID);
211 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
212 0x0B, &class_code);
213 if (rc)
214 return rc;
215
216 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
217 PCI_HEADER_TYPE, &header_type);
218 if (rc)
219 return rc;
220
221 dbg("class_code = %x, header_type = %x\n", class_code, header_type);
222
223 /* If multi-function device, set max_functions to 8 */
224 if (header_type & 0x80)
225 max_functions = 8;
226 else
227 max_functions = 1;
228
229 function = 0;
230
231 do {
232 DevError = 0;
233 dbg("%s: In do loop\n", __FUNCTION__);
234
235 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* P-P Bridge */
236 /* Recurse the subordinate bus
237 * get the subordinate bus number
238 */
239 rc = pci_bus_read_config_byte(pci_bus,
240 PCI_DEVFN(device, function),
241 PCI_SECONDARY_BUS, &secondary_bus);
242 if (rc) {
243 return rc;
244 } else {
245 sub_bus = (int) secondary_bus;
246
247 /* Save secondary bus cfg spc with this recursive call. */
248 rc = pciehp_save_config(ctrl, sub_bus, 0, 0);
249 if (rc)
250 return rc;
251 }
252 }
253
254 index = 0;
255 new_slot = pciehp_slot_find(busnumber, device, index++);
256
257 dbg("%s: new_slot = %p bus %x dev %x fun %x\n",
258 __FUNCTION__, new_slot, busnumber, device, index-1);
259
260 while (new_slot && (new_slot->function != (u8) function)) {
261 new_slot = pciehp_slot_find(busnumber, device, index++);
262 dbg("%s: while loop, new_slot = %p bus %x dev %x fun %x\n",
263 __FUNCTION__, new_slot, busnumber, device, index-1);
264 }
265 if (!new_slot) {
266 /* Setup slot structure. */
267 new_slot = pciehp_slot_create(busnumber);
268 dbg("%s: if, new_slot = %p bus %x dev %x fun %x\n",
269 __FUNCTION__, new_slot, busnumber, device, function);
270
271 if (new_slot == NULL)
272 return(1);
273 }
274
275 new_slot->bus = (u8) busnumber;
276 new_slot->device = (u8) device;
277 new_slot->function = (u8) function;
278 new_slot->is_a_board = 1;
279 new_slot->switch_save = 0x10;
280 /* In case of unsupported board */
281 new_slot->status = DevError;
282 new_slot->pci_dev = pci_find_slot(new_slot->bus,
283 (new_slot->device << 3) | new_slot->function);
284 dbg("new_slot->pci_dev = %p\n", new_slot->pci_dev);
285
286 for (cloop = 0; cloop < 0x20; cloop++) {
287 rc = pci_bus_read_config_dword(pci_bus,
288 PCI_DEVFN(device, function),
289 cloop << 2,
290 (u32 *) &(new_slot->config_space [cloop]));
291 /* dbg("new_slot->config_space[%x] = %x\n",
292 cloop, new_slot->config_space[cloop]); */
293 if (rc)
294 return rc;
295 }
296
297 function++;
298
299 stop_it = 0;
300
301 /* this loop skips to the next present function
302 * reading in Class Code and Header type.
303 */
304
305 while ((function < max_functions)&&(!stop_it)) {
306 dbg("%s: In while loop \n", __FUNCTION__);
307 rc = pci_bus_read_config_dword(pci_bus,
308 PCI_DEVFN(device, function),
309 PCI_VENDOR_ID, &ID);
310
311 if (ID == 0xFFFFFFFF) { /* nothing there. */
312 function++;
313 dbg("Nothing there\n");
314 } else { /* Something there */
315 rc = pci_bus_read_config_byte(pci_bus,
316 PCI_DEVFN(device, function),
317 0x0B, &class_code);
318 if (rc)
319 return rc;
320
321 rc = pci_bus_read_config_byte(pci_bus,
322 PCI_DEVFN(device, function),
323 PCI_HEADER_TYPE, &header_type);
324 if (rc)
325 return rc;
326
327 dbg("class_code = %x, header_type = %x\n", class_code, header_type);
328 stop_it++;
329 }
330 }
331
332 } while (function < max_functions);
333 /* End of IF (device in slot?) */
334 } else if (is_hot_plug) {
335 /* Setup slot structure with entry for empty slot */
336 new_slot = pciehp_slot_create(busnumber);
337
338 if (new_slot == NULL) {
339 return(1);
340 }
341 dbg("new_slot = %p, bus = %x, dev = %x, fun = %x\n", new_slot,
342 new_slot->bus, new_slot->device, new_slot->function);
343
344 new_slot->bus = (u8) busnumber;
345 new_slot->device = (u8) device;
346 new_slot->function = 0;
347 new_slot->is_a_board = 0;
348 new_slot->presence_save = 0;
349 new_slot->switch_save = 0;
350 }
351 } /* End of FOR loop */
352
353 dbg("%s: Exit\n", __FUNCTION__);
354 return(0);
355}
356
357
358/*
359 * pciehp_save_slot_config
360 *
361 * Saves configuration info for all PCI devices in a given slot
362 * including subordinate busses.
363 *
364 * returns 0 if success
365 */
366int pciehp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot)
367{
368 int rc;
369 u8 class_code;
370 u8 header_type;
371 u32 ID;
372 u8 secondary_bus;
373 int sub_bus;
374 int max_functions;
375 int function;
376 int cloop = 0;
377 int stop_it;
378 struct pci_bus lpci_bus, *pci_bus;
379 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
380 pci_bus = &lpci_bus;
381 pci_bus->number = new_slot->bus;
382
383 ID = 0xFFFFFFFF;
384
385 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(new_slot->device, 0),
386 PCI_VENDOR_ID, &ID);
387
388 if (ID != 0xFFFFFFFF) { /* device in slot */
389 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
390 0x0B, &class_code);
391
392 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
393 PCI_HEADER_TYPE, &header_type);
394
395 if (header_type & 0x80) /* Multi-function device */
396 max_functions = 8;
397 else
398 max_functions = 1;
399
400 function = 0;
401
402 do {
403 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
404 /* Recurse the subordinate bus */
405 pci_bus_read_config_byte(pci_bus,
406 PCI_DEVFN(new_slot->device, function),
407 PCI_SECONDARY_BUS, &secondary_bus);
408
409 sub_bus = (int) secondary_bus;
410
411 /* Save the config headers for the secondary bus. */
412 rc = pciehp_save_config(ctrl, sub_bus, 0, 0);
413
414 if (rc)
415 return rc;
416
417 } /* End of IF */
418
419 new_slot->status = 0;
420
421 for (cloop = 0; cloop < 0x20; cloop++) {
422 pci_bus_read_config_dword(pci_bus,
423 PCI_DEVFN(new_slot->device, function),
424 cloop << 2,
425 (u32 *) &(new_slot->config_space [cloop]));
426 }
427
428 function++;
429
430 stop_it = 0;
431
432 /* this loop skips to the next present function
433 * reading in the Class Code and the Header type.
434 */
435
436 while ((function < max_functions) && (!stop_it)) {
437 pci_bus_read_config_dword(pci_bus,
438 PCI_DEVFN(new_slot->device, function),
439 PCI_VENDOR_ID, &ID);
440
441 if (ID == 0xFFFFFFFF) { /* nothing there. */
442 function++;
443 } else { /* Something there */
444 pci_bus_read_config_byte(pci_bus,
445 PCI_DEVFN(new_slot->device, function),
446 0x0B, &class_code);
447
448 pci_bus_read_config_byte(pci_bus,
449 PCI_DEVFN(new_slot->device, function),
450 PCI_HEADER_TYPE, &header_type);
451
452 stop_it++;
453 }
454 }
455
456 } while (function < max_functions);
457 } /* End of IF (device in slot?) */
458 else {
459 return 2;
460 }
461
462 return 0;
463}
464
465
466/*
467 * pciehp_save_used_resources
468 *
469 * Stores used resource information for existing boards. this is
470 * for boards that were in the system when this driver was loaded.
471 * this function is for hot plug ADD
472 *
473 * returns 0 if success
474 * if disable == 1(DISABLE_CARD),
475 * it loops for all functions of the slot and disables them.
476 * else, it just get resources of the function and return.
477 */
478int pciehp_save_used_resources(struct controller *ctrl, struct pci_func *func, int disable)
479{
480 u8 cloop;
481 u8 header_type;
482 u8 secondary_bus;
483 u8 temp_byte;
484 u16 command;
485 u16 save_command;
486 u16 w_base, w_length;
487 u32 temp_register;
488 u32 save_base;
489 u32 base, length;
490 u64 base64 = 0;
491 int index = 0;
492 unsigned int devfn;
493 struct pci_resource *mem_node = NULL;
494 struct pci_resource *p_mem_node = NULL;
495 struct pci_resource *t_mem_node;
496 struct pci_resource *io_node;
497 struct pci_resource *bus_node;
498 struct pci_bus lpci_bus, *pci_bus;
499 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
500 pci_bus = &lpci_bus;
501
502 if (disable)
503 func = pciehp_slot_find(func->bus, func->device, index++);
504
505 while ((func != NULL) && func->is_a_board) {
506 pci_bus->number = func->bus;
507 devfn = PCI_DEVFN(func->device, func->function);
508
509 /* Save the command register */
510 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
511
512 if (disable) {
513 /* disable card */
514 command = 0x00;
515 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
516 }
517
518 /* Check for Bridge */
519 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
520
521 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
522 dbg("Save_used_res of PCI bridge b:d=0x%x:%x, sc=0x%x\n",
523 func->bus, func->device, save_command);
524 if (disable) {
525 /* Clear Bridge Control Register */
526 command = 0x00;
527 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
528 }
529
530 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
531 pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
532
533 bus_node = kmalloc(sizeof(struct pci_resource),
534 GFP_KERNEL);
535 if (!bus_node)
536 return -ENOMEM;
537
538 bus_node->base = (ulong)secondary_bus;
539 bus_node->length = (ulong)(temp_byte - secondary_bus + 1);
540
541 bus_node->next = func->bus_head;
542 func->bus_head = bus_node;
543
544 /* Save IO base and Limit registers */
545 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &temp_byte);
546 base = temp_byte;
547 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &temp_byte);
548 length = temp_byte;
549
550 if ((base <= length) && (!disable || (save_command & PCI_COMMAND_IO))) {
551 io_node = kmalloc(sizeof(struct pci_resource),
552 GFP_KERNEL);
553 if (!io_node)
554 return -ENOMEM;
555
556 io_node->base = (ulong)(base & PCI_IO_RANGE_MASK) << 8;
557 io_node->length = (ulong)(length - base + 0x10) << 8;
558
559 io_node->next = func->io_head;
560 func->io_head = io_node;
561 }
562
563 /* Save memory base and Limit registers */
564 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
565 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
566
567 if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
568 mem_node = kmalloc(sizeof(struct pci_resource),
569 GFP_KERNEL);
570 if (!mem_node)
571 return -ENOMEM;
572
573 mem_node->base = (ulong)w_base << 16;
574 mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
575
576 mem_node->next = func->mem_head;
577 func->mem_head = mem_node;
578 }
579 /* Save prefetchable memory base and Limit registers */
580 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
581 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
582
583 if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
584 p_mem_node = kmalloc(sizeof(struct pci_resource),
585 GFP_KERNEL);
586 if (!p_mem_node)
587 return -ENOMEM;
588
589 p_mem_node->base = (ulong)w_base << 16;
590 p_mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
591
592 p_mem_node->next = func->p_mem_head;
593 func->p_mem_head = p_mem_node;
594 }
595 } else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
596 dbg("Save_used_res of PCI adapter b:d=0x%x:%x, sc=0x%x\n",
597 func->bus, func->device, save_command);
598
599 /* Figure out IO and memory base lengths */
600 for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
601 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
602
603 temp_register = 0xFFFFFFFF;
604 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
605 pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
606
607 if (!disable)
608 pci_bus_write_config_dword(pci_bus, devfn, cloop, save_base);
609
610 if (!temp_register)
611 continue;
612
613 base = temp_register;
614
615 if ((base & PCI_BASE_ADDRESS_SPACE_IO) &&
616 (!disable || (save_command & PCI_COMMAND_IO))) {
617 /* IO base */
618 /* set temp_register = amount of IO space requested */
619 base = base & 0xFFFFFFFCL;
620 base = (~base) + 1;
621
622 io_node = kmalloc(sizeof (struct pci_resource),
623 GFP_KERNEL);
624 if (!io_node)
625 return -ENOMEM;
626
627 io_node->base = (ulong)save_base & PCI_BASE_ADDRESS_IO_MASK;
628 io_node->length = (ulong)base;
629 dbg("sur adapter: IO bar=0x%x(length=0x%x)\n",
630 io_node->base, io_node->length);
631
632 io_node->next = func->io_head;
633 func->io_head = io_node;
634 } else { /* map Memory */
635 int prefetchable = 1;
636 /* struct pci_resources **res_node; */
637 char *res_type_str = "PMEM";
638 u32 temp_register2;
639
640 t_mem_node = kmalloc(sizeof (struct pci_resource),
641 GFP_KERNEL);
642 if (!t_mem_node)
643 return -ENOMEM;
644
645 if (!(base & PCI_BASE_ADDRESS_MEM_PREFETCH) &&
646 (!disable || (save_command & PCI_COMMAND_MEMORY))) {
647 prefetchable = 0;
648 mem_node = t_mem_node;
649 res_type_str++;
650 } else
651 p_mem_node = t_mem_node;
652
653 base = base & 0xFFFFFFF0L;
654 base = (~base) + 1;
655
656 switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
657 case PCI_BASE_ADDRESS_MEM_TYPE_32:
658 if (prefetchable) {
659 p_mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
660 p_mem_node->length = (ulong)base;
661 dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
662 res_type_str,
663 p_mem_node->base,
664 p_mem_node->length);
665
666 p_mem_node->next = func->p_mem_head;
667 func->p_mem_head = p_mem_node;
668 } else {
669 mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
670 mem_node->length = (ulong)base;
671 dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
672 res_type_str,
673 mem_node->base,
674 mem_node->length);
675
676 mem_node->next = func->mem_head;
677 func->mem_head = mem_node;
678 }
679 break;
680 case PCI_BASE_ADDRESS_MEM_TYPE_64:
681 pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
682 base64 = temp_register2;
683 base64 = (base64 << 32) | save_base;
684
685 if (temp_register2) {
686 dbg("sur adapter: 64 %s high dword of base64(0x%x:%x) masked to 0\n",
687 res_type_str, temp_register2, (u32)base64);
688 base64 &= 0x00000000FFFFFFFFL;
689 }
690
691 if (prefetchable) {
692 p_mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
693 p_mem_node->length = base;
694 dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
695 res_type_str,
696 p_mem_node->base,
697 p_mem_node->length);
698
699 p_mem_node->next = func->p_mem_head;
700 func->p_mem_head = p_mem_node;
701 } else {
702 mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
703 mem_node->length = base;
704 dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
705 res_type_str,
706 mem_node->base,
707 mem_node->length);
708
709 mem_node->next = func->mem_head;
710 func->mem_head = mem_node;
711 }
712 cloop += 4;
713 break;
714 default:
715 dbg("asur: reserved BAR type=0x%x\n",
716 temp_register);
717 break;
718 }
719 }
720 } /* End of base register loop */
721 } else { /* Some other unknown header type */
722 dbg("Save_used_res of PCI unknown type b:d=0x%x:%x. skip.\n",
723 func->bus, func->device);
724 }
725
726 /* find the next device in this slot */
727 if (!disable)
728 break;
729 func = pciehp_slot_find(func->bus, func->device, index++);
730 }
731
732 return 0;
733}
734
735
736/**
737 * kfree_resource_list: release memory of all list members
738 * @res: resource list to free
739 */
740static inline void
741return_resource_list(struct pci_resource **func, struct pci_resource **res)
742{
743 struct pci_resource *node;
744 struct pci_resource *t_node;
745
746 node = *func;
747 *func = NULL;
748 while (node) {
749 t_node = node->next;
750 return_resource(res, node);
751 node = t_node;
752 }
753}
754
755/*
756 * pciehp_return_board_resources
757 *
758 * this routine returns all resources allocated to a board to
759 * the available pool.
760 *
761 * returns 0 if success
762 */
763int pciehp_return_board_resources(struct pci_func * func,
764 struct resource_lists * resources)
765{
766 int rc;
767
768 dbg("%s\n", __FUNCTION__);
769
770 if (!func)
771 return 1;
772
773 return_resource_list(&(func->io_head),&(resources->io_head));
774 return_resource_list(&(func->mem_head),&(resources->mem_head));
775 return_resource_list(&(func->p_mem_head),&(resources->p_mem_head));
776 return_resource_list(&(func->bus_head),&(resources->bus_head));
777
778 rc = pciehp_resource_sort_and_combine(&(resources->mem_head));
779 rc |= pciehp_resource_sort_and_combine(&(resources->p_mem_head));
780 rc |= pciehp_resource_sort_and_combine(&(resources->io_head));
781 rc |= pciehp_resource_sort_and_combine(&(resources->bus_head));
782
783 return rc;
784}
785
786/**
787 * kfree_resource_list: release memory of all list members
788 * @res: resource list to free
789 */
790static inline void
791kfree_resource_list(struct pci_resource **r)
792{
793 struct pci_resource *res, *tres;
794
795 res = *r;
796 *r = NULL;
797
798 while (res) {
799 tres = res;
800 res = res->next;
801 kfree(tres);
802 }
803}
804
805/**
806 * pciehp_destroy_resource_list: put node back in the resource list
807 * @resources: list to put nodes back
808 */
809void pciehp_destroy_resource_list(struct resource_lists * resources)
810{
811 kfree_resource_list(&(resources->io_head));
812 kfree_resource_list(&(resources->mem_head));
813 kfree_resource_list(&(resources->p_mem_head));
814 kfree_resource_list(&(resources->bus_head));
815}
816
817/**
818 * pciehp_destroy_board_resources: put node back in the resource list
819 * @resources: list to put nodes back
820 */
821void pciehp_destroy_board_resources(struct pci_func * func)
822{
823 kfree_resource_list(&(func->io_head));
824 kfree_resource_list(&(func->mem_head));
825 kfree_resource_list(&(func->p_mem_head));
826 kfree_resource_list(&(func->bus_head));
827}
diff --git a/drivers/pci/hotplug/pciehprm.h b/drivers/pci/hotplug/pciehprm.h
deleted file mode 100644
index 05f20fbc5f50..000000000000
--- a/drivers/pci/hotplug/pciehprm.h
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * PCIEHPRM : PCIEHP Resource Manager for ACPI/non-ACPI platform
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001,2003 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
27 *
28 */
29
30#ifndef _PCIEHPRM_H_
31#define _PCIEHPRM_H_
32
33#ifdef CONFIG_HOTPLUG_PCI_PCIE_PHPRM_NONACPI
34#include "pciehprm_nonacpi.h"
35#endif
36
37int pciehprm_init(enum php_ctlr_type ct);
38void pciehprm_cleanup(void);
39int pciehprm_print_pirt(void);
40int pciehprm_find_available_resources(struct controller *ctrl);
41int pciehprm_set_hpp(struct controller *ctrl, struct pci_func *func, u8 card_type);
42void pciehprm_enable_card(struct controller *ctrl, struct pci_func *func, u8 card_type);
43
44#ifdef DEBUG
45#define RES_CHECK(this, bits) \
46 { if (((this) & (bits - 1))) \
47 printk("%s:%d ERR: potential res loss!\n", __FUNCTION__, __LINE__); }
48#else
49#define RES_CHECK(this, bits)
50#endif
51
52#endif /* _PCIEHPRM_H_ */
diff --git a/drivers/pci/hotplug/pciehprm_acpi.c b/drivers/pci/hotplug/pciehprm_acpi.c
index 1406db35b089..ae244e218620 100644
--- a/drivers/pci/hotplug/pciehprm_acpi.c
+++ b/drivers/pci/hotplug/pciehprm_acpi.c
@@ -24,100 +24,20 @@
24 * 24 *
25 */ 25 */
26 26
27#include <linux/config.h>
28#include <linux/module.h> 27#include <linux/module.h>
29#include <linux/kernel.h> 28#include <linux/kernel.h>
30#include <linux/types.h> 29#include <linux/types.h>
31#include <linux/pci.h> 30#include <linux/pci.h>
32#include <linux/init.h>
33#include <linux/acpi.h> 31#include <linux/acpi.h>
34#include <linux/efi.h>
35#include <linux/pci-acpi.h> 32#include <linux/pci-acpi.h>
36#include <asm/uaccess.h>
37#include <asm/system.h>
38#ifdef CONFIG_IA64
39#include <asm/iosapic.h>
40#endif
41#include <acpi/acpi.h>
42#include <acpi/acpi_bus.h> 33#include <acpi/acpi_bus.h>
43#include <acpi/actypes.h> 34#include <acpi/actypes.h>
44#include "pciehp.h" 35#include "pciehp.h"
45#include "pciehprm.h"
46
47#define PCI_MAX_BUS 0x100
48#define ACPI_STA_DEVICE_PRESENT 0x01
49 36
50#define METHOD_NAME__SUN "_SUN" 37#define METHOD_NAME__SUN "_SUN"
51#define METHOD_NAME__HPP "_HPP" 38#define METHOD_NAME__HPP "_HPP"
52#define METHOD_NAME_OSHP "OSHP" 39#define METHOD_NAME_OSHP "OSHP"
53 40
54/* Status code for running acpi method to gain native control */
55#define NC_NOT_RUN 0
56#define OSC_NOT_EXIST 1
57#define OSC_RUN_FAILED 2
58#define OSHP_NOT_EXIST 3
59#define OSHP_RUN_FAILED 4
60#define NC_RUN_SUCCESS 5
61
62#define PHP_RES_BUS 0xA0
63#define PHP_RES_IO 0xA1
64#define PHP_RES_MEM 0xA2
65#define PHP_RES_PMEM 0xA3
66
67#define BRIDGE_TYPE_P2P 0x00
68#define BRIDGE_TYPE_HOST 0x01
69
70/* this should go to drivers/acpi/include/ */
71struct acpi__hpp {
72 u8 cache_line_size;
73 u8 latency_timer;
74 u8 enable_serr;
75 u8 enable_perr;
76};
77
78struct acpi_php_slot {
79 struct acpi_php_slot *next;
80 struct acpi_bridge *bridge;
81 acpi_handle handle;
82 int seg;
83 int bus;
84 int dev;
85 int fun;
86 u32 sun;
87 struct pci_resource *mem_head;
88 struct pci_resource *p_mem_head;
89 struct pci_resource *io_head;
90 struct pci_resource *bus_head;
91 void *slot_ops; /* _STA, _EJx, etc */
92 struct slot *slot;
93}; /* per func */
94
95struct acpi_bridge {
96 struct acpi_bridge *parent;
97 struct acpi_bridge *next;
98 struct acpi_bridge *child;
99 acpi_handle handle;
100 int seg;
101 int pbus; /* pdev->bus->number */
102 int pdevice; /* PCI_SLOT(pdev->devfn) */
103 int pfunction; /* PCI_DEVFN(pdev->devfn) */
104 int bus; /* pdev->subordinate->number */
105 struct acpi__hpp *_hpp;
106 struct acpi_php_slot *slots;
107 struct pci_resource *tmem_head; /* total from crs */
108 struct pci_resource *tp_mem_head; /* total from crs */
109 struct pci_resource *tio_head; /* total from crs */
110 struct pci_resource *tbus_head; /* total from crs */
111 struct pci_resource *mem_head; /* available */
112 struct pci_resource *p_mem_head; /* available */
113 struct pci_resource *io_head; /* available */
114 struct pci_resource *bus_head; /* available */
115 int scanned;
116 int type;
117};
118
119static struct acpi_bridge *acpi_bridges_head;
120
121static u8 * acpi_path_name( acpi_handle handle) 41static u8 * acpi_path_name( acpi_handle handle)
122{ 42{
123 acpi_status status; 43 acpi_status status;
@@ -133,85 +53,43 @@ static u8 * acpi_path_name( acpi_handle handle)
133 return path_name; 53 return path_name;
134} 54}
135 55
136static void acpi_get__hpp ( struct acpi_bridge *ab); 56static acpi_status
137static int acpi_run_oshp ( struct acpi_bridge *ab); 57acpi_run_hpp(acpi_handle handle, struct hotplug_params *hpp)
138static int osc_run_status = NC_NOT_RUN;
139static int oshp_run_status = NC_NOT_RUN;
140
141static int acpi_add_slot_to_php_slots(
142 struct acpi_bridge *ab,
143 int bus_num,
144 acpi_handle handle,
145 u32 adr,
146 u32 sun
147 )
148{
149 struct acpi_php_slot *aps;
150 static long samesun = -1;
151
152 aps = (struct acpi_php_slot *) kmalloc (sizeof(struct acpi_php_slot), GFP_KERNEL);
153 if (!aps) {
154 err ("acpi_pciehprm: alloc for aps fail\n");
155 return -1;
156 }
157 memset(aps, 0, sizeof(struct acpi_php_slot));
158
159 aps->handle = handle;
160 aps->bus = bus_num;
161 aps->dev = (adr >> 16) & 0xffff;
162 aps->fun = adr & 0xffff;
163 aps->sun = sun;
164
165 aps->next = ab->slots; /* cling to the bridge */
166 aps->bridge = ab;
167 ab->slots = aps;
168
169 ab->scanned += 1;
170 if (!ab->_hpp)
171 acpi_get__hpp(ab);
172
173 if (osc_run_status == OSC_NOT_EXIST)
174 oshp_run_status = acpi_run_oshp(ab);
175
176 if (sun != samesun) {
177 info("acpi_pciehprm: Slot sun(%x) at s:b:d:f=0x%02x:%02x:%02x:%02x\n",
178 aps->sun, ab->seg, aps->bus, aps->dev, aps->fun);
179 samesun = sun;
180 }
181 return 0;
182}
183
184static void acpi_get__hpp ( struct acpi_bridge *ab)
185{ 58{
186 acpi_status status; 59 acpi_status status;
187 u8 nui[4]; 60 u8 nui[4];
188 struct acpi_buffer ret_buf = { 0, NULL}; 61 struct acpi_buffer ret_buf = { 0, NULL};
189 union acpi_object *ext_obj, *package; 62 union acpi_object *ext_obj, *package;
190 u8 *path_name = acpi_path_name(ab->handle); 63 u8 *path_name = acpi_path_name(handle);
191 int i, len = 0; 64 int i, len = 0;
192 65
193 /* get _hpp */ 66 /* get _hpp */
194 status = acpi_evaluate_object(ab->handle, METHOD_NAME__HPP, NULL, &ret_buf); 67 status = acpi_evaluate_object(handle, METHOD_NAME__HPP, NULL, &ret_buf);
195 switch (status) { 68 switch (status) {
196 case AE_BUFFER_OVERFLOW: 69 case AE_BUFFER_OVERFLOW:
197 ret_buf.pointer = kmalloc (ret_buf.length, GFP_KERNEL); 70 ret_buf.pointer = kmalloc (ret_buf.length, GFP_KERNEL);
198 if (!ret_buf.pointer) { 71 if (!ret_buf.pointer) {
199 err ("acpi_pciehprm:%s alloc for _HPP fail\n", path_name); 72 err ("%s:%s alloc for _HPP fail\n", __FUNCTION__,
200 return; 73 path_name);
74 return AE_NO_MEMORY;
201 } 75 }
202 status = acpi_evaluate_object(ab->handle, METHOD_NAME__HPP, NULL, &ret_buf); 76 status = acpi_evaluate_object(handle, METHOD_NAME__HPP,
77 NULL, &ret_buf);
203 if (ACPI_SUCCESS(status)) 78 if (ACPI_SUCCESS(status))
204 break; 79 break;
205 default: 80 default:
206 if (ACPI_FAILURE(status)) { 81 if (ACPI_FAILURE(status)) {
207 err("acpi_pciehprm:%s _HPP fail=0x%x\n", path_name, status); 82 dbg("%s:%s _HPP fail=0x%x\n", __FUNCTION__,
208 return; 83 path_name, status);
84 return status;
209 } 85 }
210 } 86 }
211 87
212 ext_obj = (union acpi_object *) ret_buf.pointer; 88 ext_obj = (union acpi_object *) ret_buf.pointer;
213 if (ext_obj->type != ACPI_TYPE_PACKAGE) { 89 if (ext_obj->type != ACPI_TYPE_PACKAGE) {
214 err ("acpi_pciehprm:%s _HPP obj not a package\n", path_name); 90 err ("%s:%s _HPP obj not a package\n", __FUNCTION__,
91 path_name);
92 status = AE_ERROR;
215 goto free_and_return; 93 goto free_and_return;
216 } 94 }
217 95
@@ -224,1514 +102,153 @@ static void acpi_get__hpp ( struct acpi_bridge *ab)
224 nui[i] = (u8)ext_obj->integer.value; 102 nui[i] = (u8)ext_obj->integer.value;
225 break; 103 break;
226 default: 104 default:
227 err ("acpi_pciehprm:%s _HPP obj type incorrect\n", path_name); 105 err ("%s:%s _HPP obj type incorrect\n", __FUNCTION__,
106 path_name);
107 status = AE_ERROR;
228 goto free_and_return; 108 goto free_and_return;
229 } 109 }
230 } 110 }
231 111
232 ab->_hpp = kmalloc (sizeof (struct acpi__hpp), GFP_KERNEL); 112 hpp->cache_line_size = nui[0];
233 if (!ab->_hpp) { 113 hpp->latency_timer = nui[1];
234 err ("acpi_pciehprm:%s alloc for _HPP failed\n", path_name); 114 hpp->enable_serr = nui[2];
235 goto free_and_return; 115 hpp->enable_perr = nui[3];
236 }
237 memset(ab->_hpp, 0, sizeof(struct acpi__hpp));
238 116
239 ab->_hpp->cache_line_size = nui[0]; 117 dbg(" _HPP: cache_line_size=0x%x\n", hpp->cache_line_size);
240 ab->_hpp->latency_timer = nui[1]; 118 dbg(" _HPP: latency timer =0x%x\n", hpp->latency_timer);
241 ab->_hpp->enable_serr = nui[2]; 119 dbg(" _HPP: enable SERR =0x%x\n", hpp->enable_serr);
242 ab->_hpp->enable_perr = nui[3]; 120 dbg(" _HPP: enable PERR =0x%x\n", hpp->enable_perr);
243
244 dbg(" _HPP: cache_line_size=0x%x\n", ab->_hpp->cache_line_size);
245 dbg(" _HPP: latency timer =0x%x\n", ab->_hpp->latency_timer);
246 dbg(" _HPP: enable SERR =0x%x\n", ab->_hpp->enable_serr);
247 dbg(" _HPP: enable PERR =0x%x\n", ab->_hpp->enable_perr);
248 121
249free_and_return: 122free_and_return:
250 kfree(ret_buf.pointer); 123 kfree(ret_buf.pointer);
124 return status;
251} 125}
252 126
253static int acpi_run_oshp ( struct acpi_bridge *ab) 127static acpi_status acpi_run_oshp(acpi_handle handle)
254{ 128{
255 acpi_status status; 129 acpi_status status;
256 u8 *path_name = acpi_path_name(ab->handle); 130 u8 *path_name = acpi_path_name(handle);
257 131
258 /* run OSHP */ 132 /* run OSHP */
259 status = acpi_evaluate_object(ab->handle, METHOD_NAME_OSHP, NULL, NULL); 133 status = acpi_evaluate_object(handle, METHOD_NAME_OSHP, NULL, NULL);
260 if (ACPI_FAILURE(status)) { 134 if (ACPI_FAILURE(status)) {
261 err("acpi_pciehprm:%s OSHP fails=0x%x\n", path_name, status); 135 dbg("%s:%s OSHP fails=0x%x\n", __FUNCTION__, path_name,
262 oshp_run_status = (status == AE_NOT_FOUND) ? OSHP_NOT_EXIST : OSHP_RUN_FAILED; 136 status);
263 } else { 137 } else {
264 oshp_run_status = NC_RUN_SUCCESS; 138 dbg("%s:%s OSHP passes\n", __FUNCTION__, path_name);
265 dbg("acpi_pciehprm:%s OSHP passes =0x%x\n", path_name, status);
266 dbg("acpi_pciehprm:%s oshp_run_status =0x%x\n", path_name, oshp_run_status);
267 }
268 return oshp_run_status;
269}
270
271static acpi_status acpi_evaluate_crs(
272 acpi_handle handle,
273 struct acpi_resource **retbuf
274 )
275{
276 acpi_status status;
277 struct acpi_buffer crsbuf;
278 u8 *path_name = acpi_path_name(handle);
279
280 crsbuf.length = 0;
281 crsbuf.pointer = NULL;
282
283 status = acpi_get_current_resources (handle, &crsbuf);
284
285 switch (status) {
286 case AE_BUFFER_OVERFLOW:
287 break; /* found */
288 case AE_NOT_FOUND:
289 dbg("acpi_pciehprm:%s _CRS not found\n", path_name);
290 return status;
291 default:
292 err ("acpi_pciehprm:%s _CRS fail=0x%x\n", path_name, status);
293 return status;
294 } 139 }
295
296 crsbuf.pointer = kmalloc (crsbuf.length, GFP_KERNEL);
297 if (!crsbuf.pointer) {
298 err ("acpi_pciehprm: alloc %ld bytes for %s _CRS fail\n", (ulong)crsbuf.length, path_name);
299 return AE_NO_MEMORY;
300 }
301
302 status = acpi_get_current_resources (handle, &crsbuf);
303 if (ACPI_FAILURE(status)) {
304 err("acpi_pciehprm: %s _CRS fail=0x%x.\n", path_name, status);
305 kfree(crsbuf.pointer);
306 return status;
307 }
308
309 *retbuf = crsbuf.pointer;
310
311 return status; 140 return status;
312} 141}
313 142
314static void free_pci_resource ( struct pci_resource *aprh) 143static int is_root_bridge(acpi_handle handle)
315{ 144{
316 struct pci_resource *res, *next; 145 acpi_status status;
146 struct acpi_device_info *info;
147 struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
148 int i;
317 149
318 for (res = aprh; res; res = next) { 150 status = acpi_get_object_info(handle, &buffer);
319 next = res->next; 151 if (ACPI_SUCCESS(status)) {
320 kfree(res); 152 info = buffer.pointer;
321 } 153 if ((info->valid & ACPI_VALID_HID) &&
322} 154 !strcmp(PCI_ROOT_HID_STRING,
323 155 info->hardware_id.value)) {
324static void print_pci_resource ( struct pci_resource *aprh) 156 acpi_os_free(buffer.pointer);
325{ 157 return 1;
326 struct pci_resource *res; 158 }
327 159 if (info->valid & ACPI_VALID_CID) {
328 for (res = aprh; res; res = res->next) 160 for (i=0; i < info->compatibility_id.count; i++) {
329 dbg(" base= 0x%x length= 0x%x\n", res->base, res->length); 161 if (!strcmp(PCI_ROOT_HID_STRING,
330} 162 info->compatibility_id.id[i].value)) {
331 163 acpi_os_free(buffer.pointer);
332static void print_slot_resources( struct acpi_php_slot *aps) 164 return 1;
333{ 165 }
334 if (aps->bus_head) { 166 }
335 dbg(" BUS Resources:\n");
336 print_pci_resource (aps->bus_head);
337 }
338
339 if (aps->io_head) {
340 dbg(" IO Resources:\n");
341 print_pci_resource (aps->io_head);
342 }
343
344 if (aps->mem_head) {
345 dbg(" MEM Resources:\n");
346 print_pci_resource (aps->mem_head);
347 }
348
349 if (aps->p_mem_head) {
350 dbg(" PMEM Resources:\n");
351 print_pci_resource (aps->p_mem_head);
352 }
353}
354
355static void print_pci_resources( struct acpi_bridge *ab)
356{
357 if (ab->tbus_head) {
358 dbg(" Total BUS Resources:\n");
359 print_pci_resource (ab->tbus_head);
360 }
361 if (ab->bus_head) {
362 dbg(" BUS Resources:\n");
363 print_pci_resource (ab->bus_head);
364 }
365
366 if (ab->tio_head) {
367 dbg(" Total IO Resources:\n");
368 print_pci_resource (ab->tio_head);
369 }
370 if (ab->io_head) {
371 dbg(" IO Resources:\n");
372 print_pci_resource (ab->io_head);
373 }
374
375 if (ab->tmem_head) {
376 dbg(" Total MEM Resources:\n");
377 print_pci_resource (ab->tmem_head);
378 }
379 if (ab->mem_head) {
380 dbg(" MEM Resources:\n");
381 print_pci_resource (ab->mem_head);
382 }
383
384 if (ab->tp_mem_head) {
385 dbg(" Total PMEM Resources:\n");
386 print_pci_resource (ab->tp_mem_head);
387 }
388 if (ab->p_mem_head) {
389 dbg(" PMEM Resources:\n");
390 print_pci_resource (ab->p_mem_head);
391 }
392 if (ab->_hpp) {
393 dbg(" _HPP: cache_line_size=0x%x\n", ab->_hpp->cache_line_size);
394 dbg(" _HPP: latency timer =0x%x\n", ab->_hpp->latency_timer);
395 dbg(" _HPP: enable SERR =0x%x\n", ab->_hpp->enable_serr);
396 dbg(" _HPP: enable PERR =0x%x\n", ab->_hpp->enable_perr);
397 }
398}
399
400static int pciehprm_delete_resource(
401 struct pci_resource **aprh,
402 ulong base,
403 ulong size)
404{
405 struct pci_resource *res;
406 struct pci_resource *prevnode;
407 struct pci_resource *split_node;
408 ulong tbase;
409
410 pciehp_resource_sort_and_combine(aprh);
411
412 for (res = *aprh; res; res = res->next) {
413 if (res->base > base)
414 continue;
415
416 if ((res->base + res->length) < (base + size))
417 continue;
418
419 if (res->base < base) {
420 tbase = base;
421
422 if ((res->length - (tbase - res->base)) < size)
423 continue;
424
425 split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
426 if (!split_node)
427 return -ENOMEM;
428
429 split_node->base = res->base;
430 split_node->length = tbase - res->base;
431 res->base = tbase;
432 res->length -= split_node->length;
433
434 split_node->next = res->next;
435 res->next = split_node;
436 }
437
438 if (res->length >= size) {
439 split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
440 if (!split_node)
441 return -ENOMEM;
442
443 split_node->base = res->base + size;
444 split_node->length = res->length - size;
445 res->length = size;
446
447 split_node->next = res->next;
448 res->next = split_node;
449 }
450
451 if (*aprh == res) {
452 *aprh = res->next;
453 } else {
454 prevnode = *aprh;
455 while (prevnode->next != res)
456 prevnode = prevnode->next;
457
458 prevnode->next = res->next;
459 }
460 res->next = NULL;
461 kfree(res);
462 break;
463 }
464
465 return 0;
466}
467
468static int pciehprm_delete_resources(
469 struct pci_resource **aprh,
470 struct pci_resource *this
471 )
472{
473 struct pci_resource *res;
474
475 for (res = this; res; res = res->next)
476 pciehprm_delete_resource(aprh, res->base, res->length);
477
478 return 0;
479}
480
481static int pciehprm_add_resource(
482 struct pci_resource **aprh,
483 ulong base,
484 ulong size)
485{
486 struct pci_resource *res;
487
488 for (res = *aprh; res; res = res->next) {
489 if ((res->base + res->length) == base) {
490 res->length += size;
491 size = 0L;
492 break;
493 } 167 }
494 if (res->next == *aprh)
495 break;
496 } 168 }
497
498 if (size) {
499 res = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
500 if (!res) {
501 err ("acpi_pciehprm: alloc for res fail\n");
502 return -ENOMEM;
503 }
504 memset(res, 0, sizeof (struct pci_resource));
505
506 res->base = base;
507 res->length = size;
508 res->next = *aprh;
509 *aprh = res;
510 }
511
512 return 0; 169 return 0;
513} 170}
514 171
515static int pciehprm_add_resources( 172int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev)
516 struct pci_resource **aprh,
517 struct pci_resource *this
518 )
519{
520 struct pci_resource *res;
521 int rc = 0;
522
523 for (res = this; res && !rc; res = res->next)
524 rc = pciehprm_add_resource(aprh, res->base, res->length);
525
526 return rc;
527}
528
529static void acpi_parse_io (
530 struct acpi_bridge *ab,
531 union acpi_resource_data *data
532 )
533{ 173{
534 struct acpi_resource_io *dataio; 174 acpi_status status;
535 dataio = (struct acpi_resource_io *) data; 175 acpi_handle chandle, handle = DEVICE_ACPI_HANDLE(&(dev->dev));
536 176 struct pci_dev *pdev = dev;
537 dbg("Io Resource\n"); 177 u8 *path_name;
538 dbg(" %d bit decode\n", ACPI_DECODE_16 == dataio->io_decode ? 16:10); 178 /*
539 dbg(" Range minimum base: %08X\n", dataio->min_base_address); 179 * Per PCI firmware specification, we should run the ACPI _OSC
540 dbg(" Range maximum base: %08X\n", dataio->max_base_address); 180 * method to get control of hotplug hardware before using it.
541 dbg(" Alignment: %08X\n", dataio->alignment); 181 * If an _OSC is missing, we look for an OSHP to do the same thing.
542 dbg(" Range Length: %08X\n", dataio->range_length); 182 * To handle different BIOS behavior, we look for _OSC and OSHP
543} 183 * within the scope of the hotplug controller and its parents, upto
544 184 * the host bridge under which this controller exists.
545static void acpi_parse_fixed_io (
546 struct acpi_bridge *ab,
547 union acpi_resource_data *data
548 )
549{
550 struct acpi_resource_fixed_io *datafio;
551 datafio = (struct acpi_resource_fixed_io *) data;
552
553 dbg("Fixed Io Resource\n");
554 dbg(" Range base address: %08X", datafio->base_address);
555 dbg(" Range length: %08X", datafio->range_length);
556}
557
558static void acpi_parse_address16_32 (
559 struct acpi_bridge *ab,
560 union acpi_resource_data *data,
561 acpi_resource_type id
562 )
563{
564 /*
565 * acpi_resource_address16 == acpi_resource_address32
566 * acpi_resource_address16 *data16 = (acpi_resource_address16 *) data;
567 */ 185 */
568 struct acpi_resource_address32 *data32 = (struct acpi_resource_address32 *) data; 186 while (!handle) {
569 struct pci_resource **aprh, **tprh; 187 /*
570 188 * This hotplug controller was not listed in the ACPI name
571 if (id == ACPI_RSTYPE_ADDRESS16) 189 * space at all. Try to get acpi handle of parent pci bus.
572 dbg("acpi_pciehprm:16-Bit Address Space Resource\n"); 190 */
573 else 191 if (!pdev || !pdev->bus->parent)
574 dbg("acpi_pciehprm:32-Bit Address Space Resource\n");
575
576 switch (data32->resource_type) {
577 case ACPI_MEMORY_RANGE:
578 dbg(" Resource Type: Memory Range\n");
579 aprh = &ab->mem_head;
580 tprh = &ab->tmem_head;
581
582 switch (data32->attribute.memory.cache_attribute) {
583 case ACPI_NON_CACHEABLE_MEMORY:
584 dbg(" Type Specific: Noncacheable memory\n");
585 break;
586 case ACPI_CACHABLE_MEMORY:
587 dbg(" Type Specific: Cacheable memory\n");
588 break;
589 case ACPI_WRITE_COMBINING_MEMORY:
590 dbg(" Type Specific: Write-combining memory\n");
591 break;
592 case ACPI_PREFETCHABLE_MEMORY:
593 aprh = &ab->p_mem_head;
594 dbg(" Type Specific: Prefetchable memory\n");
595 break;
596 default:
597 dbg(" Type Specific: Invalid cache attribute\n");
598 break; 192 break;
599 } 193 dbg("Could not find %s in acpi namespace, trying parent\n",
600 194 pci_name(pdev));
601 dbg(" Type Specific: Read%s\n", ACPI_READ_WRITE_MEMORY == data32->attribute.memory.read_write_attribute ? "/Write":" Only"); 195 if (!pdev->bus->parent->self)
602 break; 196 /* Parent must be a host bridge */
603 197 handle = acpi_get_pci_rootbridge_handle(
604 case ACPI_IO_RANGE: 198 pci_domain_nr(pdev->bus->parent),
605 dbg(" Resource Type: I/O Range\n"); 199 pdev->bus->parent->number);
606 aprh = &ab->io_head; 200 else
607 tprh = &ab->tio_head; 201 handle = DEVICE_ACPI_HANDLE(
608 202 &(pdev->bus->parent->self->dev));
609 switch (data32->attribute.io.range_attribute) { 203 pdev = pdev->bus->parent->self;
610 case ACPI_NON_ISA_ONLY_RANGES: 204 }
611 dbg(" Type Specific: Non-ISA Io Addresses\n"); 205
612 break; 206 while (handle) {
613 case ACPI_ISA_ONLY_RANGES: 207 path_name = acpi_path_name(handle);
614 dbg(" Type Specific: ISA Io Addresses\n"); 208 dbg("Trying to get hotplug control for %s \n", path_name);
615 break; 209 status = pci_osc_control_set(handle,
616 case ACPI_ENTIRE_RANGE: 210 OSC_PCI_EXPRESS_NATIVE_HP_CONTROL);
617 dbg(" Type Specific: ISA and non-ISA Io Addresses\n"); 211 if (status == AE_NOT_FOUND)
618 break; 212 status = acpi_run_oshp(handle);
619 default: 213 if (ACPI_SUCCESS(status)) {
620 dbg(" Type Specific: Invalid range attribute\n"); 214 dbg("Gained control for hotplug HW for pci %s (%s)\n",
215 pci_name(dev), path_name);
216 return 0;
217 }
218 if (is_root_bridge(handle))
621 break; 219 break;
622 } 220 chandle = handle;
623 break; 221 status = acpi_get_parent(chandle, &handle);
624
625 case ACPI_BUS_NUMBER_RANGE:
626 dbg(" Resource Type: Bus Number Range(fixed)\n");
627 /* fixup to be compatible with the rest of php driver */
628 data32->min_address_range++;
629 data32->address_length--;
630 aprh = &ab->bus_head;
631 tprh = &ab->tbus_head;
632 break;
633 default:
634 dbg(" Resource Type: Invalid resource type. Exiting.\n");
635 return;
636 }
637
638 dbg(" Resource %s\n", ACPI_CONSUMER == data32->producer_consumer ? "Consumer":"Producer");
639 dbg(" %s decode\n", ACPI_SUB_DECODE == data32->decode ? "Subtractive":"Positive");
640 dbg(" Min address is %s fixed\n", ACPI_ADDRESS_FIXED == data32->min_address_fixed ? "":"not");
641 dbg(" Max address is %s fixed\n", ACPI_ADDRESS_FIXED == data32->max_address_fixed ? "":"not");
642 dbg(" Granularity: %08X\n", data32->granularity);
643 dbg(" Address range min: %08X\n", data32->min_address_range);
644 dbg(" Address range max: %08X\n", data32->max_address_range);
645 dbg(" Address translation offset: %08X\n", data32->address_translation_offset);
646 dbg(" Address Length: %08X\n", data32->address_length);
647
648 if (0xFF != data32->resource_source.index) {
649 dbg(" Resource Source Index: %X\n", data32->resource_source.index);
650 /* dbg(" Resource Source: %s\n", data32->resource_source.string_ptr); */
651 }
652
653 pciehprm_add_resource(aprh, data32->min_address_range, data32->address_length);
654}
655
656static acpi_status acpi_parse_crs(
657 struct acpi_bridge *ab,
658 struct acpi_resource *crsbuf
659 )
660{
661 acpi_status status = AE_OK;
662 struct acpi_resource *resource = crsbuf;
663 u8 count = 0;
664 u8 done = 0;
665
666 while (!done) {
667 dbg("acpi_pciehprm: PCI bus 0x%x Resource structure %x.\n", ab->bus, count++);
668 switch (resource->id) {
669 case ACPI_RSTYPE_IRQ:
670 dbg("Irq -------- Resource\n");
671 break;
672 case ACPI_RSTYPE_DMA:
673 dbg("DMA -------- Resource\n");
674 break;
675 case ACPI_RSTYPE_START_DPF:
676 dbg("Start DPF -------- Resource\n");
677 break;
678 case ACPI_RSTYPE_END_DPF:
679 dbg("End DPF -------- Resource\n");
680 break;
681 case ACPI_RSTYPE_IO:
682 acpi_parse_io (ab, &resource->data);
683 break;
684 case ACPI_RSTYPE_FIXED_IO:
685 acpi_parse_fixed_io (ab, &resource->data);
686 break;
687 case ACPI_RSTYPE_VENDOR:
688 dbg("Vendor -------- Resource\n");
689 break;
690 case ACPI_RSTYPE_END_TAG:
691 dbg("End_tag -------- Resource\n");
692 done = 1;
693 break;
694 case ACPI_RSTYPE_MEM24:
695 dbg("Mem24 -------- Resource\n");
696 break;
697 case ACPI_RSTYPE_MEM32:
698 dbg("Mem32 -------- Resource\n");
699 break;
700 case ACPI_RSTYPE_FIXED_MEM32:
701 dbg("Fixed Mem32 -------- Resource\n");
702 break;
703 case ACPI_RSTYPE_ADDRESS16:
704 acpi_parse_address16_32(ab, &resource->data, ACPI_RSTYPE_ADDRESS16);
705 break;
706 case ACPI_RSTYPE_ADDRESS32:
707 acpi_parse_address16_32(ab, &resource->data, ACPI_RSTYPE_ADDRESS32);
708 break;
709 case ACPI_RSTYPE_ADDRESS64:
710 info("Address64 -------- Resource unparsed\n");
711 break;
712 case ACPI_RSTYPE_EXT_IRQ:
713 dbg("Ext Irq -------- Resource\n");
714 break;
715 default:
716 dbg("Invalid -------- resource type 0x%x\n", resource->id);
717 break;
718 }
719
720 resource = (struct acpi_resource *) ((char *)resource + resource->length);
721 }
722
723 return status;
724}
725
726static acpi_status acpi_get_crs( struct acpi_bridge *ab)
727{
728 acpi_status status;
729 struct acpi_resource *crsbuf;
730
731 status = acpi_evaluate_crs(ab->handle, &crsbuf);
732 if (ACPI_SUCCESS(status)) {
733 status = acpi_parse_crs(ab, crsbuf);
734 kfree(crsbuf);
735
736 pciehp_resource_sort_and_combine(&ab->bus_head);
737 pciehp_resource_sort_and_combine(&ab->io_head);
738 pciehp_resource_sort_and_combine(&ab->mem_head);
739 pciehp_resource_sort_and_combine(&ab->p_mem_head);
740
741 pciehprm_add_resources (&ab->tbus_head, ab->bus_head);
742 pciehprm_add_resources (&ab->tio_head, ab->io_head);
743 pciehprm_add_resources (&ab->tmem_head, ab->mem_head);
744 pciehprm_add_resources (&ab->tp_mem_head, ab->p_mem_head);
745 }
746
747 return status;
748}
749
750/* find acpi_bridge downword from ab. */
751static struct acpi_bridge *
752find_acpi_bridge_by_bus(
753 struct acpi_bridge *ab,
754 int seg,
755 int bus /* pdev->subordinate->number */
756 )
757{
758 struct acpi_bridge *lab = NULL;
759
760 if (!ab)
761 return NULL;
762
763 if ((ab->bus == bus) && (ab->seg == seg))
764 return ab;
765
766 if (ab->child)
767 lab = find_acpi_bridge_by_bus(ab->child, seg, bus);
768
769 if (!lab)
770 if (ab->next)
771 lab = find_acpi_bridge_by_bus(ab->next, seg, bus);
772
773 return lab;
774}
775
776/*
777 * Build a device tree of ACPI PCI Bridges
778 */
779static void pciehprm_acpi_register_a_bridge (
780 struct acpi_bridge **head,
781 struct acpi_bridge *pab, /* parent bridge to which child bridge is added */
782 struct acpi_bridge *cab /* child bridge to add */
783 )
784{
785 struct acpi_bridge *lpab;
786 struct acpi_bridge *lcab;
787
788 lpab = find_acpi_bridge_by_bus(*head, pab->seg, pab->bus);
789 if (!lpab) {
790 if (!(pab->type & BRIDGE_TYPE_HOST))
791 warn("PCI parent bridge s:b(%x:%x) not in list.\n", pab->seg, pab->bus);
792 pab->next = *head;
793 *head = pab;
794 lpab = pab;
795 }
796
797 if ((cab->type & BRIDGE_TYPE_HOST) && (pab == cab))
798 return;
799
800 lcab = find_acpi_bridge_by_bus(*head, cab->seg, cab->bus);
801 if (lcab) {
802 if ((pab->bus != lcab->parent->bus) || (lcab->bus != cab->bus))
803 err("PCI child bridge s:b(%x:%x) in list with diff parent.\n", cab->seg, cab->bus);
804 return;
805 } else
806 lcab = cab;
807
808 lcab->parent = lpab;
809 lcab->next = lpab->child;
810 lpab->child = lcab;
811}
812
813static acpi_status pciehprm_acpi_build_php_slots_callback(
814 acpi_handle handle,
815 u32 Level,
816 void *context,
817 void **retval
818 )
819{
820 ulong bus_num;
821 ulong seg_num;
822 ulong sun, adr;
823 ulong padr = 0;
824 acpi_handle phandle = NULL;
825 struct acpi_bridge *pab = (struct acpi_bridge *)context;
826 struct acpi_bridge *lab;
827 acpi_status status;
828 u8 *path_name = acpi_path_name(handle);
829
830 /* get _SUN */
831 status = acpi_evaluate_integer(handle, METHOD_NAME__SUN, NULL, &sun);
832 switch(status) {
833 case AE_NOT_FOUND:
834 return AE_OK;
835 default:
836 if (ACPI_FAILURE(status)) {
837 err("acpi_pciehprm:%s _SUN fail=0x%x\n", path_name, status);
838 return status;
839 }
840 }
841
842 /* get _ADR. _ADR must exist if _SUN exists */
843 status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
844 if (ACPI_FAILURE(status)) {
845 err("acpi_pciehprm:%s _ADR fail=0x%x\n", path_name, status);
846 return status;
847 }
848
849 dbg("acpi_pciehprm:%s sun=0x%08x adr=0x%08x\n", path_name, (u32)sun, (u32)adr);
850
851 status = acpi_get_parent(handle, &phandle);
852 if (ACPI_FAILURE(status)) {
853 err("acpi_pciehprm:%s get_parent fail=0x%x\n", path_name, status);
854 return (status);
855 }
856
857 bus_num = pab->bus;
858 seg_num = pab->seg;
859
860 if (pab->bus == bus_num) {
861 lab = pab;
862 } else {
863 dbg("WARN: pab is not parent\n");
864 lab = find_acpi_bridge_by_bus(pab, seg_num, bus_num);
865 if (!lab) {
866 dbg("acpi_pciehprm: alloc new P2P bridge(%x) for sun(%08x)\n", (u32)bus_num, (u32)sun);
867 lab = (struct acpi_bridge *)kmalloc(sizeof(struct acpi_bridge), GFP_KERNEL);
868 if (!lab) {
869 err("acpi_pciehprm: alloc for ab fail\n");
870 return AE_NO_MEMORY;
871 }
872 memset(lab, 0, sizeof(struct acpi_bridge));
873
874 lab->handle = phandle;
875 lab->pbus = pab->bus;
876 lab->pdevice = (int)(padr >> 16) & 0xffff;
877 lab->pfunction = (int)(padr & 0xffff);
878 lab->bus = (int)bus_num;
879 lab->scanned = 0;
880 lab->type = BRIDGE_TYPE_P2P;
881
882 pciehprm_acpi_register_a_bridge (&acpi_bridges_head, pab, lab);
883 } else
884 dbg("acpi_pciehprm: found P2P bridge(%x) for sun(%08x)\n", (u32)bus_num, (u32)sun);
885 }
886
887 acpi_add_slot_to_php_slots(lab, (int)bus_num, handle, (u32)adr, (u32)sun);
888
889 return (status);
890}
891
892static int pciehprm_acpi_build_php_slots(
893 struct acpi_bridge *ab,
894 u32 depth
895 )
896{
897 acpi_status status;
898 u8 *path_name = acpi_path_name(ab->handle);
899
900 /* Walk down this pci bridge to get _SUNs if any behind P2P */
901 status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
902 ab->handle,
903 depth,
904 pciehprm_acpi_build_php_slots_callback,
905 ab,
906 NULL );
907 if (ACPI_FAILURE(status)) {
908 dbg("acpi_pciehprm:%s walk for _SUN on pci bridge seg:bus(%x:%x) fail=0x%x\n", path_name, ab->seg, ab->bus, status);
909 return -1;
910 }
911
912 return 0;
913}
914
915static void build_a_bridge(
916 struct acpi_bridge *pab,
917 struct acpi_bridge *ab
918 )
919{
920 u8 *path_name = acpi_path_name(ab->handle);
921
922 pciehprm_acpi_register_a_bridge (&acpi_bridges_head, pab, ab);
923
924 switch (ab->type) {
925 case BRIDGE_TYPE_HOST:
926 dbg("acpi_pciehprm: Registered PCI HOST Bridge(%02x) on s:b:d:f(%02x:%02x:%02x:%02x) [%s]\n",
927 ab->bus, ab->seg, ab->pbus, ab->pdevice, ab->pfunction, path_name);
928 break;
929 case BRIDGE_TYPE_P2P:
930 dbg("acpi_pciehprm: Registered PCI P2P Bridge(%02x-%02x) on s:b:d:f(%02x:%02x:%02x:%02x) [%s]\n",
931 ab->pbus, ab->bus, ab->seg, ab->pbus, ab->pdevice, ab->pfunction, path_name);
932 break;
933 };
934
935 /* build any immediate PHP slots under this pci bridge */
936 pciehprm_acpi_build_php_slots(ab, 1);
937}
938
939static struct acpi_bridge * add_p2p_bridge(
940 acpi_handle handle,
941 struct acpi_bridge *pab, /* parent */
942 ulong adr
943 )
944{
945 struct acpi_bridge *ab;
946 struct pci_dev *pdev;
947 ulong devnum, funcnum;
948 u8 *path_name = acpi_path_name(handle);
949
950 ab = (struct acpi_bridge *) kmalloc (sizeof(struct acpi_bridge), GFP_KERNEL);
951 if (!ab) {
952 err("acpi_pciehprm: alloc for ab fail\n");
953 return NULL;
954 }
955 memset(ab, 0, sizeof(struct acpi_bridge));
956
957 devnum = (adr >> 16) & 0xffff;
958 funcnum = adr & 0xffff;
959
960 pdev = pci_find_slot(pab->bus, PCI_DEVFN(devnum, funcnum));
961 if (!pdev || !pdev->subordinate) {
962 err("acpi_pciehprm:%s is not a P2P Bridge\n", path_name);
963 kfree(ab);
964 return NULL;
965 }
966
967 ab->handle = handle;
968 ab->seg = pab->seg;
969 ab->pbus = pab->bus; /* or pdev->bus->number */
970 ab->pdevice = devnum; /* or PCI_SLOT(pdev->devfn) */
971 ab->pfunction = funcnum; /* or PCI_FUNC(pdev->devfn) */
972 ab->bus = pdev->subordinate->number;
973 ab->scanned = 0;
974 ab->type = BRIDGE_TYPE_P2P;
975
976 dbg("acpi_pciehprm: P2P(%x-%x) on pci=b:d:f(%x:%x:%x) acpi=b:d:f(%x:%x:%x) [%s]\n",
977 pab->bus, ab->bus, pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
978 pab->bus, (u32)devnum, (u32)funcnum, path_name);
979
980 build_a_bridge(pab, ab);
981
982 return ab;
983}
984
985static acpi_status scan_p2p_bridge(
986 acpi_handle handle,
987 u32 Level,
988 void *context,
989 void **retval
990 )
991{
992 struct acpi_bridge *pab = (struct acpi_bridge *)context;
993 struct acpi_bridge *ab;
994 acpi_status status;
995 ulong adr = 0;
996 u8 *path_name = acpi_path_name(handle);
997 ulong devnum, funcnum;
998 struct pci_dev *pdev;
999
1000 /* get device, function */
1001 status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
1002 if (ACPI_FAILURE(status)) {
1003 if (status != AE_NOT_FOUND)
1004 err("acpi_pciehprm:%s _ADR fail=0x%x\n", path_name, status);
1005 return AE_OK;
1006 }
1007
1008 devnum = (adr >> 16) & 0xffff;
1009 funcnum = adr & 0xffff;
1010
1011 pdev = pci_find_slot(pab->bus, PCI_DEVFN(devnum, funcnum));
1012 if (!pdev)
1013 return AE_OK;
1014 if (!pdev->subordinate)
1015 return AE_OK;
1016
1017 ab = add_p2p_bridge(handle, pab, adr);
1018 if (ab) {
1019 status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
1020 handle,
1021 (u32)1,
1022 scan_p2p_bridge,
1023 ab,
1024 NULL);
1025 if (ACPI_FAILURE(status)) 222 if (ACPI_FAILURE(status))
1026 dbg("acpi_pciehprm:%s find_p2p fail=0x%x\n", path_name, status); 223 break;
1027 }
1028
1029 return AE_OK;
1030}
1031
1032static struct acpi_bridge * add_host_bridge(
1033 acpi_handle handle,
1034 ulong segnum,
1035 ulong busnum
1036 )
1037{
1038 ulong adr = 0;
1039 acpi_status status;
1040 struct acpi_bridge *ab;
1041 u8 *path_name = acpi_path_name(handle);
1042
1043 /* get device, function: host br adr is always 0000 though. */
1044 status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
1045 if (ACPI_FAILURE(status)) {
1046 err("acpi_pciehprm:%s _ADR fail=0x%x\n", path_name, status);
1047 return NULL;
1048 }
1049 dbg("acpi_pciehprm: ROOT PCI seg(0x%x)bus(0x%x)dev(0x%x)func(0x%x) [%s]\n", (u32)segnum,
1050 (u32)busnum, (u32)(adr >> 16) & 0xffff, (u32)adr & 0xffff, path_name);
1051
1052 ab = (struct acpi_bridge *) kmalloc (sizeof(struct acpi_bridge), GFP_KERNEL);
1053 if (!ab) {
1054 err("acpi_pciehprm: alloc for ab fail\n");
1055 return NULL;
1056 }
1057 memset(ab, 0, sizeof(struct acpi_bridge));
1058
1059 ab->handle = handle;
1060 ab->seg = (int)segnum;
1061 ab->bus = ab->pbus = (int)busnum;
1062 ab->pdevice = (int)(adr >> 16) & 0xffff;
1063 ab->pfunction = (int)(adr & 0xffff);
1064 ab->scanned = 0;
1065 ab->type = BRIDGE_TYPE_HOST;
1066
1067 /* get root pci bridge's current resources */
1068 status = acpi_get_crs(ab);
1069 if (ACPI_FAILURE(status)) {
1070 err("acpi_pciehprm:%s evaluate _CRS fail=0x%x\n", path_name, status);
1071 kfree(ab);
1072 return NULL;
1073 }
1074
1075 status = pci_osc_control_set (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL);
1076 if (ACPI_FAILURE(status)) {
1077 err("%s: status %x\n", __FUNCTION__, status);
1078 osc_run_status = (status == AE_NOT_FOUND) ? OSC_NOT_EXIST : OSC_RUN_FAILED;
1079 } else {
1080 osc_run_status = NC_RUN_SUCCESS;
1081 }
1082 dbg("%s: osc_run_status %x\n", __FUNCTION__, osc_run_status);
1083
1084 build_a_bridge(ab, ab);
1085
1086 return ab;
1087}
1088
1089static acpi_status acpi_scan_from_root_pci_callback (
1090 acpi_handle handle,
1091 u32 Level,
1092 void *context,
1093 void **retval
1094 )
1095{
1096 ulong segnum = 0;
1097 ulong busnum = 0;
1098 acpi_status status;
1099 struct acpi_bridge *ab;
1100 u8 *path_name = acpi_path_name(handle);
1101
1102 /* get bus number of this pci root bridge */
1103 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL, &segnum);
1104 if (ACPI_FAILURE(status)) {
1105 if (status != AE_NOT_FOUND) {
1106 err("acpi_pciehprm:%s evaluate _SEG fail=0x%x\n", path_name, status);
1107 return status;
1108 }
1109 segnum = 0;
1110 }
1111
1112 /* get bus number of this pci root bridge */
1113 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN, NULL, &busnum);
1114 if (ACPI_FAILURE(status)) {
1115 err("acpi_pciehprm:%s evaluate _BBN fail=0x%x\n", path_name, status);
1116 return (status);
1117 }
1118
1119 ab = add_host_bridge(handle, segnum, busnum);
1120 if (ab) {
1121 status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
1122 handle,
1123 1,
1124 scan_p2p_bridge,
1125 ab,
1126 NULL);
1127 if (ACPI_FAILURE(status))
1128 dbg("acpi_pciehprm:%s find_p2p fail=0x%x\n", path_name, status);
1129 } 224 }
1130 225
1131 return AE_OK; 226 err("Cannot get control of hotplug hardware for pci %s\n",
227 pci_name(dev));
228 return -1;
1132} 229}
1133 230
1134static int pciehprm_acpi_scan_pci (void) 231void pciehp_get_hp_params_from_firmware(struct pci_dev *dev,
232 struct hotplug_params *hpp)
1135{ 233{
1136 acpi_status status; 234 acpi_status status = AE_NOT_FOUND;
235 struct pci_dev *pdev = dev;
1137 236
1138 /* 237 /*
1139 * TBD: traverse LDM device tree with the help of 238 * _HPP settings apply to all child buses, until another _HPP is
1140 * unified ACPI augmented for php device population. 239 * encountered. If we don't find an _HPP for the input pci dev,
240 * look for it in the parent device scope since that would apply to
241 * this pci dev. If we don't find any _HPP, use hardcoded defaults
1141 */ 242 */
1142 status = acpi_get_devices ( PCI_ROOT_HID_STRING, 243 while (pdev && (ACPI_FAILURE(status))) {
1143 acpi_scan_from_root_pci_callback, 244 acpi_handle handle = DEVICE_ACPI_HANDLE(&(pdev->dev));
1144 NULL, 245 if (!handle)
1145 NULL ); 246 break;
1146 if (ACPI_FAILURE(status)) { 247 status = acpi_run_hpp(handle, hpp);
1147 err("acpi_pciehprm:get_device PCI ROOT HID fail=0x%x\n", status); 248 if (!(pdev->bus->parent))
1148 return -1; 249 break;
1149 } 250 /* Check if a parent object supports _HPP */
1150 251 pdev = pdev->bus->parent->self;
1151 return 0;
1152}
1153
1154int pciehprm_init(enum php_ctlr_type ctlr_type)
1155{
1156 int rc;
1157
1158 if (ctlr_type != PCI)
1159 return -ENODEV;
1160
1161 dbg("pciehprm ACPI init <enter>\n");
1162 acpi_bridges_head = NULL;
1163
1164 /* construct PCI bus:device tree of acpi_handles */
1165 rc = pciehprm_acpi_scan_pci();
1166 if (rc)
1167 return rc;
1168
1169 if ((oshp_run_status != NC_RUN_SUCCESS) && (osc_run_status != NC_RUN_SUCCESS)) {
1170 err("Fails to gain control of native hot-plug\n");
1171 rc = -ENODEV;
1172 }
1173
1174 dbg("pciehprm ACPI init %s\n", (rc)?"fail":"success");
1175 return rc;
1176}
1177
1178static void free_a_slot(struct acpi_php_slot *aps)
1179{
1180 dbg(" free a php func of slot(0x%02x) on PCI b:d:f=0x%02x:%02x:%02x\n", aps->sun, aps->bus, aps->dev, aps->fun);
1181
1182 free_pci_resource (aps->io_head);
1183 free_pci_resource (aps->bus_head);
1184 free_pci_resource (aps->mem_head);
1185 free_pci_resource (aps->p_mem_head);
1186
1187 kfree(aps);
1188}
1189
1190static void free_a_bridge( struct acpi_bridge *ab)
1191{
1192 struct acpi_php_slot *aps, *next;
1193
1194 switch (ab->type) {
1195 case BRIDGE_TYPE_HOST:
1196 dbg("Free ACPI PCI HOST Bridge(%x) [%s] on s:b:d:f(%x:%x:%x:%x)\n",
1197 ab->bus, acpi_path_name(ab->handle), ab->seg, ab->pbus, ab->pdevice, ab->pfunction);
1198 break;
1199 case BRIDGE_TYPE_P2P:
1200 dbg("Free ACPI PCI P2P Bridge(%x-%x) [%s] on s:b:d:f(%x:%x:%x:%x)\n",
1201 ab->pbus, ab->bus, acpi_path_name(ab->handle), ab->seg, ab->pbus, ab->pdevice, ab->pfunction);
1202 break;
1203 };
1204
1205 /* free slots first */
1206 for (aps = ab->slots; aps; aps = next) {
1207 next = aps->next;
1208 free_a_slot(aps);
1209 }
1210
1211 free_pci_resource (ab->io_head);
1212 free_pci_resource (ab->tio_head);
1213 free_pci_resource (ab->bus_head);
1214 free_pci_resource (ab->tbus_head);
1215 free_pci_resource (ab->mem_head);
1216 free_pci_resource (ab->tmem_head);
1217 free_pci_resource (ab->p_mem_head);
1218 free_pci_resource (ab->tp_mem_head);
1219
1220 kfree(ab);
1221}
1222
1223static void pciehprm_free_bridges ( struct acpi_bridge *ab)
1224{
1225 if (!ab)
1226 return;
1227
1228 if (ab->child)
1229 pciehprm_free_bridges (ab->child);
1230
1231 if (ab->next)
1232 pciehprm_free_bridges (ab->next);
1233
1234 free_a_bridge(ab);
1235}
1236
1237void pciehprm_cleanup(void)
1238{
1239 pciehprm_free_bridges (acpi_bridges_head);
1240}
1241
1242static int get_number_of_slots (
1243 struct acpi_bridge *ab,
1244 int selfonly
1245 )
1246{
1247 struct acpi_php_slot *aps;
1248 int prev_slot = -1;
1249 int slot_num = 0;
1250
1251 for ( aps = ab->slots; aps; aps = aps->next)
1252 if (aps->dev != prev_slot) {
1253 prev_slot = aps->dev;
1254 slot_num++;
1255 }
1256
1257 if (ab->child)
1258 slot_num += get_number_of_slots (ab->child, 0);
1259
1260 if (selfonly)
1261 return slot_num;
1262
1263 if (ab->next)
1264 slot_num += get_number_of_slots (ab->next, 0);
1265
1266 return slot_num;
1267}
1268
1269static int print_acpi_resources (struct acpi_bridge *ab)
1270{
1271 struct acpi_php_slot *aps;
1272 int i;
1273
1274 switch (ab->type) {
1275 case BRIDGE_TYPE_HOST:
1276 dbg("PCI HOST Bridge (%x) [%s]\n", ab->bus, acpi_path_name(ab->handle));
1277 break;
1278 case BRIDGE_TYPE_P2P:
1279 dbg("PCI P2P Bridge (%x-%x) [%s]\n", ab->pbus, ab->bus, acpi_path_name(ab->handle));
1280 break;
1281 };
1282
1283 print_pci_resources (ab);
1284
1285 for ( i = -1, aps = ab->slots; aps; aps = aps->next) {
1286 if (aps->dev == i)
1287 continue;
1288 dbg(" Slot sun(%x) s:b:d:f(%02x:%02x:%02x:%02x)\n", aps->sun, aps->seg, aps->bus, aps->dev, aps->fun);
1289 print_slot_resources(aps);
1290 i = aps->dev;
1291 }
1292
1293 if (ab->child)
1294 print_acpi_resources (ab->child);
1295
1296 if (ab->next)
1297 print_acpi_resources (ab->next);
1298
1299 return 0;
1300}
1301
1302int pciehprm_print_pirt(void)
1303{
1304 dbg("PCIEHPRM ACPI Slots\n");
1305 if (acpi_bridges_head)
1306 print_acpi_resources (acpi_bridges_head);
1307
1308 return 0;
1309}
1310
1311static struct acpi_php_slot * get_acpi_slot (
1312 struct acpi_bridge *ab,
1313 u32 sun
1314 )
1315{
1316 struct acpi_php_slot *aps = NULL;
1317
1318 for ( aps = ab->slots; aps; aps = aps->next)
1319 if (aps->sun == sun)
1320 return aps;
1321
1322 if (!aps && ab->child) {
1323 aps = (struct acpi_php_slot *)get_acpi_slot (ab->child, sun);
1324 if (aps)
1325 return aps;
1326 }
1327
1328 if (!aps && ab->next) {
1329 aps = (struct acpi_php_slot *)get_acpi_slot (ab->next, sun);
1330 if (aps)
1331 return aps;
1332 }
1333
1334 return aps;
1335
1336}
1337
1338#if 0
1339void * pciehprm_get_slot(struct slot *slot)
1340{
1341 struct acpi_bridge *ab = acpi_bridges_head;
1342 struct acpi_php_slot *aps = get_acpi_slot (ab, slot->number);
1343
1344 aps->slot = slot;
1345
1346 dbg("Got acpi slot sun(%x): s:b:d:f(%x:%x:%x:%x)\n", aps->sun, aps->seg, aps->bus, aps->dev, aps->fun);
1347
1348 return (void *)aps;
1349}
1350#endif
1351
1352static void pciehprm_dump_func_res( struct pci_func *fun)
1353{
1354 struct pci_func *func = fun;
1355
1356 if (func->bus_head) {
1357 dbg(": BUS Resources:\n");
1358 print_pci_resource (func->bus_head);
1359 }
1360 if (func->io_head) {
1361 dbg(": IO Resources:\n");
1362 print_pci_resource (func->io_head);
1363 }
1364 if (func->mem_head) {
1365 dbg(": MEM Resources:\n");
1366 print_pci_resource (func->mem_head);
1367 }
1368 if (func->p_mem_head) {
1369 dbg(": PMEM Resources:\n");
1370 print_pci_resource (func->p_mem_head);
1371 }
1372}
1373
1374static void pciehprm_dump_ctrl_res( struct controller *ctlr)
1375{
1376 struct controller *ctrl = ctlr;
1377
1378 if (ctrl->bus_head) {
1379 dbg(": BUS Resources:\n");
1380 print_pci_resource (ctrl->bus_head);
1381 }
1382 if (ctrl->io_head) {
1383 dbg(": IO Resources:\n");
1384 print_pci_resource (ctrl->io_head);
1385 }
1386 if (ctrl->mem_head) {
1387 dbg(": MEM Resources:\n");
1388 print_pci_resource (ctrl->mem_head);
1389 }
1390 if (ctrl->p_mem_head) {
1391 dbg(": PMEM Resources:\n");
1392 print_pci_resource (ctrl->p_mem_head);
1393 }
1394}
1395
1396static int pciehprm_get_used_resources (
1397 struct controller *ctrl,
1398 struct pci_func *func
1399 )
1400{
1401 return pciehp_save_used_resources (ctrl, func, !DISABLE_CARD);
1402}
1403
1404static int configure_existing_function(
1405 struct controller *ctrl,
1406 struct pci_func *func
1407 )
1408{
1409 int rc;
1410
1411 /* see how much resources the func has used. */
1412 rc = pciehprm_get_used_resources (ctrl, func);
1413
1414 if (!rc) {
1415 /* subtract the resources used by the func from ctrl resources */
1416 rc = pciehprm_delete_resources (&ctrl->bus_head, func->bus_head);
1417 rc |= pciehprm_delete_resources (&ctrl->io_head, func->io_head);
1418 rc |= pciehprm_delete_resources (&ctrl->mem_head, func->mem_head);
1419 rc |= pciehprm_delete_resources (&ctrl->p_mem_head, func->p_mem_head);
1420 if (rc)
1421 warn("aCEF: cannot del used resources\n");
1422 } else
1423 err("aCEF: cannot get used resources\n");
1424
1425 return rc;
1426}
1427
1428static int bind_pci_resources_to_slots ( struct controller *ctrl)
1429{
1430 struct pci_func *func, new_func;
1431 int busn = ctrl->slot_bus;
1432 int devn, funn;
1433 u32 vid;
1434
1435 for (devn = 0; devn < 32; devn++) {
1436 for (funn = 0; funn < 8; funn++) {
1437 /*
1438 if (devn == ctrl->device && funn == ctrl->function)
1439 continue;
1440 */
1441 /* find out if this entry is for an occupied slot */
1442 vid = 0xFFFFFFFF;
1443 pci_bus_read_config_dword(ctrl->pci_dev->subordinate, PCI_DEVFN(devn, funn), PCI_VENDOR_ID, &vid);
1444
1445 if (vid != 0xFFFFFFFF) {
1446 dbg("%s: vid = %x\n", __FUNCTION__, vid);
1447 func = pciehp_slot_find(busn, devn, funn);
1448 if (!func) {
1449 memset(&new_func, 0, sizeof(struct pci_func));
1450 new_func.bus = busn;
1451 new_func.device = devn;
1452 new_func.function = funn;
1453 new_func.is_a_board = 1;
1454 configure_existing_function(ctrl, &new_func);
1455 pciehprm_dump_func_res(&new_func);
1456 } else {
1457 configure_existing_function(ctrl, func);
1458 pciehprm_dump_func_res(func);
1459 }
1460 dbg("aCCF:existing PCI 0x%x Func ResourceDump\n", ctrl->bus);
1461 }
1462 }
1463 }
1464
1465 return 0;
1466}
1467
1468static int bind_pci_resources(
1469 struct controller *ctrl,
1470 struct acpi_bridge *ab
1471 )
1472{
1473 int status = 0;
1474
1475 if (ab->bus_head) {
1476 dbg("bapr: BUS Resources add on PCI 0x%x\n", ab->bus);
1477 status = pciehprm_add_resources (&ctrl->bus_head, ab->bus_head);
1478 if (pciehprm_delete_resources (&ab->bus_head, ctrl->bus_head))
1479 warn("bapr: cannot sub BUS Resource on PCI 0x%x\n", ab->bus);
1480 if (status) {
1481 err("bapr: BUS Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1482 return status;
1483 }
1484 } else
1485 info("bapr: No BUS Resource on PCI 0x%x.\n", ab->bus);
1486
1487 if (ab->io_head) {
1488 dbg("bapr: IO Resources add on PCI 0x%x\n", ab->bus);
1489 status = pciehprm_add_resources (&ctrl->io_head, ab->io_head);
1490 if (pciehprm_delete_resources (&ab->io_head, ctrl->io_head))
1491 warn("bapr: cannot sub IO Resource on PCI 0x%x\n", ab->bus);
1492 if (status) {
1493 err("bapr: IO Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1494 return status;
1495 }
1496 } else
1497 info("bapr: No IO Resource on PCI 0x%x.\n", ab->bus);
1498
1499 if (ab->mem_head) {
1500 dbg("bapr: MEM Resources add on PCI 0x%x\n", ab->bus);
1501 status = pciehprm_add_resources (&ctrl->mem_head, ab->mem_head);
1502 if (pciehprm_delete_resources (&ab->mem_head, ctrl->mem_head))
1503 warn("bapr: cannot sub MEM Resource on PCI 0x%x\n", ab->bus);
1504 if (status) {
1505 err("bapr: MEM Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1506 return status;
1507 }
1508 } else
1509 info("bapr: No MEM Resource on PCI 0x%x.\n", ab->bus);
1510
1511 if (ab->p_mem_head) {
1512 dbg("bapr: PMEM Resources add on PCI 0x%x\n", ab->bus);
1513 status = pciehprm_add_resources (&ctrl->p_mem_head, ab->p_mem_head);
1514 if (pciehprm_delete_resources (&ab->p_mem_head, ctrl->p_mem_head))
1515 warn("bapr: cannot sub PMEM Resource on PCI 0x%x\n", ab->bus);
1516 if (status) {
1517 err("bapr: PMEM Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1518 return status;
1519 }
1520 } else
1521 info("bapr: No PMEM Resource on PCI 0x%x.\n", ab->bus);
1522
1523 return status;
1524}
1525
1526static int no_pci_resources( struct acpi_bridge *ab)
1527{
1528 return !(ab->p_mem_head || ab->mem_head || ab->io_head || ab->bus_head);
1529}
1530
1531static int find_pci_bridge_resources (
1532 struct controller *ctrl,
1533 struct acpi_bridge *ab
1534 )
1535{
1536 int rc = 0;
1537 struct pci_func func;
1538
1539 memset(&func, 0, sizeof(struct pci_func));
1540
1541 func.bus = ab->pbus;
1542 func.device = ab->pdevice;
1543 func.function = ab->pfunction;
1544 func.is_a_board = 1;
1545
1546 /* Get used resources for this PCI bridge */
1547 rc = pciehp_save_used_resources (ctrl, &func, !DISABLE_CARD);
1548
1549 ab->io_head = func.io_head;
1550 ab->mem_head = func.mem_head;
1551 ab->p_mem_head = func.p_mem_head;
1552 ab->bus_head = func.bus_head;
1553 if (ab->bus_head)
1554 pciehprm_delete_resource(&ab->bus_head, ctrl->pci_dev->subordinate->number, 1);
1555
1556 return rc;
1557}
1558
1559static int get_pci_resources_from_bridge(
1560 struct controller *ctrl,
1561 struct acpi_bridge *ab
1562 )
1563{
1564 int rc = 0;
1565
1566 dbg("grfb: Get Resources for PCI 0x%x from actual PCI bridge 0x%x.\n", ctrl->bus, ab->bus);
1567
1568 rc = find_pci_bridge_resources (ctrl, ab);
1569
1570 pciehp_resource_sort_and_combine(&ab->bus_head);
1571 pciehp_resource_sort_and_combine(&ab->io_head);
1572 pciehp_resource_sort_and_combine(&ab->mem_head);
1573 pciehp_resource_sort_and_combine(&ab->p_mem_head);
1574
1575 pciehprm_add_resources (&ab->tbus_head, ab->bus_head);
1576 pciehprm_add_resources (&ab->tio_head, ab->io_head);
1577 pciehprm_add_resources (&ab->tmem_head, ab->mem_head);
1578 pciehprm_add_resources (&ab->tp_mem_head, ab->p_mem_head);
1579
1580 return rc;
1581}
1582
1583static int get_pci_resources(
1584 struct controller *ctrl,
1585 struct acpi_bridge *ab
1586 )
1587{
1588 int rc = 0;
1589
1590 if (no_pci_resources(ab)) {
1591 dbg("spbr:PCI 0x%x has no resources. Get parent resources.\n", ab->bus);
1592 rc = get_pci_resources_from_bridge(ctrl, ab);
1593 }
1594
1595 return rc;
1596}
1597
1598/*
1599 * Get resources for this ctrl.
1600 * 1. get total resources from ACPI _CRS or bridge (this ctrl)
1601 * 2. find used resources of existing adapters
1602 * 3. subtract used resources from total resources
1603 */
1604int pciehprm_find_available_resources( struct controller *ctrl)
1605{
1606 int rc = 0;
1607 struct acpi_bridge *ab;
1608
1609 ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->pci_dev->subordinate->number);
1610 if (!ab) {
1611 err("pfar:cannot locate acpi bridge of PCI 0x%x.\n", ctrl->pci_dev->subordinate->number);
1612 return -1;
1613 }
1614 if (no_pci_resources(ab)) {
1615 rc = get_pci_resources(ctrl, ab);
1616 if (rc) {
1617 err("pfar:cannot get pci resources of PCI 0x%x.\n", ctrl->pci_dev->subordinate->number);
1618 return -1;
1619 }
1620 }
1621
1622 rc = bind_pci_resources(ctrl, ab);
1623 dbg("pfar:pre-Bind PCI 0x%x Ctrl Resource Dump\n", ctrl->pci_dev->subordinate->number);
1624 pciehprm_dump_ctrl_res(ctrl);
1625
1626 bind_pci_resources_to_slots (ctrl);
1627
1628 dbg("pfar:post-Bind PCI 0x%x Ctrl Resource Dump\n", ctrl->pci_dev->subordinate->number);
1629 pciehprm_dump_ctrl_res(ctrl);
1630
1631 return rc;
1632}
1633
1634int pciehprm_set_hpp(
1635 struct controller *ctrl,
1636 struct pci_func *func,
1637 u8 card_type
1638 )
1639{
1640 struct acpi_bridge *ab;
1641 struct pci_bus lpci_bus, *pci_bus;
1642 int rc = 0;
1643 unsigned int devfn;
1644 u8 cls= 0x08; /* default cache line size */
1645 u8 lt = 0x40; /* default latency timer */
1646 u8 ep = 0;
1647 u8 es = 0;
1648
1649 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
1650 pci_bus = &lpci_bus;
1651 pci_bus->number = func->bus;
1652 devfn = PCI_DEVFN(func->device, func->function);
1653
1654 ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->bus);
1655
1656 if (ab) {
1657 if (ab->_hpp) {
1658 lt = (u8)ab->_hpp->latency_timer;
1659 cls = (u8)ab->_hpp->cache_line_size;
1660 ep = (u8)ab->_hpp->enable_perr;
1661 es = (u8)ab->_hpp->enable_serr;
1662 } else
1663 dbg("_hpp: no _hpp for B/D/F=%#x/%#x/%#x. use default value\n", func->bus, func->device, func->function);
1664 } else
1665 dbg("_hpp: no acpi bridge for B/D/F = %#x/%#x/%#x. use default value\n", func->bus, func->device, func->function);
1666
1667
1668 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
1669 /* set subordinate Latency Timer */
1670 rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, lt);
1671 } 252 }
1672
1673 /* set base Latency Timer */
1674 rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, lt);
1675 dbg(" set latency timer =0x%02x: %x\n", lt, rc);
1676
1677 rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, cls);
1678 dbg(" set cache_line_size=0x%02x: %x\n", cls, rc);
1679
1680 return rc;
1681} 253}
1682 254
1683void pciehprm_enable_card(
1684 struct controller *ctrl,
1685 struct pci_func *func,
1686 u8 card_type)
1687{
1688 u16 command, cmd, bcommand, bcmd;
1689 struct pci_bus lpci_bus, *pci_bus;
1690 struct acpi_bridge *ab;
1691 unsigned int devfn;
1692 int rc;
1693
1694 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
1695 pci_bus = &lpci_bus;
1696 pci_bus->number = func->bus;
1697 devfn = PCI_DEVFN(func->device, func->function);
1698
1699 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &cmd);
1700
1701 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
1702 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcmd);
1703 }
1704
1705 command = cmd | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
1706 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
1707 bcommand = bcmd | PCI_BRIDGE_CTL_NO_ISA;
1708
1709 ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->bus);
1710 if (ab) {
1711 if (ab->_hpp) {
1712 if (ab->_hpp->enable_perr) {
1713 command |= PCI_COMMAND_PARITY;
1714 bcommand |= PCI_BRIDGE_CTL_PARITY;
1715 } else {
1716 command &= ~PCI_COMMAND_PARITY;
1717 bcommand &= ~PCI_BRIDGE_CTL_PARITY;
1718 }
1719 if (ab->_hpp->enable_serr) {
1720 command |= PCI_COMMAND_SERR;
1721 bcommand |= PCI_BRIDGE_CTL_SERR;
1722 } else {
1723 command &= ~PCI_COMMAND_SERR;
1724 bcommand &= ~PCI_BRIDGE_CTL_SERR;
1725 }
1726 } else
1727 dbg("no _hpp for B/D/F = %#x/%#x/%#x.\n", func->bus, func->device, func->function);
1728 } else
1729 dbg("no acpi bridge for B/D/F = %#x/%#x/%#x.\n", func->bus, func->device, func->function);
1730
1731 if (command != cmd) {
1732 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
1733 }
1734 if ((card_type == PCI_HEADER_TYPE_BRIDGE) && (bcommand != bcmd)) {
1735 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
1736 }
1737}
diff --git a/drivers/pci/hotplug/pciehprm_nonacpi.c b/drivers/pci/hotplug/pciehprm_nonacpi.c
index 3622965f8961..29180dfe8493 100644
--- a/drivers/pci/hotplug/pciehprm_nonacpi.c
+++ b/drivers/pci/hotplug/pciehprm_nonacpi.c
@@ -27,475 +27,21 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/sched.h>
34#include <linux/pci.h> 34#include <linux/pci.h>
35#include <linux/init.h> 35#include <linux/slab.h>
36#include <asm/uaccess.h>
37#ifdef CONFIG_IA64
38#include <asm/iosapic.h>
39#endif
40#include "pciehp.h" 36#include "pciehp.h"
41#include "pciehprm.h"
42#include "pciehprm_nonacpi.h"
43 37
44 38void pciehp_get_hp_params_from_firmware(struct pci_dev *dev,
45void pciehprm_cleanup(void) 39 struct hotplug_params *hpp)
46{ 40{
47 return; 41 return;
48} 42}
49 43
50int pciehprm_print_pirt(void) 44int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev)
51{
52 return 0;
53}
54
55int pciehprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
56{
57
58 *sun = (u8) (ctrl->first_slot);
59 return 0;
60}
61
62
63static void print_pci_resource ( struct pci_resource *aprh)
64{
65 struct pci_resource *res;
66
67 for (res = aprh; res; res = res->next)
68 dbg(" base= 0x%x length= 0x%x\n", res->base, res->length);
69}
70
71
72static void phprm_dump_func_res( struct pci_func *fun)
73{
74 struct pci_func *func = fun;
75
76 if (func->bus_head) {
77 dbg(": BUS Resources:\n");
78 print_pci_resource (func->bus_head);
79 }
80 if (func->io_head) {
81 dbg(": IO Resources:\n");
82 print_pci_resource (func->io_head);
83 }
84 if (func->mem_head) {
85 dbg(": MEM Resources:\n");
86 print_pci_resource (func->mem_head);
87 }
88 if (func->p_mem_head) {
89 dbg(": PMEM Resources:\n");
90 print_pci_resource (func->p_mem_head);
91 }
92}
93
94static int phprm_get_used_resources (
95 struct controller *ctrl,
96 struct pci_func *func
97 )
98{
99 return pciehp_save_used_resources (ctrl, func, !DISABLE_CARD);
100}
101
102static int phprm_delete_resource(
103 struct pci_resource **aprh,
104 ulong base,
105 ulong size)
106{
107 struct pci_resource *res;
108 struct pci_resource *prevnode;
109 struct pci_resource *split_node;
110 ulong tbase;
111
112 pciehp_resource_sort_and_combine(aprh);
113
114 for (res = *aprh; res; res = res->next) {
115 if (res->base > base)
116 continue;
117
118 if ((res->base + res->length) < (base + size))
119 continue;
120
121 if (res->base < base) {
122 tbase = base;
123
124 if ((res->length - (tbase - res->base)) < size)
125 continue;
126
127 split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
128 if (!split_node)
129 return -ENOMEM;
130
131 split_node->base = res->base;
132 split_node->length = tbase - res->base;
133 res->base = tbase;
134 res->length -= split_node->length;
135
136 split_node->next = res->next;
137 res->next = split_node;
138 }
139
140 if (res->length >= size) {
141 split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
142 if (!split_node)
143 return -ENOMEM;
144
145 split_node->base = res->base + size;
146 split_node->length = res->length - size;
147 res->length = size;
148
149 split_node->next = res->next;
150 res->next = split_node;
151 }
152
153 if (*aprh == res) {
154 *aprh = res->next;
155 } else {
156 prevnode = *aprh;
157 while (prevnode->next != res)
158 prevnode = prevnode->next;
159
160 prevnode->next = res->next;
161 }
162 res->next = NULL;
163 kfree(res);
164 break;
165 }
166
167 return 0;
168}
169
170
171static int phprm_delete_resources(
172 struct pci_resource **aprh,
173 struct pci_resource *this
174 )
175{
176 struct pci_resource *res;
177
178 for (res = this; res; res = res->next)
179 phprm_delete_resource(aprh, res->base, res->length);
180
181 return 0;
182}
183
184
185static int configure_existing_function(
186 struct controller *ctrl,
187 struct pci_func *func
188 )
189{
190 int rc;
191
192 /* see how much resources the func has used. */
193 rc = phprm_get_used_resources (ctrl, func);
194
195 if (!rc) {
196 /* subtract the resources used by the func from ctrl resources */
197 rc = phprm_delete_resources (&ctrl->bus_head, func->bus_head);
198 rc |= phprm_delete_resources (&ctrl->io_head, func->io_head);
199 rc |= phprm_delete_resources (&ctrl->mem_head, func->mem_head);
200 rc |= phprm_delete_resources (&ctrl->p_mem_head, func->p_mem_head);
201 if (rc)
202 warn("aCEF: cannot del used resources\n");
203 } else
204 err("aCEF: cannot get used resources\n");
205
206 return rc;
207}
208
209static int pciehprm_delete_resource(
210 struct pci_resource **aprh,
211 ulong base,
212 ulong size)
213{
214 struct pci_resource *res;
215 struct pci_resource *prevnode;
216 struct pci_resource *split_node;
217 ulong tbase;
218
219 pciehp_resource_sort_and_combine(aprh);
220
221 for (res = *aprh; res; res = res->next) {
222 if (res->base > base)
223 continue;
224
225 if ((res->base + res->length) < (base + size))
226 continue;
227
228 if (res->base < base) {
229 tbase = base;
230
231 if ((res->length - (tbase - res->base)) < size)
232 continue;
233
234 split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
235 if (!split_node)
236 return -ENOMEM;
237
238 split_node->base = res->base;
239 split_node->length = tbase - res->base;
240 res->base = tbase;
241 res->length -= split_node->length;
242
243 split_node->next = res->next;
244 res->next = split_node;
245 }
246
247 if (res->length >= size) {
248 split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
249 if (!split_node)
250 return -ENOMEM;
251
252 split_node->base = res->base + size;
253 split_node->length = res->length - size;
254 res->length = size;
255
256 split_node->next = res->next;
257 res->next = split_node;
258 }
259
260 if (*aprh == res) {
261 *aprh = res->next;
262 } else {
263 prevnode = *aprh;
264 while (prevnode->next != res)
265 prevnode = prevnode->next;
266
267 prevnode->next = res->next;
268 }
269 res->next = NULL;
270 kfree(res);
271 break;
272 }
273
274 return 0;
275}
276
277static int bind_pci_resources_to_slots ( struct controller *ctrl)
278{
279 struct pci_func *func, new_func;
280 int busn = ctrl->slot_bus;
281 int devn, funn;
282 u32 vid;
283
284 for (devn = 0; devn < 32; devn++) {
285 for (funn = 0; funn < 8; funn++) {
286 /*
287 if (devn == ctrl->device && funn == ctrl->function)
288 continue;
289 */
290 /* find out if this entry is for an occupied slot */
291 vid = 0xFFFFFFFF;
292
293 pci_bus_read_config_dword(ctrl->pci_dev->subordinate, PCI_DEVFN(devn, funn), PCI_VENDOR_ID, &vid);
294
295 if (vid != 0xFFFFFFFF) {
296 dbg("%s: vid = %x bus %x dev %x fun %x\n", __FUNCTION__,
297 vid, busn, devn, funn);
298 func = pciehp_slot_find(busn, devn, funn);
299 dbg("%s: func = %p\n", __FUNCTION__,func);
300 if (!func) {
301 memset(&new_func, 0, sizeof(struct pci_func));
302 new_func.bus = busn;
303 new_func.device = devn;
304 new_func.function = funn;
305 new_func.is_a_board = 1;
306 configure_existing_function(ctrl, &new_func);
307 phprm_dump_func_res(&new_func);
308 } else {
309 configure_existing_function(ctrl, func);
310 phprm_dump_func_res(func);
311 }
312 dbg("aCCF:existing PCI 0x%x Func ResourceDump\n", ctrl->bus);
313 }
314 }
315 }
316
317 return 0;
318}
319
320static void phprm_dump_ctrl_res( struct controller *ctlr)
321{
322 struct controller *ctrl = ctlr;
323
324 if (ctrl->bus_head) {
325 dbg(": BUS Resources:\n");
326 print_pci_resource (ctrl->bus_head);
327 }
328 if (ctrl->io_head) {
329 dbg(": IO Resources:\n");
330 print_pci_resource (ctrl->io_head);
331 }
332 if (ctrl->mem_head) {
333 dbg(": MEM Resources:\n");
334 print_pci_resource (ctrl->mem_head);
335 }
336 if (ctrl->p_mem_head) {
337 dbg(": PMEM Resources:\n");
338 print_pci_resource (ctrl->p_mem_head);
339 }
340}
341
342/*
343 * phprm_find_available_resources
344 *
345 * Finds available memory, IO, and IRQ resources for programming
346 * devices which may be added to the system
347 * this function is for hot plug ADD!
348 *
349 * returns 0 if success
350 */
351int pciehprm_find_available_resources(struct controller *ctrl)
352{
353 struct pci_func func;
354 u32 rc;
355
356 memset(&func, 0, sizeof(struct pci_func));
357
358 func.bus = ctrl->bus;
359 func.device = ctrl->device;
360 func.function = ctrl->function;
361 func.is_a_board = 1;
362
363 /* Get resources for this PCI bridge */
364 rc = pciehp_save_used_resources (ctrl, &func, !DISABLE_CARD);
365 dbg("%s: pciehp_save_used_resources rc = %d\n", __FUNCTION__, rc);
366
367 if (func.mem_head)
368 func.mem_head->next = ctrl->mem_head;
369 ctrl->mem_head = func.mem_head;
370
371 if (func.p_mem_head)
372 func.p_mem_head->next = ctrl->p_mem_head;
373 ctrl->p_mem_head = func.p_mem_head;
374
375 if (func.io_head)
376 func.io_head->next = ctrl->io_head;
377 ctrl->io_head = func.io_head;
378
379 if(func.bus_head)
380 func.bus_head->next = ctrl->bus_head;
381 ctrl->bus_head = func.bus_head;
382
383 if (ctrl->bus_head)
384 pciehprm_delete_resource(&ctrl->bus_head, ctrl->pci_dev->subordinate->number, 1);
385
386 dbg("%s:pre-Bind PCI 0x%x Ctrl Resource Dump\n", __FUNCTION__, ctrl->bus);
387 phprm_dump_ctrl_res(ctrl);
388
389 dbg("%s: before bind_pci_resources_to slots\n", __FUNCTION__);
390
391 bind_pci_resources_to_slots (ctrl);
392
393 dbg("%s:post-Bind PCI 0x%x Ctrl Resource Dump\n", __FUNCTION__, ctrl->bus);
394 phprm_dump_ctrl_res(ctrl);
395
396 return (rc);
397}
398
399int pciehprm_set_hpp(
400 struct controller *ctrl,
401 struct pci_func *func,
402 u8 card_type)
403{
404 u32 rc;
405 u8 temp_byte;
406 struct pci_bus lpci_bus, *pci_bus;
407 unsigned int devfn;
408 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
409 pci_bus = &lpci_bus;
410 pci_bus->number = func->bus;
411 devfn = PCI_DEVFN(func->device, func->function);
412
413 temp_byte = 0x40; /* hard coded value for LT */
414 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
415 /* set subordinate Latency Timer */
416 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
417
418 if (rc) {
419 dbg("%s: set secondary LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__,
420 func->bus, func->device, func->function);
421 return rc;
422 }
423 }
424
425 /* set base Latency Timer */
426 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
427
428 if (rc) {
429 dbg("%s: set LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
430 return rc;
431 }
432
433 /* set Cache Line size */
434 temp_byte = 0x08; /* hard coded value for CLS */
435
436 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
437
438 if (rc) {
439 dbg("%s: set CLS error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
440 }
441
442 /* set enable_perr */
443 /* set enable_serr */
444
445 return rc;
446}
447
448void pciehprm_enable_card(
449 struct controller *ctrl,
450 struct pci_func *func,
451 u8 card_type)
452{
453 u16 command, bcommand;
454 struct pci_bus lpci_bus, *pci_bus;
455 unsigned int devfn;
456 int rc;
457
458 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
459 pci_bus = &lpci_bus;
460 pci_bus->number = func->bus;
461 devfn = PCI_DEVFN(func->device, func->function);
462
463 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
464
465 command |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR
466 | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
467 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
468
469 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
470
471 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
472
473 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
474
475 bcommand |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR
476 | PCI_BRIDGE_CTL_NO_ISA;
477
478 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
479 }
480}
481
482static int legacy_pciehprm_init_pci(void)
483{ 45{
484 return 0; 46 return 0;
485} 47}
486
487int pciehprm_init(enum php_ctlr_type ctrl_type)
488{
489 int retval;
490
491 switch (ctrl_type) {
492 case PCI:
493 retval = legacy_pciehprm_init_pci();
494 break;
495 default:
496 retval = -ENODEV;
497 break;
498 }
499
500 return retval;
501}
diff --git a/drivers/pci/hotplug/pciehprm_nonacpi.h b/drivers/pci/hotplug/pciehprm_nonacpi.h
deleted file mode 100644
index b10603b0e958..000000000000
--- a/drivers/pci/hotplug/pciehprm_nonacpi.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * PCIEHPRM NONACPI: PHP Resource Manager for Non-ACPI/Legacy platform
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
27 *
28 */
29
30#ifndef _PCIEHPRM_NONACPI_H_
31#define _PCIEHPRM_NONACPI_H_
32
33struct irq_info {
34 u8 bus, devfn; /* bus, device and function */
35 struct {
36 u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
37 u16 bitmap; /* Available IRQs */
38 } __attribute__ ((packed)) irq[4];
39 u8 slot; /* slot number, 0=onboard */
40 u8 rfu;
41} __attribute__ ((packed));
42
43struct irq_routing_table {
44 u32 signature; /* PIRQ_SIGNATURE should be here */
45 u16 version; /* PIRQ_VERSION */
46 u16 size; /* Table size in bytes */
47 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
48 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
49 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
50 u32 miniport_data; /* Crap */
51 u8 rfu[11];
52 u8 checksum; /* Modulo 256 checksum must give zero */
53 struct irq_info slots[0];
54} __attribute__ ((packed));
55
56#endif /* _PCIEHPRM_NONACPI_H_ */
diff --git a/drivers/pci/hotplug/rpadlpar_core.c b/drivers/pci/hotplug/rpadlpar_core.c
index ad1017da8656..cc03609f45d0 100644
--- a/drivers/pci/hotplug/rpadlpar_core.c
+++ b/drivers/pci/hotplug/rpadlpar_core.c
@@ -16,10 +16,13 @@
16 */ 16 */
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/pci.h> 18#include <linux/pci.h>
19#include <linux/string.h>
20
19#include <asm/pci-bridge.h> 21#include <asm/pci-bridge.h>
20#include <asm/semaphore.h> 22#include <asm/semaphore.h>
21#include <asm/rtas.h> 23#include <asm/rtas.h>
22#include <asm/vio.h> 24#include <asm/vio.h>
25
23#include "../pci.h" 26#include "../pci.h"
24#include "rpaphp.h" 27#include "rpaphp.h"
25#include "rpadlpar.h" 28#include "rpadlpar.h"
@@ -131,43 +134,6 @@ static void rpadlpar_claim_one_bus(struct pci_bus *b)
131 rpadlpar_claim_one_bus(child_bus); 134 rpadlpar_claim_one_bus(child_bus);
132} 135}
133 136
134static int pci_add_secondary_bus(struct device_node *dn,
135 struct pci_dev *bridge_dev)
136{
137 struct pci_dn *pdn = dn->data;
138 struct pci_controller *hose = pdn->phb;
139 struct pci_bus *child;
140 u8 sec_busno;
141
142 /* Get busno of downstream bus */
143 pci_read_config_byte(bridge_dev, PCI_SECONDARY_BUS, &sec_busno);
144
145 /* Allocate and add to children of bridge_dev->bus */
146 child = pci_add_new_bus(bridge_dev->bus, bridge_dev, sec_busno);
147 if (!child) {
148 printk(KERN_ERR "%s: could not add secondary bus\n", __FUNCTION__);
149 return -ENOMEM;
150 }
151
152 sprintf(child->name, "PCI Bus #%02x", child->number);
153
154 /* Fixup subordinate bridge bases and resources */
155 pcibios_fixup_bus(child);
156
157 /* Claim new bus resources */
158 rpadlpar_claim_one_bus(bridge_dev->bus);
159
160 if (hose->last_busno < child->number)
161 hose->last_busno = child->number;
162
163 pdn->bussubno = child->number;
164
165 /* ioremap() for child bus, which may or may not succeed */
166 remap_bus_range(child);
167
168 return 0;
169}
170
171static struct pci_dev *dlpar_find_new_dev(struct pci_bus *parent, 137static struct pci_dev *dlpar_find_new_dev(struct pci_bus *parent,
172 struct device_node *dev_dn) 138 struct device_node *dev_dn)
173{ 139{
@@ -185,29 +151,41 @@ static struct pci_dev *dlpar_find_new_dev(struct pci_bus *parent,
185static struct pci_dev *dlpar_pci_add_bus(struct device_node *dn) 151static struct pci_dev *dlpar_pci_add_bus(struct device_node *dn)
186{ 152{
187 struct pci_dn *pdn = dn->data; 153 struct pci_dn *pdn = dn->data;
188 struct pci_controller *hose = pdn->phb; 154 struct pci_controller *phb = pdn->phb;
189 struct pci_dev *dev = NULL; 155 struct pci_dev *dev = NULL;
190 156
191 /* Scan phb bus for EADS device, adding new one to bus->devices */ 157 rpaphp_eeh_init_nodes(dn);
192 if (!pci_scan_single_device(hose->bus, pdn->devfn)) { 158 /* Add EADS device to PHB bus, adding new entry to bus->devices */
193 printk(KERN_ERR "%s: found no device on bus\n", __FUNCTION__); 159 dev = of_create_pci_dev(dn, phb->bus, pdn->devfn);
160 if (!dev) {
161 printk(KERN_ERR "%s: failed to create pci dev for %s\n",
162 __FUNCTION__, dn->full_name);
194 return NULL; 163 return NULL;
195 } 164 }
196 165
166 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
167 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
168 of_scan_pci_bridge(dn, dev);
169
170 rpaphp_init_new_devs(dev->subordinate);
171
172 /* Claim new bus resources */
173 rpadlpar_claim_one_bus(dev->bus);
174
175 /* ioremap() for child bus, which may or may not succeed */
176 (void) remap_bus_range(dev->bus);
177
197 /* Add new devices to global lists. Register in proc, sysfs. */ 178 /* Add new devices to global lists. Register in proc, sysfs. */
198 pci_bus_add_devices(hose->bus); 179 pci_bus_add_devices(phb->bus);
199 180
200 /* Confirm new bridge dev was created */ 181 /* Confirm new bridge dev was created */
201 dev = dlpar_find_new_dev(hose->bus, dn); 182 dev = dlpar_find_new_dev(phb->bus, dn);
202 if (dev) { 183 if (dev) {
203 if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) { 184 if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) {
204 printk(KERN_ERR "%s: unexpected header type %d\n", 185 printk(KERN_ERR "%s: unexpected header type %d\n",
205 __FUNCTION__, dev->hdr_type); 186 __FUNCTION__, dev->hdr_type);
206 return NULL; 187 return NULL;
207 } 188 }
208
209 if (pci_add_secondary_bus(dn, dev))
210 return NULL;
211 } 189 }
212 190
213 return dev; 191 return dev;
@@ -216,7 +194,6 @@ static struct pci_dev *dlpar_pci_add_bus(struct device_node *dn)
216static int dlpar_add_pci_slot(char *drc_name, struct device_node *dn) 194static int dlpar_add_pci_slot(char *drc_name, struct device_node *dn)
217{ 195{
218 struct pci_dev *dev; 196 struct pci_dev *dev;
219 int rc;
220 197
221 if (rpaphp_find_pci_bus(dn)) 198 if (rpaphp_find_pci_bus(dn))
222 return -EINVAL; 199 return -EINVAL;
@@ -229,15 +206,6 @@ static int dlpar_add_pci_slot(char *drc_name, struct device_node *dn)
229 return -EIO; 206 return -EIO;
230 } 207 }
231 208
232 if (dn->child) {
233 rc = rpaphp_config_pci_adapter(dev->subordinate);
234 if (rc < 0) {
235 printk(KERN_ERR "%s: unable to enable slot %s\n",
236 __FUNCTION__, drc_name);
237 return -EIO;
238 }
239 }
240
241 /* Add hotplug slot */ 209 /* Add hotplug slot */
242 if (rpaphp_add_slot(dn)) { 210 if (rpaphp_add_slot(dn)) {
243 printk(KERN_ERR "%s: unable to add hotplug slot %s\n", 211 printk(KERN_ERR "%s: unable to add hotplug slot %s\n",
@@ -303,7 +271,7 @@ static int dlpar_add_phb(char *drc_name, struct device_node *dn)
303{ 271{
304 struct pci_controller *phb; 272 struct pci_controller *phb;
305 273
306 if (PCI_DN(dn)->phb) { 274 if (PCI_DN(dn) && PCI_DN(dn)->phb) {
307 /* PHB already exists */ 275 /* PHB already exists */
308 return -EINVAL; 276 return -EINVAL;
309 } 277 }
@@ -432,6 +400,8 @@ int dlpar_remove_pci_slot(char *drc_name, struct device_node *dn)
432 __FUNCTION__, drc_name); 400 __FUNCTION__, drc_name);
433 return -EIO; 401 return -EIO;
434 } 402 }
403 } else {
404 rpaphp_unconfig_pci_adapter(bus);
435 } 405 }
436 406
437 if (unmap_bus_range(bus)) { 407 if (unmap_bus_range(bus)) {
diff --git a/drivers/pci/hotplug/rpadlpar_sysfs.c b/drivers/pci/hotplug/rpadlpar_sysfs.c
index 752e6513c447..db69be85b458 100644
--- a/drivers/pci/hotplug/rpadlpar_sysfs.c
+++ b/drivers/pci/hotplug/rpadlpar_sysfs.c
@@ -62,7 +62,7 @@ static ssize_t add_slot_store(struct dlpar_io_attr *dlpar_attr,
62 char drc_name[MAX_DRC_NAME_LEN]; 62 char drc_name[MAX_DRC_NAME_LEN];
63 char *end; 63 char *end;
64 64
65 if (nbytes > MAX_DRC_NAME_LEN) 65 if (nbytes >= MAX_DRC_NAME_LEN)
66 return 0; 66 return 0;
67 67
68 memcpy(drc_name, buf, nbytes); 68 memcpy(drc_name, buf, nbytes);
@@ -83,7 +83,7 @@ static ssize_t remove_slot_store(struct dlpar_io_attr *dlpar_attr,
83 char drc_name[MAX_DRC_NAME_LEN]; 83 char drc_name[MAX_DRC_NAME_LEN];
84 char *end; 84 char *end;
85 85
86 if (nbytes > MAX_DRC_NAME_LEN) 86 if (nbytes >= MAX_DRC_NAME_LEN)
87 return 0; 87 return 0;
88 88
89 memcpy(drc_name, buf, nbytes); 89 memcpy(drc_name, buf, nbytes);
diff --git a/drivers/pci/hotplug/rpaphp.h b/drivers/pci/hotplug/rpaphp.h
index 61d94d1e29cb..57ea71a7bda5 100644
--- a/drivers/pci/hotplug/rpaphp.h
+++ b/drivers/pci/hotplug/rpaphp.h
@@ -92,9 +92,12 @@ extern struct pci_bus *rpaphp_find_pci_bus(struct device_node *dn);
92extern int rpaphp_claim_resource(struct pci_dev *dev, int resource); 92extern int rpaphp_claim_resource(struct pci_dev *dev, int resource);
93extern int rpaphp_enable_pci_slot(struct slot *slot); 93extern int rpaphp_enable_pci_slot(struct slot *slot);
94extern int register_pci_slot(struct slot *slot); 94extern int register_pci_slot(struct slot *slot);
95extern int rpaphp_unconfig_pci_adapter(struct slot *slot);
96extern int rpaphp_get_pci_adapter_status(struct slot *slot, int is_init, u8 * value); 95extern int rpaphp_get_pci_adapter_status(struct slot *slot, int is_init, u8 * value);
96extern void rpaphp_init_new_devs(struct pci_bus *bus);
97extern void rpaphp_eeh_init_nodes(struct device_node *dn);
98
97extern int rpaphp_config_pci_adapter(struct pci_bus *bus); 99extern int rpaphp_config_pci_adapter(struct pci_bus *bus);
100extern int rpaphp_unconfig_pci_adapter(struct pci_bus *bus);
98 101
99/* rpaphp_core.c */ 102/* rpaphp_core.c */
100extern int rpaphp_add_slot(struct device_node *dn); 103extern int rpaphp_add_slot(struct device_node *dn);
diff --git a/drivers/pci/hotplug/rpaphp_core.c b/drivers/pci/hotplug/rpaphp_core.c
index c830ff0acdc3..cf075c34b578 100644
--- a/drivers/pci/hotplug/rpaphp_core.c
+++ b/drivers/pci/hotplug/rpaphp_core.c
@@ -426,8 +426,11 @@ static int disable_slot(struct hotplug_slot *hotplug_slot)
426 426
427 dbg("DISABLING SLOT %s\n", slot->name); 427 dbg("DISABLING SLOT %s\n", slot->name);
428 down(&rpaphp_sem); 428 down(&rpaphp_sem);
429 retval = rpaphp_unconfig_pci_adapter(slot); 429 retval = rpaphp_unconfig_pci_adapter(slot->bus);
430 up(&rpaphp_sem); 430 up(&rpaphp_sem);
431 slot->state = NOT_CONFIGURED;
432 info("%s: devices in slot[%s] unconfigured.\n", __FUNCTION__,
433 slot->name);
431exit: 434exit:
432 dbg("%s - Exit: rc[%d]\n", __FUNCTION__, retval); 435 dbg("%s - Exit: rc[%d]\n", __FUNCTION__, retval);
433 return retval; 436 return retval;
diff --git a/drivers/pci/hotplug/rpaphp_pci.c b/drivers/pci/hotplug/rpaphp_pci.c
index 49e4d10a6488..4b35097b3d9f 100644
--- a/drivers/pci/hotplug/rpaphp_pci.c
+++ b/drivers/pci/hotplug/rpaphp_pci.c
@@ -23,11 +23,13 @@
23 * 23 *
24 */ 24 */
25#include <linux/pci.h> 25#include <linux/pci.h>
26#include <linux/string.h>
27
26#include <asm/pci-bridge.h> 28#include <asm/pci-bridge.h>
27#include <asm/rtas.h> 29#include <asm/rtas.h>
28#include <asm/machdep.h> 30#include <asm/machdep.h>
29#include "../pci.h" /* for pci_add_new_bus */
30 31
32#include "../pci.h" /* for pci_add_new_bus */
31#include "rpaphp.h" 33#include "rpaphp.h"
32 34
33static struct pci_bus *find_bus_among_children(struct pci_bus *bus, 35static struct pci_bus *find_bus_among_children(struct pci_bus *bus,
@@ -152,8 +154,7 @@ exit:
152} 154}
153 155
154/* Must be called before pci_bus_add_devices */ 156/* Must be called before pci_bus_add_devices */
155static void 157void rpaphp_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus)
156rpaphp_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus)
157{ 158{
158 struct pci_dev *dev; 159 struct pci_dev *dev;
159 160
@@ -182,6 +183,20 @@ rpaphp_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus)
182 } 183 }
183} 184}
184 185
186static void rpaphp_eeh_add_bus_device(struct pci_bus *bus)
187{
188 struct pci_dev *dev;
189
190 list_for_each_entry(dev, &bus->devices, bus_list) {
191 eeh_add_device_late(dev);
192 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
193 struct pci_bus *subbus = dev->subordinate;
194 if (subbus)
195 rpaphp_eeh_add_bus_device (subbus);
196 }
197 }
198}
199
185static int rpaphp_pci_config_bridge(struct pci_dev *dev) 200static int rpaphp_pci_config_bridge(struct pci_dev *dev)
186{ 201{
187 u8 sec_busno; 202 u8 sec_busno;
@@ -215,6 +230,13 @@ static int rpaphp_pci_config_bridge(struct pci_dev *dev)
215 return 0; 230 return 0;
216} 231}
217 232
233void rpaphp_init_new_devs(struct pci_bus *bus)
234{
235 rpaphp_fixup_new_pci_devices(bus, 0);
236 rpaphp_eeh_add_bus_device(bus);
237}
238EXPORT_SYMBOL_GPL(rpaphp_init_new_devs);
239
218/***************************************************************************** 240/*****************************************************************************
219 rpaphp_pci_config_slot() will configure all devices under the 241 rpaphp_pci_config_slot() will configure all devices under the
220 given slot->dn and return the the first pci_dev. 242 given slot->dn and return the the first pci_dev.
@@ -231,36 +253,51 @@ rpaphp_pci_config_slot(struct pci_bus *bus)
231 if (!dn || !dn->child) 253 if (!dn || !dn->child)
232 return NULL; 254 return NULL;
233 255
234 slotno = PCI_SLOT(PCI_DN(dn->child)->devfn); 256 if (_machine == PLATFORM_PSERIES_LPAR) {
257 of_scan_bus(dn, bus);
258 if (list_empty(&bus->devices)) {
259 err("%s: No new device found\n", __FUNCTION__);
260 return NULL;
261 }
235 262
236 /* pci_scan_slot should find all children */ 263 rpaphp_init_new_devs(bus);
237 num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
238 if (num) {
239 rpaphp_fixup_new_pci_devices(bus, 1);
240 pci_bus_add_devices(bus); 264 pci_bus_add_devices(bus);
241 } 265 dev = list_entry(&bus->devices, struct pci_dev, bus_list);
242 if (list_empty(&bus->devices)) { 266 } else {
243 err("%s: No new device found\n", __FUNCTION__); 267 slotno = PCI_SLOT(PCI_DN(dn->child)->devfn);
244 return NULL; 268
245 } 269 /* pci_scan_slot should find all children */
246 list_for_each_entry(dev, &bus->devices, bus_list) { 270 num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
247 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) 271 if (num) {
248 rpaphp_pci_config_bridge(dev); 272 rpaphp_fixup_new_pci_devices(bus, 1);
273 pci_bus_add_devices(bus);
274 }
275 if (list_empty(&bus->devices)) {
276 err("%s: No new device found\n", __FUNCTION__);
277 return NULL;
278 }
279 list_for_each_entry(dev, &bus->devices, bus_list) {
280 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
281 rpaphp_pci_config_bridge(dev);
282
283 rpaphp_eeh_add_bus_device(bus);
284 }
249 } 285 }
250 286
251 return dev; 287 return dev;
252} 288}
253 289
254static void enable_eeh(struct device_node *dn) 290void rpaphp_eeh_init_nodes(struct device_node *dn)
255{ 291{
256 struct device_node *sib; 292 struct device_node *sib;
257 293
258 for (sib = dn->child; sib; sib = sib->sibling) 294 for (sib = dn->child; sib; sib = sib->sibling)
259 enable_eeh(sib); 295 rpaphp_eeh_init_nodes(sib);
260 eeh_add_device_early(dn); 296 eeh_add_device_early(dn);
261 return; 297 return;
262 298
263} 299}
300EXPORT_SYMBOL_GPL(rpaphp_eeh_init_nodes);
264 301
265static void print_slot_pci_funcs(struct pci_bus *bus) 302static void print_slot_pci_funcs(struct pci_bus *bus)
266{ 303{
@@ -287,7 +324,7 @@ int rpaphp_config_pci_adapter(struct pci_bus *bus)
287 if (!dn) 324 if (!dn)
288 goto exit; 325 goto exit;
289 326
290 enable_eeh(dn); 327 rpaphp_eeh_init_nodes(dn);
291 dev = rpaphp_pci_config_slot(bus); 328 dev = rpaphp_pci_config_slot(bus);
292 if (!dev) { 329 if (!dev) {
293 err("%s: can't find any devices.\n", __FUNCTION__); 330 err("%s: can't find any devices.\n", __FUNCTION__);
@@ -319,21 +356,17 @@ static void rpaphp_eeh_remove_bus_device(struct pci_dev *dev)
319 return; 356 return;
320} 357}
321 358
322int rpaphp_unconfig_pci_adapter(struct slot *slot) 359int rpaphp_unconfig_pci_adapter(struct pci_bus *bus)
323{ 360{
324 struct pci_dev *dev, *tmp; 361 struct pci_dev *dev, *tmp;
325 int retval = 0;
326 362
327 list_for_each_entry_safe(dev, tmp, slot->pci_devs, bus_list) { 363 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
328 rpaphp_eeh_remove_bus_device(dev); 364 rpaphp_eeh_remove_bus_device(dev);
329 pci_remove_bus_device(dev); 365 pci_remove_bus_device(dev);
330 } 366 }
331 367 return 0;
332 slot->state = NOT_CONFIGURED;
333 info("%s: devices in slot[%s] unconfigured.\n", __FUNCTION__,
334 slot->name);
335 return retval;
336} 368}
369EXPORT_SYMBOL_GPL(rpaphp_unconfig_pci_adapter);
337 370
338static int setup_pci_hotplug_slot_info(struct slot *slot) 371static int setup_pci_hotplug_slot_info(struct slot *slot)
339{ 372{
@@ -447,8 +480,8 @@ int rpaphp_enable_pci_slot(struct slot *slot)
447 retval = rpaphp_config_pci_adapter(slot->bus); 480 retval = rpaphp_config_pci_adapter(slot->bus);
448 if (!retval) { 481 if (!retval) {
449 slot->state = CONFIGURED; 482 slot->state = CONFIGURED;
450 dbg("%s: PCI devices in slot[%s] has been configured\n", 483 info("%s: devices in slot[%s] configured\n",
451 __FUNCTION__, slot->name); 484 __FUNCTION__, slot->name);
452 } else { 485 } else {
453 slot->state = NOT_CONFIGURED; 486 slot->state = NOT_CONFIGURED;
454 dbg("%s: no pci_dev struct for adapter in slot[%s]\n", 487 dbg("%s: no pci_dev struct for adapter in slot[%s]\n",
diff --git a/drivers/pci/hotplug/rpaphp_slot.c b/drivers/pci/hotplug/rpaphp_slot.c
index 0e8815495083..daa89ae57123 100644
--- a/drivers/pci/hotplug/rpaphp_slot.c
+++ b/drivers/pci/hotplug/rpaphp_slot.c
@@ -27,6 +27,9 @@
27#include <linux/kobject.h> 27#include <linux/kobject.h>
28#include <linux/sysfs.h> 28#include <linux/sysfs.h>
29#include <linux/pci.h> 29#include <linux/pci.h>
30#include <linux/string.h>
31#include <linux/slab.h>
32
30#include <asm/rtas.h> 33#include <asm/rtas.h>
31#include "rpaphp.h" 34#include "rpaphp.h"
32 35
diff --git a/drivers/pci/hotplug/sgi_hotplug.c b/drivers/pci/hotplug/sgi_hotplug.c
index b1409441c1cd..a32ae82e5922 100644
--- a/drivers/pci/hotplug/sgi_hotplug.c
+++ b/drivers/pci/hotplug/sgi_hotplug.c
@@ -159,7 +159,7 @@ static int sn_hp_slot_private_alloc(struct hotplug_slot *bss_hotplug_slot,
159 159
160 pcibus_info = SN_PCIBUS_BUSSOFT_INFO(pci_bus); 160 pcibus_info = SN_PCIBUS_BUSSOFT_INFO(pci_bus);
161 161
162 slot = kcalloc(1, sizeof(*slot), GFP_KERNEL); 162 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
163 if (!slot) 163 if (!slot)
164 return -ENOMEM; 164 return -ENOMEM;
165 bss_hotplug_slot->private = slot; 165 bss_hotplug_slot->private = slot;
@@ -491,7 +491,7 @@ static int sn_hotplug_slot_register(struct pci_bus *pci_bus)
491 if (sn_pci_slot_valid(pci_bus, device) != 1) 491 if (sn_pci_slot_valid(pci_bus, device) != 1)
492 continue; 492 continue;
493 493
494 bss_hotplug_slot = kcalloc(1, sizeof(*bss_hotplug_slot), 494 bss_hotplug_slot = kzalloc(sizeof(*bss_hotplug_slot),
495 GFP_KERNEL); 495 GFP_KERNEL);
496 if (!bss_hotplug_slot) { 496 if (!bss_hotplug_slot) {
497 rc = -ENOMEM; 497 rc = -ENOMEM;
@@ -499,7 +499,7 @@ static int sn_hotplug_slot_register(struct pci_bus *pci_bus)
499 } 499 }
500 500
501 bss_hotplug_slot->info = 501 bss_hotplug_slot->info =
502 kcalloc(1, sizeof(struct hotplug_slot_info), 502 kzalloc(sizeof(struct hotplug_slot_info),
503 GFP_KERNEL); 503 GFP_KERNEL);
504 if (!bss_hotplug_slot->info) { 504 if (!bss_hotplug_slot->info) {
505 rc = -ENOMEM; 505 rc = -ENOMEM;
diff --git a/drivers/pci/hotplug/shpchp.h b/drivers/pci/hotplug/shpchp.h
index b7d1c61d6bbb..08ad26a0cae7 100644
--- a/drivers/pci/hotplug/shpchp.h
+++ b/drivers/pci/hotplug/shpchp.h
@@ -32,8 +32,8 @@
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/pci.h> 33#include <linux/pci.h>
34#include <linux/delay.h> 34#include <linux/delay.h>
35#include <asm/semaphore.h> 35#include <linux/sched.h> /* signal_pending(), struct timer_list */
36#include <asm/io.h> 36
37#include "pci_hotplug.h" 37#include "pci_hotplug.h"
38 38
39#if !defined(MODULE) 39#if !defined(MODULE)
@@ -52,42 +52,18 @@ extern int shpchp_debug;
52#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg) 52#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
53#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg) 53#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
54 54
55struct pci_func {
56 struct pci_func *next;
57 u8 bus;
58 u8 device;
59 u8 function;
60 u8 is_a_board;
61 u16 status;
62 u8 configured;
63 u8 switch_save;
64 u8 presence_save;
65 u8 pwr_save;
66 u32 base_length[0x06];
67 u8 base_type[0x06];
68 u16 reserved2;
69 u32 config_space[0x20];
70 struct pci_resource *mem_head;
71 struct pci_resource *p_mem_head;
72 struct pci_resource *io_head;
73 struct pci_resource *bus_head;
74 struct pci_dev* pci_dev;
75};
76
77#define SLOT_MAGIC 0x67267321 55#define SLOT_MAGIC 0x67267321
78struct slot { 56struct slot {
79 u32 magic; 57 u32 magic;
80 struct slot *next; 58 struct slot *next;
81 u8 bus; 59 u8 bus;
82 u8 device; 60 u8 device;
61 u16 status;
83 u32 number; 62 u32 number;
84 u8 is_a_board; 63 u8 is_a_board;
85 u8 configured;
86 u8 state; 64 u8 state;
87 u8 switch_save;
88 u8 presence_save; 65 u8 presence_save;
89 u32 capabilities; 66 u8 pwr_save;
90 u16 reserved2;
91 struct timer_list task_event; 67 struct timer_list task_event;
92 u8 hp_slot; 68 u8 hp_slot;
93 struct controller *ctrl; 69 struct controller *ctrl;
@@ -96,12 +72,6 @@ struct slot {
96 struct list_head slot_list; 72 struct list_head slot_list;
97}; 73};
98 74
99struct pci_resource {
100 struct pci_resource * next;
101 u32 base;
102 u32 length;
103};
104
105struct event_info { 75struct event_info {
106 u32 event_type; 76 u32 event_type;
107 u8 hp_slot; 77 u8 hp_slot;
@@ -110,13 +80,9 @@ struct event_info {
110struct controller { 80struct controller {
111 struct controller *next; 81 struct controller *next;
112 struct semaphore crit_sect; /* critical section semaphore */ 82 struct semaphore crit_sect; /* critical section semaphore */
113 void * hpc_ctlr_handle; /* HPC controller handle */ 83 struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */
114 int num_slots; /* Number of slots on ctlr */ 84 int num_slots; /* Number of slots on ctlr */
115 int slot_num_inc; /* 1 or -1 */ 85 int slot_num_inc; /* 1 or -1 */
116 struct pci_resource *mem_head;
117 struct pci_resource *p_mem_head;
118 struct pci_resource *io_head;
119 struct pci_resource *bus_head;
120 struct pci_dev *pci_dev; 86 struct pci_dev *pci_dev;
121 struct pci_bus *pci_bus; 87 struct pci_bus *pci_bus;
122 struct event_info event_queue[10]; 88 struct event_info event_queue[10];
@@ -124,33 +90,21 @@ struct controller {
124 struct hpc_ops *hpc_ops; 90 struct hpc_ops *hpc_ops;
125 wait_queue_head_t queue; /* sleep & wake process */ 91 wait_queue_head_t queue; /* sleep & wake process */
126 u8 next_event; 92 u8 next_event;
127 u8 seg;
128 u8 bus; 93 u8 bus;
129 u8 device; 94 u8 device;
130 u8 function; 95 u8 function;
131 u8 rev;
132 u8 slot_device_offset; 96 u8 slot_device_offset;
133 u8 add_support; 97 u8 add_support;
134 enum pci_bus_speed speed; 98 enum pci_bus_speed speed;
135 u32 first_slot; /* First physical slot number */ 99 u32 first_slot; /* First physical slot number */
136 u8 slot_bus; /* Bus where the slots handled by this controller sit */ 100 u8 slot_bus; /* Bus where the slots handled by this controller sit */
137 u8 push_flag;
138 u16 ctlrcap;
139 u16 vendor_id;
140};
141
142struct irq_mapping {
143 u8 barber_pole;
144 u8 valid_INT;
145 u8 interrupt[4];
146}; 101};
147 102
148struct resource_lists { 103struct hotplug_params {
149 struct pci_resource *mem_head; 104 u8 cache_line_size;
150 struct pci_resource *p_mem_head; 105 u8 latency_timer;
151 struct pci_resource *io_head; 106 u8 enable_serr;
152 struct pci_resource *bus_head; 107 u8 enable_perr;
153 struct irq_mapping *irqs;
154}; 108};
155 109
156/* Define AMD SHPC ID */ 110/* Define AMD SHPC ID */
@@ -194,24 +148,16 @@ struct resource_lists {
194 * error Messages 148 * error Messages
195 */ 149 */
196#define msg_initialization_err "Initialization failure, error=%d\n" 150#define msg_initialization_err "Initialization failure, error=%d\n"
197#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
198#define msg_HPC_non_shpc "The PCI hot plug controller is not supported by this driver.\n"
199#define msg_HPC_not_supported "This system is not supported by this version of shpcphd mdoule. Upgrade to a newer version of shpchpd\n"
200#define msg_unable_to_save "Unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
201#define msg_button_on "PCI slot #%d - powering on due to button press.\n" 151#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
202#define msg_button_off "PCI slot #%d - powering off due to button press.\n" 152#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
203#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n" 153#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
204#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
205 154
206/* sysfs functions for the hotplug controller info */ 155/* sysfs functions for the hotplug controller info */
207extern void shpchp_create_ctrl_files (struct controller *ctrl); 156extern void shpchp_create_ctrl_files (struct controller *ctrl);
208 157
209/* controller functions */ 158/* controller functions */
210extern int shpchprm_find_available_resources(struct controller *ctrl);
211extern int shpchp_event_start_thread(void); 159extern int shpchp_event_start_thread(void);
212extern void shpchp_event_stop_thread(void); 160extern void shpchp_event_stop_thread(void);
213extern struct pci_func *shpchp_slot_create(unsigned char busnumber);
214extern struct pci_func *shpchp_slot_find(unsigned char bus, unsigned char device, unsigned char index);
215extern int shpchp_enable_slot(struct slot *slot); 161extern int shpchp_enable_slot(struct slot *slot);
216extern int shpchp_disable_slot(struct slot *slot); 162extern int shpchp_disable_slot(struct slot *slot);
217 163
@@ -220,29 +166,20 @@ extern u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id);
220extern u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id); 166extern u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id);
221extern u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id); 167extern u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id);
222 168
223/* resource functions */
224extern int shpchp_resource_sort_and_combine(struct pci_resource **head);
225
226/* pci functions */ 169/* pci functions */
227extern int shpchp_set_irq(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
228/*extern int shpchp_get_bus_dev(struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/
229extern int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num); 170extern int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
230extern int shpchp_save_used_resources(struct controller *ctrl, struct pci_func * func, int flag); 171extern int shpchp_configure_device(struct slot *p_slot);
231extern int shpchp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot); 172extern int shpchp_unconfigure_device(struct slot *p_slot);
232extern void shpchp_destroy_board_resources(struct pci_func * func); 173extern void get_hp_hw_control_from_firmware(struct pci_dev *dev);
233extern int shpchp_return_board_resources(struct pci_func * func, struct resource_lists * resources); 174extern void get_hp_params_from_firmware(struct pci_dev *dev,
234extern void shpchp_destroy_resource_list(struct resource_lists * resources); 175 struct hotplug_params *hpp);
235extern int shpchp_configure_device(struct controller* ctrl, struct pci_func* func); 176extern int shpchprm_get_physical_slot_number(struct controller *ctrl,
236extern int shpchp_unconfigure_device(struct pci_func* func); 177 u32 *sun, u8 busnum, u8 devnum);
178extern void shpchp_remove_ctrl_files(struct controller *ctrl);
237 179
238 180
239/* Global variables */ 181/* Global variables */
240extern struct controller *shpchp_ctrl_list; 182extern struct controller *shpchp_ctrl_list;
241extern struct pci_func *shpchp_slot_list[256];
242
243/* These are added to support AMD shpc */
244extern u8 shpchp_nic_irq;
245extern u8 shpchp_disk_irq;
246 183
247struct ctrl_reg { 184struct ctrl_reg {
248 volatile u32 base_offset; 185 volatile u32 base_offset;
@@ -298,7 +235,7 @@ enum ctrl_offsets {
298 SLOT11 = offsetof(struct ctrl_reg, slot11), 235 SLOT11 = offsetof(struct ctrl_reg, slot11),
299 SLOT12 = offsetof(struct ctrl_reg, slot12), 236 SLOT12 = offsetof(struct ctrl_reg, slot12),
300}; 237};
301typedef u8(*php_intr_callback_t) (unsigned int change_id, void *instance_id); 238typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id);
302struct php_ctlr_state_s { 239struct php_ctlr_state_s {
303 struct php_ctlr_state_s *pnext; 240 struct php_ctlr_state_s *pnext;
304 struct pci_dev *pci_dev; 241 struct pci_dev *pci_dev;
@@ -359,12 +296,9 @@ static inline struct slot *shpchp_find_slot (struct controller *ctrl, u8 device)
359 296
360 p_slot = ctrl->slot; 297 p_slot = ctrl->slot;
361 298
362 dbg("p_slot = %p\n", p_slot);
363
364 while (p_slot && (p_slot->device != device)) { 299 while (p_slot && (p_slot->device != device)) {
365 tmp_slot = p_slot; 300 tmp_slot = p_slot;
366 p_slot = p_slot->next; 301 p_slot = p_slot->next;
367 dbg("In while loop, p_slot = %p\n", p_slot);
368 } 302 }
369 if (p_slot == NULL) { 303 if (p_slot == NULL) {
370 err("ERROR: shpchp_find_slot device=0x%x\n", device); 304 err("ERROR: shpchp_find_slot device=0x%x\n", device);
@@ -379,8 +313,6 @@ static inline int wait_for_ctrl_irq (struct controller *ctrl)
379 DECLARE_WAITQUEUE(wait, current); 313 DECLARE_WAITQUEUE(wait, current);
380 int retval = 0; 314 int retval = 0;
381 315
382 dbg("%s : start\n",__FUNCTION__);
383
384 add_wait_queue(&ctrl->queue, &wait); 316 add_wait_queue(&ctrl->queue, &wait);
385 317
386 if (!shpchp_poll_mode) { 318 if (!shpchp_poll_mode) {
@@ -394,19 +326,9 @@ static inline int wait_for_ctrl_irq (struct controller *ctrl)
394 if (signal_pending(current)) 326 if (signal_pending(current))
395 retval = -EINTR; 327 retval = -EINTR;
396 328
397 dbg("%s : end\n", __FUNCTION__);
398 return retval; 329 return retval;
399} 330}
400 331
401/* Puts node back in the resource list pointed to by head */
402static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
403{
404 if (!node || !head)
405 return;
406 node->next = *head;
407 *head = node;
408}
409
410#define SLOT_NAME_SIZE 10 332#define SLOT_NAME_SIZE 10
411 333
412static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot) 334static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
@@ -420,11 +342,7 @@ enum php_ctlr_type {
420 ACPI 342 ACPI
421}; 343};
422 344
423int shpc_init( struct controller *ctrl, struct pci_dev *pdev, 345int shpc_init( struct controller *ctrl, struct pci_dev *pdev);
424 php_intr_callback_t attention_button_callback,
425 php_intr_callback_t switch_change_callback,
426 php_intr_callback_t presence_change_callback,
427 php_intr_callback_t power_fault_callback);
428 346
429int shpc_get_ctlr_slot_config( struct controller *ctrl, 347int shpc_get_ctlr_slot_config( struct controller *ctrl,
430 int *num_ctlr_slots, 348 int *num_ctlr_slots,
@@ -437,8 +355,6 @@ struct hpc_ops {
437 int (*power_on_slot ) (struct slot *slot); 355 int (*power_on_slot ) (struct slot *slot);
438 int (*slot_enable ) (struct slot *slot); 356 int (*slot_enable ) (struct slot *slot);
439 int (*slot_disable ) (struct slot *slot); 357 int (*slot_disable ) (struct slot *slot);
440 int (*enable_all_slots) (struct slot *slot);
441 int (*pwr_on_all_slots) (struct slot *slot);
442 int (*set_bus_speed_mode) (struct slot *slot, enum pci_bus_speed speed); 358 int (*set_bus_speed_mode) (struct slot *slot, enum pci_bus_speed speed);
443 int (*get_power_status) (struct slot *slot, u8 *status); 359 int (*get_power_status) (struct slot *slot, u8 *status);
444 int (*get_attention_status) (struct slot *slot, u8 *status); 360 int (*get_attention_status) (struct slot *slot, u8 *status);
diff --git a/drivers/pci/hotplug/shpchp_core.c b/drivers/pci/hotplug/shpchp_core.c
index 6f7d8a29957a..63628e01dd43 100644
--- a/drivers/pci/hotplug/shpchp_core.c
+++ b/drivers/pci/hotplug/shpchp_core.c
@@ -27,26 +27,18 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/moduleparam.h> 31#include <linux/moduleparam.h>
33#include <linux/kernel.h> 32#include <linux/kernel.h>
34#include <linux/types.h> 33#include <linux/types.h>
35#include <linux/proc_fs.h>
36#include <linux/slab.h>
37#include <linux/workqueue.h>
38#include <linux/pci.h> 34#include <linux/pci.h>
39#include <linux/init.h>
40#include <asm/uaccess.h>
41#include "shpchp.h" 35#include "shpchp.h"
42#include "shpchprm.h"
43 36
44/* Global variables */ 37/* Global variables */
45int shpchp_debug; 38int shpchp_debug;
46int shpchp_poll_mode; 39int shpchp_poll_mode;
47int shpchp_poll_time; 40int shpchp_poll_time;
48struct controller *shpchp_ctrl_list; /* = NULL */ 41struct controller *shpchp_ctrl_list; /* = NULL */
49struct pci_func *shpchp_slot_list[256];
50 42
51#define DRIVER_VERSION "0.4" 43#define DRIVER_VERSION "0.4"
52#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>" 44#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
@@ -113,8 +105,6 @@ static int init_slots(struct controller *ctrl)
113 u32 slot_number, sun; 105 u32 slot_number, sun;
114 int result = -ENOMEM; 106 int result = -ENOMEM;
115 107
116 dbg("%s\n",__FUNCTION__);
117
118 number_of_slots = ctrl->num_slots; 108 number_of_slots = ctrl->num_slots;
119 slot_device = ctrl->slot_device_offset; 109 slot_device = ctrl->slot_device_offset;
120 slot_number = ctrl->first_slot; 110 slot_number = ctrl->first_slot;
@@ -352,6 +342,17 @@ static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_sp
352 return 0; 342 return 0;
353} 343}
354 344
345static int is_shpc_capable(struct pci_dev *dev)
346{
347 if ((dev->vendor == PCI_VENDOR_ID_AMD) || (dev->device ==
348 PCI_DEVICE_ID_AMD_GOLAM_7450))
349 return 1;
350 if (pci_find_capability(dev, PCI_CAP_ID_SHPC))
351 return 1;
352
353 return 0;
354}
355
355static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 356static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
356{ 357{
357 int rc; 358 int rc;
@@ -360,6 +361,9 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
360 int first_device_num; /* first PCI device number supported by this SHPC */ 361 int first_device_num; /* first PCI device number supported by this SHPC */
361 int num_ctlr_slots; /* number of slots supported by this SHPC */ 362 int num_ctlr_slots; /* number of slots supported by this SHPC */
362 363
364 if (!is_shpc_capable(pdev))
365 return -ENODEV;
366
363 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL); 367 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL);
364 if (!ctrl) { 368 if (!ctrl) {
365 err("%s : out of memory\n", __FUNCTION__); 369 err("%s : out of memory\n", __FUNCTION__);
@@ -367,19 +371,12 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
367 } 371 }
368 memset(ctrl, 0, sizeof(struct controller)); 372 memset(ctrl, 0, sizeof(struct controller));
369 373
370 dbg("DRV_thread pid = %d\n", current->pid); 374 rc = shpc_init(ctrl, pdev);
371
372 rc = shpc_init(ctrl, pdev,
373 (php_intr_callback_t) shpchp_handle_attention_button,
374 (php_intr_callback_t) shpchp_handle_switch_change,
375 (php_intr_callback_t) shpchp_handle_presence_change,
376 (php_intr_callback_t) shpchp_handle_power_fault);
377 if (rc) { 375 if (rc) {
378 dbg("%s: controller initialization failed\n", SHPC_MODULE_NAME); 376 dbg("%s: controller initialization failed\n", SHPC_MODULE_NAME);
379 goto err_out_free_ctrl; 377 goto err_out_free_ctrl;
380 } 378 }
381 379
382 dbg("%s: controller initialization success\n", __FUNCTION__);
383 ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */ 380 ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */
384 381
385 pci_set_drvdata(pdev, ctrl); 382 pci_set_drvdata(pdev, ctrl);
@@ -411,23 +408,8 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
411 first_device_num = ctrl->slot_device_offset; 408 first_device_num = ctrl->slot_device_offset;
412 num_ctlr_slots = ctrl->num_slots; 409 num_ctlr_slots = ctrl->num_slots;
413 410
414 /* Store PCI Config Space for all devices on this bus */ 411 ctrl->add_support = 1;
415 rc = shpchp_save_config(ctrl, ctrl->slot_bus, num_ctlr_slots, first_device_num);
416 if (rc) {
417 err("%s: unable to save PCI configuration data, error %d\n", __FUNCTION__, rc);
418 goto err_out_free_ctrl_bus;
419 }
420
421 /* Get IO, memory, and IRQ resources for new devices */
422 rc = shpchprm_find_available_resources(ctrl);
423 ctrl->add_support = !rc;
424 412
425 if (rc) {
426 dbg("shpchprm_find_available_resources = %#x\n", rc);
427 err("unable to locate PCI configuration resources for hot plug add.\n");
428 goto err_out_free_ctrl_bus;
429 }
430
431 /* Setup the slot information structures */ 413 /* Setup the slot information structures */
432 rc = init_slots(ctrl); 414 rc = init_slots(ctrl);
433 if (rc) { 415 if (rc) {
@@ -477,7 +459,6 @@ err_out_none:
477 459
478static int shpc_start_thread(void) 460static int shpc_start_thread(void)
479{ 461{
480 int loop;
481 int retval = 0; 462 int retval = 0;
482 463
483 dbg("Initialize + Start the notification/polling mechanism \n"); 464 dbg("Initialize + Start the notification/polling mechanism \n");
@@ -488,48 +469,21 @@ static int shpc_start_thread(void)
488 return retval; 469 return retval;
489 } 470 }
490 471
491 dbg("Initialize slot lists\n");
492 /* One slot list for each bus in the system */
493 for (loop = 0; loop < 256; loop++) {
494 shpchp_slot_list[loop] = NULL;
495 }
496
497 return retval; 472 return retval;
498} 473}
499 474
500static inline void __exit
501free_shpchp_res(struct pci_resource *res)
502{
503 struct pci_resource *tres;
504
505 while (res) {
506 tres = res;
507 res = res->next;
508 kfree(tres);
509 }
510}
511
512static void __exit unload_shpchpd(void) 475static void __exit unload_shpchpd(void)
513{ 476{
514 struct pci_func *next;
515 struct pci_func *TempSlot;
516 int loop;
517 struct controller *ctrl; 477 struct controller *ctrl;
518 struct controller *tctrl; 478 struct controller *tctrl;
519 479
520 ctrl = shpchp_ctrl_list; 480 ctrl = shpchp_ctrl_list;
521 481
522 while (ctrl) { 482 while (ctrl) {
483 shpchp_remove_ctrl_files(ctrl);
523 cleanup_slots(ctrl); 484 cleanup_slots(ctrl);
524 485
525 free_shpchp_res(ctrl->io_head);
526 free_shpchp_res(ctrl->mem_head);
527 free_shpchp_res(ctrl->p_mem_head);
528 free_shpchp_res(ctrl->bus_head);
529
530 kfree (ctrl->pci_bus); 486 kfree (ctrl->pci_bus);
531
532 dbg("%s: calling release_ctlr\n", __FUNCTION__);
533 ctrl->hpc_ops->release_ctlr(ctrl); 487 ctrl->hpc_ops->release_ctlr(ctrl);
534 488
535 tctrl = ctrl; 489 tctrl = ctrl;
@@ -538,20 +492,6 @@ static void __exit unload_shpchpd(void)
538 kfree(tctrl); 492 kfree(tctrl);
539 } 493 }
540 494
541 for (loop = 0; loop < 256; loop++) {
542 next = shpchp_slot_list[loop];
543 while (next != NULL) {
544 free_shpchp_res(next->io_head);
545 free_shpchp_res(next->mem_head);
546 free_shpchp_res(next->p_mem_head);
547 free_shpchp_res(next->bus_head);
548
549 TempSlot = next;
550 next = next->next;
551 kfree(TempSlot);
552 }
553 }
554
555 /* Stop the notification mechanism */ 495 /* Stop the notification mechanism */
556 shpchp_event_stop_thread(); 496 shpchp_event_stop_thread();
557 497
@@ -596,20 +536,14 @@ static int __init shpcd_init(void)
596 if (retval) 536 if (retval)
597 goto error_hpc_init; 537 goto error_hpc_init;
598 538
599 retval = shpchprm_init(PCI); 539 retval = pci_register_driver(&shpc_driver);
600 if (!retval) { 540 dbg("%s: pci_register_driver = %d\n", __FUNCTION__, retval);
601 retval = pci_register_driver(&shpc_driver); 541 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
602 dbg("%s: pci_register_driver = %d\n", __FUNCTION__, retval);
603 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
604 }
605 542
606error_hpc_init: 543error_hpc_init:
607 if (retval) { 544 if (retval) {
608 shpchprm_cleanup();
609 shpchp_event_stop_thread(); 545 shpchp_event_stop_thread();
610 } else 546 }
611 shpchprm_print_pirt();
612
613 return retval; 547 return retval;
614} 548}
615 549
@@ -618,9 +552,6 @@ static void __exit shpcd_cleanup(void)
618 dbg("unload_shpchpd()\n"); 552 dbg("unload_shpchpd()\n");
619 unload_shpchpd(); 553 unload_shpchpd();
620 554
621 shpchprm_cleanup();
622
623 dbg("pci_unregister_driver\n");
624 pci_unregister_driver(&shpc_driver); 555 pci_unregister_driver(&shpc_driver);
625 556
626 info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n"); 557 info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n");
diff --git a/drivers/pci/hotplug/shpchp_ctrl.c b/drivers/pci/hotplug/shpchp_ctrl.c
index 91c9903e621f..58619359ad08 100644
--- a/drivers/pci/hotplug/shpchp_ctrl.c
+++ b/drivers/pci/hotplug/shpchp_ctrl.c
@@ -27,24 +27,14 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/workqueue.h>
36#include <linux/interrupt.h>
37#include <linux/delay.h>
38#include <linux/wait.h>
39#include <linux/smp_lock.h> 33#include <linux/smp_lock.h>
40#include <linux/pci.h> 34#include <linux/pci.h>
35#include "../pci.h"
41#include "shpchp.h" 36#include "shpchp.h"
42#include "shpchprm.h"
43 37
44static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
45 u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
46static int configure_new_function( struct controller *ctrl, struct pci_func *func,
47 u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
48static void interrupt_event_handler(struct controller *ctrl); 38static void interrupt_event_handler(struct controller *ctrl);
49 39
50static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */ 40static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */
@@ -52,28 +42,22 @@ static struct semaphore event_exit; /* guard ensure thread has exited before ca
52static int event_finished; 42static int event_finished;
53static unsigned long pushbutton_pending; /* = 0 */ 43static unsigned long pushbutton_pending; /* = 0 */
54 44
55u8 shpchp_disk_irq;
56u8 shpchp_nic_irq;
57
58u8 shpchp_handle_attention_button(u8 hp_slot, void *inst_id) 45u8 shpchp_handle_attention_button(u8 hp_slot, void *inst_id)
59{ 46{
60 struct controller *ctrl = (struct controller *) inst_id; 47 struct controller *ctrl = (struct controller *) inst_id;
61 struct slot *p_slot; 48 struct slot *p_slot;
62 u8 rc = 0; 49 u8 rc = 0;
63 u8 getstatus; 50 u8 getstatus;
64 struct pci_func *func;
65 struct event_info *taskInfo; 51 struct event_info *taskInfo;
66 52
67 /* Attention Button Change */ 53 /* Attention Button Change */
68 dbg("shpchp: Attention button interrupt received.\n"); 54 dbg("shpchp: Attention button interrupt received.\n");
69 55
70 func = shpchp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
71
72 /* This is the structure that tells the worker thread what to do */ 56 /* This is the structure that tells the worker thread what to do */
73 taskInfo = &(ctrl->event_queue[ctrl->next_event]); 57 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
74 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 58 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
75 59
76 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); 60 p_slot->hpc_ops->get_adapter_status(p_slot, &(p_slot->presence_save));
77 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 61 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
78 62
79 ctrl->next_event = (ctrl->next_event + 1) % 10; 63 ctrl->next_event = (ctrl->next_event + 1) % 10;
@@ -118,14 +102,11 @@ u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id)
118 struct slot *p_slot; 102 struct slot *p_slot;
119 u8 rc = 0; 103 u8 rc = 0;
120 u8 getstatus; 104 u8 getstatus;
121 struct pci_func *func;
122 struct event_info *taskInfo; 105 struct event_info *taskInfo;
123 106
124 /* Switch Change */ 107 /* Switch Change */
125 dbg("shpchp: Switch interrupt received.\n"); 108 dbg("shpchp: Switch interrupt received.\n");
126 109
127 func = shpchp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
128
129 /* This is the structure that tells the worker thread 110 /* This is the structure that tells the worker thread
130 * what to do 111 * what to do
131 */ 112 */
@@ -135,19 +116,18 @@ u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id)
135 116
136 rc++; 117 rc++;
137 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 118 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
138 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); 119 p_slot->hpc_ops->get_adapter_status(p_slot, &(p_slot->presence_save));
139 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 120 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
140 dbg("%s: Card present %x Power status %x\n", __FUNCTION__, 121 dbg("%s: Card present %x Power status %x\n", __FUNCTION__,
141 func->presence_save, func->pwr_save); 122 p_slot->presence_save, p_slot->pwr_save);
142 123
143 if (getstatus) { 124 if (getstatus) {
144 /* 125 /*
145 * Switch opened 126 * Switch opened
146 */ 127 */
147 info("Latch open on Slot(%d)\n", ctrl->first_slot + hp_slot); 128 info("Latch open on Slot(%d)\n", ctrl->first_slot + hp_slot);
148 func->switch_save = 0;
149 taskInfo->event_type = INT_SWITCH_OPEN; 129 taskInfo->event_type = INT_SWITCH_OPEN;
150 if (func->pwr_save && func->presence_save) { 130 if (p_slot->pwr_save && p_slot->presence_save) {
151 taskInfo->event_type = INT_POWER_FAULT; 131 taskInfo->event_type = INT_POWER_FAULT;
152 err("Surprise Removal of card\n"); 132 err("Surprise Removal of card\n");
153 } 133 }
@@ -156,7 +136,6 @@ u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id)
156 * Switch closed 136 * Switch closed
157 */ 137 */
158 info("Latch close on Slot(%d)\n", ctrl->first_slot + hp_slot); 138 info("Latch close on Slot(%d)\n", ctrl->first_slot + hp_slot);
159 func->switch_save = 0x10;
160 taskInfo->event_type = INT_SWITCH_CLOSE; 139 taskInfo->event_type = INT_SWITCH_CLOSE;
161 } 140 }
162 141
@@ -172,14 +151,11 @@ u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id)
172 struct slot *p_slot; 151 struct slot *p_slot;
173 u8 rc = 0; 152 u8 rc = 0;
174 /*u8 temp_byte;*/ 153 /*u8 temp_byte;*/
175 struct pci_func *func;
176 struct event_info *taskInfo; 154 struct event_info *taskInfo;
177 155
178 /* Presence Change */ 156 /* Presence Change */
179 dbg("shpchp: Presence/Notify input change.\n"); 157 dbg("shpchp: Presence/Notify input change.\n");
180 158
181 func = shpchp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
182
183 /* This is the structure that tells the worker thread 159 /* This is the structure that tells the worker thread
184 * what to do 160 * what to do
185 */ 161 */
@@ -193,8 +169,8 @@ u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id)
193 /* 169 /*
194 * Save the presence state 170 * Save the presence state
195 */ 171 */
196 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); 172 p_slot->hpc_ops->get_adapter_status(p_slot, &(p_slot->presence_save));
197 if (func->presence_save) { 173 if (p_slot->presence_save) {
198 /* 174 /*
199 * Card Present 175 * Card Present
200 */ 176 */
@@ -219,14 +195,11 @@ u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id)
219 struct controller *ctrl = (struct controller *) inst_id; 195 struct controller *ctrl = (struct controller *) inst_id;
220 struct slot *p_slot; 196 struct slot *p_slot;
221 u8 rc = 0; 197 u8 rc = 0;
222 struct pci_func *func;
223 struct event_info *taskInfo; 198 struct event_info *taskInfo;
224 199
225 /* Power fault */ 200 /* Power fault */
226 dbg("shpchp: Power fault interrupt received.\n"); 201 dbg("shpchp: Power fault interrupt received.\n");
227 202
228 func = shpchp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
229
230 /* This is the structure that tells the worker thread 203 /* This is the structure that tells the worker thread
231 * what to do 204 * what to do
232 */ 205 */
@@ -242,7 +215,7 @@ u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id)
242 * Power fault Cleared 215 * Power fault Cleared
243 */ 216 */
244 info("Power fault cleared on Slot(%d)\n", ctrl->first_slot + hp_slot); 217 info("Power fault cleared on Slot(%d)\n", ctrl->first_slot + hp_slot);
245 func->status = 0x00; 218 p_slot->status = 0x00;
246 taskInfo->event_type = INT_POWER_FAULT_CLEAR; 219 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
247 } else { 220 } else {
248 /* 221 /*
@@ -251,7 +224,7 @@ u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id)
251 info("Power fault on Slot(%d)\n", ctrl->first_slot + hp_slot); 224 info("Power fault on Slot(%d)\n", ctrl->first_slot + hp_slot);
252 taskInfo->event_type = INT_POWER_FAULT; 225 taskInfo->event_type = INT_POWER_FAULT;
253 /* set power fault status for this board */ 226 /* set power fault status for this board */
254 func->status = 0xFF; 227 p_slot->status = 0xFF;
255 info("power fault bit %x set\n", hp_slot); 228 info("power fault bit %x set\n", hp_slot);
256 } 229 }
257 if (rc) 230 if (rc)
@@ -260,799 +233,13 @@ u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id)
260 return rc; 233 return rc;
261} 234}
262 235
263
264/*
265 * sort_by_size
266 *
267 * Sorts nodes on the list by their length.
268 * Smallest first.
269 *
270 */
271static int sort_by_size(struct pci_resource **head)
272{
273 struct pci_resource *current_res;
274 struct pci_resource *next_res;
275 int out_of_order = 1;
276
277 if (!(*head))
278 return(1);
279
280 if (!((*head)->next))
281 return(0);
282
283 while (out_of_order) {
284 out_of_order = 0;
285
286 /* Special case for swapping list head */
287 if (((*head)->next) &&
288 ((*head)->length > (*head)->next->length)) {
289 out_of_order++;
290 current_res = *head;
291 *head = (*head)->next;
292 current_res->next = (*head)->next;
293 (*head)->next = current_res;
294 }
295
296 current_res = *head;
297
298 while (current_res->next && current_res->next->next) {
299 if (current_res->next->length > current_res->next->next->length) {
300 out_of_order++;
301 next_res = current_res->next;
302 current_res->next = current_res->next->next;
303 current_res = current_res->next;
304 next_res->next = current_res->next;
305 current_res->next = next_res;
306 } else
307 current_res = current_res->next;
308 }
309 } /* End of out_of_order loop */
310
311 return(0);
312}
313
314
315/*
316 * sort_by_max_size
317 *
318 * Sorts nodes on the list by their length.
319 * Largest first.
320 *
321 */
322static int sort_by_max_size(struct pci_resource **head)
323{
324 struct pci_resource *current_res;
325 struct pci_resource *next_res;
326 int out_of_order = 1;
327
328 if (!(*head))
329 return(1);
330
331 if (!((*head)->next))
332 return(0);
333
334 while (out_of_order) {
335 out_of_order = 0;
336
337 /* Special case for swapping list head */
338 if (((*head)->next) &&
339 ((*head)->length < (*head)->next->length)) {
340 out_of_order++;
341 current_res = *head;
342 *head = (*head)->next;
343 current_res->next = (*head)->next;
344 (*head)->next = current_res;
345 }
346
347 current_res = *head;
348
349 while (current_res->next && current_res->next->next) {
350 if (current_res->next->length < current_res->next->next->length) {
351 out_of_order++;
352 next_res = current_res->next;
353 current_res->next = current_res->next->next;
354 current_res = current_res->next;
355 next_res->next = current_res->next;
356 current_res->next = next_res;
357 } else
358 current_res = current_res->next;
359 }
360 } /* End of out_of_order loop */
361
362 return(0);
363}
364
365
366/*
367 * do_pre_bridge_resource_split
368 *
369 * Returns zero or one node of resources that aren't in use
370 *
371 */
372static struct pci_resource *do_pre_bridge_resource_split (struct pci_resource **head, struct pci_resource **orig_head, u32 alignment)
373{
374 struct pci_resource *prevnode = NULL;
375 struct pci_resource *node;
376 struct pci_resource *split_node;
377 u32 rc;
378 u32 temp_dword;
379 dbg("do_pre_bridge_resource_split\n");
380
381 if (!(*head) || !(*orig_head))
382 return(NULL);
383
384 rc = shpchp_resource_sort_and_combine(head);
385
386 if (rc)
387 return(NULL);
388
389 if ((*head)->base != (*orig_head)->base)
390 return(NULL);
391
392 if ((*head)->length == (*orig_head)->length)
393 return(NULL);
394
395
396 /* If we got here, there the bridge requires some of the resource, but
397 * we may be able to split some off of the front
398 */
399 node = *head;
400
401 if (node->length & (alignment -1)) {
402 /* This one isn't an aligned length, so we'll make a new entry
403 * and split it up.
404 */
405 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
406
407 if (!split_node)
408 return(NULL);
409
410 temp_dword = (node->length | (alignment-1)) + 1 - alignment;
411
412 split_node->base = node->base;
413 split_node->length = temp_dword;
414
415 node->length -= temp_dword;
416 node->base += split_node->length;
417
418 /* Put it in the list */
419 *head = split_node;
420 split_node->next = node;
421 }
422
423 if (node->length < alignment) {
424 return(NULL);
425 }
426
427 /* Now unlink it */
428 if (*head == node) {
429 *head = node->next;
430 node->next = NULL;
431 } else {
432 prevnode = *head;
433 while (prevnode->next != node)
434 prevnode = prevnode->next;
435
436 prevnode->next = node->next;
437 node->next = NULL;
438 }
439
440 return(node);
441}
442
443
444/*
445 * do_bridge_resource_split
446 *
447 * Returns zero or one node of resources that aren't in use
448 *
449 */
450static struct pci_resource *do_bridge_resource_split (struct pci_resource **head, u32 alignment)
451{
452 struct pci_resource *prevnode = NULL;
453 struct pci_resource *node;
454 u32 rc;
455 u32 temp_dword;
456
457 if (!(*head))
458 return(NULL);
459
460 rc = shpchp_resource_sort_and_combine(head);
461
462 if (rc)
463 return(NULL);
464
465 node = *head;
466
467 while (node->next) {
468 prevnode = node;
469 node = node->next;
470 kfree(prevnode);
471 }
472
473 if (node->length < alignment) {
474 kfree(node);
475 return(NULL);
476 }
477
478 if (node->base & (alignment - 1)) {
479 /* Short circuit if adjusted size is too small */
480 temp_dword = (node->base | (alignment-1)) + 1;
481 if ((node->length - (temp_dword - node->base)) < alignment) {
482 kfree(node);
483 return(NULL);
484 }
485
486 node->length -= (temp_dword - node->base);
487 node->base = temp_dword;
488 }
489
490 if (node->length & (alignment - 1)) {
491 /* There's stuff in use after this node */
492 kfree(node);
493 return(NULL);
494 }
495
496 return(node);
497}
498
499
500/*
501 * get_io_resource
502 *
503 * this function sorts the resource list by size and then
504 * returns the first node of "size" length that is not in the
505 * ISA aliasing window. If it finds a node larger than "size"
506 * it will split it up.
507 *
508 * size must be a power of two.
509 */
510static struct pci_resource *get_io_resource (struct pci_resource **head, u32 size)
511{
512 struct pci_resource *prevnode;
513 struct pci_resource *node;
514 struct pci_resource *split_node = NULL;
515 u32 temp_dword;
516
517 if (!(*head))
518 return(NULL);
519
520 if ( shpchp_resource_sort_and_combine(head) )
521 return(NULL);
522
523 if ( sort_by_size(head) )
524 return(NULL);
525
526 for (node = *head; node; node = node->next) {
527 if (node->length < size)
528 continue;
529
530 if (node->base & (size - 1)) {
531 /* This one isn't base aligned properly
532 so we'll make a new entry and split it up */
533 temp_dword = (node->base | (size-1)) + 1;
534
535 /*/ Short circuit if adjusted size is too small */
536 if ((node->length - (temp_dword - node->base)) < size)
537 continue;
538
539 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
540
541 if (!split_node)
542 return(NULL);
543
544 split_node->base = node->base;
545 split_node->length = temp_dword - node->base;
546 node->base = temp_dword;
547 node->length -= split_node->length;
548
549 /* Put it in the list */
550 split_node->next = node->next;
551 node->next = split_node;
552 } /* End of non-aligned base */
553
554 /* Don't need to check if too small since we already did */
555 if (node->length > size) {
556 /* This one is longer than we need
557 so we'll make a new entry and split it up */
558 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
559
560 if (!split_node)
561 return(NULL);
562
563 split_node->base = node->base + size;
564 split_node->length = node->length - size;
565 node->length = size;
566
567 /* Put it in the list */
568 split_node->next = node->next;
569 node->next = split_node;
570 } /* End of too big on top end */
571
572 /* For IO make sure it's not in the ISA aliasing space */
573 if (node->base & 0x300L)
574 continue;
575
576 /* If we got here, then it is the right size
577 Now take it out of the list */
578 if (*head == node) {
579 *head = node->next;
580 } else {
581 prevnode = *head;
582 while (prevnode->next != node)
583 prevnode = prevnode->next;
584
585 prevnode->next = node->next;
586 }
587 node->next = NULL;
588 /* Stop looping */
589 break;
590 }
591
592 return(node);
593}
594
595
596/*
597 * get_max_resource
598 *
599 * Gets the largest node that is at least "size" big from the
600 * list pointed to by head. It aligns the node on top and bottom
601 * to "size" alignment before returning it.
602 * J.I. modified to put max size limits of; 64M->32M->16M->8M->4M->1M
603 * This is needed to avoid allocating entire ACPI _CRS res to one child bridge/slot.
604 */
605static struct pci_resource *get_max_resource (struct pci_resource **head, u32 size)
606{
607 struct pci_resource *max;
608 struct pci_resource *temp;
609 struct pci_resource *split_node;
610 u32 temp_dword;
611 u32 max_size[] = { 0x4000000, 0x2000000, 0x1000000, 0x0800000, 0x0400000, 0x0200000, 0x0100000, 0x00 };
612 int i;
613
614 if (!(*head))
615 return(NULL);
616
617 if (shpchp_resource_sort_and_combine(head))
618 return(NULL);
619
620 if (sort_by_max_size(head))
621 return(NULL);
622
623 for (max = *head;max; max = max->next) {
624
625 /* If not big enough we could probably just bail,
626 instead we'll continue to the next. */
627 if (max->length < size)
628 continue;
629
630 if (max->base & (size - 1)) {
631 /* This one isn't base aligned properly
632 so we'll make a new entry and split it up */
633 temp_dword = (max->base | (size-1)) + 1;
634
635 /* Short circuit if adjusted size is too small */
636 if ((max->length - (temp_dword - max->base)) < size)
637 continue;
638
639 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
640
641 if (!split_node)
642 return(NULL);
643
644 split_node->base = max->base;
645 split_node->length = temp_dword - max->base;
646 max->base = temp_dword;
647 max->length -= split_node->length;
648
649 /* Put it next in the list */
650 split_node->next = max->next;
651 max->next = split_node;
652 }
653
654 if ((max->base + max->length) & (size - 1)) {
655 /* This one isn't end aligned properly at the top
656 so we'll make a new entry and split it up */
657 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
658
659 if (!split_node)
660 return(NULL);
661 temp_dword = ((max->base + max->length) & ~(size - 1));
662 split_node->base = temp_dword;
663 split_node->length = max->length + max->base
664 - split_node->base;
665 max->length -= split_node->length;
666
667 /* Put it in the list */
668 split_node->next = max->next;
669 max->next = split_node;
670 }
671
672 /* Make sure it didn't shrink too much when we aligned it */
673 if (max->length < size)
674 continue;
675
676 for ( i = 0; max_size[i] > size; i++) {
677 if (max->length > max_size[i]) {
678 split_node = kmalloc(sizeof(*split_node),
679 GFP_KERNEL);
680 if (!split_node)
681 break; /* return (NULL); */
682 split_node->base = max->base + max_size[i];
683 split_node->length = max->length - max_size[i];
684 max->length = max_size[i];
685 /* Put it next in the list */
686 split_node->next = max->next;
687 max->next = split_node;
688 break;
689 }
690 }
691
692 /* Now take it out of the list */
693 temp = (struct pci_resource*) *head;
694 if (temp == max) {
695 *head = max->next;
696 } else {
697 while (temp && temp->next != max) {
698 temp = temp->next;
699 }
700
701 temp->next = max->next;
702 }
703
704 max->next = NULL;
705 return(max);
706 }
707
708 /* If we get here, we couldn't find one */
709 return(NULL);
710}
711
712
713/*
714 * get_resource
715 *
716 * this function sorts the resource list by size and then
717 * returns the first node of "size" length. If it finds a node
718 * larger than "size" it will split it up.
719 *
720 * size must be a power of two.
721 */
722static struct pci_resource *get_resource (struct pci_resource **head, u32 size)
723{
724 struct pci_resource *prevnode;
725 struct pci_resource *node;
726 struct pci_resource *split_node;
727 u32 temp_dword;
728
729 if (!(*head))
730 return(NULL);
731
732 if ( shpchp_resource_sort_and_combine(head) )
733 return(NULL);
734
735 if ( sort_by_size(head) )
736 return(NULL);
737
738 for (node = *head; node; node = node->next) {
739 dbg("%s: req_size =0x%x node=%p, base=0x%x, length=0x%x\n",
740 __FUNCTION__, size, node, node->base, node->length);
741 if (node->length < size)
742 continue;
743
744 if (node->base & (size - 1)) {
745 dbg("%s: not aligned\n", __FUNCTION__);
746 /* this one isn't base aligned properly
747 so we'll make a new entry and split it up */
748 temp_dword = (node->base | (size-1)) + 1;
749
750 /* Short circuit if adjusted size is too small */
751 if ((node->length - (temp_dword - node->base)) < size)
752 continue;
753
754 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
755
756 if (!split_node)
757 return(NULL);
758
759 split_node->base = node->base;
760 split_node->length = temp_dword - node->base;
761 node->base = temp_dword;
762 node->length -= split_node->length;
763
764 /* Put it in the list */
765 split_node->next = node->next;
766 node->next = split_node;
767 } /* End of non-aligned base */
768
769 /* Don't need to check if too small since we already did */
770 if (node->length > size) {
771 dbg("%s: too big\n", __FUNCTION__);
772 /* this one is longer than we need
773 so we'll make a new entry and split it up */
774 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
775
776 if (!split_node)
777 return(NULL);
778
779 split_node->base = node->base + size;
780 split_node->length = node->length - size;
781 node->length = size;
782
783 /* Put it in the list */
784 split_node->next = node->next;
785 node->next = split_node;
786 } /* End of too big on top end */
787
788 dbg("%s: got one!!!\n", __FUNCTION__);
789 /* If we got here, then it is the right size
790 Now take it out of the list */
791 if (*head == node) {
792 *head = node->next;
793 } else {
794 prevnode = *head;
795 while (prevnode->next != node)
796 prevnode = prevnode->next;
797
798 prevnode->next = node->next;
799 }
800 node->next = NULL;
801 /* Stop looping */
802 break;
803 }
804 return(node);
805}
806
807
808/*
809 * shpchp_resource_sort_and_combine
810 *
811 * Sorts all of the nodes in the list in ascending order by
812 * their base addresses. Also does garbage collection by
813 * combining adjacent nodes.
814 *
815 * returns 0 if success
816 */
817int shpchp_resource_sort_and_combine(struct pci_resource **head)
818{
819 struct pci_resource *node1;
820 struct pci_resource *node2;
821 int out_of_order = 1;
822
823 dbg("%s: head = %p, *head = %p\n", __FUNCTION__, head, *head);
824
825 if (!(*head))
826 return(1);
827
828 dbg("*head->next = %p\n",(*head)->next);
829
830 if (!(*head)->next)
831 return(0); /* only one item on the list, already sorted! */
832
833 dbg("*head->base = 0x%x\n",(*head)->base);
834 dbg("*head->next->base = 0x%x\n",(*head)->next->base);
835 while (out_of_order) {
836 out_of_order = 0;
837
838 /* Special case for swapping list head */
839 if (((*head)->next) &&
840 ((*head)->base > (*head)->next->base)) {
841 node1 = *head;
842 (*head) = (*head)->next;
843 node1->next = (*head)->next;
844 (*head)->next = node1;
845 out_of_order++;
846 }
847
848 node1 = (*head);
849
850 while (node1->next && node1->next->next) {
851 if (node1->next->base > node1->next->next->base) {
852 out_of_order++;
853 node2 = node1->next;
854 node1->next = node1->next->next;
855 node1 = node1->next;
856 node2->next = node1->next;
857 node1->next = node2;
858 } else
859 node1 = node1->next;
860 }
861 } /* End of out_of_order loop */
862
863 node1 = *head;
864
865 while (node1 && node1->next) {
866 if ((node1->base + node1->length) == node1->next->base) {
867 /* Combine */
868 dbg("8..\n");
869 node1->length += node1->next->length;
870 node2 = node1->next;
871 node1->next = node1->next->next;
872 kfree(node2);
873 } else
874 node1 = node1->next;
875 }
876
877 return(0);
878}
879
880
881/**
882 * shpchp_slot_create - Creates a node and adds it to the proper bus.
883 * @busnumber - bus where new node is to be located
884 *
885 * Returns pointer to the new node or NULL if unsuccessful
886 */
887struct pci_func *shpchp_slot_create(u8 busnumber)
888{
889 struct pci_func *new_slot;
890 struct pci_func *next;
891
892 new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL);
893
894 if (new_slot == NULL) {
895 return(new_slot);
896 }
897
898 memset(new_slot, 0, sizeof(struct pci_func));
899
900 new_slot->next = NULL;
901 new_slot->configured = 1;
902
903 if (shpchp_slot_list[busnumber] == NULL) {
904 shpchp_slot_list[busnumber] = new_slot;
905 } else {
906 next = shpchp_slot_list[busnumber];
907 while (next->next != NULL)
908 next = next->next;
909 next->next = new_slot;
910 }
911 return(new_slot);
912}
913
914
915/*
916 * slot_remove - Removes a node from the linked list of slots.
917 * @old_slot: slot to remove
918 *
919 * Returns 0 if successful, !0 otherwise.
920 */
921static int slot_remove(struct pci_func * old_slot)
922{
923 struct pci_func *next;
924
925 if (old_slot == NULL)
926 return(1);
927
928 next = shpchp_slot_list[old_slot->bus];
929
930 if (next == NULL) {
931 return(1);
932 }
933
934 if (next == old_slot) {
935 shpchp_slot_list[old_slot->bus] = old_slot->next;
936 shpchp_destroy_board_resources(old_slot);
937 kfree(old_slot);
938 return(0);
939 }
940
941 while ((next->next != old_slot) && (next->next != NULL)) {
942 next = next->next;
943 }
944
945 if (next->next == old_slot) {
946 next->next = old_slot->next;
947 shpchp_destroy_board_resources(old_slot);
948 kfree(old_slot);
949 return(0);
950 } else
951 return(2);
952}
953
954
955/**
956 * bridge_slot_remove - Removes a node from the linked list of slots.
957 * @bridge: bridge to remove
958 *
959 * Returns 0 if successful, !0 otherwise.
960 */
961static int bridge_slot_remove(struct pci_func *bridge)
962{
963 u8 subordinateBus, secondaryBus;
964 u8 tempBus;
965 struct pci_func *next;
966
967 if (bridge == NULL)
968 return(1);
969
970 secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
971 subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
972
973 for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
974 next = shpchp_slot_list[tempBus];
975
976 while (!slot_remove(next)) {
977 next = shpchp_slot_list[tempBus];
978 }
979 }
980
981 next = shpchp_slot_list[bridge->bus];
982
983 if (next == NULL) {
984 return(1);
985 }
986
987 if (next == bridge) {
988 shpchp_slot_list[bridge->bus] = bridge->next;
989 kfree(bridge);
990 return(0);
991 }
992
993 while ((next->next != bridge) && (next->next != NULL)) {
994 next = next->next;
995 }
996
997 if (next->next == bridge) {
998 next->next = bridge->next;
999 kfree(bridge);
1000 return(0);
1001 } else
1002 return(2);
1003}
1004
1005
1006/**
1007 * shpchp_slot_find - Looks for a node by bus, and device, multiple functions accessed
1008 * @bus: bus to find
1009 * @device: device to find
1010 * @index: is 0 for first function found, 1 for the second...
1011 *
1012 * Returns pointer to the node if successful, %NULL otherwise.
1013 */
1014struct pci_func *shpchp_slot_find(u8 bus, u8 device, u8 index)
1015{
1016 int found = -1;
1017 struct pci_func *func;
1018
1019 func = shpchp_slot_list[bus];
1020
1021 if ((func == NULL) || ((func->device == device) && (index == 0)))
1022 return(func);
1023
1024 if (func->device == device)
1025 found++;
1026
1027 while (func->next != NULL) {
1028 func = func->next;
1029
1030 if (func->device == device)
1031 found++;
1032
1033 if (found == index)
1034 return(func);
1035 }
1036
1037 return(NULL);
1038}
1039
1040static int is_bridge(struct pci_func * func)
1041{
1042 /* Check the header type */
1043 if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1044 return 1;
1045 else
1046 return 0;
1047}
1048
1049
1050/* The following routines constitute the bulk of the 236/* The following routines constitute the bulk of the
1051 hotplug controller logic 237 hotplug controller logic
1052 */ 238 */
1053static u32 change_bus_speed(struct controller *ctrl, struct slot *p_slot, enum pci_bus_speed speed) 239static int change_bus_speed(struct controller *ctrl, struct slot *p_slot,
240 enum pci_bus_speed speed)
1054{ 241{
1055 u32 rc = 0; 242 int rc = 0;
1056 243
1057 dbg("%s: change to speed %d\n", __FUNCTION__, speed); 244 dbg("%s: change to speed %d\n", __FUNCTION__, speed);
1058 down(&ctrl->crit_sect); 245 down(&ctrl->crit_sect);
@@ -1074,10 +261,11 @@ static u32 change_bus_speed(struct controller *ctrl, struct slot *p_slot, enum p
1074 return rc; 261 return rc;
1075} 262}
1076 263
1077static u32 fix_bus_speed(struct controller *ctrl, struct slot *pslot, u8 flag, 264static int fix_bus_speed(struct controller *ctrl, struct slot *pslot,
1078enum pci_bus_speed asp, enum pci_bus_speed bsp, enum pci_bus_speed msp) 265 u8 flag, enum pci_bus_speed asp, enum pci_bus_speed bsp,
266 enum pci_bus_speed msp)
1079{ 267{
1080 u32 rc = 0; 268 int rc = 0;
1081 269
1082 if (flag != 0) { /* Other slots on the same bus are occupied */ 270 if (flag != 0) { /* Other slots on the same bus are occupied */
1083 if ( asp < bsp ) { 271 if ( asp < bsp ) {
@@ -1116,23 +304,20 @@ enum pci_bus_speed asp, enum pci_bus_speed bsp, enum pci_bus_speed msp)
1116 * Configures board 304 * Configures board
1117 * 305 *
1118 */ 306 */
1119static u32 board_added(struct pci_func * func, struct controller * ctrl) 307static int board_added(struct slot *p_slot)
1120{ 308{
1121 u8 hp_slot; 309 u8 hp_slot;
1122 u8 slots_not_empty = 0; 310 u8 slots_not_empty = 0;
1123 int index; 311 int rc = 0;
1124 u32 temp_register = 0xFFFFFFFF;
1125 u32 retval, rc = 0;
1126 struct pci_func *new_func = NULL;
1127 struct slot *p_slot;
1128 struct resource_lists res_lists;
1129 enum pci_bus_speed adapter_speed, bus_speed, max_bus_speed; 312 enum pci_bus_speed adapter_speed, bus_speed, max_bus_speed;
1130 u8 pi, mode; 313 u8 pi, mode;
314 struct controller *ctrl = p_slot->ctrl;
1131 315
1132 p_slot = shpchp_find_slot(ctrl, func->device); 316 hp_slot = p_slot->device - ctrl->slot_device_offset;
1133 hp_slot = func->device - ctrl->slot_device_offset;
1134 317
1135 dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n", __FUNCTION__, func->device, ctrl->slot_device_offset, hp_slot); 318 dbg("%s: p_slot->device, slot_offset, hp_slot = %d, %d ,%d\n",
319 __FUNCTION__, p_slot->device,
320 ctrl->slot_device_offset, hp_slot);
1136 321
1137 /* Wait for exclusive access to hardware */ 322 /* Wait for exclusive access to hardware */
1138 down(&ctrl->crit_sect); 323 down(&ctrl->crit_sect);
@@ -1320,143 +505,68 @@ static u32 board_added(struct pci_func * func, struct controller * ctrl)
1320 up(&ctrl->crit_sect); 505 up(&ctrl->crit_sect);
1321 506
1322 /* Wait for ~1 second */ 507 /* Wait for ~1 second */
1323 dbg("%s: before long_delay\n", __FUNCTION__);
1324 wait_for_ctrl_irq (ctrl); 508 wait_for_ctrl_irq (ctrl);
1325 dbg("%s: after long_delay\n", __FUNCTION__);
1326 509
1327 dbg("%s: func status = %x\n", __FUNCTION__, func->status); 510 dbg("%s: slot status = %x\n", __FUNCTION__, p_slot->status);
1328 /* Check for a power fault */ 511 /* Check for a power fault */
1329 if (func->status == 0xFF) { 512 if (p_slot->status == 0xFF) {
1330 /* power fault occurred, but it was benign */ 513 /* power fault occurred, but it was benign */
1331 temp_register = 0xFFFFFFFF; 514 dbg("%s: power fault\n", __FUNCTION__);
1332 dbg("%s: temp register set to %x by power fault\n", __FUNCTION__, temp_register);
1333 rc = POWER_FAILURE; 515 rc = POWER_FAILURE;
1334 func->status = 0; 516 p_slot->status = 0;
1335 } else { 517 goto err_exit;
1336 /* Get vendor/device ID u32 */
1337 rc = pci_bus_read_config_dword (ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function),
1338 PCI_VENDOR_ID, &temp_register);
1339 dbg("%s: pci_bus_read_config_dword returns %d\n", __FUNCTION__, rc);
1340 dbg("%s: temp_register is %x\n", __FUNCTION__, temp_register);
1341
1342 if (rc != 0) {
1343 /* Something's wrong here */
1344 temp_register = 0xFFFFFFFF;
1345 dbg("%s: temp register set to %x by error\n", __FUNCTION__, temp_register);
1346 }
1347 /* Preset return code. It will be changed later if things go okay. */
1348 rc = NO_ADAPTER_PRESENT;
1349 } 518 }
1350 519
1351 /* All F's is an empty slot or an invalid board */ 520 if (shpchp_configure_device(p_slot)) {
1352 if (temp_register != 0xFFFFFFFF) { /* Check for a board in the slot */ 521 err("Cannot add device at 0x%x:0x%x\n", p_slot->bus,
1353 res_lists.io_head = ctrl->io_head; 522 p_slot->device);
1354 res_lists.mem_head = ctrl->mem_head; 523 goto err_exit;
1355 res_lists.p_mem_head = ctrl->p_mem_head; 524 }
1356 res_lists.bus_head = ctrl->bus_head;
1357 res_lists.irqs = NULL;
1358
1359 rc = configure_new_device(ctrl, func, 0, &res_lists, 0, 0);
1360 dbg("%s: back from configure_new_device\n", __FUNCTION__);
1361
1362 ctrl->io_head = res_lists.io_head;
1363 ctrl->mem_head = res_lists.mem_head;
1364 ctrl->p_mem_head = res_lists.p_mem_head;
1365 ctrl->bus_head = res_lists.bus_head;
1366
1367 shpchp_resource_sort_and_combine(&(ctrl->mem_head));
1368 shpchp_resource_sort_and_combine(&(ctrl->p_mem_head));
1369 shpchp_resource_sort_and_combine(&(ctrl->io_head));
1370 shpchp_resource_sort_and_combine(&(ctrl->bus_head));
1371
1372 if (rc) {
1373 /* Wait for exclusive access to hardware */
1374 down(&ctrl->crit_sect);
1375
1376 /* turn off slot, turn on Amber LED, turn off Green LED */
1377 retval = p_slot->hpc_ops->slot_disable(p_slot);
1378 if (retval) {
1379 err("%s: Issue of Slot Enable command failed\n", __FUNCTION__);
1380 /* Done with exclusive hardware access */
1381 up(&ctrl->crit_sect);
1382 return retval;
1383 }
1384 /* Wait for the command to complete */
1385 wait_for_ctrl_irq (ctrl);
1386
1387 retval = p_slot->hpc_ops->check_cmd_status(ctrl);
1388 if (retval) {
1389 err("%s: Failed to disable slot, error code(%d)\n", __FUNCTION__, retval);
1390 /* Done with exclusive hardware access */
1391 up(&ctrl->crit_sect);
1392 return retval;
1393 }
1394
1395 /* Done with exclusive hardware access */
1396 up(&ctrl->crit_sect);
1397 525
1398 return(rc); 526 p_slot->status = 0;
1399 } 527 p_slot->is_a_board = 0x01;
1400 shpchp_save_slot_config(ctrl, func); 528 p_slot->pwr_save = 1;
1401 529
1402 func->status = 0; 530 /* Wait for exclusive access to hardware */
1403 func->switch_save = 0x10; 531 down(&ctrl->crit_sect);
1404 func->is_a_board = 0x01;
1405 func->pwr_save = 1;
1406 532
1407 /* Next, we will instantiate the linux pci_dev structures 533 p_slot->hpc_ops->green_led_on(p_slot);
1408 * (with appropriate driver notification, if already present)
1409 */
1410 index = 0;
1411 do {
1412 new_func = shpchp_slot_find(ctrl->slot_bus, func->device, index++);
1413 if (new_func && !new_func->pci_dev) {
1414 dbg("%s:call pci_hp_configure_dev\n", __FUNCTION__);
1415 shpchp_configure_device(ctrl, new_func);
1416 }
1417 } while (new_func);
1418 534
1419 /* Wait for exclusive access to hardware */ 535 /* Wait for the command to complete */
1420 down(&ctrl->crit_sect); 536 wait_for_ctrl_irq (ctrl);
1421 537
1422 p_slot->hpc_ops->green_led_on(p_slot); 538 /* Done with exclusive hardware access */
539 up(&ctrl->crit_sect);
1423 540
1424 /* Wait for the command to complete */ 541 return 0;
1425 wait_for_ctrl_irq (ctrl);
1426 542
543err_exit:
544 /* Wait for exclusive access to hardware */
545 down(&ctrl->crit_sect);
1427 546
547 /* turn off slot, turn on Amber LED, turn off Green LED */
548 rc = p_slot->hpc_ops->slot_disable(p_slot);
549 if (rc) {
550 err("%s: Issue of Slot Disable command failed\n", __FUNCTION__);
1428 /* Done with exclusive hardware access */ 551 /* Done with exclusive hardware access */
1429 up(&ctrl->crit_sect); 552 up(&ctrl->crit_sect);
553 return rc;
554 }
555 /* Wait for the command to complete */
556 wait_for_ctrl_irq (ctrl);
1430 557
1431 } else { 558 rc = p_slot->hpc_ops->check_cmd_status(ctrl);
1432 /* Wait for exclusive access to hardware */ 559 if (rc) {
1433 down(&ctrl->crit_sect); 560 err("%s: Failed to disable slot, error code(%d)\n", __FUNCTION__, rc);
1434
1435 /* turn off slot, turn on Amber LED, turn off Green LED */
1436 rc = p_slot->hpc_ops->slot_disable(p_slot);
1437 if (rc) {
1438 err("%s: Issue of Slot Disable command failed\n", __FUNCTION__);
1439 /* Done with exclusive hardware access */
1440 up(&ctrl->crit_sect);
1441 return rc;
1442 }
1443 /* Wait for the command to complete */
1444 wait_for_ctrl_irq (ctrl);
1445
1446 rc = p_slot->hpc_ops->check_cmd_status(ctrl);
1447 if (rc) {
1448 err("%s: Failed to disable slot, error code(%d)\n", __FUNCTION__, rc);
1449 /* Done with exclusive hardware access */
1450 up(&ctrl->crit_sect);
1451 return rc;
1452 }
1453
1454 /* Done with exclusive hardware access */ 561 /* Done with exclusive hardware access */
1455 up(&ctrl->crit_sect); 562 up(&ctrl->crit_sect);
1456 563 return rc;
1457 return(rc);
1458 } 564 }
1459 return 0; 565
566 /* Done with exclusive hardware access */
567 up(&ctrl->crit_sect);
568
569 return(rc);
1460} 570}
1461 571
1462 572
@@ -1464,55 +574,23 @@ static u32 board_added(struct pci_func * func, struct controller * ctrl)
1464 * remove_board - Turns off slot and LED's 574 * remove_board - Turns off slot and LED's
1465 * 575 *
1466 */ 576 */
1467static u32 remove_board(struct pci_func *func, struct controller *ctrl) 577static int remove_board(struct slot *p_slot)
1468{ 578{
1469 int index; 579 struct controller *ctrl = p_slot->ctrl;
1470 u8 skip = 0;
1471 u8 device;
1472 u8 hp_slot; 580 u8 hp_slot;
1473 u32 rc; 581 int rc;
1474 struct resource_lists res_lists;
1475 struct pci_func *temp_func;
1476 struct slot *p_slot;
1477
1478 if (func == NULL)
1479 return(1);
1480 582
1481 if (shpchp_unconfigure_device(func)) 583 if (shpchp_unconfigure_device(p_slot))
1482 return(1); 584 return(1);
1483 585
1484 device = func->device; 586 hp_slot = p_slot->device - ctrl->slot_device_offset;
1485
1486 hp_slot = func->device - ctrl->slot_device_offset;
1487 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 587 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1488 588
1489 dbg("In %s, hp_slot = %d\n", __FUNCTION__, hp_slot); 589 dbg("In %s, hp_slot = %d\n", __FUNCTION__, hp_slot);
1490 590
1491 if ((ctrl->add_support) &&
1492 !(func->bus_head || func->mem_head || func->p_mem_head || func->io_head)) {
1493 /* Here we check to see if we've saved any of the board's
1494 * resources already. If so, we'll skip the attempt to
1495 * determine what's being used.
1496 */
1497 index = 0;
1498
1499 temp_func = func;
1500
1501 while ((temp_func = shpchp_slot_find(temp_func->bus, temp_func->device, index++))) {
1502 if (temp_func->bus_head || temp_func->mem_head
1503 || temp_func->p_mem_head || temp_func->io_head) {
1504 skip = 1;
1505 break;
1506 }
1507 }
1508
1509 if (!skip)
1510 rc = shpchp_save_used_resources(ctrl, func, DISABLE_CARD);
1511 }
1512 /* Change status to shutdown */ 591 /* Change status to shutdown */
1513 if (func->is_a_board) 592 if (p_slot->is_a_board)
1514 func->status = 0x01; 593 p_slot->status = 0x01;
1515 func->configured = 0;
1516 594
1517 /* Wait for exclusive access to hardware */ 595 /* Wait for exclusive access to hardware */
1518 down(&ctrl->crit_sect); 596 down(&ctrl->crit_sect);
@@ -1549,55 +627,8 @@ static u32 remove_board(struct pci_func *func, struct controller *ctrl)
1549 /* Done with exclusive hardware access */ 627 /* Done with exclusive hardware access */
1550 up(&ctrl->crit_sect); 628 up(&ctrl->crit_sect);
1551 629
1552 if (ctrl->add_support) { 630 p_slot->pwr_save = 0;
1553 while (func) { 631 p_slot->is_a_board = 0;
1554 res_lists.io_head = ctrl->io_head;
1555 res_lists.mem_head = ctrl->mem_head;
1556 res_lists.p_mem_head = ctrl->p_mem_head;
1557 res_lists.bus_head = ctrl->bus_head;
1558
1559 dbg("Returning resources to ctlr lists for (B/D/F) = (%#x/%#x/%#x)\n", func->bus,
1560 func->device, func->function);
1561
1562 shpchp_return_board_resources(func, &res_lists);
1563
1564 ctrl->io_head = res_lists.io_head;
1565 ctrl->mem_head = res_lists.mem_head;
1566 ctrl->p_mem_head = res_lists.p_mem_head;
1567 ctrl->bus_head = res_lists.bus_head;
1568
1569 shpchp_resource_sort_and_combine(&(ctrl->mem_head));
1570 shpchp_resource_sort_and_combine(&(ctrl->p_mem_head));
1571 shpchp_resource_sort_and_combine(&(ctrl->io_head));
1572 shpchp_resource_sort_and_combine(&(ctrl->bus_head));
1573
1574 if (is_bridge(func)) {
1575 dbg("PCI Bridge Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus,
1576 func->device, func->function);
1577 bridge_slot_remove(func);
1578 } else
1579 dbg("PCI Function Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus,
1580 func->device, func->function);
1581 slot_remove(func);
1582
1583 func = shpchp_slot_find(ctrl->slot_bus, device, 0);
1584 }
1585
1586 /* Setup slot structure with entry for empty slot */
1587 func = shpchp_slot_create(ctrl->slot_bus);
1588
1589 if (func == NULL) {
1590 return(1);
1591 }
1592
1593 func->bus = ctrl->slot_bus;
1594 func->device = device;
1595 func->function = 0;
1596 func->configured = 0;
1597 func->switch_save = 0x10;
1598 func->pwr_save = 0;
1599 func->is_a_board = 0;
1600 }
1601 632
1602 return 0; 633 return 0;
1603} 634}
@@ -1633,13 +664,11 @@ static void shpchp_pushbutton_thread (unsigned long slot)
1633 p_slot->hpc_ops->get_power_status(p_slot, &getstatus); 664 p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1634 if (getstatus) { 665 if (getstatus) {
1635 p_slot->state = POWEROFF_STATE; 666 p_slot->state = POWEROFF_STATE;
1636 dbg("In power_down_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
1637 667
1638 shpchp_disable_slot(p_slot); 668 shpchp_disable_slot(p_slot);
1639 p_slot->state = STATIC_STATE; 669 p_slot->state = STATIC_STATE;
1640 } else { 670 } else {
1641 p_slot->state = POWERON_STATE; 671 p_slot->state = POWERON_STATE;
1642 dbg("In add_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
1643 672
1644 if (shpchp_enable_slot(p_slot)) { 673 if (shpchp_enable_slot(p_slot)) {
1645 /* Wait for exclusive access to hardware */ 674 /* Wait for exclusive access to hardware */
@@ -1701,7 +730,6 @@ int shpchp_event_start_thread (void)
1701 err ("Can't start up our event thread\n"); 730 err ("Can't start up our event thread\n");
1702 return -1; 731 return -1;
1703 } 732 }
1704 dbg("Our event thread pid = %d\n", pid);
1705 return 0; 733 return 0;
1706} 734}
1707 735
@@ -1709,9 +737,7 @@ int shpchp_event_start_thread (void)
1709void shpchp_event_stop_thread (void) 737void shpchp_event_stop_thread (void)
1710{ 738{
1711 event_finished = 1; 739 event_finished = 1;
1712 dbg("event_thread finish command given\n");
1713 up(&event_semaphore); 740 up(&event_semaphore);
1714 dbg("wait for event_thread to exit\n");
1715 down(&event_exit); 741 down(&event_exit);
1716} 742}
1717 743
@@ -1739,12 +765,10 @@ static void interrupt_event_handler(struct controller *ctrl)
1739{ 765{
1740 int loop = 0; 766 int loop = 0;
1741 int change = 1; 767 int change = 1;
1742 struct pci_func *func;
1743 u8 hp_slot; 768 u8 hp_slot;
1744 u8 getstatus; 769 u8 getstatus;
1745 struct slot *p_slot; 770 struct slot *p_slot;
1746 771
1747 dbg("%s:\n", __FUNCTION__);
1748 while (change) { 772 while (change) {
1749 change = 0; 773 change = 0;
1750 774
@@ -1754,12 +778,8 @@ static void interrupt_event_handler(struct controller *ctrl)
1754 ctrl->event_queue[loop].event_type); 778 ctrl->event_queue[loop].event_type);
1755 hp_slot = ctrl->event_queue[loop].hp_slot; 779 hp_slot = ctrl->event_queue[loop].hp_slot;
1756 780
1757 func = shpchp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
1758
1759 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 781 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1760 782
1761 dbg("%s: hp_slot %d, func %p, p_slot %p\n", __FUNCTION__, hp_slot, func, p_slot);
1762
1763 if (ctrl->event_queue[loop].event_type == INT_BUTTON_CANCEL) { 783 if (ctrl->event_queue[loop].event_type == INT_BUTTON_CANCEL) {
1764 dbg("%s: button cancel\n", __FUNCTION__); 784 dbg("%s: button cancel\n", __FUNCTION__);
1765 del_timer(&p_slot->task_event); 785 del_timer(&p_slot->task_event);
@@ -1880,13 +900,6 @@ int shpchp_enable_slot (struct slot *p_slot)
1880{ 900{
1881 u8 getstatus = 0; 901 u8 getstatus = 0;
1882 int rc; 902 int rc;
1883 struct pci_func *func;
1884
1885 func = shpchp_slot_find(p_slot->bus, p_slot->device, 0);
1886 if (!func) {
1887 dbg("%s: Error! slot NULL\n", __FUNCTION__);
1888 return -ENODEV;
1889 }
1890 903
1891 /* Check to see if (latch closed, card present, power off) */ 904 /* Check to see if (latch closed, card present, power off) */
1892 down(&p_slot->ctrl->crit_sect); 905 down(&p_slot->ctrl->crit_sect);
@@ -1910,72 +923,34 @@ int shpchp_enable_slot (struct slot *p_slot)
1910 } 923 }
1911 up(&p_slot->ctrl->crit_sect); 924 up(&p_slot->ctrl->crit_sect);
1912 925
1913 slot_remove(func); 926 p_slot->is_a_board = 1;
1914
1915 func = shpchp_slot_create(p_slot->bus);
1916 if (func == NULL)
1917 return -ENOMEM;
1918
1919 func->bus = p_slot->bus;
1920 func->device = p_slot->device;
1921 func->function = 0;
1922 func->configured = 0;
1923 func->is_a_board = 1;
1924 927
1925 /* We have to save the presence info for these slots */ 928 /* We have to save the presence info for these slots */
1926 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); 929 p_slot->hpc_ops->get_adapter_status(p_slot, &(p_slot->presence_save));
1927 p_slot->hpc_ops->get_power_status(p_slot, &(func->pwr_save)); 930 p_slot->hpc_ops->get_power_status(p_slot, &(p_slot->pwr_save));
1928 dbg("%s: func->pwr_save %x\n", __FUNCTION__, func->pwr_save); 931 dbg("%s: p_slot->pwr_save %x\n", __FUNCTION__, p_slot->pwr_save);
1929 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 932 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1930 func->switch_save = !getstatus? 0x10:0;
1931 933
1932 rc = board_added(func, p_slot->ctrl); 934 rc = board_added(p_slot);
1933 if (rc) { 935 if (rc) {
1934 if (is_bridge(func)) 936 p_slot->hpc_ops->get_adapter_status(p_slot,
1935 bridge_slot_remove(func); 937 &(p_slot->presence_save));
1936 else
1937 slot_remove(func);
1938
1939 /* Setup slot structure with entry for empty slot */
1940 func = shpchp_slot_create(p_slot->bus);
1941 if (func == NULL)
1942 return -ENOMEM; /* Out of memory */
1943
1944 func->bus = p_slot->bus;
1945 func->device = p_slot->device;
1946 func->function = 0;
1947 func->configured = 0;
1948 func->is_a_board = 1;
1949
1950 /* We have to save the presence info for these slots */
1951 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
1952 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 938 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1953 func->switch_save = !getstatus? 0x10:0;
1954 } 939 }
1955 940
1956 if (p_slot) 941 update_slot_info(p_slot);
1957 update_slot_info(p_slot);
1958
1959 return rc; 942 return rc;
1960} 943}
1961 944
1962 945
1963int shpchp_disable_slot (struct slot *p_slot) 946int shpchp_disable_slot (struct slot *p_slot)
1964{ 947{
1965 u8 class_code, header_type, BCR;
1966 u8 index = 0;
1967 u8 getstatus = 0; 948 u8 getstatus = 0;
1968 u32 rc = 0;
1969 int ret = 0; 949 int ret = 0;
1970 unsigned int devfn;
1971 struct pci_bus *pci_bus;
1972 struct pci_func *func;
1973 950
1974 if (!p_slot->ctrl) 951 if (!p_slot->ctrl)
1975 return -ENODEV; 952 return -ENODEV;
1976 953
1977 pci_bus = p_slot->ctrl->pci_dev->subordinate;
1978
1979 /* Check to see if (latch closed, card present, power on) */ 954 /* Check to see if (latch closed, card present, power on) */
1980 down(&p_slot->ctrl->crit_sect); 955 down(&p_slot->ctrl->crit_sect);
1981 956
@@ -1999,849 +974,8 @@ int shpchp_disable_slot (struct slot *p_slot)
1999 } 974 }
2000 up(&p_slot->ctrl->crit_sect); 975 up(&p_slot->ctrl->crit_sect);
2001 976
2002 func = shpchp_slot_find(p_slot->bus, p_slot->device, index++); 977 ret = remove_board(p_slot);
2003 978 update_slot_info(p_slot);
2004 /* Make sure there are no video controllers here 979 return ret;
2005 * for all func of p_slot
2006 */
2007 while (func && !rc) {
2008 pci_bus->number = func->bus;
2009 devfn = PCI_DEVFN(func->device, func->function);
2010
2011 /* Check the Class Code */
2012 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2013 if (rc)
2014 return -ENODEV;
2015
2016 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2017 /* Display/Video adapter (not supported) */
2018 rc = REMOVE_NOT_SUPPORTED;
2019 } else {
2020 /* See if it's a bridge */
2021 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
2022 if (rc)
2023 return -ENODEV;
2024
2025 /* If it's a bridge, check the VGA Enable bit */
2026 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2027 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
2028 if (rc)
2029 return -ENODEV;
2030
2031 /* If the VGA Enable bit is set, remove isn't supported */
2032 if (BCR & PCI_BRIDGE_CTL_VGA) {
2033 rc = REMOVE_NOT_SUPPORTED;
2034 }
2035 }
2036 }
2037
2038 func = shpchp_slot_find(p_slot->bus, p_slot->device, index++);
2039 }
2040
2041 func = shpchp_slot_find(p_slot->bus, p_slot->device, 0);
2042 if ((func != NULL) && !rc) {
2043 rc = remove_board(func, p_slot->ctrl);
2044 } else if (!rc)
2045 rc = -ENODEV;
2046
2047 if (p_slot)
2048 update_slot_info(p_slot);
2049
2050 return rc;
2051}
2052
2053
2054/**
2055 * configure_new_device - Configures the PCI header information of one board.
2056 *
2057 * @ctrl: pointer to controller structure
2058 * @func: pointer to function structure
2059 * @behind_bridge: 1 if this is a recursive call, 0 if not
2060 * @resources: pointer to set of resource lists
2061 *
2062 * Returns 0 if success
2063 *
2064 */
2065static u32 configure_new_device (struct controller * ctrl, struct pci_func * func,
2066 u8 behind_bridge, struct resource_lists * resources, u8 bridge_bus, u8 bridge_dev)
2067{
2068 u8 temp_byte, function, max_functions, stop_it;
2069 int rc;
2070 u32 ID;
2071 struct pci_func *new_slot;
2072 struct pci_bus lpci_bus, *pci_bus;
2073 int index;
2074
2075 new_slot = func;
2076
2077 dbg("%s\n", __FUNCTION__);
2078 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
2079 pci_bus = &lpci_bus;
2080 pci_bus->number = func->bus;
2081
2082 /* Check for Multi-function device */
2083 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
2084 if (rc) {
2085 dbg("%s: rc = %d\n", __FUNCTION__, rc);
2086 return rc;
2087 }
2088
2089 if (temp_byte & 0x80) /* Multi-function device */
2090 max_functions = 8;
2091 else
2092 max_functions = 1;
2093
2094 function = 0;
2095
2096 do {
2097 rc = configure_new_function(ctrl, new_slot, behind_bridge, resources, bridge_bus, bridge_dev);
2098
2099 if (rc) {
2100 dbg("configure_new_function failed %d\n",rc);
2101 index = 0;
2102
2103 while (new_slot) {
2104 new_slot = shpchp_slot_find(new_slot->bus, new_slot->device, index++);
2105
2106 if (new_slot)
2107 shpchp_return_board_resources(new_slot, resources);
2108 }
2109
2110 return(rc);
2111 }
2112
2113 function++;
2114
2115 stop_it = 0;
2116
2117 /* The following loop skips to the next present function
2118 * and creates a board structure
2119 */
2120
2121 while ((function < max_functions) && (!stop_it)) {
2122 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
2123
2124 if (ID == 0xFFFFFFFF) { /* There's nothing there. */
2125 function++;
2126 } else { /* There's something there */
2127 /* Setup slot structure. */
2128 new_slot = shpchp_slot_create(func->bus);
2129
2130 if (new_slot == NULL) {
2131 /* Out of memory */
2132 return(1);
2133 }
2134
2135 new_slot->bus = func->bus;
2136 new_slot->device = func->device;
2137 new_slot->function = function;
2138 new_slot->is_a_board = 1;
2139 new_slot->status = 0;
2140
2141 stop_it++;
2142 }
2143 }
2144
2145 } while (function < max_functions);
2146 dbg("returning from configure_new_device\n");
2147
2148 return 0;
2149}
2150
2151
2152/*
2153 * Configuration logic that involves the hotplug data structures and
2154 * their bookkeeping
2155 */
2156
2157
2158/**
2159 * configure_new_function - Configures the PCI header information of one device
2160 *
2161 * @ctrl: pointer to controller structure
2162 * @func: pointer to function structure
2163 * @behind_bridge: 1 if this is a recursive call, 0 if not
2164 * @resources: pointer to set of resource lists
2165 *
2166 * Calls itself recursively for bridged devices.
2167 * Returns 0 if success
2168 *
2169 */
2170static int configure_new_function (struct controller * ctrl, struct pci_func * func,
2171 u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev)
2172{
2173 int cloop;
2174 u8 temp_byte;
2175 u8 device;
2176 u8 class_code;
2177 u16 temp_word;
2178 u32 rc;
2179 u32 temp_register;
2180 u32 base;
2181 u32 ID;
2182 unsigned int devfn;
2183 struct pci_resource *mem_node;
2184 struct pci_resource *p_mem_node;
2185 struct pci_resource *io_node;
2186 struct pci_resource *bus_node;
2187 struct pci_resource *hold_mem_node;
2188 struct pci_resource *hold_p_mem_node;
2189 struct pci_resource *hold_IO_node;
2190 struct pci_resource *hold_bus_node;
2191 struct irq_mapping irqs;
2192 struct pci_func *new_slot;
2193 struct pci_bus lpci_bus, *pci_bus;
2194 struct resource_lists temp_resources;
2195#if defined(CONFIG_X86_64)
2196 u8 IRQ=0;
2197#endif
2198
2199 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
2200 pci_bus = &lpci_bus;
2201 pci_bus->number = func->bus;
2202 devfn = PCI_DEVFN(func->device, func->function);
2203
2204 /* Check for Bridge */
2205 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2206 if (rc)
2207 return rc;
2208
2209 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
2210 /* set Primary bus */
2211 dbg("set Primary bus = 0x%x\n", func->bus);
2212 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
2213 if (rc)
2214 return rc;
2215
2216 /* find range of busses to use */
2217 bus_node = get_max_resource(&resources->bus_head, 1L);
2218
2219 /* If we don't have any busses to allocate, we can't continue */
2220 if (!bus_node) {
2221 err("Got NO bus resource to use\n");
2222 return -ENOMEM;
2223 }
2224 dbg("Got ranges of buses to use: base:len=0x%x:%x\n", bus_node->base, bus_node->length);
2225
2226 /* set Secondary bus */
2227 temp_byte = (u8)bus_node->base;
2228 dbg("set Secondary bus = 0x%x\n", temp_byte);
2229 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2230 if (rc)
2231 return rc;
2232
2233 /* set subordinate bus */
2234 temp_byte = (u8)(bus_node->base + bus_node->length - 1);
2235 dbg("set subordinate bus = 0x%x\n", temp_byte);
2236 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2237 if (rc)
2238 return rc;
2239
2240 /* Set HP parameters (Cache Line Size, Latency Timer) */
2241 rc = shpchprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
2242 if (rc)
2243 return rc;
2244
2245 /* Setup the IO, memory, and prefetchable windows */
2246
2247 io_node = get_max_resource(&(resources->io_head), 0x1000L);
2248 if (io_node) {
2249 dbg("io_node(base, len, next) (%x, %x, %p)\n", io_node->base, io_node->length, io_node->next);
2250 }
2251
2252 mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
2253 if (mem_node) {
2254 dbg("mem_node(base, len, next) (%x, %x, %p)\n", mem_node->base, mem_node->length, mem_node->next);
2255 }
2256
2257 if (resources->p_mem_head)
2258 p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000L);
2259 else {
2260 /*
2261 * In some platform implementation, MEM and PMEM are not
2262 * distinguished, and hence ACPI _CRS has only MEM entries
2263 * for both MEM and PMEM.
2264 */
2265 dbg("using MEM for PMEM\n");
2266 p_mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
2267 }
2268 if (p_mem_node) {
2269 dbg("p_mem_node(base, len, next) (%x, %x, %p)\n", p_mem_node->base, p_mem_node->length, p_mem_node->next);
2270 }
2271
2272 /* set up the IRQ info */
2273 if (!resources->irqs) {
2274 irqs.barber_pole = 0;
2275 irqs.interrupt[0] = 0;
2276 irqs.interrupt[1] = 0;
2277 irqs.interrupt[2] = 0;
2278 irqs.interrupt[3] = 0;
2279 irqs.valid_INT = 0;
2280 } else {
2281 irqs.barber_pole = resources->irqs->barber_pole;
2282 irqs.interrupt[0] = resources->irqs->interrupt[0];
2283 irqs.interrupt[1] = resources->irqs->interrupt[1];
2284 irqs.interrupt[2] = resources->irqs->interrupt[2];
2285 irqs.interrupt[3] = resources->irqs->interrupt[3];
2286 irqs.valid_INT = resources->irqs->valid_INT;
2287 }
2288
2289 /* set up resource lists that are now aligned on top and bottom
2290 * for anything behind the bridge.
2291 */
2292 temp_resources.bus_head = bus_node;
2293 temp_resources.io_head = io_node;
2294 temp_resources.mem_head = mem_node;
2295 temp_resources.p_mem_head = p_mem_node;
2296 temp_resources.irqs = &irqs;
2297
2298 /* Make copies of the nodes we are going to pass down so that
2299 * if there is a problem,we can just use these to free resources
2300 */
2301 hold_bus_node = kmalloc(sizeof(*hold_bus_node), GFP_KERNEL);
2302 hold_IO_node = kmalloc(sizeof(*hold_IO_node), GFP_KERNEL);
2303 hold_mem_node = kmalloc(sizeof(*hold_mem_node), GFP_KERNEL);
2304 hold_p_mem_node = kmalloc(sizeof(*hold_p_mem_node), GFP_KERNEL);
2305
2306 if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2307 kfree(hold_bus_node);
2308 kfree(hold_IO_node);
2309 kfree(hold_mem_node);
2310 kfree(hold_p_mem_node);
2311
2312 return 1;
2313 }
2314
2315 memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2316
2317 bus_node->base += 1;
2318 bus_node->length -= 1;
2319 bus_node->next = NULL;
2320
2321 /* If we have IO resources copy them and fill in the bridge's
2322 * IO range registers
2323 */
2324 if (io_node) {
2325 memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2326 io_node->next = NULL;
2327
2328 /* set IO base and Limit registers */
2329 RES_CHECK(io_node->base, 8);
2330 temp_byte = (u8)(io_node->base >> 8);
2331 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2332
2333 RES_CHECK(io_node->base + io_node->length - 1, 8);
2334 temp_byte = (u8)((io_node->base + io_node->length - 1) >> 8);
2335 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2336 } else {
2337 kfree(hold_IO_node);
2338 hold_IO_node = NULL;
2339 }
2340
2341 /* If we have memory resources copy them and fill in the bridge's
2342 * memory range registers. Otherwise, fill in the range
2343 * registers with values that disable them.
2344 */
2345 if (mem_node) {
2346 memcpy(hold_mem_node, mem_node, sizeof(struct pci_resource));
2347 mem_node->next = NULL;
2348
2349 /* set Mem base and Limit registers */
2350 RES_CHECK(mem_node->base, 16);
2351 temp_word = (u32)(mem_node->base >> 16);
2352 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2353
2354 RES_CHECK(mem_node->base + mem_node->length - 1, 16);
2355 temp_word = (u32)((mem_node->base + mem_node->length - 1) >> 16);
2356 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2357 } else {
2358 temp_word = 0xFFFF;
2359 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2360
2361 temp_word = 0x0000;
2362 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2363
2364 kfree(hold_mem_node);
2365 hold_mem_node = NULL;
2366 }
2367
2368 /* If we have prefetchable memory resources copy them and
2369 * fill in the bridge's memory range registers. Otherwise,
2370 * fill in the range registers with values that disable them.
2371 */
2372 if (p_mem_node) {
2373 memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource));
2374 p_mem_node->next = NULL;
2375
2376 /* set Pre Mem base and Limit registers */
2377 RES_CHECK(p_mem_node->base, 16);
2378 temp_word = (u32)(p_mem_node->base >> 16);
2379 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2380
2381 RES_CHECK(p_mem_node->base + p_mem_node->length - 1, 16);
2382 temp_word = (u32)((p_mem_node->base + p_mem_node->length - 1) >> 16);
2383 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2384 } else {
2385 temp_word = 0xFFFF;
2386 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2387
2388 temp_word = 0x0000;
2389 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2390
2391 kfree(hold_p_mem_node);
2392 hold_p_mem_node = NULL;
2393 }
2394
2395 /* Adjust this to compensate for extra adjustment in first loop */
2396 irqs.barber_pole--;
2397
2398 rc = 0;
2399
2400 /* Here we actually find the devices and configure them */
2401 for (device = 0; (device <= 0x1F) && !rc; device++) {
2402 irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2403
2404 ID = 0xFFFFFFFF;
2405 pci_bus->number = hold_bus_node->base;
2406 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0),
2407 PCI_VENDOR_ID, &ID);
2408 pci_bus->number = func->bus;
2409
2410 if (ID != 0xFFFFFFFF) { /* device Present */
2411 /* Setup slot structure. */
2412 new_slot = shpchp_slot_create(hold_bus_node->base);
2413
2414 if (new_slot == NULL) {
2415 /* Out of memory */
2416 rc = -ENOMEM;
2417 continue;
2418 }
2419
2420 new_slot->bus = hold_bus_node->base;
2421 new_slot->device = device;
2422 new_slot->function = 0;
2423 new_slot->is_a_board = 1;
2424 new_slot->status = 0;
2425
2426 rc = configure_new_device(ctrl, new_slot, 1, &temp_resources, func->bus, func->device);
2427 dbg("configure_new_device rc=0x%x\n",rc);
2428 } /* End of IF (device in slot?) */
2429 } /* End of FOR loop */
2430
2431 if (rc) {
2432 shpchp_destroy_resource_list(&temp_resources);
2433
2434 return_resource(&(resources->bus_head), hold_bus_node);
2435 return_resource(&(resources->io_head), hold_IO_node);
2436 return_resource(&(resources->mem_head), hold_mem_node);
2437 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2438 return(rc);
2439 }
2440
2441 /* save the interrupt routing information */
2442 if (resources->irqs) {
2443 resources->irqs->interrupt[0] = irqs.interrupt[0];
2444 resources->irqs->interrupt[1] = irqs.interrupt[1];
2445 resources->irqs->interrupt[2] = irqs.interrupt[2];
2446 resources->irqs->interrupt[3] = irqs.interrupt[3];
2447 resources->irqs->valid_INT = irqs.valid_INT;
2448 } else if (!behind_bridge) {
2449 /* We need to hook up the interrupts here */
2450 for (cloop = 0; cloop < 4; cloop++) {
2451 if (irqs.valid_INT & (0x01 << cloop)) {
2452 rc = shpchp_set_irq(func->bus, func->device,
2453 0x0A + cloop, irqs.interrupt[cloop]);
2454 if (rc) {
2455 shpchp_destroy_resource_list (&temp_resources);
2456 return_resource(&(resources->bus_head), hold_bus_node);
2457 return_resource(&(resources->io_head), hold_IO_node);
2458 return_resource(&(resources->mem_head), hold_mem_node);
2459 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2460 return rc;
2461 }
2462 }
2463 } /* end of for loop */
2464 }
2465
2466 /* Return unused bus resources
2467 * First use the temporary node to store information for the board
2468 */
2469 if (hold_bus_node && bus_node && temp_resources.bus_head) {
2470 hold_bus_node->length = bus_node->base - hold_bus_node->base;
2471
2472 hold_bus_node->next = func->bus_head;
2473 func->bus_head = hold_bus_node;
2474
2475 temp_byte = (u8)(temp_resources.bus_head->base - 1);
2476
2477 /* set subordinate bus */
2478 dbg("re-set subordinate bus = 0x%x\n", temp_byte);
2479 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2480
2481 if (temp_resources.bus_head->length == 0) {
2482 kfree(temp_resources.bus_head);
2483 temp_resources.bus_head = NULL;
2484 } else {
2485 dbg("return bus res of b:d(0x%x:%x) base:len(0x%x:%x)\n",
2486 func->bus, func->device, temp_resources.bus_head->base, temp_resources.bus_head->length);
2487 return_resource(&(resources->bus_head), temp_resources.bus_head);
2488 }
2489 }
2490
2491 /* If we have IO space available and there is some left,
2492 * return the unused portion
2493 */
2494 if (hold_IO_node && temp_resources.io_head) {
2495 io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2496 &hold_IO_node, 0x1000);
2497
2498 /* Check if we were able to split something off */
2499 if (io_node) {
2500 hold_IO_node->base = io_node->base + io_node->length;
2501
2502 RES_CHECK(hold_IO_node->base, 8);
2503 temp_byte = (u8)((hold_IO_node->base) >> 8);
2504 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
2505
2506 return_resource(&(resources->io_head), io_node);
2507 }
2508
2509 io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2510
2511 /* Check if we were able to split something off */
2512 if (io_node) {
2513 /* First use the temporary node to store information for the board */
2514 hold_IO_node->length = io_node->base - hold_IO_node->base;
2515
2516 /* If we used any, add it to the board's list */
2517 if (hold_IO_node->length) {
2518 hold_IO_node->next = func->io_head;
2519 func->io_head = hold_IO_node;
2520
2521 RES_CHECK(io_node->base - 1, 8);
2522 temp_byte = (u8)((io_node->base - 1) >> 8);
2523 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2524
2525 return_resource(&(resources->io_head), io_node);
2526 } else {
2527 /* it doesn't need any IO */
2528 temp_byte = 0x00;
2529 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2530
2531 return_resource(&(resources->io_head), io_node);
2532 kfree(hold_IO_node);
2533 }
2534 } else {
2535 /* it used most of the range */
2536 hold_IO_node->next = func->io_head;
2537 func->io_head = hold_IO_node;
2538 }
2539 } else if (hold_IO_node) {
2540 /* it used the whole range */
2541 hold_IO_node->next = func->io_head;
2542 func->io_head = hold_IO_node;
2543 }
2544
2545 /* If we have memory space available and there is some left,
2546 * return the unused portion
2547 */
2548 if (hold_mem_node && temp_resources.mem_head) {
2549 mem_node = do_pre_bridge_resource_split(&(temp_resources.mem_head), &hold_mem_node, 0x100000L);
2550
2551 /* Check if we were able to split something off */
2552 if (mem_node) {
2553 hold_mem_node->base = mem_node->base + mem_node->length;
2554
2555 RES_CHECK(hold_mem_node->base, 16);
2556 temp_word = (u32)((hold_mem_node->base) >> 16);
2557 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2558
2559 return_resource(&(resources->mem_head), mem_node);
2560 }
2561
2562 mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000L);
2563
2564 /* Check if we were able to split something off */
2565 if (mem_node) {
2566 /* First use the temporary node to store information for the board */
2567 hold_mem_node->length = mem_node->base - hold_mem_node->base;
2568
2569 if (hold_mem_node->length) {
2570 hold_mem_node->next = func->mem_head;
2571 func->mem_head = hold_mem_node;
2572
2573 /* configure end address */
2574 RES_CHECK(mem_node->base - 1, 16);
2575 temp_word = (u32)((mem_node->base - 1) >> 16);
2576 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2577
2578 /* Return unused resources to the pool */
2579 return_resource(&(resources->mem_head), mem_node);
2580 } else {
2581 /* it doesn't need any Mem */
2582 temp_word = 0x0000;
2583 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2584
2585 return_resource(&(resources->mem_head), mem_node);
2586 kfree(hold_mem_node);
2587 }
2588 } else {
2589 /* it used most of the range */
2590 hold_mem_node->next = func->mem_head;
2591 func->mem_head = hold_mem_node;
2592 }
2593 } else if (hold_mem_node) {
2594 /* it used the whole range */
2595 hold_mem_node->next = func->mem_head;
2596 func->mem_head = hold_mem_node;
2597 }
2598
2599 /* If we have prefetchable memory space available and there is some
2600 * left at the end, return the unused portion
2601 */
2602 if (hold_p_mem_node && temp_resources.p_mem_head) {
2603 p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2604 &hold_p_mem_node, 0x100000L);
2605
2606 /* Check if we were able to split something off */
2607 if (p_mem_node) {
2608 hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2609
2610 RES_CHECK(hold_p_mem_node->base, 16);
2611 temp_word = (u32)((hold_p_mem_node->base) >> 16);
2612 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2613
2614 return_resource(&(resources->p_mem_head), p_mem_node);
2615 }
2616
2617 p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000L);
2618
2619 /* Check if we were able to split something off */
2620 if (p_mem_node) {
2621 /* First use the temporary node to store information for the board */
2622 hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2623
2624 /* If we used any, add it to the board's list */
2625 if (hold_p_mem_node->length) {
2626 hold_p_mem_node->next = func->p_mem_head;
2627 func->p_mem_head = hold_p_mem_node;
2628
2629 RES_CHECK(p_mem_node->base - 1, 16);
2630 temp_word = (u32)((p_mem_node->base - 1) >> 16);
2631 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2632
2633 return_resource(&(resources->p_mem_head), p_mem_node);
2634 } else {
2635 /* it doesn't need any PMem */
2636 temp_word = 0x0000;
2637 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2638
2639 return_resource(&(resources->p_mem_head), p_mem_node);
2640 kfree(hold_p_mem_node);
2641 }
2642 } else {
2643 /* it used the most of the range */
2644 hold_p_mem_node->next = func->p_mem_head;
2645 func->p_mem_head = hold_p_mem_node;
2646 }
2647 } else if (hold_p_mem_node) {
2648 /* it used the whole range */
2649 hold_p_mem_node->next = func->p_mem_head;
2650 func->p_mem_head = hold_p_mem_node;
2651 }
2652
2653 /* We should be configuring an IRQ and the bridge's base address
2654 * registers if it needs them. Although we have never seen such
2655 * a device
2656 */
2657
2658 shpchprm_enable_card(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
2659
2660 dbg("PCI Bridge Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device, func->function);
2661 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2662 /* Standard device */
2663 u64 base64;
2664 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2665
2666 if (class_code == PCI_BASE_CLASS_DISPLAY)
2667 return (DEVICE_TYPE_NOT_SUPPORTED);
2668
2669 /* Figure out IO and memory needs */
2670 for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
2671 temp_register = 0xFFFFFFFF;
2672
2673 rc = pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
2674 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
2675 dbg("Bar[%x]=0x%x on bus:dev:func(0x%x:%x:%x)\n", cloop, temp_register, func->bus, func->device,
2676 func->function);
2677
2678 if (!temp_register)
2679 continue;
2680
2681 base64 = 0L;
2682 if (temp_register & PCI_BASE_ADDRESS_SPACE_IO) {
2683 /* Map IO */
2684
2685 /* set base = amount of IO space */
2686 base = temp_register & 0xFFFFFFFC;
2687 base = ~base + 1;
2688
2689 dbg("NEED IO length(0x%x)\n", base);
2690 io_node = get_io_resource(&(resources->io_head),(ulong)base);
2691
2692 /* allocate the resource to the board */
2693 if (io_node) {
2694 dbg("Got IO base=0x%x(length=0x%x)\n", io_node->base, io_node->length);
2695 base = (u32)io_node->base;
2696 io_node->next = func->io_head;
2697 func->io_head = io_node;
2698 } else {
2699 err("Got NO IO resource(length=0x%x)\n", base);
2700 return -ENOMEM;
2701 }
2702 } else { /* map MEM */
2703 int prefetchable = 1;
2704 struct pci_resource **res_node = &func->p_mem_head;
2705 char *res_type_str = "PMEM";
2706 u32 temp_register2;
2707
2708 if (!(temp_register & PCI_BASE_ADDRESS_MEM_PREFETCH)) {
2709 prefetchable = 0;
2710 res_node = &func->mem_head;
2711 res_type_str++;
2712 }
2713
2714 base = temp_register & 0xFFFFFFF0;
2715 base = ~base + 1;
2716
2717 switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
2718 case PCI_BASE_ADDRESS_MEM_TYPE_32:
2719 dbg("NEED 32 %s bar=0x%x(length=0x%x)\n", res_type_str, temp_register, base);
2720
2721 if (prefetchable && resources->p_mem_head)
2722 mem_node=get_resource(&(resources->p_mem_head), (ulong)base);
2723 else {
2724 if (prefetchable)
2725 dbg("using MEM for PMEM\n");
2726 mem_node=get_resource(&(resources->mem_head), (ulong)base);
2727 }
2728
2729 /* allocate the resource to the board */
2730 if (mem_node) {
2731 base = (u32)mem_node->base;
2732 mem_node->next = *res_node;
2733 *res_node = mem_node;
2734 dbg("Got 32 %s base=0x%x(length=0x%x)\n", res_type_str, mem_node->base,
2735 mem_node->length);
2736 } else {
2737 err("Got NO 32 %s resource(length=0x%x)\n", res_type_str, base);
2738 return -ENOMEM;
2739 }
2740 break;
2741 case PCI_BASE_ADDRESS_MEM_TYPE_64:
2742 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
2743 dbg("NEED 64 %s bar=0x%x:%x(length=0x%x)\n", res_type_str, temp_register2,
2744 temp_register, base);
2745
2746 if (prefetchable && resources->p_mem_head)
2747 mem_node = get_resource(&(resources->p_mem_head), (ulong)base);
2748 else {
2749 if (prefetchable)
2750 dbg("using MEM for PMEM\n");
2751 mem_node = get_resource(&(resources->mem_head), (ulong)base);
2752 }
2753
2754 /* allocate the resource to the board */
2755 if (mem_node) {
2756 base64 = mem_node->base;
2757 mem_node->next = *res_node;
2758 *res_node = mem_node;
2759 dbg("Got 64 %s base=0x%x:%x(length=%x)\n", res_type_str, (u32)(base64 >> 32),
2760 (u32)base64, mem_node->length);
2761 } else {
2762 err("Got NO 64 %s resource(length=0x%x)\n", res_type_str, base);
2763 return -ENOMEM;
2764 }
2765 break;
2766 default:
2767 dbg("reserved BAR type=0x%x\n", temp_register);
2768 break;
2769 }
2770
2771 }
2772
2773 if (base64) {
2774 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
2775 cloop += 4;
2776 base64 >>= 32;
2777
2778 if (base64) {
2779 dbg("%s: high dword of base64(0x%x) set to 0\n", __FUNCTION__, (u32)base64);
2780 base64 = 0x0L;
2781 }
2782
2783 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
2784 } else {
2785 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2786 }
2787 } /* End of base register loop */
2788
2789#if defined(CONFIG_X86_64)
2790 /* Figure out which interrupt pin this function uses */
2791 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_INTERRUPT_PIN, &temp_byte);
2792
2793 /* If this function needs an interrupt and we are behind a bridge
2794 and the pin is tied to something that's alread mapped,
2795 set this one the same
2796 */
2797 if (temp_byte && resources->irqs &&
2798 (resources->irqs->valid_INT &
2799 (0x01 << ((temp_byte + resources->irqs->barber_pole - 1) & 0x03)))) {
2800 /* We have to share with something already set up */
2801 IRQ = resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03];
2802 } else {
2803 /* Program IRQ based on card type */
2804 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2805
2806 if (class_code == PCI_BASE_CLASS_STORAGE) {
2807 IRQ = shpchp_disk_irq;
2808 } else {
2809 IRQ = shpchp_nic_irq;
2810 }
2811 }
2812
2813 /* IRQ Line */
2814 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_INTERRUPT_LINE, IRQ);
2815
2816 if (!behind_bridge) {
2817 rc = shpchp_set_irq(func->bus, func->device, temp_byte + 0x09, IRQ);
2818 if (rc)
2819 return(1);
2820 } else {
2821 /* TBD - this code may also belong in the other clause of this If statement */
2822 resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03] = IRQ;
2823 resources->irqs->valid_INT |= 0x01 << (temp_byte + resources->irqs->barber_pole - 1) & 0x03;
2824 }
2825#endif
2826 /* Disable ROM base Address */
2827 rc = pci_bus_write_config_dword (pci_bus, devfn, PCI_ROM_ADDRESS, 0x00);
2828
2829 /* Set HP parameters (Cache Line Size, Latency Timer) */
2830 rc = shpchprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL);
2831 if (rc)
2832 return rc;
2833
2834 shpchprm_enable_card(ctrl, func, PCI_HEADER_TYPE_NORMAL);
2835
2836 dbg("PCI function Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device, func->function);
2837 } /* End of Not-A-Bridge else */
2838 else {
2839 /* It's some strange type of PCI adapter (Cardbus?) */
2840 return(DEVICE_TYPE_NOT_SUPPORTED);
2841 }
2842
2843 func->configured = 1;
2844
2845 return 0;
2846} 980}
2847 981
diff --git a/drivers/pci/hotplug/shpchp_hpc.c b/drivers/pci/hotplug/shpchp_hpc.c
index 8d98410bf1c0..9987a6fd65b8 100644
--- a/drivers/pci/hotplug/shpchp_hpc.c
+++ b/drivers/pci/hotplug/shpchp_hpc.c
@@ -27,17 +27,12 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/kernel.h> 30#include <linux/kernel.h>
32#include <linux/module.h> 31#include <linux/module.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/vmalloc.h>
36#include <linux/interrupt.h>
37#include <linux/spinlock.h>
38#include <linux/delay.h>
39#include <linux/pci.h> 33#include <linux/pci.h>
40#include <asm/system.h> 34#include <linux/interrupt.h>
35
41#include "shpchp.h" 36#include "shpchp.h"
42 37
43#ifdef DEBUG 38#ifdef DEBUG
@@ -282,7 +277,7 @@ static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int seconds)
282 277
283static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) 278static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
284{ 279{
285 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 280 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
286 u16 cmd_status; 281 u16 cmd_status;
287 int retval = 0; 282 int retval = 0;
288 u16 temp_word; 283 u16 temp_word;
@@ -320,7 +315,6 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
320 * command. 315 * command.
321 */ 316 */
322 writew(temp_word, php_ctlr->creg + CMD); 317 writew(temp_word, php_ctlr->creg + CMD);
323 dbg("%s: temp_word written %x\n", __FUNCTION__, temp_word);
324 318
325 DBG_LEAVE_ROUTINE 319 DBG_LEAVE_ROUTINE
326 return retval; 320 return retval;
@@ -328,7 +322,7 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
328 322
329static int hpc_check_cmd_status(struct controller *ctrl) 323static int hpc_check_cmd_status(struct controller *ctrl)
330{ 324{
331 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) ctrl->hpc_ctlr_handle; 325 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
332 u16 cmd_status; 326 u16 cmd_status;
333 int retval = 0; 327 int retval = 0;
334 328
@@ -368,7 +362,7 @@ static int hpc_check_cmd_status(struct controller *ctrl)
368 362
369static int hpc_get_attention_status(struct slot *slot, u8 *status) 363static int hpc_get_attention_status(struct slot *slot, u8 *status)
370{ 364{
371 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 365 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
372 u32 slot_reg; 366 u32 slot_reg;
373 u16 slot_status; 367 u16 slot_status;
374 u8 atten_led_state; 368 u8 atten_led_state;
@@ -408,7 +402,7 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status)
408 402
409static int hpc_get_power_status(struct slot * slot, u8 *status) 403static int hpc_get_power_status(struct slot * slot, u8 *status)
410{ 404{
411 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 405 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
412 u32 slot_reg; 406 u32 slot_reg;
413 u16 slot_status; 407 u16 slot_status;
414 u8 slot_state; 408 u8 slot_state;
@@ -450,7 +444,7 @@ static int hpc_get_power_status(struct slot * slot, u8 *status)
450 444
451static int hpc_get_latch_status(struct slot *slot, u8 *status) 445static int hpc_get_latch_status(struct slot *slot, u8 *status)
452{ 446{
453 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 447 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
454 u32 slot_reg; 448 u32 slot_reg;
455 u16 slot_status; 449 u16 slot_status;
456 450
@@ -473,7 +467,7 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status)
473 467
474static int hpc_get_adapter_status(struct slot *slot, u8 *status) 468static int hpc_get_adapter_status(struct slot *slot, u8 *status)
475{ 469{
476 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 470 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
477 u32 slot_reg; 471 u32 slot_reg;
478 u16 slot_status; 472 u16 slot_status;
479 u8 card_state; 473 u8 card_state;
@@ -496,7 +490,7 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status)
496 490
497static int hpc_get_prog_int(struct slot *slot, u8 *prog_int) 491static int hpc_get_prog_int(struct slot *slot, u8 *prog_int)
498{ 492{
499 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 493 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
500 494
501 DBG_ENTER_ROUTINE 495 DBG_ENTER_ROUTINE
502 496
@@ -513,7 +507,7 @@ static int hpc_get_prog_int(struct slot *slot, u8 *prog_int)
513 507
514static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value) 508static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value)
515{ 509{
516 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 510 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
517 u32 slot_reg; 511 u32 slot_reg;
518 u16 slot_status, sec_bus_status; 512 u16 slot_status, sec_bus_status;
519 u8 m66_cap, pcix_cap, pi; 513 u8 m66_cap, pcix_cap, pi;
@@ -594,7 +588,7 @@ static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value)
594 588
595static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode) 589static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode)
596{ 590{
597 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 591 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
598 u16 sec_bus_status; 592 u16 sec_bus_status;
599 u8 pi; 593 u8 pi;
600 int retval = 0; 594 int retval = 0;
@@ -623,7 +617,7 @@ static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode)
623 617
624static int hpc_query_power_fault(struct slot * slot) 618static int hpc_query_power_fault(struct slot * slot)
625{ 619{
626 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 620 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
627 u32 slot_reg; 621 u32 slot_reg;
628 u16 slot_status; 622 u16 slot_status;
629 u8 pwr_fault_state, status; 623 u8 pwr_fault_state, status;
@@ -647,7 +641,7 @@ static int hpc_query_power_fault(struct slot * slot)
647 641
648static int hpc_set_attention_status(struct slot *slot, u8 value) 642static int hpc_set_attention_status(struct slot *slot, u8 value)
649{ 643{
650 struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 644 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
651 u8 slot_cmd = 0; 645 u8 slot_cmd = 0;
652 int rc = 0; 646 int rc = 0;
653 647
@@ -683,7 +677,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
683 677
684static void hpc_set_green_led_on(struct slot *slot) 678static void hpc_set_green_led_on(struct slot *slot)
685{ 679{
686 struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 680 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
687 u8 slot_cmd; 681 u8 slot_cmd;
688 682
689 if (!slot->ctrl->hpc_ctlr_handle) { 683 if (!slot->ctrl->hpc_ctlr_handle) {
@@ -705,7 +699,7 @@ static void hpc_set_green_led_on(struct slot *slot)
705 699
706static void hpc_set_green_led_off(struct slot *slot) 700static void hpc_set_green_led_off(struct slot *slot)
707{ 701{
708 struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 702 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
709 u8 slot_cmd; 703 u8 slot_cmd;
710 704
711 if (!slot->ctrl->hpc_ctlr_handle) { 705 if (!slot->ctrl->hpc_ctlr_handle) {
@@ -727,7 +721,7 @@ static void hpc_set_green_led_off(struct slot *slot)
727 721
728static void hpc_set_green_led_blink(struct slot *slot) 722static void hpc_set_green_led_blink(struct slot *slot)
729{ 723{
730 struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 724 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
731 u8 slot_cmd; 725 u8 slot_cmd;
732 726
733 if (!slot->ctrl->hpc_ctlr_handle) { 727 if (!slot->ctrl->hpc_ctlr_handle) {
@@ -754,7 +748,7 @@ int shpc_get_ctlr_slot_config(struct controller *ctrl,
754 int *updown, /* physical_slot_num increament: 1 or -1 */ 748 int *updown, /* physical_slot_num increament: 1 or -1 */
755 int *flags) 749 int *flags)
756{ 750{
757 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) ctrl->hpc_ctlr_handle; 751 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
758 752
759 DBG_ENTER_ROUTINE 753 DBG_ENTER_ROUTINE
760 754
@@ -776,7 +770,7 @@ int shpc_get_ctlr_slot_config(struct controller *ctrl,
776 770
777static void hpc_release_ctlr(struct controller *ctrl) 771static void hpc_release_ctlr(struct controller *ctrl)
778{ 772{
779 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) ctrl->hpc_ctlr_handle; 773 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
780 struct php_ctlr_state_s *p, *p_prev; 774 struct php_ctlr_state_s *p, *p_prev;
781 775
782 DBG_ENTER_ROUTINE 776 DBG_ENTER_ROUTINE
@@ -796,10 +790,8 @@ static void hpc_release_ctlr(struct controller *ctrl)
796 } 790 }
797 } 791 }
798 if (php_ctlr->pci_dev) { 792 if (php_ctlr->pci_dev) {
799 dbg("%s: before calling iounmap & release_mem_region\n", __FUNCTION__);
800 iounmap(php_ctlr->creg); 793 iounmap(php_ctlr->creg);
801 release_mem_region(pci_resource_start(php_ctlr->pci_dev, 0), pci_resource_len(php_ctlr->pci_dev, 0)); 794 release_mem_region(pci_resource_start(php_ctlr->pci_dev, 0), pci_resource_len(php_ctlr->pci_dev, 0));
802 dbg("%s: before calling iounmap & release_mem_region\n", __FUNCTION__);
803 php_ctlr->pci_dev = NULL; 795 php_ctlr->pci_dev = NULL;
804 } 796 }
805 797
@@ -828,7 +820,7 @@ DBG_LEAVE_ROUTINE
828 820
829static int hpc_power_on_slot(struct slot * slot) 821static int hpc_power_on_slot(struct slot * slot)
830{ 822{
831 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 823 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
832 u8 slot_cmd; 824 u8 slot_cmd;
833 int retval = 0; 825 int retval = 0;
834 826
@@ -859,7 +851,7 @@ static int hpc_power_on_slot(struct slot * slot)
859 851
860static int hpc_slot_enable(struct slot * slot) 852static int hpc_slot_enable(struct slot * slot)
861{ 853{
862 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 854 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
863 u8 slot_cmd; 855 u8 slot_cmd;
864 int retval = 0; 856 int retval = 0;
865 857
@@ -890,7 +882,7 @@ static int hpc_slot_enable(struct slot * slot)
890 882
891static int hpc_slot_disable(struct slot * slot) 883static int hpc_slot_disable(struct slot * slot)
892{ 884{
893 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 885 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
894 u8 slot_cmd; 886 u8 slot_cmd;
895 int retval = 0; 887 int retval = 0;
896 888
@@ -920,51 +912,12 @@ static int hpc_slot_disable(struct slot * slot)
920 return retval; 912 return retval;
921} 913}
922 914
923static int hpc_enable_all_slots( struct slot *slot )
924{
925 int retval = 0;
926
927 DBG_ENTER_ROUTINE
928
929 if (!slot->ctrl->hpc_ctlr_handle) {
930 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
931 return -1;
932 }
933
934 retval = shpc_write_cmd(slot, 0, SET_ENABLE_ALL);
935 if (retval) {
936 err("%s: Write command failed!\n", __FUNCTION__);
937 return -1;
938 }
939
940 DBG_LEAVE_ROUTINE
941
942 return retval;
943}
944
945static int hpc_pwr_on_all_slots(struct slot *slot)
946{
947 int retval = 0;
948
949 DBG_ENTER_ROUTINE
950
951 retval = shpc_write_cmd(slot, 0, SET_PWR_ON_ALL);
952
953 if (retval) {
954 err("%s: Write command failed!\n", __FUNCTION__);
955 return -1;
956 }
957
958 DBG_LEAVE_ROUTINE
959 return retval;
960}
961
962static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value) 915static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value)
963{ 916{
964 u8 slot_cmd; 917 u8 slot_cmd;
965 u8 pi; 918 u8 pi;
966 int retval = 0; 919 int retval = 0;
967 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 920 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
968 921
969 DBG_ENTER_ROUTINE 922 DBG_ENTER_ROUTINE
970 923
@@ -1089,18 +1042,13 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1089 1042
1090 if (!intr_loc) 1043 if (!intr_loc)
1091 return IRQ_NONE; 1044 return IRQ_NONE;
1092 dbg("%s: shpc_isr proceeds\n", __FUNCTION__);
1093 dbg("%s: intr_loc = %x\n",__FUNCTION__, intr_loc); 1045 dbg("%s: intr_loc = %x\n",__FUNCTION__, intr_loc);
1094 1046
1095 if(!shpchp_poll_mode) { 1047 if(!shpchp_poll_mode) {
1096 /* Mask Global Interrupt Mask - see implementation note on p. 139 */ 1048 /* Mask Global Interrupt Mask - see implementation note on p. 139 */
1097 /* of SHPC spec rev 1.0*/ 1049 /* of SHPC spec rev 1.0*/
1098 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); 1050 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE);
1099 dbg("%s: Before masking global interrupt, temp_dword = %x\n",
1100 __FUNCTION__, temp_dword);
1101 temp_dword |= 0x00000001; 1051 temp_dword |= 0x00000001;
1102 dbg("%s: After masking global interrupt, temp_dword = %x\n",
1103 __FUNCTION__, temp_dword);
1104 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); 1052 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE);
1105 1053
1106 intr_loc2 = readl(php_ctlr->creg + INTR_LOC); 1054 intr_loc2 = readl(php_ctlr->creg + INTR_LOC);
@@ -1114,11 +1062,7 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1114 * Detect bit in Controller SERR-INT register 1062 * Detect bit in Controller SERR-INT register
1115 */ 1063 */
1116 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); 1064 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE);
1117 dbg("%s: Before clearing CCIP, temp_dword = %x\n",
1118 __FUNCTION__, temp_dword);
1119 temp_dword &= 0xfffeffff; 1065 temp_dword &= 0xfffeffff;
1120 dbg("%s: After clearing CCIP, temp_dword = %x\n",
1121 __FUNCTION__, temp_dword);
1122 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); 1066 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE);
1123 wake_up_interruptible(&ctrl->queue); 1067 wake_up_interruptible(&ctrl->queue);
1124 } 1068 }
@@ -1126,11 +1070,7 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1126 if ((intr_loc = (intr_loc >> 1)) == 0) { 1070 if ((intr_loc = (intr_loc >> 1)) == 0) {
1127 /* Unmask Global Interrupt Mask */ 1071 /* Unmask Global Interrupt Mask */
1128 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); 1072 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE);
1129 dbg("%s: 1-Before unmasking global interrupt, temp_dword = %x\n",
1130 __FUNCTION__, temp_dword);
1131 temp_dword &= 0xfffffffe; 1073 temp_dword &= 0xfffffffe;
1132 dbg("%s: 1-After unmasking global interrupt, temp_dword = %x\n",
1133 __FUNCTION__, temp_dword);
1134 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); 1074 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE);
1135 1075
1136 return IRQ_NONE; 1076 return IRQ_NONE;
@@ -1140,11 +1080,9 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1140 /* To find out which slot has interrupt pending */ 1080 /* To find out which slot has interrupt pending */
1141 if ((intr_loc >> hp_slot) & 0x01) { 1081 if ((intr_loc >> hp_slot) & 0x01) {
1142 temp_dword = readl(php_ctlr->creg + SLOT1 + (4*hp_slot)); 1082 temp_dword = readl(php_ctlr->creg + SLOT1 + (4*hp_slot));
1143 dbg("%s: Slot %x with intr, temp_dword = %x\n", 1083 dbg("%s: Slot %x with intr, slot register = %x\n",
1144 __FUNCTION__, hp_slot, temp_dword); 1084 __FUNCTION__, hp_slot, temp_dword);
1145 temp_byte = (temp_dword >> 16) & 0xFF; 1085 temp_byte = (temp_dword >> 16) & 0xFF;
1146 dbg("%s: Slot with intr, temp_byte = %x\n",
1147 __FUNCTION__, temp_byte);
1148 if ((php_ctlr->switch_change_callback) && (temp_byte & 0x08)) 1086 if ((php_ctlr->switch_change_callback) && (temp_byte & 0x08))
1149 schedule_flag += php_ctlr->switch_change_callback( 1087 schedule_flag += php_ctlr->switch_change_callback(
1150 hp_slot, php_ctlr->callback_instance_id); 1088 hp_slot, php_ctlr->callback_instance_id);
@@ -1160,8 +1098,6 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1160 1098
1161 /* Clear all slot events */ 1099 /* Clear all slot events */
1162 temp_dword = 0xe01f3fff; 1100 temp_dword = 0xe01f3fff;
1163 dbg("%s: Clearing slot events, temp_dword = %x\n",
1164 __FUNCTION__, temp_dword);
1165 writel(temp_dword, php_ctlr->creg + SLOT1 + (4*hp_slot)); 1101 writel(temp_dword, php_ctlr->creg + SLOT1 + (4*hp_slot));
1166 1102
1167 intr_loc2 = readl(php_ctlr->creg + INTR_LOC); 1103 intr_loc2 = readl(php_ctlr->creg + INTR_LOC);
@@ -1171,11 +1107,7 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1171 if (!shpchp_poll_mode) { 1107 if (!shpchp_poll_mode) {
1172 /* Unmask Global Interrupt Mask */ 1108 /* Unmask Global Interrupt Mask */
1173 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); 1109 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE);
1174 dbg("%s: 2-Before unmasking global interrupt, temp_dword = %x\n",
1175 __FUNCTION__, temp_dword);
1176 temp_dword &= 0xfffffffe; 1110 temp_dword &= 0xfffffffe;
1177 dbg("%s: 2-After unmasking global interrupt, temp_dword = %x\n",
1178 __FUNCTION__, temp_dword);
1179 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); 1111 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE);
1180 } 1112 }
1181 1113
@@ -1184,7 +1116,7 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1184 1116
1185static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value) 1117static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value)
1186{ 1118{
1187 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 1119 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
1188 enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN; 1120 enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN;
1189 int retval = 0; 1121 int retval = 0;
1190 u8 pi; 1122 u8 pi;
@@ -1253,7 +1185,7 @@ static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value)
1253 1185
1254static int hpc_get_cur_bus_speed (struct slot *slot, enum pci_bus_speed *value) 1186static int hpc_get_cur_bus_speed (struct slot *slot, enum pci_bus_speed *value)
1255{ 1187{
1256 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 1188 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
1257 enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN; 1189 enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN;
1258 u16 sec_bus_status; 1190 u16 sec_bus_status;
1259 int retval = 0; 1191 int retval = 0;
@@ -1367,8 +1299,6 @@ static struct hpc_ops shpchp_hpc_ops = {
1367 .power_on_slot = hpc_power_on_slot, 1299 .power_on_slot = hpc_power_on_slot,
1368 .slot_enable = hpc_slot_enable, 1300 .slot_enable = hpc_slot_enable,
1369 .slot_disable = hpc_slot_disable, 1301 .slot_disable = hpc_slot_disable,
1370 .enable_all_slots = hpc_enable_all_slots,
1371 .pwr_on_all_slots = hpc_pwr_on_all_slots,
1372 .set_bus_speed_mode = hpc_set_bus_speed_mode, 1302 .set_bus_speed_mode = hpc_set_bus_speed_mode,
1373 .set_attention_status = hpc_set_attention_status, 1303 .set_attention_status = hpc_set_attention_status,
1374 .get_power_status = hpc_get_power_status, 1304 .get_power_status = hpc_get_power_status,
@@ -1391,12 +1321,7 @@ static struct hpc_ops shpchp_hpc_ops = {
1391 .check_cmd_status = hpc_check_cmd_status, 1321 .check_cmd_status = hpc_check_cmd_status,
1392}; 1322};
1393 1323
1394int shpc_init(struct controller * ctrl, 1324int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
1395 struct pci_dev * pdev,
1396 php_intr_callback_t attention_button_callback,
1397 php_intr_callback_t switch_change_callback,
1398 php_intr_callback_t presence_change_callback,
1399 php_intr_callback_t power_fault_callback)
1400{ 1325{
1401 struct php_ctlr_state_s *php_ctlr, *p; 1326 struct php_ctlr_state_s *php_ctlr, *p;
1402 void *instance_id = ctrl; 1327 void *instance_id = ctrl;
@@ -1405,7 +1330,6 @@ int shpc_init(struct controller * ctrl,
1405 static int first = 1; 1330 static int first = 1;
1406 u32 shpc_cap_offset, shpc_base_offset; 1331 u32 shpc_cap_offset, shpc_base_offset;
1407 u32 tempdword, slot_reg; 1332 u32 tempdword, slot_reg;
1408 u16 vendor_id, device_id;
1409 u8 i; 1333 u8 i;
1410 1334
1411 DBG_ENTER_ROUTINE 1335 DBG_ENTER_ROUTINE
@@ -1422,21 +1346,8 @@ int shpc_init(struct controller * ctrl,
1422 1346
1423 php_ctlr->pci_dev = pdev; /* save pci_dev in context */ 1347 php_ctlr->pci_dev = pdev; /* save pci_dev in context */
1424 1348
1425 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id); 1349 if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device ==
1426 dbg("%s: Vendor ID: %x\n",__FUNCTION__, vendor_id); 1350 PCI_DEVICE_ID_AMD_GOLAM_7450)) {
1427 if (rc) {
1428 err("%s: unable to read PCI configuration data\n", __FUNCTION__);
1429 goto abort_free_ctlr;
1430 }
1431
1432 rc = pci_read_config_word(pdev, PCI_DEVICE_ID, &device_id);
1433 dbg("%s: Device ID: %x\n",__FUNCTION__, device_id);
1434 if (rc) {
1435 err("%s: unable to read PCI configuration data\n", __FUNCTION__);
1436 goto abort_free_ctlr;
1437 }
1438
1439 if ((vendor_id == PCI_VENDOR_ID_AMD) || (device_id == PCI_DEVICE_ID_AMD_GOLAM_7450)) {
1440 shpc_base_offset = 0; /* amd shpc driver doesn't use this; assume 0 */ 1351 shpc_base_offset = 0; /* amd shpc driver doesn't use this; assume 0 */
1441 } else { 1352 } else {
1442 if ((shpc_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC)) == 0) { 1353 if ((shpc_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC)) == 0) {
@@ -1469,7 +1380,8 @@ int shpc_init(struct controller * ctrl,
1469 err("%s : pci_read_config_dword failed\n", __FUNCTION__); 1380 err("%s : pci_read_config_dword failed\n", __FUNCTION__);
1470 goto abort_free_ctlr; 1381 goto abort_free_ctlr;
1471 } 1382 }
1472 dbg("%s: offset %d: tempdword %x\n", __FUNCTION__,i, tempdword); 1383 dbg("%s: offset %d: value %x\n", __FUNCTION__,i,
1384 tempdword);
1473 } 1385 }
1474 } 1386 }
1475 1387
@@ -1478,13 +1390,6 @@ int shpc_init(struct controller * ctrl,
1478 first = 0; 1390 first = 0;
1479 } 1391 }
1480 1392
1481 dbg("pdev = %p: b:d:f:irq=0x%x:%x:%x:%x\n", pdev, pdev->bus->number, PCI_SLOT(pdev->devfn),
1482 PCI_FUNC(pdev->devfn), pdev->irq);
1483 for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++)
1484 if (pci_resource_len(pdev, rc) > 0)
1485 dbg("pci resource[%d] start=0x%lx(len=0x%lx), shpc_base_offset %x\n", rc,
1486 pci_resource_start(pdev, rc), pci_resource_len(pdev, rc), shpc_base_offset);
1487
1488 info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, pdev->subsystem_vendor, 1393 info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, pdev->subsystem_vendor,
1489 pdev->subsystem_device); 1394 pdev->subsystem_device);
1490 1395
@@ -1504,7 +1409,6 @@ int shpc_init(struct controller * ctrl,
1504 goto abort_free_ctlr; 1409 goto abort_free_ctlr;
1505 } 1410 }
1506 dbg("%s: php_ctlr->creg %p\n", __FUNCTION__, php_ctlr->creg); 1411 dbg("%s: php_ctlr->creg %p\n", __FUNCTION__, php_ctlr->creg);
1507 dbg("%s: physical addr %p\n", __FUNCTION__, (void*)pci_resource_start(pdev, 0));
1508 1412
1509 init_MUTEX(&ctrl->crit_sect); 1413 init_MUTEX(&ctrl->crit_sect);
1510 /* Setup wait queue */ 1414 /* Setup wait queue */
@@ -1512,13 +1416,10 @@ int shpc_init(struct controller * ctrl,
1512 1416
1513 /* Find the IRQ */ 1417 /* Find the IRQ */
1514 php_ctlr->irq = pdev->irq; 1418 php_ctlr->irq = pdev->irq;
1515 dbg("HPC interrupt = %d\n", php_ctlr->irq); 1419 php_ctlr->attention_button_callback = shpchp_handle_attention_button,
1516 1420 php_ctlr->switch_change_callback = shpchp_handle_switch_change;
1517 /* Save interrupt callback info */ 1421 php_ctlr->presence_change_callback = shpchp_handle_presence_change;
1518 php_ctlr->attention_button_callback = attention_button_callback; 1422 php_ctlr->power_fault_callback = shpchp_handle_power_fault;
1519 php_ctlr->switch_change_callback = switch_change_callback;
1520 php_ctlr->presence_change_callback = presence_change_callback;
1521 php_ctlr->power_fault_callback = power_fault_callback;
1522 php_ctlr->callback_instance_id = instance_id; 1423 php_ctlr->callback_instance_id = instance_id;
1523 1424
1524 /* Return PCI Controller Info */ 1425 /* Return PCI Controller Info */
@@ -1556,7 +1457,6 @@ int shpc_init(struct controller * ctrl,
1556 if (rc) { 1457 if (rc) {
1557 info("Can't get msi for the hotplug controller\n"); 1458 info("Can't get msi for the hotplug controller\n");
1558 info("Use INTx for the hotplug controller\n"); 1459 info("Use INTx for the hotplug controller\n");
1559 dbg("%s: rc = %x\n", __FUNCTION__, rc);
1560 } else 1460 } else
1561 php_ctlr->irq = pdev->irq; 1461 php_ctlr->irq = pdev->irq;
1562 1462
@@ -1566,9 +1466,11 @@ int shpc_init(struct controller * ctrl,
1566 err("Can't get irq %d for the hotplug controller\n", php_ctlr->irq); 1466 err("Can't get irq %d for the hotplug controller\n", php_ctlr->irq);
1567 goto abort_free_ctlr; 1467 goto abort_free_ctlr;
1568 } 1468 }
1569 /* Execute OSHP method here */
1570 } 1469 }
1571 dbg("%s: Before adding HPC to HPC list\n", __FUNCTION__); 1470 dbg("%s: HPC at b:d:f:irq=0x%x:%x:%x:%x\n", __FUNCTION__,
1471 pdev->bus->number, PCI_SLOT(pdev->devfn),
1472 PCI_FUNC(pdev->devfn), pdev->irq);
1473 get_hp_hw_control_from_firmware(pdev);
1572 1474
1573 /* Add this HPC instance into the HPC list */ 1475 /* Add this HPC instance into the HPC list */
1574 spin_lock(&list_lock); 1476 spin_lock(&list_lock);
@@ -1607,7 +1509,6 @@ int shpc_init(struct controller * ctrl,
1607 dbg("%s: SERR_INTR_ENABLE = %x\n", __FUNCTION__, tempdword); 1509 dbg("%s: SERR_INTR_ENABLE = %x\n", __FUNCTION__, tempdword);
1608 } 1510 }
1609 1511
1610 dbg("%s: Leaving shpc_init\n", __FUNCTION__);
1611 DBG_LEAVE_ROUTINE 1512 DBG_LEAVE_ROUTINE
1612 return 0; 1513 return 0;
1613 1514
diff --git a/drivers/pci/hotplug/shpchp_pci.c b/drivers/pci/hotplug/shpchp_pci.c
index d867099114ec..38009bc0fd5d 100644
--- a/drivers/pci/hotplug/shpchp_pci.c
+++ b/drivers/pci/hotplug/shpchp_pci.c
@@ -27,784 +27,151 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/workqueue.h>
36#include <linux/proc_fs.h>
37#include <linux/pci.h> 33#include <linux/pci.h>
38#include "../pci.h" 34#include "../pci.h"
39#include "shpchp.h" 35#include "shpchp.h"
40#ifndef CONFIG_IA64
41#include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependant we are... */
42#endif
43 36
44int shpchp_configure_device (struct controller* ctrl, struct pci_func* func) 37static void program_fw_provided_values(struct pci_dev *dev)
45{ 38{
46 unsigned char bus; 39 u16 pci_cmd, pci_bctl;
47 struct pci_bus *child; 40 struct pci_dev *cdev;
48 int num; 41 struct hotplug_params hpp = {0x8, 0x40, 0, 0}; /* defaults */
49 42
50 if (func->pci_dev == NULL) 43 /* Program hpp values for this device */
51 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function)); 44 if (!(dev->hdr_type == PCI_HEADER_TYPE_NORMAL ||
52 45 (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE &&
53 /* Still NULL ? Well then scan for it ! */ 46 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
54 if (func->pci_dev == NULL) { 47 return;
55 num = pci_scan_slot(ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function)); 48
56 if (num) { 49 get_hp_params_from_firmware(dev, &hpp);
57 dbg("%s: subordiante %p number %x\n", __FUNCTION__, ctrl->pci_dev->subordinate, 50
58 ctrl->pci_dev->subordinate->number); 51 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpp.cache_line_size);
59 pci_bus_add_devices(ctrl->pci_dev->subordinate); 52 pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp.latency_timer);
60 } 53 pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
61 54 if (hpp.enable_serr)
62 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function)); 55 pci_cmd |= PCI_COMMAND_SERR;
63 if (func->pci_dev == NULL) { 56 else
64 dbg("ERROR: pci_dev still null\n"); 57 pci_cmd &= ~PCI_COMMAND_SERR;
65 return 0; 58 if (hpp.enable_perr)
59 pci_cmd |= PCI_COMMAND_PARITY;
60 else
61 pci_cmd &= ~PCI_COMMAND_PARITY;
62 pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
63
64 /* Program bridge control value and child devices */
65 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
66 pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER,
67 hpp.latency_timer);
68 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl);
69 if (hpp.enable_serr)
70 pci_bctl |= PCI_BRIDGE_CTL_SERR;
71 else
72 pci_bctl &= ~PCI_BRIDGE_CTL_SERR;
73 if (hpp.enable_perr)
74 pci_bctl |= PCI_BRIDGE_CTL_PARITY;
75 else
76 pci_bctl &= ~PCI_BRIDGE_CTL_PARITY;
77 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, pci_bctl);
78 if (dev->subordinate) {
79 list_for_each_entry(cdev, &dev->subordinate->devices,
80 bus_list)
81 program_fw_provided_values(cdev);
66 } 82 }
67 } 83 }
68
69 if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
70 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
71 child = pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
72 pci_do_scan_bus(child);
73
74 }
75
76 return 0;
77} 84}
78 85
79 86int shpchp_configure_device(struct slot *p_slot)
80int shpchp_unconfigure_device(struct pci_func* func)
81{ 87{
82 int rc = 0; 88 struct pci_dev *dev;
83 int j; 89 struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate;
84 90 int num, fn;
85 dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus, 91
86 func->device, func->function); 92 dev = pci_find_slot(p_slot->bus, PCI_DEVFN(p_slot->device, 0));
87 93 if (dev) {
88 for (j=0; j<8 ; j++) { 94 err("Device %s already exists at %x:%x, cannot hot-add\n",
89 struct pci_dev* temp = pci_find_slot(func->bus, 95 pci_name(dev), p_slot->bus, p_slot->device);
90 (func->device << 3) | j); 96 return -EINVAL;
91 if (temp) {
92 pci_remove_bus_device(temp);
93 }
94 } 97 }
95 return rc;
96}
97
98/*
99 * shpchp_set_irq
100 *
101 * @bus_num: bus number of PCI device
102 * @dev_num: device number of PCI device
103 * @slot: pointer to u8 where slot number will be returned
104 */
105int shpchp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
106{
107#if defined(CONFIG_X86) && !defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_64)
108 int rc;
109 u16 temp_word;
110 struct pci_dev fakedev;
111 struct pci_bus fakebus;
112 98
113 fakedev.devfn = dev_num << 3; 99 num = pci_scan_slot(parent, PCI_DEVFN(p_slot->device, 0));
114 fakedev.bus = &fakebus; 100 if (num == 0) {
115 fakebus.number = bus_num; 101 err("No new device found\n");
116 dbg("%s: dev %d, bus %d, pin %d, num %d\n", 102 return -ENODEV;
117 __FUNCTION__, dev_num, bus_num, int_pin, irq_num);
118 rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
119 dbg("%s: rc %d\n", __FUNCTION__, rc);
120 if (!rc)
121 return !rc;
122
123 /* set the Edge Level Control Register (ELCR) */
124 temp_word = inb(0x4d0);
125 temp_word |= inb(0x4d1) << 8;
126
127 temp_word |= 0x01 << irq_num;
128
129 /* This should only be for x86 as it sets the Edge Level Control Register */
130 outb((u8) (temp_word & 0xFF), 0x4d0);
131 outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
132#endif
133 return 0;
134}
135
136/* More PCI configuration routines; this time centered around hotplug controller */
137
138
139/*
140 * shpchp_save_config
141 *
142 * Reads configuration for all slots in a PCI bus and saves info.
143 *
144 * Note: For non-hot plug busses, the slot # saved is the device #
145 *
146 * returns 0 if success
147 */
148int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num)
149{
150 int rc;
151 u8 class_code;
152 u8 header_type;
153 u32 ID;
154 u8 secondary_bus;
155 struct pci_func *new_slot;
156 int sub_bus;
157 int FirstSupported;
158 int LastSupported;
159 int max_functions;
160 int function;
161 u8 DevError;
162 int device = 0;
163 int cloop = 0;
164 int stop_it;
165 int index;
166 int is_hot_plug = num_ctlr_slots || first_device_num;
167 struct pci_bus lpci_bus, *pci_bus;
168
169 dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__,
170 num_ctlr_slots, first_device_num);
171
172 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
173 pci_bus = &lpci_bus;
174
175 dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__,
176 num_ctlr_slots, first_device_num);
177
178 /* Decide which slots are supported */
179 if (is_hot_plug) {
180 /*********************************
181 * is_hot_plug is the slot mask
182 *********************************/
183 FirstSupported = first_device_num;
184 LastSupported = FirstSupported + num_ctlr_slots - 1;
185 } else {
186 FirstSupported = 0;
187 LastSupported = 0x1F;
188 } 103 }
189 104
190 dbg("FirstSupported = %d, LastSupported = %d\n", FirstSupported, 105 for (fn = 0; fn < 8; fn++) {
191 LastSupported); 106 if (!(dev = pci_find_slot(p_slot->bus,
192 107 PCI_DEVFN(p_slot->device, fn))))
193 /* Save PCI configuration space for all devices in supported slots */ 108 continue;
194 pci_bus->number = busnumber; 109 if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
195 for (device = FirstSupported; device <= LastSupported; device++) { 110 err("Cannot hot-add display device %s\n",
196 ID = 0xFFFFFFFF; 111 pci_name(dev));
197 rc = pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0), 112 continue;
198 PCI_VENDOR_ID, &ID);
199
200 if (ID != 0xFFFFFFFF) { /* device in slot */
201 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
202 0x0B, &class_code);
203 if (rc)
204 return rc;
205
206 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
207 PCI_HEADER_TYPE, &header_type);
208 if (rc)
209 return rc;
210
211 dbg("class_code = %x, header_type = %x\n", class_code, header_type);
212
213 /* If multi-function device, set max_functions to 8 */
214 if (header_type & 0x80)
215 max_functions = 8;
216 else
217 max_functions = 1;
218
219 function = 0;
220
221 do {
222 DevError = 0;
223
224 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* P-P Bridge */
225 /* Recurse the subordinate bus
226 * get the subordinate bus number
227 */
228 rc = pci_bus_read_config_byte(pci_bus,
229 PCI_DEVFN(device, function),
230 PCI_SECONDARY_BUS, &secondary_bus);
231 if (rc) {
232 return rc;
233 } else {
234 sub_bus = (int) secondary_bus;
235
236 /* Save secondary bus cfg spc with this recursive call. */
237 rc = shpchp_save_config(ctrl, sub_bus, 0, 0);
238 if (rc)
239 return rc;
240 }
241 }
242
243 index = 0;
244 new_slot = shpchp_slot_find(busnumber, device, index++);
245
246 dbg("new_slot = %p\n", new_slot);
247
248 while (new_slot && (new_slot->function != (u8) function)) {
249 new_slot = shpchp_slot_find(busnumber, device, index++);
250 dbg("new_slot = %p\n", new_slot);
251 }
252 if (!new_slot) {
253 /* Setup slot structure. */
254 new_slot = shpchp_slot_create(busnumber);
255 dbg("new_slot = %p\n", new_slot);
256
257 if (new_slot == NULL)
258 return(1);
259 }
260
261 new_slot->bus = (u8) busnumber;
262 new_slot->device = (u8) device;
263 new_slot->function = (u8) function;
264 new_slot->is_a_board = 1;
265 new_slot->switch_save = 0x10;
266 new_slot->pwr_save = 1;
267 /* In case of unsupported board */
268 new_slot->status = DevError;
269 new_slot->pci_dev = pci_find_slot(new_slot->bus,
270 (new_slot->device << 3) | new_slot->function);
271 dbg("new_slot->pci_dev = %p\n", new_slot->pci_dev);
272
273 for (cloop = 0; cloop < 0x20; cloop++) {
274 rc = pci_bus_read_config_dword(pci_bus,
275 PCI_DEVFN(device, function),
276 cloop << 2,
277 (u32 *) &(new_slot->config_space [cloop]));
278 /* dbg("new_slot->config_space[%x] = %x\n",
279 cloop, new_slot->config_space[cloop]); */
280 if (rc)
281 return rc;
282 }
283
284 function++;
285
286 stop_it = 0;
287
288 /* this loop skips to the next present function
289 * reading in Class Code and Header type.
290 */
291
292 while ((function < max_functions)&&(!stop_it)) {
293 rc = pci_bus_read_config_dword(pci_bus,
294 PCI_DEVFN(device, function),
295 PCI_VENDOR_ID, &ID);
296
297 if (ID == 0xFFFFFFFF) { /* nothing there. */
298 function++;
299 dbg("Nothing there\n");
300 } else { /* Something there */
301 rc = pci_bus_read_config_byte(pci_bus,
302 PCI_DEVFN(device, function),
303 0x0B, &class_code);
304 if (rc)
305 return rc;
306
307 rc = pci_bus_read_config_byte(pci_bus,
308 PCI_DEVFN(device, function),
309 PCI_HEADER_TYPE, &header_type);
310 if (rc)
311 return rc;
312
313 dbg("class_code = %x, header_type = %x\n",
314 class_code, header_type);
315 stop_it++;
316 }
317 }
318
319 } while (function < max_functions);
320 /* End of IF (device in slot?) */
321 } else if (is_hot_plug) {
322 /* Setup slot structure with entry for empty slot */
323 new_slot = shpchp_slot_create(busnumber);
324
325 if (new_slot == NULL) {
326 return(1);
327 }
328 dbg("new_slot = %p\n", new_slot);
329
330 new_slot->bus = (u8) busnumber;
331 new_slot->device = (u8) device;
332 new_slot->function = 0;
333 new_slot->is_a_board = 0;
334 new_slot->presence_save = 0;
335 new_slot->switch_save = 0;
336 } 113 }
337 } /* End of FOR loop */ 114 if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||
338 115 (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) {
339 return(0); 116 /* Find an unused bus number for the new bridge */
340} 117 struct pci_bus *child;
341 118 unsigned char busnr, start = parent->secondary;
342 119 unsigned char end = parent->subordinate;
343/* 120 for (busnr = start; busnr <= end; busnr++) {
344 * shpchp_save_slot_config 121 if (!pci_find_bus(pci_domain_nr(parent),
345 * 122 busnr))
346 * Saves configuration info for all PCI devices in a given slot 123 break;
347 * including subordinate busses.
348 *
349 * returns 0 if success
350 */
351int shpchp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot)
352{
353 int rc;
354 u8 class_code;
355 u8 header_type;
356 u32 ID;
357 u8 secondary_bus;
358 int sub_bus;
359 int max_functions;
360 int function;
361 int cloop = 0;
362 int stop_it;
363 struct pci_bus lpci_bus, *pci_bus;
364 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
365 pci_bus = &lpci_bus;
366 pci_bus->number = new_slot->bus;
367
368 ID = 0xFFFFFFFF;
369
370 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(new_slot->device, 0),
371 PCI_VENDOR_ID, &ID);
372
373 if (ID != 0xFFFFFFFF) { /* device in slot */
374 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
375 0x0B, &class_code);
376
377 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
378 PCI_HEADER_TYPE, &header_type);
379
380 if (header_type & 0x80) /* Multi-function device */
381 max_functions = 8;
382 else
383 max_functions = 1;
384
385 function = 0;
386
387 do {
388 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
389 /* Recurse the subordinate bus */
390 pci_bus_read_config_byte(pci_bus,
391 PCI_DEVFN(new_slot->device, function),
392 PCI_SECONDARY_BUS, &secondary_bus);
393
394 sub_bus = (int) secondary_bus;
395
396 /* Save the config headers for the secondary bus. */
397 rc = shpchp_save_config(ctrl, sub_bus, 0, 0);
398
399 if (rc)
400 return rc;
401
402 } /* End of IF */
403
404 new_slot->status = 0;
405
406 for (cloop = 0; cloop < 0x20; cloop++) {
407 pci_bus_read_config_dword(pci_bus,
408 PCI_DEVFN(new_slot->device, function),
409 cloop << 2,
410 (u32 *) &(new_slot->config_space [cloop]));
411 } 124 }
412 125 if (busnr >= end) {
413 function++; 126 err("No free bus for hot-added bridge\n");
414 127 continue;
415 stop_it = 0;
416
417 /* this loop skips to the next present function
418 * reading in the Class Code and the Header type.
419 */
420
421 while ((function < max_functions) && (!stop_it)) {
422 pci_bus_read_config_dword(pci_bus,
423 PCI_DEVFN(new_slot->device, function),
424 PCI_VENDOR_ID, &ID);
425
426 if (ID == 0xFFFFFFFF) { /* nothing there. */
427 function++;
428 } else { /* Something there */
429 pci_bus_read_config_byte(pci_bus,
430 PCI_DEVFN(new_slot->device, function),
431 0x0B, &class_code);
432
433 pci_bus_read_config_byte(pci_bus,
434 PCI_DEVFN(new_slot->device, function),
435 PCI_HEADER_TYPE, &header_type);
436
437 stop_it++;
438 }
439 } 128 }
440 129 child = pci_add_new_bus(parent, dev, busnr);
441 } while (function < max_functions); 130 if (!child) {
442 } /* End of IF (device in slot?) */ 131 err("Cannot add new bus for %s\n",
443 else { 132 pci_name(dev));
444 return 2; 133 continue;
134 }
135 child->subordinate = pci_do_scan_bus(child);
136 pci_bus_size_bridges(child);
137 }
138 program_fw_provided_values(dev);
445 } 139 }
446 140
141 pci_bus_assign_resources(parent);
142 pci_bus_add_devices(parent);
143 pci_enable_bridges(parent);
447 return 0; 144 return 0;
448} 145}
449 146
450 147int shpchp_unconfigure_device(struct slot *p_slot)
451/*
452 * shpchp_save_used_resources
453 *
454 * Stores used resource information for existing boards. this is
455 * for boards that were in the system when this driver was loaded.
456 * this function is for hot plug ADD
457 *
458 * returns 0 if success
459 * if disable == 1(DISABLE_CARD),
460 * it loops for all functions of the slot and disables them.
461 * else, it just get resources of the function and return.
462 */
463int shpchp_save_used_resources(struct controller *ctrl, struct pci_func *func, int disable)
464{ 148{
465 u8 cloop; 149 int rc = 0;
466 u8 header_type; 150 int j;
467 u8 secondary_bus; 151 u8 bctl = 0;
468 u8 temp_byte; 152
469 u16 command; 153 dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus, p_slot->device);
470 u16 save_command;
471 u16 w_base, w_length;
472 u32 temp_register;
473 u32 save_base;
474 u32 base, length;
475 u64 base64 = 0;
476 int index = 0;
477 unsigned int devfn;
478 struct pci_resource *mem_node = NULL;
479 struct pci_resource *p_mem_node = NULL;
480 struct pci_resource *t_mem_node;
481 struct pci_resource *io_node;
482 struct pci_resource *bus_node;
483 struct pci_bus lpci_bus, *pci_bus;
484 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
485 pci_bus = &lpci_bus;
486
487 if (disable)
488 func = shpchp_slot_find(func->bus, func->device, index++);
489
490 while ((func != NULL) && func->is_a_board) {
491 pci_bus->number = func->bus;
492 devfn = PCI_DEVFN(func->device, func->function);
493
494 /* Save the command register */
495 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
496 154
497 if (disable) { 155 for (j=0; j<8 ; j++) {
498 /* disable card */ 156 struct pci_dev* temp = pci_find_slot(p_slot->bus,
499 command = 0x00; 157 (p_slot->device << 3) | j);
500 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command); 158 if (!temp)
159 continue;
160 if ((temp->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
161 err("Cannot remove display device %s\n",
162 pci_name(temp));
163 continue;
501 } 164 }
502 165 if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
503 /* Check for Bridge */ 166 pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, &bctl);
504 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type); 167 if (bctl & PCI_BRIDGE_CTL_VGA) {
505 168 err("Cannot remove display device %s\n",
506 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */ 169 pci_name(temp));
507 dbg("Save_used_res of PCI bridge b:d=0x%x:%x, sc=0x%x\n", 170 continue;
508 func->bus, func->device, save_command);
509 if (disable) {
510 /* Clear Bridge Control Register */
511 command = 0x00;
512 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
513 } 171 }
514
515 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
516 pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
517
518 bus_node = kmalloc(sizeof(struct pci_resource),
519 GFP_KERNEL);
520 if (!bus_node)
521 return -ENOMEM;
522
523 bus_node->base = (ulong)secondary_bus;
524 bus_node->length = (ulong)(temp_byte - secondary_bus + 1);
525
526 bus_node->next = func->bus_head;
527 func->bus_head = bus_node;
528
529 /* Save IO base and Limit registers */
530 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &temp_byte);
531 base = temp_byte;
532 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &temp_byte);
533 length = temp_byte;
534
535 if ((base <= length) && (!disable || (save_command & PCI_COMMAND_IO))) {
536 io_node = kmalloc(sizeof(struct pci_resource),
537 GFP_KERNEL);
538 if (!io_node)
539 return -ENOMEM;
540
541 io_node->base = (ulong)(base & PCI_IO_RANGE_MASK) << 8;
542 io_node->length = (ulong)(length - base + 0x10) << 8;
543
544 io_node->next = func->io_head;
545 func->io_head = io_node;
546 }
547
548 /* Save memory base and Limit registers */
549 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
550 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
551
552 if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
553 mem_node = kmalloc(sizeof(struct pci_resource),
554 GFP_KERNEL);
555 if (!mem_node)
556 return -ENOMEM;
557
558 mem_node->base = (ulong)w_base << 16;
559 mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
560
561 mem_node->next = func->mem_head;
562 func->mem_head = mem_node;
563 }
564 /* Save prefetchable memory base and Limit registers */
565 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
566 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
567
568 if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
569 p_mem_node = kmalloc(sizeof(struct pci_resource),
570 GFP_KERNEL);
571 if (!p_mem_node)
572 return -ENOMEM;
573
574 p_mem_node->base = (ulong)w_base << 16;
575 p_mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
576
577 p_mem_node->next = func->p_mem_head;
578 func->p_mem_head = p_mem_node;
579 }
580 } else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
581 dbg("Save_used_res of PCI adapter b:d=0x%x:%x, sc=0x%x\n",
582 func->bus, func->device, save_command);
583
584 /* Figure out IO and memory base lengths */
585 for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
586 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
587
588 temp_register = 0xFFFFFFFF;
589 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
590 pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
591
592 if (!disable)
593 pci_bus_write_config_dword(pci_bus, devfn, cloop, save_base);
594
595 if (!temp_register)
596 continue;
597
598 base = temp_register;
599
600 if ((base & PCI_BASE_ADDRESS_SPACE_IO) &&
601 (!disable || (save_command & PCI_COMMAND_IO))) {
602 /* IO base */
603 /* set temp_register = amount of IO space requested */
604 base = base & 0xFFFFFFFCL;
605 base = (~base) + 1;
606
607 io_node = kmalloc(sizeof (struct pci_resource),
608 GFP_KERNEL);
609 if (!io_node)
610 return -ENOMEM;
611
612 io_node->base = (ulong)save_base & PCI_BASE_ADDRESS_IO_MASK;
613 io_node->length = (ulong)base;
614 dbg("sur adapter: IO bar=0x%x(length=0x%x)\n",
615 io_node->base, io_node->length);
616
617 io_node->next = func->io_head;
618 func->io_head = io_node;
619 } else { /* map Memory */
620 int prefetchable = 1;
621 /* struct pci_resources **res_node; */
622 char *res_type_str = "PMEM";
623 u32 temp_register2;
624
625 t_mem_node = kmalloc(sizeof (struct pci_resource),
626 GFP_KERNEL);
627 if (!t_mem_node)
628 return -ENOMEM;
629
630 if (!(base & PCI_BASE_ADDRESS_MEM_PREFETCH) &&
631 (!disable || (save_command & PCI_COMMAND_MEMORY))) {
632 prefetchable = 0;
633 mem_node = t_mem_node;
634 res_type_str++;
635 } else
636 p_mem_node = t_mem_node;
637
638 base = base & 0xFFFFFFF0L;
639 base = (~base) + 1;
640
641 switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
642 case PCI_BASE_ADDRESS_MEM_TYPE_32:
643 if (prefetchable) {
644 p_mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
645 p_mem_node->length = (ulong)base;
646 dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
647 res_type_str,
648 p_mem_node->base,
649 p_mem_node->length);
650
651 p_mem_node->next = func->p_mem_head;
652 func->p_mem_head = p_mem_node;
653 } else {
654 mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
655 mem_node->length = (ulong)base;
656 dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
657 res_type_str,
658 mem_node->base,
659 mem_node->length);
660
661 mem_node->next = func->mem_head;
662 func->mem_head = mem_node;
663 }
664 break;
665 case PCI_BASE_ADDRESS_MEM_TYPE_64:
666 pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
667 base64 = temp_register2;
668 base64 = (base64 << 32) | save_base;
669
670 if (temp_register2) {
671 dbg("sur adapter: 64 %s high dword of base64(0x%x:%x) masked to 0\n",
672 res_type_str, temp_register2, (u32)base64);
673 base64 &= 0x00000000FFFFFFFFL;
674 }
675
676 if (prefetchable) {
677 p_mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
678 p_mem_node->length = base;
679 dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
680 res_type_str,
681 p_mem_node->base,
682 p_mem_node->length);
683
684 p_mem_node->next = func->p_mem_head;
685 func->p_mem_head = p_mem_node;
686 } else {
687 mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
688 mem_node->length = base;
689 dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
690 res_type_str,
691 mem_node->base,
692 mem_node->length);
693
694 mem_node->next = func->mem_head;
695 func->mem_head = mem_node;
696 }
697 cloop += 4;
698 break;
699 default:
700 dbg("asur: reserved BAR type=0x%x\n",
701 temp_register);
702 break;
703 }
704 }
705 } /* End of base register loop */
706 } else { /* Some other unknown header type */
707 dbg("Save_used_res of PCI unknown type b:d=0x%x:%x. skip.\n",
708 func->bus, func->device);
709 } 172 }
710 173 pci_remove_bus_device(temp);
711 /* find the next device in this slot */
712 if (!disable)
713 break;
714 func = shpchp_slot_find(func->bus, func->device, index++);
715 } 174 }
716
717 return 0;
718}
719
720/**
721 * kfree_resource_list: release memory of all list members
722 * @res: resource list to free
723 */
724static inline void
725return_resource_list(struct pci_resource **func, struct pci_resource **res)
726{
727 struct pci_resource *node;
728 struct pci_resource *t_node;
729
730 node = *func;
731 *func = NULL;
732 while (node) {
733 t_node = node->next;
734 return_resource(res, node);
735 node = t_node;
736 }
737}
738
739/*
740 * shpchp_return_board_resources
741 *
742 * this routine returns all resources allocated to a board to
743 * the available pool.
744 *
745 * returns 0 if success
746 */
747int shpchp_return_board_resources(struct pci_func * func,
748 struct resource_lists * resources)
749{
750 int rc;
751 dbg("%s\n", __FUNCTION__);
752
753 if (!func)
754 return 1;
755
756 return_resource_list(&(func->io_head),&(resources->io_head));
757 return_resource_list(&(func->mem_head),&(resources->mem_head));
758 return_resource_list(&(func->p_mem_head),&(resources->p_mem_head));
759 return_resource_list(&(func->bus_head),&(resources->bus_head));
760
761 rc = shpchp_resource_sort_and_combine(&(resources->mem_head));
762 rc |= shpchp_resource_sort_and_combine(&(resources->p_mem_head));
763 rc |= shpchp_resource_sort_and_combine(&(resources->io_head));
764 rc |= shpchp_resource_sort_and_combine(&(resources->bus_head));
765
766 return rc; 175 return rc;
767} 176}
768 177
769/**
770 * kfree_resource_list: release memory of all list members
771 * @res: resource list to free
772 */
773static inline void
774kfree_resource_list(struct pci_resource **r)
775{
776 struct pci_resource *res, *tres;
777
778 res = *r;
779 *r = NULL;
780
781 while (res) {
782 tres = res;
783 res = res->next;
784 kfree(tres);
785 }
786}
787
788/**
789 * shpchp_destroy_resource_list: put node back in the resource list
790 * @resources: list to put nodes back
791 */
792void shpchp_destroy_resource_list(struct resource_lists *resources)
793{
794 kfree_resource_list(&(resources->io_head));
795 kfree_resource_list(&(resources->mem_head));
796 kfree_resource_list(&(resources->p_mem_head));
797 kfree_resource_list(&(resources->bus_head));
798}
799
800/**
801 * shpchp_destroy_board_resources: put node back in the resource list
802 * @resources: list to put nodes back
803 */
804void shpchp_destroy_board_resources(struct pci_func * func)
805{
806 kfree_resource_list(&(func->io_head));
807 kfree_resource_list(&(func->mem_head));
808 kfree_resource_list(&(func->p_mem_head));
809 kfree_resource_list(&(func->bus_head));
810}
diff --git a/drivers/pci/hotplug/shpchp_sysfs.c b/drivers/pci/hotplug/shpchp_sysfs.c
index c9445ebda5c7..f5cfbf2c047c 100644
--- a/drivers/pci/hotplug/shpchp_sysfs.c
+++ b/drivers/pci/hotplug/shpchp_sysfs.c
@@ -26,12 +26,9 @@
26 * 26 *
27 */ 27 */
28 28
29#include <linux/config.h>
30#include <linux/module.h> 29#include <linux/module.h>
31#include <linux/kernel.h> 30#include <linux/kernel.h>
32#include <linux/types.h> 31#include <linux/types.h>
33#include <linux/proc_fs.h>
34#include <linux/workqueue.h>
35#include <linux/pci.h> 32#include <linux/pci.h>
36#include "shpchp.h" 33#include "shpchp.h"
37 34
@@ -40,104 +37,60 @@
40 37
41static ssize_t show_ctrl (struct device *dev, struct device_attribute *attr, char *buf) 38static ssize_t show_ctrl (struct device *dev, struct device_attribute *attr, char *buf)
42{ 39{
43 struct pci_dev *pci_dev; 40 struct pci_dev *pdev;
44 struct controller *ctrl;
45 char * out = buf; 41 char * out = buf;
46 int index; 42 int index, busnr;
47 struct pci_resource *res; 43 struct resource *res;
44 struct pci_bus *bus;
48 45
49 pci_dev = container_of (dev, struct pci_dev, dev); 46 pdev = container_of (dev, struct pci_dev, dev);
50 ctrl = pci_get_drvdata(pci_dev); 47 bus = pdev->subordinate;
51 48
52 out += sprintf(buf, "Free resources: memory\n"); 49 out += sprintf(buf, "Free resources: memory\n");
53 index = 11; 50 for (index = 0; index < PCI_BUS_NUM_RESOURCES; index++) {
54 res = ctrl->mem_head; 51 res = bus->resource[index];
55 while (res && index--) { 52 if (res && (res->flags & IORESOURCE_MEM) &&
56 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 53 !(res->flags & IORESOURCE_PREFETCH)) {
57 res = res->next; 54 out += sprintf(out, "start = %8.8lx, length = %8.8lx\n",
55 res->start, (res->end - res->start));
56 }
58 } 57 }
59 out += sprintf(out, "Free resources: prefetchable memory\n"); 58 out += sprintf(out, "Free resources: prefetchable memory\n");
60 index = 11; 59 for (index = 0; index < PCI_BUS_NUM_RESOURCES; index++) {
61 res = ctrl->p_mem_head; 60 res = bus->resource[index];
62 while (res && index--) { 61 if (res && (res->flags & IORESOURCE_MEM) &&
63 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 62 (res->flags & IORESOURCE_PREFETCH)) {
64 res = res->next; 63 out += sprintf(out, "start = %8.8lx, length = %8.8lx\n",
64 res->start, (res->end - res->start));
65 }
65 } 66 }
66 out += sprintf(out, "Free resources: IO\n"); 67 out += sprintf(out, "Free resources: IO\n");
67 index = 11; 68 for (index = 0; index < PCI_BUS_NUM_RESOURCES; index++) {
68 res = ctrl->io_head; 69 res = bus->resource[index];
69 while (res && index--) { 70 if (res && (res->flags & IORESOURCE_IO)) {
70 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 71 out += sprintf(out, "start = %8.8lx, length = %8.8lx\n",
71 res = res->next; 72 res->start, (res->end - res->start));
73 }
72 } 74 }
73 out += sprintf(out, "Free resources: bus numbers\n"); 75 out += sprintf(out, "Free resources: bus numbers\n");
74 index = 11; 76 for (busnr = bus->secondary; busnr <= bus->subordinate; busnr++) {
75 res = ctrl->bus_head; 77 if (!pci_find_bus(pci_domain_nr(bus), busnr))
76 while (res && index--) { 78 break;
77 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
78 res = res->next;
79 } 79 }
80 if (busnr < bus->subordinate)
81 out += sprintf(out, "start = %8.8x, length = %8.8x\n",
82 busnr, (bus->subordinate - busnr));
80 83
81 return out - buf; 84 return out - buf;
82} 85}
83static DEVICE_ATTR (ctrl, S_IRUGO, show_ctrl, NULL); 86static DEVICE_ATTR (ctrl, S_IRUGO, show_ctrl, NULL);
84 87
85static ssize_t show_dev (struct device *dev, struct device_attribute *attr, char *buf) 88void shpchp_create_ctrl_files (struct controller *ctrl)
86{ 89{
87 struct pci_dev *pci_dev; 90 device_create_file (&ctrl->pci_dev->dev, &dev_attr_ctrl);
88 struct controller *ctrl;
89 char * out = buf;
90 int index;
91 struct pci_resource *res;
92 struct pci_func *new_slot;
93 struct slot *slot;
94
95 pci_dev = container_of (dev, struct pci_dev, dev);
96 ctrl = pci_get_drvdata(pci_dev);
97
98 slot=ctrl->slot;
99
100 while (slot) {
101 new_slot = shpchp_slot_find(slot->bus, slot->device, 0);
102 if (!new_slot)
103 break;
104 out += sprintf(out, "assigned resources: memory\n");
105 index = 11;
106 res = new_slot->mem_head;
107 while (res && index--) {
108 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
109 res = res->next;
110 }
111 out += sprintf(out, "assigned resources: prefetchable memory\n");
112 index = 11;
113 res = new_slot->p_mem_head;
114 while (res && index--) {
115 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
116 res = res->next;
117 }
118 out += sprintf(out, "assigned resources: IO\n");
119 index = 11;
120 res = new_slot->io_head;
121 while (res && index--) {
122 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
123 res = res->next;
124 }
125 out += sprintf(out, "assigned resources: bus numbers\n");
126 index = 11;
127 res = new_slot->bus_head;
128 while (res && index--) {
129 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
130 res = res->next;
131 }
132 slot=slot->next;
133 }
134
135 return out - buf;
136} 91}
137static DEVICE_ATTR (dev, S_IRUGO, show_dev, NULL);
138 92
139void shpchp_create_ctrl_files (struct controller *ctrl) 93void shpchp_remove_ctrl_files(struct controller *ctrl)
140{ 94{
141 device_create_file (&ctrl->pci_dev->dev, &dev_attr_ctrl); 95 device_remove_file(&ctrl->pci_dev->dev, &dev_attr_ctrl);
142 device_create_file (&ctrl->pci_dev->dev, &dev_attr_dev);
143} 96}
diff --git a/drivers/pci/hotplug/shpchprm.h b/drivers/pci/hotplug/shpchprm.h
deleted file mode 100644
index 057b192ce589..000000000000
--- a/drivers/pci/hotplug/shpchprm.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * SHPCHPRM : SHPCHP Resource Manager for ACPI/non-ACPI platform
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
27 *
28 */
29
30#ifndef _SHPCHPRM_H_
31#define _SHPCHPRM_H_
32
33#ifdef CONFIG_HOTPLUG_PCI_SHPC_PHPRM_LEGACY
34#include "shpchprm_legacy.h"
35#else
36#include "shpchprm_nonacpi.h"
37#endif
38
39int shpchprm_init(enum php_ctlr_type ct);
40void shpchprm_cleanup(void);
41int shpchprm_print_pirt(void);
42int shpchprm_find_available_resources(struct controller *ctrl);
43int shpchprm_set_hpp(struct controller *ctrl, struct pci_func *func, u8 card_type);
44void shpchprm_enable_card(struct controller *ctrl, struct pci_func *func, u8 card_type);
45int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum);
46
47#ifdef DEBUG
48#define RES_CHECK(this, bits) \
49 { if (((this) & (bits - 1))) \
50 printk("%s:%d ERR: potential res loss!\n", __FUNCTION__, __LINE__); }
51#else
52#define RES_CHECK(this, bits)
53#endif
54
55#endif /* _SHPCHPRM_H_ */
diff --git a/drivers/pci/hotplug/shpchprm_acpi.c b/drivers/pci/hotplug/shpchprm_acpi.c
index d37b31658edf..17145e52223a 100644
--- a/drivers/pci/hotplug/shpchprm_acpi.c
+++ b/drivers/pci/hotplug/shpchprm_acpi.c
@@ -24,91 +24,19 @@
24 * 24 *
25 */ 25 */
26 26
27#include <linux/config.h>
28#include <linux/module.h> 27#include <linux/module.h>
29#include <linux/kernel.h> 28#include <linux/kernel.h>
30#include <linux/types.h> 29#include <linux/types.h>
31#include <linux/pci.h> 30#include <linux/pci.h>
32#include <linux/init.h>
33#include <linux/acpi.h>
34#include <linux/efi.h>
35#include <asm/uaccess.h>
36#include <asm/system.h>
37#ifdef CONFIG_IA64
38#include <asm/iosapic.h>
39#endif
40#include <acpi/acpi.h> 31#include <acpi/acpi.h>
41#include <acpi/acpi_bus.h> 32#include <acpi/acpi_bus.h>
42#include <acpi/actypes.h> 33#include <acpi/actypes.h>
43#include "shpchp.h" 34#include "shpchp.h"
44#include "shpchprm.h"
45
46#define PCI_MAX_BUS 0x100
47#define ACPI_STA_DEVICE_PRESENT 0x01
48 35
49#define METHOD_NAME__SUN "_SUN" 36#define METHOD_NAME__SUN "_SUN"
50#define METHOD_NAME__HPP "_HPP" 37#define METHOD_NAME__HPP "_HPP"
51#define METHOD_NAME_OSHP "OSHP" 38#define METHOD_NAME_OSHP "OSHP"
52 39
53#define PHP_RES_BUS 0xA0
54#define PHP_RES_IO 0xA1
55#define PHP_RES_MEM 0xA2
56#define PHP_RES_PMEM 0xA3
57
58#define BRIDGE_TYPE_P2P 0x00
59#define BRIDGE_TYPE_HOST 0x01
60
61/* this should go to drivers/acpi/include/ */
62struct acpi__hpp {
63 u8 cache_line_size;
64 u8 latency_timer;
65 u8 enable_serr;
66 u8 enable_perr;
67};
68
69struct acpi_php_slot {
70 struct acpi_php_slot *next;
71 struct acpi_bridge *bridge;
72 acpi_handle handle;
73 int seg;
74 int bus;
75 int dev;
76 int fun;
77 u32 sun;
78 struct pci_resource *mem_head;
79 struct pci_resource *p_mem_head;
80 struct pci_resource *io_head;
81 struct pci_resource *bus_head;
82 void *slot_ops; /* _STA, _EJx, etc */
83 struct slot *slot;
84}; /* per func */
85
86struct acpi_bridge {
87 struct acpi_bridge *parent;
88 struct acpi_bridge *next;
89 struct acpi_bridge *child;
90 acpi_handle handle;
91 int seg;
92 int pbus; /* pdev->bus->number */
93 int pdevice; /* PCI_SLOT(pdev->devfn) */
94 int pfunction; /* PCI_DEVFN(pdev->devfn) */
95 int bus; /* pdev->subordinate->number */
96 struct acpi__hpp *_hpp;
97 struct acpi_php_slot *slots;
98 struct pci_resource *tmem_head; /* total from crs */
99 struct pci_resource *tp_mem_head; /* total from crs */
100 struct pci_resource *tio_head; /* total from crs */
101 struct pci_resource *tbus_head; /* total from crs */
102 struct pci_resource *mem_head; /* available */
103 struct pci_resource *p_mem_head; /* available */
104 struct pci_resource *io_head; /* available */
105 struct pci_resource *bus_head; /* available */
106 int scanned;
107 int type;
108};
109
110static struct acpi_bridge *acpi_bridges_head;
111
112static u8 * acpi_path_name( acpi_handle handle) 40static u8 * acpi_path_name( acpi_handle handle)
113{ 41{
114 acpi_status status; 42 acpi_status status;
@@ -124,82 +52,43 @@ static u8 * acpi_path_name( acpi_handle handle)
124 return path_name; 52 return path_name;
125} 53}
126 54
127static void acpi_get__hpp ( struct acpi_bridge *ab); 55static acpi_status
128static void acpi_run_oshp ( struct acpi_bridge *ab); 56acpi_run_hpp(acpi_handle handle, struct hotplug_params *hpp)
129
130static int acpi_add_slot_to_php_slots(
131 struct acpi_bridge *ab,
132 int bus_num,
133 acpi_handle handle,
134 u32 adr,
135 u32 sun
136 )
137{
138 struct acpi_php_slot *aps;
139 static long samesun = -1;
140
141 aps = (struct acpi_php_slot *) kmalloc (sizeof(struct acpi_php_slot), GFP_KERNEL);
142 if (!aps) {
143 err ("acpi_shpchprm: alloc for aps fail\n");
144 return -1;
145 }
146 memset(aps, 0, sizeof(struct acpi_php_slot));
147
148 aps->handle = handle;
149 aps->bus = bus_num;
150 aps->dev = (adr >> 16) & 0xffff;
151 aps->fun = adr & 0xffff;
152 aps->sun = sun;
153
154 aps->next = ab->slots; /* cling to the bridge */
155 aps->bridge = ab;
156 ab->slots = aps;
157
158 ab->scanned += 1;
159 if (!ab->_hpp)
160 acpi_get__hpp(ab);
161
162 acpi_run_oshp(ab);
163
164 if (sun != samesun) {
165 info("acpi_shpchprm: Slot sun(%x) at s:b:d:f=0x%02x:%02x:%02x:%02x\n", aps->sun, ab->seg,
166 aps->bus, aps->dev, aps->fun);
167 samesun = sun;
168 }
169 return 0;
170}
171
172static void acpi_get__hpp ( struct acpi_bridge *ab)
173{ 57{
174 acpi_status status; 58 acpi_status status;
175 u8 nui[4]; 59 u8 nui[4];
176 struct acpi_buffer ret_buf = { 0, NULL}; 60 struct acpi_buffer ret_buf = { 0, NULL};
177 union acpi_object *ext_obj, *package; 61 union acpi_object *ext_obj, *package;
178 u8 *path_name = acpi_path_name(ab->handle); 62 u8 *path_name = acpi_path_name(handle);
179 int i, len = 0; 63 int i, len = 0;
180 64
181 /* get _hpp */ 65 /* get _hpp */
182 status = acpi_evaluate_object(ab->handle, METHOD_NAME__HPP, NULL, &ret_buf); 66 status = acpi_evaluate_object(handle, METHOD_NAME__HPP, NULL, &ret_buf);
183 switch (status) { 67 switch (status) {
184 case AE_BUFFER_OVERFLOW: 68 case AE_BUFFER_OVERFLOW:
185 ret_buf.pointer = kmalloc (ret_buf.length, GFP_KERNEL); 69 ret_buf.pointer = kmalloc (ret_buf.length, GFP_KERNEL);
186 if (!ret_buf.pointer) { 70 if (!ret_buf.pointer) {
187 err ("acpi_shpchprm:%s alloc for _HPP fail\n", path_name); 71 err ("%s:%s alloc for _HPP fail\n", __FUNCTION__,
188 return; 72 path_name);
73 return AE_NO_MEMORY;
189 } 74 }
190 status = acpi_evaluate_object(ab->handle, METHOD_NAME__HPP, NULL, &ret_buf); 75 status = acpi_evaluate_object(handle, METHOD_NAME__HPP,
76 NULL, &ret_buf);
191 if (ACPI_SUCCESS(status)) 77 if (ACPI_SUCCESS(status))
192 break; 78 break;
193 default: 79 default:
194 if (ACPI_FAILURE(status)) { 80 if (ACPI_FAILURE(status)) {
195 err("acpi_shpchprm:%s _HPP fail=0x%x\n", path_name, status); 81 dbg("%s:%s _HPP fail=0x%x\n", __FUNCTION__,
196 return; 82 path_name, status);
83 return status;
197 } 84 }
198 } 85 }
199 86
200 ext_obj = (union acpi_object *) ret_buf.pointer; 87 ext_obj = (union acpi_object *) ret_buf.pointer;
201 if (ext_obj->type != ACPI_TYPE_PACKAGE) { 88 if (ext_obj->type != ACPI_TYPE_PACKAGE) {
202 err ("acpi_shpchprm:%s _HPP obj not a package\n", path_name); 89 err ("%s:%s _HPP obj not a package\n", __FUNCTION__,
90 path_name);
91 status = AE_ERROR;
203 goto free_and_return; 92 goto free_and_return;
204 } 93 }
205 94
@@ -212,1353 +101,41 @@ static void acpi_get__hpp ( struct acpi_bridge *ab)
212 nui[i] = (u8)ext_obj->integer.value; 101 nui[i] = (u8)ext_obj->integer.value;
213 break; 102 break;
214 default: 103 default:
215 err ("acpi_shpchprm:%s _HPP obj type incorrect\n", path_name); 104 err ("%s:%s _HPP obj type incorrect\n", __FUNCTION__,
105 path_name);
106 status = AE_ERROR;
216 goto free_and_return; 107 goto free_and_return;
217 } 108 }
218 } 109 }
219 110
220 ab->_hpp = kmalloc (sizeof (struct acpi__hpp), GFP_KERNEL); 111 hpp->cache_line_size = nui[0];
221 if (!ab->_hpp) { 112 hpp->latency_timer = nui[1];
222 err ("acpi_shpchprm:%s alloc for _HPP failed\n", path_name); 113 hpp->enable_serr = nui[2];
223 goto free_and_return; 114 hpp->enable_perr = nui[3];
224 }
225 memset(ab->_hpp, 0, sizeof(struct acpi__hpp));
226 115
227 ab->_hpp->cache_line_size = nui[0]; 116 dbg(" _HPP: cache_line_size=0x%x\n", hpp->cache_line_size);
228 ab->_hpp->latency_timer = nui[1]; 117 dbg(" _HPP: latency timer =0x%x\n", hpp->latency_timer);
229 ab->_hpp->enable_serr = nui[2]; 118 dbg(" _HPP: enable SERR =0x%x\n", hpp->enable_serr);
230 ab->_hpp->enable_perr = nui[3]; 119 dbg(" _HPP: enable PERR =0x%x\n", hpp->enable_perr);
231
232 dbg(" _HPP: cache_line_size=0x%x\n", ab->_hpp->cache_line_size);
233 dbg(" _HPP: latency timer =0x%x\n", ab->_hpp->latency_timer);
234 dbg(" _HPP: enable SERR =0x%x\n", ab->_hpp->enable_serr);
235 dbg(" _HPP: enable PERR =0x%x\n", ab->_hpp->enable_perr);
236 120
237free_and_return: 121free_and_return:
238 kfree(ret_buf.pointer); 122 kfree(ret_buf.pointer);
239}
240
241static void acpi_run_oshp ( struct acpi_bridge *ab)
242{
243 acpi_status status;
244 u8 *path_name = acpi_path_name(ab->handle);
245
246 /* run OSHP */
247 status = acpi_evaluate_object(ab->handle, METHOD_NAME_OSHP, NULL, NULL);
248 if (ACPI_FAILURE(status)) {
249 err("acpi_pciehprm:%s OSHP fails=0x%x\n", path_name, status);
250 } else
251 dbg("acpi_pciehprm:%s OSHP passes =0x%x\n", path_name, status);
252 return;
253}
254
255static acpi_status acpi_evaluate_crs(
256 acpi_handle handle,
257 struct acpi_resource **retbuf
258 )
259{
260 acpi_status status;
261 struct acpi_buffer crsbuf;
262 u8 *path_name = acpi_path_name(handle);
263
264 crsbuf.length = 0;
265 crsbuf.pointer = NULL;
266
267 status = acpi_get_current_resources (handle, &crsbuf);
268
269 switch (status) {
270 case AE_BUFFER_OVERFLOW:
271 break; /* found */
272 case AE_NOT_FOUND:
273 dbg("acpi_shpchprm:%s _CRS not found\n", path_name);
274 return status;
275 default:
276 err ("acpi_shpchprm:%s _CRS fail=0x%x\n", path_name, status);
277 return status;
278 }
279
280 crsbuf.pointer = kmalloc (crsbuf.length, GFP_KERNEL);
281 if (!crsbuf.pointer) {
282 err ("acpi_shpchprm: alloc %ld bytes for %s _CRS fail\n", (ulong)crsbuf.length, path_name);
283 return AE_NO_MEMORY;
284 }
285
286 status = acpi_get_current_resources (handle, &crsbuf);
287 if (ACPI_FAILURE(status)) {
288 err("acpi_shpchprm: %s _CRS fail=0x%x.\n", path_name, status);
289 kfree(crsbuf.pointer);
290 return status;
291 }
292
293 *retbuf = crsbuf.pointer;
294
295 return status;
296}
297
298static void free_pci_resource ( struct pci_resource *aprh)
299{
300 struct pci_resource *res, *next;
301
302 for (res = aprh; res; res = next) {
303 next = res->next;
304 kfree(res);
305 }
306}
307
308static void print_pci_resource ( struct pci_resource *aprh)
309{
310 struct pci_resource *res;
311
312 for (res = aprh; res; res = res->next)
313 dbg(" base= 0x%x length= 0x%x\n", res->base, res->length);
314}
315
316static void print_slot_resources( struct acpi_php_slot *aps)
317{
318 if (aps->bus_head) {
319 dbg(" BUS Resources:\n");
320 print_pci_resource (aps->bus_head);
321 }
322
323 if (aps->io_head) {
324 dbg(" IO Resources:\n");
325 print_pci_resource (aps->io_head);
326 }
327
328 if (aps->mem_head) {
329 dbg(" MEM Resources:\n");
330 print_pci_resource (aps->mem_head);
331 }
332
333 if (aps->p_mem_head) {
334 dbg(" PMEM Resources:\n");
335 print_pci_resource (aps->p_mem_head);
336 }
337}
338
339static void print_pci_resources( struct acpi_bridge *ab)
340{
341 if (ab->tbus_head) {
342 dbg(" Total BUS Resources:\n");
343 print_pci_resource (ab->tbus_head);
344 }
345 if (ab->bus_head) {
346 dbg(" BUS Resources:\n");
347 print_pci_resource (ab->bus_head);
348 }
349
350 if (ab->tio_head) {
351 dbg(" Total IO Resources:\n");
352 print_pci_resource (ab->tio_head);
353 }
354 if (ab->io_head) {
355 dbg(" IO Resources:\n");
356 print_pci_resource (ab->io_head);
357 }
358
359 if (ab->tmem_head) {
360 dbg(" Total MEM Resources:\n");
361 print_pci_resource (ab->tmem_head);
362 }
363 if (ab->mem_head) {
364 dbg(" MEM Resources:\n");
365 print_pci_resource (ab->mem_head);
366 }
367
368 if (ab->tp_mem_head) {
369 dbg(" Total PMEM Resources:\n");
370 print_pci_resource (ab->tp_mem_head);
371 }
372 if (ab->p_mem_head) {
373 dbg(" PMEM Resources:\n");
374 print_pci_resource (ab->p_mem_head);
375 }
376 if (ab->_hpp) {
377 dbg(" _HPP: cache_line_size=0x%x\n", ab->_hpp->cache_line_size);
378 dbg(" _HPP: latency timer =0x%x\n", ab->_hpp->latency_timer);
379 dbg(" _HPP: enable SERR =0x%x\n", ab->_hpp->enable_serr);
380 dbg(" _HPP: enable PERR =0x%x\n", ab->_hpp->enable_perr);
381 }
382}
383
384static int shpchprm_delete_resource(
385 struct pci_resource **aprh,
386 ulong base,
387 ulong size)
388{
389 struct pci_resource *res;
390 struct pci_resource *prevnode;
391 struct pci_resource *split_node;
392 ulong tbase;
393
394 shpchp_resource_sort_and_combine(aprh);
395
396 for (res = *aprh; res; res = res->next) {
397 if (res->base > base)
398 continue;
399
400 if ((res->base + res->length) < (base + size))
401 continue;
402
403 if (res->base < base) {
404 tbase = base;
405
406 if ((res->length - (tbase - res->base)) < size)
407 continue;
408
409 split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
410 if (!split_node)
411 return -ENOMEM;
412
413 split_node->base = res->base;
414 split_node->length = tbase - res->base;
415 res->base = tbase;
416 res->length -= split_node->length;
417
418 split_node->next = res->next;
419 res->next = split_node;
420 }
421
422 if (res->length >= size) {
423 split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
424 if (!split_node)
425 return -ENOMEM;
426
427 split_node->base = res->base + size;
428 split_node->length = res->length - size;
429 res->length = size;
430
431 split_node->next = res->next;
432 res->next = split_node;
433 }
434
435 if (*aprh == res) {
436 *aprh = res->next;
437 } else {
438 prevnode = *aprh;
439 while (prevnode->next != res)
440 prevnode = prevnode->next;
441
442 prevnode->next = res->next;
443 }
444 res->next = NULL;
445 kfree(res);
446 break;
447 }
448
449 return 0;
450}
451
452static int shpchprm_delete_resources(
453 struct pci_resource **aprh,
454 struct pci_resource *this
455 )
456{
457 struct pci_resource *res;
458
459 for (res = this; res; res = res->next)
460 shpchprm_delete_resource(aprh, res->base, res->length);
461
462 return 0;
463}
464
465static int shpchprm_add_resource(
466 struct pci_resource **aprh,
467 ulong base,
468 ulong size)
469{
470 struct pci_resource *res;
471
472 for (res = *aprh; res; res = res->next) {
473 if ((res->base + res->length) == base) {
474 res->length += size;
475 size = 0L;
476 break;
477 }
478 if (res->next == *aprh)
479 break;
480 }
481
482 if (size) {
483 res = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
484 if (!res) {
485 err ("acpi_shpchprm: alloc for res fail\n");
486 return -ENOMEM;
487 }
488 memset(res, 0, sizeof (struct pci_resource));
489
490 res->base = base;
491 res->length = size;
492 res->next = *aprh;
493 *aprh = res;
494 }
495
496 return 0;
497}
498
499static int shpchprm_add_resources(
500 struct pci_resource **aprh,
501 struct pci_resource *this
502 )
503{
504 struct pci_resource *res;
505 int rc = 0;
506
507 for (res = this; res && !rc; res = res->next)
508 rc = shpchprm_add_resource(aprh, res->base, res->length);
509
510 return rc;
511}
512
513static void acpi_parse_io (
514 struct acpi_bridge *ab,
515 union acpi_resource_data *data
516 )
517{
518 struct acpi_resource_io *dataio;
519 dataio = (struct acpi_resource_io *) data;
520
521 dbg("Io Resource\n");
522 dbg(" %d bit decode\n", ACPI_DECODE_16 == dataio->io_decode ? 16:10);
523 dbg(" Range minimum base: %08X\n", dataio->min_base_address);
524 dbg(" Range maximum base: %08X\n", dataio->max_base_address);
525 dbg(" Alignment: %08X\n", dataio->alignment);
526 dbg(" Range Length: %08X\n", dataio->range_length);
527}
528
529static void acpi_parse_fixed_io (
530 struct acpi_bridge *ab,
531 union acpi_resource_data *data
532 )
533{
534 struct acpi_resource_fixed_io *datafio;
535 datafio = (struct acpi_resource_fixed_io *) data;
536
537 dbg("Fixed Io Resource\n");
538 dbg(" Range base address: %08X", datafio->base_address);
539 dbg(" Range length: %08X", datafio->range_length);
540}
541
542static void acpi_parse_address16_32 (
543 struct acpi_bridge *ab,
544 union acpi_resource_data *data,
545 acpi_resource_type id
546 )
547{
548 /*
549 * acpi_resource_address16 == acpi_resource_address32
550 * acpi_resource_address16 *data16 = (acpi_resource_address16 *) data;
551 */
552 struct acpi_resource_address32 *data32 = (struct acpi_resource_address32 *) data;
553 struct pci_resource **aprh, **tprh;
554
555 if (id == ACPI_RSTYPE_ADDRESS16)
556 dbg("acpi_shpchprm:16-Bit Address Space Resource\n");
557 else
558 dbg("acpi_shpchprm:32-Bit Address Space Resource\n");
559
560 switch (data32->resource_type) {
561 case ACPI_MEMORY_RANGE:
562 dbg(" Resource Type: Memory Range\n");
563 aprh = &ab->mem_head;
564 tprh = &ab->tmem_head;
565
566 switch (data32->attribute.memory.cache_attribute) {
567 case ACPI_NON_CACHEABLE_MEMORY:
568 dbg(" Type Specific: Noncacheable memory\n");
569 break;
570 case ACPI_CACHABLE_MEMORY:
571 dbg(" Type Specific: Cacheable memory\n");
572 break;
573 case ACPI_WRITE_COMBINING_MEMORY:
574 dbg(" Type Specific: Write-combining memory\n");
575 break;
576 case ACPI_PREFETCHABLE_MEMORY:
577 aprh = &ab->p_mem_head;
578 dbg(" Type Specific: Prefetchable memory\n");
579 break;
580 default:
581 dbg(" Type Specific: Invalid cache attribute\n");
582 break;
583 }
584
585 dbg(" Type Specific: Read%s\n", ACPI_READ_WRITE_MEMORY == data32->attribute.memory.read_write_attribute ? "/Write":" Only");
586 break;
587
588 case ACPI_IO_RANGE:
589 dbg(" Resource Type: I/O Range\n");
590 aprh = &ab->io_head;
591 tprh = &ab->tio_head;
592
593 switch (data32->attribute.io.range_attribute) {
594 case ACPI_NON_ISA_ONLY_RANGES:
595 dbg(" Type Specific: Non-ISA Io Addresses\n");
596 break;
597 case ACPI_ISA_ONLY_RANGES:
598 dbg(" Type Specific: ISA Io Addresses\n");
599 break;
600 case ACPI_ENTIRE_RANGE:
601 dbg(" Type Specific: ISA and non-ISA Io Addresses\n");
602 break;
603 default:
604 dbg(" Type Specific: Invalid range attribute\n");
605 break;
606 }
607 break;
608
609 case ACPI_BUS_NUMBER_RANGE:
610 dbg(" Resource Type: Bus Number Range(fixed)\n");
611 /* fixup to be compatible with the rest of php driver */
612 data32->min_address_range++;
613 data32->address_length--;
614 aprh = &ab->bus_head;
615 tprh = &ab->tbus_head;
616 break;
617 default:
618 dbg(" Resource Type: Invalid resource type. Exiting.\n");
619 return;
620 }
621
622 dbg(" Resource %s\n", ACPI_CONSUMER == data32->producer_consumer ? "Consumer":"Producer");
623 dbg(" %s decode\n", ACPI_SUB_DECODE == data32->decode ? "Subtractive":"Positive");
624 dbg(" Min address is %s fixed\n", ACPI_ADDRESS_FIXED == data32->min_address_fixed ? "":"not");
625 dbg(" Max address is %s fixed\n", ACPI_ADDRESS_FIXED == data32->max_address_fixed ? "":"not");
626 dbg(" Granularity: %08X\n", data32->granularity);
627 dbg(" Address range min: %08X\n", data32->min_address_range);
628 dbg(" Address range max: %08X\n", data32->max_address_range);
629 dbg(" Address translation offset: %08X\n", data32->address_translation_offset);
630 dbg(" Address Length: %08X\n", data32->address_length);
631
632 if (0xFF != data32->resource_source.index) {
633 dbg(" Resource Source Index: %X\n", data32->resource_source.index);
634 /* dbg(" Resource Source: %s\n", data32->resource_source.string_ptr); */
635 }
636
637 shpchprm_add_resource(aprh, data32->min_address_range, data32->address_length);
638}
639
640static acpi_status acpi_parse_crs(
641 struct acpi_bridge *ab,
642 struct acpi_resource *crsbuf
643 )
644{
645 acpi_status status = AE_OK;
646 struct acpi_resource *resource = crsbuf;
647 u8 count = 0;
648 u8 done = 0;
649
650 while (!done) {
651 dbg("acpi_shpchprm: PCI bus 0x%x Resource structure %x.\n", ab->bus, count++);
652 switch (resource->id) {
653 case ACPI_RSTYPE_IRQ:
654 dbg("Irq -------- Resource\n");
655 break;
656 case ACPI_RSTYPE_DMA:
657 dbg("DMA -------- Resource\n");
658 break;
659 case ACPI_RSTYPE_START_DPF:
660 dbg("Start DPF -------- Resource\n");
661 break;
662 case ACPI_RSTYPE_END_DPF:
663 dbg("End DPF -------- Resource\n");
664 break;
665 case ACPI_RSTYPE_IO:
666 acpi_parse_io (ab, &resource->data);
667 break;
668 case ACPI_RSTYPE_FIXED_IO:
669 acpi_parse_fixed_io (ab, &resource->data);
670 break;
671 case ACPI_RSTYPE_VENDOR:
672 dbg("Vendor -------- Resource\n");
673 break;
674 case ACPI_RSTYPE_END_TAG:
675 dbg("End_tag -------- Resource\n");
676 done = 1;
677 break;
678 case ACPI_RSTYPE_MEM24:
679 dbg("Mem24 -------- Resource\n");
680 break;
681 case ACPI_RSTYPE_MEM32:
682 dbg("Mem32 -------- Resource\n");
683 break;
684 case ACPI_RSTYPE_FIXED_MEM32:
685 dbg("Fixed Mem32 -------- Resource\n");
686 break;
687 case ACPI_RSTYPE_ADDRESS16:
688 acpi_parse_address16_32(ab, &resource->data, ACPI_RSTYPE_ADDRESS16);
689 break;
690 case ACPI_RSTYPE_ADDRESS32:
691 acpi_parse_address16_32(ab, &resource->data, ACPI_RSTYPE_ADDRESS32);
692 break;
693 case ACPI_RSTYPE_ADDRESS64:
694 info("Address64 -------- Resource unparsed\n");
695 break;
696 case ACPI_RSTYPE_EXT_IRQ:
697 dbg("Ext Irq -------- Resource\n");
698 break;
699 default:
700 dbg("Invalid -------- resource type 0x%x\n", resource->id);
701 break;
702 }
703
704 resource = (struct acpi_resource *) ((char *)resource + resource->length);
705 }
706
707 return status; 123 return status;
708} 124}
709 125
710static acpi_status acpi_get_crs( struct acpi_bridge *ab) 126static void acpi_run_oshp(acpi_handle handle)
711{ 127{
712 acpi_status status; 128 acpi_status status;
713 struct acpi_resource *crsbuf;
714
715 status = acpi_evaluate_crs(ab->handle, &crsbuf);
716 if (ACPI_SUCCESS(status)) {
717 status = acpi_parse_crs(ab, crsbuf);
718 kfree(crsbuf);
719
720 shpchp_resource_sort_and_combine(&ab->bus_head);
721 shpchp_resource_sort_and_combine(&ab->io_head);
722 shpchp_resource_sort_and_combine(&ab->mem_head);
723 shpchp_resource_sort_and_combine(&ab->p_mem_head);
724
725 shpchprm_add_resources (&ab->tbus_head, ab->bus_head);
726 shpchprm_add_resources (&ab->tio_head, ab->io_head);
727 shpchprm_add_resources (&ab->tmem_head, ab->mem_head);
728 shpchprm_add_resources (&ab->tp_mem_head, ab->p_mem_head);
729 }
730
731 return status;
732}
733
734/* find acpi_bridge downword from ab. */
735static struct acpi_bridge *
736find_acpi_bridge_by_bus(
737 struct acpi_bridge *ab,
738 int seg,
739 int bus /* pdev->subordinate->number */
740 )
741{
742 struct acpi_bridge *lab = NULL;
743
744 if (!ab)
745 return NULL;
746
747 if ((ab->bus == bus) && (ab->seg == seg))
748 return ab;
749
750 if (ab->child)
751 lab = find_acpi_bridge_by_bus(ab->child, seg, bus);
752
753 if (!lab)
754 if (ab->next)
755 lab = find_acpi_bridge_by_bus(ab->next, seg, bus);
756
757 return lab;
758}
759
760/*
761 * Build a device tree of ACPI PCI Bridges
762 */
763static void shpchprm_acpi_register_a_bridge (
764 struct acpi_bridge **head,
765 struct acpi_bridge *pab, /* parent bridge to which child bridge is added */
766 struct acpi_bridge *cab /* child bridge to add */
767 )
768{
769 struct acpi_bridge *lpab;
770 struct acpi_bridge *lcab;
771
772 lpab = find_acpi_bridge_by_bus(*head, pab->seg, pab->bus);
773 if (!lpab) {
774 if (!(pab->type & BRIDGE_TYPE_HOST))
775 warn("PCI parent bridge s:b(%x:%x) not in list.\n", pab->seg, pab->bus);
776 pab->next = *head;
777 *head = pab;
778 lpab = pab;
779 }
780
781 if ((cab->type & BRIDGE_TYPE_HOST) && (pab == cab))
782 return;
783
784 lcab = find_acpi_bridge_by_bus(*head, cab->seg, cab->bus);
785 if (lcab) {
786 if ((pab->bus != lcab->parent->bus) || (lcab->bus != cab->bus))
787 err("PCI child bridge s:b(%x:%x) in list with diff parent.\n", cab->seg, cab->bus);
788 return;
789 } else
790 lcab = cab;
791
792 lcab->parent = lpab;
793 lcab->next = lpab->child;
794 lpab->child = lcab;
795}
796
797static acpi_status shpchprm_acpi_build_php_slots_callback(
798 acpi_handle handle,
799 u32 Level,
800 void *context,
801 void **retval
802 )
803{
804 ulong bus_num;
805 ulong seg_num;
806 ulong sun, adr;
807 ulong padr = 0;
808 acpi_handle phandle = NULL;
809 struct acpi_bridge *pab = (struct acpi_bridge *)context;
810 struct acpi_bridge *lab;
811 acpi_status status;
812 u8 *path_name = acpi_path_name(handle); 129 u8 *path_name = acpi_path_name(handle);
813 130
814 /* get _SUN */ 131 /* run OSHP */
815 status = acpi_evaluate_integer(handle, METHOD_NAME__SUN, NULL, &sun); 132 status = acpi_evaluate_object(handle, METHOD_NAME_OSHP, NULL, NULL);
816 switch(status) {
817 case AE_NOT_FOUND:
818 return AE_OK;
819 default:
820 if (ACPI_FAILURE(status)) {
821 err("acpi_shpchprm:%s _SUN fail=0x%x\n", path_name, status);
822 return status;
823 }
824 }
825
826 /* get _ADR. _ADR must exist if _SUN exists */
827 status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
828 if (ACPI_FAILURE(status)) {
829 err("acpi_shpchprm:%s _ADR fail=0x%x\n", path_name, status);
830 return status;
831 }
832
833 dbg("acpi_shpchprm:%s sun=0x%08x adr=0x%08x\n", path_name, (u32)sun, (u32)adr);
834
835 status = acpi_get_parent(handle, &phandle);
836 if (ACPI_FAILURE(status)) { 133 if (ACPI_FAILURE(status)) {
837 err("acpi_shpchprm:%s get_parent fail=0x%x\n", path_name, status); 134 err("%s:%s OSHP fails=0x%x\n", __FUNCTION__, path_name,
838 return (status); 135 status);
839 }
840
841 bus_num = pab->bus;
842 seg_num = pab->seg;
843
844 if (pab->bus == bus_num) {
845 lab = pab;
846 } else { 136 } else {
847 dbg("WARN: pab is not parent\n"); 137 dbg("%s:%s OSHP passes\n", __FUNCTION__, path_name);
848 lab = find_acpi_bridge_by_bus(pab, seg_num, bus_num);
849 if (!lab) {
850 dbg("acpi_shpchprm: alloc new P2P bridge(%x) for sun(%08x)\n", (u32)bus_num, (u32)sun);
851 lab = (struct acpi_bridge *)kmalloc(sizeof(struct acpi_bridge), GFP_KERNEL);
852 if (!lab) {
853 err("acpi_shpchprm: alloc for ab fail\n");
854 return AE_NO_MEMORY;
855 }
856 memset(lab, 0, sizeof(struct acpi_bridge));
857
858 lab->handle = phandle;
859 lab->pbus = pab->bus;
860 lab->pdevice = (int)(padr >> 16) & 0xffff;
861 lab->pfunction = (int)(padr & 0xffff);
862 lab->bus = (int)bus_num;
863 lab->scanned = 0;
864 lab->type = BRIDGE_TYPE_P2P;
865
866 shpchprm_acpi_register_a_bridge (&acpi_bridges_head, pab, lab);
867 } else
868 dbg("acpi_shpchprm: found P2P bridge(%x) for sun(%08x)\n", (u32)bus_num, (u32)sun);
869 } 138 }
870
871 acpi_add_slot_to_php_slots(lab, (int)bus_num, handle, (u32)adr, (u32)sun);
872 return (status);
873}
874
875static int shpchprm_acpi_build_php_slots(
876 struct acpi_bridge *ab,
877 u32 depth
878 )
879{
880 acpi_status status;
881 u8 *path_name = acpi_path_name(ab->handle);
882
883 /* Walk down this pci bridge to get _SUNs if any behind P2P */
884 status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
885 ab->handle,
886 depth,
887 shpchprm_acpi_build_php_slots_callback,
888 ab,
889 NULL );
890 if (ACPI_FAILURE(status)) {
891 dbg("acpi_shpchprm:%s walk for _SUN on pci bridge seg:bus(%x:%x) fail=0x%x\n", path_name, ab->seg, ab->bus, status);
892 return -1;
893 }
894
895 return 0;
896}
897
898static void build_a_bridge(
899 struct acpi_bridge *pab,
900 struct acpi_bridge *ab
901 )
902{
903 u8 *path_name = acpi_path_name(ab->handle);
904
905 shpchprm_acpi_register_a_bridge (&acpi_bridges_head, pab, ab);
906
907 switch (ab->type) {
908 case BRIDGE_TYPE_HOST:
909 dbg("acpi_shpchprm: Registered PCI HOST Bridge(%02x) on s:b:d:f(%02x:%02x:%02x:%02x) [%s]\n",
910 ab->bus, ab->seg, ab->pbus, ab->pdevice, ab->pfunction, path_name);
911 break;
912 case BRIDGE_TYPE_P2P:
913 dbg("acpi_shpchprm: Registered PCI P2P Bridge(%02x-%02x) on s:b:d:f(%02x:%02x:%02x:%02x) [%s]\n",
914 ab->pbus, ab->bus, ab->seg, ab->pbus, ab->pdevice, ab->pfunction, path_name);
915 break;
916 };
917
918 /* build any immediate PHP slots under this pci bridge */
919 shpchprm_acpi_build_php_slots(ab, 1);
920}
921
922static struct acpi_bridge * add_p2p_bridge(
923 acpi_handle handle,
924 struct acpi_bridge *pab, /* parent */
925 ulong adr
926 )
927{
928 struct acpi_bridge *ab;
929 struct pci_dev *pdev;
930 ulong devnum, funcnum;
931 u8 *path_name = acpi_path_name(handle);
932
933 ab = (struct acpi_bridge *) kmalloc (sizeof(struct acpi_bridge), GFP_KERNEL);
934 if (!ab) {
935 err("acpi_shpchprm: alloc for ab fail\n");
936 return NULL;
937 }
938 memset(ab, 0, sizeof(struct acpi_bridge));
939
940 devnum = (adr >> 16) & 0xffff;
941 funcnum = adr & 0xffff;
942
943 pdev = pci_find_slot(pab->bus, PCI_DEVFN(devnum, funcnum));
944 if (!pdev || !pdev->subordinate) {
945 err("acpi_shpchprm:%s is not a P2P Bridge\n", path_name);
946 kfree(ab);
947 return NULL;
948 }
949
950 ab->handle = handle;
951 ab->seg = pab->seg;
952 ab->pbus = pab->bus; /* or pdev->bus->number */
953 ab->pdevice = devnum; /* or PCI_SLOT(pdev->devfn) */
954 ab->pfunction = funcnum; /* or PCI_FUNC(pdev->devfn) */
955 ab->bus = pdev->subordinate->number;
956 ab->scanned = 0;
957 ab->type = BRIDGE_TYPE_P2P;
958
959 dbg("acpi_shpchprm: P2P(%x-%x) on pci=b:d:f(%x:%x:%x) acpi=b:d:f(%x:%x:%x) [%s]\n",
960 pab->bus, ab->bus, pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
961 pab->bus, (u32)devnum, (u32)funcnum, path_name);
962
963 build_a_bridge(pab, ab);
964
965 return ab;
966}
967
968static acpi_status scan_p2p_bridge(
969 acpi_handle handle,
970 u32 Level,
971 void *context,
972 void **retval
973 )
974{
975 struct acpi_bridge *pab = (struct acpi_bridge *)context;
976 struct acpi_bridge *ab;
977 acpi_status status;
978 ulong adr = 0;
979 u8 *path_name = acpi_path_name(handle);
980 ulong devnum, funcnum;
981 struct pci_dev *pdev;
982
983 /* get device, function */
984 status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
985 if (ACPI_FAILURE(status)) {
986 if (status != AE_NOT_FOUND)
987 err("acpi_shpchprm:%s _ADR fail=0x%x\n", path_name, status);
988 return AE_OK;
989 }
990
991 devnum = (adr >> 16) & 0xffff;
992 funcnum = adr & 0xffff;
993
994 pdev = pci_find_slot(pab->bus, PCI_DEVFN(devnum, funcnum));
995 if (!pdev)
996 return AE_OK;
997 if (!pdev->subordinate)
998 return AE_OK;
999
1000 ab = add_p2p_bridge(handle, pab, adr);
1001 if (ab) {
1002 status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
1003 handle,
1004 (u32)1,
1005 scan_p2p_bridge,
1006 ab,
1007 NULL);
1008 if (ACPI_FAILURE(status))
1009 dbg("acpi_shpchprm:%s find_p2p fail=0x%x\n", path_name, status);
1010 }
1011
1012 return AE_OK;
1013}
1014
1015static struct acpi_bridge * add_host_bridge(
1016 acpi_handle handle,
1017 ulong segnum,
1018 ulong busnum
1019 )
1020{
1021 ulong adr = 0;
1022 acpi_status status;
1023 struct acpi_bridge *ab;
1024 u8 *path_name = acpi_path_name(handle);
1025
1026 /* get device, function: host br adr is always 0000 though. */
1027 status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
1028 if (ACPI_FAILURE(status)) {
1029 err("acpi_shpchprm:%s _ADR fail=0x%x\n", path_name, status);
1030 return NULL;
1031 }
1032 dbg("acpi_shpchprm: ROOT PCI seg(0x%x)bus(0x%x)dev(0x%x)func(0x%x) [%s]\n", (u32)segnum, (u32)busnum,
1033 (u32)(adr >> 16) & 0xffff, (u32)adr & 0xffff, path_name);
1034
1035 ab = (struct acpi_bridge *) kmalloc (sizeof(struct acpi_bridge), GFP_KERNEL);
1036 if (!ab) {
1037 err("acpi_shpchprm: alloc for ab fail\n");
1038 return NULL;
1039 }
1040 memset(ab, 0, sizeof(struct acpi_bridge));
1041
1042 ab->handle = handle;
1043 ab->seg = (int)segnum;
1044 ab->bus = ab->pbus = (int)busnum;
1045 ab->pdevice = (int)(adr >> 16) & 0xffff;
1046 ab->pfunction = (int)(adr & 0xffff);
1047 ab->scanned = 0;
1048 ab->type = BRIDGE_TYPE_HOST;
1049
1050 /* get root pci bridge's current resources */
1051 status = acpi_get_crs(ab);
1052 if (ACPI_FAILURE(status)) {
1053 err("acpi_shpchprm:%s evaluate _CRS fail=0x%x\n", path_name, status);
1054 kfree(ab);
1055 return NULL;
1056 }
1057 build_a_bridge(ab, ab);
1058
1059 return ab;
1060}
1061
1062static acpi_status acpi_scan_from_root_pci_callback (
1063 acpi_handle handle,
1064 u32 Level,
1065 void *context,
1066 void **retval
1067 )
1068{
1069 ulong segnum = 0;
1070 ulong busnum = 0;
1071 acpi_status status;
1072 struct acpi_bridge *ab;
1073 u8 *path_name = acpi_path_name(handle);
1074
1075 /* get bus number of this pci root bridge */
1076 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL, &segnum);
1077 if (ACPI_FAILURE(status)) {
1078 if (status != AE_NOT_FOUND) {
1079 err("acpi_shpchprm:%s evaluate _SEG fail=0x%x\n", path_name, status);
1080 return status;
1081 }
1082 segnum = 0;
1083 }
1084
1085 /* get bus number of this pci root bridge */
1086 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN, NULL, &busnum);
1087 if (ACPI_FAILURE(status)) {
1088 err("acpi_shpchprm:%s evaluate _BBN fail=0x%x\n", path_name, status);
1089 return (status);
1090 }
1091
1092 ab = add_host_bridge(handle, segnum, busnum);
1093 if (ab) {
1094 status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
1095 handle,
1096 1,
1097 scan_p2p_bridge,
1098 ab,
1099 NULL);
1100 if (ACPI_FAILURE(status))
1101 dbg("acpi_shpchprm:%s find_p2p fail=0x%x\n", path_name, status);
1102 }
1103
1104 return AE_OK;
1105}
1106
1107static int shpchprm_acpi_scan_pci (void)
1108{
1109 acpi_status status;
1110
1111 /*
1112 * TBD: traverse LDM device tree with the help of
1113 * unified ACPI augmented for php device population.
1114 */
1115 status = acpi_get_devices ( PCI_ROOT_HID_STRING,
1116 acpi_scan_from_root_pci_callback,
1117 NULL,
1118 NULL );
1119 if (ACPI_FAILURE(status)) {
1120 err("acpi_shpchprm:get_device PCI ROOT HID fail=0x%x\n", status);
1121 return -1;
1122 }
1123
1124 return 0;
1125}
1126
1127int shpchprm_init(enum php_ctlr_type ctlr_type)
1128{
1129 int rc;
1130
1131 if (ctlr_type != PCI)
1132 return -ENODEV;
1133
1134 dbg("shpchprm ACPI init <enter>\n");
1135 acpi_bridges_head = NULL;
1136
1137 /* construct PCI bus:device tree of acpi_handles */
1138 rc = shpchprm_acpi_scan_pci();
1139 if (rc)
1140 return rc;
1141
1142 dbg("shpchprm ACPI init %s\n", (rc)?"fail":"success");
1143 return rc;
1144}
1145
1146static void free_a_slot(struct acpi_php_slot *aps)
1147{
1148 dbg(" free a php func of slot(0x%02x) on PCI b:d:f=0x%02x:%02x:%02x\n", aps->sun, aps->bus, aps->dev, aps->fun);
1149
1150 free_pci_resource (aps->io_head);
1151 free_pci_resource (aps->bus_head);
1152 free_pci_resource (aps->mem_head);
1153 free_pci_resource (aps->p_mem_head);
1154
1155 kfree(aps);
1156}
1157
1158static void free_a_bridge( struct acpi_bridge *ab)
1159{
1160 struct acpi_php_slot *aps, *next;
1161
1162 switch (ab->type) {
1163 case BRIDGE_TYPE_HOST:
1164 dbg("Free ACPI PCI HOST Bridge(%x) [%s] on s:b:d:f(%x:%x:%x:%x)\n",
1165 ab->bus, acpi_path_name(ab->handle), ab->seg, ab->pbus, ab->pdevice, ab->pfunction);
1166 break;
1167 case BRIDGE_TYPE_P2P:
1168 dbg("Free ACPI PCI P2P Bridge(%x-%x) [%s] on s:b:d:f(%x:%x:%x:%x)\n",
1169 ab->pbus, ab->bus, acpi_path_name(ab->handle), ab->seg, ab->pbus, ab->pdevice, ab->pfunction);
1170 break;
1171 };
1172
1173 /* free slots first */
1174 for (aps = ab->slots; aps; aps = next) {
1175 next = aps->next;
1176 free_a_slot(aps);
1177 }
1178
1179 free_pci_resource (ab->io_head);
1180 free_pci_resource (ab->tio_head);
1181 free_pci_resource (ab->bus_head);
1182 free_pci_resource (ab->tbus_head);
1183 free_pci_resource (ab->mem_head);
1184 free_pci_resource (ab->tmem_head);
1185 free_pci_resource (ab->p_mem_head);
1186 free_pci_resource (ab->tp_mem_head);
1187
1188 kfree(ab);
1189}
1190
1191static void shpchprm_free_bridges ( struct acpi_bridge *ab)
1192{
1193 if (!ab)
1194 return;
1195
1196 if (ab->child)
1197 shpchprm_free_bridges (ab->child);
1198
1199 if (ab->next)
1200 shpchprm_free_bridges (ab->next);
1201
1202 free_a_bridge(ab);
1203}
1204
1205void shpchprm_cleanup(void)
1206{
1207 shpchprm_free_bridges (acpi_bridges_head);
1208}
1209
1210static int get_number_of_slots (
1211 struct acpi_bridge *ab,
1212 int selfonly
1213 )
1214{
1215 struct acpi_php_slot *aps;
1216 int prev_slot = -1;
1217 int slot_num = 0;
1218
1219 for ( aps = ab->slots; aps; aps = aps->next)
1220 if (aps->dev != prev_slot) {
1221 prev_slot = aps->dev;
1222 slot_num++;
1223 }
1224
1225 if (ab->child)
1226 slot_num += get_number_of_slots (ab->child, 0);
1227
1228 if (selfonly)
1229 return slot_num;
1230
1231 if (ab->next)
1232 slot_num += get_number_of_slots (ab->next, 0);
1233
1234 return slot_num;
1235}
1236
1237static int print_acpi_resources (struct acpi_bridge *ab)
1238{
1239 struct acpi_php_slot *aps;
1240 int i;
1241
1242 switch (ab->type) {
1243 case BRIDGE_TYPE_HOST:
1244 dbg("PCI HOST Bridge (%x) [%s]\n", ab->bus, acpi_path_name(ab->handle));
1245 break;
1246 case BRIDGE_TYPE_P2P:
1247 dbg("PCI P2P Bridge (%x-%x) [%s]\n", ab->pbus, ab->bus, acpi_path_name(ab->handle));
1248 break;
1249 };
1250
1251 print_pci_resources (ab);
1252
1253 for ( i = -1, aps = ab->slots; aps; aps = aps->next) {
1254 if (aps->dev == i)
1255 continue;
1256 dbg(" Slot sun(%x) s:b:d:f(%02x:%02x:%02x:%02x)\n", aps->sun, aps->seg, aps->bus, aps->dev, aps->fun);
1257 print_slot_resources(aps);
1258 i = aps->dev;
1259 }
1260
1261 if (ab->child)
1262 print_acpi_resources (ab->child);
1263
1264 if (ab->next)
1265 print_acpi_resources (ab->next);
1266
1267 return 0;
1268}
1269
1270int shpchprm_print_pirt(void)
1271{
1272 dbg("SHPCHPRM ACPI Slots\n");
1273 if (acpi_bridges_head)
1274 print_acpi_resources (acpi_bridges_head);
1275 return 0;
1276}
1277
1278static struct acpi_php_slot * get_acpi_slot (
1279 struct acpi_bridge *ab,
1280 u32 sun
1281 )
1282{
1283 struct acpi_php_slot *aps = NULL;
1284
1285 for ( aps = ab->slots; aps; aps = aps->next)
1286 if (aps->sun == sun)
1287 return aps;
1288
1289 if (!aps && ab->child) {
1290 aps = (struct acpi_php_slot *)get_acpi_slot (ab->child, sun);
1291 if (aps)
1292 return aps;
1293 }
1294
1295 if (!aps && ab->next) {
1296 aps = (struct acpi_php_slot *)get_acpi_slot (ab->next, sun);
1297 if (aps)
1298 return aps;
1299 }
1300
1301 return aps;
1302
1303}
1304
1305#if 0
1306static void * shpchprm_get_slot(struct slot *slot)
1307{
1308 struct acpi_bridge *ab = acpi_bridges_head;
1309 struct acpi_php_slot *aps = get_acpi_slot (ab, slot->number);
1310
1311 aps->slot = slot;
1312
1313 dbg("Got acpi slot sun(%x): s:b:d:f(%x:%x:%x:%x)\n", aps->sun, aps->seg, aps->bus, aps->dev, aps->fun);
1314
1315 return (void *)aps;
1316}
1317#endif
1318
1319static void shpchprm_dump_func_res( struct pci_func *fun)
1320{
1321 struct pci_func *func = fun;
1322
1323 if (func->bus_head) {
1324 dbg(": BUS Resources:\n");
1325 print_pci_resource (func->bus_head);
1326 }
1327 if (func->io_head) {
1328 dbg(": IO Resources:\n");
1329 print_pci_resource (func->io_head);
1330 }
1331 if (func->mem_head) {
1332 dbg(": MEM Resources:\n");
1333 print_pci_resource (func->mem_head);
1334 }
1335 if (func->p_mem_head) {
1336 dbg(": PMEM Resources:\n");
1337 print_pci_resource (func->p_mem_head);
1338 }
1339}
1340
1341static void shpchprm_dump_ctrl_res( struct controller *ctlr)
1342{
1343 struct controller *ctrl = ctlr;
1344
1345 if (ctrl->bus_head) {
1346 dbg(": BUS Resources:\n");
1347 print_pci_resource (ctrl->bus_head);
1348 }
1349 if (ctrl->io_head) {
1350 dbg(": IO Resources:\n");
1351 print_pci_resource (ctrl->io_head);
1352 }
1353 if (ctrl->mem_head) {
1354 dbg(": MEM Resources:\n");
1355 print_pci_resource (ctrl->mem_head);
1356 }
1357 if (ctrl->p_mem_head) {
1358 dbg(": PMEM Resources:\n");
1359 print_pci_resource (ctrl->p_mem_head);
1360 }
1361}
1362
1363static int shpchprm_get_used_resources (
1364 struct controller *ctrl,
1365 struct pci_func *func
1366 )
1367{
1368 return shpchp_save_used_resources (ctrl, func, !DISABLE_CARD);
1369}
1370
1371static int configure_existing_function(
1372 struct controller *ctrl,
1373 struct pci_func *func
1374 )
1375{
1376 int rc;
1377
1378 /* see how much resources the func has used. */
1379 rc = shpchprm_get_used_resources (ctrl, func);
1380
1381 if (!rc) {
1382 /* subtract the resources used by the func from ctrl resources */
1383 rc = shpchprm_delete_resources (&ctrl->bus_head, func->bus_head);
1384 rc |= shpchprm_delete_resources (&ctrl->io_head, func->io_head);
1385 rc |= shpchprm_delete_resources (&ctrl->mem_head, func->mem_head);
1386 rc |= shpchprm_delete_resources (&ctrl->p_mem_head, func->p_mem_head);
1387 if (rc)
1388 warn("aCEF: cannot del used resources\n");
1389 } else
1390 err("aCEF: cannot get used resources\n");
1391
1392 return rc;
1393}
1394
1395static int bind_pci_resources_to_slots ( struct controller *ctrl)
1396{
1397 struct pci_func *func, new_func;
1398 int busn = ctrl->slot_bus;
1399 int devn, funn;
1400 u32 vid;
1401
1402 for (devn = 0; devn < 32; devn++) {
1403 for (funn = 0; funn < 8; funn++) {
1404 /*
1405 if (devn == ctrl->device && funn == ctrl->function)
1406 continue;
1407 */
1408 /* find out if this entry is for an occupied slot */
1409 vid = 0xFFFFFFFF;
1410 pci_bus_read_config_dword(ctrl->pci_dev->subordinate, PCI_DEVFN(devn, funn), PCI_VENDOR_ID, &vid);
1411
1412 if (vid != 0xFFFFFFFF) {
1413 func = shpchp_slot_find(busn, devn, funn);
1414 if (!func) {
1415 memset(&new_func, 0, sizeof(struct pci_func));
1416 new_func.bus = busn;
1417 new_func.device = devn;
1418 new_func.function = funn;
1419 new_func.is_a_board = 1;
1420 configure_existing_function(ctrl, &new_func);
1421 shpchprm_dump_func_res(&new_func);
1422 } else {
1423 configure_existing_function(ctrl, func);
1424 shpchprm_dump_func_res(func);
1425 }
1426 dbg("aCCF:existing PCI 0x%x Func ResourceDump\n", ctrl->bus);
1427 }
1428 }
1429 }
1430
1431 return 0;
1432}
1433
1434static int bind_pci_resources(
1435 struct controller *ctrl,
1436 struct acpi_bridge *ab
1437 )
1438{
1439 int status = 0;
1440
1441 if (ab->bus_head) {
1442 dbg("bapr: BUS Resources add on PCI 0x%x\n", ab->bus);
1443 status = shpchprm_add_resources (&ctrl->bus_head, ab->bus_head);
1444 if (shpchprm_delete_resources (&ab->bus_head, ctrl->bus_head))
1445 warn("bapr: cannot sub BUS Resource on PCI 0x%x\n", ab->bus);
1446 if (status) {
1447 err("bapr: BUS Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1448 return status;
1449 }
1450 } else
1451 info("bapr: No BUS Resource on PCI 0x%x.\n", ab->bus);
1452
1453 if (ab->io_head) {
1454 dbg("bapr: IO Resources add on PCI 0x%x\n", ab->bus);
1455 status = shpchprm_add_resources (&ctrl->io_head, ab->io_head);
1456 if (shpchprm_delete_resources (&ab->io_head, ctrl->io_head))
1457 warn("bapr: cannot sub IO Resource on PCI 0x%x\n", ab->bus);
1458 if (status) {
1459 err("bapr: IO Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1460 return status;
1461 }
1462 } else
1463 info("bapr: No IO Resource on PCI 0x%x.\n", ab->bus);
1464
1465 if (ab->mem_head) {
1466 dbg("bapr: MEM Resources add on PCI 0x%x\n", ab->bus);
1467 status = shpchprm_add_resources (&ctrl->mem_head, ab->mem_head);
1468 if (shpchprm_delete_resources (&ab->mem_head, ctrl->mem_head))
1469 warn("bapr: cannot sub MEM Resource on PCI 0x%x\n", ab->bus);
1470 if (status) {
1471 err("bapr: MEM Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1472 return status;
1473 }
1474 } else
1475 info("bapr: No MEM Resource on PCI 0x%x.\n", ab->bus);
1476
1477 if (ab->p_mem_head) {
1478 dbg("bapr: PMEM Resources add on PCI 0x%x\n", ab->bus);
1479 status = shpchprm_add_resources (&ctrl->p_mem_head, ab->p_mem_head);
1480 if (shpchprm_delete_resources (&ab->p_mem_head, ctrl->p_mem_head))
1481 warn("bapr: cannot sub PMEM Resource on PCI 0x%x\n", ab->bus);
1482 if (status) {
1483 err("bapr: PMEM Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1484 return status;
1485 }
1486 } else
1487 info("bapr: No PMEM Resource on PCI 0x%x.\n", ab->bus);
1488
1489 return status;
1490}
1491
1492static int no_pci_resources( struct acpi_bridge *ab)
1493{
1494 return !(ab->p_mem_head || ab->mem_head || ab->io_head || ab->bus_head);
1495}
1496
1497static int find_pci_bridge_resources (
1498 struct controller *ctrl,
1499 struct acpi_bridge *ab
1500 )
1501{
1502 int rc = 0;
1503 struct pci_func func;
1504
1505 memset(&func, 0, sizeof(struct pci_func));
1506
1507 func.bus = ab->pbus;
1508 func.device = ab->pdevice;
1509 func.function = ab->pfunction;
1510 func.is_a_board = 1;
1511
1512 /* Get used resources for this PCI bridge */
1513 rc = shpchp_save_used_resources (ctrl, &func, !DISABLE_CARD);
1514
1515 ab->io_head = func.io_head;
1516 ab->mem_head = func.mem_head;
1517 ab->p_mem_head = func.p_mem_head;
1518 ab->bus_head = func.bus_head;
1519 if (ab->bus_head)
1520 shpchprm_delete_resource(&ab->bus_head, ctrl->bus, 1);
1521
1522 return rc;
1523}
1524
1525static int get_pci_resources_from_bridge(
1526 struct controller *ctrl,
1527 struct acpi_bridge *ab
1528 )
1529{
1530 int rc = 0;
1531
1532 dbg("grfb: Get Resources for PCI 0x%x from actual PCI bridge 0x%x.\n", ctrl->bus, ab->bus);
1533
1534 rc = find_pci_bridge_resources (ctrl, ab);
1535
1536 shpchp_resource_sort_and_combine(&ab->bus_head);
1537 shpchp_resource_sort_and_combine(&ab->io_head);
1538 shpchp_resource_sort_and_combine(&ab->mem_head);
1539 shpchp_resource_sort_and_combine(&ab->p_mem_head);
1540
1541 shpchprm_add_resources (&ab->tbus_head, ab->bus_head);
1542 shpchprm_add_resources (&ab->tio_head, ab->io_head);
1543 shpchprm_add_resources (&ab->tmem_head, ab->mem_head);
1544 shpchprm_add_resources (&ab->tp_mem_head, ab->p_mem_head);
1545
1546 return rc;
1547}
1548
1549static int get_pci_resources(
1550 struct controller *ctrl,
1551 struct acpi_bridge *ab
1552 )
1553{
1554 int rc = 0;
1555
1556 if (no_pci_resources(ab)) {
1557 dbg("spbr:PCI 0x%x has no resources. Get parent resources.\n", ab->bus);
1558 rc = get_pci_resources_from_bridge(ctrl, ab);
1559 }
1560
1561 return rc;
1562} 139}
1563 140
1564int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum) 141int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
@@ -1570,144 +147,40 @@ int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busn
1570 return 0; 147 return 0;
1571} 148}
1572 149
1573/* 150void get_hp_hw_control_from_firmware(struct pci_dev *dev)
1574 * Get resources for this ctrl.
1575 * 1. get total resources from ACPI _CRS or bridge (this ctrl)
1576 * 2. find used resources of existing adapters
1577 * 3. subtract used resources from total resources
1578 */
1579int shpchprm_find_available_resources( struct controller *ctrl)
1580{ 151{
1581 int rc = 0; 152 /*
1582 struct acpi_bridge *ab; 153 * OSHP is an optional ACPI firmware control method. If present,
1583 154 * we need to run it to inform BIOS that we will control SHPC
1584 ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->pci_dev->subordinate->number); 155 * hardware from now on.
1585 if (!ab) { 156 */
1586 err("pfar:cannot locate acpi bridge of PCI 0x%x.\n", ctrl->pci_dev->subordinate->number); 157 acpi_handle handle = DEVICE_ACPI_HANDLE(&(dev->dev));
1587 return -1; 158 if (!handle)
1588 } 159 return;
1589 if (no_pci_resources(ab)) { 160 acpi_run_oshp(handle);
1590 rc = get_pci_resources(ctrl, ab);
1591 if (rc) {
1592 err("pfar:cannot get pci resources of PCI 0x%x.\n",ctrl->pci_dev->subordinate->number);
1593 return -1;
1594 }
1595 }
1596
1597 rc = bind_pci_resources(ctrl, ab);
1598 dbg("pfar:pre-Bind PCI 0x%x Ctrl Resource Dump\n", ctrl->pci_dev->subordinate->number);
1599 shpchprm_dump_ctrl_res(ctrl);
1600
1601 bind_pci_resources_to_slots (ctrl);
1602
1603 dbg("pfar:post-Bind PCI 0x%x Ctrl Resource Dump\n", ctrl->pci_dev->subordinate->number);
1604 shpchprm_dump_ctrl_res(ctrl);
1605
1606 return rc;
1607}
1608
1609int shpchprm_set_hpp(
1610 struct controller *ctrl,
1611 struct pci_func *func,
1612 u8 card_type
1613 )
1614{
1615 struct acpi_bridge *ab;
1616 struct pci_bus lpci_bus, *pci_bus;
1617 int rc = 0;
1618 unsigned int devfn;
1619 u8 cls= 0x08; /* default cache line size */
1620 u8 lt = 0x40; /* default latency timer */
1621 u8 ep = 0;
1622 u8 es = 0;
1623
1624 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
1625 pci_bus = &lpci_bus;
1626 pci_bus->number = func->bus;
1627 devfn = PCI_DEVFN(func->device, func->function);
1628
1629 ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->slot_bus);
1630
1631 if (ab) {
1632 if (ab->_hpp) {
1633 lt = (u8)ab->_hpp->latency_timer;
1634 cls = (u8)ab->_hpp->cache_line_size;
1635 ep = (u8)ab->_hpp->enable_perr;
1636 es = (u8)ab->_hpp->enable_serr;
1637 } else
1638 dbg("_hpp: no _hpp for B/D/F=%#x/%#x/%#x. use default value\n", func->bus, func->device, func->function);
1639 } else
1640 dbg("_hpp: no acpi bridge for B/D/F = %#x/%#x/%#x. use default value\n", func->bus, func->device, func->function);
1641
1642
1643 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
1644 /* set subordinate Latency Timer */
1645 rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, lt);
1646 }
1647
1648 /* set base Latency Timer */
1649 rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, lt);
1650 dbg(" set latency timer =0x%02x: %x\n", lt, rc);
1651
1652 rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, cls);
1653 dbg(" set cache_line_size=0x%02x: %x\n", cls, rc);
1654
1655 return rc;
1656} 161}
1657 162
1658void shpchprm_enable_card( 163void get_hp_params_from_firmware(struct pci_dev *dev,
1659 struct controller *ctrl, 164 struct hotplug_params *hpp)
1660 struct pci_func *func,
1661 u8 card_type)
1662{ 165{
1663 u16 command, cmd, bcommand, bcmd; 166 acpi_status status = AE_NOT_FOUND;
1664 struct pci_bus lpci_bus, *pci_bus; 167 struct pci_dev *pdev = dev;
1665 struct acpi_bridge *ab;
1666 unsigned int devfn;
1667 int rc;
1668
1669 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
1670 pci_bus = &lpci_bus;
1671 pci_bus->number = func->bus;
1672 devfn = PCI_DEVFN(func->device, func->function);
1673
1674 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
1675
1676 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
1677 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
1678 }
1679 168
1680 cmd = command = command | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE 169 /*
1681 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY; 170 * _HPP settings apply to all child buses, until another _HPP is
1682 bcmd = bcommand = bcommand | PCI_BRIDGE_CTL_NO_ISA; 171 * encountered. If we don't find an _HPP for the input pci dev,
1683 172 * look for it in the parent device scope since that would apply to
1684 ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->slot_bus); 173 * this pci dev. If we don't find any _HPP, use hardcoded defaults
1685 if (ab) { 174 */
1686 if (ab->_hpp) { 175 while (pdev && (ACPI_FAILURE(status))) {
1687 if (ab->_hpp->enable_perr) { 176 acpi_handle handle = DEVICE_ACPI_HANDLE(&(pdev->dev));
1688 command |= PCI_COMMAND_PARITY; 177 if (!handle)
1689 bcommand |= PCI_BRIDGE_CTL_PARITY; 178 break;
1690 } else { 179 status = acpi_run_hpp(handle, hpp);
1691 command &= ~PCI_COMMAND_PARITY; 180 if (!(pdev->bus->parent))
1692 bcommand &= ~PCI_BRIDGE_CTL_PARITY; 181 break;
1693 } 182 /* Check if a parent object supports _HPP */
1694 if (ab->_hpp->enable_serr) { 183 pdev = pdev->bus->parent->self;
1695 command |= PCI_COMMAND_SERR;
1696 bcommand |= PCI_BRIDGE_CTL_SERR;
1697 } else {
1698 command &= ~PCI_COMMAND_SERR;
1699 bcommand &= ~PCI_BRIDGE_CTL_SERR;
1700 }
1701 } else
1702 dbg("no _hpp for B/D/F = %#x/%#x/%#x.\n", func->bus, func->device, func->function);
1703 } else
1704 dbg("no acpi bridge for B/D/F = %#x/%#x/%#x.\n", func->bus, func->device, func->function);
1705
1706 if (command != cmd) {
1707 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
1708 }
1709 if ((card_type == PCI_HEADER_TYPE_BRIDGE) && (bcommand != bcmd)) {
1710 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
1711 } 184 }
1712} 185}
1713 186
diff --git a/drivers/pci/hotplug/shpchprm_legacy.c b/drivers/pci/hotplug/shpchprm_legacy.c
index ba6c549c9b9d..ed6c1254bf6f 100644
--- a/drivers/pci/hotplug/shpchprm_legacy.c
+++ b/drivers/pci/hotplug/shpchprm_legacy.c
@@ -27,33 +27,11 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/pci.h> 33#include <linux/pci.h>
35#include <linux/init.h>
36#include <asm/uaccess.h>
37#ifdef CONFIG_IA64
38#include <asm/iosapic.h>
39#endif
40#include "shpchp.h" 34#include "shpchp.h"
41#include "shpchprm.h"
42#include "shpchprm_legacy.h"
43
44static void __iomem *shpchp_rom_start;
45static u16 unused_IRQ;
46
47void shpchprm_cleanup(void)
48{
49 if (shpchp_rom_start)
50 iounmap(shpchp_rom_start);
51}
52
53int shpchprm_print_pirt(void)
54{
55 return 0;
56}
57 35
58int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum) 36int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
59{ 37{
@@ -63,377 +41,14 @@ int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busn
63 return 0; 41 return 0;
64} 42}
65 43
66/* Find the Hot Plug Resource Table in the specified region of memory */ 44void get_hp_params_from_firmware(struct pci_dev *dev,
67static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iomem *end) 45 struct hotplug_params *hpp)
68{ 46{
69 void __iomem *fp; 47 return;
70 void __iomem *endp;
71 u8 temp1, temp2, temp3, temp4;
72 int status = 0;
73
74 endp = (end - sizeof(struct hrt) + 1);
75
76 for (fp = begin; fp <= endp; fp += 16) {
77 temp1 = readb(fp + SIG0);
78 temp2 = readb(fp + SIG1);
79 temp3 = readb(fp + SIG2);
80 temp4 = readb(fp + SIG3);
81 if (temp1 == '$' && temp2 == 'H' && temp3 == 'R' && temp4 == 'T') {
82 status = 1;
83 break;
84 }
85 }
86
87 if (!status)
88 fp = NULL;
89
90 dbg("Discovered Hotplug Resource Table at %p\n", fp);
91 return fp;
92} 48}
93 49
94/* 50void get_hp_hw_control_from_firmware(struct pci_dev *dev)
95 * shpchprm_find_available_resources
96 *
97 * Finds available memory, IO, and IRQ resources for programming
98 * devices which may be added to the system
99 * this function is for hot plug ADD!
100 *
101 * returns 0 if success
102 */
103int shpchprm_find_available_resources(struct controller *ctrl)
104{ 51{
105 u8 populated_slot; 52 return;
106 u8 bridged_slot;
107 void __iomem *one_slot;
108 struct pci_func *func = NULL;
109 int i = 10, index = 0;
110 u32 temp_dword, rc;
111 ulong temp_ulong;
112 struct pci_resource *mem_node;
113 struct pci_resource *p_mem_node;
114 struct pci_resource *io_node;
115 struct pci_resource *bus_node;
116 void __iomem *rom_resource_table;
117 struct pci_bus lpci_bus, *pci_bus;
118 u8 cfgspc_irq, temp;
119
120 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
121 pci_bus = &lpci_bus;
122 rom_resource_table = detect_HRT_floating_pointer(shpchp_rom_start, shpchp_rom_start + 0xffff);
123 dbg("rom_resource_table = %p\n", rom_resource_table);
124 if (rom_resource_table == NULL)
125 return -ENODEV;
126
127 /* Sum all resources and setup resource maps */
128 unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
129 dbg("unused_IRQ = %x\n", unused_IRQ);
130
131 temp = 0;
132 while (unused_IRQ) {
133 if (unused_IRQ & 1) {
134 shpchp_disk_irq = temp;
135 break;
136 }
137 unused_IRQ = unused_IRQ >> 1;
138 temp++;
139 }
140
141 dbg("shpchp_disk_irq= %d\n", shpchp_disk_irq);
142 unused_IRQ = unused_IRQ >> 1;
143 temp++;
144
145 while (unused_IRQ) {
146 if (unused_IRQ & 1) {
147 shpchp_nic_irq = temp;
148 break;
149 }
150 unused_IRQ = unused_IRQ >> 1;
151 temp++;
152 }
153
154 dbg("shpchp_nic_irq= %d\n", shpchp_nic_irq);
155 unused_IRQ = readl(rom_resource_table + PCIIRQ);
156
157 temp = 0;
158
159 pci_read_config_byte(ctrl->pci_dev, PCI_INTERRUPT_LINE, &cfgspc_irq);
160
161 if (!shpchp_nic_irq) {
162 shpchp_nic_irq = cfgspc_irq;
163 }
164
165 if (!shpchp_disk_irq) {
166 shpchp_disk_irq = cfgspc_irq;
167 }
168
169 dbg("shpchp_disk_irq, shpchp_nic_irq= %d, %d\n", shpchp_disk_irq, shpchp_nic_irq);
170
171 one_slot = rom_resource_table + sizeof(struct hrt);
172
173 i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
174 dbg("number_of_entries = %d\n", i);
175
176 if (!readb(one_slot + SECONDARY_BUS))
177 return (1);
178
179 dbg("dev|IO base|length|MEMbase|length|PM base|length|PB SB MB\n");
180
181 while (i && readb(one_slot + SECONDARY_BUS)) {
182 u8 dev_func = readb(one_slot + DEV_FUNC);
183 u8 primary_bus = readb(one_slot + PRIMARY_BUS);
184 u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
185 u8 max_bus = readb(one_slot + MAX_BUS);
186 u16 io_base = readw(one_slot + IO_BASE);
187 u16 io_length = readw(one_slot + IO_LENGTH);
188 u16 mem_base = readw(one_slot + MEM_BASE);
189 u16 mem_length = readw(one_slot + MEM_LENGTH);
190 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
191 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
192
193 dbg("%2.2x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x |%2.2x %2.2x %2.2x\n",
194 dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
195 primary_bus, secondary_bus, max_bus);
196
197 /* If this entry isn't for our controller's bus, ignore it */
198 if (primary_bus != ctrl->slot_bus) {
199 i--;
200 one_slot += sizeof(struct slot_rt);
201 continue;
202 }
203 /* find out if this entry is for an occupied slot */
204 temp_dword = 0xFFFFFFFF;
205 pci_bus->number = primary_bus;
206 pci_bus_read_config_dword(pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
207
208 dbg("temp_D_word = %x\n", temp_dword);
209
210 if (temp_dword != 0xFFFFFFFF) {
211 index = 0;
212 func = shpchp_slot_find(primary_bus, dev_func >> 3, 0);
213
214 while (func && (func->function != (dev_func & 0x07))) {
215 dbg("func = %p b:d:f(%x:%x:%x)\n", func, primary_bus, dev_func >> 3, index);
216 func = shpchp_slot_find(primary_bus, dev_func >> 3, index++);
217 }
218
219 /* If we can't find a match, skip this table entry */
220 if (!func) {
221 i--;
222 one_slot += sizeof(struct slot_rt);
223 continue;
224 }
225 /* this may not work and shouldn't be used */
226 if (secondary_bus != primary_bus)
227 bridged_slot = 1;
228 else
229 bridged_slot = 0;
230
231 populated_slot = 1;
232 } else {
233 populated_slot = 0;
234 bridged_slot = 0;
235 }
236 dbg("slot populated =%s \n", populated_slot?"yes":"no");
237
238 /* If we've got a valid IO base, use it */
239
240 temp_ulong = io_base + io_length;
241
242 if ((io_base) && (temp_ulong <= 0x10000)) {
243 io_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
244 if (!io_node)
245 return -ENOMEM;
246
247 io_node->base = (ulong)io_base;
248 io_node->length = (ulong)io_length;
249 dbg("found io_node(base, length) = %x, %x\n", io_node->base, io_node->length);
250
251 if (!populated_slot) {
252 io_node->next = ctrl->io_head;
253 ctrl->io_head = io_node;
254 } else {
255 io_node->next = func->io_head;
256 func->io_head = io_node;
257 }
258 }
259
260 /* If we've got a valid memory base, use it */
261 temp_ulong = mem_base + mem_length;
262 if ((mem_base) && (temp_ulong <= 0x10000)) {
263 mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
264 if (!mem_node)
265 return -ENOMEM;
266
267 mem_node->base = (ulong)mem_base << 16;
268 mem_node->length = (ulong)(mem_length << 16);
269 dbg("found mem_node(base, length) = %x, %x\n", mem_node->base, mem_node->length);
270
271 if (!populated_slot) {
272 mem_node->next = ctrl->mem_head;
273 ctrl->mem_head = mem_node;
274 } else {
275 mem_node->next = func->mem_head;
276 func->mem_head = mem_node;
277 }
278 }
279
280 /*
281 * If we've got a valid prefetchable memory base, and
282 * the base + length isn't greater than 0xFFFF
283 */
284 temp_ulong = pre_mem_base + pre_mem_length;
285 if ((pre_mem_base) && (temp_ulong <= 0x10000)) {
286 p_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
287 if (!p_mem_node)
288 return -ENOMEM;
289
290 p_mem_node->base = (ulong)pre_mem_base << 16;
291 p_mem_node->length = (ulong)pre_mem_length << 16;
292 dbg("found p_mem_node(base, length) = %x, %x\n", p_mem_node->base, p_mem_node->length);
293
294 if (!populated_slot) {
295 p_mem_node->next = ctrl->p_mem_head;
296 ctrl->p_mem_head = p_mem_node;
297 } else {
298 p_mem_node->next = func->p_mem_head;
299 func->p_mem_head = p_mem_node;
300 }
301 }
302
303 /*
304 * If we've got a valid bus number, use it
305 * The second condition is to ignore bus numbers on
306 * populated slots that don't have PCI-PCI bridges
307 */
308 if (secondary_bus && (secondary_bus != primary_bus)) {
309 bus_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
310 if (!bus_node)
311 return -ENOMEM;
312
313 bus_node->base = (ulong)secondary_bus;
314 bus_node->length = (ulong)(max_bus - secondary_bus + 1);
315 dbg("found bus_node(base, length) = %x, %x\n", bus_node->base, bus_node->length);
316
317 if (!populated_slot) {
318 bus_node->next = ctrl->bus_head;
319 ctrl->bus_head = bus_node;
320 } else {
321 bus_node->next = func->bus_head;
322 func->bus_head = bus_node;
323 }
324 }
325
326 i--;
327 one_slot += sizeof(struct slot_rt);
328 }
329
330 /* If all of the following fail, we don't have any resources for hot plug add */
331 rc = 1;
332 rc &= shpchp_resource_sort_and_combine(&(ctrl->mem_head));
333 rc &= shpchp_resource_sort_and_combine(&(ctrl->p_mem_head));
334 rc &= shpchp_resource_sort_and_combine(&(ctrl->io_head));
335 rc &= shpchp_resource_sort_and_combine(&(ctrl->bus_head));
336
337 return (rc);
338} 53}
339 54
340int shpchprm_set_hpp(
341 struct controller *ctrl,
342 struct pci_func *func,
343 u8 card_type)
344{
345 u32 rc;
346 u8 temp_byte;
347 struct pci_bus lpci_bus, *pci_bus;
348 unsigned int devfn;
349 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
350 pci_bus = &lpci_bus;
351 pci_bus->number = func->bus;
352 devfn = PCI_DEVFN(func->device, func->function);
353
354 temp_byte = 0x40; /* hard coded value for LT */
355 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
356 /* set subordinate Latency Timer */
357 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
358 if (rc) {
359 dbg("%s: set secondary LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus,
360 func->device, func->function);
361 return rc;
362 }
363 }
364
365 /* set base Latency Timer */
366 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
367 if (rc) {
368 dbg("%s: set LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
369 return rc;
370 }
371
372 /* set Cache Line size */
373 temp_byte = 0x08; /* hard coded value for CLS */
374 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
375 if (rc) {
376 dbg("%s: set CLS error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
377 }
378
379 /* set enable_perr */
380 /* set enable_serr */
381
382 return rc;
383}
384
385void shpchprm_enable_card(
386 struct controller *ctrl,
387 struct pci_func *func,
388 u8 card_type)
389{
390 u16 command, bcommand;
391 struct pci_bus lpci_bus, *pci_bus;
392 unsigned int devfn;
393 int rc;
394
395 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
396 pci_bus = &lpci_bus;
397 pci_bus->number = func->bus;
398 devfn = PCI_DEVFN(func->device, func->function);
399
400 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
401 command |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR
402 | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
403 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
404 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
405
406 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
407 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
408 bcommand |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR
409 | PCI_BRIDGE_CTL_NO_ISA;
410 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
411 }
412}
413
414static int legacy_shpchprm_init_pci(void)
415{
416 shpchp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
417 if (!shpchp_rom_start) {
418 err("Could not ioremap memory region for ROM\n");
419 return -EIO;
420 }
421
422 return 0;
423}
424
425int shpchprm_init(enum php_ctlr_type ctrl_type)
426{
427 int retval;
428
429 switch (ctrl_type) {
430 case PCI:
431 retval = legacy_shpchprm_init_pci();
432 break;
433 default:
434 retval = -ENODEV;
435 break;
436 }
437
438 return retval;
439}
diff --git a/drivers/pci/hotplug/shpchprm_legacy.h b/drivers/pci/hotplug/shpchprm_legacy.h
deleted file mode 100644
index 21bda74ddfa5..000000000000
--- a/drivers/pci/hotplug/shpchprm_legacy.h
+++ /dev/null
@@ -1,113 +0,0 @@
1/*
2 * SHPCHPRM Legacy: PHP Resource Manager for Non-ACPI/Legacy platform using HRT
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
27 *
28 */
29
30#ifndef _SHPCHPRM_LEGACY_H_
31#define _SHPCHPRM_LEGACY_H_
32
33#define ROM_PHY_ADDR 0x0F0000
34#define ROM_PHY_LEN 0x00FFFF
35
36struct slot_rt {
37 u8 dev_func;
38 u8 primary_bus;
39 u8 secondary_bus;
40 u8 max_bus;
41 u16 io_base;
42 u16 io_length;
43 u16 mem_base;
44 u16 mem_length;
45 u16 pre_mem_base;
46 u16 pre_mem_length;
47} __attribute__ ((packed));
48
49/* offsets to the hotplug slot resource table registers based on the above structure layout */
50enum slot_rt_offsets {
51 DEV_FUNC = offsetof(struct slot_rt, dev_func),
52 PRIMARY_BUS = offsetof(struct slot_rt, primary_bus),
53 SECONDARY_BUS = offsetof(struct slot_rt, secondary_bus),
54 MAX_BUS = offsetof(struct slot_rt, max_bus),
55 IO_BASE = offsetof(struct slot_rt, io_base),
56 IO_LENGTH = offsetof(struct slot_rt, io_length),
57 MEM_BASE = offsetof(struct slot_rt, mem_base),
58 MEM_LENGTH = offsetof(struct slot_rt, mem_length),
59 PRE_MEM_BASE = offsetof(struct slot_rt, pre_mem_base),
60 PRE_MEM_LENGTH = offsetof(struct slot_rt, pre_mem_length),
61};
62
63struct hrt {
64 char sig0;
65 char sig1;
66 char sig2;
67 char sig3;
68 u16 unused_IRQ;
69 u16 PCIIRQ;
70 u8 number_of_entries;
71 u8 revision;
72 u16 reserved1;
73 u32 reserved2;
74} __attribute__ ((packed));
75
76/* offsets to the hotplug resource table registers based on the above structure layout */
77enum hrt_offsets {
78 SIG0 = offsetof(struct hrt, sig0),
79 SIG1 = offsetof(struct hrt, sig1),
80 SIG2 = offsetof(struct hrt, sig2),
81 SIG3 = offsetof(struct hrt, sig3),
82 UNUSED_IRQ = offsetof(struct hrt, unused_IRQ),
83 PCIIRQ = offsetof(struct hrt, PCIIRQ),
84 NUMBER_OF_ENTRIES = offsetof(struct hrt, number_of_entries),
85 REVISION = offsetof(struct hrt, revision),
86 HRT_RESERVED1 = offsetof(struct hrt, reserved1),
87 HRT_RESERVED2 = offsetof(struct hrt, reserved2),
88};
89
90struct irq_info {
91 u8 bus, devfn; /* bus, device and function */
92 struct {
93 u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
94 u16 bitmap; /* Available IRQs */
95 } __attribute__ ((packed)) irq[4];
96 u8 slot; /* slot number, 0=onboard */
97 u8 rfu;
98} __attribute__ ((packed));
99
100struct irq_routing_table {
101 u32 signature; /* PIRQ_SIGNATURE should be here */
102 u16 version; /* PIRQ_VERSION */
103 u16 size; /* Table size in bytes */
104 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
105 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
106 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
107 u32 miniport_data; /* Crap */
108 u8 rfu[11];
109 u8 checksum; /* Modulo 256 checksum must give zero */
110 struct irq_info slots[0];
111} __attribute__ ((packed));
112
113#endif /* _SHPCHPRM_LEGACY_H_ */
diff --git a/drivers/pci/hotplug/shpchprm_nonacpi.c b/drivers/pci/hotplug/shpchprm_nonacpi.c
index 5f75ef7f3df2..c6b40998eeb3 100644
--- a/drivers/pci/hotplug/shpchprm_nonacpi.c
+++ b/drivers/pci/hotplug/shpchprm_nonacpi.c
@@ -32,24 +32,9 @@
32#include <linux/kernel.h> 32#include <linux/kernel.h>
33#include <linux/types.h> 33#include <linux/types.h>
34#include <linux/pci.h> 34#include <linux/pci.h>
35#include <linux/init.h> 35#include <linux/slab.h>
36#include <asm/uaccess.h>
37#ifdef CONFIG_IA64
38#include <asm/iosapic.h>
39#endif
40#include "shpchp.h"
41#include "shpchprm.h"
42#include "shpchprm_nonacpi.h"
43 36
44void shpchprm_cleanup(void) 37#include "shpchp.h"
45{
46 return;
47}
48
49int shpchprm_print_pirt(void)
50{
51 return 0;
52}
53 38
54int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum) 39int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
55{ 40{
@@ -60,375 +45,13 @@ int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busn
60 return 0; 45 return 0;
61} 46}
62 47
63static void print_pci_resource ( struct pci_resource *aprh) 48void get_hp_params_from_firmware(struct pci_dev *dev,
64{ 49 struct hotplug_params *hpp)
65 struct pci_resource *res;
66
67 for (res = aprh; res; res = res->next)
68 dbg(" base= 0x%x length= 0x%x\n", res->base, res->length);
69}
70
71
72static void phprm_dump_func_res( struct pci_func *fun)
73{
74 struct pci_func *func = fun;
75
76 if (func->bus_head) {
77 dbg(": BUS Resources:\n");
78 print_pci_resource (func->bus_head);
79 }
80 if (func->io_head) {
81 dbg(": IO Resources:\n");
82 print_pci_resource (func->io_head);
83 }
84 if (func->mem_head) {
85 dbg(": MEM Resources:\n");
86 print_pci_resource (func->mem_head);
87 }
88 if (func->p_mem_head) {
89 dbg(": PMEM Resources:\n");
90 print_pci_resource (func->p_mem_head);
91 }
92}
93
94static int phprm_get_used_resources (
95 struct controller *ctrl,
96 struct pci_func *func
97 )
98{
99 return shpchp_save_used_resources (ctrl, func, !DISABLE_CARD);
100}
101
102static int phprm_delete_resource(
103 struct pci_resource **aprh,
104 ulong base,
105 ulong size)
106{
107 struct pci_resource *res;
108 struct pci_resource *prevnode;
109 struct pci_resource *split_node;
110 ulong tbase;
111
112 shpchp_resource_sort_and_combine(aprh);
113
114 for (res = *aprh; res; res = res->next) {
115 if (res->base > base)
116 continue;
117
118 if ((res->base + res->length) < (base + size))
119 continue;
120
121 if (res->base < base) {
122 tbase = base;
123
124 if ((res->length - (tbase - res->base)) < size)
125 continue;
126
127 split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
128 if (!split_node)
129 return -ENOMEM;
130
131 split_node->base = res->base;
132 split_node->length = tbase - res->base;
133 res->base = tbase;
134 res->length -= split_node->length;
135
136 split_node->next = res->next;
137 res->next = split_node;
138 }
139
140 if (res->length >= size) {
141 split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
142 if (!split_node)
143 return -ENOMEM;
144
145 split_node->base = res->base + size;
146 split_node->length = res->length - size;
147 res->length = size;
148
149 split_node->next = res->next;
150 res->next = split_node;
151 }
152
153 if (*aprh == res) {
154 *aprh = res->next;
155 } else {
156 prevnode = *aprh;
157 while (prevnode->next != res)
158 prevnode = prevnode->next;
159
160 prevnode->next = res->next;
161 }
162 res->next = NULL;
163 kfree(res);
164 break;
165 }
166
167 return 0;
168}
169
170
171static int phprm_delete_resources(
172 struct pci_resource **aprh,
173 struct pci_resource *this
174 )
175{
176 struct pci_resource *res;
177
178 for (res = this; res; res = res->next)
179 phprm_delete_resource(aprh, res->base, res->length);
180
181 return 0;
182}
183
184
185static int configure_existing_function(
186 struct controller *ctrl,
187 struct pci_func *func
188 )
189{
190 int rc;
191
192 /* see how much resources the func has used. */
193 rc = phprm_get_used_resources (ctrl, func);
194
195 if (!rc) {
196 /* subtract the resources used by the func from ctrl resources */
197 rc = phprm_delete_resources (&ctrl->bus_head, func->bus_head);
198 rc |= phprm_delete_resources (&ctrl->io_head, func->io_head);
199 rc |= phprm_delete_resources (&ctrl->mem_head, func->mem_head);
200 rc |= phprm_delete_resources (&ctrl->p_mem_head, func->p_mem_head);
201 if (rc)
202 warn("aCEF: cannot del used resources\n");
203 } else
204 err("aCEF: cannot get used resources\n");
205
206 return rc;
207}
208
209static int bind_pci_resources_to_slots ( struct controller *ctrl)
210{
211 struct pci_func *func, new_func;
212 int busn = ctrl->slot_bus;
213 int devn, funn;
214 u32 vid;
215
216 for (devn = 0; devn < 32; devn++) {
217 for (funn = 0; funn < 8; funn++) {
218 /*
219 if (devn == ctrl->device && funn == ctrl->function)
220 continue;
221 */
222 /* find out if this entry is for an occupied slot */
223 vid = 0xFFFFFFFF;
224
225 pci_bus_read_config_dword(ctrl->pci_dev->subordinate, PCI_DEVFN(devn, funn), PCI_VENDOR_ID, &vid);
226
227 if (vid != 0xFFFFFFFF) {
228 func = shpchp_slot_find(busn, devn, funn);
229 if (!func) {
230 memset(&new_func, 0, sizeof(struct pci_func));
231 new_func.bus = busn;
232 new_func.device = devn;
233 new_func.function = funn;
234 new_func.is_a_board = 1;
235 configure_existing_function(ctrl, &new_func);
236 phprm_dump_func_res(&new_func);
237 } else {
238 configure_existing_function(ctrl, func);
239 phprm_dump_func_res(func);
240 }
241 dbg("aCCF:existing PCI 0x%x Func ResourceDump\n", ctrl->bus);
242 }
243 }
244 }
245
246 return 0;
247}
248
249static void phprm_dump_ctrl_res( struct controller *ctlr)
250{
251 struct controller *ctrl = ctlr;
252
253 if (ctrl->bus_head) {
254 dbg(": BUS Resources:\n");
255 print_pci_resource (ctrl->bus_head);
256 }
257 if (ctrl->io_head) {
258 dbg(": IO Resources:\n");
259 print_pci_resource (ctrl->io_head);
260 }
261 if (ctrl->mem_head) {
262 dbg(": MEM Resources:\n");
263 print_pci_resource (ctrl->mem_head);
264 }
265 if (ctrl->p_mem_head) {
266 dbg(": PMEM Resources:\n");
267 print_pci_resource (ctrl->p_mem_head);
268 }
269}
270
271/*
272 * phprm_find_available_resources
273 *
274 * Finds available memory, IO, and IRQ resources for programming
275 * devices which may be added to the system
276 * this function is for hot plug ADD!
277 *
278 * returns 0 if success
279 */
280int shpchprm_find_available_resources(struct controller *ctrl)
281{
282 struct pci_func func;
283 u32 rc;
284
285 memset(&func, 0, sizeof(struct pci_func));
286
287 func.bus = ctrl->bus;
288 func.device = ctrl->device;
289 func.function = ctrl->function;
290 func.is_a_board = 1;
291
292 /* Get resources for this PCI bridge */
293 rc = shpchp_save_used_resources (ctrl, &func, !DISABLE_CARD);
294 dbg("%s: shpchp_save_used_resources rc = %d\n", __FUNCTION__, rc);
295
296 if (func.mem_head)
297 func.mem_head->next = ctrl->mem_head;
298 ctrl->mem_head = func.mem_head;
299
300 if (func.p_mem_head)
301 func.p_mem_head->next = ctrl->p_mem_head;
302 ctrl->p_mem_head = func.p_mem_head;
303
304 if (func.io_head)
305 func.io_head->next = ctrl->io_head;
306 ctrl->io_head = func.io_head;
307
308 if(func.bus_head)
309 func.bus_head->next = ctrl->bus_head;
310 ctrl->bus_head = func.bus_head;
311 if (ctrl->bus_head)
312 phprm_delete_resource(&ctrl->bus_head, ctrl->pci_dev->subordinate->number, 1);
313
314 dbg("%s:pre-Bind PCI 0x%x Ctrl Resource Dump\n", __FUNCTION__, ctrl->bus);
315 phprm_dump_ctrl_res(ctrl);
316 bind_pci_resources_to_slots (ctrl);
317
318 dbg("%s:post-Bind PCI 0x%x Ctrl Resource Dump\n", __FUNCTION__, ctrl->bus);
319 phprm_dump_ctrl_res(ctrl);
320
321
322 /* If all of the following fail, we don't have any resources for hot plug add */
323 rc = 1;
324 rc &= shpchp_resource_sort_and_combine(&(ctrl->mem_head));
325 rc &= shpchp_resource_sort_and_combine(&(ctrl->p_mem_head));
326 rc &= shpchp_resource_sort_and_combine(&(ctrl->io_head));
327 rc &= shpchp_resource_sort_and_combine(&(ctrl->bus_head));
328
329 return (rc);
330}
331
332int shpchprm_set_hpp(
333 struct controller *ctrl,
334 struct pci_func *func,
335 u8 card_type)
336{ 50{
337 u32 rc; 51 return;
338 u8 temp_byte;
339 struct pci_bus lpci_bus, *pci_bus;
340 unsigned int devfn;
341 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
342 pci_bus = &lpci_bus;
343 pci_bus->number = func->bus;
344 devfn = PCI_DEVFN(func->device, func->function);
345
346 temp_byte = 0x40; /* hard coded value for LT */
347 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
348 /* set subordinate Latency Timer */
349 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
350
351 if (rc) {
352 dbg("%s: set secondary LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus,
353 func->device, func->function);
354 return rc;
355 }
356 }
357
358 /* set base Latency Timer */
359 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
360
361 if (rc) {
362 dbg("%s: set LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
363 return rc;
364 }
365
366 /* set Cache Line size */
367 temp_byte = 0x08; /* hard coded value for CLS */
368
369 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
370
371 if (rc) {
372 dbg("%s: set CLS error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
373 }
374
375 /* set enable_perr */
376 /* set enable_serr */
377
378 return rc;
379}
380
381void shpchprm_enable_card(
382 struct controller *ctrl,
383 struct pci_func *func,
384 u8 card_type)
385{
386 u16 command, bcommand;
387 struct pci_bus lpci_bus, *pci_bus;
388 unsigned int devfn;
389 int rc;
390
391 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
392 pci_bus = &lpci_bus;
393 pci_bus->number = func->bus;
394 devfn = PCI_DEVFN(func->device, func->function);
395
396 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
397
398 command |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR
399 | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
400 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
401
402 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
403
404 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
405
406 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
407
408 bcommand |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR
409 | PCI_BRIDGE_CTL_NO_ISA;
410
411 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
412 }
413}
414
415static int legacy_shpchprm_init_pci(void)
416{
417 return 0;
418} 52}
419 53
420int shpchprm_init(enum php_ctlr_type ctrl_type) 54void get_hp_hw_control_from_firmware(struct pci_dev *dev)
421{ 55{
422 int retval; 56 return;
423
424 switch (ctrl_type) {
425 case PCI:
426 retval = legacy_shpchprm_init_pci();
427 break;
428 default:
429 retval = -ENODEV;
430 break;
431 }
432
433 return retval;
434} 57}
diff --git a/drivers/pci/hotplug/shpchprm_nonacpi.h b/drivers/pci/hotplug/shpchprm_nonacpi.h
deleted file mode 100644
index cddaaa5ee1b3..000000000000
--- a/drivers/pci/hotplug/shpchprm_nonacpi.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * SHPCHPRM NONACPI: PHP Resource Manager for Non-ACPI/Legacy platform
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
27 *
28 */
29
30#ifndef _SHPCHPRM_NONACPI_H_
31#define _SHPCHPRM_NONACPI_H_
32
33struct irq_info {
34 u8 bus, devfn; /* bus, device and function */
35 struct {
36 u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
37 u16 bitmap; /* Available IRQs */
38 } __attribute__ ((packed)) irq[4];
39 u8 slot; /* slot number, 0=onboard */
40 u8 rfu;
41} __attribute__ ((packed));
42
43struct irq_routing_table {
44 u32 signature; /* PIRQ_SIGNATURE should be here */
45 u16 version; /* PIRQ_VERSION */
46 u16 size; /* Table size in bytes */
47 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
48 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
49 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
50 u32 miniport_data; /* Crap */
51 u8 rfu[11];
52 u8 checksum; /* Modulo 256 checksum must give zero */
53 struct irq_info slots[0];
54} __attribute__ ((packed));
55
56#endif /* _SHPCHPRM_NONACPI_H_ */
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index ee8677bda950..202b7507a357 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -23,6 +23,8 @@
23#include "pci.h" 23#include "pci.h"
24#include "msi.h" 24#include "msi.h"
25 25
26#define MSI_TARGET_CPU first_cpu(cpu_online_map)
27
26static DEFINE_SPINLOCK(msi_lock); 28static DEFINE_SPINLOCK(msi_lock);
27static struct msi_desc* msi_desc[NR_IRQS] = { [0 ... NR_IRQS-1] = NULL }; 29static struct msi_desc* msi_desc[NR_IRQS] = { [0 ... NR_IRQS-1] = NULL };
28static kmem_cache_t* msi_cachep; 30static kmem_cache_t* msi_cachep;
@@ -92,6 +94,7 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
92 struct msi_desc *entry; 94 struct msi_desc *entry;
93 struct msg_address address; 95 struct msg_address address;
94 unsigned int irq = vector; 96 unsigned int irq = vector;
97 unsigned int dest_cpu = first_cpu(cpu_mask);
95 98
96 entry = (struct msi_desc *)msi_desc[vector]; 99 entry = (struct msi_desc *)msi_desc[vector];
97 if (!entry || !entry->dev) 100 if (!entry || !entry->dev)
@@ -108,9 +111,9 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
108 pci_read_config_dword(entry->dev, msi_lower_address_reg(pos), 111 pci_read_config_dword(entry->dev, msi_lower_address_reg(pos),
109 &address.lo_address.value); 112 &address.lo_address.value);
110 address.lo_address.value &= MSI_ADDRESS_DEST_ID_MASK; 113 address.lo_address.value &= MSI_ADDRESS_DEST_ID_MASK;
111 address.lo_address.value |= (cpu_mask_to_apicid(cpu_mask) << 114 address.lo_address.value |= (cpu_physical_id(dest_cpu) <<
112 MSI_TARGET_CPU_SHIFT); 115 MSI_TARGET_CPU_SHIFT);
113 entry->msi_attrib.current_cpu = cpu_mask_to_apicid(cpu_mask); 116 entry->msi_attrib.current_cpu = cpu_physical_id(dest_cpu);
114 pci_write_config_dword(entry->dev, msi_lower_address_reg(pos), 117 pci_write_config_dword(entry->dev, msi_lower_address_reg(pos),
115 address.lo_address.value); 118 address.lo_address.value);
116 set_native_irq_info(irq, cpu_mask); 119 set_native_irq_info(irq, cpu_mask);
@@ -123,9 +126,9 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
123 126
124 address.lo_address.value = readl(entry->mask_base + offset); 127 address.lo_address.value = readl(entry->mask_base + offset);
125 address.lo_address.value &= MSI_ADDRESS_DEST_ID_MASK; 128 address.lo_address.value &= MSI_ADDRESS_DEST_ID_MASK;
126 address.lo_address.value |= (cpu_mask_to_apicid(cpu_mask) << 129 address.lo_address.value |= (cpu_physical_id(dest_cpu) <<
127 MSI_TARGET_CPU_SHIFT); 130 MSI_TARGET_CPU_SHIFT);
128 entry->msi_attrib.current_cpu = cpu_mask_to_apicid(cpu_mask); 131 entry->msi_attrib.current_cpu = cpu_physical_id(dest_cpu);
129 writel(address.lo_address.value, entry->mask_base + offset); 132 writel(address.lo_address.value, entry->mask_base + offset);
130 set_native_irq_info(irq, cpu_mask); 133 set_native_irq_info(irq, cpu_mask);
131 break; 134 break;
@@ -259,14 +262,15 @@ static void msi_data_init(struct msg_data *msi_data,
259static void msi_address_init(struct msg_address *msi_address) 262static void msi_address_init(struct msg_address *msi_address)
260{ 263{
261 unsigned int dest_id; 264 unsigned int dest_id;
265 unsigned long dest_phys_id = cpu_physical_id(MSI_TARGET_CPU);
262 266
263 memset(msi_address, 0, sizeof(struct msg_address)); 267 memset(msi_address, 0, sizeof(struct msg_address));
264 msi_address->hi_address = (u32)0; 268 msi_address->hi_address = (u32)0;
265 dest_id = (MSI_ADDRESS_HEADER << MSI_ADDRESS_HEADER_SHIFT); 269 dest_id = (MSI_ADDRESS_HEADER << MSI_ADDRESS_HEADER_SHIFT);
266 msi_address->lo_address.u.dest_mode = MSI_DEST_MODE; 270 msi_address->lo_address.u.dest_mode = MSI_PHYSICAL_MODE;
267 msi_address->lo_address.u.redirection_hint = MSI_REDIRECTION_HINT_MODE; 271 msi_address->lo_address.u.redirection_hint = MSI_REDIRECTION_HINT_MODE;
268 msi_address->lo_address.u.dest_id = dest_id; 272 msi_address->lo_address.u.dest_id = dest_id;
269 msi_address->lo_address.value |= (MSI_TARGET_CPU << MSI_TARGET_CPU_SHIFT); 273 msi_address->lo_address.value |= (dest_phys_id << MSI_TARGET_CPU_SHIFT);
270} 274}
271 275
272static int msi_free_vector(struct pci_dev* dev, int vector, int reassign); 276static int msi_free_vector(struct pci_dev* dev, int vector, int reassign);
@@ -575,6 +579,8 @@ static int msi_capability_init(struct pci_dev *dev)
575/** 579/**
576 * msix_capability_init - configure device's MSI-X capability 580 * msix_capability_init - configure device's MSI-X capability
577 * @dev: pointer to the pci_dev data structure of MSI-X device function 581 * @dev: pointer to the pci_dev data structure of MSI-X device function
582 * @entries: pointer to an array of struct msix_entry entries
583 * @nvec: number of @entries
578 * 584 *
579 * Setup the MSI-X capability structure of device function with a 585 * Setup the MSI-X capability structure of device function with a
580 * single MSI-X vector. A return of zero indicates the successful setup of 586 * single MSI-X vector. A return of zero indicates the successful setup of
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index e9e37abe1f76..6917c6cb0912 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -91,9 +91,7 @@ acpi_query_osc (
91static acpi_status 91static acpi_status
92acpi_run_osc ( 92acpi_run_osc (
93 acpi_handle handle, 93 acpi_handle handle,
94 u32 level, 94 void *context)
95 void *context,
96 void **retval )
97{ 95{
98 acpi_status status; 96 acpi_status status;
99 struct acpi_object_list input; 97 struct acpi_object_list input;
@@ -180,11 +178,12 @@ EXPORT_SYMBOL(pci_osc_support_set);
180 178
181/** 179/**
182 * pci_osc_control_set - commit requested control to Firmware 180 * pci_osc_control_set - commit requested control to Firmware
181 * @handle: acpi_handle for the target ACPI object
183 * @flags: driver's requested control bits 182 * @flags: driver's requested control bits
184 * 183 *
185 * Attempt to take control from Firmware on requested control bits. 184 * Attempt to take control from Firmware on requested control bits.
186 **/ 185 **/
187acpi_status pci_osc_control_set(u32 flags) 186acpi_status pci_osc_control_set(acpi_handle handle, u32 flags)
188{ 187{
189 acpi_status status; 188 acpi_status status;
190 u32 ctrlset; 189 u32 ctrlset;
@@ -198,10 +197,7 @@ acpi_status pci_osc_control_set(u32 flags)
198 return AE_SUPPORT; 197 return AE_SUPPORT;
199 } 198 }
200 ctrlset_buf[OSC_CONTROL_TYPE] |= ctrlset; 199 ctrlset_buf[OSC_CONTROL_TYPE] |= ctrlset;
201 status = acpi_get_devices ( PCI_ROOT_HID_STRING, 200 status = acpi_run_osc(handle, ctrlset_buf);
202 acpi_run_osc,
203 ctrlset_buf,
204 NULL );
205 if (ACPI_FAILURE (status)) { 201 if (ACPI_FAILURE (status)) {
206 ctrlset_buf[OSC_CONTROL_TYPE] &= ~ctrlset; 202 ctrlset_buf[OSC_CONTROL_TYPE] &= ~ctrlset;
207 } 203 }
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 0d0d533894e0..a9046d4b8af3 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -8,6 +8,9 @@
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/device.h> 9#include <linux/device.h>
10#include <linux/mempolicy.h> 10#include <linux/mempolicy.h>
11#include <linux/string.h>
12#include <linux/slab.h>
13#include <linux/sched.h>
11#include "pci.h" 14#include "pci.h"
12 15
13/* 16/*
@@ -26,12 +29,15 @@ struct pci_dynid {
26#ifdef CONFIG_HOTPLUG 29#ifdef CONFIG_HOTPLUG
27 30
28/** 31/**
29 * store_new_id 32 * store_new_id - add a new PCI device ID to this driver and re-probe devices
33 * @driver: target device driver
34 * @buf: buffer for scanning device ID data
35 * @count: input size
30 * 36 *
31 * Adds a new dynamic pci device ID to this driver, 37 * Adds a new dynamic pci device ID to this driver,
32 * and causes the driver to probe for all devices again. 38 * and causes the driver to probe for all devices again.
33 */ 39 */
34static inline ssize_t 40static ssize_t
35store_new_id(struct device_driver *driver, const char *buf, size_t count) 41store_new_id(struct device_driver *driver, const char *buf, size_t count)
36{ 42{
37 struct pci_dynid *dynid; 43 struct pci_dynid *dynid;
@@ -194,8 +200,10 @@ static int pci_call_probe(struct pci_driver *drv, struct pci_dev *dev,
194 200
195/** 201/**
196 * __pci_device_probe() 202 * __pci_device_probe()
203 * @drv: driver to call to check if it wants the PCI device
204 * @pci_dev: PCI device being probed
197 * 205 *
198 * returns 0 on success, else error. 206 * returns 0 on success, else error.
199 * side-effect: pci_dev->driver is set to drv when drv claims pci_dev. 207 * side-effect: pci_dev->driver is set to drv when drv claims pci_dev.
200 */ 208 */
201static int 209static int
@@ -356,15 +364,16 @@ static struct kobj_type pci_driver_kobj_type = {
356}; 364};
357 365
358/** 366/**
359 * pci_register_driver - register a new pci driver 367 * __pci_register_driver - register a new pci driver
360 * @drv: the driver structure to register 368 * @drv: the driver structure to register
369 * @owner: owner module of drv
361 * 370 *
362 * Adds the driver structure to the list of registered drivers. 371 * Adds the driver structure to the list of registered drivers.
363 * Returns a negative value on error, otherwise 0. 372 * Returns a negative value on error, otherwise 0.
364 * If no error occurred, the driver remains registered even if 373 * If no error occurred, the driver remains registered even if
365 * no device was claimed during registration. 374 * no device was claimed during registration.
366 */ 375 */
367int pci_register_driver(struct pci_driver *drv) 376int __pci_register_driver(struct pci_driver *drv, struct module *owner)
368{ 377{
369 int error; 378 int error;
370 379
@@ -377,7 +386,11 @@ int pci_register_driver(struct pci_driver *drv)
377 * the pci shutdown function, this test can go away. */ 386 * the pci shutdown function, this test can go away. */
378 if (!drv->driver.shutdown) 387 if (!drv->driver.shutdown)
379 drv->driver.shutdown = pci_device_shutdown; 388 drv->driver.shutdown = pci_device_shutdown;
380 drv->driver.owner = drv->owner; 389 else
390 printk(KERN_WARNING "Warning: PCI driver %s has a struct "
391 "device_driver shutdown method, please update!\n",
392 drv->name);
393 drv->driver.owner = owner;
381 drv->driver.kobj.ktype = &pci_driver_kobj_type; 394 drv->driver.kobj.ktype = &pci_driver_kobj_type;
382 395
383 spin_lock_init(&drv->dynids.lock); 396 spin_lock_init(&drv->dynids.lock);
@@ -436,11 +449,11 @@ pci_dev_driver(const struct pci_dev *dev)
436 449
437/** 450/**
438 * pci_bus_match - Tell if a PCI device structure has a matching PCI device id structure 451 * pci_bus_match - Tell if a PCI device structure has a matching PCI device id structure
439 * @ids: array of PCI device id structures to search in
440 * @dev: the PCI device structure to match against 452 * @dev: the PCI device structure to match against
453 * @drv: the device driver to search for matching PCI device id structures
441 * 454 *
442 * Used by a driver to check whether a PCI device present in the 455 * Used by a driver to check whether a PCI device present in the
443 * system is in its list of supported devices.Returns the matching 456 * system is in its list of supported devices. Returns the matching
444 * pci_device_id structure or %NULL if there is no match. 457 * pci_device_id structure or %NULL if there is no match.
445 */ 458 */
446static int pci_bus_match(struct device *dev, struct device_driver *drv) 459static int pci_bus_match(struct device *dev, struct device_driver *drv)
@@ -514,7 +527,7 @@ postcore_initcall(pci_driver_init);
514 527
515EXPORT_SYMBOL(pci_match_id); 528EXPORT_SYMBOL(pci_match_id);
516EXPORT_SYMBOL(pci_match_device); 529EXPORT_SYMBOL(pci_match_device);
517EXPORT_SYMBOL(pci_register_driver); 530EXPORT_SYMBOL(__pci_register_driver);
518EXPORT_SYMBOL(pci_unregister_driver); 531EXPORT_SYMBOL(pci_unregister_driver);
519EXPORT_SYMBOL(pci_dev_driver); 532EXPORT_SYMBOL(pci_dev_driver);
520EXPORT_SYMBOL(pci_bus_type); 533EXPORT_SYMBOL(pci_bus_type);
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 56a3b397efee..965a5934623a 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -130,7 +130,7 @@ pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
130 130
131 if ((off & 1) && size) { 131 if ((off & 1) && size) {
132 u8 val; 132 u8 val;
133 pci_read_config_byte(dev, off, &val); 133 pci_user_read_config_byte(dev, off, &val);
134 data[off - init_off] = val; 134 data[off - init_off] = val;
135 off++; 135 off++;
136 size--; 136 size--;
@@ -138,7 +138,7 @@ pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
138 138
139 if ((off & 3) && size > 2) { 139 if ((off & 3) && size > 2) {
140 u16 val; 140 u16 val;
141 pci_read_config_word(dev, off, &val); 141 pci_user_read_config_word(dev, off, &val);
142 data[off - init_off] = val & 0xff; 142 data[off - init_off] = val & 0xff;
143 data[off - init_off + 1] = (val >> 8) & 0xff; 143 data[off - init_off + 1] = (val >> 8) & 0xff;
144 off += 2; 144 off += 2;
@@ -147,7 +147,7 @@ pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
147 147
148 while (size > 3) { 148 while (size > 3) {
149 u32 val; 149 u32 val;
150 pci_read_config_dword(dev, off, &val); 150 pci_user_read_config_dword(dev, off, &val);
151 data[off - init_off] = val & 0xff; 151 data[off - init_off] = val & 0xff;
152 data[off - init_off + 1] = (val >> 8) & 0xff; 152 data[off - init_off + 1] = (val >> 8) & 0xff;
153 data[off - init_off + 2] = (val >> 16) & 0xff; 153 data[off - init_off + 2] = (val >> 16) & 0xff;
@@ -158,7 +158,7 @@ pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
158 158
159 if (size >= 2) { 159 if (size >= 2) {
160 u16 val; 160 u16 val;
161 pci_read_config_word(dev, off, &val); 161 pci_user_read_config_word(dev, off, &val);
162 data[off - init_off] = val & 0xff; 162 data[off - init_off] = val & 0xff;
163 data[off - init_off + 1] = (val >> 8) & 0xff; 163 data[off - init_off + 1] = (val >> 8) & 0xff;
164 off += 2; 164 off += 2;
@@ -167,7 +167,7 @@ pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
167 167
168 if (size > 0) { 168 if (size > 0) {
169 u8 val; 169 u8 val;
170 pci_read_config_byte(dev, off, &val); 170 pci_user_read_config_byte(dev, off, &val);
171 data[off - init_off] = val; 171 data[off - init_off] = val;
172 off++; 172 off++;
173 --size; 173 --size;
@@ -192,7 +192,7 @@ pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
192 } 192 }
193 193
194 if ((off & 1) && size) { 194 if ((off & 1) && size) {
195 pci_write_config_byte(dev, off, data[off - init_off]); 195 pci_user_write_config_byte(dev, off, data[off - init_off]);
196 off++; 196 off++;
197 size--; 197 size--;
198 } 198 }
@@ -200,7 +200,7 @@ pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
200 if ((off & 3) && size > 2) { 200 if ((off & 3) && size > 2) {
201 u16 val = data[off - init_off]; 201 u16 val = data[off - init_off];
202 val |= (u16) data[off - init_off + 1] << 8; 202 val |= (u16) data[off - init_off + 1] << 8;
203 pci_write_config_word(dev, off, val); 203 pci_user_write_config_word(dev, off, val);
204 off += 2; 204 off += 2;
205 size -= 2; 205 size -= 2;
206 } 206 }
@@ -210,7 +210,7 @@ pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
210 val |= (u32) data[off - init_off + 1] << 8; 210 val |= (u32) data[off - init_off + 1] << 8;
211 val |= (u32) data[off - init_off + 2] << 16; 211 val |= (u32) data[off - init_off + 2] << 16;
212 val |= (u32) data[off - init_off + 3] << 24; 212 val |= (u32) data[off - init_off + 3] << 24;
213 pci_write_config_dword(dev, off, val); 213 pci_user_write_config_dword(dev, off, val);
214 off += 4; 214 off += 4;
215 size -= 4; 215 size -= 4;
216 } 216 }
@@ -218,13 +218,13 @@ pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
218 if (size >= 2) { 218 if (size >= 2) {
219 u16 val = data[off - init_off]; 219 u16 val = data[off - init_off];
220 val |= (u16) data[off - init_off + 1] << 8; 220 val |= (u16) data[off - init_off + 1] << 8;
221 pci_write_config_word(dev, off, val); 221 pci_user_write_config_word(dev, off, val);
222 off += 2; 222 off += 2;
223 size -= 2; 223 size -= 2;
224 } 224 }
225 225
226 if (size) { 226 if (size) {
227 pci_write_config_byte(dev, off, data[off - init_off]); 227 pci_user_write_config_byte(dev, off, data[off - init_off]);
228 off++; 228 off++;
229 --size; 229 --size;
230 } 230 }
@@ -360,7 +360,7 @@ pci_create_resource_files(struct pci_dev *pdev)
360 continue; 360 continue;
361 361
362 /* allocate attribute structure, piggyback attribute name */ 362 /* allocate attribute structure, piggyback attribute name */
363 res_attr = kcalloc(1, sizeof(*res_attr) + 10, GFP_ATOMIC); 363 res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
364 if (res_attr) { 364 if (res_attr) {
365 char *res_attr_name = (char *)(res_attr + 1); 365 char *res_attr_name = (char *)(res_attr + 1);
366 366
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 259d247b7551..8e287a828d5d 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -15,6 +15,7 @@
15#include <linux/pci.h> 15#include <linux/pci.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/spinlock.h> 17#include <linux/spinlock.h>
18#include <linux/string.h>
18#include <asm/dma.h> /* isa_dma_bridge_buggy */ 19#include <asm/dma.h> /* isa_dma_bridge_buggy */
19#include "pci.h" 20#include "pci.h"
20 21
@@ -62,11 +63,38 @@ pci_max_busnr(void)
62 return max; 63 return max;
63} 64}
64 65
66static int __pci_find_next_cap(struct pci_bus *bus, unsigned int devfn, u8 pos, int cap)
67{
68 u8 id;
69 int ttl = 48;
70
71 while (ttl--) {
72 pci_bus_read_config_byte(bus, devfn, pos, &pos);
73 if (pos < 0x40)
74 break;
75 pos &= ~3;
76 pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_ID,
77 &id);
78 if (id == 0xff)
79 break;
80 if (id == cap)
81 return pos;
82 pos += PCI_CAP_LIST_NEXT;
83 }
84 return 0;
85}
86
87int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap)
88{
89 return __pci_find_next_cap(dev->bus, dev->devfn,
90 pos + PCI_CAP_LIST_NEXT, cap);
91}
92EXPORT_SYMBOL_GPL(pci_find_next_capability);
93
65static int __pci_bus_find_cap(struct pci_bus *bus, unsigned int devfn, u8 hdr_type, int cap) 94static int __pci_bus_find_cap(struct pci_bus *bus, unsigned int devfn, u8 hdr_type, int cap)
66{ 95{
67 u16 status; 96 u16 status;
68 u8 pos, id; 97 u8 pos;
69 int ttl = 48;
70 98
71 pci_bus_read_config_word(bus, devfn, PCI_STATUS, &status); 99 pci_bus_read_config_word(bus, devfn, PCI_STATUS, &status);
72 if (!(status & PCI_STATUS_CAP_LIST)) 100 if (!(status & PCI_STATUS_CAP_LIST))
@@ -75,24 +103,15 @@ static int __pci_bus_find_cap(struct pci_bus *bus, unsigned int devfn, u8 hdr_ty
75 switch (hdr_type) { 103 switch (hdr_type) {
76 case PCI_HEADER_TYPE_NORMAL: 104 case PCI_HEADER_TYPE_NORMAL:
77 case PCI_HEADER_TYPE_BRIDGE: 105 case PCI_HEADER_TYPE_BRIDGE:
78 pci_bus_read_config_byte(bus, devfn, PCI_CAPABILITY_LIST, &pos); 106 pos = PCI_CAPABILITY_LIST;
79 break; 107 break;
80 case PCI_HEADER_TYPE_CARDBUS: 108 case PCI_HEADER_TYPE_CARDBUS:
81 pci_bus_read_config_byte(bus, devfn, PCI_CB_CAPABILITY_LIST, &pos); 109 pos = PCI_CB_CAPABILITY_LIST;
82 break; 110 break;
83 default: 111 default:
84 return 0; 112 return 0;
85 } 113 }
86 while (ttl-- && pos >= 0x40) { 114 return __pci_find_next_cap(bus, devfn, pos, cap);
87 pos &= ~3;
88 pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_ID, &id);
89 if (id == 0xff)
90 break;
91 if (id == cap)
92 return pos;
93 pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_NEXT, &pos);
94 }
95 return 0;
96} 115}
97 116
98/** 117/**
@@ -252,6 +271,8 @@ pci_restore_bars(struct pci_dev *dev)
252 pci_update_resource(dev, &dev->resource[i], i); 271 pci_update_resource(dev, &dev->resource[i], i);
253} 272}
254 273
274int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t t);
275
255/** 276/**
256 * pci_set_power_state - Set the power state of a PCI device 277 * pci_set_power_state - Set the power state of a PCI device
257 * @dev: PCI device to be suspended 278 * @dev: PCI device to be suspended
@@ -266,7 +287,6 @@ pci_restore_bars(struct pci_dev *dev)
266 * -EIO if device does not support PCI PM. 287 * -EIO if device does not support PCI PM.
267 * 0 if we can successfully change the power state. 288 * 0 if we can successfully change the power state.
268 */ 289 */
269int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t t);
270int 290int
271pci_set_power_state(struct pci_dev *dev, pci_power_t state) 291pci_set_power_state(struct pci_dev *dev, pci_power_t state)
272{ 292{
@@ -314,19 +334,19 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
314 * sets PowerState to 0. 334 * sets PowerState to 0.
315 */ 335 */
316 switch (dev->current_state) { 336 switch (dev->current_state) {
337 case PCI_D0:
338 case PCI_D1:
339 case PCI_D2:
340 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
341 pmcsr |= state;
342 break;
317 case PCI_UNKNOWN: /* Boot-up */ 343 case PCI_UNKNOWN: /* Boot-up */
318 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot 344 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot
319 && !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET)) 345 && !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET))
320 need_restore = 1; 346 need_restore = 1;
321 /* Fall-through: force to D0 */ 347 /* Fall-through: force to D0 */
322 case PCI_D3hot:
323 case PCI_D3cold:
324 case PCI_POWER_ERROR:
325 pmcsr = 0;
326 break;
327 default: 348 default:
328 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 349 pmcsr = 0;
329 pmcsr |= state;
330 break; 350 break;
331 } 351 }
332 352
@@ -808,8 +828,8 @@ pci_clear_mwi(struct pci_dev *dev)
808 828
809/** 829/**
810 * pci_intx - enables/disables PCI INTx for device dev 830 * pci_intx - enables/disables PCI INTx for device dev
811 * @dev: the PCI device to operate on 831 * @pdev: the PCI device to operate on
812 * @enable: boolean 832 * @enable: boolean: whether to enable or disable PCI INTx
813 * 833 *
814 * Enables/disables PCI INTx for device dev 834 * Enables/disables PCI INTx for device dev
815 */ 835 */
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index d3f3dd42240d..6527b36c9a61 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -15,6 +15,13 @@ extern int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
15extern int (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state); 15extern int (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state);
16extern int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t state); 16extern int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t state);
17 17
18extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
19extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
20extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
21extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
22extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
23extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
24
18/* PCI /proc functions */ 25/* PCI /proc functions */
19#ifdef CONFIG_PROC_FS 26#ifdef CONFIG_PROC_FS
20extern int pci_proc_attach_device(struct pci_dev *dev); 27extern int pci_proc_attach_device(struct pci_dev *dev);
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 393e0cee91a9..467a4ceccf10 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -11,6 +11,8 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/pm.h> 13#include <linux/pm.h>
14#include <linux/string.h>
15#include <linux/slab.h>
14#include <linux/pcieport_if.h> 16#include <linux/pcieport_if.h>
15 17
16#include "portdrv.h" 18#include "portdrv.h"
@@ -61,7 +63,7 @@ static int pcie_port_remove_service(struct device *dev)
61 63
62static void pcie_port_shutdown_service(struct device *dev) {} 64static void pcie_port_shutdown_service(struct device *dev) {}
63 65
64static int pcie_port_suspend_service(struct device *dev, pm_message_t state, u32 level) 66static int pcie_port_suspend_service(struct device *dev, pm_message_t state)
65{ 67{
66 struct pcie_device *pciedev; 68 struct pcie_device *pciedev;
67 struct pcie_port_service_driver *driver; 69 struct pcie_port_service_driver *driver;
@@ -76,7 +78,7 @@ static int pcie_port_suspend_service(struct device *dev, pm_message_t state, u32
76 return 0; 78 return 0;
77} 79}
78 80
79static int pcie_port_resume_service(struct device *dev, u32 level) 81static int pcie_port_resume_service(struct device *dev)
80{ 82{
81 struct pcie_device *pciedev; 83 struct pcie_device *pciedev;
82 struct pcie_port_service_driver *driver; 84 struct pcie_port_service_driver *driver;
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index 3c565ce7f77b..02260141dc81 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -12,6 +12,7 @@
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/pm.h> 13#include <linux/pm.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/slab.h>
15#include <linux/pcieport_if.h> 16#include <linux/pcieport_if.h>
16 17
17#include "portdrv.h" 18#include "portdrv.h"
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 26a55d08b506..fce2cb2112d8 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -165,7 +165,7 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
165 if (l == 0xffffffff) 165 if (l == 0xffffffff)
166 l = 0; 166 l = 0;
167 if ((l & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) { 167 if ((l & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) {
168 sz = pci_size(l, sz, PCI_BASE_ADDRESS_MEM_MASK); 168 sz = pci_size(l, sz, (u32)PCI_BASE_ADDRESS_MEM_MASK);
169 if (!sz) 169 if (!sz)
170 continue; 170 continue;
171 res->start = l & PCI_BASE_ADDRESS_MEM_MASK; 171 res->start = l & PCI_BASE_ADDRESS_MEM_MASK;
@@ -215,7 +215,7 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
215 if (l == 0xffffffff) 215 if (l == 0xffffffff)
216 l = 0; 216 l = 0;
217 if (sz && sz != 0xffffffff) { 217 if (sz && sz != 0xffffffff) {
218 sz = pci_size(l, sz, PCI_ROM_ADDRESS_MASK); 218 sz = pci_size(l, sz, (u32)PCI_ROM_ADDRESS_MASK);
219 if (sz) { 219 if (sz) {
220 res->flags = (l & IORESOURCE_ROM_ENABLE) | 220 res->flags = (l & IORESOURCE_ROM_ENABLE) |
221 IORESOURCE_MEM | IORESOURCE_PREFETCH | 221 IORESOURCE_MEM | IORESOURCE_PREFETCH |
@@ -402,6 +402,12 @@ static void pci_enable_crs(struct pci_dev *dev)
402static void __devinit pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max) 402static void __devinit pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
403{ 403{
404 struct pci_bus *parent = child->parent; 404 struct pci_bus *parent = child->parent;
405
406 /* Attempts to fix that up are really dangerous unless
407 we're going to re-assign all bus numbers. */
408 if (!pcibios_assign_all_busses())
409 return;
410
405 while (parent->parent && parent->subordinate < max) { 411 while (parent->parent && parent->subordinate < max) {
406 parent->subordinate = max; 412 parent->subordinate = max;
407 pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS, max); 413 pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS, max);
@@ -478,8 +484,18 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max
478 * We need to assign a number to this bus which we always 484 * We need to assign a number to this bus which we always
479 * do in the second pass. 485 * do in the second pass.
480 */ 486 */
481 if (!pass) 487 if (!pass) {
488 if (pcibios_assign_all_busses())
489 /* Temporarily disable forwarding of the
490 configuration cycles on all bridges in
491 this bus segment to avoid possible
492 conflicts in the second pass between two
493 bridges programmed with overlapping
494 bus ranges. */
495 pci_write_config_dword(dev, PCI_PRIMARY_BUS,
496 buses & ~0xffffff);
482 return max; 497 return max;
498 }
483 499
484 /* Clear errors */ 500 /* Clear errors */
485 pci_write_config_word(dev, PCI_STATUS, 0xffff); 501 pci_write_config_word(dev, PCI_STATUS, 0xffff);
@@ -653,6 +669,7 @@ static void pci_release_dev(struct device *dev)
653 669
654/** 670/**
655 * pci_cfg_space_size - get the configuration space size of the PCI device. 671 * pci_cfg_space_size - get the configuration space size of the PCI device.
672 * @dev: PCI device
656 * 673 *
657 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices 674 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
658 * have 4096 bytes. Even if the device is capable, that doesn't mean we can 675 * have 4096 bytes. Even if the device is capable, that doesn't mean we can
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index 9613f666c110..9eb465727fce 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -80,7 +80,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
80 80
81 if ((pos & 1) && cnt) { 81 if ((pos & 1) && cnt) {
82 unsigned char val; 82 unsigned char val;
83 pci_read_config_byte(dev, pos, &val); 83 pci_user_read_config_byte(dev, pos, &val);
84 __put_user(val, buf); 84 __put_user(val, buf);
85 buf++; 85 buf++;
86 pos++; 86 pos++;
@@ -89,7 +89,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
89 89
90 if ((pos & 3) && cnt > 2) { 90 if ((pos & 3) && cnt > 2) {
91 unsigned short val; 91 unsigned short val;
92 pci_read_config_word(dev, pos, &val); 92 pci_user_read_config_word(dev, pos, &val);
93 __put_user(cpu_to_le16(val), (unsigned short __user *) buf); 93 __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
94 buf += 2; 94 buf += 2;
95 pos += 2; 95 pos += 2;
@@ -98,7 +98,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
98 98
99 while (cnt >= 4) { 99 while (cnt >= 4) {
100 unsigned int val; 100 unsigned int val;
101 pci_read_config_dword(dev, pos, &val); 101 pci_user_read_config_dword(dev, pos, &val);
102 __put_user(cpu_to_le32(val), (unsigned int __user *) buf); 102 __put_user(cpu_to_le32(val), (unsigned int __user *) buf);
103 buf += 4; 103 buf += 4;
104 pos += 4; 104 pos += 4;
@@ -107,7 +107,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
107 107
108 if (cnt >= 2) { 108 if (cnt >= 2) {
109 unsigned short val; 109 unsigned short val;
110 pci_read_config_word(dev, pos, &val); 110 pci_user_read_config_word(dev, pos, &val);
111 __put_user(cpu_to_le16(val), (unsigned short __user *) buf); 111 __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
112 buf += 2; 112 buf += 2;
113 pos += 2; 113 pos += 2;
@@ -116,7 +116,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
116 116
117 if (cnt) { 117 if (cnt) {
118 unsigned char val; 118 unsigned char val;
119 pci_read_config_byte(dev, pos, &val); 119 pci_user_read_config_byte(dev, pos, &val);
120 __put_user(val, buf); 120 __put_user(val, buf);
121 buf++; 121 buf++;
122 pos++; 122 pos++;
@@ -151,7 +151,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
151 if ((pos & 1) && cnt) { 151 if ((pos & 1) && cnt) {
152 unsigned char val; 152 unsigned char val;
153 __get_user(val, buf); 153 __get_user(val, buf);
154 pci_write_config_byte(dev, pos, val); 154 pci_user_write_config_byte(dev, pos, val);
155 buf++; 155 buf++;
156 pos++; 156 pos++;
157 cnt--; 157 cnt--;
@@ -160,7 +160,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
160 if ((pos & 3) && cnt > 2) { 160 if ((pos & 3) && cnt > 2) {
161 unsigned short val; 161 unsigned short val;
162 __get_user(val, (unsigned short __user *) buf); 162 __get_user(val, (unsigned short __user *) buf);
163 pci_write_config_word(dev, pos, le16_to_cpu(val)); 163 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
164 buf += 2; 164 buf += 2;
165 pos += 2; 165 pos += 2;
166 cnt -= 2; 166 cnt -= 2;
@@ -169,7 +169,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
169 while (cnt >= 4) { 169 while (cnt >= 4) {
170 unsigned int val; 170 unsigned int val;
171 __get_user(val, (unsigned int __user *) buf); 171 __get_user(val, (unsigned int __user *) buf);
172 pci_write_config_dword(dev, pos, le32_to_cpu(val)); 172 pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
173 buf += 4; 173 buf += 4;
174 pos += 4; 174 pos += 4;
175 cnt -= 4; 175 cnt -= 4;
@@ -178,7 +178,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
178 if (cnt >= 2) { 178 if (cnt >= 2) {
179 unsigned short val; 179 unsigned short val;
180 __get_user(val, (unsigned short __user *) buf); 180 __get_user(val, (unsigned short __user *) buf);
181 pci_write_config_word(dev, pos, le16_to_cpu(val)); 181 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
182 buf += 2; 182 buf += 2;
183 pos += 2; 183 pos += 2;
184 cnt -= 2; 184 cnt -= 2;
@@ -187,7 +187,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
187 if (cnt) { 187 if (cnt) {
188 unsigned char val; 188 unsigned char val;
189 __get_user(val, buf); 189 __get_user(val, buf);
190 pci_write_config_byte(dev, pos, val); 190 pci_user_write_config_byte(dev, pos, val);
191 buf++; 191 buf++;
192 pos++; 192 pos++;
193 cnt--; 193 cnt--;
@@ -484,10 +484,10 @@ static int show_dev_config(struct seq_file *m, void *v)
484 484
485 drv = pci_dev_driver(dev); 485 drv = pci_dev_driver(dev);
486 486
487 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 487 pci_user_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
488 pci_read_config_byte (dev, PCI_LATENCY_TIMER, &latency); 488 pci_user_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
489 pci_read_config_byte (dev, PCI_MIN_GNT, &min_gnt); 489 pci_user_read_config_byte (dev, PCI_MIN_GNT, &min_gnt);
490 pci_read_config_byte (dev, PCI_MAX_LAT, &max_lat); 490 pci_user_read_config_byte (dev, PCI_MAX_LAT, &max_lat);
491 seq_printf(m, " Bus %2d, device %3d, function %2d:\n", 491 seq_printf(m, " Bus %2d, device %3d, function %2d:\n",
492 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); 492 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
493 seq_printf(m, " Class %04x", class_rev >> 16); 493 seq_printf(m, " Class %04x", class_rev >> 16);
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 11ca44387cb0..3a4f49f4effb 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -7,6 +7,9 @@
7 * 7 *
8 * Copyright (c) 1999 Martin Mares <mj@ucw.cz> 8 * Copyright (c) 1999 Martin Mares <mj@ucw.cz>
9 * 9 *
10 * Init/reset quirks for USB host controllers should be in the
11 * USB quirks file, where their drivers can access reuse it.
12 *
10 * The bridge optimization stuff has been removed. If you really 13 * The bridge optimization stuff has been removed. If you really
11 * have a silly BIOS which is unable to set your host bridge right, 14 * have a silly BIOS which is unable to set your host bridge right,
12 * use the PowerTweak utility (see http://powertweak.sourceforge.net). 15 * use the PowerTweak utility (see http://powertweak.sourceforge.net).
@@ -241,7 +244,8 @@ static void __devinit quirk_s3_64M(struct pci_dev *dev)
241DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M ); 244DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M );
242DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M ); 245DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M );
243 246
244static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region, unsigned size, int nr) 247static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
248 unsigned size, int nr, const char *name)
245{ 249{
246 region &= ~(size-1); 250 region &= ~(size-1);
247 if (region) { 251 if (region) {
@@ -259,6 +263,7 @@ static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region, unsi
259 pcibios_bus_to_resource(dev, res, &bus_region); 263 pcibios_bus_to_resource(dev, res, &bus_region);
260 264
261 pci_claim_resource(dev, nr); 265 pci_claim_resource(dev, nr);
266 printk("PCI quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name);
262 } 267 }
263} 268}
264 269
@@ -291,25 +296,98 @@ static void __devinit quirk_ali7101_acpi(struct pci_dev *dev)
291 u16 region; 296 u16 region;
292 297
293 pci_read_config_word(dev, 0xE0, &region); 298 pci_read_config_word(dev, 0xE0, &region);
294 quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES); 299 quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES, "ali7101 ACPI");
295 pci_read_config_word(dev, 0xE2, &region); 300 pci_read_config_word(dev, 0xE2, &region);
296 quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1); 301 quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1, "ali7101 SMB");
297} 302}
298DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, quirk_ali7101_acpi ); 303DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, quirk_ali7101_acpi );
299 304
305static void piix4_io_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable)
306{
307 u32 devres;
308 u32 mask, size, base;
309
310 pci_read_config_dword(dev, port, &devres);
311 if ((devres & enable) != enable)
312 return;
313 mask = (devres >> 16) & 15;
314 base = devres & 0xffff;
315 size = 16;
316 for (;;) {
317 unsigned bit = size >> 1;
318 if ((bit & mask) == bit)
319 break;
320 size = bit;
321 }
322 /*
323 * For now we only print it out. Eventually we'll want to
324 * reserve it (at least if it's in the 0x1000+ range), but
325 * let's get enough confirmation reports first.
326 */
327 base &= -size;
328 printk("%s PIO at %04x-%04x\n", name, base, base + size - 1);
329}
330
331static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable)
332{
333 u32 devres;
334 u32 mask, size, base;
335
336 pci_read_config_dword(dev, port, &devres);
337 if ((devres & enable) != enable)
338 return;
339 base = devres & 0xffff0000;
340 mask = (devres & 0x3f) << 16;
341 size = 128 << 16;
342 for (;;) {
343 unsigned bit = size >> 1;
344 if ((bit & mask) == bit)
345 break;
346 size = bit;
347 }
348 /*
349 * For now we only print it out. Eventually we'll want to
350 * reserve it, but let's get enough confirmation reports first.
351 */
352 base &= -size;
353 printk("%s MMIO at %04x-%04x\n", name, base, base + size - 1);
354}
355
300/* 356/*
301 * PIIX4 ACPI: Two IO regions pointed to by longwords at 357 * PIIX4 ACPI: Two IO regions pointed to by longwords at
302 * 0x40 (64 bytes of ACPI registers) 358 * 0x40 (64 bytes of ACPI registers)
303 * 0x90 (32 bytes of SMB registers) 359 * 0x90 (16 bytes of SMB registers)
360 * and a few strange programmable PIIX4 device resources.
304 */ 361 */
305static void __devinit quirk_piix4_acpi(struct pci_dev *dev) 362static void __devinit quirk_piix4_acpi(struct pci_dev *dev)
306{ 363{
307 u32 region; 364 u32 region, res_a;
308 365
309 pci_read_config_dword(dev, 0x40, &region); 366 pci_read_config_dword(dev, 0x40, &region);
310 quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES); 367 quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES, "PIIX4 ACPI");
311 pci_read_config_dword(dev, 0x90, &region); 368 pci_read_config_dword(dev, 0x90, &region);
312 quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1); 369 quirk_io_region(dev, region, 16, PCI_BRIDGE_RESOURCES+1, "PIIX4 SMB");
370
371 /* Device resource A has enables for some of the other ones */
372 pci_read_config_dword(dev, 0x5c, &res_a);
373
374 piix4_io_quirk(dev, "PIIX4 devres B", 0x60, 3 << 21);
375 piix4_io_quirk(dev, "PIIX4 devres C", 0x64, 3 << 21);
376
377 /* Device resource D is just bitfields for static resources */
378
379 /* Device 12 enabled? */
380 if (res_a & (1 << 29)) {
381 piix4_io_quirk(dev, "PIIX4 devres E", 0x68, 1 << 20);
382 piix4_mem_quirk(dev, "PIIX4 devres F", 0x6c, 1 << 7);
383 }
384 /* Device 13 enabled? */
385 if (res_a & (1 << 30)) {
386 piix4_io_quirk(dev, "PIIX4 devres G", 0x70, 1 << 20);
387 piix4_mem_quirk(dev, "PIIX4 devres H", 0x74, 1 << 7);
388 }
389 piix4_io_quirk(dev, "PIIX4 devres I", 0x78, 1 << 20);
390 piix4_io_quirk(dev, "PIIX4 devres J", 0x7c, 1 << 20);
313} 391}
314DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, quirk_piix4_acpi ); 392DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, quirk_piix4_acpi );
315 393
@@ -323,10 +401,10 @@ static void __devinit quirk_ich4_lpc_acpi(struct pci_dev *dev)
323 u32 region; 401 u32 region;
324 402
325 pci_read_config_dword(dev, 0x40, &region); 403 pci_read_config_dword(dev, 0x40, &region);
326 quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES); 404 quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES, "ICH4 ACPI/GPIO/TCO");
327 405
328 pci_read_config_dword(dev, 0x58, &region); 406 pci_read_config_dword(dev, 0x58, &region);
329 quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1); 407 quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1, "ICH4 GPIO");
330} 408}
331DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, quirk_ich4_lpc_acpi ); 409DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, quirk_ich4_lpc_acpi );
332DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, quirk_ich4_lpc_acpi ); 410DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, quirk_ich4_lpc_acpi );
@@ -339,6 +417,18 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12,
339DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, quirk_ich4_lpc_acpi ); 417DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, quirk_ich4_lpc_acpi );
340DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, quirk_ich4_lpc_acpi ); 418DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, quirk_ich4_lpc_acpi );
341 419
420static void __devinit quirk_ich6_lpc_acpi(struct pci_dev *dev)
421{
422 u32 region;
423
424 pci_read_config_dword(dev, 0x40, &region);
425 quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES, "ICH6 ACPI/GPIO/TCO");
426
427 pci_read_config_dword(dev, 0x48, &region);
428 quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1, "ICH6 GPIO");
429}
430DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, quirk_ich6_lpc_acpi );
431
342/* 432/*
343 * VIA ACPI: One IO region pointed to by longword at 433 * VIA ACPI: One IO region pointed to by longword at
344 * 0x48 or 0x20 (256 bytes of ACPI registers) 434 * 0x48 or 0x20 (256 bytes of ACPI registers)
@@ -352,7 +442,7 @@ static void __devinit quirk_vt82c586_acpi(struct pci_dev *dev)
352 if (rev & 0x10) { 442 if (rev & 0x10) {
353 pci_read_config_dword(dev, 0x48, &region); 443 pci_read_config_dword(dev, 0x48, &region);
354 region &= PCI_BASE_ADDRESS_IO_MASK; 444 region &= PCI_BASE_ADDRESS_IO_MASK;
355 quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES); 445 quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES, "vt82c586 ACPI");
356 } 446 }
357} 447}
358DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt82c586_acpi ); 448DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt82c586_acpi );
@@ -372,11 +462,11 @@ static void __devinit quirk_vt82c686_acpi(struct pci_dev *dev)
372 462
373 pci_read_config_word(dev, 0x70, &hm); 463 pci_read_config_word(dev, 0x70, &hm);
374 hm &= PCI_BASE_ADDRESS_IO_MASK; 464 hm &= PCI_BASE_ADDRESS_IO_MASK;
375 quirk_io_region(dev, hm, 128, PCI_BRIDGE_RESOURCES + 1); 465 quirk_io_region(dev, hm, 128, PCI_BRIDGE_RESOURCES + 1, "vt82c686 HW-mon");
376 466
377 pci_read_config_dword(dev, 0x90, &smb); 467 pci_read_config_dword(dev, 0x90, &smb);
378 smb &= PCI_BASE_ADDRESS_IO_MASK; 468 smb &= PCI_BASE_ADDRESS_IO_MASK;
379 quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 2); 469 quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 2, "vt82c686 SMB");
380} 470}
381DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt82c686_acpi ); 471DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt82c686_acpi );
382 472
@@ -391,11 +481,11 @@ static void __devinit quirk_vt8235_acpi(struct pci_dev *dev)
391 481
392 pci_read_config_word(dev, 0x88, &pm); 482 pci_read_config_word(dev, 0x88, &pm);
393 pm &= PCI_BASE_ADDRESS_IO_MASK; 483 pm &= PCI_BASE_ADDRESS_IO_MASK;
394 quirk_io_region(dev, pm, 128, PCI_BRIDGE_RESOURCES); 484 quirk_io_region(dev, pm, 128, PCI_BRIDGE_RESOURCES, "vt8235 PM");
395 485
396 pci_read_config_word(dev, 0xd0, &smb); 486 pci_read_config_word(dev, 0xd0, &smb);
397 smb &= PCI_BASE_ADDRESS_IO_MASK; 487 smb &= PCI_BASE_ADDRESS_IO_MASK;
398 quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 1); 488 quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 1, "vt8235 SMB");
399} 489}
400DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi); 490DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi);
401 491
@@ -558,28 +648,6 @@ static void quirk_via_irq(struct pci_dev *dev)
558DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_irq); 648DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_irq);
559 649
560/* 650/*
561 * PIIX3 USB: We have to disable USB interrupts that are
562 * hardwired to PIRQD# and may be shared with an
563 * external device.
564 *
565 * Legacy Support Register (LEGSUP):
566 * bit13: USB PIRQ Enable (USBPIRQDEN),
567 * bit4: Trap/SMI On IRQ Enable (USBSMIEN).
568 *
569 * We mask out all r/wc bits, too.
570 */
571static void __devinit quirk_piix3_usb(struct pci_dev *dev)
572{
573 u16 legsup;
574
575 pci_read_config_word(dev, 0xc0, &legsup);
576 legsup &= 0x50ef;
577 pci_write_config_word(dev, 0xc0, legsup);
578}
579DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_2, quirk_piix3_usb );
580DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_2, quirk_piix3_usb );
581
582/*
583 * VIA VT82C598 has its device ID settable and many BIOSes 651 * VIA VT82C598 has its device ID settable and many BIOSes
584 * set it to the ID of VT82C597 for backward compatibility. 652 * set it to the ID of VT82C597 for backward compatibility.
585 * We need to switch it off to be able to recognize the real 653 * We need to switch it off to be able to recognize the real
@@ -847,6 +915,12 @@ static void __init asus_hides_smbus_hostbridge(struct pci_dev *dev)
847 case 0x186a: /* M6Ne notebook */ 915 case 0x186a: /* M6Ne notebook */
848 asus_hides_smbus = 1; 916 asus_hides_smbus = 1;
849 } 917 }
918 if (dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB) {
919 switch (dev->subsystem_device) {
920 case 0x1882: /* M6V notebook */
921 asus_hides_smbus = 1;
922 }
923 }
850 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_HP)) { 924 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
851 if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) 925 if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
852 switch(dev->subsystem_device) { 926 switch(dev->subsystem_device) {
@@ -857,6 +931,7 @@ static void __init asus_hides_smbus_hostbridge(struct pci_dev *dev)
857 if (dev->device == PCI_DEVICE_ID_INTEL_82865_HB) 931 if (dev->device == PCI_DEVICE_ID_INTEL_82865_HB)
858 switch (dev->subsystem_device) { 932 switch (dev->subsystem_device) {
859 case 0x12bc: /* HP D330L */ 933 case 0x12bc: /* HP D330L */
934 case 0x12bd: /* HP D530 */
860 asus_hides_smbus = 1; 935 asus_hides_smbus = 1;
861 } 936 }
862 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_TOSHIBA)) { 937 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_TOSHIBA)) {
@@ -891,6 +966,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865_HB, asus
891DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_7205_0, asus_hides_smbus_hostbridge ); 966DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_7205_0, asus_hides_smbus_hostbridge );
892DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855PM_HB, asus_hides_smbus_hostbridge ); 967DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855PM_HB, asus_hides_smbus_hostbridge );
893DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855GM_HB, asus_hides_smbus_hostbridge ); 968DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855GM_HB, asus_hides_smbus_hostbridge );
969DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82915GM_HB, asus_hides_smbus_hostbridge );
894 970
895static void __init asus_hides_smbus_lpc(struct pci_dev *dev) 971static void __init asus_hides_smbus_lpc(struct pci_dev *dev)
896{ 972{
@@ -915,6 +991,23 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, as
915DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, asus_hides_smbus_lpc ); 991DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, asus_hides_smbus_lpc );
916DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, asus_hides_smbus_lpc ); 992DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, asus_hides_smbus_lpc );
917 993
994static void __init asus_hides_smbus_lpc_ich6(struct pci_dev *dev)
995{
996 u32 val, rcba;
997 void __iomem *base;
998
999 if (likely(!asus_hides_smbus))
1000 return;
1001 pci_read_config_dword(dev, 0xF0, &rcba);
1002 base = ioremap_nocache(rcba & 0xFFFFC000, 0x4000); /* use bits 31:14, 16 kB aligned */
1003 if (base == NULL) return;
1004 val=readl(base + 0x3418); /* read the Function Disable register, dword mode only */
1005 writel(val & 0xFFFFFFF7, base + 0x3418); /* enable the SMBus device */
1006 iounmap(base);
1007 printk(KERN_INFO "PCI: Enabled ICH6/i801 SMBus device\n");
1008}
1009DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc_ich6 );
1010
918/* 1011/*
919 * SiS 96x south bridge: BIOS typically hides SMBus device... 1012 * SiS 96x south bridge: BIOS typically hides SMBus device...
920 */ 1013 */
@@ -927,234 +1020,6 @@ static void __init quirk_sis_96x_smbus(struct pci_dev *dev)
927 pci_read_config_byte(dev, 0x77, &val); 1020 pci_read_config_byte(dev, 0x77, &val);
928} 1021}
929 1022
930
931#define UHCI_USBLEGSUP 0xc0 /* legacy support */
932#define UHCI_USBCMD 0 /* command register */
933#define UHCI_USBSTS 2 /* status register */
934#define UHCI_USBINTR 4 /* interrupt register */
935#define UHCI_USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */
936#define UHCI_USBCMD_RUN (1 << 0) /* RUN/STOP bit */
937#define UHCI_USBCMD_GRESET (1 << 2) /* Global reset */
938#define UHCI_USBCMD_CONFIGURE (1 << 6) /* config semaphore */
939#define UHCI_USBSTS_HALTED (1 << 5) /* HCHalted bit */
940
941#define OHCI_CONTROL 0x04
942#define OHCI_CMDSTATUS 0x08
943#define OHCI_INTRSTATUS 0x0c
944#define OHCI_INTRENABLE 0x10
945#define OHCI_INTRDISABLE 0x14
946#define OHCI_OCR (1 << 3) /* ownership change request */
947#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */
948#define OHCI_INTR_OC (1 << 30) /* ownership change */
949
950#define EHCI_HCC_PARAMS 0x08 /* extended capabilities */
951#define EHCI_USBCMD 0 /* command register */
952#define EHCI_USBCMD_RUN (1 << 0) /* RUN/STOP bit */
953#define EHCI_USBSTS 4 /* status register */
954#define EHCI_USBSTS_HALTED (1 << 12) /* HCHalted bit */
955#define EHCI_USBINTR 8 /* interrupt register */
956#define EHCI_USBLEGSUP 0 /* legacy support register */
957#define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
958#define EHCI_USBLEGSUP_OS (1 << 24) /* OS semaphore */
959#define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
960#define EHCI_USBLEGCTLSTS_SOOE (1 << 13) /* SMI on ownership change */
961
962int usb_early_handoff __devinitdata = 0;
963static int __init usb_handoff_early(char *str)
964{
965 usb_early_handoff = 1;
966 return 0;
967}
968__setup("usb-handoff", usb_handoff_early);
969
970static void __devinit quirk_usb_handoff_uhci(struct pci_dev *pdev)
971{
972 unsigned long base = 0;
973 int wait_time, delta;
974 u16 val, sts;
975 int i;
976
977 for (i = 0; i < PCI_ROM_RESOURCE; i++)
978 if ((pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
979 base = pci_resource_start(pdev, i);
980 break;
981 }
982
983 if (!base)
984 return;
985
986 /*
987 * stop controller
988 */
989 sts = inw(base + UHCI_USBSTS);
990 val = inw(base + UHCI_USBCMD);
991 val &= ~(u16)(UHCI_USBCMD_RUN | UHCI_USBCMD_CONFIGURE);
992 outw(val, base + UHCI_USBCMD);
993
994 /*
995 * wait while it stops if it was running
996 */
997 if ((sts & UHCI_USBSTS_HALTED) == 0)
998 {
999 wait_time = 1000;
1000 delta = 100;
1001
1002 do {
1003 outw(0x1f, base + UHCI_USBSTS);
1004 udelay(delta);
1005 wait_time -= delta;
1006 val = inw(base + UHCI_USBSTS);
1007 if (val & UHCI_USBSTS_HALTED)
1008 break;
1009 } while (wait_time > 0);
1010 }
1011
1012 /*
1013 * disable interrupts & legacy support
1014 */
1015 outw(0, base + UHCI_USBINTR);
1016 outw(0x1f, base + UHCI_USBSTS);
1017 pci_read_config_word(pdev, UHCI_USBLEGSUP, &val);
1018 if (val & 0xbf)
1019 pci_write_config_word(pdev, UHCI_USBLEGSUP, UHCI_USBLEGSUP_DEFAULT);
1020
1021}
1022
1023static void __devinit quirk_usb_handoff_ohci(struct pci_dev *pdev)
1024{
1025 void __iomem *base;
1026 int wait_time;
1027
1028 base = ioremap_nocache(pci_resource_start(pdev, 0),
1029 pci_resource_len(pdev, 0));
1030 if (base == NULL) return;
1031
1032 if (readl(base + OHCI_CONTROL) & OHCI_CTRL_IR) {
1033 wait_time = 500; /* 0.5 seconds */
1034 writel(OHCI_INTR_OC, base + OHCI_INTRENABLE);
1035 writel(OHCI_OCR, base + OHCI_CMDSTATUS);
1036 while (wait_time > 0 &&
1037 readl(base + OHCI_CONTROL) & OHCI_CTRL_IR) {
1038 wait_time -= 10;
1039 msleep(10);
1040 }
1041 }
1042
1043 /*
1044 * disable interrupts
1045 */
1046 writel(~(u32)0, base + OHCI_INTRDISABLE);
1047 writel(~(u32)0, base + OHCI_INTRSTATUS);
1048
1049 iounmap(base);
1050}
1051
1052static void __devinit quirk_usb_disable_ehci(struct pci_dev *pdev)
1053{
1054 int wait_time, delta;
1055 void __iomem *base, *op_reg_base;
1056 u32 hcc_params, val, temp;
1057 u8 cap_length;
1058
1059 base = ioremap_nocache(pci_resource_start(pdev, 0),
1060 pci_resource_len(pdev, 0));
1061 if (base == NULL) return;
1062
1063 cap_length = readb(base);
1064 op_reg_base = base + cap_length;
1065 hcc_params = readl(base + EHCI_HCC_PARAMS);
1066 hcc_params = (hcc_params >> 8) & 0xff;
1067 if (hcc_params) {
1068 pci_read_config_dword(pdev,
1069 hcc_params + EHCI_USBLEGSUP,
1070 &val);
1071 if (((val & 0xff) == 1) && (val & EHCI_USBLEGSUP_BIOS)) {
1072 /*
1073 * Ok, BIOS is in smm mode, try to hand off...
1074 */
1075 pci_read_config_dword(pdev,
1076 hcc_params + EHCI_USBLEGCTLSTS,
1077 &temp);
1078 pci_write_config_dword(pdev,
1079 hcc_params + EHCI_USBLEGCTLSTS,
1080 temp | EHCI_USBLEGCTLSTS_SOOE);
1081 val |= EHCI_USBLEGSUP_OS;
1082 pci_write_config_dword(pdev,
1083 hcc_params + EHCI_USBLEGSUP,
1084 val);
1085
1086 wait_time = 500;
1087 do {
1088 msleep(10);
1089 wait_time -= 10;
1090 pci_read_config_dword(pdev,
1091 hcc_params + EHCI_USBLEGSUP,
1092 &val);
1093 } while (wait_time && (val & EHCI_USBLEGSUP_BIOS));
1094 if (!wait_time) {
1095 /*
1096 * well, possibly buggy BIOS...
1097 */
1098 printk(KERN_WARNING "EHCI early BIOS handoff "
1099 "failed (BIOS bug ?)\n");
1100 pci_write_config_dword(pdev,
1101 hcc_params + EHCI_USBLEGSUP,
1102 EHCI_USBLEGSUP_OS);
1103 pci_write_config_dword(pdev,
1104 hcc_params + EHCI_USBLEGCTLSTS,
1105 0);
1106 }
1107 }
1108 }
1109
1110 /*
1111 * halt EHCI & disable its interrupts in any case
1112 */
1113 val = readl(op_reg_base + EHCI_USBSTS);
1114 if ((val & EHCI_USBSTS_HALTED) == 0) {
1115 val = readl(op_reg_base + EHCI_USBCMD);
1116 val &= ~EHCI_USBCMD_RUN;
1117 writel(val, op_reg_base + EHCI_USBCMD);
1118
1119 wait_time = 2000;
1120 delta = 100;
1121 do {
1122 writel(0x3f, op_reg_base + EHCI_USBSTS);
1123 udelay(delta);
1124 wait_time -= delta;
1125 val = readl(op_reg_base + EHCI_USBSTS);
1126 if ((val == ~(u32)0) || (val & EHCI_USBSTS_HALTED)) {
1127 break;
1128 }
1129 } while (wait_time > 0);
1130 }
1131 writel(0, op_reg_base + EHCI_USBINTR);
1132 writel(0x3f, op_reg_base + EHCI_USBSTS);
1133
1134 iounmap(base);
1135
1136 return;
1137}
1138
1139
1140
1141static void __devinit quirk_usb_early_handoff(struct pci_dev *pdev)
1142{
1143 if (!usb_early_handoff)
1144 return;
1145
1146 if (pdev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x00)) { /* UHCI */
1147 quirk_usb_handoff_uhci(pdev);
1148 } else if (pdev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x10)) { /* OHCI */
1149 quirk_usb_handoff_ohci(pdev);
1150 } else if (pdev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x20)) { /* EHCI */
1151 quirk_usb_disable_ehci(pdev);
1152 }
1153
1154 return;
1155}
1156DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_usb_early_handoff);
1157
1158/* 1023/*
1159 * ... This is further complicated by the fact that some SiS96x south 1024 * ... This is further complicated by the fact that some SiS96x south
1160 * bridges pretend to be 85C503/5513 instead. In that case see if we 1025 * bridges pretend to be 85C503/5513 instead. In that case see if we
@@ -1233,7 +1098,7 @@ static void __init quirk_alder_ioapic(struct pci_dev *pdev)
1233DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic ); 1098DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic );
1234#endif 1099#endif
1235 1100
1236#ifdef CONFIG_SCSI_SATA 1101#ifdef CONFIG_SCSI_SATA_INTEL_COMBINED
1237static void __devinit quirk_intel_ide_combined(struct pci_dev *pdev) 1102static void __devinit quirk_intel_ide_combined(struct pci_dev *pdev)
1238{ 1103{
1239 u8 prog, comb, tmp; 1104 u8 prog, comb, tmp;
@@ -1310,7 +1175,7 @@ static void __devinit quirk_intel_ide_combined(struct pci_dev *pdev)
1310 request_region(0x170, 8, "libata"); /* port 1 */ 1175 request_region(0x170, 8, "libata"); /* port 1 */
1311} 1176}
1312DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_intel_ide_combined ); 1177DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_intel_ide_combined );
1313#endif /* CONFIG_SCSI_SATA */ 1178#endif /* CONFIG_SCSI_SATA_INTEL_COMBINED */
1314 1179
1315 1180
1316int pcie_mch_quirk; 1181int pcie_mch_quirk;
@@ -1378,6 +1243,21 @@ static void __devinit quirk_netmos(struct pci_dev *dev)
1378} 1243}
1379DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, quirk_netmos); 1244DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, quirk_netmos);
1380 1245
1246
1247static void __devinit fixup_rev1_53c810(struct pci_dev* dev)
1248{
1249 /* rev 1 ncr53c810 chips don't set the class at all which means
1250 * they don't get their resources remapped. Fix that here.
1251 */
1252
1253 if (dev->class == PCI_CLASS_NOT_DEFINED) {
1254 printk(KERN_INFO "NCR 53c810 rev 1 detected, setting PCI class.\n");
1255 dev->class = PCI_CLASS_STORAGE_SCSI;
1256 }
1257}
1258DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810);
1259
1260
1381static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, struct pci_fixup *end) 1261static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, struct pci_fixup *end)
1382{ 1262{
1383 while (f < end) { 1263 while (f < end) {
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c
index 49bd21702314..598a115cd00e 100644
--- a/drivers/pci/rom.c
+++ b/drivers/pci/rom.c
@@ -9,6 +9,7 @@
9#include <linux/config.h> 9#include <linux/config.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/pci.h> 11#include <linux/pci.h>
12#include <linux/slab.h>
12 13
13#include "pci.h" 14#include "pci.h"
14 15
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 657be948baf7..28ce3a7ee434 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -40,7 +40,7 @@
40 * FIXME: IO should be max 256 bytes. However, since we may 40 * FIXME: IO should be max 256 bytes. However, since we may
41 * have a P2P bridge below a cardbus bridge, we need 4K. 41 * have a P2P bridge below a cardbus bridge, we need 4K.
42 */ 42 */
43#define CARDBUS_IO_SIZE (4*1024) 43#define CARDBUS_IO_SIZE (256)
44#define CARDBUS_MEM_SIZE (32*1024*1024) 44#define CARDBUS_MEM_SIZE (32*1024*1024)
45 45
46static void __devinit 46static void __devinit
diff --git a/drivers/pci/syscall.c b/drivers/pci/syscall.c
index c071790cc983..87fafc08cb9d 100644
--- a/drivers/pci/syscall.c
+++ b/drivers/pci/syscall.c
@@ -13,7 +13,7 @@
13#include <linux/smp_lock.h> 13#include <linux/smp_lock.h>
14#include <linux/syscalls.h> 14#include <linux/syscalls.h>
15#include <asm/uaccess.h> 15#include <asm/uaccess.h>
16 16#include "pci.h"
17 17
18asmlinkage long 18asmlinkage long
19sys_pciconfig_read(unsigned long bus, unsigned long dfn, 19sys_pciconfig_read(unsigned long bus, unsigned long dfn,
@@ -38,13 +38,13 @@ sys_pciconfig_read(unsigned long bus, unsigned long dfn,
38 lock_kernel(); 38 lock_kernel();
39 switch (len) { 39 switch (len) {
40 case 1: 40 case 1:
41 cfg_ret = pci_read_config_byte(dev, off, &byte); 41 cfg_ret = pci_user_read_config_byte(dev, off, &byte);
42 break; 42 break;
43 case 2: 43 case 2:
44 cfg_ret = pci_read_config_word(dev, off, &word); 44 cfg_ret = pci_user_read_config_word(dev, off, &word);
45 break; 45 break;
46 case 4: 46 case 4:
47 cfg_ret = pci_read_config_dword(dev, off, &dword); 47 cfg_ret = pci_user_read_config_dword(dev, off, &dword);
48 break; 48 break;
49 default: 49 default:
50 err = -EINVAL; 50 err = -EINVAL;
@@ -112,7 +112,7 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn,
112 err = get_user(byte, (u8 __user *)buf); 112 err = get_user(byte, (u8 __user *)buf);
113 if (err) 113 if (err)
114 break; 114 break;
115 err = pci_write_config_byte(dev, off, byte); 115 err = pci_user_write_config_byte(dev, off, byte);
116 if (err != PCIBIOS_SUCCESSFUL) 116 if (err != PCIBIOS_SUCCESSFUL)
117 err = -EIO; 117 err = -EIO;
118 break; 118 break;
@@ -121,7 +121,7 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn,
121 err = get_user(word, (u16 __user *)buf); 121 err = get_user(word, (u16 __user *)buf);
122 if (err) 122 if (err)
123 break; 123 break;
124 err = pci_write_config_word(dev, off, word); 124 err = pci_user_write_config_word(dev, off, word);
125 if (err != PCIBIOS_SUCCESSFUL) 125 if (err != PCIBIOS_SUCCESSFUL)
126 err = -EIO; 126 err = -EIO;
127 break; 127 break;
@@ -130,7 +130,7 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn,
130 err = get_user(dword, (u32 __user *)buf); 130 err = get_user(dword, (u32 __user *)buf);
131 if (err) 131 if (err)
132 break; 132 break;
133 err = pci_write_config_dword(dev, off, dword); 133 err = pci_user_write_config_dword(dev, off, dword);
134 if (err != PCIBIOS_SUCCESSFUL) 134 if (err != PCIBIOS_SUCCESSFUL)
135 err = -EIO; 135 err = -EIO;
136 break; 136 break;
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-03 05:14:20 -0500