6 files changed, 139 insertions, 6 deletions

diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 712250f5874a..26301cb25e7f 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -288,9 +288,9 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
                         next = dev->bus_list.next;
 
                 /* Run device routines with the device locked */
-                down(&dev->dev.sem);
+                device_lock(&dev->dev);
                 retval = cb(dev, userdata);
-                up(&dev->dev.sem);
+                device_unlock(&dev->dev);
                 if (retval)
                         break;
         }
diff --git a/drivers/pci/hotplug/fakephp.c b/drivers/pci/hotplug/fakephp.c
index 6151389fd903..0a894efd4b9b 100644
--- a/drivers/pci/hotplug/fakephp.c
+++ b/drivers/pci/hotplug/fakephp.c
@@ -73,7 +73,7 @@ static void legacy_release(struct kobject *kobj)
 }
 
 static struct kobj_type legacy_ktype = {
-        .sysfs_ops = &(struct sysfs_ops){
+        .sysfs_ops = &(const struct sysfs_ops){
                 .store = legacy_store, .show = legacy_show
         },
         .release = &legacy_release,
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 807224ec8351..de296452c957 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -642,6 +642,7 @@ void pci_create_legacy_files(struct pci_bus *b)
         if (!b->legacy_io)
                 goto kzalloc_err;
 
+        sysfs_bin_attr_init(b->legacy_io);
         b->legacy_io->attr.name = "legacy_io";
         b->legacy_io->size = 0xffff;
         b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
@@ -654,6 +655,7 @@ void pci_create_legacy_files(struct pci_bus *b)
                 goto legacy_io_err;
 
         /* Allocated above after the legacy_io struct */
+        sysfs_bin_attr_init(b->legacy_mem);
         b->legacy_mem = b->legacy_io + 1;
         b->legacy_mem->attr.name = "legacy_mem";
         b->legacy_mem->size = 1024*1024;
@@ -800,6 +802,7 @@ static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
         if (res_attr) {
                 char *res_attr_name = (char *)(res_attr + 1);
 
+                sysfs_bin_attr_init(res_attr);
                 if (write_combine) {
                         pdev->res_attr_wc[num] = res_attr;
                         sprintf(res_attr_name, "resource%d_wc", num);
@@ -972,6 +975,7 @@ static int pci_create_capabilities_sysfs(struct pci_dev *dev)
                 if (!attr)
                         return -ENOMEM;
 
+                sysfs_bin_attr_init(attr);
                 attr->size = dev->vpd->len;
                 attr->attr.name = "vpd";
                 attr->attr.mode = S_IRUSR | S_IWUSR;
@@ -1038,6 +1042,7 @@ int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
                         retval = -ENOMEM;
                         goto err_resource_files;
                 }
+                sysfs_bin_attr_init(attr);
                 attr->size = rom_size;
                 attr->attr.name = "rom";
                 attr->attr.mode = S_IRUSR;
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 6e100ae7f5b5..fdcf01af6762 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -303,6 +303,49 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
 }
 EXPORT_SYMBOL_GPL(pci_find_ext_capability);
 
+/**
+ * pci_bus_find_ext_capability - find an extended capability
+ * @bus:   the PCI bus to query
+ * @devfn: PCI device to query
+ * @cap:   capability code
+ *
+ * Like pci_find_ext_capability() but works for pci devices that do not have a
+ * pci_dev structure set up yet.
+ *
+ * Returns the address of the requested capability structure within the
+ * device's PCI configuration space or 0 in case the device does not
+ * support it.
+ */
+int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn,
+                                int cap)
+{
+        u32 header;
+        int ttl;
+        int pos = PCI_CFG_SPACE_SIZE;
+
+        /* minimum 8 bytes per capability */
+        ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
+
+        if (!pci_bus_read_config_dword(bus, devfn, pos, &header))
+                return 0;
+        if (header == 0xffffffff || header == 0)
+                return 0;
+
+        while (ttl-- > 0) {
+                if (PCI_EXT_CAP_ID(header) == cap)
+                        return pos;
+
+                pos = PCI_EXT_CAP_NEXT(header);
+                if (pos < PCI_CFG_SPACE_SIZE)
+                        break;
+
+                if (!pci_bus_read_config_dword(bus, devfn, pos, &header))
+                        break;
+        }
+
+        return 0;
+}
+
 static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
 {
         int rc, ttl = PCI_FIND_CAP_TTL;
@@ -2445,7 +2488,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
         if (!probe) {
                 pci_block_user_cfg_access(dev);
                 /* block PM suspend, driver probe, etc. */
-                down(&dev->dev.sem);
+                device_lock(&dev->dev);
         }
 
         rc = pci_dev_specific_reset(dev, probe);
@@ -2467,7 +2510,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
         rc = pci_parent_bus_reset(dev, probe);
 done:
         if (!probe) {
-                up(&dev->dev.sem);
+                device_unlock(&dev->dev);
                 pci_unblock_user_cfg_access(dev);
         }
 
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 039e87b71442..81d19d5683ac 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2533,6 +2533,91 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1518, quirk_i82576_sriov);
 
 #endif  /* CONFIG_PCI_IOV */
 
+/*
+ * This is a quirk for the Ricoh MMC controller found as a part of
+ * some mulifunction chips.
+
+ * This is very similiar and based on the ricoh_mmc driver written by
+ * Philip Langdale. Thank you for these magic sequences.
+ *
+ * These chips implement the four main memory card controllers (SD, MMC, MS, xD)
+ * and one or both of cardbus or firewire.
+ *
+ * It happens that they implement SD and MMC
+ * support as separate controllers (and PCI functions). The linux SDHCI
+ * driver supports MMC cards but the chip detects MMC cards in hardware
+ * and directs them to the MMC controller - so the SDHCI driver never sees
+ * them.
+ *
+ * To get around this, we must disable the useless MMC controller.
+ * At that point, the SDHCI controller will start seeing them
+ * It seems to be the case that the relevant PCI registers to deactivate the
+ * MMC controller live on PCI function 0, which might be the cardbus controller
+ * or the firewire controller, depending on the particular chip in question
+ *
+ * This has to be done early, because as soon as we disable the MMC controller
+ * other pci functions shift up one level, e.g. function #2 becomes function
+ * #1, and this will confuse the pci core.
+ */
+
+#ifdef CONFIG_MMC_RICOH_MMC
+static void ricoh_mmc_fixup_rl5c476(struct pci_dev *dev)
+{
+        /* disable via cardbus interface */
+        u8 write_enable;
+        u8 write_target;
+        u8 disable;
+
+        /* disable must be done via function #0 */
+        if (PCI_FUNC(dev->devfn))
+                return;
+
+        pci_read_config_byte(dev, 0xB7, &disable);
+        if (disable & 0x02)
+                return;
+
+        pci_read_config_byte(dev, 0x8E, &write_enable);
+        pci_write_config_byte(dev, 0x8E, 0xAA);
+        pci_read_config_byte(dev, 0x8D, &write_target);
+        pci_write_config_byte(dev, 0x8D, 0xB7);
+        pci_write_config_byte(dev, 0xB7, disable | 0x02);
+        pci_write_config_byte(dev, 0x8E, write_enable);
+        pci_write_config_byte(dev, 0x8D, write_target);
+
+        dev_notice(&dev->dev, "proprietary Ricoh MMC controller disabled (via cardbus function)\n");
+        dev_notice(&dev->dev, "MMC cards are now supported by standard SDHCI controller\n");
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, ricoh_mmc_fixup_rl5c476);
+DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, ricoh_mmc_fixup_rl5c476);
+
+static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev)
+{
+        /* disable via firewire interface */
+        u8 write_enable;
+        u8 disable;
+
+        /* disable must be done via function #0 */
+        if (PCI_FUNC(dev->devfn))
+                return;
+
+        pci_read_config_byte(dev, 0xCB, &disable);
+
+        if (disable & 0x02)
+                return;
+
+        pci_read_config_byte(dev, 0xCA, &write_enable);
+        pci_write_config_byte(dev, 0xCA, 0x57);
+        pci_write_config_byte(dev, 0xCB, disable | 0x02);
+        pci_write_config_byte(dev, 0xCA, write_enable);
+
+        dev_notice(&dev->dev, "proprietary Ricoh MMC controller disabled (via firewire function)\n");
+        dev_notice(&dev->dev, "MMC cards are now supported by standard SDHCI controller\n");
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
+DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
+#endif /*CONFIG_MMC_RICOH_MMC*/
+
+
 static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
                           struct pci_fixup *end)
 {
diff --git a/drivers/pci/slot.c b/drivers/pci/slot.c
index 49c9e6c9779a..f75a44d37fbe 100644
--- a/drivers/pci/slot.c
+++ b/drivers/pci/slot.c
@@ -29,7 +29,7 @@ static ssize_t pci_slot_attr_store(struct kobject *kobj,
         return attribute->store ? attribute->store(slot, buf, len) : -EIO;
 }
 
-static struct sysfs_ops pci_slot_sysfs_ops = {
+static const struct sysfs_ops pci_slot_sysfs_ops = {
         .show = pci_slot_attr_show,
         .store = pci_slot_attr_store,
 };