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-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c54
1 files changed, 8 insertions, 46 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 58f8018970fa..4317513771d1 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -462,11 +462,6 @@ static int hpc_toggle_emi(struct slot *slot)
462 462
463 slot_cmd = EMI_CTRL; 463 slot_cmd = EMI_CTRL;
464 cmd_mask = EMI_CTRL; 464 cmd_mask = EMI_CTRL;
465 if (!pciehp_poll_mode) {
466 slot_cmd = slot_cmd | HP_INTR_ENABLE;
467 cmd_mask = cmd_mask | HP_INTR_ENABLE;
468 }
469
470 rc = pcie_write_cmd(slot->ctrl, slot_cmd, cmd_mask); 465 rc = pcie_write_cmd(slot->ctrl, slot_cmd, cmd_mask);
471 slot->last_emi_toggle = get_seconds(); 466 slot->last_emi_toggle = get_seconds();
472 467
@@ -494,11 +489,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
494 default: 489 default:
495 return -1; 490 return -1;
496 } 491 }
497 if (!pciehp_poll_mode) {
498 slot_cmd = slot_cmd | HP_INTR_ENABLE;
499 cmd_mask = cmd_mask | HP_INTR_ENABLE;
500 }
501
502 rc = pcie_write_cmd(ctrl, slot_cmd, cmd_mask); 492 rc = pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
503 dbg("%s: SLOTCTRL %x write cmd %x\n", 493 dbg("%s: SLOTCTRL %x write cmd %x\n",
504 __func__, ctrl->cap_base + SLOTCTRL, slot_cmd); 494 __func__, ctrl->cap_base + SLOTCTRL, slot_cmd);
@@ -514,13 +504,7 @@ static void hpc_set_green_led_on(struct slot *slot)
514 504
515 slot_cmd = 0x0100; 505 slot_cmd = 0x0100;
516 cmd_mask = PWR_LED_CTRL; 506 cmd_mask = PWR_LED_CTRL;
517 if (!pciehp_poll_mode) {
518 slot_cmd = slot_cmd | HP_INTR_ENABLE;
519 cmd_mask = cmd_mask | HP_INTR_ENABLE;
520 }
521
522 pcie_write_cmd(ctrl, slot_cmd, cmd_mask); 507 pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
523
524 dbg("%s: SLOTCTRL %x write cmd %x\n", 508 dbg("%s: SLOTCTRL %x write cmd %x\n",
525 __func__, ctrl->cap_base + SLOTCTRL, slot_cmd); 509 __func__, ctrl->cap_base + SLOTCTRL, slot_cmd);
526} 510}
@@ -533,11 +517,6 @@ static void hpc_set_green_led_off(struct slot *slot)
533 517
534 slot_cmd = 0x0300; 518 slot_cmd = 0x0300;
535 cmd_mask = PWR_LED_CTRL; 519 cmd_mask = PWR_LED_CTRL;
536 if (!pciehp_poll_mode) {
537 slot_cmd = slot_cmd | HP_INTR_ENABLE;
538 cmd_mask = cmd_mask | HP_INTR_ENABLE;
539 }
540
541 pcie_write_cmd(ctrl, slot_cmd, cmd_mask); 520 pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
542 dbg("%s: SLOTCTRL %x write cmd %x\n", 521 dbg("%s: SLOTCTRL %x write cmd %x\n",
543 __func__, ctrl->cap_base + SLOTCTRL, slot_cmd); 522 __func__, ctrl->cap_base + SLOTCTRL, slot_cmd);
@@ -551,13 +530,7 @@ static void hpc_set_green_led_blink(struct slot *slot)
551 530
552 slot_cmd = 0x0200; 531 slot_cmd = 0x0200;
553 cmd_mask = PWR_LED_CTRL; 532 cmd_mask = PWR_LED_CTRL;
554 if (!pciehp_poll_mode) {
555 slot_cmd = slot_cmd | HP_INTR_ENABLE;
556 cmd_mask = cmd_mask | HP_INTR_ENABLE;
557 }
558
559 pcie_write_cmd(ctrl, slot_cmd, cmd_mask); 533 pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
560
561 dbg("%s: SLOTCTRL %x write cmd %x\n", 534 dbg("%s: SLOTCTRL %x write cmd %x\n",
562 __func__, ctrl->cap_base + SLOTCTRL, slot_cmd); 535 __func__, ctrl->cap_base + SLOTCTRL, slot_cmd);
563} 536}
@@ -607,16 +580,10 @@ static int hpc_power_on_slot(struct slot * slot)
607 cmd_mask = PWR_CTRL; 580 cmd_mask = PWR_CTRL;
608 /* Enable detection that we turned off at slot power-off time */ 581 /* Enable detection that we turned off at slot power-off time */
609 if (!pciehp_poll_mode) { 582 if (!pciehp_poll_mode) {
610 slot_cmd = slot_cmd | 583 slot_cmd |= (PWR_FAULT_DETECT_ENABLE | MRL_DETECT_ENABLE |
611 PWR_FAULT_DETECT_ENABLE | 584 PRSN_DETECT_ENABLE);
612 MRL_DETECT_ENABLE | 585 cmd_mask |= (PWR_FAULT_DETECT_ENABLE | MRL_DETECT_ENABLE |
613 PRSN_DETECT_ENABLE | 586 PRSN_DETECT_ENABLE);
614 HP_INTR_ENABLE;
615 cmd_mask = cmd_mask |
616 PWR_FAULT_DETECT_ENABLE |
617 MRL_DETECT_ENABLE |
618 PRSN_DETECT_ENABLE |
619 HP_INTR_ENABLE;
620 } 587 }
621 588
622 retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask); 589 retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
@@ -692,15 +659,10 @@ static int hpc_power_off_slot(struct slot * slot)
692 * till the slot is powered on again. 659 * till the slot is powered on again.
693 */ 660 */
694 if (!pciehp_poll_mode) { 661 if (!pciehp_poll_mode) {
695 slot_cmd = (slot_cmd & 662 slot_cmd &= ~(PWR_FAULT_DETECT_ENABLE | MRL_DETECT_ENABLE |
696 ~PWR_FAULT_DETECT_ENABLE & 663 PRSN_DETECT_ENABLE);
697 ~MRL_DETECT_ENABLE & 664 cmd_mask |= (PWR_FAULT_DETECT_ENABLE | MRL_DETECT_ENABLE |
698 ~PRSN_DETECT_ENABLE) | HP_INTR_ENABLE; 665 PRSN_DETECT_ENABLE);
699 cmd_mask = cmd_mask |
700 PWR_FAULT_DETECT_ENABLE |
701 MRL_DETECT_ENABLE |
702 PRSN_DETECT_ENABLE |
703 HP_INTR_ENABLE;
704 } 666 }
705 667
706 retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask); 668 retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask);