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path: root/drivers/pci/setup-bus.c
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Diffstat (limited to 'drivers/pci/setup-bus.c')
-rw-r--r--drivers/pci/setup-bus.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 9995842e45b5..8a1d3c7863a8 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -336,7 +336,6 @@ static void pci_setup_bridge_io(struct pci_bus *bus)
336 /* Clear upper 16 bits of I/O base/limit. */ 336 /* Clear upper 16 bits of I/O base/limit. */
337 io_upper16 = 0; 337 io_upper16 = 0;
338 l = 0x00f0; 338 l = 0x00f0;
339 dev_info(&bridge->dev, " bridge window [io disabled]\n");
340 } 339 }
341 /* Temporarily disable the I/O range before updating PCI_IO_BASE. */ 340 /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
342 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff); 341 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
@@ -362,7 +361,6 @@ static void pci_setup_bridge_mmio(struct pci_bus *bus)
362 dev_info(&bridge->dev, " bridge window %pR\n", res); 361 dev_info(&bridge->dev, " bridge window %pR\n", res);
363 } else { 362 } else {
364 l = 0x0000fff0; 363 l = 0x0000fff0;
365 dev_info(&bridge->dev, " bridge window [mem disabled]\n");
366 } 364 }
367 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l); 365 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
368} 366}
@@ -393,7 +391,6 @@ static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
393 dev_info(&bridge->dev, " bridge window %pR\n", res); 391 dev_info(&bridge->dev, " bridge window %pR\n", res);
394 } else { 392 } else {
395 l = 0x0000fff0; 393 l = 0x0000fff0;
396 dev_info(&bridge->dev, " bridge window [mem pref disabled]\n");
397 } 394 }
398 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l); 395 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
399 396