diff options
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r-- | drivers/pci/quirks.c | 122 |
1 files changed, 106 insertions, 16 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index baad093aafe3..f20d55368edb 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -1584,6 +1584,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_ | |||
1584 | */ | 1584 | */ |
1585 | #define AMD_813X_MISC 0x40 | 1585 | #define AMD_813X_MISC 0x40 |
1586 | #define AMD_813X_NOIOAMODE (1<<0) | 1586 | #define AMD_813X_NOIOAMODE (1<<0) |
1587 | #define AMD_813X_REV_B2 0x13 | ||
1587 | 1588 | ||
1588 | static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev) | 1589 | static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev) |
1589 | { | 1590 | { |
@@ -1591,6 +1592,8 @@ static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev) | |||
1591 | 1592 | ||
1592 | if (noioapicquirk) | 1593 | if (noioapicquirk) |
1593 | return; | 1594 | return; |
1595 | if (dev->revision == AMD_813X_REV_B2) | ||
1596 | return; | ||
1594 | 1597 | ||
1595 | pci_read_config_dword(dev, AMD_813X_MISC, &pci_config_dword); | 1598 | pci_read_config_dword(dev, AMD_813X_MISC, &pci_config_dword); |
1596 | pci_config_dword &= ~AMD_813X_NOIOAMODE; | 1599 | pci_config_dword &= ~AMD_813X_NOIOAMODE; |
@@ -1981,7 +1984,6 @@ static void __devinit quirk_msi_ht_cap(struct pci_dev *dev) | |||
1981 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE, | 1984 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE, |
1982 | quirk_msi_ht_cap); | 1985 | quirk_msi_ht_cap); |
1983 | 1986 | ||
1984 | |||
1985 | /* The nVidia CK804 chipset may have 2 HT MSI mappings. | 1987 | /* The nVidia CK804 chipset may have 2 HT MSI mappings. |
1986 | * MSI are supported if the MSI capability set in any of these mappings. | 1988 | * MSI are supported if the MSI capability set in any of these mappings. |
1987 | */ | 1989 | */ |
@@ -2032,6 +2034,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, | |||
2032 | PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB, | 2034 | PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB, |
2033 | ht_enable_msi_mapping); | 2035 | ht_enable_msi_mapping); |
2034 | 2036 | ||
2037 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, | ||
2038 | ht_enable_msi_mapping); | ||
2039 | |||
2035 | /* The P5N32-SLI Premium motherboard from Asus has a problem with msi | 2040 | /* The P5N32-SLI Premium motherboard from Asus has a problem with msi |
2036 | * for the MCP55 NIC. It is not yet determined whether the msi problem | 2041 | * for the MCP55 NIC. It is not yet determined whether the msi problem |
2037 | * also affects other devices. As for now, turn off msi for this device. | 2042 | * also affects other devices. As for now, turn off msi for this device. |
@@ -2048,10 +2053,100 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, | |||
2048 | PCI_DEVICE_ID_NVIDIA_NVENET_15, | 2053 | PCI_DEVICE_ID_NVIDIA_NVENET_15, |
2049 | nvenet_msi_disable); | 2054 | nvenet_msi_disable); |
2050 | 2055 | ||
2051 | static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) | 2056 | static void __devinit nv_ht_enable_msi_mapping(struct pci_dev *dev) |
2052 | { | 2057 | { |
2053 | struct pci_dev *host_bridge; | 2058 | struct pci_dev *host_bridge; |
2059 | int pos; | ||
2060 | int i, dev_no; | ||
2061 | int found = 0; | ||
2062 | |||
2063 | dev_no = dev->devfn >> 3; | ||
2064 | for (i = dev_no; i >= 0; i--) { | ||
2065 | host_bridge = pci_get_slot(dev->bus, PCI_DEVFN(i, 0)); | ||
2066 | if (!host_bridge) | ||
2067 | continue; | ||
2068 | |||
2069 | pos = pci_find_ht_capability(host_bridge, HT_CAPTYPE_SLAVE); | ||
2070 | if (pos != 0) { | ||
2071 | found = 1; | ||
2072 | break; | ||
2073 | } | ||
2074 | pci_dev_put(host_bridge); | ||
2075 | } | ||
2076 | |||
2077 | if (!found) | ||
2078 | return; | ||
2079 | |||
2080 | /* root did that ! */ | ||
2081 | if (msi_ht_cap_enabled(host_bridge)) | ||
2082 | goto out; | ||
2083 | |||
2084 | ht_enable_msi_mapping(dev); | ||
2085 | |||
2086 | out: | ||
2087 | pci_dev_put(host_bridge); | ||
2088 | } | ||
2089 | |||
2090 | static void __devinit ht_disable_msi_mapping(struct pci_dev *dev) | ||
2091 | { | ||
2092 | int pos, ttl = 48; | ||
2093 | |||
2094 | pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); | ||
2095 | while (pos && ttl--) { | ||
2096 | u8 flags; | ||
2097 | |||
2098 | if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, | ||
2099 | &flags) == 0) { | ||
2100 | dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); | ||
2101 | |||
2102 | pci_write_config_byte(dev, pos + HT_MSI_FLAGS, | ||
2103 | flags & ~HT_MSI_FLAGS_ENABLE); | ||
2104 | } | ||
2105 | pos = pci_find_next_ht_capability(dev, pos, | ||
2106 | HT_CAPTYPE_MSI_MAPPING); | ||
2107 | } | ||
2108 | } | ||
2109 | |||
2110 | static int __devinit ht_check_msi_mapping(struct pci_dev *dev) | ||
2111 | { | ||
2054 | int pos, ttl = 48; | 2112 | int pos, ttl = 48; |
2113 | int found = 0; | ||
2114 | |||
2115 | /* check if there is HT MSI cap or enabled on this device */ | ||
2116 | pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); | ||
2117 | while (pos && ttl--) { | ||
2118 | u8 flags; | ||
2119 | |||
2120 | if (found < 1) | ||
2121 | found = 1; | ||
2122 | if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, | ||
2123 | &flags) == 0) { | ||
2124 | if (flags & HT_MSI_FLAGS_ENABLE) { | ||
2125 | if (found < 2) { | ||
2126 | found = 2; | ||
2127 | break; | ||
2128 | } | ||
2129 | } | ||
2130 | } | ||
2131 | pos = pci_find_next_ht_capability(dev, pos, | ||
2132 | HT_CAPTYPE_MSI_MAPPING); | ||
2133 | } | ||
2134 | |||
2135 | return found; | ||
2136 | } | ||
2137 | |||
2138 | static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) | ||
2139 | { | ||
2140 | struct pci_dev *host_bridge; | ||
2141 | int pos; | ||
2142 | int found; | ||
2143 | |||
2144 | /* check if there is HT MSI cap or enabled on this device */ | ||
2145 | found = ht_check_msi_mapping(dev); | ||
2146 | |||
2147 | /* no HT MSI CAP */ | ||
2148 | if (found == 0) | ||
2149 | return; | ||
2055 | 2150 | ||
2056 | /* | 2151 | /* |
2057 | * HT MSI mapping should be disabled on devices that are below | 2152 | * HT MSI mapping should be disabled on devices that are below |
@@ -2067,24 +2162,19 @@ static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) | |||
2067 | pos = pci_find_ht_capability(host_bridge, HT_CAPTYPE_SLAVE); | 2162 | pos = pci_find_ht_capability(host_bridge, HT_CAPTYPE_SLAVE); |
2068 | if (pos != 0) { | 2163 | if (pos != 0) { |
2069 | /* Host bridge is to HT */ | 2164 | /* Host bridge is to HT */ |
2070 | ht_enable_msi_mapping(dev); | 2165 | if (found == 1) { |
2166 | /* it is not enabled, try to enable it */ | ||
2167 | nv_ht_enable_msi_mapping(dev); | ||
2168 | } | ||
2071 | return; | 2169 | return; |
2072 | } | 2170 | } |
2073 | 2171 | ||
2074 | /* Host bridge is not to HT, disable HT MSI mapping on this device */ | 2172 | /* HT MSI is not enabled */ |
2075 | pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); | 2173 | if (found == 1) |
2076 | while (pos && ttl--) { | 2174 | return; |
2077 | u8 flags; | ||
2078 | 2175 | ||
2079 | if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, | 2176 | /* Host bridge is not to HT, disable HT MSI mapping on this device */ |
2080 | &flags) == 0) { | 2177 | ht_disable_msi_mapping(dev); |
2081 | dev_info(&dev->dev, "Disabling HT MSI mapping"); | ||
2082 | pci_write_config_byte(dev, pos + HT_MSI_FLAGS, | ||
2083 | flags & ~HT_MSI_FLAGS_ENABLE); | ||
2084 | } | ||
2085 | pos = pci_find_next_ht_capability(dev, pos, | ||
2086 | HT_CAPTYPE_MSI_MAPPING); | ||
2087 | } | ||
2088 | } | 2178 | } |
2089 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk); | 2179 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk); |
2090 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk); | 2180 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk); |