diff options
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r-- | drivers/pci/quirks.c | 113 |
1 files changed, 55 insertions, 58 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index c913ea4e545c..0d0ba2fad5fc 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -61,7 +61,8 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_p | |||
61 | 61 | ||
62 | This appears to be BIOS not version dependent. So presumably there is a | 62 | This appears to be BIOS not version dependent. So presumably there is a |
63 | chipset level fix */ | 63 | chipset level fix */ |
64 | int isa_dma_bridge_buggy; /* Exported */ | 64 | int isa_dma_bridge_buggy; |
65 | EXPORT_SYMBOL(isa_dma_bridge_buggy); | ||
65 | 66 | ||
66 | static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev) | 67 | static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev) |
67 | { | 68 | { |
@@ -83,6 +84,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_2, quirk_isa_d | |||
83 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_3, quirk_isa_dma_hangs ); | 84 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_3, quirk_isa_dma_hangs ); |
84 | 85 | ||
85 | int pci_pci_problems; | 86 | int pci_pci_problems; |
87 | EXPORT_SYMBOL(pci_pci_problems); | ||
86 | 88 | ||
87 | /* | 89 | /* |
88 | * Chipsets where PCI->PCI transfers vanish or hang | 90 | * Chipsets where PCI->PCI transfers vanish or hang |
@@ -94,6 +96,8 @@ static void __devinit quirk_nopcipci(struct pci_dev *dev) | |||
94 | pci_pci_problems |= PCIPCI_FAIL; | 96 | pci_pci_problems |= PCIPCI_FAIL; |
95 | } | 97 | } |
96 | } | 98 | } |
99 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, quirk_nopcipci ); | ||
100 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, quirk_nopcipci ); | ||
97 | 101 | ||
98 | static void __devinit quirk_nopciamd(struct pci_dev *dev) | 102 | static void __devinit quirk_nopciamd(struct pci_dev *dev) |
99 | { | 103 | { |
@@ -105,9 +109,6 @@ static void __devinit quirk_nopciamd(struct pci_dev *dev) | |||
105 | pci_pci_problems |= PCIAGP_FAIL; | 109 | pci_pci_problems |= PCIAGP_FAIL; |
106 | } | 110 | } |
107 | } | 111 | } |
108 | |||
109 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, quirk_nopcipci ); | ||
110 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, quirk_nopcipci ); | ||
111 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8151_0, quirk_nopciamd ); | 112 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8151_0, quirk_nopciamd ); |
112 | 113 | ||
113 | /* | 114 | /* |
@@ -976,52 +977,51 @@ static void __init asus_hides_smbus_hostbridge(struct pci_dev *dev) | |||
976 | case 0x1626: /* L3C notebook */ | 977 | case 0x1626: /* L3C notebook */ |
977 | asus_hides_smbus = 1; | 978 | asus_hides_smbus = 1; |
978 | } | 979 | } |
979 | if (dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) | 980 | else if (dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) |
980 | switch(dev->subsystem_device) { | 981 | switch(dev->subsystem_device) { |
981 | case 0x80b1: /* P4GE-V */ | 982 | case 0x80b1: /* P4GE-V */ |
982 | case 0x80b2: /* P4PE */ | 983 | case 0x80b2: /* P4PE */ |
983 | case 0x8093: /* P4B533-V */ | 984 | case 0x8093: /* P4B533-V */ |
984 | asus_hides_smbus = 1; | 985 | asus_hides_smbus = 1; |
985 | } | 986 | } |
986 | if (dev->device == PCI_DEVICE_ID_INTEL_82850_HB) | 987 | else if (dev->device == PCI_DEVICE_ID_INTEL_82850_HB) |
987 | switch(dev->subsystem_device) { | 988 | switch(dev->subsystem_device) { |
988 | case 0x8030: /* P4T533 */ | 989 | case 0x8030: /* P4T533 */ |
989 | asus_hides_smbus = 1; | 990 | asus_hides_smbus = 1; |
990 | } | 991 | } |
991 | if (dev->device == PCI_DEVICE_ID_INTEL_7205_0) | 992 | else if (dev->device == PCI_DEVICE_ID_INTEL_7205_0) |
992 | switch (dev->subsystem_device) { | 993 | switch (dev->subsystem_device) { |
993 | case 0x8070: /* P4G8X Deluxe */ | 994 | case 0x8070: /* P4G8X Deluxe */ |
994 | asus_hides_smbus = 1; | 995 | asus_hides_smbus = 1; |
995 | } | 996 | } |
996 | if (dev->device == PCI_DEVICE_ID_INTEL_E7501_MCH) | 997 | else if (dev->device == PCI_DEVICE_ID_INTEL_E7501_MCH) |
997 | switch (dev->subsystem_device) { | 998 | switch (dev->subsystem_device) { |
998 | case 0x80c9: /* PU-DLS */ | 999 | case 0x80c9: /* PU-DLS */ |
999 | asus_hides_smbus = 1; | 1000 | asus_hides_smbus = 1; |
1000 | } | 1001 | } |
1001 | if (dev->device == PCI_DEVICE_ID_INTEL_82855GM_HB) | 1002 | else if (dev->device == PCI_DEVICE_ID_INTEL_82855GM_HB) |
1002 | switch (dev->subsystem_device) { | 1003 | switch (dev->subsystem_device) { |
1003 | case 0x1751: /* M2N notebook */ | 1004 | case 0x1751: /* M2N notebook */ |
1004 | case 0x1821: /* M5N notebook */ | 1005 | case 0x1821: /* M5N notebook */ |
1005 | asus_hides_smbus = 1; | 1006 | asus_hides_smbus = 1; |
1006 | } | 1007 | } |
1007 | if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) | 1008 | else if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) |
1008 | switch (dev->subsystem_device) { | 1009 | switch (dev->subsystem_device) { |
1009 | case 0x184b: /* W1N notebook */ | 1010 | case 0x184b: /* W1N notebook */ |
1010 | case 0x186a: /* M6Ne notebook */ | 1011 | case 0x186a: /* M6Ne notebook */ |
1011 | asus_hides_smbus = 1; | 1012 | asus_hides_smbus = 1; |
1012 | } | 1013 | } |
1013 | if (dev->device == PCI_DEVICE_ID_INTEL_82865_HB) | 1014 | else if (dev->device == PCI_DEVICE_ID_INTEL_82865_HB) |
1014 | switch (dev->subsystem_device) { | 1015 | switch (dev->subsystem_device) { |
1015 | case 0x80f2: /* P4P800-X */ | 1016 | case 0x80f2: /* P4P800-X */ |
1016 | asus_hides_smbus = 1; | 1017 | asus_hides_smbus = 1; |
1017 | } | 1018 | } |
1018 | if (dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB) { | 1019 | else if (dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB) |
1019 | switch (dev->subsystem_device) { | 1020 | switch (dev->subsystem_device) { |
1020 | case 0x1882: /* M6V notebook */ | 1021 | case 0x1882: /* M6V notebook */ |
1021 | case 0x1977: /* A6VA notebook */ | 1022 | case 0x1977: /* A6VA notebook */ |
1022 | asus_hides_smbus = 1; | 1023 | asus_hides_smbus = 1; |
1023 | } | 1024 | } |
1024 | } | ||
1025 | } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_HP)) { | 1025 | } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_HP)) { |
1026 | if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) | 1026 | if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) |
1027 | switch(dev->subsystem_device) { | 1027 | switch(dev->subsystem_device) { |
@@ -1029,25 +1029,24 @@ static void __init asus_hides_smbus_hostbridge(struct pci_dev *dev) | |||
1029 | case 0x0890: /* HP Compaq nc6000 */ | 1029 | case 0x0890: /* HP Compaq nc6000 */ |
1030 | asus_hides_smbus = 1; | 1030 | asus_hides_smbus = 1; |
1031 | } | 1031 | } |
1032 | if (dev->device == PCI_DEVICE_ID_INTEL_82865_HB) | 1032 | else if (dev->device == PCI_DEVICE_ID_INTEL_82865_HB) |
1033 | switch (dev->subsystem_device) { | 1033 | switch (dev->subsystem_device) { |
1034 | case 0x12bc: /* HP D330L */ | 1034 | case 0x12bc: /* HP D330L */ |
1035 | case 0x12bd: /* HP D530 */ | 1035 | case 0x12bd: /* HP D530 */ |
1036 | asus_hides_smbus = 1; | 1036 | asus_hides_smbus = 1; |
1037 | } | 1037 | } |
1038 | if (dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB) { | 1038 | else if (dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB) |
1039 | switch (dev->subsystem_device) { | 1039 | switch (dev->subsystem_device) { |
1040 | case 0x099c: /* HP Compaq nx6110 */ | 1040 | case 0x099c: /* HP Compaq nx6110 */ |
1041 | asus_hides_smbus = 1; | 1041 | asus_hides_smbus = 1; |
1042 | } | 1042 | } |
1043 | } | ||
1044 | } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_TOSHIBA)) { | 1043 | } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_TOSHIBA)) { |
1045 | if (dev->device == PCI_DEVICE_ID_INTEL_82855GM_HB) | 1044 | if (dev->device == PCI_DEVICE_ID_INTEL_82855GM_HB) |
1046 | switch(dev->subsystem_device) { | 1045 | switch(dev->subsystem_device) { |
1047 | case 0x0001: /* Toshiba Satellite A40 */ | 1046 | case 0x0001: /* Toshiba Satellite A40 */ |
1048 | asus_hides_smbus = 1; | 1047 | asus_hides_smbus = 1; |
1049 | } | 1048 | } |
1050 | if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) | 1049 | else if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) |
1051 | switch(dev->subsystem_device) { | 1050 | switch(dev->subsystem_device) { |
1052 | case 0x0001: /* Toshiba Tecra M2 */ | 1051 | case 0x0001: /* Toshiba Tecra M2 */ |
1053 | asus_hides_smbus = 1; | 1052 | asus_hides_smbus = 1; |
@@ -1136,6 +1135,14 @@ static void quirk_sis_96x_smbus(struct pci_dev *dev) | |||
1136 | pci_write_config_byte(dev, 0x77, val & ~0x10); | 1135 | pci_write_config_byte(dev, 0x77, val & ~0x10); |
1137 | } | 1136 | } |
1138 | } | 1137 | } |
1138 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus ); | ||
1139 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus ); | ||
1140 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus ); | ||
1141 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus ); | ||
1142 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus ); | ||
1143 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus ); | ||
1144 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus ); | ||
1145 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus ); | ||
1139 | 1146 | ||
1140 | /* | 1147 | /* |
1141 | * ... This is further complicated by the fact that some SiS96x south | 1148 | * ... This is further complicated by the fact that some SiS96x south |
@@ -1145,8 +1152,6 @@ static void quirk_sis_96x_smbus(struct pci_dev *dev) | |||
1145 | * | 1152 | * |
1146 | * We can also enable the sis96x bit in the discovery register.. | 1153 | * We can also enable the sis96x bit in the discovery register.. |
1147 | */ | 1154 | */ |
1148 | static int __devinitdata sis_96x_compatible = 0; | ||
1149 | |||
1150 | #define SIS_DETECT_REGISTER 0x40 | 1155 | #define SIS_DETECT_REGISTER 0x40 |
1151 | 1156 | ||
1152 | static void quirk_sis_503(struct pci_dev *dev) | 1157 | static void quirk_sis_503(struct pci_dev *dev) |
@@ -1162,9 +1167,6 @@ static void quirk_sis_503(struct pci_dev *dev) | |||
1162 | return; | 1167 | return; |
1163 | } | 1168 | } |
1164 | 1169 | ||
1165 | /* Make people aware that we changed the config.. */ | ||
1166 | printk(KERN_WARNING "Uncovering SIS%x that hid as a SIS503 (compatible=%d)\n", devid, sis_96x_compatible); | ||
1167 | |||
1168 | /* | 1170 | /* |
1169 | * Ok, it now shows up as a 96x.. run the 96x quirk by | 1171 | * Ok, it now shows up as a 96x.. run the 96x quirk by |
1170 | * hand in case it has already been processed. | 1172 | * hand in case it has already been processed. |
@@ -1173,20 +1175,10 @@ static void quirk_sis_503(struct pci_dev *dev) | |||
1173 | dev->device = devid; | 1175 | dev->device = devid; |
1174 | quirk_sis_96x_smbus(dev); | 1176 | quirk_sis_96x_smbus(dev); |
1175 | } | 1177 | } |
1176 | |||
1177 | static void __init quirk_sis_96x_compatible(struct pci_dev *dev) | ||
1178 | { | ||
1179 | sis_96x_compatible = 1; | ||
1180 | } | ||
1181 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_645, quirk_sis_96x_compatible ); | ||
1182 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_646, quirk_sis_96x_compatible ); | ||
1183 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_648, quirk_sis_96x_compatible ); | ||
1184 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650, quirk_sis_96x_compatible ); | ||
1185 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_651, quirk_sis_96x_compatible ); | ||
1186 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_735, quirk_sis_96x_compatible ); | ||
1187 | |||
1188 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503 ); | 1178 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503 ); |
1189 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503 ); | 1179 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503 ); |
1180 | |||
1181 | |||
1190 | /* | 1182 | /* |
1191 | * On ASUS A8V and A8V Deluxe boards, the onboard AC97 audio controller | 1183 | * On ASUS A8V and A8V Deluxe boards, the onboard AC97 audio controller |
1192 | * and MC97 modem controller are disabled when a second PCI soundcard is | 1184 | * and MC97 modem controller are disabled when a second PCI soundcard is |
@@ -1217,21 +1209,8 @@ static void asus_hides_ac97_lpc(struct pci_dev *dev) | |||
1217 | } | 1209 | } |
1218 | } | 1210 | } |
1219 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, asus_hides_ac97_lpc ); | 1211 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, asus_hides_ac97_lpc ); |
1220 | |||
1221 | |||
1222 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus ); | ||
1223 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus ); | ||
1224 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus ); | ||
1225 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus ); | ||
1226 | |||
1227 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, asus_hides_ac97_lpc ); | 1212 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, asus_hides_ac97_lpc ); |
1228 | 1213 | ||
1229 | |||
1230 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus ); | ||
1231 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus ); | ||
1232 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus ); | ||
1233 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus ); | ||
1234 | |||
1235 | #if defined(CONFIG_ATA) || defined(CONFIG_ATA_MODULE) | 1214 | #if defined(CONFIG_ATA) || defined(CONFIG_ATA_MODULE) |
1236 | 1215 | ||
1237 | /* | 1216 | /* |
@@ -1276,7 +1255,6 @@ static void quirk_jmicron_dualfn(struct pci_dev *pdev) | |||
1276 | break; | 1255 | break; |
1277 | } | 1256 | } |
1278 | } | 1257 | } |
1279 | |||
1280 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, quirk_jmicron_dualfn); | 1258 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, quirk_jmicron_dualfn); |
1281 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, quirk_jmicron_dualfn); | 1259 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, quirk_jmicron_dualfn); |
1282 | 1260 | ||
@@ -1420,6 +1398,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_intel_ide_co | |||
1420 | 1398 | ||
1421 | 1399 | ||
1422 | int pcie_mch_quirk; | 1400 | int pcie_mch_quirk; |
1401 | EXPORT_SYMBOL(pcie_mch_quirk); | ||
1423 | 1402 | ||
1424 | static void __devinit quirk_pcie_mch(struct pci_dev *pdev) | 1403 | static void __devinit quirk_pcie_mch(struct pci_dev *pdev) |
1425 | { | 1404 | { |
@@ -1646,6 +1625,7 @@ void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev) | |||
1646 | } | 1625 | } |
1647 | pci_do_fixups(dev, start, end); | 1626 | pci_do_fixups(dev, start, end); |
1648 | } | 1627 | } |
1628 | EXPORT_SYMBOL(pci_fixup_device); | ||
1649 | 1629 | ||
1650 | /* Enable 1k I/O space granularity on the Intel P64H2 */ | 1630 | /* Enable 1k I/O space granularity on the Intel P64H2 */ |
1651 | static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev) | 1631 | static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev) |
@@ -1673,6 +1653,31 @@ static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev) | |||
1673 | } | 1653 | } |
1674 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1460, quirk_p64h2_1k_io); | 1654 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1460, quirk_p64h2_1k_io); |
1675 | 1655 | ||
1656 | /* Fix the IOBL_ADR for 1k I/O space granularity on the Intel P64H2 | ||
1657 | * The IOBL_ADR gets re-written to 4k boundaries in pci_setup_bridge() | ||
1658 | * in drivers/pci/setup-bus.c | ||
1659 | */ | ||
1660 | static void __devinit quirk_p64h2_1k_io_fix_iobl(struct pci_dev *dev) | ||
1661 | { | ||
1662 | u16 en1k, iobl_adr, iobl_adr_1k; | ||
1663 | struct resource *res = dev->resource + PCI_BRIDGE_RESOURCES; | ||
1664 | |||
1665 | pci_read_config_word(dev, 0x40, &en1k); | ||
1666 | |||
1667 | if (en1k & 0x200) { | ||
1668 | pci_read_config_word(dev, PCI_IO_BASE, &iobl_adr); | ||
1669 | |||
1670 | iobl_adr_1k = iobl_adr | (res->start >> 8) | (res->end & 0xfc00); | ||
1671 | |||
1672 | if (iobl_adr != iobl_adr_1k) { | ||
1673 | printk(KERN_INFO "PCI: Fixing P64H2 IOBL_ADR from 0x%x to 0x%x for 1 KB Granularity\n", | ||
1674 | iobl_adr,iobl_adr_1k); | ||
1675 | pci_write_config_word(dev, PCI_IO_BASE, iobl_adr_1k); | ||
1676 | } | ||
1677 | } | ||
1678 | } | ||
1679 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1460, quirk_p64h2_1k_io_fix_iobl); | ||
1680 | |||
1676 | /* Under some circumstances, AER is not linked with extended capabilities. | 1681 | /* Under some circumstances, AER is not linked with extended capabilities. |
1677 | * Force it to be linked by setting the corresponding control bit in the | 1682 | * Force it to be linked by setting the corresponding control bit in the |
1678 | * config space. | 1683 | * config space. |
@@ -1695,9 +1700,6 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_CK804_PCIE, | |||
1695 | quirk_nvidia_ck804_pcie_aer_ext_cap); | 1700 | quirk_nvidia_ck804_pcie_aer_ext_cap); |
1696 | 1701 | ||
1697 | #ifdef CONFIG_PCI_MSI | 1702 | #ifdef CONFIG_PCI_MSI |
1698 | /* To disable MSI globally */ | ||
1699 | int pci_msi_quirk; | ||
1700 | |||
1701 | /* The Serverworks PCI-X chipset does not support MSI. We cannot easily rely | 1703 | /* The Serverworks PCI-X chipset does not support MSI. We cannot easily rely |
1702 | * on setting PCI_BUS_FLAGS_NO_MSI in its bus flags because there are actually | 1704 | * on setting PCI_BUS_FLAGS_NO_MSI in its bus flags because there are actually |
1703 | * some other busses controlled by the chipset even if Linux is not aware of it. | 1705 | * some other busses controlled by the chipset even if Linux is not aware of it. |
@@ -1706,8 +1708,8 @@ int pci_msi_quirk; | |||
1706 | */ | 1708 | */ |
1707 | static void __init quirk_svw_msi(struct pci_dev *dev) | 1709 | static void __init quirk_svw_msi(struct pci_dev *dev) |
1708 | { | 1710 | { |
1709 | pci_msi_quirk = 1; | 1711 | pci_no_msi(); |
1710 | printk(KERN_WARNING "PCI: MSI quirk detected. pci_msi_quirk set.\n"); | 1712 | printk(KERN_WARNING "PCI: MSI quirk detected. MSI deactivated.\n"); |
1711 | } | 1713 | } |
1712 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_GCNB_LE, quirk_svw_msi); | 1714 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_GCNB_LE, quirk_svw_msi); |
1713 | 1715 | ||
@@ -1788,8 +1790,3 @@ static void __devinit quirk_nvidia_ck804_msi_ht_cap(struct pci_dev *dev) | |||
1788 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_CK804_PCIE, | 1790 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_CK804_PCIE, |
1789 | quirk_nvidia_ck804_msi_ht_cap); | 1791 | quirk_nvidia_ck804_msi_ht_cap); |
1790 | #endif /* CONFIG_PCI_MSI */ | 1792 | #endif /* CONFIG_PCI_MSI */ |
1791 | |||
1792 | EXPORT_SYMBOL(pcie_mch_quirk); | ||
1793 | #ifdef CONFIG_HOTPLUG | ||
1794 | EXPORT_SYMBOL(pci_fixup_device); | ||
1795 | #endif | ||