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path: root/drivers/pci/quirks.c
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Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r--drivers/pci/quirks.c112
1 files changed, 52 insertions, 60 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 873125b725d4..f925e47bdad5 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -47,7 +47,7 @@ static void quirk_passive_release(struct pci_dev *dev)
47 while ((d = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, d))) { 47 while ((d = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, d))) {
48 pci_read_config_byte(d, 0x82, &dlc); 48 pci_read_config_byte(d, 0x82, &dlc);
49 if (!(dlc & 1<<1)) { 49 if (!(dlc & 1<<1)) {
50 printk(KERN_ERR "PCI: PIIX3: Enabling Passive Release on %s\n", pci_name(d)); 50 dev_err(&d->dev, "PIIX3: Enabling Passive Release\n");
51 dlc |= 1<<1; 51 dlc |= 1<<1;
52 pci_write_config_byte(d, 0x82, dlc); 52 pci_write_config_byte(d, 0x82, dlc);
53 } 53 }
@@ -69,7 +69,7 @@ static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev)
69{ 69{
70 if (!isa_dma_bridge_buggy) { 70 if (!isa_dma_bridge_buggy) {
71 isa_dma_bridge_buggy=1; 71 isa_dma_bridge_buggy=1;
72 printk(KERN_INFO "Activating ISA DMA hang workarounds.\n"); 72 dev_info(&dev->dev, "Activating ISA DMA hang workarounds\n");
73 } 73 }
74} 74}
75 /* 75 /*
@@ -93,7 +93,7 @@ EXPORT_SYMBOL(pci_pci_problems);
93static void __devinit quirk_nopcipci(struct pci_dev *dev) 93static void __devinit quirk_nopcipci(struct pci_dev *dev)
94{ 94{
95 if ((pci_pci_problems & PCIPCI_FAIL)==0) { 95 if ((pci_pci_problems & PCIPCI_FAIL)==0) {
96 printk(KERN_INFO "Disabling direct PCI/PCI transfers.\n"); 96 dev_info(&dev->dev, "Disabling direct PCI/PCI transfers\n");
97 pci_pci_problems |= PCIPCI_FAIL; 97 pci_pci_problems |= PCIPCI_FAIL;
98 } 98 }
99} 99}
@@ -106,7 +106,7 @@ static void __devinit quirk_nopciamd(struct pci_dev *dev)
106 pci_read_config_byte(dev, 0x08, &rev); 106 pci_read_config_byte(dev, 0x08, &rev);
107 if (rev == 0x13) { 107 if (rev == 0x13) {
108 /* Erratum 24 */ 108 /* Erratum 24 */
109 printk(KERN_INFO "Chipset erratum: Disabling direct PCI/AGP transfers.\n"); 109 dev_info(&dev->dev, "Chipset erratum: Disabling direct PCI/AGP transfers\n");
110 pci_pci_problems |= PCIAGP_FAIL; 110 pci_pci_problems |= PCIAGP_FAIL;
111 } 111 }
112} 112}
@@ -118,7 +118,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8151_0, quirk_nopci
118static void __devinit quirk_triton(struct pci_dev *dev) 118static void __devinit quirk_triton(struct pci_dev *dev)
119{ 119{
120 if ((pci_pci_problems&PCIPCI_TRITON)==0) { 120 if ((pci_pci_problems&PCIPCI_TRITON)==0) {
121 printk(KERN_INFO "Limiting direct PCI/PCI transfers.\n"); 121 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
122 pci_pci_problems |= PCIPCI_TRITON; 122 pci_pci_problems |= PCIPCI_TRITON;
123 } 123 }
124} 124}
@@ -178,7 +178,7 @@ static void quirk_vialatency(struct pci_dev *dev)
178 busarb &= ~(1<<5); 178 busarb &= ~(1<<5);
179 busarb |= (1<<4); 179 busarb |= (1<<4);
180 pci_write_config_byte(dev, 0x76, busarb); 180 pci_write_config_byte(dev, 0x76, busarb);
181 printk(KERN_INFO "Applying VIA southbridge workaround.\n"); 181 dev_info(&dev->dev, "Applying VIA southbridge workaround\n");
182exit: 182exit:
183 pci_dev_put(p); 183 pci_dev_put(p);
184} 184}
@@ -196,7 +196,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8361, quirk_viala
196static void __devinit quirk_viaetbf(struct pci_dev *dev) 196static void __devinit quirk_viaetbf(struct pci_dev *dev)
197{ 197{
198 if ((pci_pci_problems&PCIPCI_VIAETBF)==0) { 198 if ((pci_pci_problems&PCIPCI_VIAETBF)==0) {
199 printk(KERN_INFO "Limiting direct PCI/PCI transfers.\n"); 199 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
200 pci_pci_problems |= PCIPCI_VIAETBF; 200 pci_pci_problems |= PCIPCI_VIAETBF;
201 } 201 }
202} 202}
@@ -205,7 +205,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_via
205static void __devinit quirk_vsfx(struct pci_dev *dev) 205static void __devinit quirk_vsfx(struct pci_dev *dev)
206{ 206{
207 if ((pci_pci_problems&PCIPCI_VSFX)==0) { 207 if ((pci_pci_problems&PCIPCI_VSFX)==0) {
208 printk(KERN_INFO "Limiting direct PCI/PCI transfers.\n"); 208 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
209 pci_pci_problems |= PCIPCI_VSFX; 209 pci_pci_problems |= PCIPCI_VSFX;
210 } 210 }
211} 211}
@@ -220,7 +220,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576, quirk_vsfx)
220static void __init quirk_alimagik(struct pci_dev *dev) 220static void __init quirk_alimagik(struct pci_dev *dev)
221{ 221{
222 if ((pci_pci_problems&PCIPCI_ALIMAGIK)==0) { 222 if ((pci_pci_problems&PCIPCI_ALIMAGIK)==0) {
223 printk(KERN_INFO "Limiting direct PCI/PCI transfers.\n"); 223 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
224 pci_pci_problems |= PCIPCI_ALIMAGIK|PCIPCI_TRITON; 224 pci_pci_problems |= PCIPCI_ALIMAGIK|PCIPCI_TRITON;
225 } 225 }
226} 226}
@@ -234,7 +234,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1651, quirk_alimag
234static void __devinit quirk_natoma(struct pci_dev *dev) 234static void __devinit quirk_natoma(struct pci_dev *dev)
235{ 235{
236 if ((pci_pci_problems&PCIPCI_NATOMA)==0) { 236 if ((pci_pci_problems&PCIPCI_NATOMA)==0) {
237 printk(KERN_INFO "Limiting direct PCI/PCI transfers.\n"); 237 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
238 pci_pci_problems |= PCIPCI_NATOMA; 238 pci_pci_problems |= PCIPCI_NATOMA;
239 } 239 }
240} 240}
@@ -290,7 +290,7 @@ static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
290 pcibios_bus_to_resource(dev, res, &bus_region); 290 pcibios_bus_to_resource(dev, res, &bus_region);
291 291
292 pci_claim_resource(dev, nr); 292 pci_claim_resource(dev, nr);
293 printk("PCI quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name); 293 dev_info(&dev->dev, "quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name);
294 } 294 }
295} 295}
296 296
@@ -300,7 +300,7 @@ static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
300 */ 300 */
301static void __devinit quirk_ati_exploding_mce(struct pci_dev *dev) 301static void __devinit quirk_ati_exploding_mce(struct pci_dev *dev)
302{ 302{
303 printk(KERN_INFO "ATI Northbridge, reserving I/O ports 0x3b0 to 0x3bb.\n"); 303 dev_info(&dev->dev, "ATI Northbridge, reserving I/O ports 0x3b0 to 0x3bb\n");
304 /* Mae rhaid i ni beidio ag edrych ar y lleoliadiau I/O hyn */ 304 /* Mae rhaid i ni beidio ag edrych ar y lleoliadiau I/O hyn */
305 request_region(0x3b0, 0x0C, "RadeonIGP"); 305 request_region(0x3b0, 0x0C, "RadeonIGP");
306 request_region(0x3d3, 0x01, "RadeonIGP"); 306 request_region(0x3d3, 0x01, "RadeonIGP");
@@ -352,7 +352,7 @@ static void piix4_io_quirk(struct pci_dev *dev, const char *name, unsigned int p
352 * let's get enough confirmation reports first. 352 * let's get enough confirmation reports first.
353 */ 353 */
354 base &= -size; 354 base &= -size;
355 printk("%s PIO at %04x-%04x\n", name, base, base + size - 1); 355 dev_info(&dev->dev, "%s PIO at %04x-%04x\n", name, base, base + size - 1);
356} 356}
357 357
358static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable) 358static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable)
@@ -377,7 +377,7 @@ static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int
377 * reserve it, but let's get enough confirmation reports first. 377 * reserve it, but let's get enough confirmation reports first.
378 */ 378 */
379 base &= -size; 379 base &= -size;
380 printk("%s MMIO at %04x-%04x\n", name, base, base + size - 1); 380 dev_info(&dev->dev, "%s MMIO at %04x-%04x\n", name, base, base + size - 1);
381} 381}
382 382
383/* 383/*
@@ -549,7 +549,7 @@ static void quirk_via_ioapic(struct pci_dev *dev)
549 else 549 else
550 tmp = 0x1f; /* all known bits (4-0) routed to external APIC */ 550 tmp = 0x1f; /* all known bits (4-0) routed to external APIC */
551 551
552 printk(KERN_INFO "PCI: %sbling Via external APIC routing\n", 552 dev_info(&dev->dev, "%sbling VIA external APIC routing\n",
553 tmp == 0 ? "Disa" : "Ena"); 553 tmp == 0 ? "Disa" : "Ena");
554 554
555 /* Offset 0x58: External APIC IRQ output control */ 555 /* Offset 0x58: External APIC IRQ output control */
@@ -571,7 +571,7 @@ static void quirk_via_vt8237_bypass_apic_deassert(struct pci_dev *dev)
571 571
572 pci_read_config_byte(dev, 0x5B, &misc_control2); 572 pci_read_config_byte(dev, 0x5B, &misc_control2);
573 if (!(misc_control2 & BYPASS_APIC_DEASSERT)) { 573 if (!(misc_control2 & BYPASS_APIC_DEASSERT)) {
574 printk(KERN_INFO "PCI: Bypassing VIA 8237 APIC De-Assert Message\n"); 574 dev_info(&dev->dev, "Bypassing VIA 8237 APIC De-Assert Message\n");
575 pci_write_config_byte(dev, 0x5B, misc_control2|BYPASS_APIC_DEASSERT); 575 pci_write_config_byte(dev, 0x5B, misc_control2|BYPASS_APIC_DEASSERT);
576 } 576 }
577} 577}
@@ -590,8 +590,8 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, quirk_via_v
590static void __devinit quirk_amd_ioapic(struct pci_dev *dev) 590static void __devinit quirk_amd_ioapic(struct pci_dev *dev)
591{ 591{
592 if (dev->revision >= 0x02) { 592 if (dev->revision >= 0x02) {
593 printk(KERN_WARNING "I/O APIC: AMD Erratum #22 may be present. In the event of instability try\n"); 593 dev_warn(&dev->dev, "I/O APIC: AMD Erratum #22 may be present. In the event of instability try\n");
594 printk(KERN_WARNING " : booting with the \"noapic\" option.\n"); 594 dev_warn(&dev->dev, " : booting with the \"noapic\" option\n");
595 } 595 }
596} 596}
597DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic); 597DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic);
@@ -615,7 +615,7 @@ static void quirk_amd_8131_ioapic(struct pci_dev *dev)
615 return; 615 return;
616 616
617 if (dev->revision == AMD8131_revA0 || dev->revision == AMD8131_revB0) { 617 if (dev->revision == AMD8131_revA0 || dev->revision == AMD8131_revB0) {
618 printk(KERN_INFO "Fixing up AMD8131 IOAPIC mode\n"); 618 dev_info(&dev->dev, "Fixing up AMD8131 IOAPIC mode\n");
619 pci_read_config_byte( dev, AMD8131_MISC, &tmp); 619 pci_read_config_byte( dev, AMD8131_MISC, &tmp);
620 tmp &= ~(1 << AMD8131_NIOAMODE_BIT); 620 tmp &= ~(1 << AMD8131_NIOAMODE_BIT);
621 pci_write_config_byte( dev, AMD8131_MISC, tmp); 621 pci_write_config_byte( dev, AMD8131_MISC, tmp);
@@ -632,8 +632,8 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk
632static void __init quirk_amd_8131_mmrbc(struct pci_dev *dev) 632static void __init quirk_amd_8131_mmrbc(struct pci_dev *dev)
633{ 633{
634 if (dev->subordinate && dev->revision <= 0x12) { 634 if (dev->subordinate && dev->revision <= 0x12) {
635 printk(KERN_INFO "AMD8131 rev %x detected, disabling PCI-X " 635 dev_info(&dev->dev, "AMD8131 rev %x detected; "
636 "MMRBC\n", dev->revision); 636 "disabling PCI-X MMRBC\n", dev->revision);
637 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC; 637 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC;
638 } 638 }
639} 639}
@@ -740,8 +740,8 @@ static void quirk_via_vlink(struct pci_dev *dev)
740 740
741 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq); 741 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
742 if (new_irq != irq) { 742 if (new_irq != irq) {
743 printk(KERN_INFO "PCI: VIA VLink IRQ fixup for %s, from %d to %d\n", 743 dev_info(&dev->dev, "VIA VLink IRQ fixup, from %d to %d\n",
744 pci_name(dev), irq, new_irq); 744 irq, new_irq);
745 udelay(15); /* unknown if delay really needed */ 745 udelay(15); /* unknown if delay really needed */
746 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq); 746 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq);
747 } 747 }
@@ -789,7 +789,7 @@ static void quirk_amd_ordering(struct pci_dev *dev)
789 pci_read_config_dword(dev, 0x4C, &pcic); 789 pci_read_config_dword(dev, 0x4C, &pcic);
790 if ((pcic&6)!=6) { 790 if ((pcic&6)!=6) {
791 pcic |= 6; 791 pcic |= 6;
792 printk(KERN_WARNING "BIOS failed to enable PCI standards compliance, fixing this error.\n"); 792 dev_warn(&dev->dev, "BIOS failed to enable PCI standards compliance; fixing this error\n");
793 pci_write_config_dword(dev, 0x4C, pcic); 793 pci_write_config_dword(dev, 0x4C, pcic);
794 pci_read_config_dword(dev, 0x84, &pcic); 794 pci_read_config_dword(dev, 0x84, &pcic);
795 pcic |= (1<<23); /* Required in this mode */ 795 pcic |= (1<<23); /* Required in this mode */
@@ -839,7 +839,7 @@ static void quirk_mediagx_master(struct pci_dev *dev)
839 pci_read_config_byte(dev, 0x41, &reg); 839 pci_read_config_byte(dev, 0x41, &reg);
840 if (reg & 2) { 840 if (reg & 2) {
841 reg &= ~2; 841 reg &= ~2;
842 printk(KERN_INFO "PCI: Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x%02x)\n", reg); 842 dev_info(&dev->dev, "Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x%02x)\n", reg);
843 pci_write_config_byte(dev, 0x41, reg); 843 pci_write_config_byte(dev, 0x41, reg);
844 } 844 }
845} 845}
@@ -861,7 +861,7 @@ static void quirk_disable_pxb(struct pci_dev *pdev)
861 if (config & (1<<6)) { 861 if (config & (1<<6)) {
862 config &= ~(1<<6); 862 config &= ~(1<<6);
863 pci_write_config_word(pdev, 0x40, config); 863 pci_write_config_word(pdev, 0x40, config);
864 printk(KERN_INFO "PCI: C0 revision 450NX. Disabling PCI restreaming.\n"); 864 dev_info(&pdev->dev, "C0 revision 450NX. Disabling PCI restreaming\n");
865 } 865 }
866} 866}
867DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, quirk_disable_pxb); 867DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, quirk_disable_pxb);
@@ -912,7 +912,7 @@ static void __init quirk_ide_samemode(struct pci_dev *pdev)
912 pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog); 912 pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
913 913
914 if (((prog & 1) && !(prog & 4)) || ((prog & 4) && !(prog & 1))) { 914 if (((prog & 1) && !(prog & 4)) || ((prog & 4) && !(prog & 1))) {
915 printk(KERN_INFO "PCI: IDE mode mismatch; forcing legacy mode\n"); 915 dev_info(&pdev->dev, "IDE mode mismatch; forcing legacy mode\n");
916 prog &= ~5; 916 prog &= ~5;
917 pdev->class &= ~5; 917 pdev->class &= ~5;
918 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog); 918 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
@@ -1077,9 +1077,9 @@ static void asus_hides_smbus_lpc(struct pci_dev *dev)
1077 pci_write_config_word(dev, 0xF2, val & (~0x8)); 1077 pci_write_config_word(dev, 0xF2, val & (~0x8));
1078 pci_read_config_word(dev, 0xF2, &val); 1078 pci_read_config_word(dev, 0xF2, &val);
1079 if (val & 0x8) 1079 if (val & 0x8)
1080 printk(KERN_INFO "PCI: i801 SMBus device continues to play 'hide and seek'! 0x%x\n", val); 1080 dev_info(&dev->dev, "i801 SMBus device continues to play 'hide and seek'! 0x%x\n", val);
1081 else 1081 else
1082 printk(KERN_INFO "PCI: Enabled i801 SMBus device\n"); 1082 dev_info(&dev->dev, "Enabled i801 SMBus device\n");
1083 } 1083 }
1084} 1084}
1085DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, asus_hides_smbus_lpc); 1085DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, asus_hides_smbus_lpc);
@@ -1110,7 +1110,7 @@ static void asus_hides_smbus_lpc_ich6(struct pci_dev *dev)
1110 val=readl(base + 0x3418); /* read the Function Disable register, dword mode only */ 1110 val=readl(base + 0x3418); /* read the Function Disable register, dword mode only */
1111 writel(val & 0xFFFFFFF7, base + 0x3418); /* enable the SMBus device */ 1111 writel(val & 0xFFFFFFF7, base + 0x3418); /* enable the SMBus device */
1112 iounmap(base); 1112 iounmap(base);
1113 printk(KERN_INFO "PCI: Enabled ICH6/i801 SMBus device\n"); 1113 dev_info(&dev->dev, "Enabled ICH6/i801 SMBus device\n");
1114} 1114}
1115DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc_ich6); 1115DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc_ich6);
1116DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc_ich6); 1116DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc_ich6);
@@ -1123,7 +1123,7 @@ static void quirk_sis_96x_smbus(struct pci_dev *dev)
1123 u8 val = 0; 1123 u8 val = 0;
1124 pci_read_config_byte(dev, 0x77, &val); 1124 pci_read_config_byte(dev, 0x77, &val);
1125 if (val & 0x10) { 1125 if (val & 0x10) {
1126 printk(KERN_INFO "Enabling SiS 96x SMBus.\n"); 1126 dev_info(&dev->dev, "Enabling SiS 96x SMBus\n");
1127 pci_write_config_byte(dev, 0x77, val & ~0x10); 1127 pci_write_config_byte(dev, 0x77, val & ~0x10);
1128 } 1128 }
1129} 1129}
@@ -1195,9 +1195,9 @@ static void asus_hides_ac97_lpc(struct pci_dev *dev)
1195 pci_write_config_byte(dev, 0x50, val & (~0xc0)); 1195 pci_write_config_byte(dev, 0x50, val & (~0xc0));
1196 pci_read_config_byte(dev, 0x50, &val); 1196 pci_read_config_byte(dev, 0x50, &val);
1197 if (val & 0xc0) 1197 if (val & 0xc0)
1198 printk(KERN_INFO "PCI: onboard AC97/MC97 devices continue to play 'hide and seek'! 0x%x\n", val); 1198 dev_info(&dev->dev, "Onboard AC97/MC97 devices continue to play 'hide and seek'! 0x%x\n", val);
1199 else 1199 else
1200 printk(KERN_INFO "PCI: enabled onboard AC97/MC97 devices\n"); 1200 dev_info(&dev->dev, "Enabled onboard AC97/MC97 devices\n");
1201 } 1201 }
1202} 1202}
1203DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, asus_hides_ac97_lpc); 1203DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, asus_hides_ac97_lpc);
@@ -1318,11 +1318,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quir
1318static void __devinit quirk_pcie_pxh(struct pci_dev *dev) 1318static void __devinit quirk_pcie_pxh(struct pci_dev *dev)
1319{ 1319{
1320 pci_msi_off(dev); 1320 pci_msi_off(dev);
1321
1322 dev->no_msi = 1; 1321 dev->no_msi = 1;
1323 1322 dev_warn(&dev->dev, "PXH quirk detected; SHPC device MSI disabled\n");
1324 printk(KERN_WARNING "PCI: PXH quirk detected, "
1325 "disabling MSI for SHPC device\n");
1326} 1323}
1327DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHD_0, quirk_pcie_pxh); 1324DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHD_0, quirk_pcie_pxh);
1328DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHD_1, quirk_pcie_pxh); 1325DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHD_1, quirk_pcie_pxh);
@@ -1403,7 +1400,7 @@ static void __devinit quirk_netmos(struct pci_dev *dev)
1403 case PCI_DEVICE_ID_NETMOS_9855: 1400 case PCI_DEVICE_ID_NETMOS_9855:
1404 if ((dev->class >> 8) == PCI_CLASS_COMMUNICATION_SERIAL && 1401 if ((dev->class >> 8) == PCI_CLASS_COMMUNICATION_SERIAL &&
1405 num_parallel) { 1402 num_parallel) {
1406 printk(KERN_INFO "PCI: Netmos %04x (%u parallel, " 1403 dev_info(&dev->dev, "Netmos %04x (%u parallel, "
1407 "%u serial); changing class SERIAL to OTHER " 1404 "%u serial); changing class SERIAL to OTHER "
1408 "(use parport_serial)\n", 1405 "(use parport_serial)\n",
1409 dev->device, num_parallel, num_serial); 1406 dev->device, num_parallel, num_serial);
@@ -1467,15 +1464,14 @@ static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
1467 /* Convert from PCI bus to resource space. */ 1464 /* Convert from PCI bus to resource space. */
1468 csr = ioremap(pci_resource_start(dev, 0), 8); 1465 csr = ioremap(pci_resource_start(dev, 0), 8);
1469 if (!csr) { 1466 if (!csr) {
1470 printk(KERN_WARNING "PCI: Can't map %s e100 registers\n", 1467 dev_warn(&dev->dev, "Can't map e100 registers\n");
1471 pci_name(dev));
1472 return; 1468 return;
1473 } 1469 }
1474 1470
1475 cmd_hi = readb(csr + 3); 1471 cmd_hi = readb(csr + 3);
1476 if (cmd_hi == 0) { 1472 if (cmd_hi == 0) {
1477 printk(KERN_WARNING "PCI: Firmware left %s e100 interrupts " 1473 dev_warn(&dev->dev, "Firmware left e100 interrupts enabled; "
1478 "enabled, disabling\n", pci_name(dev)); 1474 "disabling\n");
1479 writeb(1, csr + 3); 1475 writeb(1, csr + 3);
1480 } 1476 }
1481 1477
@@ -1490,7 +1486,7 @@ static void __devinit fixup_rev1_53c810(struct pci_dev* dev)
1490 */ 1486 */
1491 1487
1492 if (dev->class == PCI_CLASS_NOT_DEFINED) { 1488 if (dev->class == PCI_CLASS_NOT_DEFINED) {
1493 printk(KERN_INFO "NCR 53c810 rev 1 detected, setting PCI class.\n"); 1489 dev_info(&dev->dev, "NCR 53c810 rev 1 detected; setting PCI class\n");
1494 dev->class = PCI_CLASS_STORAGE_SCSI; 1490 dev->class = PCI_CLASS_STORAGE_SCSI;
1495 } 1491 }
1496} 1492}
@@ -1573,7 +1569,7 @@ static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev)
1573 pci_read_config_word(dev, 0x40, &en1k); 1569 pci_read_config_word(dev, 0x40, &en1k);
1574 1570
1575 if (en1k & 0x200) { 1571 if (en1k & 0x200) {
1576 printk(KERN_INFO "PCI: Enable I/O Space to 1 KB Granularity\n"); 1572 dev_info(&dev->dev, "Enable I/O Space to 1KB granularity\n");
1577 1573
1578 pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo); 1574 pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
1579 pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo); 1575 pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo);
@@ -1605,7 +1601,7 @@ static void __devinit quirk_p64h2_1k_io_fix_iobl(struct pci_dev *dev)
1605 iobl_adr_1k = iobl_adr | (res->start >> 8) | (res->end & 0xfc00); 1601 iobl_adr_1k = iobl_adr | (res->start >> 8) | (res->end & 0xfc00);
1606 1602
1607 if (iobl_adr != iobl_adr_1k) { 1603 if (iobl_adr != iobl_adr_1k) {
1608 printk(KERN_INFO "PCI: Fixing P64H2 IOBL_ADR from 0x%x to 0x%x for 1 KB Granularity\n", 1604 dev_info(&dev->dev, "Fixing P64H2 IOBL_ADR from 0x%x to 0x%x for 1KB granularity\n",
1609 iobl_adr,iobl_adr_1k); 1605 iobl_adr,iobl_adr_1k);
1610 pci_write_config_word(dev, PCI_IO_BASE, iobl_adr_1k); 1606 pci_write_config_word(dev, PCI_IO_BASE, iobl_adr_1k);
1611 } 1607 }
@@ -1623,9 +1619,8 @@ static void quirk_nvidia_ck804_pcie_aer_ext_cap(struct pci_dev *dev)
1623 if (pci_read_config_byte(dev, 0xf41, &b) == 0) { 1619 if (pci_read_config_byte(dev, 0xf41, &b) == 0) {
1624 if (!(b & 0x20)) { 1620 if (!(b & 0x20)) {
1625 pci_write_config_byte(dev, 0xf41, b | 0x20); 1621 pci_write_config_byte(dev, 0xf41, b | 0x20);
1626 printk(KERN_INFO 1622 dev_info(&dev->dev,
1627 "PCI: Linking AER extended capability on %s\n", 1623 "Linking AER extended capability\n");
1628 pci_name(dev));
1629 } 1624 }
1630 } 1625 }
1631} 1626}
@@ -1672,7 +1667,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_c
1672static void __init quirk_disable_all_msi(struct pci_dev *dev) 1667static void __init quirk_disable_all_msi(struct pci_dev *dev)
1673{ 1668{
1674 pci_no_msi(); 1669 pci_no_msi();
1675 printk(KERN_WARNING "PCI: MSI quirk detected. MSI deactivated.\n"); 1670 dev_warn(&dev->dev, "MSI quirk detected; MSI disabled\n");
1676} 1671}
1677DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_GCNB_LE, quirk_disable_all_msi); 1672DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_GCNB_LE, quirk_disable_all_msi);
1678DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS400_200, quirk_disable_all_msi); 1673DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS400_200, quirk_disable_all_msi);
@@ -1683,9 +1678,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3351, quirk_disab
1683static void __devinit quirk_disable_msi(struct pci_dev *dev) 1678static void __devinit quirk_disable_msi(struct pci_dev *dev)
1684{ 1679{
1685 if (dev->subordinate) { 1680 if (dev->subordinate) {
1686 printk(KERN_WARNING "PCI: MSI quirk detected. " 1681 dev_warn(&dev->dev, "MSI quirk detected; "
1687 "PCI_BUS_FLAGS_NO_MSI set for %s subordinate bus.\n", 1682 "subordinate MSI disabled\n");
1688 pci_name(dev));
1689 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 1683 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
1690 } 1684 }
1691} 1685}
@@ -1704,9 +1698,9 @@ static int __devinit msi_ht_cap_enabled(struct pci_dev *dev)
1704 if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, 1698 if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS,
1705 &flags) == 0) 1699 &flags) == 0)
1706 { 1700 {
1707 printk(KERN_INFO "PCI: Found %s HT MSI Mapping on %s\n", 1701 dev_info(&dev->dev, "Found %s HT MSI Mapping\n",
1708 flags & HT_MSI_FLAGS_ENABLE ? 1702 flags & HT_MSI_FLAGS_ENABLE ?
1709 "enabled" : "disabled", pci_name(dev)); 1703 "enabled" : "disabled");
1710 return (flags & HT_MSI_FLAGS_ENABLE) != 0; 1704 return (flags & HT_MSI_FLAGS_ENABLE) != 0;
1711 } 1705 }
1712 1706
@@ -1720,9 +1714,8 @@ static int __devinit msi_ht_cap_enabled(struct pci_dev *dev)
1720static void __devinit quirk_msi_ht_cap(struct pci_dev *dev) 1714static void __devinit quirk_msi_ht_cap(struct pci_dev *dev)
1721{ 1715{
1722 if (dev->subordinate && !msi_ht_cap_enabled(dev)) { 1716 if (dev->subordinate && !msi_ht_cap_enabled(dev)) {
1723 printk(KERN_WARNING "PCI: MSI quirk detected. " 1717 dev_warn(&dev->dev, "MSI quirk detected; "
1724 "MSI disabled on chipset %s.\n", 1718 "subordinate MSI disabled\n");
1725 pci_name(dev));
1726 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 1719 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
1727 } 1720 }
1728} 1721}
@@ -1773,9 +1766,8 @@ static void __devinit quirk_nvidia_ck804_msi_ht_cap(struct pci_dev *dev)
1773 if (!pdev) 1766 if (!pdev)
1774 return; 1767 return;
1775 if (!msi_ht_cap_enabled(dev) && !msi_ht_cap_enabled(pdev)) { 1768 if (!msi_ht_cap_enabled(dev) && !msi_ht_cap_enabled(pdev)) {
1776 printk(KERN_WARNING "PCI: MSI quirk detected. " 1769 dev_warn(&dev->dev, "MSI quirk detected; "
1777 "MSI disabled on chipset %s.\n", 1770 "subordinate MSI disabled\n");
1778 pci_name(dev));
1779 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 1771 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
1780 } 1772 }
1781 pci_dev_put(pdev); 1773 pci_dev_put(pdev);