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path: root/drivers/pci/quirks.c
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Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r--drivers/pci/quirks.c40
1 files changed, 36 insertions, 4 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 245d2cdb4765..7cfa7c38d318 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -357,7 +357,7 @@ static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
357 pcibios_bus_to_resource(dev, res, &bus_region); 357 pcibios_bus_to_resource(dev, res, &bus_region);
358 358
359 pci_claim_resource(dev, nr); 359 pci_claim_resource(dev, nr);
360 dev_info(&dev->dev, "quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name); 360 dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name);
361 } 361 }
362} 362}
363 363
@@ -1680,6 +1680,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_
1680 */ 1680 */
1681#define AMD_813X_MISC 0x40 1681#define AMD_813X_MISC 0x40
1682#define AMD_813X_NOIOAMODE (1<<0) 1682#define AMD_813X_NOIOAMODE (1<<0)
1683#define AMD_813X_REV_B1 0x12
1683#define AMD_813X_REV_B2 0x13 1684#define AMD_813X_REV_B2 0x13
1684 1685
1685static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev) 1686static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev)
@@ -1688,7 +1689,8 @@ static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev)
1688 1689
1689 if (noioapicquirk) 1690 if (noioapicquirk)
1690 return; 1691 return;
1691 if (dev->revision == AMD_813X_REV_B2) 1692 if ((dev->revision == AMD_813X_REV_B1) ||
1693 (dev->revision == AMD_813X_REV_B2))
1692 return; 1694 return;
1693 1695
1694 pci_read_config_dword(dev, AMD_813X_MISC, &pci_config_dword); 1696 pci_read_config_dword(dev, AMD_813X_MISC, &pci_config_dword);
@@ -1698,8 +1700,10 @@ static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev)
1698 dev_info(&dev->dev, "disabled boot interrupts on device [%04x:%04x]\n", 1700 dev_info(&dev->dev, "disabled boot interrupts on device [%04x:%04x]\n",
1699 dev->vendor, dev->device); 1701 dev->vendor, dev->device);
1700} 1702}
1701DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_amd_813x_boot_interrupt); 1703DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_amd_813x_boot_interrupt);
1702DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, quirk_disable_amd_813x_boot_interrupt); 1704DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_amd_813x_boot_interrupt);
1705DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, quirk_disable_amd_813x_boot_interrupt);
1706DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, quirk_disable_amd_813x_boot_interrupt);
1703 1707
1704#define AMD_8111_PCI_IRQ_ROUTING 0x56 1708#define AMD_8111_PCI_IRQ_ROUTING 0x56
1705 1709
@@ -2595,9 +2599,37 @@ void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev)
2595static int __init pci_apply_final_quirks(void) 2599static int __init pci_apply_final_quirks(void)
2596{ 2600{
2597 struct pci_dev *dev = NULL; 2601 struct pci_dev *dev = NULL;
2602 u8 cls = 0;
2603 u8 tmp;
2604
2605 if (pci_cache_line_size)
2606 printk(KERN_DEBUG "PCI: CLS %u bytes\n",
2607 pci_cache_line_size << 2);
2598 2608
2599 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 2609 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
2600 pci_fixup_device(pci_fixup_final, dev); 2610 pci_fixup_device(pci_fixup_final, dev);
2611 /*
2612 * If arch hasn't set it explicitly yet, use the CLS
2613 * value shared by all PCI devices. If there's a
2614 * mismatch, fall back to the default value.
2615 */
2616 if (!pci_cache_line_size) {
2617 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &tmp);
2618 if (!cls)
2619 cls = tmp;
2620 if (!tmp || cls == tmp)
2621 continue;
2622
2623 printk(KERN_DEBUG "PCI: CLS mismatch (%u != %u), "
2624 "using %u bytes\n", cls << 2, tmp << 2,
2625 pci_dfl_cache_line_size << 2);
2626 pci_cache_line_size = pci_dfl_cache_line_size;
2627 }
2628 }
2629 if (!pci_cache_line_size) {
2630 printk(KERN_DEBUG "PCI: CLS %u bytes, default %u\n",
2631 cls << 2, pci_dfl_cache_line_size << 2);
2632 pci_cache_line_size = cls;
2601 } 2633 }
2602 2634
2603 return 0; 2635 return 0;