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path: root/drivers/pci/probe.c
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Diffstat (limited to 'drivers/pci/probe.c')
-rw-r--r--drivers/pci/probe.c31
1 files changed, 17 insertions, 14 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index d8f513bdf95c..3cdba8b3f816 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -144,15 +144,13 @@ static inline unsigned long decode_bar(struct pci_dev *dev, u32 bar)
144 case PCI_BASE_ADDRESS_MEM_TYPE_32: 144 case PCI_BASE_ADDRESS_MEM_TYPE_32:
145 break; 145 break;
146 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 146 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
147 dev_info(&dev->dev, "1M mem BAR treated as 32-bit BAR\n"); 147 /* 1M mem BAR treated as 32-bit BAR */
148 break; 148 break;
149 case PCI_BASE_ADDRESS_MEM_TYPE_64: 149 case PCI_BASE_ADDRESS_MEM_TYPE_64:
150 flags |= IORESOURCE_MEM_64; 150 flags |= IORESOURCE_MEM_64;
151 break; 151 break;
152 default: 152 default:
153 dev_warn(&dev->dev, 153 /* mem unknown type treated as 32-bit BAR */
154 "mem unknown type %x treated as 32-bit BAR\n",
155 mem_type);
156 break; 154 break;
157 } 155 }
158 return flags; 156 return flags;
@@ -173,9 +171,11 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
173 u32 l, sz, mask; 171 u32 l, sz, mask;
174 u16 orig_cmd; 172 u16 orig_cmd;
175 struct pci_bus_region region; 173 struct pci_bus_region region;
174 bool bar_too_big = false, bar_disabled = false;
176 175
177 mask = type ? PCI_ROM_ADDRESS_MASK : ~0; 176 mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
178 177
178 /* No printks while decoding is disabled! */
179 if (!dev->mmio_always_on) { 179 if (!dev->mmio_always_on) {
180 pci_read_config_word(dev, PCI_COMMAND, &orig_cmd); 180 pci_read_config_word(dev, PCI_COMMAND, &orig_cmd);
181 pci_write_config_word(dev, PCI_COMMAND, 181 pci_write_config_word(dev, PCI_COMMAND,
@@ -240,8 +240,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
240 goto fail; 240 goto fail;
241 241
242 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) { 242 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
243 dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n", 243 bar_too_big = true;
244 pos);
245 goto fail; 244 goto fail;
246 } 245 }
247 246
@@ -252,12 +251,11 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
252 region.start = 0; 251 region.start = 0;
253 region.end = sz64; 252 region.end = sz64;
254 pcibios_bus_to_resource(dev, res, &region); 253 pcibios_bus_to_resource(dev, res, &region);
254 bar_disabled = true;
255 } else { 255 } else {
256 region.start = l64; 256 region.start = l64;
257 region.end = l64 + sz64; 257 region.end = l64 + sz64;
258 pcibios_bus_to_resource(dev, res, &region); 258 pcibios_bus_to_resource(dev, res, &region);
259 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
260 pos, res);
261 } 259 }
262 } else { 260 } else {
263 sz = pci_size(l, sz, mask); 261 sz = pci_size(l, sz, mask);
@@ -268,18 +266,23 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
268 region.start = l; 266 region.start = l;
269 region.end = l + sz; 267 region.end = l + sz;
270 pcibios_bus_to_resource(dev, res, &region); 268 pcibios_bus_to_resource(dev, res, &region);
271
272 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
273 } 269 }
274 270
275 out: 271 goto out;
272
273
274fail:
275 res->flags = 0;
276out:
276 if (!dev->mmio_always_on) 277 if (!dev->mmio_always_on)
277 pci_write_config_word(dev, PCI_COMMAND, orig_cmd); 278 pci_write_config_word(dev, PCI_COMMAND, orig_cmd);
278 279
280 if (bar_too_big)
281 dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n", pos);
282 if (res->flags && !bar_disabled)
283 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
284
279 return (res->flags & IORESOURCE_MEM_64) ? 1 : 0; 285 return (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
280 fail:
281 res->flags = 0;
282 goto out;
283} 286}
284 287
285static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom) 288static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)