aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pci/probe.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/pci/probe.c')
-rw-r--r--drivers/pci/probe.c210
1 files changed, 130 insertions, 80 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 55ec44a27e89..e2f3dd098cfa 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -287,7 +287,7 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
287 struct resource *res; 287 struct resource *res;
288 int i; 288 int i;
289 289
290 if (!dev) /* It's a host bus, nothing to read */ 290 if (!child->parent) /* It's a host bus, nothing to read */
291 return; 291 return;
292 292
293 if (dev->transparent) { 293 if (dev->transparent) {
@@ -511,21 +511,21 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
511 511
512 /* 512 /*
513 * If we already got to this bus through a different bridge, 513 * If we already got to this bus through a different bridge,
514 * ignore it. This can happen with the i450NX chipset. 514 * don't re-add it. This can happen with the i450NX chipset.
515 *
516 * However, we continue to descend down the hierarchy and
517 * scan remaining child buses.
515 */ 518 */
516 if (pci_find_bus(pci_domain_nr(bus), busnr)) { 519 child = pci_find_bus(pci_domain_nr(bus), busnr);
517 dev_info(&dev->dev, "bus %04x:%02x already known\n", 520 if (!child) {
518 pci_domain_nr(bus), busnr); 521 child = pci_add_new_bus(bus, dev, busnr);
519 goto out; 522 if (!child)
523 goto out;
524 child->primary = buses & 0xFF;
525 child->subordinate = (buses >> 16) & 0xFF;
526 child->bridge_ctl = bctl;
520 } 527 }
521 528
522 child = pci_add_new_bus(bus, dev, busnr);
523 if (!child)
524 goto out;
525 child->primary = buses & 0xFF;
526 child->subordinate = (buses >> 16) & 0xFF;
527 child->bridge_ctl = bctl;
528
529 cmax = pci_scan_child_bus(child); 529 cmax = pci_scan_child_bus(child);
530 if (cmax > max) 530 if (cmax > max)
531 max = cmax; 531 max = cmax;
@@ -674,6 +674,19 @@ static void pci_read_irq(struct pci_dev *dev)
674 dev->irq = irq; 674 dev->irq = irq;
675} 675}
676 676
677static void set_pcie_port_type(struct pci_dev *pdev)
678{
679 int pos;
680 u16 reg16;
681
682 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
683 if (!pos)
684 return;
685 pdev->is_pcie = 1;
686 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
687 pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
688}
689
677#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED) 690#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
678 691
679/** 692/**
@@ -683,12 +696,33 @@ static void pci_read_irq(struct pci_dev *dev)
683 * Initialize the device structure with information about the device's 696 * Initialize the device structure with information about the device's
684 * vendor,class,memory and IO-space addresses,IRQ lines etc. 697 * vendor,class,memory and IO-space addresses,IRQ lines etc.
685 * Called at initialisation of the PCI subsystem and by CardBus services. 698 * Called at initialisation of the PCI subsystem and by CardBus services.
686 * Returns 0 on success and -1 if unknown type of device (not normal, bridge 699 * Returns 0 on success and negative if unknown type of device (not normal,
687 * or CardBus). 700 * bridge or CardBus).
688 */ 701 */
689static int pci_setup_device(struct pci_dev * dev) 702int pci_setup_device(struct pci_dev *dev)
690{ 703{
691 u32 class; 704 u32 class;
705 u8 hdr_type;
706 struct pci_slot *slot;
707
708 if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
709 return -EIO;
710
711 dev->sysdata = dev->bus->sysdata;
712 dev->dev.parent = dev->bus->bridge;
713 dev->dev.bus = &pci_bus_type;
714 dev->hdr_type = hdr_type & 0x7f;
715 dev->multifunction = !!(hdr_type & 0x80);
716 dev->error_state = pci_channel_io_normal;
717 set_pcie_port_type(dev);
718
719 list_for_each_entry(slot, &dev->bus->slots, list)
720 if (PCI_SLOT(dev->devfn) == slot->number)
721 dev->slot = slot;
722
723 /* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer)
724 set this higher, assuming the system even supports it. */
725 dev->dma_mask = 0xffffffff;
692 726
693 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(dev->bus), 727 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(dev->bus),
694 dev->bus->number, PCI_SLOT(dev->devfn), 728 dev->bus->number, PCI_SLOT(dev->devfn),
@@ -703,12 +737,14 @@ static int pci_setup_device(struct pci_dev * dev)
703 dev_dbg(&dev->dev, "found [%04x:%04x] class %06x header type %02x\n", 737 dev_dbg(&dev->dev, "found [%04x:%04x] class %06x header type %02x\n",
704 dev->vendor, dev->device, class, dev->hdr_type); 738 dev->vendor, dev->device, class, dev->hdr_type);
705 739
740 /* need to have dev->class ready */
741 dev->cfg_size = pci_cfg_space_size(dev);
742
706 /* "Unknown power state" */ 743 /* "Unknown power state" */
707 dev->current_state = PCI_UNKNOWN; 744 dev->current_state = PCI_UNKNOWN;
708 745
709 /* Early fixups, before probing the BARs */ 746 /* Early fixups, before probing the BARs */
710 pci_fixup_device(pci_fixup_early, dev); 747 pci_fixup_device(pci_fixup_early, dev);
711 class = dev->class >> 8;
712 748
713 switch (dev->hdr_type) { /* header type */ 749 switch (dev->hdr_type) { /* header type */
714 case PCI_HEADER_TYPE_NORMAL: /* standard header */ 750 case PCI_HEADER_TYPE_NORMAL: /* standard header */
@@ -770,7 +806,7 @@ static int pci_setup_device(struct pci_dev * dev)
770 default: /* unknown header */ 806 default: /* unknown header */
771 dev_err(&dev->dev, "unknown header type %02x, " 807 dev_err(&dev->dev, "unknown header type %02x, "
772 "ignoring device\n", dev->hdr_type); 808 "ignoring device\n", dev->hdr_type);
773 return -1; 809 return -EIO;
774 810
775 bad: 811 bad:
776 dev_err(&dev->dev, "ignoring class %02x (doesn't match header " 812 dev_err(&dev->dev, "ignoring class %02x (doesn't match header "
@@ -785,6 +821,7 @@ static int pci_setup_device(struct pci_dev * dev)
785static void pci_release_capabilities(struct pci_dev *dev) 821static void pci_release_capabilities(struct pci_dev *dev)
786{ 822{
787 pci_vpd_release(dev); 823 pci_vpd_release(dev);
824 pci_iov_release(dev);
788} 825}
789 826
790/** 827/**
@@ -803,19 +840,6 @@ static void pci_release_dev(struct device *dev)
803 kfree(pci_dev); 840 kfree(pci_dev);
804} 841}
805 842
806static void set_pcie_port_type(struct pci_dev *pdev)
807{
808 int pos;
809 u16 reg16;
810
811 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
812 if (!pos)
813 return;
814 pdev->is_pcie = 1;
815 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
816 pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
817}
818
819/** 843/**
820 * pci_cfg_space_size - get the configuration space size of the PCI device. 844 * pci_cfg_space_size - get the configuration space size of the PCI device.
821 * @dev: PCI device 845 * @dev: PCI device
@@ -847,6 +871,11 @@ int pci_cfg_space_size(struct pci_dev *dev)
847{ 871{
848 int pos; 872 int pos;
849 u32 status; 873 u32 status;
874 u16 class;
875
876 class = dev->class >> 8;
877 if (class == PCI_CLASS_BRIDGE_HOST)
878 return pci_cfg_space_size_ext(dev);
850 879
851 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 880 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
852 if (!pos) { 881 if (!pos) {
@@ -891,9 +920,7 @@ EXPORT_SYMBOL(alloc_pci_dev);
891static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn) 920static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn)
892{ 921{
893 struct pci_dev *dev; 922 struct pci_dev *dev;
894 struct pci_slot *slot;
895 u32 l; 923 u32 l;
896 u8 hdr_type;
897 int delay = 1; 924 int delay = 1;
898 925
899 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l)) 926 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
@@ -920,34 +947,16 @@ static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn)
920 } 947 }
921 } 948 }
922 949
923 if (pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type))
924 return NULL;
925
926 dev = alloc_pci_dev(); 950 dev = alloc_pci_dev();
927 if (!dev) 951 if (!dev)
928 return NULL; 952 return NULL;
929 953
930 dev->bus = bus; 954 dev->bus = bus;
931 dev->sysdata = bus->sysdata;
932 dev->dev.parent = bus->bridge;
933 dev->dev.bus = &pci_bus_type;
934 dev->devfn = devfn; 955 dev->devfn = devfn;
935 dev->hdr_type = hdr_type & 0x7f;
936 dev->multifunction = !!(hdr_type & 0x80);
937 dev->vendor = l & 0xffff; 956 dev->vendor = l & 0xffff;
938 dev->device = (l >> 16) & 0xffff; 957 dev->device = (l >> 16) & 0xffff;
939 dev->cfg_size = pci_cfg_space_size(dev);
940 dev->error_state = pci_channel_io_normal;
941 set_pcie_port_type(dev);
942
943 list_for_each_entry(slot, &bus->slots, list)
944 if (PCI_SLOT(devfn) == slot->number)
945 dev->slot = slot;
946 958
947 /* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer) 959 if (pci_setup_device(dev)) {
948 set this higher, assuming the system even supports it. */
949 dev->dma_mask = 0xffffffff;
950 if (pci_setup_device(dev) < 0) {
951 kfree(dev); 960 kfree(dev);
952 return NULL; 961 return NULL;
953 } 962 }
@@ -972,6 +981,9 @@ static void pci_init_capabilities(struct pci_dev *dev)
972 981
973 /* Alternative Routing-ID Forwarding */ 982 /* Alternative Routing-ID Forwarding */
974 pci_enable_ari(dev); 983 pci_enable_ari(dev);
984
985 /* Single Root I/O Virtualization */
986 pci_iov_init(dev);
975} 987}
976 988
977void pci_device_add(struct pci_dev *dev, struct pci_bus *bus) 989void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
@@ -1006,6 +1018,12 @@ struct pci_dev *__ref pci_scan_single_device(struct pci_bus *bus, int devfn)
1006{ 1018{
1007 struct pci_dev *dev; 1019 struct pci_dev *dev;
1008 1020
1021 dev = pci_get_slot(bus, devfn);
1022 if (dev) {
1023 pci_dev_put(dev);
1024 return dev;
1025 }
1026
1009 dev = pci_scan_device(bus, devfn); 1027 dev = pci_scan_device(bus, devfn);
1010 if (!dev) 1028 if (!dev)
1011 return NULL; 1029 return NULL;
@@ -1024,35 +1042,27 @@ EXPORT_SYMBOL(pci_scan_single_device);
1024 * Scan a PCI slot on the specified PCI bus for devices, adding 1042 * Scan a PCI slot on the specified PCI bus for devices, adding
1025 * discovered devices to the @bus->devices list. New devices 1043 * discovered devices to the @bus->devices list. New devices
1026 * will not have is_added set. 1044 * will not have is_added set.
1045 *
1046 * Returns the number of new devices found.
1027 */ 1047 */
1028int pci_scan_slot(struct pci_bus *bus, int devfn) 1048int pci_scan_slot(struct pci_bus *bus, int devfn)
1029{ 1049{
1030 int func, nr = 0; 1050 int fn, nr = 0;
1031 int scan_all_fns; 1051 struct pci_dev *dev;
1032
1033 scan_all_fns = pcibios_scan_all_fns(bus, devfn);
1034
1035 for (func = 0; func < 8; func++, devfn++) {
1036 struct pci_dev *dev;
1037
1038 dev = pci_scan_single_device(bus, devfn);
1039 if (dev) {
1040 nr++;
1041 1052
1042 /* 1053 dev = pci_scan_single_device(bus, devfn);
1043 * If this is a single function device, 1054 if (dev && !dev->is_added) /* new device? */
1044 * don't scan past the first function. 1055 nr++;
1045 */ 1056
1046 if (!dev->multifunction) { 1057 if ((dev && dev->multifunction) ||
1047 if (func > 0) { 1058 (!dev && pcibios_scan_all_fns(bus, devfn))) {
1048 dev->multifunction = 1; 1059 for (fn = 1; fn < 8; fn++) {
1049 } else { 1060 dev = pci_scan_single_device(bus, devfn + fn);
1050 break; 1061 if (dev) {
1051 } 1062 if (!dev->is_added)
1063 nr++;
1064 dev->multifunction = 1;
1052 } 1065 }
1053 } else {
1054 if (func == 0 && !scan_all_fns)
1055 break;
1056 } 1066 }
1057 } 1067 }
1058 1068
@@ -1074,12 +1084,21 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
1074 for (devfn = 0; devfn < 0x100; devfn += 8) 1084 for (devfn = 0; devfn < 0x100; devfn += 8)
1075 pci_scan_slot(bus, devfn); 1085 pci_scan_slot(bus, devfn);
1076 1086
1087 /* Reserve buses for SR-IOV capability. */
1088 max += pci_iov_bus_range(bus);
1089
1077 /* 1090 /*
1078 * After performing arch-dependent fixup of the bus, look behind 1091 * After performing arch-dependent fixup of the bus, look behind
1079 * all PCI-to-PCI bridges on this bus. 1092 * all PCI-to-PCI bridges on this bus.
1080 */ 1093 */
1081 pr_debug("PCI: Fixups for bus %04x:%02x\n", pci_domain_nr(bus), bus->number); 1094 if (!bus->is_added) {
1082 pcibios_fixup_bus(bus); 1095 pr_debug("PCI: Fixups for bus %04x:%02x\n",
1096 pci_domain_nr(bus), bus->number);
1097 pcibios_fixup_bus(bus);
1098 if (pci_is_root_bus(bus))
1099 bus->is_added = 1;
1100 }
1101
1083 for (pass=0; pass < 2; pass++) 1102 for (pass=0; pass < 2; pass++)
1084 list_for_each_entry(dev, &bus->devices, bus_list) { 1103 list_for_each_entry(dev, &bus->devices, bus_list) {
1085 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || 1104 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
@@ -1114,7 +1133,7 @@ struct pci_bus * pci_create_bus(struct device *parent,
1114 if (!b) 1133 if (!b)
1115 return NULL; 1134 return NULL;
1116 1135
1117 dev = kmalloc(sizeof(*dev), GFP_KERNEL); 1136 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1118 if (!dev){ 1137 if (!dev){
1119 kfree(b); 1138 kfree(b);
1120 return NULL; 1139 return NULL;
@@ -1133,7 +1152,6 @@ struct pci_bus * pci_create_bus(struct device *parent,
1133 list_add_tail(&b->node, &pci_root_buses); 1152 list_add_tail(&b->node, &pci_root_buses);
1134 up_write(&pci_bus_sem); 1153 up_write(&pci_bus_sem);
1135 1154
1136 memset(dev, 0, sizeof(*dev));
1137 dev->parent = parent; 1155 dev->parent = parent;
1138 dev->release = pci_release_bus_bridge_dev; 1156 dev->release = pci_release_bus_bridge_dev;
1139 dev_set_name(dev, "pci%04x:%02x", pci_domain_nr(b), bus); 1157 dev_set_name(dev, "pci%04x:%02x", pci_domain_nr(b), bus);
@@ -1193,6 +1211,38 @@ struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent,
1193EXPORT_SYMBOL(pci_scan_bus_parented); 1211EXPORT_SYMBOL(pci_scan_bus_parented);
1194 1212
1195#ifdef CONFIG_HOTPLUG 1213#ifdef CONFIG_HOTPLUG
1214/**
1215 * pci_rescan_bus - scan a PCI bus for devices.
1216 * @bus: PCI bus to scan
1217 *
1218 * Scan a PCI bus and child buses for new devices, adds them,
1219 * and enables them.
1220 *
1221 * Returns the max number of subordinate bus discovered.
1222 */
1223unsigned int __devinit pci_rescan_bus(struct pci_bus *bus)
1224{
1225 unsigned int max;
1226 struct pci_dev *dev;
1227
1228 max = pci_scan_child_bus(bus);
1229
1230 down_read(&pci_bus_sem);
1231 list_for_each_entry(dev, &bus->devices, bus_list)
1232 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
1233 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1234 if (dev->subordinate)
1235 pci_bus_size_bridges(dev->subordinate);
1236 up_read(&pci_bus_sem);
1237
1238 pci_bus_assign_resources(bus);
1239 pci_enable_bridges(bus);
1240 pci_bus_add_devices(bus);
1241
1242 return max;
1243}
1244EXPORT_SYMBOL_GPL(pci_rescan_bus);
1245
1196EXPORT_SYMBOL(pci_add_new_bus); 1246EXPORT_SYMBOL(pci_add_new_bus);
1197EXPORT_SYMBOL(pci_scan_slot); 1247EXPORT_SYMBOL(pci_scan_slot);
1198EXPORT_SYMBOL(pci_scan_bridge); 1248EXPORT_SYMBOL(pci_scan_bridge);