diff options
Diffstat (limited to 'drivers/pci/probe.c')
-rw-r--r-- | drivers/pci/probe.c | 111 |
1 files changed, 56 insertions, 55 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index a4f53b677185..7fef23ba6bc6 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c | |||
@@ -16,7 +16,7 @@ | |||
16 | #define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */ | 16 | #define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */ |
17 | #define CARDBUS_RESERVE_BUSNR 3 | 17 | #define CARDBUS_RESERVE_BUSNR 3 |
18 | 18 | ||
19 | struct resource busn_resource = { | 19 | static struct resource busn_resource = { |
20 | .name = "PCI busn", | 20 | .name = "PCI busn", |
21 | .start = 0, | 21 | .start = 0, |
22 | .end = 255, | 22 | .end = 255, |
@@ -518,7 +518,7 @@ static struct pci_host_bridge *pci_alloc_host_bridge(struct pci_bus *b) | |||
518 | return bridge; | 518 | return bridge; |
519 | } | 519 | } |
520 | 520 | ||
521 | const unsigned char pcix_bus_speed[] = { | 521 | static const unsigned char pcix_bus_speed[] = { |
522 | PCI_SPEED_UNKNOWN, /* 0 */ | 522 | PCI_SPEED_UNKNOWN, /* 0 */ |
523 | PCI_SPEED_66MHz_PCIX, /* 1 */ | 523 | PCI_SPEED_66MHz_PCIX, /* 1 */ |
524 | PCI_SPEED_100MHz_PCIX, /* 2 */ | 524 | PCI_SPEED_100MHz_PCIX, /* 2 */ |
@@ -999,6 +999,60 @@ void set_pcie_hotplug_bridge(struct pci_dev *pdev) | |||
999 | pdev->is_hotplug_bridge = 1; | 999 | pdev->is_hotplug_bridge = 1; |
1000 | } | 1000 | } |
1001 | 1001 | ||
1002 | |||
1003 | /** | ||
1004 | * pci_cfg_space_size - get the configuration space size of the PCI device. | ||
1005 | * @dev: PCI device | ||
1006 | * | ||
1007 | * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices | ||
1008 | * have 4096 bytes. Even if the device is capable, that doesn't mean we can | ||
1009 | * access it. Maybe we don't have a way to generate extended config space | ||
1010 | * accesses, or the device is behind a reverse Express bridge. So we try | ||
1011 | * reading the dword at 0x100 which must either be 0 or a valid extended | ||
1012 | * capability header. | ||
1013 | */ | ||
1014 | static int pci_cfg_space_size_ext(struct pci_dev *dev) | ||
1015 | { | ||
1016 | u32 status; | ||
1017 | int pos = PCI_CFG_SPACE_SIZE; | ||
1018 | |||
1019 | if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL) | ||
1020 | goto fail; | ||
1021 | if (status == 0xffffffff) | ||
1022 | goto fail; | ||
1023 | |||
1024 | return PCI_CFG_SPACE_EXP_SIZE; | ||
1025 | |||
1026 | fail: | ||
1027 | return PCI_CFG_SPACE_SIZE; | ||
1028 | } | ||
1029 | |||
1030 | int pci_cfg_space_size(struct pci_dev *dev) | ||
1031 | { | ||
1032 | int pos; | ||
1033 | u32 status; | ||
1034 | u16 class; | ||
1035 | |||
1036 | class = dev->class >> 8; | ||
1037 | if (class == PCI_CLASS_BRIDGE_HOST) | ||
1038 | return pci_cfg_space_size_ext(dev); | ||
1039 | |||
1040 | if (!pci_is_pcie(dev)) { | ||
1041 | pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); | ||
1042 | if (!pos) | ||
1043 | goto fail; | ||
1044 | |||
1045 | pci_read_config_dword(dev, pos + PCI_X_STATUS, &status); | ||
1046 | if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ))) | ||
1047 | goto fail; | ||
1048 | } | ||
1049 | |||
1050 | return pci_cfg_space_size_ext(dev); | ||
1051 | |||
1052 | fail: | ||
1053 | return PCI_CFG_SPACE_SIZE; | ||
1054 | } | ||
1055 | |||
1002 | #define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED) | 1056 | #define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED) |
1003 | 1057 | ||
1004 | /** | 1058 | /** |
@@ -1173,59 +1227,6 @@ static void pci_release_dev(struct device *dev) | |||
1173 | kfree(pci_dev); | 1227 | kfree(pci_dev); |
1174 | } | 1228 | } |
1175 | 1229 | ||
1176 | /** | ||
1177 | * pci_cfg_space_size - get the configuration space size of the PCI device. | ||
1178 | * @dev: PCI device | ||
1179 | * | ||
1180 | * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices | ||
1181 | * have 4096 bytes. Even if the device is capable, that doesn't mean we can | ||
1182 | * access it. Maybe we don't have a way to generate extended config space | ||
1183 | * accesses, or the device is behind a reverse Express bridge. So we try | ||
1184 | * reading the dword at 0x100 which must either be 0 or a valid extended | ||
1185 | * capability header. | ||
1186 | */ | ||
1187 | int pci_cfg_space_size_ext(struct pci_dev *dev) | ||
1188 | { | ||
1189 | u32 status; | ||
1190 | int pos = PCI_CFG_SPACE_SIZE; | ||
1191 | |||
1192 | if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL) | ||
1193 | goto fail; | ||
1194 | if (status == 0xffffffff) | ||
1195 | goto fail; | ||
1196 | |||
1197 | return PCI_CFG_SPACE_EXP_SIZE; | ||
1198 | |||
1199 | fail: | ||
1200 | return PCI_CFG_SPACE_SIZE; | ||
1201 | } | ||
1202 | |||
1203 | int pci_cfg_space_size(struct pci_dev *dev) | ||
1204 | { | ||
1205 | int pos; | ||
1206 | u32 status; | ||
1207 | u16 class; | ||
1208 | |||
1209 | class = dev->class >> 8; | ||
1210 | if (class == PCI_CLASS_BRIDGE_HOST) | ||
1211 | return pci_cfg_space_size_ext(dev); | ||
1212 | |||
1213 | if (!pci_is_pcie(dev)) { | ||
1214 | pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); | ||
1215 | if (!pos) | ||
1216 | goto fail; | ||
1217 | |||
1218 | pci_read_config_dword(dev, pos + PCI_X_STATUS, &status); | ||
1219 | if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ))) | ||
1220 | goto fail; | ||
1221 | } | ||
1222 | |||
1223 | return pci_cfg_space_size_ext(dev); | ||
1224 | |||
1225 | fail: | ||
1226 | return PCI_CFG_SPACE_SIZE; | ||
1227 | } | ||
1228 | |||
1229 | struct pci_dev *pci_alloc_dev(struct pci_bus *bus) | 1230 | struct pci_dev *pci_alloc_dev(struct pci_bus *bus) |
1230 | { | 1231 | { |
1231 | struct pci_dev *dev; | 1232 | struct pci_dev *dev; |