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path: root/drivers/pci/probe.c
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Diffstat (limited to 'drivers/pci/probe.c')
-rw-r--r--drivers/pci/probe.c53
1 files changed, 38 insertions, 15 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 171ca712e523..5db6b6690b59 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -276,8 +276,7 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
276 sz = pci_size(l, sz, (u32)PCI_ROM_ADDRESS_MASK); 276 sz = pci_size(l, sz, (u32)PCI_ROM_ADDRESS_MASK);
277 if (sz) { 277 if (sz) {
278 res->flags = (l & IORESOURCE_ROM_ENABLE) | 278 res->flags = (l & IORESOURCE_ROM_ENABLE) |
279 IORESOURCE_MEM | IORESOURCE_PREFETCH | 279 IORESOURCE_MEM | IORESOURCE_READONLY;
280 IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
281 res->start = l & PCI_ROM_ADDRESS_MASK; 280 res->start = l & PCI_ROM_ADDRESS_MASK;
282 res->end = res->start + (unsigned long) sz; 281 res->end = res->start + (unsigned long) sz;
283 } 282 }
@@ -597,7 +596,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass
597 pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses); 596 pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
598 597
599 if (!is_cardbus) { 598 if (!is_cardbus) {
600 child->bridge_ctl = bctl | PCI_BRIDGE_CTL_NO_ISA; 599 child->bridge_ctl = bctl;
601 /* 600 /*
602 * Adjust subordinate busnr in parent buses. 601 * Adjust subordinate busnr in parent buses.
603 * We do this before scanning for children because 602 * We do this before scanning for children because
@@ -744,22 +743,46 @@ static int pci_setup_device(struct pci_dev * dev)
744 */ 743 */
745 if (class == PCI_CLASS_STORAGE_IDE) { 744 if (class == PCI_CLASS_STORAGE_IDE) {
746 u8 progif; 745 u8 progif;
746 struct pci_bus_region region;
747
747 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif); 748 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
748 if ((progif & 1) == 0) { 749 if ((progif & 1) == 0) {
749 dev->resource[0].start = 0x1F0; 750 struct resource resource = {
750 dev->resource[0].end = 0x1F7; 751 .start = 0x1F0,
751 dev->resource[0].flags = LEGACY_IO_RESOURCE; 752 .end = 0x1F7,
752 dev->resource[1].start = 0x3F6; 753 .flags = LEGACY_IO_RESOURCE,
753 dev->resource[1].end = 0x3F6; 754 };
754 dev->resource[1].flags = LEGACY_IO_RESOURCE; 755
756 pcibios_resource_to_bus(dev, &region, &resource);
757 dev->resource[0].start = region.start;
758 dev->resource[0].end = region.end;
759 dev->resource[0].flags = resource.flags;
760 resource.start = 0x3F6;
761 resource.end = 0x3F6;
762 resource.flags = LEGACY_IO_RESOURCE;
763 pcibios_resource_to_bus(dev, &region, &resource);
764 dev->resource[1].start = region.start;
765 dev->resource[1].end = region.end;
766 dev->resource[1].flags = resource.flags;
755 } 767 }
756 if ((progif & 4) == 0) { 768 if ((progif & 4) == 0) {
757 dev->resource[2].start = 0x170; 769 struct resource resource = {
758 dev->resource[2].end = 0x177; 770 .start = 0x170,
759 dev->resource[2].flags = LEGACY_IO_RESOURCE; 771 .end = 0x177,
760 dev->resource[3].start = 0x376; 772 .flags = LEGACY_IO_RESOURCE,
761 dev->resource[3].end = 0x376; 773 };
762 dev->resource[3].flags = LEGACY_IO_RESOURCE; 774
775 pcibios_resource_to_bus(dev, &region, &resource);
776 dev->resource[2].start = region.start;
777 dev->resource[2].end = region.end;
778 dev->resource[2].flags = resource.flags;
779 resource.start = 0x376;
780 resource.end = 0x376;
781 resource.flags = LEGACY_IO_RESOURCE;
782 pcibios_resource_to_bus(dev, &region, &resource);
783 dev->resource[3].start = region.start;
784 dev->resource[3].end = region.end;
785 dev->resource[3].flags = resource.flags;
763 } 786 }
764 } 787 }
765 break; 788 break;