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path: root/drivers/pci/probe.c
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Diffstat (limited to 'drivers/pci/probe.c')
-rw-r--r--drivers/pci/probe.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 482942439852..04e74f485714 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1428,24 +1428,25 @@ static void pcie_write_mrrs(struct pci_dev *dev)
1428 1428
1429static int pcie_bus_configure_set(struct pci_dev *dev, void *data) 1429static int pcie_bus_configure_set(struct pci_dev *dev, void *data)
1430{ 1430{
1431 int mps = 128 << *(u8 *)data; 1431 int mps, orig_mps;
1432 1432
1433 if (!pci_is_pcie(dev)) 1433 if (!pci_is_pcie(dev))
1434 return 0; 1434 return 0;
1435 1435
1436 dev_dbg(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n", 1436 mps = 128 << *(u8 *)data;
1437 pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev)); 1437 orig_mps = pcie_get_mps(dev);
1438 1438
1439 pcie_write_mps(dev, mps); 1439 pcie_write_mps(dev, mps);
1440 pcie_write_mrrs(dev); 1440 pcie_write_mrrs(dev);
1441 1441
1442 dev_dbg(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n", 1442 dev_info(&dev->dev, "PCI-E Max Payload Size set to %4d/%4d (was %4d), "
1443 pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev)); 1443 "Max Read Rq %4d\n", pcie_get_mps(dev), 128 << dev->pcie_mpss,
1444 orig_mps, pcie_get_readrq(dev));
1444 1445
1445 return 0; 1446 return 0;
1446} 1447}
1447 1448
1448/* pcie_bus_configure_mps requires that pci_walk_bus work in a top-down, 1449/* pcie_bus_configure_settings requires that pci_walk_bus work in a top-down,
1449 * parents then children fashion. If this changes, then this code will not 1450 * parents then children fashion. If this changes, then this code will not
1450 * work as designed. 1451 * work as designed.
1451 */ 1452 */