1 files changed, 20 insertions, 2 deletions

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 290c657da0b9..c99c4d65461b 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -741,6 +741,17 @@ struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
 }
 EXPORT_SYMBOL(pci_add_new_bus);
 
+static void pci_enable_crs(struct pci_dev *pdev)
+{
+        u16 root_cap = 0;
+
+        /* Enable CRS Software Visibility if supported */
+        pcie_capability_read_word(pdev, PCI_EXP_RTCAP, &root_cap);
+        if (root_cap & PCI_EXP_RTCAP_CRSVIS)
+                pcie_capability_set_word(pdev, PCI_EXP_RTCTL,
+                                         PCI_EXP_RTCTL_CRSSVE);
+}
+
 /*
  * If it's a bridge, configure it and scan the bus behind it.
  * For CardBus bridges, we don't scan behind as the devices will
@@ -788,6 +799,8 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
         pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
                               bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
 
+        pci_enable_crs(dev);
+
         if ((secondary || subordinate) && !pcibios_assign_all_busses() &&
             !is_cardbus && !broken) {
                 unsigned int cmax;
@@ -1424,8 +1437,13 @@ bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *l,
             *l == 0x0000ffff || *l == 0xffff0000)
                 return false;
 
-        /* Configuration request Retry Status */
-        while (*l == 0xffff0001) {
+        /*
+         * Configuration Request Retry Status.  Some root ports return the
+         * actual device ID instead of the synthetic ID (0xFFFF) required
+         * by the PCIe spec.  Ignore the device ID and only check for
+         * (vendor id == 1).
+         */
+        while ((*l & 0xffff) == 0x0001) {
                 if (!crs_timeout)
                         return false;