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path: root/drivers/pci/probe.c
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-rw-r--r--drivers/pci/probe.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index e159d6604494..0eeac60042b3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -679,6 +679,33 @@ static int pci_setup_device(struct pci_dev * dev)
679 pci_read_bases(dev, 6, PCI_ROM_ADDRESS); 679 pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
680 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor); 680 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
681 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device); 681 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
682
683 /*
684 * Do the ugly legacy mode stuff here rather than broken chip
685 * quirk code. Legacy mode ATA controllers have fixed
686 * addresses. These are not always echoed in BAR0-3, and
687 * BAR0-3 in a few cases contain junk!
688 */
689 if (class == PCI_CLASS_STORAGE_IDE) {
690 u8 progif;
691 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
692 if ((progif & 1) == 0) {
693 dev->resource[0].start = 0x1F0;
694 dev->resource[0].end = 0x1F7;
695 dev->resource[0].flags = IORESOURCE_IO;
696 dev->resource[1].start = 0x3F6;
697 dev->resource[1].end = 0x3F6;
698 dev->resource[1].flags = IORESOURCE_IO;
699 }
700 if ((progif & 4) == 0) {
701 dev->resource[2].start = 0x170;
702 dev->resource[2].end = 0x177;
703 dev->resource[2].flags = IORESOURCE_IO;
704 dev->resource[3].start = 0x376;
705 dev->resource[3].end = 0x376;
706 dev->resource[3].flags = IORESOURCE_IO;
707 }
708 }
682 break; 709 break;
683 710
684 case PCI_HEADER_TYPE_BRIDGE: /* bridge header */ 711 case PCI_HEADER_TYPE_BRIDGE: /* bridge header */