9 files changed, 104 insertions, 178 deletions

diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 52229863e9fe..4e24cb8a94ae 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -288,7 +288,7 @@ static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
         while (1) {
                 if (!pci_is_pcie(dev))
                         break;
-                if (dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
+                if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
                         return dev;
                 if (!dev->bus->self)
                         break;
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 7131644e3ae6..030cf12d5468 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -81,10 +81,11 @@ bool pci_aer_available(void)
 static int set_device_error_reporting(struct pci_dev *dev, void *data)
 {
         bool enable = *((bool *)data);
+        int type = pci_pcie_type(dev);
 
-        if ((dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) ||
-            (dev->pcie_type == PCI_EXP_TYPE_UPSTREAM) ||
-            (dev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)) {
+        if ((type == PCI_EXP_TYPE_ROOT_PORT) ||
+            (type == PCI_EXP_TYPE_UPSTREAM) ||
+            (type == PCI_EXP_TYPE_DOWNSTREAM)) {
                 if (enable)
                         pci_enable_pcie_error_reporting(dev);
                 else
@@ -121,19 +122,17 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev,
 static void aer_enable_rootport(struct aer_rpc *rpc)
 {
         struct pci_dev *pdev = rpc->rpd->port;
-        int pos, aer_pos;
+        int aer_pos;
         u16 reg16;
         u32 reg32;
 
-        pos = pci_pcie_cap(pdev);
         /* Clear PCIe Capability's Device Status */
-        pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
-        pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
+        pcie_capability_read_word(pdev, PCI_EXP_DEVSTA, &reg16);
+        pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, reg16);
 
         /* Disable system error generation in response to error messages */
-        pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, &reg16);
-        reg16 &= ~(SYSTEM_ERROR_INTR_ON_MESG_MASK);
-        pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, reg16);
+        pcie_capability_clear_word(pdev, PCI_EXP_RTCTL,
+                                   SYSTEM_ERROR_INTR_ON_MESG_MASK);
 
         aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
         /* Clear error status */
@@ -395,9 +394,8 @@ static void aer_error_resume(struct pci_dev *dev)
         u16 reg16;
 
         /* Clean up Root device status */
-        pos = pci_pcie_cap(dev);
-        pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &reg16);
-        pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, reg16);
+        pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &reg16);
+        pcie_capability_write_word(dev, PCI_EXP_DEVSTA, reg16);
 
         /* Clean AER Root Error Status */
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index 124f20ff11b2..5194a7d41730 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -60,7 +60,7 @@ static int aer_hest_parse(struct acpi_hest_header *hest_hdr, void *data)
         p = (struct acpi_hest_aer_common *)(hest_hdr + 1);
         if (p->flags & ACPI_HEST_GLOBAL) {
                 if ((pci_is_pcie(info->pci_dev) &&
-                     info->pci_dev->pcie_type == pcie_type) || bridge)
+                     pci_pcie_type(info->pci_dev) == pcie_type) || bridge)
                         ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST);
         } else
                 if (hest_match_pci(p, info->pci_dev))
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index dc901771d34b..cd46d74ec806 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -32,53 +32,28 @@ static bool nosourceid;
 module_param(forceload, bool, 0);
 module_param(nosourceid, bool, 0);
 
+#define PCI_EXP_AER_FLAGS       (PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | \
+                                 PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE)
+
 int pci_enable_pcie_error_reporting(struct pci_dev *dev)
 {
-        u16 reg16 = 0;
-        int pos;
-
         if (pcie_aer_get_firmware_first(dev))
                 return -EIO;
 
-        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
-        if (!pos)
-                return -EIO;
-
-        pos = pci_pcie_cap(dev);
-        if (!pos)
+        if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR))
                 return -EIO;
 
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
-        reg16 |= (PCI_EXP_DEVCTL_CERE |
-                PCI_EXP_DEVCTL_NFERE |
-                PCI_EXP_DEVCTL_FERE |
-                PCI_EXP_DEVCTL_URRE);
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
-
-        return 0;
+        return pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_AER_FLAGS);
 }
 EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
 
 int pci_disable_pcie_error_reporting(struct pci_dev *dev)
 {
-        u16 reg16 = 0;
-        int pos;
-
         if (pcie_aer_get_firmware_first(dev))
                 return -EIO;
 
-        pos = pci_pcie_cap(dev);
-        if (!pos)
-                return -EIO;
-
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
-        reg16 &= ~(PCI_EXP_DEVCTL_CERE |
-                PCI_EXP_DEVCTL_NFERE |
-                PCI_EXP_DEVCTL_FERE |
-                PCI_EXP_DEVCTL_URRE);
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
-
-        return 0;
+        return pcie_capability_clear_word(dev, PCI_EXP_DEVCTL,
+                                          PCI_EXP_AER_FLAGS);
 }
 EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
 
@@ -151,18 +126,12 @@ static bool is_error_source(struct pci_dev *dev, struct aer_err_info *e_info)
          */
         if (atomic_read(&dev->enable_cnt) == 0)
                 return false;
-        pos = pci_pcie_cap(dev);
-        if (!pos)
-                return false;
 
         /* Check if AER is enabled */
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
-        if (!(reg16 & (
-                PCI_EXP_DEVCTL_CERE |
-                PCI_EXP_DEVCTL_NFERE |
-                PCI_EXP_DEVCTL_FERE |
-                PCI_EXP_DEVCTL_URRE)))
+        pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &reg16);
+        if (!(reg16 & PCI_EXP_AER_FLAGS))
                 return false;
+
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
         if (!pos)
                 return false;
@@ -465,7 +434,7 @@ static pci_ers_result_t reset_link(struct pci_dev *dev)
 
         if (driver && driver->reset_link) {
                 status = driver->reset_link(udev);
-        } else if (udev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
+        } else if (pci_pcie_type(udev) == PCI_EXP_TYPE_DOWNSTREAM) {
                 status = default_downstream_reset_link(udev);
         } else {
                 dev_printk(KERN_DEBUG, &dev->dev,
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index b500840a143b..213753b283a6 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -125,21 +125,16 @@ static int policy_to_clkpm_state(struct pcie_link_state *link)
 
 static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable)
 {
-        int pos;
-        u16 reg16;
         struct pci_dev *child;
         struct pci_bus *linkbus = link->pdev->subordinate;
 
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                pos = pci_pcie_cap(child);
-                if (!pos)
-                        return;
-                pci_read_config_word(child, pos + PCI_EXP_LNKCTL, &reg16);
                 if (enable)
-                        reg16 |= PCI_EXP_LNKCTL_CLKREQ_EN;
+                        pcie_capability_set_word(child, PCI_EXP_LNKCTL,
+                                                 PCI_EXP_LNKCTL_CLKREQ_EN);
                 else
-                        reg16 &= ~PCI_EXP_LNKCTL_CLKREQ_EN;
-                pci_write_config_word(child, pos + PCI_EXP_LNKCTL, reg16);
+                        pcie_capability_clear_word(child, PCI_EXP_LNKCTL,
+                                                   PCI_EXP_LNKCTL_CLKREQ_EN);
         }
         link->clkpm_enabled = !!enable;
 }
@@ -157,7 +152,7 @@ static void pcie_set_clkpm(struct pcie_link_state *link, int enable)
 
 static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
 {
-        int pos, capable = 1, enabled = 1;
+        int capable = 1, enabled = 1;
         u32 reg32;
         u16 reg16;
         struct pci_dev *child;
@@ -165,16 +160,13 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
 
         /* All functions should have the same cap and state, take the worst */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                pos = pci_pcie_cap(child);
-                if (!pos)
-                        return;
-                pci_read_config_dword(child, pos + PCI_EXP_LNKCAP, &reg32);
+                pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &reg32);
                 if (!(reg32 & PCI_EXP_LNKCAP_CLKPM)) {
                         capable = 0;
                         enabled = 0;
                         break;
                 }
-                pci_read_config_word(child, pos + PCI_EXP_LNKCTL, &reg16);
+                pcie_capability_read_word(child, PCI_EXP_LNKCTL, &reg16);
                 if (!(reg16 & PCI_EXP_LNKCTL_CLKREQ_EN))
                         enabled = 0;
         }
@@ -190,7 +182,7 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
  */
 static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
 {
-        int ppos, cpos, same_clock = 1;
+        int same_clock = 1;
         u16 reg16, parent_reg, child_reg[8];
         unsigned long start_jiffies;
         struct pci_dev *child, *parent = link->pdev;
@@ -203,46 +195,43 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
         BUG_ON(!pci_is_pcie(child));
 
         /* Check downstream component if bit Slot Clock Configuration is 1 */
-        cpos = pci_pcie_cap(child);
-        pci_read_config_word(child, cpos + PCI_EXP_LNKSTA, &reg16);
+        pcie_capability_read_word(child, PCI_EXP_LNKSTA, &reg16);
         if (!(reg16 & PCI_EXP_LNKSTA_SLC))
                 same_clock = 0;
 
         /* Check upstream component if bit Slot Clock Configuration is 1 */
-        ppos = pci_pcie_cap(parent);
-        pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, &reg16);
+        pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);
         if (!(reg16 & PCI_EXP_LNKSTA_SLC))
                 same_clock = 0;
 
         /* Configure downstream component, all functions */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                cpos = pci_pcie_cap(child);
-                pci_read_config_word(child, cpos + PCI_EXP_LNKCTL, &reg16);
+                pcie_capability_read_word(child, PCI_EXP_LNKCTL, &reg16);
                 child_reg[PCI_FUNC(child->devfn)] = reg16;
                 if (same_clock)
                         reg16 |= PCI_EXP_LNKCTL_CCC;
                 else
                         reg16 &= ~PCI_EXP_LNKCTL_CCC;
-                pci_write_config_word(child, cpos + PCI_EXP_LNKCTL, reg16);
+                pcie_capability_write_word(child, PCI_EXP_LNKCTL, reg16);
         }
 
         /* Configure upstream component */
-        pci_read_config_word(parent, ppos + PCI_EXP_LNKCTL, &reg16);
+        pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &reg16);
         parent_reg = reg16;
         if (same_clock)
                 reg16 |= PCI_EXP_LNKCTL_CCC;
         else
                 reg16 &= ~PCI_EXP_LNKCTL_CCC;
-        pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, reg16);
+        pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
 
         /* Retrain link */
         reg16 |= PCI_EXP_LNKCTL_RL;
-        pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, reg16);
+        pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
 
         /* Wait for link training end. Break out after waiting for timeout */
         start_jiffies = jiffies;
         for (;;) {
-                pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, &reg16);
+                pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);
                 if (!(reg16 & PCI_EXP_LNKSTA_LT))
                         break;
                 if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT))
@@ -255,12 +244,10 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
         /* Training failed. Restore common clock configurations */
         dev_printk(KERN_ERR, &parent->dev,
                    "ASPM: Could not configure common clock\n");
-        list_for_each_entry(child, &linkbus->devices, bus_list) {
-                cpos = pci_pcie_cap(child);
-                pci_write_config_word(child, cpos + PCI_EXP_LNKCTL,
-                                      child_reg[PCI_FUNC(child->devfn)]);
-        }
-        pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, parent_reg);
+        list_for_each_entry(child, &linkbus->devices, bus_list)
+                pcie_capability_write_word(child, PCI_EXP_LNKCTL,
+                                           child_reg[PCI_FUNC(child->devfn)]);
+        pcie_capability_write_word(parent, PCI_EXP_LNKCTL, parent_reg);
 }
 
 /* Convert L0s latency encoding to ns */
@@ -305,16 +292,14 @@ struct aspm_register_info {
 static void pcie_get_aspm_reg(struct pci_dev *pdev,
                               struct aspm_register_info *info)
 {
-        int pos;
         u16 reg16;
         u32 reg32;
 
-        pos = pci_pcie_cap(pdev);
-        pci_read_config_dword(pdev, pos + PCI_EXP_LNKCAP, &reg32);
+        pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &reg32);
         info->support = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10;
         info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12;
         info->latency_encoding_l1  = (reg32 & PCI_EXP_LNKCAP_L1EL) >> 15;
-        pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
+        pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &reg16);
         info->enabled = reg16 & PCI_EXP_LNKCTL_ASPMC;
 }
 
@@ -412,7 +397,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
          * do ASPM for now.
          */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                if (child->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
+                if (pci_pcie_type(child) == PCI_EXP_TYPE_PCI_BRIDGE) {
                         link->aspm_disable = ASPM_STATE_ALL;
                         break;
                 }
@@ -420,17 +405,15 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
 
         /* Get and check endpoint acceptable latencies */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                int pos;
                 u32 reg32, encoding;
                 struct aspm_latency *acceptable =
                         &link->acceptable[PCI_FUNC(child->devfn)];
 
-                if (child->pcie_type != PCI_EXP_TYPE_ENDPOINT &&
-                    child->pcie_type != PCI_EXP_TYPE_LEG_END)
+                if (pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT &&
+                    pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END)
                         continue;
 
-                pos = pci_pcie_cap(child);
-                pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, &reg32);
+                pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32);
                 /* Calculate endpoint L0s acceptable latency */
                 encoding = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6;
                 acceptable->l0s = calc_l0s_acceptable(encoding);
@@ -444,13 +427,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
 
 static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val)
 {
-        u16 reg16;
-        int pos = pci_pcie_cap(pdev);
-
-        pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
-        reg16 &= ~0x3;
-        reg16 |= val;
-        pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
+        pcie_capability_clear_and_set_word(pdev, PCI_EXP_LNKCTL, 0x3, val);
 }
 
 static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)
@@ -505,7 +482,6 @@ static void free_link_state(struct pcie_link_state *link)
 static int pcie_aspm_sanity_check(struct pci_dev *pdev)
 {
         struct pci_dev *child;
-        int pos;
         u32 reg32;
 
         /*
@@ -513,8 +489,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
          * very strange. Disable ASPM for the whole slot
          */
         list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
-                pos = pci_pcie_cap(child);
-                if (!pos)
+                if (!pci_is_pcie(child))
                         return -EINVAL;
 
                 /*
@@ -530,7 +505,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
                  * Disable ASPM for pre-1.1 PCIe device, we follow MS to use
                  * RBER bit to determine if a function is 1.1 version device
                  */
-                pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, &reg32);
+                pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32);
                 if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) {
                         dev_printk(KERN_INFO, &child->dev, "disabling ASPM"
                                 " on pre-1.1 PCIe device.  You can enable it"
@@ -552,7 +527,7 @@ static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev)
         INIT_LIST_HEAD(&link->children);
         INIT_LIST_HEAD(&link->link);
         link->pdev = pdev;
-        if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
+        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM) {
                 struct pcie_link_state *parent;
                 parent = pdev->bus->parent->self->link_state;
                 if (!parent) {
@@ -585,12 +560,12 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
 
         if (!pci_is_pcie(pdev) || pdev->link_state)
                 return;
-        if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
-            pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)
+        if (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
+            pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM)
                 return;
 
         /* VIA has a strange chipset, root port is under a bridge */
-        if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT &&
+        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT &&
             pdev->bus->self)
                 return;
 
@@ -647,8 +622,8 @@ static void pcie_update_aspm_capable(struct pcie_link_state *root)
                 if (link->root != root)
                         continue;
                 list_for_each_entry(child, &linkbus->devices, bus_list) {
-                        if ((child->pcie_type != PCI_EXP_TYPE_ENDPOINT) &&
-                            (child->pcie_type != PCI_EXP_TYPE_LEG_END))
+                        if ((pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT) &&
+                            (pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END))
                                 continue;
                         pcie_aspm_check_latency(child);
                 }
@@ -663,8 +638,8 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev)
 
         if (!pci_is_pcie(pdev) || !parent || !parent->link_state)
                 return;
-        if ((parent->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
-            (parent->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
+        if ((pci_pcie_type(parent) != PCI_EXP_TYPE_ROOT_PORT) &&
+            (pci_pcie_type(parent) != PCI_EXP_TYPE_DOWNSTREAM))
                 return;
 
         down_read(&pci_bus_sem);
@@ -704,8 +679,8 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev)
 
         if (aspm_disabled || !pci_is_pcie(pdev) || !link)
                 return;
-        if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
-            (pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
+        if ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) &&
+            (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
                 return;
         /*
          * Devices changed PM state, we should recheck if latency
@@ -729,8 +704,8 @@ void pcie_aspm_powersave_config_link(struct pci_dev *pdev)
         if (aspm_policy != POLICY_POWERSAVE)
                 return;
 
-        if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
-            (pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
+        if ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) &&
+            (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
                 return;
 
         down_read(&pci_bus_sem);
@@ -757,8 +732,8 @@ static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem,
         if (!pci_is_pcie(pdev))
                 return;
 
-        if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
-            pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)
+        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT ||
+            pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM)
                 parent = pdev;
         if (!parent || !parent->link_state)
                 return;
@@ -933,8 +908,8 @@ void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev)
         struct pcie_link_state *link_state = pdev->link_state;
 
         if (!pci_is_pcie(pdev) ||
-            (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
-             pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
+            (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
+             pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
                 return;
 
         if (link_state->aspm_support)
@@ -950,8 +925,8 @@ void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev)
         struct pcie_link_state *link_state = pdev->link_state;
 
         if (!pci_is_pcie(pdev) ||
-            (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
-             pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
+            (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
+             pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
                 return;
 
         if (link_state->aspm_support)
diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c
index 001f1b78f39c..9ca0dc9ffd84 100644
--- a/drivers/pci/pcie/pme.c
+++ b/drivers/pci/pcie/pme.c
@@ -57,17 +57,12 @@ struct pcie_pme_service_data {
  */
 void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
 {
-        int rtctl_pos;
-        u16 rtctl;
-
-        rtctl_pos = pci_pcie_cap(dev) + PCI_EXP_RTCTL;
-
-        pci_read_config_word(dev, rtctl_pos, &rtctl);
         if (enable)
-                rtctl |= PCI_EXP_RTCTL_PMEIE;
+                pcie_capability_set_word(dev, PCI_EXP_RTCTL,
+                                         PCI_EXP_RTCTL_PMEIE);
         else
-                rtctl &= ~PCI_EXP_RTCTL_PMEIE;
-        pci_write_config_word(dev, rtctl_pos, rtctl);
+                pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
+                                           PCI_EXP_RTCTL_PMEIE);
 }
 
 /**
@@ -120,7 +115,7 @@ static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
         if (!dev)
                 return false;
 
-        if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
+        if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
                 down_read(&pci_bus_sem);
                 if (pcie_pme_walk_bus(bus))
                         found = true;
@@ -226,18 +221,15 @@ static void pcie_pme_work_fn(struct work_struct *work)
         struct pcie_pme_service_data *data =
                         container_of(work, struct pcie_pme_service_data, work);
         struct pci_dev *port = data->srv->port;
-        int rtsta_pos;
         u32 rtsta;
 
-        rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
-
         spin_lock_irq(&data->lock);
 
         for (;;) {
                 if (data->noirq)
                         break;
 
-                pci_read_config_dword(port, rtsta_pos, &rtsta);
+                pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
                 if (rtsta & PCI_EXP_RTSTA_PME) {
                         /*
                          * Clear PME status of the port.  If there are other
@@ -276,17 +268,14 @@ static irqreturn_t pcie_pme_irq(int irq, void *context)
 {
         struct pci_dev *port;
         struct pcie_pme_service_data *data;
-        int rtsta_pos;
         u32 rtsta;
         unsigned long flags;
 
         port = ((struct pcie_device *)context)->port;
         data = get_service_data((struct pcie_device *)context);
 
-        rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
-
         spin_lock_irqsave(&data->lock, flags);
-        pci_read_config_dword(port, rtsta_pos, &rtsta);
+        pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
 
         if (!(rtsta & PCI_EXP_RTSTA_PME)) {
                 spin_unlock_irqrestore(&data->lock, flags);
@@ -335,13 +324,13 @@ static void pcie_pme_mark_devices(struct pci_dev *port)
                 struct pci_dev *dev;
 
                 /* Check if this is a root port event collector. */
-                if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus)
+                if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
                         return;
 
                 down_read(&pci_bus_sem);
                 list_for_each_entry(dev, &bus->devices, bus_list)
                         if (pci_is_pcie(dev)
-                            && dev->pcie_type == PCI_EXP_TYPE_RC_END)
+                            && pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
                                 pcie_pme_set_native(dev, NULL);
                 up_read(&pci_bus_sem);
         }
diff --git a/drivers/pci/pcie/portdrv_bus.c b/drivers/pci/pcie/portdrv_bus.c
index 18bf90f748f6..67be55a7f260 100644
--- a/drivers/pci/pcie/portdrv_bus.c
+++ b/drivers/pci/pcie/portdrv_bus.c
@@ -38,7 +38,7 @@ static int pcie_port_bus_match(struct device *dev, struct device_driver *drv)
                 return 0;
 
         if ((driver->port_type != PCIE_ANY_PORT) &&
-            (driver->port_type != pciedev->port->pcie_type))
+            (driver->port_type != pci_pcie_type(pciedev->port)))
                 return 0;
 
         return 1;
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 75915b30ad19..d03a7a39b2d8 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -200,10 +200,13 @@ static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
 {
         int i, irq = -1;
 
-        /* We have to use INTx if MSI cannot be used for PCIe PME or pciehp. */
+        /*
+         * If MSI cannot be used for PCIe PME or hotplug, we have to use
+         * INTx or other interrupts, e.g. system shared interrupt.
+         */
         if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) ||
             ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
-                if (dev->pin)
+                if (dev->irq)
                         irq = dev->irq;
                 goto no_msi;
         }
@@ -212,8 +215,12 @@ static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
         if (!pcie_port_enable_msix(dev, irqs, mask))
                 return 0;
 
-        /* We're not going to use MSI-X, so try MSI and fall back to INTx */
-        if (!pci_enable_msi(dev) || dev->pin)
+        /*
+         * We're not going to use MSI-X, so try MSI and fall back to INTx.
+         * If neither MSI/MSI-X nor INTx available, try other interrupt.  On
+         * some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
+         */
+        if (!pci_enable_msi(dev) || dev->irq)
                 irq = dev->irq;
 
  no_msi:
@@ -246,8 +253,7 @@ static void cleanup_service_irqs(struct pci_dev *dev)
  */
 static int get_port_device_capability(struct pci_dev *dev)
 {
-        int services = 0, pos;
-        u16 reg16;
+        int services = 0;
         u32 reg32;
         int cap_mask = 0;
         int err;
@@ -265,11 +271,9 @@ static int get_port_device_capability(struct pci_dev *dev)
                         return 0;
         }
 
-        pos = pci_pcie_cap(dev);
-        pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
         /* Hot-Plug Capable */
-        if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) {
-                pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32);
+        if (cap_mask & PCIE_PORT_SERVICE_HP) {
+                pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32);
                 if (reg32 & PCI_EXP_SLTCAP_HPC) {
                         services |= PCIE_PORT_SERVICE_HP;
                         /*
@@ -277,10 +281,8 @@ static int get_port_device_capability(struct pci_dev *dev)
                          * enabled by the BIOS and the hot-plug service driver
                          * is not loaded.
                          */
-                        pos += PCI_EXP_SLTCTL;
-                        pci_read_config_word(dev, pos, &reg16);
-                        reg16 &= ~(PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
-                        pci_write_config_word(dev, pos, reg16);
+                        pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
+                                PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
                 }
         }
         /* AER capable */
@@ -298,7 +300,7 @@ static int get_port_device_capability(struct pci_dev *dev)
                 services |= PCIE_PORT_SERVICE_VC;
         /* Root ports are capable of generating PME too */
         if ((cap_mask & PCIE_PORT_SERVICE_PME)
-            && dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) {
+            && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
                 services |= PCIE_PORT_SERVICE_PME;
                 /*
                  * Disable PME interrupt on this port in case it's been enabled
@@ -336,7 +338,7 @@ static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
         device->release = release_pcie_device;  /* callback to free pcie dev */
         dev_set_name(device, "%s:pcie%02x",
                      pci_name(pdev),
-                     get_descriptor_id(pdev->pcie_type, service));
+                     get_descriptor_id(pci_pcie_type(pdev), service));
         device->parent = &pdev->dev;
         device_enable_async_suspend(device);
 
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index 943443510089..ca10911ee0df 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -64,14 +64,7 @@ __setup("pcie_ports=", pcie_port_setup);
  */
 void pcie_clear_root_pme_status(struct pci_dev *dev)
 {
-        int rtsta_pos;
-        u32 rtsta;
-
-        rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
-
-        pci_read_config_dword(dev, rtsta_pos, &rtsta);
-        rtsta |= PCI_EXP_RTSTA_PME;
-        pci_write_config_dword(dev, rtsta_pos, rtsta);
+        pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
 }
 
 static int pcie_portdrv_restore_config(struct pci_dev *dev)
@@ -95,7 +88,7 @@ static int pcie_port_resume_noirq(struct device *dev)
          * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
          * bits now just in case (shouldn't hurt).
          */
-        if(pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
+        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
                 pcie_clear_root_pme_status(pdev);
         return 0;
 }
@@ -186,9 +179,9 @@ static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
         int status;
 
         if (!pci_is_pcie(dev) ||
-            ((dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
-             (dev->pcie_type != PCI_EXP_TYPE_UPSTREAM) &&
-             (dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)))
+            ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
+             (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
+             (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
                 return -ENODEV;
 
         if (!dev->irq && dev->pin) {