diff options
Diffstat (limited to 'drivers/pci/pcie/aer')
-rw-r--r-- | drivers/pci/pcie/aer/aer_inject.c | 58 | ||||
-rw-r--r-- | drivers/pci/pcie/aer/aerdrv.c | 4 | ||||
-rw-r--r-- | drivers/pci/pcie/aer/aerdrv_core.c | 70 | ||||
-rw-r--r-- | drivers/pci/pcie/aer/ecrc.c | 4 |
4 files changed, 78 insertions, 58 deletions
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c index 62d15f652bb6..7fcd5331b14c 100644 --- a/drivers/pci/pcie/aer/aer_inject.c +++ b/drivers/pci/pcie/aer/aer_inject.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/pci.h> | 23 | #include <linux/pci.h> |
24 | #include <linux/fs.h> | 24 | #include <linux/fs.h> |
25 | #include <linux/uaccess.h> | 25 | #include <linux/uaccess.h> |
26 | #include <linux/stddef.h> | ||
26 | #include "aerdrv.h" | 27 | #include "aerdrv.h" |
27 | 28 | ||
28 | struct aer_error_inj { | 29 | struct aer_error_inj { |
@@ -35,10 +36,12 @@ struct aer_error_inj { | |||
35 | u32 header_log1; | 36 | u32 header_log1; |
36 | u32 header_log2; | 37 | u32 header_log2; |
37 | u32 header_log3; | 38 | u32 header_log3; |
39 | u16 domain; | ||
38 | }; | 40 | }; |
39 | 41 | ||
40 | struct aer_error { | 42 | struct aer_error { |
41 | struct list_head list; | 43 | struct list_head list; |
44 | u16 domain; | ||
42 | unsigned int bus; | 45 | unsigned int bus; |
43 | unsigned int devfn; | 46 | unsigned int devfn; |
44 | int pos_cap_err; | 47 | int pos_cap_err; |
@@ -66,22 +69,27 @@ static LIST_HEAD(pci_bus_ops_list); | |||
66 | /* Protect einjected and pci_bus_ops_list */ | 69 | /* Protect einjected and pci_bus_ops_list */ |
67 | static DEFINE_SPINLOCK(inject_lock); | 70 | static DEFINE_SPINLOCK(inject_lock); |
68 | 71 | ||
69 | static void aer_error_init(struct aer_error *err, unsigned int bus, | 72 | static void aer_error_init(struct aer_error *err, u16 domain, |
70 | unsigned int devfn, int pos_cap_err) | 73 | unsigned int bus, unsigned int devfn, |
74 | int pos_cap_err) | ||
71 | { | 75 | { |
72 | INIT_LIST_HEAD(&err->list); | 76 | INIT_LIST_HEAD(&err->list); |
77 | err->domain = domain; | ||
73 | err->bus = bus; | 78 | err->bus = bus; |
74 | err->devfn = devfn; | 79 | err->devfn = devfn; |
75 | err->pos_cap_err = pos_cap_err; | 80 | err->pos_cap_err = pos_cap_err; |
76 | } | 81 | } |
77 | 82 | ||
78 | /* inject_lock must be held before calling */ | 83 | /* inject_lock must be held before calling */ |
79 | static struct aer_error *__find_aer_error(unsigned int bus, unsigned int devfn) | 84 | static struct aer_error *__find_aer_error(u16 domain, unsigned int bus, |
85 | unsigned int devfn) | ||
80 | { | 86 | { |
81 | struct aer_error *err; | 87 | struct aer_error *err; |
82 | 88 | ||
83 | list_for_each_entry(err, &einjected, list) { | 89 | list_for_each_entry(err, &einjected, list) { |
84 | if (bus == err->bus && devfn == err->devfn) | 90 | if (domain == err->domain && |
91 | bus == err->bus && | ||
92 | devfn == err->devfn) | ||
85 | return err; | 93 | return err; |
86 | } | 94 | } |
87 | return NULL; | 95 | return NULL; |
@@ -90,7 +98,10 @@ static struct aer_error *__find_aer_error(unsigned int bus, unsigned int devfn) | |||
90 | /* inject_lock must be held before calling */ | 98 | /* inject_lock must be held before calling */ |
91 | static struct aer_error *__find_aer_error_by_dev(struct pci_dev *dev) | 99 | static struct aer_error *__find_aer_error_by_dev(struct pci_dev *dev) |
92 | { | 100 | { |
93 | return __find_aer_error(dev->bus->number, dev->devfn); | 101 | int domain = pci_domain_nr(dev->bus); |
102 | if (domain < 0) | ||
103 | return NULL; | ||
104 | return __find_aer_error((u16)domain, dev->bus->number, dev->devfn); | ||
94 | } | 105 | } |
95 | 106 | ||
96 | /* inject_lock must be held before calling */ | 107 | /* inject_lock must be held before calling */ |
@@ -172,11 +183,15 @@ static int pci_read_aer(struct pci_bus *bus, unsigned int devfn, int where, | |||
172 | struct aer_error *err; | 183 | struct aer_error *err; |
173 | unsigned long flags; | 184 | unsigned long flags; |
174 | struct pci_ops *ops; | 185 | struct pci_ops *ops; |
186 | int domain; | ||
175 | 187 | ||
176 | spin_lock_irqsave(&inject_lock, flags); | 188 | spin_lock_irqsave(&inject_lock, flags); |
177 | if (size != sizeof(u32)) | 189 | if (size != sizeof(u32)) |
178 | goto out; | 190 | goto out; |
179 | err = __find_aer_error(bus->number, devfn); | 191 | domain = pci_domain_nr(bus); |
192 | if (domain < 0) | ||
193 | goto out; | ||
194 | err = __find_aer_error((u16)domain, bus->number, devfn); | ||
180 | if (!err) | 195 | if (!err) |
181 | goto out; | 196 | goto out; |
182 | 197 | ||
@@ -200,11 +215,15 @@ int pci_write_aer(struct pci_bus *bus, unsigned int devfn, int where, int size, | |||
200 | unsigned long flags; | 215 | unsigned long flags; |
201 | int rw1cs; | 216 | int rw1cs; |
202 | struct pci_ops *ops; | 217 | struct pci_ops *ops; |
218 | int domain; | ||
203 | 219 | ||
204 | spin_lock_irqsave(&inject_lock, flags); | 220 | spin_lock_irqsave(&inject_lock, flags); |
205 | if (size != sizeof(u32)) | 221 | if (size != sizeof(u32)) |
206 | goto out; | 222 | goto out; |
207 | err = __find_aer_error(bus->number, devfn); | 223 | domain = pci_domain_nr(bus); |
224 | if (domain < 0) | ||
225 | goto out; | ||
226 | err = __find_aer_error((u16)domain, bus->number, devfn); | ||
208 | if (!err) | 227 | if (!err) |
209 | goto out; | 228 | goto out; |
210 | 229 | ||
@@ -262,7 +281,7 @@ out: | |||
262 | static struct pci_dev *pcie_find_root_port(struct pci_dev *dev) | 281 | static struct pci_dev *pcie_find_root_port(struct pci_dev *dev) |
263 | { | 282 | { |
264 | while (1) { | 283 | while (1) { |
265 | if (!dev->is_pcie) | 284 | if (!pci_is_pcie(dev)) |
266 | break; | 285 | break; |
267 | if (dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) | 286 | if (dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) |
268 | return dev; | 287 | return dev; |
@@ -305,25 +324,25 @@ static int aer_inject(struct aer_error_inj *einj) | |||
305 | u32 sever; | 324 | u32 sever; |
306 | int ret = 0; | 325 | int ret = 0; |
307 | 326 | ||
308 | dev = pci_get_bus_and_slot(einj->bus, devfn); | 327 | dev = pci_get_domain_bus_and_slot((int)einj->domain, einj->bus, devfn); |
309 | if (!dev) | 328 | if (!dev) |
310 | return -EINVAL; | 329 | return -ENODEV; |
311 | rpdev = pcie_find_root_port(dev); | 330 | rpdev = pcie_find_root_port(dev); |
312 | if (!rpdev) { | 331 | if (!rpdev) { |
313 | ret = -EINVAL; | 332 | ret = -ENOTTY; |
314 | goto out_put; | 333 | goto out_put; |
315 | } | 334 | } |
316 | 335 | ||
317 | pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | 336 | pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); |
318 | if (!pos_cap_err) { | 337 | if (!pos_cap_err) { |
319 | ret = -EIO; | 338 | ret = -ENOTTY; |
320 | goto out_put; | 339 | goto out_put; |
321 | } | 340 | } |
322 | pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever); | 341 | pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever); |
323 | 342 | ||
324 | rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR); | 343 | rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR); |
325 | if (!rp_pos_cap_err) { | 344 | if (!rp_pos_cap_err) { |
326 | ret = -EIO; | 345 | ret = -ENOTTY; |
327 | goto out_put; | 346 | goto out_put; |
328 | } | 347 | } |
329 | 348 | ||
@@ -344,7 +363,8 @@ static int aer_inject(struct aer_error_inj *einj) | |||
344 | if (!err) { | 363 | if (!err) { |
345 | err = err_alloc; | 364 | err = err_alloc; |
346 | err_alloc = NULL; | 365 | err_alloc = NULL; |
347 | aer_error_init(err, einj->bus, devfn, pos_cap_err); | 366 | aer_error_init(err, einj->domain, einj->bus, devfn, |
367 | pos_cap_err); | ||
348 | list_add(&err->list, &einjected); | 368 | list_add(&err->list, &einjected); |
349 | } | 369 | } |
350 | err->uncor_status |= einj->uncor_status; | 370 | err->uncor_status |= einj->uncor_status; |
@@ -358,7 +378,8 @@ static int aer_inject(struct aer_error_inj *einj) | |||
358 | if (!rperr) { | 378 | if (!rperr) { |
359 | rperr = rperr_alloc; | 379 | rperr = rperr_alloc; |
360 | rperr_alloc = NULL; | 380 | rperr_alloc = NULL; |
361 | aer_error_init(rperr, rpdev->bus->number, rpdev->devfn, | 381 | aer_error_init(rperr, pci_domain_nr(rpdev->bus), |
382 | rpdev->bus->number, rpdev->devfn, | ||
362 | rp_pos_cap_err); | 383 | rp_pos_cap_err); |
363 | list_add(&rperr->list, &einjected); | 384 | list_add(&rperr->list, &einjected); |
364 | } | 385 | } |
@@ -411,10 +432,11 @@ static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf, | |||
411 | 432 | ||
412 | if (!capable(CAP_SYS_ADMIN)) | 433 | if (!capable(CAP_SYS_ADMIN)) |
413 | return -EPERM; | 434 | return -EPERM; |
414 | 435 | if (usize < offsetof(struct aer_error_inj, domain) || | |
415 | if (usize != sizeof(struct aer_error_inj)) | 436 | usize > sizeof(einj)) |
416 | return -EINVAL; | 437 | return -EINVAL; |
417 | 438 | ||
439 | memset(&einj, 0, sizeof(einj)); | ||
418 | if (copy_from_user(&einj, ubuf, usize)) | 440 | if (copy_from_user(&einj, ubuf, usize)) |
419 | return -EFAULT; | 441 | return -EFAULT; |
420 | 442 | ||
@@ -452,7 +474,7 @@ static void __exit aer_inject_exit(void) | |||
452 | } | 474 | } |
453 | 475 | ||
454 | spin_lock_irqsave(&inject_lock, flags); | 476 | spin_lock_irqsave(&inject_lock, flags); |
455 | list_for_each_entry_safe(err, err_next, &pci_bus_ops_list, list) { | 477 | list_for_each_entry_safe(err, err_next, &einjected, list) { |
456 | list_del(&err->list); | 478 | list_del(&err->list); |
457 | kfree(err); | 479 | kfree(err); |
458 | } | 480 | } |
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c index 40c3cc5d1caf..97a345927b55 100644 --- a/drivers/pci/pcie/aer/aerdrv.c +++ b/drivers/pci/pcie/aer/aerdrv.c | |||
@@ -53,7 +53,7 @@ static struct pci_error_handlers aer_error_handlers = { | |||
53 | 53 | ||
54 | static struct pcie_port_service_driver aerdriver = { | 54 | static struct pcie_port_service_driver aerdriver = { |
55 | .name = "aer", | 55 | .name = "aer", |
56 | .port_type = PCIE_RC_PORT, | 56 | .port_type = PCI_EXP_TYPE_ROOT_PORT, |
57 | .service = PCIE_PORT_SERVICE_AER, | 57 | .service = PCIE_PORT_SERVICE_AER, |
58 | 58 | ||
59 | .probe = aer_probe, | 59 | .probe = aer_probe, |
@@ -295,7 +295,7 @@ static void aer_error_resume(struct pci_dev *dev) | |||
295 | u16 reg16; | 295 | u16 reg16; |
296 | 296 | ||
297 | /* Clean up Root device status */ | 297 | /* Clean up Root device status */ |
298 | pos = pci_find_capability(dev, PCI_CAP_ID_EXP); | 298 | pos = pci_pcie_cap(dev); |
299 | pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, ®16); | 299 | pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, ®16); |
300 | pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, reg16); | 300 | pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, reg16); |
301 | 301 | ||
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index 9f5ccbeb4fa5..ae672ca80333 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c | |||
@@ -35,11 +35,14 @@ int pci_enable_pcie_error_reporting(struct pci_dev *dev) | |||
35 | u16 reg16 = 0; | 35 | u16 reg16 = 0; |
36 | int pos; | 36 | int pos; |
37 | 37 | ||
38 | if (dev->aer_firmware_first) | ||
39 | return -EIO; | ||
40 | |||
38 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | 41 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); |
39 | if (!pos) | 42 | if (!pos) |
40 | return -EIO; | 43 | return -EIO; |
41 | 44 | ||
42 | pos = pci_find_capability(dev, PCI_CAP_ID_EXP); | 45 | pos = pci_pcie_cap(dev); |
43 | if (!pos) | 46 | if (!pos) |
44 | return -EIO; | 47 | return -EIO; |
45 | 48 | ||
@@ -60,7 +63,10 @@ int pci_disable_pcie_error_reporting(struct pci_dev *dev) | |||
60 | u16 reg16 = 0; | 63 | u16 reg16 = 0; |
61 | int pos; | 64 | int pos; |
62 | 65 | ||
63 | pos = pci_find_capability(dev, PCI_CAP_ID_EXP); | 66 | if (dev->aer_firmware_first) |
67 | return -EIO; | ||
68 | |||
69 | pos = pci_pcie_cap(dev); | ||
64 | if (!pos) | 70 | if (!pos) |
65 | return -EIO; | 71 | return -EIO; |
66 | 72 | ||
@@ -78,48 +84,27 @@ EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting); | |||
78 | int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev) | 84 | int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev) |
79 | { | 85 | { |
80 | int pos; | 86 | int pos; |
81 | u32 status, mask; | 87 | u32 status; |
82 | 88 | ||
83 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | 89 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); |
84 | if (!pos) | 90 | if (!pos) |
85 | return -EIO; | 91 | return -EIO; |
86 | 92 | ||
87 | pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status); | 93 | pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status); |
88 | pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask); | 94 | if (status) |
89 | if (dev->error_state == pci_channel_io_normal) | 95 | pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status); |
90 | status &= ~mask; /* Clear corresponding nonfatal bits */ | ||
91 | else | ||
92 | status &= mask; /* Clear corresponding fatal bits */ | ||
93 | pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status); | ||
94 | 96 | ||
95 | return 0; | 97 | return 0; |
96 | } | 98 | } |
97 | EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status); | 99 | EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status); |
98 | 100 | ||
99 | #if 0 | ||
100 | int pci_cleanup_aer_correct_error_status(struct pci_dev *dev) | ||
101 | { | ||
102 | int pos; | ||
103 | u32 status; | ||
104 | |||
105 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | ||
106 | if (!pos) | ||
107 | return -EIO; | ||
108 | |||
109 | pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status); | ||
110 | pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, status); | ||
111 | |||
112 | return 0; | ||
113 | } | ||
114 | #endif /* 0 */ | ||
115 | |||
116 | static int set_device_error_reporting(struct pci_dev *dev, void *data) | 101 | static int set_device_error_reporting(struct pci_dev *dev, void *data) |
117 | { | 102 | { |
118 | bool enable = *((bool *)data); | 103 | bool enable = *((bool *)data); |
119 | 104 | ||
120 | if (dev->pcie_type == PCIE_RC_PORT || | 105 | if ((dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) || |
121 | dev->pcie_type == PCIE_SW_UPSTREAM_PORT || | 106 | (dev->pcie_type == PCI_EXP_TYPE_UPSTREAM) || |
122 | dev->pcie_type == PCIE_SW_DOWNSTREAM_PORT) { | 107 | (dev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)) { |
123 | if (enable) | 108 | if (enable) |
124 | pci_enable_pcie_error_reporting(dev); | 109 | pci_enable_pcie_error_reporting(dev); |
125 | else | 110 | else |
@@ -218,7 +203,7 @@ static int find_device_iter(struct pci_dev *dev, void *data) | |||
218 | */ | 203 | */ |
219 | if (atomic_read(&dev->enable_cnt) == 0) | 204 | if (atomic_read(&dev->enable_cnt) == 0) |
220 | return 0; | 205 | return 0; |
221 | pos = pci_find_capability(dev, PCI_CAP_ID_EXP); | 206 | pos = pci_pcie_cap(dev); |
222 | if (!pos) | 207 | if (!pos) |
223 | return 0; | 208 | return 0; |
224 | /* Check if AER is enabled */ | 209 | /* Check if AER is enabled */ |
@@ -431,10 +416,9 @@ static int find_aer_service_iter(struct device *device, void *data) | |||
431 | result = (struct find_aer_service_data *) data; | 416 | result = (struct find_aer_service_data *) data; |
432 | 417 | ||
433 | if (device->bus == &pcie_port_bus_type) { | 418 | if (device->bus == &pcie_port_bus_type) { |
434 | struct pcie_port_data *port_data; | 419 | struct pcie_device *pcie = to_pcie_device(device); |
435 | 420 | ||
436 | port_data = pci_get_drvdata(to_pcie_device(device)->port); | 421 | if (pcie->port->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) |
437 | if (port_data->port_type == PCIE_SW_DOWNSTREAM_PORT) | ||
438 | result->is_downstream = 1; | 422 | result->is_downstream = 1; |
439 | 423 | ||
440 | driver = device->driver; | 424 | driver = device->driver; |
@@ -612,7 +596,7 @@ void aer_enable_rootport(struct aer_rpc *rpc) | |||
612 | u16 reg16; | 596 | u16 reg16; |
613 | u32 reg32; | 597 | u32 reg32; |
614 | 598 | ||
615 | pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); | 599 | pos = pci_pcie_cap(pdev); |
616 | /* Clear PCIE Capability's Device Status */ | 600 | /* Clear PCIE Capability's Device Status */ |
617 | pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, ®16); | 601 | pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, ®16); |
618 | pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16); | 602 | pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16); |
@@ -874,8 +858,22 @@ void aer_delete_rootport(struct aer_rpc *rpc) | |||
874 | */ | 858 | */ |
875 | int aer_init(struct pcie_device *dev) | 859 | int aer_init(struct pcie_device *dev) |
876 | { | 860 | { |
877 | if (aer_osc_setup(dev) && !forceload) | 861 | if (dev->port->aer_firmware_first) { |
878 | return -ENXIO; | 862 | dev_printk(KERN_DEBUG, &dev->device, |
863 | "PCIe errors handled by platform firmware.\n"); | ||
864 | goto out; | ||
865 | } | ||
866 | |||
867 | if (aer_osc_setup(dev)) | ||
868 | goto out; | ||
879 | 869 | ||
880 | return 0; | 870 | return 0; |
871 | out: | ||
872 | if (forceload) { | ||
873 | dev_printk(KERN_DEBUG, &dev->device, | ||
874 | "aerdrv forceload requested.\n"); | ||
875 | dev->port->aer_firmware_first = 0; | ||
876 | return 0; | ||
877 | } | ||
878 | return -ENXIO; | ||
881 | } | 879 | } |
diff --git a/drivers/pci/pcie/aer/ecrc.c b/drivers/pci/pcie/aer/ecrc.c index a928d8ab6bda..a2747a663bc9 100644 --- a/drivers/pci/pcie/aer/ecrc.c +++ b/drivers/pci/pcie/aer/ecrc.c | |||
@@ -51,7 +51,7 @@ static int enable_ecrc_checking(struct pci_dev *dev) | |||
51 | int pos; | 51 | int pos; |
52 | u32 reg32; | 52 | u32 reg32; |
53 | 53 | ||
54 | if (!dev->is_pcie) | 54 | if (!pci_is_pcie(dev)) |
55 | return -ENODEV; | 55 | return -ENODEV; |
56 | 56 | ||
57 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | 57 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); |
@@ -79,7 +79,7 @@ static int disable_ecrc_checking(struct pci_dev *dev) | |||
79 | int pos; | 79 | int pos; |
80 | u32 reg32; | 80 | u32 reg32; |
81 | 81 | ||
82 | if (!dev->is_pcie) | 82 | if (!pci_is_pcie(dev)) |
83 | return -ENODEV; | 83 | return -ENODEV; |
84 | 84 | ||
85 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | 85 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); |