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path: root/drivers/pci/pci.c
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Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r--drivers/pci/pci.c51
1 files changed, 22 insertions, 29 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index cb1dd5f4988c..37499127c801 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/pm.h> 14#include <linux/pm.h>
15#include <linux/slab.h>
15#include <linux/module.h> 16#include <linux/module.h>
16#include <linux/spinlock.h> 17#include <linux/spinlock.h>
17#include <linux/string.h> 18#include <linux/string.h>
@@ -678,7 +679,7 @@ static void __pci_start_power_transition(struct pci_dev *dev, pci_power_t state)
678 */ 679 */
679int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state) 680int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state)
680{ 681{
681 return state > PCI_D0 ? 682 return state >= PCI_D0 ?
682 pci_platform_power_transition(dev, state) : -EINVAL; 683 pci_platform_power_transition(dev, state) : -EINVAL;
683} 684}
684EXPORT_SYMBOL_GPL(__pci_complete_power_transition); 685EXPORT_SYMBOL_GPL(__pci_complete_power_transition);
@@ -715,10 +716,6 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
715 */ 716 */
716 return 0; 717 return 0;
717 718
718 /* Check if we're already there */
719 if (dev->current_state == state)
720 return 0;
721
722 __pci_start_power_transition(dev, state); 719 __pci_start_power_transition(dev, state);
723 720
724 /* This device is quirked not to be put into D3, so 721 /* This device is quirked not to be put into D3, so
@@ -2576,18 +2573,17 @@ EXPORT_SYMBOL_GPL(pci_reset_function);
2576 */ 2573 */
2577int pcix_get_max_mmrbc(struct pci_dev *dev) 2574int pcix_get_max_mmrbc(struct pci_dev *dev)
2578{ 2575{
2579 int err, cap; 2576 int cap;
2580 u32 stat; 2577 u32 stat;
2581 2578
2582 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); 2579 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
2583 if (!cap) 2580 if (!cap)
2584 return -EINVAL; 2581 return -EINVAL;
2585 2582
2586 err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat); 2583 if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat))
2587 if (err)
2588 return -EINVAL; 2584 return -EINVAL;
2589 2585
2590 return (stat & PCI_X_STATUS_MAX_READ) >> 12; 2586 return 512 << ((stat & PCI_X_STATUS_MAX_READ) >> 21);
2591} 2587}
2592EXPORT_SYMBOL(pcix_get_max_mmrbc); 2588EXPORT_SYMBOL(pcix_get_max_mmrbc);
2593 2589
@@ -2600,18 +2596,17 @@ EXPORT_SYMBOL(pcix_get_max_mmrbc);
2600 */ 2596 */
2601int pcix_get_mmrbc(struct pci_dev *dev) 2597int pcix_get_mmrbc(struct pci_dev *dev)
2602{ 2598{
2603 int ret, cap; 2599 int cap;
2604 u32 cmd; 2600 u16 cmd;
2605 2601
2606 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); 2602 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
2607 if (!cap) 2603 if (!cap)
2608 return -EINVAL; 2604 return -EINVAL;
2609 2605
2610 ret = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd); 2606 if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))
2611 if (!ret) 2607 return -EINVAL;
2612 ret = 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2);
2613 2608
2614 return ret; 2609 return 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2);
2615} 2610}
2616EXPORT_SYMBOL(pcix_get_mmrbc); 2611EXPORT_SYMBOL(pcix_get_mmrbc);
2617 2612
@@ -2626,28 +2621,27 @@ EXPORT_SYMBOL(pcix_get_mmrbc);
2626 */ 2621 */
2627int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc) 2622int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
2628{ 2623{
2629 int cap, err = -EINVAL; 2624 int cap;
2630 u32 stat, cmd, v, o; 2625 u32 stat, v, o;
2626 u16 cmd;
2631 2627
2632 if (mmrbc < 512 || mmrbc > 4096 || !is_power_of_2(mmrbc)) 2628 if (mmrbc < 512 || mmrbc > 4096 || !is_power_of_2(mmrbc))
2633 goto out; 2629 return -EINVAL;
2634 2630
2635 v = ffs(mmrbc) - 10; 2631 v = ffs(mmrbc) - 10;
2636 2632
2637 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); 2633 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
2638 if (!cap) 2634 if (!cap)
2639 goto out; 2635 return -EINVAL;
2640 2636
2641 err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat); 2637 if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat))
2642 if (err) 2638 return -EINVAL;
2643 goto out;
2644 2639
2645 if (v > (stat & PCI_X_STATUS_MAX_READ) >> 21) 2640 if (v > (stat & PCI_X_STATUS_MAX_READ) >> 21)
2646 return -E2BIG; 2641 return -E2BIG;
2647 2642
2648 err = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd); 2643 if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))
2649 if (err) 2644 return -EINVAL;
2650 goto out;
2651 2645
2652 o = (cmd & PCI_X_CMD_MAX_READ) >> 2; 2646 o = (cmd & PCI_X_CMD_MAX_READ) >> 2;
2653 if (o != v) { 2647 if (o != v) {
@@ -2657,10 +2651,10 @@ int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
2657 2651
2658 cmd &= ~PCI_X_CMD_MAX_READ; 2652 cmd &= ~PCI_X_CMD_MAX_READ;
2659 cmd |= v << 2; 2653 cmd |= v << 2;
2660 err = pci_write_config_dword(dev, cap + PCI_X_CMD, cmd); 2654 if (pci_write_config_word(dev, cap + PCI_X_CMD, cmd))
2655 return -EIO;
2661 } 2656 }
2662out: 2657 return 0;
2663 return err;
2664} 2658}
2665EXPORT_SYMBOL(pcix_set_mmrbc); 2659EXPORT_SYMBOL(pcix_set_mmrbc);
2666 2660
@@ -3023,7 +3017,6 @@ EXPORT_SYMBOL(pcim_pin_device);
3023EXPORT_SYMBOL(pci_disable_device); 3017EXPORT_SYMBOL(pci_disable_device);
3024EXPORT_SYMBOL(pci_find_capability); 3018EXPORT_SYMBOL(pci_find_capability);
3025EXPORT_SYMBOL(pci_bus_find_capability); 3019EXPORT_SYMBOL(pci_bus_find_capability);
3026EXPORT_SYMBOL(pci_register_set_vga_state);
3027EXPORT_SYMBOL(pci_release_regions); 3020EXPORT_SYMBOL(pci_release_regions);
3028EXPORT_SYMBOL(pci_request_regions); 3021EXPORT_SYMBOL(pci_request_regions);
3029EXPORT_SYMBOL(pci_request_regions_exclusive); 3022EXPORT_SYMBOL(pci_request_regions_exclusive);