diff options
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r-- | drivers/pci/pci.c | 31 |
1 files changed, 18 insertions, 13 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index bc88c30a418b..427991741cf3 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -875,7 +875,17 @@ pci_set_master(struct pci_dev *dev) | |||
875 | pcibios_set_master(dev); | 875 | pcibios_set_master(dev); |
876 | } | 876 | } |
877 | 877 | ||
878 | #ifndef HAVE_ARCH_PCI_MWI | 878 | #ifdef PCI_DISABLE_MWI |
879 | int pci_set_mwi(struct pci_dev *dev) | ||
880 | { | ||
881 | return 0; | ||
882 | } | ||
883 | |||
884 | void pci_clear_mwi(struct pci_dev *dev) | ||
885 | { | ||
886 | } | ||
887 | |||
888 | #else | ||
879 | 889 | ||
880 | #ifndef PCI_CACHE_LINE_BYTES | 890 | #ifndef PCI_CACHE_LINE_BYTES |
881 | #define PCI_CACHE_LINE_BYTES L1_CACHE_BYTES | 891 | #define PCI_CACHE_LINE_BYTES L1_CACHE_BYTES |
@@ -886,17 +896,17 @@ pci_set_master(struct pci_dev *dev) | |||
886 | u8 pci_cache_line_size = PCI_CACHE_LINE_BYTES / 4; | 896 | u8 pci_cache_line_size = PCI_CACHE_LINE_BYTES / 4; |
887 | 897 | ||
888 | /** | 898 | /** |
889 | * pci_generic_prep_mwi - helper function for pci_set_mwi | 899 | * pci_set_cacheline_size - ensure the CACHE_LINE_SIZE register is programmed |
890 | * @dev: the PCI device for which MWI is enabled | 900 | * @dev: the PCI device for which MWI is to be enabled |
891 | * | 901 | * |
892 | * Helper function for generic implementation of pcibios_prep_mwi | 902 | * Helper function for pci_set_mwi. |
893 | * function. Originally copied from drivers/net/acenic.c. | 903 | * Originally copied from drivers/net/acenic.c. |
894 | * Copyright 1998-2001 by Jes Sorensen, <jes@trained-monkey.org>. | 904 | * Copyright 1998-2001 by Jes Sorensen, <jes@trained-monkey.org>. |
895 | * | 905 | * |
896 | * RETURNS: An appropriate -ERRNO error value on error, or zero for success. | 906 | * RETURNS: An appropriate -ERRNO error value on error, or zero for success. |
897 | */ | 907 | */ |
898 | static int | 908 | static int |
899 | pci_generic_prep_mwi(struct pci_dev *dev) | 909 | pci_set_cacheline_size(struct pci_dev *dev) |
900 | { | 910 | { |
901 | u8 cacheline_size; | 911 | u8 cacheline_size; |
902 | 912 | ||
@@ -922,7 +932,6 @@ pci_generic_prep_mwi(struct pci_dev *dev) | |||
922 | 932 | ||
923 | return -EINVAL; | 933 | return -EINVAL; |
924 | } | 934 | } |
925 | #endif /* !HAVE_ARCH_PCI_MWI */ | ||
926 | 935 | ||
927 | /** | 936 | /** |
928 | * pci_set_mwi - enables memory-write-invalidate PCI transaction | 937 | * pci_set_mwi - enables memory-write-invalidate PCI transaction |
@@ -940,12 +949,7 @@ pci_set_mwi(struct pci_dev *dev) | |||
940 | int rc; | 949 | int rc; |
941 | u16 cmd; | 950 | u16 cmd; |
942 | 951 | ||
943 | #ifdef HAVE_ARCH_PCI_MWI | 952 | rc = pci_set_cacheline_size(dev); |
944 | rc = pcibios_prep_mwi(dev); | ||
945 | #else | ||
946 | rc = pci_generic_prep_mwi(dev); | ||
947 | #endif | ||
948 | |||
949 | if (rc) | 953 | if (rc) |
950 | return rc; | 954 | return rc; |
951 | 955 | ||
@@ -976,6 +980,7 @@ pci_clear_mwi(struct pci_dev *dev) | |||
976 | pci_write_config_word(dev, PCI_COMMAND, cmd); | 980 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
977 | } | 981 | } |
978 | } | 982 | } |
983 | #endif /* ! PCI_DISABLE_MWI */ | ||
979 | 984 | ||
980 | /** | 985 | /** |
981 | * pci_intx - enables/disables PCI INTx for device dev | 986 | * pci_intx - enables/disables PCI INTx for device dev |