diff options
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r-- | drivers/pci/pci.c | 479 |
1 files changed, 350 insertions, 129 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 75c60239cadd..44a46c92b721 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -1,6 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * $Id: pci.c,v 1.91 1999/01/21 13:34:01 davem Exp $ | ||
3 | * | ||
4 | * PCI Bus Services, see include/linux/pci.h for further explanation. | 2 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
5 | * | 3 | * |
6 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, | 4 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, |
@@ -19,6 +17,7 @@ | |||
19 | #include <linux/string.h> | 17 | #include <linux/string.h> |
20 | #include <linux/log2.h> | 18 | #include <linux/log2.h> |
21 | #include <linux/pci-aspm.h> | 19 | #include <linux/pci-aspm.h> |
20 | #include <linux/pm_wakeup.h> | ||
22 | #include <asm/dma.h> /* isa_dma_bridge_buggy */ | 21 | #include <asm/dma.h> /* isa_dma_bridge_buggy */ |
23 | #include "pci.h" | 22 | #include "pci.h" |
24 | 23 | ||
@@ -378,74 +377,90 @@ pci_restore_bars(struct pci_dev *dev) | |||
378 | pci_update_resource(dev, &dev->resource[i], i); | 377 | pci_update_resource(dev, &dev->resource[i], i); |
379 | } | 378 | } |
380 | 379 | ||
381 | int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t t); | 380 | static struct pci_platform_pm_ops *pci_platform_pm; |
382 | 381 | ||
383 | /** | 382 | int pci_set_platform_pm(struct pci_platform_pm_ops *ops) |
384 | * pci_set_power_state - Set the power state of a PCI device | ||
385 | * @dev: PCI device to be suspended | ||
386 | * @state: PCI power state (D0, D1, D2, D3hot, D3cold) we're entering | ||
387 | * | ||
388 | * Transition a device to a new power state, using the Power Management | ||
389 | * Capabilities in the device's config space. | ||
390 | * | ||
391 | * RETURN VALUE: | ||
392 | * -EINVAL if trying to enter a lower state than we're already in. | ||
393 | * 0 if we're already in the requested state. | ||
394 | * -EIO if device does not support PCI PM. | ||
395 | * 0 if we can successfully change the power state. | ||
396 | */ | ||
397 | int | ||
398 | pci_set_power_state(struct pci_dev *dev, pci_power_t state) | ||
399 | { | 383 | { |
400 | int pm, need_restore = 0; | 384 | if (!ops->is_manageable || !ops->set_state || !ops->choose_state |
401 | u16 pmcsr, pmc; | 385 | || !ops->sleep_wake || !ops->can_wakeup) |
386 | return -EINVAL; | ||
387 | pci_platform_pm = ops; | ||
388 | return 0; | ||
389 | } | ||
402 | 390 | ||
403 | /* bound the state we're entering */ | 391 | static inline bool platform_pci_power_manageable(struct pci_dev *dev) |
404 | if (state > PCI_D3hot) | 392 | { |
405 | state = PCI_D3hot; | 393 | return pci_platform_pm ? pci_platform_pm->is_manageable(dev) : false; |
394 | } | ||
406 | 395 | ||
407 | /* | 396 | static inline int platform_pci_set_power_state(struct pci_dev *dev, |
408 | * If the device or the parent bridge can't support PCI PM, ignore | 397 | pci_power_t t) |
409 | * the request if we're doing anything besides putting it into D0 | 398 | { |
410 | * (which would only happen on boot). | 399 | return pci_platform_pm ? pci_platform_pm->set_state(dev, t) : -ENOSYS; |
411 | */ | 400 | } |
412 | if ((state == PCI_D1 || state == PCI_D2) && pci_no_d1d2(dev)) | ||
413 | return 0; | ||
414 | 401 | ||
415 | /* find PCI PM capability in list */ | 402 | static inline pci_power_t platform_pci_choose_state(struct pci_dev *dev) |
416 | pm = pci_find_capability(dev, PCI_CAP_ID_PM); | 403 | { |
404 | return pci_platform_pm ? | ||
405 | pci_platform_pm->choose_state(dev) : PCI_POWER_ERROR; | ||
406 | } | ||
417 | 407 | ||
418 | /* abort if the device doesn't support PM capabilities */ | 408 | static inline bool platform_pci_can_wakeup(struct pci_dev *dev) |
419 | if (!pm) | 409 | { |
410 | return pci_platform_pm ? pci_platform_pm->can_wakeup(dev) : false; | ||
411 | } | ||
412 | |||
413 | static inline int platform_pci_sleep_wake(struct pci_dev *dev, bool enable) | ||
414 | { | ||
415 | return pci_platform_pm ? | ||
416 | pci_platform_pm->sleep_wake(dev, enable) : -ENODEV; | ||
417 | } | ||
418 | |||
419 | /** | ||
420 | * pci_raw_set_power_state - Use PCI PM registers to set the power state of | ||
421 | * given PCI device | ||
422 | * @dev: PCI device to handle. | ||
423 | * @state: PCI power state (D0, D1, D2, D3hot) to put the device into. | ||
424 | * | ||
425 | * RETURN VALUE: | ||
426 | * -EINVAL if the requested state is invalid. | ||
427 | * -EIO if device does not support PCI PM or its PM capabilities register has a | ||
428 | * wrong version, or device doesn't support the requested state. | ||
429 | * 0 if device already is in the requested state. | ||
430 | * 0 if device's power state has been successfully changed. | ||
431 | */ | ||
432 | static int | ||
433 | pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state) | ||
434 | { | ||
435 | u16 pmcsr; | ||
436 | bool need_restore = false; | ||
437 | |||
438 | if (!dev->pm_cap) | ||
420 | return -EIO; | 439 | return -EIO; |
421 | 440 | ||
441 | if (state < PCI_D0 || state > PCI_D3hot) | ||
442 | return -EINVAL; | ||
443 | |||
422 | /* Validate current state: | 444 | /* Validate current state: |
423 | * Can enter D0 from any state, but if we can only go deeper | 445 | * Can enter D0 from any state, but if we can only go deeper |
424 | * to sleep if we're already in a low power state | 446 | * to sleep if we're already in a low power state |
425 | */ | 447 | */ |
426 | if (state != PCI_D0 && dev->current_state > state) { | 448 | if (dev->current_state == state) { |
427 | printk(KERN_ERR "%s(): %s: state=%d, current state=%d\n", | 449 | /* we're already there */ |
428 | __func__, pci_name(dev), state, dev->current_state); | 450 | return 0; |
451 | } else if (state != PCI_D0 && dev->current_state <= PCI_D3cold | ||
452 | && dev->current_state > state) { | ||
453 | dev_err(&dev->dev, "invalid power transition " | ||
454 | "(from state %d to %d)\n", dev->current_state, state); | ||
429 | return -EINVAL; | 455 | return -EINVAL; |
430 | } else if (dev->current_state == state) | ||
431 | return 0; /* we're already there */ | ||
432 | |||
433 | |||
434 | pci_read_config_word(dev,pm + PCI_PM_PMC,&pmc); | ||
435 | if ((pmc & PCI_PM_CAP_VER_MASK) > 3) { | ||
436 | printk(KERN_DEBUG | ||
437 | "PCI: %s has unsupported PM cap regs version (%u)\n", | ||
438 | pci_name(dev), pmc & PCI_PM_CAP_VER_MASK); | ||
439 | return -EIO; | ||
440 | } | 456 | } |
441 | 457 | ||
442 | /* check if this device supports the desired state */ | 458 | /* check if this device supports the desired state */ |
443 | if (state == PCI_D1 && !(pmc & PCI_PM_CAP_D1)) | 459 | if ((state == PCI_D1 && !dev->d1_support) |
444 | return -EIO; | 460 | || (state == PCI_D2 && !dev->d2_support)) |
445 | else if (state == PCI_D2 && !(pmc & PCI_PM_CAP_D2)) | ||
446 | return -EIO; | 461 | return -EIO; |
447 | 462 | ||
448 | pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr); | 463 | pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); |
449 | 464 | ||
450 | /* If we're (effectively) in D3, force entire word to 0. | 465 | /* If we're (effectively) in D3, force entire word to 0. |
451 | * This doesn't affect PME_Status, disables PME_En, and | 466 | * This doesn't affect PME_Status, disables PME_En, and |
@@ -461,7 +476,7 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state) | |||
461 | case PCI_UNKNOWN: /* Boot-up */ | 476 | case PCI_UNKNOWN: /* Boot-up */ |
462 | if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot | 477 | if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot |
463 | && !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET)) | 478 | && !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET)) |
464 | need_restore = 1; | 479 | need_restore = true; |
465 | /* Fall-through: force to D0 */ | 480 | /* Fall-through: force to D0 */ |
466 | default: | 481 | default: |
467 | pmcsr = 0; | 482 | pmcsr = 0; |
@@ -469,7 +484,7 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state) | |||
469 | } | 484 | } |
470 | 485 | ||
471 | /* enter specified state */ | 486 | /* enter specified state */ |
472 | pci_write_config_word(dev, pm + PCI_PM_CTRL, pmcsr); | 487 | pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr); |
473 | 488 | ||
474 | /* Mandatory power management transition delays */ | 489 | /* Mandatory power management transition delays */ |
475 | /* see PCI PM 1.1 5.6.1 table 18 */ | 490 | /* see PCI PM 1.1 5.6.1 table 18 */ |
@@ -478,13 +493,6 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state) | |||
478 | else if (state == PCI_D2 || dev->current_state == PCI_D2) | 493 | else if (state == PCI_D2 || dev->current_state == PCI_D2) |
479 | udelay(200); | 494 | udelay(200); |
480 | 495 | ||
481 | /* | ||
482 | * Give firmware a chance to be called, such as ACPI _PRx, _PSx | ||
483 | * Firmware method after native method ? | ||
484 | */ | ||
485 | if (platform_pci_set_power_state) | ||
486 | platform_pci_set_power_state(dev, state); | ||
487 | |||
488 | dev->current_state = state; | 496 | dev->current_state = state; |
489 | 497 | ||
490 | /* According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT | 498 | /* According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT |
@@ -508,8 +516,77 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state) | |||
508 | return 0; | 516 | return 0; |
509 | } | 517 | } |
510 | 518 | ||
511 | pci_power_t (*platform_pci_choose_state)(struct pci_dev *dev); | 519 | /** |
512 | 520 | * pci_update_current_state - Read PCI power state of given device from its | |
521 | * PCI PM registers and cache it | ||
522 | * @dev: PCI device to handle. | ||
523 | */ | ||
524 | static void pci_update_current_state(struct pci_dev *dev) | ||
525 | { | ||
526 | if (dev->pm_cap) { | ||
527 | u16 pmcsr; | ||
528 | |||
529 | pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); | ||
530 | dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); | ||
531 | } | ||
532 | } | ||
533 | |||
534 | /** | ||
535 | * pci_set_power_state - Set the power state of a PCI device | ||
536 | * @dev: PCI device to handle. | ||
537 | * @state: PCI power state (D0, D1, D2, D3hot) to put the device into. | ||
538 | * | ||
539 | * Transition a device to a new power state, using the platform formware and/or | ||
540 | * the device's PCI PM registers. | ||
541 | * | ||
542 | * RETURN VALUE: | ||
543 | * -EINVAL if the requested state is invalid. | ||
544 | * -EIO if device does not support PCI PM or its PM capabilities register has a | ||
545 | * wrong version, or device doesn't support the requested state. | ||
546 | * 0 if device already is in the requested state. | ||
547 | * 0 if device's power state has been successfully changed. | ||
548 | */ | ||
549 | int pci_set_power_state(struct pci_dev *dev, pci_power_t state) | ||
550 | { | ||
551 | int error; | ||
552 | |||
553 | /* bound the state we're entering */ | ||
554 | if (state > PCI_D3hot) | ||
555 | state = PCI_D3hot; | ||
556 | else if (state < PCI_D0) | ||
557 | state = PCI_D0; | ||
558 | else if ((state == PCI_D1 || state == PCI_D2) && pci_no_d1d2(dev)) | ||
559 | /* | ||
560 | * If the device or the parent bridge do not support PCI PM, | ||
561 | * ignore the request if we're doing anything other than putting | ||
562 | * it into D0 (which would only happen on boot). | ||
563 | */ | ||
564 | return 0; | ||
565 | |||
566 | if (state == PCI_D0 && platform_pci_power_manageable(dev)) { | ||
567 | /* | ||
568 | * Allow the platform to change the state, for example via ACPI | ||
569 | * _PR0, _PS0 and some such, but do not trust it. | ||
570 | */ | ||
571 | int ret = platform_pci_set_power_state(dev, PCI_D0); | ||
572 | if (!ret) | ||
573 | pci_update_current_state(dev); | ||
574 | } | ||
575 | |||
576 | error = pci_raw_set_power_state(dev, state); | ||
577 | |||
578 | if (state > PCI_D0 && platform_pci_power_manageable(dev)) { | ||
579 | /* Allow the platform to finalize the transition */ | ||
580 | int ret = platform_pci_set_power_state(dev, state); | ||
581 | if (!ret) { | ||
582 | pci_update_current_state(dev); | ||
583 | error = 0; | ||
584 | } | ||
585 | } | ||
586 | |||
587 | return error; | ||
588 | } | ||
589 | |||
513 | /** | 590 | /** |
514 | * pci_choose_state - Choose the power state of a PCI device | 591 | * pci_choose_state - Choose the power state of a PCI device |
515 | * @dev: PCI device to be suspended | 592 | * @dev: PCI device to be suspended |
@@ -527,11 +604,9 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) | |||
527 | if (!pci_find_capability(dev, PCI_CAP_ID_PM)) | 604 | if (!pci_find_capability(dev, PCI_CAP_ID_PM)) |
528 | return PCI_D0; | 605 | return PCI_D0; |
529 | 606 | ||
530 | if (platform_pci_choose_state) { | 607 | ret = platform_pci_choose_state(dev); |
531 | ret = platform_pci_choose_state(dev); | 608 | if (ret != PCI_POWER_ERROR) |
532 | if (ret != PCI_POWER_ERROR) | 609 | return ret; |
533 | return ret; | ||
534 | } | ||
535 | 610 | ||
536 | switch (state.event) { | 611 | switch (state.event) { |
537 | case PM_EVENT_ON: | 612 | case PM_EVENT_ON: |
@@ -543,7 +618,8 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) | |||
543 | case PM_EVENT_HIBERNATE: | 618 | case PM_EVENT_HIBERNATE: |
544 | return PCI_D3hot; | 619 | return PCI_D3hot; |
545 | default: | 620 | default: |
546 | printk("Unrecognized suspend event %d\n", state.event); | 621 | dev_info(&dev->dev, "unrecognized suspend event %d\n", |
622 | state.event); | ||
547 | BUG(); | 623 | BUG(); |
548 | } | 624 | } |
549 | return PCI_D0; | 625 | return PCI_D0; |
@@ -568,7 +644,7 @@ static int pci_save_pcie_state(struct pci_dev *dev) | |||
568 | else | 644 | else |
569 | found = 1; | 645 | found = 1; |
570 | if (!save_state) { | 646 | if (!save_state) { |
571 | dev_err(&dev->dev, "Out of memory in pci_save_pcie_state\n"); | 647 | dev_err(&dev->dev, "out of memory in pci_save_pcie_state\n"); |
572 | return -ENOMEM; | 648 | return -ENOMEM; |
573 | } | 649 | } |
574 | cap = (u16 *)&save_state->data[0]; | 650 | cap = (u16 *)&save_state->data[0]; |
@@ -619,7 +695,7 @@ static int pci_save_pcix_state(struct pci_dev *dev) | |||
619 | else | 695 | else |
620 | found = 1; | 696 | found = 1; |
621 | if (!save_state) { | 697 | if (!save_state) { |
622 | dev_err(&dev->dev, "Out of memory in pci_save_pcie_state\n"); | 698 | dev_err(&dev->dev, "out of memory in pci_save_pcie_state\n"); |
623 | return -ENOMEM; | 699 | return -ENOMEM; |
624 | } | 700 | } |
625 | cap = (u16 *)&save_state->data[0]; | 701 | cap = (u16 *)&save_state->data[0]; |
@@ -685,10 +761,9 @@ pci_restore_state(struct pci_dev *dev) | |||
685 | for (i = 15; i >= 0; i--) { | 761 | for (i = 15; i >= 0; i--) { |
686 | pci_read_config_dword(dev, i * 4, &val); | 762 | pci_read_config_dword(dev, i * 4, &val); |
687 | if (val != dev->saved_config_space[i]) { | 763 | if (val != dev->saved_config_space[i]) { |
688 | printk(KERN_DEBUG "PM: Writing back config space on " | 764 | dev_printk(KERN_DEBUG, &dev->dev, "restoring config " |
689 | "device %s at offset %x (was %x, writing %x)\n", | 765 | "space at offset %#x (was %#x, writing %#x)\n", |
690 | pci_name(dev), i, | 766 | i, val, (int)dev->saved_config_space[i]); |
691 | val, (int)dev->saved_config_space[i]); | ||
692 | pci_write_config_dword(dev,i * 4, | 767 | pci_write_config_dword(dev,i * 4, |
693 | dev->saved_config_space[i]); | 768 | dev->saved_config_space[i]); |
694 | } | 769 | } |
@@ -961,6 +1036,46 @@ int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state) | |||
961 | } | 1036 | } |
962 | 1037 | ||
963 | /** | 1038 | /** |
1039 | * pci_pme_capable - check the capability of PCI device to generate PME# | ||
1040 | * @dev: PCI device to handle. | ||
1041 | * @state: PCI state from which device will issue PME#. | ||
1042 | */ | ||
1043 | static bool pci_pme_capable(struct pci_dev *dev, pci_power_t state) | ||
1044 | { | ||
1045 | if (!dev->pm_cap) | ||
1046 | return false; | ||
1047 | |||
1048 | return !!(dev->pme_support & (1 << state)); | ||
1049 | } | ||
1050 | |||
1051 | /** | ||
1052 | * pci_pme_active - enable or disable PCI device's PME# function | ||
1053 | * @dev: PCI device to handle. | ||
1054 | * @enable: 'true' to enable PME# generation; 'false' to disable it. | ||
1055 | * | ||
1056 | * The caller must verify that the device is capable of generating PME# before | ||
1057 | * calling this function with @enable equal to 'true'. | ||
1058 | */ | ||
1059 | static void pci_pme_active(struct pci_dev *dev, bool enable) | ||
1060 | { | ||
1061 | u16 pmcsr; | ||
1062 | |||
1063 | if (!dev->pm_cap) | ||
1064 | return; | ||
1065 | |||
1066 | pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); | ||
1067 | /* Clear PME_Status by writing 1 to it and enable PME# */ | ||
1068 | pmcsr |= PCI_PM_CTRL_PME_STATUS | PCI_PM_CTRL_PME_ENABLE; | ||
1069 | if (!enable) | ||
1070 | pmcsr &= ~PCI_PM_CTRL_PME_ENABLE; | ||
1071 | |||
1072 | pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr); | ||
1073 | |||
1074 | dev_printk(KERN_INFO, &dev->dev, "PME# %s\n", | ||
1075 | enable ? "enabled" : "disabled"); | ||
1076 | } | ||
1077 | |||
1078 | /** | ||
964 | * pci_enable_wake - enable PCI device as wakeup event source | 1079 | * pci_enable_wake - enable PCI device as wakeup event source |
965 | * @dev: PCI device affected | 1080 | * @dev: PCI device affected |
966 | * @state: PCI state from which device will issue wakeup events | 1081 | * @state: PCI state from which device will issue wakeup events |
@@ -971,66 +1086,173 @@ int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state) | |||
971 | * called automatically by this routine. | 1086 | * called automatically by this routine. |
972 | * | 1087 | * |
973 | * Devices with legacy power management (no standard PCI PM capabilities) | 1088 | * Devices with legacy power management (no standard PCI PM capabilities) |
974 | * always require such platform hooks. Depending on the platform, devices | 1089 | * always require such platform hooks. |
975 | * supporting the standard PCI PME# signal may require such platform hooks; | ||
976 | * they always update bits in config space to allow PME# generation. | ||
977 | * | 1090 | * |
978 | * -EIO is returned if the device can't ever be a wakeup event source. | 1091 | * RETURN VALUE: |
979 | * -EINVAL is returned if the device can't generate wakeup events from | 1092 | * 0 is returned on success |
980 | * the specified PCI state. Returns zero if the operation is successful. | 1093 | * -EINVAL is returned if device is not supposed to wake up the system |
1094 | * Error code depending on the platform is returned if both the platform and | ||
1095 | * the native mechanism fail to enable the generation of wake-up events | ||
981 | */ | 1096 | */ |
982 | int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) | 1097 | int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) |
983 | { | 1098 | { |
984 | int pm; | 1099 | int error = 0; |
985 | int status; | 1100 | bool pme_done = false; |
986 | u16 value; | 1101 | |
987 | 1102 | if (!device_may_wakeup(&dev->dev)) | |
988 | /* Note that drivers should verify device_may_wakeup(&dev->dev) | 1103 | return -EINVAL; |
989 | * before calling this function. Platform code should report | 1104 | |
990 | * errors when drivers try to enable wakeup on devices that | 1105 | /* |
991 | * can't issue wakeups, or on which wakeups were disabled by | 1106 | * According to "PCI System Architecture" 4th ed. by Tom Shanley & Don |
992 | * userspace updating the /sys/devices.../power/wakeup file. | 1107 | * Anderson we should be doing PME# wake enable followed by ACPI wake |
1108 | * enable. To disable wake-up we call the platform first, for symmetry. | ||
993 | */ | 1109 | */ |
994 | 1110 | ||
995 | status = call_platform_enable_wakeup(&dev->dev, enable); | 1111 | if (!enable && platform_pci_can_wakeup(dev)) |
1112 | error = platform_pci_sleep_wake(dev, false); | ||
996 | 1113 | ||
997 | /* find PCI PM capability in list */ | 1114 | if (!enable || pci_pme_capable(dev, state)) { |
998 | pm = pci_find_capability(dev, PCI_CAP_ID_PM); | 1115 | pci_pme_active(dev, enable); |
1116 | pme_done = true; | ||
1117 | } | ||
999 | 1118 | ||
1000 | /* If device doesn't support PM Capabilities, but caller wants to | 1119 | if (enable && platform_pci_can_wakeup(dev)) |
1001 | * disable wake events, it's a NOP. Otherwise fail unless the | 1120 | error = platform_pci_sleep_wake(dev, true); |
1002 | * platform hooks handled this legacy device already. | ||
1003 | */ | ||
1004 | if (!pm) | ||
1005 | return enable ? status : 0; | ||
1006 | 1121 | ||
1007 | /* Check device's ability to generate PME# */ | 1122 | return pme_done ? 0 : error; |
1008 | pci_read_config_word(dev,pm+PCI_PM_PMC,&value); | 1123 | } |
1009 | 1124 | ||
1010 | value &= PCI_PM_CAP_PME_MASK; | 1125 | /** |
1011 | value >>= ffs(PCI_PM_CAP_PME_MASK) - 1; /* First bit of mask */ | 1126 | * pci_prepare_to_sleep - prepare PCI device for system-wide transition into |
1127 | * a sleep state | ||
1128 | * @dev: Device to handle. | ||
1129 | * | ||
1130 | * Choose the power state appropriate for the device depending on whether | ||
1131 | * it can wake up the system and/or is power manageable by the platform | ||
1132 | * (PCI_D3hot is the default) and put the device into that state. | ||
1133 | */ | ||
1134 | int pci_prepare_to_sleep(struct pci_dev *dev) | ||
1135 | { | ||
1136 | pci_power_t target_state = PCI_D3hot; | ||
1137 | int error; | ||
1012 | 1138 | ||
1013 | /* Check if it can generate PME# from requested state. */ | 1139 | if (platform_pci_power_manageable(dev)) { |
1014 | if (!value || !(value & (1 << state))) { | 1140 | /* |
1015 | /* if it can't, revert what the platform hook changed, | 1141 | * Call the platform to choose the target state of the device |
1016 | * always reporting the base "EINVAL, can't PME#" error | 1142 | * and enable wake-up from this state if supported. |
1017 | */ | 1143 | */ |
1018 | if (enable) | 1144 | pci_power_t state = platform_pci_choose_state(dev); |
1019 | call_platform_enable_wakeup(&dev->dev, 0); | 1145 | |
1020 | return enable ? -EINVAL : 0; | 1146 | switch (state) { |
1147 | case PCI_POWER_ERROR: | ||
1148 | case PCI_UNKNOWN: | ||
1149 | break; | ||
1150 | case PCI_D1: | ||
1151 | case PCI_D2: | ||
1152 | if (pci_no_d1d2(dev)) | ||
1153 | break; | ||
1154 | default: | ||
1155 | target_state = state; | ||
1156 | } | ||
1157 | } else if (device_may_wakeup(&dev->dev)) { | ||
1158 | /* | ||
1159 | * Find the deepest state from which the device can generate | ||
1160 | * wake-up events, make it the target state and enable device | ||
1161 | * to generate PME#. | ||
1162 | */ | ||
1163 | if (!dev->pm_cap) | ||
1164 | return -EIO; | ||
1165 | |||
1166 | if (dev->pme_support) { | ||
1167 | while (target_state | ||
1168 | && !(dev->pme_support & (1 << target_state))) | ||
1169 | target_state--; | ||
1170 | } | ||
1021 | } | 1171 | } |
1022 | 1172 | ||
1023 | pci_read_config_word(dev, pm + PCI_PM_CTRL, &value); | 1173 | pci_enable_wake(dev, target_state, true); |
1024 | 1174 | ||
1025 | /* Clear PME_Status by writing 1 to it and enable PME# */ | 1175 | error = pci_set_power_state(dev, target_state); |
1026 | value |= PCI_PM_CTRL_PME_STATUS | PCI_PM_CTRL_PME_ENABLE; | ||
1027 | 1176 | ||
1028 | if (!enable) | 1177 | if (error) |
1029 | value &= ~PCI_PM_CTRL_PME_ENABLE; | 1178 | pci_enable_wake(dev, target_state, false); |
1030 | 1179 | ||
1031 | pci_write_config_word(dev, pm + PCI_PM_CTRL, value); | 1180 | return error; |
1181 | } | ||
1032 | 1182 | ||
1033 | return 0; | 1183 | /** |
1184 | * pci_back_from_sleep - turn PCI device on during system-wide transition into | ||
1185 | * the working state a sleep state | ||
1186 | * @dev: Device to handle. | ||
1187 | * | ||
1188 | * Disable device's sytem wake-up capability and put it into D0. | ||
1189 | */ | ||
1190 | int pci_back_from_sleep(struct pci_dev *dev) | ||
1191 | { | ||
1192 | pci_enable_wake(dev, PCI_D0, false); | ||
1193 | return pci_set_power_state(dev, PCI_D0); | ||
1194 | } | ||
1195 | |||
1196 | /** | ||
1197 | * pci_pm_init - Initialize PM functions of given PCI device | ||
1198 | * @dev: PCI device to handle. | ||
1199 | */ | ||
1200 | void pci_pm_init(struct pci_dev *dev) | ||
1201 | { | ||
1202 | int pm; | ||
1203 | u16 pmc; | ||
1204 | |||
1205 | dev->pm_cap = 0; | ||
1206 | |||
1207 | /* find PCI PM capability in list */ | ||
1208 | pm = pci_find_capability(dev, PCI_CAP_ID_PM); | ||
1209 | if (!pm) | ||
1210 | return; | ||
1211 | /* Check device's ability to generate PME# */ | ||
1212 | pci_read_config_word(dev, pm + PCI_PM_PMC, &pmc); | ||
1213 | |||
1214 | if ((pmc & PCI_PM_CAP_VER_MASK) > 3) { | ||
1215 | dev_err(&dev->dev, "unsupported PM cap regs version (%u)\n", | ||
1216 | pmc & PCI_PM_CAP_VER_MASK); | ||
1217 | return; | ||
1218 | } | ||
1219 | |||
1220 | dev->pm_cap = pm; | ||
1221 | |||
1222 | dev->d1_support = false; | ||
1223 | dev->d2_support = false; | ||
1224 | if (!pci_no_d1d2(dev)) { | ||
1225 | if (pmc & PCI_PM_CAP_D1) { | ||
1226 | dev_printk(KERN_DEBUG, &dev->dev, "supports D1\n"); | ||
1227 | dev->d1_support = true; | ||
1228 | } | ||
1229 | if (pmc & PCI_PM_CAP_D2) { | ||
1230 | dev_printk(KERN_DEBUG, &dev->dev, "supports D2\n"); | ||
1231 | dev->d2_support = true; | ||
1232 | } | ||
1233 | } | ||
1234 | |||
1235 | pmc &= PCI_PM_CAP_PME_MASK; | ||
1236 | if (pmc) { | ||
1237 | dev_printk(KERN_INFO, &dev->dev, | ||
1238 | "PME# supported from%s%s%s%s%s\n", | ||
1239 | (pmc & PCI_PM_CAP_PME_D0) ? " D0" : "", | ||
1240 | (pmc & PCI_PM_CAP_PME_D1) ? " D1" : "", | ||
1241 | (pmc & PCI_PM_CAP_PME_D2) ? " D2" : "", | ||
1242 | (pmc & PCI_PM_CAP_PME_D3) ? " D3hot" : "", | ||
1243 | (pmc & PCI_PM_CAP_PME_D3cold) ? " D3cold" : ""); | ||
1244 | dev->pme_support = pmc >> PCI_PM_CAP_PME_SHIFT; | ||
1245 | /* | ||
1246 | * Make device's PM flags reflect the wake-up capability, but | ||
1247 | * let the user space enable it to wake up the system as needed. | ||
1248 | */ | ||
1249 | device_set_wakeup_capable(&dev->dev, true); | ||
1250 | device_set_wakeup_enable(&dev->dev, false); | ||
1251 | /* Disable the PME# generation functionality */ | ||
1252 | pci_pme_active(dev, false); | ||
1253 | } else { | ||
1254 | dev->pme_support = 0; | ||
1255 | } | ||
1034 | } | 1256 | } |
1035 | 1257 | ||
1036 | int | 1258 | int |
@@ -1116,13 +1338,11 @@ int pci_request_region(struct pci_dev *pdev, int bar, const char *res_name) | |||
1116 | return 0; | 1338 | return 0; |
1117 | 1339 | ||
1118 | err_out: | 1340 | err_out: |
1119 | printk (KERN_WARNING "PCI: Unable to reserve %s region #%d:%llx@%llx " | 1341 | dev_warn(&pdev->dev, "BAR %d: can't reserve %s region [%#llx-%#llx]\n", |
1120 | "for device %s\n", | 1342 | bar, |
1121 | pci_resource_flags(pdev, bar) & IORESOURCE_IO ? "I/O" : "mem", | 1343 | pci_resource_flags(pdev, bar) & IORESOURCE_IO ? "I/O" : "mem", |
1122 | bar + 1, /* PCI BAR # */ | 1344 | (unsigned long long)pci_resource_start(pdev, bar), |
1123 | (unsigned long long)pci_resource_len(pdev, bar), | 1345 | (unsigned long long)pci_resource_end(pdev, bar)); |
1124 | (unsigned long long)pci_resource_start(pdev, bar), | ||
1125 | pci_name(pdev)); | ||
1126 | return -EBUSY; | 1346 | return -EBUSY; |
1127 | } | 1347 | } |
1128 | 1348 | ||
@@ -1214,7 +1434,7 @@ pci_set_master(struct pci_dev *dev) | |||
1214 | 1434 | ||
1215 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | 1435 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
1216 | if (! (cmd & PCI_COMMAND_MASTER)) { | 1436 | if (! (cmd & PCI_COMMAND_MASTER)) { |
1217 | pr_debug("PCI: Enabling bus mastering for device %s\n", pci_name(dev)); | 1437 | dev_dbg(&dev->dev, "enabling bus mastering\n"); |
1218 | cmd |= PCI_COMMAND_MASTER; | 1438 | cmd |= PCI_COMMAND_MASTER; |
1219 | pci_write_config_word(dev, PCI_COMMAND, cmd); | 1439 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
1220 | } | 1440 | } |
@@ -1279,8 +1499,8 @@ pci_set_cacheline_size(struct pci_dev *dev) | |||
1279 | if (cacheline_size == pci_cache_line_size) | 1499 | if (cacheline_size == pci_cache_line_size) |
1280 | return 0; | 1500 | return 0; |
1281 | 1501 | ||
1282 | printk(KERN_DEBUG "PCI: cache line size of %d is not supported " | 1502 | dev_printk(KERN_DEBUG, &dev->dev, "cache line size of %d is not " |
1283 | "by device %s\n", pci_cache_line_size << 2, pci_name(dev)); | 1503 | "supported\n", pci_cache_line_size << 2); |
1284 | 1504 | ||
1285 | return -EINVAL; | 1505 | return -EINVAL; |
1286 | } | 1506 | } |
@@ -1305,8 +1525,7 @@ pci_set_mwi(struct pci_dev *dev) | |||
1305 | 1525 | ||
1306 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | 1526 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
1307 | if (! (cmd & PCI_COMMAND_INVALIDATE)) { | 1527 | if (! (cmd & PCI_COMMAND_INVALIDATE)) { |
1308 | pr_debug("PCI: Enabling Mem-Wr-Inval for device %s\n", | 1528 | dev_dbg(&dev->dev, "enabling Mem-Wr-Inval\n"); |
1309 | pci_name(dev)); | ||
1310 | cmd |= PCI_COMMAND_INVALIDATE; | 1529 | cmd |= PCI_COMMAND_INVALIDATE; |
1311 | pci_write_config_word(dev, PCI_COMMAND, cmd); | 1530 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
1312 | } | 1531 | } |
@@ -1702,5 +1921,7 @@ EXPORT_SYMBOL(pci_set_power_state); | |||
1702 | EXPORT_SYMBOL(pci_save_state); | 1921 | EXPORT_SYMBOL(pci_save_state); |
1703 | EXPORT_SYMBOL(pci_restore_state); | 1922 | EXPORT_SYMBOL(pci_restore_state); |
1704 | EXPORT_SYMBOL(pci_enable_wake); | 1923 | EXPORT_SYMBOL(pci_enable_wake); |
1924 | EXPORT_SYMBOL(pci_prepare_to_sleep); | ||
1925 | EXPORT_SYMBOL(pci_back_from_sleep); | ||
1705 | EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state); | 1926 | EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state); |
1706 | 1927 | ||