diff options
Diffstat (limited to 'drivers/pci/pci.c')
| -rw-r--r-- | drivers/pci/pci.c | 34 |
1 files changed, 27 insertions, 7 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 0bc27e059019..315fea47e784 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
| @@ -29,7 +29,17 @@ const char *pci_power_names[] = { | |||
| 29 | }; | 29 | }; |
| 30 | EXPORT_SYMBOL_GPL(pci_power_names); | 30 | EXPORT_SYMBOL_GPL(pci_power_names); |
| 31 | 31 | ||
| 32 | unsigned int pci_pm_d3_delay = PCI_PM_D3_WAIT; | 32 | unsigned int pci_pm_d3_delay; |
| 33 | |||
| 34 | static void pci_dev_d3_sleep(struct pci_dev *dev) | ||
| 35 | { | ||
| 36 | unsigned int delay = dev->d3_delay; | ||
| 37 | |||
| 38 | if (delay < pci_pm_d3_delay) | ||
| 39 | delay = pci_pm_d3_delay; | ||
| 40 | |||
| 41 | msleep(delay); | ||
| 42 | } | ||
| 33 | 43 | ||
| 34 | #ifdef CONFIG_PCI_DOMAINS | 44 | #ifdef CONFIG_PCI_DOMAINS |
| 35 | int pci_domains_supported = 1; | 45 | int pci_domains_supported = 1; |
| @@ -522,7 +532,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state) | |||
| 522 | /* Mandatory power management transition delays */ | 532 | /* Mandatory power management transition delays */ |
| 523 | /* see PCI PM 1.1 5.6.1 table 18 */ | 533 | /* see PCI PM 1.1 5.6.1 table 18 */ |
| 524 | if (state == PCI_D3hot || dev->current_state == PCI_D3hot) | 534 | if (state == PCI_D3hot || dev->current_state == PCI_D3hot) |
| 525 | msleep(pci_pm_d3_delay); | 535 | pci_dev_d3_sleep(dev); |
| 526 | else if (state == PCI_D2 || dev->current_state == PCI_D2) | 536 | else if (state == PCI_D2 || dev->current_state == PCI_D2) |
| 527 | udelay(PCI_PM_D2_DELAY); | 537 | udelay(PCI_PM_D2_DELAY); |
| 528 | 538 | ||
| @@ -1153,11 +1163,11 @@ pci_disable_device(struct pci_dev *dev) | |||
| 1153 | 1163 | ||
| 1154 | /** | 1164 | /** |
| 1155 | * pcibios_set_pcie_reset_state - set reset state for device dev | 1165 | * pcibios_set_pcie_reset_state - set reset state for device dev |
| 1156 | * @dev: the PCI-E device reset | 1166 | * @dev: the PCIe device reset |
| 1157 | * @state: Reset state to enter into | 1167 | * @state: Reset state to enter into |
| 1158 | * | 1168 | * |
| 1159 | * | 1169 | * |
| 1160 | * Sets the PCI-E reset state for the device. This is the default | 1170 | * Sets the PCIe reset state for the device. This is the default |
| 1161 | * implementation. Architecture implementations can override this. | 1171 | * implementation. Architecture implementations can override this. |
| 1162 | */ | 1172 | */ |
| 1163 | int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev, | 1173 | int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev, |
| @@ -1168,7 +1178,7 @@ int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev, | |||
| 1168 | 1178 | ||
| 1169 | /** | 1179 | /** |
| 1170 | * pci_set_pcie_reset_state - set reset state for device dev | 1180 | * pci_set_pcie_reset_state - set reset state for device dev |
| 1171 | * @dev: the PCI-E device reset | 1181 | * @dev: the PCIe device reset |
| 1172 | * @state: Reset state to enter into | 1182 | * @state: Reset state to enter into |
| 1173 | * | 1183 | * |
| 1174 | * | 1184 | * |
| @@ -1409,6 +1419,7 @@ void pci_pm_init(struct pci_dev *dev) | |||
| 1409 | } | 1419 | } |
| 1410 | 1420 | ||
| 1411 | dev->pm_cap = pm; | 1421 | dev->pm_cap = pm; |
| 1422 | dev->d3_delay = PCI_PM_D3_WAIT; | ||
| 1412 | 1423 | ||
| 1413 | dev->d1_support = false; | 1424 | dev->d1_support = false; |
| 1414 | dev->d2_support = false; | 1425 | dev->d2_support = false; |
| @@ -2247,12 +2258,12 @@ static int pci_pm_reset(struct pci_dev *dev, int probe) | |||
| 2247 | csr &= ~PCI_PM_CTRL_STATE_MASK; | 2258 | csr &= ~PCI_PM_CTRL_STATE_MASK; |
| 2248 | csr |= PCI_D3hot; | 2259 | csr |= PCI_D3hot; |
| 2249 | pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); | 2260 | pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); |
| 2250 | msleep(pci_pm_d3_delay); | 2261 | pci_dev_d3_sleep(dev); |
| 2251 | 2262 | ||
| 2252 | csr &= ~PCI_PM_CTRL_STATE_MASK; | 2263 | csr &= ~PCI_PM_CTRL_STATE_MASK; |
| 2253 | csr |= PCI_D0; | 2264 | csr |= PCI_D0; |
| 2254 | pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); | 2265 | pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); |
| 2255 | msleep(pci_pm_d3_delay); | 2266 | pci_dev_d3_sleep(dev); |
| 2256 | 2267 | ||
| 2257 | return 0; | 2268 | return 0; |
| 2258 | } | 2269 | } |
| @@ -2296,6 +2307,10 @@ static int pci_dev_reset(struct pci_dev *dev, int probe) | |||
| 2296 | down(&dev->dev.sem); | 2307 | down(&dev->dev.sem); |
| 2297 | } | 2308 | } |
| 2298 | 2309 | ||
| 2310 | rc = pci_dev_specific_reset(dev, probe); | ||
| 2311 | if (rc != -ENOTTY) | ||
| 2312 | goto done; | ||
| 2313 | |||
| 2299 | rc = pcie_flr(dev, probe); | 2314 | rc = pcie_flr(dev, probe); |
| 2300 | if (rc != -ENOTTY) | 2315 | if (rc != -ENOTTY) |
| 2301 | goto done; | 2316 | goto done; |
| @@ -2779,6 +2794,11 @@ int __attribute__ ((weak)) pci_ext_cfg_avail(struct pci_dev *dev) | |||
| 2779 | return 1; | 2794 | return 1; |
| 2780 | } | 2795 | } |
| 2781 | 2796 | ||
| 2797 | void __weak pci_fixup_cardbus(struct pci_bus *bus) | ||
| 2798 | { | ||
| 2799 | } | ||
| 2800 | EXPORT_SYMBOL(pci_fixup_cardbus); | ||
| 2801 | |||
| 2782 | static int __init pci_setup(char *str) | 2802 | static int __init pci_setup(char *str) |
| 2783 | { | 2803 | { |
| 2784 | while (str) { | 2804 | while (str) { |
