aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pci/pci.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r--drivers/pci/pci.c40
1 files changed, 18 insertions, 22 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 7869f8f75c9e..8b755a7fb4ef 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -422,8 +422,8 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
422 * to sleep if we're already in a low power state 422 * to sleep if we're already in a low power state
423 */ 423 */
424 if (state != PCI_D0 && dev->current_state > state) { 424 if (state != PCI_D0 && dev->current_state > state) {
425 printk(KERN_ERR "%s(): %s: state=%d, current state=%d\n", 425 dev_err(&dev->dev, "invalid power transition "
426 __func__, pci_name(dev), state, dev->current_state); 426 "(from state %d to %d)\n", dev->current_state, state);
427 return -EINVAL; 427 return -EINVAL;
428 } else if (dev->current_state == state) 428 } else if (dev->current_state == state)
429 return 0; /* we're already there */ 429 return 0; /* we're already there */
@@ -431,9 +431,8 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
431 431
432 pci_read_config_word(dev,pm + PCI_PM_PMC,&pmc); 432 pci_read_config_word(dev,pm + PCI_PM_PMC,&pmc);
433 if ((pmc & PCI_PM_CAP_VER_MASK) > 3) { 433 if ((pmc & PCI_PM_CAP_VER_MASK) > 3) {
434 printk(KERN_DEBUG 434 dev_printk(KERN_DEBUG, &dev->dev, "unsupported PM cap regs "
435 "PCI: %s has unsupported PM cap regs version (%u)\n", 435 "version (%u)\n", pmc & PCI_PM_CAP_VER_MASK);
436 pci_name(dev), pmc & PCI_PM_CAP_VER_MASK);
437 return -EIO; 436 return -EIO;
438 } 437 }
439 438
@@ -541,7 +540,8 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state)
541 case PM_EVENT_HIBERNATE: 540 case PM_EVENT_HIBERNATE:
542 return PCI_D3hot; 541 return PCI_D3hot;
543 default: 542 default:
544 printk("Unrecognized suspend event %d\n", state.event); 543 dev_info(&dev->dev, "unrecognized suspend event %d\n",
544 state.event);
545 BUG(); 545 BUG();
546 } 546 }
547 return PCI_D0; 547 return PCI_D0;
@@ -566,7 +566,7 @@ static int pci_save_pcie_state(struct pci_dev *dev)
566 else 566 else
567 found = 1; 567 found = 1;
568 if (!save_state) { 568 if (!save_state) {
569 dev_err(&dev->dev, "Out of memory in pci_save_pcie_state\n"); 569 dev_err(&dev->dev, "out of memory in pci_save_pcie_state\n");
570 return -ENOMEM; 570 return -ENOMEM;
571 } 571 }
572 cap = (u16 *)&save_state->data[0]; 572 cap = (u16 *)&save_state->data[0];
@@ -617,7 +617,7 @@ static int pci_save_pcix_state(struct pci_dev *dev)
617 else 617 else
618 found = 1; 618 found = 1;
619 if (!save_state) { 619 if (!save_state) {
620 dev_err(&dev->dev, "Out of memory in pci_save_pcie_state\n"); 620 dev_err(&dev->dev, "out of memory in pci_save_pcie_state\n");
621 return -ENOMEM; 621 return -ENOMEM;
622 } 622 }
623 cap = (u16 *)&save_state->data[0]; 623 cap = (u16 *)&save_state->data[0];
@@ -683,10 +683,9 @@ pci_restore_state(struct pci_dev *dev)
683 for (i = 15; i >= 0; i--) { 683 for (i = 15; i >= 0; i--) {
684 pci_read_config_dword(dev, i * 4, &val); 684 pci_read_config_dword(dev, i * 4, &val);
685 if (val != dev->saved_config_space[i]) { 685 if (val != dev->saved_config_space[i]) {
686 printk(KERN_DEBUG "PM: Writing back config space on " 686 dev_printk(KERN_DEBUG, &dev->dev, "restoring config "
687 "device %s at offset %x (was %x, writing %x)\n", 687 "space at offset %#x (was %#x, writing %#x)\n",
688 pci_name(dev), i, 688 i, val, (int)dev->saved_config_space[i]);
689 val, (int)dev->saved_config_space[i]);
690 pci_write_config_dword(dev,i * 4, 689 pci_write_config_dword(dev,i * 4,
691 dev->saved_config_space[i]); 690 dev->saved_config_space[i]);
692 } 691 }
@@ -1114,13 +1113,11 @@ int pci_request_region(struct pci_dev *pdev, int bar, const char *res_name)
1114 return 0; 1113 return 0;
1115 1114
1116err_out: 1115err_out:
1117 printk (KERN_WARNING "PCI: Unable to reserve %s region #%d:%llx@%llx " 1116 dev_warn(&pdev->dev, "BAR %d: can't reserve %s region [%#llx-%#llx]\n",
1118 "for device %s\n",
1119 pci_resource_flags(pdev, bar) & IORESOURCE_IO ? "I/O" : "mem",
1120 bar + 1, /* PCI BAR # */ 1117 bar + 1, /* PCI BAR # */
1121 (unsigned long long)pci_resource_len(pdev, bar), 1118 pci_resource_flags(pdev, bar) & IORESOURCE_IO ? "I/O" : "mem",
1122 (unsigned long long)pci_resource_start(pdev, bar), 1119 (unsigned long long)pci_resource_start(pdev, bar),
1123 pci_name(pdev)); 1120 (unsigned long long)pci_resource_end(pdev, bar));
1124 return -EBUSY; 1121 return -EBUSY;
1125} 1122}
1126 1123
@@ -1212,7 +1209,7 @@ pci_set_master(struct pci_dev *dev)
1212 1209
1213 pci_read_config_word(dev, PCI_COMMAND, &cmd); 1210 pci_read_config_word(dev, PCI_COMMAND, &cmd);
1214 if (! (cmd & PCI_COMMAND_MASTER)) { 1211 if (! (cmd & PCI_COMMAND_MASTER)) {
1215 pr_debug("PCI: Enabling bus mastering for device %s\n", pci_name(dev)); 1212 dev_dbg(&dev->dev, "enabling bus mastering\n");
1216 cmd |= PCI_COMMAND_MASTER; 1213 cmd |= PCI_COMMAND_MASTER;
1217 pci_write_config_word(dev, PCI_COMMAND, cmd); 1214 pci_write_config_word(dev, PCI_COMMAND, cmd);
1218 } 1215 }
@@ -1277,8 +1274,8 @@ pci_set_cacheline_size(struct pci_dev *dev)
1277 if (cacheline_size == pci_cache_line_size) 1274 if (cacheline_size == pci_cache_line_size)
1278 return 0; 1275 return 0;
1279 1276
1280 printk(KERN_DEBUG "PCI: cache line size of %d is not supported " 1277 dev_printk(KERN_DEBUG, &dev->dev, "cache line size of %d is not "
1281 "by device %s\n", pci_cache_line_size << 2, pci_name(dev)); 1278 "supported\n", pci_cache_line_size << 2);
1282 1279
1283 return -EINVAL; 1280 return -EINVAL;
1284} 1281}
@@ -1303,8 +1300,7 @@ pci_set_mwi(struct pci_dev *dev)
1303 1300
1304 pci_read_config_word(dev, PCI_COMMAND, &cmd); 1301 pci_read_config_word(dev, PCI_COMMAND, &cmd);
1305 if (! (cmd & PCI_COMMAND_INVALIDATE)) { 1302 if (! (cmd & PCI_COMMAND_INVALIDATE)) {
1306 pr_debug("PCI: Enabling Mem-Wr-Inval for device %s\n", 1303 dev_dbg(&dev->dev, "enabling Mem-Wr-Inval\n");
1307 pci_name(dev));
1308 cmd |= PCI_COMMAND_INVALIDATE; 1304 cmd |= PCI_COMMAND_INVALIDATE;
1309 pci_write_config_word(dev, PCI_COMMAND, cmd); 1305 pci_write_config_word(dev, PCI_COMMAND, cmd);
1310 } 1306 }