diff options
Diffstat (limited to 'drivers/pci/intr_remapping.c')
-rw-r--r-- | drivers/pci/intr_remapping.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c index 3a0cb0bb0593..1e83c8c5f985 100644 --- a/drivers/pci/intr_remapping.c +++ b/drivers/pci/intr_remapping.c | |||
@@ -409,7 +409,7 @@ int free_irte(int irq) | |||
409 | static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode) | 409 | static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode) |
410 | { | 410 | { |
411 | u64 addr; | 411 | u64 addr; |
412 | u32 cmd, sts; | 412 | u32 sts; |
413 | unsigned long flags; | 413 | unsigned long flags; |
414 | 414 | ||
415 | addr = virt_to_phys((void *)iommu->ir_table->base); | 415 | addr = virt_to_phys((void *)iommu->ir_table->base); |
@@ -420,9 +420,8 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode) | |||
420 | (addr) | IR_X2APIC_MODE(mode) | INTR_REMAP_TABLE_REG_SIZE); | 420 | (addr) | IR_X2APIC_MODE(mode) | INTR_REMAP_TABLE_REG_SIZE); |
421 | 421 | ||
422 | /* Set interrupt-remapping table pointer */ | 422 | /* Set interrupt-remapping table pointer */ |
423 | cmd = iommu->gcmd | DMA_GCMD_SIRTP; | ||
424 | iommu->gcmd |= DMA_GCMD_SIRTP; | 423 | iommu->gcmd |= DMA_GCMD_SIRTP; |
425 | writel(cmd, iommu->reg + DMAR_GCMD_REG); | 424 | writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG); |
426 | 425 | ||
427 | IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, | 426 | IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, |
428 | readl, (sts & DMA_GSTS_IRTPS), sts); | 427 | readl, (sts & DMA_GSTS_IRTPS), sts); |
@@ -437,9 +436,8 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode) | |||
437 | spin_lock_irqsave(&iommu->register_lock, flags); | 436 | spin_lock_irqsave(&iommu->register_lock, flags); |
438 | 437 | ||
439 | /* Enable interrupt-remapping */ | 438 | /* Enable interrupt-remapping */ |
440 | cmd = iommu->gcmd | DMA_GCMD_IRE; | ||
441 | iommu->gcmd |= DMA_GCMD_IRE; | 439 | iommu->gcmd |= DMA_GCMD_IRE; |
442 | writel(cmd, iommu->reg + DMAR_GCMD_REG); | 440 | writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG); |
443 | 441 | ||
444 | IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, | 442 | IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, |
445 | readl, (sts & DMA_GSTS_IRES), sts); | 443 | readl, (sts & DMA_GSTS_IRES), sts); |