1 files changed, 5 insertions, 103 deletions
diff --git a/drivers/pci/hotplug/shpchprm_nonacpi.c b/drivers/pci/hotplug/shpchprm_nonacpi.c
index 9d4ccae5f78e..f36c188c23eb 100644
--- a/drivers/pci/hotplug/shpchprm_nonacpi.c
+++ b/drivers/pci/hotplug/shpchprm_nonacpi.c
@@ -37,11 +37,6 @@
 #include "shpchp.h"
 #include "shpchprm.h"
-void shpchprm_cleanup(void)
-{
-        return;
-}
 int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
 {
        int     offset = devnum - ctrl->slot_device_offset;
@@ -51,106 +46,13 @@ int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busn
        return 0;
 }
-int shpchprm_set_hpp(
+void get_hp_params_from_firmware(struct pci_dev *dev,
-        struct controller *ctrl,
+                struct hotplug_params *hpp)
-        struct pci_func *func,
-        u8      card_type)
-{
-        u32 rc;
-        u8 temp_byte;
-        struct pci_bus lpci_bus, *pci_bus;
-        unsigned int    devfn;
-        memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
-        pci_bus = &lpci_bus;
-        pci_bus->number = func->bus;
-        devfn = PCI_DEVFN(func->device, func->function);
-        temp_byte = 0x40;       /* hard coded value for LT */
-        if (card_type == PCI_HEADER_TYPE_BRIDGE) {
-                /* set subordinate Latency Timer */
-                rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
-                if (rc) {
-                        dbg("%s: set secondary LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, 
-                                func->device, func->function);
-                        return rc;
-                }
-        }
-        /* set base Latency Timer */
-        rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
-        if (rc) {
-                dbg("%s: set LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
-                return rc;
-        }
-        /* set Cache Line size */
-        temp_byte = 0x08;       /* hard coded value for CLS */
-        rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
-        if (rc) {
-                dbg("%s: set CLS error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
-        }
-        /* set enable_perr */
-        /* set enable_serr */
-        return rc;
-}
-void shpchprm_enable_card(
-        struct controller *ctrl,
-        struct pci_func *func,
-        u8 card_type)
 {
-        u16 command, bcommand;
+        return;
-        struct pci_bus lpci_bus, *pci_bus;
-        unsigned int devfn;
-        int rc;
-        memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
-        pci_bus = &lpci_bus;
-        pci_bus->number = func->bus;
-        devfn = PCI_DEVFN(func->device, func->function);
-        rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
-        command |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR
-                | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
-                | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
-        rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
-        if (card_type == PCI_HEADER_TYPE_BRIDGE) {
-                rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
-                bcommand |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR
-                        | PCI_BRIDGE_CTL_NO_ISA;
-                rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
-        }
-}
-static int legacy_shpchprm_init_pci(void)
-{
-        return 0;
 }
-int shpchprm_init(enum php_ctlr_type ctrl_type)
+void get_hp_hw_control_from_firmware(struct pci_dev *dev)
 {
-        int retval;
+        return;
-        switch (ctrl_type) {
-        case PCI:
-                retval = legacy_shpchprm_init_pci();
-                break;
-        default:
-                retval = -ENODEV;
-                break;
-        }
-        return retval;
 }

diff --git a/drivers/pci/hotplug/shpchprm_nonacpi.c b/drivers/pci/hotplug/shpchprm_nonacpi.c index 9d4ccae5f78e..f36c188c23eb 100644 --- a/drivers/pci/hotplug/shpchprm_nonacpi.c +++ b/drivers/pci/hotplug/shpchprm_nonacpi.c
@@ -37,11 +37,6 @@
37	#include "shpchp.h"	37	#include "shpchp.h"
38	#include "shpchprm.h"	38	#include "shpchprm.h"
39		39
40	void shpchprm_cleanup(void)
41	{
42	return;
43	}
44
45	int shpchprm_get_physical_slot_number(struct controller ctrl, u32 sun, u8 busnum, u8 devnum)	40	int shpchprm_get_physical_slot_number(struct controller ctrl, u32 sun, u8 busnum, u8 devnum)
46	{	41	{
47	int offset = devnum - ctrl->slot_device_offset;	42	int offset = devnum - ctrl->slot_device_offset;
@@ -51,106 +46,13 @@ int shpchprm_get_physical_slot_number(struct controller ctrl, u32 sun, u8 busn
51	return 0;	46	return 0;
52	}	47	}
53		48
54	int shpchprm_set_hpp(	49	void get_hp_params_from_firmware(struct pci_dev *dev,
55	struct controller *ctrl,	50	struct hotplug_params *hpp)
56	struct pci_func *func,
57	u8 card_type)
58	{
59	u32 rc;
60	u8 temp_byte;
61	struct pci_bus lpci_bus, *pci_bus;
62	unsigned int devfn;
63	memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
64	pci_bus = &lpci_bus;
65	pci_bus->number = func->bus;
66	devfn = PCI_DEVFN(func->device, func->function);
67
68	temp_byte = 0x40; /* hard coded value for LT */
69	if (card_type == PCI_HEADER_TYPE_BRIDGE) {
70	/* set subordinate Latency Timer */
71	rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
72
73	if (rc) {
74	dbg("%s: set secondary LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus,
75	func->device, func->function);
76	return rc;
77	}
78	}
79
80	/* set base Latency Timer */
81	rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
82
83	if (rc) {
84	dbg("%s: set LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
85	return rc;
86	}
87
88	/* set Cache Line size */
89	temp_byte = 0x08; /* hard coded value for CLS */
90
91	rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
92
93	if (rc) {
94	dbg("%s: set CLS error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
95	}
96
97	/* set enable_perr */
98	/* set enable_serr */
99
100	return rc;
101	}
102
103	void shpchprm_enable_card(
104	struct controller *ctrl,
105	struct pci_func *func,
106	u8 card_type)
107	{	51	{
108	u16 command, bcommand;	52	return;
109	struct pci_bus lpci_bus, *pci_bus;
110	unsigned int devfn;
111	int rc;
112
113	memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
114	pci_bus = &lpci_bus;
115	pci_bus->number = func->bus;
116	devfn = PCI_DEVFN(func->device, func->function);
117
118	rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
119
120	command \|= PCI_COMMAND_PARITY \| PCI_COMMAND_SERR
121	\| PCI_COMMAND_MASTER \| PCI_COMMAND_INVALIDATE
122	\| PCI_COMMAND_IO \| PCI_COMMAND_MEMORY;
123
124	rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
125
126	if (card_type == PCI_HEADER_TYPE_BRIDGE) {
127
128	rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
129
130	bcommand \|= PCI_BRIDGE_CTL_PARITY \| PCI_BRIDGE_CTL_SERR
131	\| PCI_BRIDGE_CTL_NO_ISA;
132
133	rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
134	}
135	}
136
137	static int legacy_shpchprm_init_pci(void)
138	{
139	return 0;
140	}	53	}
141		54
142	int shpchprm_init(enum php_ctlr_type ctrl_type)	55	void get_hp_hw_control_from_firmware(struct pci_dev *dev)
143	{	56	{
144	int retval;	57	return;
145
146	switch (ctrl_type) {
147	case PCI:
148	retval = legacy_shpchprm_init_pci();
149	break;
150	default:
151	retval = -ENODEV;
152	break;
153	}
154
155	return retval;
156	}	58	}