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path: root/drivers/pci/hotplug/pciehp_hpc.c
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Diffstat (limited to 'drivers/pci/hotplug/pciehp_hpc.c')
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c101
1 files changed, 45 insertions, 56 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 42914e04d110..9da84b8b27d8 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -104,11 +104,10 @@ static inline void pciehp_free_irq(struct controller *ctrl)
104 free_irq(ctrl->pcie->irq, ctrl); 104 free_irq(ctrl->pcie->irq, ctrl);
105} 105}
106 106
107static int pcie_poll_cmd(struct controller *ctrl) 107static int pcie_poll_cmd(struct controller *ctrl, int timeout)
108{ 108{
109 struct pci_dev *pdev = ctrl_dev(ctrl); 109 struct pci_dev *pdev = ctrl_dev(ctrl);
110 u16 slot_status; 110 u16 slot_status;
111 int timeout = 1000;
112 111
113 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); 112 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
114 if (slot_status & PCI_EXP_SLTSTA_CC) { 113 if (slot_status & PCI_EXP_SLTSTA_CC) {
@@ -129,18 +128,52 @@ static int pcie_poll_cmd(struct controller *ctrl)
129 return 0; /* timeout */ 128 return 0; /* timeout */
130} 129}
131 130
132static void pcie_wait_cmd(struct controller *ctrl, int poll) 131static void pcie_wait_cmd(struct controller *ctrl)
133{ 132{
134 unsigned int msecs = pciehp_poll_mode ? 2500 : 1000; 133 unsigned int msecs = pciehp_poll_mode ? 2500 : 1000;
135 unsigned long timeout = msecs_to_jiffies(msecs); 134 unsigned long duration = msecs_to_jiffies(msecs);
135 unsigned long cmd_timeout = ctrl->cmd_started + duration;
136 unsigned long now, timeout;
136 int rc; 137 int rc;
137 138
138 if (poll) 139 /*
139 rc = pcie_poll_cmd(ctrl); 140 * If the controller does not generate notifications for command
141 * completions, we never need to wait between writes.
142 */
143 if (NO_CMD_CMPL(ctrl))
144 return;
145
146 if (!ctrl->cmd_busy)
147 return;
148
149 /*
150 * Even if the command has already timed out, we want to call
151 * pcie_poll_cmd() so it can clear PCI_EXP_SLTSTA_CC.
152 */
153 now = jiffies;
154 if (time_before_eq(cmd_timeout, now))
155 timeout = 1;
140 else 156 else
157 timeout = cmd_timeout - now;
158
159 if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE &&
160 ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE)
141 rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout); 161 rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout);
162 else
163 rc = pcie_poll_cmd(ctrl, timeout);
164
165 /*
166 * Controllers with errata like Intel CF118 don't generate
167 * completion notifications unless the power/indicator/interlock
168 * control bits are changed. On such controllers, we'll emit this
169 * timeout message when we wait for completion of commands that
170 * don't change those bits, e.g., commands that merely enable
171 * interrupts.
172 */
142 if (!rc) 173 if (!rc)
143 ctrl_dbg(ctrl, "Command not completed in 1000 msec\n"); 174 ctrl_info(ctrl, "Timeout on hotplug command %#010x (issued %u msec ago)\n",
175 ctrl->slot_ctrl,
176 jiffies_to_msecs(now - ctrl->cmd_started));
144} 177}
145 178
146/** 179/**
@@ -152,34 +185,12 @@ static void pcie_wait_cmd(struct controller *ctrl, int poll)
152static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) 185static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
153{ 186{
154 struct pci_dev *pdev = ctrl_dev(ctrl); 187 struct pci_dev *pdev = ctrl_dev(ctrl);
155 u16 slot_status;
156 u16 slot_ctrl; 188 u16 slot_ctrl;
157 189
158 mutex_lock(&ctrl->ctrl_lock); 190 mutex_lock(&ctrl->ctrl_lock);
159 191
160 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); 192 /* Wait for any previous command that might still be in progress */
161 if (slot_status & PCI_EXP_SLTSTA_CC) { 193 pcie_wait_cmd(ctrl);
162 pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
163 PCI_EXP_SLTSTA_CC);
164 if (!ctrl->no_cmd_complete) {
165 /*
166 * After 1 sec and CMD_COMPLETED still not set, just
167 * proceed forward to issue the next command according
168 * to spec. Just print out the error message.
169 */
170 ctrl_dbg(ctrl, "CMD_COMPLETED not clear after 1 sec\n");
171 } else if (!NO_CMD_CMPL(ctrl)) {
172 /*
173 * This controller seems to notify of command completed
174 * event even though it supports none of power
175 * controller, attention led, power led and EMI.
176 */
177 ctrl_dbg(ctrl, "Unexpected CMD_COMPLETED. Need to wait for command completed event\n");
178 ctrl->no_cmd_complete = 0;
179 } else {
180 ctrl_dbg(ctrl, "Unexpected CMD_COMPLETED. Maybe the controller is broken\n");
181 }
182 }
183 194
184 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); 195 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
185 slot_ctrl &= ~mask; 196 slot_ctrl &= ~mask;
@@ -187,22 +198,9 @@ static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
187 ctrl->cmd_busy = 1; 198 ctrl->cmd_busy = 1;
188 smp_mb(); 199 smp_mb();
189 pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl); 200 pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl);
201 ctrl->cmd_started = jiffies;
202 ctrl->slot_ctrl = slot_ctrl;
190 203
191 /*
192 * Wait for command completion.
193 */
194 if (!ctrl->no_cmd_complete) {
195 int poll = 0;
196 /*
197 * if hotplug interrupt is not enabled or command
198 * completed interrupt is not enabled, we need to poll
199 * command completed event.
200 */
201 if (!(slot_ctrl & PCI_EXP_SLTCTL_HPIE) ||
202 !(slot_ctrl & PCI_EXP_SLTCTL_CCIE))
203 poll = 1;
204 pcie_wait_cmd(ctrl, poll);
205 }
206 mutex_unlock(&ctrl->ctrl_lock); 204 mutex_unlock(&ctrl->ctrl_lock);
207} 205}
208 206
@@ -773,15 +771,6 @@ struct controller *pcie_init(struct pcie_device *dev)
773 mutex_init(&ctrl->ctrl_lock); 771 mutex_init(&ctrl->ctrl_lock);
774 init_waitqueue_head(&ctrl->queue); 772 init_waitqueue_head(&ctrl->queue);
775 dbg_ctrl(ctrl); 773 dbg_ctrl(ctrl);
776 /*
777 * Controller doesn't notify of command completion if the "No
778 * Command Completed Support" bit is set in Slot Capability
779 * register or the controller supports none of power
780 * controller, attention led, power led and EMI.
781 */
782 if (NO_CMD_CMPL(ctrl) ||
783 !(POWER_CTRL(ctrl) | ATTN_LED(ctrl) | PWR_LED(ctrl) | EMI(ctrl)))
784 ctrl->no_cmd_complete = 1;
785 774
786 /* Check if Data Link Layer Link Active Reporting is implemented */ 775 /* Check if Data Link Layer Link Active Reporting is implemented */
787 pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap); 776 pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
@@ -794,7 +783,7 @@ struct controller *pcie_init(struct pcie_device *dev)
794 pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, 783 pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
795 PCI_EXP_SLTSTA_ABP | PCI_EXP_SLTSTA_PFD | 784 PCI_EXP_SLTSTA_ABP | PCI_EXP_SLTSTA_PFD |
796 PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC | 785 PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC |
797 PCI_EXP_SLTSTA_CC); 786 PCI_EXP_SLTSTA_CC | PCI_EXP_SLTSTA_DLLSC);
798 787
799 /* Disable software notification */ 788 /* Disable software notification */
800 pcie_disable_notification(ctrl); 789 pcie_disable_notification(ctrl);