diff options
Diffstat (limited to 'drivers/pci/hotplug/pciehp_hpc.c')
-rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 27 |
1 files changed, 18 insertions, 9 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 96dc4734e4af..7b1414810ae3 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c | |||
@@ -280,6 +280,14 @@ int pciehp_check_link_status(struct controller *ctrl) | |||
280 | else | 280 | else |
281 | msleep(1000); | 281 | msleep(1000); |
282 | 282 | ||
283 | /* | ||
284 | * Need to wait for 1000 ms after Data Link Layer Link Active | ||
285 | * (DLLLA) bit reads 1b before sending configuration request. | ||
286 | * We need it before checking Link Training (LT) bit becuase | ||
287 | * LT is still set even after DLLLA bit is set on some platform. | ||
288 | */ | ||
289 | msleep(1000); | ||
290 | |||
283 | retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status); | 291 | retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status); |
284 | if (retval) { | 292 | if (retval) { |
285 | ctrl_err(ctrl, "Cannot read LNKSTATUS register\n"); | 293 | ctrl_err(ctrl, "Cannot read LNKSTATUS register\n"); |
@@ -294,6 +302,16 @@ int pciehp_check_link_status(struct controller *ctrl) | |||
294 | return retval; | 302 | return retval; |
295 | } | 303 | } |
296 | 304 | ||
305 | /* | ||
306 | * If the port supports Link speeds greater than 5.0 GT/s, we | ||
307 | * must wait for 100 ms after Link training completes before | ||
308 | * sending configuration request. | ||
309 | */ | ||
310 | if (ctrl->pcie->port->subordinate->max_bus_speed > PCIE_SPEED_5_0GT) | ||
311 | msleep(100); | ||
312 | |||
313 | pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); | ||
314 | |||
297 | return retval; | 315 | return retval; |
298 | } | 316 | } |
299 | 317 | ||
@@ -484,7 +502,6 @@ int pciehp_power_on_slot(struct slot * slot) | |||
484 | u16 slot_cmd; | 502 | u16 slot_cmd; |
485 | u16 cmd_mask; | 503 | u16 cmd_mask; |
486 | u16 slot_status; | 504 | u16 slot_status; |
487 | u16 lnk_status; | ||
488 | int retval = 0; | 505 | int retval = 0; |
489 | 506 | ||
490 | /* Clear sticky power-fault bit from previous power failures */ | 507 | /* Clear sticky power-fault bit from previous power failures */ |
@@ -516,14 +533,6 @@ int pciehp_power_on_slot(struct slot * slot) | |||
516 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, | 533 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
517 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); | 534 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); |
518 | 535 | ||
519 | retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status); | ||
520 | if (retval) { | ||
521 | ctrl_err(ctrl, "%s: Cannot read LNKSTA register\n", | ||
522 | __func__); | ||
523 | return retval; | ||
524 | } | ||
525 | pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); | ||
526 | |||
527 | return retval; | 536 | return retval; |
528 | } | 537 | } |
529 | 538 | ||