1 files changed, 54 insertions, 149 deletions

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 016eea94a8a5..06d025b8b13f 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -39,37 +39,6 @@
 
 #include "../pci.h"
 #include "pciehp.h"
-#ifdef DEBUG
-#define DBG_K_TRACE_ENTRY      ((unsigned int)0x00000001)       /* On function entry */
-#define DBG_K_TRACE_EXIT       ((unsigned int)0x00000002)       /* On function exit */
-#define DBG_K_INFO             ((unsigned int)0x00000004)       /* Info messages */
-#define DBG_K_ERROR            ((unsigned int)0x00000008)       /* Error messages */
-#define DBG_K_TRACE            (DBG_K_TRACE_ENTRY|DBG_K_TRACE_EXIT)
-#define DBG_K_STANDARD         (DBG_K_INFO|DBG_K_ERROR|DBG_K_TRACE)
-/* Redefine this flagword to set debug level */
-#define DEBUG_LEVEL            DBG_K_STANDARD
-
-#define DEFINE_DBG_BUFFER     char __dbg_str_buf[256];
-
-#define DBG_PRINT( dbg_flags, args... )              \
-        do {                                             \
-          if ( DEBUG_LEVEL & ( dbg_flags ) )             \
-          {                                              \
-            int len;                                     \
-            len = sprintf( __dbg_str_buf, "%s:%d: %s: ", \
-                  __FILE__, __LINE__, __FUNCTION__ );    \
-            sprintf( __dbg_str_buf + len, args );        \
-            printk( KERN_NOTICE "%s\n", __dbg_str_buf ); \
-          }                                              \
-        } while (0)
-
-#define DBG_ENTER_ROUTINE       DBG_PRINT (DBG_K_TRACE_ENTRY, "%s", "[Entry]");
-#define DBG_LEAVE_ROUTINE       DBG_PRINT (DBG_K_TRACE_EXIT, "%s", "[Exit]");
-#else
-#define DEFINE_DBG_BUFFER
-#define DBG_ENTER_ROUTINE
-#define DBG_LEAVE_ROUTINE
-#endif                          /* DEBUG */
 
 static atomic_t pciehp_num_controllers = ATOMIC_INIT(0);
 
@@ -160,10 +129,10 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value)
 /* Link Width Encoding */
 #define LNK_X1          0x01
 #define LNK_X2          0x02
-#define LNK_X4          0x04    
+#define LNK_X4          0x04
 #define LNK_X8          0x08
 #define LNK_X12         0x0C
-#define LNK_X16         0x10    
+#define LNK_X16         0x10
 #define LNK_X32         0x20
 
 /*Field definitions of Link Status Register */
@@ -221,8 +190,6 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value)
 #define EMI_STATE               0x0080
 #define EMI_STATUS_BIT          7
 
-DEFINE_DBG_BUFFER               /* Debug string buffer for entire HPC defined here */
-
 static irqreturn_t pcie_isr(int irq, void *dev_id);
 static void start_int_poll_timer(struct controller *ctrl, int sec);
 
@@ -231,14 +198,12 @@ static void int_poll_timeout(unsigned long data)
 {
         struct controller *ctrl = (struct controller *)data;
 
-        DBG_ENTER_ROUTINE
-
         /* Poll for interrupt events.  regs == NULL => polling */
         pcie_isr(0, ctrl);
 
         init_timer(&ctrl->poll_timer);
         if (!pciehp_poll_time)
-                pciehp_poll_time = 2; /* reset timer to poll in 2 secs if user doesn't specify at module installation*/
+                pciehp_poll_time = 2; /* default polling interval is 2 sec */
 
         start_int_poll_timer(ctrl, pciehp_poll_time);
 }
@@ -289,8 +254,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask)
         u16 slot_ctrl;
         unsigned long flags;
 
-        DBG_ENTER_ROUTINE 
-
         mutex_lock(&ctrl->ctrl_lock);
 
         retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status);
@@ -299,7 +262,7 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask)
                 goto out;
         }
 
-        if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { 
+        if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) {
                 /* After 1 sec and CMD_COMPLETED still not set, just
                    proceed forward to issue the next command according
                    to spec.  Just print out the error message */
@@ -332,7 +295,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask)
                 retval = pcie_wait_cmd(ctrl);
  out:
         mutex_unlock(&ctrl->ctrl_lock);
-        DBG_LEAVE_ROUTINE 
         return retval;
 }
 
@@ -341,8 +303,6 @@ static int hpc_check_lnk_status(struct controller *ctrl)
         u16 lnk_status;
         int retval = 0;
 
-        DBG_ENTER_ROUTINE 
-
         retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status);
         if (retval) {
                 err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__);
@@ -350,26 +310,22 @@ static int hpc_check_lnk_status(struct controller *ctrl)
         }
 
         dbg("%s: lnk_status = %x\n", __FUNCTION__, lnk_status);
-        if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) || 
+        if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) ||
                 !(lnk_status & NEG_LINK_WD)) {
                 err("%s : Link Training Error occurs \n", __FUNCTION__);
                 retval = -1;
                 return retval;
         }
 
-        DBG_LEAVE_ROUTINE 
         return retval;
 }
 
-
 static int hpc_get_attention_status(struct slot *slot, u8 *status)
 {
         struct controller *ctrl = slot->ctrl;
         u16 slot_ctrl;
         u8 atten_led_state;
         int retval = 0;
-        
-        DBG_ENTER_ROUTINE 
 
         retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl);
         if (retval) {
@@ -400,7 +356,6 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status)
                 break;
         }
 
-        DBG_LEAVE_ROUTINE 
         return 0;
 }
 
@@ -410,8 +365,6 @@ static int hpc_get_power_status(struct slot *slot, u8 *status)
         u16 slot_ctrl;
         u8 pwr_state;
         int     retval = 0;
-        
-        DBG_ENTER_ROUTINE 
 
         retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl);
         if (retval) {
@@ -428,35 +381,30 @@ static int hpc_get_power_status(struct slot *slot, u8 *status)
                 *status = 1;
                 break;
         case 1:
-                *status = 0;    
+                *status = 0;
                 break;
         default:
                 *status = 0xFF;
                 break;
         }
 
-        DBG_LEAVE_ROUTINE 
         return retval;
 }
 
-
 static int hpc_get_latch_status(struct slot *slot, u8 *status)
 {
         struct controller *ctrl = slot->ctrl;
         u16 slot_status;
         int retval = 0;
 
-        DBG_ENTER_ROUTINE 
-
         retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status);
         if (retval) {
                 err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__);
                 return retval;
         }
 
-        *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1;  
+        *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1;
 
-        DBG_LEAVE_ROUTINE 
         return 0;
 }
 
@@ -467,8 +415,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status)
         u8 card_state;
         int retval = 0;
 
-        DBG_ENTER_ROUTINE 
-
         retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status);
         if (retval) {
                 err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__);
@@ -477,7 +423,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status)
         card_state = (u8)((slot_status & PRSN_STATE) >> 6);
         *status = (card_state == 1) ? 1 : 0;
 
-        DBG_LEAVE_ROUTINE 
         return 0;
 }
 
@@ -488,16 +433,13 @@ static int hpc_query_power_fault(struct slot *slot)
         u8 pwr_fault;
         int retval = 0;
 
-        DBG_ENTER_ROUTINE 
-
         retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status);
         if (retval) {
                 err("%s: Cannot check for power fault\n", __FUNCTION__);
                 return retval;
         }
         pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1);
-        
-        DBG_LEAVE_ROUTINE
+
         return pwr_fault;
 }
 
@@ -507,8 +449,6 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status)
         u16 slot_status;
         int retval = 0;
 
-        DBG_ENTER_ROUTINE
-
         retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status);
         if (retval) {
                 err("%s : Cannot check EMI status\n", __FUNCTION__);
@@ -516,7 +456,6 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status)
         }
         *status = (slot_status & EMI_STATE) >> EMI_STATUS_BIT;
 
-        DBG_LEAVE_ROUTINE
         return retval;
 }
 
@@ -526,8 +465,6 @@ static int hpc_toggle_emi(struct slot *slot)
         u16 cmd_mask;
         int rc;
 
-        DBG_ENTER_ROUTINE
-
         slot_cmd = EMI_CTRL;
         cmd_mask = EMI_CTRL;
         if (!pciehp_poll_mode) {
@@ -537,7 +474,7 @@ static int hpc_toggle_emi(struct slot *slot)
 
         rc = pcie_write_cmd(slot, slot_cmd, cmd_mask);
         slot->last_emi_toggle = get_seconds();
-        DBG_LEAVE_ROUTINE
+
         return rc;
 }
 
@@ -548,8 +485,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
         u16 cmd_mask;
         int rc;
 
-        DBG_ENTER_ROUTINE
-
         cmd_mask = ATTN_LED_CTRL;
         switch (value) {
                 case 0 :        /* turn off */
@@ -572,19 +507,15 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
         rc = pcie_write_cmd(slot, slot_cmd, cmd_mask);
         dbg("%s: SLOTCTRL %x write cmd %x\n",
             __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
-        
-        DBG_LEAVE_ROUTINE
+
         return rc;
 }
 
-
 static void hpc_set_green_led_on(struct slot *slot)
 {
         struct controller *ctrl = slot->ctrl;
         u16 slot_cmd;
         u16 cmd_mask;
-        
-        DBG_ENTER_ROUTINE
 
         slot_cmd = 0x0100;
         cmd_mask = PWR_LED_CTRL;
@@ -597,8 +528,6 @@ static void hpc_set_green_led_on(struct slot *slot)
 
         dbg("%s: SLOTCTRL %x write cmd %x\n",
             __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
-        DBG_LEAVE_ROUTINE
-        return;
 }
 
 static void hpc_set_green_led_off(struct slot *slot)
@@ -607,8 +536,6 @@ static void hpc_set_green_led_off(struct slot *slot)
         u16 slot_cmd;
         u16 cmd_mask;
 
-        DBG_ENTER_ROUTINE
-
         slot_cmd = 0x0300;
         cmd_mask = PWR_LED_CTRL;
         if (!pciehp_poll_mode) {
@@ -619,9 +546,6 @@ static void hpc_set_green_led_off(struct slot *slot)
         pcie_write_cmd(slot, slot_cmd, cmd_mask);
         dbg("%s: SLOTCTRL %x write cmd %x\n",
             __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
-
-        DBG_LEAVE_ROUTINE
-        return;
 }
 
 static void hpc_set_green_led_blink(struct slot *slot)
@@ -629,8 +553,6 @@ static void hpc_set_green_led_blink(struct slot *slot)
         struct controller *ctrl = slot->ctrl;
         u16 slot_cmd;
         u16 cmd_mask;
-        
-        DBG_ENTER_ROUTINE
 
         slot_cmd = 0x0200;
         cmd_mask = PWR_LED_CTRL;
@@ -643,14 +565,10 @@ static void hpc_set_green_led_blink(struct slot *slot)
 
         dbg("%s: SLOTCTRL %x write cmd %x\n",
             __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
-        DBG_LEAVE_ROUTINE
-        return;
 }
 
 static void hpc_release_ctlr(struct controller *ctrl)
 {
-        DBG_ENTER_ROUTINE 
-
         if (pciehp_poll_mode)
                 del_timer(&ctrl->poll_timer);
         else
@@ -662,8 +580,6 @@ static void hpc_release_ctlr(struct controller *ctrl)
          */
         if (atomic_dec_and_test(&pciehp_num_controllers))
                 destroy_workqueue(pciehp_wq);
-
-        DBG_LEAVE_ROUTINE
 }
 
 static int hpc_power_on_slot(struct slot * slot)
@@ -674,8 +590,6 @@ static int hpc_power_on_slot(struct slot * slot)
         u16 slot_status;
         int retval = 0;
 
-        DBG_ENTER_ROUTINE 
-
         dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot);
 
         /* Clear sticky power-fault bit from previous power failures */
@@ -719,8 +633,6 @@ static int hpc_power_on_slot(struct slot * slot)
         dbg("%s: SLOTCTRL %x write cmd %x\n",
             __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
 
-        DBG_LEAVE_ROUTINE
-
         return retval;
 }
 
@@ -731,8 +643,6 @@ static int hpc_power_off_slot(struct slot * slot)
         u16 cmd_mask;
         int retval = 0;
 
-        DBG_ENTER_ROUTINE 
-
         dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot);
 
         slot_cmd = POWER_OFF;
@@ -764,8 +674,6 @@ static int hpc_power_off_slot(struct slot * slot)
         dbg("%s: SLOTCTRL %x write cmd %x\n",
             __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
 
-        DBG_LEAVE_ROUTINE
-
         return retval;
 }
 
@@ -784,8 +692,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
                 return IRQ_NONE;
         }
 
-        intr_detect = ( ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED | MRL_SENS_CHANGED |
-                                        PRSN_DETECT_CHANGED | CMD_COMPLETED );
+        intr_detect = (ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED |
+                       MRL_SENS_CHANGED | PRSN_DETECT_CHANGED | CMD_COMPLETED);
 
         intr_loc = slot_status & intr_detect;
 
@@ -807,7 +715,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
 
                 dbg("%s: pciehp_readw(SLOTCTRL) with value %x\n",
                     __FUNCTION__, temp_word);
-                temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;
+                temp_word = (temp_word & ~HP_INTR_ENABLE &
+                             ~CMD_CMPL_INTR_ENABLE) | 0x00;
                 rc = pciehp_writew(ctrl, SLOTCTRL, temp_word);
                 if (rc) {
                         err("%s: Cannot write to SLOTCTRL register\n",
@@ -825,7 +734,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
                 }
                 dbg("%s: pciehp_readw(SLOTSTATUS) with value %x\n",
                     __FUNCTION__, slot_status);
-                
+
                 /* Clear command complete interrupt caused by this write */
                 temp_word = 0x1f;
                 rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word);
@@ -835,10 +744,10 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
                         return IRQ_NONE;
                 }
         }
-        
+
         if (intr_loc & CMD_COMPLETED) {
-                /* 
-                 * Command Complete Interrupt Pending 
+                /*
+                 * Command Complete Interrupt Pending
                  */
                 ctrl->cmd_busy = 0;
                 wake_up_interruptible(&ctrl->queue);
@@ -892,7 +801,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
                             __FUNCTION__);
                         return IRQ_NONE;
                 }
-                
+
                 /* Clear command complete interrupt caused by this write */
                 temp_word = 0x1F;
                 rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word);
@@ -904,19 +813,17 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
                 dbg("%s: pciehp_writew(SLOTSTATUS) with value %x\n",
                     __FUNCTION__, temp_word);
         }
-        
+
         return IRQ_HANDLED;
 }
 
-static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
+static int hpc_get_max_lnk_speed(struct slot *slot, enum pci_bus_speed *value)
 {
         struct controller *ctrl = slot->ctrl;
         enum pcie_link_speed lnk_speed;
         u32     lnk_cap;
         int retval = 0;
 
-        DBG_ENTER_ROUTINE 
-
         retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap);
         if (retval) {
                 err("%s: Cannot read LNKCAP register\n", __FUNCTION__);
@@ -934,19 +841,18 @@ static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
 
         *value = lnk_speed;
         dbg("Max link speed = %d\n", lnk_speed);
-        DBG_LEAVE_ROUTINE 
+
         return retval;
 }
 
-static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value)
+static int hpc_get_max_lnk_width(struct slot *slot,
+                                 enum pcie_link_width *value)
 {
         struct controller *ctrl = slot->ctrl;
         enum pcie_link_width lnk_wdth;
         u32     lnk_cap;
         int retval = 0;
 
-        DBG_ENTER_ROUTINE 
-
         retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap);
         if (retval) {
                 err("%s: Cannot read LNKCAP register\n", __FUNCTION__);
@@ -985,19 +891,17 @@ static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value
 
         *value = lnk_wdth;
         dbg("Max link width = %d\n", lnk_wdth);
-        DBG_LEAVE_ROUTINE 
+
         return retval;
 }
 
-static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
+static int hpc_get_cur_lnk_speed(struct slot *slot, enum pci_bus_speed *value)
 {
         struct controller *ctrl = slot->ctrl;
         enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN;
         int retval = 0;
         u16 lnk_status;
 
-        DBG_ENTER_ROUTINE 
-
         retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status);
         if (retval) {
                 err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__);
@@ -1015,25 +919,24 @@ static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
 
         *value = lnk_speed;
         dbg("Current link speed = %d\n", lnk_speed);
-        DBG_LEAVE_ROUTINE 
+
         return retval;
 }
 
-static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value)
+static int hpc_get_cur_lnk_width(struct slot *slot,
+                                 enum pcie_link_width *value)
 {
         struct controller *ctrl = slot->ctrl;
         enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN;
         int retval = 0;
         u16 lnk_status;
 
-        DBG_ENTER_ROUTINE 
-
         retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status);
         if (retval) {
                 err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__);
                 return retval;
         }
-        
+
         switch ((lnk_status & 0x03F0) >> 4){
         case 0:
                 lnk_wdth = PCIE_LNK_WIDTH_RESRV;
@@ -1066,7 +969,7 @@ static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value
 
         *value = lnk_wdth;
         dbg("Current link width = %d\n", lnk_wdth);
-        DBG_LEAVE_ROUTINE 
+
         return retval;
 }
 
@@ -1085,12 +988,12 @@ static struct hpc_ops pciehp_hpc_ops = {
         .get_cur_bus_speed              = hpc_get_cur_lnk_speed,
         .get_max_lnk_width              = hpc_get_max_lnk_width,
         .get_cur_lnk_width              = hpc_get_cur_lnk_width,
-        
+
         .query_power_fault              = hpc_query_power_fault,
         .green_led_on                   = hpc_set_green_led_on,
         .green_led_off                  = hpc_set_green_led_off,
         .green_led_blink                = hpc_set_green_led_blink,
-        
+
         .release_ctlr                   = hpc_release_ctlr,
         .check_lnk_status               = hpc_check_lnk_status,
 };
@@ -1138,6 +1041,7 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev)
                 dbg("Trying to get hotplug control for %s \n",
                         (char *)string.pointer);
                 status = pci_osc_control_set(handle,
+                                OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL |
                                 OSC_PCI_EXPRESS_NATIVE_HP_CONTROL);
                 if (status == AE_NOT_FOUND)
                         status = acpi_run_oshp(handle);
@@ -1163,8 +1067,6 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev)
 }
 #endif
 
-
-
 int pcie_init(struct controller * ctrl, struct pcie_device *dev)
 {
         int rc;
@@ -1176,8 +1078,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
         u16 slot_status, slot_ctrl;
         struct pci_dev *pdev;
 
-        DBG_ENTER_ROUTINE
-        
         pdev = dev->port;
         ctrl->pci_dev = pdev;   /* save pci_dev in context */
 
@@ -1201,9 +1101,11 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
         dbg("%s: CAPREG offset %x cap_reg %x\n",
             __FUNCTION__, ctrl->cap_base + CAPREG, cap_reg);
 
-        if (((cap_reg & SLOT_IMPL) == 0) || (((cap_reg & DEV_PORT_TYPE) != 0x0040)
+        if (((cap_reg & SLOT_IMPL) == 0) ||
+            (((cap_reg & DEV_PORT_TYPE) != 0x0040)
                 && ((cap_reg & DEV_PORT_TYPE) != 0x0060))) {
-                dbg("%s : This is not a root port or the port is not connected to a slot\n", __FUNCTION__);
+                dbg("%s : This is not a root port or the port is not "
+                    "connected to a slot\n", __FUNCTION__);
                 goto abort_free_ctlr;
         }
 
@@ -1236,14 +1138,15 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
         dbg("%s: SLOTCTRL offset %x slot_ctrl %x\n",
             __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_ctrl);
 
-        for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++)
+        for (rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++)
                 if (pci_resource_len(pdev, rc) > 0)
                         dbg("pci resource[%d] start=0x%llx(len=0x%llx)\n", rc,
                             (unsigned long long)pci_resource_start(pdev, rc),
                             (unsigned long long)pci_resource_len(pdev, rc));
 
-        info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, 
-                pdev->subsystem_vendor, pdev->subsystem_device);
+        info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n",
+             pdev->vendor, pdev->device,
+             pdev->subsystem_vendor, pdev->subsystem_device);
 
         mutex_init(&ctrl->crit_sect);
         mutex_init(&ctrl->ctrl_lock);
@@ -1267,7 +1170,8 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
 
         dbg("%s: SLOTCTRL %x value read %x\n",
             __FUNCTION__, ctrl->cap_base + SLOTCTRL, temp_word);
-        temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;
+        temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) |
+                0x00;
 
         rc = pciehp_writew(ctrl, SLOTCTRL, temp_word);
         if (rc) {
@@ -1330,14 +1234,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
 
         if (ATTN_BUTTN(slot_cap))
                 intr_enable = intr_enable | ATTN_BUTTN_ENABLE;
-        
+
         if (POWER_CTRL(slot_cap))
                 intr_enable = intr_enable | PWR_FAULT_DETECT_ENABLE;
-        
+
         if (MRL_SENS(slot_cap))
                 intr_enable = intr_enable | MRL_DETECT_ENABLE;
 
-        temp_word = (temp_word & ~intr_enable) | intr_enable; 
+        temp_word = (temp_word & ~intr_enable) | intr_enable;
 
         if (pciehp_poll_mode) {
                 temp_word = (temp_word & ~HP_INTR_ENABLE) | 0x0;
@@ -1345,7 +1249,10 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
                 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;
         }
 
-        /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */
+        /*
+         * Unmask Hot-plug Interrupt Enable for the interrupt
+         * notification mechanism case.
+         */
         rc = pciehp_writew(ctrl, SLOTCTRL, temp_word);
         if (rc) {
                 err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__);
@@ -1356,14 +1263,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
                 err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__);
                 goto abort_disable_intr;
         }
-        
+
         temp_word =  0x1F; /* Clear all events */
         rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word);
         if (rc) {
                 err("%s: Cannot write to SLOTSTATUS register\n", __FUNCTION__);
                 goto abort_disable_intr;
         }
-        
+
         if (pciehp_force) {
                 dbg("Bypassing BIOS check for pciehp use on %s\n",
                                 pci_name(ctrl->pci_dev));
@@ -1375,10 +1282,9 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
 
         ctrl->hpc_ops = &pciehp_hpc_ops;
 
-        DBG_LEAVE_ROUTINE
         return 0;
 
-        /* We end up here for the many possible ways to fail this API.  */
+        /* We end up here for the many possible ways to fail this API. */
 abort_disable_intr:
         rc = pciehp_readw(ctrl, SLOTCTRL, &temp_word);
         if (!rc) {
@@ -1395,6 +1301,5 @@ abort_free_irq:
                 free_irq(ctrl->pci_dev->irq, ctrl);
 
 abort_free_ctlr:
-        DBG_LEAVE_ROUTINE
         return -1;
 }