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path: root/drivers/pci/hotplug/pciehp_ctrl.c
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-rw-r--r--drivers/pci/hotplug/pciehp_ctrl.c2706
1 files changed, 2706 insertions, 0 deletions
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c
new file mode 100644
index 000000000000..0dbcf04aa35e
--- /dev/null
+++ b/drivers/pci/hotplug/pciehp_ctrl.c
@@ -0,0 +1,2706 @@
1/*
2 * PCI Express Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Send feedback to <greg@kroah.com>, <dely.l.sy@intel.com>
27 *
28 */
29
30#include <linux/config.h>
31#include <linux/module.h>
32#include <linux/kernel.h>
33#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/workqueue.h>
36#include <linux/interrupt.h>
37#include <linux/delay.h>
38#include <linux/wait.h>
39#include <linux/smp_lock.h>
40#include <linux/pci.h>
41#include "../pci.h"
42#include "pciehp.h"
43#include "pciehprm.h"
44
45static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
46 u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
47static int configure_new_function( struct controller *ctrl, struct pci_func *func,
48 u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
49static void interrupt_event_handler(struct controller *ctrl);
50
51static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */
52static struct semaphore event_exit; /* guard ensure thread has exited before calling it quits */
53static int event_finished;
54static unsigned long pushbutton_pending; /* = 0 */
55static unsigned long surprise_rm_pending; /* = 0 */
56
57u8 pciehp_handle_attention_button(u8 hp_slot, void *inst_id)
58{
59 struct controller *ctrl = (struct controller *) inst_id;
60 struct slot *p_slot;
61 u8 rc = 0;
62 u8 getstatus;
63 struct pci_func *func;
64 struct event_info *taskInfo;
65
66 /* Attention Button Change */
67 dbg("pciehp: Attention button interrupt received.\n");
68
69 func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
70
71 /* This is the structure that tells the worker thread what to do */
72 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
73 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
74
75 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
76 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
77
78 ctrl->next_event = (ctrl->next_event + 1) % 10;
79 taskInfo->hp_slot = hp_slot;
80
81 rc++;
82
83 /*
84 * Button pressed - See if need to TAKE ACTION!!!
85 */
86 info("Button pressed on Slot(%d)\n", ctrl->first_slot + hp_slot);
87 taskInfo->event_type = INT_BUTTON_PRESS;
88
89 if ((p_slot->state == BLINKINGON_STATE)
90 || (p_slot->state == BLINKINGOFF_STATE)) {
91 /* Cancel if we are still blinking; this means that we press the
92 * attention again before the 5 sec. limit expires to cancel hot-add
93 * or hot-remove
94 */
95 taskInfo->event_type = INT_BUTTON_CANCEL;
96 info("Button cancel on Slot(%d)\n", ctrl->first_slot + hp_slot);
97 } else if ((p_slot->state == POWERON_STATE)
98 || (p_slot->state == POWEROFF_STATE)) {
99 /* Ignore if the slot is on power-on or power-off state; this
100 * means that the previous attention button action to hot-add or
101 * hot-remove is undergoing
102 */
103 taskInfo->event_type = INT_BUTTON_IGNORE;
104 info("Button ignore on Slot(%d)\n", ctrl->first_slot + hp_slot);
105 }
106
107 if (rc)
108 up(&event_semaphore); /* signal event thread that new event is posted */
109
110 return 0;
111
112}
113
114u8 pciehp_handle_switch_change(u8 hp_slot, void *inst_id)
115{
116 struct controller *ctrl = (struct controller *) inst_id;
117 struct slot *p_slot;
118 u8 rc = 0;
119 u8 getstatus;
120 struct pci_func *func;
121 struct event_info *taskInfo;
122
123 /* Switch Change */
124 dbg("pciehp: Switch interrupt received.\n");
125
126 func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
127
128 /* This is the structure that tells the worker thread
129 * what to do
130 */
131 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
132 ctrl->next_event = (ctrl->next_event + 1) % 10;
133 taskInfo->hp_slot = hp_slot;
134
135 rc++;
136 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
137 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
138 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
139
140 if (getstatus) {
141 /*
142 * Switch opened
143 */
144 info("Latch open on Slot(%d)\n", ctrl->first_slot + hp_slot);
145 func->switch_save = 0;
146 taskInfo->event_type = INT_SWITCH_OPEN;
147 } else {
148 /*
149 * Switch closed
150 */
151 info("Latch close on Slot(%d)\n", ctrl->first_slot + hp_slot);
152 func->switch_save = 0x10;
153 taskInfo->event_type = INT_SWITCH_CLOSE;
154 }
155
156 if (rc)
157 up(&event_semaphore); /* signal event thread that new event is posted */
158
159 return rc;
160}
161
162u8 pciehp_handle_presence_change(u8 hp_slot, void *inst_id)
163{
164 struct controller *ctrl = (struct controller *) inst_id;
165 struct slot *p_slot;
166 u8 rc = 0;
167 struct pci_func *func;
168 struct event_info *taskInfo;
169
170 /* Presence Change */
171 dbg("pciehp: Presence/Notify input change.\n");
172
173 func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
174
175 /* This is the structure that tells the worker thread
176 * what to do
177 */
178 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
179 ctrl->next_event = (ctrl->next_event + 1) % 10;
180 taskInfo->hp_slot = hp_slot;
181
182 rc++;
183 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
184
185 /* Switch is open, assume a presence change
186 * Save the presence state
187 */
188 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
189 if (func->presence_save) {
190 /*
191 * Card Present
192 */
193 info("Card present on Slot(%d)\n", ctrl->first_slot + hp_slot);
194 taskInfo->event_type = INT_PRESENCE_ON;
195 } else {
196 /*
197 * Not Present
198 */
199 info("Card not present on Slot(%d)\n", ctrl->first_slot + hp_slot);
200 taskInfo->event_type = INT_PRESENCE_OFF;
201 }
202
203 if (rc)
204 up(&event_semaphore); /* signal event thread that new event is posted */
205
206 return rc;
207}
208
209u8 pciehp_handle_power_fault(u8 hp_slot, void *inst_id)
210{
211 struct controller *ctrl = (struct controller *) inst_id;
212 struct slot *p_slot;
213 u8 rc = 0;
214 struct pci_func *func;
215 struct event_info *taskInfo;
216
217 /* power fault */
218 dbg("pciehp: Power fault interrupt received.\n");
219
220 func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
221
222 /* this is the structure that tells the worker thread
223 * what to do
224 */
225 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
226 ctrl->next_event = (ctrl->next_event + 1) % 10;
227 taskInfo->hp_slot = hp_slot;
228
229 rc++;
230 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
231
232 if ( !(p_slot->hpc_ops->query_power_fault(p_slot))) {
233 /*
234 * power fault Cleared
235 */
236 info("Power fault cleared on Slot(%d)\n", ctrl->first_slot + hp_slot);
237 func->status = 0x00;
238 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
239 } else {
240 /*
241 * power fault
242 */
243 info("Power fault on Slot(%d)\n", ctrl->first_slot + hp_slot);
244 taskInfo->event_type = INT_POWER_FAULT;
245 /* set power fault status for this board */
246 func->status = 0xFF;
247 info("power fault bit %x set\n", hp_slot);
248 }
249 if (rc)
250 up(&event_semaphore); /* signal event thread that new event is posted */
251
252 return rc;
253}
254
255
256/**
257 * sort_by_size: sort nodes by their length, smallest first.
258 *
259 * @head: list to sort
260 */
261static int sort_by_size(struct pci_resource **head)
262{
263 struct pci_resource *current_res;
264 struct pci_resource *next_res;
265 int out_of_order = 1;
266
267 if (!(*head))
268 return 1;
269
270 if (!((*head)->next))
271 return 0;
272
273 while (out_of_order) {
274 out_of_order = 0;
275
276 /* Special case for swapping list head */
277 if (((*head)->next) &&
278 ((*head)->length > (*head)->next->length)) {
279 out_of_order++;
280 current_res = *head;
281 *head = (*head)->next;
282 current_res->next = (*head)->next;
283 (*head)->next = current_res;
284 }
285
286 current_res = *head;
287
288 while (current_res->next && current_res->next->next) {
289 if (current_res->next->length > current_res->next->next->length) {
290 out_of_order++;
291 next_res = current_res->next;
292 current_res->next = current_res->next->next;
293 current_res = current_res->next;
294 next_res->next = current_res->next;
295 current_res->next = next_res;
296 } else
297 current_res = current_res->next;
298 }
299 } /* End of out_of_order loop */
300
301 return 0;
302}
303
304
305/*
306 * sort_by_max_size
307 *
308 * Sorts nodes on the list by their length.
309 * Largest first.
310 *
311 */
312static int sort_by_max_size(struct pci_resource **head)
313{
314 struct pci_resource *current_res;
315 struct pci_resource *next_res;
316 int out_of_order = 1;
317
318 if (!(*head))
319 return 1;
320
321 if (!((*head)->next))
322 return 0;
323
324 while (out_of_order) {
325 out_of_order = 0;
326
327 /* Special case for swapping list head */
328 if (((*head)->next) &&
329 ((*head)->length < (*head)->next->length)) {
330 out_of_order++;
331 current_res = *head;
332 *head = (*head)->next;
333 current_res->next = (*head)->next;
334 (*head)->next = current_res;
335 }
336
337 current_res = *head;
338
339 while (current_res->next && current_res->next->next) {
340 if (current_res->next->length < current_res->next->next->length) {
341 out_of_order++;
342 next_res = current_res->next;
343 current_res->next = current_res->next->next;
344 current_res = current_res->next;
345 next_res->next = current_res->next;
346 current_res->next = next_res;
347 } else
348 current_res = current_res->next;
349 }
350 } /* End of out_of_order loop */
351
352 return 0;
353}
354
355
356/**
357 * do_pre_bridge_resource_split: return one unused resource node
358 * @head: list to scan
359 *
360 */
361static struct pci_resource *
362do_pre_bridge_resource_split(struct pci_resource **head,
363 struct pci_resource **orig_head, u32 alignment)
364{
365 struct pci_resource *prevnode = NULL;
366 struct pci_resource *node;
367 struct pci_resource *split_node;
368 u32 rc;
369 u32 temp_dword;
370 dbg("do_pre_bridge_resource_split\n");
371
372 if (!(*head) || !(*orig_head))
373 return NULL;
374
375 rc = pciehp_resource_sort_and_combine(head);
376
377 if (rc)
378 return NULL;
379
380 if ((*head)->base != (*orig_head)->base)
381 return NULL;
382
383 if ((*head)->length == (*orig_head)->length)
384 return NULL;
385
386
387 /* If we got here, there the bridge requires some of the resource, but
388 * we may be able to split some off of the front
389 */
390 node = *head;
391
392 if (node->length & (alignment -1)) {
393 /* this one isn't an aligned length, so we'll make a new entry
394 * and split it up.
395 */
396 split_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
397
398 if (!split_node)
399 return NULL;
400
401 temp_dword = (node->length | (alignment-1)) + 1 - alignment;
402
403 split_node->base = node->base;
404 split_node->length = temp_dword;
405
406 node->length -= temp_dword;
407 node->base += split_node->length;
408
409 /* Put it in the list */
410 *head = split_node;
411 split_node->next = node;
412 }
413
414 if (node->length < alignment)
415 return NULL;
416
417 /* Now unlink it */
418 if (*head == node) {
419 *head = node->next;
420 } else {
421 prevnode = *head;
422 while (prevnode->next != node)
423 prevnode = prevnode->next;
424
425 prevnode->next = node->next;
426 }
427 node->next = NULL;
428
429 return node;
430}
431
432
433/**
434 * do_bridge_resource_split: return one unused resource node
435 * @head: list to scan
436 *
437 */
438static struct pci_resource *
439do_bridge_resource_split(struct pci_resource **head, u32 alignment)
440{
441 struct pci_resource *prevnode = NULL;
442 struct pci_resource *node;
443 u32 rc;
444 u32 temp_dword;
445
446 if (!(*head))
447 return NULL;
448
449 rc = pciehp_resource_sort_and_combine(head);
450
451 if (rc)
452 return NULL;
453
454 node = *head;
455
456 while (node->next) {
457 prevnode = node;
458 node = node->next;
459 kfree(prevnode);
460 }
461
462 if (node->length < alignment) {
463 kfree(node);
464 return NULL;
465 }
466
467 if (node->base & (alignment - 1)) {
468 /* Short circuit if adjusted size is too small */
469 temp_dword = (node->base | (alignment-1)) + 1;
470 if ((node->length - (temp_dword - node->base)) < alignment) {
471 kfree(node);
472 return NULL;
473 }
474
475 node->length -= (temp_dword - node->base);
476 node->base = temp_dword;
477 }
478
479 if (node->length & (alignment - 1)) {
480 /* There's stuff in use after this node */
481 kfree(node);
482 return NULL;
483 }
484
485 return node;
486}
487
488
489/*
490 * get_io_resource
491 *
492 * this function sorts the resource list by size and then
493 * returns the first node of "size" length that is not in the
494 * ISA aliasing window. If it finds a node larger than "size"
495 * it will split it up.
496 *
497 * size must be a power of two.
498 */
499static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size)
500{
501 struct pci_resource *prevnode;
502 struct pci_resource *node;
503 struct pci_resource *split_node = NULL;
504 u32 temp_dword;
505
506 if (!(*head))
507 return NULL;
508
509 if ( pciehp_resource_sort_and_combine(head) )
510 return NULL;
511
512 if ( sort_by_size(head) )
513 return NULL;
514
515 for (node = *head; node; node = node->next) {
516 if (node->length < size)
517 continue;
518
519 if (node->base & (size - 1)) {
520 /* this one isn't base aligned properly
521 so we'll make a new entry and split it up */
522 temp_dword = (node->base | (size-1)) + 1;
523
524 /*/ Short circuit if adjusted size is too small */
525 if ((node->length - (temp_dword - node->base)) < size)
526 continue;
527
528 split_node = kmalloc(sizeof(struct pci_resource),
529 GFP_KERNEL);
530
531 if (!split_node)
532 return NULL;
533
534 split_node->base = node->base;
535 split_node->length = temp_dword - node->base;
536 node->base = temp_dword;
537 node->length -= split_node->length;
538
539 /* Put it in the list */
540 split_node->next = node->next;
541 node->next = split_node;
542 } /* End of non-aligned base */
543
544 /* Don't need to check if too small since we already did */
545 if (node->length > size) {
546 /* this one is longer than we need
547 so we'll make a new entry and split it up */
548 split_node = kmalloc(sizeof(struct pci_resource),
549 GFP_KERNEL);
550
551 if (!split_node)
552 return NULL;
553
554 split_node->base = node->base + size;
555 split_node->length = node->length - size;
556 node->length = size;
557
558 /* Put it in the list */
559 split_node->next = node->next;
560 node->next = split_node;
561 } /* End of too big on top end */
562
563 /* For IO make sure it's not in the ISA aliasing space */
564 if (node->base & 0x300L)
565 continue;
566
567 /* If we got here, then it is the right size
568 Now take it out of the list */
569 if (*head == node) {
570 *head = node->next;
571 } else {
572 prevnode = *head;
573 while (prevnode->next != node)
574 prevnode = prevnode->next;
575
576 prevnode->next = node->next;
577 }
578 node->next = NULL;
579 /* Stop looping */
580 break;
581 }
582
583 return node;
584}
585
586
587/*
588 * get_max_resource
589 *
590 * Gets the largest node that is at least "size" big from the
591 * list pointed to by head. It aligns the node on top and bottom
592 * to "size" alignment before returning it.
593 * J.I. modified to put max size limits of; 64M->32M->16M->8M->4M->1M
594 * This is needed to avoid allocating entire ACPI _CRS res to one child bridge/slot.
595 */
596static struct pci_resource *get_max_resource(struct pci_resource **head, u32 size)
597{
598 struct pci_resource *max;
599 struct pci_resource *temp;
600 struct pci_resource *split_node;
601 u32 temp_dword;
602 u32 max_size[] = { 0x4000000, 0x2000000, 0x1000000, 0x0800000, 0x0400000, 0x0200000, 0x0100000, 0x00 };
603 int i;
604
605 if (!(*head))
606 return NULL;
607
608 if (pciehp_resource_sort_and_combine(head))
609 return NULL;
610
611 if (sort_by_max_size(head))
612 return NULL;
613
614 for (max = *head;max; max = max->next) {
615
616 /* If not big enough we could probably just bail,
617 instead we'll continue to the next. */
618 if (max->length < size)
619 continue;
620
621 if (max->base & (size - 1)) {
622 /* this one isn't base aligned properly
623 so we'll make a new entry and split it up */
624 temp_dword = (max->base | (size-1)) + 1;
625
626 /* Short circuit if adjusted size is too small */
627 if ((max->length - (temp_dword - max->base)) < size)
628 continue;
629
630 split_node = kmalloc(sizeof(struct pci_resource),
631 GFP_KERNEL);
632
633 if (!split_node)
634 return NULL;
635
636 split_node->base = max->base;
637 split_node->length = temp_dword - max->base;
638 max->base = temp_dword;
639 max->length -= split_node->length;
640
641 /* Put it next in the list */
642 split_node->next = max->next;
643 max->next = split_node;
644 }
645
646 if ((max->base + max->length) & (size - 1)) {
647 /* this one isn't end aligned properly at the top
648 so we'll make a new entry and split it up */
649 split_node = kmalloc(sizeof(struct pci_resource),
650 GFP_KERNEL);
651
652 if (!split_node)
653 return NULL;
654 temp_dword = ((max->base + max->length) & ~(size - 1));
655 split_node->base = temp_dword;
656 split_node->length = max->length + max->base
657 - split_node->base;
658 max->length -= split_node->length;
659
660 /* Put it in the list */
661 split_node->next = max->next;
662 max->next = split_node;
663 }
664
665 /* Make sure it didn't shrink too much when we aligned it */
666 if (max->length < size)
667 continue;
668
669 for ( i = 0; max_size[i] > size; i++) {
670 if (max->length > max_size[i]) {
671 split_node = kmalloc(sizeof(struct pci_resource),
672 GFP_KERNEL);
673 if (!split_node)
674 break; /* return NULL; */
675 split_node->base = max->base + max_size[i];
676 split_node->length = max->length - max_size[i];
677 max->length = max_size[i];
678 /* Put it next in the list */
679 split_node->next = max->next;
680 max->next = split_node;
681 break;
682 }
683 }
684
685 /* Now take it out of the list */
686 temp = (struct pci_resource*) *head;
687 if (temp == max) {
688 *head = max->next;
689 } else {
690 while (temp && temp->next != max) {
691 temp = temp->next;
692 }
693
694 temp->next = max->next;
695 }
696
697 max->next = NULL;
698 return max;
699 }
700
701 /* If we get here, we couldn't find one */
702 return NULL;
703}
704
705
706/*
707 * get_resource
708 *
709 * this function sorts the resource list by size and then
710 * returns the first node of "size" length. If it finds a node
711 * larger than "size" it will split it up.
712 *
713 * size must be a power of two.
714 */
715static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
716{
717 struct pci_resource *prevnode;
718 struct pci_resource *node;
719 struct pci_resource *split_node;
720 u32 temp_dword;
721
722 if (!(*head))
723 return NULL;
724
725 if ( pciehp_resource_sort_and_combine(head) )
726 return NULL;
727
728 if ( sort_by_size(head) )
729 return NULL;
730
731 for (node = *head; node; node = node->next) {
732 dbg("%s: req_size =0x%x node=%p, base=0x%x, length=0x%x\n",
733 __FUNCTION__, size, node, node->base, node->length);
734 if (node->length < size)
735 continue;
736
737 if (node->base & (size - 1)) {
738 dbg("%s: not aligned\n", __FUNCTION__);
739 /* this one isn't base aligned properly
740 so we'll make a new entry and split it up */
741 temp_dword = (node->base | (size-1)) + 1;
742
743 /* Short circuit if adjusted size is too small */
744 if ((node->length - (temp_dword - node->base)) < size)
745 continue;
746
747 split_node = kmalloc(sizeof(struct pci_resource),
748 GFP_KERNEL);
749
750 if (!split_node)
751 return NULL;
752
753 split_node->base = node->base;
754 split_node->length = temp_dword - node->base;
755 node->base = temp_dword;
756 node->length -= split_node->length;
757
758 /* Put it in the list */
759 split_node->next = node->next;
760 node->next = split_node;
761 } /* End of non-aligned base */
762
763 /* Don't need to check if too small since we already did */
764 if (node->length > size) {
765 dbg("%s: too big\n", __FUNCTION__);
766 /* this one is longer than we need
767 so we'll make a new entry and split it up */
768 split_node = kmalloc(sizeof(struct pci_resource),
769 GFP_KERNEL);
770
771 if (!split_node)
772 return NULL;
773
774 split_node->base = node->base + size;
775 split_node->length = node->length - size;
776 node->length = size;
777
778 /* Put it in the list */
779 split_node->next = node->next;
780 node->next = split_node;
781 } /* End of too big on top end */
782
783 dbg("%s: got one!!!\n", __FUNCTION__);
784 /* If we got here, then it is the right size
785 Now take it out of the list */
786 if (*head == node) {
787 *head = node->next;
788 } else {
789 prevnode = *head;
790 while (prevnode->next != node)
791 prevnode = prevnode->next;
792
793 prevnode->next = node->next;
794 }
795 node->next = NULL;
796 /* Stop looping */
797 break;
798 }
799 return node;
800}
801
802
803/*
804 * pciehp_resource_sort_and_combine
805 *
806 * Sorts all of the nodes in the list in ascending order by
807 * their base addresses. Also does garbage collection by
808 * combining adjacent nodes.
809 *
810 * returns 0 if success
811 */
812int pciehp_resource_sort_and_combine(struct pci_resource **head)
813{
814 struct pci_resource *node1;
815 struct pci_resource *node2;
816 int out_of_order = 1;
817
818 dbg("%s: head = %p, *head = %p\n", __FUNCTION__, head, *head);
819
820 if (!(*head))
821 return 1;
822
823 dbg("*head->next = %p\n",(*head)->next);
824
825 if (!(*head)->next)
826 return 0; /* only one item on the list, already sorted! */
827
828 dbg("*head->base = 0x%x\n",(*head)->base);
829 dbg("*head->next->base = 0x%x\n",(*head)->next->base);
830 while (out_of_order) {
831 out_of_order = 0;
832
833 /* Special case for swapping list head */
834 if (((*head)->next) &&
835 ((*head)->base > (*head)->next->base)) {
836 node1 = *head;
837 (*head) = (*head)->next;
838 node1->next = (*head)->next;
839 (*head)->next = node1;
840 out_of_order++;
841 }
842
843 node1 = (*head);
844
845 while (node1->next && node1->next->next) {
846 if (node1->next->base > node1->next->next->base) {
847 out_of_order++;
848 node2 = node1->next;
849 node1->next = node1->next->next;
850 node1 = node1->next;
851 node2->next = node1->next;
852 node1->next = node2;
853 } else
854 node1 = node1->next;
855 }
856 } /* End of out_of_order loop */
857
858 node1 = *head;
859
860 while (node1 && node1->next) {
861 if ((node1->base + node1->length) == node1->next->base) {
862 /* Combine */
863 dbg("8..\n");
864 node1->length += node1->next->length;
865 node2 = node1->next;
866 node1->next = node1->next->next;
867 kfree(node2);
868 } else
869 node1 = node1->next;
870 }
871
872 return 0;
873}
874
875
876/**
877 * pciehp_slot_create - Creates a node and adds it to the proper bus.
878 * @busnumber - bus where new node is to be located
879 *
880 * Returns pointer to the new node or NULL if unsuccessful
881 */
882struct pci_func *pciehp_slot_create(u8 busnumber)
883{
884 struct pci_func *new_slot;
885 struct pci_func *next;
886 dbg("%s: busnumber %x\n", __FUNCTION__, busnumber);
887 new_slot = kmalloc(sizeof(struct pci_func), GFP_KERNEL);
888
889 if (new_slot == NULL)
890 return new_slot;
891
892 memset(new_slot, 0, sizeof(struct pci_func));
893
894 new_slot->next = NULL;
895 new_slot->configured = 1;
896
897 if (pciehp_slot_list[busnumber] == NULL) {
898 pciehp_slot_list[busnumber] = new_slot;
899 } else {
900 next = pciehp_slot_list[busnumber];
901 while (next->next != NULL)
902 next = next->next;
903 next->next = new_slot;
904 }
905 return new_slot;
906}
907
908
909/**
910 * slot_remove - Removes a node from the linked list of slots.
911 * @old_slot: slot to remove
912 *
913 * Returns 0 if successful, !0 otherwise.
914 */
915static int slot_remove(struct pci_func * old_slot)
916{
917 struct pci_func *next;
918
919 if (old_slot == NULL)
920 return 1;
921
922 next = pciehp_slot_list[old_slot->bus];
923
924 if (next == NULL)
925 return 1;
926
927 if (next == old_slot) {
928 pciehp_slot_list[old_slot->bus] = old_slot->next;
929 pciehp_destroy_board_resources(old_slot);
930 kfree(old_slot);
931 return 0;
932 }
933
934 while ((next->next != old_slot) && (next->next != NULL)) {
935 next = next->next;
936 }
937
938 if (next->next == old_slot) {
939 next->next = old_slot->next;
940 pciehp_destroy_board_resources(old_slot);
941 kfree(old_slot);
942 return 0;
943 } else
944 return 2;
945}
946
947
948/**
949 * bridge_slot_remove - Removes a node from the linked list of slots.
950 * @bridge: bridge to remove
951 *
952 * Returns 0 if successful, !0 otherwise.
953 */
954static int bridge_slot_remove(struct pci_func *bridge)
955{
956 u8 subordinateBus, secondaryBus;
957 u8 tempBus;
958 struct pci_func *next;
959
960 if (bridge == NULL)
961 return 1;
962
963 secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
964 subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
965
966 for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
967 next = pciehp_slot_list[tempBus];
968
969 while (!slot_remove(next)) {
970 next = pciehp_slot_list[tempBus];
971 }
972 }
973
974 next = pciehp_slot_list[bridge->bus];
975
976 if (next == NULL) {
977 return 1;
978 }
979
980 if (next == bridge) {
981 pciehp_slot_list[bridge->bus] = bridge->next;
982 kfree(bridge);
983 return 0;
984 }
985
986 while ((next->next != bridge) && (next->next != NULL)) {
987 next = next->next;
988 }
989
990 if (next->next == bridge) {
991 next->next = bridge->next;
992 kfree(bridge);
993 return 0;
994 } else
995 return 2;
996}
997
998
999/**
1000 * pciehp_slot_find - Looks for a node by bus, and device, multiple functions accessed
1001 * @bus: bus to find
1002 * @device: device to find
1003 * @index: is 0 for first function found, 1 for the second...
1004 *
1005 * Returns pointer to the node if successful, %NULL otherwise.
1006 */
1007struct pci_func *pciehp_slot_find(u8 bus, u8 device, u8 index)
1008{
1009 int found = -1;
1010 struct pci_func *func;
1011
1012 func = pciehp_slot_list[bus];
1013 dbg("%s: bus %x device %x index %x\n",
1014 __FUNCTION__, bus, device, index);
1015 if (func != NULL) {
1016 dbg("%s: func-> bus %x device %x function %x pci_dev %p\n",
1017 __FUNCTION__, func->bus, func->device, func->function,
1018 func->pci_dev);
1019 } else
1020 dbg("%s: func == NULL\n", __FUNCTION__);
1021
1022 if ((func == NULL) || ((func->device == device) && (index == 0)))
1023 return func;
1024
1025 if (func->device == device)
1026 found++;
1027
1028 while (func->next != NULL) {
1029 func = func->next;
1030
1031 dbg("%s: In while loop, func-> bus %x device %x function %x pci_dev %p\n",
1032 __FUNCTION__, func->bus, func->device, func->function,
1033 func->pci_dev);
1034 if (func->device == device)
1035 found++;
1036 dbg("%s: while loop, found %d, index %d\n", __FUNCTION__,
1037 found, index);
1038
1039 if ((found == index) || (func->function == index)) {
1040 dbg("%s: Found bus %x dev %x func %x\n", __FUNCTION__,
1041 func->bus, func->device, func->function);
1042 return func;
1043 }
1044 }
1045
1046 return NULL;
1047}
1048
1049static int is_bridge(struct pci_func * func)
1050{
1051 /* Check the header type */
1052 if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1053 return 1;
1054 else
1055 return 0;
1056}
1057
1058
1059/* The following routines constitute the bulk of the
1060 hotplug controller logic
1061 */
1062
1063static void set_slot_off(struct controller *ctrl, struct slot * pslot)
1064{
1065 /* Wait for exclusive access to hardware */
1066 down(&ctrl->crit_sect);
1067
1068 /* turn off slot, turn on Amber LED, turn off Green LED if supported*/
1069 if (POWER_CTRL(ctrl->ctrlcap)) {
1070 if (pslot->hpc_ops->power_off_slot(pslot)) {
1071 err("%s: Issue of Slot Power Off command failed\n", __FUNCTION__);
1072 up(&ctrl->crit_sect);
1073 return;
1074 }
1075 wait_for_ctrl_irq (ctrl);
1076 }
1077
1078 if (PWR_LED(ctrl->ctrlcap)) {
1079 pslot->hpc_ops->green_led_off(pslot);
1080 wait_for_ctrl_irq (ctrl);
1081 }
1082
1083 if (ATTN_LED(ctrl->ctrlcap)) {
1084 if (pslot->hpc_ops->set_attention_status(pslot, 1)) {
1085 err("%s: Issue of Set Attention Led command failed\n", __FUNCTION__);
1086 up(&ctrl->crit_sect);
1087 return;
1088 }
1089 wait_for_ctrl_irq (ctrl);
1090 }
1091
1092 /* Done with exclusive hardware access */
1093 up(&ctrl->crit_sect);
1094}
1095
1096/**
1097 * board_added - Called after a board has been added to the system.
1098 *
1099 * Turns power on for the board
1100 * Configures board
1101 *
1102 */
1103static u32 board_added(struct pci_func * func, struct controller * ctrl)
1104{
1105 u8 hp_slot;
1106 int index;
1107 u32 temp_register = 0xFFFFFFFF;
1108 u32 rc = 0;
1109 struct pci_func *new_func = NULL;
1110 struct slot *p_slot;
1111 struct resource_lists res_lists;
1112
1113 p_slot = pciehp_find_slot(ctrl, func->device);
1114 hp_slot = func->device - ctrl->slot_device_offset;
1115
1116 dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n", __FUNCTION__, func->device, ctrl->slot_device_offset, hp_slot);
1117
1118 /* Wait for exclusive access to hardware */
1119 down(&ctrl->crit_sect);
1120
1121 if (POWER_CTRL(ctrl->ctrlcap)) {
1122 /* Power on slot */
1123 rc = p_slot->hpc_ops->power_on_slot(p_slot);
1124 if (rc) {
1125 up(&ctrl->crit_sect);
1126 return -1;
1127 }
1128
1129 /* Wait for the command to complete */
1130 wait_for_ctrl_irq (ctrl);
1131 }
1132
1133 if (PWR_LED(ctrl->ctrlcap)) {
1134 p_slot->hpc_ops->green_led_blink(p_slot);
1135
1136 /* Wait for the command to complete */
1137 wait_for_ctrl_irq (ctrl);
1138 }
1139
1140 /* Done with exclusive hardware access */
1141 up(&ctrl->crit_sect);
1142
1143 /* Wait for ~1 second */
1144 dbg("%s: before long_delay\n", __FUNCTION__);
1145 wait_for_ctrl_irq (ctrl);
1146 dbg("%s: afterlong_delay\n", __FUNCTION__);
1147
1148 /* Check link training status */
1149 rc = p_slot->hpc_ops->check_lnk_status(ctrl);
1150 if (rc) {
1151 err("%s: Failed to check link status\n", __FUNCTION__);
1152 set_slot_off(ctrl, p_slot);
1153 return rc;
1154 }
1155
1156 dbg("%s: func status = %x\n", __FUNCTION__, func->status);
1157
1158 /* Check for a power fault */
1159 if (func->status == 0xFF) {
1160 /* power fault occurred, but it was benign */
1161 temp_register = 0xFFFFFFFF;
1162 dbg("%s: temp register set to %x by power fault\n", __FUNCTION__, temp_register);
1163 rc = POWER_FAILURE;
1164 func->status = 0;
1165 } else {
1166 /* Get vendor/device ID u32 */
1167 rc = pci_bus_read_config_dword (ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function),
1168 PCI_VENDOR_ID, &temp_register);
1169 dbg("%s: pci_bus_read_config_dword returns %d\n", __FUNCTION__, rc);
1170 dbg("%s: temp_register is %x\n", __FUNCTION__, temp_register);
1171
1172 if (rc != 0) {
1173 /* Something's wrong here */
1174 temp_register = 0xFFFFFFFF;
1175 dbg("%s: temp register set to %x by error\n", __FUNCTION__, temp_register);
1176 }
1177 /* Preset return code. It will be changed later if things go okay. */
1178 rc = NO_ADAPTER_PRESENT;
1179 }
1180
1181 /* All F's is an empty slot or an invalid board */
1182 if (temp_register != 0xFFFFFFFF) { /* Check for a board in the slot */
1183 res_lists.io_head = ctrl->io_head;
1184 res_lists.mem_head = ctrl->mem_head;
1185 res_lists.p_mem_head = ctrl->p_mem_head;
1186 res_lists.bus_head = ctrl->bus_head;
1187 res_lists.irqs = NULL;
1188
1189 rc = configure_new_device(ctrl, func, 0, &res_lists, 0, 0);
1190 dbg("%s: back from configure_new_device\n", __FUNCTION__);
1191
1192 ctrl->io_head = res_lists.io_head;
1193 ctrl->mem_head = res_lists.mem_head;
1194 ctrl->p_mem_head = res_lists.p_mem_head;
1195 ctrl->bus_head = res_lists.bus_head;
1196
1197 pciehp_resource_sort_and_combine(&(ctrl->mem_head));
1198 pciehp_resource_sort_and_combine(&(ctrl->p_mem_head));
1199 pciehp_resource_sort_and_combine(&(ctrl->io_head));
1200 pciehp_resource_sort_and_combine(&(ctrl->bus_head));
1201
1202 if (rc) {
1203 set_slot_off(ctrl, p_slot);
1204 return rc;
1205 }
1206 pciehp_save_slot_config(ctrl, func);
1207
1208 func->status = 0;
1209 func->switch_save = 0x10;
1210 func->is_a_board = 0x01;
1211
1212 /* next, we will instantiate the linux pci_dev structures
1213 * (with appropriate driver notification, if already present)
1214 */
1215 index = 0;
1216 do {
1217 new_func = pciehp_slot_find(ctrl->slot_bus, func->device, index++);
1218 if (new_func && !new_func->pci_dev) {
1219 dbg("%s:call pci_hp_configure_dev, func %x\n",
1220 __FUNCTION__, index);
1221 pciehp_configure_device(ctrl, new_func);
1222 }
1223 } while (new_func);
1224
1225 /*
1226 * Some PCI Express root ports require fixup after hot-plug operation.
1227 */
1228 if (pcie_mch_quirk)
1229 pci_fixup_device(pci_fixup_final, ctrl->pci_dev);
1230
1231 if (PWR_LED(ctrl->ctrlcap)) {
1232 /* Wait for exclusive access to hardware */
1233 down(&ctrl->crit_sect);
1234
1235 p_slot->hpc_ops->green_led_on(p_slot);
1236
1237 /* Wait for the command to complete */
1238 wait_for_ctrl_irq (ctrl);
1239
1240 /* Done with exclusive hardware access */
1241 up(&ctrl->crit_sect);
1242 }
1243 } else {
1244 set_slot_off(ctrl, p_slot);
1245 return -1;
1246 }
1247 return 0;
1248}
1249
1250
1251/**
1252 * remove_board - Turns off slot and LED's
1253 *
1254 */
1255static u32 remove_board(struct pci_func *func, struct controller *ctrl)
1256{
1257 int index;
1258 u8 skip = 0;
1259 u8 device;
1260 u8 hp_slot;
1261 u32 rc;
1262 struct resource_lists res_lists;
1263 struct pci_func *temp_func;
1264 struct slot *p_slot;
1265
1266 if (func == NULL)
1267 return 1;
1268
1269 if (pciehp_unconfigure_device(func))
1270 return 1;
1271
1272 device = func->device;
1273
1274 hp_slot = func->device - ctrl->slot_device_offset;
1275 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1276
1277 dbg("In %s, hp_slot = %d\n", __FUNCTION__, hp_slot);
1278
1279 if ((ctrl->add_support) &&
1280 !(func->bus_head || func->mem_head || func->p_mem_head || func->io_head)) {
1281 /* Here we check to see if we've saved any of the board's
1282 * resources already. If so, we'll skip the attempt to
1283 * determine what's being used.
1284 */
1285 index = 0;
1286
1287 temp_func = func;
1288
1289 while ((temp_func = pciehp_slot_find(temp_func->bus, temp_func->device, index++))) {
1290 if (temp_func->bus_head || temp_func->mem_head
1291 || temp_func->p_mem_head || temp_func->io_head) {
1292 skip = 1;
1293 break;
1294 }
1295 }
1296
1297 if (!skip)
1298 rc = pciehp_save_used_resources(ctrl, func, DISABLE_CARD);
1299 }
1300 /* Change status to shutdown */
1301 if (func->is_a_board)
1302 func->status = 0x01;
1303 func->configured = 0;
1304
1305 /* Wait for exclusive access to hardware */
1306 down(&ctrl->crit_sect);
1307
1308 if (POWER_CTRL(ctrl->ctrlcap)) {
1309 /* power off slot */
1310 rc = p_slot->hpc_ops->power_off_slot(p_slot);
1311 if (rc) {
1312 err("%s: Issue of Slot Disable command failed\n", __FUNCTION__);
1313 up(&ctrl->crit_sect);
1314 return rc;
1315 }
1316 /* Wait for the command to complete */
1317 wait_for_ctrl_irq (ctrl);
1318 }
1319
1320 if (PWR_LED(ctrl->ctrlcap)) {
1321 /* turn off Green LED */
1322 p_slot->hpc_ops->green_led_off(p_slot);
1323
1324 /* Wait for the command to complete */
1325 wait_for_ctrl_irq (ctrl);
1326 }
1327
1328 /* Done with exclusive hardware access */
1329 up(&ctrl->crit_sect);
1330
1331 if (ctrl->add_support) {
1332 while (func) {
1333 res_lists.io_head = ctrl->io_head;
1334 res_lists.mem_head = ctrl->mem_head;
1335 res_lists.p_mem_head = ctrl->p_mem_head;
1336 res_lists.bus_head = ctrl->bus_head;
1337
1338 dbg("Returning resources to ctlr lists for (B/D/F) = (%#x/%#x/%#x)\n",
1339 func->bus, func->device, func->function);
1340
1341 pciehp_return_board_resources(func, &res_lists);
1342
1343 ctrl->io_head = res_lists.io_head;
1344 ctrl->mem_head = res_lists.mem_head;
1345 ctrl->p_mem_head = res_lists.p_mem_head;
1346 ctrl->bus_head = res_lists.bus_head;
1347
1348 pciehp_resource_sort_and_combine(&(ctrl->mem_head));
1349 pciehp_resource_sort_and_combine(&(ctrl->p_mem_head));
1350 pciehp_resource_sort_and_combine(&(ctrl->io_head));
1351 pciehp_resource_sort_and_combine(&(ctrl->bus_head));
1352
1353 if (is_bridge(func)) {
1354 dbg("PCI Bridge Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n",
1355 ctrl->seg, func->bus, func->device, func->function);
1356 bridge_slot_remove(func);
1357 } else {
1358 dbg("PCI Function Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n",
1359 ctrl->seg, func->bus, func->device, func->function);
1360 slot_remove(func);
1361 }
1362
1363 func = pciehp_slot_find(ctrl->slot_bus, device, 0);
1364 }
1365
1366 /* Setup slot structure with entry for empty slot */
1367 func = pciehp_slot_create(ctrl->slot_bus);
1368
1369 if (func == NULL) {
1370 return 1;
1371 }
1372
1373 func->bus = ctrl->slot_bus;
1374 func->device = device;
1375 func->function = 0;
1376 func->configured = 0;
1377 func->switch_save = 0x10;
1378 func->is_a_board = 0;
1379 }
1380
1381 return 0;
1382}
1383
1384
1385static void pushbutton_helper_thread(unsigned long data)
1386{
1387 pushbutton_pending = data;
1388
1389 up(&event_semaphore);
1390}
1391
1392/**
1393 * pciehp_pushbutton_thread
1394 *
1395 * Scheduled procedure to handle blocking stuff for the pushbuttons
1396 * Handles all pending events and exits.
1397 *
1398 */
1399static void pciehp_pushbutton_thread(unsigned long slot)
1400{
1401 struct slot *p_slot = (struct slot *) slot;
1402 u8 getstatus;
1403
1404 pushbutton_pending = 0;
1405
1406 if (!p_slot) {
1407 dbg("%s: Error! slot NULL\n", __FUNCTION__);
1408 return;
1409 }
1410
1411 p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1412 if (getstatus) {
1413 p_slot->state = POWEROFF_STATE;
1414 dbg("In power_down_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
1415
1416 pciehp_disable_slot(p_slot);
1417 p_slot->state = STATIC_STATE;
1418 } else {
1419 p_slot->state = POWERON_STATE;
1420 dbg("In add_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
1421
1422 if (pciehp_enable_slot(p_slot) && PWR_LED(p_slot->ctrl->ctrlcap)) {
1423 /* Wait for exclusive access to hardware */
1424 down(&p_slot->ctrl->crit_sect);
1425
1426 p_slot->hpc_ops->green_led_off(p_slot);
1427
1428 /* Wait for the command to complete */
1429 wait_for_ctrl_irq (p_slot->ctrl);
1430
1431 /* Done with exclusive hardware access */
1432 up(&p_slot->ctrl->crit_sect);
1433 }
1434 p_slot->state = STATIC_STATE;
1435 }
1436
1437 return;
1438}
1439
1440/**
1441 * pciehp_surprise_rm_thread
1442 *
1443 * Scheduled procedure to handle blocking stuff for the surprise removal
1444 * Handles all pending events and exits.
1445 *
1446 */
1447static void pciehp_surprise_rm_thread(unsigned long slot)
1448{
1449 struct slot *p_slot = (struct slot *) slot;
1450 u8 getstatus;
1451
1452 surprise_rm_pending = 0;
1453
1454 if (!p_slot) {
1455 dbg("%s: Error! slot NULL\n", __FUNCTION__);
1456 return;
1457 }
1458
1459 p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus);
1460 if (!getstatus) {
1461 p_slot->state = POWEROFF_STATE;
1462 dbg("In removing board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
1463
1464 pciehp_disable_slot(p_slot);
1465 p_slot->state = STATIC_STATE;
1466 } else {
1467 p_slot->state = POWERON_STATE;
1468 dbg("In add_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
1469
1470 if (pciehp_enable_slot(p_slot) && PWR_LED(p_slot->ctrl->ctrlcap)) {
1471 /* Wait for exclusive access to hardware */
1472 down(&p_slot->ctrl->crit_sect);
1473
1474 p_slot->hpc_ops->green_led_off(p_slot);
1475
1476 /* Wait for the command to complete */
1477 wait_for_ctrl_irq (p_slot->ctrl);
1478
1479 /* Done with exclusive hardware access */
1480 up(&p_slot->ctrl->crit_sect);
1481 }
1482 p_slot->state = STATIC_STATE;
1483 }
1484
1485 return;
1486}
1487
1488
1489
1490/* this is the main worker thread */
1491static int event_thread(void* data)
1492{
1493 struct controller *ctrl;
1494 lock_kernel();
1495 daemonize("pciehpd_event");
1496
1497 unlock_kernel();
1498
1499 while (1) {
1500 dbg("!!!!event_thread sleeping\n");
1501 down_interruptible (&event_semaphore);
1502 dbg("event_thread woken finished = %d\n", event_finished);
1503 if (event_finished || signal_pending(current))
1504 break;
1505 /* Do stuff here */
1506 if (pushbutton_pending)
1507 pciehp_pushbutton_thread(pushbutton_pending);
1508 else if (surprise_rm_pending)
1509 pciehp_surprise_rm_thread(surprise_rm_pending);
1510 else
1511 for (ctrl = pciehp_ctrl_list; ctrl; ctrl=ctrl->next)
1512 interrupt_event_handler(ctrl);
1513 }
1514 dbg("event_thread signals exit\n");
1515 up(&event_exit);
1516 return 0;
1517}
1518
1519int pciehp_event_start_thread(void)
1520{
1521 int pid;
1522
1523 /* initialize our semaphores */
1524 init_MUTEX_LOCKED(&event_exit);
1525 event_finished=0;
1526
1527 init_MUTEX_LOCKED(&event_semaphore);
1528 pid = kernel_thread(event_thread, NULL, 0);
1529
1530 if (pid < 0) {
1531 err ("Can't start up our event thread\n");
1532 return -1;
1533 }
1534 dbg("Our event thread pid = %d\n", pid);
1535 return 0;
1536}
1537
1538
1539void pciehp_event_stop_thread(void)
1540{
1541 event_finished = 1;
1542 dbg("event_thread finish command given\n");
1543 up(&event_semaphore);
1544 dbg("wait for event_thread to exit\n");
1545 down(&event_exit);
1546}
1547
1548
1549static int update_slot_info(struct slot *slot)
1550{
1551 struct hotplug_slot_info *info;
1552 /* char buffer[SLOT_NAME_SIZE]; */
1553 int result;
1554
1555 info = kmalloc(sizeof(struct hotplug_slot_info), GFP_KERNEL);
1556 if (!info)
1557 return -ENOMEM;
1558
1559 /* make_slot_name (&buffer[0], SLOT_NAME_SIZE, slot); */
1560
1561 slot->hpc_ops->get_power_status(slot, &(info->power_status));
1562 slot->hpc_ops->get_attention_status(slot, &(info->attention_status));
1563 slot->hpc_ops->get_latch_status(slot, &(info->latch_status));
1564 slot->hpc_ops->get_adapter_status(slot, &(info->adapter_status));
1565
1566 /* result = pci_hp_change_slot_info(buffer, info); */
1567 result = pci_hp_change_slot_info(slot->hotplug_slot, info);
1568 kfree (info);
1569 return result;
1570}
1571
1572static void interrupt_event_handler(struct controller *ctrl)
1573{
1574 int loop = 0;
1575 int change = 1;
1576 struct pci_func *func;
1577 u8 hp_slot;
1578 u8 getstatus;
1579 struct slot *p_slot;
1580
1581 while (change) {
1582 change = 0;
1583
1584 for (loop = 0; loop < 10; loop++) {
1585 if (ctrl->event_queue[loop].event_type != 0) {
1586 hp_slot = ctrl->event_queue[loop].hp_slot;
1587
1588 func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
1589
1590 p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1591
1592 dbg("hp_slot %d, func %p, p_slot %p\n", hp_slot, func, p_slot);
1593
1594 if (ctrl->event_queue[loop].event_type == INT_BUTTON_CANCEL) {
1595 dbg("button cancel\n");
1596 del_timer(&p_slot->task_event);
1597
1598 switch (p_slot->state) {
1599 case BLINKINGOFF_STATE:
1600 /* Wait for exclusive access to hardware */
1601 down(&ctrl->crit_sect);
1602
1603 if (PWR_LED(ctrl->ctrlcap)) {
1604 p_slot->hpc_ops->green_led_on(p_slot);
1605 /* Wait for the command to complete */
1606 wait_for_ctrl_irq (ctrl);
1607 }
1608 if (ATTN_LED(ctrl->ctrlcap)) {
1609 p_slot->hpc_ops->set_attention_status(p_slot, 0);
1610
1611 /* Wait for the command to complete */
1612 wait_for_ctrl_irq (ctrl);
1613 }
1614 /* Done with exclusive hardware access */
1615 up(&ctrl->crit_sect);
1616 break;
1617 case BLINKINGON_STATE:
1618 /* Wait for exclusive access to hardware */
1619 down(&ctrl->crit_sect);
1620
1621 if (PWR_LED(ctrl->ctrlcap)) {
1622 p_slot->hpc_ops->green_led_off(p_slot);
1623 /* Wait for the command to complete */
1624 wait_for_ctrl_irq (ctrl);
1625 }
1626 if (ATTN_LED(ctrl->ctrlcap)){
1627 p_slot->hpc_ops->set_attention_status(p_slot, 0);
1628 /* Wait for the command to complete */
1629 wait_for_ctrl_irq (ctrl);
1630 }
1631 /* Done with exclusive hardware access */
1632 up(&ctrl->crit_sect);
1633
1634 break;
1635 default:
1636 warn("Not a valid state\n");
1637 return;
1638 }
1639 info(msg_button_cancel, p_slot->number);
1640 p_slot->state = STATIC_STATE;
1641 }
1642 /* ***********Button Pressed (No action on 1st press...) */
1643 else if (ctrl->event_queue[loop].event_type == INT_BUTTON_PRESS) {
1644
1645 if (ATTN_BUTTN(ctrl->ctrlcap)) {
1646 dbg("Button pressed\n");
1647 p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1648 if (getstatus) {
1649 /* slot is on */
1650 dbg("slot is on\n");
1651 p_slot->state = BLINKINGOFF_STATE;
1652 info(msg_button_off, p_slot->number);
1653 } else {
1654 /* slot is off */
1655 dbg("slot is off\n");
1656 p_slot->state = BLINKINGON_STATE;
1657 info(msg_button_on, p_slot->number);
1658 }
1659
1660 /* Wait for exclusive access to hardware */
1661 down(&ctrl->crit_sect);
1662
1663 /* blink green LED and turn off amber */
1664 if (PWR_LED(ctrl->ctrlcap)) {
1665 p_slot->hpc_ops->green_led_blink(p_slot);
1666 /* Wait for the command to complete */
1667 wait_for_ctrl_irq (ctrl);
1668 }
1669
1670 if (ATTN_LED(ctrl->ctrlcap)) {
1671 p_slot->hpc_ops->set_attention_status(p_slot, 0);
1672
1673 /* Wait for the command to complete */
1674 wait_for_ctrl_irq (ctrl);
1675 }
1676
1677 /* Done with exclusive hardware access */
1678 up(&ctrl->crit_sect);
1679
1680 init_timer(&p_slot->task_event);
1681 p_slot->task_event.expires = jiffies + 5 * HZ; /* 5 second delay */
1682 p_slot->task_event.function = (void (*)(unsigned long)) pushbutton_helper_thread;
1683 p_slot->task_event.data = (unsigned long) p_slot;
1684
1685 dbg("add_timer p_slot = %p\n", (void *) p_slot);
1686 add_timer(&p_slot->task_event);
1687 }
1688 }
1689 /***********POWER FAULT********************/
1690 else if (ctrl->event_queue[loop].event_type == INT_POWER_FAULT) {
1691 if (POWER_CTRL(ctrl->ctrlcap)) {
1692 dbg("power fault\n");
1693 /* Wait for exclusive access to hardware */
1694 down(&ctrl->crit_sect);
1695
1696 if (ATTN_LED(ctrl->ctrlcap)) {
1697 p_slot->hpc_ops->set_attention_status(p_slot, 1);
1698 wait_for_ctrl_irq (ctrl);
1699 }
1700
1701 if (PWR_LED(ctrl->ctrlcap)) {
1702 p_slot->hpc_ops->green_led_off(p_slot);
1703 wait_for_ctrl_irq (ctrl);
1704 }
1705
1706 /* Done with exclusive hardware access */
1707 up(&ctrl->crit_sect);
1708 }
1709 }
1710 /***********SURPRISE REMOVAL********************/
1711 else if ((ctrl->event_queue[loop].event_type == INT_PRESENCE_ON) ||
1712 (ctrl->event_queue[loop].event_type == INT_PRESENCE_OFF)) {
1713 if (HP_SUPR_RM(ctrl->ctrlcap)) {
1714 dbg("Surprise Removal\n");
1715 if (p_slot) {
1716 surprise_rm_pending = (unsigned long) p_slot;
1717 up(&event_semaphore);
1718 update_slot_info(p_slot);
1719 }
1720 }
1721 } else {
1722 /* refresh notification */
1723 if (p_slot)
1724 update_slot_info(p_slot);
1725 }
1726
1727 ctrl->event_queue[loop].event_type = 0;
1728
1729 change = 1;
1730 }
1731 } /* End of FOR loop */
1732 }
1733}
1734
1735
1736int pciehp_enable_slot(struct slot *p_slot)
1737{
1738 u8 getstatus = 0;
1739 int rc;
1740 struct pci_func *func;
1741
1742 func = pciehp_slot_find(p_slot->bus, p_slot->device, 0);
1743 if (!func) {
1744 dbg("%s: Error! slot NULL\n", __FUNCTION__);
1745 return 1;
1746 }
1747
1748 /* Check to see if (latch closed, card present, power off) */
1749 down(&p_slot->ctrl->crit_sect);
1750
1751 rc = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus);
1752 if (rc || !getstatus) {
1753 info("%s: no adapter on slot(%x)\n", __FUNCTION__, p_slot->number);
1754 up(&p_slot->ctrl->crit_sect);
1755 return 1;
1756 }
1757 if (MRL_SENS(p_slot->ctrl->ctrlcap)) {
1758 rc = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1759 if (rc || getstatus) {
1760 info("%s: latch open on slot(%x)\n", __FUNCTION__, p_slot->number);
1761 up(&p_slot->ctrl->crit_sect);
1762 return 1;
1763 }
1764 }
1765
1766 if (POWER_CTRL(p_slot->ctrl->ctrlcap)) {
1767 rc = p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1768 if (rc || getstatus) {
1769 info("%s: already enabled on slot(%x)\n", __FUNCTION__, p_slot->number);
1770 up(&p_slot->ctrl->crit_sect);
1771 return 1;
1772 }
1773 }
1774 up(&p_slot->ctrl->crit_sect);
1775
1776 slot_remove(func);
1777
1778 func = pciehp_slot_create(p_slot->bus);
1779 if (func == NULL)
1780 return 1;
1781
1782 func->bus = p_slot->bus;
1783 func->device = p_slot->device;
1784 func->function = 0;
1785 func->configured = 0;
1786 func->is_a_board = 1;
1787
1788 /* We have to save the presence info for these slots */
1789 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
1790 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1791 func->switch_save = !getstatus? 0x10:0;
1792
1793 rc = board_added(func, p_slot->ctrl);
1794 if (rc) {
1795 if (is_bridge(func))
1796 bridge_slot_remove(func);
1797 else
1798 slot_remove(func);
1799
1800 /* Setup slot structure with entry for empty slot */
1801 func = pciehp_slot_create(p_slot->bus);
1802 if (func == NULL)
1803 return 1; /* Out of memory */
1804
1805 func->bus = p_slot->bus;
1806 func->device = p_slot->device;
1807 func->function = 0;
1808 func->configured = 0;
1809 func->is_a_board = 1;
1810
1811 /* We have to save the presence info for these slots */
1812 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
1813 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1814 func->switch_save = !getstatus? 0x10:0;
1815 }
1816
1817 if (p_slot)
1818 update_slot_info(p_slot);
1819
1820 return rc;
1821}
1822
1823
1824int pciehp_disable_slot(struct slot *p_slot)
1825{
1826 u8 class_code, header_type, BCR;
1827 u8 index = 0;
1828 u8 getstatus = 0;
1829 u32 rc = 0;
1830 int ret = 0;
1831 unsigned int devfn;
1832 struct pci_bus *pci_bus = p_slot->ctrl->pci_dev->subordinate;
1833 struct pci_func *func;
1834
1835 if (!p_slot->ctrl)
1836 return 1;
1837
1838 /* Check to see if (latch closed, card present, power on) */
1839 down(&p_slot->ctrl->crit_sect);
1840
1841 if (!HP_SUPR_RM(p_slot->ctrl->ctrlcap)) {
1842 ret = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus);
1843 if (ret || !getstatus) {
1844 info("%s: no adapter on slot(%x)\n", __FUNCTION__, p_slot->number);
1845 up(&p_slot->ctrl->crit_sect);
1846 return 1;
1847 }
1848 }
1849
1850 if (MRL_SENS(p_slot->ctrl->ctrlcap)) {
1851 ret = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1852 if (ret || getstatus) {
1853 info("%s: latch open on slot(%x)\n", __FUNCTION__, p_slot->number);
1854 up(&p_slot->ctrl->crit_sect);
1855 return 1;
1856 }
1857 }
1858
1859 if (POWER_CTRL(p_slot->ctrl->ctrlcap)) {
1860 ret = p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1861 if (ret || !getstatus) {
1862 info("%s: already disabled slot(%x)\n", __FUNCTION__, p_slot->number);
1863 up(&p_slot->ctrl->crit_sect);
1864 return 1;
1865 }
1866 }
1867
1868 up(&p_slot->ctrl->crit_sect);
1869
1870 func = pciehp_slot_find(p_slot->bus, p_slot->device, index++);
1871
1872 /* Make sure there are no video controllers here
1873 * for all func of p_slot
1874 */
1875 while (func && !rc) {
1876 pci_bus->number = func->bus;
1877 devfn = PCI_DEVFN(func->device, func->function);
1878
1879 /* Check the Class Code */
1880 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
1881 if (rc)
1882 return rc;
1883
1884 if (class_code == PCI_BASE_CLASS_DISPLAY) {
1885 /* Display/Video adapter (not supported) */
1886 rc = REMOVE_NOT_SUPPORTED;
1887 } else {
1888 /* See if it's a bridge */
1889 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1890 if (rc)
1891 return rc;
1892
1893 /* If it's a bridge, check the VGA Enable bit */
1894 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
1895 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
1896 if (rc)
1897 return rc;
1898
1899 /* If the VGA Enable bit is set, remove isn't supported */
1900 if (BCR & PCI_BRIDGE_CTL_VGA) {
1901 rc = REMOVE_NOT_SUPPORTED;
1902 }
1903 }
1904 }
1905
1906 func = pciehp_slot_find(p_slot->bus, p_slot->device, index++);
1907 }
1908
1909 func = pciehp_slot_find(p_slot->bus, p_slot->device, 0);
1910 if ((func != NULL) && !rc) {
1911 rc = remove_board(func, p_slot->ctrl);
1912 } else if (!rc)
1913 rc = 1;
1914
1915 if (p_slot)
1916 update_slot_info(p_slot);
1917
1918 return rc;
1919}
1920
1921
1922/**
1923 * configure_new_device - Configures the PCI header information of one board.
1924 *
1925 * @ctrl: pointer to controller structure
1926 * @func: pointer to function structure
1927 * @behind_bridge: 1 if this is a recursive call, 0 if not
1928 * @resources: pointer to set of resource lists
1929 *
1930 * Returns 0 if success
1931 *
1932 */
1933static u32 configure_new_device(struct controller * ctrl, struct pci_func * func,
1934 u8 behind_bridge, struct resource_lists * resources, u8 bridge_bus, u8 bridge_dev)
1935{
1936 u8 temp_byte, function, max_functions, stop_it;
1937 int rc;
1938 u32 ID;
1939 struct pci_func *new_slot;
1940 struct pci_bus lpci_bus, *pci_bus;
1941 int index;
1942
1943 new_slot = func;
1944
1945 dbg("%s\n", __FUNCTION__);
1946 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
1947 pci_bus = &lpci_bus;
1948 pci_bus->number = func->bus;
1949
1950 /* Check for Multi-function device */
1951 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
1952 if (rc) {
1953 dbg("%s: rc = %d\n", __FUNCTION__, rc);
1954 return rc;
1955 }
1956
1957 if (temp_byte & 0x80) /* Multi-function device */
1958 max_functions = 8;
1959 else
1960 max_functions = 1;
1961
1962 function = 0;
1963
1964 do {
1965 rc = configure_new_function(ctrl, new_slot, behind_bridge,
1966 resources, bridge_bus, bridge_dev);
1967
1968 if (rc) {
1969 dbg("configure_new_function failed: %d\n", rc);
1970 index = 0;
1971
1972 while (new_slot) {
1973 new_slot = pciehp_slot_find(new_slot->bus,
1974 new_slot->device, index++);
1975
1976 if (new_slot)
1977 pciehp_return_board_resources(new_slot,
1978 resources);
1979 }
1980
1981 return rc;
1982 }
1983
1984 function++;
1985
1986 stop_it = 0;
1987
1988 /* The following loop skips to the next present function
1989 * and creates a board structure
1990 */
1991
1992 while ((function < max_functions) && (!stop_it)) {
1993 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
1994
1995 if (ID == 0xFFFFFFFF) { /* There's nothing there. */
1996 function++;
1997 } else { /* There's something there */
1998 /* Setup slot structure. */
1999 new_slot = pciehp_slot_create(func->bus);
2000
2001 if (new_slot == NULL) {
2002 /* Out of memory */
2003 return 1;
2004 }
2005
2006 new_slot->bus = func->bus;
2007 new_slot->device = func->device;
2008 new_slot->function = function;
2009 new_slot->is_a_board = 1;
2010 new_slot->status = 0;
2011
2012 stop_it++;
2013 }
2014 }
2015
2016 } while (function < max_functions);
2017 dbg("returning from %s\n", __FUNCTION__);
2018
2019 return 0;
2020}
2021
2022/*
2023 * Configuration logic that involves the hotplug data structures and
2024 * their bookkeeping
2025 */
2026
2027/**
2028 * configure_bridge: fill bridge's registers, either configure or disable it.
2029 */
2030static int
2031configure_bridge(struct pci_bus *pci_bus, unsigned int devfn,
2032 struct pci_resource *mem_node,
2033 struct pci_resource **hold_mem_node,
2034 int base_addr, int limit_addr)
2035{
2036 u16 temp_word;
2037 u32 rc;
2038
2039 if (mem_node) {
2040 memcpy(*hold_mem_node, mem_node, sizeof(struct pci_resource));
2041 mem_node->next = NULL;
2042
2043 /* set Mem base and Limit registers */
2044 RES_CHECK(mem_node->base, 16);
2045 temp_word = (u16)(mem_node->base >> 16);
2046 rc = pci_bus_write_config_word(pci_bus, devfn, base_addr, temp_word);
2047
2048 RES_CHECK(mem_node->base + mem_node->length - 1, 16);
2049 temp_word = (u16)((mem_node->base + mem_node->length - 1) >> 16);
2050 rc = pci_bus_write_config_word(pci_bus, devfn, limit_addr, temp_word);
2051 } else {
2052 temp_word = 0xFFFF;
2053 rc = pci_bus_write_config_word(pci_bus, devfn, base_addr, temp_word);
2054
2055 temp_word = 0x0000;
2056 rc = pci_bus_write_config_word(pci_bus, devfn, limit_addr, temp_word);
2057
2058 kfree(*hold_mem_node);
2059 *hold_mem_node = NULL;
2060 }
2061 return rc;
2062}
2063
2064static int
2065configure_new_bridge(struct controller *ctrl, struct pci_func *func,
2066 u8 behind_bridge, struct resource_lists *resources,
2067 struct pci_bus *pci_bus)
2068{
2069 int cloop;
2070 u8 temp_byte;
2071 u8 device;
2072 u16 temp_word;
2073 u32 rc;
2074 u32 ID;
2075 unsigned int devfn;
2076 struct pci_resource *mem_node;
2077 struct pci_resource *p_mem_node;
2078 struct pci_resource *io_node;
2079 struct pci_resource *bus_node;
2080 struct pci_resource *hold_mem_node;
2081 struct pci_resource *hold_p_mem_node;
2082 struct pci_resource *hold_IO_node;
2083 struct pci_resource *hold_bus_node;
2084 struct irq_mapping irqs;
2085 struct pci_func *new_slot;
2086 struct resource_lists temp_resources;
2087
2088 devfn = PCI_DEVFN(func->device, func->function);
2089
2090 /* set Primary bus */
2091 dbg("set Primary bus = 0x%x\n", func->bus);
2092 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
2093 if (rc)
2094 return rc;
2095
2096 /* find range of busses to use */
2097 bus_node = get_max_resource(&resources->bus_head, 1L);
2098
2099 /* If we don't have any busses to allocate, we can't continue */
2100 if (!bus_node) {
2101 err("Got NO bus resource to use\n");
2102 return -ENOMEM;
2103 }
2104 dbg("Got ranges of buses to use: base:len=0x%x:%x\n", bus_node->base, bus_node->length);
2105
2106 /* set Secondary bus */
2107 temp_byte = (u8)bus_node->base;
2108 dbg("set Secondary bus = 0x%x\n", temp_byte);
2109 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2110 if (rc)
2111 return rc;
2112
2113 /* set subordinate bus */
2114 temp_byte = (u8)(bus_node->base + bus_node->length - 1);
2115 dbg("set subordinate bus = 0x%x\n", temp_byte);
2116 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2117 if (rc)
2118 return rc;
2119
2120 /* Set HP parameters (Cache Line Size, Latency Timer) */
2121 rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
2122 if (rc)
2123 return rc;
2124
2125 /* Setup the IO, memory, and prefetchable windows */
2126
2127 io_node = get_max_resource(&(resources->io_head), 0x1000L);
2128 if (io_node) {
2129 dbg("io_node(base, len, next) (%x, %x, %p)\n", io_node->base,
2130 io_node->length, io_node->next);
2131 }
2132
2133 mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
2134 if (mem_node) {
2135 dbg("mem_node(base, len, next) (%x, %x, %p)\n", mem_node->base,
2136 mem_node->length, mem_node->next);
2137 }
2138
2139 if (resources->p_mem_head)
2140 p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000L);
2141 else {
2142 /*
2143 * In some platform implementation, MEM and PMEM are not
2144 * distinguished, and hence ACPI _CRS has only MEM entries
2145 * for both MEM and PMEM.
2146 */
2147 dbg("using MEM for PMEM\n");
2148 p_mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
2149 }
2150 if (p_mem_node) {
2151 dbg("p_mem_node(base, len, next) (%x, %x, %p)\n", p_mem_node->base,
2152 p_mem_node->length, p_mem_node->next);
2153 }
2154
2155 /* set up the IRQ info */
2156 if (!resources->irqs) {
2157 irqs.barber_pole = 0;
2158 irqs.interrupt[0] = 0;
2159 irqs.interrupt[1] = 0;
2160 irqs.interrupt[2] = 0;
2161 irqs.interrupt[3] = 0;
2162 irqs.valid_INT = 0;
2163 } else {
2164 irqs.barber_pole = resources->irqs->barber_pole;
2165 irqs.interrupt[0] = resources->irqs->interrupt[0];
2166 irqs.interrupt[1] = resources->irqs->interrupt[1];
2167 irqs.interrupt[2] = resources->irqs->interrupt[2];
2168 irqs.interrupt[3] = resources->irqs->interrupt[3];
2169 irqs.valid_INT = resources->irqs->valid_INT;
2170 }
2171
2172 /* set up resource lists that are now aligned on top and bottom
2173 * for anything behind the bridge.
2174 */
2175 temp_resources.bus_head = bus_node;
2176 temp_resources.io_head = io_node;
2177 temp_resources.mem_head = mem_node;
2178 temp_resources.p_mem_head = p_mem_node;
2179 temp_resources.irqs = &irqs;
2180
2181 /* Make copies of the nodes we are going to pass down so that
2182 * if there is a problem,we can just use these to free resources
2183 */
2184 hold_bus_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2185 hold_IO_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2186 hold_mem_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2187 hold_p_mem_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2188
2189 if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2190 kfree(hold_bus_node);
2191 kfree(hold_IO_node);
2192 kfree(hold_mem_node);
2193 kfree(hold_p_mem_node);
2194
2195 return 1;
2196 }
2197
2198 memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2199
2200 bus_node->base += 1;
2201 bus_node->length -= 1;
2202 bus_node->next = NULL;
2203
2204 /* If we have IO resources copy them and fill in the bridge's
2205 * IO range registers
2206 */
2207 if (io_node) {
2208 memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2209 io_node->next = NULL;
2210
2211 /* set IO base and Limit registers */
2212 RES_CHECK(io_node->base, 8);
2213 temp_byte = (u8)(io_node->base >> 8);
2214 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
2215
2216 RES_CHECK(io_node->base + io_node->length - 1, 8);
2217 temp_byte = (u8)((io_node->base + io_node->length - 1) >> 8);
2218 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2219 } else {
2220 kfree(hold_IO_node);
2221 hold_IO_node = NULL;
2222 }
2223
2224 /* If we have memory resources copy them and fill in the bridge's
2225 * memory range registers. Otherwise, fill in the range
2226 * registers with values that disable them.
2227 */
2228 rc = configure_bridge(pci_bus, devfn, mem_node, &hold_mem_node,
2229 PCI_MEMORY_BASE, PCI_MEMORY_LIMIT);
2230
2231 /* If we have prefetchable memory resources copy them and
2232 * fill in the bridge's memory range registers. Otherwise,
2233 * fill in the range registers with values that disable them.
2234 */
2235 rc = configure_bridge(pci_bus, devfn, p_mem_node, &hold_p_mem_node,
2236 PCI_PREF_MEMORY_BASE, PCI_PREF_MEMORY_LIMIT);
2237
2238 /* Adjust this to compensate for extra adjustment in first loop */
2239 irqs.barber_pole--;
2240
2241 rc = 0;
2242
2243 /* Here we actually find the devices and configure them */
2244 for (device = 0; (device <= 0x1F) && !rc; device++) {
2245 irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2246
2247 ID = 0xFFFFFFFF;
2248 pci_bus->number = hold_bus_node->base;
2249 pci_bus_read_config_dword (pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
2250 pci_bus->number = func->bus;
2251
2252 if (ID != 0xFFFFFFFF) { /* device Present */
2253 /* Setup slot structure. */
2254 new_slot = pciehp_slot_create(hold_bus_node->base);
2255
2256 if (new_slot == NULL) {
2257 /* Out of memory */
2258 rc = -ENOMEM;
2259 continue;
2260 }
2261
2262 new_slot->bus = hold_bus_node->base;
2263 new_slot->device = device;
2264 new_slot->function = 0;
2265 new_slot->is_a_board = 1;
2266 new_slot->status = 0;
2267
2268 rc = configure_new_device(ctrl, new_slot, 1,
2269 &temp_resources, func->bus,
2270 func->device);
2271 dbg("configure_new_device rc=0x%x\n",rc);
2272 } /* End of IF (device in slot?) */
2273 } /* End of FOR loop */
2274
2275 if (rc) {
2276 pciehp_destroy_resource_list(&temp_resources);
2277
2278 return_resource(&(resources->bus_head), hold_bus_node);
2279 return_resource(&(resources->io_head), hold_IO_node);
2280 return_resource(&(resources->mem_head), hold_mem_node);
2281 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2282 return(rc);
2283 }
2284
2285 /* save the interrupt routing information */
2286 if (resources->irqs) {
2287 resources->irqs->interrupt[0] = irqs.interrupt[0];
2288 resources->irqs->interrupt[1] = irqs.interrupt[1];
2289 resources->irqs->interrupt[2] = irqs.interrupt[2];
2290 resources->irqs->interrupt[3] = irqs.interrupt[3];
2291 resources->irqs->valid_INT = irqs.valid_INT;
2292 } else if (!behind_bridge) {
2293 /* We need to hook up the interrupts here */
2294 for (cloop = 0; cloop < 4; cloop++) {
2295 if (irqs.valid_INT & (0x01 << cloop)) {
2296 rc = pciehp_set_irq(func->bus, func->device,
2297 0x0A + cloop, irqs.interrupt[cloop]);
2298 if (rc) {
2299 pciehp_destroy_resource_list (&temp_resources);
2300 return_resource(&(resources->bus_head), hold_bus_node);
2301 return_resource(&(resources->io_head), hold_IO_node);
2302 return_resource(&(resources->mem_head), hold_mem_node);
2303 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2304 return rc;
2305 }
2306 }
2307 } /* end of for loop */
2308 }
2309
2310 /* Return unused bus resources
2311 * First use the temporary node to store information for the board
2312 */
2313 if (hold_bus_node && bus_node && temp_resources.bus_head) {
2314 hold_bus_node->length = bus_node->base - hold_bus_node->base;
2315
2316 hold_bus_node->next = func->bus_head;
2317 func->bus_head = hold_bus_node;
2318
2319 temp_byte = (u8)(temp_resources.bus_head->base - 1);
2320
2321 /* set subordinate bus */
2322 dbg("re-set subordinate bus = 0x%x\n", temp_byte);
2323 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2324
2325 if (temp_resources.bus_head->length == 0) {
2326 kfree(temp_resources.bus_head);
2327 temp_resources.bus_head = NULL;
2328 } else {
2329 dbg("return bus res of b:d(0x%x:%x) base:len(0x%x:%x)\n",
2330 func->bus, func->device, temp_resources.bus_head->base, temp_resources.bus_head->length);
2331 return_resource(&(resources->bus_head), temp_resources.bus_head);
2332 }
2333 }
2334
2335 /* If we have IO space available and there is some left,
2336 * return the unused portion
2337 */
2338 if (hold_IO_node && temp_resources.io_head) {
2339 io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2340 &hold_IO_node, 0x1000);
2341
2342 /* Check if we were able to split something off */
2343 if (io_node) {
2344 hold_IO_node->base = io_node->base + io_node->length;
2345
2346 RES_CHECK(hold_IO_node->base, 8);
2347 temp_byte = (u8)((hold_IO_node->base) >> 8);
2348 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
2349
2350 return_resource(&(resources->io_head), io_node);
2351 }
2352
2353 io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2354
2355 /* Check if we were able to split something off */
2356 if (io_node) {
2357 /* First use the temporary node to store information for the board */
2358 hold_IO_node->length = io_node->base - hold_IO_node->base;
2359
2360 /* If we used any, add it to the board's list */
2361 if (hold_IO_node->length) {
2362 hold_IO_node->next = func->io_head;
2363 func->io_head = hold_IO_node;
2364
2365 RES_CHECK(io_node->base - 1, 8);
2366 temp_byte = (u8)((io_node->base - 1) >> 8);
2367 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2368
2369 return_resource(&(resources->io_head), io_node);
2370 } else {
2371 /* it doesn't need any IO */
2372 temp_byte = 0x00;
2373 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2374
2375 return_resource(&(resources->io_head), io_node);
2376 kfree(hold_IO_node);
2377 }
2378 } else {
2379 /* it used most of the range */
2380 hold_IO_node->next = func->io_head;
2381 func->io_head = hold_IO_node;
2382 }
2383 } else if (hold_IO_node) {
2384 /* it used the whole range */
2385 hold_IO_node->next = func->io_head;
2386 func->io_head = hold_IO_node;
2387 }
2388
2389 /* If we have memory space available and there is some left,
2390 * return the unused portion
2391 */
2392 if (hold_mem_node && temp_resources.mem_head) {
2393 mem_node = do_pre_bridge_resource_split(&(temp_resources.mem_head), &hold_mem_node, 0x100000L);
2394
2395 /* Check if we were able to split something off */
2396 if (mem_node) {
2397 hold_mem_node->base = mem_node->base + mem_node->length;
2398
2399 RES_CHECK(hold_mem_node->base, 16);
2400 temp_word = (u16)((hold_mem_node->base) >> 16);
2401 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2402
2403 return_resource(&(resources->mem_head), mem_node);
2404 }
2405
2406 mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000L);
2407
2408 /* Check if we were able to split something off */
2409 if (mem_node) {
2410 /* First use the temporary node to store information for the board */
2411 hold_mem_node->length = mem_node->base - hold_mem_node->base;
2412
2413 if (hold_mem_node->length) {
2414 hold_mem_node->next = func->mem_head;
2415 func->mem_head = hold_mem_node;
2416
2417 /* configure end address */
2418 RES_CHECK(mem_node->base - 1, 16);
2419 temp_word = (u16)((mem_node->base - 1) >> 16);
2420 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2421
2422 /* Return unused resources to the pool */
2423 return_resource(&(resources->mem_head), mem_node);
2424 } else {
2425 /* it doesn't need any Mem */
2426 temp_word = 0x0000;
2427 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2428
2429 return_resource(&(resources->mem_head), mem_node);
2430 kfree(hold_mem_node);
2431 }
2432 } else {
2433 /* it used most of the range */
2434 hold_mem_node->next = func->mem_head;
2435 func->mem_head = hold_mem_node;
2436 }
2437 } else if (hold_mem_node) {
2438 /* it used the whole range */
2439 hold_mem_node->next = func->mem_head;
2440 func->mem_head = hold_mem_node;
2441 }
2442
2443 /* If we have prefetchable memory space available and there is some
2444 * left at the end, return the unused portion
2445 */
2446 if (hold_p_mem_node && temp_resources.p_mem_head) {
2447 p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2448 &hold_p_mem_node, 0x100000L);
2449
2450 /* Check if we were able to split something off */
2451 if (p_mem_node) {
2452 hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2453
2454 RES_CHECK(hold_p_mem_node->base, 16);
2455 temp_word = (u16)((hold_p_mem_node->base) >> 16);
2456 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2457
2458 return_resource(&(resources->p_mem_head), p_mem_node);
2459 }
2460
2461 p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000L);
2462
2463 /* Check if we were able to split something off */
2464 if (p_mem_node) {
2465 /* First use the temporary node to store information for the board */
2466 hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2467
2468 /* If we used any, add it to the board's list */
2469 if (hold_p_mem_node->length) {
2470 hold_p_mem_node->next = func->p_mem_head;
2471 func->p_mem_head = hold_p_mem_node;
2472
2473 RES_CHECK(p_mem_node->base - 1, 16);
2474 temp_word = (u16)((p_mem_node->base - 1) >> 16);
2475 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2476
2477 return_resource(&(resources->p_mem_head), p_mem_node);
2478 } else {
2479 /* it doesn't need any PMem */
2480 temp_word = 0x0000;
2481 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2482
2483 return_resource(&(resources->p_mem_head), p_mem_node);
2484 kfree(hold_p_mem_node);
2485 }
2486 } else {
2487 /* it used the most of the range */
2488 hold_p_mem_node->next = func->p_mem_head;
2489 func->p_mem_head = hold_p_mem_node;
2490 }
2491 } else if (hold_p_mem_node) {
2492 /* it used the whole range */
2493 hold_p_mem_node->next = func->p_mem_head;
2494 func->p_mem_head = hold_p_mem_node;
2495 }
2496
2497 /* We should be configuring an IRQ and the bridge's base address
2498 * registers if it needs them. Although we have never seen such
2499 * a device
2500 */
2501
2502 pciehprm_enable_card(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
2503
2504 dbg("PCI Bridge Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device, func->function);
2505
2506 return rc;
2507}
2508
2509/**
2510 * configure_new_function - Configures the PCI header information of one device
2511 *
2512 * @ctrl: pointer to controller structure
2513 * @func: pointer to function structure
2514 * @behind_bridge: 1 if this is a recursive call, 0 if not
2515 * @resources: pointer to set of resource lists
2516 *
2517 * Calls itself recursively for bridged devices.
2518 * Returns 0 if success
2519 *
2520 */
2521static int
2522configure_new_function(struct controller *ctrl, struct pci_func *func,
2523 u8 behind_bridge, struct resource_lists *resources,
2524 u8 bridge_bus, u8 bridge_dev)
2525{
2526 int cloop;
2527 u8 temp_byte;
2528 u8 class_code;
2529 u16 temp_word;
2530 u32 rc;
2531 u32 temp_register;
2532 u32 base;
2533 unsigned int devfn;
2534 struct pci_resource *mem_node;
2535 struct pci_resource *io_node;
2536 struct pci_bus lpci_bus, *pci_bus;
2537
2538 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
2539 pci_bus = &lpci_bus;
2540 pci_bus->number = func->bus;
2541 devfn = PCI_DEVFN(func->device, func->function);
2542
2543 /* Check for Bridge */
2544 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2545 if (rc)
2546 return rc;
2547 dbg("%s: bus %x dev %x func %x temp_byte = %x\n", __FUNCTION__,
2548 func->bus, func->device, func->function, temp_byte);
2549
2550 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
2551 rc = configure_new_bridge(ctrl, func, behind_bridge, resources,
2552 pci_bus);
2553
2554 if (rc)
2555 return rc;
2556 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2557 /* Standard device */
2558 u64 base64;
2559 rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
2560
2561 if (class_code == PCI_BASE_CLASS_DISPLAY)
2562 return DEVICE_TYPE_NOT_SUPPORTED;
2563
2564 /* Figure out IO and memory needs */
2565 for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
2566 temp_register = 0xFFFFFFFF;
2567
2568 rc = pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
2569 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
2570 dbg("Bar[%x]=0x%x on bus:dev:func(0x%x:%x:%x)\n", cloop, temp_register,
2571 func->bus, func->device, func->function);
2572
2573 if (!temp_register)
2574 continue;
2575
2576 base64 = 0L;
2577 if (temp_register & PCI_BASE_ADDRESS_SPACE_IO) {
2578 /* Map IO */
2579
2580 /* set base = amount of IO space */
2581 base = temp_register & 0xFFFFFFFC;
2582 base = ~base + 1;
2583
2584 dbg("NEED IO length(0x%x)\n", base);
2585 io_node = get_io_resource(&(resources->io_head),(ulong)base);
2586
2587 /* allocate the resource to the board */
2588 if (io_node) {
2589 dbg("Got IO base=0x%x(length=0x%x)\n", io_node->base, io_node->length);
2590 base = (u32)io_node->base;
2591 io_node->next = func->io_head;
2592 func->io_head = io_node;
2593 } else {
2594 err("Got NO IO resource(length=0x%x)\n", base);
2595 return -ENOMEM;
2596 }
2597 } else { /* map MEM */
2598 int prefetchable = 1;
2599 struct pci_resource **res_node = &func->p_mem_head;
2600 char *res_type_str = "PMEM";
2601 u32 temp_register2;
2602
2603 if (!(temp_register & PCI_BASE_ADDRESS_MEM_PREFETCH)) {
2604 prefetchable = 0;
2605 res_node = &func->mem_head;
2606 res_type_str++;
2607 }
2608
2609 base = temp_register & 0xFFFFFFF0;
2610 base = ~base + 1;
2611
2612 switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
2613 case PCI_BASE_ADDRESS_MEM_TYPE_32:
2614 dbg("NEED 32 %s bar=0x%x(length=0x%x)\n", res_type_str, temp_register, base);
2615
2616 if (prefetchable && resources->p_mem_head)
2617 mem_node=get_resource(&(resources->p_mem_head), (ulong)base);
2618 else {
2619 if (prefetchable)
2620 dbg("using MEM for PMEM\n");
2621 mem_node = get_resource(&(resources->mem_head), (ulong)base);
2622 }
2623
2624 /* allocate the resource to the board */
2625 if (mem_node) {
2626 base = (u32)mem_node->base;
2627 mem_node->next = *res_node;
2628 *res_node = mem_node;
2629 dbg("Got 32 %s base=0x%x(length=0x%x)\n", res_type_str, mem_node->base,
2630 mem_node->length);
2631 } else {
2632 err("Got NO 32 %s resource(length=0x%x)\n", res_type_str, base);
2633 return -ENOMEM;
2634 }
2635 break;
2636 case PCI_BASE_ADDRESS_MEM_TYPE_64:
2637 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
2638 dbg("NEED 64 %s bar=0x%x:%x(length=0x%x)\n", res_type_str, temp_register2,
2639 temp_register, base);
2640
2641 if (prefetchable && resources->p_mem_head)
2642 mem_node = get_resource(&(resources->p_mem_head), (ulong)base);
2643 else {
2644 if (prefetchable)
2645 dbg("using MEM for PMEM\n");
2646 mem_node = get_resource(&(resources->mem_head), (ulong)base);
2647 }
2648
2649 /* allocate the resource to the board */
2650 if (mem_node) {
2651 base64 = mem_node->base;
2652 mem_node->next = *res_node;
2653 *res_node = mem_node;
2654 dbg("Got 64 %s base=0x%x:%x(length=%x)\n", res_type_str, (u32)(base64 >> 32),
2655 (u32)base64, mem_node->length);
2656 } else {
2657 err("Got NO 64 %s resource(length=0x%x)\n", res_type_str, base);
2658 return -ENOMEM;
2659 }
2660 break;
2661 default:
2662 dbg("reserved BAR type=0x%x\n", temp_register);
2663 break;
2664 }
2665
2666 }
2667
2668 if (base64) {
2669 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
2670 cloop += 4;
2671 base64 >>= 32;
2672
2673 if (base64) {
2674 dbg("%s: high dword of base64(0x%x) set to 0\n", __FUNCTION__, (u32)base64);
2675 base64 = 0x0L;
2676 }
2677
2678 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
2679 } else {
2680 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2681 }
2682 } /* End of base register loop */
2683
2684 /* disable ROM base Address */
2685 temp_word = 0x00L;
2686 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_ROM_ADDRESS, temp_word);
2687
2688 /* Set HP parameters (Cache Line Size, Latency Timer) */
2689 rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL);
2690 if (rc)
2691 return rc;
2692
2693 pciehprm_enable_card(ctrl, func, PCI_HEADER_TYPE_NORMAL);
2694
2695 dbg("PCI function Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device,
2696 func->function);
2697 } /* End of Not-A-Bridge else */
2698 else {
2699 /* It's some strange type of PCI adapter (Cardbus?) */
2700 return DEVICE_TYPE_NOT_SUPPORTED;
2701 }
2702
2703 func->configured = 1;
2704
2705 return 0;
2706}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 01:02:09 -0500