diff options
Diffstat (limited to 'drivers/pci/hotplug/pciehp.h')
-rw-r--r-- | drivers/pci/hotplug/pciehp.h | 352 |
1 files changed, 352 insertions, 0 deletions
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h new file mode 100644 index 000000000000..f313121d5141 --- /dev/null +++ b/drivers/pci/hotplug/pciehp.h | |||
@@ -0,0 +1,352 @@ | |||
1 | /* | ||
2 | * PCI Express Hot Plug Controller Driver | ||
3 | * | ||
4 | * Copyright (C) 1995,2001 Compaq Computer Corporation | ||
5 | * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) | ||
6 | * Copyright (C) 2001 IBM Corp. | ||
7 | * Copyright (C) 2003-2004 Intel Corporation | ||
8 | * | ||
9 | * All rights reserved. | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or (at | ||
14 | * your option) any later version. | ||
15 | * | ||
16 | * This program is distributed in the hope that it will be useful, but | ||
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
19 | * NON INFRINGEMENT. See the GNU General Public License for more | ||
20 | * details. | ||
21 | * | ||
22 | * You should have received a copy of the GNU General Public License | ||
23 | * along with this program; if not, write to the Free Software | ||
24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
25 | * | ||
26 | * Send feedback to <greg@kroah.com>, <dely.l.sy@intel.com> | ||
27 | * | ||
28 | */ | ||
29 | #ifndef _PCIEHP_H | ||
30 | #define _PCIEHP_H | ||
31 | |||
32 | #include <linux/types.h> | ||
33 | #include <linux/pci.h> | ||
34 | #include <linux/delay.h> | ||
35 | #include <asm/semaphore.h> | ||
36 | #include <asm/io.h> | ||
37 | #include <linux/pcieport_if.h> | ||
38 | #include "pci_hotplug.h" | ||
39 | |||
40 | #define MY_NAME "pciehp" | ||
41 | |||
42 | extern int pciehp_poll_mode; | ||
43 | extern int pciehp_poll_time; | ||
44 | extern int pciehp_debug; | ||
45 | |||
46 | /*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/ | ||
47 | #define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0) | ||
48 | #define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg) | ||
49 | #define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg) | ||
50 | #define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg) | ||
51 | |||
52 | struct pci_func { | ||
53 | struct pci_func *next; | ||
54 | u8 bus; | ||
55 | u8 device; | ||
56 | u8 function; | ||
57 | u8 is_a_board; | ||
58 | u16 status; | ||
59 | u8 configured; | ||
60 | u8 switch_save; | ||
61 | u8 presence_save; | ||
62 | u32 base_length[0x06]; | ||
63 | u8 base_type[0x06]; | ||
64 | u16 reserved2; | ||
65 | u32 config_space[0x20]; | ||
66 | struct pci_resource *mem_head; | ||
67 | struct pci_resource *p_mem_head; | ||
68 | struct pci_resource *io_head; | ||
69 | struct pci_resource *bus_head; | ||
70 | struct pci_dev* pci_dev; | ||
71 | }; | ||
72 | |||
73 | struct slot { | ||
74 | struct slot *next; | ||
75 | u8 bus; | ||
76 | u8 device; | ||
77 | u32 number; | ||
78 | u8 is_a_board; | ||
79 | u8 configured; | ||
80 | u8 state; | ||
81 | u8 switch_save; | ||
82 | u8 presence_save; | ||
83 | u32 capabilities; | ||
84 | u16 reserved2; | ||
85 | struct timer_list task_event; | ||
86 | u8 hp_slot; | ||
87 | struct controller *ctrl; | ||
88 | struct hpc_ops *hpc_ops; | ||
89 | struct hotplug_slot *hotplug_slot; | ||
90 | struct list_head slot_list; | ||
91 | }; | ||
92 | |||
93 | struct pci_resource { | ||
94 | struct pci_resource * next; | ||
95 | u32 base; | ||
96 | u32 length; | ||
97 | }; | ||
98 | |||
99 | struct event_info { | ||
100 | u32 event_type; | ||
101 | u8 hp_slot; | ||
102 | }; | ||
103 | |||
104 | struct controller { | ||
105 | struct controller *next; | ||
106 | struct semaphore crit_sect; /* critical section semaphore */ | ||
107 | void *hpc_ctlr_handle; /* HPC controller handle */ | ||
108 | int num_slots; /* Number of slots on ctlr */ | ||
109 | int slot_num_inc; /* 1 or -1 */ | ||
110 | struct pci_resource *mem_head; | ||
111 | struct pci_resource *p_mem_head; | ||
112 | struct pci_resource *io_head; | ||
113 | struct pci_resource *bus_head; | ||
114 | struct pci_dev *pci_dev; | ||
115 | struct pci_bus *pci_bus; | ||
116 | struct event_info event_queue[10]; | ||
117 | struct slot *slot; | ||
118 | struct hpc_ops *hpc_ops; | ||
119 | wait_queue_head_t queue; /* sleep & wake process */ | ||
120 | u8 next_event; | ||
121 | u8 seg; | ||
122 | u8 bus; | ||
123 | u8 device; | ||
124 | u8 function; | ||
125 | u8 rev; | ||
126 | u8 slot_device_offset; | ||
127 | u8 add_support; | ||
128 | enum pci_bus_speed speed; | ||
129 | u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */ | ||
130 | u8 slot_bus; /* Bus where the slots handled by this controller sit */ | ||
131 | u8 ctrlcap; | ||
132 | u16 vendor_id; | ||
133 | }; | ||
134 | |||
135 | struct irq_mapping { | ||
136 | u8 barber_pole; | ||
137 | u8 valid_INT; | ||
138 | u8 interrupt[4]; | ||
139 | }; | ||
140 | |||
141 | struct resource_lists { | ||
142 | struct pci_resource *mem_head; | ||
143 | struct pci_resource *p_mem_head; | ||
144 | struct pci_resource *io_head; | ||
145 | struct pci_resource *bus_head; | ||
146 | struct irq_mapping *irqs; | ||
147 | }; | ||
148 | |||
149 | #define INT_BUTTON_IGNORE 0 | ||
150 | #define INT_PRESENCE_ON 1 | ||
151 | #define INT_PRESENCE_OFF 2 | ||
152 | #define INT_SWITCH_CLOSE 3 | ||
153 | #define INT_SWITCH_OPEN 4 | ||
154 | #define INT_POWER_FAULT 5 | ||
155 | #define INT_POWER_FAULT_CLEAR 6 | ||
156 | #define INT_BUTTON_PRESS 7 | ||
157 | #define INT_BUTTON_RELEASE 8 | ||
158 | #define INT_BUTTON_CANCEL 9 | ||
159 | |||
160 | #define STATIC_STATE 0 | ||
161 | #define BLINKINGON_STATE 1 | ||
162 | #define BLINKINGOFF_STATE 2 | ||
163 | #define POWERON_STATE 3 | ||
164 | #define POWEROFF_STATE 4 | ||
165 | |||
166 | #define PCI_TO_PCI_BRIDGE_CLASS 0x00060400 | ||
167 | |||
168 | /* Error messages */ | ||
169 | #define INTERLOCK_OPEN 0x00000002 | ||
170 | #define ADD_NOT_SUPPORTED 0x00000003 | ||
171 | #define CARD_FUNCTIONING 0x00000005 | ||
172 | #define ADAPTER_NOT_SAME 0x00000006 | ||
173 | #define NO_ADAPTER_PRESENT 0x00000009 | ||
174 | #define NOT_ENOUGH_RESOURCES 0x0000000B | ||
175 | #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C | ||
176 | #define WRONG_BUS_FREQUENCY 0x0000000D | ||
177 | #define POWER_FAILURE 0x0000000E | ||
178 | |||
179 | #define REMOVE_NOT_SUPPORTED 0x00000003 | ||
180 | |||
181 | #define DISABLE_CARD 1 | ||
182 | |||
183 | /* Field definitions in Slot Capabilities Register */ | ||
184 | #define ATTN_BUTTN_PRSN 0x00000001 | ||
185 | #define PWR_CTRL_PRSN 0x00000002 | ||
186 | #define MRL_SENS_PRSN 0x00000004 | ||
187 | #define ATTN_LED_PRSN 0x00000008 | ||
188 | #define PWR_LED_PRSN 0x00000010 | ||
189 | #define HP_SUPR_RM_SUP 0x00000020 | ||
190 | |||
191 | #define ATTN_BUTTN(cap) (cap & ATTN_BUTTN_PRSN) | ||
192 | #define POWER_CTRL(cap) (cap & PWR_CTRL_PRSN) | ||
193 | #define MRL_SENS(cap) (cap & MRL_SENS_PRSN) | ||
194 | #define ATTN_LED(cap) (cap & ATTN_LED_PRSN) | ||
195 | #define PWR_LED(cap) (cap & PWR_LED_PRSN) | ||
196 | #define HP_SUPR_RM(cap) (cap & HP_SUPR_RM_SUP) | ||
197 | |||
198 | /* | ||
199 | * error Messages | ||
200 | */ | ||
201 | #define msg_initialization_err "Initialization failure, error=%d\n" | ||
202 | #define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n" | ||
203 | #define msg_HPC_non_pcie "The PCI hot plug controller is not supported by this driver.\n" | ||
204 | #define msg_HPC_not_supported "This system is not supported by this version of pciephd module. Upgrade to a newer version of pciehpd\n" | ||
205 | #define msg_unable_to_save "Unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n" | ||
206 | #define msg_button_on "PCI slot #%d - powering on due to button press.\n" | ||
207 | #define msg_button_off "PCI slot #%d - powering off due to button press.\n" | ||
208 | #define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n" | ||
209 | #define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n" | ||
210 | |||
211 | /* controller functions */ | ||
212 | extern int pciehprm_find_available_resources (struct controller *ctrl); | ||
213 | extern int pciehp_event_start_thread (void); | ||
214 | extern void pciehp_event_stop_thread (void); | ||
215 | extern struct pci_func *pciehp_slot_create (unsigned char busnumber); | ||
216 | extern struct pci_func *pciehp_slot_find (unsigned char bus, unsigned char device, unsigned char index); | ||
217 | extern int pciehp_enable_slot (struct slot *slot); | ||
218 | extern int pciehp_disable_slot (struct slot *slot); | ||
219 | |||
220 | extern u8 pciehp_handle_attention_button (u8 hp_slot, void *inst_id); | ||
221 | extern u8 pciehp_handle_switch_change (u8 hp_slot, void *inst_id); | ||
222 | extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id); | ||
223 | extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id); | ||
224 | /* extern void long_delay (int delay); */ | ||
225 | |||
226 | /* resource functions */ | ||
227 | extern int pciehp_resource_sort_and_combine (struct pci_resource **head); | ||
228 | |||
229 | /* pci functions */ | ||
230 | extern int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num); | ||
231 | /*extern int pciehp_get_bus_dev (struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/ | ||
232 | extern int pciehp_save_config (struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num); | ||
233 | extern int pciehp_save_used_resources (struct controller *ctrl, struct pci_func * func, int flag); | ||
234 | extern int pciehp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot); | ||
235 | extern void pciehp_destroy_board_resources (struct pci_func * func); | ||
236 | extern int pciehp_return_board_resources (struct pci_func * func, struct resource_lists * resources); | ||
237 | extern void pciehp_destroy_resource_list (struct resource_lists * resources); | ||
238 | extern int pciehp_configure_device (struct controller* ctrl, struct pci_func* func); | ||
239 | extern int pciehp_unconfigure_device (struct pci_func* func); | ||
240 | |||
241 | |||
242 | /* Global variables */ | ||
243 | extern struct controller *pciehp_ctrl_list; | ||
244 | extern struct pci_func *pciehp_slot_list[256]; | ||
245 | |||
246 | /* Inline functions */ | ||
247 | |||
248 | static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device) | ||
249 | { | ||
250 | struct slot *p_slot, *tmp_slot = NULL; | ||
251 | |||
252 | p_slot = ctrl->slot; | ||
253 | |||
254 | dbg("p_slot = %p\n", p_slot); | ||
255 | |||
256 | while (p_slot && (p_slot->device != device)) { | ||
257 | tmp_slot = p_slot; | ||
258 | p_slot = p_slot->next; | ||
259 | dbg("In while loop, p_slot = %p\n", p_slot); | ||
260 | } | ||
261 | if (p_slot == NULL) { | ||
262 | err("ERROR: pciehp_find_slot device=0x%x\n", device); | ||
263 | p_slot = tmp_slot; | ||
264 | } | ||
265 | |||
266 | return p_slot; | ||
267 | } | ||
268 | |||
269 | static inline int wait_for_ctrl_irq(struct controller *ctrl) | ||
270 | { | ||
271 | int retval = 0; | ||
272 | |||
273 | DECLARE_WAITQUEUE(wait, current); | ||
274 | |||
275 | dbg("%s : start\n", __FUNCTION__); | ||
276 | add_wait_queue(&ctrl->queue, &wait); | ||
277 | if (!pciehp_poll_mode) | ||
278 | /* Sleep for up to 1 second */ | ||
279 | msleep_interruptible(1000); | ||
280 | else | ||
281 | msleep_interruptible(2500); | ||
282 | |||
283 | remove_wait_queue(&ctrl->queue, &wait); | ||
284 | if (signal_pending(current)) | ||
285 | retval = -EINTR; | ||
286 | |||
287 | dbg("%s : end\n", __FUNCTION__); | ||
288 | return retval; | ||
289 | } | ||
290 | |||
291 | /* Puts node back in the resource list pointed to by head */ | ||
292 | static inline void return_resource(struct pci_resource **head, struct pci_resource *node) | ||
293 | { | ||
294 | if (!node || !head) | ||
295 | return; | ||
296 | node->next = *head; | ||
297 | *head = node; | ||
298 | } | ||
299 | |||
300 | #define SLOT_NAME_SIZE 10 | ||
301 | |||
302 | static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot) | ||
303 | { | ||
304 | snprintf(buffer, buffer_size, "%d", slot->number); | ||
305 | } | ||
306 | |||
307 | enum php_ctlr_type { | ||
308 | PCI, | ||
309 | ISA, | ||
310 | ACPI | ||
311 | }; | ||
312 | |||
313 | typedef u8(*php_intr_callback_t) (unsigned int change_id, void *instance_id); | ||
314 | |||
315 | int pcie_init(struct controller *ctrl, struct pcie_device *dev, | ||
316 | php_intr_callback_t attention_button_callback, | ||
317 | php_intr_callback_t switch_change_callback, | ||
318 | php_intr_callback_t presence_change_callback, | ||
319 | php_intr_callback_t power_fault_callback); | ||
320 | |||
321 | |||
322 | /* This has no meaning for PCI Express, as there is only 1 slot per port */ | ||
323 | int pcie_get_ctlr_slot_config(struct controller *ctrl, | ||
324 | int *num_ctlr_slots, | ||
325 | int *first_device_num, | ||
326 | int *physical_slot_num, | ||
327 | u8 *ctrlcap); | ||
328 | |||
329 | struct hpc_ops { | ||
330 | int (*power_on_slot) (struct slot *slot); | ||
331 | int (*power_off_slot) (struct slot *slot); | ||
332 | int (*get_power_status) (struct slot *slot, u8 *status); | ||
333 | int (*get_attention_status) (struct slot *slot, u8 *status); | ||
334 | int (*set_attention_status) (struct slot *slot, u8 status); | ||
335 | int (*get_latch_status) (struct slot *slot, u8 *status); | ||
336 | int (*get_adapter_status) (struct slot *slot, u8 *status); | ||
337 | |||
338 | int (*get_max_bus_speed) (struct slot *slot, enum pci_bus_speed *speed); | ||
339 | int (*get_cur_bus_speed) (struct slot *slot, enum pci_bus_speed *speed); | ||
340 | |||
341 | int (*get_max_lnk_width) (struct slot *slot, enum pcie_link_width *value); | ||
342 | int (*get_cur_lnk_width) (struct slot *slot, enum pcie_link_width *value); | ||
343 | |||
344 | int (*query_power_fault) (struct slot *slot); | ||
345 | void (*green_led_on) (struct slot *slot); | ||
346 | void (*green_led_off) (struct slot *slot); | ||
347 | void (*green_led_blink) (struct slot *slot); | ||
348 | void (*release_ctlr) (struct controller *ctrl); | ||
349 | int (*check_lnk_status) (struct controller *ctrl); | ||
350 | }; | ||
351 | |||
352 | #endif /* _PCIEHP_H */ | ||