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path: root/drivers/parisc/sba_iommu.c
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Diffstat (limited to 'drivers/parisc/sba_iommu.c')
-rw-r--r--drivers/parisc/sba_iommu.c45
1 files changed, 32 insertions, 13 deletions
diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c
index 42b32ff2fca6..278f325021ee 100644
--- a/drivers/parisc/sba_iommu.c
+++ b/drivers/parisc/sba_iommu.c
@@ -178,6 +178,11 @@ extern struct proc_dir_entry * proc_mckinley_root;
178#define ROPE6_CTL 0x230 178#define ROPE6_CTL 0x230
179#define ROPE7_CTL 0x238 179#define ROPE7_CTL 0x238
180 180
181#define IOC_ROPE0_CFG 0x500 /* pluto only */
182#define IOC_ROPE_AO 0x10 /* Allow "Relaxed Ordering" */
183
184
185
181#define HF_ENABLE 0x40 186#define HF_ENABLE 0x40
182 187
183 188
@@ -1759,19 +1764,33 @@ printk("sba_hw_init(): mem_boot 0x%x 0x%x 0x%x 0x%x\n", PAGE0->mem_boot.hpa,
1759 1764
1760 sba_dev->num_ioc = num_ioc; 1765 sba_dev->num_ioc = num_ioc;
1761 for (i = 0; i < num_ioc; i++) { 1766 for (i = 0; i < num_ioc; i++) {
1762 /* 1767 unsigned long ioc_hpa = sba_dev->ioc[i].ioc_hpa;
1763 ** Make sure the box crashes if we get any errors on a rope. 1768 unsigned int j;
1764 */ 1769
1765 WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE0_CTL); 1770 for (j=0; j < sizeof(u64) * ROPES_PER_IOC; j+=sizeof(u64)) {
1766 WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE1_CTL); 1771
1767 WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE2_CTL); 1772 /*
1768 WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE3_CTL); 1773 * Clear ROPE(N)_CONFIG AO bit.
1769 WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE4_CTL); 1774 * Disables "NT Ordering" (~= !"Relaxed Ordering")
1770 WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE5_CTL); 1775 * Overrides bit 1 in DMA Hint Sets.
1771 WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE6_CTL); 1776 * Improves netperf UDP_STREAM by ~10% for bcm5701.
1772 WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE7_CTL); 1777 */
1773 1778 if (IS_PLUTO(sba_dev->iodc)) {
1774 /* flush out the writes */ 1779 unsigned long rope_cfg, cfg_val;
1780
1781 rope_cfg = ioc_hpa + IOC_ROPE0_CFG + j;
1782 cfg_val = READ_REG(rope_cfg);
1783 cfg_val &= ~IOC_ROPE_AO;
1784 WRITE_REG(cfg_val, rope_cfg);
1785 }
1786
1787 /*
1788 ** Make sure the box crashes on rope errors.
1789 */
1790 WRITE_REG(HF_ENABLE, ioc_hpa + ROPE0_CTL + j);
1791 }
1792
1793 /* flush out the last writes */
1775 READ_REG(sba_dev->ioc[i].ioc_hpa + ROPE7_CTL); 1794 READ_REG(sba_dev->ioc[i].ioc_hpa + ROPE7_CTL);
1776 1795
1777 DBG_INIT(" ioc[%d] ROPE_CFG 0x%Lx ROPE_DBG 0x%Lx\n", 1796 DBG_INIT(" ioc[%d] ROPE_CFG 0x%Lx ROPE_DBG 0x%Lx\n",