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-rw-r--r--drivers/parisc/sba_iommu.c109
1 files changed, 1 insertions, 108 deletions
diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c
index 5fbc11e4bc5d..12776b7e3a84 100644
--- a/drivers/parisc/sba_iommu.c
+++ b/drivers/parisc/sba_iommu.c
@@ -38,6 +38,7 @@
38#include <linux/proc_fs.h> 38#include <linux/proc_fs.h>
39#include <linux/seq_file.h> 39#include <linux/seq_file.h>
40 40
41#include <asm/ropes.h>
41#include <asm/mckinley.h> /* for proc_mckinley_root */ 42#include <asm/mckinley.h> /* for proc_mckinley_root */
42#include <asm/runway.h> /* for proc_runway_root */ 43#include <asm/runway.h> /* for proc_runway_root */
43#include <asm/pdc.h> /* for PDC_MODEL_* */ 44#include <asm/pdc.h> /* for PDC_MODEL_* */
@@ -46,11 +47,6 @@
46 47
47#define MODULE_NAME "SBA" 48#define MODULE_NAME "SBA"
48 49
49#ifdef CONFIG_PROC_FS
50/* depends on proc fs support. But costs CPU performance */
51#undef SBA_COLLECT_STATS
52#endif
53
54/* 50/*
55** The number of debug flags is a clue - this code is fragile. 51** The number of debug flags is a clue - this code is fragile.
56** Don't even think about messing with it unless you have 52** Don't even think about messing with it unless you have
@@ -89,46 +85,13 @@
89#define DBG_RES(x...) 85#define DBG_RES(x...)
90#endif 86#endif
91 87
92#if defined(CONFIG_64BIT)
93/* "low end" PA8800 machines use ZX1 chipset: PAT PDC and only run 64-bit */
94#define ZX1_SUPPORT
95#endif
96
97#define SBA_INLINE __inline__ 88#define SBA_INLINE __inline__
98 89
99
100/*
101** The number of pdir entries to "free" before issueing
102** a read to PCOM register to flush out PCOM writes.
103** Interacts with allocation granularity (ie 4 or 8 entries
104** allocated and free'd/purged at a time might make this
105** less interesting).
106*/
107#define DELAYED_RESOURCE_CNT 16
108
109#define DEFAULT_DMA_HINT_REG 0 90#define DEFAULT_DMA_HINT_REG 0
110 91
111#define ASTRO_RUNWAY_PORT 0x582
112#define IKE_MERCED_PORT 0x803
113#define REO_MERCED_PORT 0x804
114#define REOG_MERCED_PORT 0x805
115#define PLUTO_MCKINLEY_PORT 0x880
116
117#define SBA_FUNC_ID 0x0000 /* function id */ 92#define SBA_FUNC_ID 0x0000 /* function id */
118#define SBA_FCLASS 0x0008 /* function class, bist, header, rev... */ 93#define SBA_FCLASS 0x0008 /* function class, bist, header, rev... */
119 94
120static inline int IS_ASTRO(struct parisc_device *d) {
121 return d->id.hversion == ASTRO_RUNWAY_PORT;
122}
123
124static inline int IS_IKE(struct parisc_device *d) {
125 return d->id.hversion == IKE_MERCED_PORT;
126}
127
128static inline int IS_PLUTO(struct parisc_device *d) {
129 return d->id.hversion == PLUTO_MCKINLEY_PORT;
130}
131
132#define SBA_FUNC_SIZE 4096 /* SBA configuration function reg set */ 95#define SBA_FUNC_SIZE 4096 /* SBA configuration function reg set */
133 96
134#define ASTRO_IOC_OFFSET (32 * SBA_FUNC_SIZE) 97#define ASTRO_IOC_OFFSET (32 * SBA_FUNC_SIZE)
@@ -145,10 +108,6 @@ static inline int IS_PLUTO(struct parisc_device *d) {
145#define IOC_CTRL_D4 (1 << 11) /* Disable 4-byte coalescing */ 108#define IOC_CTRL_D4 (1 << 11) /* Disable 4-byte coalescing */
146#define IOC_CTRL_DD (1 << 13) /* Disable distr. LMMIO range coalescing */ 109#define IOC_CTRL_DD (1 << 13) /* Disable distr. LMMIO range coalescing */
147 110
148#define MAX_IOC 2 /* per Ike. Pluto/Astro only have 1. */
149
150#define ROPES_PER_IOC 8 /* per Ike half or Pluto/Astro */
151
152 111
153/* 112/*
154** Offsets into MBIB (Function 0 on Ike and hopefully Astro) 113** Offsets into MBIB (Function 0 on Ike and hopefully Astro)
@@ -196,9 +155,6 @@ static inline int IS_PLUTO(struct parisc_device *d) {
196#define IOC_TCNFG 0x318 155#define IOC_TCNFG 0x318
197#define IOC_PDIR_BASE 0x320 156#define IOC_PDIR_BASE 0x320
198 157
199/* AGP GART driver looks for this */
200#define SBA_IOMMU_COOKIE 0x0000badbadc0ffeeUL
201
202 158
203/* 159/*
204** IOC supports 4/8/16/64KB page sizes (see TCNFG register) 160** IOC supports 4/8/16/64KB page sizes (see TCNFG register)
@@ -228,69 +184,6 @@ static inline int IS_PLUTO(struct parisc_device *d) {
228#define SBA_PERF_CNT2 0x208 184#define SBA_PERF_CNT2 0x208
229#define SBA_PERF_CNT3 0x210 185#define SBA_PERF_CNT3 0x210
230 186
231
232struct ioc {
233 void __iomem *ioc_hpa; /* I/O MMU base address */
234 char *res_map; /* resource map, bit == pdir entry */
235 u64 *pdir_base; /* physical base address */
236 unsigned long ibase; /* pdir IOV Space base - shared w/lba_pci */
237 unsigned long imask; /* pdir IOV Space mask - shared w/lba_pci */
238#ifdef ZX1_SUPPORT
239 unsigned long iovp_mask; /* help convert IOVA to IOVP */
240#endif
241 unsigned long *res_hint; /* next avail IOVP - circular search */
242 spinlock_t res_lock;
243 unsigned int res_bitshift; /* from the LEFT! */
244 unsigned int res_size; /* size of resource map in bytes */
245#ifdef SBA_HINT_SUPPORT
246/* FIXME : DMA HINTs not used */
247 unsigned long hint_mask_pdir; /* bits used for DMA hints */
248 unsigned int hint_shift_pdir;
249#endif
250#if DELAYED_RESOURCE_CNT > 0
251 int saved_cnt;
252 struct sba_dma_pair {
253 dma_addr_t iova;
254 size_t size;
255 } saved[DELAYED_RESOURCE_CNT];
256#endif
257
258#ifdef SBA_COLLECT_STATS
259#define SBA_SEARCH_SAMPLE 0x100
260 unsigned long avg_search[SBA_SEARCH_SAMPLE];
261 unsigned long avg_idx; /* current index into avg_search */
262 unsigned long used_pages;
263 unsigned long msingle_calls;
264 unsigned long msingle_pages;
265 unsigned long msg_calls;
266 unsigned long msg_pages;
267 unsigned long usingle_calls;
268 unsigned long usingle_pages;
269 unsigned long usg_calls;
270 unsigned long usg_pages;
271#endif
272
273 /* STUFF We don't need in performance path */
274 unsigned int pdir_size; /* in bytes, determined by IOV Space size */
275};
276
277struct sba_device {
278 struct sba_device *next; /* list of SBA's in system */
279 struct parisc_device *dev; /* dev found in bus walk */
280 const char *name;
281 void __iomem *sba_hpa; /* base address */
282 spinlock_t sba_lock;
283 unsigned int flags; /* state/functionality enabled */
284 unsigned int hw_rev; /* HW revision of chip */
285
286 struct resource chip_resv; /* MMIO reserved for chip */
287 struct resource iommu_resv; /* MMIO reserved for iommu */
288
289 unsigned int num_ioc; /* number of on-board IOC's */
290 struct ioc ioc[MAX_IOC];
291};
292
293
294static struct sba_device *sba_list; 187static struct sba_device *sba_list;
295 188
296static unsigned long ioc_needs_fdc = 0; 189static unsigned long ioc_needs_fdc = 0;