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-rw-r--r--drivers/net/bnx2.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 24e7f9ab3f5a..854d80c330ec 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -3934,11 +3934,13 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
3934 /* Chip reset. */ 3934 /* Chip reset. */
3935 REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val); 3935 REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);
3936 3936
3937 /* Reading back any register after chip reset will hang the
3938 * bus on 5706 A0 and A1. The msleep below provides plenty
3939 * of margin for write posting.
3940 */
3937 if ((CHIP_ID(bp) == CHIP_ID_5706_A0) || 3941 if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
3938 (CHIP_ID(bp) == CHIP_ID_5706_A1)) { 3942 (CHIP_ID(bp) == CHIP_ID_5706_A1))
3939 current->state = TASK_UNINTERRUPTIBLE; 3943 msleep(20);
3940 schedule_timeout(HZ / 50);
3941 }
3942 3944
3943 /* Reset takes approximate 30 usec */ 3945 /* Reset takes approximate 30 usec */
3944 for (i = 0; i < 10; i++) { 3946 for (i = 0; i < 10; i++) {