diff options
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb3/t3_hw.c | 2 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/pci.c | 8 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/4965.h | 4 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/common.c | 10 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/common.h | 12 | ||||
-rw-r--r-- | drivers/net/wireless/iwlwifi/pcie/trans.c | 20 |
6 files changed, 15 insertions, 41 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c b/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c index aef45d3113ba..3dee68612c9e 100644 --- a/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c | |||
@@ -3307,7 +3307,7 @@ static void config_pcie(struct adapter *adap) | |||
3307 | G_NUMFSTTRNSEQRX(t3_read_reg(adap, A_PCIE_MODE)); | 3307 | G_NUMFSTTRNSEQRX(t3_read_reg(adap, A_PCIE_MODE)); |
3308 | log2_width = fls(adap->params.pci.width) - 1; | 3308 | log2_width = fls(adap->params.pci.width) - 1; |
3309 | acklat = ack_lat[log2_width][pldsize]; | 3309 | acklat = ack_lat[log2_width][pldsize]; |
3310 | if (val & 1) /* check LOsEnable */ | 3310 | if (val & PCI_EXP_LNKCTL_ASPM_L0S) /* check LOsEnable */ |
3311 | acklat += fst_trn_tx * 4; | 3311 | acklat += fst_trn_tx * 4; |
3312 | rpllmt = rpl_tmr[log2_width][pldsize] + fst_trn_rx * 4; | 3312 | rpllmt = rpl_tmr[log2_width][pldsize] + fst_trn_rx * 4; |
3313 | 3313 | ||
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c index f088f4bf9a26..71d82078fc7f 100644 --- a/drivers/net/wireless/ath/ath9k/pci.c +++ b/drivers/net/wireless/ath/ath9k/pci.c | |||
@@ -125,23 +125,23 @@ static void ath_pci_aspm_init(struct ath_common *common) | |||
125 | 125 | ||
126 | if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) && | 126 | if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) && |
127 | (AR_SREV_9285(ah))) { | 127 | (AR_SREV_9285(ah))) { |
128 | /* Bluetooth coexistance requires disabling ASPM. */ | 128 | /* Bluetooth coexistence requires disabling ASPM. */ |
129 | pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, | 129 | pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, |
130 | PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); | 130 | PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1); |
131 | 131 | ||
132 | /* | 132 | /* |
133 | * Both upstream and downstream PCIe components should | 133 | * Both upstream and downstream PCIe components should |
134 | * have the same ASPM settings. | 134 | * have the same ASPM settings. |
135 | */ | 135 | */ |
136 | pcie_capability_clear_word(parent, PCI_EXP_LNKCTL, | 136 | pcie_capability_clear_word(parent, PCI_EXP_LNKCTL, |
137 | PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); | 137 | PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1); |
138 | 138 | ||
139 | ath_info(common, "Disabling ASPM since BTCOEX is enabled\n"); | 139 | ath_info(common, "Disabling ASPM since BTCOEX is enabled\n"); |
140 | return; | 140 | return; |
141 | } | 141 | } |
142 | 142 | ||
143 | pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm); | 143 | pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm); |
144 | if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) { | 144 | if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) { |
145 | ah->aspm_enabled = true; | 145 | ah->aspm_enabled = true; |
146 | /* Initialize PCIe PM and SERDES registers. */ | 146 | /* Initialize PCIe PM and SERDES registers. */ |
147 | ath9k_hw_configpcipowersave(ah, false); | 147 | ath9k_hw_configpcipowersave(ah, false); |
diff --git a/drivers/net/wireless/iwlegacy/4965.h b/drivers/net/wireless/iwlegacy/4965.h index 2d092f328547..1b15b0b2292b 100644 --- a/drivers/net/wireless/iwlegacy/4965.h +++ b/drivers/net/wireless/iwlegacy/4965.h | |||
@@ -917,10 +917,6 @@ struct il4965_scd_bc_tbl { | |||
917 | /* PCI registers */ | 917 | /* PCI registers */ |
918 | #define PCI_CFG_RETRY_TIMEOUT 0x041 | 918 | #define PCI_CFG_RETRY_TIMEOUT 0x041 |
919 | 919 | ||
920 | /* PCI register values */ | ||
921 | #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 | ||
922 | #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 | ||
923 | |||
924 | #define IL4965_DEFAULT_TX_RETRY 15 | 920 | #define IL4965_DEFAULT_TX_RETRY 15 |
925 | 921 | ||
926 | /* EEPROM */ | 922 | /* EEPROM */ |
diff --git a/drivers/net/wireless/iwlegacy/common.c b/drivers/net/wireless/iwlegacy/common.c index 318ed3c9fe74..7e16d10a7f14 100644 --- a/drivers/net/wireless/iwlegacy/common.c +++ b/drivers/net/wireless/iwlegacy/common.c | |||
@@ -1183,9 +1183,10 @@ EXPORT_SYMBOL(il_power_update_mode); | |||
1183 | void | 1183 | void |
1184 | il_power_initialize(struct il_priv *il) | 1184 | il_power_initialize(struct il_priv *il) |
1185 | { | 1185 | { |
1186 | u16 lctl = il_pcie_link_ctl(il); | 1186 | u16 lctl; |
1187 | 1187 | ||
1188 | il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN); | 1188 | pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl); |
1189 | il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S); | ||
1189 | 1190 | ||
1190 | il->power_data.debug_sleep_level_override = -1; | 1191 | il->power_data.debug_sleep_level_override = -1; |
1191 | 1192 | ||
@@ -4233,9 +4234,8 @@ il_apm_init(struct il_priv *il) | |||
4233 | * power savings, even without L1. | 4234 | * power savings, even without L1. |
4234 | */ | 4235 | */ |
4235 | if (il->cfg->set_l0s) { | 4236 | if (il->cfg->set_l0s) { |
4236 | lctl = il_pcie_link_ctl(il); | 4237 | pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl); |
4237 | if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == | 4238 | if (lctl & PCI_EXP_LNKCTL_ASPM_L1) { |
4238 | PCI_CFG_LINK_CTRL_VAL_L1_EN) { | ||
4239 | /* L1-ASPM enabled; disable(!) L0S */ | 4239 | /* L1-ASPM enabled; disable(!) L0S */ |
4240 | il_set_bit(il, CSR_GIO_REG, | 4240 | il_set_bit(il, CSR_GIO_REG, |
4241 | CSR_GIO_REG_VAL_L0S_ENABLED); | 4241 | CSR_GIO_REG_VAL_L0S_ENABLED); |
diff --git a/drivers/net/wireless/iwlegacy/common.h b/drivers/net/wireless/iwlegacy/common.h index b4bb813362bd..e181f3b573d9 100644 --- a/drivers/net/wireless/iwlegacy/common.h +++ b/drivers/net/wireless/iwlegacy/common.h | |||
@@ -1829,14 +1829,6 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd); | |||
1829 | * PCI * | 1829 | * PCI * |
1830 | *****************************************************/ | 1830 | *****************************************************/ |
1831 | 1831 | ||
1832 | static inline u16 | ||
1833 | il_pcie_link_ctl(struct il_priv *il) | ||
1834 | { | ||
1835 | u16 pci_lnk_ctl; | ||
1836 | pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &pci_lnk_ctl); | ||
1837 | return pci_lnk_ctl; | ||
1838 | } | ||
1839 | |||
1840 | void il_bg_watchdog(unsigned long data); | 1832 | void il_bg_watchdog(unsigned long data); |
1841 | u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval); | 1833 | u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval); |
1842 | __le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon, | 1834 | __le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon, |
@@ -2434,10 +2426,6 @@ struct il_tfd { | |||
2434 | /* PCI registers */ | 2426 | /* PCI registers */ |
2435 | #define PCI_CFG_RETRY_TIMEOUT 0x041 | 2427 | #define PCI_CFG_RETRY_TIMEOUT 0x041 |
2436 | 2428 | ||
2437 | /* PCI register values */ | ||
2438 | #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 | ||
2439 | #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 | ||
2440 | |||
2441 | struct il_rate_info { | 2429 | struct il_rate_info { |
2442 | u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */ | 2430 | u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */ |
2443 | u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */ | 2431 | u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */ |
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c index fe0fffd04304..1dfa6be03058 100644 --- a/drivers/net/wireless/iwlwifi/pcie/trans.c +++ b/drivers/net/wireless/iwlwifi/pcie/trans.c | |||
@@ -670,21 +670,12 @@ static void iwl_set_pwr_vmain(struct iwl_trans *trans) | |||
670 | 670 | ||
671 | /* PCI registers */ | 671 | /* PCI registers */ |
672 | #define PCI_CFG_RETRY_TIMEOUT 0x041 | 672 | #define PCI_CFG_RETRY_TIMEOUT 0x041 |
673 | #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 | ||
674 | #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 | ||
675 | 673 | ||
676 | static u16 iwl_pciexp_link_ctrl(struct iwl_trans *trans) | 674 | static void iwl_apm_config(struct iwl_trans *trans) |
677 | { | 675 | { |
678 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); | 676 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
679 | u16 pci_lnk_ctl; | 677 | u16 lctl; |
680 | |||
681 | pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, | ||
682 | &pci_lnk_ctl); | ||
683 | return pci_lnk_ctl; | ||
684 | } | ||
685 | 678 | ||
686 | static void iwl_apm_config(struct iwl_trans *trans) | ||
687 | { | ||
688 | /* | 679 | /* |
689 | * HW bug W/A for instability in PCIe bus L0S->L1 transition. | 680 | * HW bug W/A for instability in PCIe bus L0S->L1 transition. |
690 | * Check if BIOS (or OS) enabled L1-ASPM on this device. | 681 | * Check if BIOS (or OS) enabled L1-ASPM on this device. |
@@ -693,10 +684,9 @@ static void iwl_apm_config(struct iwl_trans *trans) | |||
693 | * If not (unlikely), enable L0S, so there is at least some | 684 | * If not (unlikely), enable L0S, so there is at least some |
694 | * power savings, even without L1. | 685 | * power savings, even without L1. |
695 | */ | 686 | */ |
696 | u16 lctl = iwl_pciexp_link_ctrl(trans); | ||
697 | 687 | ||
698 | if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == | 688 | pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl); |
699 | PCI_CFG_LINK_CTRL_VAL_L1_EN) { | 689 | if (lctl & PCI_EXP_LNKCTL_ASPM_L1) { |
700 | /* L1-ASPM enabled; disable(!) L0S */ | 690 | /* L1-ASPM enabled; disable(!) L0S */ |
701 | iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); | 691 | iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); |
702 | dev_printk(KERN_INFO, trans->dev, | 692 | dev_printk(KERN_INFO, trans->dev, |
@@ -707,7 +697,7 @@ static void iwl_apm_config(struct iwl_trans *trans) | |||
707 | dev_printk(KERN_INFO, trans->dev, | 697 | dev_printk(KERN_INFO, trans->dev, |
708 | "L1 Disabled; Enabling L0S\n"); | 698 | "L1 Disabled; Enabling L0S\n"); |
709 | } | 699 | } |
710 | trans->pm_support = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN); | 700 | trans->pm_support = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S); |
711 | } | 701 | } |
712 | 702 | ||
713 | /* | 703 | /* |