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-rw-r--r--drivers/net/pcmcia/axnet_cs.c3
-rw-r--r--drivers/net/pcmcia/nmclan_cs.c21
-rw-r--r--drivers/net/pcmcia/xirc2ps_cs.c16
-rw-r--r--drivers/net/wireless/hostap/hostap_cs.c91
-rw-r--r--drivers/net/wireless/orinoco/spectrum_cs.c32
5 files changed, 49 insertions, 114 deletions
diff --git a/drivers/net/pcmcia/axnet_cs.c b/drivers/net/pcmcia/axnet_cs.c
index 467fd4bfb2bd..ee0a6d036f94 100644
--- a/drivers/net/pcmcia/axnet_cs.c
+++ b/drivers/net/pcmcia/axnet_cs.c
@@ -378,8 +378,7 @@ static int axnet_config(struct pcmcia_device *link)
378 /* Maybe PHY is in power down mode. (PPD_SET = 1) 378 /* Maybe PHY is in power down mode. (PPD_SET = 1)
379 Bit 2 of CCSR is active low. */ 379 Bit 2 of CCSR is active low. */
380 if (i == 32) { 380 if (i == 32) {
381 conf_reg_t reg = { 0, CS_WRITE, CISREG_CCSR, 0x04 }; 381 pcmcia_write_config_byte(link, CISREG_CCSR, 0x04);
382 pcmcia_access_configuration_register(link, &reg);
383 for (i = 0; i < 32; i++) { 382 for (i = 0; i < 32; i++) {
384 j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1); 383 j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1);
385 j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2); 384 j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2);
diff --git a/drivers/net/pcmcia/nmclan_cs.c b/drivers/net/pcmcia/nmclan_cs.c
index c0eacfae1512..c0d85af3e942 100644
--- a/drivers/net/pcmcia/nmclan_cs.c
+++ b/drivers/net/pcmcia/nmclan_cs.c
@@ -757,29 +757,20 @@ static void nmclan_reset(struct net_device *dev)
757 757
758#if RESET_XILINX 758#if RESET_XILINX
759 struct pcmcia_device *link = &lp->link; 759 struct pcmcia_device *link = &lp->link;
760 conf_reg_t reg; 760 u8 OrigCorValue;
761 u_long OrigCorValue;
762 761
763 /* Save original COR value */ 762 /* Save original COR value */
764 reg.Function = 0; 763 pcmcia_read_config_byte(link, CISREG_COR, &OrigCorValue);
765 reg.Action = CS_READ;
766 reg.Offset = CISREG_COR;
767 reg.Value = 0;
768 pcmcia_access_configuration_register(link, &reg);
769 OrigCorValue = reg.Value;
770 764
771 /* Reset Xilinx */ 765 /* Reset Xilinx */
772 reg.Action = CS_WRITE; 766 dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%x, resetting...\n",
773 reg.Offset = CISREG_COR;
774 dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
775 OrigCorValue); 767 OrigCorValue);
776 reg.Value = COR_SOFT_RESET; 768 pcmcia_write_config_byte(link, CISREG_COR, COR_SOFT_RESET);
777 pcmcia_access_configuration_register(link, &reg);
778 /* Need to wait for 20 ms for PCMCIA to finish reset. */ 769 /* Need to wait for 20 ms for PCMCIA to finish reset. */
779 770
780 /* Restore original COR configuration index */ 771 /* Restore original COR configuration index */
781 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK); 772 pcmcia_write_config_byte(link, CISREG_COR,
782 pcmcia_access_configuration_register(link, &reg); 773 (COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK)));
783 /* Xilinx is now completely reset along with the MACE chip. */ 774 /* Xilinx is now completely reset along with the MACE chip. */
784 lp->tx_free_frames=AM2150_MAX_TX_FRAMES; 775 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
785 776
diff --git a/drivers/net/pcmcia/xirc2ps_cs.c b/drivers/net/pcmcia/xirc2ps_cs.c
index a7662f0832eb..e3a85ce89880 100644
--- a/drivers/net/pcmcia/xirc2ps_cs.c
+++ b/drivers/net/pcmcia/xirc2ps_cs.c
@@ -869,7 +869,6 @@ xirc2ps_config(struct pcmcia_device * link)
869 goto config_error; 869 goto config_error;
870 870
871 if (local->dingo) { 871 if (local->dingo) {
872 conf_reg_t reg;
873 win_req_t req; 872 win_req_t req;
874 memreq_t mem; 873 memreq_t mem;
875 874
@@ -878,15 +877,14 @@ xirc2ps_config(struct pcmcia_device * link)
878 * the base address of the ethernet port (BasePort1) is written 877 * the base address of the ethernet port (BasePort1) is written
879 * to the BAR registers of the modem. 878 * to the BAR registers of the modem.
880 */ 879 */
881 reg.Action = CS_WRITE; 880 err = pcmcia_write_config_byte(link, CISREG_IOBASE_0,
882 reg.Offset = CISREG_IOBASE_0; 881 link->io.BasePort2 & 0xff);
883 reg.Value = link->io.BasePort2 & 0xff; 882 if (err)
884 if ((err = pcmcia_access_configuration_register(link, &reg)))
885 goto config_error; 883 goto config_error;
886 reg.Action = CS_WRITE; 884
887 reg.Offset = CISREG_IOBASE_1; 885 err = pcmcia_write_config_byte(link, CISREG_IOBASE_1,
888 reg.Value = (link->io.BasePort2 >> 8) & 0xff; 886 (link->io.BasePort2 >> 8) & 0xff);
889 if ((err = pcmcia_access_configuration_register(link, &reg))) 887 if (err)
890 goto config_error; 888 goto config_error;
891 889
892 /* There is no config entry for the Ethernet part which 890 /* There is no config entry for the Ethernet part which
diff --git a/drivers/net/wireless/hostap/hostap_cs.c b/drivers/net/wireless/hostap/hostap_cs.c
index 2f4b6d4350ab..691293675a93 100644
--- a/drivers/net/wireless/hostap/hostap_cs.c
+++ b/drivers/net/wireless/hostap/hostap_cs.c
@@ -224,27 +224,18 @@ static int prism2_pccard_card_present(local_info_t *local)
224static void sandisk_set_iobase(local_info_t *local) 224static void sandisk_set_iobase(local_info_t *local)
225{ 225{
226 int res; 226 int res;
227 conf_reg_t reg;
228 struct hostap_cs_priv *hw_priv = local->hw_priv; 227 struct hostap_cs_priv *hw_priv = local->hw_priv;
229 228
230 reg.Function = 0; 229 res = pcmcia_write_config_byte(hw_priv->link, 0x10,
231 reg.Action = CS_WRITE; 230 hw_priv->link->io.BasePort1 & 0x00ff);
232 reg.Offset = 0x10; /* 0x3f0 IO base 1 */
233 reg.Value = hw_priv->link->io.BasePort1 & 0x00ff;
234 res = pcmcia_access_configuration_register(hw_priv->link,
235 &reg);
236 if (res != 0) { 231 if (res != 0) {
237 printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 0 -" 232 printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 0 -"
238 " res=%d\n", res); 233 " res=%d\n", res);
239 } 234 }
240 udelay(10); 235 udelay(10);
241 236
242 reg.Function = 0; 237 res = pcmcia_write_config_byte(hw_priv->link, 0x12,
243 reg.Action = CS_WRITE; 238 (hw_priv->link->io.BasePort1 >> 8) & 0x00ff);
244 reg.Offset = 0x12; /* 0x3f2 IO base 2 */
245 reg.Value = (hw_priv->link->io.BasePort1 & 0xff00) >> 8;
246 res = pcmcia_access_configuration_register(hw_priv->link,
247 &reg);
248 if (res != 0) { 239 if (res != 0) {
249 printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 1 -" 240 printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 1 -"
250 " res=%d\n", res); 241 " res=%d\n", res);
@@ -270,7 +261,6 @@ static void sandisk_write_hcr(local_info_t *local, int hcr)
270static int sandisk_enable_wireless(struct net_device *dev) 261static int sandisk_enable_wireless(struct net_device *dev)
271{ 262{
272 int res, ret = 0; 263 int res, ret = 0;
273 conf_reg_t reg;
274 struct hostap_interface *iface = netdev_priv(dev); 264 struct hostap_interface *iface = netdev_priv(dev);
275 local_info_t *local = iface->local; 265 local_info_t *local = iface->local;
276 struct hostap_cs_priv *hw_priv = local->hw_priv; 266 struct hostap_cs_priv *hw_priv = local->hw_priv;
@@ -297,12 +287,8 @@ static int sandisk_enable_wireless(struct net_device *dev)
297 " - using vendor-specific initialization\n", dev->name); 287 " - using vendor-specific initialization\n", dev->name);
298 hw_priv->sandisk_connectplus = 1; 288 hw_priv->sandisk_connectplus = 1;
299 289
300 reg.Function = 0; 290 res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,
301 reg.Action = CS_WRITE; 291 COR_SOFT_RESET);
302 reg.Offset = CISREG_COR;
303 reg.Value = COR_SOFT_RESET;
304 res = pcmcia_access_configuration_register(hw_priv->link,
305 &reg);
306 if (res != 0) { 292 if (res != 0) {
307 printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n", 293 printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n",
308 dev->name, res); 294 dev->name, res);
@@ -310,16 +296,13 @@ static int sandisk_enable_wireless(struct net_device *dev)
310 } 296 }
311 mdelay(5); 297 mdelay(5);
312 298
313 reg.Function = 0;
314 reg.Action = CS_WRITE;
315 reg.Offset = CISREG_COR;
316 /* 299 /*
317 * Do not enable interrupts here to avoid some bogus events. Interrupts 300 * Do not enable interrupts here to avoid some bogus events. Interrupts
318 * will be enabled during the first cor_sreset call. 301 * will be enabled during the first cor_sreset call.
319 */ 302 */
320 reg.Value = COR_LEVEL_REQ | 0x8 | COR_ADDR_DECODE | COR_FUNC_ENA; 303 res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,
321 res = pcmcia_access_configuration_register(hw_priv->link, 304 (COR_LEVEL_REQ | 0x8 | COR_ADDR_DECODE |
322 &reg); 305 COR_FUNC_ENA));
323 if (res != 0) { 306 if (res != 0) {
324 printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n", 307 printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n",
325 dev->name, res); 308 dev->name, res);
@@ -342,30 +325,23 @@ done:
342static void prism2_pccard_cor_sreset(local_info_t *local) 325static void prism2_pccard_cor_sreset(local_info_t *local)
343{ 326{
344 int res; 327 int res;
345 conf_reg_t reg; 328 u8 val;
346 struct hostap_cs_priv *hw_priv = local->hw_priv; 329 struct hostap_cs_priv *hw_priv = local->hw_priv;
347 330
348 if (!prism2_pccard_card_present(local)) 331 if (!prism2_pccard_card_present(local))
349 return; 332 return;
350 333
351 reg.Function = 0; 334 res = pcmcia_read_config_byte(hw_priv->link, CISREG_COR, &val);
352 reg.Action = CS_READ;
353 reg.Offset = CISREG_COR;
354 reg.Value = 0;
355 res = pcmcia_access_configuration_register(hw_priv->link,
356 &reg);
357 if (res != 0) { 335 if (res != 0) {
358 printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 1 (%d)\n", 336 printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 1 (%d)\n",
359 res); 337 res);
360 return; 338 return;
361 } 339 }
362 printk(KERN_DEBUG "prism2_pccard_cor_sreset: original COR %02x\n", 340 printk(KERN_DEBUG "prism2_pccard_cor_sreset: original COR %02x\n",
363 reg.Value); 341 val);
364 342
365 reg.Action = CS_WRITE; 343 val |= COR_SOFT_RESET;
366 reg.Value |= COR_SOFT_RESET; 344 res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, val);
367 res = pcmcia_access_configuration_register(hw_priv->link,
368 &reg);
369 if (res != 0) { 345 if (res != 0) {
370 printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 2 (%d)\n", 346 printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 2 (%d)\n",
371 res); 347 res);
@@ -374,11 +350,10 @@ static void prism2_pccard_cor_sreset(local_info_t *local)
374 350
375 mdelay(hw_priv->sandisk_connectplus ? 5 : 2); 351 mdelay(hw_priv->sandisk_connectplus ? 5 : 2);
376 352
377 reg.Value &= ~COR_SOFT_RESET; 353 val &= ~COR_SOFT_RESET;
378 if (hw_priv->sandisk_connectplus) 354 if (hw_priv->sandisk_connectplus)
379 reg.Value |= COR_IREQ_ENA; 355 val |= COR_IREQ_ENA;
380 res = pcmcia_access_configuration_register(hw_priv->link, 356 res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, val);
381 &reg);
382 if (res != 0) { 357 if (res != 0) {
383 printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 3 (%d)\n", 358 printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 3 (%d)\n",
384 res); 359 res);
@@ -395,8 +370,7 @@ static void prism2_pccard_cor_sreset(local_info_t *local)
395static void prism2_pccard_genesis_reset(local_info_t *local, int hcr) 370static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)
396{ 371{
397 int res; 372 int res;
398 conf_reg_t reg; 373 u8 old_cor;
399 int old_cor;
400 struct hostap_cs_priv *hw_priv = local->hw_priv; 374 struct hostap_cs_priv *hw_priv = local->hw_priv;
401 375
402 if (!prism2_pccard_card_present(local)) 376 if (!prism2_pccard_card_present(local))
@@ -407,25 +381,17 @@ static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)
407 return; 381 return;
408 } 382 }
409 383
410 reg.Function = 0; 384 res = pcmcia_read_config_byte(hw_priv->link, CISREG_COR, &old_cor);
411 reg.Action = CS_READ;
412 reg.Offset = CISREG_COR;
413 reg.Value = 0;
414 res = pcmcia_access_configuration_register(hw_priv->link,
415 &reg);
416 if (res != 0) { 385 if (res != 0) {
417 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 1 " 386 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 1 "
418 "(%d)\n", res); 387 "(%d)\n", res);
419 return; 388 return;
420 } 389 }
421 printk(KERN_DEBUG "prism2_pccard_genesis_sreset: original COR %02x\n", 390 printk(KERN_DEBUG "prism2_pccard_genesis_sreset: original COR %02x\n",
422 reg.Value); 391 old_cor);
423 old_cor = reg.Value;
424 392
425 reg.Action = CS_WRITE; 393 res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,
426 reg.Value |= COR_SOFT_RESET; 394 old_cor | COR_SOFT_RESET);
427 res = pcmcia_access_configuration_register(hw_priv->link,
428 &reg);
429 if (res != 0) { 395 if (res != 0) {
430 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 2 " 396 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 2 "
431 "(%d)\n", res); 397 "(%d)\n", res);
@@ -435,11 +401,7 @@ static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)
435 mdelay(10); 401 mdelay(10);
436 402
437 /* Setup Genesis mode */ 403 /* Setup Genesis mode */
438 reg.Action = CS_WRITE; 404 res = pcmcia_write_config_byte(hw_priv->link, CISREG_CCSR, hcr);
439 reg.Value = hcr;
440 reg.Offset = CISREG_CCSR;
441 res = pcmcia_access_configuration_register(hw_priv->link,
442 &reg);
443 if (res != 0) { 405 if (res != 0) {
444 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 3 " 406 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 3 "
445 "(%d)\n", res); 407 "(%d)\n", res);
@@ -447,11 +409,8 @@ static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)
447 } 409 }
448 mdelay(10); 410 mdelay(10);
449 411
450 reg.Action = CS_WRITE; 412 res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,
451 reg.Offset = CISREG_COR; 413 old_cor & ~COR_SOFT_RESET);
452 reg.Value = old_cor & ~COR_SOFT_RESET;
453 res = pcmcia_access_configuration_register(hw_priv->link,
454 &reg);
455 if (res != 0) { 414 if (res != 0) {
456 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 4 " 415 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 4 "
457 "(%d)\n", res); 416 "(%d)\n", res);
diff --git a/drivers/net/wireless/orinoco/spectrum_cs.c b/drivers/net/wireless/orinoco/spectrum_cs.c
index cad30e499dba..39399cd2e683 100644
--- a/drivers/net/wireless/orinoco/spectrum_cs.c
+++ b/drivers/net/wireless/orinoco/spectrum_cs.c
@@ -79,35 +79,27 @@ static int
79spectrum_reset(struct pcmcia_device *link, int idle) 79spectrum_reset(struct pcmcia_device *link, int idle)
80{ 80{
81 int ret; 81 int ret;
82 conf_reg_t reg; 82 u8 save_cor;
83 u_int save_cor; 83 u8 ccsr;
84 84
85 /* Doing it if hardware is gone is guaranteed crash */ 85 /* Doing it if hardware is gone is guaranteed crash */
86 if (!pcmcia_dev_present(link)) 86 if (!pcmcia_dev_present(link))
87 return -ENODEV; 87 return -ENODEV;
88 88
89 /* Save original COR value */ 89 /* Save original COR value */
90 reg.Function = 0; 90 ret = pcmcia_read_config_byte(link, CISREG_COR, &save_cor);
91 reg.Action = CS_READ;
92 reg.Offset = CISREG_COR;
93 ret = pcmcia_access_configuration_register(link, &reg);
94 if (ret) 91 if (ret)
95 goto failed; 92 goto failed;
96 save_cor = reg.Value;
97 93
98 /* Soft-Reset card */ 94 /* Soft-Reset card */
99 reg.Action = CS_WRITE; 95 ret = pcmcia_write_config_byte(link, CISREG_COR,
100 reg.Offset = CISREG_COR; 96 (save_cor | COR_SOFT_RESET));
101 reg.Value = (save_cor | COR_SOFT_RESET);
102 ret = pcmcia_access_configuration_register(link, &reg);
103 if (ret) 97 if (ret)
104 goto failed; 98 goto failed;
105 udelay(1000); 99 udelay(1000);
106 100
107 /* Read CCSR */ 101 /* Read CCSR */
108 reg.Action = CS_READ; 102 ret = pcmcia_read_config_byte(link, CISREG_CCSR, &ccsr);
109 reg.Offset = CISREG_CCSR;
110 ret = pcmcia_access_configuration_register(link, &reg);
111 if (ret) 103 if (ret)
112 goto failed; 104 goto failed;
113 105
@@ -115,19 +107,15 @@ spectrum_reset(struct pcmcia_device *link, int idle)
115 * Start or stop the firmware. Memory width bit should be 107 * Start or stop the firmware. Memory width bit should be
116 * preserved from the value we've just read. 108 * preserved from the value we've just read.
117 */ 109 */
118 reg.Action = CS_WRITE; 110 ccsr = (idle ? HCR_IDLE : HCR_RUN) | (ccsr & HCR_MEM16);
119 reg.Offset = CISREG_CCSR; 111 ret = pcmcia_write_config_byte(link, CISREG_CCSR, ccsr);
120 reg.Value = (idle ? HCR_IDLE : HCR_RUN) | (reg.Value & HCR_MEM16);
121 ret = pcmcia_access_configuration_register(link, &reg);
122 if (ret) 112 if (ret)
123 goto failed; 113 goto failed;
124 udelay(1000); 114 udelay(1000);
125 115
126 /* Restore original COR configuration index */ 116 /* Restore original COR configuration index */
127 reg.Action = CS_WRITE; 117 ret = pcmcia_write_config_byte(link, CISREG_COR,
128 reg.Offset = CISREG_COR; 118 (save_cor & ~COR_SOFT_RESET));
129 reg.Value = (save_cor & ~COR_SOFT_RESET);
130 ret = pcmcia_access_configuration_register(link, &reg);
131 if (ret) 119 if (ret)
132 goto failed; 120 goto failed;
133 udelay(1000); 121 udelay(1000);