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-rw-r--r--drivers/net/bnx2x/bnx2x_link.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c
index cf8b8d13ab6c..5e6f3513862c 100644
--- a/drivers/net/bnx2x/bnx2x_link.c
+++ b/drivers/net/bnx2x/bnx2x_link.c
@@ -10219,8 +10219,15 @@ static void bnx2x_54618se_link_reset(struct bnx2x_phy *phy,
10219 u32 cfg_pin; 10219 u32 cfg_pin;
10220 u8 port; 10220 u8 port;
10221 10221
10222 /* This works with E3 only, no need to check the chip 10222 /*
10223 before determining the port. */ 10223 * In case of no EPIO routed to reset the GPHY, put it
10224 * in low power mode.
10225 */
10226 bnx2x_cl22_write(bp, phy, MDIO_PMA_REG_CTRL, 0x800);
10227 /*
10228 * This works with E3 only, no need to check the chip
10229 * before determining the port.
10230 */
10224 port = params->port; 10231 port = params->port;
10225 cfg_pin = (REG_RD(bp, params->shmem_base + 10232 cfg_pin = (REG_RD(bp, params->shmem_base +
10226 offsetof(struct shmem_region, 10233 offsetof(struct shmem_region,