diff options
Diffstat (limited to 'drivers/net')
312 files changed, 10419 insertions, 5788 deletions
diff --git a/drivers/net/3c527.h b/drivers/net/3c527.h index 75e28fef797b..d693b8d15cde 100644 --- a/drivers/net/3c527.h +++ b/drivers/net/3c527.h | |||
@@ -34,7 +34,7 @@ struct mc32_mailbox | |||
34 | { | 34 | { |
35 | u16 mbox; | 35 | u16 mbox; |
36 | u16 data[1]; | 36 | u16 data[1]; |
37 | } __attribute((packed)); | 37 | } __packed; |
38 | 38 | ||
39 | struct skb_header | 39 | struct skb_header |
40 | { | 40 | { |
@@ -43,7 +43,7 @@ struct skb_header | |||
43 | u16 next; /* Do not change! */ | 43 | u16 next; /* Do not change! */ |
44 | u16 length; | 44 | u16 length; |
45 | u32 data; | 45 | u32 data; |
46 | } __attribute((packed)); | 46 | } __packed; |
47 | 47 | ||
48 | struct mc32_stats | 48 | struct mc32_stats |
49 | { | 49 | { |
@@ -68,7 +68,7 @@ struct mc32_stats | |||
68 | u32 dataA[6]; | 68 | u32 dataA[6]; |
69 | u16 dataB[5]; | 69 | u16 dataB[5]; |
70 | u32 dataC[14]; | 70 | u32 dataC[14]; |
71 | } __attribute((packed)); | 71 | } __packed; |
72 | 72 | ||
73 | #define STATUS_MASK 0x0F | 73 | #define STATUS_MASK 0x0F |
74 | #define COMPLETED (1<<7) | 74 | #define COMPLETED (1<<7) |
diff --git a/drivers/net/8139cp.c b/drivers/net/8139cp.c index 284a5f4a63ac..4a4f6b81e32d 100644 --- a/drivers/net/8139cp.c +++ b/drivers/net/8139cp.c | |||
@@ -322,7 +322,7 @@ struct cp_dma_stats { | |||
322 | __le32 rx_ok_mcast; | 322 | __le32 rx_ok_mcast; |
323 | __le16 tx_abort; | 323 | __le16 tx_abort; |
324 | __le16 tx_underrun; | 324 | __le16 tx_underrun; |
325 | } __attribute__((packed)); | 325 | } __packed; |
326 | 326 | ||
327 | struct cp_extra_stats { | 327 | struct cp_extra_stats { |
328 | unsigned long rx_frags; | 328 | unsigned long rx_frags; |
diff --git a/drivers/net/8139too.c b/drivers/net/8139too.c index 97d8068b372b..f5166dccd8df 100644 --- a/drivers/net/8139too.c +++ b/drivers/net/8139too.c | |||
@@ -662,7 +662,7 @@ static const struct ethtool_ops rtl8139_ethtool_ops; | |||
662 | /* read MMIO register */ | 662 | /* read MMIO register */ |
663 | #define RTL_R8(reg) ioread8 (ioaddr + (reg)) | 663 | #define RTL_R8(reg) ioread8 (ioaddr + (reg)) |
664 | #define RTL_R16(reg) ioread16 (ioaddr + (reg)) | 664 | #define RTL_R16(reg) ioread16 (ioaddr + (reg)) |
665 | #define RTL_R32(reg) ((unsigned long) ioread32 (ioaddr + (reg))) | 665 | #define RTL_R32(reg) ioread32 (ioaddr + (reg)) |
666 | 666 | ||
667 | 667 | ||
668 | static const u16 rtl8139_intr_mask = | 668 | static const u16 rtl8139_intr_mask = |
@@ -862,7 +862,7 @@ retry: | |||
862 | /* if unknown chip, assume array element #0, original RTL-8139 in this case */ | 862 | /* if unknown chip, assume array element #0, original RTL-8139 in this case */ |
863 | i = 0; | 863 | i = 0; |
864 | dev_dbg(&pdev->dev, "unknown chip version, assuming RTL-8139\n"); | 864 | dev_dbg(&pdev->dev, "unknown chip version, assuming RTL-8139\n"); |
865 | dev_dbg(&pdev->dev, "TxConfig = 0x%lx\n", RTL_R32 (TxConfig)); | 865 | dev_dbg(&pdev->dev, "TxConfig = 0x%x\n", RTL_R32 (TxConfig)); |
866 | tp->chipset = 0; | 866 | tp->chipset = 0; |
867 | 867 | ||
868 | match: | 868 | match: |
@@ -1643,7 +1643,7 @@ static void rtl8139_tx_timeout_task (struct work_struct *work) | |||
1643 | netdev_dbg(dev, "Tx queue start entry %ld dirty entry %ld\n", | 1643 | netdev_dbg(dev, "Tx queue start entry %ld dirty entry %ld\n", |
1644 | tp->cur_tx, tp->dirty_tx); | 1644 | tp->cur_tx, tp->dirty_tx); |
1645 | for (i = 0; i < NUM_TX_DESC; i++) | 1645 | for (i = 0; i < NUM_TX_DESC; i++) |
1646 | netdev_dbg(dev, "Tx descriptor %d is %08lx%s\n", | 1646 | netdev_dbg(dev, "Tx descriptor %d is %08x%s\n", |
1647 | i, RTL_R32(TxStatus0 + (i * 4)), | 1647 | i, RTL_R32(TxStatus0 + (i * 4)), |
1648 | i == tp->dirty_tx % NUM_TX_DESC ? | 1648 | i == tp->dirty_tx % NUM_TX_DESC ? |
1649 | " (queue head)" : ""); | 1649 | " (queue head)" : ""); |
@@ -2487,7 +2487,7 @@ static void __set_rx_mode (struct net_device *dev) | |||
2487 | int rx_mode; | 2487 | int rx_mode; |
2488 | u32 tmp; | 2488 | u32 tmp; |
2489 | 2489 | ||
2490 | netdev_dbg(dev, "rtl8139_set_rx_mode(%04x) done -- Rx config %08lx\n", | 2490 | netdev_dbg(dev, "rtl8139_set_rx_mode(%04x) done -- Rx config %08x\n", |
2491 | dev->flags, RTL_R32(RxConfig)); | 2491 | dev->flags, RTL_R32(RxConfig)); |
2492 | 2492 | ||
2493 | /* Note: do not reorder, GCC is clever about common statements. */ | 2493 | /* Note: do not reorder, GCC is clever about common statements. */ |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 2decc597bda7..fe113d0e9456 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -1659,6 +1659,7 @@ config R6040 | |||
1659 | depends on NET_PCI && PCI | 1659 | depends on NET_PCI && PCI |
1660 | select CRC32 | 1660 | select CRC32 |
1661 | select MII | 1661 | select MII |
1662 | select PHYLIB | ||
1662 | help | 1663 | help |
1663 | This is a driver for the R6040 Fast Ethernet MACs found in the | 1664 | This is a driver for the R6040 Fast Ethernet MACs found in the |
1664 | the RDC R-321x System-on-chips. | 1665 | the RDC R-321x System-on-chips. |
diff --git a/drivers/net/arcnet/capmode.c b/drivers/net/arcnet/capmode.c index 355797f70048..42fce91b71fc 100644 --- a/drivers/net/arcnet/capmode.c +++ b/drivers/net/arcnet/capmode.c | |||
@@ -37,69 +37,6 @@ | |||
37 | 37 | ||
38 | #define VERSION "arcnet: cap mode (`c') encapsulation support loaded.\n" | 38 | #define VERSION "arcnet: cap mode (`c') encapsulation support loaded.\n" |
39 | 39 | ||
40 | |||
41 | static void rx(struct net_device *dev, int bufnum, | ||
42 | struct archdr *pkthdr, int length); | ||
43 | static int build_header(struct sk_buff *skb, | ||
44 | struct net_device *dev, | ||
45 | unsigned short type, | ||
46 | uint8_t daddr); | ||
47 | static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length, | ||
48 | int bufnum); | ||
49 | static int ack_tx(struct net_device *dev, int acked); | ||
50 | |||
51 | |||
52 | static struct ArcProto capmode_proto = | ||
53 | { | ||
54 | 'r', | ||
55 | XMTU, | ||
56 | 0, | ||
57 | rx, | ||
58 | build_header, | ||
59 | prepare_tx, | ||
60 | NULL, | ||
61 | ack_tx | ||
62 | }; | ||
63 | |||
64 | |||
65 | static void arcnet_cap_init(void) | ||
66 | { | ||
67 | int count; | ||
68 | |||
69 | for (count = 1; count <= 8; count++) | ||
70 | if (arc_proto_map[count] == arc_proto_default) | ||
71 | arc_proto_map[count] = &capmode_proto; | ||
72 | |||
73 | /* for cap mode, we only set the bcast proto if there's no better one */ | ||
74 | if (arc_bcast_proto == arc_proto_default) | ||
75 | arc_bcast_proto = &capmode_proto; | ||
76 | |||
77 | arc_proto_default = &capmode_proto; | ||
78 | arc_raw_proto = &capmode_proto; | ||
79 | } | ||
80 | |||
81 | |||
82 | #ifdef MODULE | ||
83 | |||
84 | static int __init capmode_module_init(void) | ||
85 | { | ||
86 | printk(VERSION); | ||
87 | arcnet_cap_init(); | ||
88 | return 0; | ||
89 | } | ||
90 | |||
91 | static void __exit capmode_module_exit(void) | ||
92 | { | ||
93 | arcnet_unregister_proto(&capmode_proto); | ||
94 | } | ||
95 | module_init(capmode_module_init); | ||
96 | module_exit(capmode_module_exit); | ||
97 | |||
98 | MODULE_LICENSE("GPL"); | ||
99 | #endif /* MODULE */ | ||
100 | |||
101 | |||
102 | |||
103 | /* packet receiver */ | 40 | /* packet receiver */ |
104 | static void rx(struct net_device *dev, int bufnum, | 41 | static void rx(struct net_device *dev, int bufnum, |
105 | struct archdr *pkthdr, int length) | 42 | struct archdr *pkthdr, int length) |
@@ -231,65 +168,107 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length, | |||
231 | BUGMSG(D_DURING, "prepare_tx: length=%d ofs=%d\n", | 168 | BUGMSG(D_DURING, "prepare_tx: length=%d ofs=%d\n", |
232 | length,ofs); | 169 | length,ofs); |
233 | 170 | ||
234 | // Copy the arcnet-header + the protocol byte down: | 171 | /* Copy the arcnet-header + the protocol byte down: */ |
235 | lp->hw.copy_to_card(dev, bufnum, 0, hard, ARC_HDR_SIZE); | 172 | lp->hw.copy_to_card(dev, bufnum, 0, hard, ARC_HDR_SIZE); |
236 | lp->hw.copy_to_card(dev, bufnum, ofs, &pkt->soft.cap.proto, | 173 | lp->hw.copy_to_card(dev, bufnum, ofs, &pkt->soft.cap.proto, |
237 | sizeof(pkt->soft.cap.proto)); | 174 | sizeof(pkt->soft.cap.proto)); |
238 | 175 | ||
239 | // Skip the extra integer we have written into it as a cookie | 176 | /* Skip the extra integer we have written into it as a cookie |
240 | // but write the rest of the message: | 177 | but write the rest of the message: */ |
241 | lp->hw.copy_to_card(dev, bufnum, ofs+1, | 178 | lp->hw.copy_to_card(dev, bufnum, ofs+1, |
242 | ((unsigned char*)&pkt->soft.cap.mes),length-1); | 179 | ((unsigned char*)&pkt->soft.cap.mes),length-1); |
243 | 180 | ||
244 | lp->lastload_dest = hard->dest; | 181 | lp->lastload_dest = hard->dest; |
245 | 182 | ||
246 | return 1; /* done */ | 183 | return 1; /* done */ |
247 | } | 184 | } |
248 | 185 | ||
249 | |||
250 | static int ack_tx(struct net_device *dev, int acked) | 186 | static int ack_tx(struct net_device *dev, int acked) |
251 | { | 187 | { |
252 | struct arcnet_local *lp = netdev_priv(dev); | 188 | struct arcnet_local *lp = netdev_priv(dev); |
253 | struct sk_buff *ackskb; | 189 | struct sk_buff *ackskb; |
254 | struct archdr *ackpkt; | 190 | struct archdr *ackpkt; |
255 | int length=sizeof(struct arc_cap); | 191 | int length=sizeof(struct arc_cap); |
256 | 192 | ||
257 | BUGMSG(D_DURING, "capmode: ack_tx: protocol: %x: result: %d\n", | 193 | BUGMSG(D_DURING, "capmode: ack_tx: protocol: %x: result: %d\n", |
258 | lp->outgoing.skb->protocol, acked); | 194 | lp->outgoing.skb->protocol, acked); |
259 | 195 | ||
260 | BUGLVL(D_SKB) arcnet_dump_skb(dev, lp->outgoing.skb, "ack_tx"); | 196 | BUGLVL(D_SKB) arcnet_dump_skb(dev, lp->outgoing.skb, "ack_tx"); |
261 | 197 | ||
262 | /* Now alloc a skb to send back up through the layers: */ | 198 | /* Now alloc a skb to send back up through the layers: */ |
263 | ackskb = alloc_skb(length + ARC_HDR_SIZE , GFP_ATOMIC); | 199 | ackskb = alloc_skb(length + ARC_HDR_SIZE , GFP_ATOMIC); |
264 | if (ackskb == NULL) { | 200 | if (ackskb == NULL) { |
265 | BUGMSG(D_NORMAL, "Memory squeeze, can't acknowledge.\n"); | 201 | BUGMSG(D_NORMAL, "Memory squeeze, can't acknowledge.\n"); |
266 | goto free_outskb; | 202 | goto free_outskb; |
267 | } | 203 | } |
204 | |||
205 | skb_put(ackskb, length + ARC_HDR_SIZE ); | ||
206 | ackskb->dev = dev; | ||
207 | |||
208 | skb_reset_mac_header(ackskb); | ||
209 | ackpkt = (struct archdr *)skb_mac_header(ackskb); | ||
210 | /* skb_pull(ackskb, ARC_HDR_SIZE); */ | ||
268 | 211 | ||
269 | skb_put(ackskb, length + ARC_HDR_SIZE ); | 212 | skb_copy_from_linear_data(lp->outgoing.skb, ackpkt, |
270 | ackskb->dev = dev; | 213 | ARC_HDR_SIZE + sizeof(struct arc_cap)); |
214 | ackpkt->soft.cap.proto = 0; /* using protocol 0 for acknowledge */ | ||
215 | ackpkt->soft.cap.mes.ack=acked; | ||
271 | 216 | ||
272 | skb_reset_mac_header(ackskb); | 217 | BUGMSG(D_PROTO, "Ackknowledge for cap packet %x.\n", |
273 | ackpkt = (struct archdr *)skb_mac_header(ackskb); | 218 | *((int*)&ackpkt->soft.cap.cookie[0])); |
274 | /* skb_pull(ackskb, ARC_HDR_SIZE); */ | ||
275 | 219 | ||
220 | ackskb->protocol = cpu_to_be16(ETH_P_ARCNET); | ||
276 | 221 | ||
277 | skb_copy_from_linear_data(lp->outgoing.skb, ackpkt, | 222 | BUGLVL(D_SKB) arcnet_dump_skb(dev, ackskb, "ack_tx_recv"); |
278 | ARC_HDR_SIZE + sizeof(struct arc_cap)); | 223 | netif_rx(ackskb); |
279 | ackpkt->soft.cap.proto=0; /* using protocol 0 for acknowledge */ | ||
280 | ackpkt->soft.cap.mes.ack=acked; | ||
281 | 224 | ||
282 | BUGMSG(D_PROTO, "Ackknowledge for cap packet %x.\n", | 225 | free_outskb: |
283 | *((int*)&ackpkt->soft.cap.cookie[0])); | 226 | dev_kfree_skb_irq(lp->outgoing.skb); |
227 | lp->outgoing.proto = NULL; /* We are always finished when in this protocol */ | ||
284 | 228 | ||
285 | ackskb->protocol = cpu_to_be16(ETH_P_ARCNET); | 229 | return 0; |
230 | } | ||
286 | 231 | ||
287 | BUGLVL(D_SKB) arcnet_dump_skb(dev, ackskb, "ack_tx_recv"); | 232 | static struct ArcProto capmode_proto = |
288 | netif_rx(ackskb); | 233 | { |
234 | 'r', | ||
235 | XMTU, | ||
236 | 0, | ||
237 | rx, | ||
238 | build_header, | ||
239 | prepare_tx, | ||
240 | NULL, | ||
241 | ack_tx | ||
242 | }; | ||
289 | 243 | ||
290 | free_outskb: | 244 | static void arcnet_cap_init(void) |
291 | dev_kfree_skb_irq(lp->outgoing.skb); | 245 | { |
292 | lp->outgoing.proto = NULL; /* We are always finished when in this protocol */ | 246 | int count; |
293 | 247 | ||
294 | return 0; | 248 | for (count = 1; count <= 8; count++) |
249 | if (arc_proto_map[count] == arc_proto_default) | ||
250 | arc_proto_map[count] = &capmode_proto; | ||
251 | |||
252 | /* for cap mode, we only set the bcast proto if there's no better one */ | ||
253 | if (arc_bcast_proto == arc_proto_default) | ||
254 | arc_bcast_proto = &capmode_proto; | ||
255 | |||
256 | arc_proto_default = &capmode_proto; | ||
257 | arc_raw_proto = &capmode_proto; | ||
295 | } | 258 | } |
259 | |||
260 | static int __init capmode_module_init(void) | ||
261 | { | ||
262 | printk(VERSION); | ||
263 | arcnet_cap_init(); | ||
264 | return 0; | ||
265 | } | ||
266 | |||
267 | static void __exit capmode_module_exit(void) | ||
268 | { | ||
269 | arcnet_unregister_proto(&capmode_proto); | ||
270 | } | ||
271 | module_init(capmode_module_init); | ||
272 | module_exit(capmode_module_exit); | ||
273 | |||
274 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c index 24df0325090c..ee2f8425dbe7 100644 --- a/drivers/net/arm/ixp4xx_eth.c +++ b/drivers/net/arm/ixp4xx_eth.c | |||
@@ -738,6 +738,17 @@ static void eth_set_mcast_list(struct net_device *dev) | |||
738 | struct netdev_hw_addr *ha; | 738 | struct netdev_hw_addr *ha; |
739 | u8 diffs[ETH_ALEN], *addr; | 739 | u8 diffs[ETH_ALEN], *addr; |
740 | int i; | 740 | int i; |
741 | static const u8 allmulti[] = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00 }; | ||
742 | |||
743 | if (dev->flags & IFF_ALLMULTI) { | ||
744 | for (i = 0; i < ETH_ALEN; i++) { | ||
745 | __raw_writel(allmulti[i], &port->regs->mcast_addr[i]); | ||
746 | __raw_writel(allmulti[i], &port->regs->mcast_mask[i]); | ||
747 | } | ||
748 | __raw_writel(DEFAULT_RX_CNTRL0 | RX_CNTRL0_ADDR_FLTR_EN, | ||
749 | &port->regs->rx_control[0]); | ||
750 | return; | ||
751 | } | ||
741 | 752 | ||
742 | if ((dev->flags & IFF_PROMISC) || netdev_mc_empty(dev)) { | 753 | if ((dev->flags & IFF_PROMISC) || netdev_mc_empty(dev)) { |
743 | __raw_writel(DEFAULT_RX_CNTRL0 & ~RX_CNTRL0_ADDR_FLTR_EN, | 754 | __raw_writel(DEFAULT_RX_CNTRL0 & ~RX_CNTRL0_ADDR_FLTR_EN, |
diff --git a/drivers/net/atl1c/atl1c.h b/drivers/net/atl1c/atl1c.h index 84ae905bf732..52abbbdf8a08 100644 --- a/drivers/net/atl1c/atl1c.h +++ b/drivers/net/atl1c/atl1c.h | |||
@@ -73,7 +73,8 @@ | |||
73 | #define FULL_DUPLEX 2 | 73 | #define FULL_DUPLEX 2 |
74 | 74 | ||
75 | #define AT_RX_BUF_SIZE (ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN) | 75 | #define AT_RX_BUF_SIZE (ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN) |
76 | #define MAX_JUMBO_FRAME_SIZE (9*1024) | 76 | #define MAX_JUMBO_FRAME_SIZE (6*1024) |
77 | #define MAX_TSO_FRAME_SIZE (7*1024) | ||
77 | #define MAX_TX_OFFLOAD_THRESH (9*1024) | 78 | #define MAX_TX_OFFLOAD_THRESH (9*1024) |
78 | 79 | ||
79 | #define AT_MAX_RECEIVE_QUEUE 4 | 80 | #define AT_MAX_RECEIVE_QUEUE 4 |
@@ -87,10 +88,11 @@ | |||
87 | #define AT_MAX_INT_WORK 5 | 88 | #define AT_MAX_INT_WORK 5 |
88 | #define AT_TWSI_EEPROM_TIMEOUT 100 | 89 | #define AT_TWSI_EEPROM_TIMEOUT 100 |
89 | #define AT_HW_MAX_IDLE_DELAY 10 | 90 | #define AT_HW_MAX_IDLE_DELAY 10 |
90 | #define AT_SUSPEND_LINK_TIMEOUT 28 | 91 | #define AT_SUSPEND_LINK_TIMEOUT 100 |
91 | 92 | ||
92 | #define AT_ASPM_L0S_TIMER 6 | 93 | #define AT_ASPM_L0S_TIMER 6 |
93 | #define AT_ASPM_L1_TIMER 12 | 94 | #define AT_ASPM_L1_TIMER 12 |
95 | #define AT_LCKDET_TIMER 12 | ||
94 | 96 | ||
95 | #define ATL1C_PCIE_L0S_L1_DISABLE 0x01 | 97 | #define ATL1C_PCIE_L0S_L1_DISABLE 0x01 |
96 | #define ATL1C_PCIE_PHY_RESET 0x02 | 98 | #define ATL1C_PCIE_PHY_RESET 0x02 |
@@ -316,6 +318,7 @@ enum atl1c_nic_type { | |||
316 | athr_l2c_b, | 318 | athr_l2c_b, |
317 | athr_l2c_b2, | 319 | athr_l2c_b2, |
318 | athr_l1d, | 320 | athr_l1d, |
321 | athr_l1d_2, | ||
319 | }; | 322 | }; |
320 | 323 | ||
321 | enum atl1c_trans_queue { | 324 | enum atl1c_trans_queue { |
@@ -392,6 +395,8 @@ struct atl1c_hw { | |||
392 | u16 subsystem_id; | 395 | u16 subsystem_id; |
393 | u16 subsystem_vendor_id; | 396 | u16 subsystem_vendor_id; |
394 | u8 revision_id; | 397 | u8 revision_id; |
398 | u16 phy_id1; | ||
399 | u16 phy_id2; | ||
395 | 400 | ||
396 | u32 intr_mask; | 401 | u32 intr_mask; |
397 | u8 dmaw_dly_cnt; | 402 | u8 dmaw_dly_cnt; |
diff --git a/drivers/net/atl1c/atl1c_hw.c b/drivers/net/atl1c/atl1c_hw.c index f1389d664a21..d8501f060957 100644 --- a/drivers/net/atl1c/atl1c_hw.c +++ b/drivers/net/atl1c/atl1c_hw.c | |||
@@ -37,6 +37,9 @@ int atl1c_check_eeprom_exist(struct atl1c_hw *hw) | |||
37 | if (data & TWSI_DEBUG_DEV_EXIST) | 37 | if (data & TWSI_DEBUG_DEV_EXIST) |
38 | return 1; | 38 | return 1; |
39 | 39 | ||
40 | AT_READ_REG(hw, REG_MASTER_CTRL, &data); | ||
41 | if (data & MASTER_CTRL_OTP_SEL) | ||
42 | return 1; | ||
40 | return 0; | 43 | return 0; |
41 | } | 44 | } |
42 | 45 | ||
@@ -69,6 +72,8 @@ static int atl1c_get_permanent_address(struct atl1c_hw *hw) | |||
69 | u32 i; | 72 | u32 i; |
70 | u32 otp_ctrl_data; | 73 | u32 otp_ctrl_data; |
71 | u32 twsi_ctrl_data; | 74 | u32 twsi_ctrl_data; |
75 | u32 ltssm_ctrl_data; | ||
76 | u32 wol_data; | ||
72 | u8 eth_addr[ETH_ALEN]; | 77 | u8 eth_addr[ETH_ALEN]; |
73 | u16 phy_data; | 78 | u16 phy_data; |
74 | bool raise_vol = false; | 79 | bool raise_vol = false; |
@@ -104,6 +109,15 @@ static int atl1c_get_permanent_address(struct atl1c_hw *hw) | |||
104 | udelay(20); | 109 | udelay(20); |
105 | raise_vol = true; | 110 | raise_vol = true; |
106 | } | 111 | } |
112 | /* close open bit of ReadOnly*/ | ||
113 | AT_READ_REG(hw, REG_LTSSM_ID_CTRL, <ssm_ctrl_data); | ||
114 | ltssm_ctrl_data &= ~LTSSM_ID_EN_WRO; | ||
115 | AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, ltssm_ctrl_data); | ||
116 | |||
117 | /* clear any WOL settings */ | ||
118 | AT_WRITE_REG(hw, REG_WOL_CTRL, 0); | ||
119 | AT_READ_REG(hw, REG_WOL_CTRL, &wol_data); | ||
120 | |||
107 | 121 | ||
108 | AT_READ_REG(hw, REG_TWSI_CTRL, &twsi_ctrl_data); | 122 | AT_READ_REG(hw, REG_TWSI_CTRL, &twsi_ctrl_data); |
109 | twsi_ctrl_data |= TWSI_CTRL_SW_LDSTART; | 123 | twsi_ctrl_data |= TWSI_CTRL_SW_LDSTART; |
@@ -119,17 +133,15 @@ static int atl1c_get_permanent_address(struct atl1c_hw *hw) | |||
119 | } | 133 | } |
120 | /* Disable OTP_CLK */ | 134 | /* Disable OTP_CLK */ |
121 | if ((hw->nic_type == athr_l1c || hw->nic_type == athr_l2c)) { | 135 | if ((hw->nic_type == athr_l1c || hw->nic_type == athr_l2c)) { |
122 | if (otp_ctrl_data & OTP_CTRL_CLK_EN) { | 136 | otp_ctrl_data &= ~OTP_CTRL_CLK_EN; |
123 | otp_ctrl_data &= ~OTP_CTRL_CLK_EN; | 137 | AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data); |
124 | AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data); | 138 | msleep(1); |
125 | AT_WRITE_FLUSH(hw); | ||
126 | msleep(1); | ||
127 | } | ||
128 | } | 139 | } |
129 | if (raise_vol) { | 140 | if (raise_vol) { |
130 | if (hw->nic_type == athr_l2c_b || | 141 | if (hw->nic_type == athr_l2c_b || |
131 | hw->nic_type == athr_l2c_b2 || | 142 | hw->nic_type == athr_l2c_b2 || |
132 | hw->nic_type == athr_l1d) { | 143 | hw->nic_type == athr_l1d || |
144 | hw->nic_type == athr_l1d_2) { | ||
133 | atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x00); | 145 | atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x00); |
134 | if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &phy_data)) | 146 | if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &phy_data)) |
135 | goto out; | 147 | goto out; |
@@ -456,14 +468,22 @@ int atl1c_phy_reset(struct atl1c_hw *hw) | |||
456 | 468 | ||
457 | if (hw->nic_type == athr_l2c_b || | 469 | if (hw->nic_type == athr_l2c_b || |
458 | hw->nic_type == athr_l2c_b2 || | 470 | hw->nic_type == athr_l2c_b2 || |
459 | hw->nic_type == athr_l1d) { | 471 | hw->nic_type == athr_l1d || |
472 | hw->nic_type == athr_l1d_2) { | ||
460 | atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x3B); | 473 | atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x3B); |
461 | atl1c_read_phy_reg(hw, MII_DBG_DATA, &phy_data); | 474 | atl1c_read_phy_reg(hw, MII_DBG_DATA, &phy_data); |
462 | atl1c_write_phy_reg(hw, MII_DBG_DATA, phy_data & 0xFFF7); | 475 | atl1c_write_phy_reg(hw, MII_DBG_DATA, phy_data & 0xFFF7); |
463 | msleep(20); | 476 | msleep(20); |
464 | } | 477 | } |
465 | 478 | if (hw->nic_type == athr_l1d) { | |
466 | /*Enable PHY LinkChange Interrupt */ | 479 | atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x29); |
480 | atl1c_write_phy_reg(hw, MII_DBG_DATA, 0x929D); | ||
481 | } | ||
482 | if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c_b2 | ||
483 | || hw->nic_type == athr_l2c || hw->nic_type == athr_l2c) { | ||
484 | atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x29); | ||
485 | atl1c_write_phy_reg(hw, MII_DBG_DATA, 0xB6DD); | ||
486 | } | ||
467 | err = atl1c_write_phy_reg(hw, MII_IER, mii_ier_data); | 487 | err = atl1c_write_phy_reg(hw, MII_IER, mii_ier_data); |
468 | if (err) { | 488 | if (err) { |
469 | if (netif_msg_hw(adapter)) | 489 | if (netif_msg_hw(adapter)) |
@@ -482,12 +502,10 @@ int atl1c_phy_init(struct atl1c_hw *hw) | |||
482 | struct pci_dev *pdev = adapter->pdev; | 502 | struct pci_dev *pdev = adapter->pdev; |
483 | int ret_val; | 503 | int ret_val; |
484 | u16 mii_bmcr_data = BMCR_RESET; | 504 | u16 mii_bmcr_data = BMCR_RESET; |
485 | u16 phy_id1, phy_id2; | ||
486 | 505 | ||
487 | if ((atl1c_read_phy_reg(hw, MII_PHYSID1, &phy_id1) != 0) || | 506 | if ((atl1c_read_phy_reg(hw, MII_PHYSID1, &hw->phy_id1) != 0) || |
488 | (atl1c_read_phy_reg(hw, MII_PHYSID2, &phy_id2) != 0)) { | 507 | (atl1c_read_phy_reg(hw, MII_PHYSID2, &hw->phy_id2) != 0)) { |
489 | if (netif_msg_link(adapter)) | 508 | dev_err(&pdev->dev, "Error get phy ID\n"); |
490 | dev_err(&pdev->dev, "Error get phy ID\n"); | ||
491 | return -1; | 509 | return -1; |
492 | } | 510 | } |
493 | switch (hw->media_type) { | 511 | switch (hw->media_type) { |
@@ -572,6 +590,65 @@ int atl1c_get_speed_and_duplex(struct atl1c_hw *hw, u16 *speed, u16 *duplex) | |||
572 | return 0; | 590 | return 0; |
573 | } | 591 | } |
574 | 592 | ||
593 | int atl1c_phy_power_saving(struct atl1c_hw *hw) | ||
594 | { | ||
595 | struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter; | ||
596 | struct pci_dev *pdev = adapter->pdev; | ||
597 | int ret = 0; | ||
598 | u16 autoneg_advertised = ADVERTISED_10baseT_Half; | ||
599 | u16 save_autoneg_advertised; | ||
600 | u16 phy_data; | ||
601 | u16 mii_lpa_data; | ||
602 | u16 speed = SPEED_0; | ||
603 | u16 duplex = FULL_DUPLEX; | ||
604 | int i; | ||
605 | |||
606 | atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); | ||
607 | atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); | ||
608 | if (phy_data & BMSR_LSTATUS) { | ||
609 | atl1c_read_phy_reg(hw, MII_LPA, &mii_lpa_data); | ||
610 | if (mii_lpa_data & LPA_10FULL) | ||
611 | autoneg_advertised = ADVERTISED_10baseT_Full; | ||
612 | else if (mii_lpa_data & LPA_10HALF) | ||
613 | autoneg_advertised = ADVERTISED_10baseT_Half; | ||
614 | else if (mii_lpa_data & LPA_100HALF) | ||
615 | autoneg_advertised = ADVERTISED_100baseT_Half; | ||
616 | else if (mii_lpa_data & LPA_100FULL) | ||
617 | autoneg_advertised = ADVERTISED_100baseT_Full; | ||
618 | |||
619 | save_autoneg_advertised = hw->autoneg_advertised; | ||
620 | hw->phy_configured = false; | ||
621 | hw->autoneg_advertised = autoneg_advertised; | ||
622 | if (atl1c_restart_autoneg(hw) != 0) { | ||
623 | dev_dbg(&pdev->dev, "phy autoneg failed\n"); | ||
624 | ret = -1; | ||
625 | } | ||
626 | hw->autoneg_advertised = save_autoneg_advertised; | ||
627 | |||
628 | if (mii_lpa_data) { | ||
629 | for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) { | ||
630 | mdelay(100); | ||
631 | atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); | ||
632 | atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); | ||
633 | if (phy_data & BMSR_LSTATUS) { | ||
634 | if (atl1c_get_speed_and_duplex(hw, &speed, | ||
635 | &duplex) != 0) | ||
636 | dev_dbg(&pdev->dev, | ||
637 | "get speed and duplex failed\n"); | ||
638 | break; | ||
639 | } | ||
640 | } | ||
641 | } | ||
642 | } else { | ||
643 | speed = SPEED_10; | ||
644 | duplex = HALF_DUPLEX; | ||
645 | } | ||
646 | adapter->link_speed = speed; | ||
647 | adapter->link_duplex = duplex; | ||
648 | |||
649 | return ret; | ||
650 | } | ||
651 | |||
575 | int atl1c_restart_autoneg(struct atl1c_hw *hw) | 652 | int atl1c_restart_autoneg(struct atl1c_hw *hw) |
576 | { | 653 | { |
577 | int err = 0; | 654 | int err = 0; |
diff --git a/drivers/net/atl1c/atl1c_hw.h b/drivers/net/atl1c/atl1c_hw.h index 1eeb3ed9f0cb..3dd675979aa1 100644 --- a/drivers/net/atl1c/atl1c_hw.h +++ b/drivers/net/atl1c/atl1c_hw.h | |||
@@ -42,7 +42,7 @@ bool atl1c_read_eeprom(struct atl1c_hw *hw, u32 offset, u32 *p_value); | |||
42 | int atl1c_phy_init(struct atl1c_hw *hw); | 42 | int atl1c_phy_init(struct atl1c_hw *hw); |
43 | int atl1c_check_eeprom_exist(struct atl1c_hw *hw); | 43 | int atl1c_check_eeprom_exist(struct atl1c_hw *hw); |
44 | int atl1c_restart_autoneg(struct atl1c_hw *hw); | 44 | int atl1c_restart_autoneg(struct atl1c_hw *hw); |
45 | 45 | int atl1c_phy_power_saving(struct atl1c_hw *hw); | |
46 | /* register definition */ | 46 | /* register definition */ |
47 | #define REG_DEVICE_CAP 0x5C | 47 | #define REG_DEVICE_CAP 0x5C |
48 | #define DEVICE_CAP_MAX_PAYLOAD_MASK 0x7 | 48 | #define DEVICE_CAP_MAX_PAYLOAD_MASK 0x7 |
@@ -120,6 +120,12 @@ int atl1c_restart_autoneg(struct atl1c_hw *hw); | |||
120 | #define REG_PCIE_PHYMISC 0x1000 | 120 | #define REG_PCIE_PHYMISC 0x1000 |
121 | #define PCIE_PHYMISC_FORCE_RCV_DET 0x4 | 121 | #define PCIE_PHYMISC_FORCE_RCV_DET 0x4 |
122 | 122 | ||
123 | #define REG_PCIE_PHYMISC2 0x1004 | ||
124 | #define PCIE_PHYMISC2_SERDES_CDR_MASK 0x3 | ||
125 | #define PCIE_PHYMISC2_SERDES_CDR_SHIFT 16 | ||
126 | #define PCIE_PHYMISC2_SERDES_TH_MASK 0x3 | ||
127 | #define PCIE_PHYMISC2_SERDES_TH_SHIFT 18 | ||
128 | |||
123 | #define REG_TWSI_DEBUG 0x1108 | 129 | #define REG_TWSI_DEBUG 0x1108 |
124 | #define TWSI_DEBUG_DEV_EXIST 0x20000000 | 130 | #define TWSI_DEBUG_DEV_EXIST 0x20000000 |
125 | 131 | ||
@@ -150,24 +156,28 @@ int atl1c_restart_autoneg(struct atl1c_hw *hw); | |||
150 | #define PM_CTRL_ASPM_L0S_EN 0x00001000 | 156 | #define PM_CTRL_ASPM_L0S_EN 0x00001000 |
151 | #define PM_CTRL_CLK_SWH_L1 0x00002000 | 157 | #define PM_CTRL_CLK_SWH_L1 0x00002000 |
152 | #define PM_CTRL_CLK_PWM_VER1_1 0x00004000 | 158 | #define PM_CTRL_CLK_PWM_VER1_1 0x00004000 |
153 | #define PM_CTRL_PCIE_RECV 0x00008000 | 159 | #define PM_CTRL_RCVR_WT_TIMER 0x00008000 |
154 | #define PM_CTRL_L1_ENTRY_TIMER_MASK 0xF | 160 | #define PM_CTRL_L1_ENTRY_TIMER_MASK 0xF |
155 | #define PM_CTRL_L1_ENTRY_TIMER_SHIFT 16 | 161 | #define PM_CTRL_L1_ENTRY_TIMER_SHIFT 16 |
156 | #define PM_CTRL_PM_REQ_TIMER_MASK 0xF | 162 | #define PM_CTRL_PM_REQ_TIMER_MASK 0xF |
157 | #define PM_CTRL_PM_REQ_TIMER_SHIFT 20 | 163 | #define PM_CTRL_PM_REQ_TIMER_SHIFT 20 |
158 | #define PM_CTRL_LCKDET_TIMER_MASK 0x3F | 164 | #define PM_CTRL_LCKDET_TIMER_MASK 0xF |
159 | #define PM_CTRL_LCKDET_TIMER_SHIFT 24 | 165 | #define PM_CTRL_LCKDET_TIMER_SHIFT 24 |
160 | #define PM_CTRL_EN_BUFS_RX_L0S 0x10000000 | 166 | #define PM_CTRL_EN_BUFS_RX_L0S 0x10000000 |
161 | #define PM_CTRL_SA_DLY_EN 0x20000000 | 167 | #define PM_CTRL_SA_DLY_EN 0x20000000 |
162 | #define PM_CTRL_MAC_ASPM_CHK 0x40000000 | 168 | #define PM_CTRL_MAC_ASPM_CHK 0x40000000 |
163 | #define PM_CTRL_HOTRST 0x80000000 | 169 | #define PM_CTRL_HOTRST 0x80000000 |
164 | 170 | ||
171 | #define REG_LTSSM_ID_CTRL 0x12FC | ||
172 | #define LTSSM_ID_EN_WRO 0x1000 | ||
165 | /* Selene Master Control Register */ | 173 | /* Selene Master Control Register */ |
166 | #define REG_MASTER_CTRL 0x1400 | 174 | #define REG_MASTER_CTRL 0x1400 |
167 | #define MASTER_CTRL_SOFT_RST 0x1 | 175 | #define MASTER_CTRL_SOFT_RST 0x1 |
168 | #define MASTER_CTRL_TEST_MODE_MASK 0x3 | 176 | #define MASTER_CTRL_TEST_MODE_MASK 0x3 |
169 | #define MASTER_CTRL_TEST_MODE_SHIFT 2 | 177 | #define MASTER_CTRL_TEST_MODE_SHIFT 2 |
170 | #define MASTER_CTRL_BERT_START 0x10 | 178 | #define MASTER_CTRL_BERT_START 0x10 |
179 | #define MASTER_CTRL_OOB_DIS_OFF 0x40 | ||
180 | #define MASTER_CTRL_SA_TIMER_EN 0x80 | ||
171 | #define MASTER_CTRL_MTIMER_EN 0x100 | 181 | #define MASTER_CTRL_MTIMER_EN 0x100 |
172 | #define MASTER_CTRL_MANUAL_INT 0x200 | 182 | #define MASTER_CTRL_MANUAL_INT 0x200 |
173 | #define MASTER_CTRL_TX_ITIMER_EN 0x400 | 183 | #define MASTER_CTRL_TX_ITIMER_EN 0x400 |
@@ -220,6 +230,12 @@ int atl1c_restart_autoneg(struct atl1c_hw *hw); | |||
220 | GPHY_CTRL_PWDOWN_HW |\ | 230 | GPHY_CTRL_PWDOWN_HW |\ |
221 | GPHY_CTRL_PHY_IDDQ) | 231 | GPHY_CTRL_PHY_IDDQ) |
222 | 232 | ||
233 | #define GPHY_CTRL_POWER_SAVING ( \ | ||
234 | GPHY_CTRL_SEL_ANA_RST |\ | ||
235 | GPHY_CTRL_HIB_EN |\ | ||
236 | GPHY_CTRL_HIB_PULSE |\ | ||
237 | GPHY_CTRL_PWDOWN_HW |\ | ||
238 | GPHY_CTRL_PHY_IDDQ) | ||
223 | /* Block IDLE Status Register */ | 239 | /* Block IDLE Status Register */ |
224 | #define REG_IDLE_STATUS 0x1410 | 240 | #define REG_IDLE_STATUS 0x1410 |
225 | #define IDLE_STATUS_MASK 0x00FF | 241 | #define IDLE_STATUS_MASK 0x00FF |
@@ -287,6 +303,14 @@ int atl1c_restart_autoneg(struct atl1c_hw *hw); | |||
287 | #define SERDES_LOCK_DETECT 0x1 /* SerDes lock detected. This signal | 303 | #define SERDES_LOCK_DETECT 0x1 /* SerDes lock detected. This signal |
288 | * comes from Analog SerDes */ | 304 | * comes from Analog SerDes */ |
289 | #define SERDES_LOCK_DETECT_EN 0x2 /* 1: Enable SerDes Lock detect function */ | 305 | #define SERDES_LOCK_DETECT_EN 0x2 /* 1: Enable SerDes Lock detect function */ |
306 | #define SERDES_LOCK_STS_SELFB_PLL_SHIFT 0xE | ||
307 | #define SERDES_LOCK_STS_SELFB_PLL_MASK 0x3 | ||
308 | #define SERDES_OVCLK_18_25 0x0 | ||
309 | #define SERDES_OVCLK_12_18 0x1 | ||
310 | #define SERDES_OVCLK_0_4 0x2 | ||
311 | #define SERDES_OVCLK_4_12 0x3 | ||
312 | #define SERDES_MAC_CLK_SLOWDOWN 0x20000 | ||
313 | #define SERDES_PYH_CLK_SLOWDOWN 0x40000 | ||
290 | 314 | ||
291 | /* MAC Control Register */ | 315 | /* MAC Control Register */ |
292 | #define REG_MAC_CTRL 0x1480 | 316 | #define REG_MAC_CTRL 0x1480 |
@@ -693,6 +717,21 @@ int atl1c_restart_autoneg(struct atl1c_hw *hw); | |||
693 | #define REG_MAC_TX_STATUS_BIN 0x1760 | 717 | #define REG_MAC_TX_STATUS_BIN 0x1760 |
694 | #define REG_MAC_TX_STATUS_END 0x17c0 | 718 | #define REG_MAC_TX_STATUS_END 0x17c0 |
695 | 719 | ||
720 | #define REG_CLK_GATING_CTRL 0x1814 | ||
721 | #define CLK_GATING_DMAW_EN 0x0001 | ||
722 | #define CLK_GATING_DMAR_EN 0x0002 | ||
723 | #define CLK_GATING_TXQ_EN 0x0004 | ||
724 | #define CLK_GATING_RXQ_EN 0x0008 | ||
725 | #define CLK_GATING_TXMAC_EN 0x0010 | ||
726 | #define CLK_GATING_RXMAC_EN 0x0020 | ||
727 | |||
728 | #define CLK_GATING_EN_ALL (CLK_GATING_DMAW_EN |\ | ||
729 | CLK_GATING_DMAR_EN |\ | ||
730 | CLK_GATING_TXQ_EN |\ | ||
731 | CLK_GATING_RXQ_EN |\ | ||
732 | CLK_GATING_TXMAC_EN|\ | ||
733 | CLK_GATING_RXMAC_EN) | ||
734 | |||
696 | /* DEBUG ADDR */ | 735 | /* DEBUG ADDR */ |
697 | #define REG_DEBUG_DATA0 0x1900 | 736 | #define REG_DEBUG_DATA0 0x1900 |
698 | #define REG_DEBUG_DATA1 0x1904 | 737 | #define REG_DEBUG_DATA1 0x1904 |
@@ -734,6 +773,10 @@ int atl1c_restart_autoneg(struct atl1c_hw *hw); | |||
734 | 773 | ||
735 | #define MII_PHYSID1 0x02 | 774 | #define MII_PHYSID1 0x02 |
736 | #define MII_PHYSID2 0x03 | 775 | #define MII_PHYSID2 0x03 |
776 | #define L1D_MPW_PHYID1 0xD01C /* V7 */ | ||
777 | #define L1D_MPW_PHYID2 0xD01D /* V1-V6 */ | ||
778 | #define L1D_MPW_PHYID3 0xD01E /* V8 */ | ||
779 | |||
737 | 780 | ||
738 | /* Autoneg Advertisement Register */ | 781 | /* Autoneg Advertisement Register */ |
739 | #define MII_ADVERTISE 0x04 | 782 | #define MII_ADVERTISE 0x04 |
diff --git a/drivers/net/atl1c/atl1c_main.c b/drivers/net/atl1c/atl1c_main.c index 1c3c046d5f34..c7b8ef507ebd 100644 --- a/drivers/net/atl1c/atl1c_main.c +++ b/drivers/net/atl1c/atl1c_main.c | |||
@@ -21,7 +21,7 @@ | |||
21 | 21 | ||
22 | #include "atl1c.h" | 22 | #include "atl1c.h" |
23 | 23 | ||
24 | #define ATL1C_DRV_VERSION "1.0.0.2-NAPI" | 24 | #define ATL1C_DRV_VERSION "1.0.1.0-NAPI" |
25 | char atl1c_driver_name[] = "atl1c"; | 25 | char atl1c_driver_name[] = "atl1c"; |
26 | char atl1c_driver_version[] = ATL1C_DRV_VERSION; | 26 | char atl1c_driver_version[] = ATL1C_DRV_VERSION; |
27 | #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062 | 27 | #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062 |
@@ -29,7 +29,7 @@ char atl1c_driver_version[] = ATL1C_DRV_VERSION; | |||
29 | #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */ | 29 | #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */ |
30 | #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */ | 30 | #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */ |
31 | #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */ | 31 | #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */ |
32 | 32 | #define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */ | |
33 | #define L2CB_V10 0xc0 | 33 | #define L2CB_V10 0xc0 |
34 | #define L2CB_V11 0xc1 | 34 | #define L2CB_V11 0xc1 |
35 | 35 | ||
@@ -97,7 +97,28 @@ static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] = | |||
97 | 97 | ||
98 | static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | | 98 | static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | |
99 | NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; | 99 | NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; |
100 | static void atl1c_pcie_patch(struct atl1c_hw *hw) | ||
101 | { | ||
102 | u32 data; | ||
100 | 103 | ||
104 | AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); | ||
105 | data |= PCIE_PHYMISC_FORCE_RCV_DET; | ||
106 | AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); | ||
107 | |||
108 | if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { | ||
109 | AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); | ||
110 | |||
111 | data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK << | ||
112 | PCIE_PHYMISC2_SERDES_CDR_SHIFT); | ||
113 | data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT; | ||
114 | data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK << | ||
115 | PCIE_PHYMISC2_SERDES_TH_SHIFT); | ||
116 | data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT; | ||
117 | AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); | ||
118 | } | ||
119 | } | ||
120 | |||
121 | /* FIXME: no need any more ? */ | ||
101 | /* | 122 | /* |
102 | * atl1c_init_pcie - init PCIE module | 123 | * atl1c_init_pcie - init PCIE module |
103 | */ | 124 | */ |
@@ -127,6 +148,11 @@ static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) | |||
127 | data &= ~PCIE_UC_SERVRITY_FCP; | 148 | data &= ~PCIE_UC_SERVRITY_FCP; |
128 | AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data); | 149 | AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data); |
129 | 150 | ||
151 | AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); | ||
152 | data &= ~LTSSM_ID_EN_WRO; | ||
153 | AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); | ||
154 | |||
155 | atl1c_pcie_patch(hw); | ||
130 | if (flag & ATL1C_PCIE_L0S_L1_DISABLE) | 156 | if (flag & ATL1C_PCIE_L0S_L1_DISABLE) |
131 | atl1c_disable_l0s_l1(hw); | 157 | atl1c_disable_l0s_l1(hw); |
132 | if (flag & ATL1C_PCIE_PHY_RESET) | 158 | if (flag & ATL1C_PCIE_PHY_RESET) |
@@ -135,7 +161,7 @@ static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) | |||
135 | AT_WRITE_REG(hw, REG_GPHY_CTRL, | 161 | AT_WRITE_REG(hw, REG_GPHY_CTRL, |
136 | GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET); | 162 | GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET); |
137 | 163 | ||
138 | msleep(1); | 164 | msleep(5); |
139 | } | 165 | } |
140 | 166 | ||
141 | /* | 167 | /* |
@@ -159,6 +185,7 @@ static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) | |||
159 | { | 185 | { |
160 | atomic_inc(&adapter->irq_sem); | 186 | atomic_inc(&adapter->irq_sem); |
161 | AT_WRITE_REG(&adapter->hw, REG_IMR, 0); | 187 | AT_WRITE_REG(&adapter->hw, REG_IMR, 0); |
188 | AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); | ||
162 | AT_WRITE_FLUSH(&adapter->hw); | 189 | AT_WRITE_FLUSH(&adapter->hw); |
163 | synchronize_irq(adapter->pdev->irq); | 190 | synchronize_irq(adapter->pdev->irq); |
164 | } | 191 | } |
@@ -231,15 +258,15 @@ static void atl1c_check_link_status(struct atl1c_adapter *adapter) | |||
231 | 258 | ||
232 | if ((phy_data & BMSR_LSTATUS) == 0) { | 259 | if ((phy_data & BMSR_LSTATUS) == 0) { |
233 | /* link down */ | 260 | /* link down */ |
234 | if (netif_carrier_ok(netdev)) { | 261 | hw->hibernate = true; |
235 | hw->hibernate = true; | 262 | if (atl1c_stop_mac(hw) != 0) |
236 | if (atl1c_stop_mac(hw) != 0) | 263 | if (netif_msg_hw(adapter)) |
237 | if (netif_msg_hw(adapter)) | 264 | dev_warn(&pdev->dev, "stop mac failed\n"); |
238 | dev_warn(&pdev->dev, | 265 | atl1c_set_aspm(hw, false); |
239 | "stop mac failed\n"); | ||
240 | atl1c_set_aspm(hw, false); | ||
241 | } | ||
242 | netif_carrier_off(netdev); | 266 | netif_carrier_off(netdev); |
267 | netif_stop_queue(netdev); | ||
268 | atl1c_phy_reset(hw); | ||
269 | atl1c_phy_init(&adapter->hw); | ||
243 | } else { | 270 | } else { |
244 | /* Link Up */ | 271 | /* Link Up */ |
245 | hw->hibernate = false; | 272 | hw->hibernate = false; |
@@ -308,6 +335,7 @@ static void atl1c_common_task(struct work_struct *work) | |||
308 | netdev = adapter->netdev; | 335 | netdev = adapter->netdev; |
309 | 336 | ||
310 | if (adapter->work_event & ATL1C_WORK_EVENT_RESET) { | 337 | if (adapter->work_event & ATL1C_WORK_EVENT_RESET) { |
338 | adapter->work_event &= ~ATL1C_WORK_EVENT_RESET; | ||
311 | netif_device_detach(netdev); | 339 | netif_device_detach(netdev); |
312 | atl1c_down(adapter); | 340 | atl1c_down(adapter); |
313 | atl1c_up(adapter); | 341 | atl1c_up(adapter); |
@@ -315,8 +343,11 @@ static void atl1c_common_task(struct work_struct *work) | |||
315 | return; | 343 | return; |
316 | } | 344 | } |
317 | 345 | ||
318 | if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE) | 346 | if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE) { |
347 | adapter->work_event &= ~ATL1C_WORK_EVENT_LINK_CHANGE; | ||
319 | atl1c_check_link_status(adapter); | 348 | atl1c_check_link_status(adapter); |
349 | } | ||
350 | return; | ||
320 | } | 351 | } |
321 | 352 | ||
322 | 353 | ||
@@ -476,6 +507,13 @@ static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) | |||
476 | netdev->mtu = new_mtu; | 507 | netdev->mtu = new_mtu; |
477 | adapter->hw.max_frame_size = new_mtu; | 508 | adapter->hw.max_frame_size = new_mtu; |
478 | atl1c_set_rxbufsize(adapter, netdev); | 509 | atl1c_set_rxbufsize(adapter, netdev); |
510 | if (new_mtu > MAX_TSO_FRAME_SIZE) { | ||
511 | adapter->netdev->features &= ~NETIF_F_TSO; | ||
512 | adapter->netdev->features &= ~NETIF_F_TSO6; | ||
513 | } else { | ||
514 | adapter->netdev->features |= NETIF_F_TSO; | ||
515 | adapter->netdev->features |= NETIF_F_TSO6; | ||
516 | } | ||
479 | atl1c_down(adapter); | 517 | atl1c_down(adapter); |
480 | atl1c_up(adapter); | 518 | atl1c_up(adapter); |
481 | clear_bit(__AT_RESETTING, &adapter->flags); | 519 | clear_bit(__AT_RESETTING, &adapter->flags); |
@@ -613,6 +651,9 @@ static void atl1c_set_mac_type(struct atl1c_hw *hw) | |||
613 | case PCI_DEVICE_ID_ATHEROS_L1D: | 651 | case PCI_DEVICE_ID_ATHEROS_L1D: |
614 | hw->nic_type = athr_l1d; | 652 | hw->nic_type = athr_l1d; |
615 | break; | 653 | break; |
654 | case PCI_DEVICE_ID_ATHEROS_L1D_2_0: | ||
655 | hw->nic_type = athr_l1d_2; | ||
656 | break; | ||
616 | default: | 657 | default: |
617 | break; | 658 | break; |
618 | } | 659 | } |
@@ -627,9 +668,7 @@ static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) | |||
627 | AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data); | 668 | AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data); |
628 | AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); | 669 | AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); |
629 | 670 | ||
630 | hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ | | 671 | hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | |
631 | ATL1C_INTR_MODRT_ENABLE | | ||
632 | ATL1C_RX_IPV6_CHKSUM | | ||
633 | ATL1C_TXQ_MODE_ENHANCE; | 672 | ATL1C_TXQ_MODE_ENHANCE; |
634 | if (link_ctrl_data & LINK_CTRL_L0S_EN) | 673 | if (link_ctrl_data & LINK_CTRL_L0S_EN) |
635 | hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT; | 674 | hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT; |
@@ -637,12 +676,12 @@ static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) | |||
637 | hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT; | 676 | hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT; |
638 | if (link_ctrl_data & LINK_CTRL_EXT_SYNC) | 677 | if (link_ctrl_data & LINK_CTRL_EXT_SYNC) |
639 | hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC; | 678 | hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC; |
679 | hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; | ||
640 | 680 | ||
641 | if (hw->nic_type == athr_l1c || | 681 | if (hw->nic_type == athr_l1c || |
642 | hw->nic_type == athr_l1d) { | 682 | hw->nic_type == athr_l1d || |
643 | hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; | 683 | hw->nic_type == athr_l1d_2) |
644 | hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; | 684 | hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; |
645 | } | ||
646 | return 0; | 685 | return 0; |
647 | } | 686 | } |
648 | /* | 687 | /* |
@@ -657,6 +696,8 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter) | |||
657 | { | 696 | { |
658 | struct atl1c_hw *hw = &adapter->hw; | 697 | struct atl1c_hw *hw = &adapter->hw; |
659 | struct pci_dev *pdev = adapter->pdev; | 698 | struct pci_dev *pdev = adapter->pdev; |
699 | u32 revision; | ||
700 | |||
660 | 701 | ||
661 | adapter->wol = 0; | 702 | adapter->wol = 0; |
662 | adapter->link_speed = SPEED_0; | 703 | adapter->link_speed = SPEED_0; |
@@ -669,7 +710,8 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter) | |||
669 | hw->device_id = pdev->device; | 710 | hw->device_id = pdev->device; |
670 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | 711 | hw->subsystem_vendor_id = pdev->subsystem_vendor; |
671 | hw->subsystem_id = pdev->subsystem_device; | 712 | hw->subsystem_id = pdev->subsystem_device; |
672 | 713 | AT_READ_REG(hw, PCI_CLASS_REVISION, &revision); | |
714 | hw->revision_id = revision & 0xFF; | ||
673 | /* before link up, we assume hibernate is true */ | 715 | /* before link up, we assume hibernate is true */ |
674 | hw->hibernate = true; | 716 | hw->hibernate = true; |
675 | hw->media_type = MEDIA_TYPE_AUTO_SENSOR; | 717 | hw->media_type = MEDIA_TYPE_AUTO_SENSOR; |
@@ -974,6 +1016,7 @@ static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) | |||
974 | struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb; | 1016 | struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb; |
975 | struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb; | 1017 | struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb; |
976 | int i; | 1018 | int i; |
1019 | u32 data; | ||
977 | 1020 | ||
978 | /* TPD */ | 1021 | /* TPD */ |
979 | AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, | 1022 | AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, |
@@ -1017,6 +1060,23 @@ static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) | |||
1017 | (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32)); | 1060 | (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32)); |
1018 | AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO, | 1061 | AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO, |
1019 | (u32)(smb->dma & AT_DMA_LO_ADDR_MASK)); | 1062 | (u32)(smb->dma & AT_DMA_LO_ADDR_MASK)); |
1063 | if (hw->nic_type == athr_l2c_b) { | ||
1064 | AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); | ||
1065 | AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); | ||
1066 | AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); | ||
1067 | AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); | ||
1068 | AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); | ||
1069 | AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); | ||
1070 | AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ | ||
1071 | AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ | ||
1072 | } | ||
1073 | if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) { | ||
1074 | /* Power Saving for L2c_B */ | ||
1075 | AT_READ_REG(hw, REG_SERDES_LOCK, &data); | ||
1076 | data |= SERDES_MAC_CLK_SLOWDOWN; | ||
1077 | data |= SERDES_PYH_CLK_SLOWDOWN; | ||
1078 | AT_WRITE_REG(hw, REG_SERDES_LOCK, data); | ||
1079 | } | ||
1020 | /* Load all of base address above */ | 1080 | /* Load all of base address above */ |
1021 | AT_WRITE_REG(hw, REG_LOAD_PTR, 1); | 1081 | AT_WRITE_REG(hw, REG_LOAD_PTR, 1); |
1022 | } | 1082 | } |
@@ -1029,6 +1089,7 @@ static void atl1c_configure_tx(struct atl1c_adapter *adapter) | |||
1029 | u16 tx_offload_thresh; | 1089 | u16 tx_offload_thresh; |
1030 | u32 txq_ctrl_data; | 1090 | u32 txq_ctrl_data; |
1031 | u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */ | 1091 | u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */ |
1092 | u32 max_pay_load_data; | ||
1032 | 1093 | ||
1033 | extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN; | 1094 | extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN; |
1034 | tx_offload_thresh = MAX_TX_OFFLOAD_THRESH; | 1095 | tx_offload_thresh = MAX_TX_OFFLOAD_THRESH; |
@@ -1046,8 +1107,11 @@ static void atl1c_configure_tx(struct atl1c_adapter *adapter) | |||
1046 | TXQ_NUM_TPD_BURST_SHIFT; | 1107 | TXQ_NUM_TPD_BURST_SHIFT; |
1047 | if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE) | 1108 | if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE) |
1048 | txq_ctrl_data |= TXQ_CTRL_ENH_MODE; | 1109 | txq_ctrl_data |= TXQ_CTRL_ENH_MODE; |
1049 | txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] & | 1110 | max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] & |
1050 | TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT; | 1111 | TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT; |
1112 | if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2) | ||
1113 | max_pay_load_data >>= 1; | ||
1114 | txq_ctrl_data |= max_pay_load_data; | ||
1051 | 1115 | ||
1052 | AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); | 1116 | AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); |
1053 | } | 1117 | } |
@@ -1078,7 +1142,7 @@ static void atl1c_configure_rx(struct atl1c_adapter *adapter) | |||
1078 | rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) << | 1142 | rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) << |
1079 | RSS_HASH_BITS_SHIFT; | 1143 | RSS_HASH_BITS_SHIFT; |
1080 | if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON) | 1144 | if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON) |
1081 | rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M & | 1145 | rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M & |
1082 | ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT; | 1146 | ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT; |
1083 | 1147 | ||
1084 | AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); | 1148 | AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); |
@@ -1198,21 +1262,23 @@ static int atl1c_reset_mac(struct atl1c_hw *hw) | |||
1198 | { | 1262 | { |
1199 | struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter; | 1263 | struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter; |
1200 | struct pci_dev *pdev = adapter->pdev; | 1264 | struct pci_dev *pdev = adapter->pdev; |
1201 | int ret; | 1265 | u32 master_ctrl_data = 0; |
1202 | 1266 | ||
1203 | AT_WRITE_REG(hw, REG_IMR, 0); | 1267 | AT_WRITE_REG(hw, REG_IMR, 0); |
1204 | AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT); | 1268 | AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT); |
1205 | 1269 | ||
1206 | ret = atl1c_stop_mac(hw); | 1270 | atl1c_stop_mac(hw); |
1207 | if (ret) | ||
1208 | return ret; | ||
1209 | /* | 1271 | /* |
1210 | * Issue Soft Reset to the MAC. This will reset the chip's | 1272 | * Issue Soft Reset to the MAC. This will reset the chip's |
1211 | * transmit, receive, DMA. It will not effect | 1273 | * transmit, receive, DMA. It will not effect |
1212 | * the current PCI configuration. The global reset bit is self- | 1274 | * the current PCI configuration. The global reset bit is self- |
1213 | * clearing, and should clear within a microsecond. | 1275 | * clearing, and should clear within a microsecond. |
1214 | */ | 1276 | */ |
1215 | AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST); | 1277 | AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); |
1278 | master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF; | ||
1279 | AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST) | ||
1280 | & 0xFFFF)); | ||
1281 | |||
1216 | AT_WRITE_FLUSH(hw); | 1282 | AT_WRITE_FLUSH(hw); |
1217 | msleep(10); | 1283 | msleep(10); |
1218 | /* Wait at least 10ms for All module to be Idle */ | 1284 | /* Wait at least 10ms for All module to be Idle */ |
@@ -1253,42 +1319,39 @@ static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup) | |||
1253 | { | 1319 | { |
1254 | u32 pm_ctrl_data; | 1320 | u32 pm_ctrl_data; |
1255 | u32 link_ctrl_data; | 1321 | u32 link_ctrl_data; |
1322 | u32 link_l1_timer = 0xF; | ||
1256 | 1323 | ||
1257 | AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); | 1324 | AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); |
1258 | AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); | 1325 | AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); |
1259 | pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1; | ||
1260 | 1326 | ||
1327 | pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1; | ||
1261 | pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << | 1328 | pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << |
1262 | PM_CTRL_L1_ENTRY_TIMER_SHIFT); | 1329 | PM_CTRL_L1_ENTRY_TIMER_SHIFT); |
1263 | pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK << | 1330 | pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK << |
1264 | PM_CTRL_LCKDET_TIMER_SHIFT); | 1331 | PM_CTRL_LCKDET_TIMER_SHIFT); |
1265 | 1332 | pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT; | |
1266 | pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK; | ||
1267 | pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; | ||
1268 | pm_ctrl_data |= PM_CTRL_RBER_EN; | ||
1269 | pm_ctrl_data |= PM_CTRL_SDES_EN; | ||
1270 | 1333 | ||
1271 | if (hw->nic_type == athr_l2c_b || | 1334 | if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || |
1272 | hw->nic_type == athr_l1d || | 1335 | hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { |
1273 | hw->nic_type == athr_l2c_b2) { | ||
1274 | link_ctrl_data &= ~LINK_CTRL_EXT_SYNC; | 1336 | link_ctrl_data &= ~LINK_CTRL_EXT_SYNC; |
1275 | if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) { | 1337 | if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) { |
1276 | if (hw->nic_type == athr_l2c_b && | 1338 | if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) |
1277 | hw->revision_id == L2CB_V10) | ||
1278 | link_ctrl_data |= LINK_CTRL_EXT_SYNC; | 1339 | link_ctrl_data |= LINK_CTRL_EXT_SYNC; |
1279 | } | 1340 | } |
1280 | 1341 | ||
1281 | AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data); | 1342 | AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data); |
1282 | 1343 | ||
1283 | pm_ctrl_data |= PM_CTRL_PCIE_RECV; | 1344 | pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER; |
1284 | pm_ctrl_data |= AT_ASPM_L1_TIMER << PM_CTRL_PM_REQ_TIMER_SHIFT; | 1345 | pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK << |
1285 | pm_ctrl_data &= ~PM_CTRL_EN_BUFS_RX_L0S; | 1346 | PM_CTRL_PM_REQ_TIMER_SHIFT); |
1347 | pm_ctrl_data |= AT_ASPM_L1_TIMER << | ||
1348 | PM_CTRL_PM_REQ_TIMER_SHIFT; | ||
1286 | pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN; | 1349 | pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN; |
1287 | pm_ctrl_data &= ~PM_CTRL_HOTRST; | 1350 | pm_ctrl_data &= ~PM_CTRL_HOTRST; |
1288 | pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT; | 1351 | pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT; |
1289 | pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1; | 1352 | pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1; |
1290 | } | 1353 | } |
1291 | 1354 | pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK; | |
1292 | if (linkup) { | 1355 | if (linkup) { |
1293 | pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; | 1356 | pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; |
1294 | pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; | 1357 | pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; |
@@ -1297,27 +1360,26 @@ static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup) | |||
1297 | if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) | 1360 | if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) |
1298 | pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN; | 1361 | pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN; |
1299 | 1362 | ||
1300 | if (hw->nic_type == athr_l2c_b || | 1363 | if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || |
1301 | hw->nic_type == athr_l1d || | 1364 | hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { |
1302 | hw->nic_type == athr_l2c_b2) { | ||
1303 | if (hw->nic_type == athr_l2c_b) | 1365 | if (hw->nic_type == athr_l2c_b) |
1304 | if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) | 1366 | if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) |
1305 | pm_ctrl_data &= PM_CTRL_ASPM_L0S_EN; | 1367 | pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; |
1306 | pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN; | 1368 | pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN; |
1307 | pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN; | 1369 | pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN; |
1308 | pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN; | 1370 | pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN; |
1309 | pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; | 1371 | pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; |
1310 | if (hw->adapter->link_speed == SPEED_100 || | 1372 | if (hw->adapter->link_speed == SPEED_100 || |
1311 | hw->adapter->link_speed == SPEED_1000) { | 1373 | hw->adapter->link_speed == SPEED_1000) { |
1312 | pm_ctrl_data &= | 1374 | pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << |
1313 | ~(PM_CTRL_L1_ENTRY_TIMER_MASK << | 1375 | PM_CTRL_L1_ENTRY_TIMER_SHIFT); |
1314 | PM_CTRL_L1_ENTRY_TIMER_SHIFT); | 1376 | if (hw->nic_type == athr_l2c_b) |
1315 | if (hw->nic_type == athr_l1d) | 1377 | link_l1_timer = 7; |
1316 | pm_ctrl_data |= 0xF << | 1378 | else if (hw->nic_type == athr_l2c_b2 || |
1317 | PM_CTRL_L1_ENTRY_TIMER_SHIFT; | 1379 | hw->nic_type == athr_l1d_2) |
1318 | else | 1380 | link_l1_timer = 4; |
1319 | pm_ctrl_data |= 7 << | 1381 | pm_ctrl_data |= link_l1_timer << |
1320 | PM_CTRL_L1_ENTRY_TIMER_SHIFT; | 1382 | PM_CTRL_L1_ENTRY_TIMER_SHIFT; |
1321 | } | 1383 | } |
1322 | } else { | 1384 | } else { |
1323 | pm_ctrl_data |= PM_CTRL_SERDES_L1_EN; | 1385 | pm_ctrl_data |= PM_CTRL_SERDES_L1_EN; |
@@ -1326,24 +1388,12 @@ static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup) | |||
1326 | pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1; | 1388 | pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1; |
1327 | pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; | 1389 | pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; |
1328 | pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; | 1390 | pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; |
1329 | } | ||
1330 | atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x29); | ||
1331 | if (hw->adapter->link_speed == SPEED_10) | ||
1332 | if (hw->nic_type == athr_l1d) | ||
1333 | atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0xB69D); | ||
1334 | else | ||
1335 | atl1c_write_phy_reg(hw, MII_DBG_DATA, 0xB6DD); | ||
1336 | else if (hw->adapter->link_speed == SPEED_100) | ||
1337 | atl1c_write_phy_reg(hw, MII_DBG_DATA, 0xB2DD); | ||
1338 | else | ||
1339 | atl1c_write_phy_reg(hw, MII_DBG_DATA, 0x96DD); | ||
1340 | 1391 | ||
1392 | } | ||
1341 | } else { | 1393 | } else { |
1342 | pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN; | ||
1343 | pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN; | 1394 | pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN; |
1344 | pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; | 1395 | pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; |
1345 | pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN; | 1396 | pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN; |
1346 | |||
1347 | pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; | 1397 | pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; |
1348 | 1398 | ||
1349 | if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) | 1399 | if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) |
@@ -1351,8 +1401,9 @@ static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup) | |||
1351 | else | 1401 | else |
1352 | pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; | 1402 | pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; |
1353 | } | 1403 | } |
1354 | |||
1355 | AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); | 1404 | AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); |
1405 | |||
1406 | return; | ||
1356 | } | 1407 | } |
1357 | 1408 | ||
1358 | static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter) | 1409 | static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter) |
@@ -1391,7 +1442,8 @@ static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter) | |||
1391 | mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; | 1442 | mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; |
1392 | 1443 | ||
1393 | mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN; | 1444 | mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN; |
1394 | if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2) { | 1445 | if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 || |
1446 | hw->nic_type == athr_l1d_2) { | ||
1395 | mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW; | 1447 | mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW; |
1396 | mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32; | 1448 | mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32; |
1397 | } | 1449 | } |
@@ -1409,6 +1461,7 @@ static int atl1c_configure(struct atl1c_adapter *adapter) | |||
1409 | struct atl1c_hw *hw = &adapter->hw; | 1461 | struct atl1c_hw *hw = &adapter->hw; |
1410 | u32 master_ctrl_data = 0; | 1462 | u32 master_ctrl_data = 0; |
1411 | u32 intr_modrt_data; | 1463 | u32 intr_modrt_data; |
1464 | u32 data; | ||
1412 | 1465 | ||
1413 | /* clear interrupt status */ | 1466 | /* clear interrupt status */ |
1414 | AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); | 1467 | AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); |
@@ -1418,6 +1471,15 @@ static int atl1c_configure(struct atl1c_adapter *adapter) | |||
1418 | * HW will enable self to assert interrupt event to system after | 1471 | * HW will enable self to assert interrupt event to system after |
1419 | * waiting x-time for software to notify it accept interrupt. | 1472 | * waiting x-time for software to notify it accept interrupt. |
1420 | */ | 1473 | */ |
1474 | |||
1475 | data = CLK_GATING_EN_ALL; | ||
1476 | if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { | ||
1477 | if (hw->nic_type == athr_l2c_b) | ||
1478 | data &= ~CLK_GATING_RXMAC_EN; | ||
1479 | } else | ||
1480 | data = 0; | ||
1481 | AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); | ||
1482 | |||
1421 | AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, | 1483 | AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, |
1422 | hw->ict & INT_RETRIG_TIMER_MASK); | 1484 | hw->ict & INT_RETRIG_TIMER_MASK); |
1423 | 1485 | ||
@@ -1436,6 +1498,7 @@ static int atl1c_configure(struct atl1c_adapter *adapter) | |||
1436 | if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) | 1498 | if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) |
1437 | master_ctrl_data |= MASTER_CTRL_INT_RDCLR; | 1499 | master_ctrl_data |= MASTER_CTRL_INT_RDCLR; |
1438 | 1500 | ||
1501 | master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; | ||
1439 | AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); | 1502 | AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); |
1440 | 1503 | ||
1441 | if (hw->ctrl_flags & ATL1C_CMB_ENABLE) { | 1504 | if (hw->ctrl_flags & ATL1C_CMB_ENABLE) { |
@@ -1624,11 +1687,9 @@ static irqreturn_t atl1c_intr(int irq, void *data) | |||
1624 | "atl1c hardware error (status = 0x%x)\n", | 1687 | "atl1c hardware error (status = 0x%x)\n", |
1625 | status & ISR_ERROR); | 1688 | status & ISR_ERROR); |
1626 | /* reset MAC */ | 1689 | /* reset MAC */ |
1627 | hw->intr_mask &= ~ISR_ERROR; | ||
1628 | AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); | ||
1629 | adapter->work_event |= ATL1C_WORK_EVENT_RESET; | 1690 | adapter->work_event |= ATL1C_WORK_EVENT_RESET; |
1630 | schedule_work(&adapter->common_task); | 1691 | schedule_work(&adapter->common_task); |
1631 | break; | 1692 | return IRQ_HANDLED; |
1632 | } | 1693 | } |
1633 | 1694 | ||
1634 | if (status & ISR_OVER) | 1695 | if (status & ISR_OVER) |
@@ -2303,7 +2364,6 @@ void atl1c_down(struct atl1c_adapter *adapter) | |||
2303 | napi_disable(&adapter->napi); | 2364 | napi_disable(&adapter->napi); |
2304 | atl1c_irq_disable(adapter); | 2365 | atl1c_irq_disable(adapter); |
2305 | atl1c_free_irq(adapter); | 2366 | atl1c_free_irq(adapter); |
2306 | AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); | ||
2307 | /* reset MAC to disable all RX/TX */ | 2367 | /* reset MAC to disable all RX/TX */ |
2308 | atl1c_reset_mac(&adapter->hw); | 2368 | atl1c_reset_mac(&adapter->hw); |
2309 | msleep(1); | 2369 | msleep(1); |
@@ -2387,79 +2447,68 @@ static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state) | |||
2387 | struct net_device *netdev = pci_get_drvdata(pdev); | 2447 | struct net_device *netdev = pci_get_drvdata(pdev); |
2388 | struct atl1c_adapter *adapter = netdev_priv(netdev); | 2448 | struct atl1c_adapter *adapter = netdev_priv(netdev); |
2389 | struct atl1c_hw *hw = &adapter->hw; | 2449 | struct atl1c_hw *hw = &adapter->hw; |
2390 | u32 ctrl; | 2450 | u32 mac_ctrl_data = 0; |
2391 | u32 mac_ctrl_data; | 2451 | u32 master_ctrl_data = 0; |
2392 | u32 master_ctrl_data; | ||
2393 | u32 wol_ctrl_data = 0; | 2452 | u32 wol_ctrl_data = 0; |
2394 | u16 mii_bmsr_data; | 2453 | u16 mii_intr_status_data = 0; |
2395 | u16 save_autoneg_advertised; | ||
2396 | u16 mii_intr_status_data; | ||
2397 | u32 wufc = adapter->wol; | 2454 | u32 wufc = adapter->wol; |
2398 | u32 i; | ||
2399 | int retval = 0; | 2455 | int retval = 0; |
2400 | 2456 | ||
2457 | atl1c_disable_l0s_l1(hw); | ||
2401 | if (netif_running(netdev)) { | 2458 | if (netif_running(netdev)) { |
2402 | WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); | 2459 | WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); |
2403 | atl1c_down(adapter); | 2460 | atl1c_down(adapter); |
2404 | } | 2461 | } |
2405 | netif_device_detach(netdev); | 2462 | netif_device_detach(netdev); |
2406 | atl1c_disable_l0s_l1(hw); | ||
2407 | retval = pci_save_state(pdev); | 2463 | retval = pci_save_state(pdev); |
2408 | if (retval) | 2464 | if (retval) |
2409 | return retval; | 2465 | return retval; |
2466 | |||
2467 | if (wufc) | ||
2468 | if (atl1c_phy_power_saving(hw) != 0) | ||
2469 | dev_dbg(&pdev->dev, "phy power saving failed"); | ||
2470 | |||
2471 | AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); | ||
2472 | AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); | ||
2473 | |||
2474 | master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS; | ||
2475 | mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT); | ||
2476 | mac_ctrl_data |= (((u32)adapter->hw.preamble_len & | ||
2477 | MAC_CTRL_PRMLEN_MASK) << | ||
2478 | MAC_CTRL_PRMLEN_SHIFT); | ||
2479 | mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT); | ||
2480 | mac_ctrl_data &= ~MAC_CTRL_DUPLX; | ||
2481 | |||
2410 | if (wufc) { | 2482 | if (wufc) { |
2411 | AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); | 2483 | mac_ctrl_data |= MAC_CTRL_RX_EN; |
2412 | master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS; | 2484 | if (adapter->link_speed == SPEED_1000 || |
2413 | 2485 | adapter->link_speed == SPEED_0) { | |
2414 | /* get link status */ | 2486 | mac_ctrl_data |= atl1c_mac_speed_1000 << |
2415 | atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data); | 2487 | MAC_CTRL_SPEED_SHIFT; |
2416 | atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data); | 2488 | mac_ctrl_data |= MAC_CTRL_DUPLX; |
2417 | save_autoneg_advertised = hw->autoneg_advertised; | 2489 | } else |
2418 | hw->autoneg_advertised = ADVERTISED_10baseT_Half; | 2490 | mac_ctrl_data |= atl1c_mac_speed_10_100 << |
2419 | if (atl1c_restart_autoneg(hw) != 0) | 2491 | MAC_CTRL_SPEED_SHIFT; |
2420 | if (netif_msg_link(adapter)) | 2492 | |
2421 | dev_warn(&pdev->dev, "phy autoneg failed\n"); | 2493 | if (adapter->link_duplex == DUPLEX_FULL) |
2422 | hw->phy_configured = false; /* re-init PHY when resume */ | 2494 | mac_ctrl_data |= MAC_CTRL_DUPLX; |
2423 | hw->autoneg_advertised = save_autoneg_advertised; | 2495 | |
2424 | /* turn on magic packet wol */ | 2496 | /* turn on magic packet wol */ |
2425 | if (wufc & AT_WUFC_MAG) | 2497 | if (wufc & AT_WUFC_MAG) |
2426 | wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN; | 2498 | wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN; |
2427 | 2499 | ||
2428 | if (wufc & AT_WUFC_LNKC) { | 2500 | if (wufc & AT_WUFC_LNKC) { |
2429 | for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) { | ||
2430 | msleep(100); | ||
2431 | atl1c_read_phy_reg(hw, MII_BMSR, | ||
2432 | (u16 *)&mii_bmsr_data); | ||
2433 | if (mii_bmsr_data & BMSR_LSTATUS) | ||
2434 | break; | ||
2435 | } | ||
2436 | if ((mii_bmsr_data & BMSR_LSTATUS) == 0) | ||
2437 | if (netif_msg_link(adapter)) | ||
2438 | dev_warn(&pdev->dev, | ||
2439 | "%s: Link may change" | ||
2440 | "when suspend\n", | ||
2441 | atl1c_driver_name); | ||
2442 | wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; | 2501 | wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; |
2443 | /* only link up can wake up */ | 2502 | /* only link up can wake up */ |
2444 | if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) { | 2503 | if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) { |
2445 | if (netif_msg_link(adapter)) | 2504 | dev_dbg(&pdev->dev, "%s: read write phy " |
2446 | dev_err(&pdev->dev, | 2505 | "register failed.\n", |
2447 | "%s: read write phy " | 2506 | atl1c_driver_name); |
2448 | "register failed.\n", | ||
2449 | atl1c_driver_name); | ||
2450 | goto wol_dis; | ||
2451 | } | 2507 | } |
2452 | } | 2508 | } |
2453 | /* clear phy interrupt */ | 2509 | /* clear phy interrupt */ |
2454 | atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data); | 2510 | atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data); |
2455 | /* Config MAC Ctrl register */ | 2511 | /* Config MAC Ctrl register */ |
2456 | mac_ctrl_data = MAC_CTRL_RX_EN; | ||
2457 | /* set to 10/100M halt duplex */ | ||
2458 | mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT; | ||
2459 | mac_ctrl_data |= (((u32)adapter->hw.preamble_len & | ||
2460 | MAC_CTRL_PRMLEN_MASK) << | ||
2461 | MAC_CTRL_PRMLEN_SHIFT); | ||
2462 | |||
2463 | if (adapter->vlgrp) | 2512 | if (adapter->vlgrp) |
2464 | mac_ctrl_data |= MAC_CTRL_RMV_VLAN; | 2513 | mac_ctrl_data |= MAC_CTRL_RMV_VLAN; |
2465 | 2514 | ||
@@ -2467,37 +2516,30 @@ static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state) | |||
2467 | if (wufc & AT_WUFC_MAG) | 2516 | if (wufc & AT_WUFC_MAG) |
2468 | mac_ctrl_data |= MAC_CTRL_BC_EN; | 2517 | mac_ctrl_data |= MAC_CTRL_BC_EN; |
2469 | 2518 | ||
2470 | if (netif_msg_hw(adapter)) | 2519 | dev_dbg(&pdev->dev, |
2471 | dev_dbg(&pdev->dev, | 2520 | "%s: suspend MAC=0x%x\n", |
2472 | "%s: suspend MAC=0x%x\n", | 2521 | atl1c_driver_name, mac_ctrl_data); |
2473 | atl1c_driver_name, mac_ctrl_data); | ||
2474 | AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); | 2522 | AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); |
2475 | AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); | 2523 | AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); |
2476 | AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); | 2524 | AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); |
2477 | 2525 | ||
2478 | /* pcie patch */ | 2526 | /* pcie patch */ |
2479 | AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl); | 2527 | device_set_wakeup_enable(&pdev->dev, 1); |
2480 | ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; | ||
2481 | AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); | ||
2482 | 2528 | ||
2483 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); | 2529 | AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT | |
2484 | goto suspend_exit; | 2530 | GPHY_CTRL_EXT_RESET); |
2531 | pci_prepare_to_sleep(pdev); | ||
2532 | } else { | ||
2533 | AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING); | ||
2534 | master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS; | ||
2535 | mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT; | ||
2536 | mac_ctrl_data |= MAC_CTRL_DUPLX; | ||
2537 | AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); | ||
2538 | AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); | ||
2539 | AT_WRITE_REG(hw, REG_WOL_CTRL, 0); | ||
2540 | hw->phy_configured = false; /* re-init PHY when resume */ | ||
2541 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); | ||
2485 | } | 2542 | } |
2486 | wol_dis: | ||
2487 | |||
2488 | /* WOL disabled */ | ||
2489 | AT_WRITE_REG(hw, REG_WOL_CTRL, 0); | ||
2490 | |||
2491 | /* pcie patch */ | ||
2492 | AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl); | ||
2493 | ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; | ||
2494 | AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); | ||
2495 | |||
2496 | atl1c_phy_disable(hw); | ||
2497 | hw->phy_configured = false; /* re-init PHY when resume */ | ||
2498 | |||
2499 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); | ||
2500 | suspend_exit: | ||
2501 | 2543 | ||
2502 | pci_disable_device(pdev); | 2544 | pci_disable_device(pdev); |
2503 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 2545 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
@@ -2516,9 +2558,19 @@ static int atl1c_resume(struct pci_dev *pdev) | |||
2516 | pci_enable_wake(pdev, PCI_D3cold, 0); | 2558 | pci_enable_wake(pdev, PCI_D3cold, 0); |
2517 | 2559 | ||
2518 | AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); | 2560 | AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); |
2561 | atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE | | ||
2562 | ATL1C_PCIE_PHY_RESET); | ||
2519 | 2563 | ||
2520 | atl1c_phy_reset(&adapter->hw); | 2564 | atl1c_phy_reset(&adapter->hw); |
2521 | atl1c_reset_mac(&adapter->hw); | 2565 | atl1c_reset_mac(&adapter->hw); |
2566 | atl1c_phy_init(&adapter->hw); | ||
2567 | |||
2568 | #if 0 | ||
2569 | AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); | ||
2570 | pm_data &= ~PM_CTRLSTAT_PME_EN; | ||
2571 | AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); | ||
2572 | #endif | ||
2573 | |||
2522 | netif_device_attach(netdev); | 2574 | netif_device_attach(netdev); |
2523 | if (netif_running(netdev)) | 2575 | if (netif_running(netdev)) |
2524 | atl1c_up(adapter); | 2576 | atl1c_up(adapter); |
diff --git a/drivers/net/atlx/atl1.h b/drivers/net/atlx/atl1.h index 146372fd6683..9c0ddb273ac8 100644 --- a/drivers/net/atlx/atl1.h +++ b/drivers/net/atlx/atl1.h | |||
@@ -436,8 +436,8 @@ struct rx_free_desc { | |||
436 | __le16 buf_len; /* Size of the receive buffer in host memory */ | 436 | __le16 buf_len; /* Size of the receive buffer in host memory */ |
437 | u16 coalese; /* Update consumer index to host after the | 437 | u16 coalese; /* Update consumer index to host after the |
438 | * reception of this frame */ | 438 | * reception of this frame */ |
439 | /* __attribute__ ((packed)) is required */ | 439 | /* __packed is required */ |
440 | } __attribute__ ((packed)); | 440 | } __packed; |
441 | 441 | ||
442 | /* | 442 | /* |
443 | * The L1 transmit packet descriptor is comprised of four 32-bit words. | 443 | * The L1 transmit packet descriptor is comprised of four 32-bit words. |
diff --git a/drivers/net/b44.c b/drivers/net/b44.c index 293f9c16e786..3d52538df6c4 100644 --- a/drivers/net/b44.c +++ b/drivers/net/b44.c | |||
@@ -150,9 +150,8 @@ static inline void b44_sync_dma_desc_for_device(struct ssb_device *sdev, | |||
150 | unsigned long offset, | 150 | unsigned long offset, |
151 | enum dma_data_direction dir) | 151 | enum dma_data_direction dir) |
152 | { | 152 | { |
153 | ssb_dma_sync_single_range_for_device(sdev, dma_base, | 153 | dma_sync_single_for_device(sdev->dma_dev, dma_base + offset, |
154 | offset & dma_desc_align_mask, | 154 | dma_desc_sync_size, dir); |
155 | dma_desc_sync_size, dir); | ||
156 | } | 155 | } |
157 | 156 | ||
158 | static inline void b44_sync_dma_desc_for_cpu(struct ssb_device *sdev, | 157 | static inline void b44_sync_dma_desc_for_cpu(struct ssb_device *sdev, |
@@ -160,9 +159,8 @@ static inline void b44_sync_dma_desc_for_cpu(struct ssb_device *sdev, | |||
160 | unsigned long offset, | 159 | unsigned long offset, |
161 | enum dma_data_direction dir) | 160 | enum dma_data_direction dir) |
162 | { | 161 | { |
163 | ssb_dma_sync_single_range_for_cpu(sdev, dma_base, | 162 | dma_sync_single_for_cpu(sdev->dma_dev, dma_base + offset, |
164 | offset & dma_desc_align_mask, | 163 | dma_desc_sync_size, dir); |
165 | dma_desc_sync_size, dir); | ||
166 | } | 164 | } |
167 | 165 | ||
168 | static inline unsigned long br32(const struct b44 *bp, unsigned long reg) | 166 | static inline unsigned long br32(const struct b44 *bp, unsigned long reg) |
@@ -608,10 +606,10 @@ static void b44_tx(struct b44 *bp) | |||
608 | 606 | ||
609 | BUG_ON(skb == NULL); | 607 | BUG_ON(skb == NULL); |
610 | 608 | ||
611 | ssb_dma_unmap_single(bp->sdev, | 609 | dma_unmap_single(bp->sdev->dma_dev, |
612 | rp->mapping, | 610 | rp->mapping, |
613 | skb->len, | 611 | skb->len, |
614 | DMA_TO_DEVICE); | 612 | DMA_TO_DEVICE); |
615 | rp->skb = NULL; | 613 | rp->skb = NULL; |
616 | dev_kfree_skb_irq(skb); | 614 | dev_kfree_skb_irq(skb); |
617 | } | 615 | } |
@@ -648,29 +646,29 @@ static int b44_alloc_rx_skb(struct b44 *bp, int src_idx, u32 dest_idx_unmasked) | |||
648 | if (skb == NULL) | 646 | if (skb == NULL) |
649 | return -ENOMEM; | 647 | return -ENOMEM; |
650 | 648 | ||
651 | mapping = ssb_dma_map_single(bp->sdev, skb->data, | 649 | mapping = dma_map_single(bp->sdev->dma_dev, skb->data, |
652 | RX_PKT_BUF_SZ, | 650 | RX_PKT_BUF_SZ, |
653 | DMA_FROM_DEVICE); | 651 | DMA_FROM_DEVICE); |
654 | 652 | ||
655 | /* Hardware bug work-around, the chip is unable to do PCI DMA | 653 | /* Hardware bug work-around, the chip is unable to do PCI DMA |
656 | to/from anything above 1GB :-( */ | 654 | to/from anything above 1GB :-( */ |
657 | if (ssb_dma_mapping_error(bp->sdev, mapping) || | 655 | if (dma_mapping_error(bp->sdev->dma_dev, mapping) || |
658 | mapping + RX_PKT_BUF_SZ > DMA_BIT_MASK(30)) { | 656 | mapping + RX_PKT_BUF_SZ > DMA_BIT_MASK(30)) { |
659 | /* Sigh... */ | 657 | /* Sigh... */ |
660 | if (!ssb_dma_mapping_error(bp->sdev, mapping)) | 658 | if (!dma_mapping_error(bp->sdev->dma_dev, mapping)) |
661 | ssb_dma_unmap_single(bp->sdev, mapping, | 659 | dma_unmap_single(bp->sdev->dma_dev, mapping, |
662 | RX_PKT_BUF_SZ, DMA_FROM_DEVICE); | 660 | RX_PKT_BUF_SZ, DMA_FROM_DEVICE); |
663 | dev_kfree_skb_any(skb); | 661 | dev_kfree_skb_any(skb); |
664 | skb = __netdev_alloc_skb(bp->dev, RX_PKT_BUF_SZ, GFP_ATOMIC|GFP_DMA); | 662 | skb = __netdev_alloc_skb(bp->dev, RX_PKT_BUF_SZ, GFP_ATOMIC|GFP_DMA); |
665 | if (skb == NULL) | 663 | if (skb == NULL) |
666 | return -ENOMEM; | 664 | return -ENOMEM; |
667 | mapping = ssb_dma_map_single(bp->sdev, skb->data, | 665 | mapping = dma_map_single(bp->sdev->dma_dev, skb->data, |
668 | RX_PKT_BUF_SZ, | 666 | RX_PKT_BUF_SZ, |
669 | DMA_FROM_DEVICE); | 667 | DMA_FROM_DEVICE); |
670 | if (ssb_dma_mapping_error(bp->sdev, mapping) || | 668 | if (dma_mapping_error(bp->sdev->dma_dev, mapping) || |
671 | mapping + RX_PKT_BUF_SZ > DMA_BIT_MASK(30)) { | 669 | mapping + RX_PKT_BUF_SZ > DMA_BIT_MASK(30)) { |
672 | if (!ssb_dma_mapping_error(bp->sdev, mapping)) | 670 | if (!dma_mapping_error(bp->sdev->dma_dev, mapping)) |
673 | ssb_dma_unmap_single(bp->sdev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE); | 671 | dma_unmap_single(bp->sdev->dma_dev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE); |
674 | dev_kfree_skb_any(skb); | 672 | dev_kfree_skb_any(skb); |
675 | return -ENOMEM; | 673 | return -ENOMEM; |
676 | } | 674 | } |
@@ -745,9 +743,9 @@ static void b44_recycle_rx(struct b44 *bp, int src_idx, u32 dest_idx_unmasked) | |||
745 | dest_idx * sizeof(*dest_desc), | 743 | dest_idx * sizeof(*dest_desc), |
746 | DMA_BIDIRECTIONAL); | 744 | DMA_BIDIRECTIONAL); |
747 | 745 | ||
748 | ssb_dma_sync_single_for_device(bp->sdev, dest_map->mapping, | 746 | dma_sync_single_for_device(bp->sdev->dma_dev, dest_map->mapping, |
749 | RX_PKT_BUF_SZ, | 747 | RX_PKT_BUF_SZ, |
750 | DMA_FROM_DEVICE); | 748 | DMA_FROM_DEVICE); |
751 | } | 749 | } |
752 | 750 | ||
753 | static int b44_rx(struct b44 *bp, int budget) | 751 | static int b44_rx(struct b44 *bp, int budget) |
@@ -767,9 +765,9 @@ static int b44_rx(struct b44 *bp, int budget) | |||
767 | struct rx_header *rh; | 765 | struct rx_header *rh; |
768 | u16 len; | 766 | u16 len; |
769 | 767 | ||
770 | ssb_dma_sync_single_for_cpu(bp->sdev, map, | 768 | dma_sync_single_for_cpu(bp->sdev->dma_dev, map, |
771 | RX_PKT_BUF_SZ, | 769 | RX_PKT_BUF_SZ, |
772 | DMA_FROM_DEVICE); | 770 | DMA_FROM_DEVICE); |
773 | rh = (struct rx_header *) skb->data; | 771 | rh = (struct rx_header *) skb->data; |
774 | len = le16_to_cpu(rh->len); | 772 | len = le16_to_cpu(rh->len); |
775 | if ((len > (RX_PKT_BUF_SZ - RX_PKT_OFFSET)) || | 773 | if ((len > (RX_PKT_BUF_SZ - RX_PKT_OFFSET)) || |
@@ -801,8 +799,8 @@ static int b44_rx(struct b44 *bp, int budget) | |||
801 | skb_size = b44_alloc_rx_skb(bp, cons, bp->rx_prod); | 799 | skb_size = b44_alloc_rx_skb(bp, cons, bp->rx_prod); |
802 | if (skb_size < 0) | 800 | if (skb_size < 0) |
803 | goto drop_it; | 801 | goto drop_it; |
804 | ssb_dma_unmap_single(bp->sdev, map, | 802 | dma_unmap_single(bp->sdev->dma_dev, map, |
805 | skb_size, DMA_FROM_DEVICE); | 803 | skb_size, DMA_FROM_DEVICE); |
806 | /* Leave out rx_header */ | 804 | /* Leave out rx_header */ |
807 | skb_put(skb, len + RX_PKT_OFFSET); | 805 | skb_put(skb, len + RX_PKT_OFFSET); |
808 | skb_pull(skb, RX_PKT_OFFSET); | 806 | skb_pull(skb, RX_PKT_OFFSET); |
@@ -954,24 +952,24 @@ static netdev_tx_t b44_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
954 | goto err_out; | 952 | goto err_out; |
955 | } | 953 | } |
956 | 954 | ||
957 | mapping = ssb_dma_map_single(bp->sdev, skb->data, len, DMA_TO_DEVICE); | 955 | mapping = dma_map_single(bp->sdev->dma_dev, skb->data, len, DMA_TO_DEVICE); |
958 | if (ssb_dma_mapping_error(bp->sdev, mapping) || mapping + len > DMA_BIT_MASK(30)) { | 956 | if (dma_mapping_error(bp->sdev->dma_dev, mapping) || mapping + len > DMA_BIT_MASK(30)) { |
959 | struct sk_buff *bounce_skb; | 957 | struct sk_buff *bounce_skb; |
960 | 958 | ||
961 | /* Chip can't handle DMA to/from >1GB, use bounce buffer */ | 959 | /* Chip can't handle DMA to/from >1GB, use bounce buffer */ |
962 | if (!ssb_dma_mapping_error(bp->sdev, mapping)) | 960 | if (!dma_mapping_error(bp->sdev->dma_dev, mapping)) |
963 | ssb_dma_unmap_single(bp->sdev, mapping, len, | 961 | dma_unmap_single(bp->sdev->dma_dev, mapping, len, |
964 | DMA_TO_DEVICE); | 962 | DMA_TO_DEVICE); |
965 | 963 | ||
966 | bounce_skb = __netdev_alloc_skb(dev, len, GFP_ATOMIC | GFP_DMA); | 964 | bounce_skb = __netdev_alloc_skb(dev, len, GFP_ATOMIC | GFP_DMA); |
967 | if (!bounce_skb) | 965 | if (!bounce_skb) |
968 | goto err_out; | 966 | goto err_out; |
969 | 967 | ||
970 | mapping = ssb_dma_map_single(bp->sdev, bounce_skb->data, | 968 | mapping = dma_map_single(bp->sdev->dma_dev, bounce_skb->data, |
971 | len, DMA_TO_DEVICE); | 969 | len, DMA_TO_DEVICE); |
972 | if (ssb_dma_mapping_error(bp->sdev, mapping) || mapping + len > DMA_BIT_MASK(30)) { | 970 | if (dma_mapping_error(bp->sdev->dma_dev, mapping) || mapping + len > DMA_BIT_MASK(30)) { |
973 | if (!ssb_dma_mapping_error(bp->sdev, mapping)) | 971 | if (!dma_mapping_error(bp->sdev->dma_dev, mapping)) |
974 | ssb_dma_unmap_single(bp->sdev, mapping, | 972 | dma_unmap_single(bp->sdev->dma_dev, mapping, |
975 | len, DMA_TO_DEVICE); | 973 | len, DMA_TO_DEVICE); |
976 | dev_kfree_skb_any(bounce_skb); | 974 | dev_kfree_skb_any(bounce_skb); |
977 | goto err_out; | 975 | goto err_out; |
@@ -1068,8 +1066,8 @@ static void b44_free_rings(struct b44 *bp) | |||
1068 | 1066 | ||
1069 | if (rp->skb == NULL) | 1067 | if (rp->skb == NULL) |
1070 | continue; | 1068 | continue; |
1071 | ssb_dma_unmap_single(bp->sdev, rp->mapping, RX_PKT_BUF_SZ, | 1069 | dma_unmap_single(bp->sdev->dma_dev, rp->mapping, RX_PKT_BUF_SZ, |
1072 | DMA_FROM_DEVICE); | 1070 | DMA_FROM_DEVICE); |
1073 | dev_kfree_skb_any(rp->skb); | 1071 | dev_kfree_skb_any(rp->skb); |
1074 | rp->skb = NULL; | 1072 | rp->skb = NULL; |
1075 | } | 1073 | } |
@@ -1080,8 +1078,8 @@ static void b44_free_rings(struct b44 *bp) | |||
1080 | 1078 | ||
1081 | if (rp->skb == NULL) | 1079 | if (rp->skb == NULL) |
1082 | continue; | 1080 | continue; |
1083 | ssb_dma_unmap_single(bp->sdev, rp->mapping, rp->skb->len, | 1081 | dma_unmap_single(bp->sdev->dma_dev, rp->mapping, rp->skb->len, |
1084 | DMA_TO_DEVICE); | 1082 | DMA_TO_DEVICE); |
1085 | dev_kfree_skb_any(rp->skb); | 1083 | dev_kfree_skb_any(rp->skb); |
1086 | rp->skb = NULL; | 1084 | rp->skb = NULL; |
1087 | } | 1085 | } |
@@ -1103,14 +1101,12 @@ static void b44_init_rings(struct b44 *bp) | |||
1103 | memset(bp->tx_ring, 0, B44_TX_RING_BYTES); | 1101 | memset(bp->tx_ring, 0, B44_TX_RING_BYTES); |
1104 | 1102 | ||
1105 | if (bp->flags & B44_FLAG_RX_RING_HACK) | 1103 | if (bp->flags & B44_FLAG_RX_RING_HACK) |
1106 | ssb_dma_sync_single_for_device(bp->sdev, bp->rx_ring_dma, | 1104 | dma_sync_single_for_device(bp->sdev->dma_dev, bp->rx_ring_dma, |
1107 | DMA_TABLE_BYTES, | 1105 | DMA_TABLE_BYTES, DMA_BIDIRECTIONAL); |
1108 | DMA_BIDIRECTIONAL); | ||
1109 | 1106 | ||
1110 | if (bp->flags & B44_FLAG_TX_RING_HACK) | 1107 | if (bp->flags & B44_FLAG_TX_RING_HACK) |
1111 | ssb_dma_sync_single_for_device(bp->sdev, bp->tx_ring_dma, | 1108 | dma_sync_single_for_device(bp->sdev->dma_dev, bp->tx_ring_dma, |
1112 | DMA_TABLE_BYTES, | 1109 | DMA_TABLE_BYTES, DMA_TO_DEVICE); |
1113 | DMA_TO_DEVICE); | ||
1114 | 1110 | ||
1115 | for (i = 0; i < bp->rx_pending; i++) { | 1111 | for (i = 0; i < bp->rx_pending; i++) { |
1116 | if (b44_alloc_rx_skb(bp, -1, i) < 0) | 1112 | if (b44_alloc_rx_skb(bp, -1, i) < 0) |
@@ -1130,27 +1126,23 @@ static void b44_free_consistent(struct b44 *bp) | |||
1130 | bp->tx_buffers = NULL; | 1126 | bp->tx_buffers = NULL; |
1131 | if (bp->rx_ring) { | 1127 | if (bp->rx_ring) { |
1132 | if (bp->flags & B44_FLAG_RX_RING_HACK) { | 1128 | if (bp->flags & B44_FLAG_RX_RING_HACK) { |
1133 | ssb_dma_unmap_single(bp->sdev, bp->rx_ring_dma, | 1129 | dma_unmap_single(bp->sdev->dma_dev, bp->rx_ring_dma, |
1134 | DMA_TABLE_BYTES, | 1130 | DMA_TABLE_BYTES, DMA_BIDIRECTIONAL); |
1135 | DMA_BIDIRECTIONAL); | ||
1136 | kfree(bp->rx_ring); | 1131 | kfree(bp->rx_ring); |
1137 | } else | 1132 | } else |
1138 | ssb_dma_free_consistent(bp->sdev, DMA_TABLE_BYTES, | 1133 | dma_free_coherent(bp->sdev->dma_dev, DMA_TABLE_BYTES, |
1139 | bp->rx_ring, bp->rx_ring_dma, | 1134 | bp->rx_ring, bp->rx_ring_dma); |
1140 | GFP_KERNEL); | ||
1141 | bp->rx_ring = NULL; | 1135 | bp->rx_ring = NULL; |
1142 | bp->flags &= ~B44_FLAG_RX_RING_HACK; | 1136 | bp->flags &= ~B44_FLAG_RX_RING_HACK; |
1143 | } | 1137 | } |
1144 | if (bp->tx_ring) { | 1138 | if (bp->tx_ring) { |
1145 | if (bp->flags & B44_FLAG_TX_RING_HACK) { | 1139 | if (bp->flags & B44_FLAG_TX_RING_HACK) { |
1146 | ssb_dma_unmap_single(bp->sdev, bp->tx_ring_dma, | 1140 | dma_unmap_single(bp->sdev->dma_dev, bp->tx_ring_dma, |
1147 | DMA_TABLE_BYTES, | 1141 | DMA_TABLE_BYTES, DMA_TO_DEVICE); |
1148 | DMA_TO_DEVICE); | ||
1149 | kfree(bp->tx_ring); | 1142 | kfree(bp->tx_ring); |
1150 | } else | 1143 | } else |
1151 | ssb_dma_free_consistent(bp->sdev, DMA_TABLE_BYTES, | 1144 | dma_free_coherent(bp->sdev->dma_dev, DMA_TABLE_BYTES, |
1152 | bp->tx_ring, bp->tx_ring_dma, | 1145 | bp->tx_ring, bp->tx_ring_dma); |
1153 | GFP_KERNEL); | ||
1154 | bp->tx_ring = NULL; | 1146 | bp->tx_ring = NULL; |
1155 | bp->flags &= ~B44_FLAG_TX_RING_HACK; | 1147 | bp->flags &= ~B44_FLAG_TX_RING_HACK; |
1156 | } | 1148 | } |
@@ -1175,7 +1167,8 @@ static int b44_alloc_consistent(struct b44 *bp, gfp_t gfp) | |||
1175 | goto out_err; | 1167 | goto out_err; |
1176 | 1168 | ||
1177 | size = DMA_TABLE_BYTES; | 1169 | size = DMA_TABLE_BYTES; |
1178 | bp->rx_ring = ssb_dma_alloc_consistent(bp->sdev, size, &bp->rx_ring_dma, gfp); | 1170 | bp->rx_ring = dma_alloc_coherent(bp->sdev->dma_dev, size, |
1171 | &bp->rx_ring_dma, gfp); | ||
1179 | if (!bp->rx_ring) { | 1172 | if (!bp->rx_ring) { |
1180 | /* Allocation may have failed due to pci_alloc_consistent | 1173 | /* Allocation may have failed due to pci_alloc_consistent |
1181 | insisting on use of GFP_DMA, which is more restrictive | 1174 | insisting on use of GFP_DMA, which is more restrictive |
@@ -1187,11 +1180,11 @@ static int b44_alloc_consistent(struct b44 *bp, gfp_t gfp) | |||
1187 | if (!rx_ring) | 1180 | if (!rx_ring) |
1188 | goto out_err; | 1181 | goto out_err; |
1189 | 1182 | ||
1190 | rx_ring_dma = ssb_dma_map_single(bp->sdev, rx_ring, | 1183 | rx_ring_dma = dma_map_single(bp->sdev->dma_dev, rx_ring, |
1191 | DMA_TABLE_BYTES, | 1184 | DMA_TABLE_BYTES, |
1192 | DMA_BIDIRECTIONAL); | 1185 | DMA_BIDIRECTIONAL); |
1193 | 1186 | ||
1194 | if (ssb_dma_mapping_error(bp->sdev, rx_ring_dma) || | 1187 | if (dma_mapping_error(bp->sdev->dma_dev, rx_ring_dma) || |
1195 | rx_ring_dma + size > DMA_BIT_MASK(30)) { | 1188 | rx_ring_dma + size > DMA_BIT_MASK(30)) { |
1196 | kfree(rx_ring); | 1189 | kfree(rx_ring); |
1197 | goto out_err; | 1190 | goto out_err; |
@@ -1202,7 +1195,8 @@ static int b44_alloc_consistent(struct b44 *bp, gfp_t gfp) | |||
1202 | bp->flags |= B44_FLAG_RX_RING_HACK; | 1195 | bp->flags |= B44_FLAG_RX_RING_HACK; |
1203 | } | 1196 | } |
1204 | 1197 | ||
1205 | bp->tx_ring = ssb_dma_alloc_consistent(bp->sdev, size, &bp->tx_ring_dma, gfp); | 1198 | bp->tx_ring = dma_alloc_coherent(bp->sdev->dma_dev, size, |
1199 | &bp->tx_ring_dma, gfp); | ||
1206 | if (!bp->tx_ring) { | 1200 | if (!bp->tx_ring) { |
1207 | /* Allocation may have failed due to ssb_dma_alloc_consistent | 1201 | /* Allocation may have failed due to ssb_dma_alloc_consistent |
1208 | insisting on use of GFP_DMA, which is more restrictive | 1202 | insisting on use of GFP_DMA, which is more restrictive |
@@ -1214,11 +1208,11 @@ static int b44_alloc_consistent(struct b44 *bp, gfp_t gfp) | |||
1214 | if (!tx_ring) | 1208 | if (!tx_ring) |
1215 | goto out_err; | 1209 | goto out_err; |
1216 | 1210 | ||
1217 | tx_ring_dma = ssb_dma_map_single(bp->sdev, tx_ring, | 1211 | tx_ring_dma = dma_map_single(bp->sdev->dma_dev, tx_ring, |
1218 | DMA_TABLE_BYTES, | 1212 | DMA_TABLE_BYTES, |
1219 | DMA_TO_DEVICE); | 1213 | DMA_TO_DEVICE); |
1220 | 1214 | ||
1221 | if (ssb_dma_mapping_error(bp->sdev, tx_ring_dma) || | 1215 | if (dma_mapping_error(bp->sdev->dma_dev, tx_ring_dma) || |
1222 | tx_ring_dma + size > DMA_BIT_MASK(30)) { | 1216 | tx_ring_dma + size > DMA_BIT_MASK(30)) { |
1223 | kfree(tx_ring); | 1217 | kfree(tx_ring); |
1224 | goto out_err; | 1218 | goto out_err; |
@@ -2176,12 +2170,14 @@ static int __devinit b44_init_one(struct ssb_device *sdev, | |||
2176 | "Failed to powerup the bus\n"); | 2170 | "Failed to powerup the bus\n"); |
2177 | goto err_out_free_dev; | 2171 | goto err_out_free_dev; |
2178 | } | 2172 | } |
2179 | err = ssb_dma_set_mask(sdev, DMA_BIT_MASK(30)); | 2173 | |
2180 | if (err) { | 2174 | if (dma_set_mask(sdev->dma_dev, DMA_BIT_MASK(30)) || |
2175 | dma_set_coherent_mask(sdev->dma_dev, DMA_BIT_MASK(30))) { | ||
2181 | dev_err(sdev->dev, | 2176 | dev_err(sdev->dev, |
2182 | "Required 30BIT DMA mask unsupported by the system\n"); | 2177 | "Required 30BIT DMA mask unsupported by the system\n"); |
2183 | goto err_out_powerdown; | 2178 | goto err_out_powerdown; |
2184 | } | 2179 | } |
2180 | |||
2185 | err = b44_get_invariants(bp); | 2181 | err = b44_get_invariants(bp); |
2186 | if (err) { | 2182 | if (err) { |
2187 | dev_err(sdev->dev, | 2183 | dev_err(sdev->dev, |
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c index b9ad799c719f..ee1ad9693c8f 100644 --- a/drivers/net/benet/be_cmds.c +++ b/drivers/net/benet/be_cmds.c | |||
@@ -186,7 +186,7 @@ static int be_mcc_notify_wait(struct be_adapter *adapter) | |||
186 | 186 | ||
187 | static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) | 187 | static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) |
188 | { | 188 | { |
189 | int cnt = 0, wait = 5; | 189 | int msecs = 0; |
190 | u32 ready; | 190 | u32 ready; |
191 | 191 | ||
192 | do { | 192 | do { |
@@ -201,15 +201,14 @@ static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) | |||
201 | if (ready) | 201 | if (ready) |
202 | break; | 202 | break; |
203 | 203 | ||
204 | if (cnt > 4000000) { | 204 | if (msecs > 4000) { |
205 | dev_err(&adapter->pdev->dev, "mbox poll timed out\n"); | 205 | dev_err(&adapter->pdev->dev, "mbox poll timed out\n"); |
206 | return -1; | 206 | return -1; |
207 | } | 207 | } |
208 | 208 | ||
209 | if (cnt > 50) | 209 | set_current_state(TASK_INTERRUPTIBLE); |
210 | wait = 200; | 210 | schedule_timeout(msecs_to_jiffies(1)); |
211 | cnt += wait; | 211 | msecs++; |
212 | udelay(wait); | ||
213 | } while (true); | 212 | } while (true); |
214 | 213 | ||
215 | return 0; | 214 | return 0; |
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c index 54b14272f333..322577469852 100644 --- a/drivers/net/benet/be_main.c +++ b/drivers/net/benet/be_main.c | |||
@@ -1735,6 +1735,44 @@ done: | |||
1735 | adapter->isr_registered = false; | 1735 | adapter->isr_registered = false; |
1736 | } | 1736 | } |
1737 | 1737 | ||
1738 | static int be_close(struct net_device *netdev) | ||
1739 | { | ||
1740 | struct be_adapter *adapter = netdev_priv(netdev); | ||
1741 | struct be_eq_obj *rx_eq = &adapter->rx_eq; | ||
1742 | struct be_eq_obj *tx_eq = &adapter->tx_eq; | ||
1743 | int vec; | ||
1744 | |||
1745 | cancel_delayed_work_sync(&adapter->work); | ||
1746 | |||
1747 | be_async_mcc_disable(adapter); | ||
1748 | |||
1749 | netif_stop_queue(netdev); | ||
1750 | netif_carrier_off(netdev); | ||
1751 | adapter->link_up = false; | ||
1752 | |||
1753 | be_intr_set(adapter, false); | ||
1754 | |||
1755 | if (adapter->msix_enabled) { | ||
1756 | vec = be_msix_vec_get(adapter, tx_eq->q.id); | ||
1757 | synchronize_irq(vec); | ||
1758 | vec = be_msix_vec_get(adapter, rx_eq->q.id); | ||
1759 | synchronize_irq(vec); | ||
1760 | } else { | ||
1761 | synchronize_irq(netdev->irq); | ||
1762 | } | ||
1763 | be_irq_unregister(adapter); | ||
1764 | |||
1765 | napi_disable(&rx_eq->napi); | ||
1766 | napi_disable(&tx_eq->napi); | ||
1767 | |||
1768 | /* Wait for all pending tx completions to arrive so that | ||
1769 | * all tx skbs are freed. | ||
1770 | */ | ||
1771 | be_tx_compl_clean(adapter); | ||
1772 | |||
1773 | return 0; | ||
1774 | } | ||
1775 | |||
1738 | static int be_open(struct net_device *netdev) | 1776 | static int be_open(struct net_device *netdev) |
1739 | { | 1777 | { |
1740 | struct be_adapter *adapter = netdev_priv(netdev); | 1778 | struct be_adapter *adapter = netdev_priv(netdev); |
@@ -1765,27 +1803,29 @@ static int be_open(struct net_device *netdev) | |||
1765 | /* Now that interrupts are on we can process async mcc */ | 1803 | /* Now that interrupts are on we can process async mcc */ |
1766 | be_async_mcc_enable(adapter); | 1804 | be_async_mcc_enable(adapter); |
1767 | 1805 | ||
1806 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); | ||
1807 | |||
1768 | status = be_cmd_link_status_query(adapter, &link_up, &mac_speed, | 1808 | status = be_cmd_link_status_query(adapter, &link_up, &mac_speed, |
1769 | &link_speed); | 1809 | &link_speed); |
1770 | if (status) | 1810 | if (status) |
1771 | goto ret_sts; | 1811 | goto err; |
1772 | be_link_status_update(adapter, link_up); | 1812 | be_link_status_update(adapter, link_up); |
1773 | 1813 | ||
1774 | if (be_physfn(adapter)) | 1814 | if (be_physfn(adapter)) { |
1775 | status = be_vid_config(adapter); | 1815 | status = be_vid_config(adapter); |
1776 | if (status) | 1816 | if (status) |
1777 | goto ret_sts; | 1817 | goto err; |
1778 | 1818 | ||
1779 | if (be_physfn(adapter)) { | ||
1780 | status = be_cmd_set_flow_control(adapter, | 1819 | status = be_cmd_set_flow_control(adapter, |
1781 | adapter->tx_fc, adapter->rx_fc); | 1820 | adapter->tx_fc, adapter->rx_fc); |
1782 | if (status) | 1821 | if (status) |
1783 | goto ret_sts; | 1822 | goto err; |
1784 | } | 1823 | } |
1785 | 1824 | ||
1786 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); | 1825 | return 0; |
1787 | ret_sts: | 1826 | err: |
1788 | return status; | 1827 | be_close(adapter->netdev); |
1828 | return -EIO; | ||
1789 | } | 1829 | } |
1790 | 1830 | ||
1791 | static int be_setup_wol(struct be_adapter *adapter, bool enable) | 1831 | static int be_setup_wol(struct be_adapter *adapter, bool enable) |
@@ -1913,43 +1953,6 @@ static int be_clear(struct be_adapter *adapter) | |||
1913 | return 0; | 1953 | return 0; |
1914 | } | 1954 | } |
1915 | 1955 | ||
1916 | static int be_close(struct net_device *netdev) | ||
1917 | { | ||
1918 | struct be_adapter *adapter = netdev_priv(netdev); | ||
1919 | struct be_eq_obj *rx_eq = &adapter->rx_eq; | ||
1920 | struct be_eq_obj *tx_eq = &adapter->tx_eq; | ||
1921 | int vec; | ||
1922 | |||
1923 | cancel_delayed_work_sync(&adapter->work); | ||
1924 | |||
1925 | be_async_mcc_disable(adapter); | ||
1926 | |||
1927 | netif_stop_queue(netdev); | ||
1928 | netif_carrier_off(netdev); | ||
1929 | adapter->link_up = false; | ||
1930 | |||
1931 | be_intr_set(adapter, false); | ||
1932 | |||
1933 | if (adapter->msix_enabled) { | ||
1934 | vec = be_msix_vec_get(adapter, tx_eq->q.id); | ||
1935 | synchronize_irq(vec); | ||
1936 | vec = be_msix_vec_get(adapter, rx_eq->q.id); | ||
1937 | synchronize_irq(vec); | ||
1938 | } else { | ||
1939 | synchronize_irq(netdev->irq); | ||
1940 | } | ||
1941 | be_irq_unregister(adapter); | ||
1942 | |||
1943 | napi_disable(&rx_eq->napi); | ||
1944 | napi_disable(&tx_eq->napi); | ||
1945 | |||
1946 | /* Wait for all pending tx completions to arrive so that | ||
1947 | * all tx skbs are freed. | ||
1948 | */ | ||
1949 | be_tx_compl_clean(adapter); | ||
1950 | |||
1951 | return 0; | ||
1952 | } | ||
1953 | 1956 | ||
1954 | #define FW_FILE_HDR_SIGN "ServerEngines Corp. " | 1957 | #define FW_FILE_HDR_SIGN "ServerEngines Corp. " |
1955 | char flash_cookie[2][16] = {"*** SE FLAS", | 1958 | char flash_cookie[2][16] = {"*** SE FLAS", |
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c index 40fdc41446cc..25c14c6236f5 100644 --- a/drivers/net/bonding/bond_alb.c +++ b/drivers/net/bonding/bond_alb.c | |||
@@ -233,34 +233,27 @@ static void tlb_deinitialize(struct bonding *bond) | |||
233 | _unlock_tx_hashtbl(bond); | 233 | _unlock_tx_hashtbl(bond); |
234 | } | 234 | } |
235 | 235 | ||
236 | static long long compute_gap(struct slave *slave) | ||
237 | { | ||
238 | return (s64) (slave->speed << 20) - /* Convert to Megabit per sec */ | ||
239 | (s64) (SLAVE_TLB_INFO(slave).load << 3); /* Bytes to bits */ | ||
240 | } | ||
241 | |||
236 | /* Caller must hold bond lock for read */ | 242 | /* Caller must hold bond lock for read */ |
237 | static struct slave *tlb_get_least_loaded_slave(struct bonding *bond) | 243 | static struct slave *tlb_get_least_loaded_slave(struct bonding *bond) |
238 | { | 244 | { |
239 | struct slave *slave, *least_loaded; | 245 | struct slave *slave, *least_loaded; |
240 | s64 max_gap; | 246 | long long max_gap; |
241 | int i, found = 0; | 247 | int i; |
242 | |||
243 | /* Find the first enabled slave */ | ||
244 | bond_for_each_slave(bond, slave, i) { | ||
245 | if (SLAVE_IS_OK(slave)) { | ||
246 | found = 1; | ||
247 | break; | ||
248 | } | ||
249 | } | ||
250 | |||
251 | if (!found) { | ||
252 | return NULL; | ||
253 | } | ||
254 | 248 | ||
255 | least_loaded = slave; | 249 | least_loaded = NULL; |
256 | max_gap = (s64)(slave->speed << 20) - /* Convert to Megabit per sec */ | 250 | max_gap = LLONG_MIN; |
257 | (s64)(SLAVE_TLB_INFO(slave).load << 3); /* Bytes to bits */ | ||
258 | 251 | ||
259 | /* Find the slave with the largest gap */ | 252 | /* Find the slave with the largest gap */ |
260 | bond_for_each_slave_from(bond, slave, i, least_loaded) { | 253 | bond_for_each_slave(bond, slave, i) { |
261 | if (SLAVE_IS_OK(slave)) { | 254 | if (SLAVE_IS_OK(slave)) { |
262 | s64 gap = (s64)(slave->speed << 20) - | 255 | long long gap = compute_gap(slave); |
263 | (s64)(SLAVE_TLB_INFO(slave).load << 3); | 256 | |
264 | if (max_gap < gap) { | 257 | if (max_gap < gap) { |
265 | least_loaded = slave; | 258 | least_loaded = slave; |
266 | max_gap = gap; | 259 | max_gap = gap; |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 5e12462a9d5e..ac4f94b7da37 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -90,6 +90,7 @@ | |||
90 | #define BOND_LINK_ARP_INTERV 0 | 90 | #define BOND_LINK_ARP_INTERV 0 |
91 | 91 | ||
92 | static int max_bonds = BOND_DEFAULT_MAX_BONDS; | 92 | static int max_bonds = BOND_DEFAULT_MAX_BONDS; |
93 | static int tx_queues = BOND_DEFAULT_TX_QUEUES; | ||
93 | static int num_grat_arp = 1; | 94 | static int num_grat_arp = 1; |
94 | static int num_unsol_na = 1; | 95 | static int num_unsol_na = 1; |
95 | static int miimon = BOND_LINK_MON_INTERV; | 96 | static int miimon = BOND_LINK_MON_INTERV; |
@@ -106,10 +107,13 @@ static int arp_interval = BOND_LINK_ARP_INTERV; | |||
106 | static char *arp_ip_target[BOND_MAX_ARP_TARGETS]; | 107 | static char *arp_ip_target[BOND_MAX_ARP_TARGETS]; |
107 | static char *arp_validate; | 108 | static char *arp_validate; |
108 | static char *fail_over_mac; | 109 | static char *fail_over_mac; |
110 | static int all_slaves_active = 0; | ||
109 | static struct bond_params bonding_defaults; | 111 | static struct bond_params bonding_defaults; |
110 | 112 | ||
111 | module_param(max_bonds, int, 0); | 113 | module_param(max_bonds, int, 0); |
112 | MODULE_PARM_DESC(max_bonds, "Max number of bonded devices"); | 114 | MODULE_PARM_DESC(max_bonds, "Max number of bonded devices"); |
115 | module_param(tx_queues, int, 0); | ||
116 | MODULE_PARM_DESC(tx_queues, "Max number of transmit queues (default = 16)"); | ||
113 | module_param(num_grat_arp, int, 0644); | 117 | module_param(num_grat_arp, int, 0644); |
114 | MODULE_PARM_DESC(num_grat_arp, "Number of gratuitous ARP packets to send on failover event"); | 118 | MODULE_PARM_DESC(num_grat_arp, "Number of gratuitous ARP packets to send on failover event"); |
115 | module_param(num_unsol_na, int, 0644); | 119 | module_param(num_unsol_na, int, 0644); |
@@ -155,6 +159,10 @@ module_param(arp_validate, charp, 0); | |||
155 | MODULE_PARM_DESC(arp_validate, "validate src/dst of ARP probes: none (default), active, backup or all"); | 159 | MODULE_PARM_DESC(arp_validate, "validate src/dst of ARP probes: none (default), active, backup or all"); |
156 | module_param(fail_over_mac, charp, 0); | 160 | module_param(fail_over_mac, charp, 0); |
157 | MODULE_PARM_DESC(fail_over_mac, "For active-backup, do not set all slaves to the same MAC. none (default), active or follow"); | 161 | MODULE_PARM_DESC(fail_over_mac, "For active-backup, do not set all slaves to the same MAC. none (default), active or follow"); |
162 | module_param(all_slaves_active, int, 0); | ||
163 | MODULE_PARM_DESC(all_slaves_active, "Keep all frames received on an interface" | ||
164 | "by setting active flag for all slaves. " | ||
165 | "0 for never (default), 1 for always."); | ||
158 | 166 | ||
159 | /*----------------------------- Global variables ----------------------------*/ | 167 | /*----------------------------- Global variables ----------------------------*/ |
160 | 168 | ||
@@ -1522,16 +1530,32 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) | |||
1522 | } | 1530 | } |
1523 | } | 1531 | } |
1524 | 1532 | ||
1533 | /* If this is the first slave, then we need to set the master's hardware | ||
1534 | * address to be the same as the slave's. */ | ||
1535 | if (bond->slave_cnt == 0) | ||
1536 | memcpy(bond->dev->dev_addr, slave_dev->dev_addr, | ||
1537 | slave_dev->addr_len); | ||
1538 | |||
1539 | |||
1525 | new_slave = kzalloc(sizeof(struct slave), GFP_KERNEL); | 1540 | new_slave = kzalloc(sizeof(struct slave), GFP_KERNEL); |
1526 | if (!new_slave) { | 1541 | if (!new_slave) { |
1527 | res = -ENOMEM; | 1542 | res = -ENOMEM; |
1528 | goto err_undo_flags; | 1543 | goto err_undo_flags; |
1529 | } | 1544 | } |
1530 | 1545 | ||
1531 | /* save slave's original flags before calling | 1546 | /* |
1532 | * netdev_set_master and dev_open | 1547 | * Set the new_slave's queue_id to be zero. Queue ID mapping |
1548 | * is set via sysfs or module option if desired. | ||
1533 | */ | 1549 | */ |
1534 | new_slave->original_flags = slave_dev->flags; | 1550 | new_slave->queue_id = 0; |
1551 | |||
1552 | /* Save slave's original mtu and then set it to match the bond */ | ||
1553 | new_slave->original_mtu = slave_dev->mtu; | ||
1554 | res = dev_set_mtu(slave_dev, bond->dev->mtu); | ||
1555 | if (res) { | ||
1556 | pr_debug("Error %d calling dev_set_mtu\n", res); | ||
1557 | goto err_free; | ||
1558 | } | ||
1535 | 1559 | ||
1536 | /* | 1560 | /* |
1537 | * Save slave's original ("permanent") mac address for modes | 1561 | * Save slave's original ("permanent") mac address for modes |
@@ -1550,7 +1574,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) | |||
1550 | res = dev_set_mac_address(slave_dev, &addr); | 1574 | res = dev_set_mac_address(slave_dev, &addr); |
1551 | if (res) { | 1575 | if (res) { |
1552 | pr_debug("Error %d calling set_mac_address\n", res); | 1576 | pr_debug("Error %d calling set_mac_address\n", res); |
1553 | goto err_free; | 1577 | goto err_restore_mtu; |
1554 | } | 1578 | } |
1555 | } | 1579 | } |
1556 | 1580 | ||
@@ -1785,6 +1809,9 @@ err_restore_mac: | |||
1785 | dev_set_mac_address(slave_dev, &addr); | 1809 | dev_set_mac_address(slave_dev, &addr); |
1786 | } | 1810 | } |
1787 | 1811 | ||
1812 | err_restore_mtu: | ||
1813 | dev_set_mtu(slave_dev, new_slave->original_mtu); | ||
1814 | |||
1788 | err_free: | 1815 | err_free: |
1789 | kfree(new_slave); | 1816 | kfree(new_slave); |
1790 | 1817 | ||
@@ -1969,6 +1996,8 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev) | |||
1969 | dev_set_mac_address(slave_dev, &addr); | 1996 | dev_set_mac_address(slave_dev, &addr); |
1970 | } | 1997 | } |
1971 | 1998 | ||
1999 | dev_set_mtu(slave_dev, slave->original_mtu); | ||
2000 | |||
1972 | slave_dev->priv_flags &= ~(IFF_MASTER_8023AD | IFF_MASTER_ALB | | 2001 | slave_dev->priv_flags &= ~(IFF_MASTER_8023AD | IFF_MASTER_ALB | |
1973 | IFF_SLAVE_INACTIVE | IFF_BONDING | | 2002 | IFF_SLAVE_INACTIVE | IFF_BONDING | |
1974 | IFF_SLAVE_NEEDARP); | 2003 | IFF_SLAVE_NEEDARP); |
@@ -2555,7 +2584,7 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave) | |||
2555 | /* | 2584 | /* |
2556 | * This target is not on a VLAN | 2585 | * This target is not on a VLAN |
2557 | */ | 2586 | */ |
2558 | if (rt->u.dst.dev == bond->dev) { | 2587 | if (rt->dst.dev == bond->dev) { |
2559 | ip_rt_put(rt); | 2588 | ip_rt_put(rt); |
2560 | pr_debug("basa: rtdev == bond->dev: arp_send\n"); | 2589 | pr_debug("basa: rtdev == bond->dev: arp_send\n"); |
2561 | bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], | 2590 | bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], |
@@ -2566,7 +2595,7 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave) | |||
2566 | vlan_id = 0; | 2595 | vlan_id = 0; |
2567 | list_for_each_entry(vlan, &bond->vlan_list, vlan_list) { | 2596 | list_for_each_entry(vlan, &bond->vlan_list, vlan_list) { |
2568 | vlan_dev = vlan_group_get_device(bond->vlgrp, vlan->vlan_id); | 2597 | vlan_dev = vlan_group_get_device(bond->vlgrp, vlan->vlan_id); |
2569 | if (vlan_dev == rt->u.dst.dev) { | 2598 | if (vlan_dev == rt->dst.dev) { |
2570 | vlan_id = vlan->vlan_id; | 2599 | vlan_id = vlan->vlan_id; |
2571 | pr_debug("basa: vlan match on %s %d\n", | 2600 | pr_debug("basa: vlan match on %s %d\n", |
2572 | vlan_dev->name, vlan_id); | 2601 | vlan_dev->name, vlan_id); |
@@ -2584,7 +2613,7 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave) | |||
2584 | if (net_ratelimit()) { | 2613 | if (net_ratelimit()) { |
2585 | pr_warning("%s: no path to arp_ip_target %pI4 via rt.dev %s\n", | 2614 | pr_warning("%s: no path to arp_ip_target %pI4 via rt.dev %s\n", |
2586 | bond->dev->name, &fl.fl4_dst, | 2615 | bond->dev->name, &fl.fl4_dst, |
2587 | rt->u.dst.dev ? rt->u.dst.dev->name : "NULL"); | 2616 | rt->dst.dev ? rt->dst.dev->name : "NULL"); |
2588 | } | 2617 | } |
2589 | ip_rt_put(rt); | 2618 | ip_rt_put(rt); |
2590 | } | 2619 | } |
@@ -3265,6 +3294,7 @@ static void bond_info_show_slave(struct seq_file *seq, | |||
3265 | else | 3294 | else |
3266 | seq_puts(seq, "Aggregator ID: N/A\n"); | 3295 | seq_puts(seq, "Aggregator ID: N/A\n"); |
3267 | } | 3296 | } |
3297 | seq_printf(seq, "Slave queue ID: %d\n", slave->queue_id); | ||
3268 | } | 3298 | } |
3269 | 3299 | ||
3270 | static int bond_info_seq_show(struct seq_file *seq, void *v) | 3300 | static int bond_info_seq_show(struct seq_file *seq, void *v) |
@@ -4401,9 +4431,59 @@ static void bond_set_xmit_hash_policy(struct bonding *bond) | |||
4401 | } | 4431 | } |
4402 | } | 4432 | } |
4403 | 4433 | ||
4434 | /* | ||
4435 | * Lookup the slave that corresponds to a qid | ||
4436 | */ | ||
4437 | static inline int bond_slave_override(struct bonding *bond, | ||
4438 | struct sk_buff *skb) | ||
4439 | { | ||
4440 | int i, res = 1; | ||
4441 | struct slave *slave = NULL; | ||
4442 | struct slave *check_slave; | ||
4443 | |||
4444 | read_lock(&bond->lock); | ||
4445 | |||
4446 | if (!BOND_IS_OK(bond) || !skb->queue_mapping) | ||
4447 | goto out; | ||
4448 | |||
4449 | /* Find out if any slaves have the same mapping as this skb. */ | ||
4450 | bond_for_each_slave(bond, check_slave, i) { | ||
4451 | if (check_slave->queue_id == skb->queue_mapping) { | ||
4452 | slave = check_slave; | ||
4453 | break; | ||
4454 | } | ||
4455 | } | ||
4456 | |||
4457 | /* If the slave isn't UP, use default transmit policy. */ | ||
4458 | if (slave && slave->queue_id && IS_UP(slave->dev) && | ||
4459 | (slave->link == BOND_LINK_UP)) { | ||
4460 | res = bond_dev_queue_xmit(bond, skb, slave->dev); | ||
4461 | } | ||
4462 | |||
4463 | out: | ||
4464 | read_unlock(&bond->lock); | ||
4465 | return res; | ||
4466 | } | ||
4467 | |||
4468 | static u16 bond_select_queue(struct net_device *dev, struct sk_buff *skb) | ||
4469 | { | ||
4470 | /* | ||
4471 | * This helper function exists to help dev_pick_tx get the correct | ||
4472 | * destination queue. Using a helper function skips the a call to | ||
4473 | * skb_tx_hash and will put the skbs in the queue we expect on their | ||
4474 | * way down to the bonding driver. | ||
4475 | */ | ||
4476 | return skb->queue_mapping; | ||
4477 | } | ||
4478 | |||
4404 | static netdev_tx_t bond_start_xmit(struct sk_buff *skb, struct net_device *dev) | 4479 | static netdev_tx_t bond_start_xmit(struct sk_buff *skb, struct net_device *dev) |
4405 | { | 4480 | { |
4406 | const struct bonding *bond = netdev_priv(dev); | 4481 | struct bonding *bond = netdev_priv(dev); |
4482 | |||
4483 | if (TX_QUEUE_OVERRIDE(bond->params.mode)) { | ||
4484 | if (!bond_slave_override(bond, skb)) | ||
4485 | return NETDEV_TX_OK; | ||
4486 | } | ||
4407 | 4487 | ||
4408 | switch (bond->params.mode) { | 4488 | switch (bond->params.mode) { |
4409 | case BOND_MODE_ROUNDROBIN: | 4489 | case BOND_MODE_ROUNDROBIN: |
@@ -4488,6 +4568,7 @@ static const struct net_device_ops bond_netdev_ops = { | |||
4488 | .ndo_open = bond_open, | 4568 | .ndo_open = bond_open, |
4489 | .ndo_stop = bond_close, | 4569 | .ndo_stop = bond_close, |
4490 | .ndo_start_xmit = bond_start_xmit, | 4570 | .ndo_start_xmit = bond_start_xmit, |
4571 | .ndo_select_queue = bond_select_queue, | ||
4491 | .ndo_get_stats = bond_get_stats, | 4572 | .ndo_get_stats = bond_get_stats, |
4492 | .ndo_do_ioctl = bond_do_ioctl, | 4573 | .ndo_do_ioctl = bond_do_ioctl, |
4493 | .ndo_set_multicast_list = bond_set_multicast_list, | 4574 | .ndo_set_multicast_list = bond_set_multicast_list, |
@@ -4756,6 +4837,20 @@ static int bond_check_params(struct bond_params *params) | |||
4756 | } | 4837 | } |
4757 | } | 4838 | } |
4758 | 4839 | ||
4840 | if (tx_queues < 1 || tx_queues > 255) { | ||
4841 | pr_warning("Warning: tx_queues (%d) should be between " | ||
4842 | "1 and 255, resetting to %d\n", | ||
4843 | tx_queues, BOND_DEFAULT_TX_QUEUES); | ||
4844 | tx_queues = BOND_DEFAULT_TX_QUEUES; | ||
4845 | } | ||
4846 | |||
4847 | if ((all_slaves_active != 0) && (all_slaves_active != 1)) { | ||
4848 | pr_warning("Warning: all_slaves_active module parameter (%d), " | ||
4849 | "not of valid value (0/1), so it was set to " | ||
4850 | "0\n", all_slaves_active); | ||
4851 | all_slaves_active = 0; | ||
4852 | } | ||
4853 | |||
4759 | /* reset values for TLB/ALB */ | 4854 | /* reset values for TLB/ALB */ |
4760 | if ((bond_mode == BOND_MODE_TLB) || | 4855 | if ((bond_mode == BOND_MODE_TLB) || |
4761 | (bond_mode == BOND_MODE_ALB)) { | 4856 | (bond_mode == BOND_MODE_ALB)) { |
@@ -4926,6 +5021,8 @@ static int bond_check_params(struct bond_params *params) | |||
4926 | params->primary[0] = 0; | 5021 | params->primary[0] = 0; |
4927 | params->primary_reselect = primary_reselect_value; | 5022 | params->primary_reselect = primary_reselect_value; |
4928 | params->fail_over_mac = fail_over_mac_value; | 5023 | params->fail_over_mac = fail_over_mac_value; |
5024 | params->tx_queues = tx_queues; | ||
5025 | params->all_slaves_active = all_slaves_active; | ||
4929 | 5026 | ||
4930 | if (primary) { | 5027 | if (primary) { |
4931 | strncpy(params->primary, primary, IFNAMSIZ); | 5028 | strncpy(params->primary, primary, IFNAMSIZ); |
@@ -5012,8 +5109,8 @@ int bond_create(struct net *net, const char *name) | |||
5012 | 5109 | ||
5013 | rtnl_lock(); | 5110 | rtnl_lock(); |
5014 | 5111 | ||
5015 | bond_dev = alloc_netdev(sizeof(struct bonding), name ? name : "", | 5112 | bond_dev = alloc_netdev_mq(sizeof(struct bonding), name ? name : "", |
5016 | bond_setup); | 5113 | bond_setup, tx_queues); |
5017 | if (!bond_dev) { | 5114 | if (!bond_dev) { |
5018 | pr_err("%s: eek! can't alloc netdev!\n", name); | 5115 | pr_err("%s: eek! can't alloc netdev!\n", name); |
5019 | rtnl_unlock(); | 5116 | rtnl_unlock(); |
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c index b8bec086daa1..f9a034361a8e 100644 --- a/drivers/net/bonding/bond_sysfs.c +++ b/drivers/net/bonding/bond_sysfs.c | |||
@@ -211,7 +211,8 @@ static ssize_t bonding_show_slaves(struct device *d, | |||
211 | /* | 211 | /* |
212 | * Set the slaves in the current bond. The bond interface must be | 212 | * Set the slaves in the current bond. The bond interface must be |
213 | * up for this to succeed. | 213 | * up for this to succeed. |
214 | * This function is largely the same flow as bonding_update_bonds(). | 214 | * This is supposed to be only thin wrapper for bond_enslave and bond_release. |
215 | * All hard work should be done there. | ||
215 | */ | 216 | */ |
216 | static ssize_t bonding_store_slaves(struct device *d, | 217 | static ssize_t bonding_store_slaves(struct device *d, |
217 | struct device_attribute *attr, | 218 | struct device_attribute *attr, |
@@ -219,10 +220,8 @@ static ssize_t bonding_store_slaves(struct device *d, | |||
219 | { | 220 | { |
220 | char command[IFNAMSIZ + 1] = { 0, }; | 221 | char command[IFNAMSIZ + 1] = { 0, }; |
221 | char *ifname; | 222 | char *ifname; |
222 | int i, res, found, ret = count; | 223 | int res, ret = count; |
223 | u32 original_mtu; | 224 | struct net_device *dev; |
224 | struct slave *slave; | ||
225 | struct net_device *dev = NULL; | ||
226 | struct bonding *bond = to_bond(d); | 225 | struct bonding *bond = to_bond(d); |
227 | 226 | ||
228 | /* Quick sanity check -- is the bond interface up? */ | 227 | /* Quick sanity check -- is the bond interface up? */ |
@@ -231,8 +230,6 @@ static ssize_t bonding_store_slaves(struct device *d, | |||
231 | bond->dev->name); | 230 | bond->dev->name); |
232 | } | 231 | } |
233 | 232 | ||
234 | /* Note: We can't hold bond->lock here, as bond_create grabs it. */ | ||
235 | |||
236 | if (!rtnl_trylock()) | 233 | if (!rtnl_trylock()) |
237 | return restart_syscall(); | 234 | return restart_syscall(); |
238 | 235 | ||
@@ -242,91 +239,33 @@ static ssize_t bonding_store_slaves(struct device *d, | |||
242 | !dev_valid_name(ifname)) | 239 | !dev_valid_name(ifname)) |
243 | goto err_no_cmd; | 240 | goto err_no_cmd; |
244 | 241 | ||
245 | if (command[0] == '+') { | 242 | dev = __dev_get_by_name(dev_net(bond->dev), ifname); |
246 | 243 | if (!dev) { | |
247 | /* Got a slave name in ifname. Is it already in the list? */ | 244 | pr_info("%s: Interface %s does not exist!\n", |
248 | found = 0; | 245 | bond->dev->name, ifname); |
249 | 246 | ret = -ENODEV; | |
250 | dev = __dev_get_by_name(dev_net(bond->dev), ifname); | 247 | goto out; |
251 | if (!dev) { | 248 | } |
252 | pr_info("%s: Interface %s does not exist!\n", | ||
253 | bond->dev->name, ifname); | ||
254 | ret = -ENODEV; | ||
255 | goto out; | ||
256 | } | ||
257 | |||
258 | if (dev->flags & IFF_UP) { | ||
259 | pr_err("%s: Error: Unable to enslave %s because it is already up.\n", | ||
260 | bond->dev->name, dev->name); | ||
261 | ret = -EPERM; | ||
262 | goto out; | ||
263 | } | ||
264 | |||
265 | read_lock(&bond->lock); | ||
266 | bond_for_each_slave(bond, slave, i) | ||
267 | if (slave->dev == dev) { | ||
268 | pr_err("%s: Interface %s is already enslaved!\n", | ||
269 | bond->dev->name, ifname); | ||
270 | ret = -EPERM; | ||
271 | read_unlock(&bond->lock); | ||
272 | goto out; | ||
273 | } | ||
274 | read_unlock(&bond->lock); | ||
275 | |||
276 | pr_info("%s: Adding slave %s.\n", bond->dev->name, ifname); | ||
277 | |||
278 | /* If this is the first slave, then we need to set | ||
279 | the master's hardware address to be the same as the | ||
280 | slave's. */ | ||
281 | if (is_zero_ether_addr(bond->dev->dev_addr)) | ||
282 | memcpy(bond->dev->dev_addr, dev->dev_addr, | ||
283 | dev->addr_len); | ||
284 | |||
285 | /* Set the slave's MTU to match the bond */ | ||
286 | original_mtu = dev->mtu; | ||
287 | res = dev_set_mtu(dev, bond->dev->mtu); | ||
288 | if (res) { | ||
289 | ret = res; | ||
290 | goto out; | ||
291 | } | ||
292 | 249 | ||
250 | switch (command[0]) { | ||
251 | case '+': | ||
252 | pr_info("%s: Adding slave %s.\n", bond->dev->name, dev->name); | ||
293 | res = bond_enslave(bond->dev, dev); | 253 | res = bond_enslave(bond->dev, dev); |
294 | bond_for_each_slave(bond, slave, i) | 254 | break; |
295 | if (strnicmp(slave->dev->name, ifname, IFNAMSIZ) == 0) | ||
296 | slave->original_mtu = original_mtu; | ||
297 | if (res) | ||
298 | ret = res; | ||
299 | 255 | ||
300 | goto out; | 256 | case '-': |
301 | } | 257 | pr_info("%s: Removing slave %s.\n", bond->dev->name, dev->name); |
258 | res = bond_release(bond->dev, dev); | ||
259 | break; | ||
302 | 260 | ||
303 | if (command[0] == '-') { | 261 | default: |
304 | dev = NULL; | 262 | goto err_no_cmd; |
305 | original_mtu = 0; | ||
306 | bond_for_each_slave(bond, slave, i) | ||
307 | if (strnicmp(slave->dev->name, ifname, IFNAMSIZ) == 0) { | ||
308 | dev = slave->dev; | ||
309 | original_mtu = slave->original_mtu; | ||
310 | break; | ||
311 | } | ||
312 | if (dev) { | ||
313 | pr_info("%s: Removing slave %s\n", | ||
314 | bond->dev->name, dev->name); | ||
315 | res = bond_release(bond->dev, dev); | ||
316 | if (res) { | ||
317 | ret = res; | ||
318 | goto out; | ||
319 | } | ||
320 | /* set the slave MTU to the default */ | ||
321 | dev_set_mtu(dev, original_mtu); | ||
322 | } else { | ||
323 | pr_err("unable to remove non-existent slave %s for bond %s.\n", | ||
324 | ifname, bond->dev->name); | ||
325 | ret = -ENODEV; | ||
326 | } | ||
327 | goto out; | ||
328 | } | 263 | } |
329 | 264 | ||
265 | if (res) | ||
266 | ret = res; | ||
267 | goto out; | ||
268 | |||
330 | err_no_cmd: | 269 | err_no_cmd: |
331 | pr_err("no command found in slaves file for bond %s. Use +ifname or -ifname.\n", | 270 | pr_err("no command found in slaves file for bond %s. Use +ifname or -ifname.\n", |
332 | bond->dev->name); | 271 | bond->dev->name); |
@@ -1472,7 +1411,173 @@ static ssize_t bonding_show_ad_partner_mac(struct device *d, | |||
1472 | } | 1411 | } |
1473 | static DEVICE_ATTR(ad_partner_mac, S_IRUGO, bonding_show_ad_partner_mac, NULL); | 1412 | static DEVICE_ATTR(ad_partner_mac, S_IRUGO, bonding_show_ad_partner_mac, NULL); |
1474 | 1413 | ||
1414 | /* | ||
1415 | * Show the queue_ids of the slaves in the current bond. | ||
1416 | */ | ||
1417 | static ssize_t bonding_show_queue_id(struct device *d, | ||
1418 | struct device_attribute *attr, | ||
1419 | char *buf) | ||
1420 | { | ||
1421 | struct slave *slave; | ||
1422 | int i, res = 0; | ||
1423 | struct bonding *bond = to_bond(d); | ||
1424 | |||
1425 | if (!rtnl_trylock()) | ||
1426 | return restart_syscall(); | ||
1475 | 1427 | ||
1428 | read_lock(&bond->lock); | ||
1429 | bond_for_each_slave(bond, slave, i) { | ||
1430 | if (res > (PAGE_SIZE - 6)) { | ||
1431 | /* not enough space for another interface name */ | ||
1432 | if ((PAGE_SIZE - res) > 10) | ||
1433 | res = PAGE_SIZE - 10; | ||
1434 | res += sprintf(buf + res, "++more++ "); | ||
1435 | break; | ||
1436 | } | ||
1437 | res += sprintf(buf + res, "%s:%d ", | ||
1438 | slave->dev->name, slave->queue_id); | ||
1439 | } | ||
1440 | read_unlock(&bond->lock); | ||
1441 | if (res) | ||
1442 | buf[res-1] = '\n'; /* eat the leftover space */ | ||
1443 | rtnl_unlock(); | ||
1444 | return res; | ||
1445 | } | ||
1446 | |||
1447 | /* | ||
1448 | * Set the queue_ids of the slaves in the current bond. The bond | ||
1449 | * interface must be enslaved for this to work. | ||
1450 | */ | ||
1451 | static ssize_t bonding_store_queue_id(struct device *d, | ||
1452 | struct device_attribute *attr, | ||
1453 | const char *buffer, size_t count) | ||
1454 | { | ||
1455 | struct slave *slave, *update_slave; | ||
1456 | struct bonding *bond = to_bond(d); | ||
1457 | u16 qid; | ||
1458 | int i, ret = count; | ||
1459 | char *delim; | ||
1460 | struct net_device *sdev = NULL; | ||
1461 | |||
1462 | if (!rtnl_trylock()) | ||
1463 | return restart_syscall(); | ||
1464 | |||
1465 | /* delim will point to queue id if successful */ | ||
1466 | delim = strchr(buffer, ':'); | ||
1467 | if (!delim) | ||
1468 | goto err_no_cmd; | ||
1469 | |||
1470 | /* | ||
1471 | * Terminate string that points to device name and bump it | ||
1472 | * up one, so we can read the queue id there. | ||
1473 | */ | ||
1474 | *delim = '\0'; | ||
1475 | if (sscanf(++delim, "%hd\n", &qid) != 1) | ||
1476 | goto err_no_cmd; | ||
1477 | |||
1478 | /* Check buffer length, valid ifname and queue id */ | ||
1479 | if (strlen(buffer) > IFNAMSIZ || | ||
1480 | !dev_valid_name(buffer) || | ||
1481 | qid > bond->params.tx_queues) | ||
1482 | goto err_no_cmd; | ||
1483 | |||
1484 | /* Get the pointer to that interface if it exists */ | ||
1485 | sdev = __dev_get_by_name(dev_net(bond->dev), buffer); | ||
1486 | if (!sdev) | ||
1487 | goto err_no_cmd; | ||
1488 | |||
1489 | read_lock(&bond->lock); | ||
1490 | |||
1491 | /* Search for thes slave and check for duplicate qids */ | ||
1492 | update_slave = NULL; | ||
1493 | bond_for_each_slave(bond, slave, i) { | ||
1494 | if (sdev == slave->dev) | ||
1495 | /* | ||
1496 | * We don't need to check the matching | ||
1497 | * slave for dups, since we're overwriting it | ||
1498 | */ | ||
1499 | update_slave = slave; | ||
1500 | else if (qid && qid == slave->queue_id) { | ||
1501 | goto err_no_cmd_unlock; | ||
1502 | } | ||
1503 | } | ||
1504 | |||
1505 | if (!update_slave) | ||
1506 | goto err_no_cmd_unlock; | ||
1507 | |||
1508 | /* Actually set the qids for the slave */ | ||
1509 | update_slave->queue_id = qid; | ||
1510 | |||
1511 | read_unlock(&bond->lock); | ||
1512 | out: | ||
1513 | rtnl_unlock(); | ||
1514 | return ret; | ||
1515 | |||
1516 | err_no_cmd_unlock: | ||
1517 | read_unlock(&bond->lock); | ||
1518 | err_no_cmd: | ||
1519 | pr_info("invalid input for queue_id set for %s.\n", | ||
1520 | bond->dev->name); | ||
1521 | ret = -EPERM; | ||
1522 | goto out; | ||
1523 | } | ||
1524 | |||
1525 | static DEVICE_ATTR(queue_id, S_IRUGO | S_IWUSR, bonding_show_queue_id, | ||
1526 | bonding_store_queue_id); | ||
1527 | |||
1528 | |||
1529 | /* | ||
1530 | * Show and set the all_slaves_active flag. | ||
1531 | */ | ||
1532 | static ssize_t bonding_show_slaves_active(struct device *d, | ||
1533 | struct device_attribute *attr, | ||
1534 | char *buf) | ||
1535 | { | ||
1536 | struct bonding *bond = to_bond(d); | ||
1537 | |||
1538 | return sprintf(buf, "%d\n", bond->params.all_slaves_active); | ||
1539 | } | ||
1540 | |||
1541 | static ssize_t bonding_store_slaves_active(struct device *d, | ||
1542 | struct device_attribute *attr, | ||
1543 | const char *buf, size_t count) | ||
1544 | { | ||
1545 | int i, new_value, ret = count; | ||
1546 | struct bonding *bond = to_bond(d); | ||
1547 | struct slave *slave; | ||
1548 | |||
1549 | if (sscanf(buf, "%d", &new_value) != 1) { | ||
1550 | pr_err("%s: no all_slaves_active value specified.\n", | ||
1551 | bond->dev->name); | ||
1552 | ret = -EINVAL; | ||
1553 | goto out; | ||
1554 | } | ||
1555 | |||
1556 | if (new_value == bond->params.all_slaves_active) | ||
1557 | goto out; | ||
1558 | |||
1559 | if ((new_value == 0) || (new_value == 1)) { | ||
1560 | bond->params.all_slaves_active = new_value; | ||
1561 | } else { | ||
1562 | pr_info("%s: Ignoring invalid all_slaves_active value %d.\n", | ||
1563 | bond->dev->name, new_value); | ||
1564 | ret = -EINVAL; | ||
1565 | goto out; | ||
1566 | } | ||
1567 | |||
1568 | bond_for_each_slave(bond, slave, i) { | ||
1569 | if (slave->state == BOND_STATE_BACKUP) { | ||
1570 | if (new_value) | ||
1571 | slave->dev->priv_flags &= ~IFF_SLAVE_INACTIVE; | ||
1572 | else | ||
1573 | slave->dev->priv_flags |= IFF_SLAVE_INACTIVE; | ||
1574 | } | ||
1575 | } | ||
1576 | out: | ||
1577 | return count; | ||
1578 | } | ||
1579 | static DEVICE_ATTR(all_slaves_active, S_IRUGO | S_IWUSR, | ||
1580 | bonding_show_slaves_active, bonding_store_slaves_active); | ||
1476 | 1581 | ||
1477 | static struct attribute *per_bond_attrs[] = { | 1582 | static struct attribute *per_bond_attrs[] = { |
1478 | &dev_attr_slaves.attr, | 1583 | &dev_attr_slaves.attr, |
@@ -1499,6 +1604,8 @@ static struct attribute *per_bond_attrs[] = { | |||
1499 | &dev_attr_ad_actor_key.attr, | 1604 | &dev_attr_ad_actor_key.attr, |
1500 | &dev_attr_ad_partner_key.attr, | 1605 | &dev_attr_ad_partner_key.attr, |
1501 | &dev_attr_ad_partner_mac.attr, | 1606 | &dev_attr_ad_partner_mac.attr, |
1607 | &dev_attr_queue_id.attr, | ||
1608 | &dev_attr_all_slaves_active.attr, | ||
1502 | NULL, | 1609 | NULL, |
1503 | }; | 1610 | }; |
1504 | 1611 | ||
diff --git a/drivers/net/bonding/bonding.h b/drivers/net/bonding/bonding.h index 2aa336720591..c6fdd851579a 100644 --- a/drivers/net/bonding/bonding.h +++ b/drivers/net/bonding/bonding.h | |||
@@ -23,8 +23,8 @@ | |||
23 | #include "bond_3ad.h" | 23 | #include "bond_3ad.h" |
24 | #include "bond_alb.h" | 24 | #include "bond_alb.h" |
25 | 25 | ||
26 | #define DRV_VERSION "3.6.0" | 26 | #define DRV_VERSION "3.7.0" |
27 | #define DRV_RELDATE "September 26, 2009" | 27 | #define DRV_RELDATE "June 2, 2010" |
28 | #define DRV_NAME "bonding" | 28 | #define DRV_NAME "bonding" |
29 | #define DRV_DESCRIPTION "Ethernet Channel Bonding Driver" | 29 | #define DRV_DESCRIPTION "Ethernet Channel Bonding Driver" |
30 | 30 | ||
@@ -60,6 +60,9 @@ | |||
60 | ((mode) == BOND_MODE_TLB) || \ | 60 | ((mode) == BOND_MODE_TLB) || \ |
61 | ((mode) == BOND_MODE_ALB)) | 61 | ((mode) == BOND_MODE_ALB)) |
62 | 62 | ||
63 | #define TX_QUEUE_OVERRIDE(mode) \ | ||
64 | (((mode) == BOND_MODE_ACTIVEBACKUP) || \ | ||
65 | ((mode) == BOND_MODE_ROUNDROBIN)) | ||
63 | /* | 66 | /* |
64 | * Less bad way to call ioctl from within the kernel; this needs to be | 67 | * Less bad way to call ioctl from within the kernel; this needs to be |
65 | * done some other way to get the call out of interrupt context. | 68 | * done some other way to get the call out of interrupt context. |
@@ -131,6 +134,8 @@ struct bond_params { | |||
131 | char primary[IFNAMSIZ]; | 134 | char primary[IFNAMSIZ]; |
132 | int primary_reselect; | 135 | int primary_reselect; |
133 | __be32 arp_targets[BOND_MAX_ARP_TARGETS]; | 136 | __be32 arp_targets[BOND_MAX_ARP_TARGETS]; |
137 | int tx_queues; | ||
138 | int all_slaves_active; | ||
134 | }; | 139 | }; |
135 | 140 | ||
136 | struct bond_parm_tbl { | 141 | struct bond_parm_tbl { |
@@ -159,12 +164,12 @@ struct slave { | |||
159 | s8 link; /* one of BOND_LINK_XXXX */ | 164 | s8 link; /* one of BOND_LINK_XXXX */ |
160 | s8 new_link; | 165 | s8 new_link; |
161 | s8 state; /* one of BOND_STATE_XXXX */ | 166 | s8 state; /* one of BOND_STATE_XXXX */ |
162 | u32 original_flags; | ||
163 | u32 original_mtu; | 167 | u32 original_mtu; |
164 | u32 link_failure_count; | 168 | u32 link_failure_count; |
165 | u8 perm_hwaddr[ETH_ALEN]; | 169 | u8 perm_hwaddr[ETH_ALEN]; |
166 | u16 speed; | 170 | u16 speed; |
167 | u8 duplex; | 171 | u8 duplex; |
172 | u16 queue_id; | ||
168 | struct ad_slave_info ad_info; /* HUGE - better to dynamically alloc */ | 173 | struct ad_slave_info ad_info; /* HUGE - better to dynamically alloc */ |
169 | struct tlb_slave_info tlb_info; | 174 | struct tlb_slave_info tlb_info; |
170 | }; | 175 | }; |
@@ -291,7 +296,8 @@ static inline void bond_set_slave_inactive_flags(struct slave *slave) | |||
291 | struct bonding *bond = netdev_priv(slave->dev->master); | 296 | struct bonding *bond = netdev_priv(slave->dev->master); |
292 | if (!bond_is_lb(bond)) | 297 | if (!bond_is_lb(bond)) |
293 | slave->state = BOND_STATE_BACKUP; | 298 | slave->state = BOND_STATE_BACKUP; |
294 | slave->dev->priv_flags |= IFF_SLAVE_INACTIVE; | 299 | if (!bond->params.all_slaves_active) |
300 | slave->dev->priv_flags |= IFF_SLAVE_INACTIVE; | ||
295 | if (slave_do_arp_validate(bond, slave)) | 301 | if (slave_do_arp_validate(bond, slave)) |
296 | slave->dev->priv_flags |= IFF_SLAVE_NEEDARP; | 302 | slave->dev->priv_flags |= IFF_SLAVE_NEEDARP; |
297 | } | 303 | } |
diff --git a/drivers/net/caif/caif_serial.c b/drivers/net/caif/caif_serial.c index 09257ca8f563..3e706f00a0d3 100644 --- a/drivers/net/caif/caif_serial.c +++ b/drivers/net/caif/caif_serial.c | |||
@@ -174,6 +174,7 @@ static void ldisc_receive(struct tty_struct *tty, const u8 *data, | |||
174 | struct ser_device *ser; | 174 | struct ser_device *ser; |
175 | int ret; | 175 | int ret; |
176 | u8 *p; | 176 | u8 *p; |
177 | |||
177 | ser = tty->disc_data; | 178 | ser = tty->disc_data; |
178 | 179 | ||
179 | /* | 180 | /* |
@@ -221,6 +222,7 @@ static int handle_tx(struct ser_device *ser) | |||
221 | struct tty_struct *tty; | 222 | struct tty_struct *tty; |
222 | struct sk_buff *skb; | 223 | struct sk_buff *skb; |
223 | int tty_wr, len, room; | 224 | int tty_wr, len, room; |
225 | |||
224 | tty = ser->tty; | 226 | tty = ser->tty; |
225 | ser->tx_started = true; | 227 | ser->tx_started = true; |
226 | 228 | ||
@@ -281,6 +283,7 @@ error: | |||
281 | static int caif_xmit(struct sk_buff *skb, struct net_device *dev) | 283 | static int caif_xmit(struct sk_buff *skb, struct net_device *dev) |
282 | { | 284 | { |
283 | struct ser_device *ser; | 285 | struct ser_device *ser; |
286 | |||
284 | BUG_ON(dev == NULL); | 287 | BUG_ON(dev == NULL); |
285 | ser = netdev_priv(dev); | 288 | ser = netdev_priv(dev); |
286 | 289 | ||
@@ -299,6 +302,7 @@ static int caif_xmit(struct sk_buff *skb, struct net_device *dev) | |||
299 | static void ldisc_tx_wakeup(struct tty_struct *tty) | 302 | static void ldisc_tx_wakeup(struct tty_struct *tty) |
300 | { | 303 | { |
301 | struct ser_device *ser; | 304 | struct ser_device *ser; |
305 | |||
302 | ser = tty->disc_data; | 306 | ser = tty->disc_data; |
303 | BUG_ON(ser == NULL); | 307 | BUG_ON(ser == NULL); |
304 | BUG_ON(ser->tty != tty); | 308 | BUG_ON(ser->tty != tty); |
@@ -348,6 +352,7 @@ static void ldisc_close(struct tty_struct *tty) | |||
348 | struct ser_device *ser = tty->disc_data; | 352 | struct ser_device *ser = tty->disc_data; |
349 | /* Remove may be called inside or outside of rtnl_lock */ | 353 | /* Remove may be called inside or outside of rtnl_lock */ |
350 | int islocked = rtnl_is_locked(); | 354 | int islocked = rtnl_is_locked(); |
355 | |||
351 | if (!islocked) | 356 | if (!islocked) |
352 | rtnl_lock(); | 357 | rtnl_lock(); |
353 | /* device is freed automagically by net-sysfs */ | 358 | /* device is freed automagically by net-sysfs */ |
@@ -374,6 +379,7 @@ static struct tty_ldisc_ops caif_ldisc = { | |||
374 | static int register_ldisc(void) | 379 | static int register_ldisc(void) |
375 | { | 380 | { |
376 | int result; | 381 | int result; |
382 | |||
377 | result = tty_register_ldisc(N_CAIF, &caif_ldisc); | 383 | result = tty_register_ldisc(N_CAIF, &caif_ldisc); |
378 | if (result < 0) { | 384 | if (result < 0) { |
379 | pr_err("cannot register CAIF ldisc=%d err=%d\n", N_CAIF, | 385 | pr_err("cannot register CAIF ldisc=%d err=%d\n", N_CAIF, |
@@ -391,6 +397,7 @@ static const struct net_device_ops netdev_ops = { | |||
391 | static void caifdev_setup(struct net_device *dev) | 397 | static void caifdev_setup(struct net_device *dev) |
392 | { | 398 | { |
393 | struct ser_device *serdev = netdev_priv(dev); | 399 | struct ser_device *serdev = netdev_priv(dev); |
400 | |||
394 | dev->features = 0; | 401 | dev->features = 0; |
395 | dev->netdev_ops = &netdev_ops; | 402 | dev->netdev_ops = &netdev_ops; |
396 | dev->type = ARPHRD_CAIF; | 403 | dev->type = ARPHRD_CAIF; |
@@ -410,8 +417,6 @@ static void caifdev_setup(struct net_device *dev) | |||
410 | 417 | ||
411 | static int caif_net_open(struct net_device *dev) | 418 | static int caif_net_open(struct net_device *dev) |
412 | { | 419 | { |
413 | struct ser_device *ser; | ||
414 | ser = netdev_priv(dev); | ||
415 | netif_wake_queue(dev); | 420 | netif_wake_queue(dev); |
416 | return 0; | 421 | return 0; |
417 | } | 422 | } |
@@ -425,6 +430,7 @@ static int caif_net_close(struct net_device *dev) | |||
425 | static int __init caif_ser_init(void) | 430 | static int __init caif_ser_init(void) |
426 | { | 431 | { |
427 | int ret; | 432 | int ret; |
433 | |||
428 | ret = register_ldisc(); | 434 | ret = register_ldisc(); |
429 | debugfsdir = debugfs_create_dir("caif_serial", NULL); | 435 | debugfsdir = debugfs_create_dir("caif_serial", NULL); |
430 | return ret; | 436 | return ret; |
@@ -435,6 +441,7 @@ static void __exit caif_ser_exit(void) | |||
435 | struct ser_device *ser = NULL; | 441 | struct ser_device *ser = NULL; |
436 | struct list_head *node; | 442 | struct list_head *node; |
437 | struct list_head *_tmp; | 443 | struct list_head *_tmp; |
444 | |||
438 | list_for_each_safe(node, _tmp, &ser_list) { | 445 | list_for_each_safe(node, _tmp, &ser_list) { |
439 | ser = list_entry(node, struct ser_device, node); | 446 | ser = list_entry(node, struct ser_device, node); |
440 | dev_close(ser->dev); | 447 | dev_close(ser->dev); |
diff --git a/drivers/net/can/mscan/mscan.h b/drivers/net/can/mscan/mscan.h index 4ff966473bc9..b43e9f5d3268 100644 --- a/drivers/net/can/mscan/mscan.h +++ b/drivers/net/can/mscan/mscan.h | |||
@@ -227,7 +227,7 @@ struct mscan_regs { | |||
227 | u16 time; /* + 0x7c 0x3e */ | 227 | u16 time; /* + 0x7c 0x3e */ |
228 | } tx; | 228 | } tx; |
229 | _MSCAN_RESERVED_(32, 2); /* + 0x7e */ | 229 | _MSCAN_RESERVED_(32, 2); /* + 0x7e */ |
230 | } __attribute__ ((packed)); | 230 | } __packed; |
231 | 231 | ||
232 | #undef _MSCAN_RESERVED_ | 232 | #undef _MSCAN_RESERVED_ |
233 | #define MSCAN_REGION sizeof(struct mscan) | 233 | #define MSCAN_REGION sizeof(struct mscan) |
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c index 1fc0871d2ef7..e75f1a876972 100644 --- a/drivers/net/can/usb/ems_usb.c +++ b/drivers/net/can/usb/ems_usb.c | |||
@@ -197,7 +197,7 @@ struct cpc_can_err_counter { | |||
197 | }; | 197 | }; |
198 | 198 | ||
199 | /* Main message type used between library and application */ | 199 | /* Main message type used between library and application */ |
200 | struct __attribute__ ((packed)) ems_cpc_msg { | 200 | struct __packed ems_cpc_msg { |
201 | u8 type; /* type of message */ | 201 | u8 type; /* type of message */ |
202 | u8 length; /* length of data within union 'msg' */ | 202 | u8 length; /* length of data within union 'msg' */ |
203 | u8 msgid; /* confirmation handle */ | 203 | u8 msgid; /* confirmation handle */ |
diff --git a/drivers/net/chelsio/common.h b/drivers/net/chelsio/common.h index 036b2dfb1d40..092f31a126e6 100644 --- a/drivers/net/chelsio/common.h +++ b/drivers/net/chelsio/common.h | |||
@@ -286,7 +286,6 @@ struct board_info { | |||
286 | unsigned int clock_mc3; | 286 | unsigned int clock_mc3; |
287 | unsigned int clock_mc4; | 287 | unsigned int clock_mc4; |
288 | unsigned int espi_nports; | 288 | unsigned int espi_nports; |
289 | unsigned int clock_cspi; | ||
290 | unsigned int clock_elmer0; | 289 | unsigned int clock_elmer0; |
291 | unsigned char mdio_mdien; | 290 | unsigned char mdio_mdien; |
292 | unsigned char mdio_mdiinv; | 291 | unsigned char mdio_mdiinv; |
diff --git a/drivers/net/chelsio/subr.c b/drivers/net/chelsio/subr.c index 53bde15fc94d..599d178df62d 100644 --- a/drivers/net/chelsio/subr.c +++ b/drivers/net/chelsio/subr.c | |||
@@ -185,9 +185,6 @@ static int t1_pci_intr_handler(adapter_t *adapter) | |||
185 | return 0; | 185 | return 0; |
186 | } | 186 | } |
187 | 187 | ||
188 | #ifdef CONFIG_CHELSIO_T1_COUGAR | ||
189 | #include "cspi.h" | ||
190 | #endif | ||
191 | #ifdef CONFIG_CHELSIO_T1_1G | 188 | #ifdef CONFIG_CHELSIO_T1_1G |
192 | #include "fpga_defs.h" | 189 | #include "fpga_defs.h" |
193 | 190 | ||
@@ -280,7 +277,7 @@ static void mi1_mdio_init(adapter_t *adapter, const struct board_info *bi) | |||
280 | t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_CFG, val); | 277 | t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_CFG, val); |
281 | } | 278 | } |
282 | 279 | ||
283 | #if defined(CONFIG_CHELSIO_T1_1G) || defined(CONFIG_CHELSIO_T1_COUGAR) | 280 | #if defined(CONFIG_CHELSIO_T1_1G) |
284 | /* | 281 | /* |
285 | * Elmer MI1 MDIO read/write operations. | 282 | * Elmer MI1 MDIO read/write operations. |
286 | */ | 283 | */ |
@@ -317,7 +314,7 @@ static int mi1_mdio_write(struct net_device *dev, int phy_addr, int mmd_addr, | |||
317 | return 0; | 314 | return 0; |
318 | } | 315 | } |
319 | 316 | ||
320 | #if defined(CONFIG_CHELSIO_T1_1G) || defined(CONFIG_CHELSIO_T1_COUGAR) | 317 | #if defined(CONFIG_CHELSIO_T1_1G) |
321 | static const struct mdio_ops mi1_mdio_ops = { | 318 | static const struct mdio_ops mi1_mdio_ops = { |
322 | .init = mi1_mdio_init, | 319 | .init = mi1_mdio_init, |
323 | .read = mi1_mdio_read, | 320 | .read = mi1_mdio_read, |
@@ -752,31 +749,6 @@ int t1_elmer0_ext_intr_handler(adapter_t *adapter) | |||
752 | mod_detect ? "removed" : "inserted"); | 749 | mod_detect ? "removed" : "inserted"); |
753 | } | 750 | } |
754 | break; | 751 | break; |
755 | #ifdef CONFIG_CHELSIO_T1_COUGAR | ||
756 | case CHBT_BOARD_COUGAR: | ||
757 | if (adapter->params.nports == 1) { | ||
758 | if (cause & ELMER0_GP_BIT1) { /* Vitesse MAC */ | ||
759 | struct cmac *mac = adapter->port[0].mac; | ||
760 | mac->ops->interrupt_handler(mac); | ||
761 | } | ||
762 | if (cause & ELMER0_GP_BIT5) { /* XPAK MOD_DETECT */ | ||
763 | } | ||
764 | } else { | ||
765 | int i, port_bit; | ||
766 | |||
767 | for_each_port(adapter, i) { | ||
768 | port_bit = i ? i + 1 : 0; | ||
769 | if (!(cause & (1 << port_bit))) | ||
770 | continue; | ||
771 | |||
772 | phy = adapter->port[i].phy; | ||
773 | phy_cause = phy->ops->interrupt_handler(phy); | ||
774 | if (phy_cause & cphy_cause_link_change) | ||
775 | t1_link_changed(adapter, i); | ||
776 | } | ||
777 | } | ||
778 | break; | ||
779 | #endif | ||
780 | } | 752 | } |
781 | t1_tpi_write(adapter, A_ELMER0_INT_CAUSE, cause); | 753 | t1_tpi_write(adapter, A_ELMER0_INT_CAUSE, cause); |
782 | return 0; | 754 | return 0; |
@@ -955,7 +927,6 @@ static int board_init(adapter_t *adapter, const struct board_info *bi) | |||
955 | case CHBT_BOARD_N110: | 927 | case CHBT_BOARD_N110: |
956 | case CHBT_BOARD_N210: | 928 | case CHBT_BOARD_N210: |
957 | case CHBT_BOARD_CHT210: | 929 | case CHBT_BOARD_CHT210: |
958 | case CHBT_BOARD_COUGAR: | ||
959 | t1_tpi_par(adapter, 0xf); | 930 | t1_tpi_par(adapter, 0xf); |
960 | t1_tpi_write(adapter, A_ELMER0_GPO, 0x800); | 931 | t1_tpi_write(adapter, A_ELMER0_GPO, 0x800); |
961 | break; | 932 | break; |
@@ -1004,10 +975,6 @@ int t1_init_hw_modules(adapter_t *adapter) | |||
1004 | adapter->regs + A_MC5_CONFIG); | 975 | adapter->regs + A_MC5_CONFIG); |
1005 | } | 976 | } |
1006 | 977 | ||
1007 | #ifdef CONFIG_CHELSIO_T1_COUGAR | ||
1008 | if (adapter->cspi && t1_cspi_init(adapter->cspi)) | ||
1009 | goto out_err; | ||
1010 | #endif | ||
1011 | if (adapter->espi && t1_espi_init(adapter->espi, bi->chip_mac, | 978 | if (adapter->espi && t1_espi_init(adapter->espi, bi->chip_mac, |
1012 | bi->espi_nports)) | 979 | bi->espi_nports)) |
1013 | goto out_err; | 980 | goto out_err; |
@@ -1061,10 +1028,6 @@ void t1_free_sw_modules(adapter_t *adapter) | |||
1061 | t1_tp_destroy(adapter->tp); | 1028 | t1_tp_destroy(adapter->tp); |
1062 | if (adapter->espi) | 1029 | if (adapter->espi) |
1063 | t1_espi_destroy(adapter->espi); | 1030 | t1_espi_destroy(adapter->espi); |
1064 | #ifdef CONFIG_CHELSIO_T1_COUGAR | ||
1065 | if (adapter->cspi) | ||
1066 | t1_cspi_destroy(adapter->cspi); | ||
1067 | #endif | ||
1068 | } | 1031 | } |
1069 | 1032 | ||
1070 | static void __devinit init_link_config(struct link_config *lc, | 1033 | static void __devinit init_link_config(struct link_config *lc, |
@@ -1084,14 +1047,6 @@ static void __devinit init_link_config(struct link_config *lc, | |||
1084 | } | 1047 | } |
1085 | } | 1048 | } |
1086 | 1049 | ||
1087 | #ifdef CONFIG_CHELSIO_T1_COUGAR | ||
1088 | if (bi->clock_cspi && !(adapter->cspi = t1_cspi_create(adapter))) { | ||
1089 | pr_err("%s: CSPI initialization failed\n", | ||
1090 | adapter->name); | ||
1091 | goto error; | ||
1092 | } | ||
1093 | #endif | ||
1094 | |||
1095 | /* | 1050 | /* |
1096 | * Allocate and initialize the data structures that hold the SW state of | 1051 | * Allocate and initialize the data structures that hold the SW state of |
1097 | * the Terminator HW modules. | 1052 | * the Terminator HW modules. |
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c index fe925663d39a..908d89a4fe86 100644 --- a/drivers/net/cnic.c +++ b/drivers/net/cnic.c | |||
@@ -2824,7 +2824,7 @@ static int cnic_get_v4_route(struct sockaddr_in *dst_addr, | |||
2824 | 2824 | ||
2825 | err = ip_route_output_key(&init_net, &rt, &fl); | 2825 | err = ip_route_output_key(&init_net, &rt, &fl); |
2826 | if (!err) | 2826 | if (!err) |
2827 | *dst = &rt->u.dst; | 2827 | *dst = &rt->dst; |
2828 | return err; | 2828 | return err; |
2829 | #else | 2829 | #else |
2830 | return -ENETUNREACH; | 2830 | return -ENETUNREACH; |
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c index e3f1b8566495..066fd5b09fda 100644 --- a/drivers/net/cxgb3/cxgb3_main.c +++ b/drivers/net/cxgb3/cxgb3_main.c | |||
@@ -2311,15 +2311,9 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr) | |||
2311 | if (copy_from_user(&t, useraddr, sizeof(t))) | 2311 | if (copy_from_user(&t, useraddr, sizeof(t))) |
2312 | return -EFAULT; | 2312 | return -EFAULT; |
2313 | /* Check t.len sanity ? */ | 2313 | /* Check t.len sanity ? */ |
2314 | fw_data = kmalloc(t.len, GFP_KERNEL); | 2314 | fw_data = memdup_user(useraddr + sizeof(t), t.len); |
2315 | if (!fw_data) | 2315 | if (IS_ERR(fw_data)) |
2316 | return -ENOMEM; | 2316 | return PTR_ERR(fw_data); |
2317 | |||
2318 | if (copy_from_user | ||
2319 | (fw_data, useraddr + sizeof(t), t.len)) { | ||
2320 | kfree(fw_data); | ||
2321 | return -EFAULT; | ||
2322 | } | ||
2323 | 2317 | ||
2324 | ret = t3_load_fw(adapter, fw_data, t.len); | 2318 | ret = t3_load_fw(adapter, fw_data, t.len); |
2325 | kfree(fw_data); | 2319 | kfree(fw_data); |
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c index abcc838e18af..4fd6b2b4554b 100644 --- a/drivers/net/dm9000.c +++ b/drivers/net/dm9000.c | |||
@@ -961,7 +961,7 @@ struct dm9000_rxhdr { | |||
961 | u8 RxPktReady; | 961 | u8 RxPktReady; |
962 | u8 RxStatus; | 962 | u8 RxStatus; |
963 | __le16 RxLen; | 963 | __le16 RxLen; |
964 | } __attribute__((__packed__)); | 964 | } __packed; |
965 | 965 | ||
966 | /* | 966 | /* |
967 | * Received a packet and pass to upper layer | 967 | * Received a packet and pass to upper layer |
diff --git a/drivers/net/ehea/ehea_qmr.h b/drivers/net/ehea/ehea_qmr.h index 882c50c9c34f..f608a6c54af5 100644 --- a/drivers/net/ehea/ehea_qmr.h +++ b/drivers/net/ehea/ehea_qmr.h | |||
@@ -126,7 +126,7 @@ struct ehea_swqe { | |||
126 | u8 immediate_data[SWQE2_MAX_IMM]; | 126 | u8 immediate_data[SWQE2_MAX_IMM]; |
127 | /* 0xd0 */ | 127 | /* 0xd0 */ |
128 | struct ehea_vsgentry sg_list[EHEA_MAX_WQE_SG_ENTRIES-1]; | 128 | struct ehea_vsgentry sg_list[EHEA_MAX_WQE_SG_ENTRIES-1]; |
129 | } immdata_desc __attribute__ ((packed)); | 129 | } immdata_desc __packed; |
130 | 130 | ||
131 | /* Send WQE Format 3 */ | 131 | /* Send WQE Format 3 */ |
132 | struct { | 132 | struct { |
diff --git a/drivers/net/enic/vnic_vic.h b/drivers/net/enic/vnic_vic.h index 085c2a274cb1..7e46e5e8600f 100644 --- a/drivers/net/enic/vnic_vic.h +++ b/drivers/net/enic/vnic_vic.h | |||
@@ -44,7 +44,7 @@ struct vic_provinfo { | |||
44 | u16 length; | 44 | u16 length; |
45 | u8 value[0]; | 45 | u8 value[0]; |
46 | } tlv[0]; | 46 | } tlv[0]; |
47 | } __attribute__ ((packed)); | 47 | } __packed; |
48 | 48 | ||
49 | #define VIC_PROVINFO_MAX_DATA 1385 | 49 | #define VIC_PROVINFO_MAX_DATA 1385 |
50 | #define VIC_PROVINFO_MAX_TLV_DATA (VIC_PROVINFO_MAX_DATA - \ | 50 | #define VIC_PROVINFO_MAX_TLV_DATA (VIC_PROVINFO_MAX_DATA - \ |
diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c index 6ed2df14ec84..37ce8aca2cc6 100644 --- a/drivers/net/ethoc.c +++ b/drivers/net/ethoc.c | |||
@@ -180,6 +180,7 @@ MODULE_PARM_DESC(buffer_size, "DMA buffer allocation size"); | |||
180 | * @dty_tx: last buffer actually sent | 180 | * @dty_tx: last buffer actually sent |
181 | * @num_rx: number of receive buffers | 181 | * @num_rx: number of receive buffers |
182 | * @cur_rx: current receive buffer | 182 | * @cur_rx: current receive buffer |
183 | * @vma: pointer to array of virtual memory addresses for buffers | ||
183 | * @netdev: pointer to network device structure | 184 | * @netdev: pointer to network device structure |
184 | * @napi: NAPI structure | 185 | * @napi: NAPI structure |
185 | * @stats: network device statistics | 186 | * @stats: network device statistics |
@@ -203,6 +204,8 @@ struct ethoc { | |||
203 | unsigned int num_rx; | 204 | unsigned int num_rx; |
204 | unsigned int cur_rx; | 205 | unsigned int cur_rx; |
205 | 206 | ||
207 | void** vma; | ||
208 | |||
206 | struct net_device *netdev; | 209 | struct net_device *netdev; |
207 | struct napi_struct napi; | 210 | struct napi_struct napi; |
208 | struct net_device_stats stats; | 211 | struct net_device_stats stats; |
@@ -285,18 +288,22 @@ static inline void ethoc_disable_rx_and_tx(struct ethoc *dev) | |||
285 | ethoc_write(dev, MODER, mode); | 288 | ethoc_write(dev, MODER, mode); |
286 | } | 289 | } |
287 | 290 | ||
288 | static int ethoc_init_ring(struct ethoc *dev) | 291 | static int ethoc_init_ring(struct ethoc *dev, void* mem_start) |
289 | { | 292 | { |
290 | struct ethoc_bd bd; | 293 | struct ethoc_bd bd; |
291 | int i; | 294 | int i; |
295 | void* vma; | ||
292 | 296 | ||
293 | dev->cur_tx = 0; | 297 | dev->cur_tx = 0; |
294 | dev->dty_tx = 0; | 298 | dev->dty_tx = 0; |
295 | dev->cur_rx = 0; | 299 | dev->cur_rx = 0; |
296 | 300 | ||
301 | ethoc_write(dev, TX_BD_NUM, dev->num_tx); | ||
302 | |||
297 | /* setup transmission buffers */ | 303 | /* setup transmission buffers */ |
298 | bd.addr = virt_to_phys(dev->membase); | 304 | bd.addr = mem_start; |
299 | bd.stat = TX_BD_IRQ | TX_BD_CRC; | 305 | bd.stat = TX_BD_IRQ | TX_BD_CRC; |
306 | vma = dev->membase; | ||
300 | 307 | ||
301 | for (i = 0; i < dev->num_tx; i++) { | 308 | for (i = 0; i < dev->num_tx; i++) { |
302 | if (i == dev->num_tx - 1) | 309 | if (i == dev->num_tx - 1) |
@@ -304,6 +311,9 @@ static int ethoc_init_ring(struct ethoc *dev) | |||
304 | 311 | ||
305 | ethoc_write_bd(dev, i, &bd); | 312 | ethoc_write_bd(dev, i, &bd); |
306 | bd.addr += ETHOC_BUFSIZ; | 313 | bd.addr += ETHOC_BUFSIZ; |
314 | |||
315 | dev->vma[i] = vma; | ||
316 | vma += ETHOC_BUFSIZ; | ||
307 | } | 317 | } |
308 | 318 | ||
309 | bd.stat = RX_BD_EMPTY | RX_BD_IRQ; | 319 | bd.stat = RX_BD_EMPTY | RX_BD_IRQ; |
@@ -314,6 +324,9 @@ static int ethoc_init_ring(struct ethoc *dev) | |||
314 | 324 | ||
315 | ethoc_write_bd(dev, dev->num_tx + i, &bd); | 325 | ethoc_write_bd(dev, dev->num_tx + i, &bd); |
316 | bd.addr += ETHOC_BUFSIZ; | 326 | bd.addr += ETHOC_BUFSIZ; |
327 | |||
328 | dev->vma[dev->num_tx + i] = vma; | ||
329 | vma += ETHOC_BUFSIZ; | ||
317 | } | 330 | } |
318 | 331 | ||
319 | return 0; | 332 | return 0; |
@@ -415,7 +428,7 @@ static int ethoc_rx(struct net_device *dev, int limit) | |||
415 | skb = netdev_alloc_skb_ip_align(dev, size); | 428 | skb = netdev_alloc_skb_ip_align(dev, size); |
416 | 429 | ||
417 | if (likely(skb)) { | 430 | if (likely(skb)) { |
418 | void *src = phys_to_virt(bd.addr); | 431 | void *src = priv->vma[entry]; |
419 | memcpy_fromio(skb_put(skb, size), src, size); | 432 | memcpy_fromio(skb_put(skb, size), src, size); |
420 | skb->protocol = eth_type_trans(skb, dev); | 433 | skb->protocol = eth_type_trans(skb, dev); |
421 | priv->stats.rx_packets++; | 434 | priv->stats.rx_packets++; |
@@ -600,8 +613,11 @@ static int ethoc_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val) | |||
600 | 613 | ||
601 | while (time_before(jiffies, timeout)) { | 614 | while (time_before(jiffies, timeout)) { |
602 | u32 stat = ethoc_read(priv, MIISTATUS); | 615 | u32 stat = ethoc_read(priv, MIISTATUS); |
603 | if (!(stat & MIISTATUS_BUSY)) | 616 | if (!(stat & MIISTATUS_BUSY)) { |
617 | /* reset MII command register */ | ||
618 | ethoc_write(priv, MIICOMMAND, 0); | ||
604 | return 0; | 619 | return 0; |
620 | } | ||
605 | 621 | ||
606 | schedule(); | 622 | schedule(); |
607 | } | 623 | } |
@@ -622,21 +638,12 @@ static int ethoc_mdio_probe(struct net_device *dev) | |||
622 | { | 638 | { |
623 | struct ethoc *priv = netdev_priv(dev); | 639 | struct ethoc *priv = netdev_priv(dev); |
624 | struct phy_device *phy; | 640 | struct phy_device *phy; |
625 | int i; | 641 | int err; |
626 | 642 | ||
627 | for (i = 0; i < PHY_MAX_ADDR; i++) { | 643 | if (priv->phy_id != -1) { |
628 | phy = priv->mdio->phy_map[i]; | 644 | phy = priv->mdio->phy_map[priv->phy_id]; |
629 | if (phy) { | 645 | } else { |
630 | if (priv->phy_id != -1) { | 646 | phy = phy_find_first(priv->mdio); |
631 | /* attach to specified PHY */ | ||
632 | if (priv->phy_id == phy->addr) | ||
633 | break; | ||
634 | } else { | ||
635 | /* autoselect PHY if none was specified */ | ||
636 | if (phy->addr != 0) | ||
637 | break; | ||
638 | } | ||
639 | } | ||
640 | } | 647 | } |
641 | 648 | ||
642 | if (!phy) { | 649 | if (!phy) { |
@@ -644,11 +651,11 @@ static int ethoc_mdio_probe(struct net_device *dev) | |||
644 | return -ENXIO; | 651 | return -ENXIO; |
645 | } | 652 | } |
646 | 653 | ||
647 | phy = phy_connect(dev, dev_name(&phy->dev), ethoc_mdio_poll, 0, | 654 | err = phy_connect_direct(dev, phy, ethoc_mdio_poll, 0, |
648 | PHY_INTERFACE_MODE_GMII); | 655 | PHY_INTERFACE_MODE_GMII); |
649 | if (IS_ERR(phy)) { | 656 | if (err) { |
650 | dev_err(&dev->dev, "could not attach to PHY\n"); | 657 | dev_err(&dev->dev, "could not attach to PHY\n"); |
651 | return PTR_ERR(phy); | 658 | return err; |
652 | } | 659 | } |
653 | 660 | ||
654 | priv->phy = phy; | 661 | priv->phy = phy; |
@@ -658,8 +665,6 @@ static int ethoc_mdio_probe(struct net_device *dev) | |||
658 | static int ethoc_open(struct net_device *dev) | 665 | static int ethoc_open(struct net_device *dev) |
659 | { | 666 | { |
660 | struct ethoc *priv = netdev_priv(dev); | 667 | struct ethoc *priv = netdev_priv(dev); |
661 | unsigned int min_tx = 2; | ||
662 | unsigned int num_bd; | ||
663 | int ret; | 668 | int ret; |
664 | 669 | ||
665 | ret = request_irq(dev->irq, ethoc_interrupt, IRQF_SHARED, | 670 | ret = request_irq(dev->irq, ethoc_interrupt, IRQF_SHARED, |
@@ -667,14 +672,7 @@ static int ethoc_open(struct net_device *dev) | |||
667 | if (ret) | 672 | if (ret) |
668 | return ret; | 673 | return ret; |
669 | 674 | ||
670 | /* calculate the number of TX/RX buffers, maximum 128 supported */ | 675 | ethoc_init_ring(priv, (void*)dev->mem_start); |
671 | num_bd = min_t(unsigned int, | ||
672 | 128, (dev->mem_end - dev->mem_start + 1) / ETHOC_BUFSIZ); | ||
673 | priv->num_tx = max(min_tx, num_bd / 4); | ||
674 | priv->num_rx = num_bd - priv->num_tx; | ||
675 | ethoc_write(priv, TX_BD_NUM, priv->num_tx); | ||
676 | |||
677 | ethoc_init_ring(priv); | ||
678 | ethoc_reset(priv); | 676 | ethoc_reset(priv); |
679 | 677 | ||
680 | if (netif_queue_stopped(dev)) { | 678 | if (netif_queue_stopped(dev)) { |
@@ -838,7 +836,7 @@ static netdev_tx_t ethoc_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
838 | else | 836 | else |
839 | bd.stat &= ~TX_BD_PAD; | 837 | bd.stat &= ~TX_BD_PAD; |
840 | 838 | ||
841 | dest = phys_to_virt(bd.addr); | 839 | dest = priv->vma[entry]; |
842 | memcpy_toio(dest, skb->data, skb->len); | 840 | memcpy_toio(dest, skb->data, skb->len); |
843 | 841 | ||
844 | bd.stat &= ~(TX_BD_STATS | TX_BD_LEN_MASK); | 842 | bd.stat &= ~(TX_BD_STATS | TX_BD_LEN_MASK); |
@@ -884,6 +882,7 @@ static int ethoc_probe(struct platform_device *pdev) | |||
884 | struct resource *mem = NULL; | 882 | struct resource *mem = NULL; |
885 | struct ethoc *priv = NULL; | 883 | struct ethoc *priv = NULL; |
886 | unsigned int phy; | 884 | unsigned int phy; |
885 | int num_bd; | ||
887 | int ret = 0; | 886 | int ret = 0; |
888 | 887 | ||
889 | /* allocate networking device */ | 888 | /* allocate networking device */ |
@@ -965,7 +964,7 @@ static int ethoc_probe(struct platform_device *pdev) | |||
965 | } | 964 | } |
966 | } else { | 965 | } else { |
967 | /* Allocate buffer memory */ | 966 | /* Allocate buffer memory */ |
968 | priv->membase = dma_alloc_coherent(NULL, | 967 | priv->membase = dmam_alloc_coherent(&pdev->dev, |
969 | buffer_size, (void *)&netdev->mem_start, | 968 | buffer_size, (void *)&netdev->mem_start, |
970 | GFP_KERNEL); | 969 | GFP_KERNEL); |
971 | if (!priv->membase) { | 970 | if (!priv->membase) { |
@@ -978,6 +977,18 @@ static int ethoc_probe(struct platform_device *pdev) | |||
978 | priv->dma_alloc = buffer_size; | 977 | priv->dma_alloc = buffer_size; |
979 | } | 978 | } |
980 | 979 | ||
980 | /* calculate the number of TX/RX buffers, maximum 128 supported */ | ||
981 | num_bd = min_t(unsigned int, | ||
982 | 128, (netdev->mem_end - netdev->mem_start + 1) / ETHOC_BUFSIZ); | ||
983 | priv->num_tx = max(2, num_bd / 4); | ||
984 | priv->num_rx = num_bd - priv->num_tx; | ||
985 | |||
986 | priv->vma = devm_kzalloc(&pdev->dev, num_bd*sizeof(void*), GFP_KERNEL); | ||
987 | if (!priv->vma) { | ||
988 | ret = -ENOMEM; | ||
989 | goto error; | ||
990 | } | ||
991 | |||
981 | /* Allow the platform setup code to pass in a MAC address. */ | 992 | /* Allow the platform setup code to pass in a MAC address. */ |
982 | if (pdev->dev.platform_data) { | 993 | if (pdev->dev.platform_data) { |
983 | struct ethoc_platform_data *pdata = | 994 | struct ethoc_platform_data *pdata = |
@@ -1063,21 +1074,6 @@ free_mdio: | |||
1063 | kfree(priv->mdio->irq); | 1074 | kfree(priv->mdio->irq); |
1064 | mdiobus_free(priv->mdio); | 1075 | mdiobus_free(priv->mdio); |
1065 | free: | 1076 | free: |
1066 | if (priv) { | ||
1067 | if (priv->dma_alloc) | ||
1068 | dma_free_coherent(NULL, priv->dma_alloc, priv->membase, | ||
1069 | netdev->mem_start); | ||
1070 | else if (priv->membase) | ||
1071 | devm_iounmap(&pdev->dev, priv->membase); | ||
1072 | if (priv->iobase) | ||
1073 | devm_iounmap(&pdev->dev, priv->iobase); | ||
1074 | } | ||
1075 | if (mem) | ||
1076 | devm_release_mem_region(&pdev->dev, mem->start, | ||
1077 | mem->end - mem->start + 1); | ||
1078 | if (mmio) | ||
1079 | devm_release_mem_region(&pdev->dev, mmio->start, | ||
1080 | mmio->end - mmio->start + 1); | ||
1081 | free_netdev(netdev); | 1077 | free_netdev(netdev); |
1082 | out: | 1078 | out: |
1083 | return ret; | 1079 | return ret; |
@@ -1104,17 +1100,6 @@ static int ethoc_remove(struct platform_device *pdev) | |||
1104 | kfree(priv->mdio->irq); | 1100 | kfree(priv->mdio->irq); |
1105 | mdiobus_free(priv->mdio); | 1101 | mdiobus_free(priv->mdio); |
1106 | } | 1102 | } |
1107 | if (priv->dma_alloc) | ||
1108 | dma_free_coherent(NULL, priv->dma_alloc, priv->membase, | ||
1109 | netdev->mem_start); | ||
1110 | else { | ||
1111 | devm_iounmap(&pdev->dev, priv->membase); | ||
1112 | devm_release_mem_region(&pdev->dev, netdev->mem_start, | ||
1113 | netdev->mem_end - netdev->mem_start + 1); | ||
1114 | } | ||
1115 | devm_iounmap(&pdev->dev, priv->iobase); | ||
1116 | devm_release_mem_region(&pdev->dev, netdev->base_addr, | ||
1117 | priv->io_region_size); | ||
1118 | unregister_netdev(netdev); | 1103 | unregister_netdev(netdev); |
1119 | free_netdev(netdev); | 1104 | free_netdev(netdev); |
1120 | } | 1105 | } |
diff --git a/drivers/net/fec.c b/drivers/net/fec.c index edfff92a6d8e..a3cae4ed6ac9 100644 --- a/drivers/net/fec.c +++ b/drivers/net/fec.c | |||
@@ -210,7 +210,7 @@ static void fec_stop(struct net_device *dev); | |||
210 | /* Transmitter timeout */ | 210 | /* Transmitter timeout */ |
211 | #define TX_TIMEOUT (2 * HZ) | 211 | #define TX_TIMEOUT (2 * HZ) |
212 | 212 | ||
213 | static int | 213 | static netdev_tx_t |
214 | fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) | 214 | fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) |
215 | { | 215 | { |
216 | struct fec_enet_private *fep = netdev_priv(dev); | 216 | struct fec_enet_private *fep = netdev_priv(dev); |
@@ -679,30 +679,24 @@ static int fec_enet_mii_probe(struct net_device *dev) | |||
679 | { | 679 | { |
680 | struct fec_enet_private *fep = netdev_priv(dev); | 680 | struct fec_enet_private *fep = netdev_priv(dev); |
681 | struct phy_device *phy_dev = NULL; | 681 | struct phy_device *phy_dev = NULL; |
682 | int phy_addr; | 682 | int ret; |
683 | 683 | ||
684 | fep->phy_dev = NULL; | 684 | fep->phy_dev = NULL; |
685 | 685 | ||
686 | /* find the first phy */ | 686 | /* find the first phy */ |
687 | for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { | 687 | phy_dev = phy_find_first(fep->mii_bus); |
688 | if (fep->mii_bus->phy_map[phy_addr]) { | ||
689 | phy_dev = fep->mii_bus->phy_map[phy_addr]; | ||
690 | break; | ||
691 | } | ||
692 | } | ||
693 | |||
694 | if (!phy_dev) { | 688 | if (!phy_dev) { |
695 | printk(KERN_ERR "%s: no PHY found\n", dev->name); | 689 | printk(KERN_ERR "%s: no PHY found\n", dev->name); |
696 | return -ENODEV; | 690 | return -ENODEV; |
697 | } | 691 | } |
698 | 692 | ||
699 | /* attach the mac to the phy */ | 693 | /* attach the mac to the phy */ |
700 | phy_dev = phy_connect(dev, dev_name(&phy_dev->dev), | 694 | ret = phy_connect_direct(dev, phy_dev, |
701 | &fec_enet_adjust_link, 0, | 695 | &fec_enet_adjust_link, 0, |
702 | PHY_INTERFACE_MODE_MII); | 696 | PHY_INTERFACE_MODE_MII); |
703 | if (IS_ERR(phy_dev)) { | 697 | if (ret) { |
704 | printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); | 698 | printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); |
705 | return PTR_ERR(phy_dev); | 699 | return ret; |
706 | } | 700 | } |
707 | 701 | ||
708 | /* mask with MAC supported features */ | 702 | /* mask with MAC supported features */ |
@@ -1365,6 +1359,8 @@ fec_drv_remove(struct platform_device *pdev) | |||
1365 | return 0; | 1359 | return 0; |
1366 | } | 1360 | } |
1367 | 1361 | ||
1362 | #ifdef CONFIG_PM | ||
1363 | |||
1368 | static int | 1364 | static int |
1369 | fec_suspend(struct platform_device *dev, pm_message_t state) | 1365 | fec_suspend(struct platform_device *dev, pm_message_t state) |
1370 | { | 1366 | { |
@@ -1395,15 +1391,31 @@ fec_resume(struct platform_device *dev) | |||
1395 | return 0; | 1391 | return 0; |
1396 | } | 1392 | } |
1397 | 1393 | ||
1394 | static const struct dev_pm_ops fec_pm_ops = { | ||
1395 | .suspend = fec_suspend, | ||
1396 | .resume = fec_resume, | ||
1397 | .freeze = fec_suspend, | ||
1398 | .thaw = fec_resume, | ||
1399 | .poweroff = fec_suspend, | ||
1400 | .restore = fec_resume, | ||
1401 | }; | ||
1402 | |||
1403 | #define FEC_PM_OPS (&fec_pm_ops) | ||
1404 | |||
1405 | #else /* !CONFIG_PM */ | ||
1406 | |||
1407 | #define FEC_PM_OPS NULL | ||
1408 | |||
1409 | #endif /* !CONFIG_PM */ | ||
1410 | |||
1398 | static struct platform_driver fec_driver = { | 1411 | static struct platform_driver fec_driver = { |
1399 | .driver = { | 1412 | .driver = { |
1400 | .name = "fec", | 1413 | .name = "fec", |
1401 | .owner = THIS_MODULE, | 1414 | .owner = THIS_MODULE, |
1415 | .pm = FEC_PM_OPS, | ||
1402 | }, | 1416 | }, |
1403 | .probe = fec_probe, | 1417 | .probe = fec_probe, |
1404 | .remove = __devexit_p(fec_drv_remove), | 1418 | .remove = __devexit_p(fec_drv_remove), |
1405 | .suspend = fec_suspend, | ||
1406 | .resume = fec_resume, | ||
1407 | }; | 1419 | }; |
1408 | 1420 | ||
1409 | static int __init | 1421 | static int __init |
diff --git a/drivers/net/fec_mpc52xx_phy.c b/drivers/net/fec_mpc52xx_phy.c index 006f64d9f96a..dbaf72cbb233 100644 --- a/drivers/net/fec_mpc52xx_phy.c +++ b/drivers/net/fec_mpc52xx_phy.c | |||
@@ -29,15 +29,14 @@ static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id, | |||
29 | int reg, u32 value) | 29 | int reg, u32 value) |
30 | { | 30 | { |
31 | struct mpc52xx_fec_mdio_priv *priv = bus->priv; | 31 | struct mpc52xx_fec_mdio_priv *priv = bus->priv; |
32 | struct mpc52xx_fec __iomem *fec; | 32 | struct mpc52xx_fec __iomem *fec = priv->regs; |
33 | int tries = 3; | 33 | int tries = 3; |
34 | 34 | ||
35 | value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; | 35 | value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; |
36 | value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; | 36 | value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; |
37 | 37 | ||
38 | fec = priv->regs; | ||
39 | out_be32(&fec->ievent, FEC_IEVENT_MII); | 38 | out_be32(&fec->ievent, FEC_IEVENT_MII); |
40 | out_be32(&priv->regs->mii_data, value); | 39 | out_be32(&fec->mii_data, value); |
41 | 40 | ||
42 | /* wait for it to finish, this takes about 23 us on lite5200b */ | 41 | /* wait for it to finish, this takes about 23 us on lite5200b */ |
43 | while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries) | 42 | while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries) |
@@ -47,7 +46,7 @@ static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id, | |||
47 | return -ETIMEDOUT; | 46 | return -ETIMEDOUT; |
48 | 47 | ||
49 | return value & FEC_MII_DATA_OP_RD ? | 48 | return value & FEC_MII_DATA_OP_RD ? |
50 | in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK : 0; | 49 | in_be32(&fec->mii_data) & FEC_MII_DATA_DATAMSK : 0; |
51 | } | 50 | } |
52 | 51 | ||
53 | static int mpc52xx_fec_mdio_read(struct mii_bus *bus, int phy_id, int reg) | 52 | static int mpc52xx_fec_mdio_read(struct mii_bus *bus, int phy_id, int reg) |
@@ -69,9 +68,8 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of, | |||
69 | struct device_node *np = of->dev.of_node; | 68 | struct device_node *np = of->dev.of_node; |
70 | struct mii_bus *bus; | 69 | struct mii_bus *bus; |
71 | struct mpc52xx_fec_mdio_priv *priv; | 70 | struct mpc52xx_fec_mdio_priv *priv; |
72 | struct resource res = {}; | 71 | struct resource res; |
73 | int err; | 72 | int err; |
74 | int i; | ||
75 | 73 | ||
76 | bus = mdiobus_alloc(); | 74 | bus = mdiobus_alloc(); |
77 | if (bus == NULL) | 75 | if (bus == NULL) |
@@ -93,7 +91,7 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of, | |||
93 | err = of_address_to_resource(np, 0, &res); | 91 | err = of_address_to_resource(np, 0, &res); |
94 | if (err) | 92 | if (err) |
95 | goto out_free; | 93 | goto out_free; |
96 | priv->regs = ioremap(res.start, res.end - res.start + 1); | 94 | priv->regs = ioremap(res.start, resource_size(&res)); |
97 | if (priv->regs == NULL) { | 95 | if (priv->regs == NULL) { |
98 | err = -ENOMEM; | 96 | err = -ENOMEM; |
99 | goto out_free; | 97 | goto out_free; |
@@ -118,10 +116,6 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of, | |||
118 | out_unmap: | 116 | out_unmap: |
119 | iounmap(priv->regs); | 117 | iounmap(priv->regs); |
120 | out_free: | 118 | out_free: |
121 | for (i=0; i<PHY_MAX_ADDR; i++) | ||
122 | if (bus->irq[i] != PHY_POLL) | ||
123 | irq_dispose_mapping(bus->irq[i]); | ||
124 | kfree(bus->irq); | ||
125 | kfree(priv); | 119 | kfree(priv); |
126 | mdiobus_free(bus); | 120 | mdiobus_free(bus); |
127 | 121 | ||
@@ -133,23 +127,16 @@ static int mpc52xx_fec_mdio_remove(struct of_device *of) | |||
133 | struct device *dev = &of->dev; | 127 | struct device *dev = &of->dev; |
134 | struct mii_bus *bus = dev_get_drvdata(dev); | 128 | struct mii_bus *bus = dev_get_drvdata(dev); |
135 | struct mpc52xx_fec_mdio_priv *priv = bus->priv; | 129 | struct mpc52xx_fec_mdio_priv *priv = bus->priv; |
136 | int i; | ||
137 | 130 | ||
138 | mdiobus_unregister(bus); | 131 | mdiobus_unregister(bus); |
139 | dev_set_drvdata(dev, NULL); | 132 | dev_set_drvdata(dev, NULL); |
140 | |||
141 | iounmap(priv->regs); | 133 | iounmap(priv->regs); |
142 | for (i=0; i<PHY_MAX_ADDR; i++) | ||
143 | if (bus->irq[i] != PHY_POLL) | ||
144 | irq_dispose_mapping(bus->irq[i]); | ||
145 | kfree(priv); | 134 | kfree(priv); |
146 | kfree(bus->irq); | ||
147 | mdiobus_free(bus); | 135 | mdiobus_free(bus); |
148 | 136 | ||
149 | return 0; | 137 | return 0; |
150 | } | 138 | } |
151 | 139 | ||
152 | |||
153 | static struct of_device_id mpc52xx_fec_mdio_match[] = { | 140 | static struct of_device_id mpc52xx_fec_mdio_match[] = { |
154 | { .compatible = "fsl,mpc5200b-mdio", }, | 141 | { .compatible = "fsl,mpc5200b-mdio", }, |
155 | { .compatible = "fsl,mpc5200-mdio", }, | 142 | { .compatible = "fsl,mpc5200-mdio", }, |
@@ -171,5 +158,4 @@ struct of_platform_driver mpc52xx_fec_mdio_driver = { | |||
171 | /* let fec driver call it, since this has to be registered before it */ | 158 | /* let fec driver call it, since this has to be registered before it */ |
172 | EXPORT_SYMBOL_GPL(mpc52xx_fec_mdio_driver); | 159 | EXPORT_SYMBOL_GPL(mpc52xx_fec_mdio_driver); |
173 | 160 | ||
174 | |||
175 | MODULE_LICENSE("Dual BSD/GPL"); | 161 | MODULE_LICENSE("Dual BSD/GPL"); |
diff --git a/drivers/net/fsl_pq_mdio.h b/drivers/net/fsl_pq_mdio.h index 1f7d865cedb6..bd17a2a0139b 100644 --- a/drivers/net/fsl_pq_mdio.h +++ b/drivers/net/fsl_pq_mdio.h | |||
@@ -39,7 +39,7 @@ struct fsl_pq_mdio { | |||
39 | u8 reserved[28]; /* Space holder */ | 39 | u8 reserved[28]; /* Space holder */ |
40 | u32 utbipar; /* TBI phy address reg (only on UCC) */ | 40 | u32 utbipar; /* TBI phy address reg (only on UCC) */ |
41 | u8 res4[2728]; | 41 | u8 res4[2728]; |
42 | } __attribute__ ((packed)); | 42 | } __packed; |
43 | 43 | ||
44 | int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum); | 44 | int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum); |
45 | int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value); | 45 | int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value); |
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c index 46c69cd06553..8a17bf096ff6 100644 --- a/drivers/net/gianfar.c +++ b/drivers/net/gianfar.c | |||
@@ -681,8 +681,8 @@ static int gfar_of_init(struct of_device *ofdev, struct net_device **pdev) | |||
681 | priv->rx_queue[i] = NULL; | 681 | priv->rx_queue[i] = NULL; |
682 | 682 | ||
683 | for (i = 0; i < priv->num_tx_queues; i++) { | 683 | for (i = 0; i < priv->num_tx_queues; i++) { |
684 | priv->tx_queue[i] = (struct gfar_priv_tx_q *)kzalloc( | 684 | priv->tx_queue[i] = kzalloc(sizeof(struct gfar_priv_tx_q), |
685 | sizeof (struct gfar_priv_tx_q), GFP_KERNEL); | 685 | GFP_KERNEL); |
686 | if (!priv->tx_queue[i]) { | 686 | if (!priv->tx_queue[i]) { |
687 | err = -ENOMEM; | 687 | err = -ENOMEM; |
688 | goto tx_alloc_failed; | 688 | goto tx_alloc_failed; |
@@ -694,8 +694,8 @@ static int gfar_of_init(struct of_device *ofdev, struct net_device **pdev) | |||
694 | } | 694 | } |
695 | 695 | ||
696 | for (i = 0; i < priv->num_rx_queues; i++) { | 696 | for (i = 0; i < priv->num_rx_queues; i++) { |
697 | priv->rx_queue[i] = (struct gfar_priv_rx_q *)kzalloc( | 697 | priv->rx_queue[i] = kzalloc(sizeof(struct gfar_priv_rx_q), |
698 | sizeof (struct gfar_priv_rx_q), GFP_KERNEL); | 698 | GFP_KERNEL); |
699 | if (!priv->rx_queue[i]) { | 699 | if (!priv->rx_queue[i]) { |
700 | err = -ENOMEM; | 700 | err = -ENOMEM; |
701 | goto rx_alloc_failed; | 701 | goto rx_alloc_failed; |
diff --git a/drivers/net/greth.c b/drivers/net/greth.c index 3a029d02c2b4..4d09eab3548e 100644 --- a/drivers/net/greth.c +++ b/drivers/net/greth.c | |||
@@ -1555,7 +1555,6 @@ static int __devinit greth_of_probe(struct of_device *ofdev, const struct of_dev | |||
1555 | } | 1555 | } |
1556 | 1556 | ||
1557 | /* setup NAPI */ | 1557 | /* setup NAPI */ |
1558 | memset(&greth->napi, 0, sizeof(greth->napi)); | ||
1559 | netif_napi_add(dev, &greth->napi, greth_poll, 64); | 1558 | netif_napi_add(dev, &greth->napi, greth_poll, 64); |
1560 | 1559 | ||
1561 | return 0; | 1560 | return 0; |
diff --git a/drivers/net/irda/donauboe.h b/drivers/net/irda/donauboe.h index 0dbd1932b72f..36c3060411d2 100644 --- a/drivers/net/irda/donauboe.h +++ b/drivers/net/irda/donauboe.h | |||
@@ -273,7 +273,7 @@ struct OboeSlot | |||
273 | __u8 control; /*Slot control/status see below */ | 273 | __u8 control; /*Slot control/status see below */ |
274 | __u32 address; /*Slot buffer address */ | 274 | __u32 address; /*Slot buffer address */ |
275 | } | 275 | } |
276 | __attribute__ ((packed)); | 276 | __packed; |
277 | 277 | ||
278 | #define OBOE_NTASKS OBOE_TXRING_OFFSET_IN_SLOTS | 278 | #define OBOE_NTASKS OBOE_TXRING_OFFSET_IN_SLOTS |
279 | 279 | ||
diff --git a/drivers/net/irda/irda-usb.h b/drivers/net/irda/irda-usb.h index ac0443d52e50..58ddb5214916 100644 --- a/drivers/net/irda/irda-usb.h +++ b/drivers/net/irda/irda-usb.h | |||
@@ -125,7 +125,7 @@ struct irda_class_desc { | |||
125 | __u8 bmAdditionalBOFs; | 125 | __u8 bmAdditionalBOFs; |
126 | __u8 bIrdaRateSniff; | 126 | __u8 bIrdaRateSniff; |
127 | __u8 bMaxUnicastList; | 127 | __u8 bMaxUnicastList; |
128 | } __attribute__ ((packed)); | 128 | } __packed; |
129 | 129 | ||
130 | /* class specific interface request to get the IrDA-USB class descriptor | 130 | /* class specific interface request to get the IrDA-USB class descriptor |
131 | * (6.2.5, USB-IrDA class spec 1.0) */ | 131 | * (6.2.5, USB-IrDA class spec 1.0) */ |
diff --git a/drivers/net/irda/ks959-sir.c b/drivers/net/irda/ks959-sir.c index b54d3b48045e..1046014dd6c2 100644 --- a/drivers/net/irda/ks959-sir.c +++ b/drivers/net/irda/ks959-sir.c | |||
@@ -154,7 +154,7 @@ struct ks959_speedparams { | |||
154 | __le32 baudrate; /* baud rate, little endian */ | 154 | __le32 baudrate; /* baud rate, little endian */ |
155 | __u8 flags; | 155 | __u8 flags; |
156 | __u8 reserved[3]; | 156 | __u8 reserved[3]; |
157 | } __attribute__ ((packed)); | 157 | } __packed; |
158 | 158 | ||
159 | #define KS_DATA_5_BITS 0x00 | 159 | #define KS_DATA_5_BITS 0x00 |
160 | #define KS_DATA_6_BITS 0x01 | 160 | #define KS_DATA_6_BITS 0x01 |
diff --git a/drivers/net/irda/ksdazzle-sir.c b/drivers/net/irda/ksdazzle-sir.c index 8d713ebac15b..9cc142fcc712 100644 --- a/drivers/net/irda/ksdazzle-sir.c +++ b/drivers/net/irda/ksdazzle-sir.c | |||
@@ -117,7 +117,7 @@ struct ksdazzle_speedparams { | |||
117 | __le32 baudrate; /* baud rate, little endian */ | 117 | __le32 baudrate; /* baud rate, little endian */ |
118 | __u8 flags; | 118 | __u8 flags; |
119 | __u8 reserved[3]; | 119 | __u8 reserved[3]; |
120 | } __attribute__ ((packed)); | 120 | } __packed; |
121 | 121 | ||
122 | #define KS_DATA_5_BITS 0x00 | 122 | #define KS_DATA_5_BITS 0x00 |
123 | #define KS_DATA_6_BITS 0x01 | 123 | #define KS_DATA_6_BITS 0x01 |
diff --git a/drivers/net/irda/vlsi_ir.h b/drivers/net/irda/vlsi_ir.h index 3050d1a0cccf..3f24a1f33022 100644 --- a/drivers/net/irda/vlsi_ir.h +++ b/drivers/net/irda/vlsi_ir.h | |||
@@ -544,9 +544,9 @@ struct ring_descr_hw { | |||
544 | struct { | 544 | struct { |
545 | u8 addr_res[3]; | 545 | u8 addr_res[3]; |
546 | volatile u8 status; /* descriptor status */ | 546 | volatile u8 status; /* descriptor status */ |
547 | } __attribute__((packed)) rd_s; | 547 | } __packed rd_s; |
548 | } __attribute((packed)) rd_u; | 548 | } __packed rd_u; |
549 | } __attribute__ ((packed)); | 549 | } __packed; |
550 | 550 | ||
551 | #define rd_addr rd_u.addr | 551 | #define rd_addr rd_u.addr |
552 | #define rd_status rd_u.rd_s.status | 552 | #define rd_status rd_u.rd_s.status |
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h index ffae480587ae..9270089eb282 100644 --- a/drivers/net/ixgbe/ixgbe.h +++ b/drivers/net/ixgbe/ixgbe.h | |||
@@ -44,11 +44,9 @@ | |||
44 | #include <linux/dca.h> | 44 | #include <linux/dca.h> |
45 | #endif | 45 | #endif |
46 | 46 | ||
47 | #define PFX "ixgbe: " | 47 | /* common prefix used by pr_<> macros */ |
48 | #define DPRINTK(nlevel, klevel, fmt, args...) \ | 48 | #undef pr_fmt |
49 | ((void)((NETIF_MSG_##nlevel & adapter->msg_enable) && \ | 49 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
50 | printk(KERN_##klevel PFX "%s: %s: " fmt, adapter->netdev->name, \ | ||
51 | __func__ , ## args))) | ||
52 | 50 | ||
53 | /* TX/RX descriptor defines */ | 51 | /* TX/RX descriptor defines */ |
54 | #define IXGBE_DEFAULT_TXD 512 | 52 | #define IXGBE_DEFAULT_TXD 512 |
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c index a4e2901f2f08..976fd9e146c6 100644 --- a/drivers/net/ixgbe/ixgbe_82599.c +++ b/drivers/net/ixgbe/ixgbe_82599.c | |||
@@ -707,9 +707,8 @@ static s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw, | |||
707 | 707 | ||
708 | out: | 708 | out: |
709 | if (link_up && (link_speed == IXGBE_LINK_SPEED_1GB_FULL)) | 709 | if (link_up && (link_speed == IXGBE_LINK_SPEED_1GB_FULL)) |
710 | netif_info(adapter, hw, adapter->netdev, "Smartspeed has" | 710 | e_info("Smartspeed has downgraded the link speed from " |
711 | " downgraded the link speed from the maximum" | 711 | "the maximum advertised\n"); |
712 | " advertised\n"); | ||
713 | return status; | 712 | return status; |
714 | } | 713 | } |
715 | 714 | ||
diff --git a/drivers/net/ixgbe/ixgbe_common.h b/drivers/net/ixgbe/ixgbe_common.h index 3080afb12bdf..d5d3aae8524b 100644 --- a/drivers/net/ixgbe/ixgbe_common.h +++ b/drivers/net/ixgbe/ixgbe_common.h | |||
@@ -105,12 +105,26 @@ s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); | |||
105 | 105 | ||
106 | #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) | 106 | #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) |
107 | 107 | ||
108 | #ifdef DEBUG | 108 | extern struct net_device *ixgbe_get_hw_dev(struct ixgbe_hw *hw); |
109 | extern char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw); | ||
110 | #define hw_dbg(hw, format, arg...) \ | 109 | #define hw_dbg(hw, format, arg...) \ |
111 | printk(KERN_DEBUG "%s: " format, ixgbe_get_hw_dev_name(hw), ##arg) | 110 | netdev_dbg(ixgbe_get_hw_dev(hw), format, ##arg) |
112 | #else | 111 | #define e_err(format, arg...) \ |
113 | #define hw_dbg(hw, format, arg...) do {} while (0) | 112 | netdev_err(adapter->netdev, format, ## arg) |
114 | #endif | 113 | #define e_info(format, arg...) \ |
114 | netdev_info(adapter->netdev, format, ## arg) | ||
115 | #define e_warn(format, arg...) \ | ||
116 | netdev_warn(adapter->netdev, format, ## arg) | ||
117 | #define e_notice(format, arg...) \ | ||
118 | netdev_notice(adapter->netdev, format, ## arg) | ||
119 | #define e_crit(format, arg...) \ | ||
120 | netdev_crit(adapter->netdev, format, ## arg) | ||
121 | #define e_dev_info(format, arg...) \ | ||
122 | dev_info(&adapter->pdev->dev, format, ## arg) | ||
123 | #define e_dev_warn(format, arg...) \ | ||
124 | dev_warn(&adapter->pdev->dev, format, ## arg) | ||
125 | #define e_dev_err(format, arg...) \ | ||
126 | dev_err(&adapter->pdev->dev, format, ## arg) | ||
127 | #define e_dev_notice(format, arg...) \ | ||
128 | dev_notice(&adapter->pdev->dev, format, ## arg) | ||
115 | 129 | ||
116 | #endif /* IXGBE_COMMON */ | 130 | #endif /* IXGBE_COMMON */ |
diff --git a/drivers/net/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ixgbe/ixgbe_dcb_nl.c index 71da325dfa80..657623589d53 100644 --- a/drivers/net/ixgbe/ixgbe_dcb_nl.c +++ b/drivers/net/ixgbe/ixgbe_dcb_nl.c | |||
@@ -121,7 +121,7 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) | |||
121 | goto out; | 121 | goto out; |
122 | 122 | ||
123 | if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { | 123 | if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { |
124 | DPRINTK(DRV, ERR, "Enable failed, needs MSI-X\n"); | 124 | e_err("Enable failed, needs MSI-X\n"); |
125 | err = 1; | 125 | err = 1; |
126 | goto out; | 126 | goto out; |
127 | } | 127 | } |
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c index c50a7541ffec..644e3d21b751 100644 --- a/drivers/net/ixgbe/ixgbe_ethtool.c +++ b/drivers/net/ixgbe/ixgbe_ethtool.c | |||
@@ -294,8 +294,7 @@ static int ixgbe_set_settings(struct net_device *netdev, | |||
294 | hw->mac.autotry_restart = true; | 294 | hw->mac.autotry_restart = true; |
295 | err = hw->mac.ops.setup_link(hw, advertised, true, true); | 295 | err = hw->mac.ops.setup_link(hw, advertised, true, true); |
296 | if (err) { | 296 | if (err) { |
297 | DPRINTK(PROBE, INFO, | 297 | e_info("setup link failed with code %d\n", err); |
298 | "setup link failed with code %d\n", err); | ||
299 | hw->mac.ops.setup_link(hw, old, true, true); | 298 | hw->mac.ops.setup_link(hw, old, true, true); |
300 | } | 299 | } |
301 | } else { | 300 | } else { |
@@ -1188,9 +1187,9 @@ static struct ixgbe_reg_test reg_test_82598[] = { | |||
1188 | writel((_test[pat] & W), (adapter->hw.hw_addr + R)); \ | 1187 | writel((_test[pat] & W), (adapter->hw.hw_addr + R)); \ |
1189 | val = readl(adapter->hw.hw_addr + R); \ | 1188 | val = readl(adapter->hw.hw_addr + R); \ |
1190 | if (val != (_test[pat] & W & M)) { \ | 1189 | if (val != (_test[pat] & W & M)) { \ |
1191 | DPRINTK(DRV, ERR, "pattern test reg %04X failed: got "\ | 1190 | e_err("pattern test reg %04X failed: got " \ |
1192 | "0x%08X expected 0x%08X\n", \ | 1191 | "0x%08X expected 0x%08X\n", \ |
1193 | R, val, (_test[pat] & W & M)); \ | 1192 | R, val, (_test[pat] & W & M)); \ |
1194 | *data = R; \ | 1193 | *data = R; \ |
1195 | writel(before, adapter->hw.hw_addr + R); \ | 1194 | writel(before, adapter->hw.hw_addr + R); \ |
1196 | return 1; \ | 1195 | return 1; \ |
@@ -1206,8 +1205,8 @@ static struct ixgbe_reg_test reg_test_82598[] = { | |||
1206 | writel((W & M), (adapter->hw.hw_addr + R)); \ | 1205 | writel((W & M), (adapter->hw.hw_addr + R)); \ |
1207 | val = readl(adapter->hw.hw_addr + R); \ | 1206 | val = readl(adapter->hw.hw_addr + R); \ |
1208 | if ((W & M) != (val & M)) { \ | 1207 | if ((W & M) != (val & M)) { \ |
1209 | DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\ | 1208 | e_err("set/check reg %04X test failed: got 0x%08X " \ |
1210 | "expected 0x%08X\n", R, (val & M), (W & M)); \ | 1209 | "expected 0x%08X\n", R, (val & M), (W & M)); \ |
1211 | *data = R; \ | 1210 | *data = R; \ |
1212 | writel(before, (adapter->hw.hw_addr + R)); \ | 1211 | writel(before, (adapter->hw.hw_addr + R)); \ |
1213 | return 1; \ | 1212 | return 1; \ |
@@ -1240,8 +1239,8 @@ static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) | |||
1240 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle); | 1239 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle); |
1241 | after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle; | 1240 | after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle; |
1242 | if (value != after) { | 1241 | if (value != after) { |
1243 | DPRINTK(DRV, ERR, "failed STATUS register test got: " | 1242 | e_err("failed STATUS register test got: 0x%08X expected: " |
1244 | "0x%08X expected: 0x%08X\n", after, value); | 1243 | "0x%08X\n", after, value); |
1245 | *data = 1; | 1244 | *data = 1; |
1246 | return 1; | 1245 | return 1; |
1247 | } | 1246 | } |
@@ -1341,8 +1340,8 @@ static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) | |||
1341 | *data = 1; | 1340 | *data = 1; |
1342 | return -1; | 1341 | return -1; |
1343 | } | 1342 | } |
1344 | DPRINTK(HW, INFO, "testing %s interrupt\n", | 1343 | e_info("testing %s interrupt\n", shared_int ? |
1345 | (shared_int ? "shared" : "unshared")); | 1344 | "shared" : "unshared"); |
1346 | 1345 | ||
1347 | /* Disable all the interrupts */ | 1346 | /* Disable all the interrupts */ |
1348 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); | 1347 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); |
@@ -1847,7 +1846,7 @@ static void ixgbe_diag_test(struct net_device *netdev, | |||
1847 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { | 1846 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { |
1848 | /* Offline tests */ | 1847 | /* Offline tests */ |
1849 | 1848 | ||
1850 | DPRINTK(HW, INFO, "offline testing starting\n"); | 1849 | e_info("offline testing starting\n"); |
1851 | 1850 | ||
1852 | /* Link test performed before hardware reset so autoneg doesn't | 1851 | /* Link test performed before hardware reset so autoneg doesn't |
1853 | * interfere with test result */ | 1852 | * interfere with test result */ |
@@ -1880,17 +1879,17 @@ static void ixgbe_diag_test(struct net_device *netdev, | |||
1880 | else | 1879 | else |
1881 | ixgbe_reset(adapter); | 1880 | ixgbe_reset(adapter); |
1882 | 1881 | ||
1883 | DPRINTK(HW, INFO, "register testing starting\n"); | 1882 | e_info("register testing starting\n"); |
1884 | if (ixgbe_reg_test(adapter, &data[0])) | 1883 | if (ixgbe_reg_test(adapter, &data[0])) |
1885 | eth_test->flags |= ETH_TEST_FL_FAILED; | 1884 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1886 | 1885 | ||
1887 | ixgbe_reset(adapter); | 1886 | ixgbe_reset(adapter); |
1888 | DPRINTK(HW, INFO, "eeprom testing starting\n"); | 1887 | e_info("eeprom testing starting\n"); |
1889 | if (ixgbe_eeprom_test(adapter, &data[1])) | 1888 | if (ixgbe_eeprom_test(adapter, &data[1])) |
1890 | eth_test->flags |= ETH_TEST_FL_FAILED; | 1889 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1891 | 1890 | ||
1892 | ixgbe_reset(adapter); | 1891 | ixgbe_reset(adapter); |
1893 | DPRINTK(HW, INFO, "interrupt testing starting\n"); | 1892 | e_info("interrupt testing starting\n"); |
1894 | if (ixgbe_intr_test(adapter, &data[2])) | 1893 | if (ixgbe_intr_test(adapter, &data[2])) |
1895 | eth_test->flags |= ETH_TEST_FL_FAILED; | 1894 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1896 | 1895 | ||
@@ -1898,14 +1897,13 @@ static void ixgbe_diag_test(struct net_device *netdev, | |||
1898 | * loopback diagnostic. */ | 1897 | * loopback diagnostic. */ |
1899 | if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED | | 1898 | if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED | |
1900 | IXGBE_FLAG_VMDQ_ENABLED)) { | 1899 | IXGBE_FLAG_VMDQ_ENABLED)) { |
1901 | DPRINTK(HW, INFO, "Skip MAC loopback diagnostic in VT " | 1900 | e_info("Skip MAC loopback diagnostic in VT mode\n"); |
1902 | "mode\n"); | ||
1903 | data[3] = 0; | 1901 | data[3] = 0; |
1904 | goto skip_loopback; | 1902 | goto skip_loopback; |
1905 | } | 1903 | } |
1906 | 1904 | ||
1907 | ixgbe_reset(adapter); | 1905 | ixgbe_reset(adapter); |
1908 | DPRINTK(HW, INFO, "loopback testing starting\n"); | 1906 | e_info("loopback testing starting\n"); |
1909 | if (ixgbe_loopback_test(adapter, &data[3])) | 1907 | if (ixgbe_loopback_test(adapter, &data[3])) |
1910 | eth_test->flags |= ETH_TEST_FL_FAILED; | 1908 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1911 | 1909 | ||
@@ -1916,7 +1914,7 @@ skip_loopback: | |||
1916 | if (if_running) | 1914 | if (if_running) |
1917 | dev_open(netdev); | 1915 | dev_open(netdev); |
1918 | } else { | 1916 | } else { |
1919 | DPRINTK(HW, INFO, "online testing starting\n"); | 1917 | e_info("online testing starting\n"); |
1920 | /* Online tests */ | 1918 | /* Online tests */ |
1921 | if (ixgbe_link_test(adapter, &data[4])) | 1919 | if (ixgbe_link_test(adapter, &data[4])) |
1922 | eth_test->flags |= ETH_TEST_FL_FAILED; | 1920 | eth_test->flags |= ETH_TEST_FL_FAILED; |
@@ -2089,8 +2087,8 @@ static bool ixgbe_reenable_rsc(struct ixgbe_adapter *adapter, | |||
2089 | (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)) { | 2087 | (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)) { |
2090 | adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; | 2088 | adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; |
2091 | adapter->netdev->features |= NETIF_F_LRO; | 2089 | adapter->netdev->features |= NETIF_F_LRO; |
2092 | DPRINTK(PROBE, INFO, "rx-usecs set to %d, re-enabling RSC\n", | 2090 | e_info("rx-usecs set to %d, re-enabling RSC\n", |
2093 | ec->rx_coalesce_usecs); | 2091 | ec->rx_coalesce_usecs); |
2094 | return true; | 2092 | return true; |
2095 | } | 2093 | } |
2096 | return false; | 2094 | return false; |
@@ -2158,8 +2156,7 @@ static int ixgbe_set_coalesce(struct net_device *netdev, | |||
2158 | if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { | 2156 | if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { |
2159 | adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; | 2157 | adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; |
2160 | netdev->features &= ~NETIF_F_LRO; | 2158 | netdev->features &= ~NETIF_F_LRO; |
2161 | DPRINTK(PROBE, INFO, | 2159 | e_info("rx-usecs set to 0, disabling RSC\n"); |
2162 | "rx-usecs set to 0, disabling RSC\n"); | ||
2163 | 2160 | ||
2164 | need_reset = true; | 2161 | need_reset = true; |
2165 | } | 2162 | } |
diff --git a/drivers/net/ixgbe/ixgbe_fcoe.c b/drivers/net/ixgbe/ixgbe_fcoe.c index 45182ab41d6b..84e1194e0833 100644 --- a/drivers/net/ixgbe/ixgbe_fcoe.c +++ b/drivers/net/ixgbe/ixgbe_fcoe.c | |||
@@ -25,7 +25,6 @@ | |||
25 | 25 | ||
26 | *******************************************************************************/ | 26 | *******************************************************************************/ |
27 | 27 | ||
28 | |||
29 | #include "ixgbe.h" | 28 | #include "ixgbe.h" |
30 | #ifdef CONFIG_IXGBE_DCB | 29 | #ifdef CONFIG_IXGBE_DCB |
31 | #include "ixgbe_dcb_82599.h" | 30 | #include "ixgbe_dcb_82599.h" |
@@ -165,20 +164,20 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid, | |||
165 | 164 | ||
166 | adapter = netdev_priv(netdev); | 165 | adapter = netdev_priv(netdev); |
167 | if (xid >= IXGBE_FCOE_DDP_MAX) { | 166 | if (xid >= IXGBE_FCOE_DDP_MAX) { |
168 | DPRINTK(DRV, WARNING, "xid=0x%x out-of-range\n", xid); | 167 | e_warn("xid=0x%x out-of-range\n", xid); |
169 | return 0; | 168 | return 0; |
170 | } | 169 | } |
171 | 170 | ||
172 | fcoe = &adapter->fcoe; | 171 | fcoe = &adapter->fcoe; |
173 | if (!fcoe->pool) { | 172 | if (!fcoe->pool) { |
174 | DPRINTK(DRV, WARNING, "xid=0x%x no ddp pool for fcoe\n", xid); | 173 | e_warn("xid=0x%x no ddp pool for fcoe\n", xid); |
175 | return 0; | 174 | return 0; |
176 | } | 175 | } |
177 | 176 | ||
178 | ddp = &fcoe->ddp[xid]; | 177 | ddp = &fcoe->ddp[xid]; |
179 | if (ddp->sgl) { | 178 | if (ddp->sgl) { |
180 | DPRINTK(DRV, ERR, "xid 0x%x w/ non-null sgl=%p nents=%d\n", | 179 | e_err("xid 0x%x w/ non-null sgl=%p nents=%d\n", |
181 | xid, ddp->sgl, ddp->sgc); | 180 | xid, ddp->sgl, ddp->sgc); |
182 | return 0; | 181 | return 0; |
183 | } | 182 | } |
184 | ixgbe_fcoe_clear_ddp(ddp); | 183 | ixgbe_fcoe_clear_ddp(ddp); |
@@ -186,14 +185,14 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid, | |||
186 | /* setup dma from scsi command sgl */ | 185 | /* setup dma from scsi command sgl */ |
187 | dmacount = pci_map_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE); | 186 | dmacount = pci_map_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE); |
188 | if (dmacount == 0) { | 187 | if (dmacount == 0) { |
189 | DPRINTK(DRV, ERR, "xid 0x%x DMA map error\n", xid); | 188 | e_err("xid 0x%x DMA map error\n", xid); |
190 | return 0; | 189 | return 0; |
191 | } | 190 | } |
192 | 191 | ||
193 | /* alloc the udl from our ddp pool */ | 192 | /* alloc the udl from our ddp pool */ |
194 | ddp->udl = pci_pool_alloc(fcoe->pool, GFP_KERNEL, &ddp->udp); | 193 | ddp->udl = pci_pool_alloc(fcoe->pool, GFP_KERNEL, &ddp->udp); |
195 | if (!ddp->udl) { | 194 | if (!ddp->udl) { |
196 | DPRINTK(DRV, ERR, "failed allocated ddp context\n"); | 195 | e_err("failed allocated ddp context\n"); |
197 | goto out_noddp_unmap; | 196 | goto out_noddp_unmap; |
198 | } | 197 | } |
199 | ddp->sgl = sgl; | 198 | ddp->sgl = sgl; |
@@ -206,10 +205,9 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid, | |||
206 | while (len) { | 205 | while (len) { |
207 | /* max number of buffers allowed in one DDP context */ | 206 | /* max number of buffers allowed in one DDP context */ |
208 | if (j >= IXGBE_BUFFCNT_MAX) { | 207 | if (j >= IXGBE_BUFFCNT_MAX) { |
209 | netif_err(adapter, drv, adapter->netdev, | 208 | e_err("xid=%x:%d,%d,%d:addr=%llx " |
210 | "xid=%x:%d,%d,%d:addr=%llx " | 209 | "not enough descriptors\n", |
211 | "not enough descriptors\n", | 210 | xid, i, j, dmacount, (u64)addr); |
212 | xid, i, j, dmacount, (u64)addr); | ||
213 | goto out_noddp_free; | 211 | goto out_noddp_free; |
214 | } | 212 | } |
215 | 213 | ||
@@ -387,8 +385,8 @@ int ixgbe_fso(struct ixgbe_adapter *adapter, | |||
387 | struct fc_frame_header *fh; | 385 | struct fc_frame_header *fh; |
388 | 386 | ||
389 | if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_type != SKB_GSO_FCOE)) { | 387 | if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_type != SKB_GSO_FCOE)) { |
390 | DPRINTK(DRV, ERR, "Wrong gso type %d:expecting SKB_GSO_FCOE\n", | 388 | e_err("Wrong gso type %d:expecting SKB_GSO_FCOE\n", |
391 | skb_shinfo(skb)->gso_type); | 389 | skb_shinfo(skb)->gso_type); |
392 | return -EINVAL; | 390 | return -EINVAL; |
393 | } | 391 | } |
394 | 392 | ||
@@ -414,7 +412,7 @@ int ixgbe_fso(struct ixgbe_adapter *adapter, | |||
414 | fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF; | 412 | fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF; |
415 | break; | 413 | break; |
416 | default: | 414 | default: |
417 | DPRINTK(DRV, WARNING, "unknown sof = 0x%x\n", sof); | 415 | e_warn("unknown sof = 0x%x\n", sof); |
418 | return -EINVAL; | 416 | return -EINVAL; |
419 | } | 417 | } |
420 | 418 | ||
@@ -441,7 +439,7 @@ int ixgbe_fso(struct ixgbe_adapter *adapter, | |||
441 | fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A; | 439 | fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A; |
442 | break; | 440 | break; |
443 | default: | 441 | default: |
444 | DPRINTK(DRV, WARNING, "unknown eof = 0x%x\n", eof); | 442 | e_warn("unknown eof = 0x%x\n", eof); |
445 | return -EINVAL; | 443 | return -EINVAL; |
446 | } | 444 | } |
447 | 445 | ||
@@ -517,8 +515,7 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter) | |||
517 | adapter->pdev, IXGBE_FCPTR_MAX, | 515 | adapter->pdev, IXGBE_FCPTR_MAX, |
518 | IXGBE_FCPTR_ALIGN, PAGE_SIZE); | 516 | IXGBE_FCPTR_ALIGN, PAGE_SIZE); |
519 | if (!fcoe->pool) | 517 | if (!fcoe->pool) |
520 | DPRINTK(DRV, ERR, | 518 | e_err("failed to allocated FCoE DDP pool\n"); |
521 | "failed to allocated FCoE DDP pool\n"); | ||
522 | 519 | ||
523 | spin_lock_init(&fcoe->lock); | 520 | spin_lock_init(&fcoe->lock); |
524 | } | 521 | } |
@@ -614,7 +611,7 @@ int ixgbe_fcoe_enable(struct net_device *netdev) | |||
614 | if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) | 611 | if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) |
615 | goto out_enable; | 612 | goto out_enable; |
616 | 613 | ||
617 | DPRINTK(DRV, INFO, "Enabling FCoE offload features.\n"); | 614 | e_info("Enabling FCoE offload features.\n"); |
618 | if (netif_running(netdev)) | 615 | if (netif_running(netdev)) |
619 | netdev->netdev_ops->ndo_stop(netdev); | 616 | netdev->netdev_ops->ndo_stop(netdev); |
620 | 617 | ||
@@ -660,7 +657,7 @@ int ixgbe_fcoe_disable(struct net_device *netdev) | |||
660 | if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) | 657 | if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) |
661 | goto out_disable; | 658 | goto out_disable; |
662 | 659 | ||
663 | DPRINTK(DRV, INFO, "Disabling FCoE offload features.\n"); | 660 | e_info("Disabling FCoE offload features.\n"); |
664 | if (netif_running(netdev)) | 661 | if (netif_running(netdev)) |
665 | netdev->netdev_ops->ndo_stop(netdev); | 662 | netdev->netdev_ops->ndo_stop(netdev); |
666 | 663 | ||
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index b2af2f67f604..6b483d352f23 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -696,19 +696,19 @@ static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, | |||
696 | /* detected Tx unit hang */ | 696 | /* detected Tx unit hang */ |
697 | union ixgbe_adv_tx_desc *tx_desc; | 697 | union ixgbe_adv_tx_desc *tx_desc; |
698 | tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); | 698 | tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); |
699 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" | 699 | e_err("Detected Tx Unit Hang\n" |
700 | " Tx Queue <%d>\n" | 700 | " Tx Queue <%d>\n" |
701 | " TDH, TDT <%x>, <%x>\n" | 701 | " TDH, TDT <%x>, <%x>\n" |
702 | " next_to_use <%x>\n" | 702 | " next_to_use <%x>\n" |
703 | " next_to_clean <%x>\n" | 703 | " next_to_clean <%x>\n" |
704 | "tx_buffer_info[next_to_clean]\n" | 704 | "tx_buffer_info[next_to_clean]\n" |
705 | " time_stamp <%lx>\n" | 705 | " time_stamp <%lx>\n" |
706 | " jiffies <%lx>\n", | 706 | " jiffies <%lx>\n", |
707 | tx_ring->queue_index, | 707 | tx_ring->queue_index, |
708 | IXGBE_READ_REG(hw, tx_ring->head), | 708 | IXGBE_READ_REG(hw, tx_ring->head), |
709 | IXGBE_READ_REG(hw, tx_ring->tail), | 709 | IXGBE_READ_REG(hw, tx_ring->tail), |
710 | tx_ring->next_to_use, eop, | 710 | tx_ring->next_to_use, eop, |
711 | tx_ring->tx_buffer_info[eop].time_stamp, jiffies); | 711 | tx_ring->tx_buffer_info[eop].time_stamp, jiffies); |
712 | return true; | 712 | return true; |
713 | } | 713 | } |
714 | 714 | ||
@@ -812,9 +812,8 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector, | |||
812 | if (adapter->detect_tx_hung) { | 812 | if (adapter->detect_tx_hung) { |
813 | if (ixgbe_check_tx_hang(adapter, tx_ring, i)) { | 813 | if (ixgbe_check_tx_hang(adapter, tx_ring, i)) { |
814 | /* schedule immediate reset if we believe we hung */ | 814 | /* schedule immediate reset if we believe we hung */ |
815 | DPRINTK(PROBE, INFO, | 815 | e_info("tx hang %d detected, resetting adapter\n", |
816 | "tx hang %d detected, resetting adapter\n", | 816 | adapter->tx_timeout_count + 1); |
817 | adapter->tx_timeout_count + 1); | ||
818 | ixgbe_tx_timeout(adapter->netdev); | 817 | ixgbe_tx_timeout(adapter->netdev); |
819 | } | 818 | } |
820 | } | 819 | } |
@@ -1653,10 +1652,10 @@ static void ixgbe_check_overtemp_task(struct work_struct *work) | |||
1653 | return; | 1652 | return; |
1654 | break; | 1653 | break; |
1655 | } | 1654 | } |
1656 | DPRINTK(DRV, ERR, "Network adapter has been stopped because it " | 1655 | e_crit("Network adapter has been stopped because it " |
1657 | "has over heated. Restart the computer. If the problem " | 1656 | "has over heated. Restart the computer. If the problem " |
1658 | "persists, power off the system and replace the " | 1657 | "persists, power off the system and replace the " |
1659 | "adapter\n"); | 1658 | "adapter\n"); |
1660 | /* write to clear the interrupt */ | 1659 | /* write to clear the interrupt */ |
1661 | IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0); | 1660 | IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0); |
1662 | } | 1661 | } |
@@ -1668,7 +1667,7 @@ static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr) | |||
1668 | 1667 | ||
1669 | if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) && | 1668 | if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) && |
1670 | (eicr & IXGBE_EICR_GPI_SDP1)) { | 1669 | (eicr & IXGBE_EICR_GPI_SDP1)) { |
1671 | DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n"); | 1670 | e_crit("Fan has stopped, replace the adapter\n"); |
1672 | /* write to clear the interrupt */ | 1671 | /* write to clear the interrupt */ |
1673 | IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1); | 1672 | IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1); |
1674 | } | 1673 | } |
@@ -2154,9 +2153,8 @@ static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter) | |||
2154 | handler, 0, adapter->name[vector], | 2153 | handler, 0, adapter->name[vector], |
2155 | adapter->q_vector[vector]); | 2154 | adapter->q_vector[vector]); |
2156 | if (err) { | 2155 | if (err) { |
2157 | DPRINTK(PROBE, ERR, | 2156 | e_err("request_irq failed for MSIX interrupt: " |
2158 | "request_irq failed for MSIX interrupt " | 2157 | "Error: %d\n", err); |
2159 | "Error: %d\n", err); | ||
2160 | goto free_queue_irqs; | 2158 | goto free_queue_irqs; |
2161 | } | 2159 | } |
2162 | } | 2160 | } |
@@ -2165,8 +2163,7 @@ static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter) | |||
2165 | err = request_irq(adapter->msix_entries[vector].vector, | 2163 | err = request_irq(adapter->msix_entries[vector].vector, |
2166 | ixgbe_msix_lsc, 0, adapter->name[vector], netdev); | 2164 | ixgbe_msix_lsc, 0, adapter->name[vector], netdev); |
2167 | if (err) { | 2165 | if (err) { |
2168 | DPRINTK(PROBE, ERR, | 2166 | e_err("request_irq for msix_lsc failed: %d\n", err); |
2169 | "request_irq for msix_lsc failed: %d\n", err); | ||
2170 | goto free_queue_irqs; | 2167 | goto free_queue_irqs; |
2171 | } | 2168 | } |
2172 | 2169 | ||
@@ -2352,7 +2349,7 @@ static int ixgbe_request_irq(struct ixgbe_adapter *adapter) | |||
2352 | } | 2349 | } |
2353 | 2350 | ||
2354 | if (err) | 2351 | if (err) |
2355 | DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err); | 2352 | e_err("request_irq failed, Error %d\n", err); |
2356 | 2353 | ||
2357 | return err; | 2354 | return err; |
2358 | } | 2355 | } |
@@ -2423,7 +2420,7 @@ static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter) | |||
2423 | map_vector_to_rxq(adapter, 0, 0); | 2420 | map_vector_to_rxq(adapter, 0, 0); |
2424 | map_vector_to_txq(adapter, 0, 0); | 2421 | map_vector_to_txq(adapter, 0, 0); |
2425 | 2422 | ||
2426 | DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n"); | 2423 | e_info("Legacy interrupt IVAR setup done\n"); |
2427 | } | 2424 | } |
2428 | 2425 | ||
2429 | /** | 2426 | /** |
@@ -3257,8 +3254,8 @@ static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter, | |||
3257 | msleep(1); | 3254 | msleep(1); |
3258 | } | 3255 | } |
3259 | if (k >= IXGBE_MAX_RX_DESC_POLL) { | 3256 | if (k >= IXGBE_MAX_RX_DESC_POLL) { |
3260 | DPRINTK(DRV, ERR, "RXDCTL.ENABLE on Rx queue %d " | 3257 | e_err("RXDCTL.ENABLE on Rx queue %d not set within " |
3261 | "not set within the polling period\n", rxr); | 3258 | "the polling period\n", rxr); |
3262 | } | 3259 | } |
3263 | ixgbe_release_rx_desc(&adapter->hw, adapter->rx_ring[rxr], | 3260 | ixgbe_release_rx_desc(&adapter->hw, adapter->rx_ring[rxr], |
3264 | (adapter->rx_ring[rxr]->count - 1)); | 3261 | (adapter->rx_ring[rxr]->count - 1)); |
@@ -3387,8 +3384,7 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter) | |||
3387 | } while (--wait_loop && | 3384 | } while (--wait_loop && |
3388 | !(txdctl & IXGBE_TXDCTL_ENABLE)); | 3385 | !(txdctl & IXGBE_TXDCTL_ENABLE)); |
3389 | if (!wait_loop) | 3386 | if (!wait_loop) |
3390 | DPRINTK(DRV, ERR, "Could not enable " | 3387 | e_err("Could not enable Tx Queue %d\n", j); |
3391 | "Tx Queue %d\n", j); | ||
3392 | } | 3388 | } |
3393 | } | 3389 | } |
3394 | 3390 | ||
@@ -3436,8 +3432,7 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter) | |||
3436 | if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) { | 3432 | if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) { |
3437 | u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); | 3433 | u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); |
3438 | if (esdp & IXGBE_ESDP_SDP1) | 3434 | if (esdp & IXGBE_ESDP_SDP1) |
3439 | DPRINTK(DRV, CRIT, | 3435 | e_crit("Fan has stopped, replace the adapter\n"); |
3440 | "Fan has stopped, replace the adapter\n"); | ||
3441 | } | 3436 | } |
3442 | 3437 | ||
3443 | /* | 3438 | /* |
@@ -3466,7 +3461,7 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter) | |||
3466 | } else { | 3461 | } else { |
3467 | err = ixgbe_non_sfp_link_config(hw); | 3462 | err = ixgbe_non_sfp_link_config(hw); |
3468 | if (err) | 3463 | if (err) |
3469 | DPRINTK(PROBE, ERR, "link_config FAILED %d\n", err); | 3464 | e_err("link_config FAILED %d\n", err); |
3470 | } | 3465 | } |
3471 | 3466 | ||
3472 | for (i = 0; i < adapter->num_tx_queues; i++) | 3467 | for (i = 0; i < adapter->num_tx_queues; i++) |
@@ -3527,19 +3522,19 @@ void ixgbe_reset(struct ixgbe_adapter *adapter) | |||
3527 | case IXGBE_ERR_SFP_NOT_PRESENT: | 3522 | case IXGBE_ERR_SFP_NOT_PRESENT: |
3528 | break; | 3523 | break; |
3529 | case IXGBE_ERR_MASTER_REQUESTS_PENDING: | 3524 | case IXGBE_ERR_MASTER_REQUESTS_PENDING: |
3530 | dev_err(&adapter->pdev->dev, "master disable timed out\n"); | 3525 | e_dev_err("master disable timed out\n"); |
3531 | break; | 3526 | break; |
3532 | case IXGBE_ERR_EEPROM_VERSION: | 3527 | case IXGBE_ERR_EEPROM_VERSION: |
3533 | /* We are running on a pre-production device, log a warning */ | 3528 | /* We are running on a pre-production device, log a warning */ |
3534 | dev_warn(&adapter->pdev->dev, "This device is a pre-production " | 3529 | e_dev_warn("This device is a pre-production adapter/LOM. " |
3535 | "adapter/LOM. Please be aware there may be issues " | 3530 | "Please be aware there may be issuesassociated with " |
3536 | "associated with your hardware. If you are " | 3531 | "your hardware. If you are experiencing problems " |
3537 | "experiencing problems please contact your Intel or " | 3532 | "please contact your Intel or hardware " |
3538 | "hardware representative who provided you with this " | 3533 | "representative who provided you with this " |
3539 | "hardware.\n"); | 3534 | "hardware.\n"); |
3540 | break; | 3535 | break; |
3541 | default: | 3536 | default: |
3542 | dev_err(&adapter->pdev->dev, "Hardware Error: %d\n", err); | 3537 | e_dev_err("Hardware Error: %d\n", err); |
3543 | } | 3538 | } |
3544 | 3539 | ||
3545 | /* reprogram the RAR[0] in case user changed it. */ | 3540 | /* reprogram the RAR[0] in case user changed it. */ |
@@ -3920,12 +3915,12 @@ static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter) | |||
3920 | adapter->num_tx_queues = 1; | 3915 | adapter->num_tx_queues = 1; |
3921 | #ifdef CONFIG_IXGBE_DCB | 3916 | #ifdef CONFIG_IXGBE_DCB |
3922 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | 3917 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { |
3923 | DPRINTK(PROBE, INFO, "FCoE enabled with DCB\n"); | 3918 | e_info("FCoE enabled with DCB\n"); |
3924 | ixgbe_set_dcb_queues(adapter); | 3919 | ixgbe_set_dcb_queues(adapter); |
3925 | } | 3920 | } |
3926 | #endif | 3921 | #endif |
3927 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { | 3922 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { |
3928 | DPRINTK(PROBE, INFO, "FCoE enabled with RSS\n"); | 3923 | e_info("FCoE enabled with RSS\n"); |
3929 | if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) || | 3924 | if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) || |
3930 | (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) | 3925 | (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) |
3931 | ixgbe_set_fdir_queues(adapter); | 3926 | ixgbe_set_fdir_queues(adapter); |
@@ -4038,7 +4033,8 @@ static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter, | |||
4038 | * This just means we'll go with either a single MSI | 4033 | * This just means we'll go with either a single MSI |
4039 | * vector or fall back to legacy interrupts. | 4034 | * vector or fall back to legacy interrupts. |
4040 | */ | 4035 | */ |
4041 | DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n"); | 4036 | netif_printk(adapter, hw, KERN_DEBUG, adapter->netdev, |
4037 | "Unable to allocate MSI-X interrupts\n"); | ||
4042 | adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; | 4038 | adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; |
4043 | kfree(adapter->msix_entries); | 4039 | kfree(adapter->msix_entries); |
4044 | adapter->msix_entries = NULL; | 4040 | adapter->msix_entries = NULL; |
@@ -4435,8 +4431,9 @@ static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter) | |||
4435 | if (!err) { | 4431 | if (!err) { |
4436 | adapter->flags |= IXGBE_FLAG_MSI_ENABLED; | 4432 | adapter->flags |= IXGBE_FLAG_MSI_ENABLED; |
4437 | } else { | 4433 | } else { |
4438 | DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, " | 4434 | netif_printk(adapter, hw, KERN_DEBUG, adapter->netdev, |
4439 | "falling back to legacy. Error: %d\n", err); | 4435 | "Unable to allocate MSI interrupt, " |
4436 | "falling back to legacy. Error: %d\n", err); | ||
4440 | /* reset err */ | 4437 | /* reset err */ |
4441 | err = 0; | 4438 | err = 0; |
4442 | } | 4439 | } |
@@ -4557,27 +4554,25 @@ int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter) | |||
4557 | 4554 | ||
4558 | err = ixgbe_set_interrupt_capability(adapter); | 4555 | err = ixgbe_set_interrupt_capability(adapter); |
4559 | if (err) { | 4556 | if (err) { |
4560 | DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n"); | 4557 | e_dev_err("Unable to setup interrupt capabilities\n"); |
4561 | goto err_set_interrupt; | 4558 | goto err_set_interrupt; |
4562 | } | 4559 | } |
4563 | 4560 | ||
4564 | err = ixgbe_alloc_q_vectors(adapter); | 4561 | err = ixgbe_alloc_q_vectors(adapter); |
4565 | if (err) { | 4562 | if (err) { |
4566 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queue " | 4563 | e_dev_err("Unable to allocate memory for queue vectors\n"); |
4567 | "vectors\n"); | ||
4568 | goto err_alloc_q_vectors; | 4564 | goto err_alloc_q_vectors; |
4569 | } | 4565 | } |
4570 | 4566 | ||
4571 | err = ixgbe_alloc_queues(adapter); | 4567 | err = ixgbe_alloc_queues(adapter); |
4572 | if (err) { | 4568 | if (err) { |
4573 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); | 4569 | e_dev_err("Unable to allocate memory for queues\n"); |
4574 | goto err_alloc_queues; | 4570 | goto err_alloc_queues; |
4575 | } | 4571 | } |
4576 | 4572 | ||
4577 | DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, " | 4573 | e_dev_info("Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n", |
4578 | "Tx Queue count = %u\n", | 4574 | (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled", |
4579 | (adapter->num_rx_queues > 1) ? "Enabled" : | 4575 | adapter->num_rx_queues, adapter->num_tx_queues); |
4580 | "Disabled", adapter->num_rx_queues, adapter->num_tx_queues); | ||
4581 | 4576 | ||
4582 | set_bit(__IXGBE_DOWN, &adapter->state); | 4577 | set_bit(__IXGBE_DOWN, &adapter->state); |
4583 | 4578 | ||
@@ -4648,15 +4643,13 @@ static void ixgbe_sfp_task(struct work_struct *work) | |||
4648 | goto reschedule; | 4643 | goto reschedule; |
4649 | ret = hw->phy.ops.reset(hw); | 4644 | ret = hw->phy.ops.reset(hw); |
4650 | if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { | 4645 | if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) { |
4651 | dev_err(&adapter->pdev->dev, "failed to initialize " | 4646 | e_dev_err("failed to initialize because an unsupported " |
4652 | "because an unsupported SFP+ module type " | 4647 | "SFP+ module type was detected.\n"); |
4653 | "was detected.\n" | 4648 | e_dev_err("Reload the driver after installing a " |
4654 | "Reload the driver after installing a " | 4649 | "supported module.\n"); |
4655 | "supported module.\n"); | ||
4656 | unregister_netdev(adapter->netdev); | 4650 | unregister_netdev(adapter->netdev); |
4657 | } else { | 4651 | } else { |
4658 | DPRINTK(PROBE, INFO, "detected SFP+: %d\n", | 4652 | e_info("detected SFP+: %d\n", hw->phy.sfp_type); |
4659 | hw->phy.sfp_type); | ||
4660 | } | 4653 | } |
4661 | /* don't need this routine any more */ | 4654 | /* don't need this routine any more */ |
4662 | clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state); | 4655 | clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state); |
@@ -4783,7 +4776,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter) | |||
4783 | 4776 | ||
4784 | /* initialize eeprom parameters */ | 4777 | /* initialize eeprom parameters */ |
4785 | if (ixgbe_init_eeprom_params_generic(hw)) { | 4778 | if (ixgbe_init_eeprom_params_generic(hw)) { |
4786 | dev_err(&pdev->dev, "EEPROM initialization failed\n"); | 4779 | e_dev_err("EEPROM initialization failed\n"); |
4787 | return -EIO; | 4780 | return -EIO; |
4788 | } | 4781 | } |
4789 | 4782 | ||
@@ -4836,8 +4829,7 @@ int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter, | |||
4836 | err: | 4829 | err: |
4837 | vfree(tx_ring->tx_buffer_info); | 4830 | vfree(tx_ring->tx_buffer_info); |
4838 | tx_ring->tx_buffer_info = NULL; | 4831 | tx_ring->tx_buffer_info = NULL; |
4839 | DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit " | 4832 | e_err("Unable to allocate memory for the Tx descriptor ring\n"); |
4840 | "descriptor ring\n"); | ||
4841 | return -ENOMEM; | 4833 | return -ENOMEM; |
4842 | } | 4834 | } |
4843 | 4835 | ||
@@ -4859,7 +4851,7 @@ static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter) | |||
4859 | err = ixgbe_setup_tx_resources(adapter, adapter->tx_ring[i]); | 4851 | err = ixgbe_setup_tx_resources(adapter, adapter->tx_ring[i]); |
4860 | if (!err) | 4852 | if (!err) |
4861 | continue; | 4853 | continue; |
4862 | DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i); | 4854 | e_err("Allocation for Tx Queue %u failed\n", i); |
4863 | break; | 4855 | break; |
4864 | } | 4856 | } |
4865 | 4857 | ||
@@ -4884,8 +4876,7 @@ int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter, | |||
4884 | if (!rx_ring->rx_buffer_info) | 4876 | if (!rx_ring->rx_buffer_info) |
4885 | rx_ring->rx_buffer_info = vmalloc(size); | 4877 | rx_ring->rx_buffer_info = vmalloc(size); |
4886 | if (!rx_ring->rx_buffer_info) { | 4878 | if (!rx_ring->rx_buffer_info) { |
4887 | DPRINTK(PROBE, ERR, | 4879 | e_err("vmalloc allocation failed for the Rx desc ring\n"); |
4888 | "vmalloc allocation failed for the rx desc ring\n"); | ||
4889 | goto alloc_failed; | 4880 | goto alloc_failed; |
4890 | } | 4881 | } |
4891 | memset(rx_ring->rx_buffer_info, 0, size); | 4882 | memset(rx_ring->rx_buffer_info, 0, size); |
@@ -4898,8 +4889,7 @@ int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter, | |||
4898 | &rx_ring->dma, GFP_KERNEL); | 4889 | &rx_ring->dma, GFP_KERNEL); |
4899 | 4890 | ||
4900 | if (!rx_ring->desc) { | 4891 | if (!rx_ring->desc) { |
4901 | DPRINTK(PROBE, ERR, | 4892 | e_err("Memory allocation failed for the Rx desc ring\n"); |
4902 | "Memory allocation failed for the rx desc ring\n"); | ||
4903 | vfree(rx_ring->rx_buffer_info); | 4893 | vfree(rx_ring->rx_buffer_info); |
4904 | goto alloc_failed; | 4894 | goto alloc_failed; |
4905 | } | 4895 | } |
@@ -4932,7 +4922,7 @@ static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter) | |||
4932 | err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]); | 4922 | err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]); |
4933 | if (!err) | 4923 | if (!err) |
4934 | continue; | 4924 | continue; |
4935 | DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i); | 4925 | e_err("Allocation for Rx Queue %u failed\n", i); |
4936 | break; | 4926 | break; |
4937 | } | 4927 | } |
4938 | 4928 | ||
@@ -5031,8 +5021,7 @@ static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu) | |||
5031 | if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE)) | 5021 | if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE)) |
5032 | return -EINVAL; | 5022 | return -EINVAL; |
5033 | 5023 | ||
5034 | DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n", | 5024 | e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); |
5035 | netdev->mtu, new_mtu); | ||
5036 | /* must set new MTU before calling down or up */ | 5025 | /* must set new MTU before calling down or up */ |
5037 | netdev->mtu = new_mtu; | 5026 | netdev->mtu = new_mtu; |
5038 | 5027 | ||
@@ -5145,8 +5134,7 @@ static int ixgbe_resume(struct pci_dev *pdev) | |||
5145 | 5134 | ||
5146 | err = pci_enable_device_mem(pdev); | 5135 | err = pci_enable_device_mem(pdev); |
5147 | if (err) { | 5136 | if (err) { |
5148 | printk(KERN_ERR "ixgbe: Cannot enable PCI device from " | 5137 | e_dev_err("Cannot enable PCI device from suspend\n"); |
5149 | "suspend\n"); | ||
5150 | return err; | 5138 | return err; |
5151 | } | 5139 | } |
5152 | pci_set_master(pdev); | 5140 | pci_set_master(pdev); |
@@ -5155,8 +5143,7 @@ static int ixgbe_resume(struct pci_dev *pdev) | |||
5155 | 5143 | ||
5156 | err = ixgbe_init_interrupt_scheme(adapter); | 5144 | err = ixgbe_init_interrupt_scheme(adapter); |
5157 | if (err) { | 5145 | if (err) { |
5158 | printk(KERN_ERR "ixgbe: Cannot initialize interrupts for " | 5146 | e_dev_err("Cannot initialize interrupts for device\n"); |
5159 | "device\n"); | ||
5160 | return err; | 5147 | return err; |
5161 | } | 5148 | } |
5162 | 5149 | ||
@@ -5512,10 +5499,10 @@ static void ixgbe_sfp_config_module_task(struct work_struct *work) | |||
5512 | err = hw->phy.ops.identify_sfp(hw); | 5499 | err = hw->phy.ops.identify_sfp(hw); |
5513 | 5500 | ||
5514 | if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { | 5501 | if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { |
5515 | dev_err(&adapter->pdev->dev, "failed to initialize because " | 5502 | e_dev_err("failed to initialize because an unsupported SFP+ " |
5516 | "an unsupported SFP+ module type was detected.\n" | 5503 | "module type was detected.\n"); |
5517 | "Reload the driver after installing a supported " | 5504 | e_dev_err("Reload the driver after installing a supported " |
5518 | "module.\n"); | 5505 | "module.\n"); |
5519 | unregister_netdev(adapter->netdev); | 5506 | unregister_netdev(adapter->netdev); |
5520 | return; | 5507 | return; |
5521 | } | 5508 | } |
@@ -5544,8 +5531,8 @@ static void ixgbe_fdir_reinit_task(struct work_struct *work) | |||
5544 | set_bit(__IXGBE_FDIR_INIT_DONE, | 5531 | set_bit(__IXGBE_FDIR_INIT_DONE, |
5545 | &(adapter->tx_ring[i]->reinit_state)); | 5532 | &(adapter->tx_ring[i]->reinit_state)); |
5546 | } else { | 5533 | } else { |
5547 | DPRINTK(PROBE, ERR, "failed to finish FDIR re-initialization, " | 5534 | e_err("failed to finish FDIR re-initialization, " |
5548 | "ignored adding FDIR ATR filters\n"); | 5535 | "ignored adding FDIR ATR filters\n"); |
5549 | } | 5536 | } |
5550 | /* Done FDIR Re-initialization, enable transmits */ | 5537 | /* Done FDIR Re-initialization, enable transmits */ |
5551 | netif_tx_start_all_queues(adapter->netdev); | 5538 | netif_tx_start_all_queues(adapter->netdev); |
@@ -5616,16 +5603,14 @@ static void ixgbe_watchdog_task(struct work_struct *work) | |||
5616 | flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X); | 5603 | flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X); |
5617 | } | 5604 | } |
5618 | 5605 | ||
5619 | printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, " | 5606 | e_info("NIC Link is Up %s, Flow Control: %s\n", |
5620 | "Flow Control: %s\n", | ||
5621 | netdev->name, | ||
5622 | (link_speed == IXGBE_LINK_SPEED_10GB_FULL ? | 5607 | (link_speed == IXGBE_LINK_SPEED_10GB_FULL ? |
5623 | "10 Gbps" : | 5608 | "10 Gbps" : |
5624 | (link_speed == IXGBE_LINK_SPEED_1GB_FULL ? | 5609 | (link_speed == IXGBE_LINK_SPEED_1GB_FULL ? |
5625 | "1 Gbps" : "unknown speed")), | 5610 | "1 Gbps" : "unknown speed")), |
5626 | ((flow_rx && flow_tx) ? "RX/TX" : | 5611 | ((flow_rx && flow_tx) ? "RX/TX" : |
5627 | (flow_rx ? "RX" : | 5612 | (flow_rx ? "RX" : |
5628 | (flow_tx ? "TX" : "None")))); | 5613 | (flow_tx ? "TX" : "None")))); |
5629 | 5614 | ||
5630 | netif_carrier_on(netdev); | 5615 | netif_carrier_on(netdev); |
5631 | } else { | 5616 | } else { |
@@ -5636,8 +5621,7 @@ static void ixgbe_watchdog_task(struct work_struct *work) | |||
5636 | adapter->link_up = false; | 5621 | adapter->link_up = false; |
5637 | adapter->link_speed = 0; | 5622 | adapter->link_speed = 0; |
5638 | if (netif_carrier_ok(netdev)) { | 5623 | if (netif_carrier_ok(netdev)) { |
5639 | printk(KERN_INFO "ixgbe: %s NIC Link is Down\n", | 5624 | e_info("NIC Link is Down\n"); |
5640 | netdev->name); | ||
5641 | netif_carrier_off(netdev); | 5625 | netif_carrier_off(netdev); |
5642 | } | 5626 | } |
5643 | } | 5627 | } |
@@ -5813,9 +5797,8 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter, | |||
5813 | break; | 5797 | break; |
5814 | default: | 5798 | default: |
5815 | if (unlikely(net_ratelimit())) { | 5799 | if (unlikely(net_ratelimit())) { |
5816 | DPRINTK(PROBE, WARNING, | 5800 | e_warn("partial checksum but " |
5817 | "partial checksum but proto=%x!\n", | 5801 | "proto=%x!\n", skb->protocol); |
5818 | skb->protocol); | ||
5819 | } | 5802 | } |
5820 | break; | 5803 | break; |
5821 | } | 5804 | } |
@@ -5926,7 +5909,7 @@ static int ixgbe_tx_map(struct ixgbe_adapter *adapter, | |||
5926 | return count; | 5909 | return count; |
5927 | 5910 | ||
5928 | dma_error: | 5911 | dma_error: |
5929 | dev_err(&pdev->dev, "TX DMA map failed\n"); | 5912 | e_dev_err("TX DMA map failed\n"); |
5930 | 5913 | ||
5931 | /* clear timestamp and dma mappings for failed tx_buffer_info map */ | 5914 | /* clear timestamp and dma mappings for failed tx_buffer_info map */ |
5932 | tx_buffer_info->dma = 0; | 5915 | tx_buffer_info->dma = 0; |
@@ -6423,8 +6406,7 @@ static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter, | |||
6423 | adapter->flags |= IXGBE_FLAG_SRIOV_ENABLED; | 6406 | adapter->flags |= IXGBE_FLAG_SRIOV_ENABLED; |
6424 | err = pci_enable_sriov(adapter->pdev, adapter->num_vfs); | 6407 | err = pci_enable_sriov(adapter->pdev, adapter->num_vfs); |
6425 | if (err) { | 6408 | if (err) { |
6426 | DPRINTK(PROBE, ERR, | 6409 | e_err("Failed to enable PCI sriov: %d\n", err); |
6427 | "Failed to enable PCI sriov: %d\n", err); | ||
6428 | goto err_novfs; | 6410 | goto err_novfs; |
6429 | } | 6411 | } |
6430 | /* If call to enable VFs succeeded then allocate memory | 6412 | /* If call to enable VFs succeeded then allocate memory |
@@ -6448,9 +6430,8 @@ static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter, | |||
6448 | } | 6430 | } |
6449 | 6431 | ||
6450 | /* Oh oh */ | 6432 | /* Oh oh */ |
6451 | DPRINTK(PROBE, ERR, | 6433 | e_err("Unable to allocate memory for VF Data Storage - SRIOV " |
6452 | "Unable to allocate memory for VF " | 6434 | "disabled\n"); |
6453 | "Data Storage - SRIOV disabled\n"); | ||
6454 | pci_disable_sriov(adapter->pdev); | 6435 | pci_disable_sriov(adapter->pdev); |
6455 | 6436 | ||
6456 | err_novfs: | 6437 | err_novfs: |
@@ -6498,8 +6479,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6498 | err = dma_set_coherent_mask(&pdev->dev, | 6479 | err = dma_set_coherent_mask(&pdev->dev, |
6499 | DMA_BIT_MASK(32)); | 6480 | DMA_BIT_MASK(32)); |
6500 | if (err) { | 6481 | if (err) { |
6501 | dev_err(&pdev->dev, "No usable DMA " | 6482 | e_dev_err("No usable DMA configuration, " |
6502 | "configuration, aborting\n"); | 6483 | "aborting\n"); |
6503 | goto err_dma; | 6484 | goto err_dma; |
6504 | } | 6485 | } |
6505 | } | 6486 | } |
@@ -6509,8 +6490,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6509 | err = pci_request_selected_regions(pdev, pci_select_bars(pdev, | 6490 | err = pci_request_selected_regions(pdev, pci_select_bars(pdev, |
6510 | IORESOURCE_MEM), ixgbe_driver_name); | 6491 | IORESOURCE_MEM), ixgbe_driver_name); |
6511 | if (err) { | 6492 | if (err) { |
6512 | dev_err(&pdev->dev, | 6493 | e_dev_err("pci_request_selected_regions failed 0x%x\n", err); |
6513 | "pci_request_selected_regions failed 0x%x\n", err); | ||
6514 | goto err_pci_reg; | 6494 | goto err_pci_reg; |
6515 | } | 6495 | } |
6516 | 6496 | ||
@@ -6621,8 +6601,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6621 | if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) { | 6601 | if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) { |
6622 | u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); | 6602 | u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); |
6623 | if (esdp & IXGBE_ESDP_SDP1) | 6603 | if (esdp & IXGBE_ESDP_SDP1) |
6624 | DPRINTK(PROBE, CRIT, | 6604 | e_crit("Fan has stopped, replace the adapter\n"); |
6625 | "Fan has stopped, replace the adapter\n"); | ||
6626 | } | 6605 | } |
6627 | 6606 | ||
6628 | /* reset_hw fills in the perm_addr as well */ | 6607 | /* reset_hw fills in the perm_addr as well */ |
@@ -6641,19 +6620,19 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6641 | round_jiffies(jiffies + (2 * HZ))); | 6620 | round_jiffies(jiffies + (2 * HZ))); |
6642 | err = 0; | 6621 | err = 0; |
6643 | } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { | 6622 | } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { |
6644 | dev_err(&adapter->pdev->dev, "failed to initialize because " | 6623 | e_dev_err("failed to initialize because an unsupported SFP+ " |
6645 | "an unsupported SFP+ module type was detected.\n" | 6624 | "module type was detected.\n"); |
6646 | "Reload the driver after installing a supported " | 6625 | e_dev_err("Reload the driver after installing a supported " |
6647 | "module.\n"); | 6626 | "module.\n"); |
6648 | goto err_sw_init; | 6627 | goto err_sw_init; |
6649 | } else if (err) { | 6628 | } else if (err) { |
6650 | dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err); | 6629 | e_dev_err("HW Init failed: %d\n", err); |
6651 | goto err_sw_init; | 6630 | goto err_sw_init; |
6652 | } | 6631 | } |
6653 | 6632 | ||
6654 | ixgbe_probe_vf(adapter, ii); | 6633 | ixgbe_probe_vf(adapter, ii); |
6655 | 6634 | ||
6656 | netdev->features = NETIF_F_SG | | 6635 | netdev->features = NETIF_F_SG | |
6657 | NETIF_F_IP_CSUM | | 6636 | NETIF_F_IP_CSUM | |
6658 | NETIF_F_HW_VLAN_TX | | 6637 | NETIF_F_HW_VLAN_TX | |
6659 | NETIF_F_HW_VLAN_RX | | 6638 | NETIF_F_HW_VLAN_RX | |
@@ -6700,7 +6679,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6700 | 6679 | ||
6701 | /* make sure the EEPROM is good */ | 6680 | /* make sure the EEPROM is good */ |
6702 | if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) { | 6681 | if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) { |
6703 | dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n"); | 6682 | e_dev_err("The EEPROM Checksum Is Not Valid\n"); |
6704 | err = -EIO; | 6683 | err = -EIO; |
6705 | goto err_eeprom; | 6684 | goto err_eeprom; |
6706 | } | 6685 | } |
@@ -6709,7 +6688,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6709 | memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len); | 6688 | memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len); |
6710 | 6689 | ||
6711 | if (ixgbe_validate_mac_addr(netdev->perm_addr)) { | 6690 | if (ixgbe_validate_mac_addr(netdev->perm_addr)) { |
6712 | dev_err(&pdev->dev, "invalid MAC address\n"); | 6691 | e_dev_err("invalid MAC address\n"); |
6713 | err = -EIO; | 6692 | err = -EIO; |
6714 | goto err_eeprom; | 6693 | goto err_eeprom; |
6715 | } | 6694 | } |
@@ -6744,7 +6723,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6744 | hw->mac.ops.get_bus_info(hw); | 6723 | hw->mac.ops.get_bus_info(hw); |
6745 | 6724 | ||
6746 | /* print bus type/speed/width info */ | 6725 | /* print bus type/speed/width info */ |
6747 | dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n", | 6726 | e_dev_info("(PCI Express:%s:%s) %pM\n", |
6748 | ((hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0Gb/s": | 6727 | ((hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0Gb/s": |
6749 | (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5Gb/s":"Unknown"), | 6728 | (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5Gb/s":"Unknown"), |
6750 | ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" : | 6729 | ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" : |
@@ -6754,20 +6733,20 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6754 | netdev->dev_addr); | 6733 | netdev->dev_addr); |
6755 | ixgbe_read_pba_num_generic(hw, &part_num); | 6734 | ixgbe_read_pba_num_generic(hw, &part_num); |
6756 | if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present) | 6735 | if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present) |
6757 | dev_info(&pdev->dev, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %06x-%03x\n", | 6736 | e_dev_info("MAC: %d, PHY: %d, SFP+: %d, " |
6758 | hw->mac.type, hw->phy.type, hw->phy.sfp_type, | 6737 | "PBA No: %06x-%03x\n", |
6759 | (part_num >> 8), (part_num & 0xff)); | 6738 | hw->mac.type, hw->phy.type, hw->phy.sfp_type, |
6739 | (part_num >> 8), (part_num & 0xff)); | ||
6760 | else | 6740 | else |
6761 | dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n", | 6741 | e_dev_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n", |
6762 | hw->mac.type, hw->phy.type, | 6742 | hw->mac.type, hw->phy.type, |
6763 | (part_num >> 8), (part_num & 0xff)); | 6743 | (part_num >> 8), (part_num & 0xff)); |
6764 | 6744 | ||
6765 | if (hw->bus.width <= ixgbe_bus_width_pcie_x4) { | 6745 | if (hw->bus.width <= ixgbe_bus_width_pcie_x4) { |
6766 | dev_warn(&pdev->dev, "PCI-Express bandwidth available for " | 6746 | e_dev_warn("PCI-Express bandwidth available for this card is " |
6767 | "this card is not sufficient for optimal " | 6747 | "not sufficient for optimal performance.\n"); |
6768 | "performance.\n"); | 6748 | e_dev_warn("For optimal performance a x8 PCI-Express slot " |
6769 | dev_warn(&pdev->dev, "For optimal performance a x8 " | 6749 | "is required.\n"); |
6770 | "PCI-Express slot is required.\n"); | ||
6771 | } | 6750 | } |
6772 | 6751 | ||
6773 | /* save off EEPROM version number */ | 6752 | /* save off EEPROM version number */ |
@@ -6778,12 +6757,12 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6778 | 6757 | ||
6779 | if (err == IXGBE_ERR_EEPROM_VERSION) { | 6758 | if (err == IXGBE_ERR_EEPROM_VERSION) { |
6780 | /* We are running on a pre-production device, log a warning */ | 6759 | /* We are running on a pre-production device, log a warning */ |
6781 | dev_warn(&pdev->dev, "This device is a pre-production " | 6760 | e_dev_warn("This device is a pre-production adapter/LOM. " |
6782 | "adapter/LOM. Please be aware there may be issues " | 6761 | "Please be aware there may be issues associated " |
6783 | "associated with your hardware. If you are " | 6762 | "with your hardware. If you are experiencing " |
6784 | "experiencing problems please contact your Intel or " | 6763 | "problems please contact your Intel or hardware " |
6785 | "hardware representative who provided you with this " | 6764 | "representative who provided you with this " |
6786 | "hardware.\n"); | 6765 | "hardware.\n"); |
6787 | } | 6766 | } |
6788 | strcpy(netdev->name, "eth%d"); | 6767 | strcpy(netdev->name, "eth%d"); |
6789 | err = register_netdev(netdev); | 6768 | err = register_netdev(netdev); |
@@ -6806,8 +6785,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6806 | } | 6785 | } |
6807 | #endif | 6786 | #endif |
6808 | if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { | 6787 | if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { |
6809 | DPRINTK(PROBE, INFO, "IOV is enabled with %d VFs\n", | 6788 | e_info("IOV is enabled with %d VFs\n", adapter->num_vfs); |
6810 | adapter->num_vfs); | ||
6811 | for (i = 0; i < adapter->num_vfs; i++) | 6789 | for (i = 0; i < adapter->num_vfs; i++) |
6812 | ixgbe_vf_configuration(pdev, (i | 0x10000000)); | 6790 | ixgbe_vf_configuration(pdev, (i | 0x10000000)); |
6813 | } | 6791 | } |
@@ -6815,7 +6793,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
6815 | /* add san mac addr to netdev */ | 6793 | /* add san mac addr to netdev */ |
6816 | ixgbe_add_sanmac_netdev(netdev); | 6794 | ixgbe_add_sanmac_netdev(netdev); |
6817 | 6795 | ||
6818 | dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n"); | 6796 | e_dev_info("Intel(R) 10 Gigabit Network Connection\n"); |
6819 | cards_found++; | 6797 | cards_found++; |
6820 | return 0; | 6798 | return 0; |
6821 | 6799 | ||
@@ -6905,7 +6883,7 @@ static void __devexit ixgbe_remove(struct pci_dev *pdev) | |||
6905 | pci_release_selected_regions(pdev, pci_select_bars(pdev, | 6883 | pci_release_selected_regions(pdev, pci_select_bars(pdev, |
6906 | IORESOURCE_MEM)); | 6884 | IORESOURCE_MEM)); |
6907 | 6885 | ||
6908 | DPRINTK(PROBE, INFO, "complete\n"); | 6886 | e_dev_info("complete\n"); |
6909 | 6887 | ||
6910 | free_netdev(netdev); | 6888 | free_netdev(netdev); |
6911 | 6889 | ||
@@ -6955,8 +6933,7 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev) | |||
6955 | int err; | 6933 | int err; |
6956 | 6934 | ||
6957 | if (pci_enable_device_mem(pdev)) { | 6935 | if (pci_enable_device_mem(pdev)) { |
6958 | DPRINTK(PROBE, ERR, | 6936 | e_err("Cannot re-enable PCI device after reset.\n"); |
6959 | "Cannot re-enable PCI device after reset.\n"); | ||
6960 | result = PCI_ERS_RESULT_DISCONNECT; | 6937 | result = PCI_ERS_RESULT_DISCONNECT; |
6961 | } else { | 6938 | } else { |
6962 | pci_set_master(pdev); | 6939 | pci_set_master(pdev); |
@@ -6972,8 +6949,8 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev) | |||
6972 | 6949 | ||
6973 | err = pci_cleanup_aer_uncorrect_error_status(pdev); | 6950 | err = pci_cleanup_aer_uncorrect_error_status(pdev); |
6974 | if (err) { | 6951 | if (err) { |
6975 | dev_err(&pdev->dev, | 6952 | e_dev_err("pci_cleanup_aer_uncorrect_error_status " |
6976 | "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err); | 6953 | "failed 0x%0x\n", err); |
6977 | /* non-fatal, continue */ | 6954 | /* non-fatal, continue */ |
6978 | } | 6955 | } |
6979 | 6956 | ||
@@ -6994,7 +6971,7 @@ static void ixgbe_io_resume(struct pci_dev *pdev) | |||
6994 | 6971 | ||
6995 | if (netif_running(netdev)) { | 6972 | if (netif_running(netdev)) { |
6996 | if (ixgbe_up(adapter)) { | 6973 | if (ixgbe_up(adapter)) { |
6997 | DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n"); | 6974 | e_info("ixgbe_up failed after reset\n"); |
6998 | return; | 6975 | return; |
6999 | } | 6976 | } |
7000 | } | 6977 | } |
@@ -7030,10 +7007,9 @@ static struct pci_driver ixgbe_driver = { | |||
7030 | static int __init ixgbe_init_module(void) | 7007 | static int __init ixgbe_init_module(void) |
7031 | { | 7008 | { |
7032 | int ret; | 7009 | int ret; |
7033 | printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name, | 7010 | pr_info("%s - version %s\n", ixgbe_driver_string, |
7034 | ixgbe_driver_string, ixgbe_driver_version); | 7011 | ixgbe_driver_version); |
7035 | 7012 | pr_info("%s\n", ixgbe_copyright); | |
7036 | printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright); | ||
7037 | 7013 | ||
7038 | #ifdef CONFIG_IXGBE_DCA | 7014 | #ifdef CONFIG_IXGBE_DCA |
7039 | dca_register_notify(&dca_notifier); | 7015 | dca_register_notify(&dca_notifier); |
@@ -7072,18 +7048,17 @@ static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event, | |||
7072 | } | 7048 | } |
7073 | 7049 | ||
7074 | #endif /* CONFIG_IXGBE_DCA */ | 7050 | #endif /* CONFIG_IXGBE_DCA */ |
7075 | #ifdef DEBUG | 7051 | |
7076 | /** | 7052 | /** |
7077 | * ixgbe_get_hw_dev_name - return device name string | 7053 | * ixgbe_get_hw_dev return device |
7078 | * used by hardware layer to print debugging information | 7054 | * used by hardware layer to print debugging information |
7079 | **/ | 7055 | **/ |
7080 | char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw) | 7056 | struct net_device *ixgbe_get_hw_dev(struct ixgbe_hw *hw) |
7081 | { | 7057 | { |
7082 | struct ixgbe_adapter *adapter = hw->back; | 7058 | struct ixgbe_adapter *adapter = hw->back; |
7083 | return adapter->netdev->name; | 7059 | return adapter->netdev; |
7084 | } | 7060 | } |
7085 | 7061 | ||
7086 | #endif | ||
7087 | module_exit(ixgbe_exit_module); | 7062 | module_exit(ixgbe_exit_module); |
7088 | 7063 | ||
7089 | /* ixgbe_main.c */ | 7064 | /* ixgbe_main.c */ |
diff --git a/drivers/net/ixgbe/ixgbe_sriov.c b/drivers/net/ixgbe/ixgbe_sriov.c index f6cee94ec8e8..66f6e62b8cb0 100644 --- a/drivers/net/ixgbe/ixgbe_sriov.c +++ b/drivers/net/ixgbe/ixgbe_sriov.c | |||
@@ -25,7 +25,6 @@ | |||
25 | 25 | ||
26 | *******************************************************************************/ | 26 | *******************************************************************************/ |
27 | 27 | ||
28 | |||
29 | #include <linux/types.h> | 28 | #include <linux/types.h> |
30 | #include <linux/module.h> | 29 | #include <linux/module.h> |
31 | #include <linux/pci.h> | 30 | #include <linux/pci.h> |
@@ -174,7 +173,7 @@ int ixgbe_set_vf_mac(struct ixgbe_adapter *adapter, | |||
174 | adapter->vfinfo[vf].rar = hw->mac.ops.set_rar(hw, vf + 1, mac_addr, | 173 | adapter->vfinfo[vf].rar = hw->mac.ops.set_rar(hw, vf + 1, mac_addr, |
175 | vf, IXGBE_RAH_AV); | 174 | vf, IXGBE_RAH_AV); |
176 | if (adapter->vfinfo[vf].rar < 0) { | 175 | if (adapter->vfinfo[vf].rar < 0) { |
177 | DPRINTK(DRV, ERR, "Could not set MAC Filter for VF %d\n", vf); | 176 | e_err("Could not set MAC Filter for VF %d\n", vf); |
178 | return -1; | 177 | return -1; |
179 | } | 178 | } |
180 | 179 | ||
@@ -194,11 +193,7 @@ int ixgbe_vf_configuration(struct pci_dev *pdev, unsigned int event_mask) | |||
194 | 193 | ||
195 | if (enable) { | 194 | if (enable) { |
196 | random_ether_addr(vf_mac_addr); | 195 | random_ether_addr(vf_mac_addr); |
197 | DPRINTK(PROBE, INFO, "IOV: VF %d is enabled " | 196 | e_info("IOV: VF %d is enabled MAC %pM\n", vfn, vf_mac_addr); |
198 | "mac %02X:%02X:%02X:%02X:%02X:%02X\n", | ||
199 | vfn, | ||
200 | vf_mac_addr[0], vf_mac_addr[1], vf_mac_addr[2], | ||
201 | vf_mac_addr[3], vf_mac_addr[4], vf_mac_addr[5]); | ||
202 | /* | 197 | /* |
203 | * Store away the VF "permananet" MAC address, it will ask | 198 | * Store away the VF "permananet" MAC address, it will ask |
204 | * for it later. | 199 | * for it later. |
@@ -243,7 +238,7 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) | |||
243 | retval = ixgbe_read_mbx(hw, msgbuf, mbx_size, vf); | 238 | retval = ixgbe_read_mbx(hw, msgbuf, mbx_size, vf); |
244 | 239 | ||
245 | if (retval) | 240 | if (retval) |
246 | printk(KERN_ERR "Error receiving message from VF\n"); | 241 | pr_err("Error receiving message from VF\n"); |
247 | 242 | ||
248 | /* this is a message we already processed, do nothing */ | 243 | /* this is a message we already processed, do nothing */ |
249 | if (msgbuf[0] & (IXGBE_VT_MSGTYPE_ACK | IXGBE_VT_MSGTYPE_NACK)) | 244 | if (msgbuf[0] & (IXGBE_VT_MSGTYPE_ACK | IXGBE_VT_MSGTYPE_NACK)) |
@@ -257,7 +252,7 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) | |||
257 | if (msgbuf[0] == IXGBE_VF_RESET) { | 252 | if (msgbuf[0] == IXGBE_VF_RESET) { |
258 | unsigned char *vf_mac = adapter->vfinfo[vf].vf_mac_addresses; | 253 | unsigned char *vf_mac = adapter->vfinfo[vf].vf_mac_addresses; |
259 | u8 *addr = (u8 *)(&msgbuf[1]); | 254 | u8 *addr = (u8 *)(&msgbuf[1]); |
260 | DPRINTK(PROBE, INFO, "VF Reset msg received from vf %d\n", vf); | 255 | e_info("VF Reset msg received from vf %d\n", vf); |
261 | adapter->vfinfo[vf].clear_to_send = false; | 256 | adapter->vfinfo[vf].clear_to_send = false; |
262 | ixgbe_vf_reset_msg(adapter, vf); | 257 | ixgbe_vf_reset_msg(adapter, vf); |
263 | adapter->vfinfo[vf].clear_to_send = true; | 258 | adapter->vfinfo[vf].clear_to_send = true; |
@@ -310,7 +305,7 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) | |||
310 | retval = ixgbe_set_vf_vlan(adapter, add, vid, vf); | 305 | retval = ixgbe_set_vf_vlan(adapter, add, vid, vf); |
311 | break; | 306 | break; |
312 | default: | 307 | default: |
313 | DPRINTK(DRV, ERR, "Unhandled Msg %8.8x\n", msgbuf[0]); | 308 | e_err("Unhandled Msg %8.8x\n", msgbuf[0]); |
314 | retval = IXGBE_ERR_MBX; | 309 | retval = IXGBE_ERR_MBX; |
315 | break; | 310 | break; |
316 | } | 311 | } |
diff --git a/drivers/net/ixgbevf/ixgbevf_main.c b/drivers/net/ixgbevf/ixgbevf_main.c index a16cff7e54a3..73f1e75f68d4 100644 --- a/drivers/net/ixgbevf/ixgbevf_main.c +++ b/drivers/net/ixgbevf/ixgbevf_main.c | |||
@@ -3411,6 +3411,7 @@ static int __devinit ixgbevf_probe(struct pci_dev *pdev, | |||
3411 | netdev->features |= NETIF_F_IPV6_CSUM; | 3411 | netdev->features |= NETIF_F_IPV6_CSUM; |
3412 | netdev->features |= NETIF_F_TSO; | 3412 | netdev->features |= NETIF_F_TSO; |
3413 | netdev->features |= NETIF_F_TSO6; | 3413 | netdev->features |= NETIF_F_TSO6; |
3414 | netdev->features |= NETIF_F_GRO; | ||
3414 | netdev->vlan_features |= NETIF_F_TSO; | 3415 | netdev->vlan_features |= NETIF_F_TSO; |
3415 | netdev->vlan_features |= NETIF_F_TSO6; | 3416 | netdev->vlan_features |= NETIF_F_TSO6; |
3416 | netdev->vlan_features |= NETIF_F_IP_CSUM; | 3417 | netdev->vlan_features |= NETIF_F_IP_CSUM; |
diff --git a/drivers/net/mac8390.c b/drivers/net/mac8390.c index 1136c9a22b67..3832fa4961dd 100644 --- a/drivers/net/mac8390.c +++ b/drivers/net/mac8390.c | |||
@@ -157,6 +157,8 @@ static void dayna_block_output(struct net_device *dev, int count, | |||
157 | #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) | 157 | #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) |
158 | #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) | 158 | #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) |
159 | 159 | ||
160 | #define memcmp_withio(a, b, c) memcmp((a), (void *)(b), (c)) | ||
161 | |||
160 | /* Slow Sane (16-bit chunk memory read/write) Cabletron uses this */ | 162 | /* Slow Sane (16-bit chunk memory read/write) Cabletron uses this */ |
161 | static void slow_sane_get_8390_hdr(struct net_device *dev, | 163 | static void slow_sane_get_8390_hdr(struct net_device *dev, |
162 | struct e8390_pkt_hdr *hdr, int ring_page); | 164 | struct e8390_pkt_hdr *hdr, int ring_page); |
@@ -164,8 +166,8 @@ static void slow_sane_block_input(struct net_device *dev, int count, | |||
164 | struct sk_buff *skb, int ring_offset); | 166 | struct sk_buff *skb, int ring_offset); |
165 | static void slow_sane_block_output(struct net_device *dev, int count, | 167 | static void slow_sane_block_output(struct net_device *dev, int count, |
166 | const unsigned char *buf, int start_page); | 168 | const unsigned char *buf, int start_page); |
167 | static void word_memcpy_tocard(void *tp, const void *fp, int count); | 169 | static void word_memcpy_tocard(unsigned long tp, const void *fp, int count); |
168 | static void word_memcpy_fromcard(void *tp, const void *fp, int count); | 170 | static void word_memcpy_fromcard(void *tp, unsigned long fp, int count); |
169 | 171 | ||
170 | static enum mac8390_type __init mac8390_ident(struct nubus_dev *dev) | 172 | static enum mac8390_type __init mac8390_ident(struct nubus_dev *dev) |
171 | { | 173 | { |
@@ -245,9 +247,9 @@ static enum mac8390_access __init mac8390_testio(volatile unsigned long membase) | |||
245 | unsigned long outdata = 0xA5A0B5B0; | 247 | unsigned long outdata = 0xA5A0B5B0; |
246 | unsigned long indata = 0x00000000; | 248 | unsigned long indata = 0x00000000; |
247 | /* Try writing 32 bits */ | 249 | /* Try writing 32 bits */ |
248 | memcpy(membase, &outdata, 4); | 250 | memcpy_toio(membase, &outdata, 4); |
249 | /* Now compare them */ | 251 | /* Now compare them */ |
250 | if (memcmp((char *)&outdata, (char *)membase, 4) == 0) | 252 | if (memcmp_withio(&outdata, membase, 4) == 0) |
251 | return ACCESS_32; | 253 | return ACCESS_32; |
252 | /* Write 16 bit output */ | 254 | /* Write 16 bit output */ |
253 | word_memcpy_tocard(membase, &outdata, 4); | 255 | word_memcpy_tocard(membase, &outdata, 4); |
@@ -554,7 +556,7 @@ static int __init mac8390_initdev(struct net_device *dev, | |||
554 | case MAC8390_APPLE: | 556 | case MAC8390_APPLE: |
555 | switch (mac8390_testio(dev->mem_start)) { | 557 | switch (mac8390_testio(dev->mem_start)) { |
556 | case ACCESS_UNKNOWN: | 558 | case ACCESS_UNKNOWN: |
557 | pr_info("Don't know how to access card memory!\n"); | 559 | pr_err("Don't know how to access card memory!\n"); |
558 | return -ENODEV; | 560 | return -ENODEV; |
559 | break; | 561 | break; |
560 | 562 | ||
@@ -641,12 +643,13 @@ static int __init mac8390_initdev(struct net_device *dev, | |||
641 | 643 | ||
642 | static int mac8390_open(struct net_device *dev) | 644 | static int mac8390_open(struct net_device *dev) |
643 | { | 645 | { |
646 | int err; | ||
647 | |||
644 | __ei_open(dev); | 648 | __ei_open(dev); |
645 | if (request_irq(dev->irq, __ei_interrupt, 0, "8390 Ethernet", dev)) { | 649 | err = request_irq(dev->irq, __ei_interrupt, 0, "8390 Ethernet", dev); |
646 | pr_info("%s: unable to get IRQ %d.\n", dev->name, dev->irq); | 650 | if (err) |
647 | return -EAGAIN; | 651 | pr_err("%s: unable to get IRQ %d\n", dev->name, dev->irq); |
648 | } | 652 | return err; |
649 | return 0; | ||
650 | } | 653 | } |
651 | 654 | ||
652 | static int mac8390_close(struct net_device *dev) | 655 | static int mac8390_close(struct net_device *dev) |
@@ -731,7 +734,7 @@ static void sane_get_8390_hdr(struct net_device *dev, | |||
731 | struct e8390_pkt_hdr *hdr, int ring_page) | 734 | struct e8390_pkt_hdr *hdr, int ring_page) |
732 | { | 735 | { |
733 | unsigned long hdr_start = (ring_page - WD_START_PG)<<8; | 736 | unsigned long hdr_start = (ring_page - WD_START_PG)<<8; |
734 | memcpy_fromio((void *)hdr, (char *)dev->mem_start + hdr_start, 4); | 737 | memcpy_fromio(hdr, dev->mem_start + hdr_start, 4); |
735 | /* Fix endianness */ | 738 | /* Fix endianness */ |
736 | hdr->count = swab16(hdr->count); | 739 | hdr->count = swab16(hdr->count); |
737 | } | 740 | } |
@@ -745,14 +748,13 @@ static void sane_block_input(struct net_device *dev, int count, | |||
745 | if (xfer_start + count > ei_status.rmem_end) { | 748 | if (xfer_start + count > ei_status.rmem_end) { |
746 | /* We must wrap the input move. */ | 749 | /* We must wrap the input move. */ |
747 | int semi_count = ei_status.rmem_end - xfer_start; | 750 | int semi_count = ei_status.rmem_end - xfer_start; |
748 | memcpy_fromio(skb->data, (char *)dev->mem_start + xfer_base, | 751 | memcpy_fromio(skb->data, dev->mem_start + xfer_base, |
749 | semi_count); | 752 | semi_count); |
750 | count -= semi_count; | 753 | count -= semi_count; |
751 | memcpy_toio(skb->data + semi_count, | 754 | memcpy_fromio(skb->data + semi_count, ei_status.rmem_start, |
752 | (char *)ei_status.rmem_start, count); | ||
753 | } else { | ||
754 | memcpy_fromio(skb->data, (char *)dev->mem_start + xfer_base, | ||
755 | count); | 755 | count); |
756 | } else { | ||
757 | memcpy_fromio(skb->data, dev->mem_start + xfer_base, count); | ||
756 | } | 758 | } |
757 | } | 759 | } |
758 | 760 | ||
@@ -761,7 +763,7 @@ static void sane_block_output(struct net_device *dev, int count, | |||
761 | { | 763 | { |
762 | long shmem = (start_page - WD_START_PG)<<8; | 764 | long shmem = (start_page - WD_START_PG)<<8; |
763 | 765 | ||
764 | memcpy_toio((char *)dev->mem_start + shmem, buf, count); | 766 | memcpy_toio(dev->mem_start + shmem, buf, count); |
765 | } | 767 | } |
766 | 768 | ||
767 | /* dayna block input/output */ | 769 | /* dayna block input/output */ |
@@ -812,7 +814,7 @@ static void slow_sane_get_8390_hdr(struct net_device *dev, | |||
812 | int ring_page) | 814 | int ring_page) |
813 | { | 815 | { |
814 | unsigned long hdr_start = (ring_page - WD_START_PG)<<8; | 816 | unsigned long hdr_start = (ring_page - WD_START_PG)<<8; |
815 | word_memcpy_fromcard(hdr, (char *)dev->mem_start + hdr_start, 4); | 817 | word_memcpy_fromcard(hdr, dev->mem_start + hdr_start, 4); |
816 | /* Register endianism - fix here rather than 8390.c */ | 818 | /* Register endianism - fix here rather than 8390.c */ |
817 | hdr->count = (hdr->count&0xFF)<<8|(hdr->count>>8); | 819 | hdr->count = (hdr->count&0xFF)<<8|(hdr->count>>8); |
818 | } | 820 | } |
@@ -826,15 +828,14 @@ static void slow_sane_block_input(struct net_device *dev, int count, | |||
826 | if (xfer_start + count > ei_status.rmem_end) { | 828 | if (xfer_start + count > ei_status.rmem_end) { |
827 | /* We must wrap the input move. */ | 829 | /* We must wrap the input move. */ |
828 | int semi_count = ei_status.rmem_end - xfer_start; | 830 | int semi_count = ei_status.rmem_end - xfer_start; |
829 | word_memcpy_fromcard(skb->data, | 831 | word_memcpy_fromcard(skb->data, dev->mem_start + xfer_base, |
830 | (char *)dev->mem_start + xfer_base, | ||
831 | semi_count); | 832 | semi_count); |
832 | count -= semi_count; | 833 | count -= semi_count; |
833 | word_memcpy_fromcard(skb->data + semi_count, | 834 | word_memcpy_fromcard(skb->data + semi_count, |
834 | (char *)ei_status.rmem_start, count); | 835 | ei_status.rmem_start, count); |
835 | } else { | 836 | } else { |
836 | word_memcpy_fromcard(skb->data, | 837 | word_memcpy_fromcard(skb->data, dev->mem_start + xfer_base, |
837 | (char *)dev->mem_start + xfer_base, count); | 838 | count); |
838 | } | 839 | } |
839 | } | 840 | } |
840 | 841 | ||
@@ -843,12 +844,12 @@ static void slow_sane_block_output(struct net_device *dev, int count, | |||
843 | { | 844 | { |
844 | long shmem = (start_page - WD_START_PG)<<8; | 845 | long shmem = (start_page - WD_START_PG)<<8; |
845 | 846 | ||
846 | word_memcpy_tocard((char *)dev->mem_start + shmem, buf, count); | 847 | word_memcpy_tocard(dev->mem_start + shmem, buf, count); |
847 | } | 848 | } |
848 | 849 | ||
849 | static void word_memcpy_tocard(void *tp, const void *fp, int count) | 850 | static void word_memcpy_tocard(unsigned long tp, const void *fp, int count) |
850 | { | 851 | { |
851 | volatile unsigned short *to = tp; | 852 | volatile unsigned short *to = (void *)tp; |
852 | const unsigned short *from = fp; | 853 | const unsigned short *from = fp; |
853 | 854 | ||
854 | count++; | 855 | count++; |
@@ -858,10 +859,10 @@ static void word_memcpy_tocard(void *tp, const void *fp, int count) | |||
858 | *to++ = *from++; | 859 | *to++ = *from++; |
859 | } | 860 | } |
860 | 861 | ||
861 | static void word_memcpy_fromcard(void *tp, const void *fp, int count) | 862 | static void word_memcpy_fromcard(void *tp, unsigned long fp, int count) |
862 | { | 863 | { |
863 | unsigned short *to = tp; | 864 | unsigned short *to = tp; |
864 | const volatile unsigned short *from = fp; | 865 | const volatile unsigned short *from = (const void *)fp; |
865 | 866 | ||
866 | count++; | 867 | count++; |
867 | count /= 2; | 868 | count /= 2; |
diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c index 87e8d4cb4057..59c315556a30 100644 --- a/drivers/net/macvlan.c +++ b/drivers/net/macvlan.c | |||
@@ -37,6 +37,7 @@ struct macvlan_port { | |||
37 | struct net_device *dev; | 37 | struct net_device *dev; |
38 | struct hlist_head vlan_hash[MACVLAN_HASH_SIZE]; | 38 | struct hlist_head vlan_hash[MACVLAN_HASH_SIZE]; |
39 | struct list_head vlans; | 39 | struct list_head vlans; |
40 | struct rcu_head rcu; | ||
40 | }; | 41 | }; |
41 | 42 | ||
42 | static struct macvlan_dev *macvlan_hash_lookup(const struct macvlan_port *port, | 43 | static struct macvlan_dev *macvlan_hash_lookup(const struct macvlan_port *port, |
@@ -145,15 +146,16 @@ static void macvlan_broadcast(struct sk_buff *skb, | |||
145 | } | 146 | } |
146 | 147 | ||
147 | /* called under rcu_read_lock() from netif_receive_skb */ | 148 | /* called under rcu_read_lock() from netif_receive_skb */ |
148 | static struct sk_buff *macvlan_handle_frame(struct macvlan_port *port, | 149 | static struct sk_buff *macvlan_handle_frame(struct sk_buff *skb) |
149 | struct sk_buff *skb) | ||
150 | { | 150 | { |
151 | struct macvlan_port *port; | ||
151 | const struct ethhdr *eth = eth_hdr(skb); | 152 | const struct ethhdr *eth = eth_hdr(skb); |
152 | const struct macvlan_dev *vlan; | 153 | const struct macvlan_dev *vlan; |
153 | const struct macvlan_dev *src; | 154 | const struct macvlan_dev *src; |
154 | struct net_device *dev; | 155 | struct net_device *dev; |
155 | unsigned int len; | 156 | unsigned int len; |
156 | 157 | ||
158 | port = rcu_dereference(skb->dev->macvlan_port); | ||
157 | if (is_multicast_ether_addr(eth->h_dest)) { | 159 | if (is_multicast_ether_addr(eth->h_dest)) { |
158 | src = macvlan_hash_lookup(port, eth->h_source); | 160 | src = macvlan_hash_lookup(port, eth->h_source); |
159 | if (!src) | 161 | if (!src) |
@@ -515,6 +517,7 @@ static int macvlan_port_create(struct net_device *dev) | |||
515 | { | 517 | { |
516 | struct macvlan_port *port; | 518 | struct macvlan_port *port; |
517 | unsigned int i; | 519 | unsigned int i; |
520 | int err; | ||
518 | 521 | ||
519 | if (dev->type != ARPHRD_ETHER || dev->flags & IFF_LOOPBACK) | 522 | if (dev->type != ARPHRD_ETHER || dev->flags & IFF_LOOPBACK) |
520 | return -EINVAL; | 523 | return -EINVAL; |
@@ -528,16 +531,31 @@ static int macvlan_port_create(struct net_device *dev) | |||
528 | for (i = 0; i < MACVLAN_HASH_SIZE; i++) | 531 | for (i = 0; i < MACVLAN_HASH_SIZE; i++) |
529 | INIT_HLIST_HEAD(&port->vlan_hash[i]); | 532 | INIT_HLIST_HEAD(&port->vlan_hash[i]); |
530 | rcu_assign_pointer(dev->macvlan_port, port); | 533 | rcu_assign_pointer(dev->macvlan_port, port); |
531 | return 0; | 534 | |
535 | err = netdev_rx_handler_register(dev, macvlan_handle_frame); | ||
536 | if (err) { | ||
537 | rcu_assign_pointer(dev->macvlan_port, NULL); | ||
538 | kfree(port); | ||
539 | } | ||
540 | |||
541 | return err; | ||
542 | } | ||
543 | |||
544 | static void macvlan_port_rcu_free(struct rcu_head *head) | ||
545 | { | ||
546 | struct macvlan_port *port; | ||
547 | |||
548 | port = container_of(head, struct macvlan_port, rcu); | ||
549 | kfree(port); | ||
532 | } | 550 | } |
533 | 551 | ||
534 | static void macvlan_port_destroy(struct net_device *dev) | 552 | static void macvlan_port_destroy(struct net_device *dev) |
535 | { | 553 | { |
536 | struct macvlan_port *port = dev->macvlan_port; | 554 | struct macvlan_port *port = dev->macvlan_port; |
537 | 555 | ||
556 | netdev_rx_handler_unregister(dev); | ||
538 | rcu_assign_pointer(dev->macvlan_port, NULL); | 557 | rcu_assign_pointer(dev->macvlan_port, NULL); |
539 | synchronize_rcu(); | 558 | call_rcu(&port->rcu, macvlan_port_rcu_free); |
540 | kfree(port); | ||
541 | } | 559 | } |
542 | 560 | ||
543 | static int macvlan_validate(struct nlattr *tb[], struct nlattr *data[]) | 561 | static int macvlan_validate(struct nlattr *tb[], struct nlattr *data[]) |
@@ -767,14 +785,12 @@ static int __init macvlan_init_module(void) | |||
767 | int err; | 785 | int err; |
768 | 786 | ||
769 | register_netdevice_notifier(&macvlan_notifier_block); | 787 | register_netdevice_notifier(&macvlan_notifier_block); |
770 | macvlan_handle_frame_hook = macvlan_handle_frame; | ||
771 | 788 | ||
772 | err = macvlan_link_register(&macvlan_link_ops); | 789 | err = macvlan_link_register(&macvlan_link_ops); |
773 | if (err < 0) | 790 | if (err < 0) |
774 | goto err1; | 791 | goto err1; |
775 | return 0; | 792 | return 0; |
776 | err1: | 793 | err1: |
777 | macvlan_handle_frame_hook = NULL; | ||
778 | unregister_netdevice_notifier(&macvlan_notifier_block); | 794 | unregister_netdevice_notifier(&macvlan_notifier_block); |
779 | return err; | 795 | return err; |
780 | } | 796 | } |
@@ -782,7 +798,6 @@ err1: | |||
782 | static void __exit macvlan_cleanup_module(void) | 798 | static void __exit macvlan_cleanup_module(void) |
783 | { | 799 | { |
784 | rtnl_link_unregister(&macvlan_link_ops); | 800 | rtnl_link_unregister(&macvlan_link_ops); |
785 | macvlan_handle_frame_hook = NULL; | ||
786 | unregister_netdevice_notifier(&macvlan_notifier_block); | 801 | unregister_netdevice_notifier(&macvlan_notifier_block); |
787 | } | 802 | } |
788 | 803 | ||
diff --git a/drivers/net/mlx4/en_netdev.c b/drivers/net/mlx4/en_netdev.c index 96180c0ec206..a0d8a26f5a02 100644 --- a/drivers/net/mlx4/en_netdev.c +++ b/drivers/net/mlx4/en_netdev.c | |||
@@ -961,6 +961,7 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, | |||
961 | } | 961 | } |
962 | 962 | ||
963 | SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev); | 963 | SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev); |
964 | dev->dev_id = port - 1; | ||
964 | 965 | ||
965 | /* | 966 | /* |
966 | * Initialize driver private data | 967 | * Initialize driver private data |
diff --git a/drivers/net/mlx4/eq.c b/drivers/net/mlx4/eq.c index 423053482ed5..22d0b3b796b4 100644 --- a/drivers/net/mlx4/eq.c +++ b/drivers/net/mlx4/eq.c | |||
@@ -110,7 +110,7 @@ struct mlx4_eqe { | |||
110 | u32 raw[6]; | 110 | u32 raw[6]; |
111 | struct { | 111 | struct { |
112 | __be32 cqn; | 112 | __be32 cqn; |
113 | } __attribute__((packed)) comp; | 113 | } __packed comp; |
114 | struct { | 114 | struct { |
115 | u16 reserved1; | 115 | u16 reserved1; |
116 | __be16 token; | 116 | __be16 token; |
@@ -118,27 +118,27 @@ struct mlx4_eqe { | |||
118 | u8 reserved3[3]; | 118 | u8 reserved3[3]; |
119 | u8 status; | 119 | u8 status; |
120 | __be64 out_param; | 120 | __be64 out_param; |
121 | } __attribute__((packed)) cmd; | 121 | } __packed cmd; |
122 | struct { | 122 | struct { |
123 | __be32 qpn; | 123 | __be32 qpn; |
124 | } __attribute__((packed)) qp; | 124 | } __packed qp; |
125 | struct { | 125 | struct { |
126 | __be32 srqn; | 126 | __be32 srqn; |
127 | } __attribute__((packed)) srq; | 127 | } __packed srq; |
128 | struct { | 128 | struct { |
129 | __be32 cqn; | 129 | __be32 cqn; |
130 | u32 reserved1; | 130 | u32 reserved1; |
131 | u8 reserved2[3]; | 131 | u8 reserved2[3]; |
132 | u8 syndrome; | 132 | u8 syndrome; |
133 | } __attribute__((packed)) cq_err; | 133 | } __packed cq_err; |
134 | struct { | 134 | struct { |
135 | u32 reserved1[2]; | 135 | u32 reserved1[2]; |
136 | __be32 port; | 136 | __be32 port; |
137 | } __attribute__((packed)) port_change; | 137 | } __packed port_change; |
138 | } event; | 138 | } event; |
139 | u8 reserved3[3]; | 139 | u8 reserved3[3]; |
140 | u8 owner; | 140 | u8 owner; |
141 | } __attribute__((packed)); | 141 | } __packed; |
142 | 142 | ||
143 | static void eq_set_ci(struct mlx4_eq *eq, int req_not) | 143 | static void eq_set_ci(struct mlx4_eq *eq, int req_not) |
144 | { | 144 | { |
diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c index 3dc69be4949f..9c188bdd7f4f 100644 --- a/drivers/net/mlx4/mr.c +++ b/drivers/net/mlx4/mr.c | |||
@@ -58,7 +58,7 @@ struct mlx4_mpt_entry { | |||
58 | __be32 mtt_sz; | 58 | __be32 mtt_sz; |
59 | __be32 entity_size; | 59 | __be32 entity_size; |
60 | __be32 first_byte_offset; | 60 | __be32 first_byte_offset; |
61 | } __attribute__((packed)); | 61 | } __packed; |
62 | 62 | ||
63 | #define MLX4_MPT_FLAG_SW_OWNS (0xfUL << 28) | 63 | #define MLX4_MPT_FLAG_SW_OWNS (0xfUL << 28) |
64 | #define MLX4_MPT_FLAG_FREE (0x3UL << 28) | 64 | #define MLX4_MPT_FLAG_FREE (0x3UL << 28) |
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c index 1b2c29150202..e7b4187da057 100644 --- a/drivers/net/ppp_generic.c +++ b/drivers/net/ppp_generic.c | |||
@@ -69,7 +69,6 @@ | |||
69 | 69 | ||
70 | #define MPHDRLEN 6 /* multilink protocol header length */ | 70 | #define MPHDRLEN 6 /* multilink protocol header length */ |
71 | #define MPHDRLEN_SSN 4 /* ditto with short sequence numbers */ | 71 | #define MPHDRLEN_SSN 4 /* ditto with short sequence numbers */ |
72 | #define MIN_FRAG_SIZE 64 | ||
73 | 72 | ||
74 | /* | 73 | /* |
75 | * An instance of /dev/ppp can be associated with either a ppp | 74 | * An instance of /dev/ppp can be associated with either a ppp |
@@ -539,14 +538,9 @@ static int get_filter(void __user *arg, struct sock_filter **p) | |||
539 | } | 538 | } |
540 | 539 | ||
541 | len = uprog.len * sizeof(struct sock_filter); | 540 | len = uprog.len * sizeof(struct sock_filter); |
542 | code = kmalloc(len, GFP_KERNEL); | 541 | code = memdup_user(uprog.filter, len); |
543 | if (code == NULL) | 542 | if (IS_ERR(code)) |
544 | return -ENOMEM; | 543 | return PTR_ERR(code); |
545 | |||
546 | if (copy_from_user(code, uprog.filter, len)) { | ||
547 | kfree(code); | ||
548 | return -EFAULT; | ||
549 | } | ||
550 | 544 | ||
551 | err = sk_chk_filter(code, uprog.len); | 545 | err = sk_chk_filter(code, uprog.len); |
552 | if (err) { | 546 | if (err) { |
@@ -1933,9 +1927,9 @@ ppp_receive_mp_frame(struct ppp *ppp, struct sk_buff *skb, struct channel *pch) | |||
1933 | /* If the queue is getting long, don't wait any longer for packets | 1927 | /* If the queue is getting long, don't wait any longer for packets |
1934 | before the start of the queue. */ | 1928 | before the start of the queue. */ |
1935 | if (skb_queue_len(&ppp->mrq) >= PPP_MP_MAX_QLEN) { | 1929 | if (skb_queue_len(&ppp->mrq) >= PPP_MP_MAX_QLEN) { |
1936 | struct sk_buff *skb = skb_peek(&ppp->mrq); | 1930 | struct sk_buff *mskb = skb_peek(&ppp->mrq); |
1937 | if (seq_before(ppp->minseq, skb->sequence)) | 1931 | if (seq_before(ppp->minseq, mskb->sequence)) |
1938 | ppp->minseq = skb->sequence; | 1932 | ppp->minseq = mskb->sequence; |
1939 | } | 1933 | } |
1940 | 1934 | ||
1941 | /* Pull completed packets off the queue and receive them. */ | 1935 | /* Pull completed packets off the queue and receive them. */ |
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c index 805b64d1e893..344ef330e123 100644 --- a/drivers/net/pppoe.c +++ b/drivers/net/pppoe.c | |||
@@ -89,7 +89,6 @@ | |||
89 | #define PPPOE_HASH_SIZE (1 << PPPOE_HASH_BITS) | 89 | #define PPPOE_HASH_SIZE (1 << PPPOE_HASH_BITS) |
90 | #define PPPOE_HASH_MASK (PPPOE_HASH_SIZE - 1) | 90 | #define PPPOE_HASH_MASK (PPPOE_HASH_SIZE - 1) |
91 | 91 | ||
92 | static int pppoe_xmit(struct ppp_channel *chan, struct sk_buff *skb); | ||
93 | static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb); | 92 | static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb); |
94 | 93 | ||
95 | static const struct proto_ops pppoe_ops; | 94 | static const struct proto_ops pppoe_ops; |
@@ -949,7 +948,7 @@ static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb) | |||
949 | 948 | ||
950 | abort: | 949 | abort: |
951 | kfree_skb(skb); | 950 | kfree_skb(skb); |
952 | return 1; | 951 | return 0; |
953 | } | 952 | } |
954 | 953 | ||
955 | /************************************************************************ | 954 | /************************************************************************ |
diff --git a/drivers/net/ps3_gelic_wireless.h b/drivers/net/ps3_gelic_wireless.h index 0a88b535197a..f7e51b7d7049 100644 --- a/drivers/net/ps3_gelic_wireless.h +++ b/drivers/net/ps3_gelic_wireless.h | |||
@@ -74,7 +74,7 @@ struct gelic_eurus_common_cfg { | |||
74 | u16 bss_type; /* infra or adhoc */ | 74 | u16 bss_type; /* infra or adhoc */ |
75 | u16 auth_method; /* shared key or open */ | 75 | u16 auth_method; /* shared key or open */ |
76 | u16 op_mode; /* B/G */ | 76 | u16 op_mode; /* B/G */ |
77 | } __attribute__((packed)); | 77 | } __packed; |
78 | 78 | ||
79 | 79 | ||
80 | /* for GELIC_EURUS_CMD_WEP_CFG */ | 80 | /* for GELIC_EURUS_CMD_WEP_CFG */ |
@@ -88,7 +88,7 @@ struct gelic_eurus_wep_cfg { | |||
88 | /* all fields are big endian */ | 88 | /* all fields are big endian */ |
89 | u16 security; | 89 | u16 security; |
90 | u8 key[4][16]; | 90 | u8 key[4][16]; |
91 | } __attribute__((packed)); | 91 | } __packed; |
92 | 92 | ||
93 | /* for GELIC_EURUS_CMD_WPA_CFG */ | 93 | /* for GELIC_EURUS_CMD_WPA_CFG */ |
94 | enum gelic_eurus_wpa_security { | 94 | enum gelic_eurus_wpa_security { |
@@ -120,7 +120,7 @@ struct gelic_eurus_wpa_cfg { | |||
120 | u16 security; | 120 | u16 security; |
121 | u16 psk_type; /* psk key encoding type */ | 121 | u16 psk_type; /* psk key encoding type */ |
122 | u8 psk[GELIC_WL_EURUS_PSK_MAX_LEN]; /* psk key; hex or passphrase */ | 122 | u8 psk[GELIC_WL_EURUS_PSK_MAX_LEN]; /* psk key; hex or passphrase */ |
123 | } __attribute__((packed)); | 123 | } __packed; |
124 | 124 | ||
125 | /* for GELIC_EURUS_CMD_{START,GET}_SCAN */ | 125 | /* for GELIC_EURUS_CMD_{START,GET}_SCAN */ |
126 | enum gelic_eurus_scan_capability { | 126 | enum gelic_eurus_scan_capability { |
@@ -171,7 +171,7 @@ struct gelic_eurus_scan_info { | |||
171 | __be32 reserved3; | 171 | __be32 reserved3; |
172 | __be32 reserved4; | 172 | __be32 reserved4; |
173 | u8 elements[0]; /* ie */ | 173 | u8 elements[0]; /* ie */ |
174 | } __attribute__ ((packed)); | 174 | } __packed; |
175 | 175 | ||
176 | /* the hypervisor returns bbs up to 16 */ | 176 | /* the hypervisor returns bbs up to 16 */ |
177 | #define GELIC_EURUS_MAX_SCAN (16) | 177 | #define GELIC_EURUS_MAX_SCAN (16) |
@@ -193,7 +193,7 @@ struct gelic_wl_scan_info { | |||
193 | struct gelic_eurus_rssi_info { | 193 | struct gelic_eurus_rssi_info { |
194 | /* big endian */ | 194 | /* big endian */ |
195 | __be16 rssi; | 195 | __be16 rssi; |
196 | } __attribute__ ((packed)); | 196 | } __packed; |
197 | 197 | ||
198 | 198 | ||
199 | /* for 'stat' member of gelic_wl_info */ | 199 | /* for 'stat' member of gelic_wl_info */ |
diff --git a/drivers/net/qlcnic/qlcnic.h b/drivers/net/qlcnic/qlcnic.h index 896d40df9a13..02db363f20cd 100644 --- a/drivers/net/qlcnic/qlcnic.h +++ b/drivers/net/qlcnic/qlcnic.h | |||
@@ -51,8 +51,8 @@ | |||
51 | 51 | ||
52 | #define _QLCNIC_LINUX_MAJOR 5 | 52 | #define _QLCNIC_LINUX_MAJOR 5 |
53 | #define _QLCNIC_LINUX_MINOR 0 | 53 | #define _QLCNIC_LINUX_MINOR 0 |
54 | #define _QLCNIC_LINUX_SUBVERSION 2 | 54 | #define _QLCNIC_LINUX_SUBVERSION 3 |
55 | #define QLCNIC_LINUX_VERSIONID "5.0.2" | 55 | #define QLCNIC_LINUX_VERSIONID "5.0.3" |
56 | #define QLCNIC_DRV_IDC_VER 0x01 | 56 | #define QLCNIC_DRV_IDC_VER 0x01 |
57 | 57 | ||
58 | #define QLCNIC_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c)) | 58 | #define QLCNIC_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c)) |
@@ -197,8 +197,7 @@ struct cmd_desc_type0 { | |||
197 | 197 | ||
198 | __le64 addr_buffer4; | 198 | __le64 addr_buffer4; |
199 | 199 | ||
200 | __le32 reserved2; | 200 | u8 eth_addr[ETH_ALEN]; |
201 | __le16 reserved; | ||
202 | __le16 vlan_TCI; | 201 | __le16 vlan_TCI; |
203 | 202 | ||
204 | } __attribute__ ((aligned(64))); | 203 | } __attribute__ ((aligned(64))); |
@@ -315,6 +314,8 @@ struct uni_data_desc{ | |||
315 | #define QLCNIC_BRDTYPE_P3_10G_XFP 0x0032 | 314 | #define QLCNIC_BRDTYPE_P3_10G_XFP 0x0032 |
316 | #define QLCNIC_BRDTYPE_P3_10G_TP 0x0080 | 315 | #define QLCNIC_BRDTYPE_P3_10G_TP 0x0080 |
317 | 316 | ||
317 | #define QLCNIC_MSIX_TABLE_OFFSET 0x44 | ||
318 | |||
318 | /* Flash memory map */ | 319 | /* Flash memory map */ |
319 | #define QLCNIC_BRDCFG_START 0x4000 /* board config */ | 320 | #define QLCNIC_BRDCFG_START 0x4000 /* board config */ |
320 | #define QLCNIC_BOOTLD_START 0x10000 /* bootld */ | 321 | #define QLCNIC_BOOTLD_START 0x10000 /* bootld */ |
@@ -542,7 +543,17 @@ struct qlcnic_recv_context { | |||
542 | #define QLCNIC_CDRP_CMD_READ_PEXQ_PARAMETERS 0x0000001c | 543 | #define QLCNIC_CDRP_CMD_READ_PEXQ_PARAMETERS 0x0000001c |
543 | #define QLCNIC_CDRP_CMD_GET_LIC_CAPABILITIES 0x0000001d | 544 | #define QLCNIC_CDRP_CMD_GET_LIC_CAPABILITIES 0x0000001d |
544 | #define QLCNIC_CDRP_CMD_READ_MAX_LRO_PER_BOARD 0x0000001e | 545 | #define QLCNIC_CDRP_CMD_READ_MAX_LRO_PER_BOARD 0x0000001e |
545 | #define QLCNIC_CDRP_CMD_MAX 0x0000001f | 546 | #define QLCNIC_CDRP_CMD_MAC_ADDRESS 0x0000001f |
547 | |||
548 | #define QLCNIC_CDRP_CMD_GET_PCI_INFO 0x00000020 | ||
549 | #define QLCNIC_CDRP_CMD_GET_NIC_INFO 0x00000021 | ||
550 | #define QLCNIC_CDRP_CMD_SET_NIC_INFO 0x00000022 | ||
551 | #define QLCNIC_CDRP_CMD_RESET_NPAR 0x00000023 | ||
552 | #define QLCNIC_CDRP_CMD_GET_ESWITCH_CAPABILITY 0x00000024 | ||
553 | #define QLCNIC_CDRP_CMD_TOGGLE_ESWITCH 0x00000025 | ||
554 | #define QLCNIC_CDRP_CMD_GET_ESWITCH_STATUS 0x00000026 | ||
555 | #define QLCNIC_CDRP_CMD_SET_PORTMIRRORING 0x00000027 | ||
556 | #define QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH 0x00000028 | ||
546 | 557 | ||
547 | #define QLCNIC_RCODE_SUCCESS 0 | 558 | #define QLCNIC_RCODE_SUCCESS 0 |
548 | #define QLCNIC_RCODE_TIMEOUT 17 | 559 | #define QLCNIC_RCODE_TIMEOUT 17 |
@@ -560,7 +571,6 @@ struct qlcnic_recv_context { | |||
560 | /* | 571 | /* |
561 | * Context state | 572 | * Context state |
562 | */ | 573 | */ |
563 | #define QLCHAL_VERSION 1 | ||
564 | 574 | ||
565 | #define QLCNIC_HOST_CTX_STATE_ACTIVE 2 | 575 | #define QLCNIC_HOST_CTX_STATE_ACTIVE 2 |
566 | 576 | ||
@@ -881,12 +891,14 @@ struct qlcnic_mac_req { | |||
881 | #define QLCNIC_LRO_ENABLED 0x08 | 891 | #define QLCNIC_LRO_ENABLED 0x08 |
882 | #define QLCNIC_BRIDGE_ENABLED 0X10 | 892 | #define QLCNIC_BRIDGE_ENABLED 0X10 |
883 | #define QLCNIC_DIAG_ENABLED 0x20 | 893 | #define QLCNIC_DIAG_ENABLED 0x20 |
894 | #define QLCNIC_NPAR_ENABLED 0x40 | ||
884 | #define QLCNIC_IS_MSI_FAMILY(adapter) \ | 895 | #define QLCNIC_IS_MSI_FAMILY(adapter) \ |
885 | ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED)) | 896 | ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED)) |
886 | 897 | ||
887 | #define MSIX_ENTRIES_PER_ADAPTER NUM_STS_DESC_RINGS | 898 | #define MSIX_ENTRIES_PER_ADAPTER NUM_STS_DESC_RINGS |
888 | #define QLCNIC_MSIX_TBL_SPACE 8192 | 899 | #define QLCNIC_MSIX_TBL_SPACE 8192 |
889 | #define QLCNIC_PCI_REG_MSIX_TBL 0x44 | 900 | #define QLCNIC_PCI_REG_MSIX_TBL 0x44 |
901 | #define QLCNIC_MSIX_TBL_PGSIZE 4096 | ||
890 | 902 | ||
891 | #define QLCNIC_NETDEV_WEIGHT 128 | 903 | #define QLCNIC_NETDEV_WEIGHT 128 |
892 | #define QLCNIC_ADAPTER_UP_MAGIC 777 | 904 | #define QLCNIC_ADAPTER_UP_MAGIC 777 |
@@ -923,7 +935,6 @@ struct qlcnic_adapter { | |||
923 | u8 mc_enabled; | 935 | u8 mc_enabled; |
924 | u8 max_mc_count; | 936 | u8 max_mc_count; |
925 | u8 rss_supported; | 937 | u8 rss_supported; |
926 | u8 rsrvd1; | ||
927 | u8 fw_wait_cnt; | 938 | u8 fw_wait_cnt; |
928 | u8 fw_fail_cnt; | 939 | u8 fw_fail_cnt; |
929 | u8 tx_timeo_cnt; | 940 | u8 tx_timeo_cnt; |
@@ -940,6 +951,15 @@ struct qlcnic_adapter { | |||
940 | u16 link_autoneg; | 951 | u16 link_autoneg; |
941 | u16 module_type; | 952 | u16 module_type; |
942 | 953 | ||
954 | u16 op_mode; | ||
955 | u16 switch_mode; | ||
956 | u16 max_tx_ques; | ||
957 | u16 max_rx_ques; | ||
958 | u16 min_tx_bw; | ||
959 | u16 max_tx_bw; | ||
960 | u16 max_mtu; | ||
961 | |||
962 | u32 fw_hal_version; | ||
943 | u32 capabilities; | 963 | u32 capabilities; |
944 | u32 flags; | 964 | u32 flags; |
945 | u32 irq; | 965 | u32 irq; |
@@ -948,18 +968,22 @@ struct qlcnic_adapter { | |||
948 | u32 int_vec_bit; | 968 | u32 int_vec_bit; |
949 | u32 heartbit; | 969 | u32 heartbit; |
950 | 970 | ||
971 | u8 max_mac_filters; | ||
951 | u8 dev_state; | 972 | u8 dev_state; |
952 | u8 diag_test; | 973 | u8 diag_test; |
953 | u8 diag_cnt; | 974 | u8 diag_cnt; |
954 | u8 reset_ack_timeo; | 975 | u8 reset_ack_timeo; |
955 | u8 dev_init_timeo; | 976 | u8 dev_init_timeo; |
956 | u8 rsrd1; | ||
957 | u16 msg_enable; | 977 | u16 msg_enable; |
958 | 978 | ||
959 | u8 mac_addr[ETH_ALEN]; | 979 | u8 mac_addr[ETH_ALEN]; |
960 | 980 | ||
961 | u64 dev_rst_time; | 981 | u64 dev_rst_time; |
962 | 982 | ||
983 | struct qlcnic_pci_info *npars; | ||
984 | struct qlcnic_eswitch *eswitch; | ||
985 | struct qlcnic_nic_template *nic_ops; | ||
986 | |||
963 | struct qlcnic_adapter_stats stats; | 987 | struct qlcnic_adapter_stats stats; |
964 | 988 | ||
965 | struct qlcnic_recv_context recv_ctx; | 989 | struct qlcnic_recv_context recv_ctx; |
@@ -984,6 +1008,53 @@ struct qlcnic_adapter { | |||
984 | const struct firmware *fw; | 1008 | const struct firmware *fw; |
985 | }; | 1009 | }; |
986 | 1010 | ||
1011 | struct qlcnic_info { | ||
1012 | __le16 pci_func; | ||
1013 | __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */ | ||
1014 | __le16 phys_port; | ||
1015 | __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */ | ||
1016 | |||
1017 | __le32 capabilities; | ||
1018 | u8 max_mac_filters; | ||
1019 | u8 reserved1; | ||
1020 | __le16 max_mtu; | ||
1021 | |||
1022 | __le16 max_tx_ques; | ||
1023 | __le16 max_rx_ques; | ||
1024 | __le16 min_tx_bw; | ||
1025 | __le16 max_tx_bw; | ||
1026 | u8 reserved2[104]; | ||
1027 | }; | ||
1028 | |||
1029 | struct qlcnic_pci_info { | ||
1030 | __le16 id; /* pci function id */ | ||
1031 | __le16 active; /* 1 = Enabled */ | ||
1032 | __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */ | ||
1033 | __le16 default_port; /* default port number */ | ||
1034 | |||
1035 | __le16 tx_min_bw; /* Multiple of 100mbpc */ | ||
1036 | __le16 tx_max_bw; | ||
1037 | __le16 reserved1[2]; | ||
1038 | |||
1039 | u8 mac[ETH_ALEN]; | ||
1040 | u8 reserved2[106]; | ||
1041 | }; | ||
1042 | |||
1043 | struct qlcnic_eswitch { | ||
1044 | u8 port; | ||
1045 | u8 active_vports; | ||
1046 | u8 active_vlans; | ||
1047 | u8 active_ucast_filters; | ||
1048 | u8 max_ucast_filters; | ||
1049 | u8 max_active_vlans; | ||
1050 | |||
1051 | u32 flags; | ||
1052 | #define QLCNIC_SWITCH_ENABLE BIT_1 | ||
1053 | #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2 | ||
1054 | #define QLCNIC_SWITCH_PROMISC_MODE BIT_3 | ||
1055 | #define QLCNIC_SWITCH_PORT_MIRRORING BIT_4 | ||
1056 | }; | ||
1057 | |||
987 | int qlcnic_fw_cmd_query_phy(struct qlcnic_adapter *adapter, u32 reg, u32 *val); | 1058 | int qlcnic_fw_cmd_query_phy(struct qlcnic_adapter *adapter, u32 reg, u32 *val); |
988 | int qlcnic_fw_cmd_set_phy(struct qlcnic_adapter *adapter, u32 reg, u32 val); | 1059 | int qlcnic_fw_cmd_set_phy(struct qlcnic_adapter *adapter, u32 reg, u32 val); |
989 | 1060 | ||
@@ -1070,13 +1141,14 @@ void qlcnic_advert_link_change(struct qlcnic_adapter *adapter, int linkup); | |||
1070 | int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu); | 1141 | int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu); |
1071 | int qlcnic_change_mtu(struct net_device *netdev, int new_mtu); | 1142 | int qlcnic_change_mtu(struct net_device *netdev, int new_mtu); |
1072 | int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter, int enable); | 1143 | int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter, int enable); |
1073 | int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, int enable); | 1144 | int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable); |
1074 | int qlcnic_send_lro_cleanup(struct qlcnic_adapter *adapter); | 1145 | int qlcnic_send_lro_cleanup(struct qlcnic_adapter *adapter); |
1075 | void qlcnic_update_cmd_producer(struct qlcnic_adapter *adapter, | 1146 | void qlcnic_update_cmd_producer(struct qlcnic_adapter *adapter, |
1076 | struct qlcnic_host_tx_ring *tx_ring); | 1147 | struct qlcnic_host_tx_ring *tx_ring); |
1077 | int qlcnic_get_mac_addr(struct qlcnic_adapter *adapter, u64 *mac); | 1148 | int qlcnic_get_mac_addr(struct qlcnic_adapter *adapter, u8 *mac); |
1078 | void qlcnic_clear_ilb_mode(struct qlcnic_adapter *adapter); | 1149 | void qlcnic_clear_ilb_mode(struct qlcnic_adapter *adapter); |
1079 | int qlcnic_set_ilb_mode(struct qlcnic_adapter *adapter); | 1150 | int qlcnic_set_ilb_mode(struct qlcnic_adapter *adapter); |
1151 | void qlcnic_fetch_mac(struct qlcnic_adapter *, u32, u32, u8, u8 *); | ||
1080 | 1152 | ||
1081 | /* Functions from qlcnic_main.c */ | 1153 | /* Functions from qlcnic_main.c */ |
1082 | int qlcnic_reset_context(struct qlcnic_adapter *); | 1154 | int qlcnic_reset_context(struct qlcnic_adapter *); |
@@ -1088,6 +1160,25 @@ int qlcnic_check_loopback_buff(unsigned char *data); | |||
1088 | netdev_tx_t qlcnic_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | 1160 | netdev_tx_t qlcnic_xmit_frame(struct sk_buff *skb, struct net_device *netdev); |
1089 | void qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring); | 1161 | void qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring); |
1090 | 1162 | ||
1163 | /* Management functions */ | ||
1164 | int qlcnic_set_mac_address(struct qlcnic_adapter *, u8*); | ||
1165 | int qlcnic_get_mac_address(struct qlcnic_adapter *, u8*); | ||
1166 | int qlcnic_get_nic_info(struct qlcnic_adapter *, u8); | ||
1167 | int qlcnic_set_nic_info(struct qlcnic_adapter *, struct qlcnic_info *); | ||
1168 | int qlcnic_get_pci_info(struct qlcnic_adapter *); | ||
1169 | int qlcnic_reset_partition(struct qlcnic_adapter *, u8); | ||
1170 | |||
1171 | /* eSwitch management functions */ | ||
1172 | int qlcnic_get_eswitch_capabilities(struct qlcnic_adapter *, u8, | ||
1173 | struct qlcnic_eswitch *); | ||
1174 | int qlcnic_get_eswitch_status(struct qlcnic_adapter *, u8, | ||
1175 | struct qlcnic_eswitch *); | ||
1176 | int qlcnic_toggle_eswitch(struct qlcnic_adapter *, u8, u8); | ||
1177 | int qlcnic_config_switch_port(struct qlcnic_adapter *, u8, int, u8, u8, | ||
1178 | u8, u8, u16); | ||
1179 | int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8); | ||
1180 | extern int qlcnic_config_tso; | ||
1181 | |||
1091 | /* | 1182 | /* |
1092 | * QLOGIC Board information | 1183 | * QLOGIC Board information |
1093 | */ | 1184 | */ |
@@ -1131,6 +1222,15 @@ static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring) | |||
1131 | 1222 | ||
1132 | extern const struct ethtool_ops qlcnic_ethtool_ops; | 1223 | extern const struct ethtool_ops qlcnic_ethtool_ops; |
1133 | 1224 | ||
1225 | struct qlcnic_nic_template { | ||
1226 | int (*get_mac_addr) (struct qlcnic_adapter *, u8*); | ||
1227 | int (*config_bridged_mode) (struct qlcnic_adapter *, u32); | ||
1228 | int (*config_led) (struct qlcnic_adapter *, u32, u32); | ||
1229 | int (*set_ilb_mode) (struct qlcnic_adapter *); | ||
1230 | void (*clear_ilb_mode) (struct qlcnic_adapter *); | ||
1231 | int (*start_firmware) (struct qlcnic_adapter *); | ||
1232 | }; | ||
1233 | |||
1134 | #define QLCDB(adapter, lvl, _fmt, _args...) do { \ | 1234 | #define QLCDB(adapter, lvl, _fmt, _args...) do { \ |
1135 | if (NETIF_MSG_##lvl & adapter->msg_enable) \ | 1235 | if (NETIF_MSG_##lvl & adapter->msg_enable) \ |
1136 | printk(KERN_INFO "%s: %s: " _fmt, \ | 1236 | printk(KERN_INFO "%s: %s: " _fmt, \ |
diff --git a/drivers/net/qlcnic/qlcnic_ctx.c b/drivers/net/qlcnic/qlcnic_ctx.c index c2c1f5cc16c6..1e1dc58cddca 100644 --- a/drivers/net/qlcnic/qlcnic_ctx.c +++ b/drivers/net/qlcnic/qlcnic_ctx.c | |||
@@ -88,12 +88,12 @@ qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu) | |||
88 | 88 | ||
89 | if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) { | 89 | if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) { |
90 | if (qlcnic_issue_cmd(adapter, | 90 | if (qlcnic_issue_cmd(adapter, |
91 | adapter->ahw.pci_func, | 91 | adapter->ahw.pci_func, |
92 | QLCHAL_VERSION, | 92 | adapter->fw_hal_version, |
93 | recv_ctx->context_id, | 93 | recv_ctx->context_id, |
94 | mtu, | 94 | mtu, |
95 | 0, | 95 | 0, |
96 | QLCNIC_CDRP_CMD_SET_MTU)) { | 96 | QLCNIC_CDRP_CMD_SET_MTU)) { |
97 | 97 | ||
98 | dev_err(&adapter->pdev->dev, "Failed to set mtu\n"); | 98 | dev_err(&adapter->pdev->dev, "Failed to set mtu\n"); |
99 | return -EIO; | 99 | return -EIO; |
@@ -121,7 +121,7 @@ qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter) | |||
121 | 121 | ||
122 | int i, nrds_rings, nsds_rings; | 122 | int i, nrds_rings, nsds_rings; |
123 | size_t rq_size, rsp_size; | 123 | size_t rq_size, rsp_size; |
124 | u32 cap, reg, val; | 124 | u32 cap, reg, val, reg2; |
125 | int err; | 125 | int err; |
126 | 126 | ||
127 | struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx; | 127 | struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx; |
@@ -197,7 +197,7 @@ qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter) | |||
197 | phys_addr = hostrq_phys_addr; | 197 | phys_addr = hostrq_phys_addr; |
198 | err = qlcnic_issue_cmd(adapter, | 198 | err = qlcnic_issue_cmd(adapter, |
199 | adapter->ahw.pci_func, | 199 | adapter->ahw.pci_func, |
200 | QLCHAL_VERSION, | 200 | adapter->fw_hal_version, |
201 | (u32)(phys_addr >> 32), | 201 | (u32)(phys_addr >> 32), |
202 | (u32)(phys_addr & 0xffffffff), | 202 | (u32)(phys_addr & 0xffffffff), |
203 | rq_size, | 203 | rq_size, |
@@ -216,8 +216,12 @@ qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter) | |||
216 | rds_ring = &recv_ctx->rds_rings[i]; | 216 | rds_ring = &recv_ctx->rds_rings[i]; |
217 | 217 | ||
218 | reg = le32_to_cpu(prsp_rds[i].host_producer_crb); | 218 | reg = le32_to_cpu(prsp_rds[i].host_producer_crb); |
219 | rds_ring->crb_rcv_producer = qlcnic_get_ioaddr(adapter, | 219 | if (adapter->fw_hal_version == QLCNIC_FW_BASE) |
220 | rds_ring->crb_rcv_producer = qlcnic_get_ioaddr(adapter, | ||
220 | QLCNIC_REG(reg - 0x200)); | 221 | QLCNIC_REG(reg - 0x200)); |
222 | else | ||
223 | rds_ring->crb_rcv_producer = adapter->ahw.pci_base0 + | ||
224 | reg; | ||
221 | } | 225 | } |
222 | 226 | ||
223 | prsp_sds = ((struct qlcnic_cardrsp_sds_ring *) | 227 | prsp_sds = ((struct qlcnic_cardrsp_sds_ring *) |
@@ -227,12 +231,18 @@ qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter) | |||
227 | sds_ring = &recv_ctx->sds_rings[i]; | 231 | sds_ring = &recv_ctx->sds_rings[i]; |
228 | 232 | ||
229 | reg = le32_to_cpu(prsp_sds[i].host_consumer_crb); | 233 | reg = le32_to_cpu(prsp_sds[i].host_consumer_crb); |
230 | sds_ring->crb_sts_consumer = qlcnic_get_ioaddr(adapter, | 234 | reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb); |
231 | QLCNIC_REG(reg - 0x200)); | ||
232 | 235 | ||
233 | reg = le32_to_cpu(prsp_sds[i].interrupt_crb); | 236 | if (adapter->fw_hal_version == QLCNIC_FW_BASE) { |
234 | sds_ring->crb_intr_mask = qlcnic_get_ioaddr(adapter, | 237 | sds_ring->crb_sts_consumer = qlcnic_get_ioaddr(adapter, |
235 | QLCNIC_REG(reg - 0x200)); | 238 | QLCNIC_REG(reg - 0x200)); |
239 | sds_ring->crb_intr_mask = qlcnic_get_ioaddr(adapter, | ||
240 | QLCNIC_REG(reg2 - 0x200)); | ||
241 | } else { | ||
242 | sds_ring->crb_sts_consumer = adapter->ahw.pci_base0 + | ||
243 | reg; | ||
244 | sds_ring->crb_intr_mask = adapter->ahw.pci_base0 + reg2; | ||
245 | } | ||
236 | } | 246 | } |
237 | 247 | ||
238 | recv_ctx->state = le32_to_cpu(prsp->host_ctx_state); | 248 | recv_ctx->state = le32_to_cpu(prsp->host_ctx_state); |
@@ -253,7 +263,7 @@ qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter) | |||
253 | 263 | ||
254 | if (qlcnic_issue_cmd(adapter, | 264 | if (qlcnic_issue_cmd(adapter, |
255 | adapter->ahw.pci_func, | 265 | adapter->ahw.pci_func, |
256 | QLCHAL_VERSION, | 266 | adapter->fw_hal_version, |
257 | recv_ctx->context_id, | 267 | recv_ctx->context_id, |
258 | QLCNIC_DESTROY_CTX_RESET, | 268 | QLCNIC_DESTROY_CTX_RESET, |
259 | 0, | 269 | 0, |
@@ -319,7 +329,7 @@ qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter) | |||
319 | phys_addr = rq_phys_addr; | 329 | phys_addr = rq_phys_addr; |
320 | err = qlcnic_issue_cmd(adapter, | 330 | err = qlcnic_issue_cmd(adapter, |
321 | adapter->ahw.pci_func, | 331 | adapter->ahw.pci_func, |
322 | QLCHAL_VERSION, | 332 | adapter->fw_hal_version, |
323 | (u32)(phys_addr >> 32), | 333 | (u32)(phys_addr >> 32), |
324 | ((u32)phys_addr & 0xffffffff), | 334 | ((u32)phys_addr & 0xffffffff), |
325 | rq_size, | 335 | rq_size, |
@@ -327,8 +337,12 @@ qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter) | |||
327 | 337 | ||
328 | if (err == QLCNIC_RCODE_SUCCESS) { | 338 | if (err == QLCNIC_RCODE_SUCCESS) { |
329 | temp = le32_to_cpu(prsp->cds_ring.host_producer_crb); | 339 | temp = le32_to_cpu(prsp->cds_ring.host_producer_crb); |
330 | tx_ring->crb_cmd_producer = qlcnic_get_ioaddr(adapter, | 340 | if (adapter->fw_hal_version == QLCNIC_FW_BASE) |
341 | tx_ring->crb_cmd_producer = qlcnic_get_ioaddr(adapter, | ||
331 | QLCNIC_REG(temp - 0x200)); | 342 | QLCNIC_REG(temp - 0x200)); |
343 | else | ||
344 | tx_ring->crb_cmd_producer = adapter->ahw.pci_base0 + | ||
345 | temp; | ||
332 | 346 | ||
333 | adapter->tx_context_id = | 347 | adapter->tx_context_id = |
334 | le16_to_cpu(prsp->context_id); | 348 | le16_to_cpu(prsp->context_id); |
@@ -351,7 +365,7 @@ qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter) | |||
351 | { | 365 | { |
352 | if (qlcnic_issue_cmd(adapter, | 366 | if (qlcnic_issue_cmd(adapter, |
353 | adapter->ahw.pci_func, | 367 | adapter->ahw.pci_func, |
354 | QLCHAL_VERSION, | 368 | adapter->fw_hal_version, |
355 | adapter->tx_context_id, | 369 | adapter->tx_context_id, |
356 | QLCNIC_DESTROY_CTX_RESET, | 370 | QLCNIC_DESTROY_CTX_RESET, |
357 | 0, | 371 | 0, |
@@ -368,7 +382,7 @@ qlcnic_fw_cmd_query_phy(struct qlcnic_adapter *adapter, u32 reg, u32 *val) | |||
368 | 382 | ||
369 | if (qlcnic_issue_cmd(adapter, | 383 | if (qlcnic_issue_cmd(adapter, |
370 | adapter->ahw.pci_func, | 384 | adapter->ahw.pci_func, |
371 | QLCHAL_VERSION, | 385 | adapter->fw_hal_version, |
372 | reg, | 386 | reg, |
373 | 0, | 387 | 0, |
374 | 0, | 388 | 0, |
@@ -385,7 +399,7 @@ qlcnic_fw_cmd_set_phy(struct qlcnic_adapter *adapter, u32 reg, u32 val) | |||
385 | { | 399 | { |
386 | return qlcnic_issue_cmd(adapter, | 400 | return qlcnic_issue_cmd(adapter, |
387 | adapter->ahw.pci_func, | 401 | adapter->ahw.pci_func, |
388 | QLCHAL_VERSION, | 402 | adapter->fw_hal_version, |
389 | reg, | 403 | reg, |
390 | val, | 404 | val, |
391 | 0, | 405 | 0, |
@@ -533,3 +547,464 @@ void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter) | |||
533 | } | 547 | } |
534 | } | 548 | } |
535 | 549 | ||
550 | /* Set MAC address of a NIC partition */ | ||
551 | int qlcnic_set_mac_address(struct qlcnic_adapter *adapter, u8* mac) | ||
552 | { | ||
553 | int err = 0; | ||
554 | u32 arg1, arg2, arg3; | ||
555 | |||
556 | arg1 = adapter->ahw.pci_func | BIT_9; | ||
557 | arg2 = mac[0] | (mac[1] << 8) | (mac[2] << 16) | (mac[3] << 24); | ||
558 | arg3 = mac[4] | (mac[5] << 16); | ||
559 | |||
560 | err = qlcnic_issue_cmd(adapter, | ||
561 | adapter->ahw.pci_func, | ||
562 | adapter->fw_hal_version, | ||
563 | arg1, | ||
564 | arg2, | ||
565 | arg3, | ||
566 | QLCNIC_CDRP_CMD_MAC_ADDRESS); | ||
567 | |||
568 | if (err != QLCNIC_RCODE_SUCCESS) { | ||
569 | dev_err(&adapter->pdev->dev, | ||
570 | "Failed to set mac address%d\n", err); | ||
571 | err = -EIO; | ||
572 | } | ||
573 | |||
574 | return err; | ||
575 | } | ||
576 | |||
577 | /* Get MAC address of a NIC partition */ | ||
578 | int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac) | ||
579 | { | ||
580 | int err; | ||
581 | u32 arg1; | ||
582 | |||
583 | arg1 = adapter->ahw.pci_func | BIT_8; | ||
584 | err = qlcnic_issue_cmd(adapter, | ||
585 | adapter->ahw.pci_func, | ||
586 | adapter->fw_hal_version, | ||
587 | arg1, | ||
588 | 0, | ||
589 | 0, | ||
590 | QLCNIC_CDRP_CMD_MAC_ADDRESS); | ||
591 | |||
592 | if (err == QLCNIC_RCODE_SUCCESS) { | ||
593 | qlcnic_fetch_mac(adapter, QLCNIC_ARG1_CRB_OFFSET, | ||
594 | QLCNIC_ARG2_CRB_OFFSET, 0, mac); | ||
595 | dev_info(&adapter->pdev->dev, "MAC address: %pM\n", mac); | ||
596 | } else { | ||
597 | dev_err(&adapter->pdev->dev, | ||
598 | "Failed to get mac address%d\n", err); | ||
599 | err = -EIO; | ||
600 | } | ||
601 | |||
602 | return err; | ||
603 | } | ||
604 | |||
605 | /* Get info of a NIC partition */ | ||
606 | int qlcnic_get_nic_info(struct qlcnic_adapter *adapter, u8 func_id) | ||
607 | { | ||
608 | int err; | ||
609 | dma_addr_t nic_dma_t; | ||
610 | struct qlcnic_info *nic_info; | ||
611 | void *nic_info_addr; | ||
612 | size_t nic_size = sizeof(struct qlcnic_info); | ||
613 | |||
614 | nic_info_addr = pci_alloc_consistent(adapter->pdev, | ||
615 | nic_size, &nic_dma_t); | ||
616 | if (!nic_info_addr) | ||
617 | return -ENOMEM; | ||
618 | memset(nic_info_addr, 0, nic_size); | ||
619 | |||
620 | nic_info = (struct qlcnic_info *) nic_info_addr; | ||
621 | err = qlcnic_issue_cmd(adapter, | ||
622 | adapter->ahw.pci_func, | ||
623 | adapter->fw_hal_version, | ||
624 | MSD(nic_dma_t), | ||
625 | LSD(nic_dma_t), | ||
626 | (func_id << 16 | nic_size), | ||
627 | QLCNIC_CDRP_CMD_GET_NIC_INFO); | ||
628 | |||
629 | if (err == QLCNIC_RCODE_SUCCESS) { | ||
630 | adapter->physical_port = le16_to_cpu(nic_info->phys_port); | ||
631 | adapter->switch_mode = le16_to_cpu(nic_info->switch_mode); | ||
632 | adapter->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques); | ||
633 | adapter->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques); | ||
634 | adapter->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw); | ||
635 | adapter->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw); | ||
636 | adapter->max_mtu = le16_to_cpu(nic_info->max_mtu); | ||
637 | adapter->capabilities = le32_to_cpu(nic_info->capabilities); | ||
638 | adapter->max_mac_filters = nic_info->max_mac_filters; | ||
639 | |||
640 | dev_info(&adapter->pdev->dev, | ||
641 | "phy port: %d switch_mode: %d,\n" | ||
642 | "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n" | ||
643 | "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n", | ||
644 | adapter->physical_port, adapter->switch_mode, | ||
645 | adapter->max_tx_ques, adapter->max_rx_ques, | ||
646 | adapter->min_tx_bw, adapter->max_tx_bw, | ||
647 | adapter->max_mtu, adapter->capabilities); | ||
648 | } else { | ||
649 | dev_err(&adapter->pdev->dev, | ||
650 | "Failed to get nic info%d\n", err); | ||
651 | err = -EIO; | ||
652 | } | ||
653 | |||
654 | pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t); | ||
655 | return err; | ||
656 | } | ||
657 | |||
658 | /* Configure a NIC partition */ | ||
659 | int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic) | ||
660 | { | ||
661 | int err = -EIO; | ||
662 | u32 func_state; | ||
663 | dma_addr_t nic_dma_t; | ||
664 | void *nic_info_addr; | ||
665 | struct qlcnic_info *nic_info; | ||
666 | size_t nic_size = sizeof(struct qlcnic_info); | ||
667 | |||
668 | if (adapter->op_mode != QLCNIC_MGMT_FUNC) | ||
669 | return err; | ||
670 | |||
671 | if (qlcnic_api_lock(adapter)) | ||
672 | return err; | ||
673 | |||
674 | func_state = QLCRD32(adapter, QLCNIC_CRB_DEV_REF_COUNT); | ||
675 | if (QLC_DEV_CHECK_ACTIVE(func_state, nic->pci_func)) { | ||
676 | qlcnic_api_unlock(adapter); | ||
677 | return err; | ||
678 | } | ||
679 | |||
680 | qlcnic_api_unlock(adapter); | ||
681 | |||
682 | nic_info_addr = pci_alloc_consistent(adapter->pdev, nic_size, | ||
683 | &nic_dma_t); | ||
684 | if (!nic_info_addr) | ||
685 | return -ENOMEM; | ||
686 | |||
687 | memset(nic_info_addr, 0, nic_size); | ||
688 | nic_info = (struct qlcnic_info *)nic_info_addr; | ||
689 | |||
690 | nic_info->pci_func = cpu_to_le16(nic->pci_func); | ||
691 | nic_info->op_mode = cpu_to_le16(nic->op_mode); | ||
692 | nic_info->phys_port = cpu_to_le16(nic->phys_port); | ||
693 | nic_info->switch_mode = cpu_to_le16(nic->switch_mode); | ||
694 | nic_info->capabilities = cpu_to_le32(nic->capabilities); | ||
695 | nic_info->max_mac_filters = nic->max_mac_filters; | ||
696 | nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques); | ||
697 | nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques); | ||
698 | nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw); | ||
699 | nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw); | ||
700 | |||
701 | err = qlcnic_issue_cmd(adapter, | ||
702 | adapter->ahw.pci_func, | ||
703 | adapter->fw_hal_version, | ||
704 | MSD(nic_dma_t), | ||
705 | LSD(nic_dma_t), | ||
706 | nic_size, | ||
707 | QLCNIC_CDRP_CMD_SET_NIC_INFO); | ||
708 | |||
709 | if (err != QLCNIC_RCODE_SUCCESS) { | ||
710 | dev_err(&adapter->pdev->dev, | ||
711 | "Failed to set nic info%d\n", err); | ||
712 | err = -EIO; | ||
713 | } | ||
714 | |||
715 | pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t); | ||
716 | return err; | ||
717 | } | ||
718 | |||
719 | /* Get PCI Info of a partition */ | ||
720 | int qlcnic_get_pci_info(struct qlcnic_adapter *adapter) | ||
721 | { | ||
722 | int err = 0, i; | ||
723 | dma_addr_t pci_info_dma_t; | ||
724 | struct qlcnic_pci_info *npar; | ||
725 | void *pci_info_addr; | ||
726 | size_t npar_size = sizeof(struct qlcnic_pci_info); | ||
727 | size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC; | ||
728 | |||
729 | pci_info_addr = pci_alloc_consistent(adapter->pdev, pci_size, | ||
730 | &pci_info_dma_t); | ||
731 | if (!pci_info_addr) | ||
732 | return -ENOMEM; | ||
733 | memset(pci_info_addr, 0, pci_size); | ||
734 | |||
735 | if (!adapter->npars) | ||
736 | adapter->npars = kzalloc(pci_size, GFP_KERNEL); | ||
737 | if (!adapter->npars) { | ||
738 | err = -ENOMEM; | ||
739 | goto err_npar; | ||
740 | } | ||
741 | |||
742 | if (!adapter->eswitch) | ||
743 | adapter->eswitch = kzalloc(sizeof(struct qlcnic_eswitch) * | ||
744 | QLCNIC_NIU_MAX_XG_PORTS, GFP_KERNEL); | ||
745 | if (!adapter->eswitch) { | ||
746 | err = -ENOMEM; | ||
747 | goto err_eswitch; | ||
748 | } | ||
749 | |||
750 | npar = (struct qlcnic_pci_info *) pci_info_addr; | ||
751 | err = qlcnic_issue_cmd(adapter, | ||
752 | adapter->ahw.pci_func, | ||
753 | adapter->fw_hal_version, | ||
754 | MSD(pci_info_dma_t), | ||
755 | LSD(pci_info_dma_t), | ||
756 | pci_size, | ||
757 | QLCNIC_CDRP_CMD_GET_PCI_INFO); | ||
758 | |||
759 | if (err == QLCNIC_RCODE_SUCCESS) { | ||
760 | for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++) { | ||
761 | adapter->npars[i].id = le32_to_cpu(npar->id); | ||
762 | adapter->npars[i].active = le32_to_cpu(npar->active); | ||
763 | adapter->npars[i].type = le32_to_cpu(npar->type); | ||
764 | adapter->npars[i].default_port = | ||
765 | le32_to_cpu(npar->default_port); | ||
766 | adapter->npars[i].tx_min_bw = | ||
767 | le32_to_cpu(npar->tx_min_bw); | ||
768 | adapter->npars[i].tx_max_bw = | ||
769 | le32_to_cpu(npar->tx_max_bw); | ||
770 | memcpy(adapter->npars[i].mac, npar->mac, ETH_ALEN); | ||
771 | } | ||
772 | } else { | ||
773 | dev_err(&adapter->pdev->dev, | ||
774 | "Failed to get PCI Info%d\n", err); | ||
775 | kfree(adapter->npars); | ||
776 | err = -EIO; | ||
777 | } | ||
778 | goto err_npar; | ||
779 | |||
780 | err_eswitch: | ||
781 | kfree(adapter->npars); | ||
782 | adapter->npars = NULL; | ||
783 | |||
784 | err_npar: | ||
785 | pci_free_consistent(adapter->pdev, pci_size, pci_info_addr, | ||
786 | pci_info_dma_t); | ||
787 | return err; | ||
788 | } | ||
789 | |||
790 | /* Reset a NIC partition */ | ||
791 | |||
792 | int qlcnic_reset_partition(struct qlcnic_adapter *adapter, u8 func_no) | ||
793 | { | ||
794 | int err = -EIO; | ||
795 | |||
796 | if (adapter->op_mode != QLCNIC_MGMT_FUNC) | ||
797 | return err; | ||
798 | |||
799 | err = qlcnic_issue_cmd(adapter, | ||
800 | adapter->ahw.pci_func, | ||
801 | adapter->fw_hal_version, | ||
802 | func_no, | ||
803 | 0, | ||
804 | 0, | ||
805 | QLCNIC_CDRP_CMD_RESET_NPAR); | ||
806 | |||
807 | if (err != QLCNIC_RCODE_SUCCESS) { | ||
808 | dev_err(&adapter->pdev->dev, | ||
809 | "Failed to issue reset partition%d\n", err); | ||
810 | err = -EIO; | ||
811 | } | ||
812 | |||
813 | return err; | ||
814 | } | ||
815 | |||
816 | /* Get eSwitch Capabilities */ | ||
817 | int qlcnic_get_eswitch_capabilities(struct qlcnic_adapter *adapter, u8 port, | ||
818 | struct qlcnic_eswitch *eswitch) | ||
819 | { | ||
820 | int err = -EIO; | ||
821 | u32 arg1, arg2; | ||
822 | |||
823 | if (adapter->op_mode == QLCNIC_NON_PRIV_FUNC) | ||
824 | return err; | ||
825 | |||
826 | err = qlcnic_issue_cmd(adapter, | ||
827 | adapter->ahw.pci_func, | ||
828 | adapter->fw_hal_version, | ||
829 | port, | ||
830 | 0, | ||
831 | 0, | ||
832 | QLCNIC_CDRP_CMD_GET_ESWITCH_CAPABILITY); | ||
833 | |||
834 | if (err == QLCNIC_RCODE_SUCCESS) { | ||
835 | arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET); | ||
836 | arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET); | ||
837 | |||
838 | eswitch->port = arg1 & 0xf; | ||
839 | eswitch->active_vports = LSB(arg2); | ||
840 | eswitch->max_ucast_filters = MSB(arg2); | ||
841 | eswitch->max_active_vlans = LSB(MSW(arg2)); | ||
842 | if (arg1 & BIT_6) | ||
843 | eswitch->flags |= QLCNIC_SWITCH_VLAN_FILTERING; | ||
844 | if (arg1 & BIT_7) | ||
845 | eswitch->flags |= QLCNIC_SWITCH_PROMISC_MODE; | ||
846 | if (arg1 & BIT_8) | ||
847 | eswitch->flags |= QLCNIC_SWITCH_PORT_MIRRORING; | ||
848 | } else { | ||
849 | dev_err(&adapter->pdev->dev, | ||
850 | "Failed to get eswitch capabilities%d\n", err); | ||
851 | } | ||
852 | |||
853 | return err; | ||
854 | } | ||
855 | |||
856 | /* Get current status of eswitch */ | ||
857 | int qlcnic_get_eswitch_status(struct qlcnic_adapter *adapter, u8 port, | ||
858 | struct qlcnic_eswitch *eswitch) | ||
859 | { | ||
860 | int err = -EIO; | ||
861 | u32 arg1, arg2; | ||
862 | |||
863 | if (adapter->op_mode != QLCNIC_MGMT_FUNC) | ||
864 | return err; | ||
865 | |||
866 | err = qlcnic_issue_cmd(adapter, | ||
867 | adapter->ahw.pci_func, | ||
868 | adapter->fw_hal_version, | ||
869 | port, | ||
870 | 0, | ||
871 | 0, | ||
872 | QLCNIC_CDRP_CMD_GET_ESWITCH_STATUS); | ||
873 | |||
874 | if (err == QLCNIC_RCODE_SUCCESS) { | ||
875 | arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET); | ||
876 | arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET); | ||
877 | |||
878 | eswitch->port = arg1 & 0xf; | ||
879 | eswitch->active_vports = LSB(arg2); | ||
880 | eswitch->active_ucast_filters = MSB(arg2); | ||
881 | eswitch->active_vlans = LSB(MSW(arg2)); | ||
882 | if (arg1 & BIT_6) | ||
883 | eswitch->flags |= QLCNIC_SWITCH_VLAN_FILTERING; | ||
884 | if (arg1 & BIT_8) | ||
885 | eswitch->flags |= QLCNIC_SWITCH_PORT_MIRRORING; | ||
886 | |||
887 | } else { | ||
888 | dev_err(&adapter->pdev->dev, | ||
889 | "Failed to get eswitch status%d\n", err); | ||
890 | } | ||
891 | |||
892 | return err; | ||
893 | } | ||
894 | |||
895 | /* Enable/Disable eSwitch */ | ||
896 | int qlcnic_toggle_eswitch(struct qlcnic_adapter *adapter, u8 id, u8 enable) | ||
897 | { | ||
898 | int err = -EIO; | ||
899 | u32 arg1, arg2; | ||
900 | struct qlcnic_eswitch *eswitch; | ||
901 | |||
902 | if (adapter->op_mode != QLCNIC_MGMT_FUNC) | ||
903 | return err; | ||
904 | |||
905 | eswitch = &adapter->eswitch[id]; | ||
906 | if (!eswitch) | ||
907 | return err; | ||
908 | |||
909 | arg1 = eswitch->port | (enable ? BIT_4 : 0); | ||
910 | arg2 = eswitch->active_vports | (eswitch->max_ucast_filters << 8) | | ||
911 | (eswitch->max_active_vlans << 16); | ||
912 | err = qlcnic_issue_cmd(adapter, | ||
913 | adapter->ahw.pci_func, | ||
914 | adapter->fw_hal_version, | ||
915 | arg1, | ||
916 | arg2, | ||
917 | 0, | ||
918 | QLCNIC_CDRP_CMD_TOGGLE_ESWITCH); | ||
919 | |||
920 | if (err != QLCNIC_RCODE_SUCCESS) { | ||
921 | dev_err(&adapter->pdev->dev, | ||
922 | "Failed to enable eswitch%d\n", eswitch->port); | ||
923 | eswitch->flags &= ~QLCNIC_SWITCH_ENABLE; | ||
924 | err = -EIO; | ||
925 | } else { | ||
926 | eswitch->flags |= QLCNIC_SWITCH_ENABLE; | ||
927 | dev_info(&adapter->pdev->dev, | ||
928 | "Enabled eSwitch for port %d\n", eswitch->port); | ||
929 | } | ||
930 | |||
931 | return err; | ||
932 | } | ||
933 | |||
934 | /* Configure eSwitch for port mirroring */ | ||
935 | int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id, | ||
936 | u8 enable_mirroring, u8 pci_func) | ||
937 | { | ||
938 | int err = -EIO; | ||
939 | u32 arg1; | ||
940 | |||
941 | if (adapter->op_mode != QLCNIC_MGMT_FUNC || | ||
942 | !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE)) | ||
943 | return err; | ||
944 | |||
945 | arg1 = id | (enable_mirroring ? BIT_4 : 0); | ||
946 | arg1 |= pci_func << 8; | ||
947 | |||
948 | err = qlcnic_issue_cmd(adapter, | ||
949 | adapter->ahw.pci_func, | ||
950 | adapter->fw_hal_version, | ||
951 | arg1, | ||
952 | 0, | ||
953 | 0, | ||
954 | QLCNIC_CDRP_CMD_SET_PORTMIRRORING); | ||
955 | |||
956 | if (err != QLCNIC_RCODE_SUCCESS) { | ||
957 | dev_err(&adapter->pdev->dev, | ||
958 | "Failed to configure port mirroring%d on eswitch:%d\n", | ||
959 | pci_func, id); | ||
960 | } else { | ||
961 | dev_info(&adapter->pdev->dev, | ||
962 | "Configured eSwitch %d for port mirroring:%d\n", | ||
963 | id, pci_func); | ||
964 | } | ||
965 | |||
966 | return err; | ||
967 | } | ||
968 | |||
969 | /* Configure eSwitch port */ | ||
970 | int qlcnic_config_switch_port(struct qlcnic_adapter *adapter, u8 id, | ||
971 | int vlan_tagging, u8 discard_tagged, u8 promsc_mode, | ||
972 | u8 mac_learn, u8 pci_func, u16 vlan_id) | ||
973 | { | ||
974 | int err = -EIO; | ||
975 | u32 arg1; | ||
976 | struct qlcnic_eswitch *eswitch; | ||
977 | |||
978 | if (adapter->op_mode != QLCNIC_MGMT_FUNC) | ||
979 | return err; | ||
980 | |||
981 | eswitch = &adapter->eswitch[id]; | ||
982 | if (!(eswitch->flags & QLCNIC_SWITCH_ENABLE)) | ||
983 | return err; | ||
984 | |||
985 | arg1 = eswitch->port | (discard_tagged ? BIT_4 : 0); | ||
986 | arg1 |= (promsc_mode ? BIT_6 : 0) | (mac_learn ? BIT_7 : 0); | ||
987 | arg1 |= pci_func << 8; | ||
988 | if (vlan_tagging) | ||
989 | arg1 |= BIT_5 | (vlan_id << 16); | ||
990 | |||
991 | err = qlcnic_issue_cmd(adapter, | ||
992 | adapter->ahw.pci_func, | ||
993 | adapter->fw_hal_version, | ||
994 | arg1, | ||
995 | 0, | ||
996 | 0, | ||
997 | QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH); | ||
998 | |||
999 | if (err != QLCNIC_RCODE_SUCCESS) { | ||
1000 | dev_err(&adapter->pdev->dev, | ||
1001 | "Failed to configure eswitch port%d\n", eswitch->port); | ||
1002 | eswitch->flags |= QLCNIC_SWITCH_ENABLE; | ||
1003 | } else { | ||
1004 | eswitch->flags &= ~QLCNIC_SWITCH_ENABLE; | ||
1005 | dev_info(&adapter->pdev->dev, | ||
1006 | "Configured eSwitch for port %d\n", eswitch->port); | ||
1007 | } | ||
1008 | |||
1009 | return err; | ||
1010 | } | ||
diff --git a/drivers/net/qlcnic/qlcnic_ethtool.c b/drivers/net/qlcnic/qlcnic_ethtool.c index 3bd514ec7e8f..3e4822ad5a80 100644 --- a/drivers/net/qlcnic/qlcnic_ethtool.c +++ b/drivers/net/qlcnic/qlcnic_ethtool.c | |||
@@ -683,13 +683,13 @@ static int qlcnic_loopback_test(struct net_device *netdev) | |||
683 | if (ret) | 683 | if (ret) |
684 | goto clear_it; | 684 | goto clear_it; |
685 | 685 | ||
686 | ret = qlcnic_set_ilb_mode(adapter); | 686 | ret = adapter->nic_ops->set_ilb_mode(adapter); |
687 | if (ret) | 687 | if (ret) |
688 | goto done; | 688 | goto done; |
689 | 689 | ||
690 | ret = qlcnic_do_ilb_test(adapter); | 690 | ret = qlcnic_do_ilb_test(adapter); |
691 | 691 | ||
692 | qlcnic_clear_ilb_mode(adapter); | 692 | adapter->nic_ops->clear_ilb_mode(adapter); |
693 | 693 | ||
694 | done: | 694 | done: |
695 | qlcnic_diag_free_res(netdev, max_sds_rings); | 695 | qlcnic_diag_free_res(netdev, max_sds_rings); |
@@ -715,7 +715,8 @@ static int qlcnic_irq_test(struct net_device *netdev) | |||
715 | 715 | ||
716 | adapter->diag_cnt = 0; | 716 | adapter->diag_cnt = 0; |
717 | ret = qlcnic_issue_cmd(adapter, adapter->ahw.pci_func, | 717 | ret = qlcnic_issue_cmd(adapter, adapter->ahw.pci_func, |
718 | QLCHAL_VERSION, adapter->portnum, 0, 0, 0x00000011); | 718 | adapter->fw_hal_version, adapter->portnum, |
719 | 0, 0, 0x00000011); | ||
719 | if (ret) | 720 | if (ret) |
720 | goto done; | 721 | goto done; |
721 | 722 | ||
@@ -834,7 +835,7 @@ static int qlcnic_blink_led(struct net_device *dev, u32 val) | |||
834 | struct qlcnic_adapter *adapter = netdev_priv(dev); | 835 | struct qlcnic_adapter *adapter = netdev_priv(dev); |
835 | int ret; | 836 | int ret; |
836 | 837 | ||
837 | ret = qlcnic_config_led(adapter, 1, 0xf); | 838 | ret = adapter->nic_ops->config_led(adapter, 1, 0xf); |
838 | if (ret) { | 839 | if (ret) { |
839 | dev_err(&adapter->pdev->dev, | 840 | dev_err(&adapter->pdev->dev, |
840 | "Failed to set LED blink state.\n"); | 841 | "Failed to set LED blink state.\n"); |
@@ -843,7 +844,7 @@ static int qlcnic_blink_led(struct net_device *dev, u32 val) | |||
843 | 844 | ||
844 | msleep_interruptible(val * 1000); | 845 | msleep_interruptible(val * 1000); |
845 | 846 | ||
846 | ret = qlcnic_config_led(adapter, 0, 0xf); | 847 | ret = adapter->nic_ops->config_led(adapter, 0, 0xf); |
847 | if (ret) { | 848 | if (ret) { |
848 | dev_err(&adapter->pdev->dev, | 849 | dev_err(&adapter->pdev->dev, |
849 | "Failed to reset LED blink state.\n"); | 850 | "Failed to reset LED blink state.\n"); |
diff --git a/drivers/net/qlcnic/qlcnic_hdr.h b/drivers/net/qlcnic/qlcnic_hdr.h index ad9d167723c4..7b81cab27002 100644 --- a/drivers/net/qlcnic/qlcnic_hdr.h +++ b/drivers/net/qlcnic/qlcnic_hdr.h | |||
@@ -208,6 +208,39 @@ enum { | |||
208 | QLCNIC_HW_PX_MAP_CRB_PGR0 | 208 | QLCNIC_HW_PX_MAP_CRB_PGR0 |
209 | }; | 209 | }; |
210 | 210 | ||
211 | #define BIT_0 0x1 | ||
212 | #define BIT_1 0x2 | ||
213 | #define BIT_2 0x4 | ||
214 | #define BIT_3 0x8 | ||
215 | #define BIT_4 0x10 | ||
216 | #define BIT_5 0x20 | ||
217 | #define BIT_6 0x40 | ||
218 | #define BIT_7 0x80 | ||
219 | #define BIT_8 0x100 | ||
220 | #define BIT_9 0x200 | ||
221 | #define BIT_10 0x400 | ||
222 | #define BIT_11 0x800 | ||
223 | #define BIT_12 0x1000 | ||
224 | #define BIT_13 0x2000 | ||
225 | #define BIT_14 0x4000 | ||
226 | #define BIT_15 0x8000 | ||
227 | #define BIT_16 0x10000 | ||
228 | #define BIT_17 0x20000 | ||
229 | #define BIT_18 0x40000 | ||
230 | #define BIT_19 0x80000 | ||
231 | #define BIT_20 0x100000 | ||
232 | #define BIT_21 0x200000 | ||
233 | #define BIT_22 0x400000 | ||
234 | #define BIT_23 0x800000 | ||
235 | #define BIT_24 0x1000000 | ||
236 | #define BIT_25 0x2000000 | ||
237 | #define BIT_26 0x4000000 | ||
238 | #define BIT_27 0x8000000 | ||
239 | #define BIT_28 0x10000000 | ||
240 | #define BIT_29 0x20000000 | ||
241 | #define BIT_30 0x40000000 | ||
242 | #define BIT_31 0x80000000 | ||
243 | |||
211 | /* This field defines CRB adr [31:20] of the agents */ | 244 | /* This field defines CRB adr [31:20] of the agents */ |
212 | 245 | ||
213 | #define QLCNIC_HW_CRB_HUB_AGT_ADR_MN \ | 246 | #define QLCNIC_HW_CRB_HUB_AGT_ADR_MN \ |
@@ -668,10 +701,11 @@ enum { | |||
668 | #define QLCNIC_CRB_DEV_REF_COUNT (QLCNIC_CAM_RAM(0x138)) | 701 | #define QLCNIC_CRB_DEV_REF_COUNT (QLCNIC_CAM_RAM(0x138)) |
669 | #define QLCNIC_CRB_DEV_STATE (QLCNIC_CAM_RAM(0x140)) | 702 | #define QLCNIC_CRB_DEV_STATE (QLCNIC_CAM_RAM(0x140)) |
670 | 703 | ||
671 | #define QLCNIC_CRB_DRV_STATE (QLCNIC_CAM_RAM(0x144)) | 704 | #define QLCNIC_CRB_DRV_STATE (QLCNIC_CAM_RAM(0x144)) |
672 | #define QLCNIC_CRB_DRV_SCRATCH (QLCNIC_CAM_RAM(0x148)) | 705 | #define QLCNIC_CRB_DRV_SCRATCH (QLCNIC_CAM_RAM(0x148)) |
673 | #define QLCNIC_CRB_DEV_PARTITION_INFO (QLCNIC_CAM_RAM(0x14c)) | 706 | #define QLCNIC_CRB_DEV_PARTITION_INFO (QLCNIC_CAM_RAM(0x14c)) |
674 | #define QLCNIC_CRB_DRV_IDC_VER (QLCNIC_CAM_RAM(0x174)) | 707 | #define QLCNIC_CRB_DRV_IDC_VER (QLCNIC_CAM_RAM(0x174)) |
708 | #define QLCNIC_CRB_DEV_NPAR_STATE (QLCNIC_CAM_RAM(0x19c)) | ||
675 | #define QLCNIC_ROM_DEV_INIT_TIMEOUT (0x3e885c) | 709 | #define QLCNIC_ROM_DEV_INIT_TIMEOUT (0x3e885c) |
676 | #define QLCNIC_ROM_DRV_RESET_TIMEOUT (0x3e8860) | 710 | #define QLCNIC_ROM_DRV_RESET_TIMEOUT (0x3e8860) |
677 | 711 | ||
@@ -684,15 +718,26 @@ enum { | |||
684 | #define QLCNIC_DEV_FAILED 0x6 | 718 | #define QLCNIC_DEV_FAILED 0x6 |
685 | #define QLCNIC_DEV_QUISCENT 0x7 | 719 | #define QLCNIC_DEV_QUISCENT 0x7 |
686 | 720 | ||
721 | #define QLCNIC_DEV_NPAR_NOT_RDY 0 | ||
722 | #define QLCNIC_DEV_NPAR_RDY 1 | ||
723 | |||
724 | #define QLC_DEV_CHECK_ACTIVE(VAL, FN) ((VAL) &= (1 << (FN * 4))) | ||
687 | #define QLC_DEV_SET_REF_CNT(VAL, FN) ((VAL) |= (1 << (FN * 4))) | 725 | #define QLC_DEV_SET_REF_CNT(VAL, FN) ((VAL) |= (1 << (FN * 4))) |
688 | #define QLC_DEV_CLR_REF_CNT(VAL, FN) ((VAL) &= ~(1 << (FN * 4))) | 726 | #define QLC_DEV_CLR_REF_CNT(VAL, FN) ((VAL) &= ~(1 << (FN * 4))) |
689 | #define QLC_DEV_SET_RST_RDY(VAL, FN) ((VAL) |= (1 << (FN * 4))) | 727 | #define QLC_DEV_SET_RST_RDY(VAL, FN) ((VAL) |= (1 << (FN * 4))) |
690 | #define QLC_DEV_SET_QSCNT_RDY(VAL, FN) ((VAL) |= (2 << (FN * 4))) | 728 | #define QLC_DEV_SET_QSCNT_RDY(VAL, FN) ((VAL) |= (2 << (FN * 4))) |
691 | #define QLC_DEV_CLR_RST_QSCNT(VAL, FN) ((VAL) &= ~(3 << (FN * 4))) | 729 | #define QLC_DEV_CLR_RST_QSCNT(VAL, FN) ((VAL) &= ~(3 << (FN * 4))) |
692 | 730 | ||
731 | #define QLC_DEV_GET_DRV(VAL, FN) (0xf & ((VAL) >> (FN * 4))) | ||
732 | #define QLC_DEV_SET_DRV(VAL, FN) ((VAL) << (FN * 4)) | ||
733 | |||
734 | #define QLCNIC_TYPE_NIC 1 | ||
735 | #define QLCNIC_TYPE_FCOE 2 | ||
736 | #define QLCNIC_TYPE_ISCSI 3 | ||
737 | |||
693 | #define QLCNIC_RCODE_DRIVER_INFO 0x20000000 | 738 | #define QLCNIC_RCODE_DRIVER_INFO 0x20000000 |
694 | #define QLCNIC_RCODE_DRIVER_CAN_RELOAD 0x40000000 | 739 | #define QLCNIC_RCODE_DRIVER_CAN_RELOAD BIT_30 |
695 | #define QLCNIC_RCODE_FATAL_ERROR 0x80000000 | 740 | #define QLCNIC_RCODE_FATAL_ERROR BIT_31 |
696 | #define QLCNIC_FWERROR_PEGNUM(code) ((code) & 0xff) | 741 | #define QLCNIC_FWERROR_PEGNUM(code) ((code) & 0xff) |
697 | #define QLCNIC_FWERROR_CODE(code) ((code >> 8) & 0xfffff) | 742 | #define QLCNIC_FWERROR_CODE(code) ((code >> 8) & 0xfffff) |
698 | 743 | ||
@@ -721,6 +766,35 @@ struct qlcnic_legacy_intr_set { | |||
721 | u32 pci_int_reg; | 766 | u32 pci_int_reg; |
722 | }; | 767 | }; |
723 | 768 | ||
769 | #define QLCNIC_FW_API 0x1b216c | ||
770 | #define QLCNIC_DRV_OP_MODE 0x1b2170 | ||
771 | #define QLCNIC_MSIX_BASE 0x132110 | ||
772 | #define QLCNIC_MAX_PCI_FUNC 8 | ||
773 | |||
774 | /* PCI function operational mode */ | ||
775 | enum { | ||
776 | QLCNIC_MGMT_FUNC = 0, | ||
777 | QLCNIC_PRIV_FUNC = 1, | ||
778 | QLCNIC_NON_PRIV_FUNC = 2 | ||
779 | }; | ||
780 | |||
781 | /* FW HAL api version */ | ||
782 | enum { | ||
783 | QLCNIC_FW_BASE = 1, | ||
784 | QLCNIC_FW_NPAR = 2 | ||
785 | }; | ||
786 | |||
787 | #define QLC_DEV_DRV_DEFAULT 0x11111111 | ||
788 | |||
789 | #define LSB(x) ((uint8_t)(x)) | ||
790 | #define MSB(x) ((uint8_t)((uint16_t)(x) >> 8)) | ||
791 | |||
792 | #define LSW(x) ((uint16_t)((uint32_t)(x))) | ||
793 | #define MSW(x) ((uint16_t)((uint32_t)(x) >> 16)) | ||
794 | |||
795 | #define LSD(x) ((uint32_t)((uint64_t)(x))) | ||
796 | #define MSD(x) ((uint32_t)((((uint64_t)(x)) >> 16) >> 16)) | ||
797 | |||
724 | #define QLCNIC_LEGACY_INTR_CONFIG \ | 798 | #define QLCNIC_LEGACY_INTR_CONFIG \ |
725 | { \ | 799 | { \ |
726 | { \ | 800 | { \ |
diff --git a/drivers/net/qlcnic/qlcnic_hw.c b/drivers/net/qlcnic/qlcnic_hw.c index 0c2e1f08f459..f776956d2d6c 100644 --- a/drivers/net/qlcnic/qlcnic_hw.c +++ b/drivers/net/qlcnic/qlcnic_hw.c | |||
@@ -538,7 +538,7 @@ int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter, int enable) | |||
538 | return rv; | 538 | return rv; |
539 | } | 539 | } |
540 | 540 | ||
541 | int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, int enable) | 541 | int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable) |
542 | { | 542 | { |
543 | struct qlcnic_nic_req req; | 543 | struct qlcnic_nic_req req; |
544 | u64 word; | 544 | u64 word; |
@@ -704,21 +704,15 @@ int qlcnic_change_mtu(struct net_device *netdev, int mtu) | |||
704 | return rc; | 704 | return rc; |
705 | } | 705 | } |
706 | 706 | ||
707 | int qlcnic_get_mac_addr(struct qlcnic_adapter *adapter, u64 *mac) | 707 | int qlcnic_get_mac_addr(struct qlcnic_adapter *adapter, u8 *mac) |
708 | { | 708 | { |
709 | u32 crbaddr, mac_hi, mac_lo; | 709 | u32 crbaddr; |
710 | int pci_func = adapter->ahw.pci_func; | 710 | int pci_func = adapter->ahw.pci_func; |
711 | 711 | ||
712 | crbaddr = CRB_MAC_BLOCK_START + | 712 | crbaddr = CRB_MAC_BLOCK_START + |
713 | (4 * ((pci_func/2) * 3)) + (4 * (pci_func & 1)); | 713 | (4 * ((pci_func/2) * 3)) + (4 * (pci_func & 1)); |
714 | 714 | ||
715 | mac_lo = QLCRD32(adapter, crbaddr); | 715 | qlcnic_fetch_mac(adapter, crbaddr, crbaddr+4, pci_func & 1, mac); |
716 | mac_hi = QLCRD32(adapter, crbaddr+4); | ||
717 | |||
718 | if (pci_func & 1) | ||
719 | *mac = le64_to_cpu((mac_lo >> 16) | ((u64)mac_hi << 16)); | ||
720 | else | ||
721 | *mac = le64_to_cpu((u64)mac_lo | ((u64)mac_hi << 32)); | ||
722 | 716 | ||
723 | return 0; | 717 | return 0; |
724 | } | 718 | } |
diff --git a/drivers/net/qlcnic/qlcnic_init.c b/drivers/net/qlcnic/qlcnic_init.c index 71a4e664ad76..635c99022f06 100644 --- a/drivers/net/qlcnic/qlcnic_init.c +++ b/drivers/net/qlcnic/qlcnic_init.c | |||
@@ -520,17 +520,16 @@ qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) { | |||
520 | int timeo; | 520 | int timeo; |
521 | u32 val; | 521 | u32 val; |
522 | 522 | ||
523 | val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO); | 523 | if (adapter->fw_hal_version == QLCNIC_FW_BASE) { |
524 | val = (val >> (adapter->portnum * 4)) & 0xf; | 524 | val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO); |
525 | 525 | val = QLC_DEV_GET_DRV(val, adapter->portnum); | |
526 | if ((val & 0x3) != 1) { | 526 | if ((val & 0x3) != QLCNIC_TYPE_NIC) { |
527 | dev_err(&adapter->pdev->dev, "Not an Ethernet NIC func=%u\n", | 527 | dev_err(&adapter->pdev->dev, |
528 | val); | 528 | "Not an Ethernet NIC func=%u\n", val); |
529 | return -EIO; | 529 | return -EIO; |
530 | } | ||
531 | adapter->physical_port = (val >> 2); | ||
530 | } | 532 | } |
531 | |||
532 | adapter->physical_port = (val >> 2); | ||
533 | |||
534 | if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo)) | 533 | if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo)) |
535 | timeo = 30; | 534 | timeo = 30; |
536 | 535 | ||
@@ -1701,3 +1700,24 @@ qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring) | |||
1701 | sds_ring->consumer = consumer; | 1700 | sds_ring->consumer = consumer; |
1702 | writel(consumer, sds_ring->crb_sts_consumer); | 1701 | writel(consumer, sds_ring->crb_sts_consumer); |
1703 | } | 1702 | } |
1703 | |||
1704 | void | ||
1705 | qlcnic_fetch_mac(struct qlcnic_adapter *adapter, u32 off1, u32 off2, | ||
1706 | u8 alt_mac, u8 *mac) | ||
1707 | { | ||
1708 | u32 mac_low, mac_high; | ||
1709 | int i; | ||
1710 | |||
1711 | mac_low = QLCRD32(adapter, off1); | ||
1712 | mac_high = QLCRD32(adapter, off2); | ||
1713 | |||
1714 | if (alt_mac) { | ||
1715 | mac_low |= (mac_low >> 16) | (mac_high << 16); | ||
1716 | mac_high >>= 16; | ||
1717 | } | ||
1718 | |||
1719 | for (i = 0; i < 2; i++) | ||
1720 | mac[i] = (u8)(mac_high >> ((1 - i) * 8)); | ||
1721 | for (i = 2; i < 6; i++) | ||
1722 | mac[i] = (u8)(mac_low >> ((5 - i) * 8)); | ||
1723 | } | ||
diff --git a/drivers/net/qlcnic/qlcnic_main.c b/drivers/net/qlcnic/qlcnic_main.c index 23ea9caa5261..99371bcaa547 100644 --- a/drivers/net/qlcnic/qlcnic_main.c +++ b/drivers/net/qlcnic/qlcnic_main.c | |||
@@ -65,6 +65,10 @@ static int load_fw_file; | |||
65 | module_param(load_fw_file, int, 0644); | 65 | module_param(load_fw_file, int, 0644); |
66 | MODULE_PARM_DESC(load_fw_file, "Load firmware from (0=flash, 1=file"); | 66 | MODULE_PARM_DESC(load_fw_file, "Load firmware from (0=flash, 1=file"); |
67 | 67 | ||
68 | static int qlcnic_config_npars; | ||
69 | module_param(qlcnic_config_npars, int, 0644); | ||
70 | MODULE_PARM_DESC(qlcnic_config_npars, "Configure NPARs (0=disabled, 1=enabled"); | ||
71 | |||
68 | static int __devinit qlcnic_probe(struct pci_dev *pdev, | 72 | static int __devinit qlcnic_probe(struct pci_dev *pdev, |
69 | const struct pci_device_id *ent); | 73 | const struct pci_device_id *ent); |
70 | static void __devexit qlcnic_remove(struct pci_dev *pdev); | 74 | static void __devexit qlcnic_remove(struct pci_dev *pdev); |
@@ -99,7 +103,14 @@ static irqreturn_t qlcnic_msix_intr(int irq, void *data); | |||
99 | 103 | ||
100 | static struct net_device_stats *qlcnic_get_stats(struct net_device *netdev); | 104 | static struct net_device_stats *qlcnic_get_stats(struct net_device *netdev); |
101 | static void qlcnic_config_indev_addr(struct net_device *dev, unsigned long); | 105 | static void qlcnic_config_indev_addr(struct net_device *dev, unsigned long); |
102 | 106 | static int qlcnic_start_firmware(struct qlcnic_adapter *); | |
107 | |||
108 | static void qlcnic_dev_set_npar_ready(struct qlcnic_adapter *); | ||
109 | static void qlcnicvf_clear_ilb_mode(struct qlcnic_adapter *); | ||
110 | static int qlcnicvf_set_ilb_mode(struct qlcnic_adapter *); | ||
111 | static int qlcnicvf_config_led(struct qlcnic_adapter *, u32, u32); | ||
112 | static int qlcnicvf_config_bridged_mode(struct qlcnic_adapter *, u32); | ||
113 | static int qlcnicvf_start_firmware(struct qlcnic_adapter *); | ||
103 | /* PCI Device ID Table */ | 114 | /* PCI Device ID Table */ |
104 | #define ENTRY(device) \ | 115 | #define ENTRY(device) \ |
105 | {PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, (device)), \ | 116 | {PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, (device)), \ |
@@ -307,19 +318,14 @@ static void qlcnic_init_msix_entries(struct qlcnic_adapter *adapter, int count) | |||
307 | static int | 318 | static int |
308 | qlcnic_read_mac_addr(struct qlcnic_adapter *adapter) | 319 | qlcnic_read_mac_addr(struct qlcnic_adapter *adapter) |
309 | { | 320 | { |
310 | int i; | 321 | u8 mac_addr[ETH_ALEN]; |
311 | unsigned char *p; | ||
312 | u64 mac_addr; | ||
313 | struct net_device *netdev = adapter->netdev; | 322 | struct net_device *netdev = adapter->netdev; |
314 | struct pci_dev *pdev = adapter->pdev; | 323 | struct pci_dev *pdev = adapter->pdev; |
315 | 324 | ||
316 | if (qlcnic_get_mac_addr(adapter, &mac_addr) != 0) | 325 | if (adapter->nic_ops->get_mac_addr(adapter, mac_addr) != 0) |
317 | return -EIO; | 326 | return -EIO; |
318 | 327 | ||
319 | p = (unsigned char *)&mac_addr; | 328 | memcpy(netdev->dev_addr, mac_addr, ETH_ALEN); |
320 | for (i = 0; i < 6; i++) | ||
321 | netdev->dev_addr[i] = *(p + 5 - i); | ||
322 | |||
323 | memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len); | 329 | memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len); |
324 | memcpy(adapter->mac_addr, netdev->dev_addr, netdev->addr_len); | 330 | memcpy(adapter->mac_addr, netdev->dev_addr, netdev->addr_len); |
325 | 331 | ||
@@ -371,6 +377,33 @@ static const struct net_device_ops qlcnic_netdev_ops = { | |||
371 | #endif | 377 | #endif |
372 | }; | 378 | }; |
373 | 379 | ||
380 | static struct qlcnic_nic_template qlcnic_ops = { | ||
381 | .get_mac_addr = qlcnic_get_mac_addr, | ||
382 | .config_bridged_mode = qlcnic_config_bridged_mode, | ||
383 | .config_led = qlcnic_config_led, | ||
384 | .set_ilb_mode = qlcnic_set_ilb_mode, | ||
385 | .clear_ilb_mode = qlcnic_clear_ilb_mode, | ||
386 | .start_firmware = qlcnic_start_firmware | ||
387 | }; | ||
388 | |||
389 | static struct qlcnic_nic_template qlcnic_pf_ops = { | ||
390 | .get_mac_addr = qlcnic_get_mac_address, | ||
391 | .config_bridged_mode = qlcnic_config_bridged_mode, | ||
392 | .config_led = qlcnic_config_led, | ||
393 | .set_ilb_mode = qlcnic_set_ilb_mode, | ||
394 | .clear_ilb_mode = qlcnic_clear_ilb_mode, | ||
395 | .start_firmware = qlcnic_start_firmware | ||
396 | }; | ||
397 | |||
398 | static struct qlcnic_nic_template qlcnic_vf_ops = { | ||
399 | .get_mac_addr = qlcnic_get_mac_address, | ||
400 | .config_bridged_mode = qlcnicvf_config_bridged_mode, | ||
401 | .config_led = qlcnicvf_config_led, | ||
402 | .set_ilb_mode = qlcnicvf_set_ilb_mode, | ||
403 | .clear_ilb_mode = qlcnicvf_clear_ilb_mode, | ||
404 | .start_firmware = qlcnicvf_start_firmware | ||
405 | }; | ||
406 | |||
374 | static void | 407 | static void |
375 | qlcnic_setup_intr(struct qlcnic_adapter *adapter) | 408 | qlcnic_setup_intr(struct qlcnic_adapter *adapter) |
376 | { | 409 | { |
@@ -453,6 +486,132 @@ qlcnic_cleanup_pci_map(struct qlcnic_adapter *adapter) | |||
453 | } | 486 | } |
454 | 487 | ||
455 | static int | 488 | static int |
489 | qlcnic_set_function_modes(struct qlcnic_adapter *adapter) | ||
490 | { | ||
491 | u8 id; | ||
492 | u32 ref_count; | ||
493 | int i, ret = 1; | ||
494 | u32 data = QLCNIC_MGMT_FUNC; | ||
495 | void __iomem *priv_op = adapter->ahw.pci_base0 + QLCNIC_DRV_OP_MODE; | ||
496 | |||
497 | /* If other drivers are not in use set their privilege level */ | ||
498 | ref_count = QLCRD32(adapter, QLCNIC_CRB_DEV_REF_COUNT); | ||
499 | ret = qlcnic_api_lock(adapter); | ||
500 | if (ret) | ||
501 | goto err_lock; | ||
502 | if (QLC_DEV_CLR_REF_CNT(ref_count, adapter->ahw.pci_func)) | ||
503 | goto err_npar; | ||
504 | |||
505 | for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++) { | ||
506 | id = adapter->npars[i].id; | ||
507 | if (adapter->npars[i].type != QLCNIC_TYPE_NIC || | ||
508 | id == adapter->ahw.pci_func) | ||
509 | continue; | ||
510 | data |= (qlcnic_config_npars & QLC_DEV_SET_DRV(0xf, id)); | ||
511 | } | ||
512 | writel(data, priv_op); | ||
513 | |||
514 | err_npar: | ||
515 | qlcnic_api_unlock(adapter); | ||
516 | err_lock: | ||
517 | return ret; | ||
518 | } | ||
519 | |||
520 | static u8 | ||
521 | qlcnic_set_mgmt_driver(struct qlcnic_adapter *adapter) | ||
522 | { | ||
523 | u8 i, ret = 0; | ||
524 | |||
525 | if (qlcnic_get_pci_info(adapter)) | ||
526 | return ret; | ||
527 | /* Set the eswitch */ | ||
528 | for (i = 0; i < QLCNIC_NIU_MAX_XG_PORTS; i++) { | ||
529 | if (!qlcnic_get_eswitch_capabilities(adapter, i, | ||
530 | &adapter->eswitch[i])) { | ||
531 | ret++; | ||
532 | qlcnic_toggle_eswitch(adapter, i, ret); | ||
533 | } | ||
534 | } | ||
535 | return ret; | ||
536 | } | ||
537 | |||
538 | static u32 | ||
539 | qlcnic_get_driver_mode(struct qlcnic_adapter *adapter) | ||
540 | { | ||
541 | void __iomem *msix_base_addr; | ||
542 | void __iomem *priv_op; | ||
543 | u32 func; | ||
544 | u32 msix_base; | ||
545 | u32 op_mode, priv_level; | ||
546 | |||
547 | /* Determine FW API version */ | ||
548 | adapter->fw_hal_version = readl(adapter->ahw.pci_base0 + QLCNIC_FW_API); | ||
549 | if (adapter->fw_hal_version == ~0) { | ||
550 | adapter->nic_ops = &qlcnic_ops; | ||
551 | adapter->fw_hal_version = QLCNIC_FW_BASE; | ||
552 | adapter->ahw.pci_func = PCI_FUNC(adapter->pdev->devfn); | ||
553 | dev_info(&adapter->pdev->dev, | ||
554 | "FW does not support nic partion\n"); | ||
555 | return adapter->fw_hal_version; | ||
556 | } | ||
557 | |||
558 | /* Find PCI function number */ | ||
559 | pci_read_config_dword(adapter->pdev, QLCNIC_MSIX_TABLE_OFFSET, &func); | ||
560 | msix_base_addr = adapter->ahw.pci_base0 + QLCNIC_MSIX_BASE; | ||
561 | msix_base = readl(msix_base_addr); | ||
562 | func = (func - msix_base)/QLCNIC_MSIX_TBL_PGSIZE; | ||
563 | adapter->ahw.pci_func = func; | ||
564 | |||
565 | /* Determine function privilege level */ | ||
566 | priv_op = adapter->ahw.pci_base0 + QLCNIC_DRV_OP_MODE; | ||
567 | op_mode = readl(priv_op); | ||
568 | if (op_mode == QLC_DEV_DRV_DEFAULT) { | ||
569 | priv_level = QLCNIC_MGMT_FUNC; | ||
570 | if (qlcnic_api_lock(adapter)) | ||
571 | return 0; | ||
572 | op_mode = (op_mode & ~QLC_DEV_SET_DRV(0xf, func)) | | ||
573 | (QLC_DEV_SET_DRV(QLCNIC_MGMT_FUNC, func)); | ||
574 | writel(op_mode, priv_op); | ||
575 | qlcnic_api_unlock(adapter); | ||
576 | |||
577 | } else | ||
578 | priv_level = QLC_DEV_GET_DRV(op_mode, adapter->ahw.pci_func); | ||
579 | |||
580 | switch (priv_level) { | ||
581 | case QLCNIC_MGMT_FUNC: | ||
582 | adapter->op_mode = QLCNIC_MGMT_FUNC; | ||
583 | adapter->nic_ops = &qlcnic_pf_ops; | ||
584 | /* Set privilege level for other functions */ | ||
585 | if (qlcnic_config_npars) | ||
586 | qlcnic_set_function_modes(adapter); | ||
587 | qlcnic_dev_set_npar_ready(adapter); | ||
588 | dev_info(&adapter->pdev->dev, | ||
589 | "HAL Version: %d, Management function\n", | ||
590 | adapter->fw_hal_version); | ||
591 | break; | ||
592 | case QLCNIC_PRIV_FUNC: | ||
593 | adapter->op_mode = QLCNIC_PRIV_FUNC; | ||
594 | dev_info(&adapter->pdev->dev, | ||
595 | "HAL Version: %d, Privileged function\n", | ||
596 | adapter->fw_hal_version); | ||
597 | adapter->nic_ops = &qlcnic_pf_ops; | ||
598 | break; | ||
599 | case QLCNIC_NON_PRIV_FUNC: | ||
600 | adapter->op_mode = QLCNIC_NON_PRIV_FUNC; | ||
601 | dev_info(&adapter->pdev->dev, | ||
602 | "HAL Version: %d Non Privileged function\n", | ||
603 | adapter->fw_hal_version); | ||
604 | adapter->nic_ops = &qlcnic_vf_ops; | ||
605 | break; | ||
606 | default: | ||
607 | dev_info(&adapter->pdev->dev, "Unknown function mode: %d\n", | ||
608 | priv_level); | ||
609 | return 0; | ||
610 | } | ||
611 | return adapter->fw_hal_version; | ||
612 | } | ||
613 | |||
614 | static int | ||
456 | qlcnic_setup_pci_map(struct qlcnic_adapter *adapter) | 615 | qlcnic_setup_pci_map(struct qlcnic_adapter *adapter) |
457 | { | 616 | { |
458 | void __iomem *mem_ptr0 = NULL; | 617 | void __iomem *mem_ptr0 = NULL; |
@@ -460,7 +619,6 @@ qlcnic_setup_pci_map(struct qlcnic_adapter *adapter) | |||
460 | unsigned long mem_len, pci_len0 = 0; | 619 | unsigned long mem_len, pci_len0 = 0; |
461 | 620 | ||
462 | struct pci_dev *pdev = adapter->pdev; | 621 | struct pci_dev *pdev = adapter->pdev; |
463 | int pci_func = adapter->ahw.pci_func; | ||
464 | 622 | ||
465 | /* remap phys address */ | 623 | /* remap phys address */ |
466 | mem_base = pci_resource_start(pdev, 0); /* 0 is for BAR 0 */ | 624 | mem_base = pci_resource_start(pdev, 0); /* 0 is for BAR 0 */ |
@@ -483,8 +641,13 @@ qlcnic_setup_pci_map(struct qlcnic_adapter *adapter) | |||
483 | adapter->ahw.pci_base0 = mem_ptr0; | 641 | adapter->ahw.pci_base0 = mem_ptr0; |
484 | adapter->ahw.pci_len0 = pci_len0; | 642 | adapter->ahw.pci_len0 = pci_len0; |
485 | 643 | ||
644 | if (!qlcnic_get_driver_mode(adapter)) { | ||
645 | iounmap(adapter->ahw.pci_base0); | ||
646 | return -EIO; | ||
647 | } | ||
648 | |||
486 | adapter->ahw.ocm_win_crb = qlcnic_get_ioaddr(adapter, | 649 | adapter->ahw.ocm_win_crb = qlcnic_get_ioaddr(adapter, |
487 | QLCNIC_PCIX_PS_REG(PCIX_OCM_WINDOW_REG(pci_func))); | 650 | QLCNIC_PCIX_PS_REG(PCIX_OCM_WINDOW_REG(adapter->ahw.pci_func))); |
488 | 651 | ||
489 | return 0; | 652 | return 0; |
490 | } | 653 | } |
@@ -553,7 +716,10 @@ qlcnic_check_options(struct qlcnic_adapter *adapter) | |||
553 | dev_info(&pdev->dev, "firmware v%d.%d.%d\n", | 716 | dev_info(&pdev->dev, "firmware v%d.%d.%d\n", |
554 | fw_major, fw_minor, fw_build); | 717 | fw_major, fw_minor, fw_build); |
555 | 718 | ||
556 | adapter->capabilities = QLCRD32(adapter, CRB_FW_CAPABILITIES_1); | 719 | if (adapter->fw_hal_version == QLCNIC_FW_NPAR) |
720 | qlcnic_get_nic_info(adapter, adapter->ahw.pci_func); | ||
721 | else | ||
722 | adapter->capabilities = QLCRD32(adapter, CRB_FW_CAPABILITIES_1); | ||
557 | 723 | ||
558 | adapter->flags &= ~QLCNIC_LRO_ENABLED; | 724 | adapter->flags &= ~QLCNIC_LRO_ENABLED; |
559 | 725 | ||
@@ -631,8 +797,14 @@ wait_init: | |||
631 | QLCWR32(adapter, QLCNIC_CRB_DEV_STATE, QLCNIC_DEV_READY); | 797 | QLCWR32(adapter, QLCNIC_CRB_DEV_STATE, QLCNIC_DEV_READY); |
632 | qlcnic_idc_debug_info(adapter, 1); | 798 | qlcnic_idc_debug_info(adapter, 1); |
633 | 799 | ||
800 | qlcnic_dev_set_npar_ready(adapter); | ||
801 | |||
634 | qlcnic_check_options(adapter); | 802 | qlcnic_check_options(adapter); |
635 | 803 | ||
804 | if (adapter->fw_hal_version != QLCNIC_FW_BASE && | ||
805 | adapter->op_mode == QLCNIC_MGMT_FUNC) | ||
806 | qlcnic_set_mgmt_driver(adapter); | ||
807 | |||
636 | adapter->need_fw_reset = 0; | 808 | adapter->need_fw_reset = 0; |
637 | 809 | ||
638 | qlcnic_release_firmware(adapter); | 810 | qlcnic_release_firmware(adapter); |
@@ -977,12 +1149,11 @@ qlcnic_setup_netdev(struct qlcnic_adapter *adapter, | |||
977 | 1149 | ||
978 | SET_ETHTOOL_OPS(netdev, &qlcnic_ethtool_ops); | 1150 | SET_ETHTOOL_OPS(netdev, &qlcnic_ethtool_ops); |
979 | 1151 | ||
980 | netdev->features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO); | 1152 | netdev->features |= (NETIF_F_SG | NETIF_F_IP_CSUM | |
981 | netdev->features |= (NETIF_F_GRO); | 1153 | NETIF_F_IPV6_CSUM | NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6); |
982 | netdev->vlan_features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO); | ||
983 | 1154 | ||
984 | netdev->features |= (NETIF_F_IPV6_CSUM | NETIF_F_TSO6); | 1155 | netdev->vlan_features |= (NETIF_F_SG | NETIF_F_IP_CSUM | |
985 | netdev->vlan_features |= (NETIF_F_IPV6_CSUM | NETIF_F_TSO6); | 1156 | NETIF_F_IPV6_CSUM | NETIF_F_TSO | NETIF_F_TSO6); |
986 | 1157 | ||
987 | if (pci_using_dac) { | 1158 | if (pci_using_dac) { |
988 | netdev->features |= NETIF_F_HIGHDMA; | 1159 | netdev->features |= NETIF_F_HIGHDMA; |
@@ -1036,7 +1207,6 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1036 | struct net_device *netdev = NULL; | 1207 | struct net_device *netdev = NULL; |
1037 | struct qlcnic_adapter *adapter = NULL; | 1208 | struct qlcnic_adapter *adapter = NULL; |
1038 | int err; | 1209 | int err; |
1039 | int pci_func_id = PCI_FUNC(pdev->devfn); | ||
1040 | uint8_t revision_id; | 1210 | uint8_t revision_id; |
1041 | uint8_t pci_using_dac; | 1211 | uint8_t pci_using_dac; |
1042 | 1212 | ||
@@ -1072,7 +1242,6 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1072 | adapter->netdev = netdev; | 1242 | adapter->netdev = netdev; |
1073 | adapter->pdev = pdev; | 1243 | adapter->pdev = pdev; |
1074 | adapter->dev_rst_time = jiffies; | 1244 | adapter->dev_rst_time = jiffies; |
1075 | adapter->ahw.pci_func = pci_func_id; | ||
1076 | 1245 | ||
1077 | revision_id = pdev->revision; | 1246 | revision_id = pdev->revision; |
1078 | adapter->ahw.revision_id = revision_id; | 1247 | adapter->ahw.revision_id = revision_id; |
@@ -1088,7 +1257,7 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1088 | goto err_out_free_netdev; | 1257 | goto err_out_free_netdev; |
1089 | 1258 | ||
1090 | /* This will be reset for mezz cards */ | 1259 | /* This will be reset for mezz cards */ |
1091 | adapter->portnum = pci_func_id; | 1260 | adapter->portnum = adapter->ahw.pci_func; |
1092 | 1261 | ||
1093 | err = qlcnic_get_board_info(adapter); | 1262 | err = qlcnic_get_board_info(adapter); |
1094 | if (err) { | 1263 | if (err) { |
@@ -1102,7 +1271,7 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1102 | if (qlcnic_setup_idc_param(adapter)) | 1271 | if (qlcnic_setup_idc_param(adapter)) |
1103 | goto err_out_iounmap; | 1272 | goto err_out_iounmap; |
1104 | 1273 | ||
1105 | err = qlcnic_start_firmware(adapter); | 1274 | err = adapter->nic_ops->start_firmware(adapter); |
1106 | if (err) { | 1275 | if (err) { |
1107 | dev_err(&pdev->dev, "Loading fw failed.Please Reboot\n"); | 1276 | dev_err(&pdev->dev, "Loading fw failed.Please Reboot\n"); |
1108 | goto err_out_decr_ref; | 1277 | goto err_out_decr_ref; |
@@ -1175,6 +1344,11 @@ static void __devexit qlcnic_remove(struct pci_dev *pdev) | |||
1175 | 1344 | ||
1176 | qlcnic_detach(adapter); | 1345 | qlcnic_detach(adapter); |
1177 | 1346 | ||
1347 | if (adapter->npars != NULL) | ||
1348 | kfree(adapter->npars); | ||
1349 | if (adapter->eswitch != NULL) | ||
1350 | kfree(adapter->eswitch); | ||
1351 | |||
1178 | qlcnic_clr_all_drv_state(adapter); | 1352 | qlcnic_clr_all_drv_state(adapter); |
1179 | 1353 | ||
1180 | clear_bit(__QLCNIC_RESETTING, &adapter->state); | 1354 | clear_bit(__QLCNIC_RESETTING, &adapter->state); |
@@ -1263,7 +1437,7 @@ qlcnic_resume(struct pci_dev *pdev) | |||
1263 | pci_set_master(pdev); | 1437 | pci_set_master(pdev); |
1264 | pci_restore_state(pdev); | 1438 | pci_restore_state(pdev); |
1265 | 1439 | ||
1266 | err = qlcnic_start_firmware(adapter); | 1440 | err = adapter->nic_ops->start_firmware(adapter); |
1267 | if (err) { | 1441 | if (err) { |
1268 | dev_err(&pdev->dev, "failed to start firmware\n"); | 1442 | dev_err(&pdev->dev, "failed to start firmware\n"); |
1269 | return err; | 1443 | return err; |
@@ -1340,11 +1514,11 @@ qlcnic_tso_check(struct net_device *netdev, | |||
1340 | u8 opcode = TX_ETHER_PKT; | 1514 | u8 opcode = TX_ETHER_PKT; |
1341 | __be16 protocol = skb->protocol; | 1515 | __be16 protocol = skb->protocol; |
1342 | u16 flags = 0, vid = 0; | 1516 | u16 flags = 0, vid = 0; |
1343 | u32 producer; | ||
1344 | int copied, offset, copy_len, hdr_len = 0, tso = 0, vlan_oob = 0; | 1517 | int copied, offset, copy_len, hdr_len = 0, tso = 0, vlan_oob = 0; |
1345 | struct cmd_desc_type0 *hwdesc; | 1518 | struct cmd_desc_type0 *hwdesc; |
1346 | struct vlan_ethhdr *vh; | 1519 | struct vlan_ethhdr *vh; |
1347 | struct qlcnic_adapter *adapter = netdev_priv(netdev); | 1520 | struct qlcnic_adapter *adapter = netdev_priv(netdev); |
1521 | u32 producer = tx_ring->producer; | ||
1348 | 1522 | ||
1349 | if (protocol == cpu_to_be16(ETH_P_8021Q)) { | 1523 | if (protocol == cpu_to_be16(ETH_P_8021Q)) { |
1350 | 1524 | ||
@@ -1360,6 +1534,11 @@ qlcnic_tso_check(struct net_device *netdev, | |||
1360 | vlan_oob = 1; | 1534 | vlan_oob = 1; |
1361 | } | 1535 | } |
1362 | 1536 | ||
1537 | if (*(skb->data) & BIT_0) { | ||
1538 | flags |= BIT_0; | ||
1539 | memcpy(&first_desc->eth_addr, skb->data, ETH_ALEN); | ||
1540 | } | ||
1541 | |||
1363 | if ((netdev->features & (NETIF_F_TSO | NETIF_F_TSO6)) && | 1542 | if ((netdev->features & (NETIF_F_TSO | NETIF_F_TSO6)) && |
1364 | skb_shinfo(skb)->gso_size > 0) { | 1543 | skb_shinfo(skb)->gso_size > 0) { |
1365 | 1544 | ||
@@ -1409,7 +1588,6 @@ qlcnic_tso_check(struct net_device *netdev, | |||
1409 | /* For LSO, we need to copy the MAC/IP/TCP headers into | 1588 | /* For LSO, we need to copy the MAC/IP/TCP headers into |
1410 | * the descriptor ring | 1589 | * the descriptor ring |
1411 | */ | 1590 | */ |
1412 | producer = tx_ring->producer; | ||
1413 | copied = 0; | 1591 | copied = 0; |
1414 | offset = 2; | 1592 | offset = 2; |
1415 | 1593 | ||
@@ -2109,7 +2287,7 @@ qlcnic_fwinit_work(struct work_struct *work) | |||
2109 | { | 2287 | { |
2110 | struct qlcnic_adapter *adapter = container_of(work, | 2288 | struct qlcnic_adapter *adapter = container_of(work, |
2111 | struct qlcnic_adapter, fw_work.work); | 2289 | struct qlcnic_adapter, fw_work.work); |
2112 | u32 dev_state = 0xf; | 2290 | u32 dev_state = 0xf, npar_state; |
2113 | 2291 | ||
2114 | if (qlcnic_api_lock(adapter)) | 2292 | if (qlcnic_api_lock(adapter)) |
2115 | goto err_ret; | 2293 | goto err_ret; |
@@ -2122,6 +2300,19 @@ qlcnic_fwinit_work(struct work_struct *work) | |||
2122 | return; | 2300 | return; |
2123 | } | 2301 | } |
2124 | 2302 | ||
2303 | if (adapter->op_mode == QLCNIC_NON_PRIV_FUNC) { | ||
2304 | npar_state = QLCRD32(adapter, QLCNIC_CRB_DEV_NPAR_STATE); | ||
2305 | if (npar_state == QLCNIC_DEV_NPAR_RDY) { | ||
2306 | qlcnic_api_unlock(adapter); | ||
2307 | goto wait_npar; | ||
2308 | } else { | ||
2309 | qlcnic_schedule_work(adapter, qlcnic_fwinit_work, | ||
2310 | FW_POLL_DELAY); | ||
2311 | qlcnic_api_unlock(adapter); | ||
2312 | return; | ||
2313 | } | ||
2314 | } | ||
2315 | |||
2125 | if (adapter->fw_wait_cnt++ > adapter->reset_ack_timeo) { | 2316 | if (adapter->fw_wait_cnt++ > adapter->reset_ack_timeo) { |
2126 | dev_err(&adapter->pdev->dev, "Reset:Failed to get ack %d sec\n", | 2317 | dev_err(&adapter->pdev->dev, "Reset:Failed to get ack %d sec\n", |
2127 | adapter->reset_ack_timeo); | 2318 | adapter->reset_ack_timeo); |
@@ -2154,7 +2345,7 @@ skip_ack_check: | |||
2154 | 2345 | ||
2155 | qlcnic_api_unlock(adapter); | 2346 | qlcnic_api_unlock(adapter); |
2156 | 2347 | ||
2157 | if (!qlcnic_start_firmware(adapter)) { | 2348 | if (!adapter->nic_ops->start_firmware(adapter)) { |
2158 | qlcnic_schedule_work(adapter, qlcnic_attach_work, 0); | 2349 | qlcnic_schedule_work(adapter, qlcnic_attach_work, 0); |
2159 | return; | 2350 | return; |
2160 | } | 2351 | } |
@@ -2163,6 +2354,7 @@ skip_ack_check: | |||
2163 | 2354 | ||
2164 | qlcnic_api_unlock(adapter); | 2355 | qlcnic_api_unlock(adapter); |
2165 | 2356 | ||
2357 | wait_npar: | ||
2166 | dev_state = QLCRD32(adapter, QLCNIC_CRB_DEV_STATE); | 2358 | dev_state = QLCRD32(adapter, QLCNIC_CRB_DEV_STATE); |
2167 | QLCDB(adapter, HW, "Func waiting: Device state=%u\n", dev_state); | 2359 | QLCDB(adapter, HW, "Func waiting: Device state=%u\n", dev_state); |
2168 | 2360 | ||
@@ -2177,7 +2369,7 @@ skip_ack_check: | |||
2177 | break; | 2369 | break; |
2178 | 2370 | ||
2179 | default: | 2371 | default: |
2180 | if (!qlcnic_start_firmware(adapter)) { | 2372 | if (!adapter->nic_ops->start_firmware(adapter)) { |
2181 | qlcnic_schedule_work(adapter, qlcnic_attach_work, 0); | 2373 | qlcnic_schedule_work(adapter, qlcnic_attach_work, 0); |
2182 | return; | 2374 | return; |
2183 | } | 2375 | } |
@@ -2251,6 +2443,30 @@ qlcnic_dev_request_reset(struct qlcnic_adapter *adapter) | |||
2251 | qlcnic_api_unlock(adapter); | 2443 | qlcnic_api_unlock(adapter); |
2252 | } | 2444 | } |
2253 | 2445 | ||
2446 | /* Transit to NPAR READY state from NPAR NOT READY state */ | ||
2447 | static void | ||
2448 | qlcnic_dev_set_npar_ready(struct qlcnic_adapter *adapter) | ||
2449 | { | ||
2450 | u32 state; | ||
2451 | |||
2452 | if (adapter->op_mode == QLCNIC_NON_PRIV_FUNC || | ||
2453 | adapter->fw_hal_version == QLCNIC_FW_BASE) | ||
2454 | return; | ||
2455 | |||
2456 | if (qlcnic_api_lock(adapter)) | ||
2457 | return; | ||
2458 | |||
2459 | state = QLCRD32(adapter, QLCNIC_CRB_DEV_NPAR_STATE); | ||
2460 | |||
2461 | if (state != QLCNIC_DEV_NPAR_RDY) { | ||
2462 | QLCWR32(adapter, QLCNIC_CRB_DEV_NPAR_STATE, | ||
2463 | QLCNIC_DEV_NPAR_RDY); | ||
2464 | QLCDB(adapter, DRV, "NPAR READY state set\n"); | ||
2465 | } | ||
2466 | |||
2467 | qlcnic_api_unlock(adapter); | ||
2468 | } | ||
2469 | |||
2254 | static void | 2470 | static void |
2255 | qlcnic_schedule_work(struct qlcnic_adapter *adapter, | 2471 | qlcnic_schedule_work(struct qlcnic_adapter *adapter, |
2256 | work_func_t func, int delay) | 2472 | work_func_t func, int delay) |
@@ -2365,6 +2581,46 @@ reschedule: | |||
2365 | qlcnic_schedule_work(adapter, qlcnic_fw_poll_work, FW_POLL_DELAY); | 2581 | qlcnic_schedule_work(adapter, qlcnic_fw_poll_work, FW_POLL_DELAY); |
2366 | } | 2582 | } |
2367 | 2583 | ||
2584 | static int | ||
2585 | qlcnicvf_start_firmware(struct qlcnic_adapter *adapter) | ||
2586 | { | ||
2587 | int err; | ||
2588 | |||
2589 | err = qlcnic_can_start_firmware(adapter); | ||
2590 | if (err) | ||
2591 | return err; | ||
2592 | |||
2593 | qlcnic_check_options(adapter); | ||
2594 | |||
2595 | adapter->need_fw_reset = 0; | ||
2596 | |||
2597 | return err; | ||
2598 | } | ||
2599 | |||
2600 | static int | ||
2601 | qlcnicvf_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable) | ||
2602 | { | ||
2603 | return -EOPNOTSUPP; | ||
2604 | } | ||
2605 | |||
2606 | static int | ||
2607 | qlcnicvf_config_led(struct qlcnic_adapter *adapter, u32 state, u32 rate) | ||
2608 | { | ||
2609 | return -EOPNOTSUPP; | ||
2610 | } | ||
2611 | |||
2612 | static int | ||
2613 | qlcnicvf_set_ilb_mode(struct qlcnic_adapter *adapter) | ||
2614 | { | ||
2615 | return -EOPNOTSUPP; | ||
2616 | } | ||
2617 | |||
2618 | static void | ||
2619 | qlcnicvf_clear_ilb_mode(struct qlcnic_adapter *adapter) | ||
2620 | { | ||
2621 | return; | ||
2622 | } | ||
2623 | |||
2368 | static ssize_t | 2624 | static ssize_t |
2369 | qlcnic_store_bridged_mode(struct device *dev, | 2625 | qlcnic_store_bridged_mode(struct device *dev, |
2370 | struct device_attribute *attr, const char *buf, size_t len) | 2626 | struct device_attribute *attr, const char *buf, size_t len) |
@@ -2382,7 +2638,7 @@ qlcnic_store_bridged_mode(struct device *dev, | |||
2382 | if (strict_strtoul(buf, 2, &new)) | 2638 | if (strict_strtoul(buf, 2, &new)) |
2383 | goto err_out; | 2639 | goto err_out; |
2384 | 2640 | ||
2385 | if (!qlcnic_config_bridged_mode(adapter, !!new)) | 2641 | if (!adapter->nic_ops->config_bridged_mode(adapter, !!new)) |
2386 | ret = len; | 2642 | ret = len; |
2387 | 2643 | ||
2388 | err_out: | 2644 | err_out: |
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h index 20624ba44a37..bfb8b327f2fd 100644 --- a/drivers/net/qlge/qlge.h +++ b/drivers/net/qlge/qlge.h | |||
@@ -1062,7 +1062,7 @@ struct tx_buf_desc { | |||
1062 | #define TX_DESC_LEN_MASK 0x000fffff | 1062 | #define TX_DESC_LEN_MASK 0x000fffff |
1063 | #define TX_DESC_C 0x40000000 | 1063 | #define TX_DESC_C 0x40000000 |
1064 | #define TX_DESC_E 0x80000000 | 1064 | #define TX_DESC_E 0x80000000 |
1065 | } __attribute((packed)); | 1065 | } __packed; |
1066 | 1066 | ||
1067 | /* | 1067 | /* |
1068 | * IOCB Definitions... | 1068 | * IOCB Definitions... |
@@ -1095,7 +1095,7 @@ struct ob_mac_iocb_req { | |||
1095 | __le16 vlan_tci; | 1095 | __le16 vlan_tci; |
1096 | __le16 reserved4; | 1096 | __le16 reserved4; |
1097 | struct tx_buf_desc tbd[TX_DESC_PER_IOCB]; | 1097 | struct tx_buf_desc tbd[TX_DESC_PER_IOCB]; |
1098 | } __attribute((packed)); | 1098 | } __packed; |
1099 | 1099 | ||
1100 | struct ob_mac_iocb_rsp { | 1100 | struct ob_mac_iocb_rsp { |
1101 | u8 opcode; /* */ | 1101 | u8 opcode; /* */ |
@@ -1112,7 +1112,7 @@ struct ob_mac_iocb_rsp { | |||
1112 | u32 tid; | 1112 | u32 tid; |
1113 | u32 txq_idx; | 1113 | u32 txq_idx; |
1114 | __le32 reserved[13]; | 1114 | __le32 reserved[13]; |
1115 | } __attribute((packed)); | 1115 | } __packed; |
1116 | 1116 | ||
1117 | struct ob_mac_tso_iocb_req { | 1117 | struct ob_mac_tso_iocb_req { |
1118 | u8 opcode; | 1118 | u8 opcode; |
@@ -1140,7 +1140,7 @@ struct ob_mac_tso_iocb_req { | |||
1140 | __le16 vlan_tci; | 1140 | __le16 vlan_tci; |
1141 | __le16 mss; | 1141 | __le16 mss; |
1142 | struct tx_buf_desc tbd[TX_DESC_PER_IOCB]; | 1142 | struct tx_buf_desc tbd[TX_DESC_PER_IOCB]; |
1143 | } __attribute((packed)); | 1143 | } __packed; |
1144 | 1144 | ||
1145 | struct ob_mac_tso_iocb_rsp { | 1145 | struct ob_mac_tso_iocb_rsp { |
1146 | u8 opcode; | 1146 | u8 opcode; |
@@ -1157,7 +1157,7 @@ struct ob_mac_tso_iocb_rsp { | |||
1157 | u32 tid; | 1157 | u32 tid; |
1158 | u32 txq_idx; | 1158 | u32 txq_idx; |
1159 | __le32 reserved2[13]; | 1159 | __le32 reserved2[13]; |
1160 | } __attribute((packed)); | 1160 | } __packed; |
1161 | 1161 | ||
1162 | struct ib_mac_iocb_rsp { | 1162 | struct ib_mac_iocb_rsp { |
1163 | u8 opcode; /* 0x20 */ | 1163 | u8 opcode; /* 0x20 */ |
@@ -1216,7 +1216,7 @@ struct ib_mac_iocb_rsp { | |||
1216 | #define IB_MAC_IOCB_RSP_HL 0x80 | 1216 | #define IB_MAC_IOCB_RSP_HL 0x80 |
1217 | __le32 hdr_len; /* */ | 1217 | __le32 hdr_len; /* */ |
1218 | __le64 hdr_addr; /* */ | 1218 | __le64 hdr_addr; /* */ |
1219 | } __attribute((packed)); | 1219 | } __packed; |
1220 | 1220 | ||
1221 | struct ib_ae_iocb_rsp { | 1221 | struct ib_ae_iocb_rsp { |
1222 | u8 opcode; | 1222 | u8 opcode; |
@@ -1237,7 +1237,7 @@ struct ib_ae_iocb_rsp { | |||
1237 | #define PCI_ERR_ANON_BUF_RD 0x40 | 1237 | #define PCI_ERR_ANON_BUF_RD 0x40 |
1238 | u8 q_id; | 1238 | u8 q_id; |
1239 | __le32 reserved[15]; | 1239 | __le32 reserved[15]; |
1240 | } __attribute((packed)); | 1240 | } __packed; |
1241 | 1241 | ||
1242 | /* | 1242 | /* |
1243 | * These three structures are for generic | 1243 | * These three structures are for generic |
@@ -1249,7 +1249,7 @@ struct ql_net_rsp_iocb { | |||
1249 | __le16 length; | 1249 | __le16 length; |
1250 | __le32 tid; | 1250 | __le32 tid; |
1251 | __le32 reserved[14]; | 1251 | __le32 reserved[14]; |
1252 | } __attribute((packed)); | 1252 | } __packed; |
1253 | 1253 | ||
1254 | struct net_req_iocb { | 1254 | struct net_req_iocb { |
1255 | u8 opcode; | 1255 | u8 opcode; |
@@ -1257,7 +1257,7 @@ struct net_req_iocb { | |||
1257 | __le16 flags1; | 1257 | __le16 flags1; |
1258 | __le32 tid; | 1258 | __le32 tid; |
1259 | __le32 reserved1[30]; | 1259 | __le32 reserved1[30]; |
1260 | } __attribute((packed)); | 1260 | } __packed; |
1261 | 1261 | ||
1262 | /* | 1262 | /* |
1263 | * tx ring initialization control block for chip. | 1263 | * tx ring initialization control block for chip. |
@@ -1283,7 +1283,7 @@ struct wqicb { | |||
1283 | __le16 rid; | 1283 | __le16 rid; |
1284 | __le64 addr; | 1284 | __le64 addr; |
1285 | __le64 cnsmr_idx_addr; | 1285 | __le64 cnsmr_idx_addr; |
1286 | } __attribute((packed)); | 1286 | } __packed; |
1287 | 1287 | ||
1288 | /* | 1288 | /* |
1289 | * rx ring initialization control block for chip. | 1289 | * rx ring initialization control block for chip. |
@@ -1317,7 +1317,7 @@ struct cqicb { | |||
1317 | __le64 sbq_addr; | 1317 | __le64 sbq_addr; |
1318 | __le16 sbq_buf_size; | 1318 | __le16 sbq_buf_size; |
1319 | __le16 sbq_len; /* entry count */ | 1319 | __le16 sbq_len; /* entry count */ |
1320 | } __attribute((packed)); | 1320 | } __packed; |
1321 | 1321 | ||
1322 | struct ricb { | 1322 | struct ricb { |
1323 | u8 base_cq; | 1323 | u8 base_cq; |
@@ -1335,7 +1335,7 @@ struct ricb { | |||
1335 | u8 hash_cq_id[1024]; | 1335 | u8 hash_cq_id[1024]; |
1336 | __le32 ipv6_hash_key[10]; | 1336 | __le32 ipv6_hash_key[10]; |
1337 | __le32 ipv4_hash_key[4]; | 1337 | __le32 ipv4_hash_key[4]; |
1338 | } __attribute((packed)); | 1338 | } __packed; |
1339 | 1339 | ||
1340 | /* SOFTWARE/DRIVER DATA STRUCTURES. */ | 1340 | /* SOFTWARE/DRIVER DATA STRUCTURES. */ |
1341 | 1341 | ||
diff --git a/drivers/net/r6040.c b/drivers/net/r6040.c index 9a251acf5ab8..7d482a2316ac 100644 --- a/drivers/net/r6040.c +++ b/drivers/net/r6040.c | |||
@@ -44,12 +44,13 @@ | |||
44 | #include <linux/io.h> | 44 | #include <linux/io.h> |
45 | #include <linux/irq.h> | 45 | #include <linux/irq.h> |
46 | #include <linux/uaccess.h> | 46 | #include <linux/uaccess.h> |
47 | #include <linux/phy.h> | ||
47 | 48 | ||
48 | #include <asm/processor.h> | 49 | #include <asm/processor.h> |
49 | 50 | ||
50 | #define DRV_NAME "r6040" | 51 | #define DRV_NAME "r6040" |
51 | #define DRV_VERSION "0.25" | 52 | #define DRV_VERSION "0.26" |
52 | #define DRV_RELDATE "20Aug2009" | 53 | #define DRV_RELDATE "30May2010" |
53 | 54 | ||
54 | /* PHY CHIP Address */ | 55 | /* PHY CHIP Address */ |
55 | #define PHY1_ADDR 1 /* For MAC1 */ | 56 | #define PHY1_ADDR 1 /* For MAC1 */ |
@@ -179,7 +180,6 @@ struct r6040_descriptor { | |||
179 | 180 | ||
180 | struct r6040_private { | 181 | struct r6040_private { |
181 | spinlock_t lock; /* driver lock */ | 182 | spinlock_t lock; /* driver lock */ |
182 | struct timer_list timer; | ||
183 | struct pci_dev *pdev; | 183 | struct pci_dev *pdev; |
184 | struct r6040_descriptor *rx_insert_ptr; | 184 | struct r6040_descriptor *rx_insert_ptr; |
185 | struct r6040_descriptor *rx_remove_ptr; | 185 | struct r6040_descriptor *rx_remove_ptr; |
@@ -189,13 +189,15 @@ struct r6040_private { | |||
189 | struct r6040_descriptor *tx_ring; | 189 | struct r6040_descriptor *tx_ring; |
190 | dma_addr_t rx_ring_dma; | 190 | dma_addr_t rx_ring_dma; |
191 | dma_addr_t tx_ring_dma; | 191 | dma_addr_t tx_ring_dma; |
192 | u16 tx_free_desc, phy_addr, phy_mode; | 192 | u16 tx_free_desc, phy_addr; |
193 | u16 mcr0, mcr1; | 193 | u16 mcr0, mcr1; |
194 | u16 switch_sig; | ||
195 | struct net_device *dev; | 194 | struct net_device *dev; |
196 | struct mii_if_info mii_if; | 195 | struct mii_bus *mii_bus; |
197 | struct napi_struct napi; | 196 | struct napi_struct napi; |
198 | void __iomem *base; | 197 | void __iomem *base; |
198 | struct phy_device *phydev; | ||
199 | int old_link; | ||
200 | int old_duplex; | ||
199 | }; | 201 | }; |
200 | 202 | ||
201 | static char version[] __devinitdata = KERN_INFO DRV_NAME | 203 | static char version[] __devinitdata = KERN_INFO DRV_NAME |
@@ -238,20 +240,30 @@ static void r6040_phy_write(void __iomem *ioaddr, int phy_addr, int reg, u16 val | |||
238 | } | 240 | } |
239 | } | 241 | } |
240 | 242 | ||
241 | static int r6040_mdio_read(struct net_device *dev, int mii_id, int reg) | 243 | static int r6040_mdiobus_read(struct mii_bus *bus, int phy_addr, int reg) |
242 | { | 244 | { |
245 | struct net_device *dev = bus->priv; | ||
243 | struct r6040_private *lp = netdev_priv(dev); | 246 | struct r6040_private *lp = netdev_priv(dev); |
244 | void __iomem *ioaddr = lp->base; | 247 | void __iomem *ioaddr = lp->base; |
245 | 248 | ||
246 | return (r6040_phy_read(ioaddr, lp->phy_addr, reg)); | 249 | return r6040_phy_read(ioaddr, phy_addr, reg); |
247 | } | 250 | } |
248 | 251 | ||
249 | static void r6040_mdio_write(struct net_device *dev, int mii_id, int reg, int val) | 252 | static int r6040_mdiobus_write(struct mii_bus *bus, int phy_addr, |
253 | int reg, u16 value) | ||
250 | { | 254 | { |
255 | struct net_device *dev = bus->priv; | ||
251 | struct r6040_private *lp = netdev_priv(dev); | 256 | struct r6040_private *lp = netdev_priv(dev); |
252 | void __iomem *ioaddr = lp->base; | 257 | void __iomem *ioaddr = lp->base; |
253 | 258 | ||
254 | r6040_phy_write(ioaddr, lp->phy_addr, reg, val); | 259 | r6040_phy_write(ioaddr, phy_addr, reg, value); |
260 | |||
261 | return 0; | ||
262 | } | ||
263 | |||
264 | static int r6040_mdiobus_reset(struct mii_bus *bus) | ||
265 | { | ||
266 | return 0; | ||
255 | } | 267 | } |
256 | 268 | ||
257 | static void r6040_free_txbufs(struct net_device *dev) | 269 | static void r6040_free_txbufs(struct net_device *dev) |
@@ -408,10 +420,9 @@ static void r6040_tx_timeout(struct net_device *dev) | |||
408 | void __iomem *ioaddr = priv->base; | 420 | void __iomem *ioaddr = priv->base; |
409 | 421 | ||
410 | netdev_warn(dev, "transmit timed out, int enable %4.4x " | 422 | netdev_warn(dev, "transmit timed out, int enable %4.4x " |
411 | "status %4.4x, PHY status %4.4x\n", | 423 | "status %4.4x\n", |
412 | ioread16(ioaddr + MIER), | 424 | ioread16(ioaddr + MIER), |
413 | ioread16(ioaddr + MISR), | 425 | ioread16(ioaddr + MISR)); |
414 | r6040_mdio_read(dev, priv->mii_if.phy_id, MII_BMSR)); | ||
415 | 426 | ||
416 | dev->stats.tx_errors++; | 427 | dev->stats.tx_errors++; |
417 | 428 | ||
@@ -463,9 +474,6 @@ static int r6040_close(struct net_device *dev) | |||
463 | struct r6040_private *lp = netdev_priv(dev); | 474 | struct r6040_private *lp = netdev_priv(dev); |
464 | struct pci_dev *pdev = lp->pdev; | 475 | struct pci_dev *pdev = lp->pdev; |
465 | 476 | ||
466 | /* deleted timer */ | ||
467 | del_timer_sync(&lp->timer); | ||
468 | |||
469 | spin_lock_irq(&lp->lock); | 477 | spin_lock_irq(&lp->lock); |
470 | napi_disable(&lp->napi); | 478 | napi_disable(&lp->napi); |
471 | netif_stop_queue(dev); | 479 | netif_stop_queue(dev); |
@@ -495,64 +503,14 @@ static int r6040_close(struct net_device *dev) | |||
495 | return 0; | 503 | return 0; |
496 | } | 504 | } |
497 | 505 | ||
498 | /* Status of PHY CHIP */ | ||
499 | static int r6040_phy_mode_chk(struct net_device *dev) | ||
500 | { | ||
501 | struct r6040_private *lp = netdev_priv(dev); | ||
502 | void __iomem *ioaddr = lp->base; | ||
503 | int phy_dat; | ||
504 | |||
505 | /* PHY Link Status Check */ | ||
506 | phy_dat = r6040_phy_read(ioaddr, lp->phy_addr, 1); | ||
507 | if (!(phy_dat & 0x4)) | ||
508 | phy_dat = 0x8000; /* Link Failed, full duplex */ | ||
509 | |||
510 | /* PHY Chip Auto-Negotiation Status */ | ||
511 | phy_dat = r6040_phy_read(ioaddr, lp->phy_addr, 1); | ||
512 | if (phy_dat & 0x0020) { | ||
513 | /* Auto Negotiation Mode */ | ||
514 | phy_dat = r6040_phy_read(ioaddr, lp->phy_addr, 5); | ||
515 | phy_dat &= r6040_phy_read(ioaddr, lp->phy_addr, 4); | ||
516 | if (phy_dat & 0x140) | ||
517 | /* Force full duplex */ | ||
518 | phy_dat = 0x8000; | ||
519 | else | ||
520 | phy_dat = 0; | ||
521 | } else { | ||
522 | /* Force Mode */ | ||
523 | phy_dat = r6040_phy_read(ioaddr, lp->phy_addr, 0); | ||
524 | if (phy_dat & 0x100) | ||
525 | phy_dat = 0x8000; | ||
526 | else | ||
527 | phy_dat = 0x0000; | ||
528 | } | ||
529 | |||
530 | return phy_dat; | ||
531 | }; | ||
532 | |||
533 | static void r6040_set_carrier(struct mii_if_info *mii) | ||
534 | { | ||
535 | if (r6040_phy_mode_chk(mii->dev)) { | ||
536 | /* autoneg is off: Link is always assumed to be up */ | ||
537 | if (!netif_carrier_ok(mii->dev)) | ||
538 | netif_carrier_on(mii->dev); | ||
539 | } else | ||
540 | r6040_phy_mode_chk(mii->dev); | ||
541 | } | ||
542 | |||
543 | static int r6040_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | 506 | static int r6040_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
544 | { | 507 | { |
545 | struct r6040_private *lp = netdev_priv(dev); | 508 | struct r6040_private *lp = netdev_priv(dev); |
546 | struct mii_ioctl_data *data = if_mii(rq); | ||
547 | int rc; | ||
548 | 509 | ||
549 | if (!netif_running(dev)) | 510 | if (!lp->phydev) |
550 | return -EINVAL; | 511 | return -EINVAL; |
551 | spin_lock_irq(&lp->lock); | 512 | |
552 | rc = generic_mii_ioctl(&lp->mii_if, data, cmd, NULL); | 513 | return phy_mii_ioctl(lp->phydev, if_mii(rq), cmd); |
553 | spin_unlock_irq(&lp->lock); | ||
554 | r6040_set_carrier(&lp->mii_if); | ||
555 | return rc; | ||
556 | } | 514 | } |
557 | 515 | ||
558 | static int r6040_rx(struct net_device *dev, int limit) | 516 | static int r6040_rx(struct net_device *dev, int limit) |
@@ -751,26 +709,6 @@ static int r6040_up(struct net_device *dev) | |||
751 | if (ret) | 709 | if (ret) |
752 | return ret; | 710 | return ret; |
753 | 711 | ||
754 | /* Read the PHY ID */ | ||
755 | lp->switch_sig = r6040_phy_read(ioaddr, 0, 2); | ||
756 | |||
757 | if (lp->switch_sig == ICPLUS_PHY_ID) { | ||
758 | r6040_phy_write(ioaddr, 29, 31, 0x175C); /* Enable registers */ | ||
759 | lp->phy_mode = 0x8000; | ||
760 | } else { | ||
761 | /* PHY Mode Check */ | ||
762 | r6040_phy_write(ioaddr, lp->phy_addr, 4, PHY_CAP); | ||
763 | r6040_phy_write(ioaddr, lp->phy_addr, 0, PHY_MODE); | ||
764 | |||
765 | if (PHY_MODE == 0x3100) | ||
766 | lp->phy_mode = r6040_phy_mode_chk(dev); | ||
767 | else | ||
768 | lp->phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0; | ||
769 | } | ||
770 | |||
771 | /* Set duplex mode */ | ||
772 | lp->mcr0 |= lp->phy_mode; | ||
773 | |||
774 | /* improve performance (by RDC guys) */ | 712 | /* improve performance (by RDC guys) */ |
775 | r6040_phy_write(ioaddr, 30, 17, (r6040_phy_read(ioaddr, 30, 17) | 0x4000)); | 713 | r6040_phy_write(ioaddr, 30, 17, (r6040_phy_read(ioaddr, 30, 17) | 0x4000)); |
776 | r6040_phy_write(ioaddr, 30, 17, ~((~r6040_phy_read(ioaddr, 30, 17)) | 0x2000)); | 714 | r6040_phy_write(ioaddr, 30, 17, ~((~r6040_phy_read(ioaddr, 30, 17)) | 0x2000)); |
@@ -783,35 +721,6 @@ static int r6040_up(struct net_device *dev) | |||
783 | return 0; | 721 | return 0; |
784 | } | 722 | } |
785 | 723 | ||
786 | /* | ||
787 | A periodic timer routine | ||
788 | Polling PHY Chip Link Status | ||
789 | */ | ||
790 | static void r6040_timer(unsigned long data) | ||
791 | { | ||
792 | struct net_device *dev = (struct net_device *)data; | ||
793 | struct r6040_private *lp = netdev_priv(dev); | ||
794 | void __iomem *ioaddr = lp->base; | ||
795 | u16 phy_mode; | ||
796 | |||
797 | /* Polling PHY Chip Status */ | ||
798 | if (PHY_MODE == 0x3100) | ||
799 | phy_mode = r6040_phy_mode_chk(dev); | ||
800 | else | ||
801 | phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0; | ||
802 | |||
803 | if (phy_mode != lp->phy_mode) { | ||
804 | lp->phy_mode = phy_mode; | ||
805 | lp->mcr0 = (lp->mcr0 & 0x7fff) | phy_mode; | ||
806 | iowrite16(lp->mcr0, ioaddr); | ||
807 | } | ||
808 | |||
809 | /* Timer active again */ | ||
810 | mod_timer(&lp->timer, round_jiffies(jiffies + HZ)); | ||
811 | |||
812 | /* Check media */ | ||
813 | mii_check_media(&lp->mii_if, 1, 1); | ||
814 | } | ||
815 | 724 | ||
816 | /* Read/set MAC address routines */ | 725 | /* Read/set MAC address routines */ |
817 | static void r6040_mac_address(struct net_device *dev) | 726 | static void r6040_mac_address(struct net_device *dev) |
@@ -873,10 +782,6 @@ static int r6040_open(struct net_device *dev) | |||
873 | napi_enable(&lp->napi); | 782 | napi_enable(&lp->napi); |
874 | netif_start_queue(dev); | 783 | netif_start_queue(dev); |
875 | 784 | ||
876 | /* set and active a timer process */ | ||
877 | setup_timer(&lp->timer, r6040_timer, (unsigned long) dev); | ||
878 | if (lp->switch_sig != ICPLUS_PHY_ID) | ||
879 | mod_timer(&lp->timer, jiffies + HZ); | ||
880 | return 0; | 785 | return 0; |
881 | } | 786 | } |
882 | 787 | ||
@@ -1015,40 +920,22 @@ static void netdev_get_drvinfo(struct net_device *dev, | |||
1015 | static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | 920 | static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
1016 | { | 921 | { |
1017 | struct r6040_private *rp = netdev_priv(dev); | 922 | struct r6040_private *rp = netdev_priv(dev); |
1018 | int rc; | ||
1019 | |||
1020 | spin_lock_irq(&rp->lock); | ||
1021 | rc = mii_ethtool_gset(&rp->mii_if, cmd); | ||
1022 | spin_unlock_irq(&rp->lock); | ||
1023 | 923 | ||
1024 | return rc; | 924 | return phy_ethtool_gset(rp->phydev, cmd); |
1025 | } | 925 | } |
1026 | 926 | ||
1027 | static int netdev_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | 927 | static int netdev_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
1028 | { | 928 | { |
1029 | struct r6040_private *rp = netdev_priv(dev); | 929 | struct r6040_private *rp = netdev_priv(dev); |
1030 | int rc; | ||
1031 | |||
1032 | spin_lock_irq(&rp->lock); | ||
1033 | rc = mii_ethtool_sset(&rp->mii_if, cmd); | ||
1034 | spin_unlock_irq(&rp->lock); | ||
1035 | r6040_set_carrier(&rp->mii_if); | ||
1036 | |||
1037 | return rc; | ||
1038 | } | ||
1039 | |||
1040 | static u32 netdev_get_link(struct net_device *dev) | ||
1041 | { | ||
1042 | struct r6040_private *rp = netdev_priv(dev); | ||
1043 | 930 | ||
1044 | return mii_link_ok(&rp->mii_if); | 931 | return phy_ethtool_sset(rp->phydev, cmd); |
1045 | } | 932 | } |
1046 | 933 | ||
1047 | static const struct ethtool_ops netdev_ethtool_ops = { | 934 | static const struct ethtool_ops netdev_ethtool_ops = { |
1048 | .get_drvinfo = netdev_get_drvinfo, | 935 | .get_drvinfo = netdev_get_drvinfo, |
1049 | .get_settings = netdev_get_settings, | 936 | .get_settings = netdev_get_settings, |
1050 | .set_settings = netdev_set_settings, | 937 | .set_settings = netdev_set_settings, |
1051 | .get_link = netdev_get_link, | 938 | .get_link = ethtool_op_get_link, |
1052 | }; | 939 | }; |
1053 | 940 | ||
1054 | static const struct net_device_ops r6040_netdev_ops = { | 941 | static const struct net_device_ops r6040_netdev_ops = { |
@@ -1067,6 +954,79 @@ static const struct net_device_ops r6040_netdev_ops = { | |||
1067 | #endif | 954 | #endif |
1068 | }; | 955 | }; |
1069 | 956 | ||
957 | static void r6040_adjust_link(struct net_device *dev) | ||
958 | { | ||
959 | struct r6040_private *lp = netdev_priv(dev); | ||
960 | struct phy_device *phydev = lp->phydev; | ||
961 | int status_changed = 0; | ||
962 | void __iomem *ioaddr = lp->base; | ||
963 | |||
964 | BUG_ON(!phydev); | ||
965 | |||
966 | if (lp->old_link != phydev->link) { | ||
967 | status_changed = 1; | ||
968 | lp->old_link = phydev->link; | ||
969 | } | ||
970 | |||
971 | /* reflect duplex change */ | ||
972 | if (phydev->link && (lp->old_duplex != phydev->duplex)) { | ||
973 | lp->mcr0 |= (phydev->duplex == DUPLEX_FULL ? 0x8000 : 0); | ||
974 | iowrite16(lp->mcr0, ioaddr); | ||
975 | |||
976 | status_changed = 1; | ||
977 | lp->old_duplex = phydev->duplex; | ||
978 | } | ||
979 | |||
980 | if (status_changed) { | ||
981 | pr_info("%s: link %s", dev->name, phydev->link ? | ||
982 | "UP" : "DOWN"); | ||
983 | if (phydev->link) | ||
984 | pr_cont(" - %d/%s", phydev->speed, | ||
985 | DUPLEX_FULL == phydev->duplex ? "full" : "half"); | ||
986 | pr_cont("\n"); | ||
987 | } | ||
988 | } | ||
989 | |||
990 | static int r6040_mii_probe(struct net_device *dev) | ||
991 | { | ||
992 | struct r6040_private *lp = netdev_priv(dev); | ||
993 | struct phy_device *phydev = NULL; | ||
994 | |||
995 | phydev = phy_find_first(lp->mii_bus); | ||
996 | if (!phydev) { | ||
997 | dev_err(&lp->pdev->dev, "no PHY found\n"); | ||
998 | return -ENODEV; | ||
999 | } | ||
1000 | |||
1001 | phydev = phy_connect(dev, dev_name(&phydev->dev), &r6040_adjust_link, | ||
1002 | 0, PHY_INTERFACE_MODE_MII); | ||
1003 | |||
1004 | if (IS_ERR(phydev)) { | ||
1005 | dev_err(&lp->pdev->dev, "could not attach to PHY\n"); | ||
1006 | return PTR_ERR(phydev); | ||
1007 | } | ||
1008 | |||
1009 | /* mask with MAC supported features */ | ||
1010 | phydev->supported &= (SUPPORTED_10baseT_Half | ||
1011 | | SUPPORTED_10baseT_Full | ||
1012 | | SUPPORTED_100baseT_Half | ||
1013 | | SUPPORTED_100baseT_Full | ||
1014 | | SUPPORTED_Autoneg | ||
1015 | | SUPPORTED_MII | ||
1016 | | SUPPORTED_TP); | ||
1017 | |||
1018 | phydev->advertising = phydev->supported; | ||
1019 | lp->phydev = phydev; | ||
1020 | lp->old_link = 0; | ||
1021 | lp->old_duplex = -1; | ||
1022 | |||
1023 | dev_info(&lp->pdev->dev, "attached PHY driver [%s] " | ||
1024 | "(mii_bus:phy_addr=%s)\n", | ||
1025 | phydev->drv->name, dev_name(&phydev->dev)); | ||
1026 | |||
1027 | return 0; | ||
1028 | } | ||
1029 | |||
1070 | static int __devinit r6040_init_one(struct pci_dev *pdev, | 1030 | static int __devinit r6040_init_one(struct pci_dev *pdev, |
1071 | const struct pci_device_id *ent) | 1031 | const struct pci_device_id *ent) |
1072 | { | 1032 | { |
@@ -1077,6 +1037,7 @@ static int __devinit r6040_init_one(struct pci_dev *pdev, | |||
1077 | static int card_idx = -1; | 1037 | static int card_idx = -1; |
1078 | int bar = 0; | 1038 | int bar = 0; |
1079 | u16 *adrp; | 1039 | u16 *adrp; |
1040 | int i; | ||
1080 | 1041 | ||
1081 | printk("%s\n", version); | 1042 | printk("%s\n", version); |
1082 | 1043 | ||
@@ -1163,7 +1124,6 @@ static int __devinit r6040_init_one(struct pci_dev *pdev, | |||
1163 | /* Init RDC private data */ | 1124 | /* Init RDC private data */ |
1164 | lp->mcr0 = 0x1002; | 1125 | lp->mcr0 = 0x1002; |
1165 | lp->phy_addr = phy_table[card_idx]; | 1126 | lp->phy_addr = phy_table[card_idx]; |
1166 | lp->switch_sig = 0; | ||
1167 | 1127 | ||
1168 | /* The RDC-specific entries in the device structure. */ | 1128 | /* The RDC-specific entries in the device structure. */ |
1169 | dev->netdev_ops = &r6040_netdev_ops; | 1129 | dev->netdev_ops = &r6040_netdev_ops; |
@@ -1171,28 +1131,54 @@ static int __devinit r6040_init_one(struct pci_dev *pdev, | |||
1171 | dev->watchdog_timeo = TX_TIMEOUT; | 1131 | dev->watchdog_timeo = TX_TIMEOUT; |
1172 | 1132 | ||
1173 | netif_napi_add(dev, &lp->napi, r6040_poll, 64); | 1133 | netif_napi_add(dev, &lp->napi, r6040_poll, 64); |
1174 | lp->mii_if.dev = dev; | 1134 | |
1175 | lp->mii_if.mdio_read = r6040_mdio_read; | 1135 | lp->mii_bus = mdiobus_alloc(); |
1176 | lp->mii_if.mdio_write = r6040_mdio_write; | 1136 | if (!lp->mii_bus) { |
1177 | lp->mii_if.phy_id = lp->phy_addr; | 1137 | dev_err(&pdev->dev, "mdiobus_alloc() failed\n"); |
1178 | lp->mii_if.phy_id_mask = 0x1f; | ||
1179 | lp->mii_if.reg_num_mask = 0x1f; | ||
1180 | |||
1181 | /* Check the vendor ID on the PHY, if 0xffff assume none attached */ | ||
1182 | if (r6040_phy_read(ioaddr, lp->phy_addr, 2) == 0xffff) { | ||
1183 | dev_err(&pdev->dev, "Failed to detect an attached PHY\n"); | ||
1184 | err = -ENODEV; | ||
1185 | goto err_out_unmap; | 1138 | goto err_out_unmap; |
1186 | } | 1139 | } |
1187 | 1140 | ||
1141 | lp->mii_bus->priv = dev; | ||
1142 | lp->mii_bus->read = r6040_mdiobus_read; | ||
1143 | lp->mii_bus->write = r6040_mdiobus_write; | ||
1144 | lp->mii_bus->reset = r6040_mdiobus_reset; | ||
1145 | lp->mii_bus->name = "r6040_eth_mii"; | ||
1146 | snprintf(lp->mii_bus->id, MII_BUS_ID_SIZE, "%x", card_idx); | ||
1147 | lp->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL); | ||
1148 | if (!lp->mii_bus->irq) { | ||
1149 | dev_err(&pdev->dev, "mii_bus irq allocation failed\n"); | ||
1150 | goto err_out_mdio; | ||
1151 | } | ||
1152 | |||
1153 | for (i = 0; i < PHY_MAX_ADDR; i++) | ||
1154 | lp->mii_bus->irq[i] = PHY_POLL; | ||
1155 | |||
1156 | err = mdiobus_register(lp->mii_bus); | ||
1157 | if (err) { | ||
1158 | dev_err(&pdev->dev, "failed to register MII bus\n"); | ||
1159 | goto err_out_mdio_irq; | ||
1160 | } | ||
1161 | |||
1162 | err = r6040_mii_probe(dev); | ||
1163 | if (err) { | ||
1164 | dev_err(&pdev->dev, "failed to probe MII bus\n"); | ||
1165 | goto err_out_mdio_unregister; | ||
1166 | } | ||
1167 | |||
1188 | /* Register net device. After this dev->name assign */ | 1168 | /* Register net device. After this dev->name assign */ |
1189 | err = register_netdev(dev); | 1169 | err = register_netdev(dev); |
1190 | if (err) { | 1170 | if (err) { |
1191 | dev_err(&pdev->dev, "Failed to register net device\n"); | 1171 | dev_err(&pdev->dev, "Failed to register net device\n"); |
1192 | goto err_out_unmap; | 1172 | goto err_out_mdio_unregister; |
1193 | } | 1173 | } |
1194 | return 0; | 1174 | return 0; |
1195 | 1175 | ||
1176 | err_out_mdio_unregister: | ||
1177 | mdiobus_unregister(lp->mii_bus); | ||
1178 | err_out_mdio_irq: | ||
1179 | kfree(lp->mii_bus->irq); | ||
1180 | err_out_mdio: | ||
1181 | mdiobus_free(lp->mii_bus); | ||
1196 | err_out_unmap: | 1182 | err_out_unmap: |
1197 | pci_iounmap(pdev, ioaddr); | 1183 | pci_iounmap(pdev, ioaddr); |
1198 | err_out_free_res: | 1184 | err_out_free_res: |
@@ -1206,8 +1192,12 @@ err_out: | |||
1206 | static void __devexit r6040_remove_one(struct pci_dev *pdev) | 1192 | static void __devexit r6040_remove_one(struct pci_dev *pdev) |
1207 | { | 1193 | { |
1208 | struct net_device *dev = pci_get_drvdata(pdev); | 1194 | struct net_device *dev = pci_get_drvdata(pdev); |
1195 | struct r6040_private *lp = netdev_priv(dev); | ||
1209 | 1196 | ||
1210 | unregister_netdev(dev); | 1197 | unregister_netdev(dev); |
1198 | mdiobus_unregister(lp->mii_bus); | ||
1199 | kfree(lp->mii_bus->irq); | ||
1200 | mdiobus_free(lp->mii_bus); | ||
1211 | pci_release_regions(pdev); | 1201 | pci_release_regions(pdev); |
1212 | free_netdev(dev); | 1202 | free_netdev(dev); |
1213 | pci_disable_device(pdev); | 1203 | pci_disable_device(pdev); |
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index 96b6cfbf0a3a..239d7efdd450 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -88,7 +88,7 @@ static const int multicast_filter_limit = 32; | |||
88 | #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) | 88 | #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) |
89 | #define RTL_R8(reg) readb (ioaddr + (reg)) | 89 | #define RTL_R8(reg) readb (ioaddr + (reg)) |
90 | #define RTL_R16(reg) readw (ioaddr + (reg)) | 90 | #define RTL_R16(reg) readw (ioaddr + (reg)) |
91 | #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) | 91 | #define RTL_R32(reg) readl (ioaddr + (reg)) |
92 | 92 | ||
93 | enum mac_version { | 93 | enum mac_version { |
94 | RTL_GIGA_MAC_NONE = 0x00, | 94 | RTL_GIGA_MAC_NONE = 0x00, |
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c index 156460527231..26b0cc219204 100644 --- a/drivers/net/sfc/efx.c +++ b/drivers/net/sfc/efx.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include "nic.h" | 27 | #include "nic.h" |
28 | 28 | ||
29 | #include "mcdi.h" | 29 | #include "mcdi.h" |
30 | #include "workarounds.h" | ||
30 | 31 | ||
31 | /************************************************************************** | 32 | /************************************************************************** |
32 | * | 33 | * |
@@ -92,13 +93,6 @@ const char *efx_reset_type_names[] = { | |||
92 | 93 | ||
93 | #define EFX_MAX_MTU (9 * 1024) | 94 | #define EFX_MAX_MTU (9 * 1024) |
94 | 95 | ||
95 | /* RX slow fill workqueue. If memory allocation fails in the fast path, | ||
96 | * a work item is pushed onto this work queue to retry the allocation later, | ||
97 | * to avoid the NIC being starved of RX buffers. Since this is a per cpu | ||
98 | * workqueue, there is nothing to be gained in making it per NIC | ||
99 | */ | ||
100 | static struct workqueue_struct *refill_workqueue; | ||
101 | |||
102 | /* Reset workqueue. If any NIC has a hardware failure then a reset will be | 96 | /* Reset workqueue. If any NIC has a hardware failure then a reset will be |
103 | * queued onto this work queue. This is not a per-nic work queue, because | 97 | * queued onto this work queue. This is not a per-nic work queue, because |
104 | * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised. | 98 | * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised. |
@@ -475,7 +469,8 @@ static void efx_init_channels(struct efx_nic *efx) | |||
475 | efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) + | 469 | efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) + |
476 | EFX_MAX_FRAME_LEN(efx->net_dev->mtu) + | 470 | EFX_MAX_FRAME_LEN(efx->net_dev->mtu) + |
477 | efx->type->rx_buffer_padding); | 471 | efx->type->rx_buffer_padding); |
478 | efx->rx_buffer_order = get_order(efx->rx_buffer_len); | 472 | efx->rx_buffer_order = get_order(efx->rx_buffer_len + |
473 | sizeof(struct efx_rx_page_state)); | ||
479 | 474 | ||
480 | /* Initialise the channels */ | 475 | /* Initialise the channels */ |
481 | efx_for_each_channel(channel, efx) { | 476 | efx_for_each_channel(channel, efx) { |
@@ -515,11 +510,11 @@ static void efx_start_channel(struct efx_channel *channel) | |||
515 | channel->enabled = true; | 510 | channel->enabled = true; |
516 | smp_wmb(); | 511 | smp_wmb(); |
517 | 512 | ||
518 | napi_enable(&channel->napi_str); | 513 | /* Fill the queues before enabling NAPI */ |
519 | |||
520 | /* Load up RX descriptors */ | ||
521 | efx_for_each_channel_rx_queue(rx_queue, channel) | 514 | efx_for_each_channel_rx_queue(rx_queue, channel) |
522 | efx_fast_push_rx_descriptors(rx_queue); | 515 | efx_fast_push_rx_descriptors(rx_queue); |
516 | |||
517 | napi_enable(&channel->napi_str); | ||
523 | } | 518 | } |
524 | 519 | ||
525 | /* This disables event queue processing and packet transmission. | 520 | /* This disables event queue processing and packet transmission. |
@@ -528,8 +523,6 @@ static void efx_start_channel(struct efx_channel *channel) | |||
528 | */ | 523 | */ |
529 | static void efx_stop_channel(struct efx_channel *channel) | 524 | static void efx_stop_channel(struct efx_channel *channel) |
530 | { | 525 | { |
531 | struct efx_rx_queue *rx_queue; | ||
532 | |||
533 | if (!channel->enabled) | 526 | if (!channel->enabled) |
534 | return; | 527 | return; |
535 | 528 | ||
@@ -537,12 +530,6 @@ static void efx_stop_channel(struct efx_channel *channel) | |||
537 | 530 | ||
538 | channel->enabled = false; | 531 | channel->enabled = false; |
539 | napi_disable(&channel->napi_str); | 532 | napi_disable(&channel->napi_str); |
540 | |||
541 | /* Ensure that any worker threads have exited or will be no-ops */ | ||
542 | efx_for_each_channel_rx_queue(rx_queue, channel) { | ||
543 | spin_lock_bh(&rx_queue->add_lock); | ||
544 | spin_unlock_bh(&rx_queue->add_lock); | ||
545 | } | ||
546 | } | 533 | } |
547 | 534 | ||
548 | static void efx_fini_channels(struct efx_nic *efx) | 535 | static void efx_fini_channels(struct efx_nic *efx) |
@@ -556,10 +543,18 @@ static void efx_fini_channels(struct efx_nic *efx) | |||
556 | BUG_ON(efx->port_enabled); | 543 | BUG_ON(efx->port_enabled); |
557 | 544 | ||
558 | rc = efx_nic_flush_queues(efx); | 545 | rc = efx_nic_flush_queues(efx); |
559 | if (rc) | 546 | if (rc && EFX_WORKAROUND_7803(efx)) { |
547 | /* Schedule a reset to recover from the flush failure. The | ||
548 | * descriptor caches reference memory we're about to free, | ||
549 | * but falcon_reconfigure_mac_wrapper() won't reconnect | ||
550 | * the MACs because of the pending reset. */ | ||
551 | EFX_ERR(efx, "Resetting to recover from flush failure\n"); | ||
552 | efx_schedule_reset(efx, RESET_TYPE_ALL); | ||
553 | } else if (rc) { | ||
560 | EFX_ERR(efx, "failed to flush queues\n"); | 554 | EFX_ERR(efx, "failed to flush queues\n"); |
561 | else | 555 | } else { |
562 | EFX_LOG(efx, "successfully flushed all queues\n"); | 556 | EFX_LOG(efx, "successfully flushed all queues\n"); |
557 | } | ||
563 | 558 | ||
564 | efx_for_each_channel(channel, efx) { | 559 | efx_for_each_channel(channel, efx) { |
565 | EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel); | 560 | EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel); |
@@ -586,9 +581,9 @@ static void efx_remove_channel(struct efx_channel *channel) | |||
586 | efx_remove_eventq(channel); | 581 | efx_remove_eventq(channel); |
587 | } | 582 | } |
588 | 583 | ||
589 | void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay) | 584 | void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue) |
590 | { | 585 | { |
591 | queue_delayed_work(refill_workqueue, &rx_queue->work, delay); | 586 | mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100)); |
592 | } | 587 | } |
593 | 588 | ||
594 | /************************************************************************** | 589 | /************************************************************************** |
@@ -1233,15 +1228,8 @@ static void efx_start_all(struct efx_nic *efx) | |||
1233 | * since we're holding the rtnl_lock at this point. */ | 1228 | * since we're holding the rtnl_lock at this point. */ |
1234 | static void efx_flush_all(struct efx_nic *efx) | 1229 | static void efx_flush_all(struct efx_nic *efx) |
1235 | { | 1230 | { |
1236 | struct efx_rx_queue *rx_queue; | ||
1237 | |||
1238 | /* Make sure the hardware monitor is stopped */ | 1231 | /* Make sure the hardware monitor is stopped */ |
1239 | cancel_delayed_work_sync(&efx->monitor_work); | 1232 | cancel_delayed_work_sync(&efx->monitor_work); |
1240 | |||
1241 | /* Ensure that all RX slow refills are complete. */ | ||
1242 | efx_for_each_rx_queue(rx_queue, efx) | ||
1243 | cancel_delayed_work_sync(&rx_queue->work); | ||
1244 | |||
1245 | /* Stop scheduled port reconfigurations */ | 1233 | /* Stop scheduled port reconfigurations */ |
1246 | cancel_work_sync(&efx->mac_work); | 1234 | cancel_work_sync(&efx->mac_work); |
1247 | } | 1235 | } |
@@ -1530,11 +1518,8 @@ static struct net_device_stats *efx_net_stats(struct net_device *net_dev) | |||
1530 | stats->tx_window_errors = mac_stats->tx_late_collision; | 1518 | stats->tx_window_errors = mac_stats->tx_late_collision; |
1531 | 1519 | ||
1532 | stats->rx_errors = (stats->rx_length_errors + | 1520 | stats->rx_errors = (stats->rx_length_errors + |
1533 | stats->rx_over_errors + | ||
1534 | stats->rx_crc_errors + | 1521 | stats->rx_crc_errors + |
1535 | stats->rx_frame_errors + | 1522 | stats->rx_frame_errors + |
1536 | stats->rx_fifo_errors + | ||
1537 | stats->rx_missed_errors + | ||
1538 | mac_stats->rx_symbol_error); | 1523 | mac_stats->rx_symbol_error); |
1539 | stats->tx_errors = (stats->tx_window_errors + | 1524 | stats->tx_errors = (stats->tx_window_errors + |
1540 | mac_stats->tx_bad); | 1525 | mac_stats->tx_bad); |
@@ -1886,6 +1871,9 @@ static void efx_reset_work(struct work_struct *data) | |||
1886 | { | 1871 | { |
1887 | struct efx_nic *efx = container_of(data, struct efx_nic, reset_work); | 1872 | struct efx_nic *efx = container_of(data, struct efx_nic, reset_work); |
1888 | 1873 | ||
1874 | if (efx->reset_pending == RESET_TYPE_NONE) | ||
1875 | return; | ||
1876 | |||
1889 | /* If we're not RUNNING then don't reset. Leave the reset_pending | 1877 | /* If we're not RUNNING then don't reset. Leave the reset_pending |
1890 | * flag set so that efx_pci_probe_main will be retried */ | 1878 | * flag set so that efx_pci_probe_main will be retried */ |
1891 | if (efx->state != STATE_RUNNING) { | 1879 | if (efx->state != STATE_RUNNING) { |
@@ -2052,8 +2040,8 @@ static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type, | |||
2052 | rx_queue->queue = i; | 2040 | rx_queue->queue = i; |
2053 | rx_queue->channel = &efx->channel[0]; /* for safety */ | 2041 | rx_queue->channel = &efx->channel[0]; /* for safety */ |
2054 | rx_queue->buffer = NULL; | 2042 | rx_queue->buffer = NULL; |
2055 | spin_lock_init(&rx_queue->add_lock); | 2043 | setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, |
2056 | INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work); | 2044 | (unsigned long)rx_queue); |
2057 | } | 2045 | } |
2058 | 2046 | ||
2059 | efx->type = type; | 2047 | efx->type = type; |
@@ -2332,6 +2320,9 @@ static int efx_pm_thaw(struct device *dev) | |||
2332 | 2320 | ||
2333 | efx->type->resume_wol(efx); | 2321 | efx->type->resume_wol(efx); |
2334 | 2322 | ||
2323 | /* Reschedule any quenched resets scheduled during efx_pm_freeze() */ | ||
2324 | queue_work(reset_workqueue, &efx->reset_work); | ||
2325 | |||
2335 | return 0; | 2326 | return 0; |
2336 | } | 2327 | } |
2337 | 2328 | ||
@@ -2421,11 +2412,6 @@ static int __init efx_init_module(void) | |||
2421 | if (rc) | 2412 | if (rc) |
2422 | goto err_notifier; | 2413 | goto err_notifier; |
2423 | 2414 | ||
2424 | refill_workqueue = create_workqueue("sfc_refill"); | ||
2425 | if (!refill_workqueue) { | ||
2426 | rc = -ENOMEM; | ||
2427 | goto err_refill; | ||
2428 | } | ||
2429 | reset_workqueue = create_singlethread_workqueue("sfc_reset"); | 2415 | reset_workqueue = create_singlethread_workqueue("sfc_reset"); |
2430 | if (!reset_workqueue) { | 2416 | if (!reset_workqueue) { |
2431 | rc = -ENOMEM; | 2417 | rc = -ENOMEM; |
@@ -2441,8 +2427,6 @@ static int __init efx_init_module(void) | |||
2441 | err_pci: | 2427 | err_pci: |
2442 | destroy_workqueue(reset_workqueue); | 2428 | destroy_workqueue(reset_workqueue); |
2443 | err_reset: | 2429 | err_reset: |
2444 | destroy_workqueue(refill_workqueue); | ||
2445 | err_refill: | ||
2446 | unregister_netdevice_notifier(&efx_netdev_notifier); | 2430 | unregister_netdevice_notifier(&efx_netdev_notifier); |
2447 | err_notifier: | 2431 | err_notifier: |
2448 | return rc; | 2432 | return rc; |
@@ -2454,7 +2438,6 @@ static void __exit efx_exit_module(void) | |||
2454 | 2438 | ||
2455 | pci_unregister_driver(&efx_pci_driver); | 2439 | pci_unregister_driver(&efx_pci_driver); |
2456 | destroy_workqueue(reset_workqueue); | 2440 | destroy_workqueue(reset_workqueue); |
2457 | destroy_workqueue(refill_workqueue); | ||
2458 | unregister_netdevice_notifier(&efx_netdev_notifier); | 2441 | unregister_netdevice_notifier(&efx_netdev_notifier); |
2459 | 2442 | ||
2460 | } | 2443 | } |
diff --git a/drivers/net/sfc/efx.h b/drivers/net/sfc/efx.h index ffd708c5304a..e1e448887dfc 100644 --- a/drivers/net/sfc/efx.h +++ b/drivers/net/sfc/efx.h | |||
@@ -47,12 +47,12 @@ extern void efx_init_rx_queue(struct efx_rx_queue *rx_queue); | |||
47 | extern void efx_fini_rx_queue(struct efx_rx_queue *rx_queue); | 47 | extern void efx_fini_rx_queue(struct efx_rx_queue *rx_queue); |
48 | extern void efx_rx_strategy(struct efx_channel *channel); | 48 | extern void efx_rx_strategy(struct efx_channel *channel); |
49 | extern void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue); | 49 | extern void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue); |
50 | extern void efx_rx_work(struct work_struct *data); | 50 | extern void efx_rx_slow_fill(unsigned long context); |
51 | extern void __efx_rx_packet(struct efx_channel *channel, | 51 | extern void __efx_rx_packet(struct efx_channel *channel, |
52 | struct efx_rx_buffer *rx_buf, bool checksummed); | 52 | struct efx_rx_buffer *rx_buf, bool checksummed); |
53 | extern void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index, | 53 | extern void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index, |
54 | unsigned int len, bool checksummed, bool discard); | 54 | unsigned int len, bool checksummed, bool discard); |
55 | extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay); | 55 | extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue); |
56 | #define EFX_RXQ_SIZE 1024 | 56 | #define EFX_RXQ_SIZE 1024 |
57 | #define EFX_RXQ_MASK (EFX_RXQ_SIZE - 1) | 57 | #define EFX_RXQ_MASK (EFX_RXQ_SIZE - 1) |
58 | 58 | ||
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c index 655b697b45b2..8558865ff380 100644 --- a/drivers/net/sfc/falcon.c +++ b/drivers/net/sfc/falcon.c | |||
@@ -548,7 +548,9 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx) | |||
548 | { | 548 | { |
549 | struct efx_link_state *link_state = &efx->link_state; | 549 | struct efx_link_state *link_state = &efx->link_state; |
550 | efx_oword_t reg; | 550 | efx_oword_t reg; |
551 | int link_speed; | 551 | int link_speed, isolate; |
552 | |||
553 | isolate = (efx->reset_pending != RESET_TYPE_NONE); | ||
552 | 554 | ||
553 | switch (link_state->speed) { | 555 | switch (link_state->speed) { |
554 | case 10000: link_speed = 3; break; | 556 | case 10000: link_speed = 3; break; |
@@ -570,7 +572,7 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx) | |||
570 | * discarded. */ | 572 | * discarded. */ |
571 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) { | 573 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) { |
572 | EFX_SET_OWORD_FIELD(reg, FRF_BB_TXFIFO_DRAIN_EN, | 574 | EFX_SET_OWORD_FIELD(reg, FRF_BB_TXFIFO_DRAIN_EN, |
573 | !link_state->up); | 575 | !link_state->up || isolate); |
574 | } | 576 | } |
575 | 577 | ||
576 | efx_writeo(efx, ®, FR_AB_MAC_CTRL); | 578 | efx_writeo(efx, ®, FR_AB_MAC_CTRL); |
@@ -584,7 +586,7 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx) | |||
584 | EFX_SET_OWORD_FIELD(reg, FRF_AZ_RX_XOFF_MAC_EN, 1); | 586 | EFX_SET_OWORD_FIELD(reg, FRF_AZ_RX_XOFF_MAC_EN, 1); |
585 | /* Unisolate the MAC -> RX */ | 587 | /* Unisolate the MAC -> RX */ |
586 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) | 588 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) |
587 | EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, 1); | 589 | EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, !isolate); |
588 | efx_writeo(efx, ®, FR_AZ_RX_CFG); | 590 | efx_writeo(efx, ®, FR_AZ_RX_CFG); |
589 | } | 591 | } |
590 | 592 | ||
diff --git a/drivers/net/sfc/mcdi_phy.c b/drivers/net/sfc/mcdi_phy.c index 6032c0e1f1f8..86e43b1f7689 100644 --- a/drivers/net/sfc/mcdi_phy.c +++ b/drivers/net/sfc/mcdi_phy.c | |||
@@ -20,7 +20,7 @@ | |||
20 | #include "nic.h" | 20 | #include "nic.h" |
21 | #include "selftest.h" | 21 | #include "selftest.h" |
22 | 22 | ||
23 | struct efx_mcdi_phy_cfg { | 23 | struct efx_mcdi_phy_data { |
24 | u32 flags; | 24 | u32 flags; |
25 | u32 type; | 25 | u32 type; |
26 | u32 supported_cap; | 26 | u32 supported_cap; |
@@ -35,7 +35,7 @@ struct efx_mcdi_phy_cfg { | |||
35 | }; | 35 | }; |
36 | 36 | ||
37 | static int | 37 | static int |
38 | efx_mcdi_get_phy_cfg(struct efx_nic *efx, struct efx_mcdi_phy_cfg *cfg) | 38 | efx_mcdi_get_phy_cfg(struct efx_nic *efx, struct efx_mcdi_phy_data *cfg) |
39 | { | 39 | { |
40 | u8 outbuf[MC_CMD_GET_PHY_CFG_OUT_LEN]; | 40 | u8 outbuf[MC_CMD_GET_PHY_CFG_OUT_LEN]; |
41 | size_t outlen; | 41 | size_t outlen; |
@@ -259,7 +259,7 @@ static u32 ethtool_to_mcdi_cap(u32 cap) | |||
259 | 259 | ||
260 | static u32 efx_get_mcdi_phy_flags(struct efx_nic *efx) | 260 | static u32 efx_get_mcdi_phy_flags(struct efx_nic *efx) |
261 | { | 261 | { |
262 | struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data; | 262 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
263 | enum efx_phy_mode mode, supported; | 263 | enum efx_phy_mode mode, supported; |
264 | u32 flags; | 264 | u32 flags; |
265 | 265 | ||
@@ -307,7 +307,7 @@ static u32 mcdi_to_ethtool_media(u32 media) | |||
307 | 307 | ||
308 | static int efx_mcdi_phy_probe(struct efx_nic *efx) | 308 | static int efx_mcdi_phy_probe(struct efx_nic *efx) |
309 | { | 309 | { |
310 | struct efx_mcdi_phy_cfg *phy_data; | 310 | struct efx_mcdi_phy_data *phy_data; |
311 | u8 outbuf[MC_CMD_GET_LINK_OUT_LEN]; | 311 | u8 outbuf[MC_CMD_GET_LINK_OUT_LEN]; |
312 | u32 caps; | 312 | u32 caps; |
313 | int rc; | 313 | int rc; |
@@ -395,6 +395,7 @@ static int efx_mcdi_phy_probe(struct efx_nic *efx) | |||
395 | efx->wanted_fc = EFX_FC_RX | EFX_FC_TX; | 395 | efx->wanted_fc = EFX_FC_RX | EFX_FC_TX; |
396 | if (phy_data->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN)) | 396 | if (phy_data->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN)) |
397 | efx->wanted_fc |= EFX_FC_AUTO; | 397 | efx->wanted_fc |= EFX_FC_AUTO; |
398 | efx_link_set_wanted_fc(efx, efx->wanted_fc); | ||
398 | 399 | ||
399 | return 0; | 400 | return 0; |
400 | 401 | ||
@@ -405,7 +406,7 @@ fail: | |||
405 | 406 | ||
406 | int efx_mcdi_phy_reconfigure(struct efx_nic *efx) | 407 | int efx_mcdi_phy_reconfigure(struct efx_nic *efx) |
407 | { | 408 | { |
408 | struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data; | 409 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
409 | u32 caps = (efx->link_advertising ? | 410 | u32 caps = (efx->link_advertising ? |
410 | ethtool_to_mcdi_cap(efx->link_advertising) : | 411 | ethtool_to_mcdi_cap(efx->link_advertising) : |
411 | phy_cfg->forced_cap); | 412 | phy_cfg->forced_cap); |
@@ -446,7 +447,7 @@ void efx_mcdi_phy_decode_link(struct efx_nic *efx, | |||
446 | */ | 447 | */ |
447 | void efx_mcdi_phy_check_fcntl(struct efx_nic *efx, u32 lpa) | 448 | void efx_mcdi_phy_check_fcntl(struct efx_nic *efx, u32 lpa) |
448 | { | 449 | { |
449 | struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data; | 450 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
450 | u32 rmtadv; | 451 | u32 rmtadv; |
451 | 452 | ||
452 | /* The link partner capabilities are only relevent if the | 453 | /* The link partner capabilities are only relevent if the |
@@ -505,7 +506,7 @@ static void efx_mcdi_phy_remove(struct efx_nic *efx) | |||
505 | 506 | ||
506 | static void efx_mcdi_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) | 507 | static void efx_mcdi_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) |
507 | { | 508 | { |
508 | struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data; | 509 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
509 | u8 outbuf[MC_CMD_GET_LINK_OUT_LEN]; | 510 | u8 outbuf[MC_CMD_GET_LINK_OUT_LEN]; |
510 | int rc; | 511 | int rc; |
511 | 512 | ||
@@ -535,7 +536,7 @@ static void efx_mcdi_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *e | |||
535 | 536 | ||
536 | static int efx_mcdi_phy_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) | 537 | static int efx_mcdi_phy_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) |
537 | { | 538 | { |
538 | struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data; | 539 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
539 | u32 caps; | 540 | u32 caps; |
540 | int rc; | 541 | int rc; |
541 | 542 | ||
@@ -674,7 +675,7 @@ out: | |||
674 | static int efx_mcdi_phy_run_tests(struct efx_nic *efx, int *results, | 675 | static int efx_mcdi_phy_run_tests(struct efx_nic *efx, int *results, |
675 | unsigned flags) | 676 | unsigned flags) |
676 | { | 677 | { |
677 | struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data; | 678 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
678 | u32 mode; | 679 | u32 mode; |
679 | int rc; | 680 | int rc; |
680 | 681 | ||
@@ -712,7 +713,7 @@ static int efx_mcdi_phy_run_tests(struct efx_nic *efx, int *results, | |||
712 | 713 | ||
713 | const char *efx_mcdi_phy_test_name(struct efx_nic *efx, unsigned int index) | 714 | const char *efx_mcdi_phy_test_name(struct efx_nic *efx, unsigned int index) |
714 | { | 715 | { |
715 | struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data; | 716 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
716 | 717 | ||
717 | if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_BIST_LBN)) { | 718 | if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_BIST_LBN)) { |
718 | if (index == 0) | 719 | if (index == 0) |
diff --git a/drivers/net/sfc/net_driver.h b/drivers/net/sfc/net_driver.h index 4762c91cb587..ba636e086fc3 100644 --- a/drivers/net/sfc/net_driver.h +++ b/drivers/net/sfc/net_driver.h | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/etherdevice.h> | 18 | #include <linux/etherdevice.h> |
19 | #include <linux/ethtool.h> | 19 | #include <linux/ethtool.h> |
20 | #include <linux/if_vlan.h> | 20 | #include <linux/if_vlan.h> |
21 | #include <linux/timer.h> | ||
21 | #include <linux/mdio.h> | 22 | #include <linux/mdio.h> |
22 | #include <linux/list.h> | 23 | #include <linux/list.h> |
23 | #include <linux/pci.h> | 24 | #include <linux/pci.h> |
@@ -221,7 +222,6 @@ struct efx_tx_queue { | |||
221 | * If both this and skb are %NULL, the buffer slot is currently free. | 222 | * If both this and skb are %NULL, the buffer slot is currently free. |
222 | * @data: Pointer to ethernet header | 223 | * @data: Pointer to ethernet header |
223 | * @len: Buffer length, in bytes. | 224 | * @len: Buffer length, in bytes. |
224 | * @unmap_addr: DMA address to unmap | ||
225 | */ | 225 | */ |
226 | struct efx_rx_buffer { | 226 | struct efx_rx_buffer { |
227 | dma_addr_t dma_addr; | 227 | dma_addr_t dma_addr; |
@@ -229,7 +229,24 @@ struct efx_rx_buffer { | |||
229 | struct page *page; | 229 | struct page *page; |
230 | char *data; | 230 | char *data; |
231 | unsigned int len; | 231 | unsigned int len; |
232 | dma_addr_t unmap_addr; | 232 | }; |
233 | |||
234 | /** | ||
235 | * struct efx_rx_page_state - Page-based rx buffer state | ||
236 | * | ||
237 | * Inserted at the start of every page allocated for receive buffers. | ||
238 | * Used to facilitate sharing dma mappings between recycled rx buffers | ||
239 | * and those passed up to the kernel. | ||
240 | * | ||
241 | * @refcnt: Number of struct efx_rx_buffer's referencing this page. | ||
242 | * When refcnt falls to zero, the page is unmapped for dma | ||
243 | * @dma_addr: The dma address of this page. | ||
244 | */ | ||
245 | struct efx_rx_page_state { | ||
246 | unsigned refcnt; | ||
247 | dma_addr_t dma_addr; | ||
248 | |||
249 | unsigned int __pad[0] ____cacheline_aligned; | ||
233 | }; | 250 | }; |
234 | 251 | ||
235 | /** | 252 | /** |
@@ -242,10 +259,6 @@ struct efx_rx_buffer { | |||
242 | * @added_count: Number of buffers added to the receive queue. | 259 | * @added_count: Number of buffers added to the receive queue. |
243 | * @notified_count: Number of buffers given to NIC (<= @added_count). | 260 | * @notified_count: Number of buffers given to NIC (<= @added_count). |
244 | * @removed_count: Number of buffers removed from the receive queue. | 261 | * @removed_count: Number of buffers removed from the receive queue. |
245 | * @add_lock: Receive queue descriptor add spin lock. | ||
246 | * This lock must be held in order to add buffers to the RX | ||
247 | * descriptor ring (rxd and buffer) and to update added_count (but | ||
248 | * not removed_count). | ||
249 | * @max_fill: RX descriptor maximum fill level (<= ring size) | 262 | * @max_fill: RX descriptor maximum fill level (<= ring size) |
250 | * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill | 263 | * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill |
251 | * (<= @max_fill) | 264 | * (<= @max_fill) |
@@ -259,12 +272,7 @@ struct efx_rx_buffer { | |||
259 | * overflow was observed. It should never be set. | 272 | * overflow was observed. It should never be set. |
260 | * @alloc_page_count: RX allocation strategy counter. | 273 | * @alloc_page_count: RX allocation strategy counter. |
261 | * @alloc_skb_count: RX allocation strategy counter. | 274 | * @alloc_skb_count: RX allocation strategy counter. |
262 | * @work: Descriptor push work thread | 275 | * @slow_fill: Timer used to defer efx_nic_generate_fill_event(). |
263 | * @buf_page: Page for next RX buffer. | ||
264 | * We can use a single page for multiple RX buffers. This tracks | ||
265 | * the remaining space in the allocation. | ||
266 | * @buf_dma_addr: Page's DMA address. | ||
267 | * @buf_data: Page's host address. | ||
268 | * @flushed: Use when handling queue flushing | 276 | * @flushed: Use when handling queue flushing |
269 | */ | 277 | */ |
270 | struct efx_rx_queue { | 278 | struct efx_rx_queue { |
@@ -277,7 +285,6 @@ struct efx_rx_queue { | |||
277 | int added_count; | 285 | int added_count; |
278 | int notified_count; | 286 | int notified_count; |
279 | int removed_count; | 287 | int removed_count; |
280 | spinlock_t add_lock; | ||
281 | unsigned int max_fill; | 288 | unsigned int max_fill; |
282 | unsigned int fast_fill_trigger; | 289 | unsigned int fast_fill_trigger; |
283 | unsigned int fast_fill_limit; | 290 | unsigned int fast_fill_limit; |
@@ -285,12 +292,9 @@ struct efx_rx_queue { | |||
285 | unsigned int min_overfill; | 292 | unsigned int min_overfill; |
286 | unsigned int alloc_page_count; | 293 | unsigned int alloc_page_count; |
287 | unsigned int alloc_skb_count; | 294 | unsigned int alloc_skb_count; |
288 | struct delayed_work work; | 295 | struct timer_list slow_fill; |
289 | unsigned int slow_fill_count; | 296 | unsigned int slow_fill_count; |
290 | 297 | ||
291 | struct page *buf_page; | ||
292 | dma_addr_t buf_dma_addr; | ||
293 | char *buf_data; | ||
294 | enum efx_flush_state flushed; | 298 | enum efx_flush_state flushed; |
295 | }; | 299 | }; |
296 | 300 | ||
@@ -336,7 +340,7 @@ enum efx_rx_alloc_method { | |||
336 | * @eventq: Event queue buffer | 340 | * @eventq: Event queue buffer |
337 | * @eventq_read_ptr: Event queue read pointer | 341 | * @eventq_read_ptr: Event queue read pointer |
338 | * @last_eventq_read_ptr: Last event queue read pointer value. | 342 | * @last_eventq_read_ptr: Last event queue read pointer value. |
339 | * @eventq_magic: Event queue magic value for driver-generated test events | 343 | * @magic_count: Event queue test event count |
340 | * @irq_count: Number of IRQs since last adaptive moderation decision | 344 | * @irq_count: Number of IRQs since last adaptive moderation decision |
341 | * @irq_mod_score: IRQ moderation score | 345 | * @irq_mod_score: IRQ moderation score |
342 | * @rx_alloc_level: Watermark based heuristic counter for pushing descriptors | 346 | * @rx_alloc_level: Watermark based heuristic counter for pushing descriptors |
@@ -367,7 +371,7 @@ struct efx_channel { | |||
367 | struct efx_special_buffer eventq; | 371 | struct efx_special_buffer eventq; |
368 | unsigned int eventq_read_ptr; | 372 | unsigned int eventq_read_ptr; |
369 | unsigned int last_eventq_read_ptr; | 373 | unsigned int last_eventq_read_ptr; |
370 | unsigned int eventq_magic; | 374 | unsigned int magic_count; |
371 | 375 | ||
372 | unsigned int irq_count; | 376 | unsigned int irq_count; |
373 | unsigned int irq_mod_score; | 377 | unsigned int irq_mod_score; |
@@ -645,6 +649,7 @@ union efx_multicast_hash { | |||
645 | * struct efx_nic - an Efx NIC | 649 | * struct efx_nic - an Efx NIC |
646 | * @name: Device name (net device name or bus id before net device registered) | 650 | * @name: Device name (net device name or bus id before net device registered) |
647 | * @pci_dev: The PCI device | 651 | * @pci_dev: The PCI device |
652 | * @port_num: Index of this host port within the controller | ||
648 | * @type: Controller type attributes | 653 | * @type: Controller type attributes |
649 | * @legacy_irq: IRQ number | 654 | * @legacy_irq: IRQ number |
650 | * @workqueue: Workqueue for port reconfigures and the HW monitor. | 655 | * @workqueue: Workqueue for port reconfigures and the HW monitor. |
@@ -728,6 +733,7 @@ union efx_multicast_hash { | |||
728 | struct efx_nic { | 733 | struct efx_nic { |
729 | char name[IFNAMSIZ]; | 734 | char name[IFNAMSIZ]; |
730 | struct pci_dev *pci_dev; | 735 | struct pci_dev *pci_dev; |
736 | unsigned port_num; | ||
731 | const struct efx_nic_type *type; | 737 | const struct efx_nic_type *type; |
732 | int legacy_irq; | 738 | int legacy_irq; |
733 | struct workqueue_struct *workqueue; | 739 | struct workqueue_struct *workqueue; |
diff --git a/drivers/net/sfc/nic.c b/drivers/net/sfc/nic.c index 5d3aaec58556..0ee6fd367e6f 100644 --- a/drivers/net/sfc/nic.c +++ b/drivers/net/sfc/nic.c | |||
@@ -79,6 +79,14 @@ MODULE_PARM_DESC(rx_xon_thresh_bytes, "RX fifo XON threshold"); | |||
79 | /* Depth of RX flush request fifo */ | 79 | /* Depth of RX flush request fifo */ |
80 | #define EFX_RX_FLUSH_COUNT 4 | 80 | #define EFX_RX_FLUSH_COUNT 4 |
81 | 81 | ||
82 | /* Generated event code for efx_generate_test_event() */ | ||
83 | #define EFX_CHANNEL_MAGIC_TEST(_channel) \ | ||
84 | (0x00010100 + (_channel)->channel) | ||
85 | |||
86 | /* Generated event code for efx_generate_fill_event() */ | ||
87 | #define EFX_CHANNEL_MAGIC_FILL(_channel) \ | ||
88 | (0x00010200 + (_channel)->channel) | ||
89 | |||
82 | /************************************************************************** | 90 | /************************************************************************** |
83 | * | 91 | * |
84 | * Solarstorm hardware access | 92 | * Solarstorm hardware access |
@@ -850,6 +858,26 @@ efx_handle_rx_event(struct efx_channel *channel, const efx_qword_t *event) | |||
850 | checksummed, discard); | 858 | checksummed, discard); |
851 | } | 859 | } |
852 | 860 | ||
861 | static void | ||
862 | efx_handle_generated_event(struct efx_channel *channel, efx_qword_t *event) | ||
863 | { | ||
864 | struct efx_nic *efx = channel->efx; | ||
865 | unsigned code; | ||
866 | |||
867 | code = EFX_QWORD_FIELD(*event, FSF_AZ_DRV_GEN_EV_MAGIC); | ||
868 | if (code == EFX_CHANNEL_MAGIC_TEST(channel)) | ||
869 | ++channel->magic_count; | ||
870 | else if (code == EFX_CHANNEL_MAGIC_FILL(channel)) | ||
871 | /* The queue must be empty, so we won't receive any rx | ||
872 | * events, so efx_process_channel() won't refill the | ||
873 | * queue. Refill it here */ | ||
874 | efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]); | ||
875 | else | ||
876 | EFX_LOG(efx, "channel %d received generated " | ||
877 | "event "EFX_QWORD_FMT"\n", channel->channel, | ||
878 | EFX_QWORD_VAL(*event)); | ||
879 | } | ||
880 | |||
853 | /* Global events are basically PHY events */ | 881 | /* Global events are basically PHY events */ |
854 | static void | 882 | static void |
855 | efx_handle_global_event(struct efx_channel *channel, efx_qword_t *event) | 883 | efx_handle_global_event(struct efx_channel *channel, efx_qword_t *event) |
@@ -993,11 +1021,7 @@ int efx_nic_process_eventq(struct efx_channel *channel, int budget) | |||
993 | } | 1021 | } |
994 | break; | 1022 | break; |
995 | case FSE_AZ_EV_CODE_DRV_GEN_EV: | 1023 | case FSE_AZ_EV_CODE_DRV_GEN_EV: |
996 | channel->eventq_magic = EFX_QWORD_FIELD( | 1024 | efx_handle_generated_event(channel, &event); |
997 | event, FSF_AZ_DRV_GEN_EV_MAGIC); | ||
998 | EFX_LOG(channel->efx, "channel %d received generated " | ||
999 | "event "EFX_QWORD_FMT"\n", channel->channel, | ||
1000 | EFX_QWORD_VAL(event)); | ||
1001 | break; | 1025 | break; |
1002 | case FSE_AZ_EV_CODE_GLOBAL_EV: | 1026 | case FSE_AZ_EV_CODE_GLOBAL_EV: |
1003 | efx_handle_global_event(channel, &event); | 1027 | efx_handle_global_event(channel, &event); |
@@ -1088,12 +1112,20 @@ void efx_nic_remove_eventq(struct efx_channel *channel) | |||
1088 | } | 1112 | } |
1089 | 1113 | ||
1090 | 1114 | ||
1091 | /* Generates a test event on the event queue. A subsequent call to | 1115 | void efx_nic_generate_test_event(struct efx_channel *channel) |
1092 | * process_eventq() should pick up the event and place the value of | ||
1093 | * "magic" into channel->eventq_magic; | ||
1094 | */ | ||
1095 | void efx_nic_generate_test_event(struct efx_channel *channel, unsigned int magic) | ||
1096 | { | 1116 | { |
1117 | unsigned int magic = EFX_CHANNEL_MAGIC_TEST(channel); | ||
1118 | efx_qword_t test_event; | ||
1119 | |||
1120 | EFX_POPULATE_QWORD_2(test_event, FSF_AZ_EV_CODE, | ||
1121 | FSE_AZ_EV_CODE_DRV_GEN_EV, | ||
1122 | FSF_AZ_DRV_GEN_EV_MAGIC, magic); | ||
1123 | efx_generate_event(channel, &test_event); | ||
1124 | } | ||
1125 | |||
1126 | void efx_nic_generate_fill_event(struct efx_channel *channel) | ||
1127 | { | ||
1128 | unsigned int magic = EFX_CHANNEL_MAGIC_FILL(channel); | ||
1097 | efx_qword_t test_event; | 1129 | efx_qword_t test_event; |
1098 | 1130 | ||
1099 | EFX_POPULATE_QWORD_2(test_event, FSF_AZ_EV_CODE, | 1131 | EFX_POPULATE_QWORD_2(test_event, FSF_AZ_EV_CODE, |
@@ -1219,9 +1251,6 @@ int efx_nic_flush_queues(struct efx_nic *efx) | |||
1219 | rx_queue->flushed = FLUSH_DONE; | 1251 | rx_queue->flushed = FLUSH_DONE; |
1220 | } | 1252 | } |
1221 | 1253 | ||
1222 | if (EFX_WORKAROUND_7803(efx)) | ||
1223 | return 0; | ||
1224 | |||
1225 | return -ETIMEDOUT; | 1254 | return -ETIMEDOUT; |
1226 | } | 1255 | } |
1227 | 1256 | ||
diff --git a/drivers/net/sfc/nic.h b/drivers/net/sfc/nic.h index bbc2c0c2f843..95770e15115d 100644 --- a/drivers/net/sfc/nic.h +++ b/drivers/net/sfc/nic.h | |||
@@ -190,8 +190,8 @@ extern int efx_nic_rx_xoff_thresh, efx_nic_rx_xon_thresh; | |||
190 | /* Interrupts and test events */ | 190 | /* Interrupts and test events */ |
191 | extern int efx_nic_init_interrupt(struct efx_nic *efx); | 191 | extern int efx_nic_init_interrupt(struct efx_nic *efx); |
192 | extern void efx_nic_enable_interrupts(struct efx_nic *efx); | 192 | extern void efx_nic_enable_interrupts(struct efx_nic *efx); |
193 | extern void efx_nic_generate_test_event(struct efx_channel *channel, | 193 | extern void efx_nic_generate_test_event(struct efx_channel *channel); |
194 | unsigned int magic); | 194 | extern void efx_nic_generate_fill_event(struct efx_channel *channel); |
195 | extern void efx_nic_generate_interrupt(struct efx_nic *efx); | 195 | extern void efx_nic_generate_interrupt(struct efx_nic *efx); |
196 | extern void efx_nic_disable_interrupts(struct efx_nic *efx); | 196 | extern void efx_nic_disable_interrupts(struct efx_nic *efx); |
197 | extern void efx_nic_fini_interrupt(struct efx_nic *efx); | 197 | extern void efx_nic_fini_interrupt(struct efx_nic *efx); |
diff --git a/drivers/net/sfc/rx.c b/drivers/net/sfc/rx.c index e308818b9f55..9fb698e3519d 100644 --- a/drivers/net/sfc/rx.c +++ b/drivers/net/sfc/rx.c | |||
@@ -25,6 +25,9 @@ | |||
25 | /* Number of RX descriptors pushed at once. */ | 25 | /* Number of RX descriptors pushed at once. */ |
26 | #define EFX_RX_BATCH 8 | 26 | #define EFX_RX_BATCH 8 |
27 | 27 | ||
28 | /* Maximum size of a buffer sharing a page */ | ||
29 | #define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state)) | ||
30 | |||
28 | /* Size of buffer allocated for skb header area. */ | 31 | /* Size of buffer allocated for skb header area. */ |
29 | #define EFX_SKB_HEADERS 64u | 32 | #define EFX_SKB_HEADERS 64u |
30 | 33 | ||
@@ -98,155 +101,138 @@ static inline unsigned int efx_rx_buf_size(struct efx_nic *efx) | |||
98 | return PAGE_SIZE << efx->rx_buffer_order; | 101 | return PAGE_SIZE << efx->rx_buffer_order; |
99 | } | 102 | } |
100 | 103 | ||
101 | |||
102 | /** | 104 | /** |
103 | * efx_init_rx_buffer_skb - create new RX buffer using skb-based allocation | 105 | * efx_init_rx_buffers_skb - create EFX_RX_BATCH skb-based RX buffers |
104 | * | 106 | * |
105 | * @rx_queue: Efx RX queue | 107 | * @rx_queue: Efx RX queue |
106 | * @rx_buf: RX buffer structure to populate | ||
107 | * | 108 | * |
108 | * This allocates memory for a new receive buffer, maps it for DMA, | 109 | * This allocates EFX_RX_BATCH skbs, maps them for DMA, and populates a |
109 | * and populates a struct efx_rx_buffer with the relevant | 110 | * struct efx_rx_buffer for each one. Return a negative error code or 0 |
110 | * information. Return a negative error code or 0 on success. | 111 | * on success. May fail having only inserted fewer than EFX_RX_BATCH |
112 | * buffers. | ||
111 | */ | 113 | */ |
112 | static int efx_init_rx_buffer_skb(struct efx_rx_queue *rx_queue, | 114 | static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue) |
113 | struct efx_rx_buffer *rx_buf) | ||
114 | { | 115 | { |
115 | struct efx_nic *efx = rx_queue->efx; | 116 | struct efx_nic *efx = rx_queue->efx; |
116 | struct net_device *net_dev = efx->net_dev; | 117 | struct net_device *net_dev = efx->net_dev; |
118 | struct efx_rx_buffer *rx_buf; | ||
117 | int skb_len = efx->rx_buffer_len; | 119 | int skb_len = efx->rx_buffer_len; |
120 | unsigned index, count; | ||
118 | 121 | ||
119 | rx_buf->skb = netdev_alloc_skb(net_dev, skb_len); | 122 | for (count = 0; count < EFX_RX_BATCH; ++count) { |
120 | if (unlikely(!rx_buf->skb)) | 123 | index = rx_queue->added_count & EFX_RXQ_MASK; |
121 | return -ENOMEM; | 124 | rx_buf = efx_rx_buffer(rx_queue, index); |
122 | 125 | ||
123 | /* Adjust the SKB for padding and checksum */ | 126 | rx_buf->skb = netdev_alloc_skb(net_dev, skb_len); |
124 | skb_reserve(rx_buf->skb, NET_IP_ALIGN); | 127 | if (unlikely(!rx_buf->skb)) |
125 | rx_buf->len = skb_len - NET_IP_ALIGN; | 128 | return -ENOMEM; |
126 | rx_buf->data = (char *)rx_buf->skb->data; | 129 | rx_buf->page = NULL; |
127 | rx_buf->skb->ip_summed = CHECKSUM_UNNECESSARY; | ||
128 | 130 | ||
129 | rx_buf->dma_addr = pci_map_single(efx->pci_dev, | 131 | /* Adjust the SKB for padding and checksum */ |
130 | rx_buf->data, rx_buf->len, | 132 | skb_reserve(rx_buf->skb, NET_IP_ALIGN); |
131 | PCI_DMA_FROMDEVICE); | 133 | rx_buf->len = skb_len - NET_IP_ALIGN; |
134 | rx_buf->data = (char *)rx_buf->skb->data; | ||
135 | rx_buf->skb->ip_summed = CHECKSUM_UNNECESSARY; | ||
136 | |||
137 | rx_buf->dma_addr = pci_map_single(efx->pci_dev, | ||
138 | rx_buf->data, rx_buf->len, | ||
139 | PCI_DMA_FROMDEVICE); | ||
140 | if (unlikely(pci_dma_mapping_error(efx->pci_dev, | ||
141 | rx_buf->dma_addr))) { | ||
142 | dev_kfree_skb_any(rx_buf->skb); | ||
143 | rx_buf->skb = NULL; | ||
144 | return -EIO; | ||
145 | } | ||
132 | 146 | ||
133 | if (unlikely(pci_dma_mapping_error(efx->pci_dev, rx_buf->dma_addr))) { | 147 | ++rx_queue->added_count; |
134 | dev_kfree_skb_any(rx_buf->skb); | 148 | ++rx_queue->alloc_skb_count; |
135 | rx_buf->skb = NULL; | ||
136 | return -EIO; | ||
137 | } | 149 | } |
138 | 150 | ||
139 | return 0; | 151 | return 0; |
140 | } | 152 | } |
141 | 153 | ||
142 | /** | 154 | /** |
143 | * efx_init_rx_buffer_page - create new RX buffer using page-based allocation | 155 | * efx_init_rx_buffers_page - create EFX_RX_BATCH page-based RX buffers |
144 | * | 156 | * |
145 | * @rx_queue: Efx RX queue | 157 | * @rx_queue: Efx RX queue |
146 | * @rx_buf: RX buffer structure to populate | ||
147 | * | 158 | * |
148 | * This allocates memory for a new receive buffer, maps it for DMA, | 159 | * This allocates memory for EFX_RX_BATCH receive buffers, maps them for DMA, |
149 | * and populates a struct efx_rx_buffer with the relevant | 160 | * and populates struct efx_rx_buffers for each one. Return a negative error |
150 | * information. Return a negative error code or 0 on success. | 161 | * code or 0 on success. If a single page can be split between two buffers, |
162 | * then the page will either be inserted fully, or not at at all. | ||
151 | */ | 163 | */ |
152 | static int efx_init_rx_buffer_page(struct efx_rx_queue *rx_queue, | 164 | static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue) |
153 | struct efx_rx_buffer *rx_buf) | ||
154 | { | 165 | { |
155 | struct efx_nic *efx = rx_queue->efx; | 166 | struct efx_nic *efx = rx_queue->efx; |
156 | int bytes, space, offset; | 167 | struct efx_rx_buffer *rx_buf; |
157 | 168 | struct page *page; | |
158 | bytes = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN; | 169 | void *page_addr; |
159 | 170 | struct efx_rx_page_state *state; | |
160 | /* If there is space left in the previously allocated page, | 171 | dma_addr_t dma_addr; |
161 | * then use it. Otherwise allocate a new one */ | 172 | unsigned index, count; |
162 | rx_buf->page = rx_queue->buf_page; | 173 | |
163 | if (rx_buf->page == NULL) { | 174 | /* We can split a page between two buffers */ |
164 | dma_addr_t dma_addr; | 175 | BUILD_BUG_ON(EFX_RX_BATCH & 1); |
165 | 176 | ||
166 | rx_buf->page = alloc_pages(__GFP_COLD | __GFP_COMP | GFP_ATOMIC, | 177 | for (count = 0; count < EFX_RX_BATCH; ++count) { |
167 | efx->rx_buffer_order); | 178 | page = alloc_pages(__GFP_COLD | __GFP_COMP | GFP_ATOMIC, |
168 | if (unlikely(rx_buf->page == NULL)) | 179 | efx->rx_buffer_order); |
180 | if (unlikely(page == NULL)) | ||
169 | return -ENOMEM; | 181 | return -ENOMEM; |
170 | 182 | dma_addr = pci_map_page(efx->pci_dev, page, 0, | |
171 | dma_addr = pci_map_page(efx->pci_dev, rx_buf->page, | 183 | efx_rx_buf_size(efx), |
172 | 0, efx_rx_buf_size(efx), | ||
173 | PCI_DMA_FROMDEVICE); | 184 | PCI_DMA_FROMDEVICE); |
174 | |||
175 | if (unlikely(pci_dma_mapping_error(efx->pci_dev, dma_addr))) { | 185 | if (unlikely(pci_dma_mapping_error(efx->pci_dev, dma_addr))) { |
176 | __free_pages(rx_buf->page, efx->rx_buffer_order); | 186 | __free_pages(page, efx->rx_buffer_order); |
177 | rx_buf->page = NULL; | ||
178 | return -EIO; | 187 | return -EIO; |
179 | } | 188 | } |
180 | 189 | page_addr = page_address(page); | |
181 | rx_queue->buf_page = rx_buf->page; | 190 | state = page_addr; |
182 | rx_queue->buf_dma_addr = dma_addr; | 191 | state->refcnt = 0; |
183 | rx_queue->buf_data = (page_address(rx_buf->page) + | 192 | state->dma_addr = dma_addr; |
184 | EFX_PAGE_IP_ALIGN); | 193 | |
185 | } | 194 | page_addr += sizeof(struct efx_rx_page_state); |
186 | 195 | dma_addr += sizeof(struct efx_rx_page_state); | |
187 | rx_buf->len = bytes; | 196 | |
188 | rx_buf->data = rx_queue->buf_data; | 197 | split: |
189 | offset = efx_rx_buf_offset(rx_buf); | 198 | index = rx_queue->added_count & EFX_RXQ_MASK; |
190 | rx_buf->dma_addr = rx_queue->buf_dma_addr + offset; | 199 | rx_buf = efx_rx_buffer(rx_queue, index); |
191 | 200 | rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN; | |
192 | /* Try to pack multiple buffers per page */ | 201 | rx_buf->skb = NULL; |
193 | if (efx->rx_buffer_order == 0) { | 202 | rx_buf->page = page; |
194 | /* The next buffer starts on the next 512 byte boundary */ | 203 | rx_buf->data = page_addr + EFX_PAGE_IP_ALIGN; |
195 | rx_queue->buf_data += ((bytes + 0x1ff) & ~0x1ff); | 204 | rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN; |
196 | offset += ((bytes + 0x1ff) & ~0x1ff); | 205 | ++rx_queue->added_count; |
197 | 206 | ++rx_queue->alloc_page_count; | |
198 | space = efx_rx_buf_size(efx) - offset; | 207 | ++state->refcnt; |
199 | if (space >= bytes) { | 208 | |
200 | /* Refs dropped on kernel releasing each skb */ | 209 | if ((~count & 1) && (efx->rx_buffer_len <= EFX_RX_HALF_PAGE)) { |
201 | get_page(rx_queue->buf_page); | 210 | /* Use the second half of the page */ |
202 | goto out; | 211 | get_page(page); |
212 | dma_addr += (PAGE_SIZE >> 1); | ||
213 | page_addr += (PAGE_SIZE >> 1); | ||
214 | ++count; | ||
215 | goto split; | ||
203 | } | 216 | } |
204 | } | 217 | } |
205 | 218 | ||
206 | /* This is the final RX buffer for this page, so mark it for | ||
207 | * unmapping */ | ||
208 | rx_queue->buf_page = NULL; | ||
209 | rx_buf->unmap_addr = rx_queue->buf_dma_addr; | ||
210 | |||
211 | out: | ||
212 | return 0; | 219 | return 0; |
213 | } | 220 | } |
214 | 221 | ||
215 | /* This allocates memory for a new receive buffer, maps it for DMA, | ||
216 | * and populates a struct efx_rx_buffer with the relevant | ||
217 | * information. | ||
218 | */ | ||
219 | static int efx_init_rx_buffer(struct efx_rx_queue *rx_queue, | ||
220 | struct efx_rx_buffer *new_rx_buf) | ||
221 | { | ||
222 | int rc = 0; | ||
223 | |||
224 | if (rx_queue->channel->rx_alloc_push_pages) { | ||
225 | new_rx_buf->skb = NULL; | ||
226 | rc = efx_init_rx_buffer_page(rx_queue, new_rx_buf); | ||
227 | rx_queue->alloc_page_count++; | ||
228 | } else { | ||
229 | new_rx_buf->page = NULL; | ||
230 | rc = efx_init_rx_buffer_skb(rx_queue, new_rx_buf); | ||
231 | rx_queue->alloc_skb_count++; | ||
232 | } | ||
233 | |||
234 | if (unlikely(rc < 0)) | ||
235 | EFX_LOG_RL(rx_queue->efx, "%s RXQ[%d] =%d\n", __func__, | ||
236 | rx_queue->queue, rc); | ||
237 | return rc; | ||
238 | } | ||
239 | |||
240 | static void efx_unmap_rx_buffer(struct efx_nic *efx, | 222 | static void efx_unmap_rx_buffer(struct efx_nic *efx, |
241 | struct efx_rx_buffer *rx_buf) | 223 | struct efx_rx_buffer *rx_buf) |
242 | { | 224 | { |
243 | if (rx_buf->page) { | 225 | if (rx_buf->page) { |
226 | struct efx_rx_page_state *state; | ||
227 | |||
244 | EFX_BUG_ON_PARANOID(rx_buf->skb); | 228 | EFX_BUG_ON_PARANOID(rx_buf->skb); |
245 | if (rx_buf->unmap_addr) { | 229 | |
246 | pci_unmap_page(efx->pci_dev, rx_buf->unmap_addr, | 230 | state = page_address(rx_buf->page); |
231 | if (--state->refcnt == 0) { | ||
232 | pci_unmap_page(efx->pci_dev, | ||
233 | state->dma_addr, | ||
247 | efx_rx_buf_size(efx), | 234 | efx_rx_buf_size(efx), |
248 | PCI_DMA_FROMDEVICE); | 235 | PCI_DMA_FROMDEVICE); |
249 | rx_buf->unmap_addr = 0; | ||
250 | } | 236 | } |
251 | } else if (likely(rx_buf->skb)) { | 237 | } else if (likely(rx_buf->skb)) { |
252 | pci_unmap_single(efx->pci_dev, rx_buf->dma_addr, | 238 | pci_unmap_single(efx->pci_dev, rx_buf->dma_addr, |
@@ -273,31 +259,84 @@ static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue, | |||
273 | efx_free_rx_buffer(rx_queue->efx, rx_buf); | 259 | efx_free_rx_buffer(rx_queue->efx, rx_buf); |
274 | } | 260 | } |
275 | 261 | ||
262 | /* Attempt to resurrect the other receive buffer that used to share this page, | ||
263 | * which had previously been passed up to the kernel and freed. */ | ||
264 | static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue, | ||
265 | struct efx_rx_buffer *rx_buf) | ||
266 | { | ||
267 | struct efx_rx_page_state *state = page_address(rx_buf->page); | ||
268 | struct efx_rx_buffer *new_buf; | ||
269 | unsigned fill_level, index; | ||
270 | |||
271 | /* +1 because efx_rx_packet() incremented removed_count. +1 because | ||
272 | * we'd like to insert an additional descriptor whilst leaving | ||
273 | * EFX_RXD_HEAD_ROOM for the non-recycle path */ | ||
274 | fill_level = (rx_queue->added_count - rx_queue->removed_count + 2); | ||
275 | if (unlikely(fill_level >= EFX_RXQ_SIZE - EFX_RXD_HEAD_ROOM)) { | ||
276 | /* We could place "state" on a list, and drain the list in | ||
277 | * efx_fast_push_rx_descriptors(). For now, this will do. */ | ||
278 | return; | ||
279 | } | ||
280 | |||
281 | ++state->refcnt; | ||
282 | get_page(rx_buf->page); | ||
283 | |||
284 | index = rx_queue->added_count & EFX_RXQ_MASK; | ||
285 | new_buf = efx_rx_buffer(rx_queue, index); | ||
286 | new_buf->dma_addr = rx_buf->dma_addr ^ (PAGE_SIZE >> 1); | ||
287 | new_buf->skb = NULL; | ||
288 | new_buf->page = rx_buf->page; | ||
289 | new_buf->data = (void *) | ||
290 | ((__force unsigned long)rx_buf->data ^ (PAGE_SIZE >> 1)); | ||
291 | new_buf->len = rx_buf->len; | ||
292 | ++rx_queue->added_count; | ||
293 | } | ||
294 | |||
295 | /* Recycle the given rx buffer directly back into the rx_queue. There is | ||
296 | * always room to add this buffer, because we've just popped a buffer. */ | ||
297 | static void efx_recycle_rx_buffer(struct efx_channel *channel, | ||
298 | struct efx_rx_buffer *rx_buf) | ||
299 | { | ||
300 | struct efx_nic *efx = channel->efx; | ||
301 | struct efx_rx_queue *rx_queue = &efx->rx_queue[channel->channel]; | ||
302 | struct efx_rx_buffer *new_buf; | ||
303 | unsigned index; | ||
304 | |||
305 | if (rx_buf->page != NULL && efx->rx_buffer_len <= EFX_RX_HALF_PAGE && | ||
306 | page_count(rx_buf->page) == 1) | ||
307 | efx_resurrect_rx_buffer(rx_queue, rx_buf); | ||
308 | |||
309 | index = rx_queue->added_count & EFX_RXQ_MASK; | ||
310 | new_buf = efx_rx_buffer(rx_queue, index); | ||
311 | |||
312 | memcpy(new_buf, rx_buf, sizeof(*new_buf)); | ||
313 | rx_buf->page = NULL; | ||
314 | rx_buf->skb = NULL; | ||
315 | ++rx_queue->added_count; | ||
316 | } | ||
317 | |||
276 | /** | 318 | /** |
277 | * efx_fast_push_rx_descriptors - push new RX descriptors quickly | 319 | * efx_fast_push_rx_descriptors - push new RX descriptors quickly |
278 | * @rx_queue: RX descriptor queue | 320 | * @rx_queue: RX descriptor queue |
279 | * @retry: Recheck the fill level | ||
280 | * This will aim to fill the RX descriptor queue up to | 321 | * This will aim to fill the RX descriptor queue up to |
281 | * @rx_queue->@fast_fill_limit. If there is insufficient atomic | 322 | * @rx_queue->@fast_fill_limit. If there is insufficient atomic |
282 | * memory to do so, the caller should retry. | 323 | * memory to do so, a slow fill will be scheduled. |
324 | * | ||
325 | * The caller must provide serialisation (none is used here). In practise, | ||
326 | * this means this function must run from the NAPI handler, or be called | ||
327 | * when NAPI is disabled. | ||
283 | */ | 328 | */ |
284 | static int __efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, | 329 | void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue) |
285 | int retry) | ||
286 | { | 330 | { |
287 | struct efx_rx_buffer *rx_buf; | 331 | struct efx_channel *channel = rx_queue->channel; |
288 | unsigned fill_level, index; | 332 | unsigned fill_level; |
289 | int i, space, rc = 0; | 333 | int space, rc = 0; |
290 | 334 | ||
291 | /* Calculate current fill level. Do this outside the lock, | 335 | /* Calculate current fill level, and exit if we don't need to fill */ |
292 | * because most of the time we'll end up not wanting to do the | ||
293 | * fill anyway. | ||
294 | */ | ||
295 | fill_level = (rx_queue->added_count - rx_queue->removed_count); | 336 | fill_level = (rx_queue->added_count - rx_queue->removed_count); |
296 | EFX_BUG_ON_PARANOID(fill_level > EFX_RXQ_SIZE); | 337 | EFX_BUG_ON_PARANOID(fill_level > EFX_RXQ_SIZE); |
297 | |||
298 | /* Don't fill if we don't need to */ | ||
299 | if (fill_level >= rx_queue->fast_fill_trigger) | 338 | if (fill_level >= rx_queue->fast_fill_trigger) |
300 | return 0; | 339 | goto out; |
301 | 340 | ||
302 | /* Record minimum fill level */ | 341 | /* Record minimum fill level */ |
303 | if (unlikely(fill_level < rx_queue->min_fill)) { | 342 | if (unlikely(fill_level < rx_queue->min_fill)) { |
@@ -305,34 +344,25 @@ static int __efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, | |||
305 | rx_queue->min_fill = fill_level; | 344 | rx_queue->min_fill = fill_level; |
306 | } | 345 | } |
307 | 346 | ||
308 | /* Acquire RX add lock. If this lock is contended, then a fast | ||
309 | * fill must already be in progress (e.g. in the refill | ||
310 | * tasklet), so we don't need to do anything | ||
311 | */ | ||
312 | if (!spin_trylock_bh(&rx_queue->add_lock)) | ||
313 | return -1; | ||
314 | |||
315 | retry: | ||
316 | /* Recalculate current fill level now that we have the lock */ | ||
317 | fill_level = (rx_queue->added_count - rx_queue->removed_count); | ||
318 | EFX_BUG_ON_PARANOID(fill_level > EFX_RXQ_SIZE); | ||
319 | space = rx_queue->fast_fill_limit - fill_level; | 347 | space = rx_queue->fast_fill_limit - fill_level; |
320 | if (space < EFX_RX_BATCH) | 348 | if (space < EFX_RX_BATCH) |
321 | goto out_unlock; | 349 | goto out; |
322 | 350 | ||
323 | EFX_TRACE(rx_queue->efx, "RX queue %d fast-filling descriptor ring from" | 351 | EFX_TRACE(rx_queue->efx, "RX queue %d fast-filling descriptor ring from" |
324 | " level %d to level %d using %s allocation\n", | 352 | " level %d to level %d using %s allocation\n", |
325 | rx_queue->queue, fill_level, rx_queue->fast_fill_limit, | 353 | rx_queue->queue, fill_level, rx_queue->fast_fill_limit, |
326 | rx_queue->channel->rx_alloc_push_pages ? "page" : "skb"); | 354 | channel->rx_alloc_push_pages ? "page" : "skb"); |
327 | 355 | ||
328 | do { | 356 | do { |
329 | for (i = 0; i < EFX_RX_BATCH; ++i) { | 357 | if (channel->rx_alloc_push_pages) |
330 | index = rx_queue->added_count & EFX_RXQ_MASK; | 358 | rc = efx_init_rx_buffers_page(rx_queue); |
331 | rx_buf = efx_rx_buffer(rx_queue, index); | 359 | else |
332 | rc = efx_init_rx_buffer(rx_queue, rx_buf); | 360 | rc = efx_init_rx_buffers_skb(rx_queue); |
333 | if (unlikely(rc)) | 361 | if (unlikely(rc)) { |
334 | goto out; | 362 | /* Ensure that we don't leave the rx queue empty */ |
335 | ++rx_queue->added_count; | 363 | if (rx_queue->added_count == rx_queue->removed_count) |
364 | efx_schedule_slow_fill(rx_queue); | ||
365 | goto out; | ||
336 | } | 366 | } |
337 | } while ((space -= EFX_RX_BATCH) >= EFX_RX_BATCH); | 367 | } while ((space -= EFX_RX_BATCH) >= EFX_RX_BATCH); |
338 | 368 | ||
@@ -341,63 +371,18 @@ static int __efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, | |||
341 | rx_queue->added_count - rx_queue->removed_count); | 371 | rx_queue->added_count - rx_queue->removed_count); |
342 | 372 | ||
343 | out: | 373 | out: |
344 | /* Send write pointer to card. */ | 374 | if (rx_queue->notified_count != rx_queue->added_count) |
345 | efx_nic_notify_rx_desc(rx_queue); | 375 | efx_nic_notify_rx_desc(rx_queue); |
346 | |||
347 | /* If the fast fill is running inside from the refill tasklet, then | ||
348 | * for SMP systems it may be running on a different CPU to | ||
349 | * RX event processing, which means that the fill level may now be | ||
350 | * out of date. */ | ||
351 | if (unlikely(retry && (rc == 0))) | ||
352 | goto retry; | ||
353 | |||
354 | out_unlock: | ||
355 | spin_unlock_bh(&rx_queue->add_lock); | ||
356 | |||
357 | return rc; | ||
358 | } | ||
359 | |||
360 | /** | ||
361 | * efx_fast_push_rx_descriptors - push new RX descriptors quickly | ||
362 | * @rx_queue: RX descriptor queue | ||
363 | * | ||
364 | * This will aim to fill the RX descriptor queue up to | ||
365 | * @rx_queue->@fast_fill_limit. If there is insufficient memory to do so, | ||
366 | * it will schedule a work item to immediately continue the fast fill | ||
367 | */ | ||
368 | void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue) | ||
369 | { | ||
370 | int rc; | ||
371 | |||
372 | rc = __efx_fast_push_rx_descriptors(rx_queue, 0); | ||
373 | if (unlikely(rc)) { | ||
374 | /* Schedule the work item to run immediately. The hope is | ||
375 | * that work is immediately pending to free some memory | ||
376 | * (e.g. an RX event or TX completion) | ||
377 | */ | ||
378 | efx_schedule_slow_fill(rx_queue, 0); | ||
379 | } | ||
380 | } | 376 | } |
381 | 377 | ||
382 | void efx_rx_work(struct work_struct *data) | 378 | void efx_rx_slow_fill(unsigned long context) |
383 | { | 379 | { |
384 | struct efx_rx_queue *rx_queue; | 380 | struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context; |
385 | int rc; | 381 | struct efx_channel *channel = rx_queue->channel; |
386 | |||
387 | rx_queue = container_of(data, struct efx_rx_queue, work.work); | ||
388 | |||
389 | if (unlikely(!rx_queue->channel->enabled)) | ||
390 | return; | ||
391 | |||
392 | EFX_TRACE(rx_queue->efx, "RX queue %d worker thread executing on CPU " | ||
393 | "%d\n", rx_queue->queue, raw_smp_processor_id()); | ||
394 | 382 | ||
383 | /* Post an event to cause NAPI to run and refill the queue */ | ||
384 | efx_nic_generate_fill_event(channel); | ||
395 | ++rx_queue->slow_fill_count; | 385 | ++rx_queue->slow_fill_count; |
396 | /* Push new RX descriptors, allowing at least 1 jiffy for | ||
397 | * the kernel to free some more memory. */ | ||
398 | rc = __efx_fast_push_rx_descriptors(rx_queue, 1); | ||
399 | if (rc) | ||
400 | efx_schedule_slow_fill(rx_queue, 1); | ||
401 | } | 386 | } |
402 | 387 | ||
403 | static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue, | 388 | static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue, |
@@ -498,6 +483,7 @@ void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index, | |||
498 | unsigned int len, bool checksummed, bool discard) | 483 | unsigned int len, bool checksummed, bool discard) |
499 | { | 484 | { |
500 | struct efx_nic *efx = rx_queue->efx; | 485 | struct efx_nic *efx = rx_queue->efx; |
486 | struct efx_channel *channel = rx_queue->channel; | ||
501 | struct efx_rx_buffer *rx_buf; | 487 | struct efx_rx_buffer *rx_buf; |
502 | bool leak_packet = false; | 488 | bool leak_packet = false; |
503 | 489 | ||
@@ -525,12 +511,13 @@ void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index, | |||
525 | /* Discard packet, if instructed to do so */ | 511 | /* Discard packet, if instructed to do so */ |
526 | if (unlikely(discard)) { | 512 | if (unlikely(discard)) { |
527 | if (unlikely(leak_packet)) | 513 | if (unlikely(leak_packet)) |
528 | rx_queue->channel->n_skbuff_leaks++; | 514 | channel->n_skbuff_leaks++; |
529 | else | 515 | else |
530 | /* We haven't called efx_unmap_rx_buffer yet, | 516 | efx_recycle_rx_buffer(channel, rx_buf); |
531 | * so fini the entire rx_buffer here */ | 517 | |
532 | efx_fini_rx_buffer(rx_queue, rx_buf); | 518 | /* Don't hold off the previous receive */ |
533 | return; | 519 | rx_buf = NULL; |
520 | goto out; | ||
534 | } | 521 | } |
535 | 522 | ||
536 | /* Release card resources - assumes all RX buffers consumed in-order | 523 | /* Release card resources - assumes all RX buffers consumed in-order |
@@ -547,6 +534,7 @@ void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index, | |||
547 | * prefetched into cache. | 534 | * prefetched into cache. |
548 | */ | 535 | */ |
549 | rx_buf->len = len; | 536 | rx_buf->len = len; |
537 | out: | ||
550 | if (rx_queue->channel->rx_pkt) | 538 | if (rx_queue->channel->rx_pkt) |
551 | __efx_rx_packet(rx_queue->channel, | 539 | __efx_rx_packet(rx_queue->channel, |
552 | rx_queue->channel->rx_pkt, | 540 | rx_queue->channel->rx_pkt, |
@@ -682,6 +670,7 @@ void efx_fini_rx_queue(struct efx_rx_queue *rx_queue) | |||
682 | 670 | ||
683 | EFX_LOG(rx_queue->efx, "shutting down RX queue %d\n", rx_queue->queue); | 671 | EFX_LOG(rx_queue->efx, "shutting down RX queue %d\n", rx_queue->queue); |
684 | 672 | ||
673 | del_timer_sync(&rx_queue->slow_fill); | ||
685 | efx_nic_fini_rx(rx_queue); | 674 | efx_nic_fini_rx(rx_queue); |
686 | 675 | ||
687 | /* Release RX buffers NB start at index 0 not current HW ptr */ | 676 | /* Release RX buffers NB start at index 0 not current HW ptr */ |
@@ -691,16 +680,6 @@ void efx_fini_rx_queue(struct efx_rx_queue *rx_queue) | |||
691 | efx_fini_rx_buffer(rx_queue, rx_buf); | 680 | efx_fini_rx_buffer(rx_queue, rx_buf); |
692 | } | 681 | } |
693 | } | 682 | } |
694 | |||
695 | /* For a page that is part-way through splitting into RX buffers */ | ||
696 | if (rx_queue->buf_page != NULL) { | ||
697 | pci_unmap_page(rx_queue->efx->pci_dev, rx_queue->buf_dma_addr, | ||
698 | efx_rx_buf_size(rx_queue->efx), | ||
699 | PCI_DMA_FROMDEVICE); | ||
700 | __free_pages(rx_queue->buf_page, | ||
701 | rx_queue->efx->rx_buffer_order); | ||
702 | rx_queue->buf_page = NULL; | ||
703 | } | ||
704 | } | 683 | } |
705 | 684 | ||
706 | void efx_remove_rx_queue(struct efx_rx_queue *rx_queue) | 685 | void efx_remove_rx_queue(struct efx_rx_queue *rx_queue) |
diff --git a/drivers/net/sfc/selftest.c b/drivers/net/sfc/selftest.c index 371e86cc090f..1f83404af63b 100644 --- a/drivers/net/sfc/selftest.c +++ b/drivers/net/sfc/selftest.c | |||
@@ -38,7 +38,7 @@ struct efx_loopback_payload { | |||
38 | struct udphdr udp; | 38 | struct udphdr udp; |
39 | __be16 iteration; | 39 | __be16 iteration; |
40 | const char msg[64]; | 40 | const char msg[64]; |
41 | } __attribute__ ((packed)); | 41 | } __packed; |
42 | 42 | ||
43 | /* Loopback test source MAC address */ | 43 | /* Loopback test source MAC address */ |
44 | static const unsigned char payload_source[ETH_ALEN] = { | 44 | static const unsigned char payload_source[ETH_ALEN] = { |
@@ -161,23 +161,17 @@ static int efx_test_interrupts(struct efx_nic *efx, | |||
161 | static int efx_test_eventq_irq(struct efx_channel *channel, | 161 | static int efx_test_eventq_irq(struct efx_channel *channel, |
162 | struct efx_self_tests *tests) | 162 | struct efx_self_tests *tests) |
163 | { | 163 | { |
164 | unsigned int magic, count; | 164 | unsigned int magic_count, count; |
165 | |||
166 | /* Channel specific code, limited to 20 bits */ | ||
167 | magic = (0x00010150 + channel->channel); | ||
168 | EFX_LOG(channel->efx, "channel %d testing event queue with code %x\n", | ||
169 | channel->channel, magic); | ||
170 | 165 | ||
171 | tests->eventq_dma[channel->channel] = -1; | 166 | tests->eventq_dma[channel->channel] = -1; |
172 | tests->eventq_int[channel->channel] = -1; | 167 | tests->eventq_int[channel->channel] = -1; |
173 | tests->eventq_poll[channel->channel] = -1; | 168 | tests->eventq_poll[channel->channel] = -1; |
174 | 169 | ||
175 | /* Reset flag and zero magic word */ | 170 | magic_count = channel->magic_count; |
176 | channel->efx->last_irq_cpu = -1; | 171 | channel->efx->last_irq_cpu = -1; |
177 | channel->eventq_magic = 0; | ||
178 | smp_wmb(); | 172 | smp_wmb(); |
179 | 173 | ||
180 | efx_nic_generate_test_event(channel, magic); | 174 | efx_nic_generate_test_event(channel); |
181 | 175 | ||
182 | /* Wait for arrival of interrupt */ | 176 | /* Wait for arrival of interrupt */ |
183 | count = 0; | 177 | count = 0; |
@@ -187,7 +181,7 @@ static int efx_test_eventq_irq(struct efx_channel *channel, | |||
187 | if (channel->work_pending) | 181 | if (channel->work_pending) |
188 | efx_process_channel_now(channel); | 182 | efx_process_channel_now(channel); |
189 | 183 | ||
190 | if (channel->eventq_magic == magic) | 184 | if (channel->magic_count != magic_count) |
191 | goto eventq_ok; | 185 | goto eventq_ok; |
192 | } while (++count < 2); | 186 | } while (++count < 2); |
193 | 187 | ||
@@ -204,7 +198,7 @@ static int efx_test_eventq_irq(struct efx_channel *channel, | |||
204 | 198 | ||
205 | /* Check to see if event was received even if interrupt wasn't */ | 199 | /* Check to see if event was received even if interrupt wasn't */ |
206 | efx_process_channel_now(channel); | 200 | efx_process_channel_now(channel); |
207 | if (channel->eventq_magic == magic) { | 201 | if (channel->magic_count != magic_count) { |
208 | EFX_ERR(channel->efx, "channel %d event was generated, but " | 202 | EFX_ERR(channel->efx, "channel %d event was generated, but " |
209 | "failed to trigger an interrupt\n", channel->channel); | 203 | "failed to trigger an interrupt\n", channel->channel); |
210 | tests->eventq_dma[channel->channel] = 1; | 204 | tests->eventq_dma[channel->channel] = 1; |
@@ -545,7 +539,7 @@ efx_test_loopback(struct efx_tx_queue *tx_queue, | |||
545 | static int efx_wait_for_link(struct efx_nic *efx) | 539 | static int efx_wait_for_link(struct efx_nic *efx) |
546 | { | 540 | { |
547 | struct efx_link_state *link_state = &efx->link_state; | 541 | struct efx_link_state *link_state = &efx->link_state; |
548 | int count; | 542 | int count, link_up_count = 0; |
549 | bool link_up; | 543 | bool link_up; |
550 | 544 | ||
551 | for (count = 0; count < 40; count++) { | 545 | for (count = 0; count < 40; count++) { |
@@ -567,8 +561,12 @@ static int efx_wait_for_link(struct efx_nic *efx) | |||
567 | link_up = !efx->mac_op->check_fault(efx); | 561 | link_up = !efx->mac_op->check_fault(efx); |
568 | mutex_unlock(&efx->mac_lock); | 562 | mutex_unlock(&efx->mac_lock); |
569 | 563 | ||
570 | if (link_up) | 564 | if (link_up) { |
571 | return 0; | 565 | if (++link_up_count == 2) |
566 | return 0; | ||
567 | } else { | ||
568 | link_up_count = 0; | ||
569 | } | ||
572 | } | 570 | } |
573 | 571 | ||
574 | return -ETIMEDOUT; | 572 | return -ETIMEDOUT; |
diff --git a/drivers/net/sfc/workarounds.h b/drivers/net/sfc/workarounds.h index 518f7fc91473..782e45a613d6 100644 --- a/drivers/net/sfc/workarounds.h +++ b/drivers/net/sfc/workarounds.h | |||
@@ -54,7 +54,7 @@ | |||
54 | /* Increase filter depth to avoid RX_RESET */ | 54 | /* Increase filter depth to avoid RX_RESET */ |
55 | #define EFX_WORKAROUND_7244 EFX_WORKAROUND_FALCON_A | 55 | #define EFX_WORKAROUND_7244 EFX_WORKAROUND_FALCON_A |
56 | /* Flushes may never complete */ | 56 | /* Flushes may never complete */ |
57 | #define EFX_WORKAROUND_7803 EFX_WORKAROUND_FALCON_A | 57 | #define EFX_WORKAROUND_7803 EFX_WORKAROUND_FALCON_AB |
58 | /* Leak overlength packets rather than free */ | 58 | /* Leak overlength packets rather than free */ |
59 | #define EFX_WORKAROUND_8071 EFX_WORKAROUND_FALCON_A | 59 | #define EFX_WORKAROUND_8071 EFX_WORKAROUND_FALCON_A |
60 | 60 | ||
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index 084eff21b67a..61891a6cacc2 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h | |||
@@ -2161,21 +2161,21 @@ struct sky2_tx_le { | |||
2161 | __le16 length; /* also vlan tag or checksum start */ | 2161 | __le16 length; /* also vlan tag or checksum start */ |
2162 | u8 ctrl; | 2162 | u8 ctrl; |
2163 | u8 opcode; | 2163 | u8 opcode; |
2164 | } __attribute((packed)); | 2164 | } __packed; |
2165 | 2165 | ||
2166 | struct sky2_rx_le { | 2166 | struct sky2_rx_le { |
2167 | __le32 addr; | 2167 | __le32 addr; |
2168 | __le16 length; | 2168 | __le16 length; |
2169 | u8 ctrl; | 2169 | u8 ctrl; |
2170 | u8 opcode; | 2170 | u8 opcode; |
2171 | } __attribute((packed)); | 2171 | } __packed; |
2172 | 2172 | ||
2173 | struct sky2_status_le { | 2173 | struct sky2_status_le { |
2174 | __le32 status; /* also checksum */ | 2174 | __le32 status; /* also checksum */ |
2175 | __le16 length; /* also vlan tag */ | 2175 | __le16 length; /* also vlan tag */ |
2176 | u8 css; | 2176 | u8 css; |
2177 | u8 opcode; | 2177 | u8 opcode; |
2178 | } __attribute((packed)); | 2178 | } __packed; |
2179 | 2179 | ||
2180 | struct tx_ring_info { | 2180 | struct tx_ring_info { |
2181 | struct sk_buff *skb; | 2181 | struct sk_buff *skb; |
diff --git a/drivers/net/tehuti.h b/drivers/net/tehuti.h index cff98d07cba8..67e3b71bf705 100644 --- a/drivers/net/tehuti.h +++ b/drivers/net/tehuti.h | |||
@@ -334,7 +334,7 @@ struct txd_desc { | |||
334 | u32 va_lo; | 334 | u32 va_lo; |
335 | u32 va_hi; | 335 | u32 va_hi; |
336 | struct pbl pbl[0]; /* Fragments */ | 336 | struct pbl pbl[0]; /* Fragments */ |
337 | } __attribute__ ((packed)); | 337 | } __packed; |
338 | 338 | ||
339 | /* Register region size */ | 339 | /* Register region size */ |
340 | #define BDX_REGS_SIZE 0x1000 | 340 | #define BDX_REGS_SIZE 0x1000 |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 573054ae7b58..289cdc5fde92 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -67,8 +67,8 @@ | |||
67 | #include "tg3.h" | 67 | #include "tg3.h" |
68 | 68 | ||
69 | #define DRV_MODULE_NAME "tg3" | 69 | #define DRV_MODULE_NAME "tg3" |
70 | #define DRV_MODULE_VERSION "3.110" | 70 | #define DRV_MODULE_VERSION "3.111" |
71 | #define DRV_MODULE_RELDATE "April 9, 2010" | 71 | #define DRV_MODULE_RELDATE "June 5, 2010" |
72 | 72 | ||
73 | #define TG3_DEF_MAC_MODE 0 | 73 | #define TG3_DEF_MAC_MODE 0 |
74 | #define TG3_DEF_RX_MODE 0 | 74 | #define TG3_DEF_RX_MODE 0 |
@@ -145,8 +145,6 @@ | |||
145 | #define TG3_RX_JMB_BUFF_RING_SIZE \ | 145 | #define TG3_RX_JMB_BUFF_RING_SIZE \ |
146 | (sizeof(struct ring_info) * TG3_RX_JUMBO_RING_SIZE) | 146 | (sizeof(struct ring_info) * TG3_RX_JUMBO_RING_SIZE) |
147 | 147 | ||
148 | #define TG3_RSS_MIN_NUM_MSIX_VECS 2 | ||
149 | |||
150 | /* Due to a hardware bug, the 5701 can only DMA to memory addresses | 148 | /* Due to a hardware bug, the 5701 can only DMA to memory addresses |
151 | * that are at least dword aligned when used in PCIX mode. The driver | 149 | * that are at least dword aligned when used in PCIX mode. The driver |
152 | * works around this bug by double copying the packet. This workaround | 150 | * works around this bug by double copying the packet. This workaround |
@@ -272,6 +270,7 @@ static DEFINE_PCI_DEVICE_TABLE(tg3_pci_tbl) = { | |||
272 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57765)}, | 270 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57765)}, |
273 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57791)}, | 271 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57791)}, |
274 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57795)}, | 272 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57795)}, |
273 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5719)}, | ||
275 | {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)}, | 274 | {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)}, |
276 | {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9MXX)}, | 275 | {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9MXX)}, |
277 | {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1000)}, | 276 | {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1000)}, |
@@ -585,18 +584,23 @@ static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val) | |||
585 | static void tg3_ape_lock_init(struct tg3 *tp) | 584 | static void tg3_ape_lock_init(struct tg3 *tp) |
586 | { | 585 | { |
587 | int i; | 586 | int i; |
587 | u32 regbase; | ||
588 | |||
589 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761) | ||
590 | regbase = TG3_APE_LOCK_GRANT; | ||
591 | else | ||
592 | regbase = TG3_APE_PER_LOCK_GRANT; | ||
588 | 593 | ||
589 | /* Make sure the driver hasn't any stale locks. */ | 594 | /* Make sure the driver hasn't any stale locks. */ |
590 | for (i = 0; i < 8; i++) | 595 | for (i = 0; i < 8; i++) |
591 | tg3_ape_write32(tp, TG3_APE_LOCK_GRANT + 4 * i, | 596 | tg3_ape_write32(tp, regbase + 4 * i, APE_LOCK_GRANT_DRIVER); |
592 | APE_LOCK_GRANT_DRIVER); | ||
593 | } | 597 | } |
594 | 598 | ||
595 | static int tg3_ape_lock(struct tg3 *tp, int locknum) | 599 | static int tg3_ape_lock(struct tg3 *tp, int locknum) |
596 | { | 600 | { |
597 | int i, off; | 601 | int i, off; |
598 | int ret = 0; | 602 | int ret = 0; |
599 | u32 status; | 603 | u32 status, req, gnt; |
600 | 604 | ||
601 | if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)) | 605 | if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)) |
602 | return 0; | 606 | return 0; |
@@ -609,13 +613,21 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum) | |||
609 | return -EINVAL; | 613 | return -EINVAL; |
610 | } | 614 | } |
611 | 615 | ||
616 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761) { | ||
617 | req = TG3_APE_LOCK_REQ; | ||
618 | gnt = TG3_APE_LOCK_GRANT; | ||
619 | } else { | ||
620 | req = TG3_APE_PER_LOCK_REQ; | ||
621 | gnt = TG3_APE_PER_LOCK_GRANT; | ||
622 | } | ||
623 | |||
612 | off = 4 * locknum; | 624 | off = 4 * locknum; |
613 | 625 | ||
614 | tg3_ape_write32(tp, TG3_APE_LOCK_REQ + off, APE_LOCK_REQ_DRIVER); | 626 | tg3_ape_write32(tp, req + off, APE_LOCK_REQ_DRIVER); |
615 | 627 | ||
616 | /* Wait for up to 1 millisecond to acquire lock. */ | 628 | /* Wait for up to 1 millisecond to acquire lock. */ |
617 | for (i = 0; i < 100; i++) { | 629 | for (i = 0; i < 100; i++) { |
618 | status = tg3_ape_read32(tp, TG3_APE_LOCK_GRANT + off); | 630 | status = tg3_ape_read32(tp, gnt + off); |
619 | if (status == APE_LOCK_GRANT_DRIVER) | 631 | if (status == APE_LOCK_GRANT_DRIVER) |
620 | break; | 632 | break; |
621 | udelay(10); | 633 | udelay(10); |
@@ -623,7 +635,7 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum) | |||
623 | 635 | ||
624 | if (status != APE_LOCK_GRANT_DRIVER) { | 636 | if (status != APE_LOCK_GRANT_DRIVER) { |
625 | /* Revoke the lock request. */ | 637 | /* Revoke the lock request. */ |
626 | tg3_ape_write32(tp, TG3_APE_LOCK_GRANT + off, | 638 | tg3_ape_write32(tp, gnt + off, |
627 | APE_LOCK_GRANT_DRIVER); | 639 | APE_LOCK_GRANT_DRIVER); |
628 | 640 | ||
629 | ret = -EBUSY; | 641 | ret = -EBUSY; |
@@ -634,7 +646,7 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum) | |||
634 | 646 | ||
635 | static void tg3_ape_unlock(struct tg3 *tp, int locknum) | 647 | static void tg3_ape_unlock(struct tg3 *tp, int locknum) |
636 | { | 648 | { |
637 | int off; | 649 | u32 gnt; |
638 | 650 | ||
639 | if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)) | 651 | if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)) |
640 | return; | 652 | return; |
@@ -647,8 +659,12 @@ static void tg3_ape_unlock(struct tg3 *tp, int locknum) | |||
647 | return; | 659 | return; |
648 | } | 660 | } |
649 | 661 | ||
650 | off = 4 * locknum; | 662 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761) |
651 | tg3_ape_write32(tp, TG3_APE_LOCK_GRANT + off, APE_LOCK_GRANT_DRIVER); | 663 | gnt = TG3_APE_LOCK_GRANT; |
664 | else | ||
665 | gnt = TG3_APE_PER_LOCK_GRANT; | ||
666 | |||
667 | tg3_ape_write32(tp, gnt + 4 * locknum, APE_LOCK_GRANT_DRIVER); | ||
652 | } | 668 | } |
653 | 669 | ||
654 | static void tg3_disable_ints(struct tg3 *tp) | 670 | static void tg3_disable_ints(struct tg3 *tp) |
@@ -1069,14 +1085,11 @@ static int tg3_mdio_init(struct tg3 *tp) | |||
1069 | u32 reg; | 1085 | u32 reg; |
1070 | struct phy_device *phydev; | 1086 | struct phy_device *phydev; |
1071 | 1087 | ||
1072 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { | 1088 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
1073 | u32 funcnum, is_serdes; | 1089 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) { |
1090 | u32 is_serdes; | ||
1074 | 1091 | ||
1075 | funcnum = tr32(TG3_CPMU_STATUS) & TG3_CPMU_STATUS_PCIE_FUNC; | 1092 | tp->phy_addr = PCI_FUNC(tp->pdev->devfn) + 1; |
1076 | if (funcnum) | ||
1077 | tp->phy_addr = 2; | ||
1078 | else | ||
1079 | tp->phy_addr = 1; | ||
1080 | 1093 | ||
1081 | if (tp->pci_chip_rev_id != CHIPREV_ID_5717_A0) | 1094 | if (tp->pci_chip_rev_id != CHIPREV_ID_5717_A0) |
1082 | is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES; | 1095 | is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES; |
@@ -1589,7 +1602,8 @@ static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable) | |||
1589 | u32 reg; | 1602 | u32 reg; |
1590 | 1603 | ||
1591 | if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) || | 1604 | if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) || |
1592 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 && | 1605 | ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
1606 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) && | ||
1593 | (tp->tg3_flags2 & TG3_FLG2_MII_SERDES))) | 1607 | (tp->tg3_flags2 & TG3_FLG2_MII_SERDES))) |
1594 | return; | 1608 | return; |
1595 | 1609 | ||
@@ -1964,7 +1978,8 @@ static int tg3_phy_reset(struct tg3 *tp) | |||
1964 | } | 1978 | } |
1965 | } | 1979 | } |
1966 | 1980 | ||
1967 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 && | 1981 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
1982 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) && | ||
1968 | (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)) | 1983 | (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)) |
1969 | return 0; | 1984 | return 0; |
1970 | 1985 | ||
@@ -2049,6 +2064,7 @@ static void tg3_frob_aux_power(struct tg3 *tp) | |||
2049 | 2064 | ||
2050 | /* The GPIOs do something completely different on 57765. */ | 2065 | /* The GPIOs do something completely different on 57765. */ |
2051 | if ((tp->tg3_flags2 & TG3_FLG2_IS_NIC) == 0 || | 2066 | if ((tp->tg3_flags2 & TG3_FLG2_IS_NIC) == 0 || |
2067 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
2052 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) | 2068 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) |
2053 | return; | 2069 | return; |
2054 | 2070 | ||
@@ -4191,6 +4207,8 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset) | |||
4191 | current_duplex = DUPLEX_FULL; | 4207 | current_duplex = DUPLEX_FULL; |
4192 | else | 4208 | else |
4193 | current_duplex = DUPLEX_HALF; | 4209 | current_duplex = DUPLEX_HALF; |
4210 | } else if (!(tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) { | ||
4211 | /* Link is up via parallel detect */ | ||
4194 | } else { | 4212 | } else { |
4195 | current_link_up = 0; | 4213 | current_link_up = 0; |
4196 | } | 4214 | } |
@@ -6212,6 +6230,8 @@ static void tg3_free_rings(struct tg3 *tp) | |||
6212 | for (j = 0; j < tp->irq_cnt; j++) { | 6230 | for (j = 0; j < tp->irq_cnt; j++) { |
6213 | struct tg3_napi *tnapi = &tp->napi[j]; | 6231 | struct tg3_napi *tnapi = &tp->napi[j]; |
6214 | 6232 | ||
6233 | tg3_rx_prodring_free(tp, &tp->prodring[j]); | ||
6234 | |||
6215 | if (!tnapi->tx_buffers) | 6235 | if (!tnapi->tx_buffers) |
6216 | continue; | 6236 | continue; |
6217 | 6237 | ||
@@ -6247,8 +6267,6 @@ static void tg3_free_rings(struct tg3 *tp) | |||
6247 | 6267 | ||
6248 | dev_kfree_skb_any(skb); | 6268 | dev_kfree_skb_any(skb); |
6249 | } | 6269 | } |
6250 | |||
6251 | tg3_rx_prodring_free(tp, &tp->prodring[j]); | ||
6252 | } | 6270 | } |
6253 | } | 6271 | } |
6254 | 6272 | ||
@@ -6782,7 +6800,8 @@ static void tg3_restore_pci_state(struct tg3 *tp) | |||
6782 | /* Allow reads and writes to the APE register and memory space. */ | 6800 | /* Allow reads and writes to the APE register and memory space. */ |
6783 | if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) | 6801 | if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) |
6784 | val |= PCISTATE_ALLOW_APE_CTLSPC_WR | | 6802 | val |= PCISTATE_ALLOW_APE_CTLSPC_WR | |
6785 | PCISTATE_ALLOW_APE_SHMEM_WR; | 6803 | PCISTATE_ALLOW_APE_SHMEM_WR | |
6804 | PCISTATE_ALLOW_APE_PSPACE_WR; | ||
6786 | pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val); | 6805 | pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val); |
6787 | 6806 | ||
6788 | pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd); | 6807 | pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd); |
@@ -7069,6 +7088,7 @@ static int tg3_chip_reset(struct tg3 *tp) | |||
7069 | tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 && | 7088 | tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 && |
7070 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 && | 7089 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 && |
7071 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && | 7090 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && |
7091 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 && | ||
7072 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) { | 7092 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) { |
7073 | val = tr32(0x7c00); | 7093 | val = tr32(0x7c00); |
7074 | 7094 | ||
@@ -7504,7 +7524,8 @@ static void tg3_rings_reset(struct tg3 *tp) | |||
7504 | 7524 | ||
7505 | 7525 | ||
7506 | /* Disable all receive return rings but the first. */ | 7526 | /* Disable all receive return rings but the first. */ |
7507 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) | 7527 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
7528 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) | ||
7508 | limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17; | 7529 | limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17; |
7509 | else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) | 7530 | else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) |
7510 | limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16; | 7531 | limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16; |
@@ -7720,7 +7741,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
7720 | */ | 7741 | */ |
7721 | val = tr32(TG3PCI_PCISTATE); | 7742 | val = tr32(TG3PCI_PCISTATE); |
7722 | val |= PCISTATE_ALLOW_APE_CTLSPC_WR | | 7743 | val |= PCISTATE_ALLOW_APE_CTLSPC_WR | |
7723 | PCISTATE_ALLOW_APE_SHMEM_WR; | 7744 | PCISTATE_ALLOW_APE_SHMEM_WR | |
7745 | PCISTATE_ALLOW_APE_PSPACE_WR; | ||
7724 | tw32(TG3PCI_PCISTATE, val); | 7746 | tw32(TG3PCI_PCISTATE, val); |
7725 | } | 7747 | } |
7726 | 7748 | ||
@@ -7741,6 +7763,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
7741 | return err; | 7763 | return err; |
7742 | 7764 | ||
7743 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 7765 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
7766 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
7744 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { | 7767 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { |
7745 | val = tr32(TG3PCI_DMA_RW_CTRL) & | 7768 | val = tr32(TG3PCI_DMA_RW_CTRL) & |
7746 | ~DMA_RWCTRL_DIS_CACHE_ALIGNMENT; | 7769 | ~DMA_RWCTRL_DIS_CACHE_ALIGNMENT; |
@@ -7869,7 +7892,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
7869 | ((u64) tpr->rx_std_mapping >> 32)); | 7892 | ((u64) tpr->rx_std_mapping >> 32)); |
7870 | tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, | 7893 | tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, |
7871 | ((u64) tpr->rx_std_mapping & 0xffffffff)); | 7894 | ((u64) tpr->rx_std_mapping & 0xffffffff)); |
7872 | if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) | 7895 | if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && |
7896 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719) | ||
7873 | tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR, | 7897 | tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR, |
7874 | NIC_SRAM_RX_BUFFER_DESC); | 7898 | NIC_SRAM_RX_BUFFER_DESC); |
7875 | 7899 | ||
@@ -7894,7 +7918,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
7894 | tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_MAXLEN_FLAGS, | 7918 | tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_MAXLEN_FLAGS, |
7895 | (RX_JUMBO_MAX_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT) | | 7919 | (RX_JUMBO_MAX_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT) | |
7896 | BDINFO_FLAGS_USE_EXT_RECV); | 7920 | BDINFO_FLAGS_USE_EXT_RECV); |
7897 | if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) | 7921 | if (!(tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG) || |
7922 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) | ||
7898 | tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_NIC_ADDR, | 7923 | tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_NIC_ADDR, |
7899 | NIC_SRAM_RX_JUMBO_BUFFER_DESC); | 7924 | NIC_SRAM_RX_JUMBO_BUFFER_DESC); |
7900 | } else { | 7925 | } else { |
@@ -7903,6 +7928,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
7903 | } | 7928 | } |
7904 | 7929 | ||
7905 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 7930 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
7931 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
7906 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) | 7932 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) |
7907 | val = (RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT) | | 7933 | val = (RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT) | |
7908 | (TG3_RX_STD_DMA_SZ << 2); | 7934 | (TG3_RX_STD_DMA_SZ << 2); |
@@ -7921,6 +7947,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
7921 | tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx); | 7947 | tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx); |
7922 | 7948 | ||
7923 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 7949 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
7950 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
7924 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { | 7951 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { |
7925 | tw32(STD_REPLENISH_LWM, 32); | 7952 | tw32(STD_REPLENISH_LWM, 32); |
7926 | tw32(JMB_REPLENISH_LWM, 16); | 7953 | tw32(JMB_REPLENISH_LWM, 16); |
@@ -7956,7 +7983,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
7956 | RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB | | 7983 | RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB | |
7957 | RDMAC_MODE_LNGREAD_ENAB); | 7984 | RDMAC_MODE_LNGREAD_ENAB); |
7958 | 7985 | ||
7959 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) | 7986 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
7987 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) | ||
7960 | rdmac_mode |= RDMAC_MODE_MULT_DMA_RD_DIS; | 7988 | rdmac_mode |= RDMAC_MODE_MULT_DMA_RD_DIS; |
7961 | 7989 | ||
7962 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || | 7990 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || |
@@ -8195,6 +8223,9 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
8195 | } | 8223 | } |
8196 | 8224 | ||
8197 | tp->tx_mode = TX_MODE_ENABLE; | 8225 | tp->tx_mode = TX_MODE_ENABLE; |
8226 | if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) || | ||
8227 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) | ||
8228 | tp->tx_mode |= TX_MODE_MBUF_LOCKUP_FIX; | ||
8198 | tw32_f(MAC_TX_MODE, tp->tx_mode); | 8229 | tw32_f(MAC_TX_MODE, tp->tx_mode); |
8199 | udelay(100); | 8230 | udelay(100); |
8200 | 8231 | ||
@@ -8206,7 +8237,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
8206 | for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i++) { | 8237 | for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i++) { |
8207 | int idx = i % sizeof(val); | 8238 | int idx = i % sizeof(val); |
8208 | 8239 | ||
8209 | ent[idx] = i % (tp->irq_cnt - 1); | 8240 | ent[idx] = (i % (tp->irq_cnt - 1)) + 1; |
8210 | if (idx == sizeof(val) - 1) { | 8241 | if (idx == sizeof(val) - 1) { |
8211 | tw32(reg, val); | 8242 | tw32(reg, val); |
8212 | reg += 4; | 8243 | reg += 4; |
@@ -8511,8 +8542,10 @@ static void tg3_timer(unsigned long __opaque) | |||
8511 | } | 8542 | } |
8512 | tg3_setup_phy(tp, 0); | 8543 | tg3_setup_phy(tp, 0); |
8513 | } | 8544 | } |
8514 | } else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) | 8545 | } else if ((tp->tg3_flags2 & TG3_FLG2_MII_SERDES) && |
8546 | !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) { | ||
8515 | tg3_serdes_parallel_detect(tp); | 8547 | tg3_serdes_parallel_detect(tp); |
8548 | } | ||
8516 | 8549 | ||
8517 | tp->timer_counter = tp->timer_multiplier; | 8550 | tp->timer_counter = tp->timer_multiplier; |
8518 | } | 8551 | } |
@@ -8606,6 +8639,7 @@ static int tg3_test_interrupt(struct tg3 *tp) | |||
8606 | * observable way to know whether the interrupt was delivered. | 8639 | * observable way to know whether the interrupt was delivered. |
8607 | */ | 8640 | */ |
8608 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 8641 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
8642 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
8609 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) && | 8643 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) && |
8610 | (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) { | 8644 | (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) { |
8611 | val = tr32(MSGINT_MODE) | MSGINT_MODE_ONE_SHOT_DISABLE; | 8645 | val = tr32(MSGINT_MODE) | MSGINT_MODE_ONE_SHOT_DISABLE; |
@@ -8650,6 +8684,7 @@ static int tg3_test_interrupt(struct tg3 *tp) | |||
8650 | if (intr_ok) { | 8684 | if (intr_ok) { |
8651 | /* Reenable MSI one shot mode. */ | 8685 | /* Reenable MSI one shot mode. */ |
8652 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 8686 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
8687 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
8653 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) && | 8688 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) && |
8654 | (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) { | 8689 | (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) { |
8655 | val = tr32(MSGINT_MODE) & ~MSGINT_MODE_ONE_SHOT_DISABLE; | 8690 | val = tr32(MSGINT_MODE) & ~MSGINT_MODE_ONE_SHOT_DISABLE; |
@@ -8775,9 +8810,9 @@ static bool tg3_enable_msix(struct tg3 *tp) | |||
8775 | } | 8810 | } |
8776 | 8811 | ||
8777 | rc = pci_enable_msix(tp->pdev, msix_ent, tp->irq_cnt); | 8812 | rc = pci_enable_msix(tp->pdev, msix_ent, tp->irq_cnt); |
8778 | if (rc != 0) { | 8813 | if (rc < 0) { |
8779 | if (rc < TG3_RSS_MIN_NUM_MSIX_VECS) | 8814 | return false; |
8780 | return false; | 8815 | } else if (rc != 0) { |
8781 | if (pci_enable_msix(tp->pdev, msix_ent, rc)) | 8816 | if (pci_enable_msix(tp->pdev, msix_ent, rc)) |
8782 | return false; | 8817 | return false; |
8783 | netdev_notice(tp->dev, "Requested %d MSI-X vectors, received %d\n", | 8818 | netdev_notice(tp->dev, "Requested %d MSI-X vectors, received %d\n", |
@@ -8785,16 +8820,19 @@ static bool tg3_enable_msix(struct tg3 *tp) | |||
8785 | tp->irq_cnt = rc; | 8820 | tp->irq_cnt = rc; |
8786 | } | 8821 | } |
8787 | 8822 | ||
8788 | tp->tg3_flags3 |= TG3_FLG3_ENABLE_RSS; | ||
8789 | |||
8790 | for (i = 0; i < tp->irq_max; i++) | 8823 | for (i = 0; i < tp->irq_max; i++) |
8791 | tp->napi[i].irq_vec = msix_ent[i].vector; | 8824 | tp->napi[i].irq_vec = msix_ent[i].vector; |
8792 | 8825 | ||
8793 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { | 8826 | tp->dev->real_num_tx_queues = 1; |
8794 | tp->tg3_flags3 |= TG3_FLG3_ENABLE_TSS; | 8827 | if (tp->irq_cnt > 1) { |
8795 | tp->dev->real_num_tx_queues = tp->irq_cnt - 1; | 8828 | tp->tg3_flags3 |= TG3_FLG3_ENABLE_RSS; |
8796 | } else | 8829 | |
8797 | tp->dev->real_num_tx_queues = 1; | 8830 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
8831 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) { | ||
8832 | tp->tg3_flags3 |= TG3_FLG3_ENABLE_TSS; | ||
8833 | tp->dev->real_num_tx_queues = tp->irq_cnt - 1; | ||
8834 | } | ||
8835 | } | ||
8798 | 8836 | ||
8799 | return true; | 8837 | return true; |
8800 | } | 8838 | } |
@@ -8943,6 +8981,7 @@ static int tg3_open(struct net_device *dev) | |||
8943 | } | 8981 | } |
8944 | 8982 | ||
8945 | if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && | 8983 | if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && |
8984 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 && | ||
8946 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765 && | 8985 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765 && |
8947 | (tp->tg3_flags2 & TG3_FLG2_USING_MSI) && | 8986 | (tp->tg3_flags2 & TG3_FLG2_USING_MSI) && |
8948 | (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)) { | 8987 | (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)) { |
@@ -10554,7 +10593,8 @@ static int tg3_test_memory(struct tg3 *tp) | |||
10554 | int err = 0; | 10593 | int err = 0; |
10555 | int i; | 10594 | int i; |
10556 | 10595 | ||
10557 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) | 10596 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
10597 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) | ||
10558 | mem_tbl = mem_tbl_5717; | 10598 | mem_tbl = mem_tbl_5717; |
10559 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) | 10599 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) |
10560 | mem_tbl = mem_tbl_57765; | 10600 | mem_tbl = mem_tbl_57765; |
@@ -11634,7 +11674,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp) | |||
11634 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || | 11674 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || |
11635 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) | 11675 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) |
11636 | tg3_get_57780_nvram_info(tp); | 11676 | tg3_get_57780_nvram_info(tp); |
11637 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) | 11677 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
11678 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) | ||
11638 | tg3_get_5717_nvram_info(tp); | 11679 | tg3_get_5717_nvram_info(tp); |
11639 | else | 11680 | else |
11640 | tg3_get_nvram_info(tp); | 11681 | tg3_get_nvram_info(tp); |
@@ -12070,11 +12111,10 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) | |||
12070 | 12111 | ||
12071 | tp->phy_id = eeprom_phy_id; | 12112 | tp->phy_id = eeprom_phy_id; |
12072 | if (eeprom_phy_serdes) { | 12113 | if (eeprom_phy_serdes) { |
12073 | if ((tp->tg3_flags2 & TG3_FLG2_5780_CLASS) || | 12114 | if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) |
12074 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) | ||
12075 | tp->tg3_flags2 |= TG3_FLG2_MII_SERDES; | ||
12076 | else | ||
12077 | tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; | 12115 | tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; |
12116 | else | ||
12117 | tp->tg3_flags2 |= TG3_FLG2_MII_SERDES; | ||
12078 | } | 12118 | } |
12079 | 12119 | ||
12080 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) | 12120 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) |
@@ -12804,7 +12844,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
12804 | 12844 | ||
12805 | if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 || | 12845 | if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 || |
12806 | tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 || | 12846 | tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 || |
12807 | tp->pdev->device == TG3PCI_DEVICE_TIGON3_5724) | 12847 | tp->pdev->device == TG3PCI_DEVICE_TIGON3_5724 || |
12848 | tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719) | ||
12808 | pci_read_config_dword(tp->pdev, | 12849 | pci_read_config_dword(tp->pdev, |
12809 | TG3PCI_GEN2_PRODID_ASICREV, | 12850 | TG3PCI_GEN2_PRODID_ASICREV, |
12810 | &prod_id_asic_rev); | 12851 | &prod_id_asic_rev); |
@@ -12970,6 +13011,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
12970 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || | 13011 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || |
12971 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || | 13012 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || |
12972 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 13013 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
13014 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
12973 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) | 13015 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) |
12974 | tp->tg3_flags3 |= TG3_FLG3_5755_PLUS; | 13016 | tp->tg3_flags3 |= TG3_FLG3_5755_PLUS; |
12975 | 13017 | ||
@@ -12999,6 +13041,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
12999 | 13041 | ||
13000 | /* Determine TSO capabilities */ | 13042 | /* Determine TSO capabilities */ |
13001 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 13043 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
13044 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
13002 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) | 13045 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) |
13003 | tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3; | 13046 | tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3; |
13004 | else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) || | 13047 | else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) || |
@@ -13036,6 +13079,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
13036 | } | 13079 | } |
13037 | 13080 | ||
13038 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 13081 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
13082 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
13039 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { | 13083 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { |
13040 | tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX; | 13084 | tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX; |
13041 | tp->irq_max = TG3_IRQ_MAX_VECS; | 13085 | tp->irq_max = TG3_IRQ_MAX_VECS; |
@@ -13043,6 +13087,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
13043 | } | 13087 | } |
13044 | 13088 | ||
13045 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 13089 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
13090 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
13046 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) | 13091 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) |
13047 | tp->tg3_flags3 |= TG3_FLG3_SHORT_DMA_BUG; | 13092 | tp->tg3_flags3 |= TG3_FLG3_SHORT_DMA_BUG; |
13048 | else if (!(tp->tg3_flags3 & TG3_FLG3_5755_PLUS)) { | 13093 | else if (!(tp->tg3_flags3 & TG3_FLG3_5755_PLUS)) { |
@@ -13051,6 +13096,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
13051 | } | 13096 | } |
13052 | 13097 | ||
13053 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 13098 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
13099 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
13054 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) | 13100 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) |
13055 | tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG; | 13101 | tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG; |
13056 | 13102 | ||
@@ -13242,7 +13288,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
13242 | * APE register and memory space. | 13288 | * APE register and memory space. |
13243 | */ | 13289 | */ |
13244 | pci_state_reg |= PCISTATE_ALLOW_APE_CTLSPC_WR | | 13290 | pci_state_reg |= PCISTATE_ALLOW_APE_CTLSPC_WR | |
13245 | PCISTATE_ALLOW_APE_SHMEM_WR; | 13291 | PCISTATE_ALLOW_APE_SHMEM_WR | |
13292 | PCISTATE_ALLOW_APE_PSPACE_WR; | ||
13246 | pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, | 13293 | pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, |
13247 | pci_state_reg); | 13294 | pci_state_reg); |
13248 | } | 13295 | } |
@@ -13252,6 +13299,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
13252 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || | 13299 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || |
13253 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || | 13300 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || |
13254 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 13301 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
13302 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
13255 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) | 13303 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) |
13256 | tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT; | 13304 | tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT; |
13257 | 13305 | ||
@@ -13332,6 +13380,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
13332 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 && | 13380 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 && |
13333 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 && | 13381 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 && |
13334 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && | 13382 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && |
13383 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719 && | ||
13335 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) { | 13384 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) { |
13336 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || | 13385 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || |
13337 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 || | 13386 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 || |
@@ -13580,9 +13629,12 @@ static int __devinit tg3_get_device_address(struct tg3 *tp) | |||
13580 | tw32_f(NVRAM_CMD, NVRAM_CMD_RESET); | 13629 | tw32_f(NVRAM_CMD, NVRAM_CMD_RESET); |
13581 | else | 13630 | else |
13582 | tg3_nvram_unlock(tp); | 13631 | tg3_nvram_unlock(tp); |
13583 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { | 13632 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
13584 | if (tr32(TG3_CPMU_STATUS) & TG3_CPMU_STATUS_PCIE_FUNC) | 13633 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) { |
13634 | if (PCI_FUNC(tp->pdev->devfn) & 1) | ||
13585 | mac_offset = 0xcc; | 13635 | mac_offset = 0xcc; |
13636 | if (PCI_FUNC(tp->pdev->devfn) > 1) | ||
13637 | mac_offset += 0x18c; | ||
13586 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) | 13638 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) |
13587 | mac_offset = 0x10; | 13639 | mac_offset = 0x10; |
13588 | 13640 | ||
@@ -13668,6 +13720,7 @@ static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val) | |||
13668 | #endif | 13720 | #endif |
13669 | 13721 | ||
13670 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 13722 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
13723 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
13671 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { | 13724 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { |
13672 | val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT; | 13725 | val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT; |
13673 | goto out; | 13726 | goto out; |
@@ -13880,6 +13933,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp) | |||
13880 | tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl); | 13933 | tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl); |
13881 | 13934 | ||
13882 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 13935 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
13936 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
13883 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) | 13937 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) |
13884 | goto out; | 13938 | goto out; |
13885 | 13939 | ||
@@ -14079,6 +14133,7 @@ static void __devinit tg3_init_link_config(struct tg3 *tp) | |||
14079 | static void __devinit tg3_init_bufmgr_config(struct tg3 *tp) | 14133 | static void __devinit tg3_init_bufmgr_config(struct tg3 *tp) |
14080 | { | 14134 | { |
14081 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || | 14135 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || |
14136 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || | ||
14082 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { | 14137 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) { |
14083 | tp->bufmgr_config.mbuf_read_dma_low_water = | 14138 | tp->bufmgr_config.mbuf_read_dma_low_water = |
14084 | DEFAULT_MB_RDMA_LOW_WATER_5705; | 14139 | DEFAULT_MB_RDMA_LOW_WATER_5705; |
@@ -14156,6 +14211,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp) | |||
14156 | case TG3_PHY_ID_BCM5718C: return "5718C"; | 14211 | case TG3_PHY_ID_BCM5718C: return "5718C"; |
14157 | case TG3_PHY_ID_BCM5718S: return "5718S"; | 14212 | case TG3_PHY_ID_BCM5718S: return "5718S"; |
14158 | case TG3_PHY_ID_BCM57765: return "57765"; | 14213 | case TG3_PHY_ID_BCM57765: return "57765"; |
14214 | case TG3_PHY_ID_BCM5719C: return "5719C"; | ||
14159 | case TG3_PHY_ID_BCM8002: return "8002/serdes"; | 14215 | case TG3_PHY_ID_BCM8002: return "8002/serdes"; |
14160 | case 0: return "serdes"; | 14216 | case 0: return "serdes"; |
14161 | default: return "unknown"; | 14217 | default: return "unknown"; |
@@ -14404,7 +14460,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
14404 | } | 14460 | } |
14405 | 14461 | ||
14406 | if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) && | 14462 | if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) && |
14407 | tp->pci_chip_rev_id != CHIPREV_ID_5717_A0) | 14463 | tp->pci_chip_rev_id != CHIPREV_ID_5717_A0 && |
14464 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719) | ||
14408 | dev->netdev_ops = &tg3_netdev_ops; | 14465 | dev->netdev_ops = &tg3_netdev_ops; |
14409 | else | 14466 | else |
14410 | dev->netdev_ops = &tg3_netdev_ops_dma_bug; | 14467 | dev->netdev_ops = &tg3_netdev_ops_dma_bug; |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index ce9c4918c318..6b6af7698b38 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -53,6 +53,7 @@ | |||
53 | #define TG3PCI_DEVICE_TIGON3_57765 0x16b4 | 53 | #define TG3PCI_DEVICE_TIGON3_57765 0x16b4 |
54 | #define TG3PCI_DEVICE_TIGON3_57791 0x16b2 | 54 | #define TG3PCI_DEVICE_TIGON3_57791 0x16b2 |
55 | #define TG3PCI_DEVICE_TIGON3_57795 0x16b6 | 55 | #define TG3PCI_DEVICE_TIGON3_57795 0x16b6 |
56 | #define TG3PCI_DEVICE_TIGON3_5719 0x1657 | ||
56 | /* 0x04 --> 0x2c unused */ | 57 | /* 0x04 --> 0x2c unused */ |
57 | #define TG3PCI_SUBVENDOR_ID_BROADCOM PCI_VENDOR_ID_BROADCOM | 58 | #define TG3PCI_SUBVENDOR_ID_BROADCOM PCI_VENDOR_ID_BROADCOM |
58 | #define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6 0x1644 | 59 | #define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6 0x1644 |
@@ -160,6 +161,7 @@ | |||
160 | #define ASIC_REV_57780 0x57780 | 161 | #define ASIC_REV_57780 0x57780 |
161 | #define ASIC_REV_5717 0x5717 | 162 | #define ASIC_REV_5717 0x5717 |
162 | #define ASIC_REV_57765 0x57785 | 163 | #define ASIC_REV_57765 0x57785 |
164 | #define ASIC_REV_5719 0x5719 | ||
163 | #define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) | 165 | #define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) |
164 | #define CHIPREV_5700_AX 0x70 | 166 | #define CHIPREV_5700_AX 0x70 |
165 | #define CHIPREV_5700_BX 0x71 | 167 | #define CHIPREV_5700_BX 0x71 |
@@ -231,6 +233,7 @@ | |||
231 | #define PCISTATE_RETRY_SAME_DMA 0x00002000 | 233 | #define PCISTATE_RETRY_SAME_DMA 0x00002000 |
232 | #define PCISTATE_ALLOW_APE_CTLSPC_WR 0x00010000 | 234 | #define PCISTATE_ALLOW_APE_CTLSPC_WR 0x00010000 |
233 | #define PCISTATE_ALLOW_APE_SHMEM_WR 0x00020000 | 235 | #define PCISTATE_ALLOW_APE_SHMEM_WR 0x00020000 |
236 | #define PCISTATE_ALLOW_APE_PSPACE_WR 0x00040000 | ||
234 | #define TG3PCI_CLOCK_CTRL 0x00000074 | 237 | #define TG3PCI_CLOCK_CTRL 0x00000074 |
235 | #define CLOCK_CTRL_CORECLK_DISABLE 0x00000200 | 238 | #define CLOCK_CTRL_CORECLK_DISABLE 0x00000200 |
236 | #define CLOCK_CTRL_RXCLK_DISABLE 0x00000400 | 239 | #define CLOCK_CTRL_RXCLK_DISABLE 0x00000400 |
@@ -468,6 +471,7 @@ | |||
468 | #define TX_MODE_FLOW_CTRL_ENABLE 0x00000010 | 471 | #define TX_MODE_FLOW_CTRL_ENABLE 0x00000010 |
469 | #define TX_MODE_BIG_BCKOFF_ENABLE 0x00000020 | 472 | #define TX_MODE_BIG_BCKOFF_ENABLE 0x00000020 |
470 | #define TX_MODE_LONG_PAUSE_ENABLE 0x00000040 | 473 | #define TX_MODE_LONG_PAUSE_ENABLE 0x00000040 |
474 | #define TX_MODE_MBUF_LOCKUP_FIX 0x00000100 | ||
471 | #define MAC_TX_STATUS 0x00000460 | 475 | #define MAC_TX_STATUS 0x00000460 |
472 | #define TX_STATUS_XOFFED 0x00000001 | 476 | #define TX_STATUS_XOFFED 0x00000001 |
473 | #define TX_STATUS_SENT_XOFF 0x00000002 | 477 | #define TX_STATUS_SENT_XOFF 0x00000002 |
@@ -1071,10 +1075,8 @@ | |||
1071 | #define TG3_CPMU_HST_ACC 0x0000361c | 1075 | #define TG3_CPMU_HST_ACC 0x0000361c |
1072 | #define CPMU_HST_ACC_MACCLK_MASK 0x001f0000 | 1076 | #define CPMU_HST_ACC_MACCLK_MASK 0x001f0000 |
1073 | #define CPMU_HST_ACC_MACCLK_6_25 0x00130000 | 1077 | #define CPMU_HST_ACC_MACCLK_6_25 0x00130000 |
1074 | /* 0x3620 --> 0x362c unused */ | 1078 | /* 0x3620 --> 0x3630 unused */ |
1075 | 1079 | ||
1076 | #define TG3_CPMU_STATUS 0x0000362c | ||
1077 | #define TG3_CPMU_STATUS_PCIE_FUNC 0x20000000 | ||
1078 | #define TG3_CPMU_CLCK_STAT 0x00003630 | 1080 | #define TG3_CPMU_CLCK_STAT 0x00003630 |
1079 | #define CPMU_CLCK_STAT_MAC_CLCK_MASK 0x001f0000 | 1081 | #define CPMU_CLCK_STAT_MAC_CLCK_MASK 0x001f0000 |
1080 | #define CPMU_CLCK_STAT_MAC_CLCK_62_5 0x00000000 | 1082 | #define CPMU_CLCK_STAT_MAC_CLCK_62_5 0x00000000 |
@@ -2209,6 +2211,11 @@ | |||
2209 | #define APE_EVENT_STATUS_STATE_SUSPEND 0x00040000 | 2211 | #define APE_EVENT_STATUS_STATE_SUSPEND 0x00040000 |
2210 | #define APE_EVENT_STATUS_EVENT_PENDING 0x80000000 | 2212 | #define APE_EVENT_STATUS_EVENT_PENDING 0x80000000 |
2211 | 2213 | ||
2214 | #define TG3_APE_PER_LOCK_REQ 0x8400 | ||
2215 | #define APE_LOCK_PER_REQ_DRIVER 0x00001000 | ||
2216 | #define TG3_APE_PER_LOCK_GRANT 0x8420 | ||
2217 | #define APE_PER_LOCK_GRANT_DRIVER 0x00001000 | ||
2218 | |||
2212 | /* APE convenience enumerations. */ | 2219 | /* APE convenience enumerations. */ |
2213 | #define TG3_APE_LOCK_GRC 1 | 2220 | #define TG3_APE_LOCK_GRC 1 |
2214 | #define TG3_APE_LOCK_MEM 4 | 2221 | #define TG3_APE_LOCK_MEM 4 |
@@ -2942,6 +2949,7 @@ struct tg3 { | |||
2942 | #define TG3_PHY_ID_BCM5718C 0x5c0d8a00 | 2949 | #define TG3_PHY_ID_BCM5718C 0x5c0d8a00 |
2943 | #define TG3_PHY_ID_BCM5718S 0xbc050ff0 | 2950 | #define TG3_PHY_ID_BCM5718S 0xbc050ff0 |
2944 | #define TG3_PHY_ID_BCM57765 0x5c0d8a40 | 2951 | #define TG3_PHY_ID_BCM57765 0x5c0d8a40 |
2952 | #define TG3_PHY_ID_BCM5719C 0x5c0d8a20 | ||
2945 | #define TG3_PHY_ID_BCM5906 0xdc00ac40 | 2953 | #define TG3_PHY_ID_BCM5906 0xdc00ac40 |
2946 | #define TG3_PHY_ID_BCM8002 0x60010140 | 2954 | #define TG3_PHY_ID_BCM8002 0x60010140 |
2947 | #define TG3_PHY_ID_INVALID 0xffffffff | 2955 | #define TG3_PHY_ID_INVALID 0xffffffff |
@@ -2965,7 +2973,8 @@ struct tg3 { | |||
2965 | (X) == TG3_PHY_ID_BCM5755 || (X) == TG3_PHY_ID_BCM5756 || \ | 2973 | (X) == TG3_PHY_ID_BCM5755 || (X) == TG3_PHY_ID_BCM5756 || \ |
2966 | (X) == TG3_PHY_ID_BCM5906 || (X) == TG3_PHY_ID_BCM5761 || \ | 2974 | (X) == TG3_PHY_ID_BCM5906 || (X) == TG3_PHY_ID_BCM5761 || \ |
2967 | (X) == TG3_PHY_ID_BCM5718C || (X) == TG3_PHY_ID_BCM5718S || \ | 2975 | (X) == TG3_PHY_ID_BCM5718C || (X) == TG3_PHY_ID_BCM5718S || \ |
2968 | (X) == TG3_PHY_ID_BCM57765 || (X) == TG3_PHY_ID_BCM8002) | 2976 | (X) == TG3_PHY_ID_BCM57765 || (X) == TG3_PHY_ID_BCM5719C || \ |
2977 | (X) == TG3_PHY_ID_BCM8002) | ||
2969 | 2978 | ||
2970 | u32 led_ctrl; | 2979 | u32 led_ctrl; |
2971 | u32 phy_otp; | 2980 | u32 phy_otp; |
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c index c0e70006374e..960962660079 100644 --- a/drivers/net/tulip/de2104x.c +++ b/drivers/net/tulip/de2104x.c | |||
@@ -262,13 +262,13 @@ struct de_srom_media_block { | |||
262 | u16 csr13; | 262 | u16 csr13; |
263 | u16 csr14; | 263 | u16 csr14; |
264 | u16 csr15; | 264 | u16 csr15; |
265 | } __attribute__((packed)); | 265 | } __packed; |
266 | 266 | ||
267 | struct de_srom_info_leaf { | 267 | struct de_srom_info_leaf { |
268 | u16 default_media; | 268 | u16 default_media; |
269 | u8 n_blocks; | 269 | u8 n_blocks; |
270 | u8 unused; | 270 | u8 unused; |
271 | } __attribute__((packed)); | 271 | } __packed; |
272 | 272 | ||
273 | struct de_desc { | 273 | struct de_desc { |
274 | __le32 opts1; | 274 | __le32 opts1; |
diff --git a/drivers/net/tulip/eeprom.c b/drivers/net/tulip/eeprom.c index 6002e651b9ea..3031ed9c4a1a 100644 --- a/drivers/net/tulip/eeprom.c +++ b/drivers/net/tulip/eeprom.c | |||
@@ -120,8 +120,8 @@ static void __devinit tulip_build_fake_mediatable(struct tulip_private *tp) | |||
120 | 0x00, 0x06 /* ttm bit map */ | 120 | 0x00, 0x06 /* ttm bit map */ |
121 | }; | 121 | }; |
122 | 122 | ||
123 | tp->mtable = (struct mediatable *) | 123 | tp->mtable = kmalloc(sizeof(struct mediatable) + |
124 | kmalloc(sizeof(struct mediatable) + sizeof(struct medialeaf), GFP_KERNEL); | 124 | sizeof(struct medialeaf), GFP_KERNEL); |
125 | 125 | ||
126 | if (tp->mtable == NULL) | 126 | if (tp->mtable == NULL) |
127 | return; /* Horrible, impossible failure. */ | 127 | return; /* Horrible, impossible failure. */ |
@@ -227,9 +227,9 @@ subsequent_board: | |||
227 | return; | 227 | return; |
228 | } | 228 | } |
229 | 229 | ||
230 | mtable = (struct mediatable *) | 230 | mtable = kmalloc(sizeof(struct mediatable) + |
231 | kmalloc(sizeof(struct mediatable) + count*sizeof(struct medialeaf), | 231 | count * sizeof(struct medialeaf), |
232 | GFP_KERNEL); | 232 | GFP_KERNEL); |
233 | if (mtable == NULL) | 233 | if (mtable == NULL) |
234 | return; /* Horrible, impossible failure. */ | 234 | return; /* Horrible, impossible failure. */ |
235 | last_mediatable = tp->mtable = mtable; | 235 | last_mediatable = tp->mtable = mtable; |
diff --git a/drivers/net/tulip/tulip.h b/drivers/net/tulip/tulip.h index 0afa2d4f9472..e525875ed67d 100644 --- a/drivers/net/tulip/tulip.h +++ b/drivers/net/tulip/tulip.h | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/types.h> | 20 | #include <linux/types.h> |
21 | #include <linux/spinlock.h> | 21 | #include <linux/spinlock.h> |
22 | #include <linux/netdevice.h> | 22 | #include <linux/netdevice.h> |
23 | #include <linux/ethtool.h> | ||
23 | #include <linux/timer.h> | 24 | #include <linux/timer.h> |
24 | #include <linux/delay.h> | 25 | #include <linux/delay.h> |
25 | #include <linux/pci.h> | 26 | #include <linux/pci.h> |
@@ -51,22 +52,23 @@ struct tulip_chip_table { | |||
51 | 52 | ||
52 | 53 | ||
53 | enum tbl_flag { | 54 | enum tbl_flag { |
54 | HAS_MII = 0x0001, | 55 | HAS_MII = 0x00001, |
55 | HAS_MEDIA_TABLE = 0x0002, | 56 | HAS_MEDIA_TABLE = 0x00002, |
56 | CSR12_IN_SROM = 0x0004, | 57 | CSR12_IN_SROM = 0x00004, |
57 | ALWAYS_CHECK_MII = 0x0008, | 58 | ALWAYS_CHECK_MII = 0x00008, |
58 | HAS_ACPI = 0x0010, | 59 | HAS_ACPI = 0x00010, |
59 | MC_HASH_ONLY = 0x0020, /* Hash-only multicast filter. */ | 60 | MC_HASH_ONLY = 0x00020, /* Hash-only multicast filter. */ |
60 | HAS_PNICNWAY = 0x0080, | 61 | HAS_PNICNWAY = 0x00080, |
61 | HAS_NWAY = 0x0040, /* Uses internal NWay xcvr. */ | 62 | HAS_NWAY = 0x00040, /* Uses internal NWay xcvr. */ |
62 | HAS_INTR_MITIGATION = 0x0100, | 63 | HAS_INTR_MITIGATION = 0x00100, |
63 | IS_ASIX = 0x0200, | 64 | IS_ASIX = 0x00200, |
64 | HAS_8023X = 0x0400, | 65 | HAS_8023X = 0x00400, |
65 | COMET_MAC_ADDR = 0x0800, | 66 | COMET_MAC_ADDR = 0x00800, |
66 | HAS_PCI_MWI = 0x1000, | 67 | HAS_PCI_MWI = 0x01000, |
67 | HAS_PHY_IRQ = 0x2000, | 68 | HAS_PHY_IRQ = 0x02000, |
68 | HAS_SWAPPED_SEEPROM = 0x4000, | 69 | HAS_SWAPPED_SEEPROM = 0x04000, |
69 | NEEDS_FAKE_MEDIA_TABLE = 0x8000, | 70 | NEEDS_FAKE_MEDIA_TABLE = 0x08000, |
71 | COMET_PM = 0x10000, | ||
70 | }; | 72 | }; |
71 | 73 | ||
72 | 74 | ||
@@ -120,6 +122,11 @@ enum tulip_offsets { | |||
120 | CSR13 = 0x68, | 122 | CSR13 = 0x68, |
121 | CSR14 = 0x70, | 123 | CSR14 = 0x70, |
122 | CSR15 = 0x78, | 124 | CSR15 = 0x78, |
125 | CSR18 = 0x88, | ||
126 | CSR19 = 0x8c, | ||
127 | CSR20 = 0x90, | ||
128 | CSR27 = 0xAC, | ||
129 | CSR28 = 0xB0, | ||
123 | }; | 130 | }; |
124 | 131 | ||
125 | /* register offset and bits for CFDD PCI config reg */ | 132 | /* register offset and bits for CFDD PCI config reg */ |
@@ -289,6 +296,30 @@ enum t21143_csr6_bits { | |||
289 | csr6_mask_100bt = (csr6_scr | csr6_pcs | csr6_hbd), | 296 | csr6_mask_100bt = (csr6_scr | csr6_pcs | csr6_hbd), |
290 | }; | 297 | }; |
291 | 298 | ||
299 | enum tulip_comet_csr13_bits { | ||
300 | /* The LINKOFFE and LINKONE work in conjunction with LSCE, i.e. they | ||
301 | * determine which link status transition wakes up if LSCE is | ||
302 | * enabled */ | ||
303 | comet_csr13_linkoffe = (1 << 17), | ||
304 | comet_csr13_linkone = (1 << 16), | ||
305 | comet_csr13_wfre = (1 << 10), | ||
306 | comet_csr13_mpre = (1 << 9), | ||
307 | comet_csr13_lsce = (1 << 8), | ||
308 | comet_csr13_wfr = (1 << 2), | ||
309 | comet_csr13_mpr = (1 << 1), | ||
310 | comet_csr13_lsc = (1 << 0), | ||
311 | }; | ||
312 | |||
313 | enum tulip_comet_csr18_bits { | ||
314 | comet_csr18_pmes_sticky = (1 << 24), | ||
315 | comet_csr18_pm_mode = (1 << 19), | ||
316 | comet_csr18_apm_mode = (1 << 18), | ||
317 | comet_csr18_d3a = (1 << 7) | ||
318 | }; | ||
319 | |||
320 | enum tulip_comet_csr20_bits { | ||
321 | comet_csr20_pmes = (1 << 15), | ||
322 | }; | ||
292 | 323 | ||
293 | /* Keep the ring sizes a power of two for efficiency. | 324 | /* Keep the ring sizes a power of two for efficiency. |
294 | Making the Tx ring too large decreases the effectiveness of channel | 325 | Making the Tx ring too large decreases the effectiveness of channel |
@@ -411,6 +442,7 @@ struct tulip_private { | |||
411 | unsigned int csr6; /* Current CSR6 control settings. */ | 442 | unsigned int csr6; /* Current CSR6 control settings. */ |
412 | unsigned char eeprom[EEPROM_SIZE]; /* Serial EEPROM contents. */ | 443 | unsigned char eeprom[EEPROM_SIZE]; /* Serial EEPROM contents. */ |
413 | void (*link_change) (struct net_device * dev, int csr5); | 444 | void (*link_change) (struct net_device * dev, int csr5); |
445 | struct ethtool_wolinfo wolinfo; /* WOL settings */ | ||
414 | u16 sym_advertise, mii_advertise; /* NWay capabilities advertised. */ | 446 | u16 sym_advertise, mii_advertise; /* NWay capabilities advertised. */ |
415 | u16 lpar; /* 21143 Link partner ability. */ | 447 | u16 lpar; /* 21143 Link partner ability. */ |
416 | u16 advertising[4]; | 448 | u16 advertising[4]; |
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c index 254643ed945e..03e96b928c04 100644 --- a/drivers/net/tulip/tulip_core.c +++ b/drivers/net/tulip/tulip_core.c | |||
@@ -30,7 +30,6 @@ | |||
30 | #include <linux/etherdevice.h> | 30 | #include <linux/etherdevice.h> |
31 | #include <linux/delay.h> | 31 | #include <linux/delay.h> |
32 | #include <linux/mii.h> | 32 | #include <linux/mii.h> |
33 | #include <linux/ethtool.h> | ||
34 | #include <linux/crc32.h> | 33 | #include <linux/crc32.h> |
35 | #include <asm/unaligned.h> | 34 | #include <asm/unaligned.h> |
36 | #include <asm/uaccess.h> | 35 | #include <asm/uaccess.h> |
@@ -272,6 +271,7 @@ static void tulip_down(struct net_device *dev); | |||
272 | static struct net_device_stats *tulip_get_stats(struct net_device *dev); | 271 | static struct net_device_stats *tulip_get_stats(struct net_device *dev); |
273 | static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | 272 | static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
274 | static void set_rx_mode(struct net_device *dev); | 273 | static void set_rx_mode(struct net_device *dev); |
274 | static void tulip_set_wolopts(struct pci_dev *pdev, u32 wolopts); | ||
275 | #ifdef CONFIG_NET_POLL_CONTROLLER | 275 | #ifdef CONFIG_NET_POLL_CONTROLLER |
276 | static void poll_tulip(struct net_device *dev); | 276 | static void poll_tulip(struct net_device *dev); |
277 | #endif | 277 | #endif |
@@ -309,6 +309,11 @@ static void tulip_up(struct net_device *dev) | |||
309 | /* Wake the chip from sleep/snooze mode. */ | 309 | /* Wake the chip from sleep/snooze mode. */ |
310 | tulip_set_power_state (tp, 0, 0); | 310 | tulip_set_power_state (tp, 0, 0); |
311 | 311 | ||
312 | /* Disable all WOL events */ | ||
313 | pci_enable_wake(tp->pdev, PCI_D3hot, 0); | ||
314 | pci_enable_wake(tp->pdev, PCI_D3cold, 0); | ||
315 | tulip_set_wolopts(tp->pdev, 0); | ||
316 | |||
312 | /* On some chip revs we must set the MII/SYM port before the reset!? */ | 317 | /* On some chip revs we must set the MII/SYM port before the reset!? */ |
313 | if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii)) | 318 | if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii)) |
314 | iowrite32(0x00040000, ioaddr + CSR6); | 319 | iowrite32(0x00040000, ioaddr + CSR6); |
@@ -345,8 +350,8 @@ static void tulip_up(struct net_device *dev) | |||
345 | } else if (tp->flags & COMET_MAC_ADDR) { | 350 | } else if (tp->flags & COMET_MAC_ADDR) { |
346 | iowrite32(addr_low, ioaddr + 0xA4); | 351 | iowrite32(addr_low, ioaddr + 0xA4); |
347 | iowrite32(addr_high, ioaddr + 0xA8); | 352 | iowrite32(addr_high, ioaddr + 0xA8); |
348 | iowrite32(0, ioaddr + 0xAC); | 353 | iowrite32(0, ioaddr + CSR27); |
349 | iowrite32(0, ioaddr + 0xB0); | 354 | iowrite32(0, ioaddr + CSR28); |
350 | } | 355 | } |
351 | } else { | 356 | } else { |
352 | /* This is set_rx_mode(), but without starting the transmitter. */ | 357 | /* This is set_rx_mode(), but without starting the transmitter. */ |
@@ -876,8 +881,35 @@ static void tulip_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *in | |||
876 | strcpy(info->bus_info, pci_name(np->pdev)); | 881 | strcpy(info->bus_info, pci_name(np->pdev)); |
877 | } | 882 | } |
878 | 883 | ||
884 | |||
885 | static int tulip_ethtool_set_wol(struct net_device *dev, | ||
886 | struct ethtool_wolinfo *wolinfo) | ||
887 | { | ||
888 | struct tulip_private *tp = netdev_priv(dev); | ||
889 | |||
890 | if (wolinfo->wolopts & (~tp->wolinfo.supported)) | ||
891 | return -EOPNOTSUPP; | ||
892 | |||
893 | tp->wolinfo.wolopts = wolinfo->wolopts; | ||
894 | device_set_wakeup_enable(&tp->pdev->dev, tp->wolinfo.wolopts); | ||
895 | return 0; | ||
896 | } | ||
897 | |||
898 | static void tulip_ethtool_get_wol(struct net_device *dev, | ||
899 | struct ethtool_wolinfo *wolinfo) | ||
900 | { | ||
901 | struct tulip_private *tp = netdev_priv(dev); | ||
902 | |||
903 | wolinfo->supported = tp->wolinfo.supported; | ||
904 | wolinfo->wolopts = tp->wolinfo.wolopts; | ||
905 | return; | ||
906 | } | ||
907 | |||
908 | |||
879 | static const struct ethtool_ops ops = { | 909 | static const struct ethtool_ops ops = { |
880 | .get_drvinfo = tulip_get_drvinfo | 910 | .get_drvinfo = tulip_get_drvinfo, |
911 | .set_wol = tulip_ethtool_set_wol, | ||
912 | .get_wol = tulip_ethtool_get_wol, | ||
881 | }; | 913 | }; |
882 | 914 | ||
883 | /* Provide ioctl() calls to examine the MII xcvr state. */ | 915 | /* Provide ioctl() calls to examine the MII xcvr state. */ |
@@ -1093,8 +1125,8 @@ static void set_rx_mode(struct net_device *dev) | |||
1093 | iowrite32(3, ioaddr + CSR13); | 1125 | iowrite32(3, ioaddr + CSR13); |
1094 | iowrite32(mc_filter[1], ioaddr + CSR14); | 1126 | iowrite32(mc_filter[1], ioaddr + CSR14); |
1095 | } else if (tp->flags & COMET_MAC_ADDR) { | 1127 | } else if (tp->flags & COMET_MAC_ADDR) { |
1096 | iowrite32(mc_filter[0], ioaddr + 0xAC); | 1128 | iowrite32(mc_filter[0], ioaddr + CSR27); |
1097 | iowrite32(mc_filter[1], ioaddr + 0xB0); | 1129 | iowrite32(mc_filter[1], ioaddr + CSR28); |
1098 | } | 1130 | } |
1099 | tp->mc_filter[0] = mc_filter[0]; | 1131 | tp->mc_filter[0] = mc_filter[0]; |
1100 | tp->mc_filter[1] = mc_filter[1]; | 1132 | tp->mc_filter[1] = mc_filter[1]; |
@@ -1381,6 +1413,13 @@ static int __devinit tulip_init_one (struct pci_dev *pdev, | |||
1381 | return i; | 1413 | return i; |
1382 | } | 1414 | } |
1383 | 1415 | ||
1416 | /* The chip will fail to enter a low-power state later unless | ||
1417 | * first explicitly commanded into D0 */ | ||
1418 | if (pci_set_power_state(pdev, PCI_D0)) { | ||
1419 | printk (KERN_NOTICE PFX | ||
1420 | "Failed to set power state to D0\n"); | ||
1421 | } | ||
1422 | |||
1384 | irq = pdev->irq; | 1423 | irq = pdev->irq; |
1385 | 1424 | ||
1386 | /* alloc_etherdev ensures aligned and zeroed private structures */ | 1425 | /* alloc_etherdev ensures aligned and zeroed private structures */ |
@@ -1427,6 +1466,19 @@ static int __devinit tulip_init_one (struct pci_dev *pdev, | |||
1427 | 1466 | ||
1428 | tp->chip_id = chip_idx; | 1467 | tp->chip_id = chip_idx; |
1429 | tp->flags = tulip_tbl[chip_idx].flags; | 1468 | tp->flags = tulip_tbl[chip_idx].flags; |
1469 | |||
1470 | tp->wolinfo.supported = 0; | ||
1471 | tp->wolinfo.wolopts = 0; | ||
1472 | /* COMET: Enable power management only for AN983B */ | ||
1473 | if (chip_idx == COMET ) { | ||
1474 | u32 sig; | ||
1475 | pci_read_config_dword (pdev, 0x80, &sig); | ||
1476 | if (sig == 0x09811317) { | ||
1477 | tp->flags |= COMET_PM; | ||
1478 | tp->wolinfo.supported = WAKE_PHY | WAKE_MAGIC; | ||
1479 | printk(KERN_INFO "tulip_init_one: Enabled WOL support for AN983B\n"); | ||
1480 | } | ||
1481 | } | ||
1430 | tp->pdev = pdev; | 1482 | tp->pdev = pdev; |
1431 | tp->base_addr = ioaddr; | 1483 | tp->base_addr = ioaddr; |
1432 | tp->revision = pdev->revision; | 1484 | tp->revision = pdev->revision; |
@@ -1759,11 +1811,43 @@ err_out_free_netdev: | |||
1759 | } | 1811 | } |
1760 | 1812 | ||
1761 | 1813 | ||
1814 | /* set the registers according to the given wolopts */ | ||
1815 | static void tulip_set_wolopts (struct pci_dev *pdev, u32 wolopts) | ||
1816 | { | ||
1817 | struct net_device *dev = pci_get_drvdata(pdev); | ||
1818 | struct tulip_private *tp = netdev_priv(dev); | ||
1819 | void __iomem *ioaddr = tp->base_addr; | ||
1820 | |||
1821 | if (tp->flags & COMET_PM) { | ||
1822 | |||
1823 | unsigned int tmp; | ||
1824 | |||
1825 | tmp = ioread32(ioaddr + CSR18); | ||
1826 | tmp &= ~(comet_csr18_pmes_sticky | comet_csr18_apm_mode | comet_csr18_d3a); | ||
1827 | tmp |= comet_csr18_pm_mode; | ||
1828 | iowrite32(tmp, ioaddr + CSR18); | ||
1829 | |||
1830 | /* Set the Wake-up Control/Status Register to the given WOL options*/ | ||
1831 | tmp = ioread32(ioaddr + CSR13); | ||
1832 | tmp &= ~(comet_csr13_linkoffe | comet_csr13_linkone | comet_csr13_wfre | comet_csr13_lsce | comet_csr13_mpre); | ||
1833 | if (wolopts & WAKE_MAGIC) | ||
1834 | tmp |= comet_csr13_mpre; | ||
1835 | if (wolopts & WAKE_PHY) | ||
1836 | tmp |= comet_csr13_linkoffe | comet_csr13_linkone | comet_csr13_lsce; | ||
1837 | /* Clear the event flags */ | ||
1838 | tmp |= comet_csr13_wfr | comet_csr13_mpr | comet_csr13_lsc; | ||
1839 | iowrite32(tmp, ioaddr + CSR13); | ||
1840 | } | ||
1841 | } | ||
1842 | |||
1762 | #ifdef CONFIG_PM | 1843 | #ifdef CONFIG_PM |
1763 | 1844 | ||
1845 | |||
1764 | static int tulip_suspend (struct pci_dev *pdev, pm_message_t state) | 1846 | static int tulip_suspend (struct pci_dev *pdev, pm_message_t state) |
1765 | { | 1847 | { |
1848 | pci_power_t pstate; | ||
1766 | struct net_device *dev = pci_get_drvdata(pdev); | 1849 | struct net_device *dev = pci_get_drvdata(pdev); |
1850 | struct tulip_private *tp = netdev_priv(dev); | ||
1767 | 1851 | ||
1768 | if (!dev) | 1852 | if (!dev) |
1769 | return -EINVAL; | 1853 | return -EINVAL; |
@@ -1779,7 +1863,16 @@ static int tulip_suspend (struct pci_dev *pdev, pm_message_t state) | |||
1779 | save_state: | 1863 | save_state: |
1780 | pci_save_state(pdev); | 1864 | pci_save_state(pdev); |
1781 | pci_disable_device(pdev); | 1865 | pci_disable_device(pdev); |
1782 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 1866 | pstate = pci_choose_state(pdev, state); |
1867 | if (state.event == PM_EVENT_SUSPEND && pstate != PCI_D0) { | ||
1868 | int rc; | ||
1869 | |||
1870 | tulip_set_wolopts(pdev, tp->wolinfo.wolopts); | ||
1871 | rc = pci_enable_wake(pdev, pstate, tp->wolinfo.wolopts); | ||
1872 | if (rc) | ||
1873 | printk("tulip: pci_enable_wake failed (%d)\n", rc); | ||
1874 | } | ||
1875 | pci_set_power_state(pdev, pstate); | ||
1783 | 1876 | ||
1784 | return 0; | 1877 | return 0; |
1785 | } | 1878 | } |
@@ -1788,7 +1881,10 @@ save_state: | |||
1788 | static int tulip_resume(struct pci_dev *pdev) | 1881 | static int tulip_resume(struct pci_dev *pdev) |
1789 | { | 1882 | { |
1790 | struct net_device *dev = pci_get_drvdata(pdev); | 1883 | struct net_device *dev = pci_get_drvdata(pdev); |
1884 | struct tulip_private *tp = netdev_priv(dev); | ||
1885 | void __iomem *ioaddr = tp->base_addr; | ||
1791 | int retval; | 1886 | int retval; |
1887 | unsigned int tmp; | ||
1792 | 1888 | ||
1793 | if (!dev) | 1889 | if (!dev) |
1794 | return -EINVAL; | 1890 | return -EINVAL; |
@@ -1809,6 +1905,18 @@ static int tulip_resume(struct pci_dev *pdev) | |||
1809 | return retval; | 1905 | return retval; |
1810 | } | 1906 | } |
1811 | 1907 | ||
1908 | if (tp->flags & COMET_PM) { | ||
1909 | pci_enable_wake(pdev, PCI_D3hot, 0); | ||
1910 | pci_enable_wake(pdev, PCI_D3cold, 0); | ||
1911 | |||
1912 | /* Clear the PMES flag */ | ||
1913 | tmp = ioread32(ioaddr + CSR20); | ||
1914 | tmp |= comet_csr20_pmes; | ||
1915 | iowrite32(tmp, ioaddr + CSR20); | ||
1916 | |||
1917 | /* Disable all wake-up events */ | ||
1918 | tulip_set_wolopts(pdev, 0); | ||
1919 | } | ||
1812 | netif_device_attach(dev); | 1920 | netif_device_attach(dev); |
1813 | 1921 | ||
1814 | if (netif_running(dev)) | 1922 | if (netif_running(dev)) |
diff --git a/drivers/net/typhoon.c b/drivers/net/typhoon.c index 22bde49262c0..2e50077ff450 100644 --- a/drivers/net/typhoon.c +++ b/drivers/net/typhoon.c | |||
@@ -255,7 +255,7 @@ struct typhoon_shared { | |||
255 | struct rx_free rxBuff[RXFREE_ENTRIES] __3xp_aligned; | 255 | struct rx_free rxBuff[RXFREE_ENTRIES] __3xp_aligned; |
256 | u32 zeroWord; | 256 | u32 zeroWord; |
257 | struct tx_desc txHi[TXHI_ENTRIES]; | 257 | struct tx_desc txHi[TXHI_ENTRIES]; |
258 | } __attribute__ ((packed)); | 258 | } __packed; |
259 | 259 | ||
260 | struct rxbuff_ent { | 260 | struct rxbuff_ent { |
261 | struct sk_buff *skb; | 261 | struct sk_buff *skb; |
diff --git a/drivers/net/typhoon.h b/drivers/net/typhoon.h index 673fd5125914..88187fc84aa3 100644 --- a/drivers/net/typhoon.h +++ b/drivers/net/typhoon.h | |||
@@ -77,7 +77,7 @@ struct typhoon_indexes { | |||
77 | volatile __le32 cmdCleared; | 77 | volatile __le32 cmdCleared; |
78 | volatile __le32 respReady; | 78 | volatile __le32 respReady; |
79 | volatile __le32 rxHiReady; | 79 | volatile __le32 rxHiReady; |
80 | } __attribute__ ((packed)); | 80 | } __packed; |
81 | 81 | ||
82 | /* The host<->Typhoon interface | 82 | /* The host<->Typhoon interface |
83 | * Our means of communicating where things are | 83 | * Our means of communicating where things are |
@@ -125,7 +125,7 @@ struct typhoon_interface { | |||
125 | __le32 rxHiAddr; | 125 | __le32 rxHiAddr; |
126 | __le32 rxHiAddrHi; | 126 | __le32 rxHiAddrHi; |
127 | __le32 rxHiSize; | 127 | __le32 rxHiSize; |
128 | } __attribute__ ((packed)); | 128 | } __packed; |
129 | 129 | ||
130 | /* The Typhoon transmit/fragment descriptor | 130 | /* The Typhoon transmit/fragment descriptor |
131 | * | 131 | * |
@@ -187,7 +187,7 @@ struct tx_desc { | |||
187 | #define TYPHOON_TX_PF_VLAN_MASK cpu_to_le32(0x0ffff000) | 187 | #define TYPHOON_TX_PF_VLAN_MASK cpu_to_le32(0x0ffff000) |
188 | #define TYPHOON_TX_PF_INTERNAL cpu_to_le32(0xf0000000) | 188 | #define TYPHOON_TX_PF_INTERNAL cpu_to_le32(0xf0000000) |
189 | #define TYPHOON_TX_PF_VLAN_TAG_SHIFT 12 | 189 | #define TYPHOON_TX_PF_VLAN_TAG_SHIFT 12 |
190 | } __attribute__ ((packed)); | 190 | } __packed; |
191 | 191 | ||
192 | /* The TCP Segmentation offload option descriptor | 192 | /* The TCP Segmentation offload option descriptor |
193 | * | 193 | * |
@@ -208,7 +208,7 @@ struct tcpopt_desc { | |||
208 | __le32 respAddrLo; | 208 | __le32 respAddrLo; |
209 | __le32 bytesTx; | 209 | __le32 bytesTx; |
210 | __le32 status; | 210 | __le32 status; |
211 | } __attribute__ ((packed)); | 211 | } __packed; |
212 | 212 | ||
213 | /* The IPSEC Offload descriptor | 213 | /* The IPSEC Offload descriptor |
214 | * | 214 | * |
@@ -227,7 +227,7 @@ struct ipsec_desc { | |||
227 | __le32 sa1; | 227 | __le32 sa1; |
228 | __le32 sa2; | 228 | __le32 sa2; |
229 | __le32 reserved; | 229 | __le32 reserved; |
230 | } __attribute__ ((packed)); | 230 | } __packed; |
231 | 231 | ||
232 | /* The Typhoon receive descriptor (Updated by NIC) | 232 | /* The Typhoon receive descriptor (Updated by NIC) |
233 | * | 233 | * |
@@ -284,7 +284,7 @@ struct rx_desc { | |||
284 | #define TYPHOON_RX_UNKNOWN_SA cpu_to_le16(0x0100) | 284 | #define TYPHOON_RX_UNKNOWN_SA cpu_to_le16(0x0100) |
285 | #define TYPHOON_RX_ESP_FORMAT_ERR cpu_to_le16(0x0200) | 285 | #define TYPHOON_RX_ESP_FORMAT_ERR cpu_to_le16(0x0200) |
286 | __be32 vlanTag; | 286 | __be32 vlanTag; |
287 | } __attribute__ ((packed)); | 287 | } __packed; |
288 | 288 | ||
289 | /* The Typhoon free buffer descriptor, used to give a buffer to the NIC | 289 | /* The Typhoon free buffer descriptor, used to give a buffer to the NIC |
290 | * | 290 | * |
@@ -301,7 +301,7 @@ struct rx_free { | |||
301 | __le32 physAddrHi; | 301 | __le32 physAddrHi; |
302 | u32 virtAddr; | 302 | u32 virtAddr; |
303 | u32 virtAddrHi; | 303 | u32 virtAddrHi; |
304 | } __attribute__ ((packed)); | 304 | } __packed; |
305 | 305 | ||
306 | /* The Typhoon command descriptor, used for commands and responses | 306 | /* The Typhoon command descriptor, used for commands and responses |
307 | * | 307 | * |
@@ -347,7 +347,7 @@ struct cmd_desc { | |||
347 | __le16 parm1; | 347 | __le16 parm1; |
348 | __le32 parm2; | 348 | __le32 parm2; |
349 | __le32 parm3; | 349 | __le32 parm3; |
350 | } __attribute__ ((packed)); | 350 | } __packed; |
351 | 351 | ||
352 | /* The Typhoon response descriptor, see command descriptor for details | 352 | /* The Typhoon response descriptor, see command descriptor for details |
353 | */ | 353 | */ |
@@ -359,7 +359,7 @@ struct resp_desc { | |||
359 | __le16 parm1; | 359 | __le16 parm1; |
360 | __le32 parm2; | 360 | __le32 parm2; |
361 | __le32 parm3; | 361 | __le32 parm3; |
362 | } __attribute__ ((packed)); | 362 | } __packed; |
363 | 363 | ||
364 | #define INIT_COMMAND_NO_RESPONSE(x, command) \ | 364 | #define INIT_COMMAND_NO_RESPONSE(x, command) \ |
365 | do { struct cmd_desc *_ptr = (x); \ | 365 | do { struct cmd_desc *_ptr = (x); \ |
@@ -427,7 +427,7 @@ struct stats_resp { | |||
427 | #define TYPHOON_LINK_HALF_DUPLEX cpu_to_le32(0x00000000) | 427 | #define TYPHOON_LINK_HALF_DUPLEX cpu_to_le32(0x00000000) |
428 | __le32 unused2; | 428 | __le32 unused2; |
429 | __le32 unused3; | 429 | __le32 unused3; |
430 | } __attribute__ ((packed)); | 430 | } __packed; |
431 | 431 | ||
432 | /* TYPHOON_CMD_XCVR_SELECT xcvr values (resp.parm1) | 432 | /* TYPHOON_CMD_XCVR_SELECT xcvr values (resp.parm1) |
433 | */ | 433 | */ |
@@ -488,7 +488,7 @@ struct sa_descriptor { | |||
488 | u32 index; | 488 | u32 index; |
489 | u32 unused; | 489 | u32 unused; |
490 | u32 unused2; | 490 | u32 unused2; |
491 | } __attribute__ ((packed)); | 491 | } __packed; |
492 | 492 | ||
493 | /* TYPHOON_CMD_SET_OFFLOAD_TASKS bits (cmd.parm2 (Tx) & cmd.parm3 (Rx)) | 493 | /* TYPHOON_CMD_SET_OFFLOAD_TASKS bits (cmd.parm2 (Tx) & cmd.parm3 (Rx)) |
494 | * This is all for IPv4. | 494 | * This is all for IPv4. |
@@ -518,14 +518,14 @@ struct typhoon_file_header { | |||
518 | __le32 numSections; | 518 | __le32 numSections; |
519 | __le32 startAddr; | 519 | __le32 startAddr; |
520 | __le32 hmacDigest[5]; | 520 | __le32 hmacDigest[5]; |
521 | } __attribute__ ((packed)); | 521 | } __packed; |
522 | 522 | ||
523 | struct typhoon_section_header { | 523 | struct typhoon_section_header { |
524 | __le32 len; | 524 | __le32 len; |
525 | u16 checksum; | 525 | u16 checksum; |
526 | u16 reserved; | 526 | u16 reserved; |
527 | __le32 startAddr; | 527 | __le32 startAddr; |
528 | } __attribute__ ((packed)); | 528 | } __packed; |
529 | 529 | ||
530 | /* The Typhoon Register offsets | 530 | /* The Typhoon Register offsets |
531 | */ | 531 | */ |
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h index ef1fbeb11c6e..05a95586f3c5 100644 --- a/drivers/net/ucc_geth.h +++ b/drivers/net/ucc_geth.h | |||
@@ -106,7 +106,7 @@ struct ucc_geth { | |||
106 | u32 scar; /* Statistics carry register */ | 106 | u32 scar; /* Statistics carry register */ |
107 | u32 scam; /* Statistics caryy mask register */ | 107 | u32 scam; /* Statistics caryy mask register */ |
108 | u8 res5[0x200 - 0x1c4]; | 108 | u8 res5[0x200 - 0x1c4]; |
109 | } __attribute__ ((packed)); | 109 | } __packed; |
110 | 110 | ||
111 | /* UCC GETH TEMODR Register */ | 111 | /* UCC GETH TEMODR Register */ |
112 | #define TEMODER_TX_RMON_STATISTICS_ENABLE 0x0100 /* enable Tx statistics | 112 | #define TEMODER_TX_RMON_STATISTICS_ENABLE 0x0100 /* enable Tx statistics |
@@ -420,11 +420,11 @@ struct ucc_geth { | |||
420 | 420 | ||
421 | struct ucc_geth_thread_data_tx { | 421 | struct ucc_geth_thread_data_tx { |
422 | u8 res0[104]; | 422 | u8 res0[104]; |
423 | } __attribute__ ((packed)); | 423 | } __packed; |
424 | 424 | ||
425 | struct ucc_geth_thread_data_rx { | 425 | struct ucc_geth_thread_data_rx { |
426 | u8 res0[40]; | 426 | u8 res0[40]; |
427 | } __attribute__ ((packed)); | 427 | } __packed; |
428 | 428 | ||
429 | /* Send Queue Queue-Descriptor */ | 429 | /* Send Queue Queue-Descriptor */ |
430 | struct ucc_geth_send_queue_qd { | 430 | struct ucc_geth_send_queue_qd { |
@@ -432,19 +432,19 @@ struct ucc_geth_send_queue_qd { | |||
432 | u8 res0[0x8]; | 432 | u8 res0[0x8]; |
433 | u32 last_bd_completed_address;/* initialize to last entry in BD ring */ | 433 | u32 last_bd_completed_address;/* initialize to last entry in BD ring */ |
434 | u8 res1[0x30]; | 434 | u8 res1[0x30]; |
435 | } __attribute__ ((packed)); | 435 | } __packed; |
436 | 436 | ||
437 | struct ucc_geth_send_queue_mem_region { | 437 | struct ucc_geth_send_queue_mem_region { |
438 | struct ucc_geth_send_queue_qd sqqd[NUM_TX_QUEUES]; | 438 | struct ucc_geth_send_queue_qd sqqd[NUM_TX_QUEUES]; |
439 | } __attribute__ ((packed)); | 439 | } __packed; |
440 | 440 | ||
441 | struct ucc_geth_thread_tx_pram { | 441 | struct ucc_geth_thread_tx_pram { |
442 | u8 res0[64]; | 442 | u8 res0[64]; |
443 | } __attribute__ ((packed)); | 443 | } __packed; |
444 | 444 | ||
445 | struct ucc_geth_thread_rx_pram { | 445 | struct ucc_geth_thread_rx_pram { |
446 | u8 res0[128]; | 446 | u8 res0[128]; |
447 | } __attribute__ ((packed)); | 447 | } __packed; |
448 | 448 | ||
449 | #define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING 64 | 449 | #define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING 64 |
450 | #define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_8 64 | 450 | #define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_8 64 |
@@ -484,7 +484,7 @@ struct ucc_geth_scheduler { | |||
484 | /**< weight factor for queues */ | 484 | /**< weight factor for queues */ |
485 | u32 minw; /* temporary variable handled by QE */ | 485 | u32 minw; /* temporary variable handled by QE */ |
486 | u8 res1[0x70 - 0x64]; | 486 | u8 res1[0x70 - 0x64]; |
487 | } __attribute__ ((packed)); | 487 | } __packed; |
488 | 488 | ||
489 | struct ucc_geth_tx_firmware_statistics_pram { | 489 | struct ucc_geth_tx_firmware_statistics_pram { |
490 | u32 sicoltx; /* single collision */ | 490 | u32 sicoltx; /* single collision */ |
@@ -506,7 +506,7 @@ struct ucc_geth_tx_firmware_statistics_pram { | |||
506 | and 1518 octets */ | 506 | and 1518 octets */ |
507 | u32 txpktsjumbo; /* total packets (including bad) between 1024 | 507 | u32 txpktsjumbo; /* total packets (including bad) between 1024 |
508 | and MAXLength octets */ | 508 | and MAXLength octets */ |
509 | } __attribute__ ((packed)); | 509 | } __packed; |
510 | 510 | ||
511 | struct ucc_geth_rx_firmware_statistics_pram { | 511 | struct ucc_geth_rx_firmware_statistics_pram { |
512 | u32 frrxfcser; /* frames with crc error */ | 512 | u32 frrxfcser; /* frames with crc error */ |
@@ -540,7 +540,7 @@ struct ucc_geth_rx_firmware_statistics_pram { | |||
540 | replaced */ | 540 | replaced */ |
541 | u32 insertvlan; /* total frames that had their VLAN tag | 541 | u32 insertvlan; /* total frames that had their VLAN tag |
542 | inserted */ | 542 | inserted */ |
543 | } __attribute__ ((packed)); | 543 | } __packed; |
544 | 544 | ||
545 | struct ucc_geth_rx_interrupt_coalescing_entry { | 545 | struct ucc_geth_rx_interrupt_coalescing_entry { |
546 | u32 interruptcoalescingmaxvalue; /* interrupt coalescing max | 546 | u32 interruptcoalescingmaxvalue; /* interrupt coalescing max |
@@ -548,23 +548,23 @@ struct ucc_geth_rx_interrupt_coalescing_entry { | |||
548 | u32 interruptcoalescingcounter; /* interrupt coalescing counter, | 548 | u32 interruptcoalescingcounter; /* interrupt coalescing counter, |
549 | initialize to | 549 | initialize to |
550 | interruptcoalescingmaxvalue */ | 550 | interruptcoalescingmaxvalue */ |
551 | } __attribute__ ((packed)); | 551 | } __packed; |
552 | 552 | ||
553 | struct ucc_geth_rx_interrupt_coalescing_table { | 553 | struct ucc_geth_rx_interrupt_coalescing_table { |
554 | struct ucc_geth_rx_interrupt_coalescing_entry coalescingentry[NUM_RX_QUEUES]; | 554 | struct ucc_geth_rx_interrupt_coalescing_entry coalescingentry[NUM_RX_QUEUES]; |
555 | /**< interrupt coalescing entry */ | 555 | /**< interrupt coalescing entry */ |
556 | } __attribute__ ((packed)); | 556 | } __packed; |
557 | 557 | ||
558 | struct ucc_geth_rx_prefetched_bds { | 558 | struct ucc_geth_rx_prefetched_bds { |
559 | struct qe_bd bd[NUM_BDS_IN_PREFETCHED_BDS]; /* prefetched bd */ | 559 | struct qe_bd bd[NUM_BDS_IN_PREFETCHED_BDS]; /* prefetched bd */ |
560 | } __attribute__ ((packed)); | 560 | } __packed; |
561 | 561 | ||
562 | struct ucc_geth_rx_bd_queues_entry { | 562 | struct ucc_geth_rx_bd_queues_entry { |
563 | u32 bdbaseptr; /* BD base pointer */ | 563 | u32 bdbaseptr; /* BD base pointer */ |
564 | u32 bdptr; /* BD pointer */ | 564 | u32 bdptr; /* BD pointer */ |
565 | u32 externalbdbaseptr; /* external BD base pointer */ | 565 | u32 externalbdbaseptr; /* external BD base pointer */ |
566 | u32 externalbdptr; /* external BD pointer */ | 566 | u32 externalbdptr; /* external BD pointer */ |
567 | } __attribute__ ((packed)); | 567 | } __packed; |
568 | 568 | ||
569 | struct ucc_geth_tx_global_pram { | 569 | struct ucc_geth_tx_global_pram { |
570 | u16 temoder; | 570 | u16 temoder; |
@@ -580,13 +580,13 @@ struct ucc_geth_tx_global_pram { | |||
580 | u32 tqptr; /* a base pointer to the Tx Queues Memory | 580 | u32 tqptr; /* a base pointer to the Tx Queues Memory |
581 | Region */ | 581 | Region */ |
582 | u8 res2[0x80 - 0x74]; | 582 | u8 res2[0x80 - 0x74]; |
583 | } __attribute__ ((packed)); | 583 | } __packed; |
584 | 584 | ||
585 | /* structure representing Extended Filtering Global Parameters in PRAM */ | 585 | /* structure representing Extended Filtering Global Parameters in PRAM */ |
586 | struct ucc_geth_exf_global_pram { | 586 | struct ucc_geth_exf_global_pram { |
587 | u32 l2pcdptr; /* individual address filter, high */ | 587 | u32 l2pcdptr; /* individual address filter, high */ |
588 | u8 res0[0x10 - 0x04]; | 588 | u8 res0[0x10 - 0x04]; |
589 | } __attribute__ ((packed)); | 589 | } __packed; |
590 | 590 | ||
591 | struct ucc_geth_rx_global_pram { | 591 | struct ucc_geth_rx_global_pram { |
592 | u32 remoder; /* ethernet mode reg. */ | 592 | u32 remoder; /* ethernet mode reg. */ |
@@ -620,7 +620,7 @@ struct ucc_geth_rx_global_pram { | |||
620 | u32 exfGlobalParam; /* base address for extended filtering global | 620 | u32 exfGlobalParam; /* base address for extended filtering global |
621 | parameters */ | 621 | parameters */ |
622 | u8 res6[0x100 - 0xC4]; /* Initialize to zero */ | 622 | u8 res6[0x100 - 0xC4]; /* Initialize to zero */ |
623 | } __attribute__ ((packed)); | 623 | } __packed; |
624 | 624 | ||
625 | #define GRACEFUL_STOP_ACKNOWLEDGE_RX 0x01 | 625 | #define GRACEFUL_STOP_ACKNOWLEDGE_RX 0x01 |
626 | 626 | ||
@@ -639,7 +639,7 @@ struct ucc_geth_init_pram { | |||
639 | u32 txglobal; /* tx global */ | 639 | u32 txglobal; /* tx global */ |
640 | u32 txthread[ENET_INIT_PARAM_MAX_ENTRIES_TX]; /* tx threads */ | 640 | u32 txthread[ENET_INIT_PARAM_MAX_ENTRIES_TX]; /* tx threads */ |
641 | u8 res3[0x1]; | 641 | u8 res3[0x1]; |
642 | } __attribute__ ((packed)); | 642 | } __packed; |
643 | 643 | ||
644 | #define ENET_INIT_PARAM_RGF_SHIFT (32 - 4) | 644 | #define ENET_INIT_PARAM_RGF_SHIFT (32 - 4) |
645 | #define ENET_INIT_PARAM_TGF_SHIFT (32 - 8) | 645 | #define ENET_INIT_PARAM_TGF_SHIFT (32 - 8) |
@@ -661,7 +661,7 @@ struct ucc_geth_82xx_enet_address { | |||
661 | u16 h; /* address (MSB) */ | 661 | u16 h; /* address (MSB) */ |
662 | u16 m; /* address */ | 662 | u16 m; /* address */ |
663 | u16 l; /* address (LSB) */ | 663 | u16 l; /* address (LSB) */ |
664 | } __attribute__ ((packed)); | 664 | } __packed; |
665 | 665 | ||
666 | /* structure representing 82xx Address Filtering PRAM */ | 666 | /* structure representing 82xx Address Filtering PRAM */ |
667 | struct ucc_geth_82xx_address_filtering_pram { | 667 | struct ucc_geth_82xx_address_filtering_pram { |
@@ -672,7 +672,7 @@ struct ucc_geth_82xx_address_filtering_pram { | |||
672 | struct ucc_geth_82xx_enet_address __iomem taddr; | 672 | struct ucc_geth_82xx_enet_address __iomem taddr; |
673 | struct ucc_geth_82xx_enet_address __iomem paddr[NUM_OF_PADDRS]; | 673 | struct ucc_geth_82xx_enet_address __iomem paddr[NUM_OF_PADDRS]; |
674 | u8 res0[0x40 - 0x38]; | 674 | u8 res0[0x40 - 0x38]; |
675 | } __attribute__ ((packed)); | 675 | } __packed; |
676 | 676 | ||
677 | /* GETH Tx firmware statistics structure, used when calling | 677 | /* GETH Tx firmware statistics structure, used when calling |
678 | UCC_GETH_GetStatistics. */ | 678 | UCC_GETH_GetStatistics. */ |
@@ -696,7 +696,7 @@ struct ucc_geth_tx_firmware_statistics { | |||
696 | and 1518 octets */ | 696 | and 1518 octets */ |
697 | u32 txpktsjumbo; /* total packets (including bad) between 1024 | 697 | u32 txpktsjumbo; /* total packets (including bad) between 1024 |
698 | and MAXLength octets */ | 698 | and MAXLength octets */ |
699 | } __attribute__ ((packed)); | 699 | } __packed; |
700 | 700 | ||
701 | /* GETH Rx firmware statistics structure, used when calling | 701 | /* GETH Rx firmware statistics structure, used when calling |
702 | UCC_GETH_GetStatistics. */ | 702 | UCC_GETH_GetStatistics. */ |
@@ -732,7 +732,7 @@ struct ucc_geth_rx_firmware_statistics { | |||
732 | replaced */ | 732 | replaced */ |
733 | u32 insertvlan; /* total frames that had their VLAN tag | 733 | u32 insertvlan; /* total frames that had their VLAN tag |
734 | inserted */ | 734 | inserted */ |
735 | } __attribute__ ((packed)); | 735 | } __packed; |
736 | 736 | ||
737 | /* GETH hardware statistics structure, used when calling | 737 | /* GETH hardware statistics structure, used when calling |
738 | UCC_GETH_GetStatistics. */ | 738 | UCC_GETH_GetStatistics. */ |
@@ -781,7 +781,7 @@ struct ucc_geth_hardware_statistics { | |||
781 | u32 rbca; /* Total number of frames received successfully | 781 | u32 rbca; /* Total number of frames received successfully |
782 | that had destination address equal to the | 782 | that had destination address equal to the |
783 | broadcast address */ | 783 | broadcast address */ |
784 | } __attribute__ ((packed)); | 784 | } __packed; |
785 | 785 | ||
786 | /* UCC GETH Tx errors returned via TxConf callback */ | 786 | /* UCC GETH Tx errors returned via TxConf callback */ |
787 | #define TX_ERRORS_DEF 0x0200 | 787 | #define TX_ERRORS_DEF 0x0200 |
diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c index 9516f382a6ba..aea4645be7f6 100644 --- a/drivers/net/usb/asix.c +++ b/drivers/net/usb/asix.c | |||
@@ -179,7 +179,7 @@ struct ax88172_int_data { | |||
179 | __le16 res2; | 179 | __le16 res2; |
180 | u8 status; | 180 | u8 status; |
181 | __le16 res3; | 181 | __le16 res3; |
182 | } __attribute__ ((packed)); | 182 | } __packed; |
183 | 183 | ||
184 | static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, | 184 | static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, |
185 | u16 size, void *data) | 185 | u16 size, void *data) |
diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c index 0a3c41faea9c..c8570b097880 100644 --- a/drivers/net/usb/hso.c +++ b/drivers/net/usb/hso.c | |||
@@ -211,7 +211,7 @@ struct hso_serial_state_notification { | |||
211 | u16 wIndex; | 211 | u16 wIndex; |
212 | u16 wLength; | 212 | u16 wLength; |
213 | u16 UART_state_bitmap; | 213 | u16 UART_state_bitmap; |
214 | } __attribute__((packed)); | 214 | } __packed; |
215 | 215 | ||
216 | struct hso_tiocmget { | 216 | struct hso_tiocmget { |
217 | struct mutex mutex; | 217 | struct mutex mutex; |
diff --git a/drivers/net/usb/kaweth.c b/drivers/net/usb/kaweth.c index d6078b8c4273..2b7b39cad1ce 100644 --- a/drivers/net/usb/kaweth.c +++ b/drivers/net/usb/kaweth.c | |||
@@ -207,7 +207,7 @@ struct kaweth_ethernet_configuration | |||
207 | __le16 segment_size; | 207 | __le16 segment_size; |
208 | __u16 max_multicast_filters; | 208 | __u16 max_multicast_filters; |
209 | __u8 reserved3; | 209 | __u8 reserved3; |
210 | } __attribute__ ((packed)); | 210 | } __packed; |
211 | 211 | ||
212 | /**************************************************************** | 212 | /**************************************************************** |
213 | * kaweth_device | 213 | * kaweth_device |
diff --git a/drivers/net/usb/net1080.c b/drivers/net/usb/net1080.c index 961a8ed38d8f..ba72a7281cb0 100644 --- a/drivers/net/usb/net1080.c +++ b/drivers/net/usb/net1080.c | |||
@@ -64,13 +64,13 @@ struct nc_header { // packed: | |||
64 | // all else is optional, and must start with: | 64 | // all else is optional, and must start with: |
65 | // __le16 vendorId; // from usb-if | 65 | // __le16 vendorId; // from usb-if |
66 | // __le16 productId; | 66 | // __le16 productId; |
67 | } __attribute__((__packed__)); | 67 | } __packed; |
68 | 68 | ||
69 | #define PAD_BYTE ((unsigned char)0xAC) | 69 | #define PAD_BYTE ((unsigned char)0xAC) |
70 | 70 | ||
71 | struct nc_trailer { | 71 | struct nc_trailer { |
72 | __le16 packet_id; | 72 | __le16 packet_id; |
73 | } __attribute__((__packed__)); | 73 | } __packed; |
74 | 74 | ||
75 | // packets may use FLAG_FRAMING_NC and optional pad | 75 | // packets may use FLAG_FRAMING_NC and optional pad |
76 | #define FRAMED_SIZE(mtu) (sizeof (struct nc_header) \ | 76 | #define FRAMED_SIZE(mtu) (sizeof (struct nc_header) \ |
diff --git a/drivers/net/usb/sierra_net.c b/drivers/net/usb/sierra_net.c index f1942d69a0d5..ee85c8b9a858 100644 --- a/drivers/net/usb/sierra_net.c +++ b/drivers/net/usb/sierra_net.c | |||
@@ -165,7 +165,7 @@ struct lsi_umts { | |||
165 | u8 gw_addr_len; /* NW-supplied GW address len */ | 165 | u8 gw_addr_len; /* NW-supplied GW address len */ |
166 | u8 gw_addr[16]; /* NW-supplied GW address (bigendian) */ | 166 | u8 gw_addr[16]; /* NW-supplied GW address (bigendian) */ |
167 | u8 reserved[8]; | 167 | u8 reserved[8]; |
168 | } __attribute__ ((packed)); | 168 | } __packed; |
169 | 169 | ||
170 | #define SIERRA_NET_LSI_COMMON_LEN 4 | 170 | #define SIERRA_NET_LSI_COMMON_LEN 4 |
171 | #define SIERRA_NET_LSI_UMTS_LEN (sizeof(struct lsi_umts)) | 171 | #define SIERRA_NET_LSI_UMTS_LEN (sizeof(struct lsi_umts)) |
diff --git a/drivers/net/via-velocity.h b/drivers/net/via-velocity.h index c38191179fae..f7b33ae7a703 100644 --- a/drivers/net/via-velocity.h +++ b/drivers/net/via-velocity.h | |||
@@ -193,7 +193,7 @@ struct rx_desc { | |||
193 | __le32 pa_low; /* Low 32 bit PCI address */ | 193 | __le32 pa_low; /* Low 32 bit PCI address */ |
194 | __le16 pa_high; /* Next 16 bit PCI address (48 total) */ | 194 | __le16 pa_high; /* Next 16 bit PCI address (48 total) */ |
195 | __le16 size; /* bits 0--14 - frame size, bit 15 - enable int. */ | 195 | __le16 size; /* bits 0--14 - frame size, bit 15 - enable int. */ |
196 | } __attribute__ ((__packed__)); | 196 | } __packed; |
197 | 197 | ||
198 | /* | 198 | /* |
199 | * Transmit descriptor | 199 | * Transmit descriptor |
@@ -208,7 +208,7 @@ struct tdesc1 { | |||
208 | __le16 vlan; | 208 | __le16 vlan; |
209 | u8 TCR; | 209 | u8 TCR; |
210 | u8 cmd; /* bits 0--1 - TCPLS, bits 4--7 - CMDZ */ | 210 | u8 cmd; /* bits 0--1 - TCPLS, bits 4--7 - CMDZ */ |
211 | } __attribute__ ((__packed__)); | 211 | } __packed; |
212 | 212 | ||
213 | enum { | 213 | enum { |
214 | TD_QUEUE = cpu_to_le16(0x8000) | 214 | TD_QUEUE = cpu_to_le16(0x8000) |
@@ -218,7 +218,7 @@ struct td_buf { | |||
218 | __le32 pa_low; | 218 | __le32 pa_low; |
219 | __le16 pa_high; | 219 | __le16 pa_high; |
220 | __le16 size; /* bits 0--13 - size, bit 15 - queue */ | 220 | __le16 size; /* bits 0--13 - size, bit 15 - queue */ |
221 | } __attribute__ ((__packed__)); | 221 | } __packed; |
222 | 222 | ||
223 | struct tx_desc { | 223 | struct tx_desc { |
224 | struct tdesc0 tdesc0; | 224 | struct tdesc0 tdesc0; |
@@ -1096,7 +1096,7 @@ struct mac_regs { | |||
1096 | 1096 | ||
1097 | volatile __le16 PatternCRC[8]; /* 0xB0 */ | 1097 | volatile __le16 PatternCRC[8]; /* 0xB0 */ |
1098 | volatile __le32 ByteMask[4][4]; /* 0xC0 */ | 1098 | volatile __le32 ByteMask[4][4]; /* 0xC0 */ |
1099 | } __attribute__ ((__packed__)); | 1099 | } __packed; |
1100 | 1100 | ||
1101 | 1101 | ||
1102 | enum hw_mib { | 1102 | enum hw_mib { |
@@ -1216,7 +1216,7 @@ struct arp_packet { | |||
1216 | u8 ar_sip[4]; | 1216 | u8 ar_sip[4]; |
1217 | u8 ar_tha[ETH_ALEN]; | 1217 | u8 ar_tha[ETH_ALEN]; |
1218 | u8 ar_tip[4]; | 1218 | u8 ar_tip[4]; |
1219 | } __attribute__ ((__packed__)); | 1219 | } __packed; |
1220 | 1220 | ||
1221 | struct _magic_packet { | 1221 | struct _magic_packet { |
1222 | u8 dest_mac[6]; | 1222 | u8 dest_mac[6]; |
@@ -1224,7 +1224,7 @@ struct _magic_packet { | |||
1224 | __be16 type; | 1224 | __be16 type; |
1225 | u8 MAC[16][6]; | 1225 | u8 MAC[16][6]; |
1226 | u8 password[6]; | 1226 | u8 password[6]; |
1227 | } __attribute__ ((__packed__)); | 1227 | } __packed; |
1228 | 1228 | ||
1229 | /* | 1229 | /* |
1230 | * Store for chip context when saving and restoring status. Not | 1230 | * Store for chip context when saving and restoring status. Not |
diff --git a/drivers/net/vxge/vxge-main.c b/drivers/net/vxge/vxge-main.c index b504bd561362..45c5dc225631 100644 --- a/drivers/net/vxge/vxge-main.c +++ b/drivers/net/vxge/vxge-main.c | |||
@@ -4012,7 +4012,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4012 | int high_dma = 0; | 4012 | int high_dma = 0; |
4013 | u64 vpath_mask = 0; | 4013 | u64 vpath_mask = 0; |
4014 | struct vxgedev *vdev; | 4014 | struct vxgedev *vdev; |
4015 | struct vxge_config ll_config; | 4015 | struct vxge_config *ll_config = NULL; |
4016 | struct vxge_hw_device_config *device_config = NULL; | 4016 | struct vxge_hw_device_config *device_config = NULL; |
4017 | struct vxge_hw_device_attr attr; | 4017 | struct vxge_hw_device_attr attr; |
4018 | int i, j, no_of_vpath = 0, max_vpath_supported = 0; | 4018 | int i, j, no_of_vpath = 0, max_vpath_supported = 0; |
@@ -4071,17 +4071,24 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4071 | goto _exit0; | 4071 | goto _exit0; |
4072 | } | 4072 | } |
4073 | 4073 | ||
4074 | memset(&ll_config, 0, sizeof(struct vxge_config)); | 4074 | ll_config = kzalloc(sizeof(*ll_config), GFP_KERNEL); |
4075 | ll_config.tx_steering_type = TX_MULTIQ_STEERING; | 4075 | if (!ll_config) { |
4076 | ll_config.intr_type = MSI_X; | 4076 | ret = -ENOMEM; |
4077 | ll_config.napi_weight = NEW_NAPI_WEIGHT; | 4077 | vxge_debug_init(VXGE_ERR, |
4078 | ll_config.rth_steering = RTH_STEERING; | 4078 | "ll_config : malloc failed %s %d", |
4079 | __FILE__, __LINE__); | ||
4080 | goto _exit0; | ||
4081 | } | ||
4082 | ll_config->tx_steering_type = TX_MULTIQ_STEERING; | ||
4083 | ll_config->intr_type = MSI_X; | ||
4084 | ll_config->napi_weight = NEW_NAPI_WEIGHT; | ||
4085 | ll_config->rth_steering = RTH_STEERING; | ||
4079 | 4086 | ||
4080 | /* get the default configuration parameters */ | 4087 | /* get the default configuration parameters */ |
4081 | vxge_hw_device_config_default_get(device_config); | 4088 | vxge_hw_device_config_default_get(device_config); |
4082 | 4089 | ||
4083 | /* initialize configuration parameters */ | 4090 | /* initialize configuration parameters */ |
4084 | vxge_device_config_init(device_config, &ll_config.intr_type); | 4091 | vxge_device_config_init(device_config, &ll_config->intr_type); |
4085 | 4092 | ||
4086 | ret = pci_enable_device(pdev); | 4093 | ret = pci_enable_device(pdev); |
4087 | if (ret) { | 4094 | if (ret) { |
@@ -4134,7 +4141,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4134 | (unsigned long long)pci_resource_start(pdev, 0)); | 4141 | (unsigned long long)pci_resource_start(pdev, 0)); |
4135 | 4142 | ||
4136 | status = vxge_hw_device_hw_info_get(attr.bar0, | 4143 | status = vxge_hw_device_hw_info_get(attr.bar0, |
4137 | &ll_config.device_hw_info); | 4144 | &ll_config->device_hw_info); |
4138 | if (status != VXGE_HW_OK) { | 4145 | if (status != VXGE_HW_OK) { |
4139 | vxge_debug_init(VXGE_ERR, | 4146 | vxge_debug_init(VXGE_ERR, |
4140 | "%s: Reading of hardware info failed." | 4147 | "%s: Reading of hardware info failed." |
@@ -4143,7 +4150,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4143 | goto _exit3; | 4150 | goto _exit3; |
4144 | } | 4151 | } |
4145 | 4152 | ||
4146 | if (ll_config.device_hw_info.fw_version.major != | 4153 | if (ll_config->device_hw_info.fw_version.major != |
4147 | VXGE_DRIVER_FW_VERSION_MAJOR) { | 4154 | VXGE_DRIVER_FW_VERSION_MAJOR) { |
4148 | vxge_debug_init(VXGE_ERR, | 4155 | vxge_debug_init(VXGE_ERR, |
4149 | "%s: Incorrect firmware version." | 4156 | "%s: Incorrect firmware version." |
@@ -4153,7 +4160,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4153 | goto _exit3; | 4160 | goto _exit3; |
4154 | } | 4161 | } |
4155 | 4162 | ||
4156 | vpath_mask = ll_config.device_hw_info.vpath_mask; | 4163 | vpath_mask = ll_config->device_hw_info.vpath_mask; |
4157 | if (vpath_mask == 0) { | 4164 | if (vpath_mask == 0) { |
4158 | vxge_debug_ll_config(VXGE_TRACE, | 4165 | vxge_debug_ll_config(VXGE_TRACE, |
4159 | "%s: No vpaths available in device", VXGE_DRIVER_NAME); | 4166 | "%s: No vpaths available in device", VXGE_DRIVER_NAME); |
@@ -4165,10 +4172,10 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4165 | "%s:%d Vpath mask = %llx", __func__, __LINE__, | 4172 | "%s:%d Vpath mask = %llx", __func__, __LINE__, |
4166 | (unsigned long long)vpath_mask); | 4173 | (unsigned long long)vpath_mask); |
4167 | 4174 | ||
4168 | function_mode = ll_config.device_hw_info.function_mode; | 4175 | function_mode = ll_config->device_hw_info.function_mode; |
4169 | host_type = ll_config.device_hw_info.host_type; | 4176 | host_type = ll_config->device_hw_info.host_type; |
4170 | is_privileged = __vxge_hw_device_is_privilaged(host_type, | 4177 | is_privileged = __vxge_hw_device_is_privilaged(host_type, |
4171 | ll_config.device_hw_info.func_id); | 4178 | ll_config->device_hw_info.func_id); |
4172 | 4179 | ||
4173 | /* Check how many vpaths are available */ | 4180 | /* Check how many vpaths are available */ |
4174 | for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) { | 4181 | for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) { |
@@ -4182,7 +4189,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4182 | 4189 | ||
4183 | /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */ | 4190 | /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */ |
4184 | if (is_sriov(function_mode) && (max_config_dev > 1) && | 4191 | if (is_sriov(function_mode) && (max_config_dev > 1) && |
4185 | (ll_config.intr_type != INTA) && | 4192 | (ll_config->intr_type != INTA) && |
4186 | (is_privileged == VXGE_HW_OK)) { | 4193 | (is_privileged == VXGE_HW_OK)) { |
4187 | ret = pci_enable_sriov(pdev, ((max_config_dev - 1) < num_vfs) | 4194 | ret = pci_enable_sriov(pdev, ((max_config_dev - 1) < num_vfs) |
4188 | ? (max_config_dev - 1) : num_vfs); | 4195 | ? (max_config_dev - 1) : num_vfs); |
@@ -4195,7 +4202,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4195 | * Configure vpaths and get driver configured number of vpaths | 4202 | * Configure vpaths and get driver configured number of vpaths |
4196 | * which is less than or equal to the maximum vpaths per function. | 4203 | * which is less than or equal to the maximum vpaths per function. |
4197 | */ | 4204 | */ |
4198 | no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, &ll_config); | 4205 | no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config); |
4199 | if (!no_of_vpath) { | 4206 | if (!no_of_vpath) { |
4200 | vxge_debug_ll_config(VXGE_ERR, | 4207 | vxge_debug_ll_config(VXGE_ERR, |
4201 | "%s: No more vpaths to configure", VXGE_DRIVER_NAME); | 4208 | "%s: No more vpaths to configure", VXGE_DRIVER_NAME); |
@@ -4230,21 +4237,21 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4230 | /* set private device info */ | 4237 | /* set private device info */ |
4231 | pci_set_drvdata(pdev, hldev); | 4238 | pci_set_drvdata(pdev, hldev); |
4232 | 4239 | ||
4233 | ll_config.gro_enable = VXGE_GRO_ALWAYS_AGGREGATE; | 4240 | ll_config->gro_enable = VXGE_GRO_ALWAYS_AGGREGATE; |
4234 | ll_config.fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS; | 4241 | ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS; |
4235 | ll_config.addr_learn_en = addr_learn_en; | 4242 | ll_config->addr_learn_en = addr_learn_en; |
4236 | ll_config.rth_algorithm = RTH_ALG_JENKINS; | 4243 | ll_config->rth_algorithm = RTH_ALG_JENKINS; |
4237 | ll_config.rth_hash_type_tcpipv4 = VXGE_HW_RING_HASH_TYPE_TCP_IPV4; | 4244 | ll_config->rth_hash_type_tcpipv4 = VXGE_HW_RING_HASH_TYPE_TCP_IPV4; |
4238 | ll_config.rth_hash_type_ipv4 = VXGE_HW_RING_HASH_TYPE_NONE; | 4245 | ll_config->rth_hash_type_ipv4 = VXGE_HW_RING_HASH_TYPE_NONE; |
4239 | ll_config.rth_hash_type_tcpipv6 = VXGE_HW_RING_HASH_TYPE_NONE; | 4246 | ll_config->rth_hash_type_tcpipv6 = VXGE_HW_RING_HASH_TYPE_NONE; |
4240 | ll_config.rth_hash_type_ipv6 = VXGE_HW_RING_HASH_TYPE_NONE; | 4247 | ll_config->rth_hash_type_ipv6 = VXGE_HW_RING_HASH_TYPE_NONE; |
4241 | ll_config.rth_hash_type_tcpipv6ex = VXGE_HW_RING_HASH_TYPE_NONE; | 4248 | ll_config->rth_hash_type_tcpipv6ex = VXGE_HW_RING_HASH_TYPE_NONE; |
4242 | ll_config.rth_hash_type_ipv6ex = VXGE_HW_RING_HASH_TYPE_NONE; | 4249 | ll_config->rth_hash_type_ipv6ex = VXGE_HW_RING_HASH_TYPE_NONE; |
4243 | ll_config.rth_bkt_sz = RTH_BUCKET_SIZE; | 4250 | ll_config->rth_bkt_sz = RTH_BUCKET_SIZE; |
4244 | ll_config.tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE; | 4251 | ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE; |
4245 | ll_config.rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE; | 4252 | ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE; |
4246 | 4253 | ||
4247 | if (vxge_device_register(hldev, &ll_config, high_dma, no_of_vpath, | 4254 | if (vxge_device_register(hldev, ll_config, high_dma, no_of_vpath, |
4248 | &vdev)) { | 4255 | &vdev)) { |
4249 | ret = -EINVAL; | 4256 | ret = -EINVAL; |
4250 | goto _exit4; | 4257 | goto _exit4; |
@@ -4275,7 +4282,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4275 | vdev->vpaths[j].vdev = vdev; | 4282 | vdev->vpaths[j].vdev = vdev; |
4276 | vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath; | 4283 | vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath; |
4277 | memcpy((u8 *)vdev->vpaths[j].macaddr, | 4284 | memcpy((u8 *)vdev->vpaths[j].macaddr, |
4278 | (u8 *)ll_config.device_hw_info.mac_addrs[i], | 4285 | ll_config->device_hw_info.mac_addrs[i], |
4279 | ETH_ALEN); | 4286 | ETH_ALEN); |
4280 | 4287 | ||
4281 | /* Initialize the mac address list header */ | 4288 | /* Initialize the mac address list header */ |
@@ -4296,18 +4303,18 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4296 | 4303 | ||
4297 | macaddr = (u8 *)vdev->vpaths[0].macaddr; | 4304 | macaddr = (u8 *)vdev->vpaths[0].macaddr; |
4298 | 4305 | ||
4299 | ll_config.device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0'; | 4306 | ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0'; |
4300 | ll_config.device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0'; | 4307 | ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0'; |
4301 | ll_config.device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0'; | 4308 | ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0'; |
4302 | 4309 | ||
4303 | vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s", | 4310 | vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s", |
4304 | vdev->ndev->name, ll_config.device_hw_info.serial_number); | 4311 | vdev->ndev->name, ll_config->device_hw_info.serial_number); |
4305 | 4312 | ||
4306 | vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s", | 4313 | vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s", |
4307 | vdev->ndev->name, ll_config.device_hw_info.part_number); | 4314 | vdev->ndev->name, ll_config->device_hw_info.part_number); |
4308 | 4315 | ||
4309 | vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter", | 4316 | vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter", |
4310 | vdev->ndev->name, ll_config.device_hw_info.product_desc); | 4317 | vdev->ndev->name, ll_config->device_hw_info.product_desc); |
4311 | 4318 | ||
4312 | vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM", | 4319 | vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM", |
4313 | vdev->ndev->name, macaddr); | 4320 | vdev->ndev->name, macaddr); |
@@ -4317,11 +4324,11 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4317 | 4324 | ||
4318 | vxge_debug_init(VXGE_TRACE, | 4325 | vxge_debug_init(VXGE_TRACE, |
4319 | "%s: Firmware version : %s Date : %s", vdev->ndev->name, | 4326 | "%s: Firmware version : %s Date : %s", vdev->ndev->name, |
4320 | ll_config.device_hw_info.fw_version.version, | 4327 | ll_config->device_hw_info.fw_version.version, |
4321 | ll_config.device_hw_info.fw_date.date); | 4328 | ll_config->device_hw_info.fw_date.date); |
4322 | 4329 | ||
4323 | if (new_device) { | 4330 | if (new_device) { |
4324 | switch (ll_config.device_hw_info.function_mode) { | 4331 | switch (ll_config->device_hw_info.function_mode) { |
4325 | case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION: | 4332 | case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION: |
4326 | vxge_debug_init(VXGE_TRACE, | 4333 | vxge_debug_init(VXGE_TRACE, |
4327 | "%s: Single Function Mode Enabled", vdev->ndev->name); | 4334 | "%s: Single Function Mode Enabled", vdev->ndev->name); |
@@ -4344,7 +4351,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4344 | vxge_print_parm(vdev, vpath_mask); | 4351 | vxge_print_parm(vdev, vpath_mask); |
4345 | 4352 | ||
4346 | /* Store the fw version for ethttool option */ | 4353 | /* Store the fw version for ethttool option */ |
4347 | strcpy(vdev->fw_version, ll_config.device_hw_info.fw_version.version); | 4354 | strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version); |
4348 | memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN); | 4355 | memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN); |
4349 | memcpy(vdev->ndev->perm_addr, vdev->ndev->dev_addr, ETH_ALEN); | 4356 | memcpy(vdev->ndev->perm_addr, vdev->ndev->dev_addr, ETH_ALEN); |
4350 | 4357 | ||
@@ -4383,7 +4390,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4383 | * present to prevent such a failure. | 4390 | * present to prevent such a failure. |
4384 | */ | 4391 | */ |
4385 | 4392 | ||
4386 | if (ll_config.device_hw_info.function_mode == | 4393 | if (ll_config->device_hw_info.function_mode == |
4387 | VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION) | 4394 | VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION) |
4388 | if (vdev->config.intr_type == INTA) | 4395 | if (vdev->config.intr_type == INTA) |
4389 | vxge_hw_device_unmask_all(hldev); | 4396 | vxge_hw_device_unmask_all(hldev); |
@@ -4395,6 +4402,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4395 | VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev), | 4402 | VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev), |
4396 | vxge_hw_device_trace_level_get(hldev)); | 4403 | vxge_hw_device_trace_level_get(hldev)); |
4397 | 4404 | ||
4405 | kfree(ll_config); | ||
4398 | return 0; | 4406 | return 0; |
4399 | 4407 | ||
4400 | _exit5: | 4408 | _exit5: |
@@ -4412,6 +4420,7 @@ _exit2: | |||
4412 | _exit1: | 4420 | _exit1: |
4413 | pci_disable_device(pdev); | 4421 | pci_disable_device(pdev); |
4414 | _exit0: | 4422 | _exit0: |
4423 | kfree(ll_config); | ||
4415 | kfree(device_config); | 4424 | kfree(device_config); |
4416 | driver_config->config_dev_cnt--; | 4425 | driver_config->config_dev_cnt--; |
4417 | pci_set_drvdata(pdev, NULL); | 4426 | pci_set_drvdata(pdev, NULL); |
diff --git a/drivers/net/wan/farsync.c b/drivers/net/wan/farsync.c index e087b9a6daaa..43b77271532b 100644 --- a/drivers/net/wan/farsync.c +++ b/drivers/net/wan/farsync.c | |||
@@ -2038,16 +2038,10 @@ fst_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
2038 | 2038 | ||
2039 | /* Now copy the data to the card. */ | 2039 | /* Now copy the data to the card. */ |
2040 | 2040 | ||
2041 | buf = kmalloc(wrthdr.size, GFP_KERNEL); | 2041 | buf = memdup_user(ifr->ifr_data + sizeof(struct fstioc_write), |
2042 | if (!buf) | 2042 | wrthdr.size); |
2043 | return -ENOMEM; | 2043 | if (IS_ERR(buf)) |
2044 | 2044 | return PTR_ERR(buf); | |
2045 | if (copy_from_user(buf, | ||
2046 | ifr->ifr_data + sizeof (struct fstioc_write), | ||
2047 | wrthdr.size)) { | ||
2048 | kfree(buf); | ||
2049 | return -EFAULT; | ||
2050 | } | ||
2051 | 2045 | ||
2052 | memcpy_toio(card->mem + wrthdr.offset, buf, wrthdr.size); | 2046 | memcpy_toio(card->mem + wrthdr.offset, buf, wrthdr.size); |
2053 | kfree(buf); | 2047 | kfree(buf); |
diff --git a/drivers/net/wan/hd64570.h b/drivers/net/wan/hd64570.h index 3839662ff201..e4f539ad071b 100644 --- a/drivers/net/wan/hd64570.h +++ b/drivers/net/wan/hd64570.h | |||
@@ -153,7 +153,7 @@ typedef struct { | |||
153 | u16 len; /* Data Length */ | 153 | u16 len; /* Data Length */ |
154 | u8 stat; /* Status */ | 154 | u8 stat; /* Status */ |
155 | u8 unused; /* pads to 2-byte boundary */ | 155 | u8 unused; /* pads to 2-byte boundary */ |
156 | }__attribute__ ((packed)) pkt_desc; | 156 | }__packed pkt_desc; |
157 | 157 | ||
158 | 158 | ||
159 | /* Packet Descriptor Status bits */ | 159 | /* Packet Descriptor Status bits */ |
diff --git a/drivers/net/wan/hdlc_cisco.c b/drivers/net/wan/hdlc_cisco.c index ee7083fbea50..b38ffa149aba 100644 --- a/drivers/net/wan/hdlc_cisco.c +++ b/drivers/net/wan/hdlc_cisco.c | |||
@@ -36,7 +36,7 @@ struct hdlc_header { | |||
36 | u8 address; | 36 | u8 address; |
37 | u8 control; | 37 | u8 control; |
38 | __be16 protocol; | 38 | __be16 protocol; |
39 | }__attribute__ ((packed)); | 39 | }__packed; |
40 | 40 | ||
41 | 41 | ||
42 | struct cisco_packet { | 42 | struct cisco_packet { |
@@ -45,7 +45,7 @@ struct cisco_packet { | |||
45 | __be32 par2; | 45 | __be32 par2; |
46 | __be16 rel; /* reliability */ | 46 | __be16 rel; /* reliability */ |
47 | __be32 time; | 47 | __be32 time; |
48 | }__attribute__ ((packed)); | 48 | }__packed; |
49 | #define CISCO_PACKET_LEN 18 | 49 | #define CISCO_PACKET_LEN 18 |
50 | #define CISCO_BIG_PACKET_LEN 20 | 50 | #define CISCO_BIG_PACKET_LEN 20 |
51 | 51 | ||
diff --git a/drivers/net/wan/hdlc_fr.c b/drivers/net/wan/hdlc_fr.c index 0e52993e2079..0edb535bb2b5 100644 --- a/drivers/net/wan/hdlc_fr.c +++ b/drivers/net/wan/hdlc_fr.c | |||
@@ -112,7 +112,7 @@ typedef struct { | |||
112 | unsigned de: 1; | 112 | unsigned de: 1; |
113 | unsigned ea2: 1; | 113 | unsigned ea2: 1; |
114 | #endif | 114 | #endif |
115 | }__attribute__ ((packed)) fr_hdr; | 115 | }__packed fr_hdr; |
116 | 116 | ||
117 | 117 | ||
118 | typedef struct pvc_device_struct { | 118 | typedef struct pvc_device_struct { |
diff --git a/drivers/net/wan/sdla.c b/drivers/net/wan/sdla.c index 43ae6f440bfb..f4125da2762f 100644 --- a/drivers/net/wan/sdla.c +++ b/drivers/net/wan/sdla.c | |||
@@ -330,7 +330,7 @@ struct _dlci_stat | |||
330 | { | 330 | { |
331 | short dlci; | 331 | short dlci; |
332 | char flags; | 332 | char flags; |
333 | } __attribute__((packed)); | 333 | } __packed; |
334 | 334 | ||
335 | struct _frad_stat | 335 | struct _frad_stat |
336 | { | 336 | { |
@@ -1211,14 +1211,9 @@ static int sdla_xfer(struct net_device *dev, struct sdla_mem __user *info, int r | |||
1211 | } | 1211 | } |
1212 | else | 1212 | else |
1213 | { | 1213 | { |
1214 | temp = kmalloc(mem.len, GFP_KERNEL); | 1214 | temp = memdup_user(mem.data, mem.len); |
1215 | if (!temp) | 1215 | if (IS_ERR(temp)) |
1216 | return(-ENOMEM); | 1216 | return PTR_ERR(temp); |
1217 | if(copy_from_user(temp, mem.data, mem.len)) | ||
1218 | { | ||
1219 | kfree(temp); | ||
1220 | return -EFAULT; | ||
1221 | } | ||
1222 | sdla_write(dev, mem.addr, temp, mem.len); | 1217 | sdla_write(dev, mem.addr, temp, mem.len); |
1223 | kfree(temp); | 1218 | kfree(temp); |
1224 | } | 1219 | } |
diff --git a/drivers/net/wimax/i2400m/control.c b/drivers/net/wimax/i2400m/control.c index d86e8f31e7fc..2f725d0cc762 100644 --- a/drivers/net/wimax/i2400m/control.c +++ b/drivers/net/wimax/i2400m/control.c | |||
@@ -848,7 +848,7 @@ struct i2400m_cmd_enter_power_save { | |||
848 | struct i2400m_l3l4_hdr hdr; | 848 | struct i2400m_l3l4_hdr hdr; |
849 | struct i2400m_tlv_hdr tlv; | 849 | struct i2400m_tlv_hdr tlv; |
850 | __le32 val; | 850 | __le32 val; |
851 | } __attribute__((packed)); | 851 | } __packed; |
852 | 852 | ||
853 | 853 | ||
854 | /* | 854 | /* |
diff --git a/drivers/net/wimax/i2400m/fw.c b/drivers/net/wimax/i2400m/fw.c index 11491354e5b5..8b55a5b14152 100644 --- a/drivers/net/wimax/i2400m/fw.c +++ b/drivers/net/wimax/i2400m/fw.c | |||
@@ -651,7 +651,7 @@ static int i2400m_download_chunk(struct i2400m *i2400m, const void *chunk, | |||
651 | struct { | 651 | struct { |
652 | struct i2400m_bootrom_header cmd; | 652 | struct i2400m_bootrom_header cmd; |
653 | u8 cmd_payload[chunk_len]; | 653 | u8 cmd_payload[chunk_len]; |
654 | } __attribute__((packed)) *buf; | 654 | } __packed *buf; |
655 | struct i2400m_bootrom_header ack; | 655 | struct i2400m_bootrom_header ack; |
656 | 656 | ||
657 | d_fnstart(5, dev, "(i2400m %p chunk %p __chunk_len %zu addr 0x%08lx " | 657 | d_fnstart(5, dev, "(i2400m %p chunk %p __chunk_len %zu addr 0x%08lx " |
@@ -794,7 +794,7 @@ int i2400m_dnload_finalize(struct i2400m *i2400m, | |||
794 | struct { | 794 | struct { |
795 | struct i2400m_bootrom_header cmd; | 795 | struct i2400m_bootrom_header cmd; |
796 | u8 cmd_pl[0]; | 796 | u8 cmd_pl[0]; |
797 | } __attribute__((packed)) *cmd_buf; | 797 | } __packed *cmd_buf; |
798 | size_t signature_block_offset, signature_block_size; | 798 | size_t signature_block_offset, signature_block_size; |
799 | 799 | ||
800 | d_fnstart(3, dev, "offset %zu\n", offset); | 800 | d_fnstart(3, dev, "offset %zu\n", offset); |
@@ -1029,7 +1029,7 @@ int i2400m_read_mac_addr(struct i2400m *i2400m) | |||
1029 | struct { | 1029 | struct { |
1030 | struct i2400m_bootrom_header ack; | 1030 | struct i2400m_bootrom_header ack; |
1031 | u8 ack_pl[16]; | 1031 | u8 ack_pl[16]; |
1032 | } __attribute__((packed)) ack_buf; | 1032 | } __packed ack_buf; |
1033 | 1033 | ||
1034 | d_fnstart(5, dev, "(i2400m %p)\n", i2400m); | 1034 | d_fnstart(5, dev, "(i2400m %p)\n", i2400m); |
1035 | cmd = i2400m->bm_cmd_buf; | 1035 | cmd = i2400m->bm_cmd_buf; |
@@ -1115,7 +1115,7 @@ int i2400m_dnload_init_signed(struct i2400m *i2400m, | |||
1115 | struct { | 1115 | struct { |
1116 | struct i2400m_bootrom_header cmd; | 1116 | struct i2400m_bootrom_header cmd; |
1117 | struct i2400m_bcf_hdr cmd_pl; | 1117 | struct i2400m_bcf_hdr cmd_pl; |
1118 | } __attribute__((packed)) *cmd_buf; | 1118 | } __packed *cmd_buf; |
1119 | struct i2400m_bootrom_header ack; | 1119 | struct i2400m_bootrom_header ack; |
1120 | 1120 | ||
1121 | d_fnstart(5, dev, "(i2400m %p bcf_hdr %p)\n", i2400m, bcf_hdr); | 1121 | d_fnstart(5, dev, "(i2400m %p bcf_hdr %p)\n", i2400m, bcf_hdr); |
diff --git a/drivers/net/wimax/i2400m/op-rfkill.c b/drivers/net/wimax/i2400m/op-rfkill.c index 035e4cf3e6ed..9e02b90b0080 100644 --- a/drivers/net/wimax/i2400m/op-rfkill.c +++ b/drivers/net/wimax/i2400m/op-rfkill.c | |||
@@ -91,7 +91,7 @@ int i2400m_op_rfkill_sw_toggle(struct wimax_dev *wimax_dev, | |||
91 | struct { | 91 | struct { |
92 | struct i2400m_l3l4_hdr hdr; | 92 | struct i2400m_l3l4_hdr hdr; |
93 | struct i2400m_tlv_rf_operation sw_rf; | 93 | struct i2400m_tlv_rf_operation sw_rf; |
94 | } __attribute__((packed)) *cmd; | 94 | } __packed *cmd; |
95 | char strerr[32]; | 95 | char strerr[32]; |
96 | 96 | ||
97 | d_fnstart(4, dev, "(wimax_dev %p state %d)\n", wimax_dev, state); | 97 | d_fnstart(4, dev, "(wimax_dev %p state %d)\n", wimax_dev, state); |
diff --git a/drivers/net/wireless/adm8211.h b/drivers/net/wireless/adm8211.h index b07e4d3a6b4d..bbc10b1cde87 100644 --- a/drivers/net/wireless/adm8211.h +++ b/drivers/net/wireless/adm8211.h | |||
@@ -80,7 +80,7 @@ struct adm8211_csr { | |||
80 | __le32 FEMR; /* 0x104 */ | 80 | __le32 FEMR; /* 0x104 */ |
81 | __le32 FPSR; /* 0x108 */ | 81 | __le32 FPSR; /* 0x108 */ |
82 | __le32 FFER; /* 0x10C */ | 82 | __le32 FFER; /* 0x10C */ |
83 | } __attribute__ ((packed)); | 83 | } __packed; |
84 | 84 | ||
85 | /* CSR0 - PAR (PCI Address Register) */ | 85 | /* CSR0 - PAR (PCI Address Register) */ |
86 | #define ADM8211_PAR_MWIE (1 << 24) | 86 | #define ADM8211_PAR_MWIE (1 << 24) |
@@ -484,7 +484,7 @@ struct adm8211_tx_hdr { | |||
484 | u8 entry_control; // huh?? | 484 | u8 entry_control; // huh?? |
485 | u16 reserved_1; | 485 | u16 reserved_1; |
486 | u32 reserved_2; | 486 | u32 reserved_2; |
487 | } __attribute__ ((packed)); | 487 | } __packed; |
488 | 488 | ||
489 | 489 | ||
490 | #define RX_COPY_BREAK 128 | 490 | #define RX_COPY_BREAK 128 |
@@ -531,7 +531,7 @@ struct adm8211_eeprom { | |||
531 | u8 lnags_threshold[14]; /* 0x70 */ | 531 | u8 lnags_threshold[14]; /* 0x70 */ |
532 | __le16 checksum; /* 0x7E */ | 532 | __le16 checksum; /* 0x7E */ |
533 | u8 cis_data[0]; /* 0x80, 384 bytes */ | 533 | u8 cis_data[0]; /* 0x80, 384 bytes */ |
534 | } __attribute__ ((packed)); | 534 | } __packed; |
535 | 535 | ||
536 | struct adm8211_priv { | 536 | struct adm8211_priv { |
537 | struct pci_dev *pdev; | 537 | struct pci_dev *pdev; |
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c index 3b7ab20a5c54..6b605df8a923 100644 --- a/drivers/net/wireless/airo.c +++ b/drivers/net/wireless/airo.c | |||
@@ -506,20 +506,20 @@ struct WepKeyRid { | |||
506 | u8 mac[ETH_ALEN]; | 506 | u8 mac[ETH_ALEN]; |
507 | __le16 klen; | 507 | __le16 klen; |
508 | u8 key[16]; | 508 | u8 key[16]; |
509 | } __attribute__ ((packed)); | 509 | } __packed; |
510 | 510 | ||
511 | /* These structures are from the Aironet's PC4500 Developers Manual */ | 511 | /* These structures are from the Aironet's PC4500 Developers Manual */ |
512 | typedef struct Ssid Ssid; | 512 | typedef struct Ssid Ssid; |
513 | struct Ssid { | 513 | struct Ssid { |
514 | __le16 len; | 514 | __le16 len; |
515 | u8 ssid[32]; | 515 | u8 ssid[32]; |
516 | } __attribute__ ((packed)); | 516 | } __packed; |
517 | 517 | ||
518 | typedef struct SsidRid SsidRid; | 518 | typedef struct SsidRid SsidRid; |
519 | struct SsidRid { | 519 | struct SsidRid { |
520 | __le16 len; | 520 | __le16 len; |
521 | Ssid ssids[3]; | 521 | Ssid ssids[3]; |
522 | } __attribute__ ((packed)); | 522 | } __packed; |
523 | 523 | ||
524 | typedef struct ModulationRid ModulationRid; | 524 | typedef struct ModulationRid ModulationRid; |
525 | struct ModulationRid { | 525 | struct ModulationRid { |
@@ -528,7 +528,7 @@ struct ModulationRid { | |||
528 | #define MOD_DEFAULT cpu_to_le16(0) | 528 | #define MOD_DEFAULT cpu_to_le16(0) |
529 | #define MOD_CCK cpu_to_le16(1) | 529 | #define MOD_CCK cpu_to_le16(1) |
530 | #define MOD_MOK cpu_to_le16(2) | 530 | #define MOD_MOK cpu_to_le16(2) |
531 | } __attribute__ ((packed)); | 531 | } __packed; |
532 | 532 | ||
533 | typedef struct ConfigRid ConfigRid; | 533 | typedef struct ConfigRid ConfigRid; |
534 | struct ConfigRid { | 534 | struct ConfigRid { |
@@ -652,7 +652,7 @@ struct ConfigRid { | |||
652 | #define MAGIC_STAY_IN_CAM (1<<10) | 652 | #define MAGIC_STAY_IN_CAM (1<<10) |
653 | u8 magicControl; | 653 | u8 magicControl; |
654 | __le16 autoWake; | 654 | __le16 autoWake; |
655 | } __attribute__ ((packed)); | 655 | } __packed; |
656 | 656 | ||
657 | typedef struct StatusRid StatusRid; | 657 | typedef struct StatusRid StatusRid; |
658 | struct StatusRid { | 658 | struct StatusRid { |
@@ -711,20 +711,20 @@ struct StatusRid { | |||
711 | #define STAT_LEAPFAILED 91 | 711 | #define STAT_LEAPFAILED 91 |
712 | #define STAT_LEAPTIMEDOUT 92 | 712 | #define STAT_LEAPTIMEDOUT 92 |
713 | #define STAT_LEAPCOMPLETE 93 | 713 | #define STAT_LEAPCOMPLETE 93 |
714 | } __attribute__ ((packed)); | 714 | } __packed; |
715 | 715 | ||
716 | typedef struct StatsRid StatsRid; | 716 | typedef struct StatsRid StatsRid; |
717 | struct StatsRid { | 717 | struct StatsRid { |
718 | __le16 len; | 718 | __le16 len; |
719 | __le16 spacer; | 719 | __le16 spacer; |
720 | __le32 vals[100]; | 720 | __le32 vals[100]; |
721 | } __attribute__ ((packed)); | 721 | } __packed; |
722 | 722 | ||
723 | typedef struct APListRid APListRid; | 723 | typedef struct APListRid APListRid; |
724 | struct APListRid { | 724 | struct APListRid { |
725 | __le16 len; | 725 | __le16 len; |
726 | u8 ap[4][ETH_ALEN]; | 726 | u8 ap[4][ETH_ALEN]; |
727 | } __attribute__ ((packed)); | 727 | } __packed; |
728 | 728 | ||
729 | typedef struct CapabilityRid CapabilityRid; | 729 | typedef struct CapabilityRid CapabilityRid; |
730 | struct CapabilityRid { | 730 | struct CapabilityRid { |
@@ -754,7 +754,7 @@ struct CapabilityRid { | |||
754 | __le16 bootBlockVer; | 754 | __le16 bootBlockVer; |
755 | __le16 requiredHard; | 755 | __le16 requiredHard; |
756 | __le16 extSoftCap; | 756 | __le16 extSoftCap; |
757 | } __attribute__ ((packed)); | 757 | } __packed; |
758 | 758 | ||
759 | /* Only present on firmware >= 5.30.17 */ | 759 | /* Only present on firmware >= 5.30.17 */ |
760 | typedef struct BSSListRidExtra BSSListRidExtra; | 760 | typedef struct BSSListRidExtra BSSListRidExtra; |
@@ -762,7 +762,7 @@ struct BSSListRidExtra { | |||
762 | __le16 unknown[4]; | 762 | __le16 unknown[4]; |
763 | u8 fixed[12]; /* WLAN management frame */ | 763 | u8 fixed[12]; /* WLAN management frame */ |
764 | u8 iep[624]; | 764 | u8 iep[624]; |
765 | } __attribute__ ((packed)); | 765 | } __packed; |
766 | 766 | ||
767 | typedef struct BSSListRid BSSListRid; | 767 | typedef struct BSSListRid BSSListRid; |
768 | struct BSSListRid { | 768 | struct BSSListRid { |
@@ -796,7 +796,7 @@ struct BSSListRid { | |||
796 | 796 | ||
797 | /* Only present on firmware >= 5.30.17 */ | 797 | /* Only present on firmware >= 5.30.17 */ |
798 | BSSListRidExtra extra; | 798 | BSSListRidExtra extra; |
799 | } __attribute__ ((packed)); | 799 | } __packed; |
800 | 800 | ||
801 | typedef struct { | 801 | typedef struct { |
802 | BSSListRid bss; | 802 | BSSListRid bss; |
@@ -807,13 +807,13 @@ typedef struct tdsRssiEntry tdsRssiEntry; | |||
807 | struct tdsRssiEntry { | 807 | struct tdsRssiEntry { |
808 | u8 rssipct; | 808 | u8 rssipct; |
809 | u8 rssidBm; | 809 | u8 rssidBm; |
810 | } __attribute__ ((packed)); | 810 | } __packed; |
811 | 811 | ||
812 | typedef struct tdsRssiRid tdsRssiRid; | 812 | typedef struct tdsRssiRid tdsRssiRid; |
813 | struct tdsRssiRid { | 813 | struct tdsRssiRid { |
814 | u16 len; | 814 | u16 len; |
815 | tdsRssiEntry x[256]; | 815 | tdsRssiEntry x[256]; |
816 | } __attribute__ ((packed)); | 816 | } __packed; |
817 | 817 | ||
818 | typedef struct MICRid MICRid; | 818 | typedef struct MICRid MICRid; |
819 | struct MICRid { | 819 | struct MICRid { |
@@ -823,7 +823,7 @@ struct MICRid { | |||
823 | u8 multicast[16]; | 823 | u8 multicast[16]; |
824 | __le16 unicastValid; | 824 | __le16 unicastValid; |
825 | u8 unicast[16]; | 825 | u8 unicast[16]; |
826 | } __attribute__ ((packed)); | 826 | } __packed; |
827 | 827 | ||
828 | typedef struct MICBuffer MICBuffer; | 828 | typedef struct MICBuffer MICBuffer; |
829 | struct MICBuffer { | 829 | struct MICBuffer { |
@@ -841,7 +841,7 @@ struct MICBuffer { | |||
841 | } u; | 841 | } u; |
842 | __be32 mic; | 842 | __be32 mic; |
843 | __be32 seq; | 843 | __be32 seq; |
844 | } __attribute__ ((packed)); | 844 | } __packed; |
845 | 845 | ||
846 | typedef struct { | 846 | typedef struct { |
847 | u8 da[ETH_ALEN]; | 847 | u8 da[ETH_ALEN]; |
@@ -996,7 +996,7 @@ struct rx_hdr { | |||
996 | u8 rate; | 996 | u8 rate; |
997 | u8 freq; | 997 | u8 freq; |
998 | __le16 tmp[4]; | 998 | __le16 tmp[4]; |
999 | } __attribute__ ((packed)); | 999 | } __packed; |
1000 | 1000 | ||
1001 | typedef struct { | 1001 | typedef struct { |
1002 | unsigned int ctl: 15; | 1002 | unsigned int ctl: 15; |
diff --git a/drivers/net/wireless/at76c50x-usb.c b/drivers/net/wireless/at76c50x-usb.c index 8a2d4afc74f8..429b281d40d1 100644 --- a/drivers/net/wireless/at76c50x-usb.c +++ b/drivers/net/wireless/at76c50x-usb.c | |||
@@ -305,7 +305,7 @@ struct dfu_status { | |||
305 | unsigned char poll_timeout[3]; | 305 | unsigned char poll_timeout[3]; |
306 | unsigned char state; | 306 | unsigned char state; |
307 | unsigned char string; | 307 | unsigned char string; |
308 | } __attribute__((packed)); | 308 | } __packed; |
309 | 309 | ||
310 | static inline int at76_is_intersil(enum board_type board) | 310 | static inline int at76_is_intersil(enum board_type board) |
311 | { | 311 | { |
diff --git a/drivers/net/wireless/at76c50x-usb.h b/drivers/net/wireless/at76c50x-usb.h index 1ec5ccffdbc0..972ea0fc1a0b 100644 --- a/drivers/net/wireless/at76c50x-usb.h +++ b/drivers/net/wireless/at76c50x-usb.h | |||
@@ -99,7 +99,7 @@ struct hwcfg_r505 { | |||
99 | u8 reserved2[14]; | 99 | u8 reserved2[14]; |
100 | u8 cr15_values[14]; | 100 | u8 cr15_values[14]; |
101 | u8 reserved3[3]; | 101 | u8 reserved3[3]; |
102 | } __attribute__((packed)); | 102 | } __packed; |
103 | 103 | ||
104 | struct hwcfg_rfmd { | 104 | struct hwcfg_rfmd { |
105 | u8 cr20_values[14]; | 105 | u8 cr20_values[14]; |
@@ -111,7 +111,7 @@ struct hwcfg_rfmd { | |||
111 | u8 low_power_values[14]; | 111 | u8 low_power_values[14]; |
112 | u8 normal_power_values[14]; | 112 | u8 normal_power_values[14]; |
113 | u8 reserved1[3]; | 113 | u8 reserved1[3]; |
114 | } __attribute__((packed)); | 114 | } __packed; |
115 | 115 | ||
116 | struct hwcfg_intersil { | 116 | struct hwcfg_intersil { |
117 | u8 mac_addr[ETH_ALEN]; | 117 | u8 mac_addr[ETH_ALEN]; |
@@ -120,7 +120,7 @@ struct hwcfg_intersil { | |||
120 | u8 pidvid[4]; | 120 | u8 pidvid[4]; |
121 | u8 regulatory_domain; | 121 | u8 regulatory_domain; |
122 | u8 reserved[1]; | 122 | u8 reserved[1]; |
123 | } __attribute__((packed)); | 123 | } __packed; |
124 | 124 | ||
125 | union at76_hwcfg { | 125 | union at76_hwcfg { |
126 | struct hwcfg_intersil i; | 126 | struct hwcfg_intersil i; |
@@ -149,14 +149,14 @@ struct at76_card_config { | |||
149 | u8 ssid_len; | 149 | u8 ssid_len; |
150 | u8 short_preamble; | 150 | u8 short_preamble; |
151 | __le16 beacon_period; | 151 | __le16 beacon_period; |
152 | } __attribute__((packed)); | 152 | } __packed; |
153 | 153 | ||
154 | struct at76_command { | 154 | struct at76_command { |
155 | u8 cmd; | 155 | u8 cmd; |
156 | u8 reserved; | 156 | u8 reserved; |
157 | __le16 size; | 157 | __le16 size; |
158 | u8 data[0]; | 158 | u8 data[0]; |
159 | } __attribute__((packed)); | 159 | } __packed; |
160 | 160 | ||
161 | /* Length of Atmel-specific Rx header before 802.11 frame */ | 161 | /* Length of Atmel-specific Rx header before 802.11 frame */ |
162 | #define AT76_RX_HDRLEN offsetof(struct at76_rx_buffer, packet) | 162 | #define AT76_RX_HDRLEN offsetof(struct at76_rx_buffer, packet) |
@@ -171,7 +171,7 @@ struct at76_rx_buffer { | |||
171 | u8 noise_level; | 171 | u8 noise_level; |
172 | __le32 rx_time; | 172 | __le32 rx_time; |
173 | u8 packet[IEEE80211_MAX_FRAG_THRESHOLD]; | 173 | u8 packet[IEEE80211_MAX_FRAG_THRESHOLD]; |
174 | } __attribute__((packed)); | 174 | } __packed; |
175 | 175 | ||
176 | /* Length of Atmel-specific Tx header before 802.11 frame */ | 176 | /* Length of Atmel-specific Tx header before 802.11 frame */ |
177 | #define AT76_TX_HDRLEN offsetof(struct at76_tx_buffer, packet) | 177 | #define AT76_TX_HDRLEN offsetof(struct at76_tx_buffer, packet) |
@@ -182,7 +182,7 @@ struct at76_tx_buffer { | |||
182 | u8 padding; | 182 | u8 padding; |
183 | u8 reserved[4]; | 183 | u8 reserved[4]; |
184 | u8 packet[IEEE80211_MAX_FRAG_THRESHOLD]; | 184 | u8 packet[IEEE80211_MAX_FRAG_THRESHOLD]; |
185 | } __attribute__((packed)); | 185 | } __packed; |
186 | 186 | ||
187 | /* defines for scan_type below */ | 187 | /* defines for scan_type below */ |
188 | #define SCAN_TYPE_ACTIVE 0 | 188 | #define SCAN_TYPE_ACTIVE 0 |
@@ -198,7 +198,7 @@ struct at76_req_scan { | |||
198 | __le16 max_channel_time; | 198 | __le16 max_channel_time; |
199 | u8 essid_size; | 199 | u8 essid_size; |
200 | u8 international_scan; | 200 | u8 international_scan; |
201 | } __attribute__((packed)); | 201 | } __packed; |
202 | 202 | ||
203 | struct at76_req_ibss { | 203 | struct at76_req_ibss { |
204 | u8 bssid[ETH_ALEN]; | 204 | u8 bssid[ETH_ALEN]; |
@@ -207,7 +207,7 @@ struct at76_req_ibss { | |||
207 | u8 channel; | 207 | u8 channel; |
208 | u8 essid_size; | 208 | u8 essid_size; |
209 | u8 reserved[3]; | 209 | u8 reserved[3]; |
210 | } __attribute__((packed)); | 210 | } __packed; |
211 | 211 | ||
212 | struct at76_req_join { | 212 | struct at76_req_join { |
213 | u8 bssid[ETH_ALEN]; | 213 | u8 bssid[ETH_ALEN]; |
@@ -217,7 +217,7 @@ struct at76_req_join { | |||
217 | __le16 timeout; | 217 | __le16 timeout; |
218 | u8 essid_size; | 218 | u8 essid_size; |
219 | u8 reserved; | 219 | u8 reserved; |
220 | } __attribute__((packed)); | 220 | } __packed; |
221 | 221 | ||
222 | struct set_mib_buffer { | 222 | struct set_mib_buffer { |
223 | u8 type; | 223 | u8 type; |
@@ -229,7 +229,7 @@ struct set_mib_buffer { | |||
229 | __le16 word; | 229 | __le16 word; |
230 | u8 addr[ETH_ALEN]; | 230 | u8 addr[ETH_ALEN]; |
231 | } data; | 231 | } data; |
232 | } __attribute__((packed)); | 232 | } __packed; |
233 | 233 | ||
234 | struct mib_local { | 234 | struct mib_local { |
235 | u16 reserved0; | 235 | u16 reserved0; |
@@ -241,14 +241,14 @@ struct mib_local { | |||
241 | u16 reserved2; | 241 | u16 reserved2; |
242 | u8 preamble_type; | 242 | u8 preamble_type; |
243 | u16 reserved3; | 243 | u16 reserved3; |
244 | } __attribute__((packed)); | 244 | } __packed; |
245 | 245 | ||
246 | struct mib_mac_addr { | 246 | struct mib_mac_addr { |
247 | u8 mac_addr[ETH_ALEN]; | 247 | u8 mac_addr[ETH_ALEN]; |
248 | u8 res[2]; /* ??? */ | 248 | u8 res[2]; /* ??? */ |
249 | u8 group_addr[4][ETH_ALEN]; | 249 | u8 group_addr[4][ETH_ALEN]; |
250 | u8 group_addr_status[4]; | 250 | u8 group_addr_status[4]; |
251 | } __attribute__((packed)); | 251 | } __packed; |
252 | 252 | ||
253 | struct mib_mac { | 253 | struct mib_mac { |
254 | __le32 max_tx_msdu_lifetime; | 254 | __le32 max_tx_msdu_lifetime; |
@@ -269,7 +269,7 @@ struct mib_mac { | |||
269 | u8 desired_bssid[ETH_ALEN]; | 269 | u8 desired_bssid[ETH_ALEN]; |
270 | u8 desired_bsstype; /* ad-hoc or infrastructure */ | 270 | u8 desired_bsstype; /* ad-hoc or infrastructure */ |
271 | u8 reserved2; | 271 | u8 reserved2; |
272 | } __attribute__((packed)); | 272 | } __packed; |
273 | 273 | ||
274 | struct mib_mac_mgmt { | 274 | struct mib_mac_mgmt { |
275 | __le16 beacon_period; | 275 | __le16 beacon_period; |
@@ -292,7 +292,7 @@ struct mib_mac_mgmt { | |||
292 | u8 multi_domain_capability_enabled; | 292 | u8 multi_domain_capability_enabled; |
293 | u8 country_string[3]; | 293 | u8 country_string[3]; |
294 | u8 reserved[3]; | 294 | u8 reserved[3]; |
295 | } __attribute__((packed)); | 295 | } __packed; |
296 | 296 | ||
297 | struct mib_mac_wep { | 297 | struct mib_mac_wep { |
298 | u8 privacy_invoked; /* 0 disable encr., 1 enable encr */ | 298 | u8 privacy_invoked; /* 0 disable encr., 1 enable encr */ |
@@ -303,7 +303,7 @@ struct mib_mac_wep { | |||
303 | __le32 wep_excluded_count; | 303 | __le32 wep_excluded_count; |
304 | u8 wep_default_keyvalue[WEP_KEYS][WEP_LARGE_KEY_LEN]; | 304 | u8 wep_default_keyvalue[WEP_KEYS][WEP_LARGE_KEY_LEN]; |
305 | u8 encryption_level; /* 1 for 40bit, 2 for 104bit encryption */ | 305 | u8 encryption_level; /* 1 for 40bit, 2 for 104bit encryption */ |
306 | } __attribute__((packed)); | 306 | } __packed; |
307 | 307 | ||
308 | struct mib_phy { | 308 | struct mib_phy { |
309 | __le32 ed_threshold; | 309 | __le32 ed_threshold; |
@@ -320,19 +320,19 @@ struct mib_phy { | |||
320 | u8 current_cca_mode; | 320 | u8 current_cca_mode; |
321 | u8 phy_type; | 321 | u8 phy_type; |
322 | u8 current_reg_domain; | 322 | u8 current_reg_domain; |
323 | } __attribute__((packed)); | 323 | } __packed; |
324 | 324 | ||
325 | struct mib_fw_version { | 325 | struct mib_fw_version { |
326 | u8 major; | 326 | u8 major; |
327 | u8 minor; | 327 | u8 minor; |
328 | u8 patch; | 328 | u8 patch; |
329 | u8 build; | 329 | u8 build; |
330 | } __attribute__((packed)); | 330 | } __packed; |
331 | 331 | ||
332 | struct mib_mdomain { | 332 | struct mib_mdomain { |
333 | u8 tx_powerlevel[14]; | 333 | u8 tx_powerlevel[14]; |
334 | u8 channel_list[14]; /* 0 for invalid channels */ | 334 | u8 channel_list[14]; /* 0 for invalid channels */ |
335 | } __attribute__((packed)); | 335 | } __packed; |
336 | 336 | ||
337 | struct at76_fw_header { | 337 | struct at76_fw_header { |
338 | __le32 crc; /* CRC32 of the whole image */ | 338 | __le32 crc; /* CRC32 of the whole image */ |
@@ -346,7 +346,7 @@ struct at76_fw_header { | |||
346 | __le32 int_fw_len; /* internal firmware image length */ | 346 | __le32 int_fw_len; /* internal firmware image length */ |
347 | __le32 ext_fw_offset; /* external firmware image offset */ | 347 | __le32 ext_fw_offset; /* external firmware image offset */ |
348 | __le32 ext_fw_len; /* external firmware image length */ | 348 | __le32 ext_fw_len; /* external firmware image length */ |
349 | } __attribute__((packed)); | 349 | } __packed; |
350 | 350 | ||
351 | /* a description of a regulatory domain and the allowed channels */ | 351 | /* a description of a regulatory domain and the allowed channels */ |
352 | struct reg_domain { | 352 | struct reg_domain { |
diff --git a/drivers/net/wireless/ath/ath5k/Makefile b/drivers/net/wireless/ath/ath5k/Makefile index cc09595b781a..2242a140e4fe 100644 --- a/drivers/net/wireless/ath/ath5k/Makefile +++ b/drivers/net/wireless/ath/ath5k/Makefile | |||
@@ -13,5 +13,6 @@ ath5k-y += base.o | |||
13 | ath5k-y += led.o | 13 | ath5k-y += led.o |
14 | ath5k-y += rfkill.o | 14 | ath5k-y += rfkill.o |
15 | ath5k-y += ani.o | 15 | ath5k-y += ani.o |
16 | ath5k-y += sysfs.o | ||
16 | ath5k-$(CONFIG_ATH5K_DEBUG) += debug.o | 17 | ath5k-$(CONFIG_ATH5K_DEBUG) += debug.o |
17 | obj-$(CONFIG_ATH5K) += ath5k.o | 18 | obj-$(CONFIG_ATH5K) += ath5k.o |
diff --git a/drivers/net/wireless/ath/ath5k/ani.c b/drivers/net/wireless/ath/ath5k/ani.c index f2311ab35504..26dbe65fedb0 100644 --- a/drivers/net/wireless/ath/ath5k/ani.c +++ b/drivers/net/wireless/ath/ath5k/ani.c | |||
@@ -74,8 +74,8 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level) | |||
74 | const s8 fr[] = { -78, -80 }; | 74 | const s8 fr[] = { -78, -80 }; |
75 | #endif | 75 | #endif |
76 | if (level < 0 || level >= ARRAY_SIZE(sz)) { | 76 | if (level < 0 || level >= ARRAY_SIZE(sz)) { |
77 | ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, | 77 | ATH5K_ERR(ah->ah_sc, "noise immuniy level %d out of range", |
78 | "level out of range %d", level); | 78 | level); |
79 | return; | 79 | return; |
80 | } | 80 | } |
81 | 81 | ||
@@ -106,8 +106,8 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level) | |||
106 | 106 | ||
107 | if (level < 0 || level >= ARRAY_SIZE(val) || | 107 | if (level < 0 || level >= ARRAY_SIZE(val) || |
108 | level > ah->ah_sc->ani_state.max_spur_level) { | 108 | level > ah->ah_sc->ani_state.max_spur_level) { |
109 | ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, | 109 | ATH5K_ERR(ah->ah_sc, "spur immunity level %d out of range", |
110 | "level out of range %d", level); | 110 | level); |
111 | return; | 111 | return; |
112 | } | 112 | } |
113 | 113 | ||
@@ -130,8 +130,7 @@ ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level) | |||
130 | const int val[] = { 0, 4, 8 }; | 130 | const int val[] = { 0, 4, 8 }; |
131 | 131 | ||
132 | if (level < 0 || level >= ARRAY_SIZE(val)) { | 132 | if (level < 0 || level >= ARRAY_SIZE(val)) { |
133 | ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, | 133 | ATH5K_ERR(ah->ah_sc, "firstep level %d out of range", level); |
134 | "level out of range %d", level); | ||
135 | return; | 134 | return; |
136 | } | 135 | } |
137 | 136 | ||
@@ -481,14 +480,15 @@ ath5k_ani_calibration(struct ath5k_hw *ah) | |||
481 | struct ath5k_ani_state *as = &ah->ah_sc->ani_state; | 480 | struct ath5k_ani_state *as = &ah->ah_sc->ani_state; |
482 | int listen, ofdm_high, ofdm_low, cck_high, cck_low; | 481 | int listen, ofdm_high, ofdm_low, cck_high, cck_low; |
483 | 482 | ||
484 | if (as->ani_mode != ATH5K_ANI_MODE_AUTO) | ||
485 | return; | ||
486 | |||
487 | /* get listen time since last call and add it to the counter because we | 483 | /* get listen time since last call and add it to the counter because we |
488 | * might not have restarted the "ani period" last time */ | 484 | * might not have restarted the "ani period" last time. |
485 | * always do this to calculate the busy time also in manual mode */ | ||
489 | listen = ath5k_hw_ani_get_listen_time(ah, as); | 486 | listen = ath5k_hw_ani_get_listen_time(ah, as); |
490 | as->listen_time += listen; | 487 | as->listen_time += listen; |
491 | 488 | ||
489 | if (as->ani_mode != ATH5K_ANI_MODE_AUTO) | ||
490 | return; | ||
491 | |||
492 | ath5k_ani_save_and_clear_phy_errors(ah, as); | 492 | ath5k_ani_save_and_clear_phy_errors(ah, as); |
493 | 493 | ||
494 | ofdm_high = as->listen_time * ATH5K_ANI_OFDM_TRIG_HIGH / 1000; | 494 | ofdm_high = as->listen_time * ATH5K_ANI_OFDM_TRIG_HIGH / 1000; |
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h index 2785946f659a..cf16318a0a17 100644 --- a/drivers/net/wireless/ath/ath5k/ath5k.h +++ b/drivers/net/wireless/ath/ath5k/ath5k.h | |||
@@ -204,6 +204,7 @@ | |||
204 | #define AR5K_TUNE_TPC_TXPOWER false | 204 | #define AR5K_TUNE_TPC_TXPOWER false |
205 | #define ATH5K_TUNE_CALIBRATION_INTERVAL_FULL 10000 /* 10 sec */ | 205 | #define ATH5K_TUNE_CALIBRATION_INTERVAL_FULL 10000 /* 10 sec */ |
206 | #define ATH5K_TUNE_CALIBRATION_INTERVAL_ANI 1000 /* 1 sec */ | 206 | #define ATH5K_TUNE_CALIBRATION_INTERVAL_ANI 1000 /* 1 sec */ |
207 | #define ATH5K_TUNE_CALIBRATION_INTERVAL_NF 60000 /* 60 sec */ | ||
207 | 208 | ||
208 | #define AR5K_INIT_CARR_SENSE_EN 1 | 209 | #define AR5K_INIT_CARR_SENSE_EN 1 |
209 | 210 | ||
@@ -1118,6 +1119,7 @@ struct ath5k_hw { | |||
1118 | /* Calibration timestamp */ | 1119 | /* Calibration timestamp */ |
1119 | unsigned long ah_cal_next_full; | 1120 | unsigned long ah_cal_next_full; |
1120 | unsigned long ah_cal_next_ani; | 1121 | unsigned long ah_cal_next_ani; |
1122 | unsigned long ah_cal_next_nf; | ||
1121 | 1123 | ||
1122 | /* Calibration mask */ | 1124 | /* Calibration mask */ |
1123 | u8 ah_cal_mask; | 1125 | u8 ah_cal_mask; |
@@ -1148,6 +1150,9 @@ struct ath5k_hw { | |||
1148 | int ath5k_hw_attach(struct ath5k_softc *sc); | 1150 | int ath5k_hw_attach(struct ath5k_softc *sc); |
1149 | void ath5k_hw_detach(struct ath5k_hw *ah); | 1151 | void ath5k_hw_detach(struct ath5k_hw *ah); |
1150 | 1152 | ||
1153 | int ath5k_sysfs_register(struct ath5k_softc *sc); | ||
1154 | void ath5k_sysfs_unregister(struct ath5k_softc *sc); | ||
1155 | |||
1151 | /* LED functions */ | 1156 | /* LED functions */ |
1152 | int ath5k_init_leds(struct ath5k_softc *sc); | 1157 | int ath5k_init_leds(struct ath5k_softc *sc); |
1153 | void ath5k_led_enable(struct ath5k_softc *sc); | 1158 | void ath5k_led_enable(struct ath5k_softc *sc); |
@@ -1270,6 +1275,7 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel); | |||
1270 | void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah); | 1275 | void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah); |
1271 | int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, | 1276 | int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, |
1272 | struct ieee80211_channel *channel); | 1277 | struct ieee80211_channel *channel); |
1278 | void ath5k_hw_update_noise_floor(struct ath5k_hw *ah); | ||
1273 | /* Spur mitigation */ | 1279 | /* Spur mitigation */ |
1274 | bool ath5k_hw_chan_has_spur_noise(struct ath5k_hw *ah, | 1280 | bool ath5k_hw_chan_has_spur_noise(struct ath5k_hw *ah, |
1275 | struct ieee80211_channel *channel); | 1281 | struct ieee80211_channel *channel); |
@@ -1280,6 +1286,7 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan); | |||
1280 | int ath5k_hw_phy_disable(struct ath5k_hw *ah); | 1286 | int ath5k_hw_phy_disable(struct ath5k_hw *ah); |
1281 | /* Antenna control */ | 1287 | /* Antenna control */ |
1282 | void ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode); | 1288 | void ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode); |
1289 | void ath5k_hw_set_antenna_switch(struct ath5k_hw *ah, u8 ee_mode); | ||
1283 | /* TX power setup */ | 1290 | /* TX power setup */ |
1284 | int ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel, | 1291 | int ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel, |
1285 | u8 ee_mode, u8 txpower); | 1292 | u8 ee_mode, u8 txpower); |
diff --git a/drivers/net/wireless/ath/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c index e0c244b02f05..ef2dc1dd3a5d 100644 --- a/drivers/net/wireless/ath/ath5k/attach.c +++ b/drivers/net/wireless/ath/ath5k/attach.c | |||
@@ -351,8 +351,6 @@ err_free: | |||
351 | */ | 351 | */ |
352 | void ath5k_hw_detach(struct ath5k_hw *ah) | 352 | void ath5k_hw_detach(struct ath5k_hw *ah) |
353 | { | 353 | { |
354 | ATH5K_TRACE(ah->ah_sc); | ||
355 | |||
356 | __set_bit(ATH_STAT_INVALID, ah->ah_sc->status); | 354 | __set_bit(ATH_STAT_INVALID, ah->ah_sc->status); |
357 | 355 | ||
358 | if (ah->ah_rf_banks != NULL) | 356 | if (ah->ah_rf_banks != NULL) |
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c index 648972df369d..9d37c1a43a9d 100644 --- a/drivers/net/wireless/ath/ath5k/base.c +++ b/drivers/net/wireless/ath/ath5k/base.c | |||
@@ -578,7 +578,7 @@ ath5k_pci_probe(struct pci_dev *pdev, | |||
578 | spin_lock_init(&sc->block); | 578 | spin_lock_init(&sc->block); |
579 | 579 | ||
580 | /* Set private data */ | 580 | /* Set private data */ |
581 | pci_set_drvdata(pdev, hw); | 581 | pci_set_drvdata(pdev, sc); |
582 | 582 | ||
583 | /* Setup interrupt handler */ | 583 | /* Setup interrupt handler */ |
584 | ret = request_irq(pdev->irq, ath5k_intr, IRQF_SHARED, "ath", sc); | 584 | ret = request_irq(pdev->irq, ath5k_intr, IRQF_SHARED, "ath", sc); |
@@ -694,25 +694,23 @@ err: | |||
694 | static void __devexit | 694 | static void __devexit |
695 | ath5k_pci_remove(struct pci_dev *pdev) | 695 | ath5k_pci_remove(struct pci_dev *pdev) |
696 | { | 696 | { |
697 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | 697 | struct ath5k_softc *sc = pci_get_drvdata(pdev); |
698 | struct ath5k_softc *sc = hw->priv; | ||
699 | 698 | ||
700 | ath5k_debug_finish_device(sc); | 699 | ath5k_debug_finish_device(sc); |
701 | ath5k_detach(pdev, hw); | 700 | ath5k_detach(pdev, sc->hw); |
702 | ath5k_hw_detach(sc->ah); | 701 | ath5k_hw_detach(sc->ah); |
703 | kfree(sc->ah); | 702 | kfree(sc->ah); |
704 | free_irq(pdev->irq, sc); | 703 | free_irq(pdev->irq, sc); |
705 | pci_iounmap(pdev, sc->iobase); | 704 | pci_iounmap(pdev, sc->iobase); |
706 | pci_release_region(pdev, 0); | 705 | pci_release_region(pdev, 0); |
707 | pci_disable_device(pdev); | 706 | pci_disable_device(pdev); |
708 | ieee80211_free_hw(hw); | 707 | ieee80211_free_hw(sc->hw); |
709 | } | 708 | } |
710 | 709 | ||
711 | #ifdef CONFIG_PM_SLEEP | 710 | #ifdef CONFIG_PM_SLEEP |
712 | static int ath5k_pci_suspend(struct device *dev) | 711 | static int ath5k_pci_suspend(struct device *dev) |
713 | { | 712 | { |
714 | struct ieee80211_hw *hw = pci_get_drvdata(to_pci_dev(dev)); | 713 | struct ath5k_softc *sc = pci_get_drvdata(to_pci_dev(dev)); |
715 | struct ath5k_softc *sc = hw->priv; | ||
716 | 714 | ||
717 | ath5k_led_off(sc); | 715 | ath5k_led_off(sc); |
718 | return 0; | 716 | return 0; |
@@ -721,8 +719,7 @@ static int ath5k_pci_suspend(struct device *dev) | |||
721 | static int ath5k_pci_resume(struct device *dev) | 719 | static int ath5k_pci_resume(struct device *dev) |
722 | { | 720 | { |
723 | struct pci_dev *pdev = to_pci_dev(dev); | 721 | struct pci_dev *pdev = to_pci_dev(dev); |
724 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | 722 | struct ath5k_softc *sc = pci_get_drvdata(pdev); |
725 | struct ath5k_softc *sc = hw->priv; | ||
726 | 723 | ||
727 | /* | 724 | /* |
728 | * Suspend/Resume resets the PCI configuration space, so we have to | 725 | * Suspend/Resume resets the PCI configuration space, so we have to |
@@ -864,6 +861,8 @@ ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw) | |||
864 | 861 | ||
865 | ath5k_init_leds(sc); | 862 | ath5k_init_leds(sc); |
866 | 863 | ||
864 | ath5k_sysfs_register(sc); | ||
865 | |||
867 | return 0; | 866 | return 0; |
868 | err_queues: | 867 | err_queues: |
869 | ath5k_txq_release(sc); | 868 | ath5k_txq_release(sc); |
@@ -899,6 +898,7 @@ ath5k_detach(struct pci_dev *pdev, struct ieee80211_hw *hw) | |||
899 | ath5k_hw_release_tx_queue(sc->ah, sc->bhalq); | 898 | ath5k_hw_release_tx_queue(sc->ah, sc->bhalq); |
900 | ath5k_unregister_leds(sc); | 899 | ath5k_unregister_leds(sc); |
901 | 900 | ||
901 | ath5k_sysfs_unregister(sc); | ||
902 | /* | 902 | /* |
903 | * NB: can't reclaim these until after ieee80211_ifdetach | 903 | * NB: can't reclaim these until after ieee80211_ifdetach |
904 | * returns because we'll get called back to reclaim node | 904 | * returns because we'll get called back to reclaim node |
@@ -2785,10 +2785,6 @@ ath5k_tasklet_calibrate(unsigned long data) | |||
2785 | /* Only full calibration for now */ | 2785 | /* Only full calibration for now */ |
2786 | ah->ah_cal_mask |= AR5K_CALIBRATION_FULL; | 2786 | ah->ah_cal_mask |= AR5K_CALIBRATION_FULL; |
2787 | 2787 | ||
2788 | /* Stop queues so that calibration | ||
2789 | * doesn't interfere with tx */ | ||
2790 | ieee80211_stop_queues(sc->hw); | ||
2791 | |||
2792 | ATH5K_DBG(sc, ATH5K_DEBUG_CALIBRATE, "channel %u/%x\n", | 2788 | ATH5K_DBG(sc, ATH5K_DEBUG_CALIBRATE, "channel %u/%x\n", |
2793 | ieee80211_frequency_to_channel(sc->curchan->center_freq), | 2789 | ieee80211_frequency_to_channel(sc->curchan->center_freq), |
2794 | sc->curchan->hw_value); | 2790 | sc->curchan->hw_value); |
@@ -2806,8 +2802,16 @@ ath5k_tasklet_calibrate(unsigned long data) | |||
2806 | ieee80211_frequency_to_channel( | 2802 | ieee80211_frequency_to_channel( |
2807 | sc->curchan->center_freq)); | 2803 | sc->curchan->center_freq)); |
2808 | 2804 | ||
2809 | /* Wake queues */ | 2805 | /* Noise floor calibration interrupts rx/tx path while I/Q calibration |
2810 | ieee80211_wake_queues(sc->hw); | 2806 | * doesn't. We stop the queues so that calibration doesn't interfere |
2807 | * with TX and don't run it as often */ | ||
2808 | if (time_is_before_eq_jiffies(ah->ah_cal_next_nf)) { | ||
2809 | ah->ah_cal_next_nf = jiffies + | ||
2810 | msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_NF); | ||
2811 | ieee80211_stop_queues(sc->hw); | ||
2812 | ath5k_hw_update_noise_floor(ah); | ||
2813 | ieee80211_wake_queues(sc->hw); | ||
2814 | } | ||
2811 | 2815 | ||
2812 | ah->ah_cal_mask &= ~AR5K_CALIBRATION_FULL; | 2816 | ah->ah_cal_mask &= ~AR5K_CALIBRATION_FULL; |
2813 | } | 2817 | } |
@@ -2926,6 +2930,10 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan) | |||
2926 | 2930 | ||
2927 | ath5k_ani_init(ah, ah->ah_sc->ani_state.ani_mode); | 2931 | ath5k_ani_init(ah, ah->ah_sc->ani_state.ani_mode); |
2928 | 2932 | ||
2933 | ah->ah_cal_next_full = jiffies; | ||
2934 | ah->ah_cal_next_ani = jiffies; | ||
2935 | ah->ah_cal_next_nf = jiffies; | ||
2936 | |||
2929 | /* | 2937 | /* |
2930 | * Change channels and update the h/w rate map if we're switching; | 2938 | * Change channels and update the h/w rate map if we're switching; |
2931 | * e.g. 11a to 11b/g. | 2939 | * e.g. 11a to 11b/g. |
diff --git a/drivers/net/wireless/ath/ath5k/caps.c b/drivers/net/wireless/ath/ath5k/caps.c index 74f007126f41..beae519aa735 100644 --- a/drivers/net/wireless/ath/ath5k/caps.c +++ b/drivers/net/wireless/ath/ath5k/caps.c | |||
@@ -34,7 +34,6 @@ int ath5k_hw_set_capabilities(struct ath5k_hw *ah) | |||
34 | { | 34 | { |
35 | u16 ee_header; | 35 | u16 ee_header; |
36 | 36 | ||
37 | ATH5K_TRACE(ah->ah_sc); | ||
38 | /* Capabilities stored in the EEPROM */ | 37 | /* Capabilities stored in the EEPROM */ |
39 | ee_header = ah->ah_capabilities.cap_eeprom.ee_header; | 38 | ee_header = ah->ah_capabilities.cap_eeprom.ee_header; |
40 | 39 | ||
@@ -123,8 +122,6 @@ int ath5k_hw_get_capability(struct ath5k_hw *ah, | |||
123 | enum ath5k_capability_type cap_type, | 122 | enum ath5k_capability_type cap_type, |
124 | u32 capability, u32 *result) | 123 | u32 capability, u32 *result) |
125 | { | 124 | { |
126 | ATH5K_TRACE(ah->ah_sc); | ||
127 | |||
128 | switch (cap_type) { | 125 | switch (cap_type) { |
129 | case AR5K_CAP_NUM_TXQUEUES: | 126 | case AR5K_CAP_NUM_TXQUEUES: |
130 | if (result) { | 127 | if (result) { |
@@ -173,8 +170,6 @@ yes: | |||
173 | int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, | 170 | int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, |
174 | u16 assoc_id) | 171 | u16 assoc_id) |
175 | { | 172 | { |
176 | ATH5K_TRACE(ah->ah_sc); | ||
177 | |||
178 | if (ah->ah_version == AR5K_AR5210) { | 173 | if (ah->ah_version == AR5K_AR5210) { |
179 | AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, | 174 | AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, |
180 | AR5K_STA_ID1_NO_PSPOLL | AR5K_STA_ID1_DEFAULT_ANTENNA); | 175 | AR5K_STA_ID1_NO_PSPOLL | AR5K_STA_ID1_DEFAULT_ANTENNA); |
@@ -186,8 +181,6 @@ int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid, | |||
186 | 181 | ||
187 | int ath5k_hw_disable_pspoll(struct ath5k_hw *ah) | 182 | int ath5k_hw_disable_pspoll(struct ath5k_hw *ah) |
188 | { | 183 | { |
189 | ATH5K_TRACE(ah->ah_sc); | ||
190 | |||
191 | if (ah->ah_version == AR5K_AR5210) { | 184 | if (ah->ah_version == AR5K_AR5210) { |
192 | AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, | 185 | AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, |
193 | AR5K_STA_ID1_NO_PSPOLL | AR5K_STA_ID1_DEFAULT_ANTENNA); | 186 | AR5K_STA_ID1_NO_PSPOLL | AR5K_STA_ID1_DEFAULT_ANTENNA); |
diff --git a/drivers/net/wireless/ath/ath5k/debug.c b/drivers/net/wireless/ath/ath5k/debug.c index 6fb5c5ffa5b1..0f2e37d85cbd 100644 --- a/drivers/net/wireless/ath/ath5k/debug.c +++ b/drivers/net/wireless/ath/ath5k/debug.c | |||
@@ -307,7 +307,6 @@ static const struct { | |||
307 | { ATH5K_DEBUG_DUMP_RX, "dumprx", "print received skb content" }, | 307 | { ATH5K_DEBUG_DUMP_RX, "dumprx", "print received skb content" }, |
308 | { ATH5K_DEBUG_DUMP_TX, "dumptx", "print transmit skb content" }, | 308 | { ATH5K_DEBUG_DUMP_TX, "dumptx", "print transmit skb content" }, |
309 | { ATH5K_DEBUG_DUMPBANDS, "dumpbands", "dump bands" }, | 309 | { ATH5K_DEBUG_DUMPBANDS, "dumpbands", "dump bands" }, |
310 | { ATH5K_DEBUG_TRACE, "trace", "trace function calls" }, | ||
311 | { ATH5K_DEBUG_ANI, "ani", "adaptive noise immunity" }, | 310 | { ATH5K_DEBUG_ANI, "ani", "adaptive noise immunity" }, |
312 | { ATH5K_DEBUG_ANY, "all", "show all debug levels" }, | 311 | { ATH5K_DEBUG_ANY, "all", "show all debug levels" }, |
313 | }; | 312 | }; |
@@ -426,6 +425,13 @@ static ssize_t read_file_antenna(struct file *file, char __user *user_buf, | |||
426 | "AR5K_PHY_FAST_ANT_DIV_EN\t%d\n", | 425 | "AR5K_PHY_FAST_ANT_DIV_EN\t%d\n", |
427 | (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0); | 426 | (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0); |
428 | 427 | ||
428 | v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_ANT_SWITCH_TABLE_0); | ||
429 | len += snprintf(buf+len, sizeof(buf)-len, | ||
430 | "\nAR5K_PHY_ANT_SWITCH_TABLE_0\t0x%08x\n", v); | ||
431 | v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_ANT_SWITCH_TABLE_1); | ||
432 | len += snprintf(buf+len, sizeof(buf)-len, | ||
433 | "AR5K_PHY_ANT_SWITCH_TABLE_1\t0x%08x\n", v); | ||
434 | |||
429 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 435 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
430 | } | 436 | } |
431 | 437 | ||
@@ -729,6 +735,66 @@ static const struct file_operations fops_ani = { | |||
729 | }; | 735 | }; |
730 | 736 | ||
731 | 737 | ||
738 | /* debugfs: queues etc */ | ||
739 | |||
740 | static ssize_t read_file_queue(struct file *file, char __user *user_buf, | ||
741 | size_t count, loff_t *ppos) | ||
742 | { | ||
743 | struct ath5k_softc *sc = file->private_data; | ||
744 | char buf[700]; | ||
745 | unsigned int len = 0; | ||
746 | |||
747 | struct ath5k_txq *txq; | ||
748 | struct ath5k_buf *bf, *bf0; | ||
749 | int i, n = 0; | ||
750 | |||
751 | len += snprintf(buf+len, sizeof(buf)-len, | ||
752 | "available txbuffers: %d\n", sc->txbuf_len); | ||
753 | |||
754 | for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { | ||
755 | txq = &sc->txqs[i]; | ||
756 | |||
757 | len += snprintf(buf+len, sizeof(buf)-len, | ||
758 | "%02d: %ssetup\n", i, txq->setup ? "" : "not "); | ||
759 | |||
760 | if (!txq->setup) | ||
761 | continue; | ||
762 | |||
763 | list_for_each_entry_safe(bf, bf0, &txq->q, list) | ||
764 | n++; | ||
765 | len += snprintf(buf+len, sizeof(buf)-len, " len: %d\n", n); | ||
766 | } | ||
767 | |||
768 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | ||
769 | } | ||
770 | |||
771 | static ssize_t write_file_queue(struct file *file, | ||
772 | const char __user *userbuf, | ||
773 | size_t count, loff_t *ppos) | ||
774 | { | ||
775 | struct ath5k_softc *sc = file->private_data; | ||
776 | char buf[20]; | ||
777 | |||
778 | if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) | ||
779 | return -EFAULT; | ||
780 | |||
781 | if (strncmp(buf, "start", 5) == 0) | ||
782 | ieee80211_wake_queues(sc->hw); | ||
783 | else if (strncmp(buf, "stop", 4) == 0) | ||
784 | ieee80211_stop_queues(sc->hw); | ||
785 | |||
786 | return count; | ||
787 | } | ||
788 | |||
789 | |||
790 | static const struct file_operations fops_queue = { | ||
791 | .read = read_file_queue, | ||
792 | .write = write_file_queue, | ||
793 | .open = ath5k_debugfs_open, | ||
794 | .owner = THIS_MODULE, | ||
795 | }; | ||
796 | |||
797 | |||
732 | /* init */ | 798 | /* init */ |
733 | 799 | ||
734 | void | 800 | void |
@@ -772,6 +838,11 @@ ath5k_debug_init_device(struct ath5k_softc *sc) | |||
772 | S_IWUSR | S_IRUSR, | 838 | S_IWUSR | S_IRUSR, |
773 | sc->debug.debugfs_phydir, sc, | 839 | sc->debug.debugfs_phydir, sc, |
774 | &fops_ani); | 840 | &fops_ani); |
841 | |||
842 | sc->debug.debugfs_queue = debugfs_create_file("queue", | ||
843 | S_IWUSR | S_IRUSR, | ||
844 | sc->debug.debugfs_phydir, sc, | ||
845 | &fops_queue); | ||
775 | } | 846 | } |
776 | 847 | ||
777 | void | 848 | void |
@@ -790,6 +861,7 @@ ath5k_debug_finish_device(struct ath5k_softc *sc) | |||
790 | debugfs_remove(sc->debug.debugfs_antenna); | 861 | debugfs_remove(sc->debug.debugfs_antenna); |
791 | debugfs_remove(sc->debug.debugfs_frameerrors); | 862 | debugfs_remove(sc->debug.debugfs_frameerrors); |
792 | debugfs_remove(sc->debug.debugfs_ani); | 863 | debugfs_remove(sc->debug.debugfs_ani); |
864 | debugfs_remove(sc->debug.debugfs_queue); | ||
793 | debugfs_remove(sc->debug.debugfs_phydir); | 865 | debugfs_remove(sc->debug.debugfs_phydir); |
794 | } | 866 | } |
795 | 867 | ||
diff --git a/drivers/net/wireless/ath/ath5k/debug.h b/drivers/net/wireless/ath/ath5k/debug.h index ddd5b3a99e8d..606ae94a9157 100644 --- a/drivers/net/wireless/ath/ath5k/debug.h +++ b/drivers/net/wireless/ath/ath5k/debug.h | |||
@@ -77,6 +77,7 @@ struct ath5k_dbg_info { | |||
77 | struct dentry *debugfs_antenna; | 77 | struct dentry *debugfs_antenna; |
78 | struct dentry *debugfs_frameerrors; | 78 | struct dentry *debugfs_frameerrors; |
79 | struct dentry *debugfs_ani; | 79 | struct dentry *debugfs_ani; |
80 | struct dentry *debugfs_queue; | ||
80 | }; | 81 | }; |
81 | 82 | ||
82 | /** | 83 | /** |
@@ -115,18 +116,12 @@ enum ath5k_debug_level { | |||
115 | ATH5K_DEBUG_DUMP_RX = 0x00000100, | 116 | ATH5K_DEBUG_DUMP_RX = 0x00000100, |
116 | ATH5K_DEBUG_DUMP_TX = 0x00000200, | 117 | ATH5K_DEBUG_DUMP_TX = 0x00000200, |
117 | ATH5K_DEBUG_DUMPBANDS = 0x00000400, | 118 | ATH5K_DEBUG_DUMPBANDS = 0x00000400, |
118 | ATH5K_DEBUG_TRACE = 0x00001000, | ||
119 | ATH5K_DEBUG_ANI = 0x00002000, | 119 | ATH5K_DEBUG_ANI = 0x00002000, |
120 | ATH5K_DEBUG_ANY = 0xffffffff | 120 | ATH5K_DEBUG_ANY = 0xffffffff |
121 | }; | 121 | }; |
122 | 122 | ||
123 | #ifdef CONFIG_ATH5K_DEBUG | 123 | #ifdef CONFIG_ATH5K_DEBUG |
124 | 124 | ||
125 | #define ATH5K_TRACE(_sc) do { \ | ||
126 | if (unlikely((_sc)->debug.level & ATH5K_DEBUG_TRACE)) \ | ||
127 | printk(KERN_DEBUG "ath5k trace %s:%d\n", __func__, __LINE__); \ | ||
128 | } while (0) | ||
129 | |||
130 | #define ATH5K_DBG(_sc, _m, _fmt, ...) do { \ | 125 | #define ATH5K_DBG(_sc, _m, _fmt, ...) do { \ |
131 | if (unlikely((_sc)->debug.level & (_m) && net_ratelimit())) \ | 126 | if (unlikely((_sc)->debug.level & (_m) && net_ratelimit())) \ |
132 | ATH5K_PRINTK(_sc, KERN_DEBUG, "(%s:%d): " _fmt, \ | 127 | ATH5K_PRINTK(_sc, KERN_DEBUG, "(%s:%d): " _fmt, \ |
@@ -168,8 +163,6 @@ ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf); | |||
168 | 163 | ||
169 | #include <linux/compiler.h> | 164 | #include <linux/compiler.h> |
170 | 165 | ||
171 | #define ATH5K_TRACE(_sc) typecheck(struct ath5k_softc *, (_sc)) | ||
172 | |||
173 | static inline void __attribute__ ((format (printf, 3, 4))) | 166 | static inline void __attribute__ ((format (printf, 3, 4))) |
174 | ATH5K_DBG(struct ath5k_softc *sc, unsigned int m, const char *fmt, ...) {} | 167 | ATH5K_DBG(struct ath5k_softc *sc, unsigned int m, const char *fmt, ...) {} |
175 | 168 | ||
diff --git a/drivers/net/wireless/ath/ath5k/desc.c b/drivers/net/wireless/ath/ath5k/desc.c index 7d7b646ab65a..da5dbb63047f 100644 --- a/drivers/net/wireless/ath/ath5k/desc.c +++ b/drivers/net/wireless/ath/ath5k/desc.c | |||
@@ -176,7 +176,6 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah, | |||
176 | struct ath5k_hw_4w_tx_ctl *tx_ctl; | 176 | struct ath5k_hw_4w_tx_ctl *tx_ctl; |
177 | unsigned int frame_len; | 177 | unsigned int frame_len; |
178 | 178 | ||
179 | ATH5K_TRACE(ah->ah_sc); | ||
180 | tx_ctl = &desc->ud.ds_tx5212.tx_ctl; | 179 | tx_ctl = &desc->ud.ds_tx5212.tx_ctl; |
181 | 180 | ||
182 | /* | 181 | /* |
@@ -342,8 +341,6 @@ static int ath5k_hw_proc_2word_tx_status(struct ath5k_hw *ah, | |||
342 | struct ath5k_hw_2w_tx_ctl *tx_ctl; | 341 | struct ath5k_hw_2w_tx_ctl *tx_ctl; |
343 | struct ath5k_hw_tx_status *tx_status; | 342 | struct ath5k_hw_tx_status *tx_status; |
344 | 343 | ||
345 | ATH5K_TRACE(ah->ah_sc); | ||
346 | |||
347 | tx_ctl = &desc->ud.ds_tx5210.tx_ctl; | 344 | tx_ctl = &desc->ud.ds_tx5210.tx_ctl; |
348 | tx_status = &desc->ud.ds_tx5210.tx_stat; | 345 | tx_status = &desc->ud.ds_tx5210.tx_stat; |
349 | 346 | ||
@@ -396,8 +393,6 @@ static int ath5k_hw_proc_4word_tx_status(struct ath5k_hw *ah, | |||
396 | struct ath5k_hw_4w_tx_ctl *tx_ctl; | 393 | struct ath5k_hw_4w_tx_ctl *tx_ctl; |
397 | struct ath5k_hw_tx_status *tx_status; | 394 | struct ath5k_hw_tx_status *tx_status; |
398 | 395 | ||
399 | ATH5K_TRACE(ah->ah_sc); | ||
400 | |||
401 | tx_ctl = &desc->ud.ds_tx5212.tx_ctl; | 396 | tx_ctl = &desc->ud.ds_tx5212.tx_ctl; |
402 | tx_status = &desc->ud.ds_tx5212.tx_stat; | 397 | tx_status = &desc->ud.ds_tx5212.tx_stat; |
403 | 398 | ||
@@ -490,7 +485,6 @@ static int ath5k_hw_setup_rx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc, | |||
490 | { | 485 | { |
491 | struct ath5k_hw_rx_ctl *rx_ctl; | 486 | struct ath5k_hw_rx_ctl *rx_ctl; |
492 | 487 | ||
493 | ATH5K_TRACE(ah->ah_sc); | ||
494 | rx_ctl = &desc->ud.ds_rx.rx_ctl; | 488 | rx_ctl = &desc->ud.ds_rx.rx_ctl; |
495 | 489 | ||
496 | /* | 490 | /* |
@@ -593,7 +587,6 @@ static int ath5k_hw_proc_5212_rx_status(struct ath5k_hw *ah, | |||
593 | struct ath5k_hw_rx_status *rx_status; | 587 | struct ath5k_hw_rx_status *rx_status; |
594 | struct ath5k_hw_rx_error *rx_err; | 588 | struct ath5k_hw_rx_error *rx_err; |
595 | 589 | ||
596 | ATH5K_TRACE(ah->ah_sc); | ||
597 | rx_status = &desc->ud.ds_rx.u.rx_stat; | 590 | rx_status = &desc->ud.ds_rx.u.rx_stat; |
598 | 591 | ||
599 | /* Overlay on error */ | 592 | /* Overlay on error */ |
diff --git a/drivers/net/wireless/ath/ath5k/dma.c b/drivers/net/wireless/ath/ath5k/dma.c index 941b51130a6f..484f31870ba8 100644 --- a/drivers/net/wireless/ath/ath5k/dma.c +++ b/drivers/net/wireless/ath/ath5k/dma.c | |||
@@ -48,7 +48,6 @@ | |||
48 | */ | 48 | */ |
49 | void ath5k_hw_start_rx_dma(struct ath5k_hw *ah) | 49 | void ath5k_hw_start_rx_dma(struct ath5k_hw *ah) |
50 | { | 50 | { |
51 | ATH5K_TRACE(ah->ah_sc); | ||
52 | ath5k_hw_reg_write(ah, AR5K_CR_RXE, AR5K_CR); | 51 | ath5k_hw_reg_write(ah, AR5K_CR_RXE, AR5K_CR); |
53 | ath5k_hw_reg_read(ah, AR5K_CR); | 52 | ath5k_hw_reg_read(ah, AR5K_CR); |
54 | } | 53 | } |
@@ -62,7 +61,6 @@ int ath5k_hw_stop_rx_dma(struct ath5k_hw *ah) | |||
62 | { | 61 | { |
63 | unsigned int i; | 62 | unsigned int i; |
64 | 63 | ||
65 | ATH5K_TRACE(ah->ah_sc); | ||
66 | ath5k_hw_reg_write(ah, AR5K_CR_RXD, AR5K_CR); | 64 | ath5k_hw_reg_write(ah, AR5K_CR_RXD, AR5K_CR); |
67 | 65 | ||
68 | /* | 66 | /* |
@@ -96,8 +94,6 @@ u32 ath5k_hw_get_rxdp(struct ath5k_hw *ah) | |||
96 | */ | 94 | */ |
97 | void ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr) | 95 | void ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr) |
98 | { | 96 | { |
99 | ATH5K_TRACE(ah->ah_sc); | ||
100 | |||
101 | ath5k_hw_reg_write(ah, phys_addr, AR5K_RXDP); | 97 | ath5k_hw_reg_write(ah, phys_addr, AR5K_RXDP); |
102 | } | 98 | } |
103 | 99 | ||
@@ -125,7 +121,6 @@ int ath5k_hw_start_tx_dma(struct ath5k_hw *ah, unsigned int queue) | |||
125 | { | 121 | { |
126 | u32 tx_queue; | 122 | u32 tx_queue; |
127 | 123 | ||
128 | ATH5K_TRACE(ah->ah_sc); | ||
129 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); | 124 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); |
130 | 125 | ||
131 | /* Return if queue is declared inactive */ | 126 | /* Return if queue is declared inactive */ |
@@ -186,7 +181,6 @@ int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue) | |||
186 | unsigned int i = 40; | 181 | unsigned int i = 40; |
187 | u32 tx_queue, pending; | 182 | u32 tx_queue, pending; |
188 | 183 | ||
189 | ATH5K_TRACE(ah->ah_sc); | ||
190 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); | 184 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); |
191 | 185 | ||
192 | /* Return if queue is declared inactive */ | 186 | /* Return if queue is declared inactive */ |
@@ -297,7 +291,6 @@ u32 ath5k_hw_get_txdp(struct ath5k_hw *ah, unsigned int queue) | |||
297 | { | 291 | { |
298 | u16 tx_reg; | 292 | u16 tx_reg; |
299 | 293 | ||
300 | ATH5K_TRACE(ah->ah_sc); | ||
301 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); | 294 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); |
302 | 295 | ||
303 | /* | 296 | /* |
@@ -340,7 +333,6 @@ int ath5k_hw_set_txdp(struct ath5k_hw *ah, unsigned int queue, u32 phys_addr) | |||
340 | { | 333 | { |
341 | u16 tx_reg; | 334 | u16 tx_reg; |
342 | 335 | ||
343 | ATH5K_TRACE(ah->ah_sc); | ||
344 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); | 336 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); |
345 | 337 | ||
346 | /* | 338 | /* |
@@ -400,8 +392,6 @@ int ath5k_hw_update_tx_triglevel(struct ath5k_hw *ah, bool increase) | |||
400 | u32 trigger_level, imr; | 392 | u32 trigger_level, imr; |
401 | int ret = -EIO; | 393 | int ret = -EIO; |
402 | 394 | ||
403 | ATH5K_TRACE(ah->ah_sc); | ||
404 | |||
405 | /* | 395 | /* |
406 | * Disable interrupts by setting the mask | 396 | * Disable interrupts by setting the mask |
407 | */ | 397 | */ |
@@ -451,7 +441,6 @@ done: | |||
451 | */ | 441 | */ |
452 | bool ath5k_hw_is_intr_pending(struct ath5k_hw *ah) | 442 | bool ath5k_hw_is_intr_pending(struct ath5k_hw *ah) |
453 | { | 443 | { |
454 | ATH5K_TRACE(ah->ah_sc); | ||
455 | return ath5k_hw_reg_read(ah, AR5K_INTPEND) == 1 ? 1 : 0; | 444 | return ath5k_hw_reg_read(ah, AR5K_INTPEND) == 1 ? 1 : 0; |
456 | } | 445 | } |
457 | 446 | ||
@@ -475,8 +464,6 @@ int ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask) | |||
475 | { | 464 | { |
476 | u32 data; | 465 | u32 data; |
477 | 466 | ||
478 | ATH5K_TRACE(ah->ah_sc); | ||
479 | |||
480 | /* | 467 | /* |
481 | * Read interrupt status from the Interrupt Status register | 468 | * Read interrupt status from the Interrupt Status register |
482 | * on 5210 | 469 | * on 5210 |
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c index ed0263672d6d..ae316fec4a6a 100644 --- a/drivers/net/wireless/ath/ath5k/eeprom.c +++ b/drivers/net/wireless/ath/ath5k/eeprom.c | |||
@@ -35,7 +35,6 @@ static int ath5k_hw_eeprom_read(struct ath5k_hw *ah, u32 offset, u16 *data) | |||
35 | { | 35 | { |
36 | u32 status, timeout; | 36 | u32 status, timeout; |
37 | 37 | ||
38 | ATH5K_TRACE(ah->ah_sc); | ||
39 | /* | 38 | /* |
40 | * Initialize EEPROM access | 39 | * Initialize EEPROM access |
41 | */ | 40 | */ |
@@ -715,7 +714,7 @@ ath5k_eeprom_convert_pcal_info_5111(struct ath5k_hw *ah, int mode, | |||
715 | 714 | ||
716 | /* Only one curve for RF5111 | 715 | /* Only one curve for RF5111 |
717 | * find out which one and place | 716 | * find out which one and place |
718 | * in in pd_curves. | 717 | * in pd_curves. |
719 | * Note: ee_x_gain is reversed here */ | 718 | * Note: ee_x_gain is reversed here */ |
720 | for (idx = 0; idx < AR5K_EEPROM_N_PD_CURVES; idx++) { | 719 | for (idx = 0; idx < AR5K_EEPROM_N_PD_CURVES; idx++) { |
721 | 720 | ||
diff --git a/drivers/net/wireless/ath/ath5k/gpio.c b/drivers/net/wireless/ath/ath5k/gpio.c index 64a27e73d02e..bc90503f4b7a 100644 --- a/drivers/net/wireless/ath/ath5k/gpio.c +++ b/drivers/net/wireless/ath/ath5k/gpio.c | |||
@@ -34,8 +34,6 @@ void ath5k_hw_set_ledstate(struct ath5k_hw *ah, unsigned int state) | |||
34 | /*5210 has different led mode handling*/ | 34 | /*5210 has different led mode handling*/ |
35 | u32 led_5210; | 35 | u32 led_5210; |
36 | 36 | ||
37 | ATH5K_TRACE(ah->ah_sc); | ||
38 | |||
39 | /*Reset led status*/ | 37 | /*Reset led status*/ |
40 | if (ah->ah_version != AR5K_AR5210) | 38 | if (ah->ah_version != AR5K_AR5210) |
41 | AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG, | 39 | AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG, |
@@ -82,7 +80,6 @@ void ath5k_hw_set_ledstate(struct ath5k_hw *ah, unsigned int state) | |||
82 | */ | 80 | */ |
83 | int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio) | 81 | int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio) |
84 | { | 82 | { |
85 | ATH5K_TRACE(ah->ah_sc); | ||
86 | if (gpio >= AR5K_NUM_GPIO) | 83 | if (gpio >= AR5K_NUM_GPIO) |
87 | return -EINVAL; | 84 | return -EINVAL; |
88 | 85 | ||
@@ -98,7 +95,6 @@ int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio) | |||
98 | */ | 95 | */ |
99 | int ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio) | 96 | int ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio) |
100 | { | 97 | { |
101 | ATH5K_TRACE(ah->ah_sc); | ||
102 | if (gpio >= AR5K_NUM_GPIO) | 98 | if (gpio >= AR5K_NUM_GPIO) |
103 | return -EINVAL; | 99 | return -EINVAL; |
104 | 100 | ||
@@ -114,7 +110,6 @@ int ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio) | |||
114 | */ | 110 | */ |
115 | u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio) | 111 | u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio) |
116 | { | 112 | { |
117 | ATH5K_TRACE(ah->ah_sc); | ||
118 | if (gpio >= AR5K_NUM_GPIO) | 113 | if (gpio >= AR5K_NUM_GPIO) |
119 | return 0xffffffff; | 114 | return 0xffffffff; |
120 | 115 | ||
@@ -129,7 +124,6 @@ u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio) | |||
129 | int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val) | 124 | int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val) |
130 | { | 125 | { |
131 | u32 data; | 126 | u32 data; |
132 | ATH5K_TRACE(ah->ah_sc); | ||
133 | 127 | ||
134 | if (gpio >= AR5K_NUM_GPIO) | 128 | if (gpio >= AR5K_NUM_GPIO) |
135 | return -EINVAL; | 129 | return -EINVAL; |
@@ -153,7 +147,6 @@ void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio, | |||
153 | { | 147 | { |
154 | u32 data; | 148 | u32 data; |
155 | 149 | ||
156 | ATH5K_TRACE(ah->ah_sc); | ||
157 | if (gpio >= AR5K_NUM_GPIO) | 150 | if (gpio >= AR5K_NUM_GPIO) |
158 | return; | 151 | return; |
159 | 152 | ||
diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c index 5212e275f1c7..86fdb6ddfaaa 100644 --- a/drivers/net/wireless/ath/ath5k/pcu.c +++ b/drivers/net/wireless/ath/ath5k/pcu.c | |||
@@ -59,8 +59,6 @@ int ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode) | |||
59 | 59 | ||
60 | beacon_reg = 0; | 60 | beacon_reg = 0; |
61 | 61 | ||
62 | ATH5K_TRACE(ah->ah_sc); | ||
63 | |||
64 | switch (op_mode) { | 62 | switch (op_mode) { |
65 | case NL80211_IFTYPE_ADHOC: | 63 | case NL80211_IFTYPE_ADHOC: |
66 | pcu_reg |= AR5K_STA_ID1_ADHOC | AR5K_STA_ID1_KEYSRCH_MODE; | 64 | pcu_reg |= AR5K_STA_ID1_ADHOC | AR5K_STA_ID1_KEYSRCH_MODE; |
@@ -173,7 +171,6 @@ void ath5k_hw_set_ack_bitrate_high(struct ath5k_hw *ah, bool high) | |||
173 | */ | 171 | */ |
174 | static int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout) | 172 | static int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout) |
175 | { | 173 | { |
176 | ATH5K_TRACE(ah->ah_sc); | ||
177 | if (ath5k_hw_clocktoh(ah, AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_ACK)) | 174 | if (ath5k_hw_clocktoh(ah, AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_ACK)) |
178 | <= timeout) | 175 | <= timeout) |
179 | return -EINVAL; | 176 | return -EINVAL; |
@@ -192,7 +189,6 @@ static int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout) | |||
192 | */ | 189 | */ |
193 | static int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout) | 190 | static int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout) |
194 | { | 191 | { |
195 | ATH5K_TRACE(ah->ah_sc); | ||
196 | if (ath5k_hw_clocktoh(ah, AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_CTS)) | 192 | if (ath5k_hw_clocktoh(ah, AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_CTS)) |
197 | <= timeout) | 193 | <= timeout) |
198 | return -EINVAL; | 194 | return -EINVAL; |
@@ -297,7 +293,6 @@ int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac) | |||
297 | u32 low_id, high_id; | 293 | u32 low_id, high_id; |
298 | u32 pcu_reg; | 294 | u32 pcu_reg; |
299 | 295 | ||
300 | ATH5K_TRACE(ah->ah_sc); | ||
301 | /* Set new station ID */ | 296 | /* Set new station ID */ |
302 | memcpy(common->macaddr, mac, ETH_ALEN); | 297 | memcpy(common->macaddr, mac, ETH_ALEN); |
303 | 298 | ||
@@ -357,7 +352,6 @@ void ath5k_hw_set_associd(struct ath5k_hw *ah) | |||
357 | void ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask) | 352 | void ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask) |
358 | { | 353 | { |
359 | struct ath_common *common = ath5k_hw_common(ah); | 354 | struct ath_common *common = ath5k_hw_common(ah); |
360 | ATH5K_TRACE(ah->ah_sc); | ||
361 | 355 | ||
362 | /* Cache bssid mask so that we can restore it | 356 | /* Cache bssid mask so that we can restore it |
363 | * on reset */ | 357 | * on reset */ |
@@ -382,7 +376,6 @@ void ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask) | |||
382 | */ | 376 | */ |
383 | void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah) | 377 | void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah) |
384 | { | 378 | { |
385 | ATH5K_TRACE(ah->ah_sc); | ||
386 | AR5K_REG_DISABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX); | 379 | AR5K_REG_DISABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX); |
387 | } | 380 | } |
388 | 381 | ||
@@ -397,7 +390,6 @@ void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah) | |||
397 | */ | 390 | */ |
398 | void ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah) | 391 | void ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah) |
399 | { | 392 | { |
400 | ATH5K_TRACE(ah->ah_sc); | ||
401 | AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX); | 393 | AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX); |
402 | } | 394 | } |
403 | 395 | ||
@@ -406,8 +398,6 @@ void ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah) | |||
406 | */ | 398 | */ |
407 | void ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1) | 399 | void ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1) |
408 | { | 400 | { |
409 | ATH5K_TRACE(ah->ah_sc); | ||
410 | /* Set the multicat filter */ | ||
411 | ath5k_hw_reg_write(ah, filter0, AR5K_MCAST_FILTER0); | 401 | ath5k_hw_reg_write(ah, filter0, AR5K_MCAST_FILTER0); |
412 | ath5k_hw_reg_write(ah, filter1, AR5K_MCAST_FILTER1); | 402 | ath5k_hw_reg_write(ah, filter1, AR5K_MCAST_FILTER1); |
413 | } | 403 | } |
@@ -427,7 +417,6 @@ u32 ath5k_hw_get_rx_filter(struct ath5k_hw *ah) | |||
427 | { | 417 | { |
428 | u32 data, filter = 0; | 418 | u32 data, filter = 0; |
429 | 419 | ||
430 | ATH5K_TRACE(ah->ah_sc); | ||
431 | filter = ath5k_hw_reg_read(ah, AR5K_RX_FILTER); | 420 | filter = ath5k_hw_reg_read(ah, AR5K_RX_FILTER); |
432 | 421 | ||
433 | /*Radar detection for 5212*/ | 422 | /*Radar detection for 5212*/ |
@@ -457,8 +446,6 @@ void ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter) | |||
457 | { | 446 | { |
458 | u32 data = 0; | 447 | u32 data = 0; |
459 | 448 | ||
460 | ATH5K_TRACE(ah->ah_sc); | ||
461 | |||
462 | /* Set PHY error filter register on 5212*/ | 449 | /* Set PHY error filter register on 5212*/ |
463 | if (ah->ah_version == AR5K_AR5212) { | 450 | if (ah->ah_version == AR5K_AR5212) { |
464 | if (filter & AR5K_RX_FILTER_RADARERR) | 451 | if (filter & AR5K_RX_FILTER_RADARERR) |
@@ -533,8 +520,6 @@ u64 ath5k_hw_get_tsf64(struct ath5k_hw *ah) | |||
533 | 520 | ||
534 | WARN_ON( i == ATH5K_MAX_TSF_READ ); | 521 | WARN_ON( i == ATH5K_MAX_TSF_READ ); |
535 | 522 | ||
536 | ATH5K_TRACE(ah->ah_sc); | ||
537 | |||
538 | return (((u64)tsf_upper1 << 32) | tsf_lower); | 523 | return (((u64)tsf_upper1 << 32) | tsf_lower); |
539 | } | 524 | } |
540 | 525 | ||
@@ -548,8 +533,6 @@ u64 ath5k_hw_get_tsf64(struct ath5k_hw *ah) | |||
548 | */ | 533 | */ |
549 | void ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64) | 534 | void ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64) |
550 | { | 535 | { |
551 | ATH5K_TRACE(ah->ah_sc); | ||
552 | |||
553 | ath5k_hw_reg_write(ah, tsf64 & 0xffffffff, AR5K_TSF_L32); | 536 | ath5k_hw_reg_write(ah, tsf64 & 0xffffffff, AR5K_TSF_L32); |
554 | ath5k_hw_reg_write(ah, (tsf64 >> 32) & 0xffffffff, AR5K_TSF_U32); | 537 | ath5k_hw_reg_write(ah, (tsf64 >> 32) & 0xffffffff, AR5K_TSF_U32); |
555 | } | 538 | } |
@@ -565,8 +548,6 @@ void ath5k_hw_reset_tsf(struct ath5k_hw *ah) | |||
565 | { | 548 | { |
566 | u32 val; | 549 | u32 val; |
567 | 550 | ||
568 | ATH5K_TRACE(ah->ah_sc); | ||
569 | |||
570 | val = ath5k_hw_reg_read(ah, AR5K_BEACON) | AR5K_BEACON_RESET_TSF; | 551 | val = ath5k_hw_reg_read(ah, AR5K_BEACON) | AR5K_BEACON_RESET_TSF; |
571 | 552 | ||
572 | /* | 553 | /* |
@@ -586,7 +567,6 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval) | |||
586 | { | 567 | { |
587 | u32 timer1, timer2, timer3; | 568 | u32 timer1, timer2, timer3; |
588 | 569 | ||
589 | ATH5K_TRACE(ah->ah_sc); | ||
590 | /* | 570 | /* |
591 | * Set the additional timers by mode | 571 | * Set the additional timers by mode |
592 | */ | 572 | */ |
@@ -674,7 +654,6 @@ int ath5k_hw_reset_key(struct ath5k_hw *ah, u16 entry) | |||
674 | unsigned int i, type; | 654 | unsigned int i, type; |
675 | u16 micentry = entry + AR5K_KEYTABLE_MIC_OFFSET; | 655 | u16 micentry = entry + AR5K_KEYTABLE_MIC_OFFSET; |
676 | 656 | ||
677 | ATH5K_TRACE(ah->ah_sc); | ||
678 | AR5K_ASSERT_ENTRY(entry, AR5K_KEYTABLE_SIZE); | 657 | AR5K_ASSERT_ENTRY(entry, AR5K_KEYTABLE_SIZE); |
679 | 658 | ||
680 | type = ath5k_hw_reg_read(ah, AR5K_KEYTABLE_TYPE(entry)); | 659 | type = ath5k_hw_reg_read(ah, AR5K_KEYTABLE_TYPE(entry)); |
@@ -749,8 +728,6 @@ int ath5k_hw_set_key(struct ath5k_hw *ah, u16 entry, | |||
749 | bool is_tkip; | 728 | bool is_tkip; |
750 | const u8 *key_ptr; | 729 | const u8 *key_ptr; |
751 | 730 | ||
752 | ATH5K_TRACE(ah->ah_sc); | ||
753 | |||
754 | is_tkip = (key->alg == ALG_TKIP); | 731 | is_tkip = (key->alg == ALG_TKIP); |
755 | 732 | ||
756 | /* | 733 | /* |
@@ -836,7 +813,6 @@ int ath5k_hw_set_key_lladdr(struct ath5k_hw *ah, u16 entry, const u8 *mac) | |||
836 | { | 813 | { |
837 | u32 low_id, high_id; | 814 | u32 low_id, high_id; |
838 | 815 | ||
839 | ATH5K_TRACE(ah->ah_sc); | ||
840 | /* Invalid entry (key table overflow) */ | 816 | /* Invalid entry (key table overflow) */ |
841 | AR5K_ASSERT_ENTRY(entry, AR5K_KEYTABLE_SIZE); | 817 | AR5K_ASSERT_ENTRY(entry, AR5K_KEYTABLE_SIZE); |
842 | 818 | ||
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c index 492cbb15720d..73c4fcd142bb 100644 --- a/drivers/net/wireless/ath/ath5k/phy.c +++ b/drivers/net/wireless/ath/ath5k/phy.c | |||
@@ -378,8 +378,6 @@ enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah) | |||
378 | u32 data, type; | 378 | u32 data, type; |
379 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 379 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
380 | 380 | ||
381 | ATH5K_TRACE(ah->ah_sc); | ||
382 | |||
383 | if (ah->ah_rf_banks == NULL || | 381 | if (ah->ah_rf_banks == NULL || |
384 | ah->ah_gain.g_state == AR5K_RFGAIN_INACTIVE) | 382 | ah->ah_gain.g_state == AR5K_RFGAIN_INACTIVE) |
385 | return AR5K_RFGAIN_INACTIVE; | 383 | return AR5K_RFGAIN_INACTIVE; |
@@ -1167,7 +1165,7 @@ static s16 ath5k_hw_get_median_noise_floor(struct ath5k_hw *ah) | |||
1167 | * The median of the values in the history is then loaded into the | 1165 | * The median of the values in the history is then loaded into the |
1168 | * hardware for its own use for RSSI and CCA measurements. | 1166 | * hardware for its own use for RSSI and CCA measurements. |
1169 | */ | 1167 | */ |
1170 | static void ath5k_hw_update_noise_floor(struct ath5k_hw *ah) | 1168 | void ath5k_hw_update_noise_floor(struct ath5k_hw *ah) |
1171 | { | 1169 | { |
1172 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 1170 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
1173 | u32 val; | 1171 | u32 val; |
@@ -1248,7 +1246,6 @@ static void ath5k_hw_update_noise_floor(struct ath5k_hw *ah) | |||
1248 | /* | 1246 | /* |
1249 | * Perform a PHY calibration on RF5110 | 1247 | * Perform a PHY calibration on RF5110 |
1250 | * -Fix BPSK/QAM Constellation (I/Q correction) | 1248 | * -Fix BPSK/QAM Constellation (I/Q correction) |
1251 | * -Calculate Noise Floor | ||
1252 | */ | 1249 | */ |
1253 | static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah, | 1250 | static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah, |
1254 | struct ieee80211_channel *channel) | 1251 | struct ieee80211_channel *channel) |
@@ -1335,8 +1332,6 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah, | |||
1335 | return ret; | 1332 | return ret; |
1336 | } | 1333 | } |
1337 | 1334 | ||
1338 | ath5k_hw_update_noise_floor(ah); | ||
1339 | |||
1340 | /* | 1335 | /* |
1341 | * Re-enable RX/TX and beacons | 1336 | * Re-enable RX/TX and beacons |
1342 | */ | 1337 | */ |
@@ -1348,22 +1343,20 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah, | |||
1348 | } | 1343 | } |
1349 | 1344 | ||
1350 | /* | 1345 | /* |
1351 | * Perform a PHY calibration on RF5111/5112 and newer chips | 1346 | * Perform I/Q calibration on RF5111/5112 and newer chips |
1352 | */ | 1347 | */ |
1353 | static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah, | 1348 | static int |
1354 | struct ieee80211_channel *channel) | 1349 | ath5k_hw_rf511x_iq_calibrate(struct ath5k_hw *ah) |
1355 | { | 1350 | { |
1356 | u32 i_pwr, q_pwr; | 1351 | u32 i_pwr, q_pwr; |
1357 | s32 iq_corr, i_coff, i_coffd, q_coff, q_coffd; | 1352 | s32 iq_corr, i_coff, i_coffd, q_coff, q_coffd; |
1358 | int i; | 1353 | int i; |
1359 | ATH5K_TRACE(ah->ah_sc); | ||
1360 | 1354 | ||
1361 | if (!ah->ah_calibration || | 1355 | if (!ah->ah_calibration || |
1362 | ath5k_hw_reg_read(ah, AR5K_PHY_IQ) & AR5K_PHY_IQ_RUN) | 1356 | ath5k_hw_reg_read(ah, AR5K_PHY_IQ) & AR5K_PHY_IQ_RUN) |
1363 | goto done; | 1357 | return 0; |
1364 | 1358 | ||
1365 | /* Calibration has finished, get the results and re-run */ | 1359 | /* Calibration has finished, get the results and re-run */ |
1366 | |||
1367 | /* work around empty results which can apparently happen on 5212 */ | 1360 | /* work around empty results which can apparently happen on 5212 */ |
1368 | for (i = 0; i <= 10; i++) { | 1361 | for (i = 0; i <= 10; i++) { |
1369 | iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR); | 1362 | iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR); |
@@ -1384,7 +1377,7 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah, | |||
1384 | 1377 | ||
1385 | /* protect against divide by 0 and loss of sign bits */ | 1378 | /* protect against divide by 0 and loss of sign bits */ |
1386 | if (i_coffd == 0 || q_coffd < 2) | 1379 | if (i_coffd == 0 || q_coffd < 2) |
1387 | goto done; | 1380 | return -1; |
1388 | 1381 | ||
1389 | i_coff = (-iq_corr) / i_coffd; | 1382 | i_coff = (-iq_corr) / i_coffd; |
1390 | i_coff = clamp(i_coff, -32, 31); /* signed 6 bit */ | 1383 | i_coff = clamp(i_coff, -32, 31); /* signed 6 bit */ |
@@ -1410,17 +1403,6 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah, | |||
1410 | AR5K_PHY_IQ_CAL_NUM_LOG_MAX, 15); | 1403 | AR5K_PHY_IQ_CAL_NUM_LOG_MAX, 15); |
1411 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_RUN); | 1404 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_RUN); |
1412 | 1405 | ||
1413 | done: | ||
1414 | |||
1415 | /* TODO: Separate noise floor calibration from I/Q calibration | ||
1416 | * since noise floor calibration interrupts rx path while I/Q | ||
1417 | * calibration doesn't. We don't need to run noise floor calibration | ||
1418 | * as often as I/Q calibration.*/ | ||
1419 | ath5k_hw_update_noise_floor(ah); | ||
1420 | |||
1421 | /* Initiate a gain_F calibration */ | ||
1422 | ath5k_hw_request_rfgain_probe(ah); | ||
1423 | |||
1424 | return 0; | 1406 | return 0; |
1425 | } | 1407 | } |
1426 | 1408 | ||
@@ -1434,8 +1416,10 @@ int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, | |||
1434 | 1416 | ||
1435 | if (ah->ah_radio == AR5K_RF5110) | 1417 | if (ah->ah_radio == AR5K_RF5110) |
1436 | ret = ath5k_hw_rf5110_calibrate(ah, channel); | 1418 | ret = ath5k_hw_rf5110_calibrate(ah, channel); |
1437 | else | 1419 | else { |
1438 | ret = ath5k_hw_rf511x_calibrate(ah, channel); | 1420 | ret = ath5k_hw_rf511x_iq_calibrate(ah); |
1421 | ath5k_hw_request_rfgain_probe(ah); | ||
1422 | } | ||
1439 | 1423 | ||
1440 | return ret; | 1424 | return ret; |
1441 | } | 1425 | } |
@@ -1693,7 +1677,6 @@ ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah, | |||
1693 | 1677 | ||
1694 | int ath5k_hw_phy_disable(struct ath5k_hw *ah) | 1678 | int ath5k_hw_phy_disable(struct ath5k_hw *ah) |
1695 | { | 1679 | { |
1696 | ATH5K_TRACE(ah->ah_sc); | ||
1697 | /*Just a try M.F.*/ | 1680 | /*Just a try M.F.*/ |
1698 | ath5k_hw_reg_write(ah, AR5K_PHY_ACT_DISABLE, AR5K_PHY_ACT); | 1681 | ath5k_hw_reg_write(ah, AR5K_PHY_ACT_DISABLE, AR5K_PHY_ACT); |
1699 | 1682 | ||
@@ -1709,8 +1692,6 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan) | |||
1709 | u32 srev; | 1692 | u32 srev; |
1710 | u16 ret; | 1693 | u16 ret; |
1711 | 1694 | ||
1712 | ATH5K_TRACE(ah->ah_sc); | ||
1713 | |||
1714 | /* | 1695 | /* |
1715 | * Set the radio chip access register | 1696 | * Set the radio chip access register |
1716 | */ | 1697 | */ |
@@ -1755,8 +1736,6 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan) | |||
1755 | static void /*TODO:Boundary check*/ | 1736 | static void /*TODO:Boundary check*/ |
1756 | ath5k_hw_set_def_antenna(struct ath5k_hw *ah, u8 ant) | 1737 | ath5k_hw_set_def_antenna(struct ath5k_hw *ah, u8 ant) |
1757 | { | 1738 | { |
1758 | ATH5K_TRACE(ah->ah_sc); | ||
1759 | |||
1760 | if (ah->ah_version != AR5K_AR5210) | 1739 | if (ah->ah_version != AR5K_AR5210) |
1761 | ath5k_hw_reg_write(ah, ant & 0x7, AR5K_DEFAULT_ANTENNA); | 1740 | ath5k_hw_reg_write(ah, ant & 0x7, AR5K_DEFAULT_ANTENNA); |
1762 | } | 1741 | } |
@@ -1789,19 +1768,50 @@ ath5k_hw_set_fast_div(struct ath5k_hw *ah, u8 ee_mode, bool enable) | |||
1789 | 1768 | ||
1790 | if (enable) { | 1769 | if (enable) { |
1791 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART, | 1770 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART, |
1792 | AR5K_PHY_RESTART_DIV_GC, 0xc); | 1771 | AR5K_PHY_RESTART_DIV_GC, 1); |
1793 | 1772 | ||
1794 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV, | 1773 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV, |
1795 | AR5K_PHY_FAST_ANT_DIV_EN); | 1774 | AR5K_PHY_FAST_ANT_DIV_EN); |
1796 | } else { | 1775 | } else { |
1797 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART, | 1776 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART, |
1798 | AR5K_PHY_RESTART_DIV_GC, 0x8); | 1777 | AR5K_PHY_RESTART_DIV_GC, 0); |
1799 | 1778 | ||
1800 | AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV, | 1779 | AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV, |
1801 | AR5K_PHY_FAST_ANT_DIV_EN); | 1780 | AR5K_PHY_FAST_ANT_DIV_EN); |
1802 | } | 1781 | } |
1803 | } | 1782 | } |
1804 | 1783 | ||
1784 | void | ||
1785 | ath5k_hw_set_antenna_switch(struct ath5k_hw *ah, u8 ee_mode) | ||
1786 | { | ||
1787 | u8 ant0, ant1; | ||
1788 | |||
1789 | /* | ||
1790 | * In case a fixed antenna was set as default | ||
1791 | * use the same switch table twice. | ||
1792 | */ | ||
1793 | if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_A) | ||
1794 | ant0 = ant1 = AR5K_ANT_SWTABLE_A; | ||
1795 | else if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_B) | ||
1796 | ant0 = ant1 = AR5K_ANT_SWTABLE_B; | ||
1797 | else { | ||
1798 | ant0 = AR5K_ANT_SWTABLE_A; | ||
1799 | ant1 = AR5K_ANT_SWTABLE_B; | ||
1800 | } | ||
1801 | |||
1802 | /* Set antenna idle switch table */ | ||
1803 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_ANT_CTL, | ||
1804 | AR5K_PHY_ANT_CTL_SWTABLE_IDLE, | ||
1805 | (ah->ah_ant_ctl[ee_mode][AR5K_ANT_CTL] | | ||
1806 | AR5K_PHY_ANT_CTL_TXRX_EN)); | ||
1807 | |||
1808 | /* Set antenna switch tables */ | ||
1809 | ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant0], | ||
1810 | AR5K_PHY_ANT_SWITCH_TABLE_0); | ||
1811 | ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant1], | ||
1812 | AR5K_PHY_ANT_SWITCH_TABLE_1); | ||
1813 | } | ||
1814 | |||
1805 | /* | 1815 | /* |
1806 | * Set antenna operating mode | 1816 | * Set antenna operating mode |
1807 | */ | 1817 | */ |
@@ -1823,8 +1833,6 @@ ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode) | |||
1823 | 1833 | ||
1824 | def_ant = ah->ah_def_ant; | 1834 | def_ant = ah->ah_def_ant; |
1825 | 1835 | ||
1826 | ATH5K_TRACE(ah->ah_sc); | ||
1827 | |||
1828 | switch (channel->hw_value & CHANNEL_MODES) { | 1836 | switch (channel->hw_value & CHANNEL_MODES) { |
1829 | case CHANNEL_A: | 1837 | case CHANNEL_A: |
1830 | case CHANNEL_T: | 1838 | case CHANNEL_T: |
@@ -1923,6 +1931,7 @@ ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode) | |||
1923 | if (sta_id1) | 1931 | if (sta_id1) |
1924 | AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, sta_id1); | 1932 | AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, sta_id1); |
1925 | 1933 | ||
1934 | ath5k_hw_set_antenna_switch(ah, ee_mode); | ||
1926 | /* Note: set diversity before default antenna | 1935 | /* Note: set diversity before default antenna |
1927 | * because it won't work correctly */ | 1936 | * because it won't work correctly */ |
1928 | ath5k_hw_set_fast_div(ah, ee_mode, fast_div); | 1937 | ath5k_hw_set_fast_div(ah, ee_mode, fast_div); |
@@ -2988,7 +2997,6 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
2988 | u8 type; | 2997 | u8 type; |
2989 | int ret; | 2998 | int ret; |
2990 | 2999 | ||
2991 | ATH5K_TRACE(ah->ah_sc); | ||
2992 | if (txpower > AR5K_TUNE_MAX_TXPOWER) { | 3000 | if (txpower > AR5K_TUNE_MAX_TXPOWER) { |
2993 | ATH5K_ERR(ah->ah_sc, "invalid tx power: %u\n", txpower); | 3001 | ATH5K_ERR(ah->ah_sc, "invalid tx power: %u\n", txpower); |
2994 | return -EINVAL; | 3002 | return -EINVAL; |
@@ -3084,8 +3092,6 @@ int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower) | |||
3084 | struct ieee80211_channel *channel = ah->ah_current_channel; | 3092 | struct ieee80211_channel *channel = ah->ah_current_channel; |
3085 | u8 ee_mode; | 3093 | u8 ee_mode; |
3086 | 3094 | ||
3087 | ATH5K_TRACE(ah->ah_sc); | ||
3088 | |||
3089 | switch (channel->hw_value & CHANNEL_MODES) { | 3095 | switch (channel->hw_value & CHANNEL_MODES) { |
3090 | case CHANNEL_A: | 3096 | case CHANNEL_A: |
3091 | case CHANNEL_T: | 3097 | case CHANNEL_T: |
diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c index f5831da33f7b..4186ff4c6e9c 100644 --- a/drivers/net/wireless/ath/ath5k/qcu.c +++ b/drivers/net/wireless/ath/ath5k/qcu.c | |||
@@ -31,7 +31,6 @@ Queue Control Unit, DFS Control Unit Functions | |||
31 | int ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, | 31 | int ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, |
32 | struct ath5k_txq_info *queue_info) | 32 | struct ath5k_txq_info *queue_info) |
33 | { | 33 | { |
34 | ATH5K_TRACE(ah->ah_sc); | ||
35 | memcpy(queue_info, &ah->ah_txq[queue], sizeof(struct ath5k_txq_info)); | 34 | memcpy(queue_info, &ah->ah_txq[queue], sizeof(struct ath5k_txq_info)); |
36 | return 0; | 35 | return 0; |
37 | } | 36 | } |
@@ -42,7 +41,6 @@ int ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, | |||
42 | int ath5k_hw_set_tx_queueprops(struct ath5k_hw *ah, int queue, | 41 | int ath5k_hw_set_tx_queueprops(struct ath5k_hw *ah, int queue, |
43 | const struct ath5k_txq_info *queue_info) | 42 | const struct ath5k_txq_info *queue_info) |
44 | { | 43 | { |
45 | ATH5K_TRACE(ah->ah_sc); | ||
46 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); | 44 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); |
47 | 45 | ||
48 | if (ah->ah_txq[queue].tqi_type == AR5K_TX_QUEUE_INACTIVE) | 46 | if (ah->ah_txq[queue].tqi_type == AR5K_TX_QUEUE_INACTIVE) |
@@ -69,8 +67,6 @@ int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type, | |||
69 | unsigned int queue; | 67 | unsigned int queue; |
70 | int ret; | 68 | int ret; |
71 | 69 | ||
72 | ATH5K_TRACE(ah->ah_sc); | ||
73 | |||
74 | /* | 70 | /* |
75 | * Get queue by type | 71 | * Get queue by type |
76 | */ | 72 | */ |
@@ -149,7 +145,6 @@ int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type, | |||
149 | u32 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue) | 145 | u32 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue) |
150 | { | 146 | { |
151 | u32 pending; | 147 | u32 pending; |
152 | ATH5K_TRACE(ah->ah_sc); | ||
153 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); | 148 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); |
154 | 149 | ||
155 | /* Return if queue is declared inactive */ | 150 | /* Return if queue is declared inactive */ |
@@ -177,7 +172,6 @@ u32 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue) | |||
177 | */ | 172 | */ |
178 | void ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue) | 173 | void ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue) |
179 | { | 174 | { |
180 | ATH5K_TRACE(ah->ah_sc); | ||
181 | if (WARN_ON(queue >= ah->ah_capabilities.cap_queues.q_tx_num)) | 175 | if (WARN_ON(queue >= ah->ah_capabilities.cap_queues.q_tx_num)) |
182 | return; | 176 | return; |
183 | 177 | ||
@@ -195,7 +189,6 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) | |||
195 | u32 cw_min, cw_max, retry_lg, retry_sh; | 189 | u32 cw_min, cw_max, retry_lg, retry_sh; |
196 | struct ath5k_txq_info *tq = &ah->ah_txq[queue]; | 190 | struct ath5k_txq_info *tq = &ah->ah_txq[queue]; |
197 | 191 | ||
198 | ATH5K_TRACE(ah->ah_sc); | ||
199 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); | 192 | AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num); |
200 | 193 | ||
201 | tq = &ah->ah_txq[queue]; | 194 | tq = &ah->ah_txq[queue]; |
@@ -523,8 +516,6 @@ int ath5k_hw_set_slot_time(struct ath5k_hw *ah, unsigned int slot_time) | |||
523 | { | 516 | { |
524 | u32 slot_time_clock = ath5k_hw_htoclock(ah, slot_time); | 517 | u32 slot_time_clock = ath5k_hw_htoclock(ah, slot_time); |
525 | 518 | ||
526 | ATH5K_TRACE(ah->ah_sc); | ||
527 | |||
528 | if (slot_time < 6 || slot_time_clock > AR5K_SLOT_TIME_MAX) | 519 | if (slot_time < 6 || slot_time_clock > AR5K_SLOT_TIME_MAX) |
529 | return -EINVAL; | 520 | return -EINVAL; |
530 | 521 | ||
diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c index 307f80e83f94..498aa28ea9e6 100644 --- a/drivers/net/wireless/ath/ath5k/reset.c +++ b/drivers/net/wireless/ath/ath5k/reset.c | |||
@@ -201,8 +201,6 @@ static int ath5k_hw_nic_reset(struct ath5k_hw *ah, u32 val) | |||
201 | int ret; | 201 | int ret; |
202 | u32 mask = val ? val : ~0U; | 202 | u32 mask = val ? val : ~0U; |
203 | 203 | ||
204 | ATH5K_TRACE(ah->ah_sc); | ||
205 | |||
206 | /* Read-and-clear RX Descriptor Pointer*/ | 204 | /* Read-and-clear RX Descriptor Pointer*/ |
207 | ath5k_hw_reg_read(ah, AR5K_RXDP); | 205 | ath5k_hw_reg_read(ah, AR5K_RXDP); |
208 | 206 | ||
@@ -246,7 +244,6 @@ static int ath5k_hw_set_power(struct ath5k_hw *ah, enum ath5k_power_mode mode, | |||
246 | unsigned int i; | 244 | unsigned int i; |
247 | u32 staid, data; | 245 | u32 staid, data; |
248 | 246 | ||
249 | ATH5K_TRACE(ah->ah_sc); | ||
250 | staid = ath5k_hw_reg_read(ah, AR5K_STA_ID1); | 247 | staid = ath5k_hw_reg_read(ah, AR5K_STA_ID1); |
251 | 248 | ||
252 | switch (mode) { | 249 | switch (mode) { |
@@ -393,8 +390,6 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial) | |||
393 | mode = 0; | 390 | mode = 0; |
394 | clock = 0; | 391 | clock = 0; |
395 | 392 | ||
396 | ATH5K_TRACE(ah->ah_sc); | ||
397 | |||
398 | /* Wakeup the device */ | 393 | /* Wakeup the device */ |
399 | ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); | 394 | ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); |
400 | if (ret) { | 395 | if (ret) { |
@@ -734,7 +729,7 @@ static void ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah, | |||
734 | } | 729 | } |
735 | 730 | ||
736 | static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah, | 731 | static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah, |
737 | struct ieee80211_channel *channel, u8 *ant, u8 ee_mode) | 732 | struct ieee80211_channel *channel, u8 ee_mode) |
738 | { | 733 | { |
739 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 734 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
740 | s16 cck_ofdm_pwr_delta; | 735 | s16 cck_ofdm_pwr_delta; |
@@ -768,17 +763,9 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah, | |||
768 | ee->ee_cck_ofdm_gain_delta; | 763 | ee->ee_cck_ofdm_gain_delta; |
769 | } | 764 | } |
770 | 765 | ||
771 | /* Set antenna idle switch table */ | 766 | /* XXX: necessary here? is called from ath5k_hw_set_antenna_mode() |
772 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_ANT_CTL, | 767 | * too */ |
773 | AR5K_PHY_ANT_CTL_SWTABLE_IDLE, | 768 | ath5k_hw_set_antenna_switch(ah, ee_mode); |
774 | (ah->ah_ant_ctl[ee_mode][0] | | ||
775 | AR5K_PHY_ANT_CTL_TXRX_EN)); | ||
776 | |||
777 | /* Set antenna switch tables */ | ||
778 | ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant[0]], | ||
779 | AR5K_PHY_ANT_SWITCH_TABLE_0); | ||
780 | ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant[1]], | ||
781 | AR5K_PHY_ANT_SWITCH_TABLE_1); | ||
782 | 769 | ||
783 | /* Noise floor threshold */ | 770 | /* Noise floor threshold */ |
784 | ath5k_hw_reg_write(ah, | 771 | ath5k_hw_reg_write(ah, |
@@ -855,7 +842,6 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah, | |||
855 | AR5K_PHY_NF_THRESH62, | 842 | AR5K_PHY_NF_THRESH62, |
856 | ee->ee_thr_62[ee_mode]); | 843 | ee->ee_thr_62[ee_mode]); |
857 | 844 | ||
858 | |||
859 | /* False detect backoff for channels | 845 | /* False detect backoff for channels |
860 | * that have spur noise. Write the new | 846 | * that have spur noise. Write the new |
861 | * cyclic power RSSI threshold. */ | 847 | * cyclic power RSSI threshold. */ |
@@ -891,14 +877,11 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, | |||
891 | struct ieee80211_channel *channel, bool change_channel) | 877 | struct ieee80211_channel *channel, bool change_channel) |
892 | { | 878 | { |
893 | struct ath_common *common = ath5k_hw_common(ah); | 879 | struct ath_common *common = ath5k_hw_common(ah); |
894 | u32 s_seq[10], s_ant, s_led[3], staid1_flags, tsf_up, tsf_lo; | 880 | u32 s_seq[10], s_led[3], staid1_flags, tsf_up, tsf_lo; |
895 | u32 phy_tst1; | 881 | u32 phy_tst1; |
896 | u8 mode, freq, ee_mode, ant[2]; | 882 | u8 mode, freq, ee_mode; |
897 | int i, ret; | 883 | int i, ret; |
898 | 884 | ||
899 | ATH5K_TRACE(ah->ah_sc); | ||
900 | |||
901 | s_ant = 0; | ||
902 | ee_mode = 0; | 885 | ee_mode = 0; |
903 | staid1_flags = 0; | 886 | staid1_flags = 0; |
904 | tsf_up = 0; | 887 | tsf_up = 0; |
@@ -995,9 +978,6 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, | |||
995 | } | 978 | } |
996 | } | 979 | } |
997 | 980 | ||
998 | /* Save default antenna */ | ||
999 | s_ant = ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA); | ||
1000 | |||
1001 | if (ah->ah_version == AR5K_AR5212) { | 981 | if (ah->ah_version == AR5K_AR5212) { |
1002 | /* Restore normal 32/40MHz clock operation | 982 | /* Restore normal 32/40MHz clock operation |
1003 | * to avoid register access delay on certain | 983 | * to avoid register access delay on certain |
@@ -1094,22 +1074,17 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, | |||
1094 | /* Write OFDM timings on 5212*/ | 1074 | /* Write OFDM timings on 5212*/ |
1095 | if (ah->ah_version == AR5K_AR5212 && | 1075 | if (ah->ah_version == AR5K_AR5212 && |
1096 | channel->hw_value & CHANNEL_OFDM) { | 1076 | channel->hw_value & CHANNEL_OFDM) { |
1097 | struct ath5k_eeprom_info *ee = | ||
1098 | &ah->ah_capabilities.cap_eeprom; | ||
1099 | 1077 | ||
1100 | ret = ath5k_hw_write_ofdm_timings(ah, channel); | 1078 | ret = ath5k_hw_write_ofdm_timings(ah, channel); |
1101 | if (ret) | 1079 | if (ret) |
1102 | return ret; | 1080 | return ret; |
1103 | 1081 | ||
1104 | /* Note: According to docs we can have a newer | 1082 | /* Spur info is available only from EEPROM versions |
1105 | * EEPROM on old hardware, so we need to verify | 1083 | * bigger than 5.3 but but the EEPOM routines will use |
1106 | * that our hardware is new enough to have spur | 1084 | * static values for older versions */ |
1107 | * mitigation registers (delta phase etc) */ | 1085 | if (ah->ah_mac_srev >= AR5K_SREV_AR5424) |
1108 | if (ah->ah_mac_srev >= AR5K_SREV_AR5424 || | ||
1109 | (ah->ah_mac_srev >= AR5K_SREV_AR5424 && | ||
1110 | ee->ee_version >= AR5K_EEPROM_VERSION_5_3)) | ||
1111 | ath5k_hw_set_spur_mitigation_filter(ah, | 1086 | ath5k_hw_set_spur_mitigation_filter(ah, |
1112 | channel); | 1087 | channel); |
1113 | } | 1088 | } |
1114 | 1089 | ||
1115 | /*Enable/disable 802.11b mode on 5111 | 1090 | /*Enable/disable 802.11b mode on 5111 |
@@ -1123,21 +1098,8 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, | |||
1123 | AR5K_TXCFG_B_MODE); | 1098 | AR5K_TXCFG_B_MODE); |
1124 | } | 1099 | } |
1125 | 1100 | ||
1126 | /* | ||
1127 | * In case a fixed antenna was set as default | ||
1128 | * use the same switch table twice. | ||
1129 | */ | ||
1130 | if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_A) | ||
1131 | ant[0] = ant[1] = AR5K_ANT_SWTABLE_A; | ||
1132 | else if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_B) | ||
1133 | ant[0] = ant[1] = AR5K_ANT_SWTABLE_B; | ||
1134 | else { | ||
1135 | ant[0] = AR5K_ANT_SWTABLE_A; | ||
1136 | ant[1] = AR5K_ANT_SWTABLE_B; | ||
1137 | } | ||
1138 | |||
1139 | /* Commit values from EEPROM */ | 1101 | /* Commit values from EEPROM */ |
1140 | ath5k_hw_commit_eeprom_settings(ah, channel, ant, ee_mode); | 1102 | ath5k_hw_commit_eeprom_settings(ah, channel, ee_mode); |
1141 | 1103 | ||
1142 | } else { | 1104 | } else { |
1143 | /* | 1105 | /* |
@@ -1175,8 +1137,6 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, | |||
1175 | ath5k_hw_reg_write(ah, tsf_lo, AR5K_TSF_L32); | 1137 | ath5k_hw_reg_write(ah, tsf_lo, AR5K_TSF_L32); |
1176 | } | 1138 | } |
1177 | } | 1139 | } |
1178 | |||
1179 | ath5k_hw_reg_write(ah, s_ant, AR5K_DEFAULT_ANTENNA); | ||
1180 | } | 1140 | } |
1181 | 1141 | ||
1182 | /* Ledstate */ | 1142 | /* Ledstate */ |
diff --git a/drivers/net/wireless/ath/ath5k/sysfs.c b/drivers/net/wireless/ath/ath5k/sysfs.c new file mode 100644 index 000000000000..90757de7bf59 --- /dev/null +++ b/drivers/net/wireless/ath/ath5k/sysfs.c | |||
@@ -0,0 +1,116 @@ | |||
1 | #include <linux/device.h> | ||
2 | #include <linux/pci.h> | ||
3 | |||
4 | #include "base.h" | ||
5 | #include "ath5k.h" | ||
6 | #include "reg.h" | ||
7 | |||
8 | #define SIMPLE_SHOW_STORE(name, get, set) \ | ||
9 | static ssize_t ath5k_attr_show_##name(struct device *dev, \ | ||
10 | struct device_attribute *attr, \ | ||
11 | char *buf) \ | ||
12 | { \ | ||
13 | struct ath5k_softc *sc = dev_get_drvdata(dev); \ | ||
14 | return snprintf(buf, PAGE_SIZE, "%d\n", get); \ | ||
15 | } \ | ||
16 | \ | ||
17 | static ssize_t ath5k_attr_store_##name(struct device *dev, \ | ||
18 | struct device_attribute *attr, \ | ||
19 | const char *buf, size_t count) \ | ||
20 | { \ | ||
21 | struct ath5k_softc *sc = dev_get_drvdata(dev); \ | ||
22 | int val; \ | ||
23 | \ | ||
24 | val = (int)simple_strtoul(buf, NULL, 10); \ | ||
25 | set(sc->ah, val); \ | ||
26 | return count; \ | ||
27 | } \ | ||
28 | static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, \ | ||
29 | ath5k_attr_show_##name, ath5k_attr_store_##name) | ||
30 | |||
31 | #define SIMPLE_SHOW(name, get) \ | ||
32 | static ssize_t ath5k_attr_show_##name(struct device *dev, \ | ||
33 | struct device_attribute *attr, \ | ||
34 | char *buf) \ | ||
35 | { \ | ||
36 | struct ath5k_softc *sc = dev_get_drvdata(dev); \ | ||
37 | return snprintf(buf, PAGE_SIZE, "%d\n", get); \ | ||
38 | } \ | ||
39 | static DEVICE_ATTR(name, S_IRUGO, ath5k_attr_show_##name, NULL) | ||
40 | |||
41 | /*** ANI ***/ | ||
42 | |||
43 | SIMPLE_SHOW_STORE(ani_mode, sc->ani_state.ani_mode, ath5k_ani_init); | ||
44 | SIMPLE_SHOW_STORE(noise_immunity_level, sc->ani_state.noise_imm_level, | ||
45 | ath5k_ani_set_noise_immunity_level); | ||
46 | SIMPLE_SHOW_STORE(spur_level, sc->ani_state.spur_level, | ||
47 | ath5k_ani_set_spur_immunity_level); | ||
48 | SIMPLE_SHOW_STORE(firstep_level, sc->ani_state.firstep_level, | ||
49 | ath5k_ani_set_firstep_level); | ||
50 | SIMPLE_SHOW_STORE(ofdm_weak_signal_detection, sc->ani_state.ofdm_weak_sig, | ||
51 | ath5k_ani_set_ofdm_weak_signal_detection); | ||
52 | SIMPLE_SHOW_STORE(cck_weak_signal_detection, sc->ani_state.cck_weak_sig, | ||
53 | ath5k_ani_set_cck_weak_signal_detection); | ||
54 | SIMPLE_SHOW(spur_level_max, sc->ani_state.max_spur_level); | ||
55 | |||
56 | static ssize_t ath5k_attr_show_noise_immunity_level_max(struct device *dev, | ||
57 | struct device_attribute *attr, | ||
58 | char *buf) | ||
59 | { | ||
60 | return snprintf(buf, PAGE_SIZE, "%d\n", ATH5K_ANI_MAX_NOISE_IMM_LVL); | ||
61 | } | ||
62 | static DEVICE_ATTR(noise_immunity_level_max, S_IRUGO, | ||
63 | ath5k_attr_show_noise_immunity_level_max, NULL); | ||
64 | |||
65 | static ssize_t ath5k_attr_show_firstep_level_max(struct device *dev, | ||
66 | struct device_attribute *attr, | ||
67 | char *buf) | ||
68 | { | ||
69 | return snprintf(buf, PAGE_SIZE, "%d\n", ATH5K_ANI_MAX_FIRSTEP_LVL); | ||
70 | } | ||
71 | static DEVICE_ATTR(firstep_level_max, S_IRUGO, | ||
72 | ath5k_attr_show_firstep_level_max, NULL); | ||
73 | |||
74 | static struct attribute *ath5k_sysfs_entries_ani[] = { | ||
75 | &dev_attr_ani_mode.attr, | ||
76 | &dev_attr_noise_immunity_level.attr, | ||
77 | &dev_attr_spur_level.attr, | ||
78 | &dev_attr_firstep_level.attr, | ||
79 | &dev_attr_ofdm_weak_signal_detection.attr, | ||
80 | &dev_attr_cck_weak_signal_detection.attr, | ||
81 | &dev_attr_noise_immunity_level_max.attr, | ||
82 | &dev_attr_spur_level_max.attr, | ||
83 | &dev_attr_firstep_level_max.attr, | ||
84 | NULL | ||
85 | }; | ||
86 | |||
87 | static struct attribute_group ath5k_attribute_group_ani = { | ||
88 | .name = "ani", | ||
89 | .attrs = ath5k_sysfs_entries_ani, | ||
90 | }; | ||
91 | |||
92 | |||
93 | /*** register / unregister ***/ | ||
94 | |||
95 | int | ||
96 | ath5k_sysfs_register(struct ath5k_softc *sc) | ||
97 | { | ||
98 | struct device *dev = &sc->pdev->dev; | ||
99 | int err; | ||
100 | |||
101 | err = sysfs_create_group(&dev->kobj, &ath5k_attribute_group_ani); | ||
102 | if (err) { | ||
103 | ATH5K_ERR(sc, "failed to create sysfs group\n"); | ||
104 | return err; | ||
105 | } | ||
106 | |||
107 | return 0; | ||
108 | } | ||
109 | |||
110 | void | ||
111 | ath5k_sysfs_unregister(struct ath5k_softc *sc) | ||
112 | { | ||
113 | struct device *dev = &sc->pdev->dev; | ||
114 | |||
115 | sysfs_remove_group(&dev->kobj, &ath5k_attribute_group_ani); | ||
116 | } | ||
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c index ba8b20f01594..3da820ffc65e 100644 --- a/drivers/net/wireless/ath/ath9k/ani.c +++ b/drivers/net/wireless/ath/ath9k/ani.c | |||
@@ -495,6 +495,7 @@ void ath9k_hw_disable_mib_counters(struct ath_hw *ah) | |||
495 | REG_WRITE(ah, AR_FILT_OFDM, 0); | 495 | REG_WRITE(ah, AR_FILT_OFDM, 0); |
496 | REG_WRITE(ah, AR_FILT_CCK, 0); | 496 | REG_WRITE(ah, AR_FILT_CCK, 0); |
497 | } | 497 | } |
498 | EXPORT_SYMBOL(ath9k_hw_disable_mib_counters); | ||
498 | 499 | ||
499 | u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah, | 500 | u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah, |
500 | u32 *rxc_pcnt, | 501 | u32 *rxc_pcnt, |
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c index b2c17c98bb38..96018d53f48e 100644 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c | |||
@@ -742,17 +742,6 @@ static int ar5008_hw_process_ini(struct ath_hw *ah, | |||
742 | return -EINVAL; | 742 | return -EINVAL; |
743 | } | 743 | } |
744 | 744 | ||
745 | if (AR_SREV_9287_12_OR_LATER(ah)) { | ||
746 | /* Enable ASYNC FIFO */ | ||
747 | REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3, | ||
748 | AR_MAC_PCU_ASYNC_FIFO_REG3_DATAPATH_SEL); | ||
749 | REG_SET_BIT(ah, AR_PHY_MODE, AR_PHY_MODE_ASYNCFIFO); | ||
750 | REG_CLR_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3, | ||
751 | AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET); | ||
752 | REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3, | ||
753 | AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET); | ||
754 | } | ||
755 | |||
756 | /* | 745 | /* |
757 | * Set correct baseband to analog shift setting to | 746 | * Set correct baseband to analog shift setting to |
758 | * access analog chips. | 747 | * access analog chips. |
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c index a8a8cdc04afa..7ba9dd68cc05 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include "ar5008_initvals.h" | 18 | #include "ar5008_initvals.h" |
19 | #include "ar9001_initvals.h" | 19 | #include "ar9001_initvals.h" |
20 | #include "ar9002_initvals.h" | 20 | #include "ar9002_initvals.h" |
21 | #include "ar9002_phy.h" | ||
21 | 22 | ||
22 | /* General hardware code for the A5008/AR9001/AR9002 hadware families */ | 23 | /* General hardware code for the A5008/AR9001/AR9002 hadware families */ |
23 | 24 | ||
@@ -436,55 +437,84 @@ static void ar9002_hw_configpcipowersave(struct ath_hw *ah, | |||
436 | } | 437 | } |
437 | 438 | ||
438 | udelay(1000); | 439 | udelay(1000); |
440 | } | ||
439 | 441 | ||
440 | /* set bit 19 to allow forcing of pcie core into L1 state */ | 442 | if (power_off) { |
441 | REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); | 443 | /* clear bit 19 to disable L1 */ |
444 | REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); | ||
442 | 445 | ||
443 | /* Several PCIe massages to ensure proper behaviour */ | 446 | val = REG_READ(ah, AR_WA); |
447 | |||
448 | /* | ||
449 | * Set PCIe workaround bits | ||
450 | * In AR9280 and AR9285, bit 14 in WA register (disable L1) | ||
451 | * should only be set when device enters D3 and be | ||
452 | * cleared when device comes back to D0. | ||
453 | */ | ||
454 | if (ah->config.pcie_waen) { | ||
455 | if (ah->config.pcie_waen & AR_WA_D3_L1_DISABLE) | ||
456 | val |= AR_WA_D3_L1_DISABLE; | ||
457 | } else { | ||
458 | if (((AR_SREV_9285(ah) || | ||
459 | AR_SREV_9271(ah) || | ||
460 | AR_SREV_9287(ah)) && | ||
461 | (AR9285_WA_DEFAULT & AR_WA_D3_L1_DISABLE)) || | ||
462 | (AR_SREV_9280(ah) && | ||
463 | (AR9280_WA_DEFAULT & AR_WA_D3_L1_DISABLE))) { | ||
464 | val |= AR_WA_D3_L1_DISABLE; | ||
465 | } | ||
466 | } | ||
467 | |||
468 | if (AR_SREV_9280(ah) || AR_SREV_9285(ah) || AR_SREV_9287(ah)) { | ||
469 | /* | ||
470 | * Disable bit 6 and 7 before entering D3 to | ||
471 | * prevent system hang. | ||
472 | */ | ||
473 | val &= ~(AR_WA_BIT6 | AR_WA_BIT7); | ||
474 | } | ||
475 | |||
476 | if (AR_SREV_9285E_20(ah)) | ||
477 | val |= AR_WA_BIT23; | ||
478 | |||
479 | REG_WRITE(ah, AR_WA, val); | ||
480 | } else { | ||
444 | if (ah->config.pcie_waen) { | 481 | if (ah->config.pcie_waen) { |
445 | val = ah->config.pcie_waen; | 482 | val = ah->config.pcie_waen; |
446 | if (!power_off) | 483 | if (!power_off) |
447 | val &= (~AR_WA_D3_L1_DISABLE); | 484 | val &= (~AR_WA_D3_L1_DISABLE); |
448 | } else { | 485 | } else { |
449 | if (AR_SREV_9285(ah) || AR_SREV_9271(ah) || | 486 | if (AR_SREV_9285(ah) || |
487 | AR_SREV_9271(ah) || | ||
450 | AR_SREV_9287(ah)) { | 488 | AR_SREV_9287(ah)) { |
451 | val = AR9285_WA_DEFAULT; | 489 | val = AR9285_WA_DEFAULT; |
452 | if (!power_off) | 490 | if (!power_off) |
453 | val &= (~AR_WA_D3_L1_DISABLE); | 491 | val &= (~AR_WA_D3_L1_DISABLE); |
454 | } else if (AR_SREV_9280(ah)) { | 492 | } |
493 | else if (AR_SREV_9280(ah)) { | ||
455 | /* | 494 | /* |
456 | * On AR9280 chips bit 22 of 0x4004 needs to be | 495 | * For AR9280 chips, bit 22 of 0x4004 |
457 | * set otherwise card may disappear. | 496 | * needs to be set. |
458 | */ | 497 | */ |
459 | val = AR9280_WA_DEFAULT; | 498 | val = AR9280_WA_DEFAULT; |
460 | if (!power_off) | 499 | if (!power_off) |
461 | val &= (~AR_WA_D3_L1_DISABLE); | 500 | val &= (~AR_WA_D3_L1_DISABLE); |
462 | } else | 501 | } else { |
463 | val = AR_WA_DEFAULT; | 502 | val = AR_WA_DEFAULT; |
503 | } | ||
504 | } | ||
505 | |||
506 | /* WAR for ASPM system hang */ | ||
507 | if (AR_SREV_9280(ah) || AR_SREV_9285(ah) || AR_SREV_9287(ah)) { | ||
508 | val |= (AR_WA_BIT6 | AR_WA_BIT7); | ||
464 | } | 509 | } |
465 | 510 | ||
511 | if (AR_SREV_9285E_20(ah)) | ||
512 | val |= AR_WA_BIT23; | ||
513 | |||
466 | REG_WRITE(ah, AR_WA, val); | 514 | REG_WRITE(ah, AR_WA, val); |
467 | } | ||
468 | 515 | ||
469 | if (power_off) { | 516 | /* set bit 19 to allow forcing of pcie core into L1 state */ |
470 | /* | 517 | REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); |
471 | * Set PCIe workaround bits | ||
472 | * bit 14 in WA register (disable L1) should only | ||
473 | * be set when device enters D3 and be cleared | ||
474 | * when device comes back to D0. | ||
475 | */ | ||
476 | if (ah->config.pcie_waen) { | ||
477 | if (ah->config.pcie_waen & AR_WA_D3_L1_DISABLE) | ||
478 | REG_SET_BIT(ah, AR_WA, AR_WA_D3_L1_DISABLE); | ||
479 | } else { | ||
480 | if (((AR_SREV_9285(ah) || AR_SREV_9271(ah) || | ||
481 | AR_SREV_9287(ah)) && | ||
482 | (AR9285_WA_DEFAULT & AR_WA_D3_L1_DISABLE)) || | ||
483 | (AR_SREV_9280(ah) && | ||
484 | (AR9280_WA_DEFAULT & AR_WA_D3_L1_DISABLE))) { | ||
485 | REG_SET_BIT(ah, AR_WA, AR_WA_D3_L1_DISABLE); | ||
486 | } | ||
487 | } | ||
488 | } | 518 | } |
489 | } | 519 | } |
490 | 520 | ||
@@ -536,18 +566,29 @@ int ar9002_hw_rf_claim(struct ath_hw *ah) | |||
536 | return 0; | 566 | return 0; |
537 | } | 567 | } |
538 | 568 | ||
569 | void ar9002_hw_enable_async_fifo(struct ath_hw *ah) | ||
570 | { | ||
571 | if (AR_SREV_9287_13_OR_LATER(ah)) { | ||
572 | REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3, | ||
573 | AR_MAC_PCU_ASYNC_FIFO_REG3_DATAPATH_SEL); | ||
574 | REG_SET_BIT(ah, AR_PHY_MODE, AR_PHY_MODE_ASYNCFIFO); | ||
575 | REG_CLR_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3, | ||
576 | AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET); | ||
577 | REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3, | ||
578 | AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET); | ||
579 | } | ||
580 | } | ||
581 | |||
539 | /* | 582 | /* |
540 | * Enable ASYNC FIFO | ||
541 | * | ||
542 | * If Async FIFO is enabled, the following counters change as MAC now runs | 583 | * If Async FIFO is enabled, the following counters change as MAC now runs |
543 | * at 117 Mhz instead of 88/44MHz when async FIFO is disabled. | 584 | * at 117 Mhz instead of 88/44MHz when async FIFO is disabled. |
544 | * | 585 | * |
545 | * The values below tested for ht40 2 chain. | 586 | * The values below tested for ht40 2 chain. |
546 | * Overwrite the delay/timeouts initialized in process ini. | 587 | * Overwrite the delay/timeouts initialized in process ini. |
547 | */ | 588 | */ |
548 | void ar9002_hw_enable_async_fifo(struct ath_hw *ah) | 589 | void ar9002_hw_update_async_fifo(struct ath_hw *ah) |
549 | { | 590 | { |
550 | if (AR_SREV_9287_12_OR_LATER(ah)) { | 591 | if (AR_SREV_9287_13_OR_LATER(ah)) { |
551 | REG_WRITE(ah, AR_D_GBL_IFS_SIFS, | 592 | REG_WRITE(ah, AR_D_GBL_IFS_SIFS, |
552 | AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR); | 593 | AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR); |
553 | REG_WRITE(ah, AR_D_GBL_IFS_SLOT, | 594 | REG_WRITE(ah, AR_D_GBL_IFS_SLOT, |
@@ -571,9 +612,9 @@ void ar9002_hw_enable_async_fifo(struct ath_hw *ah) | |||
571 | */ | 612 | */ |
572 | void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah) | 613 | void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah) |
573 | { | 614 | { |
574 | if (AR_SREV_9287_12_OR_LATER(ah)) { | 615 | if (AR_SREV_9287_13_OR_LATER(ah)) { |
575 | REG_SET_BIT(ah, AR_PCU_MISC_MODE2, | 616 | REG_SET_BIT(ah, AR_PCU_MISC_MODE2, |
576 | AR_PCU_MISC_MODE2_ENABLE_AGGWEP); | 617 | AR_PCU_MISC_MODE2_ENABLE_AGGWEP); |
577 | } | 618 | } |
578 | } | 619 | } |
579 | 620 | ||
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_initvals.h b/drivers/net/wireless/ath/ath9k/ar9002_initvals.h index dae7f3304eb8..8ab24ee8564b 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_initvals.h +++ b/drivers/net/wireless/ath/ath9k/ar9002_initvals.h | |||
@@ -4492,7 +4492,7 @@ static const u32 ar9287PciePhy_clkreq_off_L1_9287_1_1[][2] = { | |||
4492 | }; | 4492 | }; |
4493 | 4493 | ||
4494 | 4494 | ||
4495 | /* AR9271 initialization values automaticaly created: 06/04/09 */ | 4495 | /* AR9271 initialization values automaticaly created: 03/31/10 */ |
4496 | static const u32 ar9271Modes_9271[][6] = { | 4496 | static const u32 ar9271Modes_9271[][6] = { |
4497 | { 0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0 }, | 4497 | { 0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0 }, |
4498 | { 0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0 }, | 4498 | { 0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0 }, |
@@ -5011,7 +5011,7 @@ static const u32 ar9271Common_9271[][2] = { | |||
5011 | { 0x0000783c, 0x72ee0a72 }, | 5011 | { 0x0000783c, 0x72ee0a72 }, |
5012 | { 0x00007840, 0xbbfffffc }, | 5012 | { 0x00007840, 0xbbfffffc }, |
5013 | { 0x00007844, 0x000c0db6 }, | 5013 | { 0x00007844, 0x000c0db6 }, |
5014 | { 0x00007848, 0x6db61b6f }, | 5014 | { 0x00007848, 0x6db6246f }, |
5015 | { 0x0000784c, 0x6d9b66db }, | 5015 | { 0x0000784c, 0x6d9b66db }, |
5016 | { 0x00007850, 0x6d8c6dba }, | 5016 | { 0x00007850, 0x6d8c6dba }, |
5017 | { 0x00007854, 0x00040000 }, | 5017 | { 0x00007854, 0x00040000 }, |
@@ -5218,7 +5218,7 @@ static const u32 ar9271Modes_high_power_tx_gain_9271[][6] = { | |||
5218 | { 0x00007824, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff }, | 5218 | { 0x00007824, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff }, |
5219 | { 0x0000786c, 0x08609eb6, 0x08609eb6, 0x08609eba, 0x08609eba, 0x08609eb6 }, | 5219 | { 0x0000786c, 0x08609eb6, 0x08609eb6, 0x08609eba, 0x08609eba, 0x08609eb6 }, |
5220 | { 0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00 }, | 5220 | { 0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00 }, |
5221 | { 0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a212652, 0x0a212652, 0x0a22a652 }, | 5221 | { 0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a214652, 0x0a214652, 0x0a22a652 }, |
5222 | { 0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7 }, | 5222 | { 0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7 }, |
5223 | { 0x0000a27c, 0x05018063, 0x05038063, 0x05018063, 0x05018063, 0x05018063 }, | 5223 | { 0x0000a27c, 0x05018063, 0x05038063, 0x05018063, 0x05018063, 0x05018063 }, |
5224 | { 0x0000a394, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63 }, | 5224 | { 0x0000a394, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63 }, |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p0_initvals.h index db019dd220b7..f82a00da82b8 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_initvals.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_2p0_initvals.h | |||
@@ -14,8 +14,8 @@ | |||
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | #ifndef INITVALS_9003_H | 17 | #ifndef INITVALS_9003_2P0_H |
18 | #define INITVALS_9003_H | 18 | #define INITVALS_9003_2P0_H |
19 | 19 | ||
20 | /* AR9003 2.0 */ | 20 | /* AR9003 2.0 */ |
21 | 21 | ||
@@ -1781,4 +1781,4 @@ static const u32 ar9300PciePhy_clkreq_disable_L1_2p0[][2] = { | |||
1781 | {0x00004044, 0x00000000}, | 1781 | {0x00004044, 0x00000000}, |
1782 | }; | 1782 | }; |
1783 | 1783 | ||
1784 | #endif /* INITVALS_9003_H */ | 1784 | #endif /* INITVALS_9003_2P0_H */ |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h new file mode 100644 index 000000000000..745150573793 --- /dev/null +++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h | |||
@@ -0,0 +1,1785 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2010 Atheros Communications Inc. | ||
3 | * | ||
4 | * Permission to use, copy, modify, and/or distribute this software for any | ||
5 | * purpose with or without fee is hereby granted, provided that the above | ||
6 | * copyright notice and this permission notice appear in all copies. | ||
7 | * | ||
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | ||
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | ||
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | ||
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | ||
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | ||
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | ||
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | ||
15 | */ | ||
16 | |||
17 | #ifndef INITVALS_9003_2P2_H | ||
18 | #define INITVALS_9003_2P2_H | ||
19 | |||
20 | /* AR9003 2.2 */ | ||
21 | |||
22 | static const u32 ar9300_2p2_radio_postamble[][5] = { | ||
23 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
24 | {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31}, | ||
25 | {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800}, | ||
26 | {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20}, | ||
27 | {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, | ||
28 | {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, | ||
29 | {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, | ||
30 | {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, | ||
31 | {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, | ||
32 | {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, | ||
33 | }; | ||
34 | |||
35 | static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = { | ||
36 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
37 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | ||
38 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
39 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, | ||
40 | {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, | ||
41 | {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, | ||
42 | {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, | ||
43 | {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, | ||
44 | {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, | ||
45 | {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, | ||
46 | {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, | ||
47 | {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, | ||
48 | {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, | ||
49 | {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, | ||
50 | {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, | ||
51 | {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, | ||
52 | {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, | ||
53 | {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, | ||
54 | {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, | ||
55 | {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, | ||
56 | {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, | ||
57 | {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83}, | ||
58 | {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84}, | ||
59 | {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3}, | ||
60 | {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5}, | ||
61 | {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9}, | ||
62 | {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb}, | ||
63 | {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
64 | {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
65 | {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
66 | {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
67 | {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
68 | {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
69 | {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
70 | {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
71 | {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, | ||
72 | {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, | ||
73 | {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, | ||
74 | {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, | ||
75 | {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, | ||
76 | {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, | ||
77 | {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, | ||
78 | {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, | ||
79 | {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, | ||
80 | {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, | ||
81 | {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, | ||
82 | {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, | ||
83 | {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, | ||
84 | {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, | ||
85 | {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, | ||
86 | {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, | ||
87 | {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, | ||
88 | {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, | ||
89 | {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83}, | ||
90 | {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84}, | ||
91 | {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3}, | ||
92 | {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5}, | ||
93 | {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9}, | ||
94 | {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb}, | ||
95 | {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
96 | {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
97 | {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
98 | {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
99 | {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
100 | {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
101 | {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
102 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
103 | {0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, | ||
104 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
105 | {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
106 | {0x00016448, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, | ||
107 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
108 | {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
109 | {0x00016848, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, | ||
110 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
111 | }; | ||
112 | |||
113 | static const u32 ar9300Modes_fast_clock_2p2[][3] = { | ||
114 | /* Addr 5G_HT20 5G_HT40 */ | ||
115 | {0x00001030, 0x00000268, 0x000004d0}, | ||
116 | {0x00001070, 0x0000018c, 0x00000318}, | ||
117 | {0x000010b0, 0x00000fd0, 0x00001fa0}, | ||
118 | {0x00008014, 0x044c044c, 0x08980898}, | ||
119 | {0x0000801c, 0x148ec02b, 0x148ec057}, | ||
120 | {0x00008318, 0x000044c0, 0x00008980}, | ||
121 | {0x00009e00, 0x03721821, 0x03721821}, | ||
122 | {0x0000a230, 0x0000000b, 0x00000016}, | ||
123 | {0x0000a254, 0x00000898, 0x00001130}, | ||
124 | }; | ||
125 | |||
126 | static const u32 ar9300_2p2_radio_core[][2] = { | ||
127 | /* Addr allmodes */ | ||
128 | {0x00016000, 0x36db6db6}, | ||
129 | {0x00016004, 0x6db6db40}, | ||
130 | {0x00016008, 0x73f00000}, | ||
131 | {0x0001600c, 0x00000000}, | ||
132 | {0x00016040, 0x7f80fff8}, | ||
133 | {0x0001604c, 0x76d005b5}, | ||
134 | {0x00016050, 0x556cf031}, | ||
135 | {0x00016054, 0x13449440}, | ||
136 | {0x00016058, 0x0c51c92c}, | ||
137 | {0x0001605c, 0x3db7fffc}, | ||
138 | {0x00016060, 0xfffffffc}, | ||
139 | {0x00016064, 0x000f0278}, | ||
140 | {0x0001606c, 0x6db60000}, | ||
141 | {0x00016080, 0x00000000}, | ||
142 | {0x00016084, 0x0e48048c}, | ||
143 | {0x00016088, 0x54214514}, | ||
144 | {0x0001608c, 0x119f481e}, | ||
145 | {0x00016090, 0x24926490}, | ||
146 | {0x00016098, 0xd2888888}, | ||
147 | {0x000160a0, 0x0a108ffe}, | ||
148 | {0x000160a4, 0x812fc370}, | ||
149 | {0x000160a8, 0x423c8000}, | ||
150 | {0x000160b4, 0x92480080}, | ||
151 | {0x000160c0, 0x00adb6d0}, | ||
152 | {0x000160c4, 0x6db6db60}, | ||
153 | {0x000160c8, 0x6db6db6c}, | ||
154 | {0x000160cc, 0x01e6c000}, | ||
155 | {0x00016100, 0x3fffbe01}, | ||
156 | {0x00016104, 0xfff80000}, | ||
157 | {0x00016108, 0x00080010}, | ||
158 | {0x00016144, 0x02084080}, | ||
159 | {0x00016148, 0x00000000}, | ||
160 | {0x00016280, 0x058a0001}, | ||
161 | {0x00016284, 0x3d840208}, | ||
162 | {0x00016288, 0x05a20408}, | ||
163 | {0x0001628c, 0x00038c07}, | ||
164 | {0x00016290, 0x00000004}, | ||
165 | {0x00016294, 0x458aa14f}, | ||
166 | {0x00016380, 0x00000000}, | ||
167 | {0x00016384, 0x00000000}, | ||
168 | {0x00016388, 0x00800700}, | ||
169 | {0x0001638c, 0x00800700}, | ||
170 | {0x00016390, 0x00800700}, | ||
171 | {0x00016394, 0x00000000}, | ||
172 | {0x00016398, 0x00000000}, | ||
173 | {0x0001639c, 0x00000000}, | ||
174 | {0x000163a0, 0x00000001}, | ||
175 | {0x000163a4, 0x00000001}, | ||
176 | {0x000163a8, 0x00000000}, | ||
177 | {0x000163ac, 0x00000000}, | ||
178 | {0x000163b0, 0x00000000}, | ||
179 | {0x000163b4, 0x00000000}, | ||
180 | {0x000163b8, 0x00000000}, | ||
181 | {0x000163bc, 0x00000000}, | ||
182 | {0x000163c0, 0x000000a0}, | ||
183 | {0x000163c4, 0x000c0000}, | ||
184 | {0x000163c8, 0x14021402}, | ||
185 | {0x000163cc, 0x00001402}, | ||
186 | {0x000163d0, 0x00000000}, | ||
187 | {0x000163d4, 0x00000000}, | ||
188 | {0x00016400, 0x36db6db6}, | ||
189 | {0x00016404, 0x6db6db40}, | ||
190 | {0x00016408, 0x73f00000}, | ||
191 | {0x0001640c, 0x00000000}, | ||
192 | {0x00016440, 0x7f80fff8}, | ||
193 | {0x0001644c, 0x76d005b5}, | ||
194 | {0x00016450, 0x556cf031}, | ||
195 | {0x00016454, 0x13449440}, | ||
196 | {0x00016458, 0x0c51c92c}, | ||
197 | {0x0001645c, 0x3db7fffc}, | ||
198 | {0x00016460, 0xfffffffc}, | ||
199 | {0x00016464, 0x000f0278}, | ||
200 | {0x0001646c, 0x6db60000}, | ||
201 | {0x00016500, 0x3fffbe01}, | ||
202 | {0x00016504, 0xfff80000}, | ||
203 | {0x00016508, 0x00080010}, | ||
204 | {0x00016544, 0x02084080}, | ||
205 | {0x00016548, 0x00000000}, | ||
206 | {0x00016780, 0x00000000}, | ||
207 | {0x00016784, 0x00000000}, | ||
208 | {0x00016788, 0x00800700}, | ||
209 | {0x0001678c, 0x00800700}, | ||
210 | {0x00016790, 0x00800700}, | ||
211 | {0x00016794, 0x00000000}, | ||
212 | {0x00016798, 0x00000000}, | ||
213 | {0x0001679c, 0x00000000}, | ||
214 | {0x000167a0, 0x00000001}, | ||
215 | {0x000167a4, 0x00000001}, | ||
216 | {0x000167a8, 0x00000000}, | ||
217 | {0x000167ac, 0x00000000}, | ||
218 | {0x000167b0, 0x00000000}, | ||
219 | {0x000167b4, 0x00000000}, | ||
220 | {0x000167b8, 0x00000000}, | ||
221 | {0x000167bc, 0x00000000}, | ||
222 | {0x000167c0, 0x000000a0}, | ||
223 | {0x000167c4, 0x000c0000}, | ||
224 | {0x000167c8, 0x14021402}, | ||
225 | {0x000167cc, 0x00001402}, | ||
226 | {0x000167d0, 0x00000000}, | ||
227 | {0x000167d4, 0x00000000}, | ||
228 | {0x00016800, 0x36db6db6}, | ||
229 | {0x00016804, 0x6db6db40}, | ||
230 | {0x00016808, 0x73f00000}, | ||
231 | {0x0001680c, 0x00000000}, | ||
232 | {0x00016840, 0x7f80fff8}, | ||
233 | {0x0001684c, 0x76d005b5}, | ||
234 | {0x00016850, 0x556cf031}, | ||
235 | {0x00016854, 0x13449440}, | ||
236 | {0x00016858, 0x0c51c92c}, | ||
237 | {0x0001685c, 0x3db7fffc}, | ||
238 | {0x00016860, 0xfffffffc}, | ||
239 | {0x00016864, 0x000f0278}, | ||
240 | {0x0001686c, 0x6db60000}, | ||
241 | {0x00016900, 0x3fffbe01}, | ||
242 | {0x00016904, 0xfff80000}, | ||
243 | {0x00016908, 0x00080010}, | ||
244 | {0x00016944, 0x02084080}, | ||
245 | {0x00016948, 0x00000000}, | ||
246 | {0x00016b80, 0x00000000}, | ||
247 | {0x00016b84, 0x00000000}, | ||
248 | {0x00016b88, 0x00800700}, | ||
249 | {0x00016b8c, 0x00800700}, | ||
250 | {0x00016b90, 0x00800700}, | ||
251 | {0x00016b94, 0x00000000}, | ||
252 | {0x00016b98, 0x00000000}, | ||
253 | {0x00016b9c, 0x00000000}, | ||
254 | {0x00016ba0, 0x00000001}, | ||
255 | {0x00016ba4, 0x00000001}, | ||
256 | {0x00016ba8, 0x00000000}, | ||
257 | {0x00016bac, 0x00000000}, | ||
258 | {0x00016bb0, 0x00000000}, | ||
259 | {0x00016bb4, 0x00000000}, | ||
260 | {0x00016bb8, 0x00000000}, | ||
261 | {0x00016bbc, 0x00000000}, | ||
262 | {0x00016bc0, 0x000000a0}, | ||
263 | {0x00016bc4, 0x000c0000}, | ||
264 | {0x00016bc8, 0x14021402}, | ||
265 | {0x00016bcc, 0x00001402}, | ||
266 | {0x00016bd0, 0x00000000}, | ||
267 | {0x00016bd4, 0x00000000}, | ||
268 | }; | ||
269 | |||
270 | static const u32 ar9300Common_rx_gain_table_merlin_2p2[][2] = { | ||
271 | /* Addr allmodes */ | ||
272 | {0x0000a000, 0x02000101}, | ||
273 | {0x0000a004, 0x02000102}, | ||
274 | {0x0000a008, 0x02000103}, | ||
275 | {0x0000a00c, 0x02000104}, | ||
276 | {0x0000a010, 0x02000200}, | ||
277 | {0x0000a014, 0x02000201}, | ||
278 | {0x0000a018, 0x02000202}, | ||
279 | {0x0000a01c, 0x02000203}, | ||
280 | {0x0000a020, 0x02000204}, | ||
281 | {0x0000a024, 0x02000205}, | ||
282 | {0x0000a028, 0x02000208}, | ||
283 | {0x0000a02c, 0x02000302}, | ||
284 | {0x0000a030, 0x02000303}, | ||
285 | {0x0000a034, 0x02000304}, | ||
286 | {0x0000a038, 0x02000400}, | ||
287 | {0x0000a03c, 0x02010300}, | ||
288 | {0x0000a040, 0x02010301}, | ||
289 | {0x0000a044, 0x02010302}, | ||
290 | {0x0000a048, 0x02000500}, | ||
291 | {0x0000a04c, 0x02010400}, | ||
292 | {0x0000a050, 0x02020300}, | ||
293 | {0x0000a054, 0x02020301}, | ||
294 | {0x0000a058, 0x02020302}, | ||
295 | {0x0000a05c, 0x02020303}, | ||
296 | {0x0000a060, 0x02020400}, | ||
297 | {0x0000a064, 0x02030300}, | ||
298 | {0x0000a068, 0x02030301}, | ||
299 | {0x0000a06c, 0x02030302}, | ||
300 | {0x0000a070, 0x02030303}, | ||
301 | {0x0000a074, 0x02030400}, | ||
302 | {0x0000a078, 0x02040300}, | ||
303 | {0x0000a07c, 0x02040301}, | ||
304 | {0x0000a080, 0x02040302}, | ||
305 | {0x0000a084, 0x02040303}, | ||
306 | {0x0000a088, 0x02030500}, | ||
307 | {0x0000a08c, 0x02040400}, | ||
308 | {0x0000a090, 0x02050203}, | ||
309 | {0x0000a094, 0x02050204}, | ||
310 | {0x0000a098, 0x02050205}, | ||
311 | {0x0000a09c, 0x02040500}, | ||
312 | {0x0000a0a0, 0x02050301}, | ||
313 | {0x0000a0a4, 0x02050302}, | ||
314 | {0x0000a0a8, 0x02050303}, | ||
315 | {0x0000a0ac, 0x02050400}, | ||
316 | {0x0000a0b0, 0x02050401}, | ||
317 | {0x0000a0b4, 0x02050402}, | ||
318 | {0x0000a0b8, 0x02050403}, | ||
319 | {0x0000a0bc, 0x02050500}, | ||
320 | {0x0000a0c0, 0x02050501}, | ||
321 | {0x0000a0c4, 0x02050502}, | ||
322 | {0x0000a0c8, 0x02050503}, | ||
323 | {0x0000a0cc, 0x02050504}, | ||
324 | {0x0000a0d0, 0x02050600}, | ||
325 | {0x0000a0d4, 0x02050601}, | ||
326 | {0x0000a0d8, 0x02050602}, | ||
327 | {0x0000a0dc, 0x02050603}, | ||
328 | {0x0000a0e0, 0x02050604}, | ||
329 | {0x0000a0e4, 0x02050700}, | ||
330 | {0x0000a0e8, 0x02050701}, | ||
331 | {0x0000a0ec, 0x02050702}, | ||
332 | {0x0000a0f0, 0x02050703}, | ||
333 | {0x0000a0f4, 0x02050704}, | ||
334 | {0x0000a0f8, 0x02050705}, | ||
335 | {0x0000a0fc, 0x02050708}, | ||
336 | {0x0000a100, 0x02050709}, | ||
337 | {0x0000a104, 0x0205070a}, | ||
338 | {0x0000a108, 0x0205070b}, | ||
339 | {0x0000a10c, 0x0205070c}, | ||
340 | {0x0000a110, 0x0205070d}, | ||
341 | {0x0000a114, 0x02050710}, | ||
342 | {0x0000a118, 0x02050711}, | ||
343 | {0x0000a11c, 0x02050712}, | ||
344 | {0x0000a120, 0x02050713}, | ||
345 | {0x0000a124, 0x02050714}, | ||
346 | {0x0000a128, 0x02050715}, | ||
347 | {0x0000a12c, 0x02050730}, | ||
348 | {0x0000a130, 0x02050731}, | ||
349 | {0x0000a134, 0x02050732}, | ||
350 | {0x0000a138, 0x02050733}, | ||
351 | {0x0000a13c, 0x02050734}, | ||
352 | {0x0000a140, 0x02050735}, | ||
353 | {0x0000a144, 0x02050750}, | ||
354 | {0x0000a148, 0x02050751}, | ||
355 | {0x0000a14c, 0x02050752}, | ||
356 | {0x0000a150, 0x02050753}, | ||
357 | {0x0000a154, 0x02050754}, | ||
358 | {0x0000a158, 0x02050755}, | ||
359 | {0x0000a15c, 0x02050770}, | ||
360 | {0x0000a160, 0x02050771}, | ||
361 | {0x0000a164, 0x02050772}, | ||
362 | {0x0000a168, 0x02050773}, | ||
363 | {0x0000a16c, 0x02050774}, | ||
364 | {0x0000a170, 0x02050775}, | ||
365 | {0x0000a174, 0x00000776}, | ||
366 | {0x0000a178, 0x00000776}, | ||
367 | {0x0000a17c, 0x00000776}, | ||
368 | {0x0000a180, 0x00000776}, | ||
369 | {0x0000a184, 0x00000776}, | ||
370 | {0x0000a188, 0x00000776}, | ||
371 | {0x0000a18c, 0x00000776}, | ||
372 | {0x0000a190, 0x00000776}, | ||
373 | {0x0000a194, 0x00000776}, | ||
374 | {0x0000a198, 0x00000776}, | ||
375 | {0x0000a19c, 0x00000776}, | ||
376 | {0x0000a1a0, 0x00000776}, | ||
377 | {0x0000a1a4, 0x00000776}, | ||
378 | {0x0000a1a8, 0x00000776}, | ||
379 | {0x0000a1ac, 0x00000776}, | ||
380 | {0x0000a1b0, 0x00000776}, | ||
381 | {0x0000a1b4, 0x00000776}, | ||
382 | {0x0000a1b8, 0x00000776}, | ||
383 | {0x0000a1bc, 0x00000776}, | ||
384 | {0x0000a1c0, 0x00000776}, | ||
385 | {0x0000a1c4, 0x00000776}, | ||
386 | {0x0000a1c8, 0x00000776}, | ||
387 | {0x0000a1cc, 0x00000776}, | ||
388 | {0x0000a1d0, 0x00000776}, | ||
389 | {0x0000a1d4, 0x00000776}, | ||
390 | {0x0000a1d8, 0x00000776}, | ||
391 | {0x0000a1dc, 0x00000776}, | ||
392 | {0x0000a1e0, 0x00000776}, | ||
393 | {0x0000a1e4, 0x00000776}, | ||
394 | {0x0000a1e8, 0x00000776}, | ||
395 | {0x0000a1ec, 0x00000776}, | ||
396 | {0x0000a1f0, 0x00000776}, | ||
397 | {0x0000a1f4, 0x00000776}, | ||
398 | {0x0000a1f8, 0x00000776}, | ||
399 | {0x0000a1fc, 0x00000776}, | ||
400 | {0x0000b000, 0x02000101}, | ||
401 | {0x0000b004, 0x02000102}, | ||
402 | {0x0000b008, 0x02000103}, | ||
403 | {0x0000b00c, 0x02000104}, | ||
404 | {0x0000b010, 0x02000200}, | ||
405 | {0x0000b014, 0x02000201}, | ||
406 | {0x0000b018, 0x02000202}, | ||
407 | {0x0000b01c, 0x02000203}, | ||
408 | {0x0000b020, 0x02000204}, | ||
409 | {0x0000b024, 0x02000205}, | ||
410 | {0x0000b028, 0x02000208}, | ||
411 | {0x0000b02c, 0x02000302}, | ||
412 | {0x0000b030, 0x02000303}, | ||
413 | {0x0000b034, 0x02000304}, | ||
414 | {0x0000b038, 0x02000400}, | ||
415 | {0x0000b03c, 0x02010300}, | ||
416 | {0x0000b040, 0x02010301}, | ||
417 | {0x0000b044, 0x02010302}, | ||
418 | {0x0000b048, 0x02000500}, | ||
419 | {0x0000b04c, 0x02010400}, | ||
420 | {0x0000b050, 0x02020300}, | ||
421 | {0x0000b054, 0x02020301}, | ||
422 | {0x0000b058, 0x02020302}, | ||
423 | {0x0000b05c, 0x02020303}, | ||
424 | {0x0000b060, 0x02020400}, | ||
425 | {0x0000b064, 0x02030300}, | ||
426 | {0x0000b068, 0x02030301}, | ||
427 | {0x0000b06c, 0x02030302}, | ||
428 | {0x0000b070, 0x02030303}, | ||
429 | {0x0000b074, 0x02030400}, | ||
430 | {0x0000b078, 0x02040300}, | ||
431 | {0x0000b07c, 0x02040301}, | ||
432 | {0x0000b080, 0x02040302}, | ||
433 | {0x0000b084, 0x02040303}, | ||
434 | {0x0000b088, 0x02030500}, | ||
435 | {0x0000b08c, 0x02040400}, | ||
436 | {0x0000b090, 0x02050203}, | ||
437 | {0x0000b094, 0x02050204}, | ||
438 | {0x0000b098, 0x02050205}, | ||
439 | {0x0000b09c, 0x02040500}, | ||
440 | {0x0000b0a0, 0x02050301}, | ||
441 | {0x0000b0a4, 0x02050302}, | ||
442 | {0x0000b0a8, 0x02050303}, | ||
443 | {0x0000b0ac, 0x02050400}, | ||
444 | {0x0000b0b0, 0x02050401}, | ||
445 | {0x0000b0b4, 0x02050402}, | ||
446 | {0x0000b0b8, 0x02050403}, | ||
447 | {0x0000b0bc, 0x02050500}, | ||
448 | {0x0000b0c0, 0x02050501}, | ||
449 | {0x0000b0c4, 0x02050502}, | ||
450 | {0x0000b0c8, 0x02050503}, | ||
451 | {0x0000b0cc, 0x02050504}, | ||
452 | {0x0000b0d0, 0x02050600}, | ||
453 | {0x0000b0d4, 0x02050601}, | ||
454 | {0x0000b0d8, 0x02050602}, | ||
455 | {0x0000b0dc, 0x02050603}, | ||
456 | {0x0000b0e0, 0x02050604}, | ||
457 | {0x0000b0e4, 0x02050700}, | ||
458 | {0x0000b0e8, 0x02050701}, | ||
459 | {0x0000b0ec, 0x02050702}, | ||
460 | {0x0000b0f0, 0x02050703}, | ||
461 | {0x0000b0f4, 0x02050704}, | ||
462 | {0x0000b0f8, 0x02050705}, | ||
463 | {0x0000b0fc, 0x02050708}, | ||
464 | {0x0000b100, 0x02050709}, | ||
465 | {0x0000b104, 0x0205070a}, | ||
466 | {0x0000b108, 0x0205070b}, | ||
467 | {0x0000b10c, 0x0205070c}, | ||
468 | {0x0000b110, 0x0205070d}, | ||
469 | {0x0000b114, 0x02050710}, | ||
470 | {0x0000b118, 0x02050711}, | ||
471 | {0x0000b11c, 0x02050712}, | ||
472 | {0x0000b120, 0x02050713}, | ||
473 | {0x0000b124, 0x02050714}, | ||
474 | {0x0000b128, 0x02050715}, | ||
475 | {0x0000b12c, 0x02050730}, | ||
476 | {0x0000b130, 0x02050731}, | ||
477 | {0x0000b134, 0x02050732}, | ||
478 | {0x0000b138, 0x02050733}, | ||
479 | {0x0000b13c, 0x02050734}, | ||
480 | {0x0000b140, 0x02050735}, | ||
481 | {0x0000b144, 0x02050750}, | ||
482 | {0x0000b148, 0x02050751}, | ||
483 | {0x0000b14c, 0x02050752}, | ||
484 | {0x0000b150, 0x02050753}, | ||
485 | {0x0000b154, 0x02050754}, | ||
486 | {0x0000b158, 0x02050755}, | ||
487 | {0x0000b15c, 0x02050770}, | ||
488 | {0x0000b160, 0x02050771}, | ||
489 | {0x0000b164, 0x02050772}, | ||
490 | {0x0000b168, 0x02050773}, | ||
491 | {0x0000b16c, 0x02050774}, | ||
492 | {0x0000b170, 0x02050775}, | ||
493 | {0x0000b174, 0x00000776}, | ||
494 | {0x0000b178, 0x00000776}, | ||
495 | {0x0000b17c, 0x00000776}, | ||
496 | {0x0000b180, 0x00000776}, | ||
497 | {0x0000b184, 0x00000776}, | ||
498 | {0x0000b188, 0x00000776}, | ||
499 | {0x0000b18c, 0x00000776}, | ||
500 | {0x0000b190, 0x00000776}, | ||
501 | {0x0000b194, 0x00000776}, | ||
502 | {0x0000b198, 0x00000776}, | ||
503 | {0x0000b19c, 0x00000776}, | ||
504 | {0x0000b1a0, 0x00000776}, | ||
505 | {0x0000b1a4, 0x00000776}, | ||
506 | {0x0000b1a8, 0x00000776}, | ||
507 | {0x0000b1ac, 0x00000776}, | ||
508 | {0x0000b1b0, 0x00000776}, | ||
509 | {0x0000b1b4, 0x00000776}, | ||
510 | {0x0000b1b8, 0x00000776}, | ||
511 | {0x0000b1bc, 0x00000776}, | ||
512 | {0x0000b1c0, 0x00000776}, | ||
513 | {0x0000b1c4, 0x00000776}, | ||
514 | {0x0000b1c8, 0x00000776}, | ||
515 | {0x0000b1cc, 0x00000776}, | ||
516 | {0x0000b1d0, 0x00000776}, | ||
517 | {0x0000b1d4, 0x00000776}, | ||
518 | {0x0000b1d8, 0x00000776}, | ||
519 | {0x0000b1dc, 0x00000776}, | ||
520 | {0x0000b1e0, 0x00000776}, | ||
521 | {0x0000b1e4, 0x00000776}, | ||
522 | {0x0000b1e8, 0x00000776}, | ||
523 | {0x0000b1ec, 0x00000776}, | ||
524 | {0x0000b1f0, 0x00000776}, | ||
525 | {0x0000b1f4, 0x00000776}, | ||
526 | {0x0000b1f8, 0x00000776}, | ||
527 | {0x0000b1fc, 0x00000776}, | ||
528 | }; | ||
529 | |||
530 | static const u32 ar9300_2p2_mac_postamble[][5] = { | ||
531 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
532 | {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160}, | ||
533 | {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c}, | ||
534 | {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38}, | ||
535 | {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00}, | ||
536 | {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b}, | ||
537 | {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810}, | ||
538 | {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a}, | ||
539 | {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440}, | ||
540 | }; | ||
541 | |||
542 | static const u32 ar9300_2p2_soc_postamble[][5] = { | ||
543 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
544 | {0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023}, | ||
545 | }; | ||
546 | |||
547 | static const u32 ar9200_merlin_2p2_radio_core[][2] = { | ||
548 | /* Addr allmodes */ | ||
549 | {0x00007800, 0x00040000}, | ||
550 | {0x00007804, 0xdb005012}, | ||
551 | {0x00007808, 0x04924914}, | ||
552 | {0x0000780c, 0x21084210}, | ||
553 | {0x00007810, 0x6d801300}, | ||
554 | {0x00007814, 0x0019beff}, | ||
555 | {0x00007818, 0x07e41000}, | ||
556 | {0x0000781c, 0x00392000}, | ||
557 | {0x00007820, 0x92592480}, | ||
558 | {0x00007824, 0x00040000}, | ||
559 | {0x00007828, 0xdb005012}, | ||
560 | {0x0000782c, 0x04924914}, | ||
561 | {0x00007830, 0x21084210}, | ||
562 | {0x00007834, 0x6d801300}, | ||
563 | {0x00007838, 0x0019beff}, | ||
564 | {0x0000783c, 0x07e40000}, | ||
565 | {0x00007840, 0x00392000}, | ||
566 | {0x00007844, 0x92592480}, | ||
567 | {0x00007848, 0x00100000}, | ||
568 | {0x0000784c, 0x773f0567}, | ||
569 | {0x00007850, 0x54214514}, | ||
570 | {0x00007854, 0x12035828}, | ||
571 | {0x00007858, 0x92592692}, | ||
572 | {0x0000785c, 0x00000000}, | ||
573 | {0x00007860, 0x56400000}, | ||
574 | {0x00007864, 0x0a8e370e}, | ||
575 | {0x00007868, 0xc0102850}, | ||
576 | {0x0000786c, 0x812d4000}, | ||
577 | {0x00007870, 0x807ec400}, | ||
578 | {0x00007874, 0x001b6db0}, | ||
579 | {0x00007878, 0x00376b63}, | ||
580 | {0x0000787c, 0x06db6db6}, | ||
581 | {0x00007880, 0x006d8000}, | ||
582 | {0x00007884, 0xffeffffe}, | ||
583 | {0x00007888, 0xffeffffe}, | ||
584 | {0x0000788c, 0x00010000}, | ||
585 | {0x00007890, 0x02060aeb}, | ||
586 | {0x00007894, 0x5a108000}, | ||
587 | }; | ||
588 | |||
589 | static const u32 ar9300_2p2_baseband_postamble[][5] = { | ||
590 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
591 | {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011}, | ||
592 | {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e}, | ||
593 | {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, | ||
594 | {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881}, | ||
595 | {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, | ||
596 | {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c}, | ||
597 | {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4}, | ||
598 | {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0}, | ||
599 | {0x00009e04, 0x00802020, 0x00802020, 0x00802020, 0x00802020}, | ||
600 | {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2}, | ||
601 | {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e}, | ||
602 | {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e}, | ||
603 | {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
604 | {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c}, | ||
605 | {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce}, | ||
606 | {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021}, | ||
607 | {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, | ||
608 | {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, | ||
609 | {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, | ||
610 | {0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0}, | ||
611 | {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, | ||
612 | {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b}, | ||
613 | {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff}, | ||
614 | {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018}, | ||
615 | {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108}, | ||
616 | {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898}, | ||
617 | {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002}, | ||
618 | {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, | ||
619 | {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501}, | ||
620 | {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, | ||
621 | {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b}, | ||
622 | {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, | ||
623 | {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110}, | ||
624 | {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222}, | ||
625 | {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18}, | ||
626 | {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071982}, | ||
627 | {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a}, | ||
628 | {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
629 | {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
630 | {0x0000ae04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
631 | {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
632 | {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
633 | {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, | ||
634 | {0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, | ||
635 | {0x0000b830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
636 | {0x0000be04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
637 | {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
638 | {0x0000be1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | ||
639 | {0x0000be20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, | ||
640 | {0x0000c284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, | ||
641 | }; | ||
642 | |||
643 | static const u32 ar9300_2p2_baseband_core[][2] = { | ||
644 | /* Addr allmodes */ | ||
645 | {0x00009800, 0xafe68e30}, | ||
646 | {0x00009804, 0xfd14e000}, | ||
647 | {0x00009808, 0x9c0a9f6b}, | ||
648 | {0x0000980c, 0x04900000}, | ||
649 | {0x00009814, 0x9280c00a}, | ||
650 | {0x00009818, 0x00000000}, | ||
651 | {0x0000981c, 0x00020028}, | ||
652 | {0x00009834, 0x5f3ca3de}, | ||
653 | {0x00009838, 0x0108ecff}, | ||
654 | {0x0000983c, 0x14750600}, | ||
655 | {0x00009880, 0x201fff00}, | ||
656 | {0x00009884, 0x00001042}, | ||
657 | {0x000098a4, 0x00200400}, | ||
658 | {0x000098b0, 0x52440bbe}, | ||
659 | {0x000098d0, 0x004b6a8e}, | ||
660 | {0x000098d4, 0x00000820}, | ||
661 | {0x000098dc, 0x00000000}, | ||
662 | {0x000098f0, 0x00000000}, | ||
663 | {0x000098f4, 0x00000000}, | ||
664 | {0x00009c04, 0xff55ff55}, | ||
665 | {0x00009c08, 0x0320ff55}, | ||
666 | {0x00009c0c, 0x00000000}, | ||
667 | {0x00009c10, 0x00000000}, | ||
668 | {0x00009c14, 0x00046384}, | ||
669 | {0x00009c18, 0x05b6b440}, | ||
670 | {0x00009c1c, 0x00b6b440}, | ||
671 | {0x00009d00, 0xc080a333}, | ||
672 | {0x00009d04, 0x40206c10}, | ||
673 | {0x00009d08, 0x009c4060}, | ||
674 | {0x00009d0c, 0x9883800a}, | ||
675 | {0x00009d10, 0x01834061}, | ||
676 | {0x00009d14, 0x00c0040b}, | ||
677 | {0x00009d18, 0x00000000}, | ||
678 | {0x00009e08, 0x0038230c}, | ||
679 | {0x00009e24, 0x990bb515}, | ||
680 | {0x00009e28, 0x0c6f0000}, | ||
681 | {0x00009e30, 0x06336f77}, | ||
682 | {0x00009e34, 0x6af6532f}, | ||
683 | {0x00009e38, 0x0cc80c00}, | ||
684 | {0x00009e3c, 0xcf946222}, | ||
685 | {0x00009e40, 0x0d261820}, | ||
686 | {0x00009e4c, 0x00001004}, | ||
687 | {0x00009e50, 0x00ff03f1}, | ||
688 | {0x00009e54, 0x00000000}, | ||
689 | {0x00009fc0, 0x803e4788}, | ||
690 | {0x00009fc4, 0x0001efb5}, | ||
691 | {0x00009fcc, 0x40000014}, | ||
692 | {0x00009fd0, 0x01193b93}, | ||
693 | {0x0000a20c, 0x00000000}, | ||
694 | {0x0000a220, 0x00000000}, | ||
695 | {0x0000a224, 0x00000000}, | ||
696 | {0x0000a228, 0x10002310}, | ||
697 | {0x0000a22c, 0x01036a1e}, | ||
698 | {0x0000a23c, 0x00000000}, | ||
699 | {0x0000a244, 0x0c000000}, | ||
700 | {0x0000a2a0, 0x00000001}, | ||
701 | {0x0000a2c0, 0x00000001}, | ||
702 | {0x0000a2c8, 0x00000000}, | ||
703 | {0x0000a2cc, 0x18c43433}, | ||
704 | {0x0000a2d4, 0x00000000}, | ||
705 | {0x0000a2dc, 0x00000000}, | ||
706 | {0x0000a2e0, 0x00000000}, | ||
707 | {0x0000a2e4, 0x00000000}, | ||
708 | {0x0000a2e8, 0x00000000}, | ||
709 | {0x0000a2ec, 0x00000000}, | ||
710 | {0x0000a2f0, 0x00000000}, | ||
711 | {0x0000a2f4, 0x00000000}, | ||
712 | {0x0000a2f8, 0x00000000}, | ||
713 | {0x0000a344, 0x00000000}, | ||
714 | {0x0000a34c, 0x00000000}, | ||
715 | {0x0000a350, 0x0000a000}, | ||
716 | {0x0000a364, 0x00000000}, | ||
717 | {0x0000a370, 0x00000000}, | ||
718 | {0x0000a390, 0x00000001}, | ||
719 | {0x0000a394, 0x00000444}, | ||
720 | {0x0000a398, 0x001f0e0f}, | ||
721 | {0x0000a39c, 0x0075393f}, | ||
722 | {0x0000a3a0, 0xb79f6427}, | ||
723 | {0x0000a3a4, 0x00000000}, | ||
724 | {0x0000a3a8, 0xaaaaaaaa}, | ||
725 | {0x0000a3ac, 0x3c466478}, | ||
726 | {0x0000a3c0, 0x20202020}, | ||
727 | {0x0000a3c4, 0x22222220}, | ||
728 | {0x0000a3c8, 0x20200020}, | ||
729 | {0x0000a3cc, 0x20202020}, | ||
730 | {0x0000a3d0, 0x20202020}, | ||
731 | {0x0000a3d4, 0x20202020}, | ||
732 | {0x0000a3d8, 0x20202020}, | ||
733 | {0x0000a3dc, 0x20202020}, | ||
734 | {0x0000a3e0, 0x20202020}, | ||
735 | {0x0000a3e4, 0x20202020}, | ||
736 | {0x0000a3e8, 0x20202020}, | ||
737 | {0x0000a3ec, 0x20202020}, | ||
738 | {0x0000a3f0, 0x00000000}, | ||
739 | {0x0000a3f4, 0x00000246}, | ||
740 | {0x0000a3f8, 0x0cdbd380}, | ||
741 | {0x0000a3fc, 0x000f0f01}, | ||
742 | {0x0000a400, 0x8fa91f01}, | ||
743 | {0x0000a404, 0x00000000}, | ||
744 | {0x0000a408, 0x0e79e5c6}, | ||
745 | {0x0000a40c, 0x00820820}, | ||
746 | {0x0000a414, 0x1ce739ce}, | ||
747 | {0x0000a418, 0x2d001dce}, | ||
748 | {0x0000a41c, 0x1ce739ce}, | ||
749 | {0x0000a420, 0x000001ce}, | ||
750 | {0x0000a424, 0x1ce739ce}, | ||
751 | {0x0000a428, 0x000001ce}, | ||
752 | {0x0000a42c, 0x1ce739ce}, | ||
753 | {0x0000a430, 0x1ce739ce}, | ||
754 | {0x0000a434, 0x00000000}, | ||
755 | {0x0000a438, 0x00001801}, | ||
756 | {0x0000a43c, 0x00000000}, | ||
757 | {0x0000a440, 0x00000000}, | ||
758 | {0x0000a444, 0x00000000}, | ||
759 | {0x0000a448, 0x06000080}, | ||
760 | {0x0000a44c, 0x00000001}, | ||
761 | {0x0000a450, 0x00010000}, | ||
762 | {0x0000a458, 0x00000000}, | ||
763 | {0x0000a600, 0x00000000}, | ||
764 | {0x0000a604, 0x00000000}, | ||
765 | {0x0000a608, 0x00000000}, | ||
766 | {0x0000a60c, 0x00000000}, | ||
767 | {0x0000a610, 0x00000000}, | ||
768 | {0x0000a614, 0x00000000}, | ||
769 | {0x0000a618, 0x00000000}, | ||
770 | {0x0000a61c, 0x00000000}, | ||
771 | {0x0000a620, 0x00000000}, | ||
772 | {0x0000a624, 0x00000000}, | ||
773 | {0x0000a628, 0x00000000}, | ||
774 | {0x0000a62c, 0x00000000}, | ||
775 | {0x0000a630, 0x00000000}, | ||
776 | {0x0000a634, 0x00000000}, | ||
777 | {0x0000a638, 0x00000000}, | ||
778 | {0x0000a63c, 0x00000000}, | ||
779 | {0x0000a640, 0x00000000}, | ||
780 | {0x0000a644, 0x3fad9d74}, | ||
781 | {0x0000a648, 0x0048060a}, | ||
782 | {0x0000a64c, 0x00000637}, | ||
783 | {0x0000a670, 0x03020100}, | ||
784 | {0x0000a674, 0x09080504}, | ||
785 | {0x0000a678, 0x0d0c0b0a}, | ||
786 | {0x0000a67c, 0x13121110}, | ||
787 | {0x0000a680, 0x31301514}, | ||
788 | {0x0000a684, 0x35343332}, | ||
789 | {0x0000a688, 0x00000036}, | ||
790 | {0x0000a690, 0x00000838}, | ||
791 | {0x0000a7c0, 0x00000000}, | ||
792 | {0x0000a7c4, 0xfffffffc}, | ||
793 | {0x0000a7c8, 0x00000000}, | ||
794 | {0x0000a7cc, 0x00000000}, | ||
795 | {0x0000a7d0, 0x00000000}, | ||
796 | {0x0000a7d4, 0x00000004}, | ||
797 | {0x0000a7dc, 0x00000001}, | ||
798 | {0x0000a8d0, 0x004b6a8e}, | ||
799 | {0x0000a8d4, 0x00000820}, | ||
800 | {0x0000a8dc, 0x00000000}, | ||
801 | {0x0000a8f0, 0x00000000}, | ||
802 | {0x0000a8f4, 0x00000000}, | ||
803 | {0x0000b2d0, 0x00000080}, | ||
804 | {0x0000b2d4, 0x00000000}, | ||
805 | {0x0000b2dc, 0x00000000}, | ||
806 | {0x0000b2e0, 0x00000000}, | ||
807 | {0x0000b2e4, 0x00000000}, | ||
808 | {0x0000b2e8, 0x00000000}, | ||
809 | {0x0000b2ec, 0x00000000}, | ||
810 | {0x0000b2f0, 0x00000000}, | ||
811 | {0x0000b2f4, 0x00000000}, | ||
812 | {0x0000b2f8, 0x00000000}, | ||
813 | {0x0000b408, 0x0e79e5c0}, | ||
814 | {0x0000b40c, 0x00820820}, | ||
815 | {0x0000b420, 0x00000000}, | ||
816 | {0x0000b8d0, 0x004b6a8e}, | ||
817 | {0x0000b8d4, 0x00000820}, | ||
818 | {0x0000b8dc, 0x00000000}, | ||
819 | {0x0000b8f0, 0x00000000}, | ||
820 | {0x0000b8f4, 0x00000000}, | ||
821 | {0x0000c2d0, 0x00000080}, | ||
822 | {0x0000c2d4, 0x00000000}, | ||
823 | {0x0000c2dc, 0x00000000}, | ||
824 | {0x0000c2e0, 0x00000000}, | ||
825 | {0x0000c2e4, 0x00000000}, | ||
826 | {0x0000c2e8, 0x00000000}, | ||
827 | {0x0000c2ec, 0x00000000}, | ||
828 | {0x0000c2f0, 0x00000000}, | ||
829 | {0x0000c2f4, 0x00000000}, | ||
830 | {0x0000c2f8, 0x00000000}, | ||
831 | {0x0000c408, 0x0e79e5c0}, | ||
832 | {0x0000c40c, 0x00820820}, | ||
833 | {0x0000c420, 0x00000000}, | ||
834 | }; | ||
835 | |||
836 | static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = { | ||
837 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
838 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | ||
839 | {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, | ||
840 | {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002}, | ||
841 | {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004}, | ||
842 | {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200}, | ||
843 | {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202}, | ||
844 | {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400}, | ||
845 | {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402}, | ||
846 | {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404}, | ||
847 | {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603}, | ||
848 | {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02}, | ||
849 | {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04}, | ||
850 | {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20}, | ||
851 | {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20}, | ||
852 | {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22}, | ||
853 | {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24}, | ||
854 | {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640}, | ||
855 | {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660}, | ||
856 | {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861}, | ||
857 | {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81}, | ||
858 | {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, | ||
859 | {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84}, | ||
860 | {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3}, | ||
861 | {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5}, | ||
862 | {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9}, | ||
863 | {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb}, | ||
864 | {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
865 | {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
866 | {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
867 | {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
868 | {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
869 | {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
870 | {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
871 | {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, | ||
872 | {0x0000a584, 0x06802223, 0x06802223, 0x04800002, 0x04800002}, | ||
873 | {0x0000a588, 0x0a822220, 0x0a822220, 0x08800004, 0x08800004}, | ||
874 | {0x0000a58c, 0x0f822223, 0x0f822223, 0x0b800200, 0x0b800200}, | ||
875 | {0x0000a590, 0x14822620, 0x14822620, 0x0f800202, 0x0f800202}, | ||
876 | {0x0000a594, 0x18822622, 0x18822622, 0x11800400, 0x11800400}, | ||
877 | {0x0000a598, 0x1b822822, 0x1b822822, 0x15800402, 0x15800402}, | ||
878 | {0x0000a59c, 0x20822842, 0x20822842, 0x19800404, 0x19800404}, | ||
879 | {0x0000a5a0, 0x22822c41, 0x22822c41, 0x1b800603, 0x1b800603}, | ||
880 | {0x0000a5a4, 0x28823042, 0x28823042, 0x1f800a02, 0x1f800a02}, | ||
881 | {0x0000a5a8, 0x2c823044, 0x2c823044, 0x23800a04, 0x23800a04}, | ||
882 | {0x0000a5ac, 0x2f823644, 0x2f823644, 0x26800a20, 0x26800a20}, | ||
883 | {0x0000a5b0, 0x34825643, 0x34825643, 0x2a800e20, 0x2a800e20}, | ||
884 | {0x0000a5b4, 0x38825a44, 0x38825a44, 0x2e800e22, 0x2e800e22}, | ||
885 | {0x0000a5b8, 0x3b825e45, 0x3b825e45, 0x31800e24, 0x31800e24}, | ||
886 | {0x0000a5bc, 0x41825e4a, 0x41825e4a, 0x34801640, 0x34801640}, | ||
887 | {0x0000a5c0, 0x48825e6c, 0x48825e6c, 0x38801660, 0x38801660}, | ||
888 | {0x0000a5c4, 0x4e825e8e, 0x4e825e8e, 0x3b801861, 0x3b801861}, | ||
889 | {0x0000a5c8, 0x53825eb2, 0x53825eb2, 0x3e801a81, 0x3e801a81}, | ||
890 | {0x0000a5cc, 0x59825eb5, 0x59825eb5, 0x42801a83, 0x42801a83}, | ||
891 | {0x0000a5d0, 0x5f825ef6, 0x5f825ef6, 0x44801c84, 0x44801c84}, | ||
892 | {0x0000a5d4, 0x62825f56, 0x62825f56, 0x48801ce3, 0x48801ce3}, | ||
893 | {0x0000a5d8, 0x66827f56, 0x66827f56, 0x4c801ce5, 0x4c801ce5}, | ||
894 | {0x0000a5dc, 0x6a829f56, 0x6a829f56, 0x50801ce9, 0x50801ce9}, | ||
895 | {0x0000a5e0, 0x70849f56, 0x70849f56, 0x54801ceb, 0x54801ceb}, | ||
896 | {0x0000a5e4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
897 | {0x0000a5e8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
898 | {0x0000a5ec, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
899 | {0x0000a5f0, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
900 | {0x0000a5f4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
901 | {0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
902 | {0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
903 | {0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, | ||
904 | {0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, | ||
905 | {0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, | ||
906 | {0x00016444, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, | ||
907 | {0x00016448, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, | ||
908 | {0x00016468, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, | ||
909 | {0x00016844, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, | ||
910 | {0x00016848, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, | ||
911 | {0x00016868, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, | ||
912 | }; | ||
913 | |||
914 | static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = { | ||
915 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
916 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | ||
917 | {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, | ||
918 | {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002}, | ||
919 | {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004}, | ||
920 | {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200}, | ||
921 | {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202}, | ||
922 | {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400}, | ||
923 | {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402}, | ||
924 | {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404}, | ||
925 | {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603}, | ||
926 | {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02}, | ||
927 | {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04}, | ||
928 | {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20}, | ||
929 | {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20}, | ||
930 | {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22}, | ||
931 | {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24}, | ||
932 | {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640}, | ||
933 | {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660}, | ||
934 | {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861}, | ||
935 | {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81}, | ||
936 | {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, | ||
937 | {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84}, | ||
938 | {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3}, | ||
939 | {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5}, | ||
940 | {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9}, | ||
941 | {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb}, | ||
942 | {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
943 | {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
944 | {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
945 | {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
946 | {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
947 | {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
948 | {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec}, | ||
949 | {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, | ||
950 | {0x0000a584, 0x06802223, 0x06802223, 0x04800002, 0x04800002}, | ||
951 | {0x0000a588, 0x0a822220, 0x0a822220, 0x08800004, 0x08800004}, | ||
952 | {0x0000a58c, 0x0f822223, 0x0f822223, 0x0b800200, 0x0b800200}, | ||
953 | {0x0000a590, 0x14822620, 0x14822620, 0x0f800202, 0x0f800202}, | ||
954 | {0x0000a594, 0x18822622, 0x18822622, 0x11800400, 0x11800400}, | ||
955 | {0x0000a598, 0x1b822822, 0x1b822822, 0x15800402, 0x15800402}, | ||
956 | {0x0000a59c, 0x20822842, 0x20822842, 0x19800404, 0x19800404}, | ||
957 | {0x0000a5a0, 0x22822c41, 0x22822c41, 0x1b800603, 0x1b800603}, | ||
958 | {0x0000a5a4, 0x28823042, 0x28823042, 0x1f800a02, 0x1f800a02}, | ||
959 | {0x0000a5a8, 0x2c823044, 0x2c823044, 0x23800a04, 0x23800a04}, | ||
960 | {0x0000a5ac, 0x2f823644, 0x2f823644, 0x26800a20, 0x26800a20}, | ||
961 | {0x0000a5b0, 0x34825643, 0x34825643, 0x2a800e20, 0x2a800e20}, | ||
962 | {0x0000a5b4, 0x38825a44, 0x38825a44, 0x2e800e22, 0x2e800e22}, | ||
963 | {0x0000a5b8, 0x3b825e45, 0x3b825e45, 0x31800e24, 0x31800e24}, | ||
964 | {0x0000a5bc, 0x41825e4a, 0x41825e4a, 0x34801640, 0x34801640}, | ||
965 | {0x0000a5c0, 0x48825e6c, 0x48825e6c, 0x38801660, 0x38801660}, | ||
966 | {0x0000a5c4, 0x4e825e8e, 0x4e825e8e, 0x3b801861, 0x3b801861}, | ||
967 | {0x0000a5c8, 0x53825eb2, 0x53825eb2, 0x3e801a81, 0x3e801a81}, | ||
968 | {0x0000a5cc, 0x59825eb5, 0x59825eb5, 0x42801a83, 0x42801a83}, | ||
969 | {0x0000a5d0, 0x5f825ef6, 0x5f825ef6, 0x44801c84, 0x44801c84}, | ||
970 | {0x0000a5d4, 0x62825f56, 0x62825f56, 0x48801ce3, 0x48801ce3}, | ||
971 | {0x0000a5d8, 0x66827f56, 0x66827f56, 0x4c801ce5, 0x4c801ce5}, | ||
972 | {0x0000a5dc, 0x6a829f56, 0x6a829f56, 0x50801ce9, 0x50801ce9}, | ||
973 | {0x0000a5e0, 0x70849f56, 0x70849f56, 0x54801ceb, 0x54801ceb}, | ||
974 | {0x0000a5e4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
975 | {0x0000a5e8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
976 | {0x0000a5ec, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
977 | {0x0000a5f0, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
978 | {0x0000a5f4, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
979 | {0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
980 | {0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec}, | ||
981 | {0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, | ||
982 | {0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, | ||
983 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
984 | {0x00016444, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, | ||
985 | {0x00016448, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, | ||
986 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
987 | {0x00016844, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, | ||
988 | {0x00016848, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, | ||
989 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
990 | }; | ||
991 | |||
992 | static const u32 ar9300Common_rx_gain_table_2p2[][2] = { | ||
993 | /* Addr allmodes */ | ||
994 | {0x0000a000, 0x00010000}, | ||
995 | {0x0000a004, 0x00030002}, | ||
996 | {0x0000a008, 0x00050004}, | ||
997 | {0x0000a00c, 0x00810080}, | ||
998 | {0x0000a010, 0x00830082}, | ||
999 | {0x0000a014, 0x01810180}, | ||
1000 | {0x0000a018, 0x01830182}, | ||
1001 | {0x0000a01c, 0x01850184}, | ||
1002 | {0x0000a020, 0x01890188}, | ||
1003 | {0x0000a024, 0x018b018a}, | ||
1004 | {0x0000a028, 0x018d018c}, | ||
1005 | {0x0000a02c, 0x01910190}, | ||
1006 | {0x0000a030, 0x01930192}, | ||
1007 | {0x0000a034, 0x01950194}, | ||
1008 | {0x0000a038, 0x038a0196}, | ||
1009 | {0x0000a03c, 0x038c038b}, | ||
1010 | {0x0000a040, 0x0390038d}, | ||
1011 | {0x0000a044, 0x03920391}, | ||
1012 | {0x0000a048, 0x03940393}, | ||
1013 | {0x0000a04c, 0x03960395}, | ||
1014 | {0x0000a050, 0x00000000}, | ||
1015 | {0x0000a054, 0x00000000}, | ||
1016 | {0x0000a058, 0x00000000}, | ||
1017 | {0x0000a05c, 0x00000000}, | ||
1018 | {0x0000a060, 0x00000000}, | ||
1019 | {0x0000a064, 0x00000000}, | ||
1020 | {0x0000a068, 0x00000000}, | ||
1021 | {0x0000a06c, 0x00000000}, | ||
1022 | {0x0000a070, 0x00000000}, | ||
1023 | {0x0000a074, 0x00000000}, | ||
1024 | {0x0000a078, 0x00000000}, | ||
1025 | {0x0000a07c, 0x00000000}, | ||
1026 | {0x0000a080, 0x22222229}, | ||
1027 | {0x0000a084, 0x1d1d1d1d}, | ||
1028 | {0x0000a088, 0x1d1d1d1d}, | ||
1029 | {0x0000a08c, 0x1d1d1d1d}, | ||
1030 | {0x0000a090, 0x171d1d1d}, | ||
1031 | {0x0000a094, 0x11111717}, | ||
1032 | {0x0000a098, 0x00030311}, | ||
1033 | {0x0000a09c, 0x00000000}, | ||
1034 | {0x0000a0a0, 0x00000000}, | ||
1035 | {0x0000a0a4, 0x00000000}, | ||
1036 | {0x0000a0a8, 0x00000000}, | ||
1037 | {0x0000a0ac, 0x00000000}, | ||
1038 | {0x0000a0b0, 0x00000000}, | ||
1039 | {0x0000a0b4, 0x00000000}, | ||
1040 | {0x0000a0b8, 0x00000000}, | ||
1041 | {0x0000a0bc, 0x00000000}, | ||
1042 | {0x0000a0c0, 0x001f0000}, | ||
1043 | {0x0000a0c4, 0x01000101}, | ||
1044 | {0x0000a0c8, 0x011e011f}, | ||
1045 | {0x0000a0cc, 0x011c011d}, | ||
1046 | {0x0000a0d0, 0x02030204}, | ||
1047 | {0x0000a0d4, 0x02010202}, | ||
1048 | {0x0000a0d8, 0x021f0200}, | ||
1049 | {0x0000a0dc, 0x0302021e}, | ||
1050 | {0x0000a0e0, 0x03000301}, | ||
1051 | {0x0000a0e4, 0x031e031f}, | ||
1052 | {0x0000a0e8, 0x0402031d}, | ||
1053 | {0x0000a0ec, 0x04000401}, | ||
1054 | {0x0000a0f0, 0x041e041f}, | ||
1055 | {0x0000a0f4, 0x0502041d}, | ||
1056 | {0x0000a0f8, 0x05000501}, | ||
1057 | {0x0000a0fc, 0x051e051f}, | ||
1058 | {0x0000a100, 0x06010602}, | ||
1059 | {0x0000a104, 0x061f0600}, | ||
1060 | {0x0000a108, 0x061d061e}, | ||
1061 | {0x0000a10c, 0x07020703}, | ||
1062 | {0x0000a110, 0x07000701}, | ||
1063 | {0x0000a114, 0x00000000}, | ||
1064 | {0x0000a118, 0x00000000}, | ||
1065 | {0x0000a11c, 0x00000000}, | ||
1066 | {0x0000a120, 0x00000000}, | ||
1067 | {0x0000a124, 0x00000000}, | ||
1068 | {0x0000a128, 0x00000000}, | ||
1069 | {0x0000a12c, 0x00000000}, | ||
1070 | {0x0000a130, 0x00000000}, | ||
1071 | {0x0000a134, 0x00000000}, | ||
1072 | {0x0000a138, 0x00000000}, | ||
1073 | {0x0000a13c, 0x00000000}, | ||
1074 | {0x0000a140, 0x001f0000}, | ||
1075 | {0x0000a144, 0x01000101}, | ||
1076 | {0x0000a148, 0x011e011f}, | ||
1077 | {0x0000a14c, 0x011c011d}, | ||
1078 | {0x0000a150, 0x02030204}, | ||
1079 | {0x0000a154, 0x02010202}, | ||
1080 | {0x0000a158, 0x021f0200}, | ||
1081 | {0x0000a15c, 0x0302021e}, | ||
1082 | {0x0000a160, 0x03000301}, | ||
1083 | {0x0000a164, 0x031e031f}, | ||
1084 | {0x0000a168, 0x0402031d}, | ||
1085 | {0x0000a16c, 0x04000401}, | ||
1086 | {0x0000a170, 0x041e041f}, | ||
1087 | {0x0000a174, 0x0502041d}, | ||
1088 | {0x0000a178, 0x05000501}, | ||
1089 | {0x0000a17c, 0x051e051f}, | ||
1090 | {0x0000a180, 0x06010602}, | ||
1091 | {0x0000a184, 0x061f0600}, | ||
1092 | {0x0000a188, 0x061d061e}, | ||
1093 | {0x0000a18c, 0x07020703}, | ||
1094 | {0x0000a190, 0x07000701}, | ||
1095 | {0x0000a194, 0x00000000}, | ||
1096 | {0x0000a198, 0x00000000}, | ||
1097 | {0x0000a19c, 0x00000000}, | ||
1098 | {0x0000a1a0, 0x00000000}, | ||
1099 | {0x0000a1a4, 0x00000000}, | ||
1100 | {0x0000a1a8, 0x00000000}, | ||
1101 | {0x0000a1ac, 0x00000000}, | ||
1102 | {0x0000a1b0, 0x00000000}, | ||
1103 | {0x0000a1b4, 0x00000000}, | ||
1104 | {0x0000a1b8, 0x00000000}, | ||
1105 | {0x0000a1bc, 0x00000000}, | ||
1106 | {0x0000a1c0, 0x00000000}, | ||
1107 | {0x0000a1c4, 0x00000000}, | ||
1108 | {0x0000a1c8, 0x00000000}, | ||
1109 | {0x0000a1cc, 0x00000000}, | ||
1110 | {0x0000a1d0, 0x00000000}, | ||
1111 | {0x0000a1d4, 0x00000000}, | ||
1112 | {0x0000a1d8, 0x00000000}, | ||
1113 | {0x0000a1dc, 0x00000000}, | ||
1114 | {0x0000a1e0, 0x00000000}, | ||
1115 | {0x0000a1e4, 0x00000000}, | ||
1116 | {0x0000a1e8, 0x00000000}, | ||
1117 | {0x0000a1ec, 0x00000000}, | ||
1118 | {0x0000a1f0, 0x00000396}, | ||
1119 | {0x0000a1f4, 0x00000396}, | ||
1120 | {0x0000a1f8, 0x00000396}, | ||
1121 | {0x0000a1fc, 0x00000196}, | ||
1122 | {0x0000b000, 0x00010000}, | ||
1123 | {0x0000b004, 0x00030002}, | ||
1124 | {0x0000b008, 0x00050004}, | ||
1125 | {0x0000b00c, 0x00810080}, | ||
1126 | {0x0000b010, 0x00830082}, | ||
1127 | {0x0000b014, 0x01810180}, | ||
1128 | {0x0000b018, 0x01830182}, | ||
1129 | {0x0000b01c, 0x01850184}, | ||
1130 | {0x0000b020, 0x02810280}, | ||
1131 | {0x0000b024, 0x02830282}, | ||
1132 | {0x0000b028, 0x02850284}, | ||
1133 | {0x0000b02c, 0x02890288}, | ||
1134 | {0x0000b030, 0x028b028a}, | ||
1135 | {0x0000b034, 0x0388028c}, | ||
1136 | {0x0000b038, 0x038a0389}, | ||
1137 | {0x0000b03c, 0x038c038b}, | ||
1138 | {0x0000b040, 0x0390038d}, | ||
1139 | {0x0000b044, 0x03920391}, | ||
1140 | {0x0000b048, 0x03940393}, | ||
1141 | {0x0000b04c, 0x03960395}, | ||
1142 | {0x0000b050, 0x00000000}, | ||
1143 | {0x0000b054, 0x00000000}, | ||
1144 | {0x0000b058, 0x00000000}, | ||
1145 | {0x0000b05c, 0x00000000}, | ||
1146 | {0x0000b060, 0x00000000}, | ||
1147 | {0x0000b064, 0x00000000}, | ||
1148 | {0x0000b068, 0x00000000}, | ||
1149 | {0x0000b06c, 0x00000000}, | ||
1150 | {0x0000b070, 0x00000000}, | ||
1151 | {0x0000b074, 0x00000000}, | ||
1152 | {0x0000b078, 0x00000000}, | ||
1153 | {0x0000b07c, 0x00000000}, | ||
1154 | {0x0000b080, 0x32323232}, | ||
1155 | {0x0000b084, 0x2f2f3232}, | ||
1156 | {0x0000b088, 0x23282a2d}, | ||
1157 | {0x0000b08c, 0x1c1e2123}, | ||
1158 | {0x0000b090, 0x14171919}, | ||
1159 | {0x0000b094, 0x0e0e1214}, | ||
1160 | {0x0000b098, 0x03050707}, | ||
1161 | {0x0000b09c, 0x00030303}, | ||
1162 | {0x0000b0a0, 0x00000000}, | ||
1163 | {0x0000b0a4, 0x00000000}, | ||
1164 | {0x0000b0a8, 0x00000000}, | ||
1165 | {0x0000b0ac, 0x00000000}, | ||
1166 | {0x0000b0b0, 0x00000000}, | ||
1167 | {0x0000b0b4, 0x00000000}, | ||
1168 | {0x0000b0b8, 0x00000000}, | ||
1169 | {0x0000b0bc, 0x00000000}, | ||
1170 | {0x0000b0c0, 0x003f0020}, | ||
1171 | {0x0000b0c4, 0x00400041}, | ||
1172 | {0x0000b0c8, 0x0140005f}, | ||
1173 | {0x0000b0cc, 0x0160015f}, | ||
1174 | {0x0000b0d0, 0x017e017f}, | ||
1175 | {0x0000b0d4, 0x02410242}, | ||
1176 | {0x0000b0d8, 0x025f0240}, | ||
1177 | {0x0000b0dc, 0x027f0260}, | ||
1178 | {0x0000b0e0, 0x0341027e}, | ||
1179 | {0x0000b0e4, 0x035f0340}, | ||
1180 | {0x0000b0e8, 0x037f0360}, | ||
1181 | {0x0000b0ec, 0x04400441}, | ||
1182 | {0x0000b0f0, 0x0460045f}, | ||
1183 | {0x0000b0f4, 0x0541047f}, | ||
1184 | {0x0000b0f8, 0x055f0540}, | ||
1185 | {0x0000b0fc, 0x057f0560}, | ||
1186 | {0x0000b100, 0x06400641}, | ||
1187 | {0x0000b104, 0x0660065f}, | ||
1188 | {0x0000b108, 0x067e067f}, | ||
1189 | {0x0000b10c, 0x07410742}, | ||
1190 | {0x0000b110, 0x075f0740}, | ||
1191 | {0x0000b114, 0x077f0760}, | ||
1192 | {0x0000b118, 0x07800781}, | ||
1193 | {0x0000b11c, 0x07a0079f}, | ||
1194 | {0x0000b120, 0x07c107bf}, | ||
1195 | {0x0000b124, 0x000007c0}, | ||
1196 | {0x0000b128, 0x00000000}, | ||
1197 | {0x0000b12c, 0x00000000}, | ||
1198 | {0x0000b130, 0x00000000}, | ||
1199 | {0x0000b134, 0x00000000}, | ||
1200 | {0x0000b138, 0x00000000}, | ||
1201 | {0x0000b13c, 0x00000000}, | ||
1202 | {0x0000b140, 0x003f0020}, | ||
1203 | {0x0000b144, 0x00400041}, | ||
1204 | {0x0000b148, 0x0140005f}, | ||
1205 | {0x0000b14c, 0x0160015f}, | ||
1206 | {0x0000b150, 0x017e017f}, | ||
1207 | {0x0000b154, 0x02410242}, | ||
1208 | {0x0000b158, 0x025f0240}, | ||
1209 | {0x0000b15c, 0x027f0260}, | ||
1210 | {0x0000b160, 0x0341027e}, | ||
1211 | {0x0000b164, 0x035f0340}, | ||
1212 | {0x0000b168, 0x037f0360}, | ||
1213 | {0x0000b16c, 0x04400441}, | ||
1214 | {0x0000b170, 0x0460045f}, | ||
1215 | {0x0000b174, 0x0541047f}, | ||
1216 | {0x0000b178, 0x055f0540}, | ||
1217 | {0x0000b17c, 0x057f0560}, | ||
1218 | {0x0000b180, 0x06400641}, | ||
1219 | {0x0000b184, 0x0660065f}, | ||
1220 | {0x0000b188, 0x067e067f}, | ||
1221 | {0x0000b18c, 0x07410742}, | ||
1222 | {0x0000b190, 0x075f0740}, | ||
1223 | {0x0000b194, 0x077f0760}, | ||
1224 | {0x0000b198, 0x07800781}, | ||
1225 | {0x0000b19c, 0x07a0079f}, | ||
1226 | {0x0000b1a0, 0x07c107bf}, | ||
1227 | {0x0000b1a4, 0x000007c0}, | ||
1228 | {0x0000b1a8, 0x00000000}, | ||
1229 | {0x0000b1ac, 0x00000000}, | ||
1230 | {0x0000b1b0, 0x00000000}, | ||
1231 | {0x0000b1b4, 0x00000000}, | ||
1232 | {0x0000b1b8, 0x00000000}, | ||
1233 | {0x0000b1bc, 0x00000000}, | ||
1234 | {0x0000b1c0, 0x00000000}, | ||
1235 | {0x0000b1c4, 0x00000000}, | ||
1236 | {0x0000b1c8, 0x00000000}, | ||
1237 | {0x0000b1cc, 0x00000000}, | ||
1238 | {0x0000b1d0, 0x00000000}, | ||
1239 | {0x0000b1d4, 0x00000000}, | ||
1240 | {0x0000b1d8, 0x00000000}, | ||
1241 | {0x0000b1dc, 0x00000000}, | ||
1242 | {0x0000b1e0, 0x00000000}, | ||
1243 | {0x0000b1e4, 0x00000000}, | ||
1244 | {0x0000b1e8, 0x00000000}, | ||
1245 | {0x0000b1ec, 0x00000000}, | ||
1246 | {0x0000b1f0, 0x00000396}, | ||
1247 | {0x0000b1f4, 0x00000396}, | ||
1248 | {0x0000b1f8, 0x00000396}, | ||
1249 | {0x0000b1fc, 0x00000196}, | ||
1250 | }; | ||
1251 | |||
1252 | static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p2[][5] = { | ||
1253 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | ||
1254 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | ||
1255 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1256 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, | ||
1257 | {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, | ||
1258 | {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, | ||
1259 | {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, | ||
1260 | {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, | ||
1261 | {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, | ||
1262 | {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, | ||
1263 | {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, | ||
1264 | {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, | ||
1265 | {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, | ||
1266 | {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, | ||
1267 | {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, | ||
1268 | {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, | ||
1269 | {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, | ||
1270 | {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, | ||
1271 | {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, | ||
1272 | {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, | ||
1273 | {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, | ||
1274 | {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83}, | ||
1275 | {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84}, | ||
1276 | {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3}, | ||
1277 | {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5}, | ||
1278 | {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9}, | ||
1279 | {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb}, | ||
1280 | {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
1281 | {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
1282 | {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
1283 | {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
1284 | {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
1285 | {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
1286 | {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, | ||
1287 | {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | ||
1288 | {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, | ||
1289 | {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, | ||
1290 | {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, | ||
1291 | {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, | ||
1292 | {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, | ||
1293 | {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, | ||
1294 | {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, | ||
1295 | {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, | ||
1296 | {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, | ||
1297 | {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, | ||
1298 | {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, | ||
1299 | {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, | ||
1300 | {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, | ||
1301 | {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, | ||
1302 | {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, | ||
1303 | {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, | ||
1304 | {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, | ||
1305 | {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, | ||
1306 | {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83}, | ||
1307 | {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84}, | ||
1308 | {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3}, | ||
1309 | {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5}, | ||
1310 | {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9}, | ||
1311 | {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb}, | ||
1312 | {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
1313 | {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
1314 | {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
1315 | {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
1316 | {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
1317 | {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
1318 | {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | ||
1319 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
1320 | {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, | ||
1321 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
1322 | {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
1323 | {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, | ||
1324 | {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
1325 | {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | ||
1326 | {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, | ||
1327 | {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | ||
1328 | }; | ||
1329 | |||
1330 | static const u32 ar9300_2p2_mac_core[][2] = { | ||
1331 | /* Addr allmodes */ | ||
1332 | {0x00000008, 0x00000000}, | ||
1333 | {0x00000030, 0x00020085}, | ||
1334 | {0x00000034, 0x00000005}, | ||
1335 | {0x00000040, 0x00000000}, | ||
1336 | {0x00000044, 0x00000000}, | ||
1337 | {0x00000048, 0x00000008}, | ||
1338 | {0x0000004c, 0x00000010}, | ||
1339 | {0x00000050, 0x00000000}, | ||
1340 | {0x00001040, 0x002ffc0f}, | ||
1341 | {0x00001044, 0x002ffc0f}, | ||
1342 | {0x00001048, 0x002ffc0f}, | ||
1343 | {0x0000104c, 0x002ffc0f}, | ||
1344 | {0x00001050, 0x002ffc0f}, | ||
1345 | {0x00001054, 0x002ffc0f}, | ||
1346 | {0x00001058, 0x002ffc0f}, | ||
1347 | {0x0000105c, 0x002ffc0f}, | ||
1348 | {0x00001060, 0x002ffc0f}, | ||
1349 | {0x00001064, 0x002ffc0f}, | ||
1350 | {0x000010f0, 0x00000100}, | ||
1351 | {0x00001270, 0x00000000}, | ||
1352 | {0x000012b0, 0x00000000}, | ||
1353 | {0x000012f0, 0x00000000}, | ||
1354 | {0x0000143c, 0x00000000}, | ||
1355 | {0x0000147c, 0x00000000}, | ||
1356 | {0x00008000, 0x00000000}, | ||
1357 | {0x00008004, 0x00000000}, | ||
1358 | {0x00008008, 0x00000000}, | ||
1359 | {0x0000800c, 0x00000000}, | ||
1360 | {0x00008018, 0x00000000}, | ||
1361 | {0x00008020, 0x00000000}, | ||
1362 | {0x00008038, 0x00000000}, | ||
1363 | {0x0000803c, 0x00000000}, | ||
1364 | {0x00008040, 0x00000000}, | ||
1365 | {0x00008044, 0x00000000}, | ||
1366 | {0x00008048, 0x00000000}, | ||
1367 | {0x0000804c, 0xffffffff}, | ||
1368 | {0x00008054, 0x00000000}, | ||
1369 | {0x00008058, 0x00000000}, | ||
1370 | {0x0000805c, 0x000fc78f}, | ||
1371 | {0x00008060, 0x0000000f}, | ||
1372 | {0x00008064, 0x00000000}, | ||
1373 | {0x00008070, 0x00000310}, | ||
1374 | {0x00008074, 0x00000020}, | ||
1375 | {0x00008078, 0x00000000}, | ||
1376 | {0x0000809c, 0x0000000f}, | ||
1377 | {0x000080a0, 0x00000000}, | ||
1378 | {0x000080a4, 0x02ff0000}, | ||
1379 | {0x000080a8, 0x0e070605}, | ||
1380 | {0x000080ac, 0x0000000d}, | ||
1381 | {0x000080b0, 0x00000000}, | ||
1382 | {0x000080b4, 0x00000000}, | ||
1383 | {0x000080b8, 0x00000000}, | ||
1384 | {0x000080bc, 0x00000000}, | ||
1385 | {0x000080c0, 0x2a800000}, | ||
1386 | {0x000080c4, 0x06900168}, | ||
1387 | {0x000080c8, 0x13881c20}, | ||
1388 | {0x000080cc, 0x01f40000}, | ||
1389 | {0x000080d0, 0x00252500}, | ||
1390 | {0x000080d4, 0x00a00000}, | ||
1391 | {0x000080d8, 0x00400000}, | ||
1392 | {0x000080dc, 0x00000000}, | ||
1393 | {0x000080e0, 0xffffffff}, | ||
1394 | {0x000080e4, 0x0000ffff}, | ||
1395 | {0x000080e8, 0x3f3f3f3f}, | ||
1396 | {0x000080ec, 0x00000000}, | ||
1397 | {0x000080f0, 0x00000000}, | ||
1398 | {0x000080f4, 0x00000000}, | ||
1399 | {0x000080fc, 0x00020000}, | ||
1400 | {0x00008100, 0x00000000}, | ||
1401 | {0x00008108, 0x00000052}, | ||
1402 | {0x0000810c, 0x00000000}, | ||
1403 | {0x00008110, 0x00000000}, | ||
1404 | {0x00008114, 0x000007ff}, | ||
1405 | {0x00008118, 0x000000aa}, | ||
1406 | {0x0000811c, 0x00003210}, | ||
1407 | {0x00008124, 0x00000000}, | ||
1408 | {0x00008128, 0x00000000}, | ||
1409 | {0x0000812c, 0x00000000}, | ||
1410 | {0x00008130, 0x00000000}, | ||
1411 | {0x00008134, 0x00000000}, | ||
1412 | {0x00008138, 0x00000000}, | ||
1413 | {0x0000813c, 0x0000ffff}, | ||
1414 | {0x00008144, 0xffffffff}, | ||
1415 | {0x00008168, 0x00000000}, | ||
1416 | {0x0000816c, 0x00000000}, | ||
1417 | {0x00008170, 0x18486200}, | ||
1418 | {0x00008174, 0x33332210}, | ||
1419 | {0x00008178, 0x00000000}, | ||
1420 | {0x0000817c, 0x00020000}, | ||
1421 | {0x000081c0, 0x00000000}, | ||
1422 | {0x000081c4, 0x33332210}, | ||
1423 | {0x000081c8, 0x00000000}, | ||
1424 | {0x000081cc, 0x00000000}, | ||
1425 | {0x000081d4, 0x00000000}, | ||
1426 | {0x000081ec, 0x00000000}, | ||
1427 | {0x000081f0, 0x00000000}, | ||
1428 | {0x000081f4, 0x00000000}, | ||
1429 | {0x000081f8, 0x00000000}, | ||
1430 | {0x000081fc, 0x00000000}, | ||
1431 | {0x00008240, 0x00100000}, | ||
1432 | {0x00008244, 0x0010f424}, | ||
1433 | {0x00008248, 0x00000800}, | ||
1434 | {0x0000824c, 0x0001e848}, | ||
1435 | {0x00008250, 0x00000000}, | ||
1436 | {0x00008254, 0x00000000}, | ||
1437 | {0x00008258, 0x00000000}, | ||
1438 | {0x0000825c, 0x40000000}, | ||
1439 | {0x00008260, 0x00080922}, | ||
1440 | {0x00008264, 0x9bc00010}, | ||
1441 | {0x00008268, 0xffffffff}, | ||
1442 | {0x0000826c, 0x0000ffff}, | ||
1443 | {0x00008270, 0x00000000}, | ||
1444 | {0x00008274, 0x40000000}, | ||
1445 | {0x00008278, 0x003e4180}, | ||
1446 | {0x0000827c, 0x00000004}, | ||
1447 | {0x00008284, 0x0000002c}, | ||
1448 | {0x00008288, 0x0000002c}, | ||
1449 | {0x0000828c, 0x000000ff}, | ||
1450 | {0x00008294, 0x00000000}, | ||
1451 | {0x00008298, 0x00000000}, | ||
1452 | {0x0000829c, 0x00000000}, | ||
1453 | {0x00008300, 0x00000140}, | ||
1454 | {0x00008314, 0x00000000}, | ||
1455 | {0x0000831c, 0x0000010d}, | ||
1456 | {0x00008328, 0x00000000}, | ||
1457 | {0x0000832c, 0x00000007}, | ||
1458 | {0x00008330, 0x00000302}, | ||
1459 | {0x00008334, 0x00000700}, | ||
1460 | {0x00008338, 0x00ff0000}, | ||
1461 | {0x0000833c, 0x02400000}, | ||
1462 | {0x00008340, 0x000107ff}, | ||
1463 | {0x00008344, 0xaa48105b}, | ||
1464 | {0x00008348, 0x008f0000}, | ||
1465 | {0x0000835c, 0x00000000}, | ||
1466 | {0x00008360, 0xffffffff}, | ||
1467 | {0x00008364, 0xffffffff}, | ||
1468 | {0x00008368, 0x00000000}, | ||
1469 | {0x00008370, 0x00000000}, | ||
1470 | {0x00008374, 0x000000ff}, | ||
1471 | {0x00008378, 0x00000000}, | ||
1472 | {0x0000837c, 0x00000000}, | ||
1473 | {0x00008380, 0xffffffff}, | ||
1474 | {0x00008384, 0xffffffff}, | ||
1475 | {0x00008390, 0xffffffff}, | ||
1476 | {0x00008394, 0xffffffff}, | ||
1477 | {0x00008398, 0x00000000}, | ||
1478 | {0x0000839c, 0x00000000}, | ||
1479 | {0x000083a0, 0x00000000}, | ||
1480 | {0x000083a4, 0x0000fa14}, | ||
1481 | {0x000083a8, 0x000f0c00}, | ||
1482 | {0x000083ac, 0x33332210}, | ||
1483 | {0x000083b0, 0x33332210}, | ||
1484 | {0x000083b4, 0x33332210}, | ||
1485 | {0x000083b8, 0x33332210}, | ||
1486 | {0x000083bc, 0x00000000}, | ||
1487 | {0x000083c0, 0x00000000}, | ||
1488 | {0x000083c4, 0x00000000}, | ||
1489 | {0x000083c8, 0x00000000}, | ||
1490 | {0x000083cc, 0x00000200}, | ||
1491 | {0x000083d0, 0x000301ff}, | ||
1492 | }; | ||
1493 | |||
1494 | static const u32 ar9300Common_wo_xlna_rx_gain_table_2p2[][2] = { | ||
1495 | /* Addr allmodes */ | ||
1496 | {0x0000a000, 0x00010000}, | ||
1497 | {0x0000a004, 0x00030002}, | ||
1498 | {0x0000a008, 0x00050004}, | ||
1499 | {0x0000a00c, 0x00810080}, | ||
1500 | {0x0000a010, 0x00830082}, | ||
1501 | {0x0000a014, 0x01810180}, | ||
1502 | {0x0000a018, 0x01830182}, | ||
1503 | {0x0000a01c, 0x01850184}, | ||
1504 | {0x0000a020, 0x01890188}, | ||
1505 | {0x0000a024, 0x018b018a}, | ||
1506 | {0x0000a028, 0x018d018c}, | ||
1507 | {0x0000a02c, 0x03820190}, | ||
1508 | {0x0000a030, 0x03840383}, | ||
1509 | {0x0000a034, 0x03880385}, | ||
1510 | {0x0000a038, 0x038a0389}, | ||
1511 | {0x0000a03c, 0x038c038b}, | ||
1512 | {0x0000a040, 0x0390038d}, | ||
1513 | {0x0000a044, 0x03920391}, | ||
1514 | {0x0000a048, 0x03940393}, | ||
1515 | {0x0000a04c, 0x03960395}, | ||
1516 | {0x0000a050, 0x00000000}, | ||
1517 | {0x0000a054, 0x00000000}, | ||
1518 | {0x0000a058, 0x00000000}, | ||
1519 | {0x0000a05c, 0x00000000}, | ||
1520 | {0x0000a060, 0x00000000}, | ||
1521 | {0x0000a064, 0x00000000}, | ||
1522 | {0x0000a068, 0x00000000}, | ||
1523 | {0x0000a06c, 0x00000000}, | ||
1524 | {0x0000a070, 0x00000000}, | ||
1525 | {0x0000a074, 0x00000000}, | ||
1526 | {0x0000a078, 0x00000000}, | ||
1527 | {0x0000a07c, 0x00000000}, | ||
1528 | {0x0000a080, 0x29292929}, | ||
1529 | {0x0000a084, 0x29292929}, | ||
1530 | {0x0000a088, 0x29292929}, | ||
1531 | {0x0000a08c, 0x29292929}, | ||
1532 | {0x0000a090, 0x22292929}, | ||
1533 | {0x0000a094, 0x1d1d2222}, | ||
1534 | {0x0000a098, 0x0c111117}, | ||
1535 | {0x0000a09c, 0x00030303}, | ||
1536 | {0x0000a0a0, 0x00000000}, | ||
1537 | {0x0000a0a4, 0x00000000}, | ||
1538 | {0x0000a0a8, 0x00000000}, | ||
1539 | {0x0000a0ac, 0x00000000}, | ||
1540 | {0x0000a0b0, 0x00000000}, | ||
1541 | {0x0000a0b4, 0x00000000}, | ||
1542 | {0x0000a0b8, 0x00000000}, | ||
1543 | {0x0000a0bc, 0x00000000}, | ||
1544 | {0x0000a0c0, 0x001f0000}, | ||
1545 | {0x0000a0c4, 0x01000101}, | ||
1546 | {0x0000a0c8, 0x011e011f}, | ||
1547 | {0x0000a0cc, 0x011c011d}, | ||
1548 | {0x0000a0d0, 0x02030204}, | ||
1549 | {0x0000a0d4, 0x02010202}, | ||
1550 | {0x0000a0d8, 0x021f0200}, | ||
1551 | {0x0000a0dc, 0x0302021e}, | ||
1552 | {0x0000a0e0, 0x03000301}, | ||
1553 | {0x0000a0e4, 0x031e031f}, | ||
1554 | {0x0000a0e8, 0x0402031d}, | ||
1555 | {0x0000a0ec, 0x04000401}, | ||
1556 | {0x0000a0f0, 0x041e041f}, | ||
1557 | {0x0000a0f4, 0x0502041d}, | ||
1558 | {0x0000a0f8, 0x05000501}, | ||
1559 | {0x0000a0fc, 0x051e051f}, | ||
1560 | {0x0000a100, 0x06010602}, | ||
1561 | {0x0000a104, 0x061f0600}, | ||
1562 | {0x0000a108, 0x061d061e}, | ||
1563 | {0x0000a10c, 0x07020703}, | ||
1564 | {0x0000a110, 0x07000701}, | ||
1565 | {0x0000a114, 0x00000000}, | ||
1566 | {0x0000a118, 0x00000000}, | ||
1567 | {0x0000a11c, 0x00000000}, | ||
1568 | {0x0000a120, 0x00000000}, | ||
1569 | {0x0000a124, 0x00000000}, | ||
1570 | {0x0000a128, 0x00000000}, | ||
1571 | {0x0000a12c, 0x00000000}, | ||
1572 | {0x0000a130, 0x00000000}, | ||
1573 | {0x0000a134, 0x00000000}, | ||
1574 | {0x0000a138, 0x00000000}, | ||
1575 | {0x0000a13c, 0x00000000}, | ||
1576 | {0x0000a140, 0x001f0000}, | ||
1577 | {0x0000a144, 0x01000101}, | ||
1578 | {0x0000a148, 0x011e011f}, | ||
1579 | {0x0000a14c, 0x011c011d}, | ||
1580 | {0x0000a150, 0x02030204}, | ||
1581 | {0x0000a154, 0x02010202}, | ||
1582 | {0x0000a158, 0x021f0200}, | ||
1583 | {0x0000a15c, 0x0302021e}, | ||
1584 | {0x0000a160, 0x03000301}, | ||
1585 | {0x0000a164, 0x031e031f}, | ||
1586 | {0x0000a168, 0x0402031d}, | ||
1587 | {0x0000a16c, 0x04000401}, | ||
1588 | {0x0000a170, 0x041e041f}, | ||
1589 | {0x0000a174, 0x0502041d}, | ||
1590 | {0x0000a178, 0x05000501}, | ||
1591 | {0x0000a17c, 0x051e051f}, | ||
1592 | {0x0000a180, 0x06010602}, | ||
1593 | {0x0000a184, 0x061f0600}, | ||
1594 | {0x0000a188, 0x061d061e}, | ||
1595 | {0x0000a18c, 0x07020703}, | ||
1596 | {0x0000a190, 0x07000701}, | ||
1597 | {0x0000a194, 0x00000000}, | ||
1598 | {0x0000a198, 0x00000000}, | ||
1599 | {0x0000a19c, 0x00000000}, | ||
1600 | {0x0000a1a0, 0x00000000}, | ||
1601 | {0x0000a1a4, 0x00000000}, | ||
1602 | {0x0000a1a8, 0x00000000}, | ||
1603 | {0x0000a1ac, 0x00000000}, | ||
1604 | {0x0000a1b0, 0x00000000}, | ||
1605 | {0x0000a1b4, 0x00000000}, | ||
1606 | {0x0000a1b8, 0x00000000}, | ||
1607 | {0x0000a1bc, 0x00000000}, | ||
1608 | {0x0000a1c0, 0x00000000}, | ||
1609 | {0x0000a1c4, 0x00000000}, | ||
1610 | {0x0000a1c8, 0x00000000}, | ||
1611 | {0x0000a1cc, 0x00000000}, | ||
1612 | {0x0000a1d0, 0x00000000}, | ||
1613 | {0x0000a1d4, 0x00000000}, | ||
1614 | {0x0000a1d8, 0x00000000}, | ||
1615 | {0x0000a1dc, 0x00000000}, | ||
1616 | {0x0000a1e0, 0x00000000}, | ||
1617 | {0x0000a1e4, 0x00000000}, | ||
1618 | {0x0000a1e8, 0x00000000}, | ||
1619 | {0x0000a1ec, 0x00000000}, | ||
1620 | {0x0000a1f0, 0x00000396}, | ||
1621 | {0x0000a1f4, 0x00000396}, | ||
1622 | {0x0000a1f8, 0x00000396}, | ||
1623 | {0x0000a1fc, 0x00000196}, | ||
1624 | {0x0000b000, 0x00010000}, | ||
1625 | {0x0000b004, 0x00030002}, | ||
1626 | {0x0000b008, 0x00050004}, | ||
1627 | {0x0000b00c, 0x00810080}, | ||
1628 | {0x0000b010, 0x00830082}, | ||
1629 | {0x0000b014, 0x01810180}, | ||
1630 | {0x0000b018, 0x01830182}, | ||
1631 | {0x0000b01c, 0x01850184}, | ||
1632 | {0x0000b020, 0x02810280}, | ||
1633 | {0x0000b024, 0x02830282}, | ||
1634 | {0x0000b028, 0x02850284}, | ||
1635 | {0x0000b02c, 0x02890288}, | ||
1636 | {0x0000b030, 0x028b028a}, | ||
1637 | {0x0000b034, 0x0388028c}, | ||
1638 | {0x0000b038, 0x038a0389}, | ||
1639 | {0x0000b03c, 0x038c038b}, | ||
1640 | {0x0000b040, 0x0390038d}, | ||
1641 | {0x0000b044, 0x03920391}, | ||
1642 | {0x0000b048, 0x03940393}, | ||
1643 | {0x0000b04c, 0x03960395}, | ||
1644 | {0x0000b050, 0x00000000}, | ||
1645 | {0x0000b054, 0x00000000}, | ||
1646 | {0x0000b058, 0x00000000}, | ||
1647 | {0x0000b05c, 0x00000000}, | ||
1648 | {0x0000b060, 0x00000000}, | ||
1649 | {0x0000b064, 0x00000000}, | ||
1650 | {0x0000b068, 0x00000000}, | ||
1651 | {0x0000b06c, 0x00000000}, | ||
1652 | {0x0000b070, 0x00000000}, | ||
1653 | {0x0000b074, 0x00000000}, | ||
1654 | {0x0000b078, 0x00000000}, | ||
1655 | {0x0000b07c, 0x00000000}, | ||
1656 | {0x0000b080, 0x32323232}, | ||
1657 | {0x0000b084, 0x2f2f3232}, | ||
1658 | {0x0000b088, 0x23282a2d}, | ||
1659 | {0x0000b08c, 0x1c1e2123}, | ||
1660 | {0x0000b090, 0x14171919}, | ||
1661 | {0x0000b094, 0x0e0e1214}, | ||
1662 | {0x0000b098, 0x03050707}, | ||
1663 | {0x0000b09c, 0x00030303}, | ||
1664 | {0x0000b0a0, 0x00000000}, | ||
1665 | {0x0000b0a4, 0x00000000}, | ||
1666 | {0x0000b0a8, 0x00000000}, | ||
1667 | {0x0000b0ac, 0x00000000}, | ||
1668 | {0x0000b0b0, 0x00000000}, | ||
1669 | {0x0000b0b4, 0x00000000}, | ||
1670 | {0x0000b0b8, 0x00000000}, | ||
1671 | {0x0000b0bc, 0x00000000}, | ||
1672 | {0x0000b0c0, 0x003f0020}, | ||
1673 | {0x0000b0c4, 0x00400041}, | ||
1674 | {0x0000b0c8, 0x0140005f}, | ||
1675 | {0x0000b0cc, 0x0160015f}, | ||
1676 | {0x0000b0d0, 0x017e017f}, | ||
1677 | {0x0000b0d4, 0x02410242}, | ||
1678 | {0x0000b0d8, 0x025f0240}, | ||
1679 | {0x0000b0dc, 0x027f0260}, | ||
1680 | {0x0000b0e0, 0x0341027e}, | ||
1681 | {0x0000b0e4, 0x035f0340}, | ||
1682 | {0x0000b0e8, 0x037f0360}, | ||
1683 | {0x0000b0ec, 0x04400441}, | ||
1684 | {0x0000b0f0, 0x0460045f}, | ||
1685 | {0x0000b0f4, 0x0541047f}, | ||
1686 | {0x0000b0f8, 0x055f0540}, | ||
1687 | {0x0000b0fc, 0x057f0560}, | ||
1688 | {0x0000b100, 0x06400641}, | ||
1689 | {0x0000b104, 0x0660065f}, | ||
1690 | {0x0000b108, 0x067e067f}, | ||
1691 | {0x0000b10c, 0x07410742}, | ||
1692 | {0x0000b110, 0x075f0740}, | ||
1693 | {0x0000b114, 0x077f0760}, | ||
1694 | {0x0000b118, 0x07800781}, | ||
1695 | {0x0000b11c, 0x07a0079f}, | ||
1696 | {0x0000b120, 0x07c107bf}, | ||
1697 | {0x0000b124, 0x000007c0}, | ||
1698 | {0x0000b128, 0x00000000}, | ||
1699 | {0x0000b12c, 0x00000000}, | ||
1700 | {0x0000b130, 0x00000000}, | ||
1701 | {0x0000b134, 0x00000000}, | ||
1702 | {0x0000b138, 0x00000000}, | ||
1703 | {0x0000b13c, 0x00000000}, | ||
1704 | {0x0000b140, 0x003f0020}, | ||
1705 | {0x0000b144, 0x00400041}, | ||
1706 | {0x0000b148, 0x0140005f}, | ||
1707 | {0x0000b14c, 0x0160015f}, | ||
1708 | {0x0000b150, 0x017e017f}, | ||
1709 | {0x0000b154, 0x02410242}, | ||
1710 | {0x0000b158, 0x025f0240}, | ||
1711 | {0x0000b15c, 0x027f0260}, | ||
1712 | {0x0000b160, 0x0341027e}, | ||
1713 | {0x0000b164, 0x035f0340}, | ||
1714 | {0x0000b168, 0x037f0360}, | ||
1715 | {0x0000b16c, 0x04400441}, | ||
1716 | {0x0000b170, 0x0460045f}, | ||
1717 | {0x0000b174, 0x0541047f}, | ||
1718 | {0x0000b178, 0x055f0540}, | ||
1719 | {0x0000b17c, 0x057f0560}, | ||
1720 | {0x0000b180, 0x06400641}, | ||
1721 | {0x0000b184, 0x0660065f}, | ||
1722 | {0x0000b188, 0x067e067f}, | ||
1723 | {0x0000b18c, 0x07410742}, | ||
1724 | {0x0000b190, 0x075f0740}, | ||
1725 | {0x0000b194, 0x077f0760}, | ||
1726 | {0x0000b198, 0x07800781}, | ||
1727 | {0x0000b19c, 0x07a0079f}, | ||
1728 | {0x0000b1a0, 0x07c107bf}, | ||
1729 | {0x0000b1a4, 0x000007c0}, | ||
1730 | {0x0000b1a8, 0x00000000}, | ||
1731 | {0x0000b1ac, 0x00000000}, | ||
1732 | {0x0000b1b0, 0x00000000}, | ||
1733 | {0x0000b1b4, 0x00000000}, | ||
1734 | {0x0000b1b8, 0x00000000}, | ||
1735 | {0x0000b1bc, 0x00000000}, | ||
1736 | {0x0000b1c0, 0x00000000}, | ||
1737 | {0x0000b1c4, 0x00000000}, | ||
1738 | {0x0000b1c8, 0x00000000}, | ||
1739 | {0x0000b1cc, 0x00000000}, | ||
1740 | {0x0000b1d0, 0x00000000}, | ||
1741 | {0x0000b1d4, 0x00000000}, | ||
1742 | {0x0000b1d8, 0x00000000}, | ||
1743 | {0x0000b1dc, 0x00000000}, | ||
1744 | {0x0000b1e0, 0x00000000}, | ||
1745 | {0x0000b1e4, 0x00000000}, | ||
1746 | {0x0000b1e8, 0x00000000}, | ||
1747 | {0x0000b1ec, 0x00000000}, | ||
1748 | {0x0000b1f0, 0x00000396}, | ||
1749 | {0x0000b1f4, 0x00000396}, | ||
1750 | {0x0000b1f8, 0x00000396}, | ||
1751 | {0x0000b1fc, 0x00000196}, | ||
1752 | }; | ||
1753 | |||
1754 | static const u32 ar9300_2p2_soc_preamble[][2] = { | ||
1755 | /* Addr allmodes */ | ||
1756 | {0x000040a4, 0x00a0c1c9}, | ||
1757 | {0x00007008, 0x00000000}, | ||
1758 | {0x00007020, 0x00000000}, | ||
1759 | {0x00007034, 0x00000002}, | ||
1760 | {0x00007038, 0x000004c2}, | ||
1761 | {0x00007048, 0x00000008}, | ||
1762 | }; | ||
1763 | |||
1764 | static const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2[][2] = { | ||
1765 | /* Addr allmodes */ | ||
1766 | {0x00004040, 0x08212e5e}, | ||
1767 | {0x00004040, 0x0008003b}, | ||
1768 | {0x00004044, 0x00000000}, | ||
1769 | }; | ||
1770 | |||
1771 | static const u32 ar9300PciePhy_clkreq_enable_L1_2p2[][2] = { | ||
1772 | /* Addr allmodes */ | ||
1773 | {0x00004040, 0x08253e5e}, | ||
1774 | {0x00004040, 0x0008003b}, | ||
1775 | {0x00004044, 0x00000000}, | ||
1776 | }; | ||
1777 | |||
1778 | static const u32 ar9300PciePhy_clkreq_disable_L1_2p2[][2] = { | ||
1779 | /* Addr allmodes */ | ||
1780 | {0x00004040, 0x08213e5e}, | ||
1781 | {0x00004040, 0x0008003b}, | ||
1782 | {0x00004044, 0x00000000}, | ||
1783 | }; | ||
1784 | |||
1785 | #endif /* INITVALS_9003_2P2_H */ | ||
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c index 56a9e5fa6d66..5a0650399136 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c | |||
@@ -739,6 +739,12 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, | |||
739 | */ | 739 | */ |
740 | ar9003_hw_set_chain_masks(ah, 0x7, 0x7); | 740 | ar9003_hw_set_chain_masks(ah, 0x7, 0x7); |
741 | 741 | ||
742 | /* Do Tx IQ Calibration */ | ||
743 | ar9003_hw_tx_iq_cal(ah); | ||
744 | REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); | ||
745 | udelay(5); | ||
746 | REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); | ||
747 | |||
742 | /* Calibrate the AGC */ | 748 | /* Calibrate the AGC */ |
743 | REG_WRITE(ah, AR_PHY_AGC_CONTROL, | 749 | REG_WRITE(ah, AR_PHY_AGC_CONTROL, |
744 | REG_READ(ah, AR_PHY_AGC_CONTROL) | | 750 | REG_READ(ah, AR_PHY_AGC_CONTROL) | |
@@ -753,10 +759,6 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, | |||
753 | return false; | 759 | return false; |
754 | } | 760 | } |
755 | 761 | ||
756 | /* Do Tx IQ Calibration */ | ||
757 | if (ah->config.tx_iq_calibration) | ||
758 | ar9003_hw_tx_iq_cal(ah); | ||
759 | |||
760 | /* Revert chainmasks to their original values before NF cal */ | 762 | /* Revert chainmasks to their original values before NF cal */ |
761 | ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); | 763 | ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); |
762 | 764 | ||
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c index b15309caf1da..863f61e3a16f 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c | |||
@@ -16,7 +16,8 @@ | |||
16 | 16 | ||
17 | #include "hw.h" | 17 | #include "hw.h" |
18 | #include "ar9003_mac.h" | 18 | #include "ar9003_mac.h" |
19 | #include "ar9003_initvals.h" | 19 | #include "ar9003_2p0_initvals.h" |
20 | #include "ar9003_2p2_initvals.h" | ||
20 | 21 | ||
21 | /* General hardware code for the AR9003 hadware family */ | 22 | /* General hardware code for the AR9003 hadware family */ |
22 | 23 | ||
@@ -31,12 +32,8 @@ static bool ar9003_hw_macversion_supported(u32 macversion) | |||
31 | return false; | 32 | return false; |
32 | } | 33 | } |
33 | 34 | ||
34 | /* AR9003 2.0 - new INI format (pre, core, post arrays per subsystem) */ | 35 | /* AR9003 2.0 */ |
35 | /* | 36 | static void ar9003_2p0_hw_init_mode_regs(struct ath_hw *ah) |
36 | * XXX: move TX/RX gain INI to its own init_mode_gain_regs after | ||
37 | * ensuring it does not affect hardware bring up | ||
38 | */ | ||
39 | static void ar9003_hw_init_mode_regs(struct ath_hw *ah) | ||
40 | { | 37 | { |
41 | /* mac */ | 38 | /* mac */ |
42 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); | 39 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); |
@@ -106,27 +103,128 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah) | |||
106 | 3); | 103 | 3); |
107 | } | 104 | } |
108 | 105 | ||
106 | /* AR9003 2.2 */ | ||
107 | static void ar9003_2p2_hw_init_mode_regs(struct ath_hw *ah) | ||
108 | { | ||
109 | /* mac */ | ||
110 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); | ||
111 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], | ||
112 | ar9300_2p2_mac_core, | ||
113 | ARRAY_SIZE(ar9300_2p2_mac_core), 2); | ||
114 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], | ||
115 | ar9300_2p2_mac_postamble, | ||
116 | ARRAY_SIZE(ar9300_2p2_mac_postamble), 5); | ||
117 | |||
118 | /* bb */ | ||
119 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0); | ||
120 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], | ||
121 | ar9300_2p2_baseband_core, | ||
122 | ARRAY_SIZE(ar9300_2p2_baseband_core), 2); | ||
123 | INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], | ||
124 | ar9300_2p2_baseband_postamble, | ||
125 | ARRAY_SIZE(ar9300_2p2_baseband_postamble), 5); | ||
126 | |||
127 | /* radio */ | ||
128 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0); | ||
129 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], | ||
130 | ar9300_2p2_radio_core, | ||
131 | ARRAY_SIZE(ar9300_2p2_radio_core), 2); | ||
132 | INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], | ||
133 | ar9300_2p2_radio_postamble, | ||
134 | ARRAY_SIZE(ar9300_2p2_radio_postamble), 5); | ||
135 | |||
136 | /* soc */ | ||
137 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], | ||
138 | ar9300_2p2_soc_preamble, | ||
139 | ARRAY_SIZE(ar9300_2p2_soc_preamble), 2); | ||
140 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0); | ||
141 | INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], | ||
142 | ar9300_2p2_soc_postamble, | ||
143 | ARRAY_SIZE(ar9300_2p2_soc_postamble), 5); | ||
144 | |||
145 | /* rx/tx gain */ | ||
146 | INIT_INI_ARRAY(&ah->iniModesRxGain, | ||
147 | ar9300Common_rx_gain_table_2p2, | ||
148 | ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), 2); | ||
149 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
150 | ar9300Modes_lowest_ob_db_tx_gain_table_2p2, | ||
151 | ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2), | ||
152 | 5); | ||
153 | |||
154 | /* Load PCIE SERDES settings from INI */ | ||
155 | |||
156 | /* Awake Setting */ | ||
157 | |||
158 | INIT_INI_ARRAY(&ah->iniPcieSerdes, | ||
159 | ar9300PciePhy_pll_on_clkreq_disable_L1_2p2, | ||
160 | ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2), | ||
161 | 2); | ||
162 | |||
163 | /* Sleep Setting */ | ||
164 | |||
165 | INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, | ||
166 | ar9300PciePhy_clkreq_enable_L1_2p2, | ||
167 | ARRAY_SIZE(ar9300PciePhy_clkreq_enable_L1_2p2), | ||
168 | 2); | ||
169 | |||
170 | /* Fast clock modal settings */ | ||
171 | INIT_INI_ARRAY(&ah->iniModesAdditional, | ||
172 | ar9300Modes_fast_clock_2p2, | ||
173 | ARRAY_SIZE(ar9300Modes_fast_clock_2p2), | ||
174 | 3); | ||
175 | } | ||
176 | |||
177 | /* | ||
178 | * The AR9003 family uses a new INI format (pre, core, post | ||
179 | * arrays per subsystem). | ||
180 | */ | ||
181 | static void ar9003_hw_init_mode_regs(struct ath_hw *ah) | ||
182 | { | ||
183 | if (AR_SREV_9300_20(ah)) | ||
184 | ar9003_2p0_hw_init_mode_regs(ah); | ||
185 | else | ||
186 | ar9003_2p2_hw_init_mode_regs(ah); | ||
187 | } | ||
188 | |||
109 | static void ar9003_tx_gain_table_apply(struct ath_hw *ah) | 189 | static void ar9003_tx_gain_table_apply(struct ath_hw *ah) |
110 | { | 190 | { |
111 | switch (ar9003_hw_get_tx_gain_idx(ah)) { | 191 | switch (ar9003_hw_get_tx_gain_idx(ah)) { |
112 | case 0: | 192 | case 0: |
113 | default: | 193 | default: |
114 | INIT_INI_ARRAY(&ah->iniModesTxGain, | 194 | if (AR_SREV_9300_20(ah)) |
115 | ar9300Modes_lowest_ob_db_tx_gain_table_2p0, | 195 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
116 | ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p0), | 196 | ar9300Modes_lowest_ob_db_tx_gain_table_2p0, |
117 | 5); | 197 | ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p0), |
198 | 5); | ||
199 | else | ||
200 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
201 | ar9300Modes_lowest_ob_db_tx_gain_table_2p2, | ||
202 | ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2), | ||
203 | 5); | ||
118 | break; | 204 | break; |
119 | case 1: | 205 | case 1: |
120 | INIT_INI_ARRAY(&ah->iniModesTxGain, | 206 | if (AR_SREV_9300_20(ah)) |
121 | ar9300Modes_high_ob_db_tx_gain_table_2p0, | 207 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
122 | ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p0), | 208 | ar9300Modes_high_ob_db_tx_gain_table_2p0, |
123 | 5); | 209 | ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p0), |
210 | 5); | ||
211 | else | ||
212 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
213 | ar9300Modes_high_ob_db_tx_gain_table_2p2, | ||
214 | ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2), | ||
215 | 5); | ||
124 | break; | 216 | break; |
125 | case 2: | 217 | case 2: |
126 | INIT_INI_ARRAY(&ah->iniModesTxGain, | 218 | if (AR_SREV_9300_20(ah)) |
127 | ar9300Modes_low_ob_db_tx_gain_table_2p0, | 219 | INIT_INI_ARRAY(&ah->iniModesTxGain, |
128 | ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p0), | 220 | ar9300Modes_low_ob_db_tx_gain_table_2p0, |
129 | 5); | 221 | ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p0), |
222 | 5); | ||
223 | else | ||
224 | INIT_INI_ARRAY(&ah->iniModesTxGain, | ||
225 | ar9300Modes_low_ob_db_tx_gain_table_2p2, | ||
226 | ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2), | ||
227 | 5); | ||
130 | break; | 228 | break; |
131 | } | 229 | } |
132 | } | 230 | } |
@@ -136,15 +234,28 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah) | |||
136 | switch (ar9003_hw_get_rx_gain_idx(ah)) { | 234 | switch (ar9003_hw_get_rx_gain_idx(ah)) { |
137 | case 0: | 235 | case 0: |
138 | default: | 236 | default: |
139 | INIT_INI_ARRAY(&ah->iniModesRxGain, ar9300Common_rx_gain_table_2p0, | 237 | if (AR_SREV_9300_20(ah)) |
140 | ARRAY_SIZE(ar9300Common_rx_gain_table_2p0), | 238 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
141 | 2); | 239 | ar9300Common_rx_gain_table_2p0, |
240 | ARRAY_SIZE(ar9300Common_rx_gain_table_2p0), | ||
241 | 2); | ||
242 | else | ||
243 | INIT_INI_ARRAY(&ah->iniModesRxGain, | ||
244 | ar9300Common_rx_gain_table_2p2, | ||
245 | ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), | ||
246 | 2); | ||
142 | break; | 247 | break; |
143 | case 1: | 248 | case 1: |
144 | INIT_INI_ARRAY(&ah->iniModesRxGain, | 249 | if (AR_SREV_9300_20(ah)) |
145 | ar9300Common_wo_xlna_rx_gain_table_2p0, | 250 | INIT_INI_ARRAY(&ah->iniModesRxGain, |
146 | ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p0), | 251 | ar9300Common_wo_xlna_rx_gain_table_2p0, |
147 | 2); | 252 | ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p0), |
253 | 2); | ||
254 | else | ||
255 | INIT_INI_ARRAY(&ah->iniModesRxGain, | ||
256 | ar9300Common_wo_xlna_rx_gain_table_2p2, | ||
257 | ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2), | ||
258 | 2); | ||
148 | break; | 259 | break; |
149 | } | 260 | } |
150 | } | 261 | } |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.c b/drivers/net/wireless/ath/ath9k/ar9003_mac.c index 37ba37481a47..40731077cbb4 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c | |||
@@ -90,6 +90,8 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked) | |||
90 | MAP_ISR_S2_CST); | 90 | MAP_ISR_S2_CST); |
91 | mask2 |= ((isr2 & AR_ISR_S2_TSFOOR) >> | 91 | mask2 |= ((isr2 & AR_ISR_S2_TSFOOR) >> |
92 | MAP_ISR_S2_TSFOOR); | 92 | MAP_ISR_S2_TSFOOR); |
93 | mask2 |= ((isr2 & AR_ISR_S2_BB_WATCHDOG) >> | ||
94 | MAP_ISR_S2_BB_WATCHDOG); | ||
93 | 95 | ||
94 | if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) { | 96 | if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) { |
95 | REG_WRITE(ah, AR_ISR_S2, isr2); | 97 | REG_WRITE(ah, AR_ISR_S2, isr2); |
@@ -167,6 +169,9 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked) | |||
167 | 169 | ||
168 | (void) REG_READ(ah, AR_ISR); | 170 | (void) REG_READ(ah, AR_ISR); |
169 | } | 171 | } |
172 | |||
173 | if (*masked & ATH9K_INT_BB_WATCHDOG) | ||
174 | ar9003_hw_bb_watchdog_read(ah); | ||
170 | } | 175 | } |
171 | 176 | ||
172 | if (sync_cause) { | 177 | if (sync_cause) { |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.h b/drivers/net/wireless/ath/ath9k/ar9003_mac.h index f17558b14539..5a7a286e2773 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_mac.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.h | |||
@@ -47,6 +47,7 @@ | |||
47 | #define MAP_ISR_S2_DTIMSYNC 7 | 47 | #define MAP_ISR_S2_DTIMSYNC 7 |
48 | #define MAP_ISR_S2_DTIM 7 | 48 | #define MAP_ISR_S2_DTIM 7 |
49 | #define MAP_ISR_S2_TSFOOR 4 | 49 | #define MAP_ISR_S2_TSFOOR 4 |
50 | #define MAP_ISR_S2_BB_WATCHDOG 6 | ||
50 | 51 | ||
51 | #define AR9003TXC_CONST(_ds) ((const struct ar9003_txc *) _ds) | 52 | #define AR9003TXC_CONST(_ds) ((const struct ar9003_txc *) _ds) |
52 | 53 | ||
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index 80431a2f6dc1..c714579b5483 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c | |||
@@ -1132,3 +1132,122 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah) | |||
1132 | priv_ops->do_getnf = ar9003_hw_do_getnf; | 1132 | priv_ops->do_getnf = ar9003_hw_do_getnf; |
1133 | priv_ops->loadnf = ar9003_hw_loadnf; | 1133 | priv_ops->loadnf = ar9003_hw_loadnf; |
1134 | } | 1134 | } |
1135 | |||
1136 | void ar9003_hw_bb_watchdog_config(struct ath_hw *ah) | ||
1137 | { | ||
1138 | struct ath_common *common = ath9k_hw_common(ah); | ||
1139 | u32 idle_tmo_ms = ah->bb_watchdog_timeout_ms; | ||
1140 | u32 val, idle_count; | ||
1141 | |||
1142 | if (!idle_tmo_ms) { | ||
1143 | /* disable IRQ, disable chip-reset for BB panic */ | ||
1144 | REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_2, | ||
1145 | REG_READ(ah, AR_PHY_WATCHDOG_CTL_2) & | ||
1146 | ~(AR_PHY_WATCHDOG_RST_ENABLE | | ||
1147 | AR_PHY_WATCHDOG_IRQ_ENABLE)); | ||
1148 | |||
1149 | /* disable watchdog in non-IDLE mode, disable in IDLE mode */ | ||
1150 | REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_1, | ||
1151 | REG_READ(ah, AR_PHY_WATCHDOG_CTL_1) & | ||
1152 | ~(AR_PHY_WATCHDOG_NON_IDLE_ENABLE | | ||
1153 | AR_PHY_WATCHDOG_IDLE_ENABLE)); | ||
1154 | |||
1155 | ath_print(common, ATH_DBG_RESET, "Disabled BB Watchdog\n"); | ||
1156 | return; | ||
1157 | } | ||
1158 | |||
1159 | /* enable IRQ, disable chip-reset for BB watchdog */ | ||
1160 | val = REG_READ(ah, AR_PHY_WATCHDOG_CTL_2) & AR_PHY_WATCHDOG_CNTL2_MASK; | ||
1161 | REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_2, | ||
1162 | (val | AR_PHY_WATCHDOG_IRQ_ENABLE) & | ||
1163 | ~AR_PHY_WATCHDOG_RST_ENABLE); | ||
1164 | |||
1165 | /* bound limit to 10 secs */ | ||
1166 | if (idle_tmo_ms > 10000) | ||
1167 | idle_tmo_ms = 10000; | ||
1168 | |||
1169 | /* | ||
1170 | * The time unit for watchdog event is 2^15 44/88MHz cycles. | ||
1171 | * | ||
1172 | * For HT20 we have a time unit of 2^15/44 MHz = .74 ms per tick | ||
1173 | * For HT40 we have a time unit of 2^15/88 MHz = .37 ms per tick | ||
1174 | * | ||
1175 | * Given we use fast clock now in 5 GHz, these time units should | ||
1176 | * be common for both 2 GHz and 5 GHz. | ||
1177 | */ | ||
1178 | idle_count = (100 * idle_tmo_ms) / 74; | ||
1179 | if (ah->curchan && IS_CHAN_HT40(ah->curchan)) | ||
1180 | idle_count = (100 * idle_tmo_ms) / 37; | ||
1181 | |||
1182 | /* | ||
1183 | * enable watchdog in non-IDLE mode, disable in IDLE mode, | ||
1184 | * set idle time-out. | ||
1185 | */ | ||
1186 | REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_1, | ||
1187 | AR_PHY_WATCHDOG_NON_IDLE_ENABLE | | ||
1188 | AR_PHY_WATCHDOG_IDLE_MASK | | ||
1189 | (AR_PHY_WATCHDOG_NON_IDLE_MASK & (idle_count << 2))); | ||
1190 | |||
1191 | ath_print(common, ATH_DBG_RESET, | ||
1192 | "Enabled BB Watchdog timeout (%u ms)\n", | ||
1193 | idle_tmo_ms); | ||
1194 | } | ||
1195 | |||
1196 | void ar9003_hw_bb_watchdog_read(struct ath_hw *ah) | ||
1197 | { | ||
1198 | /* | ||
1199 | * we want to avoid printing in ISR context so we save the | ||
1200 | * watchdog status to be printed later in bottom half context. | ||
1201 | */ | ||
1202 | ah->bb_watchdog_last_status = REG_READ(ah, AR_PHY_WATCHDOG_STATUS); | ||
1203 | |||
1204 | /* | ||
1205 | * the watchdog timer should reset on status read but to be sure | ||
1206 | * sure we write 0 to the watchdog status bit. | ||
1207 | */ | ||
1208 | REG_WRITE(ah, AR_PHY_WATCHDOG_STATUS, | ||
1209 | ah->bb_watchdog_last_status & ~AR_PHY_WATCHDOG_STATUS_CLR); | ||
1210 | } | ||
1211 | |||
1212 | void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah) | ||
1213 | { | ||
1214 | struct ath_common *common = ath9k_hw_common(ah); | ||
1215 | u32 rxc_pcnt = 0, rxf_pcnt = 0, txf_pcnt = 0, status; | ||
1216 | |||
1217 | if (likely(!(common->debug_mask & ATH_DBG_RESET))) | ||
1218 | return; | ||
1219 | |||
1220 | status = ah->bb_watchdog_last_status; | ||
1221 | ath_print(common, ATH_DBG_RESET, | ||
1222 | "\n==== BB update: BB status=0x%08x ====\n", status); | ||
1223 | ath_print(common, ATH_DBG_RESET, | ||
1224 | "** BB state: wd=%u det=%u rdar=%u rOFDM=%d " | ||
1225 | "rCCK=%u tOFDM=%u tCCK=%u agc=%u src=%u **\n", | ||
1226 | MS(status, AR_PHY_WATCHDOG_INFO), | ||
1227 | MS(status, AR_PHY_WATCHDOG_DET_HANG), | ||
1228 | MS(status, AR_PHY_WATCHDOG_RADAR_SM), | ||
1229 | MS(status, AR_PHY_WATCHDOG_RX_OFDM_SM), | ||
1230 | MS(status, AR_PHY_WATCHDOG_RX_CCK_SM), | ||
1231 | MS(status, AR_PHY_WATCHDOG_TX_OFDM_SM), | ||
1232 | MS(status, AR_PHY_WATCHDOG_TX_CCK_SM), | ||
1233 | MS(status, AR_PHY_WATCHDOG_AGC_SM), | ||
1234 | MS(status,AR_PHY_WATCHDOG_SRCH_SM)); | ||
1235 | |||
1236 | ath_print(common, ATH_DBG_RESET, | ||
1237 | "** BB WD cntl: cntl1=0x%08x cntl2=0x%08x **\n", | ||
1238 | REG_READ(ah, AR_PHY_WATCHDOG_CTL_1), | ||
1239 | REG_READ(ah, AR_PHY_WATCHDOG_CTL_2)); | ||
1240 | ath_print(common, ATH_DBG_RESET, | ||
1241 | "** BB mode: BB_gen_controls=0x%08x **\n", | ||
1242 | REG_READ(ah, AR_PHY_GEN_CTRL)); | ||
1243 | |||
1244 | if (ath9k_hw_GetMibCycleCountsPct(ah, &rxc_pcnt, &rxf_pcnt, &txf_pcnt)) | ||
1245 | ath_print(common, ATH_DBG_RESET, | ||
1246 | "** BB busy times: rx_clear=%d%%, " | ||
1247 | "rx_frame=%d%%, tx_frame=%d%% **\n", | ||
1248 | rxc_pcnt, rxf_pcnt, txf_pcnt); | ||
1249 | |||
1250 | ath_print(common, ATH_DBG_RESET, | ||
1251 | "==== BB update: done ====\n\n"); | ||
1252 | } | ||
1253 | EXPORT_SYMBOL(ar9003_hw_bb_watchdog_dbg_info); | ||
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h index f08cc8bda005..676d3f1123f4 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h | |||
@@ -483,10 +483,10 @@ | |||
483 | #define AR_PHY_TX_IQCAL_STATUS_B0 (AR_SM_BASE + 0x48c) | 483 | #define AR_PHY_TX_IQCAL_STATUS_B0 (AR_SM_BASE + 0x48c) |
484 | #define AR_PHY_TX_IQCAL_CORR_COEFF_01_B0 (AR_SM_BASE + 0x450) | 484 | #define AR_PHY_TX_IQCAL_CORR_COEFF_01_B0 (AR_SM_BASE + 0x450) |
485 | 485 | ||
486 | #define AR_PHY_PANIC_WD_STATUS (AR_SM_BASE + 0x5c0) | 486 | #define AR_PHY_WATCHDOG_STATUS (AR_SM_BASE + 0x5c0) |
487 | #define AR_PHY_PANIC_WD_CTL_1 (AR_SM_BASE + 0x5c4) | 487 | #define AR_PHY_WATCHDOG_CTL_1 (AR_SM_BASE + 0x5c4) |
488 | #define AR_PHY_PANIC_WD_CTL_2 (AR_SM_BASE + 0x5c8) | 488 | #define AR_PHY_WATCHDOG_CTL_2 (AR_SM_BASE + 0x5c8) |
489 | #define AR_PHY_BT_CTL (AR_SM_BASE + 0x5cc) | 489 | #define AR_PHY_WATCHDOG_CTL (AR_SM_BASE + 0x5cc) |
490 | #define AR_PHY_ONLY_WARMRESET (AR_SM_BASE + 0x5d0) | 490 | #define AR_PHY_ONLY_WARMRESET (AR_SM_BASE + 0x5d0) |
491 | #define AR_PHY_ONLY_CTL (AR_SM_BASE + 0x5d4) | 491 | #define AR_PHY_ONLY_CTL (AR_SM_BASE + 0x5d4) |
492 | #define AR_PHY_ECO_CTRL (AR_SM_BASE + 0x5dc) | 492 | #define AR_PHY_ECO_CTRL (AR_SM_BASE + 0x5dc) |
@@ -812,35 +812,35 @@ | |||
812 | #define AR_PHY_CAL_MEAS_2_9300_10(_i) (AR_PHY_IQ_ADC_MEAS_2_B0_9300_10 + (AR_PHY_CHAIN_OFFSET * (_i))) | 812 | #define AR_PHY_CAL_MEAS_2_9300_10(_i) (AR_PHY_IQ_ADC_MEAS_2_B0_9300_10 + (AR_PHY_CHAIN_OFFSET * (_i))) |
813 | #define AR_PHY_CAL_MEAS_3_9300_10(_i) (AR_PHY_IQ_ADC_MEAS_3_B0_9300_10 + (AR_PHY_CHAIN_OFFSET * (_i))) | 813 | #define AR_PHY_CAL_MEAS_3_9300_10(_i) (AR_PHY_IQ_ADC_MEAS_3_B0_9300_10 + (AR_PHY_CHAIN_OFFSET * (_i))) |
814 | 814 | ||
815 | #define AR_PHY_BB_PANIC_NON_IDLE_ENABLE 0x00000001 | 815 | #define AR_PHY_WATCHDOG_NON_IDLE_ENABLE 0x00000001 |
816 | #define AR_PHY_BB_PANIC_IDLE_ENABLE 0x00000002 | 816 | #define AR_PHY_WATCHDOG_IDLE_ENABLE 0x00000002 |
817 | #define AR_PHY_BB_PANIC_IDLE_MASK 0xFFFF0000 | 817 | #define AR_PHY_WATCHDOG_IDLE_MASK 0xFFFF0000 |
818 | #define AR_PHY_BB_PANIC_NON_IDLE_MASK 0x0000FFFC | 818 | #define AR_PHY_WATCHDOG_NON_IDLE_MASK 0x0000FFFC |
819 | 819 | ||
820 | #define AR_PHY_BB_PANIC_RST_ENABLE 0x00000002 | 820 | #define AR_PHY_WATCHDOG_RST_ENABLE 0x00000002 |
821 | #define AR_PHY_BB_PANIC_IRQ_ENABLE 0x00000004 | 821 | #define AR_PHY_WATCHDOG_IRQ_ENABLE 0x00000004 |
822 | #define AR_PHY_BB_PANIC_CNTL2_MASK 0xFFFFFFF9 | 822 | #define AR_PHY_WATCHDOG_CNTL2_MASK 0xFFFFFFF9 |
823 | 823 | ||
824 | #define AR_PHY_BB_WD_STATUS 0x00000007 | 824 | #define AR_PHY_WATCHDOG_INFO 0x00000007 |
825 | #define AR_PHY_BB_WD_STATUS_S 0 | 825 | #define AR_PHY_WATCHDOG_INFO_S 0 |
826 | #define AR_PHY_BB_WD_DET_HANG 0x00000008 | 826 | #define AR_PHY_WATCHDOG_DET_HANG 0x00000008 |
827 | #define AR_PHY_BB_WD_DET_HANG_S 3 | 827 | #define AR_PHY_WATCHDOG_DET_HANG_S 3 |
828 | #define AR_PHY_BB_WD_RADAR_SM 0x000000F0 | 828 | #define AR_PHY_WATCHDOG_RADAR_SM 0x000000F0 |
829 | #define AR_PHY_BB_WD_RADAR_SM_S 4 | 829 | #define AR_PHY_WATCHDOG_RADAR_SM_S 4 |
830 | #define AR_PHY_BB_WD_RX_OFDM_SM 0x00000F00 | 830 | #define AR_PHY_WATCHDOG_RX_OFDM_SM 0x00000F00 |
831 | #define AR_PHY_BB_WD_RX_OFDM_SM_S 8 | 831 | #define AR_PHY_WATCHDOG_RX_OFDM_SM_S 8 |
832 | #define AR_PHY_BB_WD_RX_CCK_SM 0x0000F000 | 832 | #define AR_PHY_WATCHDOG_RX_CCK_SM 0x0000F000 |
833 | #define AR_PHY_BB_WD_RX_CCK_SM_S 12 | 833 | #define AR_PHY_WATCHDOG_RX_CCK_SM_S 12 |
834 | #define AR_PHY_BB_WD_TX_OFDM_SM 0x000F0000 | 834 | #define AR_PHY_WATCHDOG_TX_OFDM_SM 0x000F0000 |
835 | #define AR_PHY_BB_WD_TX_OFDM_SM_S 16 | 835 | #define AR_PHY_WATCHDOG_TX_OFDM_SM_S 16 |
836 | #define AR_PHY_BB_WD_TX_CCK_SM 0x00F00000 | 836 | #define AR_PHY_WATCHDOG_TX_CCK_SM 0x00F00000 |
837 | #define AR_PHY_BB_WD_TX_CCK_SM_S 20 | 837 | #define AR_PHY_WATCHDOG_TX_CCK_SM_S 20 |
838 | #define AR_PHY_BB_WD_AGC_SM 0x0F000000 | 838 | #define AR_PHY_WATCHDOG_AGC_SM 0x0F000000 |
839 | #define AR_PHY_BB_WD_AGC_SM_S 24 | 839 | #define AR_PHY_WATCHDOG_AGC_SM_S 24 |
840 | #define AR_PHY_BB_WD_SRCH_SM 0xF0000000 | 840 | #define AR_PHY_WATCHDOG_SRCH_SM 0xF0000000 |
841 | #define AR_PHY_BB_WD_SRCH_SM_S 28 | 841 | #define AR_PHY_WATCHDOG_SRCH_SM_S 28 |
842 | 842 | ||
843 | #define AR_PHY_BB_WD_STATUS_CLR 0x00000008 | 843 | #define AR_PHY_WATCHDOG_STATUS_CLR 0x00000008 |
844 | 844 | ||
845 | void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx); | 845 | void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx); |
846 | 846 | ||
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index fbb7dec6ddeb..82aca4b6154c 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h | |||
@@ -136,6 +136,8 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd, | |||
136 | #define ATH_MAX_ANTENNA 3 | 136 | #define ATH_MAX_ANTENNA 3 |
137 | #define ATH_RXBUF 512 | 137 | #define ATH_RXBUF 512 |
138 | #define ATH_TXBUF 512 | 138 | #define ATH_TXBUF 512 |
139 | #define ATH_TXBUF_RESERVE 5 | ||
140 | #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE) | ||
139 | #define ATH_TXMAXTRY 13 | 141 | #define ATH_TXMAXTRY 13 |
140 | #define ATH_MGT_TXMAXTRY 4 | 142 | #define ATH_MGT_TXMAXTRY 4 |
141 | 143 | ||
@@ -204,6 +206,71 @@ struct ath_txq { | |||
204 | struct list_head txq_fifo_pending; | 206 | struct list_head txq_fifo_pending; |
205 | u8 txq_headidx; | 207 | u8 txq_headidx; |
206 | u8 txq_tailidx; | 208 | u8 txq_tailidx; |
209 | int pending_frames; | ||
210 | }; | ||
211 | |||
212 | struct ath_atx_ac { | ||
213 | int sched; | ||
214 | int qnum; | ||
215 | struct list_head list; | ||
216 | struct list_head tid_q; | ||
217 | }; | ||
218 | |||
219 | struct ath_buf_state { | ||
220 | int bfs_nframes; | ||
221 | u16 bfs_al; | ||
222 | u16 bfs_frmlen; | ||
223 | int bfs_seqno; | ||
224 | int bfs_tidno; | ||
225 | int bfs_retries; | ||
226 | u8 bf_type; | ||
227 | u32 bfs_keyix; | ||
228 | enum ath9k_key_type bfs_keytype; | ||
229 | }; | ||
230 | |||
231 | struct ath_buf { | ||
232 | struct list_head list; | ||
233 | struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or | ||
234 | an aggregate) */ | ||
235 | struct ath_buf *bf_next; /* next subframe in the aggregate */ | ||
236 | struct sk_buff *bf_mpdu; /* enclosing frame structure */ | ||
237 | void *bf_desc; /* virtual addr of desc */ | ||
238 | dma_addr_t bf_daddr; /* physical addr of desc */ | ||
239 | dma_addr_t bf_buf_addr; /* physical addr of data buffer */ | ||
240 | bool bf_stale; | ||
241 | bool bf_isnullfunc; | ||
242 | bool bf_tx_aborted; | ||
243 | u16 bf_flags; | ||
244 | struct ath_buf_state bf_state; | ||
245 | dma_addr_t bf_dmacontext; | ||
246 | struct ath_wiphy *aphy; | ||
247 | struct ath_txq *txq; | ||
248 | }; | ||
249 | |||
250 | struct ath_atx_tid { | ||
251 | struct list_head list; | ||
252 | struct list_head buf_q; | ||
253 | struct ath_node *an; | ||
254 | struct ath_atx_ac *ac; | ||
255 | struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; | ||
256 | u16 seq_start; | ||
257 | u16 seq_next; | ||
258 | u16 baw_size; | ||
259 | int tidno; | ||
260 | int baw_head; /* first un-acked tx buffer */ | ||
261 | int baw_tail; /* next unused tx buffer slot */ | ||
262 | int sched; | ||
263 | int paused; | ||
264 | u8 state; | ||
265 | }; | ||
266 | |||
267 | struct ath_node { | ||
268 | struct ath_common *common; | ||
269 | struct ath_atx_tid tid[WME_NUM_TID]; | ||
270 | struct ath_atx_ac ac[WME_NUM_AC]; | ||
271 | u16 maxampdu; | ||
272 | u8 mpdudensity; | ||
273 | int last_rssi; | ||
207 | }; | 274 | }; |
208 | 275 | ||
209 | #define AGGR_CLEANUP BIT(1) | 276 | #define AGGR_CLEANUP BIT(1) |
@@ -267,7 +334,6 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); | |||
267 | void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); | 334 | void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); |
268 | int ath_tx_init(struct ath_softc *sc, int nbufs); | 335 | int ath_tx_init(struct ath_softc *sc, int nbufs); |
269 | void ath_tx_cleanup(struct ath_softc *sc); | 336 | void ath_tx_cleanup(struct ath_softc *sc); |
270 | struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb); | ||
271 | int ath_txq_update(struct ath_softc *sc, int qnum, | 337 | int ath_txq_update(struct ath_softc *sc, int qnum, |
272 | struct ath9k_tx_queue_info *q); | 338 | struct ath9k_tx_queue_info *q); |
273 | int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, | 339 | int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, |
diff --git a/drivers/net/wireless/ath/ath9k/common.c b/drivers/net/wireless/ath/ath9k/common.c index 7707341cd0d3..16e2849f644d 100644 --- a/drivers/net/wireless/ath/ath9k/common.c +++ b/drivers/net/wireless/ath/ath9k/common.c | |||
@@ -27,270 +27,6 @@ MODULE_AUTHOR("Atheros Communications"); | |||
27 | MODULE_DESCRIPTION("Shared library for Atheros wireless 802.11n LAN cards."); | 27 | MODULE_DESCRIPTION("Shared library for Atheros wireless 802.11n LAN cards."); |
28 | MODULE_LICENSE("Dual BSD/GPL"); | 28 | MODULE_LICENSE("Dual BSD/GPL"); |
29 | 29 | ||
30 | /* Common RX processing */ | ||
31 | |||
32 | /* Assumes you've already done the endian to CPU conversion */ | ||
33 | static bool ath9k_rx_accept(struct ath_common *common, | ||
34 | struct sk_buff *skb, | ||
35 | struct ieee80211_rx_status *rxs, | ||
36 | struct ath_rx_status *rx_stats, | ||
37 | bool *decrypt_error) | ||
38 | { | ||
39 | struct ath_hw *ah = common->ah; | ||
40 | struct ieee80211_hdr *hdr; | ||
41 | __le16 fc; | ||
42 | |||
43 | hdr = (struct ieee80211_hdr *) skb->data; | ||
44 | fc = hdr->frame_control; | ||
45 | |||
46 | if (!rx_stats->rs_datalen) | ||
47 | return false; | ||
48 | /* | ||
49 | * rs_status follows rs_datalen so if rs_datalen is too large | ||
50 | * we can take a hint that hardware corrupted it, so ignore | ||
51 | * those frames. | ||
52 | */ | ||
53 | if (rx_stats->rs_datalen > common->rx_bufsize) | ||
54 | return false; | ||
55 | |||
56 | /* | ||
57 | * rs_more indicates chained descriptors which can be used | ||
58 | * to link buffers together for a sort of scatter-gather | ||
59 | * operation. | ||
60 | * reject the frame, we don't support scatter-gather yet and | ||
61 | * the frame is probably corrupt anyway | ||
62 | */ | ||
63 | if (rx_stats->rs_more) | ||
64 | return false; | ||
65 | |||
66 | /* | ||
67 | * The rx_stats->rs_status will not be set until the end of the | ||
68 | * chained descriptors so it can be ignored if rs_more is set. The | ||
69 | * rs_more will be false at the last element of the chained | ||
70 | * descriptors. | ||
71 | */ | ||
72 | if (rx_stats->rs_status != 0) { | ||
73 | if (rx_stats->rs_status & ATH9K_RXERR_CRC) | ||
74 | rxs->flag |= RX_FLAG_FAILED_FCS_CRC; | ||
75 | if (rx_stats->rs_status & ATH9K_RXERR_PHY) | ||
76 | return false; | ||
77 | |||
78 | if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) { | ||
79 | *decrypt_error = true; | ||
80 | } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) { | ||
81 | if (ieee80211_is_ctl(fc)) | ||
82 | /* | ||
83 | * Sometimes, we get invalid | ||
84 | * MIC failures on valid control frames. | ||
85 | * Remove these mic errors. | ||
86 | */ | ||
87 | rx_stats->rs_status &= ~ATH9K_RXERR_MIC; | ||
88 | else | ||
89 | rxs->flag |= RX_FLAG_MMIC_ERROR; | ||
90 | } | ||
91 | /* | ||
92 | * Reject error frames with the exception of | ||
93 | * decryption and MIC failures. For monitor mode, | ||
94 | * we also ignore the CRC error. | ||
95 | */ | ||
96 | if (ah->opmode == NL80211_IFTYPE_MONITOR) { | ||
97 | if (rx_stats->rs_status & | ||
98 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | | ||
99 | ATH9K_RXERR_CRC)) | ||
100 | return false; | ||
101 | } else { | ||
102 | if (rx_stats->rs_status & | ||
103 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) { | ||
104 | return false; | ||
105 | } | ||
106 | } | ||
107 | } | ||
108 | return true; | ||
109 | } | ||
110 | |||
111 | static int ath9k_process_rate(struct ath_common *common, | ||
112 | struct ieee80211_hw *hw, | ||
113 | struct ath_rx_status *rx_stats, | ||
114 | struct ieee80211_rx_status *rxs, | ||
115 | struct sk_buff *skb) | ||
116 | { | ||
117 | struct ieee80211_supported_band *sband; | ||
118 | enum ieee80211_band band; | ||
119 | unsigned int i = 0; | ||
120 | |||
121 | band = hw->conf.channel->band; | ||
122 | sband = hw->wiphy->bands[band]; | ||
123 | |||
124 | if (rx_stats->rs_rate & 0x80) { | ||
125 | /* HT rate */ | ||
126 | rxs->flag |= RX_FLAG_HT; | ||
127 | if (rx_stats->rs_flags & ATH9K_RX_2040) | ||
128 | rxs->flag |= RX_FLAG_40MHZ; | ||
129 | if (rx_stats->rs_flags & ATH9K_RX_GI) | ||
130 | rxs->flag |= RX_FLAG_SHORT_GI; | ||
131 | rxs->rate_idx = rx_stats->rs_rate & 0x7f; | ||
132 | return 0; | ||
133 | } | ||
134 | |||
135 | for (i = 0; i < sband->n_bitrates; i++) { | ||
136 | if (sband->bitrates[i].hw_value == rx_stats->rs_rate) { | ||
137 | rxs->rate_idx = i; | ||
138 | return 0; | ||
139 | } | ||
140 | if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) { | ||
141 | rxs->flag |= RX_FLAG_SHORTPRE; | ||
142 | rxs->rate_idx = i; | ||
143 | return 0; | ||
144 | } | ||
145 | } | ||
146 | |||
147 | /* | ||
148 | * No valid hardware bitrate found -- we should not get here | ||
149 | * because hardware has already validated this frame as OK. | ||
150 | */ | ||
151 | ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected " | ||
152 | "0x%02x using 1 Mbit\n", rx_stats->rs_rate); | ||
153 | if ((common->debug_mask & ATH_DBG_XMIT)) | ||
154 | print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len); | ||
155 | |||
156 | return -EINVAL; | ||
157 | } | ||
158 | |||
159 | static void ath9k_process_rssi(struct ath_common *common, | ||
160 | struct ieee80211_hw *hw, | ||
161 | struct sk_buff *skb, | ||
162 | struct ath_rx_status *rx_stats) | ||
163 | { | ||
164 | struct ath_hw *ah = common->ah; | ||
165 | struct ieee80211_sta *sta; | ||
166 | struct ieee80211_hdr *hdr; | ||
167 | struct ath_node *an; | ||
168 | int last_rssi = ATH_RSSI_DUMMY_MARKER; | ||
169 | __le16 fc; | ||
170 | |||
171 | hdr = (struct ieee80211_hdr *)skb->data; | ||
172 | fc = hdr->frame_control; | ||
173 | |||
174 | rcu_read_lock(); | ||
175 | /* | ||
176 | * XXX: use ieee80211_find_sta! This requires quite a bit of work | ||
177 | * under the current ath9k virtual wiphy implementation as we have | ||
178 | * no way of tying a vif to wiphy. Typically vifs are attached to | ||
179 | * at least one sdata of a wiphy on mac80211 but with ath9k virtual | ||
180 | * wiphy you'd have to iterate over every wiphy and each sdata. | ||
181 | */ | ||
182 | sta = ieee80211_find_sta_by_hw(hw, hdr->addr2); | ||
183 | if (sta) { | ||
184 | an = (struct ath_node *) sta->drv_priv; | ||
185 | if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && | ||
186 | !rx_stats->rs_moreaggr) | ||
187 | ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi); | ||
188 | last_rssi = an->last_rssi; | ||
189 | } | ||
190 | rcu_read_unlock(); | ||
191 | |||
192 | if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER)) | ||
193 | rx_stats->rs_rssi = ATH_EP_RND(last_rssi, | ||
194 | ATH_RSSI_EP_MULTIPLIER); | ||
195 | if (rx_stats->rs_rssi < 0) | ||
196 | rx_stats->rs_rssi = 0; | ||
197 | |||
198 | /* Update Beacon RSSI, this is used by ANI. */ | ||
199 | if (ieee80211_is_beacon(fc)) | ||
200 | ah->stats.avgbrssi = rx_stats->rs_rssi; | ||
201 | } | ||
202 | |||
203 | /* | ||
204 | * For Decrypt or Demic errors, we only mark packet status here and always push | ||
205 | * up the frame up to let mac80211 handle the actual error case, be it no | ||
206 | * decryption key or real decryption error. This let us keep statistics there. | ||
207 | */ | ||
208 | int ath9k_cmn_rx_skb_preprocess(struct ath_common *common, | ||
209 | struct ieee80211_hw *hw, | ||
210 | struct sk_buff *skb, | ||
211 | struct ath_rx_status *rx_stats, | ||
212 | struct ieee80211_rx_status *rx_status, | ||
213 | bool *decrypt_error) | ||
214 | { | ||
215 | struct ath_hw *ah = common->ah; | ||
216 | |||
217 | memset(rx_status, 0, sizeof(struct ieee80211_rx_status)); | ||
218 | |||
219 | /* | ||
220 | * everything but the rate is checked here, the rate check is done | ||
221 | * separately to avoid doing two lookups for a rate for each frame. | ||
222 | */ | ||
223 | if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error)) | ||
224 | return -EINVAL; | ||
225 | |||
226 | ath9k_process_rssi(common, hw, skb, rx_stats); | ||
227 | |||
228 | if (ath9k_process_rate(common, hw, rx_stats, rx_status, skb)) | ||
229 | return -EINVAL; | ||
230 | |||
231 | rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp); | ||
232 | rx_status->band = hw->conf.channel->band; | ||
233 | rx_status->freq = hw->conf.channel->center_freq; | ||
234 | rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi; | ||
235 | rx_status->antenna = rx_stats->rs_antenna; | ||
236 | rx_status->flag |= RX_FLAG_TSFT; | ||
237 | |||
238 | return 0; | ||
239 | } | ||
240 | EXPORT_SYMBOL(ath9k_cmn_rx_skb_preprocess); | ||
241 | |||
242 | void ath9k_cmn_rx_skb_postprocess(struct ath_common *common, | ||
243 | struct sk_buff *skb, | ||
244 | struct ath_rx_status *rx_stats, | ||
245 | struct ieee80211_rx_status *rxs, | ||
246 | bool decrypt_error) | ||
247 | { | ||
248 | struct ath_hw *ah = common->ah; | ||
249 | struct ieee80211_hdr *hdr; | ||
250 | int hdrlen, padpos, padsize; | ||
251 | u8 keyix; | ||
252 | __le16 fc; | ||
253 | |||
254 | /* see if any padding is done by the hw and remove it */ | ||
255 | hdr = (struct ieee80211_hdr *) skb->data; | ||
256 | hdrlen = ieee80211_get_hdrlen_from_skb(skb); | ||
257 | fc = hdr->frame_control; | ||
258 | padpos = ath9k_cmn_padpos(hdr->frame_control); | ||
259 | |||
260 | /* The MAC header is padded to have 32-bit boundary if the | ||
261 | * packet payload is non-zero. The general calculation for | ||
262 | * padsize would take into account odd header lengths: | ||
263 | * padsize = (4 - padpos % 4) % 4; However, since only | ||
264 | * even-length headers are used, padding can only be 0 or 2 | ||
265 | * bytes and we can optimize this a bit. In addition, we must | ||
266 | * not try to remove padding from short control frames that do | ||
267 | * not have payload. */ | ||
268 | padsize = padpos & 3; | ||
269 | if (padsize && skb->len>=padpos+padsize+FCS_LEN) { | ||
270 | memmove(skb->data + padsize, skb->data, padpos); | ||
271 | skb_pull(skb, padsize); | ||
272 | } | ||
273 | |||
274 | keyix = rx_stats->rs_keyix; | ||
275 | |||
276 | if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error && | ||
277 | ieee80211_has_protected(fc)) { | ||
278 | rxs->flag |= RX_FLAG_DECRYPTED; | ||
279 | } else if (ieee80211_has_protected(fc) | ||
280 | && !decrypt_error && skb->len >= hdrlen + 4) { | ||
281 | keyix = skb->data[hdrlen + 3] >> 6; | ||
282 | |||
283 | if (test_bit(keyix, common->keymap)) | ||
284 | rxs->flag |= RX_FLAG_DECRYPTED; | ||
285 | } | ||
286 | if (ah->sw_mgmt_crypto && | ||
287 | (rxs->flag & RX_FLAG_DECRYPTED) && | ||
288 | ieee80211_is_mgmt(fc)) | ||
289 | /* Use software decrypt for management frames. */ | ||
290 | rxs->flag &= ~RX_FLAG_DECRYPTED; | ||
291 | } | ||
292 | EXPORT_SYMBOL(ath9k_cmn_rx_skb_postprocess); | ||
293 | |||
294 | int ath9k_cmn_padpos(__le16 frame_control) | 30 | int ath9k_cmn_padpos(__le16 frame_control) |
295 | { | 31 | { |
296 | int padpos = 24; | 32 | int padpos = 24; |
@@ -475,10 +211,14 @@ static int ath_reserve_key_cache_slot_tkip(struct ath_common *common) | |||
475 | return -1; | 211 | return -1; |
476 | } | 212 | } |
477 | 213 | ||
478 | static int ath_reserve_key_cache_slot(struct ath_common *common) | 214 | static int ath_reserve_key_cache_slot(struct ath_common *common, |
215 | enum ieee80211_key_alg alg) | ||
479 | { | 216 | { |
480 | int i; | 217 | int i; |
481 | 218 | ||
219 | if (alg == ALG_TKIP) | ||
220 | return ath_reserve_key_cache_slot_tkip(common); | ||
221 | |||
482 | /* First, try to find slots that would not be available for TKIP. */ | 222 | /* First, try to find slots that would not be available for TKIP. */ |
483 | if (common->splitmic) { | 223 | if (common->splitmic) { |
484 | for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) { | 224 | for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) { |
@@ -547,6 +287,7 @@ int ath9k_cmn_key_config(struct ath_common *common, | |||
547 | struct ath_hw *ah = common->ah; | 287 | struct ath_hw *ah = common->ah; |
548 | struct ath9k_keyval hk; | 288 | struct ath9k_keyval hk; |
549 | const u8 *mac = NULL; | 289 | const u8 *mac = NULL; |
290 | u8 gmac[ETH_ALEN]; | ||
550 | int ret = 0; | 291 | int ret = 0; |
551 | int idx; | 292 | int idx; |
552 | 293 | ||
@@ -570,9 +311,23 @@ int ath9k_cmn_key_config(struct ath_common *common, | |||
570 | memcpy(hk.kv_val, key->key, key->keylen); | 311 | memcpy(hk.kv_val, key->key, key->keylen); |
571 | 312 | ||
572 | if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { | 313 | if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { |
573 | /* For now, use the default keys for broadcast keys. This may | 314 | switch (vif->type) { |
574 | * need to change with virtual interfaces. */ | 315 | case NL80211_IFTYPE_AP: |
575 | idx = key->keyidx; | 316 | memcpy(gmac, vif->addr, ETH_ALEN); |
317 | gmac[0] |= 0x01; | ||
318 | mac = gmac; | ||
319 | idx = ath_reserve_key_cache_slot(common, key->alg); | ||
320 | break; | ||
321 | case NL80211_IFTYPE_ADHOC: | ||
322 | memcpy(gmac, sta->addr, ETH_ALEN); | ||
323 | gmac[0] |= 0x01; | ||
324 | mac = gmac; | ||
325 | idx = ath_reserve_key_cache_slot(common, key->alg); | ||
326 | break; | ||
327 | default: | ||
328 | idx = key->keyidx; | ||
329 | break; | ||
330 | } | ||
576 | } else if (key->keyidx) { | 331 | } else if (key->keyidx) { |
577 | if (WARN_ON(!sta)) | 332 | if (WARN_ON(!sta)) |
578 | return -EOPNOTSUPP; | 333 | return -EOPNOTSUPP; |
@@ -589,14 +344,12 @@ int ath9k_cmn_key_config(struct ath_common *common, | |||
589 | return -EOPNOTSUPP; | 344 | return -EOPNOTSUPP; |
590 | mac = sta->addr; | 345 | mac = sta->addr; |
591 | 346 | ||
592 | if (key->alg == ALG_TKIP) | 347 | idx = ath_reserve_key_cache_slot(common, key->alg); |
593 | idx = ath_reserve_key_cache_slot_tkip(common); | ||
594 | else | ||
595 | idx = ath_reserve_key_cache_slot(common); | ||
596 | if (idx < 0) | ||
597 | return -ENOSPC; /* no free key cache entries */ | ||
598 | } | 348 | } |
599 | 349 | ||
350 | if (idx < 0) | ||
351 | return -ENOSPC; /* no free key cache entries */ | ||
352 | |||
600 | if (key->alg == ALG_TKIP) | 353 | if (key->alg == ALG_TKIP) |
601 | ret = ath_setkey_tkip(common, idx, key->key, &hk, mac, | 354 | ret = ath_setkey_tkip(common, idx, key->key, &hk, mac, |
602 | vif->type == NL80211_IFTYPE_AP); | 355 | vif->type == NL80211_IFTYPE_AP); |
@@ -644,6 +397,19 @@ void ath9k_cmn_key_delete(struct ath_common *common, | |||
644 | } | 397 | } |
645 | EXPORT_SYMBOL(ath9k_cmn_key_delete); | 398 | EXPORT_SYMBOL(ath9k_cmn_key_delete); |
646 | 399 | ||
400 | int ath9k_cmn_count_streams(unsigned int chainmask, int max) | ||
401 | { | ||
402 | int streams = 0; | ||
403 | |||
404 | do { | ||
405 | if (++streams == max) | ||
406 | break; | ||
407 | } while ((chainmask = chainmask & (chainmask - 1))); | ||
408 | |||
409 | return streams; | ||
410 | } | ||
411 | EXPORT_SYMBOL(ath9k_cmn_count_streams); | ||
412 | |||
647 | static int __init ath9k_cmn_init(void) | 413 | static int __init ath9k_cmn_init(void) |
648 | { | 414 | { |
649 | return 0; | 415 | return 0; |
diff --git a/drivers/net/wireless/ath/ath9k/common.h b/drivers/net/wireless/ath/ath9k/common.h index e08f7e5a26e0..97809d39c73f 100644 --- a/drivers/net/wireless/ath/ath9k/common.h +++ b/drivers/net/wireless/ath/ath9k/common.h | |||
@@ -52,82 +52,6 @@ | |||
52 | #define ATH_EP_RND(x, mul) \ | 52 | #define ATH_EP_RND(x, mul) \ |
53 | ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul)) | 53 | ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul)) |
54 | 54 | ||
55 | struct ath_atx_ac { | ||
56 | int sched; | ||
57 | int qnum; | ||
58 | struct list_head list; | ||
59 | struct list_head tid_q; | ||
60 | }; | ||
61 | |||
62 | struct ath_buf_state { | ||
63 | int bfs_nframes; | ||
64 | u16 bfs_al; | ||
65 | u16 bfs_frmlen; | ||
66 | int bfs_seqno; | ||
67 | int bfs_tidno; | ||
68 | int bfs_retries; | ||
69 | u8 bf_type; | ||
70 | u32 bfs_keyix; | ||
71 | enum ath9k_key_type bfs_keytype; | ||
72 | }; | ||
73 | |||
74 | struct ath_buf { | ||
75 | struct list_head list; | ||
76 | struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or | ||
77 | an aggregate) */ | ||
78 | struct ath_buf *bf_next; /* next subframe in the aggregate */ | ||
79 | struct sk_buff *bf_mpdu; /* enclosing frame structure */ | ||
80 | void *bf_desc; /* virtual addr of desc */ | ||
81 | dma_addr_t bf_daddr; /* physical addr of desc */ | ||
82 | dma_addr_t bf_buf_addr; /* physical addr of data buffer */ | ||
83 | bool bf_stale; | ||
84 | bool bf_isnullfunc; | ||
85 | bool bf_tx_aborted; | ||
86 | u16 bf_flags; | ||
87 | struct ath_buf_state bf_state; | ||
88 | dma_addr_t bf_dmacontext; | ||
89 | struct ath_wiphy *aphy; | ||
90 | }; | ||
91 | |||
92 | struct ath_atx_tid { | ||
93 | struct list_head list; | ||
94 | struct list_head buf_q; | ||
95 | struct ath_node *an; | ||
96 | struct ath_atx_ac *ac; | ||
97 | struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; | ||
98 | u16 seq_start; | ||
99 | u16 seq_next; | ||
100 | u16 baw_size; | ||
101 | int tidno; | ||
102 | int baw_head; /* first un-acked tx buffer */ | ||
103 | int baw_tail; /* next unused tx buffer slot */ | ||
104 | int sched; | ||
105 | int paused; | ||
106 | u8 state; | ||
107 | }; | ||
108 | |||
109 | struct ath_node { | ||
110 | struct ath_common *common; | ||
111 | struct ath_atx_tid tid[WME_NUM_TID]; | ||
112 | struct ath_atx_ac ac[WME_NUM_AC]; | ||
113 | u16 maxampdu; | ||
114 | u8 mpdudensity; | ||
115 | int last_rssi; | ||
116 | }; | ||
117 | |||
118 | int ath9k_cmn_rx_skb_preprocess(struct ath_common *common, | ||
119 | struct ieee80211_hw *hw, | ||
120 | struct sk_buff *skb, | ||
121 | struct ath_rx_status *rx_stats, | ||
122 | struct ieee80211_rx_status *rx_status, | ||
123 | bool *decrypt_error); | ||
124 | |||
125 | void ath9k_cmn_rx_skb_postprocess(struct ath_common *common, | ||
126 | struct sk_buff *skb, | ||
127 | struct ath_rx_status *rx_stats, | ||
128 | struct ieee80211_rx_status *rxs, | ||
129 | bool decrypt_error); | ||
130 | |||
131 | int ath9k_cmn_padpos(__le16 frame_control); | 55 | int ath9k_cmn_padpos(__le16 frame_control); |
132 | int ath9k_cmn_get_hw_crypto_keytype(struct sk_buff *skb); | 56 | int ath9k_cmn_get_hw_crypto_keytype(struct sk_buff *skb); |
133 | void ath9k_cmn_update_ichannel(struct ieee80211_hw *hw, | 57 | void ath9k_cmn_update_ichannel(struct ieee80211_hw *hw, |
@@ -140,3 +64,4 @@ int ath9k_cmn_key_config(struct ath_common *common, | |||
140 | struct ieee80211_key_conf *key); | 64 | struct ieee80211_key_conf *key); |
141 | void ath9k_cmn_key_delete(struct ath_common *common, | 65 | void ath9k_cmn_key_delete(struct ath_common *common, |
142 | struct ieee80211_key_conf *key); | 66 | struct ieee80211_key_conf *key); |
67 | int ath9k_cmn_count_streams(unsigned int chainmask, int max); | ||
diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c index 29898f8d1893..a127bdba5f90 100644 --- a/drivers/net/wireless/ath/ath9k/debug.c +++ b/drivers/net/wireless/ath/ath9k/debug.c | |||
@@ -42,7 +42,7 @@ static ssize_t read_file_debug(struct file *file, char __user *user_buf, | |||
42 | char buf[32]; | 42 | char buf[32]; |
43 | unsigned int len; | 43 | unsigned int len; |
44 | 44 | ||
45 | len = snprintf(buf, sizeof(buf), "0x%08x\n", common->debug_mask); | 45 | len = sprintf(buf, "0x%08x\n", common->debug_mask); |
46 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 46 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
47 | } | 47 | } |
48 | 48 | ||
@@ -57,7 +57,7 @@ static ssize_t write_file_debug(struct file *file, const char __user *user_buf, | |||
57 | 57 | ||
58 | len = min(count, sizeof(buf) - 1); | 58 | len = min(count, sizeof(buf) - 1); |
59 | if (copy_from_user(buf, user_buf, len)) | 59 | if (copy_from_user(buf, user_buf, len)) |
60 | return -EINVAL; | 60 | return -EFAULT; |
61 | 61 | ||
62 | buf[len] = '\0'; | 62 | buf[len] = '\0'; |
63 | if (strict_strtoul(buf, 0, &mask)) | 63 | if (strict_strtoul(buf, 0, &mask)) |
@@ -86,7 +86,7 @@ static ssize_t read_file_tx_chainmask(struct file *file, char __user *user_buf, | |||
86 | char buf[32]; | 86 | char buf[32]; |
87 | unsigned int len; | 87 | unsigned int len; |
88 | 88 | ||
89 | len = snprintf(buf, sizeof(buf), "0x%08x\n", common->tx_chainmask); | 89 | len = sprintf(buf, "0x%08x\n", common->tx_chainmask); |
90 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 90 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
91 | } | 91 | } |
92 | 92 | ||
@@ -101,7 +101,7 @@ static ssize_t write_file_tx_chainmask(struct file *file, const char __user *use | |||
101 | 101 | ||
102 | len = min(count, sizeof(buf) - 1); | 102 | len = min(count, sizeof(buf) - 1); |
103 | if (copy_from_user(buf, user_buf, len)) | 103 | if (copy_from_user(buf, user_buf, len)) |
104 | return -EINVAL; | 104 | return -EFAULT; |
105 | 105 | ||
106 | buf[len] = '\0'; | 106 | buf[len] = '\0'; |
107 | if (strict_strtoul(buf, 0, &mask)) | 107 | if (strict_strtoul(buf, 0, &mask)) |
@@ -128,7 +128,7 @@ static ssize_t read_file_rx_chainmask(struct file *file, char __user *user_buf, | |||
128 | char buf[32]; | 128 | char buf[32]; |
129 | unsigned int len; | 129 | unsigned int len; |
130 | 130 | ||
131 | len = snprintf(buf, sizeof(buf), "0x%08x\n", common->rx_chainmask); | 131 | len = sprintf(buf, "0x%08x\n", common->rx_chainmask); |
132 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 132 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
133 | } | 133 | } |
134 | 134 | ||
@@ -143,7 +143,7 @@ static ssize_t write_file_rx_chainmask(struct file *file, const char __user *use | |||
143 | 143 | ||
144 | len = min(count, sizeof(buf) - 1); | 144 | len = min(count, sizeof(buf) - 1); |
145 | if (copy_from_user(buf, user_buf, len)) | 145 | if (copy_from_user(buf, user_buf, len)) |
146 | return -EINVAL; | 146 | return -EFAULT; |
147 | 147 | ||
148 | buf[len] = '\0'; | 148 | buf[len] = '\0'; |
149 | if (strict_strtoul(buf, 0, &mask)) | 149 | if (strict_strtoul(buf, 0, &mask)) |
@@ -176,7 +176,7 @@ static ssize_t read_file_dma(struct file *file, char __user *user_buf, | |||
176 | 176 | ||
177 | buf = kmalloc(DMA_BUF_LEN, GFP_KERNEL); | 177 | buf = kmalloc(DMA_BUF_LEN, GFP_KERNEL); |
178 | if (!buf) | 178 | if (!buf) |
179 | return 0; | 179 | return -ENOMEM; |
180 | 180 | ||
181 | ath9k_ps_wakeup(sc); | 181 | ath9k_ps_wakeup(sc); |
182 | 182 | ||
@@ -248,6 +248,9 @@ static ssize_t read_file_dma(struct file *file, char __user *user_buf, | |||
248 | 248 | ||
249 | ath9k_ps_restore(sc); | 249 | ath9k_ps_restore(sc); |
250 | 250 | ||
251 | if (len > DMA_BUF_LEN) | ||
252 | len = DMA_BUF_LEN; | ||
253 | |||
251 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); | 254 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); |
252 | kfree(buf); | 255 | kfree(buf); |
253 | return retval; | 256 | return retval; |
@@ -269,6 +272,8 @@ void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status) | |||
269 | sc->debug.stats.istats.rxlp++; | 272 | sc->debug.stats.istats.rxlp++; |
270 | if (status & ATH9K_INT_RXHP) | 273 | if (status & ATH9K_INT_RXHP) |
271 | sc->debug.stats.istats.rxhp++; | 274 | sc->debug.stats.istats.rxhp++; |
275 | if (status & ATH9K_INT_BB_WATCHDOG) | ||
276 | sc->debug.stats.istats.bb_watchdog++; | ||
272 | } else { | 277 | } else { |
273 | if (status & ATH9K_INT_RX) | 278 | if (status & ATH9K_INT_RX) |
274 | sc->debug.stats.istats.rxok++; | 279 | sc->debug.stats.istats.rxok++; |
@@ -319,6 +324,9 @@ static ssize_t read_file_interrupt(struct file *file, char __user *user_buf, | |||
319 | "%8s: %10u\n", "RXLP", sc->debug.stats.istats.rxlp); | 324 | "%8s: %10u\n", "RXLP", sc->debug.stats.istats.rxlp); |
320 | len += snprintf(buf + len, sizeof(buf) - len, | 325 | len += snprintf(buf + len, sizeof(buf) - len, |
321 | "%8s: %10u\n", "RXHP", sc->debug.stats.istats.rxhp); | 326 | "%8s: %10u\n", "RXHP", sc->debug.stats.istats.rxhp); |
327 | len += snprintf(buf + len, sizeof(buf) - len, | ||
328 | "%8s: %10u\n", "WATCHDOG", | ||
329 | sc->debug.stats.istats.bb_watchdog); | ||
322 | } else { | 330 | } else { |
323 | len += snprintf(buf + len, sizeof(buf) - len, | 331 | len += snprintf(buf + len, sizeof(buf) - len, |
324 | "%8s: %10u\n", "RX", sc->debug.stats.istats.rxok); | 332 | "%8s: %10u\n", "RX", sc->debug.stats.istats.rxok); |
@@ -358,6 +366,9 @@ static ssize_t read_file_interrupt(struct file *file, char __user *user_buf, | |||
358 | len += snprintf(buf + len, sizeof(buf) - len, | 366 | len += snprintf(buf + len, sizeof(buf) - len, |
359 | "%8s: %10u\n", "TOTAL", sc->debug.stats.istats.total); | 367 | "%8s: %10u\n", "TOTAL", sc->debug.stats.istats.total); |
360 | 368 | ||
369 | if (len > sizeof(buf)) | ||
370 | len = sizeof(buf); | ||
371 | |||
361 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 372 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
362 | } | 373 | } |
363 | 374 | ||
@@ -397,11 +408,10 @@ static ssize_t read_file_rcstat(struct file *file, char __user *user_buf, | |||
397 | if (sc->cur_rate_table == NULL) | 408 | if (sc->cur_rate_table == NULL) |
398 | return 0; | 409 | return 0; |
399 | 410 | ||
400 | max = 80 + sc->cur_rate_table->rate_cnt * 1024; | 411 | max = 80 + sc->cur_rate_table->rate_cnt * 1024 + 1; |
401 | buf = kmalloc(max + 1, GFP_KERNEL); | 412 | buf = kmalloc(max, GFP_KERNEL); |
402 | if (buf == NULL) | 413 | if (buf == NULL) |
403 | return 0; | 414 | return -ENOMEM; |
404 | buf[max] = 0; | ||
405 | 415 | ||
406 | len += sprintf(buf, "%6s %6s %6s " | 416 | len += sprintf(buf, "%6s %6s %6s " |
407 | "%10s %10s %10s %10s\n", | 417 | "%10s %10s %10s %10s\n", |
@@ -443,6 +453,9 @@ static ssize_t read_file_rcstat(struct file *file, char __user *user_buf, | |||
443 | stats->per); | 453 | stats->per); |
444 | } | 454 | } |
445 | 455 | ||
456 | if (len > max) | ||
457 | len = max; | ||
458 | |||
446 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); | 459 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); |
447 | kfree(buf); | 460 | kfree(buf); |
448 | return retval; | 461 | return retval; |
@@ -505,6 +518,9 @@ static ssize_t read_file_wiphy(struct file *file, char __user *user_buf, | |||
505 | len += snprintf(buf + len, sizeof(buf) - len, | 518 | len += snprintf(buf + len, sizeof(buf) - len, |
506 | "addrmask: %pM\n", addr); | 519 | "addrmask: %pM\n", addr); |
507 | 520 | ||
521 | if (len > sizeof(buf)) | ||
522 | len = sizeof(buf); | ||
523 | |||
508 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 524 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
509 | } | 525 | } |
510 | 526 | ||
@@ -630,7 +646,7 @@ static ssize_t read_file_xmit(struct file *file, char __user *user_buf, | |||
630 | 646 | ||
631 | buf = kzalloc(size, GFP_KERNEL); | 647 | buf = kzalloc(size, GFP_KERNEL); |
632 | if (buf == NULL) | 648 | if (buf == NULL) |
633 | return 0; | 649 | return -ENOMEM; |
634 | 650 | ||
635 | len += sprintf(buf, "%30s %10s%10s%10s\n\n", "BE", "BK", "VI", "VO"); | 651 | len += sprintf(buf, "%30s %10s%10s%10s\n\n", "BE", "BK", "VI", "VO"); |
636 | 652 | ||
@@ -648,6 +664,9 @@ static ssize_t read_file_xmit(struct file *file, char __user *user_buf, | |||
648 | PR("DATA Underrun: ", data_underrun); | 664 | PR("DATA Underrun: ", data_underrun); |
649 | PR("DELIM Underrun: ", delim_underrun); | 665 | PR("DELIM Underrun: ", delim_underrun); |
650 | 666 | ||
667 | if (len > size) | ||
668 | len = size; | ||
669 | |||
651 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); | 670 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); |
652 | kfree(buf); | 671 | kfree(buf); |
653 | 672 | ||
@@ -700,7 +719,7 @@ static ssize_t read_file_recv(struct file *file, char __user *user_buf, | |||
700 | 719 | ||
701 | buf = kzalloc(size, GFP_KERNEL); | 720 | buf = kzalloc(size, GFP_KERNEL); |
702 | if (buf == NULL) | 721 | if (buf == NULL) |
703 | return 0; | 722 | return -ENOMEM; |
704 | 723 | ||
705 | len += snprintf(buf + len, size - len, | 724 | len += snprintf(buf + len, size - len, |
706 | "%18s : %10u\n", "CRC ERR", | 725 | "%18s : %10u\n", "CRC ERR", |
@@ -751,6 +770,9 @@ static ssize_t read_file_recv(struct file *file, char __user *user_buf, | |||
751 | PHY_ERR("HT-LENGTH", ATH9K_PHYERR_HT_LENGTH_ILLEGAL); | 770 | PHY_ERR("HT-LENGTH", ATH9K_PHYERR_HT_LENGTH_ILLEGAL); |
752 | PHY_ERR("HT-RATE", ATH9K_PHYERR_HT_RATE_ILLEGAL); | 771 | PHY_ERR("HT-RATE", ATH9K_PHYERR_HT_RATE_ILLEGAL); |
753 | 772 | ||
773 | if (len > size) | ||
774 | len = size; | ||
775 | |||
754 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); | 776 | retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); |
755 | kfree(buf); | 777 | kfree(buf); |
756 | 778 | ||
@@ -802,7 +824,7 @@ static ssize_t read_file_regidx(struct file *file, char __user *user_buf, | |||
802 | char buf[32]; | 824 | char buf[32]; |
803 | unsigned int len; | 825 | unsigned int len; |
804 | 826 | ||
805 | len = snprintf(buf, sizeof(buf), "0x%08x\n", sc->debug.regidx); | 827 | len = sprintf(buf, "0x%08x\n", sc->debug.regidx); |
806 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 828 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
807 | } | 829 | } |
808 | 830 | ||
@@ -816,7 +838,7 @@ static ssize_t write_file_regidx(struct file *file, const char __user *user_buf, | |||
816 | 838 | ||
817 | len = min(count, sizeof(buf) - 1); | 839 | len = min(count, sizeof(buf) - 1); |
818 | if (copy_from_user(buf, user_buf, len)) | 840 | if (copy_from_user(buf, user_buf, len)) |
819 | return -EINVAL; | 841 | return -EFAULT; |
820 | 842 | ||
821 | buf[len] = '\0'; | 843 | buf[len] = '\0'; |
822 | if (strict_strtoul(buf, 0, ®idx)) | 844 | if (strict_strtoul(buf, 0, ®idx)) |
@@ -843,7 +865,7 @@ static ssize_t read_file_regval(struct file *file, char __user *user_buf, | |||
843 | u32 regval; | 865 | u32 regval; |
844 | 866 | ||
845 | regval = REG_READ_D(ah, sc->debug.regidx); | 867 | regval = REG_READ_D(ah, sc->debug.regidx); |
846 | len = snprintf(buf, sizeof(buf), "0x%08x\n", regval); | 868 | len = sprintf(buf, "0x%08x\n", regval); |
847 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 869 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
848 | } | 870 | } |
849 | 871 | ||
@@ -858,7 +880,7 @@ static ssize_t write_file_regval(struct file *file, const char __user *user_buf, | |||
858 | 880 | ||
859 | len = min(count, sizeof(buf) - 1); | 881 | len = min(count, sizeof(buf) - 1); |
860 | if (copy_from_user(buf, user_buf, len)) | 882 | if (copy_from_user(buf, user_buf, len)) |
861 | return -EINVAL; | 883 | return -EFAULT; |
862 | 884 | ||
863 | buf[len] = '\0'; | 885 | buf[len] = '\0'; |
864 | if (strict_strtoul(buf, 0, ®val)) | 886 | if (strict_strtoul(buf, 0, ®val)) |
diff --git a/drivers/net/wireless/ath/ath9k/debug.h b/drivers/net/wireless/ath/ath9k/debug.h index 5147b8709e10..5d21704e87ff 100644 --- a/drivers/net/wireless/ath/ath9k/debug.h +++ b/drivers/net/wireless/ath/ath9k/debug.h | |||
@@ -53,6 +53,7 @@ struct ath_buf; | |||
53 | * @cabend: RX End of CAB traffic | 53 | * @cabend: RX End of CAB traffic |
54 | * @dtimsync: DTIM sync lossage | 54 | * @dtimsync: DTIM sync lossage |
55 | * @dtim: RX Beacon with DTIM | 55 | * @dtim: RX Beacon with DTIM |
56 | * @bb_watchdog: Baseband watchdog | ||
56 | */ | 57 | */ |
57 | struct ath_interrupt_stats { | 58 | struct ath_interrupt_stats { |
58 | u32 total; | 59 | u32 total; |
@@ -76,6 +77,7 @@ struct ath_interrupt_stats { | |||
76 | u32 cabend; | 77 | u32 cabend; |
77 | u32 dtimsync; | 78 | u32 dtimsync; |
78 | u32 dtim; | 79 | u32 dtim; |
80 | u32 bb_watchdog; | ||
79 | }; | 81 | }; |
80 | 82 | ||
81 | struct ath_rc_stats { | 83 | struct ath_rc_stats { |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c index ca8704a9d7ac..1266333f586d 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom.c +++ b/drivers/net/wireless/ath/ath9k/eeprom.c | |||
@@ -24,6 +24,14 @@ static inline u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz) | |||
24 | return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin)); | 24 | return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin)); |
25 | } | 25 | } |
26 | 26 | ||
27 | void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val) | ||
28 | { | ||
29 | REG_WRITE(ah, reg, val); | ||
30 | |||
31 | if (ah->config.analog_shiftreg) | ||
32 | udelay(100); | ||
33 | } | ||
34 | |||
27 | void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask, | 35 | void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask, |
28 | u32 shift, u32 val) | 36 | u32 shift, u32 val) |
29 | { | 37 | { |
@@ -250,6 +258,27 @@ u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower, | |||
250 | return twiceMaxEdgePower; | 258 | return twiceMaxEdgePower; |
251 | } | 259 | } |
252 | 260 | ||
261 | void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah) | ||
262 | { | ||
263 | struct ath_common *common = ath9k_hw_common(ah); | ||
264 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | ||
265 | |||
266 | switch (ar5416_get_ntxchains(ah->txchainmask)) { | ||
267 | case 1: | ||
268 | break; | ||
269 | case 2: | ||
270 | regulatory->max_power_level += INCREASE_MAXPOW_BY_TWO_CHAIN; | ||
271 | break; | ||
272 | case 3: | ||
273 | regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN; | ||
274 | break; | ||
275 | default: | ||
276 | ath_print(common, ATH_DBG_EEPROM, | ||
277 | "Invalid chainmask configuration\n"); | ||
278 | break; | ||
279 | } | ||
280 | } | ||
281 | |||
253 | int ath9k_hw_eeprom_init(struct ath_hw *ah) | 282 | int ath9k_hw_eeprom_init(struct ath_hw *ah) |
254 | { | 283 | { |
255 | int status; | 284 | int status; |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h index 21354c15a9a9..7da7d73c0847 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom.h +++ b/drivers/net/wireless/ath/ath9k/eeprom.h | |||
@@ -679,6 +679,7 @@ struct eeprom_ops { | |||
679 | u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz); | 679 | u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz); |
680 | }; | 680 | }; |
681 | 681 | ||
682 | void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val); | ||
682 | void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask, | 683 | void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask, |
683 | u32 shift, u32 val); | 684 | u32 shift, u32 val); |
684 | int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight, | 685 | int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight, |
@@ -704,6 +705,7 @@ void ath9k_hw_get_target_powers(struct ath_hw *ah, | |||
704 | u16 numRates, bool isHt40Target); | 705 | u16 numRates, bool isHt40Target); |
705 | u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower, | 706 | u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower, |
706 | bool is2GHz, int num_band_edges); | 707 | bool is2GHz, int num_band_edges); |
708 | void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah); | ||
707 | int ath9k_hw_eeprom_init(struct ath_hw *ah); | 709 | int ath9k_hw_eeprom_init(struct ath_hw *ah); |
708 | 710 | ||
709 | #define ar5416_get_ntxchains(_txchainmask) \ | 711 | #define ar5416_get_ntxchains(_txchainmask) \ |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c index 41a77d1bd439..e25a2abbf561 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c | |||
@@ -249,6 +249,7 @@ static void ath9k_hw_get_4k_gain_boundaries_pdadcs(struct ath_hw *ah, | |||
249 | struct chan_centers centers; | 249 | struct chan_centers centers; |
250 | #define PD_GAIN_BOUNDARY_DEFAULT 58; | 250 | #define PD_GAIN_BOUNDARY_DEFAULT 58; |
251 | 251 | ||
252 | memset(&minPwrT4, 0, AR9287_NUM_PD_GAINS); | ||
252 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); | 253 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
253 | 254 | ||
254 | for (numPiers = 0; numPiers < availPiers; numPiers++) { | 255 | for (numPiers = 0; numPiers < availPiers; numPiers++) { |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c index b471db5fb82d..39a41053705f 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c | |||
@@ -17,17 +17,19 @@ | |||
17 | #include "hw.h" | 17 | #include "hw.h" |
18 | #include "ar9002_phy.h" | 18 | #include "ar9002_phy.h" |
19 | 19 | ||
20 | static int ath9k_hw_AR9287_get_eeprom_ver(struct ath_hw *ah) | 20 | #define NUM_EEP_WORDS (sizeof(struct ar9287_eeprom) / sizeof(u16)) |
21 | |||
22 | static int ath9k_hw_ar9287_get_eeprom_ver(struct ath_hw *ah) | ||
21 | { | 23 | { |
22 | return (ah->eeprom.map9287.baseEepHeader.version >> 12) & 0xF; | 24 | return (ah->eeprom.map9287.baseEepHeader.version >> 12) & 0xF; |
23 | } | 25 | } |
24 | 26 | ||
25 | static int ath9k_hw_AR9287_get_eeprom_rev(struct ath_hw *ah) | 27 | static int ath9k_hw_ar9287_get_eeprom_rev(struct ath_hw *ah) |
26 | { | 28 | { |
27 | return (ah->eeprom.map9287.baseEepHeader.version) & 0xFFF; | 29 | return (ah->eeprom.map9287.baseEepHeader.version) & 0xFFF; |
28 | } | 30 | } |
29 | 31 | ||
30 | static bool ath9k_hw_AR9287_fill_eeprom(struct ath_hw *ah) | 32 | static bool ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah) |
31 | { | 33 | { |
32 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; | 34 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; |
33 | struct ath_common *common = ath9k_hw_common(ah); | 35 | struct ath_common *common = ath9k_hw_common(ah); |
@@ -40,20 +42,20 @@ static bool ath9k_hw_AR9287_fill_eeprom(struct ath_hw *ah) | |||
40 | "Reading from EEPROM, not flash\n"); | 42 | "Reading from EEPROM, not flash\n"); |
41 | } | 43 | } |
42 | 44 | ||
43 | for (addr = 0; addr < sizeof(struct ar9287_eeprom) / sizeof(u16); | 45 | for (addr = 0; addr < NUM_EEP_WORDS; addr++) { |
44 | addr++) { | 46 | if (!ath9k_hw_nvram_read(common, addr + eep_start_loc, |
45 | if (!ath9k_hw_nvram_read(common, | 47 | eep_data)) { |
46 | addr + eep_start_loc, eep_data)) { | ||
47 | ath_print(common, ATH_DBG_EEPROM, | 48 | ath_print(common, ATH_DBG_EEPROM, |
48 | "Unable to read eeprom region\n"); | 49 | "Unable to read eeprom region\n"); |
49 | return false; | 50 | return false; |
50 | } | 51 | } |
51 | eep_data++; | 52 | eep_data++; |
52 | } | 53 | } |
54 | |||
53 | return true; | 55 | return true; |
54 | } | 56 | } |
55 | 57 | ||
56 | static int ath9k_hw_AR9287_check_eeprom(struct ath_hw *ah) | 58 | static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah) |
57 | { | 59 | { |
58 | u32 sum = 0, el, integer; | 60 | u32 sum = 0, el, integer; |
59 | u16 temp, word, magic, magic2, *eepdata; | 61 | u16 temp, word, magic, magic2, *eepdata; |
@@ -63,8 +65,8 @@ static int ath9k_hw_AR9287_check_eeprom(struct ath_hw *ah) | |||
63 | struct ath_common *common = ath9k_hw_common(ah); | 65 | struct ath_common *common = ath9k_hw_common(ah); |
64 | 66 | ||
65 | if (!ath9k_hw_use_flash(ah)) { | 67 | if (!ath9k_hw_use_flash(ah)) { |
66 | if (!ath9k_hw_nvram_read(common, | 68 | if (!ath9k_hw_nvram_read(common, AR5416_EEPROM_MAGIC_OFFSET, |
67 | AR5416_EEPROM_MAGIC_OFFSET, &magic)) { | 69 | &magic)) { |
68 | ath_print(common, ATH_DBG_FATAL, | 70 | ath_print(common, ATH_DBG_FATAL, |
69 | "Reading Magic # failed\n"); | 71 | "Reading Magic # failed\n"); |
70 | return false; | 72 | return false; |
@@ -72,6 +74,7 @@ static int ath9k_hw_AR9287_check_eeprom(struct ath_hw *ah) | |||
72 | 74 | ||
73 | ath_print(common, ATH_DBG_EEPROM, | 75 | ath_print(common, ATH_DBG_EEPROM, |
74 | "Read Magic = 0x%04X\n", magic); | 76 | "Read Magic = 0x%04X\n", magic); |
77 | |||
75 | if (magic != AR5416_EEPROM_MAGIC) { | 78 | if (magic != AR5416_EEPROM_MAGIC) { |
76 | magic2 = swab16(magic); | 79 | magic2 = swab16(magic); |
77 | 80 | ||
@@ -79,9 +82,7 @@ static int ath9k_hw_AR9287_check_eeprom(struct ath_hw *ah) | |||
79 | need_swap = true; | 82 | need_swap = true; |
80 | eepdata = (u16 *)(&ah->eeprom); | 83 | eepdata = (u16 *)(&ah->eeprom); |
81 | 84 | ||
82 | for (addr = 0; | 85 | for (addr = 0; addr < NUM_EEP_WORDS; addr++) { |
83 | addr < sizeof(struct ar9287_eeprom) / sizeof(u16); | ||
84 | addr++) { | ||
85 | temp = swab16(*eepdata); | 86 | temp = swab16(*eepdata); |
86 | *eepdata = temp; | 87 | *eepdata = temp; |
87 | eepdata++; | 88 | eepdata++; |
@@ -89,13 +90,14 @@ static int ath9k_hw_AR9287_check_eeprom(struct ath_hw *ah) | |||
89 | } else { | 90 | } else { |
90 | ath_print(common, ATH_DBG_FATAL, | 91 | ath_print(common, ATH_DBG_FATAL, |
91 | "Invalid EEPROM Magic. " | 92 | "Invalid EEPROM Magic. " |
92 | "endianness mismatch.\n"); | 93 | "Endianness mismatch.\n"); |
93 | return -EINVAL; | 94 | return -EINVAL; |
94 | } | 95 | } |
95 | } | 96 | } |
96 | } | 97 | } |
97 | ath_print(common, ATH_DBG_EEPROM, "need_swap = %s.\n", need_swap ? | 98 | |
98 | "True" : "False"); | 99 | ath_print(common, ATH_DBG_EEPROM, "need_swap = %s.\n", |
100 | need_swap ? "True" : "False"); | ||
99 | 101 | ||
100 | if (need_swap) | 102 | if (need_swap) |
101 | el = swab16(ah->eeprom.map9287.baseEepHeader.length); | 103 | el = swab16(ah->eeprom.map9287.baseEepHeader.length); |
@@ -108,6 +110,7 @@ static int ath9k_hw_AR9287_check_eeprom(struct ath_hw *ah) | |||
108 | el = el / sizeof(u16); | 110 | el = el / sizeof(u16); |
109 | 111 | ||
110 | eepdata = (u16 *)(&ah->eeprom); | 112 | eepdata = (u16 *)(&ah->eeprom); |
113 | |||
111 | for (i = 0; i < el; i++) | 114 | for (i = 0; i < el; i++) |
112 | sum ^= *eepdata++; | 115 | sum ^= *eepdata++; |
113 | 116 | ||
@@ -161,7 +164,7 @@ static int ath9k_hw_AR9287_check_eeprom(struct ath_hw *ah) | |||
161 | return 0; | 164 | return 0; |
162 | } | 165 | } |
163 | 166 | ||
164 | static u32 ath9k_hw_AR9287_get_eeprom(struct ath_hw *ah, | 167 | static u32 ath9k_hw_ar9287_get_eeprom(struct ath_hw *ah, |
165 | enum eeprom_param param) | 168 | enum eeprom_param param) |
166 | { | 169 | { |
167 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; | 170 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; |
@@ -170,6 +173,7 @@ static u32 ath9k_hw_AR9287_get_eeprom(struct ath_hw *ah, | |||
170 | u16 ver_minor; | 173 | u16 ver_minor; |
171 | 174 | ||
172 | ver_minor = pBase->version & AR9287_EEP_VER_MINOR_MASK; | 175 | ver_minor = pBase->version & AR9287_EEP_VER_MINOR_MASK; |
176 | |||
173 | switch (param) { | 177 | switch (param) { |
174 | case EEP_NFTHRESH_2: | 178 | case EEP_NFTHRESH_2: |
175 | return pModal->noiseFloorThreshCh[0]; | 179 | return pModal->noiseFloorThreshCh[0]; |
@@ -214,29 +218,30 @@ static u32 ath9k_hw_AR9287_get_eeprom(struct ath_hw *ah, | |||
214 | } | 218 | } |
215 | } | 219 | } |
216 | 220 | ||
217 | 221 | static void ath9k_hw_get_ar9287_gain_boundaries_pdadcs(struct ath_hw *ah, | |
218 | static void ath9k_hw_get_AR9287_gain_boundaries_pdadcs(struct ath_hw *ah, | 222 | struct ath9k_channel *chan, |
219 | struct ath9k_channel *chan, | 223 | struct cal_data_per_freq_ar9287 *pRawDataSet, |
220 | struct cal_data_per_freq_ar9287 *pRawDataSet, | 224 | u8 *bChans, u16 availPiers, |
221 | u8 *bChans, u16 availPiers, | 225 | u16 tPdGainOverlap, |
222 | u16 tPdGainOverlap, int16_t *pMinCalPower, | 226 | int16_t *pMinCalPower, |
223 | u16 *pPdGainBoundaries, u8 *pPDADCValues, | 227 | u16 *pPdGainBoundaries, |
224 | u16 numXpdGains) | 228 | u8 *pPDADCValues, |
229 | u16 numXpdGains) | ||
225 | { | 230 | { |
226 | #define TMP_VAL_VPD_TABLE \ | 231 | #define TMP_VAL_VPD_TABLE \ |
227 | ((vpdTableI[i][sizeCurrVpdTable - 1] + (ss - maxIndex + 1) * vpdStep)); | 232 | ((vpdTableI[i][sizeCurrVpdTable - 1] + (ss - maxIndex + 1) * vpdStep)); |
228 | 233 | ||
229 | int i, j, k; | 234 | int i, j, k; |
230 | int16_t ss; | 235 | int16_t ss; |
231 | u16 idxL = 0, idxR = 0, numPiers; | 236 | u16 idxL = 0, idxR = 0, numPiers; |
232 | u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR; | 237 | u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR; |
233 | u8 minPwrT4[AR9287_NUM_PD_GAINS]; | 238 | u8 minPwrT4[AR9287_NUM_PD_GAINS]; |
234 | u8 maxPwrT4[AR9287_NUM_PD_GAINS]; | 239 | u8 maxPwrT4[AR9287_NUM_PD_GAINS]; |
235 | int16_t vpdStep; | 240 | int16_t vpdStep; |
236 | int16_t tmpVal; | 241 | int16_t tmpVal; |
237 | u16 sizeCurrVpdTable, maxIndex, tgtIndex; | 242 | u16 sizeCurrVpdTable, maxIndex, tgtIndex; |
238 | bool match; | 243 | bool match; |
239 | int16_t minDelta = 0; | 244 | int16_t minDelta = 0; |
240 | struct chan_centers centers; | 245 | struct chan_centers centers; |
241 | static u8 vpdTableL[AR5416_EEP4K_NUM_PD_GAINS] | 246 | static u8 vpdTableL[AR5416_EEP4K_NUM_PD_GAINS] |
242 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; | 247 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
@@ -245,6 +250,7 @@ static void ath9k_hw_get_AR9287_gain_boundaries_pdadcs(struct ath_hw *ah, | |||
245 | static u8 vpdTableI[AR5416_EEP4K_NUM_PD_GAINS] | 250 | static u8 vpdTableI[AR5416_EEP4K_NUM_PD_GAINS] |
246 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; | 251 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
247 | 252 | ||
253 | memset(&minPwrT4, 0, AR9287_NUM_PD_GAINS); | ||
248 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); | 254 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
249 | 255 | ||
250 | for (numPiers = 0; numPiers < availPiers; numPiers++) { | 256 | for (numPiers = 0; numPiers < availPiers; numPiers++) { |
@@ -253,18 +259,18 @@ static void ath9k_hw_get_AR9287_gain_boundaries_pdadcs(struct ath_hw *ah, | |||
253 | } | 259 | } |
254 | 260 | ||
255 | match = ath9k_hw_get_lower_upper_index( | 261 | match = ath9k_hw_get_lower_upper_index( |
256 | (u8)FREQ2FBIN(centers.synth_center, | 262 | (u8)FREQ2FBIN(centers.synth_center, IS_CHAN_2GHZ(chan)), |
257 | IS_CHAN_2GHZ(chan)), bChans, numPiers, | 263 | bChans, numPiers, &idxL, &idxR); |
258 | &idxL, &idxR); | ||
259 | 264 | ||
260 | if (match) { | 265 | if (match) { |
261 | for (i = 0; i < numXpdGains; i++) { | 266 | for (i = 0; i < numXpdGains; i++) { |
262 | minPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][0]; | 267 | minPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][0]; |
263 | maxPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][4]; | 268 | maxPwrT4[i] = pRawDataSet[idxL].pwrPdg[i][4]; |
264 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], | 269 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
265 | pRawDataSet[idxL].pwrPdg[i], | 270 | pRawDataSet[idxL].pwrPdg[i], |
266 | pRawDataSet[idxL].vpdPdg[i], | 271 | pRawDataSet[idxL].vpdPdg[i], |
267 | AR9287_PD_GAIN_ICEPTS, vpdTableI[i]); | 272 | AR9287_PD_GAIN_ICEPTS, |
273 | vpdTableI[i]); | ||
268 | } | 274 | } |
269 | } else { | 275 | } else { |
270 | for (i = 0; i < numXpdGains; i++) { | 276 | for (i = 0; i < numXpdGains; i++) { |
@@ -275,61 +281,59 @@ static void ath9k_hw_get_AR9287_gain_boundaries_pdadcs(struct ath_hw *ah, | |||
275 | 281 | ||
276 | minPwrT4[i] = max(pPwrL[0], pPwrR[0]); | 282 | minPwrT4[i] = max(pPwrL[0], pPwrR[0]); |
277 | 283 | ||
278 | maxPwrT4[i] = | 284 | maxPwrT4[i] = min(pPwrL[AR9287_PD_GAIN_ICEPTS - 1], |
279 | min(pPwrL[AR9287_PD_GAIN_ICEPTS - 1], | 285 | pPwrR[AR9287_PD_GAIN_ICEPTS - 1]); |
280 | pPwrR[AR9287_PD_GAIN_ICEPTS - 1]); | ||
281 | 286 | ||
282 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], | 287 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
283 | pPwrL, pVpdL, | 288 | pPwrL, pVpdL, |
284 | AR9287_PD_GAIN_ICEPTS, | 289 | AR9287_PD_GAIN_ICEPTS, |
285 | vpdTableL[i]); | 290 | vpdTableL[i]); |
286 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], | 291 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
287 | pPwrR, pVpdR, | 292 | pPwrR, pVpdR, |
288 | AR9287_PD_GAIN_ICEPTS, | 293 | AR9287_PD_GAIN_ICEPTS, |
289 | vpdTableR[i]); | 294 | vpdTableR[i]); |
290 | 295 | ||
291 | for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) { | 296 | for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) { |
292 | vpdTableI[i][j] = | 297 | vpdTableI[i][j] = (u8)(ath9k_hw_interpolate( |
293 | (u8)(ath9k_hw_interpolate((u16) | 298 | (u16)FREQ2FBIN(centers. synth_center, |
294 | FREQ2FBIN(centers. synth_center, | 299 | IS_CHAN_2GHZ(chan)), |
295 | IS_CHAN_2GHZ(chan)), | 300 | bChans[idxL], bChans[idxR], |
296 | bChans[idxL], bChans[idxR], | 301 | vpdTableL[i][j], vpdTableR[i][j])); |
297 | vpdTableL[i][j], vpdTableR[i][j])); | ||
298 | } | 302 | } |
299 | } | 303 | } |
300 | } | 304 | } |
301 | *pMinCalPower = (int16_t)(minPwrT4[0] / 2); | ||
302 | 305 | ||
306 | *pMinCalPower = (int16_t)(minPwrT4[0] / 2); | ||
303 | k = 0; | 307 | k = 0; |
308 | |||
304 | for (i = 0; i < numXpdGains; i++) { | 309 | for (i = 0; i < numXpdGains; i++) { |
305 | if (i == (numXpdGains - 1)) | 310 | if (i == (numXpdGains - 1)) |
306 | pPdGainBoundaries[i] = (u16)(maxPwrT4[i] / 2); | 311 | pPdGainBoundaries[i] = |
312 | (u16)(maxPwrT4[i] / 2); | ||
307 | else | 313 | else |
308 | pPdGainBoundaries[i] = (u16)((maxPwrT4[i] + | 314 | pPdGainBoundaries[i] = |
309 | minPwrT4[i+1]) / 4); | 315 | (u16)((maxPwrT4[i] + minPwrT4[i+1]) / 4); |
310 | 316 | ||
311 | pPdGainBoundaries[i] = min((u16)AR5416_MAX_RATE_POWER, | 317 | pPdGainBoundaries[i] = min((u16)AR5416_MAX_RATE_POWER, |
312 | pPdGainBoundaries[i]); | 318 | pPdGainBoundaries[i]); |
313 | 319 | ||
314 | 320 | ||
315 | if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) { | 321 | minDelta = 0; |
316 | minDelta = pPdGainBoundaries[0] - 23; | ||
317 | pPdGainBoundaries[0] = 23; | ||
318 | } else | ||
319 | minDelta = 0; | ||
320 | 322 | ||
321 | if (i == 0) { | 323 | if (i == 0) { |
322 | if (AR_SREV_9280_10_OR_LATER(ah)) | 324 | if (AR_SREV_9280_10_OR_LATER(ah)) |
323 | ss = (int16_t)(0 - (minPwrT4[i] / 2)); | 325 | ss = (int16_t)(0 - (minPwrT4[i] / 2)); |
324 | else | 326 | else |
325 | ss = 0; | 327 | ss = 0; |
326 | } else | 328 | } else { |
327 | ss = (int16_t)((pPdGainBoundaries[i-1] - | 329 | ss = (int16_t)((pPdGainBoundaries[i-1] - |
328 | (minPwrT4[i] / 2)) - | 330 | (minPwrT4[i] / 2)) - |
329 | tPdGainOverlap + 1 + minDelta); | 331 | tPdGainOverlap + 1 + minDelta); |
332 | } | ||
330 | 333 | ||
331 | vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]); | 334 | vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]); |
332 | vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); | 335 | vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); |
336 | |||
333 | while ((ss < 0) && (k < (AR9287_NUM_PDADC_VALUES - 1))) { | 337 | while ((ss < 0) && (k < (AR9287_NUM_PDADC_VALUES - 1))) { |
334 | tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep); | 338 | tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep); |
335 | pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal); | 339 | pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal); |
@@ -348,12 +352,13 @@ static void ath9k_hw_get_AR9287_gain_boundaries_pdadcs(struct ath_hw *ah, | |||
348 | vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] - | 352 | vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] - |
349 | vpdTableI[i][sizeCurrVpdTable - 2]); | 353 | vpdTableI[i][sizeCurrVpdTable - 2]); |
350 | vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); | 354 | vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); |
355 | |||
351 | if (tgtIndex > maxIndex) { | 356 | if (tgtIndex > maxIndex) { |
352 | while ((ss <= tgtIndex) && | 357 | while ((ss <= tgtIndex) && |
353 | (k < (AR9287_NUM_PDADC_VALUES - 1))) { | 358 | (k < (AR9287_NUM_PDADC_VALUES - 1))) { |
354 | tmpVal = (int16_t) TMP_VAL_VPD_TABLE; | 359 | tmpVal = (int16_t) TMP_VAL_VPD_TABLE; |
355 | pPDADCValues[k++] = (u8)((tmpVal > 255) ? | 360 | pPDADCValues[k++] = |
356 | 255 : tmpVal); | 361 | (u8)((tmpVal > 255) ? 255 : tmpVal); |
357 | ss++; | 362 | ss++; |
358 | } | 363 | } |
359 | } | 364 | } |
@@ -375,10 +380,9 @@ static void ath9k_hw_get_AR9287_gain_boundaries_pdadcs(struct ath_hw *ah, | |||
375 | static void ar9287_eeprom_get_tx_gain_index(struct ath_hw *ah, | 380 | static void ar9287_eeprom_get_tx_gain_index(struct ath_hw *ah, |
376 | struct ath9k_channel *chan, | 381 | struct ath9k_channel *chan, |
377 | struct cal_data_op_loop_ar9287 *pRawDatasetOpLoop, | 382 | struct cal_data_op_loop_ar9287 *pRawDatasetOpLoop, |
378 | u8 *pCalChans, u16 availPiers, | 383 | u8 *pCalChans, u16 availPiers, int8_t *pPwr) |
379 | int8_t *pPwr) | ||
380 | { | 384 | { |
381 | u16 idxL = 0, idxR = 0, numPiers; | 385 | u16 idxL = 0, idxR = 0, numPiers; |
382 | bool match; | 386 | bool match; |
383 | struct chan_centers centers; | 387 | struct chan_centers centers; |
384 | 388 | ||
@@ -390,15 +394,14 @@ static void ar9287_eeprom_get_tx_gain_index(struct ath_hw *ah, | |||
390 | } | 394 | } |
391 | 395 | ||
392 | match = ath9k_hw_get_lower_upper_index( | 396 | match = ath9k_hw_get_lower_upper_index( |
393 | (u8)FREQ2FBIN(centers.synth_center, IS_CHAN_2GHZ(chan)), | 397 | (u8)FREQ2FBIN(centers.synth_center, IS_CHAN_2GHZ(chan)), |
394 | pCalChans, numPiers, | 398 | pCalChans, numPiers, &idxL, &idxR); |
395 | &idxL, &idxR); | ||
396 | 399 | ||
397 | if (match) { | 400 | if (match) { |
398 | *pPwr = (int8_t) pRawDatasetOpLoop[idxL].pwrPdg[0][0]; | 401 | *pPwr = (int8_t) pRawDatasetOpLoop[idxL].pwrPdg[0][0]; |
399 | } else { | 402 | } else { |
400 | *pPwr = ((int8_t) pRawDatasetOpLoop[idxL].pwrPdg[0][0] + | 403 | *pPwr = ((int8_t) pRawDatasetOpLoop[idxL].pwrPdg[0][0] + |
401 | (int8_t) pRawDatasetOpLoop[idxR].pwrPdg[0][0])/2; | 404 | (int8_t) pRawDatasetOpLoop[idxR].pwrPdg[0][0])/2; |
402 | } | 405 | } |
403 | 406 | ||
404 | } | 407 | } |
@@ -409,16 +412,22 @@ static void ar9287_eeprom_olpc_set_pdadcs(struct ath_hw *ah, | |||
409 | u32 tmpVal; | 412 | u32 tmpVal; |
410 | u32 a; | 413 | u32 a; |
411 | 414 | ||
415 | /* Enable OLPC for chain 0 */ | ||
416 | |||
412 | tmpVal = REG_READ(ah, 0xa270); | 417 | tmpVal = REG_READ(ah, 0xa270); |
413 | tmpVal = tmpVal & 0xFCFFFFFF; | 418 | tmpVal = tmpVal & 0xFCFFFFFF; |
414 | tmpVal = tmpVal | (0x3 << 24); | 419 | tmpVal = tmpVal | (0x3 << 24); |
415 | REG_WRITE(ah, 0xa270, tmpVal); | 420 | REG_WRITE(ah, 0xa270, tmpVal); |
416 | 421 | ||
422 | /* Enable OLPC for chain 1 */ | ||
423 | |||
417 | tmpVal = REG_READ(ah, 0xb270); | 424 | tmpVal = REG_READ(ah, 0xb270); |
418 | tmpVal = tmpVal & 0xFCFFFFFF; | 425 | tmpVal = tmpVal & 0xFCFFFFFF; |
419 | tmpVal = tmpVal | (0x3 << 24); | 426 | tmpVal = tmpVal | (0x3 << 24); |
420 | REG_WRITE(ah, 0xb270, tmpVal); | 427 | REG_WRITE(ah, 0xb270, tmpVal); |
421 | 428 | ||
429 | /* Write the OLPC ref power for chain 0 */ | ||
430 | |||
422 | if (chain == 0) { | 431 | if (chain == 0) { |
423 | tmpVal = REG_READ(ah, 0xa398); | 432 | tmpVal = REG_READ(ah, 0xa398); |
424 | tmpVal = tmpVal & 0xff00ffff; | 433 | tmpVal = tmpVal & 0xff00ffff; |
@@ -427,6 +436,8 @@ static void ar9287_eeprom_olpc_set_pdadcs(struct ath_hw *ah, | |||
427 | REG_WRITE(ah, 0xa398, tmpVal); | 436 | REG_WRITE(ah, 0xa398, tmpVal); |
428 | } | 437 | } |
429 | 438 | ||
439 | /* Write the OLPC ref power for chain 1 */ | ||
440 | |||
430 | if (chain == 1) { | 441 | if (chain == 1) { |
431 | tmpVal = REG_READ(ah, 0xb398); | 442 | tmpVal = REG_READ(ah, 0xb398); |
432 | tmpVal = tmpVal & 0xff00ffff; | 443 | tmpVal = tmpVal & 0xff00ffff; |
@@ -436,28 +447,29 @@ static void ar9287_eeprom_olpc_set_pdadcs(struct ath_hw *ah, | |||
436 | } | 447 | } |
437 | } | 448 | } |
438 | 449 | ||
439 | static void ath9k_hw_set_AR9287_power_cal_table(struct ath_hw *ah, | 450 | static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah, |
440 | struct ath9k_channel *chan, | 451 | struct ath9k_channel *chan, |
441 | int16_t *pTxPowerIndexOffset) | 452 | int16_t *pTxPowerIndexOffset) |
442 | { | 453 | { |
443 | struct ath_common *common = ath9k_hw_common(ah); | ||
444 | struct cal_data_per_freq_ar9287 *pRawDataset; | 454 | struct cal_data_per_freq_ar9287 *pRawDataset; |
445 | struct cal_data_op_loop_ar9287 *pRawDatasetOpenLoop; | 455 | struct cal_data_op_loop_ar9287 *pRawDatasetOpenLoop; |
446 | u8 *pCalBChans = NULL; | 456 | u8 *pCalBChans = NULL; |
447 | u16 pdGainOverlap_t2; | 457 | u16 pdGainOverlap_t2; |
448 | u8 pdadcValues[AR9287_NUM_PDADC_VALUES]; | 458 | u8 pdadcValues[AR9287_NUM_PDADC_VALUES]; |
449 | u16 gainBoundaries[AR9287_PD_GAINS_IN_MASK]; | 459 | u16 gainBoundaries[AR9287_PD_GAINS_IN_MASK]; |
450 | u16 numPiers = 0, i, j; | 460 | u16 numPiers = 0, i, j; |
451 | int16_t tMinCalPower; | 461 | int16_t tMinCalPower; |
452 | u16 numXpdGain, xpdMask; | 462 | u16 numXpdGain, xpdMask; |
453 | u16 xpdGainValues[AR9287_NUM_PD_GAINS] = {0, 0, 0, 0}; | 463 | u16 xpdGainValues[AR9287_NUM_PD_GAINS] = {0, 0, 0, 0}; |
454 | u32 reg32, regOffset, regChainOffset; | 464 | u32 reg32, regOffset, regChainOffset, regval; |
455 | int16_t modalIdx, diff = 0; | 465 | int16_t modalIdx, diff = 0; |
456 | struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; | 466 | struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; |
467 | |||
457 | modalIdx = IS_CHAN_2GHZ(chan) ? 1 : 0; | 468 | modalIdx = IS_CHAN_2GHZ(chan) ? 1 : 0; |
458 | xpdMask = pEepData->modalHeader.xpdGain; | 469 | xpdMask = pEepData->modalHeader.xpdGain; |
470 | |||
459 | if ((pEepData->baseEepHeader.version & AR9287_EEP_VER_MINOR_MASK) >= | 471 | if ((pEepData->baseEepHeader.version & AR9287_EEP_VER_MINOR_MASK) >= |
460 | AR9287_EEP_MINOR_VER_2) | 472 | AR9287_EEP_MINOR_VER_2) |
461 | pdGainOverlap_t2 = pEepData->modalHeader.pdGainOverlap; | 473 | pdGainOverlap_t2 = pEepData->modalHeader.pdGainOverlap; |
462 | else | 474 | else |
463 | pdGainOverlap_t2 = (u16)(MS(REG_READ(ah, AR_PHY_TPCRG5), | 475 | pdGainOverlap_t2 = (u16)(MS(REG_READ(ah, AR_PHY_TPCRG5), |
@@ -466,15 +478,16 @@ static void ath9k_hw_set_AR9287_power_cal_table(struct ath_hw *ah, | |||
466 | if (IS_CHAN_2GHZ(chan)) { | 478 | if (IS_CHAN_2GHZ(chan)) { |
467 | pCalBChans = pEepData->calFreqPier2G; | 479 | pCalBChans = pEepData->calFreqPier2G; |
468 | numPiers = AR9287_NUM_2G_CAL_PIERS; | 480 | numPiers = AR9287_NUM_2G_CAL_PIERS; |
469 | if (ath9k_hw_AR9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { | 481 | if (ath9k_hw_ar9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { |
470 | pRawDatasetOpenLoop = | 482 | pRawDatasetOpenLoop = |
471 | (struct cal_data_op_loop_ar9287 *) | 483 | (struct cal_data_op_loop_ar9287 *)pEepData->calPierData2G[0]; |
472 | pEepData->calPierData2G[0]; | ||
473 | ah->initPDADC = pRawDatasetOpenLoop->vpdPdg[0][0]; | 484 | ah->initPDADC = pRawDatasetOpenLoop->vpdPdg[0][0]; |
474 | } | 485 | } |
475 | } | 486 | } |
476 | 487 | ||
477 | numXpdGain = 0; | 488 | numXpdGain = 0; |
489 | |||
490 | /* Calculate the value of xpdgains from the xpdGain Mask */ | ||
478 | for (i = 1; i <= AR9287_PD_GAINS_IN_MASK; i++) { | 491 | for (i = 1; i <= AR9287_PD_GAINS_IN_MASK; i++) { |
479 | if ((xpdMask >> (AR9287_PD_GAINS_IN_MASK - i)) & 1) { | 492 | if ((xpdMask >> (AR9287_PD_GAINS_IN_MASK - i)) & 1) { |
480 | if (numXpdGain >= AR9287_NUM_PD_GAINS) | 493 | if (numXpdGain >= AR9287_NUM_PD_GAINS) |
@@ -496,99 +509,80 @@ static void ath9k_hw_set_AR9287_power_cal_table(struct ath_hw *ah, | |||
496 | 509 | ||
497 | for (i = 0; i < AR9287_MAX_CHAINS; i++) { | 510 | for (i = 0; i < AR9287_MAX_CHAINS; i++) { |
498 | regChainOffset = i * 0x1000; | 511 | regChainOffset = i * 0x1000; |
512 | |||
499 | if (pEepData->baseEepHeader.txMask & (1 << i)) { | 513 | if (pEepData->baseEepHeader.txMask & (1 << i)) { |
500 | pRawDatasetOpenLoop = (struct cal_data_op_loop_ar9287 *) | 514 | pRawDatasetOpenLoop = |
501 | pEepData->calPierData2G[i]; | 515 | (struct cal_data_op_loop_ar9287 *)pEepData->calPierData2G[i]; |
502 | if (ath9k_hw_AR9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { | 516 | |
517 | if (ath9k_hw_ar9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { | ||
503 | int8_t txPower; | 518 | int8_t txPower; |
504 | ar9287_eeprom_get_tx_gain_index(ah, chan, | 519 | ar9287_eeprom_get_tx_gain_index(ah, chan, |
505 | pRawDatasetOpenLoop, | 520 | pRawDatasetOpenLoop, |
506 | pCalBChans, numPiers, | 521 | pCalBChans, numPiers, |
507 | &txPower); | 522 | &txPower); |
508 | ar9287_eeprom_olpc_set_pdadcs(ah, txPower, i); | 523 | ar9287_eeprom_olpc_set_pdadcs(ah, txPower, i); |
509 | } else { | 524 | } else { |
510 | pRawDataset = | 525 | pRawDataset = |
511 | (struct cal_data_per_freq_ar9287 *) | 526 | (struct cal_data_per_freq_ar9287 *) |
512 | pEepData->calPierData2G[i]; | 527 | pEepData->calPierData2G[i]; |
513 | ath9k_hw_get_AR9287_gain_boundaries_pdadcs( | 528 | |
514 | ah, chan, pRawDataset, | 529 | ath9k_hw_get_ar9287_gain_boundaries_pdadcs(ah, chan, |
515 | pCalBChans, numPiers, | 530 | pRawDataset, |
516 | pdGainOverlap_t2, | 531 | pCalBChans, numPiers, |
517 | &tMinCalPower, gainBoundaries, | 532 | pdGainOverlap_t2, |
518 | pdadcValues, numXpdGain); | 533 | &tMinCalPower, |
534 | gainBoundaries, | ||
535 | pdadcValues, | ||
536 | numXpdGain); | ||
519 | } | 537 | } |
520 | 538 | ||
521 | if (i == 0) { | 539 | if (i == 0) { |
522 | if (!ath9k_hw_AR9287_get_eeprom( | 540 | if (!ath9k_hw_ar9287_get_eeprom(ah, |
523 | ah, EEP_OL_PWRCTRL)) { | 541 | EEP_OL_PWRCTRL)) { |
524 | REG_WRITE(ah, AR_PHY_TPCRG5 + | 542 | |
525 | regChainOffset, | 543 | regval = SM(pdGainOverlap_t2, |
526 | SM(pdGainOverlap_t2, | 544 | AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
527 | AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | | 545 | | SM(gainBoundaries[0], |
528 | SM(gainBoundaries[0], | 546 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
529 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 547 | | SM(gainBoundaries[1], |
530 | | SM(gainBoundaries[1], | 548 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
531 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 549 | | SM(gainBoundaries[2], |
532 | | SM(gainBoundaries[2], | 550 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
533 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 551 | | SM(gainBoundaries[3], |
534 | | SM(gainBoundaries[3], | 552 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4); |
535 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); | 553 | |
554 | REG_WRITE(ah, | ||
555 | AR_PHY_TPCRG5 + regChainOffset, | ||
556 | regval); | ||
536 | } | 557 | } |
537 | } | 558 | } |
538 | 559 | ||
539 | if ((int32_t)AR9287_PWR_TABLE_OFFSET_DB != | 560 | if ((int32_t)AR9287_PWR_TABLE_OFFSET_DB != |
540 | pEepData->baseEepHeader.pwrTableOffset) { | 561 | pEepData->baseEepHeader.pwrTableOffset) { |
541 | diff = (u16) | 562 | diff = (u16)(pEepData->baseEepHeader.pwrTableOffset - |
542 | (pEepData->baseEepHeader.pwrTableOffset | 563 | (int32_t)AR9287_PWR_TABLE_OFFSET_DB); |
543 | - (int32_t)AR9287_PWR_TABLE_OFFSET_DB); | ||
544 | diff *= 2; | 564 | diff *= 2; |
545 | 565 | ||
546 | for (j = 0; | 566 | for (j = 0; j < ((u16)AR9287_NUM_PDADC_VALUES-diff); j++) |
547 | j < ((u16)AR9287_NUM_PDADC_VALUES-diff); | ||
548 | j++) | ||
549 | pdadcValues[j] = pdadcValues[j+diff]; | 567 | pdadcValues[j] = pdadcValues[j+diff]; |
550 | 568 | ||
551 | for (j = (u16)(AR9287_NUM_PDADC_VALUES-diff); | 569 | for (j = (u16)(AR9287_NUM_PDADC_VALUES-diff); |
552 | j < AR9287_NUM_PDADC_VALUES; j++) | 570 | j < AR9287_NUM_PDADC_VALUES; j++) |
553 | pdadcValues[j] = | 571 | pdadcValues[j] = |
554 | pdadcValues[ | 572 | pdadcValues[AR9287_NUM_PDADC_VALUES-diff]; |
555 | AR9287_NUM_PDADC_VALUES-diff]; | ||
556 | } | 573 | } |
557 | 574 | ||
558 | if (!ath9k_hw_AR9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { | 575 | if (!ath9k_hw_ar9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { |
559 | regOffset = AR_PHY_BASE + (672 << 2) + | 576 | regOffset = AR_PHY_BASE + |
560 | regChainOffset; | 577 | (672 << 2) + regChainOffset; |
561 | for (j = 0; j < 32; j++) { | ||
562 | reg32 = ((pdadcValues[4*j + 0] | ||
563 | & 0xFF) << 0) | | ||
564 | ((pdadcValues[4*j + 1] | ||
565 | & 0xFF) << 8) | | ||
566 | ((pdadcValues[4*j + 2] | ||
567 | & 0xFF) << 16) | | ||
568 | ((pdadcValues[4*j + 3] | ||
569 | & 0xFF) << 24) ; | ||
570 | REG_WRITE(ah, regOffset, reg32); | ||
571 | 578 | ||
572 | ath_print(common, ATH_DBG_EEPROM, | 579 | for (j = 0; j < 32; j++) { |
573 | "PDADC (%d,%4x): %4.4x " | 580 | reg32 = ((pdadcValues[4*j + 0] & 0xFF) << 0) |
574 | "%8.8x\n", | 581 | | ((pdadcValues[4*j + 1] & 0xFF) << 8) |
575 | i, regChainOffset, regOffset, | 582 | | ((pdadcValues[4*j + 2] & 0xFF) << 16) |
576 | reg32); | 583 | | ((pdadcValues[4*j + 3] & 0xFF) << 24); |
577 | |||
578 | ath_print(common, ATH_DBG_EEPROM, | ||
579 | "PDADC: Chain %d | " | ||
580 | "PDADC %3d Value %3d | " | ||
581 | "PDADC %3d Value %3d | " | ||
582 | "PDADC %3d Value %3d | " | ||
583 | "PDADC %3d Value %3d |\n", | ||
584 | i, 4 * j, pdadcValues[4 * j], | ||
585 | 4 * j + 1, | ||
586 | pdadcValues[4 * j + 1], | ||
587 | 4 * j + 2, | ||
588 | pdadcValues[4 * j + 2], | ||
589 | 4 * j + 3, | ||
590 | pdadcValues[4 * j + 3]); | ||
591 | 584 | ||
585 | REG_WRITE(ah, regOffset, reg32); | ||
592 | regOffset += 4; | 586 | regOffset += 4; |
593 | } | 587 | } |
594 | } | 588 | } |
@@ -598,30 +592,45 @@ static void ath9k_hw_set_AR9287_power_cal_table(struct ath_hw *ah, | |||
598 | *pTxPowerIndexOffset = 0; | 592 | *pTxPowerIndexOffset = 0; |
599 | } | 593 | } |
600 | 594 | ||
601 | static void ath9k_hw_set_AR9287_power_per_rate_table(struct ath_hw *ah, | 595 | static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah, |
602 | struct ath9k_channel *chan, int16_t *ratesArray, u16 cfgCtl, | 596 | struct ath9k_channel *chan, |
603 | u16 AntennaReduction, u16 twiceMaxRegulatoryPower, | 597 | int16_t *ratesArray, |
604 | u16 powerLimit) | 598 | u16 cfgCtl, |
599 | u16 AntennaReduction, | ||
600 | u16 twiceMaxRegulatoryPower, | ||
601 | u16 powerLimit) | ||
605 | { | 602 | { |
603 | #define CMP_CTL \ | ||
604 | (((cfgCtl & ~CTL_MODE_M) | (pCtlMode[ctlMode] & CTL_MODE_M)) == \ | ||
605 | pEepData->ctlIndex[i]) | ||
606 | |||
607 | #define CMP_NO_CTL \ | ||
608 | (((cfgCtl & ~CTL_MODE_M) | (pCtlMode[ctlMode] & CTL_MODE_M)) == \ | ||
609 | ((pEepData->ctlIndex[i] & CTL_MODE_M) | SD_NO_CTL)) | ||
610 | |||
606 | #define REDUCE_SCALED_POWER_BY_TWO_CHAIN 6 | 611 | #define REDUCE_SCALED_POWER_BY_TWO_CHAIN 6 |
607 | #define REDUCE_SCALED_POWER_BY_THREE_CHAIN 10 | 612 | #define REDUCE_SCALED_POWER_BY_THREE_CHAIN 10 |
613 | |||
608 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | 614 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); |
609 | u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER; | 615 | u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER; |
610 | static const u16 tpScaleReductionTable[5] = | 616 | static const u16 tpScaleReductionTable[5] = |
611 | { 0, 3, 6, 9, AR5416_MAX_RATE_POWER }; | 617 | { 0, 3, 6, 9, AR5416_MAX_RATE_POWER }; |
612 | int i; | 618 | int i; |
613 | int16_t twiceLargestAntenna; | 619 | int16_t twiceLargestAntenna; |
614 | struct cal_ctl_data_ar9287 *rep; | 620 | struct cal_ctl_data_ar9287 *rep; |
615 | struct cal_target_power_leg targetPowerOfdm = {0, {0, 0, 0, 0} }, | 621 | struct cal_target_power_leg targetPowerOfdm = {0, {0, 0, 0, 0} }, |
616 | targetPowerCck = {0, {0, 0, 0, 0} }; | 622 | targetPowerCck = {0, {0, 0, 0, 0} }; |
617 | struct cal_target_power_leg targetPowerOfdmExt = {0, {0, 0, 0, 0} }, | 623 | struct cal_target_power_leg targetPowerOfdmExt = {0, {0, 0, 0, 0} }, |
618 | targetPowerCckExt = {0, {0, 0, 0, 0} }; | 624 | targetPowerCckExt = {0, {0, 0, 0, 0} }; |
619 | struct cal_target_power_ht targetPowerHt20, | 625 | struct cal_target_power_ht targetPowerHt20, |
620 | targetPowerHt40 = {0, {0, 0, 0, 0} }; | 626 | targetPowerHt40 = {0, {0, 0, 0, 0} }; |
621 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; | 627 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; |
622 | u16 ctlModesFor11g[] = | 628 | u16 ctlModesFor11g[] = {CTL_11B, |
623 | {CTL_11B, CTL_11G, CTL_2GHT20, | 629 | CTL_11G, |
624 | CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40}; | 630 | CTL_2GHT20, |
631 | CTL_11B_EXT, | ||
632 | CTL_11G_EXT, | ||
633 | CTL_2GHT40}; | ||
625 | u16 numCtlModes = 0, *pCtlMode = NULL, ctlMode, freq; | 634 | u16 numCtlModes = 0, *pCtlMode = NULL, ctlMode, freq; |
626 | struct chan_centers centers; | 635 | struct chan_centers centers; |
627 | int tx_chainmask; | 636 | int tx_chainmask; |
@@ -631,19 +640,28 @@ static void ath9k_hw_set_AR9287_power_per_rate_table(struct ath_hw *ah, | |||
631 | 640 | ||
632 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); | 641 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
633 | 642 | ||
643 | /* Compute TxPower reduction due to Antenna Gain */ | ||
634 | twiceLargestAntenna = max(pEepData->modalHeader.antennaGainCh[0], | 644 | twiceLargestAntenna = max(pEepData->modalHeader.antennaGainCh[0], |
635 | pEepData->modalHeader.antennaGainCh[1]); | 645 | pEepData->modalHeader.antennaGainCh[1]); |
646 | twiceLargestAntenna = (int16_t)min((AntennaReduction) - | ||
647 | twiceLargestAntenna, 0); | ||
636 | 648 | ||
637 | twiceLargestAntenna = (int16_t)min((AntennaReduction) - | 649 | /* |
638 | twiceLargestAntenna, 0); | 650 | * scaledPower is the minimum of the user input power level |
639 | 651 | * and the regulatory allowed power level. | |
652 | */ | ||
640 | maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna; | 653 | maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna; |
654 | |||
641 | if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) | 655 | if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) |
642 | maxRegAllowedPower -= | 656 | maxRegAllowedPower -= |
643 | (tpScaleReductionTable[(regulatory->tp_scale)] * 2); | 657 | (tpScaleReductionTable[(regulatory->tp_scale)] * 2); |
644 | 658 | ||
645 | scaledPower = min(powerLimit, maxRegAllowedPower); | 659 | scaledPower = min(powerLimit, maxRegAllowedPower); |
646 | 660 | ||
661 | /* | ||
662 | * Reduce scaled Power by number of chains active | ||
663 | * to get the per chain tx power level. | ||
664 | */ | ||
647 | switch (ar5416_get_ntxchains(tx_chainmask)) { | 665 | switch (ar5416_get_ntxchains(tx_chainmask)) { |
648 | case 1: | 666 | case 1: |
649 | break; | 667 | break; |
@@ -656,9 +674,14 @@ static void ath9k_hw_set_AR9287_power_per_rate_table(struct ath_hw *ah, | |||
656 | } | 674 | } |
657 | scaledPower = max((u16)0, scaledPower); | 675 | scaledPower = max((u16)0, scaledPower); |
658 | 676 | ||
677 | /* | ||
678 | * Get TX power from EEPROM. | ||
679 | */ | ||
659 | if (IS_CHAN_2GHZ(chan)) { | 680 | if (IS_CHAN_2GHZ(chan)) { |
681 | /* CTL_11B, CTL_11G, CTL_2GHT20 */ | ||
660 | numCtlModes = | 682 | numCtlModes = |
661 | ARRAY_SIZE(ctlModesFor11g) - SUB_NUM_CTL_MODES_AT_2G_40; | 683 | ARRAY_SIZE(ctlModesFor11g) - SUB_NUM_CTL_MODES_AT_2G_40; |
684 | |||
662 | pCtlMode = ctlModesFor11g; | 685 | pCtlMode = ctlModesFor11g; |
663 | 686 | ||
664 | ath9k_hw_get_legacy_target_powers(ah, chan, | 687 | ath9k_hw_get_legacy_target_powers(ah, chan, |
@@ -675,6 +698,7 @@ static void ath9k_hw_set_AR9287_power_per_rate_table(struct ath_hw *ah, | |||
675 | &targetPowerHt20, 8, false); | 698 | &targetPowerHt20, 8, false); |
676 | 699 | ||
677 | if (IS_CHAN_HT40(chan)) { | 700 | if (IS_CHAN_HT40(chan)) { |
701 | /* All 2G CTLs */ | ||
678 | numCtlModes = ARRAY_SIZE(ctlModesFor11g); | 702 | numCtlModes = ARRAY_SIZE(ctlModesFor11g); |
679 | ath9k_hw_get_target_powers(ah, chan, | 703 | ath9k_hw_get_target_powers(ah, chan, |
680 | pEepData->calTargetPower2GHT40, | 704 | pEepData->calTargetPower2GHT40, |
@@ -692,8 +716,9 @@ static void ath9k_hw_set_AR9287_power_per_rate_table(struct ath_hw *ah, | |||
692 | } | 716 | } |
693 | 717 | ||
694 | for (ctlMode = 0; ctlMode < numCtlModes; ctlMode++) { | 718 | for (ctlMode = 0; ctlMode < numCtlModes; ctlMode++) { |
695 | bool isHt40CtlMode = (pCtlMode[ctlMode] == CTL_5GHT40) || | 719 | bool isHt40CtlMode = |
696 | (pCtlMode[ctlMode] == CTL_2GHT40); | 720 | (pCtlMode[ctlMode] == CTL_2GHT40) ? true : false; |
721 | |||
697 | if (isHt40CtlMode) | 722 | if (isHt40CtlMode) |
698 | freq = centers.synth_center; | 723 | freq = centers.synth_center; |
699 | else if (pCtlMode[ctlMode] & EXT_ADDITIVE) | 724 | else if (pCtlMode[ctlMode] & EXT_ADDITIVE) |
@@ -701,31 +726,28 @@ static void ath9k_hw_set_AR9287_power_per_rate_table(struct ath_hw *ah, | |||
701 | else | 726 | else |
702 | freq = centers.ctl_center; | 727 | freq = centers.ctl_center; |
703 | 728 | ||
704 | if (ah->eep_ops->get_eeprom_ver(ah) == 14 && | 729 | /* Walk through the CTL indices stored in EEPROM */ |
705 | ah->eep_ops->get_eeprom_rev(ah) <= 2) | ||
706 | twiceMaxEdgePower = AR5416_MAX_RATE_POWER; | ||
707 | |||
708 | for (i = 0; (i < AR9287_NUM_CTLS) && pEepData->ctlIndex[i]; i++) { | 730 | for (i = 0; (i < AR9287_NUM_CTLS) && pEepData->ctlIndex[i]; i++) { |
709 | if ((((cfgCtl & ~CTL_MODE_M) | | 731 | struct cal_ctl_edges *pRdEdgesPower; |
710 | (pCtlMode[ctlMode] & CTL_MODE_M)) == | ||
711 | pEepData->ctlIndex[i]) || | ||
712 | (((cfgCtl & ~CTL_MODE_M) | | ||
713 | (pCtlMode[ctlMode] & CTL_MODE_M)) == | ||
714 | ((pEepData->ctlIndex[i] & | ||
715 | CTL_MODE_M) | SD_NO_CTL))) { | ||
716 | 732 | ||
733 | /* | ||
734 | * Compare test group from regulatory channel list | ||
735 | * with test mode from pCtlMode list | ||
736 | */ | ||
737 | if (CMP_CTL || CMP_NO_CTL) { | ||
717 | rep = &(pEepData->ctlData[i]); | 738 | rep = &(pEepData->ctlData[i]); |
718 | twiceMinEdgePower = ath9k_hw_get_max_edge_power( | 739 | pRdEdgesPower = |
719 | freq, | 740 | rep->ctlEdges[ar5416_get_ntxchains(tx_chainmask) - 1]; |
720 | rep->ctlEdges[ar5416_get_ntxchains( | 741 | |
721 | tx_chainmask) - 1], | 742 | twiceMinEdgePower = ath9k_hw_get_max_edge_power(freq, |
722 | IS_CHAN_2GHZ(chan), AR5416_NUM_BAND_EDGES); | 743 | pRdEdgesPower, |
723 | 744 | IS_CHAN_2GHZ(chan), | |
724 | if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) | 745 | AR5416_NUM_BAND_EDGES); |
725 | twiceMaxEdgePower = min( | 746 | |
726 | twiceMaxEdgePower, | 747 | if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) { |
727 | twiceMinEdgePower); | 748 | twiceMaxEdgePower = min(twiceMaxEdgePower, |
728 | else { | 749 | twiceMinEdgePower); |
750 | } else { | ||
729 | twiceMaxEdgePower = twiceMinEdgePower; | 751 | twiceMaxEdgePower = twiceMinEdgePower; |
730 | break; | 752 | break; |
731 | } | 753 | } |
@@ -734,55 +756,48 @@ static void ath9k_hw_set_AR9287_power_per_rate_table(struct ath_hw *ah, | |||
734 | 756 | ||
735 | minCtlPower = (u8)min(twiceMaxEdgePower, scaledPower); | 757 | minCtlPower = (u8)min(twiceMaxEdgePower, scaledPower); |
736 | 758 | ||
759 | /* Apply ctl mode to correct target power set */ | ||
737 | switch (pCtlMode[ctlMode]) { | 760 | switch (pCtlMode[ctlMode]) { |
738 | case CTL_11B: | 761 | case CTL_11B: |
739 | for (i = 0; | 762 | for (i = 0; i < ARRAY_SIZE(targetPowerCck.tPow2x); i++) { |
740 | i < ARRAY_SIZE(targetPowerCck.tPow2x); | 763 | targetPowerCck.tPow2x[i] = |
741 | i++) { | 764 | (u8)min((u16)targetPowerCck.tPow2x[i], |
742 | targetPowerCck.tPow2x[i] = (u8)min( | 765 | minCtlPower); |
743 | (u16)targetPowerCck.tPow2x[i], | ||
744 | minCtlPower); | ||
745 | } | 766 | } |
746 | break; | 767 | break; |
747 | case CTL_11A: | 768 | case CTL_11A: |
748 | case CTL_11G: | 769 | case CTL_11G: |
749 | for (i = 0; | 770 | for (i = 0; i < ARRAY_SIZE(targetPowerOfdm.tPow2x); i++) { |
750 | i < ARRAY_SIZE(targetPowerOfdm.tPow2x); | 771 | targetPowerOfdm.tPow2x[i] = |
751 | i++) { | 772 | (u8)min((u16)targetPowerOfdm.tPow2x[i], |
752 | targetPowerOfdm.tPow2x[i] = (u8)min( | 773 | minCtlPower); |
753 | (u16)targetPowerOfdm.tPow2x[i], | ||
754 | minCtlPower); | ||
755 | } | 774 | } |
756 | break; | 775 | break; |
757 | case CTL_5GHT20: | 776 | case CTL_5GHT20: |
758 | case CTL_2GHT20: | 777 | case CTL_2GHT20: |
759 | for (i = 0; | 778 | for (i = 0; i < ARRAY_SIZE(targetPowerHt20.tPow2x); i++) { |
760 | i < ARRAY_SIZE(targetPowerHt20.tPow2x); | 779 | targetPowerHt20.tPow2x[i] = |
761 | i++) { | 780 | (u8)min((u16)targetPowerHt20.tPow2x[i], |
762 | targetPowerHt20.tPow2x[i] = (u8)min( | 781 | minCtlPower); |
763 | (u16)targetPowerHt20.tPow2x[i], | ||
764 | minCtlPower); | ||
765 | } | 782 | } |
766 | break; | 783 | break; |
767 | case CTL_11B_EXT: | 784 | case CTL_11B_EXT: |
768 | targetPowerCckExt.tPow2x[0] = (u8)min( | 785 | targetPowerCckExt.tPow2x[0] = |
769 | (u16)targetPowerCckExt.tPow2x[0], | 786 | (u8)min((u16)targetPowerCckExt.tPow2x[0], |
770 | minCtlPower); | 787 | minCtlPower); |
771 | break; | 788 | break; |
772 | case CTL_11A_EXT: | 789 | case CTL_11A_EXT: |
773 | case CTL_11G_EXT: | 790 | case CTL_11G_EXT: |
774 | targetPowerOfdmExt.tPow2x[0] = (u8)min( | 791 | targetPowerOfdmExt.tPow2x[0] = |
775 | (u16)targetPowerOfdmExt.tPow2x[0], | 792 | (u8)min((u16)targetPowerOfdmExt.tPow2x[0], |
776 | minCtlPower); | 793 | minCtlPower); |
777 | break; | 794 | break; |
778 | case CTL_5GHT40: | 795 | case CTL_5GHT40: |
779 | case CTL_2GHT40: | 796 | case CTL_2GHT40: |
780 | for (i = 0; | 797 | for (i = 0; i < ARRAY_SIZE(targetPowerHt40.tPow2x); i++) { |
781 | i < ARRAY_SIZE(targetPowerHt40.tPow2x); | 798 | targetPowerHt40.tPow2x[i] = |
782 | i++) { | 799 | (u8)min((u16)targetPowerHt40.tPow2x[i], |
783 | targetPowerHt40.tPow2x[i] = (u8)min( | 800 | minCtlPower); |
784 | (u16)targetPowerHt40.tPow2x[i], | ||
785 | minCtlPower); | ||
786 | } | 801 | } |
787 | break; | 802 | break; |
788 | default: | 803 | default: |
@@ -790,12 +805,13 @@ static void ath9k_hw_set_AR9287_power_per_rate_table(struct ath_hw *ah, | |||
790 | } | 805 | } |
791 | } | 806 | } |
792 | 807 | ||
808 | /* Now set the rates array */ | ||
809 | |||
793 | ratesArray[rate6mb] = | 810 | ratesArray[rate6mb] = |
794 | ratesArray[rate9mb] = | 811 | ratesArray[rate9mb] = |
795 | ratesArray[rate12mb] = | 812 | ratesArray[rate12mb] = |
796 | ratesArray[rate18mb] = | 813 | ratesArray[rate18mb] = |
797 | ratesArray[rate24mb] = | 814 | ratesArray[rate24mb] = targetPowerOfdm.tPow2x[0]; |
798 | targetPowerOfdm.tPow2x[0]; | ||
799 | 815 | ||
800 | ratesArray[rate36mb] = targetPowerOfdm.tPow2x[1]; | 816 | ratesArray[rate36mb] = targetPowerOfdm.tPow2x[1]; |
801 | ratesArray[rate48mb] = targetPowerOfdm.tPow2x[2]; | 817 | ratesArray[rate48mb] = targetPowerOfdm.tPow2x[2]; |
@@ -807,12 +823,12 @@ static void ath9k_hw_set_AR9287_power_per_rate_table(struct ath_hw *ah, | |||
807 | 823 | ||
808 | if (IS_CHAN_2GHZ(chan)) { | 824 | if (IS_CHAN_2GHZ(chan)) { |
809 | ratesArray[rate1l] = targetPowerCck.tPow2x[0]; | 825 | ratesArray[rate1l] = targetPowerCck.tPow2x[0]; |
810 | ratesArray[rate2s] = ratesArray[rate2l] = | 826 | ratesArray[rate2s] = |
811 | targetPowerCck.tPow2x[1]; | 827 | ratesArray[rate2l] = targetPowerCck.tPow2x[1]; |
812 | ratesArray[rate5_5s] = ratesArray[rate5_5l] = | 828 | ratesArray[rate5_5s] = |
813 | targetPowerCck.tPow2x[2]; | 829 | ratesArray[rate5_5l] = targetPowerCck.tPow2x[2]; |
814 | ratesArray[rate11s] = ratesArray[rate11l] = | 830 | ratesArray[rate11s] = |
815 | targetPowerCck.tPow2x[3]; | 831 | ratesArray[rate11l] = targetPowerCck.tPow2x[3]; |
816 | } | 832 | } |
817 | if (IS_CHAN_HT40(chan)) { | 833 | if (IS_CHAN_HT40(chan)) { |
818 | for (i = 0; i < ARRAY_SIZE(targetPowerHt40.tPow2x); i++) | 834 | for (i = 0; i < ARRAY_SIZE(targetPowerHt40.tPow2x); i++) |
@@ -821,28 +837,28 @@ static void ath9k_hw_set_AR9287_power_per_rate_table(struct ath_hw *ah, | |||
821 | ratesArray[rateDupOfdm] = targetPowerHt40.tPow2x[0]; | 837 | ratesArray[rateDupOfdm] = targetPowerHt40.tPow2x[0]; |
822 | ratesArray[rateDupCck] = targetPowerHt40.tPow2x[0]; | 838 | ratesArray[rateDupCck] = targetPowerHt40.tPow2x[0]; |
823 | ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0]; | 839 | ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0]; |
840 | |||
824 | if (IS_CHAN_2GHZ(chan)) | 841 | if (IS_CHAN_2GHZ(chan)) |
825 | ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0]; | 842 | ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0]; |
826 | } | 843 | } |
827 | 844 | ||
845 | #undef CMP_CTL | ||
846 | #undef CMP_NO_CTL | ||
828 | #undef REDUCE_SCALED_POWER_BY_TWO_CHAIN | 847 | #undef REDUCE_SCALED_POWER_BY_TWO_CHAIN |
829 | #undef REDUCE_SCALED_POWER_BY_THREE_CHAIN | 848 | #undef REDUCE_SCALED_POWER_BY_THREE_CHAIN |
830 | } | 849 | } |
831 | 850 | ||
832 | static void ath9k_hw_AR9287_set_txpower(struct ath_hw *ah, | 851 | static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah, |
833 | struct ath9k_channel *chan, u16 cfgCtl, | 852 | struct ath9k_channel *chan, u16 cfgCtl, |
834 | u8 twiceAntennaReduction, | 853 | u8 twiceAntennaReduction, |
835 | u8 twiceMaxRegulatoryPower, | 854 | u8 twiceMaxRegulatoryPower, |
836 | u8 powerLimit) | 855 | u8 powerLimit) |
837 | { | 856 | { |
838 | #define INCREASE_MAXPOW_BY_TWO_CHAIN 6 | ||
839 | #define INCREASE_MAXPOW_BY_THREE_CHAIN 10 | ||
840 | struct ath_common *common = ath9k_hw_common(ah); | ||
841 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | 857 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); |
842 | struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; | 858 | struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; |
843 | struct modal_eep_ar9287_header *pModal = &pEepData->modalHeader; | 859 | struct modal_eep_ar9287_header *pModal = &pEepData->modalHeader; |
844 | int16_t ratesArray[Ar5416RateSize]; | 860 | int16_t ratesArray[Ar5416RateSize]; |
845 | int16_t txPowerIndexOffset = 0; | 861 | int16_t txPowerIndexOffset = 0; |
846 | u8 ht40PowerIncForPdadc = 2; | 862 | u8 ht40PowerIncForPdadc = 2; |
847 | int i; | 863 | int i; |
848 | 864 | ||
@@ -852,13 +868,13 @@ static void ath9k_hw_AR9287_set_txpower(struct ath_hw *ah, | |||
852 | AR9287_EEP_MINOR_VER_2) | 868 | AR9287_EEP_MINOR_VER_2) |
853 | ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; | 869 | ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; |
854 | 870 | ||
855 | ath9k_hw_set_AR9287_power_per_rate_table(ah, chan, | 871 | ath9k_hw_set_ar9287_power_per_rate_table(ah, chan, |
856 | &ratesArray[0], cfgCtl, | 872 | &ratesArray[0], cfgCtl, |
857 | twiceAntennaReduction, | 873 | twiceAntennaReduction, |
858 | twiceMaxRegulatoryPower, | 874 | twiceMaxRegulatoryPower, |
859 | powerLimit); | 875 | powerLimit); |
860 | 876 | ||
861 | ath9k_hw_set_AR9287_power_cal_table(ah, chan, &txPowerIndexOffset); | 877 | ath9k_hw_set_ar9287_power_cal_table(ah, chan, &txPowerIndexOffset); |
862 | 878 | ||
863 | for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { | 879 | for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { |
864 | ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); | 880 | ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); |
@@ -871,6 +887,7 @@ static void ath9k_hw_AR9287_set_txpower(struct ath_hw *ah, | |||
871 | ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2; | 887 | ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2; |
872 | } | 888 | } |
873 | 889 | ||
890 | /* OFDM power per rate */ | ||
874 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, | 891 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, |
875 | ATH9K_POW_SM(ratesArray[rate18mb], 24) | 892 | ATH9K_POW_SM(ratesArray[rate18mb], 24) |
876 | | ATH9K_POW_SM(ratesArray[rate12mb], 16) | 893 | | ATH9K_POW_SM(ratesArray[rate12mb], 16) |
@@ -883,6 +900,7 @@ static void ath9k_hw_AR9287_set_txpower(struct ath_hw *ah, | |||
883 | | ATH9K_POW_SM(ratesArray[rate36mb], 8) | 900 | | ATH9K_POW_SM(ratesArray[rate36mb], 8) |
884 | | ATH9K_POW_SM(ratesArray[rate24mb], 0)); | 901 | | ATH9K_POW_SM(ratesArray[rate24mb], 0)); |
885 | 902 | ||
903 | /* CCK power per rate */ | ||
886 | if (IS_CHAN_2GHZ(chan)) { | 904 | if (IS_CHAN_2GHZ(chan)) { |
887 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, | 905 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, |
888 | ATH9K_POW_SM(ratesArray[rate2s], 24) | 906 | ATH9K_POW_SM(ratesArray[rate2s], 24) |
@@ -896,6 +914,7 @@ static void ath9k_hw_AR9287_set_txpower(struct ath_hw *ah, | |||
896 | | ATH9K_POW_SM(ratesArray[rate5_5l], 0)); | 914 | | ATH9K_POW_SM(ratesArray[rate5_5l], 0)); |
897 | } | 915 | } |
898 | 916 | ||
917 | /* HT20 power per rate */ | ||
899 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE5, | 918 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE5, |
900 | ATH9K_POW_SM(ratesArray[rateHt20_3], 24) | 919 | ATH9K_POW_SM(ratesArray[rateHt20_3], 24) |
901 | | ATH9K_POW_SM(ratesArray[rateHt20_2], 16) | 920 | | ATH9K_POW_SM(ratesArray[rateHt20_2], 16) |
@@ -908,8 +927,9 @@ static void ath9k_hw_AR9287_set_txpower(struct ath_hw *ah, | |||
908 | | ATH9K_POW_SM(ratesArray[rateHt20_5], 8) | 927 | | ATH9K_POW_SM(ratesArray[rateHt20_5], 8) |
909 | | ATH9K_POW_SM(ratesArray[rateHt20_4], 0)); | 928 | | ATH9K_POW_SM(ratesArray[rateHt20_4], 0)); |
910 | 929 | ||
930 | /* HT40 power per rate */ | ||
911 | if (IS_CHAN_HT40(chan)) { | 931 | if (IS_CHAN_HT40(chan)) { |
912 | if (ath9k_hw_AR9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { | 932 | if (ath9k_hw_ar9287_get_eeprom(ah, EEP_OL_PWRCTRL)) { |
913 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, | 933 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, |
914 | ATH9K_POW_SM(ratesArray[rateHt40_3], 24) | 934 | ATH9K_POW_SM(ratesArray[rateHt40_3], 24) |
915 | | ATH9K_POW_SM(ratesArray[rateHt40_2], 16) | 935 | | ATH9K_POW_SM(ratesArray[rateHt40_2], 16) |
@@ -943,6 +963,7 @@ static void ath9k_hw_AR9287_set_txpower(struct ath_hw *ah, | |||
943 | ht40PowerIncForPdadc, 0)); | 963 | ht40PowerIncForPdadc, 0)); |
944 | } | 964 | } |
945 | 965 | ||
966 | /* Dup/Ext power per rate */ | ||
946 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, | 967 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, |
947 | ATH9K_POW_SM(ratesArray[rateExtOfdm], 24) | 968 | ATH9K_POW_SM(ratesArray[rateExtOfdm], 24) |
948 | | ATH9K_POW_SM(ratesArray[rateExtCck], 16) | 969 | | ATH9K_POW_SM(ratesArray[rateExtCck], 16) |
@@ -960,37 +981,20 @@ static void ath9k_hw_AR9287_set_txpower(struct ath_hw *ah, | |||
960 | ratesArray[i] + AR9287_PWR_TABLE_OFFSET_DB * 2; | 981 | ratesArray[i] + AR9287_PWR_TABLE_OFFSET_DB * 2; |
961 | else | 982 | else |
962 | regulatory->max_power_level = ratesArray[i]; | 983 | regulatory->max_power_level = ratesArray[i]; |
963 | |||
964 | switch (ar5416_get_ntxchains(ah->txchainmask)) { | ||
965 | case 1: | ||
966 | break; | ||
967 | case 2: | ||
968 | regulatory->max_power_level += | ||
969 | INCREASE_MAXPOW_BY_TWO_CHAIN; | ||
970 | break; | ||
971 | case 3: | ||
972 | regulatory->max_power_level += | ||
973 | INCREASE_MAXPOW_BY_THREE_CHAIN; | ||
974 | break; | ||
975 | default: | ||
976 | ath_print(common, ATH_DBG_EEPROM, | ||
977 | "Invalid chainmask configuration\n"); | ||
978 | break; | ||
979 | } | ||
980 | } | 984 | } |
981 | 985 | ||
982 | static void ath9k_hw_AR9287_set_addac(struct ath_hw *ah, | 986 | static void ath9k_hw_ar9287_set_addac(struct ath_hw *ah, |
983 | struct ath9k_channel *chan) | 987 | struct ath9k_channel *chan) |
984 | { | 988 | { |
985 | } | 989 | } |
986 | 990 | ||
987 | static void ath9k_hw_AR9287_set_board_values(struct ath_hw *ah, | 991 | static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah, |
988 | struct ath9k_channel *chan) | 992 | struct ath9k_channel *chan) |
989 | { | 993 | { |
990 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; | 994 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; |
991 | struct modal_eep_ar9287_header *pModal = &eep->modalHeader; | 995 | struct modal_eep_ar9287_header *pModal = &eep->modalHeader; |
992 | u16 antWrites[AR9287_ANT_16S]; | 996 | u16 antWrites[AR9287_ANT_16S]; |
993 | u32 regChainOffset; | 997 | u32 regChainOffset, regval; |
994 | u8 txRxAttenLocal; | 998 | u8 txRxAttenLocal; |
995 | int i, j, offset_num; | 999 | int i, j, offset_num; |
996 | 1000 | ||
@@ -1077,42 +1081,37 @@ static void ath9k_hw_AR9287_set_board_values(struct ath_hw *ah, | |||
1077 | REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, | 1081 | REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, |
1078 | AR_PHY_EXT_CCA0_THRESH62, pModal->thresh62); | 1082 | AR_PHY_EXT_CCA0_THRESH62, pModal->thresh62); |
1079 | 1083 | ||
1080 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH0, AR9287_AN_RF2G3_DB1, | 1084 | regval = REG_READ(ah, AR9287_AN_RF2G3_CH0); |
1081 | AR9287_AN_RF2G3_DB1_S, pModal->db1); | 1085 | regval &= ~(AR9287_AN_RF2G3_DB1 | |
1082 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH0, AR9287_AN_RF2G3_DB2, | 1086 | AR9287_AN_RF2G3_DB2 | |
1083 | AR9287_AN_RF2G3_DB2_S, pModal->db2); | 1087 | AR9287_AN_RF2G3_OB_CCK | |
1084 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH0, | 1088 | AR9287_AN_RF2G3_OB_PSK | |
1085 | AR9287_AN_RF2G3_OB_CCK, | 1089 | AR9287_AN_RF2G3_OB_QAM | |
1086 | AR9287_AN_RF2G3_OB_CCK_S, pModal->ob_cck); | 1090 | AR9287_AN_RF2G3_OB_PAL_OFF); |
1087 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH0, | 1091 | regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) | |
1088 | AR9287_AN_RF2G3_OB_PSK, | 1092 | SM(pModal->db2, AR9287_AN_RF2G3_DB2) | |
1089 | AR9287_AN_RF2G3_OB_PSK_S, pModal->ob_psk); | 1093 | SM(pModal->ob_cck, AR9287_AN_RF2G3_OB_CCK) | |
1090 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH0, | 1094 | SM(pModal->ob_psk, AR9287_AN_RF2G3_OB_PSK) | |
1091 | AR9287_AN_RF2G3_OB_QAM, | 1095 | SM(pModal->ob_qam, AR9287_AN_RF2G3_OB_QAM) | |
1092 | AR9287_AN_RF2G3_OB_QAM_S, pModal->ob_qam); | 1096 | SM(pModal->ob_pal_off, AR9287_AN_RF2G3_OB_PAL_OFF)); |
1093 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH0, | 1097 | |
1094 | AR9287_AN_RF2G3_OB_PAL_OFF, | 1098 | ath9k_hw_analog_shift_regwrite(ah, AR9287_AN_RF2G3_CH0, regval); |
1095 | AR9287_AN_RF2G3_OB_PAL_OFF_S, | 1099 | |
1096 | pModal->ob_pal_off); | 1100 | regval = REG_READ(ah, AR9287_AN_RF2G3_CH1); |
1097 | 1101 | regval &= ~(AR9287_AN_RF2G3_DB1 | | |
1098 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH1, | 1102 | AR9287_AN_RF2G3_DB2 | |
1099 | AR9287_AN_RF2G3_DB1, AR9287_AN_RF2G3_DB1_S, | 1103 | AR9287_AN_RF2G3_OB_CCK | |
1100 | pModal->db1); | 1104 | AR9287_AN_RF2G3_OB_PSK | |
1101 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH1, AR9287_AN_RF2G3_DB2, | 1105 | AR9287_AN_RF2G3_OB_QAM | |
1102 | AR9287_AN_RF2G3_DB2_S, pModal->db2); | 1106 | AR9287_AN_RF2G3_OB_PAL_OFF); |
1103 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH1, | 1107 | regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) | |
1104 | AR9287_AN_RF2G3_OB_CCK, | 1108 | SM(pModal->db2, AR9287_AN_RF2G3_DB2) | |
1105 | AR9287_AN_RF2G3_OB_CCK_S, pModal->ob_cck); | 1109 | SM(pModal->ob_cck, AR9287_AN_RF2G3_OB_CCK) | |
1106 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH1, | 1110 | SM(pModal->ob_psk, AR9287_AN_RF2G3_OB_PSK) | |
1107 | AR9287_AN_RF2G3_OB_PSK, | 1111 | SM(pModal->ob_qam, AR9287_AN_RF2G3_OB_QAM) | |
1108 | AR9287_AN_RF2G3_OB_PSK_S, pModal->ob_psk); | 1112 | SM(pModal->ob_pal_off, AR9287_AN_RF2G3_OB_PAL_OFF)); |
1109 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH1, | 1113 | |
1110 | AR9287_AN_RF2G3_OB_QAM, | 1114 | ath9k_hw_analog_shift_regwrite(ah, AR9287_AN_RF2G3_CH1, regval); |
1111 | AR9287_AN_RF2G3_OB_QAM_S, pModal->ob_qam); | ||
1112 | ath9k_hw_analog_shift_rmw(ah, AR9287_AN_RF2G3_CH1, | ||
1113 | AR9287_AN_RF2G3_OB_PAL_OFF, | ||
1114 | AR9287_AN_RF2G3_OB_PAL_OFF_S, | ||
1115 | pModal->ob_pal_off); | ||
1116 | 1115 | ||
1117 | REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, | 1116 | REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, |
1118 | AR_PHY_TX_END_DATA_START, pModal->txFrameToDataStart); | 1117 | AR_PHY_TX_END_DATA_START, pModal->txFrameToDataStart); |
@@ -1125,13 +1124,13 @@ static void ath9k_hw_AR9287_set_board_values(struct ath_hw *ah, | |||
1125 | pModal->xpaBiasLvl); | 1124 | pModal->xpaBiasLvl); |
1126 | } | 1125 | } |
1127 | 1126 | ||
1128 | static u8 ath9k_hw_AR9287_get_num_ant_config(struct ath_hw *ah, | 1127 | static u8 ath9k_hw_ar9287_get_num_ant_config(struct ath_hw *ah, |
1129 | enum ieee80211_band freq_band) | 1128 | enum ieee80211_band freq_band) |
1130 | { | 1129 | { |
1131 | return 1; | 1130 | return 1; |
1132 | } | 1131 | } |
1133 | 1132 | ||
1134 | static u16 ath9k_hw_AR9287_get_eeprom_antenna_cfg(struct ath_hw *ah, | 1133 | static u16 ath9k_hw_ar9287_get_eeprom_antenna_cfg(struct ath_hw *ah, |
1135 | struct ath9k_channel *chan) | 1134 | struct ath9k_channel *chan) |
1136 | { | 1135 | { |
1137 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; | 1136 | struct ar9287_eeprom *eep = &ah->eeprom.map9287; |
@@ -1140,11 +1139,12 @@ static u16 ath9k_hw_AR9287_get_eeprom_antenna_cfg(struct ath_hw *ah, | |||
1140 | return pModal->antCtrlCommon & 0xFFFF; | 1139 | return pModal->antCtrlCommon & 0xFFFF; |
1141 | } | 1140 | } |
1142 | 1141 | ||
1143 | static u16 ath9k_hw_AR9287_get_spur_channel(struct ath_hw *ah, | 1142 | static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah, |
1144 | u16 i, bool is2GHz) | 1143 | u16 i, bool is2GHz) |
1145 | { | 1144 | { |
1146 | #define EEP_MAP9287_SPURCHAN \ | 1145 | #define EEP_MAP9287_SPURCHAN \ |
1147 | (ah->eeprom.map9287.modalHeader.spurChans[i].spurChan) | 1146 | (ah->eeprom.map9287.modalHeader.spurChans[i].spurChan) |
1147 | |||
1148 | struct ath_common *common = ath9k_hw_common(ah); | 1148 | struct ath_common *common = ath9k_hw_common(ah); |
1149 | u16 spur_val = AR_NO_SPUR; | 1149 | u16 spur_val = AR_NO_SPUR; |
1150 | 1150 | ||
@@ -1171,15 +1171,15 @@ static u16 ath9k_hw_AR9287_get_spur_channel(struct ath_hw *ah, | |||
1171 | } | 1171 | } |
1172 | 1172 | ||
1173 | const struct eeprom_ops eep_ar9287_ops = { | 1173 | const struct eeprom_ops eep_ar9287_ops = { |
1174 | .check_eeprom = ath9k_hw_AR9287_check_eeprom, | 1174 | .check_eeprom = ath9k_hw_ar9287_check_eeprom, |
1175 | .get_eeprom = ath9k_hw_AR9287_get_eeprom, | 1175 | .get_eeprom = ath9k_hw_ar9287_get_eeprom, |
1176 | .fill_eeprom = ath9k_hw_AR9287_fill_eeprom, | 1176 | .fill_eeprom = ath9k_hw_ar9287_fill_eeprom, |
1177 | .get_eeprom_ver = ath9k_hw_AR9287_get_eeprom_ver, | 1177 | .get_eeprom_ver = ath9k_hw_ar9287_get_eeprom_ver, |
1178 | .get_eeprom_rev = ath9k_hw_AR9287_get_eeprom_rev, | 1178 | .get_eeprom_rev = ath9k_hw_ar9287_get_eeprom_rev, |
1179 | .get_num_ant_config = ath9k_hw_AR9287_get_num_ant_config, | 1179 | .get_num_ant_config = ath9k_hw_ar9287_get_num_ant_config, |
1180 | .get_eeprom_antenna_cfg = ath9k_hw_AR9287_get_eeprom_antenna_cfg, | 1180 | .get_eeprom_antenna_cfg = ath9k_hw_ar9287_get_eeprom_antenna_cfg, |
1181 | .set_board_values = ath9k_hw_AR9287_set_board_values, | 1181 | .set_board_values = ath9k_hw_ar9287_set_board_values, |
1182 | .set_addac = ath9k_hw_AR9287_set_addac, | 1182 | .set_addac = ath9k_hw_ar9287_set_addac, |
1183 | .set_txpower = ath9k_hw_AR9287_set_txpower, | 1183 | .set_txpower = ath9k_hw_ar9287_set_txpower, |
1184 | .get_spur_channel = ath9k_hw_AR9287_get_spur_channel | 1184 | .get_spur_channel = ath9k_hw_ar9287_get_spur_channel |
1185 | }; | 1185 | }; |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c index 7e1ed78d0e64..77b1433312cc 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_def.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c | |||
@@ -617,6 +617,7 @@ static void ath9k_hw_get_def_gain_boundaries_pdadcs(struct ath_hw *ah, | |||
617 | int16_t minDelta = 0; | 617 | int16_t minDelta = 0; |
618 | struct chan_centers centers; | 618 | struct chan_centers centers; |
619 | 619 | ||
620 | memset(&minPwrT4, 0, AR9287_NUM_PD_GAINS); | ||
620 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); | 621 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
621 | 622 | ||
622 | for (numPiers = 0; numPiers < availPiers; numPiers++) { | 623 | for (numPiers = 0; numPiers < availPiers; numPiers++) { |
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c index 77b359162d6c..5f3ea7091ae0 100644 --- a/drivers/net/wireless/ath/ath9k/hif_usb.c +++ b/drivers/net/wireless/ath/ath9k/hif_usb.c | |||
@@ -16,12 +16,10 @@ | |||
16 | 16 | ||
17 | #include "htc.h" | 17 | #include "htc.h" |
18 | 18 | ||
19 | #define ATH9K_FW_USB_DEV(devid, fw) \ | ||
20 | { USB_DEVICE(0x0cf3, devid), .driver_info = (unsigned long) fw } | ||
21 | |||
22 | static struct usb_device_id ath9k_hif_usb_ids[] = { | 19 | static struct usb_device_id ath9k_hif_usb_ids[] = { |
23 | ATH9K_FW_USB_DEV(0x9271, "ar9271.fw"), | 20 | { USB_DEVICE(0x0cf3, 0x9271) }, |
24 | ATH9K_FW_USB_DEV(0x1006, "ar9271.fw"), | 21 | { USB_DEVICE(0x0cf3, 0x1006) }, |
22 | { USB_DEVICE(0x0cf3, 0x7010) }, | ||
25 | { }, | 23 | { }, |
26 | }; | 24 | }; |
27 | 25 | ||
@@ -756,6 +754,7 @@ static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev) | |||
756 | size_t len = hif_dev->firmware->size; | 754 | size_t len = hif_dev->firmware->size; |
757 | u32 addr = AR9271_FIRMWARE; | 755 | u32 addr = AR9271_FIRMWARE; |
758 | u8 *buf = kzalloc(4096, GFP_KERNEL); | 756 | u8 *buf = kzalloc(4096, GFP_KERNEL); |
757 | u32 firm_offset; | ||
759 | 758 | ||
760 | if (!buf) | 759 | if (!buf) |
761 | return -ENOMEM; | 760 | return -ENOMEM; |
@@ -779,32 +778,37 @@ static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev) | |||
779 | } | 778 | } |
780 | kfree(buf); | 779 | kfree(buf); |
781 | 780 | ||
781 | if (hif_dev->device_id == 0x7010) | ||
782 | firm_offset = AR7010_FIRMWARE_TEXT; | ||
783 | else | ||
784 | firm_offset = AR9271_FIRMWARE_TEXT; | ||
785 | |||
782 | /* | 786 | /* |
783 | * Issue FW download complete command to firmware. | 787 | * Issue FW download complete command to firmware. |
784 | */ | 788 | */ |
785 | err = usb_control_msg(hif_dev->udev, usb_sndctrlpipe(hif_dev->udev, 0), | 789 | err = usb_control_msg(hif_dev->udev, usb_sndctrlpipe(hif_dev->udev, 0), |
786 | FIRMWARE_DOWNLOAD_COMP, | 790 | FIRMWARE_DOWNLOAD_COMP, |
787 | 0x40 | USB_DIR_OUT, | 791 | 0x40 | USB_DIR_OUT, |
788 | AR9271_FIRMWARE_TEXT >> 8, 0, NULL, 0, HZ); | 792 | firm_offset >> 8, 0, NULL, 0, HZ); |
789 | if (err) | 793 | if (err) |
790 | return -EIO; | 794 | return -EIO; |
791 | 795 | ||
792 | dev_info(&hif_dev->udev->dev, "ath9k_htc: Transferred FW: %s, size: %ld\n", | 796 | dev_info(&hif_dev->udev->dev, "ath9k_htc: Transferred FW: %s, size: %ld\n", |
793 | "ar9271.fw", (unsigned long) hif_dev->firmware->size); | 797 | hif_dev->fw_name, (unsigned long) hif_dev->firmware->size); |
794 | 798 | ||
795 | return 0; | 799 | return 0; |
796 | } | 800 | } |
797 | 801 | ||
798 | static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev, | 802 | static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev) |
799 | const char *fw_name) | ||
800 | { | 803 | { |
801 | int ret; | 804 | int ret; |
802 | 805 | ||
803 | /* Request firmware */ | 806 | /* Request firmware */ |
804 | ret = request_firmware(&hif_dev->firmware, fw_name, &hif_dev->udev->dev); | 807 | ret = request_firmware(&hif_dev->firmware, hif_dev->fw_name, |
808 | &hif_dev->udev->dev); | ||
805 | if (ret) { | 809 | if (ret) { |
806 | dev_err(&hif_dev->udev->dev, | 810 | dev_err(&hif_dev->udev->dev, |
807 | "ath9k_htc: Firmware - %s not found\n", fw_name); | 811 | "ath9k_htc: Firmware - %s not found\n", hif_dev->fw_name); |
808 | goto err_fw_req; | 812 | goto err_fw_req; |
809 | } | 813 | } |
810 | 814 | ||
@@ -820,7 +824,8 @@ static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev, | |||
820 | ret = ath9k_hif_usb_download_fw(hif_dev); | 824 | ret = ath9k_hif_usb_download_fw(hif_dev); |
821 | if (ret) { | 825 | if (ret) { |
822 | dev_err(&hif_dev->udev->dev, | 826 | dev_err(&hif_dev->udev->dev, |
823 | "ath9k_htc: Firmware - %s download failed\n", fw_name); | 827 | "ath9k_htc: Firmware - %s download failed\n", |
828 | hif_dev->fw_name); | ||
824 | goto err_fw_download; | 829 | goto err_fw_download; |
825 | } | 830 | } |
826 | 831 | ||
@@ -847,7 +852,6 @@ static int ath9k_hif_usb_probe(struct usb_interface *interface, | |||
847 | { | 852 | { |
848 | struct usb_device *udev = interface_to_usbdev(interface); | 853 | struct usb_device *udev = interface_to_usbdev(interface); |
849 | struct hif_device_usb *hif_dev; | 854 | struct hif_device_usb *hif_dev; |
850 | const char *fw_name = (const char *) id->driver_info; | ||
851 | int ret = 0; | 855 | int ret = 0; |
852 | 856 | ||
853 | hif_dev = kzalloc(sizeof(struct hif_device_usb), GFP_KERNEL); | 857 | hif_dev = kzalloc(sizeof(struct hif_device_usb), GFP_KERNEL); |
@@ -872,7 +876,29 @@ static int ath9k_hif_usb_probe(struct usb_interface *interface, | |||
872 | goto err_htc_hw_alloc; | 876 | goto err_htc_hw_alloc; |
873 | } | 877 | } |
874 | 878 | ||
875 | ret = ath9k_hif_usb_dev_init(hif_dev, fw_name); | 879 | /* Find out which firmware to load */ |
880 | |||
881 | switch(hif_dev->device_id) { | ||
882 | case 0x9271: | ||
883 | case 0x1006: | ||
884 | hif_dev->fw_name = "ar9271.fw"; | ||
885 | break; | ||
886 | case 0x7010: | ||
887 | if (le16_to_cpu(udev->descriptor.bcdDevice) == 0x0202) | ||
888 | hif_dev->fw_name = "ar7010_1_1.fw"; | ||
889 | else | ||
890 | hif_dev->fw_name = "ar7010.fw"; | ||
891 | break; | ||
892 | default: | ||
893 | break; | ||
894 | } | ||
895 | |||
896 | if (!hif_dev->fw_name) { | ||
897 | dev_err(&udev->dev, "Can't determine firmware !\n"); | ||
898 | goto err_htc_hw_alloc; | ||
899 | } | ||
900 | |||
901 | ret = ath9k_hif_usb_dev_init(hif_dev); | ||
876 | if (ret) { | 902 | if (ret) { |
877 | ret = -EINVAL; | 903 | ret = -EINVAL; |
878 | goto err_hif_init_usb; | 904 | goto err_hif_init_usb; |
@@ -907,12 +933,10 @@ static void ath9k_hif_usb_reboot(struct usb_device *udev) | |||
907 | void *buf; | 933 | void *buf; |
908 | int ret; | 934 | int ret; |
909 | 935 | ||
910 | buf = kmalloc(4, GFP_KERNEL); | 936 | buf = kmemdup(&reboot_cmd, 4, GFP_KERNEL); |
911 | if (!buf) | 937 | if (!buf) |
912 | return; | 938 | return; |
913 | 939 | ||
914 | memcpy(buf, &reboot_cmd, 4); | ||
915 | |||
916 | ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, USB_REG_OUT_PIPE), | 940 | ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, USB_REG_OUT_PIPE), |
917 | buf, 4, NULL, HZ); | 941 | buf, 4, NULL, HZ); |
918 | if (ret) | 942 | if (ret) |
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.h b/drivers/net/wireless/ath/ath9k/hif_usb.h index 0aca49b6fcb6..2daf97b11c08 100644 --- a/drivers/net/wireless/ath/ath9k/hif_usb.h +++ b/drivers/net/wireless/ath/ath9k/hif_usb.h | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | #define AR9271_FIRMWARE 0x501000 | 20 | #define AR9271_FIRMWARE 0x501000 |
21 | #define AR9271_FIRMWARE_TEXT 0x903000 | 21 | #define AR9271_FIRMWARE_TEXT 0x903000 |
22 | #define AR7010_FIRMWARE_TEXT 0x906000 | ||
22 | 23 | ||
23 | #define FIRMWARE_DOWNLOAD 0x30 | 24 | #define FIRMWARE_DOWNLOAD 0x30 |
24 | #define FIRMWARE_DOWNLOAD_COMP 0x31 | 25 | #define FIRMWARE_DOWNLOAD_COMP 0x31 |
@@ -90,6 +91,7 @@ struct hif_device_usb { | |||
90 | struct usb_anchor regout_submitted; | 91 | struct usb_anchor regout_submitted; |
91 | struct usb_anchor rx_submitted; | 92 | struct usb_anchor rx_submitted; |
92 | struct sk_buff *remain_skb; | 93 | struct sk_buff *remain_skb; |
94 | const char *fw_name; | ||
93 | int rx_remain_len; | 95 | int rx_remain_len; |
94 | int rx_pkt_len; | 96 | int rx_pkt_len; |
95 | int rx_transfer_len; | 97 | int rx_transfer_len; |
diff --git a/drivers/net/wireless/ath/ath9k/htc.h b/drivers/net/wireless/ath/ath9k/htc.h index c251603ab032..051b8d89b9f2 100644 --- a/drivers/net/wireless/ath/ath9k/htc.h +++ b/drivers/net/wireless/ath/ath9k/htc.h | |||
@@ -257,12 +257,15 @@ struct ath9k_htc_tx_ctl { | |||
257 | #define TX_STAT_INC(c) (hif_dev->htc_handle->drv_priv->debug.tx_stats.c++) | 257 | #define TX_STAT_INC(c) (hif_dev->htc_handle->drv_priv->debug.tx_stats.c++) |
258 | #define RX_STAT_INC(c) (hif_dev->htc_handle->drv_priv->debug.rx_stats.c++) | 258 | #define RX_STAT_INC(c) (hif_dev->htc_handle->drv_priv->debug.rx_stats.c++) |
259 | 259 | ||
260 | #define TX_QSTAT_INC(q) (priv->debug.tx_stats.queue_stats[q]++) | ||
261 | |||
260 | struct ath_tx_stats { | 262 | struct ath_tx_stats { |
261 | u32 buf_queued; | 263 | u32 buf_queued; |
262 | u32 buf_completed; | 264 | u32 buf_completed; |
263 | u32 skb_queued; | 265 | u32 skb_queued; |
264 | u32 skb_completed; | 266 | u32 skb_completed; |
265 | u32 skb_dropped; | 267 | u32 skb_dropped; |
268 | u32 queue_stats[WME_NUM_AC]; | ||
266 | }; | 269 | }; |
267 | 270 | ||
268 | struct ath_rx_stats { | 271 | struct ath_rx_stats { |
@@ -286,6 +289,8 @@ struct ath9k_debug { | |||
286 | #define TX_STAT_INC(c) do { } while (0) | 289 | #define TX_STAT_INC(c) do { } while (0) |
287 | #define RX_STAT_INC(c) do { } while (0) | 290 | #define RX_STAT_INC(c) do { } while (0) |
288 | 291 | ||
292 | #define TX_QSTAT_INC(c) do { } while (0) | ||
293 | |||
289 | #endif /* CONFIG_ATH9K_HTC_DEBUGFS */ | 294 | #endif /* CONFIG_ATH9K_HTC_DEBUGFS */ |
290 | 295 | ||
291 | #define ATH_LED_PIN_DEF 1 | 296 | #define ATH_LED_PIN_DEF 1 |
@@ -390,13 +395,14 @@ struct ath9k_htc_priv { | |||
390 | int led_off_duration; | 395 | int led_off_duration; |
391 | int led_on_cnt; | 396 | int led_on_cnt; |
392 | int led_off_cnt; | 397 | int led_off_cnt; |
398 | |||
399 | int beaconq; | ||
400 | int cabq; | ||
393 | int hwq_map[ATH9K_WME_AC_VO+1]; | 401 | int hwq_map[ATH9K_WME_AC_VO+1]; |
394 | 402 | ||
395 | #ifdef CONFIG_ATH9K_HTC_DEBUGFS | 403 | #ifdef CONFIG_ATH9K_HTC_DEBUGFS |
396 | struct ath9k_debug debug; | 404 | struct ath9k_debug debug; |
397 | #endif | 405 | #endif |
398 | struct ath9k_htc_target_rate tgt_rate; | ||
399 | |||
400 | struct mutex mutex; | 406 | struct mutex mutex; |
401 | }; | 407 | }; |
402 | 408 | ||
@@ -405,6 +411,7 @@ static inline void ath_read_cachesize(struct ath_common *common, int *csz) | |||
405 | common->bus_ops->read_cachesize(common, csz); | 411 | common->bus_ops->read_cachesize(common, csz); |
406 | } | 412 | } |
407 | 413 | ||
414 | void ath9k_htc_beaconq_config(struct ath9k_htc_priv *priv); | ||
408 | void ath9k_htc_beacon_config(struct ath9k_htc_priv *priv, | 415 | void ath9k_htc_beacon_config(struct ath9k_htc_priv *priv, |
409 | struct ieee80211_vif *vif); | 416 | struct ieee80211_vif *vif); |
410 | void ath9k_htc_swba(struct ath9k_htc_priv *priv, u8 beacon_pending); | 417 | void ath9k_htc_swba(struct ath9k_htc_priv *priv, u8 beacon_pending); |
@@ -426,6 +433,7 @@ int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb); | |||
426 | void ath9k_tx_cleanup(struct ath9k_htc_priv *priv); | 433 | void ath9k_tx_cleanup(struct ath9k_htc_priv *priv); |
427 | bool ath9k_htc_txq_setup(struct ath9k_htc_priv *priv, | 434 | bool ath9k_htc_txq_setup(struct ath9k_htc_priv *priv, |
428 | enum ath9k_tx_queue_subtype qtype); | 435 | enum ath9k_tx_queue_subtype qtype); |
436 | int ath9k_htc_cabq_setup(struct ath9k_htc_priv *priv); | ||
429 | int get_hw_qnum(u16 queue, int *hwq_map); | 437 | int get_hw_qnum(u16 queue, int *hwq_map); |
430 | int ath_htc_txq_update(struct ath9k_htc_priv *priv, int qnum, | 438 | int ath_htc_txq_update(struct ath9k_htc_priv *priv, int qnum, |
431 | struct ath9k_tx_queue_info *qinfo); | 439 | struct ath9k_tx_queue_info *qinfo); |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c b/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c index c10c7d002eb7..12a3bb0a9159 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c | |||
@@ -222,6 +222,29 @@ void ath9k_htc_swba(struct ath9k_htc_priv *priv, u8 beacon_pending) | |||
222 | spin_unlock_bh(&priv->beacon_lock); | 222 | spin_unlock_bh(&priv->beacon_lock); |
223 | } | 223 | } |
224 | 224 | ||
225 | /* Currently, only for IBSS */ | ||
226 | void ath9k_htc_beaconq_config(struct ath9k_htc_priv *priv) | ||
227 | { | ||
228 | struct ath_hw *ah = priv->ah; | ||
229 | struct ath9k_tx_queue_info qi, qi_be; | ||
230 | int qnum = priv->hwq_map[ATH9K_WME_AC_BE]; | ||
231 | |||
232 | memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); | ||
233 | memset(&qi_be, 0, sizeof(struct ath9k_tx_queue_info)); | ||
234 | |||
235 | ath9k_hw_get_txq_props(ah, qnum, &qi_be); | ||
236 | |||
237 | qi.tqi_aifs = qi_be.tqi_aifs; | ||
238 | qi.tqi_cwmin = 4*qi_be.tqi_cwmin; | ||
239 | qi.tqi_cwmax = qi_be.tqi_cwmax; | ||
240 | |||
241 | if (!ath9k_hw_set_txq_props(ah, priv->beaconq, &qi)) { | ||
242 | ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL, | ||
243 | "Unable to update beacon queue %u!\n", qnum); | ||
244 | } else { | ||
245 | ath9k_hw_resettxqueue(ah, priv->beaconq); | ||
246 | } | ||
247 | } | ||
225 | 248 | ||
226 | void ath9k_htc_beacon_config(struct ath9k_htc_priv *priv, | 249 | void ath9k_htc_beacon_config(struct ath9k_htc_priv *priv, |
227 | struct ieee80211_vif *vif) | 250 | struct ieee80211_vif *vif) |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c index dc015077a8d9..7339439f0bef 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c | |||
@@ -34,6 +34,13 @@ MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption"); | |||
34 | .max_power = 20, \ | 34 | .max_power = 20, \ |
35 | } | 35 | } |
36 | 36 | ||
37 | #define CHAN5G(_freq, _idx) { \ | ||
38 | .band = IEEE80211_BAND_5GHZ, \ | ||
39 | .center_freq = (_freq), \ | ||
40 | .hw_value = (_idx), \ | ||
41 | .max_power = 20, \ | ||
42 | } | ||
43 | |||
37 | static struct ieee80211_channel ath9k_2ghz_channels[] = { | 44 | static struct ieee80211_channel ath9k_2ghz_channels[] = { |
38 | CHAN2G(2412, 0), /* Channel 1 */ | 45 | CHAN2G(2412, 0), /* Channel 1 */ |
39 | CHAN2G(2417, 1), /* Channel 2 */ | 46 | CHAN2G(2417, 1), /* Channel 2 */ |
@@ -51,6 +58,37 @@ static struct ieee80211_channel ath9k_2ghz_channels[] = { | |||
51 | CHAN2G(2484, 13), /* Channel 14 */ | 58 | CHAN2G(2484, 13), /* Channel 14 */ |
52 | }; | 59 | }; |
53 | 60 | ||
61 | static struct ieee80211_channel ath9k_5ghz_channels[] = { | ||
62 | /* _We_ call this UNII 1 */ | ||
63 | CHAN5G(5180, 14), /* Channel 36 */ | ||
64 | CHAN5G(5200, 15), /* Channel 40 */ | ||
65 | CHAN5G(5220, 16), /* Channel 44 */ | ||
66 | CHAN5G(5240, 17), /* Channel 48 */ | ||
67 | /* _We_ call this UNII 2 */ | ||
68 | CHAN5G(5260, 18), /* Channel 52 */ | ||
69 | CHAN5G(5280, 19), /* Channel 56 */ | ||
70 | CHAN5G(5300, 20), /* Channel 60 */ | ||
71 | CHAN5G(5320, 21), /* Channel 64 */ | ||
72 | /* _We_ call this "Middle band" */ | ||
73 | CHAN5G(5500, 22), /* Channel 100 */ | ||
74 | CHAN5G(5520, 23), /* Channel 104 */ | ||
75 | CHAN5G(5540, 24), /* Channel 108 */ | ||
76 | CHAN5G(5560, 25), /* Channel 112 */ | ||
77 | CHAN5G(5580, 26), /* Channel 116 */ | ||
78 | CHAN5G(5600, 27), /* Channel 120 */ | ||
79 | CHAN5G(5620, 28), /* Channel 124 */ | ||
80 | CHAN5G(5640, 29), /* Channel 128 */ | ||
81 | CHAN5G(5660, 30), /* Channel 132 */ | ||
82 | CHAN5G(5680, 31), /* Channel 136 */ | ||
83 | CHAN5G(5700, 32), /* Channel 140 */ | ||
84 | /* _We_ call this UNII 3 */ | ||
85 | CHAN5G(5745, 33), /* Channel 149 */ | ||
86 | CHAN5G(5765, 34), /* Channel 153 */ | ||
87 | CHAN5G(5785, 35), /* Channel 157 */ | ||
88 | CHAN5G(5805, 36), /* Channel 161 */ | ||
89 | CHAN5G(5825, 37), /* Channel 165 */ | ||
90 | }; | ||
91 | |||
54 | /* Atheros hardware rate code addition for short premble */ | 92 | /* Atheros hardware rate code addition for short premble */ |
55 | #define SHPCHECK(__hw_rate, __flags) \ | 93 | #define SHPCHECK(__hw_rate, __flags) \ |
56 | ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0) | 94 | ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0) |
@@ -141,7 +179,7 @@ static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv, | |||
141 | return htc_connect_service(priv->htc, &req, ep_id); | 179 | return htc_connect_service(priv->htc, &req, ep_id); |
142 | } | 180 | } |
143 | 181 | ||
144 | static int ath9k_init_htc_services(struct ath9k_htc_priv *priv) | 182 | static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid) |
145 | { | 183 | { |
146 | int ret; | 184 | int ret; |
147 | 185 | ||
@@ -199,10 +237,33 @@ static int ath9k_init_htc_services(struct ath9k_htc_priv *priv) | |||
199 | if (ret) | 237 | if (ret) |
200 | goto err; | 238 | goto err; |
201 | 239 | ||
240 | /* | ||
241 | * Setup required credits before initializing HTC. | ||
242 | * This is a bit hacky, but, since queuing is done in | ||
243 | * the HIF layer, shouldn't matter much. | ||
244 | */ | ||
245 | |||
246 | switch(devid) { | ||
247 | case 0x9271: | ||
248 | case 0x1006: | ||
249 | priv->htc->credits = 33; | ||
250 | break; | ||
251 | case 0x7010: | ||
252 | priv->htc->credits = 45; | ||
253 | break; | ||
254 | default: | ||
255 | dev_err(priv->dev, "ath9k_htc: Unsupported device id: 0x%x\n", | ||
256 | devid); | ||
257 | goto err; | ||
258 | } | ||
259 | |||
202 | ret = htc_init(priv->htc); | 260 | ret = htc_init(priv->htc); |
203 | if (ret) | 261 | if (ret) |
204 | goto err; | 262 | goto err; |
205 | 263 | ||
264 | dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n", | ||
265 | priv->htc->credits); | ||
266 | |||
206 | return 0; | 267 | return 0; |
207 | 268 | ||
208 | err: | 269 | err: |
@@ -398,17 +459,43 @@ static const struct ath_bus_ops ath9k_usb_bus_ops = { | |||
398 | static void setup_ht_cap(struct ath9k_htc_priv *priv, | 459 | static void setup_ht_cap(struct ath9k_htc_priv *priv, |
399 | struct ieee80211_sta_ht_cap *ht_info) | 460 | struct ieee80211_sta_ht_cap *ht_info) |
400 | { | 461 | { |
462 | struct ath_common *common = ath9k_hw_common(priv->ah); | ||
463 | u8 tx_streams, rx_streams; | ||
464 | int i; | ||
465 | |||
401 | ht_info->ht_supported = true; | 466 | ht_info->ht_supported = true; |
402 | ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | | 467 | ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | |
403 | IEEE80211_HT_CAP_SM_PS | | 468 | IEEE80211_HT_CAP_SM_PS | |
404 | IEEE80211_HT_CAP_SGI_40 | | 469 | IEEE80211_HT_CAP_SGI_40 | |
405 | IEEE80211_HT_CAP_DSSSCCK40; | 470 | IEEE80211_HT_CAP_DSSSCCK40; |
406 | 471 | ||
472 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) | ||
473 | ht_info->cap |= IEEE80211_HT_CAP_SGI_20; | ||
474 | |||
475 | ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); | ||
476 | |||
407 | ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; | 477 | ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
408 | ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; | 478 | ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; |
409 | 479 | ||
410 | memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); | 480 | memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); |
411 | ht_info->mcs.rx_mask[0] = 0xff; | 481 | |
482 | /* ath9k_htc supports only 1 or 2 stream devices */ | ||
483 | tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2); | ||
484 | rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2); | ||
485 | |||
486 | ath_print(common, ATH_DBG_CONFIG, | ||
487 | "TX streams %d, RX streams: %d\n", | ||
488 | tx_streams, rx_streams); | ||
489 | |||
490 | if (tx_streams != rx_streams) { | ||
491 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; | ||
492 | ht_info->mcs.tx_params |= ((tx_streams - 1) << | ||
493 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); | ||
494 | } | ||
495 | |||
496 | for (i = 0; i < rx_streams; i++) | ||
497 | ht_info->mcs.rx_mask[i] = 0xff; | ||
498 | |||
412 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; | 499 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED; |
413 | } | 500 | } |
414 | 501 | ||
@@ -420,6 +507,20 @@ static int ath9k_init_queues(struct ath9k_htc_priv *priv) | |||
420 | for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++) | 507 | for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++) |
421 | priv->hwq_map[i] = -1; | 508 | priv->hwq_map[i] = -1; |
422 | 509 | ||
510 | priv->beaconq = ath9k_hw_beaconq_setup(priv->ah); | ||
511 | if (priv->beaconq == -1) { | ||
512 | ath_print(common, ATH_DBG_FATAL, | ||
513 | "Unable to setup BEACON xmit queue\n"); | ||
514 | goto err; | ||
515 | } | ||
516 | |||
517 | priv->cabq = ath9k_htc_cabq_setup(priv); | ||
518 | if (priv->cabq == -1) { | ||
519 | ath_print(common, ATH_DBG_FATAL, | ||
520 | "Unable to setup CAB xmit queue\n"); | ||
521 | goto err; | ||
522 | } | ||
523 | |||
423 | if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BE)) { | 524 | if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BE)) { |
424 | ath_print(common, ATH_DBG_FATAL, | 525 | ath_print(common, ATH_DBG_FATAL, |
425 | "Unable to setup xmit queue for BE traffic\n"); | 526 | "Unable to setup xmit queue for BE traffic\n"); |
@@ -512,6 +613,17 @@ static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) | |||
512 | priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates = | 613 | priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates = |
513 | ARRAY_SIZE(ath9k_legacy_rates); | 614 | ARRAY_SIZE(ath9k_legacy_rates); |
514 | } | 615 | } |
616 | |||
617 | if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) { | ||
618 | priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels; | ||
619 | priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ; | ||
620 | priv->sbands[IEEE80211_BAND_5GHZ].n_channels = | ||
621 | ARRAY_SIZE(ath9k_5ghz_channels); | ||
622 | priv->sbands[IEEE80211_BAND_5GHZ].bitrates = | ||
623 | ath9k_legacy_rates + 4; | ||
624 | priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates = | ||
625 | ARRAY_SIZE(ath9k_legacy_rates) - 4; | ||
626 | } | ||
515 | } | 627 | } |
516 | 628 | ||
517 | static void ath9k_init_misc(struct ath9k_htc_priv *priv) | 629 | static void ath9k_init_misc(struct ath9k_htc_priv *priv) |
@@ -643,11 +755,17 @@ static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv, | |||
643 | if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) | 755 | if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) |
644 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | 756 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = |
645 | &priv->sbands[IEEE80211_BAND_2GHZ]; | 757 | &priv->sbands[IEEE80211_BAND_2GHZ]; |
758 | if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) | ||
759 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | ||
760 | &priv->sbands[IEEE80211_BAND_5GHZ]; | ||
646 | 761 | ||
647 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) { | 762 | if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) { |
648 | if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) | 763 | if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) |
649 | setup_ht_cap(priv, | 764 | setup_ht_cap(priv, |
650 | &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap); | 765 | &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap); |
766 | if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) | ||
767 | setup_ht_cap(priv, | ||
768 | &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap); | ||
651 | } | 769 | } |
652 | 770 | ||
653 | SET_IEEE80211_PERM_ADDR(hw, common->macaddr); | 771 | SET_IEEE80211_PERM_ADDR(hw, common->macaddr); |
@@ -747,7 +865,7 @@ int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, | |||
747 | goto err_free; | 865 | goto err_free; |
748 | } | 866 | } |
749 | 867 | ||
750 | ret = ath9k_init_htc_services(priv); | 868 | ret = ath9k_init_htc_services(priv, devid); |
751 | if (ret) | 869 | if (ret) |
752 | goto err_init; | 870 | goto err_init; |
753 | 871 | ||
@@ -790,7 +908,8 @@ int ath9k_htc_resume(struct htc_target *htc_handle) | |||
790 | if (ret) | 908 | if (ret) |
791 | return ret; | 909 | return ret; |
792 | 910 | ||
793 | ret = ath9k_init_htc_services(htc_handle->drv_priv); | 911 | ret = ath9k_init_htc_services(htc_handle->drv_priv, |
912 | htc_handle->drv_priv->ah->hw_version.devid); | ||
794 | return ret; | 913 | return ret; |
795 | } | 914 | } |
796 | #endif | 915 | #endif |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c index 9d371c18eb41..7aefbc638770 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c | |||
@@ -325,133 +325,122 @@ static int ath9k_htc_update_cap_target(struct ath9k_htc_priv *priv) | |||
325 | tcap.flags_ext = 0x80601000; | 325 | tcap.flags_ext = 0x80601000; |
326 | tcap.ampdu_limit = 0xffff0000; | 326 | tcap.ampdu_limit = 0xffff0000; |
327 | tcap.ampdu_subframes = 20; | 327 | tcap.ampdu_subframes = 20; |
328 | tcap.tx_chainmask_legacy = 1; | 328 | tcap.tx_chainmask_legacy = priv->ah->caps.tx_chainmask; |
329 | tcap.protmode = 1; | 329 | tcap.protmode = 1; |
330 | tcap.tx_chainmask = 1; | 330 | tcap.tx_chainmask = priv->ah->caps.tx_chainmask; |
331 | 331 | ||
332 | WMI_CMD_BUF(WMI_TARGET_IC_UPDATE_CMDID, &tcap); | 332 | WMI_CMD_BUF(WMI_TARGET_IC_UPDATE_CMDID, &tcap); |
333 | 333 | ||
334 | return ret; | 334 | return ret; |
335 | } | 335 | } |
336 | 336 | ||
337 | static int ath9k_htc_init_rate(struct ath9k_htc_priv *priv, | 337 | static void ath9k_htc_setup_rate(struct ath9k_htc_priv *priv, |
338 | struct ieee80211_vif *vif, | 338 | struct ieee80211_sta *sta, |
339 | struct ieee80211_sta *sta) | 339 | struct ath9k_htc_target_rate *trate) |
340 | { | 340 | { |
341 | struct ath_common *common = ath9k_hw_common(priv->ah); | ||
342 | struct ath9k_htc_sta *ista = (struct ath9k_htc_sta *) sta->drv_priv; | 341 | struct ath9k_htc_sta *ista = (struct ath9k_htc_sta *) sta->drv_priv; |
343 | struct ieee80211_supported_band *sband; | 342 | struct ieee80211_supported_band *sband; |
344 | struct ath9k_htc_target_rate trate; | ||
345 | u32 caps = 0; | 343 | u32 caps = 0; |
346 | u8 cmd_rsp; | 344 | int i, j; |
347 | int i, j, ret; | ||
348 | |||
349 | memset(&trate, 0, sizeof(trate)); | ||
350 | 345 | ||
351 | /* Only 2GHz is supported */ | 346 | sband = priv->hw->wiphy->bands[priv->hw->conf.channel->band]; |
352 | sband = priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ]; | ||
353 | 347 | ||
354 | for (i = 0, j = 0; i < sband->n_bitrates; i++) { | 348 | for (i = 0, j = 0; i < sband->n_bitrates; i++) { |
355 | if (sta->supp_rates[sband->band] & BIT(i)) { | 349 | if (sta->supp_rates[sband->band] & BIT(i)) { |
356 | priv->tgt_rate.rates.legacy_rates.rs_rates[j] | 350 | trate->rates.legacy_rates.rs_rates[j] |
357 | = (sband->bitrates[i].bitrate * 2) / 10; | 351 | = (sband->bitrates[i].bitrate * 2) / 10; |
358 | j++; | 352 | j++; |
359 | } | 353 | } |
360 | } | 354 | } |
361 | priv->tgt_rate.rates.legacy_rates.rs_nrates = j; | 355 | trate->rates.legacy_rates.rs_nrates = j; |
362 | 356 | ||
363 | if (sta->ht_cap.ht_supported) { | 357 | if (sta->ht_cap.ht_supported) { |
364 | for (i = 0, j = 0; i < 77; i++) { | 358 | for (i = 0, j = 0; i < 77; i++) { |
365 | if (sta->ht_cap.mcs.rx_mask[i/8] & (1<<(i%8))) | 359 | if (sta->ht_cap.mcs.rx_mask[i/8] & (1<<(i%8))) |
366 | priv->tgt_rate.rates.ht_rates.rs_rates[j++] = i; | 360 | trate->rates.ht_rates.rs_rates[j++] = i; |
367 | if (j == ATH_HTC_RATE_MAX) | 361 | if (j == ATH_HTC_RATE_MAX) |
368 | break; | 362 | break; |
369 | } | 363 | } |
370 | priv->tgt_rate.rates.ht_rates.rs_nrates = j; | 364 | trate->rates.ht_rates.rs_nrates = j; |
371 | 365 | ||
372 | caps = WLAN_RC_HT_FLAG; | 366 | caps = WLAN_RC_HT_FLAG; |
367 | if (priv->ah->caps.tx_chainmask != 1 && | ||
368 | ath9k_hw_getcapability(priv->ah, ATH9K_CAP_DS, 0, NULL)) { | ||
369 | if (sta->ht_cap.mcs.rx_mask[1]) | ||
370 | caps |= WLAN_RC_DS_FLAG; | ||
371 | } | ||
373 | if (sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40) | 372 | if (sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40) |
374 | caps |= WLAN_RC_40_FLAG; | 373 | caps |= WLAN_RC_40_FLAG; |
375 | if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) | 374 | if (conf_is_ht40(&priv->hw->conf) && |
375 | (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)) | ||
376 | caps |= WLAN_RC_SGI_FLAG; | ||
377 | else if (conf_is_ht20(&priv->hw->conf) && | ||
378 | (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20)) | ||
376 | caps |= WLAN_RC_SGI_FLAG; | 379 | caps |= WLAN_RC_SGI_FLAG; |
377 | |||
378 | } | 380 | } |
379 | 381 | ||
380 | priv->tgt_rate.sta_index = ista->index; | 382 | trate->sta_index = ista->index; |
381 | priv->tgt_rate.isnew = 1; | 383 | trate->isnew = 1; |
382 | trate = priv->tgt_rate; | 384 | trate->capflags = cpu_to_be32(caps); |
383 | priv->tgt_rate.capflags = cpu_to_be32(caps); | 385 | } |
384 | trate.capflags = cpu_to_be32(caps); | ||
385 | 386 | ||
386 | WMI_CMD_BUF(WMI_RC_RATE_UPDATE_CMDID, &trate); | 387 | static int ath9k_htc_send_rate_cmd(struct ath9k_htc_priv *priv, |
388 | struct ath9k_htc_target_rate *trate) | ||
389 | { | ||
390 | struct ath_common *common = ath9k_hw_common(priv->ah); | ||
391 | int ret; | ||
392 | u8 cmd_rsp; | ||
393 | |||
394 | WMI_CMD_BUF(WMI_RC_RATE_UPDATE_CMDID, trate); | ||
387 | if (ret) { | 395 | if (ret) { |
388 | ath_print(common, ATH_DBG_FATAL, | 396 | ath_print(common, ATH_DBG_FATAL, |
389 | "Unable to initialize Rate information on target\n"); | 397 | "Unable to initialize Rate information on target\n"); |
390 | return ret; | ||
391 | } | 398 | } |
392 | 399 | ||
393 | ath_print(common, ATH_DBG_CONFIG, | 400 | return ret; |
394 | "Updated target STA: %pM (caps: 0x%x)\n", sta->addr, caps); | ||
395 | return 0; | ||
396 | } | 401 | } |
397 | 402 | ||
398 | static bool check_rc_update(struct ieee80211_hw *hw, bool *cw40) | 403 | static void ath9k_htc_init_rate(struct ath9k_htc_priv *priv, |
404 | struct ieee80211_sta *sta) | ||
399 | { | 405 | { |
400 | struct ath9k_htc_priv *priv = hw->priv; | 406 | struct ath_common *common = ath9k_hw_common(priv->ah); |
401 | struct ieee80211_conf *conf = &hw->conf; | 407 | struct ath9k_htc_target_rate trate; |
402 | 408 | int ret; | |
403 | if (!conf_is_ht(conf)) | ||
404 | return false; | ||
405 | |||
406 | if (!(priv->op_flags & OP_ASSOCIATED) || | ||
407 | (priv->op_flags & OP_SCANNING)) | ||
408 | return false; | ||
409 | 409 | ||
410 | if (conf_is_ht40(conf)) { | 410 | memset(&trate, 0, sizeof(struct ath9k_htc_target_rate)); |
411 | if (priv->ah->curchan->chanmode & | 411 | ath9k_htc_setup_rate(priv, sta, &trate); |
412 | (CHANNEL_HT40PLUS | CHANNEL_HT40MINUS)) { | 412 | ret = ath9k_htc_send_rate_cmd(priv, &trate); |
413 | return false; | 413 | if (!ret) |
414 | } else { | 414 | ath_print(common, ATH_DBG_CONFIG, |
415 | *cw40 = true; | 415 | "Updated target sta: %pM, rate caps: 0x%X\n", |
416 | return true; | 416 | sta->addr, be32_to_cpu(trate.capflags)); |
417 | } | ||
418 | } else { /* ht20 */ | ||
419 | if (priv->ah->curchan->chanmode & CHANNEL_HT20) | ||
420 | return false; | ||
421 | else | ||
422 | return true; | ||
423 | } | ||
424 | } | 417 | } |
425 | 418 | ||
426 | static void ath9k_htc_rc_update(struct ath9k_htc_priv *priv, bool is_cw40) | 419 | static void ath9k_htc_update_rate(struct ath9k_htc_priv *priv, |
420 | struct ieee80211_vif *vif, | ||
421 | struct ieee80211_bss_conf *bss_conf) | ||
427 | { | 422 | { |
428 | struct ath9k_htc_target_rate trate; | ||
429 | struct ath_common *common = ath9k_hw_common(priv->ah); | 423 | struct ath_common *common = ath9k_hw_common(priv->ah); |
424 | struct ath9k_htc_target_rate trate; | ||
425 | struct ieee80211_sta *sta; | ||
430 | int ret; | 426 | int ret; |
431 | u32 caps = be32_to_cpu(priv->tgt_rate.capflags); | ||
432 | u8 cmd_rsp; | ||
433 | |||
434 | memset(&trate, 0, sizeof(trate)); | ||
435 | 427 | ||
436 | trate = priv->tgt_rate; | 428 | memset(&trate, 0, sizeof(struct ath9k_htc_target_rate)); |
437 | |||
438 | if (is_cw40) | ||
439 | caps |= WLAN_RC_40_FLAG; | ||
440 | else | ||
441 | caps &= ~WLAN_RC_40_FLAG; | ||
442 | 429 | ||
443 | priv->tgt_rate.capflags = cpu_to_be32(caps); | 430 | rcu_read_lock(); |
444 | trate.capflags = cpu_to_be32(caps); | 431 | sta = ieee80211_find_sta(vif, bss_conf->bssid); |
445 | 432 | if (!sta) { | |
446 | WMI_CMD_BUF(WMI_RC_RATE_UPDATE_CMDID, &trate); | 433 | rcu_read_unlock(); |
447 | if (ret) { | ||
448 | ath_print(common, ATH_DBG_FATAL, | ||
449 | "Unable to update Rate information on target\n"); | ||
450 | return; | 434 | return; |
451 | } | 435 | } |
436 | ath9k_htc_setup_rate(priv, sta, &trate); | ||
437 | rcu_read_unlock(); | ||
452 | 438 | ||
453 | ath_print(common, ATH_DBG_CONFIG, "Rate control updated with " | 439 | ret = ath9k_htc_send_rate_cmd(priv, &trate); |
454 | "caps:0x%x on target\n", priv->tgt_rate.capflags); | 440 | if (!ret) |
441 | ath_print(common, ATH_DBG_CONFIG, | ||
442 | "Updated target sta: %pM, rate caps: 0x%X\n", | ||
443 | bss_conf->bssid, be32_to_cpu(trate.capflags)); | ||
455 | } | 444 | } |
456 | 445 | ||
457 | static int ath9k_htc_aggr_oper(struct ath9k_htc_priv *priv, | 446 | static int ath9k_htc_aggr_oper(struct ath9k_htc_priv *priv, |
@@ -617,6 +606,19 @@ static ssize_t read_file_xmit(struct file *file, char __user *user_buf, | |||
617 | "%20s : %10u\n", "SKBs dropped", | 606 | "%20s : %10u\n", "SKBs dropped", |
618 | priv->debug.tx_stats.skb_dropped); | 607 | priv->debug.tx_stats.skb_dropped); |
619 | 608 | ||
609 | len += snprintf(buf + len, sizeof(buf) - len, | ||
610 | "%20s : %10u\n", "BE queued", | ||
611 | priv->debug.tx_stats.queue_stats[WME_AC_BE]); | ||
612 | len += snprintf(buf + len, sizeof(buf) - len, | ||
613 | "%20s : %10u\n", "BK queued", | ||
614 | priv->debug.tx_stats.queue_stats[WME_AC_BK]); | ||
615 | len += snprintf(buf + len, sizeof(buf) - len, | ||
616 | "%20s : %10u\n", "VI queued", | ||
617 | priv->debug.tx_stats.queue_stats[WME_AC_VI]); | ||
618 | len += snprintf(buf + len, sizeof(buf) - len, | ||
619 | "%20s : %10u\n", "VO queued", | ||
620 | priv->debug.tx_stats.queue_stats[WME_AC_VO]); | ||
621 | |||
620 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 622 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
621 | } | 623 | } |
622 | 624 | ||
@@ -1054,6 +1056,95 @@ void ath9k_start_rfkill_poll(struct ath9k_htc_priv *priv) | |||
1054 | wiphy_rfkill_start_polling(priv->hw->wiphy); | 1056 | wiphy_rfkill_start_polling(priv->hw->wiphy); |
1055 | } | 1057 | } |
1056 | 1058 | ||
1059 | static void ath9k_htc_radio_enable(struct ieee80211_hw *hw) | ||
1060 | { | ||
1061 | struct ath9k_htc_priv *priv = hw->priv; | ||
1062 | struct ath_hw *ah = priv->ah; | ||
1063 | struct ath_common *common = ath9k_hw_common(ah); | ||
1064 | int ret; | ||
1065 | u8 cmd_rsp; | ||
1066 | |||
1067 | if (!ah->curchan) | ||
1068 | ah->curchan = ath9k_cmn_get_curchannel(hw, ah); | ||
1069 | |||
1070 | /* Reset the HW */ | ||
1071 | ret = ath9k_hw_reset(ah, ah->curchan, false); | ||
1072 | if (ret) { | ||
1073 | ath_print(common, ATH_DBG_FATAL, | ||
1074 | "Unable to reset hardware; reset status %d " | ||
1075 | "(freq %u MHz)\n", ret, ah->curchan->channel); | ||
1076 | } | ||
1077 | |||
1078 | ath_update_txpow(priv); | ||
1079 | |||
1080 | /* Start RX */ | ||
1081 | WMI_CMD(WMI_START_RECV_CMDID); | ||
1082 | ath9k_host_rx_init(priv); | ||
1083 | |||
1084 | /* Start TX */ | ||
1085 | htc_start(priv->htc); | ||
1086 | spin_lock_bh(&priv->tx_lock); | ||
1087 | priv->tx_queues_stop = false; | ||
1088 | spin_unlock_bh(&priv->tx_lock); | ||
1089 | ieee80211_wake_queues(hw); | ||
1090 | |||
1091 | WMI_CMD(WMI_ENABLE_INTR_CMDID); | ||
1092 | |||
1093 | /* Enable LED */ | ||
1094 | ath9k_hw_cfg_output(ah, ah->led_pin, | ||
1095 | AR_GPIO_OUTPUT_MUX_AS_OUTPUT); | ||
1096 | ath9k_hw_set_gpio(ah, ah->led_pin, 0); | ||
1097 | } | ||
1098 | |||
1099 | static void ath9k_htc_radio_disable(struct ieee80211_hw *hw) | ||
1100 | { | ||
1101 | struct ath9k_htc_priv *priv = hw->priv; | ||
1102 | struct ath_hw *ah = priv->ah; | ||
1103 | struct ath_common *common = ath9k_hw_common(ah); | ||
1104 | int ret; | ||
1105 | u8 cmd_rsp; | ||
1106 | |||
1107 | ath9k_htc_ps_wakeup(priv); | ||
1108 | |||
1109 | /* Disable LED */ | ||
1110 | ath9k_hw_set_gpio(ah, ah->led_pin, 1); | ||
1111 | ath9k_hw_cfg_gpio_input(ah, ah->led_pin); | ||
1112 | |||
1113 | WMI_CMD(WMI_DISABLE_INTR_CMDID); | ||
1114 | |||
1115 | /* Stop TX */ | ||
1116 | ieee80211_stop_queues(hw); | ||
1117 | htc_stop(priv->htc); | ||
1118 | WMI_CMD(WMI_DRAIN_TXQ_ALL_CMDID); | ||
1119 | skb_queue_purge(&priv->tx_queue); | ||
1120 | |||
1121 | /* Stop RX */ | ||
1122 | WMI_CMD(WMI_STOP_RECV_CMDID); | ||
1123 | |||
1124 | /* | ||
1125 | * The MIB counters have to be disabled here, | ||
1126 | * since the target doesn't do it. | ||
1127 | */ | ||
1128 | ath9k_hw_disable_mib_counters(ah); | ||
1129 | |||
1130 | if (!ah->curchan) | ||
1131 | ah->curchan = ath9k_cmn_get_curchannel(hw, ah); | ||
1132 | |||
1133 | /* Reset the HW */ | ||
1134 | ret = ath9k_hw_reset(ah, ah->curchan, false); | ||
1135 | if (ret) { | ||
1136 | ath_print(common, ATH_DBG_FATAL, | ||
1137 | "Unable to reset hardware; reset status %d " | ||
1138 | "(freq %u MHz)\n", ret, ah->curchan->channel); | ||
1139 | } | ||
1140 | |||
1141 | /* Disable the PHY */ | ||
1142 | ath9k_hw_phy_disable(ah); | ||
1143 | |||
1144 | ath9k_htc_ps_restore(priv); | ||
1145 | ath9k_htc_setpower(priv, ATH9K_PM_FULL_SLEEP); | ||
1146 | } | ||
1147 | |||
1057 | /**********************/ | 1148 | /**********************/ |
1058 | /* mac80211 Callbacks */ | 1149 | /* mac80211 Callbacks */ |
1059 | /**********************/ | 1150 | /**********************/ |
@@ -1099,7 +1190,7 @@ fail_tx: | |||
1099 | return 0; | 1190 | return 0; |
1100 | } | 1191 | } |
1101 | 1192 | ||
1102 | static int ath9k_htc_radio_enable(struct ieee80211_hw *hw, bool led) | 1193 | static int ath9k_htc_start(struct ieee80211_hw *hw) |
1103 | { | 1194 | { |
1104 | struct ath9k_htc_priv *priv = hw->priv; | 1195 | struct ath9k_htc_priv *priv = hw->priv; |
1105 | struct ath_hw *ah = priv->ah; | 1196 | struct ath_hw *ah = priv->ah; |
@@ -1111,10 +1202,16 @@ static int ath9k_htc_radio_enable(struct ieee80211_hw *hw, bool led) | |||
1111 | __be16 htc_mode; | 1202 | __be16 htc_mode; |
1112 | u8 cmd_rsp; | 1203 | u8 cmd_rsp; |
1113 | 1204 | ||
1205 | mutex_lock(&priv->mutex); | ||
1206 | |||
1114 | ath_print(common, ATH_DBG_CONFIG, | 1207 | ath_print(common, ATH_DBG_CONFIG, |
1115 | "Starting driver with initial channel: %d MHz\n", | 1208 | "Starting driver with initial channel: %d MHz\n", |
1116 | curchan->center_freq); | 1209 | curchan->center_freq); |
1117 | 1210 | ||
1211 | /* Ensure that HW is awake before flushing RX */ | ||
1212 | ath9k_htc_setpower(priv, ATH9K_PM_AWAKE); | ||
1213 | WMI_CMD(WMI_FLUSH_RECV_CMDID); | ||
1214 | |||
1118 | /* setup initial channel */ | 1215 | /* setup initial channel */ |
1119 | init_channel = ath9k_cmn_get_curchannel(hw, ah); | 1216 | init_channel = ath9k_cmn_get_curchannel(hw, ah); |
1120 | 1217 | ||
@@ -1127,6 +1224,7 @@ static int ath9k_htc_radio_enable(struct ieee80211_hw *hw, bool led) | |||
1127 | ath_print(common, ATH_DBG_FATAL, | 1224 | ath_print(common, ATH_DBG_FATAL, |
1128 | "Unable to reset hardware; reset status %d " | 1225 | "Unable to reset hardware; reset status %d " |
1129 | "(freq %u MHz)\n", ret, curchan->center_freq); | 1226 | "(freq %u MHz)\n", ret, curchan->center_freq); |
1227 | mutex_unlock(&priv->mutex); | ||
1130 | return ret; | 1228 | return ret; |
1131 | } | 1229 | } |
1132 | 1230 | ||
@@ -1147,31 +1245,14 @@ static int ath9k_htc_radio_enable(struct ieee80211_hw *hw, bool led) | |||
1147 | priv->tx_queues_stop = false; | 1245 | priv->tx_queues_stop = false; |
1148 | spin_unlock_bh(&priv->tx_lock); | 1246 | spin_unlock_bh(&priv->tx_lock); |
1149 | 1247 | ||
1150 | if (led) { | ||
1151 | /* Enable LED */ | ||
1152 | ath9k_hw_cfg_output(ah, ah->led_pin, | ||
1153 | AR_GPIO_OUTPUT_MUX_AS_OUTPUT); | ||
1154 | ath9k_hw_set_gpio(ah, ah->led_pin, 0); | ||
1155 | } | ||
1156 | |||
1157 | ieee80211_wake_queues(hw); | 1248 | ieee80211_wake_queues(hw); |
1158 | 1249 | ||
1159 | return ret; | ||
1160 | } | ||
1161 | |||
1162 | static int ath9k_htc_start(struct ieee80211_hw *hw) | ||
1163 | { | ||
1164 | struct ath9k_htc_priv *priv = hw->priv; | ||
1165 | int ret = 0; | ||
1166 | |||
1167 | mutex_lock(&priv->mutex); | ||
1168 | ret = ath9k_htc_radio_enable(hw, false); | ||
1169 | mutex_unlock(&priv->mutex); | 1250 | mutex_unlock(&priv->mutex); |
1170 | 1251 | ||
1171 | return ret; | 1252 | return ret; |
1172 | } | 1253 | } |
1173 | 1254 | ||
1174 | static void ath9k_htc_radio_disable(struct ieee80211_hw *hw, bool led) | 1255 | static void ath9k_htc_stop(struct ieee80211_hw *hw) |
1175 | { | 1256 | { |
1176 | struct ath9k_htc_priv *priv = hw->priv; | 1257 | struct ath9k_htc_priv *priv = hw->priv; |
1177 | struct ath_hw *ah = priv->ah; | 1258 | struct ath_hw *ah = priv->ah; |
@@ -1179,17 +1260,14 @@ static void ath9k_htc_radio_disable(struct ieee80211_hw *hw, bool led) | |||
1179 | int ret = 0; | 1260 | int ret = 0; |
1180 | u8 cmd_rsp; | 1261 | u8 cmd_rsp; |
1181 | 1262 | ||
1263 | mutex_lock(&priv->mutex); | ||
1264 | |||
1182 | if (priv->op_flags & OP_INVALID) { | 1265 | if (priv->op_flags & OP_INVALID) { |
1183 | ath_print(common, ATH_DBG_ANY, "Device not present\n"); | 1266 | ath_print(common, ATH_DBG_ANY, "Device not present\n"); |
1267 | mutex_unlock(&priv->mutex); | ||
1184 | return; | 1268 | return; |
1185 | } | 1269 | } |
1186 | 1270 | ||
1187 | if (led) { | ||
1188 | /* Disable LED */ | ||
1189 | ath9k_hw_set_gpio(ah, ah->led_pin, 1); | ||
1190 | ath9k_hw_cfg_gpio_input(ah, ah->led_pin); | ||
1191 | } | ||
1192 | |||
1193 | /* Cancel all the running timers/work .. */ | 1271 | /* Cancel all the running timers/work .. */ |
1194 | cancel_work_sync(&priv->ps_work); | 1272 | cancel_work_sync(&priv->ps_work); |
1195 | cancel_delayed_work_sync(&priv->ath9k_ani_work); | 1273 | cancel_delayed_work_sync(&priv->ath9k_ani_work); |
@@ -1202,12 +1280,6 @@ static void ath9k_htc_radio_disable(struct ieee80211_hw *hw, bool led) | |||
1202 | WMI_CMD(WMI_DISABLE_INTR_CMDID); | 1280 | WMI_CMD(WMI_DISABLE_INTR_CMDID); |
1203 | WMI_CMD(WMI_DRAIN_TXQ_ALL_CMDID); | 1281 | WMI_CMD(WMI_DRAIN_TXQ_ALL_CMDID); |
1204 | WMI_CMD(WMI_STOP_RECV_CMDID); | 1282 | WMI_CMD(WMI_STOP_RECV_CMDID); |
1205 | ath9k_hw_phy_disable(ah); | ||
1206 | ath9k_hw_disable(ah); | ||
1207 | ath9k_hw_configpcipowersave(ah, 1, 1); | ||
1208 | ath9k_htc_ps_restore(priv); | ||
1209 | ath9k_htc_setpower(priv, ATH9K_PM_FULL_SLEEP); | ||
1210 | |||
1211 | skb_queue_purge(&priv->tx_queue); | 1283 | skb_queue_purge(&priv->tx_queue); |
1212 | 1284 | ||
1213 | /* Remove monitor interface here */ | 1285 | /* Remove monitor interface here */ |
@@ -1220,21 +1292,18 @@ static void ath9k_htc_radio_disable(struct ieee80211_hw *hw, bool led) | |||
1220 | "Monitor interface removed\n"); | 1292 | "Monitor interface removed\n"); |
1221 | } | 1293 | } |
1222 | 1294 | ||
1295 | ath9k_hw_phy_disable(ah); | ||
1296 | ath9k_hw_disable(ah); | ||
1297 | ath9k_hw_configpcipowersave(ah, 1, 1); | ||
1298 | ath9k_htc_ps_restore(priv); | ||
1299 | ath9k_htc_setpower(priv, ATH9K_PM_FULL_SLEEP); | ||
1300 | |||
1223 | priv->op_flags |= OP_INVALID; | 1301 | priv->op_flags |= OP_INVALID; |
1224 | 1302 | ||
1225 | ath_print(common, ATH_DBG_CONFIG, "Driver halt\n"); | 1303 | ath_print(common, ATH_DBG_CONFIG, "Driver halt\n"); |
1226 | } | ||
1227 | |||
1228 | static void ath9k_htc_stop(struct ieee80211_hw *hw) | ||
1229 | { | ||
1230 | struct ath9k_htc_priv *priv = hw->priv; | ||
1231 | |||
1232 | mutex_lock(&priv->mutex); | ||
1233 | ath9k_htc_radio_disable(hw, false); | ||
1234 | mutex_unlock(&priv->mutex); | 1304 | mutex_unlock(&priv->mutex); |
1235 | } | 1305 | } |
1236 | 1306 | ||
1237 | |||
1238 | static int ath9k_htc_add_interface(struct ieee80211_hw *hw, | 1307 | static int ath9k_htc_add_interface(struct ieee80211_hw *hw, |
1239 | struct ieee80211_vif *vif) | 1308 | struct ieee80211_vif *vif) |
1240 | { | 1309 | { |
@@ -1302,6 +1371,7 @@ static int ath9k_htc_add_interface(struct ieee80211_hw *hw, | |||
1302 | out: | 1371 | out: |
1303 | ath9k_htc_ps_restore(priv); | 1372 | ath9k_htc_ps_restore(priv); |
1304 | mutex_unlock(&priv->mutex); | 1373 | mutex_unlock(&priv->mutex); |
1374 | |||
1305 | return ret; | 1375 | return ret; |
1306 | } | 1376 | } |
1307 | 1377 | ||
@@ -1318,6 +1388,7 @@ static void ath9k_htc_remove_interface(struct ieee80211_hw *hw, | |||
1318 | ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n"); | 1388 | ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n"); |
1319 | 1389 | ||
1320 | mutex_lock(&priv->mutex); | 1390 | mutex_lock(&priv->mutex); |
1391 | ath9k_htc_ps_wakeup(priv); | ||
1321 | 1392 | ||
1322 | memset(&hvif, 0, sizeof(struct ath9k_htc_target_vif)); | 1393 | memset(&hvif, 0, sizeof(struct ath9k_htc_target_vif)); |
1323 | memcpy(&hvif.myaddr, vif->addr, ETH_ALEN); | 1394 | memcpy(&hvif.myaddr, vif->addr, ETH_ALEN); |
@@ -1328,6 +1399,7 @@ static void ath9k_htc_remove_interface(struct ieee80211_hw *hw, | |||
1328 | ath9k_htc_remove_station(priv, vif, NULL); | 1399 | ath9k_htc_remove_station(priv, vif, NULL); |
1329 | priv->vif = NULL; | 1400 | priv->vif = NULL; |
1330 | 1401 | ||
1402 | ath9k_htc_ps_restore(priv); | ||
1331 | mutex_unlock(&priv->mutex); | 1403 | mutex_unlock(&priv->mutex); |
1332 | } | 1404 | } |
1333 | 1405 | ||
@@ -1343,30 +1415,27 @@ static int ath9k_htc_config(struct ieee80211_hw *hw, u32 changed) | |||
1343 | bool enable_radio = false; | 1415 | bool enable_radio = false; |
1344 | bool idle = !!(conf->flags & IEEE80211_CONF_IDLE); | 1416 | bool idle = !!(conf->flags & IEEE80211_CONF_IDLE); |
1345 | 1417 | ||
1418 | mutex_lock(&priv->htc_pm_lock); | ||
1346 | if (!idle && priv->ps_idle) | 1419 | if (!idle && priv->ps_idle) |
1347 | enable_radio = true; | 1420 | enable_radio = true; |
1348 | |||
1349 | priv->ps_idle = idle; | 1421 | priv->ps_idle = idle; |
1422 | mutex_unlock(&priv->htc_pm_lock); | ||
1350 | 1423 | ||
1351 | if (enable_radio) { | 1424 | if (enable_radio) { |
1352 | ath9k_htc_setpower(priv, ATH9K_PM_AWAKE); | ||
1353 | ath9k_htc_radio_enable(hw, true); | ||
1354 | ath_print(common, ATH_DBG_CONFIG, | 1425 | ath_print(common, ATH_DBG_CONFIG, |
1355 | "not-idle: enabling radio\n"); | 1426 | "not-idle: enabling radio\n"); |
1427 | ath9k_htc_setpower(priv, ATH9K_PM_AWAKE); | ||
1428 | ath9k_htc_radio_enable(hw); | ||
1356 | } | 1429 | } |
1357 | } | 1430 | } |
1358 | 1431 | ||
1359 | if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { | 1432 | if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { |
1360 | struct ieee80211_channel *curchan = hw->conf.channel; | 1433 | struct ieee80211_channel *curchan = hw->conf.channel; |
1361 | int pos = curchan->hw_value; | 1434 | int pos = curchan->hw_value; |
1362 | bool is_cw40 = false; | ||
1363 | 1435 | ||
1364 | ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n", | 1436 | ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n", |
1365 | curchan->center_freq); | 1437 | curchan->center_freq); |
1366 | 1438 | ||
1367 | if (check_rc_update(hw, &is_cw40)) | ||
1368 | ath9k_htc_rc_update(priv, is_cw40); | ||
1369 | |||
1370 | ath9k_cmn_update_ichannel(hw, &priv->ah->channels[pos]); | 1439 | ath9k_cmn_update_ichannel(hw, &priv->ah->channels[pos]); |
1371 | 1440 | ||
1372 | if (ath9k_htc_set_channel(priv, hw, &priv->ah->channels[pos]) < 0) { | 1441 | if (ath9k_htc_set_channel(priv, hw, &priv->ah->channels[pos]) < 0) { |
@@ -1399,14 +1468,21 @@ static int ath9k_htc_config(struct ieee80211_hw *hw, u32 changed) | |||
1399 | } | 1468 | } |
1400 | } | 1469 | } |
1401 | 1470 | ||
1402 | if (priv->ps_idle) { | 1471 | if (changed & IEEE80211_CONF_CHANGE_IDLE) { |
1472 | mutex_lock(&priv->htc_pm_lock); | ||
1473 | if (!priv->ps_idle) { | ||
1474 | mutex_unlock(&priv->htc_pm_lock); | ||
1475 | goto out; | ||
1476 | } | ||
1477 | mutex_unlock(&priv->htc_pm_lock); | ||
1478 | |||
1403 | ath_print(common, ATH_DBG_CONFIG, | 1479 | ath_print(common, ATH_DBG_CONFIG, |
1404 | "idle: disabling radio\n"); | 1480 | "idle: disabling radio\n"); |
1405 | ath9k_htc_radio_disable(hw, true); | 1481 | ath9k_htc_radio_disable(hw); |
1406 | } | 1482 | } |
1407 | 1483 | ||
1484 | out: | ||
1408 | mutex_unlock(&priv->mutex); | 1485 | mutex_unlock(&priv->mutex); |
1409 | |||
1410 | return 0; | 1486 | return 0; |
1411 | } | 1487 | } |
1412 | 1488 | ||
@@ -1428,8 +1504,8 @@ static void ath9k_htc_configure_filter(struct ieee80211_hw *hw, | |||
1428 | u32 rfilt; | 1504 | u32 rfilt; |
1429 | 1505 | ||
1430 | mutex_lock(&priv->mutex); | 1506 | mutex_lock(&priv->mutex); |
1431 | |||
1432 | ath9k_htc_ps_wakeup(priv); | 1507 | ath9k_htc_ps_wakeup(priv); |
1508 | |||
1433 | changed_flags &= SUPPORTED_FILTERS; | 1509 | changed_flags &= SUPPORTED_FILTERS; |
1434 | *total_flags &= SUPPORTED_FILTERS; | 1510 | *total_flags &= SUPPORTED_FILTERS; |
1435 | 1511 | ||
@@ -1444,30 +1520,38 @@ static void ath9k_htc_configure_filter(struct ieee80211_hw *hw, | |||
1444 | mutex_unlock(&priv->mutex); | 1520 | mutex_unlock(&priv->mutex); |
1445 | } | 1521 | } |
1446 | 1522 | ||
1447 | static void ath9k_htc_sta_notify(struct ieee80211_hw *hw, | 1523 | static int ath9k_htc_sta_add(struct ieee80211_hw *hw, |
1448 | struct ieee80211_vif *vif, | 1524 | struct ieee80211_vif *vif, |
1449 | enum sta_notify_cmd cmd, | 1525 | struct ieee80211_sta *sta) |
1450 | struct ieee80211_sta *sta) | ||
1451 | { | 1526 | { |
1452 | struct ath9k_htc_priv *priv = hw->priv; | 1527 | struct ath9k_htc_priv *priv = hw->priv; |
1453 | int ret; | 1528 | int ret; |
1454 | 1529 | ||
1455 | mutex_lock(&priv->mutex); | 1530 | mutex_lock(&priv->mutex); |
1531 | ath9k_htc_ps_wakeup(priv); | ||
1532 | ret = ath9k_htc_add_station(priv, vif, sta); | ||
1533 | if (!ret) | ||
1534 | ath9k_htc_init_rate(priv, sta); | ||
1535 | ath9k_htc_ps_restore(priv); | ||
1536 | mutex_unlock(&priv->mutex); | ||
1456 | 1537 | ||
1457 | switch (cmd) { | 1538 | return ret; |
1458 | case STA_NOTIFY_ADD: | 1539 | } |
1459 | ret = ath9k_htc_add_station(priv, vif, sta); | ||
1460 | if (!ret) | ||
1461 | ath9k_htc_init_rate(priv, vif, sta); | ||
1462 | break; | ||
1463 | case STA_NOTIFY_REMOVE: | ||
1464 | ath9k_htc_remove_station(priv, vif, sta); | ||
1465 | break; | ||
1466 | default: | ||
1467 | break; | ||
1468 | } | ||
1469 | 1540 | ||
1541 | static int ath9k_htc_sta_remove(struct ieee80211_hw *hw, | ||
1542 | struct ieee80211_vif *vif, | ||
1543 | struct ieee80211_sta *sta) | ||
1544 | { | ||
1545 | struct ath9k_htc_priv *priv = hw->priv; | ||
1546 | int ret; | ||
1547 | |||
1548 | mutex_lock(&priv->mutex); | ||
1549 | ath9k_htc_ps_wakeup(priv); | ||
1550 | ret = ath9k_htc_remove_station(priv, vif, sta); | ||
1551 | ath9k_htc_ps_restore(priv); | ||
1470 | mutex_unlock(&priv->mutex); | 1552 | mutex_unlock(&priv->mutex); |
1553 | |||
1554 | return ret; | ||
1471 | } | 1555 | } |
1472 | 1556 | ||
1473 | static int ath9k_htc_conf_tx(struct ieee80211_hw *hw, u16 queue, | 1557 | static int ath9k_htc_conf_tx(struct ieee80211_hw *hw, u16 queue, |
@@ -1482,6 +1566,7 @@ static int ath9k_htc_conf_tx(struct ieee80211_hw *hw, u16 queue, | |||
1482 | return 0; | 1566 | return 0; |
1483 | 1567 | ||
1484 | mutex_lock(&priv->mutex); | 1568 | mutex_lock(&priv->mutex); |
1569 | ath9k_htc_ps_wakeup(priv); | ||
1485 | 1570 | ||
1486 | memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); | 1571 | memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); |
1487 | 1572 | ||
@@ -1499,9 +1584,16 @@ static int ath9k_htc_conf_tx(struct ieee80211_hw *hw, u16 queue, | |||
1499 | params->cw_max, params->txop); | 1584 | params->cw_max, params->txop); |
1500 | 1585 | ||
1501 | ret = ath_htc_txq_update(priv, qnum, &qi); | 1586 | ret = ath_htc_txq_update(priv, qnum, &qi); |
1502 | if (ret) | 1587 | if (ret) { |
1503 | ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n"); | 1588 | ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n"); |
1589 | goto out; | ||
1590 | } | ||
1504 | 1591 | ||
1592 | if ((priv->ah->opmode == NL80211_IFTYPE_ADHOC) && | ||
1593 | (qnum == priv->hwq_map[ATH9K_WME_AC_BE])) | ||
1594 | ath9k_htc_beaconq_config(priv); | ||
1595 | out: | ||
1596 | ath9k_htc_ps_restore(priv); | ||
1505 | mutex_unlock(&priv->mutex); | 1597 | mutex_unlock(&priv->mutex); |
1506 | 1598 | ||
1507 | return ret; | 1599 | return ret; |
@@ -1574,7 +1666,6 @@ static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw, | |||
1574 | ath_start_ani(priv); | 1666 | ath_start_ani(priv); |
1575 | } else { | 1667 | } else { |
1576 | priv->op_flags &= ~OP_ASSOCIATED; | 1668 | priv->op_flags &= ~OP_ASSOCIATED; |
1577 | cancel_work_sync(&priv->ps_work); | ||
1578 | cancel_delayed_work_sync(&priv->ath9k_ani_work); | 1669 | cancel_delayed_work_sync(&priv->ath9k_ani_work); |
1579 | } | 1670 | } |
1580 | } | 1671 | } |
@@ -1631,6 +1722,9 @@ static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw, | |||
1631 | ath9k_hw_init_global_settings(ah); | 1722 | ath9k_hw_init_global_settings(ah); |
1632 | } | 1723 | } |
1633 | 1724 | ||
1725 | if (changed & BSS_CHANGED_HT) | ||
1726 | ath9k_htc_update_rate(priv, vif, bss_conf); | ||
1727 | |||
1634 | ath9k_htc_ps_restore(priv); | 1728 | ath9k_htc_ps_restore(priv); |
1635 | mutex_unlock(&priv->mutex); | 1729 | mutex_unlock(&priv->mutex); |
1636 | } | 1730 | } |
@@ -1641,7 +1735,9 @@ static u64 ath9k_htc_get_tsf(struct ieee80211_hw *hw) | |||
1641 | u64 tsf; | 1735 | u64 tsf; |
1642 | 1736 | ||
1643 | mutex_lock(&priv->mutex); | 1737 | mutex_lock(&priv->mutex); |
1738 | ath9k_htc_ps_wakeup(priv); | ||
1644 | tsf = ath9k_hw_gettsf64(priv->ah); | 1739 | tsf = ath9k_hw_gettsf64(priv->ah); |
1740 | ath9k_htc_ps_restore(priv); | ||
1645 | mutex_unlock(&priv->mutex); | 1741 | mutex_unlock(&priv->mutex); |
1646 | 1742 | ||
1647 | return tsf; | 1743 | return tsf; |
@@ -1652,7 +1748,9 @@ static void ath9k_htc_set_tsf(struct ieee80211_hw *hw, u64 tsf) | |||
1652 | struct ath9k_htc_priv *priv = hw->priv; | 1748 | struct ath9k_htc_priv *priv = hw->priv; |
1653 | 1749 | ||
1654 | mutex_lock(&priv->mutex); | 1750 | mutex_lock(&priv->mutex); |
1751 | ath9k_htc_ps_wakeup(priv); | ||
1655 | ath9k_hw_settsf64(priv->ah, tsf); | 1752 | ath9k_hw_settsf64(priv->ah, tsf); |
1753 | ath9k_htc_ps_restore(priv); | ||
1656 | mutex_unlock(&priv->mutex); | 1754 | mutex_unlock(&priv->mutex); |
1657 | } | 1755 | } |
1658 | 1756 | ||
@@ -1660,11 +1758,11 @@ static void ath9k_htc_reset_tsf(struct ieee80211_hw *hw) | |||
1660 | { | 1758 | { |
1661 | struct ath9k_htc_priv *priv = hw->priv; | 1759 | struct ath9k_htc_priv *priv = hw->priv; |
1662 | 1760 | ||
1663 | ath9k_htc_ps_wakeup(priv); | ||
1664 | mutex_lock(&priv->mutex); | 1761 | mutex_lock(&priv->mutex); |
1762 | ath9k_htc_ps_wakeup(priv); | ||
1665 | ath9k_hw_reset_tsf(priv->ah); | 1763 | ath9k_hw_reset_tsf(priv->ah); |
1666 | mutex_unlock(&priv->mutex); | ||
1667 | ath9k_htc_ps_restore(priv); | 1764 | ath9k_htc_ps_restore(priv); |
1765 | mutex_unlock(&priv->mutex); | ||
1668 | } | 1766 | } |
1669 | 1767 | ||
1670 | static int ath9k_htc_ampdu_action(struct ieee80211_hw *hw, | 1768 | static int ath9k_htc_ampdu_action(struct ieee80211_hw *hw, |
@@ -1722,8 +1820,8 @@ static void ath9k_htc_sw_scan_complete(struct ieee80211_hw *hw) | |||
1722 | { | 1820 | { |
1723 | struct ath9k_htc_priv *priv = hw->priv; | 1821 | struct ath9k_htc_priv *priv = hw->priv; |
1724 | 1822 | ||
1725 | ath9k_htc_ps_wakeup(priv); | ||
1726 | mutex_lock(&priv->mutex); | 1823 | mutex_lock(&priv->mutex); |
1824 | ath9k_htc_ps_wakeup(priv); | ||
1727 | spin_lock_bh(&priv->beacon_lock); | 1825 | spin_lock_bh(&priv->beacon_lock); |
1728 | priv->op_flags &= ~OP_SCANNING; | 1826 | priv->op_flags &= ~OP_SCANNING; |
1729 | spin_unlock_bh(&priv->beacon_lock); | 1827 | spin_unlock_bh(&priv->beacon_lock); |
@@ -1731,8 +1829,8 @@ static void ath9k_htc_sw_scan_complete(struct ieee80211_hw *hw) | |||
1731 | if (priv->op_flags & OP_ASSOCIATED) | 1829 | if (priv->op_flags & OP_ASSOCIATED) |
1732 | ath9k_htc_beacon_config(priv, priv->vif); | 1830 | ath9k_htc_beacon_config(priv, priv->vif); |
1733 | ath_start_ani(priv); | 1831 | ath_start_ani(priv); |
1734 | mutex_unlock(&priv->mutex); | ||
1735 | ath9k_htc_ps_restore(priv); | 1832 | ath9k_htc_ps_restore(priv); |
1833 | mutex_unlock(&priv->mutex); | ||
1736 | } | 1834 | } |
1737 | 1835 | ||
1738 | static int ath9k_htc_set_rts_threshold(struct ieee80211_hw *hw, u32 value) | 1836 | static int ath9k_htc_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
@@ -1746,8 +1844,10 @@ static void ath9k_htc_set_coverage_class(struct ieee80211_hw *hw, | |||
1746 | struct ath9k_htc_priv *priv = hw->priv; | 1844 | struct ath9k_htc_priv *priv = hw->priv; |
1747 | 1845 | ||
1748 | mutex_lock(&priv->mutex); | 1846 | mutex_lock(&priv->mutex); |
1847 | ath9k_htc_ps_wakeup(priv); | ||
1749 | priv->ah->coverage_class = coverage_class; | 1848 | priv->ah->coverage_class = coverage_class; |
1750 | ath9k_hw_init_global_settings(priv->ah); | 1849 | ath9k_hw_init_global_settings(priv->ah); |
1850 | ath9k_htc_ps_restore(priv); | ||
1751 | mutex_unlock(&priv->mutex); | 1851 | mutex_unlock(&priv->mutex); |
1752 | } | 1852 | } |
1753 | 1853 | ||
@@ -1759,7 +1859,8 @@ struct ieee80211_ops ath9k_htc_ops = { | |||
1759 | .remove_interface = ath9k_htc_remove_interface, | 1859 | .remove_interface = ath9k_htc_remove_interface, |
1760 | .config = ath9k_htc_config, | 1860 | .config = ath9k_htc_config, |
1761 | .configure_filter = ath9k_htc_configure_filter, | 1861 | .configure_filter = ath9k_htc_configure_filter, |
1762 | .sta_notify = ath9k_htc_sta_notify, | 1862 | .sta_add = ath9k_htc_sta_add, |
1863 | .sta_remove = ath9k_htc_sta_remove, | ||
1763 | .conf_tx = ath9k_htc_conf_tx, | 1864 | .conf_tx = ath9k_htc_conf_tx, |
1764 | .bss_info_changed = ath9k_htc_bss_info_changed, | 1865 | .bss_info_changed = ath9k_htc_bss_info_changed, |
1765 | .set_key = ath9k_htc_set_key, | 1866 | .set_key = ath9k_htc_set_key, |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c index 2571b443ac82..f0cca4e36f7d 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c | |||
@@ -20,6 +20,16 @@ | |||
20 | /* TX */ | 20 | /* TX */ |
21 | /******/ | 21 | /******/ |
22 | 22 | ||
23 | #define ATH9K_HTC_INIT_TXQ(subtype) do { \ | ||
24 | qi.tqi_subtype = subtype; \ | ||
25 | qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; \ | ||
26 | qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; \ | ||
27 | qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; \ | ||
28 | qi.tqi_physCompBuf = 0; \ | ||
29 | qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE | \ | ||
30 | TXQ_FLAG_TXDESCINT_ENABLE; \ | ||
31 | } while (0) | ||
32 | |||
23 | int get_hw_qnum(u16 queue, int *hwq_map) | 33 | int get_hw_qnum(u16 queue, int *hwq_map) |
24 | { | 34 | { |
25 | switch (queue) { | 35 | switch (queue) { |
@@ -71,7 +81,7 @@ int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb) | |||
71 | struct ath9k_htc_vif *avp; | 81 | struct ath9k_htc_vif *avp; |
72 | struct ath9k_htc_tx_ctl tx_ctl; | 82 | struct ath9k_htc_tx_ctl tx_ctl; |
73 | enum htc_endpoint_id epid; | 83 | enum htc_endpoint_id epid; |
74 | u16 qnum, hw_qnum; | 84 | u16 qnum; |
75 | __le16 fc; | 85 | __le16 fc; |
76 | u8 *tx_fhdr; | 86 | u8 *tx_fhdr; |
77 | u8 sta_idx; | 87 | u8 sta_idx; |
@@ -131,20 +141,23 @@ int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb) | |||
131 | memcpy(tx_fhdr, (u8 *) &tx_hdr, sizeof(tx_hdr)); | 141 | memcpy(tx_fhdr, (u8 *) &tx_hdr, sizeof(tx_hdr)); |
132 | 142 | ||
133 | qnum = skb_get_queue_mapping(skb); | 143 | qnum = skb_get_queue_mapping(skb); |
134 | hw_qnum = get_hw_qnum(qnum, priv->hwq_map); | ||
135 | 144 | ||
136 | switch (hw_qnum) { | 145 | switch (qnum) { |
137 | case 0: | 146 | case 0: |
138 | epid = priv->data_be_ep; | 147 | TX_QSTAT_INC(WME_AC_VO); |
148 | epid = priv->data_vo_ep; | ||
139 | break; | 149 | break; |
140 | case 2: | 150 | case 1: |
151 | TX_QSTAT_INC(WME_AC_VI); | ||
141 | epid = priv->data_vi_ep; | 152 | epid = priv->data_vi_ep; |
142 | break; | 153 | break; |
143 | case 3: | 154 | case 2: |
144 | epid = priv->data_vo_ep; | 155 | TX_QSTAT_INC(WME_AC_BE); |
156 | epid = priv->data_be_ep; | ||
145 | break; | 157 | break; |
146 | case 1: | 158 | case 3: |
147 | default: | 159 | default: |
160 | TX_QSTAT_INC(WME_AC_BK); | ||
148 | epid = priv->data_bk_ep; | 161 | epid = priv->data_bk_ep; |
149 | break; | 162 | break; |
150 | } | 163 | } |
@@ -293,13 +306,7 @@ bool ath9k_htc_txq_setup(struct ath9k_htc_priv *priv, | |||
293 | int qnum; | 306 | int qnum; |
294 | 307 | ||
295 | memset(&qi, 0, sizeof(qi)); | 308 | memset(&qi, 0, sizeof(qi)); |
296 | 309 | ATH9K_HTC_INIT_TXQ(subtype); | |
297 | qi.tqi_subtype = subtype; | ||
298 | qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; | ||
299 | qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; | ||
300 | qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; | ||
301 | qi.tqi_physCompBuf = 0; | ||
302 | qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE | TXQ_FLAG_TXDESCINT_ENABLE; | ||
303 | 310 | ||
304 | qnum = ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_DATA, &qi); | 311 | qnum = ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_DATA, &qi); |
305 | if (qnum == -1) | 312 | if (qnum == -1) |
@@ -317,6 +324,16 @@ bool ath9k_htc_txq_setup(struct ath9k_htc_priv *priv, | |||
317 | return true; | 324 | return true; |
318 | } | 325 | } |
319 | 326 | ||
327 | int ath9k_htc_cabq_setup(struct ath9k_htc_priv *priv) | ||
328 | { | ||
329 | struct ath9k_tx_queue_info qi; | ||
330 | |||
331 | memset(&qi, 0, sizeof(qi)); | ||
332 | ATH9K_HTC_INIT_TXQ(0); | ||
333 | |||
334 | return ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_CAB, &qi); | ||
335 | } | ||
336 | |||
320 | /******/ | 337 | /******/ |
321 | /* RX */ | 338 | /* RX */ |
322 | /******/ | 339 | /******/ |
diff --git a/drivers/net/wireless/ath/ath9k/htc_hst.c b/drivers/net/wireless/ath/ath9k/htc_hst.c index 064397fd738e..705c0f342e1c 100644 --- a/drivers/net/wireless/ath/ath9k/htc_hst.c +++ b/drivers/net/wireless/ath/ath9k/htc_hst.c | |||
@@ -89,7 +89,6 @@ static void htc_process_target_rdy(struct htc_target *target, | |||
89 | struct htc_endpoint *endpoint; | 89 | struct htc_endpoint *endpoint; |
90 | struct htc_ready_msg *htc_ready_msg = (struct htc_ready_msg *) buf; | 90 | struct htc_ready_msg *htc_ready_msg = (struct htc_ready_msg *) buf; |
91 | 91 | ||
92 | target->credits = be16_to_cpu(htc_ready_msg->credits); | ||
93 | target->credit_size = be16_to_cpu(htc_ready_msg->credit_size); | 92 | target->credit_size = be16_to_cpu(htc_ready_msg->credit_size); |
94 | 93 | ||
95 | endpoint = &target->endpoint[ENDPOINT0]; | 94 | endpoint = &target->endpoint[ENDPOINT0]; |
@@ -159,7 +158,7 @@ static int htc_config_pipe_credits(struct htc_target *target) | |||
159 | 158 | ||
160 | cp_msg->message_id = cpu_to_be16(HTC_MSG_CONFIG_PIPE_ID); | 159 | cp_msg->message_id = cpu_to_be16(HTC_MSG_CONFIG_PIPE_ID); |
161 | cp_msg->pipe_id = USB_WLAN_TX_PIPE; | 160 | cp_msg->pipe_id = USB_WLAN_TX_PIPE; |
162 | cp_msg->credits = 28; | 161 | cp_msg->credits = target->credits; |
163 | 162 | ||
164 | target->htc_flags |= HTC_OP_CONFIG_PIPE_CREDITS; | 163 | target->htc_flags |= HTC_OP_CONFIG_PIPE_CREDITS; |
165 | 164 | ||
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index c33f17dbe6f1..2adc7e78cebf 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -392,12 +392,6 @@ static void ath9k_hw_init_config(struct ath_hw *ah) | |||
392 | ah->config.rx_intr_mitigation = true; | 392 | ah->config.rx_intr_mitigation = true; |
393 | 393 | ||
394 | /* | 394 | /* |
395 | * Tx IQ Calibration (ah->config.tx_iq_calibration) is only | ||
396 | * used by AR9003, but it is showing reliability issues. | ||
397 | * It will take a while to fix so this is currently disabled. | ||
398 | */ | ||
399 | |||
400 | /* | ||
401 | * We need this for PCI devices only (Cardbus, PCI, miniPCI) | 395 | * We need this for PCI devices only (Cardbus, PCI, miniPCI) |
402 | * _and_ if on non-uniprocessor systems (Multiprocessor/HT). | 396 | * _and_ if on non-uniprocessor systems (Multiprocessor/HT). |
403 | * This means we use it for all AR5416 devices, and the few | 397 | * This means we use it for all AR5416 devices, and the few |
@@ -627,6 +621,7 @@ static int __ath9k_hw_init(struct ath_hw *ah) | |||
627 | ar9003_hw_set_nf_limits(ah); | 621 | ar9003_hw_set_nf_limits(ah); |
628 | 622 | ||
629 | ath9k_init_nfcal_hist_buffer(ah); | 623 | ath9k_init_nfcal_hist_buffer(ah); |
624 | ah->bb_watchdog_timeout_ms = 25; | ||
630 | 625 | ||
631 | common->state = ATH_HW_INITIALIZED; | 626 | common->state = ATH_HW_INITIALIZED; |
632 | 627 | ||
@@ -1303,6 +1298,9 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
1303 | if (AR_SREV_9280_10_OR_LATER(ah)) | 1298 | if (AR_SREV_9280_10_OR_LATER(ah)) |
1304 | REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE); | 1299 | REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE); |
1305 | 1300 | ||
1301 | if (!AR_SREV_9300_20_OR_LATER(ah)) | ||
1302 | ar9002_hw_enable_async_fifo(ah); | ||
1303 | |||
1306 | r = ath9k_hw_process_ini(ah, chan); | 1304 | r = ath9k_hw_process_ini(ah, chan); |
1307 | if (r) | 1305 | if (r) |
1308 | return r; | 1306 | return r; |
@@ -1375,7 +1373,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
1375 | ath9k_hw_init_global_settings(ah); | 1373 | ath9k_hw_init_global_settings(ah); |
1376 | 1374 | ||
1377 | if (!AR_SREV_9300_20_OR_LATER(ah)) { | 1375 | if (!AR_SREV_9300_20_OR_LATER(ah)) { |
1378 | ar9002_hw_enable_async_fifo(ah); | 1376 | ar9002_hw_update_async_fifo(ah); |
1379 | ar9002_hw_enable_wep_aggregation(ah); | 1377 | ar9002_hw_enable_wep_aggregation(ah); |
1380 | } | 1378 | } |
1381 | 1379 | ||
@@ -1426,9 +1424,13 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
1426 | "Setting CFG 0x%x\n", REG_READ(ah, AR_CFG)); | 1424 | "Setting CFG 0x%x\n", REG_READ(ah, AR_CFG)); |
1427 | } | 1425 | } |
1428 | } else { | 1426 | } else { |
1429 | /* Configure AR9271 target WLAN */ | 1427 | if (common->bus_ops->ath_bus_type == ATH_USB) { |
1430 | if (AR_SREV_9271(ah)) | 1428 | /* Configure AR9271 target WLAN */ |
1431 | REG_WRITE(ah, AR_CFG, AR_CFG_SWRB | AR_CFG_SWTB); | 1429 | if (AR_SREV_9271(ah)) |
1430 | REG_WRITE(ah, AR_CFG, AR_CFG_SWRB | AR_CFG_SWTB); | ||
1431 | else | ||
1432 | REG_WRITE(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD); | ||
1433 | } | ||
1432 | #ifdef __BIG_ENDIAN | 1434 | #ifdef __BIG_ENDIAN |
1433 | else | 1435 | else |
1434 | REG_WRITE(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD); | 1436 | REG_WRITE(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD); |
@@ -1441,6 +1443,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
1441 | if (AR_SREV_9300_20_OR_LATER(ah)) { | 1443 | if (AR_SREV_9300_20_OR_LATER(ah)) { |
1442 | ath9k_hw_loadnf(ah, curchan); | 1444 | ath9k_hw_loadnf(ah, curchan); |
1443 | ath9k_hw_start_nfcal(ah); | 1445 | ath9k_hw_start_nfcal(ah); |
1446 | ar9003_hw_bb_watchdog_config(ah); | ||
1444 | } | 1447 | } |
1445 | 1448 | ||
1446 | return 0; | 1449 | return 0; |
@@ -1489,6 +1492,7 @@ EXPORT_SYMBOL(ath9k_hw_keyreset); | |||
1489 | bool ath9k_hw_keysetmac(struct ath_hw *ah, u16 entry, const u8 *mac) | 1492 | bool ath9k_hw_keysetmac(struct ath_hw *ah, u16 entry, const u8 *mac) |
1490 | { | 1493 | { |
1491 | u32 macHi, macLo; | 1494 | u32 macHi, macLo; |
1495 | u32 unicast_flag = AR_KEYTABLE_VALID; | ||
1492 | 1496 | ||
1493 | if (entry >= ah->caps.keycache_size) { | 1497 | if (entry >= ah->caps.keycache_size) { |
1494 | ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL, | 1498 | ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL, |
@@ -1497,6 +1501,16 @@ bool ath9k_hw_keysetmac(struct ath_hw *ah, u16 entry, const u8 *mac) | |||
1497 | } | 1501 | } |
1498 | 1502 | ||
1499 | if (mac != NULL) { | 1503 | if (mac != NULL) { |
1504 | /* | ||
1505 | * AR_KEYTABLE_VALID indicates that the address is a unicast | ||
1506 | * address, which must match the transmitter address for | ||
1507 | * decrypting frames. | ||
1508 | * Not setting this bit allows the hardware to use the key | ||
1509 | * for multicast frame decryption. | ||
1510 | */ | ||
1511 | if (mac[0] & 0x01) | ||
1512 | unicast_flag = 0; | ||
1513 | |||
1500 | macHi = (mac[5] << 8) | mac[4]; | 1514 | macHi = (mac[5] << 8) | mac[4]; |
1501 | macLo = (mac[3] << 24) | | 1515 | macLo = (mac[3] << 24) | |
1502 | (mac[2] << 16) | | 1516 | (mac[2] << 16) | |
@@ -1509,7 +1523,7 @@ bool ath9k_hw_keysetmac(struct ath_hw *ah, u16 entry, const u8 *mac) | |||
1509 | macLo = macHi = 0; | 1523 | macLo = macHi = 0; |
1510 | } | 1524 | } |
1511 | REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo); | 1525 | REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo); |
1512 | REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), macHi | AR_KEYTABLE_VALID); | 1526 | REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), macHi | unicast_flag); |
1513 | 1527 | ||
1514 | return true; | 1528 | return true; |
1515 | } | 1529 | } |
@@ -2165,7 +2179,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
2165 | pCap->hw_caps |= ATH9K_HW_CAP_RFSILENT; | 2179 | pCap->hw_caps |= ATH9K_HW_CAP_RFSILENT; |
2166 | } | 2180 | } |
2167 | #endif | 2181 | #endif |
2168 | if (AR_SREV_9271(ah)) | 2182 | if (AR_SREV_9271(ah) || AR_SREV_9300_20_OR_LATER(ah)) |
2169 | pCap->hw_caps |= ATH9K_HW_CAP_AUTOSLEEP; | 2183 | pCap->hw_caps |= ATH9K_HW_CAP_AUTOSLEEP; |
2170 | else | 2184 | else |
2171 | pCap->hw_caps &= ~ATH9K_HW_CAP_AUTOSLEEP; | 2185 | pCap->hw_caps &= ~ATH9K_HW_CAP_AUTOSLEEP; |
@@ -2232,6 +2246,9 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
2232 | if (AR_SREV_9300_20_OR_LATER(ah)) | 2246 | if (AR_SREV_9300_20_OR_LATER(ah)) |
2233 | pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED; | 2247 | pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED; |
2234 | 2248 | ||
2249 | if (AR_SREV_9287_10_OR_LATER(ah) || AR_SREV_9271(ah)) | ||
2250 | pCap->hw_caps |= ATH9K_HW_CAP_SGI_20; | ||
2251 | |||
2235 | return 0; | 2252 | return 0; |
2236 | } | 2253 | } |
2237 | 2254 | ||
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 77245dff5993..88bf2fca3736 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -199,6 +199,7 @@ enum ath9k_hw_caps { | |||
199 | ATH9K_HW_CAP_RAC_SUPPORTED = BIT(18), | 199 | ATH9K_HW_CAP_RAC_SUPPORTED = BIT(18), |
200 | ATH9K_HW_CAP_LDPC = BIT(19), | 200 | ATH9K_HW_CAP_LDPC = BIT(19), |
201 | ATH9K_HW_CAP_FASTCLOCK = BIT(20), | 201 | ATH9K_HW_CAP_FASTCLOCK = BIT(20), |
202 | ATH9K_HW_CAP_SGI_20 = BIT(21), | ||
202 | }; | 203 | }; |
203 | 204 | ||
204 | enum ath9k_capability_type { | 205 | enum ath9k_capability_type { |
@@ -262,7 +263,6 @@ struct ath9k_ops_config { | |||
262 | #define AR_BASE_FREQ_5GHZ 4900 | 263 | #define AR_BASE_FREQ_5GHZ 4900 |
263 | #define AR_SPUR_FEEQ_BOUND_HT40 19 | 264 | #define AR_SPUR_FEEQ_BOUND_HT40 19 |
264 | #define AR_SPUR_FEEQ_BOUND_HT20 10 | 265 | #define AR_SPUR_FEEQ_BOUND_HT20 10 |
265 | bool tx_iq_calibration; /* Only available for >= AR9003 */ | ||
266 | int spurmode; | 266 | int spurmode; |
267 | u16 spurchans[AR_EEPROM_MODAL_SPURS][2]; | 267 | u16 spurchans[AR_EEPROM_MODAL_SPURS][2]; |
268 | u8 max_txtrig_level; | 268 | u8 max_txtrig_level; |
@@ -279,6 +279,7 @@ enum ath9k_int { | |||
279 | ATH9K_INT_TX = 0x00000040, | 279 | ATH9K_INT_TX = 0x00000040, |
280 | ATH9K_INT_TXDESC = 0x00000080, | 280 | ATH9K_INT_TXDESC = 0x00000080, |
281 | ATH9K_INT_TIM_TIMER = 0x00000100, | 281 | ATH9K_INT_TIM_TIMER = 0x00000100, |
282 | ATH9K_INT_BB_WATCHDOG = 0x00000400, | ||
282 | ATH9K_INT_TXURN = 0x00000800, | 283 | ATH9K_INT_TXURN = 0x00000800, |
283 | ATH9K_INT_MIB = 0x00001000, | 284 | ATH9K_INT_MIB = 0x00001000, |
284 | ATH9K_INT_RXPHY = 0x00004000, | 285 | ATH9K_INT_RXPHY = 0x00004000, |
@@ -459,7 +460,7 @@ struct ath9k_hw_version { | |||
459 | #define AR_GENTMR_BIT(_index) (1 << (_index)) | 460 | #define AR_GENTMR_BIT(_index) (1 << (_index)) |
460 | 461 | ||
461 | /* | 462 | /* |
462 | * Using de Bruijin sequence to to look up 1's index in a 32 bit number | 463 | * Using de Bruijin sequence to look up 1's index in a 32 bit number |
463 | * debruijn32 = 0000 0111 0111 1100 1011 0101 0011 0001 | 464 | * debruijn32 = 0000 0111 0111 1100 1011 0101 0011 0001 |
464 | */ | 465 | */ |
465 | #define debruijn32 0x077CB531U | 466 | #define debruijn32 0x077CB531U |
@@ -789,6 +790,9 @@ struct ath_hw { | |||
789 | u32 ts_paddr_end; | 790 | u32 ts_paddr_end; |
790 | u16 ts_tail; | 791 | u16 ts_tail; |
791 | u8 ts_size; | 792 | u8 ts_size; |
793 | |||
794 | u32 bb_watchdog_last_status; | ||
795 | u32 bb_watchdog_timeout_ms; /* in ms, 0 to disable */ | ||
792 | }; | 796 | }; |
793 | 797 | ||
794 | static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah) | 798 | static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah) |
@@ -907,13 +911,17 @@ void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled, | |||
907 | void ar9002_hw_cck_chan14_spread(struct ath_hw *ah); | 911 | void ar9002_hw_cck_chan14_spread(struct ath_hw *ah); |
908 | int ar9002_hw_rf_claim(struct ath_hw *ah); | 912 | int ar9002_hw_rf_claim(struct ath_hw *ah); |
909 | void ar9002_hw_enable_async_fifo(struct ath_hw *ah); | 913 | void ar9002_hw_enable_async_fifo(struct ath_hw *ah); |
914 | void ar9002_hw_update_async_fifo(struct ath_hw *ah); | ||
910 | void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah); | 915 | void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah); |
911 | 916 | ||
912 | /* | 917 | /* |
913 | * Code specifric to AR9003, we stuff these here to avoid callbacks | 918 | * Code specific to AR9003, we stuff these here to avoid callbacks |
914 | * for older families | 919 | * for older families |
915 | */ | 920 | */ |
916 | void ar9003_hw_set_nf_limits(struct ath_hw *ah); | 921 | void ar9003_hw_set_nf_limits(struct ath_hw *ah); |
922 | void ar9003_hw_bb_watchdog_config(struct ath_hw *ah); | ||
923 | void ar9003_hw_bb_watchdog_read(struct ath_hw *ah); | ||
924 | void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah); | ||
917 | 925 | ||
918 | /* Hardware family op attach helpers */ | 926 | /* Hardware family op attach helpers */ |
919 | void ar5008_hw_attach_phy_ops(struct ath_hw *ah); | 927 | void ar5008_hw_attach_phy_ops(struct ath_hw *ah); |
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c index d457cb3bd772..18d76ede859d 100644 --- a/drivers/net/wireless/ath/ath9k/init.c +++ b/drivers/net/wireless/ath/ath9k/init.c | |||
@@ -175,18 +175,6 @@ static const struct ath_ops ath9k_common_ops = { | |||
175 | .write = ath9k_iowrite32, | 175 | .write = ath9k_iowrite32, |
176 | }; | 176 | }; |
177 | 177 | ||
178 | static int count_streams(unsigned int chainmask, int max) | ||
179 | { | ||
180 | int streams = 0; | ||
181 | |||
182 | do { | ||
183 | if (++streams == max) | ||
184 | break; | ||
185 | } while ((chainmask = chainmask & (chainmask - 1))); | ||
186 | |||
187 | return streams; | ||
188 | } | ||
189 | |||
190 | /**************************/ | 178 | /**************************/ |
191 | /* Initialization */ | 179 | /* Initialization */ |
192 | /**************************/ | 180 | /**************************/ |
@@ -208,6 +196,9 @@ static void setup_ht_cap(struct ath_softc *sc, | |||
208 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_LDPC) | 196 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_LDPC) |
209 | ht_info->cap |= IEEE80211_HT_CAP_LDPC_CODING; | 197 | ht_info->cap |= IEEE80211_HT_CAP_LDPC_CODING; |
210 | 198 | ||
199 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) | ||
200 | ht_info->cap |= IEEE80211_HT_CAP_SGI_20; | ||
201 | |||
211 | ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; | 202 | ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
212 | ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; | 203 | ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8; |
213 | 204 | ||
@@ -224,8 +215,8 @@ static void setup_ht_cap(struct ath_softc *sc, | |||
224 | 215 | ||
225 | /* set up supported mcs set */ | 216 | /* set up supported mcs set */ |
226 | memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); | 217 | memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); |
227 | tx_streams = count_streams(common->tx_chainmask, max_streams); | 218 | tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, max_streams); |
228 | rx_streams = count_streams(common->rx_chainmask, max_streams); | 219 | rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, max_streams); |
229 | 220 | ||
230 | ath_print(common, ATH_DBG_CONFIG, | 221 | ath_print(common, ATH_DBG_CONFIG, |
231 | "TX streams %d, RX streams: %d\n", | 222 | "TX streams %d, RX streams: %d\n", |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index abfa0493236f..b8b76dd2c11e 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -520,6 +520,12 @@ irqreturn_t ath_isr(int irq, void *dev) | |||
520 | !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))) | 520 | !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))) |
521 | goto chip_reset; | 521 | goto chip_reset; |
522 | 522 | ||
523 | if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && | ||
524 | (status & ATH9K_INT_BB_WATCHDOG)) { | ||
525 | ar9003_hw_bb_watchdog_dbg_info(ah); | ||
526 | goto chip_reset; | ||
527 | } | ||
528 | |||
523 | if (status & ATH9K_INT_SWBA) | 529 | if (status & ATH9K_INT_SWBA) |
524 | tasklet_schedule(&sc->bcon_tasklet); | 530 | tasklet_schedule(&sc->bcon_tasklet); |
525 | 531 | ||
@@ -615,234 +621,6 @@ static u32 ath_get_extchanmode(struct ath_softc *sc, | |||
615 | return chanmode; | 621 | return chanmode; |
616 | } | 622 | } |
617 | 623 | ||
618 | static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key, | ||
619 | struct ath9k_keyval *hk, const u8 *addr, | ||
620 | bool authenticator) | ||
621 | { | ||
622 | struct ath_hw *ah = common->ah; | ||
623 | const u8 *key_rxmic; | ||
624 | const u8 *key_txmic; | ||
625 | |||
626 | key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY; | ||
627 | key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY; | ||
628 | |||
629 | if (addr == NULL) { | ||
630 | /* | ||
631 | * Group key installation - only two key cache entries are used | ||
632 | * regardless of splitmic capability since group key is only | ||
633 | * used either for TX or RX. | ||
634 | */ | ||
635 | if (authenticator) { | ||
636 | memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic)); | ||
637 | memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic)); | ||
638 | } else { | ||
639 | memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic)); | ||
640 | memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic)); | ||
641 | } | ||
642 | return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr); | ||
643 | } | ||
644 | if (!common->splitmic) { | ||
645 | /* TX and RX keys share the same key cache entry. */ | ||
646 | memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic)); | ||
647 | memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic)); | ||
648 | return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr); | ||
649 | } | ||
650 | |||
651 | /* Separate key cache entries for TX and RX */ | ||
652 | |||
653 | /* TX key goes at first index, RX key at +32. */ | ||
654 | memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic)); | ||
655 | if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) { | ||
656 | /* TX MIC entry failed. No need to proceed further */ | ||
657 | ath_print(common, ATH_DBG_FATAL, | ||
658 | "Setting TX MIC Key Failed\n"); | ||
659 | return 0; | ||
660 | } | ||
661 | |||
662 | memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic)); | ||
663 | /* XXX delete tx key on failure? */ | ||
664 | return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr); | ||
665 | } | ||
666 | |||
667 | static int ath_reserve_key_cache_slot_tkip(struct ath_common *common) | ||
668 | { | ||
669 | int i; | ||
670 | |||
671 | for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) { | ||
672 | if (test_bit(i, common->keymap) || | ||
673 | test_bit(i + 64, common->keymap)) | ||
674 | continue; /* At least one part of TKIP key allocated */ | ||
675 | if (common->splitmic && | ||
676 | (test_bit(i + 32, common->keymap) || | ||
677 | test_bit(i + 64 + 32, common->keymap))) | ||
678 | continue; /* At least one part of TKIP key allocated */ | ||
679 | |||
680 | /* Found a free slot for a TKIP key */ | ||
681 | return i; | ||
682 | } | ||
683 | return -1; | ||
684 | } | ||
685 | |||
686 | static int ath_reserve_key_cache_slot(struct ath_common *common) | ||
687 | { | ||
688 | int i; | ||
689 | |||
690 | /* First, try to find slots that would not be available for TKIP. */ | ||
691 | if (common->splitmic) { | ||
692 | for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) { | ||
693 | if (!test_bit(i, common->keymap) && | ||
694 | (test_bit(i + 32, common->keymap) || | ||
695 | test_bit(i + 64, common->keymap) || | ||
696 | test_bit(i + 64 + 32, common->keymap))) | ||
697 | return i; | ||
698 | if (!test_bit(i + 32, common->keymap) && | ||
699 | (test_bit(i, common->keymap) || | ||
700 | test_bit(i + 64, common->keymap) || | ||
701 | test_bit(i + 64 + 32, common->keymap))) | ||
702 | return i + 32; | ||
703 | if (!test_bit(i + 64, common->keymap) && | ||
704 | (test_bit(i , common->keymap) || | ||
705 | test_bit(i + 32, common->keymap) || | ||
706 | test_bit(i + 64 + 32, common->keymap))) | ||
707 | return i + 64; | ||
708 | if (!test_bit(i + 64 + 32, common->keymap) && | ||
709 | (test_bit(i, common->keymap) || | ||
710 | test_bit(i + 32, common->keymap) || | ||
711 | test_bit(i + 64, common->keymap))) | ||
712 | return i + 64 + 32; | ||
713 | } | ||
714 | } else { | ||
715 | for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) { | ||
716 | if (!test_bit(i, common->keymap) && | ||
717 | test_bit(i + 64, common->keymap)) | ||
718 | return i; | ||
719 | if (test_bit(i, common->keymap) && | ||
720 | !test_bit(i + 64, common->keymap)) | ||
721 | return i + 64; | ||
722 | } | ||
723 | } | ||
724 | |||
725 | /* No partially used TKIP slots, pick any available slot */ | ||
726 | for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) { | ||
727 | /* Do not allow slots that could be needed for TKIP group keys | ||
728 | * to be used. This limitation could be removed if we know that | ||
729 | * TKIP will not be used. */ | ||
730 | if (i >= 64 && i < 64 + IEEE80211_WEP_NKID) | ||
731 | continue; | ||
732 | if (common->splitmic) { | ||
733 | if (i >= 32 && i < 32 + IEEE80211_WEP_NKID) | ||
734 | continue; | ||
735 | if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID) | ||
736 | continue; | ||
737 | } | ||
738 | |||
739 | if (!test_bit(i, common->keymap)) | ||
740 | return i; /* Found a free slot for a key */ | ||
741 | } | ||
742 | |||
743 | /* No free slot found */ | ||
744 | return -1; | ||
745 | } | ||
746 | |||
747 | static int ath_key_config(struct ath_common *common, | ||
748 | struct ieee80211_vif *vif, | ||
749 | struct ieee80211_sta *sta, | ||
750 | struct ieee80211_key_conf *key) | ||
751 | { | ||
752 | struct ath_hw *ah = common->ah; | ||
753 | struct ath9k_keyval hk; | ||
754 | const u8 *mac = NULL; | ||
755 | int ret = 0; | ||
756 | int idx; | ||
757 | |||
758 | memset(&hk, 0, sizeof(hk)); | ||
759 | |||
760 | switch (key->alg) { | ||
761 | case ALG_WEP: | ||
762 | hk.kv_type = ATH9K_CIPHER_WEP; | ||
763 | break; | ||
764 | case ALG_TKIP: | ||
765 | hk.kv_type = ATH9K_CIPHER_TKIP; | ||
766 | break; | ||
767 | case ALG_CCMP: | ||
768 | hk.kv_type = ATH9K_CIPHER_AES_CCM; | ||
769 | break; | ||
770 | default: | ||
771 | return -EOPNOTSUPP; | ||
772 | } | ||
773 | |||
774 | hk.kv_len = key->keylen; | ||
775 | memcpy(hk.kv_val, key->key, key->keylen); | ||
776 | |||
777 | if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { | ||
778 | /* For now, use the default keys for broadcast keys. This may | ||
779 | * need to change with virtual interfaces. */ | ||
780 | idx = key->keyidx; | ||
781 | } else if (key->keyidx) { | ||
782 | if (WARN_ON(!sta)) | ||
783 | return -EOPNOTSUPP; | ||
784 | mac = sta->addr; | ||
785 | |||
786 | if (vif->type != NL80211_IFTYPE_AP) { | ||
787 | /* Only keyidx 0 should be used with unicast key, but | ||
788 | * allow this for client mode for now. */ | ||
789 | idx = key->keyidx; | ||
790 | } else | ||
791 | return -EIO; | ||
792 | } else { | ||
793 | if (WARN_ON(!sta)) | ||
794 | return -EOPNOTSUPP; | ||
795 | mac = sta->addr; | ||
796 | |||
797 | if (key->alg == ALG_TKIP) | ||
798 | idx = ath_reserve_key_cache_slot_tkip(common); | ||
799 | else | ||
800 | idx = ath_reserve_key_cache_slot(common); | ||
801 | if (idx < 0) | ||
802 | return -ENOSPC; /* no free key cache entries */ | ||
803 | } | ||
804 | |||
805 | if (key->alg == ALG_TKIP) | ||
806 | ret = ath_setkey_tkip(common, idx, key->key, &hk, mac, | ||
807 | vif->type == NL80211_IFTYPE_AP); | ||
808 | else | ||
809 | ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac); | ||
810 | |||
811 | if (!ret) | ||
812 | return -EIO; | ||
813 | |||
814 | set_bit(idx, common->keymap); | ||
815 | if (key->alg == ALG_TKIP) { | ||
816 | set_bit(idx + 64, common->keymap); | ||
817 | if (common->splitmic) { | ||
818 | set_bit(idx + 32, common->keymap); | ||
819 | set_bit(idx + 64 + 32, common->keymap); | ||
820 | } | ||
821 | } | ||
822 | |||
823 | return idx; | ||
824 | } | ||
825 | |||
826 | static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key) | ||
827 | { | ||
828 | struct ath_hw *ah = common->ah; | ||
829 | |||
830 | ath9k_hw_keyreset(ah, key->hw_key_idx); | ||
831 | if (key->hw_key_idx < IEEE80211_WEP_NKID) | ||
832 | return; | ||
833 | |||
834 | clear_bit(key->hw_key_idx, common->keymap); | ||
835 | if (key->alg != ALG_TKIP) | ||
836 | return; | ||
837 | |||
838 | clear_bit(key->hw_key_idx + 64, common->keymap); | ||
839 | if (common->splitmic) { | ||
840 | ath9k_hw_keyreset(ah, key->hw_key_idx + 32); | ||
841 | clear_bit(key->hw_key_idx + 32, common->keymap); | ||
842 | clear_bit(key->hw_key_idx + 64 + 32, common->keymap); | ||
843 | } | ||
844 | } | ||
845 | |||
846 | static void ath9k_bss_assoc_info(struct ath_softc *sc, | 624 | static void ath9k_bss_assoc_info(struct ath_softc *sc, |
847 | struct ieee80211_vif *vif, | 625 | struct ieee80211_vif *vif, |
848 | struct ieee80211_bss_conf *bss_conf) | 626 | struct ieee80211_bss_conf *bss_conf) |
@@ -1195,7 +973,9 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1195 | ATH9K_INT_GLOBAL; | 973 | ATH9K_INT_GLOBAL; |
1196 | 974 | ||
1197 | if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) | 975 | if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) |
1198 | ah->imask |= ATH9K_INT_RXHP | ATH9K_INT_RXLP; | 976 | ah->imask |= ATH9K_INT_RXHP | |
977 | ATH9K_INT_RXLP | | ||
978 | ATH9K_INT_BB_WATCHDOG; | ||
1199 | else | 979 | else |
1200 | ah->imask |= ATH9K_INT_RX; | 980 | ah->imask |= ATH9K_INT_RX; |
1201 | 981 | ||
@@ -1245,6 +1025,7 @@ static int ath9k_tx(struct ieee80211_hw *hw, | |||
1245 | struct ath_tx_control txctl; | 1025 | struct ath_tx_control txctl; |
1246 | int padpos, padsize; | 1026 | int padpos, padsize; |
1247 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; | 1027 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; |
1028 | int qnum; | ||
1248 | 1029 | ||
1249 | if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) { | 1030 | if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) { |
1250 | ath_print(common, ATH_DBG_XMIT, | 1031 | ath_print(common, ATH_DBG_XMIT, |
@@ -1274,7 +1055,8 @@ static int ath9k_tx(struct ieee80211_hw *hw, | |||
1274 | * completed and if needed, also for RX of buffered frames. | 1055 | * completed and if needed, also for RX of buffered frames. |
1275 | */ | 1056 | */ |
1276 | ath9k_ps_wakeup(sc); | 1057 | ath9k_ps_wakeup(sc); |
1277 | ath9k_hw_setrxabort(sc->sc_ah, 0); | 1058 | if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) |
1059 | ath9k_hw_setrxabort(sc->sc_ah, 0); | ||
1278 | if (ieee80211_is_pspoll(hdr->frame_control)) { | 1060 | if (ieee80211_is_pspoll(hdr->frame_control)) { |
1279 | ath_print(common, ATH_DBG_PS, | 1061 | ath_print(common, ATH_DBG_PS, |
1280 | "Sending PS-Poll to pick a buffered frame\n"); | 1062 | "Sending PS-Poll to pick a buffered frame\n"); |
@@ -1316,11 +1098,8 @@ static int ath9k_tx(struct ieee80211_hw *hw, | |||
1316 | memmove(skb->data, skb->data + padsize, padpos); | 1098 | memmove(skb->data, skb->data + padsize, padpos); |
1317 | } | 1099 | } |
1318 | 1100 | ||
1319 | /* Check if a tx queue is available */ | 1101 | qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc); |
1320 | 1102 | txctl.txq = &sc->tx.txq[qnum]; | |
1321 | txctl.txq = ath_test_get_txq(sc, skb); | ||
1322 | if (!txctl.txq) | ||
1323 | goto exit; | ||
1324 | 1103 | ||
1325 | ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); | 1104 | ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); |
1326 | 1105 | ||
@@ -1538,8 +1317,8 @@ void ath9k_enable_ps(struct ath_softc *sc) | |||
1538 | ah->imask |= ATH9K_INT_TIM_TIMER; | 1317 | ah->imask |= ATH9K_INT_TIM_TIMER; |
1539 | ath9k_hw_set_interrupts(ah, ah->imask); | 1318 | ath9k_hw_set_interrupts(ah, ah->imask); |
1540 | } | 1319 | } |
1320 | ath9k_hw_setrxabort(ah, 1); | ||
1541 | } | 1321 | } |
1542 | ath9k_hw_setrxabort(ah, 1); | ||
1543 | } | 1322 | } |
1544 | 1323 | ||
1545 | static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | 1324 | static int ath9k_config(struct ieee80211_hw *hw, u32 changed) |
@@ -1804,7 +1583,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw, | |||
1804 | 1583 | ||
1805 | switch (cmd) { | 1584 | switch (cmd) { |
1806 | case SET_KEY: | 1585 | case SET_KEY: |
1807 | ret = ath_key_config(common, vif, sta, key); | 1586 | ret = ath9k_cmn_key_config(common, vif, sta, key); |
1808 | if (ret >= 0) { | 1587 | if (ret >= 0) { |
1809 | key->hw_key_idx = ret; | 1588 | key->hw_key_idx = ret; |
1810 | /* push IV and Michael MIC generation to stack */ | 1589 | /* push IV and Michael MIC generation to stack */ |
@@ -1817,7 +1596,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw, | |||
1817 | } | 1596 | } |
1818 | break; | 1597 | break; |
1819 | case DISABLE_KEY: | 1598 | case DISABLE_KEY: |
1820 | ath_key_delete(common, key); | 1599 | ath9k_cmn_key_delete(common, key); |
1821 | break; | 1600 | break; |
1822 | default: | 1601 | default: |
1823 | ret = -EINVAL; | 1602 | ret = -EINVAL; |
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c index 8519452c95f1..02b605273ca5 100644 --- a/drivers/net/wireless/ath/ath9k/rc.c +++ b/drivers/net/wireless/ath/ath9k/rc.c | |||
@@ -20,7 +20,7 @@ | |||
20 | #include "ath9k.h" | 20 | #include "ath9k.h" |
21 | 21 | ||
22 | static const struct ath_rate_table ar5416_11na_ratetable = { | 22 | static const struct ath_rate_table ar5416_11na_ratetable = { |
23 | 42, | 23 | 43, |
24 | 8, /* MCS start */ | 24 | 8, /* MCS start */ |
25 | { | 25 | { |
26 | { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */ | 26 | { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */ |
@@ -40,73 +40,75 @@ static const struct ath_rate_table ar5416_11na_ratetable = { | |||
40 | { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */ | 40 | { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */ |
41 | 29300, 7, 108, 4, 7, 7, 7, 7 }, | 41 | 29300, 7, 108, 4, 7, 7, 7, 7 }, |
42 | { VALID_2040, VALID_2040, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */ | 42 | { VALID_2040, VALID_2040, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */ |
43 | 6400, 0, 0, 0, 8, 24, 8, 24 }, | 43 | 6400, 0, 0, 0, 8, 25, 8, 25 }, |
44 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */ | 44 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */ |
45 | 12700, 1, 1, 2, 9, 25, 9, 25 }, | 45 | 12700, 1, 1, 2, 9, 26, 9, 26 }, |
46 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */ | 46 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */ |
47 | 18800, 2, 2, 2, 10, 26, 10, 26 }, | 47 | 18800, 2, 2, 2, 10, 27, 10, 27 }, |
48 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */ | 48 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */ |
49 | 25000, 3, 3, 4, 11, 27, 11, 27 }, | 49 | 25000, 3, 3, 4, 11, 28, 11, 28 }, |
50 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */ | 50 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */ |
51 | 36700, 4, 4, 4, 12, 28, 12, 28 }, | 51 | 36700, 4, 4, 4, 12, 29, 12, 29 }, |
52 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */ | 52 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */ |
53 | 48100, 5, 5, 4, 13, 29, 13, 29 }, | 53 | 48100, 5, 5, 4, 13, 30, 13, 30 }, |
54 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */ | 54 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */ |
55 | 53500, 6, 6, 4, 14, 30, 14, 30 }, | 55 | 53500, 6, 6, 4, 14, 31, 14, 31 }, |
56 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */ | 56 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */ |
57 | 59000, 7, 7, 4, 15, 31, 15, 32 }, | 57 | 59000, 7, 7, 4, 15, 32, 15, 33 }, |
58 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */ | 58 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */ |
59 | 12700, 8, 8, 3, 16, 33, 16, 33 }, | 59 | 12700, 8, 8, 3, 16, 34, 16, 34 }, |
60 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */ | 60 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */ |
61 | 24800, 9, 9, 2, 17, 34, 17, 34 }, | 61 | 24800, 9, 9, 2, 17, 35, 17, 35 }, |
62 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */ | 62 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */ |
63 | 36600, 10, 10, 2, 18, 35, 18, 35 }, | 63 | 36600, 10, 10, 2, 18, 36, 18, 36 }, |
64 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */ | 64 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */ |
65 | 48100, 11, 11, 4, 19, 36, 19, 36 }, | 65 | 48100, 11, 11, 4, 19, 37, 19, 37 }, |
66 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */ | 66 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */ |
67 | 69500, 12, 12, 4, 20, 37, 20, 37 }, | 67 | 69500, 12, 12, 4, 20, 38, 20, 38 }, |
68 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */ | 68 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */ |
69 | 89500, 13, 13, 4, 21, 38, 21, 38 }, | 69 | 89500, 13, 13, 4, 21, 39, 21, 39 }, |
70 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */ | 70 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */ |
71 | 98900, 14, 14, 4, 22, 39, 22, 39 }, | 71 | 98900, 14, 14, 4, 22, 40, 22, 40 }, |
72 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */ | 72 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */ |
73 | 108300, 15, 15, 4, 23, 40, 23, 41 }, | 73 | 108300, 15, 15, 4, 23, 41, 24, 42 }, |
74 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS_HGI, 144400, /* 144.4 Mb */ | ||
75 | 12000, 15, 15, 4, 23, 41, 24, 42 }, | ||
74 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */ | 76 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */ |
75 | 13200, 0, 0, 0, 8, 24, 24, 24 }, | 77 | 13200, 0, 0, 0, 8, 25, 25, 25 }, |
76 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */ | 78 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */ |
77 | 25900, 1, 1, 2, 9, 25, 25, 25 }, | 79 | 25900, 1, 1, 2, 9, 26, 26, 26 }, |
78 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */ | 80 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */ |
79 | 38600, 2, 2, 2, 10, 26, 26, 26 }, | 81 | 38600, 2, 2, 2, 10, 27, 27, 27 }, |
80 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */ | 82 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */ |
81 | 49800, 3, 3, 4, 11, 27, 27, 27 }, | 83 | 49800, 3, 3, 4, 11, 28, 28, 28 }, |
82 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */ | 84 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */ |
83 | 72200, 4, 4, 4, 12, 28, 28, 28 }, | 85 | 72200, 4, 4, 4, 12, 29, 29, 29 }, |
84 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */ | 86 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */ |
85 | 92900, 5, 5, 4, 13, 29, 29, 29 }, | 87 | 92900, 5, 5, 4, 13, 30, 30, 30 }, |
86 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */ | 88 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */ |
87 | 102700, 6, 6, 4, 14, 30, 30, 30 }, | 89 | 102700, 6, 6, 4, 14, 31, 31, 31 }, |
88 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */ | 90 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */ |
89 | 112000, 7, 7, 4, 15, 31, 32, 32 }, | 91 | 112000, 7, 7, 4, 15, 32, 33, 33 }, |
90 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */ | 92 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */ |
91 | 122000, 7, 7, 4, 15, 31, 32, 32 }, | 93 | 122000, 7, 7, 4, 15, 32, 33, 33 }, |
92 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */ | 94 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */ |
93 | 25800, 8, 8, 0, 16, 33, 33, 33 }, | 95 | 25800, 8, 8, 0, 16, 34, 34, 34 }, |
94 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */ | 96 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */ |
95 | 49800, 9, 9, 2, 17, 34, 34, 34 }, | 97 | 49800, 9, 9, 2, 17, 35, 35, 35 }, |
96 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */ | 98 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */ |
97 | 71900, 10, 10, 2, 18, 35, 35, 35 }, | 99 | 71900, 10, 10, 2, 18, 36, 36, 36 }, |
98 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */ | 100 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */ |
99 | 92500, 11, 11, 4, 19, 36, 36, 36 }, | 101 | 92500, 11, 11, 4, 19, 37, 37, 37 }, |
100 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */ | 102 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */ |
101 | 130300, 12, 12, 4, 20, 37, 37, 37 }, | 103 | 130300, 12, 12, 4, 20, 38, 38, 38 }, |
102 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */ | 104 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */ |
103 | 162800, 13, 13, 4, 21, 38, 38, 38 }, | 105 | 162800, 13, 13, 4, 21, 39, 39, 39 }, |
104 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */ | 106 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */ |
105 | 178200, 14, 14, 4, 22, 39, 39, 39 }, | 107 | 178200, 14, 14, 4, 22, 40, 40, 40 }, |
106 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */ | 108 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */ |
107 | 192100, 15, 15, 4, 23, 40, 41, 41 }, | 109 | 192100, 15, 15, 4, 23, 41, 42, 42 }, |
108 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */ | 110 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */ |
109 | 207000, 15, 15, 4, 23, 40, 41, 41 }, | 111 | 207000, 15, 15, 4, 23, 41, 42, 42 }, |
110 | }, | 112 | }, |
111 | 50, /* probe interval */ | 113 | 50, /* probe interval */ |
112 | WLAN_RC_HT_FLAG, /* Phy rates allowed initially */ | 114 | WLAN_RC_HT_FLAG, /* Phy rates allowed initially */ |
@@ -116,7 +118,7 @@ static const struct ath_rate_table ar5416_11na_ratetable = { | |||
116 | * for HT are the 64K max aggregate limit */ | 118 | * for HT are the 64K max aggregate limit */ |
117 | 119 | ||
118 | static const struct ath_rate_table ar5416_11ng_ratetable = { | 120 | static const struct ath_rate_table ar5416_11ng_ratetable = { |
119 | 46, | 121 | 47, |
120 | 12, /* MCS start */ | 122 | 12, /* MCS start */ |
121 | { | 123 | { |
122 | { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */ | 124 | { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */ |
@@ -144,73 +146,75 @@ static const struct ath_rate_table ar5416_11ng_ratetable = { | |||
144 | { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */ | 146 | { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */ |
145 | 30900, 11, 108, 8, 11, 11, 11, 11 }, | 147 | 30900, 11, 108, 8, 11, 11, 11, 11 }, |
146 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */ | 148 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */ |
147 | 6400, 0, 0, 4, 12, 28, 12, 28 }, | 149 | 6400, 0, 0, 4, 12, 29, 12, 29 }, |
148 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */ | 150 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */ |
149 | 12700, 1, 1, 6, 13, 29, 13, 29 }, | 151 | 12700, 1, 1, 6, 13, 30, 13, 30 }, |
150 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */ | 152 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */ |
151 | 18800, 2, 2, 6, 14, 30, 14, 30 }, | 153 | 18800, 2, 2, 6, 14, 31, 14, 31 }, |
152 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */ | 154 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */ |
153 | 25000, 3, 3, 8, 15, 31, 15, 31 }, | 155 | 25000, 3, 3, 8, 15, 32, 15, 32 }, |
154 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */ | 156 | { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */ |
155 | 36700, 4, 4, 8, 16, 32, 16, 32 }, | 157 | 36700, 4, 4, 8, 16, 33, 16, 33 }, |
156 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */ | 158 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */ |
157 | 48100, 5, 5, 8, 17, 33, 17, 33 }, | 159 | 48100, 5, 5, 8, 17, 34, 17, 34 }, |
158 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */ | 160 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */ |
159 | 53500, 6, 6, 8, 18, 34, 18, 34 }, | 161 | 53500, 6, 6, 8, 18, 35, 18, 35 }, |
160 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */ | 162 | { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */ |
161 | 59000, 7, 7, 8, 19, 35, 19, 36 }, | 163 | 59000, 7, 7, 8, 19, 36, 19, 37 }, |
162 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */ | 164 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */ |
163 | 12700, 8, 8, 4, 20, 37, 20, 37 }, | 165 | 12700, 8, 8, 4, 20, 38, 20, 38 }, |
164 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */ | 166 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */ |
165 | 24800, 9, 9, 6, 21, 38, 21, 38 }, | 167 | 24800, 9, 9, 6, 21, 39, 21, 39 }, |
166 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */ | 168 | { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */ |
167 | 36600, 10, 10, 6, 22, 39, 22, 39 }, | 169 | 36600, 10, 10, 6, 22, 40, 22, 40 }, |
168 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */ | 170 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */ |
169 | 48100, 11, 11, 8, 23, 40, 23, 40 }, | 171 | 48100, 11, 11, 8, 23, 41, 23, 41 }, |
170 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */ | 172 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */ |
171 | 69500, 12, 12, 8, 24, 41, 24, 41 }, | 173 | 69500, 12, 12, 8, 24, 42, 24, 42 }, |
172 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */ | 174 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */ |
173 | 89500, 13, 13, 8, 25, 42, 25, 42 }, | 175 | 89500, 13, 13, 8, 25, 43, 25, 43 }, |
174 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */ | 176 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */ |
175 | 98900, 14, 14, 8, 26, 43, 26, 44 }, | 177 | 98900, 14, 14, 8, 26, 44, 26, 44 }, |
176 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */ | 178 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */ |
177 | 108300, 15, 15, 8, 27, 44, 27, 45 }, | 179 | 108300, 15, 15, 8, 27, 45, 28, 46 }, |
180 | { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS_HGI, 144400, /* 130 Mb */ | ||
181 | 120000, 15, 15, 8, 27, 45, 28, 46 }, | ||
178 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */ | 182 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */ |
179 | 13200, 0, 0, 8, 12, 28, 28, 28 }, | 183 | 13200, 0, 0, 8, 12, 29, 29, 29 }, |
180 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */ | 184 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */ |
181 | 25900, 1, 1, 8, 13, 29, 29, 29 }, | 185 | 25900, 1, 1, 8, 13, 30, 30, 30 }, |
182 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */ | 186 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */ |
183 | 38600, 2, 2, 8, 14, 30, 30, 30 }, | 187 | 38600, 2, 2, 8, 14, 31, 31, 31 }, |
184 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */ | 188 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */ |
185 | 49800, 3, 3, 8, 15, 31, 31, 31 }, | 189 | 49800, 3, 3, 8, 15, 32, 32, 32 }, |
186 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */ | 190 | { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */ |
187 | 72200, 4, 4, 8, 16, 32, 32, 32 }, | 191 | 72200, 4, 4, 8, 16, 33, 33, 33 }, |
188 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */ | 192 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */ |
189 | 92900, 5, 5, 8, 17, 33, 33, 33 }, | 193 | 92900, 5, 5, 8, 17, 34, 34, 34 }, |
190 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */ | 194 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */ |
191 | 102700, 6, 6, 8, 18, 34, 34, 34 }, | 195 | 102700, 6, 6, 8, 18, 35, 35, 35 }, |
192 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */ | 196 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */ |
193 | 112000, 7, 7, 8, 19, 35, 36, 36 }, | 197 | 112000, 7, 7, 8, 19, 36, 37, 37 }, |
194 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */ | 198 | { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */ |
195 | 122000, 7, 7, 8, 19, 35, 36, 36 }, | 199 | 122000, 7, 7, 8, 19, 36, 37, 37 }, |
196 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */ | 200 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */ |
197 | 25800, 8, 8, 8, 20, 37, 37, 37 }, | 201 | 25800, 8, 8, 8, 20, 38, 38, 38 }, |
198 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */ | 202 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */ |
199 | 49800, 9, 9, 8, 21, 38, 38, 38 }, | 203 | 49800, 9, 9, 8, 21, 39, 39, 39 }, |
200 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */ | 204 | { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */ |
201 | 71900, 10, 10, 8, 22, 39, 39, 39 }, | 205 | 71900, 10, 10, 8, 22, 40, 40, 40 }, |
202 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */ | 206 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */ |
203 | 92500, 11, 11, 8, 23, 40, 40, 40 }, | 207 | 92500, 11, 11, 8, 23, 41, 41, 41 }, |
204 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */ | 208 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */ |
205 | 130300, 12, 12, 8, 24, 41, 41, 41 }, | 209 | 130300, 12, 12, 8, 24, 42, 42, 42 }, |
206 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */ | 210 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */ |
207 | 162800, 13, 13, 8, 25, 42, 42, 42 }, | 211 | 162800, 13, 13, 8, 25, 43, 43, 43 }, |
208 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */ | 212 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */ |
209 | 178200, 14, 14, 8, 26, 43, 43, 43 }, | 213 | 178200, 14, 14, 8, 26, 44, 44, 44 }, |
210 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */ | 214 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */ |
211 | 192100, 15, 15, 8, 27, 44, 45, 45 }, | 215 | 192100, 15, 15, 8, 27, 45, 46, 46 }, |
212 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */ | 216 | { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */ |
213 | 207000, 15, 15, 8, 27, 44, 45, 45 }, | 217 | 207000, 15, 15, 8, 27, 45, 46, 46 }, |
214 | }, | 218 | }, |
215 | 50, /* probe interval */ | 219 | 50, /* probe interval */ |
216 | WLAN_RC_HT_FLAG, /* Phy rates allowed initially */ | 220 | WLAN_RC_HT_FLAG, /* Phy rates allowed initially */ |
@@ -1193,7 +1197,7 @@ static void ath_rc_init(struct ath_softc *sc, | |||
1193 | } | 1197 | } |
1194 | 1198 | ||
1195 | static u8 ath_rc_build_ht_caps(struct ath_softc *sc, struct ieee80211_sta *sta, | 1199 | static u8 ath_rc_build_ht_caps(struct ath_softc *sc, struct ieee80211_sta *sta, |
1196 | bool is_cw40, bool is_sgi40) | 1200 | bool is_cw40, bool is_sgi) |
1197 | { | 1201 | { |
1198 | u8 caps = 0; | 1202 | u8 caps = 0; |
1199 | 1203 | ||
@@ -1206,8 +1210,9 @@ static u8 ath_rc_build_ht_caps(struct ath_softc *sc, struct ieee80211_sta *sta, | |||
1206 | } | 1210 | } |
1207 | if (is_cw40) | 1211 | if (is_cw40) |
1208 | caps |= WLAN_RC_40_FLAG; | 1212 | caps |= WLAN_RC_40_FLAG; |
1209 | if (is_sgi40) | 1213 | if (is_sgi) |
1210 | caps |= WLAN_RC_SGI_FLAG; | 1214 | caps |= WLAN_RC_SGI_FLAG; |
1215 | |||
1211 | } | 1216 | } |
1212 | 1217 | ||
1213 | return caps; | 1218 | return caps; |
@@ -1300,7 +1305,7 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband, | |||
1300 | struct ath_softc *sc = priv; | 1305 | struct ath_softc *sc = priv; |
1301 | struct ath_rate_priv *ath_rc_priv = priv_sta; | 1306 | struct ath_rate_priv *ath_rc_priv = priv_sta; |
1302 | const struct ath_rate_table *rate_table; | 1307 | const struct ath_rate_table *rate_table; |
1303 | bool is_cw40, is_sgi40; | 1308 | bool is_cw40, is_sgi = false; |
1304 | int i, j = 0; | 1309 | int i, j = 0; |
1305 | 1310 | ||
1306 | for (i = 0; i < sband->n_bitrates; i++) { | 1311 | for (i = 0; i < sband->n_bitrates; i++) { |
@@ -1323,7 +1328,11 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband, | |||
1323 | } | 1328 | } |
1324 | 1329 | ||
1325 | is_cw40 = sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40; | 1330 | is_cw40 = sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
1326 | is_sgi40 = sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40; | 1331 | |
1332 | if (is_cw40) | ||
1333 | is_sgi = sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40; | ||
1334 | else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) | ||
1335 | is_sgi = sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20; | ||
1327 | 1336 | ||
1328 | /* Choose rate table first */ | 1337 | /* Choose rate table first */ |
1329 | 1338 | ||
@@ -1336,7 +1345,7 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband, | |||
1336 | rate_table = hw_rate_table[sc->cur_rate_mode]; | 1345 | rate_table = hw_rate_table[sc->cur_rate_mode]; |
1337 | } | 1346 | } |
1338 | 1347 | ||
1339 | ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, is_cw40, is_sgi40); | 1348 | ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, is_cw40, is_sgi); |
1340 | ath_rc_init(sc, priv_sta, sband, sta, rate_table); | 1349 | ath_rc_init(sc, priv_sta, sband, sta, rate_table); |
1341 | } | 1350 | } |
1342 | 1351 | ||
@@ -1347,10 +1356,10 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband, | |||
1347 | struct ath_softc *sc = priv; | 1356 | struct ath_softc *sc = priv; |
1348 | struct ath_rate_priv *ath_rc_priv = priv_sta; | 1357 | struct ath_rate_priv *ath_rc_priv = priv_sta; |
1349 | const struct ath_rate_table *rate_table = NULL; | 1358 | const struct ath_rate_table *rate_table = NULL; |
1350 | bool oper_cw40 = false, oper_sgi40; | 1359 | bool oper_cw40 = false, oper_sgi; |
1351 | bool local_cw40 = (ath_rc_priv->ht_cap & WLAN_RC_40_FLAG) ? | 1360 | bool local_cw40 = (ath_rc_priv->ht_cap & WLAN_RC_40_FLAG) ? |
1352 | true : false; | 1361 | true : false; |
1353 | bool local_sgi40 = (ath_rc_priv->ht_cap & WLAN_RC_SGI_FLAG) ? | 1362 | bool local_sgi = (ath_rc_priv->ht_cap & WLAN_RC_SGI_FLAG) ? |
1354 | true : false; | 1363 | true : false; |
1355 | 1364 | ||
1356 | /* FIXME: Handle AP mode later when we support CWM */ | 1365 | /* FIXME: Handle AP mode later when we support CWM */ |
@@ -1363,15 +1372,21 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband, | |||
1363 | oper_chan_type == NL80211_CHAN_HT40PLUS) | 1372 | oper_chan_type == NL80211_CHAN_HT40PLUS) |
1364 | oper_cw40 = true; | 1373 | oper_cw40 = true; |
1365 | 1374 | ||
1366 | oper_sgi40 = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? | 1375 | if (oper_cw40) |
1367 | true : false; | 1376 | oper_sgi = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? |
1377 | true : false; | ||
1378 | else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) | ||
1379 | oper_sgi = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) ? | ||
1380 | true : false; | ||
1381 | else | ||
1382 | oper_sgi = false; | ||
1368 | 1383 | ||
1369 | if ((local_cw40 != oper_cw40) || (local_sgi40 != oper_sgi40)) { | 1384 | if ((local_cw40 != oper_cw40) || (local_sgi != oper_sgi)) { |
1370 | rate_table = ath_choose_rate_table(sc, sband->band, | 1385 | rate_table = ath_choose_rate_table(sc, sband->band, |
1371 | sta->ht_cap.ht_supported, | 1386 | sta->ht_cap.ht_supported, |
1372 | oper_cw40); | 1387 | oper_cw40); |
1373 | ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, | 1388 | ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, |
1374 | oper_cw40, oper_sgi40); | 1389 | oper_cw40, oper_sgi); |
1375 | ath_rc_init(sc, priv_sta, sband, sta, rate_table); | 1390 | ath_rc_init(sc, priv_sta, sband, sta, rate_table); |
1376 | 1391 | ||
1377 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG, | 1392 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG, |
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c index ca6065b71b46..d373364ef8a9 100644 --- a/drivers/net/wireless/ath/ath9k/recv.c +++ b/drivers/net/wireless/ath/ath9k/recv.c | |||
@@ -700,12 +700,16 @@ static bool ath_edma_get_buffers(struct ath_softc *sc, | |||
700 | bf = SKB_CB_ATHBUF(skb); | 700 | bf = SKB_CB_ATHBUF(skb); |
701 | BUG_ON(!bf); | 701 | BUG_ON(!bf); |
702 | 702 | ||
703 | dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, | 703 | dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr, |
704 | common->rx_bufsize, DMA_FROM_DEVICE); | 704 | common->rx_bufsize, DMA_FROM_DEVICE); |
705 | 705 | ||
706 | ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data); | 706 | ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data); |
707 | if (ret == -EINPROGRESS) | 707 | if (ret == -EINPROGRESS) { |
708 | /*let device gain the buffer again*/ | ||
709 | dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, | ||
710 | common->rx_bufsize, DMA_FROM_DEVICE); | ||
708 | return false; | 711 | return false; |
712 | } | ||
709 | 713 | ||
710 | __skb_unlink(skb, &rx_edma->rx_fifo); | 714 | __skb_unlink(skb, &rx_edma->rx_fifo); |
711 | if (ret == -EINVAL) { | 715 | if (ret == -EINVAL) { |
@@ -814,13 +818,266 @@ static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc, | |||
814 | * 1. accessing the frame | 818 | * 1. accessing the frame |
815 | * 2. requeueing the same buffer to h/w | 819 | * 2. requeueing the same buffer to h/w |
816 | */ | 820 | */ |
817 | dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, | 821 | dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr, |
818 | common->rx_bufsize, | 822 | common->rx_bufsize, |
819 | DMA_FROM_DEVICE); | 823 | DMA_FROM_DEVICE); |
820 | 824 | ||
821 | return bf; | 825 | return bf; |
822 | } | 826 | } |
823 | 827 | ||
828 | /* Assumes you've already done the endian to CPU conversion */ | ||
829 | static bool ath9k_rx_accept(struct ath_common *common, | ||
830 | struct ieee80211_hdr *hdr, | ||
831 | struct ieee80211_rx_status *rxs, | ||
832 | struct ath_rx_status *rx_stats, | ||
833 | bool *decrypt_error) | ||
834 | { | ||
835 | struct ath_hw *ah = common->ah; | ||
836 | __le16 fc; | ||
837 | u8 rx_status_len = ah->caps.rx_status_len; | ||
838 | |||
839 | fc = hdr->frame_control; | ||
840 | |||
841 | if (!rx_stats->rs_datalen) | ||
842 | return false; | ||
843 | /* | ||
844 | * rs_status follows rs_datalen so if rs_datalen is too large | ||
845 | * we can take a hint that hardware corrupted it, so ignore | ||
846 | * those frames. | ||
847 | */ | ||
848 | if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len)) | ||
849 | return false; | ||
850 | |||
851 | /* | ||
852 | * rs_more indicates chained descriptors which can be used | ||
853 | * to link buffers together for a sort of scatter-gather | ||
854 | * operation. | ||
855 | * reject the frame, we don't support scatter-gather yet and | ||
856 | * the frame is probably corrupt anyway | ||
857 | */ | ||
858 | if (rx_stats->rs_more) | ||
859 | return false; | ||
860 | |||
861 | /* | ||
862 | * The rx_stats->rs_status will not be set until the end of the | ||
863 | * chained descriptors so it can be ignored if rs_more is set. The | ||
864 | * rs_more will be false at the last element of the chained | ||
865 | * descriptors. | ||
866 | */ | ||
867 | if (rx_stats->rs_status != 0) { | ||
868 | if (rx_stats->rs_status & ATH9K_RXERR_CRC) | ||
869 | rxs->flag |= RX_FLAG_FAILED_FCS_CRC; | ||
870 | if (rx_stats->rs_status & ATH9K_RXERR_PHY) | ||
871 | return false; | ||
872 | |||
873 | if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) { | ||
874 | *decrypt_error = true; | ||
875 | } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) { | ||
876 | if (ieee80211_is_ctl(fc)) | ||
877 | /* | ||
878 | * Sometimes, we get invalid | ||
879 | * MIC failures on valid control frames. | ||
880 | * Remove these mic errors. | ||
881 | */ | ||
882 | rx_stats->rs_status &= ~ATH9K_RXERR_MIC; | ||
883 | else | ||
884 | rxs->flag |= RX_FLAG_MMIC_ERROR; | ||
885 | } | ||
886 | /* | ||
887 | * Reject error frames with the exception of | ||
888 | * decryption and MIC failures. For monitor mode, | ||
889 | * we also ignore the CRC error. | ||
890 | */ | ||
891 | if (ah->opmode == NL80211_IFTYPE_MONITOR) { | ||
892 | if (rx_stats->rs_status & | ||
893 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | | ||
894 | ATH9K_RXERR_CRC)) | ||
895 | return false; | ||
896 | } else { | ||
897 | if (rx_stats->rs_status & | ||
898 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) { | ||
899 | return false; | ||
900 | } | ||
901 | } | ||
902 | } | ||
903 | return true; | ||
904 | } | ||
905 | |||
906 | static int ath9k_process_rate(struct ath_common *common, | ||
907 | struct ieee80211_hw *hw, | ||
908 | struct ath_rx_status *rx_stats, | ||
909 | struct ieee80211_rx_status *rxs) | ||
910 | { | ||
911 | struct ieee80211_supported_band *sband; | ||
912 | enum ieee80211_band band; | ||
913 | unsigned int i = 0; | ||
914 | |||
915 | band = hw->conf.channel->band; | ||
916 | sband = hw->wiphy->bands[band]; | ||
917 | |||
918 | if (rx_stats->rs_rate & 0x80) { | ||
919 | /* HT rate */ | ||
920 | rxs->flag |= RX_FLAG_HT; | ||
921 | if (rx_stats->rs_flags & ATH9K_RX_2040) | ||
922 | rxs->flag |= RX_FLAG_40MHZ; | ||
923 | if (rx_stats->rs_flags & ATH9K_RX_GI) | ||
924 | rxs->flag |= RX_FLAG_SHORT_GI; | ||
925 | rxs->rate_idx = rx_stats->rs_rate & 0x7f; | ||
926 | return 0; | ||
927 | } | ||
928 | |||
929 | for (i = 0; i < sband->n_bitrates; i++) { | ||
930 | if (sband->bitrates[i].hw_value == rx_stats->rs_rate) { | ||
931 | rxs->rate_idx = i; | ||
932 | return 0; | ||
933 | } | ||
934 | if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) { | ||
935 | rxs->flag |= RX_FLAG_SHORTPRE; | ||
936 | rxs->rate_idx = i; | ||
937 | return 0; | ||
938 | } | ||
939 | } | ||
940 | |||
941 | /* | ||
942 | * No valid hardware bitrate found -- we should not get here | ||
943 | * because hardware has already validated this frame as OK. | ||
944 | */ | ||
945 | ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected " | ||
946 | "0x%02x using 1 Mbit\n", rx_stats->rs_rate); | ||
947 | |||
948 | return -EINVAL; | ||
949 | } | ||
950 | |||
951 | static void ath9k_process_rssi(struct ath_common *common, | ||
952 | struct ieee80211_hw *hw, | ||
953 | struct ieee80211_hdr *hdr, | ||
954 | struct ath_rx_status *rx_stats) | ||
955 | { | ||
956 | struct ath_hw *ah = common->ah; | ||
957 | struct ieee80211_sta *sta; | ||
958 | struct ath_node *an; | ||
959 | int last_rssi = ATH_RSSI_DUMMY_MARKER; | ||
960 | __le16 fc; | ||
961 | |||
962 | fc = hdr->frame_control; | ||
963 | |||
964 | rcu_read_lock(); | ||
965 | /* | ||
966 | * XXX: use ieee80211_find_sta! This requires quite a bit of work | ||
967 | * under the current ath9k virtual wiphy implementation as we have | ||
968 | * no way of tying a vif to wiphy. Typically vifs are attached to | ||
969 | * at least one sdata of a wiphy on mac80211 but with ath9k virtual | ||
970 | * wiphy you'd have to iterate over every wiphy and each sdata. | ||
971 | */ | ||
972 | sta = ieee80211_find_sta_by_hw(hw, hdr->addr2); | ||
973 | if (sta) { | ||
974 | an = (struct ath_node *) sta->drv_priv; | ||
975 | if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && | ||
976 | !rx_stats->rs_moreaggr) | ||
977 | ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi); | ||
978 | last_rssi = an->last_rssi; | ||
979 | } | ||
980 | rcu_read_unlock(); | ||
981 | |||
982 | if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER)) | ||
983 | rx_stats->rs_rssi = ATH_EP_RND(last_rssi, | ||
984 | ATH_RSSI_EP_MULTIPLIER); | ||
985 | if (rx_stats->rs_rssi < 0) | ||
986 | rx_stats->rs_rssi = 0; | ||
987 | |||
988 | /* Update Beacon RSSI, this is used by ANI. */ | ||
989 | if (ieee80211_is_beacon(fc)) | ||
990 | ah->stats.avgbrssi = rx_stats->rs_rssi; | ||
991 | } | ||
992 | |||
993 | /* | ||
994 | * For Decrypt or Demic errors, we only mark packet status here and always push | ||
995 | * up the frame up to let mac80211 handle the actual error case, be it no | ||
996 | * decryption key or real decryption error. This let us keep statistics there. | ||
997 | */ | ||
998 | static int ath9k_rx_skb_preprocess(struct ath_common *common, | ||
999 | struct ieee80211_hw *hw, | ||
1000 | struct ieee80211_hdr *hdr, | ||
1001 | struct ath_rx_status *rx_stats, | ||
1002 | struct ieee80211_rx_status *rx_status, | ||
1003 | bool *decrypt_error) | ||
1004 | { | ||
1005 | struct ath_hw *ah = common->ah; | ||
1006 | |||
1007 | memset(rx_status, 0, sizeof(struct ieee80211_rx_status)); | ||
1008 | |||
1009 | /* | ||
1010 | * everything but the rate is checked here, the rate check is done | ||
1011 | * separately to avoid doing two lookups for a rate for each frame. | ||
1012 | */ | ||
1013 | if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error)) | ||
1014 | return -EINVAL; | ||
1015 | |||
1016 | ath9k_process_rssi(common, hw, hdr, rx_stats); | ||
1017 | |||
1018 | if (ath9k_process_rate(common, hw, rx_stats, rx_status)) | ||
1019 | return -EINVAL; | ||
1020 | |||
1021 | rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp); | ||
1022 | rx_status->band = hw->conf.channel->band; | ||
1023 | rx_status->freq = hw->conf.channel->center_freq; | ||
1024 | rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi; | ||
1025 | rx_status->antenna = rx_stats->rs_antenna; | ||
1026 | rx_status->flag |= RX_FLAG_TSFT; | ||
1027 | |||
1028 | return 0; | ||
1029 | } | ||
1030 | |||
1031 | static void ath9k_rx_skb_postprocess(struct ath_common *common, | ||
1032 | struct sk_buff *skb, | ||
1033 | struct ath_rx_status *rx_stats, | ||
1034 | struct ieee80211_rx_status *rxs, | ||
1035 | bool decrypt_error) | ||
1036 | { | ||
1037 | struct ath_hw *ah = common->ah; | ||
1038 | struct ieee80211_hdr *hdr; | ||
1039 | int hdrlen, padpos, padsize; | ||
1040 | u8 keyix; | ||
1041 | __le16 fc; | ||
1042 | |||
1043 | /* see if any padding is done by the hw and remove it */ | ||
1044 | hdr = (struct ieee80211_hdr *) skb->data; | ||
1045 | hdrlen = ieee80211_get_hdrlen_from_skb(skb); | ||
1046 | fc = hdr->frame_control; | ||
1047 | padpos = ath9k_cmn_padpos(hdr->frame_control); | ||
1048 | |||
1049 | /* The MAC header is padded to have 32-bit boundary if the | ||
1050 | * packet payload is non-zero. The general calculation for | ||
1051 | * padsize would take into account odd header lengths: | ||
1052 | * padsize = (4 - padpos % 4) % 4; However, since only | ||
1053 | * even-length headers are used, padding can only be 0 or 2 | ||
1054 | * bytes and we can optimize this a bit. In addition, we must | ||
1055 | * not try to remove padding from short control frames that do | ||
1056 | * not have payload. */ | ||
1057 | padsize = padpos & 3; | ||
1058 | if (padsize && skb->len>=padpos+padsize+FCS_LEN) { | ||
1059 | memmove(skb->data + padsize, skb->data, padpos); | ||
1060 | skb_pull(skb, padsize); | ||
1061 | } | ||
1062 | |||
1063 | keyix = rx_stats->rs_keyix; | ||
1064 | |||
1065 | if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error && | ||
1066 | ieee80211_has_protected(fc)) { | ||
1067 | rxs->flag |= RX_FLAG_DECRYPTED; | ||
1068 | } else if (ieee80211_has_protected(fc) | ||
1069 | && !decrypt_error && skb->len >= hdrlen + 4) { | ||
1070 | keyix = skb->data[hdrlen + 3] >> 6; | ||
1071 | |||
1072 | if (test_bit(keyix, common->keymap)) | ||
1073 | rxs->flag |= RX_FLAG_DECRYPTED; | ||
1074 | } | ||
1075 | if (ah->sw_mgmt_crypto && | ||
1076 | (rxs->flag & RX_FLAG_DECRYPTED) && | ||
1077 | ieee80211_is_mgmt(fc)) | ||
1078 | /* Use software decrypt for management frames. */ | ||
1079 | rxs->flag &= ~RX_FLAG_DECRYPTED; | ||
1080 | } | ||
824 | 1081 | ||
825 | int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) | 1082 | int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) |
826 | { | 1083 | { |
@@ -842,11 +1099,12 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) | |||
842 | enum ath9k_rx_qtype qtype; | 1099 | enum ath9k_rx_qtype qtype; |
843 | bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); | 1100 | bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); |
844 | int dma_type; | 1101 | int dma_type; |
1102 | u8 rx_status_len = ah->caps.rx_status_len; | ||
845 | 1103 | ||
846 | if (edma) | 1104 | if (edma) |
847 | dma_type = DMA_FROM_DEVICE; | ||
848 | else | ||
849 | dma_type = DMA_BIDIRECTIONAL; | 1105 | dma_type = DMA_BIDIRECTIONAL; |
1106 | else | ||
1107 | dma_type = DMA_FROM_DEVICE; | ||
850 | 1108 | ||
851 | qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP; | 1109 | qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP; |
852 | spin_lock_bh(&sc->rx.rxbuflock); | 1110 | spin_lock_bh(&sc->rx.rxbuflock); |
@@ -869,7 +1127,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) | |||
869 | if (!skb) | 1127 | if (!skb) |
870 | continue; | 1128 | continue; |
871 | 1129 | ||
872 | hdr = (struct ieee80211_hdr *) skb->data; | 1130 | hdr = (struct ieee80211_hdr *) (skb->data + rx_status_len); |
873 | rxs = IEEE80211_SKB_RXCB(skb); | 1131 | rxs = IEEE80211_SKB_RXCB(skb); |
874 | 1132 | ||
875 | hw = ath_get_virt_hw(sc, hdr); | 1133 | hw = ath_get_virt_hw(sc, hdr); |
@@ -883,8 +1141,8 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) | |||
883 | if (flush) | 1141 | if (flush) |
884 | goto requeue; | 1142 | goto requeue; |
885 | 1143 | ||
886 | retval = ath9k_cmn_rx_skb_preprocess(common, hw, skb, &rs, | 1144 | retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs, |
887 | rxs, &decrypt_error); | 1145 | rxs, &decrypt_error); |
888 | if (retval) | 1146 | if (retval) |
889 | goto requeue; | 1147 | goto requeue; |
890 | 1148 | ||
@@ -908,8 +1166,8 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp) | |||
908 | if (ah->caps.rx_status_len) | 1166 | if (ah->caps.rx_status_len) |
909 | skb_pull(skb, ah->caps.rx_status_len); | 1167 | skb_pull(skb, ah->caps.rx_status_len); |
910 | 1168 | ||
911 | ath9k_cmn_rx_skb_postprocess(common, skb, &rs, | 1169 | ath9k_rx_skb_postprocess(common, skb, &rs, |
912 | rxs, decrypt_error); | 1170 | rxs, decrypt_error); |
913 | 1171 | ||
914 | /* We will now give hardware our shiny new allocated skb */ | 1172 | /* We will now give hardware our shiny new allocated skb */ |
915 | bf->bf_mpdu = requeue_skb; | 1173 | bf->bf_mpdu = requeue_skb; |
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index d4371a43bdaa..3e3ccef438db 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
@@ -222,6 +222,7 @@ | |||
222 | 222 | ||
223 | #define AR_ISR_S2 0x008c | 223 | #define AR_ISR_S2 0x008c |
224 | #define AR_ISR_S2_QCU_TXURN 0x000003FF | 224 | #define AR_ISR_S2_QCU_TXURN 0x000003FF |
225 | #define AR_ISR_S2_BB_WATCHDOG 0x00010000 | ||
225 | #define AR_ISR_S2_CST 0x00400000 | 226 | #define AR_ISR_S2_CST 0x00400000 |
226 | #define AR_ISR_S2_GTT 0x00800000 | 227 | #define AR_ISR_S2_GTT 0x00800000 |
227 | #define AR_ISR_S2_TIM 0x01000000 | 228 | #define AR_ISR_S2_TIM 0x01000000 |
@@ -699,6 +700,9 @@ | |||
699 | #define AR_RC_HOSTIF 0x00000100 | 700 | #define AR_RC_HOSTIF 0x00000100 |
700 | 701 | ||
701 | #define AR_WA 0x4004 | 702 | #define AR_WA 0x4004 |
703 | #define AR_WA_BIT6 (1 << 6) | ||
704 | #define AR_WA_BIT7 (1 << 7) | ||
705 | #define AR_WA_BIT23 (1 << 23) | ||
702 | #define AR_WA_D3_L1_DISABLE (1 << 14) | 706 | #define AR_WA_D3_L1_DISABLE (1 << 14) |
703 | #define AR9285_WA_DEFAULT 0x004a050b | 707 | #define AR9285_WA_DEFAULT 0x004a050b |
704 | #define AR9280_WA_DEFAULT 0x0040073b | 708 | #define AR9280_WA_DEFAULT 0x0040073b |
@@ -756,32 +760,33 @@ | |||
756 | #define AR_SREV_REVISION2 0x00000F00 | 760 | #define AR_SREV_REVISION2 0x00000F00 |
757 | #define AR_SREV_REVISION2_S 8 | 761 | #define AR_SREV_REVISION2_S 8 |
758 | 762 | ||
759 | #define AR_SREV_VERSION_5416_PCI 0xD | 763 | #define AR_SREV_VERSION_5416_PCI 0xD |
760 | #define AR_SREV_VERSION_5416_PCIE 0xC | 764 | #define AR_SREV_VERSION_5416_PCIE 0xC |
761 | #define AR_SREV_REVISION_5416_10 0 | 765 | #define AR_SREV_REVISION_5416_10 0 |
762 | #define AR_SREV_REVISION_5416_20 1 | 766 | #define AR_SREV_REVISION_5416_20 1 |
763 | #define AR_SREV_REVISION_5416_22 2 | 767 | #define AR_SREV_REVISION_5416_22 2 |
764 | #define AR_SREV_VERSION_9100 0x14 | 768 | #define AR_SREV_VERSION_9100 0x14 |
765 | #define AR_SREV_VERSION_9160 0x40 | 769 | #define AR_SREV_VERSION_9160 0x40 |
766 | #define AR_SREV_REVISION_9160_10 0 | 770 | #define AR_SREV_REVISION_9160_10 0 |
767 | #define AR_SREV_REVISION_9160_11 1 | 771 | #define AR_SREV_REVISION_9160_11 1 |
768 | #define AR_SREV_VERSION_9280 0x80 | 772 | #define AR_SREV_VERSION_9280 0x80 |
769 | #define AR_SREV_REVISION_9280_10 0 | 773 | #define AR_SREV_REVISION_9280_10 0 |
770 | #define AR_SREV_REVISION_9280_20 1 | 774 | #define AR_SREV_REVISION_9280_20 1 |
771 | #define AR_SREV_REVISION_9280_21 2 | 775 | #define AR_SREV_REVISION_9280_21 2 |
772 | #define AR_SREV_VERSION_9285 0xC0 | 776 | #define AR_SREV_VERSION_9285 0xC0 |
773 | #define AR_SREV_REVISION_9285_10 0 | 777 | #define AR_SREV_REVISION_9285_10 0 |
774 | #define AR_SREV_REVISION_9285_11 1 | 778 | #define AR_SREV_REVISION_9285_11 1 |
775 | #define AR_SREV_REVISION_9285_12 2 | 779 | #define AR_SREV_REVISION_9285_12 2 |
776 | #define AR_SREV_VERSION_9287 0x180 | 780 | #define AR_SREV_VERSION_9287 0x180 |
777 | #define AR_SREV_REVISION_9287_10 0 | 781 | #define AR_SREV_REVISION_9287_10 0 |
778 | #define AR_SREV_REVISION_9287_11 1 | 782 | #define AR_SREV_REVISION_9287_11 1 |
779 | #define AR_SREV_REVISION_9287_12 2 | 783 | #define AR_SREV_REVISION_9287_12 2 |
780 | #define AR_SREV_VERSION_9271 0x140 | 784 | #define AR_SREV_REVISION_9287_13 3 |
781 | #define AR_SREV_REVISION_9271_10 0 | 785 | #define AR_SREV_VERSION_9271 0x140 |
782 | #define AR_SREV_REVISION_9271_11 1 | 786 | #define AR_SREV_REVISION_9271_10 0 |
783 | #define AR_SREV_VERSION_9300 0x1c0 | 787 | #define AR_SREV_REVISION_9271_11 1 |
784 | #define AR_SREV_REVISION_9300_20 2 /* 2.0 and 2.1 */ | 788 | #define AR_SREV_VERSION_9300 0x1c0 |
789 | #define AR_SREV_REVISION_9300_20 2 /* 2.0 and 2.1 */ | ||
785 | 790 | ||
786 | #define AR_SREV_5416(_ah) \ | 791 | #define AR_SREV_5416(_ah) \ |
787 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \ | 792 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \ |
@@ -859,6 +864,11 @@ | |||
859 | (((_ah)->hw_version.macVersion > AR_SREV_VERSION_9287) || \ | 864 | (((_ah)->hw_version.macVersion > AR_SREV_VERSION_9287) || \ |
860 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287) && \ | 865 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287) && \ |
861 | ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9287_12))) | 866 | ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9287_12))) |
867 | #define AR_SREV_9287_13_OR_LATER(_ah) \ | ||
868 | (((_ah)->hw_version.macVersion > AR_SREV_VERSION_9287) || \ | ||
869 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287) && \ | ||
870 | ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9287_13))) | ||
871 | |||
862 | #define AR_SREV_9271(_ah) \ | 872 | #define AR_SREV_9271(_ah) \ |
863 | (((_ah))->hw_version.macVersion == AR_SREV_VERSION_9271) | 873 | (((_ah))->hw_version.macVersion == AR_SREV_VERSION_9271) |
864 | #define AR_SREV_9271_10(_ah) \ | 874 | #define AR_SREV_9271_10(_ah) \ |
diff --git a/drivers/net/wireless/ath/ath9k/wmi.c b/drivers/net/wireless/ath/ath9k/wmi.c index e23172c9caaf..6260faa658a2 100644 --- a/drivers/net/wireless/ath/ath9k/wmi.c +++ b/drivers/net/wireless/ath/ath9k/wmi.c | |||
@@ -279,9 +279,6 @@ int ath9k_wmi_cmd(struct wmi *wmi, enum wmi_cmd_id cmd_id, | |||
279 | if (wmi->drv_priv->op_flags & OP_UNPLUGGED) | 279 | if (wmi->drv_priv->op_flags & OP_UNPLUGGED) |
280 | return 0; | 280 | return 0; |
281 | 281 | ||
282 | if (!wmi) | ||
283 | return -EINVAL; | ||
284 | |||
285 | skb = alloc_skb(headroom + cmd_len, GFP_ATOMIC); | 282 | skb = alloc_skb(headroom + cmd_len, GFP_ATOMIC); |
286 | if (!skb) | 283 | if (!skb) |
287 | return -ENOMEM; | 284 | return -ENOMEM; |
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c index 859aa4ab0769..7547c8f9a584 100644 --- a/drivers/net/wireless/ath/ath9k/xmit.c +++ b/drivers/net/wireless/ath/ath9k/xmit.c | |||
@@ -984,32 +984,6 @@ int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype) | |||
984 | return qnum; | 984 | return qnum; |
985 | } | 985 | } |
986 | 986 | ||
987 | struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb) | ||
988 | { | ||
989 | struct ath_txq *txq = NULL; | ||
990 | u16 skb_queue = skb_get_queue_mapping(skb); | ||
991 | int qnum; | ||
992 | |||
993 | qnum = ath_get_hal_qnum(skb_queue, sc); | ||
994 | txq = &sc->tx.txq[qnum]; | ||
995 | |||
996 | spin_lock_bh(&txq->axq_lock); | ||
997 | |||
998 | if (txq->axq_depth >= (ATH_TXBUF - 20)) { | ||
999 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_XMIT, | ||
1000 | "TX queue: %d is full, depth: %d\n", | ||
1001 | qnum, txq->axq_depth); | ||
1002 | ath_mac80211_stop_queue(sc, skb_queue); | ||
1003 | txq->stopped = 1; | ||
1004 | spin_unlock_bh(&txq->axq_lock); | ||
1005 | return NULL; | ||
1006 | } | ||
1007 | |||
1008 | spin_unlock_bh(&txq->axq_lock); | ||
1009 | |||
1010 | return txq; | ||
1011 | } | ||
1012 | |||
1013 | int ath_txq_update(struct ath_softc *sc, int qnum, | 987 | int ath_txq_update(struct ath_softc *sc, int qnum, |
1014 | struct ath9k_tx_queue_info *qinfo) | 988 | struct ath9k_tx_queue_info *qinfo) |
1015 | { | 989 | { |
@@ -1809,6 +1783,7 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
1809 | struct ath_wiphy *aphy = hw->priv; | 1783 | struct ath_wiphy *aphy = hw->priv; |
1810 | struct ath_softc *sc = aphy->sc; | 1784 | struct ath_softc *sc = aphy->sc; |
1811 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | 1785 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
1786 | struct ath_txq *txq = txctl->txq; | ||
1812 | struct ath_buf *bf; | 1787 | struct ath_buf *bf; |
1813 | int r; | 1788 | int r; |
1814 | 1789 | ||
@@ -1818,10 +1793,16 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
1818 | return -1; | 1793 | return -1; |
1819 | } | 1794 | } |
1820 | 1795 | ||
1796 | bf->txq = txctl->txq; | ||
1797 | spin_lock_bh(&bf->txq->axq_lock); | ||
1798 | if (++bf->txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) { | ||
1799 | ath_mac80211_stop_queue(sc, skb_get_queue_mapping(skb)); | ||
1800 | txq->stopped = 1; | ||
1801 | } | ||
1802 | spin_unlock_bh(&bf->txq->axq_lock); | ||
1803 | |||
1821 | r = ath_tx_setup_buffer(hw, bf, skb, txctl); | 1804 | r = ath_tx_setup_buffer(hw, bf, skb, txctl); |
1822 | if (unlikely(r)) { | 1805 | if (unlikely(r)) { |
1823 | struct ath_txq *txq = txctl->txq; | ||
1824 | |||
1825 | ath_print(common, ATH_DBG_FATAL, "TX mem alloc failure\n"); | 1806 | ath_print(common, ATH_DBG_FATAL, "TX mem alloc failure\n"); |
1826 | 1807 | ||
1827 | /* upon ath_tx_processq() this TX queue will be resumed, we | 1808 | /* upon ath_tx_processq() this TX queue will be resumed, we |
@@ -1829,7 +1810,7 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
1829 | * we will at least have to run TX completionon one buffer | 1810 | * we will at least have to run TX completionon one buffer |
1830 | * on the queue */ | 1811 | * on the queue */ |
1831 | spin_lock_bh(&txq->axq_lock); | 1812 | spin_lock_bh(&txq->axq_lock); |
1832 | if (sc->tx.txq[txq->axq_qnum].axq_depth > 1) { | 1813 | if (!txq->stopped && txq->axq_depth > 1) { |
1833 | ath_mac80211_stop_queue(sc, skb_get_queue_mapping(skb)); | 1814 | ath_mac80211_stop_queue(sc, skb_get_queue_mapping(skb)); |
1834 | txq->stopped = 1; | 1815 | txq->stopped = 1; |
1835 | } | 1816 | } |
@@ -1970,6 +1951,13 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, | |||
1970 | tx_flags |= ATH_TX_XRETRY; | 1951 | tx_flags |= ATH_TX_XRETRY; |
1971 | } | 1952 | } |
1972 | 1953 | ||
1954 | if (bf->txq) { | ||
1955 | spin_lock_bh(&bf->txq->axq_lock); | ||
1956 | bf->txq->pending_frames--; | ||
1957 | spin_unlock_bh(&bf->txq->axq_lock); | ||
1958 | bf->txq = NULL; | ||
1959 | } | ||
1960 | |||
1973 | dma_unmap_single(sc->dev, bf->bf_dmacontext, skb->len, DMA_TO_DEVICE); | 1961 | dma_unmap_single(sc->dev, bf->bf_dmacontext, skb->len, DMA_TO_DEVICE); |
1974 | ath_tx_complete(sc, skb, bf->aphy, tx_flags); | 1962 | ath_tx_complete(sc, skb, bf->aphy, tx_flags); |
1975 | ath_debug_stat_tx(sc, txq, bf, ts); | 1963 | ath_debug_stat_tx(sc, txq, bf, ts); |
@@ -2058,8 +2046,7 @@ static void ath_wake_mac80211_queue(struct ath_softc *sc, struct ath_txq *txq) | |||
2058 | int qnum; | 2046 | int qnum; |
2059 | 2047 | ||
2060 | spin_lock_bh(&txq->axq_lock); | 2048 | spin_lock_bh(&txq->axq_lock); |
2061 | if (txq->stopped && | 2049 | if (txq->stopped && txq->pending_frames < ATH_MAX_QDEPTH) { |
2062 | sc->tx.txq[txq->axq_qnum].axq_depth <= (ATH_TXBUF - 20)) { | ||
2063 | qnum = ath_get_mac80211_qnum(txq->axq_qnum, sc); | 2050 | qnum = ath_get_mac80211_qnum(txq->axq_qnum, sc); |
2064 | if (qnum != -1) { | 2051 | if (qnum != -1) { |
2065 | ath_mac80211_start_queue(sc, qnum); | 2052 | ath_mac80211_start_queue(sc, qnum); |
@@ -2279,6 +2266,17 @@ void ath_tx_edma_tasklet(struct ath_softc *sc) | |||
2279 | 2266 | ||
2280 | txok = !(txs.ts_status & ATH9K_TXERR_MASK); | 2267 | txok = !(txs.ts_status & ATH9K_TXERR_MASK); |
2281 | 2268 | ||
2269 | /* | ||
2270 | * Make sure null func frame is acked before configuring | ||
2271 | * hw into ps mode. | ||
2272 | */ | ||
2273 | if (bf->bf_isnullfunc && txok) { | ||
2274 | if ((sc->ps_flags & PS_ENABLED)) | ||
2275 | ath9k_enable_ps(sc); | ||
2276 | else | ||
2277 | sc->ps_flags |= PS_NULLFUNC_COMPLETED; | ||
2278 | } | ||
2279 | |||
2282 | if (!bf_isampdu(bf)) { | 2280 | if (!bf_isampdu(bf)) { |
2283 | bf->bf_retries = txs.ts_longretry; | 2281 | bf->bf_retries = txs.ts_longretry; |
2284 | if (txs.ts_status & ATH9K_TXERR_XRETRY) | 2282 | if (txs.ts_status & ATH9K_TXERR_XRETRY) |
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h index 3a003e6803a5..8674a99356af 100644 --- a/drivers/net/wireless/b43/b43.h +++ b/drivers/net/wireless/b43/b43.h | |||
@@ -530,7 +530,7 @@ struct b43_fw_header { | |||
530 | /* Size of the data. For ucode and PCM this is in bytes. | 530 | /* Size of the data. For ucode and PCM this is in bytes. |
531 | * For IV this is number-of-ivs. */ | 531 | * For IV this is number-of-ivs. */ |
532 | __be32 size; | 532 | __be32 size; |
533 | } __attribute__((__packed__)); | 533 | } __packed; |
534 | 534 | ||
535 | /* Initial Value file format */ | 535 | /* Initial Value file format */ |
536 | #define B43_IV_OFFSET_MASK 0x7FFF | 536 | #define B43_IV_OFFSET_MASK 0x7FFF |
@@ -540,8 +540,8 @@ struct b43_iv { | |||
540 | union { | 540 | union { |
541 | __be16 d16; | 541 | __be16 d16; |
542 | __be32 d32; | 542 | __be32 d32; |
543 | } data __attribute__((__packed__)); | 543 | } data __packed; |
544 | } __attribute__((__packed__)); | 544 | } __packed; |
545 | 545 | ||
546 | 546 | ||
547 | /* Data structures for DMA transmission, per 80211 core. */ | 547 | /* Data structures for DMA transmission, per 80211 core. */ |
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c index fa40fdfea719..10d0aaf754c5 100644 --- a/drivers/net/wireless/b43/dma.c +++ b/drivers/net/wireless/b43/dma.c | |||
@@ -333,11 +333,11 @@ static inline | |||
333 | dma_addr_t dmaaddr; | 333 | dma_addr_t dmaaddr; |
334 | 334 | ||
335 | if (tx) { | 335 | if (tx) { |
336 | dmaaddr = ssb_dma_map_single(ring->dev->dev, | 336 | dmaaddr = dma_map_single(ring->dev->dev->dma_dev, |
337 | buf, len, DMA_TO_DEVICE); | 337 | buf, len, DMA_TO_DEVICE); |
338 | } else { | 338 | } else { |
339 | dmaaddr = ssb_dma_map_single(ring->dev->dev, | 339 | dmaaddr = dma_map_single(ring->dev->dev->dma_dev, |
340 | buf, len, DMA_FROM_DEVICE); | 340 | buf, len, DMA_FROM_DEVICE); |
341 | } | 341 | } |
342 | 342 | ||
343 | return dmaaddr; | 343 | return dmaaddr; |
@@ -348,11 +348,11 @@ static inline | |||
348 | dma_addr_t addr, size_t len, int tx) | 348 | dma_addr_t addr, size_t len, int tx) |
349 | { | 349 | { |
350 | if (tx) { | 350 | if (tx) { |
351 | ssb_dma_unmap_single(ring->dev->dev, | 351 | dma_unmap_single(ring->dev->dev->dma_dev, |
352 | addr, len, DMA_TO_DEVICE); | 352 | addr, len, DMA_TO_DEVICE); |
353 | } else { | 353 | } else { |
354 | ssb_dma_unmap_single(ring->dev->dev, | 354 | dma_unmap_single(ring->dev->dev->dma_dev, |
355 | addr, len, DMA_FROM_DEVICE); | 355 | addr, len, DMA_FROM_DEVICE); |
356 | } | 356 | } |
357 | } | 357 | } |
358 | 358 | ||
@@ -361,7 +361,7 @@ static inline | |||
361 | dma_addr_t addr, size_t len) | 361 | dma_addr_t addr, size_t len) |
362 | { | 362 | { |
363 | B43_WARN_ON(ring->tx); | 363 | B43_WARN_ON(ring->tx); |
364 | ssb_dma_sync_single_for_cpu(ring->dev->dev, | 364 | dma_sync_single_for_cpu(ring->dev->dev->dma_dev, |
365 | addr, len, DMA_FROM_DEVICE); | 365 | addr, len, DMA_FROM_DEVICE); |
366 | } | 366 | } |
367 | 367 | ||
@@ -370,8 +370,8 @@ static inline | |||
370 | dma_addr_t addr, size_t len) | 370 | dma_addr_t addr, size_t len) |
371 | { | 371 | { |
372 | B43_WARN_ON(ring->tx); | 372 | B43_WARN_ON(ring->tx); |
373 | ssb_dma_sync_single_for_device(ring->dev->dev, | 373 | dma_sync_single_for_device(ring->dev->dev->dma_dev, |
374 | addr, len, DMA_FROM_DEVICE); | 374 | addr, len, DMA_FROM_DEVICE); |
375 | } | 375 | } |
376 | 376 | ||
377 | static inline | 377 | static inline |
@@ -401,9 +401,9 @@ static int alloc_ringmemory(struct b43_dmaring *ring) | |||
401 | */ | 401 | */ |
402 | if (ring->type == B43_DMA_64BIT) | 402 | if (ring->type == B43_DMA_64BIT) |
403 | flags |= GFP_DMA; | 403 | flags |= GFP_DMA; |
404 | ring->descbase = ssb_dma_alloc_consistent(ring->dev->dev, | 404 | ring->descbase = dma_alloc_coherent(ring->dev->dev->dma_dev, |
405 | B43_DMA_RINGMEMSIZE, | 405 | B43_DMA_RINGMEMSIZE, |
406 | &(ring->dmabase), flags); | 406 | &(ring->dmabase), flags); |
407 | if (!ring->descbase) { | 407 | if (!ring->descbase) { |
408 | b43err(ring->dev->wl, "DMA ringmemory allocation failed\n"); | 408 | b43err(ring->dev->wl, "DMA ringmemory allocation failed\n"); |
409 | return -ENOMEM; | 409 | return -ENOMEM; |
@@ -420,8 +420,8 @@ static void free_ringmemory(struct b43_dmaring *ring) | |||
420 | if (ring->type == B43_DMA_64BIT) | 420 | if (ring->type == B43_DMA_64BIT) |
421 | flags |= GFP_DMA; | 421 | flags |= GFP_DMA; |
422 | 422 | ||
423 | ssb_dma_free_consistent(ring->dev->dev, B43_DMA_RINGMEMSIZE, | 423 | dma_free_coherent(ring->dev->dev->dma_dev, B43_DMA_RINGMEMSIZE, |
424 | ring->descbase, ring->dmabase, flags); | 424 | ring->descbase, ring->dmabase); |
425 | } | 425 | } |
426 | 426 | ||
427 | /* Reset the RX DMA channel */ | 427 | /* Reset the RX DMA channel */ |
@@ -528,7 +528,7 @@ static bool b43_dma_mapping_error(struct b43_dmaring *ring, | |||
528 | dma_addr_t addr, | 528 | dma_addr_t addr, |
529 | size_t buffersize, bool dma_to_device) | 529 | size_t buffersize, bool dma_to_device) |
530 | { | 530 | { |
531 | if (unlikely(ssb_dma_mapping_error(ring->dev->dev, addr))) | 531 | if (unlikely(dma_mapping_error(ring->dev->dev->dma_dev, addr))) |
532 | return 1; | 532 | return 1; |
533 | 533 | ||
534 | switch (ring->type) { | 534 | switch (ring->type) { |
@@ -874,10 +874,10 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev, | |||
874 | goto err_kfree_meta; | 874 | goto err_kfree_meta; |
875 | 875 | ||
876 | /* test for ability to dma to txhdr_cache */ | 876 | /* test for ability to dma to txhdr_cache */ |
877 | dma_test = ssb_dma_map_single(dev->dev, | 877 | dma_test = dma_map_single(dev->dev->dma_dev, |
878 | ring->txhdr_cache, | 878 | ring->txhdr_cache, |
879 | b43_txhdr_size(dev), | 879 | b43_txhdr_size(dev), |
880 | DMA_TO_DEVICE); | 880 | DMA_TO_DEVICE); |
881 | 881 | ||
882 | if (b43_dma_mapping_error(ring, dma_test, | 882 | if (b43_dma_mapping_error(ring, dma_test, |
883 | b43_txhdr_size(dev), 1)) { | 883 | b43_txhdr_size(dev), 1)) { |
@@ -889,10 +889,10 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev, | |||
889 | if (!ring->txhdr_cache) | 889 | if (!ring->txhdr_cache) |
890 | goto err_kfree_meta; | 890 | goto err_kfree_meta; |
891 | 891 | ||
892 | dma_test = ssb_dma_map_single(dev->dev, | 892 | dma_test = dma_map_single(dev->dev->dma_dev, |
893 | ring->txhdr_cache, | 893 | ring->txhdr_cache, |
894 | b43_txhdr_size(dev), | 894 | b43_txhdr_size(dev), |
895 | DMA_TO_DEVICE); | 895 | DMA_TO_DEVICE); |
896 | 896 | ||
897 | if (b43_dma_mapping_error(ring, dma_test, | 897 | if (b43_dma_mapping_error(ring, dma_test, |
898 | b43_txhdr_size(dev), 1)) { | 898 | b43_txhdr_size(dev), 1)) { |
@@ -903,9 +903,9 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev, | |||
903 | } | 903 | } |
904 | } | 904 | } |
905 | 905 | ||
906 | ssb_dma_unmap_single(dev->dev, | 906 | dma_unmap_single(dev->dev->dma_dev, |
907 | dma_test, b43_txhdr_size(dev), | 907 | dma_test, b43_txhdr_size(dev), |
908 | DMA_TO_DEVICE); | 908 | DMA_TO_DEVICE); |
909 | } | 909 | } |
910 | 910 | ||
911 | err = alloc_ringmemory(ring); | 911 | err = alloc_ringmemory(ring); |
@@ -1018,9 +1018,12 @@ static int b43_dma_set_mask(struct b43_wldev *dev, u64 mask) | |||
1018 | /* Try to set the DMA mask. If it fails, try falling back to a | 1018 | /* Try to set the DMA mask. If it fails, try falling back to a |
1019 | * lower mask, as we can always also support a lower one. */ | 1019 | * lower mask, as we can always also support a lower one. */ |
1020 | while (1) { | 1020 | while (1) { |
1021 | err = ssb_dma_set_mask(dev->dev, mask); | 1021 | err = dma_set_mask(dev->dev->dma_dev, mask); |
1022 | if (!err) | 1022 | if (!err) { |
1023 | break; | 1023 | err = dma_set_coherent_mask(dev->dev->dma_dev, mask); |
1024 | if (!err) | ||
1025 | break; | ||
1026 | } | ||
1024 | if (mask == DMA_BIT_MASK(64)) { | 1027 | if (mask == DMA_BIT_MASK(64)) { |
1025 | mask = DMA_BIT_MASK(32); | 1028 | mask = DMA_BIT_MASK(32); |
1026 | fallback = 1; | 1029 | fallback = 1; |
@@ -1221,14 +1224,14 @@ static int dma_tx_fragment(struct b43_dmaring *ring, | |||
1221 | meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); | 1224 | meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); |
1222 | /* create a bounce buffer in zone_dma on mapping failure. */ | 1225 | /* create a bounce buffer in zone_dma on mapping failure. */ |
1223 | if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { | 1226 | if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { |
1224 | priv_info->bouncebuffer = kmalloc(skb->len, GFP_ATOMIC | GFP_DMA); | 1227 | priv_info->bouncebuffer = kmemdup(skb->data, skb->len, |
1228 | GFP_ATOMIC | GFP_DMA); | ||
1225 | if (!priv_info->bouncebuffer) { | 1229 | if (!priv_info->bouncebuffer) { |
1226 | ring->current_slot = old_top_slot; | 1230 | ring->current_slot = old_top_slot; |
1227 | ring->used_slots = old_used_slots; | 1231 | ring->used_slots = old_used_slots; |
1228 | err = -ENOMEM; | 1232 | err = -ENOMEM; |
1229 | goto out_unmap_hdr; | 1233 | goto out_unmap_hdr; |
1230 | } | 1234 | } |
1231 | memcpy(priv_info->bouncebuffer, skb->data, skb->len); | ||
1232 | 1235 | ||
1233 | meta->dmaaddr = map_descbuffer(ring, priv_info->bouncebuffer, skb->len, 1); | 1236 | meta->dmaaddr = map_descbuffer(ring, priv_info->bouncebuffer, skb->len, 1); |
1234 | if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { | 1237 | if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { |
diff --git a/drivers/net/wireless/b43/dma.h b/drivers/net/wireless/b43/dma.h index dc91944d6022..a01c2100f166 100644 --- a/drivers/net/wireless/b43/dma.h +++ b/drivers/net/wireless/b43/dma.h | |||
@@ -67,7 +67,7 @@ | |||
67 | struct b43_dmadesc32 { | 67 | struct b43_dmadesc32 { |
68 | __le32 control; | 68 | __le32 control; |
69 | __le32 address; | 69 | __le32 address; |
70 | } __attribute__ ((__packed__)); | 70 | } __packed; |
71 | #define B43_DMA32_DCTL_BYTECNT 0x00001FFF | 71 | #define B43_DMA32_DCTL_BYTECNT 0x00001FFF |
72 | #define B43_DMA32_DCTL_ADDREXT_MASK 0x00030000 | 72 | #define B43_DMA32_DCTL_ADDREXT_MASK 0x00030000 |
73 | #define B43_DMA32_DCTL_ADDREXT_SHIFT 16 | 73 | #define B43_DMA32_DCTL_ADDREXT_SHIFT 16 |
@@ -140,7 +140,7 @@ struct b43_dmadesc64 { | |||
140 | __le32 control1; | 140 | __le32 control1; |
141 | __le32 address_low; | 141 | __le32 address_low; |
142 | __le32 address_high; | 142 | __le32 address_high; |
143 | } __attribute__ ((__packed__)); | 143 | } __packed; |
144 | #define B43_DMA64_DCTL0_DTABLEEND 0x10000000 | 144 | #define B43_DMA64_DCTL0_DTABLEEND 0x10000000 |
145 | #define B43_DMA64_DCTL0_IRQ 0x20000000 | 145 | #define B43_DMA64_DCTL0_IRQ 0x20000000 |
146 | #define B43_DMA64_DCTL0_FRAMEEND 0x40000000 | 146 | #define B43_DMA64_DCTL0_FRAMEEND 0x40000000 |
@@ -153,8 +153,8 @@ struct b43_dmadesc_generic { | |||
153 | union { | 153 | union { |
154 | struct b43_dmadesc32 dma32; | 154 | struct b43_dmadesc32 dma32; |
155 | struct b43_dmadesc64 dma64; | 155 | struct b43_dmadesc64 dma64; |
156 | } __attribute__ ((__packed__)); | 156 | } __packed; |
157 | } __attribute__ ((__packed__)); | 157 | } __packed; |
158 | 158 | ||
159 | /* Misc DMA constants */ | 159 | /* Misc DMA constants */ |
160 | #define B43_DMA_RINGMEMSIZE PAGE_SIZE | 160 | #define B43_DMA_RINGMEMSIZE PAGE_SIZE |
diff --git a/drivers/net/wireless/b43/xmit.h b/drivers/net/wireless/b43/xmit.h index d23ff9fe0c9e..d4cf9b390af3 100644 --- a/drivers/net/wireless/b43/xmit.h +++ b/drivers/net/wireless/b43/xmit.h | |||
@@ -10,8 +10,8 @@ | |||
10 | union { \ | 10 | union { \ |
11 | __le32 data; \ | 11 | __le32 data; \ |
12 | __u8 raw[size]; \ | 12 | __u8 raw[size]; \ |
13 | } __attribute__((__packed__)); \ | 13 | } __packed; \ |
14 | } __attribute__((__packed__)) | 14 | } __packed |
15 | 15 | ||
16 | /* struct b43_plcp_hdr4 */ | 16 | /* struct b43_plcp_hdr4 */ |
17 | _b43_declare_plcp_hdr(4); | 17 | _b43_declare_plcp_hdr(4); |
@@ -57,7 +57,7 @@ struct b43_txhdr { | |||
57 | __u8 rts_frame[16]; /* The RTS frame (if used) */ | 57 | __u8 rts_frame[16]; /* The RTS frame (if used) */ |
58 | PAD_BYTES(2); | 58 | PAD_BYTES(2); |
59 | struct b43_plcp_hdr6 plcp; /* Main PLCP header */ | 59 | struct b43_plcp_hdr6 plcp; /* Main PLCP header */ |
60 | } new_format __attribute__ ((__packed__)); | 60 | } new_format __packed; |
61 | 61 | ||
62 | /* The old r351 format. */ | 62 | /* The old r351 format. */ |
63 | struct { | 63 | struct { |
@@ -68,10 +68,10 @@ struct b43_txhdr { | |||
68 | __u8 rts_frame[16]; /* The RTS frame (if used) */ | 68 | __u8 rts_frame[16]; /* The RTS frame (if used) */ |
69 | PAD_BYTES(2); | 69 | PAD_BYTES(2); |
70 | struct b43_plcp_hdr6 plcp; /* Main PLCP header */ | 70 | struct b43_plcp_hdr6 plcp; /* Main PLCP header */ |
71 | } old_format __attribute__ ((__packed__)); | 71 | } old_format __packed; |
72 | 72 | ||
73 | } __attribute__ ((__packed__)); | 73 | } __packed; |
74 | } __attribute__ ((__packed__)); | 74 | } __packed; |
75 | 75 | ||
76 | /* MAC TX control */ | 76 | /* MAC TX control */ |
77 | #define B43_TXH_MAC_USEFBR 0x10000000 /* Use fallback rate for this AMPDU */ | 77 | #define B43_TXH_MAC_USEFBR 0x10000000 /* Use fallback rate for this AMPDU */ |
@@ -218,20 +218,20 @@ struct b43_rxhdr_fw4 { | |||
218 | struct { | 218 | struct { |
219 | __u8 jssi; /* PHY RX Status 1: JSSI */ | 219 | __u8 jssi; /* PHY RX Status 1: JSSI */ |
220 | __u8 sig_qual; /* PHY RX Status 1: Signal Quality */ | 220 | __u8 sig_qual; /* PHY RX Status 1: Signal Quality */ |
221 | } __attribute__ ((__packed__)); | 221 | } __packed; |
222 | 222 | ||
223 | /* RSSI for N-PHYs */ | 223 | /* RSSI for N-PHYs */ |
224 | struct { | 224 | struct { |
225 | __s8 power0; /* PHY RX Status 1: Power 0 */ | 225 | __s8 power0; /* PHY RX Status 1: Power 0 */ |
226 | __s8 power1; /* PHY RX Status 1: Power 1 */ | 226 | __s8 power1; /* PHY RX Status 1: Power 1 */ |
227 | } __attribute__ ((__packed__)); | 227 | } __packed; |
228 | } __attribute__ ((__packed__)); | 228 | } __packed; |
229 | __le16 phy_status2; /* PHY RX Status 2 */ | 229 | __le16 phy_status2; /* PHY RX Status 2 */ |
230 | __le16 phy_status3; /* PHY RX Status 3 */ | 230 | __le16 phy_status3; /* PHY RX Status 3 */ |
231 | __le32 mac_status; /* MAC RX status */ | 231 | __le32 mac_status; /* MAC RX status */ |
232 | __le16 mac_time; | 232 | __le16 mac_time; |
233 | __le16 channel; | 233 | __le16 channel; |
234 | } __attribute__ ((__packed__)); | 234 | } __packed; |
235 | 235 | ||
236 | /* PHY RX Status 0 */ | 236 | /* PHY RX Status 0 */ |
237 | #define B43_RX_PHYST0_GAINCTL 0x4000 /* Gain Control */ | 237 | #define B43_RX_PHYST0_GAINCTL 0x4000 /* Gain Control */ |
diff --git a/drivers/net/wireless/b43legacy/b43legacy.h b/drivers/net/wireless/b43legacy/b43legacy.h index 89fe2f972c72..c81b2f53b0c5 100644 --- a/drivers/net/wireless/b43legacy/b43legacy.h +++ b/drivers/net/wireless/b43legacy/b43legacy.h | |||
@@ -372,7 +372,7 @@ struct b43legacy_fw_header { | |||
372 | /* Size of the data. For ucode and PCM this is in bytes. | 372 | /* Size of the data. For ucode and PCM this is in bytes. |
373 | * For IV this is number-of-ivs. */ | 373 | * For IV this is number-of-ivs. */ |
374 | __be32 size; | 374 | __be32 size; |
375 | } __attribute__((__packed__)); | 375 | } __packed; |
376 | 376 | ||
377 | /* Initial Value file format */ | 377 | /* Initial Value file format */ |
378 | #define B43legacy_IV_OFFSET_MASK 0x7FFF | 378 | #define B43legacy_IV_OFFSET_MASK 0x7FFF |
@@ -382,8 +382,8 @@ struct b43legacy_iv { | |||
382 | union { | 382 | union { |
383 | __be16 d16; | 383 | __be16 d16; |
384 | __be32 d32; | 384 | __be32 d32; |
385 | } data __attribute__((__packed__)); | 385 | } data __packed; |
386 | } __attribute__((__packed__)); | 386 | } __packed; |
387 | 387 | ||
388 | #define B43legacy_PHYMODE(phytype) (1 << (phytype)) | 388 | #define B43legacy_PHYMODE(phytype) (1 << (phytype)) |
389 | #define B43legacy_PHYMODE_B B43legacy_PHYMODE \ | 389 | #define B43legacy_PHYMODE_B B43legacy_PHYMODE \ |
diff --git a/drivers/net/wireless/b43legacy/dma.c b/drivers/net/wireless/b43legacy/dma.c index e91520d0312e..e03e01d0bc35 100644 --- a/drivers/net/wireless/b43legacy/dma.c +++ b/drivers/net/wireless/b43legacy/dma.c | |||
@@ -394,11 +394,11 @@ dma_addr_t map_descbuffer(struct b43legacy_dmaring *ring, | |||
394 | dma_addr_t dmaaddr; | 394 | dma_addr_t dmaaddr; |
395 | 395 | ||
396 | if (tx) | 396 | if (tx) |
397 | dmaaddr = ssb_dma_map_single(ring->dev->dev, | 397 | dmaaddr = dma_map_single(ring->dev->dev->dma_dev, |
398 | buf, len, | 398 | buf, len, |
399 | DMA_TO_DEVICE); | 399 | DMA_TO_DEVICE); |
400 | else | 400 | else |
401 | dmaaddr = ssb_dma_map_single(ring->dev->dev, | 401 | dmaaddr = dma_map_single(ring->dev->dev->dma_dev, |
402 | buf, len, | 402 | buf, len, |
403 | DMA_FROM_DEVICE); | 403 | DMA_FROM_DEVICE); |
404 | 404 | ||
@@ -412,11 +412,11 @@ void unmap_descbuffer(struct b43legacy_dmaring *ring, | |||
412 | int tx) | 412 | int tx) |
413 | { | 413 | { |
414 | if (tx) | 414 | if (tx) |
415 | ssb_dma_unmap_single(ring->dev->dev, | 415 | dma_unmap_single(ring->dev->dev->dma_dev, |
416 | addr, len, | 416 | addr, len, |
417 | DMA_TO_DEVICE); | 417 | DMA_TO_DEVICE); |
418 | else | 418 | else |
419 | ssb_dma_unmap_single(ring->dev->dev, | 419 | dma_unmap_single(ring->dev->dev->dma_dev, |
420 | addr, len, | 420 | addr, len, |
421 | DMA_FROM_DEVICE); | 421 | DMA_FROM_DEVICE); |
422 | } | 422 | } |
@@ -428,8 +428,8 @@ void sync_descbuffer_for_cpu(struct b43legacy_dmaring *ring, | |||
428 | { | 428 | { |
429 | B43legacy_WARN_ON(ring->tx); | 429 | B43legacy_WARN_ON(ring->tx); |
430 | 430 | ||
431 | ssb_dma_sync_single_for_cpu(ring->dev->dev, | 431 | dma_sync_single_for_cpu(ring->dev->dev->dma_dev, |
432 | addr, len, DMA_FROM_DEVICE); | 432 | addr, len, DMA_FROM_DEVICE); |
433 | } | 433 | } |
434 | 434 | ||
435 | static inline | 435 | static inline |
@@ -439,8 +439,8 @@ void sync_descbuffer_for_device(struct b43legacy_dmaring *ring, | |||
439 | { | 439 | { |
440 | B43legacy_WARN_ON(ring->tx); | 440 | B43legacy_WARN_ON(ring->tx); |
441 | 441 | ||
442 | ssb_dma_sync_single_for_device(ring->dev->dev, | 442 | dma_sync_single_for_device(ring->dev->dev->dma_dev, |
443 | addr, len, DMA_FROM_DEVICE); | 443 | addr, len, DMA_FROM_DEVICE); |
444 | } | 444 | } |
445 | 445 | ||
446 | static inline | 446 | static inline |
@@ -460,10 +460,10 @@ void free_descriptor_buffer(struct b43legacy_dmaring *ring, | |||
460 | static int alloc_ringmemory(struct b43legacy_dmaring *ring) | 460 | static int alloc_ringmemory(struct b43legacy_dmaring *ring) |
461 | { | 461 | { |
462 | /* GFP flags must match the flags in free_ringmemory()! */ | 462 | /* GFP flags must match the flags in free_ringmemory()! */ |
463 | ring->descbase = ssb_dma_alloc_consistent(ring->dev->dev, | 463 | ring->descbase = dma_alloc_coherent(ring->dev->dev->dma_dev, |
464 | B43legacy_DMA_RINGMEMSIZE, | 464 | B43legacy_DMA_RINGMEMSIZE, |
465 | &(ring->dmabase), | 465 | &(ring->dmabase), |
466 | GFP_KERNEL); | 466 | GFP_KERNEL); |
467 | if (!ring->descbase) { | 467 | if (!ring->descbase) { |
468 | b43legacyerr(ring->dev->wl, "DMA ringmemory allocation" | 468 | b43legacyerr(ring->dev->wl, "DMA ringmemory allocation" |
469 | " failed\n"); | 469 | " failed\n"); |
@@ -476,8 +476,8 @@ static int alloc_ringmemory(struct b43legacy_dmaring *ring) | |||
476 | 476 | ||
477 | static void free_ringmemory(struct b43legacy_dmaring *ring) | 477 | static void free_ringmemory(struct b43legacy_dmaring *ring) |
478 | { | 478 | { |
479 | ssb_dma_free_consistent(ring->dev->dev, B43legacy_DMA_RINGMEMSIZE, | 479 | dma_free_coherent(ring->dev->dev->dma_dev, B43legacy_DMA_RINGMEMSIZE, |
480 | ring->descbase, ring->dmabase, GFP_KERNEL); | 480 | ring->descbase, ring->dmabase); |
481 | } | 481 | } |
482 | 482 | ||
483 | /* Reset the RX DMA channel */ | 483 | /* Reset the RX DMA channel */ |
@@ -589,7 +589,7 @@ static bool b43legacy_dma_mapping_error(struct b43legacy_dmaring *ring, | |||
589 | size_t buffersize, | 589 | size_t buffersize, |
590 | bool dma_to_device) | 590 | bool dma_to_device) |
591 | { | 591 | { |
592 | if (unlikely(ssb_dma_mapping_error(ring->dev->dev, addr))) | 592 | if (unlikely(dma_mapping_error(ring->dev->dev->dma_dev, addr))) |
593 | return 1; | 593 | return 1; |
594 | 594 | ||
595 | switch (ring->type) { | 595 | switch (ring->type) { |
@@ -906,7 +906,7 @@ struct b43legacy_dmaring *b43legacy_setup_dmaring(struct b43legacy_wldev *dev, | |||
906 | goto err_kfree_meta; | 906 | goto err_kfree_meta; |
907 | 907 | ||
908 | /* test for ability to dma to txhdr_cache */ | 908 | /* test for ability to dma to txhdr_cache */ |
909 | dma_test = ssb_dma_map_single(dev->dev, ring->txhdr_cache, | 909 | dma_test = dma_map_single(dev->dev->dma_dev, ring->txhdr_cache, |
910 | sizeof(struct b43legacy_txhdr_fw3), | 910 | sizeof(struct b43legacy_txhdr_fw3), |
911 | DMA_TO_DEVICE); | 911 | DMA_TO_DEVICE); |
912 | 912 | ||
@@ -920,7 +920,7 @@ struct b43legacy_dmaring *b43legacy_setup_dmaring(struct b43legacy_wldev *dev, | |||
920 | if (!ring->txhdr_cache) | 920 | if (!ring->txhdr_cache) |
921 | goto err_kfree_meta; | 921 | goto err_kfree_meta; |
922 | 922 | ||
923 | dma_test = ssb_dma_map_single(dev->dev, | 923 | dma_test = dma_map_single(dev->dev->dma_dev, |
924 | ring->txhdr_cache, | 924 | ring->txhdr_cache, |
925 | sizeof(struct b43legacy_txhdr_fw3), | 925 | sizeof(struct b43legacy_txhdr_fw3), |
926 | DMA_TO_DEVICE); | 926 | DMA_TO_DEVICE); |
@@ -930,9 +930,9 @@ struct b43legacy_dmaring *b43legacy_setup_dmaring(struct b43legacy_wldev *dev, | |||
930 | goto err_kfree_txhdr_cache; | 930 | goto err_kfree_txhdr_cache; |
931 | } | 931 | } |
932 | 932 | ||
933 | ssb_dma_unmap_single(dev->dev, dma_test, | 933 | dma_unmap_single(dev->dev->dma_dev, dma_test, |
934 | sizeof(struct b43legacy_txhdr_fw3), | 934 | sizeof(struct b43legacy_txhdr_fw3), |
935 | DMA_TO_DEVICE); | 935 | DMA_TO_DEVICE); |
936 | } | 936 | } |
937 | 937 | ||
938 | ring->nr_slots = nr_slots; | 938 | ring->nr_slots = nr_slots; |
@@ -1040,9 +1040,12 @@ static int b43legacy_dma_set_mask(struct b43legacy_wldev *dev, u64 mask) | |||
1040 | /* Try to set the DMA mask. If it fails, try falling back to a | 1040 | /* Try to set the DMA mask. If it fails, try falling back to a |
1041 | * lower mask, as we can always also support a lower one. */ | 1041 | * lower mask, as we can always also support a lower one. */ |
1042 | while (1) { | 1042 | while (1) { |
1043 | err = ssb_dma_set_mask(dev->dev, mask); | 1043 | err = dma_set_mask(dev->dev->dma_dev, mask); |
1044 | if (!err) | 1044 | if (!err) { |
1045 | break; | 1045 | err = dma_set_coherent_mask(dev->dev->dma_dev, mask); |
1046 | if (!err) | ||
1047 | break; | ||
1048 | } | ||
1046 | if (mask == DMA_BIT_MASK(64)) { | 1049 | if (mask == DMA_BIT_MASK(64)) { |
1047 | mask = DMA_BIT_MASK(32); | 1050 | mask = DMA_BIT_MASK(32); |
1048 | fallback = 1; | 1051 | fallback = 1; |
diff --git a/drivers/net/wireless/b43legacy/dma.h b/drivers/net/wireless/b43legacy/dma.h index f9681041c2d8..f89c34226288 100644 --- a/drivers/net/wireless/b43legacy/dma.h +++ b/drivers/net/wireless/b43legacy/dma.h | |||
@@ -72,7 +72,7 @@ | |||
72 | struct b43legacy_dmadesc32 { | 72 | struct b43legacy_dmadesc32 { |
73 | __le32 control; | 73 | __le32 control; |
74 | __le32 address; | 74 | __le32 address; |
75 | } __attribute__((__packed__)); | 75 | } __packed; |
76 | #define B43legacy_DMA32_DCTL_BYTECNT 0x00001FFF | 76 | #define B43legacy_DMA32_DCTL_BYTECNT 0x00001FFF |
77 | #define B43legacy_DMA32_DCTL_ADDREXT_MASK 0x00030000 | 77 | #define B43legacy_DMA32_DCTL_ADDREXT_MASK 0x00030000 |
78 | #define B43legacy_DMA32_DCTL_ADDREXT_SHIFT 16 | 78 | #define B43legacy_DMA32_DCTL_ADDREXT_SHIFT 16 |
@@ -147,7 +147,7 @@ struct b43legacy_dmadesc64 { | |||
147 | __le32 control1; | 147 | __le32 control1; |
148 | __le32 address_low; | 148 | __le32 address_low; |
149 | __le32 address_high; | 149 | __le32 address_high; |
150 | } __attribute__((__packed__)); | 150 | } __packed; |
151 | #define B43legacy_DMA64_DCTL0_DTABLEEND 0x10000000 | 151 | #define B43legacy_DMA64_DCTL0_DTABLEEND 0x10000000 |
152 | #define B43legacy_DMA64_DCTL0_IRQ 0x20000000 | 152 | #define B43legacy_DMA64_DCTL0_IRQ 0x20000000 |
153 | #define B43legacy_DMA64_DCTL0_FRAMEEND 0x40000000 | 153 | #define B43legacy_DMA64_DCTL0_FRAMEEND 0x40000000 |
@@ -162,8 +162,8 @@ struct b43legacy_dmadesc_generic { | |||
162 | union { | 162 | union { |
163 | struct b43legacy_dmadesc32 dma32; | 163 | struct b43legacy_dmadesc32 dma32; |
164 | struct b43legacy_dmadesc64 dma64; | 164 | struct b43legacy_dmadesc64 dma64; |
165 | } __attribute__((__packed__)); | 165 | } __packed; |
166 | } __attribute__((__packed__)); | 166 | } __packed; |
167 | 167 | ||
168 | 168 | ||
169 | /* Misc DMA constants */ | 169 | /* Misc DMA constants */ |
diff --git a/drivers/net/wireless/b43legacy/xmit.h b/drivers/net/wireless/b43legacy/xmit.h index 91633087a20b..289db00a4a7b 100644 --- a/drivers/net/wireless/b43legacy/xmit.h +++ b/drivers/net/wireless/b43legacy/xmit.h | |||
@@ -9,8 +9,8 @@ | |||
9 | union { \ | 9 | union { \ |
10 | __le32 data; \ | 10 | __le32 data; \ |
11 | __u8 raw[size]; \ | 11 | __u8 raw[size]; \ |
12 | } __attribute__((__packed__)); \ | 12 | } __packed; \ |
13 | } __attribute__((__packed__)) | 13 | } __packed |
14 | 14 | ||
15 | /* struct b43legacy_plcp_hdr4 */ | 15 | /* struct b43legacy_plcp_hdr4 */ |
16 | _b43legacy_declare_plcp_hdr(4); | 16 | _b43legacy_declare_plcp_hdr(4); |
@@ -39,7 +39,7 @@ struct b43legacy_txhdr_fw3 { | |||
39 | struct b43legacy_plcp_hdr6 rts_plcp; /* RTS PLCP */ | 39 | struct b43legacy_plcp_hdr6 rts_plcp; /* RTS PLCP */ |
40 | __u8 rts_frame[18]; /* The RTS frame (if used) */ | 40 | __u8 rts_frame[18]; /* The RTS frame (if used) */ |
41 | struct b43legacy_plcp_hdr6 plcp; | 41 | struct b43legacy_plcp_hdr6 plcp; |
42 | } __attribute__((__packed__)); | 42 | } __packed; |
43 | 43 | ||
44 | /* MAC TX control */ | 44 | /* MAC TX control */ |
45 | #define B43legacy_TX4_MAC_KEYIDX 0x0FF00000 /* Security key index */ | 45 | #define B43legacy_TX4_MAC_KEYIDX 0x0FF00000 /* Security key index */ |
@@ -123,7 +123,7 @@ struct b43legacy_hwtxstatus { | |||
123 | __le16 seq; | 123 | __le16 seq; |
124 | u8 phy_stat; | 124 | u8 phy_stat; |
125 | PAD_BYTES(1); | 125 | PAD_BYTES(1); |
126 | } __attribute__((__packed__)); | 126 | } __packed; |
127 | 127 | ||
128 | 128 | ||
129 | /* Receive header for v3 firmware. */ | 129 | /* Receive header for v3 firmware. */ |
@@ -138,7 +138,7 @@ struct b43legacy_rxhdr_fw3 { | |||
138 | __le16 mac_status; /* MAC RX status */ | 138 | __le16 mac_status; /* MAC RX status */ |
139 | __le16 mac_time; | 139 | __le16 mac_time; |
140 | __le16 channel; | 140 | __le16 channel; |
141 | } __attribute__((__packed__)); | 141 | } __packed; |
142 | 142 | ||
143 | 143 | ||
144 | /* PHY RX Status 0 */ | 144 | /* PHY RX Status 0 */ |
diff --git a/drivers/net/wireless/hostap/hostap_80211.h b/drivers/net/wireless/hostap/hostap_80211.h index 7f9d8d976aa8..ed98ce7c8f65 100644 --- a/drivers/net/wireless/hostap/hostap_80211.h +++ b/drivers/net/wireless/hostap/hostap_80211.h | |||
@@ -19,35 +19,35 @@ struct hostap_ieee80211_mgmt { | |||
19 | __le16 status_code; | 19 | __le16 status_code; |
20 | /* possibly followed by Challenge text */ | 20 | /* possibly followed by Challenge text */ |
21 | u8 variable[0]; | 21 | u8 variable[0]; |
22 | } __attribute__ ((packed)) auth; | 22 | } __packed auth; |
23 | struct { | 23 | struct { |
24 | __le16 reason_code; | 24 | __le16 reason_code; |
25 | } __attribute__ ((packed)) deauth; | 25 | } __packed deauth; |
26 | struct { | 26 | struct { |
27 | __le16 capab_info; | 27 | __le16 capab_info; |
28 | __le16 listen_interval; | 28 | __le16 listen_interval; |
29 | /* followed by SSID and Supported rates */ | 29 | /* followed by SSID and Supported rates */ |
30 | u8 variable[0]; | 30 | u8 variable[0]; |
31 | } __attribute__ ((packed)) assoc_req; | 31 | } __packed assoc_req; |
32 | struct { | 32 | struct { |
33 | __le16 capab_info; | 33 | __le16 capab_info; |
34 | __le16 status_code; | 34 | __le16 status_code; |
35 | __le16 aid; | 35 | __le16 aid; |
36 | /* followed by Supported rates */ | 36 | /* followed by Supported rates */ |
37 | u8 variable[0]; | 37 | u8 variable[0]; |
38 | } __attribute__ ((packed)) assoc_resp, reassoc_resp; | 38 | } __packed assoc_resp, reassoc_resp; |
39 | struct { | 39 | struct { |
40 | __le16 capab_info; | 40 | __le16 capab_info; |
41 | __le16 listen_interval; | 41 | __le16 listen_interval; |
42 | u8 current_ap[6]; | 42 | u8 current_ap[6]; |
43 | /* followed by SSID and Supported rates */ | 43 | /* followed by SSID and Supported rates */ |
44 | u8 variable[0]; | 44 | u8 variable[0]; |
45 | } __attribute__ ((packed)) reassoc_req; | 45 | } __packed reassoc_req; |
46 | struct { | 46 | struct { |
47 | __le16 reason_code; | 47 | __le16 reason_code; |
48 | } __attribute__ ((packed)) disassoc; | 48 | } __packed disassoc; |
49 | struct { | 49 | struct { |
50 | } __attribute__ ((packed)) probe_req; | 50 | } __packed probe_req; |
51 | struct { | 51 | struct { |
52 | u8 timestamp[8]; | 52 | u8 timestamp[8]; |
53 | __le16 beacon_int; | 53 | __le16 beacon_int; |
@@ -55,9 +55,9 @@ struct hostap_ieee80211_mgmt { | |||
55 | /* followed by some of SSID, Supported rates, | 55 | /* followed by some of SSID, Supported rates, |
56 | * FH Params, DS Params, CF Params, IBSS Params, TIM */ | 56 | * FH Params, DS Params, CF Params, IBSS Params, TIM */ |
57 | u8 variable[0]; | 57 | u8 variable[0]; |
58 | } __attribute__ ((packed)) beacon, probe_resp; | 58 | } __packed beacon, probe_resp; |
59 | } u; | 59 | } u; |
60 | } __attribute__ ((packed)); | 60 | } __packed; |
61 | 61 | ||
62 | 62 | ||
63 | #define IEEE80211_MGMT_HDR_LEN 24 | 63 | #define IEEE80211_MGMT_HDR_LEN 24 |
diff --git a/drivers/net/wireless/hostap/hostap_common.h b/drivers/net/wireless/hostap/hostap_common.h index 90b64b092007..4230102ac9e4 100644 --- a/drivers/net/wireless/hostap/hostap_common.h +++ b/drivers/net/wireless/hostap/hostap_common.h | |||
@@ -179,7 +179,7 @@ struct hfa384x_comp_ident | |||
179 | __le16 variant; | 179 | __le16 variant; |
180 | __le16 major; | 180 | __le16 major; |
181 | __le16 minor; | 181 | __le16 minor; |
182 | } __attribute__ ((packed)); | 182 | } __packed; |
183 | 183 | ||
184 | #define HFA384X_COMP_ID_PRI 0x15 | 184 | #define HFA384X_COMP_ID_PRI 0x15 |
185 | #define HFA384X_COMP_ID_STA 0x1f | 185 | #define HFA384X_COMP_ID_STA 0x1f |
@@ -192,14 +192,14 @@ struct hfa384x_sup_range | |||
192 | __le16 variant; | 192 | __le16 variant; |
193 | __le16 bottom; | 193 | __le16 bottom; |
194 | __le16 top; | 194 | __le16 top; |
195 | } __attribute__ ((packed)); | 195 | } __packed; |
196 | 196 | ||
197 | 197 | ||
198 | struct hfa384x_build_id | 198 | struct hfa384x_build_id |
199 | { | 199 | { |
200 | __le16 pri_seq; | 200 | __le16 pri_seq; |
201 | __le16 sec_seq; | 201 | __le16 sec_seq; |
202 | } __attribute__ ((packed)); | 202 | } __packed; |
203 | 203 | ||
204 | /* FD01 - Download Buffer */ | 204 | /* FD01 - Download Buffer */ |
205 | struct hfa384x_rid_download_buffer | 205 | struct hfa384x_rid_download_buffer |
@@ -207,14 +207,14 @@ struct hfa384x_rid_download_buffer | |||
207 | __le16 page; | 207 | __le16 page; |
208 | __le16 offset; | 208 | __le16 offset; |
209 | __le16 length; | 209 | __le16 length; |
210 | } __attribute__ ((packed)); | 210 | } __packed; |
211 | 211 | ||
212 | /* BSS connection quality (RID FD43 range, RID FD51 dBm-normalized) */ | 212 | /* BSS connection quality (RID FD43 range, RID FD51 dBm-normalized) */ |
213 | struct hfa384x_comms_quality { | 213 | struct hfa384x_comms_quality { |
214 | __le16 comm_qual; /* 0 .. 92 */ | 214 | __le16 comm_qual; /* 0 .. 92 */ |
215 | __le16 signal_level; /* 27 .. 154 */ | 215 | __le16 signal_level; /* 27 .. 154 */ |
216 | __le16 noise_level; /* 27 .. 154 */ | 216 | __le16 noise_level; /* 27 .. 154 */ |
217 | } __attribute__ ((packed)); | 217 | } __packed; |
218 | 218 | ||
219 | 219 | ||
220 | /* netdevice private ioctls (used, e.g., with iwpriv from user space) */ | 220 | /* netdevice private ioctls (used, e.g., with iwpriv from user space) */ |
diff --git a/drivers/net/wireless/hostap/hostap_wlan.h b/drivers/net/wireless/hostap/hostap_wlan.h index 3d238917af07..c02f8667a7e0 100644 --- a/drivers/net/wireless/hostap/hostap_wlan.h +++ b/drivers/net/wireless/hostap/hostap_wlan.h | |||
@@ -31,14 +31,14 @@ struct linux_wlan_ng_val { | |||
31 | u32 did; | 31 | u32 did; |
32 | u16 status, len; | 32 | u16 status, len; |
33 | u32 data; | 33 | u32 data; |
34 | } __attribute__ ((packed)); | 34 | } __packed; |
35 | 35 | ||
36 | struct linux_wlan_ng_prism_hdr { | 36 | struct linux_wlan_ng_prism_hdr { |
37 | u32 msgcode, msglen; | 37 | u32 msgcode, msglen; |
38 | char devname[16]; | 38 | char devname[16]; |
39 | struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal, | 39 | struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal, |
40 | noise, rate, istx, frmlen; | 40 | noise, rate, istx, frmlen; |
41 | } __attribute__ ((packed)); | 41 | } __packed; |
42 | 42 | ||
43 | struct linux_wlan_ng_cap_hdr { | 43 | struct linux_wlan_ng_cap_hdr { |
44 | __be32 version; | 44 | __be32 version; |
@@ -55,7 +55,7 @@ struct linux_wlan_ng_cap_hdr { | |||
55 | __be32 ssi_noise; | 55 | __be32 ssi_noise; |
56 | __be32 preamble; | 56 | __be32 preamble; |
57 | __be32 encoding; | 57 | __be32 encoding; |
58 | } __attribute__ ((packed)); | 58 | } __packed; |
59 | 59 | ||
60 | struct hostap_radiotap_rx { | 60 | struct hostap_radiotap_rx { |
61 | struct ieee80211_radiotap_header hdr; | 61 | struct ieee80211_radiotap_header hdr; |
@@ -66,7 +66,7 @@ struct hostap_radiotap_rx { | |||
66 | __le16 chan_flags; | 66 | __le16 chan_flags; |
67 | s8 dbm_antsignal; | 67 | s8 dbm_antsignal; |
68 | s8 dbm_antnoise; | 68 | s8 dbm_antnoise; |
69 | } __attribute__ ((packed)); | 69 | } __packed; |
70 | 70 | ||
71 | #define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */ | 71 | #define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */ |
72 | #define LWNG_CAPHDR_VERSION 0x80211001 | 72 | #define LWNG_CAPHDR_VERSION 0x80211001 |
@@ -97,7 +97,7 @@ struct hfa384x_rx_frame { | |||
97 | __be16 len; | 97 | __be16 len; |
98 | 98 | ||
99 | /* followed by frame data; max 2304 bytes */ | 99 | /* followed by frame data; max 2304 bytes */ |
100 | } __attribute__ ((packed)); | 100 | } __packed; |
101 | 101 | ||
102 | 102 | ||
103 | struct hfa384x_tx_frame { | 103 | struct hfa384x_tx_frame { |
@@ -126,14 +126,14 @@ struct hfa384x_tx_frame { | |||
126 | __be16 len; | 126 | __be16 len; |
127 | 127 | ||
128 | /* followed by frame data; max 2304 bytes */ | 128 | /* followed by frame data; max 2304 bytes */ |
129 | } __attribute__ ((packed)); | 129 | } __packed; |
130 | 130 | ||
131 | 131 | ||
132 | struct hfa384x_rid_hdr | 132 | struct hfa384x_rid_hdr |
133 | { | 133 | { |
134 | __le16 len; | 134 | __le16 len; |
135 | __le16 rid; | 135 | __le16 rid; |
136 | } __attribute__ ((packed)); | 136 | } __packed; |
137 | 137 | ||
138 | 138 | ||
139 | /* Macro for converting signal levels (range 27 .. 154) to wireless ext | 139 | /* Macro for converting signal levels (range 27 .. 154) to wireless ext |
@@ -145,24 +145,24 @@ struct hfa384x_rid_hdr | |||
145 | struct hfa384x_scan_request { | 145 | struct hfa384x_scan_request { |
146 | __le16 channel_list; | 146 | __le16 channel_list; |
147 | __le16 txrate; /* HFA384X_RATES_* */ | 147 | __le16 txrate; /* HFA384X_RATES_* */ |
148 | } __attribute__ ((packed)); | 148 | } __packed; |
149 | 149 | ||
150 | struct hfa384x_hostscan_request { | 150 | struct hfa384x_hostscan_request { |
151 | __le16 channel_list; | 151 | __le16 channel_list; |
152 | __le16 txrate; | 152 | __le16 txrate; |
153 | __le16 target_ssid_len; | 153 | __le16 target_ssid_len; |
154 | u8 target_ssid[32]; | 154 | u8 target_ssid[32]; |
155 | } __attribute__ ((packed)); | 155 | } __packed; |
156 | 156 | ||
157 | struct hfa384x_join_request { | 157 | struct hfa384x_join_request { |
158 | u8 bssid[6]; | 158 | u8 bssid[6]; |
159 | __le16 channel; | 159 | __le16 channel; |
160 | } __attribute__ ((packed)); | 160 | } __packed; |
161 | 161 | ||
162 | struct hfa384x_info_frame { | 162 | struct hfa384x_info_frame { |
163 | __le16 len; | 163 | __le16 len; |
164 | __le16 type; | 164 | __le16 type; |
165 | } __attribute__ ((packed)); | 165 | } __packed; |
166 | 166 | ||
167 | struct hfa384x_comm_tallies { | 167 | struct hfa384x_comm_tallies { |
168 | __le16 tx_unicast_frames; | 168 | __le16 tx_unicast_frames; |
@@ -186,7 +186,7 @@ struct hfa384x_comm_tallies { | |||
186 | __le16 rx_discards_wep_undecryptable; | 186 | __le16 rx_discards_wep_undecryptable; |
187 | __le16 rx_message_in_msg_fragments; | 187 | __le16 rx_message_in_msg_fragments; |
188 | __le16 rx_message_in_bad_msg_fragments; | 188 | __le16 rx_message_in_bad_msg_fragments; |
189 | } __attribute__ ((packed)); | 189 | } __packed; |
190 | 190 | ||
191 | struct hfa384x_comm_tallies32 { | 191 | struct hfa384x_comm_tallies32 { |
192 | __le32 tx_unicast_frames; | 192 | __le32 tx_unicast_frames; |
@@ -210,7 +210,7 @@ struct hfa384x_comm_tallies32 { | |||
210 | __le32 rx_discards_wep_undecryptable; | 210 | __le32 rx_discards_wep_undecryptable; |
211 | __le32 rx_message_in_msg_fragments; | 211 | __le32 rx_message_in_msg_fragments; |
212 | __le32 rx_message_in_bad_msg_fragments; | 212 | __le32 rx_message_in_bad_msg_fragments; |
213 | } __attribute__ ((packed)); | 213 | } __packed; |
214 | 214 | ||
215 | struct hfa384x_scan_result_hdr { | 215 | struct hfa384x_scan_result_hdr { |
216 | __le16 reserved; | 216 | __le16 reserved; |
@@ -219,7 +219,7 @@ struct hfa384x_scan_result_hdr { | |||
219 | #define HFA384X_SCAN_HOST_INITIATED 1 | 219 | #define HFA384X_SCAN_HOST_INITIATED 1 |
220 | #define HFA384X_SCAN_FIRMWARE_INITIATED 2 | 220 | #define HFA384X_SCAN_FIRMWARE_INITIATED 2 |
221 | #define HFA384X_SCAN_INQUIRY_FROM_HOST 3 | 221 | #define HFA384X_SCAN_INQUIRY_FROM_HOST 3 |
222 | } __attribute__ ((packed)); | 222 | } __packed; |
223 | 223 | ||
224 | #define HFA384X_SCAN_MAX_RESULTS 32 | 224 | #define HFA384X_SCAN_MAX_RESULTS 32 |
225 | 225 | ||
@@ -234,7 +234,7 @@ struct hfa384x_scan_result { | |||
234 | u8 ssid[32]; | 234 | u8 ssid[32]; |
235 | u8 sup_rates[10]; | 235 | u8 sup_rates[10]; |
236 | __le16 rate; | 236 | __le16 rate; |
237 | } __attribute__ ((packed)); | 237 | } __packed; |
238 | 238 | ||
239 | struct hfa384x_hostscan_result { | 239 | struct hfa384x_hostscan_result { |
240 | __le16 chid; | 240 | __le16 chid; |
@@ -248,7 +248,7 @@ struct hfa384x_hostscan_result { | |||
248 | u8 sup_rates[10]; | 248 | u8 sup_rates[10]; |
249 | __le16 rate; | 249 | __le16 rate; |
250 | __le16 atim; | 250 | __le16 atim; |
251 | } __attribute__ ((packed)); | 251 | } __packed; |
252 | 252 | ||
253 | struct comm_tallies_sums { | 253 | struct comm_tallies_sums { |
254 | unsigned int tx_unicast_frames; | 254 | unsigned int tx_unicast_frames; |
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c index 0bd4dfa59a8a..56350d571960 100644 --- a/drivers/net/wireless/ipw2x00/ipw2100.c +++ b/drivers/net/wireless/ipw2x00/ipw2100.c | |||
@@ -3467,10 +3467,8 @@ static int ipw2100_msg_allocate(struct ipw2100_priv *priv) | |||
3467 | dma_addr_t p; | 3467 | dma_addr_t p; |
3468 | 3468 | ||
3469 | priv->msg_buffers = | 3469 | priv->msg_buffers = |
3470 | (struct ipw2100_tx_packet *)kmalloc(IPW_COMMAND_POOL_SIZE * | 3470 | kmalloc(IPW_COMMAND_POOL_SIZE * sizeof(struct ipw2100_tx_packet), |
3471 | sizeof(struct | 3471 | GFP_KERNEL); |
3472 | ipw2100_tx_packet), | ||
3473 | GFP_KERNEL); | ||
3474 | if (!priv->msg_buffers) { | 3472 | if (!priv->msg_buffers) { |
3475 | printk(KERN_ERR DRV_NAME ": %s: PCI alloc failed for msg " | 3473 | printk(KERN_ERR DRV_NAME ": %s: PCI alloc failed for msg " |
3476 | "buffers.\n", priv->net_dev->name); | 3474 | "buffers.\n", priv->net_dev->name); |
@@ -4499,10 +4497,8 @@ static int ipw2100_tx_allocate(struct ipw2100_priv *priv) | |||
4499 | } | 4497 | } |
4500 | 4498 | ||
4501 | priv->tx_buffers = | 4499 | priv->tx_buffers = |
4502 | (struct ipw2100_tx_packet *)kmalloc(TX_PENDED_QUEUE_LENGTH * | 4500 | kmalloc(TX_PENDED_QUEUE_LENGTH * sizeof(struct ipw2100_tx_packet), |
4503 | sizeof(struct | 4501 | GFP_ATOMIC); |
4504 | ipw2100_tx_packet), | ||
4505 | GFP_ATOMIC); | ||
4506 | if (!priv->tx_buffers) { | 4502 | if (!priv->tx_buffers) { |
4507 | printk(KERN_ERR DRV_NAME | 4503 | printk(KERN_ERR DRV_NAME |
4508 | ": %s: alloc failed form tx buffers.\n", | 4504 | ": %s: alloc failed form tx buffers.\n", |
@@ -4651,9 +4647,9 @@ static int ipw2100_rx_allocate(struct ipw2100_priv *priv) | |||
4651 | /* | 4647 | /* |
4652 | * allocate packets | 4648 | * allocate packets |
4653 | */ | 4649 | */ |
4654 | priv->rx_buffers = (struct ipw2100_rx_packet *) | 4650 | priv->rx_buffers = kmalloc(RX_QUEUE_LENGTH * |
4655 | kmalloc(RX_QUEUE_LENGTH * sizeof(struct ipw2100_rx_packet), | 4651 | sizeof(struct ipw2100_rx_packet), |
4656 | GFP_KERNEL); | 4652 | GFP_KERNEL); |
4657 | if (!priv->rx_buffers) { | 4653 | if (!priv->rx_buffers) { |
4658 | IPW_DEBUG_INFO("can't allocate rx packet buffer table\n"); | 4654 | IPW_DEBUG_INFO("can't allocate rx packet buffer table\n"); |
4659 | 4655 | ||
@@ -5233,7 +5229,7 @@ struct security_info_params { | |||
5233 | u8 auth_mode; | 5229 | u8 auth_mode; |
5234 | u8 replay_counters_number; | 5230 | u8 replay_counters_number; |
5235 | u8 unicast_using_group; | 5231 | u8 unicast_using_group; |
5236 | } __attribute__ ((packed)); | 5232 | } __packed; |
5237 | 5233 | ||
5238 | static int ipw2100_set_security_information(struct ipw2100_priv *priv, | 5234 | static int ipw2100_set_security_information(struct ipw2100_priv *priv, |
5239 | int auth_mode, | 5235 | int auth_mode, |
@@ -8475,7 +8471,7 @@ struct ipw2100_fw_header { | |||
8475 | short mode; | 8471 | short mode; |
8476 | unsigned int fw_size; | 8472 | unsigned int fw_size; |
8477 | unsigned int uc_size; | 8473 | unsigned int uc_size; |
8478 | } __attribute__ ((packed)); | 8474 | } __packed; |
8479 | 8475 | ||
8480 | static int ipw2100_mod_firmware_load(struct ipw2100_fw *fw) | 8476 | static int ipw2100_mod_firmware_load(struct ipw2100_fw *fw) |
8481 | { | 8477 | { |
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.h b/drivers/net/wireless/ipw2x00/ipw2100.h index 1eab0d698f4d..838002b4881e 100644 --- a/drivers/net/wireless/ipw2x00/ipw2100.h +++ b/drivers/net/wireless/ipw2x00/ipw2100.h | |||
@@ -164,7 +164,7 @@ struct bd_status { | |||
164 | } fields; | 164 | } fields; |
165 | u8 field; | 165 | u8 field; |
166 | } info; | 166 | } info; |
167 | } __attribute__ ((packed)); | 167 | } __packed; |
168 | 168 | ||
169 | struct ipw2100_bd { | 169 | struct ipw2100_bd { |
170 | u32 host_addr; | 170 | u32 host_addr; |
@@ -174,7 +174,7 @@ struct ipw2100_bd { | |||
174 | * 1st TBD) */ | 174 | * 1st TBD) */ |
175 | u8 num_fragments; | 175 | u8 num_fragments; |
176 | u8 reserved[6]; | 176 | u8 reserved[6]; |
177 | } __attribute__ ((packed)); | 177 | } __packed; |
178 | 178 | ||
179 | #define IPW_BD_QUEUE_LENGTH(n) (1<<n) | 179 | #define IPW_BD_QUEUE_LENGTH(n) (1<<n) |
180 | #define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd)) | 180 | #define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd)) |
@@ -232,7 +232,7 @@ struct ipw2100_status { | |||
232 | #define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1) | 232 | #define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1) |
233 | #define IPW_STATUS_FLAG_CRC_ERROR (1<<2) | 233 | #define IPW_STATUS_FLAG_CRC_ERROR (1<<2) |
234 | u8 rssi; | 234 | u8 rssi; |
235 | } __attribute__ ((packed)); | 235 | } __packed; |
236 | 236 | ||
237 | struct ipw2100_status_queue { | 237 | struct ipw2100_status_queue { |
238 | /* driver (virtual) pointer to queue */ | 238 | /* driver (virtual) pointer to queue */ |
@@ -293,7 +293,7 @@ struct ipw2100_cmd_header { | |||
293 | u32 reserved1[3]; | 293 | u32 reserved1[3]; |
294 | u32 *ordinal1_ptr; | 294 | u32 *ordinal1_ptr; |
295 | u32 *ordinal2_ptr; | 295 | u32 *ordinal2_ptr; |
296 | } __attribute__ ((packed)); | 296 | } __packed; |
297 | 297 | ||
298 | struct ipw2100_data_header { | 298 | struct ipw2100_data_header { |
299 | u32 host_command_reg; | 299 | u32 host_command_reg; |
@@ -307,7 +307,7 @@ struct ipw2100_data_header { | |||
307 | u8 src_addr[ETH_ALEN]; | 307 | u8 src_addr[ETH_ALEN]; |
308 | u8 dst_addr[ETH_ALEN]; | 308 | u8 dst_addr[ETH_ALEN]; |
309 | u16 fragment_size; | 309 | u16 fragment_size; |
310 | } __attribute__ ((packed)); | 310 | } __packed; |
311 | 311 | ||
312 | /* Host command data structure */ | 312 | /* Host command data structure */ |
313 | struct host_command { | 313 | struct host_command { |
@@ -316,7 +316,7 @@ struct host_command { | |||
316 | u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID) | 316 | u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID) |
317 | u32 host_command_length; // LENGTH | 317 | u32 host_command_length; // LENGTH |
318 | u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS | 318 | u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS |
319 | } __attribute__ ((packed)); | 319 | } __packed; |
320 | 320 | ||
321 | typedef enum { | 321 | typedef enum { |
322 | POWER_ON_RESET, | 322 | POWER_ON_RESET, |
@@ -382,7 +382,7 @@ struct ipw2100_notification { | |||
382 | u32 hnhdr_size; /* size in bytes of data | 382 | u32 hnhdr_size; /* size in bytes of data |
383 | or number of entries, if table. | 383 | or number of entries, if table. |
384 | Does NOT include header */ | 384 | Does NOT include header */ |
385 | } __attribute__ ((packed)); | 385 | } __packed; |
386 | 386 | ||
387 | #define MAX_KEY_SIZE 16 | 387 | #define MAX_KEY_SIZE 16 |
388 | #define MAX_KEYS 8 | 388 | #define MAX_KEYS 8 |
@@ -814,7 +814,7 @@ struct ipw2100_rx { | |||
814 | struct ipw2100_notification notification; | 814 | struct ipw2100_notification notification; |
815 | struct ipw2100_cmd_header command; | 815 | struct ipw2100_cmd_header command; |
816 | } rx_data; | 816 | } rx_data; |
817 | } __attribute__ ((packed)); | 817 | } __packed; |
818 | 818 | ||
819 | /* Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved */ | 819 | /* Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved */ |
820 | #define TX_RATE_1_MBIT 0x0001 | 820 | #define TX_RATE_1_MBIT 0x0001 |
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c index 3aa3bb18f615..8feaa1d358ea 100644 --- a/drivers/net/wireless/ipw2x00/ipw2200.c +++ b/drivers/net/wireless/ipw2x00/ipw2200.c | |||
@@ -6624,13 +6624,12 @@ static int ipw_wx_set_genie(struct net_device *dev, | |||
6624 | return -EINVAL; | 6624 | return -EINVAL; |
6625 | 6625 | ||
6626 | if (wrqu->data.length) { | 6626 | if (wrqu->data.length) { |
6627 | buf = kmalloc(wrqu->data.length, GFP_KERNEL); | 6627 | buf = kmemdup(extra, wrqu->data.length, GFP_KERNEL); |
6628 | if (buf == NULL) { | 6628 | if (buf == NULL) { |
6629 | err = -ENOMEM; | 6629 | err = -ENOMEM; |
6630 | goto out; | 6630 | goto out; |
6631 | } | 6631 | } |
6632 | 6632 | ||
6633 | memcpy(buf, extra, wrqu->data.length); | ||
6634 | kfree(ieee->wpa_ie); | 6633 | kfree(ieee->wpa_ie); |
6635 | ieee->wpa_ie = buf; | 6634 | ieee->wpa_ie = buf; |
6636 | ieee->wpa_ie_len = wrqu->data.length; | 6635 | ieee->wpa_ie_len = wrqu->data.length; |
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.h b/drivers/net/wireless/ipw2x00/ipw2200.h index bf0eeb2e873a..d7d049c7a4fa 100644 --- a/drivers/net/wireless/ipw2x00/ipw2200.h +++ b/drivers/net/wireless/ipw2x00/ipw2200.h | |||
@@ -388,7 +388,7 @@ struct clx2_queue { | |||
388 | dma_addr_t dma_addr; /**< physical addr for BD's */ | 388 | dma_addr_t dma_addr; /**< physical addr for BD's */ |
389 | int low_mark; /**< low watermark, resume queue if free space more than this */ | 389 | int low_mark; /**< low watermark, resume queue if free space more than this */ |
390 | int high_mark; /**< high watermark, stop queue if free space less than this */ | 390 | int high_mark; /**< high watermark, stop queue if free space less than this */ |
391 | } __attribute__ ((packed)); /* XXX */ | 391 | } __packed; /* XXX */ |
392 | 392 | ||
393 | struct machdr32 { | 393 | struct machdr32 { |
394 | __le16 frame_ctl; | 394 | __le16 frame_ctl; |
@@ -399,7 +399,7 @@ struct machdr32 { | |||
399 | __le16 seq_ctrl; // more endians! | 399 | __le16 seq_ctrl; // more endians! |
400 | u8 addr4[MACADRR_BYTE_LEN]; | 400 | u8 addr4[MACADRR_BYTE_LEN]; |
401 | __le16 qos_ctrl; | 401 | __le16 qos_ctrl; |
402 | } __attribute__ ((packed)); | 402 | } __packed; |
403 | 403 | ||
404 | struct machdr30 { | 404 | struct machdr30 { |
405 | __le16 frame_ctl; | 405 | __le16 frame_ctl; |
@@ -409,7 +409,7 @@ struct machdr30 { | |||
409 | u8 addr3[MACADRR_BYTE_LEN]; | 409 | u8 addr3[MACADRR_BYTE_LEN]; |
410 | __le16 seq_ctrl; // more endians! | 410 | __le16 seq_ctrl; // more endians! |
411 | u8 addr4[MACADRR_BYTE_LEN]; | 411 | u8 addr4[MACADRR_BYTE_LEN]; |
412 | } __attribute__ ((packed)); | 412 | } __packed; |
413 | 413 | ||
414 | struct machdr26 { | 414 | struct machdr26 { |
415 | __le16 frame_ctl; | 415 | __le16 frame_ctl; |
@@ -419,7 +419,7 @@ struct machdr26 { | |||
419 | u8 addr3[MACADRR_BYTE_LEN]; | 419 | u8 addr3[MACADRR_BYTE_LEN]; |
420 | __le16 seq_ctrl; // more endians! | 420 | __le16 seq_ctrl; // more endians! |
421 | __le16 qos_ctrl; | 421 | __le16 qos_ctrl; |
422 | } __attribute__ ((packed)); | 422 | } __packed; |
423 | 423 | ||
424 | struct machdr24 { | 424 | struct machdr24 { |
425 | __le16 frame_ctl; | 425 | __le16 frame_ctl; |
@@ -428,20 +428,20 @@ struct machdr24 { | |||
428 | u8 addr2[MACADRR_BYTE_LEN]; | 428 | u8 addr2[MACADRR_BYTE_LEN]; |
429 | u8 addr3[MACADRR_BYTE_LEN]; | 429 | u8 addr3[MACADRR_BYTE_LEN]; |
430 | __le16 seq_ctrl; // more endians! | 430 | __le16 seq_ctrl; // more endians! |
431 | } __attribute__ ((packed)); | 431 | } __packed; |
432 | 432 | ||
433 | // TX TFD with 32 byte MAC Header | 433 | // TX TFD with 32 byte MAC Header |
434 | struct tx_tfd_32 { | 434 | struct tx_tfd_32 { |
435 | struct machdr32 mchdr; // 32 | 435 | struct machdr32 mchdr; // 32 |
436 | __le32 uivplaceholder[2]; // 8 | 436 | __le32 uivplaceholder[2]; // 8 |
437 | } __attribute__ ((packed)); | 437 | } __packed; |
438 | 438 | ||
439 | // TX TFD with 30 byte MAC Header | 439 | // TX TFD with 30 byte MAC Header |
440 | struct tx_tfd_30 { | 440 | struct tx_tfd_30 { |
441 | struct machdr30 mchdr; // 30 | 441 | struct machdr30 mchdr; // 30 |
442 | u8 reserved[2]; // 2 | 442 | u8 reserved[2]; // 2 |
443 | __le32 uivplaceholder[2]; // 8 | 443 | __le32 uivplaceholder[2]; // 8 |
444 | } __attribute__ ((packed)); | 444 | } __packed; |
445 | 445 | ||
446 | // tx tfd with 26 byte mac header | 446 | // tx tfd with 26 byte mac header |
447 | struct tx_tfd_26 { | 447 | struct tx_tfd_26 { |
@@ -449,14 +449,14 @@ struct tx_tfd_26 { | |||
449 | u8 reserved1[2]; // 2 | 449 | u8 reserved1[2]; // 2 |
450 | __le32 uivplaceholder[2]; // 8 | 450 | __le32 uivplaceholder[2]; // 8 |
451 | u8 reserved2[4]; // 4 | 451 | u8 reserved2[4]; // 4 |
452 | } __attribute__ ((packed)); | 452 | } __packed; |
453 | 453 | ||
454 | // tx tfd with 24 byte mac header | 454 | // tx tfd with 24 byte mac header |
455 | struct tx_tfd_24 { | 455 | struct tx_tfd_24 { |
456 | struct machdr24 mchdr; // 24 | 456 | struct machdr24 mchdr; // 24 |
457 | __le32 uivplaceholder[2]; // 8 | 457 | __le32 uivplaceholder[2]; // 8 |
458 | u8 reserved[8]; // 8 | 458 | u8 reserved[8]; // 8 |
459 | } __attribute__ ((packed)); | 459 | } __packed; |
460 | 460 | ||
461 | #define DCT_WEP_KEY_FIELD_LENGTH 16 | 461 | #define DCT_WEP_KEY_FIELD_LENGTH 16 |
462 | 462 | ||
@@ -465,7 +465,7 @@ struct tfd_command { | |||
465 | u8 length; | 465 | u8 length; |
466 | __le16 reserved; | 466 | __le16 reserved; |
467 | u8 payload[0]; | 467 | u8 payload[0]; |
468 | } __attribute__ ((packed)); | 468 | } __packed; |
469 | 469 | ||
470 | struct tfd_data { | 470 | struct tfd_data { |
471 | /* Header */ | 471 | /* Header */ |
@@ -504,14 +504,14 @@ struct tfd_data { | |||
504 | __le32 num_chunks; | 504 | __le32 num_chunks; |
505 | __le32 chunk_ptr[NUM_TFD_CHUNKS]; | 505 | __le32 chunk_ptr[NUM_TFD_CHUNKS]; |
506 | __le16 chunk_len[NUM_TFD_CHUNKS]; | 506 | __le16 chunk_len[NUM_TFD_CHUNKS]; |
507 | } __attribute__ ((packed)); | 507 | } __packed; |
508 | 508 | ||
509 | struct txrx_control_flags { | 509 | struct txrx_control_flags { |
510 | u8 message_type; | 510 | u8 message_type; |
511 | u8 rx_seq_num; | 511 | u8 rx_seq_num; |
512 | u8 control_bits; | 512 | u8 control_bits; |
513 | u8 reserved; | 513 | u8 reserved; |
514 | } __attribute__ ((packed)); | 514 | } __packed; |
515 | 515 | ||
516 | #define TFD_SIZE 128 | 516 | #define TFD_SIZE 128 |
517 | #define TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH (TFD_SIZE - sizeof(struct txrx_control_flags)) | 517 | #define TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH (TFD_SIZE - sizeof(struct txrx_control_flags)) |
@@ -523,7 +523,7 @@ struct tfd_frame { | |||
523 | struct tfd_command cmd; | 523 | struct tfd_command cmd; |
524 | u8 raw[TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH]; | 524 | u8 raw[TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH]; |
525 | } u; | 525 | } u; |
526 | } __attribute__ ((packed)); | 526 | } __packed; |
527 | 527 | ||
528 | typedef void destructor_func(const void *); | 528 | typedef void destructor_func(const void *); |
529 | 529 | ||
@@ -559,7 +559,7 @@ struct rate_histogram { | |||
559 | __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; | 559 | __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; |
560 | __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; | 560 | __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; |
561 | } failed; | 561 | } failed; |
562 | } __attribute__ ((packed)); | 562 | } __packed; |
563 | 563 | ||
564 | /* statistics command response */ | 564 | /* statistics command response */ |
565 | struct ipw_cmd_stats { | 565 | struct ipw_cmd_stats { |
@@ -586,13 +586,13 @@ struct ipw_cmd_stats { | |||
586 | __le16 rx_autodetec_no_ofdm; | 586 | __le16 rx_autodetec_no_ofdm; |
587 | __le16 rx_autodetec_no_barker; | 587 | __le16 rx_autodetec_no_barker; |
588 | __le16 reserved; | 588 | __le16 reserved; |
589 | } __attribute__ ((packed)); | 589 | } __packed; |
590 | 590 | ||
591 | struct notif_channel_result { | 591 | struct notif_channel_result { |
592 | u8 channel_num; | 592 | u8 channel_num; |
593 | struct ipw_cmd_stats stats; | 593 | struct ipw_cmd_stats stats; |
594 | u8 uReserved; | 594 | u8 uReserved; |
595 | } __attribute__ ((packed)); | 595 | } __packed; |
596 | 596 | ||
597 | #define SCAN_COMPLETED_STATUS_COMPLETE 1 | 597 | #define SCAN_COMPLETED_STATUS_COMPLETE 1 |
598 | #define SCAN_COMPLETED_STATUS_ABORTED 2 | 598 | #define SCAN_COMPLETED_STATUS_ABORTED 2 |
@@ -602,24 +602,24 @@ struct notif_scan_complete { | |||
602 | u8 num_channels; | 602 | u8 num_channels; |
603 | u8 status; | 603 | u8 status; |
604 | u8 reserved; | 604 | u8 reserved; |
605 | } __attribute__ ((packed)); | 605 | } __packed; |
606 | 606 | ||
607 | struct notif_frag_length { | 607 | struct notif_frag_length { |
608 | __le16 frag_length; | 608 | __le16 frag_length; |
609 | __le16 reserved; | 609 | __le16 reserved; |
610 | } __attribute__ ((packed)); | 610 | } __packed; |
611 | 611 | ||
612 | struct notif_beacon_state { | 612 | struct notif_beacon_state { |
613 | __le32 state; | 613 | __le32 state; |
614 | __le32 number; | 614 | __le32 number; |
615 | } __attribute__ ((packed)); | 615 | } __packed; |
616 | 616 | ||
617 | struct notif_tgi_tx_key { | 617 | struct notif_tgi_tx_key { |
618 | u8 key_state; | 618 | u8 key_state; |
619 | u8 security_type; | 619 | u8 security_type; |
620 | u8 station_index; | 620 | u8 station_index; |
621 | u8 reserved; | 621 | u8 reserved; |
622 | } __attribute__ ((packed)); | 622 | } __packed; |
623 | 623 | ||
624 | #define SILENCE_OVER_THRESH (1) | 624 | #define SILENCE_OVER_THRESH (1) |
625 | #define SILENCE_UNDER_THRESH (2) | 625 | #define SILENCE_UNDER_THRESH (2) |
@@ -631,25 +631,25 @@ struct notif_link_deterioration { | |||
631 | struct rate_histogram histogram; | 631 | struct rate_histogram histogram; |
632 | u8 silence_notification_type; /* SILENCE_OVER/UNDER_THRESH */ | 632 | u8 silence_notification_type; /* SILENCE_OVER/UNDER_THRESH */ |
633 | __le16 silence_count; | 633 | __le16 silence_count; |
634 | } __attribute__ ((packed)); | 634 | } __packed; |
635 | 635 | ||
636 | struct notif_association { | 636 | struct notif_association { |
637 | u8 state; | 637 | u8 state; |
638 | } __attribute__ ((packed)); | 638 | } __packed; |
639 | 639 | ||
640 | struct notif_authenticate { | 640 | struct notif_authenticate { |
641 | u8 state; | 641 | u8 state; |
642 | struct machdr24 addr; | 642 | struct machdr24 addr; |
643 | __le16 status; | 643 | __le16 status; |
644 | } __attribute__ ((packed)); | 644 | } __packed; |
645 | 645 | ||
646 | struct notif_calibration { | 646 | struct notif_calibration { |
647 | u8 data[104]; | 647 | u8 data[104]; |
648 | } __attribute__ ((packed)); | 648 | } __packed; |
649 | 649 | ||
650 | struct notif_noise { | 650 | struct notif_noise { |
651 | __le32 value; | 651 | __le32 value; |
652 | } __attribute__ ((packed)); | 652 | } __packed; |
653 | 653 | ||
654 | struct ipw_rx_notification { | 654 | struct ipw_rx_notification { |
655 | u8 reserved[8]; | 655 | u8 reserved[8]; |
@@ -669,7 +669,7 @@ struct ipw_rx_notification { | |||
669 | struct notif_noise noise; | 669 | struct notif_noise noise; |
670 | u8 raw[0]; | 670 | u8 raw[0]; |
671 | } u; | 671 | } u; |
672 | } __attribute__ ((packed)); | 672 | } __packed; |
673 | 673 | ||
674 | struct ipw_rx_frame { | 674 | struct ipw_rx_frame { |
675 | __le32 reserved1; | 675 | __le32 reserved1; |
@@ -692,14 +692,14 @@ struct ipw_rx_frame { | |||
692 | u8 rtscts_seen; // 0x1 RTS seen ; 0x2 CTS seen | 692 | u8 rtscts_seen; // 0x1 RTS seen ; 0x2 CTS seen |
693 | __le16 length; | 693 | __le16 length; |
694 | u8 data[0]; | 694 | u8 data[0]; |
695 | } __attribute__ ((packed)); | 695 | } __packed; |
696 | 696 | ||
697 | struct ipw_rx_header { | 697 | struct ipw_rx_header { |
698 | u8 message_type; | 698 | u8 message_type; |
699 | u8 rx_seq_num; | 699 | u8 rx_seq_num; |
700 | u8 control_bits; | 700 | u8 control_bits; |
701 | u8 reserved; | 701 | u8 reserved; |
702 | } __attribute__ ((packed)); | 702 | } __packed; |
703 | 703 | ||
704 | struct ipw_rx_packet { | 704 | struct ipw_rx_packet { |
705 | struct ipw_rx_header header; | 705 | struct ipw_rx_header header; |
@@ -707,7 +707,7 @@ struct ipw_rx_packet { | |||
707 | struct ipw_rx_frame frame; | 707 | struct ipw_rx_frame frame; |
708 | struct ipw_rx_notification notification; | 708 | struct ipw_rx_notification notification; |
709 | } u; | 709 | } u; |
710 | } __attribute__ ((packed)); | 710 | } __packed; |
711 | 711 | ||
712 | #define IPW_RX_NOTIFICATION_SIZE sizeof(struct ipw_rx_header) + 12 | 712 | #define IPW_RX_NOTIFICATION_SIZE sizeof(struct ipw_rx_header) + 12 |
713 | #define IPW_RX_FRAME_SIZE (unsigned int)(sizeof(struct ipw_rx_header) + \ | 713 | #define IPW_RX_FRAME_SIZE (unsigned int)(sizeof(struct ipw_rx_header) + \ |
@@ -717,7 +717,7 @@ struct ipw_rx_mem_buffer { | |||
717 | dma_addr_t dma_addr; | 717 | dma_addr_t dma_addr; |
718 | struct sk_buff *skb; | 718 | struct sk_buff *skb; |
719 | struct list_head list; | 719 | struct list_head list; |
720 | }; /* Not transferred over network, so not __attribute__ ((packed)) */ | 720 | }; /* Not transferred over network, so not __packed */ |
721 | 721 | ||
722 | struct ipw_rx_queue { | 722 | struct ipw_rx_queue { |
723 | struct ipw_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; | 723 | struct ipw_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; |
@@ -730,7 +730,7 @@ struct ipw_rx_queue { | |||
730 | struct list_head rx_free; /* Own an SKBs */ | 730 | struct list_head rx_free; /* Own an SKBs */ |
731 | struct list_head rx_used; /* No SKB allocated */ | 731 | struct list_head rx_used; /* No SKB allocated */ |
732 | spinlock_t lock; | 732 | spinlock_t lock; |
733 | }; /* Not transferred over network, so not __attribute__ ((packed)) */ | 733 | }; /* Not transferred over network, so not __packed */ |
734 | 734 | ||
735 | struct alive_command_responce { | 735 | struct alive_command_responce { |
736 | u8 alive_command; | 736 | u8 alive_command; |
@@ -745,21 +745,21 @@ struct alive_command_responce { | |||
745 | __le16 reserved4; | 745 | __le16 reserved4; |
746 | u8 time_stamp[5]; /* month, day, year, hours, minutes */ | 746 | u8 time_stamp[5]; /* month, day, year, hours, minutes */ |
747 | u8 ucode_valid; | 747 | u8 ucode_valid; |
748 | } __attribute__ ((packed)); | 748 | } __packed; |
749 | 749 | ||
750 | #define IPW_MAX_RATES 12 | 750 | #define IPW_MAX_RATES 12 |
751 | 751 | ||
752 | struct ipw_rates { | 752 | struct ipw_rates { |
753 | u8 num_rates; | 753 | u8 num_rates; |
754 | u8 rates[IPW_MAX_RATES]; | 754 | u8 rates[IPW_MAX_RATES]; |
755 | } __attribute__ ((packed)); | 755 | } __packed; |
756 | 756 | ||
757 | struct command_block { | 757 | struct command_block { |
758 | unsigned int control; | 758 | unsigned int control; |
759 | u32 source_addr; | 759 | u32 source_addr; |
760 | u32 dest_addr; | 760 | u32 dest_addr; |
761 | unsigned int status; | 761 | unsigned int status; |
762 | } __attribute__ ((packed)); | 762 | } __packed; |
763 | 763 | ||
764 | #define CB_NUMBER_OF_ELEMENTS_SMALL 64 | 764 | #define CB_NUMBER_OF_ELEMENTS_SMALL 64 |
765 | struct fw_image_desc { | 765 | struct fw_image_desc { |
@@ -792,7 +792,7 @@ struct ipw_sys_config { | |||
792 | u8 accept_all_mgmt_frames; | 792 | u8 accept_all_mgmt_frames; |
793 | u8 pass_noise_stats_to_host; | 793 | u8 pass_noise_stats_to_host; |
794 | u8 reserved3; | 794 | u8 reserved3; |
795 | } __attribute__ ((packed)); | 795 | } __packed; |
796 | 796 | ||
797 | struct ipw_multicast_addr { | 797 | struct ipw_multicast_addr { |
798 | u8 num_of_multicast_addresses; | 798 | u8 num_of_multicast_addresses; |
@@ -801,7 +801,7 @@ struct ipw_multicast_addr { | |||
801 | u8 mac2[6]; | 801 | u8 mac2[6]; |
802 | u8 mac3[6]; | 802 | u8 mac3[6]; |
803 | u8 mac4[6]; | 803 | u8 mac4[6]; |
804 | } __attribute__ ((packed)); | 804 | } __packed; |
805 | 805 | ||
806 | #define DCW_WEP_KEY_INDEX_MASK 0x03 /* bits [0:1] */ | 806 | #define DCW_WEP_KEY_INDEX_MASK 0x03 /* bits [0:1] */ |
807 | #define DCW_WEP_KEY_SEC_TYPE_MASK 0x30 /* bits [4:5] */ | 807 | #define DCW_WEP_KEY_SEC_TYPE_MASK 0x30 /* bits [4:5] */ |
@@ -822,7 +822,7 @@ struct ipw_wep_key { | |||
822 | u8 key_index; | 822 | u8 key_index; |
823 | u8 key_size; | 823 | u8 key_size; |
824 | u8 key[16]; | 824 | u8 key[16]; |
825 | } __attribute__ ((packed)); | 825 | } __packed; |
826 | 826 | ||
827 | struct ipw_tgi_tx_key { | 827 | struct ipw_tgi_tx_key { |
828 | u8 key_id; | 828 | u8 key_id; |
@@ -831,7 +831,7 @@ struct ipw_tgi_tx_key { | |||
831 | u8 flags; | 831 | u8 flags; |
832 | u8 key[16]; | 832 | u8 key[16]; |
833 | __le32 tx_counter[2]; | 833 | __le32 tx_counter[2]; |
834 | } __attribute__ ((packed)); | 834 | } __packed; |
835 | 835 | ||
836 | #define IPW_SCAN_CHANNELS 54 | 836 | #define IPW_SCAN_CHANNELS 54 |
837 | 837 | ||
@@ -840,7 +840,7 @@ struct ipw_scan_request { | |||
840 | __le16 dwell_time; | 840 | __le16 dwell_time; |
841 | u8 channels_list[IPW_SCAN_CHANNELS]; | 841 | u8 channels_list[IPW_SCAN_CHANNELS]; |
842 | u8 channels_reserved[3]; | 842 | u8 channels_reserved[3]; |
843 | } __attribute__ ((packed)); | 843 | } __packed; |
844 | 844 | ||
845 | enum { | 845 | enum { |
846 | IPW_SCAN_PASSIVE_TILL_FIRST_BEACON_SCAN = 0, | 846 | IPW_SCAN_PASSIVE_TILL_FIRST_BEACON_SCAN = 0, |
@@ -857,7 +857,7 @@ struct ipw_scan_request_ext { | |||
857 | u8 scan_type[IPW_SCAN_CHANNELS / 2]; | 857 | u8 scan_type[IPW_SCAN_CHANNELS / 2]; |
858 | u8 reserved; | 858 | u8 reserved; |
859 | __le16 dwell_time[IPW_SCAN_TYPES]; | 859 | __le16 dwell_time[IPW_SCAN_TYPES]; |
860 | } __attribute__ ((packed)); | 860 | } __packed; |
861 | 861 | ||
862 | static inline u8 ipw_get_scan_type(struct ipw_scan_request_ext *scan, u8 index) | 862 | static inline u8 ipw_get_scan_type(struct ipw_scan_request_ext *scan, u8 index) |
863 | { | 863 | { |
@@ -902,7 +902,7 @@ struct ipw_associate { | |||
902 | u8 smr; | 902 | u8 smr; |
903 | u8 reserved1; | 903 | u8 reserved1; |
904 | __le16 reserved2; | 904 | __le16 reserved2; |
905 | } __attribute__ ((packed)); | 905 | } __packed; |
906 | 906 | ||
907 | struct ipw_supported_rates { | 907 | struct ipw_supported_rates { |
908 | u8 ieee_mode; | 908 | u8 ieee_mode; |
@@ -910,36 +910,36 @@ struct ipw_supported_rates { | |||
910 | u8 purpose; | 910 | u8 purpose; |
911 | u8 reserved; | 911 | u8 reserved; |
912 | u8 supported_rates[IPW_MAX_RATES]; | 912 | u8 supported_rates[IPW_MAX_RATES]; |
913 | } __attribute__ ((packed)); | 913 | } __packed; |
914 | 914 | ||
915 | struct ipw_rts_threshold { | 915 | struct ipw_rts_threshold { |
916 | __le16 rts_threshold; | 916 | __le16 rts_threshold; |
917 | __le16 reserved; | 917 | __le16 reserved; |
918 | } __attribute__ ((packed)); | 918 | } __packed; |
919 | 919 | ||
920 | struct ipw_frag_threshold { | 920 | struct ipw_frag_threshold { |
921 | __le16 frag_threshold; | 921 | __le16 frag_threshold; |
922 | __le16 reserved; | 922 | __le16 reserved; |
923 | } __attribute__ ((packed)); | 923 | } __packed; |
924 | 924 | ||
925 | struct ipw_retry_limit { | 925 | struct ipw_retry_limit { |
926 | u8 short_retry_limit; | 926 | u8 short_retry_limit; |
927 | u8 long_retry_limit; | 927 | u8 long_retry_limit; |
928 | __le16 reserved; | 928 | __le16 reserved; |
929 | } __attribute__ ((packed)); | 929 | } __packed; |
930 | 930 | ||
931 | struct ipw_dino_config { | 931 | struct ipw_dino_config { |
932 | __le32 dino_config_addr; | 932 | __le32 dino_config_addr; |
933 | __le16 dino_config_size; | 933 | __le16 dino_config_size; |
934 | u8 dino_response; | 934 | u8 dino_response; |
935 | u8 reserved; | 935 | u8 reserved; |
936 | } __attribute__ ((packed)); | 936 | } __packed; |
937 | 937 | ||
938 | struct ipw_aironet_info { | 938 | struct ipw_aironet_info { |
939 | u8 id; | 939 | u8 id; |
940 | u8 length; | 940 | u8 length; |
941 | __le16 reserved; | 941 | __le16 reserved; |
942 | } __attribute__ ((packed)); | 942 | } __packed; |
943 | 943 | ||
944 | struct ipw_rx_key { | 944 | struct ipw_rx_key { |
945 | u8 station_index; | 945 | u8 station_index; |
@@ -950,25 +950,25 @@ struct ipw_rx_key { | |||
950 | u8 station_address[6]; | 950 | u8 station_address[6]; |
951 | u8 key_index; | 951 | u8 key_index; |
952 | u8 reserved; | 952 | u8 reserved; |
953 | } __attribute__ ((packed)); | 953 | } __packed; |
954 | 954 | ||
955 | struct ipw_country_channel_info { | 955 | struct ipw_country_channel_info { |
956 | u8 first_channel; | 956 | u8 first_channel; |
957 | u8 no_channels; | 957 | u8 no_channels; |
958 | s8 max_tx_power; | 958 | s8 max_tx_power; |
959 | } __attribute__ ((packed)); | 959 | } __packed; |
960 | 960 | ||
961 | struct ipw_country_info { | 961 | struct ipw_country_info { |
962 | u8 id; | 962 | u8 id; |
963 | u8 length; | 963 | u8 length; |
964 | u8 country_str[3]; | 964 | u8 country_str[3]; |
965 | struct ipw_country_channel_info groups[7]; | 965 | struct ipw_country_channel_info groups[7]; |
966 | } __attribute__ ((packed)); | 966 | } __packed; |
967 | 967 | ||
968 | struct ipw_channel_tx_power { | 968 | struct ipw_channel_tx_power { |
969 | u8 channel_number; | 969 | u8 channel_number; |
970 | s8 tx_power; | 970 | s8 tx_power; |
971 | } __attribute__ ((packed)); | 971 | } __packed; |
972 | 972 | ||
973 | #define SCAN_ASSOCIATED_INTERVAL (HZ) | 973 | #define SCAN_ASSOCIATED_INTERVAL (HZ) |
974 | #define SCAN_INTERVAL (HZ / 10) | 974 | #define SCAN_INTERVAL (HZ / 10) |
@@ -979,18 +979,18 @@ struct ipw_tx_power { | |||
979 | u8 num_channels; | 979 | u8 num_channels; |
980 | u8 ieee_mode; | 980 | u8 ieee_mode; |
981 | struct ipw_channel_tx_power channels_tx_power[MAX_A_CHANNELS]; | 981 | struct ipw_channel_tx_power channels_tx_power[MAX_A_CHANNELS]; |
982 | } __attribute__ ((packed)); | 982 | } __packed; |
983 | 983 | ||
984 | struct ipw_rsn_capabilities { | 984 | struct ipw_rsn_capabilities { |
985 | u8 id; | 985 | u8 id; |
986 | u8 length; | 986 | u8 length; |
987 | __le16 version; | 987 | __le16 version; |
988 | } __attribute__ ((packed)); | 988 | } __packed; |
989 | 989 | ||
990 | struct ipw_sensitivity_calib { | 990 | struct ipw_sensitivity_calib { |
991 | __le16 beacon_rssi_raw; | 991 | __le16 beacon_rssi_raw; |
992 | __le16 reserved; | 992 | __le16 reserved; |
993 | } __attribute__ ((packed)); | 993 | } __packed; |
994 | 994 | ||
995 | /** | 995 | /** |
996 | * Host command structure. | 996 | * Host command structure. |
@@ -1019,7 +1019,7 @@ struct ipw_cmd { /* XXX */ | |||
1019 | * nParams=(len+3)/4+status_len | 1019 | * nParams=(len+3)/4+status_len |
1020 | */ | 1020 | */ |
1021 | u32 param[0]; | 1021 | u32 param[0]; |
1022 | } __attribute__ ((packed)); | 1022 | } __packed; |
1023 | 1023 | ||
1024 | #define STATUS_HCMD_ACTIVE (1<<0) /**< host command in progress */ | 1024 | #define STATUS_HCMD_ACTIVE (1<<0) /**< host command in progress */ |
1025 | 1025 | ||
@@ -1114,7 +1114,7 @@ struct ipw_event { /* XXX */ | |||
1114 | u32 event; | 1114 | u32 event; |
1115 | u32 time; | 1115 | u32 time; |
1116 | u32 data; | 1116 | u32 data; |
1117 | } __attribute__ ((packed)); | 1117 | } __packed; |
1118 | 1118 | ||
1119 | struct ipw_fw_error { /* XXX */ | 1119 | struct ipw_fw_error { /* XXX */ |
1120 | unsigned long jiffies; | 1120 | unsigned long jiffies; |
@@ -1125,7 +1125,7 @@ struct ipw_fw_error { /* XXX */ | |||
1125 | struct ipw_error_elem *elem; | 1125 | struct ipw_error_elem *elem; |
1126 | struct ipw_event *log; | 1126 | struct ipw_event *log; |
1127 | u8 payload[0]; | 1127 | u8 payload[0]; |
1128 | } __attribute__ ((packed)); | 1128 | } __packed; |
1129 | 1129 | ||
1130 | #ifdef CONFIG_IPW2200_PROMISCUOUS | 1130 | #ifdef CONFIG_IPW2200_PROMISCUOUS |
1131 | 1131 | ||
@@ -1170,7 +1170,7 @@ struct ipw_rt_hdr { | |||
1170 | s8 rt_dbmnoise; | 1170 | s8 rt_dbmnoise; |
1171 | u8 rt_antenna; /* antenna number */ | 1171 | u8 rt_antenna; /* antenna number */ |
1172 | u8 payload[0]; /* payload... */ | 1172 | u8 payload[0]; /* payload... */ |
1173 | } __attribute__ ((packed)); | 1173 | } __packed; |
1174 | #endif | 1174 | #endif |
1175 | 1175 | ||
1176 | struct ipw_priv { | 1176 | struct ipw_priv { |
@@ -1957,7 +1957,7 @@ enum { | |||
1957 | struct ipw_fixed_rate { | 1957 | struct ipw_fixed_rate { |
1958 | __le16 tx_rates; | 1958 | __le16 tx_rates; |
1959 | __le16 reserved; | 1959 | __le16 reserved; |
1960 | } __attribute__ ((packed)); | 1960 | } __packed; |
1961 | 1961 | ||
1962 | #define IPW_INDIRECT_ADDR_MASK (~0x3ul) | 1962 | #define IPW_INDIRECT_ADDR_MASK (~0x3ul) |
1963 | 1963 | ||
@@ -1966,14 +1966,14 @@ struct host_cmd { | |||
1966 | u8 len; | 1966 | u8 len; |
1967 | u16 reserved; | 1967 | u16 reserved; |
1968 | u32 *param; | 1968 | u32 *param; |
1969 | } __attribute__ ((packed)); /* XXX */ | 1969 | } __packed; /* XXX */ |
1970 | 1970 | ||
1971 | struct cmdlog_host_cmd { | 1971 | struct cmdlog_host_cmd { |
1972 | u8 cmd; | 1972 | u8 cmd; |
1973 | u8 len; | 1973 | u8 len; |
1974 | __le16 reserved; | 1974 | __le16 reserved; |
1975 | char param[124]; | 1975 | char param[124]; |
1976 | } __attribute__ ((packed)); | 1976 | } __packed; |
1977 | 1977 | ||
1978 | struct ipw_cmd_log { | 1978 | struct ipw_cmd_log { |
1979 | unsigned long jiffies; | 1979 | unsigned long jiffies; |
diff --git a/drivers/net/wireless/ipw2x00/libipw.h b/drivers/net/wireless/ipw2x00/libipw.h index 284b0e4cb815..4736861bc4f8 100644 --- a/drivers/net/wireless/ipw2x00/libipw.h +++ b/drivers/net/wireless/ipw2x00/libipw.h | |||
@@ -154,7 +154,7 @@ struct libipw_snap_hdr { | |||
154 | u8 ctrl; /* always 0x03 */ | 154 | u8 ctrl; /* always 0x03 */ |
155 | u8 oui[P80211_OUI_LEN]; /* organizational universal id */ | 155 | u8 oui[P80211_OUI_LEN]; /* organizational universal id */ |
156 | 156 | ||
157 | } __attribute__ ((packed)); | 157 | } __packed; |
158 | 158 | ||
159 | #define SNAP_SIZE sizeof(struct libipw_snap_hdr) | 159 | #define SNAP_SIZE sizeof(struct libipw_snap_hdr) |
160 | 160 | ||
@@ -323,7 +323,7 @@ struct libipw_security { | |||
323 | u8 keys[WEP_KEYS][SCM_KEY_LEN]; | 323 | u8 keys[WEP_KEYS][SCM_KEY_LEN]; |
324 | u8 level; | 324 | u8 level; |
325 | u16 flags; | 325 | u16 flags; |
326 | } __attribute__ ((packed)); | 326 | } __packed; |
327 | 327 | ||
328 | /* | 328 | /* |
329 | 329 | ||
@@ -347,7 +347,7 @@ struct libipw_hdr_1addr { | |||
347 | __le16 duration_id; | 347 | __le16 duration_id; |
348 | u8 addr1[ETH_ALEN]; | 348 | u8 addr1[ETH_ALEN]; |
349 | u8 payload[0]; | 349 | u8 payload[0]; |
350 | } __attribute__ ((packed)); | 350 | } __packed; |
351 | 351 | ||
352 | struct libipw_hdr_2addr { | 352 | struct libipw_hdr_2addr { |
353 | __le16 frame_ctl; | 353 | __le16 frame_ctl; |
@@ -355,7 +355,7 @@ struct libipw_hdr_2addr { | |||
355 | u8 addr1[ETH_ALEN]; | 355 | u8 addr1[ETH_ALEN]; |
356 | u8 addr2[ETH_ALEN]; | 356 | u8 addr2[ETH_ALEN]; |
357 | u8 payload[0]; | 357 | u8 payload[0]; |
358 | } __attribute__ ((packed)); | 358 | } __packed; |
359 | 359 | ||
360 | struct libipw_hdr_3addr { | 360 | struct libipw_hdr_3addr { |
361 | __le16 frame_ctl; | 361 | __le16 frame_ctl; |
@@ -365,7 +365,7 @@ struct libipw_hdr_3addr { | |||
365 | u8 addr3[ETH_ALEN]; | 365 | u8 addr3[ETH_ALEN]; |
366 | __le16 seq_ctl; | 366 | __le16 seq_ctl; |
367 | u8 payload[0]; | 367 | u8 payload[0]; |
368 | } __attribute__ ((packed)); | 368 | } __packed; |
369 | 369 | ||
370 | struct libipw_hdr_4addr { | 370 | struct libipw_hdr_4addr { |
371 | __le16 frame_ctl; | 371 | __le16 frame_ctl; |
@@ -376,7 +376,7 @@ struct libipw_hdr_4addr { | |||
376 | __le16 seq_ctl; | 376 | __le16 seq_ctl; |
377 | u8 addr4[ETH_ALEN]; | 377 | u8 addr4[ETH_ALEN]; |
378 | u8 payload[0]; | 378 | u8 payload[0]; |
379 | } __attribute__ ((packed)); | 379 | } __packed; |
380 | 380 | ||
381 | struct libipw_hdr_3addrqos { | 381 | struct libipw_hdr_3addrqos { |
382 | __le16 frame_ctl; | 382 | __le16 frame_ctl; |
@@ -387,13 +387,13 @@ struct libipw_hdr_3addrqos { | |||
387 | __le16 seq_ctl; | 387 | __le16 seq_ctl; |
388 | u8 payload[0]; | 388 | u8 payload[0]; |
389 | __le16 qos_ctl; | 389 | __le16 qos_ctl; |
390 | } __attribute__ ((packed)); | 390 | } __packed; |
391 | 391 | ||
392 | struct libipw_info_element { | 392 | struct libipw_info_element { |
393 | u8 id; | 393 | u8 id; |
394 | u8 len; | 394 | u8 len; |
395 | u8 data[0]; | 395 | u8 data[0]; |
396 | } __attribute__ ((packed)); | 396 | } __packed; |
397 | 397 | ||
398 | /* | 398 | /* |
399 | * These are the data types that can make up management packets | 399 | * These are the data types that can make up management packets |
@@ -406,7 +406,7 @@ struct libipw_info_element { | |||
406 | u16 listen_interval; | 406 | u16 listen_interval; |
407 | struct { | 407 | struct { |
408 | u16 association_id:14, reserved:2; | 408 | u16 association_id:14, reserved:2; |
409 | } __attribute__ ((packed)); | 409 | } __packed; |
410 | u32 time_stamp[2]; | 410 | u32 time_stamp[2]; |
411 | u16 reason; | 411 | u16 reason; |
412 | u16 status; | 412 | u16 status; |
@@ -419,7 +419,7 @@ struct libipw_auth { | |||
419 | __le16 status; | 419 | __le16 status; |
420 | /* challenge */ | 420 | /* challenge */ |
421 | struct libipw_info_element info_element[0]; | 421 | struct libipw_info_element info_element[0]; |
422 | } __attribute__ ((packed)); | 422 | } __packed; |
423 | 423 | ||
424 | struct libipw_channel_switch { | 424 | struct libipw_channel_switch { |
425 | u8 id; | 425 | u8 id; |
@@ -427,7 +427,7 @@ struct libipw_channel_switch { | |||
427 | u8 mode; | 427 | u8 mode; |
428 | u8 channel; | 428 | u8 channel; |
429 | u8 count; | 429 | u8 count; |
430 | } __attribute__ ((packed)); | 430 | } __packed; |
431 | 431 | ||
432 | struct libipw_action { | 432 | struct libipw_action { |
433 | struct libipw_hdr_3addr header; | 433 | struct libipw_hdr_3addr header; |
@@ -441,12 +441,12 @@ struct libipw_action { | |||
441 | struct libipw_channel_switch channel_switch; | 441 | struct libipw_channel_switch channel_switch; |
442 | 442 | ||
443 | } format; | 443 | } format; |
444 | } __attribute__ ((packed)); | 444 | } __packed; |
445 | 445 | ||
446 | struct libipw_disassoc { | 446 | struct libipw_disassoc { |
447 | struct libipw_hdr_3addr header; | 447 | struct libipw_hdr_3addr header; |
448 | __le16 reason; | 448 | __le16 reason; |
449 | } __attribute__ ((packed)); | 449 | } __packed; |
450 | 450 | ||
451 | /* Alias deauth for disassoc */ | 451 | /* Alias deauth for disassoc */ |
452 | #define libipw_deauth libipw_disassoc | 452 | #define libipw_deauth libipw_disassoc |
@@ -455,7 +455,7 @@ struct libipw_probe_request { | |||
455 | struct libipw_hdr_3addr header; | 455 | struct libipw_hdr_3addr header; |
456 | /* SSID, supported rates */ | 456 | /* SSID, supported rates */ |
457 | struct libipw_info_element info_element[0]; | 457 | struct libipw_info_element info_element[0]; |
458 | } __attribute__ ((packed)); | 458 | } __packed; |
459 | 459 | ||
460 | struct libipw_probe_response { | 460 | struct libipw_probe_response { |
461 | struct libipw_hdr_3addr header; | 461 | struct libipw_hdr_3addr header; |
@@ -465,7 +465,7 @@ struct libipw_probe_response { | |||
465 | /* SSID, supported rates, FH params, DS params, | 465 | /* SSID, supported rates, FH params, DS params, |
466 | * CF params, IBSS params, TIM (if beacon), RSN */ | 466 | * CF params, IBSS params, TIM (if beacon), RSN */ |
467 | struct libipw_info_element info_element[0]; | 467 | struct libipw_info_element info_element[0]; |
468 | } __attribute__ ((packed)); | 468 | } __packed; |
469 | 469 | ||
470 | /* Alias beacon for probe_response */ | 470 | /* Alias beacon for probe_response */ |
471 | #define libipw_beacon libipw_probe_response | 471 | #define libipw_beacon libipw_probe_response |
@@ -476,7 +476,7 @@ struct libipw_assoc_request { | |||
476 | __le16 listen_interval; | 476 | __le16 listen_interval; |
477 | /* SSID, supported rates, RSN */ | 477 | /* SSID, supported rates, RSN */ |
478 | struct libipw_info_element info_element[0]; | 478 | struct libipw_info_element info_element[0]; |
479 | } __attribute__ ((packed)); | 479 | } __packed; |
480 | 480 | ||
481 | struct libipw_reassoc_request { | 481 | struct libipw_reassoc_request { |
482 | struct libipw_hdr_3addr header; | 482 | struct libipw_hdr_3addr header; |
@@ -484,7 +484,7 @@ struct libipw_reassoc_request { | |||
484 | __le16 listen_interval; | 484 | __le16 listen_interval; |
485 | u8 current_ap[ETH_ALEN]; | 485 | u8 current_ap[ETH_ALEN]; |
486 | struct libipw_info_element info_element[0]; | 486 | struct libipw_info_element info_element[0]; |
487 | } __attribute__ ((packed)); | 487 | } __packed; |
488 | 488 | ||
489 | struct libipw_assoc_response { | 489 | struct libipw_assoc_response { |
490 | struct libipw_hdr_3addr header; | 490 | struct libipw_hdr_3addr header; |
@@ -493,7 +493,7 @@ struct libipw_assoc_response { | |||
493 | __le16 aid; | 493 | __le16 aid; |
494 | /* supported rates */ | 494 | /* supported rates */ |
495 | struct libipw_info_element info_element[0]; | 495 | struct libipw_info_element info_element[0]; |
496 | } __attribute__ ((packed)); | 496 | } __packed; |
497 | 497 | ||
498 | struct libipw_txb { | 498 | struct libipw_txb { |
499 | u8 nr_frags; | 499 | u8 nr_frags; |
@@ -555,19 +555,19 @@ struct libipw_qos_information_element { | |||
555 | u8 qui_subtype; | 555 | u8 qui_subtype; |
556 | u8 version; | 556 | u8 version; |
557 | u8 ac_info; | 557 | u8 ac_info; |
558 | } __attribute__ ((packed)); | 558 | } __packed; |
559 | 559 | ||
560 | struct libipw_qos_ac_parameter { | 560 | struct libipw_qos_ac_parameter { |
561 | u8 aci_aifsn; | 561 | u8 aci_aifsn; |
562 | u8 ecw_min_max; | 562 | u8 ecw_min_max; |
563 | __le16 tx_op_limit; | 563 | __le16 tx_op_limit; |
564 | } __attribute__ ((packed)); | 564 | } __packed; |
565 | 565 | ||
566 | struct libipw_qos_parameter_info { | 566 | struct libipw_qos_parameter_info { |
567 | struct libipw_qos_information_element info_element; | 567 | struct libipw_qos_information_element info_element; |
568 | u8 reserved; | 568 | u8 reserved; |
569 | struct libipw_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM]; | 569 | struct libipw_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM]; |
570 | } __attribute__ ((packed)); | 570 | } __packed; |
571 | 571 | ||
572 | struct libipw_qos_parameters { | 572 | struct libipw_qos_parameters { |
573 | __le16 cw_min[QOS_QUEUE_NUM]; | 573 | __le16 cw_min[QOS_QUEUE_NUM]; |
@@ -575,7 +575,7 @@ struct libipw_qos_parameters { | |||
575 | u8 aifs[QOS_QUEUE_NUM]; | 575 | u8 aifs[QOS_QUEUE_NUM]; |
576 | u8 flag[QOS_QUEUE_NUM]; | 576 | u8 flag[QOS_QUEUE_NUM]; |
577 | __le16 tx_op_limit[QOS_QUEUE_NUM]; | 577 | __le16 tx_op_limit[QOS_QUEUE_NUM]; |
578 | } __attribute__ ((packed)); | 578 | } __packed; |
579 | 579 | ||
580 | struct libipw_qos_data { | 580 | struct libipw_qos_data { |
581 | struct libipw_qos_parameters parameters; | 581 | struct libipw_qos_parameters parameters; |
@@ -588,7 +588,7 @@ struct libipw_qos_data { | |||
588 | struct libipw_tim_parameters { | 588 | struct libipw_tim_parameters { |
589 | u8 tim_count; | 589 | u8 tim_count; |
590 | u8 tim_period; | 590 | u8 tim_period; |
591 | } __attribute__ ((packed)); | 591 | } __packed; |
592 | 592 | ||
593 | /*******************************************************/ | 593 | /*******************************************************/ |
594 | 594 | ||
@@ -606,7 +606,7 @@ struct libipw_basic_report { | |||
606 | __le64 start_time; | 606 | __le64 start_time; |
607 | __le16 duration; | 607 | __le16 duration; |
608 | u8 map; | 608 | u8 map; |
609 | } __attribute__ ((packed)); | 609 | } __packed; |
610 | 610 | ||
611 | enum { /* libipw_measurement_request.mode */ | 611 | enum { /* libipw_measurement_request.mode */ |
612 | /* Bit 0 is reserved */ | 612 | /* Bit 0 is reserved */ |
@@ -627,7 +627,7 @@ struct libipw_measurement_params { | |||
627 | u8 channel; | 627 | u8 channel; |
628 | __le64 start_time; | 628 | __le64 start_time; |
629 | __le16 duration; | 629 | __le16 duration; |
630 | } __attribute__ ((packed)); | 630 | } __packed; |
631 | 631 | ||
632 | struct libipw_measurement_request { | 632 | struct libipw_measurement_request { |
633 | struct libipw_info_element ie; | 633 | struct libipw_info_element ie; |
@@ -635,7 +635,7 @@ struct libipw_measurement_request { | |||
635 | u8 mode; | 635 | u8 mode; |
636 | u8 type; | 636 | u8 type; |
637 | struct libipw_measurement_params params[0]; | 637 | struct libipw_measurement_params params[0]; |
638 | } __attribute__ ((packed)); | 638 | } __packed; |
639 | 639 | ||
640 | struct libipw_measurement_report { | 640 | struct libipw_measurement_report { |
641 | struct libipw_info_element ie; | 641 | struct libipw_info_element ie; |
@@ -645,17 +645,17 @@ struct libipw_measurement_report { | |||
645 | union { | 645 | union { |
646 | struct libipw_basic_report basic[0]; | 646 | struct libipw_basic_report basic[0]; |
647 | } u; | 647 | } u; |
648 | } __attribute__ ((packed)); | 648 | } __packed; |
649 | 649 | ||
650 | struct libipw_tpc_report { | 650 | struct libipw_tpc_report { |
651 | u8 transmit_power; | 651 | u8 transmit_power; |
652 | u8 link_margin; | 652 | u8 link_margin; |
653 | } __attribute__ ((packed)); | 653 | } __packed; |
654 | 654 | ||
655 | struct libipw_channel_map { | 655 | struct libipw_channel_map { |
656 | u8 channel; | 656 | u8 channel; |
657 | u8 map; | 657 | u8 map; |
658 | } __attribute__ ((packed)); | 658 | } __packed; |
659 | 659 | ||
660 | struct libipw_ibss_dfs { | 660 | struct libipw_ibss_dfs { |
661 | struct libipw_info_element ie; | 661 | struct libipw_info_element ie; |
@@ -668,14 +668,14 @@ struct libipw_csa { | |||
668 | u8 mode; | 668 | u8 mode; |
669 | u8 channel; | 669 | u8 channel; |
670 | u8 count; | 670 | u8 count; |
671 | } __attribute__ ((packed)); | 671 | } __packed; |
672 | 672 | ||
673 | struct libipw_quiet { | 673 | struct libipw_quiet { |
674 | u8 count; | 674 | u8 count; |
675 | u8 period; | 675 | u8 period; |
676 | u8 duration; | 676 | u8 duration; |
677 | u8 offset; | 677 | u8 offset; |
678 | } __attribute__ ((packed)); | 678 | } __packed; |
679 | 679 | ||
680 | struct libipw_network { | 680 | struct libipw_network { |
681 | /* These entries are used to identify a unique network */ | 681 | /* These entries are used to identify a unique network */ |
diff --git a/drivers/net/wireless/iwlwifi/Kconfig b/drivers/net/wireless/iwlwifi/Kconfig index dc8ed1527666..6491e27baac5 100644 --- a/drivers/net/wireless/iwlwifi/Kconfig +++ b/drivers/net/wireless/iwlwifi/Kconfig | |||
@@ -30,9 +30,11 @@ config IWLWIFI_DEBUG | |||
30 | 30 | ||
31 | config IWLWIFI_DEBUGFS | 31 | config IWLWIFI_DEBUGFS |
32 | bool "iwlagn debugfs support" | 32 | bool "iwlagn debugfs support" |
33 | depends on IWLWIFI && IWLWIFI_DEBUG && MAC80211_DEBUGFS | 33 | depends on IWLWIFI && MAC80211_DEBUGFS |
34 | ---help--- | 34 | ---help--- |
35 | Enable creation of debugfs files for the iwlwifi drivers. | 35 | Enable creation of debugfs files for the iwlwifi drivers. This |
36 | is a low-impact option that allows getting insight into the | ||
37 | driver's state at runtime. | ||
36 | 38 | ||
37 | config IWLWIFI_DEVICE_TRACING | 39 | config IWLWIFI_DEVICE_TRACING |
38 | bool "iwlwifi device access tracing" | 40 | bool "iwlwifi device access tracing" |
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c index 6be2992f8f21..dba91e0233b6 100644 --- a/drivers/net/wireless/iwlwifi/iwl-1000.c +++ b/drivers/net/wireless/iwlwifi/iwl-1000.c | |||
@@ -158,6 +158,8 @@ static int iwl1000_hw_set_hw_params(struct iwl_priv *priv) | |||
158 | BIT(IWL_CALIB_TX_IQ_PERD) | | 158 | BIT(IWL_CALIB_TX_IQ_PERD) | |
159 | BIT(IWL_CALIB_BASE_BAND); | 159 | BIT(IWL_CALIB_BASE_BAND); |
160 | 160 | ||
161 | priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS; | ||
162 | |||
161 | return 0; | 163 | return 0; |
162 | } | 164 | } |
163 | 165 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-3945-debugfs.c index 6a9c64a50e36..ef0835b01b6b 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-debugfs.c +++ b/drivers/net/wireless/iwlwifi/iwl-3945-debugfs.c | |||
@@ -28,6 +28,28 @@ | |||
28 | 28 | ||
29 | #include "iwl-3945-debugfs.h" | 29 | #include "iwl-3945-debugfs.h" |
30 | 30 | ||
31 | |||
32 | static int iwl3945_statistics_flag(struct iwl_priv *priv, char *buf, int bufsz) | ||
33 | { | ||
34 | int p = 0; | ||
35 | |||
36 | p += scnprintf(buf + p, bufsz - p, "Statistics Flag(0x%X):\n", | ||
37 | le32_to_cpu(priv->_3945.statistics.flag)); | ||
38 | if (le32_to_cpu(priv->_3945.statistics.flag) & | ||
39 | UCODE_STATISTICS_CLEAR_MSK) | ||
40 | p += scnprintf(buf + p, bufsz - p, | ||
41 | "\tStatistics have been cleared\n"); | ||
42 | p += scnprintf(buf + p, bufsz - p, "\tOperational Frequency: %s\n", | ||
43 | (le32_to_cpu(priv->_3945.statistics.flag) & | ||
44 | UCODE_STATISTICS_FREQUENCY_MSK) | ||
45 | ? "2.4 GHz" : "5.2 GHz"); | ||
46 | p += scnprintf(buf + p, bufsz - p, "\tTGj Narrow Band: %s\n", | ||
47 | (le32_to_cpu(priv->_3945.statistics.flag) & | ||
48 | UCODE_STATISTICS_NARROW_BAND_MSK) | ||
49 | ? "enabled" : "disabled"); | ||
50 | return p; | ||
51 | } | ||
52 | |||
31 | ssize_t iwl3945_ucode_rx_stats_read(struct file *file, | 53 | ssize_t iwl3945_ucode_rx_stats_read(struct file *file, |
32 | char __user *user_buf, | 54 | char __user *user_buf, |
33 | size_t count, loff_t *ppos) | 55 | size_t count, loff_t *ppos) |
@@ -70,7 +92,7 @@ ssize_t iwl3945_ucode_rx_stats_read(struct file *file, | |||
70 | max_cck = &priv->_3945.max_delta.rx.cck; | 92 | max_cck = &priv->_3945.max_delta.rx.cck; |
71 | max_general = &priv->_3945.max_delta.rx.general; | 93 | max_general = &priv->_3945.max_delta.rx.general; |
72 | 94 | ||
73 | pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz); | 95 | pos += iwl3945_statistics_flag(priv, buf, bufsz); |
74 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 96 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" |
75 | "acumulative delta max\n", | 97 | "acumulative delta max\n", |
76 | "Statistics_Rx - OFDM:"); | 98 | "Statistics_Rx - OFDM:"); |
@@ -331,7 +353,7 @@ ssize_t iwl3945_ucode_tx_stats_read(struct file *file, | |||
331 | accum_tx = &priv->_3945.accum_statistics.tx; | 353 | accum_tx = &priv->_3945.accum_statistics.tx; |
332 | delta_tx = &priv->_3945.delta_statistics.tx; | 354 | delta_tx = &priv->_3945.delta_statistics.tx; |
333 | max_tx = &priv->_3945.max_delta.tx; | 355 | max_tx = &priv->_3945.max_delta.tx; |
334 | pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz); | 356 | pos += iwl3945_statistics_flag(priv, buf, bufsz); |
335 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 357 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" |
336 | "acumulative delta max\n", | 358 | "acumulative delta max\n", |
337 | "Statistics_Tx:"); | 359 | "Statistics_Tx:"); |
@@ -438,7 +460,7 @@ ssize_t iwl3945_ucode_general_stats_read(struct file *file, | |||
438 | accum_div = &priv->_3945.accum_statistics.general.div; | 460 | accum_div = &priv->_3945.accum_statistics.general.div; |
439 | delta_div = &priv->_3945.delta_statistics.general.div; | 461 | delta_div = &priv->_3945.delta_statistics.general.div; |
440 | max_div = &priv->_3945.max_delta.general.div; | 462 | max_div = &priv->_3945.max_delta.general.div; |
441 | pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz); | 463 | pos += iwl3945_statistics_flag(priv, buf, bufsz); |
442 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 464 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" |
443 | "acumulative delta max\n", | 465 | "acumulative delta max\n", |
444 | "Statistics_General:"); | 466 | "Statistics_General:"); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-fh.h b/drivers/net/wireless/iwlwifi/iwl-3945-fh.h index 042f6bc0df13..2c9ed2b502a3 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-fh.h +++ b/drivers/net/wireless/iwlwifi/iwl-3945-fh.h | |||
@@ -175,13 +175,13 @@ | |||
175 | struct iwl3945_tfd_tb { | 175 | struct iwl3945_tfd_tb { |
176 | __le32 addr; | 176 | __le32 addr; |
177 | __le32 len; | 177 | __le32 len; |
178 | } __attribute__ ((packed)); | 178 | } __packed; |
179 | 179 | ||
180 | struct iwl3945_tfd { | 180 | struct iwl3945_tfd { |
181 | __le32 control_flags; | 181 | __le32 control_flags; |
182 | struct iwl3945_tfd_tb tbs[4]; | 182 | struct iwl3945_tfd_tb tbs[4]; |
183 | u8 __pad[28]; | 183 | u8 __pad[28]; |
184 | } __attribute__ ((packed)); | 184 | } __packed; |
185 | 185 | ||
186 | 186 | ||
187 | #endif /* __iwl_3945_fh_h__ */ | 187 | #endif /* __iwl_3945_fh_h__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-hw.h b/drivers/net/wireless/iwlwifi/iwl-3945-hw.h index 91bcb4e3cdfb..7c731a793632 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-hw.h +++ b/drivers/net/wireless/iwlwifi/iwl-3945-hw.h | |||
@@ -96,7 +96,7 @@ struct iwl3945_eeprom_txpower_sample { | |||
96 | u8 gain_index; /* index into power (gain) setup table ... */ | 96 | u8 gain_index; /* index into power (gain) setup table ... */ |
97 | s8 power; /* ... for this pwr level for this chnl group */ | 97 | s8 power; /* ... for this pwr level for this chnl group */ |
98 | u16 v_det; /* PA output voltage */ | 98 | u16 v_det; /* PA output voltage */ |
99 | } __attribute__ ((packed)); | 99 | } __packed; |
100 | 100 | ||
101 | /* | 101 | /* |
102 | * Mappings of Tx power levels -> nominal radio/DSP gain table indexes. | 102 | * Mappings of Tx power levels -> nominal radio/DSP gain table indexes. |
@@ -117,7 +117,7 @@ struct iwl3945_eeprom_txpower_group { | |||
117 | u8 group_channel; /* "representative" channel # in this band */ | 117 | u8 group_channel; /* "representative" channel # in this band */ |
118 | s16 temperature; /* h/w temperature at factory calib this band | 118 | s16 temperature; /* h/w temperature at factory calib this band |
119 | * (signed) */ | 119 | * (signed) */ |
120 | } __attribute__ ((packed)); | 120 | } __packed; |
121 | 121 | ||
122 | /* | 122 | /* |
123 | * Temperature-based Tx-power compensation data, not band-specific. | 123 | * Temperature-based Tx-power compensation data, not band-specific. |
@@ -131,7 +131,7 @@ struct iwl3945_eeprom_temperature_corr { | |||
131 | u32 Tc; | 131 | u32 Tc; |
132 | u32 Td; | 132 | u32 Td; |
133 | u32 Te; | 133 | u32 Te; |
134 | } __attribute__ ((packed)); | 134 | } __packed; |
135 | 135 | ||
136 | /* | 136 | /* |
137 | * EEPROM map | 137 | * EEPROM map |
@@ -215,7 +215,7 @@ struct iwl3945_eeprom { | |||
215 | /* abs.ofs: 512 */ | 215 | /* abs.ofs: 512 */ |
216 | struct iwl3945_eeprom_temperature_corr corrections; /* abs.ofs: 832 */ | 216 | struct iwl3945_eeprom_temperature_corr corrections; /* abs.ofs: 832 */ |
217 | u8 reserved16[172]; /* fill out to full 1024 byte block */ | 217 | u8 reserved16[172]; /* fill out to full 1024 byte block */ |
218 | } __attribute__ ((packed)); | 218 | } __packed; |
219 | 219 | ||
220 | #define IWL3945_EEPROM_IMG_SIZE 1024 | 220 | #define IWL3945_EEPROM_IMG_SIZE 1024 |
221 | 221 | ||
@@ -274,7 +274,7 @@ static inline int iwl3945_hw_valid_rtc_data_addr(u32 addr) | |||
274 | * and &iwl3945_shared.rx_read_ptr[0] is provided to FH_RCSR_RPTR_ADDR(0) */ | 274 | * and &iwl3945_shared.rx_read_ptr[0] is provided to FH_RCSR_RPTR_ADDR(0) */ |
275 | struct iwl3945_shared { | 275 | struct iwl3945_shared { |
276 | __le32 tx_base_ptr[8]; | 276 | __le32 tx_base_ptr[8]; |
277 | } __attribute__ ((packed)); | 277 | } __packed; |
278 | 278 | ||
279 | static inline u8 iwl3945_hw_get_rate(__le16 rate_n_flags) | 279 | static inline u8 iwl3945_hw_get_rate(__le16 rate_n_flags) |
280 | { | 280 | { |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c index c44a303e62ed..0fa1d51c9c5a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945.c +++ b/drivers/net/wireless/iwlwifi/iwl-3945.c | |||
@@ -279,8 +279,8 @@ static void iwl3945_tx_queue_reclaim(struct iwl_priv *priv, | |||
279 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { | 279 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
280 | 280 | ||
281 | tx_info = &txq->txb[txq->q.read_ptr]; | 281 | tx_info = &txq->txb[txq->q.read_ptr]; |
282 | ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]); | 282 | ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb); |
283 | tx_info->skb[0] = NULL; | 283 | tx_info->skb = NULL; |
284 | priv->cfg->ops->lib->txq_free_tfd(priv, txq); | 284 | priv->cfg->ops->lib->txq_free_tfd(priv, txq); |
285 | } | 285 | } |
286 | 286 | ||
@@ -315,7 +315,7 @@ static void iwl3945_rx_reply_tx(struct iwl_priv *priv, | |||
315 | return; | 315 | return; |
316 | } | 316 | } |
317 | 317 | ||
318 | info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]); | 318 | info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb); |
319 | ieee80211_tx_info_clear_status(info); | 319 | ieee80211_tx_info_clear_status(info); |
320 | 320 | ||
321 | /* Fill the MRR chain with some info about on-chip retransmissions */ | 321 | /* Fill the MRR chain with some info about on-chip retransmissions */ |
@@ -352,7 +352,7 @@ static void iwl3945_rx_reply_tx(struct iwl_priv *priv, | |||
352 | * RX handler implementations | 352 | * RX handler implementations |
353 | * | 353 | * |
354 | *****************************************************************************/ | 354 | *****************************************************************************/ |
355 | #ifdef CONFIG_IWLWIFI_DEBUG | 355 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
356 | /* | 356 | /* |
357 | * based on the assumption of all statistics counter are in DWORD | 357 | * based on the assumption of all statistics counter are in DWORD |
358 | * FIXME: This function is for debugging, do not deal with | 358 | * FIXME: This function is for debugging, do not deal with |
@@ -460,7 +460,7 @@ void iwl3945_hw_rx_statistics(struct iwl_priv *priv, | |||
460 | IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n", | 460 | IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n", |
461 | (int)sizeof(struct iwl3945_notif_statistics), | 461 | (int)sizeof(struct iwl3945_notif_statistics), |
462 | le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK); | 462 | le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK); |
463 | #ifdef CONFIG_IWLWIFI_DEBUG | 463 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
464 | iwl3945_accumulative_statistics(priv, (__le32 *)&pkt->u.raw); | 464 | iwl3945_accumulative_statistics(priv, (__le32 *)&pkt->u.raw); |
465 | #endif | 465 | #endif |
466 | iwl_recover_from_statistics(priv, pkt); | 466 | iwl_recover_from_statistics(priv, pkt); |
@@ -475,7 +475,7 @@ void iwl3945_reply_statistics(struct iwl_priv *priv, | |||
475 | __le32 *flag = (__le32 *)&pkt->u.raw; | 475 | __le32 *flag = (__le32 *)&pkt->u.raw; |
476 | 476 | ||
477 | if (le32_to_cpu(*flag) & UCODE_STATISTICS_CLEAR_MSK) { | 477 | if (le32_to_cpu(*flag) & UCODE_STATISTICS_CLEAR_MSK) { |
478 | #ifdef CONFIG_IWLWIFI_DEBUG | 478 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
479 | memset(&priv->_3945.accum_statistics, 0, | 479 | memset(&priv->_3945.accum_statistics, 0, |
480 | sizeof(struct iwl3945_notif_statistics)); | 480 | sizeof(struct iwl3945_notif_statistics)); |
481 | memset(&priv->_3945.delta_statistics, 0, | 481 | memset(&priv->_3945.delta_statistics, 0, |
@@ -494,158 +494,6 @@ void iwl3945_reply_statistics(struct iwl_priv *priv, | |||
494 | * Misc. internal state and helper functions | 494 | * Misc. internal state and helper functions |
495 | * | 495 | * |
496 | ******************************************************************************/ | 496 | ******************************************************************************/ |
497 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
498 | |||
499 | /** | ||
500 | * iwl3945_report_frame - dump frame to syslog during debug sessions | ||
501 | * | ||
502 | * You may hack this function to show different aspects of received frames, | ||
503 | * including selective frame dumps. | ||
504 | * group100 parameter selects whether to show 1 out of 100 good frames. | ||
505 | */ | ||
506 | static void _iwl3945_dbg_report_frame(struct iwl_priv *priv, | ||
507 | struct iwl_rx_packet *pkt, | ||
508 | struct ieee80211_hdr *header, int group100) | ||
509 | { | ||
510 | u32 to_us; | ||
511 | u32 print_summary = 0; | ||
512 | u32 print_dump = 0; /* set to 1 to dump all frames' contents */ | ||
513 | u32 hundred = 0; | ||
514 | u32 dataframe = 0; | ||
515 | __le16 fc; | ||
516 | u16 seq_ctl; | ||
517 | u16 channel; | ||
518 | u16 phy_flags; | ||
519 | u16 length; | ||
520 | u16 status; | ||
521 | u16 bcn_tmr; | ||
522 | u32 tsf_low; | ||
523 | u64 tsf; | ||
524 | u8 rssi; | ||
525 | u8 agc; | ||
526 | u16 sig_avg; | ||
527 | u16 noise_diff; | ||
528 | struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt); | ||
529 | struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt); | ||
530 | struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt); | ||
531 | u8 *data = IWL_RX_DATA(pkt); | ||
532 | |||
533 | /* MAC header */ | ||
534 | fc = header->frame_control; | ||
535 | seq_ctl = le16_to_cpu(header->seq_ctrl); | ||
536 | |||
537 | /* metadata */ | ||
538 | channel = le16_to_cpu(rx_hdr->channel); | ||
539 | phy_flags = le16_to_cpu(rx_hdr->phy_flags); | ||
540 | length = le16_to_cpu(rx_hdr->len); | ||
541 | |||
542 | /* end-of-frame status and timestamp */ | ||
543 | status = le32_to_cpu(rx_end->status); | ||
544 | bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp); | ||
545 | tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff; | ||
546 | tsf = le64_to_cpu(rx_end->timestamp); | ||
547 | |||
548 | /* signal statistics */ | ||
549 | rssi = rx_stats->rssi; | ||
550 | agc = rx_stats->agc; | ||
551 | sig_avg = le16_to_cpu(rx_stats->sig_avg); | ||
552 | noise_diff = le16_to_cpu(rx_stats->noise_diff); | ||
553 | |||
554 | to_us = !compare_ether_addr(header->addr1, priv->mac_addr); | ||
555 | |||
556 | /* if data frame is to us and all is good, | ||
557 | * (optionally) print summary for only 1 out of every 100 */ | ||
558 | if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) == | ||
559 | cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) { | ||
560 | dataframe = 1; | ||
561 | if (!group100) | ||
562 | print_summary = 1; /* print each frame */ | ||
563 | else if (priv->framecnt_to_us < 100) { | ||
564 | priv->framecnt_to_us++; | ||
565 | print_summary = 0; | ||
566 | } else { | ||
567 | priv->framecnt_to_us = 0; | ||
568 | print_summary = 1; | ||
569 | hundred = 1; | ||
570 | } | ||
571 | } else { | ||
572 | /* print summary for all other frames */ | ||
573 | print_summary = 1; | ||
574 | } | ||
575 | |||
576 | if (print_summary) { | ||
577 | char *title; | ||
578 | int rate; | ||
579 | |||
580 | if (hundred) | ||
581 | title = "100Frames"; | ||
582 | else if (ieee80211_has_retry(fc)) | ||
583 | title = "Retry"; | ||
584 | else if (ieee80211_is_assoc_resp(fc)) | ||
585 | title = "AscRsp"; | ||
586 | else if (ieee80211_is_reassoc_resp(fc)) | ||
587 | title = "RasRsp"; | ||
588 | else if (ieee80211_is_probe_resp(fc)) { | ||
589 | title = "PrbRsp"; | ||
590 | print_dump = 1; /* dump frame contents */ | ||
591 | } else if (ieee80211_is_beacon(fc)) { | ||
592 | title = "Beacon"; | ||
593 | print_dump = 1; /* dump frame contents */ | ||
594 | } else if (ieee80211_is_atim(fc)) | ||
595 | title = "ATIM"; | ||
596 | else if (ieee80211_is_auth(fc)) | ||
597 | title = "Auth"; | ||
598 | else if (ieee80211_is_deauth(fc)) | ||
599 | title = "DeAuth"; | ||
600 | else if (ieee80211_is_disassoc(fc)) | ||
601 | title = "DisAssoc"; | ||
602 | else | ||
603 | title = "Frame"; | ||
604 | |||
605 | rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate); | ||
606 | if (rate == -1) | ||
607 | rate = 0; | ||
608 | else | ||
609 | rate = iwl3945_rates[rate].ieee / 2; | ||
610 | |||
611 | /* print frame summary. | ||
612 | * MAC addresses show just the last byte (for brevity), | ||
613 | * but you can hack it to show more, if you'd like to. */ | ||
614 | if (dataframe) | ||
615 | IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, " | ||
616 | "len=%u, rssi=%d, chnl=%d, rate=%d,\n", | ||
617 | title, le16_to_cpu(fc), header->addr1[5], | ||
618 | length, rssi, channel, rate); | ||
619 | else { | ||
620 | /* src/dst addresses assume managed mode */ | ||
621 | IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, " | ||
622 | "src=0x%02x, rssi=%u, tim=%lu usec, " | ||
623 | "phy=0x%02x, chnl=%d\n", | ||
624 | title, le16_to_cpu(fc), header->addr1[5], | ||
625 | header->addr3[5], rssi, | ||
626 | tsf_low - priv->scan_start_tsf, | ||
627 | phy_flags, channel); | ||
628 | } | ||
629 | } | ||
630 | if (print_dump) | ||
631 | iwl_print_hex_dump(priv, IWL_DL_RX, data, length); | ||
632 | } | ||
633 | |||
634 | static void iwl3945_dbg_report_frame(struct iwl_priv *priv, | ||
635 | struct iwl_rx_packet *pkt, | ||
636 | struct ieee80211_hdr *header, int group100) | ||
637 | { | ||
638 | if (iwl_get_debug_level(priv) & IWL_DL_RX) | ||
639 | _iwl3945_dbg_report_frame(priv, pkt, header, group100); | ||
640 | } | ||
641 | |||
642 | #else | ||
643 | static inline void iwl3945_dbg_report_frame(struct iwl_priv *priv, | ||
644 | struct iwl_rx_packet *pkt, | ||
645 | struct ieee80211_hdr *header, int group100) | ||
646 | { | ||
647 | } | ||
648 | #endif | ||
649 | 497 | ||
650 | /* This is necessary only for a number of statistics, see the caller. */ | 498 | /* This is necessary only for a number of statistics, see the caller. */ |
651 | static int iwl3945_is_network_packet(struct iwl_priv *priv, | 499 | static int iwl3945_is_network_packet(struct iwl_priv *priv, |
@@ -777,8 +625,6 @@ static void iwl3945_rx_reply_rx(struct iwl_priv *priv, | |||
777 | rx_status.signal, rx_status.signal, | 625 | rx_status.signal, rx_status.signal, |
778 | rx_status.rate_idx); | 626 | rx_status.rate_idx); |
779 | 627 | ||
780 | /* Set "1" to report good data frames in groups of 100 */ | ||
781 | iwl3945_dbg_report_frame(priv, pkt, header, 1); | ||
782 | iwl_dbg_log_rx_data_frame(priv, le16_to_cpu(rx_hdr->len), header); | 628 | iwl_dbg_log_rx_data_frame(priv, le16_to_cpu(rx_hdr->len), header); |
783 | 629 | ||
784 | if (network_packet) { | 630 | if (network_packet) { |
@@ -850,25 +696,28 @@ void iwl3945_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq) | |||
850 | /* Unmap tx_cmd */ | 696 | /* Unmap tx_cmd */ |
851 | if (counter) | 697 | if (counter) |
852 | pci_unmap_single(dev, | 698 | pci_unmap_single(dev, |
853 | pci_unmap_addr(&txq->meta[index], mapping), | 699 | dma_unmap_addr(&txq->meta[index], mapping), |
854 | pci_unmap_len(&txq->meta[index], len), | 700 | dma_unmap_len(&txq->meta[index], len), |
855 | PCI_DMA_TODEVICE); | 701 | PCI_DMA_TODEVICE); |
856 | 702 | ||
857 | /* unmap chunks if any */ | 703 | /* unmap chunks if any */ |
858 | 704 | ||
859 | for (i = 1; i < counter; i++) { | 705 | for (i = 1; i < counter; i++) |
860 | pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr), | 706 | pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr), |
861 | le32_to_cpu(tfd->tbs[i].len), PCI_DMA_TODEVICE); | 707 | le32_to_cpu(tfd->tbs[i].len), PCI_DMA_TODEVICE); |
862 | if (txq->txb[txq->q.read_ptr].skb[0]) { | 708 | |
863 | struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0]; | 709 | /* free SKB */ |
864 | if (txq->txb[txq->q.read_ptr].skb[0]) { | 710 | if (txq->txb) { |
865 | /* Can be called from interrupt context */ | 711 | struct sk_buff *skb; |
866 | dev_kfree_skb_any(skb); | 712 | |
867 | txq->txb[txq->q.read_ptr].skb[0] = NULL; | 713 | skb = txq->txb[txq->q.read_ptr].skb; |
868 | } | 714 | |
715 | /* can be called from irqs-disabled context */ | ||
716 | if (skb) { | ||
717 | dev_kfree_skb_any(skb); | ||
718 | txq->txb[txq->q.read_ptr].skb = NULL; | ||
869 | } | 719 | } |
870 | } | 720 | } |
871 | return ; | ||
872 | } | 721 | } |
873 | 722 | ||
874 | /** | 723 | /** |
@@ -947,8 +796,7 @@ void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv, | |||
947 | tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]); | 796 | tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]); |
948 | } | 797 | } |
949 | 798 | ||
950 | static u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, | 799 | static u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate) |
951 | u16 tx_rate, u8 flags) | ||
952 | { | 800 | { |
953 | unsigned long flags_spin; | 801 | unsigned long flags_spin; |
954 | struct iwl_station_entry *station; | 802 | struct iwl_station_entry *station; |
@@ -962,10 +810,9 @@ static u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, | |||
962 | station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK; | 810 | station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK; |
963 | station->sta.rate_n_flags = cpu_to_le16(tx_rate); | 811 | station->sta.rate_n_flags = cpu_to_le16(tx_rate); |
964 | station->sta.mode = STA_CONTROL_MODIFY_MSK; | 812 | station->sta.mode = STA_CONTROL_MODIFY_MSK; |
965 | 813 | iwl_send_add_sta(priv, &station->sta, CMD_ASYNC); | |
966 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | 814 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
967 | 815 | ||
968 | iwl_send_add_sta(priv, &station->sta, flags); | ||
969 | IWL_DEBUG_RATE(priv, "SCALE sync station %d to rate %d\n", | 816 | IWL_DEBUG_RATE(priv, "SCALE sync station %d to rate %d\n", |
970 | sta_id, tx_rate); | 817 | sta_id, tx_rate); |
971 | return sta_id; | 818 | return sta_id; |
@@ -2473,8 +2320,7 @@ static int iwl3945_manage_ibss_station(struct iwl_priv *priv, | |||
2473 | 2320 | ||
2474 | iwl3945_sync_sta(priv, vif_priv->ibss_bssid_sta_id, | 2321 | iwl3945_sync_sta(priv, vif_priv->ibss_bssid_sta_id, |
2475 | (priv->band == IEEE80211_BAND_5GHZ) ? | 2322 | (priv->band == IEEE80211_BAND_5GHZ) ? |
2476 | IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP, | 2323 | IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP); |
2477 | CMD_ASYNC); | ||
2478 | iwl3945_rate_scale_init(priv->hw, vif_priv->ibss_bssid_sta_id); | 2324 | iwl3945_rate_scale_init(priv->hw, vif_priv->ibss_bssid_sta_id); |
2479 | 2325 | ||
2480 | return 0; | 2326 | return 0; |
@@ -2590,6 +2436,7 @@ int iwl3945_hw_set_hw_params(struct iwl_priv *priv) | |||
2590 | 2436 | ||
2591 | priv->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR; | 2437 | priv->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR; |
2592 | priv->hw_params.max_beacon_itrvl = IWL39_MAX_UCODE_BEACON_INTERVAL; | 2438 | priv->hw_params.max_beacon_itrvl = IWL39_MAX_UCODE_BEACON_INTERVAL; |
2439 | priv->hw_params.beacon_time_tsf_bits = IWL3945_EXT_BEACON_TIME_POS; | ||
2593 | 2440 | ||
2594 | return 0; | 2441 | return 0; |
2595 | } | 2442 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965-hw.h b/drivers/net/wireless/iwlwifi/iwl-4965-hw.h index cd4b61ae25b7..9166794eda0d 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965-hw.h +++ b/drivers/net/wireless/iwlwifi/iwl-4965-hw.h | |||
@@ -787,6 +787,6 @@ enum { | |||
787 | struct iwl4965_scd_bc_tbl { | 787 | struct iwl4965_scd_bc_tbl { |
788 | __le16 tfd_offset[TFD_QUEUE_BC_SIZE]; | 788 | __le16 tfd_offset[TFD_QUEUE_BC_SIZE]; |
789 | u8 pad[1024 - (TFD_QUEUE_BC_SIZE) * sizeof(__le16)]; | 789 | u8 pad[1024 - (TFD_QUEUE_BC_SIZE) * sizeof(__le16)]; |
790 | } __attribute__ ((packed)); | 790 | } __packed; |
791 | 791 | ||
792 | #endif /* !__iwl_4965_hw_h__ */ | 792 | #endif /* !__iwl_4965_hw_h__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c index d3afddae8d9f..83e6a42ca2da 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965.c +++ b/drivers/net/wireless/iwlwifi/iwl-4965.c | |||
@@ -346,9 +346,19 @@ static void iwl4965_chain_noise_reset(struct iwl_priv *priv) | |||
346 | { | 346 | { |
347 | struct iwl_chain_noise_data *data = &(priv->chain_noise_data); | 347 | struct iwl_chain_noise_data *data = &(priv->chain_noise_data); |
348 | 348 | ||
349 | if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) { | 349 | if ((data->state == IWL_CHAIN_NOISE_ALIVE) && |
350 | iwl_is_associated(priv)) { | ||
350 | struct iwl_calib_diff_gain_cmd cmd; | 351 | struct iwl_calib_diff_gain_cmd cmd; |
351 | 352 | ||
353 | /* clear data for chain noise calibration algorithm */ | ||
354 | data->chain_noise_a = 0; | ||
355 | data->chain_noise_b = 0; | ||
356 | data->chain_noise_c = 0; | ||
357 | data->chain_signal_a = 0; | ||
358 | data->chain_signal_b = 0; | ||
359 | data->chain_signal_c = 0; | ||
360 | data->beacon_count = 0; | ||
361 | |||
352 | memset(&cmd, 0, sizeof(cmd)); | 362 | memset(&cmd, 0, sizeof(cmd)); |
353 | cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD; | 363 | cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD; |
354 | cmd.diff_gain_a = 0; | 364 | cmd.diff_gain_a = 0; |
@@ -419,13 +429,6 @@ static void iwl4965_gain_computation(struct iwl_priv *priv, | |||
419 | /* Mark so we run this algo only once! */ | 429 | /* Mark so we run this algo only once! */ |
420 | data->state = IWL_CHAIN_NOISE_CALIBRATED; | 430 | data->state = IWL_CHAIN_NOISE_CALIBRATED; |
421 | } | 431 | } |
422 | data->chain_noise_a = 0; | ||
423 | data->chain_noise_b = 0; | ||
424 | data->chain_noise_c = 0; | ||
425 | data->chain_signal_a = 0; | ||
426 | data->chain_signal_b = 0; | ||
427 | data->chain_signal_c = 0; | ||
428 | data->beacon_count = 0; | ||
429 | } | 432 | } |
430 | 433 | ||
431 | static void iwl4965_bg_txpower_work(struct work_struct *work) | 434 | static void iwl4965_bg_txpower_work(struct work_struct *work) |
@@ -669,6 +672,7 @@ static int iwl4965_hw_set_hw_params(struct iwl_priv *priv) | |||
669 | priv->cfg->ops->lib->temp_ops.set_ct_kill(priv); | 672 | priv->cfg->ops->lib->temp_ops.set_ct_kill(priv); |
670 | 673 | ||
671 | priv->hw_params.sens = &iwl4965_sensitivity; | 674 | priv->hw_params.sens = &iwl4965_sensitivity; |
675 | priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS; | ||
672 | 676 | ||
673 | return 0; | 677 | return 0; |
674 | } | 678 | } |
@@ -1441,7 +1445,8 @@ static int iwl4965_send_rxon_assoc(struct iwl_priv *priv) | |||
1441 | return ret; | 1445 | return ret; |
1442 | } | 1446 | } |
1443 | 1447 | ||
1444 | static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel) | 1448 | static int iwl4965_hw_channel_switch(struct iwl_priv *priv, |
1449 | struct ieee80211_channel_switch *ch_switch) | ||
1445 | { | 1450 | { |
1446 | int rc; | 1451 | int rc; |
1447 | u8 band = 0; | 1452 | u8 band = 0; |
@@ -1449,11 +1454,14 @@ static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel) | |||
1449 | u8 ctrl_chan_high = 0; | 1454 | u8 ctrl_chan_high = 0; |
1450 | struct iwl4965_channel_switch_cmd cmd; | 1455 | struct iwl4965_channel_switch_cmd cmd; |
1451 | const struct iwl_channel_info *ch_info; | 1456 | const struct iwl_channel_info *ch_info; |
1452 | 1457 | u32 switch_time_in_usec, ucode_switch_time; | |
1458 | u16 ch; | ||
1459 | u32 tsf_low; | ||
1460 | u8 switch_count; | ||
1461 | u16 beacon_interval = le16_to_cpu(priv->rxon_timing.beacon_interval); | ||
1462 | struct ieee80211_vif *vif = priv->vif; | ||
1453 | band = priv->band == IEEE80211_BAND_2GHZ; | 1463 | band = priv->band == IEEE80211_BAND_2GHZ; |
1454 | 1464 | ||
1455 | ch_info = iwl_get_channel_info(priv, priv->band, channel); | ||
1456 | |||
1457 | is_ht40 = is_ht40_channel(priv->staging_rxon.flags); | 1465 | is_ht40 = is_ht40_channel(priv->staging_rxon.flags); |
1458 | 1466 | ||
1459 | if (is_ht40 && | 1467 | if (is_ht40 && |
@@ -1462,26 +1470,56 @@ static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel) | |||
1462 | 1470 | ||
1463 | cmd.band = band; | 1471 | cmd.band = band; |
1464 | cmd.expect_beacon = 0; | 1472 | cmd.expect_beacon = 0; |
1465 | cmd.channel = cpu_to_le16(channel); | 1473 | ch = ieee80211_frequency_to_channel(ch_switch->channel->center_freq); |
1474 | cmd.channel = cpu_to_le16(ch); | ||
1466 | cmd.rxon_flags = priv->staging_rxon.flags; | 1475 | cmd.rxon_flags = priv->staging_rxon.flags; |
1467 | cmd.rxon_filter_flags = priv->staging_rxon.filter_flags; | 1476 | cmd.rxon_filter_flags = priv->staging_rxon.filter_flags; |
1468 | cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time); | 1477 | switch_count = ch_switch->count; |
1478 | tsf_low = ch_switch->timestamp & 0x0ffffffff; | ||
1479 | /* | ||
1480 | * calculate the ucode channel switch time | ||
1481 | * adding TSF as one of the factor for when to switch | ||
1482 | */ | ||
1483 | if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) { | ||
1484 | if (switch_count > ((priv->ucode_beacon_time - tsf_low) / | ||
1485 | beacon_interval)) { | ||
1486 | switch_count -= (priv->ucode_beacon_time - | ||
1487 | tsf_low) / beacon_interval; | ||
1488 | } else | ||
1489 | switch_count = 0; | ||
1490 | } | ||
1491 | if (switch_count <= 1) | ||
1492 | cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time); | ||
1493 | else { | ||
1494 | switch_time_in_usec = | ||
1495 | vif->bss_conf.beacon_int * switch_count * TIME_UNIT; | ||
1496 | ucode_switch_time = iwl_usecs_to_beacons(priv, | ||
1497 | switch_time_in_usec, | ||
1498 | beacon_interval); | ||
1499 | cmd.switch_time = iwl_add_beacon_time(priv, | ||
1500 | priv->ucode_beacon_time, | ||
1501 | ucode_switch_time, | ||
1502 | beacon_interval); | ||
1503 | } | ||
1504 | IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n", | ||
1505 | cmd.switch_time); | ||
1506 | ch_info = iwl_get_channel_info(priv, priv->band, ch); | ||
1469 | if (ch_info) | 1507 | if (ch_info) |
1470 | cmd.expect_beacon = is_channel_radar(ch_info); | 1508 | cmd.expect_beacon = is_channel_radar(ch_info); |
1471 | else { | 1509 | else { |
1472 | IWL_ERR(priv, "invalid channel switch from %u to %u\n", | 1510 | IWL_ERR(priv, "invalid channel switch from %u to %u\n", |
1473 | priv->active_rxon.channel, channel); | 1511 | priv->active_rxon.channel, ch); |
1474 | return -EFAULT; | 1512 | return -EFAULT; |
1475 | } | 1513 | } |
1476 | 1514 | ||
1477 | rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40, | 1515 | rc = iwl4965_fill_txpower_tbl(priv, band, ch, is_ht40, |
1478 | ctrl_chan_high, &cmd.tx_power); | 1516 | ctrl_chan_high, &cmd.tx_power); |
1479 | if (rc) { | 1517 | if (rc) { |
1480 | IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc); | 1518 | IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc); |
1481 | return rc; | 1519 | return rc; |
1482 | } | 1520 | } |
1483 | 1521 | ||
1484 | priv->switch_rxon.channel = cpu_to_le16(channel); | 1522 | priv->switch_rxon.channel = cmd.channel; |
1485 | priv->switch_rxon.switch_in_progress = true; | 1523 | priv->switch_rxon.switch_in_progress = true; |
1486 | 1524 | ||
1487 | return iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd); | 1525 | return iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd); |
@@ -1870,7 +1908,7 @@ static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv, | |||
1870 | IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n", | 1908 | IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n", |
1871 | agg->frame_count, agg->start_idx, idx); | 1909 | agg->frame_count, agg->start_idx, idx); |
1872 | 1910 | ||
1873 | info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]); | 1911 | info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb); |
1874 | info->status.rates[0].count = tx_resp->failure_frame + 1; | 1912 | info->status.rates[0].count = tx_resp->failure_frame + 1; |
1875 | info->flags &= ~IEEE80211_TX_CTL_AMPDU; | 1913 | info->flags &= ~IEEE80211_TX_CTL_AMPDU; |
1876 | info->flags |= iwl_tx_status_to_mac80211(status); | 1914 | info->flags |= iwl_tx_status_to_mac80211(status); |
@@ -2026,6 +2064,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2026 | int sta_id; | 2064 | int sta_id; |
2027 | int freed; | 2065 | int freed; |
2028 | u8 *qc = NULL; | 2066 | u8 *qc = NULL; |
2067 | unsigned long flags; | ||
2029 | 2068 | ||
2030 | if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) { | 2069 | if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) { |
2031 | IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d " | 2070 | IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d " |
@@ -2035,7 +2074,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2035 | return; | 2074 | return; |
2036 | } | 2075 | } |
2037 | 2076 | ||
2038 | info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]); | 2077 | info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb); |
2039 | memset(&info->status, 0, sizeof(info->status)); | 2078 | memset(&info->status, 0, sizeof(info->status)); |
2040 | 2079 | ||
2041 | hdr = iwl_tx_queue_get_hdr(priv, txq_id, index); | 2080 | hdr = iwl_tx_queue_get_hdr(priv, txq_id, index); |
@@ -2050,10 +2089,10 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2050 | return; | 2089 | return; |
2051 | } | 2090 | } |
2052 | 2091 | ||
2092 | spin_lock_irqsave(&priv->sta_lock, flags); | ||
2053 | if (txq->sched_retry) { | 2093 | if (txq->sched_retry) { |
2054 | const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp); | 2094 | const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp); |
2055 | struct iwl_ht_agg *agg = NULL; | 2095 | struct iwl_ht_agg *agg = NULL; |
2056 | |||
2057 | WARN_ON(!qc); | 2096 | WARN_ON(!qc); |
2058 | 2097 | ||
2059 | agg = &priv->stations[sta_id].tid[tid].agg; | 2098 | agg = &priv->stations[sta_id].tid[tid].agg; |
@@ -2110,6 +2149,8 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2110 | iwlagn_txq_check_empty(priv, sta_id, tid, txq_id); | 2149 | iwlagn_txq_check_empty(priv, sta_id, tid, txq_id); |
2111 | 2150 | ||
2112 | iwl_check_abort_status(priv, tx_resp->frame_count, status); | 2151 | iwl_check_abort_status(priv, tx_resp->frame_count, status); |
2152 | |||
2153 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
2113 | } | 2154 | } |
2114 | 2155 | ||
2115 | static int iwl4965_calc_rssi(struct iwl_priv *priv, | 2156 | static int iwl4965_calc_rssi(struct iwl_priv *priv, |
@@ -2285,7 +2326,7 @@ struct iwl_cfg iwl4965_agn_cfg = { | |||
2285 | * Force use of chains B and C for scan RX on 5 GHz band | 2326 | * Force use of chains B and C for scan RX on 5 GHz band |
2286 | * because the device has off-channel reception on chain A. | 2327 | * because the device has off-channel reception on chain A. |
2287 | */ | 2328 | */ |
2288 | .scan_antennas[IEEE80211_BAND_5GHZ] = ANT_BC, | 2329 | .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC, |
2289 | }; | 2330 | }; |
2290 | 2331 | ||
2291 | /* Module firmware */ | 2332 | /* Module firmware */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index a28af7eb67eb..32710a801cb0 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c | |||
@@ -208,6 +208,8 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) | |||
208 | BIT(IWL_CALIB_TX_IQ_PERD) | | 208 | BIT(IWL_CALIB_TX_IQ_PERD) | |
209 | BIT(IWL_CALIB_BASE_BAND); | 209 | BIT(IWL_CALIB_BASE_BAND); |
210 | 210 | ||
211 | priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS; | ||
212 | |||
211 | return 0; | 213 | return 0; |
212 | } | 214 | } |
213 | 215 | ||
@@ -252,6 +254,8 @@ static int iwl5150_hw_set_hw_params(struct iwl_priv *priv) | |||
252 | BIT(IWL_CALIB_TX_IQ) | | 254 | BIT(IWL_CALIB_TX_IQ) | |
253 | BIT(IWL_CALIB_BASE_BAND); | 255 | BIT(IWL_CALIB_BASE_BAND); |
254 | 256 | ||
257 | priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS; | ||
258 | |||
255 | return 0; | 259 | return 0; |
256 | } | 260 | } |
257 | 261 | ||
@@ -267,33 +271,69 @@ static void iwl5150_temperature(struct iwl_priv *priv) | |||
267 | iwl_tt_handler(priv); | 271 | iwl_tt_handler(priv); |
268 | } | 272 | } |
269 | 273 | ||
270 | static int iwl5000_hw_channel_switch(struct iwl_priv *priv, u16 channel) | 274 | static int iwl5000_hw_channel_switch(struct iwl_priv *priv, |
275 | struct ieee80211_channel_switch *ch_switch) | ||
271 | { | 276 | { |
272 | struct iwl5000_channel_switch_cmd cmd; | 277 | struct iwl5000_channel_switch_cmd cmd; |
273 | const struct iwl_channel_info *ch_info; | 278 | const struct iwl_channel_info *ch_info; |
279 | u32 switch_time_in_usec, ucode_switch_time; | ||
280 | u16 ch; | ||
281 | u32 tsf_low; | ||
282 | u8 switch_count; | ||
283 | u16 beacon_interval = le16_to_cpu(priv->rxon_timing.beacon_interval); | ||
284 | struct ieee80211_vif *vif = priv->vif; | ||
274 | struct iwl_host_cmd hcmd = { | 285 | struct iwl_host_cmd hcmd = { |
275 | .id = REPLY_CHANNEL_SWITCH, | 286 | .id = REPLY_CHANNEL_SWITCH, |
276 | .len = sizeof(cmd), | 287 | .len = sizeof(cmd), |
277 | .flags = CMD_SIZE_HUGE, | 288 | .flags = CMD_SYNC, |
278 | .data = &cmd, | 289 | .data = &cmd, |
279 | }; | 290 | }; |
280 | 291 | ||
281 | IWL_DEBUG_11H(priv, "channel switch from %d to %d\n", | ||
282 | priv->active_rxon.channel, channel); | ||
283 | cmd.band = priv->band == IEEE80211_BAND_2GHZ; | 292 | cmd.band = priv->band == IEEE80211_BAND_2GHZ; |
284 | cmd.channel = cpu_to_le16(channel); | 293 | ch = ieee80211_frequency_to_channel(ch_switch->channel->center_freq); |
294 | IWL_DEBUG_11H(priv, "channel switch from %d to %d\n", | ||
295 | priv->active_rxon.channel, ch); | ||
296 | cmd.channel = cpu_to_le16(ch); | ||
285 | cmd.rxon_flags = priv->staging_rxon.flags; | 297 | cmd.rxon_flags = priv->staging_rxon.flags; |
286 | cmd.rxon_filter_flags = priv->staging_rxon.filter_flags; | 298 | cmd.rxon_filter_flags = priv->staging_rxon.filter_flags; |
287 | cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time); | 299 | switch_count = ch_switch->count; |
288 | ch_info = iwl_get_channel_info(priv, priv->band, channel); | 300 | tsf_low = ch_switch->timestamp & 0x0ffffffff; |
301 | /* | ||
302 | * calculate the ucode channel switch time | ||
303 | * adding TSF as one of the factor for when to switch | ||
304 | */ | ||
305 | if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) { | ||
306 | if (switch_count > ((priv->ucode_beacon_time - tsf_low) / | ||
307 | beacon_interval)) { | ||
308 | switch_count -= (priv->ucode_beacon_time - | ||
309 | tsf_low) / beacon_interval; | ||
310 | } else | ||
311 | switch_count = 0; | ||
312 | } | ||
313 | if (switch_count <= 1) | ||
314 | cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time); | ||
315 | else { | ||
316 | switch_time_in_usec = | ||
317 | vif->bss_conf.beacon_int * switch_count * TIME_UNIT; | ||
318 | ucode_switch_time = iwl_usecs_to_beacons(priv, | ||
319 | switch_time_in_usec, | ||
320 | beacon_interval); | ||
321 | cmd.switch_time = iwl_add_beacon_time(priv, | ||
322 | priv->ucode_beacon_time, | ||
323 | ucode_switch_time, | ||
324 | beacon_interval); | ||
325 | } | ||
326 | IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n", | ||
327 | cmd.switch_time); | ||
328 | ch_info = iwl_get_channel_info(priv, priv->band, ch); | ||
289 | if (ch_info) | 329 | if (ch_info) |
290 | cmd.expect_beacon = is_channel_radar(ch_info); | 330 | cmd.expect_beacon = is_channel_radar(ch_info); |
291 | else { | 331 | else { |
292 | IWL_ERR(priv, "invalid channel switch from %u to %u\n", | 332 | IWL_ERR(priv, "invalid channel switch from %u to %u\n", |
293 | priv->active_rxon.channel, channel); | 333 | priv->active_rxon.channel, ch); |
294 | return -EFAULT; | 334 | return -EFAULT; |
295 | } | 335 | } |
296 | priv->switch_rxon.channel = cpu_to_le16(channel); | 336 | priv->switch_rxon.channel = cmd.channel; |
297 | priv->switch_rxon.switch_in_progress = true; | 337 | priv->switch_rxon.switch_in_progress = true; |
298 | 338 | ||
299 | return iwl_send_cmd_sync(priv, &hcmd); | 339 | return iwl_send_cmd_sync(priv, &hcmd); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c index 9fbf54cd3e1a..afdeec56b13f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-6000.c +++ b/drivers/net/wireless/iwlwifi/iwl-6000.c | |||
@@ -71,6 +71,10 @@ | |||
71 | #define _IWL6000G2A_MODULE_FIRMWARE(api) IWL6000G2A_FW_PRE #api ".ucode" | 71 | #define _IWL6000G2A_MODULE_FIRMWARE(api) IWL6000G2A_FW_PRE #api ".ucode" |
72 | #define IWL6000G2A_MODULE_FIRMWARE(api) _IWL6000G2A_MODULE_FIRMWARE(api) | 72 | #define IWL6000G2A_MODULE_FIRMWARE(api) _IWL6000G2A_MODULE_FIRMWARE(api) |
73 | 73 | ||
74 | #define IWL6000G2B_FW_PRE "iwlwifi-6000g2b-" | ||
75 | #define _IWL6000G2B_MODULE_FIRMWARE(api) IWL6000G2B_FW_PRE #api ".ucode" | ||
76 | #define IWL6000G2B_MODULE_FIRMWARE(api) _IWL6000G2B_MODULE_FIRMWARE(api) | ||
77 | |||
74 | 78 | ||
75 | static void iwl6000_set_ct_threshold(struct iwl_priv *priv) | 79 | static void iwl6000_set_ct_threshold(struct iwl_priv *priv) |
76 | { | 80 | { |
@@ -183,6 +187,8 @@ static int iwl6000_hw_set_hw_params(struct iwl_priv *priv) | |||
183 | BIT(IWL_CALIB_TX_IQ) | | 187 | BIT(IWL_CALIB_TX_IQ) | |
184 | BIT(IWL_CALIB_BASE_BAND); | 188 | BIT(IWL_CALIB_BASE_BAND); |
185 | 189 | ||
190 | priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS; | ||
191 | |||
186 | return 0; | 192 | return 0; |
187 | } | 193 | } |
188 | 194 | ||
@@ -228,37 +234,74 @@ static int iwl6050_hw_set_hw_params(struct iwl_priv *priv) | |||
228 | BIT(IWL_CALIB_TX_IQ) | | 234 | BIT(IWL_CALIB_TX_IQ) | |
229 | BIT(IWL_CALIB_BASE_BAND); | 235 | BIT(IWL_CALIB_BASE_BAND); |
230 | 236 | ||
237 | priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS; | ||
238 | |||
231 | return 0; | 239 | return 0; |
232 | } | 240 | } |
233 | 241 | ||
234 | static int iwl6000_hw_channel_switch(struct iwl_priv *priv, u16 channel) | 242 | static int iwl6000_hw_channel_switch(struct iwl_priv *priv, |
243 | struct ieee80211_channel_switch *ch_switch) | ||
235 | { | 244 | { |
236 | struct iwl6000_channel_switch_cmd cmd; | 245 | struct iwl6000_channel_switch_cmd cmd; |
237 | const struct iwl_channel_info *ch_info; | 246 | const struct iwl_channel_info *ch_info; |
247 | u32 switch_time_in_usec, ucode_switch_time; | ||
248 | u16 ch; | ||
249 | u32 tsf_low; | ||
250 | u8 switch_count; | ||
251 | u16 beacon_interval = le16_to_cpu(priv->rxon_timing.beacon_interval); | ||
252 | struct ieee80211_vif *vif = priv->vif; | ||
238 | struct iwl_host_cmd hcmd = { | 253 | struct iwl_host_cmd hcmd = { |
239 | .id = REPLY_CHANNEL_SWITCH, | 254 | .id = REPLY_CHANNEL_SWITCH, |
240 | .len = sizeof(cmd), | 255 | .len = sizeof(cmd), |
241 | .flags = CMD_SIZE_HUGE, | 256 | .flags = CMD_SYNC, |
242 | .data = &cmd, | 257 | .data = &cmd, |
243 | }; | 258 | }; |
244 | 259 | ||
245 | IWL_DEBUG_11H(priv, "channel switch from %d to %d\n", | ||
246 | priv->active_rxon.channel, channel); | ||
247 | |||
248 | cmd.band = priv->band == IEEE80211_BAND_2GHZ; | 260 | cmd.band = priv->band == IEEE80211_BAND_2GHZ; |
249 | cmd.channel = cpu_to_le16(channel); | 261 | ch = ieee80211_frequency_to_channel(ch_switch->channel->center_freq); |
262 | IWL_DEBUG_11H(priv, "channel switch from %u to %u\n", | ||
263 | priv->active_rxon.channel, ch); | ||
264 | cmd.channel = cpu_to_le16(ch); | ||
250 | cmd.rxon_flags = priv->staging_rxon.flags; | 265 | cmd.rxon_flags = priv->staging_rxon.flags; |
251 | cmd.rxon_filter_flags = priv->staging_rxon.filter_flags; | 266 | cmd.rxon_filter_flags = priv->staging_rxon.filter_flags; |
252 | cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time); | 267 | switch_count = ch_switch->count; |
253 | ch_info = iwl_get_channel_info(priv, priv->band, channel); | 268 | tsf_low = ch_switch->timestamp & 0x0ffffffff; |
269 | /* | ||
270 | * calculate the ucode channel switch time | ||
271 | * adding TSF as one of the factor for when to switch | ||
272 | */ | ||
273 | if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) { | ||
274 | if (switch_count > ((priv->ucode_beacon_time - tsf_low) / | ||
275 | beacon_interval)) { | ||
276 | switch_count -= (priv->ucode_beacon_time - | ||
277 | tsf_low) / beacon_interval; | ||
278 | } else | ||
279 | switch_count = 0; | ||
280 | } | ||
281 | if (switch_count <= 1) | ||
282 | cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time); | ||
283 | else { | ||
284 | switch_time_in_usec = | ||
285 | vif->bss_conf.beacon_int * switch_count * TIME_UNIT; | ||
286 | ucode_switch_time = iwl_usecs_to_beacons(priv, | ||
287 | switch_time_in_usec, | ||
288 | beacon_interval); | ||
289 | cmd.switch_time = iwl_add_beacon_time(priv, | ||
290 | priv->ucode_beacon_time, | ||
291 | ucode_switch_time, | ||
292 | beacon_interval); | ||
293 | } | ||
294 | IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n", | ||
295 | cmd.switch_time); | ||
296 | ch_info = iwl_get_channel_info(priv, priv->band, ch); | ||
254 | if (ch_info) | 297 | if (ch_info) |
255 | cmd.expect_beacon = is_channel_radar(ch_info); | 298 | cmd.expect_beacon = is_channel_radar(ch_info); |
256 | else { | 299 | else { |
257 | IWL_ERR(priv, "invalid channel switch from %u to %u\n", | 300 | IWL_ERR(priv, "invalid channel switch from %u to %u\n", |
258 | priv->active_rxon.channel, channel); | 301 | priv->active_rxon.channel, ch); |
259 | return -EFAULT; | 302 | return -EFAULT; |
260 | } | 303 | } |
261 | priv->switch_rxon.channel = cpu_to_le16(channel); | 304 | priv->switch_rxon.channel = cmd.channel; |
262 | priv->switch_rxon.switch_in_progress = true; | 305 | priv->switch_rxon.switch_in_progress = true; |
263 | 306 | ||
264 | return iwl_send_cmd_sync(priv, &hcmd); | 307 | return iwl_send_cmd_sync(priv, &hcmd); |
@@ -335,6 +378,25 @@ static const struct iwl_ops iwl6000_ops = { | |||
335 | .led = &iwlagn_led_ops, | 378 | .led = &iwlagn_led_ops, |
336 | }; | 379 | }; |
337 | 380 | ||
381 | static void do_not_send_bt_config(struct iwl_priv *priv) | ||
382 | { | ||
383 | } | ||
384 | |||
385 | static struct iwl_hcmd_ops iwl6000g2b_hcmd = { | ||
386 | .rxon_assoc = iwlagn_send_rxon_assoc, | ||
387 | .commit_rxon = iwl_commit_rxon, | ||
388 | .set_rxon_chain = iwl_set_rxon_chain, | ||
389 | .set_tx_ant = iwlagn_send_tx_ant_config, | ||
390 | .send_bt_config = do_not_send_bt_config, | ||
391 | }; | ||
392 | |||
393 | static const struct iwl_ops iwl6000g2b_ops = { | ||
394 | .lib = &iwl6000_lib, | ||
395 | .hcmd = &iwl6000g2b_hcmd, | ||
396 | .utils = &iwlagn_hcmd_utils, | ||
397 | .led = &iwlagn_led_ops, | ||
398 | }; | ||
399 | |||
338 | static struct iwl_lib_ops iwl6050_lib = { | 400 | static struct iwl_lib_ops iwl6050_lib = { |
339 | .set_hw_params = iwl6050_hw_set_hw_params, | 401 | .set_hw_params = iwl6050_hw_set_hw_params, |
340 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, | 402 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, |
@@ -445,6 +507,268 @@ struct iwl_cfg iwl6000g2a_2agn_cfg = { | |||
445 | .chain_noise_calib_by_driver = true, | 507 | .chain_noise_calib_by_driver = true, |
446 | }; | 508 | }; |
447 | 509 | ||
510 | struct iwl_cfg iwl6000g2a_2abg_cfg = { | ||
511 | .name = "6000 Series 2x2 ABG Gen2a", | ||
512 | .fw_name_pre = IWL6000G2A_FW_PRE, | ||
513 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | ||
514 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | ||
515 | .sku = IWL_SKU_A|IWL_SKU_G, | ||
516 | .ops = &iwl6000_ops, | ||
517 | .eeprom_size = OTP_LOW_IMAGE_SIZE, | ||
518 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | ||
519 | .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION, | ||
520 | .num_of_queues = IWLAGN_NUM_QUEUES, | ||
521 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | ||
522 | .mod_params = &iwlagn_mod_params, | ||
523 | .valid_tx_ant = ANT_AB, | ||
524 | .valid_rx_ant = ANT_AB, | ||
525 | .pll_cfg_val = 0, | ||
526 | .set_l0s = true, | ||
527 | .use_bsm = false, | ||
528 | .pa_type = IWL_PA_SYSTEM, | ||
529 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | ||
530 | .shadow_ram_support = true, | ||
531 | .led_compensation = 51, | ||
532 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | ||
533 | .supports_idle = true, | ||
534 | .adv_thermal_throttle = true, | ||
535 | .support_ct_kill_exit = true, | ||
536 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | ||
537 | .chain_noise_scale = 1000, | ||
538 | .monitor_recover_period = IWL_MONITORING_PERIOD, | ||
539 | .max_event_log_size = 512, | ||
540 | }; | ||
541 | |||
542 | struct iwl_cfg iwl6000g2a_2bg_cfg = { | ||
543 | .name = "6000 Series 2x2 BG Gen2a", | ||
544 | .fw_name_pre = IWL6000G2A_FW_PRE, | ||
545 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | ||
546 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | ||
547 | .sku = IWL_SKU_G, | ||
548 | .ops = &iwl6000_ops, | ||
549 | .eeprom_size = OTP_LOW_IMAGE_SIZE, | ||
550 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | ||
551 | .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION, | ||
552 | .num_of_queues = IWLAGN_NUM_QUEUES, | ||
553 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | ||
554 | .mod_params = &iwlagn_mod_params, | ||
555 | .valid_tx_ant = ANT_AB, | ||
556 | .valid_rx_ant = ANT_AB, | ||
557 | .pll_cfg_val = 0, | ||
558 | .set_l0s = true, | ||
559 | .use_bsm = false, | ||
560 | .pa_type = IWL_PA_SYSTEM, | ||
561 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | ||
562 | .shadow_ram_support = true, | ||
563 | .led_compensation = 51, | ||
564 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | ||
565 | .supports_idle = true, | ||
566 | .adv_thermal_throttle = true, | ||
567 | .support_ct_kill_exit = true, | ||
568 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | ||
569 | .chain_noise_scale = 1000, | ||
570 | .monitor_recover_period = IWL_MONITORING_PERIOD, | ||
571 | .max_event_log_size = 512, | ||
572 | }; | ||
573 | |||
574 | struct iwl_cfg iwl6000g2b_2agn_cfg = { | ||
575 | .name = "6000 Series 2x2 AGN Gen2b", | ||
576 | .fw_name_pre = IWL6000G2B_FW_PRE, | ||
577 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | ||
578 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | ||
579 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
580 | .ops = &iwl6000g2b_ops, | ||
581 | .eeprom_size = OTP_LOW_IMAGE_SIZE, | ||
582 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | ||
583 | .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION, | ||
584 | .num_of_queues = IWLAGN_NUM_QUEUES, | ||
585 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | ||
586 | .mod_params = &iwlagn_mod_params, | ||
587 | .valid_tx_ant = ANT_AB, | ||
588 | .valid_rx_ant = ANT_AB, | ||
589 | .pll_cfg_val = 0, | ||
590 | .set_l0s = true, | ||
591 | .use_bsm = false, | ||
592 | .pa_type = IWL_PA_SYSTEM, | ||
593 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | ||
594 | .shadow_ram_support = true, | ||
595 | .ht_greenfield_support = true, | ||
596 | .led_compensation = 51, | ||
597 | .use_rts_for_ht = true, /* use rts/cts protection */ | ||
598 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | ||
599 | .supports_idle = true, | ||
600 | .adv_thermal_throttle = true, | ||
601 | .support_ct_kill_exit = true, | ||
602 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | ||
603 | .chain_noise_scale = 1000, | ||
604 | .monitor_recover_period = IWL_MONITORING_PERIOD, | ||
605 | .max_event_log_size = 512, | ||
606 | }; | ||
607 | |||
608 | struct iwl_cfg iwl6000g2b_2abg_cfg = { | ||
609 | .name = "6000 Series 2x2 ABG Gen2b", | ||
610 | .fw_name_pre = IWL6000G2B_FW_PRE, | ||
611 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | ||
612 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | ||
613 | .sku = IWL_SKU_A|IWL_SKU_G, | ||
614 | .ops = &iwl6000g2b_ops, | ||
615 | .eeprom_size = OTP_LOW_IMAGE_SIZE, | ||
616 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | ||
617 | .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION, | ||
618 | .num_of_queues = IWLAGN_NUM_QUEUES, | ||
619 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | ||
620 | .mod_params = &iwlagn_mod_params, | ||
621 | .valid_tx_ant = ANT_AB, | ||
622 | .valid_rx_ant = ANT_AB, | ||
623 | .pll_cfg_val = 0, | ||
624 | .set_l0s = true, | ||
625 | .use_bsm = false, | ||
626 | .pa_type = IWL_PA_SYSTEM, | ||
627 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | ||
628 | .shadow_ram_support = true, | ||
629 | .led_compensation = 51, | ||
630 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | ||
631 | .supports_idle = true, | ||
632 | .adv_thermal_throttle = true, | ||
633 | .support_ct_kill_exit = true, | ||
634 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | ||
635 | .chain_noise_scale = 1000, | ||
636 | .monitor_recover_period = IWL_MONITORING_PERIOD, | ||
637 | .max_event_log_size = 512, | ||
638 | }; | ||
639 | |||
640 | struct iwl_cfg iwl6000g2b_2bgn_cfg = { | ||
641 | .name = "6000 Series 2x2 BGN Gen2b", | ||
642 | .fw_name_pre = IWL6000G2B_FW_PRE, | ||
643 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | ||
644 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | ||
645 | .sku = IWL_SKU_G|IWL_SKU_N, | ||
646 | .ops = &iwl6000g2b_ops, | ||
647 | .eeprom_size = OTP_LOW_IMAGE_SIZE, | ||
648 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | ||
649 | .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION, | ||
650 | .num_of_queues = IWLAGN_NUM_QUEUES, | ||
651 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | ||
652 | .mod_params = &iwlagn_mod_params, | ||
653 | .valid_tx_ant = ANT_AB, | ||
654 | .valid_rx_ant = ANT_AB, | ||
655 | .pll_cfg_val = 0, | ||
656 | .set_l0s = true, | ||
657 | .use_bsm = false, | ||
658 | .pa_type = IWL_PA_SYSTEM, | ||
659 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | ||
660 | .shadow_ram_support = true, | ||
661 | .ht_greenfield_support = true, | ||
662 | .led_compensation = 51, | ||
663 | .use_rts_for_ht = true, /* use rts/cts protection */ | ||
664 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | ||
665 | .supports_idle = true, | ||
666 | .adv_thermal_throttle = true, | ||
667 | .support_ct_kill_exit = true, | ||
668 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | ||
669 | .chain_noise_scale = 1000, | ||
670 | .monitor_recover_period = IWL_MONITORING_PERIOD, | ||
671 | .max_event_log_size = 512, | ||
672 | }; | ||
673 | |||
674 | struct iwl_cfg iwl6000g2b_2bg_cfg = { | ||
675 | .name = "6000 Series 2x2 BG Gen2b", | ||
676 | .fw_name_pre = IWL6000G2B_FW_PRE, | ||
677 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | ||
678 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | ||
679 | .sku = IWL_SKU_G, | ||
680 | .ops = &iwl6000g2b_ops, | ||
681 | .eeprom_size = OTP_LOW_IMAGE_SIZE, | ||
682 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | ||
683 | .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION, | ||
684 | .num_of_queues = IWLAGN_NUM_QUEUES, | ||
685 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | ||
686 | .mod_params = &iwlagn_mod_params, | ||
687 | .valid_tx_ant = ANT_AB, | ||
688 | .valid_rx_ant = ANT_AB, | ||
689 | .pll_cfg_val = 0, | ||
690 | .set_l0s = true, | ||
691 | .use_bsm = false, | ||
692 | .pa_type = IWL_PA_SYSTEM, | ||
693 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | ||
694 | .shadow_ram_support = true, | ||
695 | .led_compensation = 51, | ||
696 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | ||
697 | .supports_idle = true, | ||
698 | .adv_thermal_throttle = true, | ||
699 | .support_ct_kill_exit = true, | ||
700 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | ||
701 | .chain_noise_scale = 1000, | ||
702 | .monitor_recover_period = IWL_MONITORING_PERIOD, | ||
703 | .max_event_log_size = 512, | ||
704 | }; | ||
705 | |||
706 | struct iwl_cfg iwl6000g2b_bgn_cfg = { | ||
707 | .name = "6000 Series 1x2 BGN Gen2b", | ||
708 | .fw_name_pre = IWL6000G2B_FW_PRE, | ||
709 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | ||
710 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | ||
711 | .sku = IWL_SKU_G|IWL_SKU_N, | ||
712 | .ops = &iwl6000g2b_ops, | ||
713 | .eeprom_size = OTP_LOW_IMAGE_SIZE, | ||
714 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | ||
715 | .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION, | ||
716 | .num_of_queues = IWLAGN_NUM_QUEUES, | ||
717 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | ||
718 | .mod_params = &iwlagn_mod_params, | ||
719 | .valid_tx_ant = ANT_A, | ||
720 | .valid_rx_ant = ANT_AB, | ||
721 | .pll_cfg_val = 0, | ||
722 | .set_l0s = true, | ||
723 | .use_bsm = false, | ||
724 | .pa_type = IWL_PA_SYSTEM, | ||
725 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | ||
726 | .shadow_ram_support = true, | ||
727 | .ht_greenfield_support = true, | ||
728 | .led_compensation = 51, | ||
729 | .use_rts_for_ht = true, /* use rts/cts protection */ | ||
730 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | ||
731 | .supports_idle = true, | ||
732 | .adv_thermal_throttle = true, | ||
733 | .support_ct_kill_exit = true, | ||
734 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | ||
735 | .chain_noise_scale = 1000, | ||
736 | .monitor_recover_period = IWL_MONITORING_PERIOD, | ||
737 | .max_event_log_size = 512, | ||
738 | }; | ||
739 | |||
740 | struct iwl_cfg iwl6000g2b_bg_cfg = { | ||
741 | .name = "6000 Series 1x2 BG Gen2b", | ||
742 | .fw_name_pre = IWL6000G2B_FW_PRE, | ||
743 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | ||
744 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | ||
745 | .sku = IWL_SKU_G, | ||
746 | .ops = &iwl6000g2b_ops, | ||
747 | .eeprom_size = OTP_LOW_IMAGE_SIZE, | ||
748 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | ||
749 | .eeprom_calib_ver = EEPROM_6000G2_TX_POWER_VERSION, | ||
750 | .num_of_queues = IWLAGN_NUM_QUEUES, | ||
751 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | ||
752 | .mod_params = &iwlagn_mod_params, | ||
753 | .valid_tx_ant = ANT_A, | ||
754 | .valid_rx_ant = ANT_AB, | ||
755 | .pll_cfg_val = 0, | ||
756 | .set_l0s = true, | ||
757 | .use_bsm = false, | ||
758 | .pa_type = IWL_PA_SYSTEM, | ||
759 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | ||
760 | .shadow_ram_support = true, | ||
761 | .led_compensation = 51, | ||
762 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | ||
763 | .supports_idle = true, | ||
764 | .adv_thermal_throttle = true, | ||
765 | .support_ct_kill_exit = true, | ||
766 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | ||
767 | .chain_noise_scale = 1000, | ||
768 | .monitor_recover_period = IWL_MONITORING_PERIOD, | ||
769 | .max_event_log_size = 512, | ||
770 | }; | ||
771 | |||
448 | /* | 772 | /* |
449 | * "i": Internal configuration, use internal Power Amplifier | 773 | * "i": Internal configuration, use internal Power Amplifier |
450 | */ | 774 | */ |
@@ -667,3 +991,4 @@ struct iwl_cfg iwl6000_3agn_cfg = { | |||
667 | MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX)); | 991 | MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX)); |
668 | MODULE_FIRMWARE(IWL6050_MODULE_FIRMWARE(IWL6050_UCODE_API_MAX)); | 992 | MODULE_FIRMWARE(IWL6050_MODULE_FIRMWARE(IWL6050_UCODE_API_MAX)); |
669 | MODULE_FIRMWARE(IWL6000G2A_MODULE_FIRMWARE(IWL6000G2_UCODE_API_MAX)); | 993 | MODULE_FIRMWARE(IWL6000G2A_MODULE_FIRMWARE(IWL6000G2_UCODE_API_MAX)); |
994 | MODULE_FIRMWARE(IWL6000G2B_MODULE_FIRMWARE(IWL6000G2_UCODE_API_MAX)); | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c index 48c023b4ca36..3d08dc8af143 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c | |||
@@ -28,6 +28,27 @@ | |||
28 | 28 | ||
29 | #include "iwl-agn-debugfs.h" | 29 | #include "iwl-agn-debugfs.h" |
30 | 30 | ||
31 | static int iwl_statistics_flag(struct iwl_priv *priv, char *buf, int bufsz) | ||
32 | { | ||
33 | int p = 0; | ||
34 | |||
35 | p += scnprintf(buf + p, bufsz - p, "Statistics Flag(0x%X):\n", | ||
36 | le32_to_cpu(priv->statistics.flag)); | ||
37 | if (le32_to_cpu(priv->statistics.flag) & | ||
38 | UCODE_STATISTICS_CLEAR_MSK) | ||
39 | p += scnprintf(buf + p, bufsz - p, | ||
40 | "\tStatistics have been cleared\n"); | ||
41 | p += scnprintf(buf + p, bufsz - p, "\tOperational Frequency: %s\n", | ||
42 | (le32_to_cpu(priv->statistics.flag) & | ||
43 | UCODE_STATISTICS_FREQUENCY_MSK) | ||
44 | ? "2.4 GHz" : "5.2 GHz"); | ||
45 | p += scnprintf(buf + p, bufsz - p, "\tTGj Narrow Band: %s\n", | ||
46 | (le32_to_cpu(priv->statistics.flag) & | ||
47 | UCODE_STATISTICS_NARROW_BAND_MSK) | ||
48 | ? "enabled" : "disabled"); | ||
49 | return p; | ||
50 | } | ||
51 | |||
31 | ssize_t iwl_ucode_rx_stats_read(struct file *file, char __user *user_buf, | 52 | ssize_t iwl_ucode_rx_stats_read(struct file *file, char __user *user_buf, |
32 | size_t count, loff_t *ppos) | 53 | size_t count, loff_t *ppos) |
33 | { | 54 | { |
@@ -75,7 +96,7 @@ ssize_t iwl_ucode_rx_stats_read(struct file *file, char __user *user_buf, | |||
75 | max_general = &priv->max_delta.rx.general; | 96 | max_general = &priv->max_delta.rx.general; |
76 | max_ht = &priv->max_delta.rx.ofdm_ht; | 97 | max_ht = &priv->max_delta.rx.ofdm_ht; |
77 | 98 | ||
78 | pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz); | 99 | pos += iwl_statistics_flag(priv, buf, bufsz); |
79 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 100 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" |
80 | "acumulative delta max\n", | 101 | "acumulative delta max\n", |
81 | "Statistics_Rx - OFDM:"); | 102 | "Statistics_Rx - OFDM:"); |
@@ -543,7 +564,7 @@ ssize_t iwl_ucode_tx_stats_read(struct file *file, | |||
543 | accum_tx = &priv->accum_statistics.tx; | 564 | accum_tx = &priv->accum_statistics.tx; |
544 | delta_tx = &priv->delta_statistics.tx; | 565 | delta_tx = &priv->delta_statistics.tx; |
545 | max_tx = &priv->max_delta.tx; | 566 | max_tx = &priv->max_delta.tx; |
546 | pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz); | 567 | pos += iwl_statistics_flag(priv, buf, bufsz); |
547 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 568 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" |
548 | "acumulative delta max\n", | 569 | "acumulative delta max\n", |
549 | "Statistics_Tx:"); | 570 | "Statistics_Tx:"); |
@@ -768,7 +789,7 @@ ssize_t iwl_ucode_general_stats_read(struct file *file, char __user *user_buf, | |||
768 | accum_div = &priv->accum_statistics.general.div; | 789 | accum_div = &priv->accum_statistics.general.div; |
769 | delta_div = &priv->delta_statistics.general.div; | 790 | delta_div = &priv->delta_statistics.general.div; |
770 | max_div = &priv->max_delta.general.div; | 791 | max_div = &priv->max_delta.general.div; |
771 | pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz); | 792 | pos += iwl_statistics_flag(priv, buf, bufsz); |
772 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 793 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" |
773 | "acumulative delta max\n", | 794 | "acumulative delta max\n", |
774 | "Statistics_General:"); | 795 | "Statistics_General:"); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c index 44ef5d93befc..3f765ba15cb8 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c | |||
@@ -37,7 +37,7 @@ | |||
37 | #include "iwl-io.h" | 37 | #include "iwl-io.h" |
38 | #include "iwl-agn.h" | 38 | #include "iwl-agn.h" |
39 | 39 | ||
40 | static int iwlagn_send_rxon_assoc(struct iwl_priv *priv) | 40 | int iwlagn_send_rxon_assoc(struct iwl_priv *priv) |
41 | { | 41 | { |
42 | int ret = 0; | 42 | int ret = 0; |
43 | struct iwl5000_rxon_assoc_cmd rxon_assoc; | 43 | struct iwl5000_rxon_assoc_cmd rxon_assoc; |
@@ -84,7 +84,7 @@ static int iwlagn_send_rxon_assoc(struct iwl_priv *priv) | |||
84 | return ret; | 84 | return ret; |
85 | } | 85 | } |
86 | 86 | ||
87 | static int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant) | 87 | int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant) |
88 | { | 88 | { |
89 | struct iwl_tx_ant_config_cmd tx_ant_cmd = { | 89 | struct iwl_tx_ant_config_cmd tx_ant_cmd = { |
90 | .valid = cpu_to_le32(valid_tx_ant), | 90 | .valid = cpu_to_le32(valid_tx_ant), |
@@ -176,14 +176,6 @@ static void iwlagn_gain_computation(struct iwl_priv *priv, | |||
176 | data->radio_write = 1; | 176 | data->radio_write = 1; |
177 | data->state = IWL_CHAIN_NOISE_CALIBRATED; | 177 | data->state = IWL_CHAIN_NOISE_CALIBRATED; |
178 | } | 178 | } |
179 | |||
180 | data->chain_noise_a = 0; | ||
181 | data->chain_noise_b = 0; | ||
182 | data->chain_noise_c = 0; | ||
183 | data->chain_signal_a = 0; | ||
184 | data->chain_signal_b = 0; | ||
185 | data->chain_signal_c = 0; | ||
186 | data->beacon_count = 0; | ||
187 | } | 179 | } |
188 | 180 | ||
189 | static void iwlagn_chain_noise_reset(struct iwl_priv *priv) | 181 | static void iwlagn_chain_noise_reset(struct iwl_priv *priv) |
@@ -191,10 +183,20 @@ static void iwlagn_chain_noise_reset(struct iwl_priv *priv) | |||
191 | struct iwl_chain_noise_data *data = &priv->chain_noise_data; | 183 | struct iwl_chain_noise_data *data = &priv->chain_noise_data; |
192 | int ret; | 184 | int ret; |
193 | 185 | ||
194 | if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) { | 186 | if ((data->state == IWL_CHAIN_NOISE_ALIVE) && |
187 | iwl_is_associated(priv)) { | ||
195 | struct iwl_calib_chain_noise_reset_cmd cmd; | 188 | struct iwl_calib_chain_noise_reset_cmd cmd; |
196 | memset(&cmd, 0, sizeof(cmd)); | ||
197 | 189 | ||
190 | /* clear data for chain noise calibration algorithm */ | ||
191 | data->chain_noise_a = 0; | ||
192 | data->chain_noise_b = 0; | ||
193 | data->chain_noise_c = 0; | ||
194 | data->chain_signal_a = 0; | ||
195 | data->chain_signal_b = 0; | ||
196 | data->chain_signal_c = 0; | ||
197 | data->beacon_count = 0; | ||
198 | |||
199 | memset(&cmd, 0, sizeof(cmd)); | ||
198 | cmd.hdr.op_code = IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD; | 200 | cmd.hdr.op_code = IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD; |
199 | cmd.hdr.first_group = 0; | 201 | cmd.hdr.first_group = 0; |
200 | cmd.hdr.groups_num = 1; | 202 | cmd.hdr.groups_num = 1; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-hw.h b/drivers/net/wireless/iwlwifi/iwl-agn-hw.h index f9a3fbb6338f..a52b82c8e7a6 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-hw.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn-hw.h | |||
@@ -112,7 +112,7 @@ | |||
112 | */ | 112 | */ |
113 | struct iwlagn_scd_bc_tbl { | 113 | struct iwlagn_scd_bc_tbl { |
114 | __le16 tfd_offset[TFD_QUEUE_BC_SIZE]; | 114 | __le16 tfd_offset[TFD_QUEUE_BC_SIZE]; |
115 | } __attribute__ ((packed)); | 115 | } __packed; |
116 | 116 | ||
117 | 117 | ||
118 | #endif /* __iwl_agn_hw_h__ */ | 118 | #endif /* __iwl_agn_hw_h__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c index 0f292a210ed9..548f51d92de0 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c | |||
@@ -77,7 +77,7 @@ static int iwlagn_tx_status_reply_tx(struct iwl_priv *priv, | |||
77 | IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n", | 77 | IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n", |
78 | agg->frame_count, agg->start_idx, idx); | 78 | agg->frame_count, agg->start_idx, idx); |
79 | 79 | ||
80 | info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]); | 80 | info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb); |
81 | info->status.rates[0].count = tx_resp->failure_frame + 1; | 81 | info->status.rates[0].count = tx_resp->failure_frame + 1; |
82 | info->flags &= ~IEEE80211_TX_CTL_AMPDU; | 82 | info->flags &= ~IEEE80211_TX_CTL_AMPDU; |
83 | info->flags |= iwl_tx_status_to_mac80211(status); | 83 | info->flags |= iwl_tx_status_to_mac80211(status); |
@@ -93,6 +93,12 @@ static int iwlagn_tx_status_reply_tx(struct iwl_priv *priv, | |||
93 | } else { | 93 | } else { |
94 | /* Two or more frames were attempted; expect block-ack */ | 94 | /* Two or more frames were attempted; expect block-ack */ |
95 | u64 bitmap = 0; | 95 | u64 bitmap = 0; |
96 | |||
97 | /* | ||
98 | * Start is the lowest frame sent. It may not be the first | ||
99 | * frame in the batch; we figure this out dynamically during | ||
100 | * the following loop. | ||
101 | */ | ||
96 | int start = agg->start_idx; | 102 | int start = agg->start_idx; |
97 | 103 | ||
98 | /* Construct bit-map of pending frames within Tx window */ | 104 | /* Construct bit-map of pending frames within Tx window */ |
@@ -131,25 +137,58 @@ static int iwlagn_tx_status_reply_tx(struct iwl_priv *priv, | |||
131 | IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n", | 137 | IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n", |
132 | i, idx, SEQ_TO_SN(sc)); | 138 | i, idx, SEQ_TO_SN(sc)); |
133 | 139 | ||
140 | /* | ||
141 | * sh -> how many frames ahead of the starting frame is | ||
142 | * the current one? | ||
143 | * | ||
144 | * Note that all frames sent in the batch must be in a | ||
145 | * 64-frame window, so this number should be in [0,63]. | ||
146 | * If outside of this window, then we've found a new | ||
147 | * "first" frame in the batch and need to change start. | ||
148 | */ | ||
134 | sh = idx - start; | 149 | sh = idx - start; |
135 | if (sh > 64) { | 150 | |
136 | sh = (start - idx) + 0xff; | 151 | /* |
152 | * If >= 64, out of window. start must be at the front | ||
153 | * of the circular buffer, idx must be near the end of | ||
154 | * the buffer, and idx is the new "first" frame. Shift | ||
155 | * the indices around. | ||
156 | */ | ||
157 | if (sh >= 64) { | ||
158 | /* Shift bitmap by start - idx, wrapped */ | ||
159 | sh = 0x100 - idx + start; | ||
137 | bitmap = bitmap << sh; | 160 | bitmap = bitmap << sh; |
161 | /* Now idx is the new start so sh = 0 */ | ||
138 | sh = 0; | 162 | sh = 0; |
139 | start = idx; | 163 | start = idx; |
140 | } else if (sh < -64) | 164 | /* |
141 | sh = 0xff - (start - idx); | 165 | * If <= -64 then wraps the 256-pkt circular buffer |
142 | else if (sh < 0) { | 166 | * (e.g., start = 255 and idx = 0, sh should be 1) |
167 | */ | ||
168 | } else if (sh <= -64) { | ||
169 | sh = 0x100 - start + idx; | ||
170 | /* | ||
171 | * If < 0 but > -64, out of window. idx is before start | ||
172 | * but not wrapped. Shift the indices around. | ||
173 | */ | ||
174 | } else if (sh < 0) { | ||
175 | /* Shift by how far start is ahead of idx */ | ||
143 | sh = start - idx; | 176 | sh = start - idx; |
144 | start = idx; | ||
145 | bitmap = bitmap << sh; | 177 | bitmap = bitmap << sh; |
178 | /* Now idx is the new start so sh = 0 */ | ||
179 | start = idx; | ||
146 | sh = 0; | 180 | sh = 0; |
147 | } | 181 | } |
182 | /* Sequence number start + sh was sent in this batch */ | ||
148 | bitmap |= 1ULL << sh; | 183 | bitmap |= 1ULL << sh; |
149 | IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n", | 184 | IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n", |
150 | start, (unsigned long long)bitmap); | 185 | start, (unsigned long long)bitmap); |
151 | } | 186 | } |
152 | 187 | ||
188 | /* | ||
189 | * Store the bitmap and possibly the new start, if we wrapped | ||
190 | * the buffer above | ||
191 | */ | ||
153 | agg->bitmap = bitmap; | 192 | agg->bitmap = bitmap; |
154 | agg->start_idx = start; | 193 | agg->start_idx = start; |
155 | IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n", | 194 | IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n", |
@@ -184,6 +223,7 @@ static void iwlagn_rx_reply_tx(struct iwl_priv *priv, | |||
184 | int tid; | 223 | int tid; |
185 | int sta_id; | 224 | int sta_id; |
186 | int freed; | 225 | int freed; |
226 | unsigned long flags; | ||
187 | 227 | ||
188 | if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) { | 228 | if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) { |
189 | IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d " | 229 | IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d " |
@@ -193,15 +233,16 @@ static void iwlagn_rx_reply_tx(struct iwl_priv *priv, | |||
193 | return; | 233 | return; |
194 | } | 234 | } |
195 | 235 | ||
196 | info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]); | 236 | info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb); |
197 | memset(&info->status, 0, sizeof(info->status)); | 237 | memset(&info->status, 0, sizeof(info->status)); |
198 | 238 | ||
199 | tid = (tx_resp->ra_tid & IWL50_TX_RES_TID_MSK) >> IWL50_TX_RES_TID_POS; | 239 | tid = (tx_resp->ra_tid & IWL50_TX_RES_TID_MSK) >> IWL50_TX_RES_TID_POS; |
200 | sta_id = (tx_resp->ra_tid & IWL50_TX_RES_RA_MSK) >> IWL50_TX_RES_RA_POS; | 240 | sta_id = (tx_resp->ra_tid & IWL50_TX_RES_RA_MSK) >> IWL50_TX_RES_RA_POS; |
201 | 241 | ||
242 | spin_lock_irqsave(&priv->sta_lock, flags); | ||
202 | if (txq->sched_retry) { | 243 | if (txq->sched_retry) { |
203 | const u32 scd_ssn = iwlagn_get_scd_ssn(tx_resp); | 244 | const u32 scd_ssn = iwlagn_get_scd_ssn(tx_resp); |
204 | struct iwl_ht_agg *agg = NULL; | 245 | struct iwl_ht_agg *agg; |
205 | 246 | ||
206 | agg = &priv->stations[sta_id].tid[tid].agg; | 247 | agg = &priv->stations[sta_id].tid[tid].agg; |
207 | 248 | ||
@@ -256,6 +297,7 @@ static void iwlagn_rx_reply_tx(struct iwl_priv *priv, | |||
256 | iwlagn_txq_check_empty(priv, sta_id, tid, txq_id); | 297 | iwlagn_txq_check_empty(priv, sta_id, tid, txq_id); |
257 | 298 | ||
258 | iwl_check_abort_status(priv, tx_resp->frame_count, status); | 299 | iwl_check_abort_status(priv, tx_resp->frame_count, status); |
300 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
259 | } | 301 | } |
260 | 302 | ||
261 | void iwlagn_rx_handler_setup(struct iwl_priv *priv) | 303 | void iwlagn_rx_handler_setup(struct iwl_priv *priv) |
@@ -755,132 +797,6 @@ static inline int iwlagn_calc_rssi(struct iwl_priv *priv, | |||
755 | return priv->cfg->ops->utils->calc_rssi(priv, rx_resp); | 797 | return priv->cfg->ops->utils->calc_rssi(priv, rx_resp); |
756 | } | 798 | } |
757 | 799 | ||
758 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
759 | /** | ||
760 | * iwlagn_dbg_report_frame - dump frame to syslog during debug sessions | ||
761 | * | ||
762 | * You may hack this function to show different aspects of received frames, | ||
763 | * including selective frame dumps. | ||
764 | * group100 parameter selects whether to show 1 out of 100 good data frames. | ||
765 | * All beacon and probe response frames are printed. | ||
766 | */ | ||
767 | static void iwlagn_dbg_report_frame(struct iwl_priv *priv, | ||
768 | struct iwl_rx_phy_res *phy_res, u16 length, | ||
769 | struct ieee80211_hdr *header, int group100) | ||
770 | { | ||
771 | u32 to_us; | ||
772 | u32 print_summary = 0; | ||
773 | u32 print_dump = 0; /* set to 1 to dump all frames' contents */ | ||
774 | u32 hundred = 0; | ||
775 | u32 dataframe = 0; | ||
776 | __le16 fc; | ||
777 | u16 seq_ctl; | ||
778 | u16 channel; | ||
779 | u16 phy_flags; | ||
780 | u32 rate_n_flags; | ||
781 | u32 tsf_low; | ||
782 | int rssi; | ||
783 | |||
784 | if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX))) | ||
785 | return; | ||
786 | |||
787 | /* MAC header */ | ||
788 | fc = header->frame_control; | ||
789 | seq_ctl = le16_to_cpu(header->seq_ctrl); | ||
790 | |||
791 | /* metadata */ | ||
792 | channel = le16_to_cpu(phy_res->channel); | ||
793 | phy_flags = le16_to_cpu(phy_res->phy_flags); | ||
794 | rate_n_flags = le32_to_cpu(phy_res->rate_n_flags); | ||
795 | |||
796 | /* signal statistics */ | ||
797 | rssi = iwlagn_calc_rssi(priv, phy_res); | ||
798 | tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff; | ||
799 | |||
800 | to_us = !compare_ether_addr(header->addr1, priv->mac_addr); | ||
801 | |||
802 | /* if data frame is to us and all is good, | ||
803 | * (optionally) print summary for only 1 out of every 100 */ | ||
804 | if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) == | ||
805 | cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) { | ||
806 | dataframe = 1; | ||
807 | if (!group100) | ||
808 | print_summary = 1; /* print each frame */ | ||
809 | else if (priv->framecnt_to_us < 100) { | ||
810 | priv->framecnt_to_us++; | ||
811 | print_summary = 0; | ||
812 | } else { | ||
813 | priv->framecnt_to_us = 0; | ||
814 | print_summary = 1; | ||
815 | hundred = 1; | ||
816 | } | ||
817 | } else { | ||
818 | /* print summary for all other frames */ | ||
819 | print_summary = 1; | ||
820 | } | ||
821 | |||
822 | if (print_summary) { | ||
823 | char *title; | ||
824 | int rate_idx; | ||
825 | u32 bitrate; | ||
826 | |||
827 | if (hundred) | ||
828 | title = "100Frames"; | ||
829 | else if (ieee80211_has_retry(fc)) | ||
830 | title = "Retry"; | ||
831 | else if (ieee80211_is_assoc_resp(fc)) | ||
832 | title = "AscRsp"; | ||
833 | else if (ieee80211_is_reassoc_resp(fc)) | ||
834 | title = "RasRsp"; | ||
835 | else if (ieee80211_is_probe_resp(fc)) { | ||
836 | title = "PrbRsp"; | ||
837 | print_dump = 1; /* dump frame contents */ | ||
838 | } else if (ieee80211_is_beacon(fc)) { | ||
839 | title = "Beacon"; | ||
840 | print_dump = 1; /* dump frame contents */ | ||
841 | } else if (ieee80211_is_atim(fc)) | ||
842 | title = "ATIM"; | ||
843 | else if (ieee80211_is_auth(fc)) | ||
844 | title = "Auth"; | ||
845 | else if (ieee80211_is_deauth(fc)) | ||
846 | title = "DeAuth"; | ||
847 | else if (ieee80211_is_disassoc(fc)) | ||
848 | title = "DisAssoc"; | ||
849 | else | ||
850 | title = "Frame"; | ||
851 | |||
852 | rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags); | ||
853 | if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) { | ||
854 | bitrate = 0; | ||
855 | WARN_ON_ONCE(1); | ||
856 | } else { | ||
857 | bitrate = iwl_rates[rate_idx].ieee / 2; | ||
858 | } | ||
859 | |||
860 | /* print frame summary. | ||
861 | * MAC addresses show just the last byte (for brevity), | ||
862 | * but you can hack it to show more, if you'd like to. */ | ||
863 | if (dataframe) | ||
864 | IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, " | ||
865 | "len=%u, rssi=%d, chnl=%d, rate=%u,\n", | ||
866 | title, le16_to_cpu(fc), header->addr1[5], | ||
867 | length, rssi, channel, bitrate); | ||
868 | else { | ||
869 | /* src/dst addresses assume managed mode */ | ||
870 | IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, " | ||
871 | "len=%u, rssi=%d, tim=%lu usec, " | ||
872 | "phy=0x%02x, chnl=%d\n", | ||
873 | title, le16_to_cpu(fc), header->addr1[5], | ||
874 | header->addr3[5], length, rssi, | ||
875 | tsf_low - priv->scan_start_tsf, | ||
876 | phy_flags, channel); | ||
877 | } | ||
878 | } | ||
879 | if (print_dump) | ||
880 | iwl_print_hex_dump(priv, IWL_DL_RX, header, length); | ||
881 | } | ||
882 | #endif | ||
883 | |||
884 | static u32 iwlagn_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in) | 800 | static u32 iwlagn_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in) |
885 | { | 801 | { |
886 | u32 decrypt_out = 0; | 802 | u32 decrypt_out = 0; |
@@ -1060,11 +976,6 @@ void iwlagn_rx_reply_rx(struct iwl_priv *priv, | |||
1060 | /* Find max signal strength (dBm) among 3 antenna/receiver chains */ | 976 | /* Find max signal strength (dBm) among 3 antenna/receiver chains */ |
1061 | rx_status.signal = iwlagn_calc_rssi(priv, phy_res); | 977 | rx_status.signal = iwlagn_calc_rssi(priv, phy_res); |
1062 | 978 | ||
1063 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
1064 | /* Set "1" to report good data frames in groups of 100 */ | ||
1065 | if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX)) | ||
1066 | iwlagn_dbg_report_frame(priv, phy_res, len, header, 1); | ||
1067 | #endif | ||
1068 | iwl_dbg_log_rx_data_frame(priv, len, header); | 979 | iwl_dbg_log_rx_data_frame(priv, len, header); |
1069 | IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, TSF %llu\n", | 980 | IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, TSF %llu\n", |
1070 | rx_status.signal, (unsigned long long)rx_status.mactime); | 981 | rx_status.signal, (unsigned long long)rx_status.mactime); |
@@ -1252,6 +1163,7 @@ void iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
1252 | bool is_active = false; | 1163 | bool is_active = false; |
1253 | int chan_mod; | 1164 | int chan_mod; |
1254 | u8 active_chains; | 1165 | u8 active_chains; |
1166 | u8 scan_tx_antennas = priv->hw_params.valid_tx_ant; | ||
1255 | 1167 | ||
1256 | conf = ieee80211_get_hw_conf(priv->hw); | 1168 | conf = ieee80211_get_hw_conf(priv->hw); |
1257 | 1169 | ||
@@ -1403,11 +1315,14 @@ void iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
1403 | 1315 | ||
1404 | band = priv->scan_band; | 1316 | band = priv->scan_band; |
1405 | 1317 | ||
1406 | if (priv->cfg->scan_antennas[band]) | 1318 | if (priv->cfg->scan_rx_antennas[band]) |
1407 | rx_ant = priv->cfg->scan_antennas[band]; | 1319 | rx_ant = priv->cfg->scan_rx_antennas[band]; |
1408 | 1320 | ||
1409 | priv->scan_tx_ant[band] = | 1321 | if (priv->cfg->scan_tx_antennas[band]) |
1410 | iwl_toggle_tx_ant(priv, priv->scan_tx_ant[band]); | 1322 | scan_tx_antennas = priv->cfg->scan_tx_antennas[band]; |
1323 | |||
1324 | priv->scan_tx_ant[band] = iwl_toggle_tx_ant(priv, priv->scan_tx_ant[band], | ||
1325 | scan_tx_antennas); | ||
1411 | rate_flags |= iwl_ant_idx_to_flags(priv->scan_tx_ant[band]); | 1326 | rate_flags |= iwl_ant_idx_to_flags(priv->scan_tx_ant[band]); |
1412 | scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags); | 1327 | scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags); |
1413 | 1328 | ||
@@ -1433,13 +1348,15 @@ void iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
1433 | if (!priv->is_internal_short_scan) { | 1348 | if (!priv->is_internal_short_scan) { |
1434 | cmd_len = iwl_fill_probe_req(priv, | 1349 | cmd_len = iwl_fill_probe_req(priv, |
1435 | (struct ieee80211_mgmt *)scan->data, | 1350 | (struct ieee80211_mgmt *)scan->data, |
1351 | vif->addr, | ||
1436 | priv->scan_request->ie, | 1352 | priv->scan_request->ie, |
1437 | priv->scan_request->ie_len, | 1353 | priv->scan_request->ie_len, |
1438 | IWL_MAX_SCAN_SIZE - sizeof(*scan)); | 1354 | IWL_MAX_SCAN_SIZE - sizeof(*scan)); |
1439 | } else { | 1355 | } else { |
1356 | /* use bcast addr, will not be transmitted but must be valid */ | ||
1440 | cmd_len = iwl_fill_probe_req(priv, | 1357 | cmd_len = iwl_fill_probe_req(priv, |
1441 | (struct ieee80211_mgmt *)scan->data, | 1358 | (struct ieee80211_mgmt *)scan->data, |
1442 | NULL, 0, | 1359 | iwl_bcast_addr, NULL, 0, |
1443 | IWL_MAX_SCAN_SIZE - sizeof(*scan)); | 1360 | IWL_MAX_SCAN_SIZE - sizeof(*scan)); |
1444 | 1361 | ||
1445 | } | 1362 | } |
@@ -1502,3 +1419,18 @@ int iwlagn_manage_ibss_station(struct iwl_priv *priv, | |||
1502 | return iwl_remove_station(priv, vif_priv->ibss_bssid_sta_id, | 1419 | return iwl_remove_station(priv, vif_priv->ibss_bssid_sta_id, |
1503 | vif->bss_conf.bssid); | 1420 | vif->bss_conf.bssid); |
1504 | } | 1421 | } |
1422 | |||
1423 | void iwl_free_tfds_in_queue(struct iwl_priv *priv, | ||
1424 | int sta_id, int tid, int freed) | ||
1425 | { | ||
1426 | WARN_ON(!spin_is_locked(&priv->sta_lock)); | ||
1427 | |||
1428 | if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed) | ||
1429 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | ||
1430 | else { | ||
1431 | IWL_DEBUG_TX(priv, "free more than tfds_in_queue (%u:%d)\n", | ||
1432 | priv->stations[sta_id].tid[tid].tfds_in_queue, | ||
1433 | freed); | ||
1434 | priv->stations[sta_id].tid[tid].tfds_in_queue = 0; | ||
1435 | } | ||
1436 | } | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c index cf4a95bae4ff..40933a5de027 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c | |||
@@ -313,8 +313,7 @@ static int rs_tl_turn_on_agg_for_tid(struct iwl_priv *priv, | |||
313 | */ | 313 | */ |
314 | IWL_DEBUG_HT(priv, "Fail start Tx agg on tid: %d\n", | 314 | IWL_DEBUG_HT(priv, "Fail start Tx agg on tid: %d\n", |
315 | tid); | 315 | tid); |
316 | ieee80211_stop_tx_ba_session(sta, tid, | 316 | ieee80211_stop_tx_ba_session(sta, tid); |
317 | WLAN_BACK_INITIATOR); | ||
318 | } | 317 | } |
319 | } else | 318 | } else |
320 | IWL_ERR(priv, "Fail finding valid aggregation tid: %d\n", tid); | 319 | IWL_ERR(priv, "Fail finding valid aggregation tid: %d\n", tid); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c index a732f1094e5d..f9134ceb69ab 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c | |||
@@ -469,7 +469,8 @@ static void iwlagn_tx_cmd_build_rate(struct iwl_priv *priv, | |||
469 | } | 469 | } |
470 | 470 | ||
471 | /* Set up antennas */ | 471 | /* Set up antennas */ |
472 | priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant); | 472 | priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant, |
473 | priv->hw_params.valid_tx_ant); | ||
473 | rate_flags |= iwl_ant_idx_to_flags(priv->mgmt_tx_ant); | 474 | rate_flags |= iwl_ant_idx_to_flags(priv->mgmt_tx_ant); |
474 | 475 | ||
475 | /* Set the rate in the TX cmd */ | 476 | /* Set the rate in the TX cmd */ |
@@ -567,10 +568,7 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
567 | hdr_len = ieee80211_hdrlen(fc); | 568 | hdr_len = ieee80211_hdrlen(fc); |
568 | 569 | ||
569 | /* Find index into station table for destination station */ | 570 | /* Find index into station table for destination station */ |
570 | if (!info->control.sta) | 571 | sta_id = iwl_sta_id_or_broadcast(priv, info->control.sta); |
571 | sta_id = priv->hw_params.bcast_sta_id; | ||
572 | else | ||
573 | sta_id = iwl_sta_id(info->control.sta); | ||
574 | if (sta_id == IWL_INVALID_STATION) { | 572 | if (sta_id == IWL_INVALID_STATION) { |
575 | IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n", | 573 | IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n", |
576 | hdr->addr1); | 574 | hdr->addr1); |
@@ -598,11 +596,17 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
598 | } | 596 | } |
599 | 597 | ||
600 | txq_id = get_queue_from_ac(skb_get_queue_mapping(skb)); | 598 | txq_id = get_queue_from_ac(skb_get_queue_mapping(skb)); |
599 | |||
600 | /* irqs already disabled/saved above when locking priv->lock */ | ||
601 | spin_lock(&priv->sta_lock); | ||
602 | |||
601 | if (ieee80211_is_data_qos(fc)) { | 603 | if (ieee80211_is_data_qos(fc)) { |
602 | qc = ieee80211_get_qos_ctl(hdr); | 604 | qc = ieee80211_get_qos_ctl(hdr); |
603 | tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; | 605 | tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; |
604 | if (unlikely(tid >= MAX_TID_COUNT)) | 606 | if (WARN_ON_ONCE(tid >= MAX_TID_COUNT)) { |
607 | spin_unlock(&priv->sta_lock); | ||
605 | goto drop_unlock; | 608 | goto drop_unlock; |
609 | } | ||
606 | seq_number = priv->stations[sta_id].tid[tid].seq_number; | 610 | seq_number = priv->stations[sta_id].tid[tid].seq_number; |
607 | seq_number &= IEEE80211_SCTL_SEQ; | 611 | seq_number &= IEEE80211_SCTL_SEQ; |
608 | hdr->seq_ctrl = hdr->seq_ctrl & | 612 | hdr->seq_ctrl = hdr->seq_ctrl & |
@@ -620,15 +624,22 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
620 | swq_id = txq->swq_id; | 624 | swq_id = txq->swq_id; |
621 | q = &txq->q; | 625 | q = &txq->q; |
622 | 626 | ||
623 | if (unlikely(iwl_queue_space(q) < q->high_mark)) | 627 | if (unlikely(iwl_queue_space(q) < q->high_mark)) { |
628 | spin_unlock(&priv->sta_lock); | ||
624 | goto drop_unlock; | 629 | goto drop_unlock; |
630 | } | ||
625 | 631 | ||
626 | if (ieee80211_is_data_qos(fc)) | 632 | if (ieee80211_is_data_qos(fc)) { |
627 | priv->stations[sta_id].tid[tid].tfds_in_queue++; | 633 | priv->stations[sta_id].tid[tid].tfds_in_queue++; |
634 | if (!ieee80211_has_morefrags(fc)) | ||
635 | priv->stations[sta_id].tid[tid].seq_number = seq_number; | ||
636 | } | ||
637 | |||
638 | spin_unlock(&priv->sta_lock); | ||
628 | 639 | ||
629 | /* Set up driver data for this TFD */ | 640 | /* Set up driver data for this TFD */ |
630 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info)); | 641 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info)); |
631 | txq->txb[q->write_ptr].skb[0] = skb; | 642 | txq->txb[q->write_ptr].skb = skb; |
632 | 643 | ||
633 | /* Set up first empty entry in queue's array of Tx/cmd buffers */ | 644 | /* Set up first empty entry in queue's array of Tx/cmd buffers */ |
634 | out_cmd = txq->cmd[q->write_ptr]; | 645 | out_cmd = txq->cmd[q->write_ptr]; |
@@ -694,8 +705,8 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
694 | txcmd_phys = pci_map_single(priv->pci_dev, | 705 | txcmd_phys = pci_map_single(priv->pci_dev, |
695 | &out_cmd->hdr, len, | 706 | &out_cmd->hdr, len, |
696 | PCI_DMA_BIDIRECTIONAL); | 707 | PCI_DMA_BIDIRECTIONAL); |
697 | pci_unmap_addr_set(out_meta, mapping, txcmd_phys); | 708 | dma_unmap_addr_set(out_meta, mapping, txcmd_phys); |
698 | pci_unmap_len_set(out_meta, len, len); | 709 | dma_unmap_len_set(out_meta, len, len); |
699 | /* Add buffer containing Tx command and MAC(!) header to TFD's | 710 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
700 | * first entry */ | 711 | * first entry */ |
701 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, | 712 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, |
@@ -703,8 +714,6 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
703 | 714 | ||
704 | if (!ieee80211_has_morefrags(hdr->frame_control)) { | 715 | if (!ieee80211_has_morefrags(hdr->frame_control)) { |
705 | txq->need_update = 1; | 716 | txq->need_update = 1; |
706 | if (qc) | ||
707 | priv->stations[sta_id].tid[tid].seq_number = seq_number; | ||
708 | } else { | 717 | } else { |
709 | wait_write_ptr = 1; | 718 | wait_write_ptr = 1; |
710 | txq->need_update = 0; | 719 | txq->need_update = 0; |
@@ -1009,6 +1018,8 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif, | |||
1009 | if (ret) | 1018 | if (ret) |
1010 | return ret; | 1019 | return ret; |
1011 | 1020 | ||
1021 | spin_lock_irqsave(&priv->sta_lock, flags); | ||
1022 | tid_data = &priv->stations[sta_id].tid[tid]; | ||
1012 | if (tid_data->tfds_in_queue == 0) { | 1023 | if (tid_data->tfds_in_queue == 0) { |
1013 | IWL_DEBUG_HT(priv, "HW queue is empty\n"); | 1024 | IWL_DEBUG_HT(priv, "HW queue is empty\n"); |
1014 | tid_data->agg.state = IWL_AGG_ON; | 1025 | tid_data->agg.state = IWL_AGG_ON; |
@@ -1018,6 +1029,7 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif, | |||
1018 | tid_data->tfds_in_queue); | 1029 | tid_data->tfds_in_queue); |
1019 | tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA; | 1030 | tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA; |
1020 | } | 1031 | } |
1032 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
1021 | return ret; | 1033 | return ret; |
1022 | } | 1034 | } |
1023 | 1035 | ||
@@ -1040,11 +1052,14 @@ int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif, | |||
1040 | return -ENXIO; | 1052 | return -ENXIO; |
1041 | } | 1053 | } |
1042 | 1054 | ||
1055 | spin_lock_irqsave(&priv->sta_lock, flags); | ||
1056 | |||
1043 | if (priv->stations[sta_id].tid[tid].agg.state == | 1057 | if (priv->stations[sta_id].tid[tid].agg.state == |
1044 | IWL_EMPTYING_HW_QUEUE_ADDBA) { | 1058 | IWL_EMPTYING_HW_QUEUE_ADDBA) { |
1045 | IWL_DEBUG_HT(priv, "AGG stop before setup done\n"); | 1059 | IWL_DEBUG_HT(priv, "AGG stop before setup done\n"); |
1046 | ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); | 1060 | ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); |
1047 | priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF; | 1061 | priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF; |
1062 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
1048 | return 0; | 1063 | return 0; |
1049 | } | 1064 | } |
1050 | 1065 | ||
@@ -1062,13 +1077,17 @@ int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif, | |||
1062 | IWL_DEBUG_HT(priv, "Stopping a non empty AGG HW QUEUE\n"); | 1077 | IWL_DEBUG_HT(priv, "Stopping a non empty AGG HW QUEUE\n"); |
1063 | priv->stations[sta_id].tid[tid].agg.state = | 1078 | priv->stations[sta_id].tid[tid].agg.state = |
1064 | IWL_EMPTYING_HW_QUEUE_DELBA; | 1079 | IWL_EMPTYING_HW_QUEUE_DELBA; |
1080 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
1065 | return 0; | 1081 | return 0; |
1066 | } | 1082 | } |
1067 | 1083 | ||
1068 | IWL_DEBUG_HT(priv, "HW queue is empty\n"); | 1084 | IWL_DEBUG_HT(priv, "HW queue is empty\n"); |
1069 | priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF; | 1085 | priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF; |
1070 | 1086 | ||
1071 | spin_lock_irqsave(&priv->lock, flags); | 1087 | /* do not restore/save irqs */ |
1088 | spin_unlock(&priv->sta_lock); | ||
1089 | spin_lock(&priv->lock); | ||
1090 | |||
1072 | /* | 1091 | /* |
1073 | * the only reason this call can fail is queue number out of range, | 1092 | * the only reason this call can fail is queue number out of range, |
1074 | * which can happen if uCode is reloaded and all the station | 1093 | * which can happen if uCode is reloaded and all the station |
@@ -1092,6 +1111,8 @@ int iwlagn_txq_check_empty(struct iwl_priv *priv, | |||
1092 | u8 *addr = priv->stations[sta_id].sta.sta.addr; | 1111 | u8 *addr = priv->stations[sta_id].sta.sta.addr; |
1093 | struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid]; | 1112 | struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid]; |
1094 | 1113 | ||
1114 | WARN_ON(!spin_is_locked(&priv->sta_lock)); | ||
1115 | |||
1095 | switch (priv->stations[sta_id].tid[tid].agg.state) { | 1116 | switch (priv->stations[sta_id].tid[tid].agg.state) { |
1096 | case IWL_EMPTYING_HW_QUEUE_DELBA: | 1117 | case IWL_EMPTYING_HW_QUEUE_DELBA: |
1097 | /* We are reclaiming the last packet of the */ | 1118 | /* We are reclaiming the last packet of the */ |
@@ -1116,6 +1137,7 @@ int iwlagn_txq_check_empty(struct iwl_priv *priv, | |||
1116 | } | 1137 | } |
1117 | break; | 1138 | break; |
1118 | } | 1139 | } |
1140 | |||
1119 | return 0; | 1141 | return 0; |
1120 | } | 1142 | } |
1121 | 1143 | ||
@@ -1159,12 +1181,12 @@ int iwlagn_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index) | |||
1159 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { | 1181 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
1160 | 1182 | ||
1161 | tx_info = &txq->txb[txq->q.read_ptr]; | 1183 | tx_info = &txq->txb[txq->q.read_ptr]; |
1162 | iwlagn_tx_status(priv, tx_info->skb[0]); | 1184 | iwlagn_tx_status(priv, tx_info->skb); |
1163 | 1185 | ||
1164 | hdr = (struct ieee80211_hdr *)tx_info->skb[0]->data; | 1186 | hdr = (struct ieee80211_hdr *)tx_info->skb->data; |
1165 | if (hdr && ieee80211_is_data_qos(hdr->frame_control)) | 1187 | if (hdr && ieee80211_is_data_qos(hdr->frame_control)) |
1166 | nfreed++; | 1188 | nfreed++; |
1167 | tx_info->skb[0] = NULL; | 1189 | tx_info->skb = NULL; |
1168 | 1190 | ||
1169 | if (priv->cfg->ops->lib->txq_inval_byte_cnt_tbl) | 1191 | if (priv->cfg->ops->lib->txq_inval_byte_cnt_tbl) |
1170 | priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq); | 1192 | priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq); |
@@ -1188,7 +1210,7 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv, | |||
1188 | int i, sh, ack; | 1210 | int i, sh, ack; |
1189 | u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl); | 1211 | u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl); |
1190 | u16 scd_flow = le16_to_cpu(ba_resp->scd_flow); | 1212 | u16 scd_flow = le16_to_cpu(ba_resp->scd_flow); |
1191 | u64 bitmap; | 1213 | u64 bitmap, sent_bitmap; |
1192 | int successes = 0; | 1214 | int successes = 0; |
1193 | struct ieee80211_tx_info *info; | 1215 | struct ieee80211_tx_info *info; |
1194 | 1216 | ||
@@ -1216,24 +1238,26 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv, | |||
1216 | 1238 | ||
1217 | /* check for success or failure according to the | 1239 | /* check for success or failure according to the |
1218 | * transmitted bitmap and block-ack bitmap */ | 1240 | * transmitted bitmap and block-ack bitmap */ |
1219 | bitmap &= agg->bitmap; | 1241 | sent_bitmap = bitmap & agg->bitmap; |
1220 | 1242 | ||
1221 | /* For each frame attempted in aggregation, | 1243 | /* For each frame attempted in aggregation, |
1222 | * update driver's record of tx frame's status. */ | 1244 | * update driver's record of tx frame's status. */ |
1223 | for (i = 0; i < agg->frame_count ; i++) { | 1245 | i = 0; |
1224 | ack = bitmap & (1ULL << i); | 1246 | while (sent_bitmap) { |
1225 | successes += !!ack; | 1247 | ack = sent_bitmap & 1ULL; |
1248 | successes += ack; | ||
1226 | IWL_DEBUG_TX_REPLY(priv, "%s ON i=%d idx=%d raw=%d\n", | 1249 | IWL_DEBUG_TX_REPLY(priv, "%s ON i=%d idx=%d raw=%d\n", |
1227 | ack ? "ACK" : "NACK", i, (agg->start_idx + i) & 0xff, | 1250 | ack ? "ACK" : "NACK", i, (agg->start_idx + i) & 0xff, |
1228 | agg->start_idx + i); | 1251 | agg->start_idx + i); |
1252 | sent_bitmap >>= 1; | ||
1253 | ++i; | ||
1229 | } | 1254 | } |
1230 | 1255 | ||
1231 | info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]); | 1256 | info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb); |
1232 | memset(&info->status, 0, sizeof(info->status)); | 1257 | memset(&info->status, 0, sizeof(info->status)); |
1233 | info->flags |= IEEE80211_TX_STAT_ACK; | 1258 | info->flags |= IEEE80211_TX_STAT_ACK; |
1234 | info->flags |= IEEE80211_TX_STAT_AMPDU; | 1259 | info->flags |= IEEE80211_TX_STAT_AMPDU; |
1235 | info->status.ampdu_ack_len = successes; | 1260 | info->status.ampdu_ack_len = successes; |
1236 | info->status.ampdu_ack_map = bitmap; | ||
1237 | info->status.ampdu_len = agg->frame_count; | 1261 | info->status.ampdu_len = agg->frame_count; |
1238 | iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info); | 1262 | iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info); |
1239 | 1263 | ||
@@ -1281,6 +1305,7 @@ void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv, | |||
1281 | int index; | 1305 | int index; |
1282 | int sta_id; | 1306 | int sta_id; |
1283 | int tid; | 1307 | int tid; |
1308 | unsigned long flags; | ||
1284 | 1309 | ||
1285 | /* "flow" corresponds to Tx queue */ | 1310 | /* "flow" corresponds to Tx queue */ |
1286 | u16 scd_flow = le16_to_cpu(ba_resp->scd_flow); | 1311 | u16 scd_flow = le16_to_cpu(ba_resp->scd_flow); |
@@ -1303,7 +1328,7 @@ void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv, | |||
1303 | /* Find index just before block-ack window */ | 1328 | /* Find index just before block-ack window */ |
1304 | index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd); | 1329 | index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd); |
1305 | 1330 | ||
1306 | /* TODO: Need to get this copy more safely - now good for debug */ | 1331 | spin_lock_irqsave(&priv->sta_lock, flags); |
1307 | 1332 | ||
1308 | IWL_DEBUG_TX_REPLY(priv, "REPLY_COMPRESSED_BA [%d] Received from %pM, " | 1333 | IWL_DEBUG_TX_REPLY(priv, "REPLY_COMPRESSED_BA [%d] Received from %pM, " |
1309 | "sta_id = %d\n", | 1334 | "sta_id = %d\n", |
@@ -1339,4 +1364,6 @@ void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv, | |||
1339 | 1364 | ||
1340 | iwlagn_txq_check_empty(priv, sta_id, tid, scd_flow); | 1365 | iwlagn_txq_check_empty(priv, sta_id, tid, scd_flow); |
1341 | } | 1366 | } |
1367 | |||
1368 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
1342 | } | 1369 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c index 637286c396fe..6f77441cb65a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c | |||
@@ -423,3 +423,126 @@ int iwlagn_alive_notify(struct iwl_priv *priv) | |||
423 | 423 | ||
424 | return 0; | 424 | return 0; |
425 | } | 425 | } |
426 | |||
427 | |||
428 | /** | ||
429 | * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host, | ||
430 | * using sample data 100 bytes apart. If these sample points are good, | ||
431 | * it's a pretty good bet that everything between them is good, too. | ||
432 | */ | ||
433 | static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len) | ||
434 | { | ||
435 | u32 val; | ||
436 | int ret = 0; | ||
437 | u32 errcnt = 0; | ||
438 | u32 i; | ||
439 | |||
440 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); | ||
441 | |||
442 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { | ||
443 | /* read data comes through single port, auto-incr addr */ | ||
444 | /* NOTE: Use the debugless read so we don't flood kernel log | ||
445 | * if IWL_DL_IO is set */ | ||
446 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, | ||
447 | i + IWLAGN_RTC_INST_LOWER_BOUND); | ||
448 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
449 | if (val != le32_to_cpu(*image)) { | ||
450 | ret = -EIO; | ||
451 | errcnt++; | ||
452 | if (errcnt >= 3) | ||
453 | break; | ||
454 | } | ||
455 | } | ||
456 | |||
457 | return ret; | ||
458 | } | ||
459 | |||
460 | /** | ||
461 | * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host, | ||
462 | * looking at all data. | ||
463 | */ | ||
464 | static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image, | ||
465 | u32 len) | ||
466 | { | ||
467 | u32 val; | ||
468 | u32 save_len = len; | ||
469 | int ret = 0; | ||
470 | u32 errcnt; | ||
471 | |||
472 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); | ||
473 | |||
474 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, | ||
475 | IWLAGN_RTC_INST_LOWER_BOUND); | ||
476 | |||
477 | errcnt = 0; | ||
478 | for (; len > 0; len -= sizeof(u32), image++) { | ||
479 | /* read data comes through single port, auto-incr addr */ | ||
480 | /* NOTE: Use the debugless read so we don't flood kernel log | ||
481 | * if IWL_DL_IO is set */ | ||
482 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
483 | if (val != le32_to_cpu(*image)) { | ||
484 | IWL_ERR(priv, "uCode INST section is invalid at " | ||
485 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | ||
486 | save_len - len, val, le32_to_cpu(*image)); | ||
487 | ret = -EIO; | ||
488 | errcnt++; | ||
489 | if (errcnt >= 20) | ||
490 | break; | ||
491 | } | ||
492 | } | ||
493 | |||
494 | if (!errcnt) | ||
495 | IWL_DEBUG_INFO(priv, | ||
496 | "ucode image in INSTRUCTION memory is good\n"); | ||
497 | |||
498 | return ret; | ||
499 | } | ||
500 | |||
501 | /** | ||
502 | * iwl_verify_ucode - determine which instruction image is in SRAM, | ||
503 | * and verify its contents | ||
504 | */ | ||
505 | int iwl_verify_ucode(struct iwl_priv *priv) | ||
506 | { | ||
507 | __le32 *image; | ||
508 | u32 len; | ||
509 | int ret; | ||
510 | |||
511 | /* Try bootstrap */ | ||
512 | image = (__le32 *)priv->ucode_boot.v_addr; | ||
513 | len = priv->ucode_boot.len; | ||
514 | ret = iwlcore_verify_inst_sparse(priv, image, len); | ||
515 | if (!ret) { | ||
516 | IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n"); | ||
517 | return 0; | ||
518 | } | ||
519 | |||
520 | /* Try initialize */ | ||
521 | image = (__le32 *)priv->ucode_init.v_addr; | ||
522 | len = priv->ucode_init.len; | ||
523 | ret = iwlcore_verify_inst_sparse(priv, image, len); | ||
524 | if (!ret) { | ||
525 | IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n"); | ||
526 | return 0; | ||
527 | } | ||
528 | |||
529 | /* Try runtime/protocol */ | ||
530 | image = (__le32 *)priv->ucode_code.v_addr; | ||
531 | len = priv->ucode_code.len; | ||
532 | ret = iwlcore_verify_inst_sparse(priv, image, len); | ||
533 | if (!ret) { | ||
534 | IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n"); | ||
535 | return 0; | ||
536 | } | ||
537 | |||
538 | IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); | ||
539 | |||
540 | /* Since nothing seems to match, show first several data entries in | ||
541 | * instruction SRAM, so maybe visual inspection will give a clue. | ||
542 | * Selection of bootstrap image (vs. other images) is arbitrary. */ | ||
543 | image = (__le32 *)priv->ucode_boot.v_addr; | ||
544 | len = priv->ucode_boot.len; | ||
545 | ret = iwl_verify_inst_full(priv, image, len); | ||
546 | |||
547 | return ret; | ||
548 | } | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index 7726e67044c0..69e17d782883 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c | |||
@@ -120,7 +120,7 @@ int iwl_commit_rxon(struct iwl_priv *priv) | |||
120 | (priv->switch_rxon.channel != priv->staging_rxon.channel)) { | 120 | (priv->switch_rxon.channel != priv->staging_rxon.channel)) { |
121 | IWL_DEBUG_11H(priv, "abort channel switch on %d\n", | 121 | IWL_DEBUG_11H(priv, "abort channel switch on %d\n", |
122 | le16_to_cpu(priv->switch_rxon.channel)); | 122 | le16_to_cpu(priv->switch_rxon.channel)); |
123 | priv->switch_rxon.switch_in_progress = false; | 123 | iwl_chswitch_done(priv, false); |
124 | } | 124 | } |
125 | 125 | ||
126 | /* If we don't need to send a full RXON, we can use | 126 | /* If we don't need to send a full RXON, we can use |
@@ -367,7 +367,8 @@ static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv, | |||
367 | 367 | ||
368 | /* Set up packet rate and flags */ | 368 | /* Set up packet rate and flags */ |
369 | rate = iwl_rate_get_lowest_plcp(priv); | 369 | rate = iwl_rate_get_lowest_plcp(priv); |
370 | priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant); | 370 | priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant, |
371 | priv->hw_params.valid_tx_ant); | ||
371 | rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant); | 372 | rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant); |
372 | if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE)) | 373 | if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE)) |
373 | rate_flags |= RATE_MCS_CCK_MSK; | 374 | rate_flags |= RATE_MCS_CCK_MSK; |
@@ -474,18 +475,25 @@ void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq) | |||
474 | /* Unmap tx_cmd */ | 475 | /* Unmap tx_cmd */ |
475 | if (num_tbs) | 476 | if (num_tbs) |
476 | pci_unmap_single(dev, | 477 | pci_unmap_single(dev, |
477 | pci_unmap_addr(&txq->meta[index], mapping), | 478 | dma_unmap_addr(&txq->meta[index], mapping), |
478 | pci_unmap_len(&txq->meta[index], len), | 479 | dma_unmap_len(&txq->meta[index], len), |
479 | PCI_DMA_BIDIRECTIONAL); | 480 | PCI_DMA_BIDIRECTIONAL); |
480 | 481 | ||
481 | /* Unmap chunks, if any. */ | 482 | /* Unmap chunks, if any. */ |
482 | for (i = 1; i < num_tbs; i++) { | 483 | for (i = 1; i < num_tbs; i++) |
483 | pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i), | 484 | pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i), |
484 | iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE); | 485 | iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE); |
485 | 486 | ||
486 | if (txq->txb) { | 487 | /* free SKB */ |
487 | dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]); | 488 | if (txq->txb) { |
488 | txq->txb[txq->q.read_ptr].skb[i - 1] = NULL; | 489 | struct sk_buff *skb; |
490 | |||
491 | skb = txq->txb[txq->q.read_ptr].skb; | ||
492 | |||
493 | /* can be called from irqs-disabled context */ | ||
494 | if (skb) { | ||
495 | dev_kfree_skb_any(skb); | ||
496 | txq->txb[txq->q.read_ptr].skb = NULL; | ||
489 | } | 497 | } |
490 | } | 498 | } |
491 | } | 499 | } |
@@ -1466,7 +1474,12 @@ bool iwl_good_ack_health(struct iwl_priv *priv, | |||
1466 | " expected_ack_cnt = %d\n", | 1474 | " expected_ack_cnt = %d\n", |
1467 | actual_ack_cnt_delta, expected_ack_cnt_delta); | 1475 | actual_ack_cnt_delta, expected_ack_cnt_delta); |
1468 | 1476 | ||
1469 | #ifdef CONFIG_IWLWIFI_DEBUG | 1477 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
1478 | /* | ||
1479 | * This is ifdef'ed on DEBUGFS because otherwise the | ||
1480 | * statistics aren't available. If DEBUGFS is set but | ||
1481 | * DEBUG is not, these will just compile out. | ||
1482 | */ | ||
1470 | IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n", | 1483 | IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n", |
1471 | priv->delta_statistics.tx.rx_detected_cnt); | 1484 | priv->delta_statistics.tx.rx_detected_cnt); |
1472 | IWL_DEBUG_RADIO(priv, | 1485 | IWL_DEBUG_RADIO(priv, |
@@ -1694,6 +1707,9 @@ struct iwlagn_firmware_pieces { | |||
1694 | size_t inst_size, data_size, init_size, init_data_size, boot_size; | 1707 | size_t inst_size, data_size, init_size, init_data_size, boot_size; |
1695 | 1708 | ||
1696 | u32 build; | 1709 | u32 build; |
1710 | |||
1711 | u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; | ||
1712 | u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; | ||
1697 | }; | 1713 | }; |
1698 | 1714 | ||
1699 | static int iwlagn_load_legacy_firmware(struct iwl_priv *priv, | 1715 | static int iwlagn_load_legacy_firmware(struct iwl_priv *priv, |
@@ -1871,6 +1887,42 @@ static int iwlagn_load_firmware(struct iwl_priv *priv, | |||
1871 | capa->max_probe_length = | 1887 | capa->max_probe_length = |
1872 | le32_to_cpup((__le32 *)tlv_data); | 1888 | le32_to_cpup((__le32 *)tlv_data); |
1873 | break; | 1889 | break; |
1890 | case IWL_UCODE_TLV_INIT_EVTLOG_PTR: | ||
1891 | if (tlv_len != 4) | ||
1892 | return -EINVAL; | ||
1893 | pieces->init_evtlog_ptr = | ||
1894 | le32_to_cpup((__le32 *)tlv_data); | ||
1895 | break; | ||
1896 | case IWL_UCODE_TLV_INIT_EVTLOG_SIZE: | ||
1897 | if (tlv_len != 4) | ||
1898 | return -EINVAL; | ||
1899 | pieces->init_evtlog_size = | ||
1900 | le32_to_cpup((__le32 *)tlv_data); | ||
1901 | break; | ||
1902 | case IWL_UCODE_TLV_INIT_ERRLOG_PTR: | ||
1903 | if (tlv_len != 4) | ||
1904 | return -EINVAL; | ||
1905 | pieces->init_errlog_ptr = | ||
1906 | le32_to_cpup((__le32 *)tlv_data); | ||
1907 | break; | ||
1908 | case IWL_UCODE_TLV_RUNT_EVTLOG_PTR: | ||
1909 | if (tlv_len != 4) | ||
1910 | return -EINVAL; | ||
1911 | pieces->inst_evtlog_ptr = | ||
1912 | le32_to_cpup((__le32 *)tlv_data); | ||
1913 | break; | ||
1914 | case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE: | ||
1915 | if (tlv_len != 4) | ||
1916 | return -EINVAL; | ||
1917 | pieces->inst_evtlog_size = | ||
1918 | le32_to_cpup((__le32 *)tlv_data); | ||
1919 | break; | ||
1920 | case IWL_UCODE_TLV_RUNT_ERRLOG_PTR: | ||
1921 | if (tlv_len != 4) | ||
1922 | return -EINVAL; | ||
1923 | pieces->inst_errlog_ptr = | ||
1924 | le32_to_cpup((__le32 *)tlv_data); | ||
1925 | break; | ||
1874 | default: | 1926 | default: |
1875 | break; | 1927 | break; |
1876 | } | 1928 | } |
@@ -2063,6 +2115,26 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
2063 | goto err_pci_alloc; | 2115 | goto err_pci_alloc; |
2064 | } | 2116 | } |
2065 | 2117 | ||
2118 | /* Now that we can no longer fail, copy information */ | ||
2119 | |||
2120 | /* | ||
2121 | * The (size - 16) / 12 formula is based on the information recorded | ||
2122 | * for each event, which is of mode 1 (including timestamp) for all | ||
2123 | * new microcodes that include this information. | ||
2124 | */ | ||
2125 | priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr; | ||
2126 | if (pieces.init_evtlog_size) | ||
2127 | priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12; | ||
2128 | else | ||
2129 | priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size; | ||
2130 | priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr; | ||
2131 | priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr; | ||
2132 | if (pieces.inst_evtlog_size) | ||
2133 | priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12; | ||
2134 | else | ||
2135 | priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size; | ||
2136 | priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr; | ||
2137 | |||
2066 | /* Copy images into buffers for card's bus-master reads ... */ | 2138 | /* Copy images into buffers for card's bus-master reads ... */ |
2067 | 2139 | ||
2068 | /* Runtime instructions (first block of data in file) */ | 2140 | /* Runtime instructions (first block of data in file) */ |
@@ -2195,10 +2267,15 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv) | |||
2195 | u32 blink1, blink2, ilink1, ilink2; | 2267 | u32 blink1, blink2, ilink1, ilink2; |
2196 | u32 pc, hcmd; | 2268 | u32 pc, hcmd; |
2197 | 2269 | ||
2198 | if (priv->ucode_type == UCODE_INIT) | 2270 | if (priv->ucode_type == UCODE_INIT) { |
2199 | base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr); | 2271 | base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr); |
2200 | else | 2272 | if (!base) |
2273 | base = priv->_agn.init_errlog_ptr; | ||
2274 | } else { | ||
2201 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | 2275 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); |
2276 | if (!base) | ||
2277 | base = priv->_agn.inst_errlog_ptr; | ||
2278 | } | ||
2202 | 2279 | ||
2203 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { | 2280 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
2204 | IWL_ERR(priv, | 2281 | IWL_ERR(priv, |
@@ -2258,10 +2335,16 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx, | |||
2258 | 2335 | ||
2259 | if (num_events == 0) | 2336 | if (num_events == 0) |
2260 | return pos; | 2337 | return pos; |
2261 | if (priv->ucode_type == UCODE_INIT) | 2338 | |
2339 | if (priv->ucode_type == UCODE_INIT) { | ||
2262 | base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); | 2340 | base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); |
2263 | else | 2341 | if (!base) |
2342 | base = priv->_agn.init_evtlog_ptr; | ||
2343 | } else { | ||
2264 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | 2344 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); |
2345 | if (!base) | ||
2346 | base = priv->_agn.inst_evtlog_ptr; | ||
2347 | } | ||
2265 | 2348 | ||
2266 | if (mode == 0) | 2349 | if (mode == 0) |
2267 | event_size = 2 * sizeof(u32); | 2350 | event_size = 2 * sizeof(u32); |
@@ -2363,13 +2446,21 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log, | |||
2363 | u32 num_wraps; /* # times uCode wrapped to top of log */ | 2446 | u32 num_wraps; /* # times uCode wrapped to top of log */ |
2364 | u32 next_entry; /* index of next entry to be written by uCode */ | 2447 | u32 next_entry; /* index of next entry to be written by uCode */ |
2365 | u32 size; /* # entries that we'll print */ | 2448 | u32 size; /* # entries that we'll print */ |
2449 | u32 logsize; | ||
2366 | int pos = 0; | 2450 | int pos = 0; |
2367 | size_t bufsz = 0; | 2451 | size_t bufsz = 0; |
2368 | 2452 | ||
2369 | if (priv->ucode_type == UCODE_INIT) | 2453 | if (priv->ucode_type == UCODE_INIT) { |
2370 | base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); | 2454 | base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); |
2371 | else | 2455 | logsize = priv->_agn.init_evtlog_size; |
2456 | if (!base) | ||
2457 | base = priv->_agn.init_evtlog_ptr; | ||
2458 | } else { | ||
2372 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | 2459 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); |
2460 | logsize = priv->_agn.inst_evtlog_size; | ||
2461 | if (!base) | ||
2462 | base = priv->_agn.inst_evtlog_ptr; | ||
2463 | } | ||
2373 | 2464 | ||
2374 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { | 2465 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
2375 | IWL_ERR(priv, | 2466 | IWL_ERR(priv, |
@@ -2384,16 +2475,16 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log, | |||
2384 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); | 2475 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); |
2385 | next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); | 2476 | next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); |
2386 | 2477 | ||
2387 | if (capacity > priv->cfg->max_event_log_size) { | 2478 | if (capacity > logsize) { |
2388 | IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n", | 2479 | IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n", |
2389 | capacity, priv->cfg->max_event_log_size); | 2480 | capacity, logsize); |
2390 | capacity = priv->cfg->max_event_log_size; | 2481 | capacity = logsize; |
2391 | } | 2482 | } |
2392 | 2483 | ||
2393 | if (next_entry > priv->cfg->max_event_log_size) { | 2484 | if (next_entry > logsize) { |
2394 | IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n", | 2485 | IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n", |
2395 | next_entry, priv->cfg->max_event_log_size); | 2486 | next_entry, logsize); |
2396 | next_entry = priv->cfg->max_event_log_size; | 2487 | next_entry = logsize; |
2397 | } | 2488 | } |
2398 | 2489 | ||
2399 | size = num_wraps ? capacity : next_entry; | 2490 | size = num_wraps ? capacity : next_entry; |
@@ -2518,8 +2609,6 @@ static void iwl_alive_start(struct iwl_priv *priv) | |||
2518 | 2609 | ||
2519 | if (priv->cfg->ops->hcmd->set_rxon_chain) | 2610 | if (priv->cfg->ops->hcmd->set_rxon_chain) |
2520 | priv->cfg->ops->hcmd->set_rxon_chain(priv); | 2611 | priv->cfg->ops->hcmd->set_rxon_chain(priv); |
2521 | |||
2522 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | ||
2523 | } | 2612 | } |
2524 | 2613 | ||
2525 | /* Configure Bluetooth device coexistence support */ | 2614 | /* Configure Bluetooth device coexistence support */ |
@@ -2934,20 +3023,16 @@ void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
2934 | IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n", | 3023 | IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n", |
2935 | vif->bss_conf.aid, vif->bss_conf.beacon_int); | 3024 | vif->bss_conf.aid, vif->bss_conf.beacon_int); |
2936 | 3025 | ||
2937 | if (vif->bss_conf.assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | 3026 | if (vif->bss_conf.use_short_preamble) |
2938 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | 3027 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
2939 | else | 3028 | else |
2940 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | 3029 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; |
2941 | 3030 | ||
2942 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | 3031 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { |
2943 | if (vif->bss_conf.assoc_capability & | 3032 | if (vif->bss_conf.use_short_slot) |
2944 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | ||
2945 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | 3033 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; |
2946 | else | 3034 | else |
2947 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | 3035 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
2948 | |||
2949 | if (vif->type == NL80211_IFTYPE_ADHOC) | ||
2950 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | ||
2951 | } | 3036 | } |
2952 | 3037 | ||
2953 | iwlcore_commit_rxon(priv); | 3038 | iwlcore_commit_rxon(priv); |
@@ -3173,8 +3258,7 @@ void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
3173 | 3258 | ||
3174 | priv->staging_rxon.assoc_id = 0; | 3259 | priv->staging_rxon.assoc_id = 0; |
3175 | 3260 | ||
3176 | if (vif->bss_conf.assoc_capability & | 3261 | if (vif->bss_conf.use_short_preamble) |
3177 | WLAN_CAPABILITY_SHORT_PREAMBLE) | ||
3178 | priv->staging_rxon.flags |= | 3262 | priv->staging_rxon.flags |= |
3179 | RXON_FLG_SHORT_PREAMBLE_MSK; | 3263 | RXON_FLG_SHORT_PREAMBLE_MSK; |
3180 | else | 3264 | else |
@@ -3182,17 +3266,12 @@ void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
3182 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | 3266 | ~RXON_FLG_SHORT_PREAMBLE_MSK; |
3183 | 3267 | ||
3184 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | 3268 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { |
3185 | if (vif->bss_conf.assoc_capability & | 3269 | if (vif->bss_conf.use_short_slot) |
3186 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | ||
3187 | priv->staging_rxon.flags |= | 3270 | priv->staging_rxon.flags |= |
3188 | RXON_FLG_SHORT_SLOT_MSK; | 3271 | RXON_FLG_SHORT_SLOT_MSK; |
3189 | else | 3272 | else |
3190 | priv->staging_rxon.flags &= | 3273 | priv->staging_rxon.flags &= |
3191 | ~RXON_FLG_SHORT_SLOT_MSK; | 3274 | ~RXON_FLG_SHORT_SLOT_MSK; |
3192 | |||
3193 | if (vif->type == NL80211_IFTYPE_ADHOC) | ||
3194 | priv->staging_rxon.flags &= | ||
3195 | ~RXON_FLG_SHORT_SLOT_MSK; | ||
3196 | } | 3275 | } |
3197 | /* restore RXON assoc */ | 3276 | /* restore RXON assoc */ |
3198 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | 3277 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; |
@@ -3238,17 +3317,9 @@ static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
3238 | return -EOPNOTSUPP; | 3317 | return -EOPNOTSUPP; |
3239 | } | 3318 | } |
3240 | 3319 | ||
3241 | if (sta) { | 3320 | sta_id = iwl_sta_id_or_broadcast(priv, sta); |
3242 | sta_id = iwl_sta_id(sta); | 3321 | if (sta_id == IWL_INVALID_STATION) |
3243 | 3322 | return -EINVAL; | |
3244 | if (sta_id == IWL_INVALID_STATION) { | ||
3245 | IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n", | ||
3246 | sta->addr); | ||
3247 | return -EINVAL; | ||
3248 | } | ||
3249 | } else { | ||
3250 | sta_id = priv->hw_params.bcast_sta_id; | ||
3251 | } | ||
3252 | 3323 | ||
3253 | mutex_lock(&priv->mutex); | 3324 | mutex_lock(&priv->mutex); |
3254 | iwl_scan_cancel_timeout(priv, 100); | 3325 | iwl_scan_cancel_timeout(priv, 100); |
@@ -3419,6 +3490,98 @@ static int iwlagn_mac_sta_add(struct ieee80211_hw *hw, | |||
3419 | return 0; | 3490 | return 0; |
3420 | } | 3491 | } |
3421 | 3492 | ||
3493 | static void iwl_mac_channel_switch(struct ieee80211_hw *hw, | ||
3494 | struct ieee80211_channel_switch *ch_switch) | ||
3495 | { | ||
3496 | struct iwl_priv *priv = hw->priv; | ||
3497 | const struct iwl_channel_info *ch_info; | ||
3498 | struct ieee80211_conf *conf = &hw->conf; | ||
3499 | struct iwl_ht_config *ht_conf = &priv->current_ht_config; | ||
3500 | u16 ch; | ||
3501 | unsigned long flags = 0; | ||
3502 | |||
3503 | IWL_DEBUG_MAC80211(priv, "enter\n"); | ||
3504 | |||
3505 | if (iwl_is_rfkill(priv)) | ||
3506 | goto out_exit; | ||
3507 | |||
3508 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | ||
3509 | test_bit(STATUS_SCANNING, &priv->status)) | ||
3510 | goto out_exit; | ||
3511 | |||
3512 | if (!iwl_is_associated(priv)) | ||
3513 | goto out_exit; | ||
3514 | |||
3515 | /* channel switch in progress */ | ||
3516 | if (priv->switch_rxon.switch_in_progress == true) | ||
3517 | goto out_exit; | ||
3518 | |||
3519 | mutex_lock(&priv->mutex); | ||
3520 | if (priv->cfg->ops->lib->set_channel_switch) { | ||
3521 | |||
3522 | ch = ieee80211_frequency_to_channel( | ||
3523 | ch_switch->channel->center_freq); | ||
3524 | if (le16_to_cpu(priv->active_rxon.channel) != ch) { | ||
3525 | ch_info = iwl_get_channel_info(priv, | ||
3526 | conf->channel->band, | ||
3527 | ch); | ||
3528 | if (!is_channel_valid(ch_info)) { | ||
3529 | IWL_DEBUG_MAC80211(priv, "invalid channel\n"); | ||
3530 | goto out; | ||
3531 | } | ||
3532 | spin_lock_irqsave(&priv->lock, flags); | ||
3533 | |||
3534 | priv->current_ht_config.smps = conf->smps_mode; | ||
3535 | |||
3536 | /* Configure HT40 channels */ | ||
3537 | ht_conf->is_ht = conf_is_ht(conf); | ||
3538 | if (ht_conf->is_ht) { | ||
3539 | if (conf_is_ht40_minus(conf)) { | ||
3540 | ht_conf->extension_chan_offset = | ||
3541 | IEEE80211_HT_PARAM_CHA_SEC_BELOW; | ||
3542 | ht_conf->is_40mhz = true; | ||
3543 | } else if (conf_is_ht40_plus(conf)) { | ||
3544 | ht_conf->extension_chan_offset = | ||
3545 | IEEE80211_HT_PARAM_CHA_SEC_ABOVE; | ||
3546 | ht_conf->is_40mhz = true; | ||
3547 | } else { | ||
3548 | ht_conf->extension_chan_offset = | ||
3549 | IEEE80211_HT_PARAM_CHA_SEC_NONE; | ||
3550 | ht_conf->is_40mhz = false; | ||
3551 | } | ||
3552 | } else | ||
3553 | ht_conf->is_40mhz = false; | ||
3554 | |||
3555 | /* if we are switching from ht to 2.4 clear flags | ||
3556 | * from any ht related info since 2.4 does not | ||
3557 | * support ht */ | ||
3558 | if ((le16_to_cpu(priv->staging_rxon.channel) != ch)) | ||
3559 | priv->staging_rxon.flags = 0; | ||
3560 | |||
3561 | iwl_set_rxon_channel(priv, conf->channel); | ||
3562 | iwl_set_rxon_ht(priv, ht_conf); | ||
3563 | iwl_set_flags_for_band(priv, conf->channel->band, | ||
3564 | priv->vif); | ||
3565 | spin_unlock_irqrestore(&priv->lock, flags); | ||
3566 | |||
3567 | iwl_set_rate(priv); | ||
3568 | /* | ||
3569 | * at this point, staging_rxon has the | ||
3570 | * configuration for channel switch | ||
3571 | */ | ||
3572 | if (priv->cfg->ops->lib->set_channel_switch(priv, | ||
3573 | ch_switch)) | ||
3574 | priv->switch_rxon.switch_in_progress = false; | ||
3575 | } | ||
3576 | } | ||
3577 | out: | ||
3578 | mutex_unlock(&priv->mutex); | ||
3579 | out_exit: | ||
3580 | if (!priv->switch_rxon.switch_in_progress) | ||
3581 | ieee80211_chswitch_done(priv->vif, false); | ||
3582 | IWL_DEBUG_MAC80211(priv, "leave\n"); | ||
3583 | } | ||
3584 | |||
3422 | /***************************************************************************** | 3585 | /***************************************************************************** |
3423 | * | 3586 | * |
3424 | * driver setup and teardown | 3587 | * driver setup and teardown |
@@ -3590,6 +3753,7 @@ static struct ieee80211_ops iwl_hw_ops = { | |||
3590 | .sta_notify = iwl_mac_sta_notify, | 3753 | .sta_notify = iwl_mac_sta_notify, |
3591 | .sta_add = iwlagn_mac_sta_add, | 3754 | .sta_add = iwlagn_mac_sta_add, |
3592 | .sta_remove = iwl_mac_sta_remove, | 3755 | .sta_remove = iwl_mac_sta_remove, |
3756 | .channel_switch = iwl_mac_channel_switch, | ||
3593 | }; | 3757 | }; |
3594 | 3758 | ||
3595 | static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | 3759 | static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
@@ -3600,6 +3764,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3600 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); | 3764 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
3601 | unsigned long flags; | 3765 | unsigned long flags; |
3602 | u16 pci_cmd; | 3766 | u16 pci_cmd; |
3767 | u8 perm_addr[ETH_ALEN]; | ||
3603 | 3768 | ||
3604 | /************************ | 3769 | /************************ |
3605 | * 1. Allocating HW data | 3770 | * 1. Allocating HW data |
@@ -3629,9 +3794,6 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3629 | priv->pci_dev = pdev; | 3794 | priv->pci_dev = pdev; |
3630 | priv->inta_mask = CSR_INI_SET_MASK; | 3795 | priv->inta_mask = CSR_INI_SET_MASK; |
3631 | 3796 | ||
3632 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
3633 | atomic_set(&priv->restrict_refcnt, 0); | ||
3634 | #endif | ||
3635 | if (iwl_alloc_traffic_mem(priv)) | 3797 | if (iwl_alloc_traffic_mem(priv)) |
3636 | IWL_ERR(priv, "Not enough memory to generate traffic log\n"); | 3798 | IWL_ERR(priv, "Not enough memory to generate traffic log\n"); |
3637 | 3799 | ||
@@ -3720,9 +3882,9 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3720 | goto out_free_eeprom; | 3882 | goto out_free_eeprom; |
3721 | 3883 | ||
3722 | /* extract MAC Address */ | 3884 | /* extract MAC Address */ |
3723 | iwl_eeprom_get_mac(priv, priv->mac_addr); | 3885 | iwl_eeprom_get_mac(priv, perm_addr); |
3724 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr); | 3886 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", perm_addr); |
3725 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | 3887 | SET_IEEE80211_PERM_ADDR(priv->hw, perm_addr); |
3726 | 3888 | ||
3727 | /************************ | 3889 | /************************ |
3728 | * 5. Setup HW constants | 3890 | * 5. Setup HW constants |
@@ -3989,6 +4151,47 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = { | |||
3989 | {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)}, | 4151 | {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)}, |
3990 | {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)}, | 4152 | {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)}, |
3991 | {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)}, | 4153 | {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)}, |
4154 | {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)}, | ||
4155 | {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)}, | ||
4156 | {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)}, | ||
4157 | {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)}, | ||
4158 | {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)}, | ||
4159 | {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)}, | ||
4160 | {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)}, | ||
4161 | {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)}, | ||
4162 | {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)}, | ||
4163 | {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)}, | ||
4164 | {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)}, | ||
4165 | |||
4166 | /* 6x00 Series Gen2b */ | ||
4167 | {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)}, | ||
4168 | {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)}, | ||
4169 | {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)}, | ||
4170 | {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)}, | ||
4171 | {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)}, | ||
4172 | {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)}, | ||
4173 | {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)}, | ||
4174 | {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)}, | ||
4175 | {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)}, | ||
4176 | {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)}, | ||
4177 | {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)}, | ||
4178 | {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)}, | ||
4179 | {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)}, | ||
4180 | {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)}, | ||
4181 | {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)}, | ||
4182 | {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)}, | ||
4183 | {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)}, | ||
4184 | {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)}, | ||
4185 | {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)}, | ||
4186 | {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)}, | ||
4187 | {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)}, | ||
4188 | {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)}, | ||
4189 | {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)}, | ||
4190 | {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)}, | ||
4191 | {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)}, | ||
4192 | {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)}, | ||
4193 | {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)}, | ||
4194 | {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)}, | ||
3992 | 4195 | ||
3993 | /* 6x50 WiFi/WiMax Series */ | 4196 | /* 6x50 WiFi/WiMax Series */ |
3994 | {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)}, | 4197 | {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)}, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.h b/drivers/net/wireless/iwlwifi/iwl-agn.h index 2d748053358e..5c32777b0a49 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn.h | |||
@@ -65,6 +65,33 @@ | |||
65 | 65 | ||
66 | #include "iwl-dev.h" | 66 | #include "iwl-dev.h" |
67 | 67 | ||
68 | /* configuration for the _agn devices */ | ||
69 | extern struct iwl_cfg iwl4965_agn_cfg; | ||
70 | extern struct iwl_cfg iwl5300_agn_cfg; | ||
71 | extern struct iwl_cfg iwl5100_agn_cfg; | ||
72 | extern struct iwl_cfg iwl5350_agn_cfg; | ||
73 | extern struct iwl_cfg iwl5100_bgn_cfg; | ||
74 | extern struct iwl_cfg iwl5100_abg_cfg; | ||
75 | extern struct iwl_cfg iwl5150_agn_cfg; | ||
76 | extern struct iwl_cfg iwl5150_abg_cfg; | ||
77 | extern struct iwl_cfg iwl6000g2a_2agn_cfg; | ||
78 | extern struct iwl_cfg iwl6000g2a_2abg_cfg; | ||
79 | extern struct iwl_cfg iwl6000g2a_2bg_cfg; | ||
80 | extern struct iwl_cfg iwl6000g2b_bgn_cfg; | ||
81 | extern struct iwl_cfg iwl6000g2b_bg_cfg; | ||
82 | extern struct iwl_cfg iwl6000g2b_2agn_cfg; | ||
83 | extern struct iwl_cfg iwl6000g2b_2abg_cfg; | ||
84 | extern struct iwl_cfg iwl6000g2b_2bgn_cfg; | ||
85 | extern struct iwl_cfg iwl6000g2b_2bg_cfg; | ||
86 | extern struct iwl_cfg iwl6000i_2agn_cfg; | ||
87 | extern struct iwl_cfg iwl6000i_2abg_cfg; | ||
88 | extern struct iwl_cfg iwl6000i_2bg_cfg; | ||
89 | extern struct iwl_cfg iwl6000_3agn_cfg; | ||
90 | extern struct iwl_cfg iwl6050_2agn_cfg; | ||
91 | extern struct iwl_cfg iwl6050_2abg_cfg; | ||
92 | extern struct iwl_cfg iwl1000_bgn_cfg; | ||
93 | extern struct iwl_cfg iwl1000_bg_cfg; | ||
94 | |||
68 | extern struct iwl_mod_params iwlagn_mod_params; | 95 | extern struct iwl_mod_params iwlagn_mod_params; |
69 | extern struct iwl_hcmd_ops iwlagn_hcmd; | 96 | extern struct iwl_hcmd_ops iwlagn_hcmd; |
70 | extern struct iwl_hcmd_utils_ops iwlagn_hcmd_utils; | 97 | extern struct iwl_hcmd_utils_ops iwlagn_hcmd_utils; |
@@ -93,6 +120,8 @@ int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
93 | int iwlagn_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, | 120 | int iwlagn_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, |
94 | u16 ssn_idx, u8 tx_fifo); | 121 | u16 ssn_idx, u8 tx_fifo); |
95 | void iwlagn_txq_set_sched(struct iwl_priv *priv, u32 mask); | 122 | void iwlagn_txq_set_sched(struct iwl_priv *priv, u32 mask); |
123 | void iwl_free_tfds_in_queue(struct iwl_priv *priv, | ||
124 | int sta_id, int tid, int freed); | ||
96 | 125 | ||
97 | /* uCode */ | 126 | /* uCode */ |
98 | int iwlagn_load_ucode(struct iwl_priv *priv); | 127 | int iwlagn_load_ucode(struct iwl_priv *priv); |
@@ -102,6 +131,7 @@ void iwlagn_rx_calib_complete(struct iwl_priv *priv, | |||
102 | struct iwl_rx_mem_buffer *rxb); | 131 | struct iwl_rx_mem_buffer *rxb); |
103 | void iwlagn_init_alive_start(struct iwl_priv *priv); | 132 | void iwlagn_init_alive_start(struct iwl_priv *priv); |
104 | int iwlagn_alive_notify(struct iwl_priv *priv); | 133 | int iwlagn_alive_notify(struct iwl_priv *priv); |
134 | int iwl_verify_ucode(struct iwl_priv *priv); | ||
105 | 135 | ||
106 | /* lib */ | 136 | /* lib */ |
107 | void iwl_check_abort_status(struct iwl_priv *priv, | 137 | void iwl_check_abort_status(struct iwl_priv *priv, |
@@ -178,4 +208,8 @@ void iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif); | |||
178 | int iwlagn_manage_ibss_station(struct iwl_priv *priv, | 208 | int iwlagn_manage_ibss_station(struct iwl_priv *priv, |
179 | struct ieee80211_vif *vif, bool add); | 209 | struct ieee80211_vif *vif, bool add); |
180 | 210 | ||
211 | /* hcmd */ | ||
212 | int iwlagn_send_rxon_assoc(struct iwl_priv *priv); | ||
213 | int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant); | ||
214 | |||
181 | #endif /* __iwl_agn_h__ */ | 215 | #endif /* __iwl_agn_h__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h index 9aab020c474b..c579965ec556 100644 --- a/drivers/net/wireless/iwlwifi/iwl-commands.h +++ b/drivers/net/wireless/iwlwifi/iwl-commands.h | |||
@@ -95,7 +95,7 @@ enum { | |||
95 | 95 | ||
96 | /* Multi-Station support */ | 96 | /* Multi-Station support */ |
97 | REPLY_ADD_STA = 0x18, | 97 | REPLY_ADD_STA = 0x18, |
98 | REPLY_REMOVE_STA = 0x19, /* not used */ | 98 | REPLY_REMOVE_STA = 0x19, |
99 | REPLY_REMOVE_ALL_STA = 0x1a, /* not used */ | 99 | REPLY_REMOVE_ALL_STA = 0x1a, /* not used */ |
100 | 100 | ||
101 | /* Security */ | 101 | /* Security */ |
@@ -227,7 +227,7 @@ struct iwl_cmd_header { | |||
227 | 227 | ||
228 | /* command or response/notification data follows immediately */ | 228 | /* command or response/notification data follows immediately */ |
229 | u8 data[0]; | 229 | u8 data[0]; |
230 | } __attribute__ ((packed)); | 230 | } __packed; |
231 | 231 | ||
232 | 232 | ||
233 | /** | 233 | /** |
@@ -247,7 +247,7 @@ struct iwl_cmd_header { | |||
247 | struct iwl3945_tx_power { | 247 | struct iwl3945_tx_power { |
248 | u8 tx_gain; /* gain for analog radio */ | 248 | u8 tx_gain; /* gain for analog radio */ |
249 | u8 dsp_atten; /* gain for DSP */ | 249 | u8 dsp_atten; /* gain for DSP */ |
250 | } __attribute__ ((packed)); | 250 | } __packed; |
251 | 251 | ||
252 | /** | 252 | /** |
253 | * struct iwl3945_power_per_rate | 253 | * struct iwl3945_power_per_rate |
@@ -258,7 +258,7 @@ struct iwl3945_power_per_rate { | |||
258 | u8 rate; /* plcp */ | 258 | u8 rate; /* plcp */ |
259 | struct iwl3945_tx_power tpc; | 259 | struct iwl3945_tx_power tpc; |
260 | u8 reserved; | 260 | u8 reserved; |
261 | } __attribute__ ((packed)); | 261 | } __packed; |
262 | 262 | ||
263 | /** | 263 | /** |
264 | * iwlagn rate_n_flags bit fields | 264 | * iwlagn rate_n_flags bit fields |
@@ -389,7 +389,7 @@ union iwl4965_tx_power_dual_stream { | |||
389 | */ | 389 | */ |
390 | struct tx_power_dual_stream { | 390 | struct tx_power_dual_stream { |
391 | __le32 dw; | 391 | __le32 dw; |
392 | } __attribute__ ((packed)); | 392 | } __packed; |
393 | 393 | ||
394 | /** | 394 | /** |
395 | * struct iwl4965_tx_power_db | 395 | * struct iwl4965_tx_power_db |
@@ -398,7 +398,7 @@ struct tx_power_dual_stream { | |||
398 | */ | 398 | */ |
399 | struct iwl4965_tx_power_db { | 399 | struct iwl4965_tx_power_db { |
400 | struct tx_power_dual_stream power_tbl[POWER_TABLE_NUM_ENTRIES]; | 400 | struct tx_power_dual_stream power_tbl[POWER_TABLE_NUM_ENTRIES]; |
401 | } __attribute__ ((packed)); | 401 | } __packed; |
402 | 402 | ||
403 | /** | 403 | /** |
404 | * Command REPLY_TX_POWER_DBM_CMD = 0x98 | 404 | * Command REPLY_TX_POWER_DBM_CMD = 0x98 |
@@ -412,7 +412,7 @@ struct iwl5000_tx_power_dbm_cmd { | |||
412 | u8 flags; | 412 | u8 flags; |
413 | s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ | 413 | s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */ |
414 | u8 reserved; | 414 | u8 reserved; |
415 | } __attribute__ ((packed)); | 415 | } __packed; |
416 | 416 | ||
417 | /** | 417 | /** |
418 | * Command TX_ANT_CONFIGURATION_CMD = 0x98 | 418 | * Command TX_ANT_CONFIGURATION_CMD = 0x98 |
@@ -422,7 +422,7 @@ struct iwl5000_tx_power_dbm_cmd { | |||
422 | */ | 422 | */ |
423 | struct iwl_tx_ant_config_cmd { | 423 | struct iwl_tx_ant_config_cmd { |
424 | __le32 valid; | 424 | __le32 valid; |
425 | } __attribute__ ((packed)); | 425 | } __packed; |
426 | 426 | ||
427 | /****************************************************************************** | 427 | /****************************************************************************** |
428 | * (0a) | 428 | * (0a) |
@@ -478,7 +478,7 @@ struct iwl_init_alive_resp { | |||
478 | __le32 therm_r4[2]; /* signed */ | 478 | __le32 therm_r4[2]; /* signed */ |
479 | __le32 tx_atten[5][2]; /* signed MIMO gain comp, 5 freq groups, | 479 | __le32 tx_atten[5][2]; /* signed MIMO gain comp, 5 freq groups, |
480 | * 2 Tx chains */ | 480 | * 2 Tx chains */ |
481 | } __attribute__ ((packed)); | 481 | } __packed; |
482 | 482 | ||
483 | 483 | ||
484 | /** | 484 | /** |
@@ -570,7 +570,7 @@ struct iwl_alive_resp { | |||
570 | __le32 error_event_table_ptr; /* SRAM address for error log */ | 570 | __le32 error_event_table_ptr; /* SRAM address for error log */ |
571 | __le32 timestamp; | 571 | __le32 timestamp; |
572 | __le32 is_valid; | 572 | __le32 is_valid; |
573 | } __attribute__ ((packed)); | 573 | } __packed; |
574 | 574 | ||
575 | /* | 575 | /* |
576 | * REPLY_ERROR = 0x2 (response only, not a command) | 576 | * REPLY_ERROR = 0x2 (response only, not a command) |
@@ -582,7 +582,7 @@ struct iwl_error_resp { | |||
582 | __le16 bad_cmd_seq_num; | 582 | __le16 bad_cmd_seq_num; |
583 | __le32 error_info; | 583 | __le32 error_info; |
584 | __le64 timestamp; | 584 | __le64 timestamp; |
585 | } __attribute__ ((packed)); | 585 | } __packed; |
586 | 586 | ||
587 | /****************************************************************************** | 587 | /****************************************************************************** |
588 | * (1) | 588 | * (1) |
@@ -718,7 +718,7 @@ struct iwl3945_rxon_cmd { | |||
718 | __le32 filter_flags; | 718 | __le32 filter_flags; |
719 | __le16 channel; | 719 | __le16 channel; |
720 | __le16 reserved5; | 720 | __le16 reserved5; |
721 | } __attribute__ ((packed)); | 721 | } __packed; |
722 | 722 | ||
723 | struct iwl4965_rxon_cmd { | 723 | struct iwl4965_rxon_cmd { |
724 | u8 node_addr[6]; | 724 | u8 node_addr[6]; |
@@ -738,7 +738,7 @@ struct iwl4965_rxon_cmd { | |||
738 | __le16 channel; | 738 | __le16 channel; |
739 | u8 ofdm_ht_single_stream_basic_rates; | 739 | u8 ofdm_ht_single_stream_basic_rates; |
740 | u8 ofdm_ht_dual_stream_basic_rates; | 740 | u8 ofdm_ht_dual_stream_basic_rates; |
741 | } __attribute__ ((packed)); | 741 | } __packed; |
742 | 742 | ||
743 | /* 5000 HW just extend this command */ | 743 | /* 5000 HW just extend this command */ |
744 | struct iwl_rxon_cmd { | 744 | struct iwl_rxon_cmd { |
@@ -763,7 +763,7 @@ struct iwl_rxon_cmd { | |||
763 | u8 reserved5; | 763 | u8 reserved5; |
764 | __le16 acquisition_data; | 764 | __le16 acquisition_data; |
765 | __le16 reserved6; | 765 | __le16 reserved6; |
766 | } __attribute__ ((packed)); | 766 | } __packed; |
767 | 767 | ||
768 | /* | 768 | /* |
769 | * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) | 769 | * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) |
@@ -774,7 +774,7 @@ struct iwl3945_rxon_assoc_cmd { | |||
774 | u8 ofdm_basic_rates; | 774 | u8 ofdm_basic_rates; |
775 | u8 cck_basic_rates; | 775 | u8 cck_basic_rates; |
776 | __le16 reserved; | 776 | __le16 reserved; |
777 | } __attribute__ ((packed)); | 777 | } __packed; |
778 | 778 | ||
779 | struct iwl4965_rxon_assoc_cmd { | 779 | struct iwl4965_rxon_assoc_cmd { |
780 | __le32 flags; | 780 | __le32 flags; |
@@ -785,7 +785,7 @@ struct iwl4965_rxon_assoc_cmd { | |||
785 | u8 ofdm_ht_dual_stream_basic_rates; | 785 | u8 ofdm_ht_dual_stream_basic_rates; |
786 | __le16 rx_chain_select_flags; | 786 | __le16 rx_chain_select_flags; |
787 | __le16 reserved; | 787 | __le16 reserved; |
788 | } __attribute__ ((packed)); | 788 | } __packed; |
789 | 789 | ||
790 | struct iwl5000_rxon_assoc_cmd { | 790 | struct iwl5000_rxon_assoc_cmd { |
791 | __le32 flags; | 791 | __le32 flags; |
@@ -800,7 +800,7 @@ struct iwl5000_rxon_assoc_cmd { | |||
800 | __le16 rx_chain_select_flags; | 800 | __le16 rx_chain_select_flags; |
801 | __le16 acquisition_data; | 801 | __le16 acquisition_data; |
802 | __le32 reserved3; | 802 | __le32 reserved3; |
803 | } __attribute__ ((packed)); | 803 | } __packed; |
804 | 804 | ||
805 | #define IWL_CONN_MAX_LISTEN_INTERVAL 10 | 805 | #define IWL_CONN_MAX_LISTEN_INTERVAL 10 |
806 | #define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */ | 806 | #define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */ |
@@ -816,7 +816,7 @@ struct iwl_rxon_time_cmd { | |||
816 | __le32 beacon_init_val; | 816 | __le32 beacon_init_val; |
817 | __le16 listen_interval; | 817 | __le16 listen_interval; |
818 | __le16 reserved; | 818 | __le16 reserved; |
819 | } __attribute__ ((packed)); | 819 | } __packed; |
820 | 820 | ||
821 | /* | 821 | /* |
822 | * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) | 822 | * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) |
@@ -829,7 +829,7 @@ struct iwl3945_channel_switch_cmd { | |||
829 | __le32 rxon_filter_flags; | 829 | __le32 rxon_filter_flags; |
830 | __le32 switch_time; | 830 | __le32 switch_time; |
831 | struct iwl3945_power_per_rate power[IWL_MAX_RATES]; | 831 | struct iwl3945_power_per_rate power[IWL_MAX_RATES]; |
832 | } __attribute__ ((packed)); | 832 | } __packed; |
833 | 833 | ||
834 | struct iwl4965_channel_switch_cmd { | 834 | struct iwl4965_channel_switch_cmd { |
835 | u8 band; | 835 | u8 band; |
@@ -839,7 +839,7 @@ struct iwl4965_channel_switch_cmd { | |||
839 | __le32 rxon_filter_flags; | 839 | __le32 rxon_filter_flags; |
840 | __le32 switch_time; | 840 | __le32 switch_time; |
841 | struct iwl4965_tx_power_db tx_power; | 841 | struct iwl4965_tx_power_db tx_power; |
842 | } __attribute__ ((packed)); | 842 | } __packed; |
843 | 843 | ||
844 | /** | 844 | /** |
845 | * struct iwl5000_channel_switch_cmd | 845 | * struct iwl5000_channel_switch_cmd |
@@ -860,7 +860,7 @@ struct iwl5000_channel_switch_cmd { | |||
860 | __le32 rxon_filter_flags; | 860 | __le32 rxon_filter_flags; |
861 | __le32 switch_time; | 861 | __le32 switch_time; |
862 | __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; | 862 | __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; |
863 | } __attribute__ ((packed)); | 863 | } __packed; |
864 | 864 | ||
865 | /** | 865 | /** |
866 | * struct iwl6000_channel_switch_cmd | 866 | * struct iwl6000_channel_switch_cmd |
@@ -881,7 +881,7 @@ struct iwl6000_channel_switch_cmd { | |||
881 | __le32 rxon_filter_flags; | 881 | __le32 rxon_filter_flags; |
882 | __le32 switch_time; | 882 | __le32 switch_time; |
883 | __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; | 883 | __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES]; |
884 | } __attribute__ ((packed)); | 884 | } __packed; |
885 | 885 | ||
886 | /* | 886 | /* |
887 | * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command) | 887 | * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command) |
@@ -890,7 +890,7 @@ struct iwl_csa_notification { | |||
890 | __le16 band; | 890 | __le16 band; |
891 | __le16 channel; | 891 | __le16 channel; |
892 | __le32 status; /* 0 - OK, 1 - fail */ | 892 | __le32 status; /* 0 - OK, 1 - fail */ |
893 | } __attribute__ ((packed)); | 893 | } __packed; |
894 | 894 | ||
895 | /****************************************************************************** | 895 | /****************************************************************************** |
896 | * (2) | 896 | * (2) |
@@ -920,7 +920,7 @@ struct iwl_ac_qos { | |||
920 | u8 aifsn; | 920 | u8 aifsn; |
921 | u8 reserved1; | 921 | u8 reserved1; |
922 | __le16 edca_txop; | 922 | __le16 edca_txop; |
923 | } __attribute__ ((packed)); | 923 | } __packed; |
924 | 924 | ||
925 | /* QoS flags defines */ | 925 | /* QoS flags defines */ |
926 | #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01) | 926 | #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01) |
@@ -939,7 +939,7 @@ struct iwl_ac_qos { | |||
939 | struct iwl_qosparam_cmd { | 939 | struct iwl_qosparam_cmd { |
940 | __le32 qos_flags; | 940 | __le32 qos_flags; |
941 | struct iwl_ac_qos ac[AC_NUM]; | 941 | struct iwl_ac_qos ac[AC_NUM]; |
942 | } __attribute__ ((packed)); | 942 | } __packed; |
943 | 943 | ||
944 | /****************************************************************************** | 944 | /****************************************************************************** |
945 | * (3) | 945 | * (3) |
@@ -952,7 +952,6 @@ struct iwl_qosparam_cmd { | |||
952 | 952 | ||
953 | /* Special, dedicated locations within device's station table */ | 953 | /* Special, dedicated locations within device's station table */ |
954 | #define IWL_AP_ID 0 | 954 | #define IWL_AP_ID 0 |
955 | #define IWL_MULTICAST_ID 1 | ||
956 | #define IWL_STA_ID 2 | 955 | #define IWL_STA_ID 2 |
957 | #define IWL3945_BROADCAST_ID 24 | 956 | #define IWL3945_BROADCAST_ID 24 |
958 | #define IWL3945_STATION_COUNT 25 | 957 | #define IWL3945_STATION_COUNT 25 |
@@ -1015,7 +1014,7 @@ struct iwl4965_keyinfo { | |||
1015 | u8 key_offset; | 1014 | u8 key_offset; |
1016 | u8 reserved2; | 1015 | u8 reserved2; |
1017 | u8 key[16]; /* 16-byte unicast decryption key */ | 1016 | u8 key[16]; /* 16-byte unicast decryption key */ |
1018 | } __attribute__ ((packed)); | 1017 | } __packed; |
1019 | 1018 | ||
1020 | /* 5000 */ | 1019 | /* 5000 */ |
1021 | struct iwl_keyinfo { | 1020 | struct iwl_keyinfo { |
@@ -1029,7 +1028,7 @@ struct iwl_keyinfo { | |||
1029 | __le64 tx_secur_seq_cnt; | 1028 | __le64 tx_secur_seq_cnt; |
1030 | __le64 hw_tkip_mic_rx_key; | 1029 | __le64 hw_tkip_mic_rx_key; |
1031 | __le64 hw_tkip_mic_tx_key; | 1030 | __le64 hw_tkip_mic_tx_key; |
1032 | } __attribute__ ((packed)); | 1031 | } __packed; |
1033 | 1032 | ||
1034 | /** | 1033 | /** |
1035 | * struct sta_id_modify | 1034 | * struct sta_id_modify |
@@ -1049,7 +1048,7 @@ struct sta_id_modify { | |||
1049 | u8 sta_id; | 1048 | u8 sta_id; |
1050 | u8 modify_mask; | 1049 | u8 modify_mask; |
1051 | __le16 reserved2; | 1050 | __le16 reserved2; |
1052 | } __attribute__ ((packed)); | 1051 | } __packed; |
1053 | 1052 | ||
1054 | /* | 1053 | /* |
1055 | * REPLY_ADD_STA = 0x18 (command) | 1054 | * REPLY_ADD_STA = 0x18 (command) |
@@ -1103,7 +1102,7 @@ struct iwl3945_addsta_cmd { | |||
1103 | /* Starting Sequence Number for added block-ack support. | 1102 | /* Starting Sequence Number for added block-ack support. |
1104 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | 1103 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ |
1105 | __le16 add_immediate_ba_ssn; | 1104 | __le16 add_immediate_ba_ssn; |
1106 | } __attribute__ ((packed)); | 1105 | } __packed; |
1107 | 1106 | ||
1108 | struct iwl4965_addsta_cmd { | 1107 | struct iwl4965_addsta_cmd { |
1109 | u8 mode; /* 1: modify existing, 0: add new station */ | 1108 | u8 mode; /* 1: modify existing, 0: add new station */ |
@@ -1140,7 +1139,7 @@ struct iwl4965_addsta_cmd { | |||
1140 | __le16 sleep_tx_count; | 1139 | __le16 sleep_tx_count; |
1141 | 1140 | ||
1142 | __le16 reserved2; | 1141 | __le16 reserved2; |
1143 | } __attribute__ ((packed)); | 1142 | } __packed; |
1144 | 1143 | ||
1145 | /* 5000 */ | 1144 | /* 5000 */ |
1146 | struct iwl_addsta_cmd { | 1145 | struct iwl_addsta_cmd { |
@@ -1178,7 +1177,7 @@ struct iwl_addsta_cmd { | |||
1178 | __le16 sleep_tx_count; | 1177 | __le16 sleep_tx_count; |
1179 | 1178 | ||
1180 | __le16 reserved2; | 1179 | __le16 reserved2; |
1181 | } __attribute__ ((packed)); | 1180 | } __packed; |
1182 | 1181 | ||
1183 | 1182 | ||
1184 | #define ADD_STA_SUCCESS_MSK 0x1 | 1183 | #define ADD_STA_SUCCESS_MSK 0x1 |
@@ -1190,7 +1189,7 @@ struct iwl_addsta_cmd { | |||
1190 | */ | 1189 | */ |
1191 | struct iwl_add_sta_resp { | 1190 | struct iwl_add_sta_resp { |
1192 | u8 status; /* ADD_STA_* */ | 1191 | u8 status; /* ADD_STA_* */ |
1193 | } __attribute__ ((packed)); | 1192 | } __packed; |
1194 | 1193 | ||
1195 | #define REM_STA_SUCCESS_MSK 0x1 | 1194 | #define REM_STA_SUCCESS_MSK 0x1 |
1196 | /* | 1195 | /* |
@@ -1198,7 +1197,7 @@ struct iwl_add_sta_resp { | |||
1198 | */ | 1197 | */ |
1199 | struct iwl_rem_sta_resp { | 1198 | struct iwl_rem_sta_resp { |
1200 | u8 status; | 1199 | u8 status; |
1201 | } __attribute__ ((packed)); | 1200 | } __packed; |
1202 | 1201 | ||
1203 | /* | 1202 | /* |
1204 | * REPLY_REM_STA = 0x19 (command) | 1203 | * REPLY_REM_STA = 0x19 (command) |
@@ -1208,7 +1207,7 @@ struct iwl_rem_sta_cmd { | |||
1208 | u8 reserved[3]; | 1207 | u8 reserved[3]; |
1209 | u8 addr[ETH_ALEN]; /* MAC addr of the first station */ | 1208 | u8 addr[ETH_ALEN]; /* MAC addr of the first station */ |
1210 | u8 reserved2[2]; | 1209 | u8 reserved2[2]; |
1211 | } __attribute__ ((packed)); | 1210 | } __packed; |
1212 | 1211 | ||
1213 | /* | 1212 | /* |
1214 | * REPLY_WEP_KEY = 0x20 | 1213 | * REPLY_WEP_KEY = 0x20 |
@@ -1220,7 +1219,7 @@ struct iwl_wep_key { | |||
1220 | u8 key_size; | 1219 | u8 key_size; |
1221 | u8 reserved2[3]; | 1220 | u8 reserved2[3]; |
1222 | u8 key[16]; | 1221 | u8 key[16]; |
1223 | } __attribute__ ((packed)); | 1222 | } __packed; |
1224 | 1223 | ||
1225 | struct iwl_wep_cmd { | 1224 | struct iwl_wep_cmd { |
1226 | u8 num_keys; | 1225 | u8 num_keys; |
@@ -1228,7 +1227,7 @@ struct iwl_wep_cmd { | |||
1228 | u8 flags; | 1227 | u8 flags; |
1229 | u8 reserved; | 1228 | u8 reserved; |
1230 | struct iwl_wep_key key[0]; | 1229 | struct iwl_wep_key key[0]; |
1231 | } __attribute__ ((packed)); | 1230 | } __packed; |
1232 | 1231 | ||
1233 | #define WEP_KEY_WEP_TYPE 1 | 1232 | #define WEP_KEY_WEP_TYPE 1 |
1234 | #define WEP_KEYS_MAX 4 | 1233 | #define WEP_KEYS_MAX 4 |
@@ -1282,7 +1281,7 @@ struct iwl3945_rx_frame_stats { | |||
1282 | __le16 sig_avg; | 1281 | __le16 sig_avg; |
1283 | __le16 noise_diff; | 1282 | __le16 noise_diff; |
1284 | u8 payload[0]; | 1283 | u8 payload[0]; |
1285 | } __attribute__ ((packed)); | 1284 | } __packed; |
1286 | 1285 | ||
1287 | struct iwl3945_rx_frame_hdr { | 1286 | struct iwl3945_rx_frame_hdr { |
1288 | __le16 channel; | 1287 | __le16 channel; |
@@ -1291,13 +1290,13 @@ struct iwl3945_rx_frame_hdr { | |||
1291 | u8 rate; | 1290 | u8 rate; |
1292 | __le16 len; | 1291 | __le16 len; |
1293 | u8 payload[0]; | 1292 | u8 payload[0]; |
1294 | } __attribute__ ((packed)); | 1293 | } __packed; |
1295 | 1294 | ||
1296 | struct iwl3945_rx_frame_end { | 1295 | struct iwl3945_rx_frame_end { |
1297 | __le32 status; | 1296 | __le32 status; |
1298 | __le64 timestamp; | 1297 | __le64 timestamp; |
1299 | __le32 beacon_timestamp; | 1298 | __le32 beacon_timestamp; |
1300 | } __attribute__ ((packed)); | 1299 | } __packed; |
1301 | 1300 | ||
1302 | /* | 1301 | /* |
1303 | * REPLY_3945_RX = 0x1b (response only, not a command) | 1302 | * REPLY_3945_RX = 0x1b (response only, not a command) |
@@ -1311,7 +1310,7 @@ struct iwl3945_rx_frame { | |||
1311 | struct iwl3945_rx_frame_stats stats; | 1310 | struct iwl3945_rx_frame_stats stats; |
1312 | struct iwl3945_rx_frame_hdr hdr; | 1311 | struct iwl3945_rx_frame_hdr hdr; |
1313 | struct iwl3945_rx_frame_end end; | 1312 | struct iwl3945_rx_frame_end end; |
1314 | } __attribute__ ((packed)); | 1313 | } __packed; |
1315 | 1314 | ||
1316 | #define IWL39_RX_FRAME_SIZE (4 + sizeof(struct iwl3945_rx_frame)) | 1315 | #define IWL39_RX_FRAME_SIZE (4 + sizeof(struct iwl3945_rx_frame)) |
1317 | 1316 | ||
@@ -1327,7 +1326,7 @@ struct iwl4965_rx_non_cfg_phy { | |||
1327 | __le16 agc_info; /* agc code 0:6, agc dB 7:13, reserved 14:15 */ | 1326 | __le16 agc_info; /* agc code 0:6, agc dB 7:13, reserved 14:15 */ |
1328 | u8 rssi_info[6]; /* we use even entries, 0/2/4 for A/B/C rssi */ | 1327 | u8 rssi_info[6]; /* we use even entries, 0/2/4 for A/B/C rssi */ |
1329 | u8 pad[0]; | 1328 | u8 pad[0]; |
1330 | } __attribute__ ((packed)); | 1329 | } __packed; |
1331 | 1330 | ||
1332 | 1331 | ||
1333 | #define IWL50_RX_RES_PHY_CNT 8 | 1332 | #define IWL50_RX_RES_PHY_CNT 8 |
@@ -1345,7 +1344,7 @@ struct iwl4965_rx_non_cfg_phy { | |||
1345 | 1344 | ||
1346 | struct iwl5000_non_cfg_phy { | 1345 | struct iwl5000_non_cfg_phy { |
1347 | __le32 non_cfg_phy[IWL50_RX_RES_PHY_CNT]; /* up to 8 phy entries */ | 1346 | __le32 non_cfg_phy[IWL50_RX_RES_PHY_CNT]; /* up to 8 phy entries */ |
1348 | } __attribute__ ((packed)); | 1347 | } __packed; |
1349 | 1348 | ||
1350 | 1349 | ||
1351 | /* | 1350 | /* |
@@ -1365,12 +1364,12 @@ struct iwl_rx_phy_res { | |||
1365 | __le32 rate_n_flags; /* RATE_MCS_* */ | 1364 | __le32 rate_n_flags; /* RATE_MCS_* */ |
1366 | __le16 byte_count; /* frame's byte-count */ | 1365 | __le16 byte_count; /* frame's byte-count */ |
1367 | __le16 reserved3; | 1366 | __le16 reserved3; |
1368 | } __attribute__ ((packed)); | 1367 | } __packed; |
1369 | 1368 | ||
1370 | struct iwl4965_rx_mpdu_res_start { | 1369 | struct iwl4965_rx_mpdu_res_start { |
1371 | __le16 byte_count; | 1370 | __le16 byte_count; |
1372 | __le16 reserved; | 1371 | __le16 reserved; |
1373 | } __attribute__ ((packed)); | 1372 | } __packed; |
1374 | 1373 | ||
1375 | 1374 | ||
1376 | /****************************************************************************** | 1375 | /****************************************************************************** |
@@ -1557,7 +1556,7 @@ struct iwl3945_tx_cmd { | |||
1557 | */ | 1556 | */ |
1558 | u8 payload[0]; | 1557 | u8 payload[0]; |
1559 | struct ieee80211_hdr hdr[0]; | 1558 | struct ieee80211_hdr hdr[0]; |
1560 | } __attribute__ ((packed)); | 1559 | } __packed; |
1561 | 1560 | ||
1562 | /* | 1561 | /* |
1563 | * REPLY_TX = 0x1c (response) | 1562 | * REPLY_TX = 0x1c (response) |
@@ -1569,7 +1568,7 @@ struct iwl3945_tx_resp { | |||
1569 | u8 rate; | 1568 | u8 rate; |
1570 | __le32 wireless_media_time; | 1569 | __le32 wireless_media_time; |
1571 | __le32 status; /* TX status */ | 1570 | __le32 status; /* TX status */ |
1572 | } __attribute__ ((packed)); | 1571 | } __packed; |
1573 | 1572 | ||
1574 | 1573 | ||
1575 | /* | 1574 | /* |
@@ -1581,7 +1580,7 @@ struct iwl_dram_scratch { | |||
1581 | u8 try_cnt; /* Tx attempts */ | 1580 | u8 try_cnt; /* Tx attempts */ |
1582 | u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */ | 1581 | u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */ |
1583 | __le16 reserved; | 1582 | __le16 reserved; |
1584 | } __attribute__ ((packed)); | 1583 | } __packed; |
1585 | 1584 | ||
1586 | struct iwl_tx_cmd { | 1585 | struct iwl_tx_cmd { |
1587 | /* | 1586 | /* |
@@ -1660,7 +1659,7 @@ struct iwl_tx_cmd { | |||
1660 | */ | 1659 | */ |
1661 | u8 payload[0]; | 1660 | u8 payload[0]; |
1662 | struct ieee80211_hdr hdr[0]; | 1661 | struct ieee80211_hdr hdr[0]; |
1663 | } __attribute__ ((packed)); | 1662 | } __packed; |
1664 | 1663 | ||
1665 | /* TX command response is sent after *3945* transmission attempts. | 1664 | /* TX command response is sent after *3945* transmission attempts. |
1666 | * | 1665 | * |
@@ -1826,7 +1825,7 @@ enum { | |||
1826 | struct agg_tx_status { | 1825 | struct agg_tx_status { |
1827 | __le16 status; | 1826 | __le16 status; |
1828 | __le16 sequence; | 1827 | __le16 sequence; |
1829 | } __attribute__ ((packed)); | 1828 | } __packed; |
1830 | 1829 | ||
1831 | struct iwl4965_tx_resp { | 1830 | struct iwl4965_tx_resp { |
1832 | u8 frame_count; /* 1 no aggregation, >1 aggregation */ | 1831 | u8 frame_count; /* 1 no aggregation, >1 aggregation */ |
@@ -1863,7 +1862,7 @@ struct iwl4965_tx_resp { | |||
1863 | __le32 status; | 1862 | __le32 status; |
1864 | struct agg_tx_status agg_status[0]; /* for each agg frame */ | 1863 | struct agg_tx_status agg_status[0]; /* for each agg frame */ |
1865 | } u; | 1864 | } u; |
1866 | } __attribute__ ((packed)); | 1865 | } __packed; |
1867 | 1866 | ||
1868 | /* | 1867 | /* |
1869 | * definitions for initial rate index field | 1868 | * definitions for initial rate index field |
@@ -1927,7 +1926,7 @@ struct iwl5000_tx_resp { | |||
1927 | */ | 1926 | */ |
1928 | struct agg_tx_status status; /* TX status (in aggregation - | 1927 | struct agg_tx_status status; /* TX status (in aggregation - |
1929 | * status of 1st frame) */ | 1928 | * status of 1st frame) */ |
1930 | } __attribute__ ((packed)); | 1929 | } __packed; |
1931 | /* | 1930 | /* |
1932 | * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command) | 1931 | * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command) |
1933 | * | 1932 | * |
@@ -1945,7 +1944,7 @@ struct iwl_compressed_ba_resp { | |||
1945 | __le64 bitmap; | 1944 | __le64 bitmap; |
1946 | __le16 scd_flow; | 1945 | __le16 scd_flow; |
1947 | __le16 scd_ssn; | 1946 | __le16 scd_ssn; |
1948 | } __attribute__ ((packed)); | 1947 | } __packed; |
1949 | 1948 | ||
1950 | /* | 1949 | /* |
1951 | * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) | 1950 | * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) |
@@ -1958,14 +1957,14 @@ struct iwl3945_txpowertable_cmd { | |||
1958 | u8 reserved; | 1957 | u8 reserved; |
1959 | __le16 channel; | 1958 | __le16 channel; |
1960 | struct iwl3945_power_per_rate power[IWL_MAX_RATES]; | 1959 | struct iwl3945_power_per_rate power[IWL_MAX_RATES]; |
1961 | } __attribute__ ((packed)); | 1960 | } __packed; |
1962 | 1961 | ||
1963 | struct iwl4965_txpowertable_cmd { | 1962 | struct iwl4965_txpowertable_cmd { |
1964 | u8 band; /* 0: 5 GHz, 1: 2.4 GHz */ | 1963 | u8 band; /* 0: 5 GHz, 1: 2.4 GHz */ |
1965 | u8 reserved; | 1964 | u8 reserved; |
1966 | __le16 channel; | 1965 | __le16 channel; |
1967 | struct iwl4965_tx_power_db tx_power; | 1966 | struct iwl4965_tx_power_db tx_power; |
1968 | } __attribute__ ((packed)); | 1967 | } __packed; |
1969 | 1968 | ||
1970 | 1969 | ||
1971 | /** | 1970 | /** |
@@ -1987,13 +1986,13 @@ struct iwl3945_rate_scaling_info { | |||
1987 | __le16 rate_n_flags; | 1986 | __le16 rate_n_flags; |
1988 | u8 try_cnt; | 1987 | u8 try_cnt; |
1989 | u8 next_rate_index; | 1988 | u8 next_rate_index; |
1990 | } __attribute__ ((packed)); | 1989 | } __packed; |
1991 | 1990 | ||
1992 | struct iwl3945_rate_scaling_cmd { | 1991 | struct iwl3945_rate_scaling_cmd { |
1993 | u8 table_id; | 1992 | u8 table_id; |
1994 | u8 reserved[3]; | 1993 | u8 reserved[3]; |
1995 | struct iwl3945_rate_scaling_info table[IWL_MAX_RATES]; | 1994 | struct iwl3945_rate_scaling_info table[IWL_MAX_RATES]; |
1996 | } __attribute__ ((packed)); | 1995 | } __packed; |
1997 | 1996 | ||
1998 | 1997 | ||
1999 | /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ | 1998 | /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ |
@@ -2040,7 +2039,7 @@ struct iwl_link_qual_general_params { | |||
2040 | * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3. | 2039 | * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3. |
2041 | */ | 2040 | */ |
2042 | u8 start_rate_index[LINK_QUAL_AC_NUM]; | 2041 | u8 start_rate_index[LINK_QUAL_AC_NUM]; |
2043 | } __attribute__ ((packed)); | 2042 | } __packed; |
2044 | 2043 | ||
2045 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ | 2044 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ |
2046 | #define LINK_QUAL_AGG_TIME_LIMIT_MAX (65535) | 2045 | #define LINK_QUAL_AGG_TIME_LIMIT_MAX (65535) |
@@ -2081,7 +2080,7 @@ struct iwl_link_qual_agg_params { | |||
2081 | u8 agg_frame_cnt_limit; | 2080 | u8 agg_frame_cnt_limit; |
2082 | 2081 | ||
2083 | __le32 reserved; | 2082 | __le32 reserved; |
2084 | } __attribute__ ((packed)); | 2083 | } __packed; |
2085 | 2084 | ||
2086 | /* | 2085 | /* |
2087 | * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response) | 2086 | * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response) |
@@ -2287,7 +2286,7 @@ struct iwl_link_quality_cmd { | |||
2287 | __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */ | 2286 | __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */ |
2288 | } rs_table[LINK_QUAL_MAX_RETRY_NUM]; | 2287 | } rs_table[LINK_QUAL_MAX_RETRY_NUM]; |
2289 | __le32 reserved2; | 2288 | __le32 reserved2; |
2290 | } __attribute__ ((packed)); | 2289 | } __packed; |
2291 | 2290 | ||
2292 | /* | 2291 | /* |
2293 | * BT configuration enable flags: | 2292 | * BT configuration enable flags: |
@@ -2328,7 +2327,7 @@ struct iwl_bt_cmd { | |||
2328 | u8 reserved; | 2327 | u8 reserved; |
2329 | __le32 kill_ack_mask; | 2328 | __le32 kill_ack_mask; |
2330 | __le32 kill_cts_mask; | 2329 | __le32 kill_cts_mask; |
2331 | } __attribute__ ((packed)); | 2330 | } __packed; |
2332 | 2331 | ||
2333 | /****************************************************************************** | 2332 | /****************************************************************************** |
2334 | * (6) | 2333 | * (6) |
@@ -2353,7 +2352,7 @@ struct iwl_measure_channel { | |||
2353 | u8 channel; /* channel to measure */ | 2352 | u8 channel; /* channel to measure */ |
2354 | u8 type; /* see enum iwl_measure_type */ | 2353 | u8 type; /* see enum iwl_measure_type */ |
2355 | __le16 reserved; | 2354 | __le16 reserved; |
2356 | } __attribute__ ((packed)); | 2355 | } __packed; |
2357 | 2356 | ||
2358 | /* | 2357 | /* |
2359 | * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command) | 2358 | * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command) |
@@ -2372,7 +2371,7 @@ struct iwl_spectrum_cmd { | |||
2372 | __le16 channel_count; /* minimum 1, maximum 10 */ | 2371 | __le16 channel_count; /* minimum 1, maximum 10 */ |
2373 | __le16 reserved3; | 2372 | __le16 reserved3; |
2374 | struct iwl_measure_channel channels[10]; | 2373 | struct iwl_measure_channel channels[10]; |
2375 | } __attribute__ ((packed)); | 2374 | } __packed; |
2376 | 2375 | ||
2377 | /* | 2376 | /* |
2378 | * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response) | 2377 | * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response) |
@@ -2383,7 +2382,7 @@ struct iwl_spectrum_resp { | |||
2383 | __le16 status; /* 0 - command will be handled | 2382 | __le16 status; /* 0 - command will be handled |
2384 | * 1 - cannot handle (conflicts with another | 2383 | * 1 - cannot handle (conflicts with another |
2385 | * measurement) */ | 2384 | * measurement) */ |
2386 | } __attribute__ ((packed)); | 2385 | } __packed; |
2387 | 2386 | ||
2388 | enum iwl_measurement_state { | 2387 | enum iwl_measurement_state { |
2389 | IWL_MEASUREMENT_START = 0, | 2388 | IWL_MEASUREMENT_START = 0, |
@@ -2406,13 +2405,13 @@ enum iwl_measurement_status { | |||
2406 | struct iwl_measurement_histogram { | 2405 | struct iwl_measurement_histogram { |
2407 | __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */ | 2406 | __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */ |
2408 | __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */ | 2407 | __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */ |
2409 | } __attribute__ ((packed)); | 2408 | } __packed; |
2410 | 2409 | ||
2411 | /* clear channel availability counters */ | 2410 | /* clear channel availability counters */ |
2412 | struct iwl_measurement_cca_counters { | 2411 | struct iwl_measurement_cca_counters { |
2413 | __le32 ofdm; | 2412 | __le32 ofdm; |
2414 | __le32 cck; | 2413 | __le32 cck; |
2415 | } __attribute__ ((packed)); | 2414 | } __packed; |
2416 | 2415 | ||
2417 | enum iwl_measure_type { | 2416 | enum iwl_measure_type { |
2418 | IWL_MEASURE_BASIC = (1 << 0), | 2417 | IWL_MEASURE_BASIC = (1 << 0), |
@@ -2448,7 +2447,7 @@ struct iwl_spectrum_notification { | |||
2448 | struct iwl_measurement_histogram histogram; | 2447 | struct iwl_measurement_histogram histogram; |
2449 | __le32 stop_time; /* lower 32-bits of TSF */ | 2448 | __le32 stop_time; /* lower 32-bits of TSF */ |
2450 | __le32 status; /* see iwl_measurement_status */ | 2449 | __le32 status; /* see iwl_measurement_status */ |
2451 | } __attribute__ ((packed)); | 2450 | } __packed; |
2452 | 2451 | ||
2453 | /****************************************************************************** | 2452 | /****************************************************************************** |
2454 | * (7) | 2453 | * (7) |
@@ -2504,7 +2503,7 @@ struct iwl3945_powertable_cmd { | |||
2504 | __le32 rx_data_timeout; | 2503 | __le32 rx_data_timeout; |
2505 | __le32 tx_data_timeout; | 2504 | __le32 tx_data_timeout; |
2506 | __le32 sleep_interval[IWL_POWER_VEC_SIZE]; | 2505 | __le32 sleep_interval[IWL_POWER_VEC_SIZE]; |
2507 | } __attribute__ ((packed)); | 2506 | } __packed; |
2508 | 2507 | ||
2509 | struct iwl_powertable_cmd { | 2508 | struct iwl_powertable_cmd { |
2510 | __le16 flags; | 2509 | __le16 flags; |
@@ -2514,7 +2513,7 @@ struct iwl_powertable_cmd { | |||
2514 | __le32 tx_data_timeout; | 2513 | __le32 tx_data_timeout; |
2515 | __le32 sleep_interval[IWL_POWER_VEC_SIZE]; | 2514 | __le32 sleep_interval[IWL_POWER_VEC_SIZE]; |
2516 | __le32 keep_alive_beacons; | 2515 | __le32 keep_alive_beacons; |
2517 | } __attribute__ ((packed)); | 2516 | } __packed; |
2518 | 2517 | ||
2519 | /* | 2518 | /* |
2520 | * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command) | 2519 | * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command) |
@@ -2527,7 +2526,7 @@ struct iwl_sleep_notification { | |||
2527 | __le32 sleep_time; | 2526 | __le32 sleep_time; |
2528 | __le32 tsf_low; | 2527 | __le32 tsf_low; |
2529 | __le32 bcon_timer; | 2528 | __le32 bcon_timer; |
2530 | } __attribute__ ((packed)); | 2529 | } __packed; |
2531 | 2530 | ||
2532 | /* Sleep states. 3945 and 4965 identical. */ | 2531 | /* Sleep states. 3945 and 4965 identical. */ |
2533 | enum { | 2532 | enum { |
@@ -2552,14 +2551,14 @@ enum { | |||
2552 | #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */ | 2551 | #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */ |
2553 | struct iwl_card_state_cmd { | 2552 | struct iwl_card_state_cmd { |
2554 | __le32 status; /* CARD_STATE_CMD_* request new power state */ | 2553 | __le32 status; /* CARD_STATE_CMD_* request new power state */ |
2555 | } __attribute__ ((packed)); | 2554 | } __packed; |
2556 | 2555 | ||
2557 | /* | 2556 | /* |
2558 | * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command) | 2557 | * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command) |
2559 | */ | 2558 | */ |
2560 | struct iwl_card_state_notif { | 2559 | struct iwl_card_state_notif { |
2561 | __le32 flags; | 2560 | __le32 flags; |
2562 | } __attribute__ ((packed)); | 2561 | } __packed; |
2563 | 2562 | ||
2564 | #define HW_CARD_DISABLED 0x01 | 2563 | #define HW_CARD_DISABLED 0x01 |
2565 | #define SW_CARD_DISABLED 0x02 | 2564 | #define SW_CARD_DISABLED 0x02 |
@@ -2570,14 +2569,14 @@ struct iwl_ct_kill_config { | |||
2570 | __le32 reserved; | 2569 | __le32 reserved; |
2571 | __le32 critical_temperature_M; | 2570 | __le32 critical_temperature_M; |
2572 | __le32 critical_temperature_R; | 2571 | __le32 critical_temperature_R; |
2573 | } __attribute__ ((packed)); | 2572 | } __packed; |
2574 | 2573 | ||
2575 | /* 1000, and 6x00 */ | 2574 | /* 1000, and 6x00 */ |
2576 | struct iwl_ct_kill_throttling_config { | 2575 | struct iwl_ct_kill_throttling_config { |
2577 | __le32 critical_temperature_exit; | 2576 | __le32 critical_temperature_exit; |
2578 | __le32 reserved; | 2577 | __le32 reserved; |
2579 | __le32 critical_temperature_enter; | 2578 | __le32 critical_temperature_enter; |
2580 | } __attribute__ ((packed)); | 2579 | } __packed; |
2581 | 2580 | ||
2582 | /****************************************************************************** | 2581 | /****************************************************************************** |
2583 | * (8) | 2582 | * (8) |
@@ -2622,7 +2621,7 @@ struct iwl3945_scan_channel { | |||
2622 | struct iwl3945_tx_power tpc; | 2621 | struct iwl3945_tx_power tpc; |
2623 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ | 2622 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ |
2624 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ | 2623 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ |
2625 | } __attribute__ ((packed)); | 2624 | } __packed; |
2626 | 2625 | ||
2627 | /* set number of direct probes u8 type */ | 2626 | /* set number of direct probes u8 type */ |
2628 | #define IWL39_SCAN_PROBE_MASK(n) ((BIT(n) | (BIT(n) - BIT(1)))) | 2627 | #define IWL39_SCAN_PROBE_MASK(n) ((BIT(n) | (BIT(n) - BIT(1)))) |
@@ -2641,7 +2640,7 @@ struct iwl_scan_channel { | |||
2641 | u8 dsp_atten; /* gain for DSP */ | 2640 | u8 dsp_atten; /* gain for DSP */ |
2642 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ | 2641 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ |
2643 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ | 2642 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ |
2644 | } __attribute__ ((packed)); | 2643 | } __packed; |
2645 | 2644 | ||
2646 | /* set number of direct probes __le32 type */ | 2645 | /* set number of direct probes __le32 type */ |
2647 | #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1)))) | 2646 | #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1)))) |
@@ -2658,7 +2657,7 @@ struct iwl_ssid_ie { | |||
2658 | u8 id; | 2657 | u8 id; |
2659 | u8 len; | 2658 | u8 len; |
2660 | u8 ssid[32]; | 2659 | u8 ssid[32]; |
2661 | } __attribute__ ((packed)); | 2660 | } __packed; |
2662 | 2661 | ||
2663 | #define PROBE_OPTION_MAX_3945 4 | 2662 | #define PROBE_OPTION_MAX_3945 4 |
2664 | #define PROBE_OPTION_MAX 20 | 2663 | #define PROBE_OPTION_MAX 20 |
@@ -2764,7 +2763,7 @@ struct iwl3945_scan_cmd { | |||
2764 | * before requesting another scan. | 2763 | * before requesting another scan. |
2765 | */ | 2764 | */ |
2766 | u8 data[0]; | 2765 | u8 data[0]; |
2767 | } __attribute__ ((packed)); | 2766 | } __packed; |
2768 | 2767 | ||
2769 | struct iwl_scan_cmd { | 2768 | struct iwl_scan_cmd { |
2770 | __le16 len; | 2769 | __le16 len; |
@@ -2808,7 +2807,7 @@ struct iwl_scan_cmd { | |||
2808 | * before requesting another scan. | 2807 | * before requesting another scan. |
2809 | */ | 2808 | */ |
2810 | u8 data[0]; | 2809 | u8 data[0]; |
2811 | } __attribute__ ((packed)); | 2810 | } __packed; |
2812 | 2811 | ||
2813 | /* Can abort will notify by complete notification with abort status. */ | 2812 | /* Can abort will notify by complete notification with abort status. */ |
2814 | #define CAN_ABORT_STATUS cpu_to_le32(0x1) | 2813 | #define CAN_ABORT_STATUS cpu_to_le32(0x1) |
@@ -2820,7 +2819,7 @@ struct iwl_scan_cmd { | |||
2820 | */ | 2819 | */ |
2821 | struct iwl_scanreq_notification { | 2820 | struct iwl_scanreq_notification { |
2822 | __le32 status; /* 1: okay, 2: cannot fulfill request */ | 2821 | __le32 status; /* 1: okay, 2: cannot fulfill request */ |
2823 | } __attribute__ ((packed)); | 2822 | } __packed; |
2824 | 2823 | ||
2825 | /* | 2824 | /* |
2826 | * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command) | 2825 | * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command) |
@@ -2833,7 +2832,7 @@ struct iwl_scanstart_notification { | |||
2833 | u8 band; | 2832 | u8 band; |
2834 | u8 reserved[2]; | 2833 | u8 reserved[2]; |
2835 | __le32 status; | 2834 | __le32 status; |
2836 | } __attribute__ ((packed)); | 2835 | } __packed; |
2837 | 2836 | ||
2838 | #define SCAN_OWNER_STATUS 0x1; | 2837 | #define SCAN_OWNER_STATUS 0x1; |
2839 | #define MEASURE_OWNER_STATUS 0x2; | 2838 | #define MEASURE_OWNER_STATUS 0x2; |
@@ -2849,7 +2848,7 @@ struct iwl_scanresults_notification { | |||
2849 | __le32 tsf_low; | 2848 | __le32 tsf_low; |
2850 | __le32 tsf_high; | 2849 | __le32 tsf_high; |
2851 | __le32 statistics[NUMBER_OF_STATISTICS]; | 2850 | __le32 statistics[NUMBER_OF_STATISTICS]; |
2852 | } __attribute__ ((packed)); | 2851 | } __packed; |
2853 | 2852 | ||
2854 | /* | 2853 | /* |
2855 | * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command) | 2854 | * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command) |
@@ -2861,7 +2860,7 @@ struct iwl_scancomplete_notification { | |||
2861 | u8 last_channel; | 2860 | u8 last_channel; |
2862 | __le32 tsf_low; | 2861 | __le32 tsf_low; |
2863 | __le32 tsf_high; | 2862 | __le32 tsf_high; |
2864 | } __attribute__ ((packed)); | 2863 | } __packed; |
2865 | 2864 | ||
2866 | 2865 | ||
2867 | /****************************************************************************** | 2866 | /****************************************************************************** |
@@ -2879,14 +2878,14 @@ struct iwl3945_beacon_notif { | |||
2879 | __le32 low_tsf; | 2878 | __le32 low_tsf; |
2880 | __le32 high_tsf; | 2879 | __le32 high_tsf; |
2881 | __le32 ibss_mgr_status; | 2880 | __le32 ibss_mgr_status; |
2882 | } __attribute__ ((packed)); | 2881 | } __packed; |
2883 | 2882 | ||
2884 | struct iwl4965_beacon_notif { | 2883 | struct iwl4965_beacon_notif { |
2885 | struct iwl4965_tx_resp beacon_notify_hdr; | 2884 | struct iwl4965_tx_resp beacon_notify_hdr; |
2886 | __le32 low_tsf; | 2885 | __le32 low_tsf; |
2887 | __le32 high_tsf; | 2886 | __le32 high_tsf; |
2888 | __le32 ibss_mgr_status; | 2887 | __le32 ibss_mgr_status; |
2889 | } __attribute__ ((packed)); | 2888 | } __packed; |
2890 | 2889 | ||
2891 | /* | 2890 | /* |
2892 | * REPLY_TX_BEACON = 0x91 (command, has simple generic response) | 2891 | * REPLY_TX_BEACON = 0x91 (command, has simple generic response) |
@@ -2898,7 +2897,7 @@ struct iwl3945_tx_beacon_cmd { | |||
2898 | u8 tim_size; | 2897 | u8 tim_size; |
2899 | u8 reserved1; | 2898 | u8 reserved1; |
2900 | struct ieee80211_hdr frame[0]; /* beacon frame */ | 2899 | struct ieee80211_hdr frame[0]; /* beacon frame */ |
2901 | } __attribute__ ((packed)); | 2900 | } __packed; |
2902 | 2901 | ||
2903 | struct iwl_tx_beacon_cmd { | 2902 | struct iwl_tx_beacon_cmd { |
2904 | struct iwl_tx_cmd tx; | 2903 | struct iwl_tx_cmd tx; |
@@ -2906,7 +2905,7 @@ struct iwl_tx_beacon_cmd { | |||
2906 | u8 tim_size; | 2905 | u8 tim_size; |
2907 | u8 reserved1; | 2906 | u8 reserved1; |
2908 | struct ieee80211_hdr frame[0]; /* beacon frame */ | 2907 | struct ieee80211_hdr frame[0]; /* beacon frame */ |
2909 | } __attribute__ ((packed)); | 2908 | } __packed; |
2910 | 2909 | ||
2911 | /****************************************************************************** | 2910 | /****************************************************************************** |
2912 | * (10) | 2911 | * (10) |
@@ -2932,7 +2931,7 @@ struct rate_histogram { | |||
2932 | __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; | 2931 | __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; |
2933 | __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; | 2932 | __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; |
2934 | } failed; | 2933 | } failed; |
2935 | } __attribute__ ((packed)); | 2934 | } __packed; |
2936 | 2935 | ||
2937 | /* statistics command response */ | 2936 | /* statistics command response */ |
2938 | 2937 | ||
@@ -2952,7 +2951,7 @@ struct iwl39_statistics_rx_phy { | |||
2952 | __le32 rxe_frame_limit_overrun; | 2951 | __le32 rxe_frame_limit_overrun; |
2953 | __le32 sent_ack_cnt; | 2952 | __le32 sent_ack_cnt; |
2954 | __le32 sent_cts_cnt; | 2953 | __le32 sent_cts_cnt; |
2955 | } __attribute__ ((packed)); | 2954 | } __packed; |
2956 | 2955 | ||
2957 | struct iwl39_statistics_rx_non_phy { | 2956 | struct iwl39_statistics_rx_non_phy { |
2958 | __le32 bogus_cts; /* CTS received when not expecting CTS */ | 2957 | __le32 bogus_cts; /* CTS received when not expecting CTS */ |
@@ -2963,13 +2962,13 @@ struct iwl39_statistics_rx_non_phy { | |||
2963 | * filtering process */ | 2962 | * filtering process */ |
2964 | __le32 non_channel_beacons; /* beacons with our bss id but not on | 2963 | __le32 non_channel_beacons; /* beacons with our bss id but not on |
2965 | * our serving channel */ | 2964 | * our serving channel */ |
2966 | } __attribute__ ((packed)); | 2965 | } __packed; |
2967 | 2966 | ||
2968 | struct iwl39_statistics_rx { | 2967 | struct iwl39_statistics_rx { |
2969 | struct iwl39_statistics_rx_phy ofdm; | 2968 | struct iwl39_statistics_rx_phy ofdm; |
2970 | struct iwl39_statistics_rx_phy cck; | 2969 | struct iwl39_statistics_rx_phy cck; |
2971 | struct iwl39_statistics_rx_non_phy general; | 2970 | struct iwl39_statistics_rx_non_phy general; |
2972 | } __attribute__ ((packed)); | 2971 | } __packed; |
2973 | 2972 | ||
2974 | struct iwl39_statistics_tx { | 2973 | struct iwl39_statistics_tx { |
2975 | __le32 preamble_cnt; | 2974 | __le32 preamble_cnt; |
@@ -2981,20 +2980,20 @@ struct iwl39_statistics_tx { | |||
2981 | __le32 ack_timeout; | 2980 | __le32 ack_timeout; |
2982 | __le32 expected_ack_cnt; | 2981 | __le32 expected_ack_cnt; |
2983 | __le32 actual_ack_cnt; | 2982 | __le32 actual_ack_cnt; |
2984 | } __attribute__ ((packed)); | 2983 | } __packed; |
2985 | 2984 | ||
2986 | struct statistics_dbg { | 2985 | struct statistics_dbg { |
2987 | __le32 burst_check; | 2986 | __le32 burst_check; |
2988 | __le32 burst_count; | 2987 | __le32 burst_count; |
2989 | __le32 reserved[4]; | 2988 | __le32 reserved[4]; |
2990 | } __attribute__ ((packed)); | 2989 | } __packed; |
2991 | 2990 | ||
2992 | struct iwl39_statistics_div { | 2991 | struct iwl39_statistics_div { |
2993 | __le32 tx_on_a; | 2992 | __le32 tx_on_a; |
2994 | __le32 tx_on_b; | 2993 | __le32 tx_on_b; |
2995 | __le32 exec_time; | 2994 | __le32 exec_time; |
2996 | __le32 probe_time; | 2995 | __le32 probe_time; |
2997 | } __attribute__ ((packed)); | 2996 | } __packed; |
2998 | 2997 | ||
2999 | struct iwl39_statistics_general { | 2998 | struct iwl39_statistics_general { |
3000 | __le32 temperature; | 2999 | __le32 temperature; |
@@ -3004,7 +3003,7 @@ struct iwl39_statistics_general { | |||
3004 | __le32 slots_idle; | 3003 | __le32 slots_idle; |
3005 | __le32 ttl_timestamp; | 3004 | __le32 ttl_timestamp; |
3006 | struct iwl39_statistics_div div; | 3005 | struct iwl39_statistics_div div; |
3007 | } __attribute__ ((packed)); | 3006 | } __packed; |
3008 | 3007 | ||
3009 | struct statistics_rx_phy { | 3008 | struct statistics_rx_phy { |
3010 | __le32 ina_cnt; | 3009 | __le32 ina_cnt; |
@@ -3027,7 +3026,7 @@ struct statistics_rx_phy { | |||
3027 | __le32 mh_format_err; | 3026 | __le32 mh_format_err; |
3028 | __le32 re_acq_main_rssi_sum; | 3027 | __le32 re_acq_main_rssi_sum; |
3029 | __le32 reserved3; | 3028 | __le32 reserved3; |
3030 | } __attribute__ ((packed)); | 3029 | } __packed; |
3031 | 3030 | ||
3032 | struct statistics_rx_ht_phy { | 3031 | struct statistics_rx_ht_phy { |
3033 | __le32 plcp_err; | 3032 | __le32 plcp_err; |
@@ -3040,7 +3039,7 @@ struct statistics_rx_ht_phy { | |||
3040 | __le32 agg_mpdu_cnt; | 3039 | __le32 agg_mpdu_cnt; |
3041 | __le32 agg_cnt; | 3040 | __le32 agg_cnt; |
3042 | __le32 unsupport_mcs; | 3041 | __le32 unsupport_mcs; |
3043 | } __attribute__ ((packed)); | 3042 | } __packed; |
3044 | 3043 | ||
3045 | #define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1) | 3044 | #define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1) |
3046 | 3045 | ||
@@ -3075,14 +3074,14 @@ struct statistics_rx_non_phy { | |||
3075 | __le32 beacon_energy_a; | 3074 | __le32 beacon_energy_a; |
3076 | __le32 beacon_energy_b; | 3075 | __le32 beacon_energy_b; |
3077 | __le32 beacon_energy_c; | 3076 | __le32 beacon_energy_c; |
3078 | } __attribute__ ((packed)); | 3077 | } __packed; |
3079 | 3078 | ||
3080 | struct statistics_rx { | 3079 | struct statistics_rx { |
3081 | struct statistics_rx_phy ofdm; | 3080 | struct statistics_rx_phy ofdm; |
3082 | struct statistics_rx_phy cck; | 3081 | struct statistics_rx_phy cck; |
3083 | struct statistics_rx_non_phy general; | 3082 | struct statistics_rx_non_phy general; |
3084 | struct statistics_rx_ht_phy ofdm_ht; | 3083 | struct statistics_rx_ht_phy ofdm_ht; |
3085 | } __attribute__ ((packed)); | 3084 | } __packed; |
3086 | 3085 | ||
3087 | /** | 3086 | /** |
3088 | * struct statistics_tx_power - current tx power | 3087 | * struct statistics_tx_power - current tx power |
@@ -3096,7 +3095,7 @@ struct statistics_tx_power { | |||
3096 | u8 ant_b; | 3095 | u8 ant_b; |
3097 | u8 ant_c; | 3096 | u8 ant_c; |
3098 | u8 reserved; | 3097 | u8 reserved; |
3099 | } __attribute__ ((packed)); | 3098 | } __packed; |
3100 | 3099 | ||
3101 | struct statistics_tx_non_phy_agg { | 3100 | struct statistics_tx_non_phy_agg { |
3102 | __le32 ba_timeout; | 3101 | __le32 ba_timeout; |
@@ -3109,7 +3108,7 @@ struct statistics_tx_non_phy_agg { | |||
3109 | __le32 underrun; | 3108 | __le32 underrun; |
3110 | __le32 bt_prio_kill; | 3109 | __le32 bt_prio_kill; |
3111 | __le32 rx_ba_rsp_cnt; | 3110 | __le32 rx_ba_rsp_cnt; |
3112 | } __attribute__ ((packed)); | 3111 | } __packed; |
3113 | 3112 | ||
3114 | struct statistics_tx { | 3113 | struct statistics_tx { |
3115 | __le32 preamble_cnt; | 3114 | __le32 preamble_cnt; |
@@ -3134,7 +3133,7 @@ struct statistics_tx { | |||
3134 | */ | 3133 | */ |
3135 | struct statistics_tx_power tx_power; | 3134 | struct statistics_tx_power tx_power; |
3136 | __le32 reserved1; | 3135 | __le32 reserved1; |
3137 | } __attribute__ ((packed)); | 3136 | } __packed; |
3138 | 3137 | ||
3139 | 3138 | ||
3140 | struct statistics_div { | 3139 | struct statistics_div { |
@@ -3144,7 +3143,7 @@ struct statistics_div { | |||
3144 | __le32 probe_time; | 3143 | __le32 probe_time; |
3145 | __le32 reserved1; | 3144 | __le32 reserved1; |
3146 | __le32 reserved2; | 3145 | __le32 reserved2; |
3147 | } __attribute__ ((packed)); | 3146 | } __packed; |
3148 | 3147 | ||
3149 | struct statistics_general { | 3148 | struct statistics_general { |
3150 | __le32 temperature; /* radio temperature */ | 3149 | __le32 temperature; /* radio temperature */ |
@@ -3164,7 +3163,7 @@ struct statistics_general { | |||
3164 | __le32 num_of_sos_states; | 3163 | __le32 num_of_sos_states; |
3165 | __le32 reserved2; | 3164 | __le32 reserved2; |
3166 | __le32 reserved3; | 3165 | __le32 reserved3; |
3167 | } __attribute__ ((packed)); | 3166 | } __packed; |
3168 | 3167 | ||
3169 | #define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0) | 3168 | #define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0) |
3170 | #define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1) | 3169 | #define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1) |
@@ -3189,7 +3188,7 @@ struct statistics_general { | |||
3189 | #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */ | 3188 | #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */ |
3190 | struct iwl_statistics_cmd { | 3189 | struct iwl_statistics_cmd { |
3191 | __le32 configuration_flags; /* IWL_STATS_CONF_* */ | 3190 | __le32 configuration_flags; /* IWL_STATS_CONF_* */ |
3192 | } __attribute__ ((packed)); | 3191 | } __packed; |
3193 | 3192 | ||
3194 | /* | 3193 | /* |
3195 | * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command) | 3194 | * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command) |
@@ -3214,14 +3213,14 @@ struct iwl3945_notif_statistics { | |||
3214 | struct iwl39_statistics_rx rx; | 3213 | struct iwl39_statistics_rx rx; |
3215 | struct iwl39_statistics_tx tx; | 3214 | struct iwl39_statistics_tx tx; |
3216 | struct iwl39_statistics_general general; | 3215 | struct iwl39_statistics_general general; |
3217 | } __attribute__ ((packed)); | 3216 | } __packed; |
3218 | 3217 | ||
3219 | struct iwl_notif_statistics { | 3218 | struct iwl_notif_statistics { |
3220 | __le32 flag; | 3219 | __le32 flag; |
3221 | struct statistics_rx rx; | 3220 | struct statistics_rx rx; |
3222 | struct statistics_tx tx; | 3221 | struct statistics_tx tx; |
3223 | struct statistics_general general; | 3222 | struct statistics_general general; |
3224 | } __attribute__ ((packed)); | 3223 | } __packed; |
3225 | 3224 | ||
3226 | 3225 | ||
3227 | /* | 3226 | /* |
@@ -3253,7 +3252,7 @@ struct iwl_missed_beacon_notif { | |||
3253 | __le32 total_missed_becons; | 3252 | __le32 total_missed_becons; |
3254 | __le32 num_expected_beacons; | 3253 | __le32 num_expected_beacons; |
3255 | __le32 num_recvd_beacons; | 3254 | __le32 num_recvd_beacons; |
3256 | } __attribute__ ((packed)); | 3255 | } __packed; |
3257 | 3256 | ||
3258 | 3257 | ||
3259 | /****************************************************************************** | 3258 | /****************************************************************************** |
@@ -3455,7 +3454,7 @@ struct iwl_missed_beacon_notif { | |||
3455 | struct iwl_sensitivity_cmd { | 3454 | struct iwl_sensitivity_cmd { |
3456 | __le16 control; /* always use "1" */ | 3455 | __le16 control; /* always use "1" */ |
3457 | __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */ | 3456 | __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */ |
3458 | } __attribute__ ((packed)); | 3457 | } __packed; |
3459 | 3458 | ||
3460 | 3459 | ||
3461 | /** | 3460 | /** |
@@ -3536,31 +3535,31 @@ struct iwl_calib_cfg_elmnt_s { | |||
3536 | __le32 send_res; | 3535 | __le32 send_res; |
3537 | __le32 apply_res; | 3536 | __le32 apply_res; |
3538 | __le32 reserved; | 3537 | __le32 reserved; |
3539 | } __attribute__ ((packed)); | 3538 | } __packed; |
3540 | 3539 | ||
3541 | struct iwl_calib_cfg_status_s { | 3540 | struct iwl_calib_cfg_status_s { |
3542 | struct iwl_calib_cfg_elmnt_s once; | 3541 | struct iwl_calib_cfg_elmnt_s once; |
3543 | struct iwl_calib_cfg_elmnt_s perd; | 3542 | struct iwl_calib_cfg_elmnt_s perd; |
3544 | __le32 flags; | 3543 | __le32 flags; |
3545 | } __attribute__ ((packed)); | 3544 | } __packed; |
3546 | 3545 | ||
3547 | struct iwl_calib_cfg_cmd { | 3546 | struct iwl_calib_cfg_cmd { |
3548 | struct iwl_calib_cfg_status_s ucd_calib_cfg; | 3547 | struct iwl_calib_cfg_status_s ucd_calib_cfg; |
3549 | struct iwl_calib_cfg_status_s drv_calib_cfg; | 3548 | struct iwl_calib_cfg_status_s drv_calib_cfg; |
3550 | __le32 reserved1; | 3549 | __le32 reserved1; |
3551 | } __attribute__ ((packed)); | 3550 | } __packed; |
3552 | 3551 | ||
3553 | struct iwl_calib_hdr { | 3552 | struct iwl_calib_hdr { |
3554 | u8 op_code; | 3553 | u8 op_code; |
3555 | u8 first_group; | 3554 | u8 first_group; |
3556 | u8 groups_num; | 3555 | u8 groups_num; |
3557 | u8 data_valid; | 3556 | u8 data_valid; |
3558 | } __attribute__ ((packed)); | 3557 | } __packed; |
3559 | 3558 | ||
3560 | struct iwl_calib_cmd { | 3559 | struct iwl_calib_cmd { |
3561 | struct iwl_calib_hdr hdr; | 3560 | struct iwl_calib_hdr hdr; |
3562 | u8 data[0]; | 3561 | u8 data[0]; |
3563 | } __attribute__ ((packed)); | 3562 | } __packed; |
3564 | 3563 | ||
3565 | /* IWL_PHY_CALIBRATE_DIFF_GAIN_CMD (7) */ | 3564 | /* IWL_PHY_CALIBRATE_DIFF_GAIN_CMD (7) */ |
3566 | struct iwl_calib_diff_gain_cmd { | 3565 | struct iwl_calib_diff_gain_cmd { |
@@ -3569,14 +3568,14 @@ struct iwl_calib_diff_gain_cmd { | |||
3569 | s8 diff_gain_b; | 3568 | s8 diff_gain_b; |
3570 | s8 diff_gain_c; | 3569 | s8 diff_gain_c; |
3571 | u8 reserved1; | 3570 | u8 reserved1; |
3572 | } __attribute__ ((packed)); | 3571 | } __packed; |
3573 | 3572 | ||
3574 | struct iwl_calib_xtal_freq_cmd { | 3573 | struct iwl_calib_xtal_freq_cmd { |
3575 | struct iwl_calib_hdr hdr; | 3574 | struct iwl_calib_hdr hdr; |
3576 | u8 cap_pin1; | 3575 | u8 cap_pin1; |
3577 | u8 cap_pin2; | 3576 | u8 cap_pin2; |
3578 | u8 pad[2]; | 3577 | u8 pad[2]; |
3579 | } __attribute__ ((packed)); | 3578 | } __packed; |
3580 | 3579 | ||
3581 | /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */ | 3580 | /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */ |
3582 | struct iwl_calib_chain_noise_reset_cmd { | 3581 | struct iwl_calib_chain_noise_reset_cmd { |
@@ -3590,7 +3589,7 @@ struct iwl_calib_chain_noise_gain_cmd { | |||
3590 | u8 delta_gain_1; | 3589 | u8 delta_gain_1; |
3591 | u8 delta_gain_2; | 3590 | u8 delta_gain_2; |
3592 | u8 pad[2]; | 3591 | u8 pad[2]; |
3593 | } __attribute__ ((packed)); | 3592 | } __packed; |
3594 | 3593 | ||
3595 | /****************************************************************************** | 3594 | /****************************************************************************** |
3596 | * (12) | 3595 | * (12) |
@@ -3613,7 +3612,7 @@ struct iwl_led_cmd { | |||
3613 | u8 on; /* # intervals on while blinking; | 3612 | u8 on; /* # intervals on while blinking; |
3614 | * "0", regardless of "off", turns LED off */ | 3613 | * "0", regardless of "off", turns LED off */ |
3615 | u8 reserved; | 3614 | u8 reserved; |
3616 | } __attribute__ ((packed)); | 3615 | } __packed; |
3617 | 3616 | ||
3618 | /* | 3617 | /* |
3619 | * station priority table entries | 3618 | * station priority table entries |
@@ -3749,7 +3748,7 @@ struct iwl_wimax_coex_event_entry { | |||
3749 | u8 win_medium_prio; | 3748 | u8 win_medium_prio; |
3750 | u8 reserved; | 3749 | u8 reserved; |
3751 | u8 flags; | 3750 | u8 flags; |
3752 | } __attribute__ ((packed)); | 3751 | } __packed; |
3753 | 3752 | ||
3754 | /* COEX flag masks */ | 3753 | /* COEX flag masks */ |
3755 | 3754 | ||
@@ -3766,7 +3765,7 @@ struct iwl_wimax_coex_cmd { | |||
3766 | u8 flags; | 3765 | u8 flags; |
3767 | u8 reserved[3]; | 3766 | u8 reserved[3]; |
3768 | struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS]; | 3767 | struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS]; |
3769 | } __attribute__ ((packed)); | 3768 | } __packed; |
3770 | 3769 | ||
3771 | /* | 3770 | /* |
3772 | * Coexistence MEDIUM NOTIFICATION | 3771 | * Coexistence MEDIUM NOTIFICATION |
@@ -3795,7 +3794,7 @@ struct iwl_wimax_coex_cmd { | |||
3795 | struct iwl_coex_medium_notification { | 3794 | struct iwl_coex_medium_notification { |
3796 | __le32 status; | 3795 | __le32 status; |
3797 | __le32 events; | 3796 | __le32 events; |
3798 | } __attribute__ ((packed)); | 3797 | } __packed; |
3799 | 3798 | ||
3800 | /* | 3799 | /* |
3801 | * Coexistence EVENT Command | 3800 | * Coexistence EVENT Command |
@@ -3810,11 +3809,11 @@ struct iwl_coex_event_cmd { | |||
3810 | u8 flags; | 3809 | u8 flags; |
3811 | u8 event; | 3810 | u8 event; |
3812 | __le16 reserved; | 3811 | __le16 reserved; |
3813 | } __attribute__ ((packed)); | 3812 | } __packed; |
3814 | 3813 | ||
3815 | struct iwl_coex_event_resp { | 3814 | struct iwl_coex_event_resp { |
3816 | __le32 status; | 3815 | __le32 status; |
3817 | } __attribute__ ((packed)); | 3816 | } __packed; |
3818 | 3817 | ||
3819 | 3818 | ||
3820 | /****************************************************************************** | 3819 | /****************************************************************************** |
@@ -3858,7 +3857,7 @@ struct iwl_rx_packet { | |||
3858 | __le32 status; | 3857 | __le32 status; |
3859 | u8 raw[0]; | 3858 | u8 raw[0]; |
3860 | } u; | 3859 | } u; |
3861 | } __attribute__ ((packed)); | 3860 | } __packed; |
3862 | 3861 | ||
3863 | int iwl_agn_check_rxon_cmd(struct iwl_priv *priv); | 3862 | int iwl_agn_check_rxon_cmd(struct iwl_priv *priv); |
3864 | 3863 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c index 426e95567de3..62c50bc0089a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.c +++ b/drivers/net/wireless/iwlwifi/iwl-core.c | |||
@@ -141,13 +141,14 @@ int iwl_hwrate_to_plcp_idx(u32 rate_n_flags) | |||
141 | } | 141 | } |
142 | EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx); | 142 | EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx); |
143 | 143 | ||
144 | u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant) | 144 | u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid) |
145 | { | 145 | { |
146 | int i; | 146 | int i; |
147 | u8 ind = ant; | 147 | u8 ind = ant; |
148 | |||
148 | for (i = 0; i < RATE_ANT_NUM - 1; i++) { | 149 | for (i = 0; i < RATE_ANT_NUM - 1; i++) { |
149 | ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0; | 150 | ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0; |
150 | if (priv->hw_params.valid_tx_ant & BIT(ind)) | 151 | if (valid & BIT(ind)) |
151 | return ind; | 152 | return ind; |
152 | } | 153 | } |
153 | return ant; | 154 | return ant; |
@@ -457,7 +458,7 @@ u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv, | |||
457 | if (!sta_ht_inf->ht_supported) | 458 | if (!sta_ht_inf->ht_supported) |
458 | return 0; | 459 | return 0; |
459 | } | 460 | } |
460 | #ifdef CONFIG_IWLWIFI_DEBUG | 461 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
461 | if (priv->disable_ht40) | 462 | if (priv->disable_ht40) |
462 | return 0; | 463 | return 0; |
463 | #endif | 464 | #endif |
@@ -506,11 +507,11 @@ void iwl_setup_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
506 | } | 507 | } |
507 | 508 | ||
508 | beacon_int = iwl_adjust_beacon_interval(beacon_int, | 509 | beacon_int = iwl_adjust_beacon_interval(beacon_int, |
509 | priv->hw_params.max_beacon_itrvl * 1024); | 510 | priv->hw_params.max_beacon_itrvl * TIME_UNIT); |
510 | priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int); | 511 | priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int); |
511 | 512 | ||
512 | tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */ | 513 | tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */ |
513 | interval_tm = beacon_int * 1024; | 514 | interval_tm = beacon_int * TIME_UNIT; |
514 | rem = do_div(tsf, interval_tm); | 515 | rem = do_div(tsf, interval_tm); |
515 | priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem); | 516 | priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem); |
516 | 517 | ||
@@ -932,9 +933,9 @@ int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch) | |||
932 | } | 933 | } |
933 | EXPORT_SYMBOL(iwl_set_rxon_channel); | 934 | EXPORT_SYMBOL(iwl_set_rxon_channel); |
934 | 935 | ||
935 | static void iwl_set_flags_for_band(struct iwl_priv *priv, | 936 | void iwl_set_flags_for_band(struct iwl_priv *priv, |
936 | enum ieee80211_band band, | 937 | enum ieee80211_band band, |
937 | struct ieee80211_vif *vif) | 938 | struct ieee80211_vif *vif) |
938 | { | 939 | { |
939 | if (band == IEEE80211_BAND_5GHZ) { | 940 | if (band == IEEE80211_BAND_5GHZ) { |
940 | priv->staging_rxon.flags &= | 941 | priv->staging_rxon.flags &= |
@@ -943,19 +944,17 @@ static void iwl_set_flags_for_band(struct iwl_priv *priv, | |||
943 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | 944 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; |
944 | } else { | 945 | } else { |
945 | /* Copied from iwl_post_associate() */ | 946 | /* Copied from iwl_post_associate() */ |
946 | if (vif && vif->bss_conf.assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | 947 | if (vif && vif->bss_conf.use_short_slot) |
947 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | 948 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; |
948 | else | 949 | else |
949 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | 950 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
950 | 951 | ||
951 | if (vif && vif->type == NL80211_IFTYPE_ADHOC) | ||
952 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | ||
953 | |||
954 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | 952 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; |
955 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | 953 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; |
956 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | 954 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; |
957 | } | 955 | } |
958 | } | 956 | } |
957 | EXPORT_SYMBOL(iwl_set_flags_for_band); | ||
959 | 958 | ||
960 | /* | 959 | /* |
961 | * initialize rxon structure with default values from eeprom | 960 | * initialize rxon structure with default values from eeprom |
@@ -1021,15 +1020,17 @@ void iwl_connection_init_rx_config(struct iwl_priv *priv, | |||
1021 | /* clear both MIX and PURE40 mode flag */ | 1020 | /* clear both MIX and PURE40 mode flag */ |
1022 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED | | 1021 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED | |
1023 | RXON_FLG_CHANNEL_MODE_PURE_40); | 1022 | RXON_FLG_CHANNEL_MODE_PURE_40); |
1024 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | 1023 | |
1025 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | 1024 | if (vif) |
1025 | memcpy(priv->staging_rxon.node_addr, vif->addr, ETH_ALEN); | ||
1026 | |||
1026 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | 1027 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; |
1027 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | 1028 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; |
1028 | priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff; | 1029 | priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff; |
1029 | } | 1030 | } |
1030 | EXPORT_SYMBOL(iwl_connection_init_rx_config); | 1031 | EXPORT_SYMBOL(iwl_connection_init_rx_config); |
1031 | 1032 | ||
1032 | static void iwl_set_rate(struct iwl_priv *priv) | 1033 | void iwl_set_rate(struct iwl_priv *priv) |
1033 | { | 1034 | { |
1034 | const struct ieee80211_supported_band *hw = NULL; | 1035 | const struct ieee80211_supported_band *hw = NULL; |
1035 | struct ieee80211_rate *rate; | 1036 | struct ieee80211_rate *rate; |
@@ -1057,6 +1058,21 @@ static void iwl_set_rate(struct iwl_priv *priv) | |||
1057 | priv->staging_rxon.ofdm_basic_rates = | 1058 | priv->staging_rxon.ofdm_basic_rates = |
1058 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | 1059 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; |
1059 | } | 1060 | } |
1061 | EXPORT_SYMBOL(iwl_set_rate); | ||
1062 | |||
1063 | void iwl_chswitch_done(struct iwl_priv *priv, bool is_success) | ||
1064 | { | ||
1065 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
1066 | return; | ||
1067 | |||
1068 | if (priv->switch_rxon.switch_in_progress) { | ||
1069 | ieee80211_chswitch_done(priv->vif, is_success); | ||
1070 | mutex_lock(&priv->mutex); | ||
1071 | priv->switch_rxon.switch_in_progress = false; | ||
1072 | mutex_unlock(&priv->mutex); | ||
1073 | } | ||
1074 | } | ||
1075 | EXPORT_SYMBOL(iwl_chswitch_done); | ||
1060 | 1076 | ||
1061 | void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | 1077 | void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
1062 | { | 1078 | { |
@@ -1071,11 +1087,12 @@ void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
1071 | priv->staging_rxon.channel = csa->channel; | 1087 | priv->staging_rxon.channel = csa->channel; |
1072 | IWL_DEBUG_11H(priv, "CSA notif: channel %d\n", | 1088 | IWL_DEBUG_11H(priv, "CSA notif: channel %d\n", |
1073 | le16_to_cpu(csa->channel)); | 1089 | le16_to_cpu(csa->channel)); |
1074 | } else | 1090 | iwl_chswitch_done(priv, true); |
1091 | } else { | ||
1075 | IWL_ERR(priv, "CSA notif (fail) : channel %d\n", | 1092 | IWL_ERR(priv, "CSA notif (fail) : channel %d\n", |
1076 | le16_to_cpu(csa->channel)); | 1093 | le16_to_cpu(csa->channel)); |
1077 | 1094 | iwl_chswitch_done(priv, false); | |
1078 | priv->switch_rxon.switch_in_progress = false; | 1095 | } |
1079 | } | 1096 | } |
1080 | } | 1097 | } |
1081 | EXPORT_SYMBOL(iwl_rx_csa); | 1098 | EXPORT_SYMBOL(iwl_rx_csa); |
@@ -1502,130 +1519,6 @@ int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear) | |||
1502 | } | 1519 | } |
1503 | EXPORT_SYMBOL(iwl_send_statistics_request); | 1520 | EXPORT_SYMBOL(iwl_send_statistics_request); |
1504 | 1521 | ||
1505 | /** | ||
1506 | * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host, | ||
1507 | * using sample data 100 bytes apart. If these sample points are good, | ||
1508 | * it's a pretty good bet that everything between them is good, too. | ||
1509 | */ | ||
1510 | static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len) | ||
1511 | { | ||
1512 | u32 val; | ||
1513 | int ret = 0; | ||
1514 | u32 errcnt = 0; | ||
1515 | u32 i; | ||
1516 | |||
1517 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); | ||
1518 | |||
1519 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { | ||
1520 | /* read data comes through single port, auto-incr addr */ | ||
1521 | /* NOTE: Use the debugless read so we don't flood kernel log | ||
1522 | * if IWL_DL_IO is set */ | ||
1523 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, | ||
1524 | i + IWL49_RTC_INST_LOWER_BOUND); | ||
1525 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
1526 | if (val != le32_to_cpu(*image)) { | ||
1527 | ret = -EIO; | ||
1528 | errcnt++; | ||
1529 | if (errcnt >= 3) | ||
1530 | break; | ||
1531 | } | ||
1532 | } | ||
1533 | |||
1534 | return ret; | ||
1535 | } | ||
1536 | |||
1537 | /** | ||
1538 | * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host, | ||
1539 | * looking at all data. | ||
1540 | */ | ||
1541 | static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image, | ||
1542 | u32 len) | ||
1543 | { | ||
1544 | u32 val; | ||
1545 | u32 save_len = len; | ||
1546 | int ret = 0; | ||
1547 | u32 errcnt; | ||
1548 | |||
1549 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); | ||
1550 | |||
1551 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, | ||
1552 | IWL49_RTC_INST_LOWER_BOUND); | ||
1553 | |||
1554 | errcnt = 0; | ||
1555 | for (; len > 0; len -= sizeof(u32), image++) { | ||
1556 | /* read data comes through single port, auto-incr addr */ | ||
1557 | /* NOTE: Use the debugless read so we don't flood kernel log | ||
1558 | * if IWL_DL_IO is set */ | ||
1559 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
1560 | if (val != le32_to_cpu(*image)) { | ||
1561 | IWL_ERR(priv, "uCode INST section is invalid at " | ||
1562 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | ||
1563 | save_len - len, val, le32_to_cpu(*image)); | ||
1564 | ret = -EIO; | ||
1565 | errcnt++; | ||
1566 | if (errcnt >= 20) | ||
1567 | break; | ||
1568 | } | ||
1569 | } | ||
1570 | |||
1571 | if (!errcnt) | ||
1572 | IWL_DEBUG_INFO(priv, | ||
1573 | "ucode image in INSTRUCTION memory is good\n"); | ||
1574 | |||
1575 | return ret; | ||
1576 | } | ||
1577 | |||
1578 | /** | ||
1579 | * iwl_verify_ucode - determine which instruction image is in SRAM, | ||
1580 | * and verify its contents | ||
1581 | */ | ||
1582 | int iwl_verify_ucode(struct iwl_priv *priv) | ||
1583 | { | ||
1584 | __le32 *image; | ||
1585 | u32 len; | ||
1586 | int ret; | ||
1587 | |||
1588 | /* Try bootstrap */ | ||
1589 | image = (__le32 *)priv->ucode_boot.v_addr; | ||
1590 | len = priv->ucode_boot.len; | ||
1591 | ret = iwlcore_verify_inst_sparse(priv, image, len); | ||
1592 | if (!ret) { | ||
1593 | IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n"); | ||
1594 | return 0; | ||
1595 | } | ||
1596 | |||
1597 | /* Try initialize */ | ||
1598 | image = (__le32 *)priv->ucode_init.v_addr; | ||
1599 | len = priv->ucode_init.len; | ||
1600 | ret = iwlcore_verify_inst_sparse(priv, image, len); | ||
1601 | if (!ret) { | ||
1602 | IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n"); | ||
1603 | return 0; | ||
1604 | } | ||
1605 | |||
1606 | /* Try runtime/protocol */ | ||
1607 | image = (__le32 *)priv->ucode_code.v_addr; | ||
1608 | len = priv->ucode_code.len; | ||
1609 | ret = iwlcore_verify_inst_sparse(priv, image, len); | ||
1610 | if (!ret) { | ||
1611 | IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n"); | ||
1612 | return 0; | ||
1613 | } | ||
1614 | |||
1615 | IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); | ||
1616 | |||
1617 | /* Since nothing seems to match, show first several data entries in | ||
1618 | * instruction SRAM, so maybe visual inspection will give a clue. | ||
1619 | * Selection of bootstrap image (vs. other images) is arbitrary. */ | ||
1620 | image = (__le32 *)priv->ucode_boot.v_addr; | ||
1621 | len = priv->ucode_boot.len; | ||
1622 | ret = iwl_verify_inst_full(priv, image, len); | ||
1623 | |||
1624 | return ret; | ||
1625 | } | ||
1626 | EXPORT_SYMBOL(iwl_verify_ucode); | ||
1627 | |||
1628 | |||
1629 | void iwl_rf_kill_ct_config(struct iwl_priv *priv) | 1522 | void iwl_rf_kill_ct_config(struct iwl_priv *priv) |
1630 | { | 1523 | { |
1631 | struct iwl_ct_kill_config cmd; | 1524 | struct iwl_ct_kill_config cmd; |
@@ -2046,8 +1939,6 @@ static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
2046 | if (priv->cfg->ops->hcmd->set_rxon_chain) | 1939 | if (priv->cfg->ops->hcmd->set_rxon_chain) |
2047 | priv->cfg->ops->hcmd->set_rxon_chain(priv); | 1940 | priv->cfg->ops->hcmd->set_rxon_chain(priv); |
2048 | 1941 | ||
2049 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | ||
2050 | |||
2051 | return iwlcore_commit_rxon(priv); | 1942 | return iwlcore_commit_rxon(priv); |
2052 | } | 1943 | } |
2053 | 1944 | ||
@@ -2056,7 +1947,8 @@ int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) | |||
2056 | struct iwl_priv *priv = hw->priv; | 1947 | struct iwl_priv *priv = hw->priv; |
2057 | int err = 0; | 1948 | int err = 0; |
2058 | 1949 | ||
2059 | IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type); | 1950 | IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n", |
1951 | vif->type, vif->addr); | ||
2060 | 1952 | ||
2061 | mutex_lock(&priv->mutex); | 1953 | mutex_lock(&priv->mutex); |
2062 | 1954 | ||
@@ -2074,9 +1966,6 @@ int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) | |||
2074 | priv->vif = vif; | 1966 | priv->vif = vif; |
2075 | priv->iw_mode = vif->type; | 1967 | priv->iw_mode = vif->type; |
2076 | 1968 | ||
2077 | IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr); | ||
2078 | memcpy(priv->mac_addr, vif->addr, ETH_ALEN); | ||
2079 | |||
2080 | err = iwl_set_mode(priv, vif); | 1969 | err = iwl_set_mode(priv, vif); |
2081 | if (err) | 1970 | if (err) |
2082 | goto out_err; | 1971 | goto out_err; |
@@ -2110,6 +1999,11 @@ void iwl_mac_remove_interface(struct ieee80211_hw *hw, | |||
2110 | } | 1999 | } |
2111 | if (priv->vif == vif) { | 2000 | if (priv->vif == vif) { |
2112 | priv->vif = NULL; | 2001 | priv->vif = NULL; |
2002 | if (priv->scan_vif == vif) { | ||
2003 | ieee80211_scan_completed(priv->hw, true); | ||
2004 | priv->scan_vif = NULL; | ||
2005 | priv->scan_request = NULL; | ||
2006 | } | ||
2113 | memset(priv->bssid, 0, ETH_ALEN); | 2007 | memset(priv->bssid, 0, ETH_ALEN); |
2114 | } | 2008 | } |
2115 | mutex_unlock(&priv->mutex); | 2009 | mutex_unlock(&priv->mutex); |
@@ -2210,22 +2104,7 @@ int iwl_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
2210 | 2104 | ||
2211 | iwl_set_flags_for_band(priv, conf->channel->band, priv->vif); | 2105 | iwl_set_flags_for_band(priv, conf->channel->band, priv->vif); |
2212 | spin_unlock_irqrestore(&priv->lock, flags); | 2106 | spin_unlock_irqrestore(&priv->lock, flags); |
2213 | if (iwl_is_associated(priv) && | 2107 | |
2214 | (le16_to_cpu(priv->active_rxon.channel) != ch) && | ||
2215 | priv->cfg->ops->lib->set_channel_switch) { | ||
2216 | iwl_set_rate(priv); | ||
2217 | /* | ||
2218 | * at this point, staging_rxon has the | ||
2219 | * configuration for channel switch | ||
2220 | */ | ||
2221 | ret = priv->cfg->ops->lib->set_channel_switch(priv, | ||
2222 | ch); | ||
2223 | if (!ret) { | ||
2224 | iwl_print_rx_config_cmd(priv); | ||
2225 | goto out; | ||
2226 | } | ||
2227 | priv->switch_rxon.switch_in_progress = false; | ||
2228 | } | ||
2229 | set_ch_out: | 2108 | set_ch_out: |
2230 | /* The list of supported rates and rate mask can be different | 2109 | /* The list of supported rates and rate mask can be different |
2231 | * for each band; since the band may have changed, reset | 2110 | * for each band; since the band may have changed, reset |
@@ -2583,7 +2462,7 @@ void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len) | |||
2583 | EXPORT_SYMBOL(iwl_update_stats); | 2462 | EXPORT_SYMBOL(iwl_update_stats); |
2584 | #endif | 2463 | #endif |
2585 | 2464 | ||
2586 | const static char *get_csr_string(int cmd) | 2465 | static const char *get_csr_string(int cmd) |
2587 | { | 2466 | { |
2588 | switch (cmd) { | 2467 | switch (cmd) { |
2589 | IWL_CMD(CSR_HW_IF_CONFIG_REG); | 2468 | IWL_CMD(CSR_HW_IF_CONFIG_REG); |
@@ -2654,7 +2533,7 @@ void iwl_dump_csr(struct iwl_priv *priv) | |||
2654 | } | 2533 | } |
2655 | EXPORT_SYMBOL(iwl_dump_csr); | 2534 | EXPORT_SYMBOL(iwl_dump_csr); |
2656 | 2535 | ||
2657 | const static char *get_fh_string(int cmd) | 2536 | static const char *get_fh_string(int cmd) |
2658 | { | 2537 | { |
2659 | switch (cmd) { | 2538 | switch (cmd) { |
2660 | IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG); | 2539 | IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG); |
@@ -2876,6 +2755,61 @@ void iwl_bg_monitor_recover(unsigned long data) | |||
2876 | } | 2755 | } |
2877 | EXPORT_SYMBOL(iwl_bg_monitor_recover); | 2756 | EXPORT_SYMBOL(iwl_bg_monitor_recover); |
2878 | 2757 | ||
2758 | |||
2759 | /* | ||
2760 | * extended beacon time format | ||
2761 | * time in usec will be changed into a 32-bit value in extended:internal format | ||
2762 | * the extended part is the beacon counts | ||
2763 | * the internal part is the time in usec within one beacon interval | ||
2764 | */ | ||
2765 | u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval) | ||
2766 | { | ||
2767 | u32 quot; | ||
2768 | u32 rem; | ||
2769 | u32 interval = beacon_interval * TIME_UNIT; | ||
2770 | |||
2771 | if (!interval || !usec) | ||
2772 | return 0; | ||
2773 | |||
2774 | quot = (usec / interval) & | ||
2775 | (iwl_beacon_time_mask_high(priv, | ||
2776 | priv->hw_params.beacon_time_tsf_bits) >> | ||
2777 | priv->hw_params.beacon_time_tsf_bits); | ||
2778 | rem = (usec % interval) & iwl_beacon_time_mask_low(priv, | ||
2779 | priv->hw_params.beacon_time_tsf_bits); | ||
2780 | |||
2781 | return (quot << priv->hw_params.beacon_time_tsf_bits) + rem; | ||
2782 | } | ||
2783 | EXPORT_SYMBOL(iwl_usecs_to_beacons); | ||
2784 | |||
2785 | /* base is usually what we get from ucode with each received frame, | ||
2786 | * the same as HW timer counter counting down | ||
2787 | */ | ||
2788 | __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base, | ||
2789 | u32 addon, u32 beacon_interval) | ||
2790 | { | ||
2791 | u32 base_low = base & iwl_beacon_time_mask_low(priv, | ||
2792 | priv->hw_params.beacon_time_tsf_bits); | ||
2793 | u32 addon_low = addon & iwl_beacon_time_mask_low(priv, | ||
2794 | priv->hw_params.beacon_time_tsf_bits); | ||
2795 | u32 interval = beacon_interval * TIME_UNIT; | ||
2796 | u32 res = (base & iwl_beacon_time_mask_high(priv, | ||
2797 | priv->hw_params.beacon_time_tsf_bits)) + | ||
2798 | (addon & iwl_beacon_time_mask_high(priv, | ||
2799 | priv->hw_params.beacon_time_tsf_bits)); | ||
2800 | |||
2801 | if (base_low > addon_low) | ||
2802 | res += base_low - addon_low; | ||
2803 | else if (base_low < addon_low) { | ||
2804 | res += interval + base_low - addon_low; | ||
2805 | res += (1 << priv->hw_params.beacon_time_tsf_bits); | ||
2806 | } else | ||
2807 | res += (1 << priv->hw_params.beacon_time_tsf_bits); | ||
2808 | |||
2809 | return cpu_to_le32(res); | ||
2810 | } | ||
2811 | EXPORT_SYMBOL(iwl_add_beacon_time); | ||
2812 | |||
2879 | #ifdef CONFIG_PM | 2813 | #ifdef CONFIG_PM |
2880 | 2814 | ||
2881 | int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state) | 2815 | int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h index 31775bd9c361..76288c56a7d7 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-core.h | |||
@@ -79,6 +79,8 @@ struct iwl_cmd; | |||
79 | .subvendor = PCI_ANY_ID, .subdevice = (subdev), \ | 79 | .subvendor = PCI_ANY_ID, .subdevice = (subdev), \ |
80 | .driver_data = (kernel_ulong_t)&(cfg) | 80 | .driver_data = (kernel_ulong_t)&(cfg) |
81 | 81 | ||
82 | #define TIME_UNIT 1024 | ||
83 | |||
82 | #define IWL_SKU_G 0x1 | 84 | #define IWL_SKU_G 0x1 |
83 | #define IWL_SKU_A 0x2 | 85 | #define IWL_SKU_A 0x2 |
84 | #define IWL_SKU_N 0x8 | 86 | #define IWL_SKU_N 0x8 |
@@ -173,7 +175,8 @@ struct iwl_lib_ops { | |||
173 | void (*dump_nic_error_log)(struct iwl_priv *priv); | 175 | void (*dump_nic_error_log)(struct iwl_priv *priv); |
174 | void (*dump_csr)(struct iwl_priv *priv); | 176 | void (*dump_csr)(struct iwl_priv *priv); |
175 | int (*dump_fh)(struct iwl_priv *priv, char **buf, bool display); | 177 | int (*dump_fh)(struct iwl_priv *priv, char **buf, bool display); |
176 | int (*set_channel_switch)(struct iwl_priv *priv, u16 channel); | 178 | int (*set_channel_switch)(struct iwl_priv *priv, |
179 | struct ieee80211_channel_switch *ch_switch); | ||
177 | /* power management */ | 180 | /* power management */ |
178 | struct iwl_apm_ops apm_ops; | 181 | struct iwl_apm_ops apm_ops; |
179 | 182 | ||
@@ -325,7 +328,8 @@ struct iwl_cfg { | |||
325 | const bool ucode_tracing; | 328 | const bool ucode_tracing; |
326 | const bool sensitivity_calib_by_driver; | 329 | const bool sensitivity_calib_by_driver; |
327 | const bool chain_noise_calib_by_driver; | 330 | const bool chain_noise_calib_by_driver; |
328 | u8 scan_antennas[IEEE80211_NUM_BANDS]; | 331 | u8 scan_rx_antennas[IEEE80211_NUM_BANDS]; |
332 | u8 scan_tx_antennas[IEEE80211_NUM_BANDS]; | ||
329 | }; | 333 | }; |
330 | 334 | ||
331 | /*************************** | 335 | /*************************** |
@@ -343,6 +347,9 @@ int iwl_check_rxon_cmd(struct iwl_priv *priv); | |||
343 | int iwl_full_rxon_required(struct iwl_priv *priv); | 347 | int iwl_full_rxon_required(struct iwl_priv *priv); |
344 | void iwl_set_rxon_chain(struct iwl_priv *priv); | 348 | void iwl_set_rxon_chain(struct iwl_priv *priv); |
345 | int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch); | 349 | int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch); |
350 | void iwl_set_flags_for_band(struct iwl_priv *priv, | ||
351 | enum ieee80211_band band, | ||
352 | struct ieee80211_vif *vif); | ||
346 | u8 iwl_get_single_channel_number(struct iwl_priv *priv, | 353 | u8 iwl_get_single_channel_number(struct iwl_priv *priv, |
347 | enum ieee80211_band band); | 354 | enum ieee80211_band band); |
348 | void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf); | 355 | void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf); |
@@ -350,6 +357,7 @@ u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv, | |||
350 | struct ieee80211_sta_ht_cap *sta_ht_inf); | 357 | struct ieee80211_sta_ht_cap *sta_ht_inf); |
351 | void iwl_connection_init_rx_config(struct iwl_priv *priv, | 358 | void iwl_connection_init_rx_config(struct iwl_priv *priv, |
352 | struct ieee80211_vif *vif); | 359 | struct ieee80211_vif *vif); |
360 | void iwl_set_rate(struct iwl_priv *priv); | ||
353 | int iwl_set_decrypted_flag(struct iwl_priv *priv, | 361 | int iwl_set_decrypted_flag(struct iwl_priv *priv, |
354 | struct ieee80211_hdr *hdr, | 362 | struct ieee80211_hdr *hdr, |
355 | u32 decrypt_res, | 363 | u32 decrypt_res, |
@@ -461,6 +469,7 @@ void iwl_rx_statistics(struct iwl_priv *priv, | |||
461 | struct iwl_rx_mem_buffer *rxb); | 469 | struct iwl_rx_mem_buffer *rxb); |
462 | void iwl_reply_statistics(struct iwl_priv *priv, | 470 | void iwl_reply_statistics(struct iwl_priv *priv, |
463 | struct iwl_rx_mem_buffer *rxb); | 471 | struct iwl_rx_mem_buffer *rxb); |
472 | void iwl_chswitch_done(struct iwl_priv *priv, bool is_success); | ||
464 | void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb); | 473 | void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb); |
465 | 474 | ||
466 | /* TX helpers */ | 475 | /* TX helpers */ |
@@ -474,8 +483,6 @@ int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, | |||
474 | dma_addr_t addr, u16 len, u8 reset, u8 pad); | 483 | dma_addr_t addr, u16 len, u8 reset, u8 pad); |
475 | int iwl_hw_tx_queue_init(struct iwl_priv *priv, | 484 | int iwl_hw_tx_queue_init(struct iwl_priv *priv, |
476 | struct iwl_tx_queue *txq); | 485 | struct iwl_tx_queue *txq); |
477 | void iwl_free_tfds_in_queue(struct iwl_priv *priv, | ||
478 | int sta_id, int tid, int freed); | ||
479 | void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq); | 486 | void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq); |
480 | int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, | 487 | int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, |
481 | int slots_num, u32 txq_id); | 488 | int slots_num, u32 txq_id); |
@@ -495,7 +502,7 @@ int iwl_hwrate_to_plcp_idx(u32 rate_n_flags); | |||
495 | 502 | ||
496 | u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv); | 503 | u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv); |
497 | 504 | ||
498 | u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant_idx); | 505 | u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant_idx, u8 valid); |
499 | 506 | ||
500 | static inline u32 iwl_ant_idx_to_flags(u8 ant_idx) | 507 | static inline u32 iwl_ant_idx_to_flags(u8 ant_idx) |
501 | { | 508 | { |
@@ -528,7 +535,7 @@ void iwl_bg_start_internal_scan(struct work_struct *work); | |||
528 | void iwl_internal_short_hw_scan(struct iwl_priv *priv); | 535 | void iwl_internal_short_hw_scan(struct iwl_priv *priv); |
529 | int iwl_force_reset(struct iwl_priv *priv, int mode); | 536 | int iwl_force_reset(struct iwl_priv *priv, int mode); |
530 | u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame, | 537 | u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame, |
531 | const u8 *ie, int ie_len, int left); | 538 | const u8 *ta, const u8 *ie, int ie_len, int left); |
532 | void iwl_setup_rx_scan_handlers(struct iwl_priv *priv); | 539 | void iwl_setup_rx_scan_handlers(struct iwl_priv *priv); |
533 | u16 iwl_get_active_dwell_time(struct iwl_priv *priv, | 540 | u16 iwl_get_active_dwell_time(struct iwl_priv *priv, |
534 | enum ieee80211_band band, | 541 | enum ieee80211_band band, |
@@ -595,6 +602,9 @@ static inline u16 iwl_pcie_link_ctl(struct iwl_priv *priv) | |||
595 | } | 602 | } |
596 | 603 | ||
597 | void iwl_bg_monitor_recover(unsigned long data); | 604 | void iwl_bg_monitor_recover(unsigned long data); |
605 | u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval); | ||
606 | __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base, | ||
607 | u32 addon, u32 beacon_interval); | ||
598 | 608 | ||
599 | #ifdef CONFIG_PM | 609 | #ifdef CONFIG_PM |
600 | int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state); | 610 | int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state); |
@@ -693,7 +703,6 @@ extern void iwl_rf_kill_ct_config(struct iwl_priv *priv); | |||
693 | extern void iwl_send_bt_config(struct iwl_priv *priv); | 703 | extern void iwl_send_bt_config(struct iwl_priv *priv); |
694 | extern int iwl_send_statistics_request(struct iwl_priv *priv, | 704 | extern int iwl_send_statistics_request(struct iwl_priv *priv, |
695 | u8 flags, bool clear); | 705 | u8 flags, bool clear); |
696 | extern int iwl_verify_ucode(struct iwl_priv *priv); | ||
697 | extern int iwl_send_lq_cmd(struct iwl_priv *priv, | 706 | extern int iwl_send_lq_cmd(struct iwl_priv *priv, |
698 | struct iwl_link_quality_cmd *lq, u8 flags, bool init); | 707 | struct iwl_link_quality_cmd *lq, u8 flags, bool init); |
699 | void iwl_apm_stop(struct iwl_priv *priv); | 708 | void iwl_apm_stop(struct iwl_priv *priv); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c index 9659c5d01df9..d9f21bb9d75d 100644 --- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c +++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c | |||
@@ -106,27 +106,6 @@ static const struct file_operations iwl_dbgfs_##name##_ops = { \ | |||
106 | .open = iwl_dbgfs_open_file_generic, \ | 106 | .open = iwl_dbgfs_open_file_generic, \ |
107 | }; | 107 | }; |
108 | 108 | ||
109 | int iwl_dbgfs_statistics_flag(struct iwl_priv *priv, char *buf, int bufsz) | ||
110 | { | ||
111 | int p = 0; | ||
112 | |||
113 | p += scnprintf(buf + p, bufsz - p, "Statistics Flag(0x%X):\n", | ||
114 | le32_to_cpu(priv->statistics.flag)); | ||
115 | if (le32_to_cpu(priv->statistics.flag) & UCODE_STATISTICS_CLEAR_MSK) | ||
116 | p += scnprintf(buf + p, bufsz - p, | ||
117 | "\tStatistics have been cleared\n"); | ||
118 | p += scnprintf(buf + p, bufsz - p, "\tOperational Frequency: %s\n", | ||
119 | (le32_to_cpu(priv->statistics.flag) & | ||
120 | UCODE_STATISTICS_FREQUENCY_MSK) | ||
121 | ? "2.4 GHz" : "5.2 GHz"); | ||
122 | p += scnprintf(buf + p, bufsz - p, "\tTGj Narrow Band: %s\n", | ||
123 | (le32_to_cpu(priv->statistics.flag) & | ||
124 | UCODE_STATISTICS_NARROW_BAND_MSK) | ||
125 | ? "enabled" : "disabled"); | ||
126 | return p; | ||
127 | } | ||
128 | EXPORT_SYMBOL(iwl_dbgfs_statistics_flag); | ||
129 | |||
130 | static ssize_t iwl_dbgfs_tx_statistics_read(struct file *file, | 109 | static ssize_t iwl_dbgfs_tx_statistics_read(struct file *file, |
131 | char __user *user_buf, | 110 | char __user *user_buf, |
132 | size_t count, loff_t *ppos) { | 111 | size_t count, loff_t *ppos) { |
@@ -330,45 +309,35 @@ static ssize_t iwl_dbgfs_stations_read(struct file *file, char __user *user_buf, | |||
330 | 309 | ||
331 | for (i = 0; i < max_sta; i++) { | 310 | for (i = 0; i < max_sta; i++) { |
332 | station = &priv->stations[i]; | 311 | station = &priv->stations[i]; |
333 | if (station->used) { | 312 | if (!station->used) |
334 | pos += scnprintf(buf + pos, bufsz - pos, | 313 | continue; |
335 | "station %d:\ngeneral data:\n", i+1); | 314 | pos += scnprintf(buf + pos, bufsz - pos, |
336 | pos += scnprintf(buf + pos, bufsz - pos, "id: %u\n", | 315 | "station %d - addr: %pM, flags: %#x\n", |
337 | station->sta.sta.sta_id); | 316 | i, station->sta.sta.addr, |
338 | pos += scnprintf(buf + pos, bufsz - pos, "mode: %u\n", | 317 | station->sta.station_flags_msk); |
339 | station->sta.mode); | 318 | pos += scnprintf(buf + pos, bufsz - pos, |
340 | pos += scnprintf(buf + pos, bufsz - pos, | 319 | "TID\tseq_num\ttxq_id\tframes\ttfds\t"); |
341 | "flags: 0x%x\n", | 320 | pos += scnprintf(buf + pos, bufsz - pos, |
342 | station->sta.station_flags_msk); | 321 | "start_idx\tbitmap\t\t\trate_n_flags\n"); |
343 | pos += scnprintf(buf + pos, bufsz - pos, "tid data:\n"); | ||
344 | pos += scnprintf(buf + pos, bufsz - pos, | ||
345 | "seq_num\t\ttxq_id"); | ||
346 | pos += scnprintf(buf + pos, bufsz - pos, | ||
347 | "\tframe_count\twait_for_ba\t"); | ||
348 | pos += scnprintf(buf + pos, bufsz - pos, | ||
349 | "start_idx\tbitmap0\t"); | ||
350 | pos += scnprintf(buf + pos, bufsz - pos, | ||
351 | "bitmap1\trate_n_flags"); | ||
352 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); | ||
353 | 322 | ||
354 | for (j = 0; j < MAX_TID_COUNT; j++) { | 323 | for (j = 0; j < MAX_TID_COUNT; j++) { |
355 | pos += scnprintf(buf + pos, bufsz - pos, | 324 | pos += scnprintf(buf + pos, bufsz - pos, |
356 | "[%d]:\t\t%u", j, | 325 | "%d:\t%#x\t%#x\t%u\t%u\t%u\t\t%#.16llx\t%#x", |
357 | station->tid[j].seq_number); | 326 | j, station->tid[j].seq_number, |
358 | pos += scnprintf(buf + pos, bufsz - pos, | 327 | station->tid[j].agg.txq_id, |
359 | "\t%u\t\t%u\t\t%u\t\t", | 328 | station->tid[j].agg.frame_count, |
360 | station->tid[j].agg.txq_id, | 329 | station->tid[j].tfds_in_queue, |
361 | station->tid[j].agg.frame_count, | 330 | station->tid[j].agg.start_idx, |
362 | station->tid[j].agg.wait_for_ba); | 331 | station->tid[j].agg.bitmap, |
332 | station->tid[j].agg.rate_n_flags); | ||
333 | |||
334 | if (station->tid[j].agg.wait_for_ba) | ||
363 | pos += scnprintf(buf + pos, bufsz - pos, | 335 | pos += scnprintf(buf + pos, bufsz - pos, |
364 | "%u\t%llu\t%u", | 336 | " - waitforba"); |
365 | station->tid[j].agg.start_idx, | ||
366 | (unsigned long long)station->tid[j].agg.bitmap, | ||
367 | station->tid[j].agg.rate_n_flags); | ||
368 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); | ||
369 | } | ||
370 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); | 337 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); |
371 | } | 338 | } |
339 | |||
340 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); | ||
372 | } | 341 | } |
373 | 342 | ||
374 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 343 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h index f3f3473c5c7e..fc6072cdd96f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-dev.h +++ b/drivers/net/wireless/iwlwifi/iwl-dev.h | |||
@@ -48,25 +48,6 @@ | |||
48 | #include "iwl-power.h" | 48 | #include "iwl-power.h" |
49 | #include "iwl-agn-rs.h" | 49 | #include "iwl-agn-rs.h" |
50 | 50 | ||
51 | /* configuration for the iwl4965 */ | ||
52 | extern struct iwl_cfg iwl4965_agn_cfg; | ||
53 | extern struct iwl_cfg iwl5300_agn_cfg; | ||
54 | extern struct iwl_cfg iwl5100_agn_cfg; | ||
55 | extern struct iwl_cfg iwl5350_agn_cfg; | ||
56 | extern struct iwl_cfg iwl5100_bgn_cfg; | ||
57 | extern struct iwl_cfg iwl5100_abg_cfg; | ||
58 | extern struct iwl_cfg iwl5150_agn_cfg; | ||
59 | extern struct iwl_cfg iwl5150_abg_cfg; | ||
60 | extern struct iwl_cfg iwl6000g2a_2agn_cfg; | ||
61 | extern struct iwl_cfg iwl6000i_2agn_cfg; | ||
62 | extern struct iwl_cfg iwl6000i_2abg_cfg; | ||
63 | extern struct iwl_cfg iwl6000i_2bg_cfg; | ||
64 | extern struct iwl_cfg iwl6000_3agn_cfg; | ||
65 | extern struct iwl_cfg iwl6050_2agn_cfg; | ||
66 | extern struct iwl_cfg iwl6050_2abg_cfg; | ||
67 | extern struct iwl_cfg iwl1000_bgn_cfg; | ||
68 | extern struct iwl_cfg iwl1000_bg_cfg; | ||
69 | |||
70 | struct iwl_tx_queue; | 51 | struct iwl_tx_queue; |
71 | 52 | ||
72 | /* CT-KILL constants */ | 53 | /* CT-KILL constants */ |
@@ -133,8 +114,8 @@ struct iwl_cmd_meta { | |||
133 | * structure is stored at the end of the shared queue memory. */ | 114 | * structure is stored at the end of the shared queue memory. */ |
134 | u32 flags; | 115 | u32 flags; |
135 | 116 | ||
136 | DECLARE_PCI_UNMAP_ADDR(mapping) | 117 | DEFINE_DMA_UNMAP_ADDR(mapping); |
137 | DECLARE_PCI_UNMAP_LEN(len) | 118 | DEFINE_DMA_UNMAP_LEN(len); |
138 | }; | 119 | }; |
139 | 120 | ||
140 | /* | 121 | /* |
@@ -157,11 +138,11 @@ struct iwl_queue { | |||
157 | * space more than this */ | 138 | * space more than this */ |
158 | int high_mark; /* high watermark, stop queue if free | 139 | int high_mark; /* high watermark, stop queue if free |
159 | * space less than this */ | 140 | * space less than this */ |
160 | } __attribute__ ((packed)); | 141 | } __packed; |
161 | 142 | ||
162 | /* One for each TFD */ | 143 | /* One for each TFD */ |
163 | struct iwl_tx_info { | 144 | struct iwl_tx_info { |
164 | struct sk_buff *skb[IWL_NUM_OF_TBS - 1]; | 145 | struct sk_buff *skb; |
165 | }; | 146 | }; |
166 | 147 | ||
167 | /** | 148 | /** |
@@ -343,8 +324,8 @@ struct iwl_device_cmd { | |||
343 | struct iwl_tx_cmd tx; | 324 | struct iwl_tx_cmd tx; |
344 | struct iwl6000_channel_switch_cmd chswitch; | 325 | struct iwl6000_channel_switch_cmd chswitch; |
345 | u8 payload[DEF_CMD_PAYLOAD_SIZE]; | 326 | u8 payload[DEF_CMD_PAYLOAD_SIZE]; |
346 | } __attribute__ ((packed)) cmd; | 327 | } __packed cmd; |
347 | } __attribute__ ((packed)); | 328 | } __packed; |
348 | 329 | ||
349 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) | 330 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) |
350 | 331 | ||
@@ -433,7 +414,7 @@ struct iwl_ht_agg { | |||
433 | 414 | ||
434 | 415 | ||
435 | struct iwl_tid_data { | 416 | struct iwl_tid_data { |
436 | u16 seq_number; | 417 | u16 seq_number; /* agn only */ |
437 | u16 tfds_in_queue; | 418 | u16 tfds_in_queue; |
438 | struct iwl_ht_agg agg; | 419 | struct iwl_ht_agg agg; |
439 | }; | 420 | }; |
@@ -583,6 +564,12 @@ enum iwl_ucode_tlv_type { | |||
583 | IWL_UCODE_TLV_INIT_DATA = 4, | 564 | IWL_UCODE_TLV_INIT_DATA = 4, |
584 | IWL_UCODE_TLV_BOOT = 5, | 565 | IWL_UCODE_TLV_BOOT = 5, |
585 | IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */ | 566 | IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */ |
567 | IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8, | ||
568 | IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9, | ||
569 | IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10, | ||
570 | IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11, | ||
571 | IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12, | ||
572 | IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, | ||
586 | }; | 573 | }; |
587 | 574 | ||
588 | struct iwl_ucode_tlv { | 575 | struct iwl_ucode_tlv { |
@@ -590,7 +577,7 @@ struct iwl_ucode_tlv { | |||
590 | __le16 alternative; /* see comment */ | 577 | __le16 alternative; /* see comment */ |
591 | __le32 length; /* not including type/length fields */ | 578 | __le32 length; /* not including type/length fields */ |
592 | u8 data[0]; | 579 | u8 data[0]; |
593 | } __attribute__ ((packed)); | 580 | } __packed; |
594 | 581 | ||
595 | #define IWL_TLV_UCODE_MAGIC 0x0a4c5749 | 582 | #define IWL_TLV_UCODE_MAGIC 0x0a4c5749 |
596 | 583 | ||
@@ -675,6 +662,7 @@ struct iwl_sensitivity_ranges { | |||
675 | * @sw_crypto: 0 for hw, 1 for sw | 662 | * @sw_crypto: 0 for hw, 1 for sw |
676 | * @max_xxx_size: for ucode uses | 663 | * @max_xxx_size: for ucode uses |
677 | * @ct_kill_threshold: temperature threshold | 664 | * @ct_kill_threshold: temperature threshold |
665 | * @beacon_time_tsf_bits: number of valid tsf bits for beacon time | ||
678 | * @calib_init_cfg: setup initial calibrations for the hw | 666 | * @calib_init_cfg: setup initial calibrations for the hw |
679 | * @struct iwl_sensitivity_ranges: range of sensitivity values | 667 | * @struct iwl_sensitivity_ranges: range of sensitivity values |
680 | */ | 668 | */ |
@@ -701,6 +689,7 @@ struct iwl_hw_params { | |||
701 | u32 ct_kill_threshold; /* value in hw-dependent units */ | 689 | u32 ct_kill_threshold; /* value in hw-dependent units */ |
702 | u32 ct_kill_exit_threshold; /* value in hw-dependent units */ | 690 | u32 ct_kill_exit_threshold; /* value in hw-dependent units */ |
703 | /* for 1000, 6000 series and up */ | 691 | /* for 1000, 6000 series and up */ |
692 | u16 beacon_time_tsf_bits; | ||
704 | u32 calib_init_cfg; | 693 | u32 calib_init_cfg; |
705 | const struct iwl_sensitivity_ranges *sens; | 694 | const struct iwl_sensitivity_ranges *sens; |
706 | }; | 695 | }; |
@@ -1075,6 +1064,20 @@ struct iwl_force_reset { | |||
1075 | unsigned long last_force_reset_jiffies; | 1064 | unsigned long last_force_reset_jiffies; |
1076 | }; | 1065 | }; |
1077 | 1066 | ||
1067 | /* extend beacon time format bit shifting */ | ||
1068 | /* | ||
1069 | * for _3945 devices | ||
1070 | * bits 31:24 - extended | ||
1071 | * bits 23:0 - interval | ||
1072 | */ | ||
1073 | #define IWL3945_EXT_BEACON_TIME_POS 24 | ||
1074 | /* | ||
1075 | * for _agn devices | ||
1076 | * bits 31:22 - extended | ||
1077 | * bits 21:0 - interval | ||
1078 | */ | ||
1079 | #define IWLAGN_EXT_BEACON_TIME_POS 22 | ||
1080 | |||
1078 | struct iwl_priv { | 1081 | struct iwl_priv { |
1079 | 1082 | ||
1080 | /* ieee device used by generic ieee processing code */ | 1083 | /* ieee device used by generic ieee processing code */ |
@@ -1109,7 +1112,7 @@ struct iwl_priv { | |||
1109 | /* force reset */ | 1112 | /* force reset */ |
1110 | struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET]; | 1113 | struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET]; |
1111 | 1114 | ||
1112 | /* we allocate array of iwl4965_channel_info for NIC's valid channels. | 1115 | /* we allocate array of iwl_channel_info for NIC's valid channels. |
1113 | * Access via channel # using indirect index array */ | 1116 | * Access via channel # using indirect index array */ |
1114 | struct iwl_channel_info *channel_info; /* channel info array */ | 1117 | struct iwl_channel_info *channel_info; /* channel info array */ |
1115 | u8 channel_count; /* # of channels */ | 1118 | u8 channel_count; /* # of channels */ |
@@ -1127,6 +1130,7 @@ struct iwl_priv { | |||
1127 | void *scan_cmd; | 1130 | void *scan_cmd; |
1128 | enum ieee80211_band scan_band; | 1131 | enum ieee80211_band scan_band; |
1129 | struct cfg80211_scan_request *scan_request; | 1132 | struct cfg80211_scan_request *scan_request; |
1133 | struct ieee80211_vif *scan_vif; | ||
1130 | bool is_internal_short_scan; | 1134 | bool is_internal_short_scan; |
1131 | u8 scan_tx_ant[IEEE80211_NUM_BANDS]; | 1135 | u8 scan_tx_ant[IEEE80211_NUM_BANDS]; |
1132 | u8 mgmt_tx_ant; | 1136 | u8 mgmt_tx_ant; |
@@ -1174,7 +1178,7 @@ struct iwl_priv { | |||
1174 | struct iwl_switch_rxon switch_rxon; | 1178 | struct iwl_switch_rxon switch_rxon; |
1175 | 1179 | ||
1176 | /* 1st responses from initialize and runtime uCode images. | 1180 | /* 1st responses from initialize and runtime uCode images. |
1177 | * 4965's initialize alive response contains some calibration data. */ | 1181 | * _agn's initialize alive response contains some calibration data. */ |
1178 | struct iwl_init_alive_resp card_alive_init; | 1182 | struct iwl_init_alive_resp card_alive_init; |
1179 | struct iwl_alive_resp card_alive; | 1183 | struct iwl_alive_resp card_alive; |
1180 | 1184 | ||
@@ -1221,7 +1225,7 @@ struct iwl_priv { | |||
1221 | struct iwl_tt_mgmt thermal_throttle; | 1225 | struct iwl_tt_mgmt thermal_throttle; |
1222 | 1226 | ||
1223 | struct iwl_notif_statistics statistics; | 1227 | struct iwl_notif_statistics statistics; |
1224 | #ifdef CONFIG_IWLWIFI_DEBUG | 1228 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
1225 | struct iwl_notif_statistics accum_statistics; | 1229 | struct iwl_notif_statistics accum_statistics; |
1226 | struct iwl_notif_statistics delta_statistics; | 1230 | struct iwl_notif_statistics delta_statistics; |
1227 | struct iwl_notif_statistics max_delta; | 1231 | struct iwl_notif_statistics max_delta; |
@@ -1229,9 +1233,10 @@ struct iwl_priv { | |||
1229 | 1233 | ||
1230 | /* context information */ | 1234 | /* context information */ |
1231 | u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */ | 1235 | u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */ |
1232 | u8 mac_addr[ETH_ALEN]; | ||
1233 | 1236 | ||
1234 | /*station table variables */ | 1237 | /* station table variables */ |
1238 | |||
1239 | /* Note: if lock and sta_lock are needed, lock must be acquired first */ | ||
1235 | spinlock_t sta_lock; | 1240 | spinlock_t sta_lock; |
1236 | int num_stations; | 1241 | int num_stations; |
1237 | struct iwl_station_entry stations[IWL_STATION_COUNT]; | 1242 | struct iwl_station_entry stations[IWL_STATION_COUNT]; |
@@ -1273,7 +1278,7 @@ struct iwl_priv { | |||
1273 | struct delayed_work rfkill_poll; | 1278 | struct delayed_work rfkill_poll; |
1274 | 1279 | ||
1275 | struct iwl3945_notif_statistics statistics; | 1280 | struct iwl3945_notif_statistics statistics; |
1276 | #ifdef CONFIG_IWLWIFI_DEBUG | 1281 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
1277 | struct iwl3945_notif_statistics accum_statistics; | 1282 | struct iwl3945_notif_statistics accum_statistics; |
1278 | struct iwl3945_notif_statistics delta_statistics; | 1283 | struct iwl3945_notif_statistics delta_statistics; |
1279 | struct iwl3945_notif_statistics max_delta; | 1284 | struct iwl3945_notif_statistics max_delta; |
@@ -1315,6 +1320,9 @@ struct iwl_priv { | |||
1315 | bool last_phy_res_valid; | 1320 | bool last_phy_res_valid; |
1316 | 1321 | ||
1317 | struct completion firmware_loading_complete; | 1322 | struct completion firmware_loading_complete; |
1323 | |||
1324 | u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; | ||
1325 | u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; | ||
1318 | } _agn; | 1326 | } _agn; |
1319 | #endif | 1327 | #endif |
1320 | }; | 1328 | }; |
@@ -1353,9 +1361,7 @@ struct iwl_priv { | |||
1353 | /* debugging info */ | 1361 | /* debugging info */ |
1354 | u32 debug_level; /* per device debugging will override global | 1362 | u32 debug_level; /* per device debugging will override global |
1355 | iwl_debug_level if set */ | 1363 | iwl_debug_level if set */ |
1356 | u32 framecnt_to_us; | 1364 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
1357 | atomic_t restrict_refcnt; | ||
1358 | bool disable_ht40; | ||
1359 | #ifdef CONFIG_IWLWIFI_DEBUGFS | 1365 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
1360 | /* debugfs */ | 1366 | /* debugfs */ |
1361 | u16 tx_traffic_idx; | 1367 | u16 tx_traffic_idx; |
@@ -1364,8 +1370,8 @@ struct iwl_priv { | |||
1364 | u8 *rx_traffic; | 1370 | u8 *rx_traffic; |
1365 | struct dentry *debugfs_dir; | 1371 | struct dentry *debugfs_dir; |
1366 | u32 dbgfs_sram_offset, dbgfs_sram_len; | 1372 | u32 dbgfs_sram_offset, dbgfs_sram_len; |
1373 | bool disable_ht40; | ||
1367 | #endif /* CONFIG_IWLWIFI_DEBUGFS */ | 1374 | #endif /* CONFIG_IWLWIFI_DEBUGFS */ |
1368 | #endif /* CONFIG_IWLWIFI_DEBUG */ | ||
1369 | 1375 | ||
1370 | struct work_struct txpower_work; | 1376 | struct work_struct txpower_work; |
1371 | u32 disable_sens_cal; | 1377 | u32 disable_sens_cal; |
@@ -1419,9 +1425,9 @@ static inline u32 iwl_get_debug_level(struct iwl_priv *priv) | |||
1419 | static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv, | 1425 | static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv, |
1420 | int txq_id, int idx) | 1426 | int txq_id, int idx) |
1421 | { | 1427 | { |
1422 | if (priv->txq[txq_id].txb[idx].skb[0]) | 1428 | if (priv->txq[txq_id].txb[idx].skb) |
1423 | return (struct ieee80211_hdr *)priv->txq[txq_id]. | 1429 | return (struct ieee80211_hdr *)priv->txq[txq_id]. |
1424 | txb[idx].skb[0]->data; | 1430 | txb[idx].skb->data; |
1425 | return NULL; | 1431 | return NULL; |
1426 | } | 1432 | } |
1427 | 1433 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h index 95aa202c85e3..5488006491a2 100644 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h | |||
@@ -118,7 +118,7 @@ enum { | |||
118 | struct iwl_eeprom_channel { | 118 | struct iwl_eeprom_channel { |
119 | u8 flags; /* EEPROM_CHANNEL_* flags copied from EEPROM */ | 119 | u8 flags; /* EEPROM_CHANNEL_* flags copied from EEPROM */ |
120 | s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */ | 120 | s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */ |
121 | } __attribute__ ((packed)); | 121 | } __packed; |
122 | 122 | ||
123 | /** | 123 | /** |
124 | * iwl_eeprom_enhanced_txpwr structure | 124 | * iwl_eeprom_enhanced_txpwr structure |
@@ -144,7 +144,7 @@ struct iwl_eeprom_enhanced_txpwr { | |||
144 | s8 reserved; | 144 | s8 reserved; |
145 | s8 mimo2_max; | 145 | s8 mimo2_max; |
146 | s8 mimo3_max; | 146 | s8 mimo3_max; |
147 | } __attribute__ ((packed)); | 147 | } __packed; |
148 | 148 | ||
149 | /* 3945 Specific */ | 149 | /* 3945 Specific */ |
150 | #define EEPROM_3945_EEPROM_VERSION (0x2f) | 150 | #define EEPROM_3945_EEPROM_VERSION (0x2f) |
@@ -312,7 +312,7 @@ struct iwl_eeprom_calib_measure { | |||
312 | u8 gain_idx; /* Index into gain table */ | 312 | u8 gain_idx; /* Index into gain table */ |
313 | u8 actual_pow; /* Measured RF output power, half-dBm */ | 313 | u8 actual_pow; /* Measured RF output power, half-dBm */ |
314 | s8 pa_det; /* Power amp detector level (not used) */ | 314 | s8 pa_det; /* Power amp detector level (not used) */ |
315 | } __attribute__ ((packed)); | 315 | } __packed; |
316 | 316 | ||
317 | 317 | ||
318 | /* | 318 | /* |
@@ -328,7 +328,7 @@ struct iwl_eeprom_calib_ch_info { | |||
328 | struct iwl_eeprom_calib_measure | 328 | struct iwl_eeprom_calib_measure |
329 | measurements[EEPROM_TX_POWER_TX_CHAINS] | 329 | measurements[EEPROM_TX_POWER_TX_CHAINS] |
330 | [EEPROM_TX_POWER_MEASUREMENTS]; | 330 | [EEPROM_TX_POWER_MEASUREMENTS]; |
331 | } __attribute__ ((packed)); | 331 | } __packed; |
332 | 332 | ||
333 | /* | 333 | /* |
334 | * txpower subband info. | 334 | * txpower subband info. |
@@ -345,7 +345,7 @@ struct iwl_eeprom_calib_subband_info { | |||
345 | u8 ch_to; /* channel number of highest channel in subband */ | 345 | u8 ch_to; /* channel number of highest channel in subband */ |
346 | struct iwl_eeprom_calib_ch_info ch1; | 346 | struct iwl_eeprom_calib_ch_info ch1; |
347 | struct iwl_eeprom_calib_ch_info ch2; | 347 | struct iwl_eeprom_calib_ch_info ch2; |
348 | } __attribute__ ((packed)); | 348 | } __packed; |
349 | 349 | ||
350 | 350 | ||
351 | /* | 351 | /* |
@@ -374,7 +374,7 @@ struct iwl_eeprom_calib_info { | |||
374 | __le16 voltage; /* signed */ | 374 | __le16 voltage; /* signed */ |
375 | struct iwl_eeprom_calib_subband_info | 375 | struct iwl_eeprom_calib_subband_info |
376 | band_info[EEPROM_TX_POWER_BANDS]; | 376 | band_info[EEPROM_TX_POWER_BANDS]; |
377 | } __attribute__ ((packed)); | 377 | } __packed; |
378 | 378 | ||
379 | 379 | ||
380 | #define ADDRESS_MSK 0x0000FFFF | 380 | #define ADDRESS_MSK 0x0000FFFF |
diff --git a/drivers/net/wireless/iwlwifi/iwl-fh.h b/drivers/net/wireless/iwlwifi/iwl-fh.h index 113c3669b9ce..a3fcbb5f2c70 100644 --- a/drivers/net/wireless/iwlwifi/iwl-fh.h +++ b/drivers/net/wireless/iwlwifi/iwl-fh.h | |||
@@ -449,7 +449,7 @@ struct iwl_rb_status { | |||
449 | __le16 finished_rb_num; | 449 | __le16 finished_rb_num; |
450 | __le16 finished_fr_nam; | 450 | __le16 finished_fr_nam; |
451 | __le32 __unused; /* 3945 only */ | 451 | __le32 __unused; /* 3945 only */ |
452 | } __attribute__ ((packed)); | 452 | } __packed; |
453 | 453 | ||
454 | 454 | ||
455 | #define TFD_QUEUE_SIZE_MAX (256) | 455 | #define TFD_QUEUE_SIZE_MAX (256) |
@@ -475,7 +475,7 @@ static inline u8 iwl_get_dma_hi_addr(dma_addr_t addr) | |||
475 | struct iwl_tfd_tb { | 475 | struct iwl_tfd_tb { |
476 | __le32 lo; | 476 | __le32 lo; |
477 | __le16 hi_n_len; | 477 | __le16 hi_n_len; |
478 | } __attribute__((packed)); | 478 | } __packed; |
479 | 479 | ||
480 | /** | 480 | /** |
481 | * struct iwl_tfd | 481 | * struct iwl_tfd |
@@ -510,7 +510,7 @@ struct iwl_tfd { | |||
510 | u8 num_tbs; | 510 | u8 num_tbs; |
511 | struct iwl_tfd_tb tbs[IWL_NUM_OF_TBS]; | 511 | struct iwl_tfd_tb tbs[IWL_NUM_OF_TBS]; |
512 | __le32 __pad; | 512 | __le32 __pad; |
513 | } __attribute__ ((packed)); | 513 | } __packed; |
514 | 514 | ||
515 | /* Keep Warm Size */ | 515 | /* Keep Warm Size */ |
516 | #define IWL_KW_SIZE 0x1000 /* 4k */ | 516 | #define IWL_KW_SIZE 0x1000 /* 4k */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-helpers.h b/drivers/net/wireless/iwlwifi/iwl-helpers.h index 3ff6b9d25a10..621abe3c5afc 100644 --- a/drivers/net/wireless/iwlwifi/iwl-helpers.h +++ b/drivers/net/wireless/iwlwifi/iwl-helpers.h | |||
@@ -92,6 +92,11 @@ static inline void iwl_free_fw_desc(struct pci_dev *pci_dev, | |||
92 | static inline int iwl_alloc_fw_desc(struct pci_dev *pci_dev, | 92 | static inline int iwl_alloc_fw_desc(struct pci_dev *pci_dev, |
93 | struct fw_desc *desc) | 93 | struct fw_desc *desc) |
94 | { | 94 | { |
95 | if (!desc->len) { | ||
96 | desc->v_addr = NULL; | ||
97 | return -EINVAL; | ||
98 | } | ||
99 | |||
95 | desc->v_addr = dma_alloc_coherent(&pci_dev->dev, desc->len, | 100 | desc->v_addr = dma_alloc_coherent(&pci_dev->dev, desc->len, |
96 | &desc->p_addr, GFP_KERNEL); | 101 | &desc->p_addr, GFP_KERNEL); |
97 | return (desc->v_addr != NULL) ? 0 : -ENOMEM; | 102 | return (desc->v_addr != NULL) ? 0 : -ENOMEM; |
@@ -170,4 +175,26 @@ static inline void iwl_enable_interrupts(struct iwl_priv *priv) | |||
170 | iwl_write32(priv, CSR_INT_MASK, priv->inta_mask); | 175 | iwl_write32(priv, CSR_INT_MASK, priv->inta_mask); |
171 | } | 176 | } |
172 | 177 | ||
178 | /** | ||
179 | * iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time | ||
180 | * @priv -- pointer to iwl_priv data structure | ||
181 | * @tsf_bits -- number of bits need to shift for masking) | ||
182 | */ | ||
183 | static inline u32 iwl_beacon_time_mask_low(struct iwl_priv *priv, | ||
184 | u16 tsf_bits) | ||
185 | { | ||
186 | return (1 << tsf_bits) - 1; | ||
187 | } | ||
188 | |||
189 | /** | ||
190 | * iwl_beacon_time_mask_high - mask of higher 32 bit of beacon time | ||
191 | * @priv -- pointer to iwl_priv data structure | ||
192 | * @tsf_bits -- number of bits need to shift for masking) | ||
193 | */ | ||
194 | static inline u32 iwl_beacon_time_mask_high(struct iwl_priv *priv, | ||
195 | u16 tsf_bits) | ||
196 | { | ||
197 | return ((1 << (32 - tsf_bits)) - 1) << tsf_bits; | ||
198 | } | ||
199 | |||
173 | #endif /* __iwl_helpers_h__ */ | 200 | #endif /* __iwl_helpers_h__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c index 0a5d7cf25196..5e32057d6938 100644 --- a/drivers/net/wireless/iwlwifi/iwl-rx.c +++ b/drivers/net/wireless/iwlwifi/iwl-rx.c | |||
@@ -286,7 +286,7 @@ static void iwl_rx_calc_noise(struct iwl_priv *priv) | |||
286 | last_rx_noise); | 286 | last_rx_noise); |
287 | } | 287 | } |
288 | 288 | ||
289 | #ifdef CONFIG_IWLWIFI_DEBUG | 289 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
290 | /* | 290 | /* |
291 | * based on the assumption of all statistics counter are in DWORD | 291 | * based on the assumption of all statistics counter are in DWORD |
292 | * FIXME: This function is for debugging, do not deal with | 292 | * FIXME: This function is for debugging, do not deal with |
@@ -448,7 +448,7 @@ void iwl_rx_statistics(struct iwl_priv *priv, | |||
448 | STATISTICS_REPLY_FLG_HT40_MODE_MSK) != | 448 | STATISTICS_REPLY_FLG_HT40_MODE_MSK) != |
449 | (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK))); | 449 | (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK))); |
450 | 450 | ||
451 | #ifdef CONFIG_IWLWIFI_DEBUG | 451 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
452 | iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats); | 452 | iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats); |
453 | #endif | 453 | #endif |
454 | iwl_recover_from_statistics(priv, pkt); | 454 | iwl_recover_from_statistics(priv, pkt); |
@@ -480,7 +480,7 @@ void iwl_reply_statistics(struct iwl_priv *priv, | |||
480 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | 480 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
481 | 481 | ||
482 | if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) { | 482 | if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) { |
483 | #ifdef CONFIG_IWLWIFI_DEBUG | 483 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
484 | memset(&priv->accum_statistics, 0, | 484 | memset(&priv->accum_statistics, 0, |
485 | sizeof(struct iwl_notif_statistics)); | 485 | sizeof(struct iwl_notif_statistics)); |
486 | memset(&priv->delta_statistics, 0, | 486 | memset(&priv->delta_statistics, 0, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c index 5d3f51ff2f0d..b8bcd48eb8fa 100644 --- a/drivers/net/wireless/iwlwifi/iwl-scan.c +++ b/drivers/net/wireless/iwlwifi/iwl-scan.c | |||
@@ -333,7 +333,8 @@ int iwl_mac_hw_scan(struct ieee80211_hw *hw, | |||
333 | goto out_unlock; | 333 | goto out_unlock; |
334 | } | 334 | } |
335 | 335 | ||
336 | if (test_bit(STATUS_SCANNING, &priv->status)) { | 336 | if (test_bit(STATUS_SCANNING, &priv->status) && |
337 | !priv->is_internal_short_scan) { | ||
337 | IWL_DEBUG_SCAN(priv, "Scan already in progress.\n"); | 338 | IWL_DEBUG_SCAN(priv, "Scan already in progress.\n"); |
338 | ret = -EAGAIN; | 339 | ret = -EAGAIN; |
339 | goto out_unlock; | 340 | goto out_unlock; |
@@ -348,8 +349,16 @@ int iwl_mac_hw_scan(struct ieee80211_hw *hw, | |||
348 | /* mac80211 will only ask for one band at a time */ | 349 | /* mac80211 will only ask for one band at a time */ |
349 | priv->scan_band = req->channels[0]->band; | 350 | priv->scan_band = req->channels[0]->band; |
350 | priv->scan_request = req; | 351 | priv->scan_request = req; |
352 | priv->scan_vif = vif; | ||
351 | 353 | ||
352 | ret = iwl_scan_initiate(priv, vif); | 354 | /* |
355 | * If an internal scan is in progress, just set | ||
356 | * up the scan_request as per above. | ||
357 | */ | ||
358 | if (priv->is_internal_short_scan) | ||
359 | ret = 0; | ||
360 | else | ||
361 | ret = iwl_scan_initiate(priv, vif); | ||
353 | 362 | ||
354 | IWL_DEBUG_MAC80211(priv, "leave\n"); | 363 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
355 | 364 | ||
@@ -438,7 +447,7 @@ EXPORT_SYMBOL(iwl_bg_scan_check); | |||
438 | */ | 447 | */ |
439 | 448 | ||
440 | u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame, | 449 | u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame, |
441 | const u8 *ies, int ie_len, int left) | 450 | const u8 *ta, const u8 *ies, int ie_len, int left) |
442 | { | 451 | { |
443 | int len = 0; | 452 | int len = 0; |
444 | u8 *pos = NULL; | 453 | u8 *pos = NULL; |
@@ -451,7 +460,7 @@ u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame, | |||
451 | 460 | ||
452 | frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ); | 461 | frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ); |
453 | memcpy(frame->da, iwl_bcast_addr, ETH_ALEN); | 462 | memcpy(frame->da, iwl_bcast_addr, ETH_ALEN); |
454 | memcpy(frame->sa, priv->mac_addr, ETH_ALEN); | 463 | memcpy(frame->sa, ta, ETH_ALEN); |
455 | memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN); | 464 | memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN); |
456 | frame->seq_ctrl = 0; | 465 | frame->seq_ctrl = 0; |
457 | 466 | ||
@@ -513,7 +522,21 @@ void iwl_bg_scan_completed(struct work_struct *work) | |||
513 | priv->is_internal_short_scan = false; | 522 | priv->is_internal_short_scan = false; |
514 | IWL_DEBUG_SCAN(priv, "internal short scan completed\n"); | 523 | IWL_DEBUG_SCAN(priv, "internal short scan completed\n"); |
515 | internal = true; | 524 | internal = true; |
525 | } else { | ||
526 | priv->scan_request = NULL; | ||
527 | priv->scan_vif = NULL; | ||
516 | } | 528 | } |
529 | |||
530 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
531 | goto out; | ||
532 | |||
533 | if (internal && priv->scan_request) | ||
534 | iwl_scan_initiate(priv, priv->scan_vif); | ||
535 | |||
536 | /* Since setting the TXPOWER may have been deferred while | ||
537 | * performing the scan, fire one off */ | ||
538 | iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); | ||
539 | out: | ||
517 | mutex_unlock(&priv->mutex); | 540 | mutex_unlock(&priv->mutex); |
518 | 541 | ||
519 | /* | 542 | /* |
@@ -523,15 +546,6 @@ void iwl_bg_scan_completed(struct work_struct *work) | |||
523 | */ | 546 | */ |
524 | if (!internal) | 547 | if (!internal) |
525 | ieee80211_scan_completed(priv->hw, false); | 548 | ieee80211_scan_completed(priv->hw, false); |
526 | |||
527 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
528 | return; | ||
529 | |||
530 | /* Since setting the TXPOWER may have been deferred while | ||
531 | * performing the scan, fire one off */ | ||
532 | mutex_lock(&priv->mutex); | ||
533 | iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); | ||
534 | mutex_unlock(&priv->mutex); | ||
535 | } | 549 | } |
536 | EXPORT_SYMBOL(iwl_bg_scan_completed); | 550 | EXPORT_SYMBOL(iwl_bg_scan_completed); |
537 | 551 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-spectrum.h b/drivers/net/wireless/iwlwifi/iwl-spectrum.h index af6babee2891..c4ca0b5d77da 100644 --- a/drivers/net/wireless/iwlwifi/iwl-spectrum.h +++ b/drivers/net/wireless/iwlwifi/iwl-spectrum.h | |||
@@ -42,7 +42,7 @@ struct ieee80211_basic_report { | |||
42 | __le64 start_time; | 42 | __le64 start_time; |
43 | __le16 duration; | 43 | __le16 duration; |
44 | u8 map; | 44 | u8 map; |
45 | } __attribute__ ((packed)); | 45 | } __packed; |
46 | 46 | ||
47 | enum { /* ieee80211_measurement_request.mode */ | 47 | enum { /* ieee80211_measurement_request.mode */ |
48 | /* Bit 0 is reserved */ | 48 | /* Bit 0 is reserved */ |
@@ -63,13 +63,13 @@ struct ieee80211_measurement_params { | |||
63 | u8 channel; | 63 | u8 channel; |
64 | __le64 start_time; | 64 | __le64 start_time; |
65 | __le16 duration; | 65 | __le16 duration; |
66 | } __attribute__ ((packed)); | 66 | } __packed; |
67 | 67 | ||
68 | struct ieee80211_info_element { | 68 | struct ieee80211_info_element { |
69 | u8 id; | 69 | u8 id; |
70 | u8 len; | 70 | u8 len; |
71 | u8 data[0]; | 71 | u8 data[0]; |
72 | } __attribute__ ((packed)); | 72 | } __packed; |
73 | 73 | ||
74 | struct ieee80211_measurement_request { | 74 | struct ieee80211_measurement_request { |
75 | struct ieee80211_info_element ie; | 75 | struct ieee80211_info_element ie; |
@@ -77,7 +77,7 @@ struct ieee80211_measurement_request { | |||
77 | u8 mode; | 77 | u8 mode; |
78 | u8 type; | 78 | u8 type; |
79 | struct ieee80211_measurement_params params[0]; | 79 | struct ieee80211_measurement_params params[0]; |
80 | } __attribute__ ((packed)); | 80 | } __packed; |
81 | 81 | ||
82 | struct ieee80211_measurement_report { | 82 | struct ieee80211_measurement_report { |
83 | struct ieee80211_info_element ie; | 83 | struct ieee80211_info_element ie; |
@@ -87,6 +87,6 @@ struct ieee80211_measurement_report { | |||
87 | union { | 87 | union { |
88 | struct ieee80211_basic_report basic[0]; | 88 | struct ieee80211_basic_report basic[0]; |
89 | } u; | 89 | } u; |
90 | } __attribute__ ((packed)); | 90 | } __packed; |
91 | 91 | ||
92 | #endif | 92 | #endif |
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c index 83a26361a9b5..c7127132c298 100644 --- a/drivers/net/wireless/iwlwifi/iwl-sta.c +++ b/drivers/net/wireless/iwlwifi/iwl-sta.c | |||
@@ -311,10 +311,10 @@ int iwl_add_station_common(struct iwl_priv *priv, const u8 *addr, | |||
311 | struct ieee80211_sta_ht_cap *ht_info, | 311 | struct ieee80211_sta_ht_cap *ht_info, |
312 | u8 *sta_id_r) | 312 | u8 *sta_id_r) |
313 | { | 313 | { |
314 | struct iwl_station_entry *station; | ||
315 | unsigned long flags_spin; | 314 | unsigned long flags_spin; |
316 | int ret = 0; | 315 | int ret = 0; |
317 | u8 sta_id; | 316 | u8 sta_id; |
317 | struct iwl_addsta_cmd sta_cmd; | ||
318 | 318 | ||
319 | *sta_id_r = 0; | 319 | *sta_id_r = 0; |
320 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | 320 | spin_lock_irqsave(&priv->sta_lock, flags_spin); |
@@ -347,14 +347,15 @@ int iwl_add_station_common(struct iwl_priv *priv, const u8 *addr, | |||
347 | } | 347 | } |
348 | 348 | ||
349 | priv->stations[sta_id].used |= IWL_STA_UCODE_INPROGRESS; | 349 | priv->stations[sta_id].used |= IWL_STA_UCODE_INPROGRESS; |
350 | station = &priv->stations[sta_id]; | 350 | memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd)); |
351 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | 351 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
352 | 352 | ||
353 | /* Add station to device's station table */ | 353 | /* Add station to device's station table */ |
354 | ret = iwl_send_add_sta(priv, &station->sta, CMD_SYNC); | 354 | ret = iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC); |
355 | if (ret) { | 355 | if (ret) { |
356 | IWL_ERR(priv, "Adding station %pM failed.\n", station->sta.sta.addr); | ||
357 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | 356 | spin_lock_irqsave(&priv->sta_lock, flags_spin); |
357 | IWL_ERR(priv, "Adding station %pM failed.\n", | ||
358 | priv->stations[sta_id].sta.sta.addr); | ||
358 | priv->stations[sta_id].used &= ~IWL_STA_DRIVER_ACTIVE; | 359 | priv->stations[sta_id].used &= ~IWL_STA_DRIVER_ACTIVE; |
359 | priv->stations[sta_id].used &= ~IWL_STA_UCODE_INPROGRESS; | 360 | priv->stations[sta_id].used &= ~IWL_STA_UCODE_INPROGRESS; |
360 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | 361 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
@@ -488,7 +489,7 @@ static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, u8 sta_id) | |||
488 | } | 489 | } |
489 | 490 | ||
490 | static int iwl_send_remove_station(struct iwl_priv *priv, | 491 | static int iwl_send_remove_station(struct iwl_priv *priv, |
491 | struct iwl_station_entry *station) | 492 | const u8 *addr, int sta_id) |
492 | { | 493 | { |
493 | struct iwl_rx_packet *pkt; | 494 | struct iwl_rx_packet *pkt; |
494 | int ret; | 495 | int ret; |
@@ -505,7 +506,7 @@ static int iwl_send_remove_station(struct iwl_priv *priv, | |||
505 | 506 | ||
506 | memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd)); | 507 | memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd)); |
507 | rm_sta_cmd.num_sta = 1; | 508 | rm_sta_cmd.num_sta = 1; |
508 | memcpy(&rm_sta_cmd.addr, &station->sta.sta.addr , ETH_ALEN); | 509 | memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN); |
509 | 510 | ||
510 | cmd.flags |= CMD_WANT_SKB; | 511 | cmd.flags |= CMD_WANT_SKB; |
511 | 512 | ||
@@ -525,7 +526,7 @@ static int iwl_send_remove_station(struct iwl_priv *priv, | |||
525 | switch (pkt->u.rem_sta.status) { | 526 | switch (pkt->u.rem_sta.status) { |
526 | case REM_STA_SUCCESS_MSK: | 527 | case REM_STA_SUCCESS_MSK: |
527 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | 528 | spin_lock_irqsave(&priv->sta_lock, flags_spin); |
528 | iwl_sta_ucode_deactivate(priv, station->sta.sta.sta_id); | 529 | iwl_sta_ucode_deactivate(priv, sta_id); |
529 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | 530 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
530 | IWL_DEBUG_ASSOC(priv, "REPLY_REMOVE_STA PASSED\n"); | 531 | IWL_DEBUG_ASSOC(priv, "REPLY_REMOVE_STA PASSED\n"); |
531 | break; | 532 | break; |
@@ -546,7 +547,6 @@ static int iwl_send_remove_station(struct iwl_priv *priv, | |||
546 | int iwl_remove_station(struct iwl_priv *priv, const u8 sta_id, | 547 | int iwl_remove_station(struct iwl_priv *priv, const u8 sta_id, |
547 | const u8 *addr) | 548 | const u8 *addr) |
548 | { | 549 | { |
549 | struct iwl_station_entry *station; | ||
550 | unsigned long flags; | 550 | unsigned long flags; |
551 | 551 | ||
552 | if (!iwl_is_ready(priv)) { | 552 | if (!iwl_is_ready(priv)) { |
@@ -592,10 +592,9 @@ int iwl_remove_station(struct iwl_priv *priv, const u8 sta_id, | |||
592 | 592 | ||
593 | BUG_ON(priv->num_stations < 0); | 593 | BUG_ON(priv->num_stations < 0); |
594 | 594 | ||
595 | station = &priv->stations[sta_id]; | ||
596 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 595 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
597 | 596 | ||
598 | return iwl_send_remove_station(priv, station); | 597 | return iwl_send_remove_station(priv, addr, sta_id); |
599 | out_err: | 598 | out_err: |
600 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 599 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
601 | return -EINVAL; | 600 | return -EINVAL; |
@@ -643,11 +642,13 @@ EXPORT_SYMBOL(iwl_clear_ucode_stations); | |||
643 | */ | 642 | */ |
644 | void iwl_restore_stations(struct iwl_priv *priv) | 643 | void iwl_restore_stations(struct iwl_priv *priv) |
645 | { | 644 | { |
646 | struct iwl_station_entry *station; | 645 | struct iwl_addsta_cmd sta_cmd; |
646 | struct iwl_link_quality_cmd lq; | ||
647 | unsigned long flags_spin; | 647 | unsigned long flags_spin; |
648 | int i; | 648 | int i; |
649 | bool found = false; | 649 | bool found = false; |
650 | int ret; | 650 | int ret; |
651 | bool send_lq; | ||
651 | 652 | ||
652 | if (!iwl_is_ready(priv)) { | 653 | if (!iwl_is_ready(priv)) { |
653 | IWL_DEBUG_INFO(priv, "Not ready yet, not restoring any stations.\n"); | 654 | IWL_DEBUG_INFO(priv, "Not ready yet, not restoring any stations.\n"); |
@@ -669,13 +670,20 @@ void iwl_restore_stations(struct iwl_priv *priv) | |||
669 | 670 | ||
670 | for (i = 0; i < priv->hw_params.max_stations; i++) { | 671 | for (i = 0; i < priv->hw_params.max_stations; i++) { |
671 | if ((priv->stations[i].used & IWL_STA_UCODE_INPROGRESS)) { | 672 | if ((priv->stations[i].used & IWL_STA_UCODE_INPROGRESS)) { |
673 | memcpy(&sta_cmd, &priv->stations[i].sta, | ||
674 | sizeof(struct iwl_addsta_cmd)); | ||
675 | send_lq = false; | ||
676 | if (priv->stations[i].lq) { | ||
677 | memcpy(&lq, priv->stations[i].lq, | ||
678 | sizeof(struct iwl_link_quality_cmd)); | ||
679 | send_lq = true; | ||
680 | } | ||
672 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | 681 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
673 | station = &priv->stations[i]; | 682 | ret = iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC); |
674 | ret = iwl_send_add_sta(priv, &priv->stations[i].sta, CMD_SYNC); | ||
675 | if (ret) { | 683 | if (ret) { |
676 | IWL_ERR(priv, "Adding station %pM failed.\n", | ||
677 | station->sta.sta.addr); | ||
678 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | 684 | spin_lock_irqsave(&priv->sta_lock, flags_spin); |
685 | IWL_ERR(priv, "Adding station %pM failed.\n", | ||
686 | priv->stations[i].sta.sta.addr); | ||
679 | priv->stations[i].used &= ~IWL_STA_DRIVER_ACTIVE; | 687 | priv->stations[i].used &= ~IWL_STA_DRIVER_ACTIVE; |
680 | priv->stations[i].used &= ~IWL_STA_UCODE_INPROGRESS; | 688 | priv->stations[i].used &= ~IWL_STA_UCODE_INPROGRESS; |
681 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | 689 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
@@ -684,8 +692,8 @@ void iwl_restore_stations(struct iwl_priv *priv) | |||
684 | * Rate scaling has already been initialized, send | 692 | * Rate scaling has already been initialized, send |
685 | * current LQ command | 693 | * current LQ command |
686 | */ | 694 | */ |
687 | if (station->lq) | 695 | if (send_lq) |
688 | iwl_send_lq_cmd(priv, station->lq, CMD_SYNC, true); | 696 | iwl_send_lq_cmd(priv, &lq, CMD_SYNC, true); |
689 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | 697 | spin_lock_irqsave(&priv->sta_lock, flags_spin); |
690 | priv->stations[i].used &= ~IWL_STA_UCODE_INPROGRESS; | 698 | priv->stations[i].used &= ~IWL_STA_UCODE_INPROGRESS; |
691 | } | 699 | } |
@@ -972,24 +980,16 @@ void iwl_update_tkip_key(struct iwl_priv *priv, | |||
972 | unsigned long flags; | 980 | unsigned long flags; |
973 | int i; | 981 | int i; |
974 | 982 | ||
975 | if (sta) { | ||
976 | sta_id = iwl_sta_id(sta); | ||
977 | |||
978 | if (sta_id == IWL_INVALID_STATION) { | ||
979 | IWL_DEBUG_MAC80211(priv, "leave - %pM not initialised.\n", | ||
980 | sta->addr); | ||
981 | return; | ||
982 | } | ||
983 | } else | ||
984 | sta_id = priv->hw_params.bcast_sta_id; | ||
985 | |||
986 | |||
987 | if (iwl_scan_cancel(priv)) { | 983 | if (iwl_scan_cancel(priv)) { |
988 | /* cancel scan failed, just live w/ bad key and rely | 984 | /* cancel scan failed, just live w/ bad key and rely |
989 | briefly on SW decryption */ | 985 | briefly on SW decryption */ |
990 | return; | 986 | return; |
991 | } | 987 | } |
992 | 988 | ||
989 | sta_id = iwl_sta_id_or_broadcast(priv, sta); | ||
990 | if (sta_id == IWL_INVALID_STATION) | ||
991 | return; | ||
992 | |||
993 | spin_lock_irqsave(&priv->sta_lock, flags); | 993 | spin_lock_irqsave(&priv->sta_lock, flags); |
994 | 994 | ||
995 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | 995 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; |
@@ -1277,9 +1277,8 @@ void iwl_sta_tx_modify_enable_tid(struct iwl_priv *priv, int sta_id, int tid) | |||
1277 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX; | 1277 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX; |
1278 | priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid)); | 1278 | priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid)); |
1279 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 1279 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
1280 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
1281 | |||
1282 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); | 1280 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
1281 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
1283 | } | 1282 | } |
1284 | EXPORT_SYMBOL(iwl_sta_tx_modify_enable_tid); | 1283 | EXPORT_SYMBOL(iwl_sta_tx_modify_enable_tid); |
1285 | 1284 | ||
@@ -1310,7 +1309,7 @@ int iwl_sta_rx_agg_stop(struct iwl_priv *priv, struct ieee80211_sta *sta, | |||
1310 | int tid) | 1309 | int tid) |
1311 | { | 1310 | { |
1312 | unsigned long flags; | 1311 | unsigned long flags; |
1313 | int sta_id; | 1312 | int sta_id, ret; |
1314 | 1313 | ||
1315 | sta_id = iwl_sta_id(sta); | 1314 | sta_id = iwl_sta_id(sta); |
1316 | if (sta_id == IWL_INVALID_STATION) { | 1315 | if (sta_id == IWL_INVALID_STATION) { |
@@ -1323,10 +1322,11 @@ int iwl_sta_rx_agg_stop(struct iwl_priv *priv, struct ieee80211_sta *sta, | |||
1323 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK; | 1322 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK; |
1324 | priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid; | 1323 | priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid; |
1325 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 1324 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
1325 | ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); | ||
1326 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 1326 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
1327 | 1327 | ||
1328 | return iwl_send_add_sta(priv, &priv->stations[sta_id].sta, | 1328 | return ret; |
1329 | CMD_ASYNC); | 1329 | |
1330 | } | 1330 | } |
1331 | EXPORT_SYMBOL(iwl_sta_rx_agg_stop); | 1331 | EXPORT_SYMBOL(iwl_sta_rx_agg_stop); |
1332 | 1332 | ||
@@ -1340,9 +1340,9 @@ void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id) | |||
1340 | priv->stations[sta_id].sta.sta.modify_mask = 0; | 1340 | priv->stations[sta_id].sta.sta.modify_mask = 0; |
1341 | priv->stations[sta_id].sta.sleep_tx_count = 0; | 1341 | priv->stations[sta_id].sta.sleep_tx_count = 0; |
1342 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 1342 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
1343 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); | ||
1343 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 1344 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
1344 | 1345 | ||
1345 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); | ||
1346 | } | 1346 | } |
1347 | EXPORT_SYMBOL(iwl_sta_modify_ps_wake); | 1347 | EXPORT_SYMBOL(iwl_sta_modify_ps_wake); |
1348 | 1348 | ||
@@ -1357,9 +1357,9 @@ void iwl_sta_modify_sleep_tx_count(struct iwl_priv *priv, int sta_id, int cnt) | |||
1357 | STA_MODIFY_SLEEP_TX_COUNT_MSK; | 1357 | STA_MODIFY_SLEEP_TX_COUNT_MSK; |
1358 | priv->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt); | 1358 | priv->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt); |
1359 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 1359 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
1360 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); | ||
1360 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 1361 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
1361 | 1362 | ||
1362 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); | ||
1363 | } | 1363 | } |
1364 | EXPORT_SYMBOL(iwl_sta_modify_sleep_tx_count); | 1364 | EXPORT_SYMBOL(iwl_sta_modify_sleep_tx_count); |
1365 | 1365 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.h b/drivers/net/wireless/iwlwifi/iwl-sta.h index c2a453a1a991..5b1b1e461eb6 100644 --- a/drivers/net/wireless/iwlwifi/iwl-sta.h +++ b/drivers/net/wireless/iwlwifi/iwl-sta.h | |||
@@ -107,4 +107,33 @@ static inline int iwl_sta_id(struct ieee80211_sta *sta) | |||
107 | 107 | ||
108 | return ((struct iwl_station_priv_common *)sta->drv_priv)->sta_id; | 108 | return ((struct iwl_station_priv_common *)sta->drv_priv)->sta_id; |
109 | } | 109 | } |
110 | |||
111 | /** | ||
112 | * iwl_sta_id_or_broadcast - return sta_id or broadcast sta | ||
113 | * @priv: iwl priv | ||
114 | * @sta: mac80211 station | ||
115 | * | ||
116 | * In certain circumstances mac80211 passes a station pointer | ||
117 | * that may be %NULL, for example during TX or key setup. In | ||
118 | * that case, we need to use the broadcast station, so this | ||
119 | * inline wraps that pattern. | ||
120 | */ | ||
121 | static inline int iwl_sta_id_or_broadcast(struct iwl_priv *priv, | ||
122 | struct ieee80211_sta *sta) | ||
123 | { | ||
124 | int sta_id; | ||
125 | |||
126 | if (!sta) | ||
127 | return priv->hw_params.bcast_sta_id; | ||
128 | |||
129 | sta_id = iwl_sta_id(sta); | ||
130 | |||
131 | /* | ||
132 | * mac80211 should not be passing a partially | ||
133 | * initialised station! | ||
134 | */ | ||
135 | WARN_ON(sta_id == IWL_INVALID_STATION); | ||
136 | |||
137 | return sta_id; | ||
138 | } | ||
110 | #endif /* __iwl_sta_h__ */ | 139 | #endif /* __iwl_sta_h__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c index 1ece2ea09773..a81989c06983 100644 --- a/drivers/net/wireless/iwlwifi/iwl-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-tx.c | |||
@@ -77,21 +77,6 @@ void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq) | |||
77 | } | 77 | } |
78 | EXPORT_SYMBOL(iwl_txq_update_write_ptr); | 78 | EXPORT_SYMBOL(iwl_txq_update_write_ptr); |
79 | 79 | ||
80 | |||
81 | void iwl_free_tfds_in_queue(struct iwl_priv *priv, | ||
82 | int sta_id, int tid, int freed) | ||
83 | { | ||
84 | if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed) | ||
85 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | ||
86 | else { | ||
87 | IWL_DEBUG_TX(priv, "free more than tfds_in_queue (%u:%d)\n", | ||
88 | priv->stations[sta_id].tid[tid].tfds_in_queue, | ||
89 | freed); | ||
90 | priv->stations[sta_id].tid[tid].tfds_in_queue = 0; | ||
91 | } | ||
92 | } | ||
93 | EXPORT_SYMBOL(iwl_free_tfds_in_queue); | ||
94 | |||
95 | /** | 80 | /** |
96 | * iwl_tx_queue_free - Deallocate DMA queue. | 81 | * iwl_tx_queue_free - Deallocate DMA queue. |
97 | * @txq: Transmit queue to deallocate. | 82 | * @txq: Transmit queue to deallocate. |
@@ -169,15 +154,15 @@ void iwl_cmd_queue_free(struct iwl_priv *priv) | |||
169 | } | 154 | } |
170 | 155 | ||
171 | pci_unmap_single(priv->pci_dev, | 156 | pci_unmap_single(priv->pci_dev, |
172 | pci_unmap_addr(&txq->meta[i], mapping), | 157 | dma_unmap_addr(&txq->meta[i], mapping), |
173 | pci_unmap_len(&txq->meta[i], len), | 158 | dma_unmap_len(&txq->meta[i], len), |
174 | PCI_DMA_BIDIRECTIONAL); | 159 | PCI_DMA_BIDIRECTIONAL); |
175 | } | 160 | } |
176 | if (huge) { | 161 | if (huge) { |
177 | i = q->n_window; | 162 | i = q->n_window; |
178 | pci_unmap_single(priv->pci_dev, | 163 | pci_unmap_single(priv->pci_dev, |
179 | pci_unmap_addr(&txq->meta[i], mapping), | 164 | dma_unmap_addr(&txq->meta[i], mapping), |
180 | pci_unmap_len(&txq->meta[i], len), | 165 | dma_unmap_len(&txq->meta[i], len), |
181 | PCI_DMA_BIDIRECTIONAL); | 166 | PCI_DMA_BIDIRECTIONAL); |
182 | } | 167 | } |
183 | 168 | ||
@@ -287,7 +272,7 @@ static int iwl_tx_queue_alloc(struct iwl_priv *priv, | |||
287 | /* Driver private data, only for Tx (not command) queues, | 272 | /* Driver private data, only for Tx (not command) queues, |
288 | * not shared with device. */ | 273 | * not shared with device. */ |
289 | if (id != IWL_CMD_QUEUE_NUM) { | 274 | if (id != IWL_CMD_QUEUE_NUM) { |
290 | txq->txb = kmalloc(sizeof(txq->txb[0]) * | 275 | txq->txb = kzalloc(sizeof(txq->txb[0]) * |
291 | TFD_QUEUE_SIZE_MAX, GFP_KERNEL); | 276 | TFD_QUEUE_SIZE_MAX, GFP_KERNEL); |
292 | if (!txq->txb) { | 277 | if (!txq->txb) { |
293 | IWL_ERR(priv, "kmalloc for auxiliary BD " | 278 | IWL_ERR(priv, "kmalloc for auxiliary BD " |
@@ -531,8 +516,8 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
531 | 516 | ||
532 | phys_addr = pci_map_single(priv->pci_dev, &out_cmd->hdr, | 517 | phys_addr = pci_map_single(priv->pci_dev, &out_cmd->hdr, |
533 | fix_size, PCI_DMA_BIDIRECTIONAL); | 518 | fix_size, PCI_DMA_BIDIRECTIONAL); |
534 | pci_unmap_addr_set(out_meta, mapping, phys_addr); | 519 | dma_unmap_addr_set(out_meta, mapping, phys_addr); |
535 | pci_unmap_len_set(out_meta, len, fix_size); | 520 | dma_unmap_len_set(out_meta, len, fix_size); |
536 | 521 | ||
537 | trace_iwlwifi_dev_hcmd(priv, &out_cmd->hdr, fix_size, cmd->flags); | 522 | trace_iwlwifi_dev_hcmd(priv, &out_cmd->hdr, fix_size, cmd->flags); |
538 | 523 | ||
@@ -626,8 +611,8 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
626 | meta = &txq->meta[cmd_index]; | 611 | meta = &txq->meta[cmd_index]; |
627 | 612 | ||
628 | pci_unmap_single(priv->pci_dev, | 613 | pci_unmap_single(priv->pci_dev, |
629 | pci_unmap_addr(meta, mapping), | 614 | dma_unmap_addr(meta, mapping), |
630 | pci_unmap_len(meta, len), | 615 | dma_unmap_len(meta, len), |
631 | PCI_DMA_BIDIRECTIONAL); | 616 | PCI_DMA_BIDIRECTIONAL); |
632 | 617 | ||
633 | /* Input error checking is done when commands are added to queue. */ | 618 | /* Input error checking is done when commands are added to queue. */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index 6c353cacc8d6..0f16c7d518f7 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -197,6 +197,7 @@ static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv, | |||
197 | static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id) | 197 | static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id) |
198 | { | 198 | { |
199 | unsigned long flags; | 199 | unsigned long flags; |
200 | struct iwl_addsta_cmd sta_cmd; | ||
200 | 201 | ||
201 | spin_lock_irqsave(&priv->sta_lock, flags); | 202 | spin_lock_irqsave(&priv->sta_lock, flags); |
202 | memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key)); | 203 | memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key)); |
@@ -205,11 +206,11 @@ static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id) | |||
205 | priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; | 206 | priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; |
206 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 207 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
207 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 208 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
209 | memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd)); | ||
208 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 210 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
209 | 211 | ||
210 | IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n"); | 212 | IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n"); |
211 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0); | 213 | return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC); |
212 | return 0; | ||
213 | } | 214 | } |
214 | 215 | ||
215 | static int iwl3945_set_dynamic_key(struct iwl_priv *priv, | 216 | static int iwl3945_set_dynamic_key(struct iwl_priv *priv, |
@@ -474,10 +475,8 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
474 | u8 unicast; | 475 | u8 unicast; |
475 | u8 sta_id; | 476 | u8 sta_id; |
476 | u8 tid = 0; | 477 | u8 tid = 0; |
477 | u16 seq_number = 0; | ||
478 | __le16 fc; | 478 | __le16 fc; |
479 | u8 wait_write_ptr = 0; | 479 | u8 wait_write_ptr = 0; |
480 | u8 *qc = NULL; | ||
481 | unsigned long flags; | 480 | unsigned long flags; |
482 | 481 | ||
483 | spin_lock_irqsave(&priv->lock, flags); | 482 | spin_lock_irqsave(&priv->lock, flags); |
@@ -510,10 +509,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
510 | hdr_len = ieee80211_hdrlen(fc); | 509 | hdr_len = ieee80211_hdrlen(fc); |
511 | 510 | ||
512 | /* Find index into station table for destination station */ | 511 | /* Find index into station table for destination station */ |
513 | if (!info->control.sta) | 512 | sta_id = iwl_sta_id_or_broadcast(priv, info->control.sta); |
514 | sta_id = priv->hw_params.bcast_sta_id; | ||
515 | else | ||
516 | sta_id = iwl_sta_id(info->control.sta); | ||
517 | if (sta_id == IWL_INVALID_STATION) { | 513 | if (sta_id == IWL_INVALID_STATION) { |
518 | IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n", | 514 | IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n", |
519 | hdr->addr1); | 515 | hdr->addr1); |
@@ -523,16 +519,10 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
523 | IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id); | 519 | IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id); |
524 | 520 | ||
525 | if (ieee80211_is_data_qos(fc)) { | 521 | if (ieee80211_is_data_qos(fc)) { |
526 | qc = ieee80211_get_qos_ctl(hdr); | 522 | u8 *qc = ieee80211_get_qos_ctl(hdr); |
527 | tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; | 523 | tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; |
528 | if (unlikely(tid >= MAX_TID_COUNT)) | 524 | if (unlikely(tid >= MAX_TID_COUNT)) |
529 | goto drop; | 525 | goto drop; |
530 | seq_number = priv->stations[sta_id].tid[tid].seq_number & | ||
531 | IEEE80211_SCTL_SEQ; | ||
532 | hdr->seq_ctrl = cpu_to_le16(seq_number) | | ||
533 | (hdr->seq_ctrl & | ||
534 | cpu_to_le16(IEEE80211_SCTL_FRAG)); | ||
535 | seq_number += 0x10; | ||
536 | } | 526 | } |
537 | 527 | ||
538 | /* Descriptor for chosen Tx queue */ | 528 | /* Descriptor for chosen Tx queue */ |
@@ -548,7 +538,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
548 | 538 | ||
549 | /* Set up driver data for this TFD */ | 539 | /* Set up driver data for this TFD */ |
550 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info)); | 540 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info)); |
551 | txq->txb[q->write_ptr].skb[0] = skb; | 541 | txq->txb[q->write_ptr].skb = skb; |
552 | 542 | ||
553 | /* Init first empty entry in queue's array of Tx/cmd buffers */ | 543 | /* Init first empty entry in queue's array of Tx/cmd buffers */ |
554 | out_cmd = txq->cmd[idx]; | 544 | out_cmd = txq->cmd[idx]; |
@@ -591,8 +581,6 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
591 | 581 | ||
592 | if (!ieee80211_has_morefrags(hdr->frame_control)) { | 582 | if (!ieee80211_has_morefrags(hdr->frame_control)) { |
593 | txq->need_update = 1; | 583 | txq->need_update = 1; |
594 | if (qc) | ||
595 | priv->stations[sta_id].tid[tid].seq_number = seq_number; | ||
596 | } else { | 584 | } else { |
597 | wait_write_ptr = 1; | 585 | wait_write_ptr = 1; |
598 | txq->need_update = 0; | 586 | txq->need_update = 0; |
@@ -631,8 +619,8 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
631 | len, PCI_DMA_TODEVICE); | 619 | len, PCI_DMA_TODEVICE); |
632 | /* we do not map meta data ... so we can safely access address to | 620 | /* we do not map meta data ... so we can safely access address to |
633 | * provide to unmap command*/ | 621 | * provide to unmap command*/ |
634 | pci_unmap_addr_set(out_meta, mapping, txcmd_phys); | 622 | dma_unmap_addr_set(out_meta, mapping, txcmd_phys); |
635 | pci_unmap_len_set(out_meta, len, len); | 623 | dma_unmap_len_set(out_meta, len, len); |
636 | 624 | ||
637 | /* Add buffer containing Tx command and MAC(!) header to TFD's | 625 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
638 | * first entry */ | 626 | * first entry */ |
@@ -677,55 +665,6 @@ drop: | |||
677 | return -1; | 665 | return -1; |
678 | } | 666 | } |
679 | 667 | ||
680 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | ||
681 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | ||
682 | #define TIME_UNIT 1024 | ||
683 | |||
684 | /* | ||
685 | * extended beacon time format | ||
686 | * time in usec will be changed into a 32-bit value in 8:24 format | ||
687 | * the high 1 byte is the beacon counts | ||
688 | * the lower 3 bytes is the time in usec within one beacon interval | ||
689 | */ | ||
690 | |||
691 | static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval) | ||
692 | { | ||
693 | u32 quot; | ||
694 | u32 rem; | ||
695 | u32 interval = beacon_interval * 1024; | ||
696 | |||
697 | if (!interval || !usec) | ||
698 | return 0; | ||
699 | |||
700 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | ||
701 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | ||
702 | |||
703 | return (quot << 24) + rem; | ||
704 | } | ||
705 | |||
706 | /* base is usually what we get from ucode with each received frame, | ||
707 | * the same as HW timer counter counting down | ||
708 | */ | ||
709 | |||
710 | static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) | ||
711 | { | ||
712 | u32 base_low = base & BEACON_TIME_MASK_LOW; | ||
713 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | ||
714 | u32 interval = beacon_interval * TIME_UNIT; | ||
715 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | ||
716 | (addon & BEACON_TIME_MASK_HIGH); | ||
717 | |||
718 | if (base_low > addon_low) | ||
719 | res += base_low - addon_low; | ||
720 | else if (base_low < addon_low) { | ||
721 | res += interval + base_low - addon_low; | ||
722 | res += (1 << 24); | ||
723 | } else | ||
724 | res += (1 << 24); | ||
725 | |||
726 | return cpu_to_le32(res); | ||
727 | } | ||
728 | |||
729 | static int iwl3945_get_measurement(struct iwl_priv *priv, | 668 | static int iwl3945_get_measurement(struct iwl_priv *priv, |
730 | struct ieee80211_measurement_params *params, | 669 | struct ieee80211_measurement_params *params, |
731 | u8 type) | 670 | u8 type) |
@@ -743,8 +682,7 @@ static int iwl3945_get_measurement(struct iwl_priv *priv, | |||
743 | int duration = le16_to_cpu(params->duration); | 682 | int duration = le16_to_cpu(params->duration); |
744 | 683 | ||
745 | if (iwl_is_associated(priv)) | 684 | if (iwl_is_associated(priv)) |
746 | add_time = | 685 | add_time = iwl_usecs_to_beacons(priv, |
747 | iwl3945_usecs_to_beacons( | ||
748 | le64_to_cpu(params->start_time) - priv->_3945.last_tsf, | 686 | le64_to_cpu(params->start_time) - priv->_3945.last_tsf, |
749 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | 687 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
750 | 688 | ||
@@ -759,8 +697,8 @@ static int iwl3945_get_measurement(struct iwl_priv *priv, | |||
759 | 697 | ||
760 | if (iwl_is_associated(priv)) | 698 | if (iwl_is_associated(priv)) |
761 | spectrum.start_time = | 699 | spectrum.start_time = |
762 | iwl3945_add_beacon_time(priv->_3945.last_beacon_time, | 700 | iwl_add_beacon_time(priv, |
763 | add_time, | 701 | priv->_3945.last_beacon_time, add_time, |
764 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | 702 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
765 | else | 703 | else |
766 | spectrum.start_time = 0; | 704 | spectrum.start_time = 0; |
@@ -3022,14 +2960,16 @@ void iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
3022 | scan->tx_cmd.len = cpu_to_le16( | 2960 | scan->tx_cmd.len = cpu_to_le16( |
3023 | iwl_fill_probe_req(priv, | 2961 | iwl_fill_probe_req(priv, |
3024 | (struct ieee80211_mgmt *)scan->data, | 2962 | (struct ieee80211_mgmt *)scan->data, |
2963 | vif->addr, | ||
3025 | priv->scan_request->ie, | 2964 | priv->scan_request->ie, |
3026 | priv->scan_request->ie_len, | 2965 | priv->scan_request->ie_len, |
3027 | IWL_MAX_SCAN_SIZE - sizeof(*scan))); | 2966 | IWL_MAX_SCAN_SIZE - sizeof(*scan))); |
3028 | } else { | 2967 | } else { |
2968 | /* use bcast addr, will not be transmitted but must be valid */ | ||
3029 | scan->tx_cmd.len = cpu_to_le16( | 2969 | scan->tx_cmd.len = cpu_to_le16( |
3030 | iwl_fill_probe_req(priv, | 2970 | iwl_fill_probe_req(priv, |
3031 | (struct ieee80211_mgmt *)scan->data, | 2971 | (struct ieee80211_mgmt *)scan->data, |
3032 | NULL, 0, | 2972 | iwl_bcast_addr, NULL, 0, |
3033 | IWL_MAX_SCAN_SIZE - sizeof(*scan))); | 2973 | IWL_MAX_SCAN_SIZE - sizeof(*scan))); |
3034 | } | 2974 | } |
3035 | /* select Rx antennas */ | 2975 | /* select Rx antennas */ |
@@ -3158,19 +3098,16 @@ void iwl3945_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
3158 | IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n", | 3098 | IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n", |
3159 | vif->bss_conf.aid, vif->bss_conf.beacon_int); | 3099 | vif->bss_conf.aid, vif->bss_conf.beacon_int); |
3160 | 3100 | ||
3161 | if (vif->bss_conf.assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | 3101 | if (vif->bss_conf.use_short_preamble) |
3162 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | 3102 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
3163 | else | 3103 | else |
3164 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | 3104 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; |
3165 | 3105 | ||
3166 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | 3106 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { |
3167 | if (vif->bss_conf.assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | 3107 | if (vif->bss_conf.use_short_slot) |
3168 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | 3108 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; |
3169 | else | 3109 | else |
3170 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | 3110 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
3171 | |||
3172 | if (vif->type == NL80211_IFTYPE_ADHOC) | ||
3173 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | ||
3174 | } | 3111 | } |
3175 | 3112 | ||
3176 | iwlcore_commit_rxon(priv); | 3113 | iwlcore_commit_rxon(priv); |
@@ -3334,8 +3271,7 @@ void iwl3945_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
3334 | 3271 | ||
3335 | priv->staging_rxon.assoc_id = 0; | 3272 | priv->staging_rxon.assoc_id = 0; |
3336 | 3273 | ||
3337 | if (vif->bss_conf.assoc_capability & | 3274 | if (vif->bss_conf.use_short_preamble) |
3338 | WLAN_CAPABILITY_SHORT_PREAMBLE) | ||
3339 | priv->staging_rxon.flags |= | 3275 | priv->staging_rxon.flags |= |
3340 | RXON_FLG_SHORT_PREAMBLE_MSK; | 3276 | RXON_FLG_SHORT_PREAMBLE_MSK; |
3341 | else | 3277 | else |
@@ -3343,17 +3279,12 @@ void iwl3945_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif) | |||
3343 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | 3279 | ~RXON_FLG_SHORT_PREAMBLE_MSK; |
3344 | 3280 | ||
3345 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | 3281 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { |
3346 | if (vif->bss_conf.assoc_capability & | 3282 | if (vif->bss_conf.use_short_slot) |
3347 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | ||
3348 | priv->staging_rxon.flags |= | 3283 | priv->staging_rxon.flags |= |
3349 | RXON_FLG_SHORT_SLOT_MSK; | 3284 | RXON_FLG_SHORT_SLOT_MSK; |
3350 | else | 3285 | else |
3351 | priv->staging_rxon.flags &= | 3286 | priv->staging_rxon.flags &= |
3352 | ~RXON_FLG_SHORT_SLOT_MSK; | 3287 | ~RXON_FLG_SHORT_SLOT_MSK; |
3353 | |||
3354 | if (vif->type == NL80211_IFTYPE_ADHOC) | ||
3355 | priv->staging_rxon.flags &= | ||
3356 | ~RXON_FLG_SHORT_SLOT_MSK; | ||
3357 | } | 3288 | } |
3358 | /* restore RXON assoc */ | 3289 | /* restore RXON assoc */ |
3359 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | 3290 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; |
@@ -3386,17 +3317,9 @@ static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
3386 | static_key = !iwl_is_associated(priv); | 3317 | static_key = !iwl_is_associated(priv); |
3387 | 3318 | ||
3388 | if (!static_key) { | 3319 | if (!static_key) { |
3389 | if (!sta) { | 3320 | sta_id = iwl_sta_id_or_broadcast(priv, sta); |
3390 | sta_id = priv->hw_params.bcast_sta_id; | 3321 | if (sta_id == IWL_INVALID_STATION) |
3391 | } else { | 3322 | return -EINVAL; |
3392 | sta_id = iwl_sta_id(sta); | ||
3393 | if (sta_id == IWL_INVALID_STATION) { | ||
3394 | IWL_DEBUG_MAC80211(priv, | ||
3395 | "leave - %pM not in station map.\n", | ||
3396 | sta->addr); | ||
3397 | return -EINVAL; | ||
3398 | } | ||
3399 | } | ||
3400 | } | 3323 | } |
3401 | 3324 | ||
3402 | mutex_lock(&priv->mutex); | 3325 | mutex_lock(&priv->mutex); |
@@ -4023,9 +3946,6 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
4023 | priv->pci_dev = pdev; | 3946 | priv->pci_dev = pdev; |
4024 | priv->inta_mask = CSR_INI_SET_MASK; | 3947 | priv->inta_mask = CSR_INI_SET_MASK; |
4025 | 3948 | ||
4026 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
4027 | atomic_set(&priv->restrict_refcnt, 0); | ||
4028 | #endif | ||
4029 | if (iwl_alloc_traffic_mem(priv)) | 3949 | if (iwl_alloc_traffic_mem(priv)) |
4030 | IWL_ERR(priv, "Not enough memory to generate traffic log\n"); | 3950 | IWL_ERR(priv, "Not enough memory to generate traffic log\n"); |
4031 | 3951 | ||
@@ -4094,9 +4014,8 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
4094 | } | 4014 | } |
4095 | /* MAC Address location in EEPROM same for 3945/4965 */ | 4015 | /* MAC Address location in EEPROM same for 3945/4965 */ |
4096 | eeprom = (struct iwl3945_eeprom *)priv->eeprom; | 4016 | eeprom = (struct iwl3945_eeprom *)priv->eeprom; |
4097 | memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN); | 4017 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", eeprom->mac_address); |
4098 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr); | 4018 | SET_IEEE80211_PERM_ADDR(priv->hw, eeprom->mac_address); |
4099 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | ||
4100 | 4019 | ||
4101 | /*********************** | 4020 | /*********************** |
4102 | * 5. Setup HW Constants | 4021 | * 5. Setup HW Constants |
diff --git a/drivers/net/wireless/iwmc3200wifi/commands.h b/drivers/net/wireless/iwmc3200wifi/commands.h index 7e16bcf59978..6421689f5e8e 100644 --- a/drivers/net/wireless/iwmc3200wifi/commands.h +++ b/drivers/net/wireless/iwmc3200wifi/commands.h | |||
@@ -56,7 +56,7 @@ | |||
56 | 56 | ||
57 | struct iwm_umac_cmd_reset { | 57 | struct iwm_umac_cmd_reset { |
58 | __le32 flags; | 58 | __le32 flags; |
59 | } __attribute__ ((packed)); | 59 | } __packed; |
60 | 60 | ||
61 | #define UMAC_PARAM_TBL_ORD_FIX 0x0 | 61 | #define UMAC_PARAM_TBL_ORD_FIX 0x0 |
62 | #define UMAC_PARAM_TBL_ORD_VAR 0x1 | 62 | #define UMAC_PARAM_TBL_ORD_VAR 0x1 |
@@ -220,37 +220,37 @@ struct iwm_umac_cmd_set_param_fix { | |||
220 | __le16 tbl; | 220 | __le16 tbl; |
221 | __le16 key; | 221 | __le16 key; |
222 | __le32 value; | 222 | __le32 value; |
223 | } __attribute__ ((packed)); | 223 | } __packed; |
224 | 224 | ||
225 | struct iwm_umac_cmd_set_param_var { | 225 | struct iwm_umac_cmd_set_param_var { |
226 | __le16 tbl; | 226 | __le16 tbl; |
227 | __le16 key; | 227 | __le16 key; |
228 | __le16 len; | 228 | __le16 len; |
229 | __le16 reserved; | 229 | __le16 reserved; |
230 | } __attribute__ ((packed)); | 230 | } __packed; |
231 | 231 | ||
232 | struct iwm_umac_cmd_get_param { | 232 | struct iwm_umac_cmd_get_param { |
233 | __le16 tbl; | 233 | __le16 tbl; |
234 | __le16 key; | 234 | __le16 key; |
235 | } __attribute__ ((packed)); | 235 | } __packed; |
236 | 236 | ||
237 | struct iwm_umac_cmd_get_param_resp { | 237 | struct iwm_umac_cmd_get_param_resp { |
238 | __le16 tbl; | 238 | __le16 tbl; |
239 | __le16 key; | 239 | __le16 key; |
240 | __le16 len; | 240 | __le16 len; |
241 | __le16 reserved; | 241 | __le16 reserved; |
242 | } __attribute__ ((packed)); | 242 | } __packed; |
243 | 243 | ||
244 | struct iwm_umac_cmd_eeprom_proxy_hdr { | 244 | struct iwm_umac_cmd_eeprom_proxy_hdr { |
245 | __le32 type; | 245 | __le32 type; |
246 | __le32 offset; | 246 | __le32 offset; |
247 | __le32 len; | 247 | __le32 len; |
248 | } __attribute__ ((packed)); | 248 | } __packed; |
249 | 249 | ||
250 | struct iwm_umac_cmd_eeprom_proxy { | 250 | struct iwm_umac_cmd_eeprom_proxy { |
251 | struct iwm_umac_cmd_eeprom_proxy_hdr hdr; | 251 | struct iwm_umac_cmd_eeprom_proxy_hdr hdr; |
252 | u8 buf[0]; | 252 | u8 buf[0]; |
253 | } __attribute__ ((packed)); | 253 | } __packed; |
254 | 254 | ||
255 | #define IWM_UMAC_CMD_EEPROM_TYPE_READ 0x1 | 255 | #define IWM_UMAC_CMD_EEPROM_TYPE_READ 0x1 |
256 | #define IWM_UMAC_CMD_EEPROM_TYPE_WRITE 0x2 | 256 | #define IWM_UMAC_CMD_EEPROM_TYPE_WRITE 0x2 |
@@ -267,13 +267,13 @@ struct iwm_umac_channel_info { | |||
267 | u8 reserved; | 267 | u8 reserved; |
268 | u8 flags; | 268 | u8 flags; |
269 | __le32 channels_mask; | 269 | __le32 channels_mask; |
270 | } __attribute__ ((packed)); | 270 | } __packed; |
271 | 271 | ||
272 | struct iwm_umac_cmd_get_channel_list { | 272 | struct iwm_umac_cmd_get_channel_list { |
273 | __le16 count; | 273 | __le16 count; |
274 | __le16 reserved; | 274 | __le16 reserved; |
275 | struct iwm_umac_channel_info ch[0]; | 275 | struct iwm_umac_channel_info ch[0]; |
276 | } __attribute__ ((packed)); | 276 | } __packed; |
277 | 277 | ||
278 | 278 | ||
279 | /* UMAC WiFi interface commands */ | 279 | /* UMAC WiFi interface commands */ |
@@ -304,7 +304,7 @@ struct iwm_umac_ssid { | |||
304 | u8 ssid_len; | 304 | u8 ssid_len; |
305 | u8 ssid[IEEE80211_MAX_SSID_LEN]; | 305 | u8 ssid[IEEE80211_MAX_SSID_LEN]; |
306 | u8 reserved[3]; | 306 | u8 reserved[3]; |
307 | } __attribute__ ((packed)); | 307 | } __packed; |
308 | 308 | ||
309 | struct iwm_umac_cmd_scan_request { | 309 | struct iwm_umac_cmd_scan_request { |
310 | struct iwm_umac_wifi_if hdr; | 310 | struct iwm_umac_wifi_if hdr; |
@@ -314,7 +314,7 @@ struct iwm_umac_cmd_scan_request { | |||
314 | u8 timeout; /* In seconds */ | 314 | u8 timeout; /* In seconds */ |
315 | u8 reserved; | 315 | u8 reserved; |
316 | struct iwm_umac_ssid ssids[UMAC_WIFI_IF_PROBE_OPTION_MAX]; | 316 | struct iwm_umac_ssid ssids[UMAC_WIFI_IF_PROBE_OPTION_MAX]; |
317 | } __attribute__ ((packed)); | 317 | } __packed; |
318 | 318 | ||
319 | #define UMAC_CIPHER_TYPE_NONE 0xFF | 319 | #define UMAC_CIPHER_TYPE_NONE 0xFF |
320 | #define UMAC_CIPHER_TYPE_USE_GROUPCAST 0x00 | 320 | #define UMAC_CIPHER_TYPE_USE_GROUPCAST 0x00 |
@@ -357,7 +357,7 @@ struct iwm_umac_security { | |||
357 | u8 ucast_cipher; | 357 | u8 ucast_cipher; |
358 | u8 mcast_cipher; | 358 | u8 mcast_cipher; |
359 | u8 flags; | 359 | u8 flags; |
360 | } __attribute__ ((packed)); | 360 | } __packed; |
361 | 361 | ||
362 | struct iwm_umac_ibss { | 362 | struct iwm_umac_ibss { |
363 | u8 beacon_interval; /* in millisecond */ | 363 | u8 beacon_interval; /* in millisecond */ |
@@ -366,7 +366,7 @@ struct iwm_umac_ibss { | |||
366 | u8 band; | 366 | u8 band; |
367 | u8 channel; | 367 | u8 channel; |
368 | u8 reserved[3]; | 368 | u8 reserved[3]; |
369 | } __attribute__ ((packed)); | 369 | } __packed; |
370 | 370 | ||
371 | #define UMAC_MODE_BSS 0 | 371 | #define UMAC_MODE_BSS 0 |
372 | #define UMAC_MODE_IBSS 1 | 372 | #define UMAC_MODE_IBSS 1 |
@@ -385,13 +385,13 @@ struct iwm_umac_profile { | |||
385 | __le16 flags; | 385 | __le16 flags; |
386 | u8 wireless_mode; | 386 | u8 wireless_mode; |
387 | u8 bss_num; | 387 | u8 bss_num; |
388 | } __attribute__ ((packed)); | 388 | } __packed; |
389 | 389 | ||
390 | struct iwm_umac_invalidate_profile { | 390 | struct iwm_umac_invalidate_profile { |
391 | struct iwm_umac_wifi_if hdr; | 391 | struct iwm_umac_wifi_if hdr; |
392 | u8 reason; | 392 | u8 reason; |
393 | u8 reserved[3]; | 393 | u8 reserved[3]; |
394 | } __attribute__ ((packed)); | 394 | } __packed; |
395 | 395 | ||
396 | /* Encryption key commands */ | 396 | /* Encryption key commands */ |
397 | struct iwm_umac_key_wep40 { | 397 | struct iwm_umac_key_wep40 { |
@@ -400,7 +400,7 @@ struct iwm_umac_key_wep40 { | |||
400 | u8 key[WLAN_KEY_LEN_WEP40]; | 400 | u8 key[WLAN_KEY_LEN_WEP40]; |
401 | u8 static_key; | 401 | u8 static_key; |
402 | u8 reserved[2]; | 402 | u8 reserved[2]; |
403 | } __attribute__ ((packed)); | 403 | } __packed; |
404 | 404 | ||
405 | struct iwm_umac_key_wep104 { | 405 | struct iwm_umac_key_wep104 { |
406 | struct iwm_umac_wifi_if hdr; | 406 | struct iwm_umac_wifi_if hdr; |
@@ -408,7 +408,7 @@ struct iwm_umac_key_wep104 { | |||
408 | u8 key[WLAN_KEY_LEN_WEP104]; | 408 | u8 key[WLAN_KEY_LEN_WEP104]; |
409 | u8 static_key; | 409 | u8 static_key; |
410 | u8 reserved[2]; | 410 | u8 reserved[2]; |
411 | } __attribute__ ((packed)); | 411 | } __packed; |
412 | 412 | ||
413 | #define IWM_TKIP_KEY_SIZE 16 | 413 | #define IWM_TKIP_KEY_SIZE 16 |
414 | #define IWM_TKIP_MIC_SIZE 8 | 414 | #define IWM_TKIP_MIC_SIZE 8 |
@@ -420,7 +420,7 @@ struct iwm_umac_key_tkip { | |||
420 | u8 tkip_key[IWM_TKIP_KEY_SIZE]; | 420 | u8 tkip_key[IWM_TKIP_KEY_SIZE]; |
421 | u8 mic_rx_key[IWM_TKIP_MIC_SIZE]; | 421 | u8 mic_rx_key[IWM_TKIP_MIC_SIZE]; |
422 | u8 mic_tx_key[IWM_TKIP_MIC_SIZE]; | 422 | u8 mic_tx_key[IWM_TKIP_MIC_SIZE]; |
423 | } __attribute__ ((packed)); | 423 | } __packed; |
424 | 424 | ||
425 | struct iwm_umac_key_ccmp { | 425 | struct iwm_umac_key_ccmp { |
426 | struct iwm_umac_wifi_if hdr; | 426 | struct iwm_umac_wifi_if hdr; |
@@ -428,27 +428,27 @@ struct iwm_umac_key_ccmp { | |||
428 | u8 iv_count[6]; | 428 | u8 iv_count[6]; |
429 | u8 reserved[2]; | 429 | u8 reserved[2]; |
430 | u8 key[WLAN_KEY_LEN_CCMP]; | 430 | u8 key[WLAN_KEY_LEN_CCMP]; |
431 | } __attribute__ ((packed)); | 431 | } __packed; |
432 | 432 | ||
433 | struct iwm_umac_key_remove { | 433 | struct iwm_umac_key_remove { |
434 | struct iwm_umac_wifi_if hdr; | 434 | struct iwm_umac_wifi_if hdr; |
435 | struct iwm_umac_key_hdr key_hdr; | 435 | struct iwm_umac_key_hdr key_hdr; |
436 | } __attribute__ ((packed)); | 436 | } __packed; |
437 | 437 | ||
438 | struct iwm_umac_tx_key_id { | 438 | struct iwm_umac_tx_key_id { |
439 | struct iwm_umac_wifi_if hdr; | 439 | struct iwm_umac_wifi_if hdr; |
440 | u8 key_idx; | 440 | u8 key_idx; |
441 | u8 reserved[3]; | 441 | u8 reserved[3]; |
442 | } __attribute__ ((packed)); | 442 | } __packed; |
443 | 443 | ||
444 | struct iwm_umac_pwr_trigger { | 444 | struct iwm_umac_pwr_trigger { |
445 | struct iwm_umac_wifi_if hdr; | 445 | struct iwm_umac_wifi_if hdr; |
446 | __le32 reseved; | 446 | __le32 reseved; |
447 | } __attribute__ ((packed)); | 447 | } __packed; |
448 | 448 | ||
449 | struct iwm_umac_cmd_stats_req { | 449 | struct iwm_umac_cmd_stats_req { |
450 | __le32 flags; | 450 | __le32 flags; |
451 | } __attribute__ ((packed)); | 451 | } __packed; |
452 | 452 | ||
453 | struct iwm_umac_cmd_stop_resume_tx { | 453 | struct iwm_umac_cmd_stop_resume_tx { |
454 | u8 flags; | 454 | u8 flags; |
@@ -456,7 +456,7 @@ struct iwm_umac_cmd_stop_resume_tx { | |||
456 | __le16 stop_resume_tid_msk; | 456 | __le16 stop_resume_tid_msk; |
457 | __le16 last_seq_num[IWM_UMAC_TID_NR]; | 457 | __le16 last_seq_num[IWM_UMAC_TID_NR]; |
458 | u16 reserved; | 458 | u16 reserved; |
459 | } __attribute__ ((packed)); | 459 | } __packed; |
460 | 460 | ||
461 | #define IWM_CMD_PMKID_ADD 1 | 461 | #define IWM_CMD_PMKID_ADD 1 |
462 | #define IWM_CMD_PMKID_DEL 2 | 462 | #define IWM_CMD_PMKID_DEL 2 |
@@ -468,7 +468,7 @@ struct iwm_umac_pmkid_update { | |||
468 | u8 bssid[ETH_ALEN]; | 468 | u8 bssid[ETH_ALEN]; |
469 | __le16 reserved; | 469 | __le16 reserved; |
470 | u8 pmkid[WLAN_PMKID_LEN]; | 470 | u8 pmkid[WLAN_PMKID_LEN]; |
471 | } __attribute__ ((packed)); | 471 | } __packed; |
472 | 472 | ||
473 | /* LMAC commands */ | 473 | /* LMAC commands */ |
474 | int iwm_read_mac(struct iwm_priv *iwm, u8 *mac); | 474 | int iwm_read_mac(struct iwm_priv *iwm, u8 *mac); |
diff --git a/drivers/net/wireless/iwmc3200wifi/hal.c b/drivers/net/wireless/iwmc3200wifi/hal.c index 9531b18cf72a..907ac890997c 100644 --- a/drivers/net/wireless/iwmc3200wifi/hal.c +++ b/drivers/net/wireless/iwmc3200wifi/hal.c | |||
@@ -54,7 +54,7 @@ | |||
54 | * LMAC. If you look at LMAC commands you'll se that they | 54 | * LMAC. If you look at LMAC commands you'll se that they |
55 | * are actually regular iwlwifi target commands encapsulated | 55 | * are actually regular iwlwifi target commands encapsulated |
56 | * into a special UMAC command called UMAC passthrough. | 56 | * into a special UMAC command called UMAC passthrough. |
57 | * This is due to the fact the the host talks exclusively | 57 | * This is due to the fact the host talks exclusively |
58 | * to the UMAC and so there needs to be a special UMAC | 58 | * to the UMAC and so there needs to be a special UMAC |
59 | * command for talking to the LMAC. | 59 | * command for talking to the LMAC. |
60 | * This is how a wifi command is layed out: | 60 | * This is how a wifi command is layed out: |
diff --git a/drivers/net/wireless/iwmc3200wifi/iwm.h b/drivers/net/wireless/iwmc3200wifi/iwm.h index 13266c3842f8..51d7efa15ae6 100644 --- a/drivers/net/wireless/iwmc3200wifi/iwm.h +++ b/drivers/net/wireless/iwmc3200wifi/iwm.h | |||
@@ -162,7 +162,7 @@ struct iwm_umac_key_hdr { | |||
162 | u8 mac[ETH_ALEN]; | 162 | u8 mac[ETH_ALEN]; |
163 | u8 key_idx; | 163 | u8 key_idx; |
164 | u8 multicast; /* BCast encrypt & BCast decrypt of frames FROM mac */ | 164 | u8 multicast; /* BCast encrypt & BCast decrypt of frames FROM mac */ |
165 | } __attribute__ ((packed)); | 165 | } __packed; |
166 | 166 | ||
167 | struct iwm_key { | 167 | struct iwm_key { |
168 | struct iwm_umac_key_hdr hdr; | 168 | struct iwm_umac_key_hdr hdr; |
diff --git a/drivers/net/wireless/iwmc3200wifi/lmac.h b/drivers/net/wireless/iwmc3200wifi/lmac.h index a855a99e49b8..5ddcdf8c70c0 100644 --- a/drivers/net/wireless/iwmc3200wifi/lmac.h +++ b/drivers/net/wireless/iwmc3200wifi/lmac.h | |||
@@ -43,7 +43,7 @@ struct iwm_lmac_hdr { | |||
43 | u8 id; | 43 | u8 id; |
44 | u8 flags; | 44 | u8 flags; |
45 | __le16 seq_num; | 45 | __le16 seq_num; |
46 | } __attribute__ ((packed)); | 46 | } __packed; |
47 | 47 | ||
48 | /* LMAC commands */ | 48 | /* LMAC commands */ |
49 | #define CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_AFTER_MSK 0x1 | 49 | #define CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_AFTER_MSK 0x1 |
@@ -54,23 +54,23 @@ struct iwm_lmac_cal_cfg_elt { | |||
54 | __le32 send_res; /* 1 for sending back results */ | 54 | __le32 send_res; /* 1 for sending back results */ |
55 | __le32 apply_res; /* 1 for applying calibration results to HW */ | 55 | __le32 apply_res; /* 1 for applying calibration results to HW */ |
56 | __le32 reserved; | 56 | __le32 reserved; |
57 | } __attribute__ ((packed)); | 57 | } __packed; |
58 | 58 | ||
59 | struct iwm_lmac_cal_cfg_status { | 59 | struct iwm_lmac_cal_cfg_status { |
60 | struct iwm_lmac_cal_cfg_elt init; | 60 | struct iwm_lmac_cal_cfg_elt init; |
61 | struct iwm_lmac_cal_cfg_elt periodic; | 61 | struct iwm_lmac_cal_cfg_elt periodic; |
62 | __le32 flags; /* CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_AFTER_MSK */ | 62 | __le32 flags; /* CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_AFTER_MSK */ |
63 | } __attribute__ ((packed)); | 63 | } __packed; |
64 | 64 | ||
65 | struct iwm_lmac_cal_cfg_cmd { | 65 | struct iwm_lmac_cal_cfg_cmd { |
66 | struct iwm_lmac_cal_cfg_status ucode_cfg; | 66 | struct iwm_lmac_cal_cfg_status ucode_cfg; |
67 | struct iwm_lmac_cal_cfg_status driver_cfg; | 67 | struct iwm_lmac_cal_cfg_status driver_cfg; |
68 | __le32 reserved; | 68 | __le32 reserved; |
69 | } __attribute__ ((packed)); | 69 | } __packed; |
70 | 70 | ||
71 | struct iwm_lmac_cal_cfg_resp { | 71 | struct iwm_lmac_cal_cfg_resp { |
72 | __le32 status; | 72 | __le32 status; |
73 | } __attribute__ ((packed)); | 73 | } __packed; |
74 | 74 | ||
75 | #define IWM_CARD_STATE_SW_HW_ENABLED 0x00 | 75 | #define IWM_CARD_STATE_SW_HW_ENABLED 0x00 |
76 | #define IWM_CARD_STATE_HW_DISABLED 0x01 | 76 | #define IWM_CARD_STATE_HW_DISABLED 0x01 |
@@ -80,7 +80,7 @@ struct iwm_lmac_cal_cfg_resp { | |||
80 | 80 | ||
81 | struct iwm_lmac_card_state { | 81 | struct iwm_lmac_card_state { |
82 | __le32 flags; | 82 | __le32 flags; |
83 | } __attribute__ ((packed)); | 83 | } __packed; |
84 | 84 | ||
85 | /** | 85 | /** |
86 | * COEX_PRIORITY_TABLE_CMD | 86 | * COEX_PRIORITY_TABLE_CMD |
@@ -131,7 +131,7 @@ struct coex_event { | |||
131 | u8 win_med_prio; | 131 | u8 win_med_prio; |
132 | u8 reserved; | 132 | u8 reserved; |
133 | u8 flags; | 133 | u8 flags; |
134 | } __attribute__ ((packed)); | 134 | } __packed; |
135 | 135 | ||
136 | #define COEX_FLAGS_STA_TABLE_VALID_MSK 0x1 | 136 | #define COEX_FLAGS_STA_TABLE_VALID_MSK 0x1 |
137 | #define COEX_FLAGS_UNASSOC_WAKEUP_UMASK_MSK 0x4 | 137 | #define COEX_FLAGS_UNASSOC_WAKEUP_UMASK_MSK 0x4 |
@@ -142,7 +142,7 @@ struct iwm_coex_prio_table_cmd { | |||
142 | u8 flags; | 142 | u8 flags; |
143 | u8 reserved[3]; | 143 | u8 reserved[3]; |
144 | struct coex_event sta_prio[COEX_EVENTS_NUM]; | 144 | struct coex_event sta_prio[COEX_EVENTS_NUM]; |
145 | } __attribute__ ((packed)); | 145 | } __packed; |
146 | 146 | ||
147 | /* Coexistence definitions | 147 | /* Coexistence definitions |
148 | * | 148 | * |
@@ -192,7 +192,7 @@ struct iwm_ct_kill_cfg_cmd { | |||
192 | u32 exit_threshold; | 192 | u32 exit_threshold; |
193 | u32 reserved; | 193 | u32 reserved; |
194 | u32 entry_threshold; | 194 | u32 entry_threshold; |
195 | } __attribute__ ((packed)); | 195 | } __packed; |
196 | 196 | ||
197 | 197 | ||
198 | /* LMAC OP CODES */ | 198 | /* LMAC OP CODES */ |
@@ -428,7 +428,7 @@ struct iwm_lmac_calib_hdr { | |||
428 | u8 first_grp; | 428 | u8 first_grp; |
429 | u8 grp_num; | 429 | u8 grp_num; |
430 | u8 all_data_valid; | 430 | u8 all_data_valid; |
431 | } __attribute__ ((packed)); | 431 | } __packed; |
432 | 432 | ||
433 | #define IWM_LMAC_CALIB_FREQ_GROUPS_NR 7 | 433 | #define IWM_LMAC_CALIB_FREQ_GROUPS_NR 7 |
434 | #define IWM_CALIB_FREQ_GROUPS_NR 5 | 434 | #define IWM_CALIB_FREQ_GROUPS_NR 5 |
@@ -437,20 +437,20 @@ struct iwm_lmac_calib_hdr { | |||
437 | struct iwm_calib_rxiq_entry { | 437 | struct iwm_calib_rxiq_entry { |
438 | u16 ptam_postdist_ars; | 438 | u16 ptam_postdist_ars; |
439 | u16 ptam_postdist_arc; | 439 | u16 ptam_postdist_arc; |
440 | } __attribute__ ((packed)); | 440 | } __packed; |
441 | 441 | ||
442 | struct iwm_calib_rxiq_group { | 442 | struct iwm_calib_rxiq_group { |
443 | struct iwm_calib_rxiq_entry mode[IWM_CALIB_DC_MODES_NR]; | 443 | struct iwm_calib_rxiq_entry mode[IWM_CALIB_DC_MODES_NR]; |
444 | } __attribute__ ((packed)); | 444 | } __packed; |
445 | 445 | ||
446 | struct iwm_lmac_calib_rxiq { | 446 | struct iwm_lmac_calib_rxiq { |
447 | struct iwm_calib_rxiq_group group[IWM_LMAC_CALIB_FREQ_GROUPS_NR]; | 447 | struct iwm_calib_rxiq_group group[IWM_LMAC_CALIB_FREQ_GROUPS_NR]; |
448 | } __attribute__ ((packed)); | 448 | } __packed; |
449 | 449 | ||
450 | struct iwm_calib_rxiq { | 450 | struct iwm_calib_rxiq { |
451 | struct iwm_lmac_calib_hdr hdr; | 451 | struct iwm_lmac_calib_hdr hdr; |
452 | struct iwm_calib_rxiq_group group[IWM_CALIB_FREQ_GROUPS_NR]; | 452 | struct iwm_calib_rxiq_group group[IWM_CALIB_FREQ_GROUPS_NR]; |
453 | } __attribute__ ((packed)); | 453 | } __packed; |
454 | 454 | ||
455 | #define LMAC_STA_ID_SEED 0x0f | 455 | #define LMAC_STA_ID_SEED 0x0f |
456 | #define LMAC_STA_ID_POS 0 | 456 | #define LMAC_STA_ID_POS 0 |
@@ -463,7 +463,7 @@ struct iwm_lmac_power_report { | |||
463 | u8 pa_integ_res_A[3]; | 463 | u8 pa_integ_res_A[3]; |
464 | u8 pa_integ_res_B[3]; | 464 | u8 pa_integ_res_B[3]; |
465 | u8 pa_integ_res_C[3]; | 465 | u8 pa_integ_res_C[3]; |
466 | } __attribute__ ((packed)); | 466 | } __packed; |
467 | 467 | ||
468 | struct iwm_lmac_tx_resp { | 468 | struct iwm_lmac_tx_resp { |
469 | u8 frame_cnt; /* 1-no aggregation, greater then 1 - aggregation */ | 469 | u8 frame_cnt; /* 1-no aggregation, greater then 1 - aggregation */ |
@@ -479,6 +479,6 @@ struct iwm_lmac_tx_resp { | |||
479 | u8 ra_tid; | 479 | u8 ra_tid; |
480 | __le16 frame_ctl; | 480 | __le16 frame_ctl; |
481 | __le32 status; | 481 | __le32 status; |
482 | } __attribute__ ((packed)); | 482 | } __packed; |
483 | 483 | ||
484 | #endif | 484 | #endif |
diff --git a/drivers/net/wireless/iwmc3200wifi/rx.c b/drivers/net/wireless/iwmc3200wifi/rx.c index e1184deca559..c02fcedea9fa 100644 --- a/drivers/net/wireless/iwmc3200wifi/rx.c +++ b/drivers/net/wireless/iwmc3200wifi/rx.c | |||
@@ -321,14 +321,14 @@ iwm_rx_ticket_node_alloc(struct iwm_priv *iwm, struct iwm_rx_ticket *ticket) | |||
321 | return ERR_PTR(-ENOMEM); | 321 | return ERR_PTR(-ENOMEM); |
322 | } | 322 | } |
323 | 323 | ||
324 | ticket_node->ticket = kzalloc(sizeof(struct iwm_rx_ticket), GFP_KERNEL); | 324 | ticket_node->ticket = kmemdup(ticket, sizeof(struct iwm_rx_ticket), |
325 | GFP_KERNEL); | ||
325 | if (!ticket_node->ticket) { | 326 | if (!ticket_node->ticket) { |
326 | IWM_ERR(iwm, "Couldn't allocate RX ticket\n"); | 327 | IWM_ERR(iwm, "Couldn't allocate RX ticket\n"); |
327 | kfree(ticket_node); | 328 | kfree(ticket_node); |
328 | return ERR_PTR(-ENOMEM); | 329 | return ERR_PTR(-ENOMEM); |
329 | } | 330 | } |
330 | 331 | ||
331 | memcpy(ticket_node->ticket, ticket, sizeof(struct iwm_rx_ticket)); | ||
332 | INIT_LIST_HEAD(&ticket_node->node); | 332 | INIT_LIST_HEAD(&ticket_node->node); |
333 | 333 | ||
334 | return ticket_node; | 334 | return ticket_node; |
diff --git a/drivers/net/wireless/iwmc3200wifi/umac.h b/drivers/net/wireless/iwmc3200wifi/umac.h index 0cbba3ecc813..4a137d334a42 100644 --- a/drivers/net/wireless/iwmc3200wifi/umac.h +++ b/drivers/net/wireless/iwmc3200wifi/umac.h | |||
@@ -42,19 +42,19 @@ | |||
42 | struct iwm_udma_in_hdr { | 42 | struct iwm_udma_in_hdr { |
43 | __le32 cmd; | 43 | __le32 cmd; |
44 | __le32 size; | 44 | __le32 size; |
45 | } __attribute__ ((packed)); | 45 | } __packed; |
46 | 46 | ||
47 | struct iwm_udma_out_nonwifi_hdr { | 47 | struct iwm_udma_out_nonwifi_hdr { |
48 | __le32 cmd; | 48 | __le32 cmd; |
49 | __le32 addr; | 49 | __le32 addr; |
50 | __le32 op1_sz; | 50 | __le32 op1_sz; |
51 | __le32 op2; | 51 | __le32 op2; |
52 | } __attribute__ ((packed)); | 52 | } __packed; |
53 | 53 | ||
54 | struct iwm_udma_out_wifi_hdr { | 54 | struct iwm_udma_out_wifi_hdr { |
55 | __le32 cmd; | 55 | __le32 cmd; |
56 | __le32 meta_data; | 56 | __le32 meta_data; |
57 | } __attribute__ ((packed)); | 57 | } __packed; |
58 | 58 | ||
59 | /* Sequence numbering */ | 59 | /* Sequence numbering */ |
60 | #define UMAC_WIFI_SEQ_NUM_BASE 1 | 60 | #define UMAC_WIFI_SEQ_NUM_BASE 1 |
@@ -408,12 +408,12 @@ struct iwm_rx_ticket { | |||
408 | __le16 flags; | 408 | __le16 flags; |
409 | u8 payload_offset; /* includes: MAC header, pad, IV */ | 409 | u8 payload_offset; /* includes: MAC header, pad, IV */ |
410 | u8 tail_len; /* includes: MIC, ICV, CRC (w/o STATUS) */ | 410 | u8 tail_len; /* includes: MIC, ICV, CRC (w/o STATUS) */ |
411 | } __attribute__ ((packed)); | 411 | } __packed; |
412 | 412 | ||
413 | struct iwm_rx_mpdu_hdr { | 413 | struct iwm_rx_mpdu_hdr { |
414 | __le16 len; | 414 | __le16 len; |
415 | __le16 reserved; | 415 | __le16 reserved; |
416 | } __attribute__ ((packed)); | 416 | } __packed; |
417 | 417 | ||
418 | /* UMAC SW WIFI API */ | 418 | /* UMAC SW WIFI API */ |
419 | 419 | ||
@@ -421,31 +421,31 @@ struct iwm_dev_cmd_hdr { | |||
421 | u8 cmd; | 421 | u8 cmd; |
422 | u8 flags; | 422 | u8 flags; |
423 | __le16 seq_num; | 423 | __le16 seq_num; |
424 | } __attribute__ ((packed)); | 424 | } __packed; |
425 | 425 | ||
426 | struct iwm_umac_fw_cmd_hdr { | 426 | struct iwm_umac_fw_cmd_hdr { |
427 | __le32 meta_data; | 427 | __le32 meta_data; |
428 | struct iwm_dev_cmd_hdr cmd; | 428 | struct iwm_dev_cmd_hdr cmd; |
429 | } __attribute__ ((packed)); | 429 | } __packed; |
430 | 430 | ||
431 | struct iwm_umac_wifi_out_hdr { | 431 | struct iwm_umac_wifi_out_hdr { |
432 | struct iwm_udma_out_wifi_hdr hw_hdr; | 432 | struct iwm_udma_out_wifi_hdr hw_hdr; |
433 | struct iwm_umac_fw_cmd_hdr sw_hdr; | 433 | struct iwm_umac_fw_cmd_hdr sw_hdr; |
434 | } __attribute__ ((packed)); | 434 | } __packed; |
435 | 435 | ||
436 | struct iwm_umac_nonwifi_out_hdr { | 436 | struct iwm_umac_nonwifi_out_hdr { |
437 | struct iwm_udma_out_nonwifi_hdr hw_hdr; | 437 | struct iwm_udma_out_nonwifi_hdr hw_hdr; |
438 | } __attribute__ ((packed)); | 438 | } __packed; |
439 | 439 | ||
440 | struct iwm_umac_wifi_in_hdr { | 440 | struct iwm_umac_wifi_in_hdr { |
441 | struct iwm_udma_in_hdr hw_hdr; | 441 | struct iwm_udma_in_hdr hw_hdr; |
442 | struct iwm_umac_fw_cmd_hdr sw_hdr; | 442 | struct iwm_umac_fw_cmd_hdr sw_hdr; |
443 | } __attribute__ ((packed)); | 443 | } __packed; |
444 | 444 | ||
445 | struct iwm_umac_nonwifi_in_hdr { | 445 | struct iwm_umac_nonwifi_in_hdr { |
446 | struct iwm_udma_in_hdr hw_hdr; | 446 | struct iwm_udma_in_hdr hw_hdr; |
447 | __le32 time_stamp; | 447 | __le32 time_stamp; |
448 | } __attribute__ ((packed)); | 448 | } __packed; |
449 | 449 | ||
450 | #define IWM_UMAC_PAGE_SIZE 0x200 | 450 | #define IWM_UMAC_PAGE_SIZE 0x200 |
451 | 451 | ||
@@ -521,7 +521,7 @@ struct iwm_umac_notif_wifi_if { | |||
521 | u8 status; | 521 | u8 status; |
522 | u8 flags; | 522 | u8 flags; |
523 | __le16 buf_size; | 523 | __le16 buf_size; |
524 | } __attribute__ ((packed)); | 524 | } __packed; |
525 | 525 | ||
526 | #define UMAC_ROAM_REASON_FIRST_SELECTION 0x1 | 526 | #define UMAC_ROAM_REASON_FIRST_SELECTION 0x1 |
527 | #define UMAC_ROAM_REASON_AP_DEAUTH 0x2 | 527 | #define UMAC_ROAM_REASON_AP_DEAUTH 0x2 |
@@ -535,7 +535,7 @@ struct iwm_umac_notif_assoc_start { | |||
535 | __le32 roam_reason; | 535 | __le32 roam_reason; |
536 | u8 bssid[ETH_ALEN]; | 536 | u8 bssid[ETH_ALEN]; |
537 | u8 reserved[2]; | 537 | u8 reserved[2]; |
538 | } __attribute__ ((packed)); | 538 | } __packed; |
539 | 539 | ||
540 | #define UMAC_ASSOC_COMPLETE_SUCCESS 0x0 | 540 | #define UMAC_ASSOC_COMPLETE_SUCCESS 0x0 |
541 | #define UMAC_ASSOC_COMPLETE_FAILURE 0x1 | 541 | #define UMAC_ASSOC_COMPLETE_FAILURE 0x1 |
@@ -546,7 +546,7 @@ struct iwm_umac_notif_assoc_complete { | |||
546 | u8 bssid[ETH_ALEN]; | 546 | u8 bssid[ETH_ALEN]; |
547 | u8 band; | 547 | u8 band; |
548 | u8 channel; | 548 | u8 channel; |
549 | } __attribute__ ((packed)); | 549 | } __packed; |
550 | 550 | ||
551 | #define UMAC_PROFILE_INVALID_ASSOC_TIMEOUT 0x0 | 551 | #define UMAC_PROFILE_INVALID_ASSOC_TIMEOUT 0x0 |
552 | #define UMAC_PROFILE_INVALID_ROAM_TIMEOUT 0x1 | 552 | #define UMAC_PROFILE_INVALID_ROAM_TIMEOUT 0x1 |
@@ -556,7 +556,7 @@ struct iwm_umac_notif_assoc_complete { | |||
556 | struct iwm_umac_notif_profile_invalidate { | 556 | struct iwm_umac_notif_profile_invalidate { |
557 | struct iwm_umac_notif_wifi_if mlme_hdr; | 557 | struct iwm_umac_notif_wifi_if mlme_hdr; |
558 | __le32 reason; | 558 | __le32 reason; |
559 | } __attribute__ ((packed)); | 559 | } __packed; |
560 | 560 | ||
561 | #define UMAC_SCAN_RESULT_SUCCESS 0x0 | 561 | #define UMAC_SCAN_RESULT_SUCCESS 0x0 |
562 | #define UMAC_SCAN_RESULT_ABORTED 0x1 | 562 | #define UMAC_SCAN_RESULT_ABORTED 0x1 |
@@ -568,7 +568,7 @@ struct iwm_umac_notif_scan_complete { | |||
568 | __le32 type; | 568 | __le32 type; |
569 | __le32 result; | 569 | __le32 result; |
570 | u8 seq_num; | 570 | u8 seq_num; |
571 | } __attribute__ ((packed)); | 571 | } __packed; |
572 | 572 | ||
573 | #define UMAC_OPCODE_ADD_MODIFY 0x0 | 573 | #define UMAC_OPCODE_ADD_MODIFY 0x0 |
574 | #define UMAC_OPCODE_REMOVE 0x1 | 574 | #define UMAC_OPCODE_REMOVE 0x1 |
@@ -582,7 +582,7 @@ struct iwm_umac_notif_sta_info { | |||
582 | u8 mac_addr[ETH_ALEN]; | 582 | u8 mac_addr[ETH_ALEN]; |
583 | u8 sta_id; /* bits 0-3: station ID, bits 4-7: station color */ | 583 | u8 sta_id; /* bits 0-3: station ID, bits 4-7: station color */ |
584 | u8 flags; | 584 | u8 flags; |
585 | } __attribute__ ((packed)); | 585 | } __packed; |
586 | 586 | ||
587 | #define UMAC_BAND_2GHZ 0 | 587 | #define UMAC_BAND_2GHZ 0 |
588 | #define UMAC_BAND_5GHZ 1 | 588 | #define UMAC_BAND_5GHZ 1 |
@@ -601,7 +601,7 @@ struct iwm_umac_notif_bss_info { | |||
601 | s8 rssi; | 601 | s8 rssi; |
602 | u8 reserved; | 602 | u8 reserved; |
603 | u8 frame_buf[1]; | 603 | u8 frame_buf[1]; |
604 | } __attribute__ ((packed)); | 604 | } __packed; |
605 | 605 | ||
606 | #define IWM_BSS_REMOVE_INDEX_MSK 0x0fff | 606 | #define IWM_BSS_REMOVE_INDEX_MSK 0x0fff |
607 | #define IWM_BSS_REMOVE_FLAGS_MSK 0xfc00 | 607 | #define IWM_BSS_REMOVE_FLAGS_MSK 0xfc00 |
@@ -614,13 +614,13 @@ struct iwm_umac_notif_bss_removed { | |||
614 | struct iwm_umac_notif_wifi_if mlme_hdr; | 614 | struct iwm_umac_notif_wifi_if mlme_hdr; |
615 | __le32 count; | 615 | __le32 count; |
616 | __le16 entries[0]; | 616 | __le16 entries[0]; |
617 | } __attribute__ ((packed)); | 617 | } __packed; |
618 | 618 | ||
619 | struct iwm_umac_notif_mgt_frame { | 619 | struct iwm_umac_notif_mgt_frame { |
620 | struct iwm_umac_notif_wifi_if mlme_hdr; | 620 | struct iwm_umac_notif_wifi_if mlme_hdr; |
621 | __le16 len; | 621 | __le16 len; |
622 | u8 frame[1]; | 622 | u8 frame[1]; |
623 | } __attribute__ ((packed)); | 623 | } __packed; |
624 | 624 | ||
625 | struct iwm_umac_notif_alive { | 625 | struct iwm_umac_notif_alive { |
626 | struct iwm_umac_wifi_in_hdr hdr; | 626 | struct iwm_umac_wifi_in_hdr hdr; |
@@ -630,13 +630,13 @@ struct iwm_umac_notif_alive { | |||
630 | __le16 reserved2; | 630 | __le16 reserved2; |
631 | __le16 page_grp_count; | 631 | __le16 page_grp_count; |
632 | __le32 page_grp_state[IWM_MACS_OUT_GROUPS]; | 632 | __le32 page_grp_state[IWM_MACS_OUT_GROUPS]; |
633 | } __attribute__ ((packed)); | 633 | } __packed; |
634 | 634 | ||
635 | struct iwm_umac_notif_init_complete { | 635 | struct iwm_umac_notif_init_complete { |
636 | struct iwm_umac_wifi_in_hdr hdr; | 636 | struct iwm_umac_wifi_in_hdr hdr; |
637 | __le16 status; | 637 | __le16 status; |
638 | __le16 reserved; | 638 | __le16 reserved; |
639 | } __attribute__ ((packed)); | 639 | } __packed; |
640 | 640 | ||
641 | /* error categories */ | 641 | /* error categories */ |
642 | enum { | 642 | enum { |
@@ -667,12 +667,12 @@ struct iwm_fw_error_hdr { | |||
667 | __le32 dbm_buf_end; | 667 | __le32 dbm_buf_end; |
668 | __le32 dbm_buf_write_ptr; | 668 | __le32 dbm_buf_write_ptr; |
669 | __le32 dbm_buf_cycle_cnt; | 669 | __le32 dbm_buf_cycle_cnt; |
670 | } __attribute__ ((packed)); | 670 | } __packed; |
671 | 671 | ||
672 | struct iwm_umac_notif_error { | 672 | struct iwm_umac_notif_error { |
673 | struct iwm_umac_wifi_in_hdr hdr; | 673 | struct iwm_umac_wifi_in_hdr hdr; |
674 | struct iwm_fw_error_hdr err; | 674 | struct iwm_fw_error_hdr err; |
675 | } __attribute__ ((packed)); | 675 | } __packed; |
676 | 676 | ||
677 | #define UMAC_DEALLOC_NTFY_CHANGES_CNT_POS 0 | 677 | #define UMAC_DEALLOC_NTFY_CHANGES_CNT_POS 0 |
678 | #define UMAC_DEALLOC_NTFY_CHANGES_CNT_SEED 0xff | 678 | #define UMAC_DEALLOC_NTFY_CHANGES_CNT_SEED 0xff |
@@ -687,20 +687,20 @@ struct iwm_umac_notif_page_dealloc { | |||
687 | struct iwm_umac_wifi_in_hdr hdr; | 687 | struct iwm_umac_wifi_in_hdr hdr; |
688 | __le32 changes; | 688 | __le32 changes; |
689 | __le32 grp_info[IWM_MACS_OUT_GROUPS]; | 689 | __le32 grp_info[IWM_MACS_OUT_GROUPS]; |
690 | } __attribute__ ((packed)); | 690 | } __packed; |
691 | 691 | ||
692 | struct iwm_umac_notif_wifi_status { | 692 | struct iwm_umac_notif_wifi_status { |
693 | struct iwm_umac_wifi_in_hdr hdr; | 693 | struct iwm_umac_wifi_in_hdr hdr; |
694 | __le16 status; | 694 | __le16 status; |
695 | __le16 reserved; | 695 | __le16 reserved; |
696 | } __attribute__ ((packed)); | 696 | } __packed; |
697 | 697 | ||
698 | struct iwm_umac_notif_rx_ticket { | 698 | struct iwm_umac_notif_rx_ticket { |
699 | struct iwm_umac_wifi_in_hdr hdr; | 699 | struct iwm_umac_wifi_in_hdr hdr; |
700 | u8 num_tickets; | 700 | u8 num_tickets; |
701 | u8 reserved[3]; | 701 | u8 reserved[3]; |
702 | struct iwm_rx_ticket tickets[1]; | 702 | struct iwm_rx_ticket tickets[1]; |
703 | } __attribute__ ((packed)); | 703 | } __packed; |
704 | 704 | ||
705 | /* Tx/Rx rates window (number of max of last update window per second) */ | 705 | /* Tx/Rx rates window (number of max of last update window per second) */ |
706 | #define UMAC_NTF_RATE_SAMPLE_NR 4 | 706 | #define UMAC_NTF_RATE_SAMPLE_NR 4 |
@@ -758,7 +758,7 @@ struct iwm_umac_notif_stats { | |||
758 | __le32 roam_unassoc; | 758 | __le32 roam_unassoc; |
759 | __le32 roam_deauth; | 759 | __le32 roam_deauth; |
760 | __le32 roam_ap_loadblance; | 760 | __le32 roam_ap_loadblance; |
761 | } __attribute__ ((packed)); | 761 | } __packed; |
762 | 762 | ||
763 | #define UMAC_STOP_TX_FLAG 0x1 | 763 | #define UMAC_STOP_TX_FLAG 0x1 |
764 | #define UMAC_RESUME_TX_FLAG 0x2 | 764 | #define UMAC_RESUME_TX_FLAG 0x2 |
@@ -770,7 +770,7 @@ struct iwm_umac_notif_stop_resume_tx { | |||
770 | u8 flags; /* UMAC_*_TX_FLAG_* */ | 770 | u8 flags; /* UMAC_*_TX_FLAG_* */ |
771 | u8 sta_id; | 771 | u8 sta_id; |
772 | __le16 stop_resume_tid_msk; /* tid bitmask */ | 772 | __le16 stop_resume_tid_msk; /* tid bitmask */ |
773 | } __attribute__ ((packed)); | 773 | } __packed; |
774 | 774 | ||
775 | #define UMAC_MAX_NUM_PMKIDS 4 | 775 | #define UMAC_MAX_NUM_PMKIDS 4 |
776 | 776 | ||
@@ -779,7 +779,7 @@ struct iwm_umac_wifi_if { | |||
779 | u8 oid; | 779 | u8 oid; |
780 | u8 flags; | 780 | u8 flags; |
781 | __le16 buf_size; | 781 | __le16 buf_size; |
782 | } __attribute__ ((packed)); | 782 | } __packed; |
783 | 783 | ||
784 | #define IWM_SEQ_NUM_HOST_MSK 0x0000 | 784 | #define IWM_SEQ_NUM_HOST_MSK 0x0000 |
785 | #define IWM_SEQ_NUM_UMAC_MSK 0x4000 | 785 | #define IWM_SEQ_NUM_UMAC_MSK 0x4000 |
diff --git a/drivers/net/wireless/libertas/cmd.c b/drivers/net/wireless/libertas/cmd.c index cdb9b9650d73..0fa6b0e59ea5 100644 --- a/drivers/net/wireless/libertas/cmd.c +++ b/drivers/net/wireless/libertas/cmd.c | |||
@@ -70,6 +70,8 @@ static u8 is_command_allowed_in_ps(u16 cmd) | |||
70 | switch (cmd) { | 70 | switch (cmd) { |
71 | case CMD_802_11_RSSI: | 71 | case CMD_802_11_RSSI: |
72 | return 1; | 72 | return 1; |
73 | case CMD_802_11_HOST_SLEEP_CFG: | ||
74 | return 1; | ||
73 | default: | 75 | default: |
74 | break; | 76 | break; |
75 | } | 77 | } |
@@ -185,6 +187,23 @@ out: | |||
185 | return ret; | 187 | return ret; |
186 | } | 188 | } |
187 | 189 | ||
190 | static int lbs_ret_host_sleep_cfg(struct lbs_private *priv, unsigned long dummy, | ||
191 | struct cmd_header *resp) | ||
192 | { | ||
193 | lbs_deb_enter(LBS_DEB_CMD); | ||
194 | if (priv->wol_criteria == EHS_REMOVE_WAKEUP) { | ||
195 | priv->is_host_sleep_configured = 0; | ||
196 | if (priv->psstate == PS_STATE_FULL_POWER) { | ||
197 | priv->is_host_sleep_activated = 0; | ||
198 | wake_up_interruptible(&priv->host_sleep_q); | ||
199 | } | ||
200 | } else { | ||
201 | priv->is_host_sleep_configured = 1; | ||
202 | } | ||
203 | lbs_deb_leave(LBS_DEB_CMD); | ||
204 | return 0; | ||
205 | } | ||
206 | |||
188 | int lbs_host_sleep_cfg(struct lbs_private *priv, uint32_t criteria, | 207 | int lbs_host_sleep_cfg(struct lbs_private *priv, uint32_t criteria, |
189 | struct wol_config *p_wol_config) | 208 | struct wol_config *p_wol_config) |
190 | { | 209 | { |
@@ -202,12 +221,11 @@ int lbs_host_sleep_cfg(struct lbs_private *priv, uint32_t criteria, | |||
202 | else | 221 | else |
203 | cmd_config.wol_conf.action = CMD_ACT_ACTION_NONE; | 222 | cmd_config.wol_conf.action = CMD_ACT_ACTION_NONE; |
204 | 223 | ||
205 | ret = lbs_cmd_with_response(priv, CMD_802_11_HOST_SLEEP_CFG, &cmd_config); | 224 | ret = __lbs_cmd(priv, CMD_802_11_HOST_SLEEP_CFG, &cmd_config.hdr, |
225 | le16_to_cpu(cmd_config.hdr.size), | ||
226 | lbs_ret_host_sleep_cfg, 0); | ||
206 | if (!ret) { | 227 | if (!ret) { |
207 | if (criteria) { | 228 | if (p_wol_config) |
208 | lbs_deb_cmd("Set WOL criteria to %x\n", criteria); | ||
209 | priv->wol_criteria = criteria; | ||
210 | } else | ||
211 | memcpy((uint8_t *) p_wol_config, | 229 | memcpy((uint8_t *) p_wol_config, |
212 | (uint8_t *)&cmd_config.wol_conf, | 230 | (uint8_t *)&cmd_config.wol_conf, |
213 | sizeof(struct wol_config)); | 231 | sizeof(struct wol_config)); |
@@ -712,6 +730,10 @@ static void lbs_queue_cmd(struct lbs_private *priv, | |||
712 | } | 730 | } |
713 | } | 731 | } |
714 | 732 | ||
733 | if (le16_to_cpu(cmdnode->cmdbuf->command) == | ||
734 | CMD_802_11_WAKEUP_CONFIRM) | ||
735 | addtail = 0; | ||
736 | |||
715 | spin_lock_irqsave(&priv->driver_lock, flags); | 737 | spin_lock_irqsave(&priv->driver_lock, flags); |
716 | 738 | ||
717 | if (addtail) | 739 | if (addtail) |
@@ -1353,6 +1375,11 @@ static void lbs_send_confirmsleep(struct lbs_private *priv) | |||
1353 | /* We don't get a response on the sleep-confirmation */ | 1375 | /* We don't get a response on the sleep-confirmation */ |
1354 | priv->dnld_sent = DNLD_RES_RECEIVED; | 1376 | priv->dnld_sent = DNLD_RES_RECEIVED; |
1355 | 1377 | ||
1378 | if (priv->is_host_sleep_configured) { | ||
1379 | priv->is_host_sleep_activated = 1; | ||
1380 | wake_up_interruptible(&priv->host_sleep_q); | ||
1381 | } | ||
1382 | |||
1356 | /* If nothing to do, go back to sleep (?) */ | 1383 | /* If nothing to do, go back to sleep (?) */ |
1357 | if (!kfifo_len(&priv->event_fifo) && !priv->resp_len[priv->resp_idx]) | 1384 | if (!kfifo_len(&priv->event_fifo) && !priv->resp_len[priv->resp_idx]) |
1358 | priv->psstate = PS_STATE_SLEEP; | 1385 | priv->psstate = PS_STATE_SLEEP; |
diff --git a/drivers/net/wireless/libertas/cmdresp.c b/drivers/net/wireless/libertas/cmdresp.c index 88f7131d66e9..d6c306353640 100644 --- a/drivers/net/wireless/libertas/cmdresp.c +++ b/drivers/net/wireless/libertas/cmdresp.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include "dev.h" | 17 | #include "dev.h" |
18 | #include "assoc.h" | 18 | #include "assoc.h" |
19 | #include "wext.h" | 19 | #include "wext.h" |
20 | #include "cmd.h" | ||
20 | 21 | ||
21 | /** | 22 | /** |
22 | * @brief This function handles disconnect event. it | 23 | * @brief This function handles disconnect event. it |
@@ -341,32 +342,10 @@ done: | |||
341 | return ret; | 342 | return ret; |
342 | } | 343 | } |
343 | 344 | ||
344 | static int lbs_send_confirmwake(struct lbs_private *priv) | ||
345 | { | ||
346 | struct cmd_header cmd; | ||
347 | int ret = 0; | ||
348 | |||
349 | lbs_deb_enter(LBS_DEB_HOST); | ||
350 | |||
351 | cmd.command = cpu_to_le16(CMD_802_11_WAKEUP_CONFIRM); | ||
352 | cmd.size = cpu_to_le16(sizeof(cmd)); | ||
353 | cmd.seqnum = cpu_to_le16(++priv->seqnum); | ||
354 | cmd.result = 0; | ||
355 | |||
356 | lbs_deb_hex(LBS_DEB_HOST, "wake confirm", (u8 *) &cmd, | ||
357 | sizeof(cmd)); | ||
358 | |||
359 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) &cmd, sizeof(cmd)); | ||
360 | if (ret) | ||
361 | lbs_pr_alert("SEND_WAKEC_CMD: Host to Card failed for Confirm Wake\n"); | ||
362 | |||
363 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); | ||
364 | return ret; | ||
365 | } | ||
366 | |||
367 | int lbs_process_event(struct lbs_private *priv, u32 event) | 345 | int lbs_process_event(struct lbs_private *priv, u32 event) |
368 | { | 346 | { |
369 | int ret = 0; | 347 | int ret = 0; |
348 | struct cmd_header cmd; | ||
370 | 349 | ||
371 | lbs_deb_enter(LBS_DEB_CMD); | 350 | lbs_deb_enter(LBS_DEB_CMD); |
372 | 351 | ||
@@ -410,7 +389,10 @@ int lbs_process_event(struct lbs_private *priv, u32 event) | |||
410 | if (priv->reset_deep_sleep_wakeup) | 389 | if (priv->reset_deep_sleep_wakeup) |
411 | priv->reset_deep_sleep_wakeup(priv); | 390 | priv->reset_deep_sleep_wakeup(priv); |
412 | priv->is_deep_sleep = 0; | 391 | priv->is_deep_sleep = 0; |
413 | lbs_send_confirmwake(priv); | 392 | lbs_cmd_async(priv, CMD_802_11_WAKEUP_CONFIRM, &cmd, |
393 | sizeof(cmd)); | ||
394 | priv->is_host_sleep_activated = 0; | ||
395 | wake_up_interruptible(&priv->host_sleep_q); | ||
414 | break; | 396 | break; |
415 | 397 | ||
416 | case MACREG_INT_CODE_DEEP_SLEEP_AWAKE: | 398 | case MACREG_INT_CODE_DEEP_SLEEP_AWAKE: |
diff --git a/drivers/net/wireless/libertas/decl.h b/drivers/net/wireless/libertas/decl.h index 709ffcad22ad..61db8bc62b3c 100644 --- a/drivers/net/wireless/libertas/decl.h +++ b/drivers/net/wireless/libertas/decl.h | |||
@@ -38,7 +38,7 @@ int lbs_set_mac_address(struct net_device *dev, void *addr); | |||
38 | void lbs_set_multicast_list(struct net_device *dev); | 38 | void lbs_set_multicast_list(struct net_device *dev); |
39 | 39 | ||
40 | int lbs_suspend(struct lbs_private *priv); | 40 | int lbs_suspend(struct lbs_private *priv); |
41 | void lbs_resume(struct lbs_private *priv); | 41 | int lbs_resume(struct lbs_private *priv); |
42 | 42 | ||
43 | void lbs_queue_event(struct lbs_private *priv, u32 event); | 43 | void lbs_queue_event(struct lbs_private *priv, u32 event); |
44 | void lbs_notify_command_response(struct lbs_private *priv, u8 resp_idx); | 44 | void lbs_notify_command_response(struct lbs_private *priv, u8 resp_idx); |
diff --git a/drivers/net/wireless/libertas/dev.h b/drivers/net/wireless/libertas/dev.h index a54880e4ad2b..71c5ad46ebf6 100644 --- a/drivers/net/wireless/libertas/dev.h +++ b/drivers/net/wireless/libertas/dev.h | |||
@@ -75,6 +75,7 @@ struct lbs_private { | |||
75 | 75 | ||
76 | /* Deep sleep */ | 76 | /* Deep sleep */ |
77 | int is_deep_sleep; | 77 | int is_deep_sleep; |
78 | int deep_sleep_required; | ||
78 | int is_auto_deep_sleep_enabled; | 79 | int is_auto_deep_sleep_enabled; |
79 | int wakeup_dev_required; | 80 | int wakeup_dev_required; |
80 | int is_activity_detected; | 81 | int is_activity_detected; |
@@ -82,6 +83,11 @@ struct lbs_private { | |||
82 | wait_queue_head_t ds_awake_q; | 83 | wait_queue_head_t ds_awake_q; |
83 | struct timer_list auto_deepsleep_timer; | 84 | struct timer_list auto_deepsleep_timer; |
84 | 85 | ||
86 | /* Host sleep*/ | ||
87 | int is_host_sleep_configured; | ||
88 | int is_host_sleep_activated; | ||
89 | wait_queue_head_t host_sleep_q; | ||
90 | |||
85 | /* Hardware access */ | 91 | /* Hardware access */ |
86 | void *card; | 92 | void *card; |
87 | u8 fw_ready; | 93 | u8 fw_ready; |
diff --git a/drivers/net/wireless/libertas/ethtool.c b/drivers/net/wireless/libertas/ethtool.c index 3804a58d7f4e..0cf31bbf6567 100644 --- a/drivers/net/wireless/libertas/ethtool.c +++ b/drivers/net/wireless/libertas/ethtool.c | |||
@@ -69,14 +69,11 @@ static void lbs_ethtool_get_wol(struct net_device *dev, | |||
69 | { | 69 | { |
70 | struct lbs_private *priv = dev->ml_priv; | 70 | struct lbs_private *priv = dev->ml_priv; |
71 | 71 | ||
72 | if (priv->wol_criteria == 0xffffffff) { | ||
73 | /* Interface driver didn't configure wake */ | ||
74 | wol->supported = wol->wolopts = 0; | ||
75 | return; | ||
76 | } | ||
77 | |||
78 | wol->supported = WAKE_UCAST|WAKE_MCAST|WAKE_BCAST|WAKE_PHY; | 72 | wol->supported = WAKE_UCAST|WAKE_MCAST|WAKE_BCAST|WAKE_PHY; |
79 | 73 | ||
74 | if (priv->wol_criteria == EHS_REMOVE_WAKEUP) | ||
75 | return; | ||
76 | |||
80 | if (priv->wol_criteria & EHS_WAKE_ON_UNICAST_DATA) | 77 | if (priv->wol_criteria & EHS_WAKE_ON_UNICAST_DATA) |
81 | wol->wolopts |= WAKE_UCAST; | 78 | wol->wolopts |= WAKE_UCAST; |
82 | if (priv->wol_criteria & EHS_WAKE_ON_MULTICAST_DATA) | 79 | if (priv->wol_criteria & EHS_WAKE_ON_MULTICAST_DATA) |
@@ -91,23 +88,22 @@ static int lbs_ethtool_set_wol(struct net_device *dev, | |||
91 | struct ethtool_wolinfo *wol) | 88 | struct ethtool_wolinfo *wol) |
92 | { | 89 | { |
93 | struct lbs_private *priv = dev->ml_priv; | 90 | struct lbs_private *priv = dev->ml_priv; |
94 | uint32_t criteria = 0; | ||
95 | 91 | ||
96 | if (wol->wolopts & ~(WAKE_UCAST|WAKE_MCAST|WAKE_BCAST|WAKE_PHY)) | 92 | if (wol->wolopts & ~(WAKE_UCAST|WAKE_MCAST|WAKE_BCAST|WAKE_PHY)) |
97 | return -EOPNOTSUPP; | 93 | return -EOPNOTSUPP; |
98 | 94 | ||
95 | priv->wol_criteria = 0; | ||
99 | if (wol->wolopts & WAKE_UCAST) | 96 | if (wol->wolopts & WAKE_UCAST) |
100 | criteria |= EHS_WAKE_ON_UNICAST_DATA; | 97 | priv->wol_criteria |= EHS_WAKE_ON_UNICAST_DATA; |
101 | if (wol->wolopts & WAKE_MCAST) | 98 | if (wol->wolopts & WAKE_MCAST) |
102 | criteria |= EHS_WAKE_ON_MULTICAST_DATA; | 99 | priv->wol_criteria |= EHS_WAKE_ON_MULTICAST_DATA; |
103 | if (wol->wolopts & WAKE_BCAST) | 100 | if (wol->wolopts & WAKE_BCAST) |
104 | criteria |= EHS_WAKE_ON_BROADCAST_DATA; | 101 | priv->wol_criteria |= EHS_WAKE_ON_BROADCAST_DATA; |
105 | if (wol->wolopts & WAKE_PHY) | 102 | if (wol->wolopts & WAKE_PHY) |
106 | criteria |= EHS_WAKE_ON_MAC_EVENT; | 103 | priv->wol_criteria |= EHS_WAKE_ON_MAC_EVENT; |
107 | if (wol->wolopts == 0) | 104 | if (wol->wolopts == 0) |
108 | criteria |= EHS_REMOVE_WAKEUP; | 105 | priv->wol_criteria |= EHS_REMOVE_WAKEUP; |
109 | 106 | return 0; | |
110 | return lbs_host_sleep_cfg(priv, criteria, (struct wol_config *)NULL); | ||
111 | } | 107 | } |
112 | 108 | ||
113 | const struct ethtool_ops lbs_ethtool_ops = { | 109 | const struct ethtool_ops lbs_ethtool_ops = { |
diff --git a/drivers/net/wireless/libertas/host.h b/drivers/net/wireless/libertas/host.h index 3809c0b49464..3bd5d3b6037a 100644 --- a/drivers/net/wireless/libertas/host.h +++ b/drivers/net/wireless/libertas/host.h | |||
@@ -326,7 +326,7 @@ struct txpd { | |||
326 | u8 pktdelay_2ms; | 326 | u8 pktdelay_2ms; |
327 | /* reserved */ | 327 | /* reserved */ |
328 | u8 reserved1; | 328 | u8 reserved1; |
329 | } __attribute__ ((packed)); | 329 | } __packed; |
330 | 330 | ||
331 | /* RxPD Descriptor */ | 331 | /* RxPD Descriptor */ |
332 | struct rxpd { | 332 | struct rxpd { |
@@ -339,8 +339,8 @@ struct rxpd { | |||
339 | u8 bss_type; | 339 | u8 bss_type; |
340 | /* BSS number */ | 340 | /* BSS number */ |
341 | u8 bss_num; | 341 | u8 bss_num; |
342 | } __attribute__ ((packed)) bss; | 342 | } __packed bss; |
343 | } __attribute__ ((packed)) u; | 343 | } __packed u; |
344 | 344 | ||
345 | /* SNR */ | 345 | /* SNR */ |
346 | u8 snr; | 346 | u8 snr; |
@@ -366,14 +366,14 @@ struct rxpd { | |||
366 | /* Pkt Priority */ | 366 | /* Pkt Priority */ |
367 | u8 priority; | 367 | u8 priority; |
368 | u8 reserved[3]; | 368 | u8 reserved[3]; |
369 | } __attribute__ ((packed)); | 369 | } __packed; |
370 | 370 | ||
371 | struct cmd_header { | 371 | struct cmd_header { |
372 | __le16 command; | 372 | __le16 command; |
373 | __le16 size; | 373 | __le16 size; |
374 | __le16 seqnum; | 374 | __le16 seqnum; |
375 | __le16 result; | 375 | __le16 result; |
376 | } __attribute__ ((packed)); | 376 | } __packed; |
377 | 377 | ||
378 | /* Generic structure to hold all key types. */ | 378 | /* Generic structure to hold all key types. */ |
379 | struct enc_key { | 379 | struct enc_key { |
@@ -387,7 +387,7 @@ struct enc_key { | |||
387 | struct lbs_offset_value { | 387 | struct lbs_offset_value { |
388 | u32 offset; | 388 | u32 offset; |
389 | u32 value; | 389 | u32 value; |
390 | } __attribute__ ((packed)); | 390 | } __packed; |
391 | 391 | ||
392 | /* | 392 | /* |
393 | * Define data structure for CMD_GET_HW_SPEC | 393 | * Define data structure for CMD_GET_HW_SPEC |
@@ -426,7 +426,7 @@ struct cmd_ds_get_hw_spec { | |||
426 | 426 | ||
427 | /*FW/HW capability */ | 427 | /*FW/HW capability */ |
428 | __le32 fwcapinfo; | 428 | __le32 fwcapinfo; |
429 | } __attribute__ ((packed)); | 429 | } __packed; |
430 | 430 | ||
431 | struct cmd_ds_802_11_subscribe_event { | 431 | struct cmd_ds_802_11_subscribe_event { |
432 | struct cmd_header hdr; | 432 | struct cmd_header hdr; |
@@ -440,7 +440,7 @@ struct cmd_ds_802_11_subscribe_event { | |||
440 | * bump this up a bit. | 440 | * bump this up a bit. |
441 | */ | 441 | */ |
442 | uint8_t tlv[128]; | 442 | uint8_t tlv[128]; |
443 | } __attribute__ ((packed)); | 443 | } __packed; |
444 | 444 | ||
445 | /* | 445 | /* |
446 | * This scan handle Country Information IE(802.11d compliant) | 446 | * This scan handle Country Information IE(802.11d compliant) |
@@ -452,7 +452,7 @@ struct cmd_ds_802_11_scan { | |||
452 | uint8_t bsstype; | 452 | uint8_t bsstype; |
453 | uint8_t bssid[ETH_ALEN]; | 453 | uint8_t bssid[ETH_ALEN]; |
454 | uint8_t tlvbuffer[0]; | 454 | uint8_t tlvbuffer[0]; |
455 | } __attribute__ ((packed)); | 455 | } __packed; |
456 | 456 | ||
457 | struct cmd_ds_802_11_scan_rsp { | 457 | struct cmd_ds_802_11_scan_rsp { |
458 | struct cmd_header hdr; | 458 | struct cmd_header hdr; |
@@ -460,7 +460,7 @@ struct cmd_ds_802_11_scan_rsp { | |||
460 | __le16 bssdescriptsize; | 460 | __le16 bssdescriptsize; |
461 | uint8_t nr_sets; | 461 | uint8_t nr_sets; |
462 | uint8_t bssdesc_and_tlvbuffer[0]; | 462 | uint8_t bssdesc_and_tlvbuffer[0]; |
463 | } __attribute__ ((packed)); | 463 | } __packed; |
464 | 464 | ||
465 | struct cmd_ds_802_11_get_log { | 465 | struct cmd_ds_802_11_get_log { |
466 | struct cmd_header hdr; | 466 | struct cmd_header hdr; |
@@ -478,20 +478,20 @@ struct cmd_ds_802_11_get_log { | |||
478 | __le32 fcserror; | 478 | __le32 fcserror; |
479 | __le32 txframe; | 479 | __le32 txframe; |
480 | __le32 wepundecryptable; | 480 | __le32 wepundecryptable; |
481 | } __attribute__ ((packed)); | 481 | } __packed; |
482 | 482 | ||
483 | struct cmd_ds_mac_control { | 483 | struct cmd_ds_mac_control { |
484 | struct cmd_header hdr; | 484 | struct cmd_header hdr; |
485 | __le16 action; | 485 | __le16 action; |
486 | u16 reserved; | 486 | u16 reserved; |
487 | } __attribute__ ((packed)); | 487 | } __packed; |
488 | 488 | ||
489 | struct cmd_ds_mac_multicast_adr { | 489 | struct cmd_ds_mac_multicast_adr { |
490 | struct cmd_header hdr; | 490 | struct cmd_header hdr; |
491 | __le16 action; | 491 | __le16 action; |
492 | __le16 nr_of_adrs; | 492 | __le16 nr_of_adrs; |
493 | u8 maclist[ETH_ALEN * MRVDRV_MAX_MULTICAST_LIST_SIZE]; | 493 | u8 maclist[ETH_ALEN * MRVDRV_MAX_MULTICAST_LIST_SIZE]; |
494 | } __attribute__ ((packed)); | 494 | } __packed; |
495 | 495 | ||
496 | struct cmd_ds_802_11_authenticate { | 496 | struct cmd_ds_802_11_authenticate { |
497 | struct cmd_header hdr; | 497 | struct cmd_header hdr; |
@@ -499,14 +499,14 @@ struct cmd_ds_802_11_authenticate { | |||
499 | u8 bssid[ETH_ALEN]; | 499 | u8 bssid[ETH_ALEN]; |
500 | u8 authtype; | 500 | u8 authtype; |
501 | u8 reserved[10]; | 501 | u8 reserved[10]; |
502 | } __attribute__ ((packed)); | 502 | } __packed; |
503 | 503 | ||
504 | struct cmd_ds_802_11_deauthenticate { | 504 | struct cmd_ds_802_11_deauthenticate { |
505 | struct cmd_header hdr; | 505 | struct cmd_header hdr; |
506 | 506 | ||
507 | u8 macaddr[ETH_ALEN]; | 507 | u8 macaddr[ETH_ALEN]; |
508 | __le16 reasoncode; | 508 | __le16 reasoncode; |
509 | } __attribute__ ((packed)); | 509 | } __packed; |
510 | 510 | ||
511 | struct cmd_ds_802_11_associate { | 511 | struct cmd_ds_802_11_associate { |
512 | struct cmd_header hdr; | 512 | struct cmd_header hdr; |
@@ -517,7 +517,7 @@ struct cmd_ds_802_11_associate { | |||
517 | __le16 bcnperiod; | 517 | __le16 bcnperiod; |
518 | u8 dtimperiod; | 518 | u8 dtimperiod; |
519 | u8 iebuf[512]; /* Enough for required and most optional IEs */ | 519 | u8 iebuf[512]; /* Enough for required and most optional IEs */ |
520 | } __attribute__ ((packed)); | 520 | } __packed; |
521 | 521 | ||
522 | struct cmd_ds_802_11_associate_response { | 522 | struct cmd_ds_802_11_associate_response { |
523 | struct cmd_header hdr; | 523 | struct cmd_header hdr; |
@@ -526,7 +526,7 @@ struct cmd_ds_802_11_associate_response { | |||
526 | __le16 statuscode; | 526 | __le16 statuscode; |
527 | __le16 aid; | 527 | __le16 aid; |
528 | u8 iebuf[512]; | 528 | u8 iebuf[512]; |
529 | } __attribute__ ((packed)); | 529 | } __packed; |
530 | 530 | ||
531 | struct cmd_ds_802_11_set_wep { | 531 | struct cmd_ds_802_11_set_wep { |
532 | struct cmd_header hdr; | 532 | struct cmd_header hdr; |
@@ -540,7 +540,7 @@ struct cmd_ds_802_11_set_wep { | |||
540 | /* 40, 128bit or TXWEP */ | 540 | /* 40, 128bit or TXWEP */ |
541 | uint8_t keytype[4]; | 541 | uint8_t keytype[4]; |
542 | uint8_t keymaterial[4][16]; | 542 | uint8_t keymaterial[4][16]; |
543 | } __attribute__ ((packed)); | 543 | } __packed; |
544 | 544 | ||
545 | struct cmd_ds_802_11_snmp_mib { | 545 | struct cmd_ds_802_11_snmp_mib { |
546 | struct cmd_header hdr; | 546 | struct cmd_header hdr; |
@@ -549,40 +549,40 @@ struct cmd_ds_802_11_snmp_mib { | |||
549 | __le16 oid; | 549 | __le16 oid; |
550 | __le16 bufsize; | 550 | __le16 bufsize; |
551 | u8 value[128]; | 551 | u8 value[128]; |
552 | } __attribute__ ((packed)); | 552 | } __packed; |
553 | 553 | ||
554 | struct cmd_ds_mac_reg_access { | 554 | struct cmd_ds_mac_reg_access { |
555 | __le16 action; | 555 | __le16 action; |
556 | __le16 offset; | 556 | __le16 offset; |
557 | __le32 value; | 557 | __le32 value; |
558 | } __attribute__ ((packed)); | 558 | } __packed; |
559 | 559 | ||
560 | struct cmd_ds_bbp_reg_access { | 560 | struct cmd_ds_bbp_reg_access { |
561 | __le16 action; | 561 | __le16 action; |
562 | __le16 offset; | 562 | __le16 offset; |
563 | u8 value; | 563 | u8 value; |
564 | u8 reserved[3]; | 564 | u8 reserved[3]; |
565 | } __attribute__ ((packed)); | 565 | } __packed; |
566 | 566 | ||
567 | struct cmd_ds_rf_reg_access { | 567 | struct cmd_ds_rf_reg_access { |
568 | __le16 action; | 568 | __le16 action; |
569 | __le16 offset; | 569 | __le16 offset; |
570 | u8 value; | 570 | u8 value; |
571 | u8 reserved[3]; | 571 | u8 reserved[3]; |
572 | } __attribute__ ((packed)); | 572 | } __packed; |
573 | 573 | ||
574 | struct cmd_ds_802_11_radio_control { | 574 | struct cmd_ds_802_11_radio_control { |
575 | struct cmd_header hdr; | 575 | struct cmd_header hdr; |
576 | 576 | ||
577 | __le16 action; | 577 | __le16 action; |
578 | __le16 control; | 578 | __le16 control; |
579 | } __attribute__ ((packed)); | 579 | } __packed; |
580 | 580 | ||
581 | struct cmd_ds_802_11_beacon_control { | 581 | struct cmd_ds_802_11_beacon_control { |
582 | __le16 action; | 582 | __le16 action; |
583 | __le16 beacon_enable; | 583 | __le16 beacon_enable; |
584 | __le16 beacon_period; | 584 | __le16 beacon_period; |
585 | } __attribute__ ((packed)); | 585 | } __packed; |
586 | 586 | ||
587 | struct cmd_ds_802_11_sleep_params { | 587 | struct cmd_ds_802_11_sleep_params { |
588 | struct cmd_header hdr; | 588 | struct cmd_header hdr; |
@@ -607,7 +607,7 @@ struct cmd_ds_802_11_sleep_params { | |||
607 | 607 | ||
608 | /* reserved field, should be set to zero */ | 608 | /* reserved field, should be set to zero */ |
609 | __le16 reserved; | 609 | __le16 reserved; |
610 | } __attribute__ ((packed)); | 610 | } __packed; |
611 | 611 | ||
612 | struct cmd_ds_802_11_rf_channel { | 612 | struct cmd_ds_802_11_rf_channel { |
613 | struct cmd_header hdr; | 613 | struct cmd_header hdr; |
@@ -617,7 +617,7 @@ struct cmd_ds_802_11_rf_channel { | |||
617 | __le16 rftype; /* unused */ | 617 | __le16 rftype; /* unused */ |
618 | __le16 reserved; /* unused */ | 618 | __le16 reserved; /* unused */ |
619 | u8 channellist[32]; /* unused */ | 619 | u8 channellist[32]; /* unused */ |
620 | } __attribute__ ((packed)); | 620 | } __packed; |
621 | 621 | ||
622 | struct cmd_ds_802_11_rssi { | 622 | struct cmd_ds_802_11_rssi { |
623 | /* weighting factor */ | 623 | /* weighting factor */ |
@@ -626,21 +626,21 @@ struct cmd_ds_802_11_rssi { | |||
626 | __le16 reserved_0; | 626 | __le16 reserved_0; |
627 | __le16 reserved_1; | 627 | __le16 reserved_1; |
628 | __le16 reserved_2; | 628 | __le16 reserved_2; |
629 | } __attribute__ ((packed)); | 629 | } __packed; |
630 | 630 | ||
631 | struct cmd_ds_802_11_rssi_rsp { | 631 | struct cmd_ds_802_11_rssi_rsp { |
632 | __le16 SNR; | 632 | __le16 SNR; |
633 | __le16 noisefloor; | 633 | __le16 noisefloor; |
634 | __le16 avgSNR; | 634 | __le16 avgSNR; |
635 | __le16 avgnoisefloor; | 635 | __le16 avgnoisefloor; |
636 | } __attribute__ ((packed)); | 636 | } __packed; |
637 | 637 | ||
638 | struct cmd_ds_802_11_mac_address { | 638 | struct cmd_ds_802_11_mac_address { |
639 | struct cmd_header hdr; | 639 | struct cmd_header hdr; |
640 | 640 | ||
641 | __le16 action; | 641 | __le16 action; |
642 | u8 macadd[ETH_ALEN]; | 642 | u8 macadd[ETH_ALEN]; |
643 | } __attribute__ ((packed)); | 643 | } __packed; |
644 | 644 | ||
645 | struct cmd_ds_802_11_rf_tx_power { | 645 | struct cmd_ds_802_11_rf_tx_power { |
646 | struct cmd_header hdr; | 646 | struct cmd_header hdr; |
@@ -649,26 +649,26 @@ struct cmd_ds_802_11_rf_tx_power { | |||
649 | __le16 curlevel; | 649 | __le16 curlevel; |
650 | s8 maxlevel; | 650 | s8 maxlevel; |
651 | s8 minlevel; | 651 | s8 minlevel; |
652 | } __attribute__ ((packed)); | 652 | } __packed; |
653 | 653 | ||
654 | struct cmd_ds_802_11_monitor_mode { | 654 | struct cmd_ds_802_11_monitor_mode { |
655 | __le16 action; | 655 | __le16 action; |
656 | __le16 mode; | 656 | __le16 mode; |
657 | } __attribute__ ((packed)); | 657 | } __packed; |
658 | 658 | ||
659 | struct cmd_ds_set_boot2_ver { | 659 | struct cmd_ds_set_boot2_ver { |
660 | struct cmd_header hdr; | 660 | struct cmd_header hdr; |
661 | 661 | ||
662 | __le16 action; | 662 | __le16 action; |
663 | __le16 version; | 663 | __le16 version; |
664 | } __attribute__ ((packed)); | 664 | } __packed; |
665 | 665 | ||
666 | struct cmd_ds_802_11_fw_wake_method { | 666 | struct cmd_ds_802_11_fw_wake_method { |
667 | struct cmd_header hdr; | 667 | struct cmd_header hdr; |
668 | 668 | ||
669 | __le16 action; | 669 | __le16 action; |
670 | __le16 method; | 670 | __le16 method; |
671 | } __attribute__ ((packed)); | 671 | } __packed; |
672 | 672 | ||
673 | struct cmd_ds_802_11_ps_mode { | 673 | struct cmd_ds_802_11_ps_mode { |
674 | __le16 action; | 674 | __le16 action; |
@@ -676,7 +676,7 @@ struct cmd_ds_802_11_ps_mode { | |||
676 | __le16 multipledtim; | 676 | __le16 multipledtim; |
677 | __le16 reserved; | 677 | __le16 reserved; |
678 | __le16 locallisteninterval; | 678 | __le16 locallisteninterval; |
679 | } __attribute__ ((packed)); | 679 | } __packed; |
680 | 680 | ||
681 | struct cmd_confirm_sleep { | 681 | struct cmd_confirm_sleep { |
682 | struct cmd_header hdr; | 682 | struct cmd_header hdr; |
@@ -686,7 +686,7 @@ struct cmd_confirm_sleep { | |||
686 | __le16 multipledtim; | 686 | __le16 multipledtim; |
687 | __le16 reserved; | 687 | __le16 reserved; |
688 | __le16 locallisteninterval; | 688 | __le16 locallisteninterval; |
689 | } __attribute__ ((packed)); | 689 | } __packed; |
690 | 690 | ||
691 | struct cmd_ds_802_11_data_rate { | 691 | struct cmd_ds_802_11_data_rate { |
692 | struct cmd_header hdr; | 692 | struct cmd_header hdr; |
@@ -694,14 +694,14 @@ struct cmd_ds_802_11_data_rate { | |||
694 | __le16 action; | 694 | __le16 action; |
695 | __le16 reserved; | 695 | __le16 reserved; |
696 | u8 rates[MAX_RATES]; | 696 | u8 rates[MAX_RATES]; |
697 | } __attribute__ ((packed)); | 697 | } __packed; |
698 | 698 | ||
699 | struct cmd_ds_802_11_rate_adapt_rateset { | 699 | struct cmd_ds_802_11_rate_adapt_rateset { |
700 | struct cmd_header hdr; | 700 | struct cmd_header hdr; |
701 | __le16 action; | 701 | __le16 action; |
702 | __le16 enablehwauto; | 702 | __le16 enablehwauto; |
703 | __le16 bitmap; | 703 | __le16 bitmap; |
704 | } __attribute__ ((packed)); | 704 | } __packed; |
705 | 705 | ||
706 | struct cmd_ds_802_11_ad_hoc_start { | 706 | struct cmd_ds_802_11_ad_hoc_start { |
707 | struct cmd_header hdr; | 707 | struct cmd_header hdr; |
@@ -718,14 +718,14 @@ struct cmd_ds_802_11_ad_hoc_start { | |||
718 | __le16 capability; | 718 | __le16 capability; |
719 | u8 rates[MAX_RATES]; | 719 | u8 rates[MAX_RATES]; |
720 | u8 tlv_memory_size_pad[100]; | 720 | u8 tlv_memory_size_pad[100]; |
721 | } __attribute__ ((packed)); | 721 | } __packed; |
722 | 722 | ||
723 | struct cmd_ds_802_11_ad_hoc_result { | 723 | struct cmd_ds_802_11_ad_hoc_result { |
724 | struct cmd_header hdr; | 724 | struct cmd_header hdr; |
725 | 725 | ||
726 | u8 pad[3]; | 726 | u8 pad[3]; |
727 | u8 bssid[ETH_ALEN]; | 727 | u8 bssid[ETH_ALEN]; |
728 | } __attribute__ ((packed)); | 728 | } __packed; |
729 | 729 | ||
730 | struct adhoc_bssdesc { | 730 | struct adhoc_bssdesc { |
731 | u8 bssid[ETH_ALEN]; | 731 | u8 bssid[ETH_ALEN]; |
@@ -746,7 +746,7 @@ struct adhoc_bssdesc { | |||
746 | * Adhoc join command and will cause a binary layout mismatch with | 746 | * Adhoc join command and will cause a binary layout mismatch with |
747 | * the firmware | 747 | * the firmware |
748 | */ | 748 | */ |
749 | } __attribute__ ((packed)); | 749 | } __packed; |
750 | 750 | ||
751 | struct cmd_ds_802_11_ad_hoc_join { | 751 | struct cmd_ds_802_11_ad_hoc_join { |
752 | struct cmd_header hdr; | 752 | struct cmd_header hdr; |
@@ -754,18 +754,18 @@ struct cmd_ds_802_11_ad_hoc_join { | |||
754 | struct adhoc_bssdesc bss; | 754 | struct adhoc_bssdesc bss; |
755 | __le16 failtimeout; /* Reserved on v9 and later */ | 755 | __le16 failtimeout; /* Reserved on v9 and later */ |
756 | __le16 probedelay; /* Reserved on v9 and later */ | 756 | __le16 probedelay; /* Reserved on v9 and later */ |
757 | } __attribute__ ((packed)); | 757 | } __packed; |
758 | 758 | ||
759 | struct cmd_ds_802_11_ad_hoc_stop { | 759 | struct cmd_ds_802_11_ad_hoc_stop { |
760 | struct cmd_header hdr; | 760 | struct cmd_header hdr; |
761 | } __attribute__ ((packed)); | 761 | } __packed; |
762 | 762 | ||
763 | struct cmd_ds_802_11_enable_rsn { | 763 | struct cmd_ds_802_11_enable_rsn { |
764 | struct cmd_header hdr; | 764 | struct cmd_header hdr; |
765 | 765 | ||
766 | __le16 action; | 766 | __le16 action; |
767 | __le16 enable; | 767 | __le16 enable; |
768 | } __attribute__ ((packed)); | 768 | } __packed; |
769 | 769 | ||
770 | struct MrvlIEtype_keyParamSet { | 770 | struct MrvlIEtype_keyParamSet { |
771 | /* type ID */ | 771 | /* type ID */ |
@@ -785,7 +785,7 @@ struct MrvlIEtype_keyParamSet { | |||
785 | 785 | ||
786 | /* key material of size keylen */ | 786 | /* key material of size keylen */ |
787 | u8 key[32]; | 787 | u8 key[32]; |
788 | } __attribute__ ((packed)); | 788 | } __packed; |
789 | 789 | ||
790 | #define MAX_WOL_RULES 16 | 790 | #define MAX_WOL_RULES 16 |
791 | 791 | ||
@@ -797,7 +797,7 @@ struct host_wol_rule { | |||
797 | __le16 reserve; | 797 | __le16 reserve; |
798 | __be32 sig_mask; | 798 | __be32 sig_mask; |
799 | __be32 signature; | 799 | __be32 signature; |
800 | } __attribute__ ((packed)); | 800 | } __packed; |
801 | 801 | ||
802 | struct wol_config { | 802 | struct wol_config { |
803 | uint8_t action; | 803 | uint8_t action; |
@@ -805,7 +805,7 @@ struct wol_config { | |||
805 | uint8_t no_rules_in_cmd; | 805 | uint8_t no_rules_in_cmd; |
806 | uint8_t result; | 806 | uint8_t result; |
807 | struct host_wol_rule rule[MAX_WOL_RULES]; | 807 | struct host_wol_rule rule[MAX_WOL_RULES]; |
808 | } __attribute__ ((packed)); | 808 | } __packed; |
809 | 809 | ||
810 | struct cmd_ds_host_sleep { | 810 | struct cmd_ds_host_sleep { |
811 | struct cmd_header hdr; | 811 | struct cmd_header hdr; |
@@ -813,7 +813,7 @@ struct cmd_ds_host_sleep { | |||
813 | uint8_t gpio; | 813 | uint8_t gpio; |
814 | uint16_t gap; | 814 | uint16_t gap; |
815 | struct wol_config wol_conf; | 815 | struct wol_config wol_conf; |
816 | } __attribute__ ((packed)); | 816 | } __packed; |
817 | 817 | ||
818 | 818 | ||
819 | 819 | ||
@@ -822,7 +822,7 @@ struct cmd_ds_802_11_key_material { | |||
822 | 822 | ||
823 | __le16 action; | 823 | __le16 action; |
824 | struct MrvlIEtype_keyParamSet keyParamSet[2]; | 824 | struct MrvlIEtype_keyParamSet keyParamSet[2]; |
825 | } __attribute__ ((packed)); | 825 | } __packed; |
826 | 826 | ||
827 | struct cmd_ds_802_11_eeprom_access { | 827 | struct cmd_ds_802_11_eeprom_access { |
828 | struct cmd_header hdr; | 828 | struct cmd_header hdr; |
@@ -832,7 +832,7 @@ struct cmd_ds_802_11_eeprom_access { | |||
832 | /* firmware says it returns a maximum of 20 bytes */ | 832 | /* firmware says it returns a maximum of 20 bytes */ |
833 | #define LBS_EEPROM_READ_LEN 20 | 833 | #define LBS_EEPROM_READ_LEN 20 |
834 | u8 value[LBS_EEPROM_READ_LEN]; | 834 | u8 value[LBS_EEPROM_READ_LEN]; |
835 | } __attribute__ ((packed)); | 835 | } __packed; |
836 | 836 | ||
837 | struct cmd_ds_802_11_tpc_cfg { | 837 | struct cmd_ds_802_11_tpc_cfg { |
838 | struct cmd_header hdr; | 838 | struct cmd_header hdr; |
@@ -843,7 +843,7 @@ struct cmd_ds_802_11_tpc_cfg { | |||
843 | int8_t P1; | 843 | int8_t P1; |
844 | int8_t P2; | 844 | int8_t P2; |
845 | uint8_t usesnr; | 845 | uint8_t usesnr; |
846 | } __attribute__ ((packed)); | 846 | } __packed; |
847 | 847 | ||
848 | 848 | ||
849 | struct cmd_ds_802_11_pa_cfg { | 849 | struct cmd_ds_802_11_pa_cfg { |
@@ -854,14 +854,14 @@ struct cmd_ds_802_11_pa_cfg { | |||
854 | int8_t P0; | 854 | int8_t P0; |
855 | int8_t P1; | 855 | int8_t P1; |
856 | int8_t P2; | 856 | int8_t P2; |
857 | } __attribute__ ((packed)); | 857 | } __packed; |
858 | 858 | ||
859 | 859 | ||
860 | struct cmd_ds_802_11_led_ctrl { | 860 | struct cmd_ds_802_11_led_ctrl { |
861 | __le16 action; | 861 | __le16 action; |
862 | __le16 numled; | 862 | __le16 numled; |
863 | u8 data[256]; | 863 | u8 data[256]; |
864 | } __attribute__ ((packed)); | 864 | } __packed; |
865 | 865 | ||
866 | struct cmd_ds_802_11_afc { | 866 | struct cmd_ds_802_11_afc { |
867 | __le16 afc_auto; | 867 | __le16 afc_auto; |
@@ -875,22 +875,22 @@ struct cmd_ds_802_11_afc { | |||
875 | __le16 carrier_offset; /* signed */ | 875 | __le16 carrier_offset; /* signed */ |
876 | }; | 876 | }; |
877 | }; | 877 | }; |
878 | } __attribute__ ((packed)); | 878 | } __packed; |
879 | 879 | ||
880 | struct cmd_tx_rate_query { | 880 | struct cmd_tx_rate_query { |
881 | __le16 txrate; | 881 | __le16 txrate; |
882 | } __attribute__ ((packed)); | 882 | } __packed; |
883 | 883 | ||
884 | struct cmd_ds_get_tsf { | 884 | struct cmd_ds_get_tsf { |
885 | __le64 tsfvalue; | 885 | __le64 tsfvalue; |
886 | } __attribute__ ((packed)); | 886 | } __packed; |
887 | 887 | ||
888 | struct cmd_ds_bt_access { | 888 | struct cmd_ds_bt_access { |
889 | __le16 action; | 889 | __le16 action; |
890 | __le32 id; | 890 | __le32 id; |
891 | u8 addr1[ETH_ALEN]; | 891 | u8 addr1[ETH_ALEN]; |
892 | u8 addr2[ETH_ALEN]; | 892 | u8 addr2[ETH_ALEN]; |
893 | } __attribute__ ((packed)); | 893 | } __packed; |
894 | 894 | ||
895 | struct cmd_ds_fwt_access { | 895 | struct cmd_ds_fwt_access { |
896 | __le16 action; | 896 | __le16 action; |
@@ -910,7 +910,7 @@ struct cmd_ds_fwt_access { | |||
910 | __le32 snr; | 910 | __le32 snr; |
911 | __le32 references; | 911 | __le32 references; |
912 | u8 prec[ETH_ALEN]; | 912 | u8 prec[ETH_ALEN]; |
913 | } __attribute__ ((packed)); | 913 | } __packed; |
914 | 914 | ||
915 | struct cmd_ds_mesh_config { | 915 | struct cmd_ds_mesh_config { |
916 | struct cmd_header hdr; | 916 | struct cmd_header hdr; |
@@ -920,14 +920,14 @@ struct cmd_ds_mesh_config { | |||
920 | __le16 type; | 920 | __le16 type; |
921 | __le16 length; | 921 | __le16 length; |
922 | u8 data[128]; /* last position reserved */ | 922 | u8 data[128]; /* last position reserved */ |
923 | } __attribute__ ((packed)); | 923 | } __packed; |
924 | 924 | ||
925 | struct cmd_ds_mesh_access { | 925 | struct cmd_ds_mesh_access { |
926 | struct cmd_header hdr; | 926 | struct cmd_header hdr; |
927 | 927 | ||
928 | __le16 action; | 928 | __le16 action; |
929 | __le32 data[32]; /* last position reserved */ | 929 | __le32 data[32]; /* last position reserved */ |
930 | } __attribute__ ((packed)); | 930 | } __packed; |
931 | 931 | ||
932 | /* Number of stats counters returned by the firmware */ | 932 | /* Number of stats counters returned by the firmware */ |
933 | #define MESH_STATS_NUM 8 | 933 | #define MESH_STATS_NUM 8 |
@@ -957,6 +957,6 @@ struct cmd_ds_command { | |||
957 | struct cmd_ds_fwt_access fwt; | 957 | struct cmd_ds_fwt_access fwt; |
958 | struct cmd_ds_802_11_beacon_control bcn_ctrl; | 958 | struct cmd_ds_802_11_beacon_control bcn_ctrl; |
959 | } params; | 959 | } params; |
960 | } __attribute__ ((packed)); | 960 | } __packed; |
961 | 961 | ||
962 | #endif | 962 | #endif |
diff --git a/drivers/net/wireless/libertas/if_sdio.c b/drivers/net/wireless/libertas/if_sdio.c index 64dd345d30f5..6e71346a7550 100644 --- a/drivers/net/wireless/libertas/if_sdio.c +++ b/drivers/net/wireless/libertas/if_sdio.c | |||
@@ -1182,11 +1182,69 @@ static void if_sdio_remove(struct sdio_func *func) | |||
1182 | lbs_deb_leave(LBS_DEB_SDIO); | 1182 | lbs_deb_leave(LBS_DEB_SDIO); |
1183 | } | 1183 | } |
1184 | 1184 | ||
1185 | static int if_sdio_suspend(struct device *dev) | ||
1186 | { | ||
1187 | struct sdio_func *func = dev_to_sdio_func(dev); | ||
1188 | int ret; | ||
1189 | struct if_sdio_card *card = sdio_get_drvdata(func); | ||
1190 | |||
1191 | mmc_pm_flag_t flags = sdio_get_host_pm_caps(func); | ||
1192 | |||
1193 | lbs_pr_info("%s: suspend: PM flags = 0x%x\n", | ||
1194 | sdio_func_id(func), flags); | ||
1195 | |||
1196 | /* If we aren't being asked to wake on anything, we should bail out | ||
1197 | * and let the SD stack power down the card. | ||
1198 | */ | ||
1199 | if (card->priv->wol_criteria == EHS_REMOVE_WAKEUP) { | ||
1200 | lbs_pr_info("Suspend without wake params -- " | ||
1201 | "powering down card."); | ||
1202 | return -ENOSYS; | ||
1203 | } | ||
1204 | |||
1205 | if (!(flags & MMC_PM_KEEP_POWER)) { | ||
1206 | lbs_pr_err("%s: cannot remain alive while host is suspended\n", | ||
1207 | sdio_func_id(func)); | ||
1208 | return -ENOSYS; | ||
1209 | } | ||
1210 | |||
1211 | ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); | ||
1212 | if (ret) | ||
1213 | return ret; | ||
1214 | |||
1215 | ret = lbs_suspend(card->priv); | ||
1216 | if (ret) | ||
1217 | return ret; | ||
1218 | |||
1219 | return sdio_set_host_pm_flags(func, MMC_PM_WAKE_SDIO_IRQ); | ||
1220 | } | ||
1221 | |||
1222 | static int if_sdio_resume(struct device *dev) | ||
1223 | { | ||
1224 | struct sdio_func *func = dev_to_sdio_func(dev); | ||
1225 | struct if_sdio_card *card = sdio_get_drvdata(func); | ||
1226 | int ret; | ||
1227 | |||
1228 | lbs_pr_info("%s: resume: we're back\n", sdio_func_id(func)); | ||
1229 | |||
1230 | ret = lbs_resume(card->priv); | ||
1231 | |||
1232 | return ret; | ||
1233 | } | ||
1234 | |||
1235 | static const struct dev_pm_ops if_sdio_pm_ops = { | ||
1236 | .suspend = if_sdio_suspend, | ||
1237 | .resume = if_sdio_resume, | ||
1238 | }; | ||
1239 | |||
1185 | static struct sdio_driver if_sdio_driver = { | 1240 | static struct sdio_driver if_sdio_driver = { |
1186 | .name = "libertas_sdio", | 1241 | .name = "libertas_sdio", |
1187 | .id_table = if_sdio_ids, | 1242 | .id_table = if_sdio_ids, |
1188 | .probe = if_sdio_probe, | 1243 | .probe = if_sdio_probe, |
1189 | .remove = if_sdio_remove, | 1244 | .remove = if_sdio_remove, |
1245 | .drv = { | ||
1246 | .pm = &if_sdio_pm_ops, | ||
1247 | }, | ||
1190 | }; | 1248 | }; |
1191 | 1249 | ||
1192 | /*******************************************************************/ | 1250 | /*******************************************************************/ |
diff --git a/drivers/net/wireless/libertas/if_usb.c b/drivers/net/wireless/libertas/if_usb.c index f41594c7ac16..3678e532874f 100644 --- a/drivers/net/wireless/libertas/if_usb.c +++ b/drivers/net/wireless/libertas/if_usb.c | |||
@@ -613,16 +613,14 @@ static void if_usb_receive_fwload(struct urb *urb) | |||
613 | return; | 613 | return; |
614 | } | 614 | } |
615 | 615 | ||
616 | syncfwheader = kmalloc(sizeof(struct fwsyncheader), GFP_ATOMIC); | 616 | syncfwheader = kmemdup(skb->data + IPFIELD_ALIGN_OFFSET, |
617 | sizeof(struct fwsyncheader), GFP_ATOMIC); | ||
617 | if (!syncfwheader) { | 618 | if (!syncfwheader) { |
618 | lbs_deb_usbd(&cardp->udev->dev, "Failure to allocate syncfwheader\n"); | 619 | lbs_deb_usbd(&cardp->udev->dev, "Failure to allocate syncfwheader\n"); |
619 | kfree_skb(skb); | 620 | kfree_skb(skb); |
620 | return; | 621 | return; |
621 | } | 622 | } |
622 | 623 | ||
623 | memcpy(syncfwheader, skb->data + IPFIELD_ALIGN_OFFSET, | ||
624 | sizeof(struct fwsyncheader)); | ||
625 | |||
626 | if (!syncfwheader->cmd) { | 624 | if (!syncfwheader->cmd) { |
627 | lbs_deb_usb2(&cardp->udev->dev, "FW received Blk with correct CRC\n"); | 625 | lbs_deb_usb2(&cardp->udev->dev, "FW received Blk with correct CRC\n"); |
628 | lbs_deb_usb2(&cardp->udev->dev, "FW received Blk seqnum = %d\n", | 626 | lbs_deb_usb2(&cardp->udev->dev, "FW received Blk seqnum = %d\n", |
@@ -1043,6 +1041,12 @@ static int if_usb_suspend(struct usb_interface *intf, pm_message_t message) | |||
1043 | if (priv->psstate != PS_STATE_FULL_POWER) | 1041 | if (priv->psstate != PS_STATE_FULL_POWER) |
1044 | return -1; | 1042 | return -1; |
1045 | 1043 | ||
1044 | if (priv->wol_criteria == EHS_REMOVE_WAKEUP) { | ||
1045 | lbs_pr_info("Suspend attempt without " | ||
1046 | "configuring wake params!\n"); | ||
1047 | return -ENOSYS; | ||
1048 | } | ||
1049 | |||
1046 | ret = lbs_suspend(priv); | 1050 | ret = lbs_suspend(priv); |
1047 | if (ret) | 1051 | if (ret) |
1048 | goto out; | 1052 | goto out; |
diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c index d9b8ee130c45..abfecc4814b4 100644 --- a/drivers/net/wireless/libertas/main.c +++ b/drivers/net/wireless/libertas/main.c | |||
@@ -625,16 +625,13 @@ static int lbs_thread(void *data) | |||
625 | return 0; | 625 | return 0; |
626 | } | 626 | } |
627 | 627 | ||
628 | static int lbs_suspend_callback(struct lbs_private *priv, unsigned long dummy, | 628 | static int lbs_ret_host_sleep_activate(struct lbs_private *priv, |
629 | struct cmd_header *cmd) | 629 | unsigned long dummy, |
630 | struct cmd_header *cmd) | ||
630 | { | 631 | { |
631 | lbs_deb_enter(LBS_DEB_FW); | 632 | lbs_deb_enter(LBS_DEB_FW); |
632 | 633 | priv->is_host_sleep_activated = 1; | |
633 | netif_device_detach(priv->dev); | 634 | wake_up_interruptible(&priv->host_sleep_q); |
634 | if (priv->mesh_dev) | ||
635 | netif_device_detach(priv->mesh_dev); | ||
636 | |||
637 | priv->fw_ready = 0; | ||
638 | lbs_deb_leave(LBS_DEB_FW); | 635 | lbs_deb_leave(LBS_DEB_FW); |
639 | return 0; | 636 | return 0; |
640 | } | 637 | } |
@@ -646,39 +643,65 @@ int lbs_suspend(struct lbs_private *priv) | |||
646 | 643 | ||
647 | lbs_deb_enter(LBS_DEB_FW); | 644 | lbs_deb_enter(LBS_DEB_FW); |
648 | 645 | ||
649 | if (priv->wol_criteria == 0xffffffff) { | 646 | if (priv->is_deep_sleep) { |
650 | lbs_pr_info("Suspend attempt without configuring wake params!\n"); | 647 | ret = lbs_set_deep_sleep(priv, 0); |
651 | return -EINVAL; | 648 | if (ret) { |
649 | lbs_pr_err("deep sleep cancellation failed: %d\n", ret); | ||
650 | return ret; | ||
651 | } | ||
652 | priv->deep_sleep_required = 1; | ||
652 | } | 653 | } |
653 | 654 | ||
654 | memset(&cmd, 0, sizeof(cmd)); | 655 | memset(&cmd, 0, sizeof(cmd)); |
656 | ret = lbs_host_sleep_cfg(priv, priv->wol_criteria, | ||
657 | (struct wol_config *)NULL); | ||
658 | if (ret) { | ||
659 | lbs_pr_info("Host sleep configuration failed: %d\n", ret); | ||
660 | return ret; | ||
661 | } | ||
662 | if (priv->psstate == PS_STATE_FULL_POWER) { | ||
663 | ret = __lbs_cmd(priv, CMD_802_11_HOST_SLEEP_ACTIVATE, &cmd, | ||
664 | sizeof(cmd), lbs_ret_host_sleep_activate, 0); | ||
665 | if (ret) | ||
666 | lbs_pr_info("HOST_SLEEP_ACTIVATE failed: %d\n", ret); | ||
667 | } | ||
655 | 668 | ||
656 | ret = __lbs_cmd(priv, CMD_802_11_HOST_SLEEP_ACTIVATE, &cmd, | 669 | if (!wait_event_interruptible_timeout(priv->host_sleep_q, |
657 | sizeof(cmd), lbs_suspend_callback, 0); | 670 | priv->is_host_sleep_activated, (10 * HZ))) { |
658 | if (ret) | 671 | lbs_pr_err("host_sleep_q: timer expired\n"); |
659 | lbs_pr_info("HOST_SLEEP_ACTIVATE failed: %d\n", ret); | 672 | ret = -1; |
673 | } | ||
674 | netif_device_detach(priv->dev); | ||
675 | if (priv->mesh_dev) | ||
676 | netif_device_detach(priv->mesh_dev); | ||
660 | 677 | ||
661 | lbs_deb_leave_args(LBS_DEB_FW, "ret %d", ret); | 678 | lbs_deb_leave_args(LBS_DEB_FW, "ret %d", ret); |
662 | return ret; | 679 | return ret; |
663 | } | 680 | } |
664 | EXPORT_SYMBOL_GPL(lbs_suspend); | 681 | EXPORT_SYMBOL_GPL(lbs_suspend); |
665 | 682 | ||
666 | void lbs_resume(struct lbs_private *priv) | 683 | int lbs_resume(struct lbs_private *priv) |
667 | { | 684 | { |
668 | lbs_deb_enter(LBS_DEB_FW); | 685 | int ret; |
686 | uint32_t criteria = EHS_REMOVE_WAKEUP; | ||
669 | 687 | ||
670 | priv->fw_ready = 1; | 688 | lbs_deb_enter(LBS_DEB_FW); |
671 | 689 | ||
672 | /* Firmware doesn't seem to give us RX packets any more | 690 | ret = lbs_host_sleep_cfg(priv, criteria, (struct wol_config *)NULL); |
673 | until we send it some command. Might as well update */ | ||
674 | lbs_prepare_and_send_command(priv, CMD_802_11_RSSI, 0, | ||
675 | 0, 0, NULL); | ||
676 | 691 | ||
677 | netif_device_attach(priv->dev); | 692 | netif_device_attach(priv->dev); |
678 | if (priv->mesh_dev) | 693 | if (priv->mesh_dev) |
679 | netif_device_attach(priv->mesh_dev); | 694 | netif_device_attach(priv->mesh_dev); |
680 | 695 | ||
681 | lbs_deb_leave(LBS_DEB_FW); | 696 | if (priv->deep_sleep_required) { |
697 | priv->deep_sleep_required = 0; | ||
698 | ret = lbs_set_deep_sleep(priv, 1); | ||
699 | if (ret) | ||
700 | lbs_pr_err("deep sleep activation failed: %d\n", ret); | ||
701 | } | ||
702 | |||
703 | lbs_deb_leave_args(LBS_DEB_FW, "ret %d", ret); | ||
704 | return ret; | ||
682 | } | 705 | } |
683 | EXPORT_SYMBOL_GPL(lbs_resume); | 706 | EXPORT_SYMBOL_GPL(lbs_resume); |
684 | 707 | ||
@@ -834,10 +857,13 @@ static int lbs_init_adapter(struct lbs_private *priv) | |||
834 | priv->psstate = PS_STATE_FULL_POWER; | 857 | priv->psstate = PS_STATE_FULL_POWER; |
835 | priv->is_deep_sleep = 0; | 858 | priv->is_deep_sleep = 0; |
836 | priv->is_auto_deep_sleep_enabled = 0; | 859 | priv->is_auto_deep_sleep_enabled = 0; |
860 | priv->deep_sleep_required = 0; | ||
837 | priv->wakeup_dev_required = 0; | 861 | priv->wakeup_dev_required = 0; |
838 | init_waitqueue_head(&priv->ds_awake_q); | 862 | init_waitqueue_head(&priv->ds_awake_q); |
839 | priv->authtype_auto = 1; | 863 | priv->authtype_auto = 1; |
840 | 864 | priv->is_host_sleep_configured = 0; | |
865 | priv->is_host_sleep_activated = 0; | ||
866 | init_waitqueue_head(&priv->host_sleep_q); | ||
841 | mutex_init(&priv->lock); | 867 | mutex_init(&priv->lock); |
842 | 868 | ||
843 | setup_timer(&priv->command_timer, lbs_cmd_timeout_handler, | 869 | setup_timer(&priv->command_timer, lbs_cmd_timeout_handler, |
@@ -976,6 +1002,7 @@ struct lbs_private *lbs_add_card(void *card, struct device *dmdev) | |||
976 | 1002 | ||
977 | priv->wol_criteria = 0xffffffff; | 1003 | priv->wol_criteria = 0xffffffff; |
978 | priv->wol_gpio = 0xff; | 1004 | priv->wol_gpio = 0xff; |
1005 | priv->wol_gap = 20; | ||
979 | 1006 | ||
980 | goto done; | 1007 | goto done; |
981 | 1008 | ||
@@ -1031,6 +1058,10 @@ void lbs_remove_card(struct lbs_private *priv) | |||
1031 | wake_up_interruptible(&priv->ds_awake_q); | 1058 | wake_up_interruptible(&priv->ds_awake_q); |
1032 | } | 1059 | } |
1033 | 1060 | ||
1061 | priv->is_host_sleep_configured = 0; | ||
1062 | priv->is_host_sleep_activated = 0; | ||
1063 | wake_up_interruptible(&priv->host_sleep_q); | ||
1064 | |||
1034 | /* Stop the thread servicing the interrupts */ | 1065 | /* Stop the thread servicing the interrupts */ |
1035 | priv->surpriseremoved = 1; | 1066 | priv->surpriseremoved = 1; |
1036 | kthread_stop(priv->main_thread); | 1067 | kthread_stop(priv->main_thread); |
diff --git a/drivers/net/wireless/libertas/radiotap.h b/drivers/net/wireless/libertas/radiotap.h index d16b26416e82..b3c8ea6d610e 100644 --- a/drivers/net/wireless/libertas/radiotap.h +++ b/drivers/net/wireless/libertas/radiotap.h | |||
@@ -6,7 +6,7 @@ struct tx_radiotap_hdr { | |||
6 | u8 txpower; | 6 | u8 txpower; |
7 | u8 rts_retries; | 7 | u8 rts_retries; |
8 | u8 data_retries; | 8 | u8 data_retries; |
9 | } __attribute__ ((packed)); | 9 | } __packed; |
10 | 10 | ||
11 | #define TX_RADIOTAP_PRESENT ( \ | 11 | #define TX_RADIOTAP_PRESENT ( \ |
12 | (1 << IEEE80211_RADIOTAP_RATE) | \ | 12 | (1 << IEEE80211_RADIOTAP_RATE) | \ |
@@ -34,7 +34,7 @@ struct rx_radiotap_hdr { | |||
34 | u8 flags; | 34 | u8 flags; |
35 | u8 rate; | 35 | u8 rate; |
36 | u8 antsignal; | 36 | u8 antsignal; |
37 | } __attribute__ ((packed)); | 37 | } __packed; |
38 | 38 | ||
39 | #define RX_RADIOTAP_PRESENT ( \ | 39 | #define RX_RADIOTAP_PRESENT ( \ |
40 | (1 << IEEE80211_RADIOTAP_FLAGS) | \ | 40 | (1 << IEEE80211_RADIOTAP_FLAGS) | \ |
diff --git a/drivers/net/wireless/libertas/rx.c b/drivers/net/wireless/libertas/rx.c index 7a377f5b7662..1c63f8ce7349 100644 --- a/drivers/net/wireless/libertas/rx.c +++ b/drivers/net/wireless/libertas/rx.c | |||
@@ -15,7 +15,7 @@ struct eth803hdr { | |||
15 | u8 dest_addr[6]; | 15 | u8 dest_addr[6]; |
16 | u8 src_addr[6]; | 16 | u8 src_addr[6]; |
17 | u16 h803_len; | 17 | u16 h803_len; |
18 | } __attribute__ ((packed)); | 18 | } __packed; |
19 | 19 | ||
20 | struct rfc1042hdr { | 20 | struct rfc1042hdr { |
21 | u8 llc_dsap; | 21 | u8 llc_dsap; |
@@ -23,17 +23,17 @@ struct rfc1042hdr { | |||
23 | u8 llc_ctrl; | 23 | u8 llc_ctrl; |
24 | u8 snap_oui[3]; | 24 | u8 snap_oui[3]; |
25 | u16 snap_type; | 25 | u16 snap_type; |
26 | } __attribute__ ((packed)); | 26 | } __packed; |
27 | 27 | ||
28 | struct rxpackethdr { | 28 | struct rxpackethdr { |
29 | struct eth803hdr eth803_hdr; | 29 | struct eth803hdr eth803_hdr; |
30 | struct rfc1042hdr rfc1042_hdr; | 30 | struct rfc1042hdr rfc1042_hdr; |
31 | } __attribute__ ((packed)); | 31 | } __packed; |
32 | 32 | ||
33 | struct rx80211packethdr { | 33 | struct rx80211packethdr { |
34 | struct rxpd rx_pd; | 34 | struct rxpd rx_pd; |
35 | void *eth80211_hdr; | 35 | void *eth80211_hdr; |
36 | } __attribute__ ((packed)); | 36 | } __packed; |
37 | 37 | ||
38 | static int process_rxed_802_11_packet(struct lbs_private *priv, | 38 | static int process_rxed_802_11_packet(struct lbs_private *priv, |
39 | struct sk_buff *skb); | 39 | struct sk_buff *skb); |
diff --git a/drivers/net/wireless/libertas/scan.c b/drivers/net/wireless/libertas/scan.c index 24cd54b3a806..7d82f13bdf1d 100644 --- a/drivers/net/wireless/libertas/scan.c +++ b/drivers/net/wireless/libertas/scan.c | |||
@@ -666,7 +666,7 @@ void lbs_scan_worker(struct work_struct *work) | |||
666 | /** | 666 | /** |
667 | * @brief Interpret a BSS scan response returned from the firmware | 667 | * @brief Interpret a BSS scan response returned from the firmware |
668 | * | 668 | * |
669 | * Parse the various fixed fields and IEs passed back for a a BSS probe | 669 | * Parse the various fixed fields and IEs passed back for a BSS probe |
670 | * response or beacon from the scan command. Record information as needed | 670 | * response or beacon from the scan command. Record information as needed |
671 | * in the scan table struct bss_descriptor for that entry. | 671 | * in the scan table struct bss_descriptor for that entry. |
672 | * | 672 | * |
diff --git a/drivers/net/wireless/libertas/types.h b/drivers/net/wireless/libertas/types.h index 3e72c86ceca8..462fbb4cb743 100644 --- a/drivers/net/wireless/libertas/types.h +++ b/drivers/net/wireless/libertas/types.h | |||
@@ -11,7 +11,7 @@ | |||
11 | struct ieee_ie_header { | 11 | struct ieee_ie_header { |
12 | u8 id; | 12 | u8 id; |
13 | u8 len; | 13 | u8 len; |
14 | } __attribute__ ((packed)); | 14 | } __packed; |
15 | 15 | ||
16 | struct ieee_ie_cf_param_set { | 16 | struct ieee_ie_cf_param_set { |
17 | struct ieee_ie_header header; | 17 | struct ieee_ie_header header; |
@@ -20,19 +20,19 @@ struct ieee_ie_cf_param_set { | |||
20 | u8 cfpperiod; | 20 | u8 cfpperiod; |
21 | __le16 cfpmaxduration; | 21 | __le16 cfpmaxduration; |
22 | __le16 cfpdurationremaining; | 22 | __le16 cfpdurationremaining; |
23 | } __attribute__ ((packed)); | 23 | } __packed; |
24 | 24 | ||
25 | 25 | ||
26 | struct ieee_ie_ibss_param_set { | 26 | struct ieee_ie_ibss_param_set { |
27 | struct ieee_ie_header header; | 27 | struct ieee_ie_header header; |
28 | 28 | ||
29 | __le16 atimwindow; | 29 | __le16 atimwindow; |
30 | } __attribute__ ((packed)); | 30 | } __packed; |
31 | 31 | ||
32 | union ieee_ss_param_set { | 32 | union ieee_ss_param_set { |
33 | struct ieee_ie_cf_param_set cf; | 33 | struct ieee_ie_cf_param_set cf; |
34 | struct ieee_ie_ibss_param_set ibss; | 34 | struct ieee_ie_ibss_param_set ibss; |
35 | } __attribute__ ((packed)); | 35 | } __packed; |
36 | 36 | ||
37 | struct ieee_ie_fh_param_set { | 37 | struct ieee_ie_fh_param_set { |
38 | struct ieee_ie_header header; | 38 | struct ieee_ie_header header; |
@@ -41,18 +41,18 @@ struct ieee_ie_fh_param_set { | |||
41 | u8 hopset; | 41 | u8 hopset; |
42 | u8 hoppattern; | 42 | u8 hoppattern; |
43 | u8 hopindex; | 43 | u8 hopindex; |
44 | } __attribute__ ((packed)); | 44 | } __packed; |
45 | 45 | ||
46 | struct ieee_ie_ds_param_set { | 46 | struct ieee_ie_ds_param_set { |
47 | struct ieee_ie_header header; | 47 | struct ieee_ie_header header; |
48 | 48 | ||
49 | u8 channel; | 49 | u8 channel; |
50 | } __attribute__ ((packed)); | 50 | } __packed; |
51 | 51 | ||
52 | union ieee_phy_param_set { | 52 | union ieee_phy_param_set { |
53 | struct ieee_ie_fh_param_set fh; | 53 | struct ieee_ie_fh_param_set fh; |
54 | struct ieee_ie_ds_param_set ds; | 54 | struct ieee_ie_ds_param_set ds; |
55 | } __attribute__ ((packed)); | 55 | } __packed; |
56 | 56 | ||
57 | /** TLV type ID definition */ | 57 | /** TLV type ID definition */ |
58 | #define PROPRIETARY_TLV_BASE_ID 0x0100 | 58 | #define PROPRIETARY_TLV_BASE_ID 0x0100 |
@@ -100,28 +100,28 @@ union ieee_phy_param_set { | |||
100 | struct mrvl_ie_header { | 100 | struct mrvl_ie_header { |
101 | __le16 type; | 101 | __le16 type; |
102 | __le16 len; | 102 | __le16 len; |
103 | } __attribute__ ((packed)); | 103 | } __packed; |
104 | 104 | ||
105 | struct mrvl_ie_data { | 105 | struct mrvl_ie_data { |
106 | struct mrvl_ie_header header; | 106 | struct mrvl_ie_header header; |
107 | u8 Data[1]; | 107 | u8 Data[1]; |
108 | } __attribute__ ((packed)); | 108 | } __packed; |
109 | 109 | ||
110 | struct mrvl_ie_rates_param_set { | 110 | struct mrvl_ie_rates_param_set { |
111 | struct mrvl_ie_header header; | 111 | struct mrvl_ie_header header; |
112 | u8 rates[1]; | 112 | u8 rates[1]; |
113 | } __attribute__ ((packed)); | 113 | } __packed; |
114 | 114 | ||
115 | struct mrvl_ie_ssid_param_set { | 115 | struct mrvl_ie_ssid_param_set { |
116 | struct mrvl_ie_header header; | 116 | struct mrvl_ie_header header; |
117 | u8 ssid[1]; | 117 | u8 ssid[1]; |
118 | } __attribute__ ((packed)); | 118 | } __packed; |
119 | 119 | ||
120 | struct mrvl_ie_wildcard_ssid_param_set { | 120 | struct mrvl_ie_wildcard_ssid_param_set { |
121 | struct mrvl_ie_header header; | 121 | struct mrvl_ie_header header; |
122 | u8 MaxSsidlength; | 122 | u8 MaxSsidlength; |
123 | u8 ssid[1]; | 123 | u8 ssid[1]; |
124 | } __attribute__ ((packed)); | 124 | } __packed; |
125 | 125 | ||
126 | struct chanscanmode { | 126 | struct chanscanmode { |
127 | #ifdef __BIG_ENDIAN_BITFIELD | 127 | #ifdef __BIG_ENDIAN_BITFIELD |
@@ -133,7 +133,7 @@ struct chanscanmode { | |||
133 | u8 disablechanfilt:1; | 133 | u8 disablechanfilt:1; |
134 | u8 reserved_2_7:6; | 134 | u8 reserved_2_7:6; |
135 | #endif | 135 | #endif |
136 | } __attribute__ ((packed)); | 136 | } __packed; |
137 | 137 | ||
138 | struct chanscanparamset { | 138 | struct chanscanparamset { |
139 | u8 radiotype; | 139 | u8 radiotype; |
@@ -141,12 +141,12 @@ struct chanscanparamset { | |||
141 | struct chanscanmode chanscanmode; | 141 | struct chanscanmode chanscanmode; |
142 | __le16 minscantime; | 142 | __le16 minscantime; |
143 | __le16 maxscantime; | 143 | __le16 maxscantime; |
144 | } __attribute__ ((packed)); | 144 | } __packed; |
145 | 145 | ||
146 | struct mrvl_ie_chanlist_param_set { | 146 | struct mrvl_ie_chanlist_param_set { |
147 | struct mrvl_ie_header header; | 147 | struct mrvl_ie_header header; |
148 | struct chanscanparamset chanscanparam[1]; | 148 | struct chanscanparamset chanscanparam[1]; |
149 | } __attribute__ ((packed)); | 149 | } __packed; |
150 | 150 | ||
151 | struct mrvl_ie_cf_param_set { | 151 | struct mrvl_ie_cf_param_set { |
152 | struct mrvl_ie_header header; | 152 | struct mrvl_ie_header header; |
@@ -154,86 +154,86 @@ struct mrvl_ie_cf_param_set { | |||
154 | u8 cfpperiod; | 154 | u8 cfpperiod; |
155 | __le16 cfpmaxduration; | 155 | __le16 cfpmaxduration; |
156 | __le16 cfpdurationremaining; | 156 | __le16 cfpdurationremaining; |
157 | } __attribute__ ((packed)); | 157 | } __packed; |
158 | 158 | ||
159 | struct mrvl_ie_ds_param_set { | 159 | struct mrvl_ie_ds_param_set { |
160 | struct mrvl_ie_header header; | 160 | struct mrvl_ie_header header; |
161 | u8 channel; | 161 | u8 channel; |
162 | } __attribute__ ((packed)); | 162 | } __packed; |
163 | 163 | ||
164 | struct mrvl_ie_rsn_param_set { | 164 | struct mrvl_ie_rsn_param_set { |
165 | struct mrvl_ie_header header; | 165 | struct mrvl_ie_header header; |
166 | u8 rsnie[1]; | 166 | u8 rsnie[1]; |
167 | } __attribute__ ((packed)); | 167 | } __packed; |
168 | 168 | ||
169 | struct mrvl_ie_tsf_timestamp { | 169 | struct mrvl_ie_tsf_timestamp { |
170 | struct mrvl_ie_header header; | 170 | struct mrvl_ie_header header; |
171 | __le64 tsftable[1]; | 171 | __le64 tsftable[1]; |
172 | } __attribute__ ((packed)); | 172 | } __packed; |
173 | 173 | ||
174 | /* v9 and later firmware only */ | 174 | /* v9 and later firmware only */ |
175 | struct mrvl_ie_auth_type { | 175 | struct mrvl_ie_auth_type { |
176 | struct mrvl_ie_header header; | 176 | struct mrvl_ie_header header; |
177 | __le16 auth; | 177 | __le16 auth; |
178 | } __attribute__ ((packed)); | 178 | } __packed; |
179 | 179 | ||
180 | /** Local Power capability */ | 180 | /** Local Power capability */ |
181 | struct mrvl_ie_power_capability { | 181 | struct mrvl_ie_power_capability { |
182 | struct mrvl_ie_header header; | 182 | struct mrvl_ie_header header; |
183 | s8 minpower; | 183 | s8 minpower; |
184 | s8 maxpower; | 184 | s8 maxpower; |
185 | } __attribute__ ((packed)); | 185 | } __packed; |
186 | 186 | ||
187 | /* used in CMD_802_11_SUBSCRIBE_EVENT for SNR, RSSI and Failure */ | 187 | /* used in CMD_802_11_SUBSCRIBE_EVENT for SNR, RSSI and Failure */ |
188 | struct mrvl_ie_thresholds { | 188 | struct mrvl_ie_thresholds { |
189 | struct mrvl_ie_header header; | 189 | struct mrvl_ie_header header; |
190 | u8 value; | 190 | u8 value; |
191 | u8 freq; | 191 | u8 freq; |
192 | } __attribute__ ((packed)); | 192 | } __packed; |
193 | 193 | ||
194 | struct mrvl_ie_beacons_missed { | 194 | struct mrvl_ie_beacons_missed { |
195 | struct mrvl_ie_header header; | 195 | struct mrvl_ie_header header; |
196 | u8 beaconmissed; | 196 | u8 beaconmissed; |
197 | u8 reserved; | 197 | u8 reserved; |
198 | } __attribute__ ((packed)); | 198 | } __packed; |
199 | 199 | ||
200 | struct mrvl_ie_num_probes { | 200 | struct mrvl_ie_num_probes { |
201 | struct mrvl_ie_header header; | 201 | struct mrvl_ie_header header; |
202 | __le16 numprobes; | 202 | __le16 numprobes; |
203 | } __attribute__ ((packed)); | 203 | } __packed; |
204 | 204 | ||
205 | struct mrvl_ie_bcast_probe { | 205 | struct mrvl_ie_bcast_probe { |
206 | struct mrvl_ie_header header; | 206 | struct mrvl_ie_header header; |
207 | __le16 bcastprobe; | 207 | __le16 bcastprobe; |
208 | } __attribute__ ((packed)); | 208 | } __packed; |
209 | 209 | ||
210 | struct mrvl_ie_num_ssid_probe { | 210 | struct mrvl_ie_num_ssid_probe { |
211 | struct mrvl_ie_header header; | 211 | struct mrvl_ie_header header; |
212 | __le16 numssidprobe; | 212 | __le16 numssidprobe; |
213 | } __attribute__ ((packed)); | 213 | } __packed; |
214 | 214 | ||
215 | struct led_pin { | 215 | struct led_pin { |
216 | u8 led; | 216 | u8 led; |
217 | u8 pin; | 217 | u8 pin; |
218 | } __attribute__ ((packed)); | 218 | } __packed; |
219 | 219 | ||
220 | struct mrvl_ie_ledgpio { | 220 | struct mrvl_ie_ledgpio { |
221 | struct mrvl_ie_header header; | 221 | struct mrvl_ie_header header; |
222 | struct led_pin ledpin[1]; | 222 | struct led_pin ledpin[1]; |
223 | } __attribute__ ((packed)); | 223 | } __packed; |
224 | 224 | ||
225 | struct led_bhv { | 225 | struct led_bhv { |
226 | uint8_t firmwarestate; | 226 | uint8_t firmwarestate; |
227 | uint8_t led; | 227 | uint8_t led; |
228 | uint8_t ledstate; | 228 | uint8_t ledstate; |
229 | uint8_t ledarg; | 229 | uint8_t ledarg; |
230 | } __attribute__ ((packed)); | 230 | } __packed; |
231 | 231 | ||
232 | 232 | ||
233 | struct mrvl_ie_ledbhv { | 233 | struct mrvl_ie_ledbhv { |
234 | struct mrvl_ie_header header; | 234 | struct mrvl_ie_header header; |
235 | struct led_bhv ledbhv[1]; | 235 | struct led_bhv ledbhv[1]; |
236 | } __attribute__ ((packed)); | 236 | } __packed; |
237 | 237 | ||
238 | /* Meant to be packed as the value member of a struct ieee80211_info_element. | 238 | /* Meant to be packed as the value member of a struct ieee80211_info_element. |
239 | * Note that the len member of the ieee80211_info_element varies depending on | 239 | * Note that the len member of the ieee80211_info_element varies depending on |
@@ -248,12 +248,12 @@ struct mrvl_meshie_val { | |||
248 | uint8_t mesh_capability; | 248 | uint8_t mesh_capability; |
249 | uint8_t mesh_id_len; | 249 | uint8_t mesh_id_len; |
250 | uint8_t mesh_id[IEEE80211_MAX_SSID_LEN]; | 250 | uint8_t mesh_id[IEEE80211_MAX_SSID_LEN]; |
251 | } __attribute__ ((packed)); | 251 | } __packed; |
252 | 252 | ||
253 | struct mrvl_meshie { | 253 | struct mrvl_meshie { |
254 | u8 id, len; | 254 | u8 id, len; |
255 | struct mrvl_meshie_val val; | 255 | struct mrvl_meshie_val val; |
256 | } __attribute__ ((packed)); | 256 | } __packed; |
257 | 257 | ||
258 | struct mrvl_mesh_defaults { | 258 | struct mrvl_mesh_defaults { |
259 | __le32 bootflag; | 259 | __le32 bootflag; |
@@ -261,6 +261,6 @@ struct mrvl_mesh_defaults { | |||
261 | uint8_t reserved; | 261 | uint8_t reserved; |
262 | __le16 channel; | 262 | __le16 channel; |
263 | struct mrvl_meshie meshie; | 263 | struct mrvl_meshie meshie; |
264 | } __attribute__ ((packed)); | 264 | } __packed; |
265 | 265 | ||
266 | #endif | 266 | #endif |
diff --git a/drivers/net/wireless/libertas_tf/if_usb.c b/drivers/net/wireless/libertas_tf/if_usb.c index c445500ffc61..b172f5d87a3b 100644 --- a/drivers/net/wireless/libertas_tf/if_usb.c +++ b/drivers/net/wireless/libertas_tf/if_usb.c | |||
@@ -538,7 +538,8 @@ static void if_usb_receive_fwload(struct urb *urb) | |||
538 | return; | 538 | return; |
539 | } | 539 | } |
540 | 540 | ||
541 | syncfwheader = kmalloc(sizeof(struct fwsyncheader), GFP_ATOMIC); | 541 | syncfwheader = kmemdup(skb->data, sizeof(struct fwsyncheader), |
542 | GFP_ATOMIC); | ||
542 | if (!syncfwheader) { | 543 | if (!syncfwheader) { |
543 | lbtf_deb_usbd(&cardp->udev->dev, "Failure to allocate syncfwheader\n"); | 544 | lbtf_deb_usbd(&cardp->udev->dev, "Failure to allocate syncfwheader\n"); |
544 | kfree_skb(skb); | 545 | kfree_skb(skb); |
@@ -546,8 +547,6 @@ static void if_usb_receive_fwload(struct urb *urb) | |||
546 | return; | 547 | return; |
547 | } | 548 | } |
548 | 549 | ||
549 | memcpy(syncfwheader, skb->data, sizeof(struct fwsyncheader)); | ||
550 | |||
551 | if (!syncfwheader->cmd) { | 550 | if (!syncfwheader->cmd) { |
552 | lbtf_deb_usb2(&cardp->udev->dev, "FW received Blk with correct CRC\n"); | 551 | lbtf_deb_usb2(&cardp->udev->dev, "FW received Blk with correct CRC\n"); |
553 | lbtf_deb_usb2(&cardp->udev->dev, "FW received Blk seqnum = %d\n", | 552 | lbtf_deb_usb2(&cardp->udev->dev, "FW received Blk seqnum = %d\n", |
diff --git a/drivers/net/wireless/libertas_tf/libertas_tf.h b/drivers/net/wireless/libertas_tf/libertas_tf.h index fbbaaae7a1ae..737eac92ef72 100644 --- a/drivers/net/wireless/libertas_tf/libertas_tf.h +++ b/drivers/net/wireless/libertas_tf/libertas_tf.h | |||
@@ -316,7 +316,7 @@ struct cmd_header { | |||
316 | __le16 size; | 316 | __le16 size; |
317 | __le16 seqnum; | 317 | __le16 seqnum; |
318 | __le16 result; | 318 | __le16 result; |
319 | } __attribute__ ((packed)); | 319 | } __packed; |
320 | 320 | ||
321 | struct cmd_ctrl_node { | 321 | struct cmd_ctrl_node { |
322 | struct list_head list; | 322 | struct list_head list; |
@@ -369,7 +369,7 @@ struct cmd_ds_get_hw_spec { | |||
369 | 369 | ||
370 | /*FW/HW capability */ | 370 | /*FW/HW capability */ |
371 | __le32 fwcapinfo; | 371 | __le32 fwcapinfo; |
372 | } __attribute__ ((packed)); | 372 | } __packed; |
373 | 373 | ||
374 | struct cmd_ds_mac_control { | 374 | struct cmd_ds_mac_control { |
375 | struct cmd_header hdr; | 375 | struct cmd_header hdr; |
diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c index 6f8cb3ee6fed..49a7dfb4809a 100644 --- a/drivers/net/wireless/mac80211_hwsim.c +++ b/drivers/net/wireless/mac80211_hwsim.c | |||
@@ -317,7 +317,7 @@ struct hwsim_radiotap_hdr { | |||
317 | u8 rt_rate; | 317 | u8 rt_rate; |
318 | __le16 rt_channel; | 318 | __le16 rt_channel; |
319 | __le16 rt_chbitmask; | 319 | __le16 rt_chbitmask; |
320 | } __attribute__ ((packed)); | 320 | } __packed; |
321 | 321 | ||
322 | 322 | ||
323 | static netdev_tx_t hwsim_mon_xmit(struct sk_buff *skb, | 323 | static netdev_tx_t hwsim_mon_xmit(struct sk_buff *skb, |
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c index 808adb909095..c019fdc131c0 100644 --- a/drivers/net/wireless/mwl8k.c +++ b/drivers/net/wireless/mwl8k.c | |||
@@ -109,7 +109,7 @@ struct mwl8k_rx_queue { | |||
109 | dma_addr_t rxd_dma; | 109 | dma_addr_t rxd_dma; |
110 | struct { | 110 | struct { |
111 | struct sk_buff *skb; | 111 | struct sk_buff *skb; |
112 | DECLARE_PCI_UNMAP_ADDR(dma) | 112 | DEFINE_DMA_UNMAP_ADDR(dma); |
113 | } *buf; | 113 | } *buf; |
114 | }; | 114 | }; |
115 | 115 | ||
@@ -426,7 +426,7 @@ struct mwl8k_cmd_pkt { | |||
426 | __u8 macid; | 426 | __u8 macid; |
427 | __le16 result; | 427 | __le16 result; |
428 | char payload[0]; | 428 | char payload[0]; |
429 | } __attribute__((packed)); | 429 | } __packed; |
430 | 430 | ||
431 | /* | 431 | /* |
432 | * Firmware loading. | 432 | * Firmware loading. |
@@ -632,7 +632,7 @@ struct mwl8k_dma_data { | |||
632 | __le16 fwlen; | 632 | __le16 fwlen; |
633 | struct ieee80211_hdr wh; | 633 | struct ieee80211_hdr wh; |
634 | char data[0]; | 634 | char data[0]; |
635 | } __attribute__((packed)); | 635 | } __packed; |
636 | 636 | ||
637 | /* Routines to add/remove DMA header from skb. */ | 637 | /* Routines to add/remove DMA header from skb. */ |
638 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) | 638 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
@@ -711,7 +711,7 @@ struct mwl8k_rxd_8366_ap { | |||
711 | __u8 rx_status; | 711 | __u8 rx_status; |
712 | __u8 channel; | 712 | __u8 channel; |
713 | __u8 rx_ctrl; | 713 | __u8 rx_ctrl; |
714 | } __attribute__((packed)); | 714 | } __packed; |
715 | 715 | ||
716 | #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80 | 716 | #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80 |
717 | #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40 | 717 | #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40 |
@@ -806,7 +806,7 @@ struct mwl8k_rxd_sta { | |||
806 | __u8 rx_ctrl; | 806 | __u8 rx_ctrl; |
807 | __u8 rx_status; | 807 | __u8 rx_status; |
808 | __u8 pad2[2]; | 808 | __u8 pad2[2]; |
809 | } __attribute__((packed)); | 809 | } __packed; |
810 | 810 | ||
811 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 | 811 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 |
812 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) | 812 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) |
@@ -963,7 +963,7 @@ static int rxq_refill(struct ieee80211_hw *hw, int index, int limit) | |||
963 | if (rxq->tail == MWL8K_RX_DESCS) | 963 | if (rxq->tail == MWL8K_RX_DESCS) |
964 | rxq->tail = 0; | 964 | rxq->tail = 0; |
965 | rxq->buf[rx].skb = skb; | 965 | rxq->buf[rx].skb = skb; |
966 | pci_unmap_addr_set(&rxq->buf[rx], dma, addr); | 966 | dma_unmap_addr_set(&rxq->buf[rx], dma, addr); |
967 | 967 | ||
968 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); | 968 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); |
969 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); | 969 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); |
@@ -984,9 +984,9 @@ static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index) | |||
984 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | 984 | for (i = 0; i < MWL8K_RX_DESCS; i++) { |
985 | if (rxq->buf[i].skb != NULL) { | 985 | if (rxq->buf[i].skb != NULL) { |
986 | pci_unmap_single(priv->pdev, | 986 | pci_unmap_single(priv->pdev, |
987 | pci_unmap_addr(&rxq->buf[i], dma), | 987 | dma_unmap_addr(&rxq->buf[i], dma), |
988 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); | 988 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
989 | pci_unmap_addr_set(&rxq->buf[i], dma, 0); | 989 | dma_unmap_addr_set(&rxq->buf[i], dma, 0); |
990 | 990 | ||
991 | kfree_skb(rxq->buf[i].skb); | 991 | kfree_skb(rxq->buf[i].skb); |
992 | rxq->buf[i].skb = NULL; | 992 | rxq->buf[i].skb = NULL; |
@@ -1060,9 +1060,9 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit) | |||
1060 | rxq->buf[rxq->head].skb = NULL; | 1060 | rxq->buf[rxq->head].skb = NULL; |
1061 | 1061 | ||
1062 | pci_unmap_single(priv->pdev, | 1062 | pci_unmap_single(priv->pdev, |
1063 | pci_unmap_addr(&rxq->buf[rxq->head], dma), | 1063 | dma_unmap_addr(&rxq->buf[rxq->head], dma), |
1064 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); | 1064 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
1065 | pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); | 1065 | dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); |
1066 | 1066 | ||
1067 | rxq->head++; | 1067 | rxq->head++; |
1068 | if (rxq->head == MWL8K_RX_DESCS) | 1068 | if (rxq->head == MWL8K_RX_DESCS) |
@@ -1120,7 +1120,7 @@ struct mwl8k_tx_desc { | |||
1120 | __le16 rate_info; | 1120 | __le16 rate_info; |
1121 | __u8 peer_id; | 1121 | __u8 peer_id; |
1122 | __u8 tx_frag_cnt; | 1122 | __u8 tx_frag_cnt; |
1123 | } __attribute__((packed)); | 1123 | } __packed; |
1124 | 1124 | ||
1125 | #define MWL8K_TX_DESCS 128 | 1125 | #define MWL8K_TX_DESCS 128 |
1126 | 1126 | ||
@@ -1666,7 +1666,7 @@ struct mwl8k_cmd_get_hw_spec_sta { | |||
1666 | __le32 caps2; | 1666 | __le32 caps2; |
1667 | __le32 num_tx_desc_per_queue; | 1667 | __le32 num_tx_desc_per_queue; |
1668 | __le32 total_rxd; | 1668 | __le32 total_rxd; |
1669 | } __attribute__((packed)); | 1669 | } __packed; |
1670 | 1670 | ||
1671 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 | 1671 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 |
1672 | #define MWL8K_CAP_GREENFIELD 0x08000000 | 1672 | #define MWL8K_CAP_GREENFIELD 0x08000000 |
@@ -1810,7 +1810,7 @@ struct mwl8k_cmd_get_hw_spec_ap { | |||
1810 | __le32 wcbbase1; | 1810 | __le32 wcbbase1; |
1811 | __le32 wcbbase2; | 1811 | __le32 wcbbase2; |
1812 | __le32 wcbbase3; | 1812 | __le32 wcbbase3; |
1813 | } __attribute__((packed)); | 1813 | } __packed; |
1814 | 1814 | ||
1815 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | 1815 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) |
1816 | { | 1816 | { |
@@ -1883,7 +1883,7 @@ struct mwl8k_cmd_set_hw_spec { | |||
1883 | __le32 flags; | 1883 | __le32 flags; |
1884 | __le32 num_tx_desc_per_queue; | 1884 | __le32 num_tx_desc_per_queue; |
1885 | __le32 total_rxd; | 1885 | __le32 total_rxd; |
1886 | } __attribute__((packed)); | 1886 | } __packed; |
1887 | 1887 | ||
1888 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 | 1888 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 |
1889 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 | 1889 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 |
@@ -1985,7 +1985,7 @@ __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti, | |||
1985 | struct mwl8k_cmd_get_stat { | 1985 | struct mwl8k_cmd_get_stat { |
1986 | struct mwl8k_cmd_pkt header; | 1986 | struct mwl8k_cmd_pkt header; |
1987 | __le32 stats[64]; | 1987 | __le32 stats[64]; |
1988 | } __attribute__((packed)); | 1988 | } __packed; |
1989 | 1989 | ||
1990 | #define MWL8K_STAT_ACK_FAILURE 9 | 1990 | #define MWL8K_STAT_ACK_FAILURE 9 |
1991 | #define MWL8K_STAT_RTS_FAILURE 12 | 1991 | #define MWL8K_STAT_RTS_FAILURE 12 |
@@ -2029,7 +2029,7 @@ struct mwl8k_cmd_radio_control { | |||
2029 | __le16 action; | 2029 | __le16 action; |
2030 | __le16 control; | 2030 | __le16 control; |
2031 | __le16 radio_on; | 2031 | __le16 radio_on; |
2032 | } __attribute__((packed)); | 2032 | } __packed; |
2033 | 2033 | ||
2034 | static int | 2034 | static int |
2035 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) | 2035 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) |
@@ -2092,7 +2092,7 @@ struct mwl8k_cmd_rf_tx_power { | |||
2092 | __le16 current_level; | 2092 | __le16 current_level; |
2093 | __le16 reserved; | 2093 | __le16 reserved; |
2094 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | 2094 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; |
2095 | } __attribute__((packed)); | 2095 | } __packed; |
2096 | 2096 | ||
2097 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) | 2097 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
2098 | { | 2098 | { |
@@ -2121,7 +2121,7 @@ struct mwl8k_cmd_rf_antenna { | |||
2121 | struct mwl8k_cmd_pkt header; | 2121 | struct mwl8k_cmd_pkt header; |
2122 | __le16 antenna; | 2122 | __le16 antenna; |
2123 | __le16 mode; | 2123 | __le16 mode; |
2124 | } __attribute__((packed)); | 2124 | } __packed; |
2125 | 2125 | ||
2126 | #define MWL8K_RF_ANTENNA_RX 1 | 2126 | #define MWL8K_RF_ANTENNA_RX 1 |
2127 | #define MWL8K_RF_ANTENNA_TX 2 | 2127 | #define MWL8K_RF_ANTENNA_TX 2 |
@@ -2182,7 +2182,7 @@ static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, | |||
2182 | */ | 2182 | */ |
2183 | struct mwl8k_cmd_set_pre_scan { | 2183 | struct mwl8k_cmd_set_pre_scan { |
2184 | struct mwl8k_cmd_pkt header; | 2184 | struct mwl8k_cmd_pkt header; |
2185 | } __attribute__((packed)); | 2185 | } __packed; |
2186 | 2186 | ||
2187 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) | 2187 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) |
2188 | { | 2188 | { |
@@ -2209,7 +2209,7 @@ struct mwl8k_cmd_set_post_scan { | |||
2209 | struct mwl8k_cmd_pkt header; | 2209 | struct mwl8k_cmd_pkt header; |
2210 | __le32 isibss; | 2210 | __le32 isibss; |
2211 | __u8 bssid[ETH_ALEN]; | 2211 | __u8 bssid[ETH_ALEN]; |
2212 | } __attribute__((packed)); | 2212 | } __packed; |
2213 | 2213 | ||
2214 | static int | 2214 | static int |
2215 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) | 2215 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) |
@@ -2240,7 +2240,7 @@ struct mwl8k_cmd_set_rf_channel { | |||
2240 | __le16 action; | 2240 | __le16 action; |
2241 | __u8 current_channel; | 2241 | __u8 current_channel; |
2242 | __le32 channel_flags; | 2242 | __le32 channel_flags; |
2243 | } __attribute__((packed)); | 2243 | } __packed; |
2244 | 2244 | ||
2245 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, | 2245 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, |
2246 | struct ieee80211_conf *conf) | 2246 | struct ieee80211_conf *conf) |
@@ -2293,7 +2293,7 @@ struct mwl8k_cmd_update_set_aid { | |||
2293 | __u8 bssid[ETH_ALEN]; | 2293 | __u8 bssid[ETH_ALEN]; |
2294 | __le16 protection_mode; | 2294 | __le16 protection_mode; |
2295 | __u8 supp_rates[14]; | 2295 | __u8 supp_rates[14]; |
2296 | } __attribute__((packed)); | 2296 | } __packed; |
2297 | 2297 | ||
2298 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) | 2298 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) |
2299 | { | 2299 | { |
@@ -2364,7 +2364,7 @@ struct mwl8k_cmd_set_rate { | |||
2364 | /* Bitmap for supported MCS codes. */ | 2364 | /* Bitmap for supported MCS codes. */ |
2365 | __u8 mcs_set[16]; | 2365 | __u8 mcs_set[16]; |
2366 | __u8 reserved[16]; | 2366 | __u8 reserved[16]; |
2367 | } __attribute__((packed)); | 2367 | } __packed; |
2368 | 2368 | ||
2369 | static int | 2369 | static int |
2370 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | 2370 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
@@ -2397,7 +2397,7 @@ struct mwl8k_cmd_finalize_join { | |||
2397 | struct mwl8k_cmd_pkt header; | 2397 | struct mwl8k_cmd_pkt header; |
2398 | __le32 sleep_interval; /* Number of beacon periods to sleep */ | 2398 | __le32 sleep_interval; /* Number of beacon periods to sleep */ |
2399 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; | 2399 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; |
2400 | } __attribute__((packed)); | 2400 | } __packed; |
2401 | 2401 | ||
2402 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, | 2402 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, |
2403 | int framelen, int dtim) | 2403 | int framelen, int dtim) |
@@ -2436,7 +2436,7 @@ struct mwl8k_cmd_set_rts_threshold { | |||
2436 | struct mwl8k_cmd_pkt header; | 2436 | struct mwl8k_cmd_pkt header; |
2437 | __le16 action; | 2437 | __le16 action; |
2438 | __le16 threshold; | 2438 | __le16 threshold; |
2439 | } __attribute__((packed)); | 2439 | } __packed; |
2440 | 2440 | ||
2441 | static int | 2441 | static int |
2442 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) | 2442 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) |
@@ -2466,7 +2466,7 @@ struct mwl8k_cmd_set_slot { | |||
2466 | struct mwl8k_cmd_pkt header; | 2466 | struct mwl8k_cmd_pkt header; |
2467 | __le16 action; | 2467 | __le16 action; |
2468 | __u8 short_slot; | 2468 | __u8 short_slot; |
2469 | } __attribute__((packed)); | 2469 | } __packed; |
2470 | 2470 | ||
2471 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) | 2471 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) |
2472 | { | 2472 | { |
@@ -2528,7 +2528,7 @@ struct mwl8k_cmd_set_edca_params { | |||
2528 | __u8 txq; | 2528 | __u8 txq; |
2529 | } sta; | 2529 | } sta; |
2530 | }; | 2530 | }; |
2531 | } __attribute__((packed)); | 2531 | } __packed; |
2532 | 2532 | ||
2533 | #define MWL8K_SET_EDCA_CW 0x01 | 2533 | #define MWL8K_SET_EDCA_CW 0x01 |
2534 | #define MWL8K_SET_EDCA_TXOP 0x02 | 2534 | #define MWL8K_SET_EDCA_TXOP 0x02 |
@@ -2579,7 +2579,7 @@ mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, | |||
2579 | struct mwl8k_cmd_set_wmm_mode { | 2579 | struct mwl8k_cmd_set_wmm_mode { |
2580 | struct mwl8k_cmd_pkt header; | 2580 | struct mwl8k_cmd_pkt header; |
2581 | __le16 action; | 2581 | __le16 action; |
2582 | } __attribute__((packed)); | 2582 | } __packed; |
2583 | 2583 | ||
2584 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) | 2584 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) |
2585 | { | 2585 | { |
@@ -2612,7 +2612,7 @@ struct mwl8k_cmd_mimo_config { | |||
2612 | __le32 action; | 2612 | __le32 action; |
2613 | __u8 rx_antenna_map; | 2613 | __u8 rx_antenna_map; |
2614 | __u8 tx_antenna_map; | 2614 | __u8 tx_antenna_map; |
2615 | } __attribute__((packed)); | 2615 | } __packed; |
2616 | 2616 | ||
2617 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) | 2617 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) |
2618 | { | 2618 | { |
@@ -2652,7 +2652,7 @@ struct mwl8k_cmd_use_fixed_rate_sta { | |||
2652 | __le32 rate_type; | 2652 | __le32 rate_type; |
2653 | __le32 reserved1; | 2653 | __le32 reserved1; |
2654 | __le32 reserved2; | 2654 | __le32 reserved2; |
2655 | } __attribute__((packed)); | 2655 | } __packed; |
2656 | 2656 | ||
2657 | #define MWL8K_USE_AUTO_RATE 0x0002 | 2657 | #define MWL8K_USE_AUTO_RATE 0x0002 |
2658 | #define MWL8K_UCAST_RATE 0 | 2658 | #define MWL8K_UCAST_RATE 0 |
@@ -2694,7 +2694,7 @@ struct mwl8k_cmd_use_fixed_rate_ap { | |||
2694 | u8 multicast_rate; | 2694 | u8 multicast_rate; |
2695 | u8 multicast_rate_type; | 2695 | u8 multicast_rate_type; |
2696 | u8 management_rate; | 2696 | u8 management_rate; |
2697 | } __attribute__((packed)); | 2697 | } __packed; |
2698 | 2698 | ||
2699 | static int | 2699 | static int |
2700 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | 2700 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) |
@@ -2724,7 +2724,7 @@ mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | |||
2724 | struct mwl8k_cmd_enable_sniffer { | 2724 | struct mwl8k_cmd_enable_sniffer { |
2725 | struct mwl8k_cmd_pkt header; | 2725 | struct mwl8k_cmd_pkt header; |
2726 | __le32 action; | 2726 | __le32 action; |
2727 | } __attribute__((packed)); | 2727 | } __packed; |
2728 | 2728 | ||
2729 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) | 2729 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) |
2730 | { | 2730 | { |
@@ -2757,7 +2757,7 @@ struct mwl8k_cmd_set_mac_addr { | |||
2757 | } mbss; | 2757 | } mbss; |
2758 | __u8 mac_addr[ETH_ALEN]; | 2758 | __u8 mac_addr[ETH_ALEN]; |
2759 | }; | 2759 | }; |
2760 | } __attribute__((packed)); | 2760 | } __packed; |
2761 | 2761 | ||
2762 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 | 2762 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 |
2763 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 | 2763 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 |
@@ -2812,7 +2812,7 @@ struct mwl8k_cmd_set_rate_adapt_mode { | |||
2812 | struct mwl8k_cmd_pkt header; | 2812 | struct mwl8k_cmd_pkt header; |
2813 | __le16 action; | 2813 | __le16 action; |
2814 | __le16 mode; | 2814 | __le16 mode; |
2815 | } __attribute__((packed)); | 2815 | } __packed; |
2816 | 2816 | ||
2817 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | 2817 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) |
2818 | { | 2818 | { |
@@ -2840,7 +2840,7 @@ static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | |||
2840 | struct mwl8k_cmd_bss_start { | 2840 | struct mwl8k_cmd_bss_start { |
2841 | struct mwl8k_cmd_pkt header; | 2841 | struct mwl8k_cmd_pkt header; |
2842 | __le32 enable; | 2842 | __le32 enable; |
2843 | } __attribute__((packed)); | 2843 | } __packed; |
2844 | 2844 | ||
2845 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, | 2845 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, |
2846 | struct ieee80211_vif *vif, int enable) | 2846 | struct ieee80211_vif *vif, int enable) |
@@ -2885,7 +2885,7 @@ struct mwl8k_cmd_set_new_stn { | |||
2885 | __u8 add_qos_info; | 2885 | __u8 add_qos_info; |
2886 | __u8 is_qos_sta; | 2886 | __u8 is_qos_sta; |
2887 | __le32 fw_sta_ptr; | 2887 | __le32 fw_sta_ptr; |
2888 | } __attribute__((packed)); | 2888 | } __packed; |
2889 | 2889 | ||
2890 | #define MWL8K_STA_ACTION_ADD 0 | 2890 | #define MWL8K_STA_ACTION_ADD 0 |
2891 | #define MWL8K_STA_ACTION_REMOVE 2 | 2891 | #define MWL8K_STA_ACTION_REMOVE 2 |
@@ -2978,7 +2978,7 @@ struct ewc_ht_info { | |||
2978 | __le16 control1; | 2978 | __le16 control1; |
2979 | __le16 control2; | 2979 | __le16 control2; |
2980 | __le16 control3; | 2980 | __le16 control3; |
2981 | } __attribute__((packed)); | 2981 | } __packed; |
2982 | 2982 | ||
2983 | struct peer_capability_info { | 2983 | struct peer_capability_info { |
2984 | /* Peer type - AP vs. STA. */ | 2984 | /* Peer type - AP vs. STA. */ |
@@ -3007,7 +3007,7 @@ struct peer_capability_info { | |||
3007 | __u8 pad2; | 3007 | __u8 pad2; |
3008 | __u8 station_id; | 3008 | __u8 station_id; |
3009 | __le16 amsdu_enabled; | 3009 | __le16 amsdu_enabled; |
3010 | } __attribute__((packed)); | 3010 | } __packed; |
3011 | 3011 | ||
3012 | struct mwl8k_cmd_update_stadb { | 3012 | struct mwl8k_cmd_update_stadb { |
3013 | struct mwl8k_cmd_pkt header; | 3013 | struct mwl8k_cmd_pkt header; |
@@ -3022,7 +3022,7 @@ struct mwl8k_cmd_update_stadb { | |||
3022 | 3022 | ||
3023 | /* Peer info - valid during add/update. */ | 3023 | /* Peer info - valid during add/update. */ |
3024 | struct peer_capability_info peer_info; | 3024 | struct peer_capability_info peer_info; |
3025 | } __attribute__((packed)); | 3025 | } __packed; |
3026 | 3026 | ||
3027 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 | 3027 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 |
3028 | #define MWL8K_STA_DB_DEL_ENTRY 2 | 3028 | #define MWL8K_STA_DB_DEL_ENTRY 2 |
diff --git a/drivers/net/wireless/orinoco/fw.c b/drivers/net/wireless/orinoco/fw.c index 3e1947d097ca..259d75853984 100644 --- a/drivers/net/wireless/orinoco/fw.c +++ b/drivers/net/wireless/orinoco/fw.c | |||
@@ -49,7 +49,7 @@ struct orinoco_fw_header { | |||
49 | __le32 pri_offset; /* Offset to primary plug data */ | 49 | __le32 pri_offset; /* Offset to primary plug data */ |
50 | __le32 compat_offset; /* Offset to compatibility data*/ | 50 | __le32 compat_offset; /* Offset to compatibility data*/ |
51 | char signature[0]; /* FW signature length headersize-20 */ | 51 | char signature[0]; /* FW signature length headersize-20 */ |
52 | } __attribute__ ((packed)); | 52 | } __packed; |
53 | 53 | ||
54 | /* Check the range of various header entries. Return a pointer to a | 54 | /* Check the range of various header entries. Return a pointer to a |
55 | * description of the problem, or NULL if everything checks out. */ | 55 | * description of the problem, or NULL if everything checks out. */ |
diff --git a/drivers/net/wireless/orinoco/hermes.h b/drivers/net/wireless/orinoco/hermes.h index 9ca34e722b45..d9f18c11682a 100644 --- a/drivers/net/wireless/orinoco/hermes.h +++ b/drivers/net/wireless/orinoco/hermes.h | |||
@@ -205,7 +205,7 @@ struct hermes_tx_descriptor { | |||
205 | u8 retry_count; | 205 | u8 retry_count; |
206 | u8 tx_rate; | 206 | u8 tx_rate; |
207 | __le16 tx_control; | 207 | __le16 tx_control; |
208 | } __attribute__ ((packed)); | 208 | } __packed; |
209 | 209 | ||
210 | #define HERMES_TXSTAT_RETRYERR (0x0001) | 210 | #define HERMES_TXSTAT_RETRYERR (0x0001) |
211 | #define HERMES_TXSTAT_AGEDERR (0x0002) | 211 | #define HERMES_TXSTAT_AGEDERR (0x0002) |
@@ -254,7 +254,7 @@ struct hermes_tallies_frame { | |||
254 | /* Those last are probably not available in very old firmwares */ | 254 | /* Those last are probably not available in very old firmwares */ |
255 | __le16 RxDiscards_WEPICVError; | 255 | __le16 RxDiscards_WEPICVError; |
256 | __le16 RxDiscards_WEPExcluded; | 256 | __le16 RxDiscards_WEPExcluded; |
257 | } __attribute__ ((packed)); | 257 | } __packed; |
258 | 258 | ||
259 | /* Grabbed from wlan-ng - Thanks Mark... - Jean II | 259 | /* Grabbed from wlan-ng - Thanks Mark... - Jean II |
260 | * This is the result of a scan inquiry command */ | 260 | * This is the result of a scan inquiry command */ |
@@ -271,7 +271,7 @@ struct prism2_scan_apinfo { | |||
271 | u8 rates[10]; /* Bit rate supported */ | 271 | u8 rates[10]; /* Bit rate supported */ |
272 | __le16 proberesp_rate; /* Data rate of the response frame */ | 272 | __le16 proberesp_rate; /* Data rate of the response frame */ |
273 | __le16 atim; /* ATIM window time, Kus (hostscan only) */ | 273 | __le16 atim; /* ATIM window time, Kus (hostscan only) */ |
274 | } __attribute__ ((packed)); | 274 | } __packed; |
275 | 275 | ||
276 | /* Same stuff for the Lucent/Agere card. | 276 | /* Same stuff for the Lucent/Agere card. |
277 | * Thanks to h1kari <h1kari AT dachb0den.com> - Jean II */ | 277 | * Thanks to h1kari <h1kari AT dachb0den.com> - Jean II */ |
@@ -285,7 +285,7 @@ struct agere_scan_apinfo { | |||
285 | /* bits: 0-ess, 1-ibss, 4-privacy [wep] */ | 285 | /* bits: 0-ess, 1-ibss, 4-privacy [wep] */ |
286 | __le16 essid_len; /* ESSID length */ | 286 | __le16 essid_len; /* ESSID length */ |
287 | u8 essid[32]; /* ESSID of the network */ | 287 | u8 essid[32]; /* ESSID of the network */ |
288 | } __attribute__ ((packed)); | 288 | } __packed; |
289 | 289 | ||
290 | /* Moustafa: Scan structure for Symbol cards */ | 290 | /* Moustafa: Scan structure for Symbol cards */ |
291 | struct symbol_scan_apinfo { | 291 | struct symbol_scan_apinfo { |
@@ -303,7 +303,7 @@ struct symbol_scan_apinfo { | |||
303 | __le16 basic_rates; /* Basic rates bitmask */ | 303 | __le16 basic_rates; /* Basic rates bitmask */ |
304 | u8 unknown2[6]; /* Always FF:FF:FF:FF:00:00 */ | 304 | u8 unknown2[6]; /* Always FF:FF:FF:FF:00:00 */ |
305 | u8 unknown3[8]; /* Always 0, appeared in f/w 3.91-68 */ | 305 | u8 unknown3[8]; /* Always 0, appeared in f/w 3.91-68 */ |
306 | } __attribute__ ((packed)); | 306 | } __packed; |
307 | 307 | ||
308 | union hermes_scan_info { | 308 | union hermes_scan_info { |
309 | struct agere_scan_apinfo a; | 309 | struct agere_scan_apinfo a; |
@@ -343,7 +343,7 @@ struct agere_ext_scan_info { | |||
343 | __le16 beacon_interval; | 343 | __le16 beacon_interval; |
344 | __le16 capabilities; | 344 | __le16 capabilities; |
345 | u8 data[0]; | 345 | u8 data[0]; |
346 | } __attribute__ ((packed)); | 346 | } __packed; |
347 | 347 | ||
348 | #define HERMES_LINKSTATUS_NOT_CONNECTED (0x0000) | 348 | #define HERMES_LINKSTATUS_NOT_CONNECTED (0x0000) |
349 | #define HERMES_LINKSTATUS_CONNECTED (0x0001) | 349 | #define HERMES_LINKSTATUS_CONNECTED (0x0001) |
@@ -355,7 +355,7 @@ struct agere_ext_scan_info { | |||
355 | 355 | ||
356 | struct hermes_linkstatus { | 356 | struct hermes_linkstatus { |
357 | __le16 linkstatus; /* Link status */ | 357 | __le16 linkstatus; /* Link status */ |
358 | } __attribute__ ((packed)); | 358 | } __packed; |
359 | 359 | ||
360 | struct hermes_response { | 360 | struct hermes_response { |
361 | u16 status, resp0, resp1, resp2; | 361 | u16 status, resp0, resp1, resp2; |
@@ -365,11 +365,11 @@ struct hermes_response { | |||
365 | struct hermes_idstring { | 365 | struct hermes_idstring { |
366 | __le16 len; | 366 | __le16 len; |
367 | __le16 val[16]; | 367 | __le16 val[16]; |
368 | } __attribute__ ((packed)); | 368 | } __packed; |
369 | 369 | ||
370 | struct hermes_multicast { | 370 | struct hermes_multicast { |
371 | u8 addr[HERMES_MAX_MULTICAST][ETH_ALEN]; | 371 | u8 addr[HERMES_MAX_MULTICAST][ETH_ALEN]; |
372 | } __attribute__ ((packed)); | 372 | } __packed; |
373 | 373 | ||
374 | /* Timeouts */ | 374 | /* Timeouts */ |
375 | #define HERMES_BAP_BUSY_TIMEOUT (10000) /* In iterations of ~1us */ | 375 | #define HERMES_BAP_BUSY_TIMEOUT (10000) /* In iterations of ~1us */ |
diff --git a/drivers/net/wireless/orinoco/hermes_dld.c b/drivers/net/wireless/orinoco/hermes_dld.c index 6da85e75fce0..2b2b9a1a979c 100644 --- a/drivers/net/wireless/orinoco/hermes_dld.c +++ b/drivers/net/wireless/orinoco/hermes_dld.c | |||
@@ -65,10 +65,10 @@ struct dblock { | |||
65 | __le32 addr; /* adapter address where to write the block */ | 65 | __le32 addr; /* adapter address where to write the block */ |
66 | __le16 len; /* length of the data only, in bytes */ | 66 | __le16 len; /* length of the data only, in bytes */ |
67 | char data[0]; /* data to be written */ | 67 | char data[0]; /* data to be written */ |
68 | } __attribute__ ((packed)); | 68 | } __packed; |
69 | 69 | ||
70 | /* | 70 | /* |
71 | * Plug Data References are located in in the image after the last data | 71 | * Plug Data References are located in the image after the last data |
72 | * block. They refer to areas in the adapter memory where the plug data | 72 | * block. They refer to areas in the adapter memory where the plug data |
73 | * items with matching ID should be written. | 73 | * items with matching ID should be written. |
74 | */ | 74 | */ |
@@ -77,7 +77,7 @@ struct pdr { | |||
77 | __le32 addr; /* adapter address where to write the data */ | 77 | __le32 addr; /* adapter address where to write the data */ |
78 | __le32 len; /* expected length of the data, in bytes */ | 78 | __le32 len; /* expected length of the data, in bytes */ |
79 | char next[0]; /* next PDR starts here */ | 79 | char next[0]; /* next PDR starts here */ |
80 | } __attribute__ ((packed)); | 80 | } __packed; |
81 | 81 | ||
82 | /* | 82 | /* |
83 | * Plug Data Items are located in the EEPROM read from the adapter by | 83 | * Plug Data Items are located in the EEPROM read from the adapter by |
@@ -88,7 +88,7 @@ struct pdi { | |||
88 | __le16 len; /* length of ID and data, in words */ | 88 | __le16 len; /* length of ID and data, in words */ |
89 | __le16 id; /* record ID */ | 89 | __le16 id; /* record ID */ |
90 | char data[0]; /* plug data */ | 90 | char data[0]; /* plug data */ |
91 | } __attribute__ ((packed)); | 91 | } __packed; |
92 | 92 | ||
93 | /*** FW data block access functions ***/ | 93 | /*** FW data block access functions ***/ |
94 | 94 | ||
@@ -317,7 +317,7 @@ static const struct { \ | |||
317 | __le16 len; \ | 317 | __le16 len; \ |
318 | __le16 id; \ | 318 | __le16 id; \ |
319 | u8 val[length]; \ | 319 | u8 val[length]; \ |
320 | } __attribute__ ((packed)) default_pdr_data_##pid = { \ | 320 | } __packed default_pdr_data_##pid = { \ |
321 | cpu_to_le16((sizeof(default_pdr_data_##pid)/ \ | 321 | cpu_to_le16((sizeof(default_pdr_data_##pid)/ \ |
322 | sizeof(__le16)) - 1), \ | 322 | sizeof(__le16)) - 1), \ |
323 | cpu_to_le16(pid), \ | 323 | cpu_to_le16(pid), \ |
diff --git a/drivers/net/wireless/orinoco/hw.c b/drivers/net/wireless/orinoco/hw.c index 6fbd78850123..077baa86756b 100644 --- a/drivers/net/wireless/orinoco/hw.c +++ b/drivers/net/wireless/orinoco/hw.c | |||
@@ -45,7 +45,7 @@ static const struct { | |||
45 | /* Firmware version encoding */ | 45 | /* Firmware version encoding */ |
46 | struct comp_id { | 46 | struct comp_id { |
47 | u16 id, variant, major, minor; | 47 | u16 id, variant, major, minor; |
48 | } __attribute__ ((packed)); | 48 | } __packed; |
49 | 49 | ||
50 | static inline fwtype_t determine_firmware_type(struct comp_id *nic_id) | 50 | static inline fwtype_t determine_firmware_type(struct comp_id *nic_id) |
51 | { | 51 | { |
@@ -995,7 +995,7 @@ int __orinoco_hw_set_tkip_key(struct orinoco_private *priv, int key_idx, | |||
995 | u8 tx_mic[MIC_KEYLEN]; | 995 | u8 tx_mic[MIC_KEYLEN]; |
996 | u8 rx_mic[MIC_KEYLEN]; | 996 | u8 rx_mic[MIC_KEYLEN]; |
997 | u8 tsc[ORINOCO_SEQ_LEN]; | 997 | u8 tsc[ORINOCO_SEQ_LEN]; |
998 | } __attribute__ ((packed)) buf; | 998 | } __packed buf; |
999 | hermes_t *hw = &priv->hw; | 999 | hermes_t *hw = &priv->hw; |
1000 | int ret; | 1000 | int ret; |
1001 | int err; | 1001 | int err; |
@@ -1326,7 +1326,7 @@ int orinoco_hw_disassociate(struct orinoco_private *priv, | |||
1326 | struct { | 1326 | struct { |
1327 | u8 addr[ETH_ALEN]; | 1327 | u8 addr[ETH_ALEN]; |
1328 | __le16 reason_code; | 1328 | __le16 reason_code; |
1329 | } __attribute__ ((packed)) buf; | 1329 | } __packed buf; |
1330 | 1330 | ||
1331 | /* Currently only supported by WPA enabled Agere fw */ | 1331 | /* Currently only supported by WPA enabled Agere fw */ |
1332 | if (!priv->has_wpa) | 1332 | if (!priv->has_wpa) |
diff --git a/drivers/net/wireless/orinoco/main.c b/drivers/net/wireless/orinoco/main.c index ca71f08709bc..e8e2d0f4763d 100644 --- a/drivers/net/wireless/orinoco/main.c +++ b/drivers/net/wireless/orinoco/main.c | |||
@@ -172,7 +172,7 @@ struct hermes_txexc_data { | |||
172 | __le16 frame_ctl; | 172 | __le16 frame_ctl; |
173 | __le16 duration_id; | 173 | __le16 duration_id; |
174 | u8 addr1[ETH_ALEN]; | 174 | u8 addr1[ETH_ALEN]; |
175 | } __attribute__ ((packed)); | 175 | } __packed; |
176 | 176 | ||
177 | /* Rx frame header except compatibility 802.3 header */ | 177 | /* Rx frame header except compatibility 802.3 header */ |
178 | struct hermes_rx_descriptor { | 178 | struct hermes_rx_descriptor { |
@@ -196,7 +196,7 @@ struct hermes_rx_descriptor { | |||
196 | 196 | ||
197 | /* Data length */ | 197 | /* Data length */ |
198 | __le16 data_len; | 198 | __le16 data_len; |
199 | } __attribute__ ((packed)); | 199 | } __packed; |
200 | 200 | ||
201 | struct orinoco_rx_data { | 201 | struct orinoco_rx_data { |
202 | struct hermes_rx_descriptor *desc; | 202 | struct hermes_rx_descriptor *desc; |
@@ -390,7 +390,7 @@ int orinoco_process_xmit_skb(struct sk_buff *skb, | |||
390 | struct header_struct { | 390 | struct header_struct { |
391 | struct ethhdr eth; /* 802.3 header */ | 391 | struct ethhdr eth; /* 802.3 header */ |
392 | u8 encap[6]; /* 802.2 header */ | 392 | u8 encap[6]; /* 802.2 header */ |
393 | } __attribute__ ((packed)) hdr; | 393 | } __packed hdr; |
394 | int len = skb->len + sizeof(encaps_hdr) - (2 * ETH_ALEN); | 394 | int len = skb->len + sizeof(encaps_hdr) - (2 * ETH_ALEN); |
395 | 395 | ||
396 | if (skb_headroom(skb) < ENCAPS_OVERHEAD) { | 396 | if (skb_headroom(skb) < ENCAPS_OVERHEAD) { |
@@ -1170,7 +1170,7 @@ static void orinoco_join_ap(struct work_struct *work) | |||
1170 | struct join_req { | 1170 | struct join_req { |
1171 | u8 bssid[ETH_ALEN]; | 1171 | u8 bssid[ETH_ALEN]; |
1172 | __le16 channel; | 1172 | __le16 channel; |
1173 | } __attribute__ ((packed)) req; | 1173 | } __packed req; |
1174 | const int atom_len = offsetof(struct prism2_scan_apinfo, atim); | 1174 | const int atom_len = offsetof(struct prism2_scan_apinfo, atim); |
1175 | struct prism2_scan_apinfo *atom = NULL; | 1175 | struct prism2_scan_apinfo *atom = NULL; |
1176 | int offset = 4; | 1176 | int offset = 4; |
@@ -1410,7 +1410,7 @@ void __orinoco_ev_info(struct net_device *dev, hermes_t *hw) | |||
1410 | struct { | 1410 | struct { |
1411 | __le16 len; | 1411 | __le16 len; |
1412 | __le16 type; | 1412 | __le16 type; |
1413 | } __attribute__ ((packed)) info; | 1413 | } __packed info; |
1414 | int len, type; | 1414 | int len, type; |
1415 | int err; | 1415 | int err; |
1416 | 1416 | ||
diff --git a/drivers/net/wireless/orinoco/orinoco.h b/drivers/net/wireless/orinoco/orinoco.h index a6da86e0a70f..255710ef082a 100644 --- a/drivers/net/wireless/orinoco/orinoco.h +++ b/drivers/net/wireless/orinoco/orinoco.h | |||
@@ -32,7 +32,7 @@ | |||
32 | struct orinoco_key { | 32 | struct orinoco_key { |
33 | __le16 len; /* always stored as little-endian */ | 33 | __le16 len; /* always stored as little-endian */ |
34 | char data[ORINOCO_MAX_KEY_SIZE]; | 34 | char data[ORINOCO_MAX_KEY_SIZE]; |
35 | } __attribute__ ((packed)); | 35 | } __packed; |
36 | 36 | ||
37 | #define TKIP_KEYLEN 16 | 37 | #define TKIP_KEYLEN 16 |
38 | #define MIC_KEYLEN 8 | 38 | #define MIC_KEYLEN 8 |
diff --git a/drivers/net/wireless/orinoco/orinoco_usb.c b/drivers/net/wireless/orinoco/orinoco_usb.c index 78f089baa8c9..1558381998ee 100644 --- a/drivers/net/wireless/orinoco/orinoco_usb.c +++ b/drivers/net/wireless/orinoco/orinoco_usb.c | |||
@@ -90,7 +90,7 @@ struct header_struct { | |||
90 | /* SNAP */ | 90 | /* SNAP */ |
91 | u8 oui[3]; | 91 | u8 oui[3]; |
92 | __be16 ethertype; | 92 | __be16 ethertype; |
93 | } __attribute__ ((packed)); | 93 | } __packed; |
94 | 94 | ||
95 | struct ez_usb_fw { | 95 | struct ez_usb_fw { |
96 | u16 size; | 96 | u16 size; |
@@ -222,7 +222,7 @@ struct ezusb_packet { | |||
222 | __le16 hermes_len; | 222 | __le16 hermes_len; |
223 | __le16 hermes_rid; | 223 | __le16 hermes_rid; |
224 | u8 data[0]; | 224 | u8 data[0]; |
225 | } __attribute__ ((packed)); | 225 | } __packed; |
226 | 226 | ||
227 | /* Table of devices that work or may work with this driver */ | 227 | /* Table of devices that work or may work with this driver */ |
228 | static struct usb_device_id ezusb_table[] = { | 228 | static struct usb_device_id ezusb_table[] = { |
@@ -356,12 +356,10 @@ static struct request_context *ezusb_alloc_ctx(struct ezusb_priv *upriv, | |||
356 | { | 356 | { |
357 | struct request_context *ctx; | 357 | struct request_context *ctx; |
358 | 358 | ||
359 | ctx = kmalloc(sizeof(*ctx), GFP_ATOMIC); | 359 | ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC); |
360 | if (!ctx) | 360 | if (!ctx) |
361 | return NULL; | 361 | return NULL; |
362 | 362 | ||
363 | memset(ctx, 0, sizeof(*ctx)); | ||
364 | |||
365 | ctx->buf = kmalloc(BULK_BUF_SIZE, GFP_ATOMIC); | 363 | ctx->buf = kmalloc(BULK_BUF_SIZE, GFP_ATOMIC); |
366 | if (!ctx->buf) { | 364 | if (!ctx->buf) { |
367 | kfree(ctx); | 365 | kfree(ctx); |
diff --git a/drivers/net/wireless/orinoco/wext.c b/drivers/net/wireless/orinoco/wext.c index 5775124e2aee..cf7be1eb6124 100644 --- a/drivers/net/wireless/orinoco/wext.c +++ b/drivers/net/wireless/orinoco/wext.c | |||
@@ -128,7 +128,7 @@ static struct iw_statistics *orinoco_get_wireless_stats(struct net_device *dev) | |||
128 | } else { | 128 | } else { |
129 | struct { | 129 | struct { |
130 | __le16 qual, signal, noise, unused; | 130 | __le16 qual, signal, noise, unused; |
131 | } __attribute__ ((packed)) cq; | 131 | } __packed cq; |
132 | 132 | ||
133 | err = HERMES_READ_RECORD(hw, USER_BAP, | 133 | err = HERMES_READ_RECORD(hw, USER_BAP, |
134 | HERMES_RID_COMMSQUALITY, &cq); | 134 | HERMES_RID_COMMSQUALITY, &cq); |
@@ -993,11 +993,9 @@ static int orinoco_ioctl_set_genie(struct net_device *dev, | |||
993 | return -EINVAL; | 993 | return -EINVAL; |
994 | 994 | ||
995 | if (wrqu->data.length) { | 995 | if (wrqu->data.length) { |
996 | buf = kmalloc(wrqu->data.length, GFP_KERNEL); | 996 | buf = kmemdup(extra, wrqu->data.length, GFP_KERNEL); |
997 | if (buf == NULL) | 997 | if (buf == NULL) |
998 | return -ENOMEM; | 998 | return -ENOMEM; |
999 | |||
1000 | memcpy(buf, extra, wrqu->data.length); | ||
1001 | } else | 999 | } else |
1002 | buf = NULL; | 1000 | buf = NULL; |
1003 | 1001 | ||
diff --git a/drivers/net/wireless/p54/eeprom.c b/drivers/net/wireless/p54/eeprom.c index 187e263b045a..e51650ed49f2 100644 --- a/drivers/net/wireless/p54/eeprom.c +++ b/drivers/net/wireless/p54/eeprom.c | |||
@@ -599,13 +599,13 @@ int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len) | |||
599 | } | 599 | } |
600 | break; | 600 | break; |
601 | case PDR_PRISM_ZIF_TX_IQ_CALIBRATION: | 601 | case PDR_PRISM_ZIF_TX_IQ_CALIBRATION: |
602 | priv->iq_autocal = kmalloc(data_len, GFP_KERNEL); | 602 | priv->iq_autocal = kmemdup(entry->data, data_len, |
603 | GFP_KERNEL); | ||
603 | if (!priv->iq_autocal) { | 604 | if (!priv->iq_autocal) { |
604 | err = -ENOMEM; | 605 | err = -ENOMEM; |
605 | goto err; | 606 | goto err; |
606 | } | 607 | } |
607 | 608 | ||
608 | memcpy(priv->iq_autocal, entry->data, data_len); | ||
609 | priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry); | 609 | priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry); |
610 | break; | 610 | break; |
611 | case PDR_DEFAULT_COUNTRY: | 611 | case PDR_DEFAULT_COUNTRY: |
diff --git a/drivers/net/wireless/p54/net2280.h b/drivers/net/wireless/p54/net2280.h index 4915d9d54203..e3ed893b5aaf 100644 --- a/drivers/net/wireless/p54/net2280.h +++ b/drivers/net/wireless/p54/net2280.h | |||
@@ -232,7 +232,7 @@ struct net2280_regs { | |||
232 | #define GPIO2_INTERRUPT 2 | 232 | #define GPIO2_INTERRUPT 2 |
233 | #define GPIO1_INTERRUPT 1 | 233 | #define GPIO1_INTERRUPT 1 |
234 | #define GPIO0_INTERRUPT 0 | 234 | #define GPIO0_INTERRUPT 0 |
235 | } __attribute__ ((packed)); | 235 | } __packed; |
236 | 236 | ||
237 | /* usb control, BAR0 + 0x0080 */ | 237 | /* usb control, BAR0 + 0x0080 */ |
238 | struct net2280_usb_regs { | 238 | struct net2280_usb_regs { |
@@ -296,7 +296,7 @@ struct net2280_usb_regs { | |||
296 | #define FORCE_IMMEDIATE 7 | 296 | #define FORCE_IMMEDIATE 7 |
297 | #define OUR_USB_ADDRESS 0 | 297 | #define OUR_USB_ADDRESS 0 |
298 | __le32 ourconfig; | 298 | __le32 ourconfig; |
299 | } __attribute__ ((packed)); | 299 | } __packed; |
300 | 300 | ||
301 | /* pci control, BAR0 + 0x0100 */ | 301 | /* pci control, BAR0 + 0x0100 */ |
302 | struct net2280_pci_regs { | 302 | struct net2280_pci_regs { |
@@ -323,7 +323,7 @@ struct net2280_pci_regs { | |||
323 | #define PCI_ARBITER_CLEAR 2 | 323 | #define PCI_ARBITER_CLEAR 2 |
324 | #define PCI_EXTERNAL_ARBITER 1 | 324 | #define PCI_EXTERNAL_ARBITER 1 |
325 | #define PCI_HOST_MODE 0 | 325 | #define PCI_HOST_MODE 0 |
326 | } __attribute__ ((packed)); | 326 | } __packed; |
327 | 327 | ||
328 | /* dma control, BAR0 + 0x0180 ... array of four structs like this, | 328 | /* dma control, BAR0 + 0x0180 ... array of four structs like this, |
329 | * for channels 0..3. see also struct net2280_dma: descriptor | 329 | * for channels 0..3. see also struct net2280_dma: descriptor |
@@ -364,7 +364,7 @@ struct net2280_dma_regs { /* [11.7] */ | |||
364 | __le32 dmaaddr; | 364 | __le32 dmaaddr; |
365 | __le32 dmadesc; | 365 | __le32 dmadesc; |
366 | u32 _unused1; | 366 | u32 _unused1; |
367 | } __attribute__ ((packed)); | 367 | } __packed; |
368 | 368 | ||
369 | /* dedicated endpoint registers, BAR0 + 0x0200 */ | 369 | /* dedicated endpoint registers, BAR0 + 0x0200 */ |
370 | 370 | ||
@@ -374,7 +374,7 @@ struct net2280_dep_regs { /* [11.8] */ | |||
374 | /* offset 0x0204, 0x0214, 0x224, 0x234, 0x244 */ | 374 | /* offset 0x0204, 0x0214, 0x224, 0x234, 0x244 */ |
375 | __le32 dep_rsp; | 375 | __le32 dep_rsp; |
376 | u32 _unused[2]; | 376 | u32 _unused[2]; |
377 | } __attribute__ ((packed)); | 377 | } __packed; |
378 | 378 | ||
379 | /* configurable endpoint registers, BAR0 + 0x0300 ... array of seven structs | 379 | /* configurable endpoint registers, BAR0 + 0x0300 ... array of seven structs |
380 | * like this, for ep0 then the configurable endpoints A..F | 380 | * like this, for ep0 then the configurable endpoints A..F |
@@ -437,16 +437,16 @@ struct net2280_ep_regs { /* [11.9] */ | |||
437 | __le32 ep_avail; | 437 | __le32 ep_avail; |
438 | __le32 ep_data; | 438 | __le32 ep_data; |
439 | u32 _unused0[2]; | 439 | u32 _unused0[2]; |
440 | } __attribute__ ((packed)); | 440 | } __packed; |
441 | 441 | ||
442 | struct net2280_reg_write { | 442 | struct net2280_reg_write { |
443 | __le16 port; | 443 | __le16 port; |
444 | __le32 addr; | 444 | __le32 addr; |
445 | __le32 val; | 445 | __le32 val; |
446 | } __attribute__ ((packed)); | 446 | } __packed; |
447 | 447 | ||
448 | struct net2280_reg_read { | 448 | struct net2280_reg_read { |
449 | __le16 port; | 449 | __le16 port; |
450 | __le32 addr; | 450 | __le32 addr; |
451 | } __attribute__ ((packed)); | 451 | } __packed; |
452 | #endif /* NET2280_H */ | 452 | #endif /* NET2280_H */ |
diff --git a/drivers/net/wireless/p54/p54pci.h b/drivers/net/wireless/p54/p54pci.h index 2feead617a3b..ee9bc62a4fa2 100644 --- a/drivers/net/wireless/p54/p54pci.h +++ b/drivers/net/wireless/p54/p54pci.h | |||
@@ -65,7 +65,7 @@ struct p54p_csr { | |||
65 | u8 unused_6[1924]; | 65 | u8 unused_6[1924]; |
66 | u8 cardbus_cis[0x800]; | 66 | u8 cardbus_cis[0x800]; |
67 | u8 direct_mem_win[0x1000]; | 67 | u8 direct_mem_win[0x1000]; |
68 | } __attribute__ ((packed)); | 68 | } __packed; |
69 | 69 | ||
70 | /* usb backend only needs the register defines above */ | 70 | /* usb backend only needs the register defines above */ |
71 | #ifndef P54USB_H | 71 | #ifndef P54USB_H |
@@ -74,7 +74,7 @@ struct p54p_desc { | |||
74 | __le32 device_addr; | 74 | __le32 device_addr; |
75 | __le16 len; | 75 | __le16 len; |
76 | __le16 flags; | 76 | __le16 flags; |
77 | } __attribute__ ((packed)); | 77 | } __packed; |
78 | 78 | ||
79 | struct p54p_ring_control { | 79 | struct p54p_ring_control { |
80 | __le32 host_idx[4]; | 80 | __le32 host_idx[4]; |
@@ -83,7 +83,7 @@ struct p54p_ring_control { | |||
83 | struct p54p_desc tx_data[32]; | 83 | struct p54p_desc tx_data[32]; |
84 | struct p54p_desc rx_mgmt[4]; | 84 | struct p54p_desc rx_mgmt[4]; |
85 | struct p54p_desc tx_mgmt[4]; | 85 | struct p54p_desc tx_mgmt[4]; |
86 | } __attribute__ ((packed)); | 86 | } __packed; |
87 | 87 | ||
88 | #define P54P_READ(r) (__force __le32)__raw_readl(&priv->map->r) | 88 | #define P54P_READ(r) (__force __le32)__raw_readl(&priv->map->r) |
89 | #define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r) | 89 | #define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r) |
diff --git a/drivers/net/wireless/p54/p54spi.c b/drivers/net/wireless/p54/p54spi.c index c8f09da1f84d..087bf0698a5a 100644 --- a/drivers/net/wireless/p54/p54spi.c +++ b/drivers/net/wireless/p54/p54spi.c | |||
@@ -697,9 +697,7 @@ static int __devexit p54spi_remove(struct spi_device *spi) | |||
697 | 697 | ||
698 | static struct spi_driver p54spi_driver = { | 698 | static struct spi_driver p54spi_driver = { |
699 | .driver = { | 699 | .driver = { |
700 | /* use cx3110x name because board-n800.c uses that for the | 700 | .name = "p54spi", |
701 | * SPI port */ | ||
702 | .name = "cx3110x", | ||
703 | .bus = &spi_bus_type, | 701 | .bus = &spi_bus_type, |
704 | .owner = THIS_MODULE, | 702 | .owner = THIS_MODULE, |
705 | }, | 703 | }, |
@@ -733,3 +731,4 @@ module_exit(p54spi_exit); | |||
733 | MODULE_LICENSE("GPL"); | 731 | MODULE_LICENSE("GPL"); |
734 | MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>"); | 732 | MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>"); |
735 | MODULE_ALIAS("spi:cx3110x"); | 733 | MODULE_ALIAS("spi:cx3110x"); |
734 | MODULE_ALIAS("spi:p54spi"); | ||
diff --git a/drivers/net/wireless/p54/p54spi.h b/drivers/net/wireless/p54/p54spi.h index 7fbe8d8fc67c..dfaa62aaeb07 100644 --- a/drivers/net/wireless/p54/p54spi.h +++ b/drivers/net/wireless/p54/p54spi.h | |||
@@ -96,7 +96,7 @@ struct p54s_dma_regs { | |||
96 | __le16 cmd; | 96 | __le16 cmd; |
97 | __le16 len; | 97 | __le16 len; |
98 | __le32 addr; | 98 | __le32 addr; |
99 | } __attribute__ ((packed)); | 99 | } __packed; |
100 | 100 | ||
101 | struct p54s_tx_info { | 101 | struct p54s_tx_info { |
102 | struct list_head tx_list; | 102 | struct list_head tx_list; |
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c index 73073259f508..b0318ea59b7f 100644 --- a/drivers/net/wireless/p54/p54usb.c +++ b/drivers/net/wireless/p54/p54usb.c | |||
@@ -434,10 +434,9 @@ static int p54u_firmware_reset_3887(struct ieee80211_hw *dev) | |||
434 | u8 *buf; | 434 | u8 *buf; |
435 | int ret; | 435 | int ret; |
436 | 436 | ||
437 | buf = kmalloc(4, GFP_KERNEL); | 437 | buf = kmemdup(p54u_romboot_3887, 4, GFP_KERNEL); |
438 | if (!buf) | 438 | if (!buf) |
439 | return -ENOMEM; | 439 | return -ENOMEM; |
440 | memcpy(buf, p54u_romboot_3887, 4); | ||
441 | ret = p54u_bulk_msg(priv, P54U_PIPE_DATA, | 440 | ret = p54u_bulk_msg(priv, P54U_PIPE_DATA, |
442 | buf, 4); | 441 | buf, 4); |
443 | kfree(buf); | 442 | kfree(buf); |
diff --git a/drivers/net/wireless/p54/p54usb.h b/drivers/net/wireless/p54/p54usb.h index e935b79f7f75..ed4034ade59a 100644 --- a/drivers/net/wireless/p54/p54usb.h +++ b/drivers/net/wireless/p54/p54usb.h | |||
@@ -70,12 +70,12 @@ struct net2280_tx_hdr { | |||
70 | __le16 len; | 70 | __le16 len; |
71 | __le16 follower; /* ? */ | 71 | __le16 follower; /* ? */ |
72 | u8 padding[8]; | 72 | u8 padding[8]; |
73 | } __attribute__((packed)); | 73 | } __packed; |
74 | 74 | ||
75 | struct lm87_tx_hdr { | 75 | struct lm87_tx_hdr { |
76 | __le32 device_addr; | 76 | __le32 device_addr; |
77 | __le32 chksum; | 77 | __le32 chksum; |
78 | } __attribute__((packed)); | 78 | } __packed; |
79 | 79 | ||
80 | /* Some flags for the isl hardware registers controlling DMA inside the | 80 | /* Some flags for the isl hardware registers controlling DMA inside the |
81 | * chip */ | 81 | * chip */ |
@@ -103,7 +103,7 @@ struct x2_header { | |||
103 | __le32 fw_load_addr; | 103 | __le32 fw_load_addr; |
104 | __le32 fw_length; | 104 | __le32 fw_length; |
105 | __le32 crc; | 105 | __le32 crc; |
106 | } __attribute__((packed)); | 106 | } __packed; |
107 | 107 | ||
108 | /* pipes 3 and 4 are not used by the driver */ | 108 | /* pipes 3 and 4 are not used by the driver */ |
109 | #define P54U_PIPE_NUMBER 9 | 109 | #define P54U_PIPE_NUMBER 9 |
diff --git a/drivers/net/wireless/prism54/isl_ioctl.c b/drivers/net/wireless/prism54/isl_ioctl.c index 8d1190c0f062..912fdc022d08 100644 --- a/drivers/net/wireless/prism54/isl_ioctl.c +++ b/drivers/net/wireless/prism54/isl_ioctl.c | |||
@@ -2101,7 +2101,7 @@ struct ieee80211_beacon_phdr { | |||
2101 | u8 timestamp[8]; | 2101 | u8 timestamp[8]; |
2102 | u16 beacon_int; | 2102 | u16 beacon_int; |
2103 | u16 capab_info; | 2103 | u16 capab_info; |
2104 | } __attribute__ ((packed)); | 2104 | } __packed; |
2105 | 2105 | ||
2106 | #define WLAN_EID_GENERIC 0xdd | 2106 | #define WLAN_EID_GENERIC 0xdd |
2107 | static u8 wpa_oid[4] = { 0x00, 0x50, 0xf2, 1 }; | 2107 | static u8 wpa_oid[4] = { 0x00, 0x50, 0xf2, 1 }; |
@@ -2751,14 +2751,9 @@ prism54_hostapd(struct net_device *ndev, struct iw_point *p) | |||
2751 | p->length > PRISM2_HOSTAPD_MAX_BUF_SIZE || !p->pointer) | 2751 | p->length > PRISM2_HOSTAPD_MAX_BUF_SIZE || !p->pointer) |
2752 | return -EINVAL; | 2752 | return -EINVAL; |
2753 | 2753 | ||
2754 | param = kmalloc(p->length, GFP_KERNEL); | 2754 | param = memdup_user(p->pointer, p->length); |
2755 | if (param == NULL) | 2755 | if (IS_ERR(param)) |
2756 | return -ENOMEM; | 2756 | return PTR_ERR(param); |
2757 | |||
2758 | if (copy_from_user(param, p->pointer, p->length)) { | ||
2759 | kfree(param); | ||
2760 | return -EFAULT; | ||
2761 | } | ||
2762 | 2757 | ||
2763 | switch (param->cmd) { | 2758 | switch (param->cmd) { |
2764 | case PRISM2_SET_ENCRYPTION: | 2759 | case PRISM2_SET_ENCRYPTION: |
diff --git a/drivers/net/wireless/prism54/isl_oid.h b/drivers/net/wireless/prism54/isl_oid.h index b7534c2869c8..59e31258d450 100644 --- a/drivers/net/wireless/prism54/isl_oid.h +++ b/drivers/net/wireless/prism54/isl_oid.h | |||
@@ -29,20 +29,20 @@ | |||
29 | struct obj_ssid { | 29 | struct obj_ssid { |
30 | u8 length; | 30 | u8 length; |
31 | char octets[33]; | 31 | char octets[33]; |
32 | } __attribute__ ((packed)); | 32 | } __packed; |
33 | 33 | ||
34 | struct obj_key { | 34 | struct obj_key { |
35 | u8 type; /* dot11_priv_t */ | 35 | u8 type; /* dot11_priv_t */ |
36 | u8 length; | 36 | u8 length; |
37 | char key[32]; | 37 | char key[32]; |
38 | } __attribute__ ((packed)); | 38 | } __packed; |
39 | 39 | ||
40 | struct obj_mlme { | 40 | struct obj_mlme { |
41 | u8 address[6]; | 41 | u8 address[6]; |
42 | u16 id; | 42 | u16 id; |
43 | u16 state; | 43 | u16 state; |
44 | u16 code; | 44 | u16 code; |
45 | } __attribute__ ((packed)); | 45 | } __packed; |
46 | 46 | ||
47 | struct obj_mlmeex { | 47 | struct obj_mlmeex { |
48 | u8 address[6]; | 48 | u8 address[6]; |
@@ -51,12 +51,12 @@ struct obj_mlmeex { | |||
51 | u16 code; | 51 | u16 code; |
52 | u16 size; | 52 | u16 size; |
53 | u8 data[0]; | 53 | u8 data[0]; |
54 | } __attribute__ ((packed)); | 54 | } __packed; |
55 | 55 | ||
56 | struct obj_buffer { | 56 | struct obj_buffer { |
57 | u32 size; | 57 | u32 size; |
58 | u32 addr; /* 32bit bus address */ | 58 | u32 addr; /* 32bit bus address */ |
59 | } __attribute__ ((packed)); | 59 | } __packed; |
60 | 60 | ||
61 | struct obj_bss { | 61 | struct obj_bss { |
62 | u8 address[6]; | 62 | u8 address[6]; |
@@ -77,17 +77,17 @@ struct obj_bss { | |||
77 | short rates; | 77 | short rates; |
78 | short basic_rates; | 78 | short basic_rates; |
79 | int:16; /* padding */ | 79 | int:16; /* padding */ |
80 | } __attribute__ ((packed)); | 80 | } __packed; |
81 | 81 | ||
82 | struct obj_bsslist { | 82 | struct obj_bsslist { |
83 | u32 nr; | 83 | u32 nr; |
84 | struct obj_bss bsslist[0]; | 84 | struct obj_bss bsslist[0]; |
85 | } __attribute__ ((packed)); | 85 | } __packed; |
86 | 86 | ||
87 | struct obj_frequencies { | 87 | struct obj_frequencies { |
88 | u16 nr; | 88 | u16 nr; |
89 | u16 mhz[0]; | 89 | u16 mhz[0]; |
90 | } __attribute__ ((packed)); | 90 | } __packed; |
91 | 91 | ||
92 | struct obj_attachment { | 92 | struct obj_attachment { |
93 | char type; | 93 | char type; |
@@ -95,7 +95,7 @@ struct obj_attachment { | |||
95 | short id; | 95 | short id; |
96 | short size; | 96 | short size; |
97 | char data[0]; | 97 | char data[0]; |
98 | } __attribute__((packed)); | 98 | } __packed; |
99 | 99 | ||
100 | /* | 100 | /* |
101 | * in case everything's ok, the inlined function below will be | 101 | * in case everything's ok, the inlined function below will be |
diff --git a/drivers/net/wireless/prism54/islpci_eth.h b/drivers/net/wireless/prism54/islpci_eth.h index 54f9a4b7bf9b..6ca30a5b7bfb 100644 --- a/drivers/net/wireless/prism54/islpci_eth.h +++ b/drivers/net/wireless/prism54/islpci_eth.h | |||
@@ -34,13 +34,13 @@ struct rfmon_header { | |||
34 | __le16 unk3; | 34 | __le16 unk3; |
35 | u8 rssi; | 35 | u8 rssi; |
36 | u8 padding[3]; | 36 | u8 padding[3]; |
37 | } __attribute__ ((packed)); | 37 | } __packed; |
38 | 38 | ||
39 | struct rx_annex_header { | 39 | struct rx_annex_header { |
40 | u8 addr1[ETH_ALEN]; | 40 | u8 addr1[ETH_ALEN]; |
41 | u8 addr2[ETH_ALEN]; | 41 | u8 addr2[ETH_ALEN]; |
42 | struct rfmon_header rfmon; | 42 | struct rfmon_header rfmon; |
43 | } __attribute__ ((packed)); | 43 | } __packed; |
44 | 44 | ||
45 | /* wlan-ng (and hopefully others) AVS header, version one. Fields in | 45 | /* wlan-ng (and hopefully others) AVS header, version one. Fields in |
46 | * network byte order. */ | 46 | * network byte order. */ |
diff --git a/drivers/net/wireless/prism54/islpci_mgt.h b/drivers/net/wireless/prism54/islpci_mgt.h index 0b27e50fe0d5..0db93db9b675 100644 --- a/drivers/net/wireless/prism54/islpci_mgt.h +++ b/drivers/net/wireless/prism54/islpci_mgt.h | |||
@@ -101,7 +101,7 @@ typedef struct { | |||
101 | u8 device_id; | 101 | u8 device_id; |
102 | u8 flags; | 102 | u8 flags; |
103 | u32 length; | 103 | u32 length; |
104 | } __attribute__ ((packed)) | 104 | } __packed |
105 | pimfor_header_t; | 105 | pimfor_header_t; |
106 | 106 | ||
107 | /* A received and interrupt-processed management frame, either for | 107 | /* A received and interrupt-processed management frame, either for |
diff --git a/drivers/net/wireless/rndis_wlan.c b/drivers/net/wireless/rndis_wlan.c index 4bd61ee627c0..5e7f344b000d 100644 --- a/drivers/net/wireless/rndis_wlan.c +++ b/drivers/net/wireless/rndis_wlan.c | |||
@@ -238,19 +238,19 @@ struct ndis_80211_auth_request { | |||
238 | u8 bssid[6]; | 238 | u8 bssid[6]; |
239 | u8 padding[2]; | 239 | u8 padding[2]; |
240 | __le32 flags; | 240 | __le32 flags; |
241 | } __attribute__((packed)); | 241 | } __packed; |
242 | 242 | ||
243 | struct ndis_80211_pmkid_candidate { | 243 | struct ndis_80211_pmkid_candidate { |
244 | u8 bssid[6]; | 244 | u8 bssid[6]; |
245 | u8 padding[2]; | 245 | u8 padding[2]; |
246 | __le32 flags; | 246 | __le32 flags; |
247 | } __attribute__((packed)); | 247 | } __packed; |
248 | 248 | ||
249 | struct ndis_80211_pmkid_cand_list { | 249 | struct ndis_80211_pmkid_cand_list { |
250 | __le32 version; | 250 | __le32 version; |
251 | __le32 num_candidates; | 251 | __le32 num_candidates; |
252 | struct ndis_80211_pmkid_candidate candidate_list[0]; | 252 | struct ndis_80211_pmkid_candidate candidate_list[0]; |
253 | } __attribute__((packed)); | 253 | } __packed; |
254 | 254 | ||
255 | struct ndis_80211_status_indication { | 255 | struct ndis_80211_status_indication { |
256 | __le32 status_type; | 256 | __le32 status_type; |
@@ -260,19 +260,19 @@ struct ndis_80211_status_indication { | |||
260 | struct ndis_80211_auth_request auth_request[0]; | 260 | struct ndis_80211_auth_request auth_request[0]; |
261 | struct ndis_80211_pmkid_cand_list cand_list; | 261 | struct ndis_80211_pmkid_cand_list cand_list; |
262 | } u; | 262 | } u; |
263 | } __attribute__((packed)); | 263 | } __packed; |
264 | 264 | ||
265 | struct ndis_80211_ssid { | 265 | struct ndis_80211_ssid { |
266 | __le32 length; | 266 | __le32 length; |
267 | u8 essid[NDIS_802_11_LENGTH_SSID]; | 267 | u8 essid[NDIS_802_11_LENGTH_SSID]; |
268 | } __attribute__((packed)); | 268 | } __packed; |
269 | 269 | ||
270 | struct ndis_80211_conf_freq_hop { | 270 | struct ndis_80211_conf_freq_hop { |
271 | __le32 length; | 271 | __le32 length; |
272 | __le32 hop_pattern; | 272 | __le32 hop_pattern; |
273 | __le32 hop_set; | 273 | __le32 hop_set; |
274 | __le32 dwell_time; | 274 | __le32 dwell_time; |
275 | } __attribute__((packed)); | 275 | } __packed; |
276 | 276 | ||
277 | struct ndis_80211_conf { | 277 | struct ndis_80211_conf { |
278 | __le32 length; | 278 | __le32 length; |
@@ -280,7 +280,7 @@ struct ndis_80211_conf { | |||
280 | __le32 atim_window; | 280 | __le32 atim_window; |
281 | __le32 ds_config; | 281 | __le32 ds_config; |
282 | struct ndis_80211_conf_freq_hop fh_config; | 282 | struct ndis_80211_conf_freq_hop fh_config; |
283 | } __attribute__((packed)); | 283 | } __packed; |
284 | 284 | ||
285 | struct ndis_80211_bssid_ex { | 285 | struct ndis_80211_bssid_ex { |
286 | __le32 length; | 286 | __le32 length; |
@@ -295,25 +295,25 @@ struct ndis_80211_bssid_ex { | |||
295 | u8 rates[NDIS_802_11_LENGTH_RATES_EX]; | 295 | u8 rates[NDIS_802_11_LENGTH_RATES_EX]; |
296 | __le32 ie_length; | 296 | __le32 ie_length; |
297 | u8 ies[0]; | 297 | u8 ies[0]; |
298 | } __attribute__((packed)); | 298 | } __packed; |
299 | 299 | ||
300 | struct ndis_80211_bssid_list_ex { | 300 | struct ndis_80211_bssid_list_ex { |
301 | __le32 num_items; | 301 | __le32 num_items; |
302 | struct ndis_80211_bssid_ex bssid[0]; | 302 | struct ndis_80211_bssid_ex bssid[0]; |
303 | } __attribute__((packed)); | 303 | } __packed; |
304 | 304 | ||
305 | struct ndis_80211_fixed_ies { | 305 | struct ndis_80211_fixed_ies { |
306 | u8 timestamp[8]; | 306 | u8 timestamp[8]; |
307 | __le16 beacon_interval; | 307 | __le16 beacon_interval; |
308 | __le16 capabilities; | 308 | __le16 capabilities; |
309 | } __attribute__((packed)); | 309 | } __packed; |
310 | 310 | ||
311 | struct ndis_80211_wep_key { | 311 | struct ndis_80211_wep_key { |
312 | __le32 size; | 312 | __le32 size; |
313 | __le32 index; | 313 | __le32 index; |
314 | __le32 length; | 314 | __le32 length; |
315 | u8 material[32]; | 315 | u8 material[32]; |
316 | } __attribute__((packed)); | 316 | } __packed; |
317 | 317 | ||
318 | struct ndis_80211_key { | 318 | struct ndis_80211_key { |
319 | __le32 size; | 319 | __le32 size; |
@@ -323,14 +323,14 @@ struct ndis_80211_key { | |||
323 | u8 padding[6]; | 323 | u8 padding[6]; |
324 | u8 rsc[8]; | 324 | u8 rsc[8]; |
325 | u8 material[32]; | 325 | u8 material[32]; |
326 | } __attribute__((packed)); | 326 | } __packed; |
327 | 327 | ||
328 | struct ndis_80211_remove_key { | 328 | struct ndis_80211_remove_key { |
329 | __le32 size; | 329 | __le32 size; |
330 | __le32 index; | 330 | __le32 index; |
331 | u8 bssid[6]; | 331 | u8 bssid[6]; |
332 | u8 padding[2]; | 332 | u8 padding[2]; |
333 | } __attribute__((packed)); | 333 | } __packed; |
334 | 334 | ||
335 | struct ndis_config_param { | 335 | struct ndis_config_param { |
336 | __le32 name_offs; | 336 | __le32 name_offs; |
@@ -338,7 +338,7 @@ struct ndis_config_param { | |||
338 | __le32 type; | 338 | __le32 type; |
339 | __le32 value_offs; | 339 | __le32 value_offs; |
340 | __le32 value_length; | 340 | __le32 value_length; |
341 | } __attribute__((packed)); | 341 | } __packed; |
342 | 342 | ||
343 | struct ndis_80211_assoc_info { | 343 | struct ndis_80211_assoc_info { |
344 | __le32 length; | 344 | __le32 length; |
@@ -358,12 +358,12 @@ struct ndis_80211_assoc_info { | |||
358 | } resp_ie; | 358 | } resp_ie; |
359 | __le32 resp_ie_length; | 359 | __le32 resp_ie_length; |
360 | __le32 offset_resp_ies; | 360 | __le32 offset_resp_ies; |
361 | } __attribute__((packed)); | 361 | } __packed; |
362 | 362 | ||
363 | struct ndis_80211_auth_encr_pair { | 363 | struct ndis_80211_auth_encr_pair { |
364 | __le32 auth_mode; | 364 | __le32 auth_mode; |
365 | __le32 encr_mode; | 365 | __le32 encr_mode; |
366 | } __attribute__((packed)); | 366 | } __packed; |
367 | 367 | ||
368 | struct ndis_80211_capability { | 368 | struct ndis_80211_capability { |
369 | __le32 length; | 369 | __le32 length; |
@@ -371,7 +371,7 @@ struct ndis_80211_capability { | |||
371 | __le32 num_pmkids; | 371 | __le32 num_pmkids; |
372 | __le32 num_auth_encr_pair; | 372 | __le32 num_auth_encr_pair; |
373 | struct ndis_80211_auth_encr_pair auth_encr_pair[0]; | 373 | struct ndis_80211_auth_encr_pair auth_encr_pair[0]; |
374 | } __attribute__((packed)); | 374 | } __packed; |
375 | 375 | ||
376 | struct ndis_80211_bssid_info { | 376 | struct ndis_80211_bssid_info { |
377 | u8 bssid[6]; | 377 | u8 bssid[6]; |
@@ -2495,8 +2495,7 @@ static int rndis_flush_pmksa(struct wiphy *wiphy, struct net_device *netdev) | |||
2495 | static void rndis_wlan_do_link_up_work(struct usbnet *usbdev) | 2495 | static void rndis_wlan_do_link_up_work(struct usbnet *usbdev) |
2496 | { | 2496 | { |
2497 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); | 2497 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); |
2498 | struct ndis_80211_assoc_info *info; | 2498 | struct ndis_80211_assoc_info *info = NULL; |
2499 | u8 assoc_buf[sizeof(*info) + IW_CUSTOM_MAX + 32]; | ||
2500 | u8 bssid[ETH_ALEN]; | 2499 | u8 bssid[ETH_ALEN]; |
2501 | int resp_ie_len, req_ie_len; | 2500 | int resp_ie_len, req_ie_len; |
2502 | u8 *req_ie, *resp_ie; | 2501 | u8 *req_ie, *resp_ie; |
@@ -2515,23 +2514,43 @@ static void rndis_wlan_do_link_up_work(struct usbnet *usbdev) | |||
2515 | resp_ie = NULL; | 2514 | resp_ie = NULL; |
2516 | 2515 | ||
2517 | if (priv->infra_mode == NDIS_80211_INFRA_INFRA) { | 2516 | if (priv->infra_mode == NDIS_80211_INFRA_INFRA) { |
2518 | memset(assoc_buf, 0, sizeof(assoc_buf)); | 2517 | info = kzalloc(CONTROL_BUFFER_SIZE, GFP_KERNEL); |
2519 | info = (void *)assoc_buf; | 2518 | if (!info) { |
2519 | /* No memory? Try resume work later */ | ||
2520 | set_bit(WORK_LINK_UP, &priv->work_pending); | ||
2521 | queue_work(priv->workqueue, &priv->work); | ||
2522 | return; | ||
2523 | } | ||
2520 | 2524 | ||
2521 | /* Get association info IEs from device and send them back to | 2525 | /* Get association info IEs from device. */ |
2522 | * userspace. */ | 2526 | ret = get_association_info(usbdev, info, CONTROL_BUFFER_SIZE); |
2523 | ret = get_association_info(usbdev, info, sizeof(assoc_buf)); | ||
2524 | if (!ret) { | 2527 | if (!ret) { |
2525 | req_ie_len = le32_to_cpu(info->req_ie_length); | 2528 | req_ie_len = le32_to_cpu(info->req_ie_length); |
2526 | if (req_ie_len > 0) { | 2529 | if (req_ie_len > 0) { |
2527 | offset = le32_to_cpu(info->offset_req_ies); | 2530 | offset = le32_to_cpu(info->offset_req_ies); |
2531 | |||
2532 | if (offset > CONTROL_BUFFER_SIZE) | ||
2533 | offset = CONTROL_BUFFER_SIZE; | ||
2534 | |||
2528 | req_ie = (u8 *)info + offset; | 2535 | req_ie = (u8 *)info + offset; |
2536 | |||
2537 | if (offset + req_ie_len > CONTROL_BUFFER_SIZE) | ||
2538 | req_ie_len = | ||
2539 | CONTROL_BUFFER_SIZE - offset; | ||
2529 | } | 2540 | } |
2530 | 2541 | ||
2531 | resp_ie_len = le32_to_cpu(info->resp_ie_length); | 2542 | resp_ie_len = le32_to_cpu(info->resp_ie_length); |
2532 | if (resp_ie_len > 0) { | 2543 | if (resp_ie_len > 0) { |
2533 | offset = le32_to_cpu(info->offset_resp_ies); | 2544 | offset = le32_to_cpu(info->offset_resp_ies); |
2545 | |||
2546 | if (offset > CONTROL_BUFFER_SIZE) | ||
2547 | offset = CONTROL_BUFFER_SIZE; | ||
2548 | |||
2534 | resp_ie = (u8 *)info + offset; | 2549 | resp_ie = (u8 *)info + offset; |
2550 | |||
2551 | if (offset + resp_ie_len > CONTROL_BUFFER_SIZE) | ||
2552 | resp_ie_len = | ||
2553 | CONTROL_BUFFER_SIZE - offset; | ||
2535 | } | 2554 | } |
2536 | } | 2555 | } |
2537 | } else if (WARN_ON(priv->infra_mode != NDIS_80211_INFRA_ADHOC)) | 2556 | } else if (WARN_ON(priv->infra_mode != NDIS_80211_INFRA_ADHOC)) |
@@ -2563,6 +2582,9 @@ static void rndis_wlan_do_link_up_work(struct usbnet *usbdev) | |||
2563 | } else if (priv->infra_mode == NDIS_80211_INFRA_ADHOC) | 2582 | } else if (priv->infra_mode == NDIS_80211_INFRA_ADHOC) |
2564 | cfg80211_ibss_joined(usbdev->net, bssid, GFP_KERNEL); | 2583 | cfg80211_ibss_joined(usbdev->net, bssid, GFP_KERNEL); |
2565 | 2584 | ||
2585 | if (info != NULL) | ||
2586 | kfree(info); | ||
2587 | |||
2566 | priv->connected = true; | 2588 | priv->connected = true; |
2567 | memcpy(priv->bssid, bssid, ETH_ALEN); | 2589 | memcpy(priv->bssid, bssid, ETH_ALEN); |
2568 | 2590 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c index ad2c98af7e9d..1eb882e15fb4 100644 --- a/drivers/net/wireless/rt2x00/rt2400pci.c +++ b/drivers/net/wireless/rt2x00/rt2400pci.c | |||
@@ -1076,9 +1076,6 @@ static void rt2400pci_write_beacon(struct queue_entry *entry, | |||
1076 | struct txentry_desc *txdesc) | 1076 | struct txentry_desc *txdesc) |
1077 | { | 1077 | { |
1078 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | 1078 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
1079 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; | ||
1080 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
1081 | u32 word; | ||
1082 | u32 reg; | 1079 | u32 reg; |
1083 | 1080 | ||
1084 | /* | 1081 | /* |
@@ -1091,9 +1088,15 @@ static void rt2400pci_write_beacon(struct queue_entry *entry, | |||
1091 | 1088 | ||
1092 | rt2x00queue_map_txskb(rt2x00dev, entry->skb); | 1089 | rt2x00queue_map_txskb(rt2x00dev, entry->skb); |
1093 | 1090 | ||
1094 | rt2x00_desc_read(entry_priv->desc, 1, &word); | 1091 | /* |
1095 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma); | 1092 | * Write the TX descriptor for the beacon. |
1096 | rt2x00_desc_write(entry_priv->desc, 1, word); | 1093 | */ |
1094 | rt2400pci_write_tx_desc(rt2x00dev, entry->skb, txdesc); | ||
1095 | |||
1096 | /* | ||
1097 | * Dump beacon to userspace through debugfs. | ||
1098 | */ | ||
1099 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb); | ||
1097 | 1100 | ||
1098 | /* | 1101 | /* |
1099 | * Enable beaconing again. | 1102 | * Enable beaconing again. |
@@ -1226,7 +1229,7 @@ static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev, | |||
1226 | } | 1229 | } |
1227 | txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); | 1230 | txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); |
1228 | 1231 | ||
1229 | rt2x00lib_txdone(entry, &txdesc); | 1232 | rt2x00pci_txdone(entry, &txdesc); |
1230 | } | 1233 | } |
1231 | } | 1234 | } |
1232 | 1235 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c index 41da3d218c65..a29cb212f89a 100644 --- a/drivers/net/wireless/rt2x00/rt2500pci.c +++ b/drivers/net/wireless/rt2x00/rt2500pci.c | |||
@@ -1233,9 +1233,6 @@ static void rt2500pci_write_beacon(struct queue_entry *entry, | |||
1233 | struct txentry_desc *txdesc) | 1233 | struct txentry_desc *txdesc) |
1234 | { | 1234 | { |
1235 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | 1235 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
1236 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; | ||
1237 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
1238 | u32 word; | ||
1239 | u32 reg; | 1236 | u32 reg; |
1240 | 1237 | ||
1241 | /* | 1238 | /* |
@@ -1248,9 +1245,15 @@ static void rt2500pci_write_beacon(struct queue_entry *entry, | |||
1248 | 1245 | ||
1249 | rt2x00queue_map_txskb(rt2x00dev, entry->skb); | 1246 | rt2x00queue_map_txskb(rt2x00dev, entry->skb); |
1250 | 1247 | ||
1251 | rt2x00_desc_read(entry_priv->desc, 1, &word); | 1248 | /* |
1252 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma); | 1249 | * Write the TX descriptor for the beacon. |
1253 | rt2x00_desc_write(entry_priv->desc, 1, word); | 1250 | */ |
1251 | rt2500pci_write_tx_desc(rt2x00dev, entry->skb, txdesc); | ||
1252 | |||
1253 | /* | ||
1254 | * Dump beacon to userspace through debugfs. | ||
1255 | */ | ||
1256 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb); | ||
1254 | 1257 | ||
1255 | /* | 1258 | /* |
1256 | * Enable beaconing again. | 1259 | * Enable beaconing again. |
@@ -1362,7 +1365,7 @@ static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev, | |||
1362 | } | 1365 | } |
1363 | txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); | 1366 | txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); |
1364 | 1367 | ||
1365 | rt2x00lib_txdone(entry, &txdesc); | 1368 | rt2x00pci_txdone(entry, &txdesc); |
1366 | } | 1369 | } |
1367 | } | 1370 | } |
1368 | 1371 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c index 9ae96a626e6d..002db646ae0b 100644 --- a/drivers/net/wireless/rt2x00/rt2500usb.c +++ b/drivers/net/wireless/rt2x00/rt2500usb.c | |||
@@ -345,7 +345,6 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev, | |||
345 | struct rt2x00lib_crypto *crypto, | 345 | struct rt2x00lib_crypto *crypto, |
346 | struct ieee80211_key_conf *key) | 346 | struct ieee80211_key_conf *key) |
347 | { | 347 | { |
348 | int timeout; | ||
349 | u32 mask; | 348 | u32 mask; |
350 | u16 reg; | 349 | u16 reg; |
351 | 350 | ||
@@ -367,18 +366,8 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev, | |||
367 | 366 | ||
368 | key->hw_key_idx += reg ? ffz(reg) : 0; | 367 | key->hw_key_idx += reg ? ffz(reg) : 0; |
369 | 368 | ||
370 | /* | 369 | rt2500usb_register_multiwrite(rt2x00dev, reg, |
371 | * The encryption key doesn't fit within the CSR cache, | 370 | crypto->key, sizeof(crypto->key)); |
372 | * this means we should allocate it separately and use | ||
373 | * rt2x00usb_vendor_request() to send the key to the hardware. | ||
374 | */ | ||
375 | reg = KEY_ENTRY(key->hw_key_idx); | ||
376 | timeout = REGISTER_TIMEOUT32(sizeof(crypto->key)); | ||
377 | rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE, | ||
378 | USB_VENDOR_REQUEST_OUT, reg, | ||
379 | crypto->key, | ||
380 | sizeof(crypto->key), | ||
381 | timeout); | ||
382 | 371 | ||
383 | /* | 372 | /* |
384 | * The driver does not support the IV/EIV generation | 373 | * The driver does not support the IV/EIV generation |
@@ -1034,7 +1023,7 @@ static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1034 | struct txentry_desc *txdesc) | 1023 | struct txentry_desc *txdesc) |
1035 | { | 1024 | { |
1036 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | 1025 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1037 | __le32 *txd = (__le32 *)(skb->data - TXD_DESC_SIZE); | 1026 | __le32 *txd = (__le32 *) skb->data; |
1038 | u32 word; | 1027 | u32 word; |
1039 | 1028 | ||
1040 | /* | 1029 | /* |
@@ -1080,6 +1069,7 @@ static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1080 | /* | 1069 | /* |
1081 | * Register descriptor details in skb frame descriptor. | 1070 | * Register descriptor details in skb frame descriptor. |
1082 | */ | 1071 | */ |
1072 | skbdesc->flags |= SKBDESC_DESC_IN_SKB; | ||
1083 | skbdesc->desc = txd; | 1073 | skbdesc->desc = txd; |
1084 | skbdesc->desc_len = TXD_DESC_SIZE; | 1074 | skbdesc->desc_len = TXD_DESC_SIZE; |
1085 | } | 1075 | } |
@@ -1108,9 +1098,20 @@ static void rt2500usb_write_beacon(struct queue_entry *entry, | |||
1108 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | 1098 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
1109 | 1099 | ||
1110 | /* | 1100 | /* |
1111 | * Take the descriptor in front of the skb into account. | 1101 | * Add space for the descriptor in front of the skb. |
1112 | */ | 1102 | */ |
1113 | skb_push(entry->skb, TXD_DESC_SIZE); | 1103 | skb_push(entry->skb, TXD_DESC_SIZE); |
1104 | memset(entry->skb->data, 0, TXD_DESC_SIZE); | ||
1105 | |||
1106 | /* | ||
1107 | * Write the TX descriptor for the beacon. | ||
1108 | */ | ||
1109 | rt2500usb_write_tx_desc(rt2x00dev, entry->skb, txdesc); | ||
1110 | |||
1111 | /* | ||
1112 | * Dump beacon to userspace through debugfs. | ||
1113 | */ | ||
1114 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb); | ||
1114 | 1115 | ||
1115 | /* | 1116 | /* |
1116 | * USB devices cannot blindly pass the skb->len as the | 1117 | * USB devices cannot blindly pass the skb->len as the |
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h index 2aa03751c341..317b7807175e 100644 --- a/drivers/net/wireless/rt2x00/rt2800.h +++ b/drivers/net/wireless/rt2x00/rt2800.h | |||
@@ -63,7 +63,6 @@ | |||
63 | */ | 63 | */ |
64 | #define REV_RT2860C 0x0100 | 64 | #define REV_RT2860C 0x0100 |
65 | #define REV_RT2860D 0x0101 | 65 | #define REV_RT2860D 0x0101 |
66 | #define REV_RT2870D 0x0101 | ||
67 | #define REV_RT2872E 0x0200 | 66 | #define REV_RT2872E 0x0200 |
68 | #define REV_RT3070E 0x0200 | 67 | #define REV_RT3070E 0x0200 |
69 | #define REV_RT3070F 0x0201 | 68 | #define REV_RT3070F 0x0201 |
@@ -99,6 +98,21 @@ | |||
99 | */ | 98 | */ |
100 | 99 | ||
101 | /* | 100 | /* |
101 | * E2PROM_CSR: PCI EEPROM control register. | ||
102 | * RELOAD: Write 1 to reload eeprom content. | ||
103 | * TYPE: 0: 93c46, 1:93c66. | ||
104 | * LOAD_STATUS: 1:loading, 0:done. | ||
105 | */ | ||
106 | #define E2PROM_CSR 0x0004 | ||
107 | #define E2PROM_CSR_DATA_CLOCK FIELD32(0x00000001) | ||
108 | #define E2PROM_CSR_CHIP_SELECT FIELD32(0x00000002) | ||
109 | #define E2PROM_CSR_DATA_IN FIELD32(0x00000004) | ||
110 | #define E2PROM_CSR_DATA_OUT FIELD32(0x00000008) | ||
111 | #define E2PROM_CSR_TYPE FIELD32(0x00000030) | ||
112 | #define E2PROM_CSR_LOAD_STATUS FIELD32(0x00000040) | ||
113 | #define E2PROM_CSR_RELOAD FIELD32(0x00000080) | ||
114 | |||
115 | /* | ||
102 | * OPT_14: Unknown register used by rt3xxx devices. | 116 | * OPT_14: Unknown register used by rt3xxx devices. |
103 | */ | 117 | */ |
104 | #define OPT_14_CSR 0x0114 | 118 | #define OPT_14_CSR 0x0114 |
@@ -322,6 +336,39 @@ | |||
322 | #define RX_DRX_IDX 0x029c | 336 | #define RX_DRX_IDX 0x029c |
323 | 337 | ||
324 | /* | 338 | /* |
339 | * USB_DMA_CFG | ||
340 | * RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns. | ||
341 | * RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes. | ||
342 | * PHY_CLEAR: phy watch dog enable. | ||
343 | * TX_CLEAR: Clear USB DMA TX path. | ||
344 | * TXOP_HALT: Halt TXOP count down when TX buffer is full. | ||
345 | * RX_BULK_AGG_EN: Enable Rx Bulk Aggregation. | ||
346 | * RX_BULK_EN: Enable USB DMA Rx. | ||
347 | * TX_BULK_EN: Enable USB DMA Tx. | ||
348 | * EP_OUT_VALID: OUT endpoint data valid. | ||
349 | * RX_BUSY: USB DMA RX FSM busy. | ||
350 | * TX_BUSY: USB DMA TX FSM busy. | ||
351 | */ | ||
352 | #define USB_DMA_CFG 0x02a0 | ||
353 | #define USB_DMA_CFG_RX_BULK_AGG_TIMEOUT FIELD32(0x000000ff) | ||
354 | #define USB_DMA_CFG_RX_BULK_AGG_LIMIT FIELD32(0x0000ff00) | ||
355 | #define USB_DMA_CFG_PHY_CLEAR FIELD32(0x00010000) | ||
356 | #define USB_DMA_CFG_TX_CLEAR FIELD32(0x00080000) | ||
357 | #define USB_DMA_CFG_TXOP_HALT FIELD32(0x00100000) | ||
358 | #define USB_DMA_CFG_RX_BULK_AGG_EN FIELD32(0x00200000) | ||
359 | #define USB_DMA_CFG_RX_BULK_EN FIELD32(0x00400000) | ||
360 | #define USB_DMA_CFG_TX_BULK_EN FIELD32(0x00800000) | ||
361 | #define USB_DMA_CFG_EP_OUT_VALID FIELD32(0x3f000000) | ||
362 | #define USB_DMA_CFG_RX_BUSY FIELD32(0x40000000) | ||
363 | #define USB_DMA_CFG_TX_BUSY FIELD32(0x80000000) | ||
364 | |||
365 | /* | ||
366 | * US_CYC_CNT | ||
367 | */ | ||
368 | #define US_CYC_CNT 0x02a4 | ||
369 | #define US_CYC_CNT_CLOCK_CYCLE FIELD32(0x000000ff) | ||
370 | |||
371 | /* | ||
325 | * PBF_SYS_CTRL | 372 | * PBF_SYS_CTRL |
326 | * HOST_RAM_WRITE: enable Host program ram write selection | 373 | * HOST_RAM_WRITE: enable Host program ram write selection |
327 | */ | 374 | */ |
@@ -1370,17 +1417,17 @@ | |||
1370 | struct mac_wcid_entry { | 1417 | struct mac_wcid_entry { |
1371 | u8 mac[6]; | 1418 | u8 mac[6]; |
1372 | u8 reserved[2]; | 1419 | u8 reserved[2]; |
1373 | } __attribute__ ((packed)); | 1420 | } __packed; |
1374 | 1421 | ||
1375 | struct hw_key_entry { | 1422 | struct hw_key_entry { |
1376 | u8 key[16]; | 1423 | u8 key[16]; |
1377 | u8 tx_mic[8]; | 1424 | u8 tx_mic[8]; |
1378 | u8 rx_mic[8]; | 1425 | u8 rx_mic[8]; |
1379 | } __attribute__ ((packed)); | 1426 | } __packed; |
1380 | 1427 | ||
1381 | struct mac_iveiv_entry { | 1428 | struct mac_iveiv_entry { |
1382 | u8 iv[8]; | 1429 | u8 iv[8]; |
1383 | } __attribute__ ((packed)); | 1430 | } __packed; |
1384 | 1431 | ||
1385 | /* | 1432 | /* |
1386 | * MAC_WCID_ATTRIBUTE: | 1433 | * MAC_WCID_ATTRIBUTE: |
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index db4250d1c8b3..ae20e6728b1e 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -38,12 +38,8 @@ | |||
38 | #include <linux/slab.h> | 38 | #include <linux/slab.h> |
39 | 39 | ||
40 | #include "rt2x00.h" | 40 | #include "rt2x00.h" |
41 | #if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE) | ||
42 | #include "rt2x00usb.h" | ||
43 | #endif | ||
44 | #include "rt2800lib.h" | 41 | #include "rt2800lib.h" |
45 | #include "rt2800.h" | 42 | #include "rt2800.h" |
46 | #include "rt2800usb.h" | ||
47 | 43 | ||
48 | MODULE_AUTHOR("Bartlomiej Zolnierkiewicz"); | 44 | MODULE_AUTHOR("Bartlomiej Zolnierkiewicz"); |
49 | MODULE_DESCRIPTION("rt2800 library"); | 45 | MODULE_DESCRIPTION("rt2800 library"); |
@@ -282,9 +278,8 @@ int rt2800_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev) | |||
282 | } | 278 | } |
283 | EXPORT_SYMBOL_GPL(rt2800_wait_wpdma_ready); | 279 | EXPORT_SYMBOL_GPL(rt2800_wait_wpdma_ready); |
284 | 280 | ||
285 | void rt2800_write_txwi(struct sk_buff *skb, struct txentry_desc *txdesc) | 281 | void rt2800_write_txwi(__le32 *txwi, struct txentry_desc *txdesc) |
286 | { | 282 | { |
287 | __le32 *txwi = (__le32 *)(skb->data - TXWI_DESC_SIZE); | ||
288 | u32 word; | 283 | u32 word; |
289 | 284 | ||
290 | /* | 285 | /* |
@@ -380,6 +375,67 @@ void rt2800_process_rxwi(struct sk_buff *skb, struct rxdone_entry_desc *rxdesc) | |||
380 | } | 375 | } |
381 | EXPORT_SYMBOL_GPL(rt2800_process_rxwi); | 376 | EXPORT_SYMBOL_GPL(rt2800_process_rxwi); |
382 | 377 | ||
378 | void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc) | ||
379 | { | ||
380 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | ||
381 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
382 | unsigned int beacon_base; | ||
383 | u32 reg; | ||
384 | |||
385 | /* | ||
386 | * Disable beaconing while we are reloading the beacon data, | ||
387 | * otherwise we might be sending out invalid data. | ||
388 | */ | ||
389 | rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®); | ||
390 | rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 0); | ||
391 | rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); | ||
392 | |||
393 | /* | ||
394 | * Add space for the TXWI in front of the skb. | ||
395 | */ | ||
396 | skb_push(entry->skb, TXWI_DESC_SIZE); | ||
397 | memset(entry->skb, 0, TXWI_DESC_SIZE); | ||
398 | |||
399 | /* | ||
400 | * Register descriptor details in skb frame descriptor. | ||
401 | */ | ||
402 | skbdesc->flags |= SKBDESC_DESC_IN_SKB; | ||
403 | skbdesc->desc = entry->skb->data; | ||
404 | skbdesc->desc_len = TXWI_DESC_SIZE; | ||
405 | |||
406 | /* | ||
407 | * Add the TXWI for the beacon to the skb. | ||
408 | */ | ||
409 | rt2800_write_txwi((__le32 *)entry->skb->data, txdesc); | ||
410 | |||
411 | /* | ||
412 | * Dump beacon to userspace through debugfs. | ||
413 | */ | ||
414 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb); | ||
415 | |||
416 | /* | ||
417 | * Write entire beacon with TXWI to register. | ||
418 | */ | ||
419 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); | ||
420 | rt2800_register_multiwrite(rt2x00dev, beacon_base, | ||
421 | entry->skb->data, entry->skb->len); | ||
422 | |||
423 | /* | ||
424 | * Enable beaconing again. | ||
425 | */ | ||
426 | rt2x00_set_field32(®, BCN_TIME_CFG_TSF_TICKING, 1); | ||
427 | rt2x00_set_field32(®, BCN_TIME_CFG_TBTT_ENABLE, 1); | ||
428 | rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 1); | ||
429 | rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); | ||
430 | |||
431 | /* | ||
432 | * Clean up beacon skb. | ||
433 | */ | ||
434 | dev_kfree_skb_any(entry->skb); | ||
435 | entry->skb = NULL; | ||
436 | } | ||
437 | EXPORT_SYMBOL(rt2800_write_beacon); | ||
438 | |||
383 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | 439 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
384 | const struct rt2x00debug rt2800_rt2x00debug = { | 440 | const struct rt2x00debug rt2800_rt2x00debug = { |
385 | .owner = THIS_MODULE, | 441 | .owner = THIS_MODULE, |
@@ -1212,6 +1268,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1212 | u32 reg; | 1268 | u32 reg; |
1213 | u16 eeprom; | 1269 | u16 eeprom; |
1214 | unsigned int i; | 1270 | unsigned int i; |
1271 | int ret; | ||
1215 | 1272 | ||
1216 | rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, ®); | 1273 | rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, ®); |
1217 | rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0); | 1274 | rt2x00_set_field32(®, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0); |
@@ -1221,59 +1278,9 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1221 | rt2x00_set_field32(®, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1); | 1278 | rt2x00_set_field32(®, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1); |
1222 | rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); | 1279 | rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); |
1223 | 1280 | ||
1224 | if (rt2x00_is_usb(rt2x00dev)) { | 1281 | ret = rt2800_drv_init_registers(rt2x00dev); |
1225 | /* | 1282 | if (ret) |
1226 | * Wait until BBP and RF are ready. | 1283 | return ret; |
1227 | */ | ||
1228 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | ||
1229 | rt2800_register_read(rt2x00dev, MAC_CSR0, ®); | ||
1230 | if (reg && reg != ~0) | ||
1231 | break; | ||
1232 | msleep(1); | ||
1233 | } | ||
1234 | |||
1235 | if (i == REGISTER_BUSY_COUNT) { | ||
1236 | ERROR(rt2x00dev, "Unstable hardware.\n"); | ||
1237 | return -EBUSY; | ||
1238 | } | ||
1239 | |||
1240 | rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, ®); | ||
1241 | rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, | ||
1242 | reg & ~0x00002000); | ||
1243 | } else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) { | ||
1244 | /* | ||
1245 | * Reset DMA indexes | ||
1246 | */ | ||
1247 | rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, ®); | ||
1248 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX0, 1); | ||
1249 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX1, 1); | ||
1250 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX2, 1); | ||
1251 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX3, 1); | ||
1252 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX4, 1); | ||
1253 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX5, 1); | ||
1254 | rt2x00_set_field32(®, WPDMA_RST_IDX_DRX_IDX0, 1); | ||
1255 | rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg); | ||
1256 | |||
1257 | rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f); | ||
1258 | rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00); | ||
1259 | |||
1260 | rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003); | ||
1261 | } | ||
1262 | |||
1263 | rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, ®); | ||
1264 | rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_CSR, 1); | ||
1265 | rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_BBP, 1); | ||
1266 | rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); | ||
1267 | |||
1268 | if (rt2x00_is_usb(rt2x00dev)) { | ||
1269 | rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000); | ||
1270 | #if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE) | ||
1271 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0, | ||
1272 | USB_MODE_RESET, REGISTER_TIMEOUT); | ||
1273 | #endif | ||
1274 | } | ||
1275 | |||
1276 | rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000); | ||
1277 | 1284 | ||
1278 | rt2800_register_read(rt2x00dev, BCN_OFFSET0, ®); | 1285 | rt2800_register_read(rt2x00dev, BCN_OFFSET0, ®); |
1279 | rt2x00_set_field32(®, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */ | 1286 | rt2x00_set_field32(®, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */ |
@@ -1328,7 +1335,6 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1328 | } else { | 1335 | } else { |
1329 | rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); | 1336 | rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); |
1330 | } | 1337 | } |
1331 | rt2800_register_write(rt2x00dev, TX_SW_CFG2, reg); | ||
1332 | } else if (rt2x00_rt(rt2x00dev, RT3070)) { | 1338 | } else if (rt2x00_rt(rt2x00dev, RT3070)) { |
1333 | rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); | 1339 | rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); |
1334 | 1340 | ||
@@ -1339,6 +1345,10 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1339 | rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); | 1345 | rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); |
1340 | rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); | 1346 | rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); |
1341 | } | 1347 | } |
1348 | } else if (rt2800_is_305x_soc(rt2x00dev)) { | ||
1349 | rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); | ||
1350 | rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); | ||
1351 | rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x0000001f); | ||
1342 | } else { | 1352 | } else { |
1343 | rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000); | 1353 | rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000); |
1344 | rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); | 1354 | rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); |
@@ -1560,9 +1570,9 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1560 | rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0); | 1570 | rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0); |
1561 | 1571 | ||
1562 | if (rt2x00_is_usb(rt2x00dev)) { | 1572 | if (rt2x00_is_usb(rt2x00dev)) { |
1563 | rt2800_register_read(rt2x00dev, USB_CYC_CFG, ®); | 1573 | rt2800_register_read(rt2x00dev, US_CYC_CNT, ®); |
1564 | rt2x00_set_field32(®, USB_CYC_CFG_CLOCK_CYCLE, 30); | 1574 | rt2x00_set_field32(®, US_CYC_CNT_CLOCK_CYCLE, 30); |
1565 | rt2800_register_write(rt2x00dev, USB_CYC_CFG, reg); | 1575 | rt2800_register_write(rt2x00dev, US_CYC_CNT, reg); |
1566 | } | 1576 | } |
1567 | 1577 | ||
1568 | rt2800_register_read(rt2x00dev, HT_FBK_CFG0, ®); | 1578 | rt2800_register_read(rt2x00dev, HT_FBK_CFG0, ®); |
@@ -1706,8 +1716,7 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev) | |||
1706 | rt2800_bbp_write(rt2x00dev, 82, 0x62); | 1716 | rt2800_bbp_write(rt2x00dev, 82, 0x62); |
1707 | rt2800_bbp_write(rt2x00dev, 83, 0x6a); | 1717 | rt2800_bbp_write(rt2x00dev, 83, 0x6a); |
1708 | 1718 | ||
1709 | if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D) || | 1719 | if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D)) |
1710 | rt2x00_rt_rev(rt2x00dev, RT2870, REV_RT2870D)) | ||
1711 | rt2800_bbp_write(rt2x00dev, 84, 0x19); | 1720 | rt2800_bbp_write(rt2x00dev, 84, 0x19); |
1712 | else | 1721 | else |
1713 | rt2800_bbp_write(rt2x00dev, 84, 0x99); | 1722 | rt2800_bbp_write(rt2x00dev, 84, 0x99); |
@@ -2013,8 +2022,7 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) | |||
2013 | if (rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) || | 2022 | if (rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) || |
2014 | rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) || | 2023 | rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) || |
2015 | rt2x00_rt_rev_lt(rt2x00dev, RT3390, REV_RT3390E)) { | 2024 | rt2x00_rt_rev_lt(rt2x00dev, RT3390, REV_RT3390E)) { |
2016 | rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom); | 2025 | if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) |
2017 | if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG)) | ||
2018 | rt2x00_set_field8(&rfcsr, RFCSR17_R, 1); | 2026 | rt2x00_set_field8(&rfcsr, RFCSR17_R, 1); |
2019 | } | 2027 | } |
2020 | rt2x00_eeprom_read(rt2x00dev, EEPROM_TXMIXER_GAIN_BG, &eeprom); | 2028 | rt2x00_eeprom_read(rt2x00dev, EEPROM_TXMIXER_GAIN_BG, &eeprom); |
@@ -2147,7 +2155,6 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |||
2147 | rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); | 2155 | rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); |
2148 | EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); | 2156 | EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); |
2149 | } else if (rt2x00_rt(rt2x00dev, RT2860) || | 2157 | } else if (rt2x00_rt(rt2x00dev, RT2860) || |
2150 | rt2x00_rt(rt2x00dev, RT2870) || | ||
2151 | rt2x00_rt(rt2x00dev, RT2872)) { | 2158 | rt2x00_rt(rt2x00dev, RT2872)) { |
2152 | /* | 2159 | /* |
2153 | * There is a max of 2 RX streams for RT28x0 series | 2160 | * There is a max of 2 RX streams for RT28x0 series |
@@ -2251,7 +2258,6 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
2251 | value, rt2x00_get_field32(reg, MAC_CSR0_REVISION)); | 2258 | value, rt2x00_get_field32(reg, MAC_CSR0_REVISION)); |
2252 | 2259 | ||
2253 | if (!rt2x00_rt(rt2x00dev, RT2860) && | 2260 | if (!rt2x00_rt(rt2x00dev, RT2860) && |
2254 | !rt2x00_rt(rt2x00dev, RT2870) && | ||
2255 | !rt2x00_rt(rt2x00dev, RT2872) && | 2261 | !rt2x00_rt(rt2x00dev, RT2872) && |
2256 | !rt2x00_rt(rt2x00dev, RT2883) && | 2262 | !rt2x00_rt(rt2x00dev, RT2883) && |
2257 | !rt2x00_rt(rt2x00dev, RT3070) && | 2263 | !rt2x00_rt(rt2x00dev, RT3070) && |
@@ -2528,16 +2534,16 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
2528 | else | 2534 | else |
2529 | spec->ht.ht_supported = false; | 2535 | spec->ht.ht_supported = false; |
2530 | 2536 | ||
2531 | /* | ||
2532 | * Don't set IEEE80211_HT_CAP_SUP_WIDTH_20_40 for now as it causes | ||
2533 | * reception problems with HT40 capable 11n APs | ||
2534 | */ | ||
2535 | spec->ht.cap = | 2537 | spec->ht.cap = |
2538 | IEEE80211_HT_CAP_SUP_WIDTH_20_40 | | ||
2536 | IEEE80211_HT_CAP_GRN_FLD | | 2539 | IEEE80211_HT_CAP_GRN_FLD | |
2537 | IEEE80211_HT_CAP_SGI_20 | | 2540 | IEEE80211_HT_CAP_SGI_20 | |
2538 | IEEE80211_HT_CAP_SGI_40 | | 2541 | IEEE80211_HT_CAP_SGI_40 | |
2539 | IEEE80211_HT_CAP_TX_STBC | | ||
2540 | IEEE80211_HT_CAP_RX_STBC; | 2542 | IEEE80211_HT_CAP_RX_STBC; |
2543 | |||
2544 | if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) >= 2) | ||
2545 | spec->ht.cap |= IEEE80211_HT_CAP_TX_STBC; | ||
2546 | |||
2541 | spec->ht.ampdu_factor = 3; | 2547 | spec->ht.ampdu_factor = 3; |
2542 | spec->ht.ampdu_density = 4; | 2548 | spec->ht.ampdu_density = 4; |
2543 | spec->ht.mcs.tx_params = | 2549 | spec->ht.mcs.tx_params = |
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.h b/drivers/net/wireless/rt2x00/rt2800lib.h index 94de999e2290..8313dbf441a5 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.h +++ b/drivers/net/wireless/rt2x00/rt2800lib.h | |||
@@ -40,6 +40,8 @@ struct rt2800_ops { | |||
40 | int (*regbusy_read)(struct rt2x00_dev *rt2x00dev, | 40 | int (*regbusy_read)(struct rt2x00_dev *rt2x00dev, |
41 | const unsigned int offset, | 41 | const unsigned int offset, |
42 | const struct rt2x00_field32 field, u32 *reg); | 42 | const struct rt2x00_field32 field, u32 *reg); |
43 | |||
44 | int (*drv_init_registers)(struct rt2x00_dev *rt2x00dev); | ||
43 | }; | 45 | }; |
44 | 46 | ||
45 | static inline void rt2800_register_read(struct rt2x00_dev *rt2x00dev, | 47 | static inline void rt2800_register_read(struct rt2x00_dev *rt2x00dev, |
@@ -107,13 +109,22 @@ static inline int rt2800_regbusy_read(struct rt2x00_dev *rt2x00dev, | |||
107 | return rt2800ops->regbusy_read(rt2x00dev, offset, field, reg); | 109 | return rt2800ops->regbusy_read(rt2x00dev, offset, field, reg); |
108 | } | 110 | } |
109 | 111 | ||
112 | static inline int rt2800_drv_init_registers(struct rt2x00_dev *rt2x00dev) | ||
113 | { | ||
114 | const struct rt2800_ops *rt2800ops = rt2x00dev->priv; | ||
115 | |||
116 | return rt2800ops->drv_init_registers(rt2x00dev); | ||
117 | } | ||
118 | |||
110 | void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev, | 119 | void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev, |
111 | const u8 command, const u8 token, | 120 | const u8 command, const u8 token, |
112 | const u8 arg0, const u8 arg1); | 121 | const u8 arg0, const u8 arg1); |
113 | 122 | ||
114 | void rt2800_write_txwi(struct sk_buff *skb, struct txentry_desc *txdesc); | 123 | void rt2800_write_txwi(__le32 *txwi, struct txentry_desc *txdesc); |
115 | void rt2800_process_rxwi(struct sk_buff *skb, struct rxdone_entry_desc *txdesc); | 124 | void rt2800_process_rxwi(struct sk_buff *skb, struct rxdone_entry_desc *txdesc); |
116 | 125 | ||
126 | void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc); | ||
127 | |||
117 | extern const struct rt2x00debug rt2800_rt2x00debug; | 128 | extern const struct rt2x00debug rt2800_rt2x00debug; |
118 | 129 | ||
119 | int rt2800_rfkill_poll(struct rt2x00_dev *rt2x00dev); | 130 | int rt2800_rfkill_poll(struct rt2x00_dev *rt2x00dev); |
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c index b2f23272c3aa..b5a871eb8881 100644 --- a/drivers/net/wireless/rt2x00/rt2800pci.c +++ b/drivers/net/wireless/rt2x00/rt2800pci.c | |||
@@ -446,6 +446,38 @@ static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev, | |||
446 | rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg); | 446 | rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg); |
447 | } | 447 | } |
448 | 448 | ||
449 | static int rt2800pci_init_registers(struct rt2x00_dev *rt2x00dev) | ||
450 | { | ||
451 | u32 reg; | ||
452 | |||
453 | /* | ||
454 | * Reset DMA indexes | ||
455 | */ | ||
456 | rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, ®); | ||
457 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX0, 1); | ||
458 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX1, 1); | ||
459 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX2, 1); | ||
460 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX3, 1); | ||
461 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX4, 1); | ||
462 | rt2x00_set_field32(®, WPDMA_RST_IDX_DTX_IDX5, 1); | ||
463 | rt2x00_set_field32(®, WPDMA_RST_IDX_DRX_IDX0, 1); | ||
464 | rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg); | ||
465 | |||
466 | rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f); | ||
467 | rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00); | ||
468 | |||
469 | rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003); | ||
470 | |||
471 | rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, ®); | ||
472 | rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_CSR, 1); | ||
473 | rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_BBP, 1); | ||
474 | rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); | ||
475 | |||
476 | rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000); | ||
477 | |||
478 | return 0; | ||
479 | } | ||
480 | |||
449 | static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev) | 481 | static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev) |
450 | { | 482 | { |
451 | u32 reg; | 483 | u32 reg; |
@@ -465,7 +497,7 @@ static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
465 | /* | 497 | /* |
466 | * Send signal to firmware during boot time. | 498 | * Send signal to firmware during boot time. |
467 | */ | 499 | */ |
468 | rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0); | 500 | rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0, 0, 0); |
469 | 501 | ||
470 | /* | 502 | /* |
471 | * Enable RX. | 503 | * Enable RX. |
@@ -613,18 +645,10 @@ static int rt2800pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
613 | /* | 645 | /* |
614 | * TX descriptor initialization | 646 | * TX descriptor initialization |
615 | */ | 647 | */ |
616 | static int rt2800pci_write_tx_data(struct queue_entry* entry, | 648 | static void rt2800pci_write_tx_datadesc(struct queue_entry* entry, |
617 | struct txentry_desc *txdesc) | 649 | struct txentry_desc *txdesc) |
618 | { | 650 | { |
619 | int ret; | 651 | rt2800_write_txwi((__le32 *) entry->skb->data, txdesc); |
620 | |||
621 | ret = rt2x00pci_write_tx_data(entry, txdesc); | ||
622 | if (ret) | ||
623 | return ret; | ||
624 | |||
625 | rt2800_write_txwi(entry->skb, txdesc); | ||
626 | |||
627 | return 0; | ||
628 | } | 652 | } |
629 | 653 | ||
630 | 654 | ||
@@ -684,49 +708,6 @@ static void rt2800pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
684 | /* | 708 | /* |
685 | * TX data initialization | 709 | * TX data initialization |
686 | */ | 710 | */ |
687 | static void rt2800pci_write_beacon(struct queue_entry *entry, | ||
688 | struct txentry_desc *txdesc) | ||
689 | { | ||
690 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | ||
691 | unsigned int beacon_base; | ||
692 | u32 reg; | ||
693 | |||
694 | /* | ||
695 | * Disable beaconing while we are reloading the beacon data, | ||
696 | * otherwise we might be sending out invalid data. | ||
697 | */ | ||
698 | rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®); | ||
699 | rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 0); | ||
700 | rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); | ||
701 | |||
702 | /* | ||
703 | * Add the TXWI for the beacon to the skb. | ||
704 | */ | ||
705 | rt2800_write_txwi(entry->skb, txdesc); | ||
706 | skb_push(entry->skb, TXWI_DESC_SIZE); | ||
707 | |||
708 | /* | ||
709 | * Write entire beacon with TXWI to register. | ||
710 | */ | ||
711 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); | ||
712 | rt2800_register_multiwrite(rt2x00dev, beacon_base, | ||
713 | entry->skb->data, entry->skb->len); | ||
714 | |||
715 | /* | ||
716 | * Enable beaconing again. | ||
717 | */ | ||
718 | rt2x00_set_field32(®, BCN_TIME_CFG_TSF_TICKING, 1); | ||
719 | rt2x00_set_field32(®, BCN_TIME_CFG_TBTT_ENABLE, 1); | ||
720 | rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 1); | ||
721 | rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); | ||
722 | |||
723 | /* | ||
724 | * Clean up beacon skb. | ||
725 | */ | ||
726 | dev_kfree_skb_any(entry->skb); | ||
727 | entry->skb = NULL; | ||
728 | } | ||
729 | |||
730 | static void rt2800pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | 711 | static void rt2800pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, |
731 | const enum data_queue_qid queue_idx) | 712 | const enum data_queue_qid queue_idx) |
732 | { | 713 | { |
@@ -880,8 +861,7 @@ static void rt2800pci_txdone(struct rt2x00_dev *rt2x00dev) | |||
880 | 861 | ||
881 | /* Check if we got a match by looking at WCID/ACK/PID | 862 | /* Check if we got a match by looking at WCID/ACK/PID |
882 | * fields */ | 863 | * fields */ |
883 | txwi = (__le32 *)(entry->skb->data - | 864 | txwi = (__le32 *) entry->skb->data; |
884 | rt2x00dev->ops->extra_tx_headroom); | ||
885 | 865 | ||
886 | rt2x00_desc_read(txwi, 1, &word); | 866 | rt2x00_desc_read(txwi, 1, &word); |
887 | tx_wcid = rt2x00_get_field32(word, TXWI_W1_WIRELESS_CLI_ID); | 867 | tx_wcid = rt2x00_get_field32(word, TXWI_W1_WIRELESS_CLI_ID); |
@@ -926,7 +906,7 @@ static void rt2800pci_txdone(struct rt2x00_dev *rt2x00dev) | |||
926 | __set_bit(TXDONE_FALLBACK, &txdesc.flags); | 906 | __set_bit(TXDONE_FALLBACK, &txdesc.flags); |
927 | 907 | ||
928 | 908 | ||
929 | rt2x00lib_txdone(entry, &txdesc); | 909 | rt2x00pci_txdone(entry, &txdesc); |
930 | } | 910 | } |
931 | } | 911 | } |
932 | 912 | ||
@@ -996,6 +976,8 @@ static const struct rt2800_ops rt2800pci_rt2800_ops = { | |||
996 | .register_multiwrite = rt2x00pci_register_multiwrite, | 976 | .register_multiwrite = rt2x00pci_register_multiwrite, |
997 | 977 | ||
998 | .regbusy_read = rt2x00pci_regbusy_read, | 978 | .regbusy_read = rt2x00pci_regbusy_read, |
979 | |||
980 | .drv_init_registers = rt2800pci_init_registers, | ||
999 | }; | 981 | }; |
1000 | 982 | ||
1001 | static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev) | 983 | static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev) |
@@ -1063,8 +1045,9 @@ static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = { | |||
1063 | .reset_tuner = rt2800_reset_tuner, | 1045 | .reset_tuner = rt2800_reset_tuner, |
1064 | .link_tuner = rt2800_link_tuner, | 1046 | .link_tuner = rt2800_link_tuner, |
1065 | .write_tx_desc = rt2800pci_write_tx_desc, | 1047 | .write_tx_desc = rt2800pci_write_tx_desc, |
1066 | .write_tx_data = rt2800pci_write_tx_data, | 1048 | .write_tx_data = rt2x00pci_write_tx_data, |
1067 | .write_beacon = rt2800pci_write_beacon, | 1049 | .write_tx_datadesc = rt2800pci_write_tx_datadesc, |
1050 | .write_beacon = rt2800_write_beacon, | ||
1068 | .kick_tx_queue = rt2800pci_kick_tx_queue, | 1051 | .kick_tx_queue = rt2800pci_kick_tx_queue, |
1069 | .kill_tx_queue = rt2800pci_kill_tx_queue, | 1052 | .kill_tx_queue = rt2800pci_kill_tx_queue, |
1070 | .fill_rxdone = rt2800pci_fill_rxdone, | 1053 | .fill_rxdone = rt2800pci_fill_rxdone, |
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.h b/drivers/net/wireless/rt2x00/rt2800pci.h index afc8e7da27cb..5a8dda9b5b5a 100644 --- a/drivers/net/wireless/rt2x00/rt2800pci.h +++ b/drivers/net/wireless/rt2x00/rt2800pci.h | |||
@@ -35,25 +35,6 @@ | |||
35 | #define RT2800PCI_H | 35 | #define RT2800PCI_H |
36 | 36 | ||
37 | /* | 37 | /* |
38 | * PCI registers. | ||
39 | */ | ||
40 | |||
41 | /* | ||
42 | * E2PROM_CSR: EEPROM control register. | ||
43 | * RELOAD: Write 1 to reload eeprom content. | ||
44 | * TYPE: 0: 93c46, 1:93c66. | ||
45 | * LOAD_STATUS: 1:loading, 0:done. | ||
46 | */ | ||
47 | #define E2PROM_CSR 0x0004 | ||
48 | #define E2PROM_CSR_DATA_CLOCK FIELD32(0x00000001) | ||
49 | #define E2PROM_CSR_CHIP_SELECT FIELD32(0x00000002) | ||
50 | #define E2PROM_CSR_DATA_IN FIELD32(0x00000004) | ||
51 | #define E2PROM_CSR_DATA_OUT FIELD32(0x00000008) | ||
52 | #define E2PROM_CSR_TYPE FIELD32(0x00000030) | ||
53 | #define E2PROM_CSR_LOAD_STATUS FIELD32(0x00000040) | ||
54 | #define E2PROM_CSR_RELOAD FIELD32(0x00000080) | ||
55 | |||
56 | /* | ||
57 | * Queue register offset macros | 38 | * Queue register offset macros |
58 | */ | 39 | */ |
59 | #define TX_QUEUE_REG_OFFSET 0x10 | 40 | #define TX_QUEUE_REG_OFFSET 0x10 |
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c index 0f8b84b7224c..c437960de3ed 100644 --- a/drivers/net/wireless/rt2x00/rt2800usb.c +++ b/drivers/net/wireless/rt2x00/rt2800usb.c | |||
@@ -169,11 +169,8 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev, | |||
169 | /* | 169 | /* |
170 | * Write firmware to device. | 170 | * Write firmware to device. |
171 | */ | 171 | */ |
172 | rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE, | 172 | rt2800_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE, |
173 | USB_VENDOR_REQUEST_OUT, | 173 | data + offset, length); |
174 | FIRMWARE_IMAGE_BASE, | ||
175 | data + offset, length, | ||
176 | REGISTER_TIMEOUT32(length)); | ||
177 | 174 | ||
178 | rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0); | 175 | rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0); |
179 | rt2800_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0); | 176 | rt2800_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0); |
@@ -196,7 +193,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev, | |||
196 | /* | 193 | /* |
197 | * Send signal to firmware during boot time. | 194 | * Send signal to firmware during boot time. |
198 | */ | 195 | */ |
199 | rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0); | 196 | rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0, 0, 0); |
200 | 197 | ||
201 | if (rt2x00_rt(rt2x00dev, RT3070) || | 198 | if (rt2x00_rt(rt2x00dev, RT3070) || |
202 | rt2x00_rt(rt2x00dev, RT3071) || | 199 | rt2x00_rt(rt2x00dev, RT3071) || |
@@ -246,6 +243,44 @@ static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev, | |||
246 | rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); | 243 | rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); |
247 | } | 244 | } |
248 | 245 | ||
246 | static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev) | ||
247 | { | ||
248 | u32 reg; | ||
249 | int i; | ||
250 | |||
251 | /* | ||
252 | * Wait until BBP and RF are ready. | ||
253 | */ | ||
254 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | ||
255 | rt2800_register_read(rt2x00dev, MAC_CSR0, ®); | ||
256 | if (reg && reg != ~0) | ||
257 | break; | ||
258 | msleep(1); | ||
259 | } | ||
260 | |||
261 | if (i == REGISTER_BUSY_COUNT) { | ||
262 | ERROR(rt2x00dev, "Unstable hardware.\n"); | ||
263 | return -EBUSY; | ||
264 | } | ||
265 | |||
266 | rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, ®); | ||
267 | rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, reg & ~0x00002000); | ||
268 | |||
269 | rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, ®); | ||
270 | rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_CSR, 1); | ||
271 | rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_BBP, 1); | ||
272 | rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); | ||
273 | |||
274 | rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000); | ||
275 | |||
276 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0, | ||
277 | USB_MODE_RESET, REGISTER_TIMEOUT); | ||
278 | |||
279 | rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000); | ||
280 | |||
281 | return 0; | ||
282 | } | ||
283 | |||
249 | static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev) | 284 | static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev) |
250 | { | 285 | { |
251 | u32 reg; | 286 | u32 reg; |
@@ -400,20 +435,21 @@ static void rt2800usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
400 | struct txentry_desc *txdesc) | 435 | struct txentry_desc *txdesc) |
401 | { | 436 | { |
402 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | 437 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
403 | __le32 *txi = (__le32 *)(skb->data - TXWI_DESC_SIZE - TXINFO_DESC_SIZE); | 438 | __le32 *txi = (__le32 *) skb->data; |
439 | __le32 *txwi = (__le32 *) (skb->data + TXINFO_DESC_SIZE); | ||
404 | u32 word; | 440 | u32 word; |
405 | 441 | ||
406 | /* | 442 | /* |
407 | * Initialize TXWI descriptor | 443 | * Initialize TXWI descriptor |
408 | */ | 444 | */ |
409 | rt2800_write_txwi(skb, txdesc); | 445 | rt2800_write_txwi(txwi, txdesc); |
410 | 446 | ||
411 | /* | 447 | /* |
412 | * Initialize TXINFO descriptor | 448 | * Initialize TXINFO descriptor |
413 | */ | 449 | */ |
414 | rt2x00_desc_read(txi, 0, &word); | 450 | rt2x00_desc_read(txi, 0, &word); |
415 | rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_PKT_LEN, | 451 | rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_PKT_LEN, |
416 | skb->len + TXWI_DESC_SIZE); | 452 | skb->len - TXINFO_DESC_SIZE); |
417 | rt2x00_set_field32(&word, TXINFO_W0_WIV, | 453 | rt2x00_set_field32(&word, TXINFO_W0_WIV, |
418 | !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags)); | 454 | !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags)); |
419 | rt2x00_set_field32(&word, TXINFO_W0_QSEL, 2); | 455 | rt2x00_set_field32(&word, TXINFO_W0_QSEL, 2); |
@@ -426,6 +462,7 @@ static void rt2800usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
426 | /* | 462 | /* |
427 | * Register descriptor details in skb frame descriptor. | 463 | * Register descriptor details in skb frame descriptor. |
428 | */ | 464 | */ |
465 | skbdesc->flags |= SKBDESC_DESC_IN_SKB; | ||
429 | skbdesc->desc = txi; | 466 | skbdesc->desc = txi; |
430 | skbdesc->desc_len = TXINFO_DESC_SIZE + TXWI_DESC_SIZE; | 467 | skbdesc->desc_len = TXINFO_DESC_SIZE + TXWI_DESC_SIZE; |
431 | } | 468 | } |
@@ -433,51 +470,6 @@ static void rt2800usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
433 | /* | 470 | /* |
434 | * TX data initialization | 471 | * TX data initialization |
435 | */ | 472 | */ |
436 | static void rt2800usb_write_beacon(struct queue_entry *entry, | ||
437 | struct txentry_desc *txdesc) | ||
438 | { | ||
439 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | ||
440 | unsigned int beacon_base; | ||
441 | u32 reg; | ||
442 | |||
443 | /* | ||
444 | * Disable beaconing while we are reloading the beacon data, | ||
445 | * otherwise we might be sending out invalid data. | ||
446 | */ | ||
447 | rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®); | ||
448 | rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 0); | ||
449 | rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); | ||
450 | |||
451 | /* | ||
452 | * Add the TXWI for the beacon to the skb. | ||
453 | */ | ||
454 | rt2800_write_txwi(entry->skb, txdesc); | ||
455 | skb_push(entry->skb, TXWI_DESC_SIZE); | ||
456 | |||
457 | /* | ||
458 | * Write entire beacon with descriptor to register. | ||
459 | */ | ||
460 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); | ||
461 | rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE, | ||
462 | USB_VENDOR_REQUEST_OUT, beacon_base, | ||
463 | entry->skb->data, entry->skb->len, | ||
464 | REGISTER_TIMEOUT32(entry->skb->len)); | ||
465 | |||
466 | /* | ||
467 | * Enable beaconing again. | ||
468 | */ | ||
469 | rt2x00_set_field32(®, BCN_TIME_CFG_TSF_TICKING, 1); | ||
470 | rt2x00_set_field32(®, BCN_TIME_CFG_TBTT_ENABLE, 1); | ||
471 | rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 1); | ||
472 | rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); | ||
473 | |||
474 | /* | ||
475 | * Clean up the beacon skb. | ||
476 | */ | ||
477 | dev_kfree_skb(entry->skb); | ||
478 | entry->skb = NULL; | ||
479 | } | ||
480 | |||
481 | static int rt2800usb_get_tx_data_len(struct queue_entry *entry) | 473 | static int rt2800usb_get_tx_data_len(struct queue_entry *entry) |
482 | { | 474 | { |
483 | int length; | 475 | int length; |
@@ -595,6 +587,8 @@ static const struct rt2800_ops rt2800usb_rt2800_ops = { | |||
595 | .register_multiwrite = rt2x00usb_register_multiwrite, | 587 | .register_multiwrite = rt2x00usb_register_multiwrite, |
596 | 588 | ||
597 | .regbusy_read = rt2x00usb_regbusy_read, | 589 | .regbusy_read = rt2x00usb_regbusy_read, |
590 | |||
591 | .drv_init_registers = rt2800usb_init_registers, | ||
598 | }; | 592 | }; |
599 | 593 | ||
600 | static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev) | 594 | static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev) |
@@ -659,7 +653,7 @@ static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = { | |||
659 | .link_tuner = rt2800_link_tuner, | 653 | .link_tuner = rt2800_link_tuner, |
660 | .write_tx_desc = rt2800usb_write_tx_desc, | 654 | .write_tx_desc = rt2800usb_write_tx_desc, |
661 | .write_tx_data = rt2x00usb_write_tx_data, | 655 | .write_tx_data = rt2x00usb_write_tx_data, |
662 | .write_beacon = rt2800usb_write_beacon, | 656 | .write_beacon = rt2800_write_beacon, |
663 | .get_tx_data_len = rt2800usb_get_tx_data_len, | 657 | .get_tx_data_len = rt2800usb_get_tx_data_len, |
664 | .kick_tx_queue = rt2x00usb_kick_tx_queue, | 658 | .kick_tx_queue = rt2x00usb_kick_tx_queue, |
665 | .kill_tx_queue = rt2x00usb_kill_tx_queue, | 659 | .kill_tx_queue = rt2x00usb_kill_tx_queue, |
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.h b/drivers/net/wireless/rt2x00/rt2800usb.h index 2bca6a71a7f5..0722badccf86 100644 --- a/drivers/net/wireless/rt2x00/rt2800usb.h +++ b/drivers/net/wireless/rt2x00/rt2800usb.h | |||
@@ -32,43 +32,6 @@ | |||
32 | #define RT2800USB_H | 32 | #define RT2800USB_H |
33 | 33 | ||
34 | /* | 34 | /* |
35 | * USB registers. | ||
36 | */ | ||
37 | |||
38 | /* | ||
39 | * USB_DMA_CFG | ||
40 | * RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns. | ||
41 | * RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes. | ||
42 | * PHY_CLEAR: phy watch dog enable. | ||
43 | * TX_CLEAR: Clear USB DMA TX path. | ||
44 | * TXOP_HALT: Halt TXOP count down when TX buffer is full. | ||
45 | * RX_BULK_AGG_EN: Enable Rx Bulk Aggregation. | ||
46 | * RX_BULK_EN: Enable USB DMA Rx. | ||
47 | * TX_BULK_EN: Enable USB DMA Tx. | ||
48 | * EP_OUT_VALID: OUT endpoint data valid. | ||
49 | * RX_BUSY: USB DMA RX FSM busy. | ||
50 | * TX_BUSY: USB DMA TX FSM busy. | ||
51 | */ | ||
52 | #define USB_DMA_CFG 0x02a0 | ||
53 | #define USB_DMA_CFG_RX_BULK_AGG_TIMEOUT FIELD32(0x000000ff) | ||
54 | #define USB_DMA_CFG_RX_BULK_AGG_LIMIT FIELD32(0x0000ff00) | ||
55 | #define USB_DMA_CFG_PHY_CLEAR FIELD32(0x00010000) | ||
56 | #define USB_DMA_CFG_TX_CLEAR FIELD32(0x00080000) | ||
57 | #define USB_DMA_CFG_TXOP_HALT FIELD32(0x00100000) | ||
58 | #define USB_DMA_CFG_RX_BULK_AGG_EN FIELD32(0x00200000) | ||
59 | #define USB_DMA_CFG_RX_BULK_EN FIELD32(0x00400000) | ||
60 | #define USB_DMA_CFG_TX_BULK_EN FIELD32(0x00800000) | ||
61 | #define USB_DMA_CFG_EP_OUT_VALID FIELD32(0x3f000000) | ||
62 | #define USB_DMA_CFG_RX_BUSY FIELD32(0x40000000) | ||
63 | #define USB_DMA_CFG_TX_BUSY FIELD32(0x80000000) | ||
64 | |||
65 | /* | ||
66 | * USB_CYC_CFG | ||
67 | */ | ||
68 | #define USB_CYC_CFG 0x02a4 | ||
69 | #define USB_CYC_CFG_CLOCK_CYCLE FIELD32(0x000000ff) | ||
70 | |||
71 | /* | ||
72 | * 8051 firmware image. | 35 | * 8051 firmware image. |
73 | */ | 36 | */ |
74 | #define FIRMWARE_RT2870 "rt2870.bin" | 37 | #define FIRMWARE_RT2870 "rt2870.bin" |
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h index 6c1ff4c15c84..e7acc6abfd89 100644 --- a/drivers/net/wireless/rt2x00/rt2x00.h +++ b/drivers/net/wireless/rt2x00/rt2x00.h | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <net/mac80211.h> | 39 | #include <net/mac80211.h> |
40 | 40 | ||
41 | #include "rt2x00debug.h" | 41 | #include "rt2x00debug.h" |
42 | #include "rt2x00dump.h" | ||
42 | #include "rt2x00leds.h" | 43 | #include "rt2x00leds.h" |
43 | #include "rt2x00reg.h" | 44 | #include "rt2x00reg.h" |
44 | #include "rt2x00queue.h" | 45 | #include "rt2x00queue.h" |
@@ -159,6 +160,7 @@ struct avg_val { | |||
159 | 160 | ||
160 | enum rt2x00_chip_intf { | 161 | enum rt2x00_chip_intf { |
161 | RT2X00_CHIP_INTF_PCI, | 162 | RT2X00_CHIP_INTF_PCI, |
163 | RT2X00_CHIP_INTF_PCIE, | ||
162 | RT2X00_CHIP_INTF_USB, | 164 | RT2X00_CHIP_INTF_USB, |
163 | RT2X00_CHIP_INTF_SOC, | 165 | RT2X00_CHIP_INTF_SOC, |
164 | }; | 166 | }; |
@@ -175,8 +177,7 @@ struct rt2x00_chip { | |||
175 | #define RT2570 0x2570 | 177 | #define RT2570 0x2570 |
176 | #define RT2661 0x2661 | 178 | #define RT2661 0x2661 |
177 | #define RT2573 0x2573 | 179 | #define RT2573 0x2573 |
178 | #define RT2860 0x2860 /* 2.4GHz PCI/CB */ | 180 | #define RT2860 0x2860 /* 2.4GHz */ |
179 | #define RT2870 0x2870 | ||
180 | #define RT2872 0x2872 /* WSOC */ | 181 | #define RT2872 0x2872 /* WSOC */ |
181 | #define RT2883 0x2883 /* WSOC */ | 182 | #define RT2883 0x2883 /* WSOC */ |
182 | #define RT3070 0x3070 | 183 | #define RT3070 0x3070 |
@@ -551,6 +552,8 @@ struct rt2x00lib_ops { | |||
551 | struct txentry_desc *txdesc); | 552 | struct txentry_desc *txdesc); |
552 | int (*write_tx_data) (struct queue_entry *entry, | 553 | int (*write_tx_data) (struct queue_entry *entry, |
553 | struct txentry_desc *txdesc); | 554 | struct txentry_desc *txdesc); |
555 | void (*write_tx_datadesc) (struct queue_entry *entry, | ||
556 | struct txentry_desc *txdesc); | ||
554 | void (*write_beacon) (struct queue_entry *entry, | 557 | void (*write_beacon) (struct queue_entry *entry, |
555 | struct txentry_desc *txdesc); | 558 | struct txentry_desc *txdesc); |
556 | int (*get_tx_data_len) (struct queue_entry *entry); | 559 | int (*get_tx_data_len) (struct queue_entry *entry); |
@@ -978,7 +981,13 @@ static inline bool rt2x00_intf(struct rt2x00_dev *rt2x00dev, | |||
978 | 981 | ||
979 | static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev) | 982 | static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev) |
980 | { | 983 | { |
981 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI); | 984 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI) || |
985 | rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | ||
986 | } | ||
987 | |||
988 | static inline bool rt2x00_is_pcie(struct rt2x00_dev *rt2x00dev) | ||
989 | { | ||
990 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | ||
982 | } | 991 | } |
983 | 992 | ||
984 | static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev) | 993 | static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev) |
@@ -999,6 +1008,13 @@ static inline bool rt2x00_is_soc(struct rt2x00_dev *rt2x00dev) | |||
999 | void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | 1008 | void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); |
1000 | 1009 | ||
1001 | /** | 1010 | /** |
1011 | * rt2x00queue_unmap_skb - Unmap a skb from DMA. | ||
1012 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
1013 | * @skb: The skb to unmap. | ||
1014 | */ | ||
1015 | void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | ||
1016 | |||
1017 | /** | ||
1002 | * rt2x00queue_get_queue - Convert queue index to queue pointer | 1018 | * rt2x00queue_get_queue - Convert queue index to queue pointer |
1003 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | 1019 | * @rt2x00dev: Pointer to &struct rt2x00_dev. |
1004 | * @queue: rt2x00 queue index (see &enum data_queue_qid). | 1020 | * @queue: rt2x00 queue index (see &enum data_queue_qid). |
@@ -1015,6 +1031,26 @@ struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, | |||
1015 | enum queue_index index); | 1031 | enum queue_index index); |
1016 | 1032 | ||
1017 | /* | 1033 | /* |
1034 | * Debugfs handlers. | ||
1035 | */ | ||
1036 | /** | ||
1037 | * rt2x00debug_dump_frame - Dump a frame to userspace through debugfs. | ||
1038 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
1039 | * @type: The type of frame that is being dumped. | ||
1040 | * @skb: The skb containing the frame to be dumped. | ||
1041 | */ | ||
1042 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | ||
1043 | void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | ||
1044 | enum rt2x00_dump_type type, struct sk_buff *skb); | ||
1045 | #else | ||
1046 | static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | ||
1047 | enum rt2x00_dump_type type, | ||
1048 | struct sk_buff *skb) | ||
1049 | { | ||
1050 | } | ||
1051 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | ||
1052 | |||
1053 | /* | ||
1018 | * Interrupt context handlers. | 1054 | * Interrupt context handlers. |
1019 | */ | 1055 | */ |
1020 | void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); | 1056 | void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); |
diff --git a/drivers/net/wireless/rt2x00/rt2x00config.c b/drivers/net/wireless/rt2x00/rt2x00config.c index 098315a271ca..8dbd634dae27 100644 --- a/drivers/net/wireless/rt2x00/rt2x00config.c +++ b/drivers/net/wireless/rt2x00/rt2x00config.c | |||
@@ -170,23 +170,27 @@ void rt2x00lib_config(struct rt2x00_dev *rt2x00dev, | |||
170 | unsigned int ieee80211_flags) | 170 | unsigned int ieee80211_flags) |
171 | { | 171 | { |
172 | struct rt2x00lib_conf libconf; | 172 | struct rt2x00lib_conf libconf; |
173 | u16 hw_value; | ||
173 | 174 | ||
174 | memset(&libconf, 0, sizeof(libconf)); | 175 | memset(&libconf, 0, sizeof(libconf)); |
175 | 176 | ||
176 | libconf.conf = conf; | 177 | libconf.conf = conf; |
177 | 178 | ||
178 | if (ieee80211_flags & IEEE80211_CONF_CHANGE_CHANNEL) { | 179 | if (ieee80211_flags & IEEE80211_CONF_CHANGE_CHANNEL) { |
179 | if (conf_is_ht40(conf)) | 180 | if (conf_is_ht40(conf)) { |
180 | __set_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags); | 181 | __set_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags); |
181 | else | 182 | hw_value = rt2x00ht_center_channel(rt2x00dev, conf); |
183 | } else { | ||
182 | __clear_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags); | 184 | __clear_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags); |
185 | hw_value = conf->channel->hw_value; | ||
186 | } | ||
183 | 187 | ||
184 | memcpy(&libconf.rf, | 188 | memcpy(&libconf.rf, |
185 | &rt2x00dev->spec.channels[conf->channel->hw_value], | 189 | &rt2x00dev->spec.channels[hw_value], |
186 | sizeof(libconf.rf)); | 190 | sizeof(libconf.rf)); |
187 | 191 | ||
188 | memcpy(&libconf.channel, | 192 | memcpy(&libconf.channel, |
189 | &rt2x00dev->spec.channels_info[conf->channel->hw_value], | 193 | &rt2x00dev->spec.channels_info[hw_value], |
190 | sizeof(libconf.channel)); | 194 | sizeof(libconf.channel)); |
191 | } | 195 | } |
192 | 196 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.c b/drivers/net/wireless/rt2x00/rt2x00debug.c index e9fe93fd8042..b0498e7e7aae 100644 --- a/drivers/net/wireless/rt2x00/rt2x00debug.c +++ b/drivers/net/wireless/rt2x00/rt2x00debug.c | |||
@@ -211,6 +211,7 @@ void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |||
211 | if (!test_bit(FRAME_DUMP_FILE_OPEN, &intf->frame_dump_flags)) | 211 | if (!test_bit(FRAME_DUMP_FILE_OPEN, &intf->frame_dump_flags)) |
212 | skb_queue_purge(&intf->frame_dump_skbqueue); | 212 | skb_queue_purge(&intf->frame_dump_skbqueue); |
213 | } | 213 | } |
214 | EXPORT_SYMBOL_GPL(rt2x00debug_dump_frame); | ||
214 | 215 | ||
215 | static int rt2x00debug_file_open(struct inode *inode, struct file *file) | 216 | static int rt2x00debug_file_open(struct inode *inode, struct file *file) |
216 | { | 217 | { |
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c index 3ae468c4d760..0b8efe8e6785 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c | |||
@@ -211,11 +211,6 @@ void rt2x00lib_txdone(struct queue_entry *entry, | |||
211 | bool success; | 211 | bool success; |
212 | 212 | ||
213 | /* | 213 | /* |
214 | * Unmap the skb. | ||
215 | */ | ||
216 | rt2x00queue_unmap_skb(rt2x00dev, entry->skb); | ||
217 | |||
218 | /* | ||
219 | * Remove L2 padding which was added during | 214 | * Remove L2 padding which was added during |
220 | */ | 215 | */ |
221 | if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags)) | 216 | if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags)) |
@@ -224,7 +219,7 @@ void rt2x00lib_txdone(struct queue_entry *entry, | |||
224 | /* | 219 | /* |
225 | * If the IV/EIV data was stripped from the frame before it was | 220 | * If the IV/EIV data was stripped from the frame before it was |
226 | * passed to the hardware, we should now reinsert it again because | 221 | * passed to the hardware, we should now reinsert it again because |
227 | * mac80211 will expect the the same data to be present it the | 222 | * mac80211 will expect the same data to be present it the |
228 | * frame as it was passed to us. | 223 | * frame as it was passed to us. |
229 | */ | 224 | */ |
230 | if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) | 225 | if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) |
diff --git a/drivers/net/wireless/rt2x00/rt2x00dump.h b/drivers/net/wireless/rt2x00/rt2x00dump.h index ed303b423e41..6df2e0b746b8 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dump.h +++ b/drivers/net/wireless/rt2x00/rt2x00dump.h | |||
@@ -20,7 +20,12 @@ | |||
20 | 20 | ||
21 | /* | 21 | /* |
22 | Module: rt2x00dump | 22 | Module: rt2x00dump |
23 | Abstract: Data structures for the rt2x00debug & userspace. | 23 | Abstract: |
24 | Data structures for the rt2x00debug & userspace. | ||
25 | |||
26 | The declarations in this file can be used by both rt2x00 | ||
27 | and userspace and therefore should be kept together in | ||
28 | this file. | ||
24 | */ | 29 | */ |
25 | 30 | ||
26 | #ifndef RT2X00DUMP_H | 31 | #ifndef RT2X00DUMP_H |
diff --git a/drivers/net/wireless/rt2x00/rt2x00ht.c b/drivers/net/wireless/rt2x00/rt2x00ht.c index 5a407602ce3e..c004cd3a8847 100644 --- a/drivers/net/wireless/rt2x00/rt2x00ht.c +++ b/drivers/net/wireless/rt2x00/rt2x00ht.c | |||
@@ -44,11 +44,22 @@ void rt2x00ht_create_tx_descriptor(struct queue_entry *entry, | |||
44 | txdesc->mpdu_density = 0; | 44 | txdesc->mpdu_density = 0; |
45 | 45 | ||
46 | txdesc->ba_size = 7; /* FIXME: What value is needed? */ | 46 | txdesc->ba_size = 7; /* FIXME: What value is needed? */ |
47 | txdesc->stbc = 0; /* FIXME: What value is needed? */ | ||
48 | 47 | ||
49 | txdesc->mcs = rt2x00_get_rate_mcs(hwrate->mcs); | 48 | txdesc->stbc = |
50 | if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) | 49 | (tx_info->flags & IEEE80211_TX_CTL_STBC) >> IEEE80211_TX_CTL_STBC_SHIFT; |
51 | txdesc->mcs |= 0x08; | 50 | |
51 | /* | ||
52 | * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the | ||
53 | * mcs rate to be used | ||
54 | */ | ||
55 | if (txrate->flags & IEEE80211_TX_RC_MCS) { | ||
56 | txdesc->mcs = txrate->idx; | ||
57 | } else { | ||
58 | txdesc->mcs = rt2x00_get_rate_mcs(hwrate->mcs); | ||
59 | if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) | ||
60 | txdesc->mcs |= 0x08; | ||
61 | } | ||
62 | |||
52 | 63 | ||
53 | /* | 64 | /* |
54 | * Convert flags | 65 | * Convert flags |
@@ -84,3 +95,31 @@ void rt2x00ht_create_tx_descriptor(struct queue_entry *entry, | |||
84 | else | 95 | else |
85 | txdesc->txop = TXOP_HTTXOP; | 96 | txdesc->txop = TXOP_HTTXOP; |
86 | } | 97 | } |
98 | |||
99 | u16 rt2x00ht_center_channel(struct rt2x00_dev *rt2x00dev, | ||
100 | struct ieee80211_conf *conf) | ||
101 | { | ||
102 | struct hw_mode_spec *spec = &rt2x00dev->spec; | ||
103 | int center_channel; | ||
104 | u16 i; | ||
105 | |||
106 | /* | ||
107 | * Initialize center channel to current channel. | ||
108 | */ | ||
109 | center_channel = spec->channels[conf->channel->hw_value].channel; | ||
110 | |||
111 | /* | ||
112 | * Adjust center channel to HT40+ and HT40- operation. | ||
113 | */ | ||
114 | if (conf_is_ht40_plus(conf)) | ||
115 | center_channel += 2; | ||
116 | else if (conf_is_ht40_minus(conf)) | ||
117 | center_channel -= (center_channel == 14) ? 1 : 2; | ||
118 | |||
119 | for (i = 0; i < spec->num_channels; i++) | ||
120 | if (spec->channels[i].channel == center_channel) | ||
121 | return i; | ||
122 | |||
123 | WARN_ON(1); | ||
124 | return conf->channel->hw_value; | ||
125 | } | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h index be2e37fb4071..ed27de1de57b 100644 --- a/drivers/net/wireless/rt2x00/rt2x00lib.h +++ b/drivers/net/wireless/rt2x00/rt2x00lib.h | |||
@@ -27,8 +27,6 @@ | |||
27 | #ifndef RT2X00LIB_H | 27 | #ifndef RT2X00LIB_H |
28 | #define RT2X00LIB_H | 28 | #define RT2X00LIB_H |
29 | 29 | ||
30 | #include "rt2x00dump.h" | ||
31 | |||
32 | /* | 30 | /* |
33 | * Interval defines | 31 | * Interval defines |
34 | */ | 32 | */ |
@@ -107,13 +105,6 @@ struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev, | |||
107 | struct queue_entry *entry); | 105 | struct queue_entry *entry); |
108 | 106 | ||
109 | /** | 107 | /** |
110 | * rt2x00queue_unmap_skb - Unmap a skb from DMA. | ||
111 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
112 | * @skb: The skb to unmap. | ||
113 | */ | ||
114 | void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | ||
115 | |||
116 | /** | ||
117 | * rt2x00queue_free_skb - free a skb | 108 | * rt2x00queue_free_skb - free a skb |
118 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | 109 | * @rt2x00dev: Pointer to &struct rt2x00_dev. |
119 | * @skb: The skb to free. | 110 | * @skb: The skb to free. |
@@ -296,8 +287,6 @@ static inline void rt2x00lib_free_firmware(struct rt2x00_dev *rt2x00dev) | |||
296 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | 287 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
297 | void rt2x00debug_register(struct rt2x00_dev *rt2x00dev); | 288 | void rt2x00debug_register(struct rt2x00_dev *rt2x00dev); |
298 | void rt2x00debug_deregister(struct rt2x00_dev *rt2x00dev); | 289 | void rt2x00debug_deregister(struct rt2x00_dev *rt2x00dev); |
299 | void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | ||
300 | enum rt2x00_dump_type type, struct sk_buff *skb); | ||
301 | void rt2x00debug_update_crypto(struct rt2x00_dev *rt2x00dev, | 290 | void rt2x00debug_update_crypto(struct rt2x00_dev *rt2x00dev, |
302 | struct rxdone_entry_desc *rxdesc); | 291 | struct rxdone_entry_desc *rxdesc); |
303 | #else | 292 | #else |
@@ -309,12 +298,6 @@ static inline void rt2x00debug_deregister(struct rt2x00_dev *rt2x00dev) | |||
309 | { | 298 | { |
310 | } | 299 | } |
311 | 300 | ||
312 | static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | ||
313 | enum rt2x00_dump_type type, | ||
314 | struct sk_buff *skb) | ||
315 | { | ||
316 | } | ||
317 | |||
318 | static inline void rt2x00debug_update_crypto(struct rt2x00_dev *rt2x00dev, | 301 | static inline void rt2x00debug_update_crypto(struct rt2x00_dev *rt2x00dev, |
319 | struct rxdone_entry_desc *rxdesc) | 302 | struct rxdone_entry_desc *rxdesc) |
320 | { | 303 | { |
@@ -384,12 +367,21 @@ static inline void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, | |||
384 | void rt2x00ht_create_tx_descriptor(struct queue_entry *entry, | 367 | void rt2x00ht_create_tx_descriptor(struct queue_entry *entry, |
385 | struct txentry_desc *txdesc, | 368 | struct txentry_desc *txdesc, |
386 | const struct rt2x00_rate *hwrate); | 369 | const struct rt2x00_rate *hwrate); |
370 | |||
371 | u16 rt2x00ht_center_channel(struct rt2x00_dev *rt2x00dev, | ||
372 | struct ieee80211_conf *conf); | ||
387 | #else | 373 | #else |
388 | static inline void rt2x00ht_create_tx_descriptor(struct queue_entry *entry, | 374 | static inline void rt2x00ht_create_tx_descriptor(struct queue_entry *entry, |
389 | struct txentry_desc *txdesc, | 375 | struct txentry_desc *txdesc, |
390 | const struct rt2x00_rate *hwrate) | 376 | const struct rt2x00_rate *hwrate) |
391 | { | 377 | { |
392 | } | 378 | } |
379 | |||
380 | static inline u16 rt2x00ht_center_channel(struct rt2x00_dev *rt2x00dev, | ||
381 | struct ieee80211_conf *conf) | ||
382 | { | ||
383 | return conf->channel->hw_value; | ||
384 | } | ||
393 | #endif /* CONFIG_RT2X00_LIB_HT */ | 385 | #endif /* CONFIG_RT2X00_LIB_HT */ |
394 | 386 | ||
395 | /* | 387 | /* |
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.c b/drivers/net/wireless/rt2x00/rt2x00pci.c index f71eee67f977..10eaffd12b1b 100644 --- a/drivers/net/wireless/rt2x00/rt2x00pci.c +++ b/drivers/net/wireless/rt2x00/rt2x00pci.c | |||
@@ -81,6 +81,24 @@ int rt2x00pci_write_tx_data(struct queue_entry *entry, | |||
81 | return -EINVAL; | 81 | return -EINVAL; |
82 | } | 82 | } |
83 | 83 | ||
84 | /* | ||
85 | * Add the requested extra tx headroom in front of the skb. | ||
86 | */ | ||
87 | skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom); | ||
88 | memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom); | ||
89 | |||
90 | /* | ||
91 | * Call the driver's write_tx_datadesc function, if it exists. | ||
92 | */ | ||
93 | if (rt2x00dev->ops->lib->write_tx_datadesc) | ||
94 | rt2x00dev->ops->lib->write_tx_datadesc(entry, txdesc); | ||
95 | |||
96 | /* | ||
97 | * Map the skb to DMA. | ||
98 | */ | ||
99 | if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) | ||
100 | rt2x00queue_map_txskb(rt2x00dev, entry->skb); | ||
101 | |||
84 | return 0; | 102 | return 0; |
85 | } | 103 | } |
86 | EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data); | 104 | EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data); |
@@ -88,6 +106,34 @@ EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data); | |||
88 | /* | 106 | /* |
89 | * TX/RX data handlers. | 107 | * TX/RX data handlers. |
90 | */ | 108 | */ |
109 | void rt2x00pci_txdone(struct queue_entry *entry, | ||
110 | struct txdone_entry_desc *txdesc) | ||
111 | { | ||
112 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | ||
113 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
114 | |||
115 | /* | ||
116 | * Unmap the skb. | ||
117 | */ | ||
118 | rt2x00queue_unmap_skb(rt2x00dev, entry->skb); | ||
119 | |||
120 | /* | ||
121 | * Remove the extra tx headroom from the skb. | ||
122 | */ | ||
123 | skb_pull(entry->skb, rt2x00dev->ops->extra_tx_headroom); | ||
124 | |||
125 | /* | ||
126 | * Signal that the TX descriptor is no longer in the skb. | ||
127 | */ | ||
128 | skbdesc->flags &= ~SKBDESC_DESC_IN_SKB; | ||
129 | |||
130 | /* | ||
131 | * Pass on to rt2x00lib. | ||
132 | */ | ||
133 | rt2x00lib_txdone(entry, txdesc); | ||
134 | } | ||
135 | EXPORT_SYMBOL_GPL(rt2x00pci_txdone); | ||
136 | |||
91 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev) | 137 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev) |
92 | { | 138 | { |
93 | struct data_queue *queue = rt2x00dev->rx; | 139 | struct data_queue *queue = rt2x00dev->rx; |
@@ -305,7 +351,10 @@ int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) | |||
305 | rt2x00dev->irq = pci_dev->irq; | 351 | rt2x00dev->irq = pci_dev->irq; |
306 | rt2x00dev->name = pci_name(pci_dev); | 352 | rt2x00dev->name = pci_name(pci_dev); |
307 | 353 | ||
308 | rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI); | 354 | if (pci_dev->is_pcie) |
355 | rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | ||
356 | else | ||
357 | rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI); | ||
309 | 358 | ||
310 | retval = rt2x00pci_alloc_reg(rt2x00dev); | 359 | retval = rt2x00pci_alloc_reg(rt2x00dev); |
311 | if (retval) | 360 | if (retval) |
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.h b/drivers/net/wireless/rt2x00/rt2x00pci.h index 51bcef3839ce..00528b8a754d 100644 --- a/drivers/net/wireless/rt2x00/rt2x00pci.h +++ b/drivers/net/wireless/rt2x00/rt2x00pci.h | |||
@@ -109,6 +109,14 @@ struct queue_entry_priv_pci { | |||
109 | }; | 109 | }; |
110 | 110 | ||
111 | /** | 111 | /** |
112 | * rt2x00pci_txdone - Handle TX done events. | ||
113 | * @entry: The queue entry for which a TX done event was received. | ||
114 | * @txdesc: The TX done descriptor for the entry. | ||
115 | */ | ||
116 | void rt2x00pci_txdone(struct queue_entry *entry, | ||
117 | struct txdone_entry_desc *txdesc); | ||
118 | |||
119 | /** | ||
112 | * rt2x00pci_rxdone - Handle RX done events | 120 | * rt2x00pci_rxdone - Handle RX done events |
113 | * @rt2x00dev: Device pointer, see &struct rt2x00_dev. | 121 | * @rt2x00dev: Device pointer, see &struct rt2x00_dev. |
114 | */ | 122 | */ |
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c index 20dbdd6fb904..35858b178e8f 100644 --- a/drivers/net/wireless/rt2x00/rt2x00queue.c +++ b/drivers/net/wireless/rt2x00/rt2x00queue.c | |||
@@ -100,21 +100,8 @@ void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb) | |||
100 | { | 100 | { |
101 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | 101 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
102 | 102 | ||
103 | /* | ||
104 | * If device has requested headroom, we should make sure that | ||
105 | * is also mapped to the DMA so it can be used for transfering | ||
106 | * additional descriptor information to the hardware. | ||
107 | */ | ||
108 | skb_push(skb, rt2x00dev->ops->extra_tx_headroom); | ||
109 | |||
110 | skbdesc->skb_dma = | 103 | skbdesc->skb_dma = |
111 | dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE); | 104 | dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE); |
112 | |||
113 | /* | ||
114 | * Restore data pointer to original location again. | ||
115 | */ | ||
116 | skb_pull(skb, rt2x00dev->ops->extra_tx_headroom); | ||
117 | |||
118 | skbdesc->flags |= SKBDESC_DMA_MAPPED_TX; | 105 | skbdesc->flags |= SKBDESC_DMA_MAPPED_TX; |
119 | } | 106 | } |
120 | EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb); | 107 | EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb); |
@@ -130,16 +117,12 @@ void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb) | |||
130 | } | 117 | } |
131 | 118 | ||
132 | if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) { | 119 | if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) { |
133 | /* | 120 | dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len, |
134 | * Add headroom to the skb length, it has been removed | ||
135 | * by the driver, but it was actually mapped to DMA. | ||
136 | */ | ||
137 | dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, | ||
138 | skb->len + rt2x00dev->ops->extra_tx_headroom, | ||
139 | DMA_TO_DEVICE); | 121 | DMA_TO_DEVICE); |
140 | skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX; | 122 | skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX; |
141 | } | 123 | } |
142 | } | 124 | } |
125 | EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb); | ||
143 | 126 | ||
144 | void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb) | 127 | void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb) |
145 | { | 128 | { |
@@ -421,7 +404,6 @@ static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry, | |||
421 | { | 404 | { |
422 | struct data_queue *queue = entry->queue; | 405 | struct data_queue *queue = entry->queue; |
423 | struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; | 406 | struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; |
424 | enum rt2x00_dump_type dump_type; | ||
425 | 407 | ||
426 | rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc); | 408 | rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc); |
427 | 409 | ||
@@ -429,9 +411,7 @@ static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry, | |||
429 | * All processing on the frame has been completed, this means | 411 | * All processing on the frame has been completed, this means |
430 | * it is now ready to be dumped to userspace through debugfs. | 412 | * it is now ready to be dumped to userspace through debugfs. |
431 | */ | 413 | */ |
432 | dump_type = (txdesc->queue == QID_BEACON) ? | 414 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb); |
433 | DUMP_FRAME_BEACON : DUMP_FRAME_TX; | ||
434 | rt2x00debug_dump_frame(rt2x00dev, dump_type, entry->skb); | ||
435 | } | 415 | } |
436 | 416 | ||
437 | static void rt2x00queue_kick_tx_queue(struct queue_entry *entry, | 417 | static void rt2x00queue_kick_tx_queue(struct queue_entry *entry, |
@@ -537,9 +517,6 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb, | |||
537 | return -EIO; | 517 | return -EIO; |
538 | } | 518 | } |
539 | 519 | ||
540 | if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags)) | ||
541 | rt2x00queue_map_txskb(queue->rt2x00dev, skb); | ||
542 | |||
543 | set_bit(ENTRY_DATA_PENDING, &entry->flags); | 520 | set_bit(ENTRY_DATA_PENDING, &entry->flags); |
544 | 521 | ||
545 | rt2x00queue_index_inc(queue, Q_INDEX); | 522 | rt2x00queue_index_inc(queue, Q_INDEX); |
@@ -595,11 +572,6 @@ int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev, | |||
595 | skbdesc->entry = intf->beacon; | 572 | skbdesc->entry = intf->beacon; |
596 | 573 | ||
597 | /* | 574 | /* |
598 | * Write TX descriptor into reserved room in front of the beacon. | ||
599 | */ | ||
600 | rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc); | ||
601 | |||
602 | /* | ||
603 | * Send beacon to hardware and enable beacon genaration.. | 575 | * Send beacon to hardware and enable beacon genaration.. |
604 | */ | 576 | */ |
605 | rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc); | 577 | rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc); |
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c index bd1546ba7ad2..b45bc24c3dae 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.c +++ b/drivers/net/wireless/rt2x00/rt2x00usb.c | |||
@@ -113,26 +113,6 @@ int rt2x00usb_vendor_request_buff(struct rt2x00_dev *rt2x00dev, | |||
113 | const u16 offset, void *buffer, | 113 | const u16 offset, void *buffer, |
114 | const u16 buffer_length, const int timeout) | 114 | const u16 buffer_length, const int timeout) |
115 | { | 115 | { |
116 | int status; | ||
117 | |||
118 | mutex_lock(&rt2x00dev->csr_mutex); | ||
119 | |||
120 | status = rt2x00usb_vendor_req_buff_lock(rt2x00dev, request, | ||
121 | requesttype, offset, buffer, | ||
122 | buffer_length, timeout); | ||
123 | |||
124 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
125 | |||
126 | return status; | ||
127 | } | ||
128 | EXPORT_SYMBOL_GPL(rt2x00usb_vendor_request_buff); | ||
129 | |||
130 | int rt2x00usb_vendor_request_large_buff(struct rt2x00_dev *rt2x00dev, | ||
131 | const u8 request, const u8 requesttype, | ||
132 | const u16 offset, const void *buffer, | ||
133 | const u16 buffer_length, | ||
134 | const int timeout) | ||
135 | { | ||
136 | int status = 0; | 116 | int status = 0; |
137 | unsigned char *tb; | 117 | unsigned char *tb; |
138 | u16 off, len, bsize; | 118 | u16 off, len, bsize; |
@@ -157,7 +137,7 @@ int rt2x00usb_vendor_request_large_buff(struct rt2x00_dev *rt2x00dev, | |||
157 | 137 | ||
158 | return status; | 138 | return status; |
159 | } | 139 | } |
160 | EXPORT_SYMBOL_GPL(rt2x00usb_vendor_request_large_buff); | 140 | EXPORT_SYMBOL_GPL(rt2x00usb_vendor_request_buff); |
161 | 141 | ||
162 | int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev, | 142 | int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev, |
163 | const unsigned int offset, | 143 | const unsigned int offset, |
@@ -198,6 +178,11 @@ static void rt2x00usb_interrupt_txdone(struct urb *urb) | |||
198 | return; | 178 | return; |
199 | 179 | ||
200 | /* | 180 | /* |
181 | * Remove the descriptor from the front of the skb. | ||
182 | */ | ||
183 | skb_pull(entry->skb, entry->queue->desc_size); | ||
184 | |||
185 | /* | ||
201 | * Obtain the status about this packet. | 186 | * Obtain the status about this packet. |
202 | * Note that when the status is 0 it does not mean the | 187 | * Note that when the status is 0 it does not mean the |
203 | * frame was send out correctly. It only means the frame | 188 | * frame was send out correctly. It only means the frame |
@@ -243,10 +228,10 @@ int rt2x00usb_write_tx_data(struct queue_entry *entry, | |||
243 | rt2x00usb_interrupt_txdone, entry); | 228 | rt2x00usb_interrupt_txdone, entry); |
244 | 229 | ||
245 | /* | 230 | /* |
246 | * Make sure the skb->data pointer points to the frame, not the | 231 | * Call the driver's write_tx_datadesc function, if it exists. |
247 | * descriptor. | ||
248 | */ | 232 | */ |
249 | skb_pull(entry->skb, entry->queue->desc_size); | 233 | if (rt2x00dev->ops->lib->write_tx_datadesc) |
234 | rt2x00dev->ops->lib->write_tx_datadesc(entry, txdesc); | ||
250 | 235 | ||
251 | return 0; | 236 | return 0; |
252 | } | 237 | } |
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.h b/drivers/net/wireless/rt2x00/rt2x00usb.h index 621d0f829251..255b81ef9530 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.h +++ b/drivers/net/wireless/rt2x00/rt2x00usb.h | |||
@@ -167,25 +167,6 @@ int rt2x00usb_vendor_req_buff_lock(struct rt2x00_dev *rt2x00dev, | |||
167 | const u16 buffer_length, const int timeout); | 167 | const u16 buffer_length, const int timeout); |
168 | 168 | ||
169 | /** | 169 | /** |
170 | * rt2x00usb_vendor_request_large_buff - Send register command to device (buffered) | ||
171 | * @rt2x00dev: Pointer to &struct rt2x00_dev | ||
172 | * @request: USB vendor command (See &enum rt2x00usb_vendor_request) | ||
173 | * @requesttype: Request type &USB_VENDOR_REQUEST_* | ||
174 | * @offset: Register start offset to perform action on | ||
175 | * @buffer: Buffer where information will be read/written to by device | ||
176 | * @buffer_length: Size of &buffer | ||
177 | * @timeout: Operation timeout | ||
178 | * | ||
179 | * This function is used to transfer register data in blocks larger | ||
180 | * then CSR_CACHE_SIZE. Use for firmware upload, keys and beacons. | ||
181 | */ | ||
182 | int rt2x00usb_vendor_request_large_buff(struct rt2x00_dev *rt2x00dev, | ||
183 | const u8 request, const u8 requesttype, | ||
184 | const u16 offset, const void *buffer, | ||
185 | const u16 buffer_length, | ||
186 | const int timeout); | ||
187 | |||
188 | /** | ||
189 | * rt2x00usb_vendor_request_sw - Send single register command to device | 170 | * rt2x00usb_vendor_request_sw - Send single register command to device |
190 | * @rt2x00dev: Pointer to &struct rt2x00_dev | 171 | * @rt2x00dev: Pointer to &struct rt2x00_dev |
191 | * @request: USB vendor command (See &enum rt2x00usb_vendor_request) | 172 | * @request: USB vendor command (See &enum rt2x00usb_vendor_request) |
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c index 6a74baf4e934..243df08ae910 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.c +++ b/drivers/net/wireless/rt2x00/rt61pci.c | |||
@@ -1874,6 +1874,16 @@ static void rt61pci_write_beacon(struct queue_entry *entry, | |||
1874 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); | 1874 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); |
1875 | 1875 | ||
1876 | /* | 1876 | /* |
1877 | * Write the TX descriptor for the beacon. | ||
1878 | */ | ||
1879 | rt61pci_write_tx_desc(rt2x00dev, entry->skb, txdesc); | ||
1880 | |||
1881 | /* | ||
1882 | * Dump beacon to userspace through debugfs. | ||
1883 | */ | ||
1884 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb); | ||
1885 | |||
1886 | /* | ||
1877 | * Write entire beacon with descriptor to register. | 1887 | * Write entire beacon with descriptor to register. |
1878 | */ | 1888 | */ |
1879 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); | 1889 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); |
@@ -2100,7 +2110,7 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev) | |||
2100 | __set_bit(TXDONE_UNKNOWN, &txdesc.flags); | 2110 | __set_bit(TXDONE_UNKNOWN, &txdesc.flags); |
2101 | txdesc.retry = 0; | 2111 | txdesc.retry = 0; |
2102 | 2112 | ||
2103 | rt2x00lib_txdone(entry_done, &txdesc); | 2113 | rt2x00pci_txdone(entry_done, &txdesc); |
2104 | entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE); | 2114 | entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE); |
2105 | } | 2115 | } |
2106 | 2116 | ||
@@ -2120,7 +2130,7 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev) | |||
2120 | } | 2130 | } |
2121 | txdesc.retry = rt2x00_get_field32(reg, STA_CSR4_RETRY_COUNT); | 2131 | txdesc.retry = rt2x00_get_field32(reg, STA_CSR4_RETRY_COUNT); |
2122 | 2132 | ||
2123 | rt2x00lib_txdone(entry, &txdesc); | 2133 | rt2x00pci_txdone(entry, &txdesc); |
2124 | } | 2134 | } |
2125 | } | 2135 | } |
2126 | 2136 | ||
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h index df80f1af22a4..e2e728ab0b2e 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.h +++ b/drivers/net/wireless/rt2x00/rt61pci.h | |||
@@ -153,13 +153,13 @@ struct hw_key_entry { | |||
153 | u8 key[16]; | 153 | u8 key[16]; |
154 | u8 tx_mic[8]; | 154 | u8 tx_mic[8]; |
155 | u8 rx_mic[8]; | 155 | u8 rx_mic[8]; |
156 | } __attribute__ ((packed)); | 156 | } __packed; |
157 | 157 | ||
158 | struct hw_pairwise_ta_entry { | 158 | struct hw_pairwise_ta_entry { |
159 | u8 address[6]; | 159 | u8 address[6]; |
160 | u8 cipher; | 160 | u8 cipher; |
161 | u8 reserved; | 161 | u8 reserved; |
162 | } __attribute__ ((packed)); | 162 | } __packed; |
163 | 163 | ||
164 | /* | 164 | /* |
165 | * Other on-chip shared memory space. | 165 | * Other on-chip shared memory space. |
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c index 6e0d82efe924..113ad690f9d3 100644 --- a/drivers/net/wireless/rt2x00/rt73usb.c +++ b/drivers/net/wireless/rt2x00/rt73usb.c | |||
@@ -270,7 +270,6 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev, | |||
270 | { | 270 | { |
271 | struct hw_key_entry key_entry; | 271 | struct hw_key_entry key_entry; |
272 | struct rt2x00_field32 field; | 272 | struct rt2x00_field32 field; |
273 | int timeout; | ||
274 | u32 mask; | 273 | u32 mask; |
275 | u32 reg; | 274 | u32 reg; |
276 | 275 | ||
@@ -306,12 +305,8 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev, | |||
306 | sizeof(key_entry.rx_mic)); | 305 | sizeof(key_entry.rx_mic)); |
307 | 306 | ||
308 | reg = SHARED_KEY_ENTRY(key->hw_key_idx); | 307 | reg = SHARED_KEY_ENTRY(key->hw_key_idx); |
309 | timeout = REGISTER_TIMEOUT32(sizeof(key_entry)); | 308 | rt2x00usb_register_multiwrite(rt2x00dev, reg, |
310 | rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE, | 309 | &key_entry, sizeof(key_entry)); |
311 | USB_VENDOR_REQUEST_OUT, reg, | ||
312 | &key_entry, | ||
313 | sizeof(key_entry), | ||
314 | timeout); | ||
315 | 310 | ||
316 | /* | 311 | /* |
317 | * The cipher types are stored over 2 registers. | 312 | * The cipher types are stored over 2 registers. |
@@ -372,7 +367,6 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev, | |||
372 | { | 367 | { |
373 | struct hw_pairwise_ta_entry addr_entry; | 368 | struct hw_pairwise_ta_entry addr_entry; |
374 | struct hw_key_entry key_entry; | 369 | struct hw_key_entry key_entry; |
375 | int timeout; | ||
376 | u32 mask; | 370 | u32 mask; |
377 | u32 reg; | 371 | u32 reg; |
378 | 372 | ||
@@ -407,17 +401,11 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev, | |||
407 | sizeof(key_entry.rx_mic)); | 401 | sizeof(key_entry.rx_mic)); |
408 | 402 | ||
409 | reg = PAIRWISE_KEY_ENTRY(key->hw_key_idx); | 403 | reg = PAIRWISE_KEY_ENTRY(key->hw_key_idx); |
410 | timeout = REGISTER_TIMEOUT32(sizeof(key_entry)); | 404 | rt2x00usb_register_multiwrite(rt2x00dev, reg, |
411 | rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE, | 405 | &key_entry, sizeof(key_entry)); |
412 | USB_VENDOR_REQUEST_OUT, reg, | ||
413 | &key_entry, | ||
414 | sizeof(key_entry), | ||
415 | timeout); | ||
416 | 406 | ||
417 | /* | 407 | /* |
418 | * Send the address and cipher type to the hardware register. | 408 | * Send the address and cipher type to the hardware register. |
419 | * This data fits within the CSR cache size, so we can use | ||
420 | * rt2x00usb_register_multiwrite() directly. | ||
421 | */ | 409 | */ |
422 | memset(&addr_entry, 0, sizeof(addr_entry)); | 410 | memset(&addr_entry, 0, sizeof(addr_entry)); |
423 | memcpy(&addr_entry, crypto->address, ETH_ALEN); | 411 | memcpy(&addr_entry, crypto->address, ETH_ALEN); |
@@ -1092,11 +1080,7 @@ static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, | |||
1092 | /* | 1080 | /* |
1093 | * Write firmware to device. | 1081 | * Write firmware to device. |
1094 | */ | 1082 | */ |
1095 | rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE, | 1083 | rt2x00usb_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE, data, len); |
1096 | USB_VENDOR_REQUEST_OUT, | ||
1097 | FIRMWARE_IMAGE_BASE, | ||
1098 | data, len, | ||
1099 | REGISTER_TIMEOUT32(len)); | ||
1100 | 1084 | ||
1101 | /* | 1085 | /* |
1102 | * Send firmware request to device to load firmware, | 1086 | * Send firmware request to device to load firmware, |
@@ -1442,7 +1426,7 @@ static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1442 | struct txentry_desc *txdesc) | 1426 | struct txentry_desc *txdesc) |
1443 | { | 1427 | { |
1444 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | 1428 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1445 | __le32 *txd = (__le32 *)(skb->data - TXD_DESC_SIZE); | 1429 | __le32 *txd = (__le32 *) skb->data; |
1446 | u32 word; | 1430 | u32 word; |
1447 | 1431 | ||
1448 | /* | 1432 | /* |
@@ -1505,6 +1489,7 @@ static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1505 | /* | 1489 | /* |
1506 | * Register descriptor details in skb frame descriptor. | 1490 | * Register descriptor details in skb frame descriptor. |
1507 | */ | 1491 | */ |
1492 | skbdesc->flags |= SKBDESC_DESC_IN_SKB; | ||
1508 | skbdesc->desc = txd; | 1493 | skbdesc->desc = txd; |
1509 | skbdesc->desc_len = TXD_DESC_SIZE; | 1494 | skbdesc->desc_len = TXD_DESC_SIZE; |
1510 | } | 1495 | } |
@@ -1528,18 +1513,27 @@ static void rt73usb_write_beacon(struct queue_entry *entry, | |||
1528 | rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg); | 1513 | rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg); |
1529 | 1514 | ||
1530 | /* | 1515 | /* |
1531 | * Take the descriptor in front of the skb into account. | 1516 | * Add space for the descriptor in front of the skb. |
1532 | */ | 1517 | */ |
1533 | skb_push(entry->skb, TXD_DESC_SIZE); | 1518 | skb_push(entry->skb, TXD_DESC_SIZE); |
1519 | memset(entry->skb->data, 0, TXD_DESC_SIZE); | ||
1520 | |||
1521 | /* | ||
1522 | * Write the TX descriptor for the beacon. | ||
1523 | */ | ||
1524 | rt73usb_write_tx_desc(rt2x00dev, entry->skb, txdesc); | ||
1525 | |||
1526 | /* | ||
1527 | * Dump beacon to userspace through debugfs. | ||
1528 | */ | ||
1529 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb); | ||
1534 | 1530 | ||
1535 | /* | 1531 | /* |
1536 | * Write entire beacon with descriptor to register. | 1532 | * Write entire beacon with descriptor to register. |
1537 | */ | 1533 | */ |
1538 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); | 1534 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); |
1539 | rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE, | 1535 | rt2x00usb_register_multiwrite(rt2x00dev, beacon_base, |
1540 | USB_VENDOR_REQUEST_OUT, beacon_base, | 1536 | entry->skb->data, entry->skb->len); |
1541 | entry->skb->data, entry->skb->len, | ||
1542 | REGISTER_TIMEOUT32(entry->skb->len)); | ||
1543 | 1537 | ||
1544 | /* | 1538 | /* |
1545 | * Enable beaconing again. | 1539 | * Enable beaconing again. |
diff --git a/drivers/net/wireless/rt2x00/rt73usb.h b/drivers/net/wireless/rt2x00/rt73usb.h index 7abe7eb14555..44d5b2bebd39 100644 --- a/drivers/net/wireless/rt2x00/rt73usb.h +++ b/drivers/net/wireless/rt2x00/rt73usb.h | |||
@@ -108,13 +108,13 @@ struct hw_key_entry { | |||
108 | u8 key[16]; | 108 | u8 key[16]; |
109 | u8 tx_mic[8]; | 109 | u8 tx_mic[8]; |
110 | u8 rx_mic[8]; | 110 | u8 rx_mic[8]; |
111 | } __attribute__ ((packed)); | 111 | } __packed; |
112 | 112 | ||
113 | struct hw_pairwise_ta_entry { | 113 | struct hw_pairwise_ta_entry { |
114 | u8 address[6]; | 114 | u8 address[6]; |
115 | u8 cipher; | 115 | u8 cipher; |
116 | u8 reserved; | 116 | u8 reserved; |
117 | } __attribute__ ((packed)); | 117 | } __packed; |
118 | 118 | ||
119 | /* | 119 | /* |
120 | * Since NULL frame won't be that long (256 byte), | 120 | * Since NULL frame won't be that long (256 byte), |
diff --git a/drivers/net/wireless/rtl818x/rtl8180.h b/drivers/net/wireless/rtl818x/rtl8180.h index 4baf0cf0826f..30523314da43 100644 --- a/drivers/net/wireless/rtl818x/rtl8180.h +++ b/drivers/net/wireless/rtl818x/rtl8180.h | |||
@@ -36,7 +36,7 @@ struct rtl8180_tx_desc { | |||
36 | u8 agc; | 36 | u8 agc; |
37 | u8 flags2; | 37 | u8 flags2; |
38 | u32 reserved[2]; | 38 | u32 reserved[2]; |
39 | } __attribute__ ((packed)); | 39 | } __packed; |
40 | 40 | ||
41 | struct rtl8180_rx_desc { | 41 | struct rtl8180_rx_desc { |
42 | __le32 flags; | 42 | __le32 flags; |
@@ -45,7 +45,7 @@ struct rtl8180_rx_desc { | |||
45 | __le32 rx_buf; | 45 | __le32 rx_buf; |
46 | __le64 tsft; | 46 | __le64 tsft; |
47 | }; | 47 | }; |
48 | } __attribute__ ((packed)); | 48 | } __packed; |
49 | 49 | ||
50 | struct rtl8180_tx_ring { | 50 | struct rtl8180_tx_ring { |
51 | struct rtl8180_tx_desc *desc; | 51 | struct rtl8180_tx_desc *desc; |
diff --git a/drivers/net/wireless/rtl818x/rtl8187.h b/drivers/net/wireless/rtl818x/rtl8187.h index 6bb32112e65c..98878160a65a 100644 --- a/drivers/net/wireless/rtl818x/rtl8187.h +++ b/drivers/net/wireless/rtl818x/rtl8187.h | |||
@@ -47,7 +47,7 @@ struct rtl8187_rx_hdr { | |||
47 | u8 agc; | 47 | u8 agc; |
48 | u8 reserved; | 48 | u8 reserved; |
49 | __le64 mac_time; | 49 | __le64 mac_time; |
50 | } __attribute__((packed)); | 50 | } __packed; |
51 | 51 | ||
52 | struct rtl8187b_rx_hdr { | 52 | struct rtl8187b_rx_hdr { |
53 | __le32 flags; | 53 | __le32 flags; |
@@ -59,7 +59,7 @@ struct rtl8187b_rx_hdr { | |||
59 | __le16 snr_long2end; | 59 | __le16 snr_long2end; |
60 | s8 pwdb_g12; | 60 | s8 pwdb_g12; |
61 | u8 fot; | 61 | u8 fot; |
62 | } __attribute__((packed)); | 62 | } __packed; |
63 | 63 | ||
64 | /* {rtl8187,rtl8187b}_tx_info is in skb */ | 64 | /* {rtl8187,rtl8187b}_tx_info is in skb */ |
65 | 65 | ||
@@ -68,7 +68,7 @@ struct rtl8187_tx_hdr { | |||
68 | __le16 rts_duration; | 68 | __le16 rts_duration; |
69 | __le16 len; | 69 | __le16 len; |
70 | __le32 retry; | 70 | __le32 retry; |
71 | } __attribute__((packed)); | 71 | } __packed; |
72 | 72 | ||
73 | struct rtl8187b_tx_hdr { | 73 | struct rtl8187b_tx_hdr { |
74 | __le32 flags; | 74 | __le32 flags; |
@@ -80,7 +80,7 @@ struct rtl8187b_tx_hdr { | |||
80 | __le32 unused_3; | 80 | __le32 unused_3; |
81 | __le32 retry; | 81 | __le32 retry; |
82 | __le32 unused_4[2]; | 82 | __le32 unused_4[2]; |
83 | } __attribute__((packed)); | 83 | } __packed; |
84 | 84 | ||
85 | enum { | 85 | enum { |
86 | DEVICE_RTL8187, | 86 | DEVICE_RTL8187, |
diff --git a/drivers/net/wireless/rtl818x/rtl818x.h b/drivers/net/wireless/rtl818x/rtl818x.h index 8522490d2e29..978519d1ff4c 100644 --- a/drivers/net/wireless/rtl818x/rtl818x.h +++ b/drivers/net/wireless/rtl818x/rtl818x.h | |||
@@ -185,7 +185,7 @@ struct rtl818x_csr { | |||
185 | u8 reserved_22[4]; | 185 | u8 reserved_22[4]; |
186 | __le16 TALLY_CNT; | 186 | __le16 TALLY_CNT; |
187 | u8 TALLY_SEL; | 187 | u8 TALLY_SEL; |
188 | } __attribute__((packed)); | 188 | } __packed; |
189 | 189 | ||
190 | struct rtl818x_rf_ops { | 190 | struct rtl818x_rf_ops { |
191 | char *name; | 191 | char *name; |
diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig index 337fc7bec5a5..2f98058be451 100644 --- a/drivers/net/wireless/wl12xx/Kconfig +++ b/drivers/net/wireless/wl12xx/Kconfig | |||
@@ -41,7 +41,7 @@ config WL1251_SDIO | |||
41 | 41 | ||
42 | config WL1271 | 42 | config WL1271 |
43 | tristate "TI wl1271 support" | 43 | tristate "TI wl1271 support" |
44 | depends on WL12XX && SPI_MASTER && GENERIC_HARDIRQS | 44 | depends on WL12XX && GENERIC_HARDIRQS |
45 | depends on INET | 45 | depends on INET |
46 | select FW_LOADER | 46 | select FW_LOADER |
47 | select CRC7 | 47 | select CRC7 |
@@ -65,7 +65,7 @@ config WL1271_SPI | |||
65 | 65 | ||
66 | config WL1271_SDIO | 66 | config WL1271_SDIO |
67 | tristate "TI wl1271 SDIO support" | 67 | tristate "TI wl1271 SDIO support" |
68 | depends on WL1271 && MMC && ARM | 68 | depends on WL1271 && MMC |
69 | ---help--- | 69 | ---help--- |
70 | This module adds support for the SDIO interface of adapters using | 70 | This module adds support for the SDIO interface of adapters using |
71 | TI wl1271 chipset. Select this if your platform is using | 71 | TI wl1271 chipset. Select this if your platform is using |
diff --git a/drivers/net/wireless/wl12xx/wl1251_acx.h b/drivers/net/wireless/wl12xx/wl1251_acx.h index 26160c45784c..842df310d92a 100644 --- a/drivers/net/wireless/wl12xx/wl1251_acx.h +++ b/drivers/net/wireless/wl12xx/wl1251_acx.h | |||
@@ -60,7 +60,7 @@ struct acx_error_counter { | |||
60 | /* the number of missed sequence numbers in the squentially */ | 60 | /* the number of missed sequence numbers in the squentially */ |
61 | /* values of frames seq numbers */ | 61 | /* values of frames seq numbers */ |
62 | u32 seq_num_miss; | 62 | u32 seq_num_miss; |
63 | } __attribute__ ((packed)); | 63 | } __packed; |
64 | 64 | ||
65 | struct acx_revision { | 65 | struct acx_revision { |
66 | struct acx_header header; | 66 | struct acx_header header; |
@@ -89,7 +89,7 @@ struct acx_revision { | |||
89 | * bits 24 - 31: Chip ID - The WiLink chip ID. | 89 | * bits 24 - 31: Chip ID - The WiLink chip ID. |
90 | */ | 90 | */ |
91 | u32 hw_version; | 91 | u32 hw_version; |
92 | } __attribute__ ((packed)); | 92 | } __packed; |
93 | 93 | ||
94 | enum wl1251_psm_mode { | 94 | enum wl1251_psm_mode { |
95 | /* Active mode */ | 95 | /* Active mode */ |
@@ -111,7 +111,7 @@ struct acx_sleep_auth { | |||
111 | /* 2 - ELP mode: Deep / Max sleep*/ | 111 | /* 2 - ELP mode: Deep / Max sleep*/ |
112 | u8 sleep_auth; | 112 | u8 sleep_auth; |
113 | u8 padding[3]; | 113 | u8 padding[3]; |
114 | } __attribute__ ((packed)); | 114 | } __packed; |
115 | 115 | ||
116 | enum { | 116 | enum { |
117 | HOSTIF_PCI_MASTER_HOST_INDIRECT, | 117 | HOSTIF_PCI_MASTER_HOST_INDIRECT, |
@@ -159,7 +159,7 @@ struct acx_data_path_params { | |||
159 | * complete ring until an interrupt is generated. | 159 | * complete ring until an interrupt is generated. |
160 | */ | 160 | */ |
161 | u32 tx_complete_timeout; | 161 | u32 tx_complete_timeout; |
162 | } __attribute__ ((packed)); | 162 | } __packed; |
163 | 163 | ||
164 | 164 | ||
165 | struct acx_data_path_params_resp { | 165 | struct acx_data_path_params_resp { |
@@ -180,7 +180,7 @@ struct acx_data_path_params_resp { | |||
180 | u32 tx_control_addr; | 180 | u32 tx_control_addr; |
181 | 181 | ||
182 | u32 tx_complete_addr; | 182 | u32 tx_complete_addr; |
183 | } __attribute__ ((packed)); | 183 | } __packed; |
184 | 184 | ||
185 | #define TX_MSDU_LIFETIME_MIN 0 | 185 | #define TX_MSDU_LIFETIME_MIN 0 |
186 | #define TX_MSDU_LIFETIME_MAX 3000 | 186 | #define TX_MSDU_LIFETIME_MAX 3000 |
@@ -197,7 +197,7 @@ struct acx_rx_msdu_lifetime { | |||
197 | * firmware discards the MSDU. | 197 | * firmware discards the MSDU. |
198 | */ | 198 | */ |
199 | u32 lifetime; | 199 | u32 lifetime; |
200 | } __attribute__ ((packed)); | 200 | } __packed; |
201 | 201 | ||
202 | /* | 202 | /* |
203 | * RX Config Options Table | 203 | * RX Config Options Table |
@@ -285,7 +285,7 @@ struct acx_rx_config { | |||
285 | 285 | ||
286 | u32 config_options; | 286 | u32 config_options; |
287 | u32 filter_options; | 287 | u32 filter_options; |
288 | } __attribute__ ((packed)); | 288 | } __packed; |
289 | 289 | ||
290 | enum { | 290 | enum { |
291 | QOS_AC_BE = 0, | 291 | QOS_AC_BE = 0, |
@@ -325,13 +325,13 @@ struct acx_tx_queue_qos_config { | |||
325 | 325 | ||
326 | /* Lowest memory blocks guaranteed for this queue */ | 326 | /* Lowest memory blocks guaranteed for this queue */ |
327 | u16 low_threshold; | 327 | u16 low_threshold; |
328 | } __attribute__ ((packed)); | 328 | } __packed; |
329 | 329 | ||
330 | struct acx_packet_detection { | 330 | struct acx_packet_detection { |
331 | struct acx_header header; | 331 | struct acx_header header; |
332 | 332 | ||
333 | u32 threshold; | 333 | u32 threshold; |
334 | } __attribute__ ((packed)); | 334 | } __packed; |
335 | 335 | ||
336 | 336 | ||
337 | enum acx_slot_type { | 337 | enum acx_slot_type { |
@@ -349,7 +349,7 @@ struct acx_slot { | |||
349 | u8 wone_index; /* Reserved */ | 349 | u8 wone_index; /* Reserved */ |
350 | u8 slot_time; | 350 | u8 slot_time; |
351 | u8 reserved[6]; | 351 | u8 reserved[6]; |
352 | } __attribute__ ((packed)); | 352 | } __packed; |
353 | 353 | ||
354 | 354 | ||
355 | #define ADDRESS_GROUP_MAX (8) | 355 | #define ADDRESS_GROUP_MAX (8) |
@@ -362,7 +362,7 @@ struct acx_dot11_grp_addr_tbl { | |||
362 | u8 num_groups; | 362 | u8 num_groups; |
363 | u8 pad[2]; | 363 | u8 pad[2]; |
364 | u8 mac_table[ADDRESS_GROUP_MAX_LEN]; | 364 | u8 mac_table[ADDRESS_GROUP_MAX_LEN]; |
365 | } __attribute__ ((packed)); | 365 | } __packed; |
366 | 366 | ||
367 | 367 | ||
368 | #define RX_TIMEOUT_PS_POLL_MIN 0 | 368 | #define RX_TIMEOUT_PS_POLL_MIN 0 |
@@ -388,7 +388,7 @@ struct acx_rx_timeout { | |||
388 | * from an UPSD enabled queue. | 388 | * from an UPSD enabled queue. |
389 | */ | 389 | */ |
390 | u16 upsd_timeout; | 390 | u16 upsd_timeout; |
391 | } __attribute__ ((packed)); | 391 | } __packed; |
392 | 392 | ||
393 | #define RTS_THRESHOLD_MIN 0 | 393 | #define RTS_THRESHOLD_MIN 0 |
394 | #define RTS_THRESHOLD_MAX 4096 | 394 | #define RTS_THRESHOLD_MAX 4096 |
@@ -399,7 +399,7 @@ struct acx_rts_threshold { | |||
399 | 399 | ||
400 | u16 threshold; | 400 | u16 threshold; |
401 | u8 pad[2]; | 401 | u8 pad[2]; |
402 | } __attribute__ ((packed)); | 402 | } __packed; |
403 | 403 | ||
404 | struct acx_beacon_filter_option { | 404 | struct acx_beacon_filter_option { |
405 | struct acx_header header; | 405 | struct acx_header header; |
@@ -415,7 +415,7 @@ struct acx_beacon_filter_option { | |||
415 | */ | 415 | */ |
416 | u8 max_num_beacons; | 416 | u8 max_num_beacons; |
417 | u8 pad[2]; | 417 | u8 pad[2]; |
418 | } __attribute__ ((packed)); | 418 | } __packed; |
419 | 419 | ||
420 | /* | 420 | /* |
421 | * ACXBeaconFilterEntry (not 221) | 421 | * ACXBeaconFilterEntry (not 221) |
@@ -461,7 +461,7 @@ struct acx_beacon_filter_ie_table { | |||
461 | u8 num_ie; | 461 | u8 num_ie; |
462 | u8 table[BEACON_FILTER_TABLE_MAX_SIZE]; | 462 | u8 table[BEACON_FILTER_TABLE_MAX_SIZE]; |
463 | u8 pad[3]; | 463 | u8 pad[3]; |
464 | } __attribute__ ((packed)); | 464 | } __packed; |
465 | 465 | ||
466 | #define SYNCH_FAIL_DEFAULT_THRESHOLD 10 /* number of beacons */ | 466 | #define SYNCH_FAIL_DEFAULT_THRESHOLD 10 /* number of beacons */ |
467 | #define NO_BEACON_DEFAULT_TIMEOUT (500) /* in microseconds */ | 467 | #define NO_BEACON_DEFAULT_TIMEOUT (500) /* in microseconds */ |
@@ -494,7 +494,7 @@ struct acx_bt_wlan_coex { | |||
494 | */ | 494 | */ |
495 | u8 enable; | 495 | u8 enable; |
496 | u8 pad[3]; | 496 | u8 pad[3]; |
497 | } __attribute__ ((packed)); | 497 | } __packed; |
498 | 498 | ||
499 | #define PTA_ANTENNA_TYPE_DEF (0) | 499 | #define PTA_ANTENNA_TYPE_DEF (0) |
500 | #define PTA_BT_HP_MAXTIME_DEF (2000) | 500 | #define PTA_BT_HP_MAXTIME_DEF (2000) |
@@ -648,7 +648,7 @@ struct acx_bt_wlan_coex_param { | |||
648 | 648 | ||
649 | /* range: 0 - 20 default: 1 */ | 649 | /* range: 0 - 20 default: 1 */ |
650 | u8 bt_hp_respected_num; | 650 | u8 bt_hp_respected_num; |
651 | } __attribute__ ((packed)); | 651 | } __packed; |
652 | 652 | ||
653 | #define CCA_THRSH_ENABLE_ENERGY_D 0x140A | 653 | #define CCA_THRSH_ENABLE_ENERGY_D 0x140A |
654 | #define CCA_THRSH_DISABLE_ENERGY_D 0xFFEF | 654 | #define CCA_THRSH_DISABLE_ENERGY_D 0xFFEF |
@@ -660,7 +660,7 @@ struct acx_energy_detection { | |||
660 | u16 rx_cca_threshold; | 660 | u16 rx_cca_threshold; |
661 | u8 tx_energy_detection; | 661 | u8 tx_energy_detection; |
662 | u8 pad; | 662 | u8 pad; |
663 | } __attribute__ ((packed)); | 663 | } __packed; |
664 | 664 | ||
665 | #define BCN_RX_TIMEOUT_DEF_VALUE 10000 | 665 | #define BCN_RX_TIMEOUT_DEF_VALUE 10000 |
666 | #define BROADCAST_RX_TIMEOUT_DEF_VALUE 20000 | 666 | #define BROADCAST_RX_TIMEOUT_DEF_VALUE 20000 |
@@ -679,14 +679,14 @@ struct acx_beacon_broadcast { | |||
679 | /* Consecutive PS Poll failures before updating the host */ | 679 | /* Consecutive PS Poll failures before updating the host */ |
680 | u8 ps_poll_threshold; | 680 | u8 ps_poll_threshold; |
681 | u8 pad[2]; | 681 | u8 pad[2]; |
682 | } __attribute__ ((packed)); | 682 | } __packed; |
683 | 683 | ||
684 | struct acx_event_mask { | 684 | struct acx_event_mask { |
685 | struct acx_header header; | 685 | struct acx_header header; |
686 | 686 | ||
687 | u32 event_mask; | 687 | u32 event_mask; |
688 | u32 high_event_mask; /* Unused */ | 688 | u32 high_event_mask; /* Unused */ |
689 | } __attribute__ ((packed)); | 689 | } __packed; |
690 | 690 | ||
691 | #define CFG_RX_FCS BIT(2) | 691 | #define CFG_RX_FCS BIT(2) |
692 | #define CFG_RX_ALL_GOOD BIT(3) | 692 | #define CFG_RX_ALL_GOOD BIT(3) |
@@ -729,7 +729,7 @@ struct acx_fw_gen_frame_rates { | |||
729 | u8 tx_ctrl_frame_mod; /* CCK_* or PBCC_* */ | 729 | u8 tx_ctrl_frame_mod; /* CCK_* or PBCC_* */ |
730 | u8 tx_mgt_frame_rate; | 730 | u8 tx_mgt_frame_rate; |
731 | u8 tx_mgt_frame_mod; | 731 | u8 tx_mgt_frame_mod; |
732 | } __attribute__ ((packed)); | 732 | } __packed; |
733 | 733 | ||
734 | /* STA MAC */ | 734 | /* STA MAC */ |
735 | struct acx_dot11_station_id { | 735 | struct acx_dot11_station_id { |
@@ -737,28 +737,28 @@ struct acx_dot11_station_id { | |||
737 | 737 | ||
738 | u8 mac[ETH_ALEN]; | 738 | u8 mac[ETH_ALEN]; |
739 | u8 pad[2]; | 739 | u8 pad[2]; |
740 | } __attribute__ ((packed)); | 740 | } __packed; |
741 | 741 | ||
742 | struct acx_feature_config { | 742 | struct acx_feature_config { |
743 | struct acx_header header; | 743 | struct acx_header header; |
744 | 744 | ||
745 | u32 options; | 745 | u32 options; |
746 | u32 data_flow_options; | 746 | u32 data_flow_options; |
747 | } __attribute__ ((packed)); | 747 | } __packed; |
748 | 748 | ||
749 | struct acx_current_tx_power { | 749 | struct acx_current_tx_power { |
750 | struct acx_header header; | 750 | struct acx_header header; |
751 | 751 | ||
752 | u8 current_tx_power; | 752 | u8 current_tx_power; |
753 | u8 padding[3]; | 753 | u8 padding[3]; |
754 | } __attribute__ ((packed)); | 754 | } __packed; |
755 | 755 | ||
756 | struct acx_dot11_default_key { | 756 | struct acx_dot11_default_key { |
757 | struct acx_header header; | 757 | struct acx_header header; |
758 | 758 | ||
759 | u8 id; | 759 | u8 id; |
760 | u8 pad[3]; | 760 | u8 pad[3]; |
761 | } __attribute__ ((packed)); | 761 | } __packed; |
762 | 762 | ||
763 | struct acx_tsf_info { | 763 | struct acx_tsf_info { |
764 | struct acx_header header; | 764 | struct acx_header header; |
@@ -769,7 +769,7 @@ struct acx_tsf_info { | |||
769 | u32 last_TBTT_lsb; | 769 | u32 last_TBTT_lsb; |
770 | u8 last_dtim_count; | 770 | u8 last_dtim_count; |
771 | u8 pad[3]; | 771 | u8 pad[3]; |
772 | } __attribute__ ((packed)); | 772 | } __packed; |
773 | 773 | ||
774 | enum acx_wake_up_event { | 774 | enum acx_wake_up_event { |
775 | WAKE_UP_EVENT_BEACON_BITMAP = 0x01, /* Wake on every Beacon*/ | 775 | WAKE_UP_EVENT_BEACON_BITMAP = 0x01, /* Wake on every Beacon*/ |
@@ -785,7 +785,7 @@ struct acx_wake_up_condition { | |||
785 | u8 wake_up_event; /* Only one bit can be set */ | 785 | u8 wake_up_event; /* Only one bit can be set */ |
786 | u8 listen_interval; | 786 | u8 listen_interval; |
787 | u8 pad[2]; | 787 | u8 pad[2]; |
788 | } __attribute__ ((packed)); | 788 | } __packed; |
789 | 789 | ||
790 | struct acx_aid { | 790 | struct acx_aid { |
791 | struct acx_header header; | 791 | struct acx_header header; |
@@ -795,7 +795,7 @@ struct acx_aid { | |||
795 | */ | 795 | */ |
796 | u16 aid; | 796 | u16 aid; |
797 | u8 pad[2]; | 797 | u8 pad[2]; |
798 | } __attribute__ ((packed)); | 798 | } __packed; |
799 | 799 | ||
800 | enum acx_preamble_type { | 800 | enum acx_preamble_type { |
801 | ACX_PREAMBLE_LONG = 0, | 801 | ACX_PREAMBLE_LONG = 0, |
@@ -811,7 +811,7 @@ struct acx_preamble { | |||
811 | */ | 811 | */ |
812 | u8 preamble; | 812 | u8 preamble; |
813 | u8 padding[3]; | 813 | u8 padding[3]; |
814 | } __attribute__ ((packed)); | 814 | } __packed; |
815 | 815 | ||
816 | enum acx_ctsprotect_type { | 816 | enum acx_ctsprotect_type { |
817 | CTSPROTECT_DISABLE = 0, | 817 | CTSPROTECT_DISABLE = 0, |
@@ -822,11 +822,11 @@ struct acx_ctsprotect { | |||
822 | struct acx_header header; | 822 | struct acx_header header; |
823 | u8 ctsprotect; | 823 | u8 ctsprotect; |
824 | u8 padding[3]; | 824 | u8 padding[3]; |
825 | } __attribute__ ((packed)); | 825 | } __packed; |
826 | 826 | ||
827 | struct acx_tx_statistics { | 827 | struct acx_tx_statistics { |
828 | u32 internal_desc_overflow; | 828 | u32 internal_desc_overflow; |
829 | } __attribute__ ((packed)); | 829 | } __packed; |
830 | 830 | ||
831 | struct acx_rx_statistics { | 831 | struct acx_rx_statistics { |
832 | u32 out_of_mem; | 832 | u32 out_of_mem; |
@@ -837,14 +837,14 @@ struct acx_rx_statistics { | |||
837 | u32 xfr_hint_trig; | 837 | u32 xfr_hint_trig; |
838 | u32 path_reset; | 838 | u32 path_reset; |
839 | u32 reset_counter; | 839 | u32 reset_counter; |
840 | } __attribute__ ((packed)); | 840 | } __packed; |
841 | 841 | ||
842 | struct acx_dma_statistics { | 842 | struct acx_dma_statistics { |
843 | u32 rx_requested; | 843 | u32 rx_requested; |
844 | u32 rx_errors; | 844 | u32 rx_errors; |
845 | u32 tx_requested; | 845 | u32 tx_requested; |
846 | u32 tx_errors; | 846 | u32 tx_errors; |
847 | } __attribute__ ((packed)); | 847 | } __packed; |
848 | 848 | ||
849 | struct acx_isr_statistics { | 849 | struct acx_isr_statistics { |
850 | /* host command complete */ | 850 | /* host command complete */ |
@@ -903,7 +903,7 @@ struct acx_isr_statistics { | |||
903 | 903 | ||
904 | /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */ | 904 | /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */ |
905 | u32 low_rssi; | 905 | u32 low_rssi; |
906 | } __attribute__ ((packed)); | 906 | } __packed; |
907 | 907 | ||
908 | struct acx_wep_statistics { | 908 | struct acx_wep_statistics { |
909 | /* WEP address keys configured */ | 909 | /* WEP address keys configured */ |
@@ -925,7 +925,7 @@ struct acx_wep_statistics { | |||
925 | 925 | ||
926 | /* WEP decrypt interrupts */ | 926 | /* WEP decrypt interrupts */ |
927 | u32 interrupt; | 927 | u32 interrupt; |
928 | } __attribute__ ((packed)); | 928 | } __packed; |
929 | 929 | ||
930 | #define ACX_MISSED_BEACONS_SPREAD 10 | 930 | #define ACX_MISSED_BEACONS_SPREAD 10 |
931 | 931 | ||
@@ -985,12 +985,12 @@ struct acx_pwr_statistics { | |||
985 | 985 | ||
986 | /* the number of beacons in awake mode */ | 986 | /* the number of beacons in awake mode */ |
987 | u32 rcvd_awake_beacons; | 987 | u32 rcvd_awake_beacons; |
988 | } __attribute__ ((packed)); | 988 | } __packed; |
989 | 989 | ||
990 | struct acx_mic_statistics { | 990 | struct acx_mic_statistics { |
991 | u32 rx_pkts; | 991 | u32 rx_pkts; |
992 | u32 calc_failure; | 992 | u32 calc_failure; |
993 | } __attribute__ ((packed)); | 993 | } __packed; |
994 | 994 | ||
995 | struct acx_aes_statistics { | 995 | struct acx_aes_statistics { |
996 | u32 encrypt_fail; | 996 | u32 encrypt_fail; |
@@ -999,7 +999,7 @@ struct acx_aes_statistics { | |||
999 | u32 decrypt_packets; | 999 | u32 decrypt_packets; |
1000 | u32 encrypt_interrupt; | 1000 | u32 encrypt_interrupt; |
1001 | u32 decrypt_interrupt; | 1001 | u32 decrypt_interrupt; |
1002 | } __attribute__ ((packed)); | 1002 | } __packed; |
1003 | 1003 | ||
1004 | struct acx_event_statistics { | 1004 | struct acx_event_statistics { |
1005 | u32 heart_beat; | 1005 | u32 heart_beat; |
@@ -1010,7 +1010,7 @@ struct acx_event_statistics { | |||
1010 | u32 oom_late; | 1010 | u32 oom_late; |
1011 | u32 phy_transmit_error; | 1011 | u32 phy_transmit_error; |
1012 | u32 tx_stuck; | 1012 | u32 tx_stuck; |
1013 | } __attribute__ ((packed)); | 1013 | } __packed; |
1014 | 1014 | ||
1015 | struct acx_ps_statistics { | 1015 | struct acx_ps_statistics { |
1016 | u32 pspoll_timeouts; | 1016 | u32 pspoll_timeouts; |
@@ -1020,7 +1020,7 @@ struct acx_ps_statistics { | |||
1020 | u32 pspoll_max_apturn; | 1020 | u32 pspoll_max_apturn; |
1021 | u32 pspoll_utilization; | 1021 | u32 pspoll_utilization; |
1022 | u32 upsd_utilization; | 1022 | u32 upsd_utilization; |
1023 | } __attribute__ ((packed)); | 1023 | } __packed; |
1024 | 1024 | ||
1025 | struct acx_rxpipe_statistics { | 1025 | struct acx_rxpipe_statistics { |
1026 | u32 rx_prep_beacon_drop; | 1026 | u32 rx_prep_beacon_drop; |
@@ -1028,7 +1028,7 @@ struct acx_rxpipe_statistics { | |||
1028 | u32 beacon_buffer_thres_host_int_trig_rx_data; | 1028 | u32 beacon_buffer_thres_host_int_trig_rx_data; |
1029 | u32 missed_beacon_host_int_trig_rx_data; | 1029 | u32 missed_beacon_host_int_trig_rx_data; |
1030 | u32 tx_xfr_host_int_trig_rx_data; | 1030 | u32 tx_xfr_host_int_trig_rx_data; |
1031 | } __attribute__ ((packed)); | 1031 | } __packed; |
1032 | 1032 | ||
1033 | struct acx_statistics { | 1033 | struct acx_statistics { |
1034 | struct acx_header header; | 1034 | struct acx_header header; |
@@ -1044,7 +1044,7 @@ struct acx_statistics { | |||
1044 | struct acx_event_statistics event; | 1044 | struct acx_event_statistics event; |
1045 | struct acx_ps_statistics ps; | 1045 | struct acx_ps_statistics ps; |
1046 | struct acx_rxpipe_statistics rxpipe; | 1046 | struct acx_rxpipe_statistics rxpipe; |
1047 | } __attribute__ ((packed)); | 1047 | } __packed; |
1048 | 1048 | ||
1049 | #define ACX_MAX_RATE_CLASSES 8 | 1049 | #define ACX_MAX_RATE_CLASSES 8 |
1050 | #define ACX_RATE_MASK_UNSPECIFIED 0 | 1050 | #define ACX_RATE_MASK_UNSPECIFIED 0 |
@@ -1063,7 +1063,7 @@ struct acx_rate_policy { | |||
1063 | 1063 | ||
1064 | u32 rate_class_cnt; | 1064 | u32 rate_class_cnt; |
1065 | struct acx_rate_class rate_class[ACX_MAX_RATE_CLASSES]; | 1065 | struct acx_rate_class rate_class[ACX_MAX_RATE_CLASSES]; |
1066 | } __attribute__ ((packed)); | 1066 | } __packed; |
1067 | 1067 | ||
1068 | struct wl1251_acx_memory { | 1068 | struct wl1251_acx_memory { |
1069 | __le16 num_stations; /* number of STAs to be supported. */ | 1069 | __le16 num_stations; /* number of STAs to be supported. */ |
@@ -1082,7 +1082,7 @@ struct wl1251_acx_memory { | |||
1082 | u8 tx_min_mem_block_num; | 1082 | u8 tx_min_mem_block_num; |
1083 | u8 num_ssid_profiles; | 1083 | u8 num_ssid_profiles; |
1084 | __le16 debug_buffer_size; | 1084 | __le16 debug_buffer_size; |
1085 | } __attribute__ ((packed)); | 1085 | } __packed; |
1086 | 1086 | ||
1087 | 1087 | ||
1088 | #define ACX_RX_DESC_MIN 1 | 1088 | #define ACX_RX_DESC_MIN 1 |
@@ -1094,7 +1094,7 @@ struct wl1251_acx_rx_queue_config { | |||
1094 | u8 type; | 1094 | u8 type; |
1095 | u8 priority; | 1095 | u8 priority; |
1096 | __le32 dma_address; | 1096 | __le32 dma_address; |
1097 | } __attribute__ ((packed)); | 1097 | } __packed; |
1098 | 1098 | ||
1099 | #define ACX_TX_DESC_MIN 1 | 1099 | #define ACX_TX_DESC_MIN 1 |
1100 | #define ACX_TX_DESC_MAX 127 | 1100 | #define ACX_TX_DESC_MAX 127 |
@@ -1103,7 +1103,7 @@ struct wl1251_acx_tx_queue_config { | |||
1103 | u8 num_descs; | 1103 | u8 num_descs; |
1104 | u8 pad[2]; | 1104 | u8 pad[2]; |
1105 | u8 attributes; | 1105 | u8 attributes; |
1106 | } __attribute__ ((packed)); | 1106 | } __packed; |
1107 | 1107 | ||
1108 | #define MAX_TX_QUEUE_CONFIGS 5 | 1108 | #define MAX_TX_QUEUE_CONFIGS 5 |
1109 | #define MAX_TX_QUEUES 4 | 1109 | #define MAX_TX_QUEUES 4 |
@@ -1113,7 +1113,7 @@ struct wl1251_acx_config_memory { | |||
1113 | struct wl1251_acx_memory mem_config; | 1113 | struct wl1251_acx_memory mem_config; |
1114 | struct wl1251_acx_rx_queue_config rx_queue_config; | 1114 | struct wl1251_acx_rx_queue_config rx_queue_config; |
1115 | struct wl1251_acx_tx_queue_config tx_queue_config[MAX_TX_QUEUE_CONFIGS]; | 1115 | struct wl1251_acx_tx_queue_config tx_queue_config[MAX_TX_QUEUE_CONFIGS]; |
1116 | } __attribute__ ((packed)); | 1116 | } __packed; |
1117 | 1117 | ||
1118 | struct wl1251_acx_mem_map { | 1118 | struct wl1251_acx_mem_map { |
1119 | struct acx_header header; | 1119 | struct acx_header header; |
@@ -1147,7 +1147,7 @@ struct wl1251_acx_mem_map { | |||
1147 | 1147 | ||
1148 | /* Number of blocks FW allocated for RX packets */ | 1148 | /* Number of blocks FW allocated for RX packets */ |
1149 | u32 num_rx_mem_blocks; | 1149 | u32 num_rx_mem_blocks; |
1150 | } __attribute__ ((packed)); | 1150 | } __packed; |
1151 | 1151 | ||
1152 | 1152 | ||
1153 | struct wl1251_acx_wr_tbtt_and_dtim { | 1153 | struct wl1251_acx_wr_tbtt_and_dtim { |
@@ -1164,7 +1164,7 @@ struct wl1251_acx_wr_tbtt_and_dtim { | |||
1164 | */ | 1164 | */ |
1165 | u8 dtim; | 1165 | u8 dtim; |
1166 | u8 padding; | 1166 | u8 padding; |
1167 | } __attribute__ ((packed)); | 1167 | } __packed; |
1168 | 1168 | ||
1169 | struct wl1251_acx_ac_cfg { | 1169 | struct wl1251_acx_ac_cfg { |
1170 | struct acx_header header; | 1170 | struct acx_header header; |
@@ -1194,7 +1194,7 @@ struct wl1251_acx_ac_cfg { | |||
1194 | 1194 | ||
1195 | /* The TX Op Limit (in microseconds) for the access class. */ | 1195 | /* The TX Op Limit (in microseconds) for the access class. */ |
1196 | u16 txop_limit; | 1196 | u16 txop_limit; |
1197 | } __attribute__ ((packed)); | 1197 | } __packed; |
1198 | 1198 | ||
1199 | 1199 | ||
1200 | enum wl1251_acx_channel_type { | 1200 | enum wl1251_acx_channel_type { |
@@ -1245,7 +1245,7 @@ struct wl1251_acx_tid_cfg { | |||
1245 | 1245 | ||
1246 | /* not supported */ | 1246 | /* not supported */ |
1247 | u32 apsdconf[2]; | 1247 | u32 apsdconf[2]; |
1248 | } __attribute__ ((packed)); | 1248 | } __packed; |
1249 | 1249 | ||
1250 | /************************************************************************* | 1250 | /************************************************************************* |
1251 | 1251 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1251_cmd.h b/drivers/net/wireless/wl12xx/wl1251_cmd.h index 4ad67cae94d2..7e70dd5a21b8 100644 --- a/drivers/net/wireless/wl12xx/wl1251_cmd.h +++ b/drivers/net/wireless/wl12xx/wl1251_cmd.h | |||
@@ -106,7 +106,7 @@ struct wl1251_cmd_header { | |||
106 | u16 status; | 106 | u16 status; |
107 | /* payload */ | 107 | /* payload */ |
108 | u8 data[0]; | 108 | u8 data[0]; |
109 | } __attribute__ ((packed)); | 109 | } __packed; |
110 | 110 | ||
111 | struct wl1251_command { | 111 | struct wl1251_command { |
112 | struct wl1251_cmd_header header; | 112 | struct wl1251_cmd_header header; |
@@ -201,7 +201,7 @@ struct wl1251_scan_parameters { | |||
201 | u8 ssid_len; | 201 | u8 ssid_len; |
202 | u8 ssid[32]; | 202 | u8 ssid[32]; |
203 | 203 | ||
204 | } __attribute__ ((packed)); | 204 | } __packed; |
205 | 205 | ||
206 | struct wl1251_scan_ch_parameters { | 206 | struct wl1251_scan_ch_parameters { |
207 | u32 min_duration; /* in TU */ | 207 | u32 min_duration; /* in TU */ |
@@ -218,7 +218,7 @@ struct wl1251_scan_ch_parameters { | |||
218 | u8 tx_power_att; | 218 | u8 tx_power_att; |
219 | u8 channel; | 219 | u8 channel; |
220 | u8 pad[3]; | 220 | u8 pad[3]; |
221 | } __attribute__ ((packed)); | 221 | } __packed; |
222 | 222 | ||
223 | /* SCAN parameters */ | 223 | /* SCAN parameters */ |
224 | #define SCAN_MAX_NUM_OF_CHANNELS 16 | 224 | #define SCAN_MAX_NUM_OF_CHANNELS 16 |
@@ -228,7 +228,7 @@ struct wl1251_cmd_scan { | |||
228 | 228 | ||
229 | struct wl1251_scan_parameters params; | 229 | struct wl1251_scan_parameters params; |
230 | struct wl1251_scan_ch_parameters channels[SCAN_MAX_NUM_OF_CHANNELS]; | 230 | struct wl1251_scan_ch_parameters channels[SCAN_MAX_NUM_OF_CHANNELS]; |
231 | } __attribute__ ((packed)); | 231 | } __packed; |
232 | 232 | ||
233 | enum { | 233 | enum { |
234 | BSS_TYPE_IBSS = 0, | 234 | BSS_TYPE_IBSS = 0, |
@@ -276,14 +276,14 @@ struct cmd_join { | |||
276 | u8 tx_mgt_frame_rate; /* OBSOLETE */ | 276 | u8 tx_mgt_frame_rate; /* OBSOLETE */ |
277 | u8 tx_mgt_frame_mod; /* OBSOLETE */ | 277 | u8 tx_mgt_frame_mod; /* OBSOLETE */ |
278 | u8 reserved; | 278 | u8 reserved; |
279 | } __attribute__ ((packed)); | 279 | } __packed; |
280 | 280 | ||
281 | struct cmd_enabledisable_path { | 281 | struct cmd_enabledisable_path { |
282 | struct wl1251_cmd_header header; | 282 | struct wl1251_cmd_header header; |
283 | 283 | ||
284 | u8 channel; | 284 | u8 channel; |
285 | u8 padding[3]; | 285 | u8 padding[3]; |
286 | } __attribute__ ((packed)); | 286 | } __packed; |
287 | 287 | ||
288 | #define WL1251_MAX_TEMPLATE_SIZE 300 | 288 | #define WL1251_MAX_TEMPLATE_SIZE 300 |
289 | 289 | ||
@@ -292,7 +292,7 @@ struct wl1251_cmd_packet_template { | |||
292 | 292 | ||
293 | __le16 size; | 293 | __le16 size; |
294 | u8 data[0]; | 294 | u8 data[0]; |
295 | } __attribute__ ((packed)); | 295 | } __packed; |
296 | 296 | ||
297 | #define TIM_ELE_ID 5 | 297 | #define TIM_ELE_ID 5 |
298 | #define PARTIAL_VBM_MAX 251 | 298 | #define PARTIAL_VBM_MAX 251 |
@@ -304,7 +304,7 @@ struct wl1251_tim { | |||
304 | u8 dtim_period; | 304 | u8 dtim_period; |
305 | u8 bitmap_ctrl; | 305 | u8 bitmap_ctrl; |
306 | u8 pvb_field[PARTIAL_VBM_MAX]; /* Partial Virtual Bitmap */ | 306 | u8 pvb_field[PARTIAL_VBM_MAX]; /* Partial Virtual Bitmap */ |
307 | } __attribute__ ((packed)); | 307 | } __packed; |
308 | 308 | ||
309 | /* Virtual Bit Map update */ | 309 | /* Virtual Bit Map update */ |
310 | struct wl1251_cmd_vbm_update { | 310 | struct wl1251_cmd_vbm_update { |
@@ -312,7 +312,7 @@ struct wl1251_cmd_vbm_update { | |||
312 | __le16 len; | 312 | __le16 len; |
313 | u8 padding[2]; | 313 | u8 padding[2]; |
314 | struct wl1251_tim tim; | 314 | struct wl1251_tim tim; |
315 | } __attribute__ ((packed)); | 315 | } __packed; |
316 | 316 | ||
317 | enum wl1251_cmd_ps_mode { | 317 | enum wl1251_cmd_ps_mode { |
318 | STATION_ACTIVE_MODE, | 318 | STATION_ACTIVE_MODE, |
@@ -333,7 +333,7 @@ struct wl1251_cmd_ps_params { | |||
333 | u8 hang_over_period; | 333 | u8 hang_over_period; |
334 | u16 null_data_rate; | 334 | u16 null_data_rate; |
335 | u8 pad[2]; | 335 | u8 pad[2]; |
336 | } __attribute__ ((packed)); | 336 | } __packed; |
337 | 337 | ||
338 | struct wl1251_cmd_trigger_scan_to { | 338 | struct wl1251_cmd_trigger_scan_to { |
339 | struct wl1251_cmd_header header; | 339 | struct wl1251_cmd_header header; |
@@ -411,7 +411,7 @@ struct wl1251_cmd_set_keys { | |||
411 | u8 key[MAX_KEY_SIZE]; | 411 | u8 key[MAX_KEY_SIZE]; |
412 | u16 ac_seq_num16[NUM_ACCESS_CATEGORIES_COPY]; | 412 | u16 ac_seq_num16[NUM_ACCESS_CATEGORIES_COPY]; |
413 | u32 ac_seq_num32[NUM_ACCESS_CATEGORIES_COPY]; | 413 | u32 ac_seq_num32[NUM_ACCESS_CATEGORIES_COPY]; |
414 | } __attribute__ ((packed)); | 414 | } __packed; |
415 | 415 | ||
416 | 416 | ||
417 | #endif /* __WL1251_CMD_H__ */ | 417 | #endif /* __WL1251_CMD_H__ */ |
diff --git a/drivers/net/wireless/wl12xx/wl1251_event.h b/drivers/net/wireless/wl12xx/wl1251_event.h index be0ac54d6246..f48a2b66bc5a 100644 --- a/drivers/net/wireless/wl12xx/wl1251_event.h +++ b/drivers/net/wireless/wl12xx/wl1251_event.h | |||
@@ -82,7 +82,7 @@ struct event_debug_report { | |||
82 | u32 report_1; | 82 | u32 report_1; |
83 | u32 report_2; | 83 | u32 report_2; |
84 | u32 report_3; | 84 | u32 report_3; |
85 | } __attribute__ ((packed)); | 85 | } __packed; |
86 | 86 | ||
87 | struct event_mailbox { | 87 | struct event_mailbox { |
88 | u32 events_vector; | 88 | u32 events_vector; |
@@ -112,7 +112,7 @@ struct event_mailbox { | |||
112 | struct event_debug_report report; | 112 | struct event_debug_report report; |
113 | u8 average_snr_level; | 113 | u8 average_snr_level; |
114 | u8 padding[19]; | 114 | u8 padding[19]; |
115 | } __attribute__ ((packed)); | 115 | } __packed; |
116 | 116 | ||
117 | int wl1251_event_unmask(struct wl1251 *wl); | 117 | int wl1251_event_unmask(struct wl1251 *wl); |
118 | void wl1251_event_mbox_config(struct wl1251 *wl); | 118 | void wl1251_event_mbox_config(struct wl1251 *wl); |
diff --git a/drivers/net/wireless/wl12xx/wl1251_main.c b/drivers/net/wireless/wl12xx/wl1251_main.c index 00b24282fc73..c8f268951e10 100644 --- a/drivers/net/wireless/wl12xx/wl1251_main.c +++ b/drivers/net/wireless/wl12xx/wl1251_main.c | |||
@@ -124,7 +124,7 @@ static int wl1251_fetch_nvs(struct wl1251 *wl) | |||
124 | } | 124 | } |
125 | 125 | ||
126 | wl->nvs_len = fw->size; | 126 | wl->nvs_len = fw->size; |
127 | wl->nvs = kmalloc(wl->nvs_len, GFP_KERNEL); | 127 | wl->nvs = kmemdup(fw->data, wl->nvs_len, GFP_KERNEL); |
128 | 128 | ||
129 | if (!wl->nvs) { | 129 | if (!wl->nvs) { |
130 | wl1251_error("could not allocate memory for the nvs file"); | 130 | wl1251_error("could not allocate memory for the nvs file"); |
@@ -132,8 +132,6 @@ static int wl1251_fetch_nvs(struct wl1251 *wl) | |||
132 | goto out; | 132 | goto out; |
133 | } | 133 | } |
134 | 134 | ||
135 | memcpy(wl->nvs, fw->data, wl->nvs_len); | ||
136 | |||
137 | ret = 0; | 135 | ret = 0; |
138 | 136 | ||
139 | out: | 137 | out: |
diff --git a/drivers/net/wireless/wl12xx/wl1251_rx.h b/drivers/net/wireless/wl12xx/wl1251_rx.h index 563a3fde40fb..da4e53406a0e 100644 --- a/drivers/net/wireless/wl12xx/wl1251_rx.h +++ b/drivers/net/wireless/wl12xx/wl1251_rx.h | |||
@@ -117,7 +117,7 @@ struct wl1251_rx_descriptor { | |||
117 | s8 rssi; /* in dB */ | 117 | s8 rssi; /* in dB */ |
118 | u8 rcpi; /* in dB */ | 118 | u8 rcpi; /* in dB */ |
119 | u8 snr; /* in dB */ | 119 | u8 snr; /* in dB */ |
120 | } __attribute__ ((packed)); | 120 | } __packed; |
121 | 121 | ||
122 | void wl1251_rx(struct wl1251 *wl); | 122 | void wl1251_rx(struct wl1251 *wl); |
123 | 123 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1251_sdio.c b/drivers/net/wireless/wl12xx/wl1251_sdio.c index c561332e7009..b901b6135654 100644 --- a/drivers/net/wireless/wl12xx/wl1251_sdio.c +++ b/drivers/net/wireless/wl12xx/wl1251_sdio.c | |||
@@ -37,11 +37,17 @@ | |||
37 | #define SDIO_DEVICE_ID_TI_WL1251 0x9066 | 37 | #define SDIO_DEVICE_ID_TI_WL1251 0x9066 |
38 | #endif | 38 | #endif |
39 | 39 | ||
40 | struct wl1251_sdio { | ||
41 | struct sdio_func *func; | ||
42 | u32 elp_val; | ||
43 | }; | ||
44 | |||
40 | static struct wl12xx_platform_data *wl12xx_board_data; | 45 | static struct wl12xx_platform_data *wl12xx_board_data; |
41 | 46 | ||
42 | static struct sdio_func *wl_to_func(struct wl1251 *wl) | 47 | static struct sdio_func *wl_to_func(struct wl1251 *wl) |
43 | { | 48 | { |
44 | return wl->if_priv; | 49 | struct wl1251_sdio *wl_sdio = wl->if_priv; |
50 | return wl_sdio->func; | ||
45 | } | 51 | } |
46 | 52 | ||
47 | static void wl1251_sdio_interrupt(struct sdio_func *func) | 53 | static void wl1251_sdio_interrupt(struct sdio_func *func) |
@@ -90,10 +96,17 @@ static void wl1251_sdio_write(struct wl1251 *wl, int addr, | |||
90 | static void wl1251_sdio_read_elp(struct wl1251 *wl, int addr, u32 *val) | 96 | static void wl1251_sdio_read_elp(struct wl1251 *wl, int addr, u32 *val) |
91 | { | 97 | { |
92 | int ret = 0; | 98 | int ret = 0; |
93 | struct sdio_func *func = wl_to_func(wl); | 99 | struct wl1251_sdio *wl_sdio = wl->if_priv; |
94 | 100 | struct sdio_func *func = wl_sdio->func; | |
101 | |||
102 | /* | ||
103 | * The hardware only supports RAW (read after write) access for | ||
104 | * reading, regular sdio_readb won't work here (it interprets | ||
105 | * the unused bits of CMD52 as write data even if we send read | ||
106 | * request). | ||
107 | */ | ||
95 | sdio_claim_host(func); | 108 | sdio_claim_host(func); |
96 | *val = sdio_readb(func, addr, &ret); | 109 | *val = sdio_writeb_readb(func, wl_sdio->elp_val, addr, &ret); |
97 | sdio_release_host(func); | 110 | sdio_release_host(func); |
98 | 111 | ||
99 | if (ret) | 112 | if (ret) |
@@ -103,7 +116,8 @@ static void wl1251_sdio_read_elp(struct wl1251 *wl, int addr, u32 *val) | |||
103 | static void wl1251_sdio_write_elp(struct wl1251 *wl, int addr, u32 val) | 116 | static void wl1251_sdio_write_elp(struct wl1251 *wl, int addr, u32 val) |
104 | { | 117 | { |
105 | int ret = 0; | 118 | int ret = 0; |
106 | struct sdio_func *func = wl_to_func(wl); | 119 | struct wl1251_sdio *wl_sdio = wl->if_priv; |
120 | struct sdio_func *func = wl_sdio->func; | ||
107 | 121 | ||
108 | sdio_claim_host(func); | 122 | sdio_claim_host(func); |
109 | sdio_writeb(func, val, addr, &ret); | 123 | sdio_writeb(func, val, addr, &ret); |
@@ -111,6 +125,8 @@ static void wl1251_sdio_write_elp(struct wl1251 *wl, int addr, u32 val) | |||
111 | 125 | ||
112 | if (ret) | 126 | if (ret) |
113 | wl1251_error("sdio_writeb failed (%d)", ret); | 127 | wl1251_error("sdio_writeb failed (%d)", ret); |
128 | else | ||
129 | wl_sdio->elp_val = val; | ||
114 | } | 130 | } |
115 | 131 | ||
116 | static void wl1251_sdio_reset(struct wl1251 *wl) | 132 | static void wl1251_sdio_reset(struct wl1251 *wl) |
@@ -197,6 +213,7 @@ static int wl1251_sdio_probe(struct sdio_func *func, | |||
197 | int ret; | 213 | int ret; |
198 | struct wl1251 *wl; | 214 | struct wl1251 *wl; |
199 | struct ieee80211_hw *hw; | 215 | struct ieee80211_hw *hw; |
216 | struct wl1251_sdio *wl_sdio; | ||
200 | 217 | ||
201 | hw = wl1251_alloc_hw(); | 218 | hw = wl1251_alloc_hw(); |
202 | if (IS_ERR(hw)) | 219 | if (IS_ERR(hw)) |
@@ -204,6 +221,12 @@ static int wl1251_sdio_probe(struct sdio_func *func, | |||
204 | 221 | ||
205 | wl = hw->priv; | 222 | wl = hw->priv; |
206 | 223 | ||
224 | wl_sdio = kzalloc(sizeof(*wl_sdio), GFP_KERNEL); | ||
225 | if (wl_sdio == NULL) { | ||
226 | ret = -ENOMEM; | ||
227 | goto out_free_hw; | ||
228 | } | ||
229 | |||
207 | sdio_claim_host(func); | 230 | sdio_claim_host(func); |
208 | ret = sdio_enable_func(func); | 231 | ret = sdio_enable_func(func); |
209 | if (ret) | 232 | if (ret) |
@@ -213,7 +236,8 @@ static int wl1251_sdio_probe(struct sdio_func *func, | |||
213 | sdio_release_host(func); | 236 | sdio_release_host(func); |
214 | 237 | ||
215 | SET_IEEE80211_DEV(hw, &func->dev); | 238 | SET_IEEE80211_DEV(hw, &func->dev); |
216 | wl->if_priv = func; | 239 | wl_sdio->func = func; |
240 | wl->if_priv = wl_sdio; | ||
217 | wl->if_ops = &wl1251_sdio_ops; | 241 | wl->if_ops = &wl1251_sdio_ops; |
218 | wl->set_power = wl1251_sdio_set_power; | 242 | wl->set_power = wl1251_sdio_set_power; |
219 | 243 | ||
@@ -259,6 +283,8 @@ disable: | |||
259 | sdio_disable_func(func); | 283 | sdio_disable_func(func); |
260 | release: | 284 | release: |
261 | sdio_release_host(func); | 285 | sdio_release_host(func); |
286 | kfree(wl_sdio); | ||
287 | out_free_hw: | ||
262 | wl1251_free_hw(wl); | 288 | wl1251_free_hw(wl); |
263 | return ret; | 289 | return ret; |
264 | } | 290 | } |
@@ -266,9 +292,11 @@ release: | |||
266 | static void __devexit wl1251_sdio_remove(struct sdio_func *func) | 292 | static void __devexit wl1251_sdio_remove(struct sdio_func *func) |
267 | { | 293 | { |
268 | struct wl1251 *wl = sdio_get_drvdata(func); | 294 | struct wl1251 *wl = sdio_get_drvdata(func); |
295 | struct wl1251_sdio *wl_sdio = wl->if_priv; | ||
269 | 296 | ||
270 | if (wl->irq) | 297 | if (wl->irq) |
271 | free_irq(wl->irq, wl); | 298 | free_irq(wl->irq, wl); |
299 | kfree(wl_sdio); | ||
272 | wl1251_free_hw(wl); | 300 | wl1251_free_hw(wl); |
273 | 301 | ||
274 | sdio_claim_host(func); | 302 | sdio_claim_host(func); |
diff --git a/drivers/net/wireless/wl12xx/wl1251_tx.h b/drivers/net/wireless/wl12xx/wl1251_tx.h index 55856c6bb97a..65c4be8c2e80 100644 --- a/drivers/net/wireless/wl12xx/wl1251_tx.h +++ b/drivers/net/wireless/wl12xx/wl1251_tx.h | |||
@@ -109,7 +109,7 @@ struct tx_control { | |||
109 | unsigned xfer_pad:1; | 109 | unsigned xfer_pad:1; |
110 | 110 | ||
111 | unsigned reserved:7; | 111 | unsigned reserved:7; |
112 | } __attribute__ ((packed)); | 112 | } __packed; |
113 | 113 | ||
114 | 114 | ||
115 | struct tx_double_buffer_desc { | 115 | struct tx_double_buffer_desc { |
@@ -156,7 +156,7 @@ struct tx_double_buffer_desc { | |||
156 | u8 num_mem_blocks; | 156 | u8 num_mem_blocks; |
157 | 157 | ||
158 | u8 reserved; | 158 | u8 reserved; |
159 | } __attribute__ ((packed)); | 159 | } __packed; |
160 | 160 | ||
161 | enum { | 161 | enum { |
162 | TX_SUCCESS = 0, | 162 | TX_SUCCESS = 0, |
@@ -208,7 +208,7 @@ struct tx_result { | |||
208 | 208 | ||
209 | /* See done_1 */ | 209 | /* See done_1 */ |
210 | u8 done_2; | 210 | u8 done_2; |
211 | } __attribute__ ((packed)); | 211 | } __packed; |
212 | 212 | ||
213 | static inline int wl1251_tx_get_queue(int queue) | 213 | static inline int wl1251_tx_get_queue(int queue) |
214 | { | 214 | { |
diff --git a/drivers/net/wireless/wl12xx/wl1271.h b/drivers/net/wireless/wl12xx/wl1271.h index 6f1b6b5640c0..ec09f0d40ca2 100644 --- a/drivers/net/wireless/wl12xx/wl1271.h +++ b/drivers/net/wireless/wl12xx/wl1271.h | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <net/mac80211.h> | 33 | #include <net/mac80211.h> |
34 | 34 | ||
35 | #include "wl1271_conf.h" | 35 | #include "wl1271_conf.h" |
36 | #include "wl1271_ini.h" | ||
36 | 37 | ||
37 | #define DRIVER_NAME "wl1271" | 38 | #define DRIVER_NAME "wl1271" |
38 | #define DRIVER_PREFIX DRIVER_NAME ": " | 39 | #define DRIVER_PREFIX DRIVER_NAME ": " |
@@ -116,33 +117,6 @@ enum { | |||
116 | #define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff)) | 117 | #define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff)) |
117 | #define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff)) | 118 | #define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff)) |
118 | 119 | ||
119 | /* NVS data structure */ | ||
120 | #define WL1271_NVS_SECTION_SIZE 468 | ||
121 | |||
122 | #define WL1271_NVS_GENERAL_PARAMS_SIZE 57 | ||
123 | #define WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED \ | ||
124 | (WL1271_NVS_GENERAL_PARAMS_SIZE + 1) | ||
125 | #define WL1271_NVS_STAT_RADIO_PARAMS_SIZE 17 | ||
126 | #define WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED \ | ||
127 | (WL1271_NVS_STAT_RADIO_PARAMS_SIZE + 1) | ||
128 | #define WL1271_NVS_DYN_RADIO_PARAMS_SIZE 65 | ||
129 | #define WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED \ | ||
130 | (WL1271_NVS_DYN_RADIO_PARAMS_SIZE + 1) | ||
131 | #define WL1271_NVS_FEM_COUNT 2 | ||
132 | #define WL1271_NVS_INI_SPARE_SIZE 124 | ||
133 | |||
134 | struct wl1271_nvs_file { | ||
135 | /* NVS section */ | ||
136 | u8 nvs[WL1271_NVS_SECTION_SIZE]; | ||
137 | |||
138 | /* INI section */ | ||
139 | u8 general_params[WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED]; | ||
140 | u8 stat_radio_params[WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED]; | ||
141 | u8 dyn_radio_params[WL1271_NVS_FEM_COUNT] | ||
142 | [WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED]; | ||
143 | u8 ini_spare[WL1271_NVS_INI_SPARE_SIZE]; | ||
144 | } __attribute__ ((packed)); | ||
145 | |||
146 | /* | 120 | /* |
147 | * Enable/disable 802.11a support for WL1273 | 121 | * Enable/disable 802.11a support for WL1273 |
148 | */ | 122 | */ |
@@ -317,7 +291,7 @@ struct wl1271_fw_status { | |||
317 | __le32 tx_released_blks[NUM_TX_QUEUES]; | 291 | __le32 tx_released_blks[NUM_TX_QUEUES]; |
318 | __le32 fw_localtime; | 292 | __le32 fw_localtime; |
319 | __le32 padding[2]; | 293 | __le32 padding[2]; |
320 | } __attribute__ ((packed)); | 294 | } __packed; |
321 | 295 | ||
322 | struct wl1271_rx_mem_pool_addr { | 296 | struct wl1271_rx_mem_pool_addr { |
323 | u32 addr; | 297 | u32 addr; |
@@ -325,6 +299,7 @@ struct wl1271_rx_mem_pool_addr { | |||
325 | }; | 299 | }; |
326 | 300 | ||
327 | struct wl1271_scan { | 301 | struct wl1271_scan { |
302 | struct cfg80211_scan_request *req; | ||
328 | u8 state; | 303 | u8 state; |
329 | u8 ssid[IW_ESSID_MAX_SIZE+1]; | 304 | u8 ssid[IW_ESSID_MAX_SIZE+1]; |
330 | size_t ssid_len; | 305 | size_t ssid_len; |
@@ -375,6 +350,7 @@ struct wl1271 { | |||
375 | #define WL1271_FLAG_IRQ_PENDING (9) | 350 | #define WL1271_FLAG_IRQ_PENDING (9) |
376 | #define WL1271_FLAG_IRQ_RUNNING (10) | 351 | #define WL1271_FLAG_IRQ_RUNNING (10) |
377 | #define WL1271_FLAG_IDLE (11) | 352 | #define WL1271_FLAG_IDLE (11) |
353 | #define WL1271_FLAG_IDLE_REQUESTED (12) | ||
378 | unsigned long flags; | 354 | unsigned long flags; |
379 | 355 | ||
380 | struct wl1271_partition_set part; | 356 | struct wl1271_partition_set part; |
@@ -421,6 +397,7 @@ struct wl1271 { | |||
421 | 397 | ||
422 | /* Pending TX frames */ | 398 | /* Pending TX frames */ |
423 | struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS]; | 399 | struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS]; |
400 | int tx_frames_cnt; | ||
424 | 401 | ||
425 | /* Security sequence number counters */ | 402 | /* Security sequence number counters */ |
426 | u8 tx_security_last_seq; | 403 | u8 tx_security_last_seq; |
diff --git a/drivers/net/wireless/wl12xx/wl1271_acx.h b/drivers/net/wireless/wl12xx/wl1271_acx.h index 420e7e2fc021..4c87e601df2f 100644 --- a/drivers/net/wireless/wl12xx/wl1271_acx.h +++ b/drivers/net/wireless/wl12xx/wl1271_acx.h | |||
@@ -75,7 +75,7 @@ struct acx_header { | |||
75 | 75 | ||
76 | /* payload length (not including headers */ | 76 | /* payload length (not including headers */ |
77 | __le16 len; | 77 | __le16 len; |
78 | } __attribute__ ((packed)); | 78 | } __packed; |
79 | 79 | ||
80 | struct acx_error_counter { | 80 | struct acx_error_counter { |
81 | struct acx_header header; | 81 | struct acx_header header; |
@@ -98,7 +98,7 @@ struct acx_error_counter { | |||
98 | /* the number of missed sequence numbers in the squentially */ | 98 | /* the number of missed sequence numbers in the squentially */ |
99 | /* values of frames seq numbers */ | 99 | /* values of frames seq numbers */ |
100 | __le32 seq_num_miss; | 100 | __le32 seq_num_miss; |
101 | } __attribute__ ((packed)); | 101 | } __packed; |
102 | 102 | ||
103 | struct acx_revision { | 103 | struct acx_revision { |
104 | struct acx_header header; | 104 | struct acx_header header; |
@@ -127,7 +127,7 @@ struct acx_revision { | |||
127 | * bits 24 - 31: Chip ID - The WiLink chip ID. | 127 | * bits 24 - 31: Chip ID - The WiLink chip ID. |
128 | */ | 128 | */ |
129 | __le32 hw_version; | 129 | __le32 hw_version; |
130 | } __attribute__ ((packed)); | 130 | } __packed; |
131 | 131 | ||
132 | enum wl1271_psm_mode { | 132 | enum wl1271_psm_mode { |
133 | /* Active mode */ | 133 | /* Active mode */ |
@@ -149,7 +149,7 @@ struct acx_sleep_auth { | |||
149 | /* 2 - ELP mode: Deep / Max sleep*/ | 149 | /* 2 - ELP mode: Deep / Max sleep*/ |
150 | u8 sleep_auth; | 150 | u8 sleep_auth; |
151 | u8 padding[3]; | 151 | u8 padding[3]; |
152 | } __attribute__ ((packed)); | 152 | } __packed; |
153 | 153 | ||
154 | enum { | 154 | enum { |
155 | HOSTIF_PCI_MASTER_HOST_INDIRECT, | 155 | HOSTIF_PCI_MASTER_HOST_INDIRECT, |
@@ -187,7 +187,7 @@ struct acx_rx_msdu_lifetime { | |||
187 | * firmware discards the MSDU. | 187 | * firmware discards the MSDU. |
188 | */ | 188 | */ |
189 | __le32 lifetime; | 189 | __le32 lifetime; |
190 | } __attribute__ ((packed)); | 190 | } __packed; |
191 | 191 | ||
192 | /* | 192 | /* |
193 | * RX Config Options Table | 193 | * RX Config Options Table |
@@ -275,13 +275,13 @@ struct acx_rx_config { | |||
275 | 275 | ||
276 | __le32 config_options; | 276 | __le32 config_options; |
277 | __le32 filter_options; | 277 | __le32 filter_options; |
278 | } __attribute__ ((packed)); | 278 | } __packed; |
279 | 279 | ||
280 | struct acx_packet_detection { | 280 | struct acx_packet_detection { |
281 | struct acx_header header; | 281 | struct acx_header header; |
282 | 282 | ||
283 | __le32 threshold; | 283 | __le32 threshold; |
284 | } __attribute__ ((packed)); | 284 | } __packed; |
285 | 285 | ||
286 | 286 | ||
287 | enum acx_slot_type { | 287 | enum acx_slot_type { |
@@ -299,7 +299,7 @@ struct acx_slot { | |||
299 | u8 wone_index; /* Reserved */ | 299 | u8 wone_index; /* Reserved */ |
300 | u8 slot_time; | 300 | u8 slot_time; |
301 | u8 reserved[6]; | 301 | u8 reserved[6]; |
302 | } __attribute__ ((packed)); | 302 | } __packed; |
303 | 303 | ||
304 | 304 | ||
305 | #define ACX_MC_ADDRESS_GROUP_MAX (8) | 305 | #define ACX_MC_ADDRESS_GROUP_MAX (8) |
@@ -312,21 +312,21 @@ struct acx_dot11_grp_addr_tbl { | |||
312 | u8 num_groups; | 312 | u8 num_groups; |
313 | u8 pad[2]; | 313 | u8 pad[2]; |
314 | u8 mac_table[ADDRESS_GROUP_MAX_LEN]; | 314 | u8 mac_table[ADDRESS_GROUP_MAX_LEN]; |
315 | } __attribute__ ((packed)); | 315 | } __packed; |
316 | 316 | ||
317 | struct acx_rx_timeout { | 317 | struct acx_rx_timeout { |
318 | struct acx_header header; | 318 | struct acx_header header; |
319 | 319 | ||
320 | __le16 ps_poll_timeout; | 320 | __le16 ps_poll_timeout; |
321 | __le16 upsd_timeout; | 321 | __le16 upsd_timeout; |
322 | } __attribute__ ((packed)); | 322 | } __packed; |
323 | 323 | ||
324 | struct acx_rts_threshold { | 324 | struct acx_rts_threshold { |
325 | struct acx_header header; | 325 | struct acx_header header; |
326 | 326 | ||
327 | __le16 threshold; | 327 | __le16 threshold; |
328 | u8 pad[2]; | 328 | u8 pad[2]; |
329 | } __attribute__ ((packed)); | 329 | } __packed; |
330 | 330 | ||
331 | struct acx_beacon_filter_option { | 331 | struct acx_beacon_filter_option { |
332 | struct acx_header header; | 332 | struct acx_header header; |
@@ -342,7 +342,7 @@ struct acx_beacon_filter_option { | |||
342 | */ | 342 | */ |
343 | u8 max_num_beacons; | 343 | u8 max_num_beacons; |
344 | u8 pad[2]; | 344 | u8 pad[2]; |
345 | } __attribute__ ((packed)); | 345 | } __packed; |
346 | 346 | ||
347 | /* | 347 | /* |
348 | * ACXBeaconFilterEntry (not 221) | 348 | * ACXBeaconFilterEntry (not 221) |
@@ -383,21 +383,21 @@ struct acx_beacon_filter_ie_table { | |||
383 | u8 num_ie; | 383 | u8 num_ie; |
384 | u8 pad[3]; | 384 | u8 pad[3]; |
385 | u8 table[BEACON_FILTER_TABLE_MAX_SIZE]; | 385 | u8 table[BEACON_FILTER_TABLE_MAX_SIZE]; |
386 | } __attribute__ ((packed)); | 386 | } __packed; |
387 | 387 | ||
388 | struct acx_conn_monit_params { | 388 | struct acx_conn_monit_params { |
389 | struct acx_header header; | 389 | struct acx_header header; |
390 | 390 | ||
391 | __le32 synch_fail_thold; /* number of beacons missed */ | 391 | __le32 synch_fail_thold; /* number of beacons missed */ |
392 | __le32 bss_lose_timeout; /* number of TU's from synch fail */ | 392 | __le32 bss_lose_timeout; /* number of TU's from synch fail */ |
393 | } __attribute__ ((packed)); | 393 | } __packed; |
394 | 394 | ||
395 | struct acx_bt_wlan_coex { | 395 | struct acx_bt_wlan_coex { |
396 | struct acx_header header; | 396 | struct acx_header header; |
397 | 397 | ||
398 | u8 enable; | 398 | u8 enable; |
399 | u8 pad[3]; | 399 | u8 pad[3]; |
400 | } __attribute__ ((packed)); | 400 | } __packed; |
401 | 401 | ||
402 | struct acx_bt_wlan_coex_param { | 402 | struct acx_bt_wlan_coex_param { |
403 | struct acx_header header; | 403 | struct acx_header header; |
@@ -405,7 +405,7 @@ struct acx_bt_wlan_coex_param { | |||
405 | __le32 params[CONF_SG_PARAMS_MAX]; | 405 | __le32 params[CONF_SG_PARAMS_MAX]; |
406 | u8 param_idx; | 406 | u8 param_idx; |
407 | u8 padding[3]; | 407 | u8 padding[3]; |
408 | } __attribute__ ((packed)); | 408 | } __packed; |
409 | 409 | ||
410 | struct acx_dco_itrim_params { | 410 | struct acx_dco_itrim_params { |
411 | struct acx_header header; | 411 | struct acx_header header; |
@@ -413,7 +413,7 @@ struct acx_dco_itrim_params { | |||
413 | u8 enable; | 413 | u8 enable; |
414 | u8 padding[3]; | 414 | u8 padding[3]; |
415 | __le32 timeout; | 415 | __le32 timeout; |
416 | } __attribute__ ((packed)); | 416 | } __packed; |
417 | 417 | ||
418 | struct acx_energy_detection { | 418 | struct acx_energy_detection { |
419 | struct acx_header header; | 419 | struct acx_header header; |
@@ -422,7 +422,7 @@ struct acx_energy_detection { | |||
422 | __le16 rx_cca_threshold; | 422 | __le16 rx_cca_threshold; |
423 | u8 tx_energy_detection; | 423 | u8 tx_energy_detection; |
424 | u8 pad; | 424 | u8 pad; |
425 | } __attribute__ ((packed)); | 425 | } __packed; |
426 | 426 | ||
427 | struct acx_beacon_broadcast { | 427 | struct acx_beacon_broadcast { |
428 | struct acx_header header; | 428 | struct acx_header header; |
@@ -436,14 +436,14 @@ struct acx_beacon_broadcast { | |||
436 | /* Consecutive PS Poll failures before updating the host */ | 436 | /* Consecutive PS Poll failures before updating the host */ |
437 | u8 ps_poll_threshold; | 437 | u8 ps_poll_threshold; |
438 | u8 pad[2]; | 438 | u8 pad[2]; |
439 | } __attribute__ ((packed)); | 439 | } __packed; |
440 | 440 | ||
441 | struct acx_event_mask { | 441 | struct acx_event_mask { |
442 | struct acx_header header; | 442 | struct acx_header header; |
443 | 443 | ||
444 | __le32 event_mask; | 444 | __le32 event_mask; |
445 | __le32 high_event_mask; /* Unused */ | 445 | __le32 high_event_mask; /* Unused */ |
446 | } __attribute__ ((packed)); | 446 | } __packed; |
447 | 447 | ||
448 | #define CFG_RX_FCS BIT(2) | 448 | #define CFG_RX_FCS BIT(2) |
449 | #define CFG_RX_ALL_GOOD BIT(3) | 449 | #define CFG_RX_ALL_GOOD BIT(3) |
@@ -488,14 +488,14 @@ struct acx_feature_config { | |||
488 | 488 | ||
489 | __le32 options; | 489 | __le32 options; |
490 | __le32 data_flow_options; | 490 | __le32 data_flow_options; |
491 | } __attribute__ ((packed)); | 491 | } __packed; |
492 | 492 | ||
493 | struct acx_current_tx_power { | 493 | struct acx_current_tx_power { |
494 | struct acx_header header; | 494 | struct acx_header header; |
495 | 495 | ||
496 | u8 current_tx_power; | 496 | u8 current_tx_power; |
497 | u8 padding[3]; | 497 | u8 padding[3]; |
498 | } __attribute__ ((packed)); | 498 | } __packed; |
499 | 499 | ||
500 | struct acx_wake_up_condition { | 500 | struct acx_wake_up_condition { |
501 | struct acx_header header; | 501 | struct acx_header header; |
@@ -503,7 +503,7 @@ struct acx_wake_up_condition { | |||
503 | u8 wake_up_event; /* Only one bit can be set */ | 503 | u8 wake_up_event; /* Only one bit can be set */ |
504 | u8 listen_interval; | 504 | u8 listen_interval; |
505 | u8 pad[2]; | 505 | u8 pad[2]; |
506 | } __attribute__ ((packed)); | 506 | } __packed; |
507 | 507 | ||
508 | struct acx_aid { | 508 | struct acx_aid { |
509 | struct acx_header header; | 509 | struct acx_header header; |
@@ -513,7 +513,7 @@ struct acx_aid { | |||
513 | */ | 513 | */ |
514 | __le16 aid; | 514 | __le16 aid; |
515 | u8 pad[2]; | 515 | u8 pad[2]; |
516 | } __attribute__ ((packed)); | 516 | } __packed; |
517 | 517 | ||
518 | enum acx_preamble_type { | 518 | enum acx_preamble_type { |
519 | ACX_PREAMBLE_LONG = 0, | 519 | ACX_PREAMBLE_LONG = 0, |
@@ -529,7 +529,7 @@ struct acx_preamble { | |||
529 | */ | 529 | */ |
530 | u8 preamble; | 530 | u8 preamble; |
531 | u8 padding[3]; | 531 | u8 padding[3]; |
532 | } __attribute__ ((packed)); | 532 | } __packed; |
533 | 533 | ||
534 | enum acx_ctsprotect_type { | 534 | enum acx_ctsprotect_type { |
535 | CTSPROTECT_DISABLE = 0, | 535 | CTSPROTECT_DISABLE = 0, |
@@ -540,11 +540,11 @@ struct acx_ctsprotect { | |||
540 | struct acx_header header; | 540 | struct acx_header header; |
541 | u8 ctsprotect; | 541 | u8 ctsprotect; |
542 | u8 padding[3]; | 542 | u8 padding[3]; |
543 | } __attribute__ ((packed)); | 543 | } __packed; |
544 | 544 | ||
545 | struct acx_tx_statistics { | 545 | struct acx_tx_statistics { |
546 | __le32 internal_desc_overflow; | 546 | __le32 internal_desc_overflow; |
547 | } __attribute__ ((packed)); | 547 | } __packed; |
548 | 548 | ||
549 | struct acx_rx_statistics { | 549 | struct acx_rx_statistics { |
550 | __le32 out_of_mem; | 550 | __le32 out_of_mem; |
@@ -555,14 +555,14 @@ struct acx_rx_statistics { | |||
555 | __le32 xfr_hint_trig; | 555 | __le32 xfr_hint_trig; |
556 | __le32 path_reset; | 556 | __le32 path_reset; |
557 | __le32 reset_counter; | 557 | __le32 reset_counter; |
558 | } __attribute__ ((packed)); | 558 | } __packed; |
559 | 559 | ||
560 | struct acx_dma_statistics { | 560 | struct acx_dma_statistics { |
561 | __le32 rx_requested; | 561 | __le32 rx_requested; |
562 | __le32 rx_errors; | 562 | __le32 rx_errors; |
563 | __le32 tx_requested; | 563 | __le32 tx_requested; |
564 | __le32 tx_errors; | 564 | __le32 tx_errors; |
565 | } __attribute__ ((packed)); | 565 | } __packed; |
566 | 566 | ||
567 | struct acx_isr_statistics { | 567 | struct acx_isr_statistics { |
568 | /* host command complete */ | 568 | /* host command complete */ |
@@ -621,7 +621,7 @@ struct acx_isr_statistics { | |||
621 | 621 | ||
622 | /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */ | 622 | /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */ |
623 | __le32 low_rssi; | 623 | __le32 low_rssi; |
624 | } __attribute__ ((packed)); | 624 | } __packed; |
625 | 625 | ||
626 | struct acx_wep_statistics { | 626 | struct acx_wep_statistics { |
627 | /* WEP address keys configured */ | 627 | /* WEP address keys configured */ |
@@ -643,7 +643,7 @@ struct acx_wep_statistics { | |||
643 | 643 | ||
644 | /* WEP decrypt interrupts */ | 644 | /* WEP decrypt interrupts */ |
645 | __le32 interrupt; | 645 | __le32 interrupt; |
646 | } __attribute__ ((packed)); | 646 | } __packed; |
647 | 647 | ||
648 | #define ACX_MISSED_BEACONS_SPREAD 10 | 648 | #define ACX_MISSED_BEACONS_SPREAD 10 |
649 | 649 | ||
@@ -703,12 +703,12 @@ struct acx_pwr_statistics { | |||
703 | 703 | ||
704 | /* the number of beacons in awake mode */ | 704 | /* the number of beacons in awake mode */ |
705 | __le32 rcvd_awake_beacons; | 705 | __le32 rcvd_awake_beacons; |
706 | } __attribute__ ((packed)); | 706 | } __packed; |
707 | 707 | ||
708 | struct acx_mic_statistics { | 708 | struct acx_mic_statistics { |
709 | __le32 rx_pkts; | 709 | __le32 rx_pkts; |
710 | __le32 calc_failure; | 710 | __le32 calc_failure; |
711 | } __attribute__ ((packed)); | 711 | } __packed; |
712 | 712 | ||
713 | struct acx_aes_statistics { | 713 | struct acx_aes_statistics { |
714 | __le32 encrypt_fail; | 714 | __le32 encrypt_fail; |
@@ -717,7 +717,7 @@ struct acx_aes_statistics { | |||
717 | __le32 decrypt_packets; | 717 | __le32 decrypt_packets; |
718 | __le32 encrypt_interrupt; | 718 | __le32 encrypt_interrupt; |
719 | __le32 decrypt_interrupt; | 719 | __le32 decrypt_interrupt; |
720 | } __attribute__ ((packed)); | 720 | } __packed; |
721 | 721 | ||
722 | struct acx_event_statistics { | 722 | struct acx_event_statistics { |
723 | __le32 heart_beat; | 723 | __le32 heart_beat; |
@@ -728,7 +728,7 @@ struct acx_event_statistics { | |||
728 | __le32 oom_late; | 728 | __le32 oom_late; |
729 | __le32 phy_transmit_error; | 729 | __le32 phy_transmit_error; |
730 | __le32 tx_stuck; | 730 | __le32 tx_stuck; |
731 | } __attribute__ ((packed)); | 731 | } __packed; |
732 | 732 | ||
733 | struct acx_ps_statistics { | 733 | struct acx_ps_statistics { |
734 | __le32 pspoll_timeouts; | 734 | __le32 pspoll_timeouts; |
@@ -738,7 +738,7 @@ struct acx_ps_statistics { | |||
738 | __le32 pspoll_max_apturn; | 738 | __le32 pspoll_max_apturn; |
739 | __le32 pspoll_utilization; | 739 | __le32 pspoll_utilization; |
740 | __le32 upsd_utilization; | 740 | __le32 upsd_utilization; |
741 | } __attribute__ ((packed)); | 741 | } __packed; |
742 | 742 | ||
743 | struct acx_rxpipe_statistics { | 743 | struct acx_rxpipe_statistics { |
744 | __le32 rx_prep_beacon_drop; | 744 | __le32 rx_prep_beacon_drop; |
@@ -746,7 +746,7 @@ struct acx_rxpipe_statistics { | |||
746 | __le32 beacon_buffer_thres_host_int_trig_rx_data; | 746 | __le32 beacon_buffer_thres_host_int_trig_rx_data; |
747 | __le32 missed_beacon_host_int_trig_rx_data; | 747 | __le32 missed_beacon_host_int_trig_rx_data; |
748 | __le32 tx_xfr_host_int_trig_rx_data; | 748 | __le32 tx_xfr_host_int_trig_rx_data; |
749 | } __attribute__ ((packed)); | 749 | } __packed; |
750 | 750 | ||
751 | struct acx_statistics { | 751 | struct acx_statistics { |
752 | struct acx_header header; | 752 | struct acx_header header; |
@@ -762,7 +762,7 @@ struct acx_statistics { | |||
762 | struct acx_event_statistics event; | 762 | struct acx_event_statistics event; |
763 | struct acx_ps_statistics ps; | 763 | struct acx_ps_statistics ps; |
764 | struct acx_rxpipe_statistics rxpipe; | 764 | struct acx_rxpipe_statistics rxpipe; |
765 | } __attribute__ ((packed)); | 765 | } __packed; |
766 | 766 | ||
767 | struct acx_rate_class { | 767 | struct acx_rate_class { |
768 | __le32 enabled_rates; | 768 | __le32 enabled_rates; |
@@ -780,7 +780,7 @@ struct acx_rate_policy { | |||
780 | 780 | ||
781 | __le32 rate_class_cnt; | 781 | __le32 rate_class_cnt; |
782 | struct acx_rate_class rate_class[CONF_TX_MAX_RATE_CLASSES]; | 782 | struct acx_rate_class rate_class[CONF_TX_MAX_RATE_CLASSES]; |
783 | } __attribute__ ((packed)); | 783 | } __packed; |
784 | 784 | ||
785 | struct acx_ac_cfg { | 785 | struct acx_ac_cfg { |
786 | struct acx_header header; | 786 | struct acx_header header; |
@@ -790,7 +790,7 @@ struct acx_ac_cfg { | |||
790 | u8 aifsn; | 790 | u8 aifsn; |
791 | u8 reserved; | 791 | u8 reserved; |
792 | __le16 tx_op_limit; | 792 | __le16 tx_op_limit; |
793 | } __attribute__ ((packed)); | 793 | } __packed; |
794 | 794 | ||
795 | struct acx_tid_config { | 795 | struct acx_tid_config { |
796 | struct acx_header header; | 796 | struct acx_header header; |
@@ -801,19 +801,19 @@ struct acx_tid_config { | |||
801 | u8 ack_policy; | 801 | u8 ack_policy; |
802 | u8 padding[3]; | 802 | u8 padding[3]; |
803 | __le32 apsd_conf[2]; | 803 | __le32 apsd_conf[2]; |
804 | } __attribute__ ((packed)); | 804 | } __packed; |
805 | 805 | ||
806 | struct acx_frag_threshold { | 806 | struct acx_frag_threshold { |
807 | struct acx_header header; | 807 | struct acx_header header; |
808 | __le16 frag_threshold; | 808 | __le16 frag_threshold; |
809 | u8 padding[2]; | 809 | u8 padding[2]; |
810 | } __attribute__ ((packed)); | 810 | } __packed; |
811 | 811 | ||
812 | struct acx_tx_config_options { | 812 | struct acx_tx_config_options { |
813 | struct acx_header header; | 813 | struct acx_header header; |
814 | __le16 tx_compl_timeout; /* msec */ | 814 | __le16 tx_compl_timeout; /* msec */ |
815 | __le16 tx_compl_threshold; /* number of packets */ | 815 | __le16 tx_compl_threshold; /* number of packets */ |
816 | } __attribute__ ((packed)); | 816 | } __packed; |
817 | 817 | ||
818 | #define ACX_RX_MEM_BLOCKS 70 | 818 | #define ACX_RX_MEM_BLOCKS 70 |
819 | #define ACX_TX_MIN_MEM_BLOCKS 40 | 819 | #define ACX_TX_MIN_MEM_BLOCKS 40 |
@@ -828,7 +828,7 @@ struct wl1271_acx_config_memory { | |||
828 | u8 num_stations; | 828 | u8 num_stations; |
829 | u8 num_ssid_profiles; | 829 | u8 num_ssid_profiles; |
830 | __le32 total_tx_descriptors; | 830 | __le32 total_tx_descriptors; |
831 | } __attribute__ ((packed)); | 831 | } __packed; |
832 | 832 | ||
833 | struct wl1271_acx_mem_map { | 833 | struct wl1271_acx_mem_map { |
834 | struct acx_header header; | 834 | struct acx_header header; |
@@ -872,7 +872,7 @@ struct wl1271_acx_mem_map { | |||
872 | u8 *rx_cbuf; | 872 | u8 *rx_cbuf; |
873 | __le32 rx_ctrl; | 873 | __le32 rx_ctrl; |
874 | __le32 tx_ctrl; | 874 | __le32 tx_ctrl; |
875 | } __attribute__ ((packed)); | 875 | } __packed; |
876 | 876 | ||
877 | struct wl1271_acx_rx_config_opt { | 877 | struct wl1271_acx_rx_config_opt { |
878 | struct acx_header header; | 878 | struct acx_header header; |
@@ -882,7 +882,7 @@ struct wl1271_acx_rx_config_opt { | |||
882 | __le16 timeout; | 882 | __le16 timeout; |
883 | u8 queue_type; | 883 | u8 queue_type; |
884 | u8 reserved; | 884 | u8 reserved; |
885 | } __attribute__ ((packed)); | 885 | } __packed; |
886 | 886 | ||
887 | 887 | ||
888 | struct wl1271_acx_bet_enable { | 888 | struct wl1271_acx_bet_enable { |
@@ -891,7 +891,7 @@ struct wl1271_acx_bet_enable { | |||
891 | u8 enable; | 891 | u8 enable; |
892 | u8 max_consecutive; | 892 | u8 max_consecutive; |
893 | u8 padding[2]; | 893 | u8 padding[2]; |
894 | } __attribute__ ((packed)); | 894 | } __packed; |
895 | 895 | ||
896 | #define ACX_IPV4_VERSION 4 | 896 | #define ACX_IPV4_VERSION 4 |
897 | #define ACX_IPV6_VERSION 6 | 897 | #define ACX_IPV6_VERSION 6 |
@@ -905,7 +905,7 @@ struct wl1271_acx_arp_filter { | |||
905 | requests directed to this IP address will pass | 905 | requests directed to this IP address will pass |
906 | through. For IPv4, the first four bytes are | 906 | through. For IPv4, the first four bytes are |
907 | used. */ | 907 | used. */ |
908 | } __attribute__((packed)); | 908 | } __packed; |
909 | 909 | ||
910 | struct wl1271_acx_pm_config { | 910 | struct wl1271_acx_pm_config { |
911 | struct acx_header header; | 911 | struct acx_header header; |
@@ -913,14 +913,14 @@ struct wl1271_acx_pm_config { | |||
913 | __le32 host_clk_settling_time; | 913 | __le32 host_clk_settling_time; |
914 | u8 host_fast_wakeup_support; | 914 | u8 host_fast_wakeup_support; |
915 | u8 padding[3]; | 915 | u8 padding[3]; |
916 | } __attribute__ ((packed)); | 916 | } __packed; |
917 | 917 | ||
918 | struct wl1271_acx_keep_alive_mode { | 918 | struct wl1271_acx_keep_alive_mode { |
919 | struct acx_header header; | 919 | struct acx_header header; |
920 | 920 | ||
921 | u8 enabled; | 921 | u8 enabled; |
922 | u8 padding[3]; | 922 | u8 padding[3]; |
923 | } __attribute__ ((packed)); | 923 | } __packed; |
924 | 924 | ||
925 | enum { | 925 | enum { |
926 | ACX_KEEP_ALIVE_NO_TX = 0, | 926 | ACX_KEEP_ALIVE_NO_TX = 0, |
@@ -940,7 +940,7 @@ struct wl1271_acx_keep_alive_config { | |||
940 | u8 tpl_validation; | 940 | u8 tpl_validation; |
941 | u8 trigger; | 941 | u8 trigger; |
942 | u8 padding; | 942 | u8 padding; |
943 | } __attribute__ ((packed)); | 943 | } __packed; |
944 | 944 | ||
945 | enum { | 945 | enum { |
946 | WL1271_ACX_TRIG_TYPE_LEVEL = 0, | 946 | WL1271_ACX_TRIG_TYPE_LEVEL = 0, |
diff --git a/drivers/net/wireless/wl12xx/wl1271_cmd.c b/drivers/net/wireless/wl12xx/wl1271_cmd.c index 19393e236e2c..530678e45a13 100644 --- a/drivers/net/wireless/wl12xx/wl1271_cmd.c +++ b/drivers/net/wireless/wl12xx/wl1271_cmd.c | |||
@@ -212,8 +212,8 @@ int wl1271_cmd_general_parms(struct wl1271 *wl) | |||
212 | 212 | ||
213 | gen_parms->test.id = TEST_CMD_INI_FILE_GENERAL_PARAM; | 213 | gen_parms->test.id = TEST_CMD_INI_FILE_GENERAL_PARAM; |
214 | 214 | ||
215 | memcpy(gen_parms->params, wl->nvs->general_params, | 215 | memcpy(&gen_parms->general_params, &wl->nvs->general_params, |
216 | WL1271_NVS_GENERAL_PARAMS_SIZE); | 216 | sizeof(struct wl1271_ini_general_params)); |
217 | 217 | ||
218 | ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), 0); | 218 | ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), 0); |
219 | if (ret < 0) | 219 | if (ret < 0) |
@@ -238,13 +238,20 @@ int wl1271_cmd_radio_parms(struct wl1271 *wl) | |||
238 | 238 | ||
239 | radio_parms->test.id = TEST_CMD_INI_FILE_RADIO_PARAM; | 239 | radio_parms->test.id = TEST_CMD_INI_FILE_RADIO_PARAM; |
240 | 240 | ||
241 | memcpy(radio_parms->stat_radio_params, wl->nvs->stat_radio_params, | 241 | /* 2.4GHz parameters */ |
242 | WL1271_NVS_STAT_RADIO_PARAMS_SIZE); | 242 | memcpy(&radio_parms->static_params_2, &wl->nvs->stat_radio_params_2, |
243 | memcpy(radio_parms->dyn_radio_params, | 243 | sizeof(struct wl1271_ini_band_params_2)); |
244 | wl->nvs->dyn_radio_params[rparam->fem], | 244 | memcpy(&radio_parms->dyn_params_2, |
245 | WL1271_NVS_DYN_RADIO_PARAMS_SIZE); | 245 | &wl->nvs->dyn_radio_params_2[rparam->fem].params, |
246 | 246 | sizeof(struct wl1271_ini_fem_params_2)); | |
247 | /* FIXME: current NVS is missing 5GHz parameters */ | 247 | |
248 | /* 5GHz parameters */ | ||
249 | memcpy(&radio_parms->static_params_5, | ||
250 | &wl->nvs->stat_radio_params_5, | ||
251 | sizeof(struct wl1271_ini_band_params_5)); | ||
252 | memcpy(&radio_parms->dyn_params_5, | ||
253 | &wl->nvs->dyn_radio_params_5[rparam->fem].params, | ||
254 | sizeof(struct wl1271_ini_fem_params_5)); | ||
248 | 255 | ||
249 | wl1271_dump(DEBUG_CMD, "TEST_CMD_INI_FILE_RADIO_PARAM: ", | 256 | wl1271_dump(DEBUG_CMD, "TEST_CMD_INI_FILE_RADIO_PARAM: ", |
250 | radio_parms, sizeof(*radio_parms)); | 257 | radio_parms, sizeof(*radio_parms)); |
@@ -329,12 +336,6 @@ int wl1271_cmd_join(struct wl1271 *wl, u8 bss_type) | |||
329 | join->channel = wl->channel; | 336 | join->channel = wl->channel; |
330 | join->ssid_len = wl->ssid_len; | 337 | join->ssid_len = wl->ssid_len; |
331 | memcpy(join->ssid, wl->ssid, wl->ssid_len); | 338 | memcpy(join->ssid, wl->ssid, wl->ssid_len); |
332 | join->ctrl = WL1271_JOIN_CMD_CTRL_TX_FLUSH; | ||
333 | |||
334 | /* increment the session counter */ | ||
335 | wl->session_counter++; | ||
336 | if (wl->session_counter >= SESSION_COUNTER_MAX) | ||
337 | wl->session_counter = 0; | ||
338 | 339 | ||
339 | join->ctrl |= wl->session_counter << WL1271_JOIN_CMD_TX_SESSION_OFFSET; | 340 | join->ctrl |= wl->session_counter << WL1271_JOIN_CMD_TX_SESSION_OFFSET; |
340 | 341 | ||
@@ -517,7 +518,7 @@ int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode, bool send) | |||
517 | ps_params->send_null_data = send; | 518 | ps_params->send_null_data = send; |
518 | ps_params->retries = 5; | 519 | ps_params->retries = 5; |
519 | ps_params->hang_over_period = 1; | 520 | ps_params->hang_over_period = 1; |
520 | ps_params->null_data_rate = cpu_to_le32(1); /* 1 Mbps */ | 521 | ps_params->null_data_rate = cpu_to_le32(wl->basic_rate_set); |
521 | 522 | ||
522 | ret = wl1271_cmd_send(wl, CMD_SET_PS_MODE, ps_params, | 523 | ret = wl1271_cmd_send(wl, CMD_SET_PS_MODE, ps_params, |
523 | sizeof(*ps_params), 0); | 524 | sizeof(*ps_params), 0); |
@@ -567,7 +568,7 @@ out: | |||
567 | } | 568 | } |
568 | 569 | ||
569 | int wl1271_cmd_scan(struct wl1271 *wl, const u8 *ssid, size_t ssid_len, | 570 | int wl1271_cmd_scan(struct wl1271 *wl, const u8 *ssid, size_t ssid_len, |
570 | const u8 *ie, size_t ie_len, u8 active_scan, | 571 | struct cfg80211_scan_request *req, u8 active_scan, |
571 | u8 high_prio, u8 band, u8 probe_requests) | 572 | u8 high_prio, u8 band, u8 probe_requests) |
572 | { | 573 | { |
573 | 574 | ||
@@ -648,7 +649,7 @@ int wl1271_cmd_scan(struct wl1271 *wl, const u8 *ssid, size_t ssid_len, | |||
648 | } | 649 | } |
649 | 650 | ||
650 | ret = wl1271_cmd_build_probe_req(wl, ssid, ssid_len, | 651 | ret = wl1271_cmd_build_probe_req(wl, ssid, ssid_len, |
651 | ie, ie_len, ieee_band); | 652 | req->ie, req->ie_len, ieee_band); |
652 | if (ret < 0) { | 653 | if (ret < 0) { |
653 | wl1271_error("PROBE request template failed"); | 654 | wl1271_error("PROBE request template failed"); |
654 | goto out; | 655 | goto out; |
@@ -684,7 +685,9 @@ int wl1271_cmd_scan(struct wl1271 *wl, const u8 *ssid, size_t ssid_len, | |||
684 | memcpy(wl->scan.ssid, ssid, ssid_len); | 685 | memcpy(wl->scan.ssid, ssid, ssid_len); |
685 | } else | 686 | } else |
686 | wl->scan.ssid_len = 0; | 687 | wl->scan.ssid_len = 0; |
687 | } | 688 | wl->scan.req = req; |
689 | } else | ||
690 | wl->scan.req = NULL; | ||
688 | } | 691 | } |
689 | 692 | ||
690 | ret = wl1271_cmd_send(wl, CMD_SCAN, params, sizeof(*params), 0); | 693 | ret = wl1271_cmd_send(wl, CMD_SCAN, params, sizeof(*params), 0); |
diff --git a/drivers/net/wireless/wl12xx/wl1271_cmd.h b/drivers/net/wireless/wl12xx/wl1271_cmd.h index f2820b42a943..f5745d829c9b 100644 --- a/drivers/net/wireless/wl12xx/wl1271_cmd.h +++ b/drivers/net/wireless/wl12xx/wl1271_cmd.h | |||
@@ -42,7 +42,7 @@ int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode, bool send); | |||
42 | int wl1271_cmd_read_memory(struct wl1271 *wl, u32 addr, void *answer, | 42 | int wl1271_cmd_read_memory(struct wl1271 *wl, u32 addr, void *answer, |
43 | size_t len); | 43 | size_t len); |
44 | int wl1271_cmd_scan(struct wl1271 *wl, const u8 *ssid, size_t ssid_len, | 44 | int wl1271_cmd_scan(struct wl1271 *wl, const u8 *ssid, size_t ssid_len, |
45 | const u8 *ie, size_t ie_len, u8 active_scan, | 45 | struct cfg80211_scan_request *req, u8 active_scan, |
46 | u8 high_prio, u8 band, u8 probe_requests); | 46 | u8 high_prio, u8 band, u8 probe_requests); |
47 | int wl1271_cmd_template_set(struct wl1271 *wl, u16 template_id, | 47 | int wl1271_cmd_template_set(struct wl1271 *wl, u16 template_id, |
48 | void *buf, size_t buf_len, int index, u32 rates); | 48 | void *buf, size_t buf_len, int index, u32 rates); |
@@ -136,14 +136,14 @@ struct wl1271_cmd_header { | |||
136 | __le16 status; | 136 | __le16 status; |
137 | /* payload */ | 137 | /* payload */ |
138 | u8 data[0]; | 138 | u8 data[0]; |
139 | } __attribute__ ((packed)); | 139 | } __packed; |
140 | 140 | ||
141 | #define WL1271_CMD_MAX_PARAMS 572 | 141 | #define WL1271_CMD_MAX_PARAMS 572 |
142 | 142 | ||
143 | struct wl1271_command { | 143 | struct wl1271_command { |
144 | struct wl1271_cmd_header header; | 144 | struct wl1271_cmd_header header; |
145 | u8 parameters[WL1271_CMD_MAX_PARAMS]; | 145 | u8 parameters[WL1271_CMD_MAX_PARAMS]; |
146 | } __attribute__ ((packed)); | 146 | } __packed; |
147 | 147 | ||
148 | enum { | 148 | enum { |
149 | CMD_MAILBOX_IDLE = 0, | 149 | CMD_MAILBOX_IDLE = 0, |
@@ -196,7 +196,7 @@ struct cmd_read_write_memory { | |||
196 | of this field is the Host in WRITE command or the Wilink in READ | 196 | of this field is the Host in WRITE command or the Wilink in READ |
197 | command. */ | 197 | command. */ |
198 | u8 value[MAX_READ_SIZE]; | 198 | u8 value[MAX_READ_SIZE]; |
199 | } __attribute__ ((packed)); | 199 | } __packed; |
200 | 200 | ||
201 | #define CMDMBOX_HEADER_LEN 4 | 201 | #define CMDMBOX_HEADER_LEN 4 |
202 | #define CMDMBOX_INFO_ELEM_HEADER_LEN 4 | 202 | #define CMDMBOX_INFO_ELEM_HEADER_LEN 4 |
@@ -243,14 +243,14 @@ struct wl1271_cmd_join { | |||
243 | u8 ssid[IW_ESSID_MAX_SIZE]; | 243 | u8 ssid[IW_ESSID_MAX_SIZE]; |
244 | u8 ctrl; /* JOIN_CMD_CTRL_* */ | 244 | u8 ctrl; /* JOIN_CMD_CTRL_* */ |
245 | u8 reserved[3]; | 245 | u8 reserved[3]; |
246 | } __attribute__ ((packed)); | 246 | } __packed; |
247 | 247 | ||
248 | struct cmd_enabledisable_path { | 248 | struct cmd_enabledisable_path { |
249 | struct wl1271_cmd_header header; | 249 | struct wl1271_cmd_header header; |
250 | 250 | ||
251 | u8 channel; | 251 | u8 channel; |
252 | u8 padding[3]; | 252 | u8 padding[3]; |
253 | } __attribute__ ((packed)); | 253 | } __packed; |
254 | 254 | ||
255 | #define WL1271_RATE_AUTOMATIC 0 | 255 | #define WL1271_RATE_AUTOMATIC 0 |
256 | 256 | ||
@@ -266,7 +266,7 @@ struct wl1271_cmd_template_set { | |||
266 | u8 aflags; | 266 | u8 aflags; |
267 | u8 reserved; | 267 | u8 reserved; |
268 | u8 template_data[WL1271_CMD_TEMPL_MAX_SIZE]; | 268 | u8 template_data[WL1271_CMD_TEMPL_MAX_SIZE]; |
269 | } __attribute__ ((packed)); | 269 | } __packed; |
270 | 270 | ||
271 | #define TIM_ELE_ID 5 | 271 | #define TIM_ELE_ID 5 |
272 | #define PARTIAL_VBM_MAX 251 | 272 | #define PARTIAL_VBM_MAX 251 |
@@ -278,7 +278,7 @@ struct wl1271_tim { | |||
278 | u8 dtim_period; | 278 | u8 dtim_period; |
279 | u8 bitmap_ctrl; | 279 | u8 bitmap_ctrl; |
280 | u8 pvb_field[PARTIAL_VBM_MAX]; /* Partial Virtual Bitmap */ | 280 | u8 pvb_field[PARTIAL_VBM_MAX]; /* Partial Virtual Bitmap */ |
281 | } __attribute__ ((packed)); | 281 | } __packed; |
282 | 282 | ||
283 | enum wl1271_cmd_ps_mode { | 283 | enum wl1271_cmd_ps_mode { |
284 | STATION_ACTIVE_MODE, | 284 | STATION_ACTIVE_MODE, |
@@ -298,7 +298,7 @@ struct wl1271_cmd_ps_params { | |||
298 | */ | 298 | */ |
299 | u8 hang_over_period; | 299 | u8 hang_over_period; |
300 | __le32 null_data_rate; | 300 | __le32 null_data_rate; |
301 | } __attribute__ ((packed)); | 301 | } __packed; |
302 | 302 | ||
303 | /* HW encryption keys */ | 303 | /* HW encryption keys */ |
304 | #define NUM_ACCESS_CATEGORIES_COPY 4 | 304 | #define NUM_ACCESS_CATEGORIES_COPY 4 |
@@ -348,7 +348,7 @@ struct wl1271_cmd_set_keys { | |||
348 | u8 key[MAX_KEY_SIZE]; | 348 | u8 key[MAX_KEY_SIZE]; |
349 | __le16 ac_seq_num16[NUM_ACCESS_CATEGORIES_COPY]; | 349 | __le16 ac_seq_num16[NUM_ACCESS_CATEGORIES_COPY]; |
350 | __le32 ac_seq_num32[NUM_ACCESS_CATEGORIES_COPY]; | 350 | __le32 ac_seq_num32[NUM_ACCESS_CATEGORIES_COPY]; |
351 | } __attribute__ ((packed)); | 351 | } __packed; |
352 | 352 | ||
353 | 353 | ||
354 | #define WL1271_SCAN_MAX_CHANNELS 24 | 354 | #define WL1271_SCAN_MAX_CHANNELS 24 |
@@ -385,7 +385,7 @@ struct basic_scan_params { | |||
385 | u8 use_ssid_list; | 385 | u8 use_ssid_list; |
386 | u8 scan_tag; | 386 | u8 scan_tag; |
387 | u8 padding2; | 387 | u8 padding2; |
388 | } __attribute__ ((packed)); | 388 | } __packed; |
389 | 389 | ||
390 | struct basic_scan_channel_params { | 390 | struct basic_scan_channel_params { |
391 | /* Duration in TU to wait for frames on a channel for active scan */ | 391 | /* Duration in TU to wait for frames on a channel for active scan */ |
@@ -400,25 +400,25 @@ struct basic_scan_channel_params { | |||
400 | u8 dfs_candidate; | 400 | u8 dfs_candidate; |
401 | u8 activity_detected; | 401 | u8 activity_detected; |
402 | u8 pad; | 402 | u8 pad; |
403 | } __attribute__ ((packed)); | 403 | } __packed; |
404 | 404 | ||
405 | struct wl1271_cmd_scan { | 405 | struct wl1271_cmd_scan { |
406 | struct wl1271_cmd_header header; | 406 | struct wl1271_cmd_header header; |
407 | 407 | ||
408 | struct basic_scan_params params; | 408 | struct basic_scan_params params; |
409 | struct basic_scan_channel_params channels[WL1271_SCAN_MAX_CHANNELS]; | 409 | struct basic_scan_channel_params channels[WL1271_SCAN_MAX_CHANNELS]; |
410 | } __attribute__ ((packed)); | 410 | } __packed; |
411 | 411 | ||
412 | struct wl1271_cmd_trigger_scan_to { | 412 | struct wl1271_cmd_trigger_scan_to { |
413 | struct wl1271_cmd_header header; | 413 | struct wl1271_cmd_header header; |
414 | 414 | ||
415 | __le32 timeout; | 415 | __le32 timeout; |
416 | } __attribute__ ((packed)); | 416 | } __packed; |
417 | 417 | ||
418 | struct wl1271_cmd_test_header { | 418 | struct wl1271_cmd_test_header { |
419 | u8 id; | 419 | u8 id; |
420 | u8 padding[3]; | 420 | u8 padding[3]; |
421 | } __attribute__ ((packed)); | 421 | } __packed; |
422 | 422 | ||
423 | enum wl1271_channel_tune_bands { | 423 | enum wl1271_channel_tune_bands { |
424 | WL1271_CHANNEL_TUNE_BAND_2_4, | 424 | WL1271_CHANNEL_TUNE_BAND_2_4, |
@@ -439,25 +439,31 @@ struct wl1271_general_parms_cmd { | |||
439 | 439 | ||
440 | struct wl1271_cmd_test_header test; | 440 | struct wl1271_cmd_test_header test; |
441 | 441 | ||
442 | u8 params[WL1271_NVS_GENERAL_PARAMS_SIZE]; | 442 | struct wl1271_ini_general_params general_params; |
443 | s8 reserved[23]; | ||
444 | } __attribute__ ((packed)); | ||
445 | 443 | ||
446 | #define WL1271_STAT_RADIO_PARAMS_5_SIZE 29 | 444 | u8 sr_debug_table[WL1271_INI_MAX_SMART_REFLEX_PARAM]; |
447 | #define WL1271_DYN_RADIO_PARAMS_5_SIZE 104 | 445 | u8 sr_sen_n_p; |
446 | u8 sr_sen_n_p_gain; | ||
447 | u8 sr_sen_nrn; | ||
448 | u8 sr_sen_prn; | ||
449 | u8 padding[3]; | ||
450 | } __packed; | ||
448 | 451 | ||
449 | struct wl1271_radio_parms_cmd { | 452 | struct wl1271_radio_parms_cmd { |
450 | struct wl1271_cmd_header header; | 453 | struct wl1271_cmd_header header; |
451 | 454 | ||
452 | struct wl1271_cmd_test_header test; | 455 | struct wl1271_cmd_test_header test; |
453 | 456 | ||
454 | u8 stat_radio_params[WL1271_NVS_STAT_RADIO_PARAMS_SIZE]; | 457 | /* Static radio parameters */ |
455 | u8 stat_radio_params_5[WL1271_STAT_RADIO_PARAMS_5_SIZE]; | 458 | struct wl1271_ini_band_params_2 static_params_2; |
459 | struct wl1271_ini_band_params_5 static_params_5; | ||
456 | 460 | ||
457 | u8 dyn_radio_params[WL1271_NVS_DYN_RADIO_PARAMS_SIZE]; | 461 | /* Dynamic radio parameters */ |
458 | u8 reserved; | 462 | struct wl1271_ini_fem_params_2 dyn_params_2; |
459 | u8 dyn_radio_params_5[WL1271_DYN_RADIO_PARAMS_5_SIZE]; | 463 | u8 padding2; |
460 | } __attribute__ ((packed)); | 464 | struct wl1271_ini_fem_params_5 dyn_params_5; |
465 | u8 padding3[2]; | ||
466 | } __packed; | ||
461 | 467 | ||
462 | struct wl1271_cmd_cal_channel_tune { | 468 | struct wl1271_cmd_cal_channel_tune { |
463 | struct wl1271_cmd_header header; | 469 | struct wl1271_cmd_header header; |
@@ -468,7 +474,7 @@ struct wl1271_cmd_cal_channel_tune { | |||
468 | u8 channel; | 474 | u8 channel; |
469 | 475 | ||
470 | __le16 radio_status; | 476 | __le16 radio_status; |
471 | } __attribute__ ((packed)); | 477 | } __packed; |
472 | 478 | ||
473 | struct wl1271_cmd_cal_update_ref_point { | 479 | struct wl1271_cmd_cal_update_ref_point { |
474 | struct wl1271_cmd_header header; | 480 | struct wl1271_cmd_header header; |
@@ -479,7 +485,7 @@ struct wl1271_cmd_cal_update_ref_point { | |||
479 | __le32 ref_detector; | 485 | __le32 ref_detector; |
480 | u8 sub_band; | 486 | u8 sub_band; |
481 | u8 padding[3]; | 487 | u8 padding[3]; |
482 | } __attribute__ ((packed)); | 488 | } __packed; |
483 | 489 | ||
484 | #define MAX_TLV_LENGTH 400 | 490 | #define MAX_TLV_LENGTH 400 |
485 | #define MAX_NVS_VERSION_LENGTH 12 | 491 | #define MAX_NVS_VERSION_LENGTH 12 |
@@ -501,7 +507,7 @@ struct wl1271_cmd_cal_p2g { | |||
501 | 507 | ||
502 | u8 sub_band_mask; | 508 | u8 sub_band_mask; |
503 | u8 padding2; | 509 | u8 padding2; |
504 | } __attribute__ ((packed)); | 510 | } __packed; |
505 | 511 | ||
506 | 512 | ||
507 | /* | 513 | /* |
@@ -529,6 +535,6 @@ struct wl1271_cmd_disconnect { | |||
529 | u8 type; | 535 | u8 type; |
530 | 536 | ||
531 | u8 padding; | 537 | u8 padding; |
532 | } __attribute__ ((packed)); | 538 | } __packed; |
533 | 539 | ||
534 | #endif /* __WL1271_CMD_H__ */ | 540 | #endif /* __WL1271_CMD_H__ */ |
diff --git a/drivers/net/wireless/wl12xx/wl1271_event.c b/drivers/net/wireless/wl12xx/wl1271_event.c index cf37aa6eb137..ca52cdec7a8f 100644 --- a/drivers/net/wireless/wl12xx/wl1271_event.c +++ b/drivers/net/wireless/wl12xx/wl1271_event.c | |||
@@ -43,11 +43,11 @@ static int wl1271_event_scan_complete(struct wl1271 *wl, | |||
43 | clear_bit(WL1271_FLAG_SCANNING, &wl->flags); | 43 | clear_bit(WL1271_FLAG_SCANNING, &wl->flags); |
44 | /* FIXME: ie missing! */ | 44 | /* FIXME: ie missing! */ |
45 | wl1271_cmd_scan(wl, wl->scan.ssid, wl->scan.ssid_len, | 45 | wl1271_cmd_scan(wl, wl->scan.ssid, wl->scan.ssid_len, |
46 | NULL, 0, | 46 | wl->scan.req, |
47 | wl->scan.active, | 47 | wl->scan.active, |
48 | wl->scan.high_prio, | 48 | wl->scan.high_prio, |
49 | WL1271_SCAN_BAND_5_GHZ, | 49 | WL1271_SCAN_BAND_5_GHZ, |
50 | wl->scan.probe_requests); | 50 | wl->scan.probe_requests); |
51 | } else { | 51 | } else { |
52 | mutex_unlock(&wl->mutex); | 52 | mutex_unlock(&wl->mutex); |
53 | ieee80211_scan_completed(wl->hw, false); | 53 | ieee80211_scan_completed(wl->hw, false); |
diff --git a/drivers/net/wireless/wl12xx/wl1271_event.h b/drivers/net/wireless/wl12xx/wl1271_event.h index 58371008f270..43d5aeae1783 100644 --- a/drivers/net/wireless/wl12xx/wl1271_event.h +++ b/drivers/net/wireless/wl12xx/wl1271_event.h | |||
@@ -85,7 +85,7 @@ struct event_debug_report { | |||
85 | __le32 report_1; | 85 | __le32 report_1; |
86 | __le32 report_2; | 86 | __le32 report_2; |
87 | __le32 report_3; | 87 | __le32 report_3; |
88 | } __attribute__ ((packed)); | 88 | } __packed; |
89 | 89 | ||
90 | #define NUM_OF_RSSI_SNR_TRIGGERS 8 | 90 | #define NUM_OF_RSSI_SNR_TRIGGERS 8 |
91 | 91 | ||
@@ -116,7 +116,7 @@ struct event_mailbox { | |||
116 | u8 ps_status; | 116 | u8 ps_status; |
117 | 117 | ||
118 | u8 reserved_5[29]; | 118 | u8 reserved_5[29]; |
119 | } __attribute__ ((packed)); | 119 | } __packed; |
120 | 120 | ||
121 | int wl1271_event_unmask(struct wl1271 *wl); | 121 | int wl1271_event_unmask(struct wl1271 *wl); |
122 | void wl1271_event_mbox_config(struct wl1271 *wl); | 122 | void wl1271_event_mbox_config(struct wl1271 *wl); |
diff --git a/drivers/net/wireless/wl12xx/wl1271_ini.h b/drivers/net/wireless/wl12xx/wl1271_ini.h new file mode 100644 index 000000000000..2313047d4015 --- /dev/null +++ b/drivers/net/wireless/wl12xx/wl1271_ini.h | |||
@@ -0,0 +1,123 @@ | |||
1 | /* | ||
2 | * This file is part of wl1271 | ||
3 | * | ||
4 | * Copyright (C) 2010 Nokia Corporation | ||
5 | * | ||
6 | * Contact: Luciano Coelho <luciano.coelho@nokia.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * version 2 as published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, but | ||
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
15 | * General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
20 | * 02110-1301 USA | ||
21 | * | ||
22 | */ | ||
23 | |||
24 | #ifndef __WL1271_INI_H__ | ||
25 | #define __WL1271_INI_H__ | ||
26 | |||
27 | #define WL1271_INI_MAX_SMART_REFLEX_PARAM 16 | ||
28 | |||
29 | struct wl1271_ini_general_params { | ||
30 | u8 ref_clock; | ||
31 | u8 settling_time; | ||
32 | u8 clk_valid_on_wakeup; | ||
33 | u8 dc2dc_mode; | ||
34 | u8 dual_mode_select; | ||
35 | u8 tx_bip_fem_auto_detect; | ||
36 | u8 tx_bip_fem_manufacturer; | ||
37 | u8 general_settings; | ||
38 | u8 sr_state; | ||
39 | u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM]; | ||
40 | u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM]; | ||
41 | u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM]; | ||
42 | } __packed; | ||
43 | |||
44 | #define WL1271_INI_RSSI_PROCESS_COMPENS_SIZE 15 | ||
45 | |||
46 | struct wl1271_ini_band_params_2 { | ||
47 | u8 rx_trace_insertion_loss; | ||
48 | u8 tx_trace_loss; | ||
49 | u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE]; | ||
50 | } __packed; | ||
51 | |||
52 | #define WL1271_INI_RATE_GROUP_COUNT 6 | ||
53 | #define WL1271_INI_CHANNEL_COUNT_2 14 | ||
54 | |||
55 | struct wl1271_ini_fem_params_2 { | ||
56 | __le16 tx_bip_ref_pd_voltage; | ||
57 | u8 tx_bip_ref_power; | ||
58 | u8 tx_bip_ref_offset; | ||
59 | u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT]; | ||
60 | u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT]; | ||
61 | u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT]; | ||
62 | u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2]; | ||
63 | u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2]; | ||
64 | u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT]; | ||
65 | u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT]; | ||
66 | u8 rx_fem_insertion_loss; | ||
67 | u8 degraded_low_to_normal_thr; | ||
68 | u8 normal_to_degraded_high_thr; | ||
69 | } __packed; | ||
70 | |||
71 | #define WL1271_INI_CHANNEL_COUNT_5 35 | ||
72 | #define WL1271_INI_SUB_BAND_COUNT_5 7 | ||
73 | |||
74 | struct wl1271_ini_band_params_5 { | ||
75 | u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5]; | ||
76 | u8 tx_trace_loss[WL1271_INI_SUB_BAND_COUNT_5]; | ||
77 | u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE]; | ||
78 | } __packed; | ||
79 | |||
80 | struct wl1271_ini_fem_params_5 { | ||
81 | __le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5]; | ||
82 | u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5]; | ||
83 | u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5]; | ||
84 | u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT]; | ||
85 | u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT]; | ||
86 | u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT]; | ||
87 | u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5]; | ||
88 | u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT]; | ||
89 | u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT]; | ||
90 | u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5]; | ||
91 | u8 degraded_low_to_normal_thr; | ||
92 | u8 normal_to_degraded_high_thr; | ||
93 | } __packed; | ||
94 | |||
95 | |||
96 | /* NVS data structure */ | ||
97 | #define WL1271_INI_NVS_SECTION_SIZE 468 | ||
98 | #define WL1271_INI_FEM_MODULE_COUNT 2 | ||
99 | |||
100 | #define WL1271_INI_LEGACY_NVS_FILE_SIZE 800 | ||
101 | |||
102 | struct wl1271_nvs_file { | ||
103 | /* NVS section */ | ||
104 | u8 nvs[WL1271_INI_NVS_SECTION_SIZE]; | ||
105 | |||
106 | /* INI section */ | ||
107 | struct wl1271_ini_general_params general_params; | ||
108 | u8 padding1; | ||
109 | struct wl1271_ini_band_params_2 stat_radio_params_2; | ||
110 | u8 padding2; | ||
111 | struct { | ||
112 | struct wl1271_ini_fem_params_2 params; | ||
113 | u8 padding; | ||
114 | } dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT]; | ||
115 | struct wl1271_ini_band_params_5 stat_radio_params_5; | ||
116 | u8 padding3; | ||
117 | struct { | ||
118 | struct wl1271_ini_fem_params_5 params; | ||
119 | u8 padding; | ||
120 | } dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT]; | ||
121 | } __packed; | ||
122 | |||
123 | #endif | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_main.c b/drivers/net/wireless/wl12xx/wl1271_main.c index b7d9137851ac..7a14da506d78 100644 --- a/drivers/net/wireless/wl12xx/wl1271_main.c +++ b/drivers/net/wireless/wl12xx/wl1271_main.c | |||
@@ -566,14 +566,21 @@ static int wl1271_fetch_nvs(struct wl1271 *wl) | |||
566 | return ret; | 566 | return ret; |
567 | } | 567 | } |
568 | 568 | ||
569 | if (fw->size != sizeof(struct wl1271_nvs_file)) { | 569 | /* |
570 | * FIXME: the LEGACY NVS image support (NVS's missing the 5GHz band | ||
571 | * configurations) can be removed when those NVS files stop floating | ||
572 | * around. | ||
573 | */ | ||
574 | if (fw->size != sizeof(struct wl1271_nvs_file) && | ||
575 | (fw->size != WL1271_INI_LEGACY_NVS_FILE_SIZE || | ||
576 | wl1271_11a_enabled())) { | ||
570 | wl1271_error("nvs size is not as expected: %zu != %zu", | 577 | wl1271_error("nvs size is not as expected: %zu != %zu", |
571 | fw->size, sizeof(struct wl1271_nvs_file)); | 578 | fw->size, sizeof(struct wl1271_nvs_file)); |
572 | ret = -EILSEQ; | 579 | ret = -EILSEQ; |
573 | goto out; | 580 | goto out; |
574 | } | 581 | } |
575 | 582 | ||
576 | wl->nvs = kmalloc(sizeof(struct wl1271_nvs_file), GFP_KERNEL); | 583 | wl->nvs = kzalloc(sizeof(struct wl1271_nvs_file), GFP_KERNEL); |
577 | 584 | ||
578 | if (!wl->nvs) { | 585 | if (!wl->nvs) { |
579 | wl1271_error("could not allocate memory for the nvs file"); | 586 | wl1271_error("could not allocate memory for the nvs file"); |
@@ -581,7 +588,7 @@ static int wl1271_fetch_nvs(struct wl1271 *wl) | |||
581 | goto out; | 588 | goto out; |
582 | } | 589 | } |
583 | 590 | ||
584 | memcpy(wl->nvs, fw->data, sizeof(struct wl1271_nvs_file)); | 591 | memcpy(wl->nvs, fw->data, fw->size); |
585 | 592 | ||
586 | out: | 593 | out: |
587 | release_firmware(fw); | 594 | release_firmware(fw); |
@@ -1044,7 +1051,7 @@ static void wl1271_op_remove_interface(struct ieee80211_hw *hw, | |||
1044 | mutex_lock(&wl->mutex); | 1051 | mutex_lock(&wl->mutex); |
1045 | 1052 | ||
1046 | /* let's notify MAC80211 about the remaining pending TX frames */ | 1053 | /* let's notify MAC80211 about the remaining pending TX frames */ |
1047 | wl1271_tx_flush(wl); | 1054 | wl1271_tx_reset(wl); |
1048 | wl1271_power_off(wl); | 1055 | wl1271_power_off(wl); |
1049 | 1056 | ||
1050 | memset(wl->bssid, 0, ETH_ALEN); | 1057 | memset(wl->bssid, 0, ETH_ALEN); |
@@ -1241,6 +1248,42 @@ static u32 wl1271_min_rate_get(struct wl1271 *wl) | |||
1241 | return rate; | 1248 | return rate; |
1242 | } | 1249 | } |
1243 | 1250 | ||
1251 | static int wl1271_handle_idle(struct wl1271 *wl, bool idle) | ||
1252 | { | ||
1253 | int ret; | ||
1254 | |||
1255 | if (idle) { | ||
1256 | if (test_bit(WL1271_FLAG_JOINED, &wl->flags)) { | ||
1257 | ret = wl1271_unjoin(wl); | ||
1258 | if (ret < 0) | ||
1259 | goto out; | ||
1260 | } | ||
1261 | wl->rate_set = wl1271_min_rate_get(wl); | ||
1262 | wl->sta_rate_set = 0; | ||
1263 | ret = wl1271_acx_rate_policies(wl); | ||
1264 | if (ret < 0) | ||
1265 | goto out; | ||
1266 | ret = wl1271_acx_keep_alive_config( | ||
1267 | wl, CMD_TEMPL_KLV_IDX_NULL_DATA, | ||
1268 | ACX_KEEP_ALIVE_TPL_INVALID); | ||
1269 | if (ret < 0) | ||
1270 | goto out; | ||
1271 | set_bit(WL1271_FLAG_IDLE, &wl->flags); | ||
1272 | } else { | ||
1273 | /* increment the session counter */ | ||
1274 | wl->session_counter++; | ||
1275 | if (wl->session_counter >= SESSION_COUNTER_MAX) | ||
1276 | wl->session_counter = 0; | ||
1277 | ret = wl1271_dummy_join(wl); | ||
1278 | if (ret < 0) | ||
1279 | goto out; | ||
1280 | clear_bit(WL1271_FLAG_IDLE, &wl->flags); | ||
1281 | } | ||
1282 | |||
1283 | out: | ||
1284 | return ret; | ||
1285 | } | ||
1286 | |||
1244 | static int wl1271_op_config(struct ieee80211_hw *hw, u32 changed) | 1287 | static int wl1271_op_config(struct ieee80211_hw *hw, u32 changed) |
1245 | { | 1288 | { |
1246 | struct wl1271 *wl = hw->priv; | 1289 | struct wl1271 *wl = hw->priv; |
@@ -1255,6 +1298,15 @@ static int wl1271_op_config(struct ieee80211_hw *hw, u32 changed) | |||
1255 | conf->power_level, | 1298 | conf->power_level, |
1256 | conf->flags & IEEE80211_CONF_IDLE ? "idle" : "in use"); | 1299 | conf->flags & IEEE80211_CONF_IDLE ? "idle" : "in use"); |
1257 | 1300 | ||
1301 | /* | ||
1302 | * mac80211 will go to idle nearly immediately after transmitting some | ||
1303 | * frames, such as the deauth. To make sure those frames reach the air, | ||
1304 | * wait here until the TX queue is fully flushed. | ||
1305 | */ | ||
1306 | if ((changed & IEEE80211_CONF_CHANGE_IDLE) && | ||
1307 | (conf->flags & IEEE80211_CONF_IDLE)) | ||
1308 | wl1271_tx_flush(wl); | ||
1309 | |||
1258 | mutex_lock(&wl->mutex); | 1310 | mutex_lock(&wl->mutex); |
1259 | 1311 | ||
1260 | if (unlikely(wl->state == WL1271_STATE_OFF)) | 1312 | if (unlikely(wl->state == WL1271_STATE_OFF)) |
@@ -1295,22 +1347,9 @@ static int wl1271_op_config(struct ieee80211_hw *hw, u32 changed) | |||
1295 | } | 1347 | } |
1296 | 1348 | ||
1297 | if (changed & IEEE80211_CONF_CHANGE_IDLE) { | 1349 | if (changed & IEEE80211_CONF_CHANGE_IDLE) { |
1298 | if (conf->flags & IEEE80211_CONF_IDLE && | 1350 | ret = wl1271_handle_idle(wl, conf->flags & IEEE80211_CONF_IDLE); |
1299 | test_bit(WL1271_FLAG_JOINED, &wl->flags)) | 1351 | if (ret < 0) |
1300 | wl1271_unjoin(wl); | 1352 | wl1271_warning("idle mode change failed %d", ret); |
1301 | else if (!(conf->flags & IEEE80211_CONF_IDLE)) | ||
1302 | wl1271_dummy_join(wl); | ||
1303 | |||
1304 | if (conf->flags & IEEE80211_CONF_IDLE) { | ||
1305 | wl->rate_set = wl1271_min_rate_get(wl); | ||
1306 | wl->sta_rate_set = 0; | ||
1307 | wl1271_acx_rate_policies(wl); | ||
1308 | wl1271_acx_keep_alive_config( | ||
1309 | wl, CMD_TEMPL_KLV_IDX_NULL_DATA, | ||
1310 | ACX_KEEP_ALIVE_TPL_INVALID); | ||
1311 | set_bit(WL1271_FLAG_IDLE, &wl->flags); | ||
1312 | } else | ||
1313 | clear_bit(WL1271_FLAG_IDLE, &wl->flags); | ||
1314 | } | 1353 | } |
1315 | 1354 | ||
1316 | if (conf->flags & IEEE80211_CONF_PS && | 1355 | if (conf->flags & IEEE80211_CONF_PS && |
@@ -1595,13 +1634,11 @@ static int wl1271_op_hw_scan(struct ieee80211_hw *hw, | |||
1595 | goto out; | 1634 | goto out; |
1596 | 1635 | ||
1597 | if (wl1271_11a_enabled()) | 1636 | if (wl1271_11a_enabled()) |
1598 | ret = wl1271_cmd_scan(hw->priv, ssid, len, | 1637 | ret = wl1271_cmd_scan(hw->priv, ssid, len, req, |
1599 | req->ie, req->ie_len, 1, 0, | 1638 | 1, 0, WL1271_SCAN_BAND_DUAL, 3); |
1600 | WL1271_SCAN_BAND_DUAL, 3); | ||
1601 | else | 1639 | else |
1602 | ret = wl1271_cmd_scan(hw->priv, ssid, len, | 1640 | ret = wl1271_cmd_scan(hw->priv, ssid, len, req, |
1603 | req->ie, req->ie_len, 1, 0, | 1641 | 1, 0, WL1271_SCAN_BAND_2_4_GHZ, 3); |
1604 | WL1271_SCAN_BAND_2_4_GHZ, 3); | ||
1605 | 1642 | ||
1606 | wl1271_ps_elp_sleep(wl); | 1643 | wl1271_ps_elp_sleep(wl); |
1607 | 1644 | ||
@@ -1991,7 +2028,7 @@ static struct ieee80211_channel wl1271_channels[] = { | |||
1991 | }; | 2028 | }; |
1992 | 2029 | ||
1993 | /* mapping to indexes for wl1271_rates */ | 2030 | /* mapping to indexes for wl1271_rates */ |
1994 | const static u8 wl1271_rate_to_idx_2ghz[] = { | 2031 | static const u8 wl1271_rate_to_idx_2ghz[] = { |
1995 | /* MCS rates are used only with 11n */ | 2032 | /* MCS rates are used only with 11n */ |
1996 | CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_MCS7 */ | 2033 | CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_MCS7 */ |
1997 | CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_MCS6 */ | 2034 | CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_MCS6 */ |
@@ -2103,7 +2140,7 @@ static struct ieee80211_channel wl1271_channels_5ghz[] = { | |||
2103 | }; | 2140 | }; |
2104 | 2141 | ||
2105 | /* mapping to indexes for wl1271_rates_5ghz */ | 2142 | /* mapping to indexes for wl1271_rates_5ghz */ |
2106 | const static u8 wl1271_rate_to_idx_5ghz[] = { | 2143 | static const u8 wl1271_rate_to_idx_5ghz[] = { |
2107 | /* MCS rates are used only with 11n */ | 2144 | /* MCS rates are used only with 11n */ |
2108 | CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_MCS7 */ | 2145 | CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_MCS7 */ |
2109 | CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_MCS6 */ | 2146 | CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_MCS6 */ |
@@ -2139,7 +2176,7 @@ static struct ieee80211_supported_band wl1271_band_5ghz = { | |||
2139 | .n_bitrates = ARRAY_SIZE(wl1271_rates_5ghz), | 2176 | .n_bitrates = ARRAY_SIZE(wl1271_rates_5ghz), |
2140 | }; | 2177 | }; |
2141 | 2178 | ||
2142 | const static u8 *wl1271_band_rate_to_idx[] = { | 2179 | static const u8 *wl1271_band_rate_to_idx[] = { |
2143 | [IEEE80211_BAND_2GHZ] = wl1271_rate_to_idx_2ghz, | 2180 | [IEEE80211_BAND_2GHZ] = wl1271_rate_to_idx_2ghz, |
2144 | [IEEE80211_BAND_5GHZ] = wl1271_rate_to_idx_5ghz | 2181 | [IEEE80211_BAND_5GHZ] = wl1271_rate_to_idx_5ghz |
2145 | }; | 2182 | }; |
diff --git a/drivers/net/wireless/wl12xx/wl1271_rx.h b/drivers/net/wireless/wl12xx/wl1271_rx.h index b89be4758e78..13a232333b13 100644 --- a/drivers/net/wireless/wl12xx/wl1271_rx.h +++ b/drivers/net/wireless/wl12xx/wl1271_rx.h | |||
@@ -113,7 +113,7 @@ struct wl1271_rx_descriptor { | |||
113 | u8 process_id; | 113 | u8 process_id; |
114 | u8 pad_len; | 114 | u8 pad_len; |
115 | u8 reserved; | 115 | u8 reserved; |
116 | } __attribute__ ((packed)); | 116 | } __packed; |
117 | 117 | ||
118 | void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status); | 118 | void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status); |
119 | u8 wl1271_rate_to_idx(struct wl1271 *wl, int rate); | 119 | u8 wl1271_rate_to_idx(struct wl1271 *wl, int rate); |
diff --git a/drivers/net/wireless/wl12xx/wl1271_sdio.c b/drivers/net/wireless/wl12xx/wl1271_sdio.c index d3d6f302f705..7059b5cccf0f 100644 --- a/drivers/net/wireless/wl12xx/wl1271_sdio.c +++ b/drivers/net/wireless/wl12xx/wl1271_sdio.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include <linux/mmc/sdio_func.h> | 28 | #include <linux/mmc/sdio_func.h> |
29 | #include <linux/mmc/sdio_ids.h> | 29 | #include <linux/mmc/sdio_ids.h> |
30 | #include <linux/mmc/card.h> | 30 | #include <linux/mmc/card.h> |
31 | #include <plat/gpio.h> | 31 | #include <linux/gpio.h> |
32 | 32 | ||
33 | #include "wl1271.h" | 33 | #include "wl1271.h" |
34 | #include "wl12xx_80211.h" | 34 | #include "wl12xx_80211.h" |
diff --git a/drivers/net/wireless/wl12xx/wl1271_testmode.c b/drivers/net/wireless/wl12xx/wl1271_testmode.c index 554deb4d024e..6e0952f79e9a 100644 --- a/drivers/net/wireless/wl12xx/wl1271_testmode.c +++ b/drivers/net/wireless/wl12xx/wl1271_testmode.c | |||
@@ -199,7 +199,14 @@ static int wl1271_tm_cmd_nvs_push(struct wl1271 *wl, struct nlattr *tb[]) | |||
199 | buf = nla_data(tb[WL1271_TM_ATTR_DATA]); | 199 | buf = nla_data(tb[WL1271_TM_ATTR_DATA]); |
200 | len = nla_len(tb[WL1271_TM_ATTR_DATA]); | 200 | len = nla_len(tb[WL1271_TM_ATTR_DATA]); |
201 | 201 | ||
202 | if (len != sizeof(struct wl1271_nvs_file)) { | 202 | /* |
203 | * FIXME: the LEGACY NVS image support (NVS's missing the 5GHz band | ||
204 | * configurations) can be removed when those NVS files stop floating | ||
205 | * around. | ||
206 | */ | ||
207 | if (len != sizeof(struct wl1271_nvs_file) && | ||
208 | (len != WL1271_INI_LEGACY_NVS_FILE_SIZE || | ||
209 | wl1271_11a_enabled())) { | ||
203 | wl1271_error("nvs size is not as expected: %zu != %zu", | 210 | wl1271_error("nvs size is not as expected: %zu != %zu", |
204 | len, sizeof(struct wl1271_nvs_file)); | 211 | len, sizeof(struct wl1271_nvs_file)); |
205 | return -EMSGSIZE; | 212 | return -EMSGSIZE; |
@@ -209,7 +216,7 @@ static int wl1271_tm_cmd_nvs_push(struct wl1271 *wl, struct nlattr *tb[]) | |||
209 | 216 | ||
210 | kfree(wl->nvs); | 217 | kfree(wl->nvs); |
211 | 218 | ||
212 | wl->nvs = kmalloc(sizeof(struct wl1271_nvs_file), GFP_KERNEL); | 219 | wl->nvs = kzalloc(sizeof(struct wl1271_nvs_file), GFP_KERNEL); |
213 | if (!wl->nvs) { | 220 | if (!wl->nvs) { |
214 | wl1271_error("could not allocate memory for the nvs file"); | 221 | wl1271_error("could not allocate memory for the nvs file"); |
215 | ret = -ENOMEM; | 222 | ret = -ENOMEM; |
diff --git a/drivers/net/wireless/wl12xx/wl1271_tx.c b/drivers/net/wireless/wl12xx/wl1271_tx.c index 62db79508ddf..c592cc2e9fe8 100644 --- a/drivers/net/wireless/wl12xx/wl1271_tx.c +++ b/drivers/net/wireless/wl12xx/wl1271_tx.c | |||
@@ -36,6 +36,7 @@ static int wl1271_tx_id(struct wl1271 *wl, struct sk_buff *skb) | |||
36 | for (i = 0; i < ACX_TX_DESCRIPTORS; i++) | 36 | for (i = 0; i < ACX_TX_DESCRIPTORS; i++) |
37 | if (wl->tx_frames[i] == NULL) { | 37 | if (wl->tx_frames[i] == NULL) { |
38 | wl->tx_frames[i] = skb; | 38 | wl->tx_frames[i] = skb; |
39 | wl->tx_frames_cnt++; | ||
39 | return i; | 40 | return i; |
40 | } | 41 | } |
41 | 42 | ||
@@ -73,8 +74,10 @@ static int wl1271_tx_allocate(struct wl1271 *wl, struct sk_buff *skb, u32 extra) | |||
73 | wl1271_debug(DEBUG_TX, | 74 | wl1271_debug(DEBUG_TX, |
74 | "tx_allocate: size: %d, blocks: %d, id: %d", | 75 | "tx_allocate: size: %d, blocks: %d, id: %d", |
75 | total_len, total_blocks, id); | 76 | total_len, total_blocks, id); |
76 | } else | 77 | } else { |
77 | wl->tx_frames[id] = NULL; | 78 | wl->tx_frames[id] = NULL; |
79 | wl->tx_frames_cnt--; | ||
80 | } | ||
78 | 81 | ||
79 | return ret; | 82 | return ret; |
80 | } | 83 | } |
@@ -358,6 +361,7 @@ static void wl1271_tx_complete_packet(struct wl1271 *wl, | |||
358 | /* return the packet to the stack */ | 361 | /* return the packet to the stack */ |
359 | ieee80211_tx_status(wl->hw, skb); | 362 | ieee80211_tx_status(wl->hw, skb); |
360 | wl->tx_frames[result->id] = NULL; | 363 | wl->tx_frames[result->id] = NULL; |
364 | wl->tx_frames_cnt--; | ||
361 | } | 365 | } |
362 | 366 | ||
363 | /* Called upon reception of a TX complete interrupt */ | 367 | /* Called upon reception of a TX complete interrupt */ |
@@ -412,7 +416,7 @@ void wl1271_tx_complete(struct wl1271 *wl) | |||
412 | } | 416 | } |
413 | 417 | ||
414 | /* caller must hold wl->mutex */ | 418 | /* caller must hold wl->mutex */ |
415 | void wl1271_tx_flush(struct wl1271 *wl) | 419 | void wl1271_tx_reset(struct wl1271 *wl) |
416 | { | 420 | { |
417 | int i; | 421 | int i; |
418 | struct sk_buff *skb; | 422 | struct sk_buff *skb; |
@@ -421,7 +425,7 @@ void wl1271_tx_flush(struct wl1271 *wl) | |||
421 | /* control->flags = 0; FIXME */ | 425 | /* control->flags = 0; FIXME */ |
422 | 426 | ||
423 | while ((skb = skb_dequeue(&wl->tx_queue))) { | 427 | while ((skb = skb_dequeue(&wl->tx_queue))) { |
424 | wl1271_debug(DEBUG_TX, "flushing skb 0x%p", skb); | 428 | wl1271_debug(DEBUG_TX, "freeing skb 0x%p", skb); |
425 | ieee80211_tx_status(wl->hw, skb); | 429 | ieee80211_tx_status(wl->hw, skb); |
426 | } | 430 | } |
427 | 431 | ||
@@ -429,6 +433,32 @@ void wl1271_tx_flush(struct wl1271 *wl) | |||
429 | if (wl->tx_frames[i] != NULL) { | 433 | if (wl->tx_frames[i] != NULL) { |
430 | skb = wl->tx_frames[i]; | 434 | skb = wl->tx_frames[i]; |
431 | wl->tx_frames[i] = NULL; | 435 | wl->tx_frames[i] = NULL; |
436 | wl1271_debug(DEBUG_TX, "freeing skb 0x%p", skb); | ||
432 | ieee80211_tx_status(wl->hw, skb); | 437 | ieee80211_tx_status(wl->hw, skb); |
433 | } | 438 | } |
439 | wl->tx_frames_cnt = 0; | ||
440 | } | ||
441 | |||
442 | #define WL1271_TX_FLUSH_TIMEOUT 500000 | ||
443 | |||
444 | /* caller must *NOT* hold wl->mutex */ | ||
445 | void wl1271_tx_flush(struct wl1271 *wl) | ||
446 | { | ||
447 | unsigned long timeout; | ||
448 | timeout = jiffies + usecs_to_jiffies(WL1271_TX_FLUSH_TIMEOUT); | ||
449 | |||
450 | while (!time_after(jiffies, timeout)) { | ||
451 | mutex_lock(&wl->mutex); | ||
452 | wl1271_debug(DEBUG_TX, "flushing tx buffer: %d", | ||
453 | wl->tx_frames_cnt); | ||
454 | if ((wl->tx_frames_cnt == 0) && | ||
455 | skb_queue_empty(&wl->tx_queue)) { | ||
456 | mutex_unlock(&wl->mutex); | ||
457 | return; | ||
458 | } | ||
459 | mutex_unlock(&wl->mutex); | ||
460 | msleep(1); | ||
461 | } | ||
462 | |||
463 | wl1271_warning("Unable to flush all TX buffers, timed out."); | ||
434 | } | 464 | } |
diff --git a/drivers/net/wireless/wl12xx/wl1271_tx.h b/drivers/net/wireless/wl12xx/wl1271_tx.h index 3b8b7ac253fd..48bf92621c03 100644 --- a/drivers/net/wireless/wl12xx/wl1271_tx.h +++ b/drivers/net/wireless/wl12xx/wl1271_tx.h | |||
@@ -80,7 +80,7 @@ struct wl1271_tx_hw_descr { | |||
80 | /* Identifier of the remote STA in IBSS, 1 in infra-BSS */ | 80 | /* Identifier of the remote STA in IBSS, 1 in infra-BSS */ |
81 | u8 aid; | 81 | u8 aid; |
82 | u8 reserved; | 82 | u8 reserved; |
83 | } __attribute__ ((packed)); | 83 | } __packed; |
84 | 84 | ||
85 | enum wl1271_tx_hw_res_status { | 85 | enum wl1271_tx_hw_res_status { |
86 | TX_SUCCESS = 0, | 86 | TX_SUCCESS = 0, |
@@ -115,13 +115,13 @@ struct wl1271_tx_hw_res_descr { | |||
115 | u8 rate_class_index; | 115 | u8 rate_class_index; |
116 | /* for 4-byte alignment. */ | 116 | /* for 4-byte alignment. */ |
117 | u8 spare; | 117 | u8 spare; |
118 | } __attribute__ ((packed)); | 118 | } __packed; |
119 | 119 | ||
120 | struct wl1271_tx_hw_res_if { | 120 | struct wl1271_tx_hw_res_if { |
121 | __le32 tx_result_fw_counter; | 121 | __le32 tx_result_fw_counter; |
122 | __le32 tx_result_host_counter; | 122 | __le32 tx_result_host_counter; |
123 | struct wl1271_tx_hw_res_descr tx_results_queue[TX_HW_RESULT_QUEUE_LEN]; | 123 | struct wl1271_tx_hw_res_descr tx_results_queue[TX_HW_RESULT_QUEUE_LEN]; |
124 | } __attribute__ ((packed)); | 124 | } __packed; |
125 | 125 | ||
126 | static inline int wl1271_tx_get_queue(int queue) | 126 | static inline int wl1271_tx_get_queue(int queue) |
127 | { | 127 | { |
@@ -158,6 +158,7 @@ static inline int wl1271_tx_ac_to_tid(int ac) | |||
158 | 158 | ||
159 | void wl1271_tx_work(struct work_struct *work); | 159 | void wl1271_tx_work(struct work_struct *work); |
160 | void wl1271_tx_complete(struct wl1271 *wl); | 160 | void wl1271_tx_complete(struct wl1271 *wl); |
161 | void wl1271_tx_reset(struct wl1271 *wl); | ||
161 | void wl1271_tx_flush(struct wl1271 *wl); | 162 | void wl1271_tx_flush(struct wl1271 *wl); |
162 | u8 wl1271_rate_to_idx(struct wl1271 *wl, int rate); | 163 | u8 wl1271_rate_to_idx(struct wl1271 *wl, int rate); |
163 | u32 wl1271_tx_enabled_rates_get(struct wl1271 *wl, u32 rate_set); | 164 | u32 wl1271_tx_enabled_rates_get(struct wl1271 *wl, u32 rate_set); |
diff --git a/drivers/net/wireless/wl12xx/wl12xx_80211.h b/drivers/net/wireless/wl12xx/wl12xx_80211.h index 055d7bc6f592..184628027213 100644 --- a/drivers/net/wireless/wl12xx/wl12xx_80211.h +++ b/drivers/net/wireless/wl12xx/wl12xx_80211.h | |||
@@ -66,41 +66,41 @@ struct ieee80211_header { | |||
66 | u8 bssid[ETH_ALEN]; | 66 | u8 bssid[ETH_ALEN]; |
67 | __le16 seq_ctl; | 67 | __le16 seq_ctl; |
68 | u8 payload[0]; | 68 | u8 payload[0]; |
69 | } __attribute__ ((packed)); | 69 | } __packed; |
70 | 70 | ||
71 | struct wl12xx_ie_header { | 71 | struct wl12xx_ie_header { |
72 | u8 id; | 72 | u8 id; |
73 | u8 len; | 73 | u8 len; |
74 | } __attribute__ ((packed)); | 74 | } __packed; |
75 | 75 | ||
76 | /* IEs */ | 76 | /* IEs */ |
77 | 77 | ||
78 | struct wl12xx_ie_ssid { | 78 | struct wl12xx_ie_ssid { |
79 | struct wl12xx_ie_header header; | 79 | struct wl12xx_ie_header header; |
80 | char ssid[IW_ESSID_MAX_SIZE]; | 80 | char ssid[IW_ESSID_MAX_SIZE]; |
81 | } __attribute__ ((packed)); | 81 | } __packed; |
82 | 82 | ||
83 | struct wl12xx_ie_rates { | 83 | struct wl12xx_ie_rates { |
84 | struct wl12xx_ie_header header; | 84 | struct wl12xx_ie_header header; |
85 | u8 rates[MAX_SUPPORTED_RATES]; | 85 | u8 rates[MAX_SUPPORTED_RATES]; |
86 | } __attribute__ ((packed)); | 86 | } __packed; |
87 | 87 | ||
88 | struct wl12xx_ie_ds_params { | 88 | struct wl12xx_ie_ds_params { |
89 | struct wl12xx_ie_header header; | 89 | struct wl12xx_ie_header header; |
90 | u8 channel; | 90 | u8 channel; |
91 | } __attribute__ ((packed)); | 91 | } __packed; |
92 | 92 | ||
93 | struct country_triplet { | 93 | struct country_triplet { |
94 | u8 channel; | 94 | u8 channel; |
95 | u8 num_channels; | 95 | u8 num_channels; |
96 | u8 max_tx_power; | 96 | u8 max_tx_power; |
97 | } __attribute__ ((packed)); | 97 | } __packed; |
98 | 98 | ||
99 | struct wl12xx_ie_country { | 99 | struct wl12xx_ie_country { |
100 | struct wl12xx_ie_header header; | 100 | struct wl12xx_ie_header header; |
101 | u8 country_string[COUNTRY_STRING_LEN]; | 101 | u8 country_string[COUNTRY_STRING_LEN]; |
102 | struct country_triplet triplets[MAX_COUNTRY_TRIPLETS]; | 102 | struct country_triplet triplets[MAX_COUNTRY_TRIPLETS]; |
103 | } __attribute__ ((packed)); | 103 | } __packed; |
104 | 104 | ||
105 | 105 | ||
106 | /* Templates */ | 106 | /* Templates */ |
@@ -115,30 +115,30 @@ struct wl12xx_beacon_template { | |||
115 | struct wl12xx_ie_rates ext_rates; | 115 | struct wl12xx_ie_rates ext_rates; |
116 | struct wl12xx_ie_ds_params ds_params; | 116 | struct wl12xx_ie_ds_params ds_params; |
117 | struct wl12xx_ie_country country; | 117 | struct wl12xx_ie_country country; |
118 | } __attribute__ ((packed)); | 118 | } __packed; |
119 | 119 | ||
120 | struct wl12xx_null_data_template { | 120 | struct wl12xx_null_data_template { |
121 | struct ieee80211_header header; | 121 | struct ieee80211_header header; |
122 | } __attribute__ ((packed)); | 122 | } __packed; |
123 | 123 | ||
124 | struct wl12xx_ps_poll_template { | 124 | struct wl12xx_ps_poll_template { |
125 | __le16 fc; | 125 | __le16 fc; |
126 | __le16 aid; | 126 | __le16 aid; |
127 | u8 bssid[ETH_ALEN]; | 127 | u8 bssid[ETH_ALEN]; |
128 | u8 ta[ETH_ALEN]; | 128 | u8 ta[ETH_ALEN]; |
129 | } __attribute__ ((packed)); | 129 | } __packed; |
130 | 130 | ||
131 | struct wl12xx_qos_null_data_template { | 131 | struct wl12xx_qos_null_data_template { |
132 | struct ieee80211_header header; | 132 | struct ieee80211_header header; |
133 | __le16 qos_ctl; | 133 | __le16 qos_ctl; |
134 | } __attribute__ ((packed)); | 134 | } __packed; |
135 | 135 | ||
136 | struct wl12xx_probe_req_template { | 136 | struct wl12xx_probe_req_template { |
137 | struct ieee80211_header header; | 137 | struct ieee80211_header header; |
138 | struct wl12xx_ie_ssid ssid; | 138 | struct wl12xx_ie_ssid ssid; |
139 | struct wl12xx_ie_rates rates; | 139 | struct wl12xx_ie_rates rates; |
140 | struct wl12xx_ie_rates ext_rates; | 140 | struct wl12xx_ie_rates ext_rates; |
141 | } __attribute__ ((packed)); | 141 | } __packed; |
142 | 142 | ||
143 | 143 | ||
144 | struct wl12xx_probe_resp_template { | 144 | struct wl12xx_probe_resp_template { |
@@ -151,6 +151,6 @@ struct wl12xx_probe_resp_template { | |||
151 | struct wl12xx_ie_rates ext_rates; | 151 | struct wl12xx_ie_rates ext_rates; |
152 | struct wl12xx_ie_ds_params ds_params; | 152 | struct wl12xx_ie_ds_params ds_params; |
153 | struct wl12xx_ie_country country; | 153 | struct wl12xx_ie_country country; |
154 | } __attribute__ ((packed)); | 154 | } __packed; |
155 | 155 | ||
156 | #endif | 156 | #endif |
diff --git a/drivers/net/wireless/wl3501.h b/drivers/net/wireless/wl3501.h index 8816e371fd0e..3fbfd19818f1 100644 --- a/drivers/net/wireless/wl3501.h +++ b/drivers/net/wireless/wl3501.h | |||
@@ -231,12 +231,12 @@ struct iw_mgmt_info_element { | |||
231 | but sizeof(enum) > sizeof(u8) :-( */ | 231 | but sizeof(enum) > sizeof(u8) :-( */ |
232 | u8 len; | 232 | u8 len; |
233 | u8 data[0]; | 233 | u8 data[0]; |
234 | } __attribute__ ((packed)); | 234 | } __packed; |
235 | 235 | ||
236 | struct iw_mgmt_essid_pset { | 236 | struct iw_mgmt_essid_pset { |
237 | struct iw_mgmt_info_element el; | 237 | struct iw_mgmt_info_element el; |
238 | u8 essid[IW_ESSID_MAX_SIZE]; | 238 | u8 essid[IW_ESSID_MAX_SIZE]; |
239 | } __attribute__ ((packed)); | 239 | } __packed; |
240 | 240 | ||
241 | /* | 241 | /* |
242 | * According to 802.11 Wireless Netowors, the definitive guide - O'Reilly | 242 | * According to 802.11 Wireless Netowors, the definitive guide - O'Reilly |
@@ -247,12 +247,12 @@ struct iw_mgmt_essid_pset { | |||
247 | struct iw_mgmt_data_rset { | 247 | struct iw_mgmt_data_rset { |
248 | struct iw_mgmt_info_element el; | 248 | struct iw_mgmt_info_element el; |
249 | u8 data_rate_labels[IW_DATA_RATE_MAX_LABELS]; | 249 | u8 data_rate_labels[IW_DATA_RATE_MAX_LABELS]; |
250 | } __attribute__ ((packed)); | 250 | } __packed; |
251 | 251 | ||
252 | struct iw_mgmt_ds_pset { | 252 | struct iw_mgmt_ds_pset { |
253 | struct iw_mgmt_info_element el; | 253 | struct iw_mgmt_info_element el; |
254 | u8 chan; | 254 | u8 chan; |
255 | } __attribute__ ((packed)); | 255 | } __packed; |
256 | 256 | ||
257 | struct iw_mgmt_cf_pset { | 257 | struct iw_mgmt_cf_pset { |
258 | struct iw_mgmt_info_element el; | 258 | struct iw_mgmt_info_element el; |
@@ -260,12 +260,12 @@ struct iw_mgmt_cf_pset { | |||
260 | u8 cfp_period; | 260 | u8 cfp_period; |
261 | u16 cfp_max_duration; | 261 | u16 cfp_max_duration; |
262 | u16 cfp_dur_remaining; | 262 | u16 cfp_dur_remaining; |
263 | } __attribute__ ((packed)); | 263 | } __packed; |
264 | 264 | ||
265 | struct iw_mgmt_ibss_pset { | 265 | struct iw_mgmt_ibss_pset { |
266 | struct iw_mgmt_info_element el; | 266 | struct iw_mgmt_info_element el; |
267 | u16 atim_window; | 267 | u16 atim_window; |
268 | } __attribute__ ((packed)); | 268 | } __packed; |
269 | 269 | ||
270 | struct wl3501_tx_hdr { | 270 | struct wl3501_tx_hdr { |
271 | u16 tx_cnt; | 271 | u16 tx_cnt; |
@@ -544,12 +544,12 @@ struct wl3501_80211_tx_plcp_hdr { | |||
544 | u8 service; | 544 | u8 service; |
545 | u16 len; | 545 | u16 len; |
546 | u16 crc16; | 546 | u16 crc16; |
547 | } __attribute__ ((packed)); | 547 | } __packed; |
548 | 548 | ||
549 | struct wl3501_80211_tx_hdr { | 549 | struct wl3501_80211_tx_hdr { |
550 | struct wl3501_80211_tx_plcp_hdr pclp_hdr; | 550 | struct wl3501_80211_tx_plcp_hdr pclp_hdr; |
551 | struct ieee80211_hdr mac_hdr; | 551 | struct ieee80211_hdr mac_hdr; |
552 | } __attribute__ ((packed)); | 552 | } __packed; |
553 | 553 | ||
554 | /* | 554 | /* |
555 | Reserve the beginning Tx space for descriptor use. | 555 | Reserve the beginning Tx space for descriptor use. |
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c index b0b666019a93..163a8a06b22d 100644 --- a/drivers/net/wireless/zd1211rw/zd_mac.c +++ b/drivers/net/wireless/zd1211rw/zd_mac.c | |||
@@ -855,7 +855,7 @@ int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length) | |||
855 | if (skb == NULL) | 855 | if (skb == NULL) |
856 | return -ENOMEM; | 856 | return -ENOMEM; |
857 | if (need_padding) { | 857 | if (need_padding) { |
858 | /* Make sure the the payload data is 4 byte aligned. */ | 858 | /* Make sure the payload data is 4 byte aligned. */ |
859 | skb_reserve(skb, 2); | 859 | skb_reserve(skb, 2); |
860 | } | 860 | } |
861 | 861 | ||
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.h b/drivers/net/wireless/zd1211rw/zd_mac.h index 630c298a730e..e4c70e359ced 100644 --- a/drivers/net/wireless/zd1211rw/zd_mac.h +++ b/drivers/net/wireless/zd1211rw/zd_mac.h | |||
@@ -35,7 +35,7 @@ struct zd_ctrlset { | |||
35 | __le16 current_length; | 35 | __le16 current_length; |
36 | u8 service; | 36 | u8 service; |
37 | __le16 next_frame_length; | 37 | __le16 next_frame_length; |
38 | } __attribute__((packed)); | 38 | } __packed; |
39 | 39 | ||
40 | #define ZD_CS_RESERVED_SIZE 25 | 40 | #define ZD_CS_RESERVED_SIZE 25 |
41 | 41 | ||
@@ -106,7 +106,7 @@ struct zd_ctrlset { | |||
106 | struct rx_length_info { | 106 | struct rx_length_info { |
107 | __le16 length[3]; | 107 | __le16 length[3]; |
108 | __le16 tag; | 108 | __le16 tag; |
109 | } __attribute__((packed)); | 109 | } __packed; |
110 | 110 | ||
111 | #define RX_LENGTH_INFO_TAG 0x697e | 111 | #define RX_LENGTH_INFO_TAG 0x697e |
112 | 112 | ||
@@ -117,7 +117,7 @@ struct rx_status { | |||
117 | u8 signal_quality_ofdm; | 117 | u8 signal_quality_ofdm; |
118 | u8 decryption_type; | 118 | u8 decryption_type; |
119 | u8 frame_status; | 119 | u8 frame_status; |
120 | } __attribute__((packed)); | 120 | } __packed; |
121 | 121 | ||
122 | /* rx_status field decryption_type */ | 122 | /* rx_status field decryption_type */ |
123 | #define ZD_RX_NO_WEP 0 | 123 | #define ZD_RX_NO_WEP 0 |
@@ -153,7 +153,7 @@ struct tx_status { | |||
153 | u8 mac[ETH_ALEN]; | 153 | u8 mac[ETH_ALEN]; |
154 | u8 retry; | 154 | u8 retry; |
155 | u8 failure; | 155 | u8 failure; |
156 | } __attribute__((packed)); | 156 | } __packed; |
157 | 157 | ||
158 | enum mac_flags { | 158 | enum mac_flags { |
159 | MAC_FIXED_CHANNEL = 0x01, | 159 | MAC_FIXED_CHANNEL = 0x01, |
@@ -225,7 +225,7 @@ enum { | |||
225 | struct ofdm_plcp_header { | 225 | struct ofdm_plcp_header { |
226 | u8 prefix[3]; | 226 | u8 prefix[3]; |
227 | __le16 service; | 227 | __le16 service; |
228 | } __attribute__((packed)); | 228 | } __packed; |
229 | 229 | ||
230 | static inline u8 zd_ofdm_plcp_header_rate(const struct ofdm_plcp_header *header) | 230 | static inline u8 zd_ofdm_plcp_header_rate(const struct ofdm_plcp_header *header) |
231 | { | 231 | { |
@@ -252,7 +252,7 @@ struct cck_plcp_header { | |||
252 | u8 service; | 252 | u8 service; |
253 | __le16 length; | 253 | __le16 length; |
254 | __le16 crc16; | 254 | __le16 crc16; |
255 | } __attribute__((packed)); | 255 | } __packed; |
256 | 256 | ||
257 | static inline u8 zd_cck_plcp_header_signal(const struct cck_plcp_header *header) | 257 | static inline u8 zd_cck_plcp_header_signal(const struct cck_plcp_header *header) |
258 | { | 258 | { |
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c index c257940b71b6..818e1480ca93 100644 --- a/drivers/net/wireless/zd1211rw/zd_usb.c +++ b/drivers/net/wireless/zd1211rw/zd_usb.c | |||
@@ -844,7 +844,7 @@ out: | |||
844 | * @usb: a &struct zd_usb pointer | 844 | * @usb: a &struct zd_usb pointer |
845 | * @urb: URB to be freed | 845 | * @urb: URB to be freed |
846 | * | 846 | * |
847 | * Frees the the transmission URB, which means to put it on the free URB | 847 | * Frees the transmission URB, which means to put it on the free URB |
848 | * list. | 848 | * list. |
849 | */ | 849 | */ |
850 | static void free_tx_urb(struct zd_usb *usb, struct urb *urb) | 850 | static void free_tx_urb(struct zd_usb *usb, struct urb *urb) |
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.h b/drivers/net/wireless/zd1211rw/zd_usb.h index 049f8b91f020..1b1655cb7cb4 100644 --- a/drivers/net/wireless/zd1211rw/zd_usb.h +++ b/drivers/net/wireless/zd1211rw/zd_usb.h | |||
@@ -79,17 +79,17 @@ enum control_requests { | |||
79 | struct usb_req_read_regs { | 79 | struct usb_req_read_regs { |
80 | __le16 id; | 80 | __le16 id; |
81 | __le16 addr[0]; | 81 | __le16 addr[0]; |
82 | } __attribute__((packed)); | 82 | } __packed; |
83 | 83 | ||
84 | struct reg_data { | 84 | struct reg_data { |
85 | __le16 addr; | 85 | __le16 addr; |
86 | __le16 value; | 86 | __le16 value; |
87 | } __attribute__((packed)); | 87 | } __packed; |
88 | 88 | ||
89 | struct usb_req_write_regs { | 89 | struct usb_req_write_regs { |
90 | __le16 id; | 90 | __le16 id; |
91 | struct reg_data reg_writes[0]; | 91 | struct reg_data reg_writes[0]; |
92 | } __attribute__((packed)); | 92 | } __packed; |
93 | 93 | ||
94 | enum { | 94 | enum { |
95 | RF_IF_LE = 0x02, | 95 | RF_IF_LE = 0x02, |
@@ -106,7 +106,7 @@ struct usb_req_rfwrite { | |||
106 | /* RF2595: 24 */ | 106 | /* RF2595: 24 */ |
107 | __le16 bit_values[0]; | 107 | __le16 bit_values[0]; |
108 | /* (CR203 & ~(RF_IF_LE | RF_CLK | RF_DATA)) | (bit ? RF_DATA : 0) */ | 108 | /* (CR203 & ~(RF_IF_LE | RF_CLK | RF_DATA)) | (bit ? RF_DATA : 0) */ |
109 | } __attribute__((packed)); | 109 | } __packed; |
110 | 110 | ||
111 | /* USB interrupt */ | 111 | /* USB interrupt */ |
112 | 112 | ||
@@ -123,12 +123,12 @@ enum usb_int_flags { | |||
123 | struct usb_int_header { | 123 | struct usb_int_header { |
124 | u8 type; /* must always be 1 */ | 124 | u8 type; /* must always be 1 */ |
125 | u8 id; | 125 | u8 id; |
126 | } __attribute__((packed)); | 126 | } __packed; |
127 | 127 | ||
128 | struct usb_int_regs { | 128 | struct usb_int_regs { |
129 | struct usb_int_header hdr; | 129 | struct usb_int_header hdr; |
130 | struct reg_data regs[0]; | 130 | struct reg_data regs[0]; |
131 | } __attribute__((packed)); | 131 | } __packed; |
132 | 132 | ||
133 | struct usb_int_retry_fail { | 133 | struct usb_int_retry_fail { |
134 | struct usb_int_header hdr; | 134 | struct usb_int_header hdr; |
@@ -136,7 +136,7 @@ struct usb_int_retry_fail { | |||
136 | u8 _dummy; | 136 | u8 _dummy; |
137 | u8 addr[ETH_ALEN]; | 137 | u8 addr[ETH_ALEN]; |
138 | u8 ibss_wakeup_dest; | 138 | u8 ibss_wakeup_dest; |
139 | } __attribute__((packed)); | 139 | } __packed; |
140 | 140 | ||
141 | struct read_regs_int { | 141 | struct read_regs_int { |
142 | struct completion completion; | 142 | struct completion completion; |
diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c index d504e2b60257..b50fedcef8ac 100644 --- a/drivers/net/xen-netfront.c +++ b/drivers/net/xen-netfront.c | |||
@@ -1621,6 +1621,7 @@ static void backend_changed(struct xenbus_device *dev, | |||
1621 | if (xennet_connect(netdev) != 0) | 1621 | if (xennet_connect(netdev) != 0) |
1622 | break; | 1622 | break; |
1623 | xenbus_switch_state(dev, XenbusStateConnected); | 1623 | xenbus_switch_state(dev, XenbusStateConnected); |
1624 | netif_notify_peers(netdev); | ||
1624 | break; | 1625 | break; |
1625 | 1626 | ||
1626 | case XenbusStateClosing: | 1627 | case XenbusStateClosing: |