diff options
Diffstat (limited to 'drivers/net')
128 files changed, 18596 insertions, 8459 deletions
diff --git a/drivers/net/3c501.c b/drivers/net/3c501.c index f6d51ce34b00..bb44509fd404 100644 --- a/drivers/net/3c501.c +++ b/drivers/net/3c501.c | |||
@@ -909,7 +909,7 @@ MODULE_PARM_DESC(irq, "EtherLink IRQ number"); | |||
909 | * here also causes the module to be unloaded | 909 | * here also causes the module to be unloaded |
910 | */ | 910 | */ |
911 | 911 | ||
912 | int init_module(void) | 912 | int __init init_module(void) |
913 | { | 913 | { |
914 | dev_3c501 = el1_probe(-1); | 914 | dev_3c501 = el1_probe(-1); |
915 | if (IS_ERR(dev_3c501)) | 915 | if (IS_ERR(dev_3c501)) |
diff --git a/drivers/net/3c503.c b/drivers/net/3c503.c index dcc98afa65d7..cb5ef75450dc 100644 --- a/drivers/net/3c503.c +++ b/drivers/net/3c503.c | |||
@@ -688,7 +688,7 @@ MODULE_LICENSE("GPL"); | |||
688 | 688 | ||
689 | /* This is set up so that only a single autoprobe takes place per call. | 689 | /* This is set up so that only a single autoprobe takes place per call. |
690 | ISA device autoprobes on a running machine are not recommended. */ | 690 | ISA device autoprobes on a running machine are not recommended. */ |
691 | int | 691 | int __init |
692 | init_module(void) | 692 | init_module(void) |
693 | { | 693 | { |
694 | struct net_device *dev; | 694 | struct net_device *dev; |
diff --git a/drivers/net/3c505.c b/drivers/net/3c505.c index 111601ca4ca3..19c0b856c488 100644 --- a/drivers/net/3c505.c +++ b/drivers/net/3c505.c | |||
@@ -1633,7 +1633,7 @@ MODULE_PARM_DESC(io, "EtherLink Plus I/O base address(es)"); | |||
1633 | MODULE_PARM_DESC(irq, "EtherLink Plus IRQ number(s) (assigned)"); | 1633 | MODULE_PARM_DESC(irq, "EtherLink Plus IRQ number(s) (assigned)"); |
1634 | MODULE_PARM_DESC(dma, "EtherLink Plus DMA channel(s)"); | 1634 | MODULE_PARM_DESC(dma, "EtherLink Plus DMA channel(s)"); |
1635 | 1635 | ||
1636 | int init_module(void) | 1636 | int __init init_module(void) |
1637 | { | 1637 | { |
1638 | int this_dev, found = 0; | 1638 | int this_dev, found = 0; |
1639 | 1639 | ||
diff --git a/drivers/net/3c507.c b/drivers/net/3c507.c index 4db82893909c..6039049259ed 100644 --- a/drivers/net/3c507.c +++ b/drivers/net/3c507.c | |||
@@ -932,7 +932,7 @@ module_param(irq, int, 0); | |||
932 | MODULE_PARM_DESC(io, "EtherLink16 I/O base address"); | 932 | MODULE_PARM_DESC(io, "EtherLink16 I/O base address"); |
933 | MODULE_PARM_DESC(irq, "(ignored)"); | 933 | MODULE_PARM_DESC(irq, "(ignored)"); |
934 | 934 | ||
935 | int init_module(void) | 935 | int __init init_module(void) |
936 | { | 936 | { |
937 | if (io == 0) | 937 | if (io == 0) |
938 | printk("3c507: You should not use auto-probing with insmod!\n"); | 938 | printk("3c507: You should not use auto-probing with insmod!\n"); |
diff --git a/drivers/net/3c523.c b/drivers/net/3c523.c index b40885d41680..4bf8510655c5 100644 --- a/drivers/net/3c523.c +++ b/drivers/net/3c523.c | |||
@@ -1277,7 +1277,7 @@ MODULE_PARM_DESC(io, "EtherLink/MC I/O base address(es)"); | |||
1277 | MODULE_PARM_DESC(irq, "EtherLink/MC IRQ number(s)"); | 1277 | MODULE_PARM_DESC(irq, "EtherLink/MC IRQ number(s)"); |
1278 | MODULE_LICENSE("GPL"); | 1278 | MODULE_LICENSE("GPL"); |
1279 | 1279 | ||
1280 | int init_module(void) | 1280 | int __init init_module(void) |
1281 | { | 1281 | { |
1282 | int this_dev,found = 0; | 1282 | int this_dev,found = 0; |
1283 | 1283 | ||
diff --git a/drivers/net/3c527.c b/drivers/net/3c527.c index 6db3301e7965..1b1cb0026072 100644 --- a/drivers/net/3c527.c +++ b/drivers/net/3c527.c | |||
@@ -1646,7 +1646,7 @@ static struct net_device *this_device; | |||
1646 | * insmod multiple modules for now but it's a hack. | 1646 | * insmod multiple modules for now but it's a hack. |
1647 | */ | 1647 | */ |
1648 | 1648 | ||
1649 | int init_module(void) | 1649 | int __init init_module(void) |
1650 | { | 1650 | { |
1651 | this_device = mc32_probe(-1); | 1651 | this_device = mc32_probe(-1); |
1652 | if (IS_ERR(this_device)) | 1652 | if (IS_ERR(this_device)) |
diff --git a/drivers/net/8139cp.c b/drivers/net/8139cp.c index 066e22b01a94..46d8c01437e9 100644 --- a/drivers/net/8139cp.c +++ b/drivers/net/8139cp.c | |||
@@ -19,11 +19,11 @@ | |||
19 | See the file COPYING in this distribution for more information. | 19 | See the file COPYING in this distribution for more information. |
20 | 20 | ||
21 | Contributors: | 21 | Contributors: |
22 | 22 | ||
23 | Wake-on-LAN support - Felipe Damasio <felipewd@terra.com.br> | 23 | Wake-on-LAN support - Felipe Damasio <felipewd@terra.com.br> |
24 | PCI suspend/resume - Felipe Damasio <felipewd@terra.com.br> | 24 | PCI suspend/resume - Felipe Damasio <felipewd@terra.com.br> |
25 | LinkChg interrupt - Felipe Damasio <felipewd@terra.com.br> | 25 | LinkChg interrupt - Felipe Damasio <felipewd@terra.com.br> |
26 | 26 | ||
27 | TODO: | 27 | TODO: |
28 | * Test Tx checksumming thoroughly | 28 | * Test Tx checksumming thoroughly |
29 | * Implement dev->tx_timeout | 29 | * Implement dev->tx_timeout |
@@ -461,7 +461,7 @@ static void cp_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) | |||
461 | static inline void cp_set_rxbufsize (struct cp_private *cp) | 461 | static inline void cp_set_rxbufsize (struct cp_private *cp) |
462 | { | 462 | { |
463 | unsigned int mtu = cp->dev->mtu; | 463 | unsigned int mtu = cp->dev->mtu; |
464 | 464 | ||
465 | if (mtu > ETH_DATA_LEN) | 465 | if (mtu > ETH_DATA_LEN) |
466 | /* MTU + ethernet header + FCS + optional VLAN tag */ | 466 | /* MTU + ethernet header + FCS + optional VLAN tag */ |
467 | cp->rx_buf_sz = mtu + ETH_HLEN + 8; | 467 | cp->rx_buf_sz = mtu + ETH_HLEN + 8; |
@@ -510,7 +510,7 @@ static void cp_rx_err_acct (struct cp_private *cp, unsigned rx_tail, | |||
510 | static inline unsigned int cp_rx_csum_ok (u32 status) | 510 | static inline unsigned int cp_rx_csum_ok (u32 status) |
511 | { | 511 | { |
512 | unsigned int protocol = (status >> 16) & 0x3; | 512 | unsigned int protocol = (status >> 16) & 0x3; |
513 | 513 | ||
514 | if (likely((protocol == RxProtoTCP) && (!(status & TCPFail)))) | 514 | if (likely((protocol == RxProtoTCP) && (!(status & TCPFail)))) |
515 | return 1; | 515 | return 1; |
516 | else if ((protocol == RxProtoUDP) && (!(status & UDPFail))) | 516 | else if ((protocol == RxProtoUDP) && (!(status & UDPFail))) |
@@ -1061,7 +1061,7 @@ static void cp_init_hw (struct cp_private *cp) | |||
1061 | cpw8(Config3, PARMEnable); | 1061 | cpw8(Config3, PARMEnable); |
1062 | cp->wol_enabled = 0; | 1062 | cp->wol_enabled = 0; |
1063 | 1063 | ||
1064 | cpw8(Config5, cpr8(Config5) & PMEStatus); | 1064 | cpw8(Config5, cpr8(Config5) & PMEStatus); |
1065 | 1065 | ||
1066 | cpw32_f(HiTxRingAddr, 0); | 1066 | cpw32_f(HiTxRingAddr, 0); |
1067 | cpw32_f(HiTxRingAddr + 4, 0); | 1067 | cpw32_f(HiTxRingAddr + 4, 0); |
@@ -1351,7 +1351,7 @@ static void netdev_get_wol (struct cp_private *cp, | |||
1351 | WAKE_MCAST | WAKE_UCAST; | 1351 | WAKE_MCAST | WAKE_UCAST; |
1352 | /* We don't need to go on if WOL is disabled */ | 1352 | /* We don't need to go on if WOL is disabled */ |
1353 | if (!cp->wol_enabled) return; | 1353 | if (!cp->wol_enabled) return; |
1354 | 1354 | ||
1355 | options = cpr8 (Config3); | 1355 | options = cpr8 (Config3); |
1356 | if (options & LinkUp) wol->wolopts |= WAKE_PHY; | 1356 | if (options & LinkUp) wol->wolopts |= WAKE_PHY; |
1357 | if (options & MagicPacket) wol->wolopts |= WAKE_MAGIC; | 1357 | if (options & MagicPacket) wol->wolopts |= WAKE_MAGIC; |
@@ -1919,7 +1919,7 @@ static int cp_resume (struct pci_dev *pdev) | |||
1919 | mii_check_media(&cp->mii_if, netif_msg_link(cp), FALSE); | 1919 | mii_check_media(&cp->mii_if, netif_msg_link(cp), FALSE); |
1920 | 1920 | ||
1921 | spin_unlock_irqrestore (&cp->lock, flags); | 1921 | spin_unlock_irqrestore (&cp->lock, flags); |
1922 | 1922 | ||
1923 | return 0; | 1923 | return 0; |
1924 | } | 1924 | } |
1925 | #endif /* CONFIG_PM */ | 1925 | #endif /* CONFIG_PM */ |
diff --git a/drivers/net/8139too.c b/drivers/net/8139too.c index feae7832fc84..abd6261465f1 100644 --- a/drivers/net/8139too.c +++ b/drivers/net/8139too.c | |||
@@ -165,7 +165,7 @@ static int multicast_filter_limit = 32; | |||
165 | static int debug = -1; | 165 | static int debug = -1; |
166 | 166 | ||
167 | /* | 167 | /* |
168 | * Receive ring size | 168 | * Receive ring size |
169 | * Warning: 64K ring has hardware issues and may lock up. | 169 | * Warning: 64K ring has hardware issues and may lock up. |
170 | */ | 170 | */ |
171 | #if defined(CONFIG_SH_DREAMCAST) | 171 | #if defined(CONFIG_SH_DREAMCAST) |
@@ -257,7 +257,7 @@ static struct pci_device_id rtl8139_pci_tbl[] = { | |||
257 | {0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, | 257 | {0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
258 | {0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, | 258 | {0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
259 | {0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, | 259 | {0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
260 | {0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, | 260 | {0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
261 | 261 | ||
262 | #ifdef CONFIG_SH_SECUREEDGE5410 | 262 | #ifdef CONFIG_SH_SECUREEDGE5410 |
263 | /* Bogus 8139 silicon reports 8129 without external PROM :-( */ | 263 | /* Bogus 8139 silicon reports 8129 without external PROM :-( */ |
@@ -1824,7 +1824,7 @@ static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, | |||
1824 | int tmp_work; | 1824 | int tmp_work; |
1825 | #endif | 1825 | #endif |
1826 | 1826 | ||
1827 | if (netif_msg_rx_err (tp)) | 1827 | if (netif_msg_rx_err (tp)) |
1828 | printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n", | 1828 | printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n", |
1829 | dev->name, rx_status); | 1829 | dev->name, rx_status); |
1830 | tp->stats.rx_errors++; | 1830 | tp->stats.rx_errors++; |
@@ -1944,7 +1944,7 @@ static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp, | |||
1944 | RTL_R16 (RxBufAddr), | 1944 | RTL_R16 (RxBufAddr), |
1945 | RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); | 1945 | RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); |
1946 | 1946 | ||
1947 | while (netif_running(dev) && received < budget | 1947 | while (netif_running(dev) && received < budget |
1948 | && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) { | 1948 | && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) { |
1949 | u32 ring_offset = cur_rx % RX_BUF_LEN; | 1949 | u32 ring_offset = cur_rx % RX_BUF_LEN; |
1950 | u32 rx_status; | 1950 | u32 rx_status; |
@@ -2031,7 +2031,7 @@ no_early_rx: | |||
2031 | 2031 | ||
2032 | netif_receive_skb (skb); | 2032 | netif_receive_skb (skb); |
2033 | } else { | 2033 | } else { |
2034 | if (net_ratelimit()) | 2034 | if (net_ratelimit()) |
2035 | printk (KERN_WARNING | 2035 | printk (KERN_WARNING |
2036 | "%s: Memory squeeze, dropping packet.\n", | 2036 | "%s: Memory squeeze, dropping packet.\n", |
2037 | dev->name); | 2037 | dev->name); |
@@ -2158,13 +2158,13 @@ static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance, | |||
2158 | status = RTL_R16 (IntrStatus); | 2158 | status = RTL_R16 (IntrStatus); |
2159 | 2159 | ||
2160 | /* shared irq? */ | 2160 | /* shared irq? */ |
2161 | if (unlikely((status & rtl8139_intr_mask) == 0)) | 2161 | if (unlikely((status & rtl8139_intr_mask) == 0)) |
2162 | goto out; | 2162 | goto out; |
2163 | 2163 | ||
2164 | handled = 1; | 2164 | handled = 1; |
2165 | 2165 | ||
2166 | /* h/w no longer present (hotplug?) or major error, bail */ | 2166 | /* h/w no longer present (hotplug?) or major error, bail */ |
2167 | if (unlikely(status == 0xFFFF)) | 2167 | if (unlikely(status == 0xFFFF)) |
2168 | goto out; | 2168 | goto out; |
2169 | 2169 | ||
2170 | /* close possible race's with dev_close */ | 2170 | /* close possible race's with dev_close */ |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index bdaaad8f2123..0c6b45a11d15 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -447,6 +447,7 @@ config MIPS_GT96100ETH | |||
447 | config MIPS_AU1X00_ENET | 447 | config MIPS_AU1X00_ENET |
448 | bool "MIPS AU1000 Ethernet support" | 448 | bool "MIPS AU1000 Ethernet support" |
449 | depends on NET_ETHERNET && SOC_AU1X00 | 449 | depends on NET_ETHERNET && SOC_AU1X00 |
450 | select PHYLIB | ||
450 | select CRC32 | 451 | select CRC32 |
451 | help | 452 | help |
452 | If you have an Alchemy Semi AU1X00 based system | 453 | If you have an Alchemy Semi AU1X00 based system |
@@ -865,6 +866,22 @@ config DM9000 | |||
865 | <file:Documentation/networking/net-modules.txt>. The module will be | 866 | <file:Documentation/networking/net-modules.txt>. The module will be |
866 | called dm9000. | 867 | called dm9000. |
867 | 868 | ||
869 | config SMC911X | ||
870 | tristate "SMSC LAN911[5678] support" | ||
871 | select CRC32 | ||
872 | select MII | ||
873 | depends on NET_ETHERNET && ARCH_PXA | ||
874 | help | ||
875 | This is a driver for SMSC's LAN911x series of Ethernet chipsets | ||
876 | including the new LAN9115, LAN9116, LAN9117, and LAN9118. | ||
877 | Say Y if you want it compiled into the kernel, | ||
878 | and read the Ethernet-HOWTO, available from | ||
879 | <http://www.linuxdoc.org/docs.html#howto>. | ||
880 | |||
881 | This driver is also available as a module. The module will be | ||
882 | called smc911x. If you want to compile it as a module, say M | ||
883 | here and read <file:Documentation/modules.txt> | ||
884 | |||
868 | config NET_VENDOR_RACAL | 885 | config NET_VENDOR_RACAL |
869 | bool "Racal-Interlan (Micom) NI cards" | 886 | bool "Racal-Interlan (Micom) NI cards" |
870 | depends on NET_ETHERNET && ISA | 887 | depends on NET_ETHERNET && ISA |
@@ -2163,6 +2180,8 @@ config TIGON3 | |||
2163 | config BNX2 | 2180 | config BNX2 |
2164 | tristate "Broadcom NetXtremeII support" | 2181 | tristate "Broadcom NetXtremeII support" |
2165 | depends on PCI | 2182 | depends on PCI |
2183 | select CRC32 | ||
2184 | select ZLIB_INFLATE | ||
2166 | help | 2185 | help |
2167 | This driver supports Broadcom NetXtremeII gigabit Ethernet cards. | 2186 | This driver supports Broadcom NetXtremeII gigabit Ethernet cards. |
2168 | 2187 | ||
@@ -2311,6 +2330,23 @@ config S2IO_NAPI | |||
2311 | 2330 | ||
2312 | If in doubt, say N. | 2331 | If in doubt, say N. |
2313 | 2332 | ||
2333 | config MYRI10GE | ||
2334 | tristate "Myricom Myri-10G Ethernet support" | ||
2335 | depends on PCI | ||
2336 | select FW_LOADER | ||
2337 | select CRC32 | ||
2338 | ---help--- | ||
2339 | This driver supports Myricom Myri-10G Dual Protocol interface in | ||
2340 | Ethernet mode. If the eeprom on your board is not recent enough, | ||
2341 | you will need a newer firmware image. | ||
2342 | You may get this image or more information, at: | ||
2343 | |||
2344 | <http://www.myri.com/Myri-10G/> | ||
2345 | |||
2346 | To compile this driver as a module, choose M here and read | ||
2347 | <file:Documentation/networking/net-modules.txt>. The module | ||
2348 | will be called myri10ge. | ||
2349 | |||
2314 | endmenu | 2350 | endmenu |
2315 | 2351 | ||
2316 | source "drivers/net/tokenring/Kconfig" | 2352 | source "drivers/net/tokenring/Kconfig" |
diff --git a/drivers/net/Makefile b/drivers/net/Makefile index b90468aea077..1eced3287507 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile | |||
@@ -192,7 +192,9 @@ obj-$(CONFIG_R8169) += r8169.o | |||
192 | obj-$(CONFIG_AMD8111_ETH) += amd8111e.o | 192 | obj-$(CONFIG_AMD8111_ETH) += amd8111e.o |
193 | obj-$(CONFIG_IBMVETH) += ibmveth.o | 193 | obj-$(CONFIG_IBMVETH) += ibmveth.o |
194 | obj-$(CONFIG_S2IO) += s2io.o | 194 | obj-$(CONFIG_S2IO) += s2io.o |
195 | obj-$(CONFIG_MYRI10GE) += myri10ge/ | ||
195 | obj-$(CONFIG_SMC91X) += smc91x.o | 196 | obj-$(CONFIG_SMC91X) += smc91x.o |
197 | obj-$(CONFIG_SMC911X) += smc911x.o | ||
196 | obj-$(CONFIG_DM9000) += dm9000.o | 198 | obj-$(CONFIG_DM9000) += dm9000.o |
197 | obj-$(CONFIG_FEC_8XX) += fec_8xx/ | 199 | obj-$(CONFIG_FEC_8XX) += fec_8xx/ |
198 | 200 | ||
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c index 14dbad14afb6..038d5fcb15e6 100644 --- a/drivers/net/au1000_eth.c +++ b/drivers/net/au1000_eth.c | |||
@@ -2,13 +2,16 @@ | |||
2 | * | 2 | * |
3 | * Alchemy Au1x00 ethernet driver | 3 | * Alchemy Au1x00 ethernet driver |
4 | * | 4 | * |
5 | * Copyright 2001,2002,2003 MontaVista Software Inc. | 5 | * Copyright 2001-2003, 2006 MontaVista Software Inc. |
6 | * Copyright 2002 TimeSys Corp. | 6 | * Copyright 2002 TimeSys Corp. |
7 | * Added ethtool/mii-tool support, | 7 | * Added ethtool/mii-tool support, |
8 | * Copyright 2004 Matt Porter <mporter@kernel.crashing.org> | 8 | * Copyright 2004 Matt Porter <mporter@kernel.crashing.org> |
9 | * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de | 9 | * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de |
10 | * or riemer@riemer-nt.de: fixed the link beat detection with | 10 | * or riemer@riemer-nt.de: fixed the link beat detection with |
11 | * ioctls (SIOCGMIIPHY) | 11 | * ioctls (SIOCGMIIPHY) |
12 | * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org> | ||
13 | * converted to use linux-2.6.x's PHY framework | ||
14 | * | ||
12 | * Author: MontaVista Software, Inc. | 15 | * Author: MontaVista Software, Inc. |
13 | * ppopov@mvista.com or source@mvista.com | 16 | * ppopov@mvista.com or source@mvista.com |
14 | * | 17 | * |
@@ -53,6 +56,7 @@ | |||
53 | #include <linux/skbuff.h> | 56 | #include <linux/skbuff.h> |
54 | #include <linux/delay.h> | 57 | #include <linux/delay.h> |
55 | #include <linux/crc32.h> | 58 | #include <linux/crc32.h> |
59 | #include <linux/phy.h> | ||
56 | #include <asm/mipsregs.h> | 60 | #include <asm/mipsregs.h> |
57 | #include <asm/irq.h> | 61 | #include <asm/irq.h> |
58 | #include <asm/io.h> | 62 | #include <asm/io.h> |
@@ -68,7 +72,7 @@ static int au1000_debug = 5; | |||
68 | static int au1000_debug = 3; | 72 | static int au1000_debug = 3; |
69 | #endif | 73 | #endif |
70 | 74 | ||
71 | #define DRV_NAME "au1000eth" | 75 | #define DRV_NAME "au1000_eth" |
72 | #define DRV_VERSION "1.5" | 76 | #define DRV_VERSION "1.5" |
73 | #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>" | 77 | #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>" |
74 | #define DRV_DESC "Au1xxx on-chip Ethernet driver" | 78 | #define DRV_DESC "Au1xxx on-chip Ethernet driver" |
@@ -80,7 +84,7 @@ MODULE_LICENSE("GPL"); | |||
80 | // prototypes | 84 | // prototypes |
81 | static void hard_stop(struct net_device *); | 85 | static void hard_stop(struct net_device *); |
82 | static void enable_rx_tx(struct net_device *dev); | 86 | static void enable_rx_tx(struct net_device *dev); |
83 | static struct net_device * au1000_probe(u32 ioaddr, int irq, int port_num); | 87 | static struct net_device * au1000_probe(int port_num); |
84 | static int au1000_init(struct net_device *); | 88 | static int au1000_init(struct net_device *); |
85 | static int au1000_open(struct net_device *); | 89 | static int au1000_open(struct net_device *); |
86 | static int au1000_close(struct net_device *); | 90 | static int au1000_close(struct net_device *); |
@@ -88,17 +92,15 @@ static int au1000_tx(struct sk_buff *, struct net_device *); | |||
88 | static int au1000_rx(struct net_device *); | 92 | static int au1000_rx(struct net_device *); |
89 | static irqreturn_t au1000_interrupt(int, void *, struct pt_regs *); | 93 | static irqreturn_t au1000_interrupt(int, void *, struct pt_regs *); |
90 | static void au1000_tx_timeout(struct net_device *); | 94 | static void au1000_tx_timeout(struct net_device *); |
91 | static int au1000_set_config(struct net_device *dev, struct ifmap *map); | ||
92 | static void set_rx_mode(struct net_device *); | 95 | static void set_rx_mode(struct net_device *); |
93 | static struct net_device_stats *au1000_get_stats(struct net_device *); | 96 | static struct net_device_stats *au1000_get_stats(struct net_device *); |
94 | static void au1000_timer(unsigned long); | ||
95 | static int au1000_ioctl(struct net_device *, struct ifreq *, int); | 97 | static int au1000_ioctl(struct net_device *, struct ifreq *, int); |
96 | static int mdio_read(struct net_device *, int, int); | 98 | static int mdio_read(struct net_device *, int, int); |
97 | static void mdio_write(struct net_device *, int, int, u16); | 99 | static void mdio_write(struct net_device *, int, int, u16); |
98 | static void dump_mii(struct net_device *dev, int phy_id); | 100 | static void au1000_adjust_link(struct net_device *); |
101 | static void enable_mac(struct net_device *, int); | ||
99 | 102 | ||
100 | // externs | 103 | // externs |
101 | extern void ack_rise_edge_irq(unsigned int); | ||
102 | extern int get_ethernet_addr(char *ethernet_addr); | 104 | extern int get_ethernet_addr(char *ethernet_addr); |
103 | extern void str2eaddr(unsigned char *ea, unsigned char *str); | 105 | extern void str2eaddr(unsigned char *ea, unsigned char *str); |
104 | extern char * __init prom_getcmdline(void); | 106 | extern char * __init prom_getcmdline(void); |
@@ -126,705 +128,83 @@ static unsigned char au1000_mac_addr[6] __devinitdata = { | |||
126 | 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00 | 128 | 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00 |
127 | }; | 129 | }; |
128 | 130 | ||
129 | #define nibswap(x) ((((x) >> 4) & 0x0f) | (((x) << 4) & 0xf0)) | ||
130 | #define RUN_AT(x) (jiffies + (x)) | ||
131 | |||
132 | // For reading/writing 32-bit words from/to DMA memory | ||
133 | #define cpu_to_dma32 cpu_to_be32 | ||
134 | #define dma32_to_cpu be32_to_cpu | ||
135 | |||
136 | struct au1000_private *au_macs[NUM_ETH_INTERFACES]; | 131 | struct au1000_private *au_macs[NUM_ETH_INTERFACES]; |
137 | 132 | ||
138 | /* FIXME | 133 | /* |
139 | * All of the PHY code really should be detached from the MAC | 134 | * board-specific configurations |
140 | * code. | 135 | * |
136 | * PHY detection algorithm | ||
137 | * | ||
138 | * If AU1XXX_PHY_STATIC_CONFIG is undefined, the PHY setup is | ||
139 | * autodetected: | ||
140 | * | ||
141 | * mii_probe() first searches the current MAC's MII bus for a PHY, | ||
142 | * selecting the first (or last, if AU1XXX_PHY_SEARCH_HIGHEST_ADDR is | ||
143 | * defined) PHY address not already claimed by another netdev. | ||
144 | * | ||
145 | * If nothing was found that way when searching for the 2nd ethernet | ||
146 | * controller's PHY and AU1XXX_PHY1_SEARCH_ON_MAC0 is defined, then | ||
147 | * the first MII bus is searched as well for an unclaimed PHY; this is | ||
148 | * needed in case of a dual-PHY accessible only through the MAC0's MII | ||
149 | * bus. | ||
150 | * | ||
151 | * Finally, if no PHY is found, then the corresponding ethernet | ||
152 | * controller is not registered to the network subsystem. | ||
141 | */ | 153 | */ |
142 | 154 | ||
143 | /* Default advertise */ | 155 | /* autodetection defaults */ |
144 | #define GENMII_DEFAULT_ADVERTISE \ | 156 | #undef AU1XXX_PHY_SEARCH_HIGHEST_ADDR |
145 | ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | \ | 157 | #define AU1XXX_PHY1_SEARCH_ON_MAC0 |
146 | ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | \ | ||
147 | ADVERTISED_Autoneg | ||
148 | |||
149 | #define GENMII_DEFAULT_FEATURES \ | ||
150 | SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | \ | ||
151 | SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | \ | ||
152 | SUPPORTED_Autoneg | ||
153 | |||
154 | int bcm_5201_init(struct net_device *dev, int phy_addr) | ||
155 | { | ||
156 | s16 data; | ||
157 | |||
158 | /* Stop auto-negotiation */ | ||
159 | data = mdio_read(dev, phy_addr, MII_CONTROL); | ||
160 | mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO); | ||
161 | |||
162 | /* Set advertisement to 10/100 and Half/Full duplex | ||
163 | * (full capabilities) */ | ||
164 | data = mdio_read(dev, phy_addr, MII_ANADV); | ||
165 | data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T; | ||
166 | mdio_write(dev, phy_addr, MII_ANADV, data); | ||
167 | |||
168 | /* Restart auto-negotiation */ | ||
169 | data = mdio_read(dev, phy_addr, MII_CONTROL); | ||
170 | data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO; | ||
171 | mdio_write(dev, phy_addr, MII_CONTROL, data); | ||
172 | |||
173 | if (au1000_debug > 4) | ||
174 | dump_mii(dev, phy_addr); | ||
175 | return 0; | ||
176 | } | ||
177 | |||
178 | int bcm_5201_reset(struct net_device *dev, int phy_addr) | ||
179 | { | ||
180 | s16 mii_control, timeout; | ||
181 | |||
182 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
183 | mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET); | ||
184 | mdelay(1); | ||
185 | for (timeout = 100; timeout > 0; --timeout) { | ||
186 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
187 | if ((mii_control & MII_CNTL_RESET) == 0) | ||
188 | break; | ||
189 | mdelay(1); | ||
190 | } | ||
191 | if (mii_control & MII_CNTL_RESET) { | ||
192 | printk(KERN_ERR "%s PHY reset timeout !\n", dev->name); | ||
193 | return -1; | ||
194 | } | ||
195 | return 0; | ||
196 | } | ||
197 | |||
198 | int | ||
199 | bcm_5201_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed) | ||
200 | { | ||
201 | u16 mii_data; | ||
202 | struct au1000_private *aup; | ||
203 | |||
204 | if (!dev) { | ||
205 | printk(KERN_ERR "bcm_5201_status error: NULL dev\n"); | ||
206 | return -1; | ||
207 | } | ||
208 | aup = (struct au1000_private *) dev->priv; | ||
209 | |||
210 | mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS); | ||
211 | if (mii_data & MII_STAT_LINK) { | ||
212 | *link = 1; | ||
213 | mii_data = mdio_read(dev, aup->phy_addr, MII_AUX_CNTRL); | ||
214 | if (mii_data & MII_AUX_100) { | ||
215 | if (mii_data & MII_AUX_FDX) { | ||
216 | *speed = IF_PORT_100BASEFX; | ||
217 | dev->if_port = IF_PORT_100BASEFX; | ||
218 | } | ||
219 | else { | ||
220 | *speed = IF_PORT_100BASETX; | ||
221 | dev->if_port = IF_PORT_100BASETX; | ||
222 | } | ||
223 | } | ||
224 | else { | ||
225 | *speed = IF_PORT_10BASET; | ||
226 | dev->if_port = IF_PORT_10BASET; | ||
227 | } | ||
228 | |||
229 | } | ||
230 | else { | ||
231 | *link = 0; | ||
232 | *speed = 0; | ||
233 | dev->if_port = IF_PORT_UNKNOWN; | ||
234 | } | ||
235 | return 0; | ||
236 | } | ||
237 | |||
238 | int lsi_80227_init(struct net_device *dev, int phy_addr) | ||
239 | { | ||
240 | if (au1000_debug > 4) | ||
241 | printk("lsi_80227_init\n"); | ||
242 | |||
243 | /* restart auto-negotiation */ | ||
244 | mdio_write(dev, phy_addr, MII_CONTROL, | ||
245 | MII_CNTL_F100 | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); // | MII_CNTL_FDX); | ||
246 | mdelay(1); | ||
247 | |||
248 | /* set up LEDs to correct display */ | ||
249 | #ifdef CONFIG_MIPS_MTX1 | ||
250 | mdio_write(dev, phy_addr, 17, 0xff80); | ||
251 | #else | ||
252 | mdio_write(dev, phy_addr, 17, 0xffc0); | ||
253 | #endif | ||
254 | |||
255 | if (au1000_debug > 4) | ||
256 | dump_mii(dev, phy_addr); | ||
257 | return 0; | ||
258 | } | ||
259 | |||
260 | int lsi_80227_reset(struct net_device *dev, int phy_addr) | ||
261 | { | ||
262 | s16 mii_control, timeout; | ||
263 | |||
264 | if (au1000_debug > 4) { | ||
265 | printk("lsi_80227_reset\n"); | ||
266 | dump_mii(dev, phy_addr); | ||
267 | } | ||
268 | |||
269 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
270 | mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET); | ||
271 | mdelay(1); | ||
272 | for (timeout = 100; timeout > 0; --timeout) { | ||
273 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
274 | if ((mii_control & MII_CNTL_RESET) == 0) | ||
275 | break; | ||
276 | mdelay(1); | ||
277 | } | ||
278 | if (mii_control & MII_CNTL_RESET) { | ||
279 | printk(KERN_ERR "%s PHY reset timeout !\n", dev->name); | ||
280 | return -1; | ||
281 | } | ||
282 | return 0; | ||
283 | } | ||
284 | |||
285 | int | ||
286 | lsi_80227_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed) | ||
287 | { | ||
288 | u16 mii_data; | ||
289 | struct au1000_private *aup; | ||
290 | |||
291 | if (!dev) { | ||
292 | printk(KERN_ERR "lsi_80227_status error: NULL dev\n"); | ||
293 | return -1; | ||
294 | } | ||
295 | aup = (struct au1000_private *) dev->priv; | ||
296 | |||
297 | mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS); | ||
298 | if (mii_data & MII_STAT_LINK) { | ||
299 | *link = 1; | ||
300 | mii_data = mdio_read(dev, aup->phy_addr, MII_LSI_PHY_STAT); | ||
301 | if (mii_data & MII_LSI_PHY_STAT_SPD) { | ||
302 | if (mii_data & MII_LSI_PHY_STAT_FDX) { | ||
303 | *speed = IF_PORT_100BASEFX; | ||
304 | dev->if_port = IF_PORT_100BASEFX; | ||
305 | } | ||
306 | else { | ||
307 | *speed = IF_PORT_100BASETX; | ||
308 | dev->if_port = IF_PORT_100BASETX; | ||
309 | } | ||
310 | } | ||
311 | else { | ||
312 | *speed = IF_PORT_10BASET; | ||
313 | dev->if_port = IF_PORT_10BASET; | ||
314 | } | ||
315 | |||
316 | } | ||
317 | else { | ||
318 | *link = 0; | ||
319 | *speed = 0; | ||
320 | dev->if_port = IF_PORT_UNKNOWN; | ||
321 | } | ||
322 | return 0; | ||
323 | } | ||
324 | |||
325 | int am79c901_init(struct net_device *dev, int phy_addr) | ||
326 | { | ||
327 | printk("am79c901_init\n"); | ||
328 | return 0; | ||
329 | } | ||
330 | |||
331 | int am79c901_reset(struct net_device *dev, int phy_addr) | ||
332 | { | ||
333 | printk("am79c901_reset\n"); | ||
334 | return 0; | ||
335 | } | ||
336 | |||
337 | int | ||
338 | am79c901_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed) | ||
339 | { | ||
340 | return 0; | ||
341 | } | ||
342 | |||
343 | int am79c874_init(struct net_device *dev, int phy_addr) | ||
344 | { | ||
345 | s16 data; | ||
346 | |||
347 | /* 79c874 has quit resembled bit assignments to BCM5201 */ | ||
348 | if (au1000_debug > 4) | ||
349 | printk("am79c847_init\n"); | ||
350 | |||
351 | /* Stop auto-negotiation */ | ||
352 | data = mdio_read(dev, phy_addr, MII_CONTROL); | ||
353 | mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO); | ||
354 | |||
355 | /* Set advertisement to 10/100 and Half/Full duplex | ||
356 | * (full capabilities) */ | ||
357 | data = mdio_read(dev, phy_addr, MII_ANADV); | ||
358 | data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T; | ||
359 | mdio_write(dev, phy_addr, MII_ANADV, data); | ||
360 | |||
361 | /* Restart auto-negotiation */ | ||
362 | data = mdio_read(dev, phy_addr, MII_CONTROL); | ||
363 | data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO; | ||
364 | |||
365 | mdio_write(dev, phy_addr, MII_CONTROL, data); | ||
366 | |||
367 | if (au1000_debug > 4) dump_mii(dev, phy_addr); | ||
368 | return 0; | ||
369 | } | ||
370 | |||
371 | int am79c874_reset(struct net_device *dev, int phy_addr) | ||
372 | { | ||
373 | s16 mii_control, timeout; | ||
374 | |||
375 | if (au1000_debug > 4) | ||
376 | printk("am79c874_reset\n"); | ||
377 | |||
378 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
379 | mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET); | ||
380 | mdelay(1); | ||
381 | for (timeout = 100; timeout > 0; --timeout) { | ||
382 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
383 | if ((mii_control & MII_CNTL_RESET) == 0) | ||
384 | break; | ||
385 | mdelay(1); | ||
386 | } | ||
387 | if (mii_control & MII_CNTL_RESET) { | ||
388 | printk(KERN_ERR "%s PHY reset timeout !\n", dev->name); | ||
389 | return -1; | ||
390 | } | ||
391 | return 0; | ||
392 | } | ||
393 | |||
394 | int | ||
395 | am79c874_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed) | ||
396 | { | ||
397 | u16 mii_data; | ||
398 | struct au1000_private *aup; | ||
399 | |||
400 | // printk("am79c874_status\n"); | ||
401 | if (!dev) { | ||
402 | printk(KERN_ERR "am79c874_status error: NULL dev\n"); | ||
403 | return -1; | ||
404 | } | ||
405 | |||
406 | aup = (struct au1000_private *) dev->priv; | ||
407 | mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS); | ||
408 | |||
409 | if (mii_data & MII_STAT_LINK) { | ||
410 | *link = 1; | ||
411 | mii_data = mdio_read(dev, aup->phy_addr, MII_AMD_PHY_STAT); | ||
412 | if (mii_data & MII_AMD_PHY_STAT_SPD) { | ||
413 | if (mii_data & MII_AMD_PHY_STAT_FDX) { | ||
414 | *speed = IF_PORT_100BASEFX; | ||
415 | dev->if_port = IF_PORT_100BASEFX; | ||
416 | } | ||
417 | else { | ||
418 | *speed = IF_PORT_100BASETX; | ||
419 | dev->if_port = IF_PORT_100BASETX; | ||
420 | } | ||
421 | } | ||
422 | else { | ||
423 | *speed = IF_PORT_10BASET; | ||
424 | dev->if_port = IF_PORT_10BASET; | ||
425 | } | ||
426 | |||
427 | } | ||
428 | else { | ||
429 | *link = 0; | ||
430 | *speed = 0; | ||
431 | dev->if_port = IF_PORT_UNKNOWN; | ||
432 | } | ||
433 | return 0; | ||
434 | } | ||
435 | |||
436 | int lxt971a_init(struct net_device *dev, int phy_addr) | ||
437 | { | ||
438 | if (au1000_debug > 4) | ||
439 | printk("lxt971a_init\n"); | ||
440 | |||
441 | /* restart auto-negotiation */ | ||
442 | mdio_write(dev, phy_addr, MII_CONTROL, | ||
443 | MII_CNTL_F100 | MII_CNTL_AUTO | MII_CNTL_RST_AUTO | MII_CNTL_FDX); | ||
444 | |||
445 | /* set up LEDs to correct display */ | ||
446 | mdio_write(dev, phy_addr, 20, 0x0422); | ||
447 | |||
448 | if (au1000_debug > 4) | ||
449 | dump_mii(dev, phy_addr); | ||
450 | return 0; | ||
451 | } | ||
452 | |||
453 | int lxt971a_reset(struct net_device *dev, int phy_addr) | ||
454 | { | ||
455 | s16 mii_control, timeout; | ||
456 | |||
457 | if (au1000_debug > 4) { | ||
458 | printk("lxt971a_reset\n"); | ||
459 | dump_mii(dev, phy_addr); | ||
460 | } | ||
461 | |||
462 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
463 | mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET); | ||
464 | mdelay(1); | ||
465 | for (timeout = 100; timeout > 0; --timeout) { | ||
466 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
467 | if ((mii_control & MII_CNTL_RESET) == 0) | ||
468 | break; | ||
469 | mdelay(1); | ||
470 | } | ||
471 | if (mii_control & MII_CNTL_RESET) { | ||
472 | printk(KERN_ERR "%s PHY reset timeout !\n", dev->name); | ||
473 | return -1; | ||
474 | } | ||
475 | return 0; | ||
476 | } | ||
477 | |||
478 | int | ||
479 | lxt971a_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed) | ||
480 | { | ||
481 | u16 mii_data; | ||
482 | struct au1000_private *aup; | ||
483 | |||
484 | if (!dev) { | ||
485 | printk(KERN_ERR "lxt971a_status error: NULL dev\n"); | ||
486 | return -1; | ||
487 | } | ||
488 | aup = (struct au1000_private *) dev->priv; | ||
489 | |||
490 | mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS); | ||
491 | if (mii_data & MII_STAT_LINK) { | ||
492 | *link = 1; | ||
493 | mii_data = mdio_read(dev, aup->phy_addr, MII_INTEL_PHY_STAT); | ||
494 | if (mii_data & MII_INTEL_PHY_STAT_SPD) { | ||
495 | if (mii_data & MII_INTEL_PHY_STAT_FDX) { | ||
496 | *speed = IF_PORT_100BASEFX; | ||
497 | dev->if_port = IF_PORT_100BASEFX; | ||
498 | } | ||
499 | else { | ||
500 | *speed = IF_PORT_100BASETX; | ||
501 | dev->if_port = IF_PORT_100BASETX; | ||
502 | } | ||
503 | } | ||
504 | else { | ||
505 | *speed = IF_PORT_10BASET; | ||
506 | dev->if_port = IF_PORT_10BASET; | ||
507 | } | ||
508 | |||
509 | } | ||
510 | else { | ||
511 | *link = 0; | ||
512 | *speed = 0; | ||
513 | dev->if_port = IF_PORT_UNKNOWN; | ||
514 | } | ||
515 | return 0; | ||
516 | } | ||
517 | |||
518 | int ks8995m_init(struct net_device *dev, int phy_addr) | ||
519 | { | ||
520 | s16 data; | ||
521 | |||
522 | // printk("ks8995m_init\n"); | ||
523 | /* Stop auto-negotiation */ | ||
524 | data = mdio_read(dev, phy_addr, MII_CONTROL); | ||
525 | mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO); | ||
526 | |||
527 | /* Set advertisement to 10/100 and Half/Full duplex | ||
528 | * (full capabilities) */ | ||
529 | data = mdio_read(dev, phy_addr, MII_ANADV); | ||
530 | data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T; | ||
531 | mdio_write(dev, phy_addr, MII_ANADV, data); | ||
532 | |||
533 | /* Restart auto-negotiation */ | ||
534 | data = mdio_read(dev, phy_addr, MII_CONTROL); | ||
535 | data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO; | ||
536 | mdio_write(dev, phy_addr, MII_CONTROL, data); | ||
537 | |||
538 | if (au1000_debug > 4) dump_mii(dev, phy_addr); | ||
539 | |||
540 | return 0; | ||
541 | } | ||
542 | |||
543 | int ks8995m_reset(struct net_device *dev, int phy_addr) | ||
544 | { | ||
545 | s16 mii_control, timeout; | ||
546 | |||
547 | // printk("ks8995m_reset\n"); | ||
548 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
549 | mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET); | ||
550 | mdelay(1); | ||
551 | for (timeout = 100; timeout > 0; --timeout) { | ||
552 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
553 | if ((mii_control & MII_CNTL_RESET) == 0) | ||
554 | break; | ||
555 | mdelay(1); | ||
556 | } | ||
557 | if (mii_control & MII_CNTL_RESET) { | ||
558 | printk(KERN_ERR "%s PHY reset timeout !\n", dev->name); | ||
559 | return -1; | ||
560 | } | ||
561 | return 0; | ||
562 | } | ||
563 | |||
564 | int ks8995m_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed) | ||
565 | { | ||
566 | u16 mii_data; | ||
567 | struct au1000_private *aup; | ||
568 | |||
569 | if (!dev) { | ||
570 | printk(KERN_ERR "ks8995m_status error: NULL dev\n"); | ||
571 | return -1; | ||
572 | } | ||
573 | aup = (struct au1000_private *) dev->priv; | ||
574 | |||
575 | mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS); | ||
576 | if (mii_data & MII_STAT_LINK) { | ||
577 | *link = 1; | ||
578 | mii_data = mdio_read(dev, aup->phy_addr, MII_AUX_CNTRL); | ||
579 | if (mii_data & MII_AUX_100) { | ||
580 | if (mii_data & MII_AUX_FDX) { | ||
581 | *speed = IF_PORT_100BASEFX; | ||
582 | dev->if_port = IF_PORT_100BASEFX; | ||
583 | } | ||
584 | else { | ||
585 | *speed = IF_PORT_100BASETX; | ||
586 | dev->if_port = IF_PORT_100BASETX; | ||
587 | } | ||
588 | } | ||
589 | else { | ||
590 | *speed = IF_PORT_10BASET; | ||
591 | dev->if_port = IF_PORT_10BASET; | ||
592 | } | ||
593 | |||
594 | } | ||
595 | else { | ||
596 | *link = 0; | ||
597 | *speed = 0; | ||
598 | dev->if_port = IF_PORT_UNKNOWN; | ||
599 | } | ||
600 | return 0; | ||
601 | } | ||
602 | |||
603 | int | ||
604 | smsc_83C185_init (struct net_device *dev, int phy_addr) | ||
605 | { | ||
606 | s16 data; | ||
607 | |||
608 | if (au1000_debug > 4) | ||
609 | printk("smsc_83C185_init\n"); | ||
610 | |||
611 | /* Stop auto-negotiation */ | ||
612 | data = mdio_read(dev, phy_addr, MII_CONTROL); | ||
613 | mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO); | ||
614 | |||
615 | /* Set advertisement to 10/100 and Half/Full duplex | ||
616 | * (full capabilities) */ | ||
617 | data = mdio_read(dev, phy_addr, MII_ANADV); | ||
618 | data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T; | ||
619 | mdio_write(dev, phy_addr, MII_ANADV, data); | ||
620 | |||
621 | /* Restart auto-negotiation */ | ||
622 | data = mdio_read(dev, phy_addr, MII_CONTROL); | ||
623 | data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO; | ||
624 | |||
625 | mdio_write(dev, phy_addr, MII_CONTROL, data); | ||
626 | |||
627 | if (au1000_debug > 4) dump_mii(dev, phy_addr); | ||
628 | return 0; | ||
629 | } | ||
630 | |||
631 | int | ||
632 | smsc_83C185_reset (struct net_device *dev, int phy_addr) | ||
633 | { | ||
634 | s16 mii_control, timeout; | ||
635 | |||
636 | if (au1000_debug > 4) | ||
637 | printk("smsc_83C185_reset\n"); | ||
638 | |||
639 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
640 | mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET); | ||
641 | mdelay(1); | ||
642 | for (timeout = 100; timeout > 0; --timeout) { | ||
643 | mii_control = mdio_read(dev, phy_addr, MII_CONTROL); | ||
644 | if ((mii_control & MII_CNTL_RESET) == 0) | ||
645 | break; | ||
646 | mdelay(1); | ||
647 | } | ||
648 | if (mii_control & MII_CNTL_RESET) { | ||
649 | printk(KERN_ERR "%s PHY reset timeout !\n", dev->name); | ||
650 | return -1; | ||
651 | } | ||
652 | return 0; | ||
653 | } | ||
654 | |||
655 | int | ||
656 | smsc_83C185_status (struct net_device *dev, int phy_addr, u16 *link, u16 *speed) | ||
657 | { | ||
658 | u16 mii_data; | ||
659 | struct au1000_private *aup; | ||
660 | |||
661 | if (!dev) { | ||
662 | printk(KERN_ERR "smsc_83C185_status error: NULL dev\n"); | ||
663 | return -1; | ||
664 | } | ||
665 | |||
666 | aup = (struct au1000_private *) dev->priv; | ||
667 | mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS); | ||
668 | |||
669 | if (mii_data & MII_STAT_LINK) { | ||
670 | *link = 1; | ||
671 | mii_data = mdio_read(dev, aup->phy_addr, 0x1f); | ||
672 | if (mii_data & (1<<3)) { | ||
673 | if (mii_data & (1<<4)) { | ||
674 | *speed = IF_PORT_100BASEFX; | ||
675 | dev->if_port = IF_PORT_100BASEFX; | ||
676 | } | ||
677 | else { | ||
678 | *speed = IF_PORT_100BASETX; | ||
679 | dev->if_port = IF_PORT_100BASETX; | ||
680 | } | ||
681 | } | ||
682 | else { | ||
683 | *speed = IF_PORT_10BASET; | ||
684 | dev->if_port = IF_PORT_10BASET; | ||
685 | } | ||
686 | } | ||
687 | else { | ||
688 | *link = 0; | ||
689 | *speed = 0; | ||
690 | dev->if_port = IF_PORT_UNKNOWN; | ||
691 | } | ||
692 | return 0; | ||
693 | } | ||
694 | |||
695 | |||
696 | #ifdef CONFIG_MIPS_BOSPORUS | ||
697 | int stub_init(struct net_device *dev, int phy_addr) | ||
698 | { | ||
699 | //printk("PHY stub_init\n"); | ||
700 | return 0; | ||
701 | } | ||
702 | |||
703 | int stub_reset(struct net_device *dev, int phy_addr) | ||
704 | { | ||
705 | //printk("PHY stub_reset\n"); | ||
706 | return 0; | ||
707 | } | ||
708 | |||
709 | int | ||
710 | stub_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed) | ||
711 | { | ||
712 | //printk("PHY stub_status\n"); | ||
713 | *link = 1; | ||
714 | /* hmmm, revisit */ | ||
715 | *speed = IF_PORT_100BASEFX; | ||
716 | dev->if_port = IF_PORT_100BASEFX; | ||
717 | return 0; | ||
718 | } | ||
719 | #endif | ||
720 | |||
721 | struct phy_ops bcm_5201_ops = { | ||
722 | bcm_5201_init, | ||
723 | bcm_5201_reset, | ||
724 | bcm_5201_status, | ||
725 | }; | ||
726 | |||
727 | struct phy_ops am79c874_ops = { | ||
728 | am79c874_init, | ||
729 | am79c874_reset, | ||
730 | am79c874_status, | ||
731 | }; | ||
732 | |||
733 | struct phy_ops am79c901_ops = { | ||
734 | am79c901_init, | ||
735 | am79c901_reset, | ||
736 | am79c901_status, | ||
737 | }; | ||
738 | |||
739 | struct phy_ops lsi_80227_ops = { | ||
740 | lsi_80227_init, | ||
741 | lsi_80227_reset, | ||
742 | lsi_80227_status, | ||
743 | }; | ||
744 | 158 | ||
745 | struct phy_ops lxt971a_ops = { | 159 | /* static PHY setup |
746 | lxt971a_init, | 160 | * |
747 | lxt971a_reset, | 161 | * most boards PHY setup should be detectable properly with the |
748 | lxt971a_status, | 162 | * autodetection algorithm in mii_probe(), but in some cases (e.g. if |
749 | }; | 163 | * you have a switch attached, or want to use the PHY's interrupt |
164 | * notification capabilities) you can provide a static PHY | ||
165 | * configuration here | ||
166 | * | ||
167 | * IRQs may only be set, if a PHY address was configured | ||
168 | * If a PHY address is given, also a bus id is required to be set | ||
169 | * | ||
170 | * ps: make sure the used irqs are configured properly in the board | ||
171 | * specific irq-map | ||
172 | */ | ||
750 | 173 | ||
751 | struct phy_ops ks8995m_ops = { | 174 | #if defined(CONFIG_MIPS_BOSPORUS) |
752 | ks8995m_init, | 175 | /* |
753 | ks8995m_reset, | 176 | * Micrel/Kendin 5 port switch attached to MAC0, |
754 | ks8995m_status, | 177 | * MAC0 is associated with PHY address 5 (== WAN port) |
755 | }; | 178 | * MAC1 is not associated with any PHY, since it's connected directly |
179 | * to the switch. | ||
180 | * no interrupts are used | ||
181 | */ | ||
182 | # define AU1XXX_PHY_STATIC_CONFIG | ||
756 | 183 | ||
757 | struct phy_ops smsc_83C185_ops = { | 184 | # define AU1XXX_PHY0_ADDR 5 |
758 | smsc_83C185_init, | 185 | # define AU1XXX_PHY0_BUSID 0 |
759 | smsc_83C185_reset, | 186 | # undef AU1XXX_PHY0_IRQ |
760 | smsc_83C185_status, | ||
761 | }; | ||
762 | 187 | ||
763 | #ifdef CONFIG_MIPS_BOSPORUS | 188 | # undef AU1XXX_PHY1_ADDR |
764 | struct phy_ops stub_ops = { | 189 | # undef AU1XXX_PHY1_BUSID |
765 | stub_init, | 190 | # undef AU1XXX_PHY1_IRQ |
766 | stub_reset, | ||
767 | stub_status, | ||
768 | }; | ||
769 | #endif | 191 | #endif |
770 | 192 | ||
771 | static struct mii_chip_info { | 193 | #if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0) |
772 | const char * name; | 194 | # error MAC0-associated PHY attached 2nd MACs MII bus not supported yet |
773 | u16 phy_id0; | ||
774 | u16 phy_id1; | ||
775 | struct phy_ops *phy_ops; | ||
776 | int dual_phy; | ||
777 | } mii_chip_table[] = { | ||
778 | {"Broadcom BCM5201 10/100 BaseT PHY",0x0040,0x6212, &bcm_5201_ops,0}, | ||
779 | {"Broadcom BCM5221 10/100 BaseT PHY",0x0040,0x61e4, &bcm_5201_ops,0}, | ||
780 | {"Broadcom BCM5222 10/100 BaseT PHY",0x0040,0x6322, &bcm_5201_ops,1}, | ||
781 | {"NS DP83847 PHY", 0x2000, 0x5c30, &bcm_5201_ops ,0}, | ||
782 | {"AMD 79C901 HomePNA PHY",0x0000,0x35c8, &am79c901_ops,0}, | ||
783 | {"AMD 79C874 10/100 BaseT PHY",0x0022,0x561b, &am79c874_ops,0}, | ||
784 | {"LSI 80227 10/100 BaseT PHY",0x0016,0xf840, &lsi_80227_ops,0}, | ||
785 | {"Intel LXT971A Dual Speed PHY",0x0013,0x78e2, &lxt971a_ops,0}, | ||
786 | {"Kendin KS8995M 10/100 BaseT PHY",0x0022,0x1450, &ks8995m_ops,0}, | ||
787 | {"SMSC LAN83C185 10/100 BaseT PHY",0x0007,0xc0a3, &smsc_83C185_ops,0}, | ||
788 | #ifdef CONFIG_MIPS_BOSPORUS | ||
789 | {"Stub", 0x1234, 0x5678, &stub_ops }, | ||
790 | #endif | 195 | #endif |
791 | {0,}, | ||
792 | }; | ||
793 | 196 | ||
794 | static int mdio_read(struct net_device *dev, int phy_id, int reg) | 197 | /* |
198 | * MII operations | ||
199 | */ | ||
200 | static int mdio_read(struct net_device *dev, int phy_addr, int reg) | ||
795 | { | 201 | { |
796 | struct au1000_private *aup = (struct au1000_private *) dev->priv; | 202 | struct au1000_private *aup = (struct au1000_private *) dev->priv; |
797 | volatile u32 *mii_control_reg; | 203 | volatile u32 *const mii_control_reg = &aup->mac->mii_control; |
798 | volatile u32 *mii_data_reg; | 204 | volatile u32 *const mii_data_reg = &aup->mac->mii_data; |
799 | u32 timedout = 20; | 205 | u32 timedout = 20; |
800 | u32 mii_control; | 206 | u32 mii_control; |
801 | 207 | ||
802 | #ifdef CONFIG_BCM5222_DUAL_PHY | ||
803 | /* First time we probe, it's for the mac0 phy. | ||
804 | * Since we haven't determined yet that we have a dual phy, | ||
805 | * aup->mii->mii_control_reg won't be setup and we'll | ||
806 | * default to the else statement. | ||
807 | * By the time we probe for the mac1 phy, the mii_control_reg | ||
808 | * will be setup to be the address of the mac0 phy control since | ||
809 | * both phys are controlled through mac0. | ||
810 | */ | ||
811 | if (aup->mii && aup->mii->mii_control_reg) { | ||
812 | mii_control_reg = aup->mii->mii_control_reg; | ||
813 | mii_data_reg = aup->mii->mii_data_reg; | ||
814 | } | ||
815 | else if (au_macs[0]->mii && au_macs[0]->mii->mii_control_reg) { | ||
816 | /* assume both phys are controlled through mac0 */ | ||
817 | mii_control_reg = au_macs[0]->mii->mii_control_reg; | ||
818 | mii_data_reg = au_macs[0]->mii->mii_data_reg; | ||
819 | } | ||
820 | else | ||
821 | #endif | ||
822 | { | ||
823 | /* default control and data reg addresses */ | ||
824 | mii_control_reg = &aup->mac->mii_control; | ||
825 | mii_data_reg = &aup->mac->mii_data; | ||
826 | } | ||
827 | |||
828 | while (*mii_control_reg & MAC_MII_BUSY) { | 208 | while (*mii_control_reg & MAC_MII_BUSY) { |
829 | mdelay(1); | 209 | mdelay(1); |
830 | if (--timedout == 0) { | 210 | if (--timedout == 0) { |
@@ -835,7 +215,7 @@ static int mdio_read(struct net_device *dev, int phy_id, int reg) | |||
835 | } | 215 | } |
836 | 216 | ||
837 | mii_control = MAC_SET_MII_SELECT_REG(reg) | | 217 | mii_control = MAC_SET_MII_SELECT_REG(reg) | |
838 | MAC_SET_MII_SELECT_PHY(phy_id) | MAC_MII_READ; | 218 | MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ; |
839 | 219 | ||
840 | *mii_control_reg = mii_control; | 220 | *mii_control_reg = mii_control; |
841 | 221 | ||
@@ -851,32 +231,14 @@ static int mdio_read(struct net_device *dev, int phy_id, int reg) | |||
851 | return (int)*mii_data_reg; | 231 | return (int)*mii_data_reg; |
852 | } | 232 | } |
853 | 233 | ||
854 | static void mdio_write(struct net_device *dev, int phy_id, int reg, u16 value) | 234 | static void mdio_write(struct net_device *dev, int phy_addr, int reg, u16 value) |
855 | { | 235 | { |
856 | struct au1000_private *aup = (struct au1000_private *) dev->priv; | 236 | struct au1000_private *aup = (struct au1000_private *) dev->priv; |
857 | volatile u32 *mii_control_reg; | 237 | volatile u32 *const mii_control_reg = &aup->mac->mii_control; |
858 | volatile u32 *mii_data_reg; | 238 | volatile u32 *const mii_data_reg = &aup->mac->mii_data; |
859 | u32 timedout = 20; | 239 | u32 timedout = 20; |
860 | u32 mii_control; | 240 | u32 mii_control; |
861 | 241 | ||
862 | #ifdef CONFIG_BCM5222_DUAL_PHY | ||
863 | if (aup->mii && aup->mii->mii_control_reg) { | ||
864 | mii_control_reg = aup->mii->mii_control_reg; | ||
865 | mii_data_reg = aup->mii->mii_data_reg; | ||
866 | } | ||
867 | else if (au_macs[0]->mii && au_macs[0]->mii->mii_control_reg) { | ||
868 | /* assume both phys are controlled through mac0 */ | ||
869 | mii_control_reg = au_macs[0]->mii->mii_control_reg; | ||
870 | mii_data_reg = au_macs[0]->mii->mii_data_reg; | ||
871 | } | ||
872 | else | ||
873 | #endif | ||
874 | { | ||
875 | /* default control and data reg addresses */ | ||
876 | mii_control_reg = &aup->mac->mii_control; | ||
877 | mii_data_reg = &aup->mac->mii_data; | ||
878 | } | ||
879 | |||
880 | while (*mii_control_reg & MAC_MII_BUSY) { | 242 | while (*mii_control_reg & MAC_MII_BUSY) { |
881 | mdelay(1); | 243 | mdelay(1); |
882 | if (--timedout == 0) { | 244 | if (--timedout == 0) { |
@@ -887,165 +249,145 @@ static void mdio_write(struct net_device *dev, int phy_id, int reg, u16 value) | |||
887 | } | 249 | } |
888 | 250 | ||
889 | mii_control = MAC_SET_MII_SELECT_REG(reg) | | 251 | mii_control = MAC_SET_MII_SELECT_REG(reg) | |
890 | MAC_SET_MII_SELECT_PHY(phy_id) | MAC_MII_WRITE; | 252 | MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE; |
891 | 253 | ||
892 | *mii_data_reg = value; | 254 | *mii_data_reg = value; |
893 | *mii_control_reg = mii_control; | 255 | *mii_control_reg = mii_control; |
894 | } | 256 | } |
895 | 257 | ||
258 | static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum) | ||
259 | { | ||
260 | /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does | ||
261 | * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */ | ||
262 | struct net_device *const dev = bus->priv; | ||
263 | |||
264 | enable_mac(dev, 0); /* make sure the MAC associated with this | ||
265 | * mii_bus is enabled */ | ||
266 | return mdio_read(dev, phy_addr, regnum); | ||
267 | } | ||
896 | 268 | ||
897 | static void dump_mii(struct net_device *dev, int phy_id) | 269 | static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, |
270 | u16 value) | ||
898 | { | 271 | { |
899 | int i, val; | 272 | struct net_device *const dev = bus->priv; |
900 | 273 | ||
901 | for (i = 0; i < 7; i++) { | 274 | enable_mac(dev, 0); /* make sure the MAC associated with this |
902 | if ((val = mdio_read(dev, phy_id, i)) >= 0) | 275 | * mii_bus is enabled */ |
903 | printk("%s: MII Reg %d=%x\n", dev->name, i, val); | 276 | mdio_write(dev, phy_addr, regnum, value); |
904 | } | 277 | return 0; |
905 | for (i = 16; i < 25; i++) { | ||
906 | if ((val = mdio_read(dev, phy_id, i)) >= 0) | ||
907 | printk("%s: MII Reg %d=%x\n", dev->name, i, val); | ||
908 | } | ||
909 | } | 278 | } |
910 | 279 | ||
911 | static int mii_probe (struct net_device * dev) | 280 | static int mdiobus_reset(struct mii_bus *bus) |
912 | { | 281 | { |
913 | struct au1000_private *aup = (struct au1000_private *) dev->priv; | 282 | struct net_device *const dev = bus->priv; |
914 | int phy_addr; | ||
915 | #ifdef CONFIG_MIPS_BOSPORUS | ||
916 | int phy_found=0; | ||
917 | #endif | ||
918 | 283 | ||
919 | /* search for total of 32 possible mii phy addresses */ | 284 | enable_mac(dev, 0); /* make sure the MAC associated with this |
920 | for (phy_addr = 0; phy_addr < 32; phy_addr++) { | 285 | * mii_bus is enabled */ |
921 | u16 mii_status; | 286 | return 0; |
922 | u16 phy_id0, phy_id1; | 287 | } |
923 | int i; | ||
924 | 288 | ||
925 | #ifdef CONFIG_BCM5222_DUAL_PHY | 289 | static int mii_probe (struct net_device *dev) |
926 | /* Mask the already found phy, try next one */ | 290 | { |
927 | if (au_macs[0]->mii && au_macs[0]->mii->mii_control_reg) { | 291 | struct au1000_private *const aup = (struct au1000_private *) dev->priv; |
928 | if (au_macs[0]->phy_addr == phy_addr) | 292 | struct phy_device *phydev = NULL; |
929 | continue; | 293 | |
930 | } | 294 | #if defined(AU1XXX_PHY_STATIC_CONFIG) |
931 | #endif | 295 | BUG_ON(aup->mac_id < 0 || aup->mac_id > 1); |
932 | 296 | ||
933 | mii_status = mdio_read(dev, phy_addr, MII_STATUS); | 297 | if(aup->mac_id == 0) { /* get PHY0 */ |
934 | if (mii_status == 0xffff || mii_status == 0x0000) | 298 | # if defined(AU1XXX_PHY0_ADDR) |
935 | /* the mii is not accessable, try next one */ | 299 | phydev = au_macs[AU1XXX_PHY0_BUSID]->mii_bus.phy_map[AU1XXX_PHY0_ADDR]; |
936 | continue; | 300 | # else |
937 | 301 | printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n", | |
938 | phy_id0 = mdio_read(dev, phy_addr, MII_PHY_ID0); | 302 | dev->name); |
939 | phy_id1 = mdio_read(dev, phy_addr, MII_PHY_ID1); | 303 | return 0; |
940 | 304 | # endif /* defined(AU1XXX_PHY0_ADDR) */ | |
941 | /* search our mii table for the current mii */ | 305 | } else if (aup->mac_id == 1) { /* get PHY1 */ |
942 | for (i = 0; mii_chip_table[i].phy_id1; i++) { | 306 | # if defined(AU1XXX_PHY1_ADDR) |
943 | if (phy_id0 == mii_chip_table[i].phy_id0 && | 307 | phydev = au_macs[AU1XXX_PHY1_BUSID]->mii_bus.phy_map[AU1XXX_PHY1_ADDR]; |
944 | phy_id1 == mii_chip_table[i].phy_id1) { | 308 | # else |
945 | struct mii_phy * mii_phy = aup->mii; | 309 | printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n", |
946 | 310 | dev->name); | |
947 | printk(KERN_INFO "%s: %s at phy address %d\n", | 311 | return 0; |
948 | dev->name, mii_chip_table[i].name, | 312 | # endif /* defined(AU1XXX_PHY1_ADDR) */ |
949 | phy_addr); | 313 | } |
950 | #ifdef CONFIG_MIPS_BOSPORUS | 314 | |
951 | phy_found = 1; | 315 | #else /* defined(AU1XXX_PHY_STATIC_CONFIG) */ |
952 | #endif | 316 | int phy_addr; |
953 | mii_phy->chip_info = mii_chip_table+i; | 317 | |
954 | aup->phy_addr = phy_addr; | 318 | /* find the first (lowest address) PHY on the current MAC's MII bus */ |
955 | aup->want_autoneg = 1; | 319 | for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) |
956 | aup->phy_ops = mii_chip_table[i].phy_ops; | 320 | if (aup->mii_bus.phy_map[phy_addr]) { |
957 | aup->phy_ops->phy_init(dev,phy_addr); | 321 | phydev = aup->mii_bus.phy_map[phy_addr]; |
958 | 322 | # if !defined(AU1XXX_PHY_SEARCH_HIGHEST_ADDR) | |
959 | // Check for dual-phy and then store required | 323 | break; /* break out with first one found */ |
960 | // values and set indicators. We need to do | 324 | # endif |
961 | // this now since mdio_{read,write} need the | ||
962 | // control and data register addresses. | ||
963 | #ifdef CONFIG_BCM5222_DUAL_PHY | ||
964 | if ( mii_chip_table[i].dual_phy) { | ||
965 | |||
966 | /* assume both phys are controlled | ||
967 | * through MAC0. Board specific? */ | ||
968 | |||
969 | /* sanity check */ | ||
970 | if (!au_macs[0] || !au_macs[0]->mii) | ||
971 | return -1; | ||
972 | aup->mii->mii_control_reg = (u32 *) | ||
973 | &au_macs[0]->mac->mii_control; | ||
974 | aup->mii->mii_data_reg = (u32 *) | ||
975 | &au_macs[0]->mac->mii_data; | ||
976 | } | ||
977 | #endif | ||
978 | goto found; | ||
979 | } | ||
980 | } | 325 | } |
981 | } | ||
982 | found: | ||
983 | |||
984 | #ifdef CONFIG_MIPS_BOSPORUS | ||
985 | /* This is a workaround for the Micrel/Kendin 5 port switch | ||
986 | The second MAC doesn't see a PHY connected... so we need to | ||
987 | trick it into thinking we have one. | ||
988 | |||
989 | If this kernel is run on another Au1500 development board | ||
990 | the stub will be found as well as the actual PHY. However, | ||
991 | the last found PHY will be used... usually at Addr 31 (Db1500). | ||
992 | */ | ||
993 | if ( (!phy_found) ) | ||
994 | { | ||
995 | u16 phy_id0, phy_id1; | ||
996 | int i; | ||
997 | 326 | ||
998 | phy_id0 = 0x1234; | 327 | # if defined(AU1XXX_PHY1_SEARCH_ON_MAC0) |
999 | phy_id1 = 0x5678; | 328 | /* try harder to find a PHY */ |
1000 | 329 | if (!phydev && (aup->mac_id == 1)) { | |
1001 | /* search our mii table for the current mii */ | 330 | /* no PHY found, maybe we have a dual PHY? */ |
1002 | for (i = 0; mii_chip_table[i].phy_id1; i++) { | 331 | printk (KERN_INFO DRV_NAME ": no PHY found on MAC1, " |
1003 | if (phy_id0 == mii_chip_table[i].phy_id0 && | 332 | "let's see if it's attached to MAC0...\n"); |
1004 | phy_id1 == mii_chip_table[i].phy_id1) { | 333 | |
1005 | struct mii_phy * mii_phy; | 334 | BUG_ON(!au_macs[0]); |
1006 | 335 | ||
1007 | printk(KERN_INFO "%s: %s at phy address %d\n", | 336 | /* find the first (lowest address) non-attached PHY on |
1008 | dev->name, mii_chip_table[i].name, | 337 | * the MAC0 MII bus */ |
1009 | phy_addr); | 338 | for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { |
1010 | mii_phy = kmalloc(sizeof(struct mii_phy), | 339 | struct phy_device *const tmp_phydev = |
1011 | GFP_KERNEL); | 340 | au_macs[0]->mii_bus.phy_map[phy_addr]; |
1012 | if (mii_phy) { | 341 | |
1013 | mii_phy->chip_info = mii_chip_table+i; | 342 | if (!tmp_phydev) |
1014 | aup->phy_addr = phy_addr; | 343 | continue; /* no PHY here... */ |
1015 | mii_phy->next = aup->mii; | 344 | |
1016 | aup->phy_ops = | 345 | if (tmp_phydev->attached_dev) |
1017 | mii_chip_table[i].phy_ops; | 346 | continue; /* already claimed by MAC0 */ |
1018 | aup->mii = mii_phy; | 347 | |
1019 | aup->phy_ops->phy_init(dev,phy_addr); | 348 | phydev = tmp_phydev; |
1020 | } else { | 349 | break; /* found it */ |
1021 | printk(KERN_ERR "%s: out of memory\n", | ||
1022 | dev->name); | ||
1023 | return -1; | ||
1024 | } | ||
1025 | mii_phy->chip_info = mii_chip_table+i; | ||
1026 | aup->phy_addr = phy_addr; | ||
1027 | aup->phy_ops = mii_chip_table[i].phy_ops; | ||
1028 | aup->phy_ops->phy_init(dev,phy_addr); | ||
1029 | break; | ||
1030 | } | ||
1031 | } | 350 | } |
1032 | } | 351 | } |
1033 | if (aup->mac_id == 0) { | 352 | # endif /* defined(AU1XXX_PHY1_SEARCH_OTHER_BUS) */ |
1034 | /* the Bosporus phy responds to addresses 0-5 but | ||
1035 | * 5 is the correct one. | ||
1036 | */ | ||
1037 | aup->phy_addr = 5; | ||
1038 | } | ||
1039 | #endif | ||
1040 | 353 | ||
1041 | if (aup->mii->chip_info == NULL) { | 354 | #endif /* defined(AU1XXX_PHY_STATIC_CONFIG) */ |
1042 | printk(KERN_ERR "%s: Au1x No known MII transceivers found!\n", | 355 | if (!phydev) { |
1043 | dev->name); | 356 | printk (KERN_ERR DRV_NAME ":%s: no PHY found\n", dev->name); |
1044 | return -1; | 357 | return -1; |
1045 | } | 358 | } |
1046 | 359 | ||
1047 | printk(KERN_INFO "%s: Using %s as default\n", | 360 | /* now we are supposed to have a proper phydev, to attach to... */ |
1048 | dev->name, aup->mii->chip_info->name); | 361 | BUG_ON(!phydev); |
362 | BUG_ON(phydev->attached_dev); | ||
363 | |||
364 | phydev = phy_connect(dev, phydev->dev.bus_id, &au1000_adjust_link, 0); | ||
365 | |||
366 | if (IS_ERR(phydev)) { | ||
367 | printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); | ||
368 | return PTR_ERR(phydev); | ||
369 | } | ||
370 | |||
371 | /* mask with MAC supported features */ | ||
372 | phydev->supported &= (SUPPORTED_10baseT_Half | ||
373 | | SUPPORTED_10baseT_Full | ||
374 | | SUPPORTED_100baseT_Half | ||
375 | | SUPPORTED_100baseT_Full | ||
376 | | SUPPORTED_Autoneg | ||
377 | /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */ | ||
378 | | SUPPORTED_MII | ||
379 | | SUPPORTED_TP); | ||
380 | |||
381 | phydev->advertising = phydev->supported; | ||
382 | |||
383 | aup->old_link = 0; | ||
384 | aup->old_speed = 0; | ||
385 | aup->old_duplex = -1; | ||
386 | aup->phy_dev = phydev; | ||
387 | |||
388 | printk(KERN_INFO "%s: attached PHY driver [%s] " | ||
389 | "(mii_bus:phy_addr=%s, irq=%d)\n", | ||
390 | dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq); | ||
1049 | 391 | ||
1050 | return 0; | 392 | return 0; |
1051 | } | 393 | } |
@@ -1097,35 +439,38 @@ static void hard_stop(struct net_device *dev) | |||
1097 | au_sync_delay(10); | 439 | au_sync_delay(10); |
1098 | } | 440 | } |
1099 | 441 | ||
1100 | 442 | static void enable_mac(struct net_device *dev, int force_reset) | |
1101 | static void reset_mac(struct net_device *dev) | ||
1102 | { | 443 | { |
1103 | int i; | 444 | unsigned long flags; |
1104 | u32 flags; | ||
1105 | struct au1000_private *aup = (struct au1000_private *) dev->priv; | 445 | struct au1000_private *aup = (struct au1000_private *) dev->priv; |
1106 | 446 | ||
1107 | if (au1000_debug > 4) | ||
1108 | printk(KERN_INFO "%s: reset mac, aup %x\n", | ||
1109 | dev->name, (unsigned)aup); | ||
1110 | |||
1111 | spin_lock_irqsave(&aup->lock, flags); | 447 | spin_lock_irqsave(&aup->lock, flags); |
1112 | if (aup->timer.function == &au1000_timer) {/* check if timer initted */ | ||
1113 | del_timer(&aup->timer); | ||
1114 | } | ||
1115 | 448 | ||
1116 | hard_stop(dev); | 449 | if(force_reset || (!aup->mac_enabled)) { |
1117 | #ifdef CONFIG_BCM5222_DUAL_PHY | ||
1118 | if (aup->mac_id != 0) { | ||
1119 | #endif | ||
1120 | /* If BCM5222, we can't leave MAC0 in reset because then | ||
1121 | * we can't access the dual phy for ETH1 */ | ||
1122 | *aup->enable = MAC_EN_CLOCK_ENABLE; | 450 | *aup->enable = MAC_EN_CLOCK_ENABLE; |
1123 | au_sync_delay(2); | 451 | au_sync_delay(2); |
1124 | *aup->enable = 0; | 452 | *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2 |
453 | | MAC_EN_CLOCK_ENABLE); | ||
1125 | au_sync_delay(2); | 454 | au_sync_delay(2); |
1126 | #ifdef CONFIG_BCM5222_DUAL_PHY | 455 | |
456 | aup->mac_enabled = 1; | ||
1127 | } | 457 | } |
1128 | #endif | 458 | |
459 | spin_unlock_irqrestore(&aup->lock, flags); | ||
460 | } | ||
461 | |||
462 | static void reset_mac_unlocked(struct net_device *dev) | ||
463 | { | ||
464 | struct au1000_private *const aup = (struct au1000_private *) dev->priv; | ||
465 | int i; | ||
466 | |||
467 | hard_stop(dev); | ||
468 | |||
469 | *aup->enable = MAC_EN_CLOCK_ENABLE; | ||
470 | au_sync_delay(2); | ||
471 | *aup->enable = 0; | ||
472 | au_sync_delay(2); | ||
473 | |||
1129 | aup->tx_full = 0; | 474 | aup->tx_full = 0; |
1130 | for (i = 0; i < NUM_RX_DMA; i++) { | 475 | for (i = 0; i < NUM_RX_DMA; i++) { |
1131 | /* reset control bits */ | 476 | /* reset control bits */ |
@@ -1135,9 +480,26 @@ static void reset_mac(struct net_device *dev) | |||
1135 | /* reset control bits */ | 480 | /* reset control bits */ |
1136 | aup->tx_dma_ring[i]->buff_stat &= ~0xf; | 481 | aup->tx_dma_ring[i]->buff_stat &= ~0xf; |
1137 | } | 482 | } |
1138 | spin_unlock_irqrestore(&aup->lock, flags); | 483 | |
484 | aup->mac_enabled = 0; | ||
485 | |||
1139 | } | 486 | } |
1140 | 487 | ||
488 | static void reset_mac(struct net_device *dev) | ||
489 | { | ||
490 | struct au1000_private *const aup = (struct au1000_private *) dev->priv; | ||
491 | unsigned long flags; | ||
492 | |||
493 | if (au1000_debug > 4) | ||
494 | printk(KERN_INFO "%s: reset mac, aup %x\n", | ||
495 | dev->name, (unsigned)aup); | ||
496 | |||
497 | spin_lock_irqsave(&aup->lock, flags); | ||
498 | |||
499 | reset_mac_unlocked (dev); | ||
500 | |||
501 | spin_unlock_irqrestore(&aup->lock, flags); | ||
502 | } | ||
1141 | 503 | ||
1142 | /* | 504 | /* |
1143 | * Setup the receive and transmit "rings". These pointers are the addresses | 505 | * Setup the receive and transmit "rings". These pointers are the addresses |
@@ -1160,12 +522,27 @@ setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base) | |||
1160 | } | 522 | } |
1161 | 523 | ||
1162 | static struct { | 524 | static struct { |
1163 | int port; | ||
1164 | u32 base_addr; | 525 | u32 base_addr; |
1165 | u32 macen_addr; | 526 | u32 macen_addr; |
1166 | int irq; | 527 | int irq; |
1167 | struct net_device *dev; | 528 | struct net_device *dev; |
1168 | } iflist[2]; | 529 | } iflist[2] = { |
530 | #ifdef CONFIG_SOC_AU1000 | ||
531 | {AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT}, | ||
532 | {AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT} | ||
533 | #endif | ||
534 | #ifdef CONFIG_SOC_AU1100 | ||
535 | {AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT} | ||
536 | #endif | ||
537 | #ifdef CONFIG_SOC_AU1500 | ||
538 | {AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT}, | ||
539 | {AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT} | ||
540 | #endif | ||
541 | #ifdef CONFIG_SOC_AU1550 | ||
542 | {AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT}, | ||
543 | {AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT} | ||
544 | #endif | ||
545 | }; | ||
1169 | 546 | ||
1170 | static int num_ifs; | 547 | static int num_ifs; |
1171 | 548 | ||
@@ -1176,58 +553,14 @@ static int num_ifs; | |||
1176 | */ | 553 | */ |
1177 | static int __init au1000_init_module(void) | 554 | static int __init au1000_init_module(void) |
1178 | { | 555 | { |
1179 | struct cpuinfo_mips *c = ¤t_cpu_data; | ||
1180 | int ni = (int)((au_readl(SYS_PINFUNC) & (u32)(SYS_PF_NI2)) >> 4); | 556 | int ni = (int)((au_readl(SYS_PINFUNC) & (u32)(SYS_PF_NI2)) >> 4); |
1181 | struct net_device *dev; | 557 | struct net_device *dev; |
1182 | int i, found_one = 0; | 558 | int i, found_one = 0; |
1183 | 559 | ||
1184 | switch (c->cputype) { | 560 | num_ifs = NUM_ETH_INTERFACES - ni; |
1185 | #ifdef CONFIG_SOC_AU1000 | 561 | |
1186 | case CPU_AU1000: | ||
1187 | num_ifs = 2 - ni; | ||
1188 | iflist[0].base_addr = AU1000_ETH0_BASE; | ||
1189 | iflist[1].base_addr = AU1000_ETH1_BASE; | ||
1190 | iflist[0].macen_addr = AU1000_MAC0_ENABLE; | ||
1191 | iflist[1].macen_addr = AU1000_MAC1_ENABLE; | ||
1192 | iflist[0].irq = AU1000_MAC0_DMA_INT; | ||
1193 | iflist[1].irq = AU1000_MAC1_DMA_INT; | ||
1194 | break; | ||
1195 | #endif | ||
1196 | #ifdef CONFIG_SOC_AU1100 | ||
1197 | case CPU_AU1100: | ||
1198 | num_ifs = 1 - ni; | ||
1199 | iflist[0].base_addr = AU1100_ETH0_BASE; | ||
1200 | iflist[0].macen_addr = AU1100_MAC0_ENABLE; | ||
1201 | iflist[0].irq = AU1100_MAC0_DMA_INT; | ||
1202 | break; | ||
1203 | #endif | ||
1204 | #ifdef CONFIG_SOC_AU1500 | ||
1205 | case CPU_AU1500: | ||
1206 | num_ifs = 2 - ni; | ||
1207 | iflist[0].base_addr = AU1500_ETH0_BASE; | ||
1208 | iflist[1].base_addr = AU1500_ETH1_BASE; | ||
1209 | iflist[0].macen_addr = AU1500_MAC0_ENABLE; | ||
1210 | iflist[1].macen_addr = AU1500_MAC1_ENABLE; | ||
1211 | iflist[0].irq = AU1500_MAC0_DMA_INT; | ||
1212 | iflist[1].irq = AU1500_MAC1_DMA_INT; | ||
1213 | break; | ||
1214 | #endif | ||
1215 | #ifdef CONFIG_SOC_AU1550 | ||
1216 | case CPU_AU1550: | ||
1217 | num_ifs = 2 - ni; | ||
1218 | iflist[0].base_addr = AU1550_ETH0_BASE; | ||
1219 | iflist[1].base_addr = AU1550_ETH1_BASE; | ||
1220 | iflist[0].macen_addr = AU1550_MAC0_ENABLE; | ||
1221 | iflist[1].macen_addr = AU1550_MAC1_ENABLE; | ||
1222 | iflist[0].irq = AU1550_MAC0_DMA_INT; | ||
1223 | iflist[1].irq = AU1550_MAC1_DMA_INT; | ||
1224 | break; | ||
1225 | #endif | ||
1226 | default: | ||
1227 | num_ifs = 0; | ||
1228 | } | ||
1229 | for(i = 0; i < num_ifs; i++) { | 562 | for(i = 0; i < num_ifs; i++) { |
1230 | dev = au1000_probe(iflist[i].base_addr, iflist[i].irq, i); | 563 | dev = au1000_probe(i); |
1231 | iflist[i].dev = dev; | 564 | iflist[i].dev = dev; |
1232 | if (dev) | 565 | if (dev) |
1233 | found_one++; | 566 | found_one++; |
@@ -1237,178 +570,31 @@ static int __init au1000_init_module(void) | |||
1237 | return 0; | 570 | return 0; |
1238 | } | 571 | } |
1239 | 572 | ||
1240 | static int au1000_setup_aneg(struct net_device *dev, u32 advertise) | 573 | /* |
1241 | { | 574 | * ethtool operations |
1242 | struct au1000_private *aup = (struct au1000_private *)dev->priv; | 575 | */ |
1243 | u16 ctl, adv; | ||
1244 | |||
1245 | /* Setup standard advertise */ | ||
1246 | adv = mdio_read(dev, aup->phy_addr, MII_ADVERTISE); | ||
1247 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); | ||
1248 | if (advertise & ADVERTISED_10baseT_Half) | ||
1249 | adv |= ADVERTISE_10HALF; | ||
1250 | if (advertise & ADVERTISED_10baseT_Full) | ||
1251 | adv |= ADVERTISE_10FULL; | ||
1252 | if (advertise & ADVERTISED_100baseT_Half) | ||
1253 | adv |= ADVERTISE_100HALF; | ||
1254 | if (advertise & ADVERTISED_100baseT_Full) | ||
1255 | adv |= ADVERTISE_100FULL; | ||
1256 | mdio_write(dev, aup->phy_addr, MII_ADVERTISE, adv); | ||
1257 | |||
1258 | /* Start/Restart aneg */ | ||
1259 | ctl = mdio_read(dev, aup->phy_addr, MII_BMCR); | ||
1260 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); | ||
1261 | mdio_write(dev, aup->phy_addr, MII_BMCR, ctl); | ||
1262 | |||
1263 | return 0; | ||
1264 | } | ||
1265 | 576 | ||
1266 | static int au1000_setup_forced(struct net_device *dev, int speed, int fd) | 577 | static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
1267 | { | 578 | { |
1268 | struct au1000_private *aup = (struct au1000_private *)dev->priv; | 579 | struct au1000_private *aup = (struct au1000_private *)dev->priv; |
1269 | u16 ctl; | ||
1270 | |||
1271 | ctl = mdio_read(dev, aup->phy_addr, MII_BMCR); | ||
1272 | ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_ANENABLE); | ||
1273 | |||
1274 | /* First reset the PHY */ | ||
1275 | mdio_write(dev, aup->phy_addr, MII_BMCR, ctl | BMCR_RESET); | ||
1276 | |||
1277 | /* Select speed & duplex */ | ||
1278 | switch (speed) { | ||
1279 | case SPEED_10: | ||
1280 | break; | ||
1281 | case SPEED_100: | ||
1282 | ctl |= BMCR_SPEED100; | ||
1283 | break; | ||
1284 | case SPEED_1000: | ||
1285 | default: | ||
1286 | return -EINVAL; | ||
1287 | } | ||
1288 | if (fd == DUPLEX_FULL) | ||
1289 | ctl |= BMCR_FULLDPLX; | ||
1290 | mdio_write(dev, aup->phy_addr, MII_BMCR, ctl); | ||
1291 | 580 | ||
1292 | return 0; | 581 | if (aup->phy_dev) |
1293 | } | 582 | return phy_ethtool_gset(aup->phy_dev, cmd); |
1294 | 583 | ||
1295 | 584 | return -EINVAL; | |
1296 | static void | ||
1297 | au1000_start_link(struct net_device *dev, struct ethtool_cmd *cmd) | ||
1298 | { | ||
1299 | struct au1000_private *aup = (struct au1000_private *)dev->priv; | ||
1300 | u32 advertise; | ||
1301 | int autoneg; | ||
1302 | int forced_speed; | ||
1303 | int forced_duplex; | ||
1304 | |||
1305 | /* Default advertise */ | ||
1306 | advertise = GENMII_DEFAULT_ADVERTISE; | ||
1307 | autoneg = aup->want_autoneg; | ||
1308 | forced_speed = SPEED_100; | ||
1309 | forced_duplex = DUPLEX_FULL; | ||
1310 | |||
1311 | /* Setup link parameters */ | ||
1312 | if (cmd) { | ||
1313 | if (cmd->autoneg == AUTONEG_ENABLE) { | ||
1314 | advertise = cmd->advertising; | ||
1315 | autoneg = 1; | ||
1316 | } else { | ||
1317 | autoneg = 0; | ||
1318 | |||
1319 | forced_speed = cmd->speed; | ||
1320 | forced_duplex = cmd->duplex; | ||
1321 | } | ||
1322 | } | ||
1323 | |||
1324 | /* Configure PHY & start aneg */ | ||
1325 | aup->want_autoneg = autoneg; | ||
1326 | if (autoneg) | ||
1327 | au1000_setup_aneg(dev, advertise); | ||
1328 | else | ||
1329 | au1000_setup_forced(dev, forced_speed, forced_duplex); | ||
1330 | mod_timer(&aup->timer, jiffies + HZ); | ||
1331 | } | 585 | } |
1332 | 586 | ||
1333 | static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | 587 | static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
1334 | { | 588 | { |
1335 | struct au1000_private *aup = (struct au1000_private *)dev->priv; | 589 | struct au1000_private *aup = (struct au1000_private *)dev->priv; |
1336 | u16 link, speed; | ||
1337 | |||
1338 | cmd->supported = GENMII_DEFAULT_FEATURES; | ||
1339 | cmd->advertising = GENMII_DEFAULT_ADVERTISE; | ||
1340 | cmd->port = PORT_MII; | ||
1341 | cmd->transceiver = XCVR_EXTERNAL; | ||
1342 | cmd->phy_address = aup->phy_addr; | ||
1343 | spin_lock_irq(&aup->lock); | ||
1344 | cmd->autoneg = aup->want_autoneg; | ||
1345 | aup->phy_ops->phy_status(dev, aup->phy_addr, &link, &speed); | ||
1346 | if ((speed == IF_PORT_100BASETX) || (speed == IF_PORT_100BASEFX)) | ||
1347 | cmd->speed = SPEED_100; | ||
1348 | else if (speed == IF_PORT_10BASET) | ||
1349 | cmd->speed = SPEED_10; | ||
1350 | if (link && (dev->if_port == IF_PORT_100BASEFX)) | ||
1351 | cmd->duplex = DUPLEX_FULL; | ||
1352 | else | ||
1353 | cmd->duplex = DUPLEX_HALF; | ||
1354 | spin_unlock_irq(&aup->lock); | ||
1355 | return 0; | ||
1356 | } | ||
1357 | 590 | ||
1358 | static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | 591 | if (!capable(CAP_NET_ADMIN)) |
1359 | { | 592 | return -EPERM; |
1360 | struct au1000_private *aup = (struct au1000_private *)dev->priv; | ||
1361 | unsigned long features = GENMII_DEFAULT_FEATURES; | ||
1362 | |||
1363 | if (!capable(CAP_NET_ADMIN)) | ||
1364 | return -EPERM; | ||
1365 | |||
1366 | if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE) | ||
1367 | return -EINVAL; | ||
1368 | if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0) | ||
1369 | return -EINVAL; | ||
1370 | if (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) | ||
1371 | return -EINVAL; | ||
1372 | if (cmd->autoneg == AUTONEG_DISABLE) | ||
1373 | switch (cmd->speed) { | ||
1374 | case SPEED_10: | ||
1375 | if (cmd->duplex == DUPLEX_HALF && | ||
1376 | (features & SUPPORTED_10baseT_Half) == 0) | ||
1377 | return -EINVAL; | ||
1378 | if (cmd->duplex == DUPLEX_FULL && | ||
1379 | (features & SUPPORTED_10baseT_Full) == 0) | ||
1380 | return -EINVAL; | ||
1381 | break; | ||
1382 | case SPEED_100: | ||
1383 | if (cmd->duplex == DUPLEX_HALF && | ||
1384 | (features & SUPPORTED_100baseT_Half) == 0) | ||
1385 | return -EINVAL; | ||
1386 | if (cmd->duplex == DUPLEX_FULL && | ||
1387 | (features & SUPPORTED_100baseT_Full) == 0) | ||
1388 | return -EINVAL; | ||
1389 | break; | ||
1390 | default: | ||
1391 | return -EINVAL; | ||
1392 | } | ||
1393 | else if ((features & SUPPORTED_Autoneg) == 0) | ||
1394 | return -EINVAL; | ||
1395 | |||
1396 | spin_lock_irq(&aup->lock); | ||
1397 | au1000_start_link(dev, cmd); | ||
1398 | spin_unlock_irq(&aup->lock); | ||
1399 | return 0; | ||
1400 | } | ||
1401 | 593 | ||
1402 | static int au1000_nway_reset(struct net_device *dev) | 594 | if (aup->phy_dev) |
1403 | { | 595 | return phy_ethtool_sset(aup->phy_dev, cmd); |
1404 | struct au1000_private *aup = (struct au1000_private *)dev->priv; | ||
1405 | 596 | ||
1406 | if (!aup->want_autoneg) | 597 | return -EINVAL; |
1407 | return -EINVAL; | ||
1408 | spin_lock_irq(&aup->lock); | ||
1409 | au1000_start_link(dev, NULL); | ||
1410 | spin_unlock_irq(&aup->lock); | ||
1411 | return 0; | ||
1412 | } | 598 | } |
1413 | 599 | ||
1414 | static void | 600 | static void |
@@ -1423,21 +609,14 @@ au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |||
1423 | info->regdump_len = 0; | 609 | info->regdump_len = 0; |
1424 | } | 610 | } |
1425 | 611 | ||
1426 | static u32 au1000_get_link(struct net_device *dev) | ||
1427 | { | ||
1428 | return netif_carrier_ok(dev); | ||
1429 | } | ||
1430 | |||
1431 | static struct ethtool_ops au1000_ethtool_ops = { | 612 | static struct ethtool_ops au1000_ethtool_ops = { |
1432 | .get_settings = au1000_get_settings, | 613 | .get_settings = au1000_get_settings, |
1433 | .set_settings = au1000_set_settings, | 614 | .set_settings = au1000_set_settings, |
1434 | .get_drvinfo = au1000_get_drvinfo, | 615 | .get_drvinfo = au1000_get_drvinfo, |
1435 | .nway_reset = au1000_nway_reset, | 616 | .get_link = ethtool_op_get_link, |
1436 | .get_link = au1000_get_link | ||
1437 | }; | 617 | }; |
1438 | 618 | ||
1439 | static struct net_device * | 619 | static struct net_device * au1000_probe(int port_num) |
1440 | au1000_probe(u32 ioaddr, int irq, int port_num) | ||
1441 | { | 620 | { |
1442 | static unsigned version_printed = 0; | 621 | static unsigned version_printed = 0; |
1443 | struct au1000_private *aup = NULL; | 622 | struct au1000_private *aup = NULL; |
@@ -1445,106 +624,115 @@ au1000_probe(u32 ioaddr, int irq, int port_num) | |||
1445 | db_dest_t *pDB, *pDBfree; | 624 | db_dest_t *pDB, *pDBfree; |
1446 | char *pmac, *argptr; | 625 | char *pmac, *argptr; |
1447 | char ethaddr[6]; | 626 | char ethaddr[6]; |
1448 | int i, err; | 627 | int irq, i, err; |
628 | u32 base, macen; | ||
629 | |||
630 | if (port_num >= NUM_ETH_INTERFACES) | ||
631 | return NULL; | ||
632 | |||
633 | base = CPHYSADDR(iflist[port_num].base_addr ); | ||
634 | macen = CPHYSADDR(iflist[port_num].macen_addr); | ||
635 | irq = iflist[port_num].irq; | ||
1449 | 636 | ||
1450 | if (!request_mem_region(CPHYSADDR(ioaddr), MAC_IOSIZE, "Au1x00 ENET")) | 637 | if (!request_mem_region( base, MAC_IOSIZE, "Au1x00 ENET") || |
638 | !request_mem_region(macen, 4, "Au1x00 ENET")) | ||
1451 | return NULL; | 639 | return NULL; |
1452 | 640 | ||
1453 | if (version_printed++ == 0) | 641 | if (version_printed++ == 0) |
1454 | printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR); | 642 | printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR); |
1455 | 643 | ||
1456 | dev = alloc_etherdev(sizeof(struct au1000_private)); | 644 | dev = alloc_etherdev(sizeof(struct au1000_private)); |
1457 | if (!dev) { | 645 | if (!dev) { |
1458 | printk (KERN_ERR "au1000 eth: alloc_etherdev failed\n"); | 646 | printk(KERN_ERR "%s: alloc_etherdev failed\n", DRV_NAME); |
1459 | return NULL; | 647 | return NULL; |
1460 | } | 648 | } |
1461 | 649 | ||
1462 | if ((err = register_netdev(dev))) { | 650 | if ((err = register_netdev(dev)) != 0) { |
1463 | printk(KERN_ERR "Au1x_eth Cannot register net device err %d\n", | 651 | printk(KERN_ERR "%s: Cannot register net device, error %d\n", |
1464 | err); | 652 | DRV_NAME, err); |
1465 | free_netdev(dev); | 653 | free_netdev(dev); |
1466 | return NULL; | 654 | return NULL; |
1467 | } | 655 | } |
1468 | 656 | ||
1469 | printk("%s: Au1x Ethernet found at 0x%x, irq %d\n", | 657 | printk("%s: Au1xx0 Ethernet found at 0x%x, irq %d\n", |
1470 | dev->name, ioaddr, irq); | 658 | dev->name, base, irq); |
1471 | 659 | ||
1472 | aup = dev->priv; | 660 | aup = dev->priv; |
1473 | 661 | ||
1474 | /* Allocate the data buffers */ | 662 | /* Allocate the data buffers */ |
1475 | /* Snooping works fine with eth on all au1xxx */ | 663 | /* Snooping works fine with eth on all au1xxx */ |
1476 | aup->vaddr = (u32)dma_alloc_noncoherent(NULL, | 664 | aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE * |
1477 | MAX_BUF_SIZE * (NUM_TX_BUFFS+NUM_RX_BUFFS), | 665 | (NUM_TX_BUFFS + NUM_RX_BUFFS), |
1478 | &aup->dma_addr, | 666 | &aup->dma_addr, 0); |
1479 | 0); | ||
1480 | if (!aup->vaddr) { | 667 | if (!aup->vaddr) { |
1481 | free_netdev(dev); | 668 | free_netdev(dev); |
1482 | release_mem_region(CPHYSADDR(ioaddr), MAC_IOSIZE); | 669 | release_mem_region( base, MAC_IOSIZE); |
670 | release_mem_region(macen, 4); | ||
1483 | return NULL; | 671 | return NULL; |
1484 | } | 672 | } |
1485 | 673 | ||
1486 | /* aup->mac is the base address of the MAC's registers */ | 674 | /* aup->mac is the base address of the MAC's registers */ |
1487 | aup->mac = (volatile mac_reg_t *)((unsigned long)ioaddr); | 675 | aup->mac = (volatile mac_reg_t *)iflist[port_num].base_addr; |
676 | |||
1488 | /* Setup some variables for quick register address access */ | 677 | /* Setup some variables for quick register address access */ |
1489 | if (ioaddr == iflist[0].base_addr) | 678 | aup->enable = (volatile u32 *)iflist[port_num].macen_addr; |
1490 | { | 679 | aup->mac_id = port_num; |
1491 | /* check env variables first */ | 680 | au_macs[port_num] = aup; |
1492 | if (!get_ethernet_addr(ethaddr)) { | 681 | |
682 | if (port_num == 0) { | ||
683 | /* Check the environment variables first */ | ||
684 | if (get_ethernet_addr(ethaddr) == 0) | ||
1493 | memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr)); | 685 | memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr)); |
1494 | } else { | 686 | else { |
1495 | /* Check command line */ | 687 | /* Check command line */ |
1496 | argptr = prom_getcmdline(); | 688 | argptr = prom_getcmdline(); |
1497 | if ((pmac = strstr(argptr, "ethaddr=")) == NULL) { | 689 | if ((pmac = strstr(argptr, "ethaddr=")) == NULL) |
1498 | printk(KERN_INFO "%s: No mac address found\n", | 690 | printk(KERN_INFO "%s: No MAC address found\n", |
1499 | dev->name); | 691 | dev->name); |
1500 | /* use the hard coded mac addresses */ | 692 | /* Use the hard coded MAC addresses */ |
1501 | } else { | 693 | else { |
1502 | str2eaddr(ethaddr, pmac + strlen("ethaddr=")); | 694 | str2eaddr(ethaddr, pmac + strlen("ethaddr=")); |
1503 | memcpy(au1000_mac_addr, ethaddr, | 695 | memcpy(au1000_mac_addr, ethaddr, |
1504 | sizeof(au1000_mac_addr)); | 696 | sizeof(au1000_mac_addr)); |
1505 | } | 697 | } |
1506 | } | 698 | } |
1507 | aup->enable = (volatile u32 *) | 699 | |
1508 | ((unsigned long)iflist[0].macen_addr); | ||
1509 | memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr)); | ||
1510 | setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR); | 700 | setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR); |
1511 | aup->mac_id = 0; | 701 | } else if (port_num == 1) |
1512 | au_macs[0] = aup; | ||
1513 | } | ||
1514 | else | ||
1515 | if (ioaddr == iflist[1].base_addr) | ||
1516 | { | ||
1517 | aup->enable = (volatile u32 *) | ||
1518 | ((unsigned long)iflist[1].macen_addr); | ||
1519 | memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr)); | ||
1520 | dev->dev_addr[4] += 0x10; | ||
1521 | setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR); | 702 | setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR); |
1522 | aup->mac_id = 1; | ||
1523 | au_macs[1] = aup; | ||
1524 | } | ||
1525 | else | ||
1526 | { | ||
1527 | printk(KERN_ERR "%s: bad ioaddr\n", dev->name); | ||
1528 | } | ||
1529 | |||
1530 | /* bring the device out of reset, otherwise probing the mii | ||
1531 | * will hang */ | ||
1532 | *aup->enable = MAC_EN_CLOCK_ENABLE; | ||
1533 | au_sync_delay(2); | ||
1534 | *aup->enable = MAC_EN_RESET0 | MAC_EN_RESET1 | | ||
1535 | MAC_EN_RESET2 | MAC_EN_CLOCK_ENABLE; | ||
1536 | au_sync_delay(2); | ||
1537 | 703 | ||
1538 | aup->mii = kmalloc(sizeof(struct mii_phy), GFP_KERNEL); | 704 | /* |
1539 | if (!aup->mii) { | 705 | * Assign to the Ethernet ports two consecutive MAC addresses |
1540 | printk(KERN_ERR "%s: out of memory\n", dev->name); | 706 | * to match those that are printed on their stickers |
1541 | goto err_out; | 707 | */ |
1542 | } | 708 | memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr)); |
1543 | aup->mii->next = NULL; | 709 | dev->dev_addr[5] += port_num; |
1544 | aup->mii->chip_info = NULL; | 710 | |
1545 | aup->mii->status = 0; | 711 | *aup->enable = 0; |
1546 | aup->mii->mii_control_reg = 0; | 712 | aup->mac_enabled = 0; |
1547 | aup->mii->mii_data_reg = 0; | 713 | |
714 | aup->mii_bus.priv = dev; | ||
715 | aup->mii_bus.read = mdiobus_read; | ||
716 | aup->mii_bus.write = mdiobus_write; | ||
717 | aup->mii_bus.reset = mdiobus_reset; | ||
718 | aup->mii_bus.name = "au1000_eth_mii"; | ||
719 | aup->mii_bus.id = aup->mac_id; | ||
720 | aup->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL); | ||
721 | for(i = 0; i < PHY_MAX_ADDR; ++i) | ||
722 | aup->mii_bus.irq[i] = PHY_POLL; | ||
723 | |||
724 | /* if known, set corresponding PHY IRQs */ | ||
725 | #if defined(AU1XXX_PHY_STATIC_CONFIG) | ||
726 | # if defined(AU1XXX_PHY0_IRQ) | ||
727 | if (AU1XXX_PHY0_BUSID == aup->mii_bus.id) | ||
728 | aup->mii_bus.irq[AU1XXX_PHY0_ADDR] = AU1XXX_PHY0_IRQ; | ||
729 | # endif | ||
730 | # if defined(AU1XXX_PHY1_IRQ) | ||
731 | if (AU1XXX_PHY1_BUSID == aup->mii_bus.id) | ||
732 | aup->mii_bus.irq[AU1XXX_PHY1_ADDR] = AU1XXX_PHY1_IRQ; | ||
733 | # endif | ||
734 | #endif | ||
735 | mdiobus_register(&aup->mii_bus); | ||
1548 | 736 | ||
1549 | if (mii_probe(dev) != 0) { | 737 | if (mii_probe(dev) != 0) { |
1550 | goto err_out; | 738 | goto err_out; |
@@ -1581,7 +769,7 @@ au1000_probe(u32 ioaddr, int irq, int port_num) | |||
1581 | } | 769 | } |
1582 | 770 | ||
1583 | spin_lock_init(&aup->lock); | 771 | spin_lock_init(&aup->lock); |
1584 | dev->base_addr = ioaddr; | 772 | dev->base_addr = base; |
1585 | dev->irq = irq; | 773 | dev->irq = irq; |
1586 | dev->open = au1000_open; | 774 | dev->open = au1000_open; |
1587 | dev->hard_start_xmit = au1000_tx; | 775 | dev->hard_start_xmit = au1000_tx; |
@@ -1590,7 +778,6 @@ au1000_probe(u32 ioaddr, int irq, int port_num) | |||
1590 | dev->set_multicast_list = &set_rx_mode; | 778 | dev->set_multicast_list = &set_rx_mode; |
1591 | dev->do_ioctl = &au1000_ioctl; | 779 | dev->do_ioctl = &au1000_ioctl; |
1592 | SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops); | 780 | SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops); |
1593 | dev->set_config = &au1000_set_config; | ||
1594 | dev->tx_timeout = au1000_tx_timeout; | 781 | dev->tx_timeout = au1000_tx_timeout; |
1595 | dev->watchdog_timeo = ETH_TX_TIMEOUT; | 782 | dev->watchdog_timeo = ETH_TX_TIMEOUT; |
1596 | 783 | ||
@@ -1606,7 +793,7 @@ err_out: | |||
1606 | /* here we should have a valid dev plus aup-> register addresses | 793 | /* here we should have a valid dev plus aup-> register addresses |
1607 | * so we can reset the mac properly.*/ | 794 | * so we can reset the mac properly.*/ |
1608 | reset_mac(dev); | 795 | reset_mac(dev); |
1609 | kfree(aup->mii); | 796 | |
1610 | for (i = 0; i < NUM_RX_DMA; i++) { | 797 | for (i = 0; i < NUM_RX_DMA; i++) { |
1611 | if (aup->rx_db_inuse[i]) | 798 | if (aup->rx_db_inuse[i]) |
1612 | ReleaseDB(aup, aup->rx_db_inuse[i]); | 799 | ReleaseDB(aup, aup->rx_db_inuse[i]); |
@@ -1615,13 +802,12 @@ err_out: | |||
1615 | if (aup->tx_db_inuse[i]) | 802 | if (aup->tx_db_inuse[i]) |
1616 | ReleaseDB(aup, aup->tx_db_inuse[i]); | 803 | ReleaseDB(aup, aup->tx_db_inuse[i]); |
1617 | } | 804 | } |
1618 | dma_free_noncoherent(NULL, | 805 | dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS), |
1619 | MAX_BUF_SIZE * (NUM_TX_BUFFS+NUM_RX_BUFFS), | 806 | (void *)aup->vaddr, aup->dma_addr); |
1620 | (void *)aup->vaddr, | ||
1621 | aup->dma_addr); | ||
1622 | unregister_netdev(dev); | 807 | unregister_netdev(dev); |
1623 | free_netdev(dev); | 808 | free_netdev(dev); |
1624 | release_mem_region(CPHYSADDR(ioaddr), MAC_IOSIZE); | 809 | release_mem_region( base, MAC_IOSIZE); |
810 | release_mem_region(macen, 4); | ||
1625 | return NULL; | 811 | return NULL; |
1626 | } | 812 | } |
1627 | 813 | ||
@@ -1640,19 +826,14 @@ static int au1000_init(struct net_device *dev) | |||
1640 | u32 flags; | 826 | u32 flags; |
1641 | int i; | 827 | int i; |
1642 | u32 control; | 828 | u32 control; |
1643 | u16 link, speed; | ||
1644 | 829 | ||
1645 | if (au1000_debug > 4) | 830 | if (au1000_debug > 4) |
1646 | printk("%s: au1000_init\n", dev->name); | 831 | printk("%s: au1000_init\n", dev->name); |
1647 | 832 | ||
1648 | spin_lock_irqsave(&aup->lock, flags); | ||
1649 | |||
1650 | /* bring the device out of reset */ | 833 | /* bring the device out of reset */ |
1651 | *aup->enable = MAC_EN_CLOCK_ENABLE; | 834 | enable_mac(dev, 1); |
1652 | au_sync_delay(2); | 835 | |
1653 | *aup->enable = MAC_EN_RESET0 | MAC_EN_RESET1 | | 836 | spin_lock_irqsave(&aup->lock, flags); |
1654 | MAC_EN_RESET2 | MAC_EN_CLOCK_ENABLE; | ||
1655 | au_sync_delay(20); | ||
1656 | 837 | ||
1657 | aup->mac->control = 0; | 838 | aup->mac->control = 0; |
1658 | aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2; | 839 | aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2; |
@@ -1668,12 +849,16 @@ static int au1000_init(struct net_device *dev) | |||
1668 | } | 849 | } |
1669 | au_sync(); | 850 | au_sync(); |
1670 | 851 | ||
1671 | aup->phy_ops->phy_status(dev, aup->phy_addr, &link, &speed); | 852 | control = MAC_RX_ENABLE | MAC_TX_ENABLE; |
1672 | control = MAC_DISABLE_RX_OWN | MAC_RX_ENABLE | MAC_TX_ENABLE; | ||
1673 | #ifndef CONFIG_CPU_LITTLE_ENDIAN | 853 | #ifndef CONFIG_CPU_LITTLE_ENDIAN |
1674 | control |= MAC_BIG_ENDIAN; | 854 | control |= MAC_BIG_ENDIAN; |
1675 | #endif | 855 | #endif |
1676 | if (link && (dev->if_port == IF_PORT_100BASEFX)) { | 856 | if (aup->phy_dev) { |
857 | if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex)) | ||
858 | control |= MAC_FULL_DUPLEX; | ||
859 | else | ||
860 | control |= MAC_DISABLE_RX_OWN; | ||
861 | } else { /* PHY-less op, assume full-duplex */ | ||
1677 | control |= MAC_FULL_DUPLEX; | 862 | control |= MAC_FULL_DUPLEX; |
1678 | } | 863 | } |
1679 | 864 | ||
@@ -1685,57 +870,84 @@ static int au1000_init(struct net_device *dev) | |||
1685 | return 0; | 870 | return 0; |
1686 | } | 871 | } |
1687 | 872 | ||
1688 | static void au1000_timer(unsigned long data) | 873 | static void |
874 | au1000_adjust_link(struct net_device *dev) | ||
1689 | { | 875 | { |
1690 | struct net_device *dev = (struct net_device *)data; | ||
1691 | struct au1000_private *aup = (struct au1000_private *) dev->priv; | 876 | struct au1000_private *aup = (struct au1000_private *) dev->priv; |
1692 | unsigned char if_port; | 877 | struct phy_device *phydev = aup->phy_dev; |
1693 | u16 link, speed; | 878 | unsigned long flags; |
1694 | 879 | ||
1695 | if (!dev) { | 880 | int status_change = 0; |
1696 | /* fatal error, don't restart the timer */ | ||
1697 | printk(KERN_ERR "au1000_timer error: NULL dev\n"); | ||
1698 | return; | ||
1699 | } | ||
1700 | 881 | ||
1701 | if_port = dev->if_port; | 882 | BUG_ON(!aup->phy_dev); |
1702 | if (aup->phy_ops->phy_status(dev, aup->phy_addr, &link, &speed) == 0) { | 883 | |
1703 | if (link) { | 884 | spin_lock_irqsave(&aup->lock, flags); |
1704 | if (!netif_carrier_ok(dev)) { | 885 | |
1705 | netif_carrier_on(dev); | 886 | if (phydev->link && (aup->old_speed != phydev->speed)) { |
1706 | printk(KERN_INFO "%s: link up\n", dev->name); | 887 | // speed changed |
1707 | } | 888 | |
1708 | } | 889 | switch(phydev->speed) { |
1709 | else { | 890 | case SPEED_10: |
1710 | if (netif_carrier_ok(dev)) { | 891 | case SPEED_100: |
1711 | netif_carrier_off(dev); | 892 | break; |
1712 | dev->if_port = 0; | 893 | default: |
1713 | printk(KERN_INFO "%s: link down\n", dev->name); | 894 | printk(KERN_WARNING |
1714 | } | 895 | "%s: Speed (%d) is not 10/100 ???\n", |
896 | dev->name, phydev->speed); | ||
897 | break; | ||
1715 | } | 898 | } |
899 | |||
900 | aup->old_speed = phydev->speed; | ||
901 | |||
902 | status_change = 1; | ||
1716 | } | 903 | } |
1717 | 904 | ||
1718 | if (link && (dev->if_port != if_port) && | 905 | if (phydev->link && (aup->old_duplex != phydev->duplex)) { |
1719 | (dev->if_port != IF_PORT_UNKNOWN)) { | 906 | // duplex mode changed |
907 | |||
908 | /* switching duplex mode requires to disable rx and tx! */ | ||
1720 | hard_stop(dev); | 909 | hard_stop(dev); |
1721 | if (dev->if_port == IF_PORT_100BASEFX) { | 910 | |
1722 | printk(KERN_INFO "%s: going to full duplex\n", | 911 | if (DUPLEX_FULL == phydev->duplex) |
1723 | dev->name); | 912 | aup->mac->control = ((aup->mac->control |
1724 | aup->mac->control |= MAC_FULL_DUPLEX; | 913 | | MAC_FULL_DUPLEX) |
1725 | au_sync_delay(1); | 914 | & ~MAC_DISABLE_RX_OWN); |
1726 | } | 915 | else |
1727 | else { | 916 | aup->mac->control = ((aup->mac->control |
1728 | aup->mac->control &= ~MAC_FULL_DUPLEX; | 917 | & ~MAC_FULL_DUPLEX) |
1729 | au_sync_delay(1); | 918 | | MAC_DISABLE_RX_OWN); |
1730 | } | 919 | au_sync_delay(1); |
920 | |||
1731 | enable_rx_tx(dev); | 921 | enable_rx_tx(dev); |
922 | aup->old_duplex = phydev->duplex; | ||
923 | |||
924 | status_change = 1; | ||
1732 | } | 925 | } |
1733 | 926 | ||
1734 | aup->timer.expires = RUN_AT((1*HZ)); | 927 | if(phydev->link != aup->old_link) { |
1735 | aup->timer.data = (unsigned long)dev; | 928 | // link state changed |
1736 | aup->timer.function = &au1000_timer; /* timer handler */ | ||
1737 | add_timer(&aup->timer); | ||
1738 | 929 | ||
930 | if (phydev->link) // link went up | ||
931 | netif_schedule(dev); | ||
932 | else { // link went down | ||
933 | aup->old_speed = 0; | ||
934 | aup->old_duplex = -1; | ||
935 | } | ||
936 | |||
937 | aup->old_link = phydev->link; | ||
938 | status_change = 1; | ||
939 | } | ||
940 | |||
941 | spin_unlock_irqrestore(&aup->lock, flags); | ||
942 | |||
943 | if (status_change) { | ||
944 | if (phydev->link) | ||
945 | printk(KERN_INFO "%s: link up (%d/%s)\n", | ||
946 | dev->name, phydev->speed, | ||
947 | DUPLEX_FULL == phydev->duplex ? "Full" : "Half"); | ||
948 | else | ||
949 | printk(KERN_INFO "%s: link down\n", dev->name); | ||
950 | } | ||
1739 | } | 951 | } |
1740 | 952 | ||
1741 | static int au1000_open(struct net_device *dev) | 953 | static int au1000_open(struct net_device *dev) |
@@ -1746,25 +958,26 @@ static int au1000_open(struct net_device *dev) | |||
1746 | if (au1000_debug > 4) | 958 | if (au1000_debug > 4) |
1747 | printk("%s: open: dev=%p\n", dev->name, dev); | 959 | printk("%s: open: dev=%p\n", dev->name, dev); |
1748 | 960 | ||
961 | if ((retval = request_irq(dev->irq, &au1000_interrupt, 0, | ||
962 | dev->name, dev))) { | ||
963 | printk(KERN_ERR "%s: unable to get IRQ %d\n", | ||
964 | dev->name, dev->irq); | ||
965 | return retval; | ||
966 | } | ||
967 | |||
1749 | if ((retval = au1000_init(dev))) { | 968 | if ((retval = au1000_init(dev))) { |
1750 | printk(KERN_ERR "%s: error in au1000_init\n", dev->name); | 969 | printk(KERN_ERR "%s: error in au1000_init\n", dev->name); |
1751 | free_irq(dev->irq, dev); | 970 | free_irq(dev->irq, dev); |
1752 | return retval; | 971 | return retval; |
1753 | } | 972 | } |
1754 | netif_start_queue(dev); | ||
1755 | 973 | ||
1756 | if ((retval = request_irq(dev->irq, &au1000_interrupt, 0, | 974 | if (aup->phy_dev) { |
1757 | dev->name, dev))) { | 975 | /* cause the PHY state machine to schedule a link state check */ |
1758 | printk(KERN_ERR "%s: unable to get IRQ %d\n", | 976 | aup->phy_dev->state = PHY_CHANGELINK; |
1759 | dev->name, dev->irq); | 977 | phy_start(aup->phy_dev); |
1760 | return retval; | ||
1761 | } | 978 | } |
1762 | 979 | ||
1763 | init_timer(&aup->timer); /* used in ioctl() */ | 980 | netif_start_queue(dev); |
1764 | aup->timer.expires = RUN_AT((3*HZ)); | ||
1765 | aup->timer.data = (unsigned long)dev; | ||
1766 | aup->timer.function = &au1000_timer; /* timer handler */ | ||
1767 | add_timer(&aup->timer); | ||
1768 | 981 | ||
1769 | if (au1000_debug > 4) | 982 | if (au1000_debug > 4) |
1770 | printk("%s: open: Initialization done.\n", dev->name); | 983 | printk("%s: open: Initialization done.\n", dev->name); |
@@ -1774,16 +987,19 @@ static int au1000_open(struct net_device *dev) | |||
1774 | 987 | ||
1775 | static int au1000_close(struct net_device *dev) | 988 | static int au1000_close(struct net_device *dev) |
1776 | { | 989 | { |
1777 | u32 flags; | 990 | unsigned long flags; |
1778 | struct au1000_private *aup = (struct au1000_private *) dev->priv; | 991 | struct au1000_private *const aup = (struct au1000_private *) dev->priv; |
1779 | 992 | ||
1780 | if (au1000_debug > 4) | 993 | if (au1000_debug > 4) |
1781 | printk("%s: close: dev=%p\n", dev->name, dev); | 994 | printk("%s: close: dev=%p\n", dev->name, dev); |
1782 | 995 | ||
1783 | reset_mac(dev); | 996 | if (aup->phy_dev) |
997 | phy_stop(aup->phy_dev); | ||
1784 | 998 | ||
1785 | spin_lock_irqsave(&aup->lock, flags); | 999 | spin_lock_irqsave(&aup->lock, flags); |
1786 | 1000 | ||
1001 | reset_mac_unlocked (dev); | ||
1002 | |||
1787 | /* stop the device */ | 1003 | /* stop the device */ |
1788 | netif_stop_queue(dev); | 1004 | netif_stop_queue(dev); |
1789 | 1005 | ||
@@ -1805,21 +1021,18 @@ static void __exit au1000_cleanup_module(void) | |||
1805 | if (dev) { | 1021 | if (dev) { |
1806 | aup = (struct au1000_private *) dev->priv; | 1022 | aup = (struct au1000_private *) dev->priv; |
1807 | unregister_netdev(dev); | 1023 | unregister_netdev(dev); |
1808 | kfree(aup->mii); | 1024 | for (j = 0; j < NUM_RX_DMA; j++) |
1809 | for (j = 0; j < NUM_RX_DMA; j++) { | ||
1810 | if (aup->rx_db_inuse[j]) | 1025 | if (aup->rx_db_inuse[j]) |
1811 | ReleaseDB(aup, aup->rx_db_inuse[j]); | 1026 | ReleaseDB(aup, aup->rx_db_inuse[j]); |
1812 | } | 1027 | for (j = 0; j < NUM_TX_DMA; j++) |
1813 | for (j = 0; j < NUM_TX_DMA; j++) { | ||
1814 | if (aup->tx_db_inuse[j]) | 1028 | if (aup->tx_db_inuse[j]) |
1815 | ReleaseDB(aup, aup->tx_db_inuse[j]); | 1029 | ReleaseDB(aup, aup->tx_db_inuse[j]); |
1816 | } | 1030 | dma_free_noncoherent(NULL, MAX_BUF_SIZE * |
1817 | dma_free_noncoherent(NULL, | 1031 | (NUM_TX_BUFFS + NUM_RX_BUFFS), |
1818 | MAX_BUF_SIZE * (NUM_TX_BUFFS+NUM_RX_BUFFS), | 1032 | (void *)aup->vaddr, aup->dma_addr); |
1819 | (void *)aup->vaddr, | 1033 | release_mem_region(dev->base_addr, MAC_IOSIZE); |
1820 | aup->dma_addr); | 1034 | release_mem_region(CPHYSADDR(iflist[i].macen_addr), 4); |
1821 | free_netdev(dev); | 1035 | free_netdev(dev); |
1822 | release_mem_region(CPHYSADDR(iflist[i].base_addr), MAC_IOSIZE); | ||
1823 | } | 1036 | } |
1824 | } | 1037 | } |
1825 | } | 1038 | } |
@@ -1830,7 +1043,7 @@ static void update_tx_stats(struct net_device *dev, u32 status) | |||
1830 | struct net_device_stats *ps = &aup->stats; | 1043 | struct net_device_stats *ps = &aup->stats; |
1831 | 1044 | ||
1832 | if (status & TX_FRAME_ABORTED) { | 1045 | if (status & TX_FRAME_ABORTED) { |
1833 | if (dev->if_port == IF_PORT_100BASEFX) { | 1046 | if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) { |
1834 | if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) { | 1047 | if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) { |
1835 | /* any other tx errors are only valid | 1048 | /* any other tx errors are only valid |
1836 | * in half duplex mode */ | 1049 | * in half duplex mode */ |
@@ -2104,126 +1317,15 @@ static void set_rx_mode(struct net_device *dev) | |||
2104 | } | 1317 | } |
2105 | } | 1318 | } |
2106 | 1319 | ||
2107 | |||
2108 | static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | 1320 | static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
2109 | { | 1321 | { |
2110 | struct au1000_private *aup = (struct au1000_private *)dev->priv; | 1322 | struct au1000_private *aup = (struct au1000_private *)dev->priv; |
2111 | u16 *data = (u16 *)&rq->ifr_ifru; | ||
2112 | |||
2113 | switch(cmd) { | ||
2114 | case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */ | ||
2115 | case SIOCGMIIPHY: | ||
2116 | if (!netif_running(dev)) return -EINVAL; | ||
2117 | data[0] = aup->phy_addr; | ||
2118 | case SIOCDEVPRIVATE+1: /* Read the specified MII register. */ | ||
2119 | case SIOCGMIIREG: | ||
2120 | data[3] = mdio_read(dev, data[0], data[1]); | ||
2121 | return 0; | ||
2122 | case SIOCDEVPRIVATE+2: /* Write the specified MII register */ | ||
2123 | case SIOCSMIIREG: | ||
2124 | if (!capable(CAP_NET_ADMIN)) | ||
2125 | return -EPERM; | ||
2126 | mdio_write(dev, data[0], data[1],data[2]); | ||
2127 | return 0; | ||
2128 | default: | ||
2129 | return -EOPNOTSUPP; | ||
2130 | } | ||
2131 | |||
2132 | } | ||
2133 | |||
2134 | |||
2135 | static int au1000_set_config(struct net_device *dev, struct ifmap *map) | ||
2136 | { | ||
2137 | struct au1000_private *aup = (struct au1000_private *) dev->priv; | ||
2138 | u16 control; | ||
2139 | 1323 | ||
2140 | if (au1000_debug > 4) { | 1324 | if (!netif_running(dev)) return -EINVAL; |
2141 | printk("%s: set_config called: dev->if_port %d map->port %x\n", | ||
2142 | dev->name, dev->if_port, map->port); | ||
2143 | } | ||
2144 | 1325 | ||
2145 | switch(map->port){ | 1326 | if (!aup->phy_dev) return -EINVAL; // PHY not controllable |
2146 | case IF_PORT_UNKNOWN: /* use auto here */ | ||
2147 | printk(KERN_INFO "%s: config phy for aneg\n", | ||
2148 | dev->name); | ||
2149 | dev->if_port = map->port; | ||
2150 | /* Link Down: the timer will bring it up */ | ||
2151 | netif_carrier_off(dev); | ||
2152 | |||
2153 | /* read current control */ | ||
2154 | control = mdio_read(dev, aup->phy_addr, MII_CONTROL); | ||
2155 | control &= ~(MII_CNTL_FDX | MII_CNTL_F100); | ||
2156 | |||
2157 | /* enable auto negotiation and reset the negotiation */ | ||
2158 | mdio_write(dev, aup->phy_addr, MII_CONTROL, | ||
2159 | control | MII_CNTL_AUTO | | ||
2160 | MII_CNTL_RST_AUTO); | ||
2161 | 1327 | ||
2162 | break; | 1328 | return phy_mii_ioctl(aup->phy_dev, if_mii(rq), cmd); |
2163 | |||
2164 | case IF_PORT_10BASET: /* 10BaseT */ | ||
2165 | printk(KERN_INFO "%s: config phy for 10BaseT\n", | ||
2166 | dev->name); | ||
2167 | dev->if_port = map->port; | ||
2168 | |||
2169 | /* Link Down: the timer will bring it up */ | ||
2170 | netif_carrier_off(dev); | ||
2171 | |||
2172 | /* set Speed to 10Mbps, Half Duplex */ | ||
2173 | control = mdio_read(dev, aup->phy_addr, MII_CONTROL); | ||
2174 | control &= ~(MII_CNTL_F100 | MII_CNTL_AUTO | | ||
2175 | MII_CNTL_FDX); | ||
2176 | |||
2177 | /* disable auto negotiation and force 10M/HD mode*/ | ||
2178 | mdio_write(dev, aup->phy_addr, MII_CONTROL, control); | ||
2179 | break; | ||
2180 | |||
2181 | case IF_PORT_100BASET: /* 100BaseT */ | ||
2182 | case IF_PORT_100BASETX: /* 100BaseTx */ | ||
2183 | printk(KERN_INFO "%s: config phy for 100BaseTX\n", | ||
2184 | dev->name); | ||
2185 | dev->if_port = map->port; | ||
2186 | |||
2187 | /* Link Down: the timer will bring it up */ | ||
2188 | netif_carrier_off(dev); | ||
2189 | |||
2190 | /* set Speed to 100Mbps, Half Duplex */ | ||
2191 | /* disable auto negotiation and enable 100MBit Mode */ | ||
2192 | control = mdio_read(dev, aup->phy_addr, MII_CONTROL); | ||
2193 | control &= ~(MII_CNTL_AUTO | MII_CNTL_FDX); | ||
2194 | control |= MII_CNTL_F100; | ||
2195 | mdio_write(dev, aup->phy_addr, MII_CONTROL, control); | ||
2196 | break; | ||
2197 | |||
2198 | case IF_PORT_100BASEFX: /* 100BaseFx */ | ||
2199 | printk(KERN_INFO "%s: config phy for 100BaseFX\n", | ||
2200 | dev->name); | ||
2201 | dev->if_port = map->port; | ||
2202 | |||
2203 | /* Link Down: the timer will bring it up */ | ||
2204 | netif_carrier_off(dev); | ||
2205 | |||
2206 | /* set Speed to 100Mbps, Full Duplex */ | ||
2207 | /* disable auto negotiation and enable 100MBit Mode */ | ||
2208 | control = mdio_read(dev, aup->phy_addr, MII_CONTROL); | ||
2209 | control &= ~MII_CNTL_AUTO; | ||
2210 | control |= MII_CNTL_F100 | MII_CNTL_FDX; | ||
2211 | mdio_write(dev, aup->phy_addr, MII_CONTROL, control); | ||
2212 | break; | ||
2213 | case IF_PORT_10BASE2: /* 10Base2 */ | ||
2214 | case IF_PORT_AUI: /* AUI */ | ||
2215 | /* These Modes are not supported (are they?)*/ | ||
2216 | printk(KERN_ERR "%s: 10Base2/AUI not supported", | ||
2217 | dev->name); | ||
2218 | return -EOPNOTSUPP; | ||
2219 | break; | ||
2220 | |||
2221 | default: | ||
2222 | printk(KERN_ERR "%s: Invalid media selected", | ||
2223 | dev->name); | ||
2224 | return -EINVAL; | ||
2225 | } | ||
2226 | return 0; | ||
2227 | } | 1329 | } |
2228 | 1330 | ||
2229 | static struct net_device_stats *au1000_get_stats(struct net_device *dev) | 1331 | static struct net_device_stats *au1000_get_stats(struct net_device *dev) |
diff --git a/drivers/net/au1000_eth.h b/drivers/net/au1000_eth.h index 7f9326e39cc0..41c2f848d2c4 100644 --- a/drivers/net/au1000_eth.h +++ b/drivers/net/au1000_eth.h | |||
@@ -40,120 +40,6 @@ | |||
40 | 40 | ||
41 | #define MULTICAST_FILTER_LIMIT 64 | 41 | #define MULTICAST_FILTER_LIMIT 64 |
42 | 42 | ||
43 | /* FIXME | ||
44 | * The PHY defines should be in a separate file. | ||
45 | */ | ||
46 | |||
47 | /* MII register offsets */ | ||
48 | #define MII_CONTROL 0x0000 | ||
49 | #define MII_STATUS 0x0001 | ||
50 | #define MII_PHY_ID0 0x0002 | ||
51 | #define MII_PHY_ID1 0x0003 | ||
52 | #define MII_ANADV 0x0004 | ||
53 | #define MII_ANLPAR 0x0005 | ||
54 | #define MII_AEXP 0x0006 | ||
55 | #define MII_ANEXT 0x0007 | ||
56 | #define MII_LSI_PHY_CONFIG 0x0011 | ||
57 | /* Status register */ | ||
58 | #define MII_LSI_PHY_STAT 0x0012 | ||
59 | #define MII_AMD_PHY_STAT MII_LSI_PHY_STAT | ||
60 | #define MII_INTEL_PHY_STAT 0x0011 | ||
61 | |||
62 | #define MII_AUX_CNTRL 0x0018 | ||
63 | /* mii registers specific to AMD 79C901 */ | ||
64 | #define MII_STATUS_SUMMARY = 0x0018 | ||
65 | |||
66 | /* MII Control register bit definitions. */ | ||
67 | #define MII_CNTL_FDX 0x0100 | ||
68 | #define MII_CNTL_RST_AUTO 0x0200 | ||
69 | #define MII_CNTL_ISOLATE 0x0400 | ||
70 | #define MII_CNTL_PWRDWN 0x0800 | ||
71 | #define MII_CNTL_AUTO 0x1000 | ||
72 | #define MII_CNTL_F100 0x2000 | ||
73 | #define MII_CNTL_LPBK 0x4000 | ||
74 | #define MII_CNTL_RESET 0x8000 | ||
75 | |||
76 | /* MII Status register bit */ | ||
77 | #define MII_STAT_EXT 0x0001 | ||
78 | #define MII_STAT_JAB 0x0002 | ||
79 | #define MII_STAT_LINK 0x0004 | ||
80 | #define MII_STAT_CAN_AUTO 0x0008 | ||
81 | #define MII_STAT_FAULT 0x0010 | ||
82 | #define MII_STAT_AUTO_DONE 0x0020 | ||
83 | #define MII_STAT_CAN_T 0x0800 | ||
84 | #define MII_STAT_CAN_T_FDX 0x1000 | ||
85 | #define MII_STAT_CAN_TX 0x2000 | ||
86 | #define MII_STAT_CAN_TX_FDX 0x4000 | ||
87 | #define MII_STAT_CAN_T4 0x8000 | ||
88 | |||
89 | |||
90 | #define MII_ID1_OUI_LO 0xFC00 /* low bits of OUI mask */ | ||
91 | #define MII_ID1_MODEL 0x03F0 /* model number */ | ||
92 | #define MII_ID1_REV 0x000F /* model number */ | ||
93 | |||
94 | /* MII NWAY Register Bits ... | ||
95 | valid for the ANAR (Auto-Negotiation Advertisement) and | ||
96 | ANLPAR (Auto-Negotiation Link Partner) registers */ | ||
97 | #define MII_NWAY_NODE_SEL 0x001f | ||
98 | #define MII_NWAY_CSMA_CD 0x0001 | ||
99 | #define MII_NWAY_T 0x0020 | ||
100 | #define MII_NWAY_T_FDX 0x0040 | ||
101 | #define MII_NWAY_TX 0x0080 | ||
102 | #define MII_NWAY_TX_FDX 0x0100 | ||
103 | #define MII_NWAY_T4 0x0200 | ||
104 | #define MII_NWAY_PAUSE 0x0400 | ||
105 | #define MII_NWAY_RF 0x2000 /* Remote Fault */ | ||
106 | #define MII_NWAY_ACK 0x4000 /* Remote Acknowledge */ | ||
107 | #define MII_NWAY_NP 0x8000 /* Next Page (Enable) */ | ||
108 | |||
109 | /* mii stsout register bits */ | ||
110 | #define MII_STSOUT_LINK_FAIL 0x4000 | ||
111 | #define MII_STSOUT_SPD 0x0080 | ||
112 | #define MII_STSOUT_DPLX 0x0040 | ||
113 | |||
114 | /* mii stsics register bits */ | ||
115 | #define MII_STSICS_SPD 0x8000 | ||
116 | #define MII_STSICS_DPLX 0x4000 | ||
117 | #define MII_STSICS_LINKSTS 0x0001 | ||
118 | |||
119 | /* mii stssum register bits */ | ||
120 | #define MII_STSSUM_LINK 0x0008 | ||
121 | #define MII_STSSUM_DPLX 0x0004 | ||
122 | #define MII_STSSUM_AUTO 0x0002 | ||
123 | #define MII_STSSUM_SPD 0x0001 | ||
124 | |||
125 | /* lsi phy status register */ | ||
126 | #define MII_LSI_PHY_STAT_FDX 0x0040 | ||
127 | #define MII_LSI_PHY_STAT_SPD 0x0080 | ||
128 | |||
129 | /* amd phy status register */ | ||
130 | #define MII_AMD_PHY_STAT_FDX 0x0800 | ||
131 | #define MII_AMD_PHY_STAT_SPD 0x0400 | ||
132 | |||
133 | /* intel phy status register */ | ||
134 | #define MII_INTEL_PHY_STAT_FDX 0x0200 | ||
135 | #define MII_INTEL_PHY_STAT_SPD 0x4000 | ||
136 | |||
137 | /* Auxilliary Control/Status Register */ | ||
138 | #define MII_AUX_FDX 0x0001 | ||
139 | #define MII_AUX_100 0x0002 | ||
140 | #define MII_AUX_F100 0x0004 | ||
141 | #define MII_AUX_ANEG 0x0008 | ||
142 | |||
143 | typedef struct mii_phy { | ||
144 | struct mii_phy * next; | ||
145 | struct mii_chip_info * chip_info; | ||
146 | u16 status; | ||
147 | u32 *mii_control_reg; | ||
148 | u32 *mii_data_reg; | ||
149 | } mii_phy_t; | ||
150 | |||
151 | struct phy_ops { | ||
152 | int (*phy_init) (struct net_device *, int); | ||
153 | int (*phy_reset) (struct net_device *, int); | ||
154 | int (*phy_status) (struct net_device *, int, u16 *, u16 *); | ||
155 | }; | ||
156 | |||
157 | /* | 43 | /* |
158 | * Data Buffer Descriptor. Data buffers must be aligned on 32 byte | 44 | * Data Buffer Descriptor. Data buffers must be aligned on 32 byte |
159 | * boundary for both, receive and transmit. | 45 | * boundary for both, receive and transmit. |
@@ -200,7 +86,6 @@ typedef struct mac_reg { | |||
200 | 86 | ||
201 | 87 | ||
202 | struct au1000_private { | 88 | struct au1000_private { |
203 | |||
204 | db_dest_t *pDBfree; | 89 | db_dest_t *pDBfree; |
205 | db_dest_t db[NUM_RX_BUFFS+NUM_TX_BUFFS]; | 90 | db_dest_t db[NUM_RX_BUFFS+NUM_TX_BUFFS]; |
206 | volatile rx_dma_t *rx_dma_ring[NUM_RX_DMA]; | 91 | volatile rx_dma_t *rx_dma_ring[NUM_RX_DMA]; |
@@ -213,8 +98,15 @@ struct au1000_private { | |||
213 | u32 tx_full; | 98 | u32 tx_full; |
214 | 99 | ||
215 | int mac_id; | 100 | int mac_id; |
216 | mii_phy_t *mii; | 101 | |
217 | struct phy_ops *phy_ops; | 102 | int mac_enabled; /* whether MAC is currently enabled and running (req. for mdio) */ |
103 | |||
104 | int old_link; /* used by au1000_adjust_link */ | ||
105 | int old_speed; | ||
106 | int old_duplex; | ||
107 | |||
108 | struct phy_device *phy_dev; | ||
109 | struct mii_bus mii_bus; | ||
218 | 110 | ||
219 | /* These variables are just for quick access to certain regs addresses. */ | 111 | /* These variables are just for quick access to certain regs addresses. */ |
220 | volatile mac_reg_t *mac; /* mac registers */ | 112 | volatile mac_reg_t *mac; /* mac registers */ |
@@ -223,14 +115,6 @@ struct au1000_private { | |||
223 | u32 vaddr; /* virtual address of rx/tx buffers */ | 115 | u32 vaddr; /* virtual address of rx/tx buffers */ |
224 | dma_addr_t dma_addr; /* dma address of rx/tx buffers */ | 116 | dma_addr_t dma_addr; /* dma address of rx/tx buffers */ |
225 | 117 | ||
226 | u8 *hash_table; | ||
227 | u32 hash_mode; | ||
228 | u32 intr_work_done; /* number of Rx and Tx pkts processed in the isr */ | ||
229 | int phy_addr; /* phy address */ | ||
230 | u32 options; /* User-settable misc. driver options. */ | ||
231 | u32 drv_flags; | ||
232 | int want_autoneg; | ||
233 | struct net_device_stats stats; | 118 | struct net_device_stats stats; |
234 | struct timer_list timer; | ||
235 | spinlock_t lock; /* Serialise access to device */ | 119 | spinlock_t lock; /* Serialise access to device */ |
236 | }; | 120 | }; |
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index 54161aef3cac..702d546567ad 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <asm/irq.h> | 32 | #include <asm/irq.h> |
33 | #include <linux/delay.h> | 33 | #include <linux/delay.h> |
34 | #include <asm/byteorder.h> | 34 | #include <asm/byteorder.h> |
35 | #include <asm/page.h> | ||
35 | #include <linux/time.h> | 36 | #include <linux/time.h> |
36 | #include <linux/ethtool.h> | 37 | #include <linux/ethtool.h> |
37 | #include <linux/mii.h> | 38 | #include <linux/mii.h> |
@@ -49,14 +50,15 @@ | |||
49 | #include <linux/crc32.h> | 50 | #include <linux/crc32.h> |
50 | #include <linux/prefetch.h> | 51 | #include <linux/prefetch.h> |
51 | #include <linux/cache.h> | 52 | #include <linux/cache.h> |
53 | #include <linux/zlib.h> | ||
52 | 54 | ||
53 | #include "bnx2.h" | 55 | #include "bnx2.h" |
54 | #include "bnx2_fw.h" | 56 | #include "bnx2_fw.h" |
55 | 57 | ||
56 | #define DRV_MODULE_NAME "bnx2" | 58 | #define DRV_MODULE_NAME "bnx2" |
57 | #define PFX DRV_MODULE_NAME ": " | 59 | #define PFX DRV_MODULE_NAME ": " |
58 | #define DRV_MODULE_VERSION "1.4.40" | 60 | #define DRV_MODULE_VERSION "1.4.42" |
59 | #define DRV_MODULE_RELDATE "May 22, 2006" | 61 | #define DRV_MODULE_RELDATE "June 12, 2006" |
60 | 62 | ||
61 | #define RUN_AT(x) (jiffies + (x)) | 63 | #define RUN_AT(x) (jiffies + (x)) |
62 | 64 | ||
@@ -1820,7 +1822,7 @@ reuse_rx: | |||
1820 | skb->protocol = eth_type_trans(skb, bp->dev); | 1822 | skb->protocol = eth_type_trans(skb, bp->dev); |
1821 | 1823 | ||
1822 | if ((len > (bp->dev->mtu + ETH_HLEN)) && | 1824 | if ((len > (bp->dev->mtu + ETH_HLEN)) && |
1823 | (htons(skb->protocol) != 0x8100)) { | 1825 | (ntohs(skb->protocol) != 0x8100)) { |
1824 | 1826 | ||
1825 | dev_kfree_skb_irq(skb); | 1827 | dev_kfree_skb_irq(skb); |
1826 | goto next_rx; | 1828 | goto next_rx; |
@@ -2009,7 +2011,7 @@ bnx2_poll(struct net_device *dev, int *budget) | |||
2009 | return 1; | 2011 | return 1; |
2010 | } | 2012 | } |
2011 | 2013 | ||
2012 | /* Called with rtnl_lock from vlan functions and also dev->xmit_lock | 2014 | /* Called with rtnl_lock from vlan functions and also netif_tx_lock |
2013 | * from set_multicast. | 2015 | * from set_multicast. |
2014 | */ | 2016 | */ |
2015 | static void | 2017 | static void |
@@ -2083,6 +2085,92 @@ bnx2_set_rx_mode(struct net_device *dev) | |||
2083 | spin_unlock_bh(&bp->phy_lock); | 2085 | spin_unlock_bh(&bp->phy_lock); |
2084 | } | 2086 | } |
2085 | 2087 | ||
2088 | #define FW_BUF_SIZE 0x8000 | ||
2089 | |||
2090 | static int | ||
2091 | bnx2_gunzip_init(struct bnx2 *bp) | ||
2092 | { | ||
2093 | if ((bp->gunzip_buf = vmalloc(FW_BUF_SIZE)) == NULL) | ||
2094 | goto gunzip_nomem1; | ||
2095 | |||
2096 | if ((bp->strm = kmalloc(sizeof(*bp->strm), GFP_KERNEL)) == NULL) | ||
2097 | goto gunzip_nomem2; | ||
2098 | |||
2099 | bp->strm->workspace = kmalloc(zlib_inflate_workspacesize(), GFP_KERNEL); | ||
2100 | if (bp->strm->workspace == NULL) | ||
2101 | goto gunzip_nomem3; | ||
2102 | |||
2103 | return 0; | ||
2104 | |||
2105 | gunzip_nomem3: | ||
2106 | kfree(bp->strm); | ||
2107 | bp->strm = NULL; | ||
2108 | |||
2109 | gunzip_nomem2: | ||
2110 | vfree(bp->gunzip_buf); | ||
2111 | bp->gunzip_buf = NULL; | ||
2112 | |||
2113 | gunzip_nomem1: | ||
2114 | printk(KERN_ERR PFX "%s: Cannot allocate firmware buffer for " | ||
2115 | "uncompression.\n", bp->dev->name); | ||
2116 | return -ENOMEM; | ||
2117 | } | ||
2118 | |||
2119 | static void | ||
2120 | bnx2_gunzip_end(struct bnx2 *bp) | ||
2121 | { | ||
2122 | kfree(bp->strm->workspace); | ||
2123 | |||
2124 | kfree(bp->strm); | ||
2125 | bp->strm = NULL; | ||
2126 | |||
2127 | if (bp->gunzip_buf) { | ||
2128 | vfree(bp->gunzip_buf); | ||
2129 | bp->gunzip_buf = NULL; | ||
2130 | } | ||
2131 | } | ||
2132 | |||
2133 | static int | ||
2134 | bnx2_gunzip(struct bnx2 *bp, u8 *zbuf, int len, void **outbuf, int *outlen) | ||
2135 | { | ||
2136 | int n, rc; | ||
2137 | |||
2138 | /* check gzip header */ | ||
2139 | if ((zbuf[0] != 0x1f) || (zbuf[1] != 0x8b) || (zbuf[2] != Z_DEFLATED)) | ||
2140 | return -EINVAL; | ||
2141 | |||
2142 | n = 10; | ||
2143 | |||
2144 | #define FNAME 0x8 | ||
2145 | if (zbuf[3] & FNAME) | ||
2146 | while ((zbuf[n++] != 0) && (n < len)); | ||
2147 | |||
2148 | bp->strm->next_in = zbuf + n; | ||
2149 | bp->strm->avail_in = len - n; | ||
2150 | bp->strm->next_out = bp->gunzip_buf; | ||
2151 | bp->strm->avail_out = FW_BUF_SIZE; | ||
2152 | |||
2153 | rc = zlib_inflateInit2(bp->strm, -MAX_WBITS); | ||
2154 | if (rc != Z_OK) | ||
2155 | return rc; | ||
2156 | |||
2157 | rc = zlib_inflate(bp->strm, Z_FINISH); | ||
2158 | |||
2159 | *outlen = FW_BUF_SIZE - bp->strm->avail_out; | ||
2160 | *outbuf = bp->gunzip_buf; | ||
2161 | |||
2162 | if ((rc != Z_OK) && (rc != Z_STREAM_END)) | ||
2163 | printk(KERN_ERR PFX "%s: Firmware decompression error: %s\n", | ||
2164 | bp->dev->name, bp->strm->msg); | ||
2165 | |||
2166 | zlib_inflateEnd(bp->strm); | ||
2167 | |||
2168 | if (rc == Z_STREAM_END) | ||
2169 | return 0; | ||
2170 | |||
2171 | return rc; | ||
2172 | } | ||
2173 | |||
2086 | static void | 2174 | static void |
2087 | load_rv2p_fw(struct bnx2 *bp, u32 *rv2p_code, u32 rv2p_code_len, | 2175 | load_rv2p_fw(struct bnx2 *bp, u32 *rv2p_code, u32 rv2p_code_len, |
2088 | u32 rv2p_proc) | 2176 | u32 rv2p_proc) |
@@ -2092,9 +2180,9 @@ load_rv2p_fw(struct bnx2 *bp, u32 *rv2p_code, u32 rv2p_code_len, | |||
2092 | 2180 | ||
2093 | 2181 | ||
2094 | for (i = 0; i < rv2p_code_len; i += 8) { | 2182 | for (i = 0; i < rv2p_code_len; i += 8) { |
2095 | REG_WR(bp, BNX2_RV2P_INSTR_HIGH, *rv2p_code); | 2183 | REG_WR(bp, BNX2_RV2P_INSTR_HIGH, cpu_to_le32(*rv2p_code)); |
2096 | rv2p_code++; | 2184 | rv2p_code++; |
2097 | REG_WR(bp, BNX2_RV2P_INSTR_LOW, *rv2p_code); | 2185 | REG_WR(bp, BNX2_RV2P_INSTR_LOW, cpu_to_le32(*rv2p_code)); |
2098 | rv2p_code++; | 2186 | rv2p_code++; |
2099 | 2187 | ||
2100 | if (rv2p_proc == RV2P_PROC1) { | 2188 | if (rv2p_proc == RV2P_PROC1) { |
@@ -2134,7 +2222,7 @@ load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw) | |||
2134 | int j; | 2222 | int j; |
2135 | 2223 | ||
2136 | for (j = 0; j < (fw->text_len / 4); j++, offset += 4) { | 2224 | for (j = 0; j < (fw->text_len / 4); j++, offset += 4) { |
2137 | REG_WR_IND(bp, offset, fw->text[j]); | 2225 | REG_WR_IND(bp, offset, cpu_to_le32(fw->text[j])); |
2138 | } | 2226 | } |
2139 | } | 2227 | } |
2140 | 2228 | ||
@@ -2190,15 +2278,32 @@ load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw) | |||
2190 | REG_WR_IND(bp, cpu_reg->mode, val); | 2278 | REG_WR_IND(bp, cpu_reg->mode, val); |
2191 | } | 2279 | } |
2192 | 2280 | ||
2193 | static void | 2281 | static int |
2194 | bnx2_init_cpus(struct bnx2 *bp) | 2282 | bnx2_init_cpus(struct bnx2 *bp) |
2195 | { | 2283 | { |
2196 | struct cpu_reg cpu_reg; | 2284 | struct cpu_reg cpu_reg; |
2197 | struct fw_info fw; | 2285 | struct fw_info fw; |
2286 | int rc = 0; | ||
2287 | void *text; | ||
2288 | u32 text_len; | ||
2289 | |||
2290 | if ((rc = bnx2_gunzip_init(bp)) != 0) | ||
2291 | return rc; | ||
2198 | 2292 | ||
2199 | /* Initialize the RV2P processor. */ | 2293 | /* Initialize the RV2P processor. */ |
2200 | load_rv2p_fw(bp, bnx2_rv2p_proc1, sizeof(bnx2_rv2p_proc1), RV2P_PROC1); | 2294 | rc = bnx2_gunzip(bp, bnx2_rv2p_proc1, sizeof(bnx2_rv2p_proc1), &text, |
2201 | load_rv2p_fw(bp, bnx2_rv2p_proc2, sizeof(bnx2_rv2p_proc2), RV2P_PROC2); | 2295 | &text_len); |
2296 | if (rc) | ||
2297 | goto init_cpu_err; | ||
2298 | |||
2299 | load_rv2p_fw(bp, text, text_len, RV2P_PROC1); | ||
2300 | |||
2301 | rc = bnx2_gunzip(bp, bnx2_rv2p_proc2, sizeof(bnx2_rv2p_proc2), &text, | ||
2302 | &text_len); | ||
2303 | if (rc) | ||
2304 | goto init_cpu_err; | ||
2305 | |||
2306 | load_rv2p_fw(bp, text, text_len, RV2P_PROC2); | ||
2202 | 2307 | ||
2203 | /* Initialize the RX Processor. */ | 2308 | /* Initialize the RX Processor. */ |
2204 | cpu_reg.mode = BNX2_RXP_CPU_MODE; | 2309 | cpu_reg.mode = BNX2_RXP_CPU_MODE; |
@@ -2222,7 +2327,13 @@ bnx2_init_cpus(struct bnx2 *bp) | |||
2222 | fw.text_addr = bnx2_RXP_b06FwTextAddr; | 2327 | fw.text_addr = bnx2_RXP_b06FwTextAddr; |
2223 | fw.text_len = bnx2_RXP_b06FwTextLen; | 2328 | fw.text_len = bnx2_RXP_b06FwTextLen; |
2224 | fw.text_index = 0; | 2329 | fw.text_index = 0; |
2225 | fw.text = bnx2_RXP_b06FwText; | 2330 | |
2331 | rc = bnx2_gunzip(bp, bnx2_RXP_b06FwText, sizeof(bnx2_RXP_b06FwText), | ||
2332 | &text, &text_len); | ||
2333 | if (rc) | ||
2334 | goto init_cpu_err; | ||
2335 | |||
2336 | fw.text = text; | ||
2226 | 2337 | ||
2227 | fw.data_addr = bnx2_RXP_b06FwDataAddr; | 2338 | fw.data_addr = bnx2_RXP_b06FwDataAddr; |
2228 | fw.data_len = bnx2_RXP_b06FwDataLen; | 2339 | fw.data_len = bnx2_RXP_b06FwDataLen; |
@@ -2268,7 +2379,13 @@ bnx2_init_cpus(struct bnx2 *bp) | |||
2268 | fw.text_addr = bnx2_TXP_b06FwTextAddr; | 2379 | fw.text_addr = bnx2_TXP_b06FwTextAddr; |
2269 | fw.text_len = bnx2_TXP_b06FwTextLen; | 2380 | fw.text_len = bnx2_TXP_b06FwTextLen; |
2270 | fw.text_index = 0; | 2381 | fw.text_index = 0; |
2271 | fw.text = bnx2_TXP_b06FwText; | 2382 | |
2383 | rc = bnx2_gunzip(bp, bnx2_TXP_b06FwText, sizeof(bnx2_TXP_b06FwText), | ||
2384 | &text, &text_len); | ||
2385 | if (rc) | ||
2386 | goto init_cpu_err; | ||
2387 | |||
2388 | fw.text = text; | ||
2272 | 2389 | ||
2273 | fw.data_addr = bnx2_TXP_b06FwDataAddr; | 2390 | fw.data_addr = bnx2_TXP_b06FwDataAddr; |
2274 | fw.data_len = bnx2_TXP_b06FwDataLen; | 2391 | fw.data_len = bnx2_TXP_b06FwDataLen; |
@@ -2314,7 +2431,13 @@ bnx2_init_cpus(struct bnx2 *bp) | |||
2314 | fw.text_addr = bnx2_TPAT_b06FwTextAddr; | 2431 | fw.text_addr = bnx2_TPAT_b06FwTextAddr; |
2315 | fw.text_len = bnx2_TPAT_b06FwTextLen; | 2432 | fw.text_len = bnx2_TPAT_b06FwTextLen; |
2316 | fw.text_index = 0; | 2433 | fw.text_index = 0; |
2317 | fw.text = bnx2_TPAT_b06FwText; | 2434 | |
2435 | rc = bnx2_gunzip(bp, bnx2_TPAT_b06FwText, sizeof(bnx2_TPAT_b06FwText), | ||
2436 | &text, &text_len); | ||
2437 | if (rc) | ||
2438 | goto init_cpu_err; | ||
2439 | |||
2440 | fw.text = text; | ||
2318 | 2441 | ||
2319 | fw.data_addr = bnx2_TPAT_b06FwDataAddr; | 2442 | fw.data_addr = bnx2_TPAT_b06FwDataAddr; |
2320 | fw.data_len = bnx2_TPAT_b06FwDataLen; | 2443 | fw.data_len = bnx2_TPAT_b06FwDataLen; |
@@ -2360,7 +2483,13 @@ bnx2_init_cpus(struct bnx2 *bp) | |||
2360 | fw.text_addr = bnx2_COM_b06FwTextAddr; | 2483 | fw.text_addr = bnx2_COM_b06FwTextAddr; |
2361 | fw.text_len = bnx2_COM_b06FwTextLen; | 2484 | fw.text_len = bnx2_COM_b06FwTextLen; |
2362 | fw.text_index = 0; | 2485 | fw.text_index = 0; |
2363 | fw.text = bnx2_COM_b06FwText; | 2486 | |
2487 | rc = bnx2_gunzip(bp, bnx2_COM_b06FwText, sizeof(bnx2_COM_b06FwText), | ||
2488 | &text, &text_len); | ||
2489 | if (rc) | ||
2490 | goto init_cpu_err; | ||
2491 | |||
2492 | fw.text = text; | ||
2364 | 2493 | ||
2365 | fw.data_addr = bnx2_COM_b06FwDataAddr; | 2494 | fw.data_addr = bnx2_COM_b06FwDataAddr; |
2366 | fw.data_len = bnx2_COM_b06FwDataLen; | 2495 | fw.data_len = bnx2_COM_b06FwDataLen; |
@@ -2384,6 +2513,9 @@ bnx2_init_cpus(struct bnx2 *bp) | |||
2384 | 2513 | ||
2385 | load_cpu_fw(bp, &cpu_reg, &fw); | 2514 | load_cpu_fw(bp, &cpu_reg, &fw); |
2386 | 2515 | ||
2516 | init_cpu_err: | ||
2517 | bnx2_gunzip_end(bp); | ||
2518 | return rc; | ||
2387 | } | 2519 | } |
2388 | 2520 | ||
2389 | static int | 2521 | static int |
@@ -3256,7 +3388,9 @@ bnx2_init_chip(struct bnx2 *bp) | |||
3256 | * context block must have already been enabled. */ | 3388 | * context block must have already been enabled. */ |
3257 | bnx2_init_context(bp); | 3389 | bnx2_init_context(bp); |
3258 | 3390 | ||
3259 | bnx2_init_cpus(bp); | 3391 | if ((rc = bnx2_init_cpus(bp)) != 0) |
3392 | return rc; | ||
3393 | |||
3260 | bnx2_init_nvram(bp); | 3394 | bnx2_init_nvram(bp); |
3261 | 3395 | ||
3262 | bnx2_set_mac_addr(bp); | 3396 | bnx2_set_mac_addr(bp); |
@@ -3556,7 +3690,9 @@ bnx2_reset_nic(struct bnx2 *bp, u32 reset_code) | |||
3556 | if (rc) | 3690 | if (rc) |
3557 | return rc; | 3691 | return rc; |
3558 | 3692 | ||
3559 | bnx2_init_chip(bp); | 3693 | if ((rc = bnx2_init_chip(bp)) != 0) |
3694 | return rc; | ||
3695 | |||
3560 | bnx2_init_tx_ring(bp); | 3696 | bnx2_init_tx_ring(bp); |
3561 | bnx2_init_rx_ring(bp); | 3697 | bnx2_init_rx_ring(bp); |
3562 | return 0; | 3698 | return 0; |
@@ -4034,6 +4170,8 @@ bnx2_timer(unsigned long data) | |||
4034 | msg = (u32) ++bp->fw_drv_pulse_wr_seq; | 4170 | msg = (u32) ++bp->fw_drv_pulse_wr_seq; |
4035 | REG_WR_IND(bp, bp->shmem_base + BNX2_DRV_PULSE_MB, msg); | 4171 | REG_WR_IND(bp, bp->shmem_base + BNX2_DRV_PULSE_MB, msg); |
4036 | 4172 | ||
4173 | bp->stats_blk->stat_FwRxDrop = REG_RD_IND(bp, BNX2_FW_RX_DROP_COUNT); | ||
4174 | |||
4037 | if ((bp->phy_flags & PHY_SERDES_FLAG) && | 4175 | if ((bp->phy_flags & PHY_SERDES_FLAG) && |
4038 | (CHIP_NUM(bp) == CHIP_NUM_5706)) { | 4176 | (CHIP_NUM(bp) == CHIP_NUM_5706)) { |
4039 | 4177 | ||
@@ -4252,7 +4390,7 @@ bnx2_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid) | |||
4252 | } | 4390 | } |
4253 | #endif | 4391 | #endif |
4254 | 4392 | ||
4255 | /* Called with dev->xmit_lock. | 4393 | /* Called with netif_tx_lock. |
4256 | * hard_start_xmit is pseudo-lockless - a lock is only required when | 4394 | * hard_start_xmit is pseudo-lockless - a lock is only required when |
4257 | * the tx queue is full. This way, we get the benefit of lockless | 4395 | * the tx queue is full. This way, we get the benefit of lockless |
4258 | * operations most of the time without the complexities to handle | 4396 | * operations most of the time without the complexities to handle |
@@ -4310,7 +4448,7 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
4310 | ip_tcp_len = (skb->nh.iph->ihl << 2) + sizeof(struct tcphdr); | 4448 | ip_tcp_len = (skb->nh.iph->ihl << 2) + sizeof(struct tcphdr); |
4311 | 4449 | ||
4312 | skb->nh.iph->check = 0; | 4450 | skb->nh.iph->check = 0; |
4313 | skb->nh.iph->tot_len = ntohs(mss + ip_tcp_len + tcp_opt_len); | 4451 | skb->nh.iph->tot_len = htons(mss + ip_tcp_len + tcp_opt_len); |
4314 | skb->h.th->check = | 4452 | skb->h.th->check = |
4315 | ~csum_tcpudp_magic(skb->nh.iph->saddr, | 4453 | ~csum_tcpudp_magic(skb->nh.iph->saddr, |
4316 | skb->nh.iph->daddr, | 4454 | skb->nh.iph->daddr, |
@@ -4504,6 +4642,10 @@ bnx2_get_stats(struct net_device *dev) | |||
4504 | net_stats->tx_aborted_errors + | 4642 | net_stats->tx_aborted_errors + |
4505 | net_stats->tx_carrier_errors; | 4643 | net_stats->tx_carrier_errors; |
4506 | 4644 | ||
4645 | net_stats->rx_missed_errors = | ||
4646 | (unsigned long) (stats_blk->stat_IfInMBUFDiscards + | ||
4647 | stats_blk->stat_FwRxDrop); | ||
4648 | |||
4507 | return net_stats; | 4649 | return net_stats; |
4508 | } | 4650 | } |
4509 | 4651 | ||
@@ -4986,7 +5128,7 @@ bnx2_set_rx_csum(struct net_device *dev, u32 data) | |||
4986 | return 0; | 5128 | return 0; |
4987 | } | 5129 | } |
4988 | 5130 | ||
4989 | #define BNX2_NUM_STATS 45 | 5131 | #define BNX2_NUM_STATS 46 |
4990 | 5132 | ||
4991 | static struct { | 5133 | static struct { |
4992 | char string[ETH_GSTRING_LEN]; | 5134 | char string[ETH_GSTRING_LEN]; |
@@ -5036,6 +5178,7 @@ static struct { | |||
5036 | { "rx_mac_ctrl_frames" }, | 5178 | { "rx_mac_ctrl_frames" }, |
5037 | { "rx_filtered_packets" }, | 5179 | { "rx_filtered_packets" }, |
5038 | { "rx_discards" }, | 5180 | { "rx_discards" }, |
5181 | { "rx_fw_discards" }, | ||
5039 | }; | 5182 | }; |
5040 | 5183 | ||
5041 | #define STATS_OFFSET32(offset_name) (offsetof(struct statistics_block, offset_name) / 4) | 5184 | #define STATS_OFFSET32(offset_name) (offsetof(struct statistics_block, offset_name) / 4) |
@@ -5086,6 +5229,7 @@ static const unsigned long bnx2_stats_offset_arr[BNX2_NUM_STATS] = { | |||
5086 | STATS_OFFSET32(stat_MacControlFramesReceived), | 5229 | STATS_OFFSET32(stat_MacControlFramesReceived), |
5087 | STATS_OFFSET32(stat_IfInFramesL2FilterDiscards), | 5230 | STATS_OFFSET32(stat_IfInFramesL2FilterDiscards), |
5088 | STATS_OFFSET32(stat_IfInMBUFDiscards), | 5231 | STATS_OFFSET32(stat_IfInMBUFDiscards), |
5232 | STATS_OFFSET32(stat_FwRxDrop), | ||
5089 | }; | 5233 | }; |
5090 | 5234 | ||
5091 | /* stat_IfHCInBadOctets and stat_Dot3StatsCarrierSenseErrors are | 5235 | /* stat_IfHCInBadOctets and stat_Dot3StatsCarrierSenseErrors are |
@@ -5096,7 +5240,7 @@ static u8 bnx2_5706_stats_len_arr[BNX2_NUM_STATS] = { | |||
5096 | 4,0,4,4,4,4,4,4,4,4, | 5240 | 4,0,4,4,4,4,4,4,4,4, |
5097 | 4,4,4,4,4,4,4,4,4,4, | 5241 | 4,4,4,4,4,4,4,4,4,4, |
5098 | 4,4,4,4,4,4,4,4,4,4, | 5242 | 4,4,4,4,4,4,4,4,4,4, |
5099 | 4,4,4,4,4, | 5243 | 4,4,4,4,4,4, |
5100 | }; | 5244 | }; |
5101 | 5245 | ||
5102 | static u8 bnx2_5708_stats_len_arr[BNX2_NUM_STATS] = { | 5246 | static u8 bnx2_5708_stats_len_arr[BNX2_NUM_STATS] = { |
@@ -5104,7 +5248,7 @@ static u8 bnx2_5708_stats_len_arr[BNX2_NUM_STATS] = { | |||
5104 | 4,4,4,4,4,4,4,4,4,4, | 5248 | 4,4,4,4,4,4,4,4,4,4, |
5105 | 4,4,4,4,4,4,4,4,4,4, | 5249 | 4,4,4,4,4,4,4,4,4,4, |
5106 | 4,4,4,4,4,4,4,4,4,4, | 5250 | 4,4,4,4,4,4,4,4,4,4, |
5107 | 4,4,4,4,4, | 5251 | 4,4,4,4,4,4, |
5108 | }; | 5252 | }; |
5109 | 5253 | ||
5110 | #define BNX2_NUM_TESTS 6 | 5254 | #define BNX2_NUM_TESTS 6 |
@@ -5634,7 +5778,9 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) | |||
5634 | } | 5778 | } |
5635 | } | 5779 | } |
5636 | 5780 | ||
5637 | if (CHIP_NUM(bp) == CHIP_NUM_5708) | 5781 | if ((CHIP_ID(bp) == CHIP_ID_5708_A0) || |
5782 | (CHIP_ID(bp) == CHIP_ID_5708_B0) || | ||
5783 | (CHIP_ID(bp) == CHIP_ID_5708_B1)) | ||
5638 | bp->flags |= NO_WOL_FLAG; | 5784 | bp->flags |= NO_WOL_FLAG; |
5639 | 5785 | ||
5640 | if (CHIP_ID(bp) == CHIP_ID_5706_A0) { | 5786 | if (CHIP_ID(bp) == CHIP_ID_5706_A0) { |
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index b87925f6a228..5845e334941b 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h | |||
@@ -231,6 +231,7 @@ struct statistics_block { | |||
231 | u32 stat_GenStat13; | 231 | u32 stat_GenStat13; |
232 | u32 stat_GenStat14; | 232 | u32 stat_GenStat14; |
233 | u32 stat_GenStat15; | 233 | u32 stat_GenStat15; |
234 | u32 stat_FwRxDrop; | ||
234 | }; | 235 | }; |
235 | 236 | ||
236 | 237 | ||
@@ -3481,6 +3482,8 @@ struct l2_fhdr { | |||
3481 | 3482 | ||
3482 | #define BNX2_COM_SCRATCH 0x00120000 | 3483 | #define BNX2_COM_SCRATCH 0x00120000 |
3483 | 3484 | ||
3485 | #define BNX2_FW_RX_DROP_COUNT 0x00120084 | ||
3486 | |||
3484 | 3487 | ||
3485 | /* | 3488 | /* |
3486 | * cp_reg definition | 3489 | * cp_reg definition |
@@ -3747,7 +3750,12 @@ struct l2_fhdr { | |||
3747 | #define DMA_READ_CHANS 5 | 3750 | #define DMA_READ_CHANS 5 |
3748 | #define DMA_WRITE_CHANS 3 | 3751 | #define DMA_WRITE_CHANS 3 |
3749 | 3752 | ||
3750 | #define BCM_PAGE_BITS 12 | 3753 | /* Use CPU native page size up to 16K for the ring sizes. */ |
3754 | #if (PAGE_SHIFT > 14) | ||
3755 | #define BCM_PAGE_BITS 14 | ||
3756 | #else | ||
3757 | #define BCM_PAGE_BITS PAGE_SHIFT | ||
3758 | #endif | ||
3751 | #define BCM_PAGE_SIZE (1 << BCM_PAGE_BITS) | 3759 | #define BCM_PAGE_SIZE (1 << BCM_PAGE_BITS) |
3752 | 3760 | ||
3753 | #define TX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct tx_bd)) | 3761 | #define TX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct tx_bd)) |
@@ -3770,7 +3778,7 @@ struct l2_fhdr { | |||
3770 | 3778 | ||
3771 | #define RX_RING_IDX(x) ((x) & bp->rx_max_ring_idx) | 3779 | #define RX_RING_IDX(x) ((x) & bp->rx_max_ring_idx) |
3772 | 3780 | ||
3773 | #define RX_RING(x) (((x) & ~MAX_RX_DESC_CNT) >> 8) | 3781 | #define RX_RING(x) (((x) & ~MAX_RX_DESC_CNT) >> (BCM_PAGE_BITS - 4)) |
3774 | #define RX_IDX(x) ((x) & MAX_RX_DESC_CNT) | 3782 | #define RX_IDX(x) ((x) & MAX_RX_DESC_CNT) |
3775 | 3783 | ||
3776 | /* Context size. */ | 3784 | /* Context size. */ |
@@ -4048,6 +4056,9 @@ struct bnx2 { | |||
4048 | u32 flash_size; | 4056 | u32 flash_size; |
4049 | 4057 | ||
4050 | int status_stats_size; | 4058 | int status_stats_size; |
4059 | |||
4060 | struct z_stream_s *strm; | ||
4061 | void *gunzip_buf; | ||
4051 | }; | 4062 | }; |
4052 | 4063 | ||
4053 | static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset); | 4064 | static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset); |
diff --git a/drivers/net/bnx2_fw.h b/drivers/net/bnx2_fw.h index 8158974c35a8..2d753dca0d75 100644 --- a/drivers/net/bnx2_fw.h +++ b/drivers/net/bnx2_fw.h | |||
@@ -7,7 +7,7 @@ | |||
7 | * the Free Software Foundation, except as noted below. | 7 | * the Free Software Foundation, except as noted below. |
8 | * | 8 | * |
9 | * This file contains firmware data derived from proprietary unpublished | 9 | * This file contains firmware data derived from proprietary unpublished |
10 | * source code, Copyright (c) 2004, 2005 Broadcom Corporation. | 10 | * source code, Copyright (c) 2004, 2005, 2006 Broadcom Corporation. |
11 | * | 11 | * |
12 | * Permission is hereby granted for the distribution of this firmware data | 12 | * Permission is hereby granted for the distribution of this firmware data |
13 | * in hexadecimal or equivalent format, provided this copyright notice is | 13 | * in hexadecimal or equivalent format, provided this copyright notice is |
@@ -28,943 +28,641 @@ static const u32 bnx2_COM_b06FwBssAddr = 0x08005860; | |||
28 | static const int bnx2_COM_b06FwBssLen = 0x88; | 28 | static const int bnx2_COM_b06FwBssLen = 0x88; |
29 | static const u32 bnx2_COM_b06FwSbssAddr = 0x08005840; | 29 | static const u32 bnx2_COM_b06FwSbssAddr = 0x08005840; |
30 | static const int bnx2_COM_b06FwSbssLen = 0x1c; | 30 | static const int bnx2_COM_b06FwSbssLen = 0x1c; |
31 | static u32 bnx2_COM_b06FwText[(0x57bc/4) + 1] = { | 31 | static u8 bnx2_COM_b06FwText[] = { |
32 | 0x0a00022d, 0x00000000, 0x00000000, 0x0000000d, 0x636f6d20, 0x322e352e, | 32 | 0x1f, 0x8b, 0x08, 0x08, 0x09, 0x83, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65, |
33 | 0x38000000, 0x02050802, 0x00000000, 0x00000003, 0x00000014, 0x00000032, | 33 | 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xec, 0x5b, 0x7d, 0x6c, |
34 | 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 34 | 0x5b, 0xd7, 0x75, 0x3f, 0xef, 0xf1, 0x51, 0x7a, 0x96, 0x68, 0xf9, 0x99, |
35 | 0x00000010, 0x000003e8, 0x0000ea60, 0x00000001, 0x00000000, 0x00000000, | 35 | 0x7e, 0x96, 0x59, 0x4f, 0xb1, 0x49, 0xf1, 0xc9, 0xd2, 0x62, 0x2d, 0x63, |
36 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 36 | 0x34, 0x35, 0xd1, 0x3a, 0x26, 0x66, 0x48, 0xda, 0x71, 0x36, 0x67, 0xa0, |
37 | 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 37 | 0x1d, 0x05, 0x51, 0x51, 0xaf, 0xd0, 0x48, 0xd9, 0xcd, 0xb2, 0x0c, 0x73, |
38 | 0x00000000, 0x00000000, 0x00000002, 0x00000020, 0x00000000, 0x00000000, | 38 | 0x96, 0xb4, 0x70, 0xbc, 0xb4, 0xa1, 0x25, 0x79, 0xf5, 0x06, 0x45, 0xcf, |
39 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 39 | 0xb3, 0x34, 0x39, 0xc0, 0x82, 0x41, 0x10, 0x9d, 0x3a, 0x7f, 0x30, 0xa5, |
40 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 40 | 0xed, 0x7c, 0x19, 0xe8, 0x12, 0x29, 0xb2, 0x93, 0xb5, 0x43, 0xd0, 0xa6, |
41 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 41 | 0x68, 0xff, 0xe8, 0x8a, 0x6e, 0x30, 0x52, 0x0c, 0xf3, 0x3a, 0xa0, 0x30, |
42 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 42 | 0xfa, 0xc7, 0xe6, 0x2d, 0x1f, 0xdc, 0xef, 0xdc, 0x77, 0x1f, 0xf9, 0x48, |
43 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 43 | 0x51, 0x96, 0x1c, 0x34, 0x5d, 0xb7, 0x99, 0x80, 0xf0, 0xde, 0xbd, 0xf7, |
44 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 44 | 0xbc, 0x7b, 0xcf, 0x3d, 0xdf, 0xe7, 0xdc, 0xab, 0x5f, 0x53, 0xa9, 0x85, |
45 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 45 | 0xe4, 0x6f, 0x2d, 0xfe, 0xc2, 0x7f, 0xf4, 0xc7, 0xb9, 0xdb, 0x3e, 0x7d, |
46 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 46 | 0x5b, 0x1f, 0x5e, 0x07, 0x54, 0xdd, 0xaf, 0x72, 0xbf, 0x0f, 0x7f, 0x26, |
47 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 47 | 0xfe, 0xfa, 0xe4, 0x7b, 0xa3, 0x9f, 0x81, 0xbf, 0x2b, 0x18, 0x1c, 0xfe, |
48 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 48 | 0x09, 0x91, 0xb2, 0x0c, 0x8c, 0xf7, 0x57, 0x2e, 0x5f, 0x7f, 0x9c, 0x17, |
49 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 49 | 0x0e, 0xaf, 0x62, 0x9e, 0x9b, 0xbf, 0x9b, 0xbf, 0x9b, 0xbf, 0x9b, 0xbf, |
50 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 50 | 0x9b, 0xbf, 0x9b, 0xbf, 0x9b, 0xbf, 0xff, 0x3f, 0x3f, 0x9f, 0x13, 0x72, |
51 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 51 | 0x88, 0x98, 0x85, 0xff, 0x48, 0x57, 0xe3, 0x89, 0xa1, 0xa4, 0x45, 0xba, |
52 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 52 | 0x2f, 0x7e, 0x65, 0x28, 0x67, 0x11, 0x25, 0x8a, 0xdb, 0xc3, 0x29, 0xfa, |
53 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 53 | 0xb0, 0x9c, 0x37, 0x35, 0xe2, 0xfe, 0x5b, 0xe2, 0x1f, 0x3c, 0xfd, 0xfa, |
54 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 54 | 0x9d, 0x91, 0xab, 0xb3, 0x3e, 0xd2, 0x8d, 0xf8, 0xcb, 0xba, 0xb1, 0x8d, |
55 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 55 | 0xf4, 0x0e, 0x7c, 0xf3, 0x5c, 0xf7, 0x7f, 0xa8, 0xd4, 0xe6, 0xce, 0x75, |
56 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 56 | 0xa5, 0xfc, 0x7a, 0x37, 0xe5, 0x37, 0xc7, 0x75, 0x52, 0xe3, 0x5d, 0x3f, |
57 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 57 | 0x48, 0xfa, 0x8c, 0x61, 0x5f, 0xdc, 0xa0, 0xf9, 0x12, 0x65, 0x0e, 0x4c, |
58 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 58 | 0xf0, 0x1a, 0xb1, 0x75, 0xf7, 0x62, 0x2e, 0x2d, 0x3e, 0x3c, 0xf4, 0x67, |
59 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 59 | 0xd6, 0xd3, 0x65, 0xd5, 0xb2, 0x7a, 0xe6, 0x28, 0x30, 0xf0, 0x7c, 0x3f, |
60 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 60 | 0xc6, 0x8b, 0x91, 0x1e, 0xa2, 0x3b, 0x49, 0xb5, 0xf2, 0x01, 0x9f, 0xa5, |
61 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 61 | 0x53, 0xb2, 0x64, 0x51, 0xaa, 0x44, 0xf4, 0x77, 0x45, 0x85, 0x9e, 0xb7, |
62 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 62 | 0xda, 0x69, 0xae, 0xf7, 0x83, 0x72, 0x02, 0xb8, 0xbc, 0x6d, 0x0d, 0x0f, |
63 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 63 | 0x8d, 0x5b, 0x3c, 0x57, 0x7c, 0x9d, 0x83, 0x6f, 0x6f, 0x5b, 0xce, 0xd2, |
64 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 64 | 0x68, 0xb4, 0xc8, 0x7d, 0xbd, 0x2d, 0xdc, 0xe7, 0x8f, 0x3f, 0x1c, 0x7c, |
65 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 65 | 0xde, 0x0a, 0xc8, 0xbe, 0x1f, 0xa5, 0x92, 0x98, 0x6f, 0xac, 0xc8, 0xb0, |
66 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 66 | 0xcf, 0xde, 0x91, 0xb3, 0x4c, 0xd9, 0x6f, 0xc5, 0x93, 0x56, 0x08, 0xfd, |
67 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 67 | 0x1d, 0x72, 0x2c, 0xbd, 0x2e, 0x67, 0x59, 0x72, 0xac, 0x88, 0x6f, 0x7a, |
68 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 68 | 0x65, 0xff, 0x3b, 0xa9, 0x9c, 0x15, 0x93, 0xfd, 0x57, 0x93, 0x49, 0xab, |
69 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 69 | 0x5f, 0xf6, 0x1f, 0xbe, 0x2b, 0x67, 0xc5, 0x65, 0xff, 0xf7, 0x81, 0x8b, |
70 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 70 | 0x41, 0xc7, 0x8a, 0x61, 0xfc, 0x25, 0x30, 0xfe, 0x9a, 0x41, 0x6d, 0x19, |
71 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 71 | 0x8c, 0x61, 0xef, 0xb6, 0x4e, 0x97, 0x7d, 0x21, 0x7a, 0xbd, 0xfb, 0x32, |
72 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 72 | 0x68, 0x63, 0xd0, 0xd9, 0x12, 0x29, 0x99, 0xee, 0x10, 0x68, 0x62, 0xd2, |
73 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 73 | 0xb9, 0x52, 0x2b, 0xf9, 0x4e, 0xfa, 0xb0, 0xe7, 0xcf, 0x51, 0xd6, 0xd4, |
74 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 74 | 0x69, 0xfd, 0x8c, 0x42, 0x9d, 0x7d, 0x6b, 0x28, 0x61, 0xe4, 0x29, 0xd5, |
75 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 75 | 0x8d, 0x28, 0x6e, 0xd2, 0x24, 0x6d, 0x66, 0x71, 0xbd, 0x8a, 0x1e, 0x95, |
76 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 76 | 0x22, 0xa1, 0x2c, 0x28, 0x3c, 0x72, 0xfa, 0x5d, 0x8e, 0x39, 0xb1, 0x26, |
77 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 77 | 0xff, 0x85, 0x29, 0x35, 0x71, 0x2b, 0x0d, 0x1b, 0x8c, 0x0f, 0x80, 0x05, |
78 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 78 | 0x1f, 0x74, 0x25, 0x79, 0x2a, 0x44, 0xc7, 0xec, 0x80, 0x92, 0x3a, 0x75, |
79 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 79 | 0x37, 0x25, 0x63, 0x64, 0xaa, 0xd4, 0x25, 0xbe, 0x2d, 0x14, 0x43, 0x34, |
80 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 80 | 0x6e, 0x93, 0x92, 0xb4, 0x99, 0x5e, 0xed, 0x18, 0x6f, 0x13, 0xb0, 0xe8, |
81 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 81 | 0xeb, 0xf0, 0x51, 0x97, 0x91, 0x22, 0x9d, 0x71, 0x46, 0x7f, 0x50, 0x49, |
82 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 82 | 0x8b, 0x39, 0x44, 0x7f, 0x78, 0x8c, 0x02, 0x74, 0xba, 0x68, 0x4a, 0xd8, |
83 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 83 | 0x72, 0x39, 0x19, 0x33, 0x00, 0x07, 0xda, 0xd9, 0x26, 0x0d, 0xe3, 0x39, |
84 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 84 | 0x6a, 0xf3, 0xfa, 0x21, 0xc8, 0xcc, 0xb7, 0x87, 0xb2, 0xd3, 0x62, 0xbe, |
85 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 85 | 0xb0, 0x2f, 0xce, 0xf3, 0x75, 0x00, 0xee, 0x1d, 0xe0, 0xa5, 0x90, 0x26, |
86 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 86 | 0x78, 0x95, 0xa0, 0xec, 0x84, 0x02, 0x79, 0xc2, 0x53, 0xd0, 0x2d, 0x0d, |
87 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 87 | 0xfc, 0x35, 0xb2, 0xfa, 0x14, 0xca, 0x59, 0x9b, 0x28, 0x6f, 0xa0, 0x5d, |
88 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 88 | 0xbc, 0xa0, 0x26, 0xed, 0x66, 0x4a, 0x69, 0x61, 0xec, 0x5f, 0xc8, 0x0a, |
89 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 89 | 0x8d, 0xe1, 0x1b, 0xd5, 0x62, 0x98, 0x9f, 0x61, 0xef, 0xc3, 0x82, 0xfe, |
90 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 90 | 0x4d, 0xf1, 0xfd, 0x74, 0x69, 0x22, 0xaf, 0x26, 0x4b, 0xed, 0xe4, 0x9b, |
91 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 91 | 0x89, 0x40, 0x9a, 0xc7, 0xd5, 0xd4, 0x19, 0x8d, 0xfc, 0x93, 0x0a, 0x41, |
92 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 92 | 0x3e, 0x0c, 0x5f, 0xfc, 0xb8, 0xba, 0xb3, 0x74, 0x41, 0x4d, 0x95, 0xf8, |
93 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 93 | 0x1b, 0xc0, 0x16, 0x55, 0xd0, 0x96, 0xdf, 0xb7, 0x83, 0x96, 0x34, 0xac, |
94 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 94 | 0xc6, 0x75, 0x3d, 0x51, 0x64, 0x99, 0xe5, 0x6f, 0xc1, 0x0f, 0xec, 0xe5, |
95 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 95 | 0x9c, 0x0d, 0xfe, 0x08, 0x7e, 0x85, 0xc1, 0xaf, 0x6f, 0x82, 0x5f, 0xfd, |
96 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 96 | 0xe0, 0x53, 0x8c, 0xde, 0x28, 0xf5, 0xd2, 0x6b, 0xa5, 0x1e, 0x7a, 0x15, |
97 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 97 | 0x32, 0xf9, 0x4a, 0x29, 0x4c, 0x2f, 0x97, 0x3a, 0xe8, 0xa5, 0x52, 0x88, |
98 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 98 | 0xce, 0x0b, 0x1e, 0xa6, 0x21, 0xff, 0x82, 0xaf, 0xfa, 0x26, 0xf0, 0xa4, |
99 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 99 | 0x1d, 0x3c, 0x59, 0x0f, 0x79, 0xd9, 0x08, 0xf9, 0x9b, 0xee, 0xd6, 0x69, |
100 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 100 | 0xaa, 0x9b, 0x12, 0x41, 0xf4, 0x6f, 0x89, 0x6b, 0x82, 0x4e, 0x1a, 0xc6, |
101 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 101 | 0xc7, 0x26, 0xfc, 0x94, 0x32, 0x4e, 0xd3, 0x7b, 0x93, 0x1a, 0x8d, 0x95, |
102 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 102 | 0xa6, 0x36, 0x3a, 0x7c, 0xe3, 0xf6, 0x2c, 0x5d, 0x44, 0x5f, 0xca, 0x98, |
103 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 103 | 0xa5, 0x4b, 0xdb, 0x54, 0x1a, 0x9d, 0xfe, 0x1b, 0x4a, 0x9e, 0x39, 0x4d, |
104 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 104 | 0x3f, 0xfe, 0x3a, 0x51, 0x06, 0x34, 0x51, 0xfb, 0x7e, 0x5a, 0x4e, 0x18, |
105 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 105 | 0xa0, 0x45, 0x5f, 0xaf, 0x90, 0x08, 0xb5, 0x8f, 0x79, 0x19, 0x86, 0xae, |
106 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 106 | 0x68, 0x4a, 0xca, 0x7e, 0x01, 0xfa, 0xd2, 0xaa, 0x24, 0xa7, 0x88, 0x72, |
107 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 107 | 0x53, 0x65, 0xca, 0xc5, 0xfc, 0xf4, 0x98, 0x51, 0xa6, 0x74, 0xac, 0x89, |
108 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 108 | 0xbe, 0x68, 0xb4, 0xd3, 0x68, 0xef, 0x6f, 0xf8, 0xdc, 0x5c, 0x65, 0xba, |
109 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 109 | 0xd4, 0x8f, 0x77, 0xee, 0x23, 0x9a, 0x12, 0xef, 0x4e, 0x7f, 0xbe, 0xe4, |
110 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 110 | 0xa7, 0x84, 0x99, 0x0f, 0x69, 0xf4, 0x8e, 0xcf, 0xc1, 0x29, 0xe1, 0x8e, |
111 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 111 | 0x81, 0x57, 0xc3, 0xb0, 0x0f, 0x8e, 0x0c, 0x66, 0x27, 0xd6, 0x5c, 0x4b, |
112 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 112 | 0x88, 0x6e, 0xc0, 0x0b, 0xd9, 0xd3, 0x18, 0x8f, 0x61, 0x25, 0x6e, 0x52, |
113 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 113 | 0xa7, 0xd0, 0x8d, 0x7e, 0xc0, 0x0c, 0x28, 0xfb, 0x4a, 0xcc, 0x6b, 0xbc, |
114 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 114 | 0x17, 0x19, 0xd7, 0xcd, 0x80, 0xd5, 0xf0, 0x4c, 0x48, 0x9c, 0xbd, 0x78, |
115 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 115 | 0xf2, 0x5c, 0x8c, 0x27, 0x3f, 0x7f, 0xcf, 0x83, 0xe7, 0xe7, 0x2b, 0xef, |
116 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 116 | 0x53, 0x9e, 0xf7, 0x7c, 0xe9, 0x4f, 0x03, 0x0e, 0x7e, 0x4c, 0xcf, 0x01, |
117 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 117 | 0x1a, 0x9d, 0x38, 0x2c, 0xd7, 0xc2, 0x7b, 0x91, 0xd7, 0x38, 0x0d, 0x3a, |
118 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 118 | 0x09, 0xc8, 0x15, 0xd6, 0x3a, 0xec, 0x59, 0xeb, 0x49, 0xcf, 0x5a, 0x4f, |
119 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 119 | 0x7a, 0xd6, 0xca, 0x83, 0xb6, 0xb4, 0x4e, 0xb5, 0xfc, 0xd0, 0x51, 0xee, |
120 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 120 | 0x39, 0x8e, 0x39, 0x9f, 0x03, 0x5f, 0xbe, 0x0a, 0x98, 0x38, 0x2d, 0xda, |
121 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 121 | 0xa0, 0xc7, 0x94, 0x46, 0x7b, 0x4d, 0x7e, 0x7f, 0xb1, 0xd5, 0xc1, 0x8b, |
122 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 122 | 0xdf, 0x2f, 0x48, 0x9c, 0x5a, 0x1d, 0xb8, 0xd2, 0x15, 0xa1, 0xff, 0xf3, |
123 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 123 | 0x25, 0xd6, 0x4f, 0x8a, 0xf9, 0x2c, 0x3a, 0x94, 0x8e, 0xb5, 0xd3, 0x98, |
124 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 124 | 0xa1, 0xc4, 0x46, 0x7b, 0x9a, 0x99, 0x8e, 0x09, 0xd5, 0x6a, 0x85, 0x0e, |
125 | 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c020800, 0x24425840, | 125 | 0x50, 0x58, 0x65, 0xdb, 0x25, 0xf0, 0x7b, 0x49, 0xe2, 0x61, 0x70, 0x3b, |
126 | 0x3c030800, 0x246358e8, 0xac400000, 0x0043202b, 0x1480fffd, 0x24420004, | 126 | 0xa3, 0x5a, 0xc1, 0xba, 0x7e, 0x96, 0xdf, 0x57, 0xf0, 0xce, 0x32, 0x9c, |
127 | 0x3c1d0800, 0x37bd7ffc, 0x03a0f021, 0x3c100800, 0x261008b4, 0x3c1c0800, | 127 | 0xd4, 0x9c, 0xb5, 0x5f, 0x45, 0x9b, 0xed, 0xce, 0x66, 0xd9, 0x76, 0xc7, |
128 | 0x279c5840, 0x0e0002f7, 0x00000000, 0x0000000d, 0x27bdffe8, 0x3c1a8000, | 128 | 0xff, 0xa0, 0xa9, 0xb6, 0xfd, 0x05, 0xb3, 0xb6, 0xed, 0xea, 0x82, 0xd7, |
129 | 0x3c020008, 0x0342d825, 0x3c036010, 0xafbf0010, 0x8c655000, 0x3c020800, | 129 | 0x66, 0xf1, 0xde, 0xc2, 0xe4, 0xb3, 0x58, 0x8e, 0xfc, 0xc0, 0x35, 0x06, |
130 | 0x24470f30, 0x3c040800, 0x24865860, 0x2402ff7f, 0x00a22824, 0x34a5380c, | 130 | 0x3d, 0x6c, 0x96, 0x38, 0x7c, 0x4b, 0xe2, 0x00, 0x5c, 0x01, 0x37, 0x5a, |
131 | 0xac655000, 0x00002821, 0x24020037, 0x24030c80, 0xaf420008, 0xaf430024, | 131 | 0xe2, 0x6f, 0x04, 0x4b, 0xea, 0xda, 0x4c, 0x43, 0xf7, 0x7d, 0xad, 0x18, |
132 | 0xacc70000, 0x24a50001, 0x2ca20016, 0x1440fffc, 0x24c60004, 0x24845860, | 132 | 0xbf, 0xec, 0xe3, 0x75, 0xdc, 0x27, 0x29, 0x69, 0xe8, 0xc9, 0xd8, 0xb4, |
133 | 0x3c020800, 0x24420f3c, 0x3c030800, 0x24630e2c, 0xac820004, 0x3c020800, | 133 | 0x46, 0xd9, 0xd8, 0x26, 0x21, 0xd7, 0xd9, 0x58, 0xd5, 0x06, 0x8c, 0x4e, |
134 | 0x24420a2c, 0x3c050800, 0x24a51268, 0xac82000c, 0x3c020800, 0x244243dc, | 134 | 0xd4, 0xdb, 0x00, 0xfe, 0x8e, 0x6d, 0x80, 0xa3, 0xfb, 0x63, 0xd3, 0x6c, |
135 | 0xac830008, 0x3c030800, 0x24633698, 0xac820014, 0x3c020800, 0x24423c24, | 135 | 0x0b, 0x1c, 0xdd, 0x3f, 0x36, 0xc1, 0x36, 0x41, 0xcc, 0x09, 0xfd, 0x67, |
136 | 0xac830018, 0xac83001c, 0x3c030800, 0x24630f44, 0xac820024, 0x3c020800, | 136 | 0x3b, 0xe0, 0xda, 0x00, 0xfe, 0x86, 0x6d, 0x80, 0x0f, 0xf2, 0xcd, 0xf3, |
137 | 0x244243ac, 0xac83002c, 0x3c030800, 0x246343cc, 0xac820030, 0x3c020800, | 137 | 0xb9, 0x6b, 0x8f, 0xd7, 0xcd, 0x3b, 0xce, 0xb6, 0x45, 0xd9, 0xd9, 0xcd, |
138 | 0x244242f0, 0xac830034, 0x3c030800, 0x24633d78, 0xac82003c, 0x3c020800, | 138 | 0x30, 0xc7, 0xb1, 0x76, 0x80, 0x0a, 0xd3, 0xcc, 0xc3, 0x48, 0xe8, 0x08, |
139 | 0x24420fd4, 0xac850010, 0xac850020, 0xac830040, 0x0e0010b7, 0xac820050, | 139 | 0x1d, 0x17, 0x36, 0xef, 0xf4, 0x04, 0x25, 0x0e, 0x9e, 0x18, 0xa0, 0x34, |
140 | 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffe0, 0xafb00010, 0x27500100, | 140 | 0x6c, 0xc0, 0xdc, 0xc4, 0xb5, 0x32, 0xf8, 0x78, 0x47, 0x13, 0x59, 0xb0, |
141 | 0xafbf0018, 0xafb10014, 0x9203000b, 0x24020003, 0x1462005b, 0x96110008, | 141 | 0x75, 0xf0, 0x93, 0xfd, 0x7e, 0xf2, 0xc5, 0xe3, 0x90, 0xb7, 0x98, 0xf0, |
142 | 0x32220001, 0x10400009, 0x27430080, 0x8e020000, 0x96040014, 0x000211c2, | 142 | 0x5d, 0xd5, 0x9f, 0xa6, 0xed, 0xaa, 0x69, 0x37, 0xc1, 0x3f, 0x62, 0xde, |
143 | 0x00021040, 0x00621821, 0xa4640000, 0x0a0002d0, 0x3c020800, 0x3c020800, | 143 | 0xfe, 0x98, 0x90, 0x4d, 0xef, 0x2f, 0x09, 0x1b, 0x94, 0x8c, 0x7d, 0x08, |
144 | 0x8c430020, 0x1060002a, 0x3c030800, 0x0e00148e, 0x00000000, 0x97420108, | 144 | 0xf9, 0x75, 0x69, 0xe4, 0xea, 0x1f, 0xdb, 0xfa, 0x2b, 0x1e, 0x1f, 0xb2, |
145 | 0x8f850018, 0x9743010c, 0x3042003e, 0x00021400, 0x00621825, 0xaca30000, | 145 | 0x05, 0x76, 0xdf, 0x84, 0x3c, 0xb9, 0x76, 0x9f, 0xed, 0x71, 0x88, 0x6d, |
146 | 0x8f840018, 0x8f420100, 0xac820004, 0x97430116, 0x9742010e, 0x8f840018, | 146 | 0x26, 0xf4, 0x8d, 0x6d, 0x70, 0x80, 0xd4, 0x19, 0x4d, 0xda, 0x69, 0x5d, |
147 | 0x00031c00, 0x00431025, 0xac820008, 0x97430110, 0x97440112, 0x8f850018, | 147 | 0xda, 0xe9, 0x00, 0x6c, 0x34, 0xb7, 0x0d, 0xd9, 0x36, 0x45, 0x1b, 0xf6, |
148 | 0x00031c00, 0x00832025, 0xaca4000c, 0x97420114, 0x8f840018, 0x3042ffff, | 148 | 0x1a, 0xf6, 0x70, 0x77, 0x3a, 0x35, 0xc1, 0xfe, 0x10, 0xbe, 0x7b, 0x86, |
149 | 0xac820010, 0x8f830018, 0xac600014, 0x8f820018, 0x3c030800, 0xac400018, | 149 | 0x75, 0xf8, 0xdb, 0x43, 0x23, 0xd3, 0xc2, 0x07, 0xb0, 0xff, 0x80, 0x65, |
150 | 0x946258ce, 0x8f840018, 0x3c032000, 0x00431025, 0xac82001c, 0x0e0014cc, | 150 | 0x66, 0x1b, 0xce, 0xb6, 0x1c, 0xfb, 0x2e, 0x62, 0xdd, 0x8a, 0xad, 0x64, |
151 | 0x24040001, 0x3c030800, 0x8c620040, 0x24420001, 0xac620040, 0x3c020800, | 151 | 0x39, 0xf1, 0xe2, 0xc5, 0x38, 0xad, 0x21, 0xf5, 0xa4, 0x43, 0x6b, 0x35, |
152 | 0x8c430044, 0x32240004, 0x24630001, 0x10800017, 0xac430044, 0x8f4202b8, | 152 | 0xfe, 0xa8, 0x46, 0x2d, 0x4c, 0x63, 0xc6, 0x7f, 0x2b, 0x70, 0xe6, 0x7d, |
153 | 0x04430007, 0x8e020020, 0x3c040800, 0x8c830060, 0x24020001, 0x24630001, | 153 | 0xfd, 0x4f, 0xe0, 0xcc, 0xeb, 0xd6, 0xe3, 0x4d, 0x7a, 0x6b, 0xfc, 0xac, |
154 | 0x0a0002f2, 0xac830060, 0x3c060800, 0x8cc4005c, 0xaf420280, 0x96030016, | 154 | 0xfe, 0xf0, 0x33, 0xa4, 0x37, 0xc7, 0xcf, 0xd2, 0xbf, 0x58, 0x74, 0x9f, |
155 | 0x00001021, 0xa7430284, 0x8e050004, 0x24840001, 0x3c031000, 0xaf450288, | 155 | 0x0e, 0x3f, 0xdb, 0xad, 0xc0, 0xcf, 0x16, 0xa1, 0xef, 0x53, 0x3a, 0x1d, |
156 | 0xaf4302b8, 0x0a0002f2, 0xacc4005c, 0x32220002, 0x0a0002f2, 0x0002102b, | 156 | 0x3c, 0x15, 0xc9, 0xfc, 0x2b, 0x45, 0x61, 0x3f, 0x76, 0xd0, 0xc8, 0x94, |
157 | 0x3c026000, 0xac400808, 0x0000000d, 0x00001021, 0x8fbf0018, 0x8fb10014, | 157 | 0x42, 0x7a, 0x17, 0xb5, 0xc3, 0x7f, 0xf4, 0x37, 0x61, 0xfe, 0x5d, 0x44, |
158 | 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffc8, 0xafbf0034, 0xafbe0030, | 158 | 0x9b, 0x1d, 0xbf, 0xd9, 0x15, 0x1e, 0x05, 0xff, 0xd3, 0x2f, 0x7e, 0x05, |
159 | 0xafb7002c, 0xafb60028, 0xafb50024, 0xafb40020, 0xafb3001c, 0xafb20018, | 159 | 0xdf, 0x3c, 0x4d, 0x07, 0xa7, 0x0e, 0x2b, 0x39, 0xfb, 0x08, 0xe0, 0x97, |
160 | 0xafb10014, 0x0e000244, 0xafb00010, 0x3c170800, 0x3c160800, 0x24110020, | 160 | 0x83, 0xd5, 0x01, 0x9b, 0x07, 0xec, 0x97, 0x31, 0xef, 0xd3, 0xa4, 0xdf, |
161 | 0x24150030, 0x2794000c, 0x27930008, 0x3c124000, 0x3c1e0800, 0x8f820004, | 161 | 0x1e, 0x19, 0x48, 0x28, 0xc0, 0xe3, 0x45, 0x01, 0x2f, 0x7d, 0x71, 0x97, |
162 | 0x3c040800, 0x8c830020, 0x10430005, 0x8ee200a4, 0xaf830004, 0x0e001593, | 162 | 0xb1, 0x53, 0xf0, 0x3f, 0x40, 0xef, 0x15, 0x2f, 0x80, 0xbe, 0xbd, 0xf0, |
163 | 0x00000000, 0x8ee200a4, 0x8ec300a0, 0x10430004, 0x26c400a0, 0x94820002, | 163 | 0x39, 0x91, 0x67, 0x61, 0x93, 0xe1, 0x8f, 0x22, 0x57, 0x31, 0x2d, 0x7c, |
164 | 0xa742009e, 0xaee300a4, 0x8f500000, 0x32020007, 0x1040ffee, 0x32020001, | 164 | 0x11, 0x29, 0x0f, 0x76, 0xa7, 0x41, 0xef, 0x38, 0xfc, 0xd3, 0x00, 0xfc, |
165 | 0x1040002c, 0x32020002, 0x8f420100, 0xaf420020, 0x8f430104, 0xaf4300a8, | 165 | 0x53, 0x0c, 0xbe, 0xa9, 0x07, 0x7e, 0xc9, 0x82, 0x5f, 0x0a, 0x83, 0x1f, |
166 | 0x9342010b, 0x93630000, 0x306300ff, 0x10710005, 0x304400ff, 0x10750006, | 166 | 0x06, 0xcd, 0xc2, 0x47, 0xcd, 0x42, 0xfe, 0xe7, 0x66, 0x48, 0x19, 0x04, |
167 | 0x2c820016, 0x0a000333, 0x00000000, 0xaf940000, 0x0a000334, 0x2c820016, | 167 | 0xad, 0xcf, 0xc1, 0x3f, 0x26, 0x63, 0x77, 0x42, 0xcf, 0x22, 0x17, 0x66, |
168 | 0xaf930000, 0x0a000334, 0x00000000, 0xaf800000, 0x14400005, 0x00041880, | 168 | 0xd5, 0x41, 0xca, 0xc1, 0x9f, 0x77, 0x6e, 0x8b, 0x62, 0xbd, 0x26, 0x4a, |
169 | 0x0e0003cc, 0x00000000, 0x0a000340, 0x00000000, 0x3c020800, 0x24425860, | 169 | 0x84, 0x5c, 0x1d, 0xe5, 0xdf, 0x7e, 0x85, 0xac, 0x7f, 0x06, 0xef, 0x22, |
170 | 0x00621821, 0x8c620000, 0x0040f809, 0x00000000, 0x10400005, 0x3c030800, | 170 | 0x61, 0xa2, 0x3d, 0x94, 0xb5, 0xa3, 0x46, 0xa7, 0xda, 0x03, 0x18, 0x6e, |
171 | 0x8f420104, 0x3c016020, 0xac220014, 0x3c030800, 0x8c620034, 0xaf520138, | 171 | 0x87, 0x95, 0x03, 0x53, 0x11, 0x05, 0xfb, 0x03, 0xcd, 0x27, 0x60, 0xeb, |
172 | 0x24420001, 0xac620034, 0x32020002, 0x1040001a, 0x32020004, 0x8f420140, | 172 | 0xcb, 0x34, 0x1e, 0x63, 0x3d, 0x29, 0xd3, 0xf3, 0xb1, 0xc8, 0x40, 0x9e, |
173 | 0xaf420020, 0x93630000, 0x306300ff, 0x10710005, 0x00000000, 0x10750006, | 173 | 0x5a, 0xe9, 0x98, 0x39, 0x21, 0x7c, 0xbc, 0x16, 0x3f, 0x21, 0x74, 0x2c, |
174 | 0x00000000, 0x0a00035d, 0x00000000, 0xaf940000, 0x0a00035e, 0x00000000, | 174 | 0x67, 0xe1, 0x59, 0xec, 0x54, 0xb2, 0x53, 0xbc, 0x7e, 0x14, 0x5a, 0xee, |
175 | 0xaf930000, 0x0a00035e, 0x00000000, 0xaf800000, 0x0e000c7b, 0x00000000, | 175 | 0xc7, 0x93, 0xe7, 0x07, 0xdd, 0xfa, 0x49, 0x39, 0xd8, 0x9d, 0x87, 0x77, |
176 | 0x3c040800, 0x8c820038, 0xaf520178, 0x24420001, 0xac820038, 0x32020004, | 176 | 0x88, 0x18, 0x8b, 0x58, 0x39, 0x35, 0x11, 0x0d, 0x45, 0x55, 0x8d, 0x86, |
177 | 0x1040ffa4, 0x00000000, 0x8f420180, 0xaf420020, 0x93630000, 0x306300ff, | 177 | 0x35, 0x85, 0x46, 0x61, 0x6f, 0xd2, 0xb1, 0xff, 0x2c, 0x1f, 0x33, 0x79, |
178 | 0x10710005, 0x00000000, 0x10750006, 0x00000000, 0x0a000378, 0x00000000, | 178 | 0xbc, 0x99, 0xbe, 0x2a, 0xfc, 0x0d, 0xd6, 0x2e, 0x4c, 0x63, 0x5d, 0x3f, |
179 | 0xaf940000, 0x0a000379, 0x00000000, 0xaf930000, 0x0a000379, 0x00000000, | 179 | 0xf8, 0xcb, 0xeb, 0xf2, 0x3c, 0x68, 0xc3, 0xf6, 0x6b, 0x56, 0xe4, 0xd9, |
180 | 0xaf800000, 0x8f430180, 0x24020f00, 0x14620005, 0x00000000, 0x8f420188, | 180 | 0x3c, 0xed, 0x00, 0x6d, 0xd9, 0x66, 0xc1, 0x3e, 0x0c, 0x60, 0xed, 0x5e, |
181 | 0xa742009c, 0x0a000387, 0x8fc2003c, 0x93620000, 0x14510004, 0x8fc2003c, | 181 | 0xd8, 0x4f, 0x3c, 0x93, 0xbd, 0x1c, 0x07, 0x05, 0x68, 0xd8, 0x64, 0x79, |
182 | 0x0e000bad, 0x00000000, 0x8fc2003c, 0xaf5201b8, 0x24420001, 0x0a00030b, | 182 | 0xd4, 0xe5, 0x98, 0xe9, 0x19, 0xf3, 0xcb, 0xb1, 0x20, 0xfe, 0xe0, 0x7f, |
183 | 0xafc2003c, 0x27bdffe8, 0xafbf0010, 0x97420108, 0x24033000, 0x30447000, | 183 | 0x4d, 0x96, 0x19, 0x6e, 0x73, 0x4c, 0xc6, 0x34, 0x09, 0xd3, 0xdc, 0x64, |
184 | 0x10830016, 0x28823001, 0x10400007, 0x24024000, 0x1080000b, 0x24022000, | 184 | 0x02, 0x34, 0x8b, 0x9c, 0x4d, 0x10, 0xd3, 0x0c, 0x46, 0x7b, 0x7f, 0x82, |
185 | 0x1082000c, 0x00000000, 0x0a0003b3, 0x00000000, 0x10820010, 0x24025000, | 185 | 0xbe, 0x64, 0xaf, 0xf7, 0x3b, 0xb6, 0xb0, 0x55, 0x49, 0xc1, 0x17, 0xa8, |
186 | 0x10820012, 0x00000000, 0x0a0003b3, 0x00000000, 0x0000000d, 0x0a0003b5, | 186 | 0x56, 0x0b, 0x7c, 0x45, 0x98, 0x5e, 0x15, 0xb0, 0x64, 0xa8, 0xf1, 0x68, |
187 | 0x00001021, 0x0e000442, 0x00000000, 0x0a0003b6, 0x8fbf0010, 0x0e00041a, | 187 | 0xe8, 0x4b, 0x74, 0xab, 0xb0, 0x11, 0x09, 0xc3, 0x4b, 0xe3, 0xff, 0x52, |
188 | 0x00000000, 0x0a0003b5, 0x00001021, 0x0e000669, 0x00000000, 0x0a0003b5, | 188 | 0xc9, 0x72, 0xbf, 0x69, 0xa5, 0xec, 0x20, 0xf3, 0x89, 0xd7, 0x33, 0x68, |
189 | 0x00001021, 0x0e001467, 0x00000000, 0x0a0003b5, 0x00001021, 0x0000000d, | 189 | 0xae, 0xe4, 0xbc, 0xfb, 0x10, 0xa3, 0x16, 0x60, 0x6b, 0xce, 0x4f, 0xaa, |
190 | 0x00001021, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x93620000, 0x24030020, | 190 | 0xf4, 0xf8, 0x1d, 0xf0, 0x65, 0xb1, 0x6d, 0x58, 0xcb, 0xc4, 0x78, 0x1e, |
191 | 0x304400ff, 0x10830005, 0x24020030, 0x10820007, 0x00000000, 0x0a0003c9, | 191 | 0x6d, 0x15, 0x6d, 0xe8, 0x99, 0x11, 0x02, 0x8f, 0xb9, 0x9f, 0xe1, 0x4c, |
192 | 0x00000000, 0x2782000c, 0xaf820000, 0x03e00008, 0x00000000, 0x27820008, | 192 | 0xfc, 0xbd, 0xcf, 0xb1, 0x75, 0x3e, 0xab, 0xde, 0x4a, 0x14, 0x64, 0x7a, |
193 | 0xaf820000, 0x03e00008, 0x00000000, 0xaf800000, 0x03e00008, 0x00000000, | 193 | 0xc5, 0x40, 0x2b, 0xcb, 0x50, 0xd5, 0x6d, 0xc2, 0x5f, 0x3b, 0xb6, 0xc4, |
194 | 0x0000000d, 0x03e00008, 0x00001021, 0x03e00008, 0x00001021, 0x27440100, | 194 | 0x82, 0x2e, 0xc2, 0xe6, 0xf6, 0x79, 0x75, 0x91, 0xe3, 0x09, 0x57, 0x17, |
195 | 0x94830008, 0x30620004, 0x10400017, 0x30620002, 0x8f4202b8, 0x04430007, | 195 | 0x23, 0xa1, 0x84, 0x0a, 0x5b, 0xdc, 0xa7, 0xd1, 0x09, 0xd1, 0x56, 0x28, |
196 | 0x8c820020, 0x3c040800, 0x8c830060, 0x24020001, 0x24630001, 0x03e00008, | 196 | 0x31, 0x18, 0x09, 0x2d, 0xa8, 0x1c, 0x4b, 0x33, 0x6c, 0x18, 0xf1, 0x4a, |
197 | 0xac830060, 0xaf420280, 0x94830016, 0x3c060800, 0xa7430284, 0x8c850004, | 197 | 0x40, 0xc2, 0x22, 0x9e, 0xb3, 0xdd, 0x98, 0x30, 0x84, 0x7e, 0x53, 0xf4, |
198 | 0x8cc4005c, 0x00001021, 0x3c031000, 0x24840001, 0xaf450288, 0xaf4302b8, | 198 | 0x1f, 0xab, 0xe8, 0xa8, 0x13, 0xff, 0xa9, 0x88, 0x11, 0x0b, 0x88, 0x11, |
199 | 0x03e00008, 0xacc4005c, 0x14400003, 0x3c040800, 0x03e00008, 0x00001021, | 199 | 0x53, 0x42, 0x47, 0x8d, 0x04, 0x72, 0x04, 0xd0, 0xdc, 0xd1, 0xcf, 0x42, |
200 | 0x8c830084, 0x24020001, 0x24630001, 0x03e00008, 0xac830084, 0x27450100, | 200 | 0x91, 0x71, 0xc9, 0xb1, 0x5c, 0x0e, 0x00, 0x99, 0x13, 0x8e, 0x7d, 0xa4, |
201 | 0x3c040800, 0x8c820088, 0x94a3000c, 0x24420001, 0x007a1821, 0xac820088, | 201 | 0x3c, 0xc7, 0x91, 0xa3, 0xea, 0x53, 0x34, 0x5c, 0x60, 0x3f, 0x8e, 0x3f, |
202 | 0x8ca40018, 0x90664000, 0xaf440038, 0x8ca2001c, 0x2403fff8, 0x00063600, | 202 | 0x9b, 0x6d, 0x2d, 0xec, 0xa3, 0xf0, 0xc5, 0x51, 0xf0, 0x39, 0x0f, 0x1a, |
203 | 0x00431024, 0x34420004, 0x3c030005, 0xaf42003c, 0xaf430030, 0x00000000, | 203 | 0xac, 0x97, 0x74, 0xdd, 0x4f, 0x07, 0xec, 0x3d, 0xa0, 0x79, 0x9c, 0x46, |
204 | 0x00000000, 0x00000000, 0xaf460404, 0x00000000, 0x00000000, 0x00000000, | 204 | 0x4e, 0x8d, 0xb0, 0xcc, 0xf6, 0x14, 0x28, 0xd2, 0x73, 0x8c, 0xb6, 0x1b, |
205 | 0x3c020006, 0x34420001, 0xaf420030, 0x00000000, 0x00000000, 0x00000000, | 205 | 0x73, 0x2c, 0xdf, 0x83, 0xe5, 0x1d, 0xe0, 0x85, 0xd0, 0x51, 0xc8, 0x20, |
206 | 0x8f420000, 0x30420010, 0x1040fffd, 0x00001021, 0x03e00008, 0x00000000, | 206 | 0x65, 0x0b, 0x23, 0xf4, 0x58, 0x89, 0xfb, 0xf2, 0xa0, 0x1d, 0xe2, 0xda, |
207 | 0x3c020800, 0x8c430020, 0x27bdffe8, 0xafb00010, 0x27500100, 0x1060001e, | 207 | 0xfe, 0xfd, 0x52, 0xce, 0x31, 0x9f, 0xe6, 0xce, 0x37, 0x22, 0xe7, 0x63, |
208 | 0xafbf0014, 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020018, 0xac620000, | 208 | 0x38, 0x86, 0xe1, 0x6f, 0xaa, 0xf3, 0xee, 0x14, 0x3c, 0x8d, 0x18, 0x5d, |
209 | 0x8f840018, 0x9602000c, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, | 209 | 0x6a, 0x79, 0x87, 0x1f, 0xe3, 0xcf, 0xf7, 0xf3, 0x3b, 0xe6, 0x81, 0xef, |
210 | 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac400014, 0x8f840018, | 210 | 0x6f, 0xb6, 0xf6, 0x00, 0x76, 0x10, 0x73, 0xfa, 0xa9, 0xb3, 0xdd, 0xc5, |
211 | 0x3c026000, 0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x946458ce, | 211 | 0x37, 0x81, 0xb5, 0xd9, 0xcf, 0x31, 0x9f, 0x1f, 0xa1, 0xec, 0xa9, 0x7c, |
212 | 0x8f850018, 0x00021400, 0x00441025, 0x24040001, 0x0e0014cc, 0xaca2001c, | 212 | 0x8f, 0x0a, 0x19, 0x9b, 0xcd, 0x28, 0xe4, 0xb7, 0x1e, 0xa6, 0xdc, 0xa9, |
213 | 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafb00010, | 213 | 0xa3, 0x6c, 0x37, 0x40, 0xab, 0x3d, 0xb4, 0x6b, 0x22, 0xd2, 0x73, 0x80, |
214 | 0x27500100, 0xafbf0014, 0x92020009, 0x14400003, 0x3c020800, 0x0a00046c, | 214 | 0x34, 0xb1, 0xce, 0x5b, 0x24, 0xe8, 0x1f, 0x9b, 0x15, 0xbe, 0x20, 0x43, |
215 | 0x24020001, 0x8c430020, 0x1060001f, 0x00001021, 0x0e00148e, 0x00000000, | 215 | 0xe9, 0x89, 0xed, 0xa1, 0x4b, 0xe8, 0x1b, 0x1e, 0x8c, 0x84, 0x17, 0xe8, |
216 | 0x8f830018, 0x8e020018, 0xac620000, 0x8f840018, 0x9602000c, 0xac820004, | 216 | 0x09, 0xd0, 0xe5, 0x23, 0xf8, 0x22, 0xab, 0x67, 0x0c, 0x3a, 0x84, 0x9c, |
217 | 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, | 217 | 0x0a, 0xeb, 0x8f, 0x4a, 0xda, 0xe0, 0xbb, 0xcc, 0x51, 0xd0, 0x8f, 0xf2, |
218 | 0x8f820018, 0xac400014, 0x8f840018, 0x3c026000, 0x8c434448, 0xac830018, | 218 | 0x0e, 0x4d, 0x99, 0x9e, 0x4c, 0xcb, 0xaf, 0xc0, 0xf6, 0x1c, 0x11, 0xb1, |
219 | 0x96020008, 0x3c030800, 0x946458ce, 0x8f850018, 0x00021400, 0x00441025, | 219 | 0x4b, 0x56, 0xd0, 0xee, 0xd2, 0x06, 0x47, 0x0e, 0x60, 0x8b, 0x30, 0xef, |
220 | 0x24040001, 0x0e0014cc, 0xaca2001c, 0x00001021, 0x8fbf0014, 0x8fb00010, | 220 | 0xe5, 0x41, 0x85, 0xb6, 0x20, 0x4e, 0x3f, 0x24, 0x78, 0xeb, 0xa3, 0x7d, |
221 | 0x03e00008, 0x27bd0018, 0x3c0b0800, 0x8d6808b0, 0x3c070800, 0x24e700b0, | 221 | 0x66, 0xd4, 0xd8, 0x47, 0xf3, 0x7e, 0x27, 0x56, 0xc0, 0x3c, 0x3d, 0xf7, |
222 | 0x00084900, 0x01271821, 0xac640000, 0x93620005, 0x97660008, 0x00e95021, | 222 | 0x60, 0x0f, 0x90, 0x53, 0xfb, 0xeb, 0xeb, 0xa8, 0x2d, 0x12, 0x4e, 0xa8, |
223 | 0x93630023, 0x9364003f, 0x25080001, 0x00021600, 0x00063400, 0x00461025, | 223 | 0x09, 0xfa, 0x93, 0xd2, 0xdd, 0xe4, 0xe8, 0x77, 0x2b, 0xdb, 0x7e, 0xf0, |
224 | 0x00031a00, 0x00431025, 0x00822025, 0xad440004, 0x9362007e, 0x9366007f, | 224 | 0xb0, 0xd3, 0x69, 0x5b, 0x78, 0x16, 0x3a, 0xb1, 0x1e, 0xe3, 0xfe, 0xac, |
225 | 0x8f630178, 0x9364007a, 0x00021600, 0x00063400, 0x00461025, 0x00031a00, | 225 | 0xc0, 0x7d, 0x84, 0xba, 0xa1, 0x6b, 0x22, 0x8f, 0x39, 0x51, 0x8b, 0x17, |
226 | 0x00431025, 0x00822025, 0xad440008, 0x93620080, 0x9363007d, 0x3108007f, | 226 | 0xf3, 0xbc, 0x9e, 0xcf, 0x5f, 0xc6, 0x3c, 0xdc, 0xcf, 0x70, 0x78, 0x2f, |
227 | 0x01403821, 0xad6808b0, 0x00021600, 0x00031c00, 0x00431025, 0x00451025, | 227 | 0x3c, 0x41, 0x23, 0x90, 0xc7, 0x5c, 0x7f, 0x57, 0x68, 0x0c, 0xdf, 0xa4, |
228 | 0x03e00008, 0xace2000c, 0x27bdffb8, 0xafb3002c, 0x00009821, 0xafbe0040, | 228 | 0x4a, 0x4d, 0x74, 0x54, 0xe3, 0xf1, 0x48, 0x38, 0xaf, 0x1e, 0x42, 0xdc, |
229 | 0x0000f021, 0xafb50034, 0x27550100, 0xafbf0044, 0xafb7003c, 0xafb60038, | 229 | 0xf3, 0xb8, 0xea, 0xb7, 0x7e, 0xe6, 0x67, 0xbf, 0xe3, 0xb7, 0xae, 0x29, |
230 | 0xafb40030, 0xafb20028, 0xafb10024, 0xafb00020, 0xafa00010, 0xafa00014, | 230 | 0xd5, 0xb9, 0x10, 0x87, 0x8a, 0xdc, 0x60, 0x41, 0x19, 0x2c, 0x5d, 0x52, |
231 | 0x96a20008, 0x8f540100, 0x8eb10018, 0x30420001, 0x10400037, 0x02a0b821, | 231 | 0x92, 0x85, 0x6b, 0x4a, 0xaa, 0xc4, 0x30, 0x8e, 0xce, 0x67, 0xcf, 0x74, |
232 | 0x8f630054, 0x2622ffff, 0x00431023, 0x18400006, 0x00000000, 0x0000000d, | 232 | 0x82, 0x4e, 0x1f, 0x89, 0xef, 0xe6, 0x7a, 0x8f, 0x50, 0xea, 0xd4, 0xad, |
233 | 0x00000000, 0x2400015c, 0x0a0004e5, 0x00002021, 0x8f62004c, 0x02221023, | 233 | 0x94, 0x9e, 0xe6, 0xbc, 0x34, 0x02, 0x7c, 0x3f, 0x2a, 0xe7, 0x62, 0x41, |
234 | 0x18400028, 0x00002021, 0x93650120, 0x93640121, 0x3c030800, 0x8c62008c, | 234 | 0xca, 0x9d, 0xe1, 0x31, 0xb6, 0x5f, 0xd6, 0xd5, 0x45, 0x1f, 0xef, 0x9f, |
235 | 0x308400ff, 0x24420001, 0x30a500ff, 0x00803821, 0x1485000b, 0xac62008c, | 235 | 0xf9, 0x6f, 0x52, 0xc1, 0x7e, 0x53, 0xd2, 0x8f, 0xdf, 0x7d, 0x9c, 0x93, |
236 | 0x3c040800, 0x8c830090, 0x24630001, 0xac830090, 0x93620122, 0x30420001, | 236 | 0xe1, 0xf7, 0x6f, 0x86, 0xd3, 0xb7, 0x95, 0x16, 0x36, 0xdc, 0xc8, 0x3e, |
237 | 0x00021023, 0x30420005, 0x0a0004e5, 0x34440004, 0x27660100, 0x00041080, | 237 | 0x57, 0xb3, 0xc7, 0x47, 0x7d, 0x7e, 0x6b, 0x7b, 0x13, 0xb5, 0x84, 0x80, |
238 | 0x00c21021, 0x8c430000, 0x02231823, 0x04600004, 0x24820001, 0x30440007, | 238 | 0xc3, 0x4a, 0x7b, 0x64, 0x98, 0x5f, 0x87, 0x1c, 0xb0, 0x4d, 0xd9, 0x0d, |
239 | 0x1485fff9, 0x00041080, 0x10870007, 0x3c030800, 0xa3640121, 0x8c620094, | 239 | 0x7e, 0x5a, 0x6c, 0xc3, 0x60, 0x93, 0x76, 0x53, 0xae, 0xc4, 0xb2, 0x1d, |
240 | 0x24040005, 0x24420001, 0x0a0004e5, 0xac620094, 0x24040004, 0x00809821, | 240 | 0x35, 0x32, 0x90, 0xb1, 0x34, 0x75, 0xb1, 0x1e, 0xb9, 0xba, 0x07, 0xdb, |
241 | 0x9362003f, 0x304400ff, 0x38830016, 0x2c630001, 0x38820010, 0x2c420001, | 241 | 0x9d, 0x87, 0xed, 0x46, 0x3c, 0x64, 0x53, 0xbe, 0x29, 0xce, 0x36, 0xbc, |
242 | 0x00621825, 0x1460000c, 0x24020001, 0x38830008, 0x2c630001, 0x38820014, | 242 | 0x0b, 0xb2, 0x85, 0xbe, 0x62, 0x55, 0x17, 0x77, 0x2d, 0xc1, 0x5d, 0x5b, |
243 | 0x2c420001, 0x00621825, 0x14600005, 0x24020001, 0x24020012, 0x14820002, | 243 | 0xc2, 0xa3, 0x02, 0xd5, 0xe2, 0x3f, 0x4b, 0x8c, 0xff, 0x5f, 0x00, 0xff, |
244 | 0x00001021, 0x24020001, 0x10400009, 0x00000000, 0x8ea20020, 0x8f630040, | 244 | 0xcf, 0x01, 0x7f, 0xc6, 0xa9, 0x31, 0xfe, 0x3b, 0x2b, 0xf8, 0x33, 0x0c, |
245 | 0x0040b021, 0x00431023, 0x5c400010, 0x8f760040, 0x0a000511, 0x00000000, | 245 | 0xfc, 0x1c, 0x64, 0xf1, 0x0d, 0xe8, 0xe2, 0x6b, 0x36, 0x7c, 0x9d, 0x0d, |
246 | 0x9343010b, 0x24020004, 0x1462000a, 0x8eb60020, 0x8f630040, 0x3c021000, | 246 | 0xff, 0x67, 0xc3, 0xdf, 0xd9, 0xf0, 0x8b, 0x36, 0x7c, 0x1e, 0xf6, 0x74, |
247 | 0x00761823, 0x0043102a, 0x10400004, 0x00000000, 0x0000000d, 0x00000000, | 247 | 0x0e, 0x36, 0xe9, 0xac, 0x9d, 0x34, 0x58, 0x9f, 0x92, 0x31, 0xf6, 0x9d, |
248 | 0x240002fa, 0x9343010b, 0x24020004, 0x5462000b, 0x96a20008, 0x24020001, | 248 | 0xbb, 0x65, 0xde, 0x1d, 0x92, 0x71, 0xf7, 0xa7, 0x64, 0x2c, 0x7b, 0x00, |
249 | 0xafa20010, 0x96a20008, 0x24030001, 0xafa30018, 0x8eb2001c, 0x36730002, | 249 | 0xb1, 0xec, 0x66, 0x1a, 0xed, 0xe1, 0x9c, 0xa4, 0x05, 0xcf, 0x75, 0x78, |
250 | 0x30420020, 0x0a000526, 0xafa20014, 0x36730080, 0x30420002, 0x10400003, | 250 | 0x22, 0x6e, 0xed, 0x49, 0x48, 0xbd, 0xfc, 0x0c, 0x62, 0x5c, 0xd8, 0xff, |
251 | 0xafa00018, 0x0a000526, 0x8eb2001c, 0x8eb20014, 0x2402fffb, 0x02628024, | 251 | 0x1e, 0xe4, 0x37, 0x19, 0xc4, 0x6a, 0x56, 0x1f, 0xc7, 0xe5, 0xb0, 0x65, |
252 | 0x1200002a, 0x3c030800, 0x8c620030, 0x02021024, 0x10400026, 0x3c020800, | 252 | 0xef, 0x37, 0x39, 0x76, 0xfe, 0x2e, 0x19, 0x03, 0xbb, 0xed, 0x56, 0xc0, |
253 | 0x8c430020, 0x10600024, 0x32620004, 0x0e00148e, 0x00000000, 0x8f830018, | 253 | 0xa4, 0xd1, 0xd7, 0x8a, 0x6f, 0x7e, 0x07, 0xb2, 0xdf, 0x86, 0xf6, 0xce, |
254 | 0x8f420100, 0xac620000, 0x8f840018, 0x02401821, 0x32620002, 0xac900004, | 254 | 0x3a, 0x18, 0xe4, 0xb3, 0x56, 0x16, 0x7d, 0x11, 0xc0, 0xb4, 0x61, 0x9d, |
255 | 0x8f840018, 0x54400001, 0x02c01821, 0xac830008, 0x8f830018, 0x8ee20020, | 255 | 0x0e, 0xb4, 0xf7, 0xa0, 0x7d, 0x8b, 0xb3, 0x8e, 0xf1, 0x2b, 0x68, 0xa7, |
256 | 0xac62000c, 0x8f840018, 0x8f620040, 0xac820010, 0x8f830018, 0x8ee20018, | 256 | 0xea, 0xbe, 0xd9, 0x8a, 0xbe, 0x4c, 0x5d, 0xdf, 0x9b, 0xe8, 0x4b, 0xa2, |
257 | 0xac620014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, | 257 | 0x6f, 0x51, 0x7e, 0x97, 0x47, 0x3b, 0x52, 0x07, 0xb3, 0x88, 0x3e, 0xc6, |
258 | 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010, 0x00621825, 0x0e0014cc, | 258 | 0xf1, 0x5b, 0x78, 0xde, 0x47, 0xa3, 0x19, 0x8e, 0x03, 0xdc, 0xb1, 0xdc, |
259 | 0xaca3001c, 0x32620004, 0x10400063, 0x00003821, 0x3c029000, 0x34420001, | 259 | 0x7a, 0x6a, 0xe3, 0xdc, 0xf7, 0x43, 0x21, 0x3b, 0xf3, 0xd2, 0x46, 0xa7, |
260 | 0x3c038000, 0x02821025, 0xa360007c, 0xaf420020, 0x8f420020, 0x00431024, | 260 | 0x27, 0xd8, 0x4f, 0x8c, 0x20, 0xee, 0xe1, 0x71, 0xe1, 0x9c, 0x3c, 0xfd, |
261 | 0x1440fffd, 0x00000000, 0x93620023, 0x30420080, 0x10400011, 0x00000000, | 261 | 0x1f, 0x00, 0xf6, 0x61, 0x8c, 0x21, 0x56, 0xb7, 0xcb, 0x4d, 0x8d, 0xc7, |
262 | 0x8f65005c, 0x8f63004c, 0x9764003c, 0x8f620064, 0x00a32823, 0x00852821, | 262 | 0x1f, 0xc5, 0xf8, 0x5f, 0xca, 0x6f, 0x2b, 0x73, 0x03, 0xfe, 0x1b, 0x75, |
263 | 0x00a2102b, 0x54400006, 0x3c023fff, 0x93620023, 0x3042007f, 0xa3620023, | 263 | 0x7d, 0x6a, 0xb0, 0xb6, 0xbd, 0xd6, 0xf3, 0xbe, 0x4d, 0x5f, 0xfa, 0xfd, |
264 | 0xaf710064, 0x3c023fff, 0x0a000580, 0x3442ffff, 0x8f62005c, 0x02221023, | 264 | 0x48, 0x1d, 0xfc, 0xef, 0x6e, 0xa8, 0x6d, 0x3f, 0xc5, 0xdf, 0x20, 0x87, |
265 | 0x04400011, 0x00000000, 0x8f65005c, 0x8f630064, 0x9764003c, 0x3c023fff, | 265 | 0x70, 0xdb, 0x09, 0xc8, 0x1d, 0xdb, 0xa4, 0xfa, 0x79, 0x3e, 0x6b, 0xd4, |
266 | 0x3442ffff, 0xaf710064, 0x00a32823, 0x00852821, 0x0045102b, 0x10400004, | 266 | 0xf6, 0x6d, 0x32, 0x6b, 0xdb, 0x1c, 0x27, 0x31, 0x5c, 0x08, 0xf2, 0xde, |
267 | 0x02251021, 0x3c053fff, 0x34a5ffff, 0x02251021, 0xaf62005c, 0x24070001, | 267 | 0xa1, 0xec, 0xb2, 0x7f, 0x13, 0xe3, 0x61, 0xe5, 0x5e, 0xdb, 0x8b, 0x67, |
268 | 0xaf71004c, 0x8f620054, 0x16220005, 0x00000000, 0x93620023, 0x30420040, | 268 | 0x48, 0xe6, 0x46, 0xe1, 0x4a, 0xcc, 0x3b, 0x5f, 0x0a, 0x40, 0xae, 0x3e, |
269 | 0x10400017, 0x24020001, 0x9762006a, 0x00022880, 0x50a00001, 0x24050001, | 269 | 0x0f, 0x9e, 0x73, 0xdc, 0x53, 0xd5, 0xf1, 0xf7, 0x68, 0x39, 0x1d, 0x67, |
270 | 0x97630068, 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804, | 270 | 0x1f, 0xc0, 0x31, 0xfe, 0x36, 0x11, 0x1f, 0xfb, 0xe2, 0x4f, 0x70, 0x0c, |
271 | 0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b, | 271 | 0xf6, 0xb4, 0xe3, 0x5b, 0x2c, 0xf8, 0x43, 0xb4, 0x4b, 0x7e, 0xc7, 0x6e, |
272 | 0x54600001, 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021, | 272 | 0x22, 0x9f, 0xc8, 0x16, 0xd8, 0x9f, 0xb1, 0x0f, 0x89, 0xc0, 0x4e, 0xb3, |
273 | 0xaf62000c, 0x93620082, 0x30420080, 0x50400001, 0xa3600081, 0x3c028000, | 273 | 0x1f, 0xfd, 0x24, 0x7d, 0xc6, 0x5d, 0xcd, 0x6c, 0xfb, 0x34, 0xeb, 0x05, |
274 | 0x34420001, 0x02821025, 0xaf420020, 0x9363007e, 0x9362007a, 0x10620004, | 274 | 0xc4, 0x0b, 0x1c, 0xe7, 0xb1, 0xed, 0xc6, 0x7b, 0xd1, 0x8d, 0x57, 0xee, |
275 | 0x00000000, 0x0e0013c4, 0x00000000, 0x00403821, 0x54e00001, 0x241e0001, | 275 | 0xd7, 0xc8, 0xaa, 0xfa, 0x11, 0x67, 0x8f, 0x5b, 0x59, 0x37, 0x56, 0xb1, |
276 | 0x8f700040, 0x8f620040, 0x14520003, 0x00521023, 0x0a0005bf, 0x00001021, | 276 | 0xef, 0xc6, 0xb6, 0xed, 0xc7, 0x75, 0xb6, 0xe1, 0xb2, 0xb0, 0x0d, 0x0f, |
277 | 0x28420001, 0x10400041, 0x8fa20010, 0x0e000fae, 0x02402021, 0xaf720040, | 277 | 0x6a, 0x7e, 0xeb, 0xf7, 0x9b, 0x1d, 0x79, 0x6d, 0x6c, 0x1b, 0xee, 0xad, |
278 | 0x9362003e, 0x30420001, 0x1440000b, 0x3c029000, 0x93620022, 0x24420001, | 278 | 0xd8, 0x06, 0x57, 0x5e, 0xbd, 0x79, 0xeb, 0x0f, 0xc0, 0x1b, 0x0b, 0xbc, |
279 | 0xa3620022, 0x93630022, 0x3c020800, 0x8c440098, 0x0064182b, 0x14600027, | 279 | 0xa9, 0xaf, 0xd5, 0x70, 0x8e, 0xe2, 0x87, 0x1f, 0xe2, 0x18, 0x91, 0x73, |
280 | 0x3c020800, 0x3c029000, 0x34420001, 0x02821025, 0xaf420020, 0x3c038000, | 280 | 0xd9, 0x18, 0xe5, 0x62, 0x45, 0xc4, 0x6a, 0x91, 0xd9, 0xd9, 0x4a, 0x8e, |
281 | 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, | 281 | 0xf5, 0x35, 0x69, 0xbb, 0x6b, 0xe2, 0x22, 0x7a, 0xbc, 0x78, 0x09, 0xf8, |
282 | 0x34420001, 0xa362007d, 0x8f640074, 0x34630001, 0x02831825, 0xaf430020, | 282 | 0x73, 0xbc, 0xa5, 0x49, 0x1b, 0xc1, 0xfd, 0xe3, 0x12, 0x47, 0x7e, 0xe7, |
283 | 0x04810006, 0x3c038000, 0x02802021, 0x0e000470, 0x24050273, 0x0a0005f2, | 283 | 0x3a, 0x1e, 0x7c, 0x69, 0xf1, 0x47, 0xe0, 0x15, 0xc7, 0x7d, 0x51, 0x27, |
284 | 0x24050001, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, | 284 | 0xde, 0xab, 0x89, 0xa9, 0xd7, 0xf8, 0xc9, 0xe2, 0x78, 0x89, 0x61, 0x74, |
285 | 0xaf5401c0, 0xa34201c4, 0xaf4301f8, 0x24050001, 0x24020001, 0xa7620012, | 285 | 0x19, 0x2f, 0x05, 0x64, 0x5e, 0x63, 0xc8, 0x3c, 0x87, 0x63, 0x6d, 0xae, |
286 | 0xa3600022, 0x0a0005fe, 0x2ca20001, 0x9743007a, 0x9444002a, 0x00002821, | 286 | 0xb1, 0xd6, 0xc7, 0x50, 0x0b, 0x43, 0xc1, 0x6d, 0xcc, 0x13, 0x8e, 0xa1, |
287 | 0x00641821, 0x3063fffe, 0xa7630012, 0x2ca20001, 0x00021023, 0x03c2f024, | 287 | 0xda, 0x28, 0x39, 0xe3, 0xc4, 0x50, 0x4e, 0x9d, 0xcd, 0xcd, 0x71, 0x5c, |
288 | 0x8fa20010, 0x10400004, 0x8fa30014, 0x0e0013c1, 0x00000000, 0x8fa30014, | 288 | 0x5c, 0xd9, 0x0f, 0xef, 0xc0, 0x3e, 0x45, 0x9e, 0x14, 0x74, 0xea, 0x7f, |
289 | 0x10600003, 0x00000000, 0x0e0010eb, 0x00000000, 0x13c0001f, 0x3c029000, | 289 | 0x1a, 0xec, 0xf6, 0x51, 0xf4, 0x8f, 0xba, 0xfd, 0x9e, 0x5c, 0xc3, 0xc5, |
290 | 0x34420001, 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, | 290 | 0x85, 0x7d, 0xbd, 0x1b, 0xd3, 0xed, 0x96, 0x31, 0x1d, 0x62, 0x18, 0xdb, |
291 | 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, | 291 | 0xc9, 0xbb, 0xf6, 0x16, 0x33, 0xe8, 0xe3, 0x75, 0x11, 0x1b, 0x12, 0xc7, |
292 | 0x34630001, 0x02831825, 0xaf430020, 0x04810006, 0x3c038000, 0x02802021, | 292 | 0x49, 0x90, 0xaf, 0xfd, 0x91, 0x50, 0x58, 0xad, 0xc7, 0xab, 0x75, 0xa1, |
293 | 0x0e000470, 0x2405036c, 0x0a00062b, 0x8fa20018, 0x8f4201f8, 0x00431024, | 293 | 0x16, 0xaf, 0x41, 0xf1, 0xdd, 0xf8, 0x92, 0xef, 0x48, 0xc4, 0x92, 0xe3, |
294 | 0x1440fffd, 0x24020002, 0x3c031000, 0xaf5401c0, 0xa34201c4, 0xaf4301f8, | 294 | 0xf6, 0x10, 0xe8, 0xc5, 0xf8, 0xb9, 0xba, 0xe1, 0xc6, 0xc9, 0x8c, 0xd3, |
295 | 0x8fa20018, 0x5040002f, 0x96a20008, 0x8f620048, 0x8f630024, 0x00761821, | 295 | 0x3f, 0x82, 0xc6, 0xbb, 0x15, 0xfe, 0x7e, 0xcc, 0xde, 0x2f, 0xe8, 0x96, |
296 | 0xaf630048, 0x9764003c, 0x00501023, 0x0044102b, 0x10400025, 0x3c029000, | 296 | 0x15, 0xb8, 0x0e, 0x7b, 0x70, 0x1d, 0x91, 0xb8, 0xb2, 0x2e, 0xb0, 0x7e, |
297 | 0x34420001, 0x3c040800, 0x8c830080, 0x8f450100, 0x3c068000, 0x24630001, | 297 | 0x78, 0x6b, 0x9a, 0xa6, 0xd8, 0x1b, 0x70, 0x0e, 0xf3, 0xb9, 0xb9, 0x6a, |
298 | 0x00a21025, 0xac830080, 0xaf420020, 0x8f420020, 0x00461024, 0x1440fffd, | 298 | 0x2d, 0x0c, 0xf9, 0xb6, 0xc1, 0x1f, 0x02, 0xd7, 0xac, 0x88, 0x43, 0x03, |
299 | 0x00000000, 0x9362007d, 0x3c038000, 0x34420004, 0xa362007d, 0x8f640074, | 299 | 0x0b, 0xf5, 0x34, 0x1c, 0xc7, 0x5a, 0x88, 0xdb, 0x81, 0x8f, 0xcb, 0xf3, |
300 | 0x34630001, 0x00a31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021, | 300 | 0x26, 0x89, 0xcf, 0x37, 0xc5, 0xdc, 0x63, 0xa2, 0x06, 0xea, 0xd3, 0x39, |
301 | 0x0e000470, 0x2405038a, 0x0a00065b, 0x96a20008, 0x8f4201f8, 0x00431024, | 301 | 0x77, 0xc9, 0x0a, 0xde, 0x69, 0x92, 0x77, 0x8f, 0x56, 0xf0, 0x73, 0x78, |
302 | 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8, | 302 | 0x1c, 0x90, 0x74, 0xe5, 0xdc, 0x95, 0x75, 0x5a, 0xf0, 0xa7, 0x9d, 0x73, |
303 | 0x96a20008, 0x8fbf0044, 0x8fbe0040, 0x8fb7003c, 0x8fb60038, 0x8fb50034, | 303 | 0xd3, 0x41, 0x6a, 0x14, 0x23, 0x2f, 0x0c, 0xa9, 0xdb, 0x1c, 0x3a, 0x3a, |
304 | 0x8fb40030, 0x8fb3002c, 0x8fb20028, 0x8fb10024, 0x8fb00020, 0x00021042, | 304 | 0x31, 0xf2, 0xda, 0xba, 0x18, 0xf9, 0xb6, 0x20, 0xc7, 0x5a, 0xc3, 0x50, |
305 | 0x30420001, 0x03e00008, 0x27bd0048, 0x27bdffe0, 0xafbf0018, 0x97420108, | 305 | 0x82, 0x79, 0xf8, 0xba, 0x97, 0x6d, 0xc8, 0x36, 0x70, 0x3d, 0x5f, 0x53, |
306 | 0x24030019, 0x304400ff, 0x10830065, 0x2882001a, 0x1040001a, 0x2882000a, | 306 | 0xbb, 0xec, 0x59, 0xa6, 0xd6, 0x1c, 0x20, 0xdf, 0x0c, 0xfb, 0x0e, 0x0b, |
307 | 0x1040000f, 0x28820008, 0x10400040, 0x24020001, 0x1082003a, 0x28820002, | 307 | 0x79, 0x06, 0x91, 0x36, 0xc9, 0x3a, 0xcb, 0xbe, 0xbd, 0x1a, 0x67, 0xcf, |
308 | 0x50400005, 0x24020006, 0x10800032, 0x3c026000, 0x0a0006fb, 0x00000000, | 308 | 0x51, 0xa3, 0x18, 0xfb, 0x46, 0xfd, 0xfa, 0x79, 0xbf, 0xdf, 0x3a, 0xac, |
309 | 0x1082003d, 0x00000000, 0x0a0006fb, 0x00000000, 0x2402000b, 0x10820044, | 309 | 0x3b, 0x36, 0x73, 0x25, 0xbf, 0xee, 0xc2, 0xed, 0x41, 0x9c, 0xad, 0x50, |
310 | 0x2882000b, 0x1440004b, 0x2402000e, 0x10820045, 0x00000000, 0x0a0006fb, | 310 | 0x93, 0x55, 0xc0, 0xfe, 0xde, 0xf0, 0x37, 0x5b, 0xae, 0x2e, 0x06, 0x68, |
311 | 0x00000000, 0x24020020, 0x10820062, 0x28820021, 0x1040000e, 0x2402001c, | 311 | 0xfd, 0xcc, 0x2d, 0x42, 0x1f, 0x8d, 0xc9, 0xaa, 0x3e, 0x8e, 0x82, 0x37, |
312 | 0x1082004c, 0x2882001d, 0x10400005, 0x2402001b, 0x10820043, 0x00000000, | 312 | 0x19, 0xa7, 0x06, 0x60, 0xae, 0xa7, 0xeb, 0xd7, 0x0b, 0xc6, 0xed, 0x37, |
313 | 0x0a0006fb, 0x00000000, 0x2402001f, 0x10820050, 0x00000000, 0x0a0006fb, | 313 | 0xfd, 0xaa, 0xe5, 0xca, 0xc0, 0xf5, 0xf2, 0x91, 0x4f, 0xd5, 0xd1, 0xba, |
314 | 0x00000000, 0x240200c1, 0x10820042, 0x288200c2, 0x10400005, 0x24020080, | 314 | 0x51, 0x4d, 0xf8, 0x2c, 0xe8, 0x1a, 0x47, 0xde, 0x1d, 0x79, 0x81, 0x10, |
315 | 0x10820021, 0x00000000, 0x0a0006fb, 0x00000000, 0x240200c2, 0x1082003d, | 315 | 0x3b, 0x39, 0x79, 0x78, 0x1a, 0xb9, 0x77, 0xe4, 0x02, 0xe7, 0xe3, 0x6e, |
316 | 0x240200c9, 0x50820049, 0xafa00010, 0x0a0006fb, 0x00000000, 0x0e001163, | 316 | 0x7e, 0xfe, 0x6a, 0x29, 0x72, 0x36, 0x8f, 0x9c, 0x79, 0x1e, 0x39, 0xf9, |
317 | 0xac400808, 0x0a0006fd, 0x8fbf0018, 0x3c026000, 0x8c444448, 0x3c030800, | 317 | 0xcb, 0xc8, 0xc9, 0xcf, 0x97, 0x7a, 0x41, 0xff, 0x1e, 0x99, 0x8f, 0xb3, |
318 | 0xac640064, 0x0e001163, 0x00000000, 0x3c026000, 0x8c444448, 0x3c030800, | 318 | 0x8e, 0x99, 0x74, 0x11, 0xb9, 0xd3, 0x77, 0x67, 0xd8, 0x46, 0x74, 0xd1, |
319 | 0x0a0006fc, 0xac640068, 0x8f440100, 0x0e0006ff, 0x00000000, 0x3c026000, | 319 | 0x3d, 0xc8, 0x35, 0xbe, 0x3f, 0xa9, 0x68, 0x9d, 0x7d, 0x01, 0x5f, 0xc2, |
320 | 0x8c444448, 0x3c030800, 0x0a0006fc, 0xac64006c, 0x0e001191, 0x00000000, | 320 | 0xb8, 0x91, 0x38, 0x71, 0x29, 0x4f, 0x1a, 0xc7, 0x8a, 0x23, 0x4d, 0x7e, |
321 | 0x0a0006fd, 0x8fbf0018, 0x8f440100, 0x0e0011bb, 0x00000000, 0x0a0006fd, | 321 | 0x6b, 0xae, 0x95, 0x5a, 0xf6, 0x2c, 0xcb, 0x93, 0x6a, 0xac, 0xe8, 0xc2, |
322 | 0x8fbf0018, 0x0e001202, 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0000000d, | 322 | 0x19, 0xd4, 0xd9, 0xf7, 0x87, 0x9c, 0xdb, 0xc4, 0x48, 0xe4, 0xd3, 0xeb, |
323 | 0x0a0006fd, 0x8fbf0018, 0x0e000826, 0x00000000, 0x0a0006fd, 0x8fbf0018, | 323 | 0xe8, 0xed, 0x93, 0x65, 0xda, 0x19, 0xbb, 0x56, 0xbe, 0x68, 0xad, 0xa3, |
324 | 0x8f440100, 0x0e001264, 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0e00134e, | 324 | 0x6c, 0xef, 0x43, 0x32, 0x97, 0x5c, 0x78, 0x28, 0x69, 0xe5, 0x43, 0x3e, |
325 | 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0e00087c, 0x27440100, 0x0a0006fd, | 325 | 0xf7, 0x7c, 0x62, 0x42, 0x47, 0x84, 0xc8, 0xbf, 0x20, 0xcd, 0x0d, 0x20, |
326 | 0x8fbf0018, 0x8f640040, 0x0e000fae, 0x00000000, 0x0a0006fd, 0x8fbf0018, | 326 | 0x71, 0x6e, 0xd9, 0xfe, 0x02, 0x1f, 0x10, 0xb1, 0x6d, 0x9c, 0x33, 0x03, |
327 | 0x8f440100, 0x0e001059, 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0e001417, | 327 | 0xa2, 0xd6, 0xb6, 0xd1, 0xe2, 0x7e, 0x03, 0xfc, 0xbe, 0x8f, 0xe6, 0x90, |
328 | 0x00000000, 0x0a0006fd, 0x8fbf0018, 0xafa00014, 0x8f440100, 0x8f450118, | 328 | 0x43, 0x14, 0x44, 0x1e, 0xde, 0x0e, 0x78, 0x37, 0x0f, 0xbf, 0x1f, 0xb9, |
329 | 0x8f46011c, 0x0e001439, 0x8f470120, 0x0a0006fd, 0x8fbf0018, 0x0000000d, | 329 | 0x01, 0xd3, 0xd8, 0x04, 0xfc, 0x6f, 0x03, 0xc6, 0x6b, 0x43, 0x9f, 0x6b, |
330 | 0x8fbf0018, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0010, 0x9742010c, | 330 | 0x22, 0xf1, 0x3d, 0x8f, 0xb7, 0x13, 0xd7, 0x65, 0xab, 0xf3, 0xf2, 0x9c, |
331 | 0x1440005e, 0x00803821, 0x3c029000, 0x34420001, 0x00e21025, 0xaf420020, | 331 | 0x3c, 0xf6, 0x61, 0xf9, 0xf6, 0xbe, 0x3e, 0xcf, 0xdc, 0x6d, 0x9e, 0xb9, |
332 | 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620023, | 332 | 0xef, 0xf0, 0xcc, 0xed, 0xc3, 0xb7, 0x2e, 0x3e, 0x41, 0x7c, 0xeb, 0xae, |
333 | 0x30420010, 0x14400026, 0x3c030800, 0x8f630074, 0x3c027fff, 0x3442ffff, | 333 | 0xf1, 0xb7, 0x9e, 0x35, 0x5c, 0xdc, 0xdb, 0x3d, 0xb8, 0xbf, 0x8f, 0xf9, |
334 | 0x00621824, 0xaf630074, 0x93620005, 0x34420001, 0xa3620005, 0x8f63004c, | 334 | 0xb9, 0xcf, 0xf4, 0xf4, 0xf1, 0x9a, 0x1b, 0x68, 0x6e, 0xb0, 0x8d, 0x16, |
335 | 0x8f620054, 0x10620021, 0x24040001, 0x9762006a, 0x00022880, 0x50a00001, | 335 | 0x4f, 0x72, 0x5f, 0xd0, 0x83, 0x0b, 0xe3, 0x17, 0x90, 0x63, 0x6d, 0x74, |
336 | 0x24050001, 0x97630068, 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, | 336 | 0xf1, 0x64, 0x8b, 0xc0, 0x9b, 0xfd, 0xf9, 0xc6, 0xca, 0x9a, 0x57, 0xb0, |
337 | 0x00852804, 0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, | 337 | 0xa6, 0x3b, 0x97, 0x89, 0x6f, 0x19, 0x96, 0xf1, 0xe3, 0x31, 0xee, 0xe3, |
338 | 0x00c4182b, 0x54600001, 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, | 338 | 0xb1, 0x37, 0xcb, 0x5f, 0x33, 0x82, 0xce, 0x9e, 0x0d, 0xc6, 0xcd, 0xfd, |
339 | 0x00a21021, 0xaf62000c, 0x0a00073d, 0x24040001, 0x8c6200a8, 0x00002021, | 339 | 0x56, 0x6b, 0x26, 0x8b, 0xdb, 0x9d, 0x34, 0x1b, 0xd4, 0xc0, 0x37, 0x55, |
340 | 0x24420001, 0xac6200a8, 0x0000000d, 0x00000000, 0x2400044d, 0x3c028000, | 340 | 0xfa, 0x28, 0xae, 0x23, 0xa8, 0x4a, 0xb4, 0x8f, 0xf9, 0xbc, 0x4e, 0xd6, |
341 | 0x34420001, 0x00e21025, 0xaf420020, 0x1080001f, 0x3c029000, 0x34420001, | 341 | 0xaf, 0x5b, 0x30, 0x6f, 0xd8, 0xcd, 0xd1, 0x88, 0xe5, 0x38, 0x27, 0xec, |
342 | 0x00e21025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, | 342 | 0xbe, 0x26, 0xc7, 0xd9, 0xee, 0xb3, 0xdf, 0xc7, 0x53, 0xc8, 0xaa, 0x3c, |
343 | 0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001, | 343 | 0xaf, 0x29, 0xed, 0xa0, 0x83, 0x50, 0xcf, 0x8b, 0xb2, 0x9e, 0xb2, 0xe8, |
344 | 0x00e31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00e02021, 0x0e000470, | 344 | 0xad, 0x99, 0x18, 0x4e, 0x1c, 0xe3, 0x9c, 0xed, 0xac, 0x85, 0xfe, 0xe0, |
345 | 0x24050455, 0x0a000761, 0x00000000, 0x8f4201f8, 0x00431024, 0x1440fffd, | 345 | 0xbd, 0x98, 0x00, 0x1e, 0x61, 0x8a, 0xe2, 0xaf, 0x50, 0xca, 0xe3, 0x69, |
346 | 0x24020002, 0x3c031000, 0xaf4701c0, 0xa34201c4, 0xaf4301f8, 0x0e001163, | 346 | 0xe1, 0xa9, 0xe0, 0xc9, 0xf5, 0x0c, 0x1d, 0x4f, 0xe8, 0x18, 0xec, 0x53, |
347 | 0x00000000, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffd8, 0xafbf0024, | 347 | 0xb4, 0xef, 0x92, 0x93, 0x3f, 0x41, 0x37, 0xde, 0x9e, 0x74, 0xea, 0x51, |
348 | 0xafb40020, 0xafb3001c, 0xafb20018, 0xafb10014, 0xafb00010, 0x93630005, | 348 | 0x8b, 0xd6, 0x72, 0xf5, 0xa8, 0x3f, 0x67, 0x9e, 0x9c, 0x70, 0xeb, 0x51, |
349 | 0x00809821, 0x24020030, 0x30630030, 0x146200ac, 0x00a0a021, 0x3c020800, | 349 | 0x8b, 0x24, 0xea, 0x51, 0x27, 0x56, 0xa8, 0x47, 0x25, 0x56, 0x5f, 0x8f, |
350 | 0x8c430020, 0x106000a6, 0x00000000, 0x0e00148e, 0x00000000, 0x8f830018, | 350 | 0xe2, 0xf9, 0x35, 0xda, 0xd7, 0x4f, 0xca, 0x17, 0x64, 0x3d, 0xea, 0x3d, |
351 | 0xac730000, 0x936200c4, 0x30420002, 0x10400004, 0x24020001, 0x8f830018, | 351 | 0x72, 0xea, 0x51, 0x17, 0xa9, 0x71, 0x3d, 0xea, 0x78, 0x5d, 0x3d, 0x2a, |
352 | 0x0a000784, 0x00000000, 0x8f830018, 0x24020003, 0xac620004, 0x8f6200dc, | 352 | 0x28, 0xea, 0x51, 0x3c, 0x8f, 0x53, 0x8f, 0x12, 0xed, 0xbe, 0x88, 0xa7, |
353 | 0x8f630040, 0x00431023, 0x18400004, 0x00000000, 0x0000000d, 0x00000000, | 353 | 0xee, 0x42, 0xf4, 0xee, 0x64, 0x07, 0x68, 0x66, 0xd0, 0xf7, 0x1a, 0xda, |
354 | 0x24000509, 0x8f840018, 0x8f6200dc, 0xac820008, 0x8f830018, 0xac60000c, | 354 | 0x34, 0x45, 0xc8, 0xdb, 0x4a, 0x35, 0xd0, 0x07, 0x6e, 0xb8, 0xbe, 0xa2, |
355 | 0x8f820018, 0xac400010, 0x8f830018, 0x8f62004c, 0x3c100800, 0xac620014, | 355 | 0xd0, 0x06, 0xcc, 0x9b, 0xec, 0x7b, 0xd8, 0x53, 0x63, 0x61, 0x9a, 0xff, |
356 | 0x8f850018, 0x3c026000, 0x8c434448, 0x261258c0, 0x00002021, 0xaca30018, | 356 | 0x62, 0xea, 0x2c, 0x07, 0x45, 0x9d, 0xe5, 0x87, 0x6b, 0xbc, 0x75, 0x96, |
357 | 0x9642000e, 0x8f850018, 0x3c034010, 0x00431025, 0x0e0014cc, 0xaca2001c, | 357 | 0x45, 0xba, 0x7e, 0x9d, 0xe5, 0x60, 0x83, 0x3a, 0xcb, 0x5b, 0x54, 0xad, |
358 | 0x8f830018, 0xac730000, 0x9362003e, 0x9363003f, 0x8f840018, 0x00021200, | 358 | 0xb3, 0xbc, 0x45, 0xd5, 0x3a, 0xcb, 0xc1, 0x12, 0xe7, 0xe2, 0x3e, 0x89, |
359 | 0x00621825, 0xac830004, 0x93620081, 0x93630082, 0x8f840018, 0x00021600, | 359 | 0x5f, 0x06, 0xed, 0x41, 0xf1, 0xc7, 0xb5, 0x97, 0xc5, 0xca, 0x1e, 0x7e, |
360 | 0x00031c00, 0x00431025, 0xac820008, 0x8f830018, 0x8f620040, 0xac62000c, | 360 | 0xd9, 0x6a, 0x2f, 0x6c, 0x03, 0x22, 0x17, 0x2e, 0xd7, 0xd4, 0x5e, 0xb8, |
361 | 0x8f840018, 0x8f620048, 0xac820010, 0x8f71004c, 0x8f820018, 0xac510014, | 361 | 0x0d, 0x9d, 0xb1, 0xd7, 0x08, 0x19, 0x99, 0x83, 0x7f, 0x5f, 0x9c, 0x0c, |
362 | 0x8f620050, 0x8f850018, 0x00401821, 0x02221023, 0x5c400001, 0x02201821, | 362 | 0x61, 0xce, 0x0e, 0xf8, 0x8c, 0x0e, 0xe4, 0x06, 0x61, 0xb4, 0x15, 0xda, |
363 | 0x00002021, 0xaca30018, 0x9642000e, 0x8f850018, 0x3c03c00b, 0x00431025, | 363 | 0x64, 0x0d, 0xa1, 0x8f, 0xc7, 0xd9, 0x0e, 0x43, 0xb7, 0x6c, 0x77, 0x7f, |
364 | 0x0e0014cc, 0xaca2001c, 0x8f620054, 0x8f840018, 0x00401821, 0x02221023, | 364 | 0x0f, 0x48, 0x1a, 0x44, 0x68, 0xb8, 0x9d, 0xf4, 0x20, 0xfb, 0x8e, 0xc9, |
365 | 0x5c400001, 0x02201821, 0xac830000, 0x8f840018, 0x8f630058, 0xac830004, | 365 | 0x3d, 0x74, 0xc8, 0xde, 0x22, 0xf6, 0xbd, 0xc1, 0xaa, 0x95, 0xb9, 0xc1, |
366 | 0x93620023, 0x30420010, 0x10400004, 0x00000000, 0x8f830018, 0x0a0007dd, | 366 | 0x1b, 0x90, 0xb9, 0xcc, 0xaa, 0x65, 0x8e, 0xe5, 0xcd, 0x39, 0xf7, 0xdd, |
367 | 0x8f620148, 0x8f830018, 0x8f62005c, 0xac620008, 0x8f830018, 0x8f620060, | 367 | 0x60, 0xf1, 0xfa, 0x1d, 0x02, 0xa7, 0x77, 0x1b, 0xc8, 0xfb, 0x18, 0xec, |
368 | 0xac62000c, 0x8f840018, 0x8f620064, 0xac820010, 0x97630068, 0x9762006a, | 368 | 0x8e, 0x33, 0xbf, 0x2e, 0xd7, 0xab, 0x8f, 0x87, 0x9f, 0x6d, 0x66, 0xff, |
369 | 0x8f840018, 0x00031c00, 0x00431025, 0xac820014, 0x8f850018, 0x00002021, | 369 | 0xbd, 0x72, 0x3d, 0xb1, 0xde, 0x7f, 0xaf, 0xe4, 0x47, 0x15, 0x61, 0x93, |
370 | 0x2402ffff, 0x260358c0, 0xaca20018, 0x9462000e, 0x8f850018, 0x3c03c00c, | 370 | 0xb3, 0x25, 0xae, 0xed, 0x7b, 0xf9, 0x33, 0x8f, 0x9c, 0x00, 0x7d, 0x42, |
371 | 0x00431025, 0x0e0014cc, 0xaca2001c, 0x8f840018, 0x8f630018, 0xac830000, | 371 | 0x0f, 0x98, 0xae, 0x41, 0xf0, 0x01, 0xeb, 0xd8, 0x4f, 0xc9, 0x5a, 0x16, |
372 | 0x936200c4, 0x30420002, 0x10400006, 0x00000000, 0x976200c8, 0x8f830018, | 372 | 0x9e, 0x05, 0x97, 0x7f, 0xad, 0xb0, 0x99, 0xee, 0x18, 0xdb, 0x01, 0x0b, |
373 | 0x3042ffff, 0x0a000803, 0xac620004, 0x8f820018, 0xac400004, 0x8f830018, | 373 | 0xfe, 0x8f, 0xeb, 0x28, 0x7c, 0x8e, 0xca, 0xfd, 0x2e, 0x5f, 0xbb, 0x2e, |
374 | 0x8f62006c, 0xac620008, 0x8f840018, 0x8f6200dc, 0xac82000c, 0x8f830018, | 374 | 0xbc, 0xa7, 0x72, 0xbb, 0x5c, 0xce, 0x8a, 0x7a, 0x2d, 0xa9, 0x9d, 0x7d, |
375 | 0xac600010, 0x93620005, 0x8f830018, 0x00021600, 0x00541025, 0xac620014, | 375 | 0xd3, 0x2d, 0x6c, 0x6b, 0xb6, 0x58, 0xae, 0xcc, 0x26, 0xf0, 0xce, 0x7c, |
376 | 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x260258c0, 0xaca30018, | 376 | 0x7d, 0x17, 0x36, 0x9c, 0xcf, 0xaa, 0xbf, 0x23, 0x6a, 0x04, 0x73, 0x36, |
377 | 0x9443000e, 0x8f850018, 0x3c02400d, 0x00621825, 0x0e0014cc, 0xaca3001c, | 377 | 0xdb, 0x6b, 0x8e, 0x41, 0x7f, 0x0b, 0xb2, 0xc4, 0xef, 0x51, 0x71, 0x2e, |
378 | 0x0e00122e, 0x02602021, 0x8fbf0024, 0x8fb40020, 0x8fb3001c, 0x8fb20018, | 378 | 0x21, 0x6a, 0xf8, 0x83, 0xdc, 0x76, 0xed, 0x4a, 0x94, 0xed, 0x30, 0xf6, |
379 | 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0028, 0x27bdffe0, 0xafb00010, | 379 | 0x5c, 0xa5, 0x31, 0xe2, 0x23, 0xc8, 0x0c, 0xc7, 0xb1, 0x0c, 0xe7, 0xc6, |
380 | 0x27500100, 0xafbf0018, 0xafb10014, 0x9603000c, 0x240200c1, 0x54620024, | 380 | 0x9e, 0x9a, 0xa7, 0x66, 0xab, 0xcb, 0xb8, 0x88, 0x75, 0x39, 0x00, 0x9a, |
381 | 0x8e040000, 0x3c029000, 0x8f450100, 0x34420001, 0x3c038000, 0x00a21025, | 381 | 0xed, 0x10, 0x31, 0xea, 0xb8, 0x5d, 0xa6, 0xea, 0x19, 0x3f, 0xd3, 0xdc, |
382 | 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, | 382 | 0x39, 0xe7, 0x3f, 0x66, 0x2f, 0x47, 0xfb, 0xcd, 0x37, 0x48, 0x7b, 0x47, |
383 | 0x3c038000, 0x34420004, 0xa362007d, 0x8f640074, 0x34630001, 0x00a31825, | 383 | 0x1f, 0x6b, 0xe9, 0xae, 0x23, 0x7e, 0x71, 0xe9, 0xee, 0xfa, 0xa8, 0x49, |
384 | 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021, 0x0e000470, 0x240505b2, | 384 | 0x49, 0x83, 0xa8, 0xac, 0x2b, 0x7e, 0x5a, 0x9e, 0x29, 0xfd, 0x5f, 0xd8, |
385 | 0x0a000878, 0x8fbf0018, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, | 385 | 0xaf, 0xe2, 0xd9, 0xaf, 0xab, 0xbb, 0xfb, 0xe4, 0x7e, 0xc3, 0x75, 0xba, |
386 | 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8, 0x0a000878, 0x8fbf0018, | 386 | 0x1b, 0x97, 0x75, 0xb9, 0x5f, 0x84, 0xee, 0xba, 0x7b, 0xe2, 0xb5, 0xb7, |
387 | 0x8f65004c, 0x24060001, 0x0e0012a3, 0x240705be, 0x3c020800, 0x8c430020, | 387 | 0x5c, 0x67, 0xdd, 0x67, 0x48, 0x8d, 0xaf, 0x14, 0x7b, 0xff, 0xb4, 0xf9, |
388 | 0x9611000c, 0x1060001d, 0x8e100000, 0x0e00148e, 0x00000000, 0x8f820018, | 388 | 0xe3, 0xc5, 0xde, 0x1f, 0x87, 0x9e, 0x5e, 0xbd, 0x65, 0x1a, 0xb6, 0x89, |
389 | 0xac500000, 0x8f840018, 0x00111400, 0xac820004, 0x8f830018, 0xac600008, | 389 | 0xb8, 0xc2, 0xd1, 0x1f, 0xd8, 0xe3, 0x82, 0x9f, 0x16, 0x1e, 0xd2, 0xe9, |
390 | 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f840018, 0x240205c1, | 390 | 0x9f, 0xee, 0xe4, 0xfa, 0xac, 0x26, 0x73, 0x7c, 0x6e, 0x7f, 0xb1, 0x95, |
391 | 0xac820014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, | 391 | 0x63, 0xab, 0x4d, 0xd6, 0x77, 0x44, 0x6e, 0x95, 0x57, 0x4d, 0x8f, 0x1f, |
392 | 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024019, 0x00621825, 0x0e0014cc, | 392 | 0x31, 0x30, 0xce, 0x63, 0x61, 0xba, 0x1c, 0xbc, 0x91, 0xb8, 0xbc, 0xcb, |
393 | 0xaca3001c, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, | 393 | 0x58, 0xf4, 0xad, 0x26, 0x2e, 0xbf, 0x55, 0xf7, 0x5b, 0x7f, 0xdd, 0x7a, |
394 | 0x27bdffb0, 0xafb5003c, 0x0000a821, 0xafbe0048, 0x0000f021, 0xafb70044, | 394 | 0xbd, 0x3a, 0x47, 0x35, 0x2e, 0xe7, 0x7c, 0x3e, 0xe8, 0xd4, 0x18, 0x4c, |
395 | 0x0000b821, 0xafb30034, 0x00009821, 0xafb60040, 0x0080b021, 0xafbf004c, | 395 | 0x8e, 0xcf, 0xd7, 0x4a, 0x9e, 0xf0, 0x3b, 0x72, 0x11, 0x1b, 0x79, 0x08, |
396 | 0xafb40038, 0xafb20030, 0xafb1002c, 0xafb00028, 0xafa00010, 0x8f620040, | 396 | 0x64, 0xfc, 0x55, 0xc8, 0xca, 0x2b, 0x36, 0xf2, 0x0e, 0x1b, 0xf9, 0x88, |
397 | 0x8ec30014, 0x96d1000c, 0x00431023, 0x04410025, 0x8ed40000, 0x32220401, | 397 | 0x8d, 0xdc, 0xc3, 0x46, 0xee, 0x61, 0xf7, 0xc8, 0x1c, 0x26, 0x23, 0xeb, |
398 | 0x1040030c, 0x3c029000, 0x34420001, 0x02821025, 0xaf420020, 0x3c038000, | 398 | 0x56, 0x7c, 0x46, 0xcb, 0xf9, 0x61, 0x5e, 0xc9, 0xd8, 0xe3, 0x7c, 0x1f, |
399 | 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, | 399 | 0x41, 0x4d, 0xc6, 0x36, 0xca, 0x78, 0xf0, 0x38, 0xdf, 0x77, 0x28, 0xab, |
400 | 0x34420004, 0xa362007d, 0x8f640074, 0x34630001, 0x02831825, 0xaf430020, | 400 | 0x71, 0xae, 0x45, 0x91, 0xaa, 0xc6, 0x6f, 0x87, 0x8f, 0xda, 0x0e, 0xbc, |
401 | 0x04810006, 0x3c038000, 0x02802021, 0x0e000470, 0x24050664, 0x0a000ba2, | 401 | 0x9a, 0x79, 0xdc, 0xa7, 0xc6, 0x5b, 0x99, 0x76, 0x8a, 0x1a, 0x5f, 0x2b, |
402 | 0x8fbf004c, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, | 402 | 0xcf, 0x0d, 0x7a, 0x03, 0x0e, 0xfe, 0xdd, 0xdc, 0xd6, 0xd4, 0xf8, 0xdd, |
403 | 0xaf5401c0, 0xa34201c4, 0xaf4301f8, 0x0a000ba2, 0x8fbf004c, 0x32220010, | 403 | 0xec, 0xd3, 0xc2, 0xa4, 0xba, 0xfd, 0xb7, 0x07, 0x98, 0xae, 0xa4, 0xde, |
404 | 0x1040006b, 0x00003021, 0x9362003f, 0x92c6000f, 0x304500ff, 0x24c3fff8, | 404 | 0x16, 0xe0, 0xb8, 0x76, 0xde, 0xf6, 0x8b, 0x3b, 0x05, 0xc9, 0x18, 0xd7, |
405 | 0x2c62000f, 0x10400057, 0x3c020800, 0x244257c0, 0x00031880, 0x00621821, | 405 | 0xcc, 0xb8, 0x5d, 0xa5, 0xab, 0xba, 0x2c, 0x5d, 0xfd, 0x95, 0xfa, 0x3f, |
406 | 0x8c640000, 0x00800008, 0x00000000, 0x38a20012, 0x0a000924, 0x0002a82b, | 406 | 0xd3, 0xd2, 0xc7, 0x70, 0xa2, 0x36, 0xc6, 0x34, 0x75, 0xe7, 0xe3, 0xf3, |
407 | 0x2402000e, 0x14a20004, 0x2402000c, 0x24150001, 0x0a000924, 0x24060010, | 407 | 0x66, 0x5e, 0x47, 0xdc, 0x63, 0xc0, 0xf3, 0x60, 0x33, 0xb5, 0x0d, 0x0e, |
408 | 0x10a20049, 0x38a30010, 0x2c630001, 0x38a20016, 0x2c420001, 0x00621825, | 408 | 0xf9, 0x2d, 0xef, 0xba, 0x6c, 0x43, 0x76, 0x90, 0x37, 0xc7, 0x5a, 0x7e, |
409 | 0x1460004d, 0x0000a821, 0x24020014, 0x10a2004a, 0x00000000, 0x0000000d, | 409 | 0xcd, 0xa8, 0x38, 0x1b, 0x49, 0xf6, 0x47, 0x85, 0xec, 0xb0, 0xac, 0x69, |
410 | 0x00000000, 0x2400069c, 0x0a000924, 0x0000a821, 0x24020016, 0x14a20005, | 410 | 0xe2, 0xce, 0xd5, 0x47, 0xe2, 0x1e, 0x09, 0xcb, 0x19, 0xcb, 0xf2, 0x78, |
411 | 0x2402000c, 0x24150001, 0x24060010, 0x0a000924, 0x3231fffd, 0x10a20032, | 411 | 0x7f, 0x57, 0x58, 0x53, 0x5b, 0xb0, 0x46, 0x98, 0xd2, 0x25, 0x71, 0x56, |
412 | 0x38a30010, 0x2c630001, 0x38a2000e, 0x2c420001, 0x00621825, 0x14600036, | 412 | 0x80, 0x7c, 0xe9, 0xdc, 0x3a, 0x6a, 0xfb, 0x07, 0xbd, 0x9a, 0xc7, 0x46, |
413 | 0x0000a821, 0x24020014, 0x14a20003, 0x24150001, 0x0a000924, 0x24060012, | 413 | 0x9d, 0xb3, 0x7a, 0xbb, 0xde, 0xff, 0x8d, 0x8a, 0x73, 0x65, 0xc7, 0x06, |
414 | 0x0000000d, 0x00000000, 0x240006bc, 0x0a000924, 0x0000a821, 0x2402000e, | 414 | 0xb9, 0xe7, 0xc3, 0xab, 0x3b, 0xff, 0xbe, 0xbe, 0x3e, 0xb5, 0xd4, 0xd7, |
415 | 0x14a20004, 0x24020016, 0x24150001, 0x0a000924, 0x3231fffb, 0x14a20004, | 415 | 0x0d, 0x24, 0x0d, 0x98, 0x36, 0x8d, 0xcf, 0xee, 0xe7, 0x4b, 0x7c, 0xaf, |
416 | 0x24020014, 0x24150001, 0x0a000924, 0x3231fffd, 0x54a20013, 0x92c2000e, | 416 | 0x25, 0x12, 0xe3, 0xdc, 0x6d, 0x44, 0xdc, 0xf9, 0x50, 0x21, 0x85, 0x3a, |
417 | 0x24150001, 0x24060012, 0x0a000924, 0x3231fffd, 0x2402000c, 0x54a2000c, | 417 | 0x8d, 0x19, 0x9c, 0xf3, 0x85, 0x86, 0x7d, 0x71, 0xca, 0x64, 0x27, 0x48, |
418 | 0x92c2000e, 0x92c3000e, 0x2402000a, 0x10620005, 0x24150001, 0x0000000d, | 418 | 0x43, 0xac, 0x98, 0xa9, 0xd6, 0x03, 0x1f, 0x5c, 0x43, 0x96, 0x2b, 0x97, |
419 | 0x00000000, 0x240006e8, 0x24150001, 0x0a000924, 0x24060014, 0x92c2000e, | 419 | 0x51, 0xce, 0x1f, 0x6a, 0xce, 0xed, 0x16, 0xe9, 0xb0, 0x72, 0xa0, 0x74, |
420 | 0x14a20003, 0x00000000, 0x0a000924, 0x24150001, 0x10a6ffc1, 0x24020012, | 420 | 0x84, 0x0e, 0x34, 0x8c, 0x29, 0x1b, 0xd7, 0x03, 0x2f, 0xd6, 0xd5, 0x14, |
421 | 0x10a20005, 0x0000a821, 0x0000000d, 0x00000000, 0x24000704, 0x0000a821, | 421 | 0x16, 0x44, 0x4d, 0x21, 0xb7, 0xc6, 0x6f, 0x3d, 0x19, 0x70, 0xee, 0xb5, |
422 | 0x12a00022, 0x32220004, 0x10400002, 0x24020001, 0xafa20010, 0x32230102, | 422 | 0x34, 0xd6, 0x93, 0x5d, 0x15, 0x3d, 0x71, 0xe1, 0xf8, 0x2c, 0xbe, 0x8d, |
423 | 0x24020002, 0x1462000f, 0x00000000, 0x92c2000a, 0x30420020, 0x1440000b, | 423 | 0x76, 0x8a, 0xb5, 0x0e, 0x2b, 0x59, 0xbb, 0x95, 0x76, 0x1a, 0x0e, 0xd6, |
424 | 0x00000000, 0x8f630048, 0x8f620040, 0x14620004, 0x00000000, 0x8f620048, | 424 | 0xa3, 0x36, 0xe3, 0x75, 0x58, 0x39, 0x68, 0xe7, 0x95, 0xb4, 0xa8, 0x3d, |
425 | 0x24420001, 0xaf620048, 0x8f620040, 0x24420001, 0xaf620040, 0xa366003f, | 425 | 0x70, 0x8c, 0xbf, 0xe6, 0xda, 0x30, 0x95, 0xe9, 0xed, 0x98, 0xfb, 0x3d, |
426 | 0x38c30012, 0x2c630001, 0x38c20010, 0x2c420001, 0x00621825, 0x10600005, | 426 | 0xc3, 0x78, 0x6b, 0x8a, 0x2e, 0x9d, 0xf8, 0x2e, 0x51, 0x58, 0xe6, 0x6f, |
427 | 0x3c030800, 0x8c620074, 0x24420001, 0x0e00140d, 0xac620074, 0x32220040, | 427 | 0xce, 0x7c, 0xb9, 0x29, 0xae, 0x25, 0xde, 0x8f, 0xfd, 0x33, 0xfc, 0x6e, |
428 | 0x32230020, 0xafa30020, 0x32230080, 0xafa30024, 0x32230001, 0xafa30018, | 428 | 0x25, 0x39, 0x55, 0x2e, 0xa7, 0x31, 0x3e, 0xd6, 0x7b, 0xaf, 0xc8, 0x8d, |
429 | 0x32230008, 0xafa3001c, 0x32230100, 0x104000c4, 0xafa30014, 0x8ec60010, | 429 | 0xd4, 0x38, 0x0d, 0x71, 0x8e, 0xac, 0x2d, 0xc9, 0x91, 0xd3, 0xd0, 0x35, |
430 | 0x8f630054, 0x24c2ffff, 0x00431023, 0x18400006, 0x00000000, 0x0000000d, | 430 | 0xc4, 0x20, 0x76, 0x13, 0xbe, 0x75, 0xe3, 0x91, 0xcf, 0xae, 0x75, 0x64, |
431 | 0x00000000, 0x2400015c, 0x0a000989, 0x00009021, 0x8f62004c, 0x00c21023, | 431 | 0xe4, 0xbb, 0x12, 0x0f, 0x1e, 0xff, 0xfb, 0x80, 0x7b, 0x0f, 0x28, 0x77, |
432 | 0x18400028, 0x00009021, 0x93650120, 0x93640121, 0x3c030800, 0x8c62008c, | 432 | 0x2a, 0x8d, 0xfd, 0x37, 0x51, 0xca, 0x74, 0xf2, 0xbb, 0xec, 0x99, 0x23, |
433 | 0x308400ff, 0x24420001, 0x30a500ff, 0x00804021, 0x1485000b, 0xac62008c, | 433 | 0x1b, 0x6a, 0xe1, 0xd1, 0x77, 0xca, 0x85, 0x0f, 0xd6, 0xc1, 0xf3, 0x19, |
434 | 0x3c040800, 0x8c830090, 0x24630001, 0xac830090, 0x93620122, 0x30420001, | 434 | 0xd7, 0x5f, 0xd5, 0xc1, 0x07, 0x3d, 0xf0, 0x66, 0x1d, 0x3c, 0xe2, 0xae, |
435 | 0x00021023, 0x30420005, 0x0a000989, 0x34520004, 0x27670100, 0x00041080, | 435 | 0x33, 0xdf, 0xa8, 0x83, 0x37, 0x3d, 0xf0, 0xed, 0x75, 0xf0, 0xed, 0x80, |
436 | 0x00e21021, 0x8c430000, 0x00c31823, 0x04600004, 0x24820001, 0x30440007, | 436 | 0x7f, 0xa3, 0x0e, 0x1e, 0x7d, 0xa7, 0x90, 0x13, 0x08, 0xda, 0x70, 0x8c, |
437 | 0x1485fff9, 0x00041080, 0x10880007, 0x3c030800, 0xa3640121, 0x8c620094, | 437 | 0x74, 0x48, 0xe6, 0x89, 0x78, 0x2e, 0xb9, 0x1f, 0xc9, 0xf2, 0xd3, 0x01, |
438 | 0x24120005, 0x24420001, 0x0a000989, 0xac620094, 0x24120004, 0x32420001, | 438 | 0x1a, 0x7b, 0xeb, 0xb5, 0x09, 0xd8, 0xa8, 0xaa, 0x4c, 0x39, 0xfa, 0xea, |
439 | 0x10400021, 0x3c020800, 0x8c430020, 0x8ed00000, 0x1060001c, 0x8ed30010, | 439 | 0x95, 0x25, 0x96, 0xbd, 0x3c, 0xe4, 0x15, 0x7a, 0x54, 0x80, 0x3e, 0x15, |
440 | 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x24020001, | 440 | 0x5c, 0x5f, 0xca, 0x77, 0xaa, 0x22, 0xc7, 0x1d, 0x3d, 0x56, 0x68, 0xbd, |
441 | 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, | 441 | 0x35, 0x2f, 0x73, 0x91, 0xab, 0x8c, 0x3b, 0xfc, 0x86, 0xeb, 0x3b, 0xe8, |
442 | 0xac600010, 0x8f820018, 0xac530014, 0x8f850018, 0x3c026000, 0x8c434448, | 442 | 0x84, 0x63, 0x57, 0x58, 0xbf, 0x79, 0x7e, 0x69, 0x5f, 0x4a, 0x2c, 0x87, |
443 | 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010, | 443 | 0xce, 0x3a, 0xe9, 0x25, 0x32, 0x1b, 0x5e, 0x52, 0x77, 0xf1, 0xd5, 0xd9, |
444 | 0x00621825, 0x0e0014cc, 0xaca3001c, 0x24130001, 0x32420004, 0x10400068, | 444 | 0x77, 0x12, 0xf6, 0x3d, 0xd7, 0xe2, 0xb7, 0x36, 0xac, 0xbd, 0x9e, 0x7d, |
445 | 0x00003821, 0x3c029000, 0x8ec60010, 0x34420001, 0x3c038000, 0x02821025, | 445 | 0xcf, 0x78, 0xec, 0x7b, 0x38, 0x58, 0xf5, 0xf9, 0x8f, 0x09, 0x9f, 0xdf, |
446 | 0xa360007c, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, | 446 | 0xd1, 0xc0, 0x66, 0xac, 0xde, 0xe7, 0xef, 0xfd, 0xd8, 0x3e, 0x7f, 0xb9, |
447 | 0x93620023, 0x30420080, 0x10400011, 0x00000000, 0x8f65005c, 0x8f63004c, | 447 | 0x75, 0x57, 0xe3, 0xf3, 0x1f, 0x69, 0xf9, 0x78, 0x3e, 0x9f, 0xd7, 0xac, |
448 | 0x9764003c, 0x8f620064, 0x00a32823, 0x00852821, 0x00a2102b, 0x54400006, | 448 | 0xaf, 0x65, 0x7a, 0xcf, 0x59, 0x8e, 0xca, 0x18, 0x7b, 0xb7, 0x27, 0xc6, |
449 | 0x3c023fff, 0x93620023, 0x3042007f, 0xa3620023, 0xaf660064, 0x3c023fff, | 449 | 0x66, 0xfc, 0xbe, 0x27, 0xef, 0x02, 0x9e, 0x5e, 0xeb, 0xc8, 0xdb, 0x51, |
450 | 0x0a0009da, 0x3442ffff, 0x8f62005c, 0x00c21023, 0x04400011, 0x00000000, | 450 | 0x19, 0xa7, 0x73, 0xec, 0x8d, 0xf7, 0xc2, 0x23, 0x90, 0xd1, 0x7c, 0x8f, |
451 | 0x8f65005c, 0x8f630064, 0x9764003c, 0x3c023fff, 0x3442ffff, 0xaf660064, | 451 | 0x8f, 0x54, 0x9a, 0x35, 0x9d, 0xb3, 0xed, 0x9f, 0x6f, 0xae, 0x17, 0xa1, |
452 | 0x00a32823, 0x00852821, 0x0045102b, 0x10400004, 0x00c51021, 0x3c053fff, | 452 | 0xcb, 0xc2, 0x9f, 0x24, 0x3e, 0x81, 0x5a, 0xea, 0x49, 0xc8, 0x8f, 0xbb, |
453 | 0x34a5ffff, 0x00c51021, 0xaf62005c, 0x24070001, 0xaf66004c, 0x8fa20010, | 453 | 0xaf, 0x95, 0x6a, 0xa9, 0xf5, 0xe7, 0x1f, 0x7c, 0xee, 0x41, 0xca, 0x03, |
454 | 0x10400003, 0x00000000, 0xaf660050, 0xaf660054, 0x8f620054, 0x14c20005, | 454 | 0x95, 0x73, 0x10, 0xaf, 0x4e, 0xe9, 0x94, 0x9d, 0x21, 0xdd, 0x8c, 0x93, |
455 | 0x00000000, 0x93620023, 0x30420040, 0x10400017, 0x24020001, 0x9762006a, | 455 | 0xb2, 0x8f, 0x71, 0x8e, 0xfd, 0xb0, 0x52, 0x6f, 0x3f, 0x24, 0x6b, 0x30, |
456 | 0x00022880, 0x50a00001, 0x24050001, 0x97630068, 0x93640081, 0x3c020800, | 456 | 0xea, 0xb2, 0x77, 0x82, 0x7e, 0x02, 0x7c, 0x58, 0xaf, 0x9c, 0x1a, 0x8c, |
457 | 0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b, 0x54400001, 0x00a03021, | 457 | 0xea, 0xdc, 0x09, 0x3a, 0xfe, 0xf3, 0xbb, 0x13, 0xc4, 0xf3, 0x6b, 0xb4, |
458 | 0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001, 0x00c02021, 0x8f420074, | 458 | 0xb7, 0xc1, 0x9d, 0x20, 0xdf, 0x2a, 0xef, 0x04, 0xad, 0x17, 0x35, 0x18, |
459 | 0x2403fffe, 0x00832824, 0x00a21021, 0xaf62000c, 0x93620082, 0x30420080, | 459 | 0x9e, 0xc7, 0xa9, 0xc1, 0x70, 0xbb, 0xb3, 0x8f, 0xe5, 0x3a, 0x4c, 0xa3, |
460 | 0x50400001, 0xa3600081, 0x3c028000, 0x34420001, 0x02821025, 0xaf420020, | 460 | 0x93, 0xb7, 0x88, 0x7b, 0xa8, 0x9d, 0x7d, 0xb5, 0xf2, 0xbd, 0xef, 0x13, |
461 | 0x9363007e, 0x9362007a, 0x10620005, 0x00e0b821, 0x0e0013c4, 0x00000000, | 461 | 0x8d, 0xa5, 0x79, 0xbd, 0xa3, 0x0d, 0xef, 0xb6, 0x24, 0x3f, 0xc1, 0x9a, |
462 | 0x00403821, 0x00e0b821, 0x8fa30020, 0x10600009, 0x8fa20010, 0x8ec20018, | 462 | 0xcb, 0x21, 0x51, 0x73, 0xb9, 0xb3, 0xcd, 0x5b, 0x73, 0x51, 0x57, 0xb8, |
463 | 0xaf620018, 0x8ec3001c, 0xaf63001c, 0x8ec20020, 0x24170001, 0xaf620058, | 463 | 0xdb, 0x72, 0xa8, 0x41, 0xcd, 0xc5, 0xef, 0xb9, 0xdb, 0xe2, 0xf7, 0xdc, |
464 | 0x8fa20010, 0x10400057, 0x8fa30024, 0x93620023, 0x30420040, 0x10400053, | 464 | 0x6d, 0x39, 0x24, 0xeb, 0x2b, 0xea, 0x2f, 0xd1, 0xdd, 0x96, 0xe4, 0x8a, |
465 | 0x00000000, 0x16600021, 0x3c120800, 0x8e420020, 0x8f70004c, 0x1040001e, | 465 | 0x77, 0x5b, 0xb6, 0x4a, 0x7d, 0xf5, 0xc2, 0xaf, 0xfe, 0xbc, 0x32, 0x55, |
466 | 0x24130001, 0x0e00148e, 0x00000000, 0x8f820018, 0xac540000, 0x8f840018, | 466 | 0x67, 0xe7, 0x13, 0xc2, 0xce, 0xdf, 0xd5, 0xea, 0xb7, 0x9e, 0x69, 0xbb, |
467 | 0x24020001, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, | 467 | 0x9e, 0x9d, 0xdf, 0x57, 0xd1, 0x53, 0xbe, 0xa3, 0xcd, 0x77, 0xbe, 0x58, |
468 | 0x8f830018, 0xac600010, 0x8f820018, 0xac500014, 0x8f850018, 0x3c026000, | 468 | 0x16, 0xf9, 0x7c, 0xa6, 0x89, 0x72, 0x03, 0xbf, 0x2a, 0x68, 0xf6, 0x58, |
469 | 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, | 469 | 0x6f, 0xed, 0x99, 0x63, 0xf5, 0x5e, 0xa4, 0xee, 0xb9, 0x17, 0x69, 0xa2, |
470 | 0x3c024010, 0x00621825, 0xaca3001c, 0x0e0014cc, 0x24130001, 0x8e420020, | 470 | 0x5f, 0xaf, 0xab, 0x87, 0x04, 0xe4, 0xdd, 0x7e, 0xf8, 0xc2, 0x19, 0x43, |
471 | 0x1040001c, 0x8ed00000, 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, | 471 | 0xda, 0x5e, 0xc4, 0x70, 0x98, 0xae, 0x50, 0xe4, 0x3b, 0x95, 0x6d, 0xe4, |
472 | 0x8f830018, 0xac600004, 0x8f820018, 0xac400008, 0x8f830018, 0xac60000c, | 472 | 0x9b, 0x71, 0xce, 0x4b, 0x54, 0x11, 0x63, 0x42, 0x8e, 0x8b, 0x7e, 0xe1, |
473 | 0x8f820018, 0xac400010, 0x8f830018, 0x24020798, 0xac620014, 0x8f850018, | 473 | 0x6f, 0xd4, 0xb8, 0x23, 0xb3, 0xe3, 0xf6, 0x05, 0xe0, 0xbf, 0x21, 0x51, |
474 | 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, | 474 | 0x6d, 0x9b, 0x95, 0x5a, 0xce, 0x58, 0xe5, 0x0e, 0xbf, 0x09, 0xfb, 0xe0, |
475 | 0x8f850018, 0x3c024019, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000, | 475 | 0xdc, 0x07, 0xca, 0x98, 0x7c, 0x67, 0xe4, 0x62, 0x5b, 0xf5, 0x3e, 0xd0, |
476 | 0x34420001, 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, | 476 | 0x67, 0xa4, 0x9c, 0x3a, 0xf7, 0x81, 0x48, 0x4d, 0x40, 0x3e, 0x6e, 0xe4, |
477 | 0x1440fffd, 0x24020001, 0xaf62000c, 0x93630023, 0x3c028000, 0x34420001, | 477 | 0x3e, 0x50, 0xd7, 0x92, 0xfb, 0x40, 0x2b, 0xf3, 0x66, 0xe9, 0x7d, 0xa0, |
478 | 0x02821025, 0x306300bf, 0xa3630023, 0xaf420020, 0x8fa30024, 0x10600012, | 478 | 0xc6, 0xfc, 0xe1, 0xfb, 0x40, 0xff, 0xde, 0xe6, 0xdc, 0x43, 0x5d, 0x89, |
479 | 0x8fa30018, 0x9362007c, 0x24420001, 0xa362007c, 0x9363007e, 0x9362007a, | 479 | 0x3f, 0x6e, 0x9c, 0xf4, 0x11, 0xe0, 0xf9, 0x3e, 0x50, 0xe5, 0x1e, 0x90, |
480 | 0x1462000b, 0x8fa30018, 0x9362007c, 0x3c030800, 0x8c640024, 0x0044102b, | 480 | 0xe7, 0x0e, 0x10, 0xdf, 0x25, 0x59, 0xee, 0x0c, 0xce, 0x7b, 0xff, 0xa4, |
481 | 0x14400005, 0x8fa30018, 0x0e0013c4, 0x00000000, 0x02e2b825, 0x8fa30018, | 481 | 0xa7, 0x72, 0xff, 0xe4, 0x7c, 0xc9, 0xf5, 0xed, 0xee, 0xb9, 0x1c, 0xc7, |
482 | 0x3062ffff, 0x10400003, 0x32220200, 0x0a000a94, 0x241e0004, 0x10400003, | 482 | 0x39, 0xbb, 0x44, 0x8e, 0x7a, 0xae, 0x54, 0x5b, 0xc3, 0x60, 0xbe, 0x8f, |
483 | 0x00000000, 0x241e0040, 0x24170001, 0x12a000d0, 0x32220002, 0x104000cf, | 483 | 0x16, 0xcf, 0x81, 0x3e, 0x6f, 0x89, 0xdc, 0x00, 0x7c, 0xde, 0xe2, 0x23, |
484 | 0x8fa2001c, 0x92c2000a, 0x30420002, 0x5040003b, 0x92c2000a, 0x93620023, | 484 | 0xe6, 0x1d, 0x29, 0xa0, 0x8b, 0x38, 0xcb, 0x75, 0xf8, 0xdd, 0x21, 0x64, |
485 | 0x30420008, 0x54400037, 0x92c2000a, 0x3c020800, 0x8c430020, 0x10600023, | 485 | 0xc1, 0x91, 0x8b, 0xdd, 0x9e, 0xf3, 0xd0, 0xaa, 0x1c, 0x38, 0x67, 0xba, |
486 | 0x3c029000, 0x0e00148e, 0x00000000, 0x8f840018, 0x8ec30000, 0xac830000, | 486 | 0x0e, 0xef, 0x6a, 0x65, 0x46, 0x9c, 0xdd, 0x0c, 0xed, 0xb5, 0x9c, 0xf3, |
487 | 0x92c2000a, 0x8f830018, 0x00021600, 0xac620004, 0x8f840018, 0x8f620040, | 487 | 0xc6, 0xa8, 0x38, 0xb7, 0x6d, 0xaf, 0xb3, 0x5b, 0x3a, 0xe4, 0x06, 0x31, |
488 | 0xac820008, 0x8f850018, 0x8f63004c, 0xaca3000c, 0x9362003f, 0x8f840018, | 488 | 0x67, 0x8c, 0xeb, 0xd5, 0x8c, 0xfb, 0x66, 0xc1, 0xe3, 0x46, 0x67, 0x71, |
489 | 0x304200ff, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f850018, | 489 | 0x2b, 0xd7, 0xf1, 0xdc, 0x9a, 0x0a, 0x21, 0x97, 0xd8, 0x9d, 0xce, 0x09, |
490 | 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, | 490 | 0xbb, 0xe9, 0xac, 0xdd, 0x29, 0xd6, 0xde, 0x58, 0x77, 0x96, 0xcd, 0x72, |
491 | 0x3c02401a, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000, 0x34420001, | 491 | 0xb5, 0x5c, 0x4c, 0x70, 0x3d, 0x9a, 0xde, 0xb3, 0x84, 0xa6, 0xb5, 0xba, |
492 | 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, | 492 | 0x84, 0xdc, 0xb5, 0x62, 0xe3, 0x3b, 0x2a, 0xba, 0x34, 0x2e, 0xee, 0x21, |
493 | 0x00000000, 0x93630023, 0x3c028000, 0x34420001, 0x02821025, 0x34630008, | 493 | 0xbb, 0xe7, 0xb5, 0x0e, 0xfd, 0xaa, 0xba, 0xb7, 0x5c, 0x3c, 0x53, 0x4f, |
494 | 0xa3630023, 0xaf420020, 0x92c2000a, 0x30420020, 0x1040008e, 0x8fa2001c, | 494 | 0xbf, 0x4d, 0xff, 0x4b, 0xe8, 0x77, 0x15, 0xf4, 0xe3, 0x77, 0x03, 0xef, |
495 | 0x93620023, 0x30420001, 0x14400035, 0x3c020800, 0x8c430020, 0x10600023, | 495 | 0xef, 0x8a, 0x7a, 0xc0, 0xb9, 0x52, 0xe4, 0x78, 0x9e, 0x38, 0x4e, 0x88, |
496 | 0x3c029000, 0x0e00148e, 0x00000000, 0x8f840018, 0x8ec30000, 0xac830000, | 496 | 0xcc, 0x2e, 0x50, 0x0f, 0xe8, 0xc8, 0xff, 0xeb, 0xe2, 0xde, 0x9d, 0x60, |
497 | 0x92c2000a, 0x8f830018, 0x00021600, 0xac620004, 0x8f840018, 0x8f620040, | 497 | 0xfa, 0xb2, 0x7d, 0x8f, 0xbc, 0x70, 0x99, 0xd8, 0xc6, 0xdf, 0x8d, 0x7d, |
498 | 0xac820008, 0x8f850018, 0x8f63004c, 0xaca3000c, 0x9362003f, 0x8f840018, | 498 | 0x94, 0xcb, 0x2f, 0xc5, 0x5c, 0xfa, 0xb3, 0xee, 0x73, 0x9d, 0xaa, 0x76, |
499 | 0x304200ff, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f850018, | 499 | 0x5f, 0x7b, 0x57, 0xed, 0x53, 0x1d, 0xf9, 0xcc, 0x34, 0x90, 0xcf, 0x8c, |
500 | 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, | 500 | 0xdc, 0xa3, 0x6f, 0xa6, 0x71, 0xbc, 0x9a, 0x9a, 0xfc, 0xef, 0x5e, 0xae, |
501 | 0x3c02401a, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000, 0x34420001, | 501 | 0x26, 0xb6, 0x8d, 0x22, 0x0a, 0xbf, 0xac, 0xd7, 0x4e, 0xe3, 0xa4, 0x61, |
502 | 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, | 502 | 0x93, 0x3a, 0xad, 0x69, 0xd2, 0x60, 0xc7, 0x4b, 0x12, 0x29, 0xa5, 0xa4, |
503 | 0x00000000, 0x93630023, 0x3c028000, 0x34420001, 0x02821025, 0x34630001, | 503 | 0x52, 0x55, 0x45, 0x60, 0xa9, 0x21, 0x4e, 0xda, 0x0a, 0x71, 0x70, 0x0b, |
504 | 0xa3630023, 0xaf420020, 0x93620023, 0x30420040, 0x10400052, 0x8fa2001c, | 504 | 0x48, 0x51, 0xc5, 0x21, 0x4d, 0xd3, 0x7b, 0x85, 0x84, 0x54, 0xa1, 0x8a, |
505 | 0x16600020, 0x3c120800, 0x8e420020, 0x8f70004c, 0x1040003c, 0x3c029000, | 505 | 0x46, 0x4e, 0x02, 0x15, 0x4a, 0xe5, 0x0a, 0x96, 0x72, 0x41, 0xa2, 0xd8, |
506 | 0x0e00148e, 0x00000000, 0x8f820018, 0xac540000, 0x8f840018, 0x24020001, | 506 | 0x8e, 0x02, 0x52, 0x2a, 0xf7, 0xca, 0x85, 0xba, 0xbf, 0x08, 0x89, 0x03, |
507 | 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, | 507 | 0x70, 0x06, 0x29, 0x2a, 0x3f, 0xe2, 0xc0, 0x8d, 0x1b, 0x54, 0x5d, 0xde, |
508 | 0xac600010, 0x8f820018, 0xac500014, 0x8f850018, 0x3c026000, 0x8c434448, | 508 | 0x37, 0xb3, 0x63, 0xaf, 0x77, 0xd7, 0x8e, 0x03, 0x11, 0x07, 0x27, 0xbb, |
509 | 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010, | 509 | 0xf6, 0xcc, 0xce, 0xec, 0xcc, 0x37, 0x6f, 0xbe, 0xf7, 0x37, 0xfd, 0xbe, |
510 | 0x00621825, 0x0e0014cc, 0xaca3001c, 0x8e420020, 0x1040001e, 0x3c029000, | 510 | 0x78, 0x8d, 0x5a, 0xdb, 0x5b, 0xf3, 0x55, 0xec, 0xe7, 0xaf, 0x37, 0x18, |
511 | 0x0e00148e, 0x00000000, 0x8f820018, 0xac540000, 0x8f840018, 0x3c02008d, | 511 | 0x57, 0xed, 0xba, 0xe4, 0xa9, 0xf5, 0xe3, 0x9a, 0x72, 0xd9, 0x1b, 0xf0, |
512 | 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, | 512 | 0xfe, 0xc7, 0x68, 0x51, 0xd8, 0x86, 0x94, 0xad, 0xee, 0xc5, 0x40, 0x9b, |
513 | 0xac600010, 0x8f840018, 0x240207ee, 0xac820014, 0x8f850018, 0x3c026000, | 513 | 0xd9, 0xff, 0x33, 0x16, 0x03, 0x3e, 0x9b, 0x68, 0xad, 0x6d, 0x8a, 0xed, |
514 | 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, | 514 | 0x71, 0xd9, 0x16, 0xde, 0xda, 0xc2, 0xb6, 0x10, 0x3c, 0x16, 0xfd, 0x9e, |
515 | 0x3c024019, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000, 0x34420001, | 515 | 0xb1, 0xa8, 0xc9, 0xea, 0xa1, 0x16, 0xed, 0x74, 0x88, 0x21, 0xbf, 0x9d, |
516 | 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, | 516 | 0x67, 0x6c, 0x05, 0xca, 0xce, 0x4f, 0x5d, 0x36, 0x3c, 0xe0, 0x73, 0xdc, |
517 | 0x00000000, 0x93630023, 0x3c028000, 0x34420001, 0x02821025, 0x306300bf, | 517 | 0x59, 0xeb, 0xc0, 0x27, 0xb5, 0x9d, 0x1a, 0x51, 0xed, 0x01, 0x8f, 0xc9, |
518 | 0xa3630023, 0xaf420020, 0x8fa2001c, 0x1040000e, 0x8fa20014, 0x92c2000a, | 518 | 0xc5, 0x45, 0x82, 0xbe, 0x86, 0x36, 0xe3, 0x82, 0xe3, 0xfa, 0x39, 0x14, |
519 | 0xa3620082, 0x57c00005, 0x37de0008, 0x8fa30014, 0x10600004, 0x00000000, | 519 | 0x8f, 0xf1, 0xfa, 0x1b, 0x88, 0xe5, 0x70, 0xda, 0x3f, 0xd9, 0x76, 0xae, |
520 | 0x37de0008, 0x0a000b75, 0x24170001, 0x0e0012cf, 0x02802021, 0x8fa20014, | 520 | 0x9c, 0xe5, 0xbd, 0x42, 0xd4, 0x63, 0xbd, 0xef, 0x52, 0xdb, 0x82, 0xa8, |
521 | 0x10400003, 0x00000000, 0x37de0010, 0x24170001, 0x12e00020, 0x3c029000, | 521 | 0x27, 0xe3, 0x20, 0x1c, 0x1d, 0xd0, 0xe1, 0xe2, 0x8d, 0x74, 0x3f, 0xff, |
522 | 0x34420001, 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, | 522 | 0x9e, 0x13, 0xcc, 0xdd, 0x7f, 0xdd, 0x1d, 0x36, 0x3f, 0x34, 0x64, 0xae, |
523 | 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x03c21025, 0xa362007d, | 523 | 0xde, 0x56, 0xdc, 0x5d, 0xd9, 0x89, 0x06, 0x85, 0xaf, 0xc1, 0xad, 0x7b, |
524 | 0x8f640074, 0x34630001, 0x02831825, 0xaf430020, 0x04810006, 0x3c038000, | 524 | 0x41, 0x76, 0x5d, 0xe0, 0x3d, 0x7c, 0xa8, 0xba, 0x7f, 0xef, 0x84, 0x7d, |
525 | 0x02802021, 0x0e000470, 0x2405082a, 0x0a000b9b, 0x00000000, 0x8f4201f8, | 525 | 0xe8, 0x99, 0x16, 0x62, 0x1d, 0x44, 0x8e, 0xe5, 0x2b, 0x53, 0xc8, 0x45, |
526 | 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf5401c0, 0xa34201c4, | 526 | 0xaa, 0xe6, 0xef, 0x78, 0xf3, 0x3c, 0x20, 0x3f, 0x55, 0x9e, 0x87, 0xca, |
527 | 0xaf4301f8, 0x9363003f, 0x24020012, 0x14620004, 0x8fbf004c, 0x0e00140d, | 527 | 0x23, 0xc5, 0x7b, 0x24, 0x02, 0xf2, 0x3c, 0xdc, 0x32, 0x18, 0xf5, 0xea, |
528 | 0x00000000, 0x8fbf004c, 0x8fbe0048, 0x8fb70044, 0x8fb60040, 0x8fb5003c, | 528 | 0xdf, 0xc3, 0x2d, 0x7f, 0x57, 0x1c, 0xf9, 0x5b, 0xf0, 0xd8, 0xe3, 0x97, |
529 | 0x8fb40038, 0x8fb30034, 0x8fb20030, 0x8fb1002c, 0x8fb00028, 0x03e00008, | 529 | 0xf3, 0x6a, 0x2d, 0x20, 0xe7, 0x43, 0xf1, 0x94, 0xde, 0x00, 0x9e, 0x12, |
530 | 0x27bd0050, 0x27bdffe8, 0xafbf0014, 0xafb00010, 0x8f500180, 0x97420184, | 530 | 0x9c, 0xeb, 0xa1, 0xa5, 0x2f, 0xf2, 0x5e, 0x7e, 0x08, 0x7b, 0xb9, 0x51, |
531 | 0x30420200, 0x14400015, 0x00000000, 0x8f430188, 0x3c02ff00, 0x00621824, | 531 | 0x8b, 0xe9, 0x95, 0x72, 0xf0, 0xdc, 0x3a, 0x64, 0xa2, 0xca, 0xb9, 0x81, |
532 | 0x3c020200, 0x10620031, 0x0043102b, 0x14400007, 0x3c020300, 0x1060000b, | 532 | 0x5c, 0x44, 0x2c, 0x3c, 0xe6, 0xba, 0xe4, 0x60, 0x11, 0xbf, 0xa9, 0x58, |
533 | 0x3c020100, 0x1062000d, 0x00000000, 0x0a000c2c, 0x00000000, 0x10620027, | 533 | 0x52, 0xa5, 0x47, 0xbd, 0x23, 0xf2, 0x0c, 0xbe, 0x1b, 0x3f, 0xcc, 0x1c, |
534 | 0x3c020400, 0x1062003e, 0x02002021, 0x0a000c2c, 0x00000000, 0x0e000c31, | 534 | 0x18, 0xf2, 0x13, 0x76, 0xa6, 0x43, 0x0e, 0x1f, 0xbe, 0xcc, 0xbf, 0x8d, |
535 | 0x02002021, 0x0a000c2e, 0x8fbf0014, 0x93620005, 0x30420020, 0x1440005e, | 535 | 0x39, 0xd7, 0x92, 0x8b, 0xca, 0x6b, 0xa5, 0x4b, 0xfd, 0xd0, 0x41, 0xe6, |
536 | 0x8fbf0014, 0x3c029000, 0x34420001, 0x02021025, 0xaf420020, 0x3c038000, | 536 | 0x6f, 0x0e, 0x2f, 0xad, 0xb3, 0x41, 0xc4, 0x53, 0xda, 0xdb, 0x74, 0xa1, |
537 | 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620005, 0x3c038000, | 537 | 0xd8, 0x0c, 0x83, 0xf5, 0xf8, 0x4b, 0x79, 0x38, 0x4f, 0x42, 0x70, 0x9e, |
538 | 0x34630001, 0x02031825, 0x34420020, 0xa3620005, 0xaf430020, 0x93620005, | 538 | 0x9f, 0x3a, 0xc2, 0xe6, 0x44, 0x4f, 0xb3, 0x38, 0x9c, 0x53, 0x55, 0xfc, |
539 | 0x30420020, 0x14400003, 0x02002021, 0x0000000d, 0x02002021, 0x0e000766, | 539 | 0xa9, 0x72, 0xaa, 0x6f, 0x8f, 0x3a, 0x10, 0xa7, 0xe6, 0xc7, 0x04, 0xe6, |
540 | 0x24055854, 0x0a000c2e, 0x8fbf0014, 0x93620005, 0x30420001, 0x1040003f, | 540 | 0x1f, 0xfa, 0x9c, 0x5a, 0x87, 0xd0, 0xeb, 0x10, 0xf3, 0x87, 0x76, 0x8d, |
541 | 0x3c029000, 0x34420001, 0x02021025, 0xaf420020, 0x3c038000, 0x8f420020, | 541 | 0x06, 0x6b, 0xb0, 0x66, 0x13, 0x2f, 0x50, 0x2b, 0xb1, 0x7f, 0xc9, 0xd1, |
542 | 0x00431024, 0x1440fffd, 0x00000000, 0x93620023, 0x34420004, 0xa3620023, | 542 | 0x0a, 0x9d, 0xed, 0x69, 0xa6, 0xf3, 0x9e, 0x08, 0xd4, 0x79, 0x83, 0x72, |
543 | 0x93630005, 0x3c048000, 0x3c020800, 0x306300fe, 0xa3630005, 0x8c430020, | 543 | 0xa4, 0xcc, 0x80, 0x1c, 0x29, 0x37, 0x0e, 0x75, 0x17, 0x0e, 0xe3, 0x2e, |
544 | 0x34840001, 0x02042025, 0x0a000c0a, 0xaf440020, 0x00002821, 0x00003021, | 544 | 0x2e, 0x30, 0xc0, 0xdc, 0xb9, 0x8b, 0xf1, 0x04, 0xee, 0x1c, 0xa5, 0xd0, |
545 | 0x0e000fb1, 0x240708d9, 0x3c020800, 0x8c430020, 0x10600023, 0x8fbf0014, | 545 | 0x07, 0x6e, 0xee, 0xec, 0xf7, 0x13, 0x49, 0x5c, 0xfe, 0xdb, 0xdc, 0xa9, |
546 | 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, 0x93630082, 0x9362003f, | 546 | 0xa0, 0x7e, 0x27, 0x7c, 0xfd, 0x86, 0x1c, 0x9f, 0x6c, 0xc8, 0x13, 0x82, |
547 | 0x8f840018, 0x00031a00, 0x00431025, 0xac820004, 0x8f830018, 0xac600008, | 547 | 0x38, 0xfe, 0x4e, 0xf7, 0xd3, 0xbb, 0xf6, 0xd1, 0xa6, 0x09, 0xfd, 0x70, |
548 | 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac400014, | 548 | 0x74, 0xb1, 0xba, 0xee, 0x5f, 0xf0, 0xd9, 0xb9, 0xc1, 0x67, 0x43, 0xc2, |
549 | 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, | 549 | 0x27, 0xd7, 0x25, 0xf6, 0x90, 0x9d, 0x93, 0x61, 0x9d, 0x1e, 0x19, 0x66, |
550 | 0x944358ce, 0x8f850018, 0x3c02400a, 0x00621825, 0x0e0014cc, 0xaca3001c, | 550 | 0xf7, 0xd4, 0xec, 0xfc, 0x88, 0x21, 0xec, 0x73, 0x74, 0x0e, 0xb9, 0xef, |
551 | 0x0a000c2e, 0x8fbf0014, 0x0000000d, 0x8fbf0014, 0x8fb00010, 0x03e00008, | 551 | 0x14, 0x1a, 0xc6, 0xa5, 0xe2, 0x3b, 0xe9, 0x1b, 0x38, 0x77, 0x04, 0xb2, |
552 | 0x27bd0018, 0x27bdffe8, 0xafbf0010, 0x8f420188, 0x00803021, 0x93640000, | 552 | 0x1b, 0xf2, 0xfc, 0xf4, 0x6c, 0xd8, 0x34, 0x1c, 0x1f, 0x03, 0xfc, 0x08, |
553 | 0x24030020, 0x00021402, 0x10830008, 0x304500ff, 0x3c036018, 0x8c625000, | 553 | 0xc0, 0xa9, 0x7a, 0x7e, 0x90, 0x0d, 0x3d, 0x68, 0x0e, 0x87, 0x7c, 0x73, |
554 | 0x34420400, 0xac625000, 0x0000000d, 0x00000000, 0x24000955, 0x9363003f, | 554 | 0x28, 0xf1, 0x06, 0x6e, 0x8f, 0x58, 0xbc, 0x83, 0x9e, 0x38, 0xc5, 0x9d, |
555 | 0x24020012, 0x14620023, 0x3c029000, 0x34420001, 0x3c038000, 0x00c21025, | 555 | 0x18, 0x93, 0xee, 0x80, 0x78, 0x41, 0xc4, 0xfa, 0xf9, 0xfa, 0xcb, 0xef, |
556 | 0xaf650178, 0xa365007a, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, | 556 | 0x7c, 0x51, 0xf3, 0xaf, 0xad, 0x49, 0x6d, 0xba, 0x3c, 0xad, 0x4d, 0x15, |
557 | 0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001, | 557 | 0x51, 0xee, 0xa2, 0x56, 0xdb, 0x97, 0x36, 0x5d, 0x1c, 0x11, 0x7c, 0x30, |
558 | 0x00c31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00c02021, 0x0e000470, | 558 | 0x79, 0xad, 0x42, 0x78, 0x4f, 0xdb, 0xbe, 0x25, 0xb8, 0xed, 0x80, 0x0f, |
559 | 0x24050963, 0x0a000c79, 0x8fbf0010, 0x8f4201f8, 0x00431024, 0x1440fffd, | 559 | 0xab, 0x8a, 0x73, 0x18, 0x2d, 0xbc, 0x97, 0xb4, 0xbd, 0xb8, 0xb9, 0x8e, |
560 | 0x24020002, 0x3c031000, 0xaf4601c0, 0xa34201c4, 0xaf4301f8, 0x0a000c79, | 560 | 0x5b, 0xbe, 0x3f, 0x1d, 0x20, 0xdf, 0x9b, 0xd9, 0x0a, 0x91, 0xbf, 0x29, |
561 | 0x8fbf0010, 0x9362007e, 0x1445000e, 0x00000000, 0x8f620178, 0x1045000b, | 561 | 0xe2, 0xb2, 0xa9, 0x68, 0x21, 0xde, 0xf1, 0x30, 0xe2, 0x7b, 0xe1, 0xd7, |
562 | 0x00000000, 0x8f820000, 0xaf650178, 0x8f660178, 0x8f440180, 0x8f65004c, | 562 | 0xa8, 0x62, 0xe1, 0x6e, 0x30, 0x16, 0xaa, 0xf6, 0x60, 0x1d, 0xb9, 0xa3, |
563 | 0x8c430000, 0x0060f809, 0x30c600ff, 0x0a000c79, 0x8fbf0010, 0xaf650178, | 563 | 0x2c, 0x8b, 0xc3, 0xe9, 0x5e, 0x0a, 0x99, 0x28, 0xff, 0x6c, 0xe2, 0x3e, |
564 | 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafbf0010, 0x93630000, | 564 | 0x1d, 0x73, 0x78, 0x09, 0xfc, 0x3c, 0xb2, 0xde, 0x4c, 0x0b, 0x76, 0xe1, |
565 | 0x24020020, 0x10620005, 0x00000000, 0x93630000, 0x24020030, 0x1462004d, | 565 | 0x60, 0x7f, 0x46, 0x84, 0x65, 0xf3, 0x67, 0xbd, 0xad, 0xf9, 0x33, 0x54, |
566 | 0x8fbf0010, 0x93420148, 0x2444ffff, 0x2c830005, 0x10600047, 0x3c020800, | 566 | 0x39, 0xd4, 0xed, 0xa2, 0x35, 0x0b, 0x71, 0x92, 0xf0, 0x2f, 0x75, 0x77, |
567 | 0x24425800, 0x00041880, 0x00621821, 0x8c640000, 0x00800008, 0x00000000, | 567 | 0xb4, 0x9b, 0x41, 0xf2, 0x4f, 0xc5, 0x7e, 0x82, 0x1f, 0xc9, 0xb9, 0xba, |
568 | 0x8f430144, 0x8f62000c, 0x14620006, 0x24020001, 0xaf62000c, 0x0e000d59, | 568 | 0x41, 0x98, 0x3b, 0x9b, 0xbe, 0x6f, 0x30, 0x57, 0xdb, 0xb1, 0x29, 0x37, |
569 | 0x00000000, 0x0a000cd1, 0x8fbf0010, 0x8f62000c, 0x0a000cca, 0x00000000, | 569 | 0x9f, 0x2b, 0xc3, 0x33, 0x57, 0xd8, 0x8b, 0x9a, 0xcd, 0x95, 0xf2, 0x43, |
570 | 0x97630010, 0x8f420144, 0x14430006, 0x24020001, 0xa7620010, 0x0e00137a, | 570 | 0x2a, 0xdf, 0xdc, 0x51, 0xc8, 0x93, 0x45, 0xf7, 0x5c, 0xed, 0x8c, 0x7f, |
571 | 0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620010, 0x0a000cca, 0x00000000, | 571 | 0x4e, 0xce, 0xd9, 0x4e, 0xfb, 0xe0, 0x1a, 0x8f, 0x43, 0x34, 0xd0, 0x76, |
572 | 0x97630012, 0x8f420144, 0x14430006, 0x24020001, 0xa7620012, 0x0e001395, | 572 | 0x12, 0x2c, 0x33, 0xfc, 0x6b, 0xeb, 0x86, 0x5c, 0x5b, 0xcc, 0x2b, 0x9e, |
573 | 0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620012, 0x0a000cca, 0x00000000, | 573 | 0x6f, 0xb8, 0xb6, 0xb0, 0x0f, 0x5c, 0x70, 0xf6, 0x81, 0xd3, 0x3e, 0x7d, |
574 | 0x97630014, 0x8f420144, 0x14430006, 0x24020001, 0xa7620014, 0x0e0013bb, | 574 | 0x51, 0xd9, 0xbc, 0xff, 0xab, 0xed, 0x0d, 0xcf, 0x7d, 0x22, 0xce, 0xe9, |
575 | 0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620014, 0x0a000cca, 0x00000000, | 575 | 0xc8, 0x91, 0xdc, 0x47, 0xce, 0x37, 0xe4, 0x61, 0x3d, 0xdb, 0x5c, 0xa7, |
576 | 0x97630016, 0x8f420144, 0x14430006, 0x24020001, 0xa7620016, 0x0e0013be, | 576 | 0x6a, 0xee, 0x91, 0x73, 0x01, 0x79, 0x99, 0xa5, 0xf3, 0xf9, 0xc7, 0x06, |
577 | 0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620016, 0x14400006, 0x8fbf0010, | 577 | 0x75, 0xf7, 0x53, 0xa4, 0x1a, 0xd3, 0x72, 0x40, 0xf0, 0x61, 0xb7, 0xbe, |
578 | 0x3c030800, 0x8c620070, 0x24420001, 0xac620070, 0x8fbf0010, 0x03e00008, | 578 | 0xbc, 0xec, 0xe4, 0x28, 0xe6, 0x5c, 0x63, 0xb0, 0x9c, 0xcf, 0x36, 0x89, |
579 | 0x27bd0018, 0x27bdffe0, 0x3c029000, 0xafbf001c, 0xafb20018, 0xafb10014, | 579 | 0xa7, 0x6f, 0x25, 0x9e, 0x63, 0xc0, 0x23, 0x37, 0xbd, 0x73, 0x35, 0xa1, |
580 | 0xafb00010, 0x8f500140, 0x34420001, 0x3c038000, 0x02021025, 0xaf420020, | 580 | 0x65, 0xf2, 0xa8, 0xb3, 0x87, 0xce, 0xea, 0x9f, 0xf0, 0x18, 0x3d, 0xb1, |
581 | 0x8f420020, 0x00431024, 0x1440fffd, 0x24020012, 0x24030080, 0xa362003f, | 581 | 0x23, 0xe2, 0x9c, 0x11, 0xe0, 0xd2, 0xb6, 0x97, 0xcd, 0x0e, 0x5a, 0x94, |
582 | 0xa3630082, 0x93620023, 0x30420040, 0x10400007, 0x00008821, 0x93620023, | 582 | 0x7e, 0x46, 0x9a, 0xfa, 0xf8, 0x12, 0x15, 0x85, 0x7f, 0x0b, 0xb9, 0x51, |
583 | 0x24110001, 0x304200bf, 0xa3620023, 0x0a000cf0, 0x3c028000, 0x3c028000, | 583 | 0xb0, 0x71, 0xc3, 0x47, 0x87, 0xe7, 0xf0, 0xf7, 0x1b, 0x13, 0x8e, 0xcc, |
584 | 0x34420001, 0x3c039000, 0x34630001, 0x3c048000, 0x02021025, 0x02031825, | 584 | 0xfd, 0x93, 0x31, 0x8c, 0x7a, 0x38, 0x0b, 0x01, 0xeb, 0x9d, 0x34, 0xc9, |
585 | 0xaf420020, 0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd, 0x00000000, | 585 | 0x31, 0xb9, 0x1d, 0x71, 0x4e, 0x80, 0x8c, 0xcd, 0xbb, 0x5d, 0xde, 0x8e, |
586 | 0x9362007d, 0x3c038000, 0x34420020, 0xa362007d, 0x8f640074, 0x34630001, | 586 | 0x4f, 0xa1, 0x55, 0xbd, 0xe4, 0xeb, 0x68, 0xd8, 0xfc, 0x72, 0xcf, 0xf6, |
587 | 0x02031825, 0xaf430020, 0x04810006, 0x3c038000, 0x02002021, 0x0e000470, | 587 | 0x7d, 0x0a, 0x2a, 0x77, 0x5f, 0x71, 0x58, 0x75, 0x2d, 0x73, 0x69, 0xc1, |
588 | 0x24050a63, 0x0a000d13, 0x00000000, 0x8f4201f8, 0x00431024, 0x1440fffd, | 588 | 0x99, 0xe7, 0xd7, 0x55, 0xde, 0x6d, 0x77, 0x40, 0xde, 0x6d, 0x88, 0xe6, |
589 | 0x24020002, 0x3c031000, 0xaf5001c0, 0xa34201c4, 0xaf4301f8, 0x1220003f, | 589 | 0x84, 0xaf, 0x2e, 0x44, 0x39, 0x47, 0x37, 0x93, 0x9c, 0x5a, 0xd9, 0x6a, |
590 | 0x3c120800, 0x8e420020, 0x8f71004c, 0x1040003c, 0x8fbf001c, 0x0e00148e, | 590 | 0x23, 0x4e, 0xfc, 0x29, 0xee, 0xdd, 0x39, 0xf9, 0x7c, 0x5f, 0x04, 0xcf, |
591 | 0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x24020001, 0xac820004, | 591 | 0x46, 0x4e, 0xb5, 0x2d, 0x62, 0xf1, 0x33, 0xa2, 0x5c, 0xa7, 0xa7, 0x1c, |
592 | 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, | 592 | 0xdf, 0x17, 0xd5, 0x33, 0x3b, 0xb9, 0x7c, 0x8a, 0x64, 0x0e, 0x7d, 0x27, |
593 | 0x8f820018, 0xac510014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, | 593 | 0xcd, 0x15, 0x9b, 0xf5, 0x6b, 0x1f, 0xe2, 0x81, 0xe3, 0xf0, 0x95, 0x0a, |
594 | 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010, 0x00621825, | 594 | 0xbf, 0x95, 0xa1, 0xfa, 0x80, 0x3e, 0xb5, 0x57, 0xfb, 0x04, 0xf9, 0x14, |
595 | 0x0e0014cc, 0xaca3001c, 0x8e420020, 0x1040001e, 0x8fbf001c, 0x0e00148e, | 595 | 0x12, 0x7e, 0x05, 0xbe, 0x76, 0xda, 0x99, 0x23, 0x77, 0xbf, 0xc2, 0xdc, |
596 | 0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x3c02008d, 0xac820004, | 596 | 0x2f, 0x3c, 0xa7, 0xd3, 0x55, 0xb6, 0xd3, 0x55, 0xb6, 0x36, 0x5e, 0x3a, |
597 | 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, | 597 | 0xeb, 0x54, 0x0b, 0xe5, 0x1f, 0x59, 0x2f, 0xfd, 0x56, 0xd8, 0xe6, 0xe6, |
598 | 0x8f840018, 0x24020a6a, 0xac820014, 0x8f850018, 0x3c026000, 0x8c434448, | 598 | 0xb3, 0x06, 0x2d, 0xac, 0xf7, 0xf2, 0x27, 0xc6, 0x1f, 0x94, 0xdb, 0xcb, |
599 | 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024019, | 599 | 0xff, 0xdd, 0x9c, 0xa2, 0x5f, 0xc4, 0x02, 0xb6, 0xce, 0x07, 0x83, 0xf1, |
600 | 0x00621825, 0x0e0014cc, 0xaca3001c, 0x8fbf001c, 0x8fb20018, 0x8fb10014, | 600 | 0x1f, 0xbc, 0x6e, 0x13, 0x01, 0xeb, 0xb6, 0xf9, 0xbe, 0x22, 0xf7, 0x93, |
601 | 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0010, 0x93620081, | 601 | 0xe4, 0x95, 0x8a, 0x23, 0xaf, 0x36, 0x69, 0xd0, 0x27, 0xa7, 0x82, 0xd6, |
602 | 0x3c030800, 0x8c640048, 0x0044102b, 0x14400005, 0x00000000, 0x0e000cd3, | 602 | 0x29, 0xfa, 0x78, 0xca, 0xe9, 0xe3, 0x9b, 0xa2, 0x3f, 0xe3, 0x54, 0xa8, |
603 | 0x00000000, 0x0a000da4, 0x8fbf0010, 0x93620081, 0x24420001, 0x0e0013c4, | 603 | 0xe6, 0x0d, 0x1f, 0xe1, 0xeb, 0x98, 0xb2, 0xd1, 0x35, 0x90, 0xab, 0xdf, |
604 | 0xa3620081, 0x9763006a, 0x00032880, 0x14a00002, 0x00403821, 0x24050001, | 604 | 0x6c, 0x43, 0xc6, 0x04, 0x71, 0xb2, 0x03, 0x01, 0xfa, 0x80, 0xee, 0xd2, |
605 | 0x97630068, 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804, | 605 | 0x07, 0xe2, 0x55, 0x7d, 0x60, 0x45, 0xe8, 0x09, 0xbb, 0x1c, 0x1d, 0x34, |
606 | 0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b, | 606 | 0xd8, 0x16, 0x97, 0xcb, 0xe3, 0xcc, 0x1b, 0xd8, 0xf8, 0xa4, 0x1d, 0x7d, |
607 | 0x54600001, 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021, | 607 | 0xda, 0xaa, 0x9e, 0x99, 0xc3, 0xba, 0x65, 0x8d, 0x4b, 0xfb, 0xe5, 0x09, |
608 | 0xaf62000c, 0x10e00021, 0x3c029000, 0x8f450140, 0x34420001, 0x3c038000, | 608 | 0xce, 0xac, 0xa8, 0xcc, 0x3e, 0x30, 0xa3, 0xa4, 0xa5, 0x93, 0xf1, 0xa9, |
609 | 0x00a21025, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, | 609 | 0x50, 0x84, 0x16, 0xac, 0x28, 0x15, 0xac, 0x14, 0x73, 0x70, 0xf0, 0xe3, |
610 | 0x9362007d, 0x3c038000, 0x34420004, 0xa362007d, 0x8f640074, 0x34630001, | 610 | 0xd0, 0x80, 0x46, 0x11, 0x96, 0x35, 0x11, 0x2a, 0x95, 0x94, 0x4e, 0x76, |
611 | 0x00a31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021, 0x0e000470, | 611 | 0x86, 0xc8, 0x2c, 0xc6, 0xa4, 0x0d, 0x9b, 0x71, 0x9a, 0x1f, 0x33, 0xe6, |
612 | 0x24050a92, 0x0a000da4, 0x8fbf0010, 0x8f4201f8, 0x00431024, 0x1440fffd, | 612 | 0x49, 0x43, 0xcc, 0x8b, 0x93, 0xa3, 0x0e, 0x0c, 0x8a, 0x38, 0x4b, 0xfd, |
613 | 0x24020002, 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8, 0x8fbf0010, | 613 | 0xe5, 0x91, 0x28, 0xb5, 0xa7, 0xa5, 0xcd, 0x68, 0x86, 0xdb, 0xf8, 0xc2, |
614 | 0x03e00008, 0x27bd0018, 0x27bdffd8, 0xafb3001c, 0x27530100, 0xafbf0024, | 614 | 0x8a, 0xd1, 0x95, 0x7c, 0xd2, 0x38, 0xc1, 0xed, 0x64, 0xac, 0x64, 0x62, |
615 | 0xafb40020, 0xafb20018, 0xafb10014, 0xafb00010, 0x96620008, 0x3c140800, | 615 | 0x92, 0x9f, 0x5d, 0x2c, 0x45, 0x28, 0x67, 0x45, 0xa8, 0x50, 0x4a, 0x19, |
616 | 0x8f520100, 0x30420001, 0x104000da, 0x00000000, 0x8e700018, 0x8f630054, | 616 | 0x43, 0x6d, 0xa2, 0xcd, 0x18, 0xda, 0x7c, 0x49, 0x1f, 0x33, 0x4e, 0x92, |
617 | 0x2602ffff, 0x00431023, 0x18400006, 0x00000000, 0x0000000d, 0x00000000, | 617 | 0xbb, 0xcd, 0xaf, 0x9c, 0x36, 0xbd, 0x6d, 0xfd, 0x61, 0xe3, 0xfe, 0x44, |
618 | 0x2400015c, 0x0a000dea, 0x00008821, 0x8f62004c, 0x02021023, 0x18400028, | 618 | 0xa8, 0x32, 0x7b, 0x9f, 0xf1, 0x92, 0x5b, 0x9d, 0x60, 0xd9, 0x14, 0x13, |
619 | 0x00008821, 0x93650120, 0x93640121, 0x3c030800, 0x8c62008c, 0x308400ff, | 619 | 0x67, 0xdb, 0x68, 0xe9, 0x34, 0xcb, 0x1d, 0x9c, 0x6d, 0x61, 0xd0, 0x62, |
620 | 0x24420001, 0x30a500ff, 0x00803821, 0x1485000b, 0xac62008c, 0x3c040800, | 620 | 0x39, 0x4e, 0xef, 0x57, 0xed, 0x07, 0x12, 0x43, 0x39, 0x91, 0x43, 0x84, |
621 | 0x8c830090, 0x24630001, 0xac830090, 0x93620122, 0x30420001, 0x00021023, | 621 | 0x33, 0x17, 0x2a, 0xb3, 0xbf, 0x9b, 0x5e, 0x7f, 0x3f, 0xeb, 0x5b, 0x1f, |
622 | 0x30420005, 0x0a000dea, 0x34510004, 0x27660100, 0x00041080, 0x00c21021, | 622 | 0xc5, 0x28, 0x72, 0x15, 0x71, 0xdd, 0x36, 0x5d, 0x1b, 0x4f, 0x5e, 0xd9, |
623 | 0x8c430000, 0x02031823, 0x04600004, 0x24820001, 0x30440007, 0x1485fff9, | 623 | 0x14, 0x79, 0x68, 0x09, 0x5a, 0x33, 0xa5, 0x3c, 0xcd, 0x71, 0xf9, 0x15, |
624 | 0x00041080, 0x10870007, 0x3c030800, 0xa3640121, 0x8c620094, 0x24110005, | 624 | 0x94, 0x5b, 0x4b, 0xd0, 0x3d, 0x91, 0x8f, 0xd6, 0x4e, 0x77, 0xf4, 0x18, |
625 | 0x24420001, 0x0a000dea, 0xac620094, 0x24110004, 0x32220001, 0x1040001e, | 625 | 0x85, 0x6e, 0x9a, 0xc6, 0xbc, 0xf0, 0x0b, 0x57, 0x66, 0x87, 0x86, 0x0d, |
626 | 0x8e820020, 0x1040001d, 0x32220004, 0x0e00148e, 0x00000000, 0x8f820018, | 626 | 0xd2, 0xae, 0xa2, 0x1e, 0xff, 0xbf, 0x89, 0xfb, 0x28, 0x61, 0x7e, 0x66, |
627 | 0xac520000, 0x8f840018, 0x24020001, 0xac820004, 0x8f830018, 0xac600008, | 627 | 0xac, 0x31, 0x5e, 0x49, 0xc3, 0xf1, 0x12, 0x64, 0xf3, 0x41, 0x89, 0xa5, |
628 | 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac500014, | 628 | 0x39, 0x23, 0x42, 0xd0, 0x5f, 0x61, 0x7b, 0xeb, 0x35, 0x27, 0x7b, 0xa4, |
629 | 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, | 629 | 0xfe, 0xe4, 0x3b, 0x9b, 0x43, 0x9f, 0x19, 0x71, 0x9f, 0xcf, 0x51, 0x7b, |
630 | 0x944358ce, 0x8f850018, 0x3c024010, 0x00621825, 0x0e0014cc, 0xaca3001c, | 630 | 0x66, 0xc6, 0x92, 0xef, 0xb9, 0x52, 0xee, 0xa5, 0x25, 0x6e, 0x7b, 0x64, |
631 | 0x32220004, 0x10400081, 0x00003821, 0x3c029000, 0x34420001, 0x3c038000, | 631 | 0xf8, 0x8c, 0x73, 0xa6, 0x0f, 0xff, 0xd9, 0x8b, 0x7b, 0x85, 0xb7, 0x7d, |
632 | 0x02421025, 0xa360007c, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, | 632 | 0x7d, 0x14, 0xc5, 0x3d, 0x0d, 0xe8, 0x3c, 0xc7, 0xb0, 0xe9, 0x87, 0xc5, |
633 | 0x00000000, 0x93620023, 0x30420080, 0x10400011, 0x00000000, 0x8f65005c, | 633 | 0xb8, 0xa7, 0xe2, 0x98, 0xcb, 0xb9, 0xb8, 0x3a, 0x97, 0x08, 0x65, 0xba, |
634 | 0x8f63004c, 0x9764003c, 0x8f620064, 0x00a32823, 0x00852821, 0x00a2102b, | 634 | 0xe9, 0x91, 0xd5, 0x45, 0x3f, 0x8b, 0xf3, 0x47, 0xf8, 0xba, 0x84, 0x9c, |
635 | 0x54400006, 0x3c023fff, 0x93620023, 0x3042007f, 0xa3620023, 0xaf700064, | 635 | 0xa3, 0x36, 0xca, 0x64, 0xbb, 0x69, 0xb3, 0x14, 0x66, 0x71, 0x05, 0xec, |
636 | 0x3c023fff, 0x0a000e37, 0x3442ffff, 0x8f62005c, 0x02021023, 0x04400011, | 636 | 0x44, 0xb9, 0x4c, 0x81, 0xa6, 0xd6, 0x5f, 0xeb, 0x83, 0x1f, 0x66, 0x52, |
637 | 0x00000000, 0x8f65005c, 0x8f630064, 0x9764003c, 0x3c023fff, 0x3442ffff, | 637 | 0xab, 0x61, 0xe9, 0x51, 0x00, 0x96, 0x7e, 0xa9, 0xc3, 0xd2, 0xd1, 0xbe, |
638 | 0xaf700064, 0x00a32823, 0x00852821, 0x0045102b, 0x10400004, 0x02051021, | 638 | 0xe6, 0x58, 0xea, 0x77, 0x62, 0xd6, 0xa3, 0x14, 0x71, 0x70, 0xf4, 0x39, |
639 | 0x3c053fff, 0x34a5ffff, 0x02051021, 0xaf62005c, 0x24070001, 0xaf70004c, | 639 | 0xe3, 0xe8, 0x3d, 0xc6, 0xd1, 0xf1, 0x06, 0x38, 0xd2, 0x3c, 0x38, 0x3a, |
640 | 0x8f620054, 0x16020005, 0x00000000, 0x93620023, 0x30420040, 0x10400017, | 640 | 0x51, 0x87, 0xa3, 0x6c, 0x5f, 0x33, 0x1c, 0x1d, 0x0f, 0xa1, 0xff, 0xcd, |
641 | 0x24020001, 0x9762006a, 0x00022880, 0x50a00001, 0x24050001, 0x97630068, | 641 | 0xd6, 0x32, 0xfa, 0xb0, 0x9f, 0x39, 0xbd, 0x49, 0xa5, 0xd5, 0xe4, 0xf8, |
642 | 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b, | 642 | 0x24, 0x55, 0x90, 0x73, 0x92, 0x58, 0xa2, 0xb4, 0xe0, 0x76, 0x05, 0x81, |
643 | 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001, | 643 | 0xbf, 0x2c, 0x8f, 0xc9, 0xae, 0x06, 0xe7, 0xaa, 0x24, 0x9c, 0x79, 0x93, |
644 | 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021, 0xaf62000c, | 644 | 0x73, 0x99, 0xc9, 0x57, 0x66, 0x1f, 0x32, 0x36, 0xee, 0x6d, 0xe8, 0x3a, |
645 | 0x93620082, 0x30420080, 0x50400001, 0xa3600081, 0x3c028000, 0x34420001, | 645 | 0x7e, 0x0b, 0xb1, 0x8c, 0xbc, 0xbb, 0x81, 0x73, 0x5b, 0xe2, 0x74, 0xdf, |
646 | 0x02421025, 0xaf420020, 0x9363007e, 0x9362007a, 0x10620004, 0x00000000, | 646 | 0x1a, 0xa0, 0x7b, 0xd6, 0x7e, 0xba, 0x6b, 0x0d, 0xd2, 0x03, 0x0b, 0x6d, |
647 | 0x0e0013c4, 0x00000000, 0x00403821, 0x10e0001f, 0x3c029000, 0x34420001, | 647 | 0x60, 0x0e, 0xf8, 0x5e, 0xcc, 0x81, 0x46, 0x33, 0x31, 0x2e, 0x53, 0xda, |
648 | 0x02421025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, | 648 | 0x4f, 0x95, 0x92, 0xc2, 0x35, 0xb0, 0x03, 0x0c, 0x35, 0xc6, 0x4e, 0xa6, |
649 | 0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001, | 649 | 0x0e, 0x3b, 0xb2, 0x0e, 0x30, 0xb3, 0xe4, 0xb7, 0xad, 0xed, 0x32, 0xf8, |
650 | 0x02431825, 0xaf430020, 0x04810006, 0x3c038000, 0x02402021, 0x0e000470, | 650 | 0x5d, 0x0d, 0xc6, 0x56, 0x58, 0xc4, 0x91, 0x24, 0x47, 0x67, 0x42, 0x90, |
651 | 0x24050b3d, 0x0a000e8d, 0x00000000, 0x8f4201f8, 0x00431024, 0x1440fffd, | 651 | 0x59, 0xb7, 0x18, 0x53, 0x3c, 0x17, 0x3c, 0x7e, 0xda, 0xf5, 0x41, 0x96, |
652 | 0x24020002, 0x3c031000, 0xaf5201c0, 0xa34201c4, 0xaf4301f8, 0x9342010b, | 652 | 0x39, 0x4f, 0x09, 0x1b, 0xf4, 0x94, 0xa9, 0xc7, 0x33, 0x64, 0x5f, 0xd6, |
653 | 0x9343010b, 0x8e820020, 0x27500100, 0x38630006, 0x10400029, 0x2c710001, | 653 | 0xcc, 0x31, 0x91, 0xeb, 0xb6, 0x54, 0xf6, 0x9e, 0x31, 0x91, 0xe1, 0xb1, |
654 | 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018, | 654 | 0x57, 0x78, 0xf4, 0xca, 0xa1, 0x76, 0xaa, 0x38, 0x31, 0x4c, 0x85, 0x55, |
655 | 0x96020008, 0xac820004, 0x8f830018, 0x8e020014, 0xac620008, 0x8f850018, | 655 | 0xdb, 0x7e, 0xc8, 0xfc, 0x7f, 0xcd, 0x84, 0xcc, 0xfe, 0xdb, 0xae, 0xc4, |
656 | 0x3c026000, 0x8c434448, 0xaca3000c, 0x8f840018, 0x96020012, 0xac820010, | 656 | 0x74, 0x5a, 0x36, 0x55, 0xdf, 0xee, 0x08, 0x7c, 0x31, 0x47, 0xa4, 0x77, |
657 | 0x8f850018, 0x8e030020, 0xaca30014, 0x9602000c, 0x9603000e, 0x8f840018, | 657 | 0x37, 0xaa, 0xaf, 0xc4, 0xbf, 0xe3, 0xbb, 0xbf, 0x04, 0x97, 0x59, 0xab, |
658 | 0x00021400, 0x00431025, 0xac820018, 0x12200005, 0x3c020800, 0x944358ce, | 658 | 0x96, 0x85, 0xed, 0xf8, 0xd2, 0xd8, 0xc2, 0x2a, 0xce, 0x7e, 0x7b, 0xfc, |
659 | 0x8f840018, 0x0a000eb8, 0x3c024013, 0x944358ce, 0x8f840018, 0x3c024014, | 659 | 0xea, 0xf9, 0xd5, 0x5c, 0x1f, 0x4b, 0xd8, 0x94, 0x4e, 0x76, 0x68, 0x79, |
660 | 0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001, 0x8e700014, 0x8f620040, | 660 | 0x3c, 0xf7, 0x5c, 0x98, 0x86, 0x19, 0x97, 0x38, 0x83, 0x6b, 0x6c, 0x34, |
661 | 0x14500003, 0x00501023, 0x0a000ec3, 0x00001021, 0x28420001, 0x1040003a, | 661 | 0x2c, 0xce, 0x38, 0xd9, 0xcd, 0x78, 0xc8, 0x0a, 0x3b, 0xfd, 0xd4, 0x91, |
662 | 0x00000000, 0x0e000fae, 0x02002021, 0xaf700040, 0x9362003e, 0x30420001, | 662 | 0x09, 0x9a, 0x2c, 0xa7, 0xf9, 0x53, 0x3f, 0x7e, 0xb5, 0xb9, 0xe3, 0xe1, |
663 | 0x1440000b, 0x3c029000, 0x93620022, 0x24420001, 0xa3620022, 0x93630022, | 663 | 0x48, 0xe3, 0x37, 0x37, 0xff, 0xa8, 0xd5, 0x9d, 0xe6, 0xba, 0x33, 0x5b, |
664 | 0x3c020800, 0x8c440098, 0x0064182b, 0x14600025, 0x3c020800, 0x3c029000, | 664 | 0xd6, 0x55, 0xe7, 0x12, 0xfd, 0x03, 0x69, 0xae, 0x1b, 0xa3, 0xbc, 0x57, |
665 | 0x34420001, 0x02421025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, | 665 | 0x00, 0x00, 0x00 }; |
666 | 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x34420001, 0xa362007d, | ||
667 | 0x8f640074, 0x34630001, 0x02431825, 0xaf430020, 0x04810006, 0x3c038000, | ||
668 | 0x02402021, 0x0e000470, 0x24050273, 0x0a000ef6, 0x24020001, 0x8f4201f8, | ||
669 | 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf5201c0, 0xa34201c4, | ||
670 | 0xaf4301f8, 0x24020001, 0xa7620012, 0x0a000efe, 0xa3600022, 0x9743007a, | ||
671 | 0x9444002a, 0x00641821, 0x3063fffe, 0xa7630012, 0x97420108, 0x8fbf0024, | ||
672 | 0x8fb40020, 0x8fb3001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x00021042, | ||
673 | 0x30420001, 0x03e00008, 0x27bd0028, 0x27bdffe0, 0xafb20018, 0x3c120800, | ||
674 | 0x8e420020, 0xafb00010, 0x27500100, 0xafbf001c, 0x10400046, 0xafb10014, | ||
675 | 0x0e00148e, 0x00000000, 0x8f840018, 0x8e020000, 0xac820000, 0x936300b1, | ||
676 | 0x936200c5, 0x8f850018, 0x00031e00, 0x00021400, 0x34420100, 0x00621825, | ||
677 | 0xaca30004, 0x8f840018, 0x8e02001c, 0xac820008, 0x8f830018, 0x8f620048, | ||
678 | 0xac62000c, 0x8f840018, 0x96020012, 0xac820010, 0x8f830018, 0x8f620040, | ||
679 | 0x24040001, 0xac620014, 0x8f850018, 0x3c026000, 0x8c434448, 0x3c020800, | ||
680 | 0x245158c0, 0xaca30018, 0x9623000e, 0x8f850018, 0x3c024016, 0x00621825, | ||
681 | 0x0e0014cc, 0xaca3001c, 0x96030008, 0x30630010, 0x1060001c, 0x8e420020, | ||
682 | 0x1040001a, 0x8e100000, 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, | ||
683 | 0x8f830018, 0xac600004, 0x8f820018, 0xac400008, 0x8f830018, 0xac60000c, | ||
684 | 0x8f820018, 0xac400010, 0x8f830018, 0xac600014, 0x8f850018, 0x3c036000, | ||
685 | 0x8c634448, 0x24040001, 0xaca30018, 0x9622000e, 0x8f850018, 0x3c034015, | ||
686 | 0x00431025, 0x0e0014cc, 0xaca2001c, 0x00001021, 0x8fbf001c, 0x8fb20018, | ||
687 | 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe0, 0xafb20018, | ||
688 | 0x3c120800, 0x8e420020, 0xafb00010, 0x27500100, 0xafbf001c, 0x10400041, | ||
689 | 0xafb10014, 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, | ||
690 | 0x8f840018, 0x24020100, 0xac820004, 0x8f830018, 0x8e02001c, 0xac620008, | ||
691 | 0x8f840018, 0x8e020018, 0xac82000c, 0x8f830018, 0x96020012, 0xac620010, | ||
692 | 0x8f840018, 0x96020008, 0xac820014, 0x8f850018, 0x3c026000, 0x8c434448, | ||
693 | 0x24040001, 0x3c020800, 0x245158c0, 0xaca30018, 0x9623000e, 0x8f850018, | ||
694 | 0x3c024017, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x96030008, 0x30630010, | ||
695 | 0x1060001c, 0x8e420020, 0x1040001a, 0x8e100000, 0x0e00148e, 0x00000000, | ||
696 | 0x8f820018, 0xac500000, 0x8f830018, 0xac600004, 0x8f820018, 0xac400008, | ||
697 | 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010, 0x8f830018, 0xac600014, | ||
698 | 0x8f850018, 0x3c036000, 0x8c634448, 0x24040001, 0xaca30018, 0x9622000e, | ||
699 | 0x8f850018, 0x3c034015, 0x00431025, 0x0e0014cc, 0xaca2001c, 0x00001021, | ||
700 | 0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, | ||
701 | 0x27bdfff0, 0x03e00008, 0x27bd0010, 0x27bdffd0, 0xafb10014, 0x00808821, | ||
702 | 0xafb40020, 0x00c0a021, 0xafbf0028, 0xafb50024, 0xafb3001c, 0xafb20018, | ||
703 | 0xafb00010, 0x93620023, 0x00e0a821, 0x30420040, 0x1040003e, 0x30b3ffff, | ||
704 | 0x3c120800, 0x8e420020, 0x1040003a, 0x8f70004c, 0x0e00148e, 0x00000000, | ||
705 | 0x8f820018, 0xac510000, 0x8f840018, 0x24020001, 0xac820004, 0x8f830018, | ||
706 | 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, | ||
707 | 0x24040001, 0xac500014, 0x8f850018, 0x3c026000, 0x8c434448, 0x3c020800, | ||
708 | 0x245058c0, 0xaca30018, 0x9603000e, 0x8f850018, 0x3c024010, 0x00621825, | ||
709 | 0x0e0014cc, 0xaca3001c, 0x8e430020, 0x1060001b, 0x00000000, 0x0e00148e, | ||
710 | 0x00000000, 0x8f820018, 0xac510000, 0x8f840018, 0x3c02008d, 0xac820004, | ||
711 | 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, | ||
712 | 0x8f820018, 0xac550014, 0x8f850018, 0x3c036000, 0x8c634448, 0x24040001, | ||
713 | 0xaca30018, 0x9602000e, 0x8f850018, 0x3c034019, 0x00431025, 0x0e0014cc, | ||
714 | 0xaca2001c, 0x93620023, 0x30420020, 0x14400003, 0x3c120800, 0x1280003f, | ||
715 | 0x3c029000, 0x8e420020, 0x8f70004c, 0x1040003b, 0x3c029000, 0x0e00148e, | ||
716 | 0x00000000, 0x8f820018, 0xac510000, 0x8f840018, 0x24020001, 0xac820004, | ||
717 | 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, | ||
718 | 0x8f820018, 0x24040001, 0xac500014, 0x8f850018, 0x3c026000, 0x8c434448, | ||
719 | 0x3c020800, 0x245058c0, 0xaca30018, 0x9603000e, 0x8f850018, 0x3c024010, | ||
720 | 0x00621825, 0x0e0014cc, 0xaca3001c, 0x8e430020, 0x1060001c, 0x3c029000, | ||
721 | 0x0e00148e, 0x00000000, 0x8f820018, 0xac510000, 0x8f840018, 0x00131400, | ||
722 | 0xac820004, 0x8f830018, 0xac750008, 0x8f820018, 0xac40000c, 0x8f830018, | ||
723 | 0xac600010, 0x8f820018, 0xac400014, 0x8f850018, 0x3c036000, 0x8c634448, | ||
724 | 0x24040001, 0xaca30018, 0x9602000e, 0x8f850018, 0x3c03401b, 0x00431025, | ||
725 | 0x0e0014cc, 0xaca2001c, 0x3c029000, 0x34420001, 0x02221025, 0xaf420020, | ||
726 | 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93630023, | ||
727 | 0x3c028000, 0x34420001, 0x02221025, 0x8fbf0028, 0x8fb50024, 0x8fb40020, | ||
728 | 0x8fb3001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x3063009f, 0xa3630023, | ||
729 | 0xaf420020, 0x03e00008, 0x27bd0030, 0x27bdffe0, 0xafb10014, 0x27510100, | ||
730 | 0x3c029000, 0x34420001, 0xafb00010, 0x00808021, 0x02021025, 0x3c038000, | ||
731 | 0xafbf0018, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, | ||
732 | 0xa7600008, 0x8f63005c, 0x3c028000, 0x34420001, 0xaf630148, 0x8f640050, | ||
733 | 0x02021025, 0x3c039000, 0xaf64017c, 0xaf420020, 0x8f450100, 0x34630001, | ||
734 | 0x3c048000, 0x00a31825, 0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd, | ||
735 | 0x00000000, 0x9362007d, 0x3c038000, 0x34420001, 0xa362007d, 0x8f640074, | ||
736 | 0x34630001, 0x00a31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021, | ||
737 | 0x0e000470, 0x24050de5, 0x0a001093, 0x3c020800, 0x8f4201f8, 0x00431024, | ||
738 | 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8, | ||
739 | 0x3c020800, 0x8c430020, 0x1060001e, 0x8fbf0018, 0x0e00148e, 0x00000000, | ||
740 | 0x8f830018, 0xac700000, 0x9622000c, 0x8f840018, 0x00021400, 0xac820004, | ||
741 | 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, | ||
742 | 0x8f820018, 0xac400014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, | ||
743 | 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c02401f, 0x00621825, | ||
744 | 0x0e0014cc, 0xaca3001c, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x03e00008, | ||
745 | 0x27bd0020, 0x3c020800, 0x24424c3c, 0xaf82000c, 0x03e00008, 0x00000000, | ||
746 | 0x27bdffe8, 0xafb00010, 0x27500100, 0xafbf0014, 0x8e02001c, 0x14400003, | ||
747 | 0x3c020800, 0x0000000d, 0x3c020800, 0x8c430020, 0x10600020, 0x00001021, | ||
748 | 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018, | ||
749 | 0x8e02001c, 0xac820004, 0x8f830018, 0xac600008, 0x8f840018, 0x8e020018, | ||
750 | 0xac82000c, 0x8f850018, 0x96020012, 0xaca20010, 0x8f830018, 0x3c026000, | ||
751 | 0xac600014, 0x8f840018, 0x8c434448, 0x3c020800, 0xac830018, 0x944358ce, | ||
752 | 0x8f840018, 0x3c024012, 0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001, | ||
753 | 0x00001021, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c020800, | ||
754 | 0x97430078, 0x9444002e, 0x00001021, 0x00641821, 0x3063fffe, 0x03e00008, | ||
755 | 0xa7630010, 0x27bdfff0, 0x00001021, 0x03e00008, 0x27bd0010, 0x8f420100, | ||
756 | 0x34420001, 0xaf4200a4, 0x03e00008, 0x00001021, 0x27bdffe0, 0xafbf0018, | ||
757 | 0xafb10014, 0xafb00010, 0x9362007e, 0x30d000ff, 0x16020031, 0x00808821, | ||
758 | 0x8f620178, 0x1602002e, 0x00000000, 0x9362007f, 0x1602002b, 0x00000000, | ||
759 | 0x9362007a, 0x16020004, 0x00000000, 0x0000000d, 0x00000000, 0x240009d2, | ||
760 | 0x0e0013e6, 0x00000000, 0x3c039000, 0x34630001, 0x3c048000, 0x02231825, | ||
761 | 0xa370007a, 0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd, 0x00000000, | ||
762 | 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001, 0x02231825, | ||
763 | 0xaf430020, 0x04810006, 0x3c038000, 0x02202021, 0x0e000470, 0x240509dd, | ||
764 | 0x0a001138, 0x8fbf0018, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, | ||
765 | 0x3c031000, 0xaf5101c0, 0xa34201c4, 0xaf4301f8, 0x0a001138, 0x8fbf0018, | ||
766 | 0x0000000d, 0x00000000, 0x240009e2, 0x8fbf0018, 0x8fb10014, 0x8fb00010, | ||
767 | 0x03e00008, 0x27bd0020, 0x27bdffe8, 0x30a500ff, 0x3c029000, 0x34420001, | ||
768 | 0x00803821, 0x00e21025, 0x3c038000, 0xafbf0010, 0xaf420020, 0x8f420020, | ||
769 | 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x00a21025, | ||
770 | 0xa362007d, 0x8f640074, 0x34630001, 0x00e31825, 0xaf430020, 0x04810006, | ||
771 | 0x3c038000, 0x00e02021, 0x0e000470, 0x00c02821, 0x0a001161, 0x8fbf0010, | ||
772 | 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4701c0, | ||
773 | 0xa34201c4, 0xaf4301f8, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x3c020800, | ||
774 | 0x8c430020, 0x27bdffe8, 0xafb00010, 0x27500100, 0x10600024, 0xafbf0014, | ||
775 | 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018, | ||
776 | 0x8e020004, 0xac820004, 0x8f830018, 0x8e020018, 0xac620008, 0x8f840018, | ||
777 | 0x8e03001c, 0xac83000c, 0x9602000c, 0x9203000a, 0x8f840018, 0x00021400, | ||
778 | 0x00431025, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018, | ||
779 | 0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x946458ce, 0x8f850018, | ||
780 | 0x00021400, 0x00441025, 0x24040001, 0x0e0014cc, 0xaca2001c, 0x8fbf0014, | ||
781 | 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe8, | ||
782 | 0xafb00010, 0x27500100, 0x10600020, 0xafbf0014, 0x0e00148e, 0x00000000, | ||
783 | 0x8f820018, 0xac400000, 0x8f830018, 0xac600004, 0x8f820018, 0xac400008, | ||
784 | 0x8f830018, 0xac60000c, 0x9602000c, 0x9603000e, 0x8f840018, 0x00021400, | ||
785 | 0x00431025, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018, | ||
786 | 0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x946458ce, 0x8f850018, | ||
787 | 0x00021400, 0x00441025, 0x24040001, 0x0e0014cc, 0xaca2001c, 0x8fbf0014, | ||
788 | 0x8fb00010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafb00010, 0x27500100, | ||
789 | 0xafbf0014, 0x9602000c, 0x10400024, 0x00802821, 0x3c020800, 0x8c430020, | ||
790 | 0x1060003a, 0x8fbf0014, 0x0e00148e, 0x00000000, 0x8f840018, 0x8e030000, | ||
791 | 0xac830000, 0x9602000c, 0x8f840018, 0x00021400, 0xac820004, 0x8f830018, | ||
792 | 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, | ||
793 | 0xac400014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, | ||
794 | 0xaca30018, 0x944358ce, 0x8f850018, 0x3c02400b, 0x00621825, 0x0e0014cc, | ||
795 | 0xaca3001c, 0x0a0011ff, 0x8fbf0014, 0x93620005, 0x30420010, 0x14400015, | ||
796 | 0x3c029000, 0x34420001, 0x00a21025, 0xaf420020, 0x3c038000, 0x8f420020, | ||
797 | 0x00431024, 0x1440fffd, 0x00000000, 0x3c038000, 0x93620005, 0x34630001, | ||
798 | 0x00a02021, 0x00a31825, 0x24055852, 0x34420010, 0xa3620005, 0x0e000766, | ||
799 | 0xaf430020, 0x0a0011ff, 0x8fbf0014, 0x0000000d, 0x8fbf0014, 0x8fb00010, | ||
800 | 0x03e00008, 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe8, 0xafb00010, | ||
801 | 0x27500100, 0x10600022, 0xafbf0014, 0x0e00148e, 0x00000000, 0x8f840018, | ||
802 | 0x8e020004, 0xac820000, 0x9603000c, 0x9762002c, 0x8f840018, 0x00031c00, | ||
803 | 0x00431025, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, | ||
804 | 0x8f830018, 0xac600010, 0x8f820018, 0xac400014, 0x8f850018, 0x3c026000, | ||
805 | 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, | ||
806 | 0x3c02400e, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x0e00122e, 0x8e040000, | ||
807 | 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c038000, 0x8f420278, | ||
808 | 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf440240, 0xa3420244, | ||
809 | 0x03e00008, 0xaf430278, 0x3c020800, 0x8c430020, 0x27bdffe0, 0xafb10014, | ||
810 | 0x00808821, 0xafb20018, 0x00c09021, 0xafb00010, 0x30b0ffff, 0x1060001c, | ||
811 | 0xafbf001c, 0x0e00148e, 0x00000000, 0x8f820018, 0xac510000, 0x8f840018, | ||
812 | 0x00101400, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, | ||
813 | 0x8f830018, 0xac600010, 0x8f820018, 0xac520014, 0x8f840018, 0x3c026000, | ||
814 | 0x8c434448, 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c024019, | ||
815 | 0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf001c, 0x8fb20018, | ||
816 | 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0x27450100, | ||
817 | 0xafbf0010, 0x94a3000c, 0x240200c1, 0x14620031, 0x00803021, 0x3c029000, | ||
818 | 0x34420001, 0x00c21025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, | ||
819 | 0x1440fffd, 0x3c028000, 0x34420001, 0x3c049000, 0x34840001, 0x3c058000, | ||
820 | 0x24030012, 0x00c21025, 0x00c42025, 0xa363003f, 0xaf420020, 0xaf440020, | ||
821 | 0x8f420020, 0x00451024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, | ||
822 | 0x34420020, 0xa362007d, 0x8f640074, 0x34630001, 0x00c31825, 0xaf430020, | ||
823 | 0x04810006, 0x3c038000, 0x00c02021, 0x0e000470, 0x24050906, 0x0a0012a1, | ||
824 | 0x8fbf0010, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, | ||
825 | 0xaf4601c0, 0xa34201c4, 0xaf4301f8, 0x0a0012a1, 0x8fbf0010, 0x00c02021, | ||
826 | 0x94a5000c, 0x24060001, 0x0e000fb1, 0x2407090e, 0x8fbf0010, 0x03e00008, | ||
827 | 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe0, 0xafb00010, 0x00808021, | ||
828 | 0xafb20018, 0x00a09021, 0xafb10014, 0x30d100ff, 0x1060001c, 0xafbf001c, | ||
829 | 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x24020001, | ||
830 | 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, | ||
831 | 0xac600010, 0x8f820018, 0xac520014, 0x8f840018, 0x3c026000, 0x8c434448, | ||
832 | 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c024010, 0x00621825, | ||
833 | 0xac83001c, 0x0e0014cc, 0x02202021, 0x8fbf001c, 0x8fb20018, 0x8fb10014, | ||
834 | 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0014, 0xafb00010, | ||
835 | 0x93620005, 0x30420001, 0x10400036, 0x00808021, 0x3c029000, 0x34420001, | ||
836 | 0x02021025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, | ||
837 | 0x00000000, 0x93620023, 0x34420004, 0xa3620023, 0x93630005, 0x3c048000, | ||
838 | 0x3c020800, 0x306300fe, 0xa3630005, 0x8c430020, 0x34840001, 0x02042025, | ||
839 | 0xaf440020, 0x10600020, 0x8fbf0014, 0x0e00148e, 0x00000000, 0x8f820018, | ||
840 | 0xac500000, 0x93630082, 0x9362003f, 0x8f840018, 0x00031a00, 0x00431025, | ||
841 | 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, | ||
842 | 0xac600010, 0x8f820018, 0xac400014, 0x8f840018, 0x3c026000, 0x8c434448, | ||
843 | 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c02400a, 0x00621825, | ||
844 | 0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf0014, 0x8fb00010, 0x03e00008, | ||
845 | 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe0, 0xafb10014, 0x00808821, | ||
846 | 0xafb20018, 0x00a09021, 0xafb00010, 0x30d000ff, 0x1060002f, 0xafbf001c, | ||
847 | 0x0e00148e, 0x00000000, 0x8f820018, 0xac510000, 0x8f830018, 0xac700004, | ||
848 | 0x8f820018, 0xac520008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010, | ||
849 | 0x9763006a, 0x00032880, 0x50a00001, 0x24050001, 0x97630068, 0x93640081, | ||
850 | 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b, 0x54400001, | ||
851 | 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001, 0x00c02021, | ||
852 | 0x8f830018, 0x2402fffe, 0x00822824, 0x3c026000, 0xac650014, 0x8f840018, | ||
853 | 0x8c434448, 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c024011, | ||
854 | 0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf001c, 0x8fb20018, | ||
855 | 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0014, | ||
856 | 0xafb00010, 0x8f440100, 0x27500100, 0x8f650050, 0x0e0010fc, 0x9206001b, | ||
857 | 0x3c020800, 0x8c430020, 0x1060001d, 0x8e100018, 0x0e00148e, 0x00000000, | ||
858 | 0x8f840018, 0x8f420100, 0xac820000, 0x8f830018, 0xac700004, 0x8f840018, | ||
859 | 0x8f620050, 0xac820008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010, | ||
860 | 0x8f830018, 0x3c026000, 0xac600014, 0x8f850018, 0x8c434448, 0x24040001, | ||
861 | 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c02401c, 0x00621825, | ||
862 | 0x0e0014cc, 0xaca3001c, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, | ||
863 | 0x8f430238, 0x3c020800, 0x04610013, 0x8c44009c, 0x2406fffe, 0x3c050800, | ||
864 | 0x3c038000, 0x2484ffff, 0x14800009, 0x00000000, 0x97420078, 0x8ca3007c, | ||
865 | 0x24420001, 0x00461024, 0x24630001, 0xa7620010, 0x03e00008, 0xaca3007c, | ||
866 | 0x8f420238, 0x00431024, 0x1440fff3, 0x2484ffff, 0x8f420140, 0x3c031000, | ||
867 | 0xaf420200, 0x03e00008, 0xaf430238, 0x27bdffe8, 0x3c029000, 0xafbf0010, | ||
868 | 0x8f450140, 0x34420001, 0x3c038000, 0x00a21025, 0xaf420020, 0x8f420020, | ||
869 | 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x34420001, | ||
870 | 0xa362007d, 0x8f640074, 0x34630001, 0x00a31825, 0xaf430020, 0x04810006, | ||
871 | 0x3c038000, 0x00a02021, 0x0e000470, 0x24050ac7, 0x0a0013b9, 0x8fbf0010, | ||
872 | 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4501c0, | ||
873 | 0xa34201c4, 0xaf4301f8, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x0000000d, | ||
874 | 0x03e00008, 0x00000000, 0x0000000d, 0x03e00008, 0x00000000, 0x24020001, | ||
875 | 0x03e00008, 0xa7620010, 0x9362003f, 0x304400ff, 0x3883000e, 0x2c630001, | ||
876 | 0x38820010, 0x2c420001, 0x00621825, 0x14600003, 0x24020012, 0x14820003, | ||
877 | 0x00000000, 0x03e00008, 0x00001021, 0x9363007e, 0x9362007a, 0x14620006, | ||
878 | 0x00000000, 0x9363007e, 0x24020001, 0x24630001, 0x03e00008, 0xa363007e, | ||
879 | 0x9362007e, 0x8f630178, 0x304200ff, 0x14430006, 0x00000000, 0x9363000b, | ||
880 | 0x24020001, 0x24630001, 0x03e00008, 0xa363000b, 0x03e00008, 0x00001021, | ||
881 | 0x9362000b, 0x10400023, 0x00001021, 0xa360000b, 0x9362003f, 0x304400ff, | ||
882 | 0x3883000e, 0x2c630001, 0x38820010, 0x2c420001, 0x00621825, 0x14600017, | ||
883 | 0x00001821, 0x24020012, 0x10820014, 0x00000000, 0x9363007e, 0x9362007a, | ||
884 | 0x14620007, 0x00000000, 0x9362007e, 0x24030001, 0x24420001, 0xa362007e, | ||
885 | 0x03e00008, 0x00601021, 0x9362007e, 0x8f630178, 0x304200ff, 0x14430005, | ||
886 | 0x00001821, 0x9362000b, 0x24030001, 0x24420001, 0xa362000b, 0x03e00008, | ||
887 | 0x00601021, 0x03e00008, 0x00000000, 0x24040001, 0xaf64000c, 0x8f6300dc, | ||
888 | 0x8f6200cc, 0x50620001, 0xa7640010, 0xa7640012, 0xa7640014, 0x03e00008, | ||
889 | 0xa7640016, 0x3c020800, 0x8c430020, 0x27bdffe8, 0x1060001b, 0xafbf0010, | ||
890 | 0x0e00148e, 0x00000000, 0x8f820018, 0xac400000, 0x8f830018, 0xac600004, | ||
891 | 0x8f820018, 0xac400008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010, | ||
892 | 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018, 0x8c434448, 0x3c020800, | ||
893 | 0xac830018, 0x944358ce, 0x8f840018, 0x3c024020, 0x00621825, 0xac83001c, | ||
894 | 0x0e0014cc, 0x24040001, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x3c020800, | ||
895 | 0x8c430020, 0x27bdffe0, 0xafb00010, 0x00a08021, 0xafb10014, 0x00c08821, | ||
896 | 0xafb20018, 0x00e09021, 0x1060001e, 0xafbf001c, 0x0e00148e, 0x00000000, | ||
897 | 0x8f840018, 0x8f420100, 0xac820000, 0x8f830018, 0xac700004, 0x8f820018, | ||
898 | 0xac510008, 0x8f830018, 0xac72000c, 0x8f840018, 0x8fa20030, 0xac820010, | ||
899 | 0x8f830018, 0x8fa20034, 0xac620014, 0x8f840018, 0x3c026000, 0x8c434448, | ||
900 | 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c0240c9, 0x00621825, | ||
901 | 0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf001c, 0x8fb20018, 0x8fb10014, | ||
902 | 0x8fb00010, 0x03e00008, 0x27bd0020, 0x3c020800, 0x8c430020, 0x27bdffe8, | ||
903 | 0xafb00010, 0x27500100, 0x1060001d, 0xafbf0014, 0x0e00148e, 0x00000000, | ||
904 | 0x8f830018, 0x8e020004, 0xac620000, 0x8f840018, 0x8e020018, 0xac820004, | ||
905 | 0x8f850018, 0x8e020000, 0xaca20008, 0x8f830018, 0xac60000c, 0x8f820018, | ||
906 | 0xac400010, 0x8f830018, 0xac600014, 0x8f820018, 0xac400018, 0x96030008, | ||
907 | 0x3c020800, 0x944458ce, 0x8f850018, 0x00031c00, 0x00641825, 0x24040001, | ||
908 | 0x0e0014cc, 0xaca3001c, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, | ||
909 | 0x3c060800, 0x24c558c0, 0x3c02000a, 0x03421821, 0x94640006, 0x94a2000a, | ||
910 | 0x00441023, 0x00021400, 0x00021c03, 0x04610006, 0xa4a40006, 0x0000000d, | ||
911 | 0x00000000, 0x2400005a, 0x0a0014a3, 0x24020001, 0x8f820014, 0x0062102b, | ||
912 | 0x14400002, 0x00001021, 0x24020001, 0x304200ff, 0x1040001c, 0x274a0400, | ||
913 | 0x3c07000a, 0x3c020800, 0x244558c0, 0x94a9000a, 0x8f880014, 0x03471021, | ||
914 | 0x94430006, 0x00402021, 0xa4a30006, 0x94820006, 0xa4a20006, 0x01221023, | ||
915 | 0x00021400, 0x00021403, 0x04410006, 0x0048102b, 0x0000000d, 0x00000000, | ||
916 | 0x2400005a, 0x0a0014be, 0x24020001, 0x14400002, 0x00001021, 0x24020001, | ||
917 | 0x304200ff, 0x1440ffec, 0x03471021, 0x24c458c0, 0x8c820010, 0xaf420038, | ||
918 | 0x8c830014, 0x3c020005, 0xaf43003c, 0xaf420030, 0xaf800010, 0xaf8a0018, | ||
919 | 0x03e00008, 0x00000000, 0x27bdffe0, 0x8f820010, 0x8f850018, 0x3c070800, | ||
920 | 0x24e858c0, 0xafbf001c, 0xafb20018, 0xafb10014, 0xafb00010, 0x9503000a, | ||
921 | 0x8d060014, 0x00009021, 0x309000ff, 0x00e08821, 0x24420001, 0x24a50020, | ||
922 | 0x24630001, 0xaf820010, 0xaf850018, 0xa503000a, 0x24c30020, 0x3c028000, | ||
923 | 0x04c10007, 0xad030014, 0x00621024, 0x14400005, 0x262258c0, 0x8d020010, | ||
924 | 0x24420001, 0xad020010, 0x262258c0, 0x9444000a, 0x94450018, 0x0010102b, | ||
925 | 0x00a41826, 0x2c630001, 0x00621825, 0x1060001c, 0x3c030006, 0x8f820010, | ||
926 | 0x24120001, 0x00021140, 0x00431025, 0xaf420030, 0x00000000, 0x00000000, | ||
927 | 0x00000000, 0x27450400, 0x8f420000, 0x30420010, 0x1040fffd, 0x262258c0, | ||
928 | 0x9444000a, 0x94430018, 0xaf800010, 0xaf850018, 0x14830012, 0x262758c0, | ||
929 | 0x0e00155a, 0x00000000, 0x1600000e, 0x262758c0, 0x0e00148e, 0x00000000, | ||
930 | 0x0a001517, 0x262758c0, 0x00041c00, 0x00031c03, 0x00051400, 0x00021403, | ||
931 | 0x00621823, 0x18600002, 0x3c026000, 0xac400808, 0x262758c0, 0x94e2000e, | ||
932 | 0x94e3000c, 0x24420001, 0xa4e2000e, 0x3042ffff, 0x50430001, 0xa4e0000e, | ||
933 | 0x12000005, 0x3c02000a, 0x94e2000a, 0xa74200a2, 0x0a001554, 0x02401021, | ||
934 | 0x03421821, 0x94640006, 0x94e2000a, 0x00441023, 0x00021400, 0x00021c03, | ||
935 | 0x04610006, 0xa4e40006, 0x0000000d, 0x00000000, 0x2400005a, 0x0a001536, | ||
936 | 0x24020001, 0x8f820014, 0x0062102b, 0x14400002, 0x00001021, 0x24020001, | ||
937 | 0x304200ff, 0x1040001b, 0x3c020800, 0x3c06000a, 0x244558c0, 0x94a8000a, | ||
938 | 0x8f870014, 0x03461021, 0x94430006, 0x00402021, 0xa4a30006, 0x94820006, | ||
939 | 0xa4a20006, 0x01021023, 0x00021400, 0x00021403, 0x04410006, 0x0047102b, | ||
940 | 0x0000000d, 0x00000000, 0x2400005a, 0x0a001550, 0x24020001, 0x14400002, | ||
941 | 0x00001021, 0x24020001, 0x304200ff, 0x1440ffec, 0x03461021, 0x02401021, | ||
942 | 0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, | ||
943 | 0x3c020800, 0x244558c0, 0x94a3001a, 0x8ca40024, 0x00403021, 0x000318c0, | ||
944 | 0x00832021, 0xaf44003c, 0x8ca20020, 0xaf420038, 0x3c020050, 0x34420008, | ||
945 | 0xaf420030, 0x00000000, 0x00000000, 0x00000000, 0x8f420000, 0x30420020, | ||
946 | 0x1040fffd, 0x00000000, 0x8f430400, 0x24c658c0, 0xacc30010, 0x8f420404, | ||
947 | 0x3c030020, 0xacc20014, 0xaf430030, 0x94c40018, 0x94c3001c, 0x94c2001a, | ||
948 | 0x94c5001e, 0x00832021, 0x24420001, 0xa4c2001a, 0x3042ffff, 0x14450002, | ||
949 | 0xa4c40018, 0xa4c0001a, 0x03e00008, 0x00000000, 0x8f820010, 0x3c030006, | ||
950 | 0x00021140, 0x00431025, 0xaf420030, 0x00000000, 0x00000000, 0x00000000, | ||
951 | 0x27430400, 0x8f420000, 0x30420010, 0x1040fffd, 0x00000000, 0xaf800010, | ||
952 | 0xaf830018, 0x03e00008, 0x00000000, 0x27bdffe8, 0xafb00010, 0x3c100800, | ||
953 | 0x261058c0, 0x3c05000a, 0x02002021, 0x03452821, 0xafbf0014, 0x0e0015b0, | ||
954 | 0x2406000a, 0x96020002, 0x9603001e, 0x3042000f, 0x24420003, 0x00431804, | ||
955 | 0x24027fff, 0x0043102b, 0xaf830014, 0x10400004, 0x00000000, 0x0000000d, | ||
956 | 0x00000000, 0x24000043, 0x0e00155a, 0x00000000, 0x8fbf0014, 0x8fb00010, | ||
957 | 0x03e00008, 0x27bd0018, 0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff, | ||
958 | 0x24a50004, 0xac820000, 0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000, | ||
959 | 0x0a0015c1, 0x00a01021, 0xac860000, 0x00000000, 0x00000000, 0x24840004, | ||
960 | 0x00a01021, 0x1440fffa, 0x24a5ffff, 0x03e00008, 0x00000000, 0x3c036000, | ||
961 | 0x8c642b7c, 0x3c036010, 0x8c6553fc, 0x00041582, 0x00042302, 0x308403ff, | ||
962 | 0x00052d82, 0x00441026, 0x0002102b, 0x0005282b, 0x00451025, 0x1440000d, | ||
963 | 0x3c020050, 0x34420004, 0xaf400038, 0xaf40003c, 0xaf420030, 0x00000000, | ||
964 | 0x00000000, 0x8f420000, 0x30420020, 0x1040fffd, 0x3c020020, 0xaf420030, | ||
965 | 0x0000000d, 0x03e00008, 0x00000000, 0x3c020050, 0x34420004, 0xaf440038, | ||
966 | 0xaf45003c, 0xaf420030, 0x00000000, 0x00000000, 0x8f420000, 0x30420020, | ||
967 | 0x1040fffd, 0x3c020020, 0xaf420030, 0x03e00008, 0x00000000, 0x00000000}; | ||
968 | 666 | ||
969 | static u32 bnx2_COM_b06FwData[(0x0/4) + 1] = { 0x0 }; | 667 | static u32 bnx2_COM_b06FwData[(0x0/4) + 1] = { 0x0 }; |
970 | static u32 bnx2_COM_b06FwRodata[(0x58/4) + 1] = { | 668 | static u32 bnx2_COM_b06FwRodata[(0x58/4) + 1] = { |
@@ -989,952 +687,368 @@ static u32 bnx2_RXP_b06FwBssAddr = 0x08005900; | |||
989 | static int bnx2_RXP_b06FwBssLen = 0x13a4; | 687 | static int bnx2_RXP_b06FwBssLen = 0x13a4; |
990 | static u32 bnx2_RXP_b06FwSbssAddr = 0x080058e0; | 688 | static u32 bnx2_RXP_b06FwSbssAddr = 0x080058e0; |
991 | static int bnx2_RXP_b06FwSbssLen = 0x1c; | 689 | static int bnx2_RXP_b06FwSbssLen = 0x1c; |
992 | static u32 bnx2_RXP_b06FwText[(0x588c/4) + 1] = { | 690 | static u8 bnx2_RXP_b06FwText[] = { |
993 | 0x0a000c61, 0x00000000, 0x00000000, 0x0000000d, 0x72787020, 0x322e362e, | 691 | 0x1f, 0x8b, 0x08, 0x08, 0x07, 0x87, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65, |
994 | 0x31000000, 0x02060103, 0x00000000, 0x0000000d, 0x00000000, 0x00000000, | 692 | 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xed, 0x5c, 0x5d, 0x6c, |
995 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 693 | 0x1c, 0xd7, 0x75, 0x3e, 0xf3, 0x43, 0x71, 0x49, 0x91, 0xd4, 0x70, 0xb9, |
996 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 694 | 0x62, 0x57, 0x12, 0x65, 0xed, 0x8a, 0x43, 0x71, 0x6d, 0x31, 0xce, 0x50, |
997 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 695 | 0x58, 0xdb, 0x82, 0xb1, 0x48, 0xc7, 0xb3, 0xa4, 0xc8, 0x24, 0x02, 0x42, |
998 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 696 | 0x1b, 0x42, 0xab, 0xa4, 0xa9, 0xc1, 0x90, 0x72, 0x91, 0x22, 0x2c, 0xa0, |
999 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 697 | 0x1a, 0x79, 0xf0, 0x43, 0x10, 0x2f, 0x56, 0x3f, 0xa6, 0xd1, 0x8d, 0x96, |
1000 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 698 | 0xb6, 0x1c, 0x53, 0x08, 0x82, 0x82, 0xe5, 0x52, 0x52, 0x0b, 0x2c, 0xb4, |
1001 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 699 | 0x96, 0xed, 0x36, 0x7e, 0xa8, 0x23, 0x9a, 0x92, 0x8d, 0xa6, 0x68, 0x81, |
1002 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 700 | 0x22, 0xad, 0xd1, 0xf4, 0x4d, 0x95, 0x9a, 0x4a, 0x75, 0x5f, 0xd4, 0xa2, |
1003 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 701 | 0x48, 0xda, 0x46, 0xcd, 0xf4, 0xfb, 0xee, 0xcc, 0x88, 0xd4, 0x9a, 0xb2, |
1004 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 702 | 0x2c, 0x3b, 0x0d, 0x62, 0x74, 0x0e, 0x30, 0xd8, 0xb9, 0x7f, 0xe7, 0xef, |
1005 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 703 | 0x9e, 0x73, 0xee, 0x39, 0x77, 0x28, 0x7d, 0xa5, 0x43, 0xda, 0x25, 0x84, |
1006 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 704 | 0x4e, 0x3c, 0x99, 0xc3, 0xcf, 0x3c, 0xfd, 0xe0, 0xc3, 0x0f, 0xee, 0xc1, |
1007 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 705 | 0xeb, 0xb0, 0xa1, 0x6d, 0xd0, 0xa3, 0xfe, 0x18, 0x62, 0x88, 0x21, 0x86, |
1008 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 706 | 0x18, 0x62, 0x88, 0x21, 0x86, 0x18, 0x62, 0x88, 0x21, 0x86, 0x18, 0x62, |
1009 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 707 | 0x88, 0x21, 0x86, 0x18, 0x62, 0x88, 0x21, 0x86, 0x18, 0x62, 0x88, 0x21, |
1010 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 708 | 0x86, 0x18, 0x62, 0x88, 0x21, 0x86, 0x18, 0x62, 0x88, 0x21, 0x86, 0x18, |
1011 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 709 | 0x62, 0x88, 0x21, 0x86, 0x18, 0x62, 0x88, 0x21, 0x86, 0x18, 0x62, 0x88, |
1012 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 710 | 0x21, 0x86, 0x18, 0x62, 0x88, 0x21, 0x86, 0xff, 0xef, 0x60, 0x88, 0x58, |
1013 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 711 | 0xfc, 0xed, 0x0c, 0x1f, 0x49, 0xe8, 0x85, 0xcb, 0x07, 0x3d, 0x5b, 0x12, |
1014 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 712 | 0x46, 0x61, 0x69, 0x66, 0xda, 0x16, 0x71, 0xeb, 0xbb, 0x33, 0x45, 0xf9, |
1015 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 713 | 0x1f, 0xbf, 0x94, 0x32, 0x85, 0xfd, 0xdb, 0x0b, 0x37, 0x9f, 0x7d, 0xf3, |
1016 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 714 | 0x91, 0xec, 0x8d, 0x05, 0x43, 0x12, 0x56, 0xe1, 0xe8, 0xb0, 0xb5, 0x4b, |
1017 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 715 | 0x12, 0x7d, 0x58, 0xf3, 0xdd, 0xc1, 0xcf, 0x59, 0xd2, 0x15, 0xe1, 0xba, |
1018 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 716 | 0xee, 0xbf, 0x39, 0x68, 0xc9, 0x2b, 0x8d, 0x94, 0x5c, 0x68, 0x6c, 0xdf, |
1019 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 717 | 0x24, 0x5d, 0xd9, 0x52, 0x09, 0xfd, 0x6e, 0x8a, 0xe3, 0x96, 0x94, 0xab, |
1020 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 718 | 0x2d, 0xe2, 0x2a, 0xba, 0x7d, 0x5a, 0x71, 0xfe, 0x3e, 0xcd, 0x9b, 0x7f, |
1021 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 719 | 0x9e, 0xff, 0x1e, 0x24, 0xa5, 0xcb, 0x7d, 0x68, 0xf7, 0xa1, 0xcd, 0xf7, |
1022 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 720 | 0x81, 0xf4, 0x94, 0x98, 0x72, 0xa4, 0x91, 0x90, 0xa3, 0xd5, 0x8c, 0xe8, |
1023 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 721 | 0x05, 0x71, 0xbd, 0xbc, 0x9d, 0x2e, 0xa3, 0x6f, 0xea, 0x00, 0xdb, 0x29, |
1024 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 722 | 0xe0, 0xf9, 0x0e, 0xd7, 0x59, 0x5e, 0x5e, 0x4a, 0xb7, 0xc6, 0x14, 0x0d, |
1025 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 723 | 0x8e, 0xb1, 0x0f, 0xbf, 0x58, 0x5f, 0xae, 0x76, 0x00, 0x6f, 0xd6, 0x71, |
1026 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 724 | 0x41, 0xdc, 0x73, 0x2c, 0xd0, 0xf6, 0xfd, 0xdf, 0x75, 0x32, 0xb2, 0xe2, |
1027 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 725 | 0x74, 0x81, 0xa7, 0x16, 0x69, 0xb5, 0xc5, 0xd2, 0x0b, 0xb6, 0xb5, 0x22, |
1028 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 726 | 0x6d, 0x1c, 0xeb, 0x34, 0x0a, 0xbe, 0x3f, 0x9d, 0x97, 0xae, 0xa0, 0x6f, |
1029 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 727 | 0xb7, 0xe2, 0x63, 0x72, 0x42, 0xc3, 0xbc, 0x57, 0x49, 0x0f, 0x3a, 0xe2, |
1030 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 728 | 0x3b, 0x7f, 0xf3, 0x52, 0xac, 0x6c, 0x97, 0xc9, 0x54, 0xf6, 0xa0, 0x1b, |
1031 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 729 | 0xd0, 0x74, 0x3d, 0x67, 0x2b, 0x70, 0x6a, 0xe0, 0x4f, 0xdb, 0x81, 0xf5, |
1032 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 730 | 0xee, 0x0a, 0x68, 0x1a, 0x85, 0xcd, 0x62, 0x6c, 0x66, 0x9f, 0xe8, 0x3b, |
1033 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 731 | 0x87, 0x93, 0xe1, 0x78, 0x97, 0x36, 0x32, 0x6f, 0x88, 0x6e, 0xff, 0x81, |
1034 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 732 | 0xe6, 0xd5, 0x7a, 0xe5, 0xd8, 0xbc, 0x8e, 0x77, 0x5d, 0xae, 0xe6, 0x4b, |
1035 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 733 | 0x9a, 0xdb, 0xa8, 0x68, 0xde, 0xd9, 0x59, 0xad, 0x78, 0xd6, 0x94, 0xa3, |
1036 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 734 | 0xb6, 0x7f, 0xe1, 0xb4, 0x73, 0x42, 0x1b, 0x39, 0x7b, 0x46, 0x1b, 0x3d, |
1037 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 735 | 0xfb, 0x86, 0x36, 0xde, 0xd8, 0xb2, 0x49, 0xda, 0xb3, 0xd0, 0x1e, 0x71, |
1038 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 736 | 0x90, 0xbf, 0x4f, 0x87, 0xba, 0xec, 0xa2, 0xde, 0x4a, 0xe4, 0x7d, 0x9f, |
1039 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 737 | 0xf3, 0x86, 0xe6, 0x55, 0x6d, 0x8b, 0xfb, 0xe6, 0xa6, 0x22, 0x1a, 0xed, |
1040 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 738 | 0x72, 0x74, 0xde, 0x94, 0x63, 0xd5, 0x94, 0x3c, 0x57, 0x2d, 0x29, 0x5a, |
1041 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 739 | 0x86, 0x5d, 0xd2, 0xbc, 0x06, 0xc7, 0x2b, 0xa0, 0x75, 0x42, 0xdb, 0x07, |
1042 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 740 | 0x9a, 0xde, 0x59, 0x29, 0x5d, 0x71, 0xe6, 0x40, 0xaf, 0x03, 0x78, 0xff, |
1043 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 741 | 0x58, 0x1b, 0x6d, 0xf4, 0x6a, 0xde, 0xc9, 0x9b, 0xe2, 0x39, 0x59, 0xeb, |
1044 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 742 | 0x4b, 0x62, 0xba, 0xb0, 0x01, 0xc8, 0x0c, 0xfd, 0x38, 0xd0, 0x49, 0xca, |
1045 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 743 | 0xf7, 0xf5, 0x82, 0xff, 0x2c, 0x74, 0x6f, 0x5d, 0xa1, 0xfc, 0x8d, 0x5e, |
1046 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 744 | 0x29, 0xcf, 0x53, 0xd7, 0xa6, 0x36, 0x52, 0xf5, 0x2f, 0x78, 0x8e, 0xf4, |
1047 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 745 | 0x19, 0xe2, 0xfb, 0x47, 0x9d, 0x81, 0xf4, 0x21, 0x39, 0x03, 0xdc, 0x75, |
1048 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 746 | 0xad, 0xd8, 0xa0, 0xae, 0xc1, 0xdf, 0x2d, 0x39, 0x02, 0xbd, 0x15, 0x9d, |
1049 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 747 | 0x5e, 0x99, 0xb4, 0xb2, 0x2e, 0xf6, 0x68, 0x53, 0x20, 0x57, 0x32, 0xb4, |
1050 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 748 | 0x17, 0xd2, 0xe7, 0xde, 0x67, 0xd3, 0x9e, 0xa1, 0xcb, 0x53, 0x2f, 0x3d, |
1051 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 749 | 0xdf, 0xb3, 0x38, 0xb4, 0x91, 0x32, 0x43, 0xff, 0xf2, 0x45, 0xcf, 0xf6, |
1052 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 750 | 0xb6, 0xb4, 0x48, 0x29, 0x6d, 0x48, 0x16, 0xfb, 0xb4, 0x43, 0x4e, 0x3b, |
1053 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 751 | 0x22, 0x87, 0x2a, 0xd0, 0x8d, 0x6d, 0x5a, 0x8b, 0x62, 0x67, 0xca, 0x32, |
1054 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 752 | 0x50, 0x32, 0x75, 0x74, 0x26, 0x49, 0x97, 0x3a, 0xd2, 0xe5, 0x7a, 0x9e, |
1055 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 753 | 0x7a, 0xa2, 0x3d, 0x7f, 0x28, 0x5d, 0x69, 0xab, 0xba, 0x5a, 0xd5, 0xd3, |
1056 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 754 | 0xf8, 0x2f, 0x5d, 0x4f, 0xd4, 0xc9, 0x72, 0x28, 0xb7, 0x03, 0xdc, 0x8f, |
1057 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 755 | 0x40, 0x5f, 0xe2, 0xea, 0xc3, 0x0f, 0xb1, 0x6f, 0x93, 0x51, 0xb0, 0xd3, |
1058 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 756 | 0x17, 0x61, 0x14, 0x7a, 0x61, 0x37, 0x64, 0x19, 0xa6, 0xee, 0xe0, 0xc3, |
1059 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 757 | 0x1f, 0x49, 0x5e, 0xf9, 0xd5, 0x90, 0x97, 0xfc, 0xdb, 0x32, 0x55, 0x49, |
1060 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 758 | 0x80, 0x06, 0x65, 0xd4, 0xe5, 0xbd, 0x7c, 0x64, 0x1b, 0x7b, 0x20, 0x5f, |
1061 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 759 | 0x5e, 0xa6, 0xbe, 0x45, 0x7f, 0xa2, 0xfd, 0xf3, 0x9d, 0xb2, 0xfe, 0xcc, |
1062 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 760 | 0xbf, 0xee, 0x7c, 0x92, 0xf6, 0x96, 0x7c, 0x27, 0xe4, 0x78, 0x35, 0xc9, |
1063 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 761 | 0x3d, 0xd4, 0x56, 0x54, 0x6c, 0x8a, 0x64, 0x14, 0xdd, 0x28, 0x74, 0x48, |
1064 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 762 | 0x51, 0xed, 0xf7, 0x5e, 0xd0, 0x43, 0x2c, 0xa8, 0xf2, 0xbd, 0xa0, 0x64, |
1065 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 763 | 0x9b, 0xb6, 0xed, 0xcc, 0x11, 0xc9, 0xc2, 0xbe, 0x45, 0x8e, 0xcc, 0x99, |
1066 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 764 | 0x32, 0x6d, 0xff, 0x63, 0xa7, 0xb4, 0x2f, 0xdf, 0x6f, 0xa8, 0xb8, 0xae, |
1067 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 765 | 0xf7, 0x6e, 0x90, 0x4d, 0xe0, 0x77, 0xf9, 0x7e, 0x5d, 0xe4, 0xa6, 0x59, |
1068 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 766 | 0xc8, 0x5a, 0x23, 0x08, 0xf6, 0x46, 0x81, 0xb1, 0x4c, 0x43, 0x2c, 0x93, |
1069 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 767 | 0x44, 0x8b, 0x4d, 0x7d, 0xf9, 0xfe, 0xf8, 0xf0, 0xdd, 0xf5, 0x75, 0x64, |
1070 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 768 | 0x9e, 0xb4, 0xa9, 0x2f, 0xc6, 0xa8, 0x12, 0xf4, 0xc1, 0xf8, 0x74, 0xbb, |
1071 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 769 | 0xae, 0x8a, 0xa1, 0xae, 0x46, 0xfe, 0xef, 0xed, 0xc2, 0xf5, 0xaa, 0xa2, |
1072 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 770 | 0x79, 0xce, 0xbb, 0xa1, 0x2f, 0xd8, 0x32, 0x02, 0x7f, 0x37, 0xec, 0x4f, |
1073 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 771 | 0xcb, 0x91, 0x54, 0x76, 0xc2, 0x95, 0xc0, 0xe6, 0xaf, 0xad, 0xb1, 0xf9, |
1074 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 772 | 0xd1, 0xbb, 0xc8, 0x75, 0x3c, 0x94, 0xcb, 0x0d, 0xe5, 0x1a, 0x85, 0x5c, |
1075 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 773 | 0x63, 0x90, 0x6b, 0xe5, 0x23, 0xc8, 0xb5, 0xf2, 0x91, 0xe5, 0xd2, 0xa4, |
1076 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 774 | 0xec, 0x3c, 0x08, 0x5a, 0xa6, 0xfc, 0xab, 0x13, 0xd8, 0xf2, 0xbf, 0x38, |
1077 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 775 | 0x9f, 0x14, 0x19, 0x7c, 0x7f, 0x70, 0xd8, 0x16, 0xef, 0x5b, 0xe0, 0xd5, |
1078 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 776 | 0x71, 0x40, 0x8b, 0xef, 0xef, 0x97, 0xe1, 0x6e, 0xfe, 0x38, 0x8b, 0x7d, |
1079 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 777 | 0x5d, 0xcf, 0x1f, 0x29, 0x87, 0x3e, 0x7c, 0xef, 0xfe, 0xa8, 0x6b, 0x1f, |
1080 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 778 | 0x55, 0x0e, 0xc6, 0x9c, 0x4f, 0x35, 0x9d, 0xab, 0x1f, 0x56, 0x86, 0xf5, |
1081 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 779 | 0x63, 0xca, 0x2f, 0x4f, 0x86, 0xc7, 0x64, 0x72, 0x33, 0xed, 0xa9, 0xa4, |
1082 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 780 | 0x8d, 0x0c, 0x92, 0xef, 0xb5, 0xfc, 0x4a, 0x26, 0xe0, 0x0d, 0x39, 0xd1, |
1083 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 781 | 0xd2, 0x46, 0x39, 0xb2, 0x60, 0x49, 0x69, 0xe9, 0x4e, 0x71, 0x57, 0x03, |
1084 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 782 | 0x6f, 0xb4, 0x47, 0xf6, 0x7d, 0xd2, 0x7c, 0x2a, 0xc8, 0x2b, 0x2e, 0x54, |
1085 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 783 | 0x91, 0x83, 0x56, 0x13, 0x72, 0xd9, 0x48, 0xcb, 0x9b, 0x83, 0x87, 0xe5, |
1086 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 784 | 0xf3, 0xd5, 0x24, 0xe8, 0x31, 0x9f, 0x2c, 0xe7, 0x10, 0x17, 0xb5, 0xb2, |
1087 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 785 | 0x63, 0x08, 0x79, 0xaf, 0xd9, 0x9c, 0x13, 0xc4, 0x96, 0x72, 0x10, 0x83, |
1088 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 786 | 0x5d, 0x6f, 0x50, 0xe5, 0x14, 0x90, 0x4f, 0x64, 0x0c, 0xb1, 0xb7, 0x66, |
1089 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 787 | 0xb3, 0xcd, 0xfe, 0xa0, 0xef, 0xb3, 0x95, 0x5e, 0xad, 0xc8, 0xbc, 0x64, |
1090 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 788 | 0xf0, 0xa6, 0x4c, 0x3b, 0x41, 0xdf, 0xe7, 0x2a, 0xa3, 0x9b, 0x98, 0x1f, |
1091 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 789 | 0x1a, 0x05, 0xc9, 0x94, 0x9d, 0xf7, 0x7c, 0xd7, 0xba, 0x7d, 0xcd, 0xfa, |
1092 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 790 | 0x78, 0xb2, 0x13, 0x81, 0xce, 0x45, 0xfb, 0xaa, 0xad, 0xf7, 0xb6, 0x4a, |
1093 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 791 | 0x09, 0x27, 0x5d, 0xd6, 0x1a, 0x47, 0xe7, 0xbe, 0x4a, 0x79, 0x5b, 0xab, |
1094 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 792 | 0xdc, 0x34, 0x80, 0x3f, 0x6d, 0x68, 0x62, 0x1e, 0xaa, 0x94, 0xbb, 0xd9, |
1095 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 793 | 0xa6, 0xbe, 0x74, 0x4d, 0x12, 0xa3, 0x15, 0x5f, 0xae, 0x3a, 0x41, 0xee, |
1096 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 794 | 0x63, 0x68, 0x7a, 0x6f, 0x5b, 0xb8, 0x56, 0xd7, 0x76, 0x39, 0x97, 0x44, |
1097 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 795 | 0x3a, 0x0e, 0x55, 0xc4, 0x2a, 0x56, 0x76, 0x39, 0x6f, 0x4b, 0xb9, 0xa7, |
1098 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 796 | 0x6d, 0x75, 0x5d, 0x8a, 0xeb, 0x76, 0x0e, 0xaf, 0x9d, 0xbb, 0xcb, 0xb9, |
1099 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 797 | 0x28, 0xe5, 0x2d, 0x6d, 0xab, 0xb4, 0xd2, 0x58, 0xdb, 0x17, 0xac, 0xe5, |
1100 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 798 | 0xf8, 0x66, 0x71, 0xbb, 0x39, 0x47, 0xef, 0x6d, 0xbf, 0x45, 0x43, 0x32, |
1101 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 799 | 0xc5, 0x4a, 0xb9, 0xa7, 0x7d, 0x15, 0xaf, 0x4d, 0xbc, 0xde, 0x1a, 0xbc, |
1102 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 800 | 0xc4, 0xd9, 0xbe, 0x8a, 0x33, 0x07, 0x9c, 0x43, 0xab, 0x38, 0x39, 0x7e, |
1103 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 801 | 0x58, 0x8a, 0x38, 0xd3, 0x5a, 0x0a, 0x32, 0xbc, 0x54, 0xc9, 0x48, 0x79, |
1104 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 802 | 0x28, 0x01, 0xdd, 0xf7, 0x1f, 0xfc, 0x9a, 0xaa, 0x43, 0xcc, 0x61, 0x0f, |
1105 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 803 | 0xba, 0x32, 0x55, 0x5e, 0x87, 0xd8, 0x08, 0xdb, 0xf8, 0x5a, 0x5d, 0x86, |
1106 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 804 | 0x17, 0xeb, 0xa6, 0x1c, 0x6f, 0x70, 0xbf, 0x98, 0xe3, 0x05, 0x75, 0xc6, |
1107 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 805 | 0x85, 0x46, 0x4e, 0xdb, 0x87, 0xbd, 0x66, 0x9d, 0xb0, 0xaf, 0x61, 0x6a, |
1108 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 806 | 0xa3, 0x3c, 0x1f, 0x80, 0x97, 0x76, 0x7e, 0xac, 0x41, 0xdb, 0x79, 0x03, |
1109 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 807 | 0xb6, 0x41, 0xce, 0xa3, 0x9c, 0xbd, 0x95, 0xb9, 0x53, 0x66, 0xd1, 0x51, |
1110 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 808 | 0x75, 0x88, 0x56, 0xcb, 0x77, 0x20, 0x07, 0x4d, 0xa0, 0xd6, 0x80, 0xcd, |
1111 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 809 | 0xdb, 0x78, 0x6f, 0x70, 0xde, 0x32, 0xe6, 0x6d, 0xe0, 0x3c, 0xec, 0xcd, |
1112 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 810 | 0x25, 0xe5, 0x0f, 0xa6, 0xcd, 0xf1, 0x77, 0xb1, 0xc7, 0x68, 0xd7, 0x59, |
1113 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 811 | 0x57, 0x58, 0x02, 0x5f, 0xc1, 0x3e, 0xa2, 0x6e, 0x48, 0xed, 0x60, 0x7e, |
1114 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 812 | 0x8f, 0xb9, 0x19, 0xcc, 0xcd, 0x66, 0x18, 0xcf, 0x3d, 0xfb, 0x99, 0x0e, |
1115 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 813 | 0xe9, 0x42, 0xbb, 0xce, 0x35, 0xd9, 0x0c, 0x72, 0x5b, 0xdf, 0xcb, 0xb7, |
1116 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 814 | 0xc9, 0x4a, 0xca, 0xbf, 0x60, 0xd8, 0xd1, 0xdc, 0x08, 0x6f, 0xf3, 0x5c, |
1117 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 815 | 0xe6, 0xc5, 0xc4, 0xbd, 0x21, 0xcc, 0x83, 0xc7, 0xc5, 0x6d, 0xfc, 0x49, |
1118 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 816 | 0xb7, 0x74, 0xb9, 0xf8, 0x8d, 0xe6, 0x4c, 0x6f, 0x0e, 0x6a, 0x2e, 0xbe, |
1119 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 817 | 0xb7, 0x50, 0x3e, 0x17, 0xe7, 0xa1, 0x56, 0xac, 0x66, 0x26, 0x59, 0x1f, |
1120 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 818 | 0x15, 0xeb, 0x6c, 0xef, 0x85, 0x3f, 0x04, 0x75, 0xd7, 0x85, 0x5b, 0xbe, |
1121 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 819 | 0x70, 0x19, 0x7a, 0x4b, 0x43, 0x6f, 0x29, 0x39, 0xdf, 0x60, 0x9d, 0xe6, |
1122 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 820 | 0x42, 0x5f, 0x19, 0xf1, 0x1a, 0xe3, 0x58, 0x2b, 0x87, 0x81, 0x03, 0x3a, |
1123 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 821 | 0x17, 0x47, 0x2f, 0x64, 0x65, 0xca, 0xda, 0x1d, 0xf1, 0x00, 0x5c, 0x88, |
1124 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 822 | 0x1f, 0x85, 0x36, 0xf4, 0xf1, 0x1d, 0x9a, 0x53, 0xff, 0x86, 0x7f, 0x94, |
1125 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 823 | 0xed, 0x09, 0xbd, 0x30, 0xd6, 0xd4, 0xbf, 0x6e, 0xfc, 0xa1, 0x1c, 0x68, |
1126 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 824 | 0x33, 0x06, 0x31, 0xfe, 0xe8, 0xa8, 0xf3, 0x18, 0x8b, 0x48, 0xd7, 0x92, |
1127 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 825 | 0x23, 0x4b, 0x23, 0xdc, 0x37, 0x8b, 0xf1, 0xa7, 0x5c, 0xe7, 0x9e, 0x29, |
1128 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 826 | 0x5c, 0xc0, 0x19, 0xad, 0xf1, 0xfd, 0x11, 0x87, 0x6b, 0x7c, 0x99, 0x70, |
1129 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 827 | 0x3a, 0xc4, 0x48, 0x96, 0xb4, 0xc7, 0x07, 0x11, 0x7b, 0x1e, 0xe0, 0x3e, |
1130 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 828 | 0x32, 0x06, 0x6d, 0x17, 0xb0, 0xea, 0xb4, 0x3c, 0x3c, 0xc8, 0x75, 0xa0, |
1131 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 829 | 0xdd, 0x2a, 0x7a, 0x92, 0x34, 0xf3, 0x21, 0x4f, 0x43, 0xdd, 0x81, 0xbe, |
1132 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 830 | 0x06, 0xac, 0x40, 0x7f, 0x9f, 0xe9, 0x5e, 0xd5, 0x1f, 0xd7, 0x35, 0xf3, |
1133 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 831 | 0xcb, 0x18, 0x96, 0x90, 0x81, 0x33, 0x1b, 0x65, 0xe7, 0xa2, 0x25, 0xf6, |
1134 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 832 | 0x99, 0x55, 0xfe, 0x76, 0x9e, 0x5b, 0xcb, 0x5f, 0xf4, 0x7f, 0x15, 0x5c, |
1135 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 833 | 0xd0, 0xc5, 0x8e, 0xfa, 0x1e, 0x4b, 0x05, 0xb8, 0xa3, 0xf6, 0x7b, 0xe1, |
1136 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 834 | 0x5e, 0xf1, 0xfd, 0x99, 0x70, 0x4f, 0xb0, 0x07, 0x88, 0x95, 0xe7, 0x6f, |
1137 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 835 | 0xc5, 0xa9, 0x0c, 0xf6, 0x06, 0xb6, 0xa7, 0xe2, 0x11, 0xe3, 0x18, 0xed, |
1138 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 836 | 0xbb, 0x63, 0xd2, 0x2c, 0xb0, 0x8e, 0xe6, 0x3e, 0xc9, 0x44, 0xb9, 0x22, |
1139 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 837 | 0xa5, 0xad, 0x85, 0x67, 0x7d, 0xd8, 0xcf, 0xa4, 0xa5, 0x6c, 0xaf, 0x63, |
1140 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 838 | 0xaf, 0x97, 0x37, 0xa0, 0x1b, 0x8c, 0xc1, 0x26, 0xf5, 0x42, 0x42, 0x8a, |
1141 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 839 | 0x8d, 0x44, 0xc2, 0x3c, 0x31, 0xf0, 0x23, 0xcf, 0x48, 0x24, 0xf4, 0x13, |
1142 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 840 | 0x81, 0x9d, 0x4d, 0xd6, 0x6f, 0x20, 0x56, 0x6a, 0x72, 0x74, 0xe8, 0x86, |
1143 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 841 | 0xcf, 0x1a, 0xd8, 0xdb, 0x0b, 0x9b, 0x1b, 0x82, 0xcf, 0x80, 0x8f, 0x72, |
1144 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 842 | 0xa3, 0xa3, 0x37, 0xe0, 0xed, 0x2b, 0x11, 0x8f, 0xa6, 0x8e, 0xdc, 0xd3, |
1145 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 843 | 0xcb, 0xfb, 0xbe, 0x51, 0xd8, 0x90, 0x98, 0xce, 0x8f, 0x6f, 0xd1, 0xcf, |
1146 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 844 | 0xed, 0xdf, 0x62, 0x9c, 0x2b, 0x6d, 0x01, 0x3e, 0xdd, 0xcb, 0xe3, 0xf7, |
1147 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 845 | 0x9c, 0xc8, 0x44, 0x15, 0x3a, 0xdf, 0x03, 0x3d, 0x59, 0xf0, 0xc5, 0x3d, |
1148 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 846 | 0xa6, 0xca, 0xd1, 0xf5, 0x3d, 0x2f, 0x6e, 0x0a, 0x70, 0xf0, 0xfd, 0x27, |
1149 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 847 | 0x7e, 0x70, 0x86, 0x5e, 0x0e, 0xfb, 0x7e, 0x3f, 0xdc, 0x87, 0x5f, 0x45, |
1150 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 848 | 0xb9, 0x78, 0x5e, 0x44, 0xb2, 0xad, 0x3d, 0x37, 0xb2, 0xe3, 0x25, 0x9c, |
1151 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 849 | 0x33, 0xa7, 0x1d, 0xdf, 0x7f, 0x07, 0xcf, 0x35, 0xa7, 0xd9, 0x46, 0xde, |
1152 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 850 | 0x7f, 0xf6, 0x31, 0x07, 0xf8, 0x2c, 0xce, 0xbd, 0xd1, 0xa6, 0xb3, 0xff, |
1153 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 851 | 0x5e, 0xcf, 0xbd, 0x7b, 0x3f, 0xfb, 0xc9, 0xf3, 0x1d, 0x7d, 0xef, 0x03, |
1154 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 852 | 0xce, 0xfe, 0x0f, 0x5c, 0x77, 0x0f, 0x3e, 0x1b, 0xd8, 0x6d, 0xb1, 0xd1, |
1155 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 853 | 0x1c, 0x5f, 0xee, 0xd5, 0x7f, 0x7f, 0xad, 0xfb, 0x76, 0xff, 0xb5, 0xbb, |
1156 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 854 | 0x6f, 0xf7, 0xdf, 0xcd, 0xdd, 0xbf, 0x18, 0xff, 0xcd, 0x01, 0x0f, 0x7d, |
1157 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 855 | 0x70, 0xad, 0xff, 0xae, 0xe7, 0x93, 0xd4, 0xf7, 0xf3, 0x3d, 0xe5, 0xa1, |
1158 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 856 | 0xce, 0x30, 0x1f, 0x52, 0xe7, 0xf5, 0x17, 0xa7, 0x6d, 0xef, 0x7e, 0x53, |
1159 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 857 | 0x4a, 0xb9, 0x16, 0xc9, 0xe6, 0x6a, 0xb2, 0x43, 0x8e, 0x3b, 0x22, 0x4b, |
1160 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 858 | 0xaa, 0x16, 0x31, 0x51, 0x8b, 0x0f, 0xa0, 0x3e, 0x0b, 0xf4, 0xba, 0xa4, |
1161 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 859 | 0xf4, 0xf2, 0x02, 0x78, 0x89, 0xf0, 0x74, 0xdd, 0x05, 0x0f, 0x71, 0x10, |
1162 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 860 | 0x17, 0xf1, 0x0c, 0xe2, 0x7c, 0xb7, 0xd7, 0xc1, 0x85, 0x73, 0xea, 0x25, |
1163 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 861 | 0xd4, 0x64, 0xb6, 0xde, 0xa3, 0x07, 0x67, 0xb2, 0x5b, 0x96, 0xdd, 0xe9, |
1164 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 862 | 0xeb, 0xf2, 0x05, 0x9e, 0x59, 0x0a, 0xae, 0xce, 0x21, 0x56, 0x0f, 0x8d, |
1165 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 863 | 0x85, 0x75, 0xd2, 0xdc, 0x41, 0xcf, 0x8e, 0xee, 0x49, 0x78, 0x47, 0x92, |
1166 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 864 | 0x90, 0x92, 0x9a, 0xb5, 0x04, 0x1d, 0x68, 0x72, 0x0d, 0x67, 0xd0, 0xd5, |
1167 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 865 | 0xb9, 0x76, 0xe0, 0x45, 0xee, 0x77, 0x20, 0xbb, 0x57, 0xb4, 0x7e, 0xab, |
1168 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 866 | 0x55, 0x6b, 0x87, 0x2f, 0x65, 0xc4, 0x55, 0x6d, 0x9e, 0xd3, 0xa7, 0x66, |
1169 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 867 | 0x16, 0x2b, 0xc8, 0x03, 0x6d, 0x9c, 0xaf, 0x79, 0xbc, 0xd7, 0x49, 0x43, |
1170 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 868 | 0x93, 0x2b, 0x73, 0xba, 0xfc, 0xd3, 0x9c, 0x21, 0xff, 0x8c, 0x3a, 0xf4, |
1171 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 869 | 0x9a, 0x7d, 0x6a, 0xe6, 0xb4, 0x2d, 0xf7, 0x81, 0xd5, 0xf0, 0x0e, 0x4f, |
1172 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 870 | 0x76, 0x9a, 0x42, 0x5b, 0x1d, 0x48, 0xff, 0x8e, 0x20, 0xff, 0xc1, 0x9a, |
1173 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 871 | 0x2b, 0x73, 0xa4, 0xb5, 0x76, 0x8d, 0xf4, 0x22, 0x1f, 0x83, 0x5d, 0x0f, |
1174 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 872 | 0x30, 0x27, 0xe2, 0x7c, 0xd4, 0xab, 0x03, 0xd6, 0x3e, 0xc5, 0x5b, 0x42, |
1175 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 873 | 0x16, 0xeb, 0x9c, 0x6f, 0x82, 0xb7, 0x2e, 0x9c, 0x31, 0x59, 0x6b, 0x52, |
1176 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 874 | 0xfe, 0xb0, 0x5b, 0xe5, 0xaa, 0x1a, 0xfb, 0x0d, 0xb5, 0xc7, 0xef, 0xef, |
1177 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 875 | 0xe7, 0xde, 0x1b, 0x32, 0x95, 0x62, 0x9b, 0x63, 0x59, 0xd4, 0x9c, 0xc4, |
1178 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 876 | 0x97, 0xdd, 0xeb, 0x0a, 0x79, 0x0e, 0xde, 0xaf, 0x08, 0x65, 0xdb, 0x6d, |
1179 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 877 | 0x5d, 0x97, 0xd7, 0x7d, 0xf7, 0x00, 0xe5, 0x89, 0x72, 0x8b, 0x39, 0x9f, |
1180 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 878 | 0xb1, 0xd8, 0x28, 0xcc, 0xc0, 0x8e, 0xbf, 0x2a, 0xdf, 0x6f, 0x1c, 0x92, |
1181 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 879 | 0xef, 0x35, 0x26, 0xe5, 0xcf, 0x1a, 0x5f, 0x96, 0x3f, 0x6d, 0x1c, 0x94, |
1182 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 880 | 0xd7, 0x1b, 0x07, 0xe4, 0xb5, 0xc6, 0x84, 0xbc, 0xda, 0xd8, 0x0f, 0x1b, |
1183 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 881 | 0x1f, 0x87, 0x8d, 0x9f, 0x9a, 0x99, 0xac, 0xf7, 0xcb, 0xd4, 0x49, 0xc4, |
1184 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 882 | 0x20, 0xe7, 0x1b, 0xba, 0xba, 0xe3, 0xb3, 0xe9, 0xe7, 0x2d, 0x32, 0xad, |
1185 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 883 | 0xee, 0xaf, 0x34, 0xe4, 0x89, 0x2d, 0xbc, 0x2b, 0x7c, 0xc5, 0x33, 0x2e, |
1186 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 884 | 0x87, 0xf1, 0xe8, 0xe1, 0x94, 0xb4, 0x03, 0xbf, 0xca, 0x4b, 0x4d, 0x9e, |
1187 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 885 | 0xdb, 0x62, 0x86, 0xf7, 0x9c, 0x87, 0x24, 0xc9, 0xfb, 0xb0, 0x9c, 0x67, |
1188 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 886 | 0xa0, 0xde, 0x5e, 0xd7, 0x27, 0x73, 0xb4, 0x65, 0xe8, 0xc6, 0x95, 0x43, |
1189 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 887 | 0xb0, 0x53, 0xc3, 0x7e, 0xcb, 0xa5, 0x1e, 0x16, 0x97, 0x28, 0xf7, 0x46, |
1190 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 888 | 0x59, 0x5c, 0xa0, 0x6f, 0xff, 0x1b, 0x64, 0x6c, 0x97, 0xda, 0x82, 0x89, |
1191 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 889 | 0xb9, 0x6e, 0x98, 0xab, 0x6c, 0xa7, 0x3d, 0x00, 0x1f, 0xf1, 0x7e, 0x10, |
1192 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 890 | 0x4e, 0xab, 0x09, 0x27, 0xf1, 0x24, 0x54, 0x0c, 0x08, 0x70, 0x5b, 0x52, |
1193 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 891 | 0x5b, 0x4a, 0xca, 0xc2, 0x42, 0x0f, 0x9e, 0x94, 0x2c, 0xd4, 0x6d, 0x3c, |
1194 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 892 | 0x39, 0x3c, 0x43, 0x78, 0xd2, 0xb0, 0x53, 0xca, 0xc8, 0xd8, 0x12, 0xc9, |
1195 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 893 | 0x88, 0x78, 0x5c, 0xed, 0x0d, 0x6b, 0x2a, 0xf2, 0xa3, 0x85, 0xfc, 0x74, |
1196 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 894 | 0x87, 0x7d, 0x1d, 0x52, 0xab, 0x38, 0x32, 0x55, 0xfd, 0x94, 0x3e, 0xa5, |
1197 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 895 | 0x74, 0x07, 0xfc, 0x95, 0x21, 0xb4, 0xef, 0x0f, 0xdb, 0x8f, 0xca, 0xf4, |
1198 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 896 | 0xbc, 0xc8, 0xca, 0xcb, 0x03, 0x7a, 0x51, 0xb5, 0xf7, 0xa2, 0xad, 0xa3, |
1199 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 897 | 0x9d, 0x0d, 0xdb, 0xcc, 0x8f, 0x0e, 0xe0, 0x71, 0xd5, 0xf3, 0xf5, 0xea, |
1200 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 898 | 0xb8, 0x3c, 0x55, 0xed, 0x77, 0x5e, 0x87, 0xcd, 0xbd, 0x65, 0x46, 0xf7, |
1201 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 899 | 0xd2, 0x04, 0x24, 0x79, 0xf6, 0x56, 0x75, 0xf7, 0xf1, 0x04, 0xe2, 0xad, |
1202 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 900 | 0x9b, 0x34, 0xe5, 0x6f, 0x4f, 0x64, 0xad, 0xa7, 0xf5, 0x5c, 0x52, 0xda, |
1203 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 901 | 0x7d, 0xff, 0x71, 0x3b, 0x3b, 0x3b, 0xa9, 0x77, 0xca, 0xdf, 0xbf, 0x98, |
1204 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 902 | 0x91, 0x85, 0xb3, 0x5b, 0x65, 0xa1, 0x06, 0x99, 0x1a, 0xbf, 0x8e, 0x7d, |
1205 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 903 | 0x35, 0xe5, 0xea, 0x9e, 0x47, 0xb1, 0x27, 0x8c, 0x5d, 0x49, 0xe4, 0x6c, |
1206 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 904 | 0x1b, 0xc4, 0xec, 0x25, 0x5d, 0x49, 0x98, 0x85, 0x9c, 0x1c, 0x81, 0xdf, |
1207 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 905 | 0x4f, 0xdb, 0xb9, 0x1e, 0x69, 0xc7, 0x7b, 0x7d, 0x04, 0x7c, 0x5b, 0x32, |
1208 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 906 | 0xd5, 0x6b, 0xc9, 0x99, 0xc1, 0x68, 0xff, 0xb6, 0x62, 0x6e, 0x46, 0x16, |
1209 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 907 | 0xcf, 0x66, 0xf0, 0x9b, 0x83, 0xfd, 0xec, 0x94, 0x57, 0x6a, 0xfd, 0xb2, |
1210 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 908 | 0x54, 0xdb, 0x2a, 0x8b, 0xb5, 0xe6, 0x7d, 0xe8, 0xec, 0x09, 0xe2, 0x1d, |
1211 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 909 | 0xf1, 0xf4, 0x5b, 0x53, 0xfa, 0x56, 0x71, 0xcd, 0x7e, 0xeb, 0x29, 0xfd, |
1212 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 910 | 0x1f, 0xe4, 0x31, 0x33, 0xa0, 0xa9, 0x17, 0x7e, 0xa4, 0xee, 0x84, 0x26, |
1213 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 911 | 0x79, 0xf6, 0x2a, 0xbc, 0x4f, 0x26, 0x49, 0xfb, 0xf5, 0xc6, 0x07, 0xd1, |
1214 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 912 | 0x59, 0xcb, 0xcf, 0x9d, 0x68, 0x52, 0x06, 0xe2, 0xec, 0xbf, 0x71, 0x52, |
1215 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 913 | 0xef, 0x95, 0xe5, 0x6d, 0x0f, 0x58, 0x4f, 0xea, 0xad, 0x88, 0x01, 0x3f, |
1216 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 914 | 0x97, 0x9f, 0xee, 0xd9, 0x24, 0x3f, 0xfc, 0xcd, 0xec, 0xa9, 0x6f, 0x22, |
1217 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 915 | 0xd9, 0xbf, 0xb2, 0xa7, 0x83, 0x71, 0x01, 0xef, 0xec, 0xcf, 0xde, 0x70, |
1218 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 916 | 0x75, 0xea, 0xe1, 0x2f, 0xa0, 0x87, 0xec, 0x9c, 0xba, 0x9b, 0x56, 0x3c, |
1219 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 917 | 0x90, 0x3e, 0xf5, 0x52, 0x06, 0x6f, 0x18, 0xab, 0xf7, 0x03, 0x57, 0x59, |
1220 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 918 | 0xe9, 0xf9, 0x09, 0x27, 0x7b, 0x03, 0xe9, 0xb0, 0xbf, 0x68, 0xf7, 0xa7, |
1221 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 919 | 0x77, 0xea, 0x3b, 0x64, 0x32, 0xfd, 0x80, 0xf5, 0xb4, 0x6c, 0x21, 0xce, |
1222 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 920 | 0xd9, 0x05, 0xc1, 0xda, 0x79, 0xe2, 0xfb, 0x2b, 0xe0, 0x0b, 0x70, 0x28, |
1223 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 921 | 0xff, 0x51, 0x38, 0x77, 0x59, 0x5f, 0xd7, 0x79, 0xc6, 0x63, 0x0c, 0x71, |
1224 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 922 | 0xe1, 0xe2, 0x10, 0x65, 0x40, 0x82, 0x95, 0xca, 0xa6, 0x5d, 0xfd, 0xc3, |
1225 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 923 | 0xc8, 0x47, 0xfc, 0xfd, 0x56, 0x51, 0x27, 0x0f, 0xe7, 0xc0, 0xcb, 0x4f, |
1226 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 924 | 0xc0, 0x7f, 0x3f, 0x70, 0xa2, 0xf6, 0x48, 0x47, 0x74, 0xff, 0x4e, 0xd1, |
1227 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 925 | 0x7d, 0xad, 0x21, 0xe6, 0x2a, 0x5d, 0xf4, 0xd5, 0x75, 0xc8, 0xdd, 0x07, |
1228 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 926 | 0x7b, 0xb5, 0xf0, 0xcb, 0xbd, 0xe9, 0x0c, 0xf7, 0x98, 0xeb, 0x22, 0xba, |
1229 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 927 | 0x11, 0xbf, 0x5c, 0x73, 0x27, 0x1e, 0xee, 0x75, 0x3e, 0xea, 0xd4, 0x03, |
1230 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 928 | 0x09, 0x79, 0xf7, 0x44, 0xb4, 0x37, 0x07, 0x64, 0xba, 0x0a, 0xdd, 0xed, |
1231 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 929 | 0xea, 0x0f, 0xfc, 0x27, 0x1d, 0xf1, 0x40, 0xde, 0xff, 0x06, 0xbc, 0x07, |
1232 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 930 | 0xb8, 0x5b, 0x0b, 0xcd, 0xba, 0xc3, 0x58, 0x3d, 0xa0, 0x31, 0xb6, 0x0e, |
1233 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 931 | 0x4f, 0x57, 0xf6, 0x44, 0xbe, 0x98, 0x84, 0x5f, 0xed, 0xb6, 0x9e, 0x10, |
1234 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 932 | 0xd6, 0x63, 0xc4, 0x9b, 0x94, 0x1f, 0xbe, 0x0c, 0x1e, 0x92, 0xf4, 0x93, |
1235 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 933 | 0x7f, 0x5f, 0xe3, 0x27, 0x1c, 0xdb, 0x2a, 0x35, 0xd4, 0xd4, 0x5e, 0xde, |
1236 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 934 | 0x94, 0x69, 0x25, 0x03, 0xda, 0x35, 0xfa, 0x77, 0x29, 0xf4, 0xef, 0x47, |
1237 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 935 | 0x80, 0xa3, 0x5d, 0x8c, 0x47, 0x1f, 0xc7, 0x59, 0x9d, 0xcd, 0x2c, 0xeb, |
1238 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 936 | 0xcc, 0x03, 0x76, 0x4b, 0x51, 0xdd, 0x4f, 0xdf, 0x8b, 0xee, 0xa2, 0xd8, |
1239 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 937 | 0x94, 0x96, 0x8b, 0x95, 0x28, 0x2e, 0xa5, 0x71, 0x9e, 0xb4, 0xcb, 0xa5, |
1240 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 938 | 0xb9, 0x28, 0xe6, 0xb5, 0xcb, 0x12, 0xf2, 0x9a, 0x95, 0x97, 0x2c, 0x8c, |
1241 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 939 | 0x25, 0xe5, 0xe2, 0x5c, 0x12, 0x31, 0xab, 0x47, 0x56, 0xe6, 0x7a, 0x30, |
1242 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 940 | 0x96, 0xc2, 0xba, 0x14, 0xe6, 0xdb, 0xb2, 0x52, 0xb1, 0x81, 0x27, 0x87, |
1243 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 941 | 0x76, 0x0e, 0xed, 0x21, 0xb9, 0xa4, 0xbe, 0x17, 0x30, 0x2f, 0x18, 0x42, |
1244 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 942 | 0xdc, 0x62, 0x5e, 0x30, 0x82, 0x18, 0x32, 0x81, 0x27, 0x8a, 0x5d, 0xa7, |
1245 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 943 | 0x66, 0xa6, 0x2a, 0xbc, 0x73, 0x84, 0x0e, 0xac, 0x53, 0x33, 0xd3, 0xb6, |
1246 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 944 | 0x89, 0xba, 0xed, 0x1b, 0xda, 0x54, 0x83, 0x72, 0x41, 0xb7, 0x43, 0x1d, |
1247 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 945 | 0xa2, 0x3f, 0x4a, 0x9b, 0xe4, 0x79, 0x67, 0x20, 0xc6, 0x77, 0x01, 0x9f, |
1248 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 946 | 0x23, 0xfa, 0x6f, 0xd0, 0x17, 0xa0, 0xc3, 0x27, 0xba, 0xe4, 0xd2, 0xcb, |
1249 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 947 | 0x8c, 0x35, 0xae, 0xbc, 0x7a, 0x96, 0x3a, 0x2c, 0xf6, 0xac, 0xea, 0x90, |
1250 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 948 | 0x63, 0x0f, 0xe1, 0x8c, 0xd8, 0x0f, 0x7b, 0x32, 0x33, 0x87, 0x90, 0xcb, |
1251 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 949 | 0x7c, 0x1b, 0xf6, 0x59, 0x66, 0xcd, 0x9d, 0x0e, 0x6a, 0x84, 0x20, 0x06, |
1252 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 950 | 0xa0, 0xdd, 0x47, 0x5d, 0xb1, 0xdd, 0x07, 0xbb, 0xe3, 0x58, 0x9f, 0x1a, |
1253 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 951 | 0x5b, 0x04, 0x8e, 0x60, 0x8c, 0xed, 0xcd, 0xb2, 0xa8, 0xc6, 0x0e, 0xaa, |
1254 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 952 | 0xb1, 0xb2, 0xb2, 0x0f, 0x8e, 0x1d, 0x52, 0xb1, 0xe9, 0x7c, 0x23, 0xea, |
1255 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 953 | 0xdf, 0x88, 0x58, 0xc2, 0x7e, 0xf6, 0xe5, 0x61, 0xeb, 0x7b, 0x71, 0xae, |
1256 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 954 | 0x15, 0x64, 0xa9, 0x81, 0x3a, 0x30, 0xff, 0x7b, 0x98, 0xcb, 0x3d, 0xc8, |
1257 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 955 | 0x9e, 0x2a, 0xe9, 0xe4, 0xf1, 0x20, 0xce, 0x83, 0xfd, 0x21, 0xad, 0xb6, |
1258 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 956 | 0x90, 0xaf, 0x03, 0x61, 0xbb, 0x25, 0xa4, 0x4d, 0x3c, 0x36, 0x70, 0x1c, |
1259 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 957 | 0xc3, 0x5a, 0x17, 0x38, 0x18, 0x63, 0x11, 0x23, 0x52, 0x29, 0xe8, 0x82, |
1260 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 958 | 0x34, 0xdb, 0xa4, 0xac, 0xde, 0xf7, 0xc3, 0x76, 0xb9, 0x16, 0x3a, 0xb4, |
1261 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 959 | 0xa2, 0x75, 0xa5, 0x70, 0xcf, 0x53, 0xea, 0x9c, 0xd1, 0x93, 0x9b, 0xc3, |
1262 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 960 | 0x9c, 0x10, 0x7a, 0x45, 0x9c, 0xd5, 0x93, 0x8c, 0x37, 0xef, 0x84, 0x76, |
1263 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 961 | 0xda, 0x8b, 0xbe, 0x87, 0x44, 0xef, 0x65, 0xdf, 0x51, 0xe0, 0x61, 0xed, |
1264 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 962 | 0x3c, 0x0c, 0x99, 0xd9, 0xe6, 0xfa, 0x6c, 0xd3, 0xfa, 0xc4, 0x3a, 0xeb, |
1265 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 963 | 0x3b, 0x9a, 0xfa, 0x32, 0x52, 0x9b, 0xef, 0x52, 0xf1, 0xf2, 0x7c, 0x18, |
1266 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 964 | 0x2f, 0x17, 0x6b, 0x94, 0x05, 0x7e, 0x96, 0x7f, 0x5b, 0xe9, 0xa2, 0x76, |
1267 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 965 | 0x36, 0xb0, 0xf5, 0xa5, 0x93, 0x3c, 0x17, 0x57, 0xe7, 0xd5, 0xd4, 0xbc, |
1268 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 966 | 0xdf, 0x06, 0xff, 0xba, 0x1c, 0x55, 0x32, 0x70, 0x3e, 0xe6, 0xd5, 0x02, |
1269 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 967 | 0xbf, 0x31, 0x6c, 0xce, 0xa1, 0x8f, 0x44, 0x6b, 0x38, 0xff, 0xe7, 0xa8, |
1270 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 968 | 0x55, 0xbe, 0xac, 0xd6, 0xac, 0xfa, 0x0c, 0xf9, 0x71, 0x42, 0x9e, 0x7b, |
1271 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 969 | 0xc0, 0x5f, 0x67, 0x28, 0x43, 0x7b, 0x28, 0x03, 0xf1, 0xfd, 0x27, 0x70, |
1272 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 970 | 0xb7, 0x61, 0x1e, 0x79, 0xdd, 0x86, 0x3e, 0xbe, 0xff, 0x17, 0xfa, 0x76, |
1273 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 971 | 0x23, 0xff, 0x23, 0x6f, 0x89, 0x26, 0xde, 0xfe, 0x03, 0x63, 0x3d, 0x4a, |
1274 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 972 | 0xb7, 0x35, 0xd4, 0x26, 0x53, 0xbc, 0xef, 0x48, 0xe1, 0x1c, 0x38, 0xb9, |
1275 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 973 | 0x4d, 0xd1, 0xad, 0x9d, 0xbd, 0x86, 0xf1, 0x5e, 0xac, 0x89, 0xda, 0xcd, |
1276 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 974 | 0xb2, 0xe9, 0x58, 0xfb, 0x53, 0x25, 0xcf, 0x62, 0xed, 0x4e, 0xf2, 0x6f, |
1277 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 975 | 0x5b, 0x23, 0x3b, 0xe5, 0x26, 0x4f, 0xe4, 0xa7, 0x1f, 0x4f, 0x2b, 0x72, |
1278 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 976 | 0x21, 0xd8, 0x6d, 0xd2, 0x90, 0xd1, 0x7c, 0x9a, 0xdf, 0xf9, 0x12, 0xbc, |
1279 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 977 | 0x17, 0x1d, 0x19, 0xe4, 0x9e, 0xa1, 0xdd, 0x60, 0x4e, 0x47, 0x7f, 0x4b, |
1280 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 978 | 0xc8, 0x31, 0xd4, 0x24, 0xe5, 0x85, 0x8c, 0x56, 0x3c, 0x99, 0x45, 0x16, |
1281 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 979 | 0xad, 0xbe, 0xd5, 0xc9, 0x8b, 0x4b, 0xb6, 0x7c, 0x1b, 0x7e, 0x7a, 0xb2, |
1282 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 980 | 0x9e, 0x4d, 0x7f, 0x13, 0xf9, 0xc1, 0x91, 0x25, 0xe6, 0x13, 0x3d, 0x29, |
1283 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 981 | 0x65, 0x9b, 0xf3, 0x9a, 0x6c, 0x60, 0x4c, 0x9b, 0x47, 0x7e, 0x6a, 0xdd, |
1284 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 982 | 0x2d, 0x47, 0x82, 0x9f, 0x57, 0xd7, 0xc6, 0x0c, 0xca, 0xb1, 0x36, 0x66, |
1285 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 983 | 0x10, 0x0f, 0x63, 0xc6, 0x4e, 0xec, 0x13, 0x63, 0x06, 0xf6, 0xff, 0x24, |
1286 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 984 | 0x63, 0x86, 0x8d, 0x75, 0x8c, 0x19, 0x79, 0x59, 0xac, 0x32, 0x66, 0xec, |
1287 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 985 | 0x45, 0x9b, 0x31, 0xa3, 0x80, 0x76, 0x10, 0x2f, 0x16, 0x55, 0xbc, 0xc8, |
1288 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 986 | 0x5a, 0xcb, 0xc2, 0x38, 0x81, 0x3c, 0xb1, 0x8a, 0x3c, 0xb1, 0x8a, 0x3c, |
1289 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 987 | 0xb1, 0x8a, 0x3c, 0xb1, 0x8a, 0x3c, 0x11, 0xb6, 0xfe, 0x5a, 0x15, 0x79, |
1290 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 988 | 0x22, 0xfc, 0xe7, 0x3c, 0x72, 0x92, 0xa0, 0xa6, 0x38, 0x8c, 0x9a, 0xc2, |
1291 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 989 | 0xd5, 0xc6, 0xaa, 0xe3, 0xda, 0xbe, 0x2a, 0x6a, 0x43, 0xf5, 0x9d, 0x58, |
1292 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 990 | 0x1f, 0xda, 0x80, 0xba, 0xa8, 0xe6, 0x6c, 0x01, 0x5f, 0xd7, 0xe0, 0x1b, |
1293 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 991 | 0xd4, 0xd3, 0x56, 0x99, 0xca, 0xed, 0x80, 0x7c, 0xd8, 0x7f, 0xfb, 0xfb, |
1294 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 992 | 0xe8, 0x43, 0x3e, 0x9f, 0x63, 0x0d, 0xc2, 0x78, 0xb5, 0x0f, 0x6d, 0x1d, |
1295 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 993 | 0x6d, 0xec, 0xe9, 0x04, 0x7c, 0xc4, 0x7e, 0x90, 0xf9, 0x62, 0x7a, 0x41, |
1296 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 994 | 0x9e, 0xdc, 0x1c, 0xd8, 0xf4, 0x6f, 0x31, 0x27, 0x5e, 0xd3, 0xde, 0x88, |
1297 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 995 | 0x39, 0xf0, 0x17, 0xd8, 0x97, 0x5a, 0x03, 0x5c, 0xba, 0xfd, 0xe7, 0xc4, |
1298 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 996 | 0xd1, 0xb7, 0xe1, 0xd6, 0x1c, 0xda, 0xd5, 0xf7, 0x9a, 0xfa, 0xb2, 0x98, |
1299 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 997 | 0xcf, 0xef, 0xe2, 0x3b, 0xf0, 0xfb, 0x16, 0x7e, 0x61, 0x77, 0xf6, 0x05, |
1300 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 998 | 0xcc, 0xe9, 0xc3, 0xef, 0x77, 0x9a, 0xe6, 0x42, 0x0a, 0xfb, 0x2f, 0xd1, |
1301 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 999 | 0x77, 0x31, 0xa4, 0xc1, 0x6f, 0x89, 0x5f, 0x6a, 0xe2, 0xe3, 0x07, 0xe8, |
1302 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1000 | 0xfb, 0x6b, 0xf4, 0xf9, 0xfe, 0xdb, 0x4e, 0xd4, 0x27, 0xa5, 0x96, 0x70, |
1303 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1001 | 0xef, 0x46, 0xd5, 0xde, 0x69, 0xca, 0xe6, 0x8f, 0x2c, 0xe9, 0xaa, 0x0e, |
1304 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1002 | 0x7a, 0xae, 0x8e, 0xea, 0x08, 0x71, 0xbe, 0xbc, 0x10, 0xd4, 0xad, 0xc7, |
1305 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1003 | 0x51, 0x73, 0x16, 0xab, 0xb4, 0x91, 0x1c, 0xfa, 0x6d, 0x9c, 0x69, 0x32, |
1306 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1004 | 0x69, 0xdc, 0xaa, 0x63, 0x13, 0x89, 0xc9, 0x7a, 0x9b, 0x48, 0x37, 0x69, |
1307 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1005 | 0x32, 0x4f, 0x22, 0x8e, 0xd9, 0x99, 0xe2, 0xc2, 0xec, 0x8c, 0x07, 0x9c, |
1308 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1006 | 0x63, 0x75, 0xae, 0xe5, 0x3c, 0x93, 0xf7, 0x63, 0x4d, 0x74, 0x69, 0x13, |
1309 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1007 | 0x60, 0x06, 0xf4, 0x9e, 0xab, 0x93, 0x7e, 0x40, 0xb3, 0xac, 0x68, 0xda, |
1310 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1008 | 0xe8, 0x8f, 0xea, 0xc7, 0x1c, 0x6a, 0x5d, 0x99, 0x64, 0xed, 0x5c, 0x0c, |
1311 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1009 | 0x69, 0xba, 0x75, 0x49, 0x24, 0x0a, 0xcd, 0xf8, 0x82, 0x8c, 0xf3, 0xb9, |
1312 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1010 | 0xfa, 0xec, 0x8c, 0xfe, 0x42, 0x36, 0xc7, 0x3b, 0x11, 0xd7, 0x9a, 0x9d, |
1313 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1011 | 0x69, 0x1d, 0x48, 0xc8, 0x8f, 0x91, 0xbb, 0x1d, 0x53, 0x34, 0x66, 0x67, |
1314 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1012 | 0x8c, 0x17, 0x02, 0x5b, 0x0c, 0xe8, 0xe0, 0x3c, 0xc9, 0xb7, 0x43, 0x4e, |
1315 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1013 | 0xd2, 0x62, 0x4d, 0x1d, 0x8c, 0x4f, 0xaa, 0x7a, 0xd1, 0x94, 0x2b, 0x15, |
1316 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1014 | 0x45, 0x3b, 0xac, 0xdb, 0xc9, 0xc3, 0xec, 0x8c, 0xfc, 0xd1, 0x2d, 0x1e, |
1317 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1015 | 0xd6, 0x91, 0x87, 0x78, 0x49, 0x27, 0xd0, 0x5b, 0xc0, 0x7f, 0x12, 0xf5, |
1318 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1016 | 0x7b, 0x54, 0xab, 0xfb, 0xfe, 0x8a, 0x93, 0x43, 0x5c, 0xe0, 0x3e, 0xb6, |
1319 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1017 | 0xa8, 0x3c, 0xd7, 0x73, 0x32, 0xbc, 0xef, 0x9b, 0xe3, 0xdf, 0x39, 0x78, |
1320 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1018 | 0xf9, 0x01, 0xd4, 0x4d, 0xbc, 0x1b, 0xa4, 0x7f, 0xe1, 0xf7, 0x36, 0xff, |
1321 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1019 | 0xe2, 0x7c, 0xf6, 0x93, 0xe7, 0x81, 0xf4, 0x55, 0xf0, 0xe7, 0xe5, 0xd1, |
1322 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1020 | 0x87, 0x58, 0x51, 0x6c, 0x44, 0xb8, 0x78, 0xc7, 0xce, 0x39, 0x2a, 0xff, |
1323 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1021 | 0x6e, 0xf2, 0xd1, 0x96, 0xf0, 0xdc, 0xa5, 0x8e, 0xc8, 0x27, 0xf9, 0xe9, |
1324 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1022 | 0x84, 0x4d, 0x90, 0x17, 0xce, 0x8f, 0xee, 0x25, 0xd8, 0xfe, 0xb8, 0x36, |
1325 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1023 | 0x12, 0xdd, 0xa9, 0x7d, 0x9c, 0x3d, 0x8f, 0x74, 0x76, 0x37, 0x7e, 0x88, |
1326 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1024 | 0x83, 0xb4, 0x23, 0xbe, 0x22, 0x9e, 0x88, 0x8f, 0xfc, 0x44, 0xbc, 0x28, |
1327 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1025 | 0x1b, 0x5d, 0x97, 0x9f, 0x60, 0x5d, 0xc0, 0x4f, 0x69, 0x21, 0x0d, 0x9d, |
1328 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1026 | 0x90, 0xa7, 0x11, 0x6d, 0xa4, 0xba, 0xde, 0x1d, 0xc7, 0x0f, 0x5c, 0xc6, |
1329 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1027 | 0xd5, 0xb1, 0x06, 0xef, 0xa1, 0x48, 0x97, 0x7f, 0x3b, 0xb2, 0xa4, 0x8d, |
1330 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1028 | 0x34, 0xf8, 0x9d, 0xa9, 0xae, 0xb9, 0x8d, 0x88, 0xde, 0x5a, 0x9d, 0x46, |
1331 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1029 | 0xbf, 0xbc, 0x2b, 0xff, 0x0c, 0xf6, 0xa9, 0x3b, 0xf8, 0xbb, 0x14, 0x55, |
1332 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1030 | 0x47, 0xb1, 0x6f, 0xb9, 0xd5, 0x73, 0xa2, 0xbf, 0xd3, 0xd9, 0x1f, 0xe6, |
1333 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1031 | 0x43, 0x51, 0x6d, 0x1c, 0xd5, 0x59, 0xea, 0x9e, 0x7d, 0xaf, 0xe7, 0x68, |
1334 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1032 | 0xc8, 0x4f, 0x99, 0x33, 0x05, 0x3a, 0x08, 0xf1, 0xde, 0x91, 0xcf, 0x91, |
1335 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1033 | 0x26, 0x3e, 0x47, 0xc1, 0xe7, 0x3e, 0xf0, 0x39, 0x76, 0x8b, 0xcf, 0x5b, |
1336 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1034 | 0xb6, 0x97, 0x29, 0xc3, 0xf6, 0x46, 0xd6, 0xb5, 0xbd, 0x55, 0x3a, 0xab, |
1337 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1035 | 0x73, 0x83, 0xfb, 0x9a, 0x91, 0x86, 0x2f, 0xc7, 0x9d, 0x8f, 0x53, 0x37, |
1338 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1036 | 0xb7, 0xcb, 0x99, 0x85, 0xbb, 0xd5, 0xb7, 0x11, 0xaf, 0x2a, 0x77, 0x94, |
1339 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1037 | 0x4b, 0xf5, 0x80, 0x9f, 0x1f, 0x2f, 0xb1, 0x3d, 0x12, 0xea, 0x8a, 0x3a, |
1340 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1038 | 0xcb, 0x3a, 0x25, 0xb9, 0x1b, 0x2f, 0xbf, 0xf8, 0x9c, 0x76, 0xa5, 0x12, |
1341 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1039 | 0x9d, 0x4f, 0x5a, 0x78, 0xc6, 0xae, 0xe5, 0x29, 0xfa, 0x6e, 0x32, 0x66, |
1342 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1040 | 0x45, 0xf7, 0x67, 0x22, 0xfc, 0xfe, 0xc0, 0xef, 0x75, 0x6b, 0xbf, 0x13, |
1343 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1041 | 0xf0, 0x7c, 0x8a, 0x78, 0xd7, 0x53, 0x3c, 0x9f, 0xc6, 0x9c, 0x66, 0x19, |
1344 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1042 | 0x5c, 0xd8, 0xa4, 0x9e, 0xe4, 0x98, 0xe7, 0xd0, 0x2f, 0x4c, 0xd0, 0x0c, |
1345 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1043 | 0xee, 0xdd, 0x6a, 0x4b, 0xbe, 0x5c, 0x74, 0x36, 0x06, 0xe7, 0x28, 0x64, |
1346 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1044 | 0xba, 0x6c, 0xf1, 0xfe, 0x0a, 0x31, 0x8c, 0x67, 0x83, 0xb2, 0xb5, 0x16, |
1347 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1045 | 0xf5, 0x5c, 0x39, 0xd0, 0x0e, 0x1d, 0xb3, 0xdd, 0xd6, 0xcb, 0xfb, 0x0a, |
1348 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1046 | 0xca, 0xbc, 0xa0, 0xf6, 0x21, 0xd2, 0x71, 0xf4, 0x7d, 0xae, 0x55, 0x96, |
1349 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1047 | 0xc3, 0xbb, 0xad, 0xc5, 0x8a, 0xef, 0xbf, 0x83, 0x3c, 0xfc, 0x34, 0x74, |
1350 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1048 | 0x5f, 0xae, 0xff, 0xcc, 0x5f, 0x4e, 0xf1, 0x6f, 0xa5, 0x22, 0x9b, 0xd8, |
1351 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1049 | 0xd1, 0xcb, 0x7b, 0x20, 0xf8, 0x96, 0x1c, 0xaf, 0x87, 0x65, 0xbf, 0x70, |
1352 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1050 | 0x9c, 0x7d, 0xff, 0x0d, 0xbe, 0x7d, 0xff, 0xf4, 0xaa, 0x9d, 0x02, 0xfe, |
1353 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1051 | 0x17, 0x33, 0xe1, 0x9b, 0xdd, 0x90, 0x58, 0x00, 0x00, 0x00 }; |
1354 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1355 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1356 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1357 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1358 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1359 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1360 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1361 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1362 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1363 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1364 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1365 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1366 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1367 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1368 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1369 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1370 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1371 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1372 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1373 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1374 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1375 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1376 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1377 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1378 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1379 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1380 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1381 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1382 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1383 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1384 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1385 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1386 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1387 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1388 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1389 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1390 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1391 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1392 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1393 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1394 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1395 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1396 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1397 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1398 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1399 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1400 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1401 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1402 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1403 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1404 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1405 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1406 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1407 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1408 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1409 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1410 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1411 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1412 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1413 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1414 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1415 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1416 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1417 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1418 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1419 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1420 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1421 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1422 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1423 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1424 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1425 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1426 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1427 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1428 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1429 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1430 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1431 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1432 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1433 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1434 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1435 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1436 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1437 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1438 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1439 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1440 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1441 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1442 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1443 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1444 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1445 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1446 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1447 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1448 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1449 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1450 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1451 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1452 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1453 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1454 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1455 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1456 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1457 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1458 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1459 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1460 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1461 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1462 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1463 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1464 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1465 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1466 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1467 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1468 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1469 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1470 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1471 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1472 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1473 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1474 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1475 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1476 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1477 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1478 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1479 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1480 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1481 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1482 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1483 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1484 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1485 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1486 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1487 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1488 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1489 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1490 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1491 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1492 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1493 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1494 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1495 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1496 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1497 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1498 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1499 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1500 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1501 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1502 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1503 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1504 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1505 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1506 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1507 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1508 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1509 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1510 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1511 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1512 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1513 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1514 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1515 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1516 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1517 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1518 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1519 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1520 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
1521 | 0x00000000, 0x00000000, 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, | ||
1522 | 0x3c020800, 0x244258e0, 0x3c030800, 0x24636ca4, 0xac400000, 0x0043202b, | ||
1523 | 0x1480fffd, 0x24420004, 0x3c1d0800, 0x37bd7ffc, 0x03a0f021, 0x3c100800, | ||
1524 | 0x26103184, 0x3c1c0800, 0x279c58e0, 0x0e00104a, 0x00000000, 0x0000000d, | ||
1525 | 0x27bdffe8, 0xafb00010, 0xafbf0014, 0x0e000f1d, 0x00808021, 0x1440000d, | ||
1526 | 0x00000000, 0x8f820010, 0x10400005, 0x00000000, 0x9743011c, 0x9742011e, | ||
1527 | 0x0a000c89, 0x00021400, 0x9743011e, 0x9742011c, 0x00021400, 0x00621825, | ||
1528 | 0xaf830004, 0x8f840008, 0x3c020020, 0x34424000, 0x00821824, 0x54620004, | ||
1529 | 0x3c020020, 0x8f820014, 0x0a000c9a, 0x34421000, 0x34428000, 0x00821824, | ||
1530 | 0x14620004, 0x00000000, 0x8f820014, 0x34428000, 0xaf820014, 0x8f820008, | ||
1531 | 0x9743010c, 0x00403021, 0x30421000, 0x10400010, 0x3069ffff, 0x30c20020, | ||
1532 | 0x1440000e, 0x24070005, 0x3c021000, 0x00c21024, 0x10400009, 0x3c030dff, | ||
1533 | 0x3463ffff, 0x3c020e00, 0x00c21024, 0x0062182b, 0x50600004, 0x24070001, | ||
1534 | 0x0a000cb2, 0x3c020800, 0x24070001, 0x3c020800, 0x8c430034, 0x1460001d, | ||
1535 | 0x00405821, 0x8f820014, 0x30424000, 0x1440001a, 0x3c020001, 0x3c021f01, | ||
1536 | 0x00c24024, 0x3c031000, 0x15030015, 0x3c020001, 0x31220200, 0x14400012, | ||
1537 | 0x3c020001, 0x9744010e, 0x24020003, 0xa342018b, 0x97850016, 0x24020002, | ||
1538 | 0x34e30002, 0xaf400180, 0xa742018c, 0xa7430188, 0x24840004, 0x30a5bfff, | ||
1539 | 0xa744018e, 0xa74501a6, 0xaf4801b8, 0x0a000f19, 0x00001021, 0x3c020001, | ||
1540 | 0x00c21024, 0x1040002f, 0x00000000, 0x9742010e, 0x3c038000, 0x3046ffff, | ||
1541 | 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9784000a, | ||
1542 | 0x8f850004, 0x8f870014, 0x24020080, 0x24030002, 0xaf420180, 0x24020003, | ||
1543 | 0xa743018c, 0xa746018e, 0xa7420188, 0x30e28000, 0xa7440190, 0x1040000c, | ||
1544 | 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, | ||
1545 | 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00e21024, 0xaf820014, | ||
1546 | 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, | ||
1547 | 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x0a000f19, | ||
1548 | 0x00001021, 0x8f820014, 0x30434000, 0x10600016, 0x00404021, 0x3c020f00, | ||
1549 | 0x00c21024, 0x14400012, 0x00000000, 0x93420116, 0x34424000, 0x03421821, | ||
1550 | 0x94650002, 0x2ca21389, 0x1040000b, 0x3c020800, 0x24425900, 0x00051942, | ||
1551 | 0x00031880, 0x00621821, 0x30a5001f, 0x8c640000, 0x24020001, 0x00a21004, | ||
1552 | 0x00822024, 0x02048025, 0x12000030, 0x3c021000, 0x9742010e, 0x34e80002, | ||
1553 | 0x3c038000, 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, | ||
1554 | 0x24020003, 0xa342018b, 0x9784000a, 0x8f850004, 0x8f870014, 0x24020180, | ||
1555 | 0x24030002, 0xaf420180, 0xa743018c, 0xa746018e, 0xa7480188, 0x30e28000, | ||
1556 | 0xa7440190, 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, | ||
1557 | 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, | ||
1558 | 0x00e21024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, | ||
1559 | 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, | ||
1560 | 0xaf4201b8, 0x0a000f19, 0x00001021, 0x00c21024, 0x104000c0, 0x3c020800, | ||
1561 | 0x8c430030, 0x10600037, 0x31024000, 0x10400035, 0x3c030f00, 0x00c31824, | ||
1562 | 0x3c020100, 0x0043102b, 0x14400031, 0x3c030800, 0x9742010e, 0x34e80002, | ||
1563 | 0x3c038000, 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, | ||
1564 | 0x24020003, 0xa342018b, 0x9784000a, 0x8f850004, 0x8f870014, 0x24020080, | ||
1565 | 0x24030002, 0xaf420180, 0xa743018c, 0xa746018e, 0xa7480188, 0x30e28000, | ||
1566 | 0xa7440190, 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, | ||
1567 | 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, | ||
1568 | 0x00e21024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, | ||
1569 | 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, | ||
1570 | 0xaf4201b8, 0x0a000f19, 0x00001021, 0x3c030800, 0x8c620024, 0x30420008, | ||
1571 | 0x10400035, 0x34ea0002, 0x3c020f00, 0x00c21024, 0x14400032, 0x8d620034, | ||
1572 | 0x31220200, 0x1040002f, 0x8d620034, 0x9742010e, 0x30e8fffb, 0x3c038000, | ||
1573 | 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, | ||
1574 | 0xa342018b, 0x9784000a, 0x8f850004, 0x8f870014, 0x24020180, 0x24030002, | ||
1575 | 0xaf420180, 0xa743018c, 0xa746018e, 0xa7480188, 0x30e28000, 0xa7440190, | ||
1576 | 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004, | ||
1577 | 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00e21024, | ||
1578 | 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, | ||
1579 | 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, | ||
1580 | 0x8d620034, 0x8f860008, 0x10400012, 0x30c20100, 0x10400010, 0x3c020f00, | ||
1581 | 0x00c21024, 0x3c030200, 0x1043000c, 0x3c020800, 0x8c430038, 0x8f840004, | ||
1582 | 0x3c020800, 0x2442003c, 0x2463ffff, 0x00832024, 0x00822021, 0x90830000, | ||
1583 | 0x24630004, 0x0a000de1, 0x000329c0, 0x00000000, 0x00061602, 0x3042000f, | ||
1584 | 0x000229c0, 0x3c04fc00, 0x00441021, 0x3c030300, 0x0062182b, 0x50600001, | ||
1585 | 0x24050800, 0x9742010e, 0x3148ffff, 0x3c038000, 0x24420004, 0x3046ffff, | ||
1586 | 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9783000a, | ||
1587 | 0x8f840004, 0x8f870014, 0x24020002, 0xaf450180, 0xa742018c, 0xa746018e, | ||
1588 | 0xa7480188, 0x30e28000, 0xa7430190, 0x1040000c, 0xaf4401a8, 0x93420116, | ||
1589 | 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, | ||
1590 | 0x3c02ffff, 0x34427fff, 0x00e21024, 0xaf820014, 0x97820016, 0x9743010c, | ||
1591 | 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, | ||
1592 | 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x0a000f19, 0x00001021, 0x8f424000, | ||
1593 | 0x30420100, 0x104000d5, 0x3c020800, 0x8c440024, 0x24030001, 0x1483002f, | ||
1594 | 0x00405021, 0x9742010e, 0x34e70002, 0x3c038000, 0x24420004, 0x3045ffff, | ||
1595 | 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9783000a, | ||
1596 | 0x8f840004, 0x8f860014, 0x24020002, 0xaf400180, 0xa742018c, 0xa745018e, | ||
1597 | 0xa7470188, 0x30c28000, 0xa7430190, 0x1040000c, 0xaf4401a8, 0x93420116, | ||
1598 | 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, | ||
1599 | 0x3c02ffff, 0x34427fff, 0x00c21024, 0xaf820014, 0x97820016, 0x9743010c, | ||
1600 | 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, | ||
1601 | 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x0a000f19, 0x00001021, 0x30820001, | ||
1602 | 0x1040002e, 0x30eb0004, 0x9742010e, 0x30e9fffb, 0x3c038000, 0x24420004, | ||
1603 | 0x3045ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, | ||
1604 | 0x9783000a, 0x8f840004, 0x8f860014, 0x24020002, 0xaf400180, 0xa742018c, | ||
1605 | 0xa745018e, 0xa7470188, 0x30c28000, 0xa7430190, 0x1040000c, 0xaf4401a8, | ||
1606 | 0x93420116, 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, | ||
1607 | 0x14600004, 0x3c02ffff, 0x34427fff, 0x00c21024, 0xaf820014, 0x97820016, | ||
1608 | 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, | ||
1609 | 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x3127ffff, 0x8d420024, | ||
1610 | 0x30420004, 0x10400030, 0x8d420024, 0x9742010e, 0x30e9fffb, 0x3c038000, | ||
1611 | 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, | ||
1612 | 0xa342018b, 0x9784000a, 0x8f850004, 0x8f880014, 0x24020100, 0x24030002, | ||
1613 | 0xaf420180, 0xa743018c, 0xa746018e, 0xa7470188, 0x31028000, 0xa7440190, | ||
1614 | 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004, | ||
1615 | 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x01021024, | ||
1616 | 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, | ||
1617 | 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, | ||
1618 | 0x3127ffff, 0x8d420024, 0x30420008, 0x1040002d, 0x00000000, 0x9742010e, | ||
1619 | 0x3c038000, 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, | ||
1620 | 0x24020003, 0xa342018b, 0x9784000a, 0x8f850004, 0x8f880014, 0x24020180, | ||
1621 | 0x24030002, 0xaf420180, 0xa743018c, 0xa746018e, 0xa7470188, 0x31028000, | ||
1622 | 0xa7440190, 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, | ||
1623 | 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, | ||
1624 | 0x01021024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, | ||
1625 | 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, | ||
1626 | 0xaf4201b8, 0x15600041, 0x00001021, 0x27440180, 0x3c038000, 0x8f4201b8, | ||
1627 | 0x00431024, 0x1440fffd, 0x24022000, 0x24030002, 0xa4820008, 0xa083000b, | ||
1628 | 0xa4800010, 0x3c021000, 0xaf4201b8, 0x0a000f19, 0x00001021, 0x3c030800, | ||
1629 | 0x8c620024, 0x30420001, 0x1040002e, 0x00001021, 0x9742010e, 0x34e70002, | ||
1630 | 0x3c038000, 0x24420004, 0x3045ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, | ||
1631 | 0x24020003, 0xa342018b, 0x9783000a, 0x8f840004, 0x8f860014, 0x24020002, | ||
1632 | 0xaf400180, 0xa742018c, 0xa745018e, 0xa7470188, 0x30c28000, 0xa7430190, | ||
1633 | 0x1040000c, 0xaf4401a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004, | ||
1634 | 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00c21024, | ||
1635 | 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, | ||
1636 | 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, | ||
1637 | 0x00001021, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x8f4b0070, | ||
1638 | 0x93420112, 0x8f840008, 0x00022882, 0x30820100, 0x14400003, 0x24a30003, | ||
1639 | 0x03e00008, 0x00001021, 0x30824000, 0x10400010, 0x27424000, 0x00031880, | ||
1640 | 0x00431021, 0x8c470000, 0x24a30004, 0x00031880, 0x27424000, 0x00431021, | ||
1641 | 0x8c490000, 0x93430116, 0x27424000, 0x306300fc, 0x00431021, 0x8c4a0000, | ||
1642 | 0x0a000f45, 0x3c030800, 0x30822000, 0x1040ffea, 0x00031880, 0x27424000, | ||
1643 | 0x00431021, 0x8c470000, 0x24a30004, 0x00031880, 0x27424000, 0x00431021, | ||
1644 | 0x8c490000, 0x00005021, 0x3c030800, 0x24680100, 0x00071602, 0x00021080, | ||
1645 | 0x00481021, 0x8c460000, 0x00071b82, 0x306303fc, 0x01031821, 0x8c640400, | ||
1646 | 0x00071182, 0x304203fc, 0x01021021, 0x8c450800, 0x30e300ff, 0x00031880, | ||
1647 | 0x01031821, 0x00091602, 0x00021080, 0x01021021, 0x00c43026, 0x8c640c00, | ||
1648 | 0x8c431000, 0x00c53026, 0x00091382, 0x304203fc, 0x01021021, 0x8c451400, | ||
1649 | 0x312200ff, 0x00021080, 0x01021021, 0x00c43026, 0x00c33026, 0x00091982, | ||
1650 | 0x306303fc, 0x01031821, 0x8c641800, 0x8c431c00, 0x00c53026, 0x00c43026, | ||
1651 | 0x11400015, 0x00c33026, 0x000a1602, 0x00021080, 0x01021021, 0x8c432000, | ||
1652 | 0x000a1382, 0x304203fc, 0x01021021, 0x8c452400, 0x314200ff, 0x00021080, | ||
1653 | 0x01021021, 0x00c33026, 0x000a1982, 0x306303fc, 0x01031821, 0x8c642800, | ||
1654 | 0x8c432c00, 0x00c53026, 0x00c43026, 0x00c33026, 0x8f430070, 0x3c050800, | ||
1655 | 0x8ca43100, 0x2c820020, 0x10400008, 0x006b5823, 0x3c020800, 0x24423104, | ||
1656 | 0x00041880, 0x00621821, 0x24820001, 0xac6b0000, 0xaca23100, 0xaf860004, | ||
1657 | 0x03e00008, 0x24020001, 0x27bdffe8, 0xafbf0010, 0x8f460128, 0x8f840010, | ||
1658 | 0xaf460020, 0x8f450104, 0x8f420100, 0x24030800, 0xaf850008, 0xaf820014, | ||
1659 | 0xaf4301b8, 0x1080000a, 0x3c020800, 0x8c430034, 0x10600007, 0x30a22000, | ||
1660 | 0x10400005, 0x34a30100, 0x8f82000c, 0xaf830008, 0x24420001, 0xaf82000c, | ||
1661 | 0x3c020800, 0x8c4300c0, 0x10600006, 0x3c030800, 0x8c6200c4, 0x24040001, | ||
1662 | 0x24420001, 0x0a000fd5, 0xac6200c4, 0x8f820008, 0x3c030010, 0x00431024, | ||
1663 | 0x14400009, 0x3c02001f, 0x3c030800, 0x8c620020, 0x00002021, 0x24420001, | ||
1664 | 0x0e000c78, 0xac620020, 0x0a000fd5, 0x00402021, 0x3442ff00, 0x14c20009, | ||
1665 | 0x2403bfff, 0x3c030800, 0x8c620020, 0x24040001, 0x24420001, 0x0e000c78, | ||
1666 | 0xac620020, 0x0a000fd5, 0x00402021, 0x8f820014, 0x00431024, 0x14400006, | ||
1667 | 0x00000000, 0xaf400048, 0x0e0011a9, 0xaf400040, 0x0a000fd5, 0x00402021, | ||
1668 | 0x0e001563, 0x00000000, 0x00402021, 0x10800005, 0x3c024000, 0x8f430124, | ||
1669 | 0x3c026020, 0xac430014, 0x3c024000, 0xaf420138, 0x00000000, 0x8fbf0010, | ||
1670 | 0x03e00008, 0x27bd0018, 0x27bdffe0, 0xafbf0018, 0xafb10014, 0xafb00010, | ||
1671 | 0x8f420140, 0xaf420020, 0x8f430148, 0x3c027000, 0x00621824, 0x3c023000, | ||
1672 | 0x10620021, 0x0043102b, 0x14400006, 0x3c024000, 0x3c022000, 0x10620009, | ||
1673 | 0x3c024000, 0x0a001040, 0x00000000, 0x10620045, 0x3c025000, 0x10620047, | ||
1674 | 0x3c024000, 0x0a001040, 0x00000000, 0x27440180, 0x3c038000, 0x8f4201b8, | ||
1675 | 0x00431024, 0x1440fffd, 0x00000000, 0x8f420148, 0x24030002, 0xa083000b, | ||
1676 | 0x00021402, 0xa4820008, 0x8f430148, 0xa4830010, 0x8f420144, 0x3c031000, | ||
1677 | 0xac820024, 0xaf4301b8, 0x0a001040, 0x3c024000, 0x8f420148, 0x24030002, | ||
1678 | 0x3044ffff, 0x00021402, 0x305000ff, 0x1203000c, 0x27510180, 0x2a020003, | ||
1679 | 0x10400005, 0x24020003, 0x0600001d, 0x36053000, 0x0a001027, 0x3c038000, | ||
1680 | 0x12020007, 0x00000000, 0x0a001034, 0x00000000, 0x0e00112c, 0x00000000, | ||
1681 | 0x0a001025, 0x00402021, 0x0e00113e, 0x00000000, 0x00402021, 0x36053000, | ||
1682 | 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002, 0xa6250008, | ||
1683 | 0xa222000b, 0xa6240010, 0x8f420144, 0x3c031000, 0xae220024, 0xaf4301b8, | ||
1684 | 0x0a001040, 0x3c024000, 0x0000000d, 0x00000000, 0x240002bf, 0x0a001040, | ||
1685 | 0x3c024000, 0x0e001441, 0x00000000, 0x0a001040, 0x3c024000, 0x0e0015ea, | ||
1686 | 0x00000000, 0x3c024000, 0xaf420178, 0x00000000, 0x8fbf0018, 0x8fb10014, | ||
1687 | 0x8fb00010, 0x03e00008, 0x27bd0020, 0x24020800, 0x03e00008, 0xaf4201b8, | ||
1688 | 0x27bdffe8, 0x3c04600c, 0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000, | ||
1689 | 0x2403ff7f, 0x3c106000, 0x00431024, 0x3442380c, 0x24030003, 0xac825000, | ||
1690 | 0x3c020008, 0xaf430008, 0x8e040808, 0x0342d825, 0x8e020808, 0x3c030800, | ||
1691 | 0xac600020, 0x3084fff0, 0x2c840001, 0x3042fff0, 0x38420010, 0x2c420001, | ||
1692 | 0xaf840010, 0xaf820000, 0x0e00160c, 0x00000000, 0x0e001561, 0x00000000, | ||
1693 | 0x3c020400, 0x3442000c, 0x3c03ffff, 0x34630806, 0xae021948, 0xae03194c, | ||
1694 | 0x8e021980, 0x34420200, 0xae021980, 0x8f500000, 0x32020003, 0x1040fffd, | ||
1695 | 0x32020001, 0x10400004, 0x32020002, 0x0e000f92, 0x00000000, 0x32020002, | ||
1696 | 0x1040fff6, 0x00000000, 0x0e000fe0, 0x00000000, 0x0a001071, 0x00000000, | ||
1697 | 0x27bdffe8, 0x3c04600c, 0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000, | ||
1698 | 0x2403ff7f, 0x3c106000, 0x00431024, 0x3442380c, 0x24030003, 0xac825000, | ||
1699 | 0x3c020008, 0xaf430008, 0x8e040808, 0x0342d825, 0x8e020808, 0x3c030800, | ||
1700 | 0xac600020, 0x3084fff0, 0x2c840001, 0x3042fff0, 0x38420010, 0x2c420001, | ||
1701 | 0xaf840010, 0xaf820000, 0x0e00160c, 0x00000000, 0x0e001561, 0x00000000, | ||
1702 | 0x3c020400, 0x3442000c, 0x3c03ffff, 0x34630806, 0xae021948, 0xae03194c, | ||
1703 | 0x8e021980, 0x8fbf0014, 0x34420200, 0xae021980, 0x8fb00010, 0x03e00008, | ||
1704 | 0x27bd0018, 0x00804821, 0x30a5ffff, 0x30c6ffff, 0x30e7ffff, 0x3c038000, | ||
1705 | 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9783000a, | ||
1706 | 0x8f840004, 0x8f880014, 0xaf490180, 0xa745018c, 0xa746018e, 0xa7470188, | ||
1707 | 0x31028000, 0xa7430190, 0x1040000c, 0xaf4401a8, 0x93420116, 0x304200fc, | ||
1708 | 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, | ||
1709 | 0x34427fff, 0x01021024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, | ||
1710 | 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, | ||
1711 | 0x3c021000, 0xaf4201b8, 0x03e00008, 0x00000000, 0x27440180, 0x3c038000, | ||
1712 | 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24022000, 0x24030002, 0xa4820008, | ||
1713 | 0xa083000b, 0xa4800010, 0x3c021000, 0xaf4201b8, 0x03e00008, 0x00000000, | ||
1714 | 0x27440180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, | ||
1715 | 0x8f420148, 0x24030002, 0xa083000b, 0x00021402, 0xa4820008, 0x8f430148, | ||
1716 | 0xa4830010, 0x8f420144, 0x3c031000, 0xac820024, 0x03e00008, 0xaf4301b8, | ||
1717 | 0x27bdffe0, 0xafbf0018, 0xafb10014, 0xafb00010, 0x8f420148, 0x24030002, | ||
1718 | 0x3044ffff, 0x00021402, 0x305000ff, 0x1203000c, 0x27510180, 0x2a020003, | ||
1719 | 0x10400005, 0x24020003, 0x0600001d, 0x36053000, 0x0a001117, 0x3c038000, | ||
1720 | 0x12020007, 0x00000000, 0x0a001124, 0x00000000, 0x0e00112c, 0x00000000, | ||
1721 | 0x0a001115, 0x00402021, 0x0e00113e, 0x00000000, 0x00402021, 0x36053000, | ||
1722 | 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002, 0xa6250008, | ||
1723 | 0xa222000b, 0xa6240010, 0x8f420144, 0x3c031000, 0xae220024, 0xaf4301b8, | ||
1724 | 0x0a001128, 0x8fbf0018, 0x0000000d, 0x00000000, 0x240002bf, 0x8fbf0018, | ||
1725 | 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x3084ffff, 0x2c821389, | ||
1726 | 0x1040000d, 0x00001021, 0x3c030800, 0x24635900, 0x00042942, 0x00052880, | ||
1727 | 0x00a32821, 0x3086001f, 0x8ca40000, 0x24030001, 0x00c31804, 0x00832025, | ||
1728 | 0x03e00008, 0xaca40000, 0x03e00008, 0x24020091, 0x3084ffff, 0x2c821389, | ||
1729 | 0x1040000e, 0x00001021, 0x3c030800, 0x24635900, 0x00042942, 0x00052880, | ||
1730 | 0x00a32821, 0x3086001f, 0x24030001, 0x8ca40000, 0x00c31804, 0x00031827, | ||
1731 | 0x00832024, 0x03e00008, 0xaca40000, 0x03e00008, 0x24020091, 0x9482000c, | ||
1732 | 0x24870014, 0x00021302, 0x00021080, 0x00824021, 0x00e8182b, 0x1060004f, | ||
1733 | 0x00000000, 0x90e30000, 0x2c620009, 0x10400047, 0x3c020800, 0x24425890, | ||
1734 | 0x00031880, 0x00621821, 0x8c640000, 0x00800008, 0x00000000, 0x0a0011a4, | ||
1735 | 0x24e70001, 0x90e30001, 0x2402000a, 0x54620024, 0x01003821, 0x01071023, | ||
1736 | 0x2c42000a, 0x54400020, 0x01003821, 0x3c050800, 0x8ca26c98, 0x24e70002, | ||
1737 | 0x34420100, 0xaca26c98, 0x90e30000, 0x90e20001, 0x90e40002, 0x90e60003, | ||
1738 | 0x24e70004, 0x24a56c98, 0x00031e00, 0x00021400, 0x00621825, 0x00042200, | ||
1739 | 0x00641825, 0x00661825, 0xaca30004, 0x90e20000, 0x90e30001, 0x90e40002, | ||
1740 | 0x90e60003, 0x24e70004, 0x00021600, 0x00031c00, 0x00431025, 0x00042200, | ||
1741 | 0x00441025, 0x00461025, 0x0a0011a4, 0xaca20008, 0x90e30001, 0x24020004, | ||
1742 | 0x1062000e, 0x00601021, 0x0a00119e, 0x01001021, 0x90e30001, 0x24020003, | ||
1743 | 0x10620008, 0x00601021, 0x0a00119e, 0x01001021, 0x90e30001, 0x24020002, | ||
1744 | 0x14620003, 0x01001021, 0x00601021, 0x00e21021, 0x0a0011a4, 0x00403821, | ||
1745 | 0x90e20001, 0x0a0011a4, 0x00e23821, 0x01003821, 0x00e8102b, 0x5440ffb4, | ||
1746 | 0x90e30000, 0x03e00008, 0x24020001, 0x27bdff90, 0x3c030800, 0xafbf006c, | ||
1747 | 0xafbe0068, 0xafb70064, 0xafb60060, 0xafb5005c, 0xafb40058, 0xafb30054, | ||
1748 | 0xafb20050, 0xafb1004c, 0xafb00048, 0xac606c98, 0x93620023, 0x30420010, | ||
1749 | 0x1440027c, 0x24020001, 0x93420116, 0x93630005, 0x34424000, 0x30630001, | ||
1750 | 0x14600005, 0x0342b021, 0x0e0015e0, 0x00000000, 0x0a001436, 0x8fbf006c, | ||
1751 | 0x93420112, 0x8f430104, 0x3c040020, 0x34424000, 0x00641824, 0x10600012, | ||
1752 | 0x03422821, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, | ||
1753 | 0x00000000, 0x8f420128, 0xaca20000, 0x8f640040, 0x24030008, 0x240240c1, | ||
1754 | 0xa4a20008, 0x24020002, 0xa0a2000b, 0x3c021000, 0x0a0011f1, 0xa0a3000a, | ||
1755 | 0x8f420104, 0x3c030040, 0x00431024, 0x1040001d, 0x3c038000, 0x27450180, | ||
1756 | 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000, | ||
1757 | 0x8f640040, 0x24030010, 0x240240c1, 0xa4a20008, 0x24020002, 0xa0a3000a, | ||
1758 | 0x24030008, 0xa0a2000b, 0x3c021000, 0xa4a30010, 0xa0a00012, 0xa0a00013, | ||
1759 | 0xaca00014, 0xaca00024, 0xaca00028, 0xaca0002c, 0xaca40018, 0x0e0015e0, | ||
1760 | 0xaf4201b8, 0x0a001436, 0x8fbf006c, 0x8f820000, 0x10400016, 0x00000000, | ||
1761 | 0x8f420104, 0x3c030001, 0x00431024, 0x10400011, 0x00000000, 0x8ca3000c, | ||
1762 | 0x8f620030, 0x1462022d, 0x24020001, 0x8ca30010, 0x8f62002c, 0x14620229, | ||
1763 | 0x24020001, 0x9763003a, 0x96c20000, 0x14430225, 0x24020001, 0x97630038, | ||
1764 | 0x96c20002, 0x14430221, 0x24020001, 0xaf400048, 0xaf400054, 0xaf400040, | ||
1765 | 0x8f740040, 0x8f650048, 0x00b43023, 0x04c10004, 0x00000000, 0x0000000d, | ||
1766 | 0x00000000, 0x240001af, 0x9742011a, 0x3052ffff, 0x12400004, 0x8ed30004, | ||
1767 | 0x02721021, 0x0a001228, 0x2451ffff, 0x02608821, 0x92d7000d, 0xa7a00020, | ||
1768 | 0xa3a0001a, 0xafa00028, 0x9362003f, 0x32e30004, 0x1060003a, 0x305000ff, | ||
1769 | 0x24040012, 0x16040006, 0x24020001, 0x3c040800, 0x8c830028, 0x24630001, | ||
1770 | 0x0a001328, 0xac830028, 0x8f620044, 0x16620010, 0x27a60010, 0x27450180, | ||
1771 | 0x3c038000, 0x2402001a, 0xa7a20020, 0x24020020, 0xafb40028, 0xa3b00022, | ||
1772 | 0xa3a40023, 0xa3a2001a, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, | ||
1773 | 0x0a00130d, 0x00000000, 0x8f620044, 0x02621023, 0x0440001a, 0x02651023, | ||
1774 | 0x044100d9, 0x24020001, 0x3c020800, 0x8c4300d8, 0x10600004, 0x24020001, | ||
1775 | 0xa7a20020, 0x0a00125e, 0xafb40028, 0x2402001a, 0xa7a20020, 0x24020020, | ||
1776 | 0xafb40028, 0xa3b00022, 0xa3a40023, 0xa3a2001a, 0x27a60010, 0x27450180, | ||
1777 | 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x0a00130d, | ||
1778 | 0x00000000, 0x0a001328, 0x24020001, 0x0293f023, 0x1bc00016, 0x025e102a, | ||
1779 | 0x54400007, 0x32f700fe, 0x57d2000f, 0x027e9821, 0x32e20001, 0x5440000c, | ||
1780 | 0x027e9821, 0x32f700fe, 0x0240f021, 0x3c040800, 0x8c8300c8, 0x00009021, | ||
1781 | 0x24020001, 0xa7a20020, 0xafb40028, 0x24630001, 0x0a001282, 0xac8300c8, | ||
1782 | 0x025e1023, 0x0a001282, 0x3052ffff, 0x0000f021, 0x24a2ffff, 0x02221823, | ||
1783 | 0x1860001f, 0x0072102a, 0x54400019, 0x00a08821, 0x97a20020, 0x3c040800, | ||
1784 | 0x8c8300cc, 0xafb40028, 0x34420001, 0x24630001, 0xa7a20020, 0x02741026, | ||
1785 | 0x2c420001, 0xac8300cc, 0x2cc30001, 0x00431024, 0x1440000a, 0x02401821, | ||
1786 | 0x27a60010, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, | ||
1787 | 0x00000000, 0x0a00130d, 0x00000000, 0x00a08821, 0x02431023, 0x3052ffff, | ||
1788 | 0x0a0012ae, 0x32f700f6, 0x02741023, 0x18400008, 0x97a20020, 0x3c040800, | ||
1789 | 0x8c8300d4, 0xafb30028, 0x34420400, 0x24630001, 0xa7a20020, 0xac8300d4, | ||
1790 | 0x32e20002, 0x1040001c, 0x32e20010, 0x8f620044, 0x1662000d, 0x27a60010, | ||
1791 | 0x97a20020, 0x27450180, 0x3c038000, 0xafb40028, 0x34420001, 0xa7a20020, | ||
1792 | 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x0a00130d, 0x00000000, | ||
1793 | 0x97a20020, 0x27450180, 0x3c038000, 0xafb40028, 0x34420001, 0xa7a20020, | ||
1794 | 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x0a00130d, 0x00000000, | ||
1795 | 0x54400003, 0x8ed50008, 0x0a001328, 0x24020001, 0x8f630054, 0x26a2ffff, | ||
1796 | 0x00431023, 0x18400011, 0x27a60010, 0x97a20020, 0x3c040800, 0x8c8300d0, | ||
1797 | 0x27450180, 0x3c078000, 0xafb40028, 0x34420001, 0x24630001, 0xa7a20020, | ||
1798 | 0xac8300d0, 0x8f4201b8, 0x00471024, 0x1440fffd, 0x00000000, 0x0a00130d, | ||
1799 | 0x00000000, 0x32e20020, 0x10400011, 0x00000000, 0x96c20012, 0x0052102b, | ||
1800 | 0x10400008, 0x97a20020, 0x96d20012, 0x12400003, 0x02721021, 0x0a0012f2, | ||
1801 | 0x2451ffff, 0x02608821, 0x97a20020, 0x93a3001a, 0x34420008, 0x34630004, | ||
1802 | 0xa7a20020, 0xa3a3001a, 0x8f420104, 0x3c030080, 0x00431024, 0x10400037, | ||
1803 | 0x3a03000a, 0x0e001151, 0x02c02021, 0x24030002, 0x1443002b, 0x3c030800, | ||
1804 | 0x27a60010, 0x97a20020, 0x27450180, 0x3c038000, 0xafb40028, 0x34420001, | ||
1805 | 0xa7a20020, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128, | ||
1806 | 0xaca20000, 0x8cc30018, 0x240240c1, 0xa4a20008, 0xaca30018, 0x90c4000a, | ||
1807 | 0x24020002, 0xa0a2000b, 0xa0a4000a, 0x94c20010, 0xa4a20010, 0x90c30012, | ||
1808 | 0xa0a30012, 0x90c20013, 0xa0a20013, 0x8cc30014, 0xaca30014, 0x8cc20024, | ||
1809 | 0xaca20024, 0x8cc30028, 0xaca30028, 0x8cc4002c, 0x24020001, 0x3c031000, | ||
1810 | 0xaca4002c, 0xaf4301b8, 0xaf400044, 0xaf400050, 0x0a001436, 0x8fbf006c, | ||
1811 | 0x8c626c98, 0x30420100, 0x10400003, 0x24636c98, 0x8c620004, 0xaf62017c, | ||
1812 | 0x3a03000a, 0x2c630001, 0x3a02000c, 0x2c420001, 0x00621825, 0x14600003, | ||
1813 | 0x2402000e, 0x56020030, 0x00009021, 0x52400008, 0x96c4000e, 0x12400004, | ||
1814 | 0xa7b20040, 0x02721021, 0x0a001343, 0x2451ffff, 0x02608821, 0x96c4000e, | ||
1815 | 0x93630035, 0x8f62004c, 0x00642004, 0x00952021, 0x00821023, 0x18400015, | ||
1816 | 0x00000000, 0x8f620018, 0x02621023, 0x1c400015, 0x97a20020, 0x8f620018, | ||
1817 | 0x1662001c, 0x00000000, 0x8f62001c, 0x02a21023, 0x1c40000e, 0x97a20020, | ||
1818 | 0x8f62001c, 0x16a20015, 0x00000000, 0x8f620058, 0x00821023, 0x18400011, | ||
1819 | 0x97a20020, 0x0a001364, 0xafb10028, 0x8f620058, 0x00821023, 0x0441000b, | ||
1820 | 0x97a20020, 0xafb10028, 0xafb30034, 0xafb50038, 0xafa4003c, 0x34420020, | ||
1821 | 0x0a00136d, 0xa7a20020, 0x02809821, 0x02608821, 0x8f640058, 0x8f62004c, | ||
1822 | 0x02a21023, 0x18400009, 0x00000000, 0x8f620054, 0x02a21023, 0x1c400005, | ||
1823 | 0x97a20020, 0xafb10028, 0xafb50024, 0x0a001385, 0x34420040, 0x9742011a, | ||
1824 | 0x1440000c, 0x24020014, 0x8f620058, 0x14820009, 0x24020014, 0x8f63004c, | ||
1825 | 0x8f620054, 0x10620004, 0x97a20020, 0xafb10028, 0x34420080, 0xa7a20020, | ||
1826 | 0x24020014, 0x1202000a, 0x2a020015, 0x10400005, 0x2402000c, 0x12020006, | ||
1827 | 0x32e20001, 0x0a0013c6, 0x00000000, 0x24020016, 0x16020035, 0x32e20001, | ||
1828 | 0x8f620084, 0x24420001, 0x16a20031, 0x32e20001, 0x24020014, 0x12020021, | ||
1829 | 0x2a020015, 0x10400005, 0x2402000c, 0x12020008, 0x32e20001, 0x0a0013c6, | ||
1830 | 0x00000000, 0x24020016, 0x1202000c, 0x32e20001, 0x0a0013c6, 0x00000000, | ||
1831 | 0x97a30020, 0x2402000e, 0xafb10028, 0xa3b00022, 0xa3a20023, 0xafb50024, | ||
1832 | 0x34630054, 0x0a0013c5, 0xa7a30020, 0x97a20020, 0x93a4001a, 0x24030010, | ||
1833 | 0xafb10028, 0xa3b00022, 0xa3a30023, 0xafb50024, 0x3442005d, 0x34840002, | ||
1834 | 0xa7a20020, 0x0a0013c5, 0xa3a4001a, 0x97a20020, 0x24030012, 0xa3a30023, | ||
1835 | 0x93a3001a, 0xafb10028, 0xa3b00022, 0xafb50024, 0x3042fffe, 0x3442005c, | ||
1836 | 0x34630002, 0xa7a20020, 0xa3a3001a, 0x32e20001, 0x10400030, 0x2402000c, | ||
1837 | 0x12020013, 0x2a02000d, 0x10400005, 0x2402000a, 0x12020008, 0x97a20020, | ||
1838 | 0x0a0013f8, 0x32e20009, 0x2402000e, 0x1202001b, 0x32e20009, 0x0a0013f9, | ||
1839 | 0x0002102b, 0x93a4001a, 0x24030008, 0xafb10028, 0xa3b00022, 0xa3a30023, | ||
1840 | 0x0a0013f4, 0x34420013, 0x97a30020, 0x30620004, 0x14400005, 0x93a2001a, | ||
1841 | 0x3463001b, 0xa7a30020, 0x0a0013e7, 0x24030016, 0x3463001b, 0xa7a30020, | ||
1842 | 0x24030010, 0xafb10028, 0xa3b00022, 0xa3a30023, 0x34420002, 0x0a0013f7, | ||
1843 | 0xa3a2001a, 0x97a20020, 0x93a4001a, 0x24030010, 0xafb10028, 0xa3b00022, | ||
1844 | 0xa3a30023, 0x3442001b, 0x34840002, 0xa7a20020, 0xa3a4001a, 0x32e20009, | ||
1845 | 0x0002102b, 0x00021023, 0x30420007, 0x12400015, 0x34450003, 0x8f820018, | ||
1846 | 0x24030800, 0x27440180, 0x24420001, 0xaf820018, 0x24020004, 0xaf4301b8, | ||
1847 | 0xa4850008, 0xa082000b, 0x93430120, 0x00003021, 0x3c021000, 0xa492000e, | ||
1848 | 0xac950024, 0xac930028, 0x007e1821, 0xa483000c, 0xaf4201b8, 0x0a001413, | ||
1849 | 0x97a20020, 0x24060001, 0x97a20020, 0x10400020, 0x27450180, 0x3c038000, | ||
1850 | 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000, | ||
1851 | 0x8fa30028, 0x240240c1, 0xa4a20008, 0xaca30018, 0x93a4001a, 0x24020002, | ||
1852 | 0xa0a2000b, 0xa0a4000a, 0x97a20020, 0xa4a20010, 0x93a30022, 0xa0a30012, | ||
1853 | 0x93a20023, 0xa0a20013, 0x8fa30024, 0xaca30014, 0x8fa20034, 0xaca20024, | ||
1854 | 0x8fa30038, 0xaca30028, 0x8fa2003c, 0x3c031000, 0xaca2002c, 0xaf4301b8, | ||
1855 | 0x00c01021, 0x8fbf006c, 0x8fbe0068, 0x8fb70064, 0x8fb60060, 0x8fb5005c, | ||
1856 | 0x8fb40058, 0x8fb30054, 0x8fb20050, 0x8fb1004c, 0x8fb00048, 0x03e00008, | ||
1857 | 0x27bd0070, 0x8f470140, 0x8f460148, 0x3c028000, 0x00c24024, 0x00062c02, | ||
1858 | 0x30a300ff, 0x24020019, 0x106200e7, 0x27440180, 0x2862001a, 0x1040001f, | ||
1859 | 0x24020008, 0x106200be, 0x28620009, 0x1040000d, 0x24020001, 0x10620046, | ||
1860 | 0x28620002, 0x50400005, 0x24020006, 0x1060002e, 0x00a01821, 0x0a00155e, | ||
1861 | 0x00000000, 0x1062005b, 0x00a01821, 0x0a00155e, 0x00000000, 0x2402000b, | ||
1862 | 0x10620084, 0x2862000c, 0x10400005, 0x24020009, 0x106200bc, 0x00061c02, | ||
1863 | 0x0a00155e, 0x00000000, 0x2402000e, 0x106200b7, 0x00061c02, 0x0a00155e, | ||
1864 | 0x00000000, 0x28620021, 0x10400009, 0x2862001f, 0x104000c1, 0x2402001b, | ||
1865 | 0x106200bf, 0x2402001c, 0x1062009a, 0x00061c02, 0x0a00155e, 0x00000000, | ||
1866 | 0x240200c2, 0x106200ca, 0x286200c3, 0x10400005, 0x24020080, 0x1062005a, | ||
1867 | 0x00a01821, 0x0a00155e, 0x00000000, 0x240200c9, 0x106200cd, 0x30c5ffff, | ||
1868 | 0x0a00155e, 0x00000000, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, | ||
1869 | 0x24020001, 0xa4830008, 0x24030002, 0xac870000, 0xac800004, 0xa082000a, | ||
1870 | 0xa083000b, 0xa4860010, 0x8f430144, 0x3c021000, 0xac800028, 0xac830024, | ||
1871 | 0x3c036000, 0xaf4201b8, 0x03e00008, 0xac600808, 0x11000009, 0x00a01821, | ||
1872 | 0x3c020800, 0x24030002, 0xa0436c88, 0x24426c88, 0xac470008, 0x8f430144, | ||
1873 | 0x03e00008, 0xac430004, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, | ||
1874 | 0x24020002, 0xac800000, 0xac870004, 0xa4830008, 0xa082000a, 0xa082000b, | ||
1875 | 0xa4860010, 0xac800024, 0x8f420144, 0x3c031000, 0xac820028, 0x3c026000, | ||
1876 | 0xaf4301b8, 0x03e00008, 0xac400808, 0x3c080800, 0x3c058000, 0x8f4201b8, | ||
1877 | 0x00451024, 0x1440fffd, 0x00000000, 0xac870000, 0x91026c88, 0x00002821, | ||
1878 | 0x10400002, 0x25076c88, 0x8ce50008, 0xac850004, 0xa4830008, 0x91036c88, | ||
1879 | 0x24020002, 0xa082000b, 0xa4860010, 0x34630001, 0xa083000a, 0x8f420144, | ||
1880 | 0xac820024, 0x91036c88, 0x10600002, 0x00001021, 0x8ce20004, 0xac820028, | ||
1881 | 0x3c021000, 0xaf4201b8, 0x3c026000, 0xa1006c88, 0x03e00008, 0xac400808, | ||
1882 | 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002, 0xa082000b, | ||
1883 | 0xa4830008, 0xa4860010, 0x8f420144, 0x3c031000, 0xa4820012, 0x03e00008, | ||
1884 | 0xaf4301b8, 0x30c2ffff, 0x14400028, 0x00061c02, 0x93620005, 0x30420004, | ||
1885 | 0x14400020, 0x3c029000, 0x34420001, 0x00e21025, 0xaf420020, 0x3c038000, | ||
1886 | 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620005, 0x3c038000, | ||
1887 | 0x34630001, 0x00e31825, 0x34420004, 0xa3620005, 0xaf430020, 0x93620005, | ||
1888 | 0x30420004, 0x14400003, 0x3c038000, 0x0000000d, 0x3c038000, 0x8f4201b8, | ||
1889 | 0x00431024, 0x1440fffd, 0x24020005, 0x3c031000, 0xac870000, 0xa082000b, | ||
1890 | 0xaf4301b8, 0x0a00150d, 0x00061c02, 0x0000000d, 0x03e00008, 0x00000000, | ||
1891 | 0x00061c02, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020001, | ||
1892 | 0xa4830008, 0x24030002, 0xac870000, 0xac800004, 0xa082000a, 0xa083000b, | ||
1893 | 0xa4860010, 0x8f430144, 0x3c021000, 0xac800028, 0xac830024, 0x03e00008, | ||
1894 | 0xaf4201b8, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002, | ||
1895 | 0xac800000, 0xac870004, 0xa4830008, 0xa082000a, 0xa082000b, 0xa4860010, | ||
1896 | 0xac800024, 0x8f420144, 0x3c031000, 0xac820028, 0x03e00008, 0xaf4301b8, | ||
1897 | 0x00061c02, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020001, | ||
1898 | 0xa4830008, 0x24030002, 0xa082000a, 0x3c021000, 0xac870000, 0xac800004, | ||
1899 | 0xa083000b, 0xa4860010, 0xac800024, 0xac800028, 0x03e00008, 0xaf4201b8, | ||
1900 | 0x00a01821, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002, | ||
1901 | 0xac870000, 0xac800004, 0xa4830008, 0xa080000a, 0x0a001518, 0xa082000b, | ||
1902 | 0x8f440144, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002, | ||
1903 | 0x240340c9, 0xaf470180, 0xa342018b, 0x3c021000, 0xa7430188, 0xaf4401a4, | ||
1904 | 0xaf4501a8, 0xaf4001ac, 0x03e00008, 0xaf4201b8, 0x0000000d, 0x03e00008, | ||
1905 | 0x00000000, 0x03e00008, 0x00000000, 0x8f420100, 0x3042003e, 0x14400011, | ||
1906 | 0x24020001, 0xaf400048, 0x8f420100, 0x304207c0, 0x10400005, 0x00000000, | ||
1907 | 0xaf40004c, 0xaf400050, 0x03e00008, 0x24020001, 0xaf400054, 0xaf400040, | ||
1908 | 0x8f420100, 0x30423800, 0x54400001, 0xaf400044, 0x24020001, 0x03e00008, | ||
1909 | 0x00000000, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002, | ||
1910 | 0x240340c9, 0xaf440180, 0xa342018b, 0x3c021000, 0xa7430188, 0xaf4501a4, | ||
1911 | 0xaf4601a8, 0xaf4701ac, 0x03e00008, 0xaf4201b8, 0x3c029000, 0x34420001, | ||
1912 | 0x00822025, 0xaf440020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, | ||
1913 | 0x00000000, 0x03e00008, 0x00000000, 0x3c028000, 0x34420001, 0x00822025, | ||
1914 | 0x03e00008, 0xaf440020, 0x308600ff, 0x27450180, 0x3c038000, 0x8f4201b8, | ||
1915 | 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000, 0x8f640040, | ||
1916 | 0x24030008, 0x240240c1, 0xa4a20008, 0x24020002, 0xa0a2000b, 0x3c021000, | ||
1917 | 0xa0a6000a, 0xa4a30010, 0xa0a00012, 0xa0a00013, 0xaca00014, 0xaca00024, | ||
1918 | 0xaca00028, 0xaca0002c, 0xaca40018, 0x03e00008, 0xaf4201b8, 0x24020001, | ||
1919 | 0xacc40000, 0x03e00008, 0xa4e50000, 0x24020001, 0xaf400044, 0x03e00008, | ||
1920 | 0xaf400050, 0x00803021, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024, | ||
1921 | 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000, 0x8cc30018, 0x240240c1, | ||
1922 | 0xa4a20008, 0xaca30018, 0x90c4000a, 0x24020002, 0xa0a2000b, 0xa0a4000a, | ||
1923 | 0x94c20010, 0xa4a20010, 0x90c30012, 0xa0a30012, 0x90c20013, 0xa0a20013, | ||
1924 | 0x8cc30014, 0xaca30014, 0x8cc20024, 0xaca20024, 0x8cc30028, 0xaca30028, | ||
1925 | 0x8cc2002c, 0x3c031000, 0xaca2002c, 0x24020001, 0xaf4301b8, 0xaf400044, | ||
1926 | 0x03e00008, 0xaf400050, 0x27bdffe8, 0xafbf0010, 0x0e001047, 0x00000000, | ||
1927 | 0x00002021, 0x0e000c78, 0xaf400180, 0x8fbf0010, 0x03e00008, 0x27bd0018, | ||
1928 | 0x8f460148, 0x27450180, 0x3c038000, 0x00061402, 0x304700ff, 0x8f4201b8, | ||
1929 | 0x00431024, 0x1440fffd, 0x00000000, 0x8f440140, 0x00061202, 0x304200ff, | ||
1930 | 0x00061c02, 0xaca20004, 0x24020002, 0xa4a30008, 0x30c300ff, 0xa0a2000b, | ||
1931 | 0xaca30024, 0x10e0000a, 0xaca40000, 0x28e20004, 0x14400005, 0x24020001, | ||
1932 | 0x24020005, 0x54e20005, 0xa0a0000a, 0x24020001, 0x0a001609, 0xa0a2000a, | ||
1933 | 0xa0a0000a, 0x3c021000, 0x03e00008, 0xaf4201b8, 0x03e00008, 0x00001021, | ||
1934 | 0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004, 0xac820000, | ||
1935 | 0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000, 0x0a00161f, 0x00a01021, | ||
1936 | 0xac860000, 0x00000000, 0x00000000, 0x24840004, 0x00a01021, 0x1440fffa, | ||
1937 | 0x24a5ffff, 0x03e00008, 0x00000000, 0x00000000 }; | ||
1938 | 1052 | ||
1939 | static u32 bnx2_RXP_b06FwData[(0x0/4) + 1] = { 0x0 }; | 1053 | static u32 bnx2_RXP_b06FwData[(0x0/4) + 1] = { 0x0 }; |
1940 | static u32 bnx2_RXP_b06FwRodata[(0x28/4) + 1] = { | 1054 | static u32 bnx2_RXP_b06FwRodata[(0x28/4) + 1] = { |
@@ -1943,387 +1057,264 @@ static u32 bnx2_RXP_b06FwRodata[(0x28/4) + 1] = { | |||
1943 | static u32 bnx2_RXP_b06FwBss[(0x13a4/4) + 1] = { 0x0 }; | 1057 | static u32 bnx2_RXP_b06FwBss[(0x13a4/4) + 1] = { 0x0 }; |
1944 | static u32 bnx2_RXP_b06FwSbss[(0x1c/4) + 1] = { 0x0 }; | 1058 | static u32 bnx2_RXP_b06FwSbss[(0x1c/4) + 1] = { 0x0 }; |
1945 | 1059 | ||
1946 | static u32 bnx2_rv2p_proc1[] = { | 1060 | static u8 bnx2_rv2p_proc1[] = { |
1947 | 0x00000008, 0xac000001, 0x0000000c, 0x2f800001, 0x00000010, 0x213f0004, | 1061 | 0x1f, 0x8b, 0x08, 0x08, 0x5e, 0xd0, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65, |
1948 | 0x00000010, 0x20bf002c, 0x00000010, 0x203f0143, 0x00000018, 0x8000fffd, | 1062 | 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xc5, 0x56, 0xcf, 0x6b, |
1949 | 0x00000010, 0xb1b8b017, 0x0000000b, 0x2fdf0002, 0x00000000, 0x03d80000, | 1063 | 0x13, 0x51, 0x10, 0x9e, 0xec, 0x6e, 0xb2, 0xdb, 0x74, 0xbb, 0x1b, 0x2b, |
1950 | 0x00000000, 0x2c380000, 0x00000008, 0x2c800000, 0x00000008, 0x2d000000, | 1064 | 0xda, 0xa0, 0xb1, 0x8d, 0x51, 0x6a, 0x7f, 0xa4, 0xb4, 0x11, 0x0f, 0x82, |
1951 | 0x00000010, 0x91d40000, 0x00000008, 0x2d800108, 0x00000008, 0x02000002, | 1065 | 0x42, 0x25, 0x3d, 0x04, 0x54, 0x44, 0x7a, 0x28, 0x22, 0x82, 0x36, 0x8a, |
1952 | 0x00000010, 0x91de0000, 0x0000000f, 0x42e0001c, 0x00000010, 0x91840a08, | 1066 | 0xfe, 0x1b, 0xa1, 0x3f, 0xd2, 0x4b, 0x10, 0x7a, 0xb0, 0x58, 0xf1, 0x50, |
1953 | 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, 0x00000008, 0x2d800150, | 1067 | 0x10, 0x2a, 0x68, 0x0f, 0xc9, 0xa1, 0x20, 0x52, 0x11, 0xda, 0x8b, 0x07, |
1954 | 0x00000000, 0x00000000, 0x00000010, 0x91de0000, 0x00000010, 0x2c620002, | 1068 | 0x2f, 0x42, 0x0f, 0x7a, 0x69, 0xbd, 0xa8, 0xff, 0x82, 0x08, 0x4d, 0x7c, |
1955 | 0x00000018, 0x80000012, 0x0000000b, 0x2fdf0002, 0x0000000c, 0x1f800002, | 1069 | 0x6f, 0x66, 0x9e, 0xee, 0x6e, 0xb2, 0x4d, 0x15, 0xc1, 0x85, 0xf6, 0xe3, |
1956 | 0x00000000, 0x2c070000, 0x00000018, 0x8000ffe6, 0x00000008, 0x02000002, | 1070 | 0xbd, 0x9d, 0x79, 0x33, 0xf3, 0xcd, 0x37, 0xfb, 0x62, 0x01, 0x40, 0x04, |
1957 | 0x0000000f, 0x42e0001c, 0x00000010, 0x91840a08, 0x00000008, 0x2c8000b0, | 1071 | 0x60, 0xcd, 0x46, 0x2c, 0x8d, 0x26, 0x04, 0x1a, 0x30, 0x7e, 0x52, 0x62, |
1958 | 0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800108, | 1072 | 0x16, 0xde, 0xa6, 0x25, 0x4e, 0x44, 0xc6, 0xd3, 0x49, 0x81, 0x7b, 0x0d, |
1959 | 0x00000000, 0x00000000, 0x00000010, 0x91de0000, 0x00000018, 0x80000004, | 1073 | 0x28, 0xc9, 0x75, 0x4f, 0xf5, 0x55, 0xad, 0x53, 0xa0, 0x06, 0xbb, 0xa3, |
1960 | 0x0000000c, 0x1f800002, 0x00000000, 0x00000000, 0x00000018, 0x8000ffd9, | 1074 | 0x80, 0xcf, 0x47, 0x9d, 0xf0, 0x7c, 0xd6, 0x42, 0x2c, 0x31, 0xc2, 0x48, |
1961 | 0x0000000c, 0x29800002, 0x0000000c, 0x1f800002, 0x00000000, 0x2adf0000, | 1075 | 0x02, 0x61, 0x7b, 0x51, 0xae, 0xad, 0x48, 0x69, 0xc4, 0x42, 0x3f, 0xd0, |
1962 | 0x00000008, 0x2a000005, 0x00000018, 0x8000ffd4, 0x00000008, 0x02240030, | 1076 | 0x68, 0x7f, 0x67, 0xd1, 0x15, 0xff, 0x53, 0xf0, 0x39, 0x2f, 0xd7, 0x56, |
1963 | 0x00000018, 0x00040000, 0x00000018, 0x80000015, 0x00000018, 0x80000017, | 1077 | 0x7c, 0x0e, 0xed, 0xaa, 0xec, 0x2f, 0xfe, 0xd0, 0xfe, 0xba, 0xf0, 0x03, |
1964 | 0x00000018, 0x8000001b, 0x00000018, 0x8000004c, 0x00000018, 0x8000008c, | 1078 | 0x7e, 0x94, 0x5f, 0x02, 0xcf, 0x29, 0x66, 0x65, 0x5e, 0xdd, 0x22, 0xa0, |
1965 | 0x00000018, 0x8000000f, 0x00000018, 0x8000000e, 0x00000018, 0x8000000d, | 1079 | 0xca, 0xc7, 0x46, 0x2c, 0xf5, 0x91, 0xb5, 0x89, 0xef, 0xbf, 0x8a, 0xbc, |
1966 | 0x00000018, 0x8000000c, 0x00000018, 0x800000c2, 0x00000018, 0x8000000a, | 1080 | 0x55, 0xdc, 0x76, 0xf1, 0x82, 0xf9, 0x06, 0xe3, 0x26, 0x91, 0x1f, 0x28, |
1967 | 0x00000018, 0x80000009, 0x00000018, 0x80000008, 0x00000018, 0x800000fd, | 1081 | 0xf9, 0xe3, 0x00, 0xc8, 0xfd, 0x4f, 0x8d, 0x5f, 0xfb, 0x83, 0xfe, 0xf7, |
1968 | 0x00000018, 0x80000006, 0x00000018, 0x80000005, 0x00000018, 0x800000ff, | 1082 | 0xbb, 0x43, 0xf2, 0xbc, 0x28, 0xc0, 0x90, 0xb4, 0xdb, 0xe6, 0x7c, 0xc6, |
1969 | 0x00000018, 0x80000104, 0x00000018, 0x80000002, 0x00000018, 0x80000098, | 1083 | 0xe0, 0xb4, 0x96, 0xc4, 0xf7, 0x06, 0xfa, 0x1f, 0x11, 0xe7, 0x4a, 0xec, |
1970 | 0x00000018, 0x80000000, 0x0000000c, 0x1f800001, 0x00000000, 0x00000000, | 1084 | 0x61, 0x3c, 0xce, 0x78, 0x95, 0xb1, 0xc2, 0xe8, 0x32, 0x3a, 0x8c, 0x5d, |
1971 | 0x00000018, 0x8000ffba, 0x00000010, 0x91d40000, 0x0000000c, 0x29800001, | 1085 | 0x8c, 0x36, 0xe3, 0x26, 0x63, 0x9c, 0xb1, 0x83, 0xd1, 0x62, 0xdc, 0x63, |
1972 | 0x0000000c, 0x1f800001, 0x00000008, 0x2a000002, 0x00000018, 0x8000ffb5, | 1086 | 0x8c, 0x31, 0x46, 0x19, 0x1b, 0x8c, 0x46, 0x84, 0x50, 0xe3, 0xf5, 0x63, |
1973 | 0x00000010, 0xb1a0b012, 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c200000, | 1087 | 0x46, 0xe0, 0xba, 0x23, 0x81, 0xba, 0x5f, 0xb3, 0x2e, 0x24, 0x6f, 0xfc, |
1974 | 0x00000008, 0x2c800000, 0x00000008, 0x2d000000, 0x00000010, 0x91d40000, | 1088 | 0x7e, 0x50, 0xd9, 0x31, 0xef, 0x58, 0xf7, 0x3a, 0xdb, 0x75, 0x57, 0x57, |
1975 | 0x00000008, 0x2d80011c, 0x00000000, 0x00000000, 0x00000010, 0x91de0000, | 1089 | 0x02, 0xfa, 0x49, 0xef, 0xab, 0x9b, 0x54, 0x8b, 0x3e, 0xb8, 0x58, 0xcf, |
1976 | 0x0000000f, 0x47600008, 0x0000000f, 0x060e0001, 0x00000010, 0x001f0000, | 1090 | 0x9d, 0x82, 0x8b, 0x71, 0x9c, 0x18, 0xed, 0xab, 0xb4, 0x6e, 0xb8, 0x84, |
1977 | 0x00000000, 0x0f580000, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000, | 1091 | 0xf7, 0xe2, 0x84, 0x5f, 0x18, 0xef, 0x77, 0x12, 0x4e, 0x77, 0xc9, 0x7c, |
1978 | 0x00000000, 0x0b660000, 0x00000000, 0x0d610000, 0x00000018, 0x80000013, | 1092 | 0x0e, 0x8b, 0x80, 0xea, 0x1c, 0x95, 0x4f, 0xbb, 0x3c, 0xc2, 0xe2, 0xa9, |
1979 | 0x0000000f, 0x47600008, 0x0000000b, 0x2fdf0002, 0x00000008, 0x2c800000, | 1093 | 0xbc, 0xda, 0xc5, 0x25, 0x2c, 0x6a, 0xfe, 0xfa, 0x9f, 0x8c, 0x11, 0x1a, |
1980 | 0x00000008, 0x2d000000, 0x00000010, 0x91d40000, 0x00000008, 0x2d80011c, | 1094 | 0x39, 0x22, 0x75, 0xc9, 0x16, 0x3d, 0x83, 0x46, 0x63, 0xd9, 0x36, 0xe4, |
1981 | 0x0000000f, 0x060e0001, 0x00000010, 0x001f0000, 0x00000000, 0x0f580000, | 1095 | 0xfa, 0xdc, 0xf2, 0x7b, 0xd4, 0xfb, 0xd9, 0xa5, 0x1a, 0xe7, 0xe7, 0x2a, |
1982 | 0x00000010, 0x91de0000, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000, | 1096 | 0x9e, 0x69, 0x0e, 0x32, 0x40, 0xeb, 0x49, 0xe4, 0x1d, 0x04, 0x5a, 0xb8, |
1983 | 0x00000000, 0x0b660000, 0x00000000, 0x0d610000, 0x00000000, 0x02620000, | 1097 | 0x86, 0x8c, 0xbf, 0x5f, 0xa4, 0x43, 0x9d, 0xfb, 0x31, 0xcb, 0xfd, 0x38, |
1984 | 0x0000000b, 0x2fdf0002, 0x00000000, 0x309a0000, 0x00000000, 0x31040000, | 1098 | 0x11, 0xd2, 0x8f, 0xb0, 0xb9, 0x68, 0x9e, 0xc7, 0xdb, 0xe9, 0x20, 0x6f, |
1985 | 0x00000000, 0x0c961800, 0x00000009, 0x0c99ffff, 0x00000004, 0xcc993400, | 1099 | 0x61, 0xf3, 0xa3, 0xf8, 0xa6, 0xdd, 0x3f, 0xe5, 0xf1, 0x01, 0xf3, 0x58, |
1986 | 0x00000010, 0xb1963202, 0x00000008, 0x0f800000, 0x0000000c, 0x29800001, | 1100 | 0x24, 0x1e, 0x93, 0xdf, 0x5a, 0xf2, 0x94, 0xf6, 0xf0, 0x24, 0xeb, 0xec, |
1987 | 0x00000010, 0x00220002, 0x0000000c, 0x29520001, 0x0000000c, 0x29520000, | 1101 | 0x0d, 0xe9, 0x73, 0x58, 0x7d, 0xd9, 0xbf, 0xee, 0x73, 0x20, 0x3f, 0xb8, |
1988 | 0x00000008, 0x22000001, 0x0000000c, 0x1f800001, 0x00000000, 0x2adf0000, | 1102 | 0x8b, 0xdf, 0x9b, 0x04, 0x14, 0x0b, 0x2a, 0x5f, 0x3f, 0xcf, 0xc7, 0xa8, |
1989 | 0x00000008, 0x2a000003, 0x00000018, 0x8000ff83, 0x00000010, 0xb1a0b01d, | 1103 | 0xdf, 0x30, 0x97, 0x93, 0xfb, 0x62, 0xfe, 0x36, 0x35, 0x5c, 0x1b, 0xf9, |
1990 | 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c200000, 0x00000008, 0x2c8000b0, | 1104 | 0x88, 0x04, 0xab, 0x98, 0x23, 0x7f, 0x47, 0xd3, 0x78, 0x7d, 0x50, 0x5d, |
1991 | 0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800150, | 1105 | 0xa8, 0xbe, 0x4b, 0x8c, 0x41, 0x7e, 0x9a, 0xeb, 0xcc, 0x50, 0x3c, 0xd2, |
1992 | 0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800000, | 1106 | 0x81, 0xc1, 0x3a, 0xc8, 0xf3, 0xf7, 0x28, 0xc8, 0x87, 0x55, 0x5d, 0x59, |
1993 | 0x00000008, 0x2d000000, 0x00000008, 0x2d800108, 0x00000000, 0x00000000, | 1107 | 0xf4, 0xce, 0x75, 0x12, 0x8a, 0x39, 0xd2, 0x55, 0x73, 0x5f, 0x59, 0x6f, |
1994 | 0x00000010, 0x91de0000, 0x0000000f, 0x47600008, 0x00000000, 0x060e0000, | 1108 | 0x6b, 0xea, 0xbb, 0x84, 0xdb, 0xd5, 0x92, 0xee, 0xab, 0xf7, 0x12, 0x64, |
1995 | 0x00000010, 0x001f0000, 0x00000000, 0x0f580000, 0x00000010, 0x91de0000, | 1109 | 0xbd, 0x3c, 0x47, 0x5a, 0xe8, 0xa3, 0x5d, 0x1c, 0xdf, 0x79, 0x0e, 0x64, |
1996 | 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000, 0x00000000, 0x0b670000, | 1110 | 0x5b, 0x7d, 0x6f, 0x4c, 0xae, 0xeb, 0x0c, 0xeb, 0xfb, 0x68, 0x93, 0xbe, |
1997 | 0x00000000, 0x0d620000, 0x00000000, 0x0ce71800, 0x00000009, 0x0c99ffff, | 1111 | 0xd5, 0x7d, 0xf5, 0xef, 0x74, 0xce, 0xf5, 0x9b, 0x68, 0x97, 0xda, 0x59, |
1998 | 0x00000004, 0xcc993400, 0x00000010, 0xb1963220, 0x00000008, 0x0f800000, | 1112 | 0xf7, 0xde, 0x4f, 0x71, 0xcf, 0xfd, 0x44, 0x6e, 0xa6, 0xca, 0xbb, 0xcf, |
1999 | 0x00000018, 0x8000001e, 0x0000000f, 0x47600008, 0x0000000b, 0x2fdf0002, | 1113 | 0x7b, 0xaf, 0x1c, 0x0a, 0xe9, 0x83, 0xf7, 0x3e, 0x0a, 0xd6, 0xeb, 0xd7, |
2000 | 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, 0x00000010, 0x91d40000, | 1114 | 0x23, 0xf5, 0x35, 0xce, 0xf5, 0x9b, 0x0d, 0xee, 0xc3, 0x54, 0xff, 0x0c, |
2001 | 0x00000008, 0x2d80012c, 0x0000000f, 0x060e0001, 0x00000010, 0x001f0000, | 1115 | 0xe9, 0x3f, 0x53, 0x90, 0xfa, 0x71, 0xc1, 0x31, 0xe9, 0x7c, 0x42, 0x71, |
2002 | 0x00000000, 0x0f580000, 0x00000010, 0x91de0000, 0x00000000, 0x0a640000, | 1116 | 0x8e, 0x66, 0x62, 0xde, 0xf3, 0x1a, 0xad, 0xe7, 0x67, 0xd0, 0x2f, 0x3e, |
2003 | 0x00000000, 0x0ae50000, 0x00000000, 0x0b670000, 0x00000000, 0x0d620000, | 1117 | 0xa7, 0xf6, 0xf3, 0x48, 0xd8, 0xe4, 0x8b, 0x2d, 0xe2, 0xbd, 0xa6, 0xab, |
2004 | 0x00000000, 0x02630000, 0x0000000f, 0x47620010, 0x00000000, 0x0ce71800, | 1118 | 0xb9, 0x70, 0x91, 0xef, 0x01, 0x97, 0xec, 0xcc, 0x2b, 0x8a, 0x2f, 0xb9, |
2005 | 0x0000000b, 0x2fdf0002, 0x00000000, 0x311a0000, 0x00000000, 0x31840000, | 1119 | 0xaf, 0xc3, 0x12, 0xcd, 0xc5, 0xad, 0x47, 0x84, 0x37, 0xe1, 0x32, 0x9d, |
2006 | 0x0000000b, 0xc20000ff, 0x00000002, 0x42040000, 0x00000001, 0x31620800, | 1120 | 0xfb, 0xfb, 0xfb, 0x66, 0x21, 0x42, 0x97, 0x57, 0xc7, 0x51, 0xa1, 0x63, |
2007 | 0x0000000f, 0x020e0010, 0x00000002, 0x31620800, 0x00000009, 0x0c99ffff, | 1121 | 0x9c, 0x63, 0x25, 0x57, 0x78, 0xae, 0x11, 0x9f, 0xf3, 0xa4, 0x73, 0x8d, |
2008 | 0x00000004, 0xcc993400, 0x00000010, 0xb1963202, 0x00000008, 0x0f800000, | 1122 | 0xf3, 0xc3, 0xab, 0x45, 0x3e, 0xab, 0xba, 0xac, 0xf7, 0x9a, 0xd2, 0x1d, |
2009 | 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x0000000c, 0x61420006, | 1123 | 0x0c, 0x9b, 0x38, 0x3f, 0xa9, 0xca, 0x02, 0x2e, 0x7b, 0x1d, 0x46, 0xbb, |
2010 | 0x00000008, 0x22000008, 0x00000000, 0x2adf0000, 0x00000008, 0x2a000004, | 1124 | 0x4c, 0x18, 0xc3, 0xfc, 0x75, 0x78, 0x58, 0x93, 0x7e, 0x05, 0xbe, 0xdf, |
2011 | 0x00000018, 0x8000ff42, 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, | 1125 | 0x7e, 0xb0, 0x5e, 0x74, 0xa8, 0xf0, 0xef, 0x8b, 0x05, 0x7c, 0x3f, 0x01, |
2012 | 0x00000010, 0x91a0b008, 0x00000010, 0x91d40000, 0x0000000c, 0x31620018, | 1126 | 0xcd, 0xf7, 0x1b, 0xc5, 0x29, 0x0f, 0x11, 0xda, 0xa7, 0xb8, 0xaf, 0xc3, |
2013 | 0x00000008, 0x2d800001, 0x00000000, 0x00000000, 0x00000010, 0x91de0000, | 1127 | 0xd2, 0xce, 0x11, 0x7e, 0xdc, 0x3f, 0xec, 0xc3, 0x05, 0x8f, 0x3f, 0x42, |
2014 | 0x00000008, 0xac000001, 0x00000018, 0x8000000e, 0x00000000, 0x0380b000, | 1128 | 0xe5, 0xc3, 0x40, 0x98, 0xbf, 0xb4, 0xff, 0xde, 0xe2, 0x3e, 0xa5, 0xf7, |
2015 | 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c004000, 0x00000010, 0x91d40000, | 1129 | 0x2f, 0xc9, 0x7e, 0xaa, 0xff, 0x19, 0xd7, 0x3f, 0xec, 0xd5, 0xbd, 0x8a, |
2016 | 0x00000008, 0x2d800101, 0x00000000, 0x00000000, 0x00000010, 0x91de0000, | 1130 | 0xf7, 0xae, 0xbe, 0xff, 0x7d, 0xdc, 0xc1, 0x76, 0x5b, 0xfb, 0xd8, 0xd1, |
2017 | 0x0000000c, 0x31620018, 0x00000008, 0x2d800001, 0x00000000, 0x00000000, | 1131 | 0xf1, 0xf9, 0x41, 0xef, 0xfd, 0xfd, 0xa6, 0x4e, 0x3c, 0x6d, 0xd4, 0xd5, |
2018 | 0x00000010, 0x91de0000, 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c000e00, | 1132 | 0x5c, 0x6d, 0x84, 0xcc, 0xd5, 0xc5, 0xff, 0x3a, 0x57, 0x10, 0x98, 0xab, |
2019 | 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x00000008, 0x2a000007, | 1133 | 0xd5, 0xfa, 0xc1, 0xe6, 0x0a, 0xb8, 0x7e, 0x08, 0x99, 0xab, 0x18, 0xf3, |
2020 | 0x00000018, 0x8000ff27, 0x00000010, 0xb1a0b016, 0x0000000b, 0x2fdf0002, | 1134 | 0xf0, 0x94, 0xcf, 0x33, 0x20, 0xaa, 0xc7, 0xb0, 0x7d, 0xc6, 0x2c, 0xeb, |
2021 | 0x00000000, 0x03d80000, 0x00000000, 0x2c200000, 0x00000008, 0x2c8000b0, | 1135 | 0x92, 0xf4, 0x68, 0x47, 0xcb, 0xa8, 0x3f, 0xc7, 0x2e, 0x93, 0x9d, 0x41, |
2022 | 0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800150, | 1136 | 0xfb, 0x49, 0x85, 0x0b, 0xb3, 0xf4, 0x7b, 0x4a, 0x83, 0x9f, 0x94, 0x15, |
2023 | 0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800000, | 1137 | 0x12, 0x3d, 0x80, 0x0b, 0x00, 0x00, 0x00 }; |
2024 | 0x00000008, 0x2d000000, 0x00000008, 0x2d800108, 0x00000008, 0x07000001, | ||
2025 | 0x00000010, 0xb5de1c00, 0x00000010, 0x2c620002, 0x00000018, 0x8000000a, | ||
2026 | 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c070000, 0x0000000c, 0x1f800001, | ||
2027 | 0x00000010, 0x91de0000, 0x00000018, 0x8000ff11, 0x00000008, 0x2c8000b0, | ||
2028 | 0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800108, | ||
2029 | 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x00000010, 0x91de0000, | ||
2030 | 0x00000000, 0x2adf0000, 0x00000008, 0x2a00000a, 0x00000018, 0x8000ff07, | ||
2031 | 0x00000000, 0x82265600, 0x0000000f, 0x47220008, 0x00000009, 0x070e000f, | ||
2032 | 0x00000008, 0x070e0008, 0x00000008, 0x02800001, 0x00000007, 0x02851c00, | ||
2033 | 0x00000008, 0x82850001, 0x00000000, 0x02840a00, 0x00000007, 0x42851c00, | ||
2034 | 0x00000003, 0xc3aa5200, 0x00000000, 0x03b10e00, 0x00000010, 0x001f0000, | ||
2035 | 0x0000000f, 0x0f280007, 0x00000007, 0x4b071c00, 0x00000000, 0x00000000, | ||
2036 | 0x0000000f, 0x0a960003, 0x00000000, 0x0a955c00, 0x00000000, 0x4a005a00, | ||
2037 | 0x00000000, 0x0c960a00, 0x00000009, 0x0c99ffff, 0x00000008, 0x0d00ffff, | ||
2038 | 0x00000010, 0xb1963202, 0x00000008, 0x0f800005, 0x00000010, 0x00220020, | ||
2039 | 0x00000000, 0x02a70000, 0x00000010, 0xb1850002, 0x00000008, 0x82850200, | ||
2040 | 0x00000000, 0x02000000, 0x00000000, 0x03a60000, 0x00000018, 0x8000004e, | ||
2041 | 0x00000000, 0x072b0000, 0x00000001, 0x878c1c00, 0x00000000, 0x870e1e00, | ||
2042 | 0x00000000, 0x860c1e00, 0x00000000, 0x03061e00, 0x00000010, 0xb18e0003, | ||
2043 | 0x00000018, 0x80000047, 0x00000018, 0x8000fffa, 0x00000010, 0x918c0003, | ||
2044 | 0x00000010, 0xb1870002, 0x00000018, 0x80000043, 0x00000010, 0x91d40000, | ||
2045 | 0x0000000c, 0x29800001, 0x00000000, 0x2a860000, 0x00000000, 0x230c0000, | ||
2046 | 0x00000000, 0x2b070000, 0x00000010, 0xb187000e, 0x00000008, 0x2a000008, | ||
2047 | 0x00000018, 0x8000003b, 0x00000010, 0x91d40000, 0x00000000, 0x28d18c00, | ||
2048 | 0x00000000, 0x2a860000, 0x00000000, 0x230c0000, 0x00000000, 0x2b070000, | ||
2049 | 0x00000018, 0x8000fff8, 0x00000010, 0x91d40000, 0x0000000c, 0x29800001, | ||
2050 | 0x00000000, 0x2aab0000, 0x00000000, 0xa3265600, 0x00000000, 0x2b000000, | ||
2051 | 0x0000000c, 0x1f800001, 0x00000008, 0x2a000008, 0x00000018, 0x8000fec8, | ||
2052 | 0x00000010, 0x91d40000, 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, | ||
2053 | 0x00000008, 0x2a000009, 0x00000018, 0x8000fec3, 0x00000010, 0x91d40000, | ||
2054 | 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x00000000, 0x29420000, | ||
2055 | 0x00000008, 0x2a000002, 0x00000018, 0x8000febd, 0x00000018, 0x8000febc, | ||
2056 | 0x00000010, 0xb1bcb016, 0x0000000b, 0x2fdf0002, 0x00000000, 0x03d80000, | ||
2057 | 0x00000000, 0x2c3c0000, 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, | ||
2058 | 0x00000010, 0x91d40000, 0x00000008, 0x2d800150, 0x00000000, 0x00000000, | ||
2059 | 0x00000010, 0x205f0000, 0x00000008, 0x2c800000, 0x00000008, 0x2d000000, | ||
2060 | 0x00000008, 0x2d800108, 0x00000008, 0x07000001, 0x00000010, 0xb5de1c00, | ||
2061 | 0x00000010, 0x2c620002, 0x00000018, 0x8000000a, 0x0000000b, 0x2fdf0002, | ||
2062 | 0x00000000, 0x2c070000, 0x0000000c, 0x1f800000, 0x00000010, 0x91de0000, | ||
2063 | 0x00000018, 0x8000fea6, 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, | ||
2064 | 0x00000010, 0x91d40000, 0x00000008, 0x2d800108, 0x0000000c, 0x29800000, | ||
2065 | 0x0000000c, 0x1f800000, 0x00000010, 0x91de0000, 0x00000000, 0x2adf0000, | ||
2066 | 0x00000008, 0x2a000006, 0x00000018, 0x8000fe9c, 0x00000008, 0x03050004, | ||
2067 | 0x00000006, 0x83040c00, 0x00000008, 0x02850200, 0x00000000, 0x86050c00, | ||
2068 | 0x00000001, 0x860c0e00, 0x00000008, 0x02040004, 0x00000000, 0x02041800, | ||
2069 | 0x00000000, 0x83871800, 0x00000018, 0x00020000 }; | ||
2070 | 1138 | ||
2071 | static u32 bnx2_rv2p_proc2[] = { | 1139 | static u8 bnx2_rv2p_proc2[] = { |
2072 | 0x00000000, 0x2a000000, 0x00000010, 0xb1d40000, 0x00000008, 0x02540003, | 1140 | 0x1f, 0x8b, 0x08, 0x08, 0x7e, 0xd1, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65, |
2073 | 0x00000018, 0x00040000, 0x00000018, 0x8000000a, 0x00000018, 0x8000000a, | 1141 | 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xcd, 0x58, 0x5b, 0x6c, |
2074 | 0x00000018, 0x8000000e, 0x00000018, 0x80000056, 0x00000018, 0x800001b9, | 1142 | 0x54, 0x55, 0x14, 0x3d, 0xf3, 0xe8, 0xcc, 0x9d, 0xe9, 0xed, 0x9d, 0xf2, |
2075 | 0x00000018, 0x800001e1, 0x00000018, 0x8000019b, 0x00000018, 0x800001f9, | 1143 | 0xb2, 0x03, 0xad, 0x08, 0xe5, 0xd1, 0x56, 0x29, 0xe8, 0x54, 0xab, 0x18, |
2076 | 0x00000018, 0x8000019f, 0x00000018, 0x800001a6, 0x00000018, 0x80000000, | 1144 | 0x15, 0x2c, 0x5a, 0x8c, 0x26, 0x68, 0xf0, 0xf9, 0x63, 0x14, 0x04, 0xda, |
2077 | 0x0000000c, 0x29800001, 0x00000000, 0x2a000000, 0x0000000c, 0x29800000, | 1145 | 0x9a, 0x56, 0x9b, 0x16, 0xfb, 0x81, 0xaf, 0x09, 0x14, 0x6a, 0x4c, 0x25, |
2078 | 0x00000010, 0x20530000, 0x00000018, 0x8000ffee, 0x0000000c, 0x29800001, | 1146 | 0xd6, 0x08, 0xc5, 0x47, 0xa0, 0x11, 0x1f, 0x84, 0xf0, 0xd3, 0x1f, 0x3b, |
2079 | 0x00000010, 0x91de0000, 0x00000010, 0x001f0000, 0x00000000, 0x2f80aa00, | 1147 | 0x8d, 0x7f, 0x0a, 0x24, 0x6a, 0x88, 0xc4, 0xa8, 0x9f, 0x24, 0x68, 0xa0, |
2080 | 0x00000000, 0x2a000000, 0x00000000, 0x0d610000, 0x00000000, 0x03620000, | 1148 | 0x21, 0x0a, 0x58, 0x8b, 0x63, 0x4c, 0xb4, 0xf5, 0xec, 0xbd, 0xf6, 0xb9, |
2081 | 0x00000000, 0x2c400000, 0x00000000, 0x02638c00, 0x00000000, 0x26460000, | 1149 | 0x73, 0xef, 0x6d, 0x8b, 0x1a, 0xf9, 0x70, 0x3e, 0xba, 0x7b, 0xce, 0xd9, |
2082 | 0x00000010, 0x00420002, 0x00000008, 0x02040012, 0x00000010, 0xb9060836, | 1150 | 0x67, 0x3f, 0xd6, 0xde, 0x67, 0x9f, 0x7d, 0xae, 0x52, 0xfc, 0xbb, 0xb6, |
2083 | 0x00000000, 0x0f580000, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000, | 1151 | 0x94, 0xc9, 0x37, 0x83, 0x96, 0xfe, 0x1b, 0x51, 0x0f, 0x85, 0xd3, 0x3c, |
2084 | 0x00000000, 0x0b660000, 0x00000000, 0x0c000000, 0x00000000, 0x0b800000, | 1152 | 0x8e, 0x2a, 0xa2, 0x49, 0xa5, 0xb2, 0x5e, 0xea, 0x08, 0x7d, 0x44, 0xe8, |
2085 | 0x00000010, 0x00420009, 0x00000008, 0x0cc60012, 0x00000008, 0x0f800003, | 1153 | 0x70, 0x08, 0xf4, 0xb4, 0xd0, 0x77, 0x84, 0xfe, 0x2e, 0xf4, 0x80, 0xd0, |
2086 | 0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000008, 0x27110012, | 1154 | 0x0f, 0x85, 0xea, 0x5f, 0xd6, 0xd6, 0x7f, 0xf4, 0xb0, 0x46, 0x89, 0x7e, |
2087 | 0x00000000, 0x66900000, 0x00000008, 0xa31b0012, 0x00000018, 0x80000008, | 1155 | 0x1b, 0xd3, 0x35, 0xb0, 0xe3, 0xc1, 0x05, 0xc4, 0x77, 0x61, 0xa2, 0xc0, |
2088 | 0x00000000, 0x0cc60000, 0x00000008, 0x0f800003, 0x00000000, 0x00000000, | 1156 | 0x87, 0xf9, 0x53, 0x7d, 0xa0, 0xd7, 0x60, 0xd7, 0xe1, 0xec, 0x0a, 0xb3, |
2089 | 0x00000010, 0x009f0000, 0x00000000, 0x27110000, 0x00000000, 0x66900000, | 1157 | 0x1f, 0x64, 0x43, 0x09, 0xe8, 0xc6, 0x08, 0xe8, 0xea, 0x65, 0x4c, 0x7a, |
2090 | 0x00000000, 0x231b0000, 0x00000010, 0xb197320e, 0x00000000, 0x25960000, | 1158 | 0x9f, 0x0a, 0x63, 0xdc, 0xb8, 0x94, 0xf6, 0x87, 0x55, 0x83, 0x22, 0x3f, |
2091 | 0x00000000, 0x021b0000, 0x00000010, 0x001f0000, 0x00000008, 0x0f800003, | 1159 | 0x67, 0xaa, 0x68, 0x98, 0xc6, 0xf5, 0x56, 0x6c, 0x18, 0xeb, 0x8f, 0xa5, |
2092 | 0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x00000000, 0x22c50800, | 1160 | 0x40, 0x37, 0x25, 0x41, 0xcf, 0x08, 0xdd, 0x52, 0x2c, 0x7a, 0x6c, 0x31, |
2093 | 0x00000010, 0x009f0000, 0x00000000, 0x27002200, 0x00000000, 0x26802000, | 1161 | 0xbf, 0x98, 0xf6, 0x25, 0x5c, 0x39, 0xc7, 0x6d, 0xe0, 0x96, 0x95, 0xfd, |
2094 | 0x00000000, 0x231b0000, 0x0000000c, 0x69520001, 0x00000018, 0x8000fff3, | 1162 | 0x4a, 0xc1, 0xce, 0x03, 0xb2, 0x3e, 0xa3, 0x0a, 0xb3, 0xaf, 0x6f, 0xc1, |
2095 | 0x00000010, 0x01130002, 0x00000010, 0xb1980003, 0x00000010, 0x001f0000, | 1163 | 0xb8, 0xfc, 0x20, 0xf9, 0xa7, 0xff, 0xcf, 0x62, 0x7e, 0xfa, 0xfd, 0xf8, |
2096 | 0x00000008, 0x0f800004, 0x00000008, 0x22000003, 0x00000008, 0x2c80000c, | 1164 | 0x15, 0xf6, 0x83, 0x96, 0x2f, 0xa2, 0x75, 0x27, 0xd3, 0x3f, 0x88, 0xf1, |
2097 | 0x00000008, 0x2d00000c, 0x00000010, 0x009f0000, 0x00000000, 0x25960000, | 1165 | 0xde, 0x25, 0x32, 0x1f, 0x36, 0xf8, 0x18, 0x79, 0x41, 0x5c, 0x99, 0x58, |
2098 | 0x0000000c, 0x29800000, 0x00000000, 0x32140000, 0x00000000, 0x32950000, | 1166 | 0xc7, 0x2a, 0x7d, 0xf2, 0x2b, 0x15, 0xe4, 0x2f, 0xc8, 0x2e, 0x35, 0xf2, |
2099 | 0x00000000, 0x33160000, 0x00000000, 0x31e32e00, 0x00000008, 0x2d800010, | 1167 | 0x81, 0xfb, 0xfa, 0x16, 0xb2, 0x73, 0x4c, 0xc7, 0x01, 0xb8, 0xcd, 0x0a, |
2100 | 0x00000010, 0x20530000, 0x00000018, 0x8000ffac, 0x00000000, 0x23000000, | 1168 | 0x95, 0xb2, 0xdc, 0x7d, 0x83, 0x5e, 0x3d, 0x51, 0xad, 0x07, 0xfa, 0x54, |
2101 | 0x00000000, 0x25e60000, 0x00000008, 0x2200000b, 0x0000000c, 0x69520000, | 1169 | 0xa5, 0xc5, 0x20, 0x65, 0x97, 0x81, 0xaa, 0x5a, 0xbf, 0x1f, 0x7b, 0x97, |
2102 | 0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x00000018, 0x8000ffa5, | 1170 | 0x18, 0x7b, 0x30, 0x9e, 0x9d, 0x01, 0xdd, 0x23, 0xf4, 0xaa, 0x3a, 0x26, |
2103 | 0x0000000c, 0x29800001, 0x00000010, 0x91de0000, 0x00000000, 0x2fd50000, | 1171 | 0xcb, 0x7f, 0xb8, 0xc1, 0x62, 0x0c, 0xb2, 0xb5, 0xde, 0x7c, 0x38, 0x32, |
2104 | 0x00000010, 0x001f0000, 0x00000000, 0x02700000, 0x00000000, 0x0d620000, | 1172 | 0x61, 0xf0, 0x52, 0x8b, 0x40, 0xce, 0x2e, 0x21, 0x3e, 0x1d, 0x9c, 0x4a, |
2105 | 0x00000000, 0xbb630800, 0x00000000, 0x2a000000, 0x00000009, 0x076000ff, | 1173 | 0xc8, 0x5d, 0xdf, 0x32, 0x55, 0x1e, 0x7d, 0x30, 0x45, 0x1e, 0x61, 0xff, |
2106 | 0x0000000f, 0x2c0e0007, 0x00000008, 0x2c800000, 0x00000008, 0x2d000064, | 1174 | 0xb7, 0x2b, 0x7c, 0xf9, 0xa4, 0xda, 0x25, 0x4f, 0x36, 0x22, 0x8f, 0xac, |
2107 | 0x00000008, 0x2d80011c, 0x00000009, 0x06420002, 0x0000000c, 0x61420001, | 1175 | 0xa7, 0x3e, 0x91, 0x85, 0x6b, 0x13, 0xfa, 0xcf, 0x84, 0x7a, 0x32, 0x4e, |
2108 | 0x00000000, 0x0f400000, 0x00000000, 0x02d08c00, 0x00000000, 0x23000000, | 1176 | 0x01, 0x8a, 0x2b, 0x87, 0xfd, 0x53, 0xe2, 0xe7, 0x26, 0xed, 0x27, 0xd1, |
2109 | 0x00000004, 0x826da000, 0x00000000, 0x8304a000, 0x00000000, 0x22c50c00, | 1177 | 0x8a, 0x50, 0xb6, 0x36, 0xc1, 0x38, 0x35, 0xc4, 0xa0, 0xaf, 0x61, 0x03, |
2110 | 0x00000000, 0x03760000, 0x00000004, 0x83860a00, 0x00000000, 0x83870c00, | 1178 | 0xb6, 0xaf, 0x46, 0x5c, 0x7b, 0x4f, 0x86, 0x8d, 0xfd, 0x51, 0xfa, 0x3b, |
2111 | 0x00000010, 0x91de0000, 0x00000000, 0x037c0000, 0x00000000, 0x837b0c00, | 1179 | 0xd0, 0xb6, 0x9d, 0x47, 0x03, 0xd1, 0x1d, 0x4c, 0xed, 0x63, 0x95, 0x58, |
2112 | 0x00000001, 0x83060e00, 0x00000000, 0x83870c00, 0x00000000, 0x82850e00, | 1180 | 0xee, 0x8a, 0xf0, 0x7a, 0x72, 0x97, 0xcc, 0xf7, 0xec, 0xf0, 0xdb, 0xfd, |
2113 | 0x00000010, 0xb1860016, 0x0000000f, 0x47610018, 0x00000000, 0x068e0000, | 1181 | 0x02, 0xf2, 0xdb, 0x7e, 0x7e, 0x47, 0x88, 0xa8, 0x13, 0x73, 0xf9, 0x98, |
2114 | 0x0000000f, 0x47670010, 0x0000000f, 0x47e20010, 0x00000000, 0x870e1e00, | 1182 | 0x3a, 0x3b, 0xb7, 0x13, 0xff, 0x55, 0x6a, 0xd7, 0x20, 0x29, 0x4e, 0xab, |
2115 | 0x00000010, 0xb70e1a10, 0x00000010, 0x0ce7000e, 0x00000008, 0x22000009, | 1183 | 0x0d, 0x6b, 0xb1, 0x6f, 0x77, 0x2c, 0xc5, 0xb8, 0x36, 0xad, 0x05, 0xfd, |
2116 | 0x00000000, 0x286d0000, 0x0000000f, 0x65680010, 0x00000003, 0xf66c9400, | 1184 | 0x1e, 0xf3, 0xf3, 0x9d, 0x1e, 0xe2, 0x2f, 0x9d, 0xe7, 0x0c, 0x71, 0x5e, |
2117 | 0x00000010, 0xb972a003, 0x0000000c, 0x73e70019, 0x0000000c, 0x21420004, | 1185 | 0xa9, 0x11, 0xce, 0xc7, 0x04, 0x65, 0x06, 0xff, 0xda, 0xaa, 0xc1, 0xdf, |
2118 | 0x00000018, 0x8000023f, 0x00000000, 0x37ed0000, 0x0000000c, 0x73e7001a, | 1186 | 0xbc, 0x99, 0x15, 0xbf, 0xd9, 0x9a, 0xe7, 0x3c, 0x18, 0xe8, 0x18, 0x26, |
2119 | 0x00000010, 0x20530000, 0x00000008, 0x22000008, 0x0000000c, 0x61420004, | 1187 | 0x3f, 0xe7, 0xaa, 0x91, 0x4e, 0xa2, 0x51, 0xd5, 0xb0, 0x90, 0xf0, 0x5e, |
2120 | 0x00000000, 0x02f60000, 0x00000004, 0x82840a00, 0x00000010, 0xb1840a2b, | 1188 | 0x15, 0x36, 0x71, 0x3a, 0x7f, 0x33, 0xcd, 0xcf, 0xd3, 0xeb, 0x26, 0x1e, |
2121 | 0x00000010, 0x2d67000a, 0x00000010, 0xb96d0804, 0x00000004, 0xb6ed0a00, | 1189 | 0x24, 0xd7, 0x92, 0x78, 0x45, 0x5d, 0x7c, 0xf2, 0x61, 0xf8, 0xdb, 0xcd, |
2122 | 0x00000000, 0x37ed0000, 0x00000018, 0x80000029, 0x0000000c, 0x61420000, | 1190 | 0x76, 0x5f, 0x97, 0xec, 0xe6, 0xfc, 0x4a, 0xaa, 0x26, 0x8e, 0x7f, 0xd4, |
2123 | 0x00000000, 0x37040000, 0x00000000, 0x37850000, 0x0000000c, 0x33e7001a, | 1191 | 0x6a, 0x1b, 0xc6, 0xfa, 0xf9, 0x8f, 0x8d, 0x5c, 0xd2, 0x53, 0x23, 0x75, |
2124 | 0x00000018, 0x80000024, 0x00000010, 0xb96d0809, 0x00000004, 0xb6ed0a00, | 1192 | 0x44, 0xb9, 0x72, 0xa2, 0x37, 0x83, 0xee, 0x34, 0x7a, 0xeb, 0x88, 0x6f, |
2125 | 0x00000000, 0x036d0000, 0x00000004, 0xb76e0c00, 0x00000010, 0x91ee0c1f, | 1193 | 0xb1, 0x42, 0xfe, 0x26, 0x26, 0xc9, 0x69, 0x03, 0xce, 0xf6, 0x33, 0xec, |
2126 | 0x0000000c, 0x73e7001a, 0x00000004, 0xb6ef0c00, 0x00000000, 0x37ed0000, | 1194 | 0xf7, 0x35, 0xf6, 0x85, 0x3e, 0x63, 0x2f, 0xe6, 0x2f, 0xfa, 0xf4, 0x95, |
2127 | 0x00000018, 0x8000001b, 0x0000000c, 0x61420000, 0x00000010, 0xb7ee0a05, | 1195 | 0x7b, 0xf4, 0x11, 0x7f, 0x51, 0xf2, 0x02, 0xef, 0x9b, 0x63, 0x3d, 0x3b, |
2128 | 0x00000010, 0xb96f0815, 0x00000003, 0xb76e0800, 0x00000004, 0xb7ef0a00, | 1196 | 0xcc, 0xb8, 0x58, 0xcf, 0x0c, 0x41, 0xfe, 0xc5, 0x21, 0xe2, 0x9f, 0x23, |
2129 | 0x00000018, 0x80000015, 0x00000010, 0x0ce7000c, 0x00000008, 0x22000009, | 1197 | 0x7a, 0xed, 0xff, 0x88, 0xe7, 0x9c, 0x30, 0xe4, 0x4c, 0x8f, 0x5f, 0xc1, |
2130 | 0x00000000, 0x286d0000, 0x0000000f, 0x65680010, 0x00000003, 0xf66c9400, | 1198 | 0x6f, 0xe3, 0x17, 0xcb, 0xb5, 0x47, 0x73, 0x69, 0xe6, 0x33, 0xf1, 0xe8, |
2131 | 0x00000010, 0xb972a003, 0x0000000c, 0x73e70019, 0x0000000c, 0x21420004, | 1199 | 0x0e, 0x73, 0x02, 0xa6, 0x1b, 0x16, 0xfa, 0x71, 0x33, 0xf6, 0x9c, 0xdf, |
2132 | 0x00000018, 0x80000215, 0x00000010, 0x20530000, 0x00000008, 0x22000008, | 1200 | 0xcc, 0x79, 0x3e, 0xd1, 0x26, 0x75, 0x40, 0x71, 0x9d, 0xb9, 0x5d, 0xe2, |
2133 | 0x0000000c, 0x61420004, 0x00000000, 0x37040000, 0x00000000, 0x37850000, | 1201 | 0xa1, 0xf3, 0x3a, 0x04, 0xff, 0x46, 0x73, 0x2c, 0x3f, 0xd9, 0xc5, 0x79, |
2134 | 0x00000000, 0x036d0000, 0x00000003, 0xb8f10c00, 0x00000018, 0x80000004, | 1202 | 0xb9, 0xd2, 0x8e, 0xe6, 0x38, 0x5e, 0xd6, 0xd9, 0x21, 0x6c, 0x2b, 0xd4, |
2135 | 0x00000000, 0x02840000, 0x00000002, 0x21421800, 0x0000000c, 0x61420000, | 1203 | 0x4f, 0xc8, 0x6b, 0xb6, 0x41, 0x9b, 0xa4, 0x8e, 0x9e, 0x15, 0xda, 0x6d, |
2136 | 0x00000000, 0x286d0000, 0x0000000f, 0x65ed0010, 0x00000009, 0x266dffff, | 1204 | 0x33, 0x3e, 0xba, 0x8e, 0x59, 0x2c, 0x3f, 0x9b, 0x32, 0xf7, 0x0c, 0xd6, |
2137 | 0x00000000, 0x23000000, 0x00000010, 0xb1840a3d, 0x00000010, 0x01420002, | 1205 | 0x9f, 0x16, 0x39, 0x3f, 0x0a, 0x55, 0x22, 0xa7, 0x55, 0xf6, 0x9f, 0xf3, |
2138 | 0x00000004, 0xb8f10a00, 0x00000003, 0x83760a00, 0x00000010, 0xb8040c39, | 1206 | 0xc9, 0x89, 0x04, 0xe4, 0x84, 0x94, 0xc1, 0xcd, 0x9c, 0xef, 0x5d, 0x52, |
2139 | 0x00000010, 0xb7e6080a, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000, | 1207 | 0xbf, 0xf7, 0xc5, 0xa6, 0xab, 0xb7, 0x7c, 0x0e, 0xdc, 0xba, 0x5a, 0x8e, |
2140 | 0x00000009, 0x0c68ffff, 0x00000009, 0x0b67ffff, 0x00000000, 0x0be60000, | 1208 | 0x3a, 0x53, 0x1f, 0x0d, 0xb3, 0xbf, 0x03, 0xdd, 0x3b, 0x80, 0x53, 0x8f, |
2141 | 0x00000000, 0x0c840000, 0x00000010, 0xb197320c, 0x00000008, 0x0f800002, | 1209 | 0xe0, 0x14, 0x07, 0x4e, 0xf3, 0x0a, 0xf5, 0x59, 0x14, 0xd4, 0x90, 0xfe, |
2142 | 0x00000018, 0x8000000a, 0x00000000, 0x0a6a0000, 0x00000000, 0x0aeb0000, | 1210 | 0x53, 0x21, 0xe3, 0xc7, 0xbe, 0x98, 0xaf, 0xfe, 0xf6, 0x9a, 0xfa, 0x5b, |
2143 | 0x00000000, 0x0c000000, 0x00000009, 0x0b6cffff, 0x00000000, 0x0be90000, | 1211 | 0xa8, 0xd3, 0xc4, 0xff, 0xb3, 0xa9, 0x6f, 0x5a, 0x9f, 0xd1, 0xff, 0x6f, |
2144 | 0x00000000, 0x0c840000, 0x00000010, 0xb1973203, 0x00000008, 0x0f800002, | 1212 | 0xf5, 0x72, 0x9c, 0x92, 0xdd, 0x7d, 0x26, 0xce, 0x98, 0x2e, 0xd4, 0xd9, |
2145 | 0x00000018, 0x80000001, 0x00000010, 0x001f0000, 0x00000000, 0x0c860000, | 1213 | 0x22, 0x22, 0xcb, 0x46, 0x3a, 0x99, 0x5e, 0xdf, 0xbc, 0x15, 0xf3, 0x65, |
2146 | 0x00000000, 0x06980000, 0x00000008, 0x0f800003, 0x00000000, 0x00000000, | 1214 | 0x7c, 0x4e, 0x6e, 0x09, 0x01, 0xaf, 0xa8, 0x3a, 0xde, 0x87, 0xba, 0xae, |
2147 | 0x00000010, 0x009f0000, 0x00000010, 0xb1973210, 0x00000000, 0x231b0000, | 1215 | 0xe2, 0x2c, 0xaf, 0xe2, 0x28, 0xc7, 0x3f, 0xaa, 0xe5, 0x12, 0xdf, 0x67, |
2148 | 0x00000000, 0x02043600, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010, | 1216 | 0xa1, 0x42, 0x3e, 0x7a, 0xfd, 0xd9, 0xad, 0xf3, 0x84, 0xec, 0x88, 0xe9, |
2149 | 0x00000009, 0x2607ffff, 0x00000000, 0x27111a00, 0x00000000, 0x66900000, | 1217 | 0xbc, 0xa5, 0xb1, 0x3e, 0x47, 0xb6, 0xe4, 0xf9, 0x1a, 0xe6, 0xb3, 0xc7, |
2150 | 0x0000000c, 0x29000000, 0x00000018, 0x800001de, 0x00000000, 0x06980000, | 1218 | 0x22, 0x34, 0xff, 0x80, 0xd5, 0xd3, 0x87, 0xf9, 0x9f, 0x1a, 0x69, 0xbc, |
2151 | 0x00000010, 0x20530000, 0x00000000, 0x22c58c00, 0x00000010, 0x001f0000, | 1219 | 0xce, 0x7e, 0x0d, 0xe7, 0xcc, 0x7e, 0x0d, 0xf5, 0xcb, 0x2a, 0x3a, 0x88, |
2152 | 0x00000008, 0x0f800003, 0x00000018, 0x8000fff0, 0x00000000, 0x02043600, | 1220 | 0xba, 0xd6, 0x78, 0x10, 0xf2, 0x71, 0x4f, 0x7b, 0xfd, 0xf2, 0xe2, 0x47, |
2153 | 0x00000000, 0x231b0000, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010, | 1221 | 0xe7, 0xe1, 0xb2, 0x38, 0xd9, 0xcf, 0x09, 0x4e, 0x97, 0x7c, 0xf1, 0x39, |
2154 | 0x00000009, 0x2607ffff, 0x00000000, 0x27111a00, 0x00000000, 0x66900000, | 1222 | 0x6c, 0xe2, 0xd3, 0x1b, 0x93, 0xf3, 0xd2, 0x7c, 0x29, 0xe8, 0x17, 0xf1, |
2155 | 0x0000000c, 0x29000000, 0x00000010, 0x91840a02, 0x00000002, 0x21421800, | 1223 | 0x9d, 0x71, 0xef, 0x9d, 0xae, 0x95, 0xa0, 0xdd, 0x2b, 0xe5, 0x9c, 0xd6, |
2156 | 0x00000000, 0x32140000, 0x00000000, 0x32950000, 0x00000005, 0x73e72c00, | 1224 | 0xf9, 0xf3, 0x6b, 0x3e, 0xea, 0xf2, 0xb8, 0x7b, 0x4f, 0x20, 0xbf, 0xac, |
2157 | 0x00000005, 0x74683000, 0x00000000, 0x33170000, 0x00000018, 0x80000138, | 1225 | 0x9d, 0xf0, 0x4b, 0xbd, 0x28, 0x79, 0x3c, 0x2e, 0xf4, 0x65, 0xc9, 0xdf, |
2158 | 0x00000010, 0x91c60004, 0x00000008, 0x07000004, 0x00000010, 0xb1c41c02, | 1226 | 0x6d, 0xd2, 0xb7, 0x98, 0xfe, 0xe2, 0x0f, 0xcc, 0x3b, 0xfd, 0x6e, 0x5f, |
2159 | 0x00000010, 0x91840a04, 0x00000018, 0x800001c3, 0x00000010, 0x20530000, | 1227 | 0x60, 0xea, 0x36, 0x8d, 0x43, 0xca, 0x89, 0x13, 0x83, 0x36, 0xeb, 0x33, |
2160 | 0x00000000, 0x22c58c00, 0x00000010, 0xb1840a8e, 0x0000000c, 0x21420006, | 1228 | 0x24, 0x4a, 0xcf, 0x1a, 0xe0, 0x35, 0x52, 0x07, 0xbe, 0xdd, 0x91, 0xb0, |
2161 | 0x00000010, 0x0ce7001a, 0x0000000f, 0x43680010, 0x00000000, 0x03f30c00, | 1229 | 0x8c, 0x21, 0x6f, 0xac, 0xda, 0x77, 0x0f, 0xd7, 0x4f, 0xc6, 0x93, 0xe4, |
2162 | 0x00000010, 0x91870850, 0x0000000f, 0x46ec0010, 0x00000010, 0xb68d0c4e, | 1230 | 0xc6, 0xdc, 0xfa, 0x24, 0x79, 0xaf, 0x26, 0x84, 0x96, 0x2f, 0xbe, 0x2c, |
2163 | 0x00000000, 0x838d0c00, 0x00000000, 0xa3050800, 0x00000001, 0xa3460e00, | 1231 | 0xbe, 0x85, 0xfe, 0x64, 0xa9, 0x17, 0xdf, 0x97, 0x34, 0xbe, 0xbc, 0xaf, |
2164 | 0x00000000, 0x02048c00, 0x00000010, 0x91840a02, 0x00000002, 0x21421800, | 1232 | 0xbe, 0xf9, 0x12, 0xa6, 0x4b, 0x6f, 0x05, 0xed, 0xbb, 0x95, 0xe7, 0x17, |
2165 | 0x00000010, 0x001f0000, 0x00000008, 0x22000008, 0x00000003, 0x8384a000, | 1233 | 0xa3, 0xee, 0x11, 0x7e, 0x9c, 0x5f, 0xf5, 0x6f, 0x0c, 0x9a, 0x7e, 0x42, |
2166 | 0x0000000f, 0x65870010, 0x00000009, 0x2607ffff, 0x00000000, 0x27750c00, | 1234 | 0xf0, 0x08, 0xf4, 0x41, 0x65, 0x77, 0x80, 0xbe, 0x29, 0x74, 0xce, 0x2a, |
2167 | 0x00000000, 0x66f40000, 0x0000000c, 0x29000000, 0x00000018, 0x800001aa, | 1235 | 0xd0, 0xbd, 0xab, 0xfc, 0x71, 0x88, 0xa5, 0x7c, 0x71, 0xac, 0x47, 0x1c, |
2168 | 0x00000000, 0x03068c00, 0x00000003, 0xf4680c00, 0x00000010, 0x20530000, | 1236 | 0x8f, 0x4c, 0x04, 0xeb, 0x81, 0xc4, 0x4b, 0xc7, 0x27, 0x70, 0xbf, 0x1b, |
2169 | 0x00000000, 0x22c58c00, 0x00000018, 0x8000ffe5, 0x00000000, 0x39760000, | 1237 | 0xfd, 0xe2, 0xce, 0xdf, 0xc5, 0xed, 0x4a, 0xc7, 0xab, 0x7b, 0x25, 0xee, |
2170 | 0x00000000, 0x39840000, 0x0000000c, 0x33e70019, 0x00000010, 0x001f0000, | 1238 | 0x93, 0x0e, 0xe9, 0x4b, 0xc7, 0xdc, 0xfb, 0xe2, 0x9f, 0xc4, 0x31, 0x7e, |
2171 | 0x00000000, 0x031e0000, 0x00000000, 0x0760fe00, 0x0000000f, 0x0f0e0007, | 1239 | 0x85, 0xe3, 0x78, 0xf7, 0xff, 0x2c, 0x8e, 0x9d, 0x12, 0xc7, 0x22, 0xb9, |
2172 | 0x00000000, 0x83850800, 0x00000000, 0x0a7d0000, 0x00000000, 0x0afe0000, | 1240 | 0x57, 0x4d, 0xbf, 0xd9, 0x2e, 0x7d, 0x18, 0xf5, 0x8d, 0x7e, 0xbd, 0x4f, |
2173 | 0x00000000, 0x0b7f0000, 0x00000000, 0x0d7a0000, 0x00000000, 0x0c000000, | 1241 | 0x70, 0x1f, 0x78, 0xb5, 0x5b, 0x8f, 0xe7, 0x33, 0x7f, 0x4e, 0xf6, 0x95, |
2174 | 0x00000000, 0x0bfc0000, 0x00000000, 0x0c970e00, 0x00000008, 0x0f800003, | 1242 | 0xca, 0xbe, 0x7b, 0x26, 0xed, 0x3b, 0xc5, 0xf5, 0xee, 0xf1, 0xf1, 0xc9, |
2175 | 0x0000000f, 0x47670010, 0x00000008, 0x070e0001, 0x0000000b, 0xc38000ff, | 1243 | 0xef, 0x15, 0x9f, 0x9d, 0x59, 0x95, 0x02, 0xee, 0xa8, 0xe3, 0xb1, 0x29, |
2176 | 0x00000002, 0x43870000, 0x00000001, 0x33e70e00, 0x0000000f, 0x038e0010, | 1244 | 0xde, 0x37, 0x86, 0x1f, 0xf9, 0xb5, 0x36, 0x85, 0xba, 0x05, 0xfe, 0xb9, |
2177 | 0x00000002, 0x33e70e00, 0x00000000, 0x28f30000, 0x00000010, 0x009f0000, | 1245 | 0x9e, 0x7a, 0x4a, 0xe3, 0xfb, 0xc7, 0xa7, 0xef, 0x57, 0x8d, 0x3c, 0xc4, |
2178 | 0x00000000, 0x02043600, 0x00000010, 0x91840a02, 0x00000002, 0x21421800, | 1246 | 0x6d, 0x43, 0xb8, 0x84, 0xf9, 0x4e, 0xb7, 0xf3, 0x7d, 0xe7, 0xfa, 0xb7, |
2179 | 0x00000008, 0x22000006, 0x00000000, 0x231b0000, 0x00000000, 0x23ff0000, | 1247 | 0x9a, 0xfd, 0x3a, 0x2a, 0xfe, 0x55, 0x88, 0x7f, 0x7a, 0xb9, 0x96, 0xeb, |
2180 | 0x00000000, 0x241b0000, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010, | 1248 | 0xbe, 0x75, 0xba, 0xdd, 0xeb, 0xdf, 0x9d, 0x97, 0xd1, 0xf7, 0x4f, 0xfb, |
2181 | 0x00000009, 0x2607ffff, 0x00000000, 0x27110000, 0x00000000, 0x26900000, | 1249 | 0x63, 0xd1, 0x9b, 0x32, 0xfa, 0x49, 0x5e, 0xb9, 0xf4, 0x7d, 0xd4, 0x4f, |
2182 | 0x0000000c, 0x29000000, 0x00000018, 0x8000017e, 0x00000003, 0xf4683600, | 1250 | 0x62, 0x7e, 0x72, 0x9f, 0x41, 0xfa, 0x5b, 0x34, 0x5e, 0x72, 0xdf, 0x70, |
2183 | 0x00000000, 0x3a100000, 0x00000000, 0x3a910000, 0x00000003, 0xf66c2400, | 1251 | 0x3e, 0x47, 0xac, 0xa3, 0x6c, 0x57, 0x5e, 0xf9, 0x71, 0x39, 0x23, 0x7c, |
2184 | 0x00000010, 0x001f0000, 0x00000010, 0xb1923604, 0x00000008, 0x0f800004, | 1252 | 0x53, 0xc5, 0x8d, 0xd6, 0x8b, 0x64, 0x7d, 0x2a, 0xbf, 0xc5, 0x4e, 0x37, |
2185 | 0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000000, 0x3e170000, | 1253 | 0x1f, 0x64, 0x1f, 0xf3, 0x35, 0x0b, 0x5f, 0x34, 0x34, 0x39, 0xfe, 0x18, |
2186 | 0x00000000, 0x3e940000, 0x00000000, 0x3f150000, 0x00000000, 0x3f960000, | 1254 | 0xe5, 0xab, 0x38, 0xaf, 0xf7, 0x6f, 0xcb, 0x11, 0x9f, 0x76, 0x9e, 0xf3, |
2187 | 0x00000010, 0x001f0000, 0x00000000, 0x0f060000, 0x00000010, 0x20530000, | 1255 | 0xf0, 0xfb, 0x80, 0x7d, 0xe9, 0x2b, 0x80, 0x23, 0xf1, 0xcd, 0x50, 0x4d, |
2188 | 0x00000000, 0x22c53600, 0x00000018, 0x8000ffac, 0x00000010, 0x001f0000, | 1256 | 0xce, 0x74, 0x78, 0xe1, 0xdd, 0x30, 0x9a, 0x33, 0x78, 0xdb, 0xec, 0xe7, |
2189 | 0x00000000, 0x031e0000, 0x00000000, 0x83850800, 0x00000009, 0x076000ff, | 1257 | 0x48, 0x27, 0xe9, 0x5f, 0x1d, 0xc0, 0x31, 0x2c, 0x38, 0x9e, 0x50, 0x7f, |
2190 | 0x0000000f, 0x0f0e0007, 0x00000000, 0x0c000000, 0x00000000, 0x0a7d0000, | 1258 | 0x9f, 0xf7, 0xc6, 0x0f, 0x6f, 0x5e, 0x8c, 0xff, 0x19, 0xcc, 0xe3, 0x87, |
2191 | 0x00000000, 0x0afe0000, 0x00000000, 0x0b7f0000, 0x00000000, 0x0d7a0000, | 1259 | 0xe5, 0x5d, 0xdd, 0x18, 0x03, 0xfd, 0x2e, 0x62, 0xec, 0x46, 0x5e, 0xdf, |
2192 | 0x00000000, 0x0bfc0000, 0x00000000, 0x0c970e00, 0x00000008, 0x0f800003, | 1260 | 0xc3, 0xe7, 0xb5, 0x4a, 0xf5, 0xf2, 0xbb, 0xc3, 0x52, 0x0d, 0x6b, 0xc9, |
2193 | 0x0000000f, 0x47670010, 0x00000008, 0x070e0001, 0x0000000b, 0xc38000ff, | 1261 | 0xee, 0x94, 0xae, 0x7f, 0xc8, 0x77, 0x27, 0xee, 0xbd, 0xb7, 0x75, 0x0d, |
2194 | 0x00000002, 0x43870000, 0x00000001, 0x33e70e00, 0x0000000f, 0x038e0010, | 1262 | 0x4c, 0xc4, 0x69, 0x58, 0x31, 0x33, 0xc1, 0x82, 0xde, 0xf8, 0xe2, 0x4b, |
2195 | 0x00000002, 0x33e70e00, 0x00000000, 0x39840000, 0x00000003, 0xb9720800, | 1263 | 0x5e, 0x7e, 0xaf, 0xbf, 0x18, 0xf3, 0x65, 0xf7, 0x91, 0x9c, 0x88, 0xda, |
2196 | 0x00000000, 0x28f30000, 0x0000000f, 0x65680010, 0x00000010, 0x009f0000, | 1264 | 0x8b, 0xba, 0xfb, 0xee, 0x1e, 0xd0, 0xb7, 0xd5, 0xbd, 0xd8, 0x3f, 0x73, |
2197 | 0x00000000, 0x02043600, 0x00000010, 0x91840a02, 0x00000002, 0x21421800, | 1265 | 0x3b, 0xd7, 0x51, 0xab, 0x4c, 0xf2, 0x2b, 0x0d, 0x5c, 0xd3, 0xa8, 0xc3, |
2198 | 0x00000008, 0x22000007, 0x00000000, 0x231b0000, 0x00000000, 0x23ff0000, | 1266 | 0x13, 0x13, 0xaa, 0x04, 0xf7, 0x9a, 0x79, 0x07, 0xab, 0x1a, 0xd1, 0x8b, |
2199 | 0x00000000, 0x241b0000, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010, | 1267 | 0xfa, 0x68, 0x17, 0xde, 0xc1, 0x44, 0x8b, 0x83, 0x7d, 0x9f, 0x55, 0xe8, |
2200 | 0x00000009, 0x2607ffff, 0x00000000, 0x27110000, 0x00000000, 0x26900000, | 1268 | 0xaf, 0x08, 0x8f, 0xf7, 0x5d, 0x1c, 0xd3, 0xe1, 0x60, 0x5d, 0xf2, 0xfa, |
2201 | 0x0000000c, 0x29000000, 0x00000018, 0x80000145, 0x00000003, 0xf4683600, | 1269 | 0x15, 0x93, 0x73, 0xfd, 0xab, 0xfb, 0x6e, 0xee, 0xe1, 0x7e, 0x2a, 0x19, |
2202 | 0x00000000, 0x3a100000, 0x00000000, 0x3a910000, 0x00000003, 0xf66c2400, | 1270 | 0xac, 0xcb, 0x01, 0xf9, 0xfb, 0x24, 0x7e, 0x49, 0x89, 0x5f, 0x54, 0xc7, |
2203 | 0x00000010, 0x001f0000, 0x00000010, 0xb1923604, 0x00000008, 0x0f800004, | 1271 | 0x0f, 0xef, 0xed, 0x4f, 0x7d, 0xef, 0x7a, 0xaa, 0x1b, 0xde, 0xbc, 0xfb, |
2204 | 0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000000, 0x3e170000, | 1272 | 0xfc, 0x4f, 0x63, 0xd7, 0xf6, 0x98, 0xb7, 0x0e, 0x57, 0xbb, 0xe7, 0xae, |
2205 | 0x00000000, 0x3e940000, 0x00000000, 0x3f150000, 0x00000000, 0x3f960000, | 1273 | 0x43, 0xde, 0x8b, 0x5d, 0x87, 0x30, 0xce, 0x73, 0xbf, 0xbc, 0x38, 0xd3, |
2206 | 0x00000010, 0x001f0000, 0x00000000, 0x0f060000, 0x00000010, 0x20530000, | 1274 | 0x21, 0x79, 0x74, 0x57, 0x44, 0xf2, 0x41, 0xec, 0xfb, 0x22, 0x62, 0xee, |
2207 | 0x00000000, 0x22c53600, 0x00000018, 0x8000ff73, 0x00000010, 0x0ce70005, | 1275 | 0x1b, 0x8c, 0xbf, 0x92, 0xfb, 0xee, 0x97, 0x2a, 0xf4, 0xd9, 0x17, 0x87, |
2208 | 0x00000008, 0x2c80000c, 0x00000008, 0x2d000070, 0x00000008, 0x2d800010, | 1276 | 0xcc, 0xfb, 0xc4, 0xbc, 0x57, 0xb0, 0xbe, 0x3e, 0xae, 0x04, 0x67, 0xbe, |
2209 | 0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000018, 0x8000011d, | 1277 | 0xff, 0xb5, 0x3f, 0x9c, 0xaf, 0x99, 0x8e, 0x61, 0x1f, 0x5e, 0x2a, 0x16, |
2210 | 0x00000000, 0x2c1e0000, 0x00000008, 0x2c8000b8, 0x00000008, 0x2d000010, | 1278 | 0x78, 0xbf, 0xc4, 0xe5, 0xfb, 0x45, 0xbf, 0xe0, 0xe1, 0xf0, 0xf9, 0x29, |
2211 | 0x00000008, 0x2d800048, 0x00000000, 0x00000000, 0x00000010, 0x91de0000, | 1279 | 0xd5, 0xf6, 0x13, 0x4d, 0x65, 0x3a, 0x73, 0xb0, 0xa7, 0xd5, 0xed, 0x23, |
2212 | 0x00000018, 0x8000fe5d, 0x0000000c, 0x29800001, 0x00000000, 0x2a000000, | 1280 | 0xc1, 0x27, 0xd4, 0x79, 0x4b, 0xde, 0xc1, 0xf2, 0x5e, 0xd6, 0xef, 0x61, |
2213 | 0x00000010, 0x001f0000, 0x00000000, 0x0f008000, 0x00000008, 0x0f800007, | 1281 | 0xf4, 0x73, 0xad, 0x79, 0x8c, 0xc7, 0xd0, 0xb7, 0x39, 0xbf, 0xca, 0xbd, |
2214 | 0x00000018, 0x80000006, 0x0000000c, 0x29800001, 0x00000000, 0x2a000000, | 1282 | 0xb5, 0x75, 0x9b, 0xe9, 0x4b, 0xa7, 0xde, 0x67, 0xee, 0xb9, 0xb6, 0x6a, |
2215 | 0x00000010, 0x001f0000, 0x0000000f, 0x0f470007, 0x00000008, 0x0f800008, | 1283 | 0xd0, 0x16, 0xee, 0x5b, 0x1f, 0xb2, 0xf3, 0x92, 0x1f, 0x85, 0x77, 0x89, |
2216 | 0x00000018, 0x80000119, 0x00000010, 0x20530000, 0x00000018, 0x8000fe4f, | 1284 | 0xff, 0x3d, 0x62, 0xfa, 0x85, 0x73, 0xc5, 0xb8, 0x67, 0xf3, 0xbd, 0x34, |
2217 | 0x0000000c, 0x29800001, 0x00000010, 0x91de0000, 0x00000000, 0x2fd50000, | 1285 | 0xa1, 0xdf, 0x23, 0x09, 0x6f, 0x9e, 0x25, 0x32, 0x65, 0x82, 0xfb, 0xec, |
2218 | 0x00000000, 0x2a000000, 0x00000009, 0x0261ffff, 0x0000000d, 0x70e10001, | 1286 | 0x9b, 0x40, 0xf7, 0xdc, 0x84, 0xbe, 0xbc, 0xb5, 0x4b, 0x70, 0xb8, 0x91, |
2219 | 0x00000018, 0x80000101, 0x00000000, 0x2c400000, 0x00000008, 0x2c8000c4, | 1287 | 0x71, 0x5b, 0x3e, 0x9a, 0x0b, 0x7e, 0x67, 0x21, 0x5c, 0x7f, 0x73, 0xfb, |
2220 | 0x00000008, 0x2d00001c, 0x00000008, 0x2d800001, 0x00000005, 0x70e10800, | 1288 | 0xd1, 0x73, 0x6c, 0xd7, 0xbc, 0x81, 0x3c, 0xf3, 0xcd, 0x55, 0xb3, 0xf8, |
2221 | 0x00000010, 0x91de0000, 0x00000018, 0x8000fe41, 0x0000000c, 0x29800001, | 1289 | 0xfc, 0xa6, 0x9d, 0x51, 0xd8, 0x99, 0xe9, 0x17, 0xbf, 0xda, 0x6f, 0x01, |
2222 | 0x00000010, 0x91de0000, 0x00000000, 0x2fd50000, 0x00000010, 0x001f0000, | 1290 | 0xed, 0x92, 0x3a, 0x73, 0xd2, 0x7d, 0x97, 0xc3, 0x4e, 0x53, 0x4f, 0x26, |
2223 | 0x00000000, 0x02700000, 0x00000000, 0x0d620000, 0x00000000, 0xbb630800, | 1291 | 0xbf, 0x13, 0x30, 0x9e, 0x5b, 0xc7, 0x63, 0xd5, 0xbc, 0x95, 0xe4, 0x97, |
2224 | 0x00000000, 0x2a000000, 0x00000000, 0x0f400000, 0x00000000, 0x2c400000, | 1292 | 0x4c, 0x7a, 0xcf, 0x16, 0xe2, 0x6e, 0xf2, 0xc1, 0xe4, 0x8f, 0xf7, 0x1d, |
2225 | 0x0000000c, 0x73e7001b, 0x00000010, 0x0ce7000e, 0x00000000, 0x286d0000, | 1293 | 0x7b, 0x9b, 0xa7, 0x5e, 0xfa, 0xe3, 0xef, 0x70, 0xbe, 0x84, 0x65, 0x3d, |
2226 | 0x0000000f, 0x65ed0010, 0x00000009, 0x266dffff, 0x00000018, 0x80000069, | 1294 | 0x96, 0xe9, 0xef, 0xbb, 0x3c, 0x3e, 0x6f, 0x01, 0x9f, 0x8c, 0xd8, 0x6d, |
2227 | 0x00000008, 0x02000004, 0x00000010, 0x91c40803, 0x00000018, 0x800000f6, | 1295 | 0xb7, 0xf0, 0x3b, 0x74, 0x96, 0xda, 0x25, 0xf1, 0x39, 0x57, 0x2d, 0x75, |
2228 | 0x00000010, 0x20530000, 0x00000018, 0x800000e5, 0x00000008, 0x2c8000b8, | 1296 | 0x50, 0xec, 0xfb, 0x49, 0xfa, 0x1f, 0xc4, 0x31, 0x6e, 0x6f, 0xc9, 0x49, |
2229 | 0x00000008, 0x2d000010, 0x00000008, 0x2d800048, 0x00000018, 0x80000005, | 1297 | 0xdc, 0x24, 0x8f, 0x9e, 0x16, 0xbf, 0x7f, 0x84, 0xdf, 0xb6, 0xf1, 0xbb, |
2230 | 0x00000008, 0x2c8000c4, 0x00000008, 0x2d00001c, 0x00000008, 0x2d800001, | 1298 | 0xc5, 0xf5, 0xdb, 0xd4, 0x59, 0xaf, 0x9c, 0x99, 0x3a, 0x1f, 0xb8, 0x5e, |
2231 | 0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800048, | 1299 | 0xdb, 0x27, 0xf9, 0xdd, 0x53, 0x24, 0xe7, 0xa1, 0x42, 0xbe, 0x3b, 0x38, |
2232 | 0x00000008, 0x2d000068, 0x00000008, 0x2d800104, 0x00000000, 0x00000000, | 1300 | 0xe2, 0x4f, 0x89, 0x6a, 0x5a, 0xee, 0xdd, 0x57, 0x2c, 0xfb, 0x92, 0x7a, |
2233 | 0x00000010, 0x91de0000, 0x00000000, 0x27f60000, 0x00000010, 0xb87a9e04, | 1301 | 0x1f, 0xe6, 0x71, 0xfe, 0xec, 0x29, 0xf0, 0x34, 0xdf, 0x11, 0x8c, 0xdc, |
2234 | 0x00000008, 0x2200000d, 0x00000018, 0x800000e2, 0x00000010, 0x20530000, | 1302 | 0xe0, 0x39, 0xf2, 0xe2, 0xc7, 0x37, 0x13, 0xff, 0x50, 0x07, 0x74, 0x9c, |
2235 | 0x00000018, 0x8000fe18, 0x0000000c, 0x29800001, 0x00000010, 0x91de0000, | 1303 | 0x6a, 0xcd, 0xf7, 0x07, 0xcc, 0xe3, 0xfc, 0x26, 0xf7, 0xb7, 0xa1, 0xaf, |
2236 | 0x00000000, 0x2fd50000, 0x00000010, 0x001f0000, 0x00000000, 0x02700000, | 1304 | 0xdc, 0xdf, 0x76, 0x48, 0xfa, 0x08, 0xc1, 0xe5, 0x81, 0x21, 0xb2, 0x43, |
2237 | 0x00000000, 0x0d620000, 0x00000000, 0xbb630800, 0x00000000, 0x2a000000, | 1305 | 0xc7, 0xae, 0xd2, 0x7f, 0xfe, 0x61, 0x47, 0x54, 0xec, 0x28, 0xf7, 0xd8, |
2238 | 0x00000010, 0x0e670011, 0x00000000, 0x286d0000, 0x0000000f, 0x65ed0010, | 1306 | 0x11, 0xd0, 0x7b, 0x1d, 0xcd, 0xaf, 0x50, 0x5f, 0x73, 0x1e, 0x2e, 0x57, |
2239 | 0x00000009, 0x266dffff, 0x00000004, 0xb8f1a000, 0x00000000, 0x0f400000, | 1307 | 0xeb, 0x29, 0x47, 0xf4, 0xbd, 0xb0, 0xae, 0x88, 0xc6, 0xcb, 0xd4, 0xab, |
2240 | 0x0000000c, 0x73e7001c, 0x00000018, 0x80000040, 0x00000008, 0x02000004, | 1308 | 0xf0, 0xb7, 0x37, 0x59, 0x84, 0x3a, 0x96, 0xdc, 0x49, 0xf3, 0x35, 0xea, |
2241 | 0x00000010, 0x91c40802, 0x00000018, 0x800000cd, 0x00000000, 0x2c1e0000, | 1309 | 0xd5, 0x3e, 0x0e, 0xc4, 0x2b, 0xea, 0x18, 0xea, 0x73, 0xe3, 0x41, 0xb6, |
2242 | 0x00000008, 0x2c8000b8, 0x00000008, 0x2d000010, 0x00000008, 0x2d800048, | 1310 | 0x47, 0x1d, 0x1f, 0x34, 0xf5, 0x7a, 0xca, 0xef, 0x98, 0xbd, 0xeb, 0xa4, |
2243 | 0x00000010, 0x20530000, 0x00000010, 0x91de0000, 0x00000018, 0x8000fdfe, | 1311 | 0x5e, 0x9c, 0xc0, 0x77, 0x51, 0xfd, 0x5e, 0x23, 0xfe, 0xd9, 0xe6, 0x3d, |
2244 | 0x0000000c, 0x29800001, 0x00000000, 0x03550000, 0x00000000, 0x06460000, | 1312 | 0xb8, 0xfb, 0x98, 0xa1, 0x8b, 0x7c, 0xe3, 0xfd, 0x27, 0x96, 0x0a, 0xad, |
2245 | 0x00000000, 0x03d60000, 0x00000000, 0x2a000000, 0x0000000f, 0x0f480007, | 1313 | 0xf2, 0x8d, 0x07, 0xd6, 0x55, 0x09, 0xad, 0x36, 0xe3, 0xe9, 0xbe, 0x2b, |
2246 | 0x00000010, 0xb18c0027, 0x0000000f, 0x47420008, 0x00000009, 0x070e000f, | 1314 | 0x5e, 0x29, 0xf9, 0x62, 0xf7, 0x7b, 0xe2, 0xcf, 0x47, 0xe2, 0xcf, 0x59, |
2247 | 0x00000008, 0x070e0008, 0x00000010, 0x001f0000, 0x00000008, 0x09000001, | 1315 | 0xe0, 0x9f, 0xdc, 0x28, 0x78, 0x2c, 0x0a, 0xea, 0x17, 0xbb, 0xdc, 0x73, |
2248 | 0x00000007, 0x09121c00, 0x00000003, 0xcbca9200, 0x00000000, 0x0b97a200, | 1316 | 0x63, 0xd6, 0x11, 0x8f, 0x47, 0xd5, 0x5f, 0x3f, 0x97, 0x8f, 0x31, 0xd8, |
2249 | 0x00000007, 0x4b171c00, 0x0000000f, 0x0a960003, 0x00000000, 0x0a959c00, | 1317 | 0x17, 0x00, 0x00, 0x00 }; |
2250 | 0x00000000, 0x4a009a00, 0x00000008, 0x82120001, 0x00000001, 0x0c170800, | ||
2251 | 0x00000000, 0x02180000, 0x00000000, 0x0c971800, 0x00000008, 0x0d00ffff, | ||
2252 | 0x00000008, 0x0f800006, 0x0000000c, 0x29000000, 0x00000008, 0x22000001, | ||
2253 | 0x00000000, 0x22c50c00, 0x00000010, 0x009f0000, 0x00000010, 0xb197320b, | ||
2254 | 0x00000000, 0x231b0000, 0x00000000, 0x27110800, 0x00000000, 0x66900000, | ||
2255 | 0x00000018, 0x800000a4, 0x00000000, 0x02180000, 0x00000010, 0x20530000, | ||
2256 | 0x00000000, 0x22c53600, 0x00000010, 0x001f0000, 0x00000008, 0x0f800006, | ||
2257 | 0x00000018, 0x8000fff5, 0x00000010, 0x91870002, 0x00000008, 0x2200000a, | ||
2258 | 0x00000000, 0x231b0000, 0x00000000, 0x27110800, 0x00000000, 0x66900000, | ||
2259 | 0x00000018, 0x80000098, 0x00000008, 0x0200000a, 0x00000010, 0x91c40804, | ||
2260 | 0x00000010, 0x02c20003, 0x00000010, 0x001f0000, 0x00000008, 0x0f800008, | ||
2261 | 0x00000010, 0x20530000, 0x00000018, 0x8000fdc9, 0x00000000, 0x06820000, | ||
2262 | 0x00000010, 0x001f0000, 0x00000010, 0x0ce70028, 0x00000000, 0x03720000, | ||
2263 | 0x00000000, 0xa8760c00, 0x00000000, 0x0cf60000, 0x00000010, 0xb8723224, | ||
2264 | 0x00000000, 0x03440000, 0x00000008, 0x22000010, 0x00000000, 0x03ca0000, | ||
2265 | 0x0000000f, 0x65680010, 0x00000000, 0x0bcf0000, 0x00000000, 0x27f20000, | ||
2266 | 0x00000010, 0xb7ef3203, 0x0000000c, 0x21420004, 0x0000000c, 0x73e70019, | ||
2267 | 0x00000000, 0x07520000, 0x00000000, 0x29000000, 0x00000018, 0x8000007e, | ||
2268 | 0x00000004, 0xb9723200, 0x00000010, 0x20530000, 0x00000000, 0x22060000, | ||
2269 | 0x0000000c, 0x61420004, 0x00000000, 0x25070000, 0x00000000, 0x27970000, | ||
2270 | 0x00000000, 0x290e0000, 0x00000010, 0x0ce70010, 0x00000010, 0xb873320f, | ||
2271 | 0x0000000f, 0x436c0010, 0x00000000, 0x03f30c00, 0x00000000, 0x03f30000, | ||
2272 | 0x00000000, 0x83990e00, 0x00000001, 0x83860e00, 0x00000000, 0x83060e00, | ||
2273 | 0x00000003, 0xf66c0c00, 0x00000000, 0x39f30e00, 0x00000000, 0x3af50e00, | ||
2274 | 0x00000000, 0x7a740000, 0x0000000f, 0x43680010, 0x00000001, 0x83860e00, | ||
2275 | 0x00000000, 0x83060e00, 0x00000003, 0xf4680c00, 0x00000000, 0x286d0000, | ||
2276 | 0x00000000, 0x03690000, 0x00000010, 0xb1f60c54, 0x00000000, 0x0a6a0000, | ||
2277 | 0x00000000, 0x0aeb0000, 0x00000009, 0x0b6cffff, 0x00000000, 0x0c000000, | ||
2278 | 0x00000000, 0x0be90000, 0x00000003, 0x8cf6a000, 0x0000000c, 0x09800002, | ||
2279 | 0x00000010, 0x009f0000, 0x00000010, 0xb8173209, 0x00000000, 0x35140000, | ||
2280 | 0x00000000, 0x35950000, 0x00000005, 0x766c2c00, 0x00000000, 0x34970000, | ||
2281 | 0x00000004, 0xb8f12e00, 0x00000010, 0x001f0000, 0x00000008, 0x0f800004, | ||
2282 | 0x00000018, 0x8000fff7, 0x00000000, 0x03e90000, 0x00000010, 0xb8f6a01a, | ||
2283 | 0x00000010, 0x20130019, 0x00000010, 0xb1f10e18, 0x00000000, 0x83973200, | ||
2284 | 0x00000000, 0x38700e00, 0x00000000, 0xbb760e00, 0x00000000, 0x37d00000, | ||
2285 | 0x0000000c, 0x73e7001a, 0x00000003, 0xb8f1a000, 0x00000000, 0x32140000, | ||
2286 | 0x00000000, 0x32950000, 0x00000005, 0x73e72c00, 0x00000000, 0x33190000, | ||
2287 | 0x00000005, 0x74680000, 0x00000010, 0x0ce7000d, 0x00000008, 0x22000009, | ||
2288 | 0x00000000, 0x07520000, 0x00000000, 0x29000000, 0x0000000c, 0x73e70019, | ||
2289 | 0x0000000f, 0x65680010, 0x0000000c, 0x21420004, 0x00000018, 0x8000003c, | ||
2290 | 0x00000010, 0x20530000, 0x0000000c, 0x61420004, 0x00000000, 0x290e0000, | ||
2291 | 0x00000018, 0x80000002, 0x00000010, 0x91973206, 0x00000000, 0x35140000, | ||
2292 | 0x00000000, 0x35950000, 0x00000005, 0x766c2c00, 0x00000000, 0x34990000, | ||
2293 | 0x00000004, 0xb8f13200, 0x00000000, 0x83690c00, 0x00000010, 0xb1860013, | ||
2294 | 0x00000000, 0x28e90000, 0x00000008, 0x22000004, 0x00000000, 0x23ec0000, | ||
2295 | 0x00000000, 0x03690000, 0x00000010, 0xb8660c07, 0x00000009, 0x036cffff, | ||
2296 | 0x00000000, 0x326a0000, 0x00000000, 0x32eb0000, 0x00000005, 0x73e70c00, | ||
2297 | 0x00000000, 0x33690000, 0x00000005, 0x74680000, 0x0000000c, 0x73e7001c, | ||
2298 | 0x00000000, 0x03690000, 0x00000010, 0xb1f60c12, 0x00000010, 0xb1d00c11, | ||
2299 | 0x0000000c, 0x21420005, 0x0000000c, 0x33e7001c, 0x00000018, 0x8000000e, | ||
2300 | 0x00000010, 0x2e67000d, 0x00000000, 0x03690000, 0x00000010, 0xb1f60c0b, | ||
2301 | 0x00000010, 0xb1d00c0a, 0x00000000, 0x03440000, 0x00000008, 0x2200000c, | ||
2302 | 0x00000000, 0x07520000, 0x00000000, 0x29000000, 0x00000018, 0x80000015, | ||
2303 | 0x0000000c, 0x33e7001c, 0x00000010, 0x20530000, 0x00000000, 0x22060000, | ||
2304 | 0x00000000, 0x290e0000, 0x00000018, 0x000d0000, 0x00000000, 0x06820000, | ||
2305 | 0x00000010, 0x2de7000d, 0x00000010, 0x0ce7000c, 0x00000000, 0x27f20000, | ||
2306 | 0x00000010, 0xb96d9e0a, 0x00000000, 0xa86d9e00, 0x00000009, 0x0361ffff, | ||
2307 | 0x00000010, 0xb7500c07, 0x00000008, 0x2200000f, 0x0000000f, 0x65680010, | ||
2308 | 0x00000000, 0x29000000, 0x00000018, 0x80000004, 0x0000000c, 0x33e7001b, | ||
2309 | 0x00000010, 0x20530000, 0x00000018, 0x000d0000, 0x00000000, 0x2b820000, | ||
2310 | 0x00000010, 0x20d2002f, 0x00000010, 0x0052002e, 0x00000009, 0x054e0007, | ||
2311 | 0x00000010, 0xb18a002c, 0x00000000, 0x050a8c00, 0x00000008, 0x850a0008, | ||
2312 | 0x00000010, 0x918a0029, 0x00000003, 0xc5008800, 0x00000008, 0xa3460001, | ||
2313 | 0x00000010, 0xb1c60007, 0x00000008, 0x22000001, 0x0000000c, 0x29800000, | ||
2314 | 0x00000010, 0x20530000, 0x00000000, 0x274e8c00, 0x00000000, 0x66cd0000, | ||
2315 | 0x00000000, 0x22c58c00, 0x00000008, 0x22000014, 0x00000003, 0x22c58e00, | ||
2316 | 0x00000003, 0x23c58e00, 0x00000003, 0x22c58e00, 0x00000003, 0x26cd9e00, | ||
2317 | 0x00000003, 0x27cd9e00, 0x00000003, 0x26cd9e00, 0x00000003, 0x274ea000, | ||
2318 | 0x00000003, 0x284ea000, 0x00000003, 0x274ea000, 0x0000000c, 0x69520000, | ||
2319 | 0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x00000003, 0x22c58e00, | ||
2320 | 0x00000003, 0x23c58e00, 0x00000003, 0x22c58e00, 0x00000003, 0x26cd9e00, | ||
2321 | 0x00000003, 0x27cd9e00, 0x00000003, 0x26cd9e00, 0x00000003, 0x274ea000, | ||
2322 | 0x00000003, 0x284ea000, 0x00000003, 0x274ea000, 0x00000000, 0xa2c58c00, | ||
2323 | 0x00000000, 0xa74e8c00, 0x00000000, 0xe6cd0000, 0x0000000f, 0x620a0010, | ||
2324 | 0x00000008, 0x23460001, 0x0000000c, 0x29800000, 0x00000010, 0x20530000, | ||
2325 | 0x0000000c, 0x29520000, 0x00000018, 0x80000002, 0x0000000c, 0x29800000, | ||
2326 | 0x00000018, 0x00570000 }; | ||
2327 | 1318 | ||
2328 | static const int bnx2_TPAT_b06FwReleaseMajor = 0x1; | 1319 | static const int bnx2_TPAT_b06FwReleaseMajor = 0x1; |
2329 | static const int bnx2_TPAT_b06FwReleaseMinor = 0x0; | 1320 | static const int bnx2_TPAT_b06FwReleaseMinor = 0x0; |
@@ -2339,201 +1330,199 @@ static const u32 bnx2_TPAT_b06FwBssAddr = 0x08001aa0; | |||
2339 | static const int bnx2_TPAT_b06FwBssLen = 0x250; | 1330 | static const int bnx2_TPAT_b06FwBssLen = 0x250; |
2340 | static const u32 bnx2_TPAT_b06FwSbssAddr = 0x08001a60; | 1331 | static const u32 bnx2_TPAT_b06FwSbssAddr = 0x08001a60; |
2341 | static const int bnx2_TPAT_b06FwSbssLen = 0x34; | 1332 | static const int bnx2_TPAT_b06FwSbssLen = 0x34; |
2342 | static u32 bnx2_TPAT_b06FwText[(0x122c/4) + 1] = { | 1333 | static u8 bnx2_TPAT_b06FwText[] = { |
2343 | 0x0a000218, 0x00000000, 0x00000000, 0x0000000d, 0x74706174, 0x20322e35, | 1334 | 0x1f, 0x8b, 0x08, 0x08, 0x47, 0xd2, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65, |
2344 | 0x2e313100, 0x02050b01, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1335 | 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xc5, 0x57, 0x4d, 0x68, |
2345 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1336 | 0x1c, 0xe7, 0x19, 0x7e, 0xe7, 0x77, 0x47, 0x62, 0x25, 0x8d, 0x93, 0x3d, |
2346 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1337 | 0xac, 0x5d, 0xa5, 0x99, 0x91, 0x46, 0x3f, 0x54, 0x26, 0x9e, 0x84, 0xa5, |
2347 | 0x00000000, 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c020800, | 1338 | 0x56, 0x61, 0x20, 0xe3, 0x99, 0x95, 0x2c, 0x0c, 0x05, 0x07, 0x42, 0x08, |
2348 | 0x24421a60, 0x3c030800, 0x24631cf0, 0xac400000, 0x0043202b, 0x1480fffd, | 1339 | 0xe4, 0xb2, 0x1d, 0x49, 0x36, 0x85, 0x1e, 0x5a, 0x9a, 0x43, 0xa0, 0x05, |
2349 | 0x24420004, 0x3c1d0800, 0x37bd2ffc, 0x03a0f021, 0x3c100800, 0x26100860, | 1340 | 0x0f, 0x33, 0xeb, 0x34, 0x87, 0xc5, 0xdb, 0xaa, 0xc5, 0xbe, 0x94, 0xd6, |
2350 | 0x3c1c0800, 0x279c1a60, 0x0e000546, 0x00000000, 0x0000000d, 0x8f820010, | 1341 | 0x95, 0xea, 0xe8, 0xb2, 0x68, 0xe2, 0x53, 0x0f, 0xc5, 0xd8, 0xb4, 0x54, |
2351 | 0x8c450008, 0x24030800, 0xaf430178, 0x97430104, 0x3c020008, 0xaf420140, | 1342 | 0xd0, 0x53, 0x7b, 0x0a, 0x85, 0x5c, 0x4c, 0x69, 0x20, 0x85, 0x12, 0x44, |
2352 | 0x8f820024, 0x30420001, 0x10400007, 0x3069ffff, 0x24020002, 0x2523fffe, | 1343 | 0x0f, 0x21, 0xd4, 0xad, 0xa7, 0xcf, 0xfb, 0xcd, 0x8c, 0xbc, 0xbb, 0x95, |
2353 | 0xa7420146, 0xa7430148, 0x0a000242, 0x3c020800, 0xa7400146, 0x3c020800, | 1344 | 0x5b, 0x1f, 0x02, 0x15, 0xac, 0x66, 0xe6, 0xfb, 0xde, 0xf7, 0xfb, 0x79, |
2354 | 0x8c43083c, 0x1460000e, 0x24020f00, 0x8f820024, 0x30430020, 0x0003182b, | 1345 | 0x9f, 0xe7, 0x79, 0xbf, 0xf7, 0x6b, 0xca, 0x34, 0x49, 0xe5, 0xdf, 0x14, |
2355 | 0x00031823, 0x30650009, 0x30420c00, 0x24030400, 0x14430002, 0x34a40001, | 1346 | 0x7e, 0x6f, 0x7f, 0xe3, 0xdb, 0x6f, 0x7f, 0xf5, 0xa5, 0x57, 0x2c, 0xa2, |
2356 | 0x34a40005, 0xa744014a, 0x0a000264, 0x3c020800, 0x8f830014, 0x14620008, | 1347 | 0x57, 0x5e, 0x92, 0x64, 0x5d, 0xa6, 0x2f, 0xe0, 0x4f, 0x21, 0x32, 0xab, |
2357 | 0x00000000, 0x8f820024, 0x30420020, 0x0002102b, 0x00021023, 0x3042000d, | 1348 | 0xf1, 0xf9, 0x47, 0x86, 0xec, 0x75, 0xce, 0x04, 0x0e, 0x19, 0x8a, 0x77, |
2358 | 0x0a000262, 0x34420005, 0x8f820024, 0x30420020, 0x0002102b, 0x00021023, | 1349 | 0x34, 0xbb, 0xe9, 0x10, 0xf9, 0x83, 0x15, 0x2b, 0xa4, 0x7f, 0xe5, 0x71, |
2359 | 0x30420009, 0x34420001, 0xa742014a, 0x3c020800, 0x8c430820, 0x8f840024, | 1350 | 0x43, 0x25, 0x6e, 0x7f, 0xc1, 0xfb, 0xe7, 0xb9, 0x7b, 0xe7, 0xed, 0xa3, |
2360 | 0x3c020048, 0x00621825, 0x30840006, 0x24020002, 0x1082000d, 0x2c820003, | 1351 | 0xdb, 0x0a, 0x19, 0xa6, 0xd7, 0x31, 0xcc, 0x45, 0x32, 0x66, 0xe1, 0xf3, |
2361 | 0x50400005, 0x24020004, 0x10800012, 0x3c020001, 0x0a000284, 0x00000000, | 1352 | 0xd3, 0xa5, 0x75, 0x8d, 0xa6, 0xab, 0xb1, 0x4c, 0x4a, 0xfa, 0x06, 0xad, |
2362 | 0x10820007, 0x24020006, 0x1482000f, 0x3c020111, 0x0a00027c, 0x00621025, | 1353 | 0xf5, 0x30, 0x8e, 0xf3, 0x8e, 0x14, 0x66, 0xaa, 0x14, 0xde, 0x32, 0x48, |
2363 | 0x0a00027b, 0x3c020101, 0x3c020011, 0x00621025, 0x24030001, 0xaf421000, | 1354 | 0xf6, 0x7c, 0x29, 0xc8, 0x1c, 0xf4, 0x49, 0x14, 0xb8, 0x35, 0xf2, 0xcd, |
2364 | 0xaf830020, 0x0a000284, 0x00000000, 0x00621025, 0xaf421000, 0xaf800020, | 1355 | 0x3c, 0xff, 0xa6, 0x2b, 0x93, 0xec, 0x3c, 0xce, 0xe7, 0x17, 0xd6, 0xa5, |
2365 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8f830020, 0x1060003f, | 1356 | 0x60, 0x7f, 0x43, 0x0a, 0xf7, 0x03, 0xde, 0x37, 0xd6, 0xb1, 0x2e, 0xf9, |
2366 | 0x3c048000, 0x8f421000, 0x00441024, 0x1040fffd, 0x00000000, 0x10600039, | 1357 | 0xfb, 0xfc, 0xf4, 0x8c, 0xb0, 0x37, 0x4d, 0x9d, 0x06, 0xcd, 0xc8, 0x0e, |
2367 | 0x00000000, 0x8f421000, 0x3c030020, 0x00431024, 0x10400034, 0x00000000, | 1358 | 0xfb, 0x5a, 0x14, 0xba, 0x2b, 0x4d, 0x85, 0xe6, 0xf1, 0x9b, 0xa0, 0x6d, |
2368 | 0x97421014, 0x14400031, 0x00000000, 0x97421008, 0x8f840010, 0x24420006, | 1359 | 0x97, 0xea, 0x81, 0x4b, 0xaa, 0xe2, 0xc8, 0x14, 0x36, 0x24, 0xfa, 0x65, |
2369 | 0x00024082, 0x00081880, 0x00643821, 0x8ce50000, 0x30430003, 0x30420001, | 1360 | 0x4b, 0xc3, 0xef, 0x92, 0xd4, 0xde, 0xdf, 0x2a, 0xc7, 0x69, 0x50, 0x8a, |
2370 | 0x10400004, 0x00000000, 0x0000000d, 0x0a0002c3, 0x00081080, 0x5460000f, | 1361 | 0xb5, 0x44, 0x0d, 0x5e, 0x5b, 0xe1, 0x1f, 0xb8, 0x2b, 0xa6, 0x4c, 0xf3, |
2371 | 0x30a5ffff, 0x3c06ffff, 0x00a62824, 0x0005182b, 0x00a61026, 0x0002102b, | 1362 | 0xf8, 0x4d, 0xe1, 0x3d, 0x82, 0x9d, 0x46, 0x41, 0x6b, 0xbc, 0x6f, 0x02, |
2372 | 0x00621824, 0x10600004, 0x00000000, 0x0000000d, 0x00000000, 0x240001fb, | 1363 | 0xef, 0x58, 0x27, 0xc6, 0x0a, 0xc4, 0x3a, 0x2c, 0xac, 0xc3, 0xa1, 0x6e, |
2373 | 0x8ce20000, 0x0a0002c2, 0x00462825, 0x0005182b, 0x38a2ffff, 0x0002102b, | 1364 | 0x7f, 0x03, 0xfb, 0x58, 0x68, 0x46, 0xa4, 0x53, 0x57, 0xac, 0x7d, 0x8a, |
2374 | 0x00621824, 0x10600004, 0x00000000, 0x0000000d, 0x00000000, 0x24000205, | 1365 | 0x12, 0x53, 0xa1, 0xe4, 0xac, 0x46, 0xfe, 0x65, 0x15, 0xdf, 0xcf, 0x51, |
2375 | 0x8ce20000, 0x3445ffff, 0x00081080, 0x00441021, 0x3c030800, 0xac450000, | 1366 | 0x6c, 0x4a, 0xb0, 0xe9, 0x96, 0xf8, 0xd5, 0xd0, 0xaf, 0xa3, 0x7d, 0x86, |
2376 | 0x8c620830, 0x24420001, 0xac620830, 0x8f840018, 0x01202821, 0x24820008, | 1367 | 0x92, 0xc6, 0x29, 0x49, 0xf6, 0xbe, 0x8f, 0xf6, 0x05, 0x33, 0xa2, 0xef, |
2377 | 0x30421fff, 0x24434000, 0x0343d821, 0x30a30007, 0xaf84000c, 0xaf820018, | 1368 | 0xe1, 0x29, 0xe1, 0xfb, 0x14, 0x8f, 0x87, 0x6f, 0x89, 0x14, 0x87, 0xcc, |
2378 | 0xaf420084, 0x10600002, 0x24a20007, 0x3045fff8, 0x8f820030, 0x8f840000, | 1369 | 0x20, 0xb3, 0x28, 0xcd, 0x2a, 0x5f, 0x6e, 0x2f, 0xda, 0xe2, 0x6c, 0x1c, |
2379 | 0x00451821, 0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023, | 1370 | 0x3b, 0xd8, 0xf5, 0x5f, 0xa5, 0x8e, 0x49, 0xb1, 0xea, 0xc1, 0xa6, 0xef, |
2380 | 0xaf820030, 0x8f840030, 0x34028000, 0x00821021, 0x03421821, 0x3c021000, | 1371 | 0x98, 0x6d, 0xe0, 0xe4, 0x0b, 0x3c, 0xbf, 0xc6, 0xed, 0xfc, 0x87, 0x76, |
2381 | 0xaf830010, 0xaf440080, 0x03e00008, 0xaf420178, 0x8f830024, 0x27bdffe0, | 1372 | 0x8b, 0x14, 0xcf, 0x31, 0x43, 0x6a, 0x51, 0xd1, 0xd7, 0x30, 0x83, 0x5b, |
2382 | 0xafbf0018, 0xafb10014, 0x30620200, 0x14400004, 0xafb00010, 0x0000000d, | 1373 | 0x2f, 0x93, 0x2f, 0xe2, 0x61, 0xe0, 0xdd, 0xc4, 0x9e, 0x74, 0x60, 0x9b, |
2383 | 0x00000000, 0x24000242, 0x00031a82, 0x30630003, 0x000310c0, 0x00431021, | 1374 | 0xf8, 0x32, 0xc5, 0x4d, 0x83, 0xec, 0xd5, 0x2d, 0xf4, 0x7c, 0xdc, 0x53, |
2384 | 0x00021080, 0x00431021, 0x00021080, 0x3c030800, 0x24631aa0, 0x00438821, | 1375 | 0x10, 0x67, 0xc6, 0x49, 0x2d, 0xfd, 0x18, 0xd7, 0xdf, 0x62, 0x5d, 0xb1, |
2385 | 0x8e240000, 0x10800004, 0x00000000, 0x0000000d, 0x00000000, 0x2400024d, | 1376 | 0x69, 0xd0, 0x0c, 0x75, 0x5e, 0xcf, 0xf3, 0x3b, 0x6e, 0x9e, 0xeb, 0x9e, |
2386 | 0x8f850010, 0x24020001, 0xae220000, 0x8ca70008, 0xa2200007, 0x8f620004, | 1377 | 0xb3, 0xfc, 0x3e, 0xad, 0x34, 0x35, 0x5a, 0x34, 0xf1, 0x44, 0xdc, 0x1c, |
2387 | 0x26300014, 0x02002021, 0x00021402, 0xa2220004, 0x304600ff, 0x24c60005, | 1378 | 0xc4, 0x46, 0x2d, 0xe7, 0x9f, 0x2a, 0xd7, 0xfa, 0x48, 0x42, 0xe8, 0xe9, |
2388 | 0x0e000673, 0x00063082, 0x8f620004, 0xa6220008, 0x8f430108, 0x3c021000, | 1379 | 0xcf, 0xbd, 0xdf, 0xf0, 0xde, 0x97, 0xd7, 0x85, 0x7d, 0x9e, 0xef, 0xae, |
2389 | 0x00621824, 0x10600008, 0x00000000, 0x97420104, 0x92230007, 0x2442ffec, | 1380 | 0x3e, 0xcd, 0x5e, 0x93, 0x0b, 0xfb, 0x3c, 0x5f, 0x6b, 0xf1, 0x7c, 0x36, |
2390 | 0x3045ffff, 0x34630002, 0x0a000321, 0xa2230007, 0x97420104, 0x2442fff0, | 1381 | 0xf6, 0xc6, 0x9c, 0x24, 0x5a, 0x1b, 0xb8, 0x46, 0xd4, 0xc3, 0xba, 0x1c, |
2391 | 0x3045ffff, 0x8f620004, 0x3042ffff, 0x2c420013, 0x54400005, 0x92230007, | 1382 | 0x3c, 0x07, 0x4d, 0xac, 0xdd, 0x5e, 0xb6, 0x24, 0x83, 0x12, 0x27, 0x7f, |
2392 | 0x92220007, 0x34420001, 0xa2220007, 0x92230007, 0x24020001, 0x10620009, | 1383 | 0x11, 0x3c, 0xf0, 0x43, 0xc7, 0xfe, 0x53, 0xa8, 0xd4, 0x68, 0xcf, 0xad, |
2393 | 0x28620002, 0x14400014, 0x24020002, 0x10620012, 0x24020003, 0x1062000a, | 1384 | 0x53, 0x37, 0x6b, 0x52, 0x92, 0x75, 0x29, 0xc8, 0x64, 0x8c, 0x5f, 0xa3, |
2394 | 0x00000000, 0x0a000342, 0x00000000, 0x8f820010, 0x8c43000c, 0x3c04ffff, | 1385 | 0x5d, 0xe7, 0xf3, 0x7c, 0xcd, 0x75, 0x81, 0x33, 0xb1, 0x5f, 0x73, 0x8d, |
2395 | 0x00641824, 0x00651825, 0x0a000342, 0xac43000c, 0x8f820010, 0x8c430010, | 1386 | 0x66, 0xd1, 0xbf, 0x62, 0x6e, 0x91, 0x8b, 0x98, 0xcb, 0x88, 0xc9, 0xbc, |
2396 | 0x3c04ffff, 0x00641824, 0x00651825, 0xac430010, 0x8f620004, 0x3042ffff, | 1387 | 0x78, 0x4f, 0x32, 0x17, 0xfd, 0x14, 0xcb, 0x2d, 0xdb, 0x4c, 0xc8, 0x6e, |
2397 | 0x24420002, 0x00021083, 0xa2220005, 0x304500ff, 0x8f820010, 0x3c04ffff, | 1388 | 0x06, 0x0a, 0x99, 0xb2, 0x67, 0xc2, 0x26, 0xa6, 0x76, 0x66, 0xd0, 0x43, |
2398 | 0x00052880, 0x00a22821, 0x8ca70000, 0x96220008, 0x97430104, 0x00e42024, | 1389 | 0xe5, 0x1d, 0xc1, 0xe3, 0xb4, 0xff, 0x30, 0xbf, 0xb7, 0xd4, 0xa4, 0xfb, |
2399 | 0x24420002, 0x00621823, 0x00833825, 0xaca70000, 0x92240005, 0x00041080, | 1390 | 0x59, 0x83, 0xee, 0x66, 0x24, 0x47, 0x1c, 0xab, 0x86, 0x49, 0x1f, 0x64, |
2400 | 0x02021021, 0x90430000, 0x3c05fff6, 0x34a5ffff, 0x3063000f, 0x00832021, | 1391 | 0xd5, 0x3e, 0xc0, 0x65, 0x27, 0x39, 0xa3, 0x40, 0x67, 0x9b, 0xee, 0x03, |
2401 | 0xa2240006, 0x308200ff, 0x24420003, 0x00021080, 0x02021021, 0x8c460000, | 1392 | 0xb0, 0xc4, 0x06, 0x0e, 0x31, 0xf6, 0x5c, 0x3d, 0x79, 0x4f, 0xb7, 0xcf, |
2402 | 0x308300ff, 0x8f820010, 0x3c04ff3f, 0x00031880, 0x00c53824, 0x00621821, | 1393 | 0x6c, 0x3a, 0xf6, 0x7b, 0x21, 0xb3, 0xf3, 0x86, 0x8a, 0xd6, 0xe1, 0x38, |
2403 | 0xae26000c, 0xac67000c, 0x8e22000c, 0x92230006, 0x3484ffff, 0x00441024, | 1394 | 0x7c, 0x1d, 0xfe, 0x26, 0x5d, 0x87, 0x5e, 0x64, 0xc4, 0x63, 0xee, 0xc0, |
2404 | 0x24630003, 0x00031880, 0x02031821, 0x00e42024, 0xae22000c, 0xac640000, | 1395 | 0xa0, 0xfd, 0x5e, 0x8d, 0xac, 0x5d, 0x95, 0xa2, 0x7e, 0x83, 0xdc, 0x45, |
2405 | 0x92220006, 0x24420004, 0x00021080, 0x02021021, 0x94470002, 0xac470000, | 1396 | 0xdb, 0x22, 0x59, 0x6e, 0xc8, 0x88, 0xdf, 0xdc, 0x6e, 0x4e, 0xeb, 0xae, |
2406 | 0x92230006, 0x8f820010, 0x00031880, 0x00621821, 0x24020010, 0xac670010, | 1397 | 0x46, 0x87, 0xce, 0x77, 0x75, 0x9a, 0x4e, 0x5c, 0x9d, 0xd8, 0xc6, 0xa0, |
2407 | 0x24030002, 0xa7420140, 0xa7400142, 0xa7400144, 0xa7430146, 0x97420104, | 1398 | 0xb9, 0xf7, 0x0d, 0x29, 0xec, 0xf3, 0xfa, 0x39, 0xce, 0x46, 0x19, 0x67, |
2408 | 0x24030001, 0x2442fffe, 0xa7420148, 0xa743014a, 0x8f820024, 0x24030002, | 1399 | 0x55, 0x0a, 0x6e, 0xd5, 0x68, 0x7e, 0xe7, 0x6f, 0x79, 0xe0, 0x20, 0xc6, |
2409 | 0x30440006, 0x1083000d, 0x2c820003, 0x10400005, 0x24020004, 0x10800011, | 1400 | 0xe0, 0xf1, 0x66, 0xcb, 0x56, 0x68, 0x12, 0x6d, 0xbb, 0xdc, 0x77, 0x54, |
2410 | 0x3c020009, 0x0a0003a5, 0x00000000, 0x10820007, 0x24020006, 0x1482000d, | 1401 | 0xb6, 0xf3, 0x18, 0x79, 0x1e, 0xb8, 0xcf, 0x53, 0xc0, 0xfc, 0x7e, 0x9d, |
2411 | 0x3c020119, 0x0a00039f, 0x24030001, 0x0a00039e, 0x3c020109, 0x3c020019, | 1402 | 0x7d, 0x6a, 0x34, 0xb7, 0xc3, 0xba, 0xc0, 0x73, 0x97, 0xbf, 0x79, 0x6d, |
2412 | 0x24030001, 0xaf421000, 0xaf830020, 0x0a0003a5, 0x00000000, 0xaf421000, | 1403 | 0x13, 0x14, 0x61, 0x37, 0xd1, 0x72, 0x03, 0xfb, 0x97, 0x85, 0x06, 0x22, |
2413 | 0xaf800020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x92220004, | 1404 | 0xec, 0x56, 0x76, 0x26, 0xf1, 0x14, 0x71, 0x50, 0x0a, 0x3e, 0x73, 0x5e, |
2414 | 0x24030008, 0x8f840020, 0x24420002, 0x30420007, 0x00621823, 0x30630007, | 1405 | 0xa8, 0x53, 0x08, 0x5c, 0x55, 0xac, 0x67, 0x8b, 0x16, 0x9a, 0xdb, 0xa2, |
2415 | 0x10800006, 0xae230010, 0x3c038000, 0x8f421000, 0x00431024, 0x1040fffd, | 1406 | 0x0f, 0x6d, 0x03, 0xee, 0x33, 0xc7, 0xfa, 0xf0, 0x3d, 0xa8, 0xd6, 0x20, |
2416 | 0x00000000, 0x8f820018, 0xaf82000c, 0x24420010, 0x30421fff, 0xaf820018, | 1407 | 0x03, 0xf3, 0x14, 0xb3, 0x68, 0x62, 0xaf, 0x6b, 0x2e, 0xdb, 0xb3, 0x6d, |
2417 | 0xaf420084, 0x97430104, 0x24424000, 0x0342d821, 0x3063ffff, 0x30620007, | 1408 | 0xbc, 0xac, 0x91, 0xbd, 0xbc, 0x8b, 0xd1, 0xf7, 0x7b, 0xd8, 0xef, 0x4d, |
2418 | 0x10400002, 0x24620007, 0x3043fff8, 0x8f820030, 0x8f840000, 0x00431821, | 1409 | 0xce, 0x35, 0x8e, 0xf5, 0x17, 0x62, 0xfb, 0x79, 0xec, 0x79, 0x61, 0x35, |
2419 | 0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023, 0xaf820030, | 1410 | 0xe5, 0xbe, 0x81, 0x46, 0xce, 0x4e, 0x6c, 0xaa, 0x88, 0xbd, 0x8c, 0xc0, |
2420 | 0x8f840030, 0x34028000, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x00821021, | 1411 | 0x87, 0x3f, 0xfc, 0x2c, 0xd7, 0x3c, 0x70, 0xb8, 0x35, 0x03, 0x6c, 0x6c, |
2421 | 0x03421821, 0x3c021000, 0xaf830010, 0xaf440080, 0xaf420178, 0x03e00008, | 1412 | 0x2b, 0x85, 0x9e, 0x1d, 0x8c, 0x9b, 0xb8, 0x0a, 0xfc, 0x0a, 0x8c, 0xd8, |
2422 | 0x27bd0020, 0x8f830024, 0x27bdffe0, 0xafbf0018, 0xafb10014, 0x30620200, | 1413 | 0x6e, 0xbd, 0x97, 0x53, 0x2a, 0xe6, 0xba, 0xc6, 0x73, 0x21, 0xe7, 0x38, |
2423 | 0x14400004, 0xafb00010, 0x0000000d, 0x00000000, 0x240002e4, 0x00031a82, | 1414 | 0xab, 0xbf, 0x03, 0x27, 0x22, 0xaa, 0xd3, 0xe2, 0x41, 0x9d, 0xae, 0x0e, |
2424 | 0x30630003, 0x000310c0, 0x00431021, 0x00021080, 0x00431021, 0x00021080, | 1415 | 0xea, 0x34, 0x77, 0x43, 0x47, 0x1c, 0xf2, 0xbc, 0xdb, 0x62, 0x0d, 0x02, |
2425 | 0x3c030800, 0x24631aa0, 0x00438021, 0x8e040000, 0x14800004, 0x00000000, | 1416 | 0x6b, 0x87, 0xed, 0xec, 0xa6, 0x22, 0xf3, 0x3a, 0xd0, 0x7f, 0x40, 0xb4, |
2426 | 0x0000000d, 0x00000000, 0x240002e9, 0x8f620004, 0x04410008, 0x26050014, | 1417 | 0x35, 0xd0, 0x11, 0x37, 0x75, 0x68, 0x6c, 0x99, 0x2e, 0xfe, 0x84, 0xe8, |
2427 | 0x92020006, 0x8e03000c, 0x24420003, 0x00021080, 0x00a21021, 0xac430000, | 1418 | 0xe2, 0x80, 0x7d, 0x79, 0xfc, 0xc2, 0x27, 0xc2, 0x9e, 0x65, 0x60, 0x7e, |
2428 | 0xae000000, 0x92020005, 0x24420001, 0x00021080, 0x00a21021, 0x8c430000, | 1419 | 0x75, 0x20, 0x23, 0x1f, 0x20, 0x5f, 0xee, 0x07, 0xc8, 0x83, 0x6d, 0xfc, |
2429 | 0x3c040001, 0x00641821, 0xac430000, 0x92060004, 0x27710008, 0x02202021, | 1420 | 0xd6, 0x91, 0x1b, 0x19, 0x1b, 0xce, 0x13, 0x8f, 0x81, 0xcf, 0x06, 0xfa, |
2430 | 0x24c60005, 0x0e000673, 0x00063082, 0x92040006, 0x3c057fff, 0x8f620004, | 1421 | 0x2e, 0xa1, 0x8d, 0xf3, 0x16, 0xdb, 0xea, 0xd4, 0x76, 0xa7, 0x28, 0xad, |
2431 | 0x00042080, 0x00912021, 0x8c830004, 0x34a5ffff, 0x00451024, 0x00621821, | 1422 | 0x72, 0x91, 0xc9, 0xb9, 0xe8, 0x14, 0xf8, 0x34, 0x81, 0xfc, 0x72, 0x47, |
2432 | 0xac830004, 0x92050005, 0x3c07ffff, 0x92040004, 0x00052880, 0x00b12821, | 1423 | 0x19, 0xcd, 0x45, 0xc8, 0x59, 0x8d, 0xd3, 0xc8, 0x3d, 0x3f, 0x47, 0x3b, |
2433 | 0x8ca30000, 0x97420104, 0x96060008, 0x00671824, 0x00441021, 0x00461023, | 1424 | 0x8f, 0xf7, 0x33, 0x3c, 0x27, 0xf0, 0x7d, 0x1a, 0xb6, 0xc3, 0x79, 0xa8, |
2434 | 0x3042ffff, 0x00621825, 0xaca30000, 0x92030007, 0x24020001, 0x1062000a, | 1425 | 0xf2, 0x7b, 0x5a, 0x0e, 0x02, 0xef, 0x76, 0x0c, 0xd8, 0x5b, 0xd0, 0x0b, |
2435 | 0x28620002, 0x1440001d, 0x2402000a, 0x24020002, 0x10620019, 0x24020003, | 1426 | 0xc7, 0xbb, 0x86, 0x7c, 0xc1, 0x31, 0xaf, 0x21, 0xa6, 0x3a, 0xe6, 0x36, |
2436 | 0x1062000e, 0x2402000a, 0x0a000447, 0x00000000, 0x92020004, 0x97430104, | 1427 | 0x69, 0xfe, 0x80, 0x62, 0xa5, 0xcc, 0x4f, 0xe1, 0x71, 0x7e, 0x6a, 0x0a, |
2437 | 0x8e24000c, 0x00621821, 0x2463fff2, 0x3063ffff, 0x00872024, 0x00832025, | 1428 | 0x1e, 0x24, 0x99, 0x09, 0x1f, 0xd6, 0x6d, 0xa5, 0x53, 0xc6, 0x8e, 0xfc, |
2438 | 0xae24000c, 0x0a000447, 0x2402000a, 0x92020004, 0x97430104, 0x8e240010, | 1429 | 0x00, 0x1a, 0x0e, 0x94, 0x3c, 0xdf, 0xc4, 0x19, 0x11, 0x01, 0x77, 0x1f, |
2439 | 0x00621821, 0x2463ffee, 0x3063ffff, 0x00872024, 0x00832025, 0xae240010, | 1430 | 0xda, 0x8d, 0xa0, 0xdd, 0x70, 0x48, 0xbb, 0xe1, 0xff, 0xd4, 0x2e, 0x74, |
2440 | 0x2402000a, 0xa7420140, 0x96030012, 0x8f840024, 0xa7430142, 0x92020004, | 1431 | 0x09, 0x8d, 0xdc, 0x05, 0xa7, 0x3e, 0xe8, 0x9f, 0xa4, 0x63, 0xd6, 0x30, |
2441 | 0xa7420144, 0xa7400146, 0x97430104, 0x30840006, 0x24020001, 0xa7430148, | 1432 | 0x6b, 0xd9, 0xa2, 0x7b, 0x4b, 0xcf, 0xa2, 0xe5, 0xbf, 0x3e, 0xab, 0x96, |
2442 | 0xa742014a, 0x24020002, 0x1082000d, 0x2c820003, 0x10400005, 0x24020004, | 1433 | 0x63, 0xd6, 0xb2, 0xca, 0x5a, 0x6e, 0x0c, 0x6b, 0xf9, 0x53, 0xf8, 0x17, |
2443 | 0x10800011, 0x3c020041, 0x0a00046c, 0x00000000, 0x10820007, 0x24020006, | 1434 | 0x9a, 0xbc, 0xa0, 0x36, 0x48, 0x5b, 0x04, 0x0e, 0x3b, 0x75, 0x52, 0x6e, |
2444 | 0x1482000d, 0x3c020151, 0x0a000466, 0x24030001, 0x0a000465, 0x3c020141, | 1435 | 0x3c, 0xe1, 0x1b, 0x73, 0x38, 0x1c, 0xe0, 0xdf, 0x81, 0x86, 0x3e, 0x69, |
2445 | 0x3c020051, 0x24030001, 0xaf421000, 0xaf830020, 0x0a00046c, 0x00000000, | 1436 | 0xb4, 0x1d, 0x39, 0x4f, 0xf5, 0xec, 0xe6, 0x96, 0xb0, 0x51, 0x49, 0x47, |
2446 | 0xaf421000, 0xaf800020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1437 | 0xdc, 0xbf, 0xb3, 0x64, 0x5b, 0x96, 0x3c, 0xac, 0x79, 0xa8, 0x7e, 0x27, |
2447 | 0x8f820020, 0x8f840018, 0x10400006, 0x92030004, 0x3c058000, 0x8f421000, | 1438 | 0xbf, 0xa6, 0x79, 0x3c, 0x4f, 0x6c, 0x81, 0xeb, 0xd6, 0x8f, 0x80, 0x51, |
2448 | 0x00451024, 0x1040fffd, 0x00000000, 0x2463000a, 0x30620007, 0x10400002, | 1439 | 0xda, 0x63, 0x9e, 0x3b, 0xe6, 0x9a, 0xe0, 0x17, 0xbe, 0xa1, 0x05, 0x0d, |
2449 | 0x24620007, 0x304303f8, 0x00831021, 0x30421fff, 0xaf84000c, 0xaf820018, | 1440 | 0x7c, 0xad, 0xc1, 0x4e, 0xdd, 0x29, 0xf4, 0x73, 0x17, 0xe3, 0xee, 0xf5, |
2450 | 0xaf420084, 0x97430104, 0x24424000, 0x0342d821, 0x3063ffff, 0x30620007, | 1441 | 0x98, 0x5f, 0x06, 0xe9, 0x37, 0x9d, 0xe6, 0x55, 0x91, 0x73, 0xe7, 0xcd, |
2451 | 0x10400002, 0x24620007, 0x3043fff8, 0x8f820030, 0x8f840000, 0x00431821, | 1442 | 0x75, 0x62, 0xed, 0xf1, 0x79, 0x87, 0xfe, 0x41, 0x8d, 0x14, 0xa1, 0xf7, |
2452 | 0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023, 0xaf820030, | 1443 | 0xc9, 0x52, 0xef, 0x2f, 0x20, 0x46, 0x93, 0xf8, 0x66, 0xcd, 0x9f, 0x2e, |
2453 | 0x8f840030, 0x34028000, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x00821021, | 1444 | 0x35, 0x3f, 0x8d, 0x27, 0xb7, 0x5d, 0x54, 0x0b, 0xee, 0x80, 0x87, 0x3b, |
2454 | 0x03421821, 0x3c021000, 0xaf830010, 0xaf440080, 0xaf420178, 0x03e00008, | 1445 | 0x8c, 0x6b, 0x1d, 0xf9, 0x8d, 0xe7, 0xff, 0x7b, 0xbe, 0xe9, 0x30, 0xb6, |
2455 | 0x27bd0020, 0x8f620000, 0x97430104, 0x3c048000, 0x3045ffff, 0x3066ffff, | 1446 | 0x8e, 0xf5, 0x03, 0x5a, 0x80, 0xee, 0xd0, 0x7e, 0xc0, 0xb6, 0xec, 0x53, |
2456 | 0x8f420178, 0x00441024, 0x1440fffd, 0x2402000a, 0x30a30007, 0xa7420140, | 1447 | 0xd9, 0x9a, 0xa5, 0xed, 0xa7, 0x63, 0xb6, 0x68, 0x3f, 0x60, 0x3b, 0xd6, |
2457 | 0x24020008, 0x00431023, 0x30420007, 0x24a3fffe, 0xa7420142, 0xa7430144, | 1448 | 0xc5, 0x73, 0xa4, 0xdc, 0xe4, 0xf3, 0x38, 0x60, 0x5d, 0xc0, 0xaf, 0x8d, |
2458 | 0xa7400146, 0xa7460148, 0x8f420108, 0x8f830024, 0x30420020, 0x0002102b, | 1449 | 0x36, 0xae, 0x19, 0xd8, 0x9f, 0xcf, 0x66, 0x5e, 0x27, 0xd7, 0x13, 0x7c, |
2459 | 0x00021023, 0x30420009, 0x34420001, 0x30630006, 0xa742014a, 0x24020002, | 1450 | 0x7e, 0x8f, 0x9d, 0xd3, 0xc7, 0xda, 0xb8, 0x00, 0xbe, 0x7f, 0x4b, 0xfd, |
2460 | 0x1062000d, 0x2c620003, 0x10400005, 0x24020004, 0x10600011, 0x3c020041, | 1451 | 0x4f, 0x6d, 0xbc, 0x06, 0x2d, 0x5c, 0x51, 0x0b, 0x6d, 0x6c, 0xe3, 0x79, |
2461 | 0x0a0004d6, 0x00000000, 0x10620007, 0x24020006, 0x1462000d, 0x3c020151, | 1452 | 0x01, 0xdf, 0xaf, 0x8d, 0x69, 0xa3, 0xf2, 0x7b, 0xfa, 0xf9, 0x9c, 0xf4, |
2462 | 0x0a0004d0, 0x24030001, 0x0a0004cf, 0x3c020141, 0x3c020051, 0x24030001, | 1453 | 0x9b, 0xe2, 0x6c, 0xe5, 0xf9, 0x94, 0x1d, 0x8a, 0xb5, 0x52, 0x07, 0x6b, |
2463 | 0xaf421000, 0xaf830020, 0x0a0004d6, 0x00000000, 0xaf421000, 0xaf800020, | 1454 | 0xc7, 0x3a, 0x98, 0x44, 0xae, 0x18, 0xe1, 0xb8, 0x12, 0xba, 0xb6, 0x99, |
2464 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8f820020, 0x24a30008, | 1455 | 0x12, 0x6b, 0x62, 0xf8, 0xfc, 0xfa, 0x7f, 0xe9, 0x82, 0xc0, 0x23, 0x31, |
2465 | 0x8f850018, 0x10400006, 0x30c6ffff, 0x3c048000, 0x8f421000, 0x00441024, | 1456 | 0x37, 0x6a, 0x0c, 0x3e, 0x0f, 0xf2, 0xfc, 0x8a, 0x8b, 0xfe, 0xaa, 0xd6, |
2466 | 0x1040fffd, 0x00000000, 0x3063ffff, 0x30620007, 0x10400002, 0x24620007, | 1457 | 0x10, 0xd8, 0xf3, 0x59, 0xcb, 0x78, 0xa0, 0xbe, 0x73, 0xe6, 0xa1, 0x05, |
2467 | 0x3043fff8, 0x00a31021, 0x30421fff, 0x24434000, 0x0343d821, 0x00c02021, | 1458 | 0xce, 0x01, 0x8f, 0xf3, 0x3d, 0x27, 0x40, 0x5b, 0x1b, 0xf1, 0x67, 0x4c, |
2468 | 0x30830007, 0xaf85000c, 0xaf820018, 0xaf420084, 0x10600002, 0x24820007, | 1459 | 0x36, 0xa4, 0xf5, 0x7d, 0x83, 0xfd, 0xa0, 0xb3, 0x93, 0x6a, 0x2c, 0x1d, |
2469 | 0x3044fff8, 0x8f820030, 0x8f850000, 0x00441821, 0xaf82001c, 0x0065102b, | 1460 | 0x9a, 0x7a, 0x82, 0x13, 0xf3, 0x28, 0x1a, 0xc2, 0xa9, 0x23, 0x70, 0xfa, |
2470 | 0xaf830030, 0x14400002, 0x00651023, 0xaf820030, 0x8f840030, 0x34028000, | 1461 | 0xf0, 0x18, 0xa7, 0xa8, 0xc4, 0x29, 0x12, 0x38, 0xfd, 0xb1, 0xc4, 0xe9, |
2471 | 0x3c030800, 0x8c650834, 0x00821021, 0x03421821, 0xaf830010, 0xaf440080, | 1462 | 0x0f, 0x4f, 0xc1, 0xe9, 0xc3, 0x67, 0xc0, 0xc9, 0xa0, 0x3d, 0xa7, 0x89, |
2472 | 0x10a00006, 0x2402000e, 0x9383002f, 0x14620004, 0x3c021000, 0x2402043f, | 1463 | 0x73, 0x56, 0x17, 0x35, 0xe9, 0xa1, 0x7b, 0x52, 0x4d, 0x75, 0x52, 0xdc, |
2473 | 0xa7420148, 0x3c021000, 0x03e00008, 0xaf420178, 0x8f820024, 0x30424000, | 1464 | 0x6d, 0x73, 0x8f, 0x86, 0xeb, 0x0e, 0xdb, 0x7a, 0x80, 0xf5, 0xa5, 0xc0, |
2474 | 0x10400005, 0x24020800, 0x0000000d, 0x00000000, 0x2400040e, 0x24020800, | 1465 | 0xee, 0xfa, 0x58, 0xed, 0x91, 0xc0, 0xbe, 0x5d, 0xe2, 0x74, 0x1d, 0x38, |
2475 | 0xaf420178, 0x97440104, 0x3c030008, 0xaf430140, 0x8f820024, 0x30420001, | 1466 | 0xb5, 0x4b, 0x9c, 0xb6, 0x87, 0x70, 0xda, 0x1e, 0xc1, 0x89, 0xf3, 0x49, |
2476 | 0x10400006, 0x3085ffff, 0x24020002, 0x24a3fffe, 0xa7420146, 0x0a000526, | 1467 | 0xcb, 0xd8, 0xee, 0x55, 0x18, 0x55, 0xf8, 0xe8, 0x74, 0xdb, 0x9c, 0xc6, |
2477 | 0xa7430148, 0xa7400146, 0x8f840018, 0x2402000d, 0xa742014a, 0x24830008, | 1468 | 0xfe, 0xcf, 0x51, 0xfa, 0x63, 0x95, 0xeb, 0x5a, 0x60, 0xf7, 0xaa, 0x2a, |
2478 | 0x30631fff, 0x24624000, 0x0342d821, 0x30a20007, 0xaf84000c, 0xaf830018, | 1469 | 0x8b, 0xf3, 0x80, 0xdf, 0x9f, 0xd4, 0x27, 0x98, 0xcb, 0x0f, 0x5c, 0x8e, |
2479 | 0xaf430084, 0x10400002, 0x24a20007, 0x3045fff8, 0x8f820030, 0x8f840000, | 1470 | 0x23, 0xea, 0x57, 0xa7, 0xca, 0x43, 0xcf, 0xab, 0xa8, 0xad, 0xf0, 0xcd, |
2480 | 0x00451821, 0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023, | 1471 | 0x36, 0xaa, 0xd4, 0x86, 0xde, 0x15, 0xd4, 0xe5, 0xe1, 0x71, 0x5d, 0x5e, |
2481 | 0xaf820030, 0x8f840030, 0x34028000, 0x00821021, 0x03421821, 0x3c021000, | 1472 | 0xc4, 0xe0, 0x7a, 0x59, 0x97, 0xef, 0x39, 0x5c, 0x97, 0x2f, 0x6a, 0x34, |
2482 | 0xaf830010, 0xaf440080, 0x03e00008, 0xaf420178, 0x27bdffe8, 0x3c046008, | 1473 | 0xb9, 0x51, 0x62, 0xc9, 0x9c, 0x9e, 0x42, 0xdf, 0x25, 0x81, 0x79, 0x8a, |
2483 | 0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000, 0x2403ff7f, 0x375b4000, | 1474 | 0xfc, 0xbd, 0x89, 0xfd, 0x47, 0x82, 0x9b, 0xa8, 0xb1, 0x4a, 0xde, 0xa2, |
2484 | 0x00431024, 0x3442380c, 0xac825000, 0x8f430008, 0x3c100800, 0x37428000, | 1475 | 0x86, 0xa5, 0x30, 0x2b, 0x62, 0xf5, 0xc5, 0xd6, 0x5d, 0x9f, 0x20, 0x4f, |
2485 | 0x34630001, 0xaf430008, 0xaf820010, 0x3c02601c, 0xaf800018, 0xaf400080, | 1476 | 0x1b, 0x1d, 0x15, 0x75, 0xfd, 0xfd, 0x8c, 0xf3, 0x33, 0x5d, 0x4e, 0x7a, |
2486 | 0xaf400084, 0x8c450008, 0x3c036000, 0x8c620808, 0x3c040800, 0x3c030080, | 1477 | 0x14, 0x9f, 0xf1, 0xae, 0xe5, 0xc0, 0xdc, 0x7f, 0xeb, 0x3c, 0x9f, 0x33, |
2487 | 0xac830820, 0x3042fff0, 0x38420010, 0x2c420001, 0xaf850000, 0xaf820004, | 1478 | 0xf5, 0xd5, 0xa0, 0x85, 0xf6, 0x81, 0x41, 0xa8, 0x7d, 0x70, 0x4f, 0xa1, |
2488 | 0x0e000658, 0x00000000, 0x8f420000, 0x30420001, 0x1040fffb, 0x00000000, | 1479 | 0x38, 0x38, 0x2f, 0xa1, 0xc6, 0xc1, 0x37, 0x7c, 0x92, 0x6c, 0xb6, 0x23, |
2489 | 0x8f430108, 0x8f440100, 0x30622000, 0xaf830024, 0xaf840014, 0x10400004, | 1480 | 0x7b, 0x4d, 0x70, 0x21, 0x26, 0x1f, 0xeb, 0xf4, 0x33, 0x71, 0x57, 0xe9, |
2490 | 0x8e02082c, 0x24420001, 0x0a0005c6, 0xae02082c, 0x30620200, 0x14400003, | 1481 | 0x28, 0x9e, 0x81, 0xda, 0x92, 0x0c, 0x9c, 0xf3, 0x88, 0x89, 0x65, 0xa4, |
2491 | 0x24020f00, 0x14820027, 0x24020d00, 0x97420104, 0x1040001c, 0x30624000, | 1482 | 0x03, 0xd4, 0x41, 0x38, 0xfb, 0x83, 0x55, 0xc4, 0xe5, 0x2c, 0x70, 0xcb, |
2492 | 0x14400005, 0x00000000, 0x0e00022f, 0x00000000, 0x0a0005bb, 0x00000000, | 1483 | 0x54, 0xf8, 0xbe, 0xa9, 0x17, 0xf7, 0x1c, 0x54, 0x35, 0x22, 0x5e, 0x8f, |
2493 | 0x8f620008, 0x8f630000, 0x24020030, 0x00031e02, 0x306300f0, 0x10620007, | 1484 | 0x4a, 0x7e, 0x88, 0x3a, 0x4b, 0x6a, 0xf7, 0xc9, 0x8a, 0x5c, 0xf0, 0x1c, |
2494 | 0x28620031, 0x1440002f, 0x24020040, 0x10620007, 0x00000000, 0x0a0005bb, | 1485 | 0xe7, 0x48, 0x37, 0xe3, 0xda, 0xf9, 0xac, 0x21, 0xdf, 0xe0, 0x5c, 0x7e, |
2495 | 0x00000000, 0x0e0002e8, 0x00000000, 0x0a0005bb, 0x00000000, 0x0e0003db, | 1486 | 0x88, 0x18, 0xe2, 0xfd, 0x80, 0xcf, 0x16, 0x85, 0xeb, 0x6f, 0xdc, 0x67, |
2496 | 0x00000000, 0x0a0005bb, 0x00000000, 0x30620040, 0x1440002b, 0x00000000, | 1487 | 0x96, 0x90, 0x6b, 0x68, 0x0a, 0x79, 0x0f, 0x79, 0x77, 0x96, 0x71, 0xf2, |
2497 | 0x0000000d, 0x00000000, 0x240004b2, 0x0a0005c6, 0x00000000, 0x1482000f, | 1488 | 0x23, 0xc6, 0x4b, 0x9c, 0x1b, 0xe7, 0xe4, 0x62, 0x9e, 0x5f, 0x6b, 0x05, |
2498 | 0x30620006, 0x97420104, 0x10400005, 0x30620040, 0x0e000510, 0x00000000, | 1489 | 0x7f, 0x71, 0x87, 0x41, 0xfc, 0x36, 0xfb, 0x2e, 0xe7, 0xdb, 0x2f, 0x2b, |
2499 | 0x0a0005bb, 0x00000000, 0x1440001b, 0x00000000, 0x0000000d, 0x00000000, | 1490 | 0x74, 0x44, 0x82, 0x8f, 0xe6, 0xcb, 0xc8, 0xc3, 0xe7, 0xe0, 0xe3, 0x0b, |
2500 | 0x240004c4, 0x0a0005c6, 0x00000000, 0x1040000e, 0x30621000, 0x10400005, | 1491 | 0x2d, 0x16, 0xf5, 0x56, 0xe5, 0xf3, 0xc9, 0xd8, 0x18, 0x1f, 0x29, 0xa3, |
2501 | 0x00000000, 0x0e000688, 0x00000000, 0x0a0005bb, 0x00000000, 0x0e0004a1, | 1492 | 0xdf, 0x3e, 0xf8, 0xbc, 0x52, 0xce, 0x57, 0xf1, 0xe3, 0x57, 0xe0, 0xc7, |
2502 | 0x00000000, 0x8f82002c, 0x24420001, 0xaf82002c, 0x0a0005c6, 0x00000000, | 1493 | 0x61, 0xd9, 0xcf, 0x77, 0x16, 0x1d, 0x36, 0xbc, 0x3e, 0xe6, 0x11, 0xdb, |
2503 | 0x30620040, 0x14400004, 0x00000000, 0x0000000d, 0x00000000, 0x240004db, | 1494 | 0x9b, 0xda, 0xe8, 0x18, 0x5f, 0x1a, 0xf3, 0xff, 0xfd, 0x90, 0xff, 0x34, |
2504 | 0x8f420138, 0x3c034000, 0x00431025, 0xaf420138, 0x0a000566, 0x00000000, | 1495 | 0xef, 0xc9, 0x8c, 0x0a, 0x0e, 0xe2, 0xef, 0x3d, 0x7d, 0xd4, 0xf7, 0x17, |
2505 | 0x3c046008, 0x8c835000, 0x3c1a8000, 0x2402ff7f, 0x375b4000, 0x00621824, | 1496 | 0x6a, 0xf1, 0x7d, 0xb6, 0xe0, 0x9e, 0x83, 0x67, 0x76, 0x38, 0xb4, 0x36, |
2506 | 0x3463380c, 0xac835000, 0x8f420008, 0x3c056000, 0x3c03601c, 0x34420001, | 1497 | 0x75, 0x6c, 0xec, 0x87, 0x18, 0x7b, 0x15, 0x79, 0x84, 0x7c, 0x05, 0x77, |
2507 | 0xaf420008, 0x37428000, 0xaf800018, 0xaf820010, 0xaf400080, 0xaf400084, | 1498 | 0xa6, 0x90, 0xf0, 0x9e, 0x5d, 0xa9, 0xe2, 0x03, 0x4e, 0xd0, 0xe5, 0xb4, |
2508 | 0x8c660008, 0x8ca20808, 0x3c040800, 0x3c030080, 0xac830820, 0x3042fff0, | 1499 | 0xe4, 0x82, 0x5c, 0x70, 0x81, 0xeb, 0xb4, 0xd5, 0x4d, 0x70, 0x21, 0x05, |
2509 | 0x38420010, 0x2c420001, 0xaf860000, 0xaf820004, 0x03e00008, 0x00000000, | 1500 | 0x17, 0xe0, 0xd7, 0xd1, 0xbc, 0x59, 0xe0, 0xcc, 0x39, 0x07, 0xdf, 0x19, |
2510 | 0x3084ffff, 0x30820007, 0x10400002, 0x24820007, 0x3044fff8, 0x8f820018, | 1501 | 0xf3, 0x82, 0x79, 0xc0, 0x9c, 0x78, 0xc2, 0x85, 0x2b, 0x3d, 0xc3, 0xd8, |
2511 | 0x00441821, 0x30631fff, 0x24644000, 0x0344d821, 0xaf82000c, 0xaf830018, | 1502 | 0xfd, 0x2f, 0x3c, 0x78, 0x57, 0xf0, 0x80, 0xf9, 0x58, 0xe4, 0x85, 0x2e, |
2512 | 0x03e00008, 0xaf430084, 0x3084ffff, 0x30820007, 0x10400002, 0x24820007, | 1503 | 0x70, 0x48, 0xca, 0xbc, 0x50, 0xe8, 0x9c, 0xeb, 0x1b, 0xd6, 0x78, 0xa1, |
2513 | 0x3044fff8, 0x8f820030, 0x8f830000, 0x00442021, 0xaf82001c, 0x0083102b, | 1504 | 0x8d, 0x2d, 0x68, 0xa3, 0xad, 0x70, 0xbd, 0xc3, 0xba, 0x60, 0x3f, 0xd6, |
2514 | 0xaf840030, 0x14400002, 0x00831023, 0xaf820030, 0x8f820030, 0x34038000, | 1505 | 0xc6, 0x49, 0x7e, 0x85, 0x46, 0xd2, 0xbe, 0x6d, 0x55, 0xf9, 0x21, 0x85, |
2515 | 0x00431821, 0x03432021, 0xaf840010, 0x03e00008, 0xaf420080, 0x8f830024, | 1506 | 0x2e, 0xba, 0xa5, 0x46, 0xd2, 0x52, 0x23, 0xb0, 0x89, 0x95, 0x16, 0xe7, |
2516 | 0x24020002, 0x30630006, 0x1062000d, 0x2c620003, 0x50400005, 0x24020004, | 1507 | 0x7a, 0xdb, 0x0a, 0x91, 0x17, 0xba, 0x62, 0xcc, 0x98, 0x8a, 0x3b, 0x09, |
2517 | 0x10600012, 0x3c020001, 0x0a00062a, 0x00000000, 0x10620007, 0x24020006, | 1508 | 0xeb, 0x96, 0xf3, 0xe9, 0x50, 0x1e, 0x2d, 0xef, 0xa5, 0x1d, 0x71, 0x2f, |
2518 | 0x1462000f, 0x3c020111, 0x0a000622, 0x00821025, 0x0a000621, 0x3c020101, | 1509 | 0xfd, 0x8a, 0x3e, 0x9a, 0x47, 0x67, 0x90, 0x43, 0xf8, 0x5e, 0x3a, 0xa7, |
2519 | 0x3c020011, 0x00821025, 0x24030001, 0xaf421000, 0xaf830020, 0x0a00062a, | 1510 | 0xf3, 0xbd, 0x14, 0xba, 0xd3, 0x87, 0xef, 0xa5, 0xc9, 0xc8, 0xbd, 0xb4, |
2520 | 0x00000000, 0x00821025, 0xaf421000, 0xaf800020, 0x00000000, 0x00000000, | 1511 | 0xf2, 0xe5, 0xf6, 0x93, 0xf2, 0x69, 0x15, 0x13, 0xce, 0xa9, 0x02, 0xf3, |
2521 | 0x00000000, 0x03e00008, 0x00000000, 0x8f820020, 0x10400005, 0x3c038000, | 1512 | 0x13, 0x6a, 0xbf, 0xca, 0x86, 0xf3, 0x0d, 0x6b, 0xb9, 0xcc, 0x51, 0xa8, |
2522 | 0x8f421000, 0x00431024, 0x1040fffd, 0x00000000, 0x03e00008, 0x00000000, | 1513 | 0xb5, 0xee, 0x67, 0x15, 0xe7, 0xdf, 0xc0, 0x3c, 0xf8, 0xee, 0x9f, 0xc4, |
2523 | 0x8f820024, 0x27bdffe8, 0x30424000, 0x14400005, 0xafbf0010, 0x0e00022f, | 1514 | 0x79, 0xa3, 0xe4, 0xfc, 0x54, 0xe1, 0xd3, 0x1f, 0xe6, 0xfd, 0x1b, 0xfa, |
2524 | 0x00000000, 0x0a000656, 0x8fbf0010, 0x8f620008, 0x8f630000, 0x24020030, | 1515 | 0x28, 0xef, 0xab, 0x71, 0x2a, 0xde, 0x17, 0x63, 0x3e, 0x54, 0x9a, 0x38, |
2525 | 0x00031e02, 0x306300f0, 0x10620008, 0x28620031, 0x1440000d, 0x8fbf0010, | 1516 | 0xdb, 0x96, 0x91, 0x6b, 0x66, 0xf8, 0xbe, 0x85, 0x5c, 0xe0, 0xd5, 0x71, |
2526 | 0x24020040, 0x10620007, 0x00000000, 0x0a000656, 0x00000000, 0x0e0002e8, | 1517 | 0xef, 0x98, 0xe1, 0xb1, 0xd3, 0x0c, 0xe7, 0x4d, 0x03, 0xbc, 0x17, 0x9c, |
2527 | 0x00000000, 0x0a000656, 0x8fbf0010, 0x0e0003db, 0x00000000, 0x8fbf0010, | 1518 | 0x3d, 0x12, 0xf7, 0x01, 0xac, 0x7b, 0x86, 0xab, 0xab, 0x51, 0x2e, 0xbe, |
2528 | 0x03e00008, 0x27bd0018, 0x8f840028, 0x1080000f, 0x3c026000, 0x8c430c3c, | 1519 | 0x88, 0x0b, 0x45, 0xb5, 0x97, 0xaa, 0xcd, 0x19, 0x6a, 0x5b, 0x2e, 0xb1, |
2529 | 0x30630fff, 0xaf830008, 0x14600011, 0x3082000f, 0x10400005, 0x308200f0, | 1520 | 0x2e, 0x62, 0xfd, 0xa0, 0xb8, 0x8f, 0xd3, 0x2e, 0x6a, 0xb1, 0x43, 0xd4, |
2530 | 0x10400003, 0x30820f00, 0x14400006, 0x00000000, 0x0000000d, 0x00000000, | 1521 | 0x39, 0x77, 0x70, 0x9f, 0x4b, 0x06, 0x8f, 0xf2, 0x07, 0x0d, 0x95, 0xba, |
2531 | 0x2400051a, 0x03e00008, 0x00000000, 0x0000000d, 0x00000000, 0x2400051f, | 1522 | 0xc7, 0x3e, 0x5d, 0xac, 0xd7, 0x36, 0x6f, 0xe3, 0xed, 0xdd, 0x41, 0x15, |
2532 | 0x03e00008, 0x00000000, 0xaf830028, 0x03e00008, 0x00000000, 0x10c00007, | 1523 | 0x53, 0xee, 0xe7, 0xb6, 0x7f, 0xe0, 0xbc, 0x45, 0x1d, 0x37, 0x32, 0x67, |
2533 | 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004, 0xac820000, 0x14c0fffb, | 1524 | 0xf5, 0xce, 0x7f, 0xff, 0x06, 0x63, 0xe1, 0x4b, 0x7b, 0x30, 0x12, 0x00, |
2534 | 0x24840004, 0x03e00008, 0x00000000, 0x0a000684, 0x00a01021, 0xac860000, | 1525 | 0x00, 0x00 }; |
2535 | 0x00000000, 0x00000000, 0x24840004, 0x00a01021, 0x1440fffa, 0x24a5ffff, | ||
2536 | 0x03e00008, 0x00000000, 0x0000000d, 0x03e00008, 0x00000000, 0x00000000}; | ||
2537 | 1526 | ||
2538 | static u32 bnx2_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 }; | 1527 | static u32 bnx2_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 }; |
2539 | static u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 }; | 1528 | static u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 }; |
@@ -2554,939 +1543,422 @@ static const u32 bnx2_TXP_b06FwBssAddr = 0x080057a0; | |||
2554 | static const int bnx2_TXP_b06FwBssLen = 0x1c4; | 1543 | static const int bnx2_TXP_b06FwBssLen = 0x1c4; |
2555 | static const u32 bnx2_TXP_b06FwSbssAddr = 0x08005760; | 1544 | static const u32 bnx2_TXP_b06FwSbssAddr = 0x08005760; |
2556 | static const int bnx2_TXP_b06FwSbssLen = 0x38; | 1545 | static const int bnx2_TXP_b06FwSbssLen = 0x38; |
2557 | static u32 bnx2_TXP_b06FwText[(0x5748/4) + 1] = { | 1546 | static u8 bnx2_TXP_b06FwText[] = { |
2558 | 0x0a000d2c, 0x00000000, 0x00000000, 0x0000000d, 0x74787020, 0x322e352e, | 1547 | 0x1f, 0x8b, 0x08, 0x08, 0x21, 0xd3, 0x41, 0x44, 0x00, 0x03, 0x74, 0x65, |
2559 | 0x38000000, 0x02050800, 0x0000000a, 0x000003e8, 0x0000ea60, 0x00000000, | 1548 | 0x73, 0x74, 0x31, 0x2e, 0x62, 0x69, 0x6e, 0x00, 0xed, 0x5c, 0x6d, 0x6c, |
2560 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1549 | 0x1b, 0xf7, 0x79, 0x7f, 0xee, 0x85, 0xd2, 0x51, 0x96, 0xe9, 0x93, 0xc2, |
2561 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1550 | 0x78, 0x6c, 0xc0, 0xa6, 0x77, 0xd6, 0x51, 0x66, 0x20, 0xb5, 0xa0, 0x05, |
2562 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1551 | 0x36, 0x55, 0x87, 0x43, 0x73, 0x3e, 0x52, 0x2f, 0x4e, 0x5c, 0x57, 0x71, |
2563 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1552 | 0x94, 0x86, 0x6e, 0x0d, 0x8c, 0xa0, 0xec, 0xd8, 0xeb, 0x5a, 0x2c, 0x1f, |
2564 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1553 | 0x8c, 0xd5, 0x68, 0xd1, 0x99, 0xa1, 0x68, 0xc7, 0xc9, 0x68, 0x51, 0xa9, |
2565 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1554 | 0xe5, 0xa8, 0x43, 0x57, 0x80, 0x95, 0x64, 0xcb, 0x29, 0x4e, 0x3a, 0x65, |
2566 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1555 | 0xcb, 0x16, 0x0c, 0x58, 0x16, 0xcd, 0x2f, 0x5d, 0x3f, 0x74, 0x80, 0x3f, |
2567 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1556 | 0xec, 0x43, 0x3a, 0xec, 0x83, 0x91, 0x14, 0xad, 0x11, 0x6c, 0x59, 0xb0, |
2568 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1557 | 0x2f, 0x33, 0xd6, 0x26, 0xb7, 0xdf, 0x73, 0x77, 0x94, 0x95, 0xc4, 0x4e, |
2569 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1558 | 0xab, 0x7d, 0xbe, 0x07, 0x20, 0xee, 0x7f, 0xff, 0xd7, 0xe7, 0xfd, 0xe5, |
2570 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1559 | 0x7f, 0x90, 0x06, 0xb7, 0x53, 0x17, 0x85, 0xb0, 0x1d, 0x3f, 0xed, 0x99, |
2571 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1560 | 0x93, 0x27, 0x3e, 0xf7, 0xf9, 0xcf, 0x0d, 0xa1, 0x39, 0x4c, 0x4a, 0x4c, |
2572 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1561 | 0xe4, 0xc1, 0x5b, 0x12, 0x51, 0xf9, 0x1d, 0x8a, 0x20, 0x82, 0x08, 0x22, |
2573 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1562 | 0x88, 0x20, 0x82, 0x08, 0x22, 0x88, 0x20, 0x82, 0x08, 0x22, 0x88, 0x20, |
2574 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1563 | 0x82, 0x08, 0x22, 0x88, 0x20, 0x82, 0x08, 0x22, 0x88, 0x20, 0x82, 0x08, |
2575 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1564 | 0x22, 0x88, 0x20, 0x82, 0x08, 0x22, 0x88, 0x20, 0x82, 0x08, 0x22, 0x88, |
2576 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1565 | 0x20, 0x82, 0x08, 0x22, 0x88, 0x20, 0x82, 0x08, 0x22, 0x88, 0x20, 0x82, |
2577 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1566 | 0x08, 0x22, 0x88, 0x20, 0x82, 0x08, 0x22, 0x88, 0x20, 0x82, 0x08, 0x22, |
2578 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1567 | 0xf8, 0x9d, 0x20, 0x11, 0xa9, 0xfc, 0xdc, 0x1e, 0xfe, 0x48, 0x11, 0xcd, |
2579 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1568 | 0xf2, 0x53, 0xb6, 0x41, 0x8a, 0x64, 0x1e, 0x39, 0x34, 0x65, 0x10, 0x59, |
2580 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1569 | 0xce, 0x80, 0x56, 0xa0, 0xf7, 0xbd, 0x6a, 0x52, 0x26, 0xee, 0xff, 0xb4, |
2581 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1570 | 0xf9, 0xdb, 0x53, 0xaf, 0x7f, 0x41, 0x7f, 0xaf, 0x25, 0x91, 0xa2, 0x9a, |
2582 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1571 | 0x6b, 0x79, 0xb5, 0x9f, 0x94, 0x34, 0xd6, 0xfc, 0xd5, 0xee, 0xaf, 0xef, |
2583 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1572 | 0xa0, 0x44, 0x7b, 0xaf, 0x24, 0xd5, 0x9b, 0xb7, 0xbc, 0xd7, 0x77, 0x27, |
2584 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1573 | 0xe9, 0x15, 0x57, 0xa5, 0x35, 0x57, 0x16, 0x46, 0x9b, 0x0a, 0x4d, 0x37, |
2585 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1574 | 0x1d, 0x3a, 0xdd, 0xa8, 0x52, 0xc1, 0xbd, 0x4c, 0xb5, 0x39, 0x35, 0x61, |
2586 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1575 | 0x2f, 0xff, 0x84, 0xa6, 0xe7, 0x7a, 0x13, 0x85, 0x65, 0x87, 0x6a, 0x8d, |
2587 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1576 | 0x54, 0xc2, 0x76, 0xd5, 0x44, 0x61, 0x3e, 0x89, 0xf7, 0xde, 0x84, 0x3d, |
2588 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1577 | 0xaf, 0x57, 0x89, 0x76, 0x62, 0x4e, 0x2a, 0x51, 0x68, 0xea, 0x65, 0xa2, |
2589 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1578 | 0xbe, 0xdc, 0x75, 0x4a, 0x27, 0x0a, 0xee, 0x82, 0xb0, 0xae, 0x0a, 0x54, |
2590 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1579 | 0xfb, 0x2c, 0xa9, 0x09, 0xf3, 0xb6, 0xf7, 0x29, 0x43, 0xa5, 0x1e, 0x83, |
2591 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1580 | 0x76, 0xec, 0x30, 0xe8, 0xd9, 0x94, 0xa9, 0x50, 0xe5, 0x7c, 0x9c, 0x2c, |
2592 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1581 | 0x9f, 0x26, 0x95, 0x2a, 0xf3, 0x03, 0xea, 0x15, 0x8a, 0x91, 0x95, 0x6c, |
2593 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1582 | 0xbf, 0x7b, 0x9e, 0x9d, 0xfb, 0x16, 0xff, 0x9d, 0x16, 0xce, 0xa2, 0xc4, |
2594 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1583 | 0xa8, 0x4b, 0x64, 0x03, 0x2f, 0x3b, 0xf7, 0xbe, 0x17, 0xac, 0x51, 0x70, |
2595 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1584 | 0xae, 0x9c, 0x18, 0x69, 0x7a, 0x5e, 0x31, 0x87, 0x33, 0x72, 0xed, 0xb5, |
2596 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1585 | 0x31, 0x6a, 0x25, 0xad, 0xd6, 0x74, 0x2e, 0xbf, 0x23, 0xf8, 0x1b, 0x2f, |
2597 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1586 | 0xa6, 0x91, 0xdf, 0x2d, 0x12, 0x8d, 0xaf, 0x50, 0x25, 0x49, 0xad, 0x5a, |
2598 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1587 | 0xee, 0x61, 0x7a, 0x21, 0xd7, 0x4d, 0x67, 0xb1, 0xdf, 0xf3, 0x39, 0xf0, |
2599 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1588 | 0xd1, 0x38, 0x29, 0xd8, 0xae, 0x9e, 0x22, 0xe1, 0x05, 0xb2, 0xe7, 0xfb, |
2600 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1589 | 0xd4, 0x02, 0xe1, 0x6c, 0xc3, 0xfb, 0x8c, 0x9d, 0xc3, 0x79, 0x83, 0xff, |
2601 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1590 | 0xeb, 0x59, 0x49, 0xbd, 0xdc, 0xa2, 0x14, 0xd5, 0x9a, 0x7d, 0xb9, 0x9f, |
2602 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1591 | 0x93, 0x40, 0x9d, 0x06, 0xf3, 0xc7, 0xa3, 0xc7, 0x70, 0xae, 0x6d, 0xa0, |
2603 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1592 | 0xdf, 0x25, 0x4b, 0xcc, 0xc4, 0xe8, 0x4f, 0x55, 0x5d, 0xb3, 0xa5, 0x5e, |
2604 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1593 | 0xaa, 0x9d, 0xef, 0x04, 0x9e, 0x56, 0xaf, 0x88, 0xb9, 0x63, 0x79, 0x4a, |
2605 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1594 | 0x6e, 0x23, 0x12, 0x24, 0x33, 0x83, 0x7d, 0x89, 0x6a, 0x4e, 0x0a, 0x6b, |
2606 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1595 | 0x33, 0xc3, 0xef, 0xd0, 0x0e, 0xd2, 0x7a, 0x64, 0x9a, 0x76, 0xba, 0xc0, |
2607 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1596 | 0xc7, 0x6e, 0xc8, 0x20, 0x33, 0xfc, 0x2e, 0x84, 0x22, 0x1a, 0x99, 0xd4, |
2608 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1597 | 0x49, 0x2a, 0x0b, 0x05, 0xb7, 0x83, 0xa6, 0x33, 0x0a, 0xd5, 0x81, 0x47, |
2609 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1598 | 0x3d, 0xf7, 0x35, 0xc1, 0x5e, 0x2e, 0x09, 0x85, 0x65, 0xcc, 0x73, 0x5f, |
2610 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1599 | 0x0b, 0xff, 0x76, 0xad, 0x1b, 0xfb, 0x88, 0x54, 0xcb, 0x94, 0x30, 0xa6, |
2611 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1600 | 0xd0, 0x14, 0xe6, 0x4d, 0x81, 0xa6, 0x69, 0x77, 0x07, 0xad, 0x4f, 0x26, |
2612 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1601 | 0x13, 0xcc, 0xab, 0x1a, 0xc6, 0xbf, 0x32, 0x21, 0x90, 0x6a, 0x58, 0xf4, |
2613 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1602 | 0xeb, 0x3c, 0x64, 0x38, 0xdf, 0xcb, 0x32, 0xa3, 0xd3, 0x4d, 0x4a, 0x8a, |
2614 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1603 | 0x94, 0x49, 0x55, 0xe8, 0x32, 0x2d, 0x3a, 0x2c, 0x7f, 0xc8, 0x13, 0xf2, |
2615 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1604 | 0xae, 0x39, 0xbc, 0x0e, 0x72, 0x6b, 0x16, 0xc1, 0x8f, 0x71, 0xe0, 0x70, |
2616 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1605 | 0x50, 0x78, 0x6c, 0x71, 0x52, 0x18, 0x73, 0x7f, 0x93, 0xa0, 0xae, 0x93, |
2617 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1606 | 0xc2, 0x01, 0xf7, 0xa8, 0x10, 0xf2, 0x1e, 0xb2, 0x53, 0xc8, 0x9a, 0x50, |
2618 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1607 | 0xe8, 0x92, 0x1b, 0xc8, 0x6e, 0x01, 0xfa, 0x69, 0xa9, 0x16, 0xe4, 0x70, |
2619 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1608 | 0x78, 0x63, 0x0e, 0x8f, 0xd5, 0x97, 0x65, 0x3a, 0xed, 0xf2, 0xfc, 0x3f, |
2620 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1609 | 0x82, 0x7c, 0x14, 0x72, 0x76, 0x77, 0x53, 0x19, 0xfd, 0xb5, 0x79, 0xb2, |
2621 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1610 | 0xec, 0x9c, 0x88, 0x35, 0x09, 0x92, 0x8c, 0x9d, 0xf8, 0x75, 0xd1, 0xd4, |
2622 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1611 | 0x62, 0xa7, 0x25, 0x19, 0x49, 0x9a, 0x72, 0x99, 0x87, 0x78, 0x36, 0xdb, |
2623 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1612 | 0x7c, 0x64, 0x5c, 0xb9, 0x9f, 0xd7, 0x71, 0xbf, 0x8a, 0xfe, 0xcd, 0x7d, |
2624 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1613 | 0xac, 0x17, 0x09, 0xe0, 0xa3, 0x67, 0x59, 0x9f, 0x2b, 0xcd, 0x8c, 0x7a, |
2625 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1614 | 0x80, 0x9f, 0x2e, 0xf3, 0xb6, 0xcd, 0x53, 0x19, 0x73, 0x45, 0xaa, 0x2c, |
2626 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1615 | 0xe2, 0x9c, 0xf3, 0xbf, 0xf5, 0x62, 0x79, 0xbc, 0x1b, 0x1d, 0xa0, 0x8b, |
2627 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1616 | 0xcf, 0x95, 0x81, 0x93, 0x48, 0xe5, 0x45, 0xde, 0x8b, 0xc7, 0x09, 0xb2, |
2628 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1617 | 0xaf, 0xf5, 0x88, 0x94, 0x85, 0x7c, 0x75, 0x9c, 0x13, 0xc7, 0x9c, 0x6e, |
2629 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1618 | 0xf0, 0x0f, 0xb4, 0x2e, 0xa3, 0x0d, 0xda, 0x45, 0x43, 0xc4, 0xfa, 0x4e, |
2630 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1619 | 0x9a, 0xca, 0xb1, 0xbe, 0x30, 0x9e, 0xdb, 0xb0, 0x77, 0x9c, 0x8e, 0x9c, |
2631 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1620 | 0x67, 0x7e, 0xc8, 0xf4, 0x3c, 0x70, 0x9c, 0x9e, 0xd7, 0xd5, 0x22, 0xe9, |
2632 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1621 | 0xe0, 0x8d, 0x85, 0x79, 0x9d, 0x54, 0x56, 0x3d, 0x6f, 0x24, 0x37, 0xa0, |
2633 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1622 | 0xbe, 0xec, 0xeb, 0xf9, 0x80, 0x9a, 0x11, 0xa8, 0xda, 0x61, 0xfe, 0x21, |
2634 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1623 | 0x70, 0xd0, 0x4b, 0x44, 0xfc, 0xfe, 0xcf, 0x64, 0x4d, 0xb2, 0xfd, 0x24, |
2635 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1624 | 0xf9, 0x2c, 0xd8, 0xd3, 0x4e, 0xe0, 0xcf, 0x36, 0x97, 0x86, 0x5c, 0x52, |
2636 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1625 | 0xbe, 0x1d, 0x8c, 0xdc, 0xd5, 0x0e, 0xf4, 0xf1, 0x16, 0x6c, 0xa6, 0xb6, |
2637 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1626 | 0x2c, 0xb3, 0xfd, 0xe5, 0xa0, 0x6e, 0xb4, 0xcd, 0x80, 0x6e, 0xf9, 0xb2, |
2638 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1627 | 0xd9, 0x8f, 0xfd, 0x3d, 0xef, 0xcb, 0xb9, 0x00, 0xa7, 0xda, 0xbc, 0x85, |
2639 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1628 | 0xb5, 0x32, 0xf8, 0xae, 0x1f, 0xd7, 0xfc, 0xf3, 0xf7, 0x87, 0xe7, 0xab, |
2640 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1629 | 0x34, 0x05, 0xbc, 0x6b, 0x4d, 0x89, 0x0a, 0x2a, 0xef, 0xf1, 0x2e, 0xf7, |
2641 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1630 | 0x97, 0x83, 0xbd, 0xa0, 0xb7, 0xe7, 0xfa, 0xd4, 0x7d, 0xb0, 0x25, 0xb6, |
2642 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1631 | 0xb1, 0xda, 0x0a, 0xf3, 0x18, 0xfb, 0xe4, 0x99, 0xc7, 0xaa, 0x8f, 0xa3, |
2643 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1632 | 0x3d, 0xcf, 0x7a, 0x44, 0x69, 0x89, 0x58, 0xcf, 0x2f, 0xb3, 0x2e, 0x41, |
2644 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1633 | 0x3f, 0x03, 0xbd, 0xaa, 0x38, 0x2c, 0xff, 0x2f, 0x85, 0xf6, 0x29, 0x52, |
2645 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1634 | 0x7f, 0x86, 0xf5, 0xfd, 0x05, 0x2a, 0xc0, 0xc6, 0xa7, 0x70, 0xd2, 0x22, |
2646 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1635 | 0x68, 0x5a, 0x68, 0xf6, 0x81, 0x57, 0x6d, 0xbb, 0x83, 0x7c, 0x07, 0xff, |
2647 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1636 | 0xc7, 0x0b, 0xe6, 0x77, 0x03, 0x27, 0xb6, 0x99, 0x9a, 0x2a, 0x52, 0x15, |
2648 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1637 | 0x3f, 0xe8, 0x8d, 0xa1, 0x67, 0x6d, 0x49, 0x9f, 0x28, 0x03, 0x37, 0xe8, |
2649 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1638 | 0x3d, 0xd9, 0x7b, 0x58, 0x9f, 0x31, 0xc7, 0xa5, 0xa1, 0xb6, 0x9d, 0x2d, |
2650 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1639 | 0x38, 0x2c, 0xa7, 0x2e, 0x9c, 0xdb, 0xc6, 0x49, 0x46, 0x1f, 0xef, 0xa3, |
2651 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1640 | 0x40, 0xe7, 0xdb, 0x3a, 0xc3, 0xfa, 0xa7, 0x5b, 0xeb, 0xd4, 0x41, 0xd9, |
2652 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1641 | 0x0c, 0x7c, 0xd9, 0xbc, 0x08, 0xf9, 0xa5, 0xe1, 0x53, 0x64, 0x7a, 0xba, |
2653 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1642 | 0x99, 0xa4, 0x63, 0x4d, 0xc6, 0xaf, 0x08, 0xbb, 0x83, 0x6f, 0x9b, 0x1f, |
2654 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1643 | 0x85, 0x9d, 0x8d, 0x0b, 0x23, 0xb0, 0x89, 0x47, 0x17, 0x19, 0x27, 0x8f, |
2655 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1644 | 0xd8, 0x2e, 0x8b, 0xcb, 0x65, 0x61, 0xd4, 0x2d, 0x09, 0xe3, 0xcb, 0x6c, |
2656 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1645 | 0x27, 0x6c, 0x23, 0xba, 0xfa, 0x38, 0x31, 0x0d, 0x98, 0xe3, 0xfe, 0x22, |
2657 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1646 | 0xc1, 0xb6, 0x5a, 0x3b, 0x17, 0x07, 0x1e, 0xdb, 0x80, 0x4f, 0x37, 0x6c, |
2658 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1647 | 0x0f, 0xfa, 0x65, 0xe8, 0x13, 0xac, 0x33, 0xc5, 0x8c, 0xa1, 0xfd, 0x25, |
2659 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1648 | 0x7d, 0x9c, 0x0f, 0x23, 0x1b, 0x7c, 0x18, 0x00, 0x4f, 0x3e, 0xcc, 0x87, |
2660 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1649 | 0xfa, 0xc7, 0xf9, 0x60, 0x55, 0xc1, 0x87, 0x3a, 0xfc, 0x50, 0xdd, 0x65, |
2661 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1650 | 0x9a, 0x3d, 0x12, 0xf7, 0x10, 0xb4, 0x93, 0xf6, 0x8a, 0x26, 0xeb, 0x28, |
2662 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1651 | 0xdb, 0x49, 0x46, 0x9b, 0xc6, 0x0e, 0x4b, 0x4e, 0xb7, 0x6f, 0x1b, 0xa3, |
2663 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1652 | 0x3e, 0x2f, 0x7e, 0x17, 0xbd, 0x4c, 0xdf, 0x1d, 0x9a, 0xc7, 0x17, 0xd9, |
2664 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1653 | 0xdf, 0x40, 0xcf, 0x33, 0x86, 0x7a, 0x88, 0xee, 0xd0, 0xbd, 0xef, 0x0e, |
2665 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1654 | 0xdd, 0x38, 0xa7, 0xed, 0x83, 0x98, 0xe6, 0xb6, 0x3f, 0x66, 0x5d, 0x79, |
2666 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1655 | 0xc3, 0x93, 0x0c, 0x03, 0x32, 0x60, 0x7d, 0x61, 0x1c, 0x74, 0xf5, 0xcb, |
2667 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1656 | 0xa0, 0xa7, 0x02, 0xbf, 0xc0, 0xb6, 0x54, 0xf6, 0xe7, 0x75, 0x50, 0xb9, |
2668 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1657 | 0x27, 0x98, 0x3f, 0xd5, 0xf4, 0xfe, 0x4b, 0x34, 0x3f, 0xf0, 0xec, 0xbc, |
2669 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1658 | 0x11, 0xda, 0xb8, 0x42, 0x7f, 0xb2, 0xa8, 0x97, 0x35, 0xa1, 0x9b, 0xaa, |
2670 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1659 | 0xf7, 0xc3, 0xaf, 0x34, 0xd9, 0x3e, 0x76, 0xde, 0xc3, 0x97, 0xa5, 0x43, |
2671 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1660 | 0x5f, 0xf6, 0x3e, 0x78, 0xcf, 0xb1, 0xe7, 0xe8, 0x07, 0xeb, 0x49, 0x7e, |
2672 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1661 | 0x66, 0xd4, 0x09, 0x2a, 0x71, 0xbc, 0xd9, 0x21, 0xfa, 0xfe, 0xbb, 0x8f, |
2673 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1662 | 0x63, 0x41, 0x55, 0x36, 0xe3, 0x54, 0xed, 0xa1, 0xaa, 0x64, 0xb2, 0x1d, |
2674 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1663 | 0xb1, 0x6d, 0xb4, 0xf1, 0xde, 0x1e, 0xc6, 0xdd, 0x41, 0x89, 0x0c, 0x1e, |
2675 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1664 | 0x47, 0x8c, 0x68, 0x32, 0x0d, 0xef, 0x87, 0xf2, 0x60, 0x7f, 0x4a, 0xb1, |
2676 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1665 | 0x40, 0xdf, 0xf6, 0xc3, 0x5f, 0x32, 0x3f, 0x37, 0xeb, 0x0a, 0xfb, 0x51, |
2677 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1666 | 0xd2, 0x44, 0x83, 0xfd, 0x28, 0xa9, 0x92, 0x79, 0x50, 0xb0, 0x16, 0xbf, |
2678 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1667 | 0x26, 0x58, 0xe0, 0x9b, 0x05, 0xbe, 0x59, 0xe0, 0x9b, 0x0d, 0xbe, 0x15, |
2679 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1668 | 0x5c, 0xc6, 0x85, 0xf1, 0x08, 0xf6, 0x2f, 0x06, 0xfb, 0x03, 0xc7, 0x9d, |
2680 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1669 | 0x54, 0xf1, 0xed, 0x9b, 0x69, 0x85, 0x3f, 0xf6, 0x7d, 0xc1, 0xa8, 0x10, |
2681 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1670 | 0xf8, 0x02, 0xde, 0x6f, 0x1c, 0xeb, 0x1f, 0x47, 0x8c, 0xb3, 0x44, 0xd1, |
2682 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1671 | 0xb8, 0xc3, 0x8f, 0xfa, 0x26, 0x7e, 0x4c, 0x3b, 0xcc, 0x1f, 0x9e, 0xcf, |
2683 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1672 | 0x76, 0xec, 0x40, 0xe6, 0x6d, 0x9e, 0xec, 0x07, 0x0e, 0x9d, 0x4c, 0x77, |
2684 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1673 | 0x48, 0x07, 0xef, 0xdf, 0x1b, 0xee, 0x7f, 0x00, 0x7b, 0xb2, 0xdd, 0xde, |
2685 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1674 | 0xed, 0x5c, 0x3e, 0x93, 0xe3, 0xe8, 0x27, 0xd1, 0x83, 0x3c, 0x02, 0x7e, |
2686 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1675 | 0x66, 0x0d, 0x76, 0x76, 0x53, 0x4a, 0xd1, 0xeb, 0xbb, 0x6f, 0x20, 0xb7, |
2687 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1676 | 0xa0, 0xea, 0x03, 0xa6, 0xa7, 0xc9, 0xe6, 0xfb, 0x5e, 0x3d, 0x0f, 0xdf, |
2688 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1677 | 0x69, 0xea, 0x29, 0x5b, 0x1a, 0xa4, 0x37, 0xdc, 0x2c, 0xfd, 0x9d, 0x6b, |
2689 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1678 | 0xd0, 0xdf, 0xba, 0x1a, 0xbd, 0xea, 0xa6, 0xe9, 0x6f, 0xdc, 0x14, 0xfd, |
2690 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1679 | 0xb5, 0xdb, 0xce, 0x43, 0x92, 0xac, 0x47, 0x89, 0xa2, 0x7b, 0xb7, 0x5c, |
2691 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1680 | 0x08, 0x3a, 0x8e, 0xbd, 0xec, 0xbc, 0x5c, 0x96, 0x4d, 0x3f, 0x3f, 0x98, |
2692 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1681 | 0x98, 0x6e, 0x90, 0xb2, 0xd3, 0xa0, 0xed, 0xf7, 0x23, 0xef, 0x49, 0x9a, |
2693 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1682 | 0xb4, 0xe3, 0x3e, 0x3c, 0x7b, 0x4d, 0xb2, 0x7a, 0xcc, 0x53, 0x9e, 0x68, |
2694 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1683 | 0xb0, 0x1e, 0x75, 0x0f, 0x4f, 0xe5, 0xe3, 0x8c, 0xfb, 0xc4, 0x34, 0xfc, |
2695 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1684 | 0x91, 0x8d, 0xb3, 0xaa, 0xd0, 0xc5, 0xaa, 0x7b, 0xe8, 0xfe, 0x20, 0x17, |
2696 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1685 | 0x7a, 0x2f, 0xcc, 0x89, 0x38, 0xaf, 0x5a, 0x7f, 0x6a, 0xc2, 0x60, 0x3f, |
2697 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1686 | 0x2b, 0x6c, 0xf2, 0xb3, 0x24, 0x14, 0x41, 0x53, 0x1d, 0xb8, 0x16, 0x41, |
2698 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1687 | 0xe7, 0x57, 0x5d, 0x45, 0x28, 0x9c, 0xef, 0xa5, 0xe9, 0x45, 0x8e, 0x55, |
2699 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1688 | 0x3c, 0x4f, 0x09, 0x73, 0x19, 0x7e, 0xef, 0xc0, 0x3b, 0x21, 0x7e, 0x14, |
2700 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1689 | 0xb6, 0x53, 0x42, 0x7f, 0x73, 0x82, 0x9c, 0x30, 0x17, 0x89, 0xd1, 0x05, |
2701 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1690 | 0x5f, 0x77, 0xb8, 0xdf, 0x2a, 0xfd, 0xb0, 0xff, 0x4e, 0xff, 0xf9, 0x8d, |
2702 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1691 | 0xfe, 0x72, 0xe9, 0xeb, 0x1b, 0xfd, 0xef, 0xa8, 0x01, 0x4e, 0xc3, 0xc2, |
2703 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1692 | 0xe3, 0xee, 0xf3, 0x61, 0xdf, 0x6d, 0xf0, 0xd3, 0xf3, 0xea, 0x88, 0x27, |
2704 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1693 | 0x35, 0xe3, 0x36, 0x72, 0x1f, 0xf6, 0x29, 0x5b, 0xf1, 0x21, 0x1f, 0xf2, |
2705 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1694 | 0x1f, 0xaa, 0x2d, 0xb1, 0x9c, 0x14, 0x0a, 0xf6, 0xe4, 0xf1, 0x4e, 0xf8, |
2706 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1695 | 0x92, 0xdb, 0x68, 0x73, 0xec, 0x6a, 0xfb, 0x31, 0x9e, 0xc3, 0xeb, 0x6f, |
2707 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1696 | 0xdd, 0x43, 0x96, 0x2a, 0x64, 0xb9, 0x35, 0x79, 0xd5, 0x1a, 0xa7, 0x42, |
2708 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1697 | 0x9f, 0xd0, 0x3d, 0x6c, 0x43, 0x2e, 0x12, 0xe4, 0x52, 0x83, 0x5c, 0x0a, |
2709 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1698 | 0xf7, 0x94, 0x0b, 0xce, 0xd8, 0xd0, 0x29, 0xc6, 0xa3, 0x2b, 0x3c, 0x9b, |
2710 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1699 | 0x14, 0xd9, 0xac, 0x96, 0xea, 0xc6, 0xa7, 0x28, 0x66, 0x30, 0x1e, 0x06, |
2711 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1700 | 0xf0, 0x38, 0x8a, 0xb5, 0x1c, 0xc3, 0x48, 0x89, 0x99, 0x2c, 0xcf, 0xdc, |
2712 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1701 | 0x13, 0xb6, 0x71, 0xab, 0xb4, 0xe0, 0xdc, 0x2a, 0x5d, 0x34, 0xf8, 0xfd, |
2713 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1702 | 0xf6, 0x64, 0x90, 0x37, 0x77, 0x3f, 0x89, 0xbc, 0x19, 0xeb, 0xd9, 0x1f, |
2714 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1703 | 0x72, 0xff, 0x30, 0xe6, 0x71, 0x7c, 0xa0, 0x43, 0x35, 0xfc, 0xea, 0xfe, |
2715 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1704 | 0xdc, 0x6b, 0x4f, 0xf0, 0xdc, 0x4e, 0x53, 0x9e, 0xfc, 0x35, 0x9e, 0x1d, |
2716 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1705 | 0xa6, 0xf6, 0xe4, 0x4f, 0x0d, 0xde, 0x77, 0x78, 0xf2, 0xa2, 0xbf, 0x07, |
2717 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1706 | 0x62, 0xa6, 0xbf, 0x36, 0xfb, 0x24, 0xaf, 0x7d, 0x0e, 0x3e, 0xf6, 0x0c, |
2718 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1707 | 0xe2, 0xcb, 0x69, 0x47, 0x3b, 0x54, 0xc1, 0x6f, 0x8a, 0x71, 0x6a, 0xf2, |
2719 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1708 | 0xb8, 0x85, 0x71, 0x19, 0xb1, 0x90, 0xdb, 0x0a, 0x1d, 0xc3, 0xbc, 0xa7, |
2720 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1709 | 0x31, 0xef, 0xa8, 0x33, 0x8e, 0xbc, 0xbd, 0x4d, 0xd7, 0xbf, 0xc5, 0x0b, |
2721 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1710 | 0xf3, 0xec, 0xcf, 0x91, 0xed, 0xaf, 0xfc, 0x7b, 0xdc, 0x86, 0x5f, 0x16, |
2722 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1711 | 0x57, 0x6e, 0xc6, 0x0b, 0xa0, 0x5b, 0x5a, 0xf9, 0x45, 0xbc, 0x08, 0x3d, |
2723 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1712 | 0x13, 0x0d, 0x09, 0x7e, 0xf9, 0x33, 0x54, 0x53, 0x3d, 0x7a, 0x19, 0xf1, |
2724 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1713 | 0xab, 0x96, 0x85, 0xbf, 0x82, 0x34, 0x45, 0x03, 0x7e, 0x4c, 0x25, 0xa5, |
2725 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1714 | 0xcb, 0x3c, 0xa9, 0x52, 0x57, 0x3e, 0x6e, 0x23, 0xde, 0xd4, 0x54, 0x09, |
2726 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1715 | 0xfd, 0xfd, 0x78, 0x6e, 0xee, 0xff, 0x65, 0x1c, 0x7e, 0x0b, 0x3e, 0x82, |
2727 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1716 | 0x14, 0x3b, 0xdf, 0x8d, 0xfd, 0xbf, 0x8d, 0x7e, 0x4c, 0xc8, 0x6c, 0xf4, |
2728 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1717 | 0x3f, 0x1b, 0xf4, 0xdf, 0x02, 0x2e, 0xbc, 0x8e, 0xe3, 0x27, 0x29, 0x53, |
2729 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1718 | 0x79, 0x15, 0x38, 0xf0, 0xdc, 0xa4, 0x3f, 0xb7, 0x38, 0xcf, 0x3c, 0xa8, |
2730 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1719 | 0x96, 0x16, 0x8c, 0x34, 0x15, 0xe6, 0x92, 0x34, 0x3a, 0xa7, 0xd2, 0xd8, |
2731 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1720 | 0x9c, 0x3e, 0xd1, 0x62, 0xfb, 0x01, 0xcd, 0x84, 0x1c, 0x41, 0x5c, 0x21, |
2732 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1721 | 0x50, 0xac, 0xa7, 0x9e, 0xa6, 0xbe, 0xd4, 0x31, 0xfa, 0x6f, 0x0f, 0xb1, |
2733 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1722 | 0x08, 0x71, 0xa8, 0x9b, 0x64, 0x7f, 0x9f, 0x54, 0xfb, 0x4c, 0x96, 0xd1, |
2734 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1723 | 0x87, 0xce, 0x2d, 0xce, 0xdf, 0x6b, 0x5f, 0x28, 0xf1, 0x4a, 0xea, 0x23, |
2735 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1724 | 0xfb, 0xbe, 0x1b, 0xee, 0xab, 0x62, 0xdf, 0x34, 0xf6, 0x64, 0x1a, 0xf5, |
2736 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1725 | 0xf8, 0xc8, 0x79, 0xb2, 0x3a, 0x81, 0x5f, 0x31, 0x83, 0x98, 0x8f, 0x7d, |
2737 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1726 | 0xce, 0xcc, 0xb1, 0xde, 0xd3, 0x4e, 0xfc, 0x06, 0x63, 0x94, 0xc9, 0x2e, |
2738 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1727 | 0x23, 0x27, 0x18, 0xf1, 0xf7, 0x08, 0xf2, 0x05, 0x71, 0x65, 0x10, 0xf9, |
2739 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1728 | 0xda, 0x3b, 0xc0, 0x87, 0xe3, 0x18, 0xd3, 0x2c, 0x83, 0xde, 0x41, 0xe4, |
2740 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1729 | 0x09, 0x9c, 0xe3, 0x7b, 0xa7, 0xec, 0x1c, 0xda, 0xcb, 0x5a, 0xbc, 0x00, |
2741 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1730 | 0xdb, 0x16, 0x4d, 0x7a, 0x50, 0xf2, 0x7d, 0x2c, 0xcb, 0x65, 0x10, 0x72, |
2742 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1731 | 0x62, 0xbc, 0x73, 0x90, 0x13, 0xf3, 0x68, 0x38, 0x5e, 0x6c, 0x32, 0x8f, |
2743 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1732 | 0x08, 0xf8, 0x68, 0xb0, 0x27, 0xd9, 0xcf, 0xf3, 0xc5, 0x15, 0x0b, 0xf3, |
2744 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1733 | 0x7e, 0xac, 0x72, 0x2e, 0x66, 0x1b, 0xdc, 0x86, 0xed, 0xac, 0x8c, 0x63, |
2745 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1734 | 0x2e, 0xb7, 0x1f, 0xc6, 0xbe, 0x7d, 0xb9, 0x1a, 0x75, 0xe4, 0x9e, 0x86, |
2746 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1735 | 0xdd, 0x8a, 0xf9, 0x01, 0xc4, 0x68, 0x01, 0xb9, 0xa0, 0xe7, 0x75, 0xe4, |
2747 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1736 | 0xbf, 0x00, 0x7a, 0x98, 0x0e, 0xe8, 0xf5, 0x2c, 0xf3, 0x95, 0xfe, 0x40, |
2748 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1737 | 0xe4, 0x5c, 0x2d, 0xdf, 0xce, 0x6b, 0x38, 0x9e, 0xf3, 0xf9, 0x88, 0x23, |
2749 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1738 | 0x8d, 0x3d, 0x88, 0xa5, 0xfe, 0xd9, 0xd0, 0xb1, 0x71, 0x2a, 0x34, 0x3e, |
2750 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1739 | 0x8b, 0x9c, 0x93, 0x6d, 0x67, 0x9b, 0x60, 0x9f, 0x67, 0x1a, 0x09, 0xb1, |
2751 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1740 | 0x66, 0x8d, 0x2a, 0x0d, 0x39, 0x6c, 0xbf, 0x8a, 0xb6, 0x12, 0xb6, 0xd7, |
2752 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1741 | 0xd1, 0xee, 0x0e, 0xdb, 0xd7, 0xd0, 0x56, 0xc3, 0xf6, 0xcf, 0xd0, 0x4e, |
2753 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1742 | 0x86, 0xed, 0x9f, 0xa3, 0x9d, 0x0a, 0xdb, 0x37, 0xd1, 0x4e, 0x87, 0xed, |
2754 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1743 | 0x5b, 0x68, 0x6b, 0x61, 0xfb, 0x3d, 0xb4, 0x13, 0xb0, 0x73, 0x03, 0xef, |
2755 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1744 | 0x37, 0x50, 0x2b, 0x66, 0xf1, 0xfc, 0x57, 0xe0, 0x36, 0x08, 0xde, 0x64, |
2756 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1745 | 0xc1, 0x8f, 0x5e, 0x8c, 0xe5, 0xd0, 0x87, 0x1c, 0xb1, 0x91, 0xc7, 0xd3, |
2757 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1746 | 0xc1, 0x18, 0x95, 0x61, 0x7b, 0x18, 0x1f, 0x2f, 0x16, 0x1a, 0x26, 0x9e, |
2758 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1747 | 0x6c, 0x0f, 0xba, 0x4a, 0xc2, 0x65, 0xd8, 0xb9, 0xef, 0x63, 0x72, 0xb6, |
2759 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1748 | 0x34, 0x09, 0xdb, 0x9e, 0xa0, 0x7f, 0x74, 0xf7, 0xd3, 0x6b, 0xee, 0x38, |
2760 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1749 | 0xe2, 0x46, 0x11, 0x71, 0xc3, 0x42, 0xdc, 0x30, 0x11, 0x37, 0x86, 0x11, |
2761 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1750 | 0x37, 0xf2, 0x88, 0x1b, 0x39, 0xc4, 0x0d, 0xa2, 0x33, 0x7e, 0x8c, 0x4a, |
2762 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1751 | 0x2a, 0xa8, 0x51, 0x15, 0xcb, 0x2d, 0x82, 0xbf, 0x13, 0x90, 0xcd, 0x24, |
2763 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1752 | 0x78, 0x7d, 0x38, 0x3e, 0xd2, 0xcc, 0xc3, 0x9f, 0x69, 0xf0, 0x11, 0x69, |
2764 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1753 | 0xf8, 0xf2, 0x1c, 0x6a, 0x13, 0xa2, 0x2b, 0xb3, 0x1a, 0xfc, 0x8f, 0x47, |
2765 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1754 | 0x45, 0xc4, 0xfe, 0x69, 0x15, 0xb8, 0x19, 0xbb, 0x7c, 0x9b, 0x91, 0xcc, |
2766 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1755 | 0x2f, 0xf6, 0x50, 0xd7, 0x20, 0xe8, 0x39, 0x8b, 0xbe, 0x14, 0xf6, 0x63, |
2767 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1756 | 0xbe, 0xde, 0x2a, 0xd9, 0x86, 0x46, 0x0b, 0x6e, 0x1c, 0xfe, 0x9f, 0xdf, |
2768 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1757 | 0xe3, 0xcc, 0xe3, 0x43, 0x4f, 0x19, 0x4c, 0x03, 0xea, 0x3c, 0x23, 0xad, |
2769 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1758 | 0x14, 0x1c, 0x81, 0x24, 0x93, 0x9f, 0xed, 0x1c, 0xe2, 0xcf, 0x90, 0x43, |
2770 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1759 | 0x74, 0x41, 0x06, 0x55, 0xc4, 0x05, 0x9d, 0xf3, 0x0b, 0xe8, 0xf2, 0x27, |
2771 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1760 | 0xcd, 0xff, 0x1e, 0xe6, 0xef, 0xc5, 0xd9, 0x3c, 0x8f, 0xcf, 0x39, 0x85, |
2772 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1761 | 0xfa, 0xc1, 0xea, 0x91, 0x68, 0x3d, 0x25, 0xa1, 0x9e, 0x28, 0xd0, 0x59, |
2773 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1762 | 0x2a, 0x00, 0x9f, 0x82, 0xdb, 0xbe, 0x07, 0xb0, 0x0e, 0x05, 0xfe, 0x6c, |
2774 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1763 | 0xe2, 0xd0, 0xb7, 0x0d, 0x0b, 0xeb, 0x18, 0x3f, 0xd6, 0x5b, 0xe0, 0xbe, |
2775 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1764 | 0xb1, 0xe7, 0x05, 0xec, 0xf9, 0x4f, 0x49, 0xea, 0x9a, 0x0c, 0xfc, 0x91, |
2776 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1765 | 0x5f, 0xf3, 0xca, 0xc2, 0x48, 0xf3, 0x2c, 0xf8, 0xd3, 0x87, 0x1a, 0x05, |
2777 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1766 | 0x7e, 0xa4, 0xd4, 0x02, 0x9f, 0xda, 0xf3, 0x5f, 0xc1, 0x7c, 0x7e, 0xf7, |
2778 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1767 | 0xef, 0x0e, 0x4a, 0xd2, 0xea, 0x12, 0xe6, 0x69, 0xac, 0x3f, 0x25, 0xb9, |
2779 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1768 | 0xff, 0x86, 0xf7, 0xa2, 0x91, 0xa7, 0x5d, 0xab, 0xbc, 0x2e, 0x4b, 0x7d, |
2780 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1769 | 0xab, 0x37, 0xbc, 0x9a, 0xa3, 0xd1, 0x62, 0x93, 0xc0, 0xab, 0xf8, 0x6d, |
2781 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1770 | 0x8b, 0xf4, 0x35, 0x12, 0xf5, 0x59, 0x0b, 0x7a, 0x5a, 0x1c, 0x12, 0xc9, |
2782 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1771 | 0x1e, 0xea, 0x84, 0x8f, 0x32, 0x68, 0x09, 0x7c, 0xdf, 0x35, 0x63, 0xd1, |
2783 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1772 | 0x13, 0x43, 0xed, 0x7c, 0x10, 0x51, 0x0f, 0xb8, 0xee, 0x5a, 0xd5, 0x30, |
2784 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1773 | 0x87, 0x73, 0x71, 0xa6, 0x45, 0x03, 0x2f, 0x85, 0x60, 0x8d, 0x1f, 0xb3, |
2785 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1774 | 0xb8, 0x8e, 0x05, 0xdf, 0xdc, 0xb5, 0xd2, 0xd5, 0x19, 0xd4, 0x1a, 0x90, |
2786 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1775 | 0xf3, 0xae, 0x19, 0xae, 0x85, 0xb6, 0x81, 0x2f, 0x31, 0xd8, 0x06, 0xe7, |
2787 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1776 | 0xf1, 0x08, 0xf4, 0xf0, 0x87, 0x27, 0xe0, 0xf1, 0x6b, 0xcd, 0x13, 0xd0, |
2788 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1777 | 0xfb, 0x2e, 0x2a, 0xcb, 0x3e, 0x11, 0x9f, 0xc0, 0xe3, 0xff, 0xe4, 0xbc, |
2789 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1778 | 0x0e, 0xf3, 0xbf, 0x4b, 0xc5, 0xd9, 0x2e, 0xec, 0xb5, 0x9b, 0xa6, 0x93, |
2790 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1779 | 0x8c, 0x9b, 0x3e, 0x8c, 0x41, 0x2d, 0x06, 0x7e, 0xc6, 0xcd, 0x8f, 0xe6, |
2791 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1780 | 0x7d, 0x6b, 0xa5, 0x2b, 0x33, 0x6b, 0xa5, 0x6b, 0xa0, 0xbf, 0x6e, 0x70, |
2792 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1781 | 0x8d, 0x0c, 0x5d, 0x6a, 0x70, 0x6d, 0xcf, 0x79, 0xd1, 0x18, 0x74, 0x64, |
2793 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1782 | 0xbf, 0x5f, 0x33, 0xdb, 0x8b, 0x39, 0xea, 0x3b, 0x47, 0xaa, 0x68, 0x96, |
2794 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1783 | 0x84, 0x31, 0xe4, 0x45, 0x23, 0xee, 0x49, 0x7f, 0xee, 0x99, 0x06, 0xd7, |
2795 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1784 | 0x2b, 0x18, 0x5b, 0x61, 0x5d, 0x18, 0x03, 0x3e, 0x49, 0xba, 0xe8, 0xb2, |
2796 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1785 | 0x4f, 0x0a, 0xec, 0x78, 0x0c, 0xfc, 0x5a, 0xf0, 0xe9, 0x4a, 0x71, 0x1c, |
2797 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1786 | 0x47, 0xbe, 0xc1, 0xf2, 0xf9, 0x21, 0xc7, 0x41, 0xa1, 0xd3, 0x6c, 0xfb, |
2798 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1787 | 0xdb, 0x89, 0x5e, 0xe6, 0x59, 0xa1, 0x01, 0xdf, 0x3f, 0x34, 0x11, 0xe6, |
2799 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1788 | 0x1c, 0x7f, 0x8f, 0x39, 0x8c, 0x3b, 0xcd, 0x4a, 0x26, 0xce, 0xc8, 0x33, |
2800 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1789 | 0xcf, 0x38, 0xa7, 0xe4, 0x7d, 0xc1, 0x5b, 0xf0, 0x7d, 0x53, 0x6e, 0xe9, |
2801 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1790 | 0xc3, 0x74, 0x33, 0x46, 0x95, 0x59, 0xf0, 0x2e, 0x8f, 0x27, 0x9c, 0x6b, |
2802 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1791 | 0x1d, 0x7c, 0x03, 0x2d, 0xd5, 0x20, 0x9f, 0x3d, 0xc1, 0x31, 0x0d, 0xfe, |
2803 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1792 | 0x06, 0x36, 0xcd, 0x31, 0x6b, 0xe3, 0xde, 0xc9, 0xf7, 0x25, 0x32, 0x19, |
2804 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1793 | 0x41, 0xce, 0x2a, 0xe2, 0x2c, 0x3b, 0xcf, 0x7e, 0x10, 0xf8, 0xb8, 0xdf, |
2805 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1794 | 0xa5, 0xfa, 0x2c, 0xd3, 0x05, 0x1b, 0x4f, 0xb2, 0x2e, 0xfe, 0x7f, 0xf9, |
2806 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1795 | 0x38, 0xba, 0x45, 0x3e, 0x8e, 0x6e, 0x99, 0x8f, 0x12, 0xf8, 0x58, 0xd9, |
2807 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1796 | 0xe0, 0xa3, 0x82, 0x3d, 0xf8, 0x3e, 0xe1, 0xab, 0x64, 0x4d, 0x3c, 0x02, |
2808 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1797 | 0x3f, 0x0c, 0xff, 0xd1, 0x3c, 0x05, 0x9f, 0x70, 0x52, 0xb8, 0xda, 0xf0, |
2809 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1798 | 0x68, 0x1c, 0xb5, 0xb2, 0x74, 0xff, 0x66, 0xfa, 0x33, 0xa0, 0xff, 0xcf, |
2810 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1799 | 0x31, 0x5e, 0xa5, 0x6b, 0xb3, 0x94, 0x56, 0xa8, 0x7d, 0x2e, 0xed, 0x92, |
2811 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1800 | 0xe9, 0x3b, 0x74, 0x75, 0xb6, 0x8b, 0xae, 0xcf, 0x66, 0xc0, 0xeb, 0x2c, |
2812 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1801 | 0xc5, 0x7a, 0x32, 0xc3, 0x15, 0x18, 0xf1, 0xcf, 0x5a, 0xba, 0xc5, 0xba, |
2813 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1802 | 0xf8, 0xfb, 0xf3, 0x82, 0xf9, 0x70, 0xd0, 0xe7, 0xc3, 0xd8, 0x47, 0xf8, |
2814 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1803 | 0x30, 0x7e, 0x4f, 0x3e, 0x1c, 0xfc, 0x18, 0x1f, 0xc6, 0x3f, 0xc6, 0x07, |
2815 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1804 | 0xe6, 0x01, 0xf3, 0xe2, 0xd1, 0xde, 0xf0, 0xff, 0x1f, 0x7d, 0x82, 0x7d, |
2816 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1805 | 0x7c, 0x09, 0x74, 0x22, 0xa7, 0xd8, 0x19, 0xe4, 0x50, 0x9c, 0x63, 0xd5, |
2817 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1806 | 0x0c, 0xe6, 0x57, 0x60, 0xbf, 0x32, 0x72, 0xea, 0x23, 0xa1, 0xfd, 0x16, |
2818 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1807 | 0x1c, 0xe8, 0x65, 0x23, 0xe6, 0xdb, 0xaf, 0x64, 0xe6, 0xe1, 0x03, 0xaa, |
2819 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1808 | 0xa5, 0x96, 0xc3, 0xfe, 0x07, 0x6d, 0x87, 0x79, 0xda, 0x0b, 0x5a, 0x12, |
2820 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1809 | 0x54, 0x99, 0x54, 0x10, 0x5f, 0x87, 0xa1, 0xb7, 0x71, 0xdf, 0x07, 0x4a, |
2821 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1810 | 0x26, 0xeb, 0xe1, 0x7e, 0xcc, 0x3f, 0x1c, 0xe6, 0x45, 0x88, 0x73, 0x38, |
2822 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1811 | 0xa3, 0xd6, 0x38, 0x0d, 0xfc, 0xf8, 0x9c, 0x6a, 0xa9, 0xec, 0xf0, 0x9a, |
2823 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1812 | 0x34, 0x62, 0x21, 0x3f, 0x37, 0xeb, 0xb7, 0xaf, 0xef, 0xf7, 0xd2, 0x71, |
2824 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1813 | 0xe8, 0x26, 0xeb, 0xb4, 0x82, 0xdc, 0x78, 0x02, 0xf1, 0xc5, 0xd7, 0xd3, |
2825 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1814 | 0xec, 0x02, 0xb1, 0xdf, 0x7f, 0x06, 0x75, 0xd1, 0x61, 0xfc, 0x34, 0x1a, |
2826 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1815 | 0x71, 0x03, 0x9b, 0x5a, 0xf2, 0xcf, 0xfc, 0xb0, 0x4f, 0xaa, 0x39, 0xeb, |
2827 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1816 | 0xc8, 0xdf, 0x0d, 0xec, 0xcb, 0xe7, 0x56, 0xc1, 0x1b, 0x09, 0xe7, 0x72, |
2828 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1817 | 0x5f, 0x37, 0xe2, 0x00, 0xf8, 0xe4, 0xfe, 0x07, 0xfa, 0x97, 0xe0, 0x1f, |
2829 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1818 | 0x39, 0x2f, 0x68, 0xe3, 0x8e, 0x1c, 0xc2, 0xe1, 0x78, 0x9d, 0x07, 0xcd, |
2830 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1819 | 0x9c, 0x63, 0x73, 0x2e, 0x81, 0xfc, 0x63, 0xe9, 0x4d, 0xf4, 0x0d, 0xd3, |
2831 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1820 | 0xe9, 0xa1, 0x2c, 0xe4, 0xc3, 0x7d, 0x0f, 0x84, 0x7d, 0x3c, 0x8f, 0x94, |
2832 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1821 | 0x07, 0x4d, 0xfd, 0x07, 0x55, 0xdf, 0xaf, 0x43, 0x0f, 0x51, 0xf7, 0xd5, |
2833 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1822 | 0x96, 0x90, 0x63, 0x00, 0xa7, 0xca, 0x6a, 0x16, 0xb9, 0x3c, 0xdf, 0xab, |
2834 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1823 | 0xe9, 0x97, 0x91, 0x07, 0x83, 0x27, 0x0a, 0xf5, 0x1a, 0xa5, 0xd0, 0x0f, |
2835 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1824 | 0xe7, 0x40, 0x1f, 0xdf, 0x3d, 0xf5, 0x21, 0xf7, 0x91, 0xc0, 0x08, 0xd8, |
2836 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1825 | 0xe9, 0xaa, 0x44, 0x7b, 0xe5, 0x01, 0xb5, 0x46, 0xff, 0x80, 0xb9, 0x32, |
2837 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1826 | 0x95, 0x57, 0x39, 0x87, 0x90, 0xe9, 0xc8, 0x2a, 0xd1, 0x5b, 0x33, 0xec, |
2838 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1827 | 0x97, 0x19, 0xd8, 0x2f, 0xb3, 0x7f, 0x7d, 0xd0, 0x1f, 0x7b, 0x6b, 0x06, |
2839 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1828 | 0x35, 0xf8, 0xcc, 0x00, 0xc7, 0xb0, 0x75, 0x11, 0xbc, 0x44, 0xee, 0xc3, |
2840 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1829 | 0xf9, 0xf9, 0x5d, 0xee, 0x98, 0xda, 0xf7, 0x4b, 0x0a, 0x55, 0x66, 0xf8, |
2841 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1830 | 0x6e, 0x49, 0xc6, 0xf9, 0x5c, 0x5b, 0x6c, 0x03, 0x7e, 0x02, 0xa1, 0xee, |
2842 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1831 | 0x12, 0x38, 0xa6, 0x09, 0xd0, 0xa1, 0x5d, 0x90, 0x3d, 0xf8, 0x1f, 0xb6, |
2843 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1832 | 0xdb, 0xfa, 0xf4, 0x2f, 0xd0, 0x27, 0x9e, 0x27, 0x6f, 0xc2, 0x25, 0x33, |
2844 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1833 | 0x6b, 0x8b, 0x1c, 0x1f, 0x3e, 0x0d, 0xdb, 0xb3, 0xe2, 0x63, 0xcd, 0x0e, |
2845 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1834 | 0x6a, 0xf5, 0xb2, 0x3d, 0xb0, 0x5e, 0x5c, 0x66, 0x9d, 0xc0, 0x19, 0xd0, |
2846 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1835 | 0xa1, 0x19, 0xae, 0xe7, 0x65, 0xcc, 0xbb, 0x2f, 0x9c, 0xc7, 0xfc, 0xfe, |
2847 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1836 | 0x1e, 0x4d, 0x0f, 0xa9, 0x42, 0x59, 0x0d, 0xe2, 0x45, 0x6d, 0xa8, 0x03, |
2848 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1837 | 0x63, 0x22, 0x1d, 0x7c, 0x38, 0x8f, 0xb5, 0x9c, 0x53, 0xc5, 0x85, 0xc0, |
2849 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1838 | 0x6f, 0x71, 0x1f, 0xdf, 0xd7, 0xa9, 0x54, 0xbe, 0xd4, 0x4b, 0x95, 0x4b, |
2850 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1839 | 0x0a, 0xf8, 0x02, 0x44, 0x17, 0x82, 0x7d, 0xd8, 0x17, 0x1c, 0x87, 0xdc, |
2851 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1840 | 0xc4, 0x73, 0x0a, 0xc5, 0xce, 0x21, 0x87, 0xbc, 0xd0, 0x45, 0x1d, 0x17, |
2852 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1841 | 0xfa, 0x49, 0xba, 0xa0, 0x73, 0x7e, 0xa8, 0x9d, 0x81, 0x0c, 0x8f, 0x50, |
2853 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1842 | 0x9e, 0x9e, 0x73, 0x07, 0x39, 0xc7, 0xc3, 0x39, 0x5c, 0xe7, 0x25, 0x49, |
2854 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1843 | 0x42, 0xf2, 0x2f, 0xbe, 0x68, 0xd1, 0x8b, 0x43, 0xc0, 0x2b, 0x8f, 0xf6, |
2855 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1844 | 0x8f, 0x91, 0xc7, 0xbb, 0x23, 0xf7, 0x71, 0xcc, 0x96, 0xcd, 0x3e, 0xc8, |
2856 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1845 | 0x16, 0x74, 0xe5, 0x1e, 0xf2, 0xef, 0x44, 0x5f, 0x1c, 0x62, 0x7a, 0x34, |
2857 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1846 | 0xd0, 0x52, 0x87, 0xae, 0xf3, 0x3d, 0x57, 0x17, 0xd9, 0x32, 0xeb, 0x32, |
2858 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1847 | 0xf2, 0xaa, 0x0b, 0x75, 0x9a, 0x6a, 0xe8, 0x90, 0x59, 0x1f, 0xf4, 0x02, |
2859 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1848 | 0x32, 0x4b, 0x73, 0x3f, 0xef, 0x2d, 0x84, 0xfb, 0xde, 0xd1, 0xf7, 0x17, |
2860 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1849 | 0xef, 0xad, 0xef, 0x3e, 0xd4, 0x9b, 0x8f, 0xc0, 0x67, 0xa3, 0x2e, 0x32, |
2861 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1850 | 0xe0, 0xd3, 0x55, 0xe4, 0x72, 0x06, 0xbf, 0x07, 0x77, 0x95, 0x15, 0xe4, |
2862 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1851 | 0x85, 0xfc, 0x5e, 0x6b, 0xdd, 0xcd, 0x77, 0x07, 0xf6, 0x7d, 0x06, 0x3c, |
2863 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1852 | 0xba, 0x32, 0xf7, 0x00, 0x5d, 0x9d, 0x53, 0xe8, 0x5a, 0x43, 0xcf, 0x16, |
2864 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1853 | 0xa8, 0x83, 0xaa, 0xc9, 0x34, 0x5d, 0x5f, 0x6a, 0xe7, 0x93, 0x22, 0xf4, |
2865 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1854 | 0xc4, 0x22, 0xce, 0xcd, 0xaf, 0x2c, 0x55, 0x4b, 0x37, 0x76, 0xa7, 0x49, |
2866 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1855 | 0x7e, 0x09, 0xb6, 0xfd, 0x92, 0xae, 0xd5, 0xc0, 0xe7, 0xba, 0xe1, 0xa2, |
2867 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1856 | 0x56, 0xe3, 0x3a, 0x32, 0x05, 0xbb, 0xd3, 0x53, 0x2d, 0xca, 0x90, 0xb4, |
2868 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1857 | 0xa0, 0xd0, 0xaf, 0x66, 0x74, 0x8d, 0x75, 0xee, 0xa2, 0x81, 0x7e, 0x37, |
2869 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1858 | 0x7e, 0x7b, 0x3d, 0xd0, 0x43, 0xf4, 0xf5, 0xa3, 0xbe, 0xd5, 0xb3, 0x9a, |
2870 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1859 | 0xd8, 0x4d, 0x6f, 0x43, 0x27, 0xca, 0x7e, 0xdf, 0x47, 0xf7, 0xbc, 0x1e, |
2871 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1860 | 0xee, 0x59, 0x2d, 0x5d, 0xe1, 0x3a, 0x68, 0x86, 0x75, 0xbe, 0x17, 0xfe, |
2872 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1861 | 0x03, 0xef, 0x6e, 0x07, 0x95, 0x27, 0x11, 0xa3, 0x66, 0x1e, 0xa5, 0xc2, |
2873 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1862 | 0x90, 0x18, 0xd0, 0xed, 0xf3, 0x82, 0xfb, 0xf8, 0x7e, 0xb2, 0x76, 0x1f, |
2874 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1863 | 0xdb, 0xb2, 0xb8, 0x0a, 0xbd, 0x3a, 0xc8, 0x7a, 0x80, 0xdc, 0x0e, 0x39, |
2875 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1864 | 0x04, 0xfb, 0x4e, 0x09, 0x39, 0x44, 0xc1, 0x0d, 0x74, 0xa3, 0x75, 0x30, |
2876 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1865 | 0x49, 0xc7, 0x5e, 0x62, 0x19, 0x61, 0x6c, 0x43, 0xef, 0x36, 0xee, 0xc4, |
2877 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1866 | 0x31, 0x66, 0xd0, 0xf1, 0xef, 0xb7, 0x73, 0x4a, 0xb6, 0xbd, 0x34, 0xe4, |
2878 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1867 | 0xa1, 0xa3, 0xf6, 0xe8, 0x53, 0x2b, 0xbe, 0x4f, 0x81, 0x4e, 0xa4, 0x02, |
2879 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1868 | 0x19, 0xd4, 0x30, 0x36, 0xed, 0x4e, 0xc2, 0x27, 0xc6, 0xe8, 0xe6, 0xa4, |
2880 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1869 | 0x05, 0x9d, 0x68, 0x01, 0x87, 0xc3, 0x71, 0xbe, 0x4b, 0xb8, 0x39, 0x59, |
2881 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1870 | 0xc4, 0xfb, 0x61, 0x3f, 0xf7, 0x97, 0xf6, 0x40, 0x97, 0xdc, 0x07, 0xc2, |
2882 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1871 | 0xfc, 0x9c, 0xcf, 0xd3, 0x84, 0xda, 0xac, 0x2e, 0x4c, 0xcf, 0x7a, 0x34, |
2883 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1872 | 0x9a, 0xeb, 0x4b, 0x5d, 0xa5, 0x4e, 0xff, 0xce, 0xd8, 0xf7, 0x9b, 0xfe, |
2884 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1873 | 0x9c, 0x5d, 0x18, 0xff, 0x00, 0x3a, 0x85, 0x27, 0xe2, 0xf5, 0xe9, 0x66, |
2885 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1874 | 0x35, 0xd5, 0x41, 0xac, 0x53, 0x24, 0x2c, 0x18, 0xec, 0x3b, 0x04, 0xba, |
2886 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1875 | 0xea, 0xdf, 0x47, 0x13, 0x15, 0x9d, 0xd7, 0x99, 0x6e, 0x61, 0xb1, 0xc5, |
2887 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1876 | 0x6b, 0x58, 0xce, 0xbc, 0x46, 0xa2, 0x9b, 0x49, 0xd8, 0xe5, 0x9e, 0x3d, |
2888 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1877 | 0x7e, 0xbd, 0xf8, 0xf8, 0x10, 0xe3, 0xda, 0x0d, 0x99, 0x42, 0xbf, 0x50, |
2889 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1878 | 0xdb, 0x94, 0x83, 0xbe, 0x59, 0xae, 0x4d, 0xa7, 0xf9, 0xde, 0x23, 0xef, |
2890 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1879 | 0xeb, 0x5a, 0xa8, 0x1f, 0x1f, 0xd7, 0xb5, 0xe7, 0xb0, 0xf6, 0x2d, 0xf6, |
2891 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1880 | 0xab, 0x90, 0x75, 0xe0, 0x23, 0xbe, 0x41, 0x6f, 0xcd, 0x55, 0xb3, 0xfc, |
2892 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1881 | 0xcd, 0xa3, 0x35, 0x21, 0xa0, 0x16, 0x3f, 0x4e, 0x6f, 0xcf, 0x3d, 0x4b, |
2893 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1882 | 0xbf, 0x9c, 0x65, 0xdd, 0x31, 0x68, 0x14, 0xfa, 0x74, 0x94, 0xe4, 0xec, |
2894 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1883 | 0x69, 0x1a, 0x50, 0xaf, 0xfb, 0xb5, 0x8d, 0x9e, 0xf3, 0x6b, 0x3a, 0x33, |
2895 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1884 | 0x4b, 0xc5, 0xc6, 0x40, 0xea, 0x1a, 0xfa, 0xca, 0x93, 0xba, 0xb6, 0x8e, |
2896 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1885 | 0xdc, 0xa3, 0xd0, 0xfc, 0x80, 0xef, 0x6c, 0xb2, 0x35, 0xd8, 0xde, 0x22, |
2897 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1886 | 0x6a, 0x9b, 0xb7, 0x9d, 0xbb, 0xe9, 0x2c, 0xd7, 0x56, 0x81, 0xff, 0x5e, |
2898 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1887 | 0x33, 0x50, 0x63, 0xac, 0xaa, 0xa1, 0x0e, 0x31, 0x70, 0x9d, 0xc1, 0xf1, |
2899 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1888 | 0x07, 0x4f, 0x37, 0x06, 0x9f, 0xb2, 0x1f, 0x7c, 0x67, 0xd9, 0x42, 0xfe, |
2900 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1889 | 0xab, 0xfc, 0x8d, 0x0a, 0xf2, 0x5f, 0x5d, 0xfe, 0x40, 0xeb, 0x65, 0x3f, |
2901 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1890 | 0x6b, 0x80, 0x96, 0x41, 0x3a, 0x33, 0xcf, 0xf2, 0x47, 0xec, 0xf5, 0xed, |
2902 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1891 | 0x34, 0x0d, 0xfe, 0x72, 0x7c, 0x19, 0xa4, 0x5f, 0x2d, 0x15, 0xfd, 0xfb, |
2903 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1892 | 0x6b, 0x1b, 0xb9, 0xd6, 0x11, 0x67, 0x12, 0xf5, 0xfa, 0x77, 0x40, 0x2f, |
2904 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1893 | 0xce, 0x1e, 0xda, 0x8d, 0xa7, 0x0a, 0x9b, 0xdc, 0x72, 0x9e, 0x23, 0x07, |
2905 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1894 | 0x79, 0xce, 0xde, 0x2d, 0xe6, 0x39, 0x7b, 0xb7, 0x92, 0xe7, 0xc8, 0x9d, |
2906 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1895 | 0xe0, 0xab, 0xd6, 0xbb, 0x65, 0xdc, 0xa4, 0x00, 0xb7, 0x03, 0x5b, 0xc4, |
2907 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1896 | 0xed, 0xc0, 0x56, 0x70, 0x93, 0x3a, 0xcd, 0xbf, 0x40, 0x8c, 0x35, 0x10, |
2908 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1897 | 0xdb, 0xe0, 0xd7, 0x86, 0xfa, 0x59, 0x7f, 0x80, 0xa3, 0x8f, 0xeb, 0xef, |
2909 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1898 | 0x8b, 0xa7, 0x18, 0xe0, 0xf9, 0xd8, 0x16, 0xf1, 0x7c, 0x6c, 0x2b, 0x78, |
2910 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1899 | 0x8a, 0x9d, 0x26, 0xe3, 0x28, 0xc3, 0xd7, 0x70, 0x6d, 0x83, 0xd8, 0x3c, |
2911 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1900 | 0x24, 0x87, 0xba, 0x2e, 0x87, 0x75, 0x0e, 0x03, 0x7c, 0x50, 0xaf, 0x46, |
2912 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1901 | 0x4b, 0x4c, 0xcb, 0x46, 0xdf, 0x9d, 0x3a, 0x4b, 0x32, 0x5b, 0xa5, 0x4a, |
2913 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1902 | 0x83, 0xef, 0x95, 0xfb, 0xb0, 0x0f, 0xf7, 0xf1, 0x37, 0x2a, 0x8b, 0x64, |
2914 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1903 | 0xc4, 0xf7, 0xe7, 0x9a, 0x77, 0xa7, 0xf5, 0x2a, 0x68, 0x9d, 0x0a, 0x69, |
2915 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1904 | 0xad, 0xf8, 0xb9, 0xe0, 0xbe, 0x4d, 0xb9, 0x60, 0x40, 0xe3, 0x08, 0x68, |
2916 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1905 | 0x2c, 0x86, 0x34, 0x3e, 0xdd, 0x60, 0xda, 0xf6, 0xf9, 0xb4, 0x2d, 0x6d, |
2917 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1906 | 0xa2, 0x6d, 0xe4, 0x9e, 0xf9, 0x1f, 0xe3, 0x81, 0x5a, 0x1a, 0xb9, 0xd7, |
2918 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1907 | 0x6b, 0x4d, 0xd4, 0xd2, 0x4d, 0xd4, 0xd2, 0xd0, 0xf7, 0x57, 0x9b, 0xa8, |
2919 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1908 | 0xa5, 0x9b, 0xa8, 0xa5, 0x61, 0x07, 0xaf, 0xc0, 0x56, 0x82, 0x3b, 0xdc, |
2920 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1909 | 0x12, 0x71, 0x0d, 0xee, 0xd7, 0xe3, 0x14, 0xe4, 0x39, 0x05, 0xc4, 0xf0, |
2921 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1910 | 0xa3, 0xc8, 0xf1, 0xd8, 0x6e, 0x4f, 0x13, 0xc7, 0x04, 0x3d, 0x87, 0x9a, |
2922 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1911 | 0x2f, 0x5b, 0x25, 0x33, 0x5e, 0x9c, 0x1f, 0x50, 0x97, 0x02, 0xfb, 0xd6, |
2923 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1912 | 0x5a, 0xc4, 0x71, 0x70, 0x20, 0x85, 0x08, 0xa9, 0xb2, 0x5f, 0xb0, 0x73, |
2924 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1913 | 0x4c, 0xe7, 0x76, 0xf0, 0x10, 0xbe, 0xdb, 0x60, 0x1f, 0xc6, 0xbe, 0xb4, |
2925 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1914 | 0x4e, 0x0b, 0x8d, 0xf0, 0x1b, 0x9a, 0xcc, 0xfd, 0xfc, 0xce, 0x31, 0xb7, |
2926 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1915 | 0xcf, 0xf7, 0x69, 0x76, 0xb6, 0x0f, 0x71, 0x80, 0xfb, 0x15, 0xf8, 0x35, |
2927 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1916 | 0xe8, 0xca, 0x52, 0x1b, 0x17, 0x19, 0xeb, 0x55, 0xaa, 0xcf, 0x07, 0x31, |
2928 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1917 | 0x7c, 0xca, 0xe0, 0x38, 0x87, 0xf8, 0xbe, 0xc4, 0xdf, 0xb0, 0x10, 0xeb, |
2929 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1918 | 0x97, 0xae, 0x68, 0x32, 0x6a, 0xc7, 0x3a, 0x7f, 0xa3, 0x1d, 0xec, 0xc3, |
2930 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1919 | 0xf9, 0x1d, 0xfe, 0x1d, 0xed, 0x51, 0xff, 0xae, 0xcd, 0xa0, 0x23, 0xad, |
2931 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1920 | 0x80, 0x16, 0xdb, 0xc8, 0xd0, 0xc8, 0x2c, 0xdf, 0x35, 0x51, 0x8f, 0x68, |
2932 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1921 | 0xca, 0x54, 0x75, 0xf8, 0x7e, 0x68, 0xe3, 0xbb, 0x49, 0x76, 0x91, 0xeb, |
2933 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1922 | 0x4f, 0x23, 0xb8, 0xff, 0x3c, 0xed, 0xbc, 0xc9, 0xf7, 0x9f, 0xe1, 0x3a, |
2934 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1923 | 0x8d, 0xde, 0x70, 0x33, 0x34, 0x8e, 0xf8, 0x5a, 0x6c, 0x68, 0xf0, 0x6f, |
2935 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1924 | 0xbe, 0x3c, 0x39, 0xa7, 0xad, 0xc6, 0x42, 0x99, 0x8e, 0x84, 0x32, 0xad, |
2936 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1925 | 0x34, 0xd6, 0x80, 0xdf, 0x0d, 0xef, 0x8f, 0x43, 0x99, 0xee, 0x3a, 0x47, |
2937 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1926 | 0xda, 0xd5, 0x1c, 0xcb, 0x95, 0x65, 0x19, 0xc8, 0x75, 0x7c, 0xb1, 0x24, |
2938 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1927 | 0x14, 0x21, 0xd3, 0x51, 0x5f, 0xa6, 0x32, 0xc7, 0x05, 0xec, 0x95, 0x83, |
2939 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1928 | 0xfc, 0xd9, 0x8f, 0xe1, 0xe9, 0xb0, 0x8c, 0xb9, 0xde, 0xe0, 0x58, 0x98, |
2940 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1929 | 0xa4, 0x4b, 0x9b, 0xe4, 0x5c, 0xbc, 0xa7, 0x0e, 0xe7, 0xa9, 0xff, 0x9c, |
2941 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1930 | 0x16, 0xde, 0x9b, 0x66, 0x21, 0xc7, 0x76, 0x2e, 0xf6, 0x23, 0x81, 0x8c, |
2942 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1931 | 0xf6, 0x9d, 0x6e, 0xbb, 0xef, 0xe5, 0x4d, 0x7d, 0xed, 0x67, 0x9b, 0x56, |
2943 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1932 | 0xc4, 0xb7, 0x0d, 0xde, 0xf3, 0x1d, 0xe4, 0x9d, 0x7e, 0xc9, 0x1f, 0x53, |
2944 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1933 | 0x31, 0xd6, 0x4b, 0x85, 0x25, 0x83, 0xac, 0x16, 0xcf, 0x91, 0x49, 0x34, |
2945 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1934 | 0xda, 0x72, 0xea, 0xa4, 0xf5, 0x30, 0xc6, 0x2d, 0x34, 0x3c, 0xef, 0xa7, |
2946 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1935 | 0xd0, 0x9d, 0x8b, 0x5c, 0x77, 0x3b, 0xbf, 0xf1, 0xd6, 0x93, 0xc8, 0x21, |
2947 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1936 | 0x37, 0xce, 0xfc, 0xe6, 0xfd, 0xd4, 0xa5, 0xab, 0x88, 0x09, 0x74, 0xc6, |
2948 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1937 | 0x09, 0x51, 0x22, 0x1e, 0xe7, 0x3e, 0xfe, 0x06, 0xef, 0x79, 0x17, 0x8d, |
2949 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1938 | 0x3b, 0x78, 0x75, 0x99, 0xc7, 0x69, 0xdf, 0x39, 0xf6, 0xff, 0x3f, 0xd0, |
2950 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1939 | 0x2e, 0x1a, 0xd6, 0x9e, 0x38, 0xf2, 0xe7, 0xeb, 0xc4, 0xb1, 0x4f, 0x4e, |
2951 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1940 | 0x14, 0x9b, 0xba, 0x7a, 0x09, 0x6b, 0x8b, 0x8e, 0xc2, 0xdf, 0xd6, 0xf9, |
2952 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1941 | 0xfb, 0xa8, 0x76, 0x89, 0xda, 0xf7, 0x65, 0x90, 0xa7, 0xa3, 0xf2, 0x77, |
2953 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1942 | 0x52, 0xb5, 0x8a, 0xd8, 0x52, 0x70, 0x92, 0x98, 0xaf, 0x62, 0x2e, 0xc7, |
2954 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1943 | 0x05, 0x8f, 0x14, 0xd8, 0x50, 0xc1, 0x49, 0x27, 0xc6, 0x9a, 0x9e, 0xa7, |
2955 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1944 | 0x7c, 0x5e, 0xa0, 0x87, 0x32, 0x29, 0x1a, 0x73, 0xf8, 0xfe, 0xf7, 0x9b, |
2956 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1945 | 0xf4, 0x36, 0xec, 0xac, 0x78, 0x9e, 0x6b, 0x26, 0xf6, 0x29, 0x78, 0x77, |
2957 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1946 | 0xf8, 0xbe, 0xea, 0x14, 0x3d, 0xb4, 0x47, 0xcf, 0x5e, 0x22, 0xe0, 0xb3, |
2958 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1947 | 0x42, 0xfd, 0x48, 0x72, 0x53, 0xc7, 0xfd, 0xef, 0x6d, 0x8c, 0x6b, 0x9a, |
2959 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1948 | 0x96, 0xc0, 0x1b, 0xa7, 0x99, 0xa4, 0x95, 0x66, 0x8a, 0x56, 0xa1, 0x1f, |
2960 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1949 | 0xdb, 0xcc, 0x32, 0x7d, 0x03, 0x78, 0x2b, 0x66, 0x95, 0x94, 0x8c, 0xb5, |
2961 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1950 | 0xaf, 0x0b, 0x78, 0x67, 0x05, 0x3d, 0x15, 0x17, 0x18, 0x77, 0x5d, 0x2d, |
2962 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1951 | 0x03, 0x6f, 0xd6, 0xd1, 0x51, 0xa7, 0x9b, 0x8e, 0x61, 0xed, 0x7e, 0xe4, |
2963 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1952 | 0x1f, 0xdf, 0x72, 0xa8, 0x2c, 0x99, 0x29, 0x3a, 0x80, 0xf3, 0x8e, 0x36, |
2964 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1953 | 0x38, 0x57, 0x3b, 0x02, 0x5f, 0x23, 0xd0, 0xa3, 0x19, 0x8f, 0x1e, 0xdd, |
2965 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1954 | 0xa3, 0x5b, 0x71, 0x01, 0x7b, 0xae, 0xb0, 0x9e, 0xa0, 0xdf, 0x09, 0xce, |
2966 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1955 | 0x8d, 0xad, 0xf8, 0xba, 0x08, 0x7f, 0xfa, 0x0c, 0x65, 0xce, 0xad, 0xe5, |
2967 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1956 | 0xa6, 0x90, 0x9f, 0x8f, 0x36, 0xe9, 0x8b, 0x31, 0x9c, 0xf7, 0x36, 0xf8, |
2968 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1957 | 0x34, 0xea, 0xc8, 0x02, 0xf3, 0xe9, 0x58, 0xc0, 0x27, 0x8c, 0xf1, 0xb7, |
2969 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1958 | 0x23, 0xce, 0xd1, 0xf8, 0xec, 0x13, 0x74, 0xb6, 0xc1, 0x77, 0xdd, 0x27, |
2970 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1959 | 0xe8, 0x4a, 0xe3, 0x11, 0xba, 0x98, 0xe3, 0x5c, 0x07, 0xfb, 0xf8, 0x67, |
2971 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1960 | 0xa0, 0xcf, 0x3f, 0xa3, 0x9b, 0x8e, 0xfb, 0x72, 0xfa, 0x3f, 0xc3, 0x06, |
2972 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | 1961 | 0xd0, 0x70, 0x4c, 0x57, 0x00, 0x00, 0x00 }; |
2973 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2974 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2975 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2976 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2977 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2978 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2979 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2980 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2981 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2982 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2983 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2984 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2985 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2986 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2987 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2988 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2989 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2990 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2991 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2992 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2993 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2994 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2995 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2996 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2997 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2998 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
2999 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3000 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3001 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3002 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3003 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3004 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3005 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3006 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3007 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3008 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3009 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3010 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3011 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3012 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3013 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3014 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3015 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3016 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3017 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3018 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3019 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3020 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3021 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3022 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3023 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3024 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3025 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3026 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3027 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3028 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3029 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3030 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3031 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3032 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3033 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3034 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3035 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3036 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3037 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3038 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3039 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3040 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3041 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3042 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3043 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3044 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3045 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3046 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3047 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3048 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3049 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3050 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3051 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3052 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3053 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3054 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3055 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3056 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3057 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3058 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3059 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3060 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3061 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3062 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3063 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3064 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3065 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3066 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3067 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3068 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3069 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3070 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3071 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3072 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3073 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3074 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3075 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3076 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3077 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3078 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3079 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3080 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3081 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3082 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3083 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3084 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3085 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3086 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3087 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3088 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3089 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3090 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3091 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3092 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3093 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3094 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3095 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3096 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3097 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3098 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3099 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3100 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3101 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3102 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3103 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3104 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3105 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3106 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3107 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3108 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3109 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3110 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3111 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3112 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3113 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3114 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3115 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3116 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3117 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3118 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3119 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
3120 | 0x00000000, 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c020800, | ||
3121 | 0x24425760, 0x3c030800, 0x24635964, 0xac400000, 0x0043202b, 0x1480fffd, | ||
3122 | 0x24420004, 0x3c1d0800, 0x37bd7ffc, 0x03a0f021, 0x3c100800, 0x261034b0, | ||
3123 | 0x3c1c0800, 0x279c5760, 0x0e000f5b, 0x00000000, 0x0000000d, 0x8f840014, | ||
3124 | 0x27bdffe8, 0xafb10014, 0xafb00010, 0x8f460104, 0x8f830008, 0x8c8500ac, | ||
3125 | 0xaf430080, 0x948200a8, 0xa7420e10, 0x948300aa, 0xa7430e12, 0x8c8200ac, | ||
3126 | 0xaf420e18, 0x97430e10, 0xa7430e14, 0x97420e12, 0x00008021, 0xa7420e16, | ||
3127 | 0x8f430e18, 0x00006021, 0x00c53023, 0xaf430e1c, 0x10c001a2, 0x2d820001, | ||
3128 | 0x3c0e1000, 0x2419fff8, 0x24110010, 0x240f0f00, 0x3c188100, 0x93620008, | ||
3129 | 0x10400009, 0x00000000, 0x97620010, 0x00c2102b, 0x14400005, 0x00000000, | ||
3130 | 0x97620010, 0x3042ffff, 0x0a000d6d, 0xaf420e00, 0xaf460e00, 0x8f420000, | ||
3131 | 0x30420008, 0x1040fffd, 0x00000000, 0x97420e08, 0x8f450e04, 0x3044ffff, | ||
3132 | 0x30820001, 0x14400005, 0x00000000, 0x14a00005, 0x3083a040, 0x0a000f34, | ||
3133 | 0x00000000, 0x0000000d, 0x3083a040, 0x24020040, 0x1462004f, 0x3082a000, | ||
3134 | 0x308a0036, 0x8f88000c, 0x30890008, 0x24020800, 0xaf420178, 0x01001821, | ||
3135 | 0x9742008a, 0x00431023, 0x2442ffff, 0x30421fff, 0x2c420008, 0x1440fffa, | ||
3136 | 0x00a06021, 0x8f820018, 0x00cc3023, 0x24070001, 0x8f830008, 0x304b00ff, | ||
3137 | 0x24420001, 0xaf820018, 0x25024000, 0x106f0005, 0x03422021, 0x93820012, | ||
3138 | 0x30420007, 0x00021240, 0x34470001, 0x000b1400, 0x3c030100, 0x00431025, | ||
3139 | 0xac820000, 0x8f830018, 0x00ea3825, 0x1120000f, 0xac830004, 0x97430e0a, | ||
3140 | 0x8f84000c, 0x00ee3825, 0x2402000e, 0x00781825, 0xaf430160, 0x25830006, | ||
3141 | 0x24840008, 0x30841fff, 0xa742015a, 0xa7430158, 0xaf84000c, 0x0a000db7, | ||
3142 | 0x00000000, 0x8f83000c, 0x25820002, 0xa7420158, 0x24630008, 0x30631fff, | ||
3143 | 0xaf83000c, 0x54c0000f, 0x8f420e14, 0x8f820008, 0x504f0002, 0x24100001, | ||
3144 | 0x34e70040, 0x97420e10, 0x97430e12, 0x8f850014, 0x00021400, 0x00621825, | ||
3145 | 0xaca300a8, 0x8f840014, 0x8f420e18, 0xac8200ac, 0x8f420e14, 0x8f430e1c, | ||
3146 | 0xaf420144, 0xaf430148, 0xa34b0152, 0xaf470154, 0x0a000efb, 0xaf4e0178, | ||
3147 | 0x10400165, 0x00000000, 0x93620008, 0x50400008, 0xafa60008, 0x97620010, | ||
3148 | 0x00a2102b, 0x10400003, 0x30820040, 0x1040015c, 0x00000000, 0xafa60008, | ||
3149 | 0xa7840010, 0xaf850004, 0x93620008, 0x1440005f, 0x27ac0008, 0xaf60000c, | ||
3150 | 0x97820010, 0x30424000, 0x10400002, 0x2403000e, 0x24030016, 0xa363000a, | ||
3151 | 0x24034007, 0xaf630014, 0x93820012, 0x8f630014, 0x30420007, 0x00021240, | ||
3152 | 0x00621825, 0xaf630014, 0x97820010, 0x8f630014, 0x30420010, 0x00621825, | ||
3153 | 0xaf630014, 0x97820010, 0x30420008, 0x5040000e, 0x00002821, 0x8f620014, | ||
3154 | 0x004e1025, 0xaf620014, 0x97430e0a, 0x2402000e, 0x00781825, 0xaf630004, | ||
3155 | 0xa3620002, 0x9363000a, 0x3405fffc, 0x24630004, 0x0a000e06, 0xa363000a, | ||
3156 | 0xaf600004, 0xa3600002, 0x97820010, 0x9363000a, 0x30421f00, 0x00021182, | ||
3157 | 0x24420028, 0x00621821, 0xa3630009, 0x97420e0c, 0xa7620010, 0x93630009, | ||
3158 | 0x24020008, 0x24630002, 0x30630007, 0x00431023, 0x30420007, 0xa362000b, | ||
3159 | 0x93640009, 0x97620010, 0x8f890004, 0x97830010, 0x00441021, 0x00a21021, | ||
3160 | 0x30630040, 0x10600007, 0x3045ffff, 0x00a9102b, 0x14400005, 0x0125102b, | ||
3161 | 0x3c068000, 0x0a000e3a, 0x00005821, 0x0125102b, 0x544000c7, 0x00006021, | ||
3162 | 0x97420e14, 0xa7420e10, 0x97430e16, 0xa7430e12, 0x8f420e1c, 0xaf420e18, | ||
3163 | 0xaf450e00, 0x8f420000, 0x30420008, 0x1040fffd, 0x00000000, 0x97420e08, | ||
3164 | 0x00a04821, 0xa7820010, 0x8f430e04, 0x00003021, 0x240b0001, 0xaf830004, | ||
3165 | 0x97620010, 0x0a000e4c, 0x304dffff, 0x8f890004, 0x97820010, 0x30420040, | ||
3166 | 0x10400004, 0x01206821, 0x3c068000, 0x0a000e4c, 0x00005821, 0x97630010, | ||
3167 | 0x8f820004, 0x10430003, 0x00003021, 0x0a000eee, 0x00006021, 0x240b0001, | ||
3168 | 0x8d820000, 0x00491023, 0x1440000d, 0xad820000, 0x8f620014, 0x34420040, | ||
3169 | 0xaf620014, 0x97430e10, 0x97420e12, 0x8f840014, 0x00031c00, 0x00431025, | ||
3170 | 0xac8200a8, 0x8f830014, 0x8f420e18, 0xac6200ac, 0x93620008, 0x1440003e, | ||
3171 | 0x00000000, 0x25260002, 0x8f84000c, 0x9743008a, 0x3063ffff, 0xafa30000, | ||
3172 | 0x8fa20000, 0x00441023, 0x2442ffff, 0x30421fff, 0x2c420010, 0x1440fff7, | ||
3173 | 0x00000000, 0x8f82000c, 0x8f830018, 0x00021082, 0x00021080, 0x24424000, | ||
3174 | 0x03422821, 0x00605021, 0x24630001, 0x314200ff, 0x00021400, 0xaf830018, | ||
3175 | 0x3c033200, 0x00431025, 0xaca20000, 0x93630009, 0x9362000a, 0x00031c00, | ||
3176 | 0x00431025, 0xaca20004, 0x8f830018, 0xaca30008, 0x97820010, 0x30420008, | ||
3177 | 0x10400002, 0x00c04021, 0x25280006, 0x97430e14, 0x93640002, 0x8f450e1c, | ||
3178 | 0x8f660004, 0x8f670014, 0x3063ffff, 0xa7430144, 0x97420e16, 0xa7420146, | ||
3179 | 0xaf450148, 0xa34a0152, 0x8f82000c, 0x308400ff, 0xa744015a, 0xaf460160, | ||
3180 | 0xa7480158, 0xaf470154, 0xaf4e0178, 0x00511021, 0x30421fff, 0xaf82000c, | ||
3181 | 0x0a000ed9, 0x8d820000, 0x93620009, 0x9363000b, 0x8f85000c, 0x2463000a, | ||
3182 | 0x00435021, 0x25440007, 0x00992024, 0x9743008a, 0x3063ffff, 0xafa30000, | ||
3183 | 0x8fa20000, 0x00451023, 0x2442ffff, 0x30421fff, 0x0044102b, 0x1440fff7, | ||
3184 | 0x00000000, 0x8f82000c, 0x8f840018, 0x00021082, 0x00021080, 0x24424000, | ||
3185 | 0x03422821, 0x00804021, 0x24840001, 0xaf840018, 0x93630009, 0x310200ff, | ||
3186 | 0x00022400, 0x3c024100, 0x24630002, 0x00621825, 0x00832025, 0xaca40000, | ||
3187 | 0x8f62000c, 0x00461025, 0xaca20004, 0x97430e14, 0x93640002, 0x8f450e1c, | ||
3188 | 0x8f660004, 0x8f670014, 0x3063ffff, 0xa7430144, 0x97420e16, 0x308400ff, | ||
3189 | 0xa7420146, 0xaf450148, 0xa3480152, 0x8f83000c, 0x25420007, 0x00591024, | ||
3190 | 0xa744015a, 0xaf460160, 0xa7490158, 0xaf470154, 0xaf4e0178, 0x00621821, | ||
3191 | 0x30631fff, 0xaf83000c, 0x8d820000, 0x14400005, 0x00000000, 0x8f620014, | ||
3192 | 0x2403ffbf, 0x00431024, 0xaf620014, 0x8f62000c, 0x004d1021, 0xaf62000c, | ||
3193 | 0x93630008, 0x14600008, 0x00000000, 0x11600006, 0x00000000, 0x8f630014, | ||
3194 | 0x3c02efff, 0x3442fffe, 0x00621824, 0xaf630014, 0xa36b0008, 0x01206021, | ||
3195 | 0x1580000c, 0x8fa60008, 0x97420e14, 0x97430e16, 0x8f850014, 0x00021400, | ||
3196 | 0x00621825, 0xaca300a8, 0x8f840014, 0x8f420e1c, 0xac8200ac, 0x0a000efd, | ||
3197 | 0x2d820001, 0x14c0fe65, 0x2d820001, 0x00501025, 0x10400058, 0x24020f00, | ||
3198 | 0x8f830008, 0x14620023, 0x3c048000, 0x11800009, 0x3c038000, 0x97420e08, | ||
3199 | 0x30420040, 0x14400005, 0x00000000, 0x0000000d, 0x00000000, 0x2400032c, | ||
3200 | 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x00000000, 0x97420e10, | ||
3201 | 0x3c030500, 0x00431025, 0xaf42014c, 0x97430e14, 0xa7430144, 0x97420e16, | ||
3202 | 0xa7420146, 0x8f430e1c, 0x24022000, 0xaf430148, 0x3c031000, 0xa3400152, | ||
3203 | 0xa740015a, 0xaf400160, 0xa7400158, 0xaf420154, 0xaf430178, 0x8f830008, | ||
3204 | 0x3c048000, 0x8f420178, 0x00441024, 0x1440fffd, 0x24020f00, 0x10620016, | ||
3205 | 0x00000000, 0x97420e14, 0xa7420144, 0x97430e16, 0xa7430146, 0x8f420e1c, | ||
3206 | 0x3c031000, 0xaf420148, 0x0a000f51, 0x24020240, 0x97420e14, 0x97430e16, | ||
3207 | 0x8f840014, 0x00021400, 0x00621825, 0xac8300a8, 0x8f850014, 0x8f420e1c, | ||
3208 | 0x00006021, 0xaca200ac, 0x0a000efd, 0x2d820001, 0xaf40014c, 0x11800007, | ||
3209 | 0x00000000, 0x97420e10, 0xa7420144, 0x97430e12, 0xa7430146, 0x0a000f4e, | ||
3210 | 0x8f420e18, 0x97420e14, 0xa7420144, 0x97430e16, 0xa7430146, 0x8f420e1c, | ||
3211 | 0xaf420148, 0x24020040, 0x3c031000, 0xa3400152, 0xa740015a, 0xaf400160, | ||
3212 | 0xa7400158, 0xaf420154, 0xaf430178, 0x8fb10014, 0x8fb00010, 0x03e00008, | ||
3213 | 0x27bd0018, 0x27bdffd0, 0x3c1a8000, 0x3c0420ff, 0x3484fffd, 0x3c020008, | ||
3214 | 0x03421821, 0xafbf002c, 0xafb60028, 0xafb50024, 0xafb40020, 0xafb3001c, | ||
3215 | 0xafb20018, 0xafb10014, 0xafb00010, 0xaf830014, 0xaf440e00, 0x00000000, | ||
3216 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3c0200ff, 0x3442fffd, | ||
3217 | 0x3c046004, 0xaf420e00, 0x8c835000, 0x24160800, 0x24150d00, 0x3c140800, | ||
3218 | 0x24130f00, 0x3c120800, 0x3c114000, 0x2402ff7f, 0x00621824, 0x3463380c, | ||
3219 | 0x24020009, 0xac835000, 0xaf420008, 0xaf800018, 0xaf80000c, 0x0e001559, | ||
3220 | 0x00000000, 0x0e000ff0, 0x00000000, 0x3c020800, 0x245057c0, 0x8f420000, | ||
3221 | 0x30420001, 0x1040fffd, 0x00000000, 0x8f440100, 0xaf840008, 0xaf440020, | ||
3222 | 0xaf560178, 0x93430108, 0xa3830012, 0x93820012, 0x30420001, 0x10400008, | ||
3223 | 0x00000000, 0x93820012, 0x30420006, 0x00021100, 0x0e000d43, 0x0050d821, | ||
3224 | 0x0a000fac, 0x00000000, 0x14950005, 0x00000000, 0x0e000d43, 0x269b5840, | ||
3225 | 0x0a000fac, 0x00000000, 0x14930005, 0x00000000, 0x0e000d43, 0x265b5860, | ||
3226 | 0x0a000fac, 0x00000000, 0x0e0010ea, 0x00000000, 0xaf510138, 0x0a000f89, | ||
3227 | 0x00000000, 0x27bdfff8, 0x3084ffff, 0x24820007, 0x3044fff8, 0x8f85000c, | ||
3228 | 0x9743008a, 0x3063ffff, 0xafa30000, 0x8fa20000, 0x00451023, 0x2442ffff, | ||
3229 | 0x30421fff, 0x0044102b, 0x1440fff7, 0x00000000, 0x8f82000c, 0x00021082, | ||
3230 | 0x00021080, 0x24424000, 0x03421021, 0x03e00008, 0x27bd0008, 0x3084ffff, | ||
3231 | 0x8f82000c, 0x24840007, 0x3084fff8, 0x00441021, 0x30421fff, 0xaf82000c, | ||
3232 | 0x03e00008, 0x00000000, 0x27bdffe8, 0x3c1a8000, 0x3c0420ff, 0x3484fffd, | ||
3233 | 0x3c020008, 0x03421821, 0xafbf0010, 0xaf830014, 0xaf440e00, 0x00000000, | ||
3234 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3c0200ff, 0x3442fffd, | ||
3235 | 0x3c046004, 0xaf420e00, 0x8c825000, 0x2403ff7f, 0x00431024, 0x3442380c, | ||
3236 | 0x24030009, 0xac825000, 0xaf430008, 0xaf800018, 0xaf80000c, 0x0e001559, | ||
3237 | 0x00000000, 0x0e000ff0, 0x00000000, 0x8fbf0010, 0x03e00008, 0x27bd0018, | ||
3238 | 0x27bdffe8, 0x3c02000a, 0x03421821, 0x3c040800, 0x24845880, 0x24050019, | ||
3239 | 0xafbf0010, 0xaf830024, 0x0e001565, 0x00003021, 0x3c050800, 0x3c020800, | ||
3240 | 0x24425330, 0xaca258e8, 0x24a558e8, 0x3c020800, 0x244254f8, 0x3c030800, | ||
3241 | 0x2463550c, 0x3c040800, 0xaca20004, 0x3c020800, 0x24425338, 0xaca30008, | ||
3242 | 0xac825900, 0x24845900, 0x3c020800, 0x244253c4, 0x3c070800, 0x24e75404, | ||
3243 | 0x3c060800, 0x24c65520, 0x3c050800, 0x24a55438, 0x3c030800, 0xac820004, | ||
3244 | 0x3c020800, 0x24425528, 0xac870008, 0xac86000c, 0xac850010, 0xac625920, | ||
3245 | 0x24635920, 0x8fbf0010, 0x3c020800, 0x24425540, 0xac620004, 0x3c020800, | ||
3246 | 0xac670008, 0xac66000c, 0xac650010, 0xac400048, 0x03e00008, 0x27bd0018, | ||
3247 | 0x974309da, 0x00804021, 0xad030000, 0x8f4209dc, 0xad020004, 0x8f4309e0, | ||
3248 | 0xad030008, 0x934409d9, 0x24020001, 0x30840003, 0x1082001f, 0x30a900ff, | ||
3249 | 0x28820002, 0x10400005, 0x24020002, 0x10800009, 0x3c0a0800, 0x0a001078, | ||
3250 | 0x93420934, 0x1082000b, 0x24020003, 0x10820026, 0x3c0a0800, 0x0a001078, | ||
3251 | 0x93420934, 0x974209e4, 0x00021400, 0x34420800, 0xad02000c, 0x0a001077, | ||
3252 | 0x25080010, 0x974209e4, 0x00021400, 0x34428100, 0xad02000c, 0x974309e8, | ||
3253 | 0x3c0a0800, 0x00031c00, 0x34630800, 0xad030010, 0x0a001077, 0x25080014, | ||
3254 | 0x974409e4, 0x3c050800, 0x24a25880, 0x9443001c, 0x94460014, 0x94470010, | ||
3255 | 0x00a05021, 0x24020800, 0xad000010, 0xad020014, 0x00042400, 0x00661821, | ||
3256 | 0x00671823, 0x2463fff2, 0x00832025, 0xad04000c, 0x0a001077, 0x25080018, | ||
3257 | 0x974209e4, 0x3c050800, 0x00021400, 0x34428100, 0xad02000c, 0x974409e8, | ||
3258 | 0x24a25880, 0x9443001c, 0x94460014, 0x94470010, 0x00a05021, 0x24020800, | ||
3259 | 0xad000014, 0xad020018, 0x00042400, 0x00661821, 0x00671823, 0x2463ffee, | ||
3260 | 0x00832025, 0xad040010, 0x2508001c, 0x93420934, 0x93450921, 0x3c074000, | ||
3261 | 0x25445880, 0x94830018, 0x94860014, 0x00021082, 0x00021600, 0x00052c00, | ||
3262 | 0x00a72825, 0x00451025, 0x00661821, 0x00431025, 0xad020000, 0x9783002c, | ||
3263 | 0x974209ea, 0x00621821, 0x00031c00, 0xad030004, 0x9782002c, 0x24420001, | ||
3264 | 0x30427fff, 0xa782002c, 0x93430920, 0x3c020006, 0x00031e00, 0x00621825, | ||
3265 | 0xad030008, 0x8f42092c, 0xad02000c, 0x8f430930, 0xad030010, 0x8f440938, | ||
3266 | 0x25080014, 0xad040000, 0x8f820020, 0x11200004, 0xad020004, 0x8f420940, | ||
3267 | 0x0a0010a1, 0x2442ffff, 0x8f420940, 0xad020008, 0x8f440948, 0x8f420940, | ||
3268 | 0x93430936, 0x00823023, 0x00663006, 0x3402ffff, 0x0046102b, 0x54400001, | ||
3269 | 0x3406ffff, 0x93420937, 0x25445880, 0x90830024, 0xad000010, 0x00021700, | ||
3270 | 0x34630010, 0x00031c00, 0x00431025, 0x00461025, 0xad02000c, 0x8c830008, | ||
3271 | 0x14600031, 0x25080014, 0x3c020800, 0x8c430048, 0x1060002d, 0x00000000, | ||
3272 | 0x9342010b, 0xad020000, 0x8f830000, 0x8c6200b0, 0xad020004, 0x8f830000, | ||
3273 | 0x8c6200b4, 0xad020008, 0x8f830000, 0x8c6200c0, 0xad02000c, 0x8f830000, | ||
3274 | 0x8c6200c4, 0xad020010, 0x8f830000, 0x8c6200c8, 0xad020014, 0x8f830000, | ||
3275 | 0x8c6200cc, 0xad020018, 0x8f830000, 0x8c6200e0, 0xad02001c, 0x8f830000, | ||
3276 | 0x8c6200e8, 0xad020020, 0x8f830000, 0x8c6200f0, 0x3c04600e, 0xad020024, | ||
3277 | 0x8c8200d0, 0xad020028, 0x8c8300d4, 0xad03002c, 0x8f820028, 0x3c046012, | ||
3278 | 0xad020030, 0x8c8200a8, 0xad020034, 0x8c8300ac, 0x3c026000, 0xad030038, | ||
3279 | 0x8c434448, 0xad03003c, 0x03e00008, 0x01001021, 0x27bdffa8, 0x3c020008, | ||
3280 | 0x03423021, 0xafbf0054, 0xafbe0050, 0xafb7004c, 0xafb60048, 0xafb50044, | ||
3281 | 0xafb40040, 0xafb3003c, 0xafb20038, 0xafb10034, 0xafb00030, 0xaf860000, | ||
3282 | 0x24020040, 0xaf420814, 0xaf400810, 0x8f420944, 0x8f430950, 0x8f440954, | ||
3283 | 0x8f45095c, 0xaf820034, 0xaf830020, 0xaf84001c, 0xaf850030, 0x90c20000, | ||
3284 | 0x24030020, 0x304400ff, 0x10830005, 0x24020030, 0x10820022, 0x3c030800, | ||
3285 | 0x0a001139, 0x8c62002c, 0x24020088, 0xaf420818, 0x3c020800, 0x244258e8, | ||
3286 | 0xafa20020, 0x93430109, 0x3c020800, 0x10600009, 0x24575900, 0x3c026000, | ||
3287 | 0x24030100, 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, 0x00000000, | ||
3288 | 0x24000376, 0x9342010a, 0x30420080, 0x14400021, 0x24020800, 0x3c026000, | ||
3289 | 0x24030100, 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, 0x00000000, | ||
3290 | 0x2400037d, 0x0a001141, 0x24020800, 0x93430109, 0x3063007f, 0x00031140, | ||
3291 | 0x000318c0, 0x00431021, 0x24430088, 0xaf430818, 0x0000000d, 0x3c020800, | ||
3292 | 0x24425940, 0x3c030800, 0x24775950, 0x0a001140, 0xafa20020, 0x24420001, | ||
3293 | 0xac62002c, 0x0000000d, 0x00000000, 0x24000395, 0x0a0014c1, 0x8fbf0054, | ||
3294 | 0x24020800, 0xaf420178, 0x8f450104, 0x8f420988, 0x00a21023, 0x58400005, | ||
3295 | 0x8f4309a0, 0x0000000d, 0x00000000, 0x240003b1, 0x8f4309a0, 0x3c100800, | ||
3296 | 0xae0358b0, 0x8f4209a4, 0x8f830020, 0x260458b0, 0x2491ffd0, 0xae220034, | ||
3297 | 0x00a21023, 0xae230028, 0xac82ffd0, 0x8fa30020, 0x8c620000, 0x0040f809, | ||
3298 | 0x0200b021, 0x00409021, 0x32440010, 0x32420002, 0x10400007, 0xafa40024, | ||
3299 | 0x8e220020, 0x32530040, 0x2403ffbf, 0x00431024, 0x0a001493, 0xae220020, | ||
3300 | 0x32420020, 0x10400002, 0x3c020800, 0x24575920, 0x32420001, 0x14400007, | ||
3301 | 0x00000000, 0x8f820008, 0xaf420080, 0x8ec358b0, 0xaf430e10, 0x8e220034, | ||
3302 | 0xaf420e18, 0x9343010b, 0x93420905, 0x30420008, 0x1040003c, 0x307400ff, | ||
3303 | 0x8f820000, 0x8c430074, 0x0460000a, 0x00000000, 0x3c026000, 0x24030100, | ||
3304 | 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, 0x00000000, 0x240003ed, | ||
3305 | 0x8f820000, 0x9044007b, 0x9343010a, 0x14830027, 0x32530040, 0x00003821, | ||
3306 | 0x24052000, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, | ||
3307 | 0x8ec258b0, 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034, 0x3c030100, | ||
3308 | 0xaf420148, 0x24020047, 0xaf43014c, 0xa3420152, 0x8d230030, 0x3c021000, | ||
3309 | 0xa7470158, 0xaf450154, 0xaf420178, 0x8c860034, 0x24630001, 0xad230030, | ||
3310 | 0x9342010a, 0x3c030047, 0xafa50014, 0x00021600, 0x00431025, 0x00471025, | ||
3311 | 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b, | ||
3312 | 0x3c070100, 0x3c050800, 0x24a25880, 0x0a001250, 0x8c430020, 0x32820002, | ||
3313 | 0x10400050, 0x00000000, 0x0e0015b9, 0x32530040, 0x3c039000, 0x34630001, | ||
3314 | 0x8f820008, 0x3c048000, 0x00431025, 0xaf420020, 0x8f420020, 0x00441024, | ||
3315 | 0x1440fffd, 0x00000000, 0x8f830000, 0x90620005, 0x34420008, 0xa0620005, | ||
3316 | 0x8f840000, 0x8c820074, 0x3c038000, 0x00431025, 0xac820074, 0x90830000, | ||
3317 | 0x24020020, 0x10620004, 0x00000000, 0x0000000d, 0x00000000, 0x2400040b, | ||
3318 | 0x8f830008, 0x3c028000, 0x34420001, 0x00621825, 0xaf430020, 0x9084007b, | ||
3319 | 0x9342010a, 0x14820028, 0x3c030800, 0x00003821, 0x24052000, 0x3c090800, | ||
3320 | 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec258b0, 0x26c458b0, | ||
3321 | 0x2484ffd0, 0xaf420144, 0x8c820034, 0x3c030100, 0xaf420148, 0x24020046, | ||
3322 | 0xaf43014c, 0xa3420152, 0x8d230030, 0x3c021000, 0xa7470158, 0xaf450154, | ||
3323 | 0xaf420178, 0x8c860034, 0x24630001, 0xad230030, 0x9342010a, 0x3c030046, | ||
3324 | 0xafa50014, 0x00021600, 0x00431025, 0x00471025, 0xafa20010, 0x9343010b, | ||
3325 | 0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b, 0x3c070100, 0x3c030800, | ||
3326 | 0x24625880, 0x0a001250, 0x8c430020, 0x93420108, 0x30420010, 0x50400056, | ||
3327 | 0x9343093f, 0x8f860000, 0x90c2007f, 0x8cc30178, 0x304800ff, 0x15030004, | ||
3328 | 0x00000000, 0x0000000d, 0x00000000, 0x24000425, 0x90c2007e, 0x90c40080, | ||
3329 | 0x00081c00, 0x00021600, 0x00431025, 0x00042200, 0x90c3007a, 0x90c5000a, | ||
3330 | 0x00441025, 0x11050028, 0x00623825, 0xa0c8000a, 0x00004021, 0x24056000, | ||
3331 | 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec258b0, | ||
3332 | 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034, 0xaf420148, 0x24020052, | ||
3333 | 0xaf47014c, 0xa3420152, 0x8d230030, 0x3c021000, 0xa7480158, 0xaf450154, | ||
3334 | 0xaf420178, 0x8c860034, 0x24630001, 0xad230030, 0x9342010a, 0x3c030052, | ||
3335 | 0xafa50014, 0x00021600, 0x00431025, 0x00481025, 0xafa20010, 0x9343010b, | ||
3336 | 0xafa30018, 0x8f440100, 0x0e00159b, 0x8f450104, 0x0a00124a, 0x00000000, | ||
3337 | 0x3c026000, 0x24030100, 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, | ||
3338 | 0x00000000, 0x2400043e, 0x16800009, 0x3c050800, 0x3c040800, 0x24825880, | ||
3339 | 0x8c430020, 0x32530040, 0x2404ffbf, 0x00641824, 0x0a001493, 0xac430020, | ||
3340 | 0x8ca25880, 0x10400005, 0x3c030800, 0x8c620034, 0xaca05880, 0x24420001, | ||
3341 | 0xac620034, 0x9343093f, 0x24020012, 0x5462000e, 0x97420908, 0x32820038, | ||
3342 | 0x14400009, 0x3c030800, 0x8f830000, 0x8c62004c, 0xac62005c, 0x3c020800, | ||
3343 | 0x24445880, 0x8c820020, 0x0a001285, 0x32530040, 0xac605880, 0x97420908, | ||
3344 | 0x5440001c, 0x97420908, 0x3c039000, 0x34630001, 0x8f820008, 0x32530040, | ||
3345 | 0x3c048000, 0x00431025, 0xaf420020, 0x8f420020, 0x00441024, 0x1440fffd, | ||
3346 | 0x3c028000, 0x8f840000, 0x8f850008, 0x8c830050, 0x34420001, 0x00a22825, | ||
3347 | 0xaf830020, 0xac830070, 0xac83005c, 0xaf450020, 0x3c050800, 0x24a45880, | ||
3348 | 0x8c820020, 0x2403ffbf, 0x00431024, 0x0a001493, 0xac820020, 0x000211c0, | ||
3349 | 0xaf420024, 0x97420908, 0x3c030080, 0x34630003, 0x000211c0, 0xaf42080c, | ||
3350 | 0xaf43081c, 0x974209ec, 0x8f4309a4, 0xa782002c, 0x3c020800, 0x24445880, | ||
3351 | 0xac83002c, 0x93420937, 0x93430934, 0x00021080, 0x00621821, 0xa4830018, | ||
3352 | 0x934209d8, 0x32850038, 0xafa50028, 0x00621821, 0xa483001a, 0x934209d8, | ||
3353 | 0x93430934, 0x3c1e0800, 0x00809821, 0x00431021, 0x24420010, 0xa4820016, | ||
3354 | 0x24020006, 0xae620020, 0x8fa20028, 0x10400003, 0x0000a821, 0x0a0012f0, | ||
3355 | 0x24120008, 0x8f420958, 0x8f830020, 0x8f840030, 0x00431023, 0x00832023, | ||
3356 | 0x04800003, 0xae620004, 0x04410003, 0x0082102b, 0x0a0012bc, 0xae600004, | ||
3357 | 0x54400001, 0xae640004, 0x8ee20000, 0x0040f809, 0x00000000, 0x00409021, | ||
3358 | 0x32420001, 0x5440001e, 0x8ee20004, 0x8e630008, 0x1060002b, 0x3c02c000, | ||
3359 | 0x00621025, 0xaf420e00, 0x8f420000, 0x30420008, 0x1040fffd, 0x00000000, | ||
3360 | 0x97420e08, 0xa7820010, 0x8f430e04, 0x8e620008, 0xaf830004, 0x8f840004, | ||
3361 | 0x0044102b, 0x1040000b, 0x24150001, 0x24020100, 0x3c016000, 0xac22081c, | ||
3362 | 0x3c020001, 0x3c016000, 0xac22081c, 0x0000000d, 0x00000000, 0x240004cd, | ||
3363 | 0x24150001, 0x8ee20004, 0x0040f809, 0x00000000, 0x02429025, 0x32420002, | ||
3364 | 0x5040001d, 0x8f470940, 0x12a00006, 0x8ec258b0, 0x8f830000, 0xac6200a8, | ||
3365 | 0x8f840000, 0x8e620034, 0xac8200ac, 0x32420004, 0x50400013, 0x8f470940, | ||
3366 | 0x3c020800, 0x3283007d, 0x10600110, 0x24575920, 0x32820001, 0x50400006, | ||
3367 | 0x36520002, 0x8f830034, 0x8f420940, 0x10620109, 0x00000000, 0x36520002, | ||
3368 | 0x24020008, 0xa6600010, 0xa6620012, 0xae600008, 0xa2600024, 0x8f470940, | ||
3369 | 0x3c030800, 0x24685880, 0x8d02002c, 0x8d050008, 0x95040010, 0x9506000a, | ||
3370 | 0x95030026, 0x00451021, 0x00862021, 0x00641821, 0xaf870034, 0xad02002c, | ||
3371 | 0x32820030, 0x10400008, 0xa5030014, 0x91020024, 0x32910040, 0x34420004, | ||
3372 | 0xa1020024, 0xaf400048, 0x0a001345, 0x3c040800, 0x93420923, 0x30420002, | ||
3373 | 0x10400029, 0x32910040, 0x8f830000, 0x8f840020, 0x8c620084, 0x00441023, | ||
3374 | 0x0442000a, 0x3c039000, 0x95020014, 0x8c630084, 0x00821021, 0x00621823, | ||
3375 | 0x1c600004, 0x3c039000, 0x91020024, 0x34420001, 0xa1020024, 0x34630001, | ||
3376 | 0x8f820008, 0x32910040, 0x3c048000, 0x00431025, 0xaf420020, 0x8f420020, | ||
3377 | 0x00441024, 0x1440fffd, 0x00000000, 0x8f840000, 0x9083003f, 0x2402000a, | ||
3378 | 0x10620005, 0x2402000c, 0x9083003f, 0x24020008, 0x14620002, 0x24020014, | ||
3379 | 0xa082003f, 0x8f830008, 0x3c028000, 0x34420001, 0x00621825, 0xaf430020, | ||
3380 | 0x3c040800, 0x24865880, 0x94c20010, 0x94c3001a, 0x8cc40008, 0x00432821, | ||
3381 | 0x14800006, 0xa4c5001c, 0x3c020800, 0x8c430048, 0x10600002, 0x24a20040, | ||
3382 | 0xa4c2001c, 0x27d05880, 0x9604001c, 0x96020012, 0x00822021, 0x24840002, | ||
3383 | 0x0e000faf, 0x3084ffff, 0x8f850018, 0x00a01821, 0xa2030025, 0x8ee60008, | ||
3384 | 0x00402021, 0x24a50001, 0xaf850018, 0x00c0f809, 0x00000000, 0x00402021, | ||
3385 | 0x0e001026, 0x02202821, 0x8ee3000c, 0x0060f809, 0x00402021, 0x9604001c, | ||
3386 | 0x96020012, 0x00822021, 0x24840002, 0x0e000fc5, 0x3084ffff, 0x8fc25880, | ||
3387 | 0x8e030008, 0x00431023, 0x14400012, 0xafc25880, 0x54600006, 0x8e020020, | ||
3388 | 0x3243004a, 0x24020002, 0x14620005, 0x00000000, 0x8e020020, 0x34420040, | ||
3389 | 0x0a001382, 0xae020020, 0x52a00006, 0x36520002, 0x8e020030, 0xaf420e10, | ||
3390 | 0x8e030034, 0xaf430e18, 0x36520002, 0x52a00008, 0x96670014, 0x8f830000, | ||
3391 | 0x8f420e10, 0xac6200a8, 0x8f840000, 0x8f420e18, 0xac8200ac, 0x96670014, | ||
3392 | 0x92680024, 0x24020040, 0xaf420814, 0x8f830020, 0x8f82001c, 0x00671821, | ||
3393 | 0x00621023, 0xaf830020, 0x18400008, 0x00000000, 0x8f820000, 0xaf83001c, | ||
3394 | 0xac430054, 0x54e00005, 0xaf400040, 0x0a0013a0, 0x8f42095c, 0x54e00001, | ||
3395 | 0xaf400044, 0x8f42095c, 0x31030008, 0xaf820030, 0x1060001a, 0x00000000, | ||
3396 | 0x8f840000, 0x90820120, 0x90830121, 0x304600ff, 0x00c31823, 0x30630007, | ||
3397 | 0x24020007, 0x1062000e, 0x00000000, 0x90820122, 0x304200fe, 0xa0820122, | ||
3398 | 0x8f850000, 0x00061880, 0x8f840020, 0x24a20100, 0x00431021, 0x24c30001, | ||
3399 | 0x30630007, 0xac440000, 0x0a0013bd, 0xa0a30120, 0x90820122, 0x34420001, | ||
3400 | 0xa0820122, 0x14e00003, 0x31020001, 0x10400031, 0x32510002, 0x8f820000, | ||
3401 | 0x8c43000c, 0x30630001, 0x1060002c, 0x32510002, 0x3c029000, 0x8f830008, | ||
3402 | 0x34420001, 0x3c048000, 0x00621825, 0xaf430020, 0x8f420020, 0x00441024, | ||
3403 | 0x1440fffd, 0x00000000, 0x8f870000, 0x8ce2000c, 0x30420001, 0x10400018, | ||
3404 | 0x00000000, 0x94e2006a, 0x00022880, 0x50a00001, 0x24050001, 0x94e30068, | ||
3405 | 0x90e40081, 0x3c020800, 0x8c460024, 0x00652821, 0x00852804, 0x00c5102b, | ||
3406 | 0x54400001, 0x00a03021, 0x3c020800, 0x8c440028, 0x00c4182b, 0x54600001, | ||
3407 | 0x00c02021, 0x8f430074, 0x2402fffe, 0x00822824, 0x00a31821, 0xace3000c, | ||
3408 | 0x8f830008, 0x3c028000, 0x34420001, 0x00621825, 0xaf430020, 0x8f820020, | ||
3409 | 0x3c050800, 0x24b05880, 0xae020028, 0x8ee30010, 0x0060f809, 0x00000000, | ||
3410 | 0x8f820028, 0x24420001, 0xaf820028, 0x12a00005, 0xaf40004c, 0x8f420e10, | ||
3411 | 0xae020030, 0x8f430e18, 0xae030034, 0x1220fea7, 0x24020006, 0x8f870024, | ||
3412 | 0x9786002c, 0x8f830000, 0x8f820034, 0x8f840020, 0x8f85001c, 0x32530040, | ||
3413 | 0xa4e6002c, 0xac620044, 0x32420008, 0xac640050, 0xac650054, 0x1040007a, | ||
3414 | 0x32820020, 0x10400027, 0x32910010, 0x00003821, 0x24052000, 0x3c090800, | ||
3415 | 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec258b0, 0x26c458b0, | ||
3416 | 0x2484ffd0, 0xaf420144, 0x8c820034, 0x3c030400, 0xaf420148, 0x24020041, | ||
3417 | 0xaf43014c, 0xa3420152, 0x8d230030, 0x3c021000, 0xa7470158, 0xaf450154, | ||
3418 | 0xaf420178, 0x8c860034, 0x24630001, 0xad230030, 0x9342010a, 0x3c030041, | ||
3419 | 0xafa50014, 0x00021600, 0x00431025, 0x00471025, 0xafa20010, 0x9343010b, | ||
3420 | 0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b, 0x3c070400, 0x12200028, | ||
3421 | 0x00003821, 0x24052000, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, | ||
3422 | 0x1440fffd, 0x8ec258b0, 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034, | ||
3423 | 0x3c030300, 0xaf420148, 0x2402004e, 0xaf43014c, 0xa3420152, 0x8d230030, | ||
3424 | 0x3c021000, 0xa7470158, 0xaf450154, 0xaf420178, 0x8c860034, 0x24630001, | ||
3425 | 0xad230030, 0x9342010a, 0x3c03004e, 0xafa50014, 0x00021600, 0x00431025, | ||
3426 | 0x00471025, 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100, 0x8f450104, | ||
3427 | 0x0e00159b, 0x3c070300, 0x0a00148b, 0x8fa20024, 0x32820008, 0x10400026, | ||
3428 | 0x24052000, 0x00003821, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, | ||
3429 | 0x1440fffd, 0x8ec258b0, 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034, | ||
3430 | 0x3c030200, 0xaf420148, 0x2402004b, 0xaf43014c, 0xa3420152, 0x8d230030, | ||
3431 | 0x3c021000, 0xa7470158, 0xaf450154, 0xaf420178, 0x8c860034, 0x24630001, | ||
3432 | 0xad230030, 0x9342010a, 0x3c03004b, 0xafa50014, 0x00021600, 0x00431025, | ||
3433 | 0x00471025, 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100, 0x8f450104, | ||
3434 | 0x0e00159b, 0x3c070200, 0x8fa20024, 0x14400004, 0x8fa30020, 0x32420010, | ||
3435 | 0x10400004, 0x00000000, 0x8c620004, 0x0040f809, 0x00000000, 0x12600006, | ||
3436 | 0x8fa40020, 0x8c820008, 0x0040f809, 0x00000000, 0x0a0014c1, 0x8fbf0054, | ||
3437 | 0x3c030800, 0x8c6258a0, 0x30420040, 0x14400023, 0x8fbf0054, 0x00002821, | ||
3438 | 0x24040040, 0x8f870020, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, | ||
3439 | 0x8ec258b0, 0x26c358b0, 0x2463ffd0, 0xaf420144, 0x8c620034, 0xaf420148, | ||
3440 | 0x24020049, 0xaf47014c, 0xa3420152, 0x3c021000, 0xa7450158, 0xaf440154, | ||
3441 | 0xaf420178, 0x8c660034, 0x9342010a, 0x3c030049, 0xafa40014, 0x00021600, | ||
3442 | 0x00431025, 0x00451025, 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100, | ||
3443 | 0x0e00159b, 0x8f450104, 0x8fbf0054, 0x8fbe0050, 0x8fb7004c, 0x8fb60048, | ||
3444 | 0x8fb50044, 0x8fb40040, 0x8fb3003c, 0x8fb20038, 0x8fb10034, 0x8fb00030, | ||
3445 | 0x03e00008, 0x27bd0058, 0x03e00008, 0x00001021, 0x3c020800, 0x24435880, | ||
3446 | 0x8c650004, 0x8c445880, 0x0085182b, 0x10600002, 0x00403021, 0x00802821, | ||
3447 | 0x9744093c, 0x00a4102b, 0x54400001, 0x00a02021, 0x93420923, 0x0004182b, | ||
3448 | 0x00021042, 0x30420001, 0x00431024, 0x1040000d, 0x24c25880, 0x8f850000, | ||
3449 | 0x8f830020, 0x8ca20084, 0x00431023, 0x04420007, 0x24c25880, 0x8ca20084, | ||
3450 | 0x00641821, 0x00431023, 0x28420001, 0x00822023, 0x24c25880, 0xac440008, | ||
3451 | 0xa4400026, 0x03e00008, 0x00001021, 0x8f850004, 0x97840010, 0x3c030800, | ||
3452 | 0x24635880, 0x24020008, 0xa4620012, 0x8f820004, 0xa4600010, 0x000420c2, | ||
3453 | 0x30840008, 0x2c420001, 0x00021023, 0x30420006, 0xac650008, 0x03e00008, | ||
3454 | 0xa0640024, 0x3c020800, 0x24425880, 0x90450025, 0x9443001c, 0x3c021100, | ||
3455 | 0xac800004, 0x00052c00, 0x24630002, 0x00621825, 0x00a32825, 0x24820008, | ||
3456 | 0x03e00008, 0xac850000, 0x27bdffd8, 0x3c020800, 0x24425880, 0xafbf0020, | ||
3457 | 0x90480025, 0x8c440008, 0x8c460020, 0x8f870020, 0x3c030800, 0x3c058000, | ||
3458 | 0x8f420178, 0x00451024, 0x1440fffd, 0x8c6258b0, 0x246358b0, 0x2469ffd0, | ||
3459 | 0xaf420144, 0x8d220034, 0x30c32000, 0xaf420148, 0x3c021000, 0xaf47014c, | ||
3460 | 0xa3480152, 0xa7440158, 0xaf460154, 0xaf420178, 0x10600004, 0x3c030800, | ||
3461 | 0x8c620030, 0x24420001, 0xac620030, 0x9342010a, 0x00081c00, 0x3084ffff, | ||
3462 | 0xafa60014, 0x00021600, 0x00431025, 0x00441025, 0xafa20010, 0x9343010b, | ||
3463 | 0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b, 0x8d260034, 0x8fbf0020, | ||
3464 | 0x03e00008, 0x27bd0028, 0x0000000d, 0x00000000, 0x2400019d, 0x03e00008, | ||
3465 | 0x00000000, 0x0000000d, 0x00000000, 0x240001a9, 0x03e00008, 0x00000000, | ||
3466 | 0x03e00008, 0x00000000, 0x3c020800, 0x24425880, 0xac400008, 0xa4400026, | ||
3467 | 0x03e00008, 0x24020001, 0x3c020800, 0x24425880, 0x24030008, 0xac400008, | ||
3468 | 0xa4400010, 0xa4430012, 0xa0400024, 0x03e00008, 0x24020004, 0x03e00008, | ||
3469 | 0x00001021, 0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004, | ||
3470 | 0xac820000, 0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000, 0x0a00156c, | ||
3471 | 0x00a01021, 0xac860000, 0x00000000, 0x00000000, 0x24840004, 0x00a01021, | ||
3472 | 0x1440fffa, 0x24a5ffff, 0x03e00008, 0x00000000, 0x3c0a0800, 0x8d490068, | ||
3473 | 0x3c050800, 0x24a52098, 0x00093140, 0x00c51021, 0xac440000, 0x8f440e04, | ||
3474 | 0x00a61021, 0xac440004, 0x97430e08, 0x97420e0c, 0x00a62021, 0x00031c00, | ||
3475 | 0x00431025, 0xac820008, 0x8f430e10, 0x00801021, 0xac43000c, 0x8f440e14, | ||
3476 | 0xac440010, 0x8f430e18, 0x3c0800ff, 0xac430014, 0x8f470e1c, 0x3508ffff, | ||
3477 | 0x25290001, 0xac470018, 0x3c070800, 0x8ce3006c, 0x9344010a, 0x3c026000, | ||
3478 | 0x24630001, 0xace3006c, 0x8c434448, 0x3129007f, 0x00a62821, 0xad490068, | ||
3479 | 0x00042600, 0x00681824, 0x00832025, 0x03e00008, 0xaca4001c, 0x8fac0010, | ||
3480 | 0x8fad0014, 0x8fae0018, 0x3c0b0800, 0x8d6a0060, 0x3c080800, 0x25080080, | ||
3481 | 0x000a4940, 0x01281021, 0x01091821, 0xac440000, 0x00601021, 0xac650004, | ||
3482 | 0xac460008, 0xac67000c, 0xac4c0010, 0xac6d0014, 0x3c036000, 0xac4e0018, | ||
3483 | 0x8c654448, 0x3c040800, 0x8c820064, 0x254a0001, 0x314a00ff, 0x01094021, | ||
3484 | 0xad6a0060, 0x24420001, 0xac820064, 0x03e00008, 0xad05001c, 0x3c030800, | ||
3485 | 0x3c090800, 0x8d250070, 0x246330b0, 0x8f460100, 0x00053900, 0x00e31021, | ||
3486 | 0xac460000, 0x8f440104, 0x00671021, 0xac440004, 0x8f460108, 0x8f840014, | ||
3487 | 0x24a50001, 0xac460008, 0x8c880074, 0x3c060800, 0x8cc20074, 0x30a5003f, | ||
3488 | 0x00671821, 0xad250070, 0x24420001, 0xacc20074, 0x03e00008, 0xac68000c, | ||
3489 | 0x00000000 }; | ||
3490 | 1962 | ||
3491 | static u32 bnx2_TXP_b06FwData[(0x0/4) + 1] = { 0x0 }; | 1963 | static u32 bnx2_TXP_b06FwData[(0x0/4) + 1] = { 0x0 }; |
3492 | static u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 }; | 1964 | static u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 }; |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 55d236726d11..8171cae06688 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -1199,8 +1199,7 @@ int bond_sethwaddr(struct net_device *bond_dev, struct net_device *slave_dev) | |||
1199 | } | 1199 | } |
1200 | 1200 | ||
1201 | #define BOND_INTERSECT_FEATURES \ | 1201 | #define BOND_INTERSECT_FEATURES \ |
1202 | (NETIF_F_SG|NETIF_F_IP_CSUM|NETIF_F_NO_CSUM|NETIF_F_HW_CSUM|\ | 1202 | (NETIF_F_SG | NETIF_F_ALL_CSUM | NETIF_F_TSO | NETIF_F_UFO) |
1203 | NETIF_F_TSO|NETIF_F_UFO) | ||
1204 | 1203 | ||
1205 | /* | 1204 | /* |
1206 | * Compute the common dev->feature set available to all slaves. Some | 1205 | * Compute the common dev->feature set available to all slaves. Some |
@@ -1218,9 +1217,7 @@ static int bond_compute_features(struct bonding *bond) | |||
1218 | features &= (slave->dev->features & BOND_INTERSECT_FEATURES); | 1217 | features &= (slave->dev->features & BOND_INTERSECT_FEATURES); |
1219 | 1218 | ||
1220 | if ((features & NETIF_F_SG) && | 1219 | if ((features & NETIF_F_SG) && |
1221 | !(features & (NETIF_F_IP_CSUM | | 1220 | !(features & NETIF_F_ALL_CSUM)) |
1222 | NETIF_F_NO_CSUM | | ||
1223 | NETIF_F_HW_CSUM))) | ||
1224 | features &= ~NETIF_F_SG; | 1221 | features &= ~NETIF_F_SG; |
1225 | 1222 | ||
1226 | /* | 1223 | /* |
@@ -4191,7 +4188,7 @@ static int bond_init(struct net_device *bond_dev, struct bond_params *params) | |||
4191 | */ | 4188 | */ |
4192 | bond_dev->features |= NETIF_F_VLAN_CHALLENGED; | 4189 | bond_dev->features |= NETIF_F_VLAN_CHALLENGED; |
4193 | 4190 | ||
4194 | /* don't acquire bond device's xmit_lock when | 4191 | /* don't acquire bond device's netif_tx_lock when |
4195 | * transmitting */ | 4192 | * transmitting */ |
4196 | bond_dev->features |= NETIF_F_LLTX; | 4193 | bond_dev->features |= NETIF_F_LLTX; |
4197 | 4194 | ||
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c index ac48f7543500..39f36aa05aa8 100644 --- a/drivers/net/cassini.c +++ b/drivers/net/cassini.c | |||
@@ -4877,7 +4877,7 @@ static int __devinit cas_init_one(struct pci_dev *pdev, | |||
4877 | const struct pci_device_id *ent) | 4877 | const struct pci_device_id *ent) |
4878 | { | 4878 | { |
4879 | static int cas_version_printed = 0; | 4879 | static int cas_version_printed = 0; |
4880 | unsigned long casreg_base, casreg_len; | 4880 | unsigned long casreg_len; |
4881 | struct net_device *dev; | 4881 | struct net_device *dev; |
4882 | struct cas *cp; | 4882 | struct cas *cp; |
4883 | int i, err, pci_using_dac; | 4883 | int i, err, pci_using_dac; |
@@ -4972,7 +4972,6 @@ static int __devinit cas_init_one(struct pci_dev *pdev, | |||
4972 | pci_using_dac = 0; | 4972 | pci_using_dac = 0; |
4973 | } | 4973 | } |
4974 | 4974 | ||
4975 | casreg_base = pci_resource_start(pdev, 0); | ||
4976 | casreg_len = pci_resource_len(pdev, 0); | 4975 | casreg_len = pci_resource_len(pdev, 0); |
4977 | 4976 | ||
4978 | cp = netdev_priv(dev); | 4977 | cp = netdev_priv(dev); |
@@ -5024,7 +5023,7 @@ static int __devinit cas_init_one(struct pci_dev *pdev, | |||
5024 | cp->timer_ticks = 0; | 5023 | cp->timer_ticks = 0; |
5025 | 5024 | ||
5026 | /* give us access to cassini registers */ | 5025 | /* give us access to cassini registers */ |
5027 | cp->regs = ioremap(casreg_base, casreg_len); | 5026 | cp->regs = pci_iomap(pdev, 0, casreg_len); |
5028 | if (cp->regs == 0UL) { | 5027 | if (cp->regs == 0UL) { |
5029 | printk(KERN_ERR PFX "Cannot map device registers, " | 5028 | printk(KERN_ERR PFX "Cannot map device registers, " |
5030 | "aborting.\n"); | 5029 | "aborting.\n"); |
@@ -5123,7 +5122,7 @@ err_out_iounmap: | |||
5123 | cas_shutdown(cp); | 5122 | cas_shutdown(cp); |
5124 | mutex_unlock(&cp->pm_mutex); | 5123 | mutex_unlock(&cp->pm_mutex); |
5125 | 5124 | ||
5126 | iounmap(cp->regs); | 5125 | pci_iounmap(pdev, cp->regs); |
5127 | 5126 | ||
5128 | 5127 | ||
5129 | err_out_free_res: | 5128 | err_out_free_res: |
@@ -5171,7 +5170,7 @@ static void __devexit cas_remove_one(struct pci_dev *pdev) | |||
5171 | #endif | 5170 | #endif |
5172 | pci_free_consistent(pdev, sizeof(struct cas_init_block), | 5171 | pci_free_consistent(pdev, sizeof(struct cas_init_block), |
5173 | cp->init_block, cp->block_dvma); | 5172 | cp->init_block, cp->block_dvma); |
5174 | iounmap(cp->regs); | 5173 | pci_iounmap(pdev, cp->regs); |
5175 | free_netdev(dev); | 5174 | free_netdev(dev); |
5176 | pci_release_regions(pdev); | 5175 | pci_release_regions(pdev); |
5177 | pci_disable_device(pdev); | 5176 | pci_disable_device(pdev); |
diff --git a/drivers/net/e100.c b/drivers/net/e100.c index 31ac001f5517..f37170cc1a37 100644 --- a/drivers/net/e100.c +++ b/drivers/net/e100.c | |||
@@ -2780,6 +2780,80 @@ static void e100_shutdown(struct pci_dev *pdev) | |||
2780 | DPRINTK(PROBE,ERR, "Error enabling wake\n"); | 2780 | DPRINTK(PROBE,ERR, "Error enabling wake\n"); |
2781 | } | 2781 | } |
2782 | 2782 | ||
2783 | /* ------------------ PCI Error Recovery infrastructure -------------- */ | ||
2784 | /** | ||
2785 | * e100_io_error_detected - called when PCI error is detected. | ||
2786 | * @pdev: Pointer to PCI device | ||
2787 | * @state: The current pci conneection state | ||
2788 | */ | ||
2789 | static pci_ers_result_t e100_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | ||
2790 | { | ||
2791 | struct net_device *netdev = pci_get_drvdata(pdev); | ||
2792 | |||
2793 | /* Similar to calling e100_down(), but avoids adpater I/O. */ | ||
2794 | netdev->stop(netdev); | ||
2795 | |||
2796 | /* Detach; put netif into state similar to hotplug unplug. */ | ||
2797 | netif_poll_enable(netdev); | ||
2798 | netif_device_detach(netdev); | ||
2799 | |||
2800 | /* Request a slot reset. */ | ||
2801 | return PCI_ERS_RESULT_NEED_RESET; | ||
2802 | } | ||
2803 | |||
2804 | /** | ||
2805 | * e100_io_slot_reset - called after the pci bus has been reset. | ||
2806 | * @pdev: Pointer to PCI device | ||
2807 | * | ||
2808 | * Restart the card from scratch. | ||
2809 | */ | ||
2810 | static pci_ers_result_t e100_io_slot_reset(struct pci_dev *pdev) | ||
2811 | { | ||
2812 | struct net_device *netdev = pci_get_drvdata(pdev); | ||
2813 | struct nic *nic = netdev_priv(netdev); | ||
2814 | |||
2815 | if (pci_enable_device(pdev)) { | ||
2816 | printk(KERN_ERR "e100: Cannot re-enable PCI device after reset.\n"); | ||
2817 | return PCI_ERS_RESULT_DISCONNECT; | ||
2818 | } | ||
2819 | pci_set_master(pdev); | ||
2820 | |||
2821 | /* Only one device per card can do a reset */ | ||
2822 | if (0 != PCI_FUNC(pdev->devfn)) | ||
2823 | return PCI_ERS_RESULT_RECOVERED; | ||
2824 | e100_hw_reset(nic); | ||
2825 | e100_phy_init(nic); | ||
2826 | |||
2827 | return PCI_ERS_RESULT_RECOVERED; | ||
2828 | } | ||
2829 | |||
2830 | /** | ||
2831 | * e100_io_resume - resume normal operations | ||
2832 | * @pdev: Pointer to PCI device | ||
2833 | * | ||
2834 | * Resume normal operations after an error recovery | ||
2835 | * sequence has been completed. | ||
2836 | */ | ||
2837 | static void e100_io_resume(struct pci_dev *pdev) | ||
2838 | { | ||
2839 | struct net_device *netdev = pci_get_drvdata(pdev); | ||
2840 | struct nic *nic = netdev_priv(netdev); | ||
2841 | |||
2842 | /* ack any pending wake events, disable PME */ | ||
2843 | pci_enable_wake(pdev, 0, 0); | ||
2844 | |||
2845 | netif_device_attach(netdev); | ||
2846 | if (netif_running(netdev)) { | ||
2847 | e100_open(netdev); | ||
2848 | mod_timer(&nic->watchdog, jiffies); | ||
2849 | } | ||
2850 | } | ||
2851 | |||
2852 | static struct pci_error_handlers e100_err_handler = { | ||
2853 | .error_detected = e100_io_error_detected, | ||
2854 | .slot_reset = e100_io_slot_reset, | ||
2855 | .resume = e100_io_resume, | ||
2856 | }; | ||
2783 | 2857 | ||
2784 | static struct pci_driver e100_driver = { | 2858 | static struct pci_driver e100_driver = { |
2785 | .name = DRV_NAME, | 2859 | .name = DRV_NAME, |
@@ -2791,6 +2865,7 @@ static struct pci_driver e100_driver = { | |||
2791 | .resume = e100_resume, | 2865 | .resume = e100_resume, |
2792 | #endif | 2866 | #endif |
2793 | .shutdown = e100_shutdown, | 2867 | .shutdown = e100_shutdown, |
2868 | .err_handler = &e100_err_handler, | ||
2794 | }; | 2869 | }; |
2795 | 2870 | ||
2796 | static int __init e100_init_module(void) | 2871 | static int __init e100_init_module(void) |
diff --git a/drivers/net/e1000/Makefile b/drivers/net/e1000/Makefile index ca9f89552da3..5dea2b7dea4d 100644 --- a/drivers/net/e1000/Makefile +++ b/drivers/net/e1000/Makefile | |||
@@ -1,7 +1,7 @@ | |||
1 | ################################################################################ | 1 | ################################################################################ |
2 | # | 2 | # |
3 | # | 3 | # |
4 | # Copyright(c) 1999 - 2003 Intel Corporation. All rights reserved. | 4 | # Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | # | 5 | # |
6 | # This program is free software; you can redistribute it and/or modify it | 6 | # This program is free software; you can redistribute it and/or modify it |
7 | # under the terms of the GNU General Public License as published by the Free | 7 | # under the terms of the GNU General Public License as published by the Free |
@@ -22,6 +22,7 @@ | |||
22 | # | 22 | # |
23 | # Contact Information: | 23 | # Contact Information: |
24 | # Linux NICS <linux.nics@intel.com> | 24 | # Linux NICS <linux.nics@intel.com> |
25 | # e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | # Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 26 | # Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | # | 27 | # |
27 | ################################################################################ | 28 | ################################################################################ |
diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h index 281de41d030a..2bc34fbfa69c 100644 --- a/drivers/net/e1000/e1000.h +++ b/drivers/net/e1000/e1000.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | Contact Information: | 23 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 24 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 27 | ||
27 | *******************************************************************************/ | 28 | *******************************************************************************/ |
@@ -114,6 +115,8 @@ struct e1000_adapter; | |||
114 | /* Supported Rx Buffer Sizes */ | 115 | /* Supported Rx Buffer Sizes */ |
115 | #define E1000_RXBUFFER_128 128 /* Used for packet split */ | 116 | #define E1000_RXBUFFER_128 128 /* Used for packet split */ |
116 | #define E1000_RXBUFFER_256 256 /* Used for packet split */ | 117 | #define E1000_RXBUFFER_256 256 /* Used for packet split */ |
118 | #define E1000_RXBUFFER_512 512 | ||
119 | #define E1000_RXBUFFER_1024 1024 | ||
117 | #define E1000_RXBUFFER_2048 2048 | 120 | #define E1000_RXBUFFER_2048 2048 |
118 | #define E1000_RXBUFFER_4096 4096 | 121 | #define E1000_RXBUFFER_4096 4096 |
119 | #define E1000_RXBUFFER_8192 8192 | 122 | #define E1000_RXBUFFER_8192 8192 |
@@ -334,7 +337,6 @@ struct e1000_adapter { | |||
334 | boolean_t have_msi; | 337 | boolean_t have_msi; |
335 | #endif | 338 | #endif |
336 | /* to not mess up cache alignment, always add to the bottom */ | 339 | /* to not mess up cache alignment, always add to the bottom */ |
337 | boolean_t txb2b; | ||
338 | #ifdef NETIF_F_TSO | 340 | #ifdef NETIF_F_TSO |
339 | boolean_t tso_force; | 341 | boolean_t tso_force; |
340 | #endif | 342 | #endif |
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c index d1c705b412c2..6ed7f599eba3 100644 --- a/drivers/net/e1000/e1000_ethtool.c +++ b/drivers/net/e1000/e1000_ethtool.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | Contact Information: | 23 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 24 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 27 | ||
27 | *******************************************************************************/ | 28 | *******************************************************************************/ |
@@ -864,8 +865,8 @@ static int | |||
864 | e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) | 865 | e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) |
865 | { | 866 | { |
866 | struct net_device *netdev = adapter->netdev; | 867 | struct net_device *netdev = adapter->netdev; |
867 | uint32_t mask, i=0, shared_int = TRUE; | 868 | uint32_t mask, i=0, shared_int = TRUE; |
868 | uint32_t irq = adapter->pdev->irq; | 869 | uint32_t irq = adapter->pdev->irq; |
869 | 870 | ||
870 | *data = 0; | 871 | *data = 0; |
871 | 872 | ||
@@ -891,22 +892,22 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) | |||
891 | /* Interrupt to test */ | 892 | /* Interrupt to test */ |
892 | mask = 1 << i; | 893 | mask = 1 << i; |
893 | 894 | ||
894 | if (!shared_int) { | 895 | if (!shared_int) { |
895 | /* Disable the interrupt to be reported in | 896 | /* Disable the interrupt to be reported in |
896 | * the cause register and then force the same | 897 | * the cause register and then force the same |
897 | * interrupt and see if one gets posted. If | 898 | * interrupt and see if one gets posted. If |
898 | * an interrupt was posted to the bus, the | 899 | * an interrupt was posted to the bus, the |
899 | * test failed. | 900 | * test failed. |
900 | */ | 901 | */ |
901 | adapter->test_icr = 0; | 902 | adapter->test_icr = 0; |
902 | E1000_WRITE_REG(&adapter->hw, IMC, mask); | 903 | E1000_WRITE_REG(&adapter->hw, IMC, mask); |
903 | E1000_WRITE_REG(&adapter->hw, ICS, mask); | 904 | E1000_WRITE_REG(&adapter->hw, ICS, mask); |
904 | msec_delay(10); | 905 | msec_delay(10); |
905 | 906 | ||
906 | if (adapter->test_icr & mask) { | 907 | if (adapter->test_icr & mask) { |
907 | *data = 3; | 908 | *data = 3; |
908 | break; | 909 | break; |
909 | } | 910 | } |
910 | } | 911 | } |
911 | 912 | ||
912 | /* Enable the interrupt to be reported in | 913 | /* Enable the interrupt to be reported in |
@@ -925,7 +926,7 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) | |||
925 | break; | 926 | break; |
926 | } | 927 | } |
927 | 928 | ||
928 | if (!shared_int) { | 929 | if (!shared_int) { |
929 | /* Disable the other interrupts to be reported in | 930 | /* Disable the other interrupts to be reported in |
930 | * the cause register and then force the other | 931 | * the cause register and then force the other |
931 | * interrupts and see if any get posted. If | 932 | * interrupts and see if any get posted. If |
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 523c2c9fc0ac..3959039b16ec 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | Contact Information: | 23 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 24 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 27 | ||
27 | *******************************************************************************/ | 28 | *******************************************************************************/ |
@@ -764,7 +765,7 @@ e1000_init_hw(struct e1000_hw *hw) | |||
764 | } | 765 | } |
765 | 766 | ||
766 | if (hw->mac_type == e1000_82573) { | 767 | if (hw->mac_type == e1000_82573) { |
767 | e1000_enable_tx_pkt_filtering(hw); | 768 | e1000_enable_tx_pkt_filtering(hw); |
768 | } | 769 | } |
769 | 770 | ||
770 | switch (hw->mac_type) { | 771 | switch (hw->mac_type) { |
@@ -860,7 +861,7 @@ e1000_adjust_serdes_amplitude(struct e1000_hw *hw) | |||
860 | 861 | ||
861 | if(eeprom_data != EEPROM_RESERVED_WORD) { | 862 | if(eeprom_data != EEPROM_RESERVED_WORD) { |
862 | /* Adjust SERDES output amplitude only. */ | 863 | /* Adjust SERDES output amplitude only. */ |
863 | eeprom_data &= EEPROM_SERDES_AMPLITUDE_MASK; | 864 | eeprom_data &= EEPROM_SERDES_AMPLITUDE_MASK; |
864 | ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL, eeprom_data); | 865 | ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL, eeprom_data); |
865 | if(ret_val) | 866 | if(ret_val) |
866 | return ret_val; | 867 | return ret_val; |
@@ -1227,7 +1228,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw) | |||
1227 | 1228 | ||
1228 | if (hw->phy_reset_disable) | 1229 | if (hw->phy_reset_disable) |
1229 | return E1000_SUCCESS; | 1230 | return E1000_SUCCESS; |
1230 | 1231 | ||
1231 | ret_val = e1000_phy_reset(hw); | 1232 | ret_val = e1000_phy_reset(hw); |
1232 | if (ret_val) { | 1233 | if (ret_val) { |
1233 | DEBUGOUT("Error Resetting the PHY\n"); | 1234 | DEBUGOUT("Error Resetting the PHY\n"); |
@@ -1369,7 +1370,7 @@ e1000_copper_link_ggp_setup(struct e1000_hw *hw) | |||
1369 | DEBUGFUNC("e1000_copper_link_ggp_setup"); | 1370 | DEBUGFUNC("e1000_copper_link_ggp_setup"); |
1370 | 1371 | ||
1371 | if(!hw->phy_reset_disable) { | 1372 | if(!hw->phy_reset_disable) { |
1372 | 1373 | ||
1373 | /* Enable CRS on TX for half-duplex operation. */ | 1374 | /* Enable CRS on TX for half-duplex operation. */ |
1374 | ret_val = e1000_read_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, | 1375 | ret_val = e1000_read_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, |
1375 | &phy_data); | 1376 | &phy_data); |
@@ -1518,7 +1519,7 @@ e1000_copper_link_mgp_setup(struct e1000_hw *hw) | |||
1518 | 1519 | ||
1519 | if(hw->phy_reset_disable) | 1520 | if(hw->phy_reset_disable) |
1520 | return E1000_SUCCESS; | 1521 | return E1000_SUCCESS; |
1521 | 1522 | ||
1522 | /* Enable CRS on TX. This must be set for half-duplex operation. */ | 1523 | /* Enable CRS on TX. This must be set for half-duplex operation. */ |
1523 | ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); | 1524 | ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); |
1524 | if(ret_val) | 1525 | if(ret_val) |
@@ -1664,7 +1665,7 @@ e1000_copper_link_autoneg(struct e1000_hw *hw) | |||
1664 | * collision distance in the Transmit Control Register. | 1665 | * collision distance in the Transmit Control Register. |
1665 | * 2) Set up flow control on the MAC to that established with | 1666 | * 2) Set up flow control on the MAC to that established with |
1666 | * the link partner. | 1667 | * the link partner. |
1667 | * 3) Config DSP to improve Gigabit link quality for some PHY revisions. | 1668 | * 3) Config DSP to improve Gigabit link quality for some PHY revisions. |
1668 | * | 1669 | * |
1669 | * hw - Struct containing variables accessed by shared code | 1670 | * hw - Struct containing variables accessed by shared code |
1670 | ******************************************************************************/ | 1671 | ******************************************************************************/ |
@@ -1673,7 +1674,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw) | |||
1673 | { | 1674 | { |
1674 | int32_t ret_val; | 1675 | int32_t ret_val; |
1675 | DEBUGFUNC("e1000_copper_link_postconfig"); | 1676 | DEBUGFUNC("e1000_copper_link_postconfig"); |
1676 | 1677 | ||
1677 | if(hw->mac_type >= e1000_82544) { | 1678 | if(hw->mac_type >= e1000_82544) { |
1678 | e1000_config_collision_dist(hw); | 1679 | e1000_config_collision_dist(hw); |
1679 | } else { | 1680 | } else { |
@@ -1697,7 +1698,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw) | |||
1697 | return ret_val; | 1698 | return ret_val; |
1698 | } | 1699 | } |
1699 | } | 1700 | } |
1700 | 1701 | ||
1701 | return E1000_SUCCESS; | 1702 | return E1000_SUCCESS; |
1702 | } | 1703 | } |
1703 | 1704 | ||
@@ -1753,11 +1754,11 @@ e1000_setup_copper_link(struct e1000_hw *hw) | |||
1753 | } | 1754 | } |
1754 | 1755 | ||
1755 | if(hw->autoneg) { | 1756 | if(hw->autoneg) { |
1756 | /* Setup autoneg and flow control advertisement | 1757 | /* Setup autoneg and flow control advertisement |
1757 | * and perform autonegotiation */ | 1758 | * and perform autonegotiation */ |
1758 | ret_val = e1000_copper_link_autoneg(hw); | 1759 | ret_val = e1000_copper_link_autoneg(hw); |
1759 | if(ret_val) | 1760 | if(ret_val) |
1760 | return ret_val; | 1761 | return ret_val; |
1761 | } else { | 1762 | } else { |
1762 | /* PHY will be set to 10H, 10F, 100H,or 100F | 1763 | /* PHY will be set to 10H, 10F, 100H,or 100F |
1763 | * depending on value from forced_speed_duplex. */ | 1764 | * depending on value from forced_speed_duplex. */ |
@@ -1785,7 +1786,7 @@ e1000_setup_copper_link(struct e1000_hw *hw) | |||
1785 | ret_val = e1000_copper_link_postconfig(hw); | 1786 | ret_val = e1000_copper_link_postconfig(hw); |
1786 | if(ret_val) | 1787 | if(ret_val) |
1787 | return ret_val; | 1788 | return ret_val; |
1788 | 1789 | ||
1789 | DEBUGOUT("Valid link established!!!\n"); | 1790 | DEBUGOUT("Valid link established!!!\n"); |
1790 | return E1000_SUCCESS; | 1791 | return E1000_SUCCESS; |
1791 | } | 1792 | } |
@@ -1983,7 +1984,7 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw) | |||
1983 | 1984 | ||
1984 | DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); | 1985 | DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); |
1985 | 1986 | ||
1986 | ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg); | 1987 | ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg); |
1987 | if(ret_val) | 1988 | if(ret_val) |
1988 | return ret_val; | 1989 | return ret_val; |
1989 | 1990 | ||
@@ -2272,7 +2273,7 @@ e1000_config_mac_to_phy(struct e1000_hw *hw) | |||
2272 | 2273 | ||
2273 | DEBUGFUNC("e1000_config_mac_to_phy"); | 2274 | DEBUGFUNC("e1000_config_mac_to_phy"); |
2274 | 2275 | ||
2275 | /* 82544 or newer MAC, Auto Speed Detection takes care of | 2276 | /* 82544 or newer MAC, Auto Speed Detection takes care of |
2276 | * MAC speed/duplex configuration.*/ | 2277 | * MAC speed/duplex configuration.*/ |
2277 | if (hw->mac_type >= e1000_82544) | 2278 | if (hw->mac_type >= e1000_82544) |
2278 | return E1000_SUCCESS; | 2279 | return E1000_SUCCESS; |
@@ -2291,9 +2292,9 @@ e1000_config_mac_to_phy(struct e1000_hw *hw) | |||
2291 | if(ret_val) | 2292 | if(ret_val) |
2292 | return ret_val; | 2293 | return ret_val; |
2293 | 2294 | ||
2294 | if(phy_data & M88E1000_PSSR_DPLX) | 2295 | if(phy_data & M88E1000_PSSR_DPLX) |
2295 | ctrl |= E1000_CTRL_FD; | 2296 | ctrl |= E1000_CTRL_FD; |
2296 | else | 2297 | else |
2297 | ctrl &= ~E1000_CTRL_FD; | 2298 | ctrl &= ~E1000_CTRL_FD; |
2298 | 2299 | ||
2299 | e1000_config_collision_dist(hw); | 2300 | e1000_config_collision_dist(hw); |
@@ -2492,10 +2493,10 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2492 | */ | 2493 | */ |
2493 | if(hw->original_fc == e1000_fc_full) { | 2494 | if(hw->original_fc == e1000_fc_full) { |
2494 | hw->fc = e1000_fc_full; | 2495 | hw->fc = e1000_fc_full; |
2495 | DEBUGOUT("Flow Control = FULL.\r\n"); | 2496 | DEBUGOUT("Flow Control = FULL.\n"); |
2496 | } else { | 2497 | } else { |
2497 | hw->fc = e1000_fc_rx_pause; | 2498 | hw->fc = e1000_fc_rx_pause; |
2498 | DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n"); | 2499 | DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); |
2499 | } | 2500 | } |
2500 | } | 2501 | } |
2501 | /* For receiving PAUSE frames ONLY. | 2502 | /* For receiving PAUSE frames ONLY. |
@@ -2511,7 +2512,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2511 | (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && | 2512 | (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && |
2512 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { | 2513 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { |
2513 | hw->fc = e1000_fc_tx_pause; | 2514 | hw->fc = e1000_fc_tx_pause; |
2514 | DEBUGOUT("Flow Control = TX PAUSE frames only.\r\n"); | 2515 | DEBUGOUT("Flow Control = TX PAUSE frames only.\n"); |
2515 | } | 2516 | } |
2516 | /* For transmitting PAUSE frames ONLY. | 2517 | /* For transmitting PAUSE frames ONLY. |
2517 | * | 2518 | * |
@@ -2526,7 +2527,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2526 | !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && | 2527 | !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && |
2527 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { | 2528 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { |
2528 | hw->fc = e1000_fc_rx_pause; | 2529 | hw->fc = e1000_fc_rx_pause; |
2529 | DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n"); | 2530 | DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); |
2530 | } | 2531 | } |
2531 | /* Per the IEEE spec, at this point flow control should be | 2532 | /* Per the IEEE spec, at this point flow control should be |
2532 | * disabled. However, we want to consider that we could | 2533 | * disabled. However, we want to consider that we could |
@@ -2552,10 +2553,10 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2552 | hw->original_fc == e1000_fc_tx_pause) || | 2553 | hw->original_fc == e1000_fc_tx_pause) || |
2553 | hw->fc_strict_ieee) { | 2554 | hw->fc_strict_ieee) { |
2554 | hw->fc = e1000_fc_none; | 2555 | hw->fc = e1000_fc_none; |
2555 | DEBUGOUT("Flow Control = NONE.\r\n"); | 2556 | DEBUGOUT("Flow Control = NONE.\n"); |
2556 | } else { | 2557 | } else { |
2557 | hw->fc = e1000_fc_rx_pause; | 2558 | hw->fc = e1000_fc_rx_pause; |
2558 | DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n"); | 2559 | DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); |
2559 | } | 2560 | } |
2560 | 2561 | ||
2561 | /* Now we need to do one last check... If we auto- | 2562 | /* Now we need to do one last check... If we auto- |
@@ -2580,7 +2581,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2580 | return ret_val; | 2581 | return ret_val; |
2581 | } | 2582 | } |
2582 | } else { | 2583 | } else { |
2583 | DEBUGOUT("Copper PHY and Auto Neg has not completed.\r\n"); | 2584 | DEBUGOUT("Copper PHY and Auto Neg has not completed.\n"); |
2584 | } | 2585 | } |
2585 | } | 2586 | } |
2586 | return E1000_SUCCESS; | 2587 | return E1000_SUCCESS; |
@@ -2763,7 +2764,7 @@ e1000_check_for_link(struct e1000_hw *hw) | |||
2763 | hw->autoneg_failed = 1; | 2764 | hw->autoneg_failed = 1; |
2764 | return 0; | 2765 | return 0; |
2765 | } | 2766 | } |
2766 | DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\r\n"); | 2767 | DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n"); |
2767 | 2768 | ||
2768 | /* Disable auto-negotiation in the TXCW register */ | 2769 | /* Disable auto-negotiation in the TXCW register */ |
2769 | E1000_WRITE_REG(hw, TXCW, (hw->txcw & ~E1000_TXCW_ANE)); | 2770 | E1000_WRITE_REG(hw, TXCW, (hw->txcw & ~E1000_TXCW_ANE)); |
@@ -2788,7 +2789,7 @@ e1000_check_for_link(struct e1000_hw *hw) | |||
2788 | else if(((hw->media_type == e1000_media_type_fiber) || | 2789 | else if(((hw->media_type == e1000_media_type_fiber) || |
2789 | (hw->media_type == e1000_media_type_internal_serdes)) && | 2790 | (hw->media_type == e1000_media_type_internal_serdes)) && |
2790 | (ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) { | 2791 | (ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) { |
2791 | DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\r\n"); | 2792 | DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n"); |
2792 | E1000_WRITE_REG(hw, TXCW, hw->txcw); | 2793 | E1000_WRITE_REG(hw, TXCW, hw->txcw); |
2793 | E1000_WRITE_REG(hw, CTRL, (ctrl & ~E1000_CTRL_SLU)); | 2794 | E1000_WRITE_REG(hw, CTRL, (ctrl & ~E1000_CTRL_SLU)); |
2794 | 2795 | ||
@@ -2851,13 +2852,13 @@ e1000_get_speed_and_duplex(struct e1000_hw *hw, | |||
2851 | 2852 | ||
2852 | if(status & E1000_STATUS_FD) { | 2853 | if(status & E1000_STATUS_FD) { |
2853 | *duplex = FULL_DUPLEX; | 2854 | *duplex = FULL_DUPLEX; |
2854 | DEBUGOUT("Full Duplex\r\n"); | 2855 | DEBUGOUT("Full Duplex\n"); |
2855 | } else { | 2856 | } else { |
2856 | *duplex = HALF_DUPLEX; | 2857 | *duplex = HALF_DUPLEX; |
2857 | DEBUGOUT(" Half Duplex\r\n"); | 2858 | DEBUGOUT(" Half Duplex\n"); |
2858 | } | 2859 | } |
2859 | } else { | 2860 | } else { |
2860 | DEBUGOUT("1000 Mbs, Full Duplex\r\n"); | 2861 | DEBUGOUT("1000 Mbs, Full Duplex\n"); |
2861 | *speed = SPEED_1000; | 2862 | *speed = SPEED_1000; |
2862 | *duplex = FULL_DUPLEX; | 2863 | *duplex = FULL_DUPLEX; |
2863 | } | 2864 | } |
@@ -2883,7 +2884,7 @@ e1000_get_speed_and_duplex(struct e1000_hw *hw, | |||
2883 | } | 2884 | } |
2884 | } | 2885 | } |
2885 | 2886 | ||
2886 | if ((hw->mac_type == e1000_80003es2lan) && | 2887 | if ((hw->mac_type == e1000_80003es2lan) && |
2887 | (hw->media_type == e1000_media_type_copper)) { | 2888 | (hw->media_type == e1000_media_type_copper)) { |
2888 | if (*speed == SPEED_1000) | 2889 | if (*speed == SPEED_1000) |
2889 | ret_val = e1000_configure_kmrn_for_1000(hw); | 2890 | ret_val = e1000_configure_kmrn_for_1000(hw); |
@@ -3159,7 +3160,7 @@ e1000_read_phy_reg(struct e1000_hw *hw, | |||
3159 | if (e1000_swfw_sync_acquire(hw, swfw)) | 3160 | if (e1000_swfw_sync_acquire(hw, swfw)) |
3160 | return -E1000_ERR_SWFW_SYNC; | 3161 | return -E1000_ERR_SWFW_SYNC; |
3161 | 3162 | ||
3162 | if((hw->phy_type == e1000_phy_igp || | 3163 | if((hw->phy_type == e1000_phy_igp || |
3163 | hw->phy_type == e1000_phy_igp_2) && | 3164 | hw->phy_type == e1000_phy_igp_2) && |
3164 | (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { | 3165 | (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { |
3165 | ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT, | 3166 | ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT, |
@@ -3298,7 +3299,7 @@ e1000_write_phy_reg(struct e1000_hw *hw, | |||
3298 | if (e1000_swfw_sync_acquire(hw, swfw)) | 3299 | if (e1000_swfw_sync_acquire(hw, swfw)) |
3299 | return -E1000_ERR_SWFW_SYNC; | 3300 | return -E1000_ERR_SWFW_SYNC; |
3300 | 3301 | ||
3301 | if((hw->phy_type == e1000_phy_igp || | 3302 | if((hw->phy_type == e1000_phy_igp || |
3302 | hw->phy_type == e1000_phy_igp_2) && | 3303 | hw->phy_type == e1000_phy_igp_2) && |
3303 | (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { | 3304 | (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { |
3304 | ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT, | 3305 | ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT, |
@@ -3496,22 +3497,22 @@ e1000_phy_hw_reset(struct e1000_hw *hw) | |||
3496 | } | 3497 | } |
3497 | /* Read the device control register and assert the E1000_CTRL_PHY_RST | 3498 | /* Read the device control register and assert the E1000_CTRL_PHY_RST |
3498 | * bit. Then, take it out of reset. | 3499 | * bit. Then, take it out of reset. |
3499 | * For pre-e1000_82571 hardware, we delay for 10ms between the assert | 3500 | * For pre-e1000_82571 hardware, we delay for 10ms between the assert |
3500 | * and deassert. For e1000_82571 hardware and later, we instead delay | 3501 | * and deassert. For e1000_82571 hardware and later, we instead delay |
3501 | * for 50us between and 10ms after the deassertion. | 3502 | * for 50us between and 10ms after the deassertion. |
3502 | */ | 3503 | */ |
3503 | ctrl = E1000_READ_REG(hw, CTRL); | 3504 | ctrl = E1000_READ_REG(hw, CTRL); |
3504 | E1000_WRITE_REG(hw, CTRL, ctrl | E1000_CTRL_PHY_RST); | 3505 | E1000_WRITE_REG(hw, CTRL, ctrl | E1000_CTRL_PHY_RST); |
3505 | E1000_WRITE_FLUSH(hw); | 3506 | E1000_WRITE_FLUSH(hw); |
3506 | 3507 | ||
3507 | if (hw->mac_type < e1000_82571) | 3508 | if (hw->mac_type < e1000_82571) |
3508 | msec_delay(10); | 3509 | msec_delay(10); |
3509 | else | 3510 | else |
3510 | udelay(100); | 3511 | udelay(100); |
3511 | 3512 | ||
3512 | E1000_WRITE_REG(hw, CTRL, ctrl); | 3513 | E1000_WRITE_REG(hw, CTRL, ctrl); |
3513 | E1000_WRITE_FLUSH(hw); | 3514 | E1000_WRITE_FLUSH(hw); |
3514 | 3515 | ||
3515 | if (hw->mac_type >= e1000_82571) | 3516 | if (hw->mac_type >= e1000_82571) |
3516 | msec_delay(10); | 3517 | msec_delay(10); |
3517 | e1000_swfw_sync_release(hw, swfw); | 3518 | e1000_swfw_sync_release(hw, swfw); |
@@ -3815,7 +3816,7 @@ e1000_phy_m88_get_info(struct e1000_hw *hw, | |||
3815 | /* Check polarity status */ | 3816 | /* Check polarity status */ |
3816 | ret_val = e1000_check_polarity(hw, &polarity); | 3817 | ret_val = e1000_check_polarity(hw, &polarity); |
3817 | if(ret_val) | 3818 | if(ret_val) |
3818 | return ret_val; | 3819 | return ret_val; |
3819 | phy_info->cable_polarity = polarity; | 3820 | phy_info->cable_polarity = polarity; |
3820 | 3821 | ||
3821 | ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); | 3822 | ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); |
@@ -4540,14 +4541,14 @@ e1000_read_eeprom_eerd(struct e1000_hw *hw, | |||
4540 | 4541 | ||
4541 | E1000_WRITE_REG(hw, EERD, eerd); | 4542 | E1000_WRITE_REG(hw, EERD, eerd); |
4542 | error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_READ); | 4543 | error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_READ); |
4543 | 4544 | ||
4544 | if(error) { | 4545 | if(error) { |
4545 | break; | 4546 | break; |
4546 | } | 4547 | } |
4547 | data[i] = (E1000_READ_REG(hw, EERD) >> E1000_EEPROM_RW_REG_DATA); | 4548 | data[i] = (E1000_READ_REG(hw, EERD) >> E1000_EEPROM_RW_REG_DATA); |
4548 | 4549 | ||
4549 | } | 4550 | } |
4550 | 4551 | ||
4551 | return error; | 4552 | return error; |
4552 | } | 4553 | } |
4553 | 4554 | ||
@@ -4573,24 +4574,24 @@ e1000_write_eeprom_eewr(struct e1000_hw *hw, | |||
4573 | return -E1000_ERR_SWFW_SYNC; | 4574 | return -E1000_ERR_SWFW_SYNC; |
4574 | 4575 | ||
4575 | for (i = 0; i < words; i++) { | 4576 | for (i = 0; i < words; i++) { |
4576 | register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) | | 4577 | register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) | |
4577 | ((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) | | 4578 | ((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) | |
4578 | E1000_EEPROM_RW_REG_START; | 4579 | E1000_EEPROM_RW_REG_START; |
4579 | 4580 | ||
4580 | error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE); | 4581 | error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE); |
4581 | if(error) { | 4582 | if(error) { |
4582 | break; | 4583 | break; |
4583 | } | 4584 | } |
4584 | 4585 | ||
4585 | E1000_WRITE_REG(hw, EEWR, register_value); | 4586 | E1000_WRITE_REG(hw, EEWR, register_value); |
4586 | 4587 | ||
4587 | error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE); | 4588 | error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE); |
4588 | 4589 | ||
4589 | if(error) { | 4590 | if(error) { |
4590 | break; | 4591 | break; |
4591 | } | 4592 | } |
4592 | } | 4593 | } |
4593 | 4594 | ||
4594 | e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM); | 4595 | e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM); |
4595 | return error; | 4596 | return error; |
4596 | } | 4597 | } |
@@ -4610,7 +4611,7 @@ e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd) | |||
4610 | for(i = 0; i < attempts; i++) { | 4611 | for(i = 0; i < attempts; i++) { |
4611 | if(eerd == E1000_EEPROM_POLL_READ) | 4612 | if(eerd == E1000_EEPROM_POLL_READ) |
4612 | reg = E1000_READ_REG(hw, EERD); | 4613 | reg = E1000_READ_REG(hw, EERD); |
4613 | else | 4614 | else |
4614 | reg = E1000_READ_REG(hw, EEWR); | 4615 | reg = E1000_READ_REG(hw, EEWR); |
4615 | 4616 | ||
4616 | if(reg & E1000_EEPROM_RW_REG_DONE) { | 4617 | if(reg & E1000_EEPROM_RW_REG_DONE) { |
@@ -5135,7 +5136,7 @@ e1000_mc_addr_list_update(struct e1000_hw *hw, | |||
5135 | uint32_t i; | 5136 | uint32_t i; |
5136 | uint32_t num_rar_entry; | 5137 | uint32_t num_rar_entry; |
5137 | uint32_t num_mta_entry; | 5138 | uint32_t num_mta_entry; |
5138 | 5139 | ||
5139 | DEBUGFUNC("e1000_mc_addr_list_update"); | 5140 | DEBUGFUNC("e1000_mc_addr_list_update"); |
5140 | 5141 | ||
5141 | /* Set the new number of MC addresses that we are being requested to use. */ | 5142 | /* Set the new number of MC addresses that we are being requested to use. */ |
@@ -6240,7 +6241,7 @@ e1000_check_polarity(struct e1000_hw *hw, | |||
6240 | * 1 - Downshift ocured. | 6241 | * 1 - Downshift ocured. |
6241 | * | 6242 | * |
6242 | * returns: - E1000_ERR_XXX | 6243 | * returns: - E1000_ERR_XXX |
6243 | * E1000_SUCCESS | 6244 | * E1000_SUCCESS |
6244 | * | 6245 | * |
6245 | * For phy's older then IGP, this function reads the Downshift bit in the Phy | 6246 | * For phy's older then IGP, this function reads the Downshift bit in the Phy |
6246 | * Specific Status register. For IGP phy's, it reads the Downgrade bit in the | 6247 | * Specific Status register. For IGP phy's, it reads the Downgrade bit in the |
@@ -6255,7 +6256,7 @@ e1000_check_downshift(struct e1000_hw *hw) | |||
6255 | 6256 | ||
6256 | DEBUGFUNC("e1000_check_downshift"); | 6257 | DEBUGFUNC("e1000_check_downshift"); |
6257 | 6258 | ||
6258 | if(hw->phy_type == e1000_phy_igp || | 6259 | if(hw->phy_type == e1000_phy_igp || |
6259 | hw->phy_type == e1000_phy_igp_2) { | 6260 | hw->phy_type == e1000_phy_igp_2) { |
6260 | ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH, | 6261 | ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH, |
6261 | &phy_data); | 6262 | &phy_data); |
@@ -6684,8 +6685,8 @@ e1000_set_d0_lplu_state(struct e1000_hw *hw, | |||
6684 | 6685 | ||
6685 | 6686 | ||
6686 | } else { | 6687 | } else { |
6687 | 6688 | ||
6688 | phy_data |= IGP02E1000_PM_D0_LPLU; | 6689 | phy_data |= IGP02E1000_PM_D0_LPLU; |
6689 | ret_val = e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); | 6690 | ret_val = e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); |
6690 | if (ret_val) | 6691 | if (ret_val) |
6691 | return ret_val; | 6692 | return ret_val; |
@@ -6777,7 +6778,7 @@ int32_t | |||
6777 | e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer) | 6778 | e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer) |
6778 | { | 6779 | { |
6779 | uint8_t i; | 6780 | uint8_t i; |
6780 | uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET; | 6781 | uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET; |
6781 | uint8_t length = E1000_MNG_DHCP_COOKIE_LENGTH; | 6782 | uint8_t length = E1000_MNG_DHCP_COOKIE_LENGTH; |
6782 | 6783 | ||
6783 | length = (length >> 2); | 6784 | length = (length >> 2); |
@@ -6796,7 +6797,7 @@ e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer) | |||
6796 | * and also checks whether the previous command is completed. | 6797 | * and also checks whether the previous command is completed. |
6797 | * It busy waits in case of previous command is not completed. | 6798 | * It busy waits in case of previous command is not completed. |
6798 | * | 6799 | * |
6799 | * returns: - E1000_ERR_HOST_INTERFACE_COMMAND in case if is not ready or | 6800 | * returns: - E1000_ERR_HOST_INTERFACE_COMMAND in case if is not ready or |
6800 | * timeout | 6801 | * timeout |
6801 | * - E1000_SUCCESS for success. | 6802 | * - E1000_SUCCESS for success. |
6802 | ****************************************************************************/ | 6803 | ****************************************************************************/ |
@@ -6820,7 +6821,7 @@ e1000_mng_enable_host_if(struct e1000_hw * hw) | |||
6820 | msec_delay_irq(1); | 6821 | msec_delay_irq(1); |
6821 | } | 6822 | } |
6822 | 6823 | ||
6823 | if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) { | 6824 | if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) { |
6824 | DEBUGOUT("Previous command timeout failed .\n"); | 6825 | DEBUGOUT("Previous command timeout failed .\n"); |
6825 | return -E1000_ERR_HOST_INTERFACE_COMMAND; | 6826 | return -E1000_ERR_HOST_INTERFACE_COMMAND; |
6826 | } | 6827 | } |
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h index 150e45e30f87..467c9ed944f8 100644 --- a/drivers/net/e1000/e1000_hw.h +++ b/drivers/net/e1000/e1000_hw.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | Contact Information: | 23 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 24 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 27 | ||
27 | *******************************************************************************/ | 28 | *******************************************************************************/ |
@@ -374,7 +375,7 @@ struct e1000_host_mng_dhcp_cookie{ | |||
374 | }; | 375 | }; |
375 | #endif | 376 | #endif |
376 | 377 | ||
377 | int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer, | 378 | int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer, |
378 | uint16_t length); | 379 | uint16_t length); |
379 | boolean_t e1000_check_mng_mode(struct e1000_hw *hw); | 380 | boolean_t e1000_check_mng_mode(struct e1000_hw *hw); |
380 | boolean_t e1000_enable_tx_pkt_filtering(struct e1000_hw *hw); | 381 | boolean_t e1000_enable_tx_pkt_filtering(struct e1000_hw *hw); |
@@ -1801,7 +1802,7 @@ struct e1000_hw { | |||
1801 | * value2 = [0..64512], default=4096 | 1802 | * value2 = [0..64512], default=4096 |
1802 | * value3 = [0..64512], default=0 | 1803 | * value3 = [0..64512], default=0 |
1803 | */ | 1804 | */ |
1804 | 1805 | ||
1805 | #define E1000_PSRCTL_BSIZE0_MASK 0x0000007F | 1806 | #define E1000_PSRCTL_BSIZE0_MASK 0x0000007F |
1806 | #define E1000_PSRCTL_BSIZE1_MASK 0x00003F00 | 1807 | #define E1000_PSRCTL_BSIZE1_MASK 0x00003F00 |
1807 | #define E1000_PSRCTL_BSIZE2_MASK 0x003F0000 | 1808 | #define E1000_PSRCTL_BSIZE2_MASK 0x003F0000 |
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index 97e71a4fe8eb..a373ccb308d8 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -22,51 +22,13 @@ | |||
22 | 22 | ||
23 | Contact Information: | 23 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 24 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 27 | ||
27 | *******************************************************************************/ | 28 | *******************************************************************************/ |
28 | 29 | ||
29 | #include "e1000.h" | 30 | #include "e1000.h" |
30 | 31 | ||
31 | /* Change Log | ||
32 | * 7.0.33 3-Feb-2006 | ||
33 | * o Added another fix for the pass false carrier bit | ||
34 | * 7.0.32 24-Jan-2006 | ||
35 | * o Need to rebuild with noew version number for the pass false carrier | ||
36 | * fix in e1000_hw.c | ||
37 | * 7.0.30 18-Jan-2006 | ||
38 | * o fixup for tso workaround to disable it for pci-x | ||
39 | * o fix mem leak on 82542 | ||
40 | * o fixes for 10 Mb/s connections and incorrect stats | ||
41 | * 7.0.28 01/06/2006 | ||
42 | * o hardware workaround to only set "speed mode" bit for 1G link. | ||
43 | * 7.0.26 12/23/2005 | ||
44 | * o wake on lan support modified for device ID 10B5 | ||
45 | * o fix dhcp + vlan issue not making it to the iAMT firmware | ||
46 | * 7.0.24 12/9/2005 | ||
47 | * o New hardware support for the Gigabit NIC embedded in the south bridge | ||
48 | * o Fixes to the recycling logic (skb->tail) from IBM LTC | ||
49 | * 6.3.9 12/16/2005 | ||
50 | * o incorporate fix for recycled skbs from IBM LTC | ||
51 | * 6.3.7 11/18/2005 | ||
52 | * o Honor eeprom setting for enabling/disabling Wake On Lan | ||
53 | * 6.3.5 11/17/2005 | ||
54 | * o Fix memory leak in rx ring handling for PCI Express adapters | ||
55 | * 6.3.4 11/8/05 | ||
56 | * o Patch from Jesper Juhl to remove redundant NULL checks for kfree | ||
57 | * 6.3.2 9/20/05 | ||
58 | * o Render logic that sets/resets DRV_LOAD as inline functions to | ||
59 | * avoid code replication. If f/w is AMT then set DRV_LOAD only when | ||
60 | * network interface is open. | ||
61 | * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs. | ||
62 | * o Adjust PBA partioning for Jumbo frames using MTU size and not | ||
63 | * rx_buffer_len | ||
64 | * 6.3.1 9/19/05 | ||
65 | * o Use adapter->tx_timeout_factor in Tx Hung Detect logic | ||
66 | * (e1000_clean_tx_irq) | ||
67 | * o Support for 8086:10B5 device (Quad Port) | ||
68 | */ | ||
69 | |||
70 | char e1000_driver_name[] = "e1000"; | 32 | char e1000_driver_name[] = "e1000"; |
71 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; | 33 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
72 | #ifndef CONFIG_E1000_NAPI | 34 | #ifndef CONFIG_E1000_NAPI |
@@ -74,9 +36,9 @@ static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; | |||
74 | #else | 36 | #else |
75 | #define DRIVERNAPI "-NAPI" | 37 | #define DRIVERNAPI "-NAPI" |
76 | #endif | 38 | #endif |
77 | #define DRV_VERSION "7.0.33-k2"DRIVERNAPI | 39 | #define DRV_VERSION "7.0.38-k4"DRIVERNAPI |
78 | char e1000_driver_version[] = DRV_VERSION; | 40 | char e1000_driver_version[] = DRV_VERSION; |
79 | static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation."; | 41 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
80 | 42 | ||
81 | /* e1000_pci_tbl - PCI Device ID Table | 43 | /* e1000_pci_tbl - PCI Device ID Table |
82 | * | 44 | * |
@@ -208,8 +170,8 @@ static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | |||
208 | static void e1000_tx_timeout(struct net_device *dev); | 170 | static void e1000_tx_timeout(struct net_device *dev); |
209 | static void e1000_reset_task(struct net_device *dev); | 171 | static void e1000_reset_task(struct net_device *dev); |
210 | static void e1000_smartspeed(struct e1000_adapter *adapter); | 172 | static void e1000_smartspeed(struct e1000_adapter *adapter); |
211 | static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, | 173 | static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, |
212 | struct sk_buff *skb); | 174 | struct sk_buff *skb); |
213 | 175 | ||
214 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); | 176 | static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); |
215 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); | 177 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); |
@@ -227,6 +189,16 @@ static void e1000_shutdown(struct pci_dev *pdev); | |||
227 | static void e1000_netpoll (struct net_device *netdev); | 189 | static void e1000_netpoll (struct net_device *netdev); |
228 | #endif | 190 | #endif |
229 | 191 | ||
192 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, | ||
193 | pci_channel_state_t state); | ||
194 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); | ||
195 | static void e1000_io_resume(struct pci_dev *pdev); | ||
196 | |||
197 | static struct pci_error_handlers e1000_err_handler = { | ||
198 | .error_detected = e1000_io_error_detected, | ||
199 | .slot_reset = e1000_io_slot_reset, | ||
200 | .resume = e1000_io_resume, | ||
201 | }; | ||
230 | 202 | ||
231 | static struct pci_driver e1000_driver = { | 203 | static struct pci_driver e1000_driver = { |
232 | .name = e1000_driver_name, | 204 | .name = e1000_driver_name, |
@@ -238,7 +210,8 @@ static struct pci_driver e1000_driver = { | |||
238 | .suspend = e1000_suspend, | 210 | .suspend = e1000_suspend, |
239 | .resume = e1000_resume, | 211 | .resume = e1000_resume, |
240 | #endif | 212 | #endif |
241 | .shutdown = e1000_shutdown | 213 | .shutdown = e1000_shutdown, |
214 | .err_handler = &e1000_err_handler | ||
242 | }; | 215 | }; |
243 | 216 | ||
244 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | 217 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); |
@@ -293,7 +266,7 @@ module_exit(e1000_exit_module); | |||
293 | * @adapter: board private structure | 266 | * @adapter: board private structure |
294 | **/ | 267 | **/ |
295 | 268 | ||
296 | static inline void | 269 | static void |
297 | e1000_irq_disable(struct e1000_adapter *adapter) | 270 | e1000_irq_disable(struct e1000_adapter *adapter) |
298 | { | 271 | { |
299 | atomic_inc(&adapter->irq_sem); | 272 | atomic_inc(&adapter->irq_sem); |
@@ -307,7 +280,7 @@ e1000_irq_disable(struct e1000_adapter *adapter) | |||
307 | * @adapter: board private structure | 280 | * @adapter: board private structure |
308 | **/ | 281 | **/ |
309 | 282 | ||
310 | static inline void | 283 | static void |
311 | e1000_irq_enable(struct e1000_adapter *adapter) | 284 | e1000_irq_enable(struct e1000_adapter *adapter) |
312 | { | 285 | { |
313 | if (likely(atomic_dec_and_test(&adapter->irq_sem))) { | 286 | if (likely(atomic_dec_and_test(&adapter->irq_sem))) { |
@@ -348,10 +321,10 @@ e1000_update_mng_vlan(struct e1000_adapter *adapter) | |||
348 | * For ASF and Pass Through versions of f/w this means that the | 321 | * For ASF and Pass Through versions of f/w this means that the |
349 | * driver is no longer loaded. For AMT version (only with 82573) i | 322 | * driver is no longer loaded. For AMT version (only with 82573) i |
350 | * of the f/w this means that the netowrk i/f is closed. | 323 | * of the f/w this means that the netowrk i/f is closed. |
351 | * | 324 | * |
352 | **/ | 325 | **/ |
353 | 326 | ||
354 | static inline void | 327 | static void |
355 | e1000_release_hw_control(struct e1000_adapter *adapter) | 328 | e1000_release_hw_control(struct e1000_adapter *adapter) |
356 | { | 329 | { |
357 | uint32_t ctrl_ext; | 330 | uint32_t ctrl_ext; |
@@ -361,6 +334,7 @@ e1000_release_hw_control(struct e1000_adapter *adapter) | |||
361 | switch (adapter->hw.mac_type) { | 334 | switch (adapter->hw.mac_type) { |
362 | case e1000_82571: | 335 | case e1000_82571: |
363 | case e1000_82572: | 336 | case e1000_82572: |
337 | case e1000_80003es2lan: | ||
364 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | 338 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
365 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | 339 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, |
366 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | 340 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); |
@@ -379,13 +353,13 @@ e1000_release_hw_control(struct e1000_adapter *adapter) | |||
379 | * @adapter: address of board private structure | 353 | * @adapter: address of board private structure |
380 | * | 354 | * |
381 | * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. | 355 | * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. |
382 | * For ASF and Pass Through versions of f/w this means that | 356 | * For ASF and Pass Through versions of f/w this means that |
383 | * the driver is loaded. For AMT version (only with 82573) | 357 | * the driver is loaded. For AMT version (only with 82573) |
384 | * of the f/w this means that the netowrk i/f is open. | 358 | * of the f/w this means that the netowrk i/f is open. |
385 | * | 359 | * |
386 | **/ | 360 | **/ |
387 | 361 | ||
388 | static inline void | 362 | static void |
389 | e1000_get_hw_control(struct e1000_adapter *adapter) | 363 | e1000_get_hw_control(struct e1000_adapter *adapter) |
390 | { | 364 | { |
391 | uint32_t ctrl_ext; | 365 | uint32_t ctrl_ext; |
@@ -394,6 +368,7 @@ e1000_get_hw_control(struct e1000_adapter *adapter) | |||
394 | switch (adapter->hw.mac_type) { | 368 | switch (adapter->hw.mac_type) { |
395 | case e1000_82571: | 369 | case e1000_82571: |
396 | case e1000_82572: | 370 | case e1000_82572: |
371 | case e1000_80003es2lan: | ||
397 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); | 372 | ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); |
398 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, | 373 | E1000_WRITE_REG(&adapter->hw, CTRL_EXT, |
399 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | 374 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); |
@@ -421,7 +396,7 @@ e1000_up(struct e1000_adapter *adapter) | |||
421 | uint16_t mii_reg; | 396 | uint16_t mii_reg; |
422 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | 397 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); |
423 | if (mii_reg & MII_CR_POWER_DOWN) | 398 | if (mii_reg & MII_CR_POWER_DOWN) |
424 | e1000_phy_reset(&adapter->hw); | 399 | e1000_phy_hw_reset(&adapter->hw); |
425 | } | 400 | } |
426 | 401 | ||
427 | e1000_set_multi(netdev); | 402 | e1000_set_multi(netdev); |
@@ -711,8 +686,8 @@ e1000_probe(struct pci_dev *pdev, | |||
711 | DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); | 686 | DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); |
712 | 687 | ||
713 | /* if ksp3, indicate if it's port a being setup */ | 688 | /* if ksp3, indicate if it's port a being setup */ |
714 | if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 && | 689 | if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 && |
715 | e1000_ksp3_port_a == 0) | 690 | e1000_ksp3_port_a == 0) |
716 | adapter->ksp3_port_a = 1; | 691 | adapter->ksp3_port_a = 1; |
717 | e1000_ksp3_port_a++; | 692 | e1000_ksp3_port_a++; |
718 | /* Reset for multiple KP3 adapters */ | 693 | /* Reset for multiple KP3 adapters */ |
@@ -740,9 +715,9 @@ e1000_probe(struct pci_dev *pdev, | |||
740 | if (pci_using_dac) | 715 | if (pci_using_dac) |
741 | netdev->features |= NETIF_F_HIGHDMA; | 716 | netdev->features |= NETIF_F_HIGHDMA; |
742 | 717 | ||
743 | /* hard_start_xmit is safe against parallel locking */ | 718 | /* hard_start_xmit is safe against parallel locking */ |
744 | netdev->features |= NETIF_F_LLTX; | 719 | netdev->features |= NETIF_F_LLTX; |
745 | 720 | ||
746 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); | 721 | adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); |
747 | 722 | ||
748 | /* before reading the EEPROM, reset the controller to | 723 | /* before reading the EEPROM, reset the controller to |
@@ -972,8 +947,8 @@ e1000_sw_init(struct e1000_adapter *adapter) | |||
972 | 947 | ||
973 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); | 948 | pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); |
974 | 949 | ||
975 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | 950 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE; |
976 | adapter->rx_ps_bsize0 = E1000_RXBUFFER_256; | 951 | adapter->rx_ps_bsize0 = E1000_RXBUFFER_128; |
977 | hw->max_frame_size = netdev->mtu + | 952 | hw->max_frame_size = netdev->mtu + |
978 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | 953 | ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
979 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; | 954 | hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; |
@@ -1181,7 +1156,7 @@ e1000_close(struct net_device *netdev) | |||
1181 | * @start: address of beginning of memory | 1156 | * @start: address of beginning of memory |
1182 | * @len: length of memory | 1157 | * @len: length of memory |
1183 | **/ | 1158 | **/ |
1184 | static inline boolean_t | 1159 | static boolean_t |
1185 | e1000_check_64k_bound(struct e1000_adapter *adapter, | 1160 | e1000_check_64k_bound(struct e1000_adapter *adapter, |
1186 | void *start, unsigned long len) | 1161 | void *start, unsigned long len) |
1187 | { | 1162 | { |
@@ -1599,14 +1574,21 @@ e1000_setup_rctl(struct e1000_adapter *adapter) | |||
1599 | rctl |= E1000_RCTL_LPE; | 1574 | rctl |= E1000_RCTL_LPE; |
1600 | 1575 | ||
1601 | /* Setup buffer sizes */ | 1576 | /* Setup buffer sizes */ |
1602 | if (adapter->hw.mac_type >= e1000_82571) { | 1577 | rctl &= ~E1000_RCTL_SZ_4096; |
1603 | /* We can now specify buffers in 1K increments. | 1578 | rctl |= E1000_RCTL_BSEX; |
1604 | * BSIZE and BSEX are ignored in this case. */ | 1579 | switch (adapter->rx_buffer_len) { |
1605 | rctl |= adapter->rx_buffer_len << 0x11; | 1580 | case E1000_RXBUFFER_256: |
1606 | } else { | 1581 | rctl |= E1000_RCTL_SZ_256; |
1607 | rctl &= ~E1000_RCTL_SZ_4096; | 1582 | rctl &= ~E1000_RCTL_BSEX; |
1608 | rctl |= E1000_RCTL_BSEX; | 1583 | break; |
1609 | switch (adapter->rx_buffer_len) { | 1584 | case E1000_RXBUFFER_512: |
1585 | rctl |= E1000_RCTL_SZ_512; | ||
1586 | rctl &= ~E1000_RCTL_BSEX; | ||
1587 | break; | ||
1588 | case E1000_RXBUFFER_1024: | ||
1589 | rctl |= E1000_RCTL_SZ_1024; | ||
1590 | rctl &= ~E1000_RCTL_BSEX; | ||
1591 | break; | ||
1610 | case E1000_RXBUFFER_2048: | 1592 | case E1000_RXBUFFER_2048: |
1611 | default: | 1593 | default: |
1612 | rctl |= E1000_RCTL_SZ_2048; | 1594 | rctl |= E1000_RCTL_SZ_2048; |
@@ -1621,7 +1603,6 @@ e1000_setup_rctl(struct e1000_adapter *adapter) | |||
1621 | case E1000_RXBUFFER_16384: | 1603 | case E1000_RXBUFFER_16384: |
1622 | rctl |= E1000_RCTL_SZ_16384; | 1604 | rctl |= E1000_RCTL_SZ_16384; |
1623 | break; | 1605 | break; |
1624 | } | ||
1625 | } | 1606 | } |
1626 | 1607 | ||
1627 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT | 1608 | #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT |
@@ -1715,7 +1696,7 @@ e1000_configure_rx(struct e1000_adapter *adapter) | |||
1715 | if (hw->mac_type >= e1000_82571) { | 1696 | if (hw->mac_type >= e1000_82571) { |
1716 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); | 1697 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); |
1717 | /* Reset delay timers after every interrupt */ | 1698 | /* Reset delay timers after every interrupt */ |
1718 | ctrl_ext |= E1000_CTRL_EXT_CANC; | 1699 | ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR; |
1719 | #ifdef CONFIG_E1000_NAPI | 1700 | #ifdef CONFIG_E1000_NAPI |
1720 | /* Auto-Mask interrupts upon ICR read. */ | 1701 | /* Auto-Mask interrupts upon ICR read. */ |
1721 | ctrl_ext |= E1000_CTRL_EXT_IAME; | 1702 | ctrl_ext |= E1000_CTRL_EXT_IAME; |
@@ -1807,7 +1788,7 @@ e1000_free_all_tx_resources(struct e1000_adapter *adapter) | |||
1807 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); | 1788 | e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); |
1808 | } | 1789 | } |
1809 | 1790 | ||
1810 | static inline void | 1791 | static void |
1811 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, | 1792 | e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, |
1812 | struct e1000_buffer *buffer_info) | 1793 | struct e1000_buffer *buffer_info) |
1813 | { | 1794 | { |
@@ -2247,6 +2228,7 @@ e1000_watchdog_task(struct e1000_adapter *adapter) | |||
2247 | 2228 | ||
2248 | if (link) { | 2229 | if (link) { |
2249 | if (!netif_carrier_ok(netdev)) { | 2230 | if (!netif_carrier_ok(netdev)) { |
2231 | boolean_t txb2b = 1; | ||
2250 | e1000_get_speed_and_duplex(&adapter->hw, | 2232 | e1000_get_speed_and_duplex(&adapter->hw, |
2251 | &adapter->link_speed, | 2233 | &adapter->link_speed, |
2252 | &adapter->link_duplex); | 2234 | &adapter->link_duplex); |
@@ -2260,23 +2242,22 @@ e1000_watchdog_task(struct e1000_adapter *adapter) | |||
2260 | * and adjust the timeout factor */ | 2242 | * and adjust the timeout factor */ |
2261 | netdev->tx_queue_len = adapter->tx_queue_len; | 2243 | netdev->tx_queue_len = adapter->tx_queue_len; |
2262 | adapter->tx_timeout_factor = 1; | 2244 | adapter->tx_timeout_factor = 1; |
2263 | adapter->txb2b = 1; | ||
2264 | switch (adapter->link_speed) { | 2245 | switch (adapter->link_speed) { |
2265 | case SPEED_10: | 2246 | case SPEED_10: |
2266 | adapter->txb2b = 0; | 2247 | txb2b = 0; |
2267 | netdev->tx_queue_len = 10; | 2248 | netdev->tx_queue_len = 10; |
2268 | adapter->tx_timeout_factor = 8; | 2249 | adapter->tx_timeout_factor = 8; |
2269 | break; | 2250 | break; |
2270 | case SPEED_100: | 2251 | case SPEED_100: |
2271 | adapter->txb2b = 0; | 2252 | txb2b = 0; |
2272 | netdev->tx_queue_len = 100; | 2253 | netdev->tx_queue_len = 100; |
2273 | /* maybe add some timeout factor ? */ | 2254 | /* maybe add some timeout factor ? */ |
2274 | break; | 2255 | break; |
2275 | } | 2256 | } |
2276 | 2257 | ||
2277 | if ((adapter->hw.mac_type == e1000_82571 || | 2258 | if ((adapter->hw.mac_type == e1000_82571 || |
2278 | adapter->hw.mac_type == e1000_82572) && | 2259 | adapter->hw.mac_type == e1000_82572) && |
2279 | adapter->txb2b == 0) { | 2260 | txb2b == 0) { |
2280 | #define SPEED_MODE_BIT (1 << 21) | 2261 | #define SPEED_MODE_BIT (1 << 21) |
2281 | uint32_t tarc0; | 2262 | uint32_t tarc0; |
2282 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); | 2263 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); |
@@ -2400,7 +2381,7 @@ e1000_watchdog_task(struct e1000_adapter *adapter) | |||
2400 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 | 2381 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
2401 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | 2382 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 |
2402 | 2383 | ||
2403 | static inline int | 2384 | static int |
2404 | e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | 2385 | e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2405 | struct sk_buff *skb) | 2386 | struct sk_buff *skb) |
2406 | { | 2387 | { |
@@ -2422,7 +2403,7 @@ e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | |||
2422 | 2403 | ||
2423 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | 2404 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); |
2424 | mss = skb_shinfo(skb)->tso_size; | 2405 | mss = skb_shinfo(skb)->tso_size; |
2425 | if (skb->protocol == ntohs(ETH_P_IP)) { | 2406 | if (skb->protocol == htons(ETH_P_IP)) { |
2426 | skb->nh.iph->tot_len = 0; | 2407 | skb->nh.iph->tot_len = 0; |
2427 | skb->nh.iph->check = 0; | 2408 | skb->nh.iph->check = 0; |
2428 | skb->h.th->check = | 2409 | skb->h.th->check = |
@@ -2480,7 +2461,7 @@ e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | |||
2480 | return FALSE; | 2461 | return FALSE; |
2481 | } | 2462 | } |
2482 | 2463 | ||
2483 | static inline boolean_t | 2464 | static boolean_t |
2484 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | 2465 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2485 | struct sk_buff *skb) | 2466 | struct sk_buff *skb) |
2486 | { | 2467 | { |
@@ -2516,7 +2497,7 @@ e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | |||
2516 | #define E1000_MAX_TXD_PWR 12 | 2497 | #define E1000_MAX_TXD_PWR 12 |
2517 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) | 2498 | #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) |
2518 | 2499 | ||
2519 | static inline int | 2500 | static int |
2520 | e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | 2501 | e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2521 | struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, | 2502 | struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, |
2522 | unsigned int nr_frags, unsigned int mss) | 2503 | unsigned int nr_frags, unsigned int mss) |
@@ -2625,7 +2606,7 @@ e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | |||
2625 | return count; | 2606 | return count; |
2626 | } | 2607 | } |
2627 | 2608 | ||
2628 | static inline void | 2609 | static void |
2629 | e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | 2610 | e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
2630 | int tx_flags, int count) | 2611 | int tx_flags, int count) |
2631 | { | 2612 | { |
@@ -2689,7 +2670,7 @@ e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | |||
2689 | #define E1000_FIFO_HDR 0x10 | 2670 | #define E1000_FIFO_HDR 0x10 |
2690 | #define E1000_82547_PAD_LEN 0x3E0 | 2671 | #define E1000_82547_PAD_LEN 0x3E0 |
2691 | 2672 | ||
2692 | static inline int | 2673 | static int |
2693 | e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) | 2674 | e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) |
2694 | { | 2675 | { |
2695 | uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; | 2676 | uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; |
@@ -2716,7 +2697,7 @@ no_fifo_stall_required: | |||
2716 | } | 2697 | } |
2717 | 2698 | ||
2718 | #define MINIMUM_DHCP_PACKET_SIZE 282 | 2699 | #define MINIMUM_DHCP_PACKET_SIZE 282 |
2719 | static inline int | 2700 | static int |
2720 | e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) | 2701 | e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) |
2721 | { | 2702 | { |
2722 | struct e1000_hw *hw = &adapter->hw; | 2703 | struct e1000_hw *hw = &adapter->hw; |
@@ -2764,7 +2745,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
2764 | unsigned int nr_frags = 0; | 2745 | unsigned int nr_frags = 0; |
2765 | unsigned int mss = 0; | 2746 | unsigned int mss = 0; |
2766 | int count = 0; | 2747 | int count = 0; |
2767 | int tso; | 2748 | int tso; |
2768 | unsigned int f; | 2749 | unsigned int f; |
2769 | len -= skb->data_len; | 2750 | len -= skb->data_len; |
2770 | 2751 | ||
@@ -2777,7 +2758,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
2777 | 2758 | ||
2778 | #ifdef NETIF_F_TSO | 2759 | #ifdef NETIF_F_TSO |
2779 | mss = skb_shinfo(skb)->tso_size; | 2760 | mss = skb_shinfo(skb)->tso_size; |
2780 | /* The controller does a simple calculation to | 2761 | /* The controller does a simple calculation to |
2781 | * make sure there is enough room in the FIFO before | 2762 | * make sure there is enough room in the FIFO before |
2782 | * initiating the DMA for each buffer. The calc is: | 2763 | * initiating the DMA for each buffer. The calc is: |
2783 | * 4 = ceil(buffer len/mss). To make sure we don't | 2764 | * 4 = ceil(buffer len/mss). To make sure we don't |
@@ -2800,7 +2781,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
2800 | case e1000_82573: | 2781 | case e1000_82573: |
2801 | pull_size = min((unsigned int)4, skb->data_len); | 2782 | pull_size = min((unsigned int)4, skb->data_len); |
2802 | if (!__pskb_pull_tail(skb, pull_size)) { | 2783 | if (!__pskb_pull_tail(skb, pull_size)) { |
2803 | printk(KERN_ERR | 2784 | printk(KERN_ERR |
2804 | "__pskb_pull_tail failed.\n"); | 2785 | "__pskb_pull_tail failed.\n"); |
2805 | dev_kfree_skb_any(skb); | 2786 | dev_kfree_skb_any(skb); |
2806 | return NETDEV_TX_OK; | 2787 | return NETDEV_TX_OK; |
@@ -2901,7 +2882,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
2901 | /* Old method was to assume IPv4 packet by default if TSO was enabled. | 2882 | /* Old method was to assume IPv4 packet by default if TSO was enabled. |
2902 | * 82571 hardware supports TSO capabilities for IPv6 as well... | 2883 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
2903 | * no longer assume, we must. */ | 2884 | * no longer assume, we must. */ |
2904 | if (likely(skb->protocol == ntohs(ETH_P_IP))) | 2885 | if (likely(skb->protocol == htons(ETH_P_IP))) |
2905 | tx_flags |= E1000_TX_FLAGS_IPV4; | 2886 | tx_flags |= E1000_TX_FLAGS_IPV4; |
2906 | 2887 | ||
2907 | e1000_tx_queue(adapter, tx_ring, tx_flags, | 2888 | e1000_tx_queue(adapter, tx_ring, tx_flags, |
@@ -2982,8 +2963,7 @@ e1000_change_mtu(struct net_device *netdev, int new_mtu) | |||
2982 | 2963 | ||
2983 | /* Adapter-specific max frame size limits. */ | 2964 | /* Adapter-specific max frame size limits. */ |
2984 | switch (adapter->hw.mac_type) { | 2965 | switch (adapter->hw.mac_type) { |
2985 | case e1000_82542_rev2_0: | 2966 | case e1000_undefined ... e1000_82542_rev2_1: |
2986 | case e1000_82542_rev2_1: | ||
2987 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { | 2967 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
2988 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n"); | 2968 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n"); |
2989 | return -EINVAL; | 2969 | return -EINVAL; |
@@ -3017,27 +2997,32 @@ e1000_change_mtu(struct net_device *netdev, int new_mtu) | |||
3017 | break; | 2997 | break; |
3018 | } | 2998 | } |
3019 | 2999 | ||
3020 | 3000 | /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN | |
3021 | if (adapter->hw.mac_type > e1000_82547_rev_2) { | 3001 | * means we reserve 2 more, this pushes us to allocate from the next |
3022 | adapter->rx_buffer_len = max_frame; | 3002 | * larger slab size |
3023 | E1000_ROUNDUP(adapter->rx_buffer_len, 1024); | 3003 | * i.e. RXBUFFER_2048 --> size-4096 slab */ |
3024 | } else { | 3004 | |
3025 | if(unlikely((adapter->hw.mac_type < e1000_82543) && | 3005 | if (max_frame <= E1000_RXBUFFER_256) |
3026 | (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) { | 3006 | adapter->rx_buffer_len = E1000_RXBUFFER_256; |
3027 | DPRINTK(PROBE, ERR, "Jumbo Frames not supported " | 3007 | else if (max_frame <= E1000_RXBUFFER_512) |
3028 | "on 82542\n"); | 3008 | adapter->rx_buffer_len = E1000_RXBUFFER_512; |
3029 | return -EINVAL; | 3009 | else if (max_frame <= E1000_RXBUFFER_1024) |
3030 | } else { | 3010 | adapter->rx_buffer_len = E1000_RXBUFFER_1024; |
3031 | if(max_frame <= E1000_RXBUFFER_2048) | 3011 | else if (max_frame <= E1000_RXBUFFER_2048) |
3032 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; | 3012 | adapter->rx_buffer_len = E1000_RXBUFFER_2048; |
3033 | else if(max_frame <= E1000_RXBUFFER_4096) | 3013 | else if (max_frame <= E1000_RXBUFFER_4096) |
3034 | adapter->rx_buffer_len = E1000_RXBUFFER_4096; | 3014 | adapter->rx_buffer_len = E1000_RXBUFFER_4096; |
3035 | else if(max_frame <= E1000_RXBUFFER_8192) | 3015 | else if (max_frame <= E1000_RXBUFFER_8192) |
3036 | adapter->rx_buffer_len = E1000_RXBUFFER_8192; | 3016 | adapter->rx_buffer_len = E1000_RXBUFFER_8192; |
3037 | else if(max_frame <= E1000_RXBUFFER_16384) | 3017 | else if (max_frame <= E1000_RXBUFFER_16384) |
3038 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; | 3018 | adapter->rx_buffer_len = E1000_RXBUFFER_16384; |
3039 | } | 3019 | |
3040 | } | 3020 | /* adjust allocation if LPE protects us, and we aren't using SBP */ |
3021 | #define MAXIMUM_ETHERNET_VLAN_SIZE 1522 | ||
3022 | if (!adapter->hw.tbi_compatibility_on && | ||
3023 | ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) || | ||
3024 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) | ||
3025 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | ||
3041 | 3026 | ||
3042 | netdev->mtu = new_mtu; | 3027 | netdev->mtu = new_mtu; |
3043 | 3028 | ||
@@ -3060,11 +3045,21 @@ void | |||
3060 | e1000_update_stats(struct e1000_adapter *adapter) | 3045 | e1000_update_stats(struct e1000_adapter *adapter) |
3061 | { | 3046 | { |
3062 | struct e1000_hw *hw = &adapter->hw; | 3047 | struct e1000_hw *hw = &adapter->hw; |
3048 | struct pci_dev *pdev = adapter->pdev; | ||
3063 | unsigned long flags; | 3049 | unsigned long flags; |
3064 | uint16_t phy_tmp; | 3050 | uint16_t phy_tmp; |
3065 | 3051 | ||
3066 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | 3052 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF |
3067 | 3053 | ||
3054 | /* | ||
3055 | * Prevent stats update while adapter is being reset, or if the pci | ||
3056 | * connection is down. | ||
3057 | */ | ||
3058 | if (adapter->link_speed == 0) | ||
3059 | return; | ||
3060 | if (pdev->error_state && pdev->error_state != pci_channel_io_normal) | ||
3061 | return; | ||
3062 | |||
3068 | spin_lock_irqsave(&adapter->stats_lock, flags); | 3063 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3069 | 3064 | ||
3070 | /* these counters are modified from e1000_adjust_tbi_stats, | 3065 | /* these counters are modified from e1000_adjust_tbi_stats, |
@@ -3165,7 +3160,6 @@ e1000_update_stats(struct e1000_adapter *adapter) | |||
3165 | adapter->stats.crcerrs + adapter->stats.algnerrc + | 3160 | adapter->stats.crcerrs + adapter->stats.algnerrc + |
3166 | adapter->stats.ruc + adapter->stats.roc + | 3161 | adapter->stats.ruc + adapter->stats.roc + |
3167 | adapter->stats.cexterr; | 3162 | adapter->stats.cexterr; |
3168 | adapter->net_stats.rx_dropped = 0; | ||
3169 | adapter->net_stats.rx_length_errors = adapter->stats.ruc + | 3163 | adapter->net_stats.rx_length_errors = adapter->stats.ruc + |
3170 | adapter->stats.roc; | 3164 | adapter->stats.roc; |
3171 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; | 3165 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; |
@@ -3391,13 +3385,15 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter, | |||
3391 | 3385 | ||
3392 | tx_ring->next_to_clean = i; | 3386 | tx_ring->next_to_clean = i; |
3393 | 3387 | ||
3394 | spin_lock(&tx_ring->tx_lock); | 3388 | #define TX_WAKE_THRESHOLD 32 |
3395 | |||
3396 | if (unlikely(cleaned && netif_queue_stopped(netdev) && | 3389 | if (unlikely(cleaned && netif_queue_stopped(netdev) && |
3397 | netif_carrier_ok(netdev))) | 3390 | netif_carrier_ok(netdev))) { |
3398 | netif_wake_queue(netdev); | 3391 | spin_lock(&tx_ring->tx_lock); |
3399 | 3392 | if (netif_queue_stopped(netdev) && | |
3400 | spin_unlock(&tx_ring->tx_lock); | 3393 | (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) |
3394 | netif_wake_queue(netdev); | ||
3395 | spin_unlock(&tx_ring->tx_lock); | ||
3396 | } | ||
3401 | 3397 | ||
3402 | if (adapter->detect_tx_hung) { | 3398 | if (adapter->detect_tx_hung) { |
3403 | /* Detect a transmit hang in hardware, this serializes the | 3399 | /* Detect a transmit hang in hardware, this serializes the |
@@ -3445,7 +3441,7 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter, | |||
3445 | * @sk_buff: socket buffer with received data | 3441 | * @sk_buff: socket buffer with received data |
3446 | **/ | 3442 | **/ |
3447 | 3443 | ||
3448 | static inline void | 3444 | static void |
3449 | e1000_rx_checksum(struct e1000_adapter *adapter, | 3445 | e1000_rx_checksum(struct e1000_adapter *adapter, |
3450 | uint32_t status_err, uint32_t csum, | 3446 | uint32_t status_err, uint32_t csum, |
3451 | struct sk_buff *skb) | 3447 | struct sk_buff *skb) |
@@ -3567,7 +3563,8 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter, | |||
3567 | flags); | 3563 | flags); |
3568 | length--; | 3564 | length--; |
3569 | } else { | 3565 | } else { |
3570 | dev_kfree_skb_irq(skb); | 3566 | /* recycle */ |
3567 | buffer_info->skb = skb; | ||
3571 | goto next_desc; | 3568 | goto next_desc; |
3572 | } | 3569 | } |
3573 | } | 3570 | } |
@@ -3675,6 +3672,7 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |||
3675 | i = rx_ring->next_to_clean; | 3672 | i = rx_ring->next_to_clean; |
3676 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | 3673 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); |
3677 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); | 3674 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
3675 | buffer_info = &rx_ring->buffer_info[i]; | ||
3678 | 3676 | ||
3679 | while (staterr & E1000_RXD_STAT_DD) { | 3677 | while (staterr & E1000_RXD_STAT_DD) { |
3680 | buffer_info = &rx_ring->buffer_info[i]; | 3678 | buffer_info = &rx_ring->buffer_info[i]; |
@@ -3733,9 +3731,9 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |||
3733 | 3731 | ||
3734 | /* page alloc/put takes too long and effects small packet | 3732 | /* page alloc/put takes too long and effects small packet |
3735 | * throughput, so unsplit small packets and save the alloc/put*/ | 3733 | * throughput, so unsplit small packets and save the alloc/put*/ |
3736 | if (l1 && ((length + l1) < E1000_CB_LENGTH)) { | 3734 | if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) { |
3737 | u8 *vaddr; | 3735 | u8 *vaddr; |
3738 | /* there is no documentation about how to call | 3736 | /* there is no documentation about how to call |
3739 | * kmap_atomic, so we can't hold the mapping | 3737 | * kmap_atomic, so we can't hold the mapping |
3740 | * very long */ | 3738 | * very long */ |
3741 | pci_dma_sync_single_for_cpu(pdev, | 3739 | pci_dma_sync_single_for_cpu(pdev, |
@@ -4155,7 +4153,7 @@ e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |||
4155 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | 4153 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
4156 | return -EIO; | 4154 | return -EIO; |
4157 | } | 4155 | } |
4158 | if (adapter->hw.phy_type == e1000_media_type_copper) { | 4156 | if (adapter->hw.media_type == e1000_media_type_copper) { |
4159 | switch (data->reg_num) { | 4157 | switch (data->reg_num) { |
4160 | case PHY_CTRL: | 4158 | case PHY_CTRL: |
4161 | if (mii_reg & MII_CR_POWER_DOWN) | 4159 | if (mii_reg & MII_CR_POWER_DOWN) |
@@ -4514,21 +4512,13 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state) | |||
4514 | 4512 | ||
4515 | E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); | 4513 | E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); |
4516 | E1000_WRITE_REG(&adapter->hw, WUFC, wufc); | 4514 | E1000_WRITE_REG(&adapter->hw, WUFC, wufc); |
4517 | retval = pci_enable_wake(pdev, PCI_D3hot, 1); | 4515 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4518 | if (retval) | 4516 | pci_enable_wake(pdev, PCI_D3cold, 1); |
4519 | DPRINTK(PROBE, ERR, "Error enabling D3 wake\n"); | ||
4520 | retval = pci_enable_wake(pdev, PCI_D3cold, 1); | ||
4521 | if (retval) | ||
4522 | DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n"); | ||
4523 | } else { | 4517 | } else { |
4524 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | 4518 | E1000_WRITE_REG(&adapter->hw, WUC, 0); |
4525 | E1000_WRITE_REG(&adapter->hw, WUFC, 0); | 4519 | E1000_WRITE_REG(&adapter->hw, WUFC, 0); |
4526 | retval = pci_enable_wake(pdev, PCI_D3hot, 0); | 4520 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4527 | if (retval) | 4521 | pci_enable_wake(pdev, PCI_D3cold, 0); |
4528 | DPRINTK(PROBE, ERR, "Error enabling D3 wake\n"); | ||
4529 | retval = pci_enable_wake(pdev, PCI_D3cold, 0); | ||
4530 | if (retval) | ||
4531 | DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n"); | ||
4532 | } | 4522 | } |
4533 | 4523 | ||
4534 | if (adapter->hw.mac_type >= e1000_82540 && | 4524 | if (adapter->hw.mac_type >= e1000_82540 && |
@@ -4537,13 +4527,8 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state) | |||
4537 | if (manc & E1000_MANC_SMBUS_EN) { | 4527 | if (manc & E1000_MANC_SMBUS_EN) { |
4538 | manc |= E1000_MANC_ARP_EN; | 4528 | manc |= E1000_MANC_ARP_EN; |
4539 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | 4529 | E1000_WRITE_REG(&adapter->hw, MANC, manc); |
4540 | retval = pci_enable_wake(pdev, PCI_D3hot, 1); | 4530 | pci_enable_wake(pdev, PCI_D3hot, 1); |
4541 | if (retval) | 4531 | pci_enable_wake(pdev, PCI_D3cold, 1); |
4542 | DPRINTK(PROBE, ERR, "Error enabling D3 wake\n"); | ||
4543 | retval = pci_enable_wake(pdev, PCI_D3cold, 1); | ||
4544 | if (retval) | ||
4545 | DPRINTK(PROBE, ERR, | ||
4546 | "Error enabling D3 cold wake\n"); | ||
4547 | } | 4532 | } |
4548 | } | 4533 | } |
4549 | 4534 | ||
@@ -4553,9 +4538,7 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state) | |||
4553 | 4538 | ||
4554 | pci_disable_device(pdev); | 4539 | pci_disable_device(pdev); |
4555 | 4540 | ||
4556 | retval = pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 4541 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
4557 | if (retval) | ||
4558 | DPRINTK(PROBE, ERR, "Error in setting power state\n"); | ||
4559 | 4542 | ||
4560 | return 0; | 4543 | return 0; |
4561 | } | 4544 | } |
@@ -4566,22 +4549,15 @@ e1000_resume(struct pci_dev *pdev) | |||
4566 | { | 4549 | { |
4567 | struct net_device *netdev = pci_get_drvdata(pdev); | 4550 | struct net_device *netdev = pci_get_drvdata(pdev); |
4568 | struct e1000_adapter *adapter = netdev_priv(netdev); | 4551 | struct e1000_adapter *adapter = netdev_priv(netdev); |
4569 | int retval; | ||
4570 | uint32_t manc, ret_val; | 4552 | uint32_t manc, ret_val; |
4571 | 4553 | ||
4572 | retval = pci_set_power_state(pdev, PCI_D0); | 4554 | pci_set_power_state(pdev, PCI_D0); |
4573 | if (retval) | ||
4574 | DPRINTK(PROBE, ERR, "Error in setting power state\n"); | ||
4575 | e1000_pci_restore_state(adapter); | 4555 | e1000_pci_restore_state(adapter); |
4576 | ret_val = pci_enable_device(pdev); | 4556 | ret_val = pci_enable_device(pdev); |
4577 | pci_set_master(pdev); | 4557 | pci_set_master(pdev); |
4578 | 4558 | ||
4579 | retval = pci_enable_wake(pdev, PCI_D3hot, 0); | 4559 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4580 | if (retval) | 4560 | pci_enable_wake(pdev, PCI_D3cold, 0); |
4581 | DPRINTK(PROBE, ERR, "Error enabling D3 wake\n"); | ||
4582 | retval = pci_enable_wake(pdev, PCI_D3cold, 0); | ||
4583 | if (retval) | ||
4584 | DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n"); | ||
4585 | 4561 | ||
4586 | e1000_reset(adapter); | 4562 | e1000_reset(adapter); |
4587 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | 4563 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); |
@@ -4635,4 +4611,101 @@ e1000_netpoll(struct net_device *netdev) | |||
4635 | } | 4611 | } |
4636 | #endif | 4612 | #endif |
4637 | 4613 | ||
4614 | /** | ||
4615 | * e1000_io_error_detected - called when PCI error is detected | ||
4616 | * @pdev: Pointer to PCI device | ||
4617 | * @state: The current pci conneection state | ||
4618 | * | ||
4619 | * This function is called after a PCI bus error affecting | ||
4620 | * this device has been detected. | ||
4621 | */ | ||
4622 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | ||
4623 | { | ||
4624 | struct net_device *netdev = pci_get_drvdata(pdev); | ||
4625 | struct e1000_adapter *adapter = netdev->priv; | ||
4626 | |||
4627 | netif_device_detach(netdev); | ||
4628 | |||
4629 | if (netif_running(netdev)) | ||
4630 | e1000_down(adapter); | ||
4631 | |||
4632 | /* Request a slot slot reset. */ | ||
4633 | return PCI_ERS_RESULT_NEED_RESET; | ||
4634 | } | ||
4635 | |||
4636 | /** | ||
4637 | * e1000_io_slot_reset - called after the pci bus has been reset. | ||
4638 | * @pdev: Pointer to PCI device | ||
4639 | * | ||
4640 | * Restart the card from scratch, as if from a cold-boot. Implementation | ||
4641 | * resembles the first-half of the e1000_resume routine. | ||
4642 | */ | ||
4643 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | ||
4644 | { | ||
4645 | struct net_device *netdev = pci_get_drvdata(pdev); | ||
4646 | struct e1000_adapter *adapter = netdev->priv; | ||
4647 | |||
4648 | if (pci_enable_device(pdev)) { | ||
4649 | printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n"); | ||
4650 | return PCI_ERS_RESULT_DISCONNECT; | ||
4651 | } | ||
4652 | pci_set_master(pdev); | ||
4653 | |||
4654 | pci_enable_wake(pdev, 3, 0); | ||
4655 | pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */ | ||
4656 | |||
4657 | /* Perform card reset only on one instance of the card */ | ||
4658 | if (PCI_FUNC (pdev->devfn) != 0) | ||
4659 | return PCI_ERS_RESULT_RECOVERED; | ||
4660 | |||
4661 | e1000_reset(adapter); | ||
4662 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | ||
4663 | |||
4664 | return PCI_ERS_RESULT_RECOVERED; | ||
4665 | } | ||
4666 | |||
4667 | /** | ||
4668 | * e1000_io_resume - called when traffic can start flowing again. | ||
4669 | * @pdev: Pointer to PCI device | ||
4670 | * | ||
4671 | * This callback is called when the error recovery driver tells us that | ||
4672 | * its OK to resume normal operation. Implementation resembles the | ||
4673 | * second-half of the e1000_resume routine. | ||
4674 | */ | ||
4675 | static void e1000_io_resume(struct pci_dev *pdev) | ||
4676 | { | ||
4677 | struct net_device *netdev = pci_get_drvdata(pdev); | ||
4678 | struct e1000_adapter *adapter = netdev->priv; | ||
4679 | uint32_t manc, swsm; | ||
4680 | |||
4681 | if (netif_running(netdev)) { | ||
4682 | if (e1000_up(adapter)) { | ||
4683 | printk("e1000: can't bring device back up after reset\n"); | ||
4684 | return; | ||
4685 | } | ||
4686 | } | ||
4687 | |||
4688 | netif_device_attach(netdev); | ||
4689 | |||
4690 | if (adapter->hw.mac_type >= e1000_82540 && | ||
4691 | adapter->hw.media_type == e1000_media_type_copper) { | ||
4692 | manc = E1000_READ_REG(&adapter->hw, MANC); | ||
4693 | manc &= ~(E1000_MANC_ARP_EN); | ||
4694 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | ||
4695 | } | ||
4696 | |||
4697 | switch (adapter->hw.mac_type) { | ||
4698 | case e1000_82573: | ||
4699 | swsm = E1000_READ_REG(&adapter->hw, SWSM); | ||
4700 | E1000_WRITE_REG(&adapter->hw, SWSM, | ||
4701 | swsm | E1000_SWSM_DRV_LOAD); | ||
4702 | break; | ||
4703 | default: | ||
4704 | break; | ||
4705 | } | ||
4706 | |||
4707 | if (netif_running(netdev)) | ||
4708 | mod_timer(&adapter->watchdog_timer, jiffies); | ||
4709 | } | ||
4710 | |||
4638 | /* e1000_main.c */ | 4711 | /* e1000_main.c */ |
diff --git a/drivers/net/e1000/e1000_osdep.h b/drivers/net/e1000/e1000_osdep.h index 9790db974dc1..048d052be29d 100644 --- a/drivers/net/e1000/e1000_osdep.h +++ b/drivers/net/e1000/e1000_osdep.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | Contact Information: | 23 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 24 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 27 | ||
27 | *******************************************************************************/ | 28 | *******************************************************************************/ |
diff --git a/drivers/net/e1000/e1000_param.c b/drivers/net/e1000/e1000_param.c index e0a4d37d1b85..e55f8969a0fb 100644 --- a/drivers/net/e1000/e1000_param.c +++ b/drivers/net/e1000/e1000_param.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | Contact Information: | 23 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 24 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 26 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 27 | ||
27 | *******************************************************************************/ | 28 | *******************************************************************************/ |
diff --git a/drivers/net/epic100.c b/drivers/net/epic100.c index 2f7b86837fe8..8d680ce600d7 100644 --- a/drivers/net/epic100.c +++ b/drivers/net/epic100.c | |||
@@ -21,15 +21,15 @@ | |||
21 | http://www.scyld.com/network/epic100.html | 21 | http://www.scyld.com/network/epic100.html |
22 | 22 | ||
23 | --------------------------------------------------------------------- | 23 | --------------------------------------------------------------------- |
24 | 24 | ||
25 | Linux kernel-specific changes: | 25 | Linux kernel-specific changes: |
26 | 26 | ||
27 | LK1.1.2 (jgarzik): | 27 | LK1.1.2 (jgarzik): |
28 | * Merge becker version 1.09 (4/08/2000) | 28 | * Merge becker version 1.09 (4/08/2000) |
29 | 29 | ||
30 | LK1.1.3: | 30 | LK1.1.3: |
31 | * Major bugfix to 1.09 driver (Francis Romieu) | 31 | * Major bugfix to 1.09 driver (Francis Romieu) |
32 | 32 | ||
33 | LK1.1.4 (jgarzik): | 33 | LK1.1.4 (jgarzik): |
34 | * Merge becker test version 1.09 (5/29/2000) | 34 | * Merge becker test version 1.09 (5/29/2000) |
35 | 35 | ||
@@ -66,7 +66,7 @@ | |||
66 | LK1.1.14 (Kryzsztof Halasa): | 66 | LK1.1.14 (Kryzsztof Halasa): |
67 | * fix spurious bad initializations | 67 | * fix spurious bad initializations |
68 | * pound phy a la SMSC's app note on the subject | 68 | * pound phy a la SMSC's app note on the subject |
69 | 69 | ||
70 | AC1.1.14ac | 70 | AC1.1.14ac |
71 | * fix power up/down for ethtool that broke in 1.11 | 71 | * fix power up/down for ethtool that broke in 1.11 |
72 | 72 | ||
@@ -244,7 +244,7 @@ static struct pci_device_id epic_pci_tbl[] = { | |||
244 | }; | 244 | }; |
245 | MODULE_DEVICE_TABLE (pci, epic_pci_tbl); | 245 | MODULE_DEVICE_TABLE (pci, epic_pci_tbl); |
246 | 246 | ||
247 | 247 | ||
248 | #ifndef USE_IO_OPS | 248 | #ifndef USE_IO_OPS |
249 | #undef inb | 249 | #undef inb |
250 | #undef inw | 250 | #undef inw |
@@ -370,7 +370,7 @@ static int epic_close(struct net_device *dev); | |||
370 | static struct net_device_stats *epic_get_stats(struct net_device *dev); | 370 | static struct net_device_stats *epic_get_stats(struct net_device *dev); |
371 | static void set_rx_mode(struct net_device *dev); | 371 | static void set_rx_mode(struct net_device *dev); |
372 | 372 | ||
373 | 373 | ||
374 | 374 | ||
375 | static int __devinit epic_init_one (struct pci_dev *pdev, | 375 | static int __devinit epic_init_one (struct pci_dev *pdev, |
376 | const struct pci_device_id *ent) | 376 | const struct pci_device_id *ent) |
@@ -392,9 +392,9 @@ static int __devinit epic_init_one (struct pci_dev *pdev, | |||
392 | printk (KERN_INFO "%s" KERN_INFO "%s" KERN_INFO "%s", | 392 | printk (KERN_INFO "%s" KERN_INFO "%s" KERN_INFO "%s", |
393 | version, version2, version3); | 393 | version, version2, version3); |
394 | #endif | 394 | #endif |
395 | 395 | ||
396 | card_idx++; | 396 | card_idx++; |
397 | 397 | ||
398 | ret = pci_enable_device(pdev); | 398 | ret = pci_enable_device(pdev); |
399 | if (ret) | 399 | if (ret) |
400 | goto out; | 400 | goto out; |
@@ -405,7 +405,7 @@ static int __devinit epic_init_one (struct pci_dev *pdev, | |||
405 | ret = -ENODEV; | 405 | ret = -ENODEV; |
406 | goto err_out_disable; | 406 | goto err_out_disable; |
407 | } | 407 | } |
408 | 408 | ||
409 | pci_set_master(pdev); | 409 | pci_set_master(pdev); |
410 | 410 | ||
411 | ret = pci_request_regions(pdev, DRV_NAME); | 411 | ret = pci_request_regions(pdev, DRV_NAME); |
@@ -498,7 +498,7 @@ static int __devinit epic_init_one (struct pci_dev *pdev, | |||
498 | ep->pci_dev = pdev; | 498 | ep->pci_dev = pdev; |
499 | ep->chip_id = chip_idx; | 499 | ep->chip_id = chip_idx; |
500 | ep->chip_flags = pci_id_tbl[chip_idx].drv_flags; | 500 | ep->chip_flags = pci_id_tbl[chip_idx].drv_flags; |
501 | ep->irq_mask = | 501 | ep->irq_mask = |
502 | (ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170) | 502 | (ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170) |
503 | | CntFull | TxUnderrun | EpicNapiEvent; | 503 | | CntFull | TxUnderrun | EpicNapiEvent; |
504 | 504 | ||
@@ -587,7 +587,7 @@ err_out_disable: | |||
587 | pci_disable_device(pdev); | 587 | pci_disable_device(pdev); |
588 | goto out; | 588 | goto out; |
589 | } | 589 | } |
590 | 590 | ||
591 | /* Serial EEPROM section. */ | 591 | /* Serial EEPROM section. */ |
592 | 592 | ||
593 | /* EEPROM_Ctrl bits. */ | 593 | /* EEPROM_Ctrl bits. */ |
@@ -709,7 +709,7 @@ static void mdio_write(struct net_device *dev, int phy_id, int loc, int value) | |||
709 | 709 | ||
710 | outw(value, ioaddr + MIIData); | 710 | outw(value, ioaddr + MIIData); |
711 | outl((phy_id << 9) | (loc << 4) | MII_WRITEOP, ioaddr + MIICtrl); | 711 | outl((phy_id << 9) | (loc << 4) | MII_WRITEOP, ioaddr + MIICtrl); |
712 | for (i = 10000; i > 0; i--) { | 712 | for (i = 10000; i > 0; i--) { |
713 | barrier(); | 713 | barrier(); |
714 | if ((inl(ioaddr + MIICtrl) & MII_WRITEOP) == 0) | 714 | if ((inl(ioaddr + MIICtrl) & MII_WRITEOP) == 0) |
715 | break; | 715 | break; |
@@ -717,7 +717,7 @@ static void mdio_write(struct net_device *dev, int phy_id, int loc, int value) | |||
717 | return; | 717 | return; |
718 | } | 718 | } |
719 | 719 | ||
720 | 720 | ||
721 | static int epic_open(struct net_device *dev) | 721 | static int epic_open(struct net_device *dev) |
722 | { | 722 | { |
723 | struct epic_private *ep = dev->priv; | 723 | struct epic_private *ep = dev->priv; |
@@ -760,7 +760,7 @@ static int epic_open(struct net_device *dev) | |||
760 | #endif | 760 | #endif |
761 | 761 | ||
762 | udelay(20); /* Looks like EPII needs that if you want reliable RX init. FIXME: pci posting bug? */ | 762 | udelay(20); /* Looks like EPII needs that if you want reliable RX init. FIXME: pci posting bug? */ |
763 | 763 | ||
764 | for (i = 0; i < 3; i++) | 764 | for (i = 0; i < 3; i++) |
765 | outl(cpu_to_le16(((u16*)dev->dev_addr)[i]), ioaddr + LAN0 + i*4); | 765 | outl(cpu_to_le16(((u16*)dev->dev_addr)[i]), ioaddr + LAN0 + i*4); |
766 | 766 | ||
@@ -803,7 +803,7 @@ static int epic_open(struct net_device *dev) | |||
803 | 803 | ||
804 | /* Enable interrupts by setting the interrupt mask. */ | 804 | /* Enable interrupts by setting the interrupt mask. */ |
805 | outl((ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170) | 805 | outl((ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170) |
806 | | CntFull | TxUnderrun | 806 | | CntFull | TxUnderrun |
807 | | RxError | RxHeader | EpicNapiEvent, ioaddr + INTMASK); | 807 | | RxError | RxHeader | EpicNapiEvent, ioaddr + INTMASK); |
808 | 808 | ||
809 | if (debug > 1) | 809 | if (debug > 1) |
@@ -831,7 +831,7 @@ static void epic_pause(struct net_device *dev) | |||
831 | struct epic_private *ep = dev->priv; | 831 | struct epic_private *ep = dev->priv; |
832 | 832 | ||
833 | netif_stop_queue (dev); | 833 | netif_stop_queue (dev); |
834 | 834 | ||
835 | /* Disable interrupts by clearing the interrupt mask. */ | 835 | /* Disable interrupts by clearing the interrupt mask. */ |
836 | outl(0x00000000, ioaddr + INTMASK); | 836 | outl(0x00000000, ioaddr + INTMASK); |
837 | /* Stop the chip's Tx and Rx DMA processes. */ | 837 | /* Stop the chip's Tx and Rx DMA processes. */ |
@@ -987,7 +987,7 @@ static void epic_init_ring(struct net_device *dev) | |||
987 | for (i = 0; i < RX_RING_SIZE; i++) { | 987 | for (i = 0; i < RX_RING_SIZE; i++) { |
988 | ep->rx_ring[i].rxstatus = 0; | 988 | ep->rx_ring[i].rxstatus = 0; |
989 | ep->rx_ring[i].buflength = cpu_to_le32(ep->rx_buf_sz); | 989 | ep->rx_ring[i].buflength = cpu_to_le32(ep->rx_buf_sz); |
990 | ep->rx_ring[i].next = ep->rx_ring_dma + | 990 | ep->rx_ring[i].next = ep->rx_ring_dma + |
991 | (i+1)*sizeof(struct epic_rx_desc); | 991 | (i+1)*sizeof(struct epic_rx_desc); |
992 | ep->rx_skbuff[i] = NULL; | 992 | ep->rx_skbuff[i] = NULL; |
993 | } | 993 | } |
@@ -1002,7 +1002,7 @@ static void epic_init_ring(struct net_device *dev) | |||
1002 | break; | 1002 | break; |
1003 | skb->dev = dev; /* Mark as being used by this device. */ | 1003 | skb->dev = dev; /* Mark as being used by this device. */ |
1004 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ | 1004 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ |
1005 | ep->rx_ring[i].bufaddr = pci_map_single(ep->pci_dev, | 1005 | ep->rx_ring[i].bufaddr = pci_map_single(ep->pci_dev, |
1006 | skb->data, ep->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1006 | skb->data, ep->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1007 | ep->rx_ring[i].rxstatus = cpu_to_le32(DescOwn); | 1007 | ep->rx_ring[i].rxstatus = cpu_to_le32(DescOwn); |
1008 | } | 1008 | } |
@@ -1013,7 +1013,7 @@ static void epic_init_ring(struct net_device *dev) | |||
1013 | for (i = 0; i < TX_RING_SIZE; i++) { | 1013 | for (i = 0; i < TX_RING_SIZE; i++) { |
1014 | ep->tx_skbuff[i] = NULL; | 1014 | ep->tx_skbuff[i] = NULL; |
1015 | ep->tx_ring[i].txstatus = 0x0000; | 1015 | ep->tx_ring[i].txstatus = 0x0000; |
1016 | ep->tx_ring[i].next = ep->tx_ring_dma + | 1016 | ep->tx_ring[i].next = ep->tx_ring_dma + |
1017 | (i+1)*sizeof(struct epic_tx_desc); | 1017 | (i+1)*sizeof(struct epic_tx_desc); |
1018 | } | 1018 | } |
1019 | ep->tx_ring[i-1].next = ep->tx_ring_dma; | 1019 | ep->tx_ring[i-1].next = ep->tx_ring_dma; |
@@ -1026,7 +1026,7 @@ static int epic_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1026 | int entry, free_count; | 1026 | int entry, free_count; |
1027 | u32 ctrl_word; | 1027 | u32 ctrl_word; |
1028 | unsigned long flags; | 1028 | unsigned long flags; |
1029 | 1029 | ||
1030 | if (skb->len < ETH_ZLEN) { | 1030 | if (skb->len < ETH_ZLEN) { |
1031 | skb = skb_padto(skb, ETH_ZLEN); | 1031 | skb = skb_padto(skb, ETH_ZLEN); |
1032 | if (skb == NULL) | 1032 | if (skb == NULL) |
@@ -1042,7 +1042,7 @@ static int epic_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1042 | entry = ep->cur_tx % TX_RING_SIZE; | 1042 | entry = ep->cur_tx % TX_RING_SIZE; |
1043 | 1043 | ||
1044 | ep->tx_skbuff[entry] = skb; | 1044 | ep->tx_skbuff[entry] = skb; |
1045 | ep->tx_ring[entry].bufaddr = pci_map_single(ep->pci_dev, skb->data, | 1045 | ep->tx_ring[entry].bufaddr = pci_map_single(ep->pci_dev, skb->data, |
1046 | skb->len, PCI_DMA_TODEVICE); | 1046 | skb->len, PCI_DMA_TODEVICE); |
1047 | if (free_count < TX_QUEUE_LEN/2) {/* Typical path */ | 1047 | if (free_count < TX_QUEUE_LEN/2) {/* Typical path */ |
1048 | ctrl_word = cpu_to_le32(0x100000); /* No interrupt */ | 1048 | ctrl_word = cpu_to_le32(0x100000); /* No interrupt */ |
@@ -1126,7 +1126,7 @@ static void epic_tx(struct net_device *dev, struct epic_private *ep) | |||
1126 | 1126 | ||
1127 | /* Free the original skb. */ | 1127 | /* Free the original skb. */ |
1128 | skb = ep->tx_skbuff[entry]; | 1128 | skb = ep->tx_skbuff[entry]; |
1129 | pci_unmap_single(ep->pci_dev, ep->tx_ring[entry].bufaddr, | 1129 | pci_unmap_single(ep->pci_dev, ep->tx_ring[entry].bufaddr, |
1130 | skb->len, PCI_DMA_TODEVICE); | 1130 | skb->len, PCI_DMA_TODEVICE); |
1131 | dev_kfree_skb_irq(skb); | 1131 | dev_kfree_skb_irq(skb); |
1132 | ep->tx_skbuff[entry] = NULL; | 1132 | ep->tx_skbuff[entry] = NULL; |
@@ -1281,8 +1281,8 @@ static int epic_rx(struct net_device *dev, int budget) | |||
1281 | ep->rx_buf_sz, | 1281 | ep->rx_buf_sz, |
1282 | PCI_DMA_FROMDEVICE); | 1282 | PCI_DMA_FROMDEVICE); |
1283 | } else { | 1283 | } else { |
1284 | pci_unmap_single(ep->pci_dev, | 1284 | pci_unmap_single(ep->pci_dev, |
1285 | ep->rx_ring[entry].bufaddr, | 1285 | ep->rx_ring[entry].bufaddr, |
1286 | ep->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1286 | ep->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1287 | skb_put(skb = ep->rx_skbuff[entry], pkt_len); | 1287 | skb_put(skb = ep->rx_skbuff[entry], pkt_len); |
1288 | ep->rx_skbuff[entry] = NULL; | 1288 | ep->rx_skbuff[entry] = NULL; |
@@ -1307,7 +1307,7 @@ static int epic_rx(struct net_device *dev, int budget) | |||
1307 | break; | 1307 | break; |
1308 | skb->dev = dev; /* Mark as being used by this device. */ | 1308 | skb->dev = dev; /* Mark as being used by this device. */ |
1309 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ | 1309 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ |
1310 | ep->rx_ring[entry].bufaddr = pci_map_single(ep->pci_dev, | 1310 | ep->rx_ring[entry].bufaddr = pci_map_single(ep->pci_dev, |
1311 | skb->data, ep->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1311 | skb->data, ep->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1312 | work_done++; | 1312 | work_done++; |
1313 | } | 1313 | } |
@@ -1403,7 +1403,7 @@ static int epic_close(struct net_device *dev) | |||
1403 | ep->rx_ring[i].rxstatus = 0; /* Not owned by Epic chip. */ | 1403 | ep->rx_ring[i].rxstatus = 0; /* Not owned by Epic chip. */ |
1404 | ep->rx_ring[i].buflength = 0; | 1404 | ep->rx_ring[i].buflength = 0; |
1405 | if (skb) { | 1405 | if (skb) { |
1406 | pci_unmap_single(ep->pci_dev, ep->rx_ring[i].bufaddr, | 1406 | pci_unmap_single(ep->pci_dev, ep->rx_ring[i].bufaddr, |
1407 | ep->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1407 | ep->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1408 | dev_kfree_skb(skb); | 1408 | dev_kfree_skb(skb); |
1409 | } | 1409 | } |
@@ -1414,7 +1414,7 @@ static int epic_close(struct net_device *dev) | |||
1414 | ep->tx_skbuff[i] = NULL; | 1414 | ep->tx_skbuff[i] = NULL; |
1415 | if (!skb) | 1415 | if (!skb) |
1416 | continue; | 1416 | continue; |
1417 | pci_unmap_single(ep->pci_dev, ep->tx_ring[i].bufaddr, | 1417 | pci_unmap_single(ep->pci_dev, ep->tx_ring[i].bufaddr, |
1418 | skb->len, PCI_DMA_TODEVICE); | 1418 | skb->len, PCI_DMA_TODEVICE); |
1419 | dev_kfree_skb(skb); | 1419 | dev_kfree_skb(skb); |
1420 | } | 1420 | } |
@@ -1607,7 +1607,7 @@ static void __devexit epic_remove_one (struct pci_dev *pdev) | |||
1607 | { | 1607 | { |
1608 | struct net_device *dev = pci_get_drvdata(pdev); | 1608 | struct net_device *dev = pci_get_drvdata(pdev); |
1609 | struct epic_private *ep = dev->priv; | 1609 | struct epic_private *ep = dev->priv; |
1610 | 1610 | ||
1611 | pci_free_consistent(pdev, TX_TOTAL_SIZE, ep->tx_ring, ep->tx_ring_dma); | 1611 | pci_free_consistent(pdev, TX_TOTAL_SIZE, ep->tx_ring, ep->tx_ring_dma); |
1612 | pci_free_consistent(pdev, RX_TOTAL_SIZE, ep->rx_ring, ep->rx_ring_dma); | 1612 | pci_free_consistent(pdev, RX_TOTAL_SIZE, ep->rx_ring, ep->rx_ring_dma); |
1613 | unregister_netdev(dev); | 1613 | unregister_netdev(dev); |
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index feb5b223cd60..04a53f1dfdbd 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -107,6 +107,8 @@ | |||
107 | * 0.52: 20 Jan 2006: Add MSI/MSIX support. | 107 | * 0.52: 20 Jan 2006: Add MSI/MSIX support. |
108 | * 0.53: 19 Mar 2006: Fix init from low power mode and add hw reset. | 108 | * 0.53: 19 Mar 2006: Fix init from low power mode and add hw reset. |
109 | * 0.54: 21 Mar 2006: Fix spin locks for multi irqs and cleanup. | 109 | * 0.54: 21 Mar 2006: Fix spin locks for multi irqs and cleanup. |
110 | * 0.55: 22 Mar 2006: Add flow control (pause frame). | ||
111 | * 0.56: 22 Mar 2006: Additional ethtool config and moduleparam support. | ||
110 | * | 112 | * |
111 | * Known bugs: | 113 | * Known bugs: |
112 | * We suspect that on some hardware no TX done interrupts are generated. | 114 | * We suspect that on some hardware no TX done interrupts are generated. |
@@ -118,7 +120,7 @@ | |||
118 | * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few | 120 | * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few |
119 | * superfluous timer interrupts from the nic. | 121 | * superfluous timer interrupts from the nic. |
120 | */ | 122 | */ |
121 | #define FORCEDETH_VERSION "0.54" | 123 | #define FORCEDETH_VERSION "0.56" |
122 | #define DRV_NAME "forcedeth" | 124 | #define DRV_NAME "forcedeth" |
123 | 125 | ||
124 | #include <linux/module.h> | 126 | #include <linux/module.h> |
@@ -163,6 +165,9 @@ | |||
163 | #define DEV_HAS_MSI 0x0040 /* device supports MSI */ | 165 | #define DEV_HAS_MSI 0x0040 /* device supports MSI */ |
164 | #define DEV_HAS_MSI_X 0x0080 /* device supports MSI-X */ | 166 | #define DEV_HAS_MSI_X 0x0080 /* device supports MSI-X */ |
165 | #define DEV_HAS_POWER_CNTRL 0x0100 /* device supports power savings */ | 167 | #define DEV_HAS_POWER_CNTRL 0x0100 /* device supports power savings */ |
168 | #define DEV_HAS_PAUSEFRAME_TX 0x0200 /* device supports tx pause frames */ | ||
169 | #define DEV_HAS_STATISTICS 0x0400 /* device supports hw statistics */ | ||
170 | #define DEV_HAS_TEST_EXTENDED 0x0800 /* device supports extended diagnostic test */ | ||
166 | 171 | ||
167 | enum { | 172 | enum { |
168 | NvRegIrqStatus = 0x000, | 173 | NvRegIrqStatus = 0x000, |
@@ -203,6 +208,7 @@ enum { | |||
203 | NvRegMSIIrqMask = 0x030, | 208 | NvRegMSIIrqMask = 0x030, |
204 | #define NVREG_MSI_VECTOR_0_ENABLED 0x01 | 209 | #define NVREG_MSI_VECTOR_0_ENABLED 0x01 |
205 | NvRegMisc1 = 0x080, | 210 | NvRegMisc1 = 0x080, |
211 | #define NVREG_MISC1_PAUSE_TX 0x01 | ||
206 | #define NVREG_MISC1_HD 0x02 | 212 | #define NVREG_MISC1_HD 0x02 |
207 | #define NVREG_MISC1_FORCE 0x3b0f3c | 213 | #define NVREG_MISC1_FORCE 0x3b0f3c |
208 | 214 | ||
@@ -214,9 +220,11 @@ enum { | |||
214 | #define NVREG_XMITSTAT_BUSY 0x01 | 220 | #define NVREG_XMITSTAT_BUSY 0x01 |
215 | 221 | ||
216 | NvRegPacketFilterFlags = 0x8c, | 222 | NvRegPacketFilterFlags = 0x8c, |
217 | #define NVREG_PFF_ALWAYS 0x7F0008 | 223 | #define NVREG_PFF_PAUSE_RX 0x08 |
224 | #define NVREG_PFF_ALWAYS 0x7F0000 | ||
218 | #define NVREG_PFF_PROMISC 0x80 | 225 | #define NVREG_PFF_PROMISC 0x80 |
219 | #define NVREG_PFF_MYADDR 0x20 | 226 | #define NVREG_PFF_MYADDR 0x20 |
227 | #define NVREG_PFF_LOOPBACK 0x10 | ||
220 | 228 | ||
221 | NvRegOffloadConfig = 0x90, | 229 | NvRegOffloadConfig = 0x90, |
222 | #define NVREG_OFFLOAD_HOMEPHY 0x601 | 230 | #define NVREG_OFFLOAD_HOMEPHY 0x601 |
@@ -277,6 +285,9 @@ enum { | |||
277 | #define NVREG_TXRXCTL_VLANINS 0x00080 | 285 | #define NVREG_TXRXCTL_VLANINS 0x00080 |
278 | NvRegTxRingPhysAddrHigh = 0x148, | 286 | NvRegTxRingPhysAddrHigh = 0x148, |
279 | NvRegRxRingPhysAddrHigh = 0x14C, | 287 | NvRegRxRingPhysAddrHigh = 0x14C, |
288 | NvRegTxPauseFrame = 0x170, | ||
289 | #define NVREG_TX_PAUSEFRAME_DISABLE 0x1ff0080 | ||
290 | #define NVREG_TX_PAUSEFRAME_ENABLE 0x0c00030 | ||
280 | NvRegMIIStatus = 0x180, | 291 | NvRegMIIStatus = 0x180, |
281 | #define NVREG_MIISTAT_ERROR 0x0001 | 292 | #define NVREG_MIISTAT_ERROR 0x0001 |
282 | #define NVREG_MIISTAT_LINKCHANGE 0x0008 | 293 | #define NVREG_MIISTAT_LINKCHANGE 0x0008 |
@@ -326,6 +337,33 @@ enum { | |||
326 | #define NVREG_POWERSTATE_D1 0x0001 | 337 | #define NVREG_POWERSTATE_D1 0x0001 |
327 | #define NVREG_POWERSTATE_D2 0x0002 | 338 | #define NVREG_POWERSTATE_D2 0x0002 |
328 | #define NVREG_POWERSTATE_D3 0x0003 | 339 | #define NVREG_POWERSTATE_D3 0x0003 |
340 | NvRegTxCnt = 0x280, | ||
341 | NvRegTxZeroReXmt = 0x284, | ||
342 | NvRegTxOneReXmt = 0x288, | ||
343 | NvRegTxManyReXmt = 0x28c, | ||
344 | NvRegTxLateCol = 0x290, | ||
345 | NvRegTxUnderflow = 0x294, | ||
346 | NvRegTxLossCarrier = 0x298, | ||
347 | NvRegTxExcessDef = 0x29c, | ||
348 | NvRegTxRetryErr = 0x2a0, | ||
349 | NvRegRxFrameErr = 0x2a4, | ||
350 | NvRegRxExtraByte = 0x2a8, | ||
351 | NvRegRxLateCol = 0x2ac, | ||
352 | NvRegRxRunt = 0x2b0, | ||
353 | NvRegRxFrameTooLong = 0x2b4, | ||
354 | NvRegRxOverflow = 0x2b8, | ||
355 | NvRegRxFCSErr = 0x2bc, | ||
356 | NvRegRxFrameAlignErr = 0x2c0, | ||
357 | NvRegRxLenErr = 0x2c4, | ||
358 | NvRegRxUnicast = 0x2c8, | ||
359 | NvRegRxMulticast = 0x2cc, | ||
360 | NvRegRxBroadcast = 0x2d0, | ||
361 | NvRegTxDef = 0x2d4, | ||
362 | NvRegTxFrame = 0x2d8, | ||
363 | NvRegRxCnt = 0x2dc, | ||
364 | NvRegTxPause = 0x2e0, | ||
365 | NvRegRxPause = 0x2e4, | ||
366 | NvRegRxDropFrame = 0x2e8, | ||
329 | NvRegVlanControl = 0x300, | 367 | NvRegVlanControl = 0x300, |
330 | #define NVREG_VLANCONTROL_ENABLE 0x2000 | 368 | #define NVREG_VLANCONTROL_ENABLE 0x2000 |
331 | NvRegMSIXMap0 = 0x3e0, | 369 | NvRegMSIXMap0 = 0x3e0, |
@@ -449,16 +487,18 @@ typedef union _ring_type { | |||
449 | /* General driver defaults */ | 487 | /* General driver defaults */ |
450 | #define NV_WATCHDOG_TIMEO (5*HZ) | 488 | #define NV_WATCHDOG_TIMEO (5*HZ) |
451 | 489 | ||
452 | #define RX_RING 128 | 490 | #define RX_RING_DEFAULT 128 |
453 | #define TX_RING 256 | 491 | #define TX_RING_DEFAULT 256 |
454 | /* | 492 | #define RX_RING_MIN 128 |
455 | * If your nic mysteriously hangs then try to reduce the limits | 493 | #define TX_RING_MIN 64 |
456 | * to 1/0: It might be required to set NV_TX_LASTPACKET in the | 494 | #define RING_MAX_DESC_VER_1 1024 |
457 | * last valid ring entry. But this would be impossible to | 495 | #define RING_MAX_DESC_VER_2_3 16384 |
458 | * implement - probably a disassembly error. | 496 | /* |
497 | * Difference between the get and put pointers for the tx ring. | ||
498 | * This is used to throttle the amount of data outstanding in the | ||
499 | * tx ring. | ||
459 | */ | 500 | */ |
460 | #define TX_LIMIT_STOP 255 | 501 | #define TX_LIMIT_DIFFERENCE 1 |
461 | #define TX_LIMIT_START 254 | ||
462 | 502 | ||
463 | /* rx/tx mac addr + type + vlan + align + slack*/ | 503 | /* rx/tx mac addr + type + vlan + align + slack*/ |
464 | #define NV_RX_HEADERS (64) | 504 | #define NV_RX_HEADERS (64) |
@@ -472,8 +512,9 @@ typedef union _ring_type { | |||
472 | #define OOM_REFILL (1+HZ/20) | 512 | #define OOM_REFILL (1+HZ/20) |
473 | #define POLL_WAIT (1+HZ/100) | 513 | #define POLL_WAIT (1+HZ/100) |
474 | #define LINK_TIMEOUT (3*HZ) | 514 | #define LINK_TIMEOUT (3*HZ) |
515 | #define STATS_INTERVAL (10*HZ) | ||
475 | 516 | ||
476 | /* | 517 | /* |
477 | * desc_ver values: | 518 | * desc_ver values: |
478 | * The nic supports three different descriptor types: | 519 | * The nic supports three different descriptor types: |
479 | * - DESC_VER_1: Original | 520 | * - DESC_VER_1: Original |
@@ -506,13 +547,13 @@ typedef union _ring_type { | |||
506 | #define PHY_1000 0x2 | 547 | #define PHY_1000 0x2 |
507 | #define PHY_HALF 0x100 | 548 | #define PHY_HALF 0x100 |
508 | 549 | ||
509 | /* FIXME: MII defines that should be added to <linux/mii.h> */ | 550 | #define NV_PAUSEFRAME_RX_CAPABLE 0x0001 |
510 | #define MII_1000BT_CR 0x09 | 551 | #define NV_PAUSEFRAME_TX_CAPABLE 0x0002 |
511 | #define MII_1000BT_SR 0x0a | 552 | #define NV_PAUSEFRAME_RX_ENABLE 0x0004 |
512 | #define ADVERTISE_1000FULL 0x0200 | 553 | #define NV_PAUSEFRAME_TX_ENABLE 0x0008 |
513 | #define ADVERTISE_1000HALF 0x0100 | 554 | #define NV_PAUSEFRAME_RX_REQ 0x0010 |
514 | #define LPA_1000FULL 0x0800 | 555 | #define NV_PAUSEFRAME_TX_REQ 0x0020 |
515 | #define LPA_1000HALF 0x0400 | 556 | #define NV_PAUSEFRAME_AUTONEG 0x0040 |
516 | 557 | ||
517 | /* MSI/MSI-X defines */ | 558 | /* MSI/MSI-X defines */ |
518 | #define NV_MSI_X_MAX_VECTORS 8 | 559 | #define NV_MSI_X_MAX_VECTORS 8 |
@@ -527,15 +568,110 @@ typedef union _ring_type { | |||
527 | #define NV_MSI_X_VECTOR_TX 0x1 | 568 | #define NV_MSI_X_VECTOR_TX 0x1 |
528 | #define NV_MSI_X_VECTOR_OTHER 0x2 | 569 | #define NV_MSI_X_VECTOR_OTHER 0x2 |
529 | 570 | ||
571 | /* statistics */ | ||
572 | struct nv_ethtool_str { | ||
573 | char name[ETH_GSTRING_LEN]; | ||
574 | }; | ||
575 | |||
576 | static const struct nv_ethtool_str nv_estats_str[] = { | ||
577 | { "tx_bytes" }, | ||
578 | { "tx_zero_rexmt" }, | ||
579 | { "tx_one_rexmt" }, | ||
580 | { "tx_many_rexmt" }, | ||
581 | { "tx_late_collision" }, | ||
582 | { "tx_fifo_errors" }, | ||
583 | { "tx_carrier_errors" }, | ||
584 | { "tx_excess_deferral" }, | ||
585 | { "tx_retry_error" }, | ||
586 | { "tx_deferral" }, | ||
587 | { "tx_packets" }, | ||
588 | { "tx_pause" }, | ||
589 | { "rx_frame_error" }, | ||
590 | { "rx_extra_byte" }, | ||
591 | { "rx_late_collision" }, | ||
592 | { "rx_runt" }, | ||
593 | { "rx_frame_too_long" }, | ||
594 | { "rx_over_errors" }, | ||
595 | { "rx_crc_errors" }, | ||
596 | { "rx_frame_align_error" }, | ||
597 | { "rx_length_error" }, | ||
598 | { "rx_unicast" }, | ||
599 | { "rx_multicast" }, | ||
600 | { "rx_broadcast" }, | ||
601 | { "rx_bytes" }, | ||
602 | { "rx_pause" }, | ||
603 | { "rx_drop_frame" }, | ||
604 | { "rx_packets" }, | ||
605 | { "rx_errors_total" } | ||
606 | }; | ||
607 | |||
608 | struct nv_ethtool_stats { | ||
609 | u64 tx_bytes; | ||
610 | u64 tx_zero_rexmt; | ||
611 | u64 tx_one_rexmt; | ||
612 | u64 tx_many_rexmt; | ||
613 | u64 tx_late_collision; | ||
614 | u64 tx_fifo_errors; | ||
615 | u64 tx_carrier_errors; | ||
616 | u64 tx_excess_deferral; | ||
617 | u64 tx_retry_error; | ||
618 | u64 tx_deferral; | ||
619 | u64 tx_packets; | ||
620 | u64 tx_pause; | ||
621 | u64 rx_frame_error; | ||
622 | u64 rx_extra_byte; | ||
623 | u64 rx_late_collision; | ||
624 | u64 rx_runt; | ||
625 | u64 rx_frame_too_long; | ||
626 | u64 rx_over_errors; | ||
627 | u64 rx_crc_errors; | ||
628 | u64 rx_frame_align_error; | ||
629 | u64 rx_length_error; | ||
630 | u64 rx_unicast; | ||
631 | u64 rx_multicast; | ||
632 | u64 rx_broadcast; | ||
633 | u64 rx_bytes; | ||
634 | u64 rx_pause; | ||
635 | u64 rx_drop_frame; | ||
636 | u64 rx_packets; | ||
637 | u64 rx_errors_total; | ||
638 | }; | ||
639 | |||
640 | /* diagnostics */ | ||
641 | #define NV_TEST_COUNT_BASE 3 | ||
642 | #define NV_TEST_COUNT_EXTENDED 4 | ||
643 | |||
644 | static const struct nv_ethtool_str nv_etests_str[] = { | ||
645 | { "link (online/offline)" }, | ||
646 | { "register (offline) " }, | ||
647 | { "interrupt (offline) " }, | ||
648 | { "loopback (offline) " } | ||
649 | }; | ||
650 | |||
651 | struct register_test { | ||
652 | u32 reg; | ||
653 | u32 mask; | ||
654 | }; | ||
655 | |||
656 | static const struct register_test nv_registers_test[] = { | ||
657 | { NvRegUnknownSetupReg6, 0x01 }, | ||
658 | { NvRegMisc1, 0x03c }, | ||
659 | { NvRegOffloadConfig, 0x03ff }, | ||
660 | { NvRegMulticastAddrA, 0xffffffff }, | ||
661 | { NvRegUnknownSetupReg3, 0x0ff }, | ||
662 | { NvRegWakeUpFlags, 0x07777 }, | ||
663 | { 0,0 } | ||
664 | }; | ||
665 | |||
530 | /* | 666 | /* |
531 | * SMP locking: | 667 | * SMP locking: |
532 | * All hardware access under dev->priv->lock, except the performance | 668 | * All hardware access under dev->priv->lock, except the performance |
533 | * critical parts: | 669 | * critical parts: |
534 | * - rx is (pseudo-) lockless: it relies on the single-threading provided | 670 | * - rx is (pseudo-) lockless: it relies on the single-threading provided |
535 | * by the arch code for interrupts. | 671 | * by the arch code for interrupts. |
536 | * - tx setup is lockless: it relies on dev->xmit_lock. Actual submission | 672 | * - tx setup is lockless: it relies on netif_tx_lock. Actual submission |
537 | * needs dev->priv->lock :-( | 673 | * needs dev->priv->lock :-( |
538 | * - set_multicast_list: preparation lockless, relies on dev->xmit_lock. | 674 | * - set_multicast_list: preparation lockless, relies on netif_tx_lock. |
539 | */ | 675 | */ |
540 | 676 | ||
541 | /* in dev: base, irq */ | 677 | /* in dev: base, irq */ |
@@ -545,6 +681,7 @@ struct fe_priv { | |||
545 | /* General data: | 681 | /* General data: |
546 | * Locking: spin_lock(&np->lock); */ | 682 | * Locking: spin_lock(&np->lock); */ |
547 | struct net_device_stats stats; | 683 | struct net_device_stats stats; |
684 | struct nv_ethtool_stats estats; | ||
548 | int in_shutdown; | 685 | int in_shutdown; |
549 | u32 linkspeed; | 686 | u32 linkspeed; |
550 | int duplex; | 687 | int duplex; |
@@ -554,6 +691,7 @@ struct fe_priv { | |||
554 | int wolenabled; | 691 | int wolenabled; |
555 | unsigned int phy_oui; | 692 | unsigned int phy_oui; |
556 | u16 gigabit; | 693 | u16 gigabit; |
694 | int intr_test; | ||
557 | 695 | ||
558 | /* General data: RO fields */ | 696 | /* General data: RO fields */ |
559 | dma_addr_t ring_addr; | 697 | dma_addr_t ring_addr; |
@@ -573,13 +711,15 @@ struct fe_priv { | |||
573 | */ | 711 | */ |
574 | ring_type rx_ring; | 712 | ring_type rx_ring; |
575 | unsigned int cur_rx, refill_rx; | 713 | unsigned int cur_rx, refill_rx; |
576 | struct sk_buff *rx_skbuff[RX_RING]; | 714 | struct sk_buff **rx_skbuff; |
577 | dma_addr_t rx_dma[RX_RING]; | 715 | dma_addr_t *rx_dma; |
578 | unsigned int rx_buf_sz; | 716 | unsigned int rx_buf_sz; |
579 | unsigned int pkt_limit; | 717 | unsigned int pkt_limit; |
580 | struct timer_list oom_kick; | 718 | struct timer_list oom_kick; |
581 | struct timer_list nic_poll; | 719 | struct timer_list nic_poll; |
720 | struct timer_list stats_poll; | ||
582 | u32 nic_poll_irq; | 721 | u32 nic_poll_irq; |
722 | int rx_ring_size; | ||
583 | 723 | ||
584 | /* media detection workaround. | 724 | /* media detection workaround. |
585 | * Locking: Within irq hander or disable_irq+spin_lock(&np->lock); | 725 | * Locking: Within irq hander or disable_irq+spin_lock(&np->lock); |
@@ -591,10 +731,13 @@ struct fe_priv { | |||
591 | */ | 731 | */ |
592 | ring_type tx_ring; | 732 | ring_type tx_ring; |
593 | unsigned int next_tx, nic_tx; | 733 | unsigned int next_tx, nic_tx; |
594 | struct sk_buff *tx_skbuff[TX_RING]; | 734 | struct sk_buff **tx_skbuff; |
595 | dma_addr_t tx_dma[TX_RING]; | 735 | dma_addr_t *tx_dma; |
596 | unsigned int tx_dma_len[TX_RING]; | 736 | unsigned int *tx_dma_len; |
597 | u32 tx_flags; | 737 | u32 tx_flags; |
738 | int tx_ring_size; | ||
739 | int tx_limit_start; | ||
740 | int tx_limit_stop; | ||
598 | 741 | ||
599 | /* vlan fields */ | 742 | /* vlan fields */ |
600 | struct vlan_group *vlangrp; | 743 | struct vlan_group *vlangrp; |
@@ -602,6 +745,9 @@ struct fe_priv { | |||
602 | /* msi/msi-x fields */ | 745 | /* msi/msi-x fields */ |
603 | u32 msi_flags; | 746 | u32 msi_flags; |
604 | struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS]; | 747 | struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS]; |
748 | |||
749 | /* flow control */ | ||
750 | u32 pause_flags; | ||
605 | }; | 751 | }; |
606 | 752 | ||
607 | /* | 753 | /* |
@@ -612,12 +758,14 @@ static int max_interrupt_work = 5; | |||
612 | 758 | ||
613 | /* | 759 | /* |
614 | * Optimization can be either throuput mode or cpu mode | 760 | * Optimization can be either throuput mode or cpu mode |
615 | * | 761 | * |
616 | * Throughput Mode: Every tx and rx packet will generate an interrupt. | 762 | * Throughput Mode: Every tx and rx packet will generate an interrupt. |
617 | * CPU Mode: Interrupts are controlled by a timer. | 763 | * CPU Mode: Interrupts are controlled by a timer. |
618 | */ | 764 | */ |
619 | #define NV_OPTIMIZATION_MODE_THROUGHPUT 0 | 765 | enum { |
620 | #define NV_OPTIMIZATION_MODE_CPU 1 | 766 | NV_OPTIMIZATION_MODE_THROUGHPUT, |
767 | NV_OPTIMIZATION_MODE_CPU | ||
768 | }; | ||
621 | static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT; | 769 | static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT; |
622 | 770 | ||
623 | /* | 771 | /* |
@@ -630,14 +778,31 @@ static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT; | |||
630 | static int poll_interval = -1; | 778 | static int poll_interval = -1; |
631 | 779 | ||
632 | /* | 780 | /* |
633 | * Disable MSI interrupts | 781 | * MSI interrupts |
634 | */ | 782 | */ |
635 | static int disable_msi = 0; | 783 | enum { |
784 | NV_MSI_INT_DISABLED, | ||
785 | NV_MSI_INT_ENABLED | ||
786 | }; | ||
787 | static int msi = NV_MSI_INT_ENABLED; | ||
636 | 788 | ||
637 | /* | 789 | /* |
638 | * Disable MSIX interrupts | 790 | * MSIX interrupts |
639 | */ | 791 | */ |
640 | static int disable_msix = 0; | 792 | enum { |
793 | NV_MSIX_INT_DISABLED, | ||
794 | NV_MSIX_INT_ENABLED | ||
795 | }; | ||
796 | static int msix = NV_MSIX_INT_ENABLED; | ||
797 | |||
798 | /* | ||
799 | * DMA 64bit | ||
800 | */ | ||
801 | enum { | ||
802 | NV_DMA_64BIT_DISABLED, | ||
803 | NV_DMA_64BIT_ENABLED | ||
804 | }; | ||
805 | static int dma_64bit = NV_DMA_64BIT_ENABLED; | ||
641 | 806 | ||
642 | static inline struct fe_priv *get_nvpriv(struct net_device *dev) | 807 | static inline struct fe_priv *get_nvpriv(struct net_device *dev) |
643 | { | 808 | { |
@@ -697,7 +862,7 @@ static void setup_hw_rings(struct net_device *dev, int rxtx_flags) | |||
697 | writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr); | 862 | writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr); |
698 | } | 863 | } |
699 | if (rxtx_flags & NV_SETUP_TX_RING) { | 864 | if (rxtx_flags & NV_SETUP_TX_RING) { |
700 | writel((u32) cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr); | 865 | writel((u32) cpu_to_le64(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr); |
701 | } | 866 | } |
702 | } else { | 867 | } else { |
703 | if (rxtx_flags & NV_SETUP_RX_RING) { | 868 | if (rxtx_flags & NV_SETUP_RX_RING) { |
@@ -705,12 +870,37 @@ static void setup_hw_rings(struct net_device *dev, int rxtx_flags) | |||
705 | writel((u32) (cpu_to_le64(np->ring_addr) >> 32), base + NvRegRxRingPhysAddrHigh); | 870 | writel((u32) (cpu_to_le64(np->ring_addr) >> 32), base + NvRegRxRingPhysAddrHigh); |
706 | } | 871 | } |
707 | if (rxtx_flags & NV_SETUP_TX_RING) { | 872 | if (rxtx_flags & NV_SETUP_TX_RING) { |
708 | writel((u32) cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr); | 873 | writel((u32) cpu_to_le64(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr); |
709 | writel((u32) (cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)) >> 32), base + NvRegTxRingPhysAddrHigh); | 874 | writel((u32) (cpu_to_le64(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)) >> 32), base + NvRegTxRingPhysAddrHigh); |
710 | } | 875 | } |
711 | } | 876 | } |
712 | } | 877 | } |
713 | 878 | ||
879 | static void free_rings(struct net_device *dev) | ||
880 | { | ||
881 | struct fe_priv *np = get_nvpriv(dev); | ||
882 | |||
883 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { | ||
884 | if(np->rx_ring.orig) | ||
885 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size), | ||
886 | np->rx_ring.orig, np->ring_addr); | ||
887 | } else { | ||
888 | if (np->rx_ring.ex) | ||
889 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size), | ||
890 | np->rx_ring.ex, np->ring_addr); | ||
891 | } | ||
892 | if (np->rx_skbuff) | ||
893 | kfree(np->rx_skbuff); | ||
894 | if (np->rx_dma) | ||
895 | kfree(np->rx_dma); | ||
896 | if (np->tx_skbuff) | ||
897 | kfree(np->tx_skbuff); | ||
898 | if (np->tx_dma) | ||
899 | kfree(np->tx_dma); | ||
900 | if (np->tx_dma_len) | ||
901 | kfree(np->tx_dma_len); | ||
902 | } | ||
903 | |||
714 | static int using_multi_irqs(struct net_device *dev) | 904 | static int using_multi_irqs(struct net_device *dev) |
715 | { | 905 | { |
716 | struct fe_priv *np = get_nvpriv(dev); | 906 | struct fe_priv *np = get_nvpriv(dev); |
@@ -860,7 +1050,7 @@ static int phy_init(struct net_device *dev) | |||
860 | 1050 | ||
861 | /* set advertise register */ | 1051 | /* set advertise register */ |
862 | reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); | 1052 | reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
863 | reg |= (ADVERTISE_10HALF|ADVERTISE_10FULL|ADVERTISE_100HALF|ADVERTISE_100FULL|0x800|0x400); | 1053 | reg |= (ADVERTISE_10HALF|ADVERTISE_10FULL|ADVERTISE_100HALF|ADVERTISE_100FULL|ADVERTISE_PAUSE_ASYM|ADVERTISE_PAUSE_CAP); |
864 | if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) { | 1054 | if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) { |
865 | printk(KERN_INFO "%s: phy write to advertise failed.\n", pci_name(np->pci_dev)); | 1055 | printk(KERN_INFO "%s: phy write to advertise failed.\n", pci_name(np->pci_dev)); |
866 | return PHY_ERROR; | 1056 | return PHY_ERROR; |
@@ -873,14 +1063,14 @@ static int phy_init(struct net_device *dev) | |||
873 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); | 1063 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
874 | if (mii_status & PHY_GIGABIT) { | 1064 | if (mii_status & PHY_GIGABIT) { |
875 | np->gigabit = PHY_GIGABIT; | 1065 | np->gigabit = PHY_GIGABIT; |
876 | mii_control_1000 = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ); | 1066 | mii_control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
877 | mii_control_1000 &= ~ADVERTISE_1000HALF; | 1067 | mii_control_1000 &= ~ADVERTISE_1000HALF; |
878 | if (phyinterface & PHY_RGMII) | 1068 | if (phyinterface & PHY_RGMII) |
879 | mii_control_1000 |= ADVERTISE_1000FULL; | 1069 | mii_control_1000 |= ADVERTISE_1000FULL; |
880 | else | 1070 | else |
881 | mii_control_1000 &= ~ADVERTISE_1000FULL; | 1071 | mii_control_1000 &= ~ADVERTISE_1000FULL; |
882 | 1072 | ||
883 | if (mii_rw(dev, np->phyaddr, MII_1000BT_CR, mii_control_1000)) { | 1073 | if (mii_rw(dev, np->phyaddr, MII_CTRL1000, mii_control_1000)) { |
884 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); | 1074 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); |
885 | return PHY_ERROR; | 1075 | return PHY_ERROR; |
886 | } | 1076 | } |
@@ -918,6 +1108,8 @@ static int phy_init(struct net_device *dev) | |||
918 | return PHY_ERROR; | 1108 | return PHY_ERROR; |
919 | } | 1109 | } |
920 | } | 1110 | } |
1111 | /* some phys clear out pause advertisment on reset, set it back */ | ||
1112 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg); | ||
921 | 1113 | ||
922 | /* restart auto negotiation */ | 1114 | /* restart auto negotiation */ |
923 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); | 1115 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
@@ -1047,7 +1239,7 @@ static int nv_alloc_rx(struct net_device *dev) | |||
1047 | while (np->cur_rx != refill_rx) { | 1239 | while (np->cur_rx != refill_rx) { |
1048 | struct sk_buff *skb; | 1240 | struct sk_buff *skb; |
1049 | 1241 | ||
1050 | nr = refill_rx % RX_RING; | 1242 | nr = refill_rx % np->rx_ring_size; |
1051 | if (np->rx_skbuff[nr] == NULL) { | 1243 | if (np->rx_skbuff[nr] == NULL) { |
1052 | 1244 | ||
1053 | skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD); | 1245 | skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD); |
@@ -1076,7 +1268,7 @@ static int nv_alloc_rx(struct net_device *dev) | |||
1076 | refill_rx++; | 1268 | refill_rx++; |
1077 | } | 1269 | } |
1078 | np->refill_rx = refill_rx; | 1270 | np->refill_rx = refill_rx; |
1079 | if (np->cur_rx - refill_rx == RX_RING) | 1271 | if (np->cur_rx - refill_rx == np->rx_ring_size) |
1080 | return 1; | 1272 | return 1; |
1081 | return 0; | 1273 | return 0; |
1082 | } | 1274 | } |
@@ -1110,14 +1302,14 @@ static void nv_do_rx_refill(unsigned long data) | |||
1110 | } | 1302 | } |
1111 | } | 1303 | } |
1112 | 1304 | ||
1113 | static void nv_init_rx(struct net_device *dev) | 1305 | static void nv_init_rx(struct net_device *dev) |
1114 | { | 1306 | { |
1115 | struct fe_priv *np = netdev_priv(dev); | 1307 | struct fe_priv *np = netdev_priv(dev); |
1116 | int i; | 1308 | int i; |
1117 | 1309 | ||
1118 | np->cur_rx = RX_RING; | 1310 | np->cur_rx = np->rx_ring_size; |
1119 | np->refill_rx = 0; | 1311 | np->refill_rx = 0; |
1120 | for (i = 0; i < RX_RING; i++) | 1312 | for (i = 0; i < np->rx_ring_size; i++) |
1121 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) | 1313 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) |
1122 | np->rx_ring.orig[i].FlagLen = 0; | 1314 | np->rx_ring.orig[i].FlagLen = 0; |
1123 | else | 1315 | else |
@@ -1130,7 +1322,7 @@ static void nv_init_tx(struct net_device *dev) | |||
1130 | int i; | 1322 | int i; |
1131 | 1323 | ||
1132 | np->next_tx = np->nic_tx = 0; | 1324 | np->next_tx = np->nic_tx = 0; |
1133 | for (i = 0; i < TX_RING; i++) { | 1325 | for (i = 0; i < np->tx_ring_size; i++) { |
1134 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) | 1326 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) |
1135 | np->tx_ring.orig[i].FlagLen = 0; | 1327 | np->tx_ring.orig[i].FlagLen = 0; |
1136 | else | 1328 | else |
@@ -1174,8 +1366,8 @@ static void nv_drain_tx(struct net_device *dev) | |||
1174 | { | 1366 | { |
1175 | struct fe_priv *np = netdev_priv(dev); | 1367 | struct fe_priv *np = netdev_priv(dev); |
1176 | unsigned int i; | 1368 | unsigned int i; |
1177 | 1369 | ||
1178 | for (i = 0; i < TX_RING; i++) { | 1370 | for (i = 0; i < np->tx_ring_size; i++) { |
1179 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) | 1371 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) |
1180 | np->tx_ring.orig[i].FlagLen = 0; | 1372 | np->tx_ring.orig[i].FlagLen = 0; |
1181 | else | 1373 | else |
@@ -1189,7 +1381,7 @@ static void nv_drain_rx(struct net_device *dev) | |||
1189 | { | 1381 | { |
1190 | struct fe_priv *np = netdev_priv(dev); | 1382 | struct fe_priv *np = netdev_priv(dev); |
1191 | int i; | 1383 | int i; |
1192 | for (i = 0; i < RX_RING; i++) { | 1384 | for (i = 0; i < np->rx_ring_size; i++) { |
1193 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) | 1385 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) |
1194 | np->rx_ring.orig[i].FlagLen = 0; | 1386 | np->rx_ring.orig[i].FlagLen = 0; |
1195 | else | 1387 | else |
@@ -1213,7 +1405,7 @@ static void drain_ring(struct net_device *dev) | |||
1213 | 1405 | ||
1214 | /* | 1406 | /* |
1215 | * nv_start_xmit: dev->hard_start_xmit function | 1407 | * nv_start_xmit: dev->hard_start_xmit function |
1216 | * Called with dev->xmit_lock held. | 1408 | * Called with netif_tx_lock held. |
1217 | */ | 1409 | */ |
1218 | static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev) | 1410 | static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev) |
1219 | { | 1411 | { |
@@ -1221,8 +1413,8 @@ static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1221 | u32 tx_flags = 0; | 1413 | u32 tx_flags = 0; |
1222 | u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET); | 1414 | u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET); |
1223 | unsigned int fragments = skb_shinfo(skb)->nr_frags; | 1415 | unsigned int fragments = skb_shinfo(skb)->nr_frags; |
1224 | unsigned int nr = (np->next_tx - 1) % TX_RING; | 1416 | unsigned int nr = (np->next_tx - 1) % np->tx_ring_size; |
1225 | unsigned int start_nr = np->next_tx % TX_RING; | 1417 | unsigned int start_nr = np->next_tx % np->tx_ring_size; |
1226 | unsigned int i; | 1418 | unsigned int i; |
1227 | u32 offset = 0; | 1419 | u32 offset = 0; |
1228 | u32 bcnt; | 1420 | u32 bcnt; |
@@ -1238,7 +1430,7 @@ static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1238 | 1430 | ||
1239 | spin_lock_irq(&np->lock); | 1431 | spin_lock_irq(&np->lock); |
1240 | 1432 | ||
1241 | if ((np->next_tx - np->nic_tx + entries - 1) > TX_LIMIT_STOP) { | 1433 | if ((np->next_tx - np->nic_tx + entries - 1) > np->tx_limit_stop) { |
1242 | spin_unlock_irq(&np->lock); | 1434 | spin_unlock_irq(&np->lock); |
1243 | netif_stop_queue(dev); | 1435 | netif_stop_queue(dev); |
1244 | return NETDEV_TX_BUSY; | 1436 | return NETDEV_TX_BUSY; |
@@ -1247,7 +1439,7 @@ static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1247 | /* setup the header buffer */ | 1439 | /* setup the header buffer */ |
1248 | do { | 1440 | do { |
1249 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; | 1441 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
1250 | nr = (nr + 1) % TX_RING; | 1442 | nr = (nr + 1) % np->tx_ring_size; |
1251 | 1443 | ||
1252 | np->tx_dma[nr] = pci_map_single(np->pci_dev, skb->data + offset, bcnt, | 1444 | np->tx_dma[nr] = pci_map_single(np->pci_dev, skb->data + offset, bcnt, |
1253 | PCI_DMA_TODEVICE); | 1445 | PCI_DMA_TODEVICE); |
@@ -1274,7 +1466,7 @@ static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1274 | 1466 | ||
1275 | do { | 1467 | do { |
1276 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; | 1468 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
1277 | nr = (nr + 1) % TX_RING; | 1469 | nr = (nr + 1) % np->tx_ring_size; |
1278 | 1470 | ||
1279 | np->tx_dma[nr] = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt, | 1471 | np->tx_dma[nr] = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt, |
1280 | PCI_DMA_TODEVICE); | 1472 | PCI_DMA_TODEVICE); |
@@ -1320,7 +1512,7 @@ static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1320 | } else { | 1512 | } else { |
1321 | np->tx_ring.ex[start_nr].TxVlan = cpu_to_le32(tx_flags_vlan); | 1513 | np->tx_ring.ex[start_nr].TxVlan = cpu_to_le32(tx_flags_vlan); |
1322 | np->tx_ring.ex[start_nr].FlagLen |= cpu_to_le32(tx_flags | tx_flags_extra); | 1514 | np->tx_ring.ex[start_nr].FlagLen |= cpu_to_le32(tx_flags | tx_flags_extra); |
1323 | } | 1515 | } |
1324 | 1516 | ||
1325 | dprintk(KERN_DEBUG "%s: nv_start_xmit: packet %d (entries %d) queued for transmission. tx_flags_extra: %x\n", | 1517 | dprintk(KERN_DEBUG "%s: nv_start_xmit: packet %d (entries %d) queued for transmission. tx_flags_extra: %x\n", |
1326 | dev->name, np->next_tx, entries, tx_flags_extra); | 1518 | dev->name, np->next_tx, entries, tx_flags_extra); |
@@ -1356,7 +1548,7 @@ static void nv_tx_done(struct net_device *dev) | |||
1356 | struct sk_buff *skb; | 1548 | struct sk_buff *skb; |
1357 | 1549 | ||
1358 | while (np->nic_tx != np->next_tx) { | 1550 | while (np->nic_tx != np->next_tx) { |
1359 | i = np->nic_tx % TX_RING; | 1551 | i = np->nic_tx % np->tx_ring_size; |
1360 | 1552 | ||
1361 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) | 1553 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) |
1362 | Flags = le32_to_cpu(np->tx_ring.orig[i].FlagLen); | 1554 | Flags = le32_to_cpu(np->tx_ring.orig[i].FlagLen); |
@@ -1395,19 +1587,19 @@ static void nv_tx_done(struct net_device *dev) | |||
1395 | } else { | 1587 | } else { |
1396 | np->stats.tx_packets++; | 1588 | np->stats.tx_packets++; |
1397 | np->stats.tx_bytes += skb->len; | 1589 | np->stats.tx_bytes += skb->len; |
1398 | } | 1590 | } |
1399 | } | 1591 | } |
1400 | } | 1592 | } |
1401 | nv_release_txskb(dev, i); | 1593 | nv_release_txskb(dev, i); |
1402 | np->nic_tx++; | 1594 | np->nic_tx++; |
1403 | } | 1595 | } |
1404 | if (np->next_tx - np->nic_tx < TX_LIMIT_START) | 1596 | if (np->next_tx - np->nic_tx < np->tx_limit_start) |
1405 | netif_wake_queue(dev); | 1597 | netif_wake_queue(dev); |
1406 | } | 1598 | } |
1407 | 1599 | ||
1408 | /* | 1600 | /* |
1409 | * nv_tx_timeout: dev->tx_timeout function | 1601 | * nv_tx_timeout: dev->tx_timeout function |
1410 | * Called with dev->xmit_lock held. | 1602 | * Called with netif_tx_lock held. |
1411 | */ | 1603 | */ |
1412 | static void nv_tx_timeout(struct net_device *dev) | 1604 | static void nv_tx_timeout(struct net_device *dev) |
1413 | { | 1605 | { |
@@ -1438,10 +1630,10 @@ static void nv_tx_timeout(struct net_device *dev) | |||
1438 | readl(base + i + 24), readl(base + i + 28)); | 1630 | readl(base + i + 24), readl(base + i + 28)); |
1439 | } | 1631 | } |
1440 | printk(KERN_INFO "%s: Dumping tx ring\n", dev->name); | 1632 | printk(KERN_INFO "%s: Dumping tx ring\n", dev->name); |
1441 | for (i=0;i<TX_RING;i+= 4) { | 1633 | for (i=0;i<np->tx_ring_size;i+= 4) { |
1442 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { | 1634 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { |
1443 | printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n", | 1635 | printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n", |
1444 | i, | 1636 | i, |
1445 | le32_to_cpu(np->tx_ring.orig[i].PacketBuffer), | 1637 | le32_to_cpu(np->tx_ring.orig[i].PacketBuffer), |
1446 | le32_to_cpu(np->tx_ring.orig[i].FlagLen), | 1638 | le32_to_cpu(np->tx_ring.orig[i].FlagLen), |
1447 | le32_to_cpu(np->tx_ring.orig[i+1].PacketBuffer), | 1639 | le32_to_cpu(np->tx_ring.orig[i+1].PacketBuffer), |
@@ -1452,7 +1644,7 @@ static void nv_tx_timeout(struct net_device *dev) | |||
1452 | le32_to_cpu(np->tx_ring.orig[i+3].FlagLen)); | 1644 | le32_to_cpu(np->tx_ring.orig[i+3].FlagLen)); |
1453 | } else { | 1645 | } else { |
1454 | printk(KERN_INFO "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n", | 1646 | printk(KERN_INFO "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n", |
1455 | i, | 1647 | i, |
1456 | le32_to_cpu(np->tx_ring.ex[i].PacketBufferHigh), | 1648 | le32_to_cpu(np->tx_ring.ex[i].PacketBufferHigh), |
1457 | le32_to_cpu(np->tx_ring.ex[i].PacketBufferLow), | 1649 | le32_to_cpu(np->tx_ring.ex[i].PacketBufferLow), |
1458 | le32_to_cpu(np->tx_ring.ex[i].FlagLen), | 1650 | le32_to_cpu(np->tx_ring.ex[i].FlagLen), |
@@ -1550,15 +1742,14 @@ static void nv_rx_process(struct net_device *dev) | |||
1550 | u32 Flags; | 1742 | u32 Flags; |
1551 | u32 vlanflags = 0; | 1743 | u32 vlanflags = 0; |
1552 | 1744 | ||
1553 | |||
1554 | for (;;) { | 1745 | for (;;) { |
1555 | struct sk_buff *skb; | 1746 | struct sk_buff *skb; |
1556 | int len; | 1747 | int len; |
1557 | int i; | 1748 | int i; |
1558 | if (np->cur_rx - np->refill_rx >= RX_RING) | 1749 | if (np->cur_rx - np->refill_rx >= np->rx_ring_size) |
1559 | break; /* we scanned the whole ring - do not continue */ | 1750 | break; /* we scanned the whole ring - do not continue */ |
1560 | 1751 | ||
1561 | i = np->cur_rx % RX_RING; | 1752 | i = np->cur_rx % np->rx_ring_size; |
1562 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { | 1753 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { |
1563 | Flags = le32_to_cpu(np->rx_ring.orig[i].FlagLen); | 1754 | Flags = le32_to_cpu(np->rx_ring.orig[i].FlagLen); |
1564 | len = nv_descr_getlength(&np->rx_ring.orig[i], np->desc_ver); | 1755 | len = nv_descr_getlength(&np->rx_ring.orig[i], np->desc_ver); |
@@ -1665,14 +1856,16 @@ static void nv_rx_process(struct net_device *dev) | |||
1665 | } | 1856 | } |
1666 | } | 1857 | } |
1667 | } | 1858 | } |
1668 | Flags &= NV_RX2_CHECKSUMMASK; | 1859 | if (np->txrxctl_bits & NVREG_TXRXCTL_RXCHECK) { |
1669 | if (Flags == NV_RX2_CHECKSUMOK1 || | 1860 | Flags &= NV_RX2_CHECKSUMMASK; |
1670 | Flags == NV_RX2_CHECKSUMOK2 || | 1861 | if (Flags == NV_RX2_CHECKSUMOK1 || |
1671 | Flags == NV_RX2_CHECKSUMOK3) { | 1862 | Flags == NV_RX2_CHECKSUMOK2 || |
1672 | dprintk(KERN_DEBUG "%s: hw checksum hit!.\n", dev->name); | 1863 | Flags == NV_RX2_CHECKSUMOK3) { |
1673 | np->rx_skbuff[i]->ip_summed = CHECKSUM_UNNECESSARY; | 1864 | dprintk(KERN_DEBUG "%s: hw checksum hit!.\n", dev->name); |
1674 | } else { | 1865 | np->rx_skbuff[i]->ip_summed = CHECKSUM_UNNECESSARY; |
1675 | dprintk(KERN_DEBUG "%s: hwchecksum miss!.\n", dev->name); | 1866 | } else { |
1867 | dprintk(KERN_DEBUG "%s: hwchecksum miss!.\n", dev->name); | ||
1868 | } | ||
1676 | } | 1869 | } |
1677 | } | 1870 | } |
1678 | /* got a valid packet - forward it to the network core */ | 1871 | /* got a valid packet - forward it to the network core */ |
@@ -1737,7 +1930,7 @@ static int nv_change_mtu(struct net_device *dev, int new_mtu) | |||
1737 | * Changing the MTU is a rare event, it shouldn't matter. | 1930 | * Changing the MTU is a rare event, it shouldn't matter. |
1738 | */ | 1931 | */ |
1739 | nv_disable_irq(dev); | 1932 | nv_disable_irq(dev); |
1740 | spin_lock_bh(&dev->xmit_lock); | 1933 | netif_tx_lock_bh(dev); |
1741 | spin_lock(&np->lock); | 1934 | spin_lock(&np->lock); |
1742 | /* stop engines */ | 1935 | /* stop engines */ |
1743 | nv_stop_rx(dev); | 1936 | nv_stop_rx(dev); |
@@ -1747,18 +1940,15 @@ static int nv_change_mtu(struct net_device *dev, int new_mtu) | |||
1747 | nv_drain_rx(dev); | 1940 | nv_drain_rx(dev); |
1748 | nv_drain_tx(dev); | 1941 | nv_drain_tx(dev); |
1749 | /* reinit driver view of the rx queue */ | 1942 | /* reinit driver view of the rx queue */ |
1750 | nv_init_rx(dev); | ||
1751 | nv_init_tx(dev); | ||
1752 | /* alloc new rx buffers */ | ||
1753 | set_bufsize(dev); | 1943 | set_bufsize(dev); |
1754 | if (nv_alloc_rx(dev)) { | 1944 | if (nv_init_ring(dev)) { |
1755 | if (!np->in_shutdown) | 1945 | if (!np->in_shutdown) |
1756 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); | 1946 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
1757 | } | 1947 | } |
1758 | /* reinit nic view of the rx queue */ | 1948 | /* reinit nic view of the rx queue */ |
1759 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); | 1949 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
1760 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); | 1950 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
1761 | writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT), | 1951 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
1762 | base + NvRegRingSizes); | 1952 | base + NvRegRingSizes); |
1763 | pci_push(base); | 1953 | pci_push(base); |
1764 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); | 1954 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
@@ -1768,7 +1958,7 @@ static int nv_change_mtu(struct net_device *dev, int new_mtu) | |||
1768 | nv_start_rx(dev); | 1958 | nv_start_rx(dev); |
1769 | nv_start_tx(dev); | 1959 | nv_start_tx(dev); |
1770 | spin_unlock(&np->lock); | 1960 | spin_unlock(&np->lock); |
1771 | spin_unlock_bh(&dev->xmit_lock); | 1961 | netif_tx_unlock_bh(dev); |
1772 | nv_enable_irq(dev); | 1962 | nv_enable_irq(dev); |
1773 | } | 1963 | } |
1774 | return 0; | 1964 | return 0; |
@@ -1803,7 +1993,7 @@ static int nv_set_mac_address(struct net_device *dev, void *addr) | |||
1803 | memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN); | 1993 | memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN); |
1804 | 1994 | ||
1805 | if (netif_running(dev)) { | 1995 | if (netif_running(dev)) { |
1806 | spin_lock_bh(&dev->xmit_lock); | 1996 | netif_tx_lock_bh(dev); |
1807 | spin_lock_irq(&np->lock); | 1997 | spin_lock_irq(&np->lock); |
1808 | 1998 | ||
1809 | /* stop rx engine */ | 1999 | /* stop rx engine */ |
@@ -1815,7 +2005,7 @@ static int nv_set_mac_address(struct net_device *dev, void *addr) | |||
1815 | /* restart rx engine */ | 2005 | /* restart rx engine */ |
1816 | nv_start_rx(dev); | 2006 | nv_start_rx(dev); |
1817 | spin_unlock_irq(&np->lock); | 2007 | spin_unlock_irq(&np->lock); |
1818 | spin_unlock_bh(&dev->xmit_lock); | 2008 | netif_tx_unlock_bh(dev); |
1819 | } else { | 2009 | } else { |
1820 | nv_copy_mac_to_hw(dev); | 2010 | nv_copy_mac_to_hw(dev); |
1821 | } | 2011 | } |
@@ -1824,7 +2014,7 @@ static int nv_set_mac_address(struct net_device *dev, void *addr) | |||
1824 | 2014 | ||
1825 | /* | 2015 | /* |
1826 | * nv_set_multicast: dev->set_multicast function | 2016 | * nv_set_multicast: dev->set_multicast function |
1827 | * Called with dev->xmit_lock held. | 2017 | * Called with netif_tx_lock held. |
1828 | */ | 2018 | */ |
1829 | static void nv_set_multicast(struct net_device *dev) | 2019 | static void nv_set_multicast(struct net_device *dev) |
1830 | { | 2020 | { |
@@ -1832,16 +2022,16 @@ static void nv_set_multicast(struct net_device *dev) | |||
1832 | u8 __iomem *base = get_hwbase(dev); | 2022 | u8 __iomem *base = get_hwbase(dev); |
1833 | u32 addr[2]; | 2023 | u32 addr[2]; |
1834 | u32 mask[2]; | 2024 | u32 mask[2]; |
1835 | u32 pff; | 2025 | u32 pff = readl(base + NvRegPacketFilterFlags) & NVREG_PFF_PAUSE_RX; |
1836 | 2026 | ||
1837 | memset(addr, 0, sizeof(addr)); | 2027 | memset(addr, 0, sizeof(addr)); |
1838 | memset(mask, 0, sizeof(mask)); | 2028 | memset(mask, 0, sizeof(mask)); |
1839 | 2029 | ||
1840 | if (dev->flags & IFF_PROMISC) { | 2030 | if (dev->flags & IFF_PROMISC) { |
1841 | printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name); | 2031 | printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name); |
1842 | pff = NVREG_PFF_PROMISC; | 2032 | pff |= NVREG_PFF_PROMISC; |
1843 | } else { | 2033 | } else { |
1844 | pff = NVREG_PFF_MYADDR; | 2034 | pff |= NVREG_PFF_MYADDR; |
1845 | 2035 | ||
1846 | if (dev->flags & IFF_ALLMULTI || dev->mc_list) { | 2036 | if (dev->flags & IFF_ALLMULTI || dev->mc_list) { |
1847 | u32 alwaysOff[2]; | 2037 | u32 alwaysOff[2]; |
@@ -1886,6 +2076,35 @@ static void nv_set_multicast(struct net_device *dev) | |||
1886 | spin_unlock_irq(&np->lock); | 2076 | spin_unlock_irq(&np->lock); |
1887 | } | 2077 | } |
1888 | 2078 | ||
2079 | void nv_update_pause(struct net_device *dev, u32 pause_flags) | ||
2080 | { | ||
2081 | struct fe_priv *np = netdev_priv(dev); | ||
2082 | u8 __iomem *base = get_hwbase(dev); | ||
2083 | |||
2084 | np->pause_flags &= ~(NV_PAUSEFRAME_TX_ENABLE | NV_PAUSEFRAME_RX_ENABLE); | ||
2085 | |||
2086 | if (np->pause_flags & NV_PAUSEFRAME_RX_CAPABLE) { | ||
2087 | u32 pff = readl(base + NvRegPacketFilterFlags) & ~NVREG_PFF_PAUSE_RX; | ||
2088 | if (pause_flags & NV_PAUSEFRAME_RX_ENABLE) { | ||
2089 | writel(pff|NVREG_PFF_PAUSE_RX, base + NvRegPacketFilterFlags); | ||
2090 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; | ||
2091 | } else { | ||
2092 | writel(pff, base + NvRegPacketFilterFlags); | ||
2093 | } | ||
2094 | } | ||
2095 | if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) { | ||
2096 | u32 regmisc = readl(base + NvRegMisc1) & ~NVREG_MISC1_PAUSE_TX; | ||
2097 | if (pause_flags & NV_PAUSEFRAME_TX_ENABLE) { | ||
2098 | writel(NVREG_TX_PAUSEFRAME_ENABLE, base + NvRegTxPauseFrame); | ||
2099 | writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1); | ||
2100 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; | ||
2101 | } else { | ||
2102 | writel(NVREG_TX_PAUSEFRAME_DISABLE, base + NvRegTxPauseFrame); | ||
2103 | writel(regmisc, base + NvRegMisc1); | ||
2104 | } | ||
2105 | } | ||
2106 | } | ||
2107 | |||
1889 | /** | 2108 | /** |
1890 | * nv_update_linkspeed: Setup the MAC according to the link partner | 2109 | * nv_update_linkspeed: Setup the MAC according to the link partner |
1891 | * @dev: Network device to be configured | 2110 | * @dev: Network device to be configured |
@@ -1901,12 +2120,14 @@ static int nv_update_linkspeed(struct net_device *dev) | |||
1901 | { | 2120 | { |
1902 | struct fe_priv *np = netdev_priv(dev); | 2121 | struct fe_priv *np = netdev_priv(dev); |
1903 | u8 __iomem *base = get_hwbase(dev); | 2122 | u8 __iomem *base = get_hwbase(dev); |
1904 | int adv, lpa; | 2123 | int adv = 0; |
2124 | int lpa = 0; | ||
2125 | int adv_lpa, adv_pause, lpa_pause; | ||
1905 | int newls = np->linkspeed; | 2126 | int newls = np->linkspeed; |
1906 | int newdup = np->duplex; | 2127 | int newdup = np->duplex; |
1907 | int mii_status; | 2128 | int mii_status; |
1908 | int retval = 0; | 2129 | int retval = 0; |
1909 | u32 control_1000, status_1000, phyreg; | 2130 | u32 control_1000, status_1000, phyreg, pause_flags; |
1910 | 2131 | ||
1911 | /* BMSR_LSTATUS is latched, read it twice: | 2132 | /* BMSR_LSTATUS is latched, read it twice: |
1912 | * we want the current value. | 2133 | * we want the current value. |
@@ -1952,10 +2173,15 @@ static int nv_update_linkspeed(struct net_device *dev) | |||
1952 | goto set_speed; | 2173 | goto set_speed; |
1953 | } | 2174 | } |
1954 | 2175 | ||
2176 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); | ||
2177 | lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ); | ||
2178 | dprintk(KERN_DEBUG "%s: nv_update_linkspeed: PHY advertises 0x%04x, lpa 0x%04x.\n", | ||
2179 | dev->name, adv, lpa); | ||
2180 | |||
1955 | retval = 1; | 2181 | retval = 1; |
1956 | if (np->gigabit == PHY_GIGABIT) { | 2182 | if (np->gigabit == PHY_GIGABIT) { |
1957 | control_1000 = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ); | 2183 | control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
1958 | status_1000 = mii_rw(dev, np->phyaddr, MII_1000BT_SR, MII_READ); | 2184 | status_1000 = mii_rw(dev, np->phyaddr, MII_STAT1000, MII_READ); |
1959 | 2185 | ||
1960 | if ((control_1000 & ADVERTISE_1000FULL) && | 2186 | if ((control_1000 & ADVERTISE_1000FULL) && |
1961 | (status_1000 & LPA_1000FULL)) { | 2187 | (status_1000 & LPA_1000FULL)) { |
@@ -1967,27 +2193,22 @@ static int nv_update_linkspeed(struct net_device *dev) | |||
1967 | } | 2193 | } |
1968 | } | 2194 | } |
1969 | 2195 | ||
1970 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); | ||
1971 | lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ); | ||
1972 | dprintk(KERN_DEBUG "%s: nv_update_linkspeed: PHY advertises 0x%04x, lpa 0x%04x.\n", | ||
1973 | dev->name, adv, lpa); | ||
1974 | |||
1975 | /* FIXME: handle parallel detection properly */ | 2196 | /* FIXME: handle parallel detection properly */ |
1976 | lpa = lpa & adv; | 2197 | adv_lpa = lpa & adv; |
1977 | if (lpa & LPA_100FULL) { | 2198 | if (adv_lpa & LPA_100FULL) { |
1978 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; | 2199 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
1979 | newdup = 1; | 2200 | newdup = 1; |
1980 | } else if (lpa & LPA_100HALF) { | 2201 | } else if (adv_lpa & LPA_100HALF) { |
1981 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; | 2202 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
1982 | newdup = 0; | 2203 | newdup = 0; |
1983 | } else if (lpa & LPA_10FULL) { | 2204 | } else if (adv_lpa & LPA_10FULL) { |
1984 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; | 2205 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
1985 | newdup = 1; | 2206 | newdup = 1; |
1986 | } else if (lpa & LPA_10HALF) { | 2207 | } else if (adv_lpa & LPA_10HALF) { |
1987 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; | 2208 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
1988 | newdup = 0; | 2209 | newdup = 0; |
1989 | } else { | 2210 | } else { |
1990 | dprintk(KERN_DEBUG "%s: bad ability %04x - falling back to 10HD.\n", dev->name, lpa); | 2211 | dprintk(KERN_DEBUG "%s: bad ability %04x - falling back to 10HD.\n", dev->name, adv_lpa); |
1991 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; | 2212 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
1992 | newdup = 0; | 2213 | newdup = 0; |
1993 | } | 2214 | } |
@@ -2030,6 +2251,46 @@ set_speed: | |||
2030 | writel(np->linkspeed, base + NvRegLinkSpeed); | 2251 | writel(np->linkspeed, base + NvRegLinkSpeed); |
2031 | pci_push(base); | 2252 | pci_push(base); |
2032 | 2253 | ||
2254 | pause_flags = 0; | ||
2255 | /* setup pause frame */ | ||
2256 | if (np->duplex != 0) { | ||
2257 | if (np->autoneg && np->pause_flags & NV_PAUSEFRAME_AUTONEG) { | ||
2258 | adv_pause = adv & (ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM); | ||
2259 | lpa_pause = lpa & (LPA_PAUSE_CAP| LPA_PAUSE_ASYM); | ||
2260 | |||
2261 | switch (adv_pause) { | ||
2262 | case (ADVERTISE_PAUSE_CAP): | ||
2263 | if (lpa_pause & LPA_PAUSE_CAP) { | ||
2264 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; | ||
2265 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) | ||
2266 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; | ||
2267 | } | ||
2268 | break; | ||
2269 | case (ADVERTISE_PAUSE_ASYM): | ||
2270 | if (lpa_pause == (LPA_PAUSE_CAP| LPA_PAUSE_ASYM)) | ||
2271 | { | ||
2272 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; | ||
2273 | } | ||
2274 | break; | ||
2275 | case (ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM): | ||
2276 | if (lpa_pause & LPA_PAUSE_CAP) | ||
2277 | { | ||
2278 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; | ||
2279 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) | ||
2280 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; | ||
2281 | } | ||
2282 | if (lpa_pause == LPA_PAUSE_ASYM) | ||
2283 | { | ||
2284 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; | ||
2285 | } | ||
2286 | break; | ||
2287 | } | ||
2288 | } else { | ||
2289 | pause_flags = np->pause_flags; | ||
2290 | } | ||
2291 | } | ||
2292 | nv_update_pause(dev, pause_flags); | ||
2293 | |||
2033 | return retval; | 2294 | return retval; |
2034 | } | 2295 | } |
2035 | 2296 | ||
@@ -2090,7 +2351,7 @@ static irqreturn_t nv_nic_irq(int foo, void *data, struct pt_regs *regs) | |||
2090 | spin_lock(&np->lock); | 2351 | spin_lock(&np->lock); |
2091 | nv_tx_done(dev); | 2352 | nv_tx_done(dev); |
2092 | spin_unlock(&np->lock); | 2353 | spin_unlock(&np->lock); |
2093 | 2354 | ||
2094 | nv_rx_process(dev); | 2355 | nv_rx_process(dev); |
2095 | if (nv_alloc_rx(dev)) { | 2356 | if (nv_alloc_rx(dev)) { |
2096 | spin_lock(&np->lock); | 2357 | spin_lock(&np->lock); |
@@ -2098,7 +2359,7 @@ static irqreturn_t nv_nic_irq(int foo, void *data, struct pt_regs *regs) | |||
2098 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); | 2359 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
2099 | spin_unlock(&np->lock); | 2360 | spin_unlock(&np->lock); |
2100 | } | 2361 | } |
2101 | 2362 | ||
2102 | if (events & NVREG_IRQ_LINK) { | 2363 | if (events & NVREG_IRQ_LINK) { |
2103 | spin_lock(&np->lock); | 2364 | spin_lock(&np->lock); |
2104 | nv_link_irq(dev); | 2365 | nv_link_irq(dev); |
@@ -2163,7 +2424,7 @@ static irqreturn_t nv_nic_irq_tx(int foo, void *data, struct pt_regs *regs) | |||
2163 | spin_lock_irq(&np->lock); | 2424 | spin_lock_irq(&np->lock); |
2164 | nv_tx_done(dev); | 2425 | nv_tx_done(dev); |
2165 | spin_unlock_irq(&np->lock); | 2426 | spin_unlock_irq(&np->lock); |
2166 | 2427 | ||
2167 | if (events & (NVREG_IRQ_TX_ERR)) { | 2428 | if (events & (NVREG_IRQ_TX_ERR)) { |
2168 | dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n", | 2429 | dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n", |
2169 | dev->name, events); | 2430 | dev->name, events); |
@@ -2206,7 +2467,7 @@ static irqreturn_t nv_nic_irq_rx(int foo, void *data, struct pt_regs *regs) | |||
2206 | dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events); | 2467 | dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events); |
2207 | if (!(events & np->irqmask)) | 2468 | if (!(events & np->irqmask)) |
2208 | break; | 2469 | break; |
2209 | 2470 | ||
2210 | nv_rx_process(dev); | 2471 | nv_rx_process(dev); |
2211 | if (nv_alloc_rx(dev)) { | 2472 | if (nv_alloc_rx(dev)) { |
2212 | spin_lock_irq(&np->lock); | 2473 | spin_lock_irq(&np->lock); |
@@ -2214,7 +2475,7 @@ static irqreturn_t nv_nic_irq_rx(int foo, void *data, struct pt_regs *regs) | |||
2214 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); | 2475 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
2215 | spin_unlock_irq(&np->lock); | 2476 | spin_unlock_irq(&np->lock); |
2216 | } | 2477 | } |
2217 | 2478 | ||
2218 | if (i > max_interrupt_work) { | 2479 | if (i > max_interrupt_work) { |
2219 | spin_lock_irq(&np->lock); | 2480 | spin_lock_irq(&np->lock); |
2220 | /* disable interrupts on the nic */ | 2481 | /* disable interrupts on the nic */ |
@@ -2253,7 +2514,7 @@ static irqreturn_t nv_nic_irq_other(int foo, void *data, struct pt_regs *regs) | |||
2253 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events); | 2514 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events); |
2254 | if (!(events & np->irqmask)) | 2515 | if (!(events & np->irqmask)) |
2255 | break; | 2516 | break; |
2256 | 2517 | ||
2257 | if (events & NVREG_IRQ_LINK) { | 2518 | if (events & NVREG_IRQ_LINK) { |
2258 | spin_lock_irq(&np->lock); | 2519 | spin_lock_irq(&np->lock); |
2259 | nv_link_irq(dev); | 2520 | nv_link_irq(dev); |
@@ -2290,6 +2551,175 @@ static irqreturn_t nv_nic_irq_other(int foo, void *data, struct pt_regs *regs) | |||
2290 | return IRQ_RETVAL(i); | 2551 | return IRQ_RETVAL(i); |
2291 | } | 2552 | } |
2292 | 2553 | ||
2554 | static irqreturn_t nv_nic_irq_test(int foo, void *data, struct pt_regs *regs) | ||
2555 | { | ||
2556 | struct net_device *dev = (struct net_device *) data; | ||
2557 | struct fe_priv *np = netdev_priv(dev); | ||
2558 | u8 __iomem *base = get_hwbase(dev); | ||
2559 | u32 events; | ||
2560 | |||
2561 | dprintk(KERN_DEBUG "%s: nv_nic_irq_test\n", dev->name); | ||
2562 | |||
2563 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { | ||
2564 | events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; | ||
2565 | writel(NVREG_IRQ_TIMER, base + NvRegIrqStatus); | ||
2566 | } else { | ||
2567 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; | ||
2568 | writel(NVREG_IRQ_TIMER, base + NvRegMSIXIrqStatus); | ||
2569 | } | ||
2570 | pci_push(base); | ||
2571 | dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events); | ||
2572 | if (!(events & NVREG_IRQ_TIMER)) | ||
2573 | return IRQ_RETVAL(0); | ||
2574 | |||
2575 | spin_lock(&np->lock); | ||
2576 | np->intr_test = 1; | ||
2577 | spin_unlock(&np->lock); | ||
2578 | |||
2579 | dprintk(KERN_DEBUG "%s: nv_nic_irq_test completed\n", dev->name); | ||
2580 | |||
2581 | return IRQ_RETVAL(1); | ||
2582 | } | ||
2583 | |||
2584 | static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask) | ||
2585 | { | ||
2586 | u8 __iomem *base = get_hwbase(dev); | ||
2587 | int i; | ||
2588 | u32 msixmap = 0; | ||
2589 | |||
2590 | /* Each interrupt bit can be mapped to a MSIX vector (4 bits). | ||
2591 | * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents | ||
2592 | * the remaining 8 interrupts. | ||
2593 | */ | ||
2594 | for (i = 0; i < 8; i++) { | ||
2595 | if ((irqmask >> i) & 0x1) { | ||
2596 | msixmap |= vector << (i << 2); | ||
2597 | } | ||
2598 | } | ||
2599 | writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0); | ||
2600 | |||
2601 | msixmap = 0; | ||
2602 | for (i = 0; i < 8; i++) { | ||
2603 | if ((irqmask >> (i + 8)) & 0x1) { | ||
2604 | msixmap |= vector << (i << 2); | ||
2605 | } | ||
2606 | } | ||
2607 | writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1); | ||
2608 | } | ||
2609 | |||
2610 | static int nv_request_irq(struct net_device *dev, int intr_test) | ||
2611 | { | ||
2612 | struct fe_priv *np = get_nvpriv(dev); | ||
2613 | u8 __iomem *base = get_hwbase(dev); | ||
2614 | int ret = 1; | ||
2615 | int i; | ||
2616 | |||
2617 | if (np->msi_flags & NV_MSI_X_CAPABLE) { | ||
2618 | for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) { | ||
2619 | np->msi_x_entry[i].entry = i; | ||
2620 | } | ||
2621 | if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) { | ||
2622 | np->msi_flags |= NV_MSI_X_ENABLED; | ||
2623 | if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT && !intr_test) { | ||
2624 | /* Request irq for rx handling */ | ||
2625 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, &nv_nic_irq_rx, SA_SHIRQ, dev->name, dev) != 0) { | ||
2626 | printk(KERN_INFO "forcedeth: request_irq failed for rx %d\n", ret); | ||
2627 | pci_disable_msix(np->pci_dev); | ||
2628 | np->msi_flags &= ~NV_MSI_X_ENABLED; | ||
2629 | goto out_err; | ||
2630 | } | ||
2631 | /* Request irq for tx handling */ | ||
2632 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, &nv_nic_irq_tx, SA_SHIRQ, dev->name, dev) != 0) { | ||
2633 | printk(KERN_INFO "forcedeth: request_irq failed for tx %d\n", ret); | ||
2634 | pci_disable_msix(np->pci_dev); | ||
2635 | np->msi_flags &= ~NV_MSI_X_ENABLED; | ||
2636 | goto out_free_rx; | ||
2637 | } | ||
2638 | /* Request irq for link and timer handling */ | ||
2639 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector, &nv_nic_irq_other, SA_SHIRQ, dev->name, dev) != 0) { | ||
2640 | printk(KERN_INFO "forcedeth: request_irq failed for link %d\n", ret); | ||
2641 | pci_disable_msix(np->pci_dev); | ||
2642 | np->msi_flags &= ~NV_MSI_X_ENABLED; | ||
2643 | goto out_free_tx; | ||
2644 | } | ||
2645 | /* map interrupts to their respective vector */ | ||
2646 | writel(0, base + NvRegMSIXMap0); | ||
2647 | writel(0, base + NvRegMSIXMap1); | ||
2648 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL); | ||
2649 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL); | ||
2650 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER); | ||
2651 | } else { | ||
2652 | /* Request irq for all interrupts */ | ||
2653 | if ((!intr_test && | ||
2654 | request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) || | ||
2655 | (intr_test && | ||
2656 | request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, &nv_nic_irq_test, SA_SHIRQ, dev->name, dev) != 0)) { | ||
2657 | printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret); | ||
2658 | pci_disable_msix(np->pci_dev); | ||
2659 | np->msi_flags &= ~NV_MSI_X_ENABLED; | ||
2660 | goto out_err; | ||
2661 | } | ||
2662 | |||
2663 | /* map interrupts to vector 0 */ | ||
2664 | writel(0, base + NvRegMSIXMap0); | ||
2665 | writel(0, base + NvRegMSIXMap1); | ||
2666 | } | ||
2667 | } | ||
2668 | } | ||
2669 | if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) { | ||
2670 | if ((ret = pci_enable_msi(np->pci_dev)) == 0) { | ||
2671 | np->msi_flags |= NV_MSI_ENABLED; | ||
2672 | if ((!intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) || | ||
2673 | (intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq_test, SA_SHIRQ, dev->name, dev) != 0)) { | ||
2674 | printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret); | ||
2675 | pci_disable_msi(np->pci_dev); | ||
2676 | np->msi_flags &= ~NV_MSI_ENABLED; | ||
2677 | goto out_err; | ||
2678 | } | ||
2679 | |||
2680 | /* map interrupts to vector 0 */ | ||
2681 | writel(0, base + NvRegMSIMap0); | ||
2682 | writel(0, base + NvRegMSIMap1); | ||
2683 | /* enable msi vector 0 */ | ||
2684 | writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask); | ||
2685 | } | ||
2686 | } | ||
2687 | if (ret != 0) { | ||
2688 | if ((!intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) || | ||
2689 | (intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq_test, SA_SHIRQ, dev->name, dev) != 0)) | ||
2690 | goto out_err; | ||
2691 | |||
2692 | } | ||
2693 | |||
2694 | return 0; | ||
2695 | out_free_tx: | ||
2696 | free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, dev); | ||
2697 | out_free_rx: | ||
2698 | free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, dev); | ||
2699 | out_err: | ||
2700 | return 1; | ||
2701 | } | ||
2702 | |||
2703 | static void nv_free_irq(struct net_device *dev) | ||
2704 | { | ||
2705 | struct fe_priv *np = get_nvpriv(dev); | ||
2706 | int i; | ||
2707 | |||
2708 | if (np->msi_flags & NV_MSI_X_ENABLED) { | ||
2709 | for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) { | ||
2710 | free_irq(np->msi_x_entry[i].vector, dev); | ||
2711 | } | ||
2712 | pci_disable_msix(np->pci_dev); | ||
2713 | np->msi_flags &= ~NV_MSI_X_ENABLED; | ||
2714 | } else { | ||
2715 | free_irq(np->pci_dev->irq, dev); | ||
2716 | if (np->msi_flags & NV_MSI_ENABLED) { | ||
2717 | pci_disable_msi(np->pci_dev); | ||
2718 | np->msi_flags &= ~NV_MSI_ENABLED; | ||
2719 | } | ||
2720 | } | ||
2721 | } | ||
2722 | |||
2293 | static void nv_do_nic_poll(unsigned long data) | 2723 | static void nv_do_nic_poll(unsigned long data) |
2294 | { | 2724 | { |
2295 | struct net_device *dev = (struct net_device *) data; | 2725 | struct net_device *dev = (struct net_device *) data; |
@@ -2326,7 +2756,7 @@ static void nv_do_nic_poll(unsigned long data) | |||
2326 | np->nic_poll_irq = 0; | 2756 | np->nic_poll_irq = 0; |
2327 | 2757 | ||
2328 | /* FIXME: Do we need synchronize_irq(dev->irq) here? */ | 2758 | /* FIXME: Do we need synchronize_irq(dev->irq) here? */ |
2329 | 2759 | ||
2330 | writel(mask, base + NvRegIrqMask); | 2760 | writel(mask, base + NvRegIrqMask); |
2331 | pci_push(base); | 2761 | pci_push(base); |
2332 | 2762 | ||
@@ -2359,6 +2789,56 @@ static void nv_poll_controller(struct net_device *dev) | |||
2359 | } | 2789 | } |
2360 | #endif | 2790 | #endif |
2361 | 2791 | ||
2792 | static void nv_do_stats_poll(unsigned long data) | ||
2793 | { | ||
2794 | struct net_device *dev = (struct net_device *) data; | ||
2795 | struct fe_priv *np = netdev_priv(dev); | ||
2796 | u8 __iomem *base = get_hwbase(dev); | ||
2797 | |||
2798 | np->estats.tx_bytes += readl(base + NvRegTxCnt); | ||
2799 | np->estats.tx_zero_rexmt += readl(base + NvRegTxZeroReXmt); | ||
2800 | np->estats.tx_one_rexmt += readl(base + NvRegTxOneReXmt); | ||
2801 | np->estats.tx_many_rexmt += readl(base + NvRegTxManyReXmt); | ||
2802 | np->estats.tx_late_collision += readl(base + NvRegTxLateCol); | ||
2803 | np->estats.tx_fifo_errors += readl(base + NvRegTxUnderflow); | ||
2804 | np->estats.tx_carrier_errors += readl(base + NvRegTxLossCarrier); | ||
2805 | np->estats.tx_excess_deferral += readl(base + NvRegTxExcessDef); | ||
2806 | np->estats.tx_retry_error += readl(base + NvRegTxRetryErr); | ||
2807 | np->estats.tx_deferral += readl(base + NvRegTxDef); | ||
2808 | np->estats.tx_packets += readl(base + NvRegTxFrame); | ||
2809 | np->estats.tx_pause += readl(base + NvRegTxPause); | ||
2810 | np->estats.rx_frame_error += readl(base + NvRegRxFrameErr); | ||
2811 | np->estats.rx_extra_byte += readl(base + NvRegRxExtraByte); | ||
2812 | np->estats.rx_late_collision += readl(base + NvRegRxLateCol); | ||
2813 | np->estats.rx_runt += readl(base + NvRegRxRunt); | ||
2814 | np->estats.rx_frame_too_long += readl(base + NvRegRxFrameTooLong); | ||
2815 | np->estats.rx_over_errors += readl(base + NvRegRxOverflow); | ||
2816 | np->estats.rx_crc_errors += readl(base + NvRegRxFCSErr); | ||
2817 | np->estats.rx_frame_align_error += readl(base + NvRegRxFrameAlignErr); | ||
2818 | np->estats.rx_length_error += readl(base + NvRegRxLenErr); | ||
2819 | np->estats.rx_unicast += readl(base + NvRegRxUnicast); | ||
2820 | np->estats.rx_multicast += readl(base + NvRegRxMulticast); | ||
2821 | np->estats.rx_broadcast += readl(base + NvRegRxBroadcast); | ||
2822 | np->estats.rx_bytes += readl(base + NvRegRxCnt); | ||
2823 | np->estats.rx_pause += readl(base + NvRegRxPause); | ||
2824 | np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame); | ||
2825 | np->estats.rx_packets = | ||
2826 | np->estats.rx_unicast + | ||
2827 | np->estats.rx_multicast + | ||
2828 | np->estats.rx_broadcast; | ||
2829 | np->estats.rx_errors_total = | ||
2830 | np->estats.rx_crc_errors + | ||
2831 | np->estats.rx_over_errors + | ||
2832 | np->estats.rx_frame_error + | ||
2833 | (np->estats.rx_frame_align_error - np->estats.rx_extra_byte) + | ||
2834 | np->estats.rx_late_collision + | ||
2835 | np->estats.rx_runt + | ||
2836 | np->estats.rx_frame_too_long; | ||
2837 | |||
2838 | if (!np->in_shutdown) | ||
2839 | mod_timer(&np->stats_poll, jiffies + STATS_INTERVAL); | ||
2840 | } | ||
2841 | |||
2362 | static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | 2842 | static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
2363 | { | 2843 | { |
2364 | struct fe_priv *np = netdev_priv(dev); | 2844 | struct fe_priv *np = netdev_priv(dev); |
@@ -2382,17 +2862,19 @@ static int nv_set_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo) | |||
2382 | { | 2862 | { |
2383 | struct fe_priv *np = netdev_priv(dev); | 2863 | struct fe_priv *np = netdev_priv(dev); |
2384 | u8 __iomem *base = get_hwbase(dev); | 2864 | u8 __iomem *base = get_hwbase(dev); |
2865 | u32 flags = 0; | ||
2385 | 2866 | ||
2386 | spin_lock_irq(&np->lock); | ||
2387 | if (wolinfo->wolopts == 0) { | 2867 | if (wolinfo->wolopts == 0) { |
2388 | writel(0, base + NvRegWakeUpFlags); | ||
2389 | np->wolenabled = 0; | 2868 | np->wolenabled = 0; |
2390 | } | 2869 | } else if (wolinfo->wolopts & WAKE_MAGIC) { |
2391 | if (wolinfo->wolopts & WAKE_MAGIC) { | ||
2392 | writel(NVREG_WAKEUPFLAGS_ENABLE, base + NvRegWakeUpFlags); | ||
2393 | np->wolenabled = 1; | 2870 | np->wolenabled = 1; |
2871 | flags = NVREG_WAKEUPFLAGS_ENABLE; | ||
2872 | } | ||
2873 | if (netif_running(dev)) { | ||
2874 | spin_lock_irq(&np->lock); | ||
2875 | writel(flags, base + NvRegWakeUpFlags); | ||
2876 | spin_unlock_irq(&np->lock); | ||
2394 | } | 2877 | } |
2395 | spin_unlock_irq(&np->lock); | ||
2396 | return 0; | 2878 | return 0; |
2397 | } | 2879 | } |
2398 | 2880 | ||
@@ -2406,9 +2888,17 @@ static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |||
2406 | if (!netif_running(dev)) { | 2888 | if (!netif_running(dev)) { |
2407 | /* We do not track link speed / duplex setting if the | 2889 | /* We do not track link speed / duplex setting if the |
2408 | * interface is disabled. Force a link check */ | 2890 | * interface is disabled. Force a link check */ |
2409 | nv_update_linkspeed(dev); | 2891 | if (nv_update_linkspeed(dev)) { |
2892 | if (!netif_carrier_ok(dev)) | ||
2893 | netif_carrier_on(dev); | ||
2894 | } else { | ||
2895 | if (netif_carrier_ok(dev)) | ||
2896 | netif_carrier_off(dev); | ||
2897 | } | ||
2410 | } | 2898 | } |
2411 | switch(np->linkspeed & (NVREG_LINKSPEED_MASK)) { | 2899 | |
2900 | if (netif_carrier_ok(dev)) { | ||
2901 | switch(np->linkspeed & (NVREG_LINKSPEED_MASK)) { | ||
2412 | case NVREG_LINKSPEED_10: | 2902 | case NVREG_LINKSPEED_10: |
2413 | ecmd->speed = SPEED_10; | 2903 | ecmd->speed = SPEED_10; |
2414 | break; | 2904 | break; |
@@ -2418,10 +2908,14 @@ static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |||
2418 | case NVREG_LINKSPEED_1000: | 2908 | case NVREG_LINKSPEED_1000: |
2419 | ecmd->speed = SPEED_1000; | 2909 | ecmd->speed = SPEED_1000; |
2420 | break; | 2910 | break; |
2911 | } | ||
2912 | ecmd->duplex = DUPLEX_HALF; | ||
2913 | if (np->duplex) | ||
2914 | ecmd->duplex = DUPLEX_FULL; | ||
2915 | } else { | ||
2916 | ecmd->speed = -1; | ||
2917 | ecmd->duplex = -1; | ||
2421 | } | 2918 | } |
2422 | ecmd->duplex = DUPLEX_HALF; | ||
2423 | if (np->duplex) | ||
2424 | ecmd->duplex = DUPLEX_FULL; | ||
2425 | 2919 | ||
2426 | ecmd->autoneg = np->autoneg; | 2920 | ecmd->autoneg = np->autoneg; |
2427 | 2921 | ||
@@ -2429,23 +2923,20 @@ static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |||
2429 | if (np->autoneg) { | 2923 | if (np->autoneg) { |
2430 | ecmd->advertising |= ADVERTISED_Autoneg; | 2924 | ecmd->advertising |= ADVERTISED_Autoneg; |
2431 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); | 2925 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
2432 | } else { | 2926 | if (adv & ADVERTISE_10HALF) |
2433 | adv = np->fixed_mode; | 2927 | ecmd->advertising |= ADVERTISED_10baseT_Half; |
2434 | } | 2928 | if (adv & ADVERTISE_10FULL) |
2435 | if (adv & ADVERTISE_10HALF) | 2929 | ecmd->advertising |= ADVERTISED_10baseT_Full; |
2436 | ecmd->advertising |= ADVERTISED_10baseT_Half; | 2930 | if (adv & ADVERTISE_100HALF) |
2437 | if (adv & ADVERTISE_10FULL) | 2931 | ecmd->advertising |= ADVERTISED_100baseT_Half; |
2438 | ecmd->advertising |= ADVERTISED_10baseT_Full; | 2932 | if (adv & ADVERTISE_100FULL) |
2439 | if (adv & ADVERTISE_100HALF) | 2933 | ecmd->advertising |= ADVERTISED_100baseT_Full; |
2440 | ecmd->advertising |= ADVERTISED_100baseT_Half; | 2934 | if (np->gigabit == PHY_GIGABIT) { |
2441 | if (adv & ADVERTISE_100FULL) | 2935 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
2442 | ecmd->advertising |= ADVERTISED_100baseT_Full; | 2936 | if (adv & ADVERTISE_1000FULL) |
2443 | if (np->autoneg && np->gigabit == PHY_GIGABIT) { | 2937 | ecmd->advertising |= ADVERTISED_1000baseT_Full; |
2444 | adv = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ); | 2938 | } |
2445 | if (adv & ADVERTISE_1000FULL) | ||
2446 | ecmd->advertising |= ADVERTISED_1000baseT_Full; | ||
2447 | } | 2939 | } |
2448 | |||
2449 | ecmd->supported = (SUPPORTED_Autoneg | | 2940 | ecmd->supported = (SUPPORTED_Autoneg | |
2450 | SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | | 2941 | SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | |
2451 | SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | | 2942 | SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | |
@@ -2497,7 +2988,18 @@ static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |||
2497 | return -EINVAL; | 2988 | return -EINVAL; |
2498 | } | 2989 | } |
2499 | 2990 | ||
2500 | spin_lock_irq(&np->lock); | 2991 | netif_carrier_off(dev); |
2992 | if (netif_running(dev)) { | ||
2993 | nv_disable_irq(dev); | ||
2994 | spin_lock_bh(&dev->xmit_lock); | ||
2995 | spin_lock(&np->lock); | ||
2996 | /* stop engines */ | ||
2997 | nv_stop_rx(dev); | ||
2998 | nv_stop_tx(dev); | ||
2999 | spin_unlock(&np->lock); | ||
3000 | spin_unlock_bh(&dev->xmit_lock); | ||
3001 | } | ||
3002 | |||
2501 | if (ecmd->autoneg == AUTONEG_ENABLE) { | 3003 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
2502 | int adv, bmcr; | 3004 | int adv, bmcr; |
2503 | 3005 | ||
@@ -2505,7 +3007,7 @@ static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |||
2505 | 3007 | ||
2506 | /* advertise only what has been requested */ | 3008 | /* advertise only what has been requested */ |
2507 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); | 3009 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
2508 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); | 3010 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2509 | if (ecmd->advertising & ADVERTISED_10baseT_Half) | 3011 | if (ecmd->advertising & ADVERTISED_10baseT_Half) |
2510 | adv |= ADVERTISE_10HALF; | 3012 | adv |= ADVERTISE_10HALF; |
2511 | if (ecmd->advertising & ADVERTISED_10baseT_Full) | 3013 | if (ecmd->advertising & ADVERTISED_10baseT_Full) |
@@ -2514,16 +3016,22 @@ static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |||
2514 | adv |= ADVERTISE_100HALF; | 3016 | adv |= ADVERTISE_100HALF; |
2515 | if (ecmd->advertising & ADVERTISED_100baseT_Full) | 3017 | if (ecmd->advertising & ADVERTISED_100baseT_Full) |
2516 | adv |= ADVERTISE_100FULL; | 3018 | adv |= ADVERTISE_100FULL; |
3019 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisments but disable tx pause */ | ||
3020 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; | ||
3021 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) | ||
3022 | adv |= ADVERTISE_PAUSE_ASYM; | ||
2517 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); | 3023 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
2518 | 3024 | ||
2519 | if (np->gigabit == PHY_GIGABIT) { | 3025 | if (np->gigabit == PHY_GIGABIT) { |
2520 | adv = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ); | 3026 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
2521 | adv &= ~ADVERTISE_1000FULL; | 3027 | adv &= ~ADVERTISE_1000FULL; |
2522 | if (ecmd->advertising & ADVERTISED_1000baseT_Full) | 3028 | if (ecmd->advertising & ADVERTISED_1000baseT_Full) |
2523 | adv |= ADVERTISE_1000FULL; | 3029 | adv |= ADVERTISE_1000FULL; |
2524 | mii_rw(dev, np->phyaddr, MII_1000BT_CR, adv); | 3030 | mii_rw(dev, np->phyaddr, MII_CTRL1000, adv); |
2525 | } | 3031 | } |
2526 | 3032 | ||
3033 | if (netif_running(dev)) | ||
3034 | printk(KERN_INFO "%s: link down.\n", dev->name); | ||
2527 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); | 3035 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
2528 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | 3036 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
2529 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); | 3037 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
@@ -2534,7 +3042,7 @@ static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |||
2534 | np->autoneg = 0; | 3042 | np->autoneg = 0; |
2535 | 3043 | ||
2536 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); | 3044 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
2537 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); | 3045 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2538 | if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_HALF) | 3046 | if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_HALF) |
2539 | adv |= ADVERTISE_10HALF; | 3047 | adv |= ADVERTISE_10HALF; |
2540 | if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_FULL) | 3048 | if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_FULL) |
@@ -2543,30 +3051,49 @@ static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |||
2543 | adv |= ADVERTISE_100HALF; | 3051 | adv |= ADVERTISE_100HALF; |
2544 | if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_FULL) | 3052 | if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_FULL) |
2545 | adv |= ADVERTISE_100FULL; | 3053 | adv |= ADVERTISE_100FULL; |
3054 | np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE); | ||
3055 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) {/* for rx we set both advertisments but disable tx pause */ | ||
3056 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; | ||
3057 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; | ||
3058 | } | ||
3059 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) { | ||
3060 | adv |= ADVERTISE_PAUSE_ASYM; | ||
3061 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; | ||
3062 | } | ||
2546 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); | 3063 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
2547 | np->fixed_mode = adv; | 3064 | np->fixed_mode = adv; |
2548 | 3065 | ||
2549 | if (np->gigabit == PHY_GIGABIT) { | 3066 | if (np->gigabit == PHY_GIGABIT) { |
2550 | adv = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ); | 3067 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
2551 | adv &= ~ADVERTISE_1000FULL; | 3068 | adv &= ~ADVERTISE_1000FULL; |
2552 | mii_rw(dev, np->phyaddr, MII_1000BT_CR, adv); | 3069 | mii_rw(dev, np->phyaddr, MII_CTRL1000, adv); |
2553 | } | 3070 | } |
2554 | 3071 | ||
2555 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); | 3072 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
2556 | bmcr |= ~(BMCR_ANENABLE|BMCR_SPEED100|BMCR_FULLDPLX); | 3073 | bmcr &= ~(BMCR_ANENABLE|BMCR_SPEED100|BMCR_SPEED1000|BMCR_FULLDPLX); |
2557 | if (adv & (ADVERTISE_10FULL|ADVERTISE_100FULL)) | 3074 | if (np->fixed_mode & (ADVERTISE_10FULL|ADVERTISE_100FULL)) |
2558 | bmcr |= BMCR_FULLDPLX; | 3075 | bmcr |= BMCR_FULLDPLX; |
2559 | if (adv & (ADVERTISE_100HALF|ADVERTISE_100FULL)) | 3076 | if (np->fixed_mode & (ADVERTISE_100HALF|ADVERTISE_100FULL)) |
2560 | bmcr |= BMCR_SPEED100; | 3077 | bmcr |= BMCR_SPEED100; |
2561 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); | 3078 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
2562 | 3079 | if (np->phy_oui == PHY_OUI_MARVELL) { | |
2563 | if (netif_running(dev)) { | 3080 | /* reset the phy */ |
3081 | if (phy_reset(dev)) { | ||
3082 | printk(KERN_INFO "%s: phy reset failed\n", dev->name); | ||
3083 | return -EINVAL; | ||
3084 | } | ||
3085 | } else if (netif_running(dev)) { | ||
2564 | /* Wait a bit and then reconfigure the nic. */ | 3086 | /* Wait a bit and then reconfigure the nic. */ |
2565 | udelay(10); | 3087 | udelay(10); |
2566 | nv_linkchange(dev); | 3088 | nv_linkchange(dev); |
2567 | } | 3089 | } |
2568 | } | 3090 | } |
2569 | spin_unlock_irq(&np->lock); | 3091 | |
3092 | if (netif_running(dev)) { | ||
3093 | nv_start_rx(dev); | ||
3094 | nv_start_tx(dev); | ||
3095 | nv_enable_irq(dev); | ||
3096 | } | ||
2570 | 3097 | ||
2571 | return 0; | 3098 | return 0; |
2572 | } | 3099 | } |
@@ -2598,24 +3125,39 @@ static int nv_nway_reset(struct net_device *dev) | |||
2598 | struct fe_priv *np = netdev_priv(dev); | 3125 | struct fe_priv *np = netdev_priv(dev); |
2599 | int ret; | 3126 | int ret; |
2600 | 3127 | ||
2601 | spin_lock_irq(&np->lock); | ||
2602 | if (np->autoneg) { | 3128 | if (np->autoneg) { |
2603 | int bmcr; | 3129 | int bmcr; |
2604 | 3130 | ||
3131 | netif_carrier_off(dev); | ||
3132 | if (netif_running(dev)) { | ||
3133 | nv_disable_irq(dev); | ||
3134 | spin_lock_bh(&dev->xmit_lock); | ||
3135 | spin_lock(&np->lock); | ||
3136 | /* stop engines */ | ||
3137 | nv_stop_rx(dev); | ||
3138 | nv_stop_tx(dev); | ||
3139 | spin_unlock(&np->lock); | ||
3140 | spin_unlock_bh(&dev->xmit_lock); | ||
3141 | printk(KERN_INFO "%s: link down.\n", dev->name); | ||
3142 | } | ||
3143 | |||
2605 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); | 3144 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
2606 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | 3145 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
2607 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); | 3146 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
2608 | 3147 | ||
3148 | if (netif_running(dev)) { | ||
3149 | nv_start_rx(dev); | ||
3150 | nv_start_tx(dev); | ||
3151 | nv_enable_irq(dev); | ||
3152 | } | ||
2609 | ret = 0; | 3153 | ret = 0; |
2610 | } else { | 3154 | } else { |
2611 | ret = -EINVAL; | 3155 | ret = -EINVAL; |
2612 | } | 3156 | } |
2613 | spin_unlock_irq(&np->lock); | ||
2614 | 3157 | ||
2615 | return ret; | 3158 | return ret; |
2616 | } | 3159 | } |
2617 | 3160 | ||
2618 | #ifdef NETIF_F_TSO | ||
2619 | static int nv_set_tso(struct net_device *dev, u32 value) | 3161 | static int nv_set_tso(struct net_device *dev, u32 value) |
2620 | { | 3162 | { |
2621 | struct fe_priv *np = netdev_priv(dev); | 3163 | struct fe_priv *np = netdev_priv(dev); |
@@ -2623,187 +3165,702 @@ static int nv_set_tso(struct net_device *dev, u32 value) | |||
2623 | if ((np->driver_data & DEV_HAS_CHECKSUM)) | 3165 | if ((np->driver_data & DEV_HAS_CHECKSUM)) |
2624 | return ethtool_op_set_tso(dev, value); | 3166 | return ethtool_op_set_tso(dev, value); |
2625 | else | 3167 | else |
2626 | return value ? -EOPNOTSUPP : 0; | 3168 | return -EOPNOTSUPP; |
2627 | } | 3169 | } |
2628 | #endif | ||
2629 | 3170 | ||
2630 | static struct ethtool_ops ops = { | 3171 | static void nv_get_ringparam(struct net_device *dev, struct ethtool_ringparam* ring) |
2631 | .get_drvinfo = nv_get_drvinfo, | 3172 | { |
2632 | .get_link = ethtool_op_get_link, | 3173 | struct fe_priv *np = netdev_priv(dev); |
2633 | .get_wol = nv_get_wol, | ||
2634 | .set_wol = nv_set_wol, | ||
2635 | .get_settings = nv_get_settings, | ||
2636 | .set_settings = nv_set_settings, | ||
2637 | .get_regs_len = nv_get_regs_len, | ||
2638 | .get_regs = nv_get_regs, | ||
2639 | .nway_reset = nv_nway_reset, | ||
2640 | .get_perm_addr = ethtool_op_get_perm_addr, | ||
2641 | #ifdef NETIF_F_TSO | ||
2642 | .get_tso = ethtool_op_get_tso, | ||
2643 | .set_tso = nv_set_tso | ||
2644 | #endif | ||
2645 | }; | ||
2646 | 3174 | ||
2647 | static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) | 3175 | ring->rx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3; |
3176 | ring->rx_mini_max_pending = 0; | ||
3177 | ring->rx_jumbo_max_pending = 0; | ||
3178 | ring->tx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3; | ||
3179 | |||
3180 | ring->rx_pending = np->rx_ring_size; | ||
3181 | ring->rx_mini_pending = 0; | ||
3182 | ring->rx_jumbo_pending = 0; | ||
3183 | ring->tx_pending = np->tx_ring_size; | ||
3184 | } | ||
3185 | |||
3186 | static int nv_set_ringparam(struct net_device *dev, struct ethtool_ringparam* ring) | ||
2648 | { | 3187 | { |
2649 | struct fe_priv *np = get_nvpriv(dev); | 3188 | struct fe_priv *np = netdev_priv(dev); |
3189 | u8 __iomem *base = get_hwbase(dev); | ||
3190 | u8 *rxtx_ring, *rx_skbuff, *tx_skbuff, *rx_dma, *tx_dma, *tx_dma_len; | ||
3191 | dma_addr_t ring_addr; | ||
2650 | 3192 | ||
2651 | spin_lock_irq(&np->lock); | 3193 | if (ring->rx_pending < RX_RING_MIN || |
3194 | ring->tx_pending < TX_RING_MIN || | ||
3195 | ring->rx_mini_pending != 0 || | ||
3196 | ring->rx_jumbo_pending != 0 || | ||
3197 | (np->desc_ver == DESC_VER_1 && | ||
3198 | (ring->rx_pending > RING_MAX_DESC_VER_1 || | ||
3199 | ring->tx_pending > RING_MAX_DESC_VER_1)) || | ||
3200 | (np->desc_ver != DESC_VER_1 && | ||
3201 | (ring->rx_pending > RING_MAX_DESC_VER_2_3 || | ||
3202 | ring->tx_pending > RING_MAX_DESC_VER_2_3))) { | ||
3203 | return -EINVAL; | ||
3204 | } | ||
2652 | 3205 | ||
2653 | /* save vlan group */ | 3206 | /* allocate new rings */ |
2654 | np->vlangrp = grp; | 3207 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { |
3208 | rxtx_ring = pci_alloc_consistent(np->pci_dev, | ||
3209 | sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending), | ||
3210 | &ring_addr); | ||
3211 | } else { | ||
3212 | rxtx_ring = pci_alloc_consistent(np->pci_dev, | ||
3213 | sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending), | ||
3214 | &ring_addr); | ||
3215 | } | ||
3216 | rx_skbuff = kmalloc(sizeof(struct sk_buff*) * ring->rx_pending, GFP_KERNEL); | ||
3217 | rx_dma = kmalloc(sizeof(dma_addr_t) * ring->rx_pending, GFP_KERNEL); | ||
3218 | tx_skbuff = kmalloc(sizeof(struct sk_buff*) * ring->tx_pending, GFP_KERNEL); | ||
3219 | tx_dma = kmalloc(sizeof(dma_addr_t) * ring->tx_pending, GFP_KERNEL); | ||
3220 | tx_dma_len = kmalloc(sizeof(unsigned int) * ring->tx_pending, GFP_KERNEL); | ||
3221 | if (!rxtx_ring || !rx_skbuff || !rx_dma || !tx_skbuff || !tx_dma || !tx_dma_len) { | ||
3222 | /* fall back to old rings */ | ||
3223 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { | ||
3224 | if(rxtx_ring) | ||
3225 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending), | ||
3226 | rxtx_ring, ring_addr); | ||
3227 | } else { | ||
3228 | if (rxtx_ring) | ||
3229 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending), | ||
3230 | rxtx_ring, ring_addr); | ||
3231 | } | ||
3232 | if (rx_skbuff) | ||
3233 | kfree(rx_skbuff); | ||
3234 | if (rx_dma) | ||
3235 | kfree(rx_dma); | ||
3236 | if (tx_skbuff) | ||
3237 | kfree(tx_skbuff); | ||
3238 | if (tx_dma) | ||
3239 | kfree(tx_dma); | ||
3240 | if (tx_dma_len) | ||
3241 | kfree(tx_dma_len); | ||
3242 | goto exit; | ||
3243 | } | ||
2655 | 3244 | ||
2656 | if (grp) { | 3245 | if (netif_running(dev)) { |
2657 | /* enable vlan on MAC */ | 3246 | nv_disable_irq(dev); |
2658 | np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS; | 3247 | spin_lock_bh(&dev->xmit_lock); |
3248 | spin_lock(&np->lock); | ||
3249 | /* stop engines */ | ||
3250 | nv_stop_rx(dev); | ||
3251 | nv_stop_tx(dev); | ||
3252 | nv_txrx_reset(dev); | ||
3253 | /* drain queues */ | ||
3254 | nv_drain_rx(dev); | ||
3255 | nv_drain_tx(dev); | ||
3256 | /* delete queues */ | ||
3257 | free_rings(dev); | ||
3258 | } | ||
3259 | |||
3260 | /* set new values */ | ||
3261 | np->rx_ring_size = ring->rx_pending; | ||
3262 | np->tx_ring_size = ring->tx_pending; | ||
3263 | np->tx_limit_stop = ring->tx_pending - TX_LIMIT_DIFFERENCE; | ||
3264 | np->tx_limit_start = ring->tx_pending - TX_LIMIT_DIFFERENCE - 1; | ||
3265 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { | ||
3266 | np->rx_ring.orig = (struct ring_desc*)rxtx_ring; | ||
3267 | np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size]; | ||
2659 | } else { | 3268 | } else { |
2660 | /* disable vlan on MAC */ | 3269 | np->rx_ring.ex = (struct ring_desc_ex*)rxtx_ring; |
2661 | np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP; | 3270 | np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size]; |
2662 | np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS; | ||
2663 | } | 3271 | } |
3272 | np->rx_skbuff = (struct sk_buff**)rx_skbuff; | ||
3273 | np->rx_dma = (dma_addr_t*)rx_dma; | ||
3274 | np->tx_skbuff = (struct sk_buff**)tx_skbuff; | ||
3275 | np->tx_dma = (dma_addr_t*)tx_dma; | ||
3276 | np->tx_dma_len = (unsigned int*)tx_dma_len; | ||
3277 | np->ring_addr = ring_addr; | ||
3278 | |||
3279 | memset(np->rx_skbuff, 0, sizeof(struct sk_buff*) * np->rx_ring_size); | ||
3280 | memset(np->rx_dma, 0, sizeof(dma_addr_t) * np->rx_ring_size); | ||
3281 | memset(np->tx_skbuff, 0, sizeof(struct sk_buff*) * np->tx_ring_size); | ||
3282 | memset(np->tx_dma, 0, sizeof(dma_addr_t) * np->tx_ring_size); | ||
3283 | memset(np->tx_dma_len, 0, sizeof(unsigned int) * np->tx_ring_size); | ||
2664 | 3284 | ||
2665 | writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); | 3285 | if (netif_running(dev)) { |
3286 | /* reinit driver view of the queues */ | ||
3287 | set_bufsize(dev); | ||
3288 | if (nv_init_ring(dev)) { | ||
3289 | if (!np->in_shutdown) | ||
3290 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); | ||
3291 | } | ||
2666 | 3292 | ||
2667 | spin_unlock_irq(&np->lock); | 3293 | /* reinit nic view of the queues */ |
2668 | }; | 3294 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
3295 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); | ||
3296 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), | ||
3297 | base + NvRegRingSizes); | ||
3298 | pci_push(base); | ||
3299 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); | ||
3300 | pci_push(base); | ||
2669 | 3301 | ||
2670 | static void nv_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) | 3302 | /* restart engines */ |
3303 | nv_start_rx(dev); | ||
3304 | nv_start_tx(dev); | ||
3305 | spin_unlock(&np->lock); | ||
3306 | spin_unlock_bh(&dev->xmit_lock); | ||
3307 | nv_enable_irq(dev); | ||
3308 | } | ||
3309 | return 0; | ||
3310 | exit: | ||
3311 | return -ENOMEM; | ||
3312 | } | ||
3313 | |||
3314 | static void nv_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause) | ||
2671 | { | 3315 | { |
2672 | /* nothing to do */ | 3316 | struct fe_priv *np = netdev_priv(dev); |
2673 | }; | ||
2674 | 3317 | ||
2675 | static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask) | 3318 | pause->autoneg = (np->pause_flags & NV_PAUSEFRAME_AUTONEG) != 0; |
3319 | pause->rx_pause = (np->pause_flags & NV_PAUSEFRAME_RX_ENABLE) != 0; | ||
3320 | pause->tx_pause = (np->pause_flags & NV_PAUSEFRAME_TX_ENABLE) != 0; | ||
3321 | } | ||
3322 | |||
3323 | static int nv_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause) | ||
3324 | { | ||
3325 | struct fe_priv *np = netdev_priv(dev); | ||
3326 | int adv, bmcr; | ||
3327 | |||
3328 | if ((!np->autoneg && np->duplex == 0) || | ||
3329 | (np->autoneg && !pause->autoneg && np->duplex == 0)) { | ||
3330 | printk(KERN_INFO "%s: can not set pause settings when forced link is in half duplex.\n", | ||
3331 | dev->name); | ||
3332 | return -EINVAL; | ||
3333 | } | ||
3334 | if (pause->tx_pause && !(np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE)) { | ||
3335 | printk(KERN_INFO "%s: hardware does not support tx pause frames.\n", dev->name); | ||
3336 | return -EINVAL; | ||
3337 | } | ||
3338 | |||
3339 | netif_carrier_off(dev); | ||
3340 | if (netif_running(dev)) { | ||
3341 | nv_disable_irq(dev); | ||
3342 | spin_lock_bh(&dev->xmit_lock); | ||
3343 | spin_lock(&np->lock); | ||
3344 | /* stop engines */ | ||
3345 | nv_stop_rx(dev); | ||
3346 | nv_stop_tx(dev); | ||
3347 | spin_unlock(&np->lock); | ||
3348 | spin_unlock_bh(&dev->xmit_lock); | ||
3349 | } | ||
3350 | |||
3351 | np->pause_flags &= ~(NV_PAUSEFRAME_RX_REQ|NV_PAUSEFRAME_TX_REQ); | ||
3352 | if (pause->rx_pause) | ||
3353 | np->pause_flags |= NV_PAUSEFRAME_RX_REQ; | ||
3354 | if (pause->tx_pause) | ||
3355 | np->pause_flags |= NV_PAUSEFRAME_TX_REQ; | ||
3356 | |||
3357 | if (np->autoneg && pause->autoneg) { | ||
3358 | np->pause_flags |= NV_PAUSEFRAME_AUTONEG; | ||
3359 | |||
3360 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); | ||
3361 | adv &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | ||
3362 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisments but disable tx pause */ | ||
3363 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; | ||
3364 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) | ||
3365 | adv |= ADVERTISE_PAUSE_ASYM; | ||
3366 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); | ||
3367 | |||
3368 | if (netif_running(dev)) | ||
3369 | printk(KERN_INFO "%s: link down.\n", dev->name); | ||
3370 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); | ||
3371 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | ||
3372 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); | ||
3373 | } else { | ||
3374 | np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE); | ||
3375 | if (pause->rx_pause) | ||
3376 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; | ||
3377 | if (pause->tx_pause) | ||
3378 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; | ||
3379 | |||
3380 | if (!netif_running(dev)) | ||
3381 | nv_update_linkspeed(dev); | ||
3382 | else | ||
3383 | nv_update_pause(dev, np->pause_flags); | ||
3384 | } | ||
3385 | |||
3386 | if (netif_running(dev)) { | ||
3387 | nv_start_rx(dev); | ||
3388 | nv_start_tx(dev); | ||
3389 | nv_enable_irq(dev); | ||
3390 | } | ||
3391 | return 0; | ||
3392 | } | ||
3393 | |||
3394 | static u32 nv_get_rx_csum(struct net_device *dev) | ||
3395 | { | ||
3396 | struct fe_priv *np = netdev_priv(dev); | ||
3397 | return (np->txrxctl_bits & NVREG_TXRXCTL_RXCHECK) != 0; | ||
3398 | } | ||
3399 | |||
3400 | static int nv_set_rx_csum(struct net_device *dev, u32 data) | ||
2676 | { | 3401 | { |
3402 | struct fe_priv *np = netdev_priv(dev); | ||
2677 | u8 __iomem *base = get_hwbase(dev); | 3403 | u8 __iomem *base = get_hwbase(dev); |
2678 | int i; | 3404 | int retcode = 0; |
2679 | u32 msixmap = 0; | ||
2680 | 3405 | ||
2681 | /* Each interrupt bit can be mapped to a MSIX vector (4 bits). | 3406 | if (np->driver_data & DEV_HAS_CHECKSUM) { |
2682 | * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents | 3407 | |
2683 | * the remaining 8 interrupts. | 3408 | if (((np->txrxctl_bits & NVREG_TXRXCTL_RXCHECK) && data) || |
2684 | */ | 3409 | (!(np->txrxctl_bits & NVREG_TXRXCTL_RXCHECK) && !data)) { |
2685 | for (i = 0; i < 8; i++) { | 3410 | /* already set or unset */ |
2686 | if ((irqmask >> i) & 0x1) { | 3411 | return 0; |
2687 | msixmap |= vector << (i << 2); | ||
2688 | } | 3412 | } |
2689 | } | ||
2690 | writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0); | ||
2691 | 3413 | ||
2692 | msixmap = 0; | 3414 | if (data) { |
2693 | for (i = 0; i < 8; i++) { | 3415 | np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK; |
2694 | if ((irqmask >> (i + 8)) & 0x1) { | 3416 | } else if (!(np->vlanctl_bits & NVREG_VLANCONTROL_ENABLE)) { |
2695 | msixmap |= vector << (i << 2); | 3417 | np->txrxctl_bits &= ~NVREG_TXRXCTL_RXCHECK; |
3418 | } else { | ||
3419 | printk(KERN_INFO "Can not disable rx checksum if vlan is enabled\n"); | ||
3420 | return -EINVAL; | ||
3421 | } | ||
3422 | |||
3423 | if (netif_running(dev)) { | ||
3424 | spin_lock_irq(&np->lock); | ||
3425 | writel(np->txrxctl_bits, base + NvRegTxRxControl); | ||
3426 | spin_unlock_irq(&np->lock); | ||
2696 | } | 3427 | } |
3428 | } else { | ||
3429 | return -EINVAL; | ||
2697 | } | 3430 | } |
2698 | writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1); | 3431 | |
3432 | return retcode; | ||
2699 | } | 3433 | } |
2700 | 3434 | ||
2701 | static int nv_request_irq(struct net_device *dev) | 3435 | static int nv_set_tx_csum(struct net_device *dev, u32 data) |
3436 | { | ||
3437 | struct fe_priv *np = netdev_priv(dev); | ||
3438 | |||
3439 | if (np->driver_data & DEV_HAS_CHECKSUM) | ||
3440 | return ethtool_op_set_tx_hw_csum(dev, data); | ||
3441 | else | ||
3442 | return -EOPNOTSUPP; | ||
3443 | } | ||
3444 | |||
3445 | static int nv_set_sg(struct net_device *dev, u32 data) | ||
3446 | { | ||
3447 | struct fe_priv *np = netdev_priv(dev); | ||
3448 | |||
3449 | if (np->driver_data & DEV_HAS_CHECKSUM) | ||
3450 | return ethtool_op_set_sg(dev, data); | ||
3451 | else | ||
3452 | return -EOPNOTSUPP; | ||
3453 | } | ||
3454 | |||
3455 | static int nv_get_stats_count(struct net_device *dev) | ||
3456 | { | ||
3457 | struct fe_priv *np = netdev_priv(dev); | ||
3458 | |||
3459 | if (np->driver_data & DEV_HAS_STATISTICS) | ||
3460 | return (sizeof(struct nv_ethtool_stats)/sizeof(u64)); | ||
3461 | else | ||
3462 | return 0; | ||
3463 | } | ||
3464 | |||
3465 | static void nv_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *estats, u64 *buffer) | ||
3466 | { | ||
3467 | struct fe_priv *np = netdev_priv(dev); | ||
3468 | |||
3469 | /* update stats */ | ||
3470 | nv_do_stats_poll((unsigned long)dev); | ||
3471 | |||
3472 | memcpy(buffer, &np->estats, nv_get_stats_count(dev)*sizeof(u64)); | ||
3473 | } | ||
3474 | |||
3475 | static int nv_self_test_count(struct net_device *dev) | ||
3476 | { | ||
3477 | struct fe_priv *np = netdev_priv(dev); | ||
3478 | |||
3479 | if (np->driver_data & DEV_HAS_TEST_EXTENDED) | ||
3480 | return NV_TEST_COUNT_EXTENDED; | ||
3481 | else | ||
3482 | return NV_TEST_COUNT_BASE; | ||
3483 | } | ||
3484 | |||
3485 | static int nv_link_test(struct net_device *dev) | ||
3486 | { | ||
3487 | struct fe_priv *np = netdev_priv(dev); | ||
3488 | int mii_status; | ||
3489 | |||
3490 | mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); | ||
3491 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); | ||
3492 | |||
3493 | /* check phy link status */ | ||
3494 | if (!(mii_status & BMSR_LSTATUS)) | ||
3495 | return 0; | ||
3496 | else | ||
3497 | return 1; | ||
3498 | } | ||
3499 | |||
3500 | static int nv_register_test(struct net_device *dev) | ||
2702 | { | 3501 | { |
2703 | struct fe_priv *np = get_nvpriv(dev); | 3502 | u8 __iomem *base = get_hwbase(dev); |
3503 | int i = 0; | ||
3504 | u32 orig_read, new_read; | ||
3505 | |||
3506 | do { | ||
3507 | orig_read = readl(base + nv_registers_test[i].reg); | ||
3508 | |||
3509 | /* xor with mask to toggle bits */ | ||
3510 | orig_read ^= nv_registers_test[i].mask; | ||
3511 | |||
3512 | writel(orig_read, base + nv_registers_test[i].reg); | ||
3513 | |||
3514 | new_read = readl(base + nv_registers_test[i].reg); | ||
3515 | |||
3516 | if ((new_read & nv_registers_test[i].mask) != (orig_read & nv_registers_test[i].mask)) | ||
3517 | return 0; | ||
3518 | |||
3519 | /* restore original value */ | ||
3520 | orig_read ^= nv_registers_test[i].mask; | ||
3521 | writel(orig_read, base + nv_registers_test[i].reg); | ||
3522 | |||
3523 | } while (nv_registers_test[++i].reg != 0); | ||
3524 | |||
3525 | return 1; | ||
3526 | } | ||
3527 | |||
3528 | static int nv_interrupt_test(struct net_device *dev) | ||
3529 | { | ||
3530 | struct fe_priv *np = netdev_priv(dev); | ||
2704 | u8 __iomem *base = get_hwbase(dev); | 3531 | u8 __iomem *base = get_hwbase(dev); |
2705 | int ret = 1; | 3532 | int ret = 1; |
2706 | int i; | 3533 | int testcnt; |
3534 | u32 save_msi_flags, save_poll_interval = 0; | ||
2707 | 3535 | ||
2708 | if (np->msi_flags & NV_MSI_X_CAPABLE) { | 3536 | if (netif_running(dev)) { |
2709 | for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) { | 3537 | /* free current irq */ |
2710 | np->msi_x_entry[i].entry = i; | 3538 | nv_free_irq(dev); |
3539 | save_poll_interval = readl(base+NvRegPollingInterval); | ||
3540 | } | ||
3541 | |||
3542 | /* flag to test interrupt handler */ | ||
3543 | np->intr_test = 0; | ||
3544 | |||
3545 | /* setup test irq */ | ||
3546 | save_msi_flags = np->msi_flags; | ||
3547 | np->msi_flags &= ~NV_MSI_X_VECTORS_MASK; | ||
3548 | np->msi_flags |= 0x001; /* setup 1 vector */ | ||
3549 | if (nv_request_irq(dev, 1)) | ||
3550 | return 0; | ||
3551 | |||
3552 | /* setup timer interrupt */ | ||
3553 | writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval); | ||
3554 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); | ||
3555 | |||
3556 | nv_enable_hw_interrupts(dev, NVREG_IRQ_TIMER); | ||
3557 | |||
3558 | /* wait for at least one interrupt */ | ||
3559 | msleep(100); | ||
3560 | |||
3561 | spin_lock_irq(&np->lock); | ||
3562 | |||
3563 | /* flag should be set within ISR */ | ||
3564 | testcnt = np->intr_test; | ||
3565 | if (!testcnt) | ||
3566 | ret = 2; | ||
3567 | |||
3568 | nv_disable_hw_interrupts(dev, NVREG_IRQ_TIMER); | ||
3569 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) | ||
3570 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); | ||
3571 | else | ||
3572 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); | ||
3573 | |||
3574 | spin_unlock_irq(&np->lock); | ||
3575 | |||
3576 | nv_free_irq(dev); | ||
3577 | |||
3578 | np->msi_flags = save_msi_flags; | ||
3579 | |||
3580 | if (netif_running(dev)) { | ||
3581 | writel(save_poll_interval, base + NvRegPollingInterval); | ||
3582 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); | ||
3583 | /* restore original irq */ | ||
3584 | if (nv_request_irq(dev, 0)) | ||
3585 | return 0; | ||
3586 | } | ||
3587 | |||
3588 | return ret; | ||
3589 | } | ||
3590 | |||
3591 | static int nv_loopback_test(struct net_device *dev) | ||
3592 | { | ||
3593 | struct fe_priv *np = netdev_priv(dev); | ||
3594 | u8 __iomem *base = get_hwbase(dev); | ||
3595 | struct sk_buff *tx_skb, *rx_skb; | ||
3596 | dma_addr_t test_dma_addr; | ||
3597 | u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET); | ||
3598 | u32 Flags; | ||
3599 | int len, i, pkt_len; | ||
3600 | u8 *pkt_data; | ||
3601 | u32 filter_flags = 0; | ||
3602 | u32 misc1_flags = 0; | ||
3603 | int ret = 1; | ||
3604 | |||
3605 | if (netif_running(dev)) { | ||
3606 | nv_disable_irq(dev); | ||
3607 | filter_flags = readl(base + NvRegPacketFilterFlags); | ||
3608 | misc1_flags = readl(base + NvRegMisc1); | ||
3609 | } else { | ||
3610 | nv_txrx_reset(dev); | ||
3611 | } | ||
3612 | |||
3613 | /* reinit driver view of the rx queue */ | ||
3614 | set_bufsize(dev); | ||
3615 | nv_init_ring(dev); | ||
3616 | |||
3617 | /* setup hardware for loopback */ | ||
3618 | writel(NVREG_MISC1_FORCE, base + NvRegMisc1); | ||
3619 | writel(NVREG_PFF_ALWAYS | NVREG_PFF_LOOPBACK, base + NvRegPacketFilterFlags); | ||
3620 | |||
3621 | /* reinit nic view of the rx queue */ | ||
3622 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); | ||
3623 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); | ||
3624 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), | ||
3625 | base + NvRegRingSizes); | ||
3626 | pci_push(base); | ||
3627 | |||
3628 | /* restart rx engine */ | ||
3629 | nv_start_rx(dev); | ||
3630 | nv_start_tx(dev); | ||
3631 | |||
3632 | /* setup packet for tx */ | ||
3633 | pkt_len = ETH_DATA_LEN; | ||
3634 | tx_skb = dev_alloc_skb(pkt_len); | ||
3635 | pkt_data = skb_put(tx_skb, pkt_len); | ||
3636 | for (i = 0; i < pkt_len; i++) | ||
3637 | pkt_data[i] = (u8)(i & 0xff); | ||
3638 | test_dma_addr = pci_map_single(np->pci_dev, tx_skb->data, | ||
3639 | tx_skb->end-tx_skb->data, PCI_DMA_FROMDEVICE); | ||
3640 | |||
3641 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { | ||
3642 | np->tx_ring.orig[0].PacketBuffer = cpu_to_le32(test_dma_addr); | ||
3643 | np->tx_ring.orig[0].FlagLen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra); | ||
3644 | } else { | ||
3645 | np->tx_ring.ex[0].PacketBufferHigh = cpu_to_le64(test_dma_addr) >> 32; | ||
3646 | np->tx_ring.ex[0].PacketBufferLow = cpu_to_le64(test_dma_addr) & 0x0FFFFFFFF; | ||
3647 | np->tx_ring.ex[0].FlagLen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra); | ||
3648 | } | ||
3649 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); | ||
3650 | pci_push(get_hwbase(dev)); | ||
3651 | |||
3652 | msleep(500); | ||
3653 | |||
3654 | /* check for rx of the packet */ | ||
3655 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { | ||
3656 | Flags = le32_to_cpu(np->rx_ring.orig[0].FlagLen); | ||
3657 | len = nv_descr_getlength(&np->rx_ring.orig[0], np->desc_ver); | ||
3658 | |||
3659 | } else { | ||
3660 | Flags = le32_to_cpu(np->rx_ring.ex[0].FlagLen); | ||
3661 | len = nv_descr_getlength_ex(&np->rx_ring.ex[0], np->desc_ver); | ||
3662 | } | ||
3663 | |||
3664 | if (Flags & NV_RX_AVAIL) { | ||
3665 | ret = 0; | ||
3666 | } else if (np->desc_ver == DESC_VER_1) { | ||
3667 | if (Flags & NV_RX_ERROR) | ||
3668 | ret = 0; | ||
3669 | } else { | ||
3670 | if (Flags & NV_RX2_ERROR) { | ||
3671 | ret = 0; | ||
2711 | } | 3672 | } |
2712 | if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) { | 3673 | } |
2713 | np->msi_flags |= NV_MSI_X_ENABLED; | ||
2714 | if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) { | ||
2715 | /* Request irq for rx handling */ | ||
2716 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, &nv_nic_irq_rx, SA_SHIRQ, dev->name, dev) != 0) { | ||
2717 | printk(KERN_INFO "forcedeth: request_irq failed for rx %d\n", ret); | ||
2718 | pci_disable_msix(np->pci_dev); | ||
2719 | np->msi_flags &= ~NV_MSI_X_ENABLED; | ||
2720 | goto out_err; | ||
2721 | } | ||
2722 | /* Request irq for tx handling */ | ||
2723 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, &nv_nic_irq_tx, SA_SHIRQ, dev->name, dev) != 0) { | ||
2724 | printk(KERN_INFO "forcedeth: request_irq failed for tx %d\n", ret); | ||
2725 | pci_disable_msix(np->pci_dev); | ||
2726 | np->msi_flags &= ~NV_MSI_X_ENABLED; | ||
2727 | goto out_free_rx; | ||
2728 | } | ||
2729 | /* Request irq for link and timer handling */ | ||
2730 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector, &nv_nic_irq_other, SA_SHIRQ, dev->name, dev) != 0) { | ||
2731 | printk(KERN_INFO "forcedeth: request_irq failed for link %d\n", ret); | ||
2732 | pci_disable_msix(np->pci_dev); | ||
2733 | np->msi_flags &= ~NV_MSI_X_ENABLED; | ||
2734 | goto out_free_tx; | ||
2735 | } | ||
2736 | /* map interrupts to their respective vector */ | ||
2737 | writel(0, base + NvRegMSIXMap0); | ||
2738 | writel(0, base + NvRegMSIXMap1); | ||
2739 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL); | ||
2740 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL); | ||
2741 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER); | ||
2742 | } else { | ||
2743 | /* Request irq for all interrupts */ | ||
2744 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) { | ||
2745 | printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret); | ||
2746 | pci_disable_msix(np->pci_dev); | ||
2747 | np->msi_flags &= ~NV_MSI_X_ENABLED; | ||
2748 | goto out_err; | ||
2749 | } | ||
2750 | 3674 | ||
2751 | /* map interrupts to vector 0 */ | 3675 | if (ret) { |
2752 | writel(0, base + NvRegMSIXMap0); | 3676 | if (len != pkt_len) { |
2753 | writel(0, base + NvRegMSIXMap1); | 3677 | ret = 0; |
3678 | dprintk(KERN_DEBUG "%s: loopback len mismatch %d vs %d\n", | ||
3679 | dev->name, len, pkt_len); | ||
3680 | } else { | ||
3681 | rx_skb = np->rx_skbuff[0]; | ||
3682 | for (i = 0; i < pkt_len; i++) { | ||
3683 | if (rx_skb->data[i] != (u8)(i & 0xff)) { | ||
3684 | ret = 0; | ||
3685 | dprintk(KERN_DEBUG "%s: loopback pattern check failed on byte %d\n", | ||
3686 | dev->name, i); | ||
3687 | break; | ||
3688 | } | ||
2754 | } | 3689 | } |
2755 | } | 3690 | } |
3691 | } else { | ||
3692 | dprintk(KERN_DEBUG "%s: loopback - did not receive test packet\n", dev->name); | ||
2756 | } | 3693 | } |
2757 | if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) { | 3694 | |
2758 | if ((ret = pci_enable_msi(np->pci_dev)) == 0) { | 3695 | pci_unmap_page(np->pci_dev, test_dma_addr, |
2759 | np->msi_flags |= NV_MSI_ENABLED; | 3696 | tx_skb->end-tx_skb->data, |
2760 | if (request_irq(np->pci_dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) { | 3697 | PCI_DMA_TODEVICE); |
2761 | printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret); | 3698 | dev_kfree_skb_any(tx_skb); |
2762 | pci_disable_msi(np->pci_dev); | 3699 | |
2763 | np->msi_flags &= ~NV_MSI_ENABLED; | 3700 | /* stop engines */ |
2764 | goto out_err; | 3701 | nv_stop_rx(dev); |
3702 | nv_stop_tx(dev); | ||
3703 | nv_txrx_reset(dev); | ||
3704 | /* drain rx queue */ | ||
3705 | nv_drain_rx(dev); | ||
3706 | nv_drain_tx(dev); | ||
3707 | |||
3708 | if (netif_running(dev)) { | ||
3709 | writel(misc1_flags, base + NvRegMisc1); | ||
3710 | writel(filter_flags, base + NvRegPacketFilterFlags); | ||
3711 | nv_enable_irq(dev); | ||
3712 | } | ||
3713 | |||
3714 | return ret; | ||
3715 | } | ||
3716 | |||
3717 | static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64 *buffer) | ||
3718 | { | ||
3719 | struct fe_priv *np = netdev_priv(dev); | ||
3720 | u8 __iomem *base = get_hwbase(dev); | ||
3721 | int result; | ||
3722 | memset(buffer, 0, nv_self_test_count(dev)*sizeof(u64)); | ||
3723 | |||
3724 | if (!nv_link_test(dev)) { | ||
3725 | test->flags |= ETH_TEST_FL_FAILED; | ||
3726 | buffer[0] = 1; | ||
3727 | } | ||
3728 | |||
3729 | if (test->flags & ETH_TEST_FL_OFFLINE) { | ||
3730 | if (netif_running(dev)) { | ||
3731 | netif_stop_queue(dev); | ||
3732 | spin_lock_bh(&dev->xmit_lock); | ||
3733 | spin_lock_irq(&np->lock); | ||
3734 | nv_disable_hw_interrupts(dev, np->irqmask); | ||
3735 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { | ||
3736 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); | ||
3737 | } else { | ||
3738 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); | ||
2765 | } | 3739 | } |
3740 | /* stop engines */ | ||
3741 | nv_stop_rx(dev); | ||
3742 | nv_stop_tx(dev); | ||
3743 | nv_txrx_reset(dev); | ||
3744 | /* drain rx queue */ | ||
3745 | nv_drain_rx(dev); | ||
3746 | nv_drain_tx(dev); | ||
3747 | spin_unlock_irq(&np->lock); | ||
3748 | spin_unlock_bh(&dev->xmit_lock); | ||
3749 | } | ||
2766 | 3750 | ||
2767 | /* map interrupts to vector 0 */ | 3751 | if (!nv_register_test(dev)) { |
2768 | writel(0, base + NvRegMSIMap0); | 3752 | test->flags |= ETH_TEST_FL_FAILED; |
2769 | writel(0, base + NvRegMSIMap1); | 3753 | buffer[1] = 1; |
2770 | /* enable msi vector 0 */ | 3754 | } |
2771 | writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask); | 3755 | |
3756 | result = nv_interrupt_test(dev); | ||
3757 | if (result != 1) { | ||
3758 | test->flags |= ETH_TEST_FL_FAILED; | ||
3759 | buffer[2] = 1; | ||
3760 | } | ||
3761 | if (result == 0) { | ||
3762 | /* bail out */ | ||
3763 | return; | ||
3764 | } | ||
3765 | |||
3766 | if (!nv_loopback_test(dev)) { | ||
3767 | test->flags |= ETH_TEST_FL_FAILED; | ||
3768 | buffer[3] = 1; | ||
3769 | } | ||
3770 | |||
3771 | if (netif_running(dev)) { | ||
3772 | /* reinit driver view of the rx queue */ | ||
3773 | set_bufsize(dev); | ||
3774 | if (nv_init_ring(dev)) { | ||
3775 | if (!np->in_shutdown) | ||
3776 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); | ||
3777 | } | ||
3778 | /* reinit nic view of the rx queue */ | ||
3779 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); | ||
3780 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); | ||
3781 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), | ||
3782 | base + NvRegRingSizes); | ||
3783 | pci_push(base); | ||
3784 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); | ||
3785 | pci_push(base); | ||
3786 | /* restart rx engine */ | ||
3787 | nv_start_rx(dev); | ||
3788 | nv_start_tx(dev); | ||
3789 | netif_start_queue(dev); | ||
3790 | nv_enable_hw_interrupts(dev, np->irqmask); | ||
2772 | } | 3791 | } |
2773 | } | 3792 | } |
2774 | if (ret != 0) { | 3793 | } |
2775 | if (request_irq(np->pci_dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) | ||
2776 | goto out_err; | ||
2777 | } | ||
2778 | 3794 | ||
2779 | return 0; | 3795 | static void nv_get_strings(struct net_device *dev, u32 stringset, u8 *buffer) |
2780 | out_free_tx: | 3796 | { |
2781 | free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, dev); | 3797 | switch (stringset) { |
2782 | out_free_rx: | 3798 | case ETH_SS_STATS: |
2783 | free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, dev); | 3799 | memcpy(buffer, &nv_estats_str, nv_get_stats_count(dev)*sizeof(struct nv_ethtool_str)); |
2784 | out_err: | 3800 | break; |
2785 | return 1; | 3801 | case ETH_SS_TEST: |
3802 | memcpy(buffer, &nv_etests_str, nv_self_test_count(dev)*sizeof(struct nv_ethtool_str)); | ||
3803 | break; | ||
3804 | } | ||
2786 | } | 3805 | } |
2787 | 3806 | ||
2788 | static void nv_free_irq(struct net_device *dev) | 3807 | static struct ethtool_ops ops = { |
3808 | .get_drvinfo = nv_get_drvinfo, | ||
3809 | .get_link = ethtool_op_get_link, | ||
3810 | .get_wol = nv_get_wol, | ||
3811 | .set_wol = nv_set_wol, | ||
3812 | .get_settings = nv_get_settings, | ||
3813 | .set_settings = nv_set_settings, | ||
3814 | .get_regs_len = nv_get_regs_len, | ||
3815 | .get_regs = nv_get_regs, | ||
3816 | .nway_reset = nv_nway_reset, | ||
3817 | .get_perm_addr = ethtool_op_get_perm_addr, | ||
3818 | .get_tso = ethtool_op_get_tso, | ||
3819 | .set_tso = nv_set_tso, | ||
3820 | .get_ringparam = nv_get_ringparam, | ||
3821 | .set_ringparam = nv_set_ringparam, | ||
3822 | .get_pauseparam = nv_get_pauseparam, | ||
3823 | .set_pauseparam = nv_set_pauseparam, | ||
3824 | .get_rx_csum = nv_get_rx_csum, | ||
3825 | .set_rx_csum = nv_set_rx_csum, | ||
3826 | .get_tx_csum = ethtool_op_get_tx_csum, | ||
3827 | .set_tx_csum = nv_set_tx_csum, | ||
3828 | .get_sg = ethtool_op_get_sg, | ||
3829 | .set_sg = nv_set_sg, | ||
3830 | .get_strings = nv_get_strings, | ||
3831 | .get_stats_count = nv_get_stats_count, | ||
3832 | .get_ethtool_stats = nv_get_ethtool_stats, | ||
3833 | .self_test_count = nv_self_test_count, | ||
3834 | .self_test = nv_self_test, | ||
3835 | }; | ||
3836 | |||
3837 | static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) | ||
2789 | { | 3838 | { |
2790 | struct fe_priv *np = get_nvpriv(dev); | 3839 | struct fe_priv *np = get_nvpriv(dev); |
2791 | int i; | ||
2792 | 3840 | ||
2793 | if (np->msi_flags & NV_MSI_X_ENABLED) { | 3841 | spin_lock_irq(&np->lock); |
2794 | for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) { | 3842 | |
2795 | free_irq(np->msi_x_entry[i].vector, dev); | 3843 | /* save vlan group */ |
2796 | } | 3844 | np->vlangrp = grp; |
2797 | pci_disable_msix(np->pci_dev); | 3845 | |
2798 | np->msi_flags &= ~NV_MSI_X_ENABLED; | 3846 | if (grp) { |
3847 | /* enable vlan on MAC */ | ||
3848 | np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS; | ||
2799 | } else { | 3849 | } else { |
2800 | free_irq(np->pci_dev->irq, dev); | 3850 | /* disable vlan on MAC */ |
2801 | if (np->msi_flags & NV_MSI_ENABLED) { | 3851 | np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP; |
2802 | pci_disable_msi(np->pci_dev); | 3852 | np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS; |
2803 | np->msi_flags &= ~NV_MSI_ENABLED; | ||
2804 | } | ||
2805 | } | 3853 | } |
2806 | } | 3854 | |
3855 | writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); | ||
3856 | |||
3857 | spin_unlock_irq(&np->lock); | ||
3858 | }; | ||
3859 | |||
3860 | static void nv_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) | ||
3861 | { | ||
3862 | /* nothing to do */ | ||
3863 | }; | ||
2807 | 3864 | ||
2808 | static int nv_open(struct net_device *dev) | 3865 | static int nv_open(struct net_device *dev) |
2809 | { | 3866 | { |
@@ -2829,6 +3886,9 @@ static int nv_open(struct net_device *dev) | |||
2829 | 3886 | ||
2830 | writel(0, base + NvRegAdapterControl); | 3887 | writel(0, base + NvRegAdapterControl); |
2831 | 3888 | ||
3889 | if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) | ||
3890 | writel(NVREG_TX_PAUSEFRAME_DISABLE, base + NvRegTxPauseFrame); | ||
3891 | |||
2832 | /* 2) initialize descriptor rings */ | 3892 | /* 2) initialize descriptor rings */ |
2833 | set_bufsize(dev); | 3893 | set_bufsize(dev); |
2834 | oom = nv_init_ring(dev); | 3894 | oom = nv_init_ring(dev); |
@@ -2845,7 +3905,7 @@ static int nv_open(struct net_device *dev) | |||
2845 | 3905 | ||
2846 | /* 4) give hw rings */ | 3906 | /* 4) give hw rings */ |
2847 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); | 3907 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
2848 | writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT), | 3908 | writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
2849 | base + NvRegRingSizes); | 3909 | base + NvRegRingSizes); |
2850 | 3910 | ||
2851 | /* 5) continue setup */ | 3911 | /* 5) continue setup */ |
@@ -2887,7 +3947,8 @@ static int nv_open(struct net_device *dev) | |||
2887 | base + NvRegAdapterControl); | 3947 | base + NvRegAdapterControl); |
2888 | writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed); | 3948 | writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed); |
2889 | writel(NVREG_UNKSETUP4_VAL, base + NvRegUnknownSetupReg4); | 3949 | writel(NVREG_UNKSETUP4_VAL, base + NvRegUnknownSetupReg4); |
2890 | writel(NVREG_WAKEUPFLAGS_VAL, base + NvRegWakeUpFlags); | 3950 | if (np->wolenabled) |
3951 | writel(NVREG_WAKEUPFLAGS_ENABLE , base + NvRegWakeUpFlags); | ||
2891 | 3952 | ||
2892 | i = readl(base + NvRegPowerState); | 3953 | i = readl(base + NvRegPowerState); |
2893 | if ( (i & NVREG_POWERSTATE_POWEREDUP) == 0) | 3954 | if ( (i & NVREG_POWERSTATE_POWEREDUP) == 0) |
@@ -2903,7 +3964,7 @@ static int nv_open(struct net_device *dev) | |||
2903 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); | 3964 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
2904 | pci_push(base); | 3965 | pci_push(base); |
2905 | 3966 | ||
2906 | if (nv_request_irq(dev)) { | 3967 | if (nv_request_irq(dev, 0)) { |
2907 | goto out_drain; | 3968 | goto out_drain; |
2908 | } | 3969 | } |
2909 | 3970 | ||
@@ -2940,6 +4001,11 @@ static int nv_open(struct net_device *dev) | |||
2940 | } | 4001 | } |
2941 | if (oom) | 4002 | if (oom) |
2942 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); | 4003 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
4004 | |||
4005 | /* start statistics timer */ | ||
4006 | if (np->driver_data & DEV_HAS_STATISTICS) | ||
4007 | mod_timer(&np->stats_poll, jiffies + STATS_INTERVAL); | ||
4008 | |||
2943 | spin_unlock_irq(&np->lock); | 4009 | spin_unlock_irq(&np->lock); |
2944 | 4010 | ||
2945 | return 0; | 4011 | return 0; |
@@ -2960,6 +4026,7 @@ static int nv_close(struct net_device *dev) | |||
2960 | 4026 | ||
2961 | del_timer_sync(&np->oom_kick); | 4027 | del_timer_sync(&np->oom_kick); |
2962 | del_timer_sync(&np->nic_poll); | 4028 | del_timer_sync(&np->nic_poll); |
4029 | del_timer_sync(&np->stats_poll); | ||
2963 | 4030 | ||
2964 | netif_stop_queue(dev); | 4031 | netif_stop_queue(dev); |
2965 | spin_lock_irq(&np->lock); | 4032 | spin_lock_irq(&np->lock); |
@@ -3019,6 +4086,9 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
3019 | init_timer(&np->nic_poll); | 4086 | init_timer(&np->nic_poll); |
3020 | np->nic_poll.data = (unsigned long) dev; | 4087 | np->nic_poll.data = (unsigned long) dev; |
3021 | np->nic_poll.function = &nv_do_nic_poll; /* timer handler */ | 4088 | np->nic_poll.function = &nv_do_nic_poll; /* timer handler */ |
4089 | init_timer(&np->stats_poll); | ||
4090 | np->stats_poll.data = (unsigned long) dev; | ||
4091 | np->stats_poll.function = &nv_do_stats_poll; /* timer handler */ | ||
3022 | 4092 | ||
3023 | err = pci_enable_device(pci_dev); | 4093 | err = pci_enable_device(pci_dev); |
3024 | if (err) { | 4094 | if (err) { |
@@ -3033,7 +4103,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
3033 | if (err < 0) | 4103 | if (err < 0) |
3034 | goto out_disable; | 4104 | goto out_disable; |
3035 | 4105 | ||
3036 | if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL)) | 4106 | if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS)) |
3037 | np->register_size = NV_PCI_REGSZ_VER2; | 4107 | np->register_size = NV_PCI_REGSZ_VER2; |
3038 | else | 4108 | else |
3039 | np->register_size = NV_PCI_REGSZ_VER1; | 4109 | np->register_size = NV_PCI_REGSZ_VER1; |
@@ -3065,16 +4135,18 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
3065 | /* packet format 3: supports 40-bit addressing */ | 4135 | /* packet format 3: supports 40-bit addressing */ |
3066 | np->desc_ver = DESC_VER_3; | 4136 | np->desc_ver = DESC_VER_3; |
3067 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_3; | 4137 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_3; |
3068 | if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) { | 4138 | if (dma_64bit) { |
3069 | printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n", | 4139 | if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) { |
3070 | pci_name(pci_dev)); | 4140 | printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n", |
3071 | } else { | 4141 | pci_name(pci_dev)); |
3072 | dev->features |= NETIF_F_HIGHDMA; | 4142 | } else { |
3073 | printk(KERN_INFO "forcedeth: using HIGHDMA\n"); | 4143 | dev->features |= NETIF_F_HIGHDMA; |
3074 | } | 4144 | printk(KERN_INFO "forcedeth: using HIGHDMA\n"); |
3075 | if (pci_set_consistent_dma_mask(pci_dev, 0x0000007fffffffffULL)) { | 4145 | } |
3076 | printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed for device %s.\n", | 4146 | if (pci_set_consistent_dma_mask(pci_dev, DMA_39BIT_MASK)) { |
3077 | pci_name(pci_dev)); | 4147 | printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed, using 32-bit ring buffers for device %s.\n", |
4148 | pci_name(pci_dev)); | ||
4149 | } | ||
3078 | } | 4150 | } |
3079 | } else if (id->driver_data & DEV_HAS_LARGEDESC) { | 4151 | } else if (id->driver_data & DEV_HAS_LARGEDESC) { |
3080 | /* packet format 2: supports jumbo frames */ | 4152 | /* packet format 2: supports jumbo frames */ |
@@ -3107,13 +4179,19 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
3107 | } | 4179 | } |
3108 | 4180 | ||
3109 | np->msi_flags = 0; | 4181 | np->msi_flags = 0; |
3110 | if ((id->driver_data & DEV_HAS_MSI) && !disable_msi) { | 4182 | if ((id->driver_data & DEV_HAS_MSI) && msi) { |
3111 | np->msi_flags |= NV_MSI_CAPABLE; | 4183 | np->msi_flags |= NV_MSI_CAPABLE; |
3112 | } | 4184 | } |
3113 | if ((id->driver_data & DEV_HAS_MSI_X) && !disable_msix) { | 4185 | if ((id->driver_data & DEV_HAS_MSI_X) && msix) { |
3114 | np->msi_flags |= NV_MSI_X_CAPABLE; | 4186 | np->msi_flags |= NV_MSI_X_CAPABLE; |
3115 | } | 4187 | } |
3116 | 4188 | ||
4189 | np->pause_flags = NV_PAUSEFRAME_RX_CAPABLE | NV_PAUSEFRAME_RX_REQ | NV_PAUSEFRAME_AUTONEG; | ||
4190 | if (id->driver_data & DEV_HAS_PAUSEFRAME_TX) { | ||
4191 | np->pause_flags |= NV_PAUSEFRAME_TX_CAPABLE | NV_PAUSEFRAME_TX_REQ; | ||
4192 | } | ||
4193 | |||
4194 | |||
3117 | err = -ENOMEM; | 4195 | err = -ENOMEM; |
3118 | np->base = ioremap(addr, np->register_size); | 4196 | np->base = ioremap(addr, np->register_size); |
3119 | if (!np->base) | 4197 | if (!np->base) |
@@ -3122,21 +4200,38 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
3122 | 4200 | ||
3123 | dev->irq = pci_dev->irq; | 4201 | dev->irq = pci_dev->irq; |
3124 | 4202 | ||
4203 | np->rx_ring_size = RX_RING_DEFAULT; | ||
4204 | np->tx_ring_size = TX_RING_DEFAULT; | ||
4205 | np->tx_limit_stop = np->tx_ring_size - TX_LIMIT_DIFFERENCE; | ||
4206 | np->tx_limit_start = np->tx_ring_size - TX_LIMIT_DIFFERENCE - 1; | ||
4207 | |||
3125 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { | 4208 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) { |
3126 | np->rx_ring.orig = pci_alloc_consistent(pci_dev, | 4209 | np->rx_ring.orig = pci_alloc_consistent(pci_dev, |
3127 | sizeof(struct ring_desc) * (RX_RING + TX_RING), | 4210 | sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size), |
3128 | &np->ring_addr); | 4211 | &np->ring_addr); |
3129 | if (!np->rx_ring.orig) | 4212 | if (!np->rx_ring.orig) |
3130 | goto out_unmap; | 4213 | goto out_unmap; |
3131 | np->tx_ring.orig = &np->rx_ring.orig[RX_RING]; | 4214 | np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size]; |
3132 | } else { | 4215 | } else { |
3133 | np->rx_ring.ex = pci_alloc_consistent(pci_dev, | 4216 | np->rx_ring.ex = pci_alloc_consistent(pci_dev, |
3134 | sizeof(struct ring_desc_ex) * (RX_RING + TX_RING), | 4217 | sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size), |
3135 | &np->ring_addr); | 4218 | &np->ring_addr); |
3136 | if (!np->rx_ring.ex) | 4219 | if (!np->rx_ring.ex) |
3137 | goto out_unmap; | 4220 | goto out_unmap; |
3138 | np->tx_ring.ex = &np->rx_ring.ex[RX_RING]; | 4221 | np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size]; |
3139 | } | 4222 | } |
4223 | np->rx_skbuff = kmalloc(sizeof(struct sk_buff*) * np->rx_ring_size, GFP_KERNEL); | ||
4224 | np->rx_dma = kmalloc(sizeof(dma_addr_t) * np->rx_ring_size, GFP_KERNEL); | ||
4225 | np->tx_skbuff = kmalloc(sizeof(struct sk_buff*) * np->tx_ring_size, GFP_KERNEL); | ||
4226 | np->tx_dma = kmalloc(sizeof(dma_addr_t) * np->tx_ring_size, GFP_KERNEL); | ||
4227 | np->tx_dma_len = kmalloc(sizeof(unsigned int) * np->tx_ring_size, GFP_KERNEL); | ||
4228 | if (!np->rx_skbuff || !np->rx_dma || !np->tx_skbuff || !np->tx_dma || !np->tx_dma_len) | ||
4229 | goto out_freering; | ||
4230 | memset(np->rx_skbuff, 0, sizeof(struct sk_buff*) * np->rx_ring_size); | ||
4231 | memset(np->rx_dma, 0, sizeof(dma_addr_t) * np->rx_ring_size); | ||
4232 | memset(np->tx_skbuff, 0, sizeof(struct sk_buff*) * np->tx_ring_size); | ||
4233 | memset(np->tx_dma, 0, sizeof(dma_addr_t) * np->tx_ring_size); | ||
4234 | memset(np->tx_dma_len, 0, sizeof(unsigned int) * np->tx_ring_size); | ||
3140 | 4235 | ||
3141 | dev->open = nv_open; | 4236 | dev->open = nv_open; |
3142 | dev->stop = nv_close; | 4237 | dev->stop = nv_close; |
@@ -3258,9 +4353,9 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
3258 | if (i == 33) { | 4353 | if (i == 33) { |
3259 | printk(KERN_INFO "%s: open: Could not find a valid PHY.\n", | 4354 | printk(KERN_INFO "%s: open: Could not find a valid PHY.\n", |
3260 | pci_name(pci_dev)); | 4355 | pci_name(pci_dev)); |
3261 | goto out_freering; | 4356 | goto out_error; |
3262 | } | 4357 | } |
3263 | 4358 | ||
3264 | /* reset it */ | 4359 | /* reset it */ |
3265 | phy_init(dev); | 4360 | phy_init(dev); |
3266 | 4361 | ||
@@ -3272,7 +4367,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
3272 | err = register_netdev(dev); | 4367 | err = register_netdev(dev); |
3273 | if (err) { | 4368 | if (err) { |
3274 | printk(KERN_INFO "forcedeth: unable to register netdev: %d\n", err); | 4369 | printk(KERN_INFO "forcedeth: unable to register netdev: %d\n", err); |
3275 | goto out_freering; | 4370 | goto out_error; |
3276 | } | 4371 | } |
3277 | printk(KERN_INFO "%s: forcedeth.c: subsystem: %05x:%04x bound to %s\n", | 4372 | printk(KERN_INFO "%s: forcedeth.c: subsystem: %05x:%04x bound to %s\n", |
3278 | dev->name, pci_dev->subsystem_vendor, pci_dev->subsystem_device, | 4373 | dev->name, pci_dev->subsystem_vendor, pci_dev->subsystem_device, |
@@ -3280,14 +4375,10 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
3280 | 4375 | ||
3281 | return 0; | 4376 | return 0; |
3282 | 4377 | ||
3283 | out_freering: | 4378 | out_error: |
3284 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) | ||
3285 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING), | ||
3286 | np->rx_ring.orig, np->ring_addr); | ||
3287 | else | ||
3288 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (RX_RING + TX_RING), | ||
3289 | np->rx_ring.ex, np->ring_addr); | ||
3290 | pci_set_drvdata(pci_dev, NULL); | 4379 | pci_set_drvdata(pci_dev, NULL); |
4380 | out_freering: | ||
4381 | free_rings(dev); | ||
3291 | out_unmap: | 4382 | out_unmap: |
3292 | iounmap(get_hwbase(dev)); | 4383 | iounmap(get_hwbase(dev)); |
3293 | out_relreg: | 4384 | out_relreg: |
@@ -3303,15 +4394,11 @@ out: | |||
3303 | static void __devexit nv_remove(struct pci_dev *pci_dev) | 4394 | static void __devexit nv_remove(struct pci_dev *pci_dev) |
3304 | { | 4395 | { |
3305 | struct net_device *dev = pci_get_drvdata(pci_dev); | 4396 | struct net_device *dev = pci_get_drvdata(pci_dev); |
3306 | struct fe_priv *np = netdev_priv(dev); | ||
3307 | 4397 | ||
3308 | unregister_netdev(dev); | 4398 | unregister_netdev(dev); |
3309 | 4399 | ||
3310 | /* free all structures */ | 4400 | /* free all structures */ |
3311 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) | 4401 | free_rings(dev); |
3312 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING), np->rx_ring.orig, np->ring_addr); | ||
3313 | else | ||
3314 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (RX_RING + TX_RING), np->rx_ring.ex, np->ring_addr); | ||
3315 | iounmap(get_hwbase(dev)); | 4402 | iounmap(get_hwbase(dev)); |
3316 | pci_release_regions(pci_dev); | 4403 | pci_release_regions(pci_dev); |
3317 | pci_disable_device(pci_dev); | 4404 | pci_disable_device(pci_dev); |
@@ -3374,11 +4461,43 @@ static struct pci_device_id pci_tbl[] = { | |||
3374 | }, | 4461 | }, |
3375 | { /* MCP55 Ethernet Controller */ | 4462 | { /* MCP55 Ethernet Controller */ |
3376 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14), | 4463 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14), |
3377 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL, | 4464 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED, |
3378 | }, | 4465 | }, |
3379 | { /* MCP55 Ethernet Controller */ | 4466 | { /* MCP55 Ethernet Controller */ |
3380 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15), | 4467 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15), |
3381 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL, | 4468 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED, |
4469 | }, | ||
4470 | { /* MCP61 Ethernet Controller */ | ||
4471 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_16), | ||
4472 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED, | ||
4473 | }, | ||
4474 | { /* MCP61 Ethernet Controller */ | ||
4475 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_17), | ||
4476 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED, | ||
4477 | }, | ||
4478 | { /* MCP61 Ethernet Controller */ | ||
4479 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_18), | ||
4480 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED, | ||
4481 | }, | ||
4482 | { /* MCP61 Ethernet Controller */ | ||
4483 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_19), | ||
4484 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED, | ||
4485 | }, | ||
4486 | { /* MCP65 Ethernet Controller */ | ||
4487 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_20), | ||
4488 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED, | ||
4489 | }, | ||
4490 | { /* MCP65 Ethernet Controller */ | ||
4491 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_21), | ||
4492 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED, | ||
4493 | }, | ||
4494 | { /* MCP65 Ethernet Controller */ | ||
4495 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_22), | ||
4496 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED, | ||
4497 | }, | ||
4498 | { /* MCP65 Ethernet Controller */ | ||
4499 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_23), | ||
4500 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED, | ||
3382 | }, | 4501 | }, |
3383 | {0,}, | 4502 | {0,}, |
3384 | }; | 4503 | }; |
@@ -3408,10 +4527,12 @@ module_param(optimization_mode, int, 0); | |||
3408 | MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer."); | 4527 | MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer."); |
3409 | module_param(poll_interval, int, 0); | 4528 | module_param(poll_interval, int, 0); |
3410 | MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535."); | 4529 | MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535."); |
3411 | module_param(disable_msi, int, 0); | 4530 | module_param(msi, int, 0); |
3412 | MODULE_PARM_DESC(disable_msi, "Disable MSI interrupts by setting to 1."); | 4531 | MODULE_PARM_DESC(msi, "MSI interrupts are enabled by setting to 1 and disabled by setting to 0."); |
3413 | module_param(disable_msix, int, 0); | 4532 | module_param(msix, int, 0); |
3414 | MODULE_PARM_DESC(disable_msix, "Disable MSIX interrupts by setting to 1."); | 4533 | MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0."); |
4534 | module_param(dma_64bit, int, 0); | ||
4535 | MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0."); | ||
3415 | 4536 | ||
3416 | MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>"); | 4537 | MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>"); |
3417 | MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver"); | 4538 | MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver"); |
diff --git a/drivers/net/hamradio/6pack.c b/drivers/net/hamradio/6pack.c index 102c1f0b90da..d12605f0ac7c 100644 --- a/drivers/net/hamradio/6pack.c +++ b/drivers/net/hamradio/6pack.c | |||
@@ -308,9 +308,9 @@ static int sp_set_mac_address(struct net_device *dev, void *addr) | |||
308 | { | 308 | { |
309 | struct sockaddr_ax25 *sa = addr; | 309 | struct sockaddr_ax25 *sa = addr; |
310 | 310 | ||
311 | spin_lock_irq(&dev->xmit_lock); | 311 | netif_tx_lock_bh(dev); |
312 | memcpy(dev->dev_addr, &sa->sax25_call, AX25_ADDR_LEN); | 312 | memcpy(dev->dev_addr, &sa->sax25_call, AX25_ADDR_LEN); |
313 | spin_unlock_irq(&dev->xmit_lock); | 313 | netif_tx_unlock_bh(dev); |
314 | 314 | ||
315 | return 0; | 315 | return 0; |
316 | } | 316 | } |
@@ -767,9 +767,9 @@ static int sixpack_ioctl(struct tty_struct *tty, struct file *file, | |||
767 | break; | 767 | break; |
768 | } | 768 | } |
769 | 769 | ||
770 | spin_lock_irq(&dev->xmit_lock); | 770 | netif_tx_lock_bh(dev); |
771 | memcpy(dev->dev_addr, &addr, AX25_ADDR_LEN); | 771 | memcpy(dev->dev_addr, &addr, AX25_ADDR_LEN); |
772 | spin_unlock_irq(&dev->xmit_lock); | 772 | netif_tx_unlock_bh(dev); |
773 | 773 | ||
774 | err = 0; | 774 | err = 0; |
775 | break; | 775 | break; |
diff --git a/drivers/net/hamradio/mkiss.c b/drivers/net/hamradio/mkiss.c index d81a8e1eeb8d..3ebbbe56b6e9 100644 --- a/drivers/net/hamradio/mkiss.c +++ b/drivers/net/hamradio/mkiss.c | |||
@@ -357,9 +357,9 @@ static int ax_set_mac_address(struct net_device *dev, void *addr) | |||
357 | { | 357 | { |
358 | struct sockaddr_ax25 *sa = addr; | 358 | struct sockaddr_ax25 *sa = addr; |
359 | 359 | ||
360 | spin_lock_irq(&dev->xmit_lock); | 360 | netif_tx_lock_bh(dev); |
361 | memcpy(dev->dev_addr, &sa->sax25_call, AX25_ADDR_LEN); | 361 | memcpy(dev->dev_addr, &sa->sax25_call, AX25_ADDR_LEN); |
362 | spin_unlock_irq(&dev->xmit_lock); | 362 | netif_tx_unlock_bh(dev); |
363 | 363 | ||
364 | return 0; | 364 | return 0; |
365 | } | 365 | } |
@@ -886,9 +886,9 @@ static int mkiss_ioctl(struct tty_struct *tty, struct file *file, | |||
886 | break; | 886 | break; |
887 | } | 887 | } |
888 | 888 | ||
889 | spin_lock_irq(&dev->xmit_lock); | 889 | netif_tx_lock_bh(dev); |
890 | memcpy(dev->dev_addr, addr, AX25_ADDR_LEN); | 890 | memcpy(dev->dev_addr, addr, AX25_ADDR_LEN); |
891 | spin_unlock_irq(&dev->xmit_lock); | 891 | netif_tx_unlock_bh(dev); |
892 | 892 | ||
893 | err = 0; | 893 | err = 0; |
894 | break; | 894 | break; |
diff --git a/drivers/net/hp-plus.c b/drivers/net/hp-plus.c index 0d7a6250e346..e26a3e407d70 100644 --- a/drivers/net/hp-plus.c +++ b/drivers/net/hp-plus.c | |||
@@ -446,7 +446,7 @@ MODULE_LICENSE("GPL"); | |||
446 | 446 | ||
447 | /* This is set up so that only a single autoprobe takes place per call. | 447 | /* This is set up so that only a single autoprobe takes place per call. |
448 | ISA device autoprobes on a running machine are not recommended. */ | 448 | ISA device autoprobes on a running machine are not recommended. */ |
449 | int | 449 | int __init |
450 | init_module(void) | 450 | init_module(void) |
451 | { | 451 | { |
452 | struct net_device *dev; | 452 | struct net_device *dev; |
diff --git a/drivers/net/hp.c b/drivers/net/hp.c index cf9fb3698a6b..551a71b3c5fd 100644 --- a/drivers/net/hp.c +++ b/drivers/net/hp.c | |||
@@ -384,7 +384,7 @@ hp_block_output(struct net_device *dev, int count, | |||
384 | } | 384 | } |
385 | 385 | ||
386 | /* This function resets the ethercard if something screws up. */ | 386 | /* This function resets the ethercard if something screws up. */ |
387 | static void | 387 | static void __init |
388 | hp_init_card(struct net_device *dev) | 388 | hp_init_card(struct net_device *dev) |
389 | { | 389 | { |
390 | int irq = dev->irq; | 390 | int irq = dev->irq; |
@@ -409,7 +409,7 @@ MODULE_LICENSE("GPL"); | |||
409 | 409 | ||
410 | /* This is set up so that only a single autoprobe takes place per call. | 410 | /* This is set up so that only a single autoprobe takes place per call. |
411 | ISA device autoprobes on a running machine are not recommended. */ | 411 | ISA device autoprobes on a running machine are not recommended. */ |
412 | int | 412 | int __init |
413 | init_module(void) | 413 | init_module(void) |
414 | { | 414 | { |
415 | struct net_device *dev; | 415 | struct net_device *dev; |
diff --git a/drivers/net/ibmlana.c b/drivers/net/ibmlana.c index 01ad904215a1..51fd51609ea9 100644 --- a/drivers/net/ibmlana.c +++ b/drivers/net/ibmlana.c | |||
@@ -1,4 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | net-3-driver for the IBM LAN Adapter/A | 2 | net-3-driver for the IBM LAN Adapter/A |
3 | 3 | ||
4 | This is an extension to the Linux operating system, and is covered by the | 4 | This is an extension to the Linux operating system, and is covered by the |
@@ -11,9 +11,9 @@ This driver is based both on the SK_MCA driver, which is itself based on the | |||
11 | SK_G16 and 3C523 driver. | 11 | SK_G16 and 3C523 driver. |
12 | 12 | ||
13 | paper sources: | 13 | paper sources: |
14 | 'PC Hardware: Aufbau, Funktionsweise, Programmierung' by | 14 | 'PC Hardware: Aufbau, Funktionsweise, Programmierung' by |
15 | Hans-Peter Messmer for the basic Microchannel stuff | 15 | Hans-Peter Messmer for the basic Microchannel stuff |
16 | 16 | ||
17 | 'Linux Geraetetreiber' by Allesandro Rubini, Kalle Dalheimer | 17 | 'Linux Geraetetreiber' by Allesandro Rubini, Kalle Dalheimer |
18 | for help on Ethernet driver programming | 18 | for help on Ethernet driver programming |
19 | 19 | ||
@@ -27,14 +27,14 @@ paper sources: | |||
27 | 27 | ||
28 | special acknowledgements to: | 28 | special acknowledgements to: |
29 | - Bob Eager for helping me out with documentation from IBM | 29 | - Bob Eager for helping me out with documentation from IBM |
30 | - Jim Shorney for his endless patience with me while I was using | 30 | - Jim Shorney for his endless patience with me while I was using |
31 | him as a beta tester to trace down the address filter bug ;-) | 31 | him as a beta tester to trace down the address filter bug ;-) |
32 | 32 | ||
33 | Missing things: | 33 | Missing things: |
34 | 34 | ||
35 | -> set debug level via ioctl instead of compile-time switches | 35 | -> set debug level via ioctl instead of compile-time switches |
36 | -> I didn't follow the development of the 2.1.x kernels, so my | 36 | -> I didn't follow the development of the 2.1.x kernels, so my |
37 | assumptions about which things changed with which kernel version | 37 | assumptions about which things changed with which kernel version |
38 | are probably nonsense | 38 | are probably nonsense |
39 | 39 | ||
40 | History: | 40 | History: |
@@ -275,7 +275,7 @@ static void InitDscrs(struct net_device *dev) | |||
275 | priv->rrastart = raddr = priv->txbufstart + (TXBUFCNT * PKTSIZE); | 275 | priv->rrastart = raddr = priv->txbufstart + (TXBUFCNT * PKTSIZE); |
276 | priv->rdastart = addr = priv->rrastart + (priv->rxbufcnt * sizeof(rra_t)); | 276 | priv->rdastart = addr = priv->rrastart + (priv->rxbufcnt * sizeof(rra_t)); |
277 | priv->rxbufstart = baddr = priv->rdastart + (priv->rxbufcnt * sizeof(rda_t)); | 277 | priv->rxbufstart = baddr = priv->rdastart + (priv->rxbufcnt * sizeof(rda_t)); |
278 | 278 | ||
279 | for (z = 0; z < priv->rxbufcnt; z++) { | 279 | for (z = 0; z < priv->rxbufcnt; z++) { |
280 | rra.startlo = baddr; | 280 | rra.startlo = baddr; |
281 | rra.starthi = 0; | 281 | rra.starthi = 0; |
@@ -570,7 +570,7 @@ static void irqrx_handler(struct net_device *dev) | |||
570 | lrdaaddr = priv->rdastart + (priv->lastrxdescr * sizeof(rda_t)); | 570 | lrdaaddr = priv->rdastart + (priv->lastrxdescr * sizeof(rda_t)); |
571 | memcpy_fromio(&rda, priv->base + rdaaddr, sizeof(rda_t)); | 571 | memcpy_fromio(&rda, priv->base + rdaaddr, sizeof(rda_t)); |
572 | 572 | ||
573 | /* iron out upper word halves of fields we use - SONIC will duplicate | 573 | /* iron out upper word halves of fields we use - SONIC will duplicate |
574 | bits 0..15 to 16..31 */ | 574 | bits 0..15 to 16..31 */ |
575 | 575 | ||
576 | rda.status &= 0xffff; | 576 | rda.status &= 0xffff; |
@@ -836,9 +836,9 @@ static int ibmlana_tx(struct sk_buff *skb, struct net_device *dev) | |||
836 | baddr = priv->txbufstart + (priv->nexttxdescr * PKTSIZE); | 836 | baddr = priv->txbufstart + (priv->nexttxdescr * PKTSIZE); |
837 | memcpy_toio(priv->base + baddr, skb->data, skb->len); | 837 | memcpy_toio(priv->base + baddr, skb->data, skb->len); |
838 | 838 | ||
839 | /* copy filler into RAM - in case we're filling up... | 839 | /* copy filler into RAM - in case we're filling up... |
840 | we're filling a bit more than necessary, but that doesn't harm | 840 | we're filling a bit more than necessary, but that doesn't harm |
841 | since the buffer is far larger... | 841 | since the buffer is far larger... |
842 | Sorry Linus for the filler string but I couldn't resist ;-) */ | 842 | Sorry Linus for the filler string but I couldn't resist ;-) */ |
843 | 843 | ||
844 | if (tmplen > skb->len) { | 844 | if (tmplen > skb->len) { |
@@ -952,7 +952,7 @@ static int ibmlana_probe(struct net_device *dev) | |||
952 | priv->realirq = irq; | 952 | priv->realirq = irq; |
953 | priv->medium = medium; | 953 | priv->medium = medium; |
954 | spin_lock_init(&priv->lock); | 954 | spin_lock_init(&priv->lock); |
955 | 955 | ||
956 | 956 | ||
957 | /* set base + irq for this device (irq not allocated so far) */ | 957 | /* set base + irq for this device (irq not allocated so far) */ |
958 | 958 | ||
diff --git a/drivers/net/ibmlana.h b/drivers/net/ibmlana.h index 458ee226e537..6b58bab9e308 100644 --- a/drivers/net/ibmlana.h +++ b/drivers/net/ibmlana.h | |||
@@ -17,7 +17,7 @@ | |||
17 | /* media enumeration - defined in a way that it fits onto the LAN/A's | 17 | /* media enumeration - defined in a way that it fits onto the LAN/A's |
18 | POS registers... */ | 18 | POS registers... */ |
19 | 19 | ||
20 | typedef enum { | 20 | typedef enum { |
21 | Media_10BaseT, Media_10Base5, | 21 | Media_10BaseT, Media_10Base5, |
22 | Media_Unknown, Media_10Base2, Media_Count | 22 | Media_Unknown, Media_10Base2, Media_Count |
23 | } ibmlana_medium; | 23 | } ibmlana_medium; |
@@ -27,7 +27,7 @@ typedef enum { | |||
27 | typedef struct { | 27 | typedef struct { |
28 | unsigned int slot; /* MCA-Slot-# */ | 28 | unsigned int slot; /* MCA-Slot-# */ |
29 | struct net_device_stats stat; /* packet statistics */ | 29 | struct net_device_stats stat; /* packet statistics */ |
30 | int realirq; /* memorizes actual IRQ, even when | 30 | int realirq; /* memorizes actual IRQ, even when |
31 | currently not allocated */ | 31 | currently not allocated */ |
32 | ibmlana_medium medium; /* physical cannector */ | 32 | ibmlana_medium medium; /* physical cannector */ |
33 | u32 tdastart, txbufstart, /* addresses */ | 33 | u32 tdastart, txbufstart, /* addresses */ |
@@ -41,7 +41,7 @@ typedef struct { | |||
41 | spinlock_t lock; | 41 | spinlock_t lock; |
42 | } ibmlana_priv; | 42 | } ibmlana_priv; |
43 | 43 | ||
44 | /* this card uses quite a lot of I/O ports...luckily the MCA bus decodes | 44 | /* this card uses quite a lot of I/O ports...luckily the MCA bus decodes |
45 | a full 64K I/O range... */ | 45 | a full 64K I/O range... */ |
46 | 46 | ||
47 | #define IBM_LANA_IORANGE 0xa0 | 47 | #define IBM_LANA_IORANGE 0xa0 |
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c index 52d01027d9e7..666346f6469e 100644 --- a/drivers/net/ibmveth.c +++ b/drivers/net/ibmveth.c | |||
@@ -24,7 +24,7 @@ | |||
24 | /* for use with IBM i/pSeries LPAR Linux. It utilizes the logical LAN */ | 24 | /* for use with IBM i/pSeries LPAR Linux. It utilizes the logical LAN */ |
25 | /* option of the RS/6000 Platform Architechture to interface with virtual */ | 25 | /* option of the RS/6000 Platform Architechture to interface with virtual */ |
26 | /* ethernet NICs that are presented to the partition by the hypervisor. */ | 26 | /* ethernet NICs that are presented to the partition by the hypervisor. */ |
27 | /* */ | 27 | /* */ |
28 | /**************************************************************************/ | 28 | /**************************************************************************/ |
29 | /* | 29 | /* |
30 | TODO: | 30 | TODO: |
@@ -79,7 +79,7 @@ | |||
79 | #else | 79 | #else |
80 | #define ibmveth_debug_printk_no_adapter(fmt, args...) | 80 | #define ibmveth_debug_printk_no_adapter(fmt, args...) |
81 | #define ibmveth_debug_printk(fmt, args...) | 81 | #define ibmveth_debug_printk(fmt, args...) |
82 | #define ibmveth_assert(expr) | 82 | #define ibmveth_assert(expr) |
83 | #endif | 83 | #endif |
84 | 84 | ||
85 | static int ibmveth_open(struct net_device *dev); | 85 | static int ibmveth_open(struct net_device *dev); |
@@ -96,6 +96,7 @@ static void ibmveth_proc_register_adapter(struct ibmveth_adapter *adapter); | |||
96 | static void ibmveth_proc_unregister_adapter(struct ibmveth_adapter *adapter); | 96 | static void ibmveth_proc_unregister_adapter(struct ibmveth_adapter *adapter); |
97 | static irqreturn_t ibmveth_interrupt(int irq, void *dev_instance, struct pt_regs *regs); | 97 | static irqreturn_t ibmveth_interrupt(int irq, void *dev_instance, struct pt_regs *regs); |
98 | static inline void ibmveth_rxq_harvest_buffer(struct ibmveth_adapter *adapter); | 98 | static inline void ibmveth_rxq_harvest_buffer(struct ibmveth_adapter *adapter); |
99 | static struct kobj_type ktype_veth_pool; | ||
99 | 100 | ||
100 | #ifdef CONFIG_PROC_FS | 101 | #ifdef CONFIG_PROC_FS |
101 | #define IBMVETH_PROC_DIR "net/ibmveth" | 102 | #define IBMVETH_PROC_DIR "net/ibmveth" |
@@ -133,12 +134,13 @@ static inline int ibmveth_rxq_frame_length(struct ibmveth_adapter *adapter) | |||
133 | } | 134 | } |
134 | 135 | ||
135 | /* setup the initial settings for a buffer pool */ | 136 | /* setup the initial settings for a buffer pool */ |
136 | static void ibmveth_init_buffer_pool(struct ibmveth_buff_pool *pool, u32 pool_index, u32 pool_size, u32 buff_size) | 137 | static void ibmveth_init_buffer_pool(struct ibmveth_buff_pool *pool, u32 pool_index, u32 pool_size, u32 buff_size, u32 pool_active) |
137 | { | 138 | { |
138 | pool->size = pool_size; | 139 | pool->size = pool_size; |
139 | pool->index = pool_index; | 140 | pool->index = pool_index; |
140 | pool->buff_size = buff_size; | 141 | pool->buff_size = buff_size; |
141 | pool->threshold = pool_size / 2; | 142 | pool->threshold = pool_size / 2; |
143 | pool->active = pool_active; | ||
142 | } | 144 | } |
143 | 145 | ||
144 | /* allocate and setup an buffer pool - called during open */ | 146 | /* allocate and setup an buffer pool - called during open */ |
@@ -146,13 +148,13 @@ static int ibmveth_alloc_buffer_pool(struct ibmveth_buff_pool *pool) | |||
146 | { | 148 | { |
147 | int i; | 149 | int i; |
148 | 150 | ||
149 | pool->free_map = kmalloc(sizeof(u16) * pool->size, GFP_KERNEL); | 151 | pool->free_map = kmalloc(sizeof(u16) * pool->size, GFP_KERNEL); |
150 | 152 | ||
151 | if(!pool->free_map) { | 153 | if(!pool->free_map) { |
152 | return -1; | 154 | return -1; |
153 | } | 155 | } |
154 | 156 | ||
155 | pool->dma_addr = kmalloc(sizeof(dma_addr_t) * pool->size, GFP_KERNEL); | 157 | pool->dma_addr = kmalloc(sizeof(dma_addr_t) * pool->size, GFP_KERNEL); |
156 | if(!pool->dma_addr) { | 158 | if(!pool->dma_addr) { |
157 | kfree(pool->free_map); | 159 | kfree(pool->free_map); |
158 | pool->free_map = NULL; | 160 | pool->free_map = NULL; |
@@ -180,7 +182,6 @@ static int ibmveth_alloc_buffer_pool(struct ibmveth_buff_pool *pool) | |||
180 | atomic_set(&pool->available, 0); | 182 | atomic_set(&pool->available, 0); |
181 | pool->producer_index = 0; | 183 | pool->producer_index = 0; |
182 | pool->consumer_index = 0; | 184 | pool->consumer_index = 0; |
183 | pool->active = 0; | ||
184 | 185 | ||
185 | return 0; | 186 | return 0; |
186 | } | 187 | } |
@@ -214,7 +215,7 @@ static void ibmveth_replenish_buffer_pool(struct ibmveth_adapter *adapter, struc | |||
214 | 215 | ||
215 | free_index = pool->consumer_index++ % pool->size; | 216 | free_index = pool->consumer_index++ % pool->size; |
216 | index = pool->free_map[free_index]; | 217 | index = pool->free_map[free_index]; |
217 | 218 | ||
218 | ibmveth_assert(index != IBM_VETH_INVALID_MAP); | 219 | ibmveth_assert(index != IBM_VETH_INVALID_MAP); |
219 | ibmveth_assert(pool->skbuff[index] == NULL); | 220 | ibmveth_assert(pool->skbuff[index] == NULL); |
220 | 221 | ||
@@ -231,10 +232,10 @@ static void ibmveth_replenish_buffer_pool(struct ibmveth_adapter *adapter, struc | |||
231 | desc.desc = 0; | 232 | desc.desc = 0; |
232 | desc.fields.valid = 1; | 233 | desc.fields.valid = 1; |
233 | desc.fields.length = pool->buff_size; | 234 | desc.fields.length = pool->buff_size; |
234 | desc.fields.address = dma_addr; | 235 | desc.fields.address = dma_addr; |
235 | 236 | ||
236 | lpar_rc = h_add_logical_lan_buffer(adapter->vdev->unit_address, desc.desc); | 237 | lpar_rc = h_add_logical_lan_buffer(adapter->vdev->unit_address, desc.desc); |
237 | 238 | ||
238 | if(lpar_rc != H_SUCCESS) { | 239 | if(lpar_rc != H_SUCCESS) { |
239 | pool->free_map[free_index] = index; | 240 | pool->free_map[free_index] = index; |
240 | pool->skbuff[index] = NULL; | 241 | pool->skbuff[index] = NULL; |
@@ -250,13 +251,13 @@ static void ibmveth_replenish_buffer_pool(struct ibmveth_adapter *adapter, struc | |||
250 | adapter->replenish_add_buff_success++; | 251 | adapter->replenish_add_buff_success++; |
251 | } | 252 | } |
252 | } | 253 | } |
253 | 254 | ||
254 | mb(); | 255 | mb(); |
255 | atomic_add(buffers_added, &(pool->available)); | 256 | atomic_add(buffers_added, &(pool->available)); |
256 | } | 257 | } |
257 | 258 | ||
258 | /* replenish routine */ | 259 | /* replenish routine */ |
259 | static void ibmveth_replenish_task(struct ibmveth_adapter *adapter) | 260 | static void ibmveth_replenish_task(struct ibmveth_adapter *adapter) |
260 | { | 261 | { |
261 | int i; | 262 | int i; |
262 | 263 | ||
@@ -264,7 +265,7 @@ static void ibmveth_replenish_task(struct ibmveth_adapter *adapter) | |||
264 | 265 | ||
265 | for(i = 0; i < IbmVethNumBufferPools; i++) | 266 | for(i = 0; i < IbmVethNumBufferPools; i++) |
266 | if(adapter->rx_buff_pool[i].active) | 267 | if(adapter->rx_buff_pool[i].active) |
267 | ibmveth_replenish_buffer_pool(adapter, | 268 | ibmveth_replenish_buffer_pool(adapter, |
268 | &adapter->rx_buff_pool[i]); | 269 | &adapter->rx_buff_pool[i]); |
269 | 270 | ||
270 | adapter->rx_no_buffer = *(u64*)(((char*)adapter->buffer_list_addr) + 4096 - 8); | 271 | adapter->rx_no_buffer = *(u64*)(((char*)adapter->buffer_list_addr) + 4096 - 8); |
@@ -301,7 +302,6 @@ static void ibmveth_free_buffer_pool(struct ibmveth_adapter *adapter, struct ibm | |||
301 | kfree(pool->skbuff); | 302 | kfree(pool->skbuff); |
302 | pool->skbuff = NULL; | 303 | pool->skbuff = NULL; |
303 | } | 304 | } |
304 | pool->active = 0; | ||
305 | } | 305 | } |
306 | 306 | ||
307 | /* remove a buffer from a pool */ | 307 | /* remove a buffer from a pool */ |
@@ -372,7 +372,7 @@ static void ibmveth_rxq_recycle_buffer(struct ibmveth_adapter *adapter) | |||
372 | desc.fields.address = adapter->rx_buff_pool[pool].dma_addr[index]; | 372 | desc.fields.address = adapter->rx_buff_pool[pool].dma_addr[index]; |
373 | 373 | ||
374 | lpar_rc = h_add_logical_lan_buffer(adapter->vdev->unit_address, desc.desc); | 374 | lpar_rc = h_add_logical_lan_buffer(adapter->vdev->unit_address, desc.desc); |
375 | 375 | ||
376 | if(lpar_rc != H_SUCCESS) { | 376 | if(lpar_rc != H_SUCCESS) { |
377 | ibmveth_debug_printk("h_add_logical_lan_buffer failed during recycle rc=%ld", lpar_rc); | 377 | ibmveth_debug_printk("h_add_logical_lan_buffer failed during recycle rc=%ld", lpar_rc); |
378 | ibmveth_remove_buffer_from_pool(adapter, adapter->rx_queue.queue_addr[adapter->rx_queue.index].correlator); | 378 | ibmveth_remove_buffer_from_pool(adapter, adapter->rx_queue.queue_addr[adapter->rx_queue.index].correlator); |
@@ -407,7 +407,7 @@ static void ibmveth_cleanup(struct ibmveth_adapter *adapter) | |||
407 | } | 407 | } |
408 | free_page((unsigned long)adapter->buffer_list_addr); | 408 | free_page((unsigned long)adapter->buffer_list_addr); |
409 | adapter->buffer_list_addr = NULL; | 409 | adapter->buffer_list_addr = NULL; |
410 | } | 410 | } |
411 | 411 | ||
412 | if(adapter->filter_list_addr != NULL) { | 412 | if(adapter->filter_list_addr != NULL) { |
413 | if(!dma_mapping_error(adapter->filter_list_dma)) { | 413 | if(!dma_mapping_error(adapter->filter_list_dma)) { |
@@ -433,7 +433,9 @@ static void ibmveth_cleanup(struct ibmveth_adapter *adapter) | |||
433 | } | 433 | } |
434 | 434 | ||
435 | for(i = 0; i<IbmVethNumBufferPools; i++) | 435 | for(i = 0; i<IbmVethNumBufferPools; i++) |
436 | ibmveth_free_buffer_pool(adapter, &adapter->rx_buff_pool[i]); | 436 | if (adapter->rx_buff_pool[i].active) |
437 | ibmveth_free_buffer_pool(adapter, | ||
438 | &adapter->rx_buff_pool[i]); | ||
437 | } | 439 | } |
438 | 440 | ||
439 | static int ibmveth_open(struct net_device *netdev) | 441 | static int ibmveth_open(struct net_device *netdev) |
@@ -450,10 +452,10 @@ static int ibmveth_open(struct net_device *netdev) | |||
450 | 452 | ||
451 | for(i = 0; i<IbmVethNumBufferPools; i++) | 453 | for(i = 0; i<IbmVethNumBufferPools; i++) |
452 | rxq_entries += adapter->rx_buff_pool[i].size; | 454 | rxq_entries += adapter->rx_buff_pool[i].size; |
453 | 455 | ||
454 | adapter->buffer_list_addr = (void*) get_zeroed_page(GFP_KERNEL); | 456 | adapter->buffer_list_addr = (void*) get_zeroed_page(GFP_KERNEL); |
455 | adapter->filter_list_addr = (void*) get_zeroed_page(GFP_KERNEL); | 457 | adapter->filter_list_addr = (void*) get_zeroed_page(GFP_KERNEL); |
456 | 458 | ||
457 | if(!adapter->buffer_list_addr || !adapter->filter_list_addr) { | 459 | if(!adapter->buffer_list_addr || !adapter->filter_list_addr) { |
458 | ibmveth_error_printk("unable to allocate filter or buffer list pages\n"); | 460 | ibmveth_error_printk("unable to allocate filter or buffer list pages\n"); |
459 | ibmveth_cleanup(adapter); | 461 | ibmveth_cleanup(adapter); |
@@ -489,9 +491,6 @@ static int ibmveth_open(struct net_device *netdev) | |||
489 | adapter->rx_queue.num_slots = rxq_entries; | 491 | adapter->rx_queue.num_slots = rxq_entries; |
490 | adapter->rx_queue.toggle = 1; | 492 | adapter->rx_queue.toggle = 1; |
491 | 493 | ||
492 | /* call change_mtu to init the buffer pools based in initial mtu */ | ||
493 | ibmveth_change_mtu(netdev, netdev->mtu); | ||
494 | |||
495 | memcpy(&mac_address, netdev->dev_addr, netdev->addr_len); | 494 | memcpy(&mac_address, netdev->dev_addr, netdev->addr_len); |
496 | mac_address = mac_address >> 16; | 495 | mac_address = mac_address >> 16; |
497 | 496 | ||
@@ -504,7 +503,7 @@ static int ibmveth_open(struct net_device *netdev) | |||
504 | ibmveth_debug_printk("filter list @ 0x%p\n", adapter->filter_list_addr); | 503 | ibmveth_debug_printk("filter list @ 0x%p\n", adapter->filter_list_addr); |
505 | ibmveth_debug_printk("receive q @ 0x%p\n", adapter->rx_queue.queue_addr); | 504 | ibmveth_debug_printk("receive q @ 0x%p\n", adapter->rx_queue.queue_addr); |
506 | 505 | ||
507 | 506 | ||
508 | lpar_rc = h_register_logical_lan(adapter->vdev->unit_address, | 507 | lpar_rc = h_register_logical_lan(adapter->vdev->unit_address, |
509 | adapter->buffer_list_dma, | 508 | adapter->buffer_list_dma, |
510 | rxq_desc.desc, | 509 | rxq_desc.desc, |
@@ -519,7 +518,18 @@ static int ibmveth_open(struct net_device *netdev) | |||
519 | rxq_desc.desc, | 518 | rxq_desc.desc, |
520 | mac_address); | 519 | mac_address); |
521 | ibmveth_cleanup(adapter); | 520 | ibmveth_cleanup(adapter); |
522 | return -ENONET; | 521 | return -ENONET; |
522 | } | ||
523 | |||
524 | for(i = 0; i<IbmVethNumBufferPools; i++) { | ||
525 | if(!adapter->rx_buff_pool[i].active) | ||
526 | continue; | ||
527 | if (ibmveth_alloc_buffer_pool(&adapter->rx_buff_pool[i])) { | ||
528 | ibmveth_error_printk("unable to alloc pool\n"); | ||
529 | adapter->rx_buff_pool[i].active = 0; | ||
530 | ibmveth_cleanup(adapter); | ||
531 | return -ENOMEM ; | ||
532 | } | ||
523 | } | 533 | } |
524 | 534 | ||
525 | ibmveth_debug_printk("registering irq 0x%x\n", netdev->irq); | 535 | ibmveth_debug_printk("registering irq 0x%x\n", netdev->irq); |
@@ -547,10 +557,11 @@ static int ibmveth_close(struct net_device *netdev) | |||
547 | { | 557 | { |
548 | struct ibmveth_adapter *adapter = netdev->priv; | 558 | struct ibmveth_adapter *adapter = netdev->priv; |
549 | long lpar_rc; | 559 | long lpar_rc; |
550 | 560 | ||
551 | ibmveth_debug_printk("close starting\n"); | 561 | ibmveth_debug_printk("close starting\n"); |
552 | 562 | ||
553 | netif_stop_queue(netdev); | 563 | if (!adapter->pool_config) |
564 | netif_stop_queue(netdev); | ||
554 | 565 | ||
555 | free_irq(netdev->irq, netdev); | 566 | free_irq(netdev->irq, netdev); |
556 | 567 | ||
@@ -694,7 +705,7 @@ static int ibmveth_start_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
694 | desc[5].desc, | 705 | desc[5].desc, |
695 | correlator); | 706 | correlator); |
696 | } while ((lpar_rc == H_BUSY) && (retry_count--)); | 707 | } while ((lpar_rc == H_BUSY) && (retry_count--)); |
697 | 708 | ||
698 | if(lpar_rc != H_SUCCESS && lpar_rc != H_DROPPED) { | 709 | if(lpar_rc != H_SUCCESS && lpar_rc != H_DROPPED) { |
699 | int i; | 710 | int i; |
700 | ibmveth_error_printk("tx: h_send_logical_lan failed with rc=%ld\n", lpar_rc); | 711 | ibmveth_error_printk("tx: h_send_logical_lan failed with rc=%ld\n", lpar_rc); |
@@ -780,7 +791,7 @@ static int ibmveth_poll(struct net_device *netdev, int *budget) | |||
780 | /* more work to do - return that we are not done yet */ | 791 | /* more work to do - return that we are not done yet */ |
781 | netdev->quota -= frames_processed; | 792 | netdev->quota -= frames_processed; |
782 | *budget -= frames_processed; | 793 | *budget -= frames_processed; |
783 | return 1; | 794 | return 1; |
784 | } | 795 | } |
785 | 796 | ||
786 | /* we think we are done - reenable interrupts, then check once more to make sure we are done */ | 797 | /* we think we are done - reenable interrupts, then check once more to make sure we are done */ |
@@ -806,7 +817,7 @@ static int ibmveth_poll(struct net_device *netdev, int *budget) | |||
806 | } | 817 | } |
807 | 818 | ||
808 | static irqreturn_t ibmveth_interrupt(int irq, void *dev_instance, struct pt_regs *regs) | 819 | static irqreturn_t ibmveth_interrupt(int irq, void *dev_instance, struct pt_regs *regs) |
809 | { | 820 | { |
810 | struct net_device *netdev = dev_instance; | 821 | struct net_device *netdev = dev_instance; |
811 | struct ibmveth_adapter *adapter = netdev->priv; | 822 | struct ibmveth_adapter *adapter = netdev->priv; |
812 | unsigned long lpar_rc; | 823 | unsigned long lpar_rc; |
@@ -862,7 +873,7 @@ static void ibmveth_set_multicast_list(struct net_device *netdev) | |||
862 | ibmveth_error_printk("h_multicast_ctrl rc=%ld when adding an entry to the filter table\n", lpar_rc); | 873 | ibmveth_error_printk("h_multicast_ctrl rc=%ld when adding an entry to the filter table\n", lpar_rc); |
863 | } | 874 | } |
864 | } | 875 | } |
865 | 876 | ||
866 | /* re-enable filtering */ | 877 | /* re-enable filtering */ |
867 | lpar_rc = h_multicast_ctrl(adapter->vdev->unit_address, | 878 | lpar_rc = h_multicast_ctrl(adapter->vdev->unit_address, |
868 | IbmVethMcastEnableFiltering, | 879 | IbmVethMcastEnableFiltering, |
@@ -876,46 +887,22 @@ static void ibmveth_set_multicast_list(struct net_device *netdev) | |||
876 | static int ibmveth_change_mtu(struct net_device *dev, int new_mtu) | 887 | static int ibmveth_change_mtu(struct net_device *dev, int new_mtu) |
877 | { | 888 | { |
878 | struct ibmveth_adapter *adapter = dev->priv; | 889 | struct ibmveth_adapter *adapter = dev->priv; |
890 | int new_mtu_oh = new_mtu + IBMVETH_BUFF_OH; | ||
879 | int i; | 891 | int i; |
880 | int prev_smaller = 1; | ||
881 | 892 | ||
882 | if ((new_mtu < 68) || | 893 | if (new_mtu < IBMVETH_MAX_MTU) |
883 | (new_mtu > (pool_size[IbmVethNumBufferPools-1]) - IBMVETH_BUFF_OH)) | ||
884 | return -EINVAL; | 894 | return -EINVAL; |
885 | 895 | ||
896 | /* Look for an active buffer pool that can hold the new MTU */ | ||
886 | for(i = 0; i<IbmVethNumBufferPools; i++) { | 897 | for(i = 0; i<IbmVethNumBufferPools; i++) { |
887 | int activate = 0; | 898 | if (!adapter->rx_buff_pool[i].active) |
888 | if (new_mtu > (pool_size[i] - IBMVETH_BUFF_OH)) { | 899 | continue; |
889 | activate = 1; | 900 | if (new_mtu_oh < adapter->rx_buff_pool[i].buff_size) { |
890 | prev_smaller= 1; | 901 | dev->mtu = new_mtu; |
891 | } else { | 902 | return 0; |
892 | if (prev_smaller) | ||
893 | activate = 1; | ||
894 | prev_smaller= 0; | ||
895 | } | 903 | } |
896 | |||
897 | if (activate && !adapter->rx_buff_pool[i].active) { | ||
898 | struct ibmveth_buff_pool *pool = | ||
899 | &adapter->rx_buff_pool[i]; | ||
900 | if(ibmveth_alloc_buffer_pool(pool)) { | ||
901 | ibmveth_error_printk("unable to alloc pool\n"); | ||
902 | return -ENOMEM; | ||
903 | } | ||
904 | adapter->rx_buff_pool[i].active = 1; | ||
905 | } else if (!activate && adapter->rx_buff_pool[i].active) { | ||
906 | adapter->rx_buff_pool[i].active = 0; | ||
907 | h_free_logical_lan_buffer(adapter->vdev->unit_address, | ||
908 | (u64)pool_size[i]); | ||
909 | } | ||
910 | |||
911 | } | 904 | } |
912 | 905 | return -EINVAL; | |
913 | /* kick the interrupt handler so that the new buffer pools get | ||
914 | replenished or deallocated */ | ||
915 | ibmveth_interrupt(dev->irq, dev, NULL); | ||
916 | |||
917 | dev->mtu = new_mtu; | ||
918 | return 0; | ||
919 | } | 906 | } |
920 | 907 | ||
921 | static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id) | 908 | static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id) |
@@ -928,7 +915,7 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_ | |||
928 | unsigned int *mcastFilterSize_p; | 915 | unsigned int *mcastFilterSize_p; |
929 | 916 | ||
930 | 917 | ||
931 | ibmveth_debug_printk_no_adapter("entering ibmveth_probe for UA 0x%x\n", | 918 | ibmveth_debug_printk_no_adapter("entering ibmveth_probe for UA 0x%x\n", |
932 | dev->unit_address); | 919 | dev->unit_address); |
933 | 920 | ||
934 | mac_addr_p = (unsigned char *) vio_get_attribute(dev, VETH_MAC_ADDR, 0); | 921 | mac_addr_p = (unsigned char *) vio_get_attribute(dev, VETH_MAC_ADDR, 0); |
@@ -937,7 +924,7 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_ | |||
937 | "attribute\n", __FILE__, __LINE__); | 924 | "attribute\n", __FILE__, __LINE__); |
938 | return 0; | 925 | return 0; |
939 | } | 926 | } |
940 | 927 | ||
941 | mcastFilterSize_p= (unsigned int *) vio_get_attribute(dev, VETH_MCAST_FILTER_SIZE, 0); | 928 | mcastFilterSize_p= (unsigned int *) vio_get_attribute(dev, VETH_MCAST_FILTER_SIZE, 0); |
942 | if(!mcastFilterSize_p) { | 929 | if(!mcastFilterSize_p) { |
943 | printk(KERN_ERR "(%s:%3.3d) ERROR: Can't find " | 930 | printk(KERN_ERR "(%s:%3.3d) ERROR: Can't find " |
@@ -945,7 +932,7 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_ | |||
945 | __FILE__, __LINE__); | 932 | __FILE__, __LINE__); |
946 | return 0; | 933 | return 0; |
947 | } | 934 | } |
948 | 935 | ||
949 | netdev = alloc_etherdev(sizeof(struct ibmveth_adapter)); | 936 | netdev = alloc_etherdev(sizeof(struct ibmveth_adapter)); |
950 | 937 | ||
951 | if(!netdev) | 938 | if(!netdev) |
@@ -960,13 +947,14 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_ | |||
960 | adapter->vdev = dev; | 947 | adapter->vdev = dev; |
961 | adapter->netdev = netdev; | 948 | adapter->netdev = netdev; |
962 | adapter->mcastFilterSize= *mcastFilterSize_p; | 949 | adapter->mcastFilterSize= *mcastFilterSize_p; |
963 | 950 | adapter->pool_config = 0; | |
951 | |||
964 | /* Some older boxes running PHYP non-natively have an OF that | 952 | /* Some older boxes running PHYP non-natively have an OF that |
965 | returns a 8-byte local-mac-address field (and the first | 953 | returns a 8-byte local-mac-address field (and the first |
966 | 2 bytes have to be ignored) while newer boxes' OF return | 954 | 2 bytes have to be ignored) while newer boxes' OF return |
967 | a 6-byte field. Note that IEEE 1275 specifies that | 955 | a 6-byte field. Note that IEEE 1275 specifies that |
968 | local-mac-address must be a 6-byte field. | 956 | local-mac-address must be a 6-byte field. |
969 | The RPA doc specifies that the first byte must be 10b, so | 957 | The RPA doc specifies that the first byte must be 10b, so |
970 | we'll just look for it to solve this 8 vs. 6 byte field issue */ | 958 | we'll just look for it to solve this 8 vs. 6 byte field issue */ |
971 | 959 | ||
972 | if ((*mac_addr_p & 0x3) != 0x02) | 960 | if ((*mac_addr_p & 0x3) != 0x02) |
@@ -976,7 +964,7 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_ | |||
976 | memcpy(&adapter->mac_addr, mac_addr_p, 6); | 964 | memcpy(&adapter->mac_addr, mac_addr_p, 6); |
977 | 965 | ||
978 | adapter->liobn = dev->iommu_table->it_index; | 966 | adapter->liobn = dev->iommu_table->it_index; |
979 | 967 | ||
980 | netdev->irq = dev->irq; | 968 | netdev->irq = dev->irq; |
981 | netdev->open = ibmveth_open; | 969 | netdev->open = ibmveth_open; |
982 | netdev->poll = ibmveth_poll; | 970 | netdev->poll = ibmveth_poll; |
@@ -989,14 +977,21 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_ | |||
989 | netdev->ethtool_ops = &netdev_ethtool_ops; | 977 | netdev->ethtool_ops = &netdev_ethtool_ops; |
990 | netdev->change_mtu = ibmveth_change_mtu; | 978 | netdev->change_mtu = ibmveth_change_mtu; |
991 | SET_NETDEV_DEV(netdev, &dev->dev); | 979 | SET_NETDEV_DEV(netdev, &dev->dev); |
992 | netdev->features |= NETIF_F_LLTX; | 980 | netdev->features |= NETIF_F_LLTX; |
993 | spin_lock_init(&adapter->stats_lock); | 981 | spin_lock_init(&adapter->stats_lock); |
994 | 982 | ||
995 | memcpy(&netdev->dev_addr, &adapter->mac_addr, netdev->addr_len); | 983 | memcpy(&netdev->dev_addr, &adapter->mac_addr, netdev->addr_len); |
996 | 984 | ||
997 | for(i = 0; i<IbmVethNumBufferPools; i++) | 985 | for(i = 0; i<IbmVethNumBufferPools; i++) { |
998 | ibmveth_init_buffer_pool(&adapter->rx_buff_pool[i], i, | 986 | struct kobject *kobj = &adapter->rx_buff_pool[i].kobj; |
999 | pool_count[i], pool_size[i]); | 987 | ibmveth_init_buffer_pool(&adapter->rx_buff_pool[i], i, |
988 | pool_count[i], pool_size[i], | ||
989 | pool_active[i]); | ||
990 | kobj->parent = &dev->dev.kobj; | ||
991 | sprintf(kobj->name, "pool%d", i); | ||
992 | kobj->ktype = &ktype_veth_pool; | ||
993 | kobject_register(kobj); | ||
994 | } | ||
1000 | 995 | ||
1001 | ibmveth_debug_printk("adapter @ 0x%p\n", adapter); | 996 | ibmveth_debug_printk("adapter @ 0x%p\n", adapter); |
1002 | 997 | ||
@@ -1025,6 +1020,10 @@ static int __devexit ibmveth_remove(struct vio_dev *dev) | |||
1025 | { | 1020 | { |
1026 | struct net_device *netdev = dev->dev.driver_data; | 1021 | struct net_device *netdev = dev->dev.driver_data; |
1027 | struct ibmveth_adapter *adapter = netdev->priv; | 1022 | struct ibmveth_adapter *adapter = netdev->priv; |
1023 | int i; | ||
1024 | |||
1025 | for(i = 0; i<IbmVethNumBufferPools; i++) | ||
1026 | kobject_unregister(&adapter->rx_buff_pool[i].kobj); | ||
1028 | 1027 | ||
1029 | unregister_netdev(netdev); | 1028 | unregister_netdev(netdev); |
1030 | 1029 | ||
@@ -1048,7 +1047,7 @@ static void ibmveth_proc_unregister_driver(void) | |||
1048 | remove_proc_entry(IBMVETH_PROC_DIR, NULL); | 1047 | remove_proc_entry(IBMVETH_PROC_DIR, NULL); |
1049 | } | 1048 | } |
1050 | 1049 | ||
1051 | static void *ibmveth_seq_start(struct seq_file *seq, loff_t *pos) | 1050 | static void *ibmveth_seq_start(struct seq_file *seq, loff_t *pos) |
1052 | { | 1051 | { |
1053 | if (*pos == 0) { | 1052 | if (*pos == 0) { |
1054 | return (void *)1; | 1053 | return (void *)1; |
@@ -1063,18 +1062,18 @@ static void *ibmveth_seq_next(struct seq_file *seq, void *v, loff_t *pos) | |||
1063 | return NULL; | 1062 | return NULL; |
1064 | } | 1063 | } |
1065 | 1064 | ||
1066 | static void ibmveth_seq_stop(struct seq_file *seq, void *v) | 1065 | static void ibmveth_seq_stop(struct seq_file *seq, void *v) |
1067 | { | 1066 | { |
1068 | } | 1067 | } |
1069 | 1068 | ||
1070 | static int ibmveth_seq_show(struct seq_file *seq, void *v) | 1069 | static int ibmveth_seq_show(struct seq_file *seq, void *v) |
1071 | { | 1070 | { |
1072 | struct ibmveth_adapter *adapter = seq->private; | 1071 | struct ibmveth_adapter *adapter = seq->private; |
1073 | char *current_mac = ((char*) &adapter->netdev->dev_addr); | 1072 | char *current_mac = ((char*) &adapter->netdev->dev_addr); |
1074 | char *firmware_mac = ((char*) &adapter->mac_addr) ; | 1073 | char *firmware_mac = ((char*) &adapter->mac_addr) ; |
1075 | 1074 | ||
1076 | seq_printf(seq, "%s %s\n\n", ibmveth_driver_string, ibmveth_driver_version); | 1075 | seq_printf(seq, "%s %s\n\n", ibmveth_driver_string, ibmveth_driver_version); |
1077 | 1076 | ||
1078 | seq_printf(seq, "Unit Address: 0x%x\n", adapter->vdev->unit_address); | 1077 | seq_printf(seq, "Unit Address: 0x%x\n", adapter->vdev->unit_address); |
1079 | seq_printf(seq, "LIOBN: 0x%lx\n", adapter->liobn); | 1078 | seq_printf(seq, "LIOBN: 0x%lx\n", adapter->liobn); |
1080 | seq_printf(seq, "Current MAC: %02X:%02X:%02X:%02X:%02X:%02X\n", | 1079 | seq_printf(seq, "Current MAC: %02X:%02X:%02X:%02X:%02X:%02X\n", |
@@ -1083,7 +1082,7 @@ static int ibmveth_seq_show(struct seq_file *seq, void *v) | |||
1083 | seq_printf(seq, "Firmware MAC: %02X:%02X:%02X:%02X:%02X:%02X\n", | 1082 | seq_printf(seq, "Firmware MAC: %02X:%02X:%02X:%02X:%02X:%02X\n", |
1084 | firmware_mac[0], firmware_mac[1], firmware_mac[2], | 1083 | firmware_mac[0], firmware_mac[1], firmware_mac[2], |
1085 | firmware_mac[3], firmware_mac[4], firmware_mac[5]); | 1084 | firmware_mac[3], firmware_mac[4], firmware_mac[5]); |
1086 | 1085 | ||
1087 | seq_printf(seq, "\nAdapter Statistics:\n"); | 1086 | seq_printf(seq, "\nAdapter Statistics:\n"); |
1088 | seq_printf(seq, " TX: skbuffs linearized: %ld\n", adapter->tx_linearized); | 1087 | seq_printf(seq, " TX: skbuffs linearized: %ld\n", adapter->tx_linearized); |
1089 | seq_printf(seq, " multi-descriptor sends: %ld\n", adapter->tx_multidesc_send); | 1088 | seq_printf(seq, " multi-descriptor sends: %ld\n", adapter->tx_multidesc_send); |
@@ -1095,7 +1094,7 @@ static int ibmveth_seq_show(struct seq_file *seq, void *v) | |||
1095 | seq_printf(seq, " add buffer failures: %ld\n", adapter->replenish_add_buff_failure); | 1094 | seq_printf(seq, " add buffer failures: %ld\n", adapter->replenish_add_buff_failure); |
1096 | seq_printf(seq, " invalid buffers: %ld\n", adapter->rx_invalid_buffer); | 1095 | seq_printf(seq, " invalid buffers: %ld\n", adapter->rx_invalid_buffer); |
1097 | seq_printf(seq, " no buffers: %ld\n", adapter->rx_no_buffer); | 1096 | seq_printf(seq, " no buffers: %ld\n", adapter->rx_no_buffer); |
1098 | 1097 | ||
1099 | return 0; | 1098 | return 0; |
1100 | } | 1099 | } |
1101 | static struct seq_operations ibmveth_seq_ops = { | 1100 | static struct seq_operations ibmveth_seq_ops = { |
@@ -1153,11 +1152,11 @@ static void ibmveth_proc_unregister_adapter(struct ibmveth_adapter *adapter) | |||
1153 | } | 1152 | } |
1154 | 1153 | ||
1155 | #else /* CONFIG_PROC_FS */ | 1154 | #else /* CONFIG_PROC_FS */ |
1156 | static void ibmveth_proc_register_adapter(struct ibmveth_adapter *adapter) | 1155 | static void ibmveth_proc_register_adapter(struct ibmveth_adapter *adapter) |
1157 | { | 1156 | { |
1158 | } | 1157 | } |
1159 | 1158 | ||
1160 | static void ibmveth_proc_unregister_adapter(struct ibmveth_adapter *adapter) | 1159 | static void ibmveth_proc_unregister_adapter(struct ibmveth_adapter *adapter) |
1161 | { | 1160 | { |
1162 | } | 1161 | } |
1163 | static void ibmveth_proc_register_driver(void) | 1162 | static void ibmveth_proc_register_driver(void) |
@@ -1169,6 +1168,132 @@ static void ibmveth_proc_unregister_driver(void) | |||
1169 | } | 1168 | } |
1170 | #endif /* CONFIG_PROC_FS */ | 1169 | #endif /* CONFIG_PROC_FS */ |
1171 | 1170 | ||
1171 | static struct attribute veth_active_attr; | ||
1172 | static struct attribute veth_num_attr; | ||
1173 | static struct attribute veth_size_attr; | ||
1174 | |||
1175 | static ssize_t veth_pool_show(struct kobject * kobj, | ||
1176 | struct attribute * attr, char * buf) | ||
1177 | { | ||
1178 | struct ibmveth_buff_pool *pool = container_of(kobj, | ||
1179 | struct ibmveth_buff_pool, | ||
1180 | kobj); | ||
1181 | |||
1182 | if (attr == &veth_active_attr) | ||
1183 | return sprintf(buf, "%d\n", pool->active); | ||
1184 | else if (attr == &veth_num_attr) | ||
1185 | return sprintf(buf, "%d\n", pool->size); | ||
1186 | else if (attr == &veth_size_attr) | ||
1187 | return sprintf(buf, "%d\n", pool->buff_size); | ||
1188 | return 0; | ||
1189 | } | ||
1190 | |||
1191 | static ssize_t veth_pool_store(struct kobject * kobj, struct attribute * attr, | ||
1192 | const char * buf, size_t count) | ||
1193 | { | ||
1194 | struct ibmveth_buff_pool *pool = container_of(kobj, | ||
1195 | struct ibmveth_buff_pool, | ||
1196 | kobj); | ||
1197 | struct net_device *netdev = | ||
1198 | container_of(kobj->parent, struct device, kobj)->driver_data; | ||
1199 | struct ibmveth_adapter *adapter = netdev->priv; | ||
1200 | long value = simple_strtol(buf, NULL, 10); | ||
1201 | long rc; | ||
1202 | |||
1203 | if (attr == &veth_active_attr) { | ||
1204 | if (value && !pool->active) { | ||
1205 | if(ibmveth_alloc_buffer_pool(pool)) { | ||
1206 | ibmveth_error_printk("unable to alloc pool\n"); | ||
1207 | return -ENOMEM; | ||
1208 | } | ||
1209 | pool->active = 1; | ||
1210 | adapter->pool_config = 1; | ||
1211 | ibmveth_close(netdev); | ||
1212 | adapter->pool_config = 0; | ||
1213 | if ((rc = ibmveth_open(netdev))) | ||
1214 | return rc; | ||
1215 | } else if (!value && pool->active) { | ||
1216 | int mtu = netdev->mtu + IBMVETH_BUFF_OH; | ||
1217 | int i; | ||
1218 | /* Make sure there is a buffer pool with buffers that | ||
1219 | can hold a packet of the size of the MTU */ | ||
1220 | for(i = 0; i<IbmVethNumBufferPools; i++) { | ||
1221 | if (pool == &adapter->rx_buff_pool[i]) | ||
1222 | continue; | ||
1223 | if (!adapter->rx_buff_pool[i].active) | ||
1224 | continue; | ||
1225 | if (mtu < adapter->rx_buff_pool[i].buff_size) { | ||
1226 | pool->active = 0; | ||
1227 | h_free_logical_lan_buffer(adapter-> | ||
1228 | vdev-> | ||
1229 | unit_address, | ||
1230 | pool-> | ||
1231 | buff_size); | ||
1232 | } | ||
1233 | } | ||
1234 | if (pool->active) { | ||
1235 | ibmveth_error_printk("no active pool >= MTU\n"); | ||
1236 | return -EPERM; | ||
1237 | } | ||
1238 | } | ||
1239 | } else if (attr == &veth_num_attr) { | ||
1240 | if (value <= 0 || value > IBMVETH_MAX_POOL_COUNT) | ||
1241 | return -EINVAL; | ||
1242 | else { | ||
1243 | adapter->pool_config = 1; | ||
1244 | ibmveth_close(netdev); | ||
1245 | adapter->pool_config = 0; | ||
1246 | pool->size = value; | ||
1247 | if ((rc = ibmveth_open(netdev))) | ||
1248 | return rc; | ||
1249 | } | ||
1250 | } else if (attr == &veth_size_attr) { | ||
1251 | if (value <= IBMVETH_BUFF_OH || value > IBMVETH_MAX_BUF_SIZE) | ||
1252 | return -EINVAL; | ||
1253 | else { | ||
1254 | adapter->pool_config = 1; | ||
1255 | ibmveth_close(netdev); | ||
1256 | adapter->pool_config = 0; | ||
1257 | pool->buff_size = value; | ||
1258 | if ((rc = ibmveth_open(netdev))) | ||
1259 | return rc; | ||
1260 | } | ||
1261 | } | ||
1262 | |||
1263 | /* kick the interrupt handler to allocate/deallocate pools */ | ||
1264 | ibmveth_interrupt(netdev->irq, netdev, NULL); | ||
1265 | return count; | ||
1266 | } | ||
1267 | |||
1268 | |||
1269 | #define ATTR(_name, _mode) \ | ||
1270 | struct attribute veth_##_name##_attr = { \ | ||
1271 | .name = __stringify(_name), .mode = _mode, .owner = THIS_MODULE \ | ||
1272 | }; | ||
1273 | |||
1274 | static ATTR(active, 0644); | ||
1275 | static ATTR(num, 0644); | ||
1276 | static ATTR(size, 0644); | ||
1277 | |||
1278 | static struct attribute * veth_pool_attrs[] = { | ||
1279 | &veth_active_attr, | ||
1280 | &veth_num_attr, | ||
1281 | &veth_size_attr, | ||
1282 | NULL, | ||
1283 | }; | ||
1284 | |||
1285 | static struct sysfs_ops veth_pool_ops = { | ||
1286 | .show = veth_pool_show, | ||
1287 | .store = veth_pool_store, | ||
1288 | }; | ||
1289 | |||
1290 | static struct kobj_type ktype_veth_pool = { | ||
1291 | .release = NULL, | ||
1292 | .sysfs_ops = &veth_pool_ops, | ||
1293 | .default_attrs = veth_pool_attrs, | ||
1294 | }; | ||
1295 | |||
1296 | |||
1172 | static struct vio_device_id ibmveth_device_table[] __devinitdata= { | 1297 | static struct vio_device_id ibmveth_device_table[] __devinitdata= { |
1173 | { "network", "IBM,l-lan"}, | 1298 | { "network", "IBM,l-lan"}, |
1174 | { "", "" } | 1299 | { "", "" } |
@@ -1198,7 +1323,7 @@ static void __exit ibmveth_module_exit(void) | |||
1198 | { | 1323 | { |
1199 | vio_unregister_driver(&ibmveth_driver); | 1324 | vio_unregister_driver(&ibmveth_driver); |
1200 | ibmveth_proc_unregister_driver(); | 1325 | ibmveth_proc_unregister_driver(); |
1201 | } | 1326 | } |
1202 | 1327 | ||
1203 | module_init(ibmveth_module_init); | 1328 | module_init(ibmveth_module_init); |
1204 | module_exit(ibmveth_module_exit); | 1329 | module_exit(ibmveth_module_exit); |
diff --git a/drivers/net/ibmveth.h b/drivers/net/ibmveth.h index 46919a814fca..8385bf836507 100644 --- a/drivers/net/ibmveth.h +++ b/drivers/net/ibmveth.h | |||
@@ -75,10 +75,13 @@ | |||
75 | 75 | ||
76 | #define IbmVethNumBufferPools 5 | 76 | #define IbmVethNumBufferPools 5 |
77 | #define IBMVETH_BUFF_OH 22 /* Overhead: 14 ethernet header + 8 opaque handle */ | 77 | #define IBMVETH_BUFF_OH 22 /* Overhead: 14 ethernet header + 8 opaque handle */ |
78 | #define IBMVETH_MAX_MTU 68 | ||
79 | #define IBMVETH_MAX_POOL_COUNT 4096 | ||
80 | #define IBMVETH_MAX_BUF_SIZE (1024 * 128) | ||
78 | 81 | ||
79 | /* pool_size should be sorted */ | ||
80 | static int pool_size[] = { 512, 1024 * 2, 1024 * 16, 1024 * 32, 1024 * 64 }; | 82 | static int pool_size[] = { 512, 1024 * 2, 1024 * 16, 1024 * 32, 1024 * 64 }; |
81 | static int pool_count[] = { 256, 768, 256, 256, 256 }; | 83 | static int pool_count[] = { 256, 768, 256, 256, 256 }; |
84 | static int pool_active[] = { 1, 1, 0, 0, 0}; | ||
82 | 85 | ||
83 | #define IBM_VETH_INVALID_MAP ((u16)0xffff) | 86 | #define IBM_VETH_INVALID_MAP ((u16)0xffff) |
84 | 87 | ||
@@ -94,6 +97,7 @@ struct ibmveth_buff_pool { | |||
94 | dma_addr_t *dma_addr; | 97 | dma_addr_t *dma_addr; |
95 | struct sk_buff **skbuff; | 98 | struct sk_buff **skbuff; |
96 | int active; | 99 | int active; |
100 | struct kobject kobj; | ||
97 | }; | 101 | }; |
98 | 102 | ||
99 | struct ibmveth_rx_q { | 103 | struct ibmveth_rx_q { |
@@ -118,6 +122,7 @@ struct ibmveth_adapter { | |||
118 | dma_addr_t filter_list_dma; | 122 | dma_addr_t filter_list_dma; |
119 | struct ibmveth_buff_pool rx_buff_pool[IbmVethNumBufferPools]; | 123 | struct ibmveth_buff_pool rx_buff_pool[IbmVethNumBufferPools]; |
120 | struct ibmveth_rx_q rx_queue; | 124 | struct ibmveth_rx_q rx_queue; |
125 | int pool_config; | ||
121 | 126 | ||
122 | /* adapter specific stats */ | 127 | /* adapter specific stats */ |
123 | u64 replenish_task_cycles; | 128 | u64 replenish_task_cycles; |
@@ -134,7 +139,7 @@ struct ibmveth_adapter { | |||
134 | spinlock_t stats_lock; | 139 | spinlock_t stats_lock; |
135 | }; | 140 | }; |
136 | 141 | ||
137 | struct ibmveth_buf_desc_fields { | 142 | struct ibmveth_buf_desc_fields { |
138 | u32 valid : 1; | 143 | u32 valid : 1; |
139 | u32 toggle : 1; | 144 | u32 toggle : 1; |
140 | u32 reserved : 6; | 145 | u32 reserved : 6; |
@@ -143,7 +148,7 @@ struct ibmveth_buf_desc_fields { | |||
143 | }; | 148 | }; |
144 | 149 | ||
145 | union ibmveth_buf_desc { | 150 | union ibmveth_buf_desc { |
146 | u64 desc; | 151 | u64 desc; |
147 | struct ibmveth_buf_desc_fields fields; | 152 | struct ibmveth_buf_desc_fields fields; |
148 | }; | 153 | }; |
149 | 154 | ||
diff --git a/drivers/net/ifb.c b/drivers/net/ifb.c index 31fb2d75dc44..2e222ef91e22 100644 --- a/drivers/net/ifb.c +++ b/drivers/net/ifb.c | |||
@@ -76,13 +76,13 @@ static void ri_tasklet(unsigned long dev) | |||
76 | dp->st_task_enter++; | 76 | dp->st_task_enter++; |
77 | if ((skb = skb_peek(&dp->tq)) == NULL) { | 77 | if ((skb = skb_peek(&dp->tq)) == NULL) { |
78 | dp->st_txq_refl_try++; | 78 | dp->st_txq_refl_try++; |
79 | if (spin_trylock(&_dev->xmit_lock)) { | 79 | if (netif_tx_trylock(_dev)) { |
80 | dp->st_rxq_enter++; | 80 | dp->st_rxq_enter++; |
81 | while ((skb = skb_dequeue(&dp->rq)) != NULL) { | 81 | while ((skb = skb_dequeue(&dp->rq)) != NULL) { |
82 | skb_queue_tail(&dp->tq, skb); | 82 | skb_queue_tail(&dp->tq, skb); |
83 | dp->st_rx2tx_tran++; | 83 | dp->st_rx2tx_tran++; |
84 | } | 84 | } |
85 | spin_unlock(&_dev->xmit_lock); | 85 | netif_tx_unlock(_dev); |
86 | } else { | 86 | } else { |
87 | /* reschedule */ | 87 | /* reschedule */ |
88 | dp->st_rxq_notenter++; | 88 | dp->st_rxq_notenter++; |
@@ -110,7 +110,7 @@ static void ri_tasklet(unsigned long dev) | |||
110 | } | 110 | } |
111 | } | 111 | } |
112 | 112 | ||
113 | if (spin_trylock(&_dev->xmit_lock)) { | 113 | if (netif_tx_trylock(_dev)) { |
114 | dp->st_rxq_check++; | 114 | dp->st_rxq_check++; |
115 | if ((skb = skb_peek(&dp->rq)) == NULL) { | 115 | if ((skb = skb_peek(&dp->rq)) == NULL) { |
116 | dp->tasklet_pending = 0; | 116 | dp->tasklet_pending = 0; |
@@ -118,10 +118,10 @@ static void ri_tasklet(unsigned long dev) | |||
118 | netif_wake_queue(_dev); | 118 | netif_wake_queue(_dev); |
119 | } else { | 119 | } else { |
120 | dp->st_rxq_rsch++; | 120 | dp->st_rxq_rsch++; |
121 | spin_unlock(&_dev->xmit_lock); | 121 | netif_tx_unlock(_dev); |
122 | goto resched; | 122 | goto resched; |
123 | } | 123 | } |
124 | spin_unlock(&_dev->xmit_lock); | 124 | netif_tx_unlock(_dev); |
125 | } else { | 125 | } else { |
126 | resched: | 126 | resched: |
127 | dp->tasklet_pending = 1; | 127 | dp->tasklet_pending = 1; |
diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig index cff8598aa800..d2ce4896abff 100644 --- a/drivers/net/irda/Kconfig +++ b/drivers/net/irda/Kconfig | |||
@@ -417,5 +417,20 @@ config PXA_FICP | |||
417 | available capabilities may vary from one PXA2xx target to | 417 | available capabilities may vary from one PXA2xx target to |
418 | another. | 418 | another. |
419 | 419 | ||
420 | config MCS_FIR | ||
421 | tristate "MosChip MCS7780 IrDA-USB dongle" | ||
422 | depends on IRDA && USB && EXPERIMENTAL | ||
423 | help | ||
424 | Say Y or M here if you want to build support for the MosChip | ||
425 | MCS7780 IrDA-USB bridge device driver. | ||
426 | |||
427 | USB bridge based on the MosChip MCS7780 don't conform to the | ||
428 | IrDA-USB device class specification, and therefore need their | ||
429 | own specific driver. Those dongles support SIR and FIR (4Mbps) | ||
430 | speeds. | ||
431 | |||
432 | To compile it as a module, choose M here: the module will be called | ||
433 | mcs7780. | ||
434 | |||
420 | endmenu | 435 | endmenu |
421 | 436 | ||
diff --git a/drivers/net/irda/Makefile b/drivers/net/irda/Makefile index c1ce2398efea..5be09f1b9ee2 100644 --- a/drivers/net/irda/Makefile +++ b/drivers/net/irda/Makefile | |||
@@ -19,6 +19,7 @@ obj-$(CONFIG_ALI_FIR) += ali-ircc.o | |||
19 | obj-$(CONFIG_VLSI_FIR) += vlsi_ir.o | 19 | obj-$(CONFIG_VLSI_FIR) += vlsi_ir.o |
20 | obj-$(CONFIG_VIA_FIR) += via-ircc.o | 20 | obj-$(CONFIG_VIA_FIR) += via-ircc.o |
21 | obj-$(CONFIG_PXA_FICP) += pxaficp_ir.o | 21 | obj-$(CONFIG_PXA_FICP) += pxaficp_ir.o |
22 | obj-$(CONFIG_MCS_FIR) += mcs7780.o | ||
22 | # Old dongle drivers for old SIR drivers | 23 | # Old dongle drivers for old SIR drivers |
23 | obj-$(CONFIG_ESI_DONGLE_OLD) += esi.o | 24 | obj-$(CONFIG_ESI_DONGLE_OLD) += esi.o |
24 | obj-$(CONFIG_TEKRAM_DONGLE_OLD) += tekram.o | 25 | obj-$(CONFIG_TEKRAM_DONGLE_OLD) += tekram.o |
diff --git a/drivers/net/irda/ali-ircc.c b/drivers/net/irda/ali-ircc.c index 2e7882eb7d6f..bf1fca5a3fa0 100644 --- a/drivers/net/irda/ali-ircc.c +++ b/drivers/net/irda/ali-ircc.c | |||
@@ -34,14 +34,12 @@ | |||
34 | #include <linux/rtnetlink.h> | 34 | #include <linux/rtnetlink.h> |
35 | #include <linux/serial_reg.h> | 35 | #include <linux/serial_reg.h> |
36 | #include <linux/dma-mapping.h> | 36 | #include <linux/dma-mapping.h> |
37 | #include <linux/platform_device.h> | ||
37 | 38 | ||
38 | #include <asm/io.h> | 39 | #include <asm/io.h> |
39 | #include <asm/dma.h> | 40 | #include <asm/dma.h> |
40 | #include <asm/byteorder.h> | 41 | #include <asm/byteorder.h> |
41 | 42 | ||
42 | #include <linux/pm.h> | ||
43 | #include <linux/pm_legacy.h> | ||
44 | |||
45 | #include <net/irda/wrapper.h> | 43 | #include <net/irda/wrapper.h> |
46 | #include <net/irda/irda.h> | 44 | #include <net/irda/irda.h> |
47 | #include <net/irda/irda_device.h> | 45 | #include <net/irda/irda_device.h> |
@@ -51,7 +49,19 @@ | |||
51 | #define CHIP_IO_EXTENT 8 | 49 | #define CHIP_IO_EXTENT 8 |
52 | #define BROKEN_DONGLE_ID | 50 | #define BROKEN_DONGLE_ID |
53 | 51 | ||
54 | static char *driver_name = "ali-ircc"; | 52 | #define ALI_IRCC_DRIVER_NAME "ali-ircc" |
53 | |||
54 | /* Power Management */ | ||
55 | static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state); | ||
56 | static int ali_ircc_resume(struct platform_device *dev); | ||
57 | |||
58 | static struct platform_driver ali_ircc_driver = { | ||
59 | .suspend = ali_ircc_suspend, | ||
60 | .resume = ali_ircc_resume, | ||
61 | .driver = { | ||
62 | .name = ALI_IRCC_DRIVER_NAME, | ||
63 | }, | ||
64 | }; | ||
55 | 65 | ||
56 | /* Module parameters */ | 66 | /* Module parameters */ |
57 | static int qos_mtt_bits = 0x07; /* 1 ms or more */ | 67 | static int qos_mtt_bits = 0x07; /* 1 ms or more */ |
@@ -97,10 +107,7 @@ static int ali_ircc_is_receiving(struct ali_ircc_cb *self); | |||
97 | static int ali_ircc_net_open(struct net_device *dev); | 107 | static int ali_ircc_net_open(struct net_device *dev); |
98 | static int ali_ircc_net_close(struct net_device *dev); | 108 | static int ali_ircc_net_close(struct net_device *dev); |
99 | static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | 109 | static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
100 | static int ali_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data); | ||
101 | static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud); | 110 | static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud); |
102 | static void ali_ircc_suspend(struct ali_ircc_cb *self); | ||
103 | static void ali_ircc_wakeup(struct ali_ircc_cb *self); | ||
104 | static struct net_device_stats *ali_ircc_net_get_stats(struct net_device *dev); | 111 | static struct net_device_stats *ali_ircc_net_get_stats(struct net_device *dev); |
105 | 112 | ||
106 | /* SIR function */ | 113 | /* SIR function */ |
@@ -145,6 +152,14 @@ static int __init ali_ircc_init(void) | |||
145 | int i = 0; | 152 | int i = 0; |
146 | 153 | ||
147 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 154 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); |
155 | |||
156 | ret = platform_driver_register(&ali_ircc_driver); | ||
157 | if (ret) { | ||
158 | IRDA_ERROR("%s, Can't register driver!\n", | ||
159 | ALI_IRCC_DRIVER_NAME); | ||
160 | return ret; | ||
161 | } | ||
162 | |||
148 | 163 | ||
149 | /* Probe for all the ALi chipsets we know about */ | 164 | /* Probe for all the ALi chipsets we know about */ |
150 | for (chip= chips; chip->name; chip++, i++) | 165 | for (chip= chips; chip->name; chip++, i++) |
@@ -214,6 +229,10 @@ static int __init ali_ircc_init(void) | |||
214 | } | 229 | } |
215 | 230 | ||
216 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); | 231 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); |
232 | |||
233 | if (ret) | ||
234 | platform_driver_unregister(&ali_ircc_driver); | ||
235 | |||
217 | return ret; | 236 | return ret; |
218 | } | 237 | } |
219 | 238 | ||
@@ -228,14 +247,14 @@ static void __exit ali_ircc_cleanup(void) | |||
228 | int i; | 247 | int i; |
229 | 248 | ||
230 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 249 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); |
231 | |||
232 | pm_unregister_all(ali_ircc_pmproc); | ||
233 | 250 | ||
234 | for (i=0; i < 4; i++) { | 251 | for (i=0; i < 4; i++) { |
235 | if (dev_self[i]) | 252 | if (dev_self[i]) |
236 | ali_ircc_close(dev_self[i]); | 253 | ali_ircc_close(dev_self[i]); |
237 | } | 254 | } |
238 | 255 | ||
256 | platform_driver_unregister(&ali_ircc_driver); | ||
257 | |||
239 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); | 258 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); |
240 | } | 259 | } |
241 | 260 | ||
@@ -249,7 +268,6 @@ static int ali_ircc_open(int i, chipio_t *info) | |||
249 | { | 268 | { |
250 | struct net_device *dev; | 269 | struct net_device *dev; |
251 | struct ali_ircc_cb *self; | 270 | struct ali_ircc_cb *self; |
252 | struct pm_dev *pmdev; | ||
253 | int dongle_id; | 271 | int dongle_id; |
254 | int err; | 272 | int err; |
255 | 273 | ||
@@ -284,7 +302,8 @@ static int ali_ircc_open(int i, chipio_t *info) | |||
284 | self->io.fifo_size = 16; /* SIR: 16, FIR: 32 Benjamin 2000/11/1 */ | 302 | self->io.fifo_size = 16; /* SIR: 16, FIR: 32 Benjamin 2000/11/1 */ |
285 | 303 | ||
286 | /* Reserve the ioports that we need */ | 304 | /* Reserve the ioports that we need */ |
287 | if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) { | 305 | if (!request_region(self->io.fir_base, self->io.fir_ext, |
306 | ALI_IRCC_DRIVER_NAME)) { | ||
288 | IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", __FUNCTION__, | 307 | IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", __FUNCTION__, |
289 | self->io.fir_base); | 308 | self->io.fir_base); |
290 | err = -ENODEV; | 309 | err = -ENODEV; |
@@ -354,13 +373,10 @@ static int ali_ircc_open(int i, chipio_t *info) | |||
354 | 373 | ||
355 | /* Check dongle id */ | 374 | /* Check dongle id */ |
356 | dongle_id = ali_ircc_read_dongle_id(i, info); | 375 | dongle_id = ali_ircc_read_dongle_id(i, info); |
357 | IRDA_MESSAGE("%s(), %s, Found dongle: %s\n", __FUNCTION__, driver_name, dongle_types[dongle_id]); | 376 | IRDA_MESSAGE("%s(), %s, Found dongle: %s\n", __FUNCTION__, |
377 | ALI_IRCC_DRIVER_NAME, dongle_types[dongle_id]); | ||
358 | 378 | ||
359 | self->io.dongle_id = dongle_id; | 379 | self->io.dongle_id = dongle_id; |
360 | |||
361 | pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, ali_ircc_pmproc); | ||
362 | if (pmdev) | ||
363 | pmdev->data = self; | ||
364 | 380 | ||
365 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); | 381 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); |
366 | 382 | ||
@@ -548,12 +564,11 @@ static int ali_ircc_setup(chipio_t *info) | |||
548 | /* Should be 0x00 in the M1535/M1535D */ | 564 | /* Should be 0x00 in the M1535/M1535D */ |
549 | if(version != 0x00) | 565 | if(version != 0x00) |
550 | { | 566 | { |
551 | IRDA_ERROR("%s, Wrong chip version %02x\n", driver_name, version); | 567 | IRDA_ERROR("%s, Wrong chip version %02x\n", |
568 | ALI_IRCC_DRIVER_NAME, version); | ||
552 | return -1; | 569 | return -1; |
553 | } | 570 | } |
554 | 571 | ||
555 | // IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name, info->cfg_base); | ||
556 | |||
557 | /* Set FIR FIFO Threshold Register */ | 572 | /* Set FIR FIFO Threshold Register */ |
558 | switch_bank(iobase, BANK1); | 573 | switch_bank(iobase, BANK1); |
559 | outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR); | 574 | outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR); |
@@ -583,7 +598,8 @@ static int ali_ircc_setup(chipio_t *info) | |||
583 | /* Switch to SIR space */ | 598 | /* Switch to SIR space */ |
584 | FIR2SIR(iobase); | 599 | FIR2SIR(iobase); |
585 | 600 | ||
586 | IRDA_MESSAGE("%s, driver loaded (Benjamin Kong)\n", driver_name); | 601 | IRDA_MESSAGE("%s, driver loaded (Benjamin Kong)\n", |
602 | ALI_IRCC_DRIVER_NAME); | ||
587 | 603 | ||
588 | /* Enable receive interrupts */ | 604 | /* Enable receive interrupts */ |
589 | // outb(UART_IER_RDI, iobase+UART_IER); //benjamin 2000/11/23 01:25PM | 605 | // outb(UART_IER_RDI, iobase+UART_IER); //benjamin 2000/11/23 01:25PM |
@@ -647,7 +663,8 @@ static irqreturn_t ali_ircc_interrupt(int irq, void *dev_id, | |||
647 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 663 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); |
648 | 664 | ||
649 | if (!dev) { | 665 | if (!dev) { |
650 | IRDA_WARNING("%s: irq %d for unknown device.\n", driver_name, irq); | 666 | IRDA_WARNING("%s: irq %d for unknown device.\n", |
667 | ALI_IRCC_DRIVER_NAME, irq); | ||
651 | return IRQ_NONE; | 668 | return IRQ_NONE; |
652 | } | 669 | } |
653 | 670 | ||
@@ -1328,7 +1345,8 @@ static int ali_ircc_net_open(struct net_device *dev) | |||
1328 | /* Request IRQ and install Interrupt Handler */ | 1345 | /* Request IRQ and install Interrupt Handler */ |
1329 | if (request_irq(self->io.irq, ali_ircc_interrupt, 0, dev->name, dev)) | 1346 | if (request_irq(self->io.irq, ali_ircc_interrupt, 0, dev->name, dev)) |
1330 | { | 1347 | { |
1331 | IRDA_WARNING("%s, unable to allocate irq=%d\n", driver_name, | 1348 | IRDA_WARNING("%s, unable to allocate irq=%d\n", |
1349 | ALI_IRCC_DRIVER_NAME, | ||
1332 | self->io.irq); | 1350 | self->io.irq); |
1333 | return -EAGAIN; | 1351 | return -EAGAIN; |
1334 | } | 1352 | } |
@@ -1338,7 +1356,8 @@ static int ali_ircc_net_open(struct net_device *dev) | |||
1338 | * failure. | 1356 | * failure. |
1339 | */ | 1357 | */ |
1340 | if (request_dma(self->io.dma, dev->name)) { | 1358 | if (request_dma(self->io.dma, dev->name)) { |
1341 | IRDA_WARNING("%s, unable to allocate dma=%d\n", driver_name, | 1359 | IRDA_WARNING("%s, unable to allocate dma=%d\n", |
1360 | ALI_IRCC_DRIVER_NAME, | ||
1342 | self->io.dma); | 1361 | self->io.dma); |
1343 | free_irq(self->io.irq, self); | 1362 | free_irq(self->io.irq, self); |
1344 | return -EAGAIN; | 1363 | return -EAGAIN; |
@@ -2108,61 +2127,38 @@ static struct net_device_stats *ali_ircc_net_get_stats(struct net_device *dev) | |||
2108 | return &self->stats; | 2127 | return &self->stats; |
2109 | } | 2128 | } |
2110 | 2129 | ||
2111 | static void ali_ircc_suspend(struct ali_ircc_cb *self) | 2130 | static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state) |
2112 | { | 2131 | { |
2113 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 2132 | struct ali_ircc_cb *self = platform_get_drvdata(dev); |
2114 | 2133 | ||
2115 | IRDA_MESSAGE("%s, Suspending\n", driver_name); | 2134 | IRDA_MESSAGE("%s, Suspending\n", ALI_IRCC_DRIVER_NAME); |
2116 | 2135 | ||
2117 | if (self->io.suspended) | 2136 | if (self->io.suspended) |
2118 | return; | 2137 | return 0; |
2119 | 2138 | ||
2120 | ali_ircc_net_close(self->netdev); | 2139 | ali_ircc_net_close(self->netdev); |
2121 | 2140 | ||
2122 | self->io.suspended = 1; | 2141 | self->io.suspended = 1; |
2123 | 2142 | ||
2124 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 2143 | return 0; |
2125 | } | 2144 | } |
2126 | 2145 | ||
2127 | static void ali_ircc_wakeup(struct ali_ircc_cb *self) | 2146 | static int ali_ircc_resume(struct platform_device *dev) |
2128 | { | 2147 | { |
2129 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 2148 | struct ali_ircc_cb *self = platform_get_drvdata(dev); |
2130 | 2149 | ||
2131 | if (!self->io.suspended) | 2150 | if (!self->io.suspended) |
2132 | return; | 2151 | return 0; |
2133 | 2152 | ||
2134 | ali_ircc_net_open(self->netdev); | 2153 | ali_ircc_net_open(self->netdev); |
2135 | 2154 | ||
2136 | IRDA_MESSAGE("%s, Waking up\n", driver_name); | 2155 | IRDA_MESSAGE("%s, Waking up\n", ALI_IRCC_DRIVER_NAME); |
2137 | 2156 | ||
2138 | self->io.suspended = 0; | 2157 | self->io.suspended = 0; |
2139 | |||
2140 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | ||
2141 | } | ||
2142 | 2158 | ||
2143 | static int ali_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data) | ||
2144 | { | ||
2145 | struct ali_ircc_cb *self = (struct ali_ircc_cb*) dev->data; | ||
2146 | |||
2147 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | ||
2148 | |||
2149 | if (self) { | ||
2150 | switch (rqst) { | ||
2151 | case PM_SUSPEND: | ||
2152 | ali_ircc_suspend(self); | ||
2153 | break; | ||
2154 | case PM_RESUME: | ||
2155 | ali_ircc_wakeup(self); | ||
2156 | break; | ||
2157 | } | ||
2158 | } | ||
2159 | |||
2160 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | ||
2161 | |||
2162 | return 0; | 2159 | return 0; |
2163 | } | 2160 | } |
2164 | 2161 | ||
2165 | |||
2166 | /* ALi Chip Function */ | 2162 | /* ALi Chip Function */ |
2167 | 2163 | ||
2168 | static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable) | 2164 | static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable) |
diff --git a/drivers/net/irda/irda-usb.c b/drivers/net/irda/irda-usb.c index cd87593e4e8a..844fa74ac9ec 100644 --- a/drivers/net/irda/irda-usb.c +++ b/drivers/net/irda/irda-usb.c | |||
@@ -83,9 +83,9 @@ static struct usb_device_id dongles[] = { | |||
83 | /* Extended Systems, Inc., XTNDAccess IrDA USB (ESI-9685) */ | 83 | /* Extended Systems, Inc., XTNDAccess IrDA USB (ESI-9685) */ |
84 | { USB_DEVICE(0x8e9, 0x100), .driver_info = IUC_SPEED_BUG | IUC_NO_WINDOW }, | 84 | { USB_DEVICE(0x8e9, 0x100), .driver_info = IUC_SPEED_BUG | IUC_NO_WINDOW }, |
85 | /* SigmaTel STIR4210/4220/4116 USB IrDA (VFIR) Bridge */ | 85 | /* SigmaTel STIR4210/4220/4116 USB IrDA (VFIR) Bridge */ |
86 | { USB_DEVICE(0x66f, 0x4210), .driver_info = IUC_STIR_4210 | IUC_SPEED_BUG }, | 86 | { USB_DEVICE(0x66f, 0x4210), .driver_info = IUC_STIR421X | IUC_SPEED_BUG }, |
87 | { USB_DEVICE(0x66f, 0x4220), .driver_info = IUC_STIR_4210 | IUC_SPEED_BUG }, | 87 | { USB_DEVICE(0x66f, 0x4220), .driver_info = IUC_STIR421X | IUC_SPEED_BUG }, |
88 | { USB_DEVICE(0x66f, 0x4116), .driver_info = IUC_STIR_4210 | IUC_SPEED_BUG }, | 88 | { USB_DEVICE(0x66f, 0x4116), .driver_info = IUC_STIR421X | IUC_SPEED_BUG }, |
89 | { .match_flags = USB_DEVICE_ID_MATCH_INT_CLASS | | 89 | { .match_flags = USB_DEVICE_ID_MATCH_INT_CLASS | |
90 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, | 90 | USB_DEVICE_ID_MATCH_INT_SUBCLASS, |
91 | .bInterfaceClass = USB_CLASS_APP_SPEC, | 91 | .bInterfaceClass = USB_CLASS_APP_SPEC, |
@@ -154,7 +154,7 @@ static void irda_usb_build_header(struct irda_usb_cb *self, | |||
154 | * and if either speed or xbofs (or both) needs | 154 | * and if either speed or xbofs (or both) needs |
155 | * to be changed. | 155 | * to be changed. |
156 | */ | 156 | */ |
157 | if (self->capability & IUC_STIR_4210 && | 157 | if (self->capability & IUC_STIR421X && |
158 | ((self->new_speed != -1) || (self->new_xbofs != -1))) { | 158 | ((self->new_speed != -1) || (self->new_xbofs != -1))) { |
159 | 159 | ||
160 | /* With STIR421x, speed and xBOFs must be set at the same | 160 | /* With STIR421x, speed and xBOFs must be set at the same |
@@ -318,7 +318,7 @@ static void irda_usb_change_speed_xbofs(struct irda_usb_cb *self) | |||
318 | /* Set the new speed and xbofs in this fake frame */ | 318 | /* Set the new speed and xbofs in this fake frame */ |
319 | irda_usb_build_header(self, frame, 1); | 319 | irda_usb_build_header(self, frame, 1); |
320 | 320 | ||
321 | if ( self->capability & IUC_STIR_4210 ) { | 321 | if (self->capability & IUC_STIR421X) { |
322 | if (frame[0] == 0) return ; // do nothing if no change | 322 | if (frame[0] == 0) return ; // do nothing if no change |
323 | frame[1] = 0; // other parameters don't change here | 323 | frame[1] = 0; // other parameters don't change here |
324 | frame[2] = 0; | 324 | frame[2] = 0; |
@@ -455,7 +455,7 @@ static int irda_usb_hard_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
455 | 455 | ||
456 | /* Change setting for next frame */ | 456 | /* Change setting for next frame */ |
457 | 457 | ||
458 | if ( self->capability & IUC_STIR_4210 ) { | 458 | if (self->capability & IUC_STIR421X) { |
459 | __u8 turnaround_time; | 459 | __u8 turnaround_time; |
460 | __u8* frame; | 460 | __u8* frame; |
461 | turnaround_time = get_turnaround_time( skb ); | 461 | turnaround_time = get_turnaround_time( skb ); |
@@ -897,10 +897,13 @@ static void irda_usb_receive(struct urb *urb, struct pt_regs *regs) | |||
897 | docopy = (urb->actual_length < IRDA_RX_COPY_THRESHOLD); | 897 | docopy = (urb->actual_length < IRDA_RX_COPY_THRESHOLD); |
898 | 898 | ||
899 | /* Allocate a new skb */ | 899 | /* Allocate a new skb */ |
900 | if ( self->capability & IUC_STIR_4210 ) | 900 | if (self->capability & IUC_STIR421X) |
901 | newskb = dev_alloc_skb(docopy ? urb->actual_length : IRDA_SKB_MAX_MTU + USB_IRDA_SIGMATEL_HEADER); | 901 | newskb = dev_alloc_skb(docopy ? urb->actual_length : |
902 | IRDA_SKB_MAX_MTU + | ||
903 | USB_IRDA_STIR421X_HEADER); | ||
902 | else | 904 | else |
903 | newskb = dev_alloc_skb(docopy ? urb->actual_length : IRDA_SKB_MAX_MTU); | 905 | newskb = dev_alloc_skb(docopy ? urb->actual_length : |
906 | IRDA_SKB_MAX_MTU); | ||
904 | 907 | ||
905 | if (!newskb) { | 908 | if (!newskb) { |
906 | self->stats.rx_dropped++; | 909 | self->stats.rx_dropped++; |
@@ -1022,188 +1025,140 @@ static int irda_usb_is_receiving(struct irda_usb_cb *self) | |||
1022 | return 0; /* For now */ | 1025 | return 0; /* For now */ |
1023 | } | 1026 | } |
1024 | 1027 | ||
1025 | 1028 | #define STIR421X_PATCH_PRODUCT_VER "Product Version: " | |
1026 | #define STIR421X_PATCH_PRODUCT_VERSION_STR "Product Version: " | 1029 | #define STIR421X_PATCH_STMP_TAG "STMP" |
1027 | #define STIR421X_PATCH_COMPONENT_VERSION_STR "Component Version: " | 1030 | #define STIR421X_PATCH_CODE_OFFSET 512 /* patch image starts before here */ |
1028 | #define STIR421X_PATCH_DATA_TAG_STR "STMP" | 1031 | /* marks end of patch file header (PC DOS text file EOF character) */ |
1029 | #define STIR421X_PATCH_FILE_VERSION_MAX_OFFSET 512 /* version info is before here */ | 1032 | #define STIR421X_PATCH_END_OF_HDR_TAG 0x1A |
1030 | #define STIR421X_PATCH_FILE_IMAGE_MAX_OFFSET 512 /* patch image starts before here */ | 1033 | #define STIR421X_PATCH_BLOCK_SIZE 1023 |
1031 | #define STIR421X_PATCH_FILE_END_OF_HEADER_TAG 0x1A /* marks end of patch file header (PC DOS text file EOF character) */ | ||
1032 | 1034 | ||
1033 | /* | 1035 | /* |
1034 | * Known firmware patches for STIR421x dongles | 1036 | * Function stir421x_fwupload (struct irda_usb_cb *self, |
1037 | * unsigned char *patch, | ||
1038 | * const unsigned int patch_len) | ||
1039 | * | ||
1040 | * Upload firmware code to SigmaTel 421X IRDA-USB dongle | ||
1035 | */ | 1041 | */ |
1036 | static char * stir421x_patches[] = { | 1042 | static int stir421x_fw_upload(struct irda_usb_cb *self, |
1037 | "42101001.sb", | 1043 | unsigned char *patch, |
1038 | "42101002.sb", | 1044 | const unsigned int patch_len) |
1039 | }; | ||
1040 | |||
1041 | static int stir421x_get_patch_version(unsigned char * patch, const unsigned long patch_len) | ||
1042 | { | 1045 | { |
1043 | unsigned int version_offset; | 1046 | int ret = -ENOMEM; |
1044 | unsigned long version_major, version_minor, version_build; | 1047 | int actual_len = 0; |
1045 | unsigned char * version_start; | 1048 | unsigned int i; |
1046 | int version_found = 0; | 1049 | unsigned int block_size = 0; |
1047 | 1050 | unsigned char *patch_block; | |
1048 | for (version_offset = 0; | 1051 | |
1049 | version_offset < STIR421X_PATCH_FILE_END_OF_HEADER_TAG; | 1052 | patch_block = kzalloc(STIR421X_PATCH_BLOCK_SIZE, GFP_KERNEL); |
1050 | version_offset++) { | 1053 | if (patch_block == NULL) |
1051 | if (!memcmp(patch + version_offset, | 1054 | return -ENOMEM; |
1052 | STIR421X_PATCH_PRODUCT_VERSION_STR, | 1055 | |
1053 | sizeof(STIR421X_PATCH_PRODUCT_VERSION_STR) - 1)) { | 1056 | /* break up patch into 1023-byte sections */ |
1054 | version_found = 1; | 1057 | for (i = 0; i < patch_len; i += block_size) { |
1055 | version_start = patch + | 1058 | block_size = patch_len - i; |
1056 | version_offset + | 1059 | |
1057 | sizeof(STIR421X_PATCH_PRODUCT_VERSION_STR) - 1; | 1060 | if (block_size > STIR421X_PATCH_BLOCK_SIZE) |
1058 | break; | 1061 | block_size = STIR421X_PATCH_BLOCK_SIZE; |
1059 | } | 1062 | |
1063 | /* upload the patch section */ | ||
1064 | memcpy(patch_block, patch + i, block_size); | ||
1065 | |||
1066 | ret = usb_bulk_msg(self->usbdev, | ||
1067 | usb_sndbulkpipe(self->usbdev, | ||
1068 | self->bulk_out_ep), | ||
1069 | patch_block, block_size, | ||
1070 | &actual_len, msecs_to_jiffies(500)); | ||
1071 | IRDA_DEBUG(3,"%s(): Bulk send %u bytes, ret=%d\n", | ||
1072 | __FUNCTION__, actual_len, ret); | ||
1073 | |||
1074 | if (ret < 0) | ||
1075 | break; | ||
1060 | } | 1076 | } |
1061 | 1077 | ||
1062 | /* We couldn't find a product version on this patch */ | 1078 | kfree(patch_block); |
1063 | if (!version_found) | ||
1064 | return -EINVAL; | ||
1065 | |||
1066 | /* Let's check if the product version is dotted */ | ||
1067 | if (version_start[3] != '.' || | ||
1068 | version_start[7] != '.') | ||
1069 | return -EINVAL; | ||
1070 | |||
1071 | version_major = simple_strtoul(version_start, NULL, 10); | ||
1072 | version_minor = simple_strtoul(version_start + 4, NULL, 10); | ||
1073 | version_build = simple_strtoul(version_start + 8, NULL, 10); | ||
1074 | |||
1075 | IRDA_DEBUG(2, "%s(), Major: %ld Minor: %ld Build: %ld\n", | ||
1076 | __FUNCTION__, | ||
1077 | version_major, version_minor, version_build); | ||
1078 | |||
1079 | return (((version_major) << 12) + | ||
1080 | ((version_minor) << 8) + | ||
1081 | ((version_build / 10) << 4) + | ||
1082 | (version_build % 10)); | ||
1083 | |||
1084 | } | ||
1085 | |||
1086 | |||
1087 | static int stir421x_upload_patch (struct irda_usb_cb *self, | ||
1088 | unsigned char * patch, | ||
1089 | const unsigned int patch_len) | ||
1090 | { | ||
1091 | int retval = 0; | ||
1092 | int actual_len; | ||
1093 | unsigned int i = 0, download_amount = 0; | ||
1094 | unsigned char * patch_chunk; | ||
1095 | |||
1096 | IRDA_DEBUG (2, "%s(), Uploading STIR421x Patch\n", __FUNCTION__); | ||
1097 | |||
1098 | patch_chunk = kzalloc(STIR421X_MAX_PATCH_DOWNLOAD_SIZE, GFP_KERNEL); | ||
1099 | if (patch_chunk == NULL) | ||
1100 | return -ENOMEM; | ||
1101 | |||
1102 | /* break up patch into 1023-byte sections */ | ||
1103 | for (i = 0; retval >= 0 && i < patch_len; i += download_amount) { | ||
1104 | download_amount = patch_len - i; | ||
1105 | if (download_amount > STIR421X_MAX_PATCH_DOWNLOAD_SIZE) | ||
1106 | download_amount = STIR421X_MAX_PATCH_DOWNLOAD_SIZE; | ||
1107 | |||
1108 | /* download the patch section */ | ||
1109 | memcpy(patch_chunk, patch + i, download_amount); | ||
1110 | |||
1111 | retval = usb_bulk_msg (self->usbdev, | ||
1112 | usb_sndbulkpipe (self->usbdev, | ||
1113 | self->bulk_out_ep), | ||
1114 | patch_chunk, download_amount, | ||
1115 | &actual_len, msecs_to_jiffies (500)); | ||
1116 | IRDA_DEBUG (2, "%s(), Sent %u bytes\n", __FUNCTION__, | ||
1117 | actual_len); | ||
1118 | if (retval == 0) | ||
1119 | mdelay(10); | ||
1120 | } | ||
1121 | |||
1122 | kfree(patch_chunk); | ||
1123 | |||
1124 | if (i != patch_len) { | ||
1125 | IRDA_ERROR ("%s(), Pushed %d bytes (!= patch_len (%d))\n", | ||
1126 | __FUNCTION__, i, patch_len); | ||
1127 | retval = -EIO; | ||
1128 | } | ||
1129 | |||
1130 | if (retval < 0) | ||
1131 | /* todo - mark device as not ready */ | ||
1132 | IRDA_ERROR ("%s(), STIR421x patch upload failed (%d)\n", | ||
1133 | __FUNCTION__, retval); | ||
1134 | |||
1135 | return retval; | ||
1136 | } | ||
1137 | 1079 | ||
1080 | return ret; | ||
1081 | } | ||
1138 | 1082 | ||
1083 | /* | ||
1084 | * Function stir421x_patch_device(struct irda_usb_cb *self) | ||
1085 | * | ||
1086 | * Get a firmware code from userspase using hotplug request_firmware() call | ||
1087 | */ | ||
1139 | static int stir421x_patch_device(struct irda_usb_cb *self) | 1088 | static int stir421x_patch_device(struct irda_usb_cb *self) |
1140 | { | 1089 | { |
1141 | unsigned int i, patch_found = 0, data_found = 0, data_offset; | 1090 | unsigned int i; |
1142 | int patch_version, ret = 0; | 1091 | int ret; |
1143 | const struct firmware *fw_entry; | 1092 | char stir421x_fw_name[11]; |
1144 | 1093 | const struct firmware *fw; | |
1145 | for (i = 0; i < ARRAY_SIZE(stir421x_patches); i++) { | 1094 | unsigned char *fw_version_ptr; /* pointer to version string */ |
1146 | if(request_firmware(&fw_entry, stir421x_patches[i], &self->usbdev->dev) != 0) { | 1095 | unsigned long fw_version = 0; |
1147 | IRDA_ERROR( "%s(), Patch %s is not available\n", __FUNCTION__, stir421x_patches[i]); | 1096 | |
1148 | continue; | 1097 | /* |
1149 | } | 1098 | * Known firmware patch file names for STIR421x dongles |
1150 | 1099 | * are "42101001.sb" or "42101002.sb" | |
1151 | /* We found a patch from userspace */ | 1100 | */ |
1152 | patch_version = stir421x_get_patch_version (fw_entry->data, fw_entry->size); | 1101 | sprintf(stir421x_fw_name, "4210%4X.sb", |
1153 | 1102 | self->usbdev->descriptor.bcdDevice); | |
1154 | if (patch_version < 0) { | 1103 | ret = request_firmware(&fw, stir421x_fw_name, &self->usbdev->dev); |
1155 | /* Couldn't fetch a version, let's move on to the next file */ | 1104 | if (ret < 0) |
1156 | IRDA_ERROR("%s(), version parsing failed\n", __FUNCTION__); | 1105 | return ret; |
1157 | ret = patch_version; | 1106 | |
1158 | release_firmware(fw_entry); | 1107 | /* We get a patch from userspace */ |
1159 | continue; | 1108 | IRDA_MESSAGE("%s(): Received firmware %s (%u bytes)\n", |
1160 | } | 1109 | __FUNCTION__, stir421x_fw_name, fw->size); |
1161 | 1110 | ||
1162 | if (patch_version != self->usbdev->descriptor.bcdDevice) { | 1111 | ret = -EINVAL; |
1163 | /* Patch version and device don't match */ | 1112 | |
1164 | IRDA_ERROR ("%s(), wrong patch version (%d <-> %d)\n", | 1113 | /* Get the bcd product version */ |
1165 | __FUNCTION__, | 1114 | if (!memcmp(fw->data, STIR421X_PATCH_PRODUCT_VER, |
1166 | patch_version, self->usbdev->descriptor.bcdDevice); | 1115 | sizeof(STIR421X_PATCH_PRODUCT_VER) - 1)) { |
1167 | ret = -EINVAL; | 1116 | fw_version_ptr = fw->data + |
1168 | release_firmware(fw_entry); | 1117 | sizeof(STIR421X_PATCH_PRODUCT_VER) - 1; |
1169 | continue; | 1118 | |
1170 | } | 1119 | /* Let's check if the product version is dotted */ |
1171 | 1120 | if (fw_version_ptr[3] == '.' && | |
1172 | /* If we're here, we've found a correct patch */ | 1121 | fw_version_ptr[7] == '.') { |
1173 | patch_found = 1; | 1122 | unsigned long major, minor, build; |
1174 | break; | 1123 | major = simple_strtoul(fw_version_ptr, NULL, 10); |
1175 | 1124 | minor = simple_strtoul(fw_version_ptr + 4, NULL, 10); | |
1176 | } | 1125 | build = simple_strtoul(fw_version_ptr + 8, NULL, 10); |
1177 | 1126 | ||
1178 | /* We couldn't find a valid firmware, let's leave */ | 1127 | fw_version = (major << 12) |
1179 | if (!patch_found) | 1128 | + (minor << 8) |
1180 | return ret; | 1129 | + ((build / 10) << 4) |
1181 | 1130 | + (build % 10); | |
1182 | /* The actual image starts after the "STMP" keyword */ | 1131 | |
1183 | for (data_offset = 0; data_offset < STIR421X_PATCH_FILE_IMAGE_MAX_OFFSET; data_offset++) { | 1132 | IRDA_DEBUG(3, "%s(): Firmware Product version %ld\n", |
1184 | if (!memcmp(fw_entry->data + data_offset, | 1133 | __FUNCTION__, fw_version); |
1185 | STIR421X_PATCH_DATA_TAG_STR, | 1134 | } |
1186 | sizeof(STIR421X_PATCH_FILE_IMAGE_MAX_OFFSET))) { | 1135 | } |
1187 | IRDA_DEBUG(2, "%s(), found patch data for STIR421x at offset %d\n", | 1136 | |
1188 | __FUNCTION__, data_offset); | 1137 | if (self->usbdev->descriptor.bcdDevice == fw_version) { |
1189 | data_found = 1; | 1138 | /* |
1190 | break; | 1139 | * If we're here, we've found a correct patch |
1191 | } | 1140 | * The actual image starts after the "STMP" keyword |
1192 | } | 1141 | * so forward to the firmware header tag |
1193 | 1142 | */ | |
1194 | /* We couldn't find "STMP" from the header */ | 1143 | for (i = 0; (fw->data[i] != STIR421X_PATCH_END_OF_HDR_TAG) |
1195 | if (!data_found) | 1144 | && (i < fw->size); i++) ; |
1196 | return -EINVAL; | 1145 | /* here we check for the out of buffer case */ |
1197 | 1146 | if ((STIR421X_PATCH_END_OF_HDR_TAG == fw->data[i]) | |
1198 | /* Let's upload the patch to the target */ | 1147 | && (i < STIR421X_PATCH_CODE_OFFSET)) { |
1199 | ret = stir421x_upload_patch(self, | 1148 | if (!memcmp(fw->data + i + 1, STIR421X_PATCH_STMP_TAG, |
1200 | &fw_entry->data[data_offset + sizeof(STIR421X_PATCH_FILE_IMAGE_MAX_OFFSET)], | 1149 | sizeof(STIR421X_PATCH_STMP_TAG) - 1)) { |
1201 | fw_entry->size - (data_offset + sizeof(STIR421X_PATCH_FILE_IMAGE_MAX_OFFSET))); | 1150 | |
1202 | 1151 | /* We can upload the patch to the target */ | |
1203 | release_firmware(fw_entry); | 1152 | i += sizeof(STIR421X_PATCH_STMP_TAG); |
1204 | 1153 | ret = stir421x_fw_upload(self, &fw->data[i], | |
1205 | return ret; | 1154 | fw->size - i); |
1206 | 1155 | } | |
1156 | } | ||
1157 | } | ||
1158 | |||
1159 | release_firmware(fw); | ||
1160 | |||
1161 | return ret; | ||
1207 | } | 1162 | } |
1208 | 1163 | ||
1209 | 1164 | ||
@@ -1702,12 +1657,12 @@ static int irda_usb_probe(struct usb_interface *intf, | |||
1702 | init_timer(&self->rx_defer_timer); | 1657 | init_timer(&self->rx_defer_timer); |
1703 | 1658 | ||
1704 | self->capability = id->driver_info; | 1659 | self->capability = id->driver_info; |
1705 | self->needspatch = ((self->capability & IUC_STIR_4210) != 0) ; | 1660 | self->needspatch = ((self->capability & IUC_STIR421X) != 0); |
1706 | 1661 | ||
1707 | /* Create all of the needed urbs */ | 1662 | /* Create all of the needed urbs */ |
1708 | if (self->capability & IUC_STIR_4210) { | 1663 | if (self->capability & IUC_STIR421X) { |
1709 | self->max_rx_urb = IU_SIGMATEL_MAX_RX_URBS; | 1664 | self->max_rx_urb = IU_SIGMATEL_MAX_RX_URBS; |
1710 | self->header_length = USB_IRDA_SIGMATEL_HEADER; | 1665 | self->header_length = USB_IRDA_STIR421X_HEADER; |
1711 | } else { | 1666 | } else { |
1712 | self->max_rx_urb = IU_MAX_RX_URBS; | 1667 | self->max_rx_urb = IU_MAX_RX_URBS; |
1713 | self->header_length = USB_IRDA_HEADER; | 1668 | self->header_length = USB_IRDA_HEADER; |
@@ -1813,8 +1768,8 @@ static int irda_usb_probe(struct usb_interface *intf, | |||
1813 | /* Now we fetch and upload the firmware patch */ | 1768 | /* Now we fetch and upload the firmware patch */ |
1814 | ret = stir421x_patch_device(self); | 1769 | ret = stir421x_patch_device(self); |
1815 | self->needspatch = (ret < 0); | 1770 | self->needspatch = (ret < 0); |
1816 | if (ret < 0) { | 1771 | if (self->needspatch) { |
1817 | printk("patch_device failed\n"); | 1772 | IRDA_ERROR("STIR421X: Couldn't upload patch\n"); |
1818 | goto err_out_5; | 1773 | goto err_out_5; |
1819 | } | 1774 | } |
1820 | 1775 | ||
diff --git a/drivers/net/irda/irda-usb.h b/drivers/net/irda/irda-usb.h index d833db52cebf..6b2271f18e77 100644 --- a/drivers/net/irda/irda-usb.h +++ b/drivers/net/irda/irda-usb.h | |||
@@ -34,9 +34,6 @@ | |||
34 | #include <net/irda/irda.h> | 34 | #include <net/irda/irda.h> |
35 | #include <net/irda/irda_device.h> /* struct irlap_cb */ | 35 | #include <net/irda/irda_device.h> /* struct irlap_cb */ |
36 | 36 | ||
37 | #define PATCH_FILE_SIZE_MAX 65536 | ||
38 | #define PATCH_FILE_SIZE_MIN 80 | ||
39 | |||
40 | #define RX_COPY_THRESHOLD 200 | 37 | #define RX_COPY_THRESHOLD 200 |
41 | #define IRDA_USB_MAX_MTU 2051 | 38 | #define IRDA_USB_MAX_MTU 2051 |
42 | #define IRDA_USB_SPEED_MTU 64 /* Weird, but work like this */ | 39 | #define IRDA_USB_SPEED_MTU 64 /* Weird, but work like this */ |
@@ -107,14 +104,15 @@ | |||
107 | #define IUC_SMALL_PKT 0x10 /* Device doesn't behave with big Rx packets */ | 104 | #define IUC_SMALL_PKT 0x10 /* Device doesn't behave with big Rx packets */ |
108 | #define IUC_MAX_WINDOW 0x20 /* Device underestimate the Rx window */ | 105 | #define IUC_MAX_WINDOW 0x20 /* Device underestimate the Rx window */ |
109 | #define IUC_MAX_XBOFS 0x40 /* Device need more xbofs than advertised */ | 106 | #define IUC_MAX_XBOFS 0x40 /* Device need more xbofs than advertised */ |
110 | #define IUC_STIR_4210 0x80 /* SigmaTel 4210/4220/4116 VFIR */ | 107 | #define IUC_STIR421X 0x80 /* SigmaTel 4210/4220/4116 VFIR */ |
111 | 108 | ||
112 | /* USB class definitions */ | 109 | /* USB class definitions */ |
113 | #define USB_IRDA_HEADER 0x01 | 110 | #define USB_IRDA_HEADER 0x01 |
114 | #define USB_CLASS_IRDA 0x02 /* USB_CLASS_APP_SPEC subclass */ | 111 | #define USB_CLASS_IRDA 0x02 /* USB_CLASS_APP_SPEC subclass */ |
115 | #define USB_DT_IRDA 0x21 | 112 | #define USB_DT_IRDA 0x21 |
116 | #define USB_IRDA_SIGMATEL_HEADER 0x03 | 113 | #define USB_IRDA_STIR421X_HEADER 0x03 |
117 | #define IU_SIGMATEL_MAX_RX_URBS (IU_MAX_ACTIVE_RX_URBS + USB_IRDA_SIGMATEL_HEADER) | 114 | #define IU_SIGMATEL_MAX_RX_URBS (IU_MAX_ACTIVE_RX_URBS + \ |
115 | USB_IRDA_STIR421X_HEADER) | ||
118 | 116 | ||
119 | struct irda_class_desc { | 117 | struct irda_class_desc { |
120 | __u8 bLength; | 118 | __u8 bLength; |
diff --git a/drivers/net/irda/mcs7780.c b/drivers/net/irda/mcs7780.c new file mode 100644 index 000000000000..754297fc8f22 --- /dev/null +++ b/drivers/net/irda/mcs7780.c | |||
@@ -0,0 +1,1009 @@ | |||
1 | /***************************************************************************** | ||
2 | * | ||
3 | * Filename: mcs7780.c | ||
4 | * Version: 0.4-alpha | ||
5 | * Description: Irda MosChip USB Dongle Driver | ||
6 | * Authors: Lukasz Stelmach <stlman@poczta.fm> | ||
7 | * Brian Pugh <bpugh@cs.pdx.edu> | ||
8 | * Judy Fischbach <jfisch@cs.pdx.edu> | ||
9 | * | ||
10 | * Based on stir4200 driver, but some things done differently. | ||
11 | * Based on earlier driver by Paul Stewart <stewart@parc.com> | ||
12 | * | ||
13 | * Copyright (C) 2000, Roman Weissgaerber <weissg@vienna.at> | ||
14 | * Copyright (C) 2001, Dag Brattli <dag@brattli.net> | ||
15 | * Copyright (C) 2001, Jean Tourrilhes <jt@hpl.hp.com> | ||
16 | * Copyright (C) 2004, Stephen Hemminger <shemminger@osdl.org> | ||
17 | * Copyright (C) 2005, Lukasz Stelmach <stlman@poczta.fm> | ||
18 | * Copyright (C) 2005, Brian Pugh <bpugh@cs.pdx.edu> | ||
19 | * Copyright (C) 2005, Judy Fischbach <jfisch@cs.pdx.edu> | ||
20 | * | ||
21 | * This program is free software; you can redistribute it and/or modify | ||
22 | * it under the terms of the GNU General Public License as published by | ||
23 | * the Free Software Foundation; either version 2 of the License, or | ||
24 | * (at your option) any later version. | ||
25 | * | ||
26 | * This program is distributed in the hope that it will be useful, | ||
27 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
28 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
29 | * GNU General Public License for more details. | ||
30 | * | ||
31 | * You should have received a copy of the GNU General Public License | ||
32 | * along with this program; if not, write to the Free Software | ||
33 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
34 | * | ||
35 | *****************************************************************************/ | ||
36 | |||
37 | /* | ||
38 | * MCS7780 is a simple USB to IrDA bridge by MosChip. It is neither | ||
39 | * compatibile with irda-usb nor with stir4200. Although it is quite | ||
40 | * similar to the later as far as general idea of operation is concerned. | ||
41 | * That is it requires the software to do all the framing job at SIR speeds. | ||
42 | * The hardware does take care of the framing at MIR and FIR speeds. | ||
43 | * It supports all speeds from 2400 through 4Mbps | ||
44 | */ | ||
45 | |||
46 | #include <linux/module.h> | ||
47 | #include <linux/moduleparam.h> | ||
48 | #include <linux/config.h> | ||
49 | #include <linux/kernel.h> | ||
50 | #include <linux/types.h> | ||
51 | #include <linux/errno.h> | ||
52 | #include <linux/init.h> | ||
53 | #include <linux/slab.h> | ||
54 | #include <linux/module.h> | ||
55 | #include <linux/kref.h> | ||
56 | #include <linux/usb.h> | ||
57 | #include <linux/device.h> | ||
58 | #include <linux/crc32.h> | ||
59 | |||
60 | #include <asm/unaligned.h> | ||
61 | #include <asm/byteorder.h> | ||
62 | #include <asm/uaccess.h> | ||
63 | |||
64 | #include <net/irda/irda.h> | ||
65 | #include <net/irda/wrapper.h> | ||
66 | #include <net/irda/crc.h> | ||
67 | |||
68 | #include "mcs7780.h" | ||
69 | |||
70 | #define MCS_VENDOR_ID 0x9710 | ||
71 | #define MCS_PRODUCT_ID 0x7780 | ||
72 | |||
73 | static struct usb_device_id mcs_table[] = { | ||
74 | /* MosChip Corp., MCS7780 FIR-USB Adapter */ | ||
75 | {USB_DEVICE(MCS_VENDOR_ID, MCS_PRODUCT_ID)}, | ||
76 | {}, | ||
77 | }; | ||
78 | |||
79 | MODULE_AUTHOR("Brian Pugh <bpugh@cs.pdx.edu>"); | ||
80 | MODULE_DESCRIPTION("IrDA-USB Dongle Driver for MosChip MCS7780"); | ||
81 | MODULE_VERSION("0.3alpha"); | ||
82 | MODULE_LICENSE("GPL"); | ||
83 | |||
84 | MODULE_DEVICE_TABLE(usb, mcs_table); | ||
85 | |||
86 | static int qos_mtt_bits = 0x07 /* > 1ms */ ; | ||
87 | module_param(qos_mtt_bits, int, 0); | ||
88 | MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time"); | ||
89 | |||
90 | static int receive_mode = 0x1; | ||
91 | module_param(receive_mode, int, 0); | ||
92 | MODULE_PARM_DESC(receive_mode, | ||
93 | "Receive mode of the device (1:fast, 0:slow, default:1)"); | ||
94 | |||
95 | static int sir_tweak = 1; | ||
96 | module_param(sir_tweak, int, 0444); | ||
97 | MODULE_PARM_DESC(sir_tweak, | ||
98 | "Default pulse width (1:1.6us, 0:3/16 bit, default:1)."); | ||
99 | |||
100 | static int transceiver_type = MCS_TSC_VISHAY; | ||
101 | module_param(transceiver_type, int, 0444); | ||
102 | MODULE_PARM_DESC(transceiver_type, "IR transceiver type, see mcs7780.h."); | ||
103 | |||
104 | struct usb_driver mcs_driver = { | ||
105 | .name = "mcs7780", | ||
106 | .probe = mcs_probe, | ||
107 | .disconnect = mcs_disconnect, | ||
108 | .id_table = mcs_table, | ||
109 | }; | ||
110 | |||
111 | /* speed flag selection by direct addressing. | ||
112 | addr = (speed >> 8) & 0x0f | ||
113 | |||
114 | 0x1 57600 0x2 115200 0x4 1152000 0x5 9600 | ||
115 | 0x6 38400 0x9 2400 0xa 576000 0xb 19200 | ||
116 | |||
117 | 4Mbps (or 2400) must be checked separately. Since it also has | ||
118 | to be programmed in a different manner that is not a big problem. | ||
119 | */ | ||
120 | static __u16 mcs_speed_set[16] = { 0, | ||
121 | MCS_SPEED_57600, | ||
122 | MCS_SPEED_115200, | ||
123 | 0, | ||
124 | MCS_SPEED_1152000, | ||
125 | MCS_SPEED_9600, | ||
126 | MCS_SPEED_38400, | ||
127 | 0, 0, | ||
128 | MCS_SPEED_2400, | ||
129 | MCS_SPEED_576000, | ||
130 | MCS_SPEED_19200, | ||
131 | 0, 0, 0, | ||
132 | }; | ||
133 | |||
134 | /* Set given 16 bit register with a 16 bit value. Send control message | ||
135 | * to set dongle register. */ | ||
136 | static int mcs_set_reg(struct mcs_cb *mcs, __u16 reg, __u16 val) | ||
137 | { | ||
138 | struct usb_device *dev = mcs->usbdev; | ||
139 | return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), MCS_WRREQ, | ||
140 | MCS_WR_RTYPE, val, reg, NULL, 0, | ||
141 | msecs_to_jiffies(MCS_CTRL_TIMEOUT)); | ||
142 | } | ||
143 | |||
144 | /* Get 16 bit register value. Send contol message to read dongle register. */ | ||
145 | static int mcs_get_reg(struct mcs_cb *mcs, __u16 reg, __u16 * val) | ||
146 | { | ||
147 | struct usb_device *dev = mcs->usbdev; | ||
148 | int ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), MCS_RDREQ, | ||
149 | MCS_RD_RTYPE, 0, reg, val, 2, | ||
150 | msecs_to_jiffies(MCS_CTRL_TIMEOUT)); | ||
151 | |||
152 | return ret; | ||
153 | } | ||
154 | |||
155 | /* Setup a communication between mcs7780 and TFDU chips. It is described | ||
156 | * in more detail in the data sheet. The setup sequence puts the the | ||
157 | * vishay tranceiver into high speed mode. It will also receive SIR speed | ||
158 | * packets but at reduced sensitivity. | ||
159 | */ | ||
160 | |||
161 | /* 0: OK 1:ERROR */ | ||
162 | static inline int mcs_setup_transceiver_vishay(struct mcs_cb *mcs) | ||
163 | { | ||
164 | int ret = 0; | ||
165 | __u16 rval; | ||
166 | |||
167 | /* mcs_get_reg should read exactly two bytes from the dongle */ | ||
168 | ret = mcs_get_reg(mcs, MCS_XCVR_REG, &rval); | ||
169 | if (unlikely(ret != 2)) { | ||
170 | ret = -EIO; | ||
171 | goto error; | ||
172 | } | ||
173 | |||
174 | /* The MCS_XCVR_CONF bit puts the transceiver into configuration | ||
175 | * mode. The MCS_MODE0 bit must start out high (1) and then | ||
176 | * transition to low and the MCS_STFIR and MCS_MODE1 bits must | ||
177 | * be low. | ||
178 | */ | ||
179 | rval |= (MCS_MODE0 | MCS_XCVR_CONF); | ||
180 | rval &= ~MCS_STFIR; | ||
181 | rval &= ~MCS_MODE1; | ||
182 | ret = mcs_set_reg(mcs, MCS_XCVR_REG, rval); | ||
183 | if (unlikely(ret)) | ||
184 | goto error; | ||
185 | |||
186 | rval &= ~MCS_MODE0; | ||
187 | ret = mcs_set_reg(mcs, MCS_XCVR_REG, rval); | ||
188 | if (unlikely(ret)) | ||
189 | goto error; | ||
190 | |||
191 | rval &= ~MCS_XCVR_CONF; | ||
192 | ret = mcs_set_reg(mcs, MCS_XCVR_REG, rval); | ||
193 | if (unlikely(ret)) | ||
194 | goto error; | ||
195 | |||
196 | ret = 0; | ||
197 | error: | ||
198 | return ret; | ||
199 | } | ||
200 | |||
201 | /* Setup a communication between mcs7780 and agilent chip. */ | ||
202 | static inline int mcs_setup_transceiver_agilent(struct mcs_cb *mcs) | ||
203 | { | ||
204 | IRDA_WARNING("This transceiver type is not supported yet."); | ||
205 | return 1; | ||
206 | } | ||
207 | |||
208 | /* Setup a communication between mcs7780 and sharp chip. */ | ||
209 | static inline int mcs_setup_transceiver_sharp(struct mcs_cb *mcs) | ||
210 | { | ||
211 | IRDA_WARNING("This transceiver type is not supported yet."); | ||
212 | return 1; | ||
213 | } | ||
214 | |||
215 | /* Common setup for all transceivers */ | ||
216 | static inline int mcs_setup_transceiver(struct mcs_cb *mcs) | ||
217 | { | ||
218 | int ret = 0; | ||
219 | __u16 rval; | ||
220 | char *msg; | ||
221 | |||
222 | msg = "Basic transceiver setup error."; | ||
223 | |||
224 | /* read value of MODE Register, set the DRIVER and RESET bits | ||
225 | * and write value back out to MODE Register | ||
226 | */ | ||
227 | ret = mcs_get_reg(mcs, MCS_MODE_REG, &rval); | ||
228 | if(unlikely(ret != 2)) | ||
229 | goto error; | ||
230 | rval |= MCS_DRIVER; /* put the mcs7780 into configuration mode. */ | ||
231 | ret = mcs_set_reg(mcs, MCS_MODE_REG, rval); | ||
232 | if(unlikely(ret)) | ||
233 | goto error; | ||
234 | |||
235 | rval = 0; /* set min pulse width to 0 initially. */ | ||
236 | ret = mcs_set_reg(mcs, MCS_MINRXPW_REG, rval); | ||
237 | if(unlikely(ret)) | ||
238 | goto error; | ||
239 | |||
240 | ret = mcs_get_reg(mcs, MCS_MODE_REG, &rval); | ||
241 | if(unlikely(ret != 2)) | ||
242 | goto error; | ||
243 | |||
244 | rval &= ~MCS_FIR; /* turn off fir mode. */ | ||
245 | if(mcs->sir_tweak) | ||
246 | rval |= MCS_SIR16US; /* 1.6us pulse width */ | ||
247 | else | ||
248 | rval &= ~MCS_SIR16US; /* 3/16 bit time pulse width */ | ||
249 | |||
250 | /* make sure ask mode and back to back packets are off. */ | ||
251 | rval &= ~(MCS_BBTG | MCS_ASK); | ||
252 | |||
253 | rval &= ~MCS_SPEED_MASK; | ||
254 | rval |= MCS_SPEED_9600; /* make sure initial speed is 9600. */ | ||
255 | mcs->speed = 9600; | ||
256 | mcs->new_speed = 0; /* new_speed is set to 0 */ | ||
257 | rval &= ~MCS_PLLPWDN; /* disable power down. */ | ||
258 | |||
259 | /* make sure device determines direction and that the auto send sip | ||
260 | * pulse are on. | ||
261 | */ | ||
262 | rval |= MCS_DTD | MCS_SIPEN; | ||
263 | |||
264 | ret = mcs_set_reg(mcs, MCS_MODE_REG, rval); | ||
265 | if(unlikely(ret)) | ||
266 | goto error; | ||
267 | |||
268 | msg = "transceiver model specific setup error."; | ||
269 | switch (mcs->transceiver_type) { | ||
270 | case MCS_TSC_VISHAY: | ||
271 | ret = mcs_setup_transceiver_vishay(mcs); | ||
272 | break; | ||
273 | |||
274 | case MCS_TSC_SHARP: | ||
275 | ret = mcs_setup_transceiver_sharp(mcs); | ||
276 | break; | ||
277 | |||
278 | case MCS_TSC_AGILENT: | ||
279 | ret = mcs_setup_transceiver_agilent(mcs); | ||
280 | break; | ||
281 | |||
282 | default: | ||
283 | IRDA_WARNING("Unknown transceiver type: %d", | ||
284 | mcs->transceiver_type); | ||
285 | ret = 1; | ||
286 | } | ||
287 | if (unlikely(ret)) | ||
288 | goto error; | ||
289 | |||
290 | /* If transceiver is not SHARP, then if receive mode set | ||
291 | * on the RXFAST bit in the XCVR Register otherwise unset it | ||
292 | */ | ||
293 | if (mcs->transceiver_type != MCS_TSC_SHARP) { | ||
294 | |||
295 | ret = mcs_get_reg(mcs, MCS_XCVR_REG, &rval); | ||
296 | if (unlikely(ret != 2)) | ||
297 | goto error; | ||
298 | if (mcs->receive_mode) | ||
299 | rval |= MCS_RXFAST; | ||
300 | else | ||
301 | rval &= ~MCS_RXFAST; | ||
302 | ret = mcs_set_reg(mcs, MCS_XCVR_REG, rval); | ||
303 | if (unlikely(ret)) | ||
304 | goto error; | ||
305 | } | ||
306 | |||
307 | msg = "transceiver reset."; | ||
308 | |||
309 | ret = mcs_get_reg(mcs, MCS_MODE_REG, &rval); | ||
310 | if (unlikely(ret != 2)) | ||
311 | goto error; | ||
312 | |||
313 | /* reset the mcs7780 so all changes take effect. */ | ||
314 | rval &= ~MCS_RESET; | ||
315 | ret = mcs_set_reg(mcs, MCS_MODE_REG, rval); | ||
316 | if (unlikely(ret)) | ||
317 | goto error; | ||
318 | else | ||
319 | return ret; | ||
320 | |||
321 | error: | ||
322 | IRDA_ERROR("%s", msg); | ||
323 | return ret; | ||
324 | } | ||
325 | |||
326 | /* Wraps the data in format for SIR */ | ||
327 | static inline int mcs_wrap_sir_skb(struct sk_buff *skb, __u8 * buf) | ||
328 | { | ||
329 | int wraplen; | ||
330 | |||
331 | /* 2: full frame length, including "the length" */ | ||
332 | wraplen = async_wrap_skb(skb, buf + 2, 4094); | ||
333 | |||
334 | wraplen += 2; | ||
335 | buf[0] = wraplen & 0xff; | ||
336 | buf[1] = (wraplen >> 8) & 0xff; | ||
337 | |||
338 | return wraplen; | ||
339 | } | ||
340 | |||
341 | /* Wraps the data in format for FIR */ | ||
342 | static unsigned mcs_wrap_fir_skb(const struct sk_buff *skb, __u8 *buf) | ||
343 | { | ||
344 | unsigned int len = 0; | ||
345 | __u32 fcs = ~(crc32_le(~0, skb->data, skb->len)); | ||
346 | |||
347 | /* add 2 bytes for length value and 4 bytes for fcs. */ | ||
348 | len = skb->len + 6; | ||
349 | |||
350 | /* The mcs7780 requires that the first two bytes are the packet | ||
351 | * length in little endian order. Note: the length value includes | ||
352 | * the two bytes for the length value itself. | ||
353 | */ | ||
354 | buf[0] = len & 0xff; | ||
355 | buf[1] = (len >> 8) & 0xff; | ||
356 | /* copy the data into the tx buffer. */ | ||
357 | memcpy(buf+2, skb->data, skb->len); | ||
358 | /* put the fcs in the last four bytes in little endian order. */ | ||
359 | buf[len - 4] = fcs & 0xff; | ||
360 | buf[len - 3] = (fcs >> 8) & 0xff; | ||
361 | buf[len - 2] = (fcs >> 16) & 0xff; | ||
362 | buf[len - 1] = (fcs >> 24) & 0xff; | ||
363 | |||
364 | return len; | ||
365 | } | ||
366 | |||
367 | /* Wraps the data in format for MIR */ | ||
368 | static unsigned mcs_wrap_mir_skb(const struct sk_buff *skb, __u8 *buf) | ||
369 | { | ||
370 | __u16 fcs = 0; | ||
371 | int len = skb->len + 4; | ||
372 | |||
373 | fcs = ~(irda_calc_crc16(~fcs, skb->data, skb->len)); | ||
374 | /* put the total packet length in first. Note: packet length | ||
375 | * value includes the two bytes that hold the packet length | ||
376 | * itself. | ||
377 | */ | ||
378 | buf[0] = len & 0xff; | ||
379 | buf[1] = (len >> 8) & 0xff; | ||
380 | /* copy the data */ | ||
381 | memcpy(buf+2, skb->data, skb->len); | ||
382 | /* put the fcs in last two bytes in little endian order. */ | ||
383 | buf[len - 2] = fcs & 0xff; | ||
384 | buf[len - 1] = (fcs >> 8) & 0xff; | ||
385 | |||
386 | return len; | ||
387 | } | ||
388 | |||
389 | /* Unwrap received packets at MIR speed. A 16 bit crc_ccitt checksum is | ||
390 | * used for the fcs. When performed over the entire packet the result | ||
391 | * should be GOOD_FCS = 0xf0b8. Hands the unwrapped data off to the IrDA | ||
392 | * layer via a sk_buff. | ||
393 | */ | ||
394 | static void mcs_unwrap_mir(struct mcs_cb *mcs, __u8 *buf, int len) | ||
395 | { | ||
396 | __u16 fcs; | ||
397 | int new_len; | ||
398 | struct sk_buff *skb; | ||
399 | |||
400 | /* Assume that the frames are going to fill a single packet | ||
401 | * rather than span multiple packets. | ||
402 | */ | ||
403 | |||
404 | new_len = len - 2; | ||
405 | if(unlikely(new_len <= 0)) { | ||
406 | IRDA_ERROR("%s short frame length %d\n", | ||
407 | mcs->netdev->name, new_len); | ||
408 | ++mcs->stats.rx_errors; | ||
409 | ++mcs->stats.rx_length_errors; | ||
410 | return; | ||
411 | } | ||
412 | fcs = 0; | ||
413 | fcs = irda_calc_crc16(~fcs, buf, len); | ||
414 | |||
415 | if(fcs != GOOD_FCS) { | ||
416 | IRDA_ERROR("crc error calc 0x%x len %d\n", | ||
417 | fcs, new_len); | ||
418 | mcs->stats.rx_errors++; | ||
419 | mcs->stats.rx_crc_errors++; | ||
420 | return; | ||
421 | } | ||
422 | |||
423 | skb = dev_alloc_skb(new_len + 1); | ||
424 | if(unlikely(!skb)) { | ||
425 | ++mcs->stats.rx_dropped; | ||
426 | return; | ||
427 | } | ||
428 | |||
429 | skb_reserve(skb, 1); | ||
430 | memcpy(skb->data, buf, new_len); | ||
431 | skb_put(skb, new_len); | ||
432 | skb->mac.raw = skb->data; | ||
433 | skb->protocol = htons(ETH_P_IRDA); | ||
434 | skb->dev = mcs->netdev; | ||
435 | |||
436 | netif_rx(skb); | ||
437 | |||
438 | mcs->stats.rx_packets++; | ||
439 | mcs->stats.rx_bytes += new_len; | ||
440 | |||
441 | return; | ||
442 | } | ||
443 | |||
444 | /* Unwrap received packets at FIR speed. A 32 bit crc_ccitt checksum is | ||
445 | * used for the fcs. Hands the unwrapped data off to the IrDA | ||
446 | * layer via a sk_buff. | ||
447 | */ | ||
448 | static void mcs_unwrap_fir(struct mcs_cb *mcs, __u8 *buf, int len) | ||
449 | { | ||
450 | __u32 fcs; | ||
451 | int new_len; | ||
452 | struct sk_buff *skb; | ||
453 | |||
454 | /* Assume that the frames are going to fill a single packet | ||
455 | * rather than span multiple packets. This is most likely a false | ||
456 | * assumption. | ||
457 | */ | ||
458 | |||
459 | new_len = len - 4; | ||
460 | if(unlikely(new_len <= 0)) { | ||
461 | IRDA_ERROR("%s short frame length %d\n", | ||
462 | mcs->netdev->name, new_len); | ||
463 | ++mcs->stats.rx_errors; | ||
464 | ++mcs->stats.rx_length_errors; | ||
465 | return; | ||
466 | } | ||
467 | |||
468 | fcs = ~(crc32_le(~0, buf, new_len)); | ||
469 | if(fcs != le32_to_cpu(get_unaligned((u32 *)(buf+new_len)))) { | ||
470 | IRDA_ERROR("crc error calc 0x%x len %d\n", fcs, new_len); | ||
471 | mcs->stats.rx_errors++; | ||
472 | mcs->stats.rx_crc_errors++; | ||
473 | return; | ||
474 | } | ||
475 | |||
476 | skb = dev_alloc_skb(new_len + 1); | ||
477 | if(unlikely(!skb)) { | ||
478 | ++mcs->stats.rx_dropped; | ||
479 | return; | ||
480 | } | ||
481 | |||
482 | skb_reserve(skb, 1); | ||
483 | memcpy(skb->data, buf, new_len); | ||
484 | skb_put(skb, new_len); | ||
485 | skb->mac.raw = skb->data; | ||
486 | skb->protocol = htons(ETH_P_IRDA); | ||
487 | skb->dev = mcs->netdev; | ||
488 | |||
489 | netif_rx(skb); | ||
490 | |||
491 | mcs->stats.rx_packets++; | ||
492 | mcs->stats.rx_bytes += new_len; | ||
493 | |||
494 | return; | ||
495 | } | ||
496 | |||
497 | |||
498 | /* Allocates urbs for both receive and transmit. | ||
499 | * If alloc fails return error code 0 (fail) otherwise | ||
500 | * return error code 1 (success). | ||
501 | */ | ||
502 | static inline int mcs_setup_urbs(struct mcs_cb *mcs) | ||
503 | { | ||
504 | mcs->rx_urb = NULL; | ||
505 | |||
506 | mcs->tx_urb = usb_alloc_urb(0, GFP_KERNEL); | ||
507 | if (!mcs->tx_urb) | ||
508 | return 0; | ||
509 | |||
510 | mcs->rx_urb = usb_alloc_urb(0, GFP_KERNEL); | ||
511 | if (!mcs->rx_urb) | ||
512 | return 0; | ||
513 | |||
514 | return 1; | ||
515 | } | ||
516 | |||
517 | /* Sets up state to be initially outside frame, gets receive urb, | ||
518 | * sets status to successful and then submits the urb to start | ||
519 | * receiving the data. | ||
520 | */ | ||
521 | static inline int mcs_receive_start(struct mcs_cb *mcs) | ||
522 | { | ||
523 | mcs->rx_buff.in_frame = FALSE; | ||
524 | mcs->rx_buff.state = OUTSIDE_FRAME; | ||
525 | |||
526 | usb_fill_bulk_urb(mcs->rx_urb, mcs->usbdev, | ||
527 | usb_rcvbulkpipe(mcs->usbdev, mcs->ep_in), | ||
528 | mcs->in_buf, 4096, mcs_receive_irq, mcs); | ||
529 | |||
530 | mcs->rx_urb->status = 0; | ||
531 | return usb_submit_urb(mcs->rx_urb, GFP_KERNEL); | ||
532 | } | ||
533 | |||
534 | /* Finds the in and out endpoints for the mcs control block */ | ||
535 | static inline int mcs_find_endpoints(struct mcs_cb *mcs, | ||
536 | struct usb_host_endpoint *ep, int epnum) | ||
537 | { | ||
538 | int i; | ||
539 | int ret = 0; | ||
540 | |||
541 | /* If no place to store the endpoints just return */ | ||
542 | if (!ep) | ||
543 | return ret; | ||
544 | |||
545 | /* cycle through all endpoints, find the first two that are DIR_IN */ | ||
546 | for (i = 0; i < epnum; i++) { | ||
547 | if (ep[i].desc.bEndpointAddress & USB_DIR_IN) | ||
548 | mcs->ep_in = ep[i].desc.bEndpointAddress; | ||
549 | else | ||
550 | mcs->ep_out = ep[i].desc.bEndpointAddress; | ||
551 | |||
552 | /* MosChip says that the chip has only two bulk | ||
553 | * endpoints. Find one for each direction and move on. | ||
554 | */ | ||
555 | if ((mcs->ep_in != 0) && (mcs->ep_out != 0)) { | ||
556 | ret = 1; | ||
557 | break; | ||
558 | } | ||
559 | } | ||
560 | |||
561 | return ret; | ||
562 | } | ||
563 | |||
564 | static void mcs_speed_work(void *arg) | ||
565 | { | ||
566 | struct mcs_cb *mcs = arg; | ||
567 | struct net_device *netdev = mcs->netdev; | ||
568 | |||
569 | mcs_speed_change(mcs); | ||
570 | netif_wake_queue(netdev); | ||
571 | } | ||
572 | |||
573 | /* Function to change the speed of the mcs7780. Fully supports SIR, | ||
574 | * MIR, and FIR speeds. | ||
575 | */ | ||
576 | static int mcs_speed_change(struct mcs_cb *mcs) | ||
577 | { | ||
578 | int ret = 0; | ||
579 | int rst = 0; | ||
580 | int cnt = 0; | ||
581 | __u16 nspeed; | ||
582 | __u16 rval; | ||
583 | |||
584 | nspeed = mcs_speed_set[(mcs->new_speed >> 8) & 0x0f]; | ||
585 | |||
586 | do { | ||
587 | mcs_get_reg(mcs, MCS_RESV_REG, &rval); | ||
588 | } while(cnt++ < 100 && (rval & MCS_IRINTX)); | ||
589 | |||
590 | if(cnt >= 100) { | ||
591 | IRDA_ERROR("unable to change speed"); | ||
592 | ret = -EIO; | ||
593 | goto error; | ||
594 | } | ||
595 | |||
596 | mcs_get_reg(mcs, MCS_MODE_REG, &rval); | ||
597 | |||
598 | /* MINRXPW values recomended by MosChip */ | ||
599 | if (mcs->new_speed <= 115200) { | ||
600 | rval &= ~MCS_FIR; | ||
601 | |||
602 | if ((rst = (mcs->speed > 115200))) | ||
603 | mcs_set_reg(mcs, MCS_MINRXPW_REG, 0); | ||
604 | |||
605 | } else if (mcs->new_speed <= 1152000) { | ||
606 | rval &= ~MCS_FIR; | ||
607 | |||
608 | if ((rst = !(mcs->speed == 576000 || mcs->speed == 1152000))) | ||
609 | mcs_set_reg(mcs, MCS_MINRXPW_REG, 5); | ||
610 | |||
611 | } else { | ||
612 | rval |= MCS_FIR; | ||
613 | |||
614 | if ((rst = (mcs->speed != 4000000))) | ||
615 | mcs_set_reg(mcs, MCS_MINRXPW_REG, 5); | ||
616 | |||
617 | } | ||
618 | |||
619 | rval &= ~MCS_SPEED_MASK; | ||
620 | rval |= nspeed; | ||
621 | |||
622 | ret = mcs_set_reg(mcs, MCS_MODE_REG, rval); | ||
623 | if (unlikely(ret)) | ||
624 | goto error; | ||
625 | |||
626 | if (rst) | ||
627 | switch (mcs->transceiver_type) { | ||
628 | case MCS_TSC_VISHAY: | ||
629 | ret = mcs_setup_transceiver_vishay(mcs); | ||
630 | break; | ||
631 | |||
632 | case MCS_TSC_SHARP: | ||
633 | ret = mcs_setup_transceiver_sharp(mcs); | ||
634 | break; | ||
635 | |||
636 | case MCS_TSC_AGILENT: | ||
637 | ret = mcs_setup_transceiver_agilent(mcs); | ||
638 | break; | ||
639 | |||
640 | default: | ||
641 | ret = 1; | ||
642 | IRDA_WARNING("Unknown transceiver type: %d", | ||
643 | mcs->transceiver_type); | ||
644 | } | ||
645 | if (unlikely(ret)) | ||
646 | goto error; | ||
647 | |||
648 | mcs_get_reg(mcs, MCS_MODE_REG, &rval); | ||
649 | rval &= ~MCS_RESET; | ||
650 | ret = mcs_set_reg(mcs, MCS_MODE_REG, rval); | ||
651 | |||
652 | mcs->speed = mcs->new_speed; | ||
653 | error: | ||
654 | mcs->new_speed = 0; | ||
655 | return ret; | ||
656 | } | ||
657 | |||
658 | /* Ioctl calls not supported at this time. Can be an area of future work. */ | ||
659 | static int mcs_net_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | ||
660 | { | ||
661 | /* struct if_irda_req *irq = (struct if_irda_req *)rq; */ | ||
662 | /* struct mcs_cb *mcs = netdev_priv(netdev); */ | ||
663 | int ret = 0; | ||
664 | |||
665 | switch (cmd) { | ||
666 | default: | ||
667 | ret = -EOPNOTSUPP; | ||
668 | } | ||
669 | |||
670 | return ret; | ||
671 | } | ||
672 | |||
673 | /* Network device is taken down, done by "ifconfig irda0 down" */ | ||
674 | static int mcs_net_close(struct net_device *netdev) | ||
675 | { | ||
676 | int ret = 0; | ||
677 | struct mcs_cb *mcs = netdev_priv(netdev); | ||
678 | |||
679 | /* Stop transmit processing */ | ||
680 | netif_stop_queue(netdev); | ||
681 | |||
682 | /* kill and free the receive and transmit URBs */ | ||
683 | usb_kill_urb(mcs->rx_urb); | ||
684 | usb_free_urb(mcs->rx_urb); | ||
685 | usb_kill_urb(mcs->tx_urb); | ||
686 | usb_free_urb(mcs->tx_urb); | ||
687 | |||
688 | /* Stop and remove instance of IrLAP */ | ||
689 | if (mcs->irlap) | ||
690 | irlap_close(mcs->irlap); | ||
691 | |||
692 | mcs->irlap = NULL; | ||
693 | return ret; | ||
694 | } | ||
695 | |||
696 | /* Network device is taken up, done by "ifconfig irda0 up" */ | ||
697 | static int mcs_net_open(struct net_device *netdev) | ||
698 | { | ||
699 | struct mcs_cb *mcs = netdev_priv(netdev); | ||
700 | char hwname[16]; | ||
701 | int ret = 0; | ||
702 | |||
703 | ret = usb_clear_halt(mcs->usbdev, | ||
704 | usb_sndbulkpipe(mcs->usbdev, mcs->ep_in)); | ||
705 | if (ret) | ||
706 | goto error1; | ||
707 | ret = usb_clear_halt(mcs->usbdev, | ||
708 | usb_rcvbulkpipe(mcs->usbdev, mcs->ep_out)); | ||
709 | if (ret) | ||
710 | goto error1; | ||
711 | |||
712 | ret = mcs_setup_transceiver(mcs); | ||
713 | if (ret) | ||
714 | goto error1; | ||
715 | |||
716 | ret = -ENOMEM; | ||
717 | |||
718 | /* Initialize for SIR/FIR to copy data directly into skb. */ | ||
719 | mcs->receiving = 0; | ||
720 | mcs->rx_buff.truesize = IRDA_SKB_MAX_MTU; | ||
721 | mcs->rx_buff.skb = dev_alloc_skb(IRDA_SKB_MAX_MTU); | ||
722 | if (!mcs->rx_buff.skb) | ||
723 | goto error1; | ||
724 | |||
725 | skb_reserve(mcs->rx_buff.skb, 1); | ||
726 | mcs->rx_buff.head = mcs->rx_buff.skb->data; | ||
727 | do_gettimeofday(&mcs->rx_time); | ||
728 | |||
729 | /* | ||
730 | * Now that everything should be initialized properly, | ||
731 | * Open new IrLAP layer instance to take care of us... | ||
732 | * Note : will send immediately a speed change... | ||
733 | */ | ||
734 | sprintf(hwname, "usb#%d", mcs->usbdev->devnum); | ||
735 | mcs->irlap = irlap_open(netdev, &mcs->qos, hwname); | ||
736 | if (!mcs->irlap) { | ||
737 | IRDA_ERROR("mcs7780: irlap_open failed"); | ||
738 | goto error2; | ||
739 | } | ||
740 | |||
741 | if (!mcs_setup_urbs(mcs)) | ||
742 | goto error3; | ||
743 | |||
744 | ret = mcs_receive_start(mcs); | ||
745 | if (ret) | ||
746 | goto error3; | ||
747 | |||
748 | netif_start_queue(netdev); | ||
749 | return 0; | ||
750 | |||
751 | error3: | ||
752 | irlap_close(mcs->irlap); | ||
753 | error2: | ||
754 | kfree_skb(mcs->rx_buff.skb); | ||
755 | error1: | ||
756 | return ret; | ||
757 | } | ||
758 | |||
759 | |||
760 | /* Get device stats for /proc/net/dev and ifconfig */ | ||
761 | static struct net_device_stats *mcs_net_get_stats(struct net_device *netdev) | ||
762 | { | ||
763 | struct mcs_cb *mcs = netdev_priv(netdev); | ||
764 | return &mcs->stats; | ||
765 | } | ||
766 | |||
767 | /* Receive callback function. */ | ||
768 | static void mcs_receive_irq(struct urb *urb, struct pt_regs *regs) | ||
769 | { | ||
770 | __u8 *bytes; | ||
771 | struct mcs_cb *mcs = urb->context; | ||
772 | int i; | ||
773 | int ret; | ||
774 | |||
775 | if (!netif_running(mcs->netdev)) | ||
776 | return; | ||
777 | |||
778 | if (urb->status) | ||
779 | return; | ||
780 | |||
781 | if (urb->actual_length > 0) { | ||
782 | bytes = urb->transfer_buffer; | ||
783 | |||
784 | /* MCS returns frames without BOF and EOF | ||
785 | * I assume it returns whole frames. | ||
786 | */ | ||
787 | /* SIR speed */ | ||
788 | if(mcs->speed < 576000) { | ||
789 | async_unwrap_char(mcs->netdev, &mcs->stats, | ||
790 | &mcs->rx_buff, 0xc0); | ||
791 | |||
792 | for (i = 0; i < urb->actual_length; i++) | ||
793 | async_unwrap_char(mcs->netdev, &mcs->stats, | ||
794 | &mcs->rx_buff, bytes[i]); | ||
795 | |||
796 | async_unwrap_char(mcs->netdev, &mcs->stats, | ||
797 | &mcs->rx_buff, 0xc1); | ||
798 | } | ||
799 | /* MIR speed */ | ||
800 | else if(mcs->speed == 576000 || mcs->speed == 1152000) { | ||
801 | mcs_unwrap_mir(mcs, urb->transfer_buffer, | ||
802 | urb->actual_length); | ||
803 | } | ||
804 | /* FIR speed */ | ||
805 | else { | ||
806 | mcs_unwrap_fir(mcs, urb->transfer_buffer, | ||
807 | urb->actual_length); | ||
808 | } | ||
809 | mcs->netdev->last_rx = jiffies; | ||
810 | do_gettimeofday(&mcs->rx_time); | ||
811 | } | ||
812 | |||
813 | ret = usb_submit_urb(urb, GFP_ATOMIC); | ||
814 | } | ||
815 | |||
816 | /* Transmit callback funtion. */ | ||
817 | static void mcs_send_irq(struct urb *urb, struct pt_regs *regs) | ||
818 | { | ||
819 | struct mcs_cb *mcs = urb->context; | ||
820 | struct net_device *ndev = mcs->netdev; | ||
821 | |||
822 | if (unlikely(mcs->new_speed)) | ||
823 | schedule_work(&mcs->work); | ||
824 | else | ||
825 | netif_wake_queue(ndev); | ||
826 | } | ||
827 | |||
828 | /* Transmit callback funtion. */ | ||
829 | static int mcs_hard_xmit(struct sk_buff *skb, struct net_device *ndev) | ||
830 | { | ||
831 | unsigned long flags; | ||
832 | struct mcs_cb *mcs; | ||
833 | int wraplen; | ||
834 | int ret = 0; | ||
835 | |||
836 | |||
837 | if (skb == NULL || ndev == NULL) | ||
838 | return -EINVAL; | ||
839 | |||
840 | netif_stop_queue(ndev); | ||
841 | mcs = netdev_priv(ndev); | ||
842 | |||
843 | spin_lock_irqsave(&mcs->lock, flags); | ||
844 | |||
845 | mcs->new_speed = irda_get_next_speed(skb); | ||
846 | if (likely(mcs->new_speed == mcs->speed)) | ||
847 | mcs->new_speed = 0; | ||
848 | |||
849 | /* SIR speed */ | ||
850 | if(mcs->speed < 576000) { | ||
851 | wraplen = mcs_wrap_sir_skb(skb, mcs->out_buf); | ||
852 | } | ||
853 | /* MIR speed */ | ||
854 | else if(mcs->speed == 576000 || mcs->speed == 1152000) { | ||
855 | wraplen = mcs_wrap_mir_skb(skb, mcs->out_buf); | ||
856 | } | ||
857 | /* FIR speed */ | ||
858 | else { | ||
859 | wraplen = mcs_wrap_fir_skb(skb, mcs->out_buf); | ||
860 | } | ||
861 | usb_fill_bulk_urb(mcs->tx_urb, mcs->usbdev, | ||
862 | usb_sndbulkpipe(mcs->usbdev, mcs->ep_out), | ||
863 | mcs->out_buf, wraplen, mcs_send_irq, mcs); | ||
864 | |||
865 | if ((ret = usb_submit_urb(mcs->tx_urb, GFP_ATOMIC))) { | ||
866 | IRDA_ERROR("failed tx_urb: %d", ret); | ||
867 | switch (ret) { | ||
868 | case -ENODEV: | ||
869 | case -EPIPE: | ||
870 | break; | ||
871 | default: | ||
872 | mcs->stats.tx_errors++; | ||
873 | netif_start_queue(ndev); | ||
874 | } | ||
875 | } else { | ||
876 | mcs->stats.tx_packets++; | ||
877 | mcs->stats.tx_bytes += skb->len; | ||
878 | } | ||
879 | |||
880 | dev_kfree_skb(skb); | ||
881 | spin_unlock_irqrestore(&mcs->lock, flags); | ||
882 | return ret; | ||
883 | } | ||
884 | |||
885 | /* | ||
886 | * This function is called by the USB subsystem for each new device in the | ||
887 | * system. Need to verify the device and if it is, then start handling it. | ||
888 | */ | ||
889 | static int mcs_probe(struct usb_interface *intf, | ||
890 | const struct usb_device_id *id) | ||
891 | { | ||
892 | struct usb_device *udev = interface_to_usbdev(intf); | ||
893 | struct net_device *ndev = NULL; | ||
894 | struct mcs_cb *mcs; | ||
895 | int ret = -ENOMEM; | ||
896 | |||
897 | ndev = alloc_irdadev(sizeof(*mcs)); | ||
898 | if (!ndev) | ||
899 | goto error1; | ||
900 | |||
901 | IRDA_DEBUG(1, "MCS7780 USB-IrDA bridge found at %d.", udev->devnum); | ||
902 | |||
903 | /* what is it realy for? */ | ||
904 | SET_MODULE_OWNER(ndev); | ||
905 | SET_NETDEV_DEV(ndev, &intf->dev); | ||
906 | |||
907 | ret = usb_reset_configuration(udev); | ||
908 | if (ret != 0) { | ||
909 | IRDA_ERROR("mcs7780: usb reset configuration failed"); | ||
910 | goto error2; | ||
911 | } | ||
912 | |||
913 | mcs = netdev_priv(ndev); | ||
914 | mcs->usbdev = udev; | ||
915 | mcs->netdev = ndev; | ||
916 | spin_lock_init(&mcs->lock); | ||
917 | |||
918 | /* Initialize QoS for this device */ | ||
919 | irda_init_max_qos_capabilies(&mcs->qos); | ||
920 | |||
921 | /* That's the Rx capability. */ | ||
922 | mcs->qos.baud_rate.bits &= | ||
923 | IR_2400 | IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 | ||
924 | | IR_576000 | IR_1152000 | (IR_4000000 << 8); | ||
925 | |||
926 | |||
927 | mcs->qos.min_turn_time.bits &= qos_mtt_bits; | ||
928 | irda_qos_bits_to_value(&mcs->qos); | ||
929 | |||
930 | /* Speed change work initialisation*/ | ||
931 | INIT_WORK(&mcs->work, mcs_speed_work, mcs); | ||
932 | |||
933 | /* Override the network functions we need to use */ | ||
934 | ndev->hard_start_xmit = mcs_hard_xmit; | ||
935 | ndev->open = mcs_net_open; | ||
936 | ndev->stop = mcs_net_close; | ||
937 | ndev->get_stats = mcs_net_get_stats; | ||
938 | ndev->do_ioctl = mcs_net_ioctl; | ||
939 | |||
940 | if (!intf->cur_altsetting) | ||
941 | goto error2; | ||
942 | |||
943 | ret = mcs_find_endpoints(mcs, intf->cur_altsetting->endpoint, | ||
944 | intf->cur_altsetting->desc.bNumEndpoints); | ||
945 | if (!ret) { | ||
946 | ret = -ENODEV; | ||
947 | goto error2; | ||
948 | } | ||
949 | |||
950 | ret = register_netdev(ndev); | ||
951 | if (ret != 0) | ||
952 | goto error2; | ||
953 | |||
954 | IRDA_DEBUG(1, "IrDA: Registered MosChip MCS7780 device as %s", | ||
955 | ndev->name); | ||
956 | |||
957 | mcs->transceiver_type = transceiver_type; | ||
958 | mcs->sir_tweak = sir_tweak; | ||
959 | mcs->receive_mode = receive_mode; | ||
960 | |||
961 | usb_set_intfdata(intf, mcs); | ||
962 | return 0; | ||
963 | |||
964 | error2: | ||
965 | free_netdev(ndev); | ||
966 | |||
967 | error1: | ||
968 | return ret; | ||
969 | } | ||
970 | |||
971 | /* The current device is removed, the USB layer tells us to shut down. */ | ||
972 | static void mcs_disconnect(struct usb_interface *intf) | ||
973 | { | ||
974 | struct mcs_cb *mcs = usb_get_intfdata(intf); | ||
975 | |||
976 | if (!mcs) | ||
977 | return; | ||
978 | |||
979 | flush_scheduled_work(); | ||
980 | |||
981 | unregister_netdev(mcs->netdev); | ||
982 | free_netdev(mcs->netdev); | ||
983 | |||
984 | usb_set_intfdata(intf, NULL); | ||
985 | IRDA_DEBUG(0, "MCS7780 now disconnected."); | ||
986 | } | ||
987 | |||
988 | /* Module insertion */ | ||
989 | static int __init mcs_init(void) | ||
990 | { | ||
991 | int result; | ||
992 | |||
993 | /* register this driver with the USB subsystem */ | ||
994 | result = usb_register(&mcs_driver); | ||
995 | if (result) | ||
996 | IRDA_ERROR("usb_register failed. Error number %d", result); | ||
997 | |||
998 | return result; | ||
999 | } | ||
1000 | module_init(mcs_init); | ||
1001 | |||
1002 | /* Module removal */ | ||
1003 | static void __exit mcs_exit(void) | ||
1004 | { | ||
1005 | /* deregister this driver with the USB subsystem */ | ||
1006 | usb_deregister(&mcs_driver); | ||
1007 | } | ||
1008 | module_exit(mcs_exit); | ||
1009 | |||
diff --git a/drivers/net/irda/mcs7780.h b/drivers/net/irda/mcs7780.h new file mode 100644 index 000000000000..1a723d725c2a --- /dev/null +++ b/drivers/net/irda/mcs7780.h | |||
@@ -0,0 +1,167 @@ | |||
1 | /***************************************************************************** | ||
2 | * | ||
3 | * Filename: mcs7780.h | ||
4 | * Version: 0.2-alpha | ||
5 | * Description: Irda MosChip USB Dongle | ||
6 | * Status: Experimental | ||
7 | * Authors: Lukasz Stelmach <stlman@poczta.fm> | ||
8 | * Brian Pugh <bpugh@cs.pdx.edu> | ||
9 | * | ||
10 | * Copyright (C) 2005, Lukasz Stelmach <stlman@poczta.fm> | ||
11 | * Copyright (C) 2005, Brian Pugh <bpugh@cs.pdx.edu> | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | * | ||
27 | *****************************************************************************/ | ||
28 | #ifndef _MCS7780_H | ||
29 | #define _MCS7780_H | ||
30 | |||
31 | #define MCS_MODE_SIR 0 | ||
32 | #define MCS_MODE_MIR 1 | ||
33 | #define MCS_MODE_FIR 2 | ||
34 | |||
35 | #define MCS_CTRL_TIMEOUT 500 | ||
36 | #define MCS_XMIT_TIMEOUT 500 | ||
37 | /* Possible transceiver types */ | ||
38 | #define MCS_TSC_VISHAY 0 /* Vishay TFD, default choice */ | ||
39 | #define MCS_TSC_AGILENT 1 /* Agilent 3602/3600 */ | ||
40 | #define MCS_TSC_SHARP 2 /* Sharp GP2W1000YP */ | ||
41 | |||
42 | /* Requests */ | ||
43 | #define MCS_RD_RTYPE 0xC0 | ||
44 | #define MCS_WR_RTYPE 0x40 | ||
45 | #define MCS_RDREQ 0x0F | ||
46 | #define MCS_WRREQ 0x0E | ||
47 | |||
48 | /* Register 0x00 */ | ||
49 | #define MCS_MODE_REG 0 | ||
50 | #define MCS_FIR ((__u16)0x0001) | ||
51 | #define MCS_SIR16US ((__u16)0x0002) | ||
52 | #define MCS_BBTG ((__u16)0x0004) | ||
53 | #define MCS_ASK ((__u16)0x0008) | ||
54 | #define MCS_PARITY ((__u16)0x0010) | ||
55 | |||
56 | /* SIR/MIR speed constants */ | ||
57 | #define MCS_SPEED_SHIFT 5 | ||
58 | #define MCS_SPEED_MASK ((__u16)0x00E0) | ||
59 | #define MCS_SPEED(x) ((x & MCS_SPEED_MASK) >> MCS_SPEED_SHIFT) | ||
60 | #define MCS_SPEED_2400 ((0 << MCS_SPEED_SHIFT) & MCS_SPEED_MASK) | ||
61 | #define MCS_SPEED_9600 ((1 << MCS_SPEED_SHIFT) & MCS_SPEED_MASK) | ||
62 | #define MCS_SPEED_19200 ((2 << MCS_SPEED_SHIFT) & MCS_SPEED_MASK) | ||
63 | #define MCS_SPEED_38400 ((3 << MCS_SPEED_SHIFT) & MCS_SPEED_MASK) | ||
64 | #define MCS_SPEED_57600 ((4 << MCS_SPEED_SHIFT) & MCS_SPEED_MASK) | ||
65 | #define MCS_SPEED_115200 ((5 << MCS_SPEED_SHIFT) & MCS_SPEED_MASK) | ||
66 | #define MCS_SPEED_576000 ((6 << MCS_SPEED_SHIFT) & MCS_SPEED_MASK) | ||
67 | #define MCS_SPEED_1152000 ((7 << MCS_SPEED_SHIFT) & MCS_SPEED_MASK) | ||
68 | |||
69 | #define MCS_PLLPWDN ((__u16)0x0100) | ||
70 | #define MCS_DRIVER ((__u16)0x0200) | ||
71 | #define MCS_DTD ((__u16)0x0400) | ||
72 | #define MCS_DIR ((__u16)0x0800) | ||
73 | #define MCS_SIPEN ((__u16)0x1000) | ||
74 | #define MCS_SENDSIP ((__u16)0x2000) | ||
75 | #define MCS_CHGDIR ((__u16)0x4000) | ||
76 | #define MCS_RESET ((__u16)0x8000) | ||
77 | |||
78 | /* Register 0x02 */ | ||
79 | #define MCS_XCVR_REG 2 | ||
80 | #define MCS_MODE0 ((__u16)0x0001) | ||
81 | #define MCS_STFIR ((__u16)0x0002) | ||
82 | #define MCS_XCVR_CONF ((__u16)0x0004) | ||
83 | #define MCS_RXFAST ((__u16)0x0008) | ||
84 | /* TXCUR [6:4] */ | ||
85 | #define MCS_TXCUR_SHIFT 4 | ||
86 | #define MCS_TXCUR_MASK ((__u16)0x0070) | ||
87 | #define MCS_TXCUR(x) ((x & MCS_TXCUR_MASK) >> MCS_TXCUR_SHIFT) | ||
88 | #define MCS_SETTXCUR(x,y) \ | ||
89 | ((x & ~MCS_TXCUR_MASK) | (y << MCS_TXCUR_SHIFT) & MCS_TXCUR_MASK) | ||
90 | |||
91 | #define MCS_MODE1 ((__u16)0x0080) | ||
92 | #define MCS_SMODE0 ((__u16)0x0100) | ||
93 | #define MCS_SMODE1 ((__u16)0x0200) | ||
94 | #define MCS_INVTX ((__u16)0x0400) | ||
95 | #define MCS_INVRX ((__u16)0x0800) | ||
96 | |||
97 | #define MCS_MINRXPW_REG 4 | ||
98 | |||
99 | #define MCS_RESV_REG 7 | ||
100 | #define MCS_IRINTX ((__u16)0x0001) | ||
101 | #define MCS_IRINRX ((__u16)0x0002) | ||
102 | |||
103 | struct mcs_cb { | ||
104 | struct usb_device *usbdev; /* init: probe_irda */ | ||
105 | struct net_device *netdev; /* network layer */ | ||
106 | struct irlap_cb *irlap; /* The link layer we are binded to */ | ||
107 | struct net_device_stats stats; /* network statistics */ | ||
108 | struct qos_info qos; | ||
109 | unsigned int speed; /* Current speed */ | ||
110 | unsigned int new_speed; /* new speed */ | ||
111 | |||
112 | struct work_struct work; /* Change speed work */ | ||
113 | |||
114 | struct sk_buff *tx_pending; | ||
115 | char in_buf[4096]; /* transmit/receive buffer */ | ||
116 | char out_buf[4096]; /* transmit/receive buffer */ | ||
117 | __u8 *fifo_status; | ||
118 | |||
119 | iobuff_t rx_buff; /* receive unwrap state machine */ | ||
120 | struct timeval rx_time; | ||
121 | spinlock_t lock; | ||
122 | int receiving; | ||
123 | |||
124 | __u8 ep_in; | ||
125 | __u8 ep_out; | ||
126 | |||
127 | struct urb *rx_urb; | ||
128 | struct urb *tx_urb; | ||
129 | |||
130 | int transceiver_type; | ||
131 | int sir_tweak; | ||
132 | int receive_mode; | ||
133 | }; | ||
134 | |||
135 | static int mcs_set_reg(struct mcs_cb *mcs, __u16 reg, __u16 val); | ||
136 | static int mcs_get_reg(struct mcs_cb *mcs, __u16 reg, __u16 * val); | ||
137 | |||
138 | static inline int mcs_setup_transceiver_vishay(struct mcs_cb *mcs); | ||
139 | static inline int mcs_setup_transceiver_agilent(struct mcs_cb *mcs); | ||
140 | static inline int mcs_setup_transceiver_sharp(struct mcs_cb *mcs); | ||
141 | static inline int mcs_setup_transceiver(struct mcs_cb *mcs); | ||
142 | static inline int mcs_wrap_sir_skb(struct sk_buff *skb, __u8 * buf); | ||
143 | static unsigned mcs_wrap_fir_skb(const struct sk_buff *skb, __u8 *buf); | ||
144 | static unsigned mcs_wrap_mir_skb(const struct sk_buff *skb, __u8 *buf); | ||
145 | static void mcs_unwrap_mir(struct mcs_cb *mcs, __u8 *buf, int len); | ||
146 | static void mcs_unwrap_fir(struct mcs_cb *mcs, __u8 *buf, int len); | ||
147 | static inline int mcs_setup_urbs(struct mcs_cb *mcs); | ||
148 | static inline int mcs_receive_start(struct mcs_cb *mcs); | ||
149 | static inline int mcs_find_endpoints(struct mcs_cb *mcs, | ||
150 | struct usb_host_endpoint *ep, int epnum); | ||
151 | |||
152 | static int mcs_speed_change(struct mcs_cb *mcs); | ||
153 | |||
154 | static int mcs_net_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd); | ||
155 | static int mcs_net_close(struct net_device *netdev); | ||
156 | static int mcs_net_open(struct net_device *netdev); | ||
157 | static struct net_device_stats *mcs_net_get_stats(struct net_device *netdev); | ||
158 | |||
159 | static void mcs_receive_irq(struct urb *urb, struct pt_regs *regs); | ||
160 | static void mcs_send_irq(struct urb *urb, struct pt_regs *regs); | ||
161 | static int mcs_hard_xmit(struct sk_buff *skb, struct net_device *netdev); | ||
162 | |||
163 | static int mcs_probe(struct usb_interface *intf, | ||
164 | const struct usb_device_id *id); | ||
165 | static void mcs_disconnect(struct usb_interface *intf); | ||
166 | |||
167 | #endif /* _MCS7780_H */ | ||
diff --git a/drivers/net/irda/stir4200.c b/drivers/net/irda/stir4200.c index 31867e4b891b..d61b208b52a2 100644 --- a/drivers/net/irda/stir4200.c +++ b/drivers/net/irda/stir4200.c | |||
@@ -50,6 +50,7 @@ | |||
50 | #include <linux/delay.h> | 50 | #include <linux/delay.h> |
51 | #include <linux/usb.h> | 51 | #include <linux/usb.h> |
52 | #include <linux/crc32.h> | 52 | #include <linux/crc32.h> |
53 | #include <linux/kthread.h> | ||
53 | #include <net/irda/irda.h> | 54 | #include <net/irda/irda.h> |
54 | #include <net/irda/irlap.h> | 55 | #include <net/irda/irlap.h> |
55 | #include <net/irda/irda_device.h> | 56 | #include <net/irda/irda_device.h> |
@@ -173,9 +174,7 @@ struct stir_cb { | |||
173 | struct qos_info qos; | 174 | struct qos_info qos; |
174 | unsigned speed; /* Current speed */ | 175 | unsigned speed; /* Current speed */ |
175 | 176 | ||
176 | wait_queue_head_t thr_wait; /* transmit thread wakeup */ | 177 | struct task_struct *thread; /* transmit thread */ |
177 | struct completion thr_exited; | ||
178 | pid_t thr_pid; | ||
179 | 178 | ||
180 | struct sk_buff *tx_pending; | 179 | struct sk_buff *tx_pending; |
181 | void *io_buf; /* transmit/receive buffer */ | 180 | void *io_buf; /* transmit/receive buffer */ |
@@ -577,7 +576,7 @@ static int stir_hard_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
577 | SKB_LINEAR_ASSERT(skb); | 576 | SKB_LINEAR_ASSERT(skb); |
578 | 577 | ||
579 | skb = xchg(&stir->tx_pending, skb); | 578 | skb = xchg(&stir->tx_pending, skb); |
580 | wake_up(&stir->thr_wait); | 579 | wake_up_process(stir->thread); |
581 | 580 | ||
582 | /* this should never happen unless stop/wakeup problem */ | 581 | /* this should never happen unless stop/wakeup problem */ |
583 | if (unlikely(skb)) { | 582 | if (unlikely(skb)) { |
@@ -753,13 +752,7 @@ static int stir_transmit_thread(void *arg) | |||
753 | struct net_device *dev = stir->netdev; | 752 | struct net_device *dev = stir->netdev; |
754 | struct sk_buff *skb; | 753 | struct sk_buff *skb; |
755 | 754 | ||
756 | daemonize("%s", dev->name); | 755 | while (!kthread_should_stop()) { |
757 | allow_signal(SIGTERM); | ||
758 | |||
759 | while (netif_running(dev) | ||
760 | && netif_device_present(dev) | ||
761 | && !signal_pending(current)) | ||
762 | { | ||
763 | #ifdef CONFIG_PM | 756 | #ifdef CONFIG_PM |
764 | /* if suspending, then power off and wait */ | 757 | /* if suspending, then power off and wait */ |
765 | if (unlikely(freezing(current))) { | 758 | if (unlikely(freezing(current))) { |
@@ -813,10 +806,11 @@ static int stir_transmit_thread(void *arg) | |||
813 | } | 806 | } |
814 | 807 | ||
815 | /* sleep if nothing to send */ | 808 | /* sleep if nothing to send */ |
816 | wait_event_interruptible(stir->thr_wait, stir->tx_pending); | 809 | set_current_state(TASK_INTERRUPTIBLE); |
817 | } | 810 | schedule(); |
818 | 811 | ||
819 | complete_and_exit (&stir->thr_exited, 0); | 812 | } |
813 | return 0; | ||
820 | } | 814 | } |
821 | 815 | ||
822 | 816 | ||
@@ -859,7 +853,7 @@ static void stir_rcv_irq(struct urb *urb, struct pt_regs *regs) | |||
859 | warn("%s: usb receive submit error: %d", | 853 | warn("%s: usb receive submit error: %d", |
860 | stir->netdev->name, err); | 854 | stir->netdev->name, err); |
861 | stir->receiving = 0; | 855 | stir->receiving = 0; |
862 | wake_up(&stir->thr_wait); | 856 | wake_up_process(stir->thread); |
863 | } | 857 | } |
864 | } | 858 | } |
865 | 859 | ||
@@ -928,10 +922,10 @@ static int stir_net_open(struct net_device *netdev) | |||
928 | } | 922 | } |
929 | 923 | ||
930 | /** Start kernel thread for transmit. */ | 924 | /** Start kernel thread for transmit. */ |
931 | stir->thr_pid = kernel_thread(stir_transmit_thread, stir, | 925 | stir->thread = kthread_run(stir_transmit_thread, stir, |
932 | CLONE_FS|CLONE_FILES); | 926 | "%s", stir->netdev->name); |
933 | if (stir->thr_pid < 0) { | 927 | if (IS_ERR(stir->thread)) { |
934 | err = stir->thr_pid; | 928 | err = PTR_ERR(stir->thread); |
935 | err("stir4200: unable to start kernel thread"); | 929 | err("stir4200: unable to start kernel thread"); |
936 | goto err_out6; | 930 | goto err_out6; |
937 | } | 931 | } |
@@ -968,8 +962,7 @@ static int stir_net_close(struct net_device *netdev) | |||
968 | netif_stop_queue(netdev); | 962 | netif_stop_queue(netdev); |
969 | 963 | ||
970 | /* Kill transmit thread */ | 964 | /* Kill transmit thread */ |
971 | kill_proc(stir->thr_pid, SIGTERM, 1); | 965 | kthread_stop(stir->thread); |
972 | wait_for_completion(&stir->thr_exited); | ||
973 | kfree(stir->fifo_status); | 966 | kfree(stir->fifo_status); |
974 | 967 | ||
975 | /* Mop up receive urb's */ | 968 | /* Mop up receive urb's */ |
@@ -1084,9 +1077,6 @@ static int stir_probe(struct usb_interface *intf, | |||
1084 | stir->qos.min_turn_time.bits &= qos_mtt_bits; | 1077 | stir->qos.min_turn_time.bits &= qos_mtt_bits; |
1085 | irda_qos_bits_to_value(&stir->qos); | 1078 | irda_qos_bits_to_value(&stir->qos); |
1086 | 1079 | ||
1087 | init_completion (&stir->thr_exited); | ||
1088 | init_waitqueue_head (&stir->thr_wait); | ||
1089 | |||
1090 | /* Override the network functions we need to use */ | 1080 | /* Override the network functions we need to use */ |
1091 | net->hard_start_xmit = stir_hard_xmit; | 1081 | net->hard_start_xmit = stir_hard_xmit; |
1092 | net->open = stir_net_open; | 1082 | net->open = stir_net_open; |
diff --git a/drivers/net/irda/vlsi_ir.c b/drivers/net/irda/vlsi_ir.c index 97a49e0be76b..d70b9e8d6e60 100644 --- a/drivers/net/irda/vlsi_ir.c +++ b/drivers/net/irda/vlsi_ir.c | |||
@@ -959,7 +959,7 @@ static int vlsi_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
959 | || (now.tv_sec==ready.tv_sec && now.tv_usec>=ready.tv_usec)) | 959 | || (now.tv_sec==ready.tv_sec && now.tv_usec>=ready.tv_usec)) |
960 | break; | 960 | break; |
961 | udelay(100); | 961 | udelay(100); |
962 | /* must not sleep here - we are called under xmit_lock! */ | 962 | /* must not sleep here - called under netif_tx_lock! */ |
963 | } | 963 | } |
964 | } | 964 | } |
965 | 965 | ||
diff --git a/drivers/net/ixgb/Makefile b/drivers/net/ixgb/Makefile index 7c7aff1ea7d5..a8a2d3d03567 100644 --- a/drivers/net/ixgb/Makefile +++ b/drivers/net/ixgb/Makefile | |||
@@ -1,7 +1,7 @@ | |||
1 | ################################################################################ | 1 | ################################################################################ |
2 | # | 2 | # |
3 | # | 3 | # |
4 | # Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved. | 4 | # Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | # | 5 | # |
6 | # This program is free software; you can redistribute it and/or modify it | 6 | # This program is free software; you can redistribute it and/or modify it |
7 | # under the terms of the GNU General Public License as published by the Free | 7 | # under the terms of the GNU General Public License as published by the Free |
diff --git a/drivers/net/ixgb/ixgb.h b/drivers/net/ixgb/ixgb.h index c83271b38621..a83ef28dadb0 100644 --- a/drivers/net/ixgb/ixgb.h +++ b/drivers/net/ixgb/ixgb.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -84,7 +84,12 @@ struct ixgb_adapter; | |||
84 | #define IXGB_DBG(args...) | 84 | #define IXGB_DBG(args...) |
85 | #endif | 85 | #endif |
86 | 86 | ||
87 | #define IXGB_ERR(args...) printk(KERN_ERR "ixgb: " args) | 87 | #define PFX "ixgb: " |
88 | #define DPRINTK(nlevel, klevel, fmt, args...) \ | ||
89 | (void)((NETIF_MSG_##nlevel & adapter->msg_enable) && \ | ||
90 | printk(KERN_##klevel PFX "%s: %s: " fmt, adapter->netdev->name, \ | ||
91 | __FUNCTION__ , ## args)) | ||
92 | |||
88 | 93 | ||
89 | /* TX/RX descriptor defines */ | 94 | /* TX/RX descriptor defines */ |
90 | #define DEFAULT_TXD 256 | 95 | #define DEFAULT_TXD 256 |
@@ -175,6 +180,7 @@ struct ixgb_adapter { | |||
175 | uint64_t hw_csum_tx_good; | 180 | uint64_t hw_csum_tx_good; |
176 | uint64_t hw_csum_tx_error; | 181 | uint64_t hw_csum_tx_error; |
177 | uint32_t tx_int_delay; | 182 | uint32_t tx_int_delay; |
183 | uint32_t tx_timeout_count; | ||
178 | boolean_t tx_int_delay_enable; | 184 | boolean_t tx_int_delay_enable; |
179 | boolean_t detect_tx_hung; | 185 | boolean_t detect_tx_hung; |
180 | 186 | ||
@@ -192,7 +198,9 @@ struct ixgb_adapter { | |||
192 | 198 | ||
193 | /* structs defined in ixgb_hw.h */ | 199 | /* structs defined in ixgb_hw.h */ |
194 | struct ixgb_hw hw; | 200 | struct ixgb_hw hw; |
201 | u16 msg_enable; | ||
195 | struct ixgb_hw_stats stats; | 202 | struct ixgb_hw_stats stats; |
203 | uint32_t alloc_rx_buff_failed; | ||
196 | #ifdef CONFIG_PCI_MSI | 204 | #ifdef CONFIG_PCI_MSI |
197 | boolean_t have_msi; | 205 | boolean_t have_msi; |
198 | #endif | 206 | #endif |
diff --git a/drivers/net/ixgb/ixgb_ee.c b/drivers/net/ixgb/ixgb_ee.c index 661a46b95a61..8357c5590bfb 100644 --- a/drivers/net/ixgb/ixgb_ee.c +++ b/drivers/net/ixgb/ixgb_ee.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
diff --git a/drivers/net/ixgb/ixgb_ee.h b/drivers/net/ixgb/ixgb_ee.h index 5190aa8761a2..bf6fa220f38e 100644 --- a/drivers/net/ixgb/ixgb_ee.h +++ b/drivers/net/ixgb/ixgb_ee.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
diff --git a/drivers/net/ixgb/ixgb_ethtool.c b/drivers/net/ixgb/ixgb_ethtool.c index d38ade5f2f4e..cf19b898ba9b 100644 --- a/drivers/net/ixgb/ixgb_ethtool.c +++ b/drivers/net/ixgb/ixgb_ethtool.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -44,6 +44,8 @@ extern void ixgb_free_rx_resources(struct ixgb_adapter *adapter); | |||
44 | extern void ixgb_free_tx_resources(struct ixgb_adapter *adapter); | 44 | extern void ixgb_free_tx_resources(struct ixgb_adapter *adapter); |
45 | extern void ixgb_update_stats(struct ixgb_adapter *adapter); | 45 | extern void ixgb_update_stats(struct ixgb_adapter *adapter); |
46 | 46 | ||
47 | #define IXGB_ALL_RAR_ENTRIES 16 | ||
48 | |||
47 | struct ixgb_stats { | 49 | struct ixgb_stats { |
48 | char stat_string[ETH_GSTRING_LEN]; | 50 | char stat_string[ETH_GSTRING_LEN]; |
49 | int sizeof_stat; | 51 | int sizeof_stat; |
@@ -76,6 +78,7 @@ static struct ixgb_stats ixgb_gstrings_stats[] = { | |||
76 | {"tx_heartbeat_errors", IXGB_STAT(net_stats.tx_heartbeat_errors)}, | 78 | {"tx_heartbeat_errors", IXGB_STAT(net_stats.tx_heartbeat_errors)}, |
77 | {"tx_window_errors", IXGB_STAT(net_stats.tx_window_errors)}, | 79 | {"tx_window_errors", IXGB_STAT(net_stats.tx_window_errors)}, |
78 | {"tx_deferred_ok", IXGB_STAT(stats.dc)}, | 80 | {"tx_deferred_ok", IXGB_STAT(stats.dc)}, |
81 | {"tx_timeout_count", IXGB_STAT(tx_timeout_count) }, | ||
79 | {"rx_long_length_errors", IXGB_STAT(stats.roc)}, | 82 | {"rx_long_length_errors", IXGB_STAT(stats.roc)}, |
80 | {"rx_short_length_errors", IXGB_STAT(stats.ruc)}, | 83 | {"rx_short_length_errors", IXGB_STAT(stats.ruc)}, |
81 | #ifdef NETIF_F_TSO | 84 | #ifdef NETIF_F_TSO |
@@ -117,6 +120,16 @@ ixgb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |||
117 | return 0; | 120 | return 0; |
118 | } | 121 | } |
119 | 122 | ||
123 | static void ixgb_set_speed_duplex(struct net_device *netdev) | ||
124 | { | ||
125 | struct ixgb_adapter *adapter = netdev_priv(netdev); | ||
126 | /* be optimistic about our link, since we were up before */ | ||
127 | adapter->link_speed = 10000; | ||
128 | adapter->link_duplex = FULL_DUPLEX; | ||
129 | netif_carrier_on(netdev); | ||
130 | netif_wake_queue(netdev); | ||
131 | } | ||
132 | |||
120 | static int | 133 | static int |
121 | ixgb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | 134 | ixgb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) |
122 | { | 135 | { |
@@ -130,12 +143,7 @@ ixgb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |||
130 | ixgb_down(adapter, TRUE); | 143 | ixgb_down(adapter, TRUE); |
131 | ixgb_reset(adapter); | 144 | ixgb_reset(adapter); |
132 | ixgb_up(adapter); | 145 | ixgb_up(adapter); |
133 | /* be optimistic about our link, since we were up before */ | 146 | ixgb_set_speed_duplex(netdev); |
134 | adapter->link_speed = 10000; | ||
135 | adapter->link_duplex = FULL_DUPLEX; | ||
136 | netif_carrier_on(netdev); | ||
137 | netif_wake_queue(netdev); | ||
138 | |||
139 | } else | 147 | } else |
140 | ixgb_reset(adapter); | 148 | ixgb_reset(adapter); |
141 | 149 | ||
@@ -183,11 +191,7 @@ ixgb_set_pauseparam(struct net_device *netdev, | |||
183 | if(netif_running(adapter->netdev)) { | 191 | if(netif_running(adapter->netdev)) { |
184 | ixgb_down(adapter, TRUE); | 192 | ixgb_down(adapter, TRUE); |
185 | ixgb_up(adapter); | 193 | ixgb_up(adapter); |
186 | /* be optimistic about our link, since we were up before */ | 194 | ixgb_set_speed_duplex(netdev); |
187 | adapter->link_speed = 10000; | ||
188 | adapter->link_duplex = FULL_DUPLEX; | ||
189 | netif_carrier_on(netdev); | ||
190 | netif_wake_queue(netdev); | ||
191 | } else | 195 | } else |
192 | ixgb_reset(adapter); | 196 | ixgb_reset(adapter); |
193 | 197 | ||
@@ -212,11 +216,7 @@ ixgb_set_rx_csum(struct net_device *netdev, uint32_t data) | |||
212 | if(netif_running(netdev)) { | 216 | if(netif_running(netdev)) { |
213 | ixgb_down(adapter,TRUE); | 217 | ixgb_down(adapter,TRUE); |
214 | ixgb_up(adapter); | 218 | ixgb_up(adapter); |
215 | /* be optimistic about our link, since we were up before */ | 219 | ixgb_set_speed_duplex(netdev); |
216 | adapter->link_speed = 10000; | ||
217 | adapter->link_duplex = FULL_DUPLEX; | ||
218 | netif_carrier_on(netdev); | ||
219 | netif_wake_queue(netdev); | ||
220 | } else | 220 | } else |
221 | ixgb_reset(adapter); | 221 | ixgb_reset(adapter); |
222 | return 0; | 222 | return 0; |
@@ -251,6 +251,19 @@ ixgb_set_tso(struct net_device *netdev, uint32_t data) | |||
251 | } | 251 | } |
252 | #endif /* NETIF_F_TSO */ | 252 | #endif /* NETIF_F_TSO */ |
253 | 253 | ||
254 | static uint32_t | ||
255 | ixgb_get_msglevel(struct net_device *netdev) | ||
256 | { | ||
257 | struct ixgb_adapter *adapter = netdev_priv(netdev); | ||
258 | return adapter->msg_enable; | ||
259 | } | ||
260 | |||
261 | static void | ||
262 | ixgb_set_msglevel(struct net_device *netdev, uint32_t data) | ||
263 | { | ||
264 | struct ixgb_adapter *adapter = netdev_priv(netdev); | ||
265 | adapter->msg_enable = data; | ||
266 | } | ||
254 | #define IXGB_GET_STAT(_A_, _R_) _A_->stats._R_ | 267 | #define IXGB_GET_STAT(_A_, _R_) _A_->stats._R_ |
255 | 268 | ||
256 | static int | 269 | static int |
@@ -303,7 +316,7 @@ ixgb_get_regs(struct net_device *netdev, | |||
303 | *reg++ = IXGB_READ_REG(hw, RXCSUM); /* 20 */ | 316 | *reg++ = IXGB_READ_REG(hw, RXCSUM); /* 20 */ |
304 | 317 | ||
305 | /* there are 16 RAR entries in hardware, we only use 3 */ | 318 | /* there are 16 RAR entries in hardware, we only use 3 */ |
306 | for(i = 0; i < 16; i++) { | 319 | for(i = 0; i < IXGB_ALL_RAR_ENTRIES; i++) { |
307 | *reg++ = IXGB_READ_REG_ARRAY(hw, RAL, (i << 1)); /*21,...,51 */ | 320 | *reg++ = IXGB_READ_REG_ARRAY(hw, RAL, (i << 1)); /*21,...,51 */ |
308 | *reg++ = IXGB_READ_REG_ARRAY(hw, RAH, (i << 1)); /*22,...,52 */ | 321 | *reg++ = IXGB_READ_REG_ARRAY(hw, RAH, (i << 1)); /*22,...,52 */ |
309 | } | 322 | } |
@@ -593,11 +606,7 @@ ixgb_set_ringparam(struct net_device *netdev, | |||
593 | adapter->tx_ring = tx_new; | 606 | adapter->tx_ring = tx_new; |
594 | if((err = ixgb_up(adapter))) | 607 | if((err = ixgb_up(adapter))) |
595 | return err; | 608 | return err; |
596 | /* be optimistic about our link, since we were up before */ | 609 | ixgb_set_speed_duplex(netdev); |
597 | adapter->link_speed = 10000; | ||
598 | adapter->link_duplex = FULL_DUPLEX; | ||
599 | netif_carrier_on(netdev); | ||
600 | netif_wake_queue(netdev); | ||
601 | } | 610 | } |
602 | 611 | ||
603 | return 0; | 612 | return 0; |
@@ -714,6 +723,8 @@ static struct ethtool_ops ixgb_ethtool_ops = { | |||
714 | .set_tx_csum = ixgb_set_tx_csum, | 723 | .set_tx_csum = ixgb_set_tx_csum, |
715 | .get_sg = ethtool_op_get_sg, | 724 | .get_sg = ethtool_op_get_sg, |
716 | .set_sg = ethtool_op_set_sg, | 725 | .set_sg = ethtool_op_set_sg, |
726 | .get_msglevel = ixgb_get_msglevel, | ||
727 | .set_msglevel = ixgb_set_msglevel, | ||
717 | #ifdef NETIF_F_TSO | 728 | #ifdef NETIF_F_TSO |
718 | .get_tso = ethtool_op_get_tso, | 729 | .get_tso = ethtool_op_get_tso, |
719 | .set_tso = ixgb_set_tso, | 730 | .set_tso = ixgb_set_tso, |
diff --git a/drivers/net/ixgb/ixgb_hw.c b/drivers/net/ixgb/ixgb_hw.c index 620cad48bdea..f7fa10e47fa2 100644 --- a/drivers/net/ixgb/ixgb_hw.c +++ b/drivers/net/ixgb/ixgb_hw.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
diff --git a/drivers/net/ixgb/ixgb_hw.h b/drivers/net/ixgb/ixgb_hw.h index 382c6300ccc2..cb4568915ada 100644 --- a/drivers/net/ixgb/ixgb_hw.h +++ b/drivers/net/ixgb/ixgb_hw.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -57,6 +57,7 @@ typedef enum { | |||
57 | typedef enum { | 57 | typedef enum { |
58 | ixgb_media_type_unknown = 0, | 58 | ixgb_media_type_unknown = 0, |
59 | ixgb_media_type_fiber = 1, | 59 | ixgb_media_type_fiber = 1, |
60 | ixgb_media_type_copper = 2, | ||
60 | ixgb_num_media_types | 61 | ixgb_num_media_types |
61 | } ixgb_media_type; | 62 | } ixgb_media_type; |
62 | 63 | ||
diff --git a/drivers/net/ixgb/ixgb_ids.h b/drivers/net/ixgb/ixgb_ids.h index aee207eaa287..40a085f94c7b 100644 --- a/drivers/net/ixgb/ixgb_ids.h +++ b/drivers/net/ixgb/ixgb_ids.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -43,6 +43,8 @@ | |||
43 | #define IXGB_SUBDEVICE_ID_A11F 0xA11F | 43 | #define IXGB_SUBDEVICE_ID_A11F 0xA11F |
44 | #define IXGB_SUBDEVICE_ID_A01F 0xA01F | 44 | #define IXGB_SUBDEVICE_ID_A01F 0xA01F |
45 | 45 | ||
46 | #endif /* #ifndef _IXGB_IDS_H_ */ | 46 | #define IXGB_DEVICE_ID_82597EX_CX4 0x109E |
47 | #define IXGB_SUBDEVICE_ID_A00C 0xA00C | ||
47 | 48 | ||
49 | #endif /* #ifndef _IXGB_IDS_H_ */ | ||
48 | /* End of File */ | 50 | /* End of File */ |
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c index cfd67d812f0d..57006fb8840e 100644 --- a/drivers/net/ixgb/ixgb_main.c +++ b/drivers/net/ixgb/ixgb_main.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -28,22 +28,6 @@ | |||
28 | 28 | ||
29 | #include "ixgb.h" | 29 | #include "ixgb.h" |
30 | 30 | ||
31 | /* Change Log | ||
32 | * 1.0.96 04/19/05 | ||
33 | * - Make needlessly global code static -- bunk@stusta.de | ||
34 | * - ethtool cleanup -- shemminger@osdl.org | ||
35 | * - Support for MODULE_VERSION -- linville@tuxdriver.com | ||
36 | * - add skb_header_cloned check to the tso path -- herbert@apana.org.au | ||
37 | * 1.0.88 01/05/05 | ||
38 | * - include fix to the condition that determines when to quit NAPI - Robert Olsson | ||
39 | * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down | ||
40 | * 1.0.84 10/26/04 | ||
41 | * - reset buffer_info->dma in Tx resource cleanup logic | ||
42 | * 1.0.83 10/12/04 | ||
43 | * - sparse cleanup - shemminger@osdl.org | ||
44 | * - fix tx resource cleanup logic | ||
45 | */ | ||
46 | |||
47 | char ixgb_driver_name[] = "ixgb"; | 31 | char ixgb_driver_name[] = "ixgb"; |
48 | static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver"; | 32 | static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver"; |
49 | 33 | ||
@@ -52,9 +36,9 @@ static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver"; | |||
52 | #else | 36 | #else |
53 | #define DRIVERNAPI "-NAPI" | 37 | #define DRIVERNAPI "-NAPI" |
54 | #endif | 38 | #endif |
55 | #define DRV_VERSION "1.0.100-k2"DRIVERNAPI | 39 | #define DRV_VERSION "1.0.109-k2"DRIVERNAPI |
56 | char ixgb_driver_version[] = DRV_VERSION; | 40 | char ixgb_driver_version[] = DRV_VERSION; |
57 | static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation."; | 41 | static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
58 | 42 | ||
59 | /* ixgb_pci_tbl - PCI Device ID Table | 43 | /* ixgb_pci_tbl - PCI Device ID Table |
60 | * | 44 | * |
@@ -67,6 +51,8 @@ static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation."; | |||
67 | static struct pci_device_id ixgb_pci_tbl[] = { | 51 | static struct pci_device_id ixgb_pci_tbl[] = { |
68 | {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX, | 52 | {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX, |
69 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 53 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
54 | {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4, | ||
55 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | ||
70 | {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR, | 56 | {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR, |
71 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 57 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
72 | {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR, | 58 | {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR, |
@@ -148,6 +134,11 @@ MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver"); | |||
148 | MODULE_LICENSE("GPL"); | 134 | MODULE_LICENSE("GPL"); |
149 | MODULE_VERSION(DRV_VERSION); | 135 | MODULE_VERSION(DRV_VERSION); |
150 | 136 | ||
137 | #define DEFAULT_DEBUG_LEVEL_SHIFT 3 | ||
138 | static int debug = DEFAULT_DEBUG_LEVEL_SHIFT; | ||
139 | module_param(debug, int, 0); | ||
140 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | ||
141 | |||
151 | /* some defines for controlling descriptor fetches in h/w */ | 142 | /* some defines for controlling descriptor fetches in h/w */ |
152 | #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */ | 143 | #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */ |
153 | #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below | 144 | #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below |
@@ -196,7 +187,7 @@ module_exit(ixgb_exit_module); | |||
196 | * @adapter: board private structure | 187 | * @adapter: board private structure |
197 | **/ | 188 | **/ |
198 | 189 | ||
199 | static inline void | 190 | static void |
200 | ixgb_irq_disable(struct ixgb_adapter *adapter) | 191 | ixgb_irq_disable(struct ixgb_adapter *adapter) |
201 | { | 192 | { |
202 | atomic_inc(&adapter->irq_sem); | 193 | atomic_inc(&adapter->irq_sem); |
@@ -210,7 +201,7 @@ ixgb_irq_disable(struct ixgb_adapter *adapter) | |||
210 | * @adapter: board private structure | 201 | * @adapter: board private structure |
211 | **/ | 202 | **/ |
212 | 203 | ||
213 | static inline void | 204 | static void |
214 | ixgb_irq_enable(struct ixgb_adapter *adapter) | 205 | ixgb_irq_enable(struct ixgb_adapter *adapter) |
215 | { | 206 | { |
216 | if(atomic_dec_and_test(&adapter->irq_sem)) { | 207 | if(atomic_dec_and_test(&adapter->irq_sem)) { |
@@ -231,6 +222,7 @@ ixgb_up(struct ixgb_adapter *adapter) | |||
231 | 222 | ||
232 | /* hardware has been reset, we need to reload some things */ | 223 | /* hardware has been reset, we need to reload some things */ |
233 | 224 | ||
225 | ixgb_rar_set(hw, netdev->dev_addr, 0); | ||
234 | ixgb_set_multi(netdev); | 226 | ixgb_set_multi(netdev); |
235 | 227 | ||
236 | ixgb_restore_vlan(adapter); | 228 | ixgb_restore_vlan(adapter); |
@@ -240,6 +232,9 @@ ixgb_up(struct ixgb_adapter *adapter) | |||
240 | ixgb_configure_rx(adapter); | 232 | ixgb_configure_rx(adapter); |
241 | ixgb_alloc_rx_buffers(adapter); | 233 | ixgb_alloc_rx_buffers(adapter); |
242 | 234 | ||
235 | /* disable interrupts and get the hardware into a known state */ | ||
236 | IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff); | ||
237 | |||
243 | #ifdef CONFIG_PCI_MSI | 238 | #ifdef CONFIG_PCI_MSI |
244 | { | 239 | { |
245 | boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) & | 240 | boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) & |
@@ -249,7 +244,7 @@ ixgb_up(struct ixgb_adapter *adapter) | |||
249 | if (!pcix) | 244 | if (!pcix) |
250 | adapter->have_msi = FALSE; | 245 | adapter->have_msi = FALSE; |
251 | else if((err = pci_enable_msi(adapter->pdev))) { | 246 | else if((err = pci_enable_msi(adapter->pdev))) { |
252 | printk (KERN_ERR | 247 | DPRINTK(PROBE, ERR, |
253 | "Unable to allocate MSI interrupt Error: %d\n", err); | 248 | "Unable to allocate MSI interrupt Error: %d\n", err); |
254 | adapter->have_msi = FALSE; | 249 | adapter->have_msi = FALSE; |
255 | /* proceed to try to request regular interrupt */ | 250 | /* proceed to try to request regular interrupt */ |
@@ -259,11 +254,11 @@ ixgb_up(struct ixgb_adapter *adapter) | |||
259 | #endif | 254 | #endif |
260 | if((err = request_irq(adapter->pdev->irq, &ixgb_intr, | 255 | if((err = request_irq(adapter->pdev->irq, &ixgb_intr, |
261 | SA_SHIRQ | SA_SAMPLE_RANDOM, | 256 | SA_SHIRQ | SA_SAMPLE_RANDOM, |
262 | netdev->name, netdev))) | 257 | netdev->name, netdev))) { |
258 | DPRINTK(PROBE, ERR, | ||
259 | "Unable to allocate interrupt Error: %d\n", err); | ||
263 | return err; | 260 | return err; |
264 | 261 | } | |
265 | /* disable interrupts and get the hardware into a known state */ | ||
266 | IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff); | ||
267 | 262 | ||
268 | if((hw->max_frame_size != max_frame) || | 263 | if((hw->max_frame_size != max_frame) || |
269 | (hw->max_frame_size != | 264 | (hw->max_frame_size != |
@@ -285,11 +280,12 @@ ixgb_up(struct ixgb_adapter *adapter) | |||
285 | } | 280 | } |
286 | 281 | ||
287 | mod_timer(&adapter->watchdog_timer, jiffies); | 282 | mod_timer(&adapter->watchdog_timer, jiffies); |
288 | ixgb_irq_enable(adapter); | ||
289 | 283 | ||
290 | #ifdef CONFIG_IXGB_NAPI | 284 | #ifdef CONFIG_IXGB_NAPI |
291 | netif_poll_enable(netdev); | 285 | netif_poll_enable(netdev); |
292 | #endif | 286 | #endif |
287 | ixgb_irq_enable(adapter); | ||
288 | |||
293 | return 0; | 289 | return 0; |
294 | } | 290 | } |
295 | 291 | ||
@@ -326,7 +322,7 @@ ixgb_reset(struct ixgb_adapter *adapter) | |||
326 | 322 | ||
327 | ixgb_adapter_stop(&adapter->hw); | 323 | ixgb_adapter_stop(&adapter->hw); |
328 | if(!ixgb_init_hw(&adapter->hw)) | 324 | if(!ixgb_init_hw(&adapter->hw)) |
329 | IXGB_DBG("ixgb_init_hw failed.\n"); | 325 | DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n"); |
330 | } | 326 | } |
331 | 327 | ||
332 | /** | 328 | /** |
@@ -363,7 +359,8 @@ ixgb_probe(struct pci_dev *pdev, | |||
363 | } else { | 359 | } else { |
364 | if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) || | 360 | if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) || |
365 | (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) { | 361 | (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) { |
366 | IXGB_ERR("No usable DMA configuration, aborting\n"); | 362 | printk(KERN_ERR |
363 | "ixgb: No usable DMA configuration, aborting\n"); | ||
367 | goto err_dma_mask; | 364 | goto err_dma_mask; |
368 | } | 365 | } |
369 | pci_using_dac = 0; | 366 | pci_using_dac = 0; |
@@ -388,6 +385,7 @@ ixgb_probe(struct pci_dev *pdev, | |||
388 | adapter->netdev = netdev; | 385 | adapter->netdev = netdev; |
389 | adapter->pdev = pdev; | 386 | adapter->pdev = pdev; |
390 | adapter->hw.back = adapter; | 387 | adapter->hw.back = adapter; |
388 | adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT); | ||
391 | 389 | ||
392 | mmio_start = pci_resource_start(pdev, BAR_0); | 390 | mmio_start = pci_resource_start(pdev, BAR_0); |
393 | mmio_len = pci_resource_len(pdev, BAR_0); | 391 | mmio_len = pci_resource_len(pdev, BAR_0); |
@@ -416,7 +414,7 @@ ixgb_probe(struct pci_dev *pdev, | |||
416 | netdev->change_mtu = &ixgb_change_mtu; | 414 | netdev->change_mtu = &ixgb_change_mtu; |
417 | ixgb_set_ethtool_ops(netdev); | 415 | ixgb_set_ethtool_ops(netdev); |
418 | netdev->tx_timeout = &ixgb_tx_timeout; | 416 | netdev->tx_timeout = &ixgb_tx_timeout; |
419 | netdev->watchdog_timeo = HZ; | 417 | netdev->watchdog_timeo = 5 * HZ; |
420 | #ifdef CONFIG_IXGB_NAPI | 418 | #ifdef CONFIG_IXGB_NAPI |
421 | netdev->poll = &ixgb_clean; | 419 | netdev->poll = &ixgb_clean; |
422 | netdev->weight = 64; | 420 | netdev->weight = 64; |
@@ -428,6 +426,7 @@ ixgb_probe(struct pci_dev *pdev, | |||
428 | netdev->poll_controller = ixgb_netpoll; | 426 | netdev->poll_controller = ixgb_netpoll; |
429 | #endif | 427 | #endif |
430 | 428 | ||
429 | strcpy(netdev->name, pci_name(pdev)); | ||
431 | netdev->mem_start = mmio_start; | 430 | netdev->mem_start = mmio_start; |
432 | netdev->mem_end = mmio_start + mmio_len; | 431 | netdev->mem_end = mmio_start + mmio_len; |
433 | netdev->base_addr = adapter->hw.io_base; | 432 | netdev->base_addr = adapter->hw.io_base; |
@@ -449,6 +448,9 @@ ixgb_probe(struct pci_dev *pdev, | |||
449 | #ifdef NETIF_F_TSO | 448 | #ifdef NETIF_F_TSO |
450 | netdev->features |= NETIF_F_TSO; | 449 | netdev->features |= NETIF_F_TSO; |
451 | #endif | 450 | #endif |
451 | #ifdef NETIF_F_LLTX | ||
452 | netdev->features |= NETIF_F_LLTX; | ||
453 | #endif | ||
452 | 454 | ||
453 | if(pci_using_dac) | 455 | if(pci_using_dac) |
454 | netdev->features |= NETIF_F_HIGHDMA; | 456 | netdev->features |= NETIF_F_HIGHDMA; |
@@ -456,7 +458,7 @@ ixgb_probe(struct pci_dev *pdev, | |||
456 | /* make sure the EEPROM is good */ | 458 | /* make sure the EEPROM is good */ |
457 | 459 | ||
458 | if(!ixgb_validate_eeprom_checksum(&adapter->hw)) { | 460 | if(!ixgb_validate_eeprom_checksum(&adapter->hw)) { |
459 | printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n"); | 461 | DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); |
460 | err = -EIO; | 462 | err = -EIO; |
461 | goto err_eeprom; | 463 | goto err_eeprom; |
462 | } | 464 | } |
@@ -465,6 +467,7 @@ ixgb_probe(struct pci_dev *pdev, | |||
465 | memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len); | 467 | memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len); |
466 | 468 | ||
467 | if(!is_valid_ether_addr(netdev->perm_addr)) { | 469 | if(!is_valid_ether_addr(netdev->perm_addr)) { |
470 | DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); | ||
468 | err = -EIO; | 471 | err = -EIO; |
469 | goto err_eeprom; | 472 | goto err_eeprom; |
470 | } | 473 | } |
@@ -478,6 +481,7 @@ ixgb_probe(struct pci_dev *pdev, | |||
478 | INIT_WORK(&adapter->tx_timeout_task, | 481 | INIT_WORK(&adapter->tx_timeout_task, |
479 | (void (*)(void *))ixgb_tx_timeout_task, netdev); | 482 | (void (*)(void *))ixgb_tx_timeout_task, netdev); |
480 | 483 | ||
484 | strcpy(netdev->name, "eth%d"); | ||
481 | if((err = register_netdev(netdev))) | 485 | if((err = register_netdev(netdev))) |
482 | goto err_register; | 486 | goto err_register; |
483 | 487 | ||
@@ -486,8 +490,7 @@ ixgb_probe(struct pci_dev *pdev, | |||
486 | netif_carrier_off(netdev); | 490 | netif_carrier_off(netdev); |
487 | netif_stop_queue(netdev); | 491 | netif_stop_queue(netdev); |
488 | 492 | ||
489 | printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n", | 493 | DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n"); |
490 | netdev->name); | ||
491 | ixgb_check_options(adapter); | 494 | ixgb_check_options(adapter); |
492 | /* reset the hardware with the new settings */ | 495 | /* reset the hardware with the new settings */ |
493 | 496 | ||
@@ -557,17 +560,17 @@ ixgb_sw_init(struct ixgb_adapter *adapter) | |||
557 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | 560 | hw->subsystem_vendor_id = pdev->subsystem_vendor; |
558 | hw->subsystem_id = pdev->subsystem_device; | 561 | hw->subsystem_id = pdev->subsystem_device; |
559 | 562 | ||
560 | adapter->rx_buffer_len = IXGB_RXBUFFER_2048; | ||
561 | |||
562 | hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH; | 563 | hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH; |
564 | adapter->rx_buffer_len = hw->max_frame_size; | ||
563 | 565 | ||
564 | if((hw->device_id == IXGB_DEVICE_ID_82597EX) | 566 | if((hw->device_id == IXGB_DEVICE_ID_82597EX) |
565 | ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR) | 567 | || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4) |
566 | ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR)) | 568 | || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR) |
569 | || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR)) | ||
567 | hw->mac_type = ixgb_82597; | 570 | hw->mac_type = ixgb_82597; |
568 | else { | 571 | else { |
569 | /* should never have loaded on this device */ | 572 | /* should never have loaded on this device */ |
570 | printk(KERN_ERR "ixgb: unsupported device id\n"); | 573 | DPRINTK(PROBE, ERR, "unsupported device id\n"); |
571 | } | 574 | } |
572 | 575 | ||
573 | /* enable flow control to be programmed */ | 576 | /* enable flow control to be programmed */ |
@@ -665,6 +668,8 @@ ixgb_setup_tx_resources(struct ixgb_adapter *adapter) | |||
665 | size = sizeof(struct ixgb_buffer) * txdr->count; | 668 | size = sizeof(struct ixgb_buffer) * txdr->count; |
666 | txdr->buffer_info = vmalloc(size); | 669 | txdr->buffer_info = vmalloc(size); |
667 | if(!txdr->buffer_info) { | 670 | if(!txdr->buffer_info) { |
671 | DPRINTK(PROBE, ERR, | ||
672 | "Unable to allocate transmit descriptor ring memory\n"); | ||
668 | return -ENOMEM; | 673 | return -ENOMEM; |
669 | } | 674 | } |
670 | memset(txdr->buffer_info, 0, size); | 675 | memset(txdr->buffer_info, 0, size); |
@@ -677,6 +682,8 @@ ixgb_setup_tx_resources(struct ixgb_adapter *adapter) | |||
677 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | 682 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); |
678 | if(!txdr->desc) { | 683 | if(!txdr->desc) { |
679 | vfree(txdr->buffer_info); | 684 | vfree(txdr->buffer_info); |
685 | DPRINTK(PROBE, ERR, | ||
686 | "Unable to allocate transmit descriptor memory\n"); | ||
680 | return -ENOMEM; | 687 | return -ENOMEM; |
681 | } | 688 | } |
682 | memset(txdr->desc, 0, txdr->size); | 689 | memset(txdr->desc, 0, txdr->size); |
@@ -750,6 +757,8 @@ ixgb_setup_rx_resources(struct ixgb_adapter *adapter) | |||
750 | size = sizeof(struct ixgb_buffer) * rxdr->count; | 757 | size = sizeof(struct ixgb_buffer) * rxdr->count; |
751 | rxdr->buffer_info = vmalloc(size); | 758 | rxdr->buffer_info = vmalloc(size); |
752 | if(!rxdr->buffer_info) { | 759 | if(!rxdr->buffer_info) { |
760 | DPRINTK(PROBE, ERR, | ||
761 | "Unable to allocate receive descriptor ring\n"); | ||
753 | return -ENOMEM; | 762 | return -ENOMEM; |
754 | } | 763 | } |
755 | memset(rxdr->buffer_info, 0, size); | 764 | memset(rxdr->buffer_info, 0, size); |
@@ -763,6 +772,8 @@ ixgb_setup_rx_resources(struct ixgb_adapter *adapter) | |||
763 | 772 | ||
764 | if(!rxdr->desc) { | 773 | if(!rxdr->desc) { |
765 | vfree(rxdr->buffer_info); | 774 | vfree(rxdr->buffer_info); |
775 | DPRINTK(PROBE, ERR, | ||
776 | "Unable to allocate receive descriptors\n"); | ||
766 | return -ENOMEM; | 777 | return -ENOMEM; |
767 | } | 778 | } |
768 | memset(rxdr->desc, 0, rxdr->size); | 779 | memset(rxdr->desc, 0, rxdr->size); |
@@ -794,21 +805,14 @@ ixgb_setup_rctl(struct ixgb_adapter *adapter) | |||
794 | 805 | ||
795 | rctl |= IXGB_RCTL_SECRC; | 806 | rctl |= IXGB_RCTL_SECRC; |
796 | 807 | ||
797 | switch (adapter->rx_buffer_len) { | 808 | if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048) |
798 | case IXGB_RXBUFFER_2048: | ||
799 | default: | ||
800 | rctl |= IXGB_RCTL_BSIZE_2048; | 809 | rctl |= IXGB_RCTL_BSIZE_2048; |
801 | break; | 810 | else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096) |
802 | case IXGB_RXBUFFER_4096: | ||
803 | rctl |= IXGB_RCTL_BSIZE_4096; | 811 | rctl |= IXGB_RCTL_BSIZE_4096; |
804 | break; | 812 | else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192) |
805 | case IXGB_RXBUFFER_8192: | ||
806 | rctl |= IXGB_RCTL_BSIZE_8192; | 813 | rctl |= IXGB_RCTL_BSIZE_8192; |
807 | break; | 814 | else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384) |
808 | case IXGB_RXBUFFER_16384: | ||
809 | rctl |= IXGB_RCTL_BSIZE_16384; | 815 | rctl |= IXGB_RCTL_BSIZE_16384; |
810 | break; | ||
811 | } | ||
812 | 816 | ||
813 | IXGB_WRITE_REG(&adapter->hw, RCTL, rctl); | 817 | IXGB_WRITE_REG(&adapter->hw, RCTL, rctl); |
814 | } | 818 | } |
@@ -898,22 +902,25 @@ ixgb_free_tx_resources(struct ixgb_adapter *adapter) | |||
898 | adapter->tx_ring.desc = NULL; | 902 | adapter->tx_ring.desc = NULL; |
899 | } | 903 | } |
900 | 904 | ||
901 | static inline void | 905 | static void |
902 | ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter, | 906 | ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter, |
903 | struct ixgb_buffer *buffer_info) | 907 | struct ixgb_buffer *buffer_info) |
904 | { | 908 | { |
905 | struct pci_dev *pdev = adapter->pdev; | 909 | struct pci_dev *pdev = adapter->pdev; |
906 | if(buffer_info->dma) { | 910 | |
907 | pci_unmap_page(pdev, | 911 | if (buffer_info->dma) |
908 | buffer_info->dma, | 912 | pci_unmap_page(pdev, buffer_info->dma, buffer_info->length, |
909 | buffer_info->length, | 913 | PCI_DMA_TODEVICE); |
910 | PCI_DMA_TODEVICE); | 914 | |
911 | buffer_info->dma = 0; | 915 | if (buffer_info->skb) |
912 | } | ||
913 | if(buffer_info->skb) { | ||
914 | dev_kfree_skb_any(buffer_info->skb); | 916 | dev_kfree_skb_any(buffer_info->skb); |
915 | buffer_info->skb = NULL; | 917 | |
916 | } | 918 | buffer_info->skb = NULL; |
919 | buffer_info->dma = 0; | ||
920 | buffer_info->time_stamp = 0; | ||
921 | /* these fields must always be initialized in tx | ||
922 | * buffer_info->length = 0; | ||
923 | * buffer_info->next_to_watch = 0; */ | ||
917 | } | 924 | } |
918 | 925 | ||
919 | /** | 926 | /** |
@@ -1112,8 +1119,8 @@ ixgb_watchdog(unsigned long data) | |||
1112 | 1119 | ||
1113 | if(adapter->hw.link_up) { | 1120 | if(adapter->hw.link_up) { |
1114 | if(!netif_carrier_ok(netdev)) { | 1121 | if(!netif_carrier_ok(netdev)) { |
1115 | printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n", | 1122 | DPRINTK(LINK, INFO, |
1116 | netdev->name, 10000, "Full Duplex"); | 1123 | "NIC Link is Up 10000 Mbps Full Duplex\n"); |
1117 | adapter->link_speed = 10000; | 1124 | adapter->link_speed = 10000; |
1118 | adapter->link_duplex = FULL_DUPLEX; | 1125 | adapter->link_duplex = FULL_DUPLEX; |
1119 | netif_carrier_on(netdev); | 1126 | netif_carrier_on(netdev); |
@@ -1123,9 +1130,7 @@ ixgb_watchdog(unsigned long data) | |||
1123 | if(netif_carrier_ok(netdev)) { | 1130 | if(netif_carrier_ok(netdev)) { |
1124 | adapter->link_speed = 0; | 1131 | adapter->link_speed = 0; |
1125 | adapter->link_duplex = 0; | 1132 | adapter->link_duplex = 0; |
1126 | printk(KERN_INFO | 1133 | DPRINTK(LINK, INFO, "NIC Link is Down\n"); |
1127 | "ixgb: %s NIC Link is Down\n", | ||
1128 | netdev->name); | ||
1129 | netif_carrier_off(netdev); | 1134 | netif_carrier_off(netdev); |
1130 | netif_stop_queue(netdev); | 1135 | netif_stop_queue(netdev); |
1131 | 1136 | ||
@@ -1158,7 +1163,7 @@ ixgb_watchdog(unsigned long data) | |||
1158 | #define IXGB_TX_FLAGS_VLAN 0x00000002 | 1163 | #define IXGB_TX_FLAGS_VLAN 0x00000002 |
1159 | #define IXGB_TX_FLAGS_TSO 0x00000004 | 1164 | #define IXGB_TX_FLAGS_TSO 0x00000004 |
1160 | 1165 | ||
1161 | static inline int | 1166 | static int |
1162 | ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb) | 1167 | ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb) |
1163 | { | 1168 | { |
1164 | #ifdef NETIF_F_TSO | 1169 | #ifdef NETIF_F_TSO |
@@ -1220,7 +1225,7 @@ ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb) | |||
1220 | return 0; | 1225 | return 0; |
1221 | } | 1226 | } |
1222 | 1227 | ||
1223 | static inline boolean_t | 1228 | static boolean_t |
1224 | ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb) | 1229 | ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb) |
1225 | { | 1230 | { |
1226 | struct ixgb_context_desc *context_desc; | 1231 | struct ixgb_context_desc *context_desc; |
@@ -1258,7 +1263,7 @@ ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb) | |||
1258 | #define IXGB_MAX_TXD_PWR 14 | 1263 | #define IXGB_MAX_TXD_PWR 14 |
1259 | #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR) | 1264 | #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR) |
1260 | 1265 | ||
1261 | static inline int | 1266 | static int |
1262 | ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb, | 1267 | ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb, |
1263 | unsigned int first) | 1268 | unsigned int first) |
1264 | { | 1269 | { |
@@ -1284,6 +1289,7 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb, | |||
1284 | size, | 1289 | size, |
1285 | PCI_DMA_TODEVICE); | 1290 | PCI_DMA_TODEVICE); |
1286 | buffer_info->time_stamp = jiffies; | 1291 | buffer_info->time_stamp = jiffies; |
1292 | buffer_info->next_to_watch = 0; | ||
1287 | 1293 | ||
1288 | len -= size; | 1294 | len -= size; |
1289 | offset += size; | 1295 | offset += size; |
@@ -1309,6 +1315,7 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb, | |||
1309 | size, | 1315 | size, |
1310 | PCI_DMA_TODEVICE); | 1316 | PCI_DMA_TODEVICE); |
1311 | buffer_info->time_stamp = jiffies; | 1317 | buffer_info->time_stamp = jiffies; |
1318 | buffer_info->next_to_watch = 0; | ||
1312 | 1319 | ||
1313 | len -= size; | 1320 | len -= size; |
1314 | offset += size; | 1321 | offset += size; |
@@ -1323,7 +1330,7 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb, | |||
1323 | return count; | 1330 | return count; |
1324 | } | 1331 | } |
1325 | 1332 | ||
1326 | static inline void | 1333 | static void |
1327 | ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags) | 1334 | ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags) |
1328 | { | 1335 | { |
1329 | struct ixgb_desc_ring *tx_ring = &adapter->tx_ring; | 1336 | struct ixgb_desc_ring *tx_ring = &adapter->tx_ring; |
@@ -1395,13 +1402,26 @@ ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
1395 | return 0; | 1402 | return 0; |
1396 | } | 1403 | } |
1397 | 1404 | ||
1405 | #ifdef NETIF_F_LLTX | ||
1406 | local_irq_save(flags); | ||
1407 | if (!spin_trylock(&adapter->tx_lock)) { | ||
1408 | /* Collision - tell upper layer to requeue */ | ||
1409 | local_irq_restore(flags); | ||
1410 | return NETDEV_TX_LOCKED; | ||
1411 | } | ||
1412 | #else | ||
1398 | spin_lock_irqsave(&adapter->tx_lock, flags); | 1413 | spin_lock_irqsave(&adapter->tx_lock, flags); |
1414 | #endif | ||
1415 | |||
1399 | if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) { | 1416 | if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) { |
1400 | netif_stop_queue(netdev); | 1417 | netif_stop_queue(netdev); |
1401 | spin_unlock_irqrestore(&adapter->tx_lock, flags); | 1418 | spin_unlock_irqrestore(&adapter->tx_lock, flags); |
1402 | return 1; | 1419 | return NETDEV_TX_BUSY; |
1403 | } | 1420 | } |
1421 | |||
1422 | #ifndef NETIF_F_LLTX | ||
1404 | spin_unlock_irqrestore(&adapter->tx_lock, flags); | 1423 | spin_unlock_irqrestore(&adapter->tx_lock, flags); |
1424 | #endif | ||
1405 | 1425 | ||
1406 | if(adapter->vlgrp && vlan_tx_tag_present(skb)) { | 1426 | if(adapter->vlgrp && vlan_tx_tag_present(skb)) { |
1407 | tx_flags |= IXGB_TX_FLAGS_VLAN; | 1427 | tx_flags |= IXGB_TX_FLAGS_VLAN; |
@@ -1413,10 +1433,13 @@ ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
1413 | tso = ixgb_tso(adapter, skb); | 1433 | tso = ixgb_tso(adapter, skb); |
1414 | if (tso < 0) { | 1434 | if (tso < 0) { |
1415 | dev_kfree_skb_any(skb); | 1435 | dev_kfree_skb_any(skb); |
1436 | #ifdef NETIF_F_LLTX | ||
1437 | spin_unlock_irqrestore(&adapter->tx_lock, flags); | ||
1438 | #endif | ||
1416 | return NETDEV_TX_OK; | 1439 | return NETDEV_TX_OK; |
1417 | } | 1440 | } |
1418 | 1441 | ||
1419 | if (tso) | 1442 | if (likely(tso)) |
1420 | tx_flags |= IXGB_TX_FLAGS_TSO; | 1443 | tx_flags |= IXGB_TX_FLAGS_TSO; |
1421 | else if(ixgb_tx_csum(adapter, skb)) | 1444 | else if(ixgb_tx_csum(adapter, skb)) |
1422 | tx_flags |= IXGB_TX_FLAGS_CSUM; | 1445 | tx_flags |= IXGB_TX_FLAGS_CSUM; |
@@ -1426,7 +1449,15 @@ ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
1426 | 1449 | ||
1427 | netdev->trans_start = jiffies; | 1450 | netdev->trans_start = jiffies; |
1428 | 1451 | ||
1429 | return 0; | 1452 | #ifdef NETIF_F_LLTX |
1453 | /* Make sure there is space in the ring for the next send. */ | ||
1454 | if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) | ||
1455 | netif_stop_queue(netdev); | ||
1456 | |||
1457 | spin_unlock_irqrestore(&adapter->tx_lock, flags); | ||
1458 | |||
1459 | #endif | ||
1460 | return NETDEV_TX_OK; | ||
1430 | } | 1461 | } |
1431 | 1462 | ||
1432 | /** | 1463 | /** |
@@ -1448,6 +1479,7 @@ ixgb_tx_timeout_task(struct net_device *netdev) | |||
1448 | { | 1479 | { |
1449 | struct ixgb_adapter *adapter = netdev_priv(netdev); | 1480 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1450 | 1481 | ||
1482 | adapter->tx_timeout_count++; | ||
1451 | ixgb_down(adapter, TRUE); | 1483 | ixgb_down(adapter, TRUE); |
1452 | ixgb_up(adapter); | 1484 | ixgb_up(adapter); |
1453 | } | 1485 | } |
@@ -1486,28 +1518,15 @@ ixgb_change_mtu(struct net_device *netdev, int new_mtu) | |||
1486 | 1518 | ||
1487 | if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) | 1519 | if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) |
1488 | || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) { | 1520 | || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) { |
1489 | IXGB_ERR("Invalid MTU setting\n"); | 1521 | DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu); |
1490 | return -EINVAL; | 1522 | return -EINVAL; |
1491 | } | 1523 | } |
1492 | 1524 | ||
1493 | if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) | 1525 | adapter->rx_buffer_len = max_frame; |
1494 | || (max_frame <= IXGB_RXBUFFER_2048)) { | ||
1495 | adapter->rx_buffer_len = IXGB_RXBUFFER_2048; | ||
1496 | |||
1497 | } else if(max_frame <= IXGB_RXBUFFER_4096) { | ||
1498 | adapter->rx_buffer_len = IXGB_RXBUFFER_4096; | ||
1499 | |||
1500 | } else if(max_frame <= IXGB_RXBUFFER_8192) { | ||
1501 | adapter->rx_buffer_len = IXGB_RXBUFFER_8192; | ||
1502 | |||
1503 | } else { | ||
1504 | adapter->rx_buffer_len = IXGB_RXBUFFER_16384; | ||
1505 | } | ||
1506 | 1526 | ||
1507 | netdev->mtu = new_mtu; | 1527 | netdev->mtu = new_mtu; |
1508 | 1528 | ||
1509 | if(old_max_frame != max_frame && netif_running(netdev)) { | 1529 | if ((old_max_frame != max_frame) && netif_running(netdev)) { |
1510 | |||
1511 | ixgb_down(adapter, TRUE); | 1530 | ixgb_down(adapter, TRUE); |
1512 | ixgb_up(adapter); | 1531 | ixgb_up(adapter); |
1513 | } | 1532 | } |
@@ -1765,23 +1784,43 @@ ixgb_clean_tx_irq(struct ixgb_adapter *adapter) | |||
1765 | 1784 | ||
1766 | tx_ring->next_to_clean = i; | 1785 | tx_ring->next_to_clean = i; |
1767 | 1786 | ||
1768 | spin_lock(&adapter->tx_lock); | 1787 | if (unlikely(netif_queue_stopped(netdev))) { |
1769 | if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) && | 1788 | spin_lock(&adapter->tx_lock); |
1770 | (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) { | 1789 | if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) && |
1771 | 1790 | (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) | |
1772 | netif_wake_queue(netdev); | 1791 | netif_wake_queue(netdev); |
1792 | spin_unlock(&adapter->tx_lock); | ||
1773 | } | 1793 | } |
1774 | spin_unlock(&adapter->tx_lock); | ||
1775 | 1794 | ||
1776 | if(adapter->detect_tx_hung) { | 1795 | if(adapter->detect_tx_hung) { |
1777 | /* detect a transmit hang in hardware, this serializes the | 1796 | /* detect a transmit hang in hardware, this serializes the |
1778 | * check with the clearing of time_stamp and movement of i */ | 1797 | * check with the clearing of time_stamp and movement of i */ |
1779 | adapter->detect_tx_hung = FALSE; | 1798 | adapter->detect_tx_hung = FALSE; |
1780 | if(tx_ring->buffer_info[i].dma && | 1799 | if (tx_ring->buffer_info[eop].dma && |
1781 | time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ) | 1800 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ) |
1782 | && !(IXGB_READ_REG(&adapter->hw, STATUS) & | 1801 | && !(IXGB_READ_REG(&adapter->hw, STATUS) & |
1783 | IXGB_STATUS_TXOFF)) | 1802 | IXGB_STATUS_TXOFF)) { |
1803 | /* detected Tx unit hang */ | ||
1804 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" | ||
1805 | " TDH <%x>\n" | ||
1806 | " TDT <%x>\n" | ||
1807 | " next_to_use <%x>\n" | ||
1808 | " next_to_clean <%x>\n" | ||
1809 | "buffer_info[next_to_clean]\n" | ||
1810 | " time_stamp <%lx>\n" | ||
1811 | " next_to_watch <%x>\n" | ||
1812 | " jiffies <%lx>\n" | ||
1813 | " next_to_watch.status <%x>\n", | ||
1814 | IXGB_READ_REG(&adapter->hw, TDH), | ||
1815 | IXGB_READ_REG(&adapter->hw, TDT), | ||
1816 | tx_ring->next_to_use, | ||
1817 | tx_ring->next_to_clean, | ||
1818 | tx_ring->buffer_info[eop].time_stamp, | ||
1819 | eop, | ||
1820 | jiffies, | ||
1821 | eop_desc->status); | ||
1784 | netif_stop_queue(netdev); | 1822 | netif_stop_queue(netdev); |
1823 | } | ||
1785 | } | 1824 | } |
1786 | 1825 | ||
1787 | return cleaned; | 1826 | return cleaned; |
@@ -1794,7 +1833,7 @@ ixgb_clean_tx_irq(struct ixgb_adapter *adapter) | |||
1794 | * @sk_buff: socket buffer with received data | 1833 | * @sk_buff: socket buffer with received data |
1795 | **/ | 1834 | **/ |
1796 | 1835 | ||
1797 | static inline void | 1836 | static void |
1798 | ixgb_rx_checksum(struct ixgb_adapter *adapter, | 1837 | ixgb_rx_checksum(struct ixgb_adapter *adapter, |
1799 | struct ixgb_rx_desc *rx_desc, | 1838 | struct ixgb_rx_desc *rx_desc, |
1800 | struct sk_buff *skb) | 1839 | struct sk_buff *skb) |
@@ -1858,6 +1897,7 @@ ixgb_clean_rx_irq(struct ixgb_adapter *adapter) | |||
1858 | #endif | 1897 | #endif |
1859 | status = rx_desc->status; | 1898 | status = rx_desc->status; |
1860 | skb = buffer_info->skb; | 1899 | skb = buffer_info->skb; |
1900 | buffer_info->skb = NULL; | ||
1861 | 1901 | ||
1862 | prefetch(skb->data); | 1902 | prefetch(skb->data); |
1863 | 1903 | ||
@@ -1902,6 +1942,26 @@ ixgb_clean_rx_irq(struct ixgb_adapter *adapter) | |||
1902 | goto rxdesc_done; | 1942 | goto rxdesc_done; |
1903 | } | 1943 | } |
1904 | 1944 | ||
1945 | /* code added for copybreak, this should improve | ||
1946 | * performance for small packets with large amounts | ||
1947 | * of reassembly being done in the stack */ | ||
1948 | #define IXGB_CB_LENGTH 256 | ||
1949 | if (length < IXGB_CB_LENGTH) { | ||
1950 | struct sk_buff *new_skb = | ||
1951 | dev_alloc_skb(length + NET_IP_ALIGN); | ||
1952 | if (new_skb) { | ||
1953 | skb_reserve(new_skb, NET_IP_ALIGN); | ||
1954 | new_skb->dev = netdev; | ||
1955 | memcpy(new_skb->data - NET_IP_ALIGN, | ||
1956 | skb->data - NET_IP_ALIGN, | ||
1957 | length + NET_IP_ALIGN); | ||
1958 | /* save the skb in buffer_info as good */ | ||
1959 | buffer_info->skb = skb; | ||
1960 | skb = new_skb; | ||
1961 | } | ||
1962 | } | ||
1963 | /* end copybreak code */ | ||
1964 | |||
1905 | /* Good Receive */ | 1965 | /* Good Receive */ |
1906 | skb_put(skb, length); | 1966 | skb_put(skb, length); |
1907 | 1967 | ||
@@ -1931,7 +1991,6 @@ ixgb_clean_rx_irq(struct ixgb_adapter *adapter) | |||
1931 | rxdesc_done: | 1991 | rxdesc_done: |
1932 | /* clean up descriptor, might be written over by hw */ | 1992 | /* clean up descriptor, might be written over by hw */ |
1933 | rx_desc->status = 0; | 1993 | rx_desc->status = 0; |
1934 | buffer_info->skb = NULL; | ||
1935 | 1994 | ||
1936 | /* use prefetched values */ | 1995 | /* use prefetched values */ |
1937 | rx_desc = next_rxd; | 1996 | rx_desc = next_rxd; |
@@ -1971,12 +2030,18 @@ ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter) | |||
1971 | 2030 | ||
1972 | /* leave three descriptors unused */ | 2031 | /* leave three descriptors unused */ |
1973 | while(--cleancount > 2) { | 2032 | while(--cleancount > 2) { |
1974 | rx_desc = IXGB_RX_DESC(*rx_ring, i); | 2033 | /* recycle! its good for you */ |
1975 | 2034 | if (!(skb = buffer_info->skb)) | |
1976 | skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN); | 2035 | skb = dev_alloc_skb(adapter->rx_buffer_len |
2036 | + NET_IP_ALIGN); | ||
2037 | else { | ||
2038 | skb_trim(skb, 0); | ||
2039 | goto map_skb; | ||
2040 | } | ||
1977 | 2041 | ||
1978 | if(unlikely(!skb)) { | 2042 | if (unlikely(!skb)) { |
1979 | /* Better luck next round */ | 2043 | /* Better luck next round */ |
2044 | adapter->alloc_rx_buff_failed++; | ||
1980 | break; | 2045 | break; |
1981 | } | 2046 | } |
1982 | 2047 | ||
@@ -1990,33 +2055,36 @@ ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter) | |||
1990 | 2055 | ||
1991 | buffer_info->skb = skb; | 2056 | buffer_info->skb = skb; |
1992 | buffer_info->length = adapter->rx_buffer_len; | 2057 | buffer_info->length = adapter->rx_buffer_len; |
1993 | buffer_info->dma = | 2058 | map_skb: |
1994 | pci_map_single(pdev, | 2059 | buffer_info->dma = pci_map_single(pdev, |
1995 | skb->data, | 2060 | skb->data, |
1996 | adapter->rx_buffer_len, | 2061 | adapter->rx_buffer_len, |
1997 | PCI_DMA_FROMDEVICE); | 2062 | PCI_DMA_FROMDEVICE); |
1998 | 2063 | ||
2064 | rx_desc = IXGB_RX_DESC(*rx_ring, i); | ||
1999 | rx_desc->buff_addr = cpu_to_le64(buffer_info->dma); | 2065 | rx_desc->buff_addr = cpu_to_le64(buffer_info->dma); |
2000 | /* guarantee DD bit not set now before h/w gets descriptor | 2066 | /* guarantee DD bit not set now before h/w gets descriptor |
2001 | * this is the rest of the workaround for h/w double | 2067 | * this is the rest of the workaround for h/w double |
2002 | * writeback. */ | 2068 | * writeback. */ |
2003 | rx_desc->status = 0; | 2069 | rx_desc->status = 0; |
2004 | 2070 | ||
2005 | if((i & ~(num_group_tail_writes- 1)) == i) { | ||
2006 | /* Force memory writes to complete before letting h/w | ||
2007 | * know there are new descriptors to fetch. (Only | ||
2008 | * applicable for weak-ordered memory model archs, | ||
2009 | * such as IA-64). */ | ||
2010 | wmb(); | ||
2011 | |||
2012 | IXGB_WRITE_REG(&adapter->hw, RDT, i); | ||
2013 | } | ||
2014 | 2071 | ||
2015 | if(++i == rx_ring->count) i = 0; | 2072 | if(++i == rx_ring->count) i = 0; |
2016 | buffer_info = &rx_ring->buffer_info[i]; | 2073 | buffer_info = &rx_ring->buffer_info[i]; |
2017 | } | 2074 | } |
2018 | 2075 | ||
2019 | rx_ring->next_to_use = i; | 2076 | if (likely(rx_ring->next_to_use != i)) { |
2077 | rx_ring->next_to_use = i; | ||
2078 | if (unlikely(i-- == 0)) | ||
2079 | i = (rx_ring->count - 1); | ||
2080 | |||
2081 | /* Force memory writes to complete before letting h/w | ||
2082 | * know there are new descriptors to fetch. (Only | ||
2083 | * applicable for weak-ordered memory model archs, such | ||
2084 | * as IA-64). */ | ||
2085 | wmb(); | ||
2086 | IXGB_WRITE_REG(&adapter->hw, RDT, i); | ||
2087 | } | ||
2020 | } | 2088 | } |
2021 | 2089 | ||
2022 | /** | 2090 | /** |
diff --git a/drivers/net/ixgb/ixgb_osdep.h b/drivers/net/ixgb/ixgb_osdep.h index dba20481ee80..ee982feac64d 100644 --- a/drivers/net/ixgb/ixgb_osdep.h +++ b/drivers/net/ixgb/ixgb_osdep.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
diff --git a/drivers/net/ixgb/ixgb_param.c b/drivers/net/ixgb/ixgb_param.c index 8a83dfdf746d..39fbed29a3df 100644 --- a/drivers/net/ixgb/ixgb_param.c +++ b/drivers/net/ixgb/ixgb_param.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms of the GNU General Public License as published by the Free |
@@ -76,7 +76,7 @@ IXGB_PARAM(RxDescriptors, "Number of receive descriptors"); | |||
76 | * - 2 - Tx only, generate PAUSE frames but ignore them on receive | 76 | * - 2 - Tx only, generate PAUSE frames but ignore them on receive |
77 | * - 3 - Full Flow Control Support | 77 | * - 3 - Full Flow Control Support |
78 | * | 78 | * |
79 | * Default Value: Read flow control settings from the EEPROM | 79 | * Default Value: 2 - Tx only (silicon bug avoidance) |
80 | */ | 80 | */ |
81 | 81 | ||
82 | IXGB_PARAM(FlowControl, "Flow Control setting"); | 82 | IXGB_PARAM(FlowControl, "Flow Control setting"); |
@@ -137,7 +137,7 @@ IXGB_PARAM(RxFCLowThresh, "Receive Flow Control Low Threshold"); | |||
137 | * | 137 | * |
138 | * Valid Range: 1 - 65535 | 138 | * Valid Range: 1 - 65535 |
139 | * | 139 | * |
140 | * Default Value: 256 (0x100) | 140 | * Default Value: 65535 (0xffff) (we'll send an xon if we recover) |
141 | */ | 141 | */ |
142 | 142 | ||
143 | IXGB_PARAM(FCReqTimeout, "Flow Control Request Timeout"); | 143 | IXGB_PARAM(FCReqTimeout, "Flow Control Request Timeout"); |
@@ -165,8 +165,6 @@ IXGB_PARAM(IntDelayEnable, "Transmit Interrupt Delay Enable"); | |||
165 | 165 | ||
166 | #define XSUMRX_DEFAULT OPTION_ENABLED | 166 | #define XSUMRX_DEFAULT OPTION_ENABLED |
167 | 167 | ||
168 | #define FLOW_CONTROL_FULL ixgb_fc_full | ||
169 | #define FLOW_CONTROL_DEFAULT FLOW_CONTROL_FULL | ||
170 | #define DEFAULT_FCRTL 0x28000 | 168 | #define DEFAULT_FCRTL 0x28000 |
171 | #define DEFAULT_FCRTH 0x30000 | 169 | #define DEFAULT_FCRTH 0x30000 |
172 | #define MIN_FCRTL 0 | 170 | #define MIN_FCRTL 0 |
@@ -174,9 +172,9 @@ IXGB_PARAM(IntDelayEnable, "Transmit Interrupt Delay Enable"); | |||
174 | #define MIN_FCRTH 8 | 172 | #define MIN_FCRTH 8 |
175 | #define MAX_FCRTH 0x3FFF0 | 173 | #define MAX_FCRTH 0x3FFF0 |
176 | 174 | ||
177 | #define DEFAULT_FCPAUSE 0x100 /* this may be too long */ | ||
178 | #define MIN_FCPAUSE 1 | 175 | #define MIN_FCPAUSE 1 |
179 | #define MAX_FCPAUSE 0xffff | 176 | #define MAX_FCPAUSE 0xffff |
177 | #define DEFAULT_FCPAUSE 0xFFFF /* this may be too long */ | ||
180 | 178 | ||
181 | struct ixgb_option { | 179 | struct ixgb_option { |
182 | enum { enable_option, range_option, list_option } type; | 180 | enum { enable_option, range_option, list_option } type; |
@@ -336,7 +334,7 @@ ixgb_check_options(struct ixgb_adapter *adapter) | |||
336 | .type = list_option, | 334 | .type = list_option, |
337 | .name = "Flow Control", | 335 | .name = "Flow Control", |
338 | .err = "reading default settings from EEPROM", | 336 | .err = "reading default settings from EEPROM", |
339 | .def = ixgb_fc_full, | 337 | .def = ixgb_fc_tx_pause, |
340 | .arg = { .l = { .nr = LIST_LEN(fc_list), | 338 | .arg = { .l = { .nr = LIST_LEN(fc_list), |
341 | .p = fc_list }} | 339 | .p = fc_list }} |
342 | }; | 340 | }; |
@@ -365,8 +363,8 @@ ixgb_check_options(struct ixgb_adapter *adapter) | |||
365 | } else { | 363 | } else { |
366 | adapter->hw.fc.high_water = opt.def; | 364 | adapter->hw.fc.high_water = opt.def; |
367 | } | 365 | } |
368 | if(!(adapter->hw.fc.type & ixgb_fc_rx_pause) ) | 366 | if (!(adapter->hw.fc.type & ixgb_fc_tx_pause) ) |
369 | printk (KERN_INFO | 367 | printk (KERN_INFO |
370 | "Ignoring RxFCHighThresh when no RxFC\n"); | 368 | "Ignoring RxFCHighThresh when no RxFC\n"); |
371 | } | 369 | } |
372 | { /* Receive Flow Control Low Threshold */ | 370 | { /* Receive Flow Control Low Threshold */ |
@@ -385,8 +383,8 @@ ixgb_check_options(struct ixgb_adapter *adapter) | |||
385 | } else { | 383 | } else { |
386 | adapter->hw.fc.low_water = opt.def; | 384 | adapter->hw.fc.low_water = opt.def; |
387 | } | 385 | } |
388 | if(!(adapter->hw.fc.type & ixgb_fc_rx_pause) ) | 386 | if (!(adapter->hw.fc.type & ixgb_fc_tx_pause) ) |
389 | printk (KERN_INFO | 387 | printk (KERN_INFO |
390 | "Ignoring RxFCLowThresh when no RxFC\n"); | 388 | "Ignoring RxFCLowThresh when no RxFC\n"); |
391 | } | 389 | } |
392 | { /* Flow Control Pause Time Request*/ | 390 | { /* Flow Control Pause Time Request*/ |
@@ -406,12 +404,12 @@ ixgb_check_options(struct ixgb_adapter *adapter) | |||
406 | } else { | 404 | } else { |
407 | adapter->hw.fc.pause_time = opt.def; | 405 | adapter->hw.fc.pause_time = opt.def; |
408 | } | 406 | } |
409 | if(!(adapter->hw.fc.type & ixgb_fc_rx_pause) ) | 407 | if (!(adapter->hw.fc.type & ixgb_fc_tx_pause) ) |
410 | printk (KERN_INFO | 408 | printk (KERN_INFO |
411 | "Ignoring FCReqTimeout when no RxFC\n"); | 409 | "Ignoring FCReqTimeout when no RxFC\n"); |
412 | } | 410 | } |
413 | /* high low and spacing check for rx flow control thresholds */ | 411 | /* high low and spacing check for rx flow control thresholds */ |
414 | if (adapter->hw.fc.type & ixgb_fc_rx_pause) { | 412 | if (adapter->hw.fc.type & ixgb_fc_tx_pause) { |
415 | /* high must be greater than low */ | 413 | /* high must be greater than low */ |
416 | if (adapter->hw.fc.high_water < (adapter->hw.fc.low_water + 8)) { | 414 | if (adapter->hw.fc.high_water < (adapter->hw.fc.low_water + 8)) { |
417 | /* set defaults */ | 415 | /* set defaults */ |
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 411f4d809c47..625ff61c9988 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c | |||
@@ -1200,7 +1200,7 @@ static int mv643xx_eth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1200 | } | 1200 | } |
1201 | 1201 | ||
1202 | if (has_tiny_unaligned_frags(skb)) { | 1202 | if (has_tiny_unaligned_frags(skb)) { |
1203 | if ((skb_linearize(skb, GFP_ATOMIC) != 0)) { | 1203 | if (__skb_linearize(skb)) { |
1204 | stats->tx_dropped++; | 1204 | stats->tx_dropped++; |
1205 | printk(KERN_DEBUG "%s: failed to linearize tiny " | 1205 | printk(KERN_DEBUG "%s: failed to linearize tiny " |
1206 | "unaligned fragment\n", dev->name); | 1206 | "unaligned fragment\n", dev->name); |
diff --git a/drivers/net/myri10ge/Makefile b/drivers/net/myri10ge/Makefile new file mode 100644 index 000000000000..5df891647aee --- /dev/null +++ b/drivers/net/myri10ge/Makefile | |||
@@ -0,0 +1,5 @@ | |||
1 | # | ||
2 | # Makefile for the Myricom Myri-10G ethernet driver | ||
3 | # | ||
4 | |||
5 | obj-$(CONFIG_MYRI10GE) += myri10ge.o | ||
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c new file mode 100644 index 000000000000..e1feb58bd661 --- /dev/null +++ b/drivers/net/myri10ge/myri10ge.c | |||
@@ -0,0 +1,2869 @@ | |||
1 | /************************************************************************* | ||
2 | * myri10ge.c: Myricom Myri-10G Ethernet driver. | ||
3 | * | ||
4 | * Copyright (C) 2005, 2006 Myricom, Inc. | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * Redistribution and use in source and binary forms, with or without | ||
8 | * modification, are permitted provided that the following conditions | ||
9 | * are met: | ||
10 | * 1. Redistributions of source code must retain the above copyright | ||
11 | * notice, this list of conditions and the following disclaimer. | ||
12 | * 2. Redistributions in binary form must reproduce the above copyright | ||
13 | * notice, this list of conditions and the following disclaimer in the | ||
14 | * documentation and/or other materials provided with the distribution. | ||
15 | * 3. Neither the name of Myricom, Inc. nor the names of its contributors | ||
16 | * may be used to endorse or promote products derived from this software | ||
17 | * without specific prior written permission. | ||
18 | * | ||
19 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | ||
20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
22 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | ||
23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||
24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | ||
25 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
26 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
27 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | ||
28 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | ||
29 | * SUCH DAMAGE. | ||
30 | * | ||
31 | * | ||
32 | * If the eeprom on your board is not recent enough, you will need to get a | ||
33 | * newer firmware image at: | ||
34 | * http://www.myri.com/scs/download-Myri10GE.html | ||
35 | * | ||
36 | * Contact Information: | ||
37 | * <help@myri.com> | ||
38 | * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006 | ||
39 | *************************************************************************/ | ||
40 | |||
41 | #include <linux/tcp.h> | ||
42 | #include <linux/netdevice.h> | ||
43 | #include <linux/skbuff.h> | ||
44 | #include <linux/string.h> | ||
45 | #include <linux/module.h> | ||
46 | #include <linux/pci.h> | ||
47 | #include <linux/dma-mapping.h> | ||
48 | #include <linux/etherdevice.h> | ||
49 | #include <linux/if_ether.h> | ||
50 | #include <linux/if_vlan.h> | ||
51 | #include <linux/ip.h> | ||
52 | #include <linux/inet.h> | ||
53 | #include <linux/in.h> | ||
54 | #include <linux/ethtool.h> | ||
55 | #include <linux/firmware.h> | ||
56 | #include <linux/delay.h> | ||
57 | #include <linux/version.h> | ||
58 | #include <linux/timer.h> | ||
59 | #include <linux/vmalloc.h> | ||
60 | #include <linux/crc32.h> | ||
61 | #include <linux/moduleparam.h> | ||
62 | #include <linux/io.h> | ||
63 | #include <net/checksum.h> | ||
64 | #include <asm/byteorder.h> | ||
65 | #include <asm/io.h> | ||
66 | #include <asm/processor.h> | ||
67 | #ifdef CONFIG_MTRR | ||
68 | #include <asm/mtrr.h> | ||
69 | #endif | ||
70 | |||
71 | #include "myri10ge_mcp.h" | ||
72 | #include "myri10ge_mcp_gen_header.h" | ||
73 | |||
74 | #define MYRI10GE_VERSION_STR "1.0.0" | ||
75 | |||
76 | MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); | ||
77 | MODULE_AUTHOR("Maintainer: help@myri.com"); | ||
78 | MODULE_VERSION(MYRI10GE_VERSION_STR); | ||
79 | MODULE_LICENSE("Dual BSD/GPL"); | ||
80 | |||
81 | #define MYRI10GE_MAX_ETHER_MTU 9014 | ||
82 | |||
83 | #define MYRI10GE_ETH_STOPPED 0 | ||
84 | #define MYRI10GE_ETH_STOPPING 1 | ||
85 | #define MYRI10GE_ETH_STARTING 2 | ||
86 | #define MYRI10GE_ETH_RUNNING 3 | ||
87 | #define MYRI10GE_ETH_OPEN_FAILED 4 | ||
88 | |||
89 | #define MYRI10GE_EEPROM_STRINGS_SIZE 256 | ||
90 | #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2) | ||
91 | |||
92 | #define MYRI10GE_NO_CONFIRM_DATA 0xffffffff | ||
93 | #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff | ||
94 | |||
95 | struct myri10ge_rx_buffer_state { | ||
96 | struct sk_buff *skb; | ||
97 | DECLARE_PCI_UNMAP_ADDR(bus) | ||
98 | DECLARE_PCI_UNMAP_LEN(len) | ||
99 | }; | ||
100 | |||
101 | struct myri10ge_tx_buffer_state { | ||
102 | struct sk_buff *skb; | ||
103 | int last; | ||
104 | DECLARE_PCI_UNMAP_ADDR(bus) | ||
105 | DECLARE_PCI_UNMAP_LEN(len) | ||
106 | }; | ||
107 | |||
108 | struct myri10ge_cmd { | ||
109 | u32 data0; | ||
110 | u32 data1; | ||
111 | u32 data2; | ||
112 | }; | ||
113 | |||
114 | struct myri10ge_rx_buf { | ||
115 | struct mcp_kreq_ether_recv __iomem *lanai; /* lanai ptr for recv ring */ | ||
116 | u8 __iomem *wc_fifo; /* w/c rx dma addr fifo address */ | ||
117 | struct mcp_kreq_ether_recv *shadow; /* host shadow of recv ring */ | ||
118 | struct myri10ge_rx_buffer_state *info; | ||
119 | int cnt; | ||
120 | int alloc_fail; | ||
121 | int mask; /* number of rx slots -1 */ | ||
122 | }; | ||
123 | |||
124 | struct myri10ge_tx_buf { | ||
125 | struct mcp_kreq_ether_send __iomem *lanai; /* lanai ptr for sendq */ | ||
126 | u8 __iomem *wc_fifo; /* w/c send fifo address */ | ||
127 | struct mcp_kreq_ether_send *req_list; /* host shadow of sendq */ | ||
128 | char *req_bytes; | ||
129 | struct myri10ge_tx_buffer_state *info; | ||
130 | int mask; /* number of transmit slots -1 */ | ||
131 | int boundary; /* boundary transmits cannot cross */ | ||
132 | int req ____cacheline_aligned; /* transmit slots submitted */ | ||
133 | int pkt_start; /* packets started */ | ||
134 | int done ____cacheline_aligned; /* transmit slots completed */ | ||
135 | int pkt_done; /* packets completed */ | ||
136 | }; | ||
137 | |||
138 | struct myri10ge_rx_done { | ||
139 | struct mcp_slot *entry; | ||
140 | dma_addr_t bus; | ||
141 | int cnt; | ||
142 | int idx; | ||
143 | }; | ||
144 | |||
145 | struct myri10ge_priv { | ||
146 | int running; /* running? */ | ||
147 | int csum_flag; /* rx_csums? */ | ||
148 | struct myri10ge_tx_buf tx; /* transmit ring */ | ||
149 | struct myri10ge_rx_buf rx_small; | ||
150 | struct myri10ge_rx_buf rx_big; | ||
151 | struct myri10ge_rx_done rx_done; | ||
152 | int small_bytes; | ||
153 | struct net_device *dev; | ||
154 | struct net_device_stats stats; | ||
155 | u8 __iomem *sram; | ||
156 | int sram_size; | ||
157 | unsigned long board_span; | ||
158 | unsigned long iomem_base; | ||
159 | u32 __iomem *irq_claim; | ||
160 | u32 __iomem *irq_deassert; | ||
161 | char *mac_addr_string; | ||
162 | struct mcp_cmd_response *cmd; | ||
163 | dma_addr_t cmd_bus; | ||
164 | struct mcp_irq_data *fw_stats; | ||
165 | dma_addr_t fw_stats_bus; | ||
166 | struct pci_dev *pdev; | ||
167 | int msi_enabled; | ||
168 | unsigned int link_state; | ||
169 | unsigned int rdma_tags_available; | ||
170 | int intr_coal_delay; | ||
171 | u32 __iomem *intr_coal_delay_ptr; | ||
172 | int mtrr; | ||
173 | int wake_queue; | ||
174 | int stop_queue; | ||
175 | int down_cnt; | ||
176 | wait_queue_head_t down_wq; | ||
177 | struct work_struct watchdog_work; | ||
178 | struct timer_list watchdog_timer; | ||
179 | int watchdog_tx_done; | ||
180 | int watchdog_resets; | ||
181 | int tx_linearized; | ||
182 | int pause; | ||
183 | char *fw_name; | ||
184 | char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE]; | ||
185 | char fw_version[128]; | ||
186 | u8 mac_addr[6]; /* eeprom mac address */ | ||
187 | unsigned long serial_number; | ||
188 | int vendor_specific_offset; | ||
189 | u32 devctl; | ||
190 | u16 msi_flags; | ||
191 | u32 pm_state[16]; | ||
192 | u32 read_dma; | ||
193 | u32 write_dma; | ||
194 | u32 read_write_dma; | ||
195 | }; | ||
196 | |||
197 | static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat"; | ||
198 | static char *myri10ge_fw_aligned = "myri10ge_eth_z8e.dat"; | ||
199 | |||
200 | static char *myri10ge_fw_name = NULL; | ||
201 | module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR); | ||
202 | MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name\n"); | ||
203 | |||
204 | static int myri10ge_ecrc_enable = 1; | ||
205 | module_param(myri10ge_ecrc_enable, int, S_IRUGO); | ||
206 | MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E\n"); | ||
207 | |||
208 | static int myri10ge_max_intr_slots = 1024; | ||
209 | module_param(myri10ge_max_intr_slots, int, S_IRUGO); | ||
210 | MODULE_PARM_DESC(myri10ge_max_intr_slots, "Interrupt queue slots\n"); | ||
211 | |||
212 | static int myri10ge_small_bytes = -1; /* -1 == auto */ | ||
213 | module_param(myri10ge_small_bytes, int, S_IRUGO | S_IWUSR); | ||
214 | MODULE_PARM_DESC(myri10ge_small_bytes, "Threshold of small packets\n"); | ||
215 | |||
216 | static int myri10ge_msi = 1; /* enable msi by default */ | ||
217 | module_param(myri10ge_msi, int, S_IRUGO); | ||
218 | MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts\n"); | ||
219 | |||
220 | static int myri10ge_intr_coal_delay = 25; | ||
221 | module_param(myri10ge_intr_coal_delay, int, S_IRUGO); | ||
222 | MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay\n"); | ||
223 | |||
224 | static int myri10ge_flow_control = 1; | ||
225 | module_param(myri10ge_flow_control, int, S_IRUGO); | ||
226 | MODULE_PARM_DESC(myri10ge_flow_control, "Pause parameter\n"); | ||
227 | |||
228 | static int myri10ge_deassert_wait = 1; | ||
229 | module_param(myri10ge_deassert_wait, int, S_IRUGO | S_IWUSR); | ||
230 | MODULE_PARM_DESC(myri10ge_deassert_wait, | ||
231 | "Wait when deasserting legacy interrupts\n"); | ||
232 | |||
233 | static int myri10ge_force_firmware = 0; | ||
234 | module_param(myri10ge_force_firmware, int, S_IRUGO); | ||
235 | MODULE_PARM_DESC(myri10ge_force_firmware, | ||
236 | "Force firmware to assume aligned completions\n"); | ||
237 | |||
238 | static int myri10ge_skb_cross_4k = 0; | ||
239 | module_param(myri10ge_skb_cross_4k, int, S_IRUGO | S_IWUSR); | ||
240 | MODULE_PARM_DESC(myri10ge_skb_cross_4k, | ||
241 | "Can a small skb cross a 4KB boundary?\n"); | ||
242 | |||
243 | static int myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN; | ||
244 | module_param(myri10ge_initial_mtu, int, S_IRUGO); | ||
245 | MODULE_PARM_DESC(myri10ge_initial_mtu, "Initial MTU\n"); | ||
246 | |||
247 | static int myri10ge_napi_weight = 64; | ||
248 | module_param(myri10ge_napi_weight, int, S_IRUGO); | ||
249 | MODULE_PARM_DESC(myri10ge_napi_weight, "Set NAPI weight\n"); | ||
250 | |||
251 | static int myri10ge_watchdog_timeout = 1; | ||
252 | module_param(myri10ge_watchdog_timeout, int, S_IRUGO); | ||
253 | MODULE_PARM_DESC(myri10ge_watchdog_timeout, "Set watchdog timeout\n"); | ||
254 | |||
255 | static int myri10ge_max_irq_loops = 1048576; | ||
256 | module_param(myri10ge_max_irq_loops, int, S_IRUGO); | ||
257 | MODULE_PARM_DESC(myri10ge_max_irq_loops, | ||
258 | "Set stuck legacy IRQ detection threshold\n"); | ||
259 | |||
260 | #define MYRI10GE_FW_OFFSET 1024*1024 | ||
261 | #define MYRI10GE_HIGHPART_TO_U32(X) \ | ||
262 | (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0) | ||
263 | #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X)) | ||
264 | |||
265 | #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8) | ||
266 | |||
267 | static int | ||
268 | myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd, | ||
269 | struct myri10ge_cmd *data, int atomic) | ||
270 | { | ||
271 | struct mcp_cmd *buf; | ||
272 | char buf_bytes[sizeof(*buf) + 8]; | ||
273 | struct mcp_cmd_response *response = mgp->cmd; | ||
274 | char __iomem *cmd_addr = mgp->sram + MXGEFW_CMD_OFFSET; | ||
275 | u32 dma_low, dma_high, result, value; | ||
276 | int sleep_total = 0; | ||
277 | |||
278 | /* ensure buf is aligned to 8 bytes */ | ||
279 | buf = (struct mcp_cmd *)ALIGN((unsigned long)buf_bytes, 8); | ||
280 | |||
281 | buf->data0 = htonl(data->data0); | ||
282 | buf->data1 = htonl(data->data1); | ||
283 | buf->data2 = htonl(data->data2); | ||
284 | buf->cmd = htonl(cmd); | ||
285 | dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus); | ||
286 | dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus); | ||
287 | |||
288 | buf->response_addr.low = htonl(dma_low); | ||
289 | buf->response_addr.high = htonl(dma_high); | ||
290 | response->result = MYRI10GE_NO_RESPONSE_RESULT; | ||
291 | mb(); | ||
292 | myri10ge_pio_copy(cmd_addr, buf, sizeof(*buf)); | ||
293 | |||
294 | /* wait up to 15ms. Longest command is the DMA benchmark, | ||
295 | * which is capped at 5ms, but runs from a timeout handler | ||
296 | * that runs every 7.8ms. So a 15ms timeout leaves us with | ||
297 | * a 2.2ms margin | ||
298 | */ | ||
299 | if (atomic) { | ||
300 | /* if atomic is set, do not sleep, | ||
301 | * and try to get the completion quickly | ||
302 | * (1ms will be enough for those commands) */ | ||
303 | for (sleep_total = 0; | ||
304 | sleep_total < 1000 | ||
305 | && response->result == MYRI10GE_NO_RESPONSE_RESULT; | ||
306 | sleep_total += 10) | ||
307 | udelay(10); | ||
308 | } else { | ||
309 | /* use msleep for most command */ | ||
310 | for (sleep_total = 0; | ||
311 | sleep_total < 15 | ||
312 | && response->result == MYRI10GE_NO_RESPONSE_RESULT; | ||
313 | sleep_total++) | ||
314 | msleep(1); | ||
315 | } | ||
316 | |||
317 | result = ntohl(response->result); | ||
318 | value = ntohl(response->data); | ||
319 | if (result != MYRI10GE_NO_RESPONSE_RESULT) { | ||
320 | if (result == 0) { | ||
321 | data->data0 = value; | ||
322 | return 0; | ||
323 | } else { | ||
324 | dev_err(&mgp->pdev->dev, | ||
325 | "command %d failed, result = %d\n", | ||
326 | cmd, result); | ||
327 | return -ENXIO; | ||
328 | } | ||
329 | } | ||
330 | |||
331 | dev_err(&mgp->pdev->dev, "command %d timed out, result = %d\n", | ||
332 | cmd, result); | ||
333 | return -EAGAIN; | ||
334 | } | ||
335 | |||
336 | /* | ||
337 | * The eeprom strings on the lanaiX have the format | ||
338 | * SN=x\0 | ||
339 | * MAC=x:x:x:x:x:x\0 | ||
340 | * PT:ddd mmm xx xx:xx:xx xx\0 | ||
341 | * PV:ddd mmm xx xx:xx:xx xx\0 | ||
342 | */ | ||
343 | static int myri10ge_read_mac_addr(struct myri10ge_priv *mgp) | ||
344 | { | ||
345 | char *ptr, *limit; | ||
346 | int i; | ||
347 | |||
348 | ptr = mgp->eeprom_strings; | ||
349 | limit = mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE; | ||
350 | |||
351 | while (*ptr != '\0' && ptr < limit) { | ||
352 | if (memcmp(ptr, "MAC=", 4) == 0) { | ||
353 | ptr += 4; | ||
354 | mgp->mac_addr_string = ptr; | ||
355 | for (i = 0; i < 6; i++) { | ||
356 | if ((ptr + 2) > limit) | ||
357 | goto abort; | ||
358 | mgp->mac_addr[i] = | ||
359 | simple_strtoul(ptr, &ptr, 16); | ||
360 | ptr += 1; | ||
361 | } | ||
362 | } | ||
363 | if (memcmp((const void *)ptr, "SN=", 3) == 0) { | ||
364 | ptr += 3; | ||
365 | mgp->serial_number = simple_strtoul(ptr, &ptr, 10); | ||
366 | } | ||
367 | while (ptr < limit && *ptr++) ; | ||
368 | } | ||
369 | |||
370 | return 0; | ||
371 | |||
372 | abort: | ||
373 | dev_err(&mgp->pdev->dev, "failed to parse eeprom_strings\n"); | ||
374 | return -ENXIO; | ||
375 | } | ||
376 | |||
377 | /* | ||
378 | * Enable or disable periodic RDMAs from the host to make certain | ||
379 | * chipsets resend dropped PCIe messages | ||
380 | */ | ||
381 | |||
382 | static void myri10ge_dummy_rdma(struct myri10ge_priv *mgp, int enable) | ||
383 | { | ||
384 | char __iomem *submit; | ||
385 | u32 buf[16]; | ||
386 | u32 dma_low, dma_high; | ||
387 | int i; | ||
388 | |||
389 | /* clear confirmation addr */ | ||
390 | mgp->cmd->data = 0; | ||
391 | mb(); | ||
392 | |||
393 | /* send a rdma command to the PCIe engine, and wait for the | ||
394 | * response in the confirmation address. The firmware should | ||
395 | * write a -1 there to indicate it is alive and well | ||
396 | */ | ||
397 | dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus); | ||
398 | dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus); | ||
399 | |||
400 | buf[0] = htonl(dma_high); /* confirm addr MSW */ | ||
401 | buf[1] = htonl(dma_low); /* confirm addr LSW */ | ||
402 | buf[2] = htonl(MYRI10GE_NO_CONFIRM_DATA); /* confirm data */ | ||
403 | buf[3] = htonl(dma_high); /* dummy addr MSW */ | ||
404 | buf[4] = htonl(dma_low); /* dummy addr LSW */ | ||
405 | buf[5] = htonl(enable); /* enable? */ | ||
406 | |||
407 | submit = mgp->sram + 0xfc01c0; | ||
408 | |||
409 | myri10ge_pio_copy(submit, &buf, sizeof(buf)); | ||
410 | for (i = 0; mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20; i++) | ||
411 | msleep(1); | ||
412 | if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA) | ||
413 | dev_err(&mgp->pdev->dev, "dummy rdma %s failed\n", | ||
414 | (enable ? "enable" : "disable")); | ||
415 | } | ||
416 | |||
417 | static int | ||
418 | myri10ge_validate_firmware(struct myri10ge_priv *mgp, | ||
419 | struct mcp_gen_header *hdr) | ||
420 | { | ||
421 | struct device *dev = &mgp->pdev->dev; | ||
422 | int major, minor; | ||
423 | |||
424 | /* check firmware type */ | ||
425 | if (ntohl(hdr->mcp_type) != MCP_TYPE_ETH) { | ||
426 | dev_err(dev, "Bad firmware type: 0x%x\n", ntohl(hdr->mcp_type)); | ||
427 | return -EINVAL; | ||
428 | } | ||
429 | |||
430 | /* save firmware version for ethtool */ | ||
431 | strncpy(mgp->fw_version, hdr->version, sizeof(mgp->fw_version)); | ||
432 | |||
433 | sscanf(mgp->fw_version, "%d.%d", &major, &minor); | ||
434 | |||
435 | if (!(major == MXGEFW_VERSION_MAJOR && minor == MXGEFW_VERSION_MINOR)) { | ||
436 | dev_err(dev, "Found firmware version %s\n", mgp->fw_version); | ||
437 | dev_err(dev, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR, | ||
438 | MXGEFW_VERSION_MINOR); | ||
439 | return -EINVAL; | ||
440 | } | ||
441 | return 0; | ||
442 | } | ||
443 | |||
444 | static int myri10ge_load_hotplug_firmware(struct myri10ge_priv *mgp, u32 * size) | ||
445 | { | ||
446 | unsigned crc, reread_crc; | ||
447 | const struct firmware *fw; | ||
448 | struct device *dev = &mgp->pdev->dev; | ||
449 | struct mcp_gen_header *hdr; | ||
450 | size_t hdr_offset; | ||
451 | int status; | ||
452 | |||
453 | if ((status = request_firmware(&fw, mgp->fw_name, dev)) < 0) { | ||
454 | dev_err(dev, "Unable to load %s firmware image via hotplug\n", | ||
455 | mgp->fw_name); | ||
456 | status = -EINVAL; | ||
457 | goto abort_with_nothing; | ||
458 | } | ||
459 | |||
460 | /* check size */ | ||
461 | |||
462 | if (fw->size >= mgp->sram_size - MYRI10GE_FW_OFFSET || | ||
463 | fw->size < MCP_HEADER_PTR_OFFSET + 4) { | ||
464 | dev_err(dev, "Firmware size invalid:%d\n", (int)fw->size); | ||
465 | status = -EINVAL; | ||
466 | goto abort_with_fw; | ||
467 | } | ||
468 | |||
469 | /* check id */ | ||
470 | hdr_offset = ntohl(*(u32 *) (fw->data + MCP_HEADER_PTR_OFFSET)); | ||
471 | if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > fw->size) { | ||
472 | dev_err(dev, "Bad firmware file\n"); | ||
473 | status = -EINVAL; | ||
474 | goto abort_with_fw; | ||
475 | } | ||
476 | hdr = (void *)(fw->data + hdr_offset); | ||
477 | |||
478 | status = myri10ge_validate_firmware(mgp, hdr); | ||
479 | if (status != 0) | ||
480 | goto abort_with_fw; | ||
481 | |||
482 | crc = crc32(~0, fw->data, fw->size); | ||
483 | if (mgp->tx.boundary == 2048) { | ||
484 | /* Avoid PCI burst on chipset with unaligned completions. */ | ||
485 | int i; | ||
486 | __iomem u32 *ptr = (__iomem u32 *) (mgp->sram + | ||
487 | MYRI10GE_FW_OFFSET); | ||
488 | for (i = 0; i < fw->size / 4; i++) { | ||
489 | __raw_writel(((u32 *) fw->data)[i], ptr + i); | ||
490 | wmb(); | ||
491 | } | ||
492 | } else { | ||
493 | myri10ge_pio_copy(mgp->sram + MYRI10GE_FW_OFFSET, fw->data, | ||
494 | fw->size); | ||
495 | } | ||
496 | /* corruption checking is good for parity recovery and buggy chipset */ | ||
497 | memcpy_fromio(fw->data, mgp->sram + MYRI10GE_FW_OFFSET, fw->size); | ||
498 | reread_crc = crc32(~0, fw->data, fw->size); | ||
499 | if (crc != reread_crc) { | ||
500 | dev_err(dev, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n", | ||
501 | (unsigned)fw->size, reread_crc, crc); | ||
502 | status = -EIO; | ||
503 | goto abort_with_fw; | ||
504 | } | ||
505 | *size = (u32) fw->size; | ||
506 | |||
507 | abort_with_fw: | ||
508 | release_firmware(fw); | ||
509 | |||
510 | abort_with_nothing: | ||
511 | return status; | ||
512 | } | ||
513 | |||
514 | static int myri10ge_adopt_running_firmware(struct myri10ge_priv *mgp) | ||
515 | { | ||
516 | struct mcp_gen_header *hdr; | ||
517 | struct device *dev = &mgp->pdev->dev; | ||
518 | const size_t bytes = sizeof(struct mcp_gen_header); | ||
519 | size_t hdr_offset; | ||
520 | int status; | ||
521 | |||
522 | /* find running firmware header */ | ||
523 | hdr_offset = ntohl(__raw_readl(mgp->sram + MCP_HEADER_PTR_OFFSET)); | ||
524 | |||
525 | if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > mgp->sram_size) { | ||
526 | dev_err(dev, "Running firmware has bad header offset (%d)\n", | ||
527 | (int)hdr_offset); | ||
528 | return -EIO; | ||
529 | } | ||
530 | |||
531 | /* copy header of running firmware from SRAM to host memory to | ||
532 | * validate firmware */ | ||
533 | hdr = kmalloc(bytes, GFP_KERNEL); | ||
534 | if (hdr == NULL) { | ||
535 | dev_err(dev, "could not malloc firmware hdr\n"); | ||
536 | return -ENOMEM; | ||
537 | } | ||
538 | memcpy_fromio(hdr, mgp->sram + hdr_offset, bytes); | ||
539 | status = myri10ge_validate_firmware(mgp, hdr); | ||
540 | kfree(hdr); | ||
541 | return status; | ||
542 | } | ||
543 | |||
544 | static int myri10ge_load_firmware(struct myri10ge_priv *mgp) | ||
545 | { | ||
546 | char __iomem *submit; | ||
547 | u32 buf[16]; | ||
548 | u32 dma_low, dma_high, size; | ||
549 | int status, i; | ||
550 | |||
551 | size = 0; | ||
552 | status = myri10ge_load_hotplug_firmware(mgp, &size); | ||
553 | if (status) { | ||
554 | dev_warn(&mgp->pdev->dev, "hotplug firmware loading failed\n"); | ||
555 | |||
556 | /* Do not attempt to adopt firmware if there | ||
557 | * was a bad crc */ | ||
558 | if (status == -EIO) | ||
559 | return status; | ||
560 | |||
561 | status = myri10ge_adopt_running_firmware(mgp); | ||
562 | if (status != 0) { | ||
563 | dev_err(&mgp->pdev->dev, | ||
564 | "failed to adopt running firmware\n"); | ||
565 | return status; | ||
566 | } | ||
567 | dev_info(&mgp->pdev->dev, | ||
568 | "Successfully adopted running firmware\n"); | ||
569 | if (mgp->tx.boundary == 4096) { | ||
570 | dev_warn(&mgp->pdev->dev, | ||
571 | "Using firmware currently running on NIC" | ||
572 | ". For optimal\n"); | ||
573 | dev_warn(&mgp->pdev->dev, | ||
574 | "performance consider loading optimized " | ||
575 | "firmware\n"); | ||
576 | dev_warn(&mgp->pdev->dev, "via hotplug\n"); | ||
577 | } | ||
578 | |||
579 | mgp->fw_name = "adopted"; | ||
580 | mgp->tx.boundary = 2048; | ||
581 | return status; | ||
582 | } | ||
583 | |||
584 | /* clear confirmation addr */ | ||
585 | mgp->cmd->data = 0; | ||
586 | mb(); | ||
587 | |||
588 | /* send a reload command to the bootstrap MCP, and wait for the | ||
589 | * response in the confirmation address. The firmware should | ||
590 | * write a -1 there to indicate it is alive and well | ||
591 | */ | ||
592 | dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus); | ||
593 | dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus); | ||
594 | |||
595 | buf[0] = htonl(dma_high); /* confirm addr MSW */ | ||
596 | buf[1] = htonl(dma_low); /* confirm addr LSW */ | ||
597 | buf[2] = htonl(MYRI10GE_NO_CONFIRM_DATA); /* confirm data */ | ||
598 | |||
599 | /* FIX: All newest firmware should un-protect the bottom of | ||
600 | * the sram before handoff. However, the very first interfaces | ||
601 | * do not. Therefore the handoff copy must skip the first 8 bytes | ||
602 | */ | ||
603 | buf[3] = htonl(MYRI10GE_FW_OFFSET + 8); /* where the code starts */ | ||
604 | buf[4] = htonl(size - 8); /* length of code */ | ||
605 | buf[5] = htonl(8); /* where to copy to */ | ||
606 | buf[6] = htonl(0); /* where to jump to */ | ||
607 | |||
608 | submit = mgp->sram + 0xfc0000; | ||
609 | |||
610 | myri10ge_pio_copy(submit, &buf, sizeof(buf)); | ||
611 | mb(); | ||
612 | msleep(1); | ||
613 | mb(); | ||
614 | i = 0; | ||
615 | while (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20) { | ||
616 | msleep(1); | ||
617 | i++; | ||
618 | } | ||
619 | if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA) { | ||
620 | dev_err(&mgp->pdev->dev, "handoff failed\n"); | ||
621 | return -ENXIO; | ||
622 | } | ||
623 | dev_info(&mgp->pdev->dev, "handoff confirmed\n"); | ||
624 | myri10ge_dummy_rdma(mgp, mgp->tx.boundary != 4096); | ||
625 | |||
626 | return 0; | ||
627 | } | ||
628 | |||
629 | static int myri10ge_update_mac_address(struct myri10ge_priv *mgp, u8 * addr) | ||
630 | { | ||
631 | struct myri10ge_cmd cmd; | ||
632 | int status; | ||
633 | |||
634 | cmd.data0 = ((addr[0] << 24) | (addr[1] << 16) | ||
635 | | (addr[2] << 8) | addr[3]); | ||
636 | |||
637 | cmd.data1 = ((addr[4] << 8) | (addr[5])); | ||
638 | |||
639 | status = myri10ge_send_cmd(mgp, MXGEFW_SET_MAC_ADDRESS, &cmd, 0); | ||
640 | return status; | ||
641 | } | ||
642 | |||
643 | static int myri10ge_change_pause(struct myri10ge_priv *mgp, int pause) | ||
644 | { | ||
645 | struct myri10ge_cmd cmd; | ||
646 | int status, ctl; | ||
647 | |||
648 | ctl = pause ? MXGEFW_ENABLE_FLOW_CONTROL : MXGEFW_DISABLE_FLOW_CONTROL; | ||
649 | status = myri10ge_send_cmd(mgp, ctl, &cmd, 0); | ||
650 | |||
651 | if (status) { | ||
652 | printk(KERN_ERR | ||
653 | "myri10ge: %s: Failed to set flow control mode\n", | ||
654 | mgp->dev->name); | ||
655 | return status; | ||
656 | } | ||
657 | mgp->pause = pause; | ||
658 | return 0; | ||
659 | } | ||
660 | |||
661 | static void | ||
662 | myri10ge_change_promisc(struct myri10ge_priv *mgp, int promisc, int atomic) | ||
663 | { | ||
664 | struct myri10ge_cmd cmd; | ||
665 | int status, ctl; | ||
666 | |||
667 | ctl = promisc ? MXGEFW_ENABLE_PROMISC : MXGEFW_DISABLE_PROMISC; | ||
668 | status = myri10ge_send_cmd(mgp, ctl, &cmd, atomic); | ||
669 | if (status) | ||
670 | printk(KERN_ERR "myri10ge: %s: Failed to set promisc mode\n", | ||
671 | mgp->dev->name); | ||
672 | } | ||
673 | |||
674 | static int myri10ge_reset(struct myri10ge_priv *mgp) | ||
675 | { | ||
676 | struct myri10ge_cmd cmd; | ||
677 | int status; | ||
678 | size_t bytes; | ||
679 | u32 len; | ||
680 | |||
681 | /* try to send a reset command to the card to see if it | ||
682 | * is alive */ | ||
683 | memset(&cmd, 0, sizeof(cmd)); | ||
684 | status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0); | ||
685 | if (status != 0) { | ||
686 | dev_err(&mgp->pdev->dev, "failed reset\n"); | ||
687 | return -ENXIO; | ||
688 | } | ||
689 | |||
690 | /* Now exchange information about interrupts */ | ||
691 | |||
692 | bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry); | ||
693 | memset(mgp->rx_done.entry, 0, bytes); | ||
694 | cmd.data0 = (u32) bytes; | ||
695 | status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0); | ||
696 | cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus); | ||
697 | cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus); | ||
698 | status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_DMA, &cmd, 0); | ||
699 | |||
700 | status |= | ||
701 | myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd, 0); | ||
702 | mgp->irq_claim = (__iomem u32 *) (mgp->sram + cmd.data0); | ||
703 | if (!mgp->msi_enabled) { | ||
704 | status |= myri10ge_send_cmd | ||
705 | (mgp, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET, &cmd, 0); | ||
706 | mgp->irq_deassert = (__iomem u32 *) (mgp->sram + cmd.data0); | ||
707 | |||
708 | } | ||
709 | status |= myri10ge_send_cmd | ||
710 | (mgp, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, &cmd, 0); | ||
711 | mgp->intr_coal_delay_ptr = (__iomem u32 *) (mgp->sram + cmd.data0); | ||
712 | if (status != 0) { | ||
713 | dev_err(&mgp->pdev->dev, "failed set interrupt parameters\n"); | ||
714 | return status; | ||
715 | } | ||
716 | __raw_writel(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr); | ||
717 | |||
718 | /* Run a small DMA test. | ||
719 | * The magic multipliers to the length tell the firmware | ||
720 | * to do DMA read, write, or read+write tests. The | ||
721 | * results are returned in cmd.data0. The upper 16 | ||
722 | * bits or the return is the number of transfers completed. | ||
723 | * The lower 16 bits is the time in 0.5us ticks that the | ||
724 | * transfers took to complete. | ||
725 | */ | ||
726 | |||
727 | len = mgp->tx.boundary; | ||
728 | |||
729 | cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus); | ||
730 | cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus); | ||
731 | cmd.data2 = len * 0x10000; | ||
732 | status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0); | ||
733 | if (status == 0) | ||
734 | mgp->read_dma = ((cmd.data0 >> 16) * len * 2) / | ||
735 | (cmd.data0 & 0xffff); | ||
736 | else | ||
737 | dev_warn(&mgp->pdev->dev, "DMA read benchmark failed: %d\n", | ||
738 | status); | ||
739 | cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus); | ||
740 | cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus); | ||
741 | cmd.data2 = len * 0x1; | ||
742 | status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0); | ||
743 | if (status == 0) | ||
744 | mgp->write_dma = ((cmd.data0 >> 16) * len * 2) / | ||
745 | (cmd.data0 & 0xffff); | ||
746 | else | ||
747 | dev_warn(&mgp->pdev->dev, "DMA write benchmark failed: %d\n", | ||
748 | status); | ||
749 | |||
750 | cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus); | ||
751 | cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus); | ||
752 | cmd.data2 = len * 0x10001; | ||
753 | status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0); | ||
754 | if (status == 0) | ||
755 | mgp->read_write_dma = ((cmd.data0 >> 16) * len * 2 * 2) / | ||
756 | (cmd.data0 & 0xffff); | ||
757 | else | ||
758 | dev_warn(&mgp->pdev->dev, | ||
759 | "DMA read/write benchmark failed: %d\n", status); | ||
760 | |||
761 | memset(mgp->rx_done.entry, 0, bytes); | ||
762 | |||
763 | /* reset mcp/driver shared state back to 0 */ | ||
764 | mgp->tx.req = 0; | ||
765 | mgp->tx.done = 0; | ||
766 | mgp->tx.pkt_start = 0; | ||
767 | mgp->tx.pkt_done = 0; | ||
768 | mgp->rx_big.cnt = 0; | ||
769 | mgp->rx_small.cnt = 0; | ||
770 | mgp->rx_done.idx = 0; | ||
771 | mgp->rx_done.cnt = 0; | ||
772 | status = myri10ge_update_mac_address(mgp, mgp->dev->dev_addr); | ||
773 | myri10ge_change_promisc(mgp, 0, 0); | ||
774 | myri10ge_change_pause(mgp, mgp->pause); | ||
775 | return status; | ||
776 | } | ||
777 | |||
778 | static inline void | ||
779 | myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem * dst, | ||
780 | struct mcp_kreq_ether_recv *src) | ||
781 | { | ||
782 | u32 low; | ||
783 | |||
784 | low = src->addr_low; | ||
785 | src->addr_low = DMA_32BIT_MASK; | ||
786 | myri10ge_pio_copy(dst, src, 8 * sizeof(*src)); | ||
787 | mb(); | ||
788 | src->addr_low = low; | ||
789 | __raw_writel(low, &dst->addr_low); | ||
790 | mb(); | ||
791 | } | ||
792 | |||
793 | /* | ||
794 | * Set of routines to get a new receive buffer. Any buffer which | ||
795 | * crosses a 4KB boundary must start on a 4KB boundary due to PCIe | ||
796 | * wdma restrictions. We also try to align any smaller allocation to | ||
797 | * at least a 16 byte boundary for efficiency. We assume the linux | ||
798 | * memory allocator works by powers of 2, and will not return memory | ||
799 | * smaller than 2KB which crosses a 4KB boundary. If it does, we fall | ||
800 | * back to allocating 2x as much space as required. | ||
801 | * | ||
802 | * We intend to replace large (>4KB) skb allocations by using | ||
803 | * pages directly and building a fraglist in the near future. | ||
804 | */ | ||
805 | |||
806 | static inline struct sk_buff *myri10ge_alloc_big(int bytes) | ||
807 | { | ||
808 | struct sk_buff *skb; | ||
809 | unsigned long data, roundup; | ||
810 | |||
811 | skb = dev_alloc_skb(bytes + 4096 + MXGEFW_PAD); | ||
812 | if (skb == NULL) | ||
813 | return NULL; | ||
814 | |||
815 | /* Correct skb->truesize so that socket buffer | ||
816 | * accounting is not confused the rounding we must | ||
817 | * do to satisfy alignment constraints. | ||
818 | */ | ||
819 | skb->truesize -= 4096; | ||
820 | |||
821 | data = (unsigned long)(skb->data); | ||
822 | roundup = (-data) & (4095); | ||
823 | skb_reserve(skb, roundup); | ||
824 | return skb; | ||
825 | } | ||
826 | |||
827 | /* Allocate 2x as much space as required and use whichever portion | ||
828 | * does not cross a 4KB boundary */ | ||
829 | static inline struct sk_buff *myri10ge_alloc_small_safe(unsigned int bytes) | ||
830 | { | ||
831 | struct sk_buff *skb; | ||
832 | unsigned long data, boundary; | ||
833 | |||
834 | skb = dev_alloc_skb(2 * (bytes + MXGEFW_PAD) - 1); | ||
835 | if (unlikely(skb == NULL)) | ||
836 | return NULL; | ||
837 | |||
838 | /* Correct skb->truesize so that socket buffer | ||
839 | * accounting is not confused the rounding we must | ||
840 | * do to satisfy alignment constraints. | ||
841 | */ | ||
842 | skb->truesize -= bytes + MXGEFW_PAD; | ||
843 | |||
844 | data = (unsigned long)(skb->data); | ||
845 | boundary = (data + 4095UL) & ~4095UL; | ||
846 | if ((boundary - data) >= (bytes + MXGEFW_PAD)) | ||
847 | return skb; | ||
848 | |||
849 | skb_reserve(skb, boundary - data); | ||
850 | return skb; | ||
851 | } | ||
852 | |||
853 | /* Allocate just enough space, and verify that the allocated | ||
854 | * space does not cross a 4KB boundary */ | ||
855 | static inline struct sk_buff *myri10ge_alloc_small(int bytes) | ||
856 | { | ||
857 | struct sk_buff *skb; | ||
858 | unsigned long roundup, data, end; | ||
859 | |||
860 | skb = dev_alloc_skb(bytes + 16 + MXGEFW_PAD); | ||
861 | if (unlikely(skb == NULL)) | ||
862 | return NULL; | ||
863 | |||
864 | /* Round allocated buffer to 16 byte boundary */ | ||
865 | data = (unsigned long)(skb->data); | ||
866 | roundup = (-data) & 15UL; | ||
867 | skb_reserve(skb, roundup); | ||
868 | /* Verify that the data buffer does not cross a page boundary */ | ||
869 | data = (unsigned long)(skb->data); | ||
870 | end = data + bytes + MXGEFW_PAD - 1; | ||
871 | if (unlikely(((end >> 12) != (data >> 12)) && (data & 4095UL))) { | ||
872 | printk(KERN_NOTICE | ||
873 | "myri10ge_alloc_small: small skb crossed 4KB boundary\n"); | ||
874 | myri10ge_skb_cross_4k = 1; | ||
875 | dev_kfree_skb_any(skb); | ||
876 | skb = myri10ge_alloc_small_safe(bytes); | ||
877 | } | ||
878 | return skb; | ||
879 | } | ||
880 | |||
881 | static inline int | ||
882 | myri10ge_getbuf(struct myri10ge_rx_buf *rx, struct pci_dev *pdev, int bytes, | ||
883 | int idx) | ||
884 | { | ||
885 | struct sk_buff *skb; | ||
886 | dma_addr_t bus; | ||
887 | int len, retval = 0; | ||
888 | |||
889 | bytes += VLAN_HLEN; /* account for 802.1q vlan tag */ | ||
890 | |||
891 | if ((bytes + MXGEFW_PAD) > (4096 - 16) /* linux overhead */ ) | ||
892 | skb = myri10ge_alloc_big(bytes); | ||
893 | else if (myri10ge_skb_cross_4k) | ||
894 | skb = myri10ge_alloc_small_safe(bytes); | ||
895 | else | ||
896 | skb = myri10ge_alloc_small(bytes); | ||
897 | |||
898 | if (unlikely(skb == NULL)) { | ||
899 | rx->alloc_fail++; | ||
900 | retval = -ENOBUFS; | ||
901 | goto done; | ||
902 | } | ||
903 | |||
904 | /* set len so that it only covers the area we | ||
905 | * need mapped for DMA */ | ||
906 | len = bytes + MXGEFW_PAD; | ||
907 | |||
908 | bus = pci_map_single(pdev, skb->data, len, PCI_DMA_FROMDEVICE); | ||
909 | rx->info[idx].skb = skb; | ||
910 | pci_unmap_addr_set(&rx->info[idx], bus, bus); | ||
911 | pci_unmap_len_set(&rx->info[idx], len, len); | ||
912 | rx->shadow[idx].addr_low = htonl(MYRI10GE_LOWPART_TO_U32(bus)); | ||
913 | rx->shadow[idx].addr_high = htonl(MYRI10GE_HIGHPART_TO_U32(bus)); | ||
914 | |||
915 | done: | ||
916 | /* copy 8 descriptors (64-bytes) to the mcp at a time */ | ||
917 | if ((idx & 7) == 7) { | ||
918 | if (rx->wc_fifo == NULL) | ||
919 | myri10ge_submit_8rx(&rx->lanai[idx - 7], | ||
920 | &rx->shadow[idx - 7]); | ||
921 | else { | ||
922 | mb(); | ||
923 | myri10ge_pio_copy(rx->wc_fifo, | ||
924 | &rx->shadow[idx - 7], 64); | ||
925 | } | ||
926 | } | ||
927 | return retval; | ||
928 | } | ||
929 | |||
930 | static inline void myri10ge_vlan_ip_csum(struct sk_buff *skb, u16 hw_csum) | ||
931 | { | ||
932 | struct vlan_hdr *vh = (struct vlan_hdr *)(skb->data); | ||
933 | |||
934 | if ((skb->protocol == ntohs(ETH_P_8021Q)) && | ||
935 | (vh->h_vlan_encapsulated_proto == htons(ETH_P_IP) || | ||
936 | vh->h_vlan_encapsulated_proto == htons(ETH_P_IPV6))) { | ||
937 | skb->csum = hw_csum; | ||
938 | skb->ip_summed = CHECKSUM_HW; | ||
939 | } | ||
940 | } | ||
941 | |||
942 | static inline unsigned long | ||
943 | myri10ge_rx_done(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx, | ||
944 | int bytes, int len, int csum) | ||
945 | { | ||
946 | dma_addr_t bus; | ||
947 | struct sk_buff *skb; | ||
948 | int idx, unmap_len; | ||
949 | |||
950 | idx = rx->cnt & rx->mask; | ||
951 | rx->cnt++; | ||
952 | |||
953 | /* save a pointer to the received skb */ | ||
954 | skb = rx->info[idx].skb; | ||
955 | bus = pci_unmap_addr(&rx->info[idx], bus); | ||
956 | unmap_len = pci_unmap_len(&rx->info[idx], len); | ||
957 | |||
958 | /* try to replace the received skb */ | ||
959 | if (myri10ge_getbuf(rx, mgp->pdev, bytes, idx)) { | ||
960 | /* drop the frame -- the old skbuf is re-cycled */ | ||
961 | mgp->stats.rx_dropped += 1; | ||
962 | return 0; | ||
963 | } | ||
964 | |||
965 | /* unmap the recvd skb */ | ||
966 | pci_unmap_single(mgp->pdev, bus, unmap_len, PCI_DMA_FROMDEVICE); | ||
967 | |||
968 | /* mcp implicitly skips 1st bytes so that packet is properly | ||
969 | * aligned */ | ||
970 | skb_reserve(skb, MXGEFW_PAD); | ||
971 | |||
972 | /* set the length of the frame */ | ||
973 | skb_put(skb, len); | ||
974 | |||
975 | skb->protocol = eth_type_trans(skb, mgp->dev); | ||
976 | skb->dev = mgp->dev; | ||
977 | if (mgp->csum_flag) { | ||
978 | if ((skb->protocol == ntohs(ETH_P_IP)) || | ||
979 | (skb->protocol == ntohs(ETH_P_IPV6))) { | ||
980 | skb->csum = ntohs((u16) csum); | ||
981 | skb->ip_summed = CHECKSUM_HW; | ||
982 | } else | ||
983 | myri10ge_vlan_ip_csum(skb, ntohs((u16) csum)); | ||
984 | } | ||
985 | |||
986 | netif_receive_skb(skb); | ||
987 | mgp->dev->last_rx = jiffies; | ||
988 | return 1; | ||
989 | } | ||
990 | |||
991 | static inline void myri10ge_tx_done(struct myri10ge_priv *mgp, int mcp_index) | ||
992 | { | ||
993 | struct pci_dev *pdev = mgp->pdev; | ||
994 | struct myri10ge_tx_buf *tx = &mgp->tx; | ||
995 | struct sk_buff *skb; | ||
996 | int idx, len; | ||
997 | int limit = 0; | ||
998 | |||
999 | while (tx->pkt_done != mcp_index) { | ||
1000 | idx = tx->done & tx->mask; | ||
1001 | skb = tx->info[idx].skb; | ||
1002 | |||
1003 | /* Mark as free */ | ||
1004 | tx->info[idx].skb = NULL; | ||
1005 | if (tx->info[idx].last) { | ||
1006 | tx->pkt_done++; | ||
1007 | tx->info[idx].last = 0; | ||
1008 | } | ||
1009 | tx->done++; | ||
1010 | len = pci_unmap_len(&tx->info[idx], len); | ||
1011 | pci_unmap_len_set(&tx->info[idx], len, 0); | ||
1012 | if (skb) { | ||
1013 | mgp->stats.tx_bytes += skb->len; | ||
1014 | mgp->stats.tx_packets++; | ||
1015 | dev_kfree_skb_irq(skb); | ||
1016 | if (len) | ||
1017 | pci_unmap_single(pdev, | ||
1018 | pci_unmap_addr(&tx->info[idx], | ||
1019 | bus), len, | ||
1020 | PCI_DMA_TODEVICE); | ||
1021 | } else { | ||
1022 | if (len) | ||
1023 | pci_unmap_page(pdev, | ||
1024 | pci_unmap_addr(&tx->info[idx], | ||
1025 | bus), len, | ||
1026 | PCI_DMA_TODEVICE); | ||
1027 | } | ||
1028 | |||
1029 | /* limit potential for livelock by only handling | ||
1030 | * 2 full tx rings per call */ | ||
1031 | if (unlikely(++limit > 2 * tx->mask)) | ||
1032 | break; | ||
1033 | } | ||
1034 | /* start the queue if we've stopped it */ | ||
1035 | if (netif_queue_stopped(mgp->dev) | ||
1036 | && tx->req - tx->done < (tx->mask >> 1)) { | ||
1037 | mgp->wake_queue++; | ||
1038 | netif_wake_queue(mgp->dev); | ||
1039 | } | ||
1040 | } | ||
1041 | |||
1042 | static inline void myri10ge_clean_rx_done(struct myri10ge_priv *mgp, int *limit) | ||
1043 | { | ||
1044 | struct myri10ge_rx_done *rx_done = &mgp->rx_done; | ||
1045 | unsigned long rx_bytes = 0; | ||
1046 | unsigned long rx_packets = 0; | ||
1047 | unsigned long rx_ok; | ||
1048 | |||
1049 | int idx = rx_done->idx; | ||
1050 | int cnt = rx_done->cnt; | ||
1051 | u16 length; | ||
1052 | u16 checksum; | ||
1053 | |||
1054 | while (rx_done->entry[idx].length != 0 && *limit != 0) { | ||
1055 | length = ntohs(rx_done->entry[idx].length); | ||
1056 | rx_done->entry[idx].length = 0; | ||
1057 | checksum = ntohs(rx_done->entry[idx].checksum); | ||
1058 | if (length <= mgp->small_bytes) | ||
1059 | rx_ok = myri10ge_rx_done(mgp, &mgp->rx_small, | ||
1060 | mgp->small_bytes, | ||
1061 | length, checksum); | ||
1062 | else | ||
1063 | rx_ok = myri10ge_rx_done(mgp, &mgp->rx_big, | ||
1064 | mgp->dev->mtu + ETH_HLEN, | ||
1065 | length, checksum); | ||
1066 | rx_packets += rx_ok; | ||
1067 | rx_bytes += rx_ok * (unsigned long)length; | ||
1068 | cnt++; | ||
1069 | idx = cnt & (myri10ge_max_intr_slots - 1); | ||
1070 | |||
1071 | /* limit potential for livelock by only handling a | ||
1072 | * limited number of frames. */ | ||
1073 | (*limit)--; | ||
1074 | } | ||
1075 | rx_done->idx = idx; | ||
1076 | rx_done->cnt = cnt; | ||
1077 | mgp->stats.rx_packets += rx_packets; | ||
1078 | mgp->stats.rx_bytes += rx_bytes; | ||
1079 | } | ||
1080 | |||
1081 | static inline void myri10ge_check_statblock(struct myri10ge_priv *mgp) | ||
1082 | { | ||
1083 | struct mcp_irq_data *stats = mgp->fw_stats; | ||
1084 | |||
1085 | if (unlikely(stats->stats_updated)) { | ||
1086 | if (mgp->link_state != stats->link_up) { | ||
1087 | mgp->link_state = stats->link_up; | ||
1088 | if (mgp->link_state) { | ||
1089 | printk(KERN_INFO "myri10ge: %s: link up\n", | ||
1090 | mgp->dev->name); | ||
1091 | netif_carrier_on(mgp->dev); | ||
1092 | } else { | ||
1093 | printk(KERN_INFO "myri10ge: %s: link down\n", | ||
1094 | mgp->dev->name); | ||
1095 | netif_carrier_off(mgp->dev); | ||
1096 | } | ||
1097 | } | ||
1098 | if (mgp->rdma_tags_available != | ||
1099 | ntohl(mgp->fw_stats->rdma_tags_available)) { | ||
1100 | mgp->rdma_tags_available = | ||
1101 | ntohl(mgp->fw_stats->rdma_tags_available); | ||
1102 | printk(KERN_WARNING "myri10ge: %s: RDMA timed out! " | ||
1103 | "%d tags left\n", mgp->dev->name, | ||
1104 | mgp->rdma_tags_available); | ||
1105 | } | ||
1106 | mgp->down_cnt += stats->link_down; | ||
1107 | if (stats->link_down) | ||
1108 | wake_up(&mgp->down_wq); | ||
1109 | } | ||
1110 | } | ||
1111 | |||
1112 | static int myri10ge_poll(struct net_device *netdev, int *budget) | ||
1113 | { | ||
1114 | struct myri10ge_priv *mgp = netdev_priv(netdev); | ||
1115 | struct myri10ge_rx_done *rx_done = &mgp->rx_done; | ||
1116 | int limit, orig_limit, work_done; | ||
1117 | |||
1118 | /* process as many rx events as NAPI will allow */ | ||
1119 | limit = min(*budget, netdev->quota); | ||
1120 | orig_limit = limit; | ||
1121 | myri10ge_clean_rx_done(mgp, &limit); | ||
1122 | work_done = orig_limit - limit; | ||
1123 | *budget -= work_done; | ||
1124 | netdev->quota -= work_done; | ||
1125 | |||
1126 | if (rx_done->entry[rx_done->idx].length == 0 || !netif_running(netdev)) { | ||
1127 | netif_rx_complete(netdev); | ||
1128 | __raw_writel(htonl(3), mgp->irq_claim); | ||
1129 | return 0; | ||
1130 | } | ||
1131 | return 1; | ||
1132 | } | ||
1133 | |||
1134 | static irqreturn_t myri10ge_intr(int irq, void *arg, struct pt_regs *regs) | ||
1135 | { | ||
1136 | struct myri10ge_priv *mgp = arg; | ||
1137 | struct mcp_irq_data *stats = mgp->fw_stats; | ||
1138 | struct myri10ge_tx_buf *tx = &mgp->tx; | ||
1139 | u32 send_done_count; | ||
1140 | int i; | ||
1141 | |||
1142 | /* make sure it is our IRQ, and that the DMA has finished */ | ||
1143 | if (unlikely(!stats->valid)) | ||
1144 | return (IRQ_NONE); | ||
1145 | |||
1146 | /* low bit indicates receives are present, so schedule | ||
1147 | * napi poll handler */ | ||
1148 | if (stats->valid & 1) | ||
1149 | netif_rx_schedule(mgp->dev); | ||
1150 | |||
1151 | if (!mgp->msi_enabled) { | ||
1152 | __raw_writel(0, mgp->irq_deassert); | ||
1153 | if (!myri10ge_deassert_wait) | ||
1154 | stats->valid = 0; | ||
1155 | mb(); | ||
1156 | } else | ||
1157 | stats->valid = 0; | ||
1158 | |||
1159 | /* Wait for IRQ line to go low, if using INTx */ | ||
1160 | i = 0; | ||
1161 | while (1) { | ||
1162 | i++; | ||
1163 | /* check for transmit completes and receives */ | ||
1164 | send_done_count = ntohl(stats->send_done_count); | ||
1165 | if (send_done_count != tx->pkt_done) | ||
1166 | myri10ge_tx_done(mgp, (int)send_done_count); | ||
1167 | if (unlikely(i > myri10ge_max_irq_loops)) { | ||
1168 | printk(KERN_WARNING "myri10ge: %s: irq stuck?\n", | ||
1169 | mgp->dev->name); | ||
1170 | stats->valid = 0; | ||
1171 | schedule_work(&mgp->watchdog_work); | ||
1172 | } | ||
1173 | if (likely(stats->valid == 0)) | ||
1174 | break; | ||
1175 | cpu_relax(); | ||
1176 | barrier(); | ||
1177 | } | ||
1178 | |||
1179 | myri10ge_check_statblock(mgp); | ||
1180 | |||
1181 | __raw_writel(htonl(3), mgp->irq_claim + 1); | ||
1182 | return (IRQ_HANDLED); | ||
1183 | } | ||
1184 | |||
1185 | static int | ||
1186 | myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd) | ||
1187 | { | ||
1188 | cmd->autoneg = AUTONEG_DISABLE; | ||
1189 | cmd->speed = SPEED_10000; | ||
1190 | cmd->duplex = DUPLEX_FULL; | ||
1191 | return 0; | ||
1192 | } | ||
1193 | |||
1194 | static void | ||
1195 | myri10ge_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info) | ||
1196 | { | ||
1197 | struct myri10ge_priv *mgp = netdev_priv(netdev); | ||
1198 | |||
1199 | strlcpy(info->driver, "myri10ge", sizeof(info->driver)); | ||
1200 | strlcpy(info->version, MYRI10GE_VERSION_STR, sizeof(info->version)); | ||
1201 | strlcpy(info->fw_version, mgp->fw_version, sizeof(info->fw_version)); | ||
1202 | strlcpy(info->bus_info, pci_name(mgp->pdev), sizeof(info->bus_info)); | ||
1203 | } | ||
1204 | |||
1205 | static int | ||
1206 | myri10ge_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal) | ||
1207 | { | ||
1208 | struct myri10ge_priv *mgp = netdev_priv(netdev); | ||
1209 | coal->rx_coalesce_usecs = mgp->intr_coal_delay; | ||
1210 | return 0; | ||
1211 | } | ||
1212 | |||
1213 | static int | ||
1214 | myri10ge_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal) | ||
1215 | { | ||
1216 | struct myri10ge_priv *mgp = netdev_priv(netdev); | ||
1217 | |||
1218 | mgp->intr_coal_delay = coal->rx_coalesce_usecs; | ||
1219 | __raw_writel(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr); | ||
1220 | return 0; | ||
1221 | } | ||
1222 | |||
1223 | static void | ||
1224 | myri10ge_get_pauseparam(struct net_device *netdev, | ||
1225 | struct ethtool_pauseparam *pause) | ||
1226 | { | ||
1227 | struct myri10ge_priv *mgp = netdev_priv(netdev); | ||
1228 | |||
1229 | pause->autoneg = 0; | ||
1230 | pause->rx_pause = mgp->pause; | ||
1231 | pause->tx_pause = mgp->pause; | ||
1232 | } | ||
1233 | |||
1234 | static int | ||
1235 | myri10ge_set_pauseparam(struct net_device *netdev, | ||
1236 | struct ethtool_pauseparam *pause) | ||
1237 | { | ||
1238 | struct myri10ge_priv *mgp = netdev_priv(netdev); | ||
1239 | |||
1240 | if (pause->tx_pause != mgp->pause) | ||
1241 | return myri10ge_change_pause(mgp, pause->tx_pause); | ||
1242 | if (pause->rx_pause != mgp->pause) | ||
1243 | return myri10ge_change_pause(mgp, pause->tx_pause); | ||
1244 | if (pause->autoneg != 0) | ||
1245 | return -EINVAL; | ||
1246 | return 0; | ||
1247 | } | ||
1248 | |||
1249 | static void | ||
1250 | myri10ge_get_ringparam(struct net_device *netdev, | ||
1251 | struct ethtool_ringparam *ring) | ||
1252 | { | ||
1253 | struct myri10ge_priv *mgp = netdev_priv(netdev); | ||
1254 | |||
1255 | ring->rx_mini_max_pending = mgp->rx_small.mask + 1; | ||
1256 | ring->rx_max_pending = mgp->rx_big.mask + 1; | ||
1257 | ring->rx_jumbo_max_pending = 0; | ||
1258 | ring->tx_max_pending = mgp->rx_small.mask + 1; | ||
1259 | ring->rx_mini_pending = ring->rx_mini_max_pending; | ||
1260 | ring->rx_pending = ring->rx_max_pending; | ||
1261 | ring->rx_jumbo_pending = ring->rx_jumbo_max_pending; | ||
1262 | ring->tx_pending = ring->tx_max_pending; | ||
1263 | } | ||
1264 | |||
1265 | static u32 myri10ge_get_rx_csum(struct net_device *netdev) | ||
1266 | { | ||
1267 | struct myri10ge_priv *mgp = netdev_priv(netdev); | ||
1268 | if (mgp->csum_flag) | ||
1269 | return 1; | ||
1270 | else | ||
1271 | return 0; | ||
1272 | } | ||
1273 | |||
1274 | static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled) | ||
1275 | { | ||
1276 | struct myri10ge_priv *mgp = netdev_priv(netdev); | ||
1277 | if (csum_enabled) | ||
1278 | mgp->csum_flag = MXGEFW_FLAGS_CKSUM; | ||
1279 | else | ||
1280 | mgp->csum_flag = 0; | ||
1281 | return 0; | ||
1282 | } | ||
1283 | |||
1284 | static const char myri10ge_gstrings_stats[][ETH_GSTRING_LEN] = { | ||
1285 | "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors", | ||
1286 | "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions", | ||
1287 | "rx_length_errors", "rx_over_errors", "rx_crc_errors", | ||
1288 | "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors", | ||
1289 | "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors", | ||
1290 | "tx_heartbeat_errors", "tx_window_errors", | ||
1291 | /* device-specific stats */ | ||
1292 | "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs", | ||
1293 | "serial_number", "tx_pkt_start", "tx_pkt_done", | ||
1294 | "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt", | ||
1295 | "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized", | ||
1296 | "link_up", "dropped_link_overflow", "dropped_link_error_or_filtered", | ||
1297 | "dropped_runt", "dropped_overrun", "dropped_no_small_buffer", | ||
1298 | "dropped_no_big_buffer" | ||
1299 | }; | ||
1300 | |||
1301 | #define MYRI10GE_NET_STATS_LEN 21 | ||
1302 | #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN | ||
1303 | |||
1304 | static void | ||
1305 | myri10ge_get_strings(struct net_device *netdev, u32 stringset, u8 * data) | ||
1306 | { | ||
1307 | switch (stringset) { | ||
1308 | case ETH_SS_STATS: | ||
1309 | memcpy(data, *myri10ge_gstrings_stats, | ||
1310 | sizeof(myri10ge_gstrings_stats)); | ||
1311 | break; | ||
1312 | } | ||
1313 | } | ||
1314 | |||
1315 | static int myri10ge_get_stats_count(struct net_device *netdev) | ||
1316 | { | ||
1317 | return MYRI10GE_STATS_LEN; | ||
1318 | } | ||
1319 | |||
1320 | static void | ||
1321 | myri10ge_get_ethtool_stats(struct net_device *netdev, | ||
1322 | struct ethtool_stats *stats, u64 * data) | ||
1323 | { | ||
1324 | struct myri10ge_priv *mgp = netdev_priv(netdev); | ||
1325 | int i; | ||
1326 | |||
1327 | for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++) | ||
1328 | data[i] = ((unsigned long *)&mgp->stats)[i]; | ||
1329 | |||
1330 | data[i++] = (unsigned int)mgp->read_dma; | ||
1331 | data[i++] = (unsigned int)mgp->write_dma; | ||
1332 | data[i++] = (unsigned int)mgp->read_write_dma; | ||
1333 | data[i++] = (unsigned int)mgp->serial_number; | ||
1334 | data[i++] = (unsigned int)mgp->tx.pkt_start; | ||
1335 | data[i++] = (unsigned int)mgp->tx.pkt_done; | ||
1336 | data[i++] = (unsigned int)mgp->tx.req; | ||
1337 | data[i++] = (unsigned int)mgp->tx.done; | ||
1338 | data[i++] = (unsigned int)mgp->rx_small.cnt; | ||
1339 | data[i++] = (unsigned int)mgp->rx_big.cnt; | ||
1340 | data[i++] = (unsigned int)mgp->wake_queue; | ||
1341 | data[i++] = (unsigned int)mgp->stop_queue; | ||
1342 | data[i++] = (unsigned int)mgp->watchdog_resets; | ||
1343 | data[i++] = (unsigned int)mgp->tx_linearized; | ||
1344 | data[i++] = (unsigned int)ntohl(mgp->fw_stats->link_up); | ||
1345 | data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_link_overflow); | ||
1346 | data[i++] = | ||
1347 | (unsigned int)ntohl(mgp->fw_stats->dropped_link_error_or_filtered); | ||
1348 | data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_runt); | ||
1349 | data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_overrun); | ||
1350 | data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_no_small_buffer); | ||
1351 | data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_no_big_buffer); | ||
1352 | } | ||
1353 | |||
1354 | static struct ethtool_ops myri10ge_ethtool_ops = { | ||
1355 | .get_settings = myri10ge_get_settings, | ||
1356 | .get_drvinfo = myri10ge_get_drvinfo, | ||
1357 | .get_coalesce = myri10ge_get_coalesce, | ||
1358 | .set_coalesce = myri10ge_set_coalesce, | ||
1359 | .get_pauseparam = myri10ge_get_pauseparam, | ||
1360 | .set_pauseparam = myri10ge_set_pauseparam, | ||
1361 | .get_ringparam = myri10ge_get_ringparam, | ||
1362 | .get_rx_csum = myri10ge_get_rx_csum, | ||
1363 | .set_rx_csum = myri10ge_set_rx_csum, | ||
1364 | .get_tx_csum = ethtool_op_get_tx_csum, | ||
1365 | .set_tx_csum = ethtool_op_set_tx_hw_csum, | ||
1366 | .get_sg = ethtool_op_get_sg, | ||
1367 | .set_sg = ethtool_op_set_sg, | ||
1368 | #ifdef NETIF_F_TSO | ||
1369 | .get_tso = ethtool_op_get_tso, | ||
1370 | .set_tso = ethtool_op_set_tso, | ||
1371 | #endif | ||
1372 | .get_strings = myri10ge_get_strings, | ||
1373 | .get_stats_count = myri10ge_get_stats_count, | ||
1374 | .get_ethtool_stats = myri10ge_get_ethtool_stats | ||
1375 | }; | ||
1376 | |||
1377 | static int myri10ge_allocate_rings(struct net_device *dev) | ||
1378 | { | ||
1379 | struct myri10ge_priv *mgp; | ||
1380 | struct myri10ge_cmd cmd; | ||
1381 | int tx_ring_size, rx_ring_size; | ||
1382 | int tx_ring_entries, rx_ring_entries; | ||
1383 | int i, status; | ||
1384 | size_t bytes; | ||
1385 | |||
1386 | mgp = netdev_priv(dev); | ||
1387 | |||
1388 | /* get ring sizes */ | ||
1389 | |||
1390 | status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0); | ||
1391 | tx_ring_size = cmd.data0; | ||
1392 | status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0); | ||
1393 | rx_ring_size = cmd.data0; | ||
1394 | |||
1395 | tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send); | ||
1396 | rx_ring_entries = rx_ring_size / sizeof(struct mcp_dma_addr); | ||
1397 | mgp->tx.mask = tx_ring_entries - 1; | ||
1398 | mgp->rx_small.mask = mgp->rx_big.mask = rx_ring_entries - 1; | ||
1399 | |||
1400 | /* allocate the host shadow rings */ | ||
1401 | |||
1402 | bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4) | ||
1403 | * sizeof(*mgp->tx.req_list); | ||
1404 | mgp->tx.req_bytes = kzalloc(bytes, GFP_KERNEL); | ||
1405 | if (mgp->tx.req_bytes == NULL) | ||
1406 | goto abort_with_nothing; | ||
1407 | |||
1408 | /* ensure req_list entries are aligned to 8 bytes */ | ||
1409 | mgp->tx.req_list = (struct mcp_kreq_ether_send *) | ||
1410 | ALIGN((unsigned long)mgp->tx.req_bytes, 8); | ||
1411 | |||
1412 | bytes = rx_ring_entries * sizeof(*mgp->rx_small.shadow); | ||
1413 | mgp->rx_small.shadow = kzalloc(bytes, GFP_KERNEL); | ||
1414 | if (mgp->rx_small.shadow == NULL) | ||
1415 | goto abort_with_tx_req_bytes; | ||
1416 | |||
1417 | bytes = rx_ring_entries * sizeof(*mgp->rx_big.shadow); | ||
1418 | mgp->rx_big.shadow = kzalloc(bytes, GFP_KERNEL); | ||
1419 | if (mgp->rx_big.shadow == NULL) | ||
1420 | goto abort_with_rx_small_shadow; | ||
1421 | |||
1422 | /* allocate the host info rings */ | ||
1423 | |||
1424 | bytes = tx_ring_entries * sizeof(*mgp->tx.info); | ||
1425 | mgp->tx.info = kzalloc(bytes, GFP_KERNEL); | ||
1426 | if (mgp->tx.info == NULL) | ||
1427 | goto abort_with_rx_big_shadow; | ||
1428 | |||
1429 | bytes = rx_ring_entries * sizeof(*mgp->rx_small.info); | ||
1430 | mgp->rx_small.info = kzalloc(bytes, GFP_KERNEL); | ||
1431 | if (mgp->rx_small.info == NULL) | ||
1432 | goto abort_with_tx_info; | ||
1433 | |||
1434 | bytes = rx_ring_entries * sizeof(*mgp->rx_big.info); | ||
1435 | mgp->rx_big.info = kzalloc(bytes, GFP_KERNEL); | ||
1436 | if (mgp->rx_big.info == NULL) | ||
1437 | goto abort_with_rx_small_info; | ||
1438 | |||
1439 | /* Fill the receive rings */ | ||
1440 | |||
1441 | for (i = 0; i <= mgp->rx_small.mask; i++) { | ||
1442 | status = myri10ge_getbuf(&mgp->rx_small, mgp->pdev, | ||
1443 | mgp->small_bytes, i); | ||
1444 | if (status) { | ||
1445 | printk(KERN_ERR | ||
1446 | "myri10ge: %s: alloced only %d small bufs\n", | ||
1447 | dev->name, i); | ||
1448 | goto abort_with_rx_small_ring; | ||
1449 | } | ||
1450 | } | ||
1451 | |||
1452 | for (i = 0; i <= mgp->rx_big.mask; i++) { | ||
1453 | status = | ||
1454 | myri10ge_getbuf(&mgp->rx_big, mgp->pdev, | ||
1455 | dev->mtu + ETH_HLEN, i); | ||
1456 | if (status) { | ||
1457 | printk(KERN_ERR | ||
1458 | "myri10ge: %s: alloced only %d big bufs\n", | ||
1459 | dev->name, i); | ||
1460 | goto abort_with_rx_big_ring; | ||
1461 | } | ||
1462 | } | ||
1463 | |||
1464 | return 0; | ||
1465 | |||
1466 | abort_with_rx_big_ring: | ||
1467 | for (i = 0; i <= mgp->rx_big.mask; i++) { | ||
1468 | if (mgp->rx_big.info[i].skb != NULL) | ||
1469 | dev_kfree_skb_any(mgp->rx_big.info[i].skb); | ||
1470 | if (pci_unmap_len(&mgp->rx_big.info[i], len)) | ||
1471 | pci_unmap_single(mgp->pdev, | ||
1472 | pci_unmap_addr(&mgp->rx_big.info[i], | ||
1473 | bus), | ||
1474 | pci_unmap_len(&mgp->rx_big.info[i], | ||
1475 | len), | ||
1476 | PCI_DMA_FROMDEVICE); | ||
1477 | } | ||
1478 | |||
1479 | abort_with_rx_small_ring: | ||
1480 | for (i = 0; i <= mgp->rx_small.mask; i++) { | ||
1481 | if (mgp->rx_small.info[i].skb != NULL) | ||
1482 | dev_kfree_skb_any(mgp->rx_small.info[i].skb); | ||
1483 | if (pci_unmap_len(&mgp->rx_small.info[i], len)) | ||
1484 | pci_unmap_single(mgp->pdev, | ||
1485 | pci_unmap_addr(&mgp->rx_small.info[i], | ||
1486 | bus), | ||
1487 | pci_unmap_len(&mgp->rx_small.info[i], | ||
1488 | len), | ||
1489 | PCI_DMA_FROMDEVICE); | ||
1490 | } | ||
1491 | kfree(mgp->rx_big.info); | ||
1492 | |||
1493 | abort_with_rx_small_info: | ||
1494 | kfree(mgp->rx_small.info); | ||
1495 | |||
1496 | abort_with_tx_info: | ||
1497 | kfree(mgp->tx.info); | ||
1498 | |||
1499 | abort_with_rx_big_shadow: | ||
1500 | kfree(mgp->rx_big.shadow); | ||
1501 | |||
1502 | abort_with_rx_small_shadow: | ||
1503 | kfree(mgp->rx_small.shadow); | ||
1504 | |||
1505 | abort_with_tx_req_bytes: | ||
1506 | kfree(mgp->tx.req_bytes); | ||
1507 | mgp->tx.req_bytes = NULL; | ||
1508 | mgp->tx.req_list = NULL; | ||
1509 | |||
1510 | abort_with_nothing: | ||
1511 | return status; | ||
1512 | } | ||
1513 | |||
1514 | static void myri10ge_free_rings(struct net_device *dev) | ||
1515 | { | ||
1516 | struct myri10ge_priv *mgp; | ||
1517 | struct sk_buff *skb; | ||
1518 | struct myri10ge_tx_buf *tx; | ||
1519 | int i, len, idx; | ||
1520 | |||
1521 | mgp = netdev_priv(dev); | ||
1522 | |||
1523 | for (i = 0; i <= mgp->rx_big.mask; i++) { | ||
1524 | if (mgp->rx_big.info[i].skb != NULL) | ||
1525 | dev_kfree_skb_any(mgp->rx_big.info[i].skb); | ||
1526 | if (pci_unmap_len(&mgp->rx_big.info[i], len)) | ||
1527 | pci_unmap_single(mgp->pdev, | ||
1528 | pci_unmap_addr(&mgp->rx_big.info[i], | ||
1529 | bus), | ||
1530 | pci_unmap_len(&mgp->rx_big.info[i], | ||
1531 | len), | ||
1532 | PCI_DMA_FROMDEVICE); | ||
1533 | } | ||
1534 | |||
1535 | for (i = 0; i <= mgp->rx_small.mask; i++) { | ||
1536 | if (mgp->rx_small.info[i].skb != NULL) | ||
1537 | dev_kfree_skb_any(mgp->rx_small.info[i].skb); | ||
1538 | if (pci_unmap_len(&mgp->rx_small.info[i], len)) | ||
1539 | pci_unmap_single(mgp->pdev, | ||
1540 | pci_unmap_addr(&mgp->rx_small.info[i], | ||
1541 | bus), | ||
1542 | pci_unmap_len(&mgp->rx_small.info[i], | ||
1543 | len), | ||
1544 | PCI_DMA_FROMDEVICE); | ||
1545 | } | ||
1546 | |||
1547 | tx = &mgp->tx; | ||
1548 | while (tx->done != tx->req) { | ||
1549 | idx = tx->done & tx->mask; | ||
1550 | skb = tx->info[idx].skb; | ||
1551 | |||
1552 | /* Mark as free */ | ||
1553 | tx->info[idx].skb = NULL; | ||
1554 | tx->done++; | ||
1555 | len = pci_unmap_len(&tx->info[idx], len); | ||
1556 | pci_unmap_len_set(&tx->info[idx], len, 0); | ||
1557 | if (skb) { | ||
1558 | mgp->stats.tx_dropped++; | ||
1559 | dev_kfree_skb_any(skb); | ||
1560 | if (len) | ||
1561 | pci_unmap_single(mgp->pdev, | ||
1562 | pci_unmap_addr(&tx->info[idx], | ||
1563 | bus), len, | ||
1564 | PCI_DMA_TODEVICE); | ||
1565 | } else { | ||
1566 | if (len) | ||
1567 | pci_unmap_page(mgp->pdev, | ||
1568 | pci_unmap_addr(&tx->info[idx], | ||
1569 | bus), len, | ||
1570 | PCI_DMA_TODEVICE); | ||
1571 | } | ||
1572 | } | ||
1573 | kfree(mgp->rx_big.info); | ||
1574 | |||
1575 | kfree(mgp->rx_small.info); | ||
1576 | |||
1577 | kfree(mgp->tx.info); | ||
1578 | |||
1579 | kfree(mgp->rx_big.shadow); | ||
1580 | |||
1581 | kfree(mgp->rx_small.shadow); | ||
1582 | |||
1583 | kfree(mgp->tx.req_bytes); | ||
1584 | mgp->tx.req_bytes = NULL; | ||
1585 | mgp->tx.req_list = NULL; | ||
1586 | } | ||
1587 | |||
1588 | static int myri10ge_open(struct net_device *dev) | ||
1589 | { | ||
1590 | struct myri10ge_priv *mgp; | ||
1591 | struct myri10ge_cmd cmd; | ||
1592 | int status, big_pow2; | ||
1593 | |||
1594 | mgp = netdev_priv(dev); | ||
1595 | |||
1596 | if (mgp->running != MYRI10GE_ETH_STOPPED) | ||
1597 | return -EBUSY; | ||
1598 | |||
1599 | mgp->running = MYRI10GE_ETH_STARTING; | ||
1600 | status = myri10ge_reset(mgp); | ||
1601 | if (status != 0) { | ||
1602 | printk(KERN_ERR "myri10ge: %s: failed reset\n", dev->name); | ||
1603 | mgp->running = MYRI10GE_ETH_STOPPED; | ||
1604 | return -ENXIO; | ||
1605 | } | ||
1606 | |||
1607 | /* decide what small buffer size to use. For good TCP rx | ||
1608 | * performance, it is important to not receive 1514 byte | ||
1609 | * frames into jumbo buffers, as it confuses the socket buffer | ||
1610 | * accounting code, leading to drops and erratic performance. | ||
1611 | */ | ||
1612 | |||
1613 | if (dev->mtu <= ETH_DATA_LEN) | ||
1614 | mgp->small_bytes = 128; /* enough for a TCP header */ | ||
1615 | else | ||
1616 | mgp->small_bytes = ETH_FRAME_LEN; /* enough for an ETH_DATA_LEN frame */ | ||
1617 | |||
1618 | /* Override the small buffer size? */ | ||
1619 | if (myri10ge_small_bytes > 0) | ||
1620 | mgp->small_bytes = myri10ge_small_bytes; | ||
1621 | |||
1622 | /* If the user sets an obscenely small MTU, adjust the small | ||
1623 | * bytes down to nearly nothing */ | ||
1624 | if (mgp->small_bytes >= (dev->mtu + ETH_HLEN)) | ||
1625 | mgp->small_bytes = 64; | ||
1626 | |||
1627 | /* get the lanai pointers to the send and receive rings */ | ||
1628 | |||
1629 | status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET, &cmd, 0); | ||
1630 | mgp->tx.lanai = | ||
1631 | (struct mcp_kreq_ether_send __iomem *)(mgp->sram + cmd.data0); | ||
1632 | |||
1633 | status |= | ||
1634 | myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET, &cmd, 0); | ||
1635 | mgp->rx_small.lanai = | ||
1636 | (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0); | ||
1637 | |||
1638 | status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd, 0); | ||
1639 | mgp->rx_big.lanai = | ||
1640 | (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0); | ||
1641 | |||
1642 | if (status != 0) { | ||
1643 | printk(KERN_ERR | ||
1644 | "myri10ge: %s: failed to get ring sizes or locations\n", | ||
1645 | dev->name); | ||
1646 | mgp->running = MYRI10GE_ETH_STOPPED; | ||
1647 | return -ENXIO; | ||
1648 | } | ||
1649 | |||
1650 | if (mgp->mtrr >= 0) { | ||
1651 | mgp->tx.wc_fifo = (u8 __iomem *) mgp->sram + 0x200000; | ||
1652 | mgp->rx_small.wc_fifo = (u8 __iomem *) mgp->sram + 0x300000; | ||
1653 | mgp->rx_big.wc_fifo = (u8 __iomem *) mgp->sram + 0x340000; | ||
1654 | } else { | ||
1655 | mgp->tx.wc_fifo = NULL; | ||
1656 | mgp->rx_small.wc_fifo = NULL; | ||
1657 | mgp->rx_big.wc_fifo = NULL; | ||
1658 | } | ||
1659 | |||
1660 | status = myri10ge_allocate_rings(dev); | ||
1661 | if (status != 0) | ||
1662 | goto abort_with_nothing; | ||
1663 | |||
1664 | /* Firmware needs the big buff size as a power of 2. Lie and | ||
1665 | * tell him the buffer is larger, because we only use 1 | ||
1666 | * buffer/pkt, and the mtu will prevent overruns. | ||
1667 | */ | ||
1668 | big_pow2 = dev->mtu + ETH_HLEN + MXGEFW_PAD; | ||
1669 | while ((big_pow2 & (big_pow2 - 1)) != 0) | ||
1670 | big_pow2++; | ||
1671 | |||
1672 | /* now give firmware buffers sizes, and MTU */ | ||
1673 | cmd.data0 = dev->mtu + ETH_HLEN + VLAN_HLEN; | ||
1674 | status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_MTU, &cmd, 0); | ||
1675 | cmd.data0 = mgp->small_bytes; | ||
1676 | status |= | ||
1677 | myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, &cmd, 0); | ||
1678 | cmd.data0 = big_pow2; | ||
1679 | status |= | ||
1680 | myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_BIG_BUFFER_SIZE, &cmd, 0); | ||
1681 | if (status) { | ||
1682 | printk(KERN_ERR "myri10ge: %s: Couldn't set buffer sizes\n", | ||
1683 | dev->name); | ||
1684 | goto abort_with_rings; | ||
1685 | } | ||
1686 | |||
1687 | cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->fw_stats_bus); | ||
1688 | cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->fw_stats_bus); | ||
1689 | status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA, &cmd, 0); | ||
1690 | if (status) { | ||
1691 | printk(KERN_ERR "myri10ge: %s: Couldn't set stats DMA\n", | ||
1692 | dev->name); | ||
1693 | goto abort_with_rings; | ||
1694 | } | ||
1695 | |||
1696 | mgp->link_state = -1; | ||
1697 | mgp->rdma_tags_available = 15; | ||
1698 | |||
1699 | netif_poll_enable(mgp->dev); /* must happen prior to any irq */ | ||
1700 | |||
1701 | status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_UP, &cmd, 0); | ||
1702 | if (status) { | ||
1703 | printk(KERN_ERR "myri10ge: %s: Couldn't bring up link\n", | ||
1704 | dev->name); | ||
1705 | goto abort_with_rings; | ||
1706 | } | ||
1707 | |||
1708 | mgp->wake_queue = 0; | ||
1709 | mgp->stop_queue = 0; | ||
1710 | mgp->running = MYRI10GE_ETH_RUNNING; | ||
1711 | mgp->watchdog_timer.expires = jiffies + myri10ge_watchdog_timeout * HZ; | ||
1712 | add_timer(&mgp->watchdog_timer); | ||
1713 | netif_wake_queue(dev); | ||
1714 | return 0; | ||
1715 | |||
1716 | abort_with_rings: | ||
1717 | myri10ge_free_rings(dev); | ||
1718 | |||
1719 | abort_with_nothing: | ||
1720 | mgp->running = MYRI10GE_ETH_STOPPED; | ||
1721 | return -ENOMEM; | ||
1722 | } | ||
1723 | |||
1724 | static int myri10ge_close(struct net_device *dev) | ||
1725 | { | ||
1726 | struct myri10ge_priv *mgp; | ||
1727 | struct myri10ge_cmd cmd; | ||
1728 | int status, old_down_cnt; | ||
1729 | |||
1730 | mgp = netdev_priv(dev); | ||
1731 | |||
1732 | if (mgp->running != MYRI10GE_ETH_RUNNING) | ||
1733 | return 0; | ||
1734 | |||
1735 | if (mgp->tx.req_bytes == NULL) | ||
1736 | return 0; | ||
1737 | |||
1738 | del_timer_sync(&mgp->watchdog_timer); | ||
1739 | mgp->running = MYRI10GE_ETH_STOPPING; | ||
1740 | netif_poll_disable(mgp->dev); | ||
1741 | netif_carrier_off(dev); | ||
1742 | netif_stop_queue(dev); | ||
1743 | old_down_cnt = mgp->down_cnt; | ||
1744 | mb(); | ||
1745 | status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd, 0); | ||
1746 | if (status) | ||
1747 | printk(KERN_ERR "myri10ge: %s: Couldn't bring down link\n", | ||
1748 | dev->name); | ||
1749 | |||
1750 | wait_event_timeout(mgp->down_wq, old_down_cnt != mgp->down_cnt, HZ); | ||
1751 | if (old_down_cnt == mgp->down_cnt) | ||
1752 | printk(KERN_ERR "myri10ge: %s never got down irq\n", dev->name); | ||
1753 | |||
1754 | netif_tx_disable(dev); | ||
1755 | |||
1756 | myri10ge_free_rings(dev); | ||
1757 | |||
1758 | mgp->running = MYRI10GE_ETH_STOPPED; | ||
1759 | return 0; | ||
1760 | } | ||
1761 | |||
1762 | /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy | ||
1763 | * backwards one at a time and handle ring wraps */ | ||
1764 | |||
1765 | static inline void | ||
1766 | myri10ge_submit_req_backwards(struct myri10ge_tx_buf *tx, | ||
1767 | struct mcp_kreq_ether_send *src, int cnt) | ||
1768 | { | ||
1769 | int idx, starting_slot; | ||
1770 | starting_slot = tx->req; | ||
1771 | while (cnt > 1) { | ||
1772 | cnt--; | ||
1773 | idx = (starting_slot + cnt) & tx->mask; | ||
1774 | myri10ge_pio_copy(&tx->lanai[idx], &src[cnt], sizeof(*src)); | ||
1775 | mb(); | ||
1776 | } | ||
1777 | } | ||
1778 | |||
1779 | /* | ||
1780 | * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy | ||
1781 | * at most 32 bytes at a time, so as to avoid involving the software | ||
1782 | * pio handler in the nic. We re-write the first segment's flags | ||
1783 | * to mark them valid only after writing the entire chain. | ||
1784 | */ | ||
1785 | |||
1786 | static inline void | ||
1787 | myri10ge_submit_req(struct myri10ge_tx_buf *tx, struct mcp_kreq_ether_send *src, | ||
1788 | int cnt) | ||
1789 | { | ||
1790 | int idx, i; | ||
1791 | struct mcp_kreq_ether_send __iomem *dstp, *dst; | ||
1792 | struct mcp_kreq_ether_send *srcp; | ||
1793 | u8 last_flags; | ||
1794 | |||
1795 | idx = tx->req & tx->mask; | ||
1796 | |||
1797 | last_flags = src->flags; | ||
1798 | src->flags = 0; | ||
1799 | mb(); | ||
1800 | dst = dstp = &tx->lanai[idx]; | ||
1801 | srcp = src; | ||
1802 | |||
1803 | if ((idx + cnt) < tx->mask) { | ||
1804 | for (i = 0; i < (cnt - 1); i += 2) { | ||
1805 | myri10ge_pio_copy(dstp, srcp, 2 * sizeof(*src)); | ||
1806 | mb(); /* force write every 32 bytes */ | ||
1807 | srcp += 2; | ||
1808 | dstp += 2; | ||
1809 | } | ||
1810 | } else { | ||
1811 | /* submit all but the first request, and ensure | ||
1812 | * that it is submitted below */ | ||
1813 | myri10ge_submit_req_backwards(tx, src, cnt); | ||
1814 | i = 0; | ||
1815 | } | ||
1816 | if (i < cnt) { | ||
1817 | /* submit the first request */ | ||
1818 | myri10ge_pio_copy(dstp, srcp, sizeof(*src)); | ||
1819 | mb(); /* barrier before setting valid flag */ | ||
1820 | } | ||
1821 | |||
1822 | /* re-write the last 32-bits with the valid flags */ | ||
1823 | src->flags = last_flags; | ||
1824 | __raw_writel(*((u32 *) src + 3), (u32 __iomem *) dst + 3); | ||
1825 | tx->req += cnt; | ||
1826 | mb(); | ||
1827 | } | ||
1828 | |||
1829 | static inline void | ||
1830 | myri10ge_submit_req_wc(struct myri10ge_tx_buf *tx, | ||
1831 | struct mcp_kreq_ether_send *src, int cnt) | ||
1832 | { | ||
1833 | tx->req += cnt; | ||
1834 | mb(); | ||
1835 | while (cnt >= 4) { | ||
1836 | myri10ge_pio_copy(tx->wc_fifo, src, 64); | ||
1837 | mb(); | ||
1838 | src += 4; | ||
1839 | cnt -= 4; | ||
1840 | } | ||
1841 | if (cnt > 0) { | ||
1842 | /* pad it to 64 bytes. The src is 64 bytes bigger than it | ||
1843 | * needs to be so that we don't overrun it */ | ||
1844 | myri10ge_pio_copy(tx->wc_fifo + (cnt << 18), src, 64); | ||
1845 | mb(); | ||
1846 | } | ||
1847 | } | ||
1848 | |||
1849 | /* | ||
1850 | * Transmit a packet. We need to split the packet so that a single | ||
1851 | * segment does not cross myri10ge->tx.boundary, so this makes segment | ||
1852 | * counting tricky. So rather than try to count segments up front, we | ||
1853 | * just give up if there are too few segments to hold a reasonably | ||
1854 | * fragmented packet currently available. If we run | ||
1855 | * out of segments while preparing a packet for DMA, we just linearize | ||
1856 | * it and try again. | ||
1857 | */ | ||
1858 | |||
1859 | static int myri10ge_xmit(struct sk_buff *skb, struct net_device *dev) | ||
1860 | { | ||
1861 | struct myri10ge_priv *mgp = netdev_priv(dev); | ||
1862 | struct mcp_kreq_ether_send *req; | ||
1863 | struct myri10ge_tx_buf *tx = &mgp->tx; | ||
1864 | struct skb_frag_struct *frag; | ||
1865 | dma_addr_t bus; | ||
1866 | u32 low, high_swapped; | ||
1867 | unsigned int len; | ||
1868 | int idx, last_idx, avail, frag_cnt, frag_idx, count, mss, max_segments; | ||
1869 | u16 pseudo_hdr_offset, cksum_offset; | ||
1870 | int cum_len, seglen, boundary, rdma_count; | ||
1871 | u8 flags, odd_flag; | ||
1872 | |||
1873 | again: | ||
1874 | req = tx->req_list; | ||
1875 | avail = tx->mask - 1 - (tx->req - tx->done); | ||
1876 | |||
1877 | mss = 0; | ||
1878 | max_segments = MXGEFW_MAX_SEND_DESC; | ||
1879 | |||
1880 | #ifdef NETIF_F_TSO | ||
1881 | if (skb->len > (dev->mtu + ETH_HLEN)) { | ||
1882 | mss = skb_shinfo(skb)->tso_size; | ||
1883 | if (mss != 0) | ||
1884 | max_segments = MYRI10GE_MAX_SEND_DESC_TSO; | ||
1885 | } | ||
1886 | #endif /*NETIF_F_TSO */ | ||
1887 | |||
1888 | if ((unlikely(avail < max_segments))) { | ||
1889 | /* we are out of transmit resources */ | ||
1890 | mgp->stop_queue++; | ||
1891 | netif_stop_queue(dev); | ||
1892 | return 1; | ||
1893 | } | ||
1894 | |||
1895 | /* Setup checksum offloading, if needed */ | ||
1896 | cksum_offset = 0; | ||
1897 | pseudo_hdr_offset = 0; | ||
1898 | odd_flag = 0; | ||
1899 | flags = (MXGEFW_FLAGS_NO_TSO | MXGEFW_FLAGS_FIRST); | ||
1900 | if (likely(skb->ip_summed == CHECKSUM_HW)) { | ||
1901 | cksum_offset = (skb->h.raw - skb->data); | ||
1902 | pseudo_hdr_offset = (skb->h.raw + skb->csum) - skb->data; | ||
1903 | /* If the headers are excessively large, then we must | ||
1904 | * fall back to a software checksum */ | ||
1905 | if (unlikely(cksum_offset > 255 || pseudo_hdr_offset > 127)) { | ||
1906 | if (skb_checksum_help(skb, 0)) | ||
1907 | goto drop; | ||
1908 | cksum_offset = 0; | ||
1909 | pseudo_hdr_offset = 0; | ||
1910 | } else { | ||
1911 | pseudo_hdr_offset = htons(pseudo_hdr_offset); | ||
1912 | odd_flag = MXGEFW_FLAGS_ALIGN_ODD; | ||
1913 | flags |= MXGEFW_FLAGS_CKSUM; | ||
1914 | } | ||
1915 | } | ||
1916 | |||
1917 | cum_len = 0; | ||
1918 | |||
1919 | #ifdef NETIF_F_TSO | ||
1920 | if (mss) { /* TSO */ | ||
1921 | /* this removes any CKSUM flag from before */ | ||
1922 | flags = (MXGEFW_FLAGS_TSO_HDR | MXGEFW_FLAGS_FIRST); | ||
1923 | |||
1924 | /* negative cum_len signifies to the | ||
1925 | * send loop that we are still in the | ||
1926 | * header portion of the TSO packet. | ||
1927 | * TSO header must be at most 134 bytes long */ | ||
1928 | cum_len = -((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | ||
1929 | |||
1930 | /* for TSO, pseudo_hdr_offset holds mss. | ||
1931 | * The firmware figures out where to put | ||
1932 | * the checksum by parsing the header. */ | ||
1933 | pseudo_hdr_offset = htons(mss); | ||
1934 | } else | ||
1935 | #endif /*NETIF_F_TSO */ | ||
1936 | /* Mark small packets, and pad out tiny packets */ | ||
1937 | if (skb->len <= MXGEFW_SEND_SMALL_SIZE) { | ||
1938 | flags |= MXGEFW_FLAGS_SMALL; | ||
1939 | |||
1940 | /* pad frames to at least ETH_ZLEN bytes */ | ||
1941 | if (unlikely(skb->len < ETH_ZLEN)) { | ||
1942 | skb = skb_padto(skb, ETH_ZLEN); | ||
1943 | if (skb == NULL) { | ||
1944 | /* The packet is gone, so we must | ||
1945 | * return 0 */ | ||
1946 | mgp->stats.tx_dropped += 1; | ||
1947 | return 0; | ||
1948 | } | ||
1949 | /* adjust the len to account for the zero pad | ||
1950 | * so that the nic can know how long it is */ | ||
1951 | skb->len = ETH_ZLEN; | ||
1952 | } | ||
1953 | } | ||
1954 | |||
1955 | /* map the skb for DMA */ | ||
1956 | len = skb->len - skb->data_len; | ||
1957 | idx = tx->req & tx->mask; | ||
1958 | tx->info[idx].skb = skb; | ||
1959 | bus = pci_map_single(mgp->pdev, skb->data, len, PCI_DMA_TODEVICE); | ||
1960 | pci_unmap_addr_set(&tx->info[idx], bus, bus); | ||
1961 | pci_unmap_len_set(&tx->info[idx], len, len); | ||
1962 | |||
1963 | frag_cnt = skb_shinfo(skb)->nr_frags; | ||
1964 | frag_idx = 0; | ||
1965 | count = 0; | ||
1966 | rdma_count = 0; | ||
1967 | |||
1968 | /* "rdma_count" is the number of RDMAs belonging to the | ||
1969 | * current packet BEFORE the current send request. For | ||
1970 | * non-TSO packets, this is equal to "count". | ||
1971 | * For TSO packets, rdma_count needs to be reset | ||
1972 | * to 0 after a segment cut. | ||
1973 | * | ||
1974 | * The rdma_count field of the send request is | ||
1975 | * the number of RDMAs of the packet starting at | ||
1976 | * that request. For TSO send requests with one ore more cuts | ||
1977 | * in the middle, this is the number of RDMAs starting | ||
1978 | * after the last cut in the request. All previous | ||
1979 | * segments before the last cut implicitly have 1 RDMA. | ||
1980 | * | ||
1981 | * Since the number of RDMAs is not known beforehand, | ||
1982 | * it must be filled-in retroactively - after each | ||
1983 | * segmentation cut or at the end of the entire packet. | ||
1984 | */ | ||
1985 | |||
1986 | while (1) { | ||
1987 | /* Break the SKB or Fragment up into pieces which | ||
1988 | * do not cross mgp->tx.boundary */ | ||
1989 | low = MYRI10GE_LOWPART_TO_U32(bus); | ||
1990 | high_swapped = htonl(MYRI10GE_HIGHPART_TO_U32(bus)); | ||
1991 | while (len) { | ||
1992 | u8 flags_next; | ||
1993 | int cum_len_next; | ||
1994 | |||
1995 | if (unlikely(count == max_segments)) | ||
1996 | goto abort_linearize; | ||
1997 | |||
1998 | boundary = (low + tx->boundary) & ~(tx->boundary - 1); | ||
1999 | seglen = boundary - low; | ||
2000 | if (seglen > len) | ||
2001 | seglen = len; | ||
2002 | flags_next = flags & ~MXGEFW_FLAGS_FIRST; | ||
2003 | cum_len_next = cum_len + seglen; | ||
2004 | #ifdef NETIF_F_TSO | ||
2005 | if (mss) { /* TSO */ | ||
2006 | (req - rdma_count)->rdma_count = rdma_count + 1; | ||
2007 | |||
2008 | if (likely(cum_len >= 0)) { /* payload */ | ||
2009 | int next_is_first, chop; | ||
2010 | |||
2011 | chop = (cum_len_next > mss); | ||
2012 | cum_len_next = cum_len_next % mss; | ||
2013 | next_is_first = (cum_len_next == 0); | ||
2014 | flags |= chop * MXGEFW_FLAGS_TSO_CHOP; | ||
2015 | flags_next |= next_is_first * | ||
2016 | MXGEFW_FLAGS_FIRST; | ||
2017 | rdma_count |= -(chop | next_is_first); | ||
2018 | rdma_count += chop & !next_is_first; | ||
2019 | } else if (likely(cum_len_next >= 0)) { /* header ends */ | ||
2020 | int small; | ||
2021 | |||
2022 | rdma_count = -1; | ||
2023 | cum_len_next = 0; | ||
2024 | seglen = -cum_len; | ||
2025 | small = (mss <= MXGEFW_SEND_SMALL_SIZE); | ||
2026 | flags_next = MXGEFW_FLAGS_TSO_PLD | | ||
2027 | MXGEFW_FLAGS_FIRST | | ||
2028 | (small * MXGEFW_FLAGS_SMALL); | ||
2029 | } | ||
2030 | } | ||
2031 | #endif /* NETIF_F_TSO */ | ||
2032 | req->addr_high = high_swapped; | ||
2033 | req->addr_low = htonl(low); | ||
2034 | req->pseudo_hdr_offset = pseudo_hdr_offset; | ||
2035 | req->pad = 0; /* complete solid 16-byte block; does this matter? */ | ||
2036 | req->rdma_count = 1; | ||
2037 | req->length = htons(seglen); | ||
2038 | req->cksum_offset = cksum_offset; | ||
2039 | req->flags = flags | ((cum_len & 1) * odd_flag); | ||
2040 | |||
2041 | low += seglen; | ||
2042 | len -= seglen; | ||
2043 | cum_len = cum_len_next; | ||
2044 | flags = flags_next; | ||
2045 | req++; | ||
2046 | count++; | ||
2047 | rdma_count++; | ||
2048 | if (unlikely(cksum_offset > seglen)) | ||
2049 | cksum_offset -= seglen; | ||
2050 | else | ||
2051 | cksum_offset = 0; | ||
2052 | } | ||
2053 | if (frag_idx == frag_cnt) | ||
2054 | break; | ||
2055 | |||
2056 | /* map next fragment for DMA */ | ||
2057 | idx = (count + tx->req) & tx->mask; | ||
2058 | frag = &skb_shinfo(skb)->frags[frag_idx]; | ||
2059 | frag_idx++; | ||
2060 | len = frag->size; | ||
2061 | bus = pci_map_page(mgp->pdev, frag->page, frag->page_offset, | ||
2062 | len, PCI_DMA_TODEVICE); | ||
2063 | pci_unmap_addr_set(&tx->info[idx], bus, bus); | ||
2064 | pci_unmap_len_set(&tx->info[idx], len, len); | ||
2065 | } | ||
2066 | |||
2067 | (req - rdma_count)->rdma_count = rdma_count; | ||
2068 | #ifdef NETIF_F_TSO | ||
2069 | if (mss) | ||
2070 | do { | ||
2071 | req--; | ||
2072 | req->flags |= MXGEFW_FLAGS_TSO_LAST; | ||
2073 | } while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP | | ||
2074 | MXGEFW_FLAGS_FIRST))); | ||
2075 | #endif | ||
2076 | idx = ((count - 1) + tx->req) & tx->mask; | ||
2077 | tx->info[idx].last = 1; | ||
2078 | if (tx->wc_fifo == NULL) | ||
2079 | myri10ge_submit_req(tx, tx->req_list, count); | ||
2080 | else | ||
2081 | myri10ge_submit_req_wc(tx, tx->req_list, count); | ||
2082 | tx->pkt_start++; | ||
2083 | if ((avail - count) < MXGEFW_MAX_SEND_DESC) { | ||
2084 | mgp->stop_queue++; | ||
2085 | netif_stop_queue(dev); | ||
2086 | } | ||
2087 | dev->trans_start = jiffies; | ||
2088 | return 0; | ||
2089 | |||
2090 | abort_linearize: | ||
2091 | /* Free any DMA resources we've alloced and clear out the skb | ||
2092 | * slot so as to not trip up assertions, and to avoid a | ||
2093 | * double-free if linearizing fails */ | ||
2094 | |||
2095 | last_idx = (idx + 1) & tx->mask; | ||
2096 | idx = tx->req & tx->mask; | ||
2097 | tx->info[idx].skb = NULL; | ||
2098 | do { | ||
2099 | len = pci_unmap_len(&tx->info[idx], len); | ||
2100 | if (len) { | ||
2101 | if (tx->info[idx].skb != NULL) | ||
2102 | pci_unmap_single(mgp->pdev, | ||
2103 | pci_unmap_addr(&tx->info[idx], | ||
2104 | bus), len, | ||
2105 | PCI_DMA_TODEVICE); | ||
2106 | else | ||
2107 | pci_unmap_page(mgp->pdev, | ||
2108 | pci_unmap_addr(&tx->info[idx], | ||
2109 | bus), len, | ||
2110 | PCI_DMA_TODEVICE); | ||
2111 | pci_unmap_len_set(&tx->info[idx], len, 0); | ||
2112 | tx->info[idx].skb = NULL; | ||
2113 | } | ||
2114 | idx = (idx + 1) & tx->mask; | ||
2115 | } while (idx != last_idx); | ||
2116 | if (skb_shinfo(skb)->tso_size) { | ||
2117 | printk(KERN_ERR | ||
2118 | "myri10ge: %s: TSO but wanted to linearize?!?!?\n", | ||
2119 | mgp->dev->name); | ||
2120 | goto drop; | ||
2121 | } | ||
2122 | |||
2123 | if (skb_linearize(skb, GFP_ATOMIC)) | ||
2124 | goto drop; | ||
2125 | |||
2126 | mgp->tx_linearized++; | ||
2127 | goto again; | ||
2128 | |||
2129 | drop: | ||
2130 | dev_kfree_skb_any(skb); | ||
2131 | mgp->stats.tx_dropped += 1; | ||
2132 | return 0; | ||
2133 | |||
2134 | } | ||
2135 | |||
2136 | static struct net_device_stats *myri10ge_get_stats(struct net_device *dev) | ||
2137 | { | ||
2138 | struct myri10ge_priv *mgp = netdev_priv(dev); | ||
2139 | return &mgp->stats; | ||
2140 | } | ||
2141 | |||
2142 | static void myri10ge_set_multicast_list(struct net_device *dev) | ||
2143 | { | ||
2144 | /* can be called from atomic contexts, | ||
2145 | * pass 1 to force atomicity in myri10ge_send_cmd() */ | ||
2146 | myri10ge_change_promisc(netdev_priv(dev), dev->flags & IFF_PROMISC, 1); | ||
2147 | } | ||
2148 | |||
2149 | static int myri10ge_set_mac_address(struct net_device *dev, void *addr) | ||
2150 | { | ||
2151 | struct sockaddr *sa = addr; | ||
2152 | struct myri10ge_priv *mgp = netdev_priv(dev); | ||
2153 | int status; | ||
2154 | |||
2155 | if (!is_valid_ether_addr(sa->sa_data)) | ||
2156 | return -EADDRNOTAVAIL; | ||
2157 | |||
2158 | status = myri10ge_update_mac_address(mgp, sa->sa_data); | ||
2159 | if (status != 0) { | ||
2160 | printk(KERN_ERR | ||
2161 | "myri10ge: %s: changing mac address failed with %d\n", | ||
2162 | dev->name, status); | ||
2163 | return status; | ||
2164 | } | ||
2165 | |||
2166 | /* change the dev structure */ | ||
2167 | memcpy(dev->dev_addr, sa->sa_data, 6); | ||
2168 | return 0; | ||
2169 | } | ||
2170 | |||
2171 | static int myri10ge_change_mtu(struct net_device *dev, int new_mtu) | ||
2172 | { | ||
2173 | struct myri10ge_priv *mgp = netdev_priv(dev); | ||
2174 | int error = 0; | ||
2175 | |||
2176 | if ((new_mtu < 68) || (ETH_HLEN + new_mtu > MYRI10GE_MAX_ETHER_MTU)) { | ||
2177 | printk(KERN_ERR "myri10ge: %s: new mtu (%d) is not valid\n", | ||
2178 | dev->name, new_mtu); | ||
2179 | return -EINVAL; | ||
2180 | } | ||
2181 | printk(KERN_INFO "%s: changing mtu from %d to %d\n", | ||
2182 | dev->name, dev->mtu, new_mtu); | ||
2183 | if (mgp->running) { | ||
2184 | /* if we change the mtu on an active device, we must | ||
2185 | * reset the device so the firmware sees the change */ | ||
2186 | myri10ge_close(dev); | ||
2187 | dev->mtu = new_mtu; | ||
2188 | myri10ge_open(dev); | ||
2189 | } else | ||
2190 | dev->mtu = new_mtu; | ||
2191 | |||
2192 | return error; | ||
2193 | } | ||
2194 | |||
2195 | /* | ||
2196 | * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary. | ||
2197 | * Only do it if the bridge is a root port since we don't want to disturb | ||
2198 | * any other device, except if forced with myri10ge_ecrc_enable > 1. | ||
2199 | */ | ||
2200 | |||
2201 | #define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_PCIE 0x005d | ||
2202 | |||
2203 | static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp) | ||
2204 | { | ||
2205 | struct pci_dev *bridge = mgp->pdev->bus->self; | ||
2206 | struct device *dev = &mgp->pdev->dev; | ||
2207 | unsigned cap; | ||
2208 | unsigned err_cap; | ||
2209 | u16 val; | ||
2210 | u8 ext_type; | ||
2211 | int ret; | ||
2212 | |||
2213 | if (!myri10ge_ecrc_enable || !bridge) | ||
2214 | return; | ||
2215 | |||
2216 | /* check that the bridge is a root port */ | ||
2217 | cap = pci_find_capability(bridge, PCI_CAP_ID_EXP); | ||
2218 | pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val); | ||
2219 | ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4; | ||
2220 | if (ext_type != PCI_EXP_TYPE_ROOT_PORT) { | ||
2221 | if (myri10ge_ecrc_enable > 1) { | ||
2222 | struct pci_dev *old_bridge = bridge; | ||
2223 | |||
2224 | /* Walk the hierarchy up to the root port | ||
2225 | * where ECRC has to be enabled */ | ||
2226 | do { | ||
2227 | bridge = bridge->bus->self; | ||
2228 | if (!bridge) { | ||
2229 | dev_err(dev, | ||
2230 | "Failed to find root port" | ||
2231 | " to force ECRC\n"); | ||
2232 | return; | ||
2233 | } | ||
2234 | cap = | ||
2235 | pci_find_capability(bridge, PCI_CAP_ID_EXP); | ||
2236 | pci_read_config_word(bridge, | ||
2237 | cap + PCI_CAP_FLAGS, &val); | ||
2238 | ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4; | ||
2239 | } while (ext_type != PCI_EXP_TYPE_ROOT_PORT); | ||
2240 | |||
2241 | dev_info(dev, | ||
2242 | "Forcing ECRC on non-root port %s" | ||
2243 | " (enabling on root port %s)\n", | ||
2244 | pci_name(old_bridge), pci_name(bridge)); | ||
2245 | } else { | ||
2246 | dev_err(dev, | ||
2247 | "Not enabling ECRC on non-root port %s\n", | ||
2248 | pci_name(bridge)); | ||
2249 | return; | ||
2250 | } | ||
2251 | } | ||
2252 | |||
2253 | cap = pci_find_ext_capability(bridge, PCI_EXT_CAP_ID_ERR); | ||
2254 | /* nvidia ext cap is not always linked in ext cap chain */ | ||
2255 | if (!cap | ||
2256 | && bridge->vendor == PCI_VENDOR_ID_NVIDIA | ||
2257 | && bridge->device == PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_PCIE) | ||
2258 | cap = 0x160; | ||
2259 | |||
2260 | if (!cap) | ||
2261 | return; | ||
2262 | |||
2263 | ret = pci_read_config_dword(bridge, cap + PCI_ERR_CAP, &err_cap); | ||
2264 | if (ret) { | ||
2265 | dev_err(dev, "failed reading ext-conf-space of %s\n", | ||
2266 | pci_name(bridge)); | ||
2267 | dev_err(dev, "\t pci=nommconf in use? " | ||
2268 | "or buggy/incomplete/absent ACPI MCFG attr?\n"); | ||
2269 | return; | ||
2270 | } | ||
2271 | if (!(err_cap & PCI_ERR_CAP_ECRC_GENC)) | ||
2272 | return; | ||
2273 | |||
2274 | err_cap |= PCI_ERR_CAP_ECRC_GENE; | ||
2275 | pci_write_config_dword(bridge, cap + PCI_ERR_CAP, err_cap); | ||
2276 | dev_info(dev, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge)); | ||
2277 | mgp->tx.boundary = 4096; | ||
2278 | mgp->fw_name = myri10ge_fw_aligned; | ||
2279 | } | ||
2280 | |||
2281 | /* | ||
2282 | * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput | ||
2283 | * when the PCI-E Completion packets are aligned on an 8-byte | ||
2284 | * boundary. Some PCI-E chip sets always align Completion packets; on | ||
2285 | * the ones that do not, the alignment can be enforced by enabling | ||
2286 | * ECRC generation (if supported). | ||
2287 | * | ||
2288 | * When PCI-E Completion packets are not aligned, it is actually more | ||
2289 | * efficient to limit Read-DMA transactions to 2KB, rather than 4KB. | ||
2290 | * | ||
2291 | * If the driver can neither enable ECRC nor verify that it has | ||
2292 | * already been enabled, then it must use a firmware image which works | ||
2293 | * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it | ||
2294 | * should also ensure that it never gives the device a Read-DMA which is | ||
2295 | * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is | ||
2296 | * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat) | ||
2297 | * firmware image, and set tx.boundary to 4KB. | ||
2298 | */ | ||
2299 | |||
2300 | #define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE 0x0132 | ||
2301 | |||
2302 | static void myri10ge_select_firmware(struct myri10ge_priv *mgp) | ||
2303 | { | ||
2304 | struct pci_dev *bridge = mgp->pdev->bus->self; | ||
2305 | |||
2306 | mgp->tx.boundary = 2048; | ||
2307 | mgp->fw_name = myri10ge_fw_unaligned; | ||
2308 | |||
2309 | if (myri10ge_force_firmware == 0) { | ||
2310 | myri10ge_enable_ecrc(mgp); | ||
2311 | |||
2312 | /* Check to see if the upstream bridge is known to | ||
2313 | * provide aligned completions */ | ||
2314 | if (bridge | ||
2315 | /* ServerWorks HT2000/HT1000 */ | ||
2316 | && bridge->vendor == PCI_VENDOR_ID_SERVERWORKS | ||
2317 | && bridge->device == | ||
2318 | PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE) { | ||
2319 | dev_info(&mgp->pdev->dev, | ||
2320 | "Assuming aligned completions (0x%x:0x%x)\n", | ||
2321 | bridge->vendor, bridge->device); | ||
2322 | mgp->tx.boundary = 4096; | ||
2323 | mgp->fw_name = myri10ge_fw_aligned; | ||
2324 | } | ||
2325 | } else { | ||
2326 | if (myri10ge_force_firmware == 1) { | ||
2327 | dev_info(&mgp->pdev->dev, | ||
2328 | "Assuming aligned completions (forced)\n"); | ||
2329 | mgp->tx.boundary = 4096; | ||
2330 | mgp->fw_name = myri10ge_fw_aligned; | ||
2331 | } else { | ||
2332 | dev_info(&mgp->pdev->dev, | ||
2333 | "Assuming unaligned completions (forced)\n"); | ||
2334 | mgp->tx.boundary = 2048; | ||
2335 | mgp->fw_name = myri10ge_fw_unaligned; | ||
2336 | } | ||
2337 | } | ||
2338 | if (myri10ge_fw_name != NULL) { | ||
2339 | dev_info(&mgp->pdev->dev, "overriding firmware to %s\n", | ||
2340 | myri10ge_fw_name); | ||
2341 | mgp->fw_name = myri10ge_fw_name; | ||
2342 | } | ||
2343 | } | ||
2344 | |||
2345 | static void myri10ge_save_state(struct myri10ge_priv *mgp) | ||
2346 | { | ||
2347 | struct pci_dev *pdev = mgp->pdev; | ||
2348 | int cap; | ||
2349 | |||
2350 | pci_save_state(pdev); | ||
2351 | /* now save PCIe and MSI state that Linux will not | ||
2352 | * save for us */ | ||
2353 | cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); | ||
2354 | pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL, &mgp->devctl); | ||
2355 | cap = pci_find_capability(pdev, PCI_CAP_ID_MSI); | ||
2356 | pci_read_config_word(pdev, cap + PCI_MSI_FLAGS, &mgp->msi_flags); | ||
2357 | } | ||
2358 | |||
2359 | static void myri10ge_restore_state(struct myri10ge_priv *mgp) | ||
2360 | { | ||
2361 | struct pci_dev *pdev = mgp->pdev; | ||
2362 | int cap; | ||
2363 | |||
2364 | /* restore PCIe and MSI state that linux will not */ | ||
2365 | cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); | ||
2366 | pci_write_config_dword(pdev, cap + PCI_CAP_ID_EXP, mgp->devctl); | ||
2367 | cap = pci_find_capability(pdev, PCI_CAP_ID_MSI); | ||
2368 | pci_write_config_word(pdev, cap + PCI_MSI_FLAGS, mgp->msi_flags); | ||
2369 | |||
2370 | pci_restore_state(pdev); | ||
2371 | } | ||
2372 | |||
2373 | #ifdef CONFIG_PM | ||
2374 | |||
2375 | static int myri10ge_suspend(struct pci_dev *pdev, pm_message_t state) | ||
2376 | { | ||
2377 | struct myri10ge_priv *mgp; | ||
2378 | struct net_device *netdev; | ||
2379 | |||
2380 | mgp = pci_get_drvdata(pdev); | ||
2381 | if (mgp == NULL) | ||
2382 | return -EINVAL; | ||
2383 | netdev = mgp->dev; | ||
2384 | |||
2385 | netif_device_detach(netdev); | ||
2386 | if (netif_running(netdev)) { | ||
2387 | printk(KERN_INFO "myri10ge: closing %s\n", netdev->name); | ||
2388 | rtnl_lock(); | ||
2389 | myri10ge_close(netdev); | ||
2390 | rtnl_unlock(); | ||
2391 | } | ||
2392 | myri10ge_dummy_rdma(mgp, 0); | ||
2393 | free_irq(pdev->irq, mgp); | ||
2394 | myri10ge_save_state(mgp); | ||
2395 | pci_disable_device(pdev); | ||
2396 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | ||
2397 | return 0; | ||
2398 | } | ||
2399 | |||
2400 | static int myri10ge_resume(struct pci_dev *pdev) | ||
2401 | { | ||
2402 | struct myri10ge_priv *mgp; | ||
2403 | struct net_device *netdev; | ||
2404 | int status; | ||
2405 | u16 vendor; | ||
2406 | |||
2407 | mgp = pci_get_drvdata(pdev); | ||
2408 | if (mgp == NULL) | ||
2409 | return -EINVAL; | ||
2410 | netdev = mgp->dev; | ||
2411 | pci_set_power_state(pdev, 0); /* zeros conf space as a side effect */ | ||
2412 | msleep(5); /* give card time to respond */ | ||
2413 | pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor); | ||
2414 | if (vendor == 0xffff) { | ||
2415 | printk(KERN_ERR "myri10ge: %s: device disappeared!\n", | ||
2416 | mgp->dev->name); | ||
2417 | return -EIO; | ||
2418 | } | ||
2419 | myri10ge_restore_state(mgp); | ||
2420 | pci_enable_device(pdev); | ||
2421 | pci_set_master(pdev); | ||
2422 | |||
2423 | status = request_irq(pdev->irq, myri10ge_intr, SA_SHIRQ, | ||
2424 | netdev->name, mgp); | ||
2425 | if (status != 0) { | ||
2426 | dev_err(&pdev->dev, "failed to allocate IRQ\n"); | ||
2427 | goto abort_with_msi; | ||
2428 | } | ||
2429 | |||
2430 | myri10ge_reset(mgp); | ||
2431 | myri10ge_dummy_rdma(mgp, mgp->tx.boundary != 4096); | ||
2432 | |||
2433 | /* Save configuration space to be restored if the | ||
2434 | * nic resets due to a parity error */ | ||
2435 | myri10ge_save_state(mgp); | ||
2436 | |||
2437 | if (netif_running(netdev)) { | ||
2438 | rtnl_lock(); | ||
2439 | myri10ge_open(netdev); | ||
2440 | rtnl_unlock(); | ||
2441 | } | ||
2442 | netif_device_attach(netdev); | ||
2443 | |||
2444 | return 0; | ||
2445 | |||
2446 | abort_with_msi: | ||
2447 | return -EIO; | ||
2448 | |||
2449 | } | ||
2450 | |||
2451 | #endif /* CONFIG_PM */ | ||
2452 | |||
2453 | static u32 myri10ge_read_reboot(struct myri10ge_priv *mgp) | ||
2454 | { | ||
2455 | struct pci_dev *pdev = mgp->pdev; | ||
2456 | int vs = mgp->vendor_specific_offset; | ||
2457 | u32 reboot; | ||
2458 | |||
2459 | /*enter read32 mode */ | ||
2460 | pci_write_config_byte(pdev, vs + 0x10, 0x3); | ||
2461 | |||
2462 | /*read REBOOT_STATUS (0xfffffff0) */ | ||
2463 | pci_write_config_dword(pdev, vs + 0x18, 0xfffffff0); | ||
2464 | pci_read_config_dword(pdev, vs + 0x14, &reboot); | ||
2465 | return reboot; | ||
2466 | } | ||
2467 | |||
2468 | /* | ||
2469 | * This watchdog is used to check whether the board has suffered | ||
2470 | * from a parity error and needs to be recovered. | ||
2471 | */ | ||
2472 | static void myri10ge_watchdog(void *arg) | ||
2473 | { | ||
2474 | struct myri10ge_priv *mgp = arg; | ||
2475 | u32 reboot; | ||
2476 | int status; | ||
2477 | u16 cmd, vendor; | ||
2478 | |||
2479 | mgp->watchdog_resets++; | ||
2480 | pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd); | ||
2481 | if ((cmd & PCI_COMMAND_MASTER) == 0) { | ||
2482 | /* Bus master DMA disabled? Check to see | ||
2483 | * if the card rebooted due to a parity error | ||
2484 | * For now, just report it */ | ||
2485 | reboot = myri10ge_read_reboot(mgp); | ||
2486 | printk(KERN_ERR | ||
2487 | "myri10ge: %s: NIC rebooted (0x%x), resetting\n", | ||
2488 | mgp->dev->name, reboot); | ||
2489 | /* | ||
2490 | * A rebooted nic will come back with config space as | ||
2491 | * it was after power was applied to PCIe bus. | ||
2492 | * Attempt to restore config space which was saved | ||
2493 | * when the driver was loaded, or the last time the | ||
2494 | * nic was resumed from power saving mode. | ||
2495 | */ | ||
2496 | myri10ge_restore_state(mgp); | ||
2497 | } else { | ||
2498 | /* if we get back -1's from our slot, perhaps somebody | ||
2499 | * powered off our card. Don't try to reset it in | ||
2500 | * this case */ | ||
2501 | if (cmd == 0xffff) { | ||
2502 | pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor); | ||
2503 | if (vendor == 0xffff) { | ||
2504 | printk(KERN_ERR | ||
2505 | "myri10ge: %s: device disappeared!\n", | ||
2506 | mgp->dev->name); | ||
2507 | return; | ||
2508 | } | ||
2509 | } | ||
2510 | /* Perhaps it is a software error. Try to reset */ | ||
2511 | |||
2512 | printk(KERN_ERR "myri10ge: %s: device timeout, resetting\n", | ||
2513 | mgp->dev->name); | ||
2514 | printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n", | ||
2515 | mgp->dev->name, mgp->tx.req, mgp->tx.done, | ||
2516 | mgp->tx.pkt_start, mgp->tx.pkt_done, | ||
2517 | (int)ntohl(mgp->fw_stats->send_done_count)); | ||
2518 | msleep(2000); | ||
2519 | printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n", | ||
2520 | mgp->dev->name, mgp->tx.req, mgp->tx.done, | ||
2521 | mgp->tx.pkt_start, mgp->tx.pkt_done, | ||
2522 | (int)ntohl(mgp->fw_stats->send_done_count)); | ||
2523 | } | ||
2524 | rtnl_lock(); | ||
2525 | myri10ge_close(mgp->dev); | ||
2526 | status = myri10ge_load_firmware(mgp); | ||
2527 | if (status != 0) | ||
2528 | printk(KERN_ERR "myri10ge: %s: failed to load firmware\n", | ||
2529 | mgp->dev->name); | ||
2530 | else | ||
2531 | myri10ge_open(mgp->dev); | ||
2532 | rtnl_unlock(); | ||
2533 | } | ||
2534 | |||
2535 | /* | ||
2536 | * We use our own timer routine rather than relying upon | ||
2537 | * netdev->tx_timeout because we have a very large hardware transmit | ||
2538 | * queue. Due to the large queue, the netdev->tx_timeout function | ||
2539 | * cannot detect a NIC with a parity error in a timely fashion if the | ||
2540 | * NIC is lightly loaded. | ||
2541 | */ | ||
2542 | static void myri10ge_watchdog_timer(unsigned long arg) | ||
2543 | { | ||
2544 | struct myri10ge_priv *mgp; | ||
2545 | |||
2546 | mgp = (struct myri10ge_priv *)arg; | ||
2547 | if (mgp->tx.req != mgp->tx.done && | ||
2548 | mgp->tx.done == mgp->watchdog_tx_done) | ||
2549 | /* nic seems like it might be stuck.. */ | ||
2550 | schedule_work(&mgp->watchdog_work); | ||
2551 | else | ||
2552 | /* rearm timer */ | ||
2553 | mod_timer(&mgp->watchdog_timer, | ||
2554 | jiffies + myri10ge_watchdog_timeout * HZ); | ||
2555 | |||
2556 | mgp->watchdog_tx_done = mgp->tx.done; | ||
2557 | } | ||
2558 | |||
2559 | static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
2560 | { | ||
2561 | struct net_device *netdev; | ||
2562 | struct myri10ge_priv *mgp; | ||
2563 | struct device *dev = &pdev->dev; | ||
2564 | size_t bytes; | ||
2565 | int i; | ||
2566 | int status = -ENXIO; | ||
2567 | int cap; | ||
2568 | int dac_enabled; | ||
2569 | u16 val; | ||
2570 | |||
2571 | netdev = alloc_etherdev(sizeof(*mgp)); | ||
2572 | if (netdev == NULL) { | ||
2573 | dev_err(dev, "Could not allocate ethernet device\n"); | ||
2574 | return -ENOMEM; | ||
2575 | } | ||
2576 | |||
2577 | mgp = netdev_priv(netdev); | ||
2578 | memset(mgp, 0, sizeof(*mgp)); | ||
2579 | mgp->dev = netdev; | ||
2580 | mgp->pdev = pdev; | ||
2581 | mgp->csum_flag = MXGEFW_FLAGS_CKSUM; | ||
2582 | mgp->pause = myri10ge_flow_control; | ||
2583 | mgp->intr_coal_delay = myri10ge_intr_coal_delay; | ||
2584 | init_waitqueue_head(&mgp->down_wq); | ||
2585 | |||
2586 | if (pci_enable_device(pdev)) { | ||
2587 | dev_err(&pdev->dev, "pci_enable_device call failed\n"); | ||
2588 | status = -ENODEV; | ||
2589 | goto abort_with_netdev; | ||
2590 | } | ||
2591 | myri10ge_select_firmware(mgp); | ||
2592 | |||
2593 | /* Find the vendor-specific cap so we can check | ||
2594 | * the reboot register later on */ | ||
2595 | mgp->vendor_specific_offset | ||
2596 | = pci_find_capability(pdev, PCI_CAP_ID_VNDR); | ||
2597 | |||
2598 | /* Set our max read request to 4KB */ | ||
2599 | cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); | ||
2600 | if (cap < 64) { | ||
2601 | dev_err(&pdev->dev, "Bad PCI_CAP_ID_EXP location %d\n", cap); | ||
2602 | goto abort_with_netdev; | ||
2603 | } | ||
2604 | status = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &val); | ||
2605 | if (status != 0) { | ||
2606 | dev_err(&pdev->dev, "Error %d reading PCI_EXP_DEVCTL\n", | ||
2607 | status); | ||
2608 | goto abort_with_netdev; | ||
2609 | } | ||
2610 | val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12); | ||
2611 | status = pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, val); | ||
2612 | if (status != 0) { | ||
2613 | dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n", | ||
2614 | status); | ||
2615 | goto abort_with_netdev; | ||
2616 | } | ||
2617 | |||
2618 | pci_set_master(pdev); | ||
2619 | dac_enabled = 1; | ||
2620 | status = pci_set_dma_mask(pdev, DMA_64BIT_MASK); | ||
2621 | if (status != 0) { | ||
2622 | dac_enabled = 0; | ||
2623 | dev_err(&pdev->dev, | ||
2624 | "64-bit pci address mask was refused, trying 32-bit"); | ||
2625 | status = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | ||
2626 | } | ||
2627 | if (status != 0) { | ||
2628 | dev_err(&pdev->dev, "Error %d setting DMA mask\n", status); | ||
2629 | goto abort_with_netdev; | ||
2630 | } | ||
2631 | mgp->cmd = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->cmd), | ||
2632 | &mgp->cmd_bus, GFP_KERNEL); | ||
2633 | if (mgp->cmd == NULL) | ||
2634 | goto abort_with_netdev; | ||
2635 | |||
2636 | mgp->fw_stats = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->fw_stats), | ||
2637 | &mgp->fw_stats_bus, GFP_KERNEL); | ||
2638 | if (mgp->fw_stats == NULL) | ||
2639 | goto abort_with_cmd; | ||
2640 | |||
2641 | mgp->board_span = pci_resource_len(pdev, 0); | ||
2642 | mgp->iomem_base = pci_resource_start(pdev, 0); | ||
2643 | mgp->mtrr = -1; | ||
2644 | #ifdef CONFIG_MTRR | ||
2645 | mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span, | ||
2646 | MTRR_TYPE_WRCOMB, 1); | ||
2647 | #endif | ||
2648 | /* Hack. need to get rid of these magic numbers */ | ||
2649 | mgp->sram_size = | ||
2650 | 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100; | ||
2651 | if (mgp->sram_size > mgp->board_span) { | ||
2652 | dev_err(&pdev->dev, "board span %ld bytes too small\n", | ||
2653 | mgp->board_span); | ||
2654 | goto abort_with_wc; | ||
2655 | } | ||
2656 | mgp->sram = ioremap(mgp->iomem_base, mgp->board_span); | ||
2657 | if (mgp->sram == NULL) { | ||
2658 | dev_err(&pdev->dev, "ioremap failed for %ld bytes at 0x%lx\n", | ||
2659 | mgp->board_span, mgp->iomem_base); | ||
2660 | status = -ENXIO; | ||
2661 | goto abort_with_wc; | ||
2662 | } | ||
2663 | memcpy_fromio(mgp->eeprom_strings, | ||
2664 | mgp->sram + mgp->sram_size - MYRI10GE_EEPROM_STRINGS_SIZE, | ||
2665 | MYRI10GE_EEPROM_STRINGS_SIZE); | ||
2666 | memset(mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE - 2, 0, 2); | ||
2667 | status = myri10ge_read_mac_addr(mgp); | ||
2668 | if (status) | ||
2669 | goto abort_with_ioremap; | ||
2670 | |||
2671 | for (i = 0; i < ETH_ALEN; i++) | ||
2672 | netdev->dev_addr[i] = mgp->mac_addr[i]; | ||
2673 | |||
2674 | /* allocate rx done ring */ | ||
2675 | bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry); | ||
2676 | mgp->rx_done.entry = dma_alloc_coherent(&pdev->dev, bytes, | ||
2677 | &mgp->rx_done.bus, GFP_KERNEL); | ||
2678 | if (mgp->rx_done.entry == NULL) | ||
2679 | goto abort_with_ioremap; | ||
2680 | memset(mgp->rx_done.entry, 0, bytes); | ||
2681 | |||
2682 | status = myri10ge_load_firmware(mgp); | ||
2683 | if (status != 0) { | ||
2684 | dev_err(&pdev->dev, "failed to load firmware\n"); | ||
2685 | goto abort_with_rx_done; | ||
2686 | } | ||
2687 | |||
2688 | status = myri10ge_reset(mgp); | ||
2689 | if (status != 0) { | ||
2690 | dev_err(&pdev->dev, "failed reset\n"); | ||
2691 | goto abort_with_firmware; | ||
2692 | } | ||
2693 | |||
2694 | if (myri10ge_msi) { | ||
2695 | status = pci_enable_msi(pdev); | ||
2696 | if (status != 0) | ||
2697 | dev_err(&pdev->dev, | ||
2698 | "Error %d setting up MSI; falling back to xPIC\n", | ||
2699 | status); | ||
2700 | else | ||
2701 | mgp->msi_enabled = 1; | ||
2702 | } | ||
2703 | |||
2704 | status = request_irq(pdev->irq, myri10ge_intr, SA_SHIRQ, | ||
2705 | netdev->name, mgp); | ||
2706 | if (status != 0) { | ||
2707 | dev_err(&pdev->dev, "failed to allocate IRQ\n"); | ||
2708 | goto abort_with_firmware; | ||
2709 | } | ||
2710 | |||
2711 | pci_set_drvdata(pdev, mgp); | ||
2712 | if ((myri10ge_initial_mtu + ETH_HLEN) > MYRI10GE_MAX_ETHER_MTU) | ||
2713 | myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN; | ||
2714 | if ((myri10ge_initial_mtu + ETH_HLEN) < 68) | ||
2715 | myri10ge_initial_mtu = 68; | ||
2716 | netdev->mtu = myri10ge_initial_mtu; | ||
2717 | netdev->open = myri10ge_open; | ||
2718 | netdev->stop = myri10ge_close; | ||
2719 | netdev->hard_start_xmit = myri10ge_xmit; | ||
2720 | netdev->get_stats = myri10ge_get_stats; | ||
2721 | netdev->base_addr = mgp->iomem_base; | ||
2722 | netdev->irq = pdev->irq; | ||
2723 | netdev->change_mtu = myri10ge_change_mtu; | ||
2724 | netdev->set_multicast_list = myri10ge_set_multicast_list; | ||
2725 | netdev->set_mac_address = myri10ge_set_mac_address; | ||
2726 | netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO; | ||
2727 | if (dac_enabled) | ||
2728 | netdev->features |= NETIF_F_HIGHDMA; | ||
2729 | netdev->poll = myri10ge_poll; | ||
2730 | netdev->weight = myri10ge_napi_weight; | ||
2731 | |||
2732 | /* Save configuration space to be restored if the | ||
2733 | * nic resets due to a parity error */ | ||
2734 | myri10ge_save_state(mgp); | ||
2735 | /* Restore state immediately since pci_save_msi_state disables MSI */ | ||
2736 | myri10ge_restore_state(mgp); | ||
2737 | |||
2738 | /* Setup the watchdog timer */ | ||
2739 | setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer, | ||
2740 | (unsigned long)mgp); | ||
2741 | |||
2742 | SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops); | ||
2743 | INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog, mgp); | ||
2744 | status = register_netdev(netdev); | ||
2745 | if (status != 0) { | ||
2746 | dev_err(&pdev->dev, "register_netdev failed: %d\n", status); | ||
2747 | goto abort_with_irq; | ||
2748 | } | ||
2749 | |||
2750 | printk(KERN_INFO "myri10ge: %s: %s IRQ %d, tx bndry %d, fw %s, WC %s\n", | ||
2751 | netdev->name, (mgp->msi_enabled ? "MSI" : "xPIC"), | ||
2752 | pdev->irq, mgp->tx.boundary, mgp->fw_name, | ||
2753 | (mgp->mtrr >= 0 ? "Enabled" : "Disabled")); | ||
2754 | |||
2755 | return 0; | ||
2756 | |||
2757 | abort_with_irq: | ||
2758 | free_irq(pdev->irq, mgp); | ||
2759 | if (mgp->msi_enabled) | ||
2760 | pci_disable_msi(pdev); | ||
2761 | |||
2762 | abort_with_firmware: | ||
2763 | myri10ge_dummy_rdma(mgp, 0); | ||
2764 | |||
2765 | abort_with_rx_done: | ||
2766 | bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry); | ||
2767 | dma_free_coherent(&pdev->dev, bytes, | ||
2768 | mgp->rx_done.entry, mgp->rx_done.bus); | ||
2769 | |||
2770 | abort_with_ioremap: | ||
2771 | iounmap(mgp->sram); | ||
2772 | |||
2773 | abort_with_wc: | ||
2774 | #ifdef CONFIG_MTRR | ||
2775 | if (mgp->mtrr >= 0) | ||
2776 | mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span); | ||
2777 | #endif | ||
2778 | dma_free_coherent(&pdev->dev, sizeof(*mgp->fw_stats), | ||
2779 | mgp->fw_stats, mgp->fw_stats_bus); | ||
2780 | |||
2781 | abort_with_cmd: | ||
2782 | dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd), | ||
2783 | mgp->cmd, mgp->cmd_bus); | ||
2784 | |||
2785 | abort_with_netdev: | ||
2786 | |||
2787 | free_netdev(netdev); | ||
2788 | return status; | ||
2789 | } | ||
2790 | |||
2791 | /* | ||
2792 | * myri10ge_remove | ||
2793 | * | ||
2794 | * Does what is necessary to shutdown one Myrinet device. Called | ||
2795 | * once for each Myrinet card by the kernel when a module is | ||
2796 | * unloaded. | ||
2797 | */ | ||
2798 | static void myri10ge_remove(struct pci_dev *pdev) | ||
2799 | { | ||
2800 | struct myri10ge_priv *mgp; | ||
2801 | struct net_device *netdev; | ||
2802 | size_t bytes; | ||
2803 | |||
2804 | mgp = pci_get_drvdata(pdev); | ||
2805 | if (mgp == NULL) | ||
2806 | return; | ||
2807 | |||
2808 | flush_scheduled_work(); | ||
2809 | netdev = mgp->dev; | ||
2810 | unregister_netdev(netdev); | ||
2811 | free_irq(pdev->irq, mgp); | ||
2812 | if (mgp->msi_enabled) | ||
2813 | pci_disable_msi(pdev); | ||
2814 | |||
2815 | myri10ge_dummy_rdma(mgp, 0); | ||
2816 | |||
2817 | bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry); | ||
2818 | dma_free_coherent(&pdev->dev, bytes, | ||
2819 | mgp->rx_done.entry, mgp->rx_done.bus); | ||
2820 | |||
2821 | iounmap(mgp->sram); | ||
2822 | |||
2823 | #ifdef CONFIG_MTRR | ||
2824 | if (mgp->mtrr >= 0) | ||
2825 | mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span); | ||
2826 | #endif | ||
2827 | dma_free_coherent(&pdev->dev, sizeof(*mgp->fw_stats), | ||
2828 | mgp->fw_stats, mgp->fw_stats_bus); | ||
2829 | |||
2830 | dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd), | ||
2831 | mgp->cmd, mgp->cmd_bus); | ||
2832 | |||
2833 | free_netdev(netdev); | ||
2834 | pci_set_drvdata(pdev, NULL); | ||
2835 | } | ||
2836 | |||
2837 | #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008 | ||
2838 | |||
2839 | static struct pci_device_id myri10ge_pci_tbl[] = { | ||
2840 | {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E)}, | ||
2841 | {0}, | ||
2842 | }; | ||
2843 | |||
2844 | static struct pci_driver myri10ge_driver = { | ||
2845 | .name = "myri10ge", | ||
2846 | .probe = myri10ge_probe, | ||
2847 | .remove = myri10ge_remove, | ||
2848 | .id_table = myri10ge_pci_tbl, | ||
2849 | #ifdef CONFIG_PM | ||
2850 | .suspend = myri10ge_suspend, | ||
2851 | .resume = myri10ge_resume, | ||
2852 | #endif | ||
2853 | }; | ||
2854 | |||
2855 | static __init int myri10ge_init_module(void) | ||
2856 | { | ||
2857 | printk(KERN_INFO "%s: Version %s\n", myri10ge_driver.name, | ||
2858 | MYRI10GE_VERSION_STR); | ||
2859 | return pci_register_driver(&myri10ge_driver); | ||
2860 | } | ||
2861 | |||
2862 | module_init(myri10ge_init_module); | ||
2863 | |||
2864 | static __exit void myri10ge_cleanup_module(void) | ||
2865 | { | ||
2866 | pci_unregister_driver(&myri10ge_driver); | ||
2867 | } | ||
2868 | |||
2869 | module_exit(myri10ge_cleanup_module); | ||
diff --git a/drivers/net/myri10ge/myri10ge_mcp.h b/drivers/net/myri10ge/myri10ge_mcp.h new file mode 100644 index 000000000000..0a6cae6cb186 --- /dev/null +++ b/drivers/net/myri10ge/myri10ge_mcp.h | |||
@@ -0,0 +1,205 @@ | |||
1 | #ifndef __MYRI10GE_MCP_H__ | ||
2 | #define __MYRI10GE_MCP_H__ | ||
3 | |||
4 | #define MXGEFW_VERSION_MAJOR 1 | ||
5 | #define MXGEFW_VERSION_MINOR 4 | ||
6 | |||
7 | /* 8 Bytes */ | ||
8 | struct mcp_dma_addr { | ||
9 | u32 high; | ||
10 | u32 low; | ||
11 | }; | ||
12 | |||
13 | /* 4 Bytes */ | ||
14 | struct mcp_slot { | ||
15 | u16 checksum; | ||
16 | u16 length; | ||
17 | }; | ||
18 | |||
19 | /* 64 Bytes */ | ||
20 | struct mcp_cmd { | ||
21 | u32 cmd; | ||
22 | u32 data0; /* will be low portion if data > 32 bits */ | ||
23 | /* 8 */ | ||
24 | u32 data1; /* will be high portion if data > 32 bits */ | ||
25 | u32 data2; /* currently unused.. */ | ||
26 | /* 16 */ | ||
27 | struct mcp_dma_addr response_addr; | ||
28 | /* 24 */ | ||
29 | u8 pad[40]; | ||
30 | }; | ||
31 | |||
32 | /* 8 Bytes */ | ||
33 | struct mcp_cmd_response { | ||
34 | u32 data; | ||
35 | u32 result; | ||
36 | }; | ||
37 | |||
38 | /* | ||
39 | * flags used in mcp_kreq_ether_send_t: | ||
40 | * | ||
41 | * The SMALL flag is only needed in the first segment. It is raised | ||
42 | * for packets that are total less or equal 512 bytes. | ||
43 | * | ||
44 | * The CKSUM flag must be set in all segments. | ||
45 | * | ||
46 | * The PADDED flags is set if the packet needs to be padded, and it | ||
47 | * must be set for all segments. | ||
48 | * | ||
49 | * The MXGEFW_FLAGS_ALIGN_ODD must be set if the cumulative | ||
50 | * length of all previous segments was odd. | ||
51 | */ | ||
52 | |||
53 | #define MXGEFW_FLAGS_SMALL 0x1 | ||
54 | #define MXGEFW_FLAGS_TSO_HDR 0x1 | ||
55 | #define MXGEFW_FLAGS_FIRST 0x2 | ||
56 | #define MXGEFW_FLAGS_ALIGN_ODD 0x4 | ||
57 | #define MXGEFW_FLAGS_CKSUM 0x8 | ||
58 | #define MXGEFW_FLAGS_TSO_LAST 0x8 | ||
59 | #define MXGEFW_FLAGS_NO_TSO 0x10 | ||
60 | #define MXGEFW_FLAGS_TSO_CHOP 0x10 | ||
61 | #define MXGEFW_FLAGS_TSO_PLD 0x20 | ||
62 | |||
63 | #define MXGEFW_SEND_SMALL_SIZE 1520 | ||
64 | #define MXGEFW_MAX_MTU 9400 | ||
65 | |||
66 | union mcp_pso_or_cumlen { | ||
67 | u16 pseudo_hdr_offset; | ||
68 | u16 cum_len; | ||
69 | }; | ||
70 | |||
71 | #define MXGEFW_MAX_SEND_DESC 12 | ||
72 | #define MXGEFW_PAD 2 | ||
73 | |||
74 | /* 16 Bytes */ | ||
75 | struct mcp_kreq_ether_send { | ||
76 | u32 addr_high; | ||
77 | u32 addr_low; | ||
78 | u16 pseudo_hdr_offset; | ||
79 | u16 length; | ||
80 | u8 pad; | ||
81 | u8 rdma_count; | ||
82 | u8 cksum_offset; /* where to start computing cksum */ | ||
83 | u8 flags; /* as defined above */ | ||
84 | }; | ||
85 | |||
86 | /* 8 Bytes */ | ||
87 | struct mcp_kreq_ether_recv { | ||
88 | u32 addr_high; | ||
89 | u32 addr_low; | ||
90 | }; | ||
91 | |||
92 | /* Commands */ | ||
93 | |||
94 | #define MXGEFW_CMD_OFFSET 0xf80000 | ||
95 | |||
96 | enum myri10ge_mcp_cmd_type { | ||
97 | MXGEFW_CMD_NONE = 0, | ||
98 | /* Reset the mcp, it is left in a safe state, waiting | ||
99 | * for the driver to set all its parameters */ | ||
100 | MXGEFW_CMD_RESET, | ||
101 | |||
102 | /* get the version number of the current firmware.. | ||
103 | * (may be available in the eeprom strings..? */ | ||
104 | MXGEFW_GET_MCP_VERSION, | ||
105 | |||
106 | /* Parameters which must be set by the driver before it can | ||
107 | * issue MXGEFW_CMD_ETHERNET_UP. They persist until the next | ||
108 | * MXGEFW_CMD_RESET is issued */ | ||
109 | |||
110 | MXGEFW_CMD_SET_INTRQ_DMA, | ||
111 | MXGEFW_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */ | ||
112 | MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */ | ||
113 | |||
114 | /* Parameters which refer to lanai SRAM addresses where the | ||
115 | * driver must issue PIO writes for various things */ | ||
116 | |||
117 | MXGEFW_CMD_GET_SEND_OFFSET, | ||
118 | MXGEFW_CMD_GET_SMALL_RX_OFFSET, | ||
119 | MXGEFW_CMD_GET_BIG_RX_OFFSET, | ||
120 | MXGEFW_CMD_GET_IRQ_ACK_OFFSET, | ||
121 | MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET, | ||
122 | |||
123 | /* Parameters which refer to rings stored on the MCP, | ||
124 | * and whose size is controlled by the mcp */ | ||
125 | |||
126 | MXGEFW_CMD_GET_SEND_RING_SIZE, /* in bytes */ | ||
127 | MXGEFW_CMD_GET_RX_RING_SIZE, /* in bytes */ | ||
128 | |||
129 | /* Parameters which refer to rings stored in the host, | ||
130 | * and whose size is controlled by the host. Note that | ||
131 | * all must be physically contiguous and must contain | ||
132 | * a power of 2 number of entries. */ | ||
133 | |||
134 | MXGEFW_CMD_SET_INTRQ_SIZE, /* in bytes */ | ||
135 | |||
136 | /* command to bring ethernet interface up. Above parameters | ||
137 | * (plus mtu & mac address) must have been exchanged prior | ||
138 | * to issuing this command */ | ||
139 | MXGEFW_CMD_ETHERNET_UP, | ||
140 | |||
141 | /* command to bring ethernet interface down. No further sends | ||
142 | * or receives may be processed until an MXGEFW_CMD_ETHERNET_UP | ||
143 | * is issued, and all interrupt queues must be flushed prior | ||
144 | * to ack'ing this command */ | ||
145 | |||
146 | MXGEFW_CMD_ETHERNET_DOWN, | ||
147 | |||
148 | /* commands the driver may issue live, without resetting | ||
149 | * the nic. Note that increasing the mtu "live" should | ||
150 | * only be done if the driver has already supplied buffers | ||
151 | * sufficiently large to handle the new mtu. Decreasing | ||
152 | * the mtu live is safe */ | ||
153 | |||
154 | MXGEFW_CMD_SET_MTU, | ||
155 | MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, /* in microseconds */ | ||
156 | MXGEFW_CMD_SET_STATS_INTERVAL, /* in microseconds */ | ||
157 | MXGEFW_CMD_SET_STATS_DMA, | ||
158 | |||
159 | MXGEFW_ENABLE_PROMISC, | ||
160 | MXGEFW_DISABLE_PROMISC, | ||
161 | MXGEFW_SET_MAC_ADDRESS, | ||
162 | |||
163 | MXGEFW_ENABLE_FLOW_CONTROL, | ||
164 | MXGEFW_DISABLE_FLOW_CONTROL, | ||
165 | |||
166 | /* do a DMA test | ||
167 | * data0,data1 = DMA address | ||
168 | * data2 = RDMA length (MSH), WDMA length (LSH) | ||
169 | * command return data = repetitions (MSH), 0.5-ms ticks (LSH) | ||
170 | */ | ||
171 | MXGEFW_DMA_TEST | ||
172 | }; | ||
173 | |||
174 | enum myri10ge_mcp_cmd_status { | ||
175 | MXGEFW_CMD_OK = 0, | ||
176 | MXGEFW_CMD_UNKNOWN, | ||
177 | MXGEFW_CMD_ERROR_RANGE, | ||
178 | MXGEFW_CMD_ERROR_BUSY, | ||
179 | MXGEFW_CMD_ERROR_EMPTY, | ||
180 | MXGEFW_CMD_ERROR_CLOSED, | ||
181 | MXGEFW_CMD_ERROR_HASH_ERROR, | ||
182 | MXGEFW_CMD_ERROR_BAD_PORT, | ||
183 | MXGEFW_CMD_ERROR_RESOURCES | ||
184 | }; | ||
185 | |||
186 | /* 40 Bytes */ | ||
187 | struct mcp_irq_data { | ||
188 | u32 send_done_count; | ||
189 | |||
190 | u32 link_up; | ||
191 | u32 dropped_link_overflow; | ||
192 | u32 dropped_link_error_or_filtered; | ||
193 | u32 dropped_runt; | ||
194 | u32 dropped_overrun; | ||
195 | u32 dropped_no_small_buffer; | ||
196 | u32 dropped_no_big_buffer; | ||
197 | u32 rdma_tags_available; | ||
198 | |||
199 | u8 tx_stopped; | ||
200 | u8 link_down; | ||
201 | u8 stats_updated; | ||
202 | u8 valid; | ||
203 | }; | ||
204 | |||
205 | #endif /* __MYRI10GE_MCP_H__ */ | ||
diff --git a/drivers/net/myri10ge/myri10ge_mcp_gen_header.h b/drivers/net/myri10ge/myri10ge_mcp_gen_header.h new file mode 100644 index 000000000000..487f7792fd46 --- /dev/null +++ b/drivers/net/myri10ge/myri10ge_mcp_gen_header.h | |||
@@ -0,0 +1,58 @@ | |||
1 | #ifndef __MYRI10GE_MCP_GEN_HEADER_H__ | ||
2 | #define __MYRI10GE_MCP_GEN_HEADER_H__ | ||
3 | |||
4 | /* this file define a standard header used as a first entry point to | ||
5 | * exchange information between firmware/driver and driver. The | ||
6 | * header structure can be anywhere in the mcp. It will usually be in | ||
7 | * the .data section, because some fields needs to be initialized at | ||
8 | * compile time. | ||
9 | * The 32bit word at offset MX_HEADER_PTR_OFFSET in the mcp must | ||
10 | * contains the location of the header. | ||
11 | * | ||
12 | * Typically a MCP will start with the following: | ||
13 | * .text | ||
14 | * .space 52 ! to help catch MEMORY_INT errors | ||
15 | * bt start ! jump to real code | ||
16 | * nop | ||
17 | * .long _gen_mcp_header | ||
18 | * | ||
19 | * The source will have a definition like: | ||
20 | * | ||
21 | * mcp_gen_header_t gen_mcp_header = { | ||
22 | * .header_length = sizeof(mcp_gen_header_t), | ||
23 | * .mcp_type = MCP_TYPE_XXX, | ||
24 | * .version = "something $Id: mcp_gen_header.h,v 1.2 2006/05/13 10:04:35 bgoglin Exp $", | ||
25 | * .mcp_globals = (unsigned)&Globals | ||
26 | * }; | ||
27 | */ | ||
28 | |||
29 | #define MCP_HEADER_PTR_OFFSET 0x3c | ||
30 | |||
31 | #define MCP_TYPE_MX 0x4d582020 /* "MX " */ | ||
32 | #define MCP_TYPE_PCIE 0x70636965 /* "PCIE" pcie-only MCP */ | ||
33 | #define MCP_TYPE_ETH 0x45544820 /* "ETH " */ | ||
34 | #define MCP_TYPE_MCP0 0x4d435030 /* "MCP0" */ | ||
35 | |||
36 | struct mcp_gen_header { | ||
37 | /* the first 4 fields are filled at compile time */ | ||
38 | unsigned header_length; | ||
39 | unsigned mcp_type; | ||
40 | char version[128]; | ||
41 | unsigned mcp_globals; /* pointer to mcp-type specific structure */ | ||
42 | |||
43 | /* filled by the MCP at run-time */ | ||
44 | unsigned sram_size; | ||
45 | unsigned string_specs; /* either the original STRING_SPECS or a superset */ | ||
46 | unsigned string_specs_len; | ||
47 | |||
48 | /* Fields above this comment are guaranteed to be present. | ||
49 | * | ||
50 | * Fields below this comment are extensions added in later versions | ||
51 | * of this struct, drivers should compare the header_length against | ||
52 | * offsetof(field) to check wether a given MCP implements them. | ||
53 | * | ||
54 | * Never remove any field. Keep everything naturally align. | ||
55 | */ | ||
56 | }; | ||
57 | |||
58 | #endif /* __MYRI10GE_MCP_GEN_HEADER_H__ */ | ||
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c index 90627756d6fa..2e4ecedba057 100644 --- a/drivers/net/natsemi.c +++ b/drivers/net/natsemi.c | |||
@@ -318,12 +318,12 @@ performance critical codepaths: | |||
318 | The rx process only runs in the interrupt handler. Access from outside | 318 | The rx process only runs in the interrupt handler. Access from outside |
319 | the interrupt handler is only permitted after disable_irq(). | 319 | the interrupt handler is only permitted after disable_irq(). |
320 | 320 | ||
321 | The rx process usually runs under the dev->xmit_lock. If np->intr_tx_reap | 321 | The rx process usually runs under the netif_tx_lock. If np->intr_tx_reap |
322 | is set, then access is permitted under spin_lock_irq(&np->lock). | 322 | is set, then access is permitted under spin_lock_irq(&np->lock). |
323 | 323 | ||
324 | Thus configuration functions that want to access everything must call | 324 | Thus configuration functions that want to access everything must call |
325 | disable_irq(dev->irq); | 325 | disable_irq(dev->irq); |
326 | spin_lock_bh(dev->xmit_lock); | 326 | netif_tx_lock_bh(dev); |
327 | spin_lock_irq(&np->lock); | 327 | spin_lock_irq(&np->lock); |
328 | 328 | ||
329 | IV. Notes | 329 | IV. Notes |
diff --git a/drivers/net/ne.c b/drivers/net/ne.c index b32765215f75..963a11fa9fe2 100644 --- a/drivers/net/ne.c +++ b/drivers/net/ne.c | |||
@@ -829,7 +829,7 @@ that the ne2k probe is the last 8390 based probe to take place (as it | |||
829 | is at boot) and so the probe will get confused by any other 8390 cards. | 829 | is at boot) and so the probe will get confused by any other 8390 cards. |
830 | ISA device autoprobes on a running machine are not recommended anyway. */ | 830 | ISA device autoprobes on a running machine are not recommended anyway. */ |
831 | 831 | ||
832 | int init_module(void) | 832 | int __init init_module(void) |
833 | { | 833 | { |
834 | int this_dev, found = 0; | 834 | int this_dev, found = 0; |
835 | 835 | ||
diff --git a/drivers/net/ne2.c b/drivers/net/ne2.c index 2aa7b77f84f8..eebf5f02b476 100644 --- a/drivers/net/ne2.c +++ b/drivers/net/ne2.c | |||
@@ -780,7 +780,7 @@ MODULE_PARM_DESC(bad, "(ignored)"); | |||
780 | 780 | ||
781 | /* Module code fixed by David Weinehall */ | 781 | /* Module code fixed by David Weinehall */ |
782 | 782 | ||
783 | int init_module(void) | 783 | int __init init_module(void) |
784 | { | 784 | { |
785 | struct net_device *dev; | 785 | struct net_device *dev; |
786 | int this_dev, found = 0; | 786 | int this_dev, found = 0; |
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c index d090df413049..661bfe54ff5d 100644 --- a/drivers/net/pcmcia/pcnet_cs.c +++ b/drivers/net/pcmcia/pcnet_cs.c | |||
@@ -12,7 +12,7 @@ | |||
12 | Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net | 12 | Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net |
13 | 13 | ||
14 | pcnet_cs.c 1.153 2003/11/09 18:53:09 | 14 | pcnet_cs.c 1.153 2003/11/09 18:53:09 |
15 | 15 | ||
16 | The network driver code is based on Donald Becker's NE2000 code: | 16 | The network driver code is based on Donald Becker's NE2000 code: |
17 | 17 | ||
18 | Written 1992,1993 by Donald Becker. | 18 | Written 1992,1993 by Donald Becker. |
@@ -146,7 +146,7 @@ typedef struct hw_info_t { | |||
146 | #define MII_PHYID_REG2 0x03 | 146 | #define MII_PHYID_REG2 0x03 |
147 | 147 | ||
148 | static hw_info_t hw_info[] = { | 148 | static hw_info_t hw_info[] = { |
149 | { /* Accton EN2212 */ 0x0ff0, 0x00, 0x00, 0xe8, DELAY_OUTPUT }, | 149 | { /* Accton EN2212 */ 0x0ff0, 0x00, 0x00, 0xe8, DELAY_OUTPUT }, |
150 | { /* Allied Telesis LA-PCM */ 0x0ff0, 0x00, 0x00, 0xf4, 0 }, | 150 | { /* Allied Telesis LA-PCM */ 0x0ff0, 0x00, 0x00, 0xf4, 0 }, |
151 | { /* APEX MultiCard */ 0x03f4, 0x00, 0x20, 0xe5, 0 }, | 151 | { /* APEX MultiCard */ 0x03f4, 0x00, 0x20, 0xe5, 0 }, |
152 | { /* ASANTE FriendlyNet */ 0x4910, 0x00, 0x00, 0x94, | 152 | { /* ASANTE FriendlyNet */ 0x4910, 0x00, 0x00, 0x94, |
@@ -193,7 +193,7 @@ static hw_info_t hw_info[] = { | |||
193 | { /* NE2000 Compatible */ 0x0ff0, 0x00, 0xa0, 0x0c, 0 }, | 193 | { /* NE2000 Compatible */ 0x0ff0, 0x00, 0xa0, 0x0c, 0 }, |
194 | { /* Network General Sniffer */ 0x0ff0, 0x00, 0x00, 0x65, | 194 | { /* Network General Sniffer */ 0x0ff0, 0x00, 0x00, 0x65, |
195 | HAS_MISC_REG | HAS_IBM_MISC }, | 195 | HAS_MISC_REG | HAS_IBM_MISC }, |
196 | { /* Panasonic VEL211 */ 0x0ff0, 0x00, 0x80, 0x45, | 196 | { /* Panasonic VEL211 */ 0x0ff0, 0x00, 0x80, 0x45, |
197 | HAS_MISC_REG | HAS_IBM_MISC }, | 197 | HAS_MISC_REG | HAS_IBM_MISC }, |
198 | { /* PreMax PE-200 */ 0x07f0, 0x00, 0x20, 0xe0, 0 }, | 198 | { /* PreMax PE-200 */ 0x07f0, 0x00, 0x20, 0xe0, 0 }, |
199 | { /* RPTI EP400 */ 0x0110, 0x00, 0x40, 0x95, 0 }, | 199 | { /* RPTI EP400 */ 0x0110, 0x00, 0x40, 0x95, 0 }, |
@@ -330,7 +330,7 @@ static hw_info_t *get_hwinfo(struct pcmcia_device *link) | |||
330 | for (j = 0; j < 6; j++) | 330 | for (j = 0; j < 6; j++) |
331 | dev->dev_addr[j] = readb(base + (j<<1)); | 331 | dev->dev_addr[j] = readb(base + (j<<1)); |
332 | } | 332 | } |
333 | 333 | ||
334 | iounmap(virt); | 334 | iounmap(virt); |
335 | j = pcmcia_release_window(link->win); | 335 | j = pcmcia_release_window(link->win); |
336 | if (j != CS_SUCCESS) | 336 | if (j != CS_SUCCESS) |
@@ -490,7 +490,7 @@ static int try_io_port(struct pcmcia_device *link) | |||
490 | if (link->io.NumPorts2 > 0) { | 490 | if (link->io.NumPorts2 > 0) { |
491 | /* for master/slave multifunction cards */ | 491 | /* for master/slave multifunction cards */ |
492 | link->io.Attributes2 = IO_DATA_PATH_WIDTH_8; | 492 | link->io.Attributes2 = IO_DATA_PATH_WIDTH_8; |
493 | link->irq.Attributes = | 493 | link->irq.Attributes = |
494 | IRQ_TYPE_DYNAMIC_SHARING|IRQ_FIRST_SHARED; | 494 | IRQ_TYPE_DYNAMIC_SHARING|IRQ_FIRST_SHARED; |
495 | } | 495 | } |
496 | } else { | 496 | } else { |
@@ -543,19 +543,19 @@ static int pcnet_config(struct pcmcia_device *link) | |||
543 | manfid = le16_to_cpu(buf[0]); | 543 | manfid = le16_to_cpu(buf[0]); |
544 | prodid = le16_to_cpu(buf[1]); | 544 | prodid = le16_to_cpu(buf[1]); |
545 | } | 545 | } |
546 | 546 | ||
547 | tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY; | 547 | tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY; |
548 | tuple.Attributes = 0; | 548 | tuple.Attributes = 0; |
549 | CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple)); | 549 | CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple)); |
550 | while (last_ret == CS_SUCCESS) { | 550 | while (last_ret == CS_SUCCESS) { |
551 | cistpl_cftable_entry_t *cfg = &(parse.cftable_entry); | 551 | cistpl_cftable_entry_t *cfg = &(parse.cftable_entry); |
552 | cistpl_io_t *io = &(parse.cftable_entry.io); | 552 | cistpl_io_t *io = &(parse.cftable_entry.io); |
553 | 553 | ||
554 | if (pcmcia_get_tuple_data(link, &tuple) != 0 || | 554 | if (pcmcia_get_tuple_data(link, &tuple) != 0 || |
555 | pcmcia_parse_tuple(link, &tuple, &parse) != 0 || | 555 | pcmcia_parse_tuple(link, &tuple, &parse) != 0 || |
556 | cfg->index == 0 || cfg->io.nwin == 0) | 556 | cfg->index == 0 || cfg->io.nwin == 0) |
557 | goto next_entry; | 557 | goto next_entry; |
558 | 558 | ||
559 | link->conf.ConfigIndex = cfg->index; | 559 | link->conf.ConfigIndex = cfg->index; |
560 | /* For multifunction cards, by convention, we configure the | 560 | /* For multifunction cards, by convention, we configure the |
561 | network function with window 0, and serial with window 1 */ | 561 | network function with window 0, and serial with window 1 */ |
@@ -584,7 +584,7 @@ static int pcnet_config(struct pcmcia_device *link) | |||
584 | } | 584 | } |
585 | 585 | ||
586 | CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq)); | 586 | CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq)); |
587 | 587 | ||
588 | if (link->io.NumPorts2 == 8) { | 588 | if (link->io.NumPorts2 == 8) { |
589 | link->conf.Attributes |= CONF_ENABLE_SPKR; | 589 | link->conf.Attributes |= CONF_ENABLE_SPKR; |
590 | link->conf.Status = CCSR_AUDIO_ENA; | 590 | link->conf.Status = CCSR_AUDIO_ENA; |
@@ -592,7 +592,7 @@ static int pcnet_config(struct pcmcia_device *link) | |||
592 | if ((manfid == MANFID_IBM) && | 592 | if ((manfid == MANFID_IBM) && |
593 | (prodid == PRODID_IBM_HOME_AND_AWAY)) | 593 | (prodid == PRODID_IBM_HOME_AND_AWAY)) |
594 | link->conf.ConfigIndex |= 0x10; | 594 | link->conf.ConfigIndex |= 0x10; |
595 | 595 | ||
596 | CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf)); | 596 | CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf)); |
597 | dev->irq = link->irq.AssignedIRQ; | 597 | dev->irq = link->irq.AssignedIRQ; |
598 | dev->base_addr = link->io.BasePort1; | 598 | dev->base_addr = link->io.BasePort1; |
@@ -614,7 +614,7 @@ static int pcnet_config(struct pcmcia_device *link) | |||
614 | hw_info = get_ax88190(link); | 614 | hw_info = get_ax88190(link); |
615 | if (hw_info == NULL) | 615 | if (hw_info == NULL) |
616 | hw_info = get_hwired(link); | 616 | hw_info = get_hwired(link); |
617 | 617 | ||
618 | if (hw_info == NULL) { | 618 | if (hw_info == NULL) { |
619 | printk(KERN_NOTICE "pcnet_cs: unable to read hardware net" | 619 | printk(KERN_NOTICE "pcnet_cs: unable to read hardware net" |
620 | " address for io base %#3lx\n", dev->base_addr); | 620 | " address for io base %#3lx\n", dev->base_addr); |
@@ -631,7 +631,7 @@ static int pcnet_config(struct pcmcia_device *link) | |||
631 | info->flags &= ~USE_BIG_BUF; | 631 | info->flags &= ~USE_BIG_BUF; |
632 | if (!use_big_buf) | 632 | if (!use_big_buf) |
633 | info->flags &= ~USE_BIG_BUF; | 633 | info->flags &= ~USE_BIG_BUF; |
634 | 634 | ||
635 | if (info->flags & USE_BIG_BUF) { | 635 | if (info->flags & USE_BIG_BUF) { |
636 | start_pg = SOCKET_START_PG; | 636 | start_pg = SOCKET_START_PG; |
637 | stop_pg = SOCKET_STOP_PG; | 637 | stop_pg = SOCKET_STOP_PG; |
@@ -929,7 +929,7 @@ static void set_misc_reg(struct net_device *dev) | |||
929 | kio_addr_t nic_base = dev->base_addr; | 929 | kio_addr_t nic_base = dev->base_addr; |
930 | pcnet_dev_t *info = PRIV(dev); | 930 | pcnet_dev_t *info = PRIV(dev); |
931 | u_char tmp; | 931 | u_char tmp; |
932 | 932 | ||
933 | if (info->flags & HAS_MISC_REG) { | 933 | if (info->flags & HAS_MISC_REG) { |
934 | tmp = inb_p(nic_base + PCNET_MISC) & ~3; | 934 | tmp = inb_p(nic_base + PCNET_MISC) & ~3; |
935 | if (dev->if_port == 2) | 935 | if (dev->if_port == 2) |
@@ -1022,7 +1022,7 @@ static int pcnet_close(struct net_device *dev) | |||
1022 | 1022 | ||
1023 | ei_close(dev); | 1023 | ei_close(dev); |
1024 | free_irq(dev->irq, dev); | 1024 | free_irq(dev->irq, dev); |
1025 | 1025 | ||
1026 | link->open--; | 1026 | link->open--; |
1027 | netif_stop_queue(dev); | 1027 | netif_stop_queue(dev); |
1028 | del_timer_sync(&info->watchdog); | 1028 | del_timer_sync(&info->watchdog); |
@@ -1054,12 +1054,12 @@ static void pcnet_reset_8390(struct net_device *dev) | |||
1054 | udelay(100); | 1054 | udelay(100); |
1055 | } | 1055 | } |
1056 | outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */ | 1056 | outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */ |
1057 | 1057 | ||
1058 | if (i == 100) | 1058 | if (i == 100) |
1059 | printk(KERN_ERR "%s: pcnet_reset_8390() did not complete.\n", | 1059 | printk(KERN_ERR "%s: pcnet_reset_8390() did not complete.\n", |
1060 | dev->name); | 1060 | dev->name); |
1061 | set_misc_reg(dev); | 1061 | set_misc_reg(dev); |
1062 | 1062 | ||
1063 | } /* pcnet_reset_8390 */ | 1063 | } /* pcnet_reset_8390 */ |
1064 | 1064 | ||
1065 | /*====================================================================*/ | 1065 | /*====================================================================*/ |
@@ -1233,7 +1233,7 @@ static void dma_get_8390_hdr(struct net_device *dev, | |||
1233 | dev->name, ei_status.dmaing, ei_status.irqlock); | 1233 | dev->name, ei_status.dmaing, ei_status.irqlock); |
1234 | return; | 1234 | return; |
1235 | } | 1235 | } |
1236 | 1236 | ||
1237 | ei_status.dmaing |= 0x01; | 1237 | ei_status.dmaing |= 0x01; |
1238 | outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + PCNET_CMD); | 1238 | outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + PCNET_CMD); |
1239 | outb_p(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO); | 1239 | outb_p(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO); |
@@ -1458,7 +1458,7 @@ static void shmem_get_8390_hdr(struct net_device *dev, | |||
1458 | void __iomem *xfer_start = ei_status.mem + (TX_PAGES<<8) | 1458 | void __iomem *xfer_start = ei_status.mem + (TX_PAGES<<8) |
1459 | + (ring_page << 8) | 1459 | + (ring_page << 8) |
1460 | - (ei_status.rx_start_page << 8); | 1460 | - (ei_status.rx_start_page << 8); |
1461 | 1461 | ||
1462 | copyin(hdr, xfer_start, sizeof(struct e8390_pkt_hdr)); | 1462 | copyin(hdr, xfer_start, sizeof(struct e8390_pkt_hdr)); |
1463 | /* Fix for big endian systems */ | 1463 | /* Fix for big endian systems */ |
1464 | hdr->count = le16_to_cpu(hdr->count); | 1464 | hdr->count = le16_to_cpu(hdr->count); |
@@ -1473,7 +1473,7 @@ static void shmem_block_input(struct net_device *dev, int count, | |||
1473 | unsigned long offset = (TX_PAGES<<8) + ring_offset | 1473 | unsigned long offset = (TX_PAGES<<8) + ring_offset |
1474 | - (ei_status.rx_start_page << 8); | 1474 | - (ei_status.rx_start_page << 8); |
1475 | char *buf = skb->data; | 1475 | char *buf = skb->data; |
1476 | 1476 | ||
1477 | if (offset + count > ei_status.priv) { | 1477 | if (offset + count > ei_status.priv) { |
1478 | /* We must wrap the input move. */ | 1478 | /* We must wrap the input move. */ |
1479 | int semi_count = ei_status.priv - offset; | 1479 | int semi_count = ei_status.priv - offset; |
@@ -1541,7 +1541,7 @@ static int setup_shmem_window(struct pcmcia_device *link, int start_pg, | |||
1541 | info->base = NULL; link->win = NULL; | 1541 | info->base = NULL; link->win = NULL; |
1542 | goto failed; | 1542 | goto failed; |
1543 | } | 1543 | } |
1544 | 1544 | ||
1545 | ei_status.mem = info->base + offset; | 1545 | ei_status.mem = info->base + offset; |
1546 | ei_status.priv = req.Size; | 1546 | ei_status.priv = req.Size; |
1547 | dev->mem_start = (u_long)ei_status.mem; | 1547 | dev->mem_start = (u_long)ei_status.mem; |
@@ -1768,6 +1768,8 @@ static struct pcmcia_device_id pcnet_ids[] = { | |||
1768 | PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "NE2K.cis"), | 1768 | PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "NE2K.cis"), |
1769 | PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "PE-200.cis"), | 1769 | PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "PE-200.cis"), |
1770 | PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "tamarack.cis"), | 1770 | PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "tamarack.cis"), |
1771 | PCMCIA_DEVICE_PROD_ID123("Fast Ethernet", "CF Size PC Card", "1.0", | ||
1772 | 0xb4be14e3, 0x43ac239b, 0x0877b627), | ||
1771 | PCMCIA_DEVICE_NULL | 1773 | PCMCIA_DEVICE_NULL |
1772 | }; | 1774 | }; |
1773 | MODULE_DEVICE_TABLE(pcmcia, pcnet_ids); | 1775 | MODULE_DEVICE_TABLE(pcmcia, pcnet_ids); |
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index fa39b944bc46..cda3e53d6917 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig | |||
@@ -45,5 +45,11 @@ config CICADA_PHY | |||
45 | ---help--- | 45 | ---help--- |
46 | Currently supports the cis8204 | 46 | Currently supports the cis8204 |
47 | 47 | ||
48 | config SMSC_PHY | ||
49 | tristate "Drivers for SMSC PHYs" | ||
50 | depends on PHYLIB | ||
51 | ---help--- | ||
52 | Currently supports the LAN83C185 PHY | ||
53 | |||
48 | endmenu | 54 | endmenu |
49 | 55 | ||
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index e4116a5fbb4c..d9614134cc06 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile | |||
@@ -8,3 +8,4 @@ obj-$(CONFIG_DAVICOM_PHY) += davicom.o | |||
8 | obj-$(CONFIG_CICADA_PHY) += cicada.o | 8 | obj-$(CONFIG_CICADA_PHY) += cicada.o |
9 | obj-$(CONFIG_LXT_PHY) += lxt.o | 9 | obj-$(CONFIG_LXT_PHY) += lxt.o |
10 | obj-$(CONFIG_QSEMI_PHY) += qsemi.o | 10 | obj-$(CONFIG_QSEMI_PHY) += qsemi.o |
11 | obj-$(CONFIG_SMSC_PHY) += smsc.o | ||
diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c new file mode 100644 index 000000000000..25e31fb5cb31 --- /dev/null +++ b/drivers/net/phy/smsc.c | |||
@@ -0,0 +1,101 @@ | |||
1 | /* | ||
2 | * drivers/net/phy/smsc.c | ||
3 | * | ||
4 | * Driver for SMSC PHYs | ||
5 | * | ||
6 | * Author: Herbert Valerio Riedel | ||
7 | * | ||
8 | * Copyright (c) 2006 Herbert Valerio Riedel <hvr@gnu.org> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | * | ||
15 | */ | ||
16 | |||
17 | #include <linux/config.h> | ||
18 | #include <linux/kernel.h> | ||
19 | #include <linux/module.h> | ||
20 | #include <linux/mii.h> | ||
21 | #include <linux/ethtool.h> | ||
22 | #include <linux/phy.h> | ||
23 | #include <linux/netdevice.h> | ||
24 | |||
25 | #define MII_LAN83C185_ISF 29 /* Interrupt Source Flags */ | ||
26 | #define MII_LAN83C185_IM 30 /* Interrupt Mask */ | ||
27 | |||
28 | #define MII_LAN83C185_ISF_INT1 (1<<1) /* Auto-Negotiation Page Received */ | ||
29 | #define MII_LAN83C185_ISF_INT2 (1<<2) /* Parallel Detection Fault */ | ||
30 | #define MII_LAN83C185_ISF_INT3 (1<<3) /* Auto-Negotiation LP Ack */ | ||
31 | #define MII_LAN83C185_ISF_INT4 (1<<4) /* Link Down */ | ||
32 | #define MII_LAN83C185_ISF_INT5 (1<<5) /* Remote Fault Detected */ | ||
33 | #define MII_LAN83C185_ISF_INT6 (1<<6) /* Auto-Negotiation complete */ | ||
34 | #define MII_LAN83C185_ISF_INT7 (1<<7) /* ENERGYON */ | ||
35 | |||
36 | #define MII_LAN83C185_ISF_INT_ALL (0x0e) | ||
37 | |||
38 | #define MII_LAN83C185_ISF_INT_PHYLIB_EVENTS \ | ||
39 | (MII_LAN83C185_ISF_INT6 | MII_LAN83C185_ISF_INT4) | ||
40 | |||
41 | |||
42 | static int lan83c185_config_intr(struct phy_device *phydev) | ||
43 | { | ||
44 | int rc = phy_write (phydev, MII_LAN83C185_IM, | ||
45 | ((PHY_INTERRUPT_ENABLED == phydev->interrupts) | ||
46 | ? MII_LAN83C185_ISF_INT_PHYLIB_EVENTS | ||
47 | : 0)); | ||
48 | |||
49 | return rc < 0 ? rc : 0; | ||
50 | } | ||
51 | |||
52 | static int lan83c185_ack_interrupt(struct phy_device *phydev) | ||
53 | { | ||
54 | int rc = phy_read (phydev, MII_LAN83C185_ISF); | ||
55 | |||
56 | return rc < 0 ? rc : 0; | ||
57 | } | ||
58 | |||
59 | static int lan83c185_config_init(struct phy_device *phydev) | ||
60 | { | ||
61 | return lan83c185_ack_interrupt (phydev); | ||
62 | } | ||
63 | |||
64 | |||
65 | static struct phy_driver lan83c185_driver = { | ||
66 | .phy_id = 0x0007c0a0, /* OUI=0x00800f, Model#=0x0a */ | ||
67 | .phy_id_mask = 0xfffffff0, | ||
68 | .name = "SMSC LAN83C185", | ||
69 | |||
70 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | ||
71 | | SUPPORTED_Asym_Pause), | ||
72 | .flags = PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG, | ||
73 | |||
74 | /* basic functions */ | ||
75 | .config_aneg = genphy_config_aneg, | ||
76 | .read_status = genphy_read_status, | ||
77 | .config_init = lan83c185_config_init, | ||
78 | |||
79 | /* IRQ related */ | ||
80 | .ack_interrupt = lan83c185_ack_interrupt, | ||
81 | .config_intr = lan83c185_config_intr, | ||
82 | |||
83 | .driver = { .owner = THIS_MODULE, } | ||
84 | }; | ||
85 | |||
86 | static int __init smsc_init(void) | ||
87 | { | ||
88 | return phy_driver_register (&lan83c185_driver); | ||
89 | } | ||
90 | |||
91 | static void __exit smsc_exit(void) | ||
92 | { | ||
93 | phy_driver_unregister (&lan83c185_driver); | ||
94 | } | ||
95 | |||
96 | MODULE_DESCRIPTION("SMSC PHY driver"); | ||
97 | MODULE_AUTHOR("Herbert Valerio Riedel"); | ||
98 | MODULE_LICENSE("GPL"); | ||
99 | |||
100 | module_init(smsc_init); | ||
101 | module_exit(smsc_exit); | ||
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c index b2073fce8216..01cd8ec751ea 100644 --- a/drivers/net/ppp_generic.c +++ b/drivers/net/ppp_generic.c | |||
@@ -1609,8 +1609,6 @@ ppp_receive_nonmp_frame(struct ppp *ppp, struct sk_buff *skb) | |||
1609 | kfree_skb(skb); | 1609 | kfree_skb(skb); |
1610 | skb = ns; | 1610 | skb = ns; |
1611 | } | 1611 | } |
1612 | else if (!pskb_may_pull(skb, skb->len)) | ||
1613 | goto err; | ||
1614 | else | 1612 | else |
1615 | skb->ip_summed = CHECKSUM_NONE; | 1613 | skb->ip_summed = CHECKSUM_NONE; |
1616 | 1614 | ||
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index 0ad3310290f1..9945cc6b8d90 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -184,6 +184,7 @@ static const struct { | |||
184 | 184 | ||
185 | static struct pci_device_id rtl8169_pci_tbl[] = { | 185 | static struct pci_device_id rtl8169_pci_tbl[] = { |
186 | { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), }, | 186 | { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), }, |
187 | { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8129), }, | ||
187 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), }, | 188 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), }, |
188 | { PCI_DEVICE(0x16ec, 0x0116), }, | 189 | { PCI_DEVICE(0x16ec, 0x0116), }, |
189 | { PCI_VENDOR_ID_LINKSYS, 0x1032, PCI_ANY_ID, 0x0024, }, | 190 | { PCI_VENDOR_ID_LINKSYS, 0x1032, PCI_ANY_ID, 0x0024, }, |
diff --git a/drivers/net/s2io-regs.h b/drivers/net/s2io-regs.h index 00179bc3437f..0ef525899566 100644 --- a/drivers/net/s2io-regs.h +++ b/drivers/net/s2io-regs.h | |||
@@ -167,6 +167,7 @@ typedef struct _XENA_dev_config { | |||
167 | u8 unused4[0x08]; | 167 | u8 unused4[0x08]; |
168 | 168 | ||
169 | u64 gpio_int_reg; | 169 | u64 gpio_int_reg; |
170 | #define GPIO_INT_REG_DP_ERR_INT BIT(0) | ||
170 | #define GPIO_INT_REG_LINK_DOWN BIT(1) | 171 | #define GPIO_INT_REG_LINK_DOWN BIT(1) |
171 | #define GPIO_INT_REG_LINK_UP BIT(2) | 172 | #define GPIO_INT_REG_LINK_UP BIT(2) |
172 | u64 gpio_int_mask; | 173 | u64 gpio_int_mask; |
@@ -187,7 +188,7 @@ typedef struct _XENA_dev_config { | |||
187 | /* PIC Control registers */ | 188 | /* PIC Control registers */ |
188 | u64 pic_control; | 189 | u64 pic_control; |
189 | #define PIC_CNTL_RX_ALARM_MAP_1 BIT(0) | 190 | #define PIC_CNTL_RX_ALARM_MAP_1 BIT(0) |
190 | #define PIC_CNTL_SHARED_SPLITS(n) vBIT(n,11,4) | 191 | #define PIC_CNTL_SHARED_SPLITS(n) vBIT(n,11,5) |
191 | 192 | ||
192 | u64 swapper_ctrl; | 193 | u64 swapper_ctrl; |
193 | #define SWAPPER_CTRL_PIF_R_FE BIT(0) | 194 | #define SWAPPER_CTRL_PIF_R_FE BIT(0) |
@@ -267,6 +268,21 @@ typedef struct _XENA_dev_config { | |||
267 | 268 | ||
268 | /* General Configuration */ | 269 | /* General Configuration */ |
269 | u64 mdio_control; | 270 | u64 mdio_control; |
271 | #define MDIO_MMD_INDX_ADDR(val) vBIT(val, 0, 16) | ||
272 | #define MDIO_MMD_DEV_ADDR(val) vBIT(val, 19, 5) | ||
273 | #define MDIO_MMD_PMA_DEV_ADDR 0x1 | ||
274 | #define MDIO_MMD_PMD_DEV_ADDR 0x1 | ||
275 | #define MDIO_MMD_WIS_DEV_ADDR 0x2 | ||
276 | #define MDIO_MMD_PCS_DEV_ADDR 0x3 | ||
277 | #define MDIO_MMD_PHYXS_DEV_ADDR 0x4 | ||
278 | #define MDIO_MMS_PRT_ADDR(val) vBIT(val, 27, 5) | ||
279 | #define MDIO_CTRL_START_TRANS(val) vBIT(val, 56, 4) | ||
280 | #define MDIO_OP(val) vBIT(val, 60, 2) | ||
281 | #define MDIO_OP_ADDR_TRANS 0x0 | ||
282 | #define MDIO_OP_WRITE_TRANS 0x1 | ||
283 | #define MDIO_OP_READ_POST_INC_TRANS 0x2 | ||
284 | #define MDIO_OP_READ_TRANS 0x3 | ||
285 | #define MDIO_MDIO_DATA(val) vBIT(val, 32, 16) | ||
270 | 286 | ||
271 | u64 dtx_control; | 287 | u64 dtx_control; |
272 | 288 | ||
@@ -284,9 +300,13 @@ typedef struct _XENA_dev_config { | |||
284 | u64 gpio_control; | 300 | u64 gpio_control; |
285 | #define GPIO_CTRL_GPIO_0 BIT(8) | 301 | #define GPIO_CTRL_GPIO_0 BIT(8) |
286 | u64 misc_control; | 302 | u64 misc_control; |
303 | #define EXT_REQ_EN BIT(1) | ||
287 | #define MISC_LINK_STABILITY_PRD(val) vBIT(val,29,3) | 304 | #define MISC_LINK_STABILITY_PRD(val) vBIT(val,29,3) |
288 | 305 | ||
289 | u8 unused7_1[0x240 - 0x208]; | 306 | u8 unused7_1[0x230 - 0x208]; |
307 | |||
308 | u64 pic_control2; | ||
309 | u64 ini_dperr_ctrl; | ||
290 | 310 | ||
291 | u64 wreq_split_mask; | 311 | u64 wreq_split_mask; |
292 | #define WREQ_SPLIT_MASK_SET_MASK(val) vBIT(val, 52, 12) | 312 | #define WREQ_SPLIT_MASK_SET_MASK(val) vBIT(val, 52, 12) |
@@ -493,6 +513,7 @@ typedef struct _XENA_dev_config { | |||
493 | #define PRC_CTRL_NO_SNOOP_DESC BIT(22) | 513 | #define PRC_CTRL_NO_SNOOP_DESC BIT(22) |
494 | #define PRC_CTRL_NO_SNOOP_BUFF BIT(23) | 514 | #define PRC_CTRL_NO_SNOOP_BUFF BIT(23) |
495 | #define PRC_CTRL_BIMODAL_INTERRUPT BIT(37) | 515 | #define PRC_CTRL_BIMODAL_INTERRUPT BIT(37) |
516 | #define PRC_CTRL_GROUP_READS BIT(38) | ||
496 | #define PRC_CTRL_RXD_BACKOFF_INTERVAL(val) vBIT(val,40,24) | 517 | #define PRC_CTRL_RXD_BACKOFF_INTERVAL(val) vBIT(val,40,24) |
497 | 518 | ||
498 | u64 prc_alarm_action; | 519 | u64 prc_alarm_action; |
@@ -541,7 +562,12 @@ typedef struct _XENA_dev_config { | |||
541 | #define RX_PA_CFG_IGNORE_LLC_CTRL BIT(3) | 562 | #define RX_PA_CFG_IGNORE_LLC_CTRL BIT(3) |
542 | #define RX_PA_CFG_IGNORE_L2_ERR BIT(6) | 563 | #define RX_PA_CFG_IGNORE_L2_ERR BIT(6) |
543 | 564 | ||
544 | u8 unused12[0x700 - 0x1D8]; | 565 | u64 unused_11_1; |
566 | |||
567 | u64 ring_bump_counter1; | ||
568 | u64 ring_bump_counter2; | ||
569 | |||
570 | u8 unused12[0x700 - 0x1F0]; | ||
545 | 571 | ||
546 | u64 rxdma_debug_ctrl; | 572 | u64 rxdma_debug_ctrl; |
547 | 573 | ||
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c index 79208f434ac1..cac9fdd2e1d5 100644 --- a/drivers/net/s2io.c +++ b/drivers/net/s2io.c | |||
@@ -26,15 +26,22 @@ | |||
26 | * | 26 | * |
27 | * The module loadable parameters that are supported by the driver and a brief | 27 | * The module loadable parameters that are supported by the driver and a brief |
28 | * explaination of all the variables. | 28 | * explaination of all the variables. |
29 | * | ||
29 | * rx_ring_num : This can be used to program the number of receive rings used | 30 | * rx_ring_num : This can be used to program the number of receive rings used |
30 | * in the driver. | 31 | * in the driver. |
31 | * rx_ring_sz: This defines the number of descriptors each ring can have. This | 32 | * rx_ring_sz: This defines the number of receive blocks each ring can have. |
32 | * is also an array of size 8. | 33 | * This is also an array of size 8. |
33 | * rx_ring_mode: This defines the operation mode of all 8 rings. The valid | 34 | * rx_ring_mode: This defines the operation mode of all 8 rings. The valid |
34 | * values are 1, 2 and 3. | 35 | * values are 1, 2 and 3. |
35 | * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver. | 36 | * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver. |
36 | * tx_fifo_len: This too is an array of 8. Each element defines the number of | 37 | * tx_fifo_len: This too is an array of 8. Each element defines the number of |
37 | * Tx descriptors that can be associated with each corresponding FIFO. | 38 | * Tx descriptors that can be associated with each corresponding FIFO. |
39 | * intr_type: This defines the type of interrupt. The values can be 0(INTA), | ||
40 | * 1(MSI), 2(MSI_X). Default value is '0(INTA)' | ||
41 | * lro: Specifies whether to enable Large Receive Offload (LRO) or not. | ||
42 | * Possible values '1' for enable '0' for disable. Default is '0' | ||
43 | * lro_max_pkts: This parameter defines maximum number of packets can be | ||
44 | * aggregated as a single large packet | ||
38 | ************************************************************************/ | 45 | ************************************************************************/ |
39 | 46 | ||
40 | #include <linux/config.h> | 47 | #include <linux/config.h> |
@@ -70,7 +77,7 @@ | |||
70 | #include "s2io.h" | 77 | #include "s2io.h" |
71 | #include "s2io-regs.h" | 78 | #include "s2io-regs.h" |
72 | 79 | ||
73 | #define DRV_VERSION "2.0.11.2" | 80 | #define DRV_VERSION "2.0.14.2" |
74 | 81 | ||
75 | /* S2io Driver name & version. */ | 82 | /* S2io Driver name & version. */ |
76 | static char s2io_driver_name[] = "Neterion"; | 83 | static char s2io_driver_name[] = "Neterion"; |
@@ -106,18 +113,14 @@ static inline int RXD_IS_UP2DT(RxD_t *rxdp) | |||
106 | #define LOW 2 | 113 | #define LOW 2 |
107 | static inline int rx_buffer_level(nic_t * sp, int rxb_size, int ring) | 114 | static inline int rx_buffer_level(nic_t * sp, int rxb_size, int ring) |
108 | { | 115 | { |
109 | int level = 0; | ||
110 | mac_info_t *mac_control; | 116 | mac_info_t *mac_control; |
111 | 117 | ||
112 | mac_control = &sp->mac_control; | 118 | mac_control = &sp->mac_control; |
113 | if ((mac_control->rings[ring].pkt_cnt - rxb_size) > 16) { | 119 | if (rxb_size <= rxd_count[sp->rxd_mode]) |
114 | level = LOW; | 120 | return PANIC; |
115 | if (rxb_size <= rxd_count[sp->rxd_mode]) { | 121 | else if ((mac_control->rings[ring].pkt_cnt - rxb_size) > 16) |
116 | level = PANIC; | 122 | return LOW; |
117 | } | 123 | return 0; |
118 | } | ||
119 | |||
120 | return level; | ||
121 | } | 124 | } |
122 | 125 | ||
123 | /* Ethtool related variables and Macros. */ | 126 | /* Ethtool related variables and Macros. */ |
@@ -136,7 +139,11 @@ static char ethtool_stats_keys[][ETH_GSTRING_LEN] = { | |||
136 | {"tmac_mcst_frms"}, | 139 | {"tmac_mcst_frms"}, |
137 | {"tmac_bcst_frms"}, | 140 | {"tmac_bcst_frms"}, |
138 | {"tmac_pause_ctrl_frms"}, | 141 | {"tmac_pause_ctrl_frms"}, |
142 | {"tmac_ttl_octets"}, | ||
143 | {"tmac_ucst_frms"}, | ||
144 | {"tmac_nucst_frms"}, | ||
139 | {"tmac_any_err_frms"}, | 145 | {"tmac_any_err_frms"}, |
146 | {"tmac_ttl_less_fb_octets"}, | ||
140 | {"tmac_vld_ip_octets"}, | 147 | {"tmac_vld_ip_octets"}, |
141 | {"tmac_vld_ip"}, | 148 | {"tmac_vld_ip"}, |
142 | {"tmac_drop_ip"}, | 149 | {"tmac_drop_ip"}, |
@@ -151,13 +158,27 @@ static char ethtool_stats_keys[][ETH_GSTRING_LEN] = { | |||
151 | {"rmac_vld_mcst_frms"}, | 158 | {"rmac_vld_mcst_frms"}, |
152 | {"rmac_vld_bcst_frms"}, | 159 | {"rmac_vld_bcst_frms"}, |
153 | {"rmac_in_rng_len_err_frms"}, | 160 | {"rmac_in_rng_len_err_frms"}, |
161 | {"rmac_out_rng_len_err_frms"}, | ||
154 | {"rmac_long_frms"}, | 162 | {"rmac_long_frms"}, |
155 | {"rmac_pause_ctrl_frms"}, | 163 | {"rmac_pause_ctrl_frms"}, |
164 | {"rmac_unsup_ctrl_frms"}, | ||
165 | {"rmac_ttl_octets"}, | ||
166 | {"rmac_accepted_ucst_frms"}, | ||
167 | {"rmac_accepted_nucst_frms"}, | ||
156 | {"rmac_discarded_frms"}, | 168 | {"rmac_discarded_frms"}, |
169 | {"rmac_drop_events"}, | ||
170 | {"rmac_ttl_less_fb_octets"}, | ||
171 | {"rmac_ttl_frms"}, | ||
157 | {"rmac_usized_frms"}, | 172 | {"rmac_usized_frms"}, |
158 | {"rmac_osized_frms"}, | 173 | {"rmac_osized_frms"}, |
159 | {"rmac_frag_frms"}, | 174 | {"rmac_frag_frms"}, |
160 | {"rmac_jabber_frms"}, | 175 | {"rmac_jabber_frms"}, |
176 | {"rmac_ttl_64_frms"}, | ||
177 | {"rmac_ttl_65_127_frms"}, | ||
178 | {"rmac_ttl_128_255_frms"}, | ||
179 | {"rmac_ttl_256_511_frms"}, | ||
180 | {"rmac_ttl_512_1023_frms"}, | ||
181 | {"rmac_ttl_1024_1518_frms"}, | ||
161 | {"rmac_ip"}, | 182 | {"rmac_ip"}, |
162 | {"rmac_ip_octets"}, | 183 | {"rmac_ip_octets"}, |
163 | {"rmac_hdr_err_ip"}, | 184 | {"rmac_hdr_err_ip"}, |
@@ -166,12 +187,82 @@ static char ethtool_stats_keys[][ETH_GSTRING_LEN] = { | |||
166 | {"rmac_tcp"}, | 187 | {"rmac_tcp"}, |
167 | {"rmac_udp"}, | 188 | {"rmac_udp"}, |
168 | {"rmac_err_drp_udp"}, | 189 | {"rmac_err_drp_udp"}, |
190 | {"rmac_xgmii_err_sym"}, | ||
191 | {"rmac_frms_q0"}, | ||
192 | {"rmac_frms_q1"}, | ||
193 | {"rmac_frms_q2"}, | ||
194 | {"rmac_frms_q3"}, | ||
195 | {"rmac_frms_q4"}, | ||
196 | {"rmac_frms_q5"}, | ||
197 | {"rmac_frms_q6"}, | ||
198 | {"rmac_frms_q7"}, | ||
199 | {"rmac_full_q0"}, | ||
200 | {"rmac_full_q1"}, | ||
201 | {"rmac_full_q2"}, | ||
202 | {"rmac_full_q3"}, | ||
203 | {"rmac_full_q4"}, | ||
204 | {"rmac_full_q5"}, | ||
205 | {"rmac_full_q6"}, | ||
206 | {"rmac_full_q7"}, | ||
169 | {"rmac_pause_cnt"}, | 207 | {"rmac_pause_cnt"}, |
208 | {"rmac_xgmii_data_err_cnt"}, | ||
209 | {"rmac_xgmii_ctrl_err_cnt"}, | ||
170 | {"rmac_accepted_ip"}, | 210 | {"rmac_accepted_ip"}, |
171 | {"rmac_err_tcp"}, | 211 | {"rmac_err_tcp"}, |
212 | {"rd_req_cnt"}, | ||
213 | {"new_rd_req_cnt"}, | ||
214 | {"new_rd_req_rtry_cnt"}, | ||
215 | {"rd_rtry_cnt"}, | ||
216 | {"wr_rtry_rd_ack_cnt"}, | ||
217 | {"wr_req_cnt"}, | ||
218 | {"new_wr_req_cnt"}, | ||
219 | {"new_wr_req_rtry_cnt"}, | ||
220 | {"wr_rtry_cnt"}, | ||
221 | {"wr_disc_cnt"}, | ||
222 | {"rd_rtry_wr_ack_cnt"}, | ||
223 | {"txp_wr_cnt"}, | ||
224 | {"txd_rd_cnt"}, | ||
225 | {"txd_wr_cnt"}, | ||
226 | {"rxd_rd_cnt"}, | ||
227 | {"rxd_wr_cnt"}, | ||
228 | {"txf_rd_cnt"}, | ||
229 | {"rxf_wr_cnt"}, | ||
230 | {"rmac_ttl_1519_4095_frms"}, | ||
231 | {"rmac_ttl_4096_8191_frms"}, | ||
232 | {"rmac_ttl_8192_max_frms"}, | ||
233 | {"rmac_ttl_gt_max_frms"}, | ||
234 | {"rmac_osized_alt_frms"}, | ||
235 | {"rmac_jabber_alt_frms"}, | ||
236 | {"rmac_gt_max_alt_frms"}, | ||
237 | {"rmac_vlan_frms"}, | ||
238 | {"rmac_len_discard"}, | ||
239 | {"rmac_fcs_discard"}, | ||
240 | {"rmac_pf_discard"}, | ||
241 | {"rmac_da_discard"}, | ||
242 | {"rmac_red_discard"}, | ||
243 | {"rmac_rts_discard"}, | ||
244 | {"rmac_ingm_full_discard"}, | ||
245 | {"link_fault_cnt"}, | ||
172 | {"\n DRIVER STATISTICS"}, | 246 | {"\n DRIVER STATISTICS"}, |
173 | {"single_bit_ecc_errs"}, | 247 | {"single_bit_ecc_errs"}, |
174 | {"double_bit_ecc_errs"}, | 248 | {"double_bit_ecc_errs"}, |
249 | {"parity_err_cnt"}, | ||
250 | {"serious_err_cnt"}, | ||
251 | {"soft_reset_cnt"}, | ||
252 | {"fifo_full_cnt"}, | ||
253 | {"ring_full_cnt"}, | ||
254 | ("alarm_transceiver_temp_high"), | ||
255 | ("alarm_transceiver_temp_low"), | ||
256 | ("alarm_laser_bias_current_high"), | ||
257 | ("alarm_laser_bias_current_low"), | ||
258 | ("alarm_laser_output_power_high"), | ||
259 | ("alarm_laser_output_power_low"), | ||
260 | ("warn_transceiver_temp_high"), | ||
261 | ("warn_transceiver_temp_low"), | ||
262 | ("warn_laser_bias_current_high"), | ||
263 | ("warn_laser_bias_current_low"), | ||
264 | ("warn_laser_output_power_high"), | ||
265 | ("warn_laser_output_power_low"), | ||
175 | ("lro_aggregated_pkts"), | 266 | ("lro_aggregated_pkts"), |
176 | ("lro_flush_both_count"), | 267 | ("lro_flush_both_count"), |
177 | ("lro_out_of_sequence_pkts"), | 268 | ("lro_out_of_sequence_pkts"), |
@@ -220,9 +311,7 @@ static void s2io_vlan_rx_kill_vid(struct net_device *dev, unsigned long vid) | |||
220 | * the XAUI. | 311 | * the XAUI. |
221 | */ | 312 | */ |
222 | 313 | ||
223 | #define SWITCH_SIGN 0xA5A5A5A5A5A5A5A5ULL | ||
224 | #define END_SIGN 0x0 | 314 | #define END_SIGN 0x0 |
225 | |||
226 | static const u64 herc_act_dtx_cfg[] = { | 315 | static const u64 herc_act_dtx_cfg[] = { |
227 | /* Set address */ | 316 | /* Set address */ |
228 | 0x8000051536750000ULL, 0x80000515367500E0ULL, | 317 | 0x8000051536750000ULL, 0x80000515367500E0ULL, |
@@ -244,37 +333,19 @@ static const u64 herc_act_dtx_cfg[] = { | |||
244 | END_SIGN | 333 | END_SIGN |
245 | }; | 334 | }; |
246 | 335 | ||
247 | static const u64 xena_mdio_cfg[] = { | ||
248 | /* Reset PMA PLL */ | ||
249 | 0xC001010000000000ULL, 0xC0010100000000E0ULL, | ||
250 | 0xC0010100008000E4ULL, | ||
251 | /* Remove Reset from PMA PLL */ | ||
252 | 0xC001010000000000ULL, 0xC0010100000000E0ULL, | ||
253 | 0xC0010100000000E4ULL, | ||
254 | END_SIGN | ||
255 | }; | ||
256 | |||
257 | static const u64 xena_dtx_cfg[] = { | 336 | static const u64 xena_dtx_cfg[] = { |
337 | /* Set address */ | ||
258 | 0x8000051500000000ULL, 0x80000515000000E0ULL, | 338 | 0x8000051500000000ULL, 0x80000515000000E0ULL, |
259 | 0x80000515D93500E4ULL, 0x8001051500000000ULL, | 339 | /* Write data */ |
260 | 0x80010515000000E0ULL, 0x80010515001E00E4ULL, | 340 | 0x80000515D9350004ULL, 0x80000515D93500E4ULL, |
261 | 0x8002051500000000ULL, 0x80020515000000E0ULL, | 341 | /* Set address */ |
262 | 0x80020515F21000E4ULL, | 342 | 0x8001051500000000ULL, 0x80010515000000E0ULL, |
263 | /* Set PADLOOPBACKN */ | 343 | /* Write data */ |
264 | 0x8002051500000000ULL, 0x80020515000000E0ULL, | 344 | 0x80010515001E0004ULL, 0x80010515001E00E4ULL, |
265 | 0x80020515B20000E4ULL, 0x8003051500000000ULL, | 345 | /* Set address */ |
266 | 0x80030515000000E0ULL, 0x80030515B20000E4ULL, | ||
267 | 0x8004051500000000ULL, 0x80040515000000E0ULL, | ||
268 | 0x80040515B20000E4ULL, 0x8005051500000000ULL, | ||
269 | 0x80050515000000E0ULL, 0x80050515B20000E4ULL, | ||
270 | SWITCH_SIGN, | ||
271 | /* Remove PADLOOPBACKN */ | ||
272 | 0x8002051500000000ULL, 0x80020515000000E0ULL, | 346 | 0x8002051500000000ULL, 0x80020515000000E0ULL, |
273 | 0x80020515F20000E4ULL, 0x8003051500000000ULL, | 347 | /* Write data */ |
274 | 0x80030515000000E0ULL, 0x80030515F20000E4ULL, | 348 | 0x80020515F2100004ULL, 0x80020515F21000E4ULL, |
275 | 0x8004051500000000ULL, 0x80040515000000E0ULL, | ||
276 | 0x80040515F20000E4ULL, 0x8005051500000000ULL, | ||
277 | 0x80050515000000E0ULL, 0x80050515F20000E4ULL, | ||
278 | END_SIGN | 349 | END_SIGN |
279 | }; | 350 | }; |
280 | 351 | ||
@@ -303,15 +374,15 @@ static const u64 fix_mac[] = { | |||
303 | /* Module Loadable parameters. */ | 374 | /* Module Loadable parameters. */ |
304 | static unsigned int tx_fifo_num = 1; | 375 | static unsigned int tx_fifo_num = 1; |
305 | static unsigned int tx_fifo_len[MAX_TX_FIFOS] = | 376 | static unsigned int tx_fifo_len[MAX_TX_FIFOS] = |
306 | {[0 ...(MAX_TX_FIFOS - 1)] = 0 }; | 377 | {DEFAULT_FIFO_0_LEN, [1 ...(MAX_TX_FIFOS - 1)] = DEFAULT_FIFO_1_7_LEN}; |
307 | static unsigned int rx_ring_num = 1; | 378 | static unsigned int rx_ring_num = 1; |
308 | static unsigned int rx_ring_sz[MAX_RX_RINGS] = | 379 | static unsigned int rx_ring_sz[MAX_RX_RINGS] = |
309 | {[0 ...(MAX_RX_RINGS - 1)] = 0 }; | 380 | {[0 ...(MAX_RX_RINGS - 1)] = SMALL_BLK_CNT}; |
310 | static unsigned int rts_frm_len[MAX_RX_RINGS] = | 381 | static unsigned int rts_frm_len[MAX_RX_RINGS] = |
311 | {[0 ...(MAX_RX_RINGS - 1)] = 0 }; | 382 | {[0 ...(MAX_RX_RINGS - 1)] = 0 }; |
312 | static unsigned int rx_ring_mode = 1; | 383 | static unsigned int rx_ring_mode = 1; |
313 | static unsigned int use_continuous_tx_intrs = 1; | 384 | static unsigned int use_continuous_tx_intrs = 1; |
314 | static unsigned int rmac_pause_time = 65535; | 385 | static unsigned int rmac_pause_time = 0x100; |
315 | static unsigned int mc_pause_threshold_q0q3 = 187; | 386 | static unsigned int mc_pause_threshold_q0q3 = 187; |
316 | static unsigned int mc_pause_threshold_q4q7 = 187; | 387 | static unsigned int mc_pause_threshold_q4q7 = 187; |
317 | static unsigned int shared_splits; | 388 | static unsigned int shared_splits; |
@@ -549,11 +620,6 @@ static int init_shared_mem(struct s2io_nic *nic) | |||
549 | rx_blocks->block_dma_addr + | 620 | rx_blocks->block_dma_addr + |
550 | (rxd_size[nic->rxd_mode] * l); | 621 | (rxd_size[nic->rxd_mode] * l); |
551 | } | 622 | } |
552 | |||
553 | mac_control->rings[i].rx_blocks[j].block_virt_addr = | ||
554 | tmp_v_addr; | ||
555 | mac_control->rings[i].rx_blocks[j].block_dma_addr = | ||
556 | tmp_p_addr; | ||
557 | } | 623 | } |
558 | /* Interlinking all Rx Blocks */ | 624 | /* Interlinking all Rx Blocks */ |
559 | for (j = 0; j < blk_cnt; j++) { | 625 | for (j = 0; j < blk_cnt; j++) { |
@@ -772,7 +838,21 @@ static int s2io_verify_pci_mode(nic_t *nic) | |||
772 | return mode; | 838 | return mode; |
773 | } | 839 | } |
774 | 840 | ||
841 | #define NEC_VENID 0x1033 | ||
842 | #define NEC_DEVID 0x0125 | ||
843 | static int s2io_on_nec_bridge(struct pci_dev *s2io_pdev) | ||
844 | { | ||
845 | struct pci_dev *tdev = NULL; | ||
846 | while ((tdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, tdev)) != NULL) { | ||
847 | if ((tdev->vendor == NEC_VENID) && (tdev->device == NEC_DEVID)){ | ||
848 | if (tdev->bus == s2io_pdev->bus->parent) | ||
849 | return 1; | ||
850 | } | ||
851 | } | ||
852 | return 0; | ||
853 | } | ||
775 | 854 | ||
855 | static int bus_speed[8] = {33, 133, 133, 200, 266, 133, 200, 266}; | ||
776 | /** | 856 | /** |
777 | * s2io_print_pci_mode - | 857 | * s2io_print_pci_mode - |
778 | */ | 858 | */ |
@@ -789,6 +869,14 @@ static int s2io_print_pci_mode(nic_t *nic) | |||
789 | if ( val64 & PCI_MODE_UNKNOWN_MODE) | 869 | if ( val64 & PCI_MODE_UNKNOWN_MODE) |
790 | return -1; /* Unknown PCI mode */ | 870 | return -1; /* Unknown PCI mode */ |
791 | 871 | ||
872 | config->bus_speed = bus_speed[mode]; | ||
873 | |||
874 | if (s2io_on_nec_bridge(nic->pdev)) { | ||
875 | DBG_PRINT(ERR_DBG, "%s: Device is on PCI-E bus\n", | ||
876 | nic->dev->name); | ||
877 | return mode; | ||
878 | } | ||
879 | |||
792 | if (val64 & PCI_MODE_32_BITS) { | 880 | if (val64 & PCI_MODE_32_BITS) { |
793 | DBG_PRINT(ERR_DBG, "%s: Device is on 32 bit ", nic->dev->name); | 881 | DBG_PRINT(ERR_DBG, "%s: Device is on 32 bit ", nic->dev->name); |
794 | } else { | 882 | } else { |
@@ -798,35 +886,27 @@ static int s2io_print_pci_mode(nic_t *nic) | |||
798 | switch(mode) { | 886 | switch(mode) { |
799 | case PCI_MODE_PCI_33: | 887 | case PCI_MODE_PCI_33: |
800 | DBG_PRINT(ERR_DBG, "33MHz PCI bus\n"); | 888 | DBG_PRINT(ERR_DBG, "33MHz PCI bus\n"); |
801 | config->bus_speed = 33; | ||
802 | break; | 889 | break; |
803 | case PCI_MODE_PCI_66: | 890 | case PCI_MODE_PCI_66: |
804 | DBG_PRINT(ERR_DBG, "66MHz PCI bus\n"); | 891 | DBG_PRINT(ERR_DBG, "66MHz PCI bus\n"); |
805 | config->bus_speed = 133; | ||
806 | break; | 892 | break; |
807 | case PCI_MODE_PCIX_M1_66: | 893 | case PCI_MODE_PCIX_M1_66: |
808 | DBG_PRINT(ERR_DBG, "66MHz PCIX(M1) bus\n"); | 894 | DBG_PRINT(ERR_DBG, "66MHz PCIX(M1) bus\n"); |
809 | config->bus_speed = 133; /* Herc doubles the clock rate */ | ||
810 | break; | 895 | break; |
811 | case PCI_MODE_PCIX_M1_100: | 896 | case PCI_MODE_PCIX_M1_100: |
812 | DBG_PRINT(ERR_DBG, "100MHz PCIX(M1) bus\n"); | 897 | DBG_PRINT(ERR_DBG, "100MHz PCIX(M1) bus\n"); |
813 | config->bus_speed = 200; | ||
814 | break; | 898 | break; |
815 | case PCI_MODE_PCIX_M1_133: | 899 | case PCI_MODE_PCIX_M1_133: |
816 | DBG_PRINT(ERR_DBG, "133MHz PCIX(M1) bus\n"); | 900 | DBG_PRINT(ERR_DBG, "133MHz PCIX(M1) bus\n"); |
817 | config->bus_speed = 266; | ||
818 | break; | 901 | break; |
819 | case PCI_MODE_PCIX_M2_66: | 902 | case PCI_MODE_PCIX_M2_66: |
820 | DBG_PRINT(ERR_DBG, "133MHz PCIX(M2) bus\n"); | 903 | DBG_PRINT(ERR_DBG, "133MHz PCIX(M2) bus\n"); |
821 | config->bus_speed = 133; | ||
822 | break; | 904 | break; |
823 | case PCI_MODE_PCIX_M2_100: | 905 | case PCI_MODE_PCIX_M2_100: |
824 | DBG_PRINT(ERR_DBG, "200MHz PCIX(M2) bus\n"); | 906 | DBG_PRINT(ERR_DBG, "200MHz PCIX(M2) bus\n"); |
825 | config->bus_speed = 200; | ||
826 | break; | 907 | break; |
827 | case PCI_MODE_PCIX_M2_133: | 908 | case PCI_MODE_PCIX_M2_133: |
828 | DBG_PRINT(ERR_DBG, "266MHz PCIX(M2) bus\n"); | 909 | DBG_PRINT(ERR_DBG, "266MHz PCIX(M2) bus\n"); |
829 | config->bus_speed = 266; | ||
830 | break; | 910 | break; |
831 | default: | 911 | default: |
832 | return -1; /* Unsupported bus speed */ | 912 | return -1; /* Unsupported bus speed */ |
@@ -854,7 +934,7 @@ static int init_nic(struct s2io_nic *nic) | |||
854 | int i, j; | 934 | int i, j; |
855 | mac_info_t *mac_control; | 935 | mac_info_t *mac_control; |
856 | struct config_param *config; | 936 | struct config_param *config; |
857 | int mdio_cnt = 0, dtx_cnt = 0; | 937 | int dtx_cnt = 0; |
858 | unsigned long long mem_share; | 938 | unsigned long long mem_share; |
859 | int mem_size; | 939 | int mem_size; |
860 | 940 | ||
@@ -901,20 +981,6 @@ static int init_nic(struct s2io_nic *nic) | |||
901 | val64 = dev->mtu; | 981 | val64 = dev->mtu; |
902 | writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); | 982 | writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); |
903 | 983 | ||
904 | /* | ||
905 | * Configuring the XAUI Interface of Xena. | ||
906 | * *************************************** | ||
907 | * To Configure the Xena's XAUI, one has to write a series | ||
908 | * of 64 bit values into two registers in a particular | ||
909 | * sequence. Hence a macro 'SWITCH_SIGN' has been defined | ||
910 | * which will be defined in the array of configuration values | ||
911 | * (xena_dtx_cfg & xena_mdio_cfg) at appropriate places | ||
912 | * to switch writing from one regsiter to another. We continue | ||
913 | * writing these values until we encounter the 'END_SIGN' macro. | ||
914 | * For example, After making a series of 21 writes into | ||
915 | * dtx_control register the 'SWITCH_SIGN' appears and hence we | ||
916 | * start writing into mdio_control until we encounter END_SIGN. | ||
917 | */ | ||
918 | if (nic->device_type & XFRAME_II_DEVICE) { | 984 | if (nic->device_type & XFRAME_II_DEVICE) { |
919 | while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) { | 985 | while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) { |
920 | SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt], | 986 | SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt], |
@@ -924,35 +990,11 @@ static int init_nic(struct s2io_nic *nic) | |||
924 | dtx_cnt++; | 990 | dtx_cnt++; |
925 | } | 991 | } |
926 | } else { | 992 | } else { |
927 | while (1) { | 993 | while (xena_dtx_cfg[dtx_cnt] != END_SIGN) { |
928 | dtx_cfg: | 994 | SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt], |
929 | while (xena_dtx_cfg[dtx_cnt] != END_SIGN) { | 995 | &bar0->dtx_control, UF); |
930 | if (xena_dtx_cfg[dtx_cnt] == SWITCH_SIGN) { | 996 | val64 = readq(&bar0->dtx_control); |
931 | dtx_cnt++; | 997 | dtx_cnt++; |
932 | goto mdio_cfg; | ||
933 | } | ||
934 | SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt], | ||
935 | &bar0->dtx_control, UF); | ||
936 | val64 = readq(&bar0->dtx_control); | ||
937 | dtx_cnt++; | ||
938 | } | ||
939 | mdio_cfg: | ||
940 | while (xena_mdio_cfg[mdio_cnt] != END_SIGN) { | ||
941 | if (xena_mdio_cfg[mdio_cnt] == SWITCH_SIGN) { | ||
942 | mdio_cnt++; | ||
943 | goto dtx_cfg; | ||
944 | } | ||
945 | SPECIAL_REG_WRITE(xena_mdio_cfg[mdio_cnt], | ||
946 | &bar0->mdio_control, UF); | ||
947 | val64 = readq(&bar0->mdio_control); | ||
948 | mdio_cnt++; | ||
949 | } | ||
950 | if ((xena_dtx_cfg[dtx_cnt] == END_SIGN) && | ||
951 | (xena_mdio_cfg[mdio_cnt] == END_SIGN)) { | ||
952 | break; | ||
953 | } else { | ||
954 | goto dtx_cfg; | ||
955 | } | ||
956 | } | 998 | } |
957 | } | 999 | } |
958 | 1000 | ||
@@ -994,11 +1036,6 @@ static int init_nic(struct s2io_nic *nic) | |||
994 | } | 1036 | } |
995 | } | 1037 | } |
996 | 1038 | ||
997 | /* Enable Tx FIFO partition 0. */ | ||
998 | val64 = readq(&bar0->tx_fifo_partition_0); | ||
999 | val64 |= BIT(0); /* To enable the FIFO partition. */ | ||
1000 | writeq(val64, &bar0->tx_fifo_partition_0); | ||
1001 | |||
1002 | /* | 1039 | /* |
1003 | * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug | 1040 | * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug |
1004 | * SXE-008 TRANSMIT DMA ARBITRATION ISSUE. | 1041 | * SXE-008 TRANSMIT DMA ARBITRATION ISSUE. |
@@ -1177,6 +1214,11 @@ static int init_nic(struct s2io_nic *nic) | |||
1177 | break; | 1214 | break; |
1178 | } | 1215 | } |
1179 | 1216 | ||
1217 | /* Enable Tx FIFO partition 0. */ | ||
1218 | val64 = readq(&bar0->tx_fifo_partition_0); | ||
1219 | val64 |= (TX_FIFO_PARTITION_EN); | ||
1220 | writeq(val64, &bar0->tx_fifo_partition_0); | ||
1221 | |||
1180 | /* Filling the Rx round robin registers as per the | 1222 | /* Filling the Rx round robin registers as per the |
1181 | * number of Rings and steering based on QoS. | 1223 | * number of Rings and steering based on QoS. |
1182 | */ | 1224 | */ |
@@ -1545,19 +1587,26 @@ static int init_nic(struct s2io_nic *nic) | |||
1545 | val64 |= PIC_CNTL_SHARED_SPLITS(shared_splits); | 1587 | val64 |= PIC_CNTL_SHARED_SPLITS(shared_splits); |
1546 | writeq(val64, &bar0->pic_control); | 1588 | writeq(val64, &bar0->pic_control); |
1547 | 1589 | ||
1590 | if (nic->config.bus_speed == 266) { | ||
1591 | writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout); | ||
1592 | writeq(0x0, &bar0->read_retry_delay); | ||
1593 | writeq(0x0, &bar0->write_retry_delay); | ||
1594 | } | ||
1595 | |||
1548 | /* | 1596 | /* |
1549 | * Programming the Herc to split every write transaction | 1597 | * Programming the Herc to split every write transaction |
1550 | * that does not start on an ADB to reduce disconnects. | 1598 | * that does not start on an ADB to reduce disconnects. |
1551 | */ | 1599 | */ |
1552 | if (nic->device_type == XFRAME_II_DEVICE) { | 1600 | if (nic->device_type == XFRAME_II_DEVICE) { |
1553 | val64 = WREQ_SPLIT_MASK_SET_MASK(255); | 1601 | val64 = EXT_REQ_EN | MISC_LINK_STABILITY_PRD(3); |
1554 | writeq(val64, &bar0->wreq_split_mask); | ||
1555 | } | ||
1556 | |||
1557 | /* Setting Link stability period to 64 ms */ | ||
1558 | if (nic->device_type == XFRAME_II_DEVICE) { | ||
1559 | val64 = MISC_LINK_STABILITY_PRD(3); | ||
1560 | writeq(val64, &bar0->misc_control); | 1602 | writeq(val64, &bar0->misc_control); |
1603 | val64 = readq(&bar0->pic_control2); | ||
1604 | val64 &= ~(BIT(13)|BIT(14)|BIT(15)); | ||
1605 | writeq(val64, &bar0->pic_control2); | ||
1606 | } | ||
1607 | if (strstr(nic->product_name, "CX4")) { | ||
1608 | val64 = TMAC_AVG_IPG(0x17); | ||
1609 | writeq(val64, &bar0->tmac_avg_ipg); | ||
1561 | } | 1610 | } |
1562 | 1611 | ||
1563 | return SUCCESS; | 1612 | return SUCCESS; |
@@ -1948,6 +1997,10 @@ static int start_nic(struct s2io_nic *nic) | |||
1948 | val64 |= PRC_CTRL_RC_ENABLED; | 1997 | val64 |= PRC_CTRL_RC_ENABLED; |
1949 | else | 1998 | else |
1950 | val64 |= PRC_CTRL_RC_ENABLED | PRC_CTRL_RING_MODE_3; | 1999 | val64 |= PRC_CTRL_RC_ENABLED | PRC_CTRL_RING_MODE_3; |
2000 | if (nic->device_type == XFRAME_II_DEVICE) | ||
2001 | val64 |= PRC_CTRL_GROUP_READS; | ||
2002 | val64 &= ~PRC_CTRL_RXD_BACKOFF_INTERVAL(0xFFFFFF); | ||
2003 | val64 |= PRC_CTRL_RXD_BACKOFF_INTERVAL(0x1000); | ||
1951 | writeq(val64, &bar0->prc_ctrl_n[i]); | 2004 | writeq(val64, &bar0->prc_ctrl_n[i]); |
1952 | } | 2005 | } |
1953 | 2006 | ||
@@ -2018,6 +2071,13 @@ static int start_nic(struct s2io_nic *nic) | |||
2018 | val64 |= ADAPTER_EOI_TX_ON; | 2071 | val64 |= ADAPTER_EOI_TX_ON; |
2019 | writeq(val64, &bar0->adapter_control); | 2072 | writeq(val64, &bar0->adapter_control); |
2020 | 2073 | ||
2074 | if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) { | ||
2075 | /* | ||
2076 | * Dont see link state interrupts initally on some switches, | ||
2077 | * so directly scheduling the link state task here. | ||
2078 | */ | ||
2079 | schedule_work(&nic->set_link_task); | ||
2080 | } | ||
2021 | /* SXE-002: Initialize link and activity LED */ | 2081 | /* SXE-002: Initialize link and activity LED */ |
2022 | subid = nic->pdev->subsystem_device; | 2082 | subid = nic->pdev->subsystem_device; |
2023 | if (((subid & 0xFF) >= 0x07) && | 2083 | if (((subid & 0xFF) >= 0x07) && |
@@ -2029,12 +2089,6 @@ static int start_nic(struct s2io_nic *nic) | |||
2029 | writeq(val64, (void __iomem *)bar0 + 0x2700); | 2089 | writeq(val64, (void __iomem *)bar0 + 0x2700); |
2030 | } | 2090 | } |
2031 | 2091 | ||
2032 | /* | ||
2033 | * Don't see link state interrupts on certain switches, so | ||
2034 | * directly scheduling a link state task from here. | ||
2035 | */ | ||
2036 | schedule_work(&nic->set_link_task); | ||
2037 | |||
2038 | return SUCCESS; | 2092 | return SUCCESS; |
2039 | } | 2093 | } |
2040 | /** | 2094 | /** |
@@ -2134,7 +2188,7 @@ static void stop_nic(struct s2io_nic *nic) | |||
2134 | { | 2188 | { |
2135 | XENA_dev_config_t __iomem *bar0 = nic->bar0; | 2189 | XENA_dev_config_t __iomem *bar0 = nic->bar0; |
2136 | register u64 val64 = 0; | 2190 | register u64 val64 = 0; |
2137 | u16 interruptible, i; | 2191 | u16 interruptible; |
2138 | mac_info_t *mac_control; | 2192 | mac_info_t *mac_control; |
2139 | struct config_param *config; | 2193 | struct config_param *config; |
2140 | 2194 | ||
@@ -2147,12 +2201,10 @@ static void stop_nic(struct s2io_nic *nic) | |||
2147 | interruptible |= TX_MAC_INTR | RX_MAC_INTR; | 2201 | interruptible |= TX_MAC_INTR | RX_MAC_INTR; |
2148 | en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS); | 2202 | en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS); |
2149 | 2203 | ||
2150 | /* Disable PRCs */ | 2204 | /* Clearing Adapter_En bit of ADAPTER_CONTROL Register */ |
2151 | for (i = 0; i < config->rx_ring_num; i++) { | 2205 | val64 = readq(&bar0->adapter_control); |
2152 | val64 = readq(&bar0->prc_ctrl_n[i]); | 2206 | val64 &= ~(ADAPTER_CNTL_EN); |
2153 | val64 &= ~((u64) PRC_CTRL_RC_ENABLED); | 2207 | writeq(val64, &bar0->adapter_control); |
2154 | writeq(val64, &bar0->prc_ctrl_n[i]); | ||
2155 | } | ||
2156 | } | 2208 | } |
2157 | 2209 | ||
2158 | static int fill_rxd_3buf(nic_t *nic, RxD_t *rxdp, struct sk_buff *skb) | 2210 | static int fill_rxd_3buf(nic_t *nic, RxD_t *rxdp, struct sk_buff *skb) |
@@ -2231,13 +2283,12 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no) | |||
2231 | alloc_cnt = mac_control->rings[ring_no].pkt_cnt - | 2283 | alloc_cnt = mac_control->rings[ring_no].pkt_cnt - |
2232 | atomic_read(&nic->rx_bufs_left[ring_no]); | 2284 | atomic_read(&nic->rx_bufs_left[ring_no]); |
2233 | 2285 | ||
2286 | block_no1 = mac_control->rings[ring_no].rx_curr_get_info.block_index; | ||
2287 | off1 = mac_control->rings[ring_no].rx_curr_get_info.offset; | ||
2234 | while (alloc_tab < alloc_cnt) { | 2288 | while (alloc_tab < alloc_cnt) { |
2235 | block_no = mac_control->rings[ring_no].rx_curr_put_info. | 2289 | block_no = mac_control->rings[ring_no].rx_curr_put_info. |
2236 | block_index; | 2290 | block_index; |
2237 | block_no1 = mac_control->rings[ring_no].rx_curr_get_info. | ||
2238 | block_index; | ||
2239 | off = mac_control->rings[ring_no].rx_curr_put_info.offset; | 2291 | off = mac_control->rings[ring_no].rx_curr_put_info.offset; |
2240 | off1 = mac_control->rings[ring_no].rx_curr_get_info.offset; | ||
2241 | 2292 | ||
2242 | rxdp = mac_control->rings[ring_no]. | 2293 | rxdp = mac_control->rings[ring_no]. |
2243 | rx_blocks[block_no].rxds[off].virt_addr; | 2294 | rx_blocks[block_no].rxds[off].virt_addr; |
@@ -2307,9 +2358,9 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no) | |||
2307 | memset(rxdp, 0, sizeof(RxD1_t)); | 2358 | memset(rxdp, 0, sizeof(RxD1_t)); |
2308 | skb_reserve(skb, NET_IP_ALIGN); | 2359 | skb_reserve(skb, NET_IP_ALIGN); |
2309 | ((RxD1_t*)rxdp)->Buffer0_ptr = pci_map_single | 2360 | ((RxD1_t*)rxdp)->Buffer0_ptr = pci_map_single |
2310 | (nic->pdev, skb->data, size, PCI_DMA_FROMDEVICE); | 2361 | (nic->pdev, skb->data, size - NET_IP_ALIGN, |
2311 | rxdp->Control_2 &= (~MASK_BUFFER0_SIZE_1); | 2362 | PCI_DMA_FROMDEVICE); |
2312 | rxdp->Control_2 |= SET_BUFFER0_SIZE_1(size); | 2363 | rxdp->Control_2 = SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN); |
2313 | 2364 | ||
2314 | } else if (nic->rxd_mode >= RXD_MODE_3A) { | 2365 | } else if (nic->rxd_mode >= RXD_MODE_3A) { |
2315 | /* | 2366 | /* |
@@ -2516,7 +2567,7 @@ static int s2io_poll(struct net_device *dev, int *budget) | |||
2516 | mac_info_t *mac_control; | 2567 | mac_info_t *mac_control; |
2517 | struct config_param *config; | 2568 | struct config_param *config; |
2518 | XENA_dev_config_t __iomem *bar0 = nic->bar0; | 2569 | XENA_dev_config_t __iomem *bar0 = nic->bar0; |
2519 | u64 val64; | 2570 | u64 val64 = 0xFFFFFFFFFFFFFFFFULL; |
2520 | int i; | 2571 | int i; |
2521 | 2572 | ||
2522 | atomic_inc(&nic->isr_cnt); | 2573 | atomic_inc(&nic->isr_cnt); |
@@ -2528,8 +2579,8 @@ static int s2io_poll(struct net_device *dev, int *budget) | |||
2528 | nic->pkts_to_process = dev->quota; | 2579 | nic->pkts_to_process = dev->quota; |
2529 | org_pkts_to_process = nic->pkts_to_process; | 2580 | org_pkts_to_process = nic->pkts_to_process; |
2530 | 2581 | ||
2531 | val64 = readq(&bar0->rx_traffic_int); | ||
2532 | writeq(val64, &bar0->rx_traffic_int); | 2582 | writeq(val64, &bar0->rx_traffic_int); |
2583 | val64 = readl(&bar0->rx_traffic_int); | ||
2533 | 2584 | ||
2534 | for (i = 0; i < config->rx_ring_num; i++) { | 2585 | for (i = 0; i < config->rx_ring_num; i++) { |
2535 | rx_intr_handler(&mac_control->rings[i]); | 2586 | rx_intr_handler(&mac_control->rings[i]); |
@@ -2554,7 +2605,8 @@ static int s2io_poll(struct net_device *dev, int *budget) | |||
2554 | } | 2605 | } |
2555 | } | 2606 | } |
2556 | /* Re enable the Rx interrupts. */ | 2607 | /* Re enable the Rx interrupts. */ |
2557 | en_dis_able_nic_intrs(nic, RX_TRAFFIC_INTR, ENABLE_INTRS); | 2608 | writeq(0x0, &bar0->rx_traffic_mask); |
2609 | val64 = readl(&bar0->rx_traffic_mask); | ||
2558 | atomic_dec(&nic->isr_cnt); | 2610 | atomic_dec(&nic->isr_cnt); |
2559 | return 0; | 2611 | return 0; |
2560 | 2612 | ||
@@ -2666,6 +2718,7 @@ static void rx_intr_handler(ring_info_t *ring_data) | |||
2666 | ((RxD3_t*)rxdp)->Buffer2_ptr, | 2718 | ((RxD3_t*)rxdp)->Buffer2_ptr, |
2667 | dev->mtu, PCI_DMA_FROMDEVICE); | 2719 | dev->mtu, PCI_DMA_FROMDEVICE); |
2668 | } | 2720 | } |
2721 | prefetch(skb->data); | ||
2669 | rx_osm_handler(ring_data, rxdp); | 2722 | rx_osm_handler(ring_data, rxdp); |
2670 | get_info.offset++; | 2723 | get_info.offset++; |
2671 | ring_data->rx_curr_get_info.offset = get_info.offset; | 2724 | ring_data->rx_curr_get_info.offset = get_info.offset; |
@@ -2737,6 +2790,10 @@ static void tx_intr_handler(fifo_info_t *fifo_data) | |||
2737 | if (txdlp->Control_1 & TXD_T_CODE) { | 2790 | if (txdlp->Control_1 & TXD_T_CODE) { |
2738 | unsigned long long err; | 2791 | unsigned long long err; |
2739 | err = txdlp->Control_1 & TXD_T_CODE; | 2792 | err = txdlp->Control_1 & TXD_T_CODE; |
2793 | if (err & 0x1) { | ||
2794 | nic->mac_control.stats_info->sw_stat. | ||
2795 | parity_err_cnt++; | ||
2796 | } | ||
2740 | if ((err >> 48) == 0xA) { | 2797 | if ((err >> 48) == 0xA) { |
2741 | DBG_PRINT(TX_DBG, "TxD returned due \ | 2798 | DBG_PRINT(TX_DBG, "TxD returned due \ |
2742 | to loss of link\n"); | 2799 | to loss of link\n"); |
@@ -2760,7 +2817,8 @@ to loss of link\n"); | |||
2760 | dev_kfree_skb_irq(skb); | 2817 | dev_kfree_skb_irq(skb); |
2761 | 2818 | ||
2762 | get_info.offset++; | 2819 | get_info.offset++; |
2763 | get_info.offset %= get_info.fifo_len + 1; | 2820 | if (get_info.offset == get_info.fifo_len + 1) |
2821 | get_info.offset = 0; | ||
2764 | txdlp = (TxD_t *) fifo_data->list_info | 2822 | txdlp = (TxD_t *) fifo_data->list_info |
2765 | [get_info.offset].list_virt_addr; | 2823 | [get_info.offset].list_virt_addr; |
2766 | fifo_data->tx_curr_get_info.offset = | 2824 | fifo_data->tx_curr_get_info.offset = |
@@ -2774,6 +2832,256 @@ to loss of link\n"); | |||
2774 | } | 2832 | } |
2775 | 2833 | ||
2776 | /** | 2834 | /** |
2835 | * s2io_mdio_write - Function to write in to MDIO registers | ||
2836 | * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS) | ||
2837 | * @addr : address value | ||
2838 | * @value : data value | ||
2839 | * @dev : pointer to net_device structure | ||
2840 | * Description: | ||
2841 | * This function is used to write values to the MDIO registers | ||
2842 | * NONE | ||
2843 | */ | ||
2844 | static void s2io_mdio_write(u32 mmd_type, u64 addr, u16 value, struct net_device *dev) | ||
2845 | { | ||
2846 | u64 val64 = 0x0; | ||
2847 | nic_t *sp = dev->priv; | ||
2848 | XENA_dev_config_t *bar0 = (XENA_dev_config_t *)sp->bar0; | ||
2849 | |||
2850 | //address transaction | ||
2851 | val64 = val64 | MDIO_MMD_INDX_ADDR(addr) | ||
2852 | | MDIO_MMD_DEV_ADDR(mmd_type) | ||
2853 | | MDIO_MMS_PRT_ADDR(0x0); | ||
2854 | writeq(val64, &bar0->mdio_control); | ||
2855 | val64 = val64 | MDIO_CTRL_START_TRANS(0xE); | ||
2856 | writeq(val64, &bar0->mdio_control); | ||
2857 | udelay(100); | ||
2858 | |||
2859 | //Data transaction | ||
2860 | val64 = 0x0; | ||
2861 | val64 = val64 | MDIO_MMD_INDX_ADDR(addr) | ||
2862 | | MDIO_MMD_DEV_ADDR(mmd_type) | ||
2863 | | MDIO_MMS_PRT_ADDR(0x0) | ||
2864 | | MDIO_MDIO_DATA(value) | ||
2865 | | MDIO_OP(MDIO_OP_WRITE_TRANS); | ||
2866 | writeq(val64, &bar0->mdio_control); | ||
2867 | val64 = val64 | MDIO_CTRL_START_TRANS(0xE); | ||
2868 | writeq(val64, &bar0->mdio_control); | ||
2869 | udelay(100); | ||
2870 | |||
2871 | val64 = 0x0; | ||
2872 | val64 = val64 | MDIO_MMD_INDX_ADDR(addr) | ||
2873 | | MDIO_MMD_DEV_ADDR(mmd_type) | ||
2874 | | MDIO_MMS_PRT_ADDR(0x0) | ||
2875 | | MDIO_OP(MDIO_OP_READ_TRANS); | ||
2876 | writeq(val64, &bar0->mdio_control); | ||
2877 | val64 = val64 | MDIO_CTRL_START_TRANS(0xE); | ||
2878 | writeq(val64, &bar0->mdio_control); | ||
2879 | udelay(100); | ||
2880 | |||
2881 | } | ||
2882 | |||
2883 | /** | ||
2884 | * s2io_mdio_read - Function to write in to MDIO registers | ||
2885 | * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS) | ||
2886 | * @addr : address value | ||
2887 | * @dev : pointer to net_device structure | ||
2888 | * Description: | ||
2889 | * This function is used to read values to the MDIO registers | ||
2890 | * NONE | ||
2891 | */ | ||
2892 | static u64 s2io_mdio_read(u32 mmd_type, u64 addr, struct net_device *dev) | ||
2893 | { | ||
2894 | u64 val64 = 0x0; | ||
2895 | u64 rval64 = 0x0; | ||
2896 | nic_t *sp = dev->priv; | ||
2897 | XENA_dev_config_t *bar0 = (XENA_dev_config_t *)sp->bar0; | ||
2898 | |||
2899 | /* address transaction */ | ||
2900 | val64 = val64 | MDIO_MMD_INDX_ADDR(addr) | ||
2901 | | MDIO_MMD_DEV_ADDR(mmd_type) | ||
2902 | | MDIO_MMS_PRT_ADDR(0x0); | ||
2903 | writeq(val64, &bar0->mdio_control); | ||
2904 | val64 = val64 | MDIO_CTRL_START_TRANS(0xE); | ||
2905 | writeq(val64, &bar0->mdio_control); | ||
2906 | udelay(100); | ||
2907 | |||
2908 | /* Data transaction */ | ||
2909 | val64 = 0x0; | ||
2910 | val64 = val64 | MDIO_MMD_INDX_ADDR(addr) | ||
2911 | | MDIO_MMD_DEV_ADDR(mmd_type) | ||
2912 | | MDIO_MMS_PRT_ADDR(0x0) | ||
2913 | | MDIO_OP(MDIO_OP_READ_TRANS); | ||
2914 | writeq(val64, &bar0->mdio_control); | ||
2915 | val64 = val64 | MDIO_CTRL_START_TRANS(0xE); | ||
2916 | writeq(val64, &bar0->mdio_control); | ||
2917 | udelay(100); | ||
2918 | |||
2919 | /* Read the value from regs */ | ||
2920 | rval64 = readq(&bar0->mdio_control); | ||
2921 | rval64 = rval64 & 0xFFFF0000; | ||
2922 | rval64 = rval64 >> 16; | ||
2923 | return rval64; | ||
2924 | } | ||
2925 | /** | ||
2926 | * s2io_chk_xpak_counter - Function to check the status of the xpak counters | ||
2927 | * @counter : couter value to be updated | ||
2928 | * @flag : flag to indicate the status | ||
2929 | * @type : counter type | ||
2930 | * Description: | ||
2931 | * This function is to check the status of the xpak counters value | ||
2932 | * NONE | ||
2933 | */ | ||
2934 | |||
2935 | static void s2io_chk_xpak_counter(u64 *counter, u64 * regs_stat, u32 index, u16 flag, u16 type) | ||
2936 | { | ||
2937 | u64 mask = 0x3; | ||
2938 | u64 val64; | ||
2939 | int i; | ||
2940 | for(i = 0; i <index; i++) | ||
2941 | mask = mask << 0x2; | ||
2942 | |||
2943 | if(flag > 0) | ||
2944 | { | ||
2945 | *counter = *counter + 1; | ||
2946 | val64 = *regs_stat & mask; | ||
2947 | val64 = val64 >> (index * 0x2); | ||
2948 | val64 = val64 + 1; | ||
2949 | if(val64 == 3) | ||
2950 | { | ||
2951 | switch(type) | ||
2952 | { | ||
2953 | case 1: | ||
2954 | DBG_PRINT(ERR_DBG, "Take Xframe NIC out of " | ||
2955 | "service. Excessive temperatures may " | ||
2956 | "result in premature transceiver " | ||
2957 | "failure \n"); | ||
2958 | break; | ||
2959 | case 2: | ||
2960 | DBG_PRINT(ERR_DBG, "Take Xframe NIC out of " | ||
2961 | "service Excessive bias currents may " | ||
2962 | "indicate imminent laser diode " | ||
2963 | "failure \n"); | ||
2964 | break; | ||
2965 | case 3: | ||
2966 | DBG_PRINT(ERR_DBG, "Take Xframe NIC out of " | ||
2967 | "service Excessive laser output " | ||
2968 | "power may saturate far-end " | ||
2969 | "receiver\n"); | ||
2970 | break; | ||
2971 | default: | ||
2972 | DBG_PRINT(ERR_DBG, "Incorrect XPAK Alarm " | ||
2973 | "type \n"); | ||
2974 | } | ||
2975 | val64 = 0x0; | ||
2976 | } | ||
2977 | val64 = val64 << (index * 0x2); | ||
2978 | *regs_stat = (*regs_stat & (~mask)) | (val64); | ||
2979 | |||
2980 | } else { | ||
2981 | *regs_stat = *regs_stat & (~mask); | ||
2982 | } | ||
2983 | } | ||
2984 | |||
2985 | /** | ||
2986 | * s2io_updt_xpak_counter - Function to update the xpak counters | ||
2987 | * @dev : pointer to net_device struct | ||
2988 | * Description: | ||
2989 | * This function is to upate the status of the xpak counters value | ||
2990 | * NONE | ||
2991 | */ | ||
2992 | static void s2io_updt_xpak_counter(struct net_device *dev) | ||
2993 | { | ||
2994 | u16 flag = 0x0; | ||
2995 | u16 type = 0x0; | ||
2996 | u16 val16 = 0x0; | ||
2997 | u64 val64 = 0x0; | ||
2998 | u64 addr = 0x0; | ||
2999 | |||
3000 | nic_t *sp = dev->priv; | ||
3001 | StatInfo_t *stat_info = sp->mac_control.stats_info; | ||
3002 | |||
3003 | /* Check the communication with the MDIO slave */ | ||
3004 | addr = 0x0000; | ||
3005 | val64 = 0x0; | ||
3006 | val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev); | ||
3007 | if((val64 == 0xFFFF) || (val64 == 0x0000)) | ||
3008 | { | ||
3009 | DBG_PRINT(ERR_DBG, "ERR: MDIO slave access failed - " | ||
3010 | "Returned %llx\n", (unsigned long long)val64); | ||
3011 | return; | ||
3012 | } | ||
3013 | |||
3014 | /* Check for the expecte value of 2040 at PMA address 0x0000 */ | ||
3015 | if(val64 != 0x2040) | ||
3016 | { | ||
3017 | DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - "); | ||
3018 | DBG_PRINT(ERR_DBG, "Returned: %llx- Expected: 0x2040\n", | ||
3019 | (unsigned long long)val64); | ||
3020 | return; | ||
3021 | } | ||
3022 | |||
3023 | /* Loading the DOM register to MDIO register */ | ||
3024 | addr = 0xA100; | ||
3025 | s2io_mdio_write(MDIO_MMD_PMA_DEV_ADDR, addr, val16, dev); | ||
3026 | val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev); | ||
3027 | |||
3028 | /* Reading the Alarm flags */ | ||
3029 | addr = 0xA070; | ||
3030 | val64 = 0x0; | ||
3031 | val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev); | ||
3032 | |||
3033 | flag = CHECKBIT(val64, 0x7); | ||
3034 | type = 1; | ||
3035 | s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_transceiver_temp_high, | ||
3036 | &stat_info->xpak_stat.xpak_regs_stat, | ||
3037 | 0x0, flag, type); | ||
3038 | |||
3039 | if(CHECKBIT(val64, 0x6)) | ||
3040 | stat_info->xpak_stat.alarm_transceiver_temp_low++; | ||
3041 | |||
3042 | flag = CHECKBIT(val64, 0x3); | ||
3043 | type = 2; | ||
3044 | s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_bias_current_high, | ||
3045 | &stat_info->xpak_stat.xpak_regs_stat, | ||
3046 | 0x2, flag, type); | ||
3047 | |||
3048 | if(CHECKBIT(val64, 0x2)) | ||
3049 | stat_info->xpak_stat.alarm_laser_bias_current_low++; | ||
3050 | |||
3051 | flag = CHECKBIT(val64, 0x1); | ||
3052 | type = 3; | ||
3053 | s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_output_power_high, | ||
3054 | &stat_info->xpak_stat.xpak_regs_stat, | ||
3055 | 0x4, flag, type); | ||
3056 | |||
3057 | if(CHECKBIT(val64, 0x0)) | ||
3058 | stat_info->xpak_stat.alarm_laser_output_power_low++; | ||
3059 | |||
3060 | /* Reading the Warning flags */ | ||
3061 | addr = 0xA074; | ||
3062 | val64 = 0x0; | ||
3063 | val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev); | ||
3064 | |||
3065 | if(CHECKBIT(val64, 0x7)) | ||
3066 | stat_info->xpak_stat.warn_transceiver_temp_high++; | ||
3067 | |||
3068 | if(CHECKBIT(val64, 0x6)) | ||
3069 | stat_info->xpak_stat.warn_transceiver_temp_low++; | ||
3070 | |||
3071 | if(CHECKBIT(val64, 0x3)) | ||
3072 | stat_info->xpak_stat.warn_laser_bias_current_high++; | ||
3073 | |||
3074 | if(CHECKBIT(val64, 0x2)) | ||
3075 | stat_info->xpak_stat.warn_laser_bias_current_low++; | ||
3076 | |||
3077 | if(CHECKBIT(val64, 0x1)) | ||
3078 | stat_info->xpak_stat.warn_laser_output_power_high++; | ||
3079 | |||
3080 | if(CHECKBIT(val64, 0x0)) | ||
3081 | stat_info->xpak_stat.warn_laser_output_power_low++; | ||
3082 | } | ||
3083 | |||
3084 | /** | ||
2777 | * alarm_intr_handler - Alarm Interrrupt handler | 3085 | * alarm_intr_handler - Alarm Interrrupt handler |
2778 | * @nic: device private variable | 3086 | * @nic: device private variable |
2779 | * Description: If the interrupt was neither because of Rx packet or Tx | 3087 | * Description: If the interrupt was neither because of Rx packet or Tx |
@@ -2790,6 +3098,18 @@ static void alarm_intr_handler(struct s2io_nic *nic) | |||
2790 | struct net_device *dev = (struct net_device *) nic->dev; | 3098 | struct net_device *dev = (struct net_device *) nic->dev; |
2791 | XENA_dev_config_t __iomem *bar0 = nic->bar0; | 3099 | XENA_dev_config_t __iomem *bar0 = nic->bar0; |
2792 | register u64 val64 = 0, err_reg = 0; | 3100 | register u64 val64 = 0, err_reg = 0; |
3101 | u64 cnt; | ||
3102 | int i; | ||
3103 | nic->mac_control.stats_info->sw_stat.ring_full_cnt = 0; | ||
3104 | /* Handling the XPAK counters update */ | ||
3105 | if(nic->mac_control.stats_info->xpak_stat.xpak_timer_count < 72000) { | ||
3106 | /* waiting for an hour */ | ||
3107 | nic->mac_control.stats_info->xpak_stat.xpak_timer_count++; | ||
3108 | } else { | ||
3109 | s2io_updt_xpak_counter(dev); | ||
3110 | /* reset the count to zero */ | ||
3111 | nic->mac_control.stats_info->xpak_stat.xpak_timer_count = 0; | ||
3112 | } | ||
2793 | 3113 | ||
2794 | /* Handling link status change error Intr */ | 3114 | /* Handling link status change error Intr */ |
2795 | if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) { | 3115 | if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) { |
@@ -2816,6 +3136,8 @@ static void alarm_intr_handler(struct s2io_nic *nic) | |||
2816 | MC_ERR_REG_MIRI_ECC_DB_ERR_1)) { | 3136 | MC_ERR_REG_MIRI_ECC_DB_ERR_1)) { |
2817 | netif_stop_queue(dev); | 3137 | netif_stop_queue(dev); |
2818 | schedule_work(&nic->rst_timer_task); | 3138 | schedule_work(&nic->rst_timer_task); |
3139 | nic->mac_control.stats_info->sw_stat. | ||
3140 | soft_reset_cnt++; | ||
2819 | } | 3141 | } |
2820 | } | 3142 | } |
2821 | } else { | 3143 | } else { |
@@ -2827,11 +3149,13 @@ static void alarm_intr_handler(struct s2io_nic *nic) | |||
2827 | /* In case of a serious error, the device will be Reset. */ | 3149 | /* In case of a serious error, the device will be Reset. */ |
2828 | val64 = readq(&bar0->serr_source); | 3150 | val64 = readq(&bar0->serr_source); |
2829 | if (val64 & SERR_SOURCE_ANY) { | 3151 | if (val64 & SERR_SOURCE_ANY) { |
3152 | nic->mac_control.stats_info->sw_stat.serious_err_cnt++; | ||
2830 | DBG_PRINT(ERR_DBG, "%s: Device indicates ", dev->name); | 3153 | DBG_PRINT(ERR_DBG, "%s: Device indicates ", dev->name); |
2831 | DBG_PRINT(ERR_DBG, "serious error %llx!!\n", | 3154 | DBG_PRINT(ERR_DBG, "serious error %llx!!\n", |
2832 | (unsigned long long)val64); | 3155 | (unsigned long long)val64); |
2833 | netif_stop_queue(dev); | 3156 | netif_stop_queue(dev); |
2834 | schedule_work(&nic->rst_timer_task); | 3157 | schedule_work(&nic->rst_timer_task); |
3158 | nic->mac_control.stats_info->sw_stat.soft_reset_cnt++; | ||
2835 | } | 3159 | } |
2836 | 3160 | ||
2837 | /* | 3161 | /* |
@@ -2849,6 +3173,35 @@ static void alarm_intr_handler(struct s2io_nic *nic) | |||
2849 | ac = readq(&bar0->adapter_control); | 3173 | ac = readq(&bar0->adapter_control); |
2850 | schedule_work(&nic->set_link_task); | 3174 | schedule_work(&nic->set_link_task); |
2851 | } | 3175 | } |
3176 | /* Check for data parity error */ | ||
3177 | val64 = readq(&bar0->pic_int_status); | ||
3178 | if (val64 & PIC_INT_GPIO) { | ||
3179 | val64 = readq(&bar0->gpio_int_reg); | ||
3180 | if (val64 & GPIO_INT_REG_DP_ERR_INT) { | ||
3181 | nic->mac_control.stats_info->sw_stat.parity_err_cnt++; | ||
3182 | schedule_work(&nic->rst_timer_task); | ||
3183 | nic->mac_control.stats_info->sw_stat.soft_reset_cnt++; | ||
3184 | } | ||
3185 | } | ||
3186 | |||
3187 | /* Check for ring full counter */ | ||
3188 | if (nic->device_type & XFRAME_II_DEVICE) { | ||
3189 | val64 = readq(&bar0->ring_bump_counter1); | ||
3190 | for (i=0; i<4; i++) { | ||
3191 | cnt = ( val64 & vBIT(0xFFFF,(i*16),16)); | ||
3192 | cnt >>= 64 - ((i+1)*16); | ||
3193 | nic->mac_control.stats_info->sw_stat.ring_full_cnt | ||
3194 | += cnt; | ||
3195 | } | ||
3196 | |||
3197 | val64 = readq(&bar0->ring_bump_counter2); | ||
3198 | for (i=0; i<4; i++) { | ||
3199 | cnt = ( val64 & vBIT(0xFFFF,(i*16),16)); | ||
3200 | cnt >>= 64 - ((i+1)*16); | ||
3201 | nic->mac_control.stats_info->sw_stat.ring_full_cnt | ||
3202 | += cnt; | ||
3203 | } | ||
3204 | } | ||
2852 | 3205 | ||
2853 | /* Other type of interrupts are not being handled now, TODO */ | 3206 | /* Other type of interrupts are not being handled now, TODO */ |
2854 | } | 3207 | } |
@@ -2864,23 +3217,26 @@ static void alarm_intr_handler(struct s2io_nic *nic) | |||
2864 | * SUCCESS on success and FAILURE on failure. | 3217 | * SUCCESS on success and FAILURE on failure. |
2865 | */ | 3218 | */ |
2866 | 3219 | ||
2867 | static int wait_for_cmd_complete(nic_t * sp) | 3220 | static int wait_for_cmd_complete(void *addr, u64 busy_bit) |
2868 | { | 3221 | { |
2869 | XENA_dev_config_t __iomem *bar0 = sp->bar0; | ||
2870 | int ret = FAILURE, cnt = 0; | 3222 | int ret = FAILURE, cnt = 0; |
2871 | u64 val64; | 3223 | u64 val64; |
2872 | 3224 | ||
2873 | while (TRUE) { | 3225 | while (TRUE) { |
2874 | val64 = readq(&bar0->rmac_addr_cmd_mem); | 3226 | val64 = readq(addr); |
2875 | if (!(val64 & RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING)) { | 3227 | if (!(val64 & busy_bit)) { |
2876 | ret = SUCCESS; | 3228 | ret = SUCCESS; |
2877 | break; | 3229 | break; |
2878 | } | 3230 | } |
2879 | msleep(50); | 3231 | |
3232 | if(in_interrupt()) | ||
3233 | mdelay(50); | ||
3234 | else | ||
3235 | msleep(50); | ||
3236 | |||
2880 | if (cnt++ > 10) | 3237 | if (cnt++ > 10) |
2881 | break; | 3238 | break; |
2882 | } | 3239 | } |
2883 | |||
2884 | return ret; | 3240 | return ret; |
2885 | } | 3241 | } |
2886 | 3242 | ||
@@ -2919,6 +3275,9 @@ static void s2io_reset(nic_t * sp) | |||
2919 | * PCI write to sw_reset register is done by this time. | 3275 | * PCI write to sw_reset register is done by this time. |
2920 | */ | 3276 | */ |
2921 | msleep(250); | 3277 | msleep(250); |
3278 | if (strstr(sp->product_name, "CX4")) { | ||
3279 | msleep(750); | ||
3280 | } | ||
2922 | 3281 | ||
2923 | /* Restore the PCI state saved during initialization. */ | 3282 | /* Restore the PCI state saved during initialization. */ |
2924 | pci_restore_state(sp->pdev); | 3283 | pci_restore_state(sp->pdev); |
@@ -3137,7 +3496,7 @@ static void restore_xmsi_data(nic_t *nic) | |||
3137 | u64 val64; | 3496 | u64 val64; |
3138 | int i; | 3497 | int i; |
3139 | 3498 | ||
3140 | for (i=0; i< MAX_REQUESTED_MSI_X; i++) { | 3499 | for (i=0; i< nic->avail_msix_vectors; i++) { |
3141 | writeq(nic->msix_info[i].addr, &bar0->xmsi_address); | 3500 | writeq(nic->msix_info[i].addr, &bar0->xmsi_address); |
3142 | writeq(nic->msix_info[i].data, &bar0->xmsi_data); | 3501 | writeq(nic->msix_info[i].data, &bar0->xmsi_data); |
3143 | val64 = (BIT(7) | BIT(15) | vBIT(i, 26, 6)); | 3502 | val64 = (BIT(7) | BIT(15) | vBIT(i, 26, 6)); |
@@ -3156,7 +3515,7 @@ static void store_xmsi_data(nic_t *nic) | |||
3156 | int i; | 3515 | int i; |
3157 | 3516 | ||
3158 | /* Store and display */ | 3517 | /* Store and display */ |
3159 | for (i=0; i< MAX_REQUESTED_MSI_X; i++) { | 3518 | for (i=0; i< nic->avail_msix_vectors; i++) { |
3160 | val64 = (BIT(15) | vBIT(i, 26, 6)); | 3519 | val64 = (BIT(15) | vBIT(i, 26, 6)); |
3161 | writeq(val64, &bar0->xmsi_access); | 3520 | writeq(val64, &bar0->xmsi_access); |
3162 | if (wait_for_msix_trans(nic, i)) { | 3521 | if (wait_for_msix_trans(nic, i)) { |
@@ -3284,15 +3643,24 @@ static int s2io_enable_msi_x(nic_t *nic) | |||
3284 | writeq(tx_mat, &bar0->tx_mat0_n[7]); | 3643 | writeq(tx_mat, &bar0->tx_mat0_n[7]); |
3285 | } | 3644 | } |
3286 | 3645 | ||
3646 | nic->avail_msix_vectors = 0; | ||
3287 | ret = pci_enable_msix(nic->pdev, nic->entries, MAX_REQUESTED_MSI_X); | 3647 | ret = pci_enable_msix(nic->pdev, nic->entries, MAX_REQUESTED_MSI_X); |
3648 | /* We fail init if error or we get less vectors than min required */ | ||
3649 | if (ret >= (nic->config.tx_fifo_num + nic->config.rx_ring_num + 1)) { | ||
3650 | nic->avail_msix_vectors = ret; | ||
3651 | ret = pci_enable_msix(nic->pdev, nic->entries, ret); | ||
3652 | } | ||
3288 | if (ret) { | 3653 | if (ret) { |
3289 | DBG_PRINT(ERR_DBG, "%s: Enabling MSIX failed\n", nic->dev->name); | 3654 | DBG_PRINT(ERR_DBG, "%s: Enabling MSIX failed\n", nic->dev->name); |
3290 | kfree(nic->entries); | 3655 | kfree(nic->entries); |
3291 | kfree(nic->s2io_entries); | 3656 | kfree(nic->s2io_entries); |
3292 | nic->entries = NULL; | 3657 | nic->entries = NULL; |
3293 | nic->s2io_entries = NULL; | 3658 | nic->s2io_entries = NULL; |
3659 | nic->avail_msix_vectors = 0; | ||
3294 | return -ENOMEM; | 3660 | return -ENOMEM; |
3295 | } | 3661 | } |
3662 | if (!nic->avail_msix_vectors) | ||
3663 | nic->avail_msix_vectors = MAX_REQUESTED_MSI_X; | ||
3296 | 3664 | ||
3297 | /* | 3665 | /* |
3298 | * To enable MSI-X, MSI also needs to be enabled, due to a bug | 3666 | * To enable MSI-X, MSI also needs to be enabled, due to a bug |
@@ -3325,8 +3693,6 @@ static int s2io_open(struct net_device *dev) | |||
3325 | { | 3693 | { |
3326 | nic_t *sp = dev->priv; | 3694 | nic_t *sp = dev->priv; |
3327 | int err = 0; | 3695 | int err = 0; |
3328 | int i; | ||
3329 | u16 msi_control; /* Temp variable */ | ||
3330 | 3696 | ||
3331 | /* | 3697 | /* |
3332 | * Make sure you have link off by default every time | 3698 | * Make sure you have link off by default every time |
@@ -3336,11 +3702,14 @@ static int s2io_open(struct net_device *dev) | |||
3336 | sp->last_link_state = 0; | 3702 | sp->last_link_state = 0; |
3337 | 3703 | ||
3338 | /* Initialize H/W and enable interrupts */ | 3704 | /* Initialize H/W and enable interrupts */ |
3339 | if (s2io_card_up(sp)) { | 3705 | err = s2io_card_up(sp); |
3706 | if (err) { | ||
3340 | DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n", | 3707 | DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n", |
3341 | dev->name); | 3708 | dev->name); |
3342 | err = -ENODEV; | 3709 | if (err == -ENODEV) |
3343 | goto hw_init_failed; | 3710 | goto hw_init_failed; |
3711 | else | ||
3712 | goto hw_enable_failed; | ||
3344 | } | 3713 | } |
3345 | 3714 | ||
3346 | /* Store the values of the MSIX table in the nic_t structure */ | 3715 | /* Store the values of the MSIX table in the nic_t structure */ |
@@ -3357,6 +3726,8 @@ failed\n", dev->name); | |||
3357 | } | 3726 | } |
3358 | } | 3727 | } |
3359 | if (sp->intr_type == MSI_X) { | 3728 | if (sp->intr_type == MSI_X) { |
3729 | int i; | ||
3730 | |||
3360 | for (i=1; (sp->s2io_entries[i].in_use == MSIX_FLG); i++) { | 3731 | for (i=1; (sp->s2io_entries[i].in_use == MSIX_FLG); i++) { |
3361 | if (sp->s2io_entries[i].type == MSIX_FIFO_TYPE) { | 3732 | if (sp->s2io_entries[i].type == MSIX_FIFO_TYPE) { |
3362 | sprintf(sp->desc1, "%s:MSI-X-%d-TX", | 3733 | sprintf(sp->desc1, "%s:MSI-X-%d-TX", |
@@ -3409,24 +3780,26 @@ setting_mac_address_failed: | |||
3409 | isr_registration_failed: | 3780 | isr_registration_failed: |
3410 | del_timer_sync(&sp->alarm_timer); | 3781 | del_timer_sync(&sp->alarm_timer); |
3411 | if (sp->intr_type == MSI_X) { | 3782 | if (sp->intr_type == MSI_X) { |
3412 | if (sp->device_type == XFRAME_II_DEVICE) { | 3783 | int i; |
3413 | for (i=1; (sp->s2io_entries[i].in_use == | 3784 | u16 msi_control; /* Temp variable */ |
3414 | MSIX_REGISTERED_SUCCESS); i++) { | ||
3415 | int vector = sp->entries[i].vector; | ||
3416 | void *arg = sp->s2io_entries[i].arg; | ||
3417 | 3785 | ||
3418 | free_irq(vector, arg); | 3786 | for (i=1; (sp->s2io_entries[i].in_use == |
3419 | } | 3787 | MSIX_REGISTERED_SUCCESS); i++) { |
3420 | pci_disable_msix(sp->pdev); | 3788 | int vector = sp->entries[i].vector; |
3789 | void *arg = sp->s2io_entries[i].arg; | ||
3421 | 3790 | ||
3422 | /* Temp */ | 3791 | free_irq(vector, arg); |
3423 | pci_read_config_word(sp->pdev, 0x42, &msi_control); | ||
3424 | msi_control &= 0xFFFE; /* Disable MSI */ | ||
3425 | pci_write_config_word(sp->pdev, 0x42, msi_control); | ||
3426 | } | 3792 | } |
3793 | pci_disable_msix(sp->pdev); | ||
3794 | |||
3795 | /* Temp */ | ||
3796 | pci_read_config_word(sp->pdev, 0x42, &msi_control); | ||
3797 | msi_control &= 0xFFFE; /* Disable MSI */ | ||
3798 | pci_write_config_word(sp->pdev, 0x42, msi_control); | ||
3427 | } | 3799 | } |
3428 | else if (sp->intr_type == MSI) | 3800 | else if (sp->intr_type == MSI) |
3429 | pci_disable_msi(sp->pdev); | 3801 | pci_disable_msi(sp->pdev); |
3802 | hw_enable_failed: | ||
3430 | s2io_reset(sp); | 3803 | s2io_reset(sp); |
3431 | hw_init_failed: | 3804 | hw_init_failed: |
3432 | if (sp->intr_type == MSI_X) { | 3805 | if (sp->intr_type == MSI_X) { |
@@ -3454,35 +3827,12 @@ hw_init_failed: | |||
3454 | static int s2io_close(struct net_device *dev) | 3827 | static int s2io_close(struct net_device *dev) |
3455 | { | 3828 | { |
3456 | nic_t *sp = dev->priv; | 3829 | nic_t *sp = dev->priv; |
3457 | int i; | ||
3458 | u16 msi_control; | ||
3459 | 3830 | ||
3460 | flush_scheduled_work(); | 3831 | flush_scheduled_work(); |
3461 | netif_stop_queue(dev); | 3832 | netif_stop_queue(dev); |
3462 | /* Reset card, kill tasklet and free Tx and Rx buffers. */ | 3833 | /* Reset card, kill tasklet and free Tx and Rx buffers. */ |
3463 | s2io_card_down(sp); | 3834 | s2io_card_down(sp, 1); |
3464 | |||
3465 | if (sp->intr_type == MSI_X) { | ||
3466 | if (sp->device_type == XFRAME_II_DEVICE) { | ||
3467 | for (i=1; (sp->s2io_entries[i].in_use == | ||
3468 | MSIX_REGISTERED_SUCCESS); i++) { | ||
3469 | int vector = sp->entries[i].vector; | ||
3470 | void *arg = sp->s2io_entries[i].arg; | ||
3471 | 3835 | ||
3472 | free_irq(vector, arg); | ||
3473 | } | ||
3474 | pci_read_config_word(sp->pdev, 0x42, &msi_control); | ||
3475 | msi_control &= 0xFFFE; /* Disable MSI */ | ||
3476 | pci_write_config_word(sp->pdev, 0x42, msi_control); | ||
3477 | |||
3478 | pci_disable_msix(sp->pdev); | ||
3479 | } | ||
3480 | } | ||
3481 | else { | ||
3482 | free_irq(sp->pdev->irq, dev); | ||
3483 | if (sp->intr_type == MSI) | ||
3484 | pci_disable_msi(sp->pdev); | ||
3485 | } | ||
3486 | sp->device_close_flag = TRUE; /* Device is shut down. */ | 3836 | sp->device_close_flag = TRUE; /* Device is shut down. */ |
3487 | return 0; | 3837 | return 0; |
3488 | } | 3838 | } |
@@ -3545,7 +3895,8 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3545 | 3895 | ||
3546 | queue_len = mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1; | 3896 | queue_len = mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1; |
3547 | /* Avoid "put" pointer going beyond "get" pointer */ | 3897 | /* Avoid "put" pointer going beyond "get" pointer */ |
3548 | if (txdp->Host_Control || (((put_off + 1) % queue_len) == get_off)) { | 3898 | if (txdp->Host_Control || |
3899 | ((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) { | ||
3549 | DBG_PRINT(TX_DBG, "Error in xmit, No free TXDs.\n"); | 3900 | DBG_PRINT(TX_DBG, "Error in xmit, No free TXDs.\n"); |
3550 | netif_stop_queue(dev); | 3901 | netif_stop_queue(dev); |
3551 | dev_kfree_skb(skb); | 3902 | dev_kfree_skb(skb); |
@@ -3655,11 +4006,13 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3655 | mmiowb(); | 4006 | mmiowb(); |
3656 | 4007 | ||
3657 | put_off++; | 4008 | put_off++; |
3658 | put_off %= mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1; | 4009 | if (put_off == mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1) |
4010 | put_off = 0; | ||
3659 | mac_control->fifos[queue].tx_curr_put_info.offset = put_off; | 4011 | mac_control->fifos[queue].tx_curr_put_info.offset = put_off; |
3660 | 4012 | ||
3661 | /* Avoid "put" pointer going beyond "get" pointer */ | 4013 | /* Avoid "put" pointer going beyond "get" pointer */ |
3662 | if (((put_off + 1) % queue_len) == get_off) { | 4014 | if (((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) { |
4015 | sp->mac_control.stats_info->sw_stat.fifo_full_cnt++; | ||
3663 | DBG_PRINT(TX_DBG, | 4016 | DBG_PRINT(TX_DBG, |
3664 | "No free TxDs for xmit, Put: 0x%x Get:0x%x\n", | 4017 | "No free TxDs for xmit, Put: 0x%x Get:0x%x\n", |
3665 | put_off, get_off); | 4018 | put_off, get_off); |
@@ -3795,7 +4148,6 @@ s2io_msix_fifo_handle(int irq, void *dev_id, struct pt_regs *regs) | |||
3795 | atomic_dec(&sp->isr_cnt); | 4148 | atomic_dec(&sp->isr_cnt); |
3796 | return IRQ_HANDLED; | 4149 | return IRQ_HANDLED; |
3797 | } | 4150 | } |
3798 | |||
3799 | static void s2io_txpic_intr_handle(nic_t *sp) | 4151 | static void s2io_txpic_intr_handle(nic_t *sp) |
3800 | { | 4152 | { |
3801 | XENA_dev_config_t __iomem *bar0 = sp->bar0; | 4153 | XENA_dev_config_t __iomem *bar0 = sp->bar0; |
@@ -3806,41 +4158,56 @@ static void s2io_txpic_intr_handle(nic_t *sp) | |||
3806 | val64 = readq(&bar0->gpio_int_reg); | 4158 | val64 = readq(&bar0->gpio_int_reg); |
3807 | if ((val64 & GPIO_INT_REG_LINK_DOWN) && | 4159 | if ((val64 & GPIO_INT_REG_LINK_DOWN) && |
3808 | (val64 & GPIO_INT_REG_LINK_UP)) { | 4160 | (val64 & GPIO_INT_REG_LINK_UP)) { |
4161 | /* | ||
4162 | * This is unstable state so clear both up/down | ||
4163 | * interrupt and adapter to re-evaluate the link state. | ||
4164 | */ | ||
3809 | val64 |= GPIO_INT_REG_LINK_DOWN; | 4165 | val64 |= GPIO_INT_REG_LINK_DOWN; |
3810 | val64 |= GPIO_INT_REG_LINK_UP; | 4166 | val64 |= GPIO_INT_REG_LINK_UP; |
3811 | writeq(val64, &bar0->gpio_int_reg); | 4167 | writeq(val64, &bar0->gpio_int_reg); |
3812 | goto masking; | ||
3813 | } | ||
3814 | |||
3815 | if (((sp->last_link_state == LINK_UP) && | ||
3816 | (val64 & GPIO_INT_REG_LINK_DOWN)) || | ||
3817 | ((sp->last_link_state == LINK_DOWN) && | ||
3818 | (val64 & GPIO_INT_REG_LINK_UP))) { | ||
3819 | val64 = readq(&bar0->gpio_int_mask); | 4168 | val64 = readq(&bar0->gpio_int_mask); |
3820 | val64 |= GPIO_INT_MASK_LINK_DOWN; | 4169 | val64 &= ~(GPIO_INT_MASK_LINK_UP | |
3821 | val64 |= GPIO_INT_MASK_LINK_UP; | 4170 | GPIO_INT_MASK_LINK_DOWN); |
3822 | writeq(val64, &bar0->gpio_int_mask); | 4171 | writeq(val64, &bar0->gpio_int_mask); |
3823 | s2io_set_link((unsigned long)sp); | ||
3824 | } | 4172 | } |
3825 | masking: | 4173 | else if (val64 & GPIO_INT_REG_LINK_UP) { |
3826 | if (sp->last_link_state == LINK_UP) { | 4174 | val64 = readq(&bar0->adapter_status); |
3827 | /*enable down interrupt */ | 4175 | if (verify_xena_quiescence(sp, val64, |
3828 | val64 = readq(&bar0->gpio_int_mask); | 4176 | sp->device_enabled_once)) { |
3829 | /* unmasks link down intr */ | 4177 | /* Enable Adapter */ |
3830 | val64 &= ~GPIO_INT_MASK_LINK_DOWN; | 4178 | val64 = readq(&bar0->adapter_control); |
3831 | /* masks link up intr */ | 4179 | val64 |= ADAPTER_CNTL_EN; |
3832 | val64 |= GPIO_INT_MASK_LINK_UP; | 4180 | writeq(val64, &bar0->adapter_control); |
3833 | writeq(val64, &bar0->gpio_int_mask); | 4181 | val64 |= ADAPTER_LED_ON; |
3834 | } else { | 4182 | writeq(val64, &bar0->adapter_control); |
3835 | /*enable UP Interrupt */ | 4183 | if (!sp->device_enabled_once) |
3836 | val64 = readq(&bar0->gpio_int_mask); | 4184 | sp->device_enabled_once = 1; |
3837 | /* unmasks link up interrupt */ | 4185 | |
3838 | val64 &= ~GPIO_INT_MASK_LINK_UP; | 4186 | s2io_link(sp, LINK_UP); |
3839 | /* masks link down interrupt */ | 4187 | /* |
3840 | val64 |= GPIO_INT_MASK_LINK_DOWN; | 4188 | * unmask link down interrupt and mask link-up |
3841 | writeq(val64, &bar0->gpio_int_mask); | 4189 | * intr |
4190 | */ | ||
4191 | val64 = readq(&bar0->gpio_int_mask); | ||
4192 | val64 &= ~GPIO_INT_MASK_LINK_DOWN; | ||
4193 | val64 |= GPIO_INT_MASK_LINK_UP; | ||
4194 | writeq(val64, &bar0->gpio_int_mask); | ||
4195 | |||
4196 | } | ||
4197 | }else if (val64 & GPIO_INT_REG_LINK_DOWN) { | ||
4198 | val64 = readq(&bar0->adapter_status); | ||
4199 | if (verify_xena_quiescence(sp, val64, | ||
4200 | sp->device_enabled_once)) { | ||
4201 | s2io_link(sp, LINK_DOWN); | ||
4202 | /* Link is down so unmaks link up interrupt */ | ||
4203 | val64 = readq(&bar0->gpio_int_mask); | ||
4204 | val64 &= ~GPIO_INT_MASK_LINK_UP; | ||
4205 | val64 |= GPIO_INT_MASK_LINK_DOWN; | ||
4206 | writeq(val64, &bar0->gpio_int_mask); | ||
4207 | } | ||
3842 | } | 4208 | } |
3843 | } | 4209 | } |
4210 | val64 = readq(&bar0->gpio_int_mask); | ||
3844 | } | 4211 | } |
3845 | 4212 | ||
3846 | /** | 4213 | /** |
@@ -3863,7 +4230,7 @@ static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs) | |||
3863 | nic_t *sp = dev->priv; | 4230 | nic_t *sp = dev->priv; |
3864 | XENA_dev_config_t __iomem *bar0 = sp->bar0; | 4231 | XENA_dev_config_t __iomem *bar0 = sp->bar0; |
3865 | int i; | 4232 | int i; |
3866 | u64 reason = 0, val64; | 4233 | u64 reason = 0, val64, org_mask; |
3867 | mac_info_t *mac_control; | 4234 | mac_info_t *mac_control; |
3868 | struct config_param *config; | 4235 | struct config_param *config; |
3869 | 4236 | ||
@@ -3887,43 +4254,41 @@ static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs) | |||
3887 | return IRQ_NONE; | 4254 | return IRQ_NONE; |
3888 | } | 4255 | } |
3889 | 4256 | ||
4257 | val64 = 0xFFFFFFFFFFFFFFFFULL; | ||
4258 | /* Store current mask before masking all interrupts */ | ||
4259 | org_mask = readq(&bar0->general_int_mask); | ||
4260 | writeq(val64, &bar0->general_int_mask); | ||
4261 | |||
3890 | #ifdef CONFIG_S2IO_NAPI | 4262 | #ifdef CONFIG_S2IO_NAPI |
3891 | if (reason & GEN_INTR_RXTRAFFIC) { | 4263 | if (reason & GEN_INTR_RXTRAFFIC) { |
3892 | if (netif_rx_schedule_prep(dev)) { | 4264 | if (netif_rx_schedule_prep(dev)) { |
3893 | en_dis_able_nic_intrs(sp, RX_TRAFFIC_INTR, | 4265 | writeq(val64, &bar0->rx_traffic_mask); |
3894 | DISABLE_INTRS); | ||
3895 | __netif_rx_schedule(dev); | 4266 | __netif_rx_schedule(dev); |
3896 | } | 4267 | } |
3897 | } | 4268 | } |
3898 | #else | 4269 | #else |
3899 | /* If Intr is because of Rx Traffic */ | 4270 | /* |
3900 | if (reason & GEN_INTR_RXTRAFFIC) { | 4271 | * Rx handler is called by default, without checking for the |
3901 | /* | 4272 | * cause of interrupt. |
3902 | * rx_traffic_int reg is an R1 register, writing all 1's | 4273 | * rx_traffic_int reg is an R1 register, writing all 1's |
3903 | * will ensure that the actual interrupt causing bit get's | 4274 | * will ensure that the actual interrupt causing bit get's |
3904 | * cleared and hence a read can be avoided. | 4275 | * cleared and hence a read can be avoided. |
3905 | */ | 4276 | */ |
3906 | val64 = 0xFFFFFFFFFFFFFFFFULL; | 4277 | writeq(val64, &bar0->rx_traffic_int); |
3907 | writeq(val64, &bar0->rx_traffic_int); | 4278 | for (i = 0; i < config->rx_ring_num; i++) { |
3908 | for (i = 0; i < config->rx_ring_num; i++) { | 4279 | rx_intr_handler(&mac_control->rings[i]); |
3909 | rx_intr_handler(&mac_control->rings[i]); | ||
3910 | } | ||
3911 | } | 4280 | } |
3912 | #endif | 4281 | #endif |
3913 | 4282 | ||
3914 | /* If Intr is because of Tx Traffic */ | 4283 | /* |
3915 | if (reason & GEN_INTR_TXTRAFFIC) { | 4284 | * tx_traffic_int reg is an R1 register, writing all 1's |
3916 | /* | 4285 | * will ensure that the actual interrupt causing bit get's |
3917 | * tx_traffic_int reg is an R1 register, writing all 1's | 4286 | * cleared and hence a read can be avoided. |
3918 | * will ensure that the actual interrupt causing bit get's | 4287 | */ |
3919 | * cleared and hence a read can be avoided. | 4288 | writeq(val64, &bar0->tx_traffic_int); |
3920 | */ | ||
3921 | val64 = 0xFFFFFFFFFFFFFFFFULL; | ||
3922 | writeq(val64, &bar0->tx_traffic_int); | ||
3923 | 4289 | ||
3924 | for (i = 0; i < config->tx_fifo_num; i++) | 4290 | for (i = 0; i < config->tx_fifo_num; i++) |
3925 | tx_intr_handler(&mac_control->fifos[i]); | 4291 | tx_intr_handler(&mac_control->fifos[i]); |
3926 | } | ||
3927 | 4292 | ||
3928 | if (reason & GEN_INTR_TXPIC) | 4293 | if (reason & GEN_INTR_TXPIC) |
3929 | s2io_txpic_intr_handle(sp); | 4294 | s2io_txpic_intr_handle(sp); |
@@ -3949,6 +4314,7 @@ static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs) | |||
3949 | DBG_PRINT(ERR_DBG, " in ISR!!\n"); | 4314 | DBG_PRINT(ERR_DBG, " in ISR!!\n"); |
3950 | clear_bit(0, (&sp->tasklet_status)); | 4315 | clear_bit(0, (&sp->tasklet_status)); |
3951 | atomic_dec(&sp->isr_cnt); | 4316 | atomic_dec(&sp->isr_cnt); |
4317 | writeq(org_mask, &bar0->general_int_mask); | ||
3952 | return IRQ_HANDLED; | 4318 | return IRQ_HANDLED; |
3953 | } | 4319 | } |
3954 | clear_bit(0, (&sp->tasklet_status)); | 4320 | clear_bit(0, (&sp->tasklet_status)); |
@@ -3964,7 +4330,7 @@ static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs) | |||
3964 | } | 4330 | } |
3965 | } | 4331 | } |
3966 | #endif | 4332 | #endif |
3967 | 4333 | writeq(org_mask, &bar0->general_int_mask); | |
3968 | atomic_dec(&sp->isr_cnt); | 4334 | atomic_dec(&sp->isr_cnt); |
3969 | return IRQ_HANDLED; | 4335 | return IRQ_HANDLED; |
3970 | } | 4336 | } |
@@ -4067,7 +4433,8 @@ static void s2io_set_multicast(struct net_device *dev) | |||
4067 | RMAC_ADDR_CMD_MEM_OFFSET(MAC_MC_ALL_MC_ADDR_OFFSET); | 4433 | RMAC_ADDR_CMD_MEM_OFFSET(MAC_MC_ALL_MC_ADDR_OFFSET); |
4068 | writeq(val64, &bar0->rmac_addr_cmd_mem); | 4434 | writeq(val64, &bar0->rmac_addr_cmd_mem); |
4069 | /* Wait till command completes */ | 4435 | /* Wait till command completes */ |
4070 | wait_for_cmd_complete(sp); | 4436 | wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, |
4437 | RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING); | ||
4071 | 4438 | ||
4072 | sp->m_cast_flg = 1; | 4439 | sp->m_cast_flg = 1; |
4073 | sp->all_multi_pos = MAC_MC_ALL_MC_ADDR_OFFSET; | 4440 | sp->all_multi_pos = MAC_MC_ALL_MC_ADDR_OFFSET; |
@@ -4082,7 +4449,8 @@ static void s2io_set_multicast(struct net_device *dev) | |||
4082 | RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos); | 4449 | RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos); |
4083 | writeq(val64, &bar0->rmac_addr_cmd_mem); | 4450 | writeq(val64, &bar0->rmac_addr_cmd_mem); |
4084 | /* Wait till command completes */ | 4451 | /* Wait till command completes */ |
4085 | wait_for_cmd_complete(sp); | 4452 | wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, |
4453 | RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING); | ||
4086 | 4454 | ||
4087 | sp->m_cast_flg = 0; | 4455 | sp->m_cast_flg = 0; |
4088 | sp->all_multi_pos = 0; | 4456 | sp->all_multi_pos = 0; |
@@ -4147,7 +4515,8 @@ static void s2io_set_multicast(struct net_device *dev) | |||
4147 | writeq(val64, &bar0->rmac_addr_cmd_mem); | 4515 | writeq(val64, &bar0->rmac_addr_cmd_mem); |
4148 | 4516 | ||
4149 | /* Wait for command completes */ | 4517 | /* Wait for command completes */ |
4150 | if (wait_for_cmd_complete(sp)) { | 4518 | if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, |
4519 | RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING)) { | ||
4151 | DBG_PRINT(ERR_DBG, "%s: Adding ", | 4520 | DBG_PRINT(ERR_DBG, "%s: Adding ", |
4152 | dev->name); | 4521 | dev->name); |
4153 | DBG_PRINT(ERR_DBG, "Multicasts failed\n"); | 4522 | DBG_PRINT(ERR_DBG, "Multicasts failed\n"); |
@@ -4177,7 +4546,8 @@ static void s2io_set_multicast(struct net_device *dev) | |||
4177 | writeq(val64, &bar0->rmac_addr_cmd_mem); | 4546 | writeq(val64, &bar0->rmac_addr_cmd_mem); |
4178 | 4547 | ||
4179 | /* Wait for command completes */ | 4548 | /* Wait for command completes */ |
4180 | if (wait_for_cmd_complete(sp)) { | 4549 | if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, |
4550 | RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING)) { | ||
4181 | DBG_PRINT(ERR_DBG, "%s: Adding ", | 4551 | DBG_PRINT(ERR_DBG, "%s: Adding ", |
4182 | dev->name); | 4552 | dev->name); |
4183 | DBG_PRINT(ERR_DBG, "Multicasts failed\n"); | 4553 | DBG_PRINT(ERR_DBG, "Multicasts failed\n"); |
@@ -4222,7 +4592,8 @@ static int s2io_set_mac_addr(struct net_device *dev, u8 * addr) | |||
4222 | RMAC_ADDR_CMD_MEM_OFFSET(0); | 4592 | RMAC_ADDR_CMD_MEM_OFFSET(0); |
4223 | writeq(val64, &bar0->rmac_addr_cmd_mem); | 4593 | writeq(val64, &bar0->rmac_addr_cmd_mem); |
4224 | /* Wait till command completes */ | 4594 | /* Wait till command completes */ |
4225 | if (wait_for_cmd_complete(sp)) { | 4595 | if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, |
4596 | RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING)) { | ||
4226 | DBG_PRINT(ERR_DBG, "%s: set_mac_addr failed\n", dev->name); | 4597 | DBG_PRINT(ERR_DBG, "%s: set_mac_addr failed\n", dev->name); |
4227 | return FAILURE; | 4598 | return FAILURE; |
4228 | } | 4599 | } |
@@ -4619,6 +4990,44 @@ static int write_eeprom(nic_t * sp, int off, u64 data, int cnt) | |||
4619 | } | 4990 | } |
4620 | return ret; | 4991 | return ret; |
4621 | } | 4992 | } |
4993 | static void s2io_vpd_read(nic_t *nic) | ||
4994 | { | ||
4995 | u8 vpd_data[256],data; | ||
4996 | int i=0, cnt, fail = 0; | ||
4997 | int vpd_addr = 0x80; | ||
4998 | |||
4999 | if (nic->device_type == XFRAME_II_DEVICE) { | ||
5000 | strcpy(nic->product_name, "Xframe II 10GbE network adapter"); | ||
5001 | vpd_addr = 0x80; | ||
5002 | } | ||
5003 | else { | ||
5004 | strcpy(nic->product_name, "Xframe I 10GbE network adapter"); | ||
5005 | vpd_addr = 0x50; | ||
5006 | } | ||
5007 | |||
5008 | for (i = 0; i < 256; i +=4 ) { | ||
5009 | pci_write_config_byte(nic->pdev, (vpd_addr + 2), i); | ||
5010 | pci_read_config_byte(nic->pdev, (vpd_addr + 2), &data); | ||
5011 | pci_write_config_byte(nic->pdev, (vpd_addr + 3), 0); | ||
5012 | for (cnt = 0; cnt <5; cnt++) { | ||
5013 | msleep(2); | ||
5014 | pci_read_config_byte(nic->pdev, (vpd_addr + 3), &data); | ||
5015 | if (data == 0x80) | ||
5016 | break; | ||
5017 | } | ||
5018 | if (cnt >= 5) { | ||
5019 | DBG_PRINT(ERR_DBG, "Read of VPD data failed\n"); | ||
5020 | fail = 1; | ||
5021 | break; | ||
5022 | } | ||
5023 | pci_read_config_dword(nic->pdev, (vpd_addr + 4), | ||
5024 | (u32 *)&vpd_data[i]); | ||
5025 | } | ||
5026 | if ((!fail) && (vpd_data[1] < VPD_PRODUCT_NAME_LEN)) { | ||
5027 | memset(nic->product_name, 0, vpd_data[1]); | ||
5028 | memcpy(nic->product_name, &vpd_data[3], vpd_data[1]); | ||
5029 | } | ||
5030 | } | ||
4622 | 5031 | ||
4623 | /** | 5032 | /** |
4624 | * s2io_ethtool_geeprom - reads the value stored in the Eeprom. | 5033 | * s2io_ethtool_geeprom - reads the value stored in the Eeprom. |
@@ -4931,8 +5340,10 @@ static int s2io_link_test(nic_t * sp, uint64_t * data) | |||
4931 | u64 val64; | 5340 | u64 val64; |
4932 | 5341 | ||
4933 | val64 = readq(&bar0->adapter_status); | 5342 | val64 = readq(&bar0->adapter_status); |
4934 | if (val64 & ADAPTER_STATUS_RMAC_LOCAL_FAULT) | 5343 | if(!(LINK_IS_UP(val64))) |
4935 | *data = 1; | 5344 | *data = 1; |
5345 | else | ||
5346 | *data = 0; | ||
4936 | 5347 | ||
4937 | return 0; | 5348 | return 0; |
4938 | } | 5349 | } |
@@ -5112,7 +5523,6 @@ static void s2io_get_ethtool_stats(struct net_device *dev, | |||
5112 | int i = 0; | 5523 | int i = 0; |
5113 | nic_t *sp = dev->priv; | 5524 | nic_t *sp = dev->priv; |
5114 | StatInfo_t *stat_info = sp->mac_control.stats_info; | 5525 | StatInfo_t *stat_info = sp->mac_control.stats_info; |
5115 | u64 tmp; | ||
5116 | 5526 | ||
5117 | s2io_updt_stats(sp); | 5527 | s2io_updt_stats(sp); |
5118 | tmp_stats[i++] = | 5528 | tmp_stats[i++] = |
@@ -5129,9 +5539,19 @@ static void s2io_get_ethtool_stats(struct net_device *dev, | |||
5129 | (u64)le32_to_cpu(stat_info->tmac_bcst_frms_oflow) << 32 | | 5539 | (u64)le32_to_cpu(stat_info->tmac_bcst_frms_oflow) << 32 | |
5130 | le32_to_cpu(stat_info->tmac_bcst_frms); | 5540 | le32_to_cpu(stat_info->tmac_bcst_frms); |
5131 | tmp_stats[i++] = le64_to_cpu(stat_info->tmac_pause_ctrl_frms); | 5541 | tmp_stats[i++] = le64_to_cpu(stat_info->tmac_pause_ctrl_frms); |
5542 | tmp_stats[i++] = | ||
5543 | (u64)le32_to_cpu(stat_info->tmac_ttl_octets_oflow) << 32 | | ||
5544 | le32_to_cpu(stat_info->tmac_ttl_octets); | ||
5545 | tmp_stats[i++] = | ||
5546 | (u64)le32_to_cpu(stat_info->tmac_ucst_frms_oflow) << 32 | | ||
5547 | le32_to_cpu(stat_info->tmac_ucst_frms); | ||
5548 | tmp_stats[i++] = | ||
5549 | (u64)le32_to_cpu(stat_info->tmac_nucst_frms_oflow) << 32 | | ||
5550 | le32_to_cpu(stat_info->tmac_nucst_frms); | ||
5132 | tmp_stats[i++] = | 5551 | tmp_stats[i++] = |
5133 | (u64)le32_to_cpu(stat_info->tmac_any_err_frms_oflow) << 32 | | 5552 | (u64)le32_to_cpu(stat_info->tmac_any_err_frms_oflow) << 32 | |
5134 | le32_to_cpu(stat_info->tmac_any_err_frms); | 5553 | le32_to_cpu(stat_info->tmac_any_err_frms); |
5554 | tmp_stats[i++] = le64_to_cpu(stat_info->tmac_ttl_less_fb_octets); | ||
5135 | tmp_stats[i++] = le64_to_cpu(stat_info->tmac_vld_ip_octets); | 5555 | tmp_stats[i++] = le64_to_cpu(stat_info->tmac_vld_ip_octets); |
5136 | tmp_stats[i++] = | 5556 | tmp_stats[i++] = |
5137 | (u64)le32_to_cpu(stat_info->tmac_vld_ip_oflow) << 32 | | 5557 | (u64)le32_to_cpu(stat_info->tmac_vld_ip_oflow) << 32 | |
@@ -5163,11 +5583,27 @@ static void s2io_get_ethtool_stats(struct net_device *dev, | |||
5163 | (u64)le32_to_cpu(stat_info->rmac_vld_bcst_frms_oflow) << 32 | | 5583 | (u64)le32_to_cpu(stat_info->rmac_vld_bcst_frms_oflow) << 32 | |
5164 | le32_to_cpu(stat_info->rmac_vld_bcst_frms); | 5584 | le32_to_cpu(stat_info->rmac_vld_bcst_frms); |
5165 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_in_rng_len_err_frms); | 5585 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_in_rng_len_err_frms); |
5586 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_out_rng_len_err_frms); | ||
5166 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_long_frms); | 5587 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_long_frms); |
5167 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_pause_ctrl_frms); | 5588 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_pause_ctrl_frms); |
5589 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_unsup_ctrl_frms); | ||
5590 | tmp_stats[i++] = | ||
5591 | (u64)le32_to_cpu(stat_info->rmac_ttl_octets_oflow) << 32 | | ||
5592 | le32_to_cpu(stat_info->rmac_ttl_octets); | ||
5593 | tmp_stats[i++] = | ||
5594 | (u64)le32_to_cpu(stat_info->rmac_accepted_ucst_frms_oflow) | ||
5595 | << 32 | le32_to_cpu(stat_info->rmac_accepted_ucst_frms); | ||
5596 | tmp_stats[i++] = | ||
5597 | (u64)le32_to_cpu(stat_info->rmac_accepted_nucst_frms_oflow) | ||
5598 | << 32 | le32_to_cpu(stat_info->rmac_accepted_nucst_frms); | ||
5168 | tmp_stats[i++] = | 5599 | tmp_stats[i++] = |
5169 | (u64)le32_to_cpu(stat_info->rmac_discarded_frms_oflow) << 32 | | 5600 | (u64)le32_to_cpu(stat_info->rmac_discarded_frms_oflow) << 32 | |
5170 | le32_to_cpu(stat_info->rmac_discarded_frms); | 5601 | le32_to_cpu(stat_info->rmac_discarded_frms); |
5602 | tmp_stats[i++] = | ||
5603 | (u64)le32_to_cpu(stat_info->rmac_drop_events_oflow) | ||
5604 | << 32 | le32_to_cpu(stat_info->rmac_drop_events); | ||
5605 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_less_fb_octets); | ||
5606 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_frms); | ||
5171 | tmp_stats[i++] = | 5607 | tmp_stats[i++] = |
5172 | (u64)le32_to_cpu(stat_info->rmac_usized_frms_oflow) << 32 | | 5608 | (u64)le32_to_cpu(stat_info->rmac_usized_frms_oflow) << 32 | |
5173 | le32_to_cpu(stat_info->rmac_usized_frms); | 5609 | le32_to_cpu(stat_info->rmac_usized_frms); |
@@ -5180,40 +5616,129 @@ static void s2io_get_ethtool_stats(struct net_device *dev, | |||
5180 | tmp_stats[i++] = | 5616 | tmp_stats[i++] = |
5181 | (u64)le32_to_cpu(stat_info->rmac_jabber_frms_oflow) << 32 | | 5617 | (u64)le32_to_cpu(stat_info->rmac_jabber_frms_oflow) << 32 | |
5182 | le32_to_cpu(stat_info->rmac_jabber_frms); | 5618 | le32_to_cpu(stat_info->rmac_jabber_frms); |
5183 | tmp_stats[i++] = (u64)le32_to_cpu(stat_info->rmac_ip_oflow) << 32 | | 5619 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_64_frms); |
5620 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_65_127_frms); | ||
5621 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_128_255_frms); | ||
5622 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_256_511_frms); | ||
5623 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_512_1023_frms); | ||
5624 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_1024_1518_frms); | ||
5625 | tmp_stats[i++] = | ||
5626 | (u64)le32_to_cpu(stat_info->rmac_ip_oflow) << 32 | | ||
5184 | le32_to_cpu(stat_info->rmac_ip); | 5627 | le32_to_cpu(stat_info->rmac_ip); |
5185 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ip_octets); | 5628 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ip_octets); |
5186 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_hdr_err_ip); | 5629 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_hdr_err_ip); |
5187 | tmp_stats[i++] = (u64)le32_to_cpu(stat_info->rmac_drop_ip_oflow) << 32 | | 5630 | tmp_stats[i++] = |
5631 | (u64)le32_to_cpu(stat_info->rmac_drop_ip_oflow) << 32 | | ||
5188 | le32_to_cpu(stat_info->rmac_drop_ip); | 5632 | le32_to_cpu(stat_info->rmac_drop_ip); |
5189 | tmp_stats[i++] = (u64)le32_to_cpu(stat_info->rmac_icmp_oflow) << 32 | | 5633 | tmp_stats[i++] = |
5634 | (u64)le32_to_cpu(stat_info->rmac_icmp_oflow) << 32 | | ||
5190 | le32_to_cpu(stat_info->rmac_icmp); | 5635 | le32_to_cpu(stat_info->rmac_icmp); |
5191 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_tcp); | 5636 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_tcp); |
5192 | tmp_stats[i++] = (u64)le32_to_cpu(stat_info->rmac_udp_oflow) << 32 | | 5637 | tmp_stats[i++] = |
5638 | (u64)le32_to_cpu(stat_info->rmac_udp_oflow) << 32 | | ||
5193 | le32_to_cpu(stat_info->rmac_udp); | 5639 | le32_to_cpu(stat_info->rmac_udp); |
5194 | tmp_stats[i++] = | 5640 | tmp_stats[i++] = |
5195 | (u64)le32_to_cpu(stat_info->rmac_err_drp_udp_oflow) << 32 | | 5641 | (u64)le32_to_cpu(stat_info->rmac_err_drp_udp_oflow) << 32 | |
5196 | le32_to_cpu(stat_info->rmac_err_drp_udp); | 5642 | le32_to_cpu(stat_info->rmac_err_drp_udp); |
5643 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_err_sym); | ||
5644 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q0); | ||
5645 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q1); | ||
5646 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q2); | ||
5647 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q3); | ||
5648 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q4); | ||
5649 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q5); | ||
5650 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q6); | ||
5651 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q7); | ||
5652 | tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q0); | ||
5653 | tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q1); | ||
5654 | tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q2); | ||
5655 | tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q3); | ||
5656 | tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q4); | ||
5657 | tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q5); | ||
5658 | tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q6); | ||
5659 | tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q7); | ||
5197 | tmp_stats[i++] = | 5660 | tmp_stats[i++] = |
5198 | (u64)le32_to_cpu(stat_info->rmac_pause_cnt_oflow) << 32 | | 5661 | (u64)le32_to_cpu(stat_info->rmac_pause_cnt_oflow) << 32 | |
5199 | le32_to_cpu(stat_info->rmac_pause_cnt); | 5662 | le32_to_cpu(stat_info->rmac_pause_cnt); |
5663 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_data_err_cnt); | ||
5664 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_ctrl_err_cnt); | ||
5200 | tmp_stats[i++] = | 5665 | tmp_stats[i++] = |
5201 | (u64)le32_to_cpu(stat_info->rmac_accepted_ip_oflow) << 32 | | 5666 | (u64)le32_to_cpu(stat_info->rmac_accepted_ip_oflow) << 32 | |
5202 | le32_to_cpu(stat_info->rmac_accepted_ip); | 5667 | le32_to_cpu(stat_info->rmac_accepted_ip); |
5203 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_err_tcp); | 5668 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_err_tcp); |
5669 | tmp_stats[i++] = le32_to_cpu(stat_info->rd_req_cnt); | ||
5670 | tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_cnt); | ||
5671 | tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_rtry_cnt); | ||
5672 | tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_cnt); | ||
5673 | tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_rd_ack_cnt); | ||
5674 | tmp_stats[i++] = le32_to_cpu(stat_info->wr_req_cnt); | ||
5675 | tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_cnt); | ||
5676 | tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_rtry_cnt); | ||
5677 | tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_cnt); | ||
5678 | tmp_stats[i++] = le32_to_cpu(stat_info->wr_disc_cnt); | ||
5679 | tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_wr_ack_cnt); | ||
5680 | tmp_stats[i++] = le32_to_cpu(stat_info->txp_wr_cnt); | ||
5681 | tmp_stats[i++] = le32_to_cpu(stat_info->txd_rd_cnt); | ||
5682 | tmp_stats[i++] = le32_to_cpu(stat_info->txd_wr_cnt); | ||
5683 | tmp_stats[i++] = le32_to_cpu(stat_info->rxd_rd_cnt); | ||
5684 | tmp_stats[i++] = le32_to_cpu(stat_info->rxd_wr_cnt); | ||
5685 | tmp_stats[i++] = le32_to_cpu(stat_info->txf_rd_cnt); | ||
5686 | tmp_stats[i++] = le32_to_cpu(stat_info->rxf_wr_cnt); | ||
5687 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_1519_4095_frms); | ||
5688 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_4096_8191_frms); | ||
5689 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_8192_max_frms); | ||
5690 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_gt_max_frms); | ||
5691 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_osized_alt_frms); | ||
5692 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_jabber_alt_frms); | ||
5693 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_gt_max_alt_frms); | ||
5694 | tmp_stats[i++] = le64_to_cpu(stat_info->rmac_vlan_frms); | ||
5695 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_len_discard); | ||
5696 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_fcs_discard); | ||
5697 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_pf_discard); | ||
5698 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_da_discard); | ||
5699 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_red_discard); | ||
5700 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_rts_discard); | ||
5701 | tmp_stats[i++] = le32_to_cpu(stat_info->rmac_ingm_full_discard); | ||
5702 | tmp_stats[i++] = le32_to_cpu(stat_info->link_fault_cnt); | ||
5204 | tmp_stats[i++] = 0; | 5703 | tmp_stats[i++] = 0; |
5205 | tmp_stats[i++] = stat_info->sw_stat.single_ecc_errs; | 5704 | tmp_stats[i++] = stat_info->sw_stat.single_ecc_errs; |
5206 | tmp_stats[i++] = stat_info->sw_stat.double_ecc_errs; | 5705 | tmp_stats[i++] = stat_info->sw_stat.double_ecc_errs; |
5706 | tmp_stats[i++] = stat_info->sw_stat.parity_err_cnt; | ||
5707 | tmp_stats[i++] = stat_info->sw_stat.serious_err_cnt; | ||
5708 | tmp_stats[i++] = stat_info->sw_stat.soft_reset_cnt; | ||
5709 | tmp_stats[i++] = stat_info->sw_stat.fifo_full_cnt; | ||
5710 | tmp_stats[i++] = stat_info->sw_stat.ring_full_cnt; | ||
5711 | tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_high; | ||
5712 | tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_low; | ||
5713 | tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_high; | ||
5714 | tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_low; | ||
5715 | tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_high; | ||
5716 | tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_low; | ||
5717 | tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_high; | ||
5718 | tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_low; | ||
5719 | tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_high; | ||
5720 | tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_low; | ||
5721 | tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_high; | ||
5722 | tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_low; | ||
5207 | tmp_stats[i++] = stat_info->sw_stat.clubbed_frms_cnt; | 5723 | tmp_stats[i++] = stat_info->sw_stat.clubbed_frms_cnt; |
5208 | tmp_stats[i++] = stat_info->sw_stat.sending_both; | 5724 | tmp_stats[i++] = stat_info->sw_stat.sending_both; |
5209 | tmp_stats[i++] = stat_info->sw_stat.outof_sequence_pkts; | 5725 | tmp_stats[i++] = stat_info->sw_stat.outof_sequence_pkts; |
5210 | tmp_stats[i++] = stat_info->sw_stat.flush_max_pkts; | 5726 | tmp_stats[i++] = stat_info->sw_stat.flush_max_pkts; |
5211 | tmp = 0; | ||
5212 | if (stat_info->sw_stat.num_aggregations) { | 5727 | if (stat_info->sw_stat.num_aggregations) { |
5213 | tmp = stat_info->sw_stat.sum_avg_pkts_aggregated; | 5728 | u64 tmp = stat_info->sw_stat.sum_avg_pkts_aggregated; |
5214 | do_div(tmp, stat_info->sw_stat.num_aggregations); | 5729 | int count = 0; |
5730 | /* | ||
5731 | * Since 64-bit divide does not work on all platforms, | ||
5732 | * do repeated subtraction. | ||
5733 | */ | ||
5734 | while (tmp >= stat_info->sw_stat.num_aggregations) { | ||
5735 | tmp -= stat_info->sw_stat.num_aggregations; | ||
5736 | count++; | ||
5737 | } | ||
5738 | tmp_stats[i++] = count; | ||
5215 | } | 5739 | } |
5216 | tmp_stats[i++] = tmp; | 5740 | else |
5741 | tmp_stats[i++] = 0; | ||
5217 | } | 5742 | } |
5218 | 5743 | ||
5219 | static int s2io_ethtool_get_regs_len(struct net_device *dev) | 5744 | static int s2io_ethtool_get_regs_len(struct net_device *dev) |
@@ -5351,7 +5876,7 @@ static int s2io_change_mtu(struct net_device *dev, int new_mtu) | |||
5351 | 5876 | ||
5352 | dev->mtu = new_mtu; | 5877 | dev->mtu = new_mtu; |
5353 | if (netif_running(dev)) { | 5878 | if (netif_running(dev)) { |
5354 | s2io_card_down(sp); | 5879 | s2io_card_down(sp, 0); |
5355 | netif_stop_queue(dev); | 5880 | netif_stop_queue(dev); |
5356 | if (s2io_card_up(sp)) { | 5881 | if (s2io_card_up(sp)) { |
5357 | DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n", | 5882 | DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n", |
@@ -5489,12 +6014,172 @@ static void s2io_set_link(unsigned long data) | |||
5489 | clear_bit(0, &(nic->link_state)); | 6014 | clear_bit(0, &(nic->link_state)); |
5490 | } | 6015 | } |
5491 | 6016 | ||
5492 | static void s2io_card_down(nic_t * sp) | 6017 | static int set_rxd_buffer_pointer(nic_t *sp, RxD_t *rxdp, buffAdd_t *ba, |
6018 | struct sk_buff **skb, u64 *temp0, u64 *temp1, | ||
6019 | u64 *temp2, int size) | ||
6020 | { | ||
6021 | struct net_device *dev = sp->dev; | ||
6022 | struct sk_buff *frag_list; | ||
6023 | |||
6024 | if ((sp->rxd_mode == RXD_MODE_1) && (rxdp->Host_Control == 0)) { | ||
6025 | /* allocate skb */ | ||
6026 | if (*skb) { | ||
6027 | DBG_PRINT(INFO_DBG, "SKB is not NULL\n"); | ||
6028 | /* | ||
6029 | * As Rx frame are not going to be processed, | ||
6030 | * using same mapped address for the Rxd | ||
6031 | * buffer pointer | ||
6032 | */ | ||
6033 | ((RxD1_t*)rxdp)->Buffer0_ptr = *temp0; | ||
6034 | } else { | ||
6035 | *skb = dev_alloc_skb(size); | ||
6036 | if (!(*skb)) { | ||
6037 | DBG_PRINT(ERR_DBG, "%s: Out of ", dev->name); | ||
6038 | DBG_PRINT(ERR_DBG, "memory to allocate SKBs\n"); | ||
6039 | return -ENOMEM ; | ||
6040 | } | ||
6041 | /* storing the mapped addr in a temp variable | ||
6042 | * such it will be used for next rxd whose | ||
6043 | * Host Control is NULL | ||
6044 | */ | ||
6045 | ((RxD1_t*)rxdp)->Buffer0_ptr = *temp0 = | ||
6046 | pci_map_single( sp->pdev, (*skb)->data, | ||
6047 | size - NET_IP_ALIGN, | ||
6048 | PCI_DMA_FROMDEVICE); | ||
6049 | rxdp->Host_Control = (unsigned long) (*skb); | ||
6050 | } | ||
6051 | } else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) { | ||
6052 | /* Two buffer Mode */ | ||
6053 | if (*skb) { | ||
6054 | ((RxD3_t*)rxdp)->Buffer2_ptr = *temp2; | ||
6055 | ((RxD3_t*)rxdp)->Buffer0_ptr = *temp0; | ||
6056 | ((RxD3_t*)rxdp)->Buffer1_ptr = *temp1; | ||
6057 | } else { | ||
6058 | *skb = dev_alloc_skb(size); | ||
6059 | ((RxD3_t*)rxdp)->Buffer2_ptr = *temp2 = | ||
6060 | pci_map_single(sp->pdev, (*skb)->data, | ||
6061 | dev->mtu + 4, | ||
6062 | PCI_DMA_FROMDEVICE); | ||
6063 | ((RxD3_t*)rxdp)->Buffer0_ptr = *temp0 = | ||
6064 | pci_map_single( sp->pdev, ba->ba_0, BUF0_LEN, | ||
6065 | PCI_DMA_FROMDEVICE); | ||
6066 | rxdp->Host_Control = (unsigned long) (*skb); | ||
6067 | |||
6068 | /* Buffer-1 will be dummy buffer not used */ | ||
6069 | ((RxD3_t*)rxdp)->Buffer1_ptr = *temp1 = | ||
6070 | pci_map_single(sp->pdev, ba->ba_1, BUF1_LEN, | ||
6071 | PCI_DMA_FROMDEVICE); | ||
6072 | } | ||
6073 | } else if ((rxdp->Host_Control == 0)) { | ||
6074 | /* Three buffer mode */ | ||
6075 | if (*skb) { | ||
6076 | ((RxD3_t*)rxdp)->Buffer0_ptr = *temp0; | ||
6077 | ((RxD3_t*)rxdp)->Buffer1_ptr = *temp1; | ||
6078 | ((RxD3_t*)rxdp)->Buffer2_ptr = *temp2; | ||
6079 | } else { | ||
6080 | *skb = dev_alloc_skb(size); | ||
6081 | |||
6082 | ((RxD3_t*)rxdp)->Buffer0_ptr = *temp0 = | ||
6083 | pci_map_single(sp->pdev, ba->ba_0, BUF0_LEN, | ||
6084 | PCI_DMA_FROMDEVICE); | ||
6085 | /* Buffer-1 receives L3/L4 headers */ | ||
6086 | ((RxD3_t*)rxdp)->Buffer1_ptr = *temp1 = | ||
6087 | pci_map_single( sp->pdev, (*skb)->data, | ||
6088 | l3l4hdr_size + 4, | ||
6089 | PCI_DMA_FROMDEVICE); | ||
6090 | /* | ||
6091 | * skb_shinfo(skb)->frag_list will have L4 | ||
6092 | * data payload | ||
6093 | */ | ||
6094 | skb_shinfo(*skb)->frag_list = dev_alloc_skb(dev->mtu + | ||
6095 | ALIGN_SIZE); | ||
6096 | if (skb_shinfo(*skb)->frag_list == NULL) { | ||
6097 | DBG_PRINT(ERR_DBG, "%s: dev_alloc_skb \ | ||
6098 | failed\n ", dev->name); | ||
6099 | return -ENOMEM ; | ||
6100 | } | ||
6101 | frag_list = skb_shinfo(*skb)->frag_list; | ||
6102 | frag_list->next = NULL; | ||
6103 | /* | ||
6104 | * Buffer-2 receives L4 data payload | ||
6105 | */ | ||
6106 | ((RxD3_t*)rxdp)->Buffer2_ptr = *temp2 = | ||
6107 | pci_map_single( sp->pdev, frag_list->data, | ||
6108 | dev->mtu, PCI_DMA_FROMDEVICE); | ||
6109 | } | ||
6110 | } | ||
6111 | return 0; | ||
6112 | } | ||
6113 | static void set_rxd_buffer_size(nic_t *sp, RxD_t *rxdp, int size) | ||
6114 | { | ||
6115 | struct net_device *dev = sp->dev; | ||
6116 | if (sp->rxd_mode == RXD_MODE_1) { | ||
6117 | rxdp->Control_2 = SET_BUFFER0_SIZE_1( size - NET_IP_ALIGN); | ||
6118 | } else if (sp->rxd_mode == RXD_MODE_3B) { | ||
6119 | rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN); | ||
6120 | rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1); | ||
6121 | rxdp->Control_2 |= SET_BUFFER2_SIZE_3( dev->mtu + 4); | ||
6122 | } else { | ||
6123 | rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN); | ||
6124 | rxdp->Control_2 |= SET_BUFFER1_SIZE_3(l3l4hdr_size + 4); | ||
6125 | rxdp->Control_2 |= SET_BUFFER2_SIZE_3(dev->mtu); | ||
6126 | } | ||
6127 | } | ||
6128 | |||
6129 | static int rxd_owner_bit_reset(nic_t *sp) | ||
6130 | { | ||
6131 | int i, j, k, blk_cnt = 0, size; | ||
6132 | mac_info_t * mac_control = &sp->mac_control; | ||
6133 | struct config_param *config = &sp->config; | ||
6134 | struct net_device *dev = sp->dev; | ||
6135 | RxD_t *rxdp = NULL; | ||
6136 | struct sk_buff *skb = NULL; | ||
6137 | buffAdd_t *ba = NULL; | ||
6138 | u64 temp0_64 = 0, temp1_64 = 0, temp2_64 = 0; | ||
6139 | |||
6140 | /* Calculate the size based on ring mode */ | ||
6141 | size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE + | ||
6142 | HEADER_802_2_SIZE + HEADER_SNAP_SIZE; | ||
6143 | if (sp->rxd_mode == RXD_MODE_1) | ||
6144 | size += NET_IP_ALIGN; | ||
6145 | else if (sp->rxd_mode == RXD_MODE_3B) | ||
6146 | size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4; | ||
6147 | else | ||
6148 | size = l3l4hdr_size + ALIGN_SIZE + BUF0_LEN + 4; | ||
6149 | |||
6150 | for (i = 0; i < config->rx_ring_num; i++) { | ||
6151 | blk_cnt = config->rx_cfg[i].num_rxd / | ||
6152 | (rxd_count[sp->rxd_mode] +1); | ||
6153 | |||
6154 | for (j = 0; j < blk_cnt; j++) { | ||
6155 | for (k = 0; k < rxd_count[sp->rxd_mode]; k++) { | ||
6156 | rxdp = mac_control->rings[i]. | ||
6157 | rx_blocks[j].rxds[k].virt_addr; | ||
6158 | if(sp->rxd_mode >= RXD_MODE_3A) | ||
6159 | ba = &mac_control->rings[i].ba[j][k]; | ||
6160 | set_rxd_buffer_pointer(sp, rxdp, ba, | ||
6161 | &skb,(u64 *)&temp0_64, | ||
6162 | (u64 *)&temp1_64, | ||
6163 | (u64 *)&temp2_64, size); | ||
6164 | |||
6165 | set_rxd_buffer_size(sp, rxdp, size); | ||
6166 | wmb(); | ||
6167 | /* flip the Ownership bit to Hardware */ | ||
6168 | rxdp->Control_1 |= RXD_OWN_XENA; | ||
6169 | } | ||
6170 | } | ||
6171 | } | ||
6172 | return 0; | ||
6173 | |||
6174 | } | ||
6175 | |||
6176 | static void s2io_card_down(nic_t * sp, int flag) | ||
5493 | { | 6177 | { |
5494 | int cnt = 0; | 6178 | int cnt = 0; |
5495 | XENA_dev_config_t __iomem *bar0 = sp->bar0; | 6179 | XENA_dev_config_t __iomem *bar0 = sp->bar0; |
5496 | unsigned long flags; | 6180 | unsigned long flags; |
5497 | register u64 val64 = 0; | 6181 | register u64 val64 = 0; |
6182 | struct net_device *dev = sp->dev; | ||
5498 | 6183 | ||
5499 | del_timer_sync(&sp->alarm_timer); | 6184 | del_timer_sync(&sp->alarm_timer); |
5500 | /* If s2io_set_link task is executing, wait till it completes. */ | 6185 | /* If s2io_set_link task is executing, wait till it completes. */ |
@@ -5505,12 +6190,51 @@ static void s2io_card_down(nic_t * sp) | |||
5505 | 6190 | ||
5506 | /* disable Tx and Rx traffic on the NIC */ | 6191 | /* disable Tx and Rx traffic on the NIC */ |
5507 | stop_nic(sp); | 6192 | stop_nic(sp); |
6193 | if (flag) { | ||
6194 | if (sp->intr_type == MSI_X) { | ||
6195 | int i; | ||
6196 | u16 msi_control; | ||
6197 | |||
6198 | for (i=1; (sp->s2io_entries[i].in_use == | ||
6199 | MSIX_REGISTERED_SUCCESS); i++) { | ||
6200 | int vector = sp->entries[i].vector; | ||
6201 | void *arg = sp->s2io_entries[i].arg; | ||
6202 | |||
6203 | free_irq(vector, arg); | ||
6204 | } | ||
6205 | pci_read_config_word(sp->pdev, 0x42, &msi_control); | ||
6206 | msi_control &= 0xFFFE; /* Disable MSI */ | ||
6207 | pci_write_config_word(sp->pdev, 0x42, msi_control); | ||
6208 | pci_disable_msix(sp->pdev); | ||
6209 | } else { | ||
6210 | free_irq(sp->pdev->irq, dev); | ||
6211 | if (sp->intr_type == MSI) | ||
6212 | pci_disable_msi(sp->pdev); | ||
6213 | } | ||
6214 | } | ||
6215 | /* Waiting till all Interrupt handlers are complete */ | ||
6216 | cnt = 0; | ||
6217 | do { | ||
6218 | msleep(10); | ||
6219 | if (!atomic_read(&sp->isr_cnt)) | ||
6220 | break; | ||
6221 | cnt++; | ||
6222 | } while(cnt < 5); | ||
5508 | 6223 | ||
5509 | /* Kill tasklet. */ | 6224 | /* Kill tasklet. */ |
5510 | tasklet_kill(&sp->task); | 6225 | tasklet_kill(&sp->task); |
5511 | 6226 | ||
5512 | /* Check if the device is Quiescent and then Reset the NIC */ | 6227 | /* Check if the device is Quiescent and then Reset the NIC */ |
5513 | do { | 6228 | do { |
6229 | /* As per the HW requirement we need to replenish the | ||
6230 | * receive buffer to avoid the ring bump. Since there is | ||
6231 | * no intention of processing the Rx frame at this pointwe are | ||
6232 | * just settting the ownership bit of rxd in Each Rx | ||
6233 | * ring to HW and set the appropriate buffer size | ||
6234 | * based on the ring mode | ||
6235 | */ | ||
6236 | rxd_owner_bit_reset(sp); | ||
6237 | |||
5514 | val64 = readq(&bar0->adapter_status); | 6238 | val64 = readq(&bar0->adapter_status); |
5515 | if (verify_xena_quiescence(sp, val64, sp->device_enabled_once)) { | 6239 | if (verify_xena_quiescence(sp, val64, sp->device_enabled_once)) { |
5516 | break; | 6240 | break; |
@@ -5528,15 +6252,6 @@ static void s2io_card_down(nic_t * sp) | |||
5528 | } while (1); | 6252 | } while (1); |
5529 | s2io_reset(sp); | 6253 | s2io_reset(sp); |
5530 | 6254 | ||
5531 | /* Waiting till all Interrupt handlers are complete */ | ||
5532 | cnt = 0; | ||
5533 | do { | ||
5534 | msleep(10); | ||
5535 | if (!atomic_read(&sp->isr_cnt)) | ||
5536 | break; | ||
5537 | cnt++; | ||
5538 | } while(cnt < 5); | ||
5539 | |||
5540 | spin_lock_irqsave(&sp->tx_lock, flags); | 6255 | spin_lock_irqsave(&sp->tx_lock, flags); |
5541 | /* Free all Tx buffers */ | 6256 | /* Free all Tx buffers */ |
5542 | free_tx_buffers(sp); | 6257 | free_tx_buffers(sp); |
@@ -5637,7 +6352,7 @@ static void s2io_restart_nic(unsigned long data) | |||
5637 | struct net_device *dev = (struct net_device *) data; | 6352 | struct net_device *dev = (struct net_device *) data; |
5638 | nic_t *sp = dev->priv; | 6353 | nic_t *sp = dev->priv; |
5639 | 6354 | ||
5640 | s2io_card_down(sp); | 6355 | s2io_card_down(sp, 0); |
5641 | if (s2io_card_up(sp)) { | 6356 | if (s2io_card_up(sp)) { |
5642 | DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n", | 6357 | DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n", |
5643 | dev->name); | 6358 | dev->name); |
@@ -5667,6 +6382,7 @@ static void s2io_tx_watchdog(struct net_device *dev) | |||
5667 | 6382 | ||
5668 | if (netif_carrier_ok(dev)) { | 6383 | if (netif_carrier_ok(dev)) { |
5669 | schedule_work(&sp->rst_timer_task); | 6384 | schedule_work(&sp->rst_timer_task); |
6385 | sp->mac_control.stats_info->sw_stat.soft_reset_cnt++; | ||
5670 | } | 6386 | } |
5671 | } | 6387 | } |
5672 | 6388 | ||
@@ -5695,18 +6411,33 @@ static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp) | |||
5695 | ((unsigned long) rxdp->Host_Control); | 6411 | ((unsigned long) rxdp->Host_Control); |
5696 | int ring_no = ring_data->ring_no; | 6412 | int ring_no = ring_data->ring_no; |
5697 | u16 l3_csum, l4_csum; | 6413 | u16 l3_csum, l4_csum; |
6414 | unsigned long long err = rxdp->Control_1 & RXD_T_CODE; | ||
5698 | lro_t *lro; | 6415 | lro_t *lro; |
5699 | 6416 | ||
5700 | skb->dev = dev; | 6417 | skb->dev = dev; |
5701 | if (rxdp->Control_1 & RXD_T_CODE) { | 6418 | |
5702 | unsigned long long err = rxdp->Control_1 & RXD_T_CODE; | 6419 | if (err) { |
5703 | DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%llx\n", | 6420 | /* Check for parity error */ |
5704 | dev->name, err); | 6421 | if (err & 0x1) { |
5705 | dev_kfree_skb(skb); | 6422 | sp->mac_control.stats_info->sw_stat.parity_err_cnt++; |
5706 | sp->stats.rx_crc_errors++; | 6423 | } |
5707 | atomic_dec(&sp->rx_bufs_left[ring_no]); | 6424 | |
5708 | rxdp->Host_Control = 0; | 6425 | /* |
5709 | return 0; | 6426 | * Drop the packet if bad transfer code. Exception being |
6427 | * 0x5, which could be due to unsupported IPv6 extension header. | ||
6428 | * In this case, we let stack handle the packet. | ||
6429 | * Note that in this case, since checksum will be incorrect, | ||
6430 | * stack will validate the same. | ||
6431 | */ | ||
6432 | if (err && ((err >> 48) != 0x5)) { | ||
6433 | DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%llx\n", | ||
6434 | dev->name, err); | ||
6435 | sp->stats.rx_crc_errors++; | ||
6436 | dev_kfree_skb(skb); | ||
6437 | atomic_dec(&sp->rx_bufs_left[ring_no]); | ||
6438 | rxdp->Host_Control = 0; | ||
6439 | return 0; | ||
6440 | } | ||
5710 | } | 6441 | } |
5711 | 6442 | ||
5712 | /* Updating statistics */ | 6443 | /* Updating statistics */ |
@@ -5792,6 +6523,9 @@ static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp) | |||
5792 | clear_lro_session(lro); | 6523 | clear_lro_session(lro); |
5793 | goto send_up; | 6524 | goto send_up; |
5794 | case 0: /* sessions exceeded */ | 6525 | case 0: /* sessions exceeded */ |
6526 | case -1: /* non-TCP or not | ||
6527 | * L2 aggregatable | ||
6528 | */ | ||
5795 | case 5: /* | 6529 | case 5: /* |
5796 | * First pkt in session not | 6530 | * First pkt in session not |
5797 | * L3/L4 aggregatable | 6531 | * L3/L4 aggregatable |
@@ -5918,13 +6652,6 @@ static void s2io_init_pci(nic_t * sp) | |||
5918 | pci_write_config_word(sp->pdev, PCI_COMMAND, | 6652 | pci_write_config_word(sp->pdev, PCI_COMMAND, |
5919 | (pci_cmd | PCI_COMMAND_PARITY)); | 6653 | (pci_cmd | PCI_COMMAND_PARITY)); |
5920 | pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd); | 6654 | pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd); |
5921 | |||
5922 | /* Forcibly disabling relaxed ordering capability of the card. */ | ||
5923 | pcix_cmd &= 0xfffd; | ||
5924 | pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, | ||
5925 | pcix_cmd); | ||
5926 | pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, | ||
5927 | &(pcix_cmd)); | ||
5928 | } | 6655 | } |
5929 | 6656 | ||
5930 | MODULE_AUTHOR("Raghavendra Koushik <raghavendra.koushik@neterion.com>"); | 6657 | MODULE_AUTHOR("Raghavendra Koushik <raghavendra.koushik@neterion.com>"); |
@@ -5954,6 +6681,55 @@ module_param(intr_type, int, 0); | |||
5954 | module_param(lro, int, 0); | 6681 | module_param(lro, int, 0); |
5955 | module_param(lro_max_pkts, int, 0); | 6682 | module_param(lro_max_pkts, int, 0); |
5956 | 6683 | ||
6684 | static int s2io_verify_parm(struct pci_dev *pdev, u8 *dev_intr_type) | ||
6685 | { | ||
6686 | if ( tx_fifo_num > 8) { | ||
6687 | DBG_PRINT(ERR_DBG, "s2io: Requested number of Tx fifos not " | ||
6688 | "supported\n"); | ||
6689 | DBG_PRINT(ERR_DBG, "s2io: Default to 8 Tx fifos\n"); | ||
6690 | tx_fifo_num = 8; | ||
6691 | } | ||
6692 | if ( rx_ring_num > 8) { | ||
6693 | DBG_PRINT(ERR_DBG, "s2io: Requested number of Rx rings not " | ||
6694 | "supported\n"); | ||
6695 | DBG_PRINT(ERR_DBG, "s2io: Default to 8 Rx rings\n"); | ||
6696 | rx_ring_num = 8; | ||
6697 | } | ||
6698 | #ifdef CONFIG_S2IO_NAPI | ||
6699 | if (*dev_intr_type != INTA) { | ||
6700 | DBG_PRINT(ERR_DBG, "s2io: NAPI cannot be enabled when " | ||
6701 | "MSI/MSI-X is enabled. Defaulting to INTA\n"); | ||
6702 | *dev_intr_type = INTA; | ||
6703 | } | ||
6704 | #endif | ||
6705 | #ifndef CONFIG_PCI_MSI | ||
6706 | if (*dev_intr_type != INTA) { | ||
6707 | DBG_PRINT(ERR_DBG, "s2io: This kernel does not support" | ||
6708 | "MSI/MSI-X. Defaulting to INTA\n"); | ||
6709 | *dev_intr_type = INTA; | ||
6710 | } | ||
6711 | #else | ||
6712 | if (*dev_intr_type > MSI_X) { | ||
6713 | DBG_PRINT(ERR_DBG, "s2io: Wrong intr_type requested. " | ||
6714 | "Defaulting to INTA\n"); | ||
6715 | *dev_intr_type = INTA; | ||
6716 | } | ||
6717 | #endif | ||
6718 | if ((*dev_intr_type == MSI_X) && | ||
6719 | ((pdev->device != PCI_DEVICE_ID_HERC_WIN) && | ||
6720 | (pdev->device != PCI_DEVICE_ID_HERC_UNI))) { | ||
6721 | DBG_PRINT(ERR_DBG, "s2io: Xframe I does not support MSI_X. " | ||
6722 | "Defaulting to INTA\n"); | ||
6723 | *dev_intr_type = INTA; | ||
6724 | } | ||
6725 | if (rx_ring_mode > 3) { | ||
6726 | DBG_PRINT(ERR_DBG, "s2io: Requested ring mode not supported\n"); | ||
6727 | DBG_PRINT(ERR_DBG, "s2io: Defaulting to 3-buffer mode\n"); | ||
6728 | rx_ring_mode = 3; | ||
6729 | } | ||
6730 | return SUCCESS; | ||
6731 | } | ||
6732 | |||
5957 | /** | 6733 | /** |
5958 | * s2io_init_nic - Initialization of the adapter . | 6734 | * s2io_init_nic - Initialization of the adapter . |
5959 | * @pdev : structure containing the PCI related information of the device. | 6735 | * @pdev : structure containing the PCI related information of the device. |
@@ -5984,15 +6760,8 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
5984 | int mode; | 6760 | int mode; |
5985 | u8 dev_intr_type = intr_type; | 6761 | u8 dev_intr_type = intr_type; |
5986 | 6762 | ||
5987 | #ifdef CONFIG_S2IO_NAPI | 6763 | if ((ret = s2io_verify_parm(pdev, &dev_intr_type))) |
5988 | if (dev_intr_type != INTA) { | 6764 | return ret; |
5989 | DBG_PRINT(ERR_DBG, "NAPI cannot be enabled when MSI/MSI-X \ | ||
5990 | is enabled. Defaulting to INTA\n"); | ||
5991 | dev_intr_type = INTA; | ||
5992 | } | ||
5993 | else | ||
5994 | DBG_PRINT(ERR_DBG, "NAPI support has been enabled\n"); | ||
5995 | #endif | ||
5996 | 6765 | ||
5997 | if ((ret = pci_enable_device(pdev))) { | 6766 | if ((ret = pci_enable_device(pdev))) { |
5998 | DBG_PRINT(ERR_DBG, | 6767 | DBG_PRINT(ERR_DBG, |
@@ -6017,14 +6786,6 @@ is enabled. Defaulting to INTA\n"); | |||
6017 | pci_disable_device(pdev); | 6786 | pci_disable_device(pdev); |
6018 | return -ENOMEM; | 6787 | return -ENOMEM; |
6019 | } | 6788 | } |
6020 | |||
6021 | if ((dev_intr_type == MSI_X) && | ||
6022 | ((pdev->device != PCI_DEVICE_ID_HERC_WIN) && | ||
6023 | (pdev->device != PCI_DEVICE_ID_HERC_UNI))) { | ||
6024 | DBG_PRINT(ERR_DBG, "Xframe I does not support MSI_X. \ | ||
6025 | Defaulting to INTA\n"); | ||
6026 | dev_intr_type = INTA; | ||
6027 | } | ||
6028 | if (dev_intr_type != MSI_X) { | 6789 | if (dev_intr_type != MSI_X) { |
6029 | if (pci_request_regions(pdev, s2io_driver_name)) { | 6790 | if (pci_request_regions(pdev, s2io_driver_name)) { |
6030 | DBG_PRINT(ERR_DBG, "Request Regions failed\n"), | 6791 | DBG_PRINT(ERR_DBG, "Request Regions failed\n"), |
@@ -6100,8 +6861,6 @@ Defaulting to INTA\n"); | |||
6100 | config = &sp->config; | 6861 | config = &sp->config; |
6101 | 6862 | ||
6102 | /* Tx side parameters. */ | 6863 | /* Tx side parameters. */ |
6103 | if (tx_fifo_len[0] == 0) | ||
6104 | tx_fifo_len[0] = DEFAULT_FIFO_LEN; /* Default value. */ | ||
6105 | config->tx_fifo_num = tx_fifo_num; | 6864 | config->tx_fifo_num = tx_fifo_num; |
6106 | for (i = 0; i < MAX_TX_FIFOS; i++) { | 6865 | for (i = 0; i < MAX_TX_FIFOS; i++) { |
6107 | config->tx_cfg[i].fifo_len = tx_fifo_len[i]; | 6866 | config->tx_cfg[i].fifo_len = tx_fifo_len[i]; |
@@ -6125,8 +6884,6 @@ Defaulting to INTA\n"); | |||
6125 | config->max_txds = MAX_SKB_FRAGS + 2; | 6884 | config->max_txds = MAX_SKB_FRAGS + 2; |
6126 | 6885 | ||
6127 | /* Rx side parameters. */ | 6886 | /* Rx side parameters. */ |
6128 | if (rx_ring_sz[0] == 0) | ||
6129 | rx_ring_sz[0] = SMALL_BLK_CNT; /* Default value. */ | ||
6130 | config->rx_ring_num = rx_ring_num; | 6887 | config->rx_ring_num = rx_ring_num; |
6131 | for (i = 0; i < MAX_RX_RINGS; i++) { | 6888 | for (i = 0; i < MAX_RX_RINGS; i++) { |
6132 | config->rx_cfg[i].num_rxd = rx_ring_sz[i] * | 6889 | config->rx_cfg[i].num_rxd = rx_ring_sz[i] * |
@@ -6267,8 +7024,8 @@ Defaulting to INTA\n"); | |||
6267 | val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD | | 7024 | val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD | |
6268 | RMAC_ADDR_CMD_MEM_OFFSET(0 + MAC_MAC_ADDR_START_OFFSET); | 7025 | RMAC_ADDR_CMD_MEM_OFFSET(0 + MAC_MAC_ADDR_START_OFFSET); |
6269 | writeq(val64, &bar0->rmac_addr_cmd_mem); | 7026 | writeq(val64, &bar0->rmac_addr_cmd_mem); |
6270 | wait_for_cmd_complete(sp); | 7027 | wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, |
6271 | 7028 | RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING); | |
6272 | tmp64 = readq(&bar0->rmac_addr_data0_mem); | 7029 | tmp64 = readq(&bar0->rmac_addr_data0_mem); |
6273 | mac_down = (u32) tmp64; | 7030 | mac_down = (u32) tmp64; |
6274 | mac_up = (u32) (tmp64 >> 32); | 7031 | mac_up = (u32) (tmp64 >> 32); |
@@ -6322,82 +7079,63 @@ Defaulting to INTA\n"); | |||
6322 | ret = -ENODEV; | 7079 | ret = -ENODEV; |
6323 | goto register_failed; | 7080 | goto register_failed; |
6324 | } | 7081 | } |
6325 | 7082 | s2io_vpd_read(sp); | |
6326 | if (sp->device_type & XFRAME_II_DEVICE) { | 7083 | DBG_PRINT(ERR_DBG, "%s: Neterion %s",dev->name, sp->product_name); |
6327 | DBG_PRINT(ERR_DBG, "%s: Neterion Xframe II 10GbE adapter ", | 7084 | DBG_PRINT(ERR_DBG, "(rev %d), Driver version %s\n", |
6328 | dev->name); | ||
6329 | DBG_PRINT(ERR_DBG, "(rev %d), Version %s", | ||
6330 | get_xena_rev_id(sp->pdev), | 7085 | get_xena_rev_id(sp->pdev), |
6331 | s2io_driver_version); | 7086 | s2io_driver_version); |
6332 | switch(sp->intr_type) { | 7087 | DBG_PRINT(ERR_DBG, "Copyright(c) 2002-2005 Neterion Inc.\n"); |
6333 | case INTA: | 7088 | DBG_PRINT(ERR_DBG, "%s: MAC ADDR: " |
6334 | DBG_PRINT(ERR_DBG, ", Intr type INTA"); | 7089 | "%02x:%02x:%02x:%02x:%02x:%02x\n", dev->name, |
6335 | break; | ||
6336 | case MSI: | ||
6337 | DBG_PRINT(ERR_DBG, ", Intr type MSI"); | ||
6338 | break; | ||
6339 | case MSI_X: | ||
6340 | DBG_PRINT(ERR_DBG, ", Intr type MSI-X"); | ||
6341 | break; | ||
6342 | } | ||
6343 | |||
6344 | DBG_PRINT(ERR_DBG, "\nCopyright(c) 2002-2005 Neterion Inc.\n"); | ||
6345 | DBG_PRINT(ERR_DBG, "MAC ADDR: %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
6346 | sp->def_mac_addr[0].mac_addr[0], | 7090 | sp->def_mac_addr[0].mac_addr[0], |
6347 | sp->def_mac_addr[0].mac_addr[1], | 7091 | sp->def_mac_addr[0].mac_addr[1], |
6348 | sp->def_mac_addr[0].mac_addr[2], | 7092 | sp->def_mac_addr[0].mac_addr[2], |
6349 | sp->def_mac_addr[0].mac_addr[3], | 7093 | sp->def_mac_addr[0].mac_addr[3], |
6350 | sp->def_mac_addr[0].mac_addr[4], | 7094 | sp->def_mac_addr[0].mac_addr[4], |
6351 | sp->def_mac_addr[0].mac_addr[5]); | 7095 | sp->def_mac_addr[0].mac_addr[5]); |
7096 | if (sp->device_type & XFRAME_II_DEVICE) { | ||
6352 | mode = s2io_print_pci_mode(sp); | 7097 | mode = s2io_print_pci_mode(sp); |
6353 | if (mode < 0) { | 7098 | if (mode < 0) { |
6354 | DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode "); | 7099 | DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n"); |
6355 | ret = -EBADSLT; | 7100 | ret = -EBADSLT; |
7101 | unregister_netdev(dev); | ||
6356 | goto set_swap_failed; | 7102 | goto set_swap_failed; |
6357 | } | 7103 | } |
6358 | } else { | ||
6359 | DBG_PRINT(ERR_DBG, "%s: Neterion Xframe I 10GbE adapter ", | ||
6360 | dev->name); | ||
6361 | DBG_PRINT(ERR_DBG, "(rev %d), Version %s", | ||
6362 | get_xena_rev_id(sp->pdev), | ||
6363 | s2io_driver_version); | ||
6364 | switch(sp->intr_type) { | ||
6365 | case INTA: | ||
6366 | DBG_PRINT(ERR_DBG, ", Intr type INTA"); | ||
6367 | break; | ||
6368 | case MSI: | ||
6369 | DBG_PRINT(ERR_DBG, ", Intr type MSI"); | ||
6370 | break; | ||
6371 | case MSI_X: | ||
6372 | DBG_PRINT(ERR_DBG, ", Intr type MSI-X"); | ||
6373 | break; | ||
6374 | } | ||
6375 | DBG_PRINT(ERR_DBG, "\nCopyright(c) 2002-2005 Neterion Inc.\n"); | ||
6376 | DBG_PRINT(ERR_DBG, "MAC ADDR: %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
6377 | sp->def_mac_addr[0].mac_addr[0], | ||
6378 | sp->def_mac_addr[0].mac_addr[1], | ||
6379 | sp->def_mac_addr[0].mac_addr[2], | ||
6380 | sp->def_mac_addr[0].mac_addr[3], | ||
6381 | sp->def_mac_addr[0].mac_addr[4], | ||
6382 | sp->def_mac_addr[0].mac_addr[5]); | ||
6383 | } | 7104 | } |
6384 | if (sp->rxd_mode == RXD_MODE_3B) | 7105 | switch(sp->rxd_mode) { |
6385 | DBG_PRINT(ERR_DBG, "%s: 2-Buffer mode support has been " | 7106 | case RXD_MODE_1: |
6386 | "enabled\n",dev->name); | 7107 | DBG_PRINT(ERR_DBG, "%s: 1-Buffer receive mode enabled\n", |
6387 | if (sp->rxd_mode == RXD_MODE_3A) | 7108 | dev->name); |
6388 | DBG_PRINT(ERR_DBG, "%s: 3-Buffer mode support has been " | 7109 | break; |
6389 | "enabled\n",dev->name); | 7110 | case RXD_MODE_3B: |
6390 | 7111 | DBG_PRINT(ERR_DBG, "%s: 2-Buffer receive mode enabled\n", | |
7112 | dev->name); | ||
7113 | break; | ||
7114 | case RXD_MODE_3A: | ||
7115 | DBG_PRINT(ERR_DBG, "%s: 3-Buffer receive mode enabled\n", | ||
7116 | dev->name); | ||
7117 | break; | ||
7118 | } | ||
7119 | #ifdef CONFIG_S2IO_NAPI | ||
7120 | DBG_PRINT(ERR_DBG, "%s: NAPI enabled\n", dev->name); | ||
7121 | #endif | ||
7122 | switch(sp->intr_type) { | ||
7123 | case INTA: | ||
7124 | DBG_PRINT(ERR_DBG, "%s: Interrupt type INTA\n", dev->name); | ||
7125 | break; | ||
7126 | case MSI: | ||
7127 | DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI\n", dev->name); | ||
7128 | break; | ||
7129 | case MSI_X: | ||
7130 | DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI-X\n", dev->name); | ||
7131 | break; | ||
7132 | } | ||
6391 | if (sp->lro) | 7133 | if (sp->lro) |
6392 | DBG_PRINT(ERR_DBG, "%s: Large receive offload enabled\n", | 7134 | DBG_PRINT(ERR_DBG, "%s: Large receive offload enabled\n", |
6393 | dev->name); | 7135 | dev->name); |
6394 | 7136 | ||
6395 | /* Initialize device name */ | 7137 | /* Initialize device name */ |
6396 | strcpy(sp->name, dev->name); | 7138 | sprintf(sp->name, "%s Neterion %s", dev->name, sp->product_name); |
6397 | if (sp->device_type & XFRAME_II_DEVICE) | ||
6398 | strcat(sp->name, ": Neterion Xframe II 10GbE adapter"); | ||
6399 | else | ||
6400 | strcat(sp->name, ": Neterion Xframe I 10GbE adapter"); | ||
6401 | 7139 | ||
6402 | /* Initialize bimodal Interrupts */ | 7140 | /* Initialize bimodal Interrupts */ |
6403 | sp->config.bimodal = bimodal; | 7141 | sp->config.bimodal = bimodal; |
diff --git a/drivers/net/s2io.h b/drivers/net/s2io.h index 0a0b5b29d81e..3203732a668d 100644 --- a/drivers/net/s2io.h +++ b/drivers/net/s2io.h | |||
@@ -31,6 +31,8 @@ | |||
31 | #define SUCCESS 0 | 31 | #define SUCCESS 0 |
32 | #define FAILURE -1 | 32 | #define FAILURE -1 |
33 | 33 | ||
34 | #define CHECKBIT(value, nbit) (value & (1 << nbit)) | ||
35 | |||
34 | /* Maximum time to flicker LED when asked to identify NIC using ethtool */ | 36 | /* Maximum time to flicker LED when asked to identify NIC using ethtool */ |
35 | #define MAX_FLICKER_TIME 60000 /* 60 Secs */ | 37 | #define MAX_FLICKER_TIME 60000 /* 60 Secs */ |
36 | 38 | ||
@@ -78,6 +80,11 @@ static int debug_level = ERR_DBG; | |||
78 | typedef struct { | 80 | typedef struct { |
79 | unsigned long long single_ecc_errs; | 81 | unsigned long long single_ecc_errs; |
80 | unsigned long long double_ecc_errs; | 82 | unsigned long long double_ecc_errs; |
83 | unsigned long long parity_err_cnt; | ||
84 | unsigned long long serious_err_cnt; | ||
85 | unsigned long long soft_reset_cnt; | ||
86 | unsigned long long fifo_full_cnt; | ||
87 | unsigned long long ring_full_cnt; | ||
81 | /* LRO statistics */ | 88 | /* LRO statistics */ |
82 | unsigned long long clubbed_frms_cnt; | 89 | unsigned long long clubbed_frms_cnt; |
83 | unsigned long long sending_both; | 90 | unsigned long long sending_both; |
@@ -87,6 +94,25 @@ typedef struct { | |||
87 | unsigned long long num_aggregations; | 94 | unsigned long long num_aggregations; |
88 | } swStat_t; | 95 | } swStat_t; |
89 | 96 | ||
97 | /* Xpak releated alarm and warnings */ | ||
98 | typedef struct { | ||
99 | u64 alarm_transceiver_temp_high; | ||
100 | u64 alarm_transceiver_temp_low; | ||
101 | u64 alarm_laser_bias_current_high; | ||
102 | u64 alarm_laser_bias_current_low; | ||
103 | u64 alarm_laser_output_power_high; | ||
104 | u64 alarm_laser_output_power_low; | ||
105 | u64 warn_transceiver_temp_high; | ||
106 | u64 warn_transceiver_temp_low; | ||
107 | u64 warn_laser_bias_current_high; | ||
108 | u64 warn_laser_bias_current_low; | ||
109 | u64 warn_laser_output_power_high; | ||
110 | u64 warn_laser_output_power_low; | ||
111 | u64 xpak_regs_stat; | ||
112 | u32 xpak_timer_count; | ||
113 | } xpakStat_t; | ||
114 | |||
115 | |||
90 | /* The statistics block of Xena */ | 116 | /* The statistics block of Xena */ |
91 | typedef struct stat_block { | 117 | typedef struct stat_block { |
92 | /* Tx MAC statistics counters. */ | 118 | /* Tx MAC statistics counters. */ |
@@ -263,7 +289,9 @@ typedef struct stat_block { | |||
263 | u32 rmac_accepted_ip_oflow; | 289 | u32 rmac_accepted_ip_oflow; |
264 | u32 reserved_14; | 290 | u32 reserved_14; |
265 | u32 link_fault_cnt; | 291 | u32 link_fault_cnt; |
292 | u8 buffer[20]; | ||
266 | swStat_t sw_stat; | 293 | swStat_t sw_stat; |
294 | xpakStat_t xpak_stat; | ||
267 | } StatInfo_t; | 295 | } StatInfo_t; |
268 | 296 | ||
269 | /* | 297 | /* |
@@ -659,7 +687,8 @@ typedef struct { | |||
659 | } usr_addr_t; | 687 | } usr_addr_t; |
660 | 688 | ||
661 | /* Default Tunable parameters of the NIC. */ | 689 | /* Default Tunable parameters of the NIC. */ |
662 | #define DEFAULT_FIFO_LEN 4096 | 690 | #define DEFAULT_FIFO_0_LEN 4096 |
691 | #define DEFAULT_FIFO_1_7_LEN 512 | ||
663 | #define SMALL_BLK_CNT 30 | 692 | #define SMALL_BLK_CNT 30 |
664 | #define LARGE_BLK_CNT 100 | 693 | #define LARGE_BLK_CNT 100 |
665 | 694 | ||
@@ -732,7 +761,7 @@ struct s2io_nic { | |||
732 | int device_close_flag; | 761 | int device_close_flag; |
733 | int device_enabled_once; | 762 | int device_enabled_once; |
734 | 763 | ||
735 | char name[50]; | 764 | char name[60]; |
736 | struct tasklet_struct task; | 765 | struct tasklet_struct task; |
737 | volatile unsigned long tasklet_status; | 766 | volatile unsigned long tasklet_status; |
738 | 767 | ||
@@ -803,6 +832,8 @@ struct s2io_nic { | |||
803 | char desc1[35]; | 832 | char desc1[35]; |
804 | char desc2[35]; | 833 | char desc2[35]; |
805 | 834 | ||
835 | int avail_msix_vectors; /* No. of MSI-X vectors granted by system */ | ||
836 | |||
806 | struct msix_info_st msix_info[0x3f]; | 837 | struct msix_info_st msix_info[0x3f]; |
807 | 838 | ||
808 | #define XFRAME_I_DEVICE 1 | 839 | #define XFRAME_I_DEVICE 1 |
@@ -824,6 +855,8 @@ struct s2io_nic { | |||
824 | spinlock_t rx_lock; | 855 | spinlock_t rx_lock; |
825 | atomic_t isr_cnt; | 856 | atomic_t isr_cnt; |
826 | u64 *ufo_in_band_v; | 857 | u64 *ufo_in_band_v; |
858 | #define VPD_PRODUCT_NAME_LEN 50 | ||
859 | u8 product_name[VPD_PRODUCT_NAME_LEN]; | ||
827 | }; | 860 | }; |
828 | 861 | ||
829 | #define RESET_ERROR 1; | 862 | #define RESET_ERROR 1; |
@@ -848,28 +881,32 @@ static inline void writeq(u64 val, void __iomem *addr) | |||
848 | writel((u32) (val), addr); | 881 | writel((u32) (val), addr); |
849 | writel((u32) (val >> 32), (addr + 4)); | 882 | writel((u32) (val >> 32), (addr + 4)); |
850 | } | 883 | } |
884 | #endif | ||
851 | 885 | ||
852 | /* In 32 bit modes, some registers have to be written in a | 886 | /* |
853 | * particular order to expect correct hardware operation. The | 887 | * Some registers have to be written in a particular order to |
854 | * macro SPECIAL_REG_WRITE is used to perform such ordered | 888 | * expect correct hardware operation. The macro SPECIAL_REG_WRITE |
855 | * writes. Defines UF (Upper First) and LF (Lower First) will | 889 | * is used to perform such ordered writes. Defines UF (Upper First) |
856 | * be used to specify the required write order. | 890 | * and LF (Lower First) will be used to specify the required write order. |
857 | */ | 891 | */ |
858 | #define UF 1 | 892 | #define UF 1 |
859 | #define LF 2 | 893 | #define LF 2 |
860 | static inline void SPECIAL_REG_WRITE(u64 val, void __iomem *addr, int order) | 894 | static inline void SPECIAL_REG_WRITE(u64 val, void __iomem *addr, int order) |
861 | { | 895 | { |
896 | u32 ret; | ||
897 | |||
862 | if (order == LF) { | 898 | if (order == LF) { |
863 | writel((u32) (val), addr); | 899 | writel((u32) (val), addr); |
900 | ret = readl(addr); | ||
864 | writel((u32) (val >> 32), (addr + 4)); | 901 | writel((u32) (val >> 32), (addr + 4)); |
902 | ret = readl(addr + 4); | ||
865 | } else { | 903 | } else { |
866 | writel((u32) (val >> 32), (addr + 4)); | 904 | writel((u32) (val >> 32), (addr + 4)); |
905 | ret = readl(addr + 4); | ||
867 | writel((u32) (val), addr); | 906 | writel((u32) (val), addr); |
907 | ret = readl(addr); | ||
868 | } | 908 | } |
869 | } | 909 | } |
870 | #else | ||
871 | #define SPECIAL_REG_WRITE(val, addr, dummy) writeq(val, addr) | ||
872 | #endif | ||
873 | 910 | ||
874 | /* Interrupt related values of Xena */ | 911 | /* Interrupt related values of Xena */ |
875 | 912 | ||
@@ -965,7 +1002,7 @@ static int verify_xena_quiescence(nic_t *sp, u64 val64, int flag); | |||
965 | static struct ethtool_ops netdev_ethtool_ops; | 1002 | static struct ethtool_ops netdev_ethtool_ops; |
966 | static void s2io_set_link(unsigned long data); | 1003 | static void s2io_set_link(unsigned long data); |
967 | static int s2io_set_swapper(nic_t * sp); | 1004 | static int s2io_set_swapper(nic_t * sp); |
968 | static void s2io_card_down(nic_t *nic); | 1005 | static void s2io_card_down(nic_t *nic, int flag); |
969 | static int s2io_card_up(nic_t *nic); | 1006 | static int s2io_card_up(nic_t *nic); |
970 | static int get_xena_rev_id(struct pci_dev *pdev); | 1007 | static int get_xena_rev_id(struct pci_dev *pdev); |
971 | static void restore_xmsi_data(nic_t *nic); | 1008 | static void restore_xmsi_data(nic_t *nic); |
diff --git a/drivers/net/sis900.c b/drivers/net/sis900.c index f5a3bf4d959a..d05874172209 100644 --- a/drivers/net/sis900.c +++ b/drivers/net/sis900.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. | 1 | /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. |
2 | Copyright 1999 Silicon Integrated System Corporation | 2 | Copyright 1999 Silicon Integrated System Corporation |
3 | Revision: 1.08.09 Sep. 19 2005 | 3 | Revision: 1.08.10 Apr. 2 2006 |
4 | 4 | ||
5 | Modified from the driver which is originally written by Donald Becker. | 5 | Modified from the driver which is originally written by Donald Becker. |
6 | 6 | ||
@@ -17,9 +17,10 @@ | |||
17 | SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, | 17 | SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, |
18 | preliminary Rev. 1.0 Jan. 18, 1998 | 18 | preliminary Rev. 1.0 Jan. 18, 1998 |
19 | 19 | ||
20 | Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support | ||
20 | Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support | 21 | Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support |
21 | Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages | 22 | Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages |
22 | Rev 1.08.07 Nov. 2 2003 Daniele Venzano <webvenza@libero.it> add suspend/resume support | 23 | Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support |
23 | Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support | 24 | Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support |
24 | Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary | 25 | Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary |
25 | Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support | 26 | Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support |
@@ -77,7 +78,7 @@ | |||
77 | #include "sis900.h" | 78 | #include "sis900.h" |
78 | 79 | ||
79 | #define SIS900_MODULE_NAME "sis900" | 80 | #define SIS900_MODULE_NAME "sis900" |
80 | #define SIS900_DRV_VERSION "v1.08.09 Sep. 19 2005" | 81 | #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" |
81 | 82 | ||
82 | static char version[] __devinitdata = | 83 | static char version[] __devinitdata = |
83 | KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; | 84 | KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; |
@@ -1402,6 +1403,11 @@ static void sis900_set_mode (long ioaddr, int speed, int duplex) | |||
1402 | rx_flags |= RxATX; | 1403 | rx_flags |= RxATX; |
1403 | } | 1404 | } |
1404 | 1405 | ||
1406 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) | ||
1407 | /* Can accept Jumbo packet */ | ||
1408 | rx_flags |= RxAJAB; | ||
1409 | #endif | ||
1410 | |||
1405 | outl (tx_flags, ioaddr + txcfg); | 1411 | outl (tx_flags, ioaddr + txcfg); |
1406 | outl (rx_flags, ioaddr + rxcfg); | 1412 | outl (rx_flags, ioaddr + rxcfg); |
1407 | } | 1413 | } |
@@ -1714,18 +1720,26 @@ static int sis900_rx(struct net_device *net_dev) | |||
1714 | 1720 | ||
1715 | while (rx_status & OWN) { | 1721 | while (rx_status & OWN) { |
1716 | unsigned int rx_size; | 1722 | unsigned int rx_size; |
1723 | unsigned int data_size; | ||
1717 | 1724 | ||
1718 | if (--rx_work_limit < 0) | 1725 | if (--rx_work_limit < 0) |
1719 | break; | 1726 | break; |
1720 | 1727 | ||
1721 | rx_size = (rx_status & DSIZE) - CRC_SIZE; | 1728 | data_size = rx_status & DSIZE; |
1729 | rx_size = data_size - CRC_SIZE; | ||
1730 | |||
1731 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) | ||
1732 | /* ``TOOLONG'' flag means jumbo packet recived. */ | ||
1733 | if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) | ||
1734 | rx_status &= (~ ((unsigned int)TOOLONG)); | ||
1735 | #endif | ||
1722 | 1736 | ||
1723 | if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { | 1737 | if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { |
1724 | /* corrupted packet received */ | 1738 | /* corrupted packet received */ |
1725 | if (netif_msg_rx_err(sis_priv)) | 1739 | if (netif_msg_rx_err(sis_priv)) |
1726 | printk(KERN_DEBUG "%s: Corrupted packet " | 1740 | printk(KERN_DEBUG "%s: Corrupted packet " |
1727 | "received, buffer status = 0x%8.8x.\n", | 1741 | "received, buffer status = 0x%8.8x/%d.\n", |
1728 | net_dev->name, rx_status); | 1742 | net_dev->name, rx_status, data_size); |
1729 | sis_priv->stats.rx_errors++; | 1743 | sis_priv->stats.rx_errors++; |
1730 | if (rx_status & OVERRUN) | 1744 | if (rx_status & OVERRUN) |
1731 | sis_priv->stats.rx_over_errors++; | 1745 | sis_priv->stats.rx_over_errors++; |
diff --git a/drivers/net/sis900.h b/drivers/net/sis900.h index 50323941e3c0..4834e3a15694 100644 --- a/drivers/net/sis900.h +++ b/drivers/net/sis900.h | |||
@@ -310,8 +310,14 @@ enum sis630_revision_id { | |||
310 | #define CRC_SIZE 4 | 310 | #define CRC_SIZE 4 |
311 | #define MAC_HEADER_SIZE 14 | 311 | #define MAC_HEADER_SIZE 14 |
312 | 312 | ||
313 | #define TX_BUF_SIZE 1536 | 313 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) |
314 | #define RX_BUF_SIZE 1536 | 314 | #define MAX_FRAME_SIZE (1518 + 4) |
315 | #else | ||
316 | #define MAX_FRAME_SIZE 1518 | ||
317 | #endif /* CONFIG_VLAN_802_1Q */ | ||
318 | |||
319 | #define TX_BUF_SIZE (MAX_FRAME_SIZE+18) | ||
320 | #define RX_BUF_SIZE (MAX_FRAME_SIZE+18) | ||
315 | 321 | ||
316 | #define NUM_TX_DESC 16 /* Number of Tx descriptor registers. */ | 322 | #define NUM_TX_DESC 16 /* Number of Tx descriptor registers. */ |
317 | #define NUM_RX_DESC 16 /* Number of Rx descriptor registers. */ | 323 | #define NUM_RX_DESC 16 /* Number of Rx descriptor registers. */ |
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index 5ca5a1b546a1..536dd1cf7f79 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -44,12 +44,13 @@ | |||
44 | #include "skge.h" | 44 | #include "skge.h" |
45 | 45 | ||
46 | #define DRV_NAME "skge" | 46 | #define DRV_NAME "skge" |
47 | #define DRV_VERSION "1.5" | 47 | #define DRV_VERSION "1.6" |
48 | #define PFX DRV_NAME " " | 48 | #define PFX DRV_NAME " " |
49 | 49 | ||
50 | #define DEFAULT_TX_RING_SIZE 128 | 50 | #define DEFAULT_TX_RING_SIZE 128 |
51 | #define DEFAULT_RX_RING_SIZE 512 | 51 | #define DEFAULT_RX_RING_SIZE 512 |
52 | #define MAX_TX_RING_SIZE 1024 | 52 | #define MAX_TX_RING_SIZE 1024 |
53 | #define TX_LOW_WATER (MAX_SKB_FRAGS + 1) | ||
53 | #define MAX_RX_RING_SIZE 4096 | 54 | #define MAX_RX_RING_SIZE 4096 |
54 | #define RX_COPY_THRESHOLD 128 | 55 | #define RX_COPY_THRESHOLD 128 |
55 | #define RX_BUF_SIZE 1536 | 56 | #define RX_BUF_SIZE 1536 |
@@ -401,7 +402,7 @@ static int skge_set_ring_param(struct net_device *dev, | |||
401 | int err; | 402 | int err; |
402 | 403 | ||
403 | if (p->rx_pending == 0 || p->rx_pending > MAX_RX_RING_SIZE || | 404 | if (p->rx_pending == 0 || p->rx_pending > MAX_RX_RING_SIZE || |
404 | p->tx_pending < MAX_SKB_FRAGS+1 || p->tx_pending > MAX_TX_RING_SIZE) | 405 | p->tx_pending < TX_LOW_WATER || p->tx_pending > MAX_TX_RING_SIZE) |
405 | return -EINVAL; | 406 | return -EINVAL; |
406 | 407 | ||
407 | skge->rx_ring.count = p->rx_pending; | 408 | skge->rx_ring.count = p->rx_pending; |
@@ -603,7 +604,7 @@ static void skge_led(struct skge_port *skge, enum led_mode mode) | |||
603 | struct skge_hw *hw = skge->hw; | 604 | struct skge_hw *hw = skge->hw; |
604 | int port = skge->port; | 605 | int port = skge->port; |
605 | 606 | ||
606 | spin_lock_bh(&hw->phy_lock); | 607 | mutex_lock(&hw->phy_mutex); |
607 | if (hw->chip_id == CHIP_ID_GENESIS) { | 608 | if (hw->chip_id == CHIP_ID_GENESIS) { |
608 | switch (mode) { | 609 | switch (mode) { |
609 | case LED_MODE_OFF: | 610 | case LED_MODE_OFF: |
@@ -663,7 +664,7 @@ static void skge_led(struct skge_port *skge, enum led_mode mode) | |||
663 | PHY_M_LED_MO_RX(MO_LED_ON)); | 664 | PHY_M_LED_MO_RX(MO_LED_ON)); |
664 | } | 665 | } |
665 | } | 666 | } |
666 | spin_unlock_bh(&hw->phy_lock); | 667 | mutex_unlock(&hw->phy_mutex); |
667 | } | 668 | } |
668 | 669 | ||
669 | /* blink LED's for finding board */ | 670 | /* blink LED's for finding board */ |
@@ -2038,7 +2039,7 @@ static void skge_phy_reset(struct skge_port *skge) | |||
2038 | netif_stop_queue(skge->netdev); | 2039 | netif_stop_queue(skge->netdev); |
2039 | netif_carrier_off(skge->netdev); | 2040 | netif_carrier_off(skge->netdev); |
2040 | 2041 | ||
2041 | spin_lock_bh(&hw->phy_lock); | 2042 | mutex_lock(&hw->phy_mutex); |
2042 | if (hw->chip_id == CHIP_ID_GENESIS) { | 2043 | if (hw->chip_id == CHIP_ID_GENESIS) { |
2043 | genesis_reset(hw, port); | 2044 | genesis_reset(hw, port); |
2044 | genesis_mac_init(hw, port); | 2045 | genesis_mac_init(hw, port); |
@@ -2046,7 +2047,7 @@ static void skge_phy_reset(struct skge_port *skge) | |||
2046 | yukon_reset(hw, port); | 2047 | yukon_reset(hw, port); |
2047 | yukon_init(hw, port); | 2048 | yukon_init(hw, port); |
2048 | } | 2049 | } |
2049 | spin_unlock_bh(&hw->phy_lock); | 2050 | mutex_unlock(&hw->phy_mutex); |
2050 | } | 2051 | } |
2051 | 2052 | ||
2052 | /* Basic MII support */ | 2053 | /* Basic MII support */ |
@@ -2067,12 +2068,12 @@ static int skge_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
2067 | /* fallthru */ | 2068 | /* fallthru */ |
2068 | case SIOCGMIIREG: { | 2069 | case SIOCGMIIREG: { |
2069 | u16 val = 0; | 2070 | u16 val = 0; |
2070 | spin_lock_bh(&hw->phy_lock); | 2071 | mutex_lock(&hw->phy_mutex); |
2071 | if (hw->chip_id == CHIP_ID_GENESIS) | 2072 | if (hw->chip_id == CHIP_ID_GENESIS) |
2072 | err = __xm_phy_read(hw, skge->port, data->reg_num & 0x1f, &val); | 2073 | err = __xm_phy_read(hw, skge->port, data->reg_num & 0x1f, &val); |
2073 | else | 2074 | else |
2074 | err = __gm_phy_read(hw, skge->port, data->reg_num & 0x1f, &val); | 2075 | err = __gm_phy_read(hw, skge->port, data->reg_num & 0x1f, &val); |
2075 | spin_unlock_bh(&hw->phy_lock); | 2076 | mutex_unlock(&hw->phy_mutex); |
2076 | data->val_out = val; | 2077 | data->val_out = val; |
2077 | break; | 2078 | break; |
2078 | } | 2079 | } |
@@ -2081,14 +2082,14 @@ static int skge_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
2081 | if (!capable(CAP_NET_ADMIN)) | 2082 | if (!capable(CAP_NET_ADMIN)) |
2082 | return -EPERM; | 2083 | return -EPERM; |
2083 | 2084 | ||
2084 | spin_lock_bh(&hw->phy_lock); | 2085 | mutex_lock(&hw->phy_mutex); |
2085 | if (hw->chip_id == CHIP_ID_GENESIS) | 2086 | if (hw->chip_id == CHIP_ID_GENESIS) |
2086 | err = xm_phy_write(hw, skge->port, data->reg_num & 0x1f, | 2087 | err = xm_phy_write(hw, skge->port, data->reg_num & 0x1f, |
2087 | data->val_in); | 2088 | data->val_in); |
2088 | else | 2089 | else |
2089 | err = gm_phy_write(hw, skge->port, data->reg_num & 0x1f, | 2090 | err = gm_phy_write(hw, skge->port, data->reg_num & 0x1f, |
2090 | data->val_in); | 2091 | data->val_in); |
2091 | spin_unlock_bh(&hw->phy_lock); | 2092 | mutex_unlock(&hw->phy_mutex); |
2092 | break; | 2093 | break; |
2093 | } | 2094 | } |
2094 | return err; | 2095 | return err; |
@@ -2191,12 +2192,12 @@ static int skge_up(struct net_device *dev) | |||
2191 | goto free_rx_ring; | 2192 | goto free_rx_ring; |
2192 | 2193 | ||
2193 | /* Initialize MAC */ | 2194 | /* Initialize MAC */ |
2194 | spin_lock_bh(&hw->phy_lock); | 2195 | mutex_lock(&hw->phy_mutex); |
2195 | if (hw->chip_id == CHIP_ID_GENESIS) | 2196 | if (hw->chip_id == CHIP_ID_GENESIS) |
2196 | genesis_mac_init(hw, port); | 2197 | genesis_mac_init(hw, port); |
2197 | else | 2198 | else |
2198 | yukon_mac_init(hw, port); | 2199 | yukon_mac_init(hw, port); |
2199 | spin_unlock_bh(&hw->phy_lock); | 2200 | mutex_unlock(&hw->phy_mutex); |
2200 | 2201 | ||
2201 | /* Configure RAMbuffers */ | 2202 | /* Configure RAMbuffers */ |
2202 | chunk = hw->ram_size / ((hw->ports + 1)*2); | 2203 | chunk = hw->ram_size / ((hw->ports + 1)*2); |
@@ -2302,21 +2303,20 @@ static int skge_xmit_frame(struct sk_buff *skb, struct net_device *dev) | |||
2302 | { | 2303 | { |
2303 | struct skge_port *skge = netdev_priv(dev); | 2304 | struct skge_port *skge = netdev_priv(dev); |
2304 | struct skge_hw *hw = skge->hw; | 2305 | struct skge_hw *hw = skge->hw; |
2305 | struct skge_ring *ring = &skge->tx_ring; | ||
2306 | struct skge_element *e; | 2306 | struct skge_element *e; |
2307 | struct skge_tx_desc *td; | 2307 | struct skge_tx_desc *td; |
2308 | int i; | 2308 | int i; |
2309 | u32 control, len; | 2309 | u32 control, len; |
2310 | u64 map; | 2310 | u64 map; |
2311 | unsigned long flags; | ||
2311 | 2312 | ||
2312 | skb = skb_padto(skb, ETH_ZLEN); | 2313 | skb = skb_padto(skb, ETH_ZLEN); |
2313 | if (!skb) | 2314 | if (!skb) |
2314 | return NETDEV_TX_OK; | 2315 | return NETDEV_TX_OK; |
2315 | 2316 | ||
2316 | if (!spin_trylock(&skge->tx_lock)) { | 2317 | if (!spin_trylock_irqsave(&skge->tx_lock, flags)) |
2317 | /* Collision - tell upper layer to requeue */ | 2318 | /* Collision - tell upper layer to requeue */ |
2318 | return NETDEV_TX_LOCKED; | 2319 | return NETDEV_TX_LOCKED; |
2319 | } | ||
2320 | 2320 | ||
2321 | if (unlikely(skge_avail(&skge->tx_ring) < skb_shinfo(skb)->nr_frags + 1)) { | 2321 | if (unlikely(skge_avail(&skge->tx_ring) < skb_shinfo(skb)->nr_frags + 1)) { |
2322 | if (!netif_queue_stopped(dev)) { | 2322 | if (!netif_queue_stopped(dev)) { |
@@ -2325,12 +2325,13 @@ static int skge_xmit_frame(struct sk_buff *skb, struct net_device *dev) | |||
2325 | printk(KERN_WARNING PFX "%s: ring full when queue awake!\n", | 2325 | printk(KERN_WARNING PFX "%s: ring full when queue awake!\n", |
2326 | dev->name); | 2326 | dev->name); |
2327 | } | 2327 | } |
2328 | spin_unlock(&skge->tx_lock); | 2328 | spin_unlock_irqrestore(&skge->tx_lock, flags); |
2329 | return NETDEV_TX_BUSY; | 2329 | return NETDEV_TX_BUSY; |
2330 | } | 2330 | } |
2331 | 2331 | ||
2332 | e = ring->to_use; | 2332 | e = skge->tx_ring.to_use; |
2333 | td = e->desc; | 2333 | td = e->desc; |
2334 | BUG_ON(td->control & BMU_OWN); | ||
2334 | e->skb = skb; | 2335 | e->skb = skb; |
2335 | len = skb_headlen(skb); | 2336 | len = skb_headlen(skb); |
2336 | map = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE); | 2337 | map = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE); |
@@ -2371,8 +2372,10 @@ static int skge_xmit_frame(struct sk_buff *skb, struct net_device *dev) | |||
2371 | frag->size, PCI_DMA_TODEVICE); | 2372 | frag->size, PCI_DMA_TODEVICE); |
2372 | 2373 | ||
2373 | e = e->next; | 2374 | e = e->next; |
2374 | e->skb = NULL; | 2375 | e->skb = skb; |
2375 | tf = e->desc; | 2376 | tf = e->desc; |
2377 | BUG_ON(tf->control & BMU_OWN); | ||
2378 | |||
2376 | tf->dma_lo = map; | 2379 | tf->dma_lo = map; |
2377 | tf->dma_hi = (u64) map >> 32; | 2380 | tf->dma_hi = (u64) map >> 32; |
2378 | pci_unmap_addr_set(e, mapaddr, map); | 2381 | pci_unmap_addr_set(e, mapaddr, map); |
@@ -2389,56 +2392,68 @@ static int skge_xmit_frame(struct sk_buff *skb, struct net_device *dev) | |||
2389 | 2392 | ||
2390 | skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START); | 2393 | skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START); |
2391 | 2394 | ||
2392 | if (netif_msg_tx_queued(skge)) | 2395 | if (unlikely(netif_msg_tx_queued(skge))) |
2393 | printk(KERN_DEBUG "%s: tx queued, slot %td, len %d\n", | 2396 | printk(KERN_DEBUG "%s: tx queued, slot %td, len %d\n", |
2394 | dev->name, e - ring->start, skb->len); | 2397 | dev->name, e - skge->tx_ring.start, skb->len); |
2395 | 2398 | ||
2396 | ring->to_use = e->next; | 2399 | skge->tx_ring.to_use = e->next; |
2397 | if (skge_avail(&skge->tx_ring) <= MAX_SKB_FRAGS + 1) { | 2400 | if (skge_avail(&skge->tx_ring) <= TX_LOW_WATER) { |
2398 | pr_debug("%s: transmit queue full\n", dev->name); | 2401 | pr_debug("%s: transmit queue full\n", dev->name); |
2399 | netif_stop_queue(dev); | 2402 | netif_stop_queue(dev); |
2400 | } | 2403 | } |
2401 | 2404 | ||
2402 | mmiowb(); | 2405 | spin_unlock_irqrestore(&skge->tx_lock, flags); |
2403 | spin_unlock(&skge->tx_lock); | ||
2404 | 2406 | ||
2405 | dev->trans_start = jiffies; | 2407 | dev->trans_start = jiffies; |
2406 | 2408 | ||
2407 | return NETDEV_TX_OK; | 2409 | return NETDEV_TX_OK; |
2408 | } | 2410 | } |
2409 | 2411 | ||
2410 | static void skge_tx_complete(struct skge_port *skge, struct skge_element *last) | 2412 | |
2413 | /* Free resources associated with this reing element */ | ||
2414 | static void skge_tx_free(struct skge_port *skge, struct skge_element *e, | ||
2415 | u32 control) | ||
2411 | { | 2416 | { |
2412 | struct pci_dev *pdev = skge->hw->pdev; | 2417 | struct pci_dev *pdev = skge->hw->pdev; |
2413 | struct skge_element *e; | ||
2414 | 2418 | ||
2415 | for (e = skge->tx_ring.to_clean; e != last; e = e->next) { | 2419 | BUG_ON(!e->skb); |
2416 | struct sk_buff *skb = e->skb; | ||
2417 | int i; | ||
2418 | 2420 | ||
2419 | e->skb = NULL; | 2421 | /* skb header vs. fragment */ |
2422 | if (control & BMU_STF) | ||
2420 | pci_unmap_single(pdev, pci_unmap_addr(e, mapaddr), | 2423 | pci_unmap_single(pdev, pci_unmap_addr(e, mapaddr), |
2421 | skb_headlen(skb), PCI_DMA_TODEVICE); | 2424 | pci_unmap_len(e, maplen), |
2425 | PCI_DMA_TODEVICE); | ||
2426 | else | ||
2427 | pci_unmap_page(pdev, pci_unmap_addr(e, mapaddr), | ||
2428 | pci_unmap_len(e, maplen), | ||
2429 | PCI_DMA_TODEVICE); | ||
2422 | 2430 | ||
2423 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | 2431 | if (control & BMU_EOF) { |
2424 | e = e->next; | 2432 | if (unlikely(netif_msg_tx_done(skge))) |
2425 | pci_unmap_page(pdev, pci_unmap_addr(e, mapaddr), | 2433 | printk(KERN_DEBUG PFX "%s: tx done slot %td\n", |
2426 | skb_shinfo(skb)->frags[i].size, | 2434 | skge->netdev->name, e - skge->tx_ring.start); |
2427 | PCI_DMA_TODEVICE); | ||
2428 | } | ||
2429 | 2435 | ||
2430 | dev_kfree_skb(skb); | 2436 | dev_kfree_skb_any(e->skb); |
2431 | } | 2437 | } |
2432 | skge->tx_ring.to_clean = e; | 2438 | e->skb = NULL; |
2433 | } | 2439 | } |
2434 | 2440 | ||
2441 | /* Free all buffers in transmit ring */ | ||
2435 | static void skge_tx_clean(struct skge_port *skge) | 2442 | static void skge_tx_clean(struct skge_port *skge) |
2436 | { | 2443 | { |
2444 | struct skge_element *e; | ||
2445 | unsigned long flags; | ||
2446 | |||
2447 | spin_lock_irqsave(&skge->tx_lock, flags); | ||
2448 | for (e = skge->tx_ring.to_clean; e != skge->tx_ring.to_use; e = e->next) { | ||
2449 | struct skge_tx_desc *td = e->desc; | ||
2450 | skge_tx_free(skge, e, td->control); | ||
2451 | td->control = 0; | ||
2452 | } | ||
2437 | 2453 | ||
2438 | spin_lock_bh(&skge->tx_lock); | 2454 | skge->tx_ring.to_clean = e; |
2439 | skge_tx_complete(skge, skge->tx_ring.to_use); | ||
2440 | netif_wake_queue(skge->netdev); | 2455 | netif_wake_queue(skge->netdev); |
2441 | spin_unlock_bh(&skge->tx_lock); | 2456 | spin_unlock_irqrestore(&skge->tx_lock, flags); |
2442 | } | 2457 | } |
2443 | 2458 | ||
2444 | static void skge_tx_timeout(struct net_device *dev) | 2459 | static void skge_tx_timeout(struct net_device *dev) |
@@ -2664,32 +2679,28 @@ resubmit: | |||
2664 | return NULL; | 2679 | return NULL; |
2665 | } | 2680 | } |
2666 | 2681 | ||
2667 | static void skge_tx_done(struct skge_port *skge) | 2682 | /* Free all buffers in Tx ring which are no longer owned by device */ |
2683 | static void skge_txirq(struct net_device *dev) | ||
2668 | { | 2684 | { |
2685 | struct skge_port *skge = netdev_priv(dev); | ||
2669 | struct skge_ring *ring = &skge->tx_ring; | 2686 | struct skge_ring *ring = &skge->tx_ring; |
2670 | struct skge_element *e, *last; | 2687 | struct skge_element *e; |
2688 | |||
2689 | rmb(); | ||
2671 | 2690 | ||
2672 | spin_lock(&skge->tx_lock); | 2691 | spin_lock(&skge->tx_lock); |
2673 | last = ring->to_clean; | ||
2674 | for (e = ring->to_clean; e != ring->to_use; e = e->next) { | 2692 | for (e = ring->to_clean; e != ring->to_use; e = e->next) { |
2675 | struct skge_tx_desc *td = e->desc; | 2693 | struct skge_tx_desc *td = e->desc; |
2676 | 2694 | ||
2677 | if (td->control & BMU_OWN) | 2695 | if (td->control & BMU_OWN) |
2678 | break; | 2696 | break; |
2679 | 2697 | ||
2680 | if (td->control & BMU_EOF) { | 2698 | skge_tx_free(skge, e, td->control); |
2681 | last = e->next; | ||
2682 | if (unlikely(netif_msg_tx_done(skge))) | ||
2683 | printk(KERN_DEBUG PFX "%s: tx done slot %td\n", | ||
2684 | skge->netdev->name, e - ring->start); | ||
2685 | } | ||
2686 | } | 2699 | } |
2700 | skge->tx_ring.to_clean = e; | ||
2687 | 2701 | ||
2688 | skge_tx_complete(skge, last); | 2702 | if (netif_queue_stopped(skge->netdev) |
2689 | 2703 | && skge_avail(&skge->tx_ring) > TX_LOW_WATER) | |
2690 | skge_write8(skge->hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_IRQ_CL_F); | ||
2691 | |||
2692 | if (skge_avail(&skge->tx_ring) > MAX_SKB_FRAGS + 1) | ||
2693 | netif_wake_queue(skge->netdev); | 2704 | netif_wake_queue(skge->netdev); |
2694 | 2705 | ||
2695 | spin_unlock(&skge->tx_lock); | 2706 | spin_unlock(&skge->tx_lock); |
@@ -2704,8 +2715,6 @@ static int skge_poll(struct net_device *dev, int *budget) | |||
2704 | int to_do = min(dev->quota, *budget); | 2715 | int to_do = min(dev->quota, *budget); |
2705 | int work_done = 0; | 2716 | int work_done = 0; |
2706 | 2717 | ||
2707 | skge_tx_done(skge); | ||
2708 | |||
2709 | for (e = ring->to_clean; prefetch(e->next), work_done < to_do; e = e->next) { | 2718 | for (e = ring->to_clean; prefetch(e->next), work_done < to_do; e = e->next) { |
2710 | struct skge_rx_desc *rd = e->desc; | 2719 | struct skge_rx_desc *rd = e->desc; |
2711 | struct sk_buff *skb; | 2720 | struct sk_buff *skb; |
@@ -2737,10 +2746,12 @@ static int skge_poll(struct net_device *dev, int *budget) | |||
2737 | return 1; /* not done */ | 2746 | return 1; /* not done */ |
2738 | 2747 | ||
2739 | netif_rx_complete(dev); | 2748 | netif_rx_complete(dev); |
2740 | mmiowb(); | ||
2741 | 2749 | ||
2742 | hw->intr_mask |= skge->port == 0 ? (IS_R1_F|IS_XA1_F) : (IS_R2_F|IS_XA2_F); | 2750 | spin_lock_irq(&hw->hw_lock); |
2751 | hw->intr_mask |= rxirqmask[skge->port]; | ||
2743 | skge_write32(hw, B0_IMSK, hw->intr_mask); | 2752 | skge_write32(hw, B0_IMSK, hw->intr_mask); |
2753 | mmiowb(); | ||
2754 | spin_unlock_irq(&hw->hw_lock); | ||
2744 | 2755 | ||
2745 | return 0; | 2756 | return 0; |
2746 | } | 2757 | } |
@@ -2847,16 +2858,16 @@ static void skge_error_irq(struct skge_hw *hw) | |||
2847 | } | 2858 | } |
2848 | 2859 | ||
2849 | /* | 2860 | /* |
2850 | * Interrupt from PHY are handled in tasklet (soft irq) | 2861 | * Interrupt from PHY are handled in work queue |
2851 | * because accessing phy registers requires spin wait which might | 2862 | * because accessing phy registers requires spin wait which might |
2852 | * cause excess interrupt latency. | 2863 | * cause excess interrupt latency. |
2853 | */ | 2864 | */ |
2854 | static void skge_extirq(unsigned long data) | 2865 | static void skge_extirq(void *arg) |
2855 | { | 2866 | { |
2856 | struct skge_hw *hw = (struct skge_hw *) data; | 2867 | struct skge_hw *hw = arg; |
2857 | int port; | 2868 | int port; |
2858 | 2869 | ||
2859 | spin_lock(&hw->phy_lock); | 2870 | mutex_lock(&hw->phy_mutex); |
2860 | for (port = 0; port < hw->ports; port++) { | 2871 | for (port = 0; port < hw->ports; port++) { |
2861 | struct net_device *dev = hw->dev[port]; | 2872 | struct net_device *dev = hw->dev[port]; |
2862 | struct skge_port *skge = netdev_priv(dev); | 2873 | struct skge_port *skge = netdev_priv(dev); |
@@ -2868,10 +2879,12 @@ static void skge_extirq(unsigned long data) | |||
2868 | bcom_phy_intr(skge); | 2879 | bcom_phy_intr(skge); |
2869 | } | 2880 | } |
2870 | } | 2881 | } |
2871 | spin_unlock(&hw->phy_lock); | 2882 | mutex_unlock(&hw->phy_mutex); |
2872 | 2883 | ||
2884 | spin_lock_irq(&hw->hw_lock); | ||
2873 | hw->intr_mask |= IS_EXT_REG; | 2885 | hw->intr_mask |= IS_EXT_REG; |
2874 | skge_write32(hw, B0_IMSK, hw->intr_mask); | 2886 | skge_write32(hw, B0_IMSK, hw->intr_mask); |
2887 | spin_unlock_irq(&hw->hw_lock); | ||
2875 | } | 2888 | } |
2876 | 2889 | ||
2877 | static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs) | 2890 | static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs) |
@@ -2884,54 +2897,68 @@ static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs) | |||
2884 | if (status == 0) | 2897 | if (status == 0) |
2885 | return IRQ_NONE; | 2898 | return IRQ_NONE; |
2886 | 2899 | ||
2900 | spin_lock(&hw->hw_lock); | ||
2901 | status &= hw->intr_mask; | ||
2887 | if (status & IS_EXT_REG) { | 2902 | if (status & IS_EXT_REG) { |
2888 | hw->intr_mask &= ~IS_EXT_REG; | 2903 | hw->intr_mask &= ~IS_EXT_REG; |
2889 | tasklet_schedule(&hw->ext_tasklet); | 2904 | schedule_work(&hw->phy_work); |
2890 | } | 2905 | } |
2891 | 2906 | ||
2892 | if (status & (IS_R1_F|IS_XA1_F)) { | 2907 | if (status & IS_XA1_F) { |
2893 | skge_write8(hw, Q_ADDR(Q_R1, Q_CSR), CSR_IRQ_CL_F); | 2908 | skge_write8(hw, Q_ADDR(Q_XA1, Q_CSR), CSR_IRQ_CL_F); |
2894 | hw->intr_mask &= ~(IS_R1_F|IS_XA1_F); | 2909 | skge_txirq(hw->dev[0]); |
2895 | netif_rx_schedule(hw->dev[0]); | ||
2896 | } | 2910 | } |
2897 | 2911 | ||
2898 | if (status & (IS_R2_F|IS_XA2_F)) { | 2912 | if (status & IS_R1_F) { |
2899 | skge_write8(hw, Q_ADDR(Q_R2, Q_CSR), CSR_IRQ_CL_F); | 2913 | skge_write8(hw, Q_ADDR(Q_R1, Q_CSR), CSR_IRQ_CL_F); |
2900 | hw->intr_mask &= ~(IS_R2_F|IS_XA2_F); | 2914 | hw->intr_mask &= ~IS_R1_F; |
2901 | netif_rx_schedule(hw->dev[1]); | 2915 | netif_rx_schedule(hw->dev[0]); |
2902 | } | 2916 | } |
2903 | 2917 | ||
2904 | if (likely((status & hw->intr_mask) == 0)) | 2918 | if (status & IS_PA_TO_TX1) |
2905 | return IRQ_HANDLED; | 2919 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX1); |
2906 | 2920 | ||
2907 | if (status & IS_PA_TO_RX1) { | 2921 | if (status & IS_PA_TO_RX1) { |
2908 | struct skge_port *skge = netdev_priv(hw->dev[0]); | 2922 | struct skge_port *skge = netdev_priv(hw->dev[0]); |
2909 | ++skge->net_stats.rx_over_errors; | ||
2910 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX1); | ||
2911 | } | ||
2912 | 2923 | ||
2913 | if (status & IS_PA_TO_RX2) { | ||
2914 | struct skge_port *skge = netdev_priv(hw->dev[1]); | ||
2915 | ++skge->net_stats.rx_over_errors; | 2924 | ++skge->net_stats.rx_over_errors; |
2916 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX2); | 2925 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX1); |
2917 | } | 2926 | } |
2918 | 2927 | ||
2919 | if (status & IS_PA_TO_TX1) | ||
2920 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX1); | ||
2921 | |||
2922 | if (status & IS_PA_TO_TX2) | ||
2923 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX2); | ||
2924 | 2928 | ||
2925 | if (status & IS_MAC1) | 2929 | if (status & IS_MAC1) |
2926 | skge_mac_intr(hw, 0); | 2930 | skge_mac_intr(hw, 0); |
2927 | 2931 | ||
2928 | if (status & IS_MAC2) | 2932 | if (hw->dev[1]) { |
2929 | skge_mac_intr(hw, 1); | 2933 | if (status & IS_XA2_F) { |
2934 | skge_write8(hw, Q_ADDR(Q_XA2, Q_CSR), CSR_IRQ_CL_F); | ||
2935 | skge_txirq(hw->dev[1]); | ||
2936 | } | ||
2937 | |||
2938 | if (status & IS_R2_F) { | ||
2939 | skge_write8(hw, Q_ADDR(Q_R2, Q_CSR), CSR_IRQ_CL_F); | ||
2940 | hw->intr_mask &= ~IS_R2_F; | ||
2941 | netif_rx_schedule(hw->dev[1]); | ||
2942 | } | ||
2943 | |||
2944 | if (status & IS_PA_TO_RX2) { | ||
2945 | struct skge_port *skge = netdev_priv(hw->dev[1]); | ||
2946 | ++skge->net_stats.rx_over_errors; | ||
2947 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX2); | ||
2948 | } | ||
2949 | |||
2950 | if (status & IS_PA_TO_TX2) | ||
2951 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX2); | ||
2952 | |||
2953 | if (status & IS_MAC2) | ||
2954 | skge_mac_intr(hw, 1); | ||
2955 | } | ||
2930 | 2956 | ||
2931 | if (status & IS_HW_ERR) | 2957 | if (status & IS_HW_ERR) |
2932 | skge_error_irq(hw); | 2958 | skge_error_irq(hw); |
2933 | 2959 | ||
2934 | skge_write32(hw, B0_IMSK, hw->intr_mask); | 2960 | skge_write32(hw, B0_IMSK, hw->intr_mask); |
2961 | spin_unlock(&hw->hw_lock); | ||
2935 | 2962 | ||
2936 | return IRQ_HANDLED; | 2963 | return IRQ_HANDLED; |
2937 | } | 2964 | } |
@@ -2957,7 +2984,7 @@ static int skge_set_mac_address(struct net_device *dev, void *p) | |||
2957 | if (!is_valid_ether_addr(addr->sa_data)) | 2984 | if (!is_valid_ether_addr(addr->sa_data)) |
2958 | return -EADDRNOTAVAIL; | 2985 | return -EADDRNOTAVAIL; |
2959 | 2986 | ||
2960 | spin_lock_bh(&hw->phy_lock); | 2987 | mutex_lock(&hw->phy_mutex); |
2961 | memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); | 2988 | memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); |
2962 | memcpy_toio(hw->regs + B2_MAC_1 + port*8, | 2989 | memcpy_toio(hw->regs + B2_MAC_1 + port*8, |
2963 | dev->dev_addr, ETH_ALEN); | 2990 | dev->dev_addr, ETH_ALEN); |
@@ -2970,7 +2997,7 @@ static int skge_set_mac_address(struct net_device *dev, void *p) | |||
2970 | gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr); | 2997 | gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr); |
2971 | gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr); | 2998 | gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr); |
2972 | } | 2999 | } |
2973 | spin_unlock_bh(&hw->phy_lock); | 3000 | mutex_unlock(&hw->phy_mutex); |
2974 | 3001 | ||
2975 | return 0; | 3002 | return 0; |
2976 | } | 3003 | } |
@@ -3082,6 +3109,7 @@ static int skge_reset(struct skge_hw *hw) | |||
3082 | else | 3109 | else |
3083 | hw->ram_size = t8 * 4096; | 3110 | hw->ram_size = t8 * 4096; |
3084 | 3111 | ||
3112 | spin_lock_init(&hw->hw_lock); | ||
3085 | hw->intr_mask = IS_HW_ERR | IS_EXT_REG | IS_PORT_1; | 3113 | hw->intr_mask = IS_HW_ERR | IS_EXT_REG | IS_PORT_1; |
3086 | if (hw->ports > 1) | 3114 | if (hw->ports > 1) |
3087 | hw->intr_mask |= IS_PORT_2; | 3115 | hw->intr_mask |= IS_PORT_2; |
@@ -3150,14 +3178,14 @@ static int skge_reset(struct skge_hw *hw) | |||
3150 | 3178 | ||
3151 | skge_write32(hw, B0_IMSK, hw->intr_mask); | 3179 | skge_write32(hw, B0_IMSK, hw->intr_mask); |
3152 | 3180 | ||
3153 | spin_lock_bh(&hw->phy_lock); | 3181 | mutex_lock(&hw->phy_mutex); |
3154 | for (i = 0; i < hw->ports; i++) { | 3182 | for (i = 0; i < hw->ports; i++) { |
3155 | if (hw->chip_id == CHIP_ID_GENESIS) | 3183 | if (hw->chip_id == CHIP_ID_GENESIS) |
3156 | genesis_reset(hw, i); | 3184 | genesis_reset(hw, i); |
3157 | else | 3185 | else |
3158 | yukon_reset(hw, i); | 3186 | yukon_reset(hw, i); |
3159 | } | 3187 | } |
3160 | spin_unlock_bh(&hw->phy_lock); | 3188 | mutex_unlock(&hw->phy_mutex); |
3161 | 3189 | ||
3162 | return 0; | 3190 | return 0; |
3163 | } | 3191 | } |
@@ -3305,8 +3333,8 @@ static int __devinit skge_probe(struct pci_dev *pdev, | |||
3305 | } | 3333 | } |
3306 | 3334 | ||
3307 | hw->pdev = pdev; | 3335 | hw->pdev = pdev; |
3308 | spin_lock_init(&hw->phy_lock); | 3336 | mutex_init(&hw->phy_mutex); |
3309 | tasklet_init(&hw->ext_tasklet, skge_extirq, (unsigned long) hw); | 3337 | INIT_WORK(&hw->phy_work, skge_extirq, hw); |
3310 | 3338 | ||
3311 | hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000); | 3339 | hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000); |
3312 | if (!hw->regs) { | 3340 | if (!hw->regs) { |
@@ -3334,6 +3362,14 @@ static int __devinit skge_probe(struct pci_dev *pdev, | |||
3334 | if ((dev = skge_devinit(hw, 0, using_dac)) == NULL) | 3362 | if ((dev = skge_devinit(hw, 0, using_dac)) == NULL) |
3335 | goto err_out_led_off; | 3363 | goto err_out_led_off; |
3336 | 3364 | ||
3365 | if (!is_valid_ether_addr(dev->dev_addr)) { | ||
3366 | printk(KERN_ERR PFX "%s: bad (zero?) ethernet address in rom\n", | ||
3367 | pci_name(pdev)); | ||
3368 | err = -EIO; | ||
3369 | goto err_out_free_netdev; | ||
3370 | } | ||
3371 | |||
3372 | |||
3337 | err = register_netdev(dev); | 3373 | err = register_netdev(dev); |
3338 | if (err) { | 3374 | if (err) { |
3339 | printk(KERN_ERR PFX "%s: cannot register net device\n", | 3375 | printk(KERN_ERR PFX "%s: cannot register net device\n", |
@@ -3388,11 +3424,15 @@ static void __devexit skge_remove(struct pci_dev *pdev) | |||
3388 | dev0 = hw->dev[0]; | 3424 | dev0 = hw->dev[0]; |
3389 | unregister_netdev(dev0); | 3425 | unregister_netdev(dev0); |
3390 | 3426 | ||
3427 | spin_lock_irq(&hw->hw_lock); | ||
3428 | hw->intr_mask = 0; | ||
3391 | skge_write32(hw, B0_IMSK, 0); | 3429 | skge_write32(hw, B0_IMSK, 0); |
3430 | spin_unlock_irq(&hw->hw_lock); | ||
3431 | |||
3392 | skge_write16(hw, B0_LED, LED_STAT_OFF); | 3432 | skge_write16(hw, B0_LED, LED_STAT_OFF); |
3393 | skge_write8(hw, B0_CTST, CS_RST_SET); | 3433 | skge_write8(hw, B0_CTST, CS_RST_SET); |
3394 | 3434 | ||
3395 | tasklet_kill(&hw->ext_tasklet); | 3435 | flush_scheduled_work(); |
3396 | 3436 | ||
3397 | free_irq(pdev->irq, hw); | 3437 | free_irq(pdev->irq, hw); |
3398 | pci_release_regions(pdev); | 3438 | pci_release_regions(pdev); |
diff --git a/drivers/net/skge.h b/drivers/net/skge.h index 1f1ce88c8186..ed19ff47ce11 100644 --- a/drivers/net/skge.h +++ b/drivers/net/skge.h | |||
@@ -2388,6 +2388,7 @@ struct skge_ring { | |||
2388 | struct skge_hw { | 2388 | struct skge_hw { |
2389 | void __iomem *regs; | 2389 | void __iomem *regs; |
2390 | struct pci_dev *pdev; | 2390 | struct pci_dev *pdev; |
2391 | spinlock_t hw_lock; | ||
2391 | u32 intr_mask; | 2392 | u32 intr_mask; |
2392 | struct net_device *dev[2]; | 2393 | struct net_device *dev[2]; |
2393 | 2394 | ||
@@ -2399,9 +2400,8 @@ struct skge_hw { | |||
2399 | u32 ram_size; | 2400 | u32 ram_size; |
2400 | u32 ram_offset; | 2401 | u32 ram_offset; |
2401 | u16 phy_addr; | 2402 | u16 phy_addr; |
2402 | 2403 | struct work_struct phy_work; | |
2403 | struct tasklet_struct ext_tasklet; | 2404 | struct mutex phy_mutex; |
2404 | spinlock_t phy_lock; | ||
2405 | }; | 2405 | }; |
2406 | 2406 | ||
2407 | enum { | 2407 | enum { |
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 959109609d85..fba1e4d4d83d 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -187,12 +187,11 @@ static u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg) | |||
187 | return v; | 187 | return v; |
188 | } | 188 | } |
189 | 189 | ||
190 | static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state) | 190 | static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state) |
191 | { | 191 | { |
192 | u16 power_control; | 192 | u16 power_control; |
193 | u32 reg1; | 193 | u32 reg1; |
194 | int vaux; | 194 | int vaux; |
195 | int ret = 0; | ||
196 | 195 | ||
197 | pr_debug("sky2_set_power_state %d\n", state); | 196 | pr_debug("sky2_set_power_state %d\n", state); |
198 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | 197 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); |
@@ -275,12 +274,10 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state) | |||
275 | break; | 274 | break; |
276 | default: | 275 | default: |
277 | printk(KERN_ERR PFX "Unknown power state %d\n", state); | 276 | printk(KERN_ERR PFX "Unknown power state %d\n", state); |
278 | ret = -1; | ||
279 | } | 277 | } |
280 | 278 | ||
281 | sky2_pci_write16(hw, hw->pm_cap + PCI_PM_CTRL, power_control); | 279 | sky2_pci_write16(hw, hw->pm_cap + PCI_PM_CTRL, power_control); |
282 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | 280 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); |
283 | return ret; | ||
284 | } | 281 | } |
285 | 282 | ||
286 | static void sky2_phy_reset(struct sky2_hw *hw, unsigned port) | 283 | static void sky2_phy_reset(struct sky2_hw *hw, unsigned port) |
@@ -2164,6 +2161,13 @@ static void sky2_descriptor_error(struct sky2_hw *hw, unsigned port, | |||
2164 | /* If idle then force a fake soft NAPI poll once a second | 2161 | /* If idle then force a fake soft NAPI poll once a second |
2165 | * to work around cases where sharing an edge triggered interrupt. | 2162 | * to work around cases where sharing an edge triggered interrupt. |
2166 | */ | 2163 | */ |
2164 | static inline void sky2_idle_start(struct sky2_hw *hw) | ||
2165 | { | ||
2166 | if (idle_timeout > 0) | ||
2167 | mod_timer(&hw->idle_timer, | ||
2168 | jiffies + msecs_to_jiffies(idle_timeout)); | ||
2169 | } | ||
2170 | |||
2167 | static void sky2_idle(unsigned long arg) | 2171 | static void sky2_idle(unsigned long arg) |
2168 | { | 2172 | { |
2169 | struct sky2_hw *hw = (struct sky2_hw *) arg; | 2173 | struct sky2_hw *hw = (struct sky2_hw *) arg; |
@@ -2183,6 +2187,9 @@ static int sky2_poll(struct net_device *dev0, int *budget) | |||
2183 | int work_done = 0; | 2187 | int work_done = 0; |
2184 | u32 status = sky2_read32(hw, B0_Y2_SP_EISR); | 2188 | u32 status = sky2_read32(hw, B0_Y2_SP_EISR); |
2185 | 2189 | ||
2190 | if (!~status) | ||
2191 | goto out; | ||
2192 | |||
2186 | if (status & Y2_IS_HW_ERR) | 2193 | if (status & Y2_IS_HW_ERR) |
2187 | sky2_hw_intr(hw); | 2194 | sky2_hw_intr(hw); |
2188 | 2195 | ||
@@ -2219,7 +2226,7 @@ static int sky2_poll(struct net_device *dev0, int *budget) | |||
2219 | 2226 | ||
2220 | if (sky2_more_work(hw)) | 2227 | if (sky2_more_work(hw)) |
2221 | return 1; | 2228 | return 1; |
2222 | 2229 | out: | |
2223 | netif_rx_complete(dev0); | 2230 | netif_rx_complete(dev0); |
2224 | 2231 | ||
2225 | sky2_read32(hw, B0_Y2_SP_LISR); | 2232 | sky2_read32(hw, B0_Y2_SP_LISR); |
@@ -2248,8 +2255,10 @@ static irqreturn_t sky2_intr(int irq, void *dev_id, struct pt_regs *regs) | |||
2248 | static void sky2_netpoll(struct net_device *dev) | 2255 | static void sky2_netpoll(struct net_device *dev) |
2249 | { | 2256 | { |
2250 | struct sky2_port *sky2 = netdev_priv(dev); | 2257 | struct sky2_port *sky2 = netdev_priv(dev); |
2258 | struct net_device *dev0 = sky2->hw->dev[0]; | ||
2251 | 2259 | ||
2252 | sky2_intr(sky2->hw->pdev->irq, sky2->hw, NULL); | 2260 | if (netif_running(dev) && __netif_rx_schedule_prep(dev0)) |
2261 | __netif_rx_schedule(dev0); | ||
2253 | } | 2262 | } |
2254 | #endif | 2263 | #endif |
2255 | 2264 | ||
@@ -3350,9 +3359,7 @@ static int __devinit sky2_probe(struct pci_dev *pdev, | |||
3350 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); | 3359 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); |
3351 | 3360 | ||
3352 | setup_timer(&hw->idle_timer, sky2_idle, (unsigned long) hw); | 3361 | setup_timer(&hw->idle_timer, sky2_idle, (unsigned long) hw); |
3353 | if (idle_timeout > 0) | 3362 | sky2_idle_start(hw); |
3354 | mod_timer(&hw->idle_timer, | ||
3355 | jiffies + msecs_to_jiffies(idle_timeout)); | ||
3356 | 3363 | ||
3357 | pci_set_drvdata(pdev, hw); | 3364 | pci_set_drvdata(pdev, hw); |
3358 | 3365 | ||
@@ -3425,8 +3432,14 @@ static int sky2_suspend(struct pci_dev *pdev, pm_message_t state) | |||
3425 | { | 3432 | { |
3426 | struct sky2_hw *hw = pci_get_drvdata(pdev); | 3433 | struct sky2_hw *hw = pci_get_drvdata(pdev); |
3427 | int i; | 3434 | int i; |
3435 | pci_power_t pstate = pci_choose_state(pdev, state); | ||
3436 | |||
3437 | if (!(pstate == PCI_D3hot || pstate == PCI_D3cold)) | ||
3438 | return -EINVAL; | ||
3439 | |||
3440 | del_timer_sync(&hw->idle_timer); | ||
3428 | 3441 | ||
3429 | for (i = 0; i < 2; i++) { | 3442 | for (i = 0; i < hw->ports; i++) { |
3430 | struct net_device *dev = hw->dev[i]; | 3443 | struct net_device *dev = hw->dev[i]; |
3431 | 3444 | ||
3432 | if (dev) { | 3445 | if (dev) { |
@@ -3435,10 +3448,14 @@ static int sky2_suspend(struct pci_dev *pdev, pm_message_t state) | |||
3435 | 3448 | ||
3436 | sky2_down(dev); | 3449 | sky2_down(dev); |
3437 | netif_device_detach(dev); | 3450 | netif_device_detach(dev); |
3451 | netif_poll_disable(dev); | ||
3438 | } | 3452 | } |
3439 | } | 3453 | } |
3440 | 3454 | ||
3441 | return sky2_set_power_state(hw, pci_choose_state(pdev, state)); | 3455 | sky2_write32(hw, B0_IMSK, 0); |
3456 | pci_save_state(pdev); | ||
3457 | sky2_set_power_state(hw, pstate); | ||
3458 | return 0; | ||
3442 | } | 3459 | } |
3443 | 3460 | ||
3444 | static int sky2_resume(struct pci_dev *pdev) | 3461 | static int sky2_resume(struct pci_dev *pdev) |
@@ -3448,27 +3465,31 @@ static int sky2_resume(struct pci_dev *pdev) | |||
3448 | 3465 | ||
3449 | pci_restore_state(pdev); | 3466 | pci_restore_state(pdev); |
3450 | pci_enable_wake(pdev, PCI_D0, 0); | 3467 | pci_enable_wake(pdev, PCI_D0, 0); |
3451 | err = sky2_set_power_state(hw, PCI_D0); | 3468 | sky2_set_power_state(hw, PCI_D0); |
3452 | if (err) | ||
3453 | goto out; | ||
3454 | 3469 | ||
3455 | err = sky2_reset(hw); | 3470 | err = sky2_reset(hw); |
3456 | if (err) | 3471 | if (err) |
3457 | goto out; | 3472 | goto out; |
3458 | 3473 | ||
3459 | for (i = 0; i < 2; i++) { | 3474 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); |
3475 | |||
3476 | for (i = 0; i < hw->ports; i++) { | ||
3460 | struct net_device *dev = hw->dev[i]; | 3477 | struct net_device *dev = hw->dev[i]; |
3461 | if (dev && netif_running(dev)) { | 3478 | if (dev && netif_running(dev)) { |
3462 | netif_device_attach(dev); | 3479 | netif_device_attach(dev); |
3480 | netif_poll_enable(dev); | ||
3481 | |||
3463 | err = sky2_up(dev); | 3482 | err = sky2_up(dev); |
3464 | if (err) { | 3483 | if (err) { |
3465 | printk(KERN_ERR PFX "%s: could not up: %d\n", | 3484 | printk(KERN_ERR PFX "%s: could not up: %d\n", |
3466 | dev->name, err); | 3485 | dev->name, err); |
3467 | dev_close(dev); | 3486 | dev_close(dev); |
3468 | break; | 3487 | goto out; |
3469 | } | 3488 | } |
3470 | } | 3489 | } |
3471 | } | 3490 | } |
3491 | |||
3492 | sky2_idle_start(hw); | ||
3472 | out: | 3493 | out: |
3473 | return err; | 3494 | return err; |
3474 | } | 3495 | } |
diff --git a/drivers/net/smc-ultra.c b/drivers/net/smc-ultra.c index 3db30cd0625e..5b4e8529d4ab 100644 --- a/drivers/net/smc-ultra.c +++ b/drivers/net/smc-ultra.c | |||
@@ -553,7 +553,7 @@ MODULE_LICENSE("GPL"); | |||
553 | 553 | ||
554 | /* This is set up so that only a single autoprobe takes place per call. | 554 | /* This is set up so that only a single autoprobe takes place per call. |
555 | ISA device autoprobes on a running machine are not recommended. */ | 555 | ISA device autoprobes on a running machine are not recommended. */ |
556 | int | 556 | int __init |
557 | init_module(void) | 557 | init_module(void) |
558 | { | 558 | { |
559 | struct net_device *dev; | 559 | struct net_device *dev; |
diff --git a/drivers/net/smc-ultra32.c b/drivers/net/smc-ultra32.c index b3e397d7ca85..ff9bd97746dc 100644 --- a/drivers/net/smc-ultra32.c +++ b/drivers/net/smc-ultra32.c | |||
@@ -421,7 +421,7 @@ static struct net_device *dev_ultra[MAX_ULTRA32_CARDS]; | |||
421 | MODULE_DESCRIPTION("SMC Ultra32 EISA ethernet driver"); | 421 | MODULE_DESCRIPTION("SMC Ultra32 EISA ethernet driver"); |
422 | MODULE_LICENSE("GPL"); | 422 | MODULE_LICENSE("GPL"); |
423 | 423 | ||
424 | int init_module(void) | 424 | int __init init_module(void) |
425 | { | 425 | { |
426 | int this_dev, found = 0; | 426 | int this_dev, found = 0; |
427 | 427 | ||
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c new file mode 100644 index 000000000000..bdd8702ead54 --- /dev/null +++ b/drivers/net/smc911x.c | |||
@@ -0,0 +1,2307 @@ | |||
1 | /* | ||
2 | * smc911x.c | ||
3 | * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices. | ||
4 | * | ||
5 | * Copyright (C) 2005 Sensoria Corp | ||
6 | * Derived from the unified SMC91x driver by Nicolas Pitre | ||
7 | * and the smsc911x.c reference driver by SMSC | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | * | ||
23 | * Arguments: | ||
24 | * watchdog = TX watchdog timeout | ||
25 | * tx_fifo_kb = Size of TX FIFO in KB | ||
26 | * | ||
27 | * History: | ||
28 | * 04/16/05 Dustin McIntire Initial version | ||
29 | */ | ||
30 | static const char version[] = | ||
31 | "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n"; | ||
32 | |||
33 | /* Debugging options */ | ||
34 | #define ENABLE_SMC_DEBUG_RX 0 | ||
35 | #define ENABLE_SMC_DEBUG_TX 0 | ||
36 | #define ENABLE_SMC_DEBUG_DMA 0 | ||
37 | #define ENABLE_SMC_DEBUG_PKTS 0 | ||
38 | #define ENABLE_SMC_DEBUG_MISC 0 | ||
39 | #define ENABLE_SMC_DEBUG_FUNC 0 | ||
40 | |||
41 | #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0) | ||
42 | #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1) | ||
43 | #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2) | ||
44 | #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3) | ||
45 | #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4) | ||
46 | #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5) | ||
47 | |||
48 | #ifndef SMC_DEBUG | ||
49 | #define SMC_DEBUG ( SMC_DEBUG_RX | \ | ||
50 | SMC_DEBUG_TX | \ | ||
51 | SMC_DEBUG_DMA | \ | ||
52 | SMC_DEBUG_PKTS | \ | ||
53 | SMC_DEBUG_MISC | \ | ||
54 | SMC_DEBUG_FUNC \ | ||
55 | ) | ||
56 | #endif | ||
57 | |||
58 | |||
59 | #include <linux/config.h> | ||
60 | #include <linux/init.h> | ||
61 | #include <linux/module.h> | ||
62 | #include <linux/kernel.h> | ||
63 | #include <linux/sched.h> | ||
64 | #include <linux/slab.h> | ||
65 | #include <linux/delay.h> | ||
66 | #include <linux/interrupt.h> | ||
67 | #include <linux/errno.h> | ||
68 | #include <linux/ioport.h> | ||
69 | #include <linux/crc32.h> | ||
70 | #include <linux/device.h> | ||
71 | #include <linux/platform_device.h> | ||
72 | #include <linux/spinlock.h> | ||
73 | #include <linux/ethtool.h> | ||
74 | #include <linux/mii.h> | ||
75 | #include <linux/workqueue.h> | ||
76 | |||
77 | #include <linux/netdevice.h> | ||
78 | #include <linux/etherdevice.h> | ||
79 | #include <linux/skbuff.h> | ||
80 | |||
81 | #include <asm/io.h> | ||
82 | #include <asm/irq.h> | ||
83 | |||
84 | #include "smc911x.h" | ||
85 | |||
86 | /* | ||
87 | * Transmit timeout, default 5 seconds. | ||
88 | */ | ||
89 | static int watchdog = 5000; | ||
90 | module_param(watchdog, int, 0400); | ||
91 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); | ||
92 | |||
93 | static int tx_fifo_kb=8; | ||
94 | module_param(tx_fifo_kb, int, 0400); | ||
95 | MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)"); | ||
96 | |||
97 | MODULE_LICENSE("GPL"); | ||
98 | |||
99 | /* | ||
100 | * The internal workings of the driver. If you are changing anything | ||
101 | * here with the SMC stuff, you should have the datasheet and know | ||
102 | * what you are doing. | ||
103 | */ | ||
104 | #define CARDNAME "smc911x" | ||
105 | |||
106 | /* | ||
107 | * Use power-down feature of the chip | ||
108 | */ | ||
109 | #define POWER_DOWN 1 | ||
110 | |||
111 | |||
112 | /* store this information for the driver.. */ | ||
113 | struct smc911x_local { | ||
114 | /* | ||
115 | * If I have to wait until the DMA is finished and ready to reload a | ||
116 | * packet, I will store the skbuff here. Then, the DMA will send it | ||
117 | * out and free it. | ||
118 | */ | ||
119 | struct sk_buff *pending_tx_skb; | ||
120 | |||
121 | /* | ||
122 | * these are things that the kernel wants me to keep, so users | ||
123 | * can find out semi-useless statistics of how well the card is | ||
124 | * performing | ||
125 | */ | ||
126 | struct net_device_stats stats; | ||
127 | |||
128 | /* version/revision of the SMC911x chip */ | ||
129 | u16 version; | ||
130 | u16 revision; | ||
131 | |||
132 | /* FIFO sizes */ | ||
133 | int tx_fifo_kb; | ||
134 | int tx_fifo_size; | ||
135 | int rx_fifo_size; | ||
136 | int afc_cfg; | ||
137 | |||
138 | /* Contains the current active receive/phy mode */ | ||
139 | int ctl_rfduplx; | ||
140 | int ctl_rspeed; | ||
141 | |||
142 | u32 msg_enable; | ||
143 | u32 phy_type; | ||
144 | struct mii_if_info mii; | ||
145 | |||
146 | /* work queue */ | ||
147 | struct work_struct phy_configure; | ||
148 | int work_pending; | ||
149 | |||
150 | int tx_throttle; | ||
151 | spinlock_t lock; | ||
152 | |||
153 | #ifdef SMC_USE_DMA | ||
154 | /* DMA needs the physical address of the chip */ | ||
155 | u_long physaddr; | ||
156 | int rxdma; | ||
157 | int txdma; | ||
158 | int rxdma_active; | ||
159 | int txdma_active; | ||
160 | struct sk_buff *current_rx_skb; | ||
161 | struct sk_buff *current_tx_skb; | ||
162 | struct device *dev; | ||
163 | #endif | ||
164 | }; | ||
165 | |||
166 | #if SMC_DEBUG > 0 | ||
167 | #define DBG(n, args...) \ | ||
168 | do { \ | ||
169 | if (SMC_DEBUG & (n)) \ | ||
170 | printk(args); \ | ||
171 | } while (0) | ||
172 | |||
173 | #define PRINTK(args...) printk(args) | ||
174 | #else | ||
175 | #define DBG(n, args...) do { } while (0) | ||
176 | #define PRINTK(args...) printk(KERN_DEBUG args) | ||
177 | #endif | ||
178 | |||
179 | #if SMC_DEBUG_PKTS > 0 | ||
180 | static void PRINT_PKT(u_char *buf, int length) | ||
181 | { | ||
182 | int i; | ||
183 | int remainder; | ||
184 | int lines; | ||
185 | |||
186 | lines = length / 16; | ||
187 | remainder = length % 16; | ||
188 | |||
189 | for (i = 0; i < lines ; i ++) { | ||
190 | int cur; | ||
191 | for (cur = 0; cur < 8; cur++) { | ||
192 | u_char a, b; | ||
193 | a = *buf++; | ||
194 | b = *buf++; | ||
195 | printk("%02x%02x ", a, b); | ||
196 | } | ||
197 | printk("\n"); | ||
198 | } | ||
199 | for (i = 0; i < remainder/2 ; i++) { | ||
200 | u_char a, b; | ||
201 | a = *buf++; | ||
202 | b = *buf++; | ||
203 | printk("%02x%02x ", a, b); | ||
204 | } | ||
205 | printk("\n"); | ||
206 | } | ||
207 | #else | ||
208 | #define PRINT_PKT(x...) do { } while (0) | ||
209 | #endif | ||
210 | |||
211 | |||
212 | /* this enables an interrupt in the interrupt mask register */ | ||
213 | #define SMC_ENABLE_INT(x) do { \ | ||
214 | unsigned int __mask; \ | ||
215 | unsigned long __flags; \ | ||
216 | spin_lock_irqsave(&lp->lock, __flags); \ | ||
217 | __mask = SMC_GET_INT_EN(); \ | ||
218 | __mask |= (x); \ | ||
219 | SMC_SET_INT_EN(__mask); \ | ||
220 | spin_unlock_irqrestore(&lp->lock, __flags); \ | ||
221 | } while (0) | ||
222 | |||
223 | /* this disables an interrupt from the interrupt mask register */ | ||
224 | #define SMC_DISABLE_INT(x) do { \ | ||
225 | unsigned int __mask; \ | ||
226 | unsigned long __flags; \ | ||
227 | spin_lock_irqsave(&lp->lock, __flags); \ | ||
228 | __mask = SMC_GET_INT_EN(); \ | ||
229 | __mask &= ~(x); \ | ||
230 | SMC_SET_INT_EN(__mask); \ | ||
231 | spin_unlock_irqrestore(&lp->lock, __flags); \ | ||
232 | } while (0) | ||
233 | |||
234 | /* | ||
235 | * this does a soft reset on the device | ||
236 | */ | ||
237 | static void smc911x_reset(struct net_device *dev) | ||
238 | { | ||
239 | unsigned long ioaddr = dev->base_addr; | ||
240 | struct smc911x_local *lp = netdev_priv(dev); | ||
241 | unsigned int reg, timeout=0, resets=1; | ||
242 | unsigned long flags; | ||
243 | |||
244 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
245 | |||
246 | /* Take out of PM setting first */ | ||
247 | if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) { | ||
248 | /* Write to the bytetest will take out of powerdown */ | ||
249 | SMC_SET_BYTE_TEST(0); | ||
250 | timeout=10; | ||
251 | do { | ||
252 | udelay(10); | ||
253 | reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_; | ||
254 | } while ( timeout-- && !reg); | ||
255 | if (timeout == 0) { | ||
256 | PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name); | ||
257 | return; | ||
258 | } | ||
259 | } | ||
260 | |||
261 | /* Disable all interrupts */ | ||
262 | spin_lock_irqsave(&lp->lock, flags); | ||
263 | SMC_SET_INT_EN(0); | ||
264 | spin_unlock_irqrestore(&lp->lock, flags); | ||
265 | |||
266 | while (resets--) { | ||
267 | SMC_SET_HW_CFG(HW_CFG_SRST_); | ||
268 | timeout=10; | ||
269 | do { | ||
270 | udelay(10); | ||
271 | reg = SMC_GET_HW_CFG(); | ||
272 | /* If chip indicates reset timeout then try again */ | ||
273 | if (reg & HW_CFG_SRST_TO_) { | ||
274 | PRINTK("%s: chip reset timeout, retrying...\n", dev->name); | ||
275 | resets++; | ||
276 | break; | ||
277 | } | ||
278 | } while ( timeout-- && (reg & HW_CFG_SRST_)); | ||
279 | } | ||
280 | if (timeout == 0) { | ||
281 | PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name); | ||
282 | return; | ||
283 | } | ||
284 | |||
285 | /* make sure EEPROM has finished loading before setting GPIO_CFG */ | ||
286 | timeout=1000; | ||
287 | while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) { | ||
288 | udelay(10); | ||
289 | } | ||
290 | if (timeout == 0){ | ||
291 | PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name); | ||
292 | return; | ||
293 | } | ||
294 | |||
295 | /* Initialize interrupts */ | ||
296 | SMC_SET_INT_EN(0); | ||
297 | SMC_ACK_INT(-1); | ||
298 | |||
299 | /* Reset the FIFO level and flow control settings */ | ||
300 | SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16); | ||
301 | //TODO: Figure out what appropriate pause time is | ||
302 | SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_); | ||
303 | SMC_SET_AFC_CFG(lp->afc_cfg); | ||
304 | |||
305 | |||
306 | /* Set to LED outputs */ | ||
307 | SMC_SET_GPIO_CFG(0x70070000); | ||
308 | |||
309 | /* | ||
310 | * Deassert IRQ for 1*10us for edge type interrupts | ||
311 | * and drive IRQ pin push-pull | ||
312 | */ | ||
313 | SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ ); | ||
314 | |||
315 | /* clear anything saved */ | ||
316 | if (lp->pending_tx_skb != NULL) { | ||
317 | dev_kfree_skb (lp->pending_tx_skb); | ||
318 | lp->pending_tx_skb = NULL; | ||
319 | lp->stats.tx_errors++; | ||
320 | lp->stats.tx_aborted_errors++; | ||
321 | } | ||
322 | } | ||
323 | |||
324 | /* | ||
325 | * Enable Interrupts, Receive, and Transmit | ||
326 | */ | ||
327 | static void smc911x_enable(struct net_device *dev) | ||
328 | { | ||
329 | unsigned long ioaddr = dev->base_addr; | ||
330 | struct smc911x_local *lp = netdev_priv(dev); | ||
331 | unsigned mask, cfg, cr; | ||
332 | unsigned long flags; | ||
333 | |||
334 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
335 | |||
336 | SMC_SET_MAC_ADDR(dev->dev_addr); | ||
337 | |||
338 | /* Enable TX */ | ||
339 | cfg = SMC_GET_HW_CFG(); | ||
340 | cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF; | ||
341 | cfg |= HW_CFG_SF_; | ||
342 | SMC_SET_HW_CFG(cfg); | ||
343 | SMC_SET_FIFO_TDA(0xFF); | ||
344 | /* Update TX stats on every 64 packets received or every 1 sec */ | ||
345 | SMC_SET_FIFO_TSL(64); | ||
346 | SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000); | ||
347 | |||
348 | spin_lock_irqsave(&lp->lock, flags); | ||
349 | SMC_GET_MAC_CR(cr); | ||
350 | cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_; | ||
351 | SMC_SET_MAC_CR(cr); | ||
352 | SMC_SET_TX_CFG(TX_CFG_TX_ON_); | ||
353 | spin_unlock_irqrestore(&lp->lock, flags); | ||
354 | |||
355 | /* Add 2 byte padding to start of packets */ | ||
356 | SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_); | ||
357 | |||
358 | /* Turn on receiver and enable RX */ | ||
359 | if (cr & MAC_CR_RXEN_) | ||
360 | DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name); | ||
361 | |||
362 | spin_lock_irqsave(&lp->lock, flags); | ||
363 | SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ ); | ||
364 | spin_unlock_irqrestore(&lp->lock, flags); | ||
365 | |||
366 | /* Interrupt on every received packet */ | ||
367 | SMC_SET_FIFO_RSA(0x01); | ||
368 | SMC_SET_FIFO_RSL(0x00); | ||
369 | |||
370 | /* now, enable interrupts */ | ||
371 | mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ | | ||
372 | INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ | | ||
373 | INT_EN_PHY_INT_EN_; | ||
374 | if (IS_REV_A(lp->revision)) | ||
375 | mask|=INT_EN_RDFL_EN_; | ||
376 | else { | ||
377 | mask|=INT_EN_RDFO_EN_; | ||
378 | } | ||
379 | SMC_ENABLE_INT(mask); | ||
380 | } | ||
381 | |||
382 | /* | ||
383 | * this puts the device in an inactive state | ||
384 | */ | ||
385 | static void smc911x_shutdown(struct net_device *dev) | ||
386 | { | ||
387 | unsigned long ioaddr = dev->base_addr; | ||
388 | struct smc911x_local *lp = netdev_priv(dev); | ||
389 | unsigned cr; | ||
390 | unsigned long flags; | ||
391 | |||
392 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__); | ||
393 | |||
394 | /* Disable IRQ's */ | ||
395 | SMC_SET_INT_EN(0); | ||
396 | |||
397 | /* Turn of Rx and TX */ | ||
398 | spin_lock_irqsave(&lp->lock, flags); | ||
399 | SMC_GET_MAC_CR(cr); | ||
400 | cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); | ||
401 | SMC_SET_MAC_CR(cr); | ||
402 | SMC_SET_TX_CFG(TX_CFG_STOP_TX_); | ||
403 | spin_unlock_irqrestore(&lp->lock, flags); | ||
404 | } | ||
405 | |||
406 | static inline void smc911x_drop_pkt(struct net_device *dev) | ||
407 | { | ||
408 | unsigned long ioaddr = dev->base_addr; | ||
409 | unsigned int fifo_count, timeout, reg; | ||
410 | |||
411 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__); | ||
412 | fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF; | ||
413 | if (fifo_count <= 4) { | ||
414 | /* Manually dump the packet data */ | ||
415 | while (fifo_count--) | ||
416 | SMC_GET_RX_FIFO(); | ||
417 | } else { | ||
418 | /* Fast forward through the bad packet */ | ||
419 | SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_); | ||
420 | timeout=50; | ||
421 | do { | ||
422 | udelay(10); | ||
423 | reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_; | ||
424 | } while ( timeout-- && reg); | ||
425 | if (timeout == 0) { | ||
426 | PRINTK("%s: timeout waiting for RX fast forward\n", dev->name); | ||
427 | } | ||
428 | } | ||
429 | } | ||
430 | |||
431 | /* | ||
432 | * This is the procedure to handle the receipt of a packet. | ||
433 | * It should be called after checking for packet presence in | ||
434 | * the RX status FIFO. It must be called with the spin lock | ||
435 | * already held. | ||
436 | */ | ||
437 | static inline void smc911x_rcv(struct net_device *dev) | ||
438 | { | ||
439 | struct smc911x_local *lp = netdev_priv(dev); | ||
440 | unsigned long ioaddr = dev->base_addr; | ||
441 | unsigned int pkt_len, status; | ||
442 | struct sk_buff *skb; | ||
443 | unsigned char *data; | ||
444 | |||
445 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", | ||
446 | dev->name, __FUNCTION__); | ||
447 | status = SMC_GET_RX_STS_FIFO(); | ||
448 | DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n", | ||
449 | dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff); | ||
450 | pkt_len = (status & RX_STS_PKT_LEN_) >> 16; | ||
451 | if (status & RX_STS_ES_) { | ||
452 | /* Deal with a bad packet */ | ||
453 | lp->stats.rx_errors++; | ||
454 | if (status & RX_STS_CRC_ERR_) | ||
455 | lp->stats.rx_crc_errors++; | ||
456 | else { | ||
457 | if (status & RX_STS_LEN_ERR_) | ||
458 | lp->stats.rx_length_errors++; | ||
459 | if (status & RX_STS_MCAST_) | ||
460 | lp->stats.multicast++; | ||
461 | } | ||
462 | /* Remove the bad packet data from the RX FIFO */ | ||
463 | smc911x_drop_pkt(dev); | ||
464 | } else { | ||
465 | /* Receive a valid packet */ | ||
466 | /* Alloc a buffer with extra room for DMA alignment */ | ||
467 | skb=dev_alloc_skb(pkt_len+32); | ||
468 | if (unlikely(skb == NULL)) { | ||
469 | PRINTK( "%s: Low memory, rcvd packet dropped.\n", | ||
470 | dev->name); | ||
471 | lp->stats.rx_dropped++; | ||
472 | smc911x_drop_pkt(dev); | ||
473 | return; | ||
474 | } | ||
475 | /* Align IP header to 32 bits | ||
476 | * Note that the device is configured to add a 2 | ||
477 | * byte padding to the packet start, so we really | ||
478 | * want to write to the orignal data pointer */ | ||
479 | data = skb->data; | ||
480 | skb_reserve(skb, 2); | ||
481 | skb_put(skb,pkt_len-4); | ||
482 | #ifdef SMC_USE_DMA | ||
483 | { | ||
484 | unsigned int fifo; | ||
485 | /* Lower the FIFO threshold if possible */ | ||
486 | fifo = SMC_GET_FIFO_INT(); | ||
487 | if (fifo & 0xFF) fifo--; | ||
488 | DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n", | ||
489 | dev->name, fifo & 0xff); | ||
490 | SMC_SET_FIFO_INT(fifo); | ||
491 | /* Setup RX DMA */ | ||
492 | SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_)); | ||
493 | lp->rxdma_active = 1; | ||
494 | lp->current_rx_skb = skb; | ||
495 | SMC_PULL_DATA(data, (pkt_len+2+15) & ~15); | ||
496 | /* Packet processing deferred to DMA RX interrupt */ | ||
497 | } | ||
498 | #else | ||
499 | SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_)); | ||
500 | SMC_PULL_DATA(data, pkt_len+2+3); | ||
501 | |||
502 | DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name,); | ||
503 | PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64); | ||
504 | dev->last_rx = jiffies; | ||
505 | skb->dev = dev; | ||
506 | skb->protocol = eth_type_trans(skb, dev); | ||
507 | netif_rx(skb); | ||
508 | lp->stats.rx_packets++; | ||
509 | lp->stats.rx_bytes += pkt_len-4; | ||
510 | #endif | ||
511 | } | ||
512 | } | ||
513 | |||
514 | /* | ||
515 | * This is called to actually send a packet to the chip. | ||
516 | */ | ||
517 | static void smc911x_hardware_send_pkt(struct net_device *dev) | ||
518 | { | ||
519 | struct smc911x_local *lp = netdev_priv(dev); | ||
520 | unsigned long ioaddr = dev->base_addr; | ||
521 | struct sk_buff *skb; | ||
522 | unsigned int cmdA, cmdB, len; | ||
523 | unsigned char *buf; | ||
524 | unsigned long flags; | ||
525 | |||
526 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
527 | BUG_ON(lp->pending_tx_skb == NULL); | ||
528 | |||
529 | skb = lp->pending_tx_skb; | ||
530 | lp->pending_tx_skb = NULL; | ||
531 | |||
532 | /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */ | ||
533 | /* cmdB {31:16] pkt tag [10:0] length */ | ||
534 | #ifdef SMC_USE_DMA | ||
535 | /* 16 byte buffer alignment mode */ | ||
536 | buf = (char*)((u32)(skb->data) & ~0xF); | ||
537 | len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF; | ||
538 | cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) | | ||
539 | TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ | | ||
540 | skb->len; | ||
541 | #else | ||
542 | buf = (char*)((u32)skb->data & ~0x3); | ||
543 | len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3; | ||
544 | cmdA = (((u32)skb->data & 0x3) << 16) | | ||
545 | TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ | | ||
546 | skb->len; | ||
547 | #endif | ||
548 | /* tag is packet length so we can use this in stats update later */ | ||
549 | cmdB = (skb->len << 16) | (skb->len & 0x7FF); | ||
550 | |||
551 | DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n", | ||
552 | dev->name, len, len, buf, cmdA, cmdB); | ||
553 | SMC_SET_TX_FIFO(cmdA); | ||
554 | SMC_SET_TX_FIFO(cmdB); | ||
555 | |||
556 | DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name); | ||
557 | PRINT_PKT(buf, len <= 64 ? len : 64); | ||
558 | |||
559 | /* Send pkt via PIO or DMA */ | ||
560 | #ifdef SMC_USE_DMA | ||
561 | lp->current_tx_skb = skb; | ||
562 | SMC_PUSH_DATA(buf, len); | ||
563 | /* DMA complete IRQ will free buffer and set jiffies */ | ||
564 | #else | ||
565 | SMC_PUSH_DATA(buf, len); | ||
566 | dev->trans_start = jiffies; | ||
567 | dev_kfree_skb(skb); | ||
568 | #endif | ||
569 | spin_lock_irqsave(&lp->lock, flags); | ||
570 | if (!lp->tx_throttle) { | ||
571 | netif_wake_queue(dev); | ||
572 | } | ||
573 | spin_unlock_irqrestore(&lp->lock, flags); | ||
574 | SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_); | ||
575 | } | ||
576 | |||
577 | /* | ||
578 | * Since I am not sure if I will have enough room in the chip's ram | ||
579 | * to store the packet, I call this routine which either sends it | ||
580 | * now, or set the card to generates an interrupt when ready | ||
581 | * for the packet. | ||
582 | */ | ||
583 | static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) | ||
584 | { | ||
585 | struct smc911x_local *lp = netdev_priv(dev); | ||
586 | unsigned long ioaddr = dev->base_addr; | ||
587 | unsigned int free; | ||
588 | unsigned long flags; | ||
589 | |||
590 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", | ||
591 | dev->name, __FUNCTION__); | ||
592 | |||
593 | BUG_ON(lp->pending_tx_skb != NULL); | ||
594 | |||
595 | free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_; | ||
596 | DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free); | ||
597 | |||
598 | /* Turn off the flow when running out of space in FIFO */ | ||
599 | if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) { | ||
600 | DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n", | ||
601 | dev->name, free); | ||
602 | spin_lock_irqsave(&lp->lock, flags); | ||
603 | /* Reenable when at least 1 packet of size MTU present */ | ||
604 | SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64); | ||
605 | lp->tx_throttle = 1; | ||
606 | netif_stop_queue(dev); | ||
607 | spin_unlock_irqrestore(&lp->lock, flags); | ||
608 | } | ||
609 | |||
610 | /* Drop packets when we run out of space in TX FIFO | ||
611 | * Account for overhead required for: | ||
612 | * | ||
613 | * Tx command words 8 bytes | ||
614 | * Start offset 15 bytes | ||
615 | * End padding 15 bytes | ||
616 | */ | ||
617 | if (unlikely(free < (skb->len + 8 + 15 + 15))) { | ||
618 | printk("%s: No Tx free space %d < %d\n", | ||
619 | dev->name, free, skb->len); | ||
620 | lp->pending_tx_skb = NULL; | ||
621 | lp->stats.tx_errors++; | ||
622 | lp->stats.tx_dropped++; | ||
623 | dev_kfree_skb(skb); | ||
624 | return 0; | ||
625 | } | ||
626 | |||
627 | #ifdef SMC_USE_DMA | ||
628 | { | ||
629 | /* If the DMA is already running then defer this packet Tx until | ||
630 | * the DMA IRQ starts it | ||
631 | */ | ||
632 | spin_lock_irqsave(&lp->lock, flags); | ||
633 | if (lp->txdma_active) { | ||
634 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name); | ||
635 | lp->pending_tx_skb = skb; | ||
636 | netif_stop_queue(dev); | ||
637 | spin_unlock_irqrestore(&lp->lock, flags); | ||
638 | return 0; | ||
639 | } else { | ||
640 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name); | ||
641 | lp->txdma_active = 1; | ||
642 | } | ||
643 | spin_unlock_irqrestore(&lp->lock, flags); | ||
644 | } | ||
645 | #endif | ||
646 | lp->pending_tx_skb = skb; | ||
647 | smc911x_hardware_send_pkt(dev); | ||
648 | |||
649 | return 0; | ||
650 | } | ||
651 | |||
652 | /* | ||
653 | * This handles a TX status interrupt, which is only called when: | ||
654 | * - a TX error occurred, or | ||
655 | * - TX of a packet completed. | ||
656 | */ | ||
657 | static void smc911x_tx(struct net_device *dev) | ||
658 | { | ||
659 | unsigned long ioaddr = dev->base_addr; | ||
660 | struct smc911x_local *lp = netdev_priv(dev); | ||
661 | unsigned int tx_status; | ||
662 | |||
663 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", | ||
664 | dev->name, __FUNCTION__); | ||
665 | |||
666 | /* Collect the TX status */ | ||
667 | while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) { | ||
668 | DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n", | ||
669 | dev->name, | ||
670 | (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16); | ||
671 | tx_status = SMC_GET_TX_STS_FIFO(); | ||
672 | lp->stats.tx_packets++; | ||
673 | lp->stats.tx_bytes+=tx_status>>16; | ||
674 | DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n", | ||
675 | dev->name, (tx_status & 0xffff0000) >> 16, | ||
676 | tx_status & 0x0000ffff); | ||
677 | /* count Tx errors, but ignore lost carrier errors when in | ||
678 | * full-duplex mode */ | ||
679 | if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx && | ||
680 | !(tx_status & 0x00000306))) { | ||
681 | lp->stats.tx_errors++; | ||
682 | } | ||
683 | if (tx_status & TX_STS_MANY_COLL_) { | ||
684 | lp->stats.collisions+=16; | ||
685 | lp->stats.tx_aborted_errors++; | ||
686 | } else { | ||
687 | lp->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3; | ||
688 | } | ||
689 | /* carrier error only has meaning for half-duplex communication */ | ||
690 | if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) && | ||
691 | !lp->ctl_rfduplx) { | ||
692 | lp->stats.tx_carrier_errors++; | ||
693 | } | ||
694 | if (tx_status & TX_STS_LATE_COLL_) { | ||
695 | lp->stats.collisions++; | ||
696 | lp->stats.tx_aborted_errors++; | ||
697 | } | ||
698 | } | ||
699 | } | ||
700 | |||
701 | |||
702 | /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/ | ||
703 | /* | ||
704 | * Reads a register from the MII Management serial interface | ||
705 | */ | ||
706 | |||
707 | static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg) | ||
708 | { | ||
709 | unsigned long ioaddr = dev->base_addr; | ||
710 | unsigned int phydata; | ||
711 | |||
712 | SMC_GET_MII(phyreg, phyaddr, phydata); | ||
713 | |||
714 | DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n", | ||
715 | __FUNCTION__, phyaddr, phyreg, phydata); | ||
716 | return phydata; | ||
717 | } | ||
718 | |||
719 | |||
720 | /* | ||
721 | * Writes a register to the MII Management serial interface | ||
722 | */ | ||
723 | static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg, | ||
724 | int phydata) | ||
725 | { | ||
726 | unsigned long ioaddr = dev->base_addr; | ||
727 | |||
728 | DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n", | ||
729 | __FUNCTION__, phyaddr, phyreg, phydata); | ||
730 | |||
731 | SMC_SET_MII(phyreg, phyaddr, phydata); | ||
732 | } | ||
733 | |||
734 | /* | ||
735 | * Finds and reports the PHY address (115 and 117 have external | ||
736 | * PHY interface 118 has internal only | ||
737 | */ | ||
738 | static void smc911x_phy_detect(struct net_device *dev) | ||
739 | { | ||
740 | unsigned long ioaddr = dev->base_addr; | ||
741 | struct smc911x_local *lp = netdev_priv(dev); | ||
742 | int phyaddr; | ||
743 | unsigned int cfg, id1, id2; | ||
744 | |||
745 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
746 | |||
747 | lp->phy_type = 0; | ||
748 | |||
749 | /* | ||
750 | * Scan all 32 PHY addresses if necessary, starting at | ||
751 | * PHY#1 to PHY#31, and then PHY#0 last. | ||
752 | */ | ||
753 | switch(lp->version) { | ||
754 | case 0x115: | ||
755 | case 0x117: | ||
756 | cfg = SMC_GET_HW_CFG(); | ||
757 | if (cfg & HW_CFG_EXT_PHY_DET_) { | ||
758 | cfg &= ~HW_CFG_PHY_CLK_SEL_; | ||
759 | cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; | ||
760 | SMC_SET_HW_CFG(cfg); | ||
761 | udelay(10); /* Wait for clocks to stop */ | ||
762 | |||
763 | cfg |= HW_CFG_EXT_PHY_EN_; | ||
764 | SMC_SET_HW_CFG(cfg); | ||
765 | udelay(10); /* Wait for clocks to stop */ | ||
766 | |||
767 | cfg &= ~HW_CFG_PHY_CLK_SEL_; | ||
768 | cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; | ||
769 | SMC_SET_HW_CFG(cfg); | ||
770 | udelay(10); /* Wait for clocks to stop */ | ||
771 | |||
772 | cfg |= HW_CFG_SMI_SEL_; | ||
773 | SMC_SET_HW_CFG(cfg); | ||
774 | |||
775 | for (phyaddr = 1; phyaddr < 32; ++phyaddr) { | ||
776 | |||
777 | /* Read the PHY identifiers */ | ||
778 | SMC_GET_PHY_ID1(phyaddr & 31, id1); | ||
779 | SMC_GET_PHY_ID2(phyaddr & 31, id2); | ||
780 | |||
781 | /* Make sure it is a valid identifier */ | ||
782 | if (id1 != 0x0000 && id1 != 0xffff && | ||
783 | id1 != 0x8000 && id2 != 0x0000 && | ||
784 | id2 != 0xffff && id2 != 0x8000) { | ||
785 | /* Save the PHY's address */ | ||
786 | lp->mii.phy_id = phyaddr & 31; | ||
787 | lp->phy_type = id1 << 16 | id2; | ||
788 | break; | ||
789 | } | ||
790 | } | ||
791 | } | ||
792 | default: | ||
793 | /* Internal media only */ | ||
794 | SMC_GET_PHY_ID1(1, id1); | ||
795 | SMC_GET_PHY_ID2(1, id2); | ||
796 | /* Save the PHY's address */ | ||
797 | lp->mii.phy_id = 1; | ||
798 | lp->phy_type = id1 << 16 | id2; | ||
799 | } | ||
800 | |||
801 | DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n", | ||
802 | dev->name, id1, id2, lp->mii.phy_id); | ||
803 | } | ||
804 | |||
805 | /* | ||
806 | * Sets the PHY to a configuration as determined by the user. | ||
807 | * Called with spin_lock held. | ||
808 | */ | ||
809 | static int smc911x_phy_fixed(struct net_device *dev) | ||
810 | { | ||
811 | struct smc911x_local *lp = netdev_priv(dev); | ||
812 | unsigned long ioaddr = dev->base_addr; | ||
813 | int phyaddr = lp->mii.phy_id; | ||
814 | int bmcr; | ||
815 | |||
816 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
817 | |||
818 | /* Enter Link Disable state */ | ||
819 | SMC_GET_PHY_BMCR(phyaddr, bmcr); | ||
820 | bmcr |= BMCR_PDOWN; | ||
821 | SMC_SET_PHY_BMCR(phyaddr, bmcr); | ||
822 | |||
823 | /* | ||
824 | * Set our fixed capabilities | ||
825 | * Disable auto-negotiation | ||
826 | */ | ||
827 | bmcr &= ~BMCR_ANENABLE; | ||
828 | if (lp->ctl_rfduplx) | ||
829 | bmcr |= BMCR_FULLDPLX; | ||
830 | |||
831 | if (lp->ctl_rspeed == 100) | ||
832 | bmcr |= BMCR_SPEED100; | ||
833 | |||
834 | /* Write our capabilities to the phy control register */ | ||
835 | SMC_SET_PHY_BMCR(phyaddr, bmcr); | ||
836 | |||
837 | /* Re-Configure the Receive/Phy Control register */ | ||
838 | bmcr &= ~BMCR_PDOWN; | ||
839 | SMC_SET_PHY_BMCR(phyaddr, bmcr); | ||
840 | |||
841 | return 1; | ||
842 | } | ||
843 | |||
844 | /* | ||
845 | * smc911x_phy_reset - reset the phy | ||
846 | * @dev: net device | ||
847 | * @phy: phy address | ||
848 | * | ||
849 | * Issue a software reset for the specified PHY and | ||
850 | * wait up to 100ms for the reset to complete. We should | ||
851 | * not access the PHY for 50ms after issuing the reset. | ||
852 | * | ||
853 | * The time to wait appears to be dependent on the PHY. | ||
854 | * | ||
855 | */ | ||
856 | static int smc911x_phy_reset(struct net_device *dev, int phy) | ||
857 | { | ||
858 | struct smc911x_local *lp = netdev_priv(dev); | ||
859 | unsigned long ioaddr = dev->base_addr; | ||
860 | int timeout; | ||
861 | unsigned long flags; | ||
862 | unsigned int reg; | ||
863 | |||
864 | DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__); | ||
865 | |||
866 | spin_lock_irqsave(&lp->lock, flags); | ||
867 | reg = SMC_GET_PMT_CTRL(); | ||
868 | reg &= ~0xfffff030; | ||
869 | reg |= PMT_CTRL_PHY_RST_; | ||
870 | SMC_SET_PMT_CTRL(reg); | ||
871 | spin_unlock_irqrestore(&lp->lock, flags); | ||
872 | for (timeout = 2; timeout; timeout--) { | ||
873 | msleep(50); | ||
874 | spin_lock_irqsave(&lp->lock, flags); | ||
875 | reg = SMC_GET_PMT_CTRL(); | ||
876 | spin_unlock_irqrestore(&lp->lock, flags); | ||
877 | if (!(reg & PMT_CTRL_PHY_RST_)) { | ||
878 | /* extra delay required because the phy may | ||
879 | * not be completed with its reset | ||
880 | * when PHY_BCR_RESET_ is cleared. 256us | ||
881 | * should suffice, but use 500us to be safe | ||
882 | */ | ||
883 | udelay(500); | ||
884 | break; | ||
885 | } | ||
886 | } | ||
887 | |||
888 | return reg & PMT_CTRL_PHY_RST_; | ||
889 | } | ||
890 | |||
891 | /* | ||
892 | * smc911x_phy_powerdown - powerdown phy | ||
893 | * @dev: net device | ||
894 | * @phy: phy address | ||
895 | * | ||
896 | * Power down the specified PHY | ||
897 | */ | ||
898 | static void smc911x_phy_powerdown(struct net_device *dev, int phy) | ||
899 | { | ||
900 | unsigned long ioaddr = dev->base_addr; | ||
901 | unsigned int bmcr; | ||
902 | |||
903 | /* Enter Link Disable state */ | ||
904 | SMC_GET_PHY_BMCR(phy, bmcr); | ||
905 | bmcr |= BMCR_PDOWN; | ||
906 | SMC_SET_PHY_BMCR(phy, bmcr); | ||
907 | } | ||
908 | |||
909 | /* | ||
910 | * smc911x_phy_check_media - check the media status and adjust BMCR | ||
911 | * @dev: net device | ||
912 | * @init: set true for initialisation | ||
913 | * | ||
914 | * Select duplex mode depending on negotiation state. This | ||
915 | * also updates our carrier state. | ||
916 | */ | ||
917 | static void smc911x_phy_check_media(struct net_device *dev, int init) | ||
918 | { | ||
919 | struct smc911x_local *lp = netdev_priv(dev); | ||
920 | unsigned long ioaddr = dev->base_addr; | ||
921 | int phyaddr = lp->mii.phy_id; | ||
922 | unsigned int bmcr, cr; | ||
923 | |||
924 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
925 | |||
926 | if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) { | ||
927 | /* duplex state has changed */ | ||
928 | SMC_GET_PHY_BMCR(phyaddr, bmcr); | ||
929 | SMC_GET_MAC_CR(cr); | ||
930 | if (lp->mii.full_duplex) { | ||
931 | DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name); | ||
932 | bmcr |= BMCR_FULLDPLX; | ||
933 | cr |= MAC_CR_RCVOWN_; | ||
934 | } else { | ||
935 | DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name); | ||
936 | bmcr &= ~BMCR_FULLDPLX; | ||
937 | cr &= ~MAC_CR_RCVOWN_; | ||
938 | } | ||
939 | SMC_SET_PHY_BMCR(phyaddr, bmcr); | ||
940 | SMC_SET_MAC_CR(cr); | ||
941 | } | ||
942 | } | ||
943 | |||
944 | /* | ||
945 | * Configures the specified PHY through the MII management interface | ||
946 | * using Autonegotiation. | ||
947 | * Calls smc911x_phy_fixed() if the user has requested a certain config. | ||
948 | * If RPC ANEG bit is set, the media selection is dependent purely on | ||
949 | * the selection by the MII (either in the MII BMCR reg or the result | ||
950 | * of autonegotiation.) If the RPC ANEG bit is cleared, the selection | ||
951 | * is controlled by the RPC SPEED and RPC DPLX bits. | ||
952 | */ | ||
953 | static void smc911x_phy_configure(void *data) | ||
954 | { | ||
955 | struct net_device *dev = data; | ||
956 | struct smc911x_local *lp = netdev_priv(dev); | ||
957 | unsigned long ioaddr = dev->base_addr; | ||
958 | int phyaddr = lp->mii.phy_id; | ||
959 | int my_phy_caps; /* My PHY capabilities */ | ||
960 | int my_ad_caps; /* My Advertised capabilities */ | ||
961 | int status; | ||
962 | unsigned long flags; | ||
963 | |||
964 | DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__); | ||
965 | |||
966 | /* | ||
967 | * We should not be called if phy_type is zero. | ||
968 | */ | ||
969 | if (lp->phy_type == 0) | ||
970 | goto smc911x_phy_configure_exit; | ||
971 | |||
972 | if (smc911x_phy_reset(dev, phyaddr)) { | ||
973 | printk("%s: PHY reset timed out\n", dev->name); | ||
974 | goto smc911x_phy_configure_exit; | ||
975 | } | ||
976 | spin_lock_irqsave(&lp->lock, flags); | ||
977 | |||
978 | /* | ||
979 | * Enable PHY Interrupts (for register 18) | ||
980 | * Interrupts listed here are enabled | ||
981 | */ | ||
982 | SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ | | ||
983 | PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ | | ||
984 | PHY_INT_MASK_LINK_DOWN_); | ||
985 | |||
986 | /* If the user requested no auto neg, then go set his request */ | ||
987 | if (lp->mii.force_media) { | ||
988 | smc911x_phy_fixed(dev); | ||
989 | goto smc911x_phy_configure_exit; | ||
990 | } | ||
991 | |||
992 | /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */ | ||
993 | SMC_GET_PHY_BMSR(phyaddr, my_phy_caps); | ||
994 | if (!(my_phy_caps & BMSR_ANEGCAPABLE)) { | ||
995 | printk(KERN_INFO "Auto negotiation NOT supported\n"); | ||
996 | smc911x_phy_fixed(dev); | ||
997 | goto smc911x_phy_configure_exit; | ||
998 | } | ||
999 | |||
1000 | /* CSMA capable w/ both pauses */ | ||
1001 | my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; | ||
1002 | |||
1003 | if (my_phy_caps & BMSR_100BASE4) | ||
1004 | my_ad_caps |= ADVERTISE_100BASE4; | ||
1005 | if (my_phy_caps & BMSR_100FULL) | ||
1006 | my_ad_caps |= ADVERTISE_100FULL; | ||
1007 | if (my_phy_caps & BMSR_100HALF) | ||
1008 | my_ad_caps |= ADVERTISE_100HALF; | ||
1009 | if (my_phy_caps & BMSR_10FULL) | ||
1010 | my_ad_caps |= ADVERTISE_10FULL; | ||
1011 | if (my_phy_caps & BMSR_10HALF) | ||
1012 | my_ad_caps |= ADVERTISE_10HALF; | ||
1013 | |||
1014 | /* Disable capabilities not selected by our user */ | ||
1015 | if (lp->ctl_rspeed != 100) | ||
1016 | my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF); | ||
1017 | |||
1018 | if (!lp->ctl_rfduplx) | ||
1019 | my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL); | ||
1020 | |||
1021 | /* Update our Auto-Neg Advertisement Register */ | ||
1022 | SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps); | ||
1023 | lp->mii.advertising = my_ad_caps; | ||
1024 | |||
1025 | /* | ||
1026 | * Read the register back. Without this, it appears that when | ||
1027 | * auto-negotiation is restarted, sometimes it isn't ready and | ||
1028 | * the link does not come up. | ||
1029 | */ | ||
1030 | udelay(10); | ||
1031 | SMC_GET_PHY_MII_ADV(phyaddr, status); | ||
1032 | |||
1033 | DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps); | ||
1034 | DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps); | ||
1035 | |||
1036 | /* Restart auto-negotiation process in order to advertise my caps */ | ||
1037 | SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART); | ||
1038 | |||
1039 | smc911x_phy_check_media(dev, 1); | ||
1040 | |||
1041 | smc911x_phy_configure_exit: | ||
1042 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1043 | lp->work_pending = 0; | ||
1044 | } | ||
1045 | |||
1046 | /* | ||
1047 | * smc911x_phy_interrupt | ||
1048 | * | ||
1049 | * Purpose: Handle interrupts relating to PHY register 18. This is | ||
1050 | * called from the "hard" interrupt handler under our private spinlock. | ||
1051 | */ | ||
1052 | static void smc911x_phy_interrupt(struct net_device *dev) | ||
1053 | { | ||
1054 | struct smc911x_local *lp = netdev_priv(dev); | ||
1055 | unsigned long ioaddr = dev->base_addr; | ||
1056 | int phyaddr = lp->mii.phy_id; | ||
1057 | int status; | ||
1058 | |||
1059 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1060 | |||
1061 | if (lp->phy_type == 0) | ||
1062 | return; | ||
1063 | |||
1064 | smc911x_phy_check_media(dev, 0); | ||
1065 | /* read to clear status bits */ | ||
1066 | SMC_GET_PHY_INT_SRC(phyaddr,status); | ||
1067 | DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n", | ||
1068 | dev->name, status & 0xffff); | ||
1069 | DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n", | ||
1070 | dev->name, SMC_GET_AFC_CFG()); | ||
1071 | } | ||
1072 | |||
1073 | /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/ | ||
1074 | |||
1075 | /* | ||
1076 | * This is the main routine of the driver, to handle the device when | ||
1077 | * it needs some attention. | ||
1078 | */ | ||
1079 | static irqreturn_t smc911x_interrupt(int irq, void *dev_id, struct pt_regs *regs) | ||
1080 | { | ||
1081 | struct net_device *dev = dev_id; | ||
1082 | unsigned long ioaddr = dev->base_addr; | ||
1083 | struct smc911x_local *lp = netdev_priv(dev); | ||
1084 | unsigned int status, mask, timeout; | ||
1085 | unsigned int rx_overrun=0, cr, pkts; | ||
1086 | unsigned long flags; | ||
1087 | |||
1088 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1089 | |||
1090 | spin_lock_irqsave(&lp->lock, flags); | ||
1091 | |||
1092 | /* Spurious interrupt check */ | ||
1093 | if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) != | ||
1094 | (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) { | ||
1095 | return IRQ_NONE; | ||
1096 | } | ||
1097 | |||
1098 | mask = SMC_GET_INT_EN(); | ||
1099 | SMC_SET_INT_EN(0); | ||
1100 | |||
1101 | /* set a timeout value, so I don't stay here forever */ | ||
1102 | timeout = 8; | ||
1103 | |||
1104 | |||
1105 | do { | ||
1106 | status = SMC_GET_INT(); | ||
1107 | |||
1108 | DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n", | ||
1109 | dev->name, status, mask, status & ~mask); | ||
1110 | |||
1111 | status &= mask; | ||
1112 | if (!status) | ||
1113 | break; | ||
1114 | |||
1115 | /* Handle SW interrupt condition */ | ||
1116 | if (status & INT_STS_SW_INT_) { | ||
1117 | SMC_ACK_INT(INT_STS_SW_INT_); | ||
1118 | mask &= ~INT_EN_SW_INT_EN_; | ||
1119 | } | ||
1120 | /* Handle various error conditions */ | ||
1121 | if (status & INT_STS_RXE_) { | ||
1122 | SMC_ACK_INT(INT_STS_RXE_); | ||
1123 | lp->stats.rx_errors++; | ||
1124 | } | ||
1125 | if (status & INT_STS_RXDFH_INT_) { | ||
1126 | SMC_ACK_INT(INT_STS_RXDFH_INT_); | ||
1127 | lp->stats.rx_dropped+=SMC_GET_RX_DROP(); | ||
1128 | } | ||
1129 | /* Undocumented interrupt-what is the right thing to do here? */ | ||
1130 | if (status & INT_STS_RXDF_INT_) { | ||
1131 | SMC_ACK_INT(INT_STS_RXDF_INT_); | ||
1132 | } | ||
1133 | |||
1134 | /* Rx Data FIFO exceeds set level */ | ||
1135 | if (status & INT_STS_RDFL_) { | ||
1136 | if (IS_REV_A(lp->revision)) { | ||
1137 | rx_overrun=1; | ||
1138 | SMC_GET_MAC_CR(cr); | ||
1139 | cr &= ~MAC_CR_RXEN_; | ||
1140 | SMC_SET_MAC_CR(cr); | ||
1141 | DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name); | ||
1142 | lp->stats.rx_errors++; | ||
1143 | lp->stats.rx_fifo_errors++; | ||
1144 | } | ||
1145 | SMC_ACK_INT(INT_STS_RDFL_); | ||
1146 | } | ||
1147 | if (status & INT_STS_RDFO_) { | ||
1148 | if (!IS_REV_A(lp->revision)) { | ||
1149 | SMC_GET_MAC_CR(cr); | ||
1150 | cr &= ~MAC_CR_RXEN_; | ||
1151 | SMC_SET_MAC_CR(cr); | ||
1152 | rx_overrun=1; | ||
1153 | DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name); | ||
1154 | lp->stats.rx_errors++; | ||
1155 | lp->stats.rx_fifo_errors++; | ||
1156 | } | ||
1157 | SMC_ACK_INT(INT_STS_RDFO_); | ||
1158 | } | ||
1159 | /* Handle receive condition */ | ||
1160 | if ((status & INT_STS_RSFL_) || rx_overrun) { | ||
1161 | unsigned int fifo; | ||
1162 | DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name); | ||
1163 | fifo = SMC_GET_RX_FIFO_INF(); | ||
1164 | pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16; | ||
1165 | DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n", | ||
1166 | dev->name, pkts, fifo & 0xFFFF ); | ||
1167 | if (pkts != 0) { | ||
1168 | #ifdef SMC_USE_DMA | ||
1169 | unsigned int fifo; | ||
1170 | if (lp->rxdma_active){ | ||
1171 | DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, | ||
1172 | "%s: RX DMA active\n", dev->name); | ||
1173 | /* The DMA is already running so up the IRQ threshold */ | ||
1174 | fifo = SMC_GET_FIFO_INT() & ~0xFF; | ||
1175 | fifo |= pkts & 0xFF; | ||
1176 | DBG(SMC_DEBUG_RX, | ||
1177 | "%s: Setting RX stat FIFO threshold to %d\n", | ||
1178 | dev->name, fifo & 0xff); | ||
1179 | SMC_SET_FIFO_INT(fifo); | ||
1180 | } else | ||
1181 | #endif | ||
1182 | smc911x_rcv(dev); | ||
1183 | } | ||
1184 | SMC_ACK_INT(INT_STS_RSFL_); | ||
1185 | } | ||
1186 | /* Handle transmit FIFO available */ | ||
1187 | if (status & INT_STS_TDFA_) { | ||
1188 | DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name); | ||
1189 | SMC_SET_FIFO_TDA(0xFF); | ||
1190 | lp->tx_throttle = 0; | ||
1191 | #ifdef SMC_USE_DMA | ||
1192 | if (!lp->txdma_active) | ||
1193 | #endif | ||
1194 | netif_wake_queue(dev); | ||
1195 | SMC_ACK_INT(INT_STS_TDFA_); | ||
1196 | } | ||
1197 | /* Handle transmit done condition */ | ||
1198 | #if 1 | ||
1199 | if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) { | ||
1200 | DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, | ||
1201 | "%s: Tx stat FIFO limit (%d) /GPT irq\n", | ||
1202 | dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16); | ||
1203 | smc911x_tx(dev); | ||
1204 | SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000); | ||
1205 | SMC_ACK_INT(INT_STS_TSFL_); | ||
1206 | SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_); | ||
1207 | } | ||
1208 | #else | ||
1209 | if (status & INT_STS_TSFL_) { | ||
1210 | DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, ); | ||
1211 | smc911x_tx(dev); | ||
1212 | SMC_ACK_INT(INT_STS_TSFL_); | ||
1213 | } | ||
1214 | |||
1215 | if (status & INT_STS_GPT_INT_) { | ||
1216 | DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n", | ||
1217 | dev->name, | ||
1218 | SMC_GET_IRQ_CFG(), | ||
1219 | SMC_GET_FIFO_INT(), | ||
1220 | SMC_GET_RX_CFG()); | ||
1221 | DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x " | ||
1222 | "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n", | ||
1223 | dev->name, | ||
1224 | (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16, | ||
1225 | SMC_GET_RX_FIFO_INF() & 0xffff, | ||
1226 | SMC_GET_RX_STS_FIFO_PEEK()); | ||
1227 | SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000); | ||
1228 | SMC_ACK_INT(INT_STS_GPT_INT_); | ||
1229 | } | ||
1230 | #endif | ||
1231 | |||
1232 | /* Handle PHY interupt condition */ | ||
1233 | if (status & INT_STS_PHY_INT_) { | ||
1234 | DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name); | ||
1235 | smc911x_phy_interrupt(dev); | ||
1236 | SMC_ACK_INT(INT_STS_PHY_INT_); | ||
1237 | } | ||
1238 | } while (--timeout); | ||
1239 | |||
1240 | /* restore mask state */ | ||
1241 | SMC_SET_INT_EN(mask); | ||
1242 | |||
1243 | DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n", | ||
1244 | dev->name, 8-timeout); | ||
1245 | |||
1246 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1247 | |||
1248 | DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout); | ||
1249 | |||
1250 | return IRQ_HANDLED; | ||
1251 | } | ||
1252 | |||
1253 | #ifdef SMC_USE_DMA | ||
1254 | static void | ||
1255 | smc911x_tx_dma_irq(int dma, void *data, struct pt_regs *regs) | ||
1256 | { | ||
1257 | struct net_device *dev = (struct net_device *)data; | ||
1258 | struct smc911x_local *lp = netdev_priv(dev); | ||
1259 | struct sk_buff *skb = lp->current_tx_skb; | ||
1260 | unsigned long flags; | ||
1261 | |||
1262 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1263 | |||
1264 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name); | ||
1265 | /* Clear the DMA interrupt sources */ | ||
1266 | SMC_DMA_ACK_IRQ(dev, dma); | ||
1267 | BUG_ON(skb == NULL); | ||
1268 | dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE); | ||
1269 | dev->trans_start = jiffies; | ||
1270 | dev_kfree_skb_irq(skb); | ||
1271 | lp->current_tx_skb = NULL; | ||
1272 | if (lp->pending_tx_skb != NULL) | ||
1273 | smc911x_hardware_send_pkt(dev); | ||
1274 | else { | ||
1275 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, | ||
1276 | "%s: No pending Tx packets. DMA disabled\n", dev->name); | ||
1277 | spin_lock_irqsave(&lp->lock, flags); | ||
1278 | lp->txdma_active = 0; | ||
1279 | if (!lp->tx_throttle) { | ||
1280 | netif_wake_queue(dev); | ||
1281 | } | ||
1282 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1283 | } | ||
1284 | |||
1285 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, | ||
1286 | "%s: TX DMA irq completed\n", dev->name); | ||
1287 | } | ||
1288 | static void | ||
1289 | smc911x_rx_dma_irq(int dma, void *data, struct pt_regs *regs) | ||
1290 | { | ||
1291 | struct net_device *dev = (struct net_device *)data; | ||
1292 | unsigned long ioaddr = dev->base_addr; | ||
1293 | struct smc911x_local *lp = netdev_priv(dev); | ||
1294 | struct sk_buff *skb = lp->current_rx_skb; | ||
1295 | unsigned long flags; | ||
1296 | unsigned int pkts; | ||
1297 | |||
1298 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1299 | DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name); | ||
1300 | /* Clear the DMA interrupt sources */ | ||
1301 | SMC_DMA_ACK_IRQ(dev, dma); | ||
1302 | dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE); | ||
1303 | BUG_ON(skb == NULL); | ||
1304 | lp->current_rx_skb = NULL; | ||
1305 | PRINT_PKT(skb->data, skb->len); | ||
1306 | dev->last_rx = jiffies; | ||
1307 | skb->dev = dev; | ||
1308 | skb->protocol = eth_type_trans(skb, dev); | ||
1309 | netif_rx(skb); | ||
1310 | lp->stats.rx_packets++; | ||
1311 | lp->stats.rx_bytes += skb->len; | ||
1312 | |||
1313 | spin_lock_irqsave(&lp->lock, flags); | ||
1314 | pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16; | ||
1315 | if (pkts != 0) { | ||
1316 | smc911x_rcv(dev); | ||
1317 | }else { | ||
1318 | lp->rxdma_active = 0; | ||
1319 | } | ||
1320 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1321 | DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, | ||
1322 | "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n", | ||
1323 | dev->name, pkts); | ||
1324 | } | ||
1325 | #endif /* SMC_USE_DMA */ | ||
1326 | |||
1327 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
1328 | /* | ||
1329 | * Polling receive - used by netconsole and other diagnostic tools | ||
1330 | * to allow network i/o with interrupts disabled. | ||
1331 | */ | ||
1332 | static void smc911x_poll_controller(struct net_device *dev) | ||
1333 | { | ||
1334 | disable_irq(dev->irq); | ||
1335 | smc911x_interrupt(dev->irq, dev, NULL); | ||
1336 | enable_irq(dev->irq); | ||
1337 | } | ||
1338 | #endif | ||
1339 | |||
1340 | /* Our watchdog timed out. Called by the networking layer */ | ||
1341 | static void smc911x_timeout(struct net_device *dev) | ||
1342 | { | ||
1343 | struct smc911x_local *lp = netdev_priv(dev); | ||
1344 | unsigned long ioaddr = dev->base_addr; | ||
1345 | int status, mask; | ||
1346 | unsigned long flags; | ||
1347 | |||
1348 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1349 | |||
1350 | spin_lock_irqsave(&lp->lock, flags); | ||
1351 | status = SMC_GET_INT(); | ||
1352 | mask = SMC_GET_INT_EN(); | ||
1353 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1354 | DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n", | ||
1355 | dev->name, status, mask); | ||
1356 | |||
1357 | /* Dump the current TX FIFO contents and restart */ | ||
1358 | mask = SMC_GET_TX_CFG(); | ||
1359 | SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_); | ||
1360 | /* | ||
1361 | * Reconfiguring the PHY doesn't seem like a bad idea here, but | ||
1362 | * smc911x_phy_configure() calls msleep() which calls schedule_timeout() | ||
1363 | * which calls schedule(). Hence we use a work queue. | ||
1364 | */ | ||
1365 | if (lp->phy_type != 0) { | ||
1366 | if (schedule_work(&lp->phy_configure)) { | ||
1367 | lp->work_pending = 1; | ||
1368 | } | ||
1369 | } | ||
1370 | |||
1371 | /* We can accept TX packets again */ | ||
1372 | dev->trans_start = jiffies; | ||
1373 | netif_wake_queue(dev); | ||
1374 | } | ||
1375 | |||
1376 | /* | ||
1377 | * This routine will, depending on the values passed to it, | ||
1378 | * either make it accept multicast packets, go into | ||
1379 | * promiscuous mode (for TCPDUMP and cousins) or accept | ||
1380 | * a select set of multicast packets | ||
1381 | */ | ||
1382 | static void smc911x_set_multicast_list(struct net_device *dev) | ||
1383 | { | ||
1384 | struct smc911x_local *lp = netdev_priv(dev); | ||
1385 | unsigned long ioaddr = dev->base_addr; | ||
1386 | unsigned int multicast_table[2]; | ||
1387 | unsigned int mcr, update_multicast = 0; | ||
1388 | unsigned long flags; | ||
1389 | /* table for flipping the order of 5 bits */ | ||
1390 | static const unsigned char invert5[] = | ||
1391 | {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C, | ||
1392 | 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E, | ||
1393 | 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D, | ||
1394 | 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F}; | ||
1395 | |||
1396 | |||
1397 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1398 | |||
1399 | spin_lock_irqsave(&lp->lock, flags); | ||
1400 | SMC_GET_MAC_CR(mcr); | ||
1401 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1402 | |||
1403 | if (dev->flags & IFF_PROMISC) { | ||
1404 | |||
1405 | DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name); | ||
1406 | mcr |= MAC_CR_PRMS_; | ||
1407 | } | ||
1408 | /* | ||
1409 | * Here, I am setting this to accept all multicast packets. | ||
1410 | * I don't need to zero the multicast table, because the flag is | ||
1411 | * checked before the table is | ||
1412 | */ | ||
1413 | else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) { | ||
1414 | DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name); | ||
1415 | mcr |= MAC_CR_MCPAS_; | ||
1416 | } | ||
1417 | |||
1418 | /* | ||
1419 | * This sets the internal hardware table to filter out unwanted | ||
1420 | * multicast packets before they take up memory. | ||
1421 | * | ||
1422 | * The SMC chip uses a hash table where the high 6 bits of the CRC of | ||
1423 | * address are the offset into the table. If that bit is 1, then the | ||
1424 | * multicast packet is accepted. Otherwise, it's dropped silently. | ||
1425 | * | ||
1426 | * To use the 6 bits as an offset into the table, the high 1 bit is | ||
1427 | * the number of the 32 bit register, while the low 5 bits are the bit | ||
1428 | * within that register. | ||
1429 | */ | ||
1430 | else if (dev->mc_count) { | ||
1431 | int i; | ||
1432 | struct dev_mc_list *cur_addr; | ||
1433 | |||
1434 | /* Set the Hash perfec mode */ | ||
1435 | mcr |= MAC_CR_HPFILT_; | ||
1436 | |||
1437 | /* start with a table of all zeros: reject all */ | ||
1438 | memset(multicast_table, 0, sizeof(multicast_table)); | ||
1439 | |||
1440 | cur_addr = dev->mc_list; | ||
1441 | for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) { | ||
1442 | int position; | ||
1443 | |||
1444 | /* do we have a pointer here? */ | ||
1445 | if (!cur_addr) | ||
1446 | break; | ||
1447 | /* make sure this is a multicast address - | ||
1448 | shouldn't this be a given if we have it here ? */ | ||
1449 | if (!(*cur_addr->dmi_addr & 1)) | ||
1450 | continue; | ||
1451 | |||
1452 | /* only use the low order bits */ | ||
1453 | position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f; | ||
1454 | |||
1455 | /* do some messy swapping to put the bit in the right spot */ | ||
1456 | multicast_table[invert5[position&0x1F]&0x1] |= | ||
1457 | (1<<invert5[(position>>1)&0x1F]); | ||
1458 | } | ||
1459 | |||
1460 | /* be sure I get rid of flags I might have set */ | ||
1461 | mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | ||
1462 | |||
1463 | /* now, the table can be loaded into the chipset */ | ||
1464 | update_multicast = 1; | ||
1465 | } else { | ||
1466 | DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n", | ||
1467 | dev->name); | ||
1468 | mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | ||
1469 | |||
1470 | /* | ||
1471 | * since I'm disabling all multicast entirely, I need to | ||
1472 | * clear the multicast list | ||
1473 | */ | ||
1474 | memset(multicast_table, 0, sizeof(multicast_table)); | ||
1475 | update_multicast = 1; | ||
1476 | } | ||
1477 | |||
1478 | spin_lock_irqsave(&lp->lock, flags); | ||
1479 | SMC_SET_MAC_CR(mcr); | ||
1480 | if (update_multicast) { | ||
1481 | DBG(SMC_DEBUG_MISC, | ||
1482 | "%s: update mcast hash table 0x%08x 0x%08x\n", | ||
1483 | dev->name, multicast_table[0], multicast_table[1]); | ||
1484 | SMC_SET_HASHL(multicast_table[0]); | ||
1485 | SMC_SET_HASHH(multicast_table[1]); | ||
1486 | } | ||
1487 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1488 | } | ||
1489 | |||
1490 | |||
1491 | /* | ||
1492 | * Open and Initialize the board | ||
1493 | * | ||
1494 | * Set up everything, reset the card, etc.. | ||
1495 | */ | ||
1496 | static int | ||
1497 | smc911x_open(struct net_device *dev) | ||
1498 | { | ||
1499 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1500 | |||
1501 | /* | ||
1502 | * Check that the address is valid. If its not, refuse | ||
1503 | * to bring the device up. The user must specify an | ||
1504 | * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx | ||
1505 | */ | ||
1506 | if (!is_valid_ether_addr(dev->dev_addr)) { | ||
1507 | PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__); | ||
1508 | return -EINVAL; | ||
1509 | } | ||
1510 | |||
1511 | /* reset the hardware */ | ||
1512 | smc911x_reset(dev); | ||
1513 | |||
1514 | /* Configure the PHY, initialize the link state */ | ||
1515 | smc911x_phy_configure(dev); | ||
1516 | |||
1517 | /* Turn on Tx + Rx */ | ||
1518 | smc911x_enable(dev); | ||
1519 | |||
1520 | netif_start_queue(dev); | ||
1521 | |||
1522 | return 0; | ||
1523 | } | ||
1524 | |||
1525 | /* | ||
1526 | * smc911x_close | ||
1527 | * | ||
1528 | * this makes the board clean up everything that it can | ||
1529 | * and not talk to the outside world. Caused by | ||
1530 | * an 'ifconfig ethX down' | ||
1531 | */ | ||
1532 | static int smc911x_close(struct net_device *dev) | ||
1533 | { | ||
1534 | struct smc911x_local *lp = netdev_priv(dev); | ||
1535 | |||
1536 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1537 | |||
1538 | netif_stop_queue(dev); | ||
1539 | netif_carrier_off(dev); | ||
1540 | |||
1541 | /* clear everything */ | ||
1542 | smc911x_shutdown(dev); | ||
1543 | |||
1544 | if (lp->phy_type != 0) { | ||
1545 | /* We need to ensure that no calls to | ||
1546 | * smc911x_phy_configure are pending. | ||
1547 | |||
1548 | * flush_scheduled_work() cannot be called because we | ||
1549 | * are running with the netlink semaphore held (from | ||
1550 | * devinet_ioctl()) and the pending work queue | ||
1551 | * contains linkwatch_event() (scheduled by | ||
1552 | * netif_carrier_off() above). linkwatch_event() also | ||
1553 | * wants the netlink semaphore. | ||
1554 | */ | ||
1555 | while (lp->work_pending) | ||
1556 | schedule(); | ||
1557 | smc911x_phy_powerdown(dev, lp->mii.phy_id); | ||
1558 | } | ||
1559 | |||
1560 | if (lp->pending_tx_skb) { | ||
1561 | dev_kfree_skb(lp->pending_tx_skb); | ||
1562 | lp->pending_tx_skb = NULL; | ||
1563 | } | ||
1564 | |||
1565 | return 0; | ||
1566 | } | ||
1567 | |||
1568 | /* | ||
1569 | * Get the current statistics. | ||
1570 | * This may be called with the card open or closed. | ||
1571 | */ | ||
1572 | static struct net_device_stats *smc911x_query_statistics(struct net_device *dev) | ||
1573 | { | ||
1574 | struct smc911x_local *lp = netdev_priv(dev); | ||
1575 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1576 | |||
1577 | |||
1578 | return &lp->stats; | ||
1579 | } | ||
1580 | |||
1581 | /* | ||
1582 | * Ethtool support | ||
1583 | */ | ||
1584 | static int | ||
1585 | smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) | ||
1586 | { | ||
1587 | struct smc911x_local *lp = netdev_priv(dev); | ||
1588 | unsigned long ioaddr = dev->base_addr; | ||
1589 | int ret, status; | ||
1590 | unsigned long flags; | ||
1591 | |||
1592 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1593 | cmd->maxtxpkt = 1; | ||
1594 | cmd->maxrxpkt = 1; | ||
1595 | |||
1596 | if (lp->phy_type != 0) { | ||
1597 | spin_lock_irqsave(&lp->lock, flags); | ||
1598 | ret = mii_ethtool_gset(&lp->mii, cmd); | ||
1599 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1600 | } else { | ||
1601 | cmd->supported = SUPPORTED_10baseT_Half | | ||
1602 | SUPPORTED_10baseT_Full | | ||
1603 | SUPPORTED_TP | SUPPORTED_AUI; | ||
1604 | |||
1605 | if (lp->ctl_rspeed == 10) | ||
1606 | cmd->speed = SPEED_10; | ||
1607 | else if (lp->ctl_rspeed == 100) | ||
1608 | cmd->speed = SPEED_100; | ||
1609 | |||
1610 | cmd->autoneg = AUTONEG_DISABLE; | ||
1611 | if (lp->mii.phy_id==1) | ||
1612 | cmd->transceiver = XCVR_INTERNAL; | ||
1613 | else | ||
1614 | cmd->transceiver = XCVR_EXTERNAL; | ||
1615 | cmd->port = 0; | ||
1616 | SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status); | ||
1617 | cmd->duplex = | ||
1618 | (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ? | ||
1619 | DUPLEX_FULL : DUPLEX_HALF; | ||
1620 | ret = 0; | ||
1621 | } | ||
1622 | |||
1623 | return ret; | ||
1624 | } | ||
1625 | |||
1626 | static int | ||
1627 | smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd) | ||
1628 | { | ||
1629 | struct smc911x_local *lp = netdev_priv(dev); | ||
1630 | int ret; | ||
1631 | unsigned long flags; | ||
1632 | |||
1633 | if (lp->phy_type != 0) { | ||
1634 | spin_lock_irqsave(&lp->lock, flags); | ||
1635 | ret = mii_ethtool_sset(&lp->mii, cmd); | ||
1636 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1637 | } else { | ||
1638 | if (cmd->autoneg != AUTONEG_DISABLE || | ||
1639 | cmd->speed != SPEED_10 || | ||
1640 | (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) || | ||
1641 | (cmd->port != PORT_TP && cmd->port != PORT_AUI)) | ||
1642 | return -EINVAL; | ||
1643 | |||
1644 | lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL; | ||
1645 | |||
1646 | ret = 0; | ||
1647 | } | ||
1648 | |||
1649 | return ret; | ||
1650 | } | ||
1651 | |||
1652 | static void | ||
1653 | smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | ||
1654 | { | ||
1655 | strncpy(info->driver, CARDNAME, sizeof(info->driver)); | ||
1656 | strncpy(info->version, version, sizeof(info->version)); | ||
1657 | strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info)); | ||
1658 | } | ||
1659 | |||
1660 | static int smc911x_ethtool_nwayreset(struct net_device *dev) | ||
1661 | { | ||
1662 | struct smc911x_local *lp = netdev_priv(dev); | ||
1663 | int ret = -EINVAL; | ||
1664 | unsigned long flags; | ||
1665 | |||
1666 | if (lp->phy_type != 0) { | ||
1667 | spin_lock_irqsave(&lp->lock, flags); | ||
1668 | ret = mii_nway_restart(&lp->mii); | ||
1669 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1670 | } | ||
1671 | |||
1672 | return ret; | ||
1673 | } | ||
1674 | |||
1675 | static u32 smc911x_ethtool_getmsglevel(struct net_device *dev) | ||
1676 | { | ||
1677 | struct smc911x_local *lp = netdev_priv(dev); | ||
1678 | return lp->msg_enable; | ||
1679 | } | ||
1680 | |||
1681 | static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) | ||
1682 | { | ||
1683 | struct smc911x_local *lp = netdev_priv(dev); | ||
1684 | lp->msg_enable = level; | ||
1685 | } | ||
1686 | |||
1687 | static int smc911x_ethtool_getregslen(struct net_device *dev) | ||
1688 | { | ||
1689 | /* System regs + MAC regs + PHY regs */ | ||
1690 | return (((E2P_CMD - ID_REV)/4 + 1) + | ||
1691 | (WUCSR - MAC_CR)+1 + 32) * sizeof(u32); | ||
1692 | } | ||
1693 | |||
1694 | static void smc911x_ethtool_getregs(struct net_device *dev, | ||
1695 | struct ethtool_regs* regs, void *buf) | ||
1696 | { | ||
1697 | unsigned long ioaddr = dev->base_addr; | ||
1698 | struct smc911x_local *lp = netdev_priv(dev); | ||
1699 | unsigned long flags; | ||
1700 | u32 reg,i,j=0; | ||
1701 | u32 *data = (u32*)buf; | ||
1702 | |||
1703 | regs->version = lp->version; | ||
1704 | for(i=ID_REV;i<=E2P_CMD;i+=4) { | ||
1705 | data[j++] = SMC_inl(ioaddr,i); | ||
1706 | } | ||
1707 | for(i=MAC_CR;i<=WUCSR;i++) { | ||
1708 | spin_lock_irqsave(&lp->lock, flags); | ||
1709 | SMC_GET_MAC_CSR(i, reg); | ||
1710 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1711 | data[j++] = reg; | ||
1712 | } | ||
1713 | for(i=0;i<=31;i++) { | ||
1714 | spin_lock_irqsave(&lp->lock, flags); | ||
1715 | SMC_GET_MII(i, lp->mii.phy_id, reg); | ||
1716 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1717 | data[j++] = reg & 0xFFFF; | ||
1718 | } | ||
1719 | } | ||
1720 | |||
1721 | static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev) | ||
1722 | { | ||
1723 | unsigned long ioaddr = dev->base_addr; | ||
1724 | unsigned int timeout; | ||
1725 | int e2p_cmd; | ||
1726 | |||
1727 | e2p_cmd = SMC_GET_E2P_CMD(); | ||
1728 | for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) { | ||
1729 | if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) { | ||
1730 | PRINTK("%s: %s timeout waiting for EEPROM to respond\n", | ||
1731 | dev->name, __FUNCTION__); | ||
1732 | return -EFAULT; | ||
1733 | } | ||
1734 | mdelay(1); | ||
1735 | e2p_cmd = SMC_GET_E2P_CMD(); | ||
1736 | } | ||
1737 | if (timeout == 0) { | ||
1738 | PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n", | ||
1739 | dev->name, __FUNCTION__); | ||
1740 | return -ETIMEDOUT; | ||
1741 | } | ||
1742 | return 0; | ||
1743 | } | ||
1744 | |||
1745 | static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev, | ||
1746 | int cmd, int addr) | ||
1747 | { | ||
1748 | unsigned long ioaddr = dev->base_addr; | ||
1749 | int ret; | ||
1750 | |||
1751 | if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) | ||
1752 | return ret; | ||
1753 | SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ | | ||
1754 | ((cmd) & (0x7<<28)) | | ||
1755 | ((addr) & 0xFF)); | ||
1756 | return 0; | ||
1757 | } | ||
1758 | |||
1759 | static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev, | ||
1760 | u8 *data) | ||
1761 | { | ||
1762 | unsigned long ioaddr = dev->base_addr; | ||
1763 | int ret; | ||
1764 | |||
1765 | if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) | ||
1766 | return ret; | ||
1767 | *data = SMC_GET_E2P_DATA(); | ||
1768 | return 0; | ||
1769 | } | ||
1770 | |||
1771 | static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev, | ||
1772 | u8 data) | ||
1773 | { | ||
1774 | unsigned long ioaddr = dev->base_addr; | ||
1775 | int ret; | ||
1776 | |||
1777 | if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) | ||
1778 | return ret; | ||
1779 | SMC_SET_E2P_DATA(data); | ||
1780 | return 0; | ||
1781 | } | ||
1782 | |||
1783 | static int smc911x_ethtool_geteeprom(struct net_device *dev, | ||
1784 | struct ethtool_eeprom *eeprom, u8 *data) | ||
1785 | { | ||
1786 | u8 eebuf[SMC911X_EEPROM_LEN]; | ||
1787 | int i, ret; | ||
1788 | |||
1789 | for(i=0;i<SMC911X_EEPROM_LEN;i++) { | ||
1790 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0) | ||
1791 | return ret; | ||
1792 | if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0) | ||
1793 | return ret; | ||
1794 | } | ||
1795 | memcpy(data, eebuf+eeprom->offset, eeprom->len); | ||
1796 | return 0; | ||
1797 | } | ||
1798 | |||
1799 | static int smc911x_ethtool_seteeprom(struct net_device *dev, | ||
1800 | struct ethtool_eeprom *eeprom, u8 *data) | ||
1801 | { | ||
1802 | int i, ret; | ||
1803 | |||
1804 | /* Enable erase */ | ||
1805 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0) | ||
1806 | return ret; | ||
1807 | for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) { | ||
1808 | /* erase byte */ | ||
1809 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0) | ||
1810 | return ret; | ||
1811 | /* write byte */ | ||
1812 | if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0) | ||
1813 | return ret; | ||
1814 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0) | ||
1815 | return ret; | ||
1816 | } | ||
1817 | return 0; | ||
1818 | } | ||
1819 | |||
1820 | static int smc911x_ethtool_geteeprom_len(struct net_device *dev) | ||
1821 | { | ||
1822 | return SMC911X_EEPROM_LEN; | ||
1823 | } | ||
1824 | |||
1825 | static struct ethtool_ops smc911x_ethtool_ops = { | ||
1826 | .get_settings = smc911x_ethtool_getsettings, | ||
1827 | .set_settings = smc911x_ethtool_setsettings, | ||
1828 | .get_drvinfo = smc911x_ethtool_getdrvinfo, | ||
1829 | .get_msglevel = smc911x_ethtool_getmsglevel, | ||
1830 | .set_msglevel = smc911x_ethtool_setmsglevel, | ||
1831 | .nway_reset = smc911x_ethtool_nwayreset, | ||
1832 | .get_link = ethtool_op_get_link, | ||
1833 | .get_regs_len = smc911x_ethtool_getregslen, | ||
1834 | .get_regs = smc911x_ethtool_getregs, | ||
1835 | .get_eeprom_len = smc911x_ethtool_geteeprom_len, | ||
1836 | .get_eeprom = smc911x_ethtool_geteeprom, | ||
1837 | .set_eeprom = smc911x_ethtool_seteeprom, | ||
1838 | }; | ||
1839 | |||
1840 | /* | ||
1841 | * smc911x_findirq | ||
1842 | * | ||
1843 | * This routine has a simple purpose -- make the SMC chip generate an | ||
1844 | * interrupt, so an auto-detect routine can detect it, and find the IRQ, | ||
1845 | */ | ||
1846 | static int __init smc911x_findirq(unsigned long ioaddr) | ||
1847 | { | ||
1848 | int timeout = 20; | ||
1849 | unsigned long cookie; | ||
1850 | |||
1851 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); | ||
1852 | |||
1853 | cookie = probe_irq_on(); | ||
1854 | |||
1855 | /* | ||
1856 | * Force a SW interrupt | ||
1857 | */ | ||
1858 | |||
1859 | SMC_SET_INT_EN(INT_EN_SW_INT_EN_); | ||
1860 | |||
1861 | /* | ||
1862 | * Wait until positive that the interrupt has been generated | ||
1863 | */ | ||
1864 | do { | ||
1865 | int int_status; | ||
1866 | udelay(10); | ||
1867 | int_status = SMC_GET_INT_EN(); | ||
1868 | if (int_status & INT_EN_SW_INT_EN_) | ||
1869 | break; /* got the interrupt */ | ||
1870 | } while (--timeout); | ||
1871 | |||
1872 | /* | ||
1873 | * there is really nothing that I can do here if timeout fails, | ||
1874 | * as autoirq_report will return a 0 anyway, which is what I | ||
1875 | * want in this case. Plus, the clean up is needed in both | ||
1876 | * cases. | ||
1877 | */ | ||
1878 | |||
1879 | /* and disable all interrupts again */ | ||
1880 | SMC_SET_INT_EN(0); | ||
1881 | |||
1882 | /* and return what I found */ | ||
1883 | return probe_irq_off(cookie); | ||
1884 | } | ||
1885 | |||
1886 | /* | ||
1887 | * Function: smc911x_probe(unsigned long ioaddr) | ||
1888 | * | ||
1889 | * Purpose: | ||
1890 | * Tests to see if a given ioaddr points to an SMC911x chip. | ||
1891 | * Returns a 0 on success | ||
1892 | * | ||
1893 | * Algorithm: | ||
1894 | * (1) see if the endian word is OK | ||
1895 | * (1) see if I recognize the chip ID in the appropriate register | ||
1896 | * | ||
1897 | * Here I do typical initialization tasks. | ||
1898 | * | ||
1899 | * o Initialize the structure if needed | ||
1900 | * o print out my vanity message if not done so already | ||
1901 | * o print out what type of hardware is detected | ||
1902 | * o print out the ethernet address | ||
1903 | * o find the IRQ | ||
1904 | * o set up my private data | ||
1905 | * o configure the dev structure with my subroutines | ||
1906 | * o actually GRAB the irq. | ||
1907 | * o GRAB the region | ||
1908 | */ | ||
1909 | static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr) | ||
1910 | { | ||
1911 | struct smc911x_local *lp = netdev_priv(dev); | ||
1912 | int i, retval; | ||
1913 | unsigned int val, chip_id, revision; | ||
1914 | const char *version_string; | ||
1915 | |||
1916 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | ||
1917 | |||
1918 | /* First, see if the endian word is recognized */ | ||
1919 | val = SMC_GET_BYTE_TEST(); | ||
1920 | DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val); | ||
1921 | if (val != 0x87654321) { | ||
1922 | printk(KERN_ERR "Invalid chip endian 0x08%x\n",val); | ||
1923 | retval = -ENODEV; | ||
1924 | goto err_out; | ||
1925 | } | ||
1926 | |||
1927 | /* | ||
1928 | * check if the revision register is something that I | ||
1929 | * recognize. These might need to be added to later, | ||
1930 | * as future revisions could be added. | ||
1931 | */ | ||
1932 | chip_id = SMC_GET_PN(); | ||
1933 | DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id); | ||
1934 | for(i=0;chip_ids[i].id != 0; i++) { | ||
1935 | if (chip_ids[i].id == chip_id) break; | ||
1936 | } | ||
1937 | if (!chip_ids[i].id) { | ||
1938 | printk(KERN_ERR "Unknown chip ID %04x\n", chip_id); | ||
1939 | retval = -ENODEV; | ||
1940 | goto err_out; | ||
1941 | } | ||
1942 | version_string = chip_ids[i].name; | ||
1943 | |||
1944 | revision = SMC_GET_REV(); | ||
1945 | DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision); | ||
1946 | |||
1947 | /* At this point I'll assume that the chip is an SMC911x. */ | ||
1948 | DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name); | ||
1949 | |||
1950 | /* Validate the TX FIFO size requested */ | ||
1951 | if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) { | ||
1952 | printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb); | ||
1953 | retval = -EINVAL; | ||
1954 | goto err_out; | ||
1955 | } | ||
1956 | |||
1957 | /* fill in some of the fields */ | ||
1958 | dev->base_addr = ioaddr; | ||
1959 | lp->version = chip_ids[i].id; | ||
1960 | lp->revision = revision; | ||
1961 | lp->tx_fifo_kb = tx_fifo_kb; | ||
1962 | /* Reverse calculate the RX FIFO size from the TX */ | ||
1963 | lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512; | ||
1964 | lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15; | ||
1965 | |||
1966 | /* Set the automatic flow control values */ | ||
1967 | switch(lp->tx_fifo_kb) { | ||
1968 | /* | ||
1969 | * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64 | ||
1970 | * AFC_LO is AFC_HI/2 | ||
1971 | * BACK_DUR is about 5uS*(AFC_LO) rounded down | ||
1972 | */ | ||
1973 | case 2:/* 13440 Rx Data Fifo Size */ | ||
1974 | lp->afc_cfg=0x008C46AF;break; | ||
1975 | case 3:/* 12480 Rx Data Fifo Size */ | ||
1976 | lp->afc_cfg=0x0082419F;break; | ||
1977 | case 4:/* 11520 Rx Data Fifo Size */ | ||
1978 | lp->afc_cfg=0x00783C9F;break; | ||
1979 | case 5:/* 10560 Rx Data Fifo Size */ | ||
1980 | lp->afc_cfg=0x006E374F;break; | ||
1981 | case 6:/* 9600 Rx Data Fifo Size */ | ||
1982 | lp->afc_cfg=0x0064328F;break; | ||
1983 | case 7:/* 8640 Rx Data Fifo Size */ | ||
1984 | lp->afc_cfg=0x005A2D7F;break; | ||
1985 | case 8:/* 7680 Rx Data Fifo Size */ | ||
1986 | lp->afc_cfg=0x0050287F;break; | ||
1987 | case 9:/* 6720 Rx Data Fifo Size */ | ||
1988 | lp->afc_cfg=0x0046236F;break; | ||
1989 | case 10:/* 5760 Rx Data Fifo Size */ | ||
1990 | lp->afc_cfg=0x003C1E6F;break; | ||
1991 | case 11:/* 4800 Rx Data Fifo Size */ | ||
1992 | lp->afc_cfg=0x0032195F;break; | ||
1993 | /* | ||
1994 | * AFC_HI is ~1520 bytes less than RX Data Fifo Size | ||
1995 | * AFC_LO is AFC_HI/2 | ||
1996 | * BACK_DUR is about 5uS*(AFC_LO) rounded down | ||
1997 | */ | ||
1998 | case 12:/* 3840 Rx Data Fifo Size */ | ||
1999 | lp->afc_cfg=0x0024124F;break; | ||
2000 | case 13:/* 2880 Rx Data Fifo Size */ | ||
2001 | lp->afc_cfg=0x0015073F;break; | ||
2002 | case 14:/* 1920 Rx Data Fifo Size */ | ||
2003 | lp->afc_cfg=0x0006032F;break; | ||
2004 | default: | ||
2005 | PRINTK("%s: ERROR -- no AFC_CFG setting found", | ||
2006 | dev->name); | ||
2007 | break; | ||
2008 | } | ||
2009 | |||
2010 | DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, | ||
2011 | "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME, | ||
2012 | lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg); | ||
2013 | |||
2014 | spin_lock_init(&lp->lock); | ||
2015 | |||
2016 | /* Get the MAC address */ | ||
2017 | SMC_GET_MAC_ADDR(dev->dev_addr); | ||
2018 | |||
2019 | /* now, reset the chip, and put it into a known state */ | ||
2020 | smc911x_reset(dev); | ||
2021 | |||
2022 | /* | ||
2023 | * If dev->irq is 0, then the device has to be banged on to see | ||
2024 | * what the IRQ is. | ||
2025 | * | ||
2026 | * Specifying an IRQ is done with the assumption that the user knows | ||
2027 | * what (s)he is doing. No checking is done!!!! | ||
2028 | */ | ||
2029 | if (dev->irq < 1) { | ||
2030 | int trials; | ||
2031 | |||
2032 | trials = 3; | ||
2033 | while (trials--) { | ||
2034 | dev->irq = smc911x_findirq(ioaddr); | ||
2035 | if (dev->irq) | ||
2036 | break; | ||
2037 | /* kick the card and try again */ | ||
2038 | smc911x_reset(dev); | ||
2039 | } | ||
2040 | } | ||
2041 | if (dev->irq == 0) { | ||
2042 | printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n", | ||
2043 | dev->name); | ||
2044 | retval = -ENODEV; | ||
2045 | goto err_out; | ||
2046 | } | ||
2047 | dev->irq = irq_canonicalize(dev->irq); | ||
2048 | |||
2049 | /* Fill in the fields of the device structure with ethernet values. */ | ||
2050 | ether_setup(dev); | ||
2051 | |||
2052 | dev->open = smc911x_open; | ||
2053 | dev->stop = smc911x_close; | ||
2054 | dev->hard_start_xmit = smc911x_hard_start_xmit; | ||
2055 | dev->tx_timeout = smc911x_timeout; | ||
2056 | dev->watchdog_timeo = msecs_to_jiffies(watchdog); | ||
2057 | dev->get_stats = smc911x_query_statistics; | ||
2058 | dev->set_multicast_list = smc911x_set_multicast_list; | ||
2059 | dev->ethtool_ops = &smc911x_ethtool_ops; | ||
2060 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
2061 | dev->poll_controller = smc911x_poll_controller; | ||
2062 | #endif | ||
2063 | |||
2064 | INIT_WORK(&lp->phy_configure, smc911x_phy_configure, dev); | ||
2065 | lp->mii.phy_id_mask = 0x1f; | ||
2066 | lp->mii.reg_num_mask = 0x1f; | ||
2067 | lp->mii.force_media = 0; | ||
2068 | lp->mii.full_duplex = 0; | ||
2069 | lp->mii.dev = dev; | ||
2070 | lp->mii.mdio_read = smc911x_phy_read; | ||
2071 | lp->mii.mdio_write = smc911x_phy_write; | ||
2072 | |||
2073 | /* | ||
2074 | * Locate the phy, if any. | ||
2075 | */ | ||
2076 | smc911x_phy_detect(dev); | ||
2077 | |||
2078 | /* Set default parameters */ | ||
2079 | lp->msg_enable = NETIF_MSG_LINK; | ||
2080 | lp->ctl_rfduplx = 1; | ||
2081 | lp->ctl_rspeed = 100; | ||
2082 | |||
2083 | /* Grab the IRQ */ | ||
2084 | retval = request_irq(dev->irq, &smc911x_interrupt, SA_SHIRQ, dev->name, dev); | ||
2085 | if (retval) | ||
2086 | goto err_out; | ||
2087 | |||
2088 | set_irq_type(dev->irq, IRQT_FALLING); | ||
2089 | |||
2090 | #ifdef SMC_USE_DMA | ||
2091 | lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq); | ||
2092 | lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq); | ||
2093 | lp->rxdma_active = 0; | ||
2094 | lp->txdma_active = 0; | ||
2095 | dev->dma = lp->rxdma; | ||
2096 | #endif | ||
2097 | |||
2098 | retval = register_netdev(dev); | ||
2099 | if (retval == 0) { | ||
2100 | /* now, print out the card info, in a short format.. */ | ||
2101 | printk("%s: %s (rev %d) at %#lx IRQ %d", | ||
2102 | dev->name, version_string, lp->revision, | ||
2103 | dev->base_addr, dev->irq); | ||
2104 | |||
2105 | #ifdef SMC_USE_DMA | ||
2106 | if (lp->rxdma != -1) | ||
2107 | printk(" RXDMA %d ", lp->rxdma); | ||
2108 | |||
2109 | if (lp->txdma != -1) | ||
2110 | printk("TXDMA %d", lp->txdma); | ||
2111 | #endif | ||
2112 | printk("\n"); | ||
2113 | if (!is_valid_ether_addr(dev->dev_addr)) { | ||
2114 | printk("%s: Invalid ethernet MAC address. Please " | ||
2115 | "set using ifconfig\n", dev->name); | ||
2116 | } else { | ||
2117 | /* Print the Ethernet address */ | ||
2118 | printk("%s: Ethernet addr: ", dev->name); | ||
2119 | for (i = 0; i < 5; i++) | ||
2120 | printk("%2.2x:", dev->dev_addr[i]); | ||
2121 | printk("%2.2x\n", dev->dev_addr[5]); | ||
2122 | } | ||
2123 | |||
2124 | if (lp->phy_type == 0) { | ||
2125 | PRINTK("%s: No PHY found\n", dev->name); | ||
2126 | } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) { | ||
2127 | PRINTK("%s: LAN911x Internal PHY\n", dev->name); | ||
2128 | } else { | ||
2129 | PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type); | ||
2130 | } | ||
2131 | } | ||
2132 | |||
2133 | err_out: | ||
2134 | #ifdef SMC_USE_DMA | ||
2135 | if (retval) { | ||
2136 | if (lp->rxdma != -1) { | ||
2137 | SMC_DMA_FREE(dev, lp->rxdma); | ||
2138 | } | ||
2139 | if (lp->txdma != -1) { | ||
2140 | SMC_DMA_FREE(dev, lp->txdma); | ||
2141 | } | ||
2142 | } | ||
2143 | #endif | ||
2144 | return retval; | ||
2145 | } | ||
2146 | |||
2147 | /* | ||
2148 | * smc911x_init(void) | ||
2149 | * | ||
2150 | * Output: | ||
2151 | * 0 --> there is a device | ||
2152 | * anything else, error | ||
2153 | */ | ||
2154 | static int smc911x_drv_probe(struct platform_device *pdev) | ||
2155 | { | ||
2156 | struct net_device *ndev; | ||
2157 | struct resource *res; | ||
2158 | unsigned int *addr; | ||
2159 | int ret; | ||
2160 | |||
2161 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); | ||
2162 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
2163 | if (!res) { | ||
2164 | ret = -ENODEV; | ||
2165 | goto out; | ||
2166 | } | ||
2167 | |||
2168 | /* | ||
2169 | * Request the regions. | ||
2170 | */ | ||
2171 | if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) { | ||
2172 | ret = -EBUSY; | ||
2173 | goto out; | ||
2174 | } | ||
2175 | |||
2176 | ndev = alloc_etherdev(sizeof(struct smc911x_local)); | ||
2177 | if (!ndev) { | ||
2178 | printk("%s: could not allocate device.\n", CARDNAME); | ||
2179 | ret = -ENOMEM; | ||
2180 | goto release_1; | ||
2181 | } | ||
2182 | SET_MODULE_OWNER(ndev); | ||
2183 | SET_NETDEV_DEV(ndev, &pdev->dev); | ||
2184 | |||
2185 | ndev->dma = (unsigned char)-1; | ||
2186 | ndev->irq = platform_get_irq(pdev, 0); | ||
2187 | |||
2188 | addr = ioremap(res->start, SMC911X_IO_EXTENT); | ||
2189 | if (!addr) { | ||
2190 | ret = -ENOMEM; | ||
2191 | goto release_both; | ||
2192 | } | ||
2193 | |||
2194 | platform_set_drvdata(pdev, ndev); | ||
2195 | ret = smc911x_probe(ndev, (unsigned long)addr); | ||
2196 | if (ret != 0) { | ||
2197 | platform_set_drvdata(pdev, NULL); | ||
2198 | iounmap(addr); | ||
2199 | release_both: | ||
2200 | free_netdev(ndev); | ||
2201 | release_1: | ||
2202 | release_mem_region(res->start, SMC911X_IO_EXTENT); | ||
2203 | out: | ||
2204 | printk("%s: not found (%d).\n", CARDNAME, ret); | ||
2205 | } | ||
2206 | #ifdef SMC_USE_DMA | ||
2207 | else { | ||
2208 | struct smc911x_local *lp = netdev_priv(ndev); | ||
2209 | lp->physaddr = res->start; | ||
2210 | lp->dev = &pdev->dev; | ||
2211 | } | ||
2212 | #endif | ||
2213 | |||
2214 | return ret; | ||
2215 | } | ||
2216 | |||
2217 | static int smc911x_drv_remove(struct platform_device *pdev) | ||
2218 | { | ||
2219 | struct net_device *ndev = platform_get_drvdata(pdev); | ||
2220 | struct resource *res; | ||
2221 | |||
2222 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); | ||
2223 | platform_set_drvdata(pdev, NULL); | ||
2224 | |||
2225 | unregister_netdev(ndev); | ||
2226 | |||
2227 | free_irq(ndev->irq, ndev); | ||
2228 | |||
2229 | #ifdef SMC_USE_DMA | ||
2230 | { | ||
2231 | struct smc911x_local *lp = netdev_priv(ndev); | ||
2232 | if (lp->rxdma != -1) { | ||
2233 | SMC_DMA_FREE(dev, lp->rxdma); | ||
2234 | } | ||
2235 | if (lp->txdma != -1) { | ||
2236 | SMC_DMA_FREE(dev, lp->txdma); | ||
2237 | } | ||
2238 | } | ||
2239 | #endif | ||
2240 | iounmap((void *)ndev->base_addr); | ||
2241 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
2242 | release_mem_region(res->start, SMC911X_IO_EXTENT); | ||
2243 | |||
2244 | free_netdev(ndev); | ||
2245 | return 0; | ||
2246 | } | ||
2247 | |||
2248 | static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state) | ||
2249 | { | ||
2250 | struct net_device *ndev = platform_get_drvdata(dev); | ||
2251 | unsigned long ioaddr = ndev->base_addr; | ||
2252 | |||
2253 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); | ||
2254 | if (ndev) { | ||
2255 | if (netif_running(ndev)) { | ||
2256 | netif_device_detach(ndev); | ||
2257 | smc911x_shutdown(ndev); | ||
2258 | #if POWER_DOWN | ||
2259 | /* Set D2 - Energy detect only setting */ | ||
2260 | SMC_SET_PMT_CTRL(2<<12); | ||
2261 | #endif | ||
2262 | } | ||
2263 | } | ||
2264 | return 0; | ||
2265 | } | ||
2266 | |||
2267 | static int smc911x_drv_resume(struct platform_device *dev) | ||
2268 | { | ||
2269 | struct net_device *ndev = platform_get_drvdata(dev); | ||
2270 | |||
2271 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); | ||
2272 | if (ndev) { | ||
2273 | struct smc911x_local *lp = netdev_priv(ndev); | ||
2274 | |||
2275 | if (netif_running(ndev)) { | ||
2276 | smc911x_reset(ndev); | ||
2277 | smc911x_enable(ndev); | ||
2278 | if (lp->phy_type != 0) | ||
2279 | smc911x_phy_configure(ndev); | ||
2280 | netif_device_attach(ndev); | ||
2281 | } | ||
2282 | } | ||
2283 | return 0; | ||
2284 | } | ||
2285 | |||
2286 | static struct platform_driver smc911x_driver = { | ||
2287 | .probe = smc911x_drv_probe, | ||
2288 | .remove = smc911x_drv_remove, | ||
2289 | .suspend = smc911x_drv_suspend, | ||
2290 | .resume = smc911x_drv_resume, | ||
2291 | .driver = { | ||
2292 | .name = CARDNAME, | ||
2293 | }, | ||
2294 | }; | ||
2295 | |||
2296 | static int __init smc911x_init(void) | ||
2297 | { | ||
2298 | return platform_driver_register(&smc911x_driver); | ||
2299 | } | ||
2300 | |||
2301 | static void __exit smc911x_cleanup(void) | ||
2302 | { | ||
2303 | platform_driver_unregister(&smc911x_driver); | ||
2304 | } | ||
2305 | |||
2306 | module_init(smc911x_init); | ||
2307 | module_exit(smc911x_cleanup); | ||
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h new file mode 100644 index 000000000000..962a710459fc --- /dev/null +++ b/drivers/net/smc911x.h | |||
@@ -0,0 +1,835 @@ | |||
1 | /*------------------------------------------------------------------------ | ||
2 | . smc911x.h - macros for SMSC's LAN911{5,6,7,8} single-chip Ethernet device. | ||
3 | . | ||
4 | . Copyright (C) 2005 Sensoria Corp. | ||
5 | . Derived from the unified SMC91x driver by Nicolas Pitre | ||
6 | . | ||
7 | . This program is free software; you can redistribute it and/or modify | ||
8 | . it under the terms of the GNU General Public License as published by | ||
9 | . the Free Software Foundation; either version 2 of the License, or | ||
10 | . (at your option) any later version. | ||
11 | . | ||
12 | . This program is distributed in the hope that it will be useful, | ||
13 | . but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | . MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | . GNU General Public License for more details. | ||
16 | . | ||
17 | . You should have received a copy of the GNU General Public License | ||
18 | . along with this program; if not, write to the Free Software | ||
19 | . Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | . | ||
21 | . Information contained in this file was obtained from the LAN9118 | ||
22 | . manual from SMC. To get a copy, if you really want one, you can find | ||
23 | . information under www.smsc.com. | ||
24 | . | ||
25 | . Authors | ||
26 | . Dustin McIntire <dustin@sensoria.com> | ||
27 | . | ||
28 | ---------------------------------------------------------------------------*/ | ||
29 | #ifndef _SMC911X_H_ | ||
30 | #define _SMC911X_H_ | ||
31 | |||
32 | /* | ||
33 | * Use the DMA feature on PXA chips | ||
34 | */ | ||
35 | #ifdef CONFIG_ARCH_PXA | ||
36 | #define SMC_USE_PXA_DMA 1 | ||
37 | #define SMC_USE_16BIT 0 | ||
38 | #define SMC_USE_32BIT 1 | ||
39 | #endif | ||
40 | |||
41 | |||
42 | /* | ||
43 | * Define the bus width specific IO macros | ||
44 | */ | ||
45 | |||
46 | #if SMC_USE_16BIT | ||
47 | #define SMC_inb(a, r) readb((a) + (r)) | ||
48 | #define SMC_inw(a, r) readw((a) + (r)) | ||
49 | #define SMC_inl(a, r) ((SMC_inw(a, r) & 0xFFFF)+(SMC_inw(a+2, r)<<16)) | ||
50 | #define SMC_outb(v, a, r) writeb(v, (a) + (r)) | ||
51 | #define SMC_outw(v, a, r) writew(v, (a) + (r)) | ||
52 | #define SMC_outl(v, a, r) \ | ||
53 | do{ \ | ||
54 | writel(v & 0xFFFF, (a) + (r)); \ | ||
55 | writel(v >> 16, (a) + (r) + 2); \ | ||
56 | } while (0) | ||
57 | #define SMC_insl(a, r, p, l) readsw((short*)((a) + (r)), p, l*2) | ||
58 | #define SMC_outsl(a, r, p, l) writesw((short*)((a) + (r)), p, l*2) | ||
59 | |||
60 | #elif SMC_USE_32BIT | ||
61 | #define SMC_inb(a, r) readb((a) + (r)) | ||
62 | #define SMC_inw(a, r) readw((a) + (r)) | ||
63 | #define SMC_inl(a, r) readl((a) + (r)) | ||
64 | #define SMC_outb(v, a, r) writeb(v, (a) + (r)) | ||
65 | #define SMC_outl(v, a, r) writel(v, (a) + (r)) | ||
66 | #define SMC_insl(a, r, p, l) readsl((int*)((a) + (r)), p, l) | ||
67 | #define SMC_outsl(a, r, p, l) writesl((int*)((a) + (r)), p, l) | ||
68 | |||
69 | #endif /* SMC_USE_16BIT */ | ||
70 | |||
71 | |||
72 | |||
73 | #if SMC_USE_PXA_DMA | ||
74 | #define SMC_USE_DMA | ||
75 | |||
76 | /* | ||
77 | * Define the request and free functions | ||
78 | * These are unfortunately architecture specific as no generic allocation | ||
79 | * mechanism exits | ||
80 | */ | ||
81 | #define SMC_DMA_REQUEST(dev, handler) \ | ||
82 | pxa_request_dma(dev->name, DMA_PRIO_LOW, handler, dev) | ||
83 | |||
84 | #define SMC_DMA_FREE(dev, dma) \ | ||
85 | pxa_free_dma(dma) | ||
86 | |||
87 | #define SMC_DMA_ACK_IRQ(dev, dma) \ | ||
88 | { \ | ||
89 | if (DCSR(dma) & DCSR_BUSERR) { \ | ||
90 | printk("%s: DMA %d bus error!\n", dev->name, dma); \ | ||
91 | } \ | ||
92 | DCSR(dma) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR; \ | ||
93 | } | ||
94 | |||
95 | /* | ||
96 | * Use a DMA for RX and TX packets. | ||
97 | */ | ||
98 | #include <linux/dma-mapping.h> | ||
99 | #include <asm/dma.h> | ||
100 | #include <asm/arch/pxa-regs.h> | ||
101 | |||
102 | static dma_addr_t rx_dmabuf, tx_dmabuf; | ||
103 | static int rx_dmalen, tx_dmalen; | ||
104 | |||
105 | #ifdef SMC_insl | ||
106 | #undef SMC_insl | ||
107 | #define SMC_insl(a, r, p, l) \ | ||
108 | smc_pxa_dma_insl(lp->dev, a, lp->physaddr, r, lp->rxdma, p, l) | ||
109 | |||
110 | static inline void | ||
111 | smc_pxa_dma_insl(struct device *dev, u_long ioaddr, u_long physaddr, | ||
112 | int reg, int dma, u_char *buf, int len) | ||
113 | { | ||
114 | /* 64 bit alignment is required for memory to memory DMA */ | ||
115 | if ((long)buf & 4) { | ||
116 | *((u32 *)buf) = SMC_inl(ioaddr, reg); | ||
117 | buf += 4; | ||
118 | len--; | ||
119 | } | ||
120 | |||
121 | len *= 4; | ||
122 | rx_dmabuf = dma_map_single(dev, buf, len, DMA_FROM_DEVICE); | ||
123 | rx_dmalen = len; | ||
124 | DCSR(dma) = DCSR_NODESC; | ||
125 | DTADR(dma) = rx_dmabuf; | ||
126 | DSADR(dma) = physaddr + reg; | ||
127 | DCMD(dma) = (DCMD_INCTRGADDR | DCMD_BURST32 | | ||
128 | DCMD_WIDTH4 | DCMD_ENDIRQEN | (DCMD_LENGTH & rx_dmalen)); | ||
129 | DCSR(dma) = DCSR_NODESC | DCSR_RUN; | ||
130 | } | ||
131 | #endif | ||
132 | |||
133 | #ifdef SMC_insw | ||
134 | #undef SMC_insw | ||
135 | #define SMC_insw(a, r, p, l) \ | ||
136 | smc_pxa_dma_insw(lp->dev, a, lp->physaddr, r, lp->rxdma, p, l) | ||
137 | |||
138 | static inline void | ||
139 | smc_pxa_dma_insw(struct device *dev, u_long ioaddr, u_long physaddr, | ||
140 | int reg, int dma, u_char *buf, int len) | ||
141 | { | ||
142 | /* 64 bit alignment is required for memory to memory DMA */ | ||
143 | while ((long)buf & 6) { | ||
144 | *((u16 *)buf) = SMC_inw(ioaddr, reg); | ||
145 | buf += 2; | ||
146 | len--; | ||
147 | } | ||
148 | |||
149 | len *= 2; | ||
150 | rx_dmabuf = dma_map_single(dev, buf, len, DMA_FROM_DEVICE); | ||
151 | rx_dmalen = len; | ||
152 | DCSR(dma) = DCSR_NODESC; | ||
153 | DTADR(dma) = rx_dmabuf; | ||
154 | DSADR(dma) = physaddr + reg; | ||
155 | DCMD(dma) = (DCMD_INCTRGADDR | DCMD_BURST32 | | ||
156 | DCMD_WIDTH2 | DCMD_ENDIRQEN | (DCMD_LENGTH & rx_dmalen)); | ||
157 | DCSR(dma) = DCSR_NODESC | DCSR_RUN; | ||
158 | } | ||
159 | #endif | ||
160 | |||
161 | #ifdef SMC_outsl | ||
162 | #undef SMC_outsl | ||
163 | #define SMC_outsl(a, r, p, l) \ | ||
164 | smc_pxa_dma_outsl(lp->dev, a, lp->physaddr, r, lp->txdma, p, l) | ||
165 | |||
166 | static inline void | ||
167 | smc_pxa_dma_outsl(struct device *dev, u_long ioaddr, u_long physaddr, | ||
168 | int reg, int dma, u_char *buf, int len) | ||
169 | { | ||
170 | /* 64 bit alignment is required for memory to memory DMA */ | ||
171 | if ((long)buf & 4) { | ||
172 | SMC_outl(*((u32 *)buf), ioaddr, reg); | ||
173 | buf += 4; | ||
174 | len--; | ||
175 | } | ||
176 | |||
177 | len *= 4; | ||
178 | tx_dmabuf = dma_map_single(dev, buf, len, DMA_TO_DEVICE); | ||
179 | tx_dmalen = len; | ||
180 | DCSR(dma) = DCSR_NODESC; | ||
181 | DSADR(dma) = tx_dmabuf; | ||
182 | DTADR(dma) = physaddr + reg; | ||
183 | DCMD(dma) = (DCMD_INCSRCADDR | DCMD_BURST32 | | ||
184 | DCMD_WIDTH4 | DCMD_ENDIRQEN | (DCMD_LENGTH & tx_dmalen)); | ||
185 | DCSR(dma) = DCSR_NODESC | DCSR_RUN; | ||
186 | } | ||
187 | #endif | ||
188 | |||
189 | #ifdef SMC_outsw | ||
190 | #undef SMC_outsw | ||
191 | #define SMC_outsw(a, r, p, l) \ | ||
192 | smc_pxa_dma_outsw(lp->dev, a, lp->physaddr, r, lp->txdma, p, l) | ||
193 | |||
194 | static inline void | ||
195 | smc_pxa_dma_outsw(struct device *dev, u_long ioaddr, u_long physaddr, | ||
196 | int reg, int dma, u_char *buf, int len) | ||
197 | { | ||
198 | /* 64 bit alignment is required for memory to memory DMA */ | ||
199 | while ((long)buf & 6) { | ||
200 | SMC_outw(*((u16 *)buf), ioaddr, reg); | ||
201 | buf += 2; | ||
202 | len--; | ||
203 | } | ||
204 | |||
205 | len *= 2; | ||
206 | tx_dmabuf = dma_map_single(dev, buf, len, DMA_TO_DEVICE); | ||
207 | tx_dmalen = len; | ||
208 | DCSR(dma) = DCSR_NODESC; | ||
209 | DSADR(dma) = tx_dmabuf; | ||
210 | DTADR(dma) = physaddr + reg; | ||
211 | DCMD(dma) = (DCMD_INCSRCADDR | DCMD_BURST32 | | ||
212 | DCMD_WIDTH2 | DCMD_ENDIRQEN | (DCMD_LENGTH & tx_dmalen)); | ||
213 | DCSR(dma) = DCSR_NODESC | DCSR_RUN; | ||
214 | } | ||
215 | #endif | ||
216 | |||
217 | #endif /* SMC_USE_PXA_DMA */ | ||
218 | |||
219 | |||
220 | /* Chip Parameters and Register Definitions */ | ||
221 | |||
222 | #define SMC911X_TX_FIFO_LOW_THRESHOLD (1536*2) | ||
223 | |||
224 | #define SMC911X_IO_EXTENT 0x100 | ||
225 | |||
226 | #define SMC911X_EEPROM_LEN 7 | ||
227 | |||
228 | /* Below are the register offsets and bit definitions | ||
229 | * of the Lan911x memory space | ||
230 | */ | ||
231 | #define RX_DATA_FIFO (0x00) | ||
232 | |||
233 | #define TX_DATA_FIFO (0x20) | ||
234 | #define TX_CMD_A_INT_ON_COMP_ (0x80000000) | ||
235 | #define TX_CMD_A_INT_BUF_END_ALGN_ (0x03000000) | ||
236 | #define TX_CMD_A_INT_4_BYTE_ALGN_ (0x00000000) | ||
237 | #define TX_CMD_A_INT_16_BYTE_ALGN_ (0x01000000) | ||
238 | #define TX_CMD_A_INT_32_BYTE_ALGN_ (0x02000000) | ||
239 | #define TX_CMD_A_INT_DATA_OFFSET_ (0x001F0000) | ||
240 | #define TX_CMD_A_INT_FIRST_SEG_ (0x00002000) | ||
241 | #define TX_CMD_A_INT_LAST_SEG_ (0x00001000) | ||
242 | #define TX_CMD_A_BUF_SIZE_ (0x000007FF) | ||
243 | #define TX_CMD_B_PKT_TAG_ (0xFFFF0000) | ||
244 | #define TX_CMD_B_ADD_CRC_DISABLE_ (0x00002000) | ||
245 | #define TX_CMD_B_DISABLE_PADDING_ (0x00001000) | ||
246 | #define TX_CMD_B_PKT_BYTE_LENGTH_ (0x000007FF) | ||
247 | |||
248 | #define RX_STATUS_FIFO (0x40) | ||
249 | #define RX_STS_PKT_LEN_ (0x3FFF0000) | ||
250 | #define RX_STS_ES_ (0x00008000) | ||
251 | #define RX_STS_BCST_ (0x00002000) | ||
252 | #define RX_STS_LEN_ERR_ (0x00001000) | ||
253 | #define RX_STS_RUNT_ERR_ (0x00000800) | ||
254 | #define RX_STS_MCAST_ (0x00000400) | ||
255 | #define RX_STS_TOO_LONG_ (0x00000080) | ||
256 | #define RX_STS_COLL_ (0x00000040) | ||
257 | #define RX_STS_ETH_TYPE_ (0x00000020) | ||
258 | #define RX_STS_WDOG_TMT_ (0x00000010) | ||
259 | #define RX_STS_MII_ERR_ (0x00000008) | ||
260 | #define RX_STS_DRIBBLING_ (0x00000004) | ||
261 | #define RX_STS_CRC_ERR_ (0x00000002) | ||
262 | #define RX_STATUS_FIFO_PEEK (0x44) | ||
263 | #define TX_STATUS_FIFO (0x48) | ||
264 | #define TX_STS_TAG_ (0xFFFF0000) | ||
265 | #define TX_STS_ES_ (0x00008000) | ||
266 | #define TX_STS_LOC_ (0x00000800) | ||
267 | #define TX_STS_NO_CARR_ (0x00000400) | ||
268 | #define TX_STS_LATE_COLL_ (0x00000200) | ||
269 | #define TX_STS_MANY_COLL_ (0x00000100) | ||
270 | #define TX_STS_COLL_CNT_ (0x00000078) | ||
271 | #define TX_STS_MANY_DEFER_ (0x00000004) | ||
272 | #define TX_STS_UNDERRUN_ (0x00000002) | ||
273 | #define TX_STS_DEFERRED_ (0x00000001) | ||
274 | #define TX_STATUS_FIFO_PEEK (0x4C) | ||
275 | #define ID_REV (0x50) | ||
276 | #define ID_REV_CHIP_ID_ (0xFFFF0000) /* RO */ | ||
277 | #define ID_REV_REV_ID_ (0x0000FFFF) /* RO */ | ||
278 | |||
279 | #define INT_CFG (0x54) | ||
280 | #define INT_CFG_INT_DEAS_ (0xFF000000) /* R/W */ | ||
281 | #define INT_CFG_INT_DEAS_CLR_ (0x00004000) | ||
282 | #define INT_CFG_INT_DEAS_STS_ (0x00002000) | ||
283 | #define INT_CFG_IRQ_INT_ (0x00001000) /* RO */ | ||
284 | #define INT_CFG_IRQ_EN_ (0x00000100) /* R/W */ | ||
285 | #define INT_CFG_IRQ_POL_ (0x00000010) /* R/W Not Affected by SW Reset */ | ||
286 | #define INT_CFG_IRQ_TYPE_ (0x00000001) /* R/W Not Affected by SW Reset */ | ||
287 | |||
288 | #define INT_STS (0x58) | ||
289 | #define INT_STS_SW_INT_ (0x80000000) /* R/WC */ | ||
290 | #define INT_STS_TXSTOP_INT_ (0x02000000) /* R/WC */ | ||
291 | #define INT_STS_RXSTOP_INT_ (0x01000000) /* R/WC */ | ||
292 | #define INT_STS_RXDFH_INT_ (0x00800000) /* R/WC */ | ||
293 | #define INT_STS_RXDF_INT_ (0x00400000) /* R/WC */ | ||
294 | #define INT_STS_TX_IOC_ (0x00200000) /* R/WC */ | ||
295 | #define INT_STS_RXD_INT_ (0x00100000) /* R/WC */ | ||
296 | #define INT_STS_GPT_INT_ (0x00080000) /* R/WC */ | ||
297 | #define INT_STS_PHY_INT_ (0x00040000) /* RO */ | ||
298 | #define INT_STS_PME_INT_ (0x00020000) /* R/WC */ | ||
299 | #define INT_STS_TXSO_ (0x00010000) /* R/WC */ | ||
300 | #define INT_STS_RWT_ (0x00008000) /* R/WC */ | ||
301 | #define INT_STS_RXE_ (0x00004000) /* R/WC */ | ||
302 | #define INT_STS_TXE_ (0x00002000) /* R/WC */ | ||
303 | //#define INT_STS_ERX_ (0x00001000) /* R/WC */ | ||
304 | #define INT_STS_TDFU_ (0x00000800) /* R/WC */ | ||
305 | #define INT_STS_TDFO_ (0x00000400) /* R/WC */ | ||
306 | #define INT_STS_TDFA_ (0x00000200) /* R/WC */ | ||
307 | #define INT_STS_TSFF_ (0x00000100) /* R/WC */ | ||
308 | #define INT_STS_TSFL_ (0x00000080) /* R/WC */ | ||
309 | //#define INT_STS_RXDF_ (0x00000040) /* R/WC */ | ||
310 | #define INT_STS_RDFO_ (0x00000040) /* R/WC */ | ||
311 | #define INT_STS_RDFL_ (0x00000020) /* R/WC */ | ||
312 | #define INT_STS_RSFF_ (0x00000010) /* R/WC */ | ||
313 | #define INT_STS_RSFL_ (0x00000008) /* R/WC */ | ||
314 | #define INT_STS_GPIO2_INT_ (0x00000004) /* R/WC */ | ||
315 | #define INT_STS_GPIO1_INT_ (0x00000002) /* R/WC */ | ||
316 | #define INT_STS_GPIO0_INT_ (0x00000001) /* R/WC */ | ||
317 | |||
318 | #define INT_EN (0x5C) | ||
319 | #define INT_EN_SW_INT_EN_ (0x80000000) /* R/W */ | ||
320 | #define INT_EN_TXSTOP_INT_EN_ (0x02000000) /* R/W */ | ||
321 | #define INT_EN_RXSTOP_INT_EN_ (0x01000000) /* R/W */ | ||
322 | #define INT_EN_RXDFH_INT_EN_ (0x00800000) /* R/W */ | ||
323 | //#define INT_EN_RXDF_INT_EN_ (0x00400000) /* R/W */ | ||
324 | #define INT_EN_TIOC_INT_EN_ (0x00200000) /* R/W */ | ||
325 | #define INT_EN_RXD_INT_EN_ (0x00100000) /* R/W */ | ||
326 | #define INT_EN_GPT_INT_EN_ (0x00080000) /* R/W */ | ||
327 | #define INT_EN_PHY_INT_EN_ (0x00040000) /* R/W */ | ||
328 | #define INT_EN_PME_INT_EN_ (0x00020000) /* R/W */ | ||
329 | #define INT_EN_TXSO_EN_ (0x00010000) /* R/W */ | ||
330 | #define INT_EN_RWT_EN_ (0x00008000) /* R/W */ | ||
331 | #define INT_EN_RXE_EN_ (0x00004000) /* R/W */ | ||
332 | #define INT_EN_TXE_EN_ (0x00002000) /* R/W */ | ||
333 | //#define INT_EN_ERX_EN_ (0x00001000) /* R/W */ | ||
334 | #define INT_EN_TDFU_EN_ (0x00000800) /* R/W */ | ||
335 | #define INT_EN_TDFO_EN_ (0x00000400) /* R/W */ | ||
336 | #define INT_EN_TDFA_EN_ (0x00000200) /* R/W */ | ||
337 | #define INT_EN_TSFF_EN_ (0x00000100) /* R/W */ | ||
338 | #define INT_EN_TSFL_EN_ (0x00000080) /* R/W */ | ||
339 | //#define INT_EN_RXDF_EN_ (0x00000040) /* R/W */ | ||
340 | #define INT_EN_RDFO_EN_ (0x00000040) /* R/W */ | ||
341 | #define INT_EN_RDFL_EN_ (0x00000020) /* R/W */ | ||
342 | #define INT_EN_RSFF_EN_ (0x00000010) /* R/W */ | ||
343 | #define INT_EN_RSFL_EN_ (0x00000008) /* R/W */ | ||
344 | #define INT_EN_GPIO2_INT_ (0x00000004) /* R/W */ | ||
345 | #define INT_EN_GPIO1_INT_ (0x00000002) /* R/W */ | ||
346 | #define INT_EN_GPIO0_INT_ (0x00000001) /* R/W */ | ||
347 | |||
348 | #define BYTE_TEST (0x64) | ||
349 | #define FIFO_INT (0x68) | ||
350 | #define FIFO_INT_TX_AVAIL_LEVEL_ (0xFF000000) /* R/W */ | ||
351 | #define FIFO_INT_TX_STS_LEVEL_ (0x00FF0000) /* R/W */ | ||
352 | #define FIFO_INT_RX_AVAIL_LEVEL_ (0x0000FF00) /* R/W */ | ||
353 | #define FIFO_INT_RX_STS_LEVEL_ (0x000000FF) /* R/W */ | ||
354 | |||
355 | #define RX_CFG (0x6C) | ||
356 | #define RX_CFG_RX_END_ALGN_ (0xC0000000) /* R/W */ | ||
357 | #define RX_CFG_RX_END_ALGN4_ (0x00000000) /* R/W */ | ||
358 | #define RX_CFG_RX_END_ALGN16_ (0x40000000) /* R/W */ | ||
359 | #define RX_CFG_RX_END_ALGN32_ (0x80000000) /* R/W */ | ||
360 | #define RX_CFG_RX_DMA_CNT_ (0x0FFF0000) /* R/W */ | ||
361 | #define RX_CFG_RX_DUMP_ (0x00008000) /* R/W */ | ||
362 | #define RX_CFG_RXDOFF_ (0x00001F00) /* R/W */ | ||
363 | //#define RX_CFG_RXBAD_ (0x00000001) /* R/W */ | ||
364 | |||
365 | #define TX_CFG (0x70) | ||
366 | //#define TX_CFG_TX_DMA_LVL_ (0xE0000000) /* R/W */ | ||
367 | //#define TX_CFG_TX_DMA_CNT_ (0x0FFF0000) /* R/W Self Clearing */ | ||
368 | #define TX_CFG_TXS_DUMP_ (0x00008000) /* Self Clearing */ | ||
369 | #define TX_CFG_TXD_DUMP_ (0x00004000) /* Self Clearing */ | ||
370 | #define TX_CFG_TXSAO_ (0x00000004) /* R/W */ | ||
371 | #define TX_CFG_TX_ON_ (0x00000002) /* R/W */ | ||
372 | #define TX_CFG_STOP_TX_ (0x00000001) /* Self Clearing */ | ||
373 | |||
374 | #define HW_CFG (0x74) | ||
375 | #define HW_CFG_TTM_ (0x00200000) /* R/W */ | ||
376 | #define HW_CFG_SF_ (0x00100000) /* R/W */ | ||
377 | #define HW_CFG_TX_FIF_SZ_ (0x000F0000) /* R/W */ | ||
378 | #define HW_CFG_TR_ (0x00003000) /* R/W */ | ||
379 | #define HW_CFG_PHY_CLK_SEL_ (0x00000060) /* R/W */ | ||
380 | #define HW_CFG_PHY_CLK_SEL_INT_PHY_ (0x00000000) /* R/W */ | ||
381 | #define HW_CFG_PHY_CLK_SEL_EXT_PHY_ (0x00000020) /* R/W */ | ||
382 | #define HW_CFG_PHY_CLK_SEL_CLK_DIS_ (0x00000040) /* R/W */ | ||
383 | #define HW_CFG_SMI_SEL_ (0x00000010) /* R/W */ | ||
384 | #define HW_CFG_EXT_PHY_DET_ (0x00000008) /* RO */ | ||
385 | #define HW_CFG_EXT_PHY_EN_ (0x00000004) /* R/W */ | ||
386 | #define HW_CFG_32_16_BIT_MODE_ (0x00000004) /* RO */ | ||
387 | #define HW_CFG_SRST_TO_ (0x00000002) /* RO */ | ||
388 | #define HW_CFG_SRST_ (0x00000001) /* Self Clearing */ | ||
389 | |||
390 | #define RX_DP_CTRL (0x78) | ||
391 | #define RX_DP_CTRL_RX_FFWD_ (0x80000000) /* R/W */ | ||
392 | #define RX_DP_CTRL_FFWD_BUSY_ (0x80000000) /* RO */ | ||
393 | |||
394 | #define RX_FIFO_INF (0x7C) | ||
395 | #define RX_FIFO_INF_RXSUSED_ (0x00FF0000) /* RO */ | ||
396 | #define RX_FIFO_INF_RXDUSED_ (0x0000FFFF) /* RO */ | ||
397 | |||
398 | #define TX_FIFO_INF (0x80) | ||
399 | #define TX_FIFO_INF_TSUSED_ (0x00FF0000) /* RO */ | ||
400 | #define TX_FIFO_INF_TDFREE_ (0x0000FFFF) /* RO */ | ||
401 | |||
402 | #define PMT_CTRL (0x84) | ||
403 | #define PMT_CTRL_PM_MODE_ (0x00003000) /* Self Clearing */ | ||
404 | #define PMT_CTRL_PHY_RST_ (0x00000400) /* Self Clearing */ | ||
405 | #define PMT_CTRL_WOL_EN_ (0x00000200) /* R/W */ | ||
406 | #define PMT_CTRL_ED_EN_ (0x00000100) /* R/W */ | ||
407 | #define PMT_CTRL_PME_TYPE_ (0x00000040) /* R/W Not Affected by SW Reset */ | ||
408 | #define PMT_CTRL_WUPS_ (0x00000030) /* R/WC */ | ||
409 | #define PMT_CTRL_WUPS_NOWAKE_ (0x00000000) /* R/WC */ | ||
410 | #define PMT_CTRL_WUPS_ED_ (0x00000010) /* R/WC */ | ||
411 | #define PMT_CTRL_WUPS_WOL_ (0x00000020) /* R/WC */ | ||
412 | #define PMT_CTRL_WUPS_MULTI_ (0x00000030) /* R/WC */ | ||
413 | #define PMT_CTRL_PME_IND_ (0x00000008) /* R/W */ | ||
414 | #define PMT_CTRL_PME_POL_ (0x00000004) /* R/W */ | ||
415 | #define PMT_CTRL_PME_EN_ (0x00000002) /* R/W Not Affected by SW Reset */ | ||
416 | #define PMT_CTRL_READY_ (0x00000001) /* RO */ | ||
417 | |||
418 | #define GPIO_CFG (0x88) | ||
419 | #define GPIO_CFG_LED3_EN_ (0x40000000) /* R/W */ | ||
420 | #define GPIO_CFG_LED2_EN_ (0x20000000) /* R/W */ | ||
421 | #define GPIO_CFG_LED1_EN_ (0x10000000) /* R/W */ | ||
422 | #define GPIO_CFG_GPIO2_INT_POL_ (0x04000000) /* R/W */ | ||
423 | #define GPIO_CFG_GPIO1_INT_POL_ (0x02000000) /* R/W */ | ||
424 | #define GPIO_CFG_GPIO0_INT_POL_ (0x01000000) /* R/W */ | ||
425 | #define GPIO_CFG_EEPR_EN_ (0x00700000) /* R/W */ | ||
426 | #define GPIO_CFG_GPIOBUF2_ (0x00040000) /* R/W */ | ||
427 | #define GPIO_CFG_GPIOBUF1_ (0x00020000) /* R/W */ | ||
428 | #define GPIO_CFG_GPIOBUF0_ (0x00010000) /* R/W */ | ||
429 | #define GPIO_CFG_GPIODIR2_ (0x00000400) /* R/W */ | ||
430 | #define GPIO_CFG_GPIODIR1_ (0x00000200) /* R/W */ | ||
431 | #define GPIO_CFG_GPIODIR0_ (0x00000100) /* R/W */ | ||
432 | #define GPIO_CFG_GPIOD4_ (0x00000010) /* R/W */ | ||
433 | #define GPIO_CFG_GPIOD3_ (0x00000008) /* R/W */ | ||
434 | #define GPIO_CFG_GPIOD2_ (0x00000004) /* R/W */ | ||
435 | #define GPIO_CFG_GPIOD1_ (0x00000002) /* R/W */ | ||
436 | #define GPIO_CFG_GPIOD0_ (0x00000001) /* R/W */ | ||
437 | |||
438 | #define GPT_CFG (0x8C) | ||
439 | #define GPT_CFG_TIMER_EN_ (0x20000000) /* R/W */ | ||
440 | #define GPT_CFG_GPT_LOAD_ (0x0000FFFF) /* R/W */ | ||
441 | |||
442 | #define GPT_CNT (0x90) | ||
443 | #define GPT_CNT_GPT_CNT_ (0x0000FFFF) /* RO */ | ||
444 | |||
445 | #define ENDIAN (0x98) | ||
446 | #define FREE_RUN (0x9C) | ||
447 | #define RX_DROP (0xA0) | ||
448 | #define MAC_CSR_CMD (0xA4) | ||
449 | #define MAC_CSR_CMD_CSR_BUSY_ (0x80000000) /* Self Clearing */ | ||
450 | #define MAC_CSR_CMD_R_NOT_W_ (0x40000000) /* R/W */ | ||
451 | #define MAC_CSR_CMD_CSR_ADDR_ (0x000000FF) /* R/W */ | ||
452 | |||
453 | #define MAC_CSR_DATA (0xA8) | ||
454 | #define AFC_CFG (0xAC) | ||
455 | #define AFC_CFG_AFC_HI_ (0x00FF0000) /* R/W */ | ||
456 | #define AFC_CFG_AFC_LO_ (0x0000FF00) /* R/W */ | ||
457 | #define AFC_CFG_BACK_DUR_ (0x000000F0) /* R/W */ | ||
458 | #define AFC_CFG_FCMULT_ (0x00000008) /* R/W */ | ||
459 | #define AFC_CFG_FCBRD_ (0x00000004) /* R/W */ | ||
460 | #define AFC_CFG_FCADD_ (0x00000002) /* R/W */ | ||
461 | #define AFC_CFG_FCANY_ (0x00000001) /* R/W */ | ||
462 | |||
463 | #define E2P_CMD (0xB0) | ||
464 | #define E2P_CMD_EPC_BUSY_ (0x80000000) /* Self Clearing */ | ||
465 | #define E2P_CMD_EPC_CMD_ (0x70000000) /* R/W */ | ||
466 | #define E2P_CMD_EPC_CMD_READ_ (0x00000000) /* R/W */ | ||
467 | #define E2P_CMD_EPC_CMD_EWDS_ (0x10000000) /* R/W */ | ||
468 | #define E2P_CMD_EPC_CMD_EWEN_ (0x20000000) /* R/W */ | ||
469 | #define E2P_CMD_EPC_CMD_WRITE_ (0x30000000) /* R/W */ | ||
470 | #define E2P_CMD_EPC_CMD_WRAL_ (0x40000000) /* R/W */ | ||
471 | #define E2P_CMD_EPC_CMD_ERASE_ (0x50000000) /* R/W */ | ||
472 | #define E2P_CMD_EPC_CMD_ERAL_ (0x60000000) /* R/W */ | ||
473 | #define E2P_CMD_EPC_CMD_RELOAD_ (0x70000000) /* R/W */ | ||
474 | #define E2P_CMD_EPC_TIMEOUT_ (0x00000200) /* RO */ | ||
475 | #define E2P_CMD_MAC_ADDR_LOADED_ (0x00000100) /* RO */ | ||
476 | #define E2P_CMD_EPC_ADDR_ (0x000000FF) /* R/W */ | ||
477 | |||
478 | #define E2P_DATA (0xB4) | ||
479 | #define E2P_DATA_EEPROM_DATA_ (0x000000FF) /* R/W */ | ||
480 | /* end of LAN register offsets and bit definitions */ | ||
481 | |||
482 | /* | ||
483 | **************************************************************************** | ||
484 | **************************************************************************** | ||
485 | * MAC Control and Status Register (Indirect Address) | ||
486 | * Offset (through the MAC_CSR CMD and DATA port) | ||
487 | **************************************************************************** | ||
488 | **************************************************************************** | ||
489 | * | ||
490 | */ | ||
491 | #define MAC_CR (0x01) /* R/W */ | ||
492 | |||
493 | /* MAC_CR - MAC Control Register */ | ||
494 | #define MAC_CR_RXALL_ (0x80000000) | ||
495 | // TODO: delete this bit? It is not described in the data sheet. | ||
496 | #define MAC_CR_HBDIS_ (0x10000000) | ||
497 | #define MAC_CR_RCVOWN_ (0x00800000) | ||
498 | #define MAC_CR_LOOPBK_ (0x00200000) | ||
499 | #define MAC_CR_FDPX_ (0x00100000) | ||
500 | #define MAC_CR_MCPAS_ (0x00080000) | ||
501 | #define MAC_CR_PRMS_ (0x00040000) | ||
502 | #define MAC_CR_INVFILT_ (0x00020000) | ||
503 | #define MAC_CR_PASSBAD_ (0x00010000) | ||
504 | #define MAC_CR_HFILT_ (0x00008000) | ||
505 | #define MAC_CR_HPFILT_ (0x00002000) | ||
506 | #define MAC_CR_LCOLL_ (0x00001000) | ||
507 | #define MAC_CR_BCAST_ (0x00000800) | ||
508 | #define MAC_CR_DISRTY_ (0x00000400) | ||
509 | #define MAC_CR_PADSTR_ (0x00000100) | ||
510 | #define MAC_CR_BOLMT_MASK_ (0x000000C0) | ||
511 | #define MAC_CR_DFCHK_ (0x00000020) | ||
512 | #define MAC_CR_TXEN_ (0x00000008) | ||
513 | #define MAC_CR_RXEN_ (0x00000004) | ||
514 | |||
515 | #define ADDRH (0x02) /* R/W mask 0x0000FFFFUL */ | ||
516 | #define ADDRL (0x03) /* R/W mask 0xFFFFFFFFUL */ | ||
517 | #define HASHH (0x04) /* R/W */ | ||
518 | #define HASHL (0x05) /* R/W */ | ||
519 | |||
520 | #define MII_ACC (0x06) /* R/W */ | ||
521 | #define MII_ACC_PHY_ADDR_ (0x0000F800) | ||
522 | #define MII_ACC_MIIRINDA_ (0x000007C0) | ||
523 | #define MII_ACC_MII_WRITE_ (0x00000002) | ||
524 | #define MII_ACC_MII_BUSY_ (0x00000001) | ||
525 | |||
526 | #define MII_DATA (0x07) /* R/W mask 0x0000FFFFUL */ | ||
527 | |||
528 | #define FLOW (0x08) /* R/W */ | ||
529 | #define FLOW_FCPT_ (0xFFFF0000) | ||
530 | #define FLOW_FCPASS_ (0x00000004) | ||
531 | #define FLOW_FCEN_ (0x00000002) | ||
532 | #define FLOW_FCBSY_ (0x00000001) | ||
533 | |||
534 | #define VLAN1 (0x09) /* R/W mask 0x0000FFFFUL */ | ||
535 | #define VLAN1_VTI1_ (0x0000ffff) | ||
536 | |||
537 | #define VLAN2 (0x0A) /* R/W mask 0x0000FFFFUL */ | ||
538 | #define VLAN2_VTI2_ (0x0000ffff) | ||
539 | |||
540 | #define WUFF (0x0B) /* WO */ | ||
541 | |||
542 | #define WUCSR (0x0C) /* R/W */ | ||
543 | #define WUCSR_GUE_ (0x00000200) | ||
544 | #define WUCSR_WUFR_ (0x00000040) | ||
545 | #define WUCSR_MPR_ (0x00000020) | ||
546 | #define WUCSR_WAKE_EN_ (0x00000004) | ||
547 | #define WUCSR_MPEN_ (0x00000002) | ||
548 | |||
549 | /* | ||
550 | **************************************************************************** | ||
551 | * Chip Specific MII Defines | ||
552 | **************************************************************************** | ||
553 | * | ||
554 | * Phy register offsets and bit definitions | ||
555 | * | ||
556 | */ | ||
557 | |||
558 | #define PHY_MODE_CTRL_STS ((u32)17) /* Mode Control/Status Register */ | ||
559 | //#define MODE_CTRL_STS_FASTRIP_ ((u16)0x4000) | ||
560 | #define MODE_CTRL_STS_EDPWRDOWN_ ((u16)0x2000) | ||
561 | //#define MODE_CTRL_STS_LOWSQEN_ ((u16)0x0800) | ||
562 | //#define MODE_CTRL_STS_MDPREBP_ ((u16)0x0400) | ||
563 | //#define MODE_CTRL_STS_FARLOOPBACK_ ((u16)0x0200) | ||
564 | //#define MODE_CTRL_STS_FASTEST_ ((u16)0x0100) | ||
565 | //#define MODE_CTRL_STS_REFCLKEN_ ((u16)0x0010) | ||
566 | //#define MODE_CTRL_STS_PHYADBP_ ((u16)0x0008) | ||
567 | //#define MODE_CTRL_STS_FORCE_G_LINK_ ((u16)0x0004) | ||
568 | #define MODE_CTRL_STS_ENERGYON_ ((u16)0x0002) | ||
569 | |||
570 | #define PHY_INT_SRC ((u32)29) | ||
571 | #define PHY_INT_SRC_ENERGY_ON_ ((u16)0x0080) | ||
572 | #define PHY_INT_SRC_ANEG_COMP_ ((u16)0x0040) | ||
573 | #define PHY_INT_SRC_REMOTE_FAULT_ ((u16)0x0020) | ||
574 | #define PHY_INT_SRC_LINK_DOWN_ ((u16)0x0010) | ||
575 | #define PHY_INT_SRC_ANEG_LP_ACK_ ((u16)0x0008) | ||
576 | #define PHY_INT_SRC_PAR_DET_FAULT_ ((u16)0x0004) | ||
577 | #define PHY_INT_SRC_ANEG_PGRX_ ((u16)0x0002) | ||
578 | |||
579 | #define PHY_INT_MASK ((u32)30) | ||
580 | #define PHY_INT_MASK_ENERGY_ON_ ((u16)0x0080) | ||
581 | #define PHY_INT_MASK_ANEG_COMP_ ((u16)0x0040) | ||
582 | #define PHY_INT_MASK_REMOTE_FAULT_ ((u16)0x0020) | ||
583 | #define PHY_INT_MASK_LINK_DOWN_ ((u16)0x0010) | ||
584 | #define PHY_INT_MASK_ANEG_LP_ACK_ ((u16)0x0008) | ||
585 | #define PHY_INT_MASK_PAR_DET_FAULT_ ((u16)0x0004) | ||
586 | #define PHY_INT_MASK_ANEG_PGRX_ ((u16)0x0002) | ||
587 | |||
588 | #define PHY_SPECIAL ((u32)31) | ||
589 | #define PHY_SPECIAL_ANEG_DONE_ ((u16)0x1000) | ||
590 | #define PHY_SPECIAL_RES_ ((u16)0x0040) | ||
591 | #define PHY_SPECIAL_RES_MASK_ ((u16)0x0FE1) | ||
592 | #define PHY_SPECIAL_SPD_ ((u16)0x001C) | ||
593 | #define PHY_SPECIAL_SPD_10HALF_ ((u16)0x0004) | ||
594 | #define PHY_SPECIAL_SPD_10FULL_ ((u16)0x0014) | ||
595 | #define PHY_SPECIAL_SPD_100HALF_ ((u16)0x0008) | ||
596 | #define PHY_SPECIAL_SPD_100FULL_ ((u16)0x0018) | ||
597 | |||
598 | #define LAN911X_INTERNAL_PHY_ID (0x0007C000) | ||
599 | |||
600 | /* Chip ID values */ | ||
601 | #define CHIP_9115 0x115 | ||
602 | #define CHIP_9116 0x116 | ||
603 | #define CHIP_9117 0x117 | ||
604 | #define CHIP_9118 0x118 | ||
605 | |||
606 | struct chip_id { | ||
607 | u16 id; | ||
608 | char *name; | ||
609 | }; | ||
610 | |||
611 | static const struct chip_id chip_ids[] = { | ||
612 | { CHIP_9115, "LAN9115" }, | ||
613 | { CHIP_9116, "LAN9116" }, | ||
614 | { CHIP_9117, "LAN9117" }, | ||
615 | { CHIP_9118, "LAN9118" }, | ||
616 | { 0, NULL }, | ||
617 | }; | ||
618 | |||
619 | #define IS_REV_A(x) ((x & 0xFFFF)==0) | ||
620 | |||
621 | /* | ||
622 | * Macros to abstract register access according to the data bus | ||
623 | * capabilities. Please use those and not the in/out primitives. | ||
624 | */ | ||
625 | /* FIFO read/write macros */ | ||
626 | #define SMC_PUSH_DATA(p, l) SMC_outsl( ioaddr, TX_DATA_FIFO, p, (l) >> 2 ) | ||
627 | #define SMC_PULL_DATA(p, l) SMC_insl ( ioaddr, RX_DATA_FIFO, p, (l) >> 2 ) | ||
628 | #define SMC_SET_TX_FIFO(x) SMC_outl( x, ioaddr, TX_DATA_FIFO ) | ||
629 | #define SMC_GET_RX_FIFO() SMC_inl( ioaddr, RX_DATA_FIFO ) | ||
630 | |||
631 | |||
632 | /* I/O mapped register read/write macros */ | ||
633 | #define SMC_GET_TX_STS_FIFO() SMC_inl( ioaddr, TX_STATUS_FIFO ) | ||
634 | #define SMC_GET_RX_STS_FIFO() SMC_inl( ioaddr, RX_STATUS_FIFO ) | ||
635 | #define SMC_GET_RX_STS_FIFO_PEEK() SMC_inl( ioaddr, RX_STATUS_FIFO_PEEK ) | ||
636 | #define SMC_GET_PN() (SMC_inl( ioaddr, ID_REV ) >> 16) | ||
637 | #define SMC_GET_REV() (SMC_inl( ioaddr, ID_REV ) & 0xFFFF) | ||
638 | #define SMC_GET_IRQ_CFG() SMC_inl( ioaddr, INT_CFG ) | ||
639 | #define SMC_SET_IRQ_CFG(x) SMC_outl( x, ioaddr, INT_CFG ) | ||
640 | #define SMC_GET_INT() SMC_inl( ioaddr, INT_STS ) | ||
641 | #define SMC_ACK_INT(x) SMC_outl( x, ioaddr, INT_STS ) | ||
642 | #define SMC_GET_INT_EN() SMC_inl( ioaddr, INT_EN ) | ||
643 | #define SMC_SET_INT_EN(x) SMC_outl( x, ioaddr, INT_EN ) | ||
644 | #define SMC_GET_BYTE_TEST() SMC_inl( ioaddr, BYTE_TEST ) | ||
645 | #define SMC_SET_BYTE_TEST(x) SMC_outl( x, ioaddr, BYTE_TEST ) | ||
646 | #define SMC_GET_FIFO_INT() SMC_inl( ioaddr, FIFO_INT ) | ||
647 | #define SMC_SET_FIFO_INT(x) SMC_outl( x, ioaddr, FIFO_INT ) | ||
648 | #define SMC_SET_FIFO_TDA(x) \ | ||
649 | do { \ | ||
650 | unsigned long __flags; \ | ||
651 | int __mask; \ | ||
652 | local_irq_save(__flags); \ | ||
653 | __mask = SMC_GET_FIFO_INT() & ~(0xFF<<24); \ | ||
654 | SMC_SET_FIFO_INT( __mask | (x)<<24 ); \ | ||
655 | local_irq_restore(__flags); \ | ||
656 | } while (0) | ||
657 | #define SMC_SET_FIFO_TSL(x) \ | ||
658 | do { \ | ||
659 | unsigned long __flags; \ | ||
660 | int __mask; \ | ||
661 | local_irq_save(__flags); \ | ||
662 | __mask = SMC_GET_FIFO_INT() & ~(0xFF<<16); \ | ||
663 | SMC_SET_FIFO_INT( __mask | (((x) & 0xFF)<<16)); \ | ||
664 | local_irq_restore(__flags); \ | ||
665 | } while (0) | ||
666 | #define SMC_SET_FIFO_RSA(x) \ | ||
667 | do { \ | ||
668 | unsigned long __flags; \ | ||
669 | int __mask; \ | ||
670 | local_irq_save(__flags); \ | ||
671 | __mask = SMC_GET_FIFO_INT() & ~(0xFF<<8); \ | ||
672 | SMC_SET_FIFO_INT( __mask | (((x) & 0xFF)<<8)); \ | ||
673 | local_irq_restore(__flags); \ | ||
674 | } while (0) | ||
675 | #define SMC_SET_FIFO_RSL(x) \ | ||
676 | do { \ | ||
677 | unsigned long __flags; \ | ||
678 | int __mask; \ | ||
679 | local_irq_save(__flags); \ | ||
680 | __mask = SMC_GET_FIFO_INT() & ~0xFF; \ | ||
681 | SMC_SET_FIFO_INT( __mask | ((x) & 0xFF)); \ | ||
682 | local_irq_restore(__flags); \ | ||
683 | } while (0) | ||
684 | #define SMC_GET_RX_CFG() SMC_inl( ioaddr, RX_CFG ) | ||
685 | #define SMC_SET_RX_CFG(x) SMC_outl( x, ioaddr, RX_CFG ) | ||
686 | #define SMC_GET_TX_CFG() SMC_inl( ioaddr, TX_CFG ) | ||
687 | #define SMC_SET_TX_CFG(x) SMC_outl( x, ioaddr, TX_CFG ) | ||
688 | #define SMC_GET_HW_CFG() SMC_inl( ioaddr, HW_CFG ) | ||
689 | #define SMC_SET_HW_CFG(x) SMC_outl( x, ioaddr, HW_CFG ) | ||
690 | #define SMC_GET_RX_DP_CTRL() SMC_inl( ioaddr, RX_DP_CTRL ) | ||
691 | #define SMC_SET_RX_DP_CTRL(x) SMC_outl( x, ioaddr, RX_DP_CTRL ) | ||
692 | #define SMC_GET_PMT_CTRL() SMC_inl( ioaddr, PMT_CTRL ) | ||
693 | #define SMC_SET_PMT_CTRL(x) SMC_outl( x, ioaddr, PMT_CTRL ) | ||
694 | #define SMC_GET_GPIO_CFG() SMC_inl( ioaddr, GPIO_CFG ) | ||
695 | #define SMC_SET_GPIO_CFG(x) SMC_outl( x, ioaddr, GPIO_CFG ) | ||
696 | #define SMC_GET_RX_FIFO_INF() SMC_inl( ioaddr, RX_FIFO_INF ) | ||
697 | #define SMC_SET_RX_FIFO_INF(x) SMC_outl( x, ioaddr, RX_FIFO_INF ) | ||
698 | #define SMC_GET_TX_FIFO_INF() SMC_inl( ioaddr, TX_FIFO_INF ) | ||
699 | #define SMC_SET_TX_FIFO_INF(x) SMC_outl( x, ioaddr, TX_FIFO_INF ) | ||
700 | #define SMC_GET_GPT_CFG() SMC_inl( ioaddr, GPT_CFG ) | ||
701 | #define SMC_SET_GPT_CFG(x) SMC_outl( x, ioaddr, GPT_CFG ) | ||
702 | #define SMC_GET_RX_DROP() SMC_inl( ioaddr, RX_DROP ) | ||
703 | #define SMC_SET_RX_DROP(x) SMC_outl( x, ioaddr, RX_DROP ) | ||
704 | #define SMC_GET_MAC_CMD() SMC_inl( ioaddr, MAC_CSR_CMD ) | ||
705 | #define SMC_SET_MAC_CMD(x) SMC_outl( x, ioaddr, MAC_CSR_CMD ) | ||
706 | #define SMC_GET_MAC_DATA() SMC_inl( ioaddr, MAC_CSR_DATA ) | ||
707 | #define SMC_SET_MAC_DATA(x) SMC_outl( x, ioaddr, MAC_CSR_DATA ) | ||
708 | #define SMC_GET_AFC_CFG() SMC_inl( ioaddr, AFC_CFG ) | ||
709 | #define SMC_SET_AFC_CFG(x) SMC_outl( x, ioaddr, AFC_CFG ) | ||
710 | #define SMC_GET_E2P_CMD() SMC_inl( ioaddr, E2P_CMD ) | ||
711 | #define SMC_SET_E2P_CMD(x) SMC_outl( x, ioaddr, E2P_CMD ) | ||
712 | #define SMC_GET_E2P_DATA() SMC_inl( ioaddr, E2P_DATA ) | ||
713 | #define SMC_SET_E2P_DATA(x) SMC_outl( x, ioaddr, E2P_DATA ) | ||
714 | |||
715 | /* MAC register read/write macros */ | ||
716 | #define SMC_GET_MAC_CSR(a,v) \ | ||
717 | do { \ | ||
718 | while (SMC_GET_MAC_CMD() & MAC_CSR_CMD_CSR_BUSY_); \ | ||
719 | SMC_SET_MAC_CMD(MAC_CSR_CMD_CSR_BUSY_ | \ | ||
720 | MAC_CSR_CMD_R_NOT_W_ | (a) ); \ | ||
721 | while (SMC_GET_MAC_CMD() & MAC_CSR_CMD_CSR_BUSY_); \ | ||
722 | v = SMC_GET_MAC_DATA(); \ | ||
723 | } while (0) | ||
724 | #define SMC_SET_MAC_CSR(a,v) \ | ||
725 | do { \ | ||
726 | while (SMC_GET_MAC_CMD() & MAC_CSR_CMD_CSR_BUSY_); \ | ||
727 | SMC_SET_MAC_DATA(v); \ | ||
728 | SMC_SET_MAC_CMD(MAC_CSR_CMD_CSR_BUSY_ | (a) ); \ | ||
729 | while (SMC_GET_MAC_CMD() & MAC_CSR_CMD_CSR_BUSY_); \ | ||
730 | } while (0) | ||
731 | #define SMC_GET_MAC_CR(x) SMC_GET_MAC_CSR( MAC_CR, x ) | ||
732 | #define SMC_SET_MAC_CR(x) SMC_SET_MAC_CSR( MAC_CR, x ) | ||
733 | #define SMC_GET_ADDRH(x) SMC_GET_MAC_CSR( ADDRH, x ) | ||
734 | #define SMC_SET_ADDRH(x) SMC_SET_MAC_CSR( ADDRH, x ) | ||
735 | #define SMC_GET_ADDRL(x) SMC_GET_MAC_CSR( ADDRL, x ) | ||
736 | #define SMC_SET_ADDRL(x) SMC_SET_MAC_CSR( ADDRL, x ) | ||
737 | #define SMC_GET_HASHH(x) SMC_GET_MAC_CSR( HASHH, x ) | ||
738 | #define SMC_SET_HASHH(x) SMC_SET_MAC_CSR( HASHH, x ) | ||
739 | #define SMC_GET_HASHL(x) SMC_GET_MAC_CSR( HASHL, x ) | ||
740 | #define SMC_SET_HASHL(x) SMC_SET_MAC_CSR( HASHL, x ) | ||
741 | #define SMC_GET_MII_ACC(x) SMC_GET_MAC_CSR( MII_ACC, x ) | ||
742 | #define SMC_SET_MII_ACC(x) SMC_SET_MAC_CSR( MII_ACC, x ) | ||
743 | #define SMC_GET_MII_DATA(x) SMC_GET_MAC_CSR( MII_DATA, x ) | ||
744 | #define SMC_SET_MII_DATA(x) SMC_SET_MAC_CSR( MII_DATA, x ) | ||
745 | #define SMC_GET_FLOW(x) SMC_GET_MAC_CSR( FLOW, x ) | ||
746 | #define SMC_SET_FLOW(x) SMC_SET_MAC_CSR( FLOW, x ) | ||
747 | #define SMC_GET_VLAN1(x) SMC_GET_MAC_CSR( VLAN1, x ) | ||
748 | #define SMC_SET_VLAN1(x) SMC_SET_MAC_CSR( VLAN1, x ) | ||
749 | #define SMC_GET_VLAN2(x) SMC_GET_MAC_CSR( VLAN2, x ) | ||
750 | #define SMC_SET_VLAN2(x) SMC_SET_MAC_CSR( VLAN2, x ) | ||
751 | #define SMC_SET_WUFF(x) SMC_SET_MAC_CSR( WUFF, x ) | ||
752 | #define SMC_GET_WUCSR(x) SMC_GET_MAC_CSR( WUCSR, x ) | ||
753 | #define SMC_SET_WUCSR(x) SMC_SET_MAC_CSR( WUCSR, x ) | ||
754 | |||
755 | /* PHY register read/write macros */ | ||
756 | #define SMC_GET_MII(a,phy,v) \ | ||
757 | do { \ | ||
758 | u32 __v; \ | ||
759 | do { \ | ||
760 | SMC_GET_MII_ACC(__v); \ | ||
761 | } while ( __v & MII_ACC_MII_BUSY_ ); \ | ||
762 | SMC_SET_MII_ACC( ((phy)<<11) | ((a)<<6) | \ | ||
763 | MII_ACC_MII_BUSY_); \ | ||
764 | do { \ | ||
765 | SMC_GET_MII_ACC(__v); \ | ||
766 | } while ( __v & MII_ACC_MII_BUSY_ ); \ | ||
767 | SMC_GET_MII_DATA(v); \ | ||
768 | } while (0) | ||
769 | #define SMC_SET_MII(a,phy,v) \ | ||
770 | do { \ | ||
771 | u32 __v; \ | ||
772 | do { \ | ||
773 | SMC_GET_MII_ACC(__v); \ | ||
774 | } while ( __v & MII_ACC_MII_BUSY_ ); \ | ||
775 | SMC_SET_MII_DATA(v); \ | ||
776 | SMC_SET_MII_ACC( ((phy)<<11) | ((a)<<6) | \ | ||
777 | MII_ACC_MII_BUSY_ | \ | ||
778 | MII_ACC_MII_WRITE_ ); \ | ||
779 | do { \ | ||
780 | SMC_GET_MII_ACC(__v); \ | ||
781 | } while ( __v & MII_ACC_MII_BUSY_ ); \ | ||
782 | } while (0) | ||
783 | #define SMC_GET_PHY_BMCR(phy,x) SMC_GET_MII( MII_BMCR, phy, x ) | ||
784 | #define SMC_SET_PHY_BMCR(phy,x) SMC_SET_MII( MII_BMCR, phy, x ) | ||
785 | #define SMC_GET_PHY_BMSR(phy,x) SMC_GET_MII( MII_BMSR, phy, x ) | ||
786 | #define SMC_GET_PHY_ID1(phy,x) SMC_GET_MII( MII_PHYSID1, phy, x ) | ||
787 | #define SMC_GET_PHY_ID2(phy,x) SMC_GET_MII( MII_PHYSID2, phy, x ) | ||
788 | #define SMC_GET_PHY_MII_ADV(phy,x) SMC_GET_MII( MII_ADVERTISE, phy, x ) | ||
789 | #define SMC_SET_PHY_MII_ADV(phy,x) SMC_SET_MII( MII_ADVERTISE, phy, x ) | ||
790 | #define SMC_GET_PHY_MII_LPA(phy,x) SMC_GET_MII( MII_LPA, phy, x ) | ||
791 | #define SMC_SET_PHY_MII_LPA(phy,x) SMC_SET_MII( MII_LPA, phy, x ) | ||
792 | #define SMC_GET_PHY_CTRL_STS(phy,x) SMC_GET_MII( PHY_MODE_CTRL_STS, phy, x ) | ||
793 | #define SMC_SET_PHY_CTRL_STS(phy,x) SMC_SET_MII( PHY_MODE_CTRL_STS, phy, x ) | ||
794 | #define SMC_GET_PHY_INT_SRC(phy,x) SMC_GET_MII( PHY_INT_SRC, phy, x ) | ||
795 | #define SMC_SET_PHY_INT_SRC(phy,x) SMC_SET_MII( PHY_INT_SRC, phy, x ) | ||
796 | #define SMC_GET_PHY_INT_MASK(phy,x) SMC_GET_MII( PHY_INT_MASK, phy, x ) | ||
797 | #define SMC_SET_PHY_INT_MASK(phy,x) SMC_SET_MII( PHY_INT_MASK, phy, x ) | ||
798 | #define SMC_GET_PHY_SPECIAL(phy,x) SMC_GET_MII( PHY_SPECIAL, phy, x ) | ||
799 | |||
800 | |||
801 | |||
802 | /* Misc read/write macros */ | ||
803 | |||
804 | #ifndef SMC_GET_MAC_ADDR | ||
805 | #define SMC_GET_MAC_ADDR(addr) \ | ||
806 | do { \ | ||
807 | unsigned int __v; \ | ||
808 | \ | ||
809 | SMC_GET_MAC_CSR(ADDRL, __v); \ | ||
810 | addr[0] = __v; addr[1] = __v >> 8; \ | ||
811 | addr[2] = __v >> 16; addr[3] = __v >> 24; \ | ||
812 | SMC_GET_MAC_CSR(ADDRH, __v); \ | ||
813 | addr[4] = __v; addr[5] = __v >> 8; \ | ||
814 | } while (0) | ||
815 | #endif | ||
816 | |||
817 | #define SMC_SET_MAC_ADDR(addr) \ | ||
818 | do { \ | ||
819 | SMC_SET_MAC_CSR(ADDRL, \ | ||
820 | addr[0] | \ | ||
821 | (addr[1] << 8) | \ | ||
822 | (addr[2] << 16) | \ | ||
823 | (addr[3] << 24)); \ | ||
824 | SMC_SET_MAC_CSR(ADDRH, addr[4]|(addr[5] << 8));\ | ||
825 | } while (0) | ||
826 | |||
827 | |||
828 | #define SMC_WRITE_EEPROM_CMD(cmd, addr) \ | ||
829 | do { \ | ||
830 | while (SMC_GET_E2P_CMD() & MAC_CSR_CMD_CSR_BUSY_); \ | ||
831 | SMC_SET_MAC_CMD(MAC_CSR_CMD_R_NOT_W_ | a ); \ | ||
832 | while (SMC_GET_MAC_CMD() & MAC_CSR_CMD_CSR_BUSY_); \ | ||
833 | } while (0) | ||
834 | |||
835 | #endif /* _SMC911X_H_ */ | ||
diff --git a/drivers/net/smc9194.c b/drivers/net/smc9194.c index f86697da04d6..6cf16f322ad5 100644 --- a/drivers/net/smc9194.c +++ b/drivers/net/smc9194.c | |||
@@ -732,12 +732,9 @@ static int ifport; | |||
732 | struct net_device * __init smc_init(int unit) | 732 | struct net_device * __init smc_init(int unit) |
733 | { | 733 | { |
734 | struct net_device *dev = alloc_etherdev(sizeof(struct smc_local)); | 734 | struct net_device *dev = alloc_etherdev(sizeof(struct smc_local)); |
735 | static struct devlist *smcdev = smc_devlist; | 735 | struct devlist *smcdev = smc_devlist; |
736 | int err = 0; | 736 | int err = 0; |
737 | 737 | ||
738 | #ifndef NO_AUTOPROBE | ||
739 | smcdev = smc_devlist; | ||
740 | #endif | ||
741 | if (!dev) | 738 | if (!dev) |
742 | return ERR_PTR(-ENODEV); | 739 | return ERR_PTR(-ENODEV); |
743 | 740 | ||
@@ -1607,7 +1604,7 @@ MODULE_PARM_DESC(io, "SMC 99194 I/O base address"); | |||
1607 | MODULE_PARM_DESC(irq, "SMC 99194 IRQ number"); | 1604 | MODULE_PARM_DESC(irq, "SMC 99194 IRQ number"); |
1608 | MODULE_PARM_DESC(ifport, "SMC 99194 interface port (0-default, 1-TP, 2-AUI)"); | 1605 | MODULE_PARM_DESC(ifport, "SMC 99194 interface port (0-default, 1-TP, 2-AUI)"); |
1609 | 1606 | ||
1610 | int init_module(void) | 1607 | int __init init_module(void) |
1611 | { | 1608 | { |
1612 | if (io == 0) | 1609 | if (io == 0) |
1613 | printk(KERN_WARNING | 1610 | printk(KERN_WARNING |
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h index e1be1af51201..f72a4f57905a 100644 --- a/drivers/net/smc91x.h +++ b/drivers/net/smc91x.h | |||
@@ -129,6 +129,24 @@ | |||
129 | #define SMC_insb(a, r, p, l) readsb((a) + (r), p, (l)) | 129 | #define SMC_insb(a, r, p, l) readsb((a) + (r), p, (l)) |
130 | #define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l)) | 130 | #define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l)) |
131 | 131 | ||
132 | #elif defined(CONFIG_MACH_LOGICPD_PXA270) | ||
133 | |||
134 | #define SMC_CAN_USE_8BIT 0 | ||
135 | #define SMC_CAN_USE_16BIT 1 | ||
136 | #define SMC_CAN_USE_32BIT 0 | ||
137 | #define SMC_IO_SHIFT 0 | ||
138 | #define SMC_NOWAIT 1 | ||
139 | #define SMC_USE_PXA_DMA 1 | ||
140 | |||
141 | #define SMC_inb(a, r) readb((a) + (r)) | ||
142 | #define SMC_inw(a, r) readw((a) + (r)) | ||
143 | #define SMC_inl(a, r) readl((a) + (r)) | ||
144 | #define SMC_outb(v, a, r) writeb(v, (a) + (r)) | ||
145 | #define SMC_outw(v, a, r) writew(v, (a) + (r)) | ||
146 | #define SMC_outl(v, a, r) writel(v, (a) + (r)) | ||
147 | #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) | ||
148 | #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) | ||
149 | |||
132 | #elif defined(CONFIG_ARCH_INNOKOM) || \ | 150 | #elif defined(CONFIG_ARCH_INNOKOM) || \ |
133 | defined(CONFIG_MACH_MAINSTONE) || \ | 151 | defined(CONFIG_MACH_MAINSTONE) || \ |
134 | defined(CONFIG_ARCH_PXA_IDP) || \ | 152 | defined(CONFIG_ARCH_PXA_IDP) || \ |
diff --git a/drivers/net/sungem_phy.c b/drivers/net/sungem_phy.c index b2ddd5e79303..9282b4b0c022 100644 --- a/drivers/net/sungem_phy.c +++ b/drivers/net/sungem_phy.c | |||
@@ -345,9 +345,9 @@ static int bcm5421_enable_fiber(struct mii_phy* phy) | |||
345 | 345 | ||
346 | static int bcm5461_enable_fiber(struct mii_phy* phy) | 346 | static int bcm5461_enable_fiber(struct mii_phy* phy) |
347 | { | 347 | { |
348 | phy_write(phy, MII_NCONFIG, 0xfc0c); | 348 | phy_write(phy, MII_NCONFIG, 0xfc0c); |
349 | phy_write(phy, MII_BMCR, 0x4140); | 349 | phy_write(phy, MII_BMCR, 0x4140); |
350 | phy_write(phy, MII_NCONFIG, 0xfc0b); | 350 | phy_write(phy, MII_NCONFIG, 0xfc0b); |
351 | phy_write(phy, MII_BMCR, 0x0140); | 351 | phy_write(phy, MII_BMCR, 0x0140); |
352 | 352 | ||
353 | return 0; | 353 | return 0; |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 49ad60b72657..b2ddd4522a87 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -69,8 +69,8 @@ | |||
69 | 69 | ||
70 | #define DRV_MODULE_NAME "tg3" | 70 | #define DRV_MODULE_NAME "tg3" |
71 | #define PFX DRV_MODULE_NAME ": " | 71 | #define PFX DRV_MODULE_NAME ": " |
72 | #define DRV_MODULE_VERSION "3.58" | 72 | #define DRV_MODULE_VERSION "3.60" |
73 | #define DRV_MODULE_RELDATE "May 22, 2006" | 73 | #define DRV_MODULE_RELDATE "June 17, 2006" |
74 | 74 | ||
75 | #define TG3_DEF_MAC_MODE 0 | 75 | #define TG3_DEF_MAC_MODE 0 |
76 | #define TG3_DEF_RX_MODE 0 | 76 | #define TG3_DEF_RX_MODE 0 |
@@ -229,6 +229,8 @@ static struct pci_device_id tg3_pci_tbl[] = { | |||
229 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 229 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
230 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5755M, | 230 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5755M, |
231 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 231 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
232 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5786, | ||
233 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | ||
232 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787, | 234 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787, |
233 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 235 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
234 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787M, | 236 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787M, |
@@ -2965,6 +2967,27 @@ static int tg3_setup_phy(struct tg3 *tp, int force_reset) | |||
2965 | return err; | 2967 | return err; |
2966 | } | 2968 | } |
2967 | 2969 | ||
2970 | /* This is called whenever we suspect that the system chipset is re- | ||
2971 | * ordering the sequence of MMIO to the tx send mailbox. The symptom | ||
2972 | * is bogus tx completions. We try to recover by setting the | ||
2973 | * TG3_FLAG_MBOX_WRITE_REORDER flag and resetting the chip later | ||
2974 | * in the workqueue. | ||
2975 | */ | ||
2976 | static void tg3_tx_recover(struct tg3 *tp) | ||
2977 | { | ||
2978 | BUG_ON((tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER) || | ||
2979 | tp->write32_tx_mbox == tg3_write_indirect_mbox); | ||
2980 | |||
2981 | printk(KERN_WARNING PFX "%s: The system may be re-ordering memory-" | ||
2982 | "mapped I/O cycles to the network device, attempting to " | ||
2983 | "recover. Please report the problem to the driver maintainer " | ||
2984 | "and include system chipset information.\n", tp->dev->name); | ||
2985 | |||
2986 | spin_lock(&tp->lock); | ||
2987 | tp->tg3_flags |= TG3_FLAG_TX_RECOVERY_PENDING; | ||
2988 | spin_unlock(&tp->lock); | ||
2989 | } | ||
2990 | |||
2968 | /* Tigon3 never reports partial packet sends. So we do not | 2991 | /* Tigon3 never reports partial packet sends. So we do not |
2969 | * need special logic to handle SKBs that have not had all | 2992 | * need special logic to handle SKBs that have not had all |
2970 | * of their frags sent yet, like SunGEM does. | 2993 | * of their frags sent yet, like SunGEM does. |
@@ -2977,9 +3000,13 @@ static void tg3_tx(struct tg3 *tp) | |||
2977 | while (sw_idx != hw_idx) { | 3000 | while (sw_idx != hw_idx) { |
2978 | struct tx_ring_info *ri = &tp->tx_buffers[sw_idx]; | 3001 | struct tx_ring_info *ri = &tp->tx_buffers[sw_idx]; |
2979 | struct sk_buff *skb = ri->skb; | 3002 | struct sk_buff *skb = ri->skb; |
2980 | int i; | 3003 | int i, tx_bug = 0; |
3004 | |||
3005 | if (unlikely(skb == NULL)) { | ||
3006 | tg3_tx_recover(tp); | ||
3007 | return; | ||
3008 | } | ||
2981 | 3009 | ||
2982 | BUG_ON(skb == NULL); | ||
2983 | pci_unmap_single(tp->pdev, | 3010 | pci_unmap_single(tp->pdev, |
2984 | pci_unmap_addr(ri, mapping), | 3011 | pci_unmap_addr(ri, mapping), |
2985 | skb_headlen(skb), | 3012 | skb_headlen(skb), |
@@ -2990,10 +3017,9 @@ static void tg3_tx(struct tg3 *tp) | |||
2990 | sw_idx = NEXT_TX(sw_idx); | 3017 | sw_idx = NEXT_TX(sw_idx); |
2991 | 3018 | ||
2992 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | 3019 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
2993 | BUG_ON(sw_idx == hw_idx); | ||
2994 | |||
2995 | ri = &tp->tx_buffers[sw_idx]; | 3020 | ri = &tp->tx_buffers[sw_idx]; |
2996 | BUG_ON(ri->skb != NULL); | 3021 | if (unlikely(ri->skb != NULL || sw_idx == hw_idx)) |
3022 | tx_bug = 1; | ||
2997 | 3023 | ||
2998 | pci_unmap_page(tp->pdev, | 3024 | pci_unmap_page(tp->pdev, |
2999 | pci_unmap_addr(ri, mapping), | 3025 | pci_unmap_addr(ri, mapping), |
@@ -3004,6 +3030,11 @@ static void tg3_tx(struct tg3 *tp) | |||
3004 | } | 3030 | } |
3005 | 3031 | ||
3006 | dev_kfree_skb(skb); | 3032 | dev_kfree_skb(skb); |
3033 | |||
3034 | if (unlikely(tx_bug)) { | ||
3035 | tg3_tx_recover(tp); | ||
3036 | return; | ||
3037 | } | ||
3007 | } | 3038 | } |
3008 | 3039 | ||
3009 | tp->tx_cons = sw_idx; | 3040 | tp->tx_cons = sw_idx; |
@@ -3331,6 +3362,11 @@ static int tg3_poll(struct net_device *netdev, int *budget) | |||
3331 | /* run TX completion thread */ | 3362 | /* run TX completion thread */ |
3332 | if (sblk->idx[0].tx_consumer != tp->tx_cons) { | 3363 | if (sblk->idx[0].tx_consumer != tp->tx_cons) { |
3333 | tg3_tx(tp); | 3364 | tg3_tx(tp); |
3365 | if (unlikely(tp->tg3_flags & TG3_FLAG_TX_RECOVERY_PENDING)) { | ||
3366 | netif_rx_complete(netdev); | ||
3367 | schedule_work(&tp->reset_task); | ||
3368 | return 0; | ||
3369 | } | ||
3334 | } | 3370 | } |
3335 | 3371 | ||
3336 | /* run RX thread, within the bounds set by NAPI. | 3372 | /* run RX thread, within the bounds set by NAPI. |
@@ -3391,12 +3427,10 @@ static inline void tg3_full_lock(struct tg3 *tp, int irq_sync) | |||
3391 | if (irq_sync) | 3427 | if (irq_sync) |
3392 | tg3_irq_quiesce(tp); | 3428 | tg3_irq_quiesce(tp); |
3393 | spin_lock_bh(&tp->lock); | 3429 | spin_lock_bh(&tp->lock); |
3394 | spin_lock(&tp->tx_lock); | ||
3395 | } | 3430 | } |
3396 | 3431 | ||
3397 | static inline void tg3_full_unlock(struct tg3 *tp) | 3432 | static inline void tg3_full_unlock(struct tg3 *tp) |
3398 | { | 3433 | { |
3399 | spin_unlock(&tp->tx_lock); | ||
3400 | spin_unlock_bh(&tp->lock); | 3434 | spin_unlock_bh(&tp->lock); |
3401 | } | 3435 | } |
3402 | 3436 | ||
@@ -3579,6 +3613,13 @@ static void tg3_reset_task(void *_data) | |||
3579 | restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER; | 3613 | restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER; |
3580 | tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER; | 3614 | tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER; |
3581 | 3615 | ||
3616 | if (tp->tg3_flags & TG3_FLAG_TX_RECOVERY_PENDING) { | ||
3617 | tp->write32_tx_mbox = tg3_write32_tx_mbox; | ||
3618 | tp->write32_rx_mbox = tg3_write_flush_reg32; | ||
3619 | tp->tg3_flags |= TG3_FLAG_MBOX_WRITE_REORDER; | ||
3620 | tp->tg3_flags &= ~TG3_FLAG_TX_RECOVERY_PENDING; | ||
3621 | } | ||
3622 | |||
3582 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 0); | 3623 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 0); |
3583 | tg3_init_hw(tp, 1); | 3624 | tg3_init_hw(tp, 1); |
3584 | 3625 | ||
@@ -3718,14 +3759,11 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3718 | 3759 | ||
3719 | len = skb_headlen(skb); | 3760 | len = skb_headlen(skb); |
3720 | 3761 | ||
3721 | /* No BH disabling for tx_lock here. We are running in BH disabled | 3762 | /* We are running in BH disabled context with netif_tx_lock |
3722 | * context and TX reclaim runs via tp->poll inside of a software | 3763 | * and TX reclaim runs via tp->poll inside of a software |
3723 | * interrupt. Furthermore, IRQ processing runs lockless so we have | 3764 | * interrupt. Furthermore, IRQ processing runs lockless so we have |
3724 | * no IRQ context deadlocks to worry about either. Rejoice! | 3765 | * no IRQ context deadlocks to worry about either. Rejoice! |
3725 | */ | 3766 | */ |
3726 | if (!spin_trylock(&tp->tx_lock)) | ||
3727 | return NETDEV_TX_LOCKED; | ||
3728 | |||
3729 | if (unlikely(TX_BUFFS_AVAIL(tp) <= (skb_shinfo(skb)->nr_frags + 1))) { | 3767 | if (unlikely(TX_BUFFS_AVAIL(tp) <= (skb_shinfo(skb)->nr_frags + 1))) { |
3730 | if (!netif_queue_stopped(dev)) { | 3768 | if (!netif_queue_stopped(dev)) { |
3731 | netif_stop_queue(dev); | 3769 | netif_stop_queue(dev); |
@@ -3734,7 +3772,6 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3734 | printk(KERN_ERR PFX "%s: BUG! Tx Ring full when " | 3772 | printk(KERN_ERR PFX "%s: BUG! Tx Ring full when " |
3735 | "queue awake!\n", dev->name); | 3773 | "queue awake!\n", dev->name); |
3736 | } | 3774 | } |
3737 | spin_unlock(&tp->tx_lock); | ||
3738 | return NETDEV_TX_BUSY; | 3775 | return NETDEV_TX_BUSY; |
3739 | } | 3776 | } |
3740 | 3777 | ||
@@ -3817,15 +3854,16 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3817 | tw32_tx_mbox((MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW), entry); | 3854 | tw32_tx_mbox((MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW), entry); |
3818 | 3855 | ||
3819 | tp->tx_prod = entry; | 3856 | tp->tx_prod = entry; |
3820 | if (TX_BUFFS_AVAIL(tp) <= (MAX_SKB_FRAGS + 1)) { | 3857 | if (unlikely(TX_BUFFS_AVAIL(tp) <= (MAX_SKB_FRAGS + 1))) { |
3858 | spin_lock(&tp->tx_lock); | ||
3821 | netif_stop_queue(dev); | 3859 | netif_stop_queue(dev); |
3822 | if (TX_BUFFS_AVAIL(tp) > TG3_TX_WAKEUP_THRESH) | 3860 | if (TX_BUFFS_AVAIL(tp) > TG3_TX_WAKEUP_THRESH) |
3823 | netif_wake_queue(tp->dev); | 3861 | netif_wake_queue(tp->dev); |
3862 | spin_unlock(&tp->tx_lock); | ||
3824 | } | 3863 | } |
3825 | 3864 | ||
3826 | out_unlock: | 3865 | out_unlock: |
3827 | mmiowb(); | 3866 | mmiowb(); |
3828 | spin_unlock(&tp->tx_lock); | ||
3829 | 3867 | ||
3830 | dev->trans_start = jiffies; | 3868 | dev->trans_start = jiffies; |
3831 | 3869 | ||
@@ -3844,14 +3882,11 @@ static int tg3_start_xmit_dma_bug(struct sk_buff *skb, struct net_device *dev) | |||
3844 | 3882 | ||
3845 | len = skb_headlen(skb); | 3883 | len = skb_headlen(skb); |
3846 | 3884 | ||
3847 | /* No BH disabling for tx_lock here. We are running in BH disabled | 3885 | /* We are running in BH disabled context with netif_tx_lock |
3848 | * context and TX reclaim runs via tp->poll inside of a software | 3886 | * and TX reclaim runs via tp->poll inside of a software |
3849 | * interrupt. Furthermore, IRQ processing runs lockless so we have | 3887 | * interrupt. Furthermore, IRQ processing runs lockless so we have |
3850 | * no IRQ context deadlocks to worry about either. Rejoice! | 3888 | * no IRQ context deadlocks to worry about either. Rejoice! |
3851 | */ | 3889 | */ |
3852 | if (!spin_trylock(&tp->tx_lock)) | ||
3853 | return NETDEV_TX_LOCKED; | ||
3854 | |||
3855 | if (unlikely(TX_BUFFS_AVAIL(tp) <= (skb_shinfo(skb)->nr_frags + 1))) { | 3890 | if (unlikely(TX_BUFFS_AVAIL(tp) <= (skb_shinfo(skb)->nr_frags + 1))) { |
3856 | if (!netif_queue_stopped(dev)) { | 3891 | if (!netif_queue_stopped(dev)) { |
3857 | netif_stop_queue(dev); | 3892 | netif_stop_queue(dev); |
@@ -3860,7 +3895,6 @@ static int tg3_start_xmit_dma_bug(struct sk_buff *skb, struct net_device *dev) | |||
3860 | printk(KERN_ERR PFX "%s: BUG! Tx Ring full when " | 3895 | printk(KERN_ERR PFX "%s: BUG! Tx Ring full when " |
3861 | "queue awake!\n", dev->name); | 3896 | "queue awake!\n", dev->name); |
3862 | } | 3897 | } |
3863 | spin_unlock(&tp->tx_lock); | ||
3864 | return NETDEV_TX_BUSY; | 3898 | return NETDEV_TX_BUSY; |
3865 | } | 3899 | } |
3866 | 3900 | ||
@@ -3998,15 +4032,16 @@ static int tg3_start_xmit_dma_bug(struct sk_buff *skb, struct net_device *dev) | |||
3998 | tw32_tx_mbox((MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW), entry); | 4032 | tw32_tx_mbox((MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW), entry); |
3999 | 4033 | ||
4000 | tp->tx_prod = entry; | 4034 | tp->tx_prod = entry; |
4001 | if (TX_BUFFS_AVAIL(tp) <= (MAX_SKB_FRAGS + 1)) { | 4035 | if (unlikely(TX_BUFFS_AVAIL(tp) <= (MAX_SKB_FRAGS + 1))) { |
4036 | spin_lock(&tp->tx_lock); | ||
4002 | netif_stop_queue(dev); | 4037 | netif_stop_queue(dev); |
4003 | if (TX_BUFFS_AVAIL(tp) > TG3_TX_WAKEUP_THRESH) | 4038 | if (TX_BUFFS_AVAIL(tp) > TG3_TX_WAKEUP_THRESH) |
4004 | netif_wake_queue(tp->dev); | 4039 | netif_wake_queue(tp->dev); |
4040 | spin_unlock(&tp->tx_lock); | ||
4005 | } | 4041 | } |
4006 | 4042 | ||
4007 | out_unlock: | 4043 | out_unlock: |
4008 | mmiowb(); | 4044 | mmiowb(); |
4009 | spin_unlock(&tp->tx_lock); | ||
4010 | 4045 | ||
4011 | dev->trans_start = jiffies; | 4046 | dev->trans_start = jiffies; |
4012 | 4047 | ||
@@ -4485,9 +4520,8 @@ static void tg3_disable_nvram_access(struct tg3 *tp) | |||
4485 | /* tp->lock is held. */ | 4520 | /* tp->lock is held. */ |
4486 | static void tg3_write_sig_pre_reset(struct tg3 *tp, int kind) | 4521 | static void tg3_write_sig_pre_reset(struct tg3 *tp, int kind) |
4487 | { | 4522 | { |
4488 | if (!(tp->tg3_flags2 & TG3_FLG2_SUN_570X)) | 4523 | tg3_write_mem(tp, NIC_SRAM_FIRMWARE_MBOX, |
4489 | tg3_write_mem(tp, NIC_SRAM_FIRMWARE_MBOX, | 4524 | NIC_SRAM_FIRMWARE_MBOX_MAGIC1); |
4490 | NIC_SRAM_FIRMWARE_MBOX_MAGIC1); | ||
4491 | 4525 | ||
4492 | if (tp->tg3_flags2 & TG3_FLG2_ASF_NEW_HANDSHAKE) { | 4526 | if (tp->tg3_flags2 & TG3_FLG2_ASF_NEW_HANDSHAKE) { |
4493 | switch (kind) { | 4527 | switch (kind) { |
@@ -4568,13 +4602,12 @@ static int tg3_chip_reset(struct tg3 *tp) | |||
4568 | void (*write_op)(struct tg3 *, u32, u32); | 4602 | void (*write_op)(struct tg3 *, u32, u32); |
4569 | int i; | 4603 | int i; |
4570 | 4604 | ||
4571 | if (!(tp->tg3_flags2 & TG3_FLG2_SUN_570X)) { | 4605 | tg3_nvram_lock(tp); |
4572 | tg3_nvram_lock(tp); | 4606 | |
4573 | /* No matching tg3_nvram_unlock() after this because | 4607 | /* No matching tg3_nvram_unlock() after this because |
4574 | * chip reset below will undo the nvram lock. | 4608 | * chip reset below will undo the nvram lock. |
4575 | */ | 4609 | */ |
4576 | tp->nvram_lock_cnt = 0; | 4610 | tp->nvram_lock_cnt = 0; |
4577 | } | ||
4578 | 4611 | ||
4579 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 || | 4612 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 || |
4580 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || | 4613 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || |
@@ -4727,20 +4760,25 @@ static int tg3_chip_reset(struct tg3 *tp) | |||
4727 | tw32_f(MAC_MODE, 0); | 4760 | tw32_f(MAC_MODE, 0); |
4728 | udelay(40); | 4761 | udelay(40); |
4729 | 4762 | ||
4730 | if (!(tp->tg3_flags2 & TG3_FLG2_SUN_570X)) { | 4763 | /* Wait for firmware initialization to complete. */ |
4731 | /* Wait for firmware initialization to complete. */ | 4764 | for (i = 0; i < 100000; i++) { |
4732 | for (i = 0; i < 100000; i++) { | 4765 | tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val); |
4733 | tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val); | 4766 | if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1) |
4734 | if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1) | 4767 | break; |
4735 | break; | 4768 | udelay(10); |
4736 | udelay(10); | 4769 | } |
4737 | } | 4770 | |
4738 | if (i >= 100000) { | 4771 | /* Chip might not be fitted with firmare. Some Sun onboard |
4739 | printk(KERN_ERR PFX "tg3_reset_hw timed out for %s, " | 4772 | * parts are configured like that. So don't signal the timeout |
4740 | "firmware will not restart magic=%08x\n", | 4773 | * of the above loop as an error, but do report the lack of |
4741 | tp->dev->name, val); | 4774 | * running firmware once. |
4742 | return -ENODEV; | 4775 | */ |
4743 | } | 4776 | if (i >= 100000 && |
4777 | !(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) { | ||
4778 | tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED; | ||
4779 | |||
4780 | printk(KERN_INFO PFX "%s: No firmware running.\n", | ||
4781 | tp->dev->name); | ||
4744 | } | 4782 | } |
4745 | 4783 | ||
4746 | if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) && | 4784 | if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) && |
@@ -9075,9 +9113,6 @@ static void __devinit tg3_nvram_init(struct tg3 *tp) | |||
9075 | { | 9113 | { |
9076 | int j; | 9114 | int j; |
9077 | 9115 | ||
9078 | if (tp->tg3_flags2 & TG3_FLG2_SUN_570X) | ||
9079 | return; | ||
9080 | |||
9081 | tw32_f(GRC_EEPROM_ADDR, | 9116 | tw32_f(GRC_EEPROM_ADDR, |
9082 | (EEPROM_ADDR_FSM_RESET | | 9117 | (EEPROM_ADDR_FSM_RESET | |
9083 | (EEPROM_DEFAULT_CLOCK_PERIOD << | 9118 | (EEPROM_DEFAULT_CLOCK_PERIOD << |
@@ -9210,11 +9245,6 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val) | |||
9210 | { | 9245 | { |
9211 | int ret; | 9246 | int ret; |
9212 | 9247 | ||
9213 | if (tp->tg3_flags2 & TG3_FLG2_SUN_570X) { | ||
9214 | printk(KERN_ERR PFX "Attempt to do nvram_read on Sun 570X\n"); | ||
9215 | return -EINVAL; | ||
9216 | } | ||
9217 | |||
9218 | if (!(tp->tg3_flags & TG3_FLAG_NVRAM)) | 9248 | if (!(tp->tg3_flags & TG3_FLAG_NVRAM)) |
9219 | return tg3_nvram_read_using_eeprom(tp, offset, val); | 9249 | return tg3_nvram_read_using_eeprom(tp, offset, val); |
9220 | 9250 | ||
@@ -9447,11 +9477,6 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf) | |||
9447 | { | 9477 | { |
9448 | int ret; | 9478 | int ret; |
9449 | 9479 | ||
9450 | if (tp->tg3_flags2 & TG3_FLG2_SUN_570X) { | ||
9451 | printk(KERN_ERR PFX "Attempt to do nvram_write on Sun 570X\n"); | ||
9452 | return -EINVAL; | ||
9453 | } | ||
9454 | |||
9455 | if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) { | 9480 | if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) { |
9456 | tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl & | 9481 | tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl & |
9457 | ~GRC_LCLCTRL_GPIO_OUTPUT1); | 9482 | ~GRC_LCLCTRL_GPIO_OUTPUT1); |
@@ -9578,15 +9603,19 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) | |||
9578 | pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL, | 9603 | pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL, |
9579 | tp->misc_host_ctrl); | 9604 | tp->misc_host_ctrl); |
9580 | 9605 | ||
9606 | /* The memory arbiter has to be enabled in order for SRAM accesses | ||
9607 | * to succeed. Normally on powerup the tg3 chip firmware will make | ||
9608 | * sure it is enabled, but other entities such as system netboot | ||
9609 | * code might disable it. | ||
9610 | */ | ||
9611 | val = tr32(MEMARB_MODE); | ||
9612 | tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE); | ||
9613 | |||
9581 | tp->phy_id = PHY_ID_INVALID; | 9614 | tp->phy_id = PHY_ID_INVALID; |
9582 | tp->led_ctrl = LED_CTRL_MODE_PHY_1; | 9615 | tp->led_ctrl = LED_CTRL_MODE_PHY_1; |
9583 | 9616 | ||
9584 | /* Do not even try poking around in here on Sun parts. */ | 9617 | /* Assume an onboard device by default. */ |
9585 | if (tp->tg3_flags2 & TG3_FLG2_SUN_570X) { | 9618 | tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT; |
9586 | /* All SUN chips are built-in LOMs. */ | ||
9587 | tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT; | ||
9588 | return; | ||
9589 | } | ||
9590 | 9619 | ||
9591 | tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val); | 9620 | tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val); |
9592 | if (val == NIC_SRAM_DATA_SIG_MAGIC) { | 9621 | if (val == NIC_SRAM_DATA_SIG_MAGIC) { |
@@ -9686,6 +9715,8 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) | |||
9686 | 9715 | ||
9687 | if (nic_cfg & NIC_SRAM_DATA_CFG_EEPROM_WP) | 9716 | if (nic_cfg & NIC_SRAM_DATA_CFG_EEPROM_WP) |
9688 | tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT; | 9717 | tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT; |
9718 | else | ||
9719 | tp->tg3_flags &= ~TG3_FLAG_EEPROM_WRITE_PROT; | ||
9689 | 9720 | ||
9690 | if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) { | 9721 | if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) { |
9691 | tp->tg3_flags |= TG3_FLAG_ENABLE_ASF; | 9722 | tp->tg3_flags |= TG3_FLAG_ENABLE_ASF; |
@@ -9834,16 +9865,8 @@ static void __devinit tg3_read_partno(struct tg3 *tp) | |||
9834 | int i; | 9865 | int i; |
9835 | u32 magic; | 9866 | u32 magic; |
9836 | 9867 | ||
9837 | if (tp->tg3_flags2 & TG3_FLG2_SUN_570X) { | ||
9838 | /* Sun decided not to put the necessary bits in the | ||
9839 | * NVRAM of their onboard tg3 parts :( | ||
9840 | */ | ||
9841 | strcpy(tp->board_part_number, "Sun 570X"); | ||
9842 | return; | ||
9843 | } | ||
9844 | |||
9845 | if (tg3_nvram_read_swab(tp, 0x0, &magic)) | 9868 | if (tg3_nvram_read_swab(tp, 0x0, &magic)) |
9846 | return; | 9869 | goto out_not_found; |
9847 | 9870 | ||
9848 | if (magic == TG3_EEPROM_MAGIC) { | 9871 | if (magic == TG3_EEPROM_MAGIC) { |
9849 | for (i = 0; i < 256; i += 4) { | 9872 | for (i = 0; i < 256; i += 4) { |
@@ -9874,6 +9897,9 @@ static void __devinit tg3_read_partno(struct tg3 *tp) | |||
9874 | break; | 9897 | break; |
9875 | msleep(1); | 9898 | msleep(1); |
9876 | } | 9899 | } |
9900 | if (!(tmp16 & 0x8000)) | ||
9901 | goto out_not_found; | ||
9902 | |||
9877 | pci_read_config_dword(tp->pdev, vpd_cap + PCI_VPD_DATA, | 9903 | pci_read_config_dword(tp->pdev, vpd_cap + PCI_VPD_DATA, |
9878 | &tmp); | 9904 | &tmp); |
9879 | tmp = cpu_to_le32(tmp); | 9905 | tmp = cpu_to_le32(tmp); |
@@ -9965,37 +9991,6 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp) | |||
9965 | } | 9991 | } |
9966 | } | 9992 | } |
9967 | 9993 | ||
9968 | #ifdef CONFIG_SPARC64 | ||
9969 | static int __devinit tg3_is_sun_570X(struct tg3 *tp) | ||
9970 | { | ||
9971 | struct pci_dev *pdev = tp->pdev; | ||
9972 | struct pcidev_cookie *pcp = pdev->sysdata; | ||
9973 | |||
9974 | if (pcp != NULL) { | ||
9975 | int node = pcp->prom_node; | ||
9976 | u32 venid; | ||
9977 | int err; | ||
9978 | |||
9979 | err = prom_getproperty(node, "subsystem-vendor-id", | ||
9980 | (char *) &venid, sizeof(venid)); | ||
9981 | if (err == 0 || err == -1) | ||
9982 | return 0; | ||
9983 | if (venid == PCI_VENDOR_ID_SUN) | ||
9984 | return 1; | ||
9985 | |||
9986 | /* TG3 chips onboard the SunBlade-2500 don't have the | ||
9987 | * subsystem-vendor-id set to PCI_VENDOR_ID_SUN but they | ||
9988 | * are distinguishable from non-Sun variants by being | ||
9989 | * named "network" by the firmware. Non-Sun cards will | ||
9990 | * show up as being named "ethernet". | ||
9991 | */ | ||
9992 | if (!strcmp(pcp->prom_name, "network")) | ||
9993 | return 1; | ||
9994 | } | ||
9995 | return 0; | ||
9996 | } | ||
9997 | #endif | ||
9998 | |||
9999 | static int __devinit tg3_get_invariants(struct tg3 *tp) | 9994 | static int __devinit tg3_get_invariants(struct tg3 *tp) |
10000 | { | 9995 | { |
10001 | static struct pci_device_id write_reorder_chipsets[] = { | 9996 | static struct pci_device_id write_reorder_chipsets[] = { |
@@ -10012,11 +10007,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
10012 | u16 pci_cmd; | 10007 | u16 pci_cmd; |
10013 | int err; | 10008 | int err; |
10014 | 10009 | ||
10015 | #ifdef CONFIG_SPARC64 | ||
10016 | if (tg3_is_sun_570X(tp)) | ||
10017 | tp->tg3_flags2 |= TG3_FLG2_SUN_570X; | ||
10018 | #endif | ||
10019 | |||
10020 | /* Force memory write invalidate off. If we leave it on, | 10010 | /* Force memory write invalidate off. If we leave it on, |
10021 | * then on 5700_BX chips we have to enable a workaround. | 10011 | * then on 5700_BX chips we have to enable a workaround. |
10022 | * The workaround is to set the TG3PCI_DMA_RW_CTRL boundary | 10012 | * The workaround is to set the TG3PCI_DMA_RW_CTRL boundary |
@@ -10312,8 +10302,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
10312 | if (tp->write32 == tg3_write_indirect_reg32 || | 10302 | if (tp->write32 == tg3_write_indirect_reg32 || |
10313 | ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) && | 10303 | ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) && |
10314 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || | 10304 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || |
10315 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)) || | 10305 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701))) |
10316 | (tp->tg3_flags2 & TG3_FLG2_SUN_570X)) | ||
10317 | tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG; | 10306 | tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG; |
10318 | 10307 | ||
10319 | /* Get eeprom hw config before calling tg3_set_power_state(). | 10308 | /* Get eeprom hw config before calling tg3_set_power_state(). |
@@ -10594,8 +10583,7 @@ static int __devinit tg3_get_device_address(struct tg3 *tp) | |||
10594 | #endif | 10583 | #endif |
10595 | 10584 | ||
10596 | mac_offset = 0x7c; | 10585 | mac_offset = 0x7c; |
10597 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 && | 10586 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) || |
10598 | !(tp->tg3_flags & TG3_FLG2_SUN_570X)) || | ||
10599 | (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) { | 10587 | (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) { |
10600 | if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID) | 10588 | if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID) |
10601 | mac_offset = 0xcc; | 10589 | mac_offset = 0xcc; |
@@ -10622,8 +10610,7 @@ static int __devinit tg3_get_device_address(struct tg3 *tp) | |||
10622 | } | 10610 | } |
10623 | if (!addr_ok) { | 10611 | if (!addr_ok) { |
10624 | /* Next, try NVRAM. */ | 10612 | /* Next, try NVRAM. */ |
10625 | if (!(tp->tg3_flags & TG3_FLG2_SUN_570X) && | 10613 | if (!tg3_nvram_read(tp, mac_offset + 0, &hi) && |
10626 | !tg3_nvram_read(tp, mac_offset + 0, &hi) && | ||
10627 | !tg3_nvram_read(tp, mac_offset + 4, &lo)) { | 10614 | !tg3_nvram_read(tp, mac_offset + 4, &lo)) { |
10628 | dev->dev_addr[0] = ((hi >> 16) & 0xff); | 10615 | dev->dev_addr[0] = ((hi >> 16) & 0xff); |
10629 | dev->dev_addr[1] = ((hi >> 24) & 0xff); | 10616 | dev->dev_addr[1] = ((hi >> 24) & 0xff); |
@@ -11291,7 +11278,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
11291 | SET_MODULE_OWNER(dev); | 11278 | SET_MODULE_OWNER(dev); |
11292 | SET_NETDEV_DEV(dev, &pdev->dev); | 11279 | SET_NETDEV_DEV(dev, &pdev->dev); |
11293 | 11280 | ||
11294 | dev->features |= NETIF_F_LLTX; | ||
11295 | #if TG3_VLAN_TAG_USED | 11281 | #if TG3_VLAN_TAG_USED |
11296 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; | 11282 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; |
11297 | dev->vlan_rx_register = tg3_vlan_rx_register; | 11283 | dev->vlan_rx_register = tg3_vlan_rx_register; |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 0e29b885d449..8209da5dd15f 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -2074,12 +2074,22 @@ struct tg3 { | |||
2074 | 2074 | ||
2075 | /* SMP locking strategy: | 2075 | /* SMP locking strategy: |
2076 | * | 2076 | * |
2077 | * lock: Held during all operations except TX packet | 2077 | * lock: Held during reset, PHY access, timer, and when |
2078 | * processing. | 2078 | * updating tg3_flags and tg3_flags2. |
2079 | * | 2079 | * |
2080 | * tx_lock: Held during tg3_start_xmit and tg3_tx | 2080 | * tx_lock: Held during tg3_start_xmit and tg3_tx only |
2081 | * when calling netif_[start|stop]_queue. | ||
2082 | * tg3_start_xmit is protected by netif_tx_lock. | ||
2081 | * | 2083 | * |
2082 | * Both of these locks are to be held with BH safety. | 2084 | * Both of these locks are to be held with BH safety. |
2085 | * | ||
2086 | * Because the IRQ handler, tg3_poll, and tg3_start_xmit | ||
2087 | * are running lockless, it is necessary to completely | ||
2088 | * quiesce the chip with tg3_netif_stop and tg3_full_lock | ||
2089 | * before reconfiguring the device. | ||
2090 | * | ||
2091 | * indirect_lock: Held when accessing registers indirectly | ||
2092 | * with IRQ disabling. | ||
2083 | */ | 2093 | */ |
2084 | spinlock_t lock; | 2094 | spinlock_t lock; |
2085 | spinlock_t indirect_lock; | 2095 | spinlock_t indirect_lock; |
@@ -2155,11 +2165,7 @@ struct tg3 { | |||
2155 | #define TG3_FLAG_ENABLE_ASF 0x00000020 | 2165 | #define TG3_FLAG_ENABLE_ASF 0x00000020 |
2156 | #define TG3_FLAG_5701_REG_WRITE_BUG 0x00000040 | 2166 | #define TG3_FLAG_5701_REG_WRITE_BUG 0x00000040 |
2157 | #define TG3_FLAG_POLL_SERDES 0x00000080 | 2167 | #define TG3_FLAG_POLL_SERDES 0x00000080 |
2158 | #if defined(CONFIG_X86) | ||
2159 | #define TG3_FLAG_MBOX_WRITE_REORDER 0x00000100 | 2168 | #define TG3_FLAG_MBOX_WRITE_REORDER 0x00000100 |
2160 | #else | ||
2161 | #define TG3_FLAG_MBOX_WRITE_REORDER 0 /* disables code too */ | ||
2162 | #endif | ||
2163 | #define TG3_FLAG_PCIX_TARGET_HWBUG 0x00000200 | 2169 | #define TG3_FLAG_PCIX_TARGET_HWBUG 0x00000200 |
2164 | #define TG3_FLAG_WOL_SPEED_100MB 0x00000400 | 2170 | #define TG3_FLAG_WOL_SPEED_100MB 0x00000400 |
2165 | #define TG3_FLAG_WOL_ENABLE 0x00000800 | 2171 | #define TG3_FLAG_WOL_ENABLE 0x00000800 |
@@ -2172,6 +2178,7 @@ struct tg3 { | |||
2172 | #define TG3_FLAG_PCI_HIGH_SPEED 0x00040000 | 2178 | #define TG3_FLAG_PCI_HIGH_SPEED 0x00040000 |
2173 | #define TG3_FLAG_PCI_32BIT 0x00080000 | 2179 | #define TG3_FLAG_PCI_32BIT 0x00080000 |
2174 | #define TG3_FLAG_SRAM_USE_CONFIG 0x00100000 | 2180 | #define TG3_FLAG_SRAM_USE_CONFIG 0x00100000 |
2181 | #define TG3_FLAG_TX_RECOVERY_PENDING 0x00200000 | ||
2175 | #define TG3_FLAG_SERDES_WOL_CAP 0x00400000 | 2182 | #define TG3_FLAG_SERDES_WOL_CAP 0x00400000 |
2176 | #define TG3_FLAG_JUMBO_RING_ENABLE 0x00800000 | 2183 | #define TG3_FLAG_JUMBO_RING_ENABLE 0x00800000 |
2177 | #define TG3_FLAG_10_100_ONLY 0x01000000 | 2184 | #define TG3_FLAG_10_100_ONLY 0x01000000 |
@@ -2184,7 +2191,7 @@ struct tg3 { | |||
2184 | #define TG3_FLAG_INIT_COMPLETE 0x80000000 | 2191 | #define TG3_FLAG_INIT_COMPLETE 0x80000000 |
2185 | u32 tg3_flags2; | 2192 | u32 tg3_flags2; |
2186 | #define TG3_FLG2_RESTART_TIMER 0x00000001 | 2193 | #define TG3_FLG2_RESTART_TIMER 0x00000001 |
2187 | #define TG3_FLG2_SUN_570X 0x00000002 | 2194 | /* 0x00000002 available */ |
2188 | #define TG3_FLG2_NO_ETH_WIRE_SPEED 0x00000004 | 2195 | #define TG3_FLG2_NO_ETH_WIRE_SPEED 0x00000004 |
2189 | #define TG3_FLG2_IS_5788 0x00000008 | 2196 | #define TG3_FLG2_IS_5788 0x00000008 |
2190 | #define TG3_FLG2_MAX_RXPEND_64 0x00000010 | 2197 | #define TG3_FLG2_MAX_RXPEND_64 0x00000010 |
@@ -2216,6 +2223,7 @@ struct tg3 { | |||
2216 | #define TG3_FLG2_HW_TSO (TG3_FLG2_HW_TSO_1 | TG3_FLG2_HW_TSO_2) | 2223 | #define TG3_FLG2_HW_TSO (TG3_FLG2_HW_TSO_1 | TG3_FLG2_HW_TSO_2) |
2217 | #define TG3_FLG2_1SHOT_MSI 0x10000000 | 2224 | #define TG3_FLG2_1SHOT_MSI 0x10000000 |
2218 | #define TG3_FLG2_PHY_JITTER_BUG 0x20000000 | 2225 | #define TG3_FLG2_PHY_JITTER_BUG 0x20000000 |
2226 | #define TG3_FLG2_NO_FWARE_REPORTED 0x40000000 | ||
2219 | 2227 | ||
2220 | u32 split_mode_max_reqs; | 2228 | u32 split_mode_max_reqs; |
2221 | #define SPLIT_MODE_5704_MAX_REQ 3 | 2229 | #define SPLIT_MODE_5704_MAX_REQ 3 |
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c index e3dd144d326b..5f743b972949 100644 --- a/drivers/net/tulip/de2104x.c +++ b/drivers/net/tulip/de2104x.c | |||
@@ -227,12 +227,12 @@ enum { | |||
227 | SROMC0InfoLeaf = 27, | 227 | SROMC0InfoLeaf = 27, |
228 | MediaBlockMask = 0x3f, | 228 | MediaBlockMask = 0x3f, |
229 | MediaCustomCSRs = (1 << 6), | 229 | MediaCustomCSRs = (1 << 6), |
230 | 230 | ||
231 | /* PCIPM bits */ | 231 | /* PCIPM bits */ |
232 | PM_Sleep = (1 << 31), | 232 | PM_Sleep = (1 << 31), |
233 | PM_Snooze = (1 << 30), | 233 | PM_Snooze = (1 << 30), |
234 | PM_Mask = PM_Sleep | PM_Snooze, | 234 | PM_Mask = PM_Sleep | PM_Snooze, |
235 | 235 | ||
236 | /* SIAStatus bits */ | 236 | /* SIAStatus bits */ |
237 | NWayState = (1 << 14) | (1 << 13) | (1 << 12), | 237 | NWayState = (1 << 14) | (1 << 13) | (1 << 12), |
238 | NWayRestart = (1 << 12), | 238 | NWayRestart = (1 << 12), |
@@ -858,7 +858,7 @@ static void de_stop_rxtx (struct de_private *de) | |||
858 | return; | 858 | return; |
859 | cpu_relax(); | 859 | cpu_relax(); |
860 | } | 860 | } |
861 | 861 | ||
862 | printk(KERN_WARNING "%s: timeout expired stopping DMA\n", de->dev->name); | 862 | printk(KERN_WARNING "%s: timeout expired stopping DMA\n", de->dev->name); |
863 | } | 863 | } |
864 | 864 | ||
@@ -931,7 +931,7 @@ static void de_set_media (struct de_private *de) | |||
931 | macmode |= FullDuplex; | 931 | macmode |= FullDuplex; |
932 | else | 932 | else |
933 | macmode &= ~FullDuplex; | 933 | macmode &= ~FullDuplex; |
934 | 934 | ||
935 | if (netif_msg_link(de)) { | 935 | if (netif_msg_link(de)) { |
936 | printk(KERN_INFO "%s: set link %s\n" | 936 | printk(KERN_INFO "%s: set link %s\n" |
937 | KERN_INFO "%s: mode 0x%x, sia 0x%x,0x%x,0x%x,0x%x\n" | 937 | KERN_INFO "%s: mode 0x%x, sia 0x%x,0x%x,0x%x,0x%x\n" |
@@ -966,9 +966,9 @@ static void de21040_media_timer (unsigned long data) | |||
966 | u32 status = dr32(SIAStatus); | 966 | u32 status = dr32(SIAStatus); |
967 | unsigned int carrier; | 967 | unsigned int carrier; |
968 | unsigned long flags; | 968 | unsigned long flags; |
969 | 969 | ||
970 | carrier = (status & NetCxnErr) ? 0 : 1; | 970 | carrier = (status & NetCxnErr) ? 0 : 1; |
971 | 971 | ||
972 | if (carrier) { | 972 | if (carrier) { |
973 | if (de->media_type != DE_MEDIA_AUI && (status & LinkFailStatus)) | 973 | if (de->media_type != DE_MEDIA_AUI && (status & LinkFailStatus)) |
974 | goto no_link_yet; | 974 | goto no_link_yet; |
@@ -985,7 +985,7 @@ static void de21040_media_timer (unsigned long data) | |||
985 | return; | 985 | return; |
986 | } | 986 | } |
987 | 987 | ||
988 | de_link_down(de); | 988 | de_link_down(de); |
989 | 989 | ||
990 | if (de->media_lock) | 990 | if (de->media_lock) |
991 | return; | 991 | return; |
@@ -1039,7 +1039,7 @@ static unsigned int de_ok_to_advertise (struct de_private *de, u32 new_media) | |||
1039 | return 0; | 1039 | return 0; |
1040 | break; | 1040 | break; |
1041 | } | 1041 | } |
1042 | 1042 | ||
1043 | return 1; | 1043 | return 1; |
1044 | } | 1044 | } |
1045 | 1045 | ||
@@ -1050,9 +1050,9 @@ static void de21041_media_timer (unsigned long data) | |||
1050 | u32 status = dr32(SIAStatus); | 1050 | u32 status = dr32(SIAStatus); |
1051 | unsigned int carrier; | 1051 | unsigned int carrier; |
1052 | unsigned long flags; | 1052 | unsigned long flags; |
1053 | 1053 | ||
1054 | carrier = (status & NetCxnErr) ? 0 : 1; | 1054 | carrier = (status & NetCxnErr) ? 0 : 1; |
1055 | 1055 | ||
1056 | if (carrier) { | 1056 | if (carrier) { |
1057 | if ((de->media_type == DE_MEDIA_TP_AUTO || | 1057 | if ((de->media_type == DE_MEDIA_TP_AUTO || |
1058 | de->media_type == DE_MEDIA_TP || | 1058 | de->media_type == DE_MEDIA_TP || |
@@ -1072,7 +1072,7 @@ static void de21041_media_timer (unsigned long data) | |||
1072 | return; | 1072 | return; |
1073 | } | 1073 | } |
1074 | 1074 | ||
1075 | de_link_down(de); | 1075 | de_link_down(de); |
1076 | 1076 | ||
1077 | /* if media type locked, don't switch media */ | 1077 | /* if media type locked, don't switch media */ |
1078 | if (de->media_lock) | 1078 | if (de->media_lock) |
@@ -1124,7 +1124,7 @@ static void de21041_media_timer (unsigned long data) | |||
1124 | u32 next_states[] = { DE_MEDIA_AUI, DE_MEDIA_BNC, DE_MEDIA_TP_AUTO }; | 1124 | u32 next_states[] = { DE_MEDIA_AUI, DE_MEDIA_BNC, DE_MEDIA_TP_AUTO }; |
1125 | de_next_media(de, next_states, ARRAY_SIZE(next_states)); | 1125 | de_next_media(de, next_states, ARRAY_SIZE(next_states)); |
1126 | } | 1126 | } |
1127 | 1127 | ||
1128 | set_media: | 1128 | set_media: |
1129 | spin_lock_irqsave(&de->lock, flags); | 1129 | spin_lock_irqsave(&de->lock, flags); |
1130 | de_stop_rxtx(de); | 1130 | de_stop_rxtx(de); |
@@ -1148,7 +1148,7 @@ static void de_media_interrupt (struct de_private *de, u32 status) | |||
1148 | mod_timer(&de->media_timer, jiffies + DE_TIMER_LINK); | 1148 | mod_timer(&de->media_timer, jiffies + DE_TIMER_LINK); |
1149 | return; | 1149 | return; |
1150 | } | 1150 | } |
1151 | 1151 | ||
1152 | BUG_ON(!(status & LinkFail)); | 1152 | BUG_ON(!(status & LinkFail)); |
1153 | 1153 | ||
1154 | if (netif_carrier_ok(de->dev)) { | 1154 | if (netif_carrier_ok(de->dev)) { |
@@ -1227,7 +1227,7 @@ static int de_init_hw (struct de_private *de) | |||
1227 | int rc; | 1227 | int rc; |
1228 | 1228 | ||
1229 | de_adapter_wake(de); | 1229 | de_adapter_wake(de); |
1230 | 1230 | ||
1231 | macmode = dr32(MacMode) & ~MacModeClear; | 1231 | macmode = dr32(MacMode) & ~MacModeClear; |
1232 | 1232 | ||
1233 | rc = de_reset_mac(de); | 1233 | rc = de_reset_mac(de); |
@@ -1413,7 +1413,7 @@ static int de_close (struct net_device *dev) | |||
1413 | netif_stop_queue(dev); | 1413 | netif_stop_queue(dev); |
1414 | netif_carrier_off(dev); | 1414 | netif_carrier_off(dev); |
1415 | spin_unlock_irqrestore(&de->lock, flags); | 1415 | spin_unlock_irqrestore(&de->lock, flags); |
1416 | 1416 | ||
1417 | free_irq(dev->irq, dev); | 1417 | free_irq(dev->irq, dev); |
1418 | 1418 | ||
1419 | de_free_rings(de); | 1419 | de_free_rings(de); |
@@ -1441,7 +1441,7 @@ static void de_tx_timeout (struct net_device *dev) | |||
1441 | 1441 | ||
1442 | spin_unlock_irq(&de->lock); | 1442 | spin_unlock_irq(&de->lock); |
1443 | enable_irq(dev->irq); | 1443 | enable_irq(dev->irq); |
1444 | 1444 | ||
1445 | /* Update the error counts. */ | 1445 | /* Update the error counts. */ |
1446 | __de_get_stats(de); | 1446 | __de_get_stats(de); |
1447 | 1447 | ||
@@ -1451,7 +1451,7 @@ static void de_tx_timeout (struct net_device *dev) | |||
1451 | de_init_rings(de); | 1451 | de_init_rings(de); |
1452 | 1452 | ||
1453 | de_init_hw(de); | 1453 | de_init_hw(de); |
1454 | 1454 | ||
1455 | netif_wake_queue(dev); | 1455 | netif_wake_queue(dev); |
1456 | } | 1456 | } |
1457 | 1457 | ||
@@ -1459,7 +1459,7 @@ static void __de_get_regs(struct de_private *de, u8 *buf) | |||
1459 | { | 1459 | { |
1460 | int i; | 1460 | int i; |
1461 | u32 *rbuf = (u32 *)buf; | 1461 | u32 *rbuf = (u32 *)buf; |
1462 | 1462 | ||
1463 | /* read all CSRs */ | 1463 | /* read all CSRs */ |
1464 | for (i = 0; i < DE_NUM_REGS; i++) | 1464 | for (i = 0; i < DE_NUM_REGS; i++) |
1465 | rbuf[i] = dr32(i * 8); | 1465 | rbuf[i] = dr32(i * 8); |
@@ -1474,7 +1474,7 @@ static int __de_get_settings(struct de_private *de, struct ethtool_cmd *ecmd) | |||
1474 | ecmd->transceiver = XCVR_INTERNAL; | 1474 | ecmd->transceiver = XCVR_INTERNAL; |
1475 | ecmd->phy_address = 0; | 1475 | ecmd->phy_address = 0; |
1476 | ecmd->advertising = de->media_advertise; | 1476 | ecmd->advertising = de->media_advertise; |
1477 | 1477 | ||
1478 | switch (de->media_type) { | 1478 | switch (de->media_type) { |
1479 | case DE_MEDIA_AUI: | 1479 | case DE_MEDIA_AUI: |
1480 | ecmd->port = PORT_AUI; | 1480 | ecmd->port = PORT_AUI; |
@@ -1489,7 +1489,7 @@ static int __de_get_settings(struct de_private *de, struct ethtool_cmd *ecmd) | |||
1489 | ecmd->speed = SPEED_10; | 1489 | ecmd->speed = SPEED_10; |
1490 | break; | 1490 | break; |
1491 | } | 1491 | } |
1492 | 1492 | ||
1493 | if (dr32(MacMode) & FullDuplex) | 1493 | if (dr32(MacMode) & FullDuplex) |
1494 | ecmd->duplex = DUPLEX_FULL; | 1494 | ecmd->duplex = DUPLEX_FULL; |
1495 | else | 1495 | else |
@@ -1529,7 +1529,7 @@ static int __de_set_settings(struct de_private *de, struct ethtool_cmd *ecmd) | |||
1529 | if (ecmd->autoneg == AUTONEG_ENABLE && | 1529 | if (ecmd->autoneg == AUTONEG_ENABLE && |
1530 | (!(ecmd->advertising & ADVERTISED_Autoneg))) | 1530 | (!(ecmd->advertising & ADVERTISED_Autoneg))) |
1531 | return -EINVAL; | 1531 | return -EINVAL; |
1532 | 1532 | ||
1533 | switch (ecmd->port) { | 1533 | switch (ecmd->port) { |
1534 | case PORT_AUI: | 1534 | case PORT_AUI: |
1535 | new_media = DE_MEDIA_AUI; | 1535 | new_media = DE_MEDIA_AUI; |
@@ -1554,22 +1554,22 @@ static int __de_set_settings(struct de_private *de, struct ethtool_cmd *ecmd) | |||
1554 | return -EINVAL; | 1554 | return -EINVAL; |
1555 | break; | 1555 | break; |
1556 | } | 1556 | } |
1557 | 1557 | ||
1558 | media_lock = (ecmd->autoneg == AUTONEG_ENABLE) ? 0 : 1; | 1558 | media_lock = (ecmd->autoneg == AUTONEG_ENABLE) ? 0 : 1; |
1559 | 1559 | ||
1560 | if ((new_media == de->media_type) && | 1560 | if ((new_media == de->media_type) && |
1561 | (media_lock == de->media_lock) && | 1561 | (media_lock == de->media_lock) && |
1562 | (ecmd->advertising == de->media_advertise)) | 1562 | (ecmd->advertising == de->media_advertise)) |
1563 | return 0; /* nothing to change */ | 1563 | return 0; /* nothing to change */ |
1564 | 1564 | ||
1565 | de_link_down(de); | 1565 | de_link_down(de); |
1566 | de_stop_rxtx(de); | 1566 | de_stop_rxtx(de); |
1567 | 1567 | ||
1568 | de->media_type = new_media; | 1568 | de->media_type = new_media; |
1569 | de->media_lock = media_lock; | 1569 | de->media_lock = media_lock; |
1570 | de->media_advertise = ecmd->advertising; | 1570 | de->media_advertise = ecmd->advertising; |
1571 | de_set_media(de); | 1571 | de_set_media(de); |
1572 | 1572 | ||
1573 | return 0; | 1573 | return 0; |
1574 | } | 1574 | } |
1575 | 1575 | ||
@@ -1817,7 +1817,7 @@ static void __init de21041_get_srom_info (struct de_private *de) | |||
1817 | case 0x0204: de->media_type = DE_MEDIA_TP_FD; break; | 1817 | case 0x0204: de->media_type = DE_MEDIA_TP_FD; break; |
1818 | default: de->media_type = DE_MEDIA_TP_AUTO; break; | 1818 | default: de->media_type = DE_MEDIA_TP_AUTO; break; |
1819 | } | 1819 | } |
1820 | 1820 | ||
1821 | if (netif_msg_probe(de)) | 1821 | if (netif_msg_probe(de)) |
1822 | printk(KERN_INFO "de%d: SROM leaf offset %u, default media %s\n", | 1822 | printk(KERN_INFO "de%d: SROM leaf offset %u, default media %s\n", |
1823 | de->board_idx, ofs, | 1823 | de->board_idx, ofs, |
@@ -1886,7 +1886,7 @@ static void __init de21041_get_srom_info (struct de_private *de) | |||
1886 | de->media[idx].csr13, | 1886 | de->media[idx].csr13, |
1887 | de->media[idx].csr14, | 1887 | de->media[idx].csr14, |
1888 | de->media[idx].csr15); | 1888 | de->media[idx].csr15); |
1889 | 1889 | ||
1890 | } else if (netif_msg_probe(de)) | 1890 | } else if (netif_msg_probe(de)) |
1891 | printk("\n"); | 1891 | printk("\n"); |
1892 | 1892 | ||
@@ -2118,7 +2118,7 @@ static int de_suspend (struct pci_dev *pdev, pm_message_t state) | |||
2118 | 2118 | ||
2119 | spin_unlock_irq(&de->lock); | 2119 | spin_unlock_irq(&de->lock); |
2120 | enable_irq(dev->irq); | 2120 | enable_irq(dev->irq); |
2121 | 2121 | ||
2122 | /* Update the error counts. */ | 2122 | /* Update the error counts. */ |
2123 | __de_get_stats(de); | 2123 | __de_get_stats(de); |
2124 | 2124 | ||
diff --git a/drivers/net/tulip/de4x5.c b/drivers/net/tulip/de4x5.c index f56094102042..da8bd0d62a3f 100644 --- a/drivers/net/tulip/de4x5.c +++ b/drivers/net/tulip/de4x5.c | |||
@@ -41,11 +41,11 @@ | |||
41 | Digital Semiconductor SROM Specification. The driver currently | 41 | Digital Semiconductor SROM Specification. The driver currently |
42 | recognises the following chips: | 42 | recognises the following chips: |
43 | 43 | ||
44 | DC21040 (no SROM) | 44 | DC21040 (no SROM) |
45 | DC21041[A] | 45 | DC21041[A] |
46 | DC21140[A] | 46 | DC21140[A] |
47 | DC21142 | 47 | DC21142 |
48 | DC21143 | 48 | DC21143 |
49 | 49 | ||
50 | So far the driver is known to work with the following cards: | 50 | So far the driver is known to work with the following cards: |
51 | 51 | ||
@@ -55,7 +55,7 @@ | |||
55 | SMC8432 | 55 | SMC8432 |
56 | SMC9332 (w/new SROM) | 56 | SMC9332 (w/new SROM) |
57 | ZNYX31[45] | 57 | ZNYX31[45] |
58 | ZNYX346 10/100 4 port (can act as a 10/100 bridge!) | 58 | ZNYX346 10/100 4 port (can act as a 10/100 bridge!) |
59 | 59 | ||
60 | The driver has been tested on a relatively busy network using the DE425, | 60 | The driver has been tested on a relatively busy network using the DE425, |
61 | DE434, DE435 and DE500 cards and benchmarked with 'ttcp': it transferred | 61 | DE434, DE435 and DE500 cards and benchmarked with 'ttcp': it transferred |
@@ -106,7 +106,7 @@ | |||
106 | loading by: | 106 | loading by: |
107 | 107 | ||
108 | insmod de4x5 io=0xghh where g = bus number | 108 | insmod de4x5 io=0xghh where g = bus number |
109 | hh = device number | 109 | hh = device number |
110 | 110 | ||
111 | NB: autoprobing for modules is now supported by default. You may just | 111 | NB: autoprobing for modules is now supported by default. You may just |
112 | use: | 112 | use: |
@@ -120,11 +120,11 @@ | |||
120 | 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a | 120 | 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a |
121 | kernel with the de4x5 configuration turned off and reboot. | 121 | kernel with the de4x5 configuration turned off and reboot. |
122 | 5) insmod de4x5 [io=0xghh] | 122 | 5) insmod de4x5 [io=0xghh] |
123 | 6) run the net startup bits for your new eth?? interface(s) manually | 123 | 6) run the net startup bits for your new eth?? interface(s) manually |
124 | (usually /etc/rc.inet[12] at boot time). | 124 | (usually /etc/rc.inet[12] at boot time). |
125 | 7) enjoy! | 125 | 7) enjoy! |
126 | 126 | ||
127 | To unload a module, turn off the associated interface(s) | 127 | To unload a module, turn off the associated interface(s) |
128 | 'ifconfig eth?? down' then 'rmmod de4x5'. | 128 | 'ifconfig eth?? down' then 'rmmod de4x5'. |
129 | 129 | ||
130 | Automedia detection is included so that in principal you can disconnect | 130 | Automedia detection is included so that in principal you can disconnect |
@@ -135,7 +135,7 @@ | |||
135 | By default, the driver will now autodetect any DECchip based card. | 135 | By default, the driver will now autodetect any DECchip based card. |
136 | Should you have a need to restrict the driver to DIGITAL only cards, you | 136 | Should you have a need to restrict the driver to DIGITAL only cards, you |
137 | can compile with a DEC_ONLY define, or if loading as a module, use the | 137 | can compile with a DEC_ONLY define, or if loading as a module, use the |
138 | 'dec_only=1' parameter. | 138 | 'dec_only=1' parameter. |
139 | 139 | ||
140 | I've changed the timing routines to use the kernel timer and scheduling | 140 | I've changed the timing routines to use the kernel timer and scheduling |
141 | functions so that the hangs and other assorted problems that occurred | 141 | functions so that the hangs and other assorted problems that occurred |
@@ -204,7 +204,7 @@ | |||
204 | following parameters are allowed: | 204 | following parameters are allowed: |
205 | 205 | ||
206 | fdx for full duplex | 206 | fdx for full duplex |
207 | autosense to set the media/speed; with the following | 207 | autosense to set the media/speed; with the following |
208 | sub-parameters: | 208 | sub-parameters: |
209 | TP, TP_NW, BNC, AUI, BNC_AUI, 100Mb, 10Mb, AUTO | 209 | TP, TP_NW, BNC, AUI, BNC_AUI, 100Mb, 10Mb, AUTO |
210 | 210 | ||
@@ -235,14 +235,14 @@ | |||
235 | this automatically or include #define DE4X5_FORCE_EISA on or before | 235 | this automatically or include #define DE4X5_FORCE_EISA on or before |
236 | line 1040 in the driver. | 236 | line 1040 in the driver. |
237 | 237 | ||
238 | TO DO: | 238 | TO DO: |
239 | ------ | 239 | ------ |
240 | 240 | ||
241 | Revision History | 241 | Revision History |
242 | ---------------- | 242 | ---------------- |
243 | 243 | ||
244 | Version Date Description | 244 | Version Date Description |
245 | 245 | ||
246 | 0.1 17-Nov-94 Initial writing. ALPHA code release. | 246 | 0.1 17-Nov-94 Initial writing. ALPHA code release. |
247 | 0.2 13-Jan-95 Added PCI support for DE435's. | 247 | 0.2 13-Jan-95 Added PCI support for DE435's. |
248 | 0.21 19-Jan-95 Added auto media detection. | 248 | 0.21 19-Jan-95 Added auto media detection. |
@@ -251,7 +251,7 @@ | |||
251 | Add request/release_region code. | 251 | Add request/release_region code. |
252 | Add loadable modules support for PCI. | 252 | Add loadable modules support for PCI. |
253 | Clean up loadable modules support. | 253 | Clean up loadable modules support. |
254 | 0.23 28-Feb-95 Added DC21041 and DC21140 support. | 254 | 0.23 28-Feb-95 Added DC21041 and DC21140 support. |
255 | Fix missed frame counter value and initialisation. | 255 | Fix missed frame counter value and initialisation. |
256 | Fixed EISA probe. | 256 | Fixed EISA probe. |
257 | 0.24 11-Apr-95 Change delay routine to use <linux/udelay>. | 257 | 0.24 11-Apr-95 Change delay routine to use <linux/udelay>. |
@@ -280,7 +280,7 @@ | |||
280 | Add kernel timer code (h/w is too flaky). | 280 | Add kernel timer code (h/w is too flaky). |
281 | Add MII based PHY autosense. | 281 | Add MII based PHY autosense. |
282 | Add new multicasting code. | 282 | Add new multicasting code. |
283 | Add new autosense algorithms for media/mode | 283 | Add new autosense algorithms for media/mode |
284 | selection using kernel scheduling/timing. | 284 | selection using kernel scheduling/timing. |
285 | Re-formatted. | 285 | Re-formatted. |
286 | Made changes suggested by <jeff@router.patch.net>: | 286 | Made changes suggested by <jeff@router.patch.net>: |
@@ -307,10 +307,10 @@ | |||
307 | Add Accton to the list of broken cards. | 307 | Add Accton to the list of broken cards. |
308 | Fix TX under-run bug for non DC21140 chips. | 308 | Fix TX under-run bug for non DC21140 chips. |
309 | Fix boot command probe bug in alloc_device() as | 309 | Fix boot command probe bug in alloc_device() as |
310 | reported by <koen.gadeyne@barco.com> and | 310 | reported by <koen.gadeyne@barco.com> and |
311 | <orava@nether.tky.hut.fi>. | 311 | <orava@nether.tky.hut.fi>. |
312 | Add cache locks to prevent a race condition as | 312 | Add cache locks to prevent a race condition as |
313 | reported by <csd@microplex.com> and | 313 | reported by <csd@microplex.com> and |
314 | <baba@beckman.uiuc.edu>. | 314 | <baba@beckman.uiuc.edu>. |
315 | Upgraded alloc_device() code. | 315 | Upgraded alloc_device() code. |
316 | 0.431 28-Jun-96 Fix potential bug in queue_pkt() from discussion | 316 | 0.431 28-Jun-96 Fix potential bug in queue_pkt() from discussion |
@@ -322,7 +322,7 @@ | |||
322 | with a loopback packet. | 322 | with a loopback packet. |
323 | 0.442 9-Sep-96 Include AUI in dc21041 media printout. Bug reported | 323 | 0.442 9-Sep-96 Include AUI in dc21041 media printout. Bug reported |
324 | by <bhat@mundook.cs.mu.OZ.AU> | 324 | by <bhat@mundook.cs.mu.OZ.AU> |
325 | 0.45 8-Dec-96 Include endian functions for PPC use, from work | 325 | 0.45 8-Dec-96 Include endian functions for PPC use, from work |
326 | by <cort@cs.nmt.edu> and <g.thomas@opengroup.org>. | 326 | by <cort@cs.nmt.edu> and <g.thomas@opengroup.org>. |
327 | 0.451 28-Dec-96 Added fix to allow autoprobe for modules after | 327 | 0.451 28-Dec-96 Added fix to allow autoprobe for modules after |
328 | suggestion from <mjacob@feral.com>. | 328 | suggestion from <mjacob@feral.com>. |
@@ -346,14 +346,14 @@ | |||
346 | <paubert@iram.es>. | 346 | <paubert@iram.es>. |
347 | 0.52 26-Apr-97 Some changes may not credit the right people - | 347 | 0.52 26-Apr-97 Some changes may not credit the right people - |
348 | a disk crash meant I lost some mail. | 348 | a disk crash meant I lost some mail. |
349 | Change RX interrupt routine to drop rather than | 349 | Change RX interrupt routine to drop rather than |
350 | defer packets to avoid hang reported by | 350 | defer packets to avoid hang reported by |
351 | <g.thomas@opengroup.org>. | 351 | <g.thomas@opengroup.org>. |
352 | Fix srom_exec() to return for COMPACT and type 1 | 352 | Fix srom_exec() to return for COMPACT and type 1 |
353 | infoblocks. | 353 | infoblocks. |
354 | Added DC21142 and DC21143 functions. | 354 | Added DC21142 and DC21143 functions. |
355 | Added byte counters from <phil@tazenda.demon.co.uk> | 355 | Added byte counters from <phil@tazenda.demon.co.uk> |
356 | Added SA_INTERRUPT temporary fix from | 356 | Added SA_INTERRUPT temporary fix from |
357 | <mjacob@feral.com>. | 357 | <mjacob@feral.com>. |
358 | 0.53 12-Nov-97 Fix the *_probe() to include 'eth??' name during | 358 | 0.53 12-Nov-97 Fix the *_probe() to include 'eth??' name during |
359 | module load: bug reported by | 359 | module load: bug reported by |
@@ -363,10 +363,10 @@ | |||
363 | Make above search independent of BIOS device scan | 363 | Make above search independent of BIOS device scan |
364 | direction. | 364 | direction. |
365 | Completed DC2114[23] autosense functions. | 365 | Completed DC2114[23] autosense functions. |
366 | 0.531 21-Dec-97 Fix DE500-XA 100Mb/s bug reported by | 366 | 0.531 21-Dec-97 Fix DE500-XA 100Mb/s bug reported by |
367 | <robin@intercore.com | 367 | <robin@intercore.com |
368 | Fix type1_infoblock() bug introduced in 0.53, from | 368 | Fix type1_infoblock() bug introduced in 0.53, from |
369 | problem reports by | 369 | problem reports by |
370 | <parmee@postecss.ncrfran.france.ncr.com> and | 370 | <parmee@postecss.ncrfran.france.ncr.com> and |
371 | <jo@ice.dillingen.baynet.de>. | 371 | <jo@ice.dillingen.baynet.de>. |
372 | Added argument list to set up each board from either | 372 | Added argument list to set up each board from either |
@@ -374,7 +374,7 @@ | |||
374 | Added generic MII PHY functionality to deal with | 374 | Added generic MII PHY functionality to deal with |
375 | newer PHY chips. | 375 | newer PHY chips. |
376 | Fix the mess in 2.1.67. | 376 | Fix the mess in 2.1.67. |
377 | 0.532 5-Jan-98 Fix bug in mii_get_phy() reported by | 377 | 0.532 5-Jan-98 Fix bug in mii_get_phy() reported by |
378 | <redhat@cococo.net>. | 378 | <redhat@cococo.net>. |
379 | Fix bug in pci_probe() for 64 bit systems reported | 379 | Fix bug in pci_probe() for 64 bit systems reported |
380 | by <belliott@accessone.com>. | 380 | by <belliott@accessone.com>. |
@@ -398,7 +398,7 @@ | |||
398 | version. I hope nothing is broken... | 398 | version. I hope nothing is broken... |
399 | Add TX done interrupt modification from suggestion | 399 | Add TX done interrupt modification from suggestion |
400 | by <Austin.Donnelly@cl.cam.ac.uk>. | 400 | by <Austin.Donnelly@cl.cam.ac.uk>. |
401 | Fix is_anc_capable() bug reported by | 401 | Fix is_anc_capable() bug reported by |
402 | <Austin.Donnelly@cl.cam.ac.uk>. | 402 | <Austin.Donnelly@cl.cam.ac.uk>. |
403 | Fix type[13]_infoblock() bug: during MII search, PHY | 403 | Fix type[13]_infoblock() bug: during MII search, PHY |
404 | lp->rst not run because lp->ibn not initialised - | 404 | lp->rst not run because lp->ibn not initialised - |
@@ -413,7 +413,7 @@ | |||
413 | Add an_exception() for old ZYNX346 and fix compile | 413 | Add an_exception() for old ZYNX346 and fix compile |
414 | warning on PPC & SPARC, from <ecd@skynet.be>. | 414 | warning on PPC & SPARC, from <ecd@skynet.be>. |
415 | Fix lastPCI to correctly work with compiled in | 415 | Fix lastPCI to correctly work with compiled in |
416 | kernels and modules from bug report by | 416 | kernels and modules from bug report by |
417 | <Zlatko.Calusic@CARNet.hr> et al. | 417 | <Zlatko.Calusic@CARNet.hr> et al. |
418 | 0.542 15-Sep-98 Fix dc2114x_autoconf() to stop multiple messages | 418 | 0.542 15-Sep-98 Fix dc2114x_autoconf() to stop multiple messages |
419 | when media is unconnected. | 419 | when media is unconnected. |
@@ -425,7 +425,7 @@ | |||
425 | 0.544 8-May-99 Fix for buggy SROM in Motorola embedded boards using | 425 | 0.544 8-May-99 Fix for buggy SROM in Motorola embedded boards using |
426 | a 21143 by <mmporter@home.com>. | 426 | a 21143 by <mmporter@home.com>. |
427 | Change PCI/EISA bus probing order. | 427 | Change PCI/EISA bus probing order. |
428 | 0.545 28-Nov-99 Further Moto SROM bug fix from | 428 | 0.545 28-Nov-99 Further Moto SROM bug fix from |
429 | <mporter@eng.mcd.mot.com> | 429 | <mporter@eng.mcd.mot.com> |
430 | Remove double checking for DEBUG_RX in de4x5_dbg_rx() | 430 | Remove double checking for DEBUG_RX in de4x5_dbg_rx() |
431 | from report by <geert@linux-m68k.org> | 431 | from report by <geert@linux-m68k.org> |
@@ -434,8 +434,8 @@ | |||
434 | variable 'pb', on a non de4x5 PCI device, in this | 434 | variable 'pb', on a non de4x5 PCI device, in this |
435 | case a PCI bridge (DEC chip 21152). The value of | 435 | case a PCI bridge (DEC chip 21152). The value of |
436 | 'pb' is now only initialized if a de4x5 chip is | 436 | 'pb' is now only initialized if a de4x5 chip is |
437 | present. | 437 | present. |
438 | <france@handhelds.org> | 438 | <france@handhelds.org> |
439 | 0.547 08-Nov-01 Use library crc32 functions by <Matt_Domsch@dell.com> | 439 | 0.547 08-Nov-01 Use library crc32 functions by <Matt_Domsch@dell.com> |
440 | 0.548 30-Aug-03 Big 2.6 cleanup. Ported to PCI/EISA probing and | 440 | 0.548 30-Aug-03 Big 2.6 cleanup. Ported to PCI/EISA probing and |
441 | generic DMA APIs. Fixed DE425 support on Alpha. | 441 | generic DMA APIs. Fixed DE425 support on Alpha. |
@@ -584,7 +584,7 @@ static int de4x5_debug = (DEBUG_MEDIA | DEBUG_VERSION); | |||
584 | 584 | ||
585 | /* | 585 | /* |
586 | ** Allow per adapter set up. For modules this is simply a command line | 586 | ** Allow per adapter set up. For modules this is simply a command line |
587 | ** parameter, e.g.: | 587 | ** parameter, e.g.: |
588 | ** insmod de4x5 args='eth1:fdx autosense=BNC eth0:autosense=100Mb'. | 588 | ** insmod de4x5 args='eth1:fdx autosense=BNC eth0:autosense=100Mb'. |
589 | ** | 589 | ** |
590 | ** For a compiled in driver, place e.g. | 590 | ** For a compiled in driver, place e.g. |
@@ -655,7 +655,7 @@ static c_char *de4x5_signatures[] = DE4X5_SIGNATURE; | |||
655 | ** Memory Alignment. Each descriptor is 4 longwords long. To force a | 655 | ** Memory Alignment. Each descriptor is 4 longwords long. To force a |
656 | ** particular alignment on the TX descriptor, adjust DESC_SKIP_LEN and | 656 | ** particular alignment on the TX descriptor, adjust DESC_SKIP_LEN and |
657 | ** DESC_ALIGN. ALIGN aligns the start address of the private memory area | 657 | ** DESC_ALIGN. ALIGN aligns the start address of the private memory area |
658 | ** and hence the RX descriptor ring's first entry. | 658 | ** and hence the RX descriptor ring's first entry. |
659 | */ | 659 | */ |
660 | #define DE4X5_ALIGN4 ((u_long)4 - 1) /* 1 longword align */ | 660 | #define DE4X5_ALIGN4 ((u_long)4 - 1) /* 1 longword align */ |
661 | #define DE4X5_ALIGN8 ((u_long)8 - 1) /* 2 longword align */ | 661 | #define DE4X5_ALIGN8 ((u_long)8 - 1) /* 2 longword align */ |
@@ -1081,8 +1081,8 @@ static int (*dc_infoblock[])(struct net_device *dev, u_char, u_char *) = { | |||
1081 | mdelay(2); /* Wait for 2ms */\ | 1081 | mdelay(2); /* Wait for 2ms */\ |
1082 | } | 1082 | } |
1083 | 1083 | ||
1084 | 1084 | ||
1085 | static int __devinit | 1085 | static int __devinit |
1086 | de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) | 1086 | de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) |
1087 | { | 1087 | { |
1088 | char name[DE4X5_NAME_LENGTH + 1]; | 1088 | char name[DE4X5_NAME_LENGTH + 1]; |
@@ -1102,12 +1102,12 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) | |||
1102 | mdelay(10); | 1102 | mdelay(10); |
1103 | 1103 | ||
1104 | RESET_DE4X5; | 1104 | RESET_DE4X5; |
1105 | 1105 | ||
1106 | if ((inl(DE4X5_STS) & (STS_TS | STS_RS)) != 0) { | 1106 | if ((inl(DE4X5_STS) & (STS_TS | STS_RS)) != 0) { |
1107 | return -ENXIO; /* Hardware could not reset */ | 1107 | return -ENXIO; /* Hardware could not reset */ |
1108 | } | 1108 | } |
1109 | 1109 | ||
1110 | /* | 1110 | /* |
1111 | ** Now find out what kind of DC21040/DC21041/DC21140 board we have. | 1111 | ** Now find out what kind of DC21040/DC21041/DC21140 board we have. |
1112 | */ | 1112 | */ |
1113 | lp->useSROM = FALSE; | 1113 | lp->useSROM = FALSE; |
@@ -1116,21 +1116,21 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) | |||
1116 | } else { | 1116 | } else { |
1117 | EISA_signature(name, gendev); | 1117 | EISA_signature(name, gendev); |
1118 | } | 1118 | } |
1119 | 1119 | ||
1120 | if (*name == '\0') { /* Not found a board signature */ | 1120 | if (*name == '\0') { /* Not found a board signature */ |
1121 | return -ENXIO; | 1121 | return -ENXIO; |
1122 | } | 1122 | } |
1123 | 1123 | ||
1124 | dev->base_addr = iobase; | 1124 | dev->base_addr = iobase; |
1125 | printk ("%s: %s at 0x%04lx", gendev->bus_id, name, iobase); | 1125 | printk ("%s: %s at 0x%04lx", gendev->bus_id, name, iobase); |
1126 | 1126 | ||
1127 | printk(", h/w address "); | 1127 | printk(", h/w address "); |
1128 | status = get_hw_addr(dev); | 1128 | status = get_hw_addr(dev); |
1129 | for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */ | 1129 | for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */ |
1130 | printk("%2.2x:", dev->dev_addr[i]); | 1130 | printk("%2.2x:", dev->dev_addr[i]); |
1131 | } | 1131 | } |
1132 | printk("%2.2x,\n", dev->dev_addr[i]); | 1132 | printk("%2.2x,\n", dev->dev_addr[i]); |
1133 | 1133 | ||
1134 | if (status != 0) { | 1134 | if (status != 0) { |
1135 | printk(" which has an Ethernet PROM CRC error.\n"); | 1135 | printk(" which has an Ethernet PROM CRC error.\n"); |
1136 | return -ENXIO; | 1136 | return -ENXIO; |
@@ -1171,10 +1171,10 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) | |||
1171 | } | 1171 | } |
1172 | 1172 | ||
1173 | lp->tx_ring = lp->rx_ring + NUM_RX_DESC; | 1173 | lp->tx_ring = lp->rx_ring + NUM_RX_DESC; |
1174 | 1174 | ||
1175 | /* | 1175 | /* |
1176 | ** Set up the RX descriptor ring (Intels) | 1176 | ** Set up the RX descriptor ring (Intels) |
1177 | ** Allocate contiguous receive buffers, long word aligned (Alphas) | 1177 | ** Allocate contiguous receive buffers, long word aligned (Alphas) |
1178 | */ | 1178 | */ |
1179 | #if !defined(__alpha__) && !defined(__powerpc__) && !defined(__sparc_v9__) && !defined(DE4X5_DO_MEMCPY) | 1179 | #if !defined(__alpha__) && !defined(__powerpc__) && !defined(__sparc_v9__) && !defined(DE4X5_DO_MEMCPY) |
1180 | for (i=0; i<NUM_RX_DESC; i++) { | 1180 | for (i=0; i<NUM_RX_DESC; i++) { |
@@ -1210,7 +1210,7 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) | |||
1210 | 1210 | ||
1211 | lp->rxRingSize = NUM_RX_DESC; | 1211 | lp->rxRingSize = NUM_RX_DESC; |
1212 | lp->txRingSize = NUM_TX_DESC; | 1212 | lp->txRingSize = NUM_TX_DESC; |
1213 | 1213 | ||
1214 | /* Write the end of list marker to the descriptor lists */ | 1214 | /* Write the end of list marker to the descriptor lists */ |
1215 | lp->rx_ring[lp->rxRingSize - 1].des1 |= cpu_to_le32(RD_RER); | 1215 | lp->rx_ring[lp->rxRingSize - 1].des1 |= cpu_to_le32(RD_RER); |
1216 | lp->tx_ring[lp->txRingSize - 1].des1 |= cpu_to_le32(TD_TER); | 1216 | lp->tx_ring[lp->txRingSize - 1].des1 |= cpu_to_le32(TD_TER); |
@@ -1219,7 +1219,7 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) | |||
1219 | outl(lp->dma_rings, DE4X5_RRBA); | 1219 | outl(lp->dma_rings, DE4X5_RRBA); |
1220 | outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), | 1220 | outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), |
1221 | DE4X5_TRBA); | 1221 | DE4X5_TRBA); |
1222 | 1222 | ||
1223 | /* Initialise the IRQ mask and Enable/Disable */ | 1223 | /* Initialise the IRQ mask and Enable/Disable */ |
1224 | lp->irq_mask = IMR_RIM | IMR_TIM | IMR_TUM | IMR_UNM; | 1224 | lp->irq_mask = IMR_RIM | IMR_TIM | IMR_TUM | IMR_UNM; |
1225 | lp->irq_en = IMR_NIM | IMR_AIM; | 1225 | lp->irq_en = IMR_NIM | IMR_AIM; |
@@ -1252,7 +1252,7 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) | |||
1252 | if ((lp->chipset != DC21040) && (lp->chipset != DC21041)) { | 1252 | if ((lp->chipset != DC21040) && (lp->chipset != DC21041)) { |
1253 | mii_get_phy(dev); | 1253 | mii_get_phy(dev); |
1254 | } | 1254 | } |
1255 | 1255 | ||
1256 | #ifndef __sparc_v9__ | 1256 | #ifndef __sparc_v9__ |
1257 | printk(" and requires IRQ%d (provided by %s).\n", dev->irq, | 1257 | printk(" and requires IRQ%d (provided by %s).\n", dev->irq, |
1258 | #else | 1258 | #else |
@@ -1260,11 +1260,11 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) | |||
1260 | #endif | 1260 | #endif |
1261 | ((lp->bus == PCI) ? "PCI BIOS" : "EISA CNFG")); | 1261 | ((lp->bus == PCI) ? "PCI BIOS" : "EISA CNFG")); |
1262 | } | 1262 | } |
1263 | 1263 | ||
1264 | if (de4x5_debug & DEBUG_VERSION) { | 1264 | if (de4x5_debug & DEBUG_VERSION) { |
1265 | printk(version); | 1265 | printk(version); |
1266 | } | 1266 | } |
1267 | 1267 | ||
1268 | /* The DE4X5-specific entries in the device structure. */ | 1268 | /* The DE4X5-specific entries in the device structure. */ |
1269 | SET_MODULE_OWNER(dev); | 1269 | SET_MODULE_OWNER(dev); |
1270 | SET_NETDEV_DEV(dev, gendev); | 1270 | SET_NETDEV_DEV(dev, gendev); |
@@ -1274,23 +1274,23 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) | |||
1274 | dev->get_stats = &de4x5_get_stats; | 1274 | dev->get_stats = &de4x5_get_stats; |
1275 | dev->set_multicast_list = &set_multicast_list; | 1275 | dev->set_multicast_list = &set_multicast_list; |
1276 | dev->do_ioctl = &de4x5_ioctl; | 1276 | dev->do_ioctl = &de4x5_ioctl; |
1277 | 1277 | ||
1278 | dev->mem_start = 0; | 1278 | dev->mem_start = 0; |
1279 | 1279 | ||
1280 | /* Fill in the generic fields of the device structure. */ | 1280 | /* Fill in the generic fields of the device structure. */ |
1281 | if ((status = register_netdev (dev))) { | 1281 | if ((status = register_netdev (dev))) { |
1282 | dma_free_coherent (gendev, lp->dma_size, | 1282 | dma_free_coherent (gendev, lp->dma_size, |
1283 | lp->rx_ring, lp->dma_rings); | 1283 | lp->rx_ring, lp->dma_rings); |
1284 | return status; | 1284 | return status; |
1285 | } | 1285 | } |
1286 | 1286 | ||
1287 | /* Let the adapter sleep to save power */ | 1287 | /* Let the adapter sleep to save power */ |
1288 | yawn(dev, SLEEP); | 1288 | yawn(dev, SLEEP); |
1289 | 1289 | ||
1290 | return status; | 1290 | return status; |
1291 | } | 1291 | } |
1292 | 1292 | ||
1293 | 1293 | ||
1294 | static int | 1294 | static int |
1295 | de4x5_open(struct net_device *dev) | 1295 | de4x5_open(struct net_device *dev) |
1296 | { | 1296 | { |
@@ -1312,15 +1312,15 @@ de4x5_open(struct net_device *dev) | |||
1312 | */ | 1312 | */ |
1313 | yawn(dev, WAKEUP); | 1313 | yawn(dev, WAKEUP); |
1314 | 1314 | ||
1315 | /* | 1315 | /* |
1316 | ** Re-initialize the DE4X5... | 1316 | ** Re-initialize the DE4X5... |
1317 | */ | 1317 | */ |
1318 | status = de4x5_init(dev); | 1318 | status = de4x5_init(dev); |
1319 | spin_lock_init(&lp->lock); | 1319 | spin_lock_init(&lp->lock); |
1320 | lp->state = OPEN; | 1320 | lp->state = OPEN; |
1321 | de4x5_dbg_open(dev); | 1321 | de4x5_dbg_open(dev); |
1322 | 1322 | ||
1323 | if (request_irq(dev->irq, (void *)de4x5_interrupt, SA_SHIRQ, | 1323 | if (request_irq(dev->irq, (void *)de4x5_interrupt, SA_SHIRQ, |
1324 | lp->adapter_name, dev)) { | 1324 | lp->adapter_name, dev)) { |
1325 | printk("de4x5_open(): Requested IRQ%d is busy - attemping FAST/SHARE...", dev->irq); | 1325 | printk("de4x5_open(): Requested IRQ%d is busy - attemping FAST/SHARE...", dev->irq); |
1326 | if (request_irq(dev->irq, de4x5_interrupt, SA_INTERRUPT | SA_SHIRQ, | 1326 | if (request_irq(dev->irq, de4x5_interrupt, SA_INTERRUPT | SA_SHIRQ, |
@@ -1340,11 +1340,11 @@ de4x5_open(struct net_device *dev) | |||
1340 | 1340 | ||
1341 | lp->interrupt = UNMASK_INTERRUPTS; | 1341 | lp->interrupt = UNMASK_INTERRUPTS; |
1342 | dev->trans_start = jiffies; | 1342 | dev->trans_start = jiffies; |
1343 | 1343 | ||
1344 | START_DE4X5; | 1344 | START_DE4X5; |
1345 | 1345 | ||
1346 | de4x5_setup_intr(dev); | 1346 | de4x5_setup_intr(dev); |
1347 | 1347 | ||
1348 | if (de4x5_debug & DEBUG_OPEN) { | 1348 | if (de4x5_debug & DEBUG_OPEN) { |
1349 | printk("\tsts: 0x%08x\n", inl(DE4X5_STS)); | 1349 | printk("\tsts: 0x%08x\n", inl(DE4X5_STS)); |
1350 | printk("\tbmr: 0x%08x\n", inl(DE4X5_BMR)); | 1350 | printk("\tbmr: 0x%08x\n", inl(DE4X5_BMR)); |
@@ -1355,7 +1355,7 @@ de4x5_open(struct net_device *dev) | |||
1355 | printk("\tstrr: 0x%08x\n", inl(DE4X5_STRR)); | 1355 | printk("\tstrr: 0x%08x\n", inl(DE4X5_STRR)); |
1356 | printk("\tsigr: 0x%08x\n", inl(DE4X5_SIGR)); | 1356 | printk("\tsigr: 0x%08x\n", inl(DE4X5_SIGR)); |
1357 | } | 1357 | } |
1358 | 1358 | ||
1359 | return status; | 1359 | return status; |
1360 | } | 1360 | } |
1361 | 1361 | ||
@@ -1369,15 +1369,15 @@ de4x5_open(struct net_device *dev) | |||
1369 | */ | 1369 | */ |
1370 | static int | 1370 | static int |
1371 | de4x5_init(struct net_device *dev) | 1371 | de4x5_init(struct net_device *dev) |
1372 | { | 1372 | { |
1373 | /* Lock out other processes whilst setting up the hardware */ | 1373 | /* Lock out other processes whilst setting up the hardware */ |
1374 | netif_stop_queue(dev); | 1374 | netif_stop_queue(dev); |
1375 | 1375 | ||
1376 | de4x5_sw_reset(dev); | 1376 | de4x5_sw_reset(dev); |
1377 | 1377 | ||
1378 | /* Autoconfigure the connected port */ | 1378 | /* Autoconfigure the connected port */ |
1379 | autoconf_media(dev); | 1379 | autoconf_media(dev); |
1380 | 1380 | ||
1381 | return 0; | 1381 | return 0; |
1382 | } | 1382 | } |
1383 | 1383 | ||
@@ -1388,7 +1388,7 @@ de4x5_sw_reset(struct net_device *dev) | |||
1388 | u_long iobase = dev->base_addr; | 1388 | u_long iobase = dev->base_addr; |
1389 | int i, j, status = 0; | 1389 | int i, j, status = 0; |
1390 | s32 bmr, omr; | 1390 | s32 bmr, omr; |
1391 | 1391 | ||
1392 | /* Select the MII or SRL port now and RESET the MAC */ | 1392 | /* Select the MII or SRL port now and RESET the MAC */ |
1393 | if (!lp->useSROM) { | 1393 | if (!lp->useSROM) { |
1394 | if (lp->phy[lp->active].id != 0) { | 1394 | if (lp->phy[lp->active].id != 0) { |
@@ -1399,7 +1399,7 @@ de4x5_sw_reset(struct net_device *dev) | |||
1399 | de4x5_switch_mac_port(dev); | 1399 | de4x5_switch_mac_port(dev); |
1400 | } | 1400 | } |
1401 | 1401 | ||
1402 | /* | 1402 | /* |
1403 | ** Set the programmable burst length to 8 longwords for all the DC21140 | 1403 | ** Set the programmable burst length to 8 longwords for all the DC21140 |
1404 | ** Fasternet chips and 4 longwords for all others: DMA errors result | 1404 | ** Fasternet chips and 4 longwords for all others: DMA errors result |
1405 | ** without these values. Cache align 16 long. | 1405 | ** without these values. Cache align 16 long. |
@@ -1416,23 +1416,23 @@ de4x5_sw_reset(struct net_device *dev) | |||
1416 | outl(lp->dma_rings, DE4X5_RRBA); | 1416 | outl(lp->dma_rings, DE4X5_RRBA); |
1417 | outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), | 1417 | outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), |
1418 | DE4X5_TRBA); | 1418 | DE4X5_TRBA); |
1419 | 1419 | ||
1420 | lp->rx_new = lp->rx_old = 0; | 1420 | lp->rx_new = lp->rx_old = 0; |
1421 | lp->tx_new = lp->tx_old = 0; | 1421 | lp->tx_new = lp->tx_old = 0; |
1422 | 1422 | ||
1423 | for (i = 0; i < lp->rxRingSize; i++) { | 1423 | for (i = 0; i < lp->rxRingSize; i++) { |
1424 | lp->rx_ring[i].status = cpu_to_le32(R_OWN); | 1424 | lp->rx_ring[i].status = cpu_to_le32(R_OWN); |
1425 | } | 1425 | } |
1426 | 1426 | ||
1427 | for (i = 0; i < lp->txRingSize; i++) { | 1427 | for (i = 0; i < lp->txRingSize; i++) { |
1428 | lp->tx_ring[i].status = cpu_to_le32(0); | 1428 | lp->tx_ring[i].status = cpu_to_le32(0); |
1429 | } | 1429 | } |
1430 | 1430 | ||
1431 | barrier(); | 1431 | barrier(); |
1432 | 1432 | ||
1433 | /* Build the setup frame depending on filtering mode */ | 1433 | /* Build the setup frame depending on filtering mode */ |
1434 | SetMulticastFilter(dev); | 1434 | SetMulticastFilter(dev); |
1435 | 1435 | ||
1436 | load_packet(dev, lp->setup_frame, PERFECT_F|TD_SET|SETUP_FRAME_LEN, (struct sk_buff *)1); | 1436 | load_packet(dev, lp->setup_frame, PERFECT_F|TD_SET|SETUP_FRAME_LEN, (struct sk_buff *)1); |
1437 | outl(omr|OMR_ST, DE4X5_OMR); | 1437 | outl(omr|OMR_ST, DE4X5_OMR); |
1438 | 1438 | ||
@@ -1445,18 +1445,18 @@ de4x5_sw_reset(struct net_device *dev) | |||
1445 | outl(omr, DE4X5_OMR); /* Stop everything! */ | 1445 | outl(omr, DE4X5_OMR); /* Stop everything! */ |
1446 | 1446 | ||
1447 | if (j == 0) { | 1447 | if (j == 0) { |
1448 | printk("%s: Setup frame timed out, status %08x\n", dev->name, | 1448 | printk("%s: Setup frame timed out, status %08x\n", dev->name, |
1449 | inl(DE4X5_STS)); | 1449 | inl(DE4X5_STS)); |
1450 | status = -EIO; | 1450 | status = -EIO; |
1451 | } | 1451 | } |
1452 | 1452 | ||
1453 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; | 1453 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; |
1454 | lp->tx_old = lp->tx_new; | 1454 | lp->tx_old = lp->tx_new; |
1455 | 1455 | ||
1456 | return status; | 1456 | return status; |
1457 | } | 1457 | } |
1458 | 1458 | ||
1459 | /* | 1459 | /* |
1460 | ** Writes a socket buffer address to the next available transmit descriptor. | 1460 | ** Writes a socket buffer address to the next available transmit descriptor. |
1461 | */ | 1461 | */ |
1462 | static int | 1462 | static int |
@@ -1469,9 +1469,9 @@ de4x5_queue_pkt(struct sk_buff *skb, struct net_device *dev) | |||
1469 | 1469 | ||
1470 | netif_stop_queue(dev); | 1470 | netif_stop_queue(dev); |
1471 | if (lp->tx_enable == NO) { /* Cannot send for now */ | 1471 | if (lp->tx_enable == NO) { /* Cannot send for now */ |
1472 | return -1; | 1472 | return -1; |
1473 | } | 1473 | } |
1474 | 1474 | ||
1475 | /* | 1475 | /* |
1476 | ** Clean out the TX ring asynchronously to interrupts - sometimes the | 1476 | ** Clean out the TX ring asynchronously to interrupts - sometimes the |
1477 | ** interrupts are lost by delayed descriptor status updates relative to | 1477 | ** interrupts are lost by delayed descriptor status updates relative to |
@@ -1482,7 +1482,7 @@ de4x5_queue_pkt(struct sk_buff *skb, struct net_device *dev) | |||
1482 | spin_unlock_irqrestore(&lp->lock, flags); | 1482 | spin_unlock_irqrestore(&lp->lock, flags); |
1483 | 1483 | ||
1484 | /* Test if cache is already locked - requeue skb if so */ | 1484 | /* Test if cache is already locked - requeue skb if so */ |
1485 | if (test_and_set_bit(0, (void *)&lp->cache.lock) && !lp->interrupt) | 1485 | if (test_and_set_bit(0, (void *)&lp->cache.lock) && !lp->interrupt) |
1486 | return -1; | 1486 | return -1; |
1487 | 1487 | ||
1488 | /* Transmit descriptor ring full or stale skb */ | 1488 | /* Transmit descriptor ring full or stale skb */ |
@@ -1509,10 +1509,10 @@ de4x5_queue_pkt(struct sk_buff *skb, struct net_device *dev) | |||
1509 | load_packet(dev, skb->data, TD_IC | TD_LS | TD_FS | skb->len, skb); | 1509 | load_packet(dev, skb->data, TD_IC | TD_LS | TD_FS | skb->len, skb); |
1510 | lp->stats.tx_bytes += skb->len; | 1510 | lp->stats.tx_bytes += skb->len; |
1511 | outl(POLL_DEMAND, DE4X5_TPD);/* Start the TX */ | 1511 | outl(POLL_DEMAND, DE4X5_TPD);/* Start the TX */ |
1512 | 1512 | ||
1513 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; | 1513 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; |
1514 | dev->trans_start = jiffies; | 1514 | dev->trans_start = jiffies; |
1515 | 1515 | ||
1516 | if (TX_BUFFS_AVAIL) { | 1516 | if (TX_BUFFS_AVAIL) { |
1517 | netif_start_queue(dev); /* Another pkt may be queued */ | 1517 | netif_start_queue(dev); /* Another pkt may be queued */ |
1518 | } | 1518 | } |
@@ -1521,15 +1521,15 @@ de4x5_queue_pkt(struct sk_buff *skb, struct net_device *dev) | |||
1521 | } | 1521 | } |
1522 | if (skb) de4x5_putb_cache(dev, skb); | 1522 | if (skb) de4x5_putb_cache(dev, skb); |
1523 | } | 1523 | } |
1524 | 1524 | ||
1525 | lp->cache.lock = 0; | 1525 | lp->cache.lock = 0; |
1526 | 1526 | ||
1527 | return status; | 1527 | return status; |
1528 | } | 1528 | } |
1529 | 1529 | ||
1530 | /* | 1530 | /* |
1531 | ** The DE4X5 interrupt handler. | 1531 | ** The DE4X5 interrupt handler. |
1532 | ** | 1532 | ** |
1533 | ** I/O Read/Writes through intermediate PCI bridges are never 'posted', | 1533 | ** I/O Read/Writes through intermediate PCI bridges are never 'posted', |
1534 | ** so that the asserted interrupt always has some real data to work with - | 1534 | ** so that the asserted interrupt always has some real data to work with - |
1535 | ** if these I/O accesses are ever changed to memory accesses, ensure the | 1535 | ** if these I/O accesses are ever changed to memory accesses, ensure the |
@@ -1546,7 +1546,7 @@ de4x5_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
1546 | s32 imr, omr, sts, limit; | 1546 | s32 imr, omr, sts, limit; |
1547 | u_long iobase; | 1547 | u_long iobase; |
1548 | unsigned int handled = 0; | 1548 | unsigned int handled = 0; |
1549 | 1549 | ||
1550 | if (dev == NULL) { | 1550 | if (dev == NULL) { |
1551 | printk ("de4x5_interrupt(): irq %d for unknown device.\n", irq); | 1551 | printk ("de4x5_interrupt(): irq %d for unknown device.\n", irq); |
1552 | return IRQ_NONE; | 1552 | return IRQ_NONE; |
@@ -1554,35 +1554,35 @@ de4x5_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
1554 | lp = netdev_priv(dev); | 1554 | lp = netdev_priv(dev); |
1555 | spin_lock(&lp->lock); | 1555 | spin_lock(&lp->lock); |
1556 | iobase = dev->base_addr; | 1556 | iobase = dev->base_addr; |
1557 | 1557 | ||
1558 | DISABLE_IRQs; /* Ensure non re-entrancy */ | 1558 | DISABLE_IRQs; /* Ensure non re-entrancy */ |
1559 | 1559 | ||
1560 | if (test_and_set_bit(MASK_INTERRUPTS, (void*) &lp->interrupt)) | 1560 | if (test_and_set_bit(MASK_INTERRUPTS, (void*) &lp->interrupt)) |
1561 | printk("%s: Re-entering the interrupt handler.\n", dev->name); | 1561 | printk("%s: Re-entering the interrupt handler.\n", dev->name); |
1562 | 1562 | ||
1563 | synchronize_irq(dev->irq); | 1563 | synchronize_irq(dev->irq); |
1564 | 1564 | ||
1565 | for (limit=0; limit<8; limit++) { | 1565 | for (limit=0; limit<8; limit++) { |
1566 | sts = inl(DE4X5_STS); /* Read IRQ status */ | 1566 | sts = inl(DE4X5_STS); /* Read IRQ status */ |
1567 | outl(sts, DE4X5_STS); /* Reset the board interrupts */ | 1567 | outl(sts, DE4X5_STS); /* Reset the board interrupts */ |
1568 | 1568 | ||
1569 | if (!(sts & lp->irq_mask)) break;/* All done */ | 1569 | if (!(sts & lp->irq_mask)) break;/* All done */ |
1570 | handled = 1; | 1570 | handled = 1; |
1571 | 1571 | ||
1572 | if (sts & (STS_RI | STS_RU)) /* Rx interrupt (packet[s] arrived) */ | 1572 | if (sts & (STS_RI | STS_RU)) /* Rx interrupt (packet[s] arrived) */ |
1573 | de4x5_rx(dev); | 1573 | de4x5_rx(dev); |
1574 | 1574 | ||
1575 | if (sts & (STS_TI | STS_TU)) /* Tx interrupt (packet sent) */ | 1575 | if (sts & (STS_TI | STS_TU)) /* Tx interrupt (packet sent) */ |
1576 | de4x5_tx(dev); | 1576 | de4x5_tx(dev); |
1577 | 1577 | ||
1578 | if (sts & STS_LNF) { /* TP Link has failed */ | 1578 | if (sts & STS_LNF) { /* TP Link has failed */ |
1579 | lp->irq_mask &= ~IMR_LFM; | 1579 | lp->irq_mask &= ~IMR_LFM; |
1580 | } | 1580 | } |
1581 | 1581 | ||
1582 | if (sts & STS_UNF) { /* Transmit underrun */ | 1582 | if (sts & STS_UNF) { /* Transmit underrun */ |
1583 | de4x5_txur(dev); | 1583 | de4x5_txur(dev); |
1584 | } | 1584 | } |
1585 | 1585 | ||
1586 | if (sts & STS_SE) { /* Bus Error */ | 1586 | if (sts & STS_SE) { /* Bus Error */ |
1587 | STOP_DE4X5; | 1587 | STOP_DE4X5; |
1588 | printk("%s: Fatal bus error occurred, sts=%#8x, device stopped.\n", | 1588 | printk("%s: Fatal bus error occurred, sts=%#8x, device stopped.\n", |
@@ -1603,7 +1603,7 @@ de4x5_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
1603 | lp->interrupt = UNMASK_INTERRUPTS; | 1603 | lp->interrupt = UNMASK_INTERRUPTS; |
1604 | ENABLE_IRQs; | 1604 | ENABLE_IRQs; |
1605 | spin_unlock(&lp->lock); | 1605 | spin_unlock(&lp->lock); |
1606 | 1606 | ||
1607 | return IRQ_RETVAL(handled); | 1607 | return IRQ_RETVAL(handled); |
1608 | } | 1608 | } |
1609 | 1609 | ||
@@ -1614,11 +1614,11 @@ de4x5_rx(struct net_device *dev) | |||
1614 | u_long iobase = dev->base_addr; | 1614 | u_long iobase = dev->base_addr; |
1615 | int entry; | 1615 | int entry; |
1616 | s32 status; | 1616 | s32 status; |
1617 | 1617 | ||
1618 | for (entry=lp->rx_new; (s32)le32_to_cpu(lp->rx_ring[entry].status)>=0; | 1618 | for (entry=lp->rx_new; (s32)le32_to_cpu(lp->rx_ring[entry].status)>=0; |
1619 | entry=lp->rx_new) { | 1619 | entry=lp->rx_new) { |
1620 | status = (s32)le32_to_cpu(lp->rx_ring[entry].status); | 1620 | status = (s32)le32_to_cpu(lp->rx_ring[entry].status); |
1621 | 1621 | ||
1622 | if (lp->rx_ovf) { | 1622 | if (lp->rx_ovf) { |
1623 | if (inl(DE4X5_MFC) & MFC_FOCM) { | 1623 | if (inl(DE4X5_MFC) & MFC_FOCM) { |
1624 | de4x5_rx_ovfc(dev); | 1624 | de4x5_rx_ovfc(dev); |
@@ -1629,7 +1629,7 @@ de4x5_rx(struct net_device *dev) | |||
1629 | if (status & RD_FS) { /* Remember the start of frame */ | 1629 | if (status & RD_FS) { /* Remember the start of frame */ |
1630 | lp->rx_old = entry; | 1630 | lp->rx_old = entry; |
1631 | } | 1631 | } |
1632 | 1632 | ||
1633 | if (status & RD_LS) { /* Valid frame status */ | 1633 | if (status & RD_LS) { /* Valid frame status */ |
1634 | if (lp->tx_enable) lp->linkOK++; | 1634 | if (lp->tx_enable) lp->linkOK++; |
1635 | if (status & RD_ES) { /* There was an error. */ | 1635 | if (status & RD_ES) { /* There was an error. */ |
@@ -1646,9 +1646,9 @@ de4x5_rx(struct net_device *dev) | |||
1646 | struct sk_buff *skb; | 1646 | struct sk_buff *skb; |
1647 | short pkt_len = (short)(le32_to_cpu(lp->rx_ring[entry].status) | 1647 | short pkt_len = (short)(le32_to_cpu(lp->rx_ring[entry].status) |
1648 | >> 16) - 4; | 1648 | >> 16) - 4; |
1649 | 1649 | ||
1650 | if ((skb = de4x5_alloc_rx_buff(dev, entry, pkt_len)) == NULL) { | 1650 | if ((skb = de4x5_alloc_rx_buff(dev, entry, pkt_len)) == NULL) { |
1651 | printk("%s: Insufficient memory; nuking packet.\n", | 1651 | printk("%s: Insufficient memory; nuking packet.\n", |
1652 | dev->name); | 1652 | dev->name); |
1653 | lp->stats.rx_dropped++; | 1653 | lp->stats.rx_dropped++; |
1654 | } else { | 1654 | } else { |
@@ -1658,14 +1658,14 @@ de4x5_rx(struct net_device *dev) | |||
1658 | skb->protocol=eth_type_trans(skb,dev); | 1658 | skb->protocol=eth_type_trans(skb,dev); |
1659 | de4x5_local_stats(dev, skb->data, pkt_len); | 1659 | de4x5_local_stats(dev, skb->data, pkt_len); |
1660 | netif_rx(skb); | 1660 | netif_rx(skb); |
1661 | 1661 | ||
1662 | /* Update stats */ | 1662 | /* Update stats */ |
1663 | dev->last_rx = jiffies; | 1663 | dev->last_rx = jiffies; |
1664 | lp->stats.rx_packets++; | 1664 | lp->stats.rx_packets++; |
1665 | lp->stats.rx_bytes += pkt_len; | 1665 | lp->stats.rx_bytes += pkt_len; |
1666 | } | 1666 | } |
1667 | } | 1667 | } |
1668 | 1668 | ||
1669 | /* Change buffer ownership for this frame, back to the adapter */ | 1669 | /* Change buffer ownership for this frame, back to the adapter */ |
1670 | for (;lp->rx_old!=entry;lp->rx_old=(++lp->rx_old)%lp->rxRingSize) { | 1670 | for (;lp->rx_old!=entry;lp->rx_old=(++lp->rx_old)%lp->rxRingSize) { |
1671 | lp->rx_ring[lp->rx_old].status = cpu_to_le32(R_OWN); | 1671 | lp->rx_ring[lp->rx_old].status = cpu_to_le32(R_OWN); |
@@ -1674,13 +1674,13 @@ de4x5_rx(struct net_device *dev) | |||
1674 | lp->rx_ring[entry].status = cpu_to_le32(R_OWN); | 1674 | lp->rx_ring[entry].status = cpu_to_le32(R_OWN); |
1675 | barrier(); | 1675 | barrier(); |
1676 | } | 1676 | } |
1677 | 1677 | ||
1678 | /* | 1678 | /* |
1679 | ** Update entry information | 1679 | ** Update entry information |
1680 | */ | 1680 | */ |
1681 | lp->rx_new = (++lp->rx_new) % lp->rxRingSize; | 1681 | lp->rx_new = (++lp->rx_new) % lp->rxRingSize; |
1682 | } | 1682 | } |
1683 | 1683 | ||
1684 | return 0; | 1684 | return 0; |
1685 | } | 1685 | } |
1686 | 1686 | ||
@@ -1705,20 +1705,20 @@ de4x5_tx(struct net_device *dev) | |||
1705 | u_long iobase = dev->base_addr; | 1705 | u_long iobase = dev->base_addr; |
1706 | int entry; | 1706 | int entry; |
1707 | s32 status; | 1707 | s32 status; |
1708 | 1708 | ||
1709 | for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) { | 1709 | for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) { |
1710 | status = (s32)le32_to_cpu(lp->tx_ring[entry].status); | 1710 | status = (s32)le32_to_cpu(lp->tx_ring[entry].status); |
1711 | if (status < 0) { /* Buffer not sent yet */ | 1711 | if (status < 0) { /* Buffer not sent yet */ |
1712 | break; | 1712 | break; |
1713 | } else if (status != 0x7fffffff) { /* Not setup frame */ | 1713 | } else if (status != 0x7fffffff) { /* Not setup frame */ |
1714 | if (status & TD_ES) { /* An error happened */ | 1714 | if (status & TD_ES) { /* An error happened */ |
1715 | lp->stats.tx_errors++; | 1715 | lp->stats.tx_errors++; |
1716 | if (status & TD_NC) lp->stats.tx_carrier_errors++; | 1716 | if (status & TD_NC) lp->stats.tx_carrier_errors++; |
1717 | if (status & TD_LC) lp->stats.tx_window_errors++; | 1717 | if (status & TD_LC) lp->stats.tx_window_errors++; |
1718 | if (status & TD_UF) lp->stats.tx_fifo_errors++; | 1718 | if (status & TD_UF) lp->stats.tx_fifo_errors++; |
1719 | if (status & TD_EC) lp->pktStats.excessive_collisions++; | 1719 | if (status & TD_EC) lp->pktStats.excessive_collisions++; |
1720 | if (status & TD_DE) lp->stats.tx_aborted_errors++; | 1720 | if (status & TD_DE) lp->stats.tx_aborted_errors++; |
1721 | 1721 | ||
1722 | if (TX_PKT_PENDING) { | 1722 | if (TX_PKT_PENDING) { |
1723 | outl(POLL_DEMAND, DE4X5_TPD);/* Restart a stalled TX */ | 1723 | outl(POLL_DEMAND, DE4X5_TPD);/* Restart a stalled TX */ |
1724 | } | 1724 | } |
@@ -1727,14 +1727,14 @@ de4x5_tx(struct net_device *dev) | |||
1727 | if (lp->tx_enable) lp->linkOK++; | 1727 | if (lp->tx_enable) lp->linkOK++; |
1728 | } | 1728 | } |
1729 | /* Update the collision counter */ | 1729 | /* Update the collision counter */ |
1730 | lp->stats.collisions += ((status & TD_EC) ? 16 : | 1730 | lp->stats.collisions += ((status & TD_EC) ? 16 : |
1731 | ((status & TD_CC) >> 3)); | 1731 | ((status & TD_CC) >> 3)); |
1732 | 1732 | ||
1733 | /* Free the buffer. */ | 1733 | /* Free the buffer. */ |
1734 | if (lp->tx_skb[entry] != NULL) | 1734 | if (lp->tx_skb[entry] != NULL) |
1735 | de4x5_free_tx_buff(lp, entry); | 1735 | de4x5_free_tx_buff(lp, entry); |
1736 | } | 1736 | } |
1737 | 1737 | ||
1738 | /* Update all the pointers */ | 1738 | /* Update all the pointers */ |
1739 | lp->tx_old = (++lp->tx_old) % lp->txRingSize; | 1739 | lp->tx_old = (++lp->tx_old) % lp->txRingSize; |
1740 | } | 1740 | } |
@@ -1746,7 +1746,7 @@ de4x5_tx(struct net_device *dev) | |||
1746 | else | 1746 | else |
1747 | netif_start_queue(dev); | 1747 | netif_start_queue(dev); |
1748 | } | 1748 | } |
1749 | 1749 | ||
1750 | return 0; | 1750 | return 0; |
1751 | } | 1751 | } |
1752 | 1752 | ||
@@ -1755,9 +1755,9 @@ de4x5_ast(struct net_device *dev) | |||
1755 | { | 1755 | { |
1756 | struct de4x5_private *lp = netdev_priv(dev); | 1756 | struct de4x5_private *lp = netdev_priv(dev); |
1757 | int next_tick = DE4X5_AUTOSENSE_MS; | 1757 | int next_tick = DE4X5_AUTOSENSE_MS; |
1758 | 1758 | ||
1759 | disable_ast(dev); | 1759 | disable_ast(dev); |
1760 | 1760 | ||
1761 | if (lp->useSROM) { | 1761 | if (lp->useSROM) { |
1762 | next_tick = srom_autoconf(dev); | 1762 | next_tick = srom_autoconf(dev); |
1763 | } else if (lp->chipset == DC21140) { | 1763 | } else if (lp->chipset == DC21140) { |
@@ -1769,7 +1769,7 @@ de4x5_ast(struct net_device *dev) | |||
1769 | } | 1769 | } |
1770 | lp->linkOK = 0; | 1770 | lp->linkOK = 0; |
1771 | enable_ast(dev, next_tick); | 1771 | enable_ast(dev, next_tick); |
1772 | 1772 | ||
1773 | return 0; | 1773 | return 0; |
1774 | } | 1774 | } |
1775 | 1775 | ||
@@ -1792,11 +1792,11 @@ de4x5_txur(struct net_device *dev) | |||
1792 | } | 1792 | } |
1793 | outl(omr | OMR_ST | OMR_SR, DE4X5_OMR); | 1793 | outl(omr | OMR_ST | OMR_SR, DE4X5_OMR); |
1794 | } | 1794 | } |
1795 | 1795 | ||
1796 | return 0; | 1796 | return 0; |
1797 | } | 1797 | } |
1798 | 1798 | ||
1799 | static int | 1799 | static int |
1800 | de4x5_rx_ovfc(struct net_device *dev) | 1800 | de4x5_rx_ovfc(struct net_device *dev) |
1801 | { | 1801 | { |
1802 | struct de4x5_private *lp = netdev_priv(dev); | 1802 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -1813,7 +1813,7 @@ de4x5_rx_ovfc(struct net_device *dev) | |||
1813 | } | 1813 | } |
1814 | 1814 | ||
1815 | outl(omr, DE4X5_OMR); | 1815 | outl(omr, DE4X5_OMR); |
1816 | 1816 | ||
1817 | return 0; | 1817 | return 0; |
1818 | } | 1818 | } |
1819 | 1819 | ||
@@ -1823,22 +1823,22 @@ de4x5_close(struct net_device *dev) | |||
1823 | struct de4x5_private *lp = netdev_priv(dev); | 1823 | struct de4x5_private *lp = netdev_priv(dev); |
1824 | u_long iobase = dev->base_addr; | 1824 | u_long iobase = dev->base_addr; |
1825 | s32 imr, omr; | 1825 | s32 imr, omr; |
1826 | 1826 | ||
1827 | disable_ast(dev); | 1827 | disable_ast(dev); |
1828 | 1828 | ||
1829 | netif_stop_queue(dev); | 1829 | netif_stop_queue(dev); |
1830 | 1830 | ||
1831 | if (de4x5_debug & DEBUG_CLOSE) { | 1831 | if (de4x5_debug & DEBUG_CLOSE) { |
1832 | printk("%s: Shutting down ethercard, status was %8.8x.\n", | 1832 | printk("%s: Shutting down ethercard, status was %8.8x.\n", |
1833 | dev->name, inl(DE4X5_STS)); | 1833 | dev->name, inl(DE4X5_STS)); |
1834 | } | 1834 | } |
1835 | 1835 | ||
1836 | /* | 1836 | /* |
1837 | ** We stop the DE4X5 here... mask interrupts and stop TX & RX | 1837 | ** We stop the DE4X5 here... mask interrupts and stop TX & RX |
1838 | */ | 1838 | */ |
1839 | DISABLE_IRQs; | 1839 | DISABLE_IRQs; |
1840 | STOP_DE4X5; | 1840 | STOP_DE4X5; |
1841 | 1841 | ||
1842 | /* Free the associated irq */ | 1842 | /* Free the associated irq */ |
1843 | free_irq(dev->irq, dev); | 1843 | free_irq(dev->irq, dev); |
1844 | lp->state = CLOSED; | 1844 | lp->state = CLOSED; |
@@ -1846,10 +1846,10 @@ de4x5_close(struct net_device *dev) | |||
1846 | /* Free any socket buffers */ | 1846 | /* Free any socket buffers */ |
1847 | de4x5_free_rx_buffs(dev); | 1847 | de4x5_free_rx_buffs(dev); |
1848 | de4x5_free_tx_buffs(dev); | 1848 | de4x5_free_tx_buffs(dev); |
1849 | 1849 | ||
1850 | /* Put the adapter to sleep to save power */ | 1850 | /* Put the adapter to sleep to save power */ |
1851 | yawn(dev, SLEEP); | 1851 | yawn(dev, SLEEP); |
1852 | 1852 | ||
1853 | return 0; | 1853 | return 0; |
1854 | } | 1854 | } |
1855 | 1855 | ||
@@ -1858,9 +1858,9 @@ de4x5_get_stats(struct net_device *dev) | |||
1858 | { | 1858 | { |
1859 | struct de4x5_private *lp = netdev_priv(dev); | 1859 | struct de4x5_private *lp = netdev_priv(dev); |
1860 | u_long iobase = dev->base_addr; | 1860 | u_long iobase = dev->base_addr; |
1861 | 1861 | ||
1862 | lp->stats.rx_missed_errors = (int)(inl(DE4X5_MFC) & (MFC_OVFL | MFC_CNTR)); | 1862 | lp->stats.rx_missed_errors = (int)(inl(DE4X5_MFC) & (MFC_OVFL | MFC_CNTR)); |
1863 | 1863 | ||
1864 | return &lp->stats; | 1864 | return &lp->stats; |
1865 | } | 1865 | } |
1866 | 1866 | ||
@@ -1886,7 +1886,7 @@ de4x5_local_stats(struct net_device *dev, char *buf, int pkt_len) | |||
1886 | (*(s16 *)&buf[4] == *(s16 *)&dev->dev_addr[4])) { | 1886 | (*(s16 *)&buf[4] == *(s16 *)&dev->dev_addr[4])) { |
1887 | lp->pktStats.unicast++; | 1887 | lp->pktStats.unicast++; |
1888 | } | 1888 | } |
1889 | 1889 | ||
1890 | lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */ | 1890 | lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */ |
1891 | if (lp->pktStats.bins[0] == 0) { /* Reset counters */ | 1891 | if (lp->pktStats.bins[0] == 0) { /* Reset counters */ |
1892 | memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats)); | 1892 | memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats)); |
@@ -1937,11 +1937,11 @@ set_multicast_list(struct net_device *dev) | |||
1937 | omr = inl(DE4X5_OMR); | 1937 | omr = inl(DE4X5_OMR); |
1938 | omr |= OMR_PR; | 1938 | omr |= OMR_PR; |
1939 | outl(omr, DE4X5_OMR); | 1939 | outl(omr, DE4X5_OMR); |
1940 | } else { | 1940 | } else { |
1941 | SetMulticastFilter(dev); | 1941 | SetMulticastFilter(dev); |
1942 | load_packet(dev, lp->setup_frame, TD_IC | PERFECT_F | TD_SET | | 1942 | load_packet(dev, lp->setup_frame, TD_IC | PERFECT_F | TD_SET | |
1943 | SETUP_FRAME_LEN, (struct sk_buff *)1); | 1943 | SETUP_FRAME_LEN, (struct sk_buff *)1); |
1944 | 1944 | ||
1945 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; | 1945 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; |
1946 | outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ | 1946 | outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ |
1947 | dev->trans_start = jiffies; | 1947 | dev->trans_start = jiffies; |
@@ -1969,20 +1969,20 @@ SetMulticastFilter(struct net_device *dev) | |||
1969 | omr = inl(DE4X5_OMR); | 1969 | omr = inl(DE4X5_OMR); |
1970 | omr &= ~(OMR_PR | OMR_PM); | 1970 | omr &= ~(OMR_PR | OMR_PM); |
1971 | pa = build_setup_frame(dev, ALL); /* Build the basic frame */ | 1971 | pa = build_setup_frame(dev, ALL); /* Build the basic frame */ |
1972 | 1972 | ||
1973 | if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 14)) { | 1973 | if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 14)) { |
1974 | omr |= OMR_PM; /* Pass all multicasts */ | 1974 | omr |= OMR_PM; /* Pass all multicasts */ |
1975 | } else if (lp->setup_f == HASH_PERF) { /* Hash Filtering */ | 1975 | } else if (lp->setup_f == HASH_PERF) { /* Hash Filtering */ |
1976 | for (i=0;i<dev->mc_count;i++) { /* for each address in the list */ | 1976 | for (i=0;i<dev->mc_count;i++) { /* for each address in the list */ |
1977 | addrs=dmi->dmi_addr; | 1977 | addrs=dmi->dmi_addr; |
1978 | dmi=dmi->next; | 1978 | dmi=dmi->next; |
1979 | if ((*addrs & 0x01) == 1) { /* multicast address? */ | 1979 | if ((*addrs & 0x01) == 1) { /* multicast address? */ |
1980 | crc = ether_crc_le(ETH_ALEN, addrs); | 1980 | crc = ether_crc_le(ETH_ALEN, addrs); |
1981 | hashcode = crc & HASH_BITS; /* hashcode is 9 LSb of CRC */ | 1981 | hashcode = crc & HASH_BITS; /* hashcode is 9 LSb of CRC */ |
1982 | 1982 | ||
1983 | byte = hashcode >> 3; /* bit[3-8] -> byte in filter */ | 1983 | byte = hashcode >> 3; /* bit[3-8] -> byte in filter */ |
1984 | bit = 1 << (hashcode & 0x07);/* bit[0-2] -> bit in byte */ | 1984 | bit = 1 << (hashcode & 0x07);/* bit[0-2] -> bit in byte */ |
1985 | 1985 | ||
1986 | byte <<= 1; /* calc offset into setup frame */ | 1986 | byte <<= 1; /* calc offset into setup frame */ |
1987 | if (byte & 0x02) { | 1987 | if (byte & 0x02) { |
1988 | byte -= 1; | 1988 | byte -= 1; |
@@ -1994,14 +1994,14 @@ SetMulticastFilter(struct net_device *dev) | |||
1994 | for (j=0; j<dev->mc_count; j++) { | 1994 | for (j=0; j<dev->mc_count; j++) { |
1995 | addrs=dmi->dmi_addr; | 1995 | addrs=dmi->dmi_addr; |
1996 | dmi=dmi->next; | 1996 | dmi=dmi->next; |
1997 | for (i=0; i<ETH_ALEN; i++) { | 1997 | for (i=0; i<ETH_ALEN; i++) { |
1998 | *(pa + (i&1)) = *addrs++; | 1998 | *(pa + (i&1)) = *addrs++; |
1999 | if (i & 0x01) pa += 4; | 1999 | if (i & 0x01) pa += 4; |
2000 | } | 2000 | } |
2001 | } | 2001 | } |
2002 | } | 2002 | } |
2003 | outl(omr, DE4X5_OMR); | 2003 | outl(omr, DE4X5_OMR); |
2004 | 2004 | ||
2005 | return; | 2005 | return; |
2006 | } | 2006 | } |
2007 | 2007 | ||
@@ -2031,18 +2031,18 @@ static int __init de4x5_eisa_probe (struct device *gendev) | |||
2031 | status = -EBUSY; | 2031 | status = -EBUSY; |
2032 | goto release_reg_1; | 2032 | goto release_reg_1; |
2033 | } | 2033 | } |
2034 | 2034 | ||
2035 | if (!(dev = alloc_etherdev (sizeof (struct de4x5_private)))) { | 2035 | if (!(dev = alloc_etherdev (sizeof (struct de4x5_private)))) { |
2036 | status = -ENOMEM; | 2036 | status = -ENOMEM; |
2037 | goto release_reg_2; | 2037 | goto release_reg_2; |
2038 | } | 2038 | } |
2039 | lp = netdev_priv(dev); | 2039 | lp = netdev_priv(dev); |
2040 | 2040 | ||
2041 | cfid = (u32) inl(PCI_CFID); | 2041 | cfid = (u32) inl(PCI_CFID); |
2042 | lp->cfrv = (u_short) inl(PCI_CFRV); | 2042 | lp->cfrv = (u_short) inl(PCI_CFRV); |
2043 | device = (cfid >> 8) & 0x00ffff00; | 2043 | device = (cfid >> 8) & 0x00ffff00; |
2044 | vendor = (u_short) cfid; | 2044 | vendor = (u_short) cfid; |
2045 | 2045 | ||
2046 | /* Read the EISA Configuration Registers */ | 2046 | /* Read the EISA Configuration Registers */ |
2047 | regval = inb(EISA_REG0) & (ER0_INTL | ER0_INTT); | 2047 | regval = inb(EISA_REG0) & (ER0_INTL | ER0_INTT); |
2048 | #ifdef CONFIG_ALPHA | 2048 | #ifdef CONFIG_ALPHA |
@@ -2050,7 +2050,7 @@ static int __init de4x5_eisa_probe (struct device *gendev) | |||
2050 | * care about the EISA configuration, and thus doesn't | 2050 | * care about the EISA configuration, and thus doesn't |
2051 | * configure the PLX bridge properly. Oh well... Simply mimic | 2051 | * configure the PLX bridge properly. Oh well... Simply mimic |
2052 | * the EISA config file to sort it out. */ | 2052 | * the EISA config file to sort it out. */ |
2053 | 2053 | ||
2054 | /* EISA REG1: Assert DecChip 21040 HW Reset */ | 2054 | /* EISA REG1: Assert DecChip 21040 HW Reset */ |
2055 | outb (ER1_IAM | 1, EISA_REG1); | 2055 | outb (ER1_IAM | 1, EISA_REG1); |
2056 | mdelay (1); | 2056 | mdelay (1); |
@@ -2061,12 +2061,12 @@ static int __init de4x5_eisa_probe (struct device *gendev) | |||
2061 | 2061 | ||
2062 | /* EISA REG3: R/W Burst Transfer Enable */ | 2062 | /* EISA REG3: R/W Burst Transfer Enable */ |
2063 | outb (ER3_BWE | ER3_BRE, EISA_REG3); | 2063 | outb (ER3_BWE | ER3_BRE, EISA_REG3); |
2064 | 2064 | ||
2065 | /* 32_bit slave/master, Preempt Time=23 bclks, Unlatched Interrupt */ | 2065 | /* 32_bit slave/master, Preempt Time=23 bclks, Unlatched Interrupt */ |
2066 | outb (ER0_BSW | ER0_BMW | ER0_EPT | regval, EISA_REG0); | 2066 | outb (ER0_BSW | ER0_BMW | ER0_EPT | regval, EISA_REG0); |
2067 | #endif | 2067 | #endif |
2068 | irq = de4x5_irq[(regval >> 1) & 0x03]; | 2068 | irq = de4x5_irq[(regval >> 1) & 0x03]; |
2069 | 2069 | ||
2070 | if (is_DC2114x) { | 2070 | if (is_DC2114x) { |
2071 | device = ((lp->cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143); | 2071 | device = ((lp->cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143); |
2072 | } | 2072 | } |
@@ -2077,7 +2077,7 @@ static int __init de4x5_eisa_probe (struct device *gendev) | |||
2077 | outl(PCI_COMMAND_IO | PCI_COMMAND_MASTER, PCI_CFCS); | 2077 | outl(PCI_COMMAND_IO | PCI_COMMAND_MASTER, PCI_CFCS); |
2078 | outl(0x00006000, PCI_CFLT); | 2078 | outl(0x00006000, PCI_CFLT); |
2079 | outl(iobase, PCI_CBIO); | 2079 | outl(iobase, PCI_CBIO); |
2080 | 2080 | ||
2081 | DevicePresent(dev, EISA_APROM); | 2081 | DevicePresent(dev, EISA_APROM); |
2082 | 2082 | ||
2083 | dev->irq = irq; | 2083 | dev->irq = irq; |
@@ -2102,7 +2102,7 @@ static int __devexit de4x5_eisa_remove (struct device *device) | |||
2102 | 2102 | ||
2103 | dev = device->driver_data; | 2103 | dev = device->driver_data; |
2104 | iobase = dev->base_addr; | 2104 | iobase = dev->base_addr; |
2105 | 2105 | ||
2106 | unregister_netdev (dev); | 2106 | unregister_netdev (dev); |
2107 | free_netdev (dev); | 2107 | free_netdev (dev); |
2108 | release_region (iobase + DE4X5_EISA_IO_PORTS, DE4X5_EISA_TOTAL_SIZE); | 2108 | release_region (iobase + DE4X5_EISA_IO_PORTS, DE4X5_EISA_TOTAL_SIZE); |
@@ -2131,11 +2131,11 @@ MODULE_DEVICE_TABLE(eisa, de4x5_eisa_ids); | |||
2131 | 2131 | ||
2132 | /* | 2132 | /* |
2133 | ** This function searches the current bus (which is >0) for a DECchip with an | 2133 | ** This function searches the current bus (which is >0) for a DECchip with an |
2134 | ** SROM, so that in multiport cards that have one SROM shared between multiple | 2134 | ** SROM, so that in multiport cards that have one SROM shared between multiple |
2135 | ** DECchips, we can find the base SROM irrespective of the BIOS scan direction. | 2135 | ** DECchips, we can find the base SROM irrespective of the BIOS scan direction. |
2136 | ** For single port cards this is a time waster... | 2136 | ** For single port cards this is a time waster... |
2137 | */ | 2137 | */ |
2138 | static void __devinit | 2138 | static void __devinit |
2139 | srom_search(struct net_device *dev, struct pci_dev *pdev) | 2139 | srom_search(struct net_device *dev, struct pci_dev *pdev) |
2140 | { | 2140 | { |
2141 | u_char pb; | 2141 | u_char pb; |
@@ -2163,7 +2163,7 @@ srom_search(struct net_device *dev, struct pci_dev *pdev) | |||
2163 | /* Set the device number information */ | 2163 | /* Set the device number information */ |
2164 | lp->device = PCI_SLOT(this_dev->devfn); | 2164 | lp->device = PCI_SLOT(this_dev->devfn); |
2165 | lp->bus_num = pb; | 2165 | lp->bus_num = pb; |
2166 | 2166 | ||
2167 | /* Set the chipset information */ | 2167 | /* Set the chipset information */ |
2168 | if (is_DC2114x) { | 2168 | if (is_DC2114x) { |
2169 | device = ((cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143); | 2169 | device = ((cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143); |
@@ -2176,7 +2176,7 @@ srom_search(struct net_device *dev, struct pci_dev *pdev) | |||
2176 | /* Fetch the IRQ to be used */ | 2176 | /* Fetch the IRQ to be used */ |
2177 | irq = this_dev->irq; | 2177 | irq = this_dev->irq; |
2178 | if ((irq == 0) || (irq == 0xff) || ((int)irq == -1)) continue; | 2178 | if ((irq == 0) || (irq == 0xff) || ((int)irq == -1)) continue; |
2179 | 2179 | ||
2180 | /* Check if I/O accesses are enabled */ | 2180 | /* Check if I/O accesses are enabled */ |
2181 | pci_read_config_word(this_dev, PCI_COMMAND, &status); | 2181 | pci_read_config_word(this_dev, PCI_COMMAND, &status); |
2182 | if (!(status & PCI_COMMAND_IO)) continue; | 2182 | if (!(status & PCI_COMMAND_IO)) continue; |
@@ -2254,7 +2254,7 @@ static int __devinit de4x5_pci_probe (struct pci_dev *pdev, | |||
2254 | lp = netdev_priv(dev); | 2254 | lp = netdev_priv(dev); |
2255 | lp->bus = PCI; | 2255 | lp->bus = PCI; |
2256 | lp->bus_num = 0; | 2256 | lp->bus_num = 0; |
2257 | 2257 | ||
2258 | /* Search for an SROM on this bus */ | 2258 | /* Search for an SROM on this bus */ |
2259 | if (lp->bus_num != pb) { | 2259 | if (lp->bus_num != pb) { |
2260 | lp->bus_num = pb; | 2260 | lp->bus_num = pb; |
@@ -2267,7 +2267,7 @@ static int __devinit de4x5_pci_probe (struct pci_dev *pdev, | |||
2267 | /* Set the device number information */ | 2267 | /* Set the device number information */ |
2268 | lp->device = dev_num; | 2268 | lp->device = dev_num; |
2269 | lp->bus_num = pb; | 2269 | lp->bus_num = pb; |
2270 | 2270 | ||
2271 | /* Set the chipset information */ | 2271 | /* Set the chipset information */ |
2272 | if (is_DC2114x) { | 2272 | if (is_DC2114x) { |
2273 | device = ((lp->cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143); | 2273 | device = ((lp->cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143); |
@@ -2283,7 +2283,7 @@ static int __devinit de4x5_pci_probe (struct pci_dev *pdev, | |||
2283 | error = -ENODEV; | 2283 | error = -ENODEV; |
2284 | goto free_dev; | 2284 | goto free_dev; |
2285 | } | 2285 | } |
2286 | 2286 | ||
2287 | /* Check if I/O accesses and Bus Mastering are enabled */ | 2287 | /* Check if I/O accesses and Bus Mastering are enabled */ |
2288 | pci_read_config_word(pdev, PCI_COMMAND, &status); | 2288 | pci_read_config_word(pdev, PCI_COMMAND, &status); |
2289 | #ifdef __powerpc__ | 2289 | #ifdef __powerpc__ |
@@ -2322,7 +2322,7 @@ static int __devinit de4x5_pci_probe (struct pci_dev *pdev, | |||
2322 | } | 2322 | } |
2323 | 2323 | ||
2324 | dev->irq = irq; | 2324 | dev->irq = irq; |
2325 | 2325 | ||
2326 | if ((error = de4x5_hw_init(dev, iobase, &pdev->dev))) { | 2326 | if ((error = de4x5_hw_init(dev, iobase, &pdev->dev))) { |
2327 | goto release; | 2327 | goto release; |
2328 | } | 2328 | } |
@@ -2377,7 +2377,7 @@ static struct pci_driver de4x5_pci_driver = { | |||
2377 | ** Auto configure the media here rather than setting the port at compile | 2377 | ** Auto configure the media here rather than setting the port at compile |
2378 | ** time. This routine is called by de4x5_init() and when a loss of media is | 2378 | ** time. This routine is called by de4x5_init() and when a loss of media is |
2379 | ** detected (excessive collisions, loss of carrier, no carrier or link fail | 2379 | ** detected (excessive collisions, loss of carrier, no carrier or link fail |
2380 | ** [TP] or no recent receive activity) to check whether the user has been | 2380 | ** [TP] or no recent receive activity) to check whether the user has been |
2381 | ** sneaky and changed the port on us. | 2381 | ** sneaky and changed the port on us. |
2382 | */ | 2382 | */ |
2383 | static int | 2383 | static int |
@@ -2405,7 +2405,7 @@ autoconf_media(struct net_device *dev) | |||
2405 | } | 2405 | } |
2406 | 2406 | ||
2407 | enable_ast(dev, next_tick); | 2407 | enable_ast(dev, next_tick); |
2408 | 2408 | ||
2409 | return (lp->media); | 2409 | return (lp->media); |
2410 | } | 2410 | } |
2411 | 2411 | ||
@@ -2428,7 +2428,7 @@ dc21040_autoconf(struct net_device *dev) | |||
2428 | u_long iobase = dev->base_addr; | 2428 | u_long iobase = dev->base_addr; |
2429 | int next_tick = DE4X5_AUTOSENSE_MS; | 2429 | int next_tick = DE4X5_AUTOSENSE_MS; |
2430 | s32 imr; | 2430 | s32 imr; |
2431 | 2431 | ||
2432 | switch (lp->media) { | 2432 | switch (lp->media) { |
2433 | case INIT: | 2433 | case INIT: |
2434 | DISABLE_IRQs; | 2434 | DISABLE_IRQs; |
@@ -2447,36 +2447,36 @@ dc21040_autoconf(struct net_device *dev) | |||
2447 | lp->local_state = 0; | 2447 | lp->local_state = 0; |
2448 | next_tick = dc21040_autoconf(dev); | 2448 | next_tick = dc21040_autoconf(dev); |
2449 | break; | 2449 | break; |
2450 | 2450 | ||
2451 | case TP: | 2451 | case TP: |
2452 | next_tick = dc21040_state(dev, 0x8f01, 0xffff, 0x0000, 3000, BNC_AUI, | 2452 | next_tick = dc21040_state(dev, 0x8f01, 0xffff, 0x0000, 3000, BNC_AUI, |
2453 | TP_SUSPECT, test_tp); | 2453 | TP_SUSPECT, test_tp); |
2454 | break; | 2454 | break; |
2455 | 2455 | ||
2456 | case TP_SUSPECT: | 2456 | case TP_SUSPECT: |
2457 | next_tick = de4x5_suspect_state(dev, 1000, TP, test_tp, dc21040_autoconf); | 2457 | next_tick = de4x5_suspect_state(dev, 1000, TP, test_tp, dc21040_autoconf); |
2458 | break; | 2458 | break; |
2459 | 2459 | ||
2460 | case BNC: | 2460 | case BNC: |
2461 | case AUI: | 2461 | case AUI: |
2462 | case BNC_AUI: | 2462 | case BNC_AUI: |
2463 | next_tick = dc21040_state(dev, 0x8f09, 0x0705, 0x0006, 3000, EXT_SIA, | 2463 | next_tick = dc21040_state(dev, 0x8f09, 0x0705, 0x0006, 3000, EXT_SIA, |
2464 | BNC_AUI_SUSPECT, ping_media); | 2464 | BNC_AUI_SUSPECT, ping_media); |
2465 | break; | 2465 | break; |
2466 | 2466 | ||
2467 | case BNC_AUI_SUSPECT: | 2467 | case BNC_AUI_SUSPECT: |
2468 | next_tick = de4x5_suspect_state(dev, 1000, BNC_AUI, ping_media, dc21040_autoconf); | 2468 | next_tick = de4x5_suspect_state(dev, 1000, BNC_AUI, ping_media, dc21040_autoconf); |
2469 | break; | 2469 | break; |
2470 | 2470 | ||
2471 | case EXT_SIA: | 2471 | case EXT_SIA: |
2472 | next_tick = dc21040_state(dev, 0x3041, 0x0000, 0x0006, 3000, | 2472 | next_tick = dc21040_state(dev, 0x3041, 0x0000, 0x0006, 3000, |
2473 | NC, EXT_SIA_SUSPECT, ping_media); | 2473 | NC, EXT_SIA_SUSPECT, ping_media); |
2474 | break; | 2474 | break; |
2475 | 2475 | ||
2476 | case EXT_SIA_SUSPECT: | 2476 | case EXT_SIA_SUSPECT: |
2477 | next_tick = de4x5_suspect_state(dev, 1000, EXT_SIA, ping_media, dc21040_autoconf); | 2477 | next_tick = de4x5_suspect_state(dev, 1000, EXT_SIA, ping_media, dc21040_autoconf); |
2478 | break; | 2478 | break; |
2479 | 2479 | ||
2480 | case NC: | 2480 | case NC: |
2481 | /* default to TP for all */ | 2481 | /* default to TP for all */ |
2482 | reset_init_sia(dev, 0x8f01, 0xffff, 0x0000); | 2482 | reset_init_sia(dev, 0x8f01, 0xffff, 0x0000); |
@@ -2488,13 +2488,13 @@ dc21040_autoconf(struct net_device *dev) | |||
2488 | lp->tx_enable = NO; | 2488 | lp->tx_enable = NO; |
2489 | break; | 2489 | break; |
2490 | } | 2490 | } |
2491 | 2491 | ||
2492 | return next_tick; | 2492 | return next_tick; |
2493 | } | 2493 | } |
2494 | 2494 | ||
2495 | static int | 2495 | static int |
2496 | dc21040_state(struct net_device *dev, int csr13, int csr14, int csr15, int timeout, | 2496 | dc21040_state(struct net_device *dev, int csr13, int csr14, int csr15, int timeout, |
2497 | int next_state, int suspect_state, | 2497 | int next_state, int suspect_state, |
2498 | int (*fn)(struct net_device *, int)) | 2498 | int (*fn)(struct net_device *, int)) |
2499 | { | 2499 | { |
2500 | struct de4x5_private *lp = netdev_priv(dev); | 2500 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -2507,7 +2507,7 @@ dc21040_state(struct net_device *dev, int csr13, int csr14, int csr15, int timeo | |||
2507 | lp->local_state++; | 2507 | lp->local_state++; |
2508 | next_tick = 500; | 2508 | next_tick = 500; |
2509 | break; | 2509 | break; |
2510 | 2510 | ||
2511 | case 1: | 2511 | case 1: |
2512 | if (!lp->tx_enable) { | 2512 | if (!lp->tx_enable) { |
2513 | linkBad = fn(dev, timeout); | 2513 | linkBad = fn(dev, timeout); |
@@ -2527,7 +2527,7 @@ dc21040_state(struct net_device *dev, int csr13, int csr14, int csr15, int timeo | |||
2527 | } | 2527 | } |
2528 | break; | 2528 | break; |
2529 | } | 2529 | } |
2530 | 2530 | ||
2531 | return next_tick; | 2531 | return next_tick; |
2532 | } | 2532 | } |
2533 | 2533 | ||
@@ -2582,7 +2582,7 @@ dc21041_autoconf(struct net_device *dev) | |||
2582 | u_long iobase = dev->base_addr; | 2582 | u_long iobase = dev->base_addr; |
2583 | s32 sts, irqs, irq_mask, imr, omr; | 2583 | s32 sts, irqs, irq_mask, imr, omr; |
2584 | int next_tick = DE4X5_AUTOSENSE_MS; | 2584 | int next_tick = DE4X5_AUTOSENSE_MS; |
2585 | 2585 | ||
2586 | switch (lp->media) { | 2586 | switch (lp->media) { |
2587 | case INIT: | 2587 | case INIT: |
2588 | DISABLE_IRQs; | 2588 | DISABLE_IRQs; |
@@ -2603,7 +2603,7 @@ dc21041_autoconf(struct net_device *dev) | |||
2603 | lp->local_state = 0; | 2603 | lp->local_state = 0; |
2604 | next_tick = dc21041_autoconf(dev); | 2604 | next_tick = dc21041_autoconf(dev); |
2605 | break; | 2605 | break; |
2606 | 2606 | ||
2607 | case TP_NW: | 2607 | case TP_NW: |
2608 | if (lp->timeout < 0) { | 2608 | if (lp->timeout < 0) { |
2609 | omr = inl(DE4X5_OMR);/* Set up full duplex for the autonegotiate */ | 2609 | omr = inl(DE4X5_OMR);/* Set up full duplex for the autonegotiate */ |
@@ -2623,7 +2623,7 @@ dc21041_autoconf(struct net_device *dev) | |||
2623 | next_tick = dc21041_autoconf(dev); | 2623 | next_tick = dc21041_autoconf(dev); |
2624 | } | 2624 | } |
2625 | break; | 2625 | break; |
2626 | 2626 | ||
2627 | case ANS: | 2627 | case ANS: |
2628 | if (!lp->tx_enable) { | 2628 | if (!lp->tx_enable) { |
2629 | irqs = STS_LNP; | 2629 | irqs = STS_LNP; |
@@ -2645,11 +2645,11 @@ dc21041_autoconf(struct net_device *dev) | |||
2645 | next_tick = 3000; | 2645 | next_tick = 3000; |
2646 | } | 2646 | } |
2647 | break; | 2647 | break; |
2648 | 2648 | ||
2649 | case ANS_SUSPECT: | 2649 | case ANS_SUSPECT: |
2650 | next_tick = de4x5_suspect_state(dev, 1000, ANS, test_tp, dc21041_autoconf); | 2650 | next_tick = de4x5_suspect_state(dev, 1000, ANS, test_tp, dc21041_autoconf); |
2651 | break; | 2651 | break; |
2652 | 2652 | ||
2653 | case TP: | 2653 | case TP: |
2654 | if (!lp->tx_enable) { | 2654 | if (!lp->tx_enable) { |
2655 | if (lp->timeout < 0) { | 2655 | if (lp->timeout < 0) { |
@@ -2679,11 +2679,11 @@ dc21041_autoconf(struct net_device *dev) | |||
2679 | next_tick = 3000; | 2679 | next_tick = 3000; |
2680 | } | 2680 | } |
2681 | break; | 2681 | break; |
2682 | 2682 | ||
2683 | case TP_SUSPECT: | 2683 | case TP_SUSPECT: |
2684 | next_tick = de4x5_suspect_state(dev, 1000, TP, test_tp, dc21041_autoconf); | 2684 | next_tick = de4x5_suspect_state(dev, 1000, TP, test_tp, dc21041_autoconf); |
2685 | break; | 2685 | break; |
2686 | 2686 | ||
2687 | case AUI: | 2687 | case AUI: |
2688 | if (!lp->tx_enable) { | 2688 | if (!lp->tx_enable) { |
2689 | if (lp->timeout < 0) { | 2689 | if (lp->timeout < 0) { |
@@ -2709,11 +2709,11 @@ dc21041_autoconf(struct net_device *dev) | |||
2709 | next_tick = 3000; | 2709 | next_tick = 3000; |
2710 | } | 2710 | } |
2711 | break; | 2711 | break; |
2712 | 2712 | ||
2713 | case AUI_SUSPECT: | 2713 | case AUI_SUSPECT: |
2714 | next_tick = de4x5_suspect_state(dev, 1000, AUI, ping_media, dc21041_autoconf); | 2714 | next_tick = de4x5_suspect_state(dev, 1000, AUI, ping_media, dc21041_autoconf); |
2715 | break; | 2715 | break; |
2716 | 2716 | ||
2717 | case BNC: | 2717 | case BNC: |
2718 | switch (lp->local_state) { | 2718 | switch (lp->local_state) { |
2719 | case 0: | 2719 | case 0: |
@@ -2731,7 +2731,7 @@ dc21041_autoconf(struct net_device *dev) | |||
2731 | next_tick = dc21041_autoconf(dev); | 2731 | next_tick = dc21041_autoconf(dev); |
2732 | } | 2732 | } |
2733 | break; | 2733 | break; |
2734 | 2734 | ||
2735 | case 1: | 2735 | case 1: |
2736 | if (!lp->tx_enable) { | 2736 | if (!lp->tx_enable) { |
2737 | if ((sts = ping_media(dev, 3000)) < 0) { | 2737 | if ((sts = ping_media(dev, 3000)) < 0) { |
@@ -2751,11 +2751,11 @@ dc21041_autoconf(struct net_device *dev) | |||
2751 | break; | 2751 | break; |
2752 | } | 2752 | } |
2753 | break; | 2753 | break; |
2754 | 2754 | ||
2755 | case BNC_SUSPECT: | 2755 | case BNC_SUSPECT: |
2756 | next_tick = de4x5_suspect_state(dev, 1000, BNC, ping_media, dc21041_autoconf); | 2756 | next_tick = de4x5_suspect_state(dev, 1000, BNC, ping_media, dc21041_autoconf); |
2757 | break; | 2757 | break; |
2758 | 2758 | ||
2759 | case NC: | 2759 | case NC: |
2760 | omr = inl(DE4X5_OMR); /* Set up full duplex for the autonegotiate */ | 2760 | omr = inl(DE4X5_OMR); /* Set up full duplex for the autonegotiate */ |
2761 | outl(omr | OMR_FDX, DE4X5_OMR); | 2761 | outl(omr | OMR_FDX, DE4X5_OMR); |
@@ -2768,7 +2768,7 @@ dc21041_autoconf(struct net_device *dev) | |||
2768 | lp->tx_enable = NO; | 2768 | lp->tx_enable = NO; |
2769 | break; | 2769 | break; |
2770 | } | 2770 | } |
2771 | 2771 | ||
2772 | return next_tick; | 2772 | return next_tick; |
2773 | } | 2773 | } |
2774 | 2774 | ||
@@ -2784,9 +2784,9 @@ dc21140m_autoconf(struct net_device *dev) | |||
2784 | int ana, anlpa, cap, cr, slnk, sr; | 2784 | int ana, anlpa, cap, cr, slnk, sr; |
2785 | int next_tick = DE4X5_AUTOSENSE_MS; | 2785 | int next_tick = DE4X5_AUTOSENSE_MS; |
2786 | u_long imr, omr, iobase = dev->base_addr; | 2786 | u_long imr, omr, iobase = dev->base_addr; |
2787 | 2787 | ||
2788 | switch(lp->media) { | 2788 | switch(lp->media) { |
2789 | case INIT: | 2789 | case INIT: |
2790 | if (lp->timeout < 0) { | 2790 | if (lp->timeout < 0) { |
2791 | DISABLE_IRQs; | 2791 | DISABLE_IRQs; |
2792 | lp->tx_enable = FALSE; | 2792 | lp->tx_enable = FALSE; |
@@ -2813,7 +2813,7 @@ dc21140m_autoconf(struct net_device *dev) | |||
2813 | lp->media = _100Mb; | 2813 | lp->media = _100Mb; |
2814 | } else if (lp->autosense == _10Mb) { | 2814 | } else if (lp->autosense == _10Mb) { |
2815 | lp->media = _10Mb; | 2815 | lp->media = _10Mb; |
2816 | } else if ((lp->autosense == AUTO) && | 2816 | } else if ((lp->autosense == AUTO) && |
2817 | ((sr=is_anc_capable(dev)) & MII_SR_ANC)) { | 2817 | ((sr=is_anc_capable(dev)) & MII_SR_ANC)) { |
2818 | ana = (((sr >> 6) & MII_ANA_TAF) | MII_ANA_CSMA); | 2818 | ana = (((sr >> 6) & MII_ANA_TAF) | MII_ANA_CSMA); |
2819 | ana &= (lp->fdx ? ~0 : ~MII_ANA_FDAM); | 2819 | ana &= (lp->fdx ? ~0 : ~MII_ANA_FDAM); |
@@ -2831,7 +2831,7 @@ dc21140m_autoconf(struct net_device *dev) | |||
2831 | next_tick = dc21140m_autoconf(dev); | 2831 | next_tick = dc21140m_autoconf(dev); |
2832 | } | 2832 | } |
2833 | break; | 2833 | break; |
2834 | 2834 | ||
2835 | case ANS: | 2835 | case ANS: |
2836 | switch (lp->local_state) { | 2836 | switch (lp->local_state) { |
2837 | case 0: | 2837 | case 0: |
@@ -2851,7 +2851,7 @@ dc21140m_autoconf(struct net_device *dev) | |||
2851 | next_tick = dc21140m_autoconf(dev); | 2851 | next_tick = dc21140m_autoconf(dev); |
2852 | } | 2852 | } |
2853 | break; | 2853 | break; |
2854 | 2854 | ||
2855 | case 1: | 2855 | case 1: |
2856 | if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) { | 2856 | if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) { |
2857 | next_tick = sr & ~TIMER_CB; | 2857 | next_tick = sr & ~TIMER_CB; |
@@ -2862,7 +2862,7 @@ dc21140m_autoconf(struct net_device *dev) | |||
2862 | lp->tmp = MII_SR_ASSC; | 2862 | lp->tmp = MII_SR_ASSC; |
2863 | anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII); | 2863 | anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII); |
2864 | ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); | 2864 | ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); |
2865 | if (!(anlpa & MII_ANLPA_RF) && | 2865 | if (!(anlpa & MII_ANLPA_RF) && |
2866 | (cap = anlpa & MII_ANLPA_TAF & ana)) { | 2866 | (cap = anlpa & MII_ANLPA_TAF & ana)) { |
2867 | if (cap & MII_ANA_100M) { | 2867 | if (cap & MII_ANA_100M) { |
2868 | lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) ? TRUE : FALSE); | 2868 | lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) ? TRUE : FALSE); |
@@ -2879,10 +2879,10 @@ dc21140m_autoconf(struct net_device *dev) | |||
2879 | break; | 2879 | break; |
2880 | } | 2880 | } |
2881 | break; | 2881 | break; |
2882 | 2882 | ||
2883 | case SPD_DET: /* Choose 10Mb/s or 100Mb/s */ | 2883 | case SPD_DET: /* Choose 10Mb/s or 100Mb/s */ |
2884 | if (lp->timeout < 0) { | 2884 | if (lp->timeout < 0) { |
2885 | lp->tmp = (lp->phy[lp->active].id ? MII_SR_LKS : | 2885 | lp->tmp = (lp->phy[lp->active].id ? MII_SR_LKS : |
2886 | (~gep_rd(dev) & GEP_LNP)); | 2886 | (~gep_rd(dev) & GEP_LNP)); |
2887 | SET_100Mb_PDET; | 2887 | SET_100Mb_PDET; |
2888 | } | 2888 | } |
@@ -2899,7 +2899,7 @@ dc21140m_autoconf(struct net_device *dev) | |||
2899 | next_tick = dc21140m_autoconf(dev); | 2899 | next_tick = dc21140m_autoconf(dev); |
2900 | } | 2900 | } |
2901 | break; | 2901 | break; |
2902 | 2902 | ||
2903 | case _100Mb: /* Set 100Mb/s */ | 2903 | case _100Mb: /* Set 100Mb/s */ |
2904 | next_tick = 3000; | 2904 | next_tick = 3000; |
2905 | if (!lp->tx_enable) { | 2905 | if (!lp->tx_enable) { |
@@ -2933,7 +2933,7 @@ dc21140m_autoconf(struct net_device *dev) | |||
2933 | } | 2933 | } |
2934 | } | 2934 | } |
2935 | break; | 2935 | break; |
2936 | 2936 | ||
2937 | case NC: | 2937 | case NC: |
2938 | if (lp->media != lp->c_media) { | 2938 | if (lp->media != lp->c_media) { |
2939 | de4x5_dbg_media(dev); | 2939 | de4x5_dbg_media(dev); |
@@ -2943,7 +2943,7 @@ dc21140m_autoconf(struct net_device *dev) | |||
2943 | lp->tx_enable = FALSE; | 2943 | lp->tx_enable = FALSE; |
2944 | break; | 2944 | break; |
2945 | } | 2945 | } |
2946 | 2946 | ||
2947 | return next_tick; | 2947 | return next_tick; |
2948 | } | 2948 | } |
2949 | 2949 | ||
@@ -3002,7 +3002,7 @@ dc2114x_autoconf(struct net_device *dev) | |||
3002 | lp->media = AUI; | 3002 | lp->media = AUI; |
3003 | } else { | 3003 | } else { |
3004 | lp->media = SPD_DET; | 3004 | lp->media = SPD_DET; |
3005 | if ((lp->infoblock_media == ANS) && | 3005 | if ((lp->infoblock_media == ANS) && |
3006 | ((sr=is_anc_capable(dev)) & MII_SR_ANC)) { | 3006 | ((sr=is_anc_capable(dev)) & MII_SR_ANC)) { |
3007 | ana = (((sr >> 6) & MII_ANA_TAF) | MII_ANA_CSMA); | 3007 | ana = (((sr >> 6) & MII_ANA_TAF) | MII_ANA_CSMA); |
3008 | ana &= (lp->fdx ? ~0 : ~MII_ANA_FDAM); | 3008 | ana &= (lp->fdx ? ~0 : ~MII_ANA_FDAM); |
@@ -3014,7 +3014,7 @@ dc2114x_autoconf(struct net_device *dev) | |||
3014 | next_tick = dc2114x_autoconf(dev); | 3014 | next_tick = dc2114x_autoconf(dev); |
3015 | } | 3015 | } |
3016 | break; | 3016 | break; |
3017 | 3017 | ||
3018 | case ANS: | 3018 | case ANS: |
3019 | switch (lp->local_state) { | 3019 | switch (lp->local_state) { |
3020 | case 0: | 3020 | case 0: |
@@ -3034,7 +3034,7 @@ dc2114x_autoconf(struct net_device *dev) | |||
3034 | next_tick = dc2114x_autoconf(dev); | 3034 | next_tick = dc2114x_autoconf(dev); |
3035 | } | 3035 | } |
3036 | break; | 3036 | break; |
3037 | 3037 | ||
3038 | case 1: | 3038 | case 1: |
3039 | if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) { | 3039 | if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) { |
3040 | next_tick = sr & ~TIMER_CB; | 3040 | next_tick = sr & ~TIMER_CB; |
@@ -3045,7 +3045,7 @@ dc2114x_autoconf(struct net_device *dev) | |||
3045 | lp->tmp = MII_SR_ASSC; | 3045 | lp->tmp = MII_SR_ASSC; |
3046 | anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII); | 3046 | anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII); |
3047 | ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); | 3047 | ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); |
3048 | if (!(anlpa & MII_ANLPA_RF) && | 3048 | if (!(anlpa & MII_ANLPA_RF) && |
3049 | (cap = anlpa & MII_ANLPA_TAF & ana)) { | 3049 | (cap = anlpa & MII_ANLPA_TAF & ana)) { |
3050 | if (cap & MII_ANA_100M) { | 3050 | if (cap & MII_ANA_100M) { |
3051 | lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) ? TRUE : FALSE); | 3051 | lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) ? TRUE : FALSE); |
@@ -3087,11 +3087,11 @@ dc2114x_autoconf(struct net_device *dev) | |||
3087 | next_tick = 3000; | 3087 | next_tick = 3000; |
3088 | } | 3088 | } |
3089 | break; | 3089 | break; |
3090 | 3090 | ||
3091 | case AUI_SUSPECT: | 3091 | case AUI_SUSPECT: |
3092 | next_tick = de4x5_suspect_state(dev, 1000, AUI, ping_media, dc2114x_autoconf); | 3092 | next_tick = de4x5_suspect_state(dev, 1000, AUI, ping_media, dc2114x_autoconf); |
3093 | break; | 3093 | break; |
3094 | 3094 | ||
3095 | case BNC: | 3095 | case BNC: |
3096 | switch (lp->local_state) { | 3096 | switch (lp->local_state) { |
3097 | case 0: | 3097 | case 0: |
@@ -3109,7 +3109,7 @@ dc2114x_autoconf(struct net_device *dev) | |||
3109 | next_tick = dc2114x_autoconf(dev); | 3109 | next_tick = dc2114x_autoconf(dev); |
3110 | } | 3110 | } |
3111 | break; | 3111 | break; |
3112 | 3112 | ||
3113 | case 1: | 3113 | case 1: |
3114 | if (!lp->tx_enable) { | 3114 | if (!lp->tx_enable) { |
3115 | if ((sts = ping_media(dev, 3000)) < 0) { | 3115 | if ((sts = ping_media(dev, 3000)) < 0) { |
@@ -3130,11 +3130,11 @@ dc2114x_autoconf(struct net_device *dev) | |||
3130 | break; | 3130 | break; |
3131 | } | 3131 | } |
3132 | break; | 3132 | break; |
3133 | 3133 | ||
3134 | case BNC_SUSPECT: | 3134 | case BNC_SUSPECT: |
3135 | next_tick = de4x5_suspect_state(dev, 1000, BNC, ping_media, dc2114x_autoconf); | 3135 | next_tick = de4x5_suspect_state(dev, 1000, BNC, ping_media, dc2114x_autoconf); |
3136 | break; | 3136 | break; |
3137 | 3137 | ||
3138 | case SPD_DET: /* Choose 10Mb/s or 100Mb/s */ | 3138 | case SPD_DET: /* Choose 10Mb/s or 100Mb/s */ |
3139 | if (srom_map_media(dev) < 0) { | 3139 | if (srom_map_media(dev) < 0) { |
3140 | lp->tcount++; | 3140 | lp->tcount++; |
@@ -3161,7 +3161,7 @@ dc2114x_autoconf(struct net_device *dev) | |||
3161 | next_tick = dc2114x_autoconf(dev); | 3161 | next_tick = dc2114x_autoconf(dev); |
3162 | } else if (((lp->media == _100Mb) && is_100_up(dev)) || | 3162 | } else if (((lp->media == _100Mb) && is_100_up(dev)) || |
3163 | (((lp->media == _10Mb) || (lp->media == TP) || | 3163 | (((lp->media == _10Mb) || (lp->media == TP) || |
3164 | (lp->media == BNC) || (lp->media == AUI)) && | 3164 | (lp->media == BNC) || (lp->media == AUI)) && |
3165 | is_10_up(dev))) { | 3165 | is_10_up(dev))) { |
3166 | next_tick = dc2114x_autoconf(dev); | 3166 | next_tick = dc2114x_autoconf(dev); |
3167 | } else { | 3167 | } else { |
@@ -3169,7 +3169,7 @@ dc2114x_autoconf(struct net_device *dev) | |||
3169 | lp->media = INIT; | 3169 | lp->media = INIT; |
3170 | } | 3170 | } |
3171 | break; | 3171 | break; |
3172 | 3172 | ||
3173 | case _10Mb: | 3173 | case _10Mb: |
3174 | next_tick = 3000; | 3174 | next_tick = 3000; |
3175 | if (!lp->tx_enable) { | 3175 | if (!lp->tx_enable) { |
@@ -3208,7 +3208,7 @@ printk("Huh?: media:%02x\n", lp->media); | |||
3208 | lp->media = INIT; | 3208 | lp->media = INIT; |
3209 | break; | 3209 | break; |
3210 | } | 3210 | } |
3211 | 3211 | ||
3212 | return next_tick; | 3212 | return next_tick; |
3213 | } | 3213 | } |
3214 | 3214 | ||
@@ -3231,7 +3231,7 @@ srom_map_media(struct net_device *dev) | |||
3231 | struct de4x5_private *lp = netdev_priv(dev); | 3231 | struct de4x5_private *lp = netdev_priv(dev); |
3232 | 3232 | ||
3233 | lp->fdx = 0; | 3233 | lp->fdx = 0; |
3234 | if (lp->infoblock_media == lp->media) | 3234 | if (lp->infoblock_media == lp->media) |
3235 | return 0; | 3235 | return 0; |
3236 | 3236 | ||
3237 | switch(lp->infoblock_media) { | 3237 | switch(lp->infoblock_media) { |
@@ -3270,7 +3270,7 @@ srom_map_media(struct net_device *dev) | |||
3270 | case SROM_100BASEFF: | 3270 | case SROM_100BASEFF: |
3271 | if (!lp->params.fdx) return -1; | 3271 | if (!lp->params.fdx) return -1; |
3272 | lp->fdx = TRUE; | 3272 | lp->fdx = TRUE; |
3273 | case SROM_100BASEF: | 3273 | case SROM_100BASEF: |
3274 | if (lp->params.fdx && !lp->fdx) return -1; | 3274 | if (lp->params.fdx && !lp->fdx) return -1; |
3275 | lp->media = _100Mb; | 3275 | lp->media = _100Mb; |
3276 | break; | 3276 | break; |
@@ -3280,8 +3280,8 @@ srom_map_media(struct net_device *dev) | |||
3280 | lp->fdx = lp->params.fdx; | 3280 | lp->fdx = lp->params.fdx; |
3281 | break; | 3281 | break; |
3282 | 3282 | ||
3283 | default: | 3283 | default: |
3284 | printk("%s: Bad media code [%d] detected in SROM!\n", dev->name, | 3284 | printk("%s: Bad media code [%d] detected in SROM!\n", dev->name, |
3285 | lp->infoblock_media); | 3285 | lp->infoblock_media); |
3286 | return -1; | 3286 | return -1; |
3287 | break; | 3287 | break; |
@@ -3359,7 +3359,7 @@ test_media(struct net_device *dev, s32 irqs, s32 irq_mask, s32 csr13, s32 csr14, | |||
3359 | struct de4x5_private *lp = netdev_priv(dev); | 3359 | struct de4x5_private *lp = netdev_priv(dev); |
3360 | u_long iobase = dev->base_addr; | 3360 | u_long iobase = dev->base_addr; |
3361 | s32 sts, csr12; | 3361 | s32 sts, csr12; |
3362 | 3362 | ||
3363 | if (lp->timeout < 0) { | 3363 | if (lp->timeout < 0) { |
3364 | lp->timeout = msec/100; | 3364 | lp->timeout = msec/100; |
3365 | if (!lp->useSROM) { /* Already done if by SROM, else dc2104[01] */ | 3365 | if (!lp->useSROM) { /* Already done if by SROM, else dc2104[01] */ |
@@ -3372,22 +3372,22 @@ test_media(struct net_device *dev, s32 irqs, s32 irq_mask, s32 csr13, s32 csr14, | |||
3372 | /* clear all pending interrupts */ | 3372 | /* clear all pending interrupts */ |
3373 | sts = inl(DE4X5_STS); | 3373 | sts = inl(DE4X5_STS); |
3374 | outl(sts, DE4X5_STS); | 3374 | outl(sts, DE4X5_STS); |
3375 | 3375 | ||
3376 | /* clear csr12 NRA and SRA bits */ | 3376 | /* clear csr12 NRA and SRA bits */ |
3377 | if ((lp->chipset == DC21041) || lp->useSROM) { | 3377 | if ((lp->chipset == DC21041) || lp->useSROM) { |
3378 | csr12 = inl(DE4X5_SISR); | 3378 | csr12 = inl(DE4X5_SISR); |
3379 | outl(csr12, DE4X5_SISR); | 3379 | outl(csr12, DE4X5_SISR); |
3380 | } | 3380 | } |
3381 | } | 3381 | } |
3382 | 3382 | ||
3383 | sts = inl(DE4X5_STS) & ~TIMER_CB; | 3383 | sts = inl(DE4X5_STS) & ~TIMER_CB; |
3384 | 3384 | ||
3385 | if (!(sts & irqs) && --lp->timeout) { | 3385 | if (!(sts & irqs) && --lp->timeout) { |
3386 | sts = 100 | TIMER_CB; | 3386 | sts = 100 | TIMER_CB; |
3387 | } else { | 3387 | } else { |
3388 | lp->timeout = -1; | 3388 | lp->timeout = -1; |
3389 | } | 3389 | } |
3390 | 3390 | ||
3391 | return sts; | 3391 | return sts; |
3392 | } | 3392 | } |
3393 | 3393 | ||
@@ -3397,11 +3397,11 @@ test_tp(struct net_device *dev, s32 msec) | |||
3397 | struct de4x5_private *lp = netdev_priv(dev); | 3397 | struct de4x5_private *lp = netdev_priv(dev); |
3398 | u_long iobase = dev->base_addr; | 3398 | u_long iobase = dev->base_addr; |
3399 | int sisr; | 3399 | int sisr; |
3400 | 3400 | ||
3401 | if (lp->timeout < 0) { | 3401 | if (lp->timeout < 0) { |
3402 | lp->timeout = msec/100; | 3402 | lp->timeout = msec/100; |
3403 | } | 3403 | } |
3404 | 3404 | ||
3405 | sisr = (inl(DE4X5_SISR) & ~TIMER_CB) & (SISR_LKF | SISR_NCR); | 3405 | sisr = (inl(DE4X5_SISR) & ~TIMER_CB) & (SISR_LKF | SISR_NCR); |
3406 | 3406 | ||
3407 | if (sisr && --lp->timeout) { | 3407 | if (sisr && --lp->timeout) { |
@@ -3409,7 +3409,7 @@ test_tp(struct net_device *dev, s32 msec) | |||
3409 | } else { | 3409 | } else { |
3410 | lp->timeout = -1; | 3410 | lp->timeout = -1; |
3411 | } | 3411 | } |
3412 | 3412 | ||
3413 | return sisr; | 3413 | return sisr; |
3414 | } | 3414 | } |
3415 | 3415 | ||
@@ -3436,7 +3436,7 @@ test_for_100Mb(struct net_device *dev, int msec) | |||
3436 | lp->timeout = msec/SAMPLE_INTERVAL; | 3436 | lp->timeout = msec/SAMPLE_INTERVAL; |
3437 | } | 3437 | } |
3438 | } | 3438 | } |
3439 | 3439 | ||
3440 | if (lp->phy[lp->active].id || lp->useSROM) { | 3440 | if (lp->phy[lp->active].id || lp->useSROM) { |
3441 | gep = is_100_up(dev) | is_spd_100(dev); | 3441 | gep = is_100_up(dev) | is_spd_100(dev); |
3442 | } else { | 3442 | } else { |
@@ -3447,7 +3447,7 @@ test_for_100Mb(struct net_device *dev, int msec) | |||
3447 | } else { | 3447 | } else { |
3448 | lp->timeout = -1; | 3448 | lp->timeout = -1; |
3449 | } | 3449 | } |
3450 | 3450 | ||
3451 | return gep; | 3451 | return gep; |
3452 | } | 3452 | } |
3453 | 3453 | ||
@@ -3459,13 +3459,13 @@ wait_for_link(struct net_device *dev) | |||
3459 | if (lp->timeout < 0) { | 3459 | if (lp->timeout < 0) { |
3460 | lp->timeout = 1; | 3460 | lp->timeout = 1; |
3461 | } | 3461 | } |
3462 | 3462 | ||
3463 | if (lp->timeout--) { | 3463 | if (lp->timeout--) { |
3464 | return TIMER_CB; | 3464 | return TIMER_CB; |
3465 | } else { | 3465 | } else { |
3466 | lp->timeout = -1; | 3466 | lp->timeout = -1; |
3467 | } | 3467 | } |
3468 | 3468 | ||
3469 | return 0; | 3469 | return 0; |
3470 | } | 3470 | } |
3471 | 3471 | ||
@@ -3479,21 +3479,21 @@ test_mii_reg(struct net_device *dev, int reg, int mask, int pol, long msec) | |||
3479 | struct de4x5_private *lp = netdev_priv(dev); | 3479 | struct de4x5_private *lp = netdev_priv(dev); |
3480 | int test; | 3480 | int test; |
3481 | u_long iobase = dev->base_addr; | 3481 | u_long iobase = dev->base_addr; |
3482 | 3482 | ||
3483 | if (lp->timeout < 0) { | 3483 | if (lp->timeout < 0) { |
3484 | lp->timeout = msec/100; | 3484 | lp->timeout = msec/100; |
3485 | } | 3485 | } |
3486 | 3486 | ||
3487 | if (pol) pol = ~0; | 3487 | if (pol) pol = ~0; |
3488 | reg = mii_rd((u_char)reg, lp->phy[lp->active].addr, DE4X5_MII) & mask; | 3488 | reg = mii_rd((u_char)reg, lp->phy[lp->active].addr, DE4X5_MII) & mask; |
3489 | test = (reg ^ pol) & mask; | 3489 | test = (reg ^ pol) & mask; |
3490 | 3490 | ||
3491 | if (test && --lp->timeout) { | 3491 | if (test && --lp->timeout) { |
3492 | reg = 100 | TIMER_CB; | 3492 | reg = 100 | TIMER_CB; |
3493 | } else { | 3493 | } else { |
3494 | lp->timeout = -1; | 3494 | lp->timeout = -1; |
3495 | } | 3495 | } |
3496 | 3496 | ||
3497 | return reg; | 3497 | return reg; |
3498 | } | 3498 | } |
3499 | 3499 | ||
@@ -3503,7 +3503,7 @@ is_spd_100(struct net_device *dev) | |||
3503 | struct de4x5_private *lp = netdev_priv(dev); | 3503 | struct de4x5_private *lp = netdev_priv(dev); |
3504 | u_long iobase = dev->base_addr; | 3504 | u_long iobase = dev->base_addr; |
3505 | int spd; | 3505 | int spd; |
3506 | 3506 | ||
3507 | if (lp->useMII) { | 3507 | if (lp->useMII) { |
3508 | spd = mii_rd(lp->phy[lp->active].spd.reg, lp->phy[lp->active].addr, DE4X5_MII); | 3508 | spd = mii_rd(lp->phy[lp->active].spd.reg, lp->phy[lp->active].addr, DE4X5_MII); |
3509 | spd = ~(spd ^ lp->phy[lp->active].spd.value); | 3509 | spd = ~(spd ^ lp->phy[lp->active].spd.value); |
@@ -3517,7 +3517,7 @@ is_spd_100(struct net_device *dev) | |||
3517 | spd = (lp->asBitValid & (lp->asPolarity ^ (gep_rd(dev) & lp->asBit))) | | 3517 | spd = (lp->asBitValid & (lp->asPolarity ^ (gep_rd(dev) & lp->asBit))) | |
3518 | (lp->linkOK & ~lp->asBitValid); | 3518 | (lp->linkOK & ~lp->asBitValid); |
3519 | } | 3519 | } |
3520 | 3520 | ||
3521 | return spd; | 3521 | return spd; |
3522 | } | 3522 | } |
3523 | 3523 | ||
@@ -3526,7 +3526,7 @@ is_100_up(struct net_device *dev) | |||
3526 | { | 3526 | { |
3527 | struct de4x5_private *lp = netdev_priv(dev); | 3527 | struct de4x5_private *lp = netdev_priv(dev); |
3528 | u_long iobase = dev->base_addr; | 3528 | u_long iobase = dev->base_addr; |
3529 | 3529 | ||
3530 | if (lp->useMII) { | 3530 | if (lp->useMII) { |
3531 | /* Double read for sticky bits & temporary drops */ | 3531 | /* Double read for sticky bits & temporary drops */ |
3532 | mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); | 3532 | mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); |
@@ -3547,7 +3547,7 @@ is_10_up(struct net_device *dev) | |||
3547 | { | 3547 | { |
3548 | struct de4x5_private *lp = netdev_priv(dev); | 3548 | struct de4x5_private *lp = netdev_priv(dev); |
3549 | u_long iobase = dev->base_addr; | 3549 | u_long iobase = dev->base_addr; |
3550 | 3550 | ||
3551 | if (lp->useMII) { | 3551 | if (lp->useMII) { |
3552 | /* Double read for sticky bits & temporary drops */ | 3552 | /* Double read for sticky bits & temporary drops */ |
3553 | mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); | 3553 | mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); |
@@ -3570,7 +3570,7 @@ is_anc_capable(struct net_device *dev) | |||
3570 | { | 3570 | { |
3571 | struct de4x5_private *lp = netdev_priv(dev); | 3571 | struct de4x5_private *lp = netdev_priv(dev); |
3572 | u_long iobase = dev->base_addr; | 3572 | u_long iobase = dev->base_addr; |
3573 | 3573 | ||
3574 | if (lp->phy[lp->active].id && (!lp->useSROM || lp->useMII)) { | 3574 | if (lp->phy[lp->active].id && (!lp->useSROM || lp->useMII)) { |
3575 | return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII)); | 3575 | return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII)); |
3576 | } else if ((lp->chipset & ~0x00ff) == DC2114x) { | 3576 | } else if ((lp->chipset & ~0x00ff) == DC2114x) { |
@@ -3590,24 +3590,24 @@ ping_media(struct net_device *dev, int msec) | |||
3590 | struct de4x5_private *lp = netdev_priv(dev); | 3590 | struct de4x5_private *lp = netdev_priv(dev); |
3591 | u_long iobase = dev->base_addr; | 3591 | u_long iobase = dev->base_addr; |
3592 | int sisr; | 3592 | int sisr; |
3593 | 3593 | ||
3594 | if (lp->timeout < 0) { | 3594 | if (lp->timeout < 0) { |
3595 | lp->timeout = msec/100; | 3595 | lp->timeout = msec/100; |
3596 | 3596 | ||
3597 | lp->tmp = lp->tx_new; /* Remember the ring position */ | 3597 | lp->tmp = lp->tx_new; /* Remember the ring position */ |
3598 | load_packet(dev, lp->frame, TD_LS | TD_FS | sizeof(lp->frame), (struct sk_buff *)1); | 3598 | load_packet(dev, lp->frame, TD_LS | TD_FS | sizeof(lp->frame), (struct sk_buff *)1); |
3599 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; | 3599 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; |
3600 | outl(POLL_DEMAND, DE4X5_TPD); | 3600 | outl(POLL_DEMAND, DE4X5_TPD); |
3601 | } | 3601 | } |
3602 | 3602 | ||
3603 | sisr = inl(DE4X5_SISR); | 3603 | sisr = inl(DE4X5_SISR); |
3604 | 3604 | ||
3605 | if ((!(sisr & SISR_NCR)) && | 3605 | if ((!(sisr & SISR_NCR)) && |
3606 | ((s32)le32_to_cpu(lp->tx_ring[lp->tmp].status) < 0) && | 3606 | ((s32)le32_to_cpu(lp->tx_ring[lp->tmp].status) < 0) && |
3607 | (--lp->timeout)) { | 3607 | (--lp->timeout)) { |
3608 | sisr = 100 | TIMER_CB; | 3608 | sisr = 100 | TIMER_CB; |
3609 | } else { | 3609 | } else { |
3610 | if ((!(sisr & SISR_NCR)) && | 3610 | if ((!(sisr & SISR_NCR)) && |
3611 | !(le32_to_cpu(lp->tx_ring[lp->tmp].status) & (T_OWN | TD_ES)) && | 3611 | !(le32_to_cpu(lp->tx_ring[lp->tmp].status) & (T_OWN | TD_ES)) && |
3612 | lp->timeout) { | 3612 | lp->timeout) { |
3613 | sisr = 0; | 3613 | sisr = 0; |
@@ -3616,7 +3616,7 @@ ping_media(struct net_device *dev, int msec) | |||
3616 | } | 3616 | } |
3617 | lp->timeout = -1; | 3617 | lp->timeout = -1; |
3618 | } | 3618 | } |
3619 | 3619 | ||
3620 | return sisr; | 3620 | return sisr; |
3621 | } | 3621 | } |
3622 | 3622 | ||
@@ -3668,7 +3668,7 @@ de4x5_alloc_rx_buff(struct net_device *dev, int index, int len) | |||
3668 | } else { /* Linear buffer */ | 3668 | } else { /* Linear buffer */ |
3669 | memcpy(skb_put(p,len),lp->rx_bufs + lp->rx_old * RX_BUFF_SZ,len); | 3669 | memcpy(skb_put(p,len),lp->rx_bufs + lp->rx_old * RX_BUFF_SZ,len); |
3670 | } | 3670 | } |
3671 | 3671 | ||
3672 | return p; | 3672 | return p; |
3673 | #endif | 3673 | #endif |
3674 | } | 3674 | } |
@@ -3751,23 +3751,23 @@ de4x5_rst_desc_ring(struct net_device *dev) | |||
3751 | outl(lp->dma_rings, DE4X5_RRBA); | 3751 | outl(lp->dma_rings, DE4X5_RRBA); |
3752 | outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), | 3752 | outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), |
3753 | DE4X5_TRBA); | 3753 | DE4X5_TRBA); |
3754 | 3754 | ||
3755 | lp->rx_new = lp->rx_old = 0; | 3755 | lp->rx_new = lp->rx_old = 0; |
3756 | lp->tx_new = lp->tx_old = 0; | 3756 | lp->tx_new = lp->tx_old = 0; |
3757 | 3757 | ||
3758 | for (i = 0; i < lp->rxRingSize; i++) { | 3758 | for (i = 0; i < lp->rxRingSize; i++) { |
3759 | lp->rx_ring[i].status = cpu_to_le32(R_OWN); | 3759 | lp->rx_ring[i].status = cpu_to_le32(R_OWN); |
3760 | } | 3760 | } |
3761 | 3761 | ||
3762 | for (i = 0; i < lp->txRingSize; i++) { | 3762 | for (i = 0; i < lp->txRingSize; i++) { |
3763 | lp->tx_ring[i].status = cpu_to_le32(0); | 3763 | lp->tx_ring[i].status = cpu_to_le32(0); |
3764 | } | 3764 | } |
3765 | 3765 | ||
3766 | barrier(); | 3766 | barrier(); |
3767 | lp->cache.save_cnt--; | 3767 | lp->cache.save_cnt--; |
3768 | START_DE4X5; | 3768 | START_DE4X5; |
3769 | } | 3769 | } |
3770 | 3770 | ||
3771 | return; | 3771 | return; |
3772 | } | 3772 | } |
3773 | 3773 | ||
@@ -3792,7 +3792,7 @@ de4x5_cache_state(struct net_device *dev, int flag) | |||
3792 | gep_wr(lp->cache.gepc, dev); | 3792 | gep_wr(lp->cache.gepc, dev); |
3793 | gep_wr(lp->cache.gep, dev); | 3793 | gep_wr(lp->cache.gep, dev); |
3794 | } else { | 3794 | } else { |
3795 | reset_init_sia(dev, lp->cache.csr13, lp->cache.csr14, | 3795 | reset_init_sia(dev, lp->cache.csr13, lp->cache.csr14, |
3796 | lp->cache.csr15); | 3796 | lp->cache.csr15); |
3797 | } | 3797 | } |
3798 | break; | 3798 | break; |
@@ -3854,25 +3854,25 @@ test_ans(struct net_device *dev, s32 irqs, s32 irq_mask, s32 msec) | |||
3854 | struct de4x5_private *lp = netdev_priv(dev); | 3854 | struct de4x5_private *lp = netdev_priv(dev); |
3855 | u_long iobase = dev->base_addr; | 3855 | u_long iobase = dev->base_addr; |
3856 | s32 sts, ans; | 3856 | s32 sts, ans; |
3857 | 3857 | ||
3858 | if (lp->timeout < 0) { | 3858 | if (lp->timeout < 0) { |
3859 | lp->timeout = msec/100; | 3859 | lp->timeout = msec/100; |
3860 | outl(irq_mask, DE4X5_IMR); | 3860 | outl(irq_mask, DE4X5_IMR); |
3861 | 3861 | ||
3862 | /* clear all pending interrupts */ | 3862 | /* clear all pending interrupts */ |
3863 | sts = inl(DE4X5_STS); | 3863 | sts = inl(DE4X5_STS); |
3864 | outl(sts, DE4X5_STS); | 3864 | outl(sts, DE4X5_STS); |
3865 | } | 3865 | } |
3866 | 3866 | ||
3867 | ans = inl(DE4X5_SISR) & SISR_ANS; | 3867 | ans = inl(DE4X5_SISR) & SISR_ANS; |
3868 | sts = inl(DE4X5_STS) & ~TIMER_CB; | 3868 | sts = inl(DE4X5_STS) & ~TIMER_CB; |
3869 | 3869 | ||
3870 | if (!(sts & irqs) && (ans ^ ANS_NWOK) && --lp->timeout) { | 3870 | if (!(sts & irqs) && (ans ^ ANS_NWOK) && --lp->timeout) { |
3871 | sts = 100 | TIMER_CB; | 3871 | sts = 100 | TIMER_CB; |
3872 | } else { | 3872 | } else { |
3873 | lp->timeout = -1; | 3873 | lp->timeout = -1; |
3874 | } | 3874 | } |
3875 | 3875 | ||
3876 | return sts; | 3876 | return sts; |
3877 | } | 3877 | } |
3878 | 3878 | ||
@@ -3882,7 +3882,7 @@ de4x5_setup_intr(struct net_device *dev) | |||
3882 | struct de4x5_private *lp = netdev_priv(dev); | 3882 | struct de4x5_private *lp = netdev_priv(dev); |
3883 | u_long iobase = dev->base_addr; | 3883 | u_long iobase = dev->base_addr; |
3884 | s32 imr, sts; | 3884 | s32 imr, sts; |
3885 | 3885 | ||
3886 | if (inl(DE4X5_OMR) & OMR_SR) { /* Only unmask if TX/RX is enabled */ | 3886 | if (inl(DE4X5_OMR) & OMR_SR) { /* Only unmask if TX/RX is enabled */ |
3887 | imr = 0; | 3887 | imr = 0; |
3888 | UNMASK_IRQs; | 3888 | UNMASK_IRQs; |
@@ -3890,7 +3890,7 @@ de4x5_setup_intr(struct net_device *dev) | |||
3890 | outl(sts, DE4X5_STS); | 3890 | outl(sts, DE4X5_STS); |
3891 | ENABLE_IRQs; | 3891 | ENABLE_IRQs; |
3892 | } | 3892 | } |
3893 | 3893 | ||
3894 | return; | 3894 | return; |
3895 | } | 3895 | } |
3896 | 3896 | ||
@@ -3936,17 +3936,17 @@ create_packet(struct net_device *dev, char *frame, int len) | |||
3936 | { | 3936 | { |
3937 | int i; | 3937 | int i; |
3938 | char *buf = frame; | 3938 | char *buf = frame; |
3939 | 3939 | ||
3940 | for (i=0; i<ETH_ALEN; i++) { /* Use this source address */ | 3940 | for (i=0; i<ETH_ALEN; i++) { /* Use this source address */ |
3941 | *buf++ = dev->dev_addr[i]; | 3941 | *buf++ = dev->dev_addr[i]; |
3942 | } | 3942 | } |
3943 | for (i=0; i<ETH_ALEN; i++) { /* Use this destination address */ | 3943 | for (i=0; i<ETH_ALEN; i++) { /* Use this destination address */ |
3944 | *buf++ = dev->dev_addr[i]; | 3944 | *buf++ = dev->dev_addr[i]; |
3945 | } | 3945 | } |
3946 | 3946 | ||
3947 | *buf++ = 0; /* Packet length (2 bytes) */ | 3947 | *buf++ = 0; /* Packet length (2 bytes) */ |
3948 | *buf++ = 1; | 3948 | *buf++ = 1; |
3949 | 3949 | ||
3950 | return; | 3950 | return; |
3951 | } | 3951 | } |
3952 | 3952 | ||
@@ -3978,7 +3978,7 @@ static int | |||
3978 | PCI_signature(char *name, struct de4x5_private *lp) | 3978 | PCI_signature(char *name, struct de4x5_private *lp) |
3979 | { | 3979 | { |
3980 | int i, status = 0, siglen = sizeof(de4x5_signatures)/sizeof(c_char *); | 3980 | int i, status = 0, siglen = sizeof(de4x5_signatures)/sizeof(c_char *); |
3981 | 3981 | ||
3982 | if (lp->chipset == DC21040) { | 3982 | if (lp->chipset == DC21040) { |
3983 | strcpy(name, "DE434/5"); | 3983 | strcpy(name, "DE434/5"); |
3984 | return status; | 3984 | return status; |
@@ -4007,7 +4007,7 @@ PCI_signature(char *name, struct de4x5_private *lp) | |||
4007 | } else if ((lp->chipset & ~0x00ff) == DC2114x) { | 4007 | } else if ((lp->chipset & ~0x00ff) == DC2114x) { |
4008 | lp->useSROM = TRUE; | 4008 | lp->useSROM = TRUE; |
4009 | } | 4009 | } |
4010 | 4010 | ||
4011 | return status; | 4011 | return status; |
4012 | } | 4012 | } |
4013 | 4013 | ||
@@ -4024,7 +4024,7 @@ DevicePresent(struct net_device *dev, u_long aprom_addr) | |||
4024 | { | 4024 | { |
4025 | int i, j=0; | 4025 | int i, j=0; |
4026 | struct de4x5_private *lp = netdev_priv(dev); | 4026 | struct de4x5_private *lp = netdev_priv(dev); |
4027 | 4027 | ||
4028 | if (lp->chipset == DC21040) { | 4028 | if (lp->chipset == DC21040) { |
4029 | if (lp->bus == EISA) { | 4029 | if (lp->bus == EISA) { |
4030 | enet_addr_rst(aprom_addr); /* Reset Ethernet Address ROM Pointer */ | 4030 | enet_addr_rst(aprom_addr); /* Reset Ethernet Address ROM Pointer */ |
@@ -4049,7 +4049,7 @@ DevicePresent(struct net_device *dev, u_long aprom_addr) | |||
4049 | } | 4049 | } |
4050 | de4x5_dbg_srom((struct de4x5_srom *)&lp->srom); | 4050 | de4x5_dbg_srom((struct de4x5_srom *)&lp->srom); |
4051 | } | 4051 | } |
4052 | 4052 | ||
4053 | return; | 4053 | return; |
4054 | } | 4054 | } |
4055 | 4055 | ||
@@ -4071,11 +4071,11 @@ enet_addr_rst(u_long aprom_addr) | |||
4071 | short sigLength=0; | 4071 | short sigLength=0; |
4072 | s8 data; | 4072 | s8 data; |
4073 | int i, j; | 4073 | int i, j; |
4074 | 4074 | ||
4075 | dev.llsig.a = ETH_PROM_SIG; | 4075 | dev.llsig.a = ETH_PROM_SIG; |
4076 | dev.llsig.b = ETH_PROM_SIG; | 4076 | dev.llsig.b = ETH_PROM_SIG; |
4077 | sigLength = sizeof(u32) << 1; | 4077 | sigLength = sizeof(u32) << 1; |
4078 | 4078 | ||
4079 | for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) { | 4079 | for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) { |
4080 | data = inb(aprom_addr); | 4080 | data = inb(aprom_addr); |
4081 | if (dev.Sig[j] == data) { /* track signature */ | 4081 | if (dev.Sig[j] == data) { /* track signature */ |
@@ -4088,7 +4088,7 @@ enet_addr_rst(u_long aprom_addr) | |||
4088 | } | 4088 | } |
4089 | } | 4089 | } |
4090 | } | 4090 | } |
4091 | 4091 | ||
4092 | return; | 4092 | return; |
4093 | } | 4093 | } |
4094 | 4094 | ||
@@ -4111,7 +4111,7 @@ get_hw_addr(struct net_device *dev) | |||
4111 | for (i=0,k=0,j=0;j<3;j++) { | 4111 | for (i=0,k=0,j=0;j<3;j++) { |
4112 | k <<= 1; | 4112 | k <<= 1; |
4113 | if (k > 0xffff) k-=0xffff; | 4113 | if (k > 0xffff) k-=0xffff; |
4114 | 4114 | ||
4115 | if (lp->bus == PCI) { | 4115 | if (lp->bus == PCI) { |
4116 | if (lp->chipset == DC21040) { | 4116 | if (lp->chipset == DC21040) { |
4117 | while ((tmp = inl(DE4X5_APROM)) < 0); | 4117 | while ((tmp = inl(DE4X5_APROM)) < 0); |
@@ -4133,11 +4133,11 @@ get_hw_addr(struct net_device *dev) | |||
4133 | k += (u_short) ((tmp = inb(EISA_APROM)) << 8); | 4133 | k += (u_short) ((tmp = inb(EISA_APROM)) << 8); |
4134 | dev->dev_addr[i++] = (u_char) tmp; | 4134 | dev->dev_addr[i++] = (u_char) tmp; |
4135 | } | 4135 | } |
4136 | 4136 | ||
4137 | if (k > 0xffff) k-=0xffff; | 4137 | if (k > 0xffff) k-=0xffff; |
4138 | } | 4138 | } |
4139 | if (k == 0xffff) k=0; | 4139 | if (k == 0xffff) k=0; |
4140 | 4140 | ||
4141 | if (lp->bus == PCI) { | 4141 | if (lp->bus == PCI) { |
4142 | if (lp->chipset == DC21040) { | 4142 | if (lp->chipset == DC21040) { |
4143 | while ((tmp = inl(DE4X5_APROM)) < 0); | 4143 | while ((tmp = inl(DE4X5_APROM)) < 0); |
@@ -4156,7 +4156,7 @@ get_hw_addr(struct net_device *dev) | |||
4156 | srom_repair(dev, broken); | 4156 | srom_repair(dev, broken); |
4157 | 4157 | ||
4158 | #ifdef CONFIG_PPC_MULTIPLATFORM | 4158 | #ifdef CONFIG_PPC_MULTIPLATFORM |
4159 | /* | 4159 | /* |
4160 | ** If the address starts with 00 a0, we have to bit-reverse | 4160 | ** If the address starts with 00 a0, we have to bit-reverse |
4161 | ** each byte of the address. | 4161 | ** each byte of the address. |
4162 | */ | 4162 | */ |
@@ -4245,7 +4245,7 @@ test_bad_enet(struct net_device *dev, int status) | |||
4245 | 4245 | ||
4246 | for (tmp=0,i=0; i<ETH_ALEN; i++) tmp += (u_char)dev->dev_addr[i]; | 4246 | for (tmp=0,i=0; i<ETH_ALEN; i++) tmp += (u_char)dev->dev_addr[i]; |
4247 | if ((tmp == 0) || (tmp == 0x5fa)) { | 4247 | if ((tmp == 0) || (tmp == 0x5fa)) { |
4248 | if ((lp->chipset == last.chipset) && | 4248 | if ((lp->chipset == last.chipset) && |
4249 | (lp->bus_num == last.bus) && (lp->bus_num > 0)) { | 4249 | (lp->bus_num == last.bus) && (lp->bus_num > 0)) { |
4250 | for (i=0; i<ETH_ALEN; i++) dev->dev_addr[i] = last.addr[i]; | 4250 | for (i=0; i<ETH_ALEN; i++) dev->dev_addr[i] = last.addr[i]; |
4251 | for (i=ETH_ALEN-1; i>2; --i) { | 4251 | for (i=ETH_ALEN-1; i>2; --i) { |
@@ -4275,7 +4275,7 @@ test_bad_enet(struct net_device *dev, int status) | |||
4275 | static int | 4275 | static int |
4276 | an_exception(struct de4x5_private *lp) | 4276 | an_exception(struct de4x5_private *lp) |
4277 | { | 4277 | { |
4278 | if ((*(u_short *)lp->srom.sub_vendor_id == 0x00c0) && | 4278 | if ((*(u_short *)lp->srom.sub_vendor_id == 0x00c0) && |
4279 | (*(u_short *)lp->srom.sub_system_id == 0x95e0)) { | 4279 | (*(u_short *)lp->srom.sub_system_id == 0x95e0)) { |
4280 | return -1; | 4280 | return -1; |
4281 | } | 4281 | } |
@@ -4290,11 +4290,11 @@ static short | |||
4290 | srom_rd(u_long addr, u_char offset) | 4290 | srom_rd(u_long addr, u_char offset) |
4291 | { | 4291 | { |
4292 | sendto_srom(SROM_RD | SROM_SR, addr); | 4292 | sendto_srom(SROM_RD | SROM_SR, addr); |
4293 | 4293 | ||
4294 | srom_latch(SROM_RD | SROM_SR | DT_CS, addr); | 4294 | srom_latch(SROM_RD | SROM_SR | DT_CS, addr); |
4295 | srom_command(SROM_RD | SROM_SR | DT_IN | DT_CS, addr); | 4295 | srom_command(SROM_RD | SROM_SR | DT_IN | DT_CS, addr); |
4296 | srom_address(SROM_RD | SROM_SR | DT_CS, addr, offset); | 4296 | srom_address(SROM_RD | SROM_SR | DT_CS, addr, offset); |
4297 | 4297 | ||
4298 | return srom_data(SROM_RD | SROM_SR | DT_CS, addr); | 4298 | return srom_data(SROM_RD | SROM_SR | DT_CS, addr); |
4299 | } | 4299 | } |
4300 | 4300 | ||
@@ -4304,7 +4304,7 @@ srom_latch(u_int command, u_long addr) | |||
4304 | sendto_srom(command, addr); | 4304 | sendto_srom(command, addr); |
4305 | sendto_srom(command | DT_CLK, addr); | 4305 | sendto_srom(command | DT_CLK, addr); |
4306 | sendto_srom(command, addr); | 4306 | sendto_srom(command, addr); |
4307 | 4307 | ||
4308 | return; | 4308 | return; |
4309 | } | 4309 | } |
4310 | 4310 | ||
@@ -4314,7 +4314,7 @@ srom_command(u_int command, u_long addr) | |||
4314 | srom_latch(command, addr); | 4314 | srom_latch(command, addr); |
4315 | srom_latch(command, addr); | 4315 | srom_latch(command, addr); |
4316 | srom_latch((command & 0x0000ff00) | DT_CS, addr); | 4316 | srom_latch((command & 0x0000ff00) | DT_CS, addr); |
4317 | 4317 | ||
4318 | return; | 4318 | return; |
4319 | } | 4319 | } |
4320 | 4320 | ||
@@ -4322,15 +4322,15 @@ static void | |||
4322 | srom_address(u_int command, u_long addr, u_char offset) | 4322 | srom_address(u_int command, u_long addr, u_char offset) |
4323 | { | 4323 | { |
4324 | int i, a; | 4324 | int i, a; |
4325 | 4325 | ||
4326 | a = offset << 2; | 4326 | a = offset << 2; |
4327 | for (i=0; i<6; i++, a <<= 1) { | 4327 | for (i=0; i<6; i++, a <<= 1) { |
4328 | srom_latch(command | ((a & 0x80) ? DT_IN : 0), addr); | 4328 | srom_latch(command | ((a & 0x80) ? DT_IN : 0), addr); |
4329 | } | 4329 | } |
4330 | udelay(1); | 4330 | udelay(1); |
4331 | 4331 | ||
4332 | i = (getfrom_srom(addr) >> 3) & 0x01; | 4332 | i = (getfrom_srom(addr) >> 3) & 0x01; |
4333 | 4333 | ||
4334 | return; | 4334 | return; |
4335 | } | 4335 | } |
4336 | 4336 | ||
@@ -4340,17 +4340,17 @@ srom_data(u_int command, u_long addr) | |||
4340 | int i; | 4340 | int i; |
4341 | short word = 0; | 4341 | short word = 0; |
4342 | s32 tmp; | 4342 | s32 tmp; |
4343 | 4343 | ||
4344 | for (i=0; i<16; i++) { | 4344 | for (i=0; i<16; i++) { |
4345 | sendto_srom(command | DT_CLK, addr); | 4345 | sendto_srom(command | DT_CLK, addr); |
4346 | tmp = getfrom_srom(addr); | 4346 | tmp = getfrom_srom(addr); |
4347 | sendto_srom(command, addr); | 4347 | sendto_srom(command, addr); |
4348 | 4348 | ||
4349 | word = (word << 1) | ((tmp >> 3) & 0x01); | 4349 | word = (word << 1) | ((tmp >> 3) & 0x01); |
4350 | } | 4350 | } |
4351 | 4351 | ||
4352 | sendto_srom(command & 0x0000ff00, addr); | 4352 | sendto_srom(command & 0x0000ff00, addr); |
4353 | 4353 | ||
4354 | return word; | 4354 | return word; |
4355 | } | 4355 | } |
4356 | 4356 | ||
@@ -4359,13 +4359,13 @@ static void | |||
4359 | srom_busy(u_int command, u_long addr) | 4359 | srom_busy(u_int command, u_long addr) |
4360 | { | 4360 | { |
4361 | sendto_srom((command & 0x0000ff00) | DT_CS, addr); | 4361 | sendto_srom((command & 0x0000ff00) | DT_CS, addr); |
4362 | 4362 | ||
4363 | while (!((getfrom_srom(addr) >> 3) & 0x01)) { | 4363 | while (!((getfrom_srom(addr) >> 3) & 0x01)) { |
4364 | mdelay(1); | 4364 | mdelay(1); |
4365 | } | 4365 | } |
4366 | 4366 | ||
4367 | sendto_srom(command & 0x0000ff00, addr); | 4367 | sendto_srom(command & 0x0000ff00, addr); |
4368 | 4368 | ||
4369 | return; | 4369 | return; |
4370 | } | 4370 | } |
4371 | */ | 4371 | */ |
@@ -4375,7 +4375,7 @@ sendto_srom(u_int command, u_long addr) | |||
4375 | { | 4375 | { |
4376 | outl(command, addr); | 4376 | outl(command, addr); |
4377 | udelay(1); | 4377 | udelay(1); |
4378 | 4378 | ||
4379 | return; | 4379 | return; |
4380 | } | 4380 | } |
4381 | 4381 | ||
@@ -4383,10 +4383,10 @@ static int | |||
4383 | getfrom_srom(u_long addr) | 4383 | getfrom_srom(u_long addr) |
4384 | { | 4384 | { |
4385 | s32 tmp; | 4385 | s32 tmp; |
4386 | 4386 | ||
4387 | tmp = inl(addr); | 4387 | tmp = inl(addr); |
4388 | udelay(1); | 4388 | udelay(1); |
4389 | 4389 | ||
4390 | return tmp; | 4390 | return tmp; |
4391 | } | 4391 | } |
4392 | 4392 | ||
@@ -4403,7 +4403,7 @@ srom_infoleaf_info(struct net_device *dev) | |||
4403 | } | 4403 | } |
4404 | if (i == INFOLEAF_SIZE) { | 4404 | if (i == INFOLEAF_SIZE) { |
4405 | lp->useSROM = FALSE; | 4405 | lp->useSROM = FALSE; |
4406 | printk("%s: Cannot find correct chipset for SROM decoding!\n", | 4406 | printk("%s: Cannot find correct chipset for SROM decoding!\n", |
4407 | dev->name); | 4407 | dev->name); |
4408 | return -ENXIO; | 4408 | return -ENXIO; |
4409 | } | 4409 | } |
@@ -4420,7 +4420,7 @@ srom_infoleaf_info(struct net_device *dev) | |||
4420 | } | 4420 | } |
4421 | if (i == 0) { | 4421 | if (i == 0) { |
4422 | lp->useSROM = FALSE; | 4422 | lp->useSROM = FALSE; |
4423 | printk("%s: Cannot find correct PCI device [%d] for SROM decoding!\n", | 4423 | printk("%s: Cannot find correct PCI device [%d] for SROM decoding!\n", |
4424 | dev->name, lp->device); | 4424 | dev->name, lp->device); |
4425 | return -ENXIO; | 4425 | return -ENXIO; |
4426 | } | 4426 | } |
@@ -4494,9 +4494,9 @@ srom_exec(struct net_device *dev, u_char *p) | |||
4494 | if (((lp->ibn != 1) && (lp->ibn != 3) && (lp->ibn != 5)) || !count) return; | 4494 | if (((lp->ibn != 1) && (lp->ibn != 3) && (lp->ibn != 5)) || !count) return; |
4495 | 4495 | ||
4496 | if (lp->chipset != DC21140) RESET_SIA; | 4496 | if (lp->chipset != DC21140) RESET_SIA; |
4497 | 4497 | ||
4498 | while (count--) { | 4498 | while (count--) { |
4499 | gep_wr(((lp->chipset==DC21140) && (lp->ibn!=5) ? | 4499 | gep_wr(((lp->chipset==DC21140) && (lp->ibn!=5) ? |
4500 | *p++ : TWIDDLE(w++)), dev); | 4500 | *p++ : TWIDDLE(w++)), dev); |
4501 | mdelay(2); /* 2ms per action */ | 4501 | mdelay(2); /* 2ms per action */ |
4502 | } | 4502 | } |
@@ -4514,13 +4514,13 @@ srom_exec(struct net_device *dev, u_char *p) | |||
4514 | ** unless I implement the DC21041 SROM functions. There's no need | 4514 | ** unless I implement the DC21041 SROM functions. There's no need |
4515 | ** since the existing code will be satisfactory for all boards. | 4515 | ** since the existing code will be satisfactory for all boards. |
4516 | */ | 4516 | */ |
4517 | static int | 4517 | static int |
4518 | dc21041_infoleaf(struct net_device *dev) | 4518 | dc21041_infoleaf(struct net_device *dev) |
4519 | { | 4519 | { |
4520 | return DE4X5_AUTOSENSE_MS; | 4520 | return DE4X5_AUTOSENSE_MS; |
4521 | } | 4521 | } |
4522 | 4522 | ||
4523 | static int | 4523 | static int |
4524 | dc21140_infoleaf(struct net_device *dev) | 4524 | dc21140_infoleaf(struct net_device *dev) |
4525 | { | 4525 | { |
4526 | struct de4x5_private *lp = netdev_priv(dev); | 4526 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -4558,7 +4558,7 @@ dc21140_infoleaf(struct net_device *dev) | |||
4558 | return next_tick & ~TIMER_CB; | 4558 | return next_tick & ~TIMER_CB; |
4559 | } | 4559 | } |
4560 | 4560 | ||
4561 | static int | 4561 | static int |
4562 | dc21142_infoleaf(struct net_device *dev) | 4562 | dc21142_infoleaf(struct net_device *dev) |
4563 | { | 4563 | { |
4564 | struct de4x5_private *lp = netdev_priv(dev); | 4564 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -4593,7 +4593,7 @@ dc21142_infoleaf(struct net_device *dev) | |||
4593 | return next_tick & ~TIMER_CB; | 4593 | return next_tick & ~TIMER_CB; |
4594 | } | 4594 | } |
4595 | 4595 | ||
4596 | static int | 4596 | static int |
4597 | dc21143_infoleaf(struct net_device *dev) | 4597 | dc21143_infoleaf(struct net_device *dev) |
4598 | { | 4598 | { |
4599 | struct de4x5_private *lp = netdev_priv(dev); | 4599 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -4631,7 +4631,7 @@ dc21143_infoleaf(struct net_device *dev) | |||
4631 | ** The compact infoblock is only designed for DC21140[A] chips, so | 4631 | ** The compact infoblock is only designed for DC21140[A] chips, so |
4632 | ** we'll reuse the dc21140m_autoconf function. Non MII media only. | 4632 | ** we'll reuse the dc21140m_autoconf function. Non MII media only. |
4633 | */ | 4633 | */ |
4634 | static int | 4634 | static int |
4635 | compact_infoblock(struct net_device *dev, u_char count, u_char *p) | 4635 | compact_infoblock(struct net_device *dev, u_char count, u_char *p) |
4636 | { | 4636 | { |
4637 | struct de4x5_private *lp = netdev_priv(dev); | 4637 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -4671,7 +4671,7 @@ compact_infoblock(struct net_device *dev, u_char count, u_char *p) | |||
4671 | /* | 4671 | /* |
4672 | ** This block describes non MII media for the DC21140[A] only. | 4672 | ** This block describes non MII media for the DC21140[A] only. |
4673 | */ | 4673 | */ |
4674 | static int | 4674 | static int |
4675 | type0_infoblock(struct net_device *dev, u_char count, u_char *p) | 4675 | type0_infoblock(struct net_device *dev, u_char count, u_char *p) |
4676 | { | 4676 | { |
4677 | struct de4x5_private *lp = netdev_priv(dev); | 4677 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -4711,7 +4711,7 @@ type0_infoblock(struct net_device *dev, u_char count, u_char *p) | |||
4711 | 4711 | ||
4712 | /* These functions are under construction! */ | 4712 | /* These functions are under construction! */ |
4713 | 4713 | ||
4714 | static int | 4714 | static int |
4715 | type1_infoblock(struct net_device *dev, u_char count, u_char *p) | 4715 | type1_infoblock(struct net_device *dev, u_char count, u_char *p) |
4716 | { | 4716 | { |
4717 | struct de4x5_private *lp = netdev_priv(dev); | 4717 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -4750,7 +4750,7 @@ type1_infoblock(struct net_device *dev, u_char count, u_char *p) | |||
4750 | return dc21140m_autoconf(dev); | 4750 | return dc21140m_autoconf(dev); |
4751 | } | 4751 | } |
4752 | 4752 | ||
4753 | static int | 4753 | static int |
4754 | type2_infoblock(struct net_device *dev, u_char count, u_char *p) | 4754 | type2_infoblock(struct net_device *dev, u_char count, u_char *p) |
4755 | { | 4755 | { |
4756 | struct de4x5_private *lp = netdev_priv(dev); | 4756 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -4791,7 +4791,7 @@ type2_infoblock(struct net_device *dev, u_char count, u_char *p) | |||
4791 | return dc2114x_autoconf(dev); | 4791 | return dc2114x_autoconf(dev); |
4792 | } | 4792 | } |
4793 | 4793 | ||
4794 | static int | 4794 | static int |
4795 | type3_infoblock(struct net_device *dev, u_char count, u_char *p) | 4795 | type3_infoblock(struct net_device *dev, u_char count, u_char *p) |
4796 | { | 4796 | { |
4797 | struct de4x5_private *lp = netdev_priv(dev); | 4797 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -4833,7 +4833,7 @@ type3_infoblock(struct net_device *dev, u_char count, u_char *p) | |||
4833 | return dc2114x_autoconf(dev); | 4833 | return dc2114x_autoconf(dev); |
4834 | } | 4834 | } |
4835 | 4835 | ||
4836 | static int | 4836 | static int |
4837 | type4_infoblock(struct net_device *dev, u_char count, u_char *p) | 4837 | type4_infoblock(struct net_device *dev, u_char count, u_char *p) |
4838 | { | 4838 | { |
4839 | struct de4x5_private *lp = netdev_priv(dev); | 4839 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -4878,7 +4878,7 @@ type4_infoblock(struct net_device *dev, u_char count, u_char *p) | |||
4878 | ** This block type provides information for resetting external devices | 4878 | ** This block type provides information for resetting external devices |
4879 | ** (chips) through the General Purpose Register. | 4879 | ** (chips) through the General Purpose Register. |
4880 | */ | 4880 | */ |
4881 | static int | 4881 | static int |
4882 | type5_infoblock(struct net_device *dev, u_char count, u_char *p) | 4882 | type5_infoblock(struct net_device *dev, u_char count, u_char *p) |
4883 | { | 4883 | { |
4884 | struct de4x5_private *lp = netdev_priv(dev); | 4884 | struct de4x5_private *lp = netdev_priv(dev); |
@@ -4916,7 +4916,7 @@ mii_rd(u_char phyreg, u_char phyaddr, u_long ioaddr) | |||
4916 | mii_address(phyaddr, ioaddr); /* PHY address to be accessed */ | 4916 | mii_address(phyaddr, ioaddr); /* PHY address to be accessed */ |
4917 | mii_address(phyreg, ioaddr); /* PHY Register to read */ | 4917 | mii_address(phyreg, ioaddr); /* PHY Register to read */ |
4918 | mii_ta(MII_STRD, ioaddr); /* Turn around time - 2 MDC */ | 4918 | mii_ta(MII_STRD, ioaddr); /* Turn around time - 2 MDC */ |
4919 | 4919 | ||
4920 | return mii_rdata(ioaddr); /* Read data */ | 4920 | return mii_rdata(ioaddr); /* Read data */ |
4921 | } | 4921 | } |
4922 | 4922 | ||
@@ -4931,7 +4931,7 @@ mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr) | |||
4931 | mii_ta(MII_STWR, ioaddr); /* Turn around time - 2 MDC */ | 4931 | mii_ta(MII_STWR, ioaddr); /* Turn around time - 2 MDC */ |
4932 | data = mii_swap(data, 16); /* Swap data bit ordering */ | 4932 | data = mii_swap(data, 16); /* Swap data bit ordering */ |
4933 | mii_wdata(data, 16, ioaddr); /* Write data */ | 4933 | mii_wdata(data, 16, ioaddr); /* Write data */ |
4934 | 4934 | ||
4935 | return; | 4935 | return; |
4936 | } | 4936 | } |
4937 | 4937 | ||
@@ -4940,12 +4940,12 @@ mii_rdata(u_long ioaddr) | |||
4940 | { | 4940 | { |
4941 | int i; | 4941 | int i; |
4942 | s32 tmp = 0; | 4942 | s32 tmp = 0; |
4943 | 4943 | ||
4944 | for (i=0; i<16; i++) { | 4944 | for (i=0; i<16; i++) { |
4945 | tmp <<= 1; | 4945 | tmp <<= 1; |
4946 | tmp |= getfrom_mii(MII_MRD | MII_RD, ioaddr); | 4946 | tmp |= getfrom_mii(MII_MRD | MII_RD, ioaddr); |
4947 | } | 4947 | } |
4948 | 4948 | ||
4949 | return tmp; | 4949 | return tmp; |
4950 | } | 4950 | } |
4951 | 4951 | ||
@@ -4953,12 +4953,12 @@ static void | |||
4953 | mii_wdata(int data, int len, u_long ioaddr) | 4953 | mii_wdata(int data, int len, u_long ioaddr) |
4954 | { | 4954 | { |
4955 | int i; | 4955 | int i; |
4956 | 4956 | ||
4957 | for (i=0; i<len; i++) { | 4957 | for (i=0; i<len; i++) { |
4958 | sendto_mii(MII_MWR | MII_WR, data, ioaddr); | 4958 | sendto_mii(MII_MWR | MII_WR, data, ioaddr); |
4959 | data >>= 1; | 4959 | data >>= 1; |
4960 | } | 4960 | } |
4961 | 4961 | ||
4962 | return; | 4962 | return; |
4963 | } | 4963 | } |
4964 | 4964 | ||
@@ -4966,13 +4966,13 @@ static void | |||
4966 | mii_address(u_char addr, u_long ioaddr) | 4966 | mii_address(u_char addr, u_long ioaddr) |
4967 | { | 4967 | { |
4968 | int i; | 4968 | int i; |
4969 | 4969 | ||
4970 | addr = mii_swap(addr, 5); | 4970 | addr = mii_swap(addr, 5); |
4971 | for (i=0; i<5; i++) { | 4971 | for (i=0; i<5; i++) { |
4972 | sendto_mii(MII_MWR | MII_WR, addr, ioaddr); | 4972 | sendto_mii(MII_MWR | MII_WR, addr, ioaddr); |
4973 | addr >>= 1; | 4973 | addr >>= 1; |
4974 | } | 4974 | } |
4975 | 4975 | ||
4976 | return; | 4976 | return; |
4977 | } | 4977 | } |
4978 | 4978 | ||
@@ -4980,12 +4980,12 @@ static void | |||
4980 | mii_ta(u_long rw, u_long ioaddr) | 4980 | mii_ta(u_long rw, u_long ioaddr) |
4981 | { | 4981 | { |
4982 | if (rw == MII_STWR) { | 4982 | if (rw == MII_STWR) { |
4983 | sendto_mii(MII_MWR | MII_WR, 1, ioaddr); | 4983 | sendto_mii(MII_MWR | MII_WR, 1, ioaddr); |
4984 | sendto_mii(MII_MWR | MII_WR, 0, ioaddr); | 4984 | sendto_mii(MII_MWR | MII_WR, 0, ioaddr); |
4985 | } else { | 4985 | } else { |
4986 | getfrom_mii(MII_MRD | MII_RD, ioaddr); /* Tri-state MDIO */ | 4986 | getfrom_mii(MII_MRD | MII_RD, ioaddr); /* Tri-state MDIO */ |
4987 | } | 4987 | } |
4988 | 4988 | ||
4989 | return; | 4989 | return; |
4990 | } | 4990 | } |
4991 | 4991 | ||
@@ -4993,13 +4993,13 @@ static int | |||
4993 | mii_swap(int data, int len) | 4993 | mii_swap(int data, int len) |
4994 | { | 4994 | { |
4995 | int i, tmp = 0; | 4995 | int i, tmp = 0; |
4996 | 4996 | ||
4997 | for (i=0; i<len; i++) { | 4997 | for (i=0; i<len; i++) { |
4998 | tmp <<= 1; | 4998 | tmp <<= 1; |
4999 | tmp |= (data & 1); | 4999 | tmp |= (data & 1); |
5000 | data >>= 1; | 5000 | data >>= 1; |
5001 | } | 5001 | } |
5002 | 5002 | ||
5003 | return tmp; | 5003 | return tmp; |
5004 | } | 5004 | } |
5005 | 5005 | ||
@@ -5007,13 +5007,13 @@ static void | |||
5007 | sendto_mii(u32 command, int data, u_long ioaddr) | 5007 | sendto_mii(u32 command, int data, u_long ioaddr) |
5008 | { | 5008 | { |
5009 | u32 j; | 5009 | u32 j; |
5010 | 5010 | ||
5011 | j = (data & 1) << 17; | 5011 | j = (data & 1) << 17; |
5012 | outl(command | j, ioaddr); | 5012 | outl(command | j, ioaddr); |
5013 | udelay(1); | 5013 | udelay(1); |
5014 | outl(command | MII_MDC | j, ioaddr); | 5014 | outl(command | MII_MDC | j, ioaddr); |
5015 | udelay(1); | 5015 | udelay(1); |
5016 | 5016 | ||
5017 | return; | 5017 | return; |
5018 | } | 5018 | } |
5019 | 5019 | ||
@@ -5024,7 +5024,7 @@ getfrom_mii(u32 command, u_long ioaddr) | |||
5024 | udelay(1); | 5024 | udelay(1); |
5025 | outl(command | MII_MDC, ioaddr); | 5025 | outl(command | MII_MDC, ioaddr); |
5026 | udelay(1); | 5026 | udelay(1); |
5027 | 5027 | ||
5028 | return ((inl(ioaddr) >> 19) & 1); | 5028 | return ((inl(ioaddr) >> 19) & 1); |
5029 | } | 5029 | } |
5030 | 5030 | ||
@@ -5085,7 +5085,7 @@ mii_get_phy(struct net_device *dev) | |||
5085 | u_long iobase = dev->base_addr; | 5085 | u_long iobase = dev->base_addr; |
5086 | int i, j, k, n, limit=sizeof(phy_info)/sizeof(struct phy_table); | 5086 | int i, j, k, n, limit=sizeof(phy_info)/sizeof(struct phy_table); |
5087 | int id; | 5087 | int id; |
5088 | 5088 | ||
5089 | lp->active = 0; | 5089 | lp->active = 0; |
5090 | lp->useMII = TRUE; | 5090 | lp->useMII = TRUE; |
5091 | 5091 | ||
@@ -5094,7 +5094,7 @@ mii_get_phy(struct net_device *dev) | |||
5094 | lp->phy[lp->active].addr = i; | 5094 | lp->phy[lp->active].addr = i; |
5095 | if (i==0) n++; /* Count cycles */ | 5095 | if (i==0) n++; /* Count cycles */ |
5096 | while (de4x5_reset_phy(dev)<0) udelay(100);/* Wait for reset */ | 5096 | while (de4x5_reset_phy(dev)<0) udelay(100);/* Wait for reset */ |
5097 | id = mii_get_oui(i, DE4X5_MII); | 5097 | id = mii_get_oui(i, DE4X5_MII); |
5098 | if ((id == 0) || (id == 65535)) continue; /* Valid ID? */ | 5098 | if ((id == 0) || (id == 65535)) continue; /* Valid ID? */ |
5099 | for (j=0; j<limit; j++) { /* Search PHY table */ | 5099 | for (j=0; j<limit; j++) { /* Search PHY table */ |
5100 | if (id != phy_info[j].id) continue; /* ID match? */ | 5100 | if (id != phy_info[j].id) continue; /* ID match? */ |
@@ -5133,7 +5133,7 @@ mii_get_phy(struct net_device *dev) | |||
5133 | for (k=0; lp->phy[k].id && (k < DE4X5_MAX_PHY); k++) { /*For each PHY*/ | 5133 | for (k=0; lp->phy[k].id && (k < DE4X5_MAX_PHY); k++) { /*For each PHY*/ |
5134 | mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII); | 5134 | mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII); |
5135 | while (mii_rd(MII_CR, lp->phy[k].addr, DE4X5_MII) & MII_CR_RST); | 5135 | while (mii_rd(MII_CR, lp->phy[k].addr, DE4X5_MII) & MII_CR_RST); |
5136 | 5136 | ||
5137 | de4x5_dbg_mii(dev, k); | 5137 | de4x5_dbg_mii(dev, k); |
5138 | } | 5138 | } |
5139 | } | 5139 | } |
@@ -5148,12 +5148,12 @@ build_setup_frame(struct net_device *dev, int mode) | |||
5148 | struct de4x5_private *lp = netdev_priv(dev); | 5148 | struct de4x5_private *lp = netdev_priv(dev); |
5149 | int i; | 5149 | int i; |
5150 | char *pa = lp->setup_frame; | 5150 | char *pa = lp->setup_frame; |
5151 | 5151 | ||
5152 | /* Initialise the setup frame */ | 5152 | /* Initialise the setup frame */ |
5153 | if (mode == ALL) { | 5153 | if (mode == ALL) { |
5154 | memset(lp->setup_frame, 0, SETUP_FRAME_LEN); | 5154 | memset(lp->setup_frame, 0, SETUP_FRAME_LEN); |
5155 | } | 5155 | } |
5156 | 5156 | ||
5157 | if (lp->setup_f == HASH_PERF) { | 5157 | if (lp->setup_f == HASH_PERF) { |
5158 | for (pa=lp->setup_frame+IMPERF_PA_OFFSET, i=0; i<ETH_ALEN; i++) { | 5158 | for (pa=lp->setup_frame+IMPERF_PA_OFFSET, i=0; i<ETH_ALEN; i++) { |
5159 | *(pa + i) = dev->dev_addr[i]; /* Host address */ | 5159 | *(pa + i) = dev->dev_addr[i]; /* Host address */ |
@@ -5170,7 +5170,7 @@ build_setup_frame(struct net_device *dev, int mode) | |||
5170 | if (i & 0x01) pa += 4; | 5170 | if (i & 0x01) pa += 4; |
5171 | } | 5171 | } |
5172 | } | 5172 | } |
5173 | 5173 | ||
5174 | return pa; /* Points to the next entry */ | 5174 | return pa; /* Points to the next entry */ |
5175 | } | 5175 | } |
5176 | 5176 | ||
@@ -5178,7 +5178,7 @@ static void | |||
5178 | enable_ast(struct net_device *dev, u32 time_out) | 5178 | enable_ast(struct net_device *dev, u32 time_out) |
5179 | { | 5179 | { |
5180 | timeout(dev, (void *)&de4x5_ast, (u_long)dev, time_out); | 5180 | timeout(dev, (void *)&de4x5_ast, (u_long)dev, time_out); |
5181 | 5181 | ||
5182 | return; | 5182 | return; |
5183 | } | 5183 | } |
5184 | 5184 | ||
@@ -5186,9 +5186,9 @@ static void | |||
5186 | disable_ast(struct net_device *dev) | 5186 | disable_ast(struct net_device *dev) |
5187 | { | 5187 | { |
5188 | struct de4x5_private *lp = netdev_priv(dev); | 5188 | struct de4x5_private *lp = netdev_priv(dev); |
5189 | 5189 | ||
5190 | del_timer(&lp->timer); | 5190 | del_timer(&lp->timer); |
5191 | 5191 | ||
5192 | return; | 5192 | return; |
5193 | } | 5193 | } |
5194 | 5194 | ||
@@ -5207,10 +5207,10 @@ de4x5_switch_mac_port(struct net_device *dev) | |||
5207 | omr |= lp->infoblock_csr6; | 5207 | omr |= lp->infoblock_csr6; |
5208 | if (omr & OMR_PS) omr |= OMR_HBD; | 5208 | if (omr & OMR_PS) omr |= OMR_HBD; |
5209 | outl(omr, DE4X5_OMR); | 5209 | outl(omr, DE4X5_OMR); |
5210 | 5210 | ||
5211 | /* Soft Reset */ | 5211 | /* Soft Reset */ |
5212 | RESET_DE4X5; | 5212 | RESET_DE4X5; |
5213 | 5213 | ||
5214 | /* Restore the GEP - especially for COMPACT and Type 0 Infoblocks */ | 5214 | /* Restore the GEP - especially for COMPACT and Type 0 Infoblocks */ |
5215 | if (lp->chipset == DC21140) { | 5215 | if (lp->chipset == DC21140) { |
5216 | gep_wr(lp->cache.gepc, dev); | 5216 | gep_wr(lp->cache.gepc, dev); |
@@ -5263,21 +5263,21 @@ timeout(struct net_device *dev, void (*fn)(u_long data), u_long data, u_long mse | |||
5263 | { | 5263 | { |
5264 | struct de4x5_private *lp = netdev_priv(dev); | 5264 | struct de4x5_private *lp = netdev_priv(dev); |
5265 | int dt; | 5265 | int dt; |
5266 | 5266 | ||
5267 | /* First, cancel any pending timer events */ | 5267 | /* First, cancel any pending timer events */ |
5268 | del_timer(&lp->timer); | 5268 | del_timer(&lp->timer); |
5269 | 5269 | ||
5270 | /* Convert msec to ticks */ | 5270 | /* Convert msec to ticks */ |
5271 | dt = (msec * HZ) / 1000; | 5271 | dt = (msec * HZ) / 1000; |
5272 | if (dt==0) dt=1; | 5272 | if (dt==0) dt=1; |
5273 | 5273 | ||
5274 | /* Set up timer */ | 5274 | /* Set up timer */ |
5275 | init_timer(&lp->timer); | 5275 | init_timer(&lp->timer); |
5276 | lp->timer.expires = jiffies + dt; | 5276 | lp->timer.expires = jiffies + dt; |
5277 | lp->timer.function = fn; | 5277 | lp->timer.function = fn; |
5278 | lp->timer.data = data; | 5278 | lp->timer.data = data; |
5279 | add_timer(&lp->timer); | 5279 | add_timer(&lp->timer); |
5280 | 5280 | ||
5281 | return; | 5281 | return; |
5282 | } | 5282 | } |
5283 | 5283 | ||
@@ -5375,7 +5375,7 @@ de4x5_dbg_open(struct net_device *dev) | |||
5375 | { | 5375 | { |
5376 | struct de4x5_private *lp = netdev_priv(dev); | 5376 | struct de4x5_private *lp = netdev_priv(dev); |
5377 | int i; | 5377 | int i; |
5378 | 5378 | ||
5379 | if (de4x5_debug & DEBUG_OPEN) { | 5379 | if (de4x5_debug & DEBUG_OPEN) { |
5380 | printk("%s: de4x5 opening with irq %d\n",dev->name,dev->irq); | 5380 | printk("%s: de4x5 opening with irq %d\n",dev->name,dev->irq); |
5381 | printk("\tphysical address: "); | 5381 | printk("\tphysical address: "); |
@@ -5413,11 +5413,11 @@ de4x5_dbg_open(struct net_device *dev) | |||
5413 | } | 5413 | } |
5414 | } | 5414 | } |
5415 | printk("...0x%8.8x\n", le32_to_cpu(lp->tx_ring[i].buf)); | 5415 | printk("...0x%8.8x\n", le32_to_cpu(lp->tx_ring[i].buf)); |
5416 | printk("Ring size: \nRX: %d\nTX: %d\n", | 5416 | printk("Ring size: \nRX: %d\nTX: %d\n", |
5417 | (short)lp->rxRingSize, | 5417 | (short)lp->rxRingSize, |
5418 | (short)lp->txRingSize); | 5418 | (short)lp->txRingSize); |
5419 | } | 5419 | } |
5420 | 5420 | ||
5421 | return; | 5421 | return; |
5422 | } | 5422 | } |
5423 | 5423 | ||
@@ -5426,7 +5426,7 @@ de4x5_dbg_mii(struct net_device *dev, int k) | |||
5426 | { | 5426 | { |
5427 | struct de4x5_private *lp = netdev_priv(dev); | 5427 | struct de4x5_private *lp = netdev_priv(dev); |
5428 | u_long iobase = dev->base_addr; | 5428 | u_long iobase = dev->base_addr; |
5429 | 5429 | ||
5430 | if (de4x5_debug & DEBUG_MII) { | 5430 | if (de4x5_debug & DEBUG_MII) { |
5431 | printk("\nMII device address: %d\n", lp->phy[k].addr); | 5431 | printk("\nMII device address: %d\n", lp->phy[k].addr); |
5432 | printk("MII CR: %x\n",mii_rd(MII_CR,lp->phy[k].addr,DE4X5_MII)); | 5432 | printk("MII CR: %x\n",mii_rd(MII_CR,lp->phy[k].addr,DE4X5_MII)); |
@@ -5445,7 +5445,7 @@ de4x5_dbg_mii(struct net_device *dev, int k) | |||
5445 | printk("MII 20: %x\n",mii_rd(0x14,lp->phy[k].addr,DE4X5_MII)); | 5445 | printk("MII 20: %x\n",mii_rd(0x14,lp->phy[k].addr,DE4X5_MII)); |
5446 | } | 5446 | } |
5447 | } | 5447 | } |
5448 | 5448 | ||
5449 | return; | 5449 | return; |
5450 | } | 5450 | } |
5451 | 5451 | ||
@@ -5453,17 +5453,17 @@ static void | |||
5453 | de4x5_dbg_media(struct net_device *dev) | 5453 | de4x5_dbg_media(struct net_device *dev) |
5454 | { | 5454 | { |
5455 | struct de4x5_private *lp = netdev_priv(dev); | 5455 | struct de4x5_private *lp = netdev_priv(dev); |
5456 | 5456 | ||
5457 | if (lp->media != lp->c_media) { | 5457 | if (lp->media != lp->c_media) { |
5458 | if (de4x5_debug & DEBUG_MEDIA) { | 5458 | if (de4x5_debug & DEBUG_MEDIA) { |
5459 | printk("%s: media is %s%s\n", dev->name, | 5459 | printk("%s: media is %s%s\n", dev->name, |
5460 | (lp->media == NC ? "unconnected, link down or incompatible connection" : | 5460 | (lp->media == NC ? "unconnected, link down or incompatible connection" : |
5461 | (lp->media == TP ? "TP" : | 5461 | (lp->media == TP ? "TP" : |
5462 | (lp->media == ANS ? "TP/Nway" : | 5462 | (lp->media == ANS ? "TP/Nway" : |
5463 | (lp->media == BNC ? "BNC" : | 5463 | (lp->media == BNC ? "BNC" : |
5464 | (lp->media == AUI ? "AUI" : | 5464 | (lp->media == AUI ? "AUI" : |
5465 | (lp->media == BNC_AUI ? "BNC/AUI" : | 5465 | (lp->media == BNC_AUI ? "BNC/AUI" : |
5466 | (lp->media == EXT_SIA ? "EXT SIA" : | 5466 | (lp->media == EXT_SIA ? "EXT SIA" : |
5467 | (lp->media == _100Mb ? "100Mb/s" : | 5467 | (lp->media == _100Mb ? "100Mb/s" : |
5468 | (lp->media == _10Mb ? "10Mb/s" : | 5468 | (lp->media == _10Mb ? "10Mb/s" : |
5469 | "???" | 5469 | "???" |
@@ -5471,7 +5471,7 @@ de4x5_dbg_media(struct net_device *dev) | |||
5471 | } | 5471 | } |
5472 | lp->c_media = lp->media; | 5472 | lp->c_media = lp->media; |
5473 | } | 5473 | } |
5474 | 5474 | ||
5475 | return; | 5475 | return; |
5476 | } | 5476 | } |
5477 | 5477 | ||
@@ -5554,7 +5554,7 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
5554 | u32 lval[36]; | 5554 | u32 lval[36]; |
5555 | } tmp; | 5555 | } tmp; |
5556 | u_long flags = 0; | 5556 | u_long flags = 0; |
5557 | 5557 | ||
5558 | switch(ioc->cmd) { | 5558 | switch(ioc->cmd) { |
5559 | case DE4X5_GET_HWADDR: /* Get the hardware address */ | 5559 | case DE4X5_GET_HWADDR: /* Get the hardware address */ |
5560 | ioc->len = ETH_ALEN; | 5560 | ioc->len = ETH_ALEN; |
@@ -5575,7 +5575,7 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
5575 | } | 5575 | } |
5576 | build_setup_frame(dev, PHYS_ADDR_ONLY); | 5576 | build_setup_frame(dev, PHYS_ADDR_ONLY); |
5577 | /* Set up the descriptor and give ownership to the card */ | 5577 | /* Set up the descriptor and give ownership to the card */ |
5578 | load_packet(dev, lp->setup_frame, TD_IC | PERFECT_F | TD_SET | | 5578 | load_packet(dev, lp->setup_frame, TD_IC | PERFECT_F | TD_SET | |
5579 | SETUP_FRAME_LEN, (struct sk_buff *)1); | 5579 | SETUP_FRAME_LEN, (struct sk_buff *)1); |
5580 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; | 5580 | lp->tx_new = (++lp->tx_new) % lp->txRingSize; |
5581 | outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ | 5581 | outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ |
@@ -5617,8 +5617,8 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
5617 | spin_lock_irqsave(&lp->lock, flags); | 5617 | spin_lock_irqsave(&lp->lock, flags); |
5618 | memcpy(&statbuf, &lp->pktStats, ioc->len); | 5618 | memcpy(&statbuf, &lp->pktStats, ioc->len); |
5619 | spin_unlock_irqrestore(&lp->lock, flags); | 5619 | spin_unlock_irqrestore(&lp->lock, flags); |
5620 | if (copy_to_user(ioc->data, &statbuf, ioc->len)) | 5620 | if (copy_to_user(ioc->data, &statbuf, ioc->len)) |
5621 | return -EFAULT; | 5621 | return -EFAULT; |
5622 | break; | 5622 | break; |
5623 | } | 5623 | } |
5624 | case DE4X5_CLR_STATS: /* Zero out the driver statistics */ | 5624 | case DE4X5_CLR_STATS: /* Zero out the driver statistics */ |
@@ -5652,9 +5652,9 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
5652 | ioc->len = j; | 5652 | ioc->len = j; |
5653 | if (copy_to_user(ioc->data, tmp.addr, ioc->len)) return -EFAULT; | 5653 | if (copy_to_user(ioc->data, tmp.addr, ioc->len)) return -EFAULT; |
5654 | break; | 5654 | break; |
5655 | 5655 | ||
5656 | #define DE4X5_DUMP 0x0f /* Dump the DE4X5 Status */ | 5656 | #define DE4X5_DUMP 0x0f /* Dump the DE4X5 Status */ |
5657 | /* | 5657 | /* |
5658 | case DE4X5_DUMP: | 5658 | case DE4X5_DUMP: |
5659 | j = 0; | 5659 | j = 0; |
5660 | tmp.addr[j++] = dev->irq; | 5660 | tmp.addr[j++] = dev->irq; |
@@ -5664,7 +5664,7 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
5664 | tmp.addr[j++] = lp->rxRingSize; | 5664 | tmp.addr[j++] = lp->rxRingSize; |
5665 | tmp.lval[j>>2] = (long)lp->rx_ring; j+=4; | 5665 | tmp.lval[j>>2] = (long)lp->rx_ring; j+=4; |
5666 | tmp.lval[j>>2] = (long)lp->tx_ring; j+=4; | 5666 | tmp.lval[j>>2] = (long)lp->tx_ring; j+=4; |
5667 | 5667 | ||
5668 | for (i=0;i<lp->rxRingSize-1;i++){ | 5668 | for (i=0;i<lp->rxRingSize-1;i++){ |
5669 | if (i < 3) { | 5669 | if (i < 3) { |
5670 | tmp.lval[j>>2] = (long)&lp->rx_ring[i].status; j+=4; | 5670 | tmp.lval[j>>2] = (long)&lp->rx_ring[i].status; j+=4; |
@@ -5677,7 +5677,7 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
5677 | } | 5677 | } |
5678 | } | 5678 | } |
5679 | tmp.lval[j>>2] = (long)&lp->tx_ring[i].status; j+=4; | 5679 | tmp.lval[j>>2] = (long)&lp->tx_ring[i].status; j+=4; |
5680 | 5680 | ||
5681 | for (i=0;i<lp->rxRingSize-1;i++){ | 5681 | for (i=0;i<lp->rxRingSize-1;i++){ |
5682 | if (i < 3) { | 5682 | if (i < 3) { |
5683 | tmp.lval[j>>2] = (s32)le32_to_cpu(lp->rx_ring[i].buf); j+=4; | 5683 | tmp.lval[j>>2] = (s32)le32_to_cpu(lp->rx_ring[i].buf); j+=4; |
@@ -5690,14 +5690,14 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
5690 | } | 5690 | } |
5691 | } | 5691 | } |
5692 | tmp.lval[j>>2] = (s32)le32_to_cpu(lp->tx_ring[i].buf); j+=4; | 5692 | tmp.lval[j>>2] = (s32)le32_to_cpu(lp->tx_ring[i].buf); j+=4; |
5693 | 5693 | ||
5694 | for (i=0;i<lp->rxRingSize;i++){ | 5694 | for (i=0;i<lp->rxRingSize;i++){ |
5695 | tmp.lval[j>>2] = le32_to_cpu(lp->rx_ring[i].status); j+=4; | 5695 | tmp.lval[j>>2] = le32_to_cpu(lp->rx_ring[i].status); j+=4; |
5696 | } | 5696 | } |
5697 | for (i=0;i<lp->txRingSize;i++){ | 5697 | for (i=0;i<lp->txRingSize;i++){ |
5698 | tmp.lval[j>>2] = le32_to_cpu(lp->tx_ring[i].status); j+=4; | 5698 | tmp.lval[j>>2] = le32_to_cpu(lp->tx_ring[i].status); j+=4; |
5699 | } | 5699 | } |
5700 | 5700 | ||
5701 | tmp.lval[j>>2] = inl(DE4X5_BMR); j+=4; | 5701 | tmp.lval[j>>2] = inl(DE4X5_BMR); j+=4; |
5702 | tmp.lval[j>>2] = inl(DE4X5_TPD); j+=4; | 5702 | tmp.lval[j>>2] = inl(DE4X5_TPD); j+=4; |
5703 | tmp.lval[j>>2] = inl(DE4X5_RPD); j+=4; | 5703 | tmp.lval[j>>2] = inl(DE4X5_RPD); j+=4; |
@@ -5706,18 +5706,18 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
5706 | tmp.lval[j>>2] = inl(DE4X5_STS); j+=4; | 5706 | tmp.lval[j>>2] = inl(DE4X5_STS); j+=4; |
5707 | tmp.lval[j>>2] = inl(DE4X5_OMR); j+=4; | 5707 | tmp.lval[j>>2] = inl(DE4X5_OMR); j+=4; |
5708 | tmp.lval[j>>2] = inl(DE4X5_IMR); j+=4; | 5708 | tmp.lval[j>>2] = inl(DE4X5_IMR); j+=4; |
5709 | tmp.lval[j>>2] = lp->chipset; j+=4; | 5709 | tmp.lval[j>>2] = lp->chipset; j+=4; |
5710 | if (lp->chipset == DC21140) { | 5710 | if (lp->chipset == DC21140) { |
5711 | tmp.lval[j>>2] = gep_rd(dev); j+=4; | 5711 | tmp.lval[j>>2] = gep_rd(dev); j+=4; |
5712 | } else { | 5712 | } else { |
5713 | tmp.lval[j>>2] = inl(DE4X5_SISR); j+=4; | 5713 | tmp.lval[j>>2] = inl(DE4X5_SISR); j+=4; |
5714 | tmp.lval[j>>2] = inl(DE4X5_SICR); j+=4; | 5714 | tmp.lval[j>>2] = inl(DE4X5_SICR); j+=4; |
5715 | tmp.lval[j>>2] = inl(DE4X5_STRR); j+=4; | 5715 | tmp.lval[j>>2] = inl(DE4X5_STRR); j+=4; |
5716 | tmp.lval[j>>2] = inl(DE4X5_SIGR); j+=4; | 5716 | tmp.lval[j>>2] = inl(DE4X5_SIGR); j+=4; |
5717 | } | 5717 | } |
5718 | tmp.lval[j>>2] = lp->phy[lp->active].id; j+=4; | 5718 | tmp.lval[j>>2] = lp->phy[lp->active].id; j+=4; |
5719 | if (lp->phy[lp->active].id && (!lp->useSROM || lp->useMII)) { | 5719 | if (lp->phy[lp->active].id && (!lp->useSROM || lp->useMII)) { |
5720 | tmp.lval[j>>2] = lp->active; j+=4; | 5720 | tmp.lval[j>>2] = lp->active; j+=4; |
5721 | tmp.lval[j>>2]=mii_rd(MII_CR,lp->phy[lp->active].addr,DE4X5_MII); j+=4; | 5721 | tmp.lval[j>>2]=mii_rd(MII_CR,lp->phy[lp->active].addr,DE4X5_MII); j+=4; |
5722 | tmp.lval[j>>2]=mii_rd(MII_SR,lp->phy[lp->active].addr,DE4X5_MII); j+=4; | 5722 | tmp.lval[j>>2]=mii_rd(MII_SR,lp->phy[lp->active].addr,DE4X5_MII); j+=4; |
5723 | tmp.lval[j>>2]=mii_rd(MII_ID0,lp->phy[lp->active].addr,DE4X5_MII); j+=4; | 5723 | tmp.lval[j>>2]=mii_rd(MII_ID0,lp->phy[lp->active].addr,DE4X5_MII); j+=4; |
@@ -5734,10 +5734,10 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
5734 | tmp.lval[j>>2]=mii_rd(0x14,lp->phy[lp->active].addr,DE4X5_MII); j+=4; | 5734 | tmp.lval[j>>2]=mii_rd(0x14,lp->phy[lp->active].addr,DE4X5_MII); j+=4; |
5735 | } | 5735 | } |
5736 | } | 5736 | } |
5737 | 5737 | ||
5738 | tmp.addr[j++] = lp->txRingSize; | 5738 | tmp.addr[j++] = lp->txRingSize; |
5739 | tmp.addr[j++] = netif_queue_stopped(dev); | 5739 | tmp.addr[j++] = netif_queue_stopped(dev); |
5740 | 5740 | ||
5741 | ioc->len = j; | 5741 | ioc->len = j; |
5742 | if (copy_to_user(ioc->data, tmp.addr, ioc->len)) return -EFAULT; | 5742 | if (copy_to_user(ioc->data, tmp.addr, ioc->len)) return -EFAULT; |
5743 | break; | 5743 | break; |
@@ -5746,7 +5746,7 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
5746 | default: | 5746 | default: |
5747 | return -EOPNOTSUPP; | 5747 | return -EOPNOTSUPP; |
5748 | } | 5748 | } |
5749 | 5749 | ||
5750 | return status; | 5750 | return status; |
5751 | } | 5751 | } |
5752 | 5752 | ||
diff --git a/drivers/net/tulip/de4x5.h b/drivers/net/tulip/de4x5.h index ad37a4074302..57226e5eb8a6 100644 --- a/drivers/net/tulip/de4x5.h +++ b/drivers/net/tulip/de4x5.h | |||
@@ -38,11 +38,11 @@ | |||
38 | /* | 38 | /* |
39 | ** EISA Register Address Map | 39 | ** EISA Register Address Map |
40 | */ | 40 | */ |
41 | #define EISA_ID iobase+0x0c80 /* EISA ID Registers */ | 41 | #define EISA_ID iobase+0x0c80 /* EISA ID Registers */ |
42 | #define EISA_ID0 iobase+0x0c80 /* EISA ID Register 0 */ | 42 | #define EISA_ID0 iobase+0x0c80 /* EISA ID Register 0 */ |
43 | #define EISA_ID1 iobase+0x0c81 /* EISA ID Register 1 */ | 43 | #define EISA_ID1 iobase+0x0c81 /* EISA ID Register 1 */ |
44 | #define EISA_ID2 iobase+0x0c82 /* EISA ID Register 2 */ | 44 | #define EISA_ID2 iobase+0x0c82 /* EISA ID Register 2 */ |
45 | #define EISA_ID3 iobase+0x0c83 /* EISA ID Register 3 */ | 45 | #define EISA_ID3 iobase+0x0c83 /* EISA ID Register 3 */ |
46 | #define EISA_CR iobase+0x0c84 /* EISA Control Register */ | 46 | #define EISA_CR iobase+0x0c84 /* EISA Control Register */ |
47 | #define EISA_REG0 iobase+0x0c88 /* EISA Configuration Register 0 */ | 47 | #define EISA_REG0 iobase+0x0c88 /* EISA Configuration Register 0 */ |
48 | #define EISA_REG1 iobase+0x0c89 /* EISA Configuration Register 1 */ | 48 | #define EISA_REG1 iobase+0x0c89 /* EISA Configuration Register 1 */ |
@@ -1008,8 +1008,8 @@ struct de4x5_ioctl { | |||
1008 | unsigned char __user *data; /* Pointer to the data buffer */ | 1008 | unsigned char __user *data; /* Pointer to the data buffer */ |
1009 | }; | 1009 | }; |
1010 | 1010 | ||
1011 | /* | 1011 | /* |
1012 | ** Recognised commands for the driver | 1012 | ** Recognised commands for the driver |
1013 | */ | 1013 | */ |
1014 | #define DE4X5_GET_HWADDR 0x01 /* Get the hardware address */ | 1014 | #define DE4X5_GET_HWADDR 0x01 /* Get the hardware address */ |
1015 | #define DE4X5_SET_HWADDR 0x02 /* Set the hardware address */ | 1015 | #define DE4X5_SET_HWADDR 0x02 /* Set the hardware address */ |
diff --git a/drivers/net/tulip/dmfe.c b/drivers/net/tulip/dmfe.c index 74e9075d9c48..ba5b112093f4 100644 --- a/drivers/net/tulip/dmfe.c +++ b/drivers/net/tulip/dmfe.c | |||
@@ -50,7 +50,7 @@ | |||
50 | forget to unmap PCI mapped skbs. | 50 | forget to unmap PCI mapped skbs. |
51 | 51 | ||
52 | Alan Cox <alan@redhat.com> | 52 | Alan Cox <alan@redhat.com> |
53 | Added new PCI identifiers provided by Clear Zhang at ALi | 53 | Added new PCI identifiers provided by Clear Zhang at ALi |
54 | for their 1563 ethernet device. | 54 | for their 1563 ethernet device. |
55 | 55 | ||
56 | TODO | 56 | TODO |
diff --git a/drivers/net/tulip/eeprom.c b/drivers/net/tulip/eeprom.c index fbd9ab60b052..5ffbd5b300c0 100644 --- a/drivers/net/tulip/eeprom.c +++ b/drivers/net/tulip/eeprom.c | |||
@@ -96,11 +96,11 @@ static const char *block_name[] __devinitdata = { | |||
96 | * tulip_build_fake_mediatable - Build a fake mediatable entry. | 96 | * tulip_build_fake_mediatable - Build a fake mediatable entry. |
97 | * @tp: Ptr to the tulip private data. | 97 | * @tp: Ptr to the tulip private data. |
98 | * | 98 | * |
99 | * Some cards like the 3x5 HSC cards (J3514A) do not have a standard | 99 | * Some cards like the 3x5 HSC cards (J3514A) do not have a standard |
100 | * srom and can not be handled under the fixup routine. These cards | 100 | * srom and can not be handled under the fixup routine. These cards |
101 | * still need a valid mediatable entry for correct csr12 setup and | 101 | * still need a valid mediatable entry for correct csr12 setup and |
102 | * mii handling. | 102 | * mii handling. |
103 | * | 103 | * |
104 | * Since this is currently a parisc-linux specific function, the | 104 | * Since this is currently a parisc-linux specific function, the |
105 | * #ifdef __hppa__ should completely optimize this function away for | 105 | * #ifdef __hppa__ should completely optimize this function away for |
106 | * non-parisc hardware. | 106 | * non-parisc hardware. |
@@ -140,7 +140,7 @@ static void __devinit tulip_build_fake_mediatable(struct tulip_private *tp) | |||
140 | tp->flags |= HAS_PHY_IRQ; | 140 | tp->flags |= HAS_PHY_IRQ; |
141 | tp->csr12_shadow = -1; | 141 | tp->csr12_shadow = -1; |
142 | } | 142 | } |
143 | #endif | 143 | #endif |
144 | } | 144 | } |
145 | 145 | ||
146 | void __devinit tulip_parse_eeprom(struct net_device *dev) | 146 | void __devinit tulip_parse_eeprom(struct net_device *dev) |
diff --git a/drivers/net/tulip/interrupt.c b/drivers/net/tulip/interrupt.c index bb3558164a5b..da4f7593c50f 100644 --- a/drivers/net/tulip/interrupt.c +++ b/drivers/net/tulip/interrupt.c | |||
@@ -139,22 +139,22 @@ int tulip_poll(struct net_device *dev, int *budget) | |||
139 | } | 139 | } |
140 | /* Acknowledge current RX interrupt sources. */ | 140 | /* Acknowledge current RX interrupt sources. */ |
141 | iowrite32((RxIntr | RxNoBuf), tp->base_addr + CSR5); | 141 | iowrite32((RxIntr | RxNoBuf), tp->base_addr + CSR5); |
142 | 142 | ||
143 | 143 | ||
144 | /* If we own the next entry, it is a new packet. Send it up. */ | 144 | /* If we own the next entry, it is a new packet. Send it up. */ |
145 | while ( ! (tp->rx_ring[entry].status & cpu_to_le32(DescOwned))) { | 145 | while ( ! (tp->rx_ring[entry].status & cpu_to_le32(DescOwned))) { |
146 | s32 status = le32_to_cpu(tp->rx_ring[entry].status); | 146 | s32 status = le32_to_cpu(tp->rx_ring[entry].status); |
147 | 147 | ||
148 | 148 | ||
149 | if (tp->dirty_rx + RX_RING_SIZE == tp->cur_rx) | 149 | if (tp->dirty_rx + RX_RING_SIZE == tp->cur_rx) |
150 | break; | 150 | break; |
151 | 151 | ||
152 | if (tulip_debug > 5) | 152 | if (tulip_debug > 5) |
153 | printk(KERN_DEBUG "%s: In tulip_rx(), entry %d %8.8x.\n", | 153 | printk(KERN_DEBUG "%s: In tulip_rx(), entry %d %8.8x.\n", |
154 | dev->name, entry, status); | 154 | dev->name, entry, status); |
155 | if (--rx_work_limit < 0) | 155 | if (--rx_work_limit < 0) |
156 | goto not_done; | 156 | goto not_done; |
157 | 157 | ||
158 | if ((status & 0x38008300) != 0x0300) { | 158 | if ((status & 0x38008300) != 0x0300) { |
159 | if ((status & 0x38000300) != 0x0300) { | 159 | if ((status & 0x38000300) != 0x0300) { |
160 | /* Ingore earlier buffers. */ | 160 | /* Ingore earlier buffers. */ |
@@ -180,7 +180,7 @@ int tulip_poll(struct net_device *dev, int *budget) | |||
180 | /* Omit the four octet CRC from the length. */ | 180 | /* Omit the four octet CRC from the length. */ |
181 | short pkt_len = ((status >> 16) & 0x7ff) - 4; | 181 | short pkt_len = ((status >> 16) & 0x7ff) - 4; |
182 | struct sk_buff *skb; | 182 | struct sk_buff *skb; |
183 | 183 | ||
184 | #ifndef final_version | 184 | #ifndef final_version |
185 | if (pkt_len > 1518) { | 185 | if (pkt_len > 1518) { |
186 | printk(KERN_WARNING "%s: Bogus packet size of %d (%#x).\n", | 186 | printk(KERN_WARNING "%s: Bogus packet size of %d (%#x).\n", |
@@ -213,7 +213,7 @@ int tulip_poll(struct net_device *dev, int *budget) | |||
213 | } else { /* Pass up the skb already on the Rx ring. */ | 213 | } else { /* Pass up the skb already on the Rx ring. */ |
214 | char *temp = skb_put(skb = tp->rx_buffers[entry].skb, | 214 | char *temp = skb_put(skb = tp->rx_buffers[entry].skb, |
215 | pkt_len); | 215 | pkt_len); |
216 | 216 | ||
217 | #ifndef final_version | 217 | #ifndef final_version |
218 | if (tp->rx_buffers[entry].mapping != | 218 | if (tp->rx_buffers[entry].mapping != |
219 | le32_to_cpu(tp->rx_ring[entry].buffer1)) { | 219 | le32_to_cpu(tp->rx_ring[entry].buffer1)) { |
@@ -225,17 +225,17 @@ int tulip_poll(struct net_device *dev, int *budget) | |||
225 | skb->head, temp); | 225 | skb->head, temp); |
226 | } | 226 | } |
227 | #endif | 227 | #endif |
228 | 228 | ||
229 | pci_unmap_single(tp->pdev, tp->rx_buffers[entry].mapping, | 229 | pci_unmap_single(tp->pdev, tp->rx_buffers[entry].mapping, |
230 | PKT_BUF_SZ, PCI_DMA_FROMDEVICE); | 230 | PKT_BUF_SZ, PCI_DMA_FROMDEVICE); |
231 | 231 | ||
232 | tp->rx_buffers[entry].skb = NULL; | 232 | tp->rx_buffers[entry].skb = NULL; |
233 | tp->rx_buffers[entry].mapping = 0; | 233 | tp->rx_buffers[entry].mapping = 0; |
234 | } | 234 | } |
235 | skb->protocol = eth_type_trans(skb, dev); | 235 | skb->protocol = eth_type_trans(skb, dev); |
236 | 236 | ||
237 | netif_receive_skb(skb); | 237 | netif_receive_skb(skb); |
238 | 238 | ||
239 | dev->last_rx = jiffies; | 239 | dev->last_rx = jiffies; |
240 | tp->stats.rx_packets++; | 240 | tp->stats.rx_packets++; |
241 | tp->stats.rx_bytes += pkt_len; | 241 | tp->stats.rx_bytes += pkt_len; |
@@ -245,12 +245,12 @@ int tulip_poll(struct net_device *dev, int *budget) | |||
245 | entry = (++tp->cur_rx) % RX_RING_SIZE; | 245 | entry = (++tp->cur_rx) % RX_RING_SIZE; |
246 | if (tp->cur_rx - tp->dirty_rx > RX_RING_SIZE/4) | 246 | if (tp->cur_rx - tp->dirty_rx > RX_RING_SIZE/4) |
247 | tulip_refill_rx(dev); | 247 | tulip_refill_rx(dev); |
248 | 248 | ||
249 | } | 249 | } |
250 | 250 | ||
251 | /* New ack strategy... irq does not ack Rx any longer | 251 | /* New ack strategy... irq does not ack Rx any longer |
252 | hopefully this helps */ | 252 | hopefully this helps */ |
253 | 253 | ||
254 | /* Really bad things can happen here... If new packet arrives | 254 | /* Really bad things can happen here... If new packet arrives |
255 | * and an irq arrives (tx or just due to occasionally unset | 255 | * and an irq arrives (tx or just due to occasionally unset |
256 | * mask), it will be acked by irq handler, but new thread | 256 | * mask), it will be acked by irq handler, but new thread |
@@ -259,28 +259,28 @@ int tulip_poll(struct net_device *dev, int *budget) | |||
259 | * tomorrow (night 011029). If it will not fail, we won | 259 | * tomorrow (night 011029). If it will not fail, we won |
260 | * finally: amount of IO did not increase at all. */ | 260 | * finally: amount of IO did not increase at all. */ |
261 | } while ((ioread32(tp->base_addr + CSR5) & RxIntr)); | 261 | } while ((ioread32(tp->base_addr + CSR5) & RxIntr)); |
262 | 262 | ||
263 | done: | 263 | done: |
264 | 264 | ||
265 | #ifdef CONFIG_TULIP_NAPI_HW_MITIGATION | 265 | #ifdef CONFIG_TULIP_NAPI_HW_MITIGATION |
266 | 266 | ||
267 | /* We use this simplistic scheme for IM. It's proven by | 267 | /* We use this simplistic scheme for IM. It's proven by |
268 | real life installations. We can have IM enabled | 268 | real life installations. We can have IM enabled |
269 | continuesly but this would cause unnecessary latency. | 269 | continuesly but this would cause unnecessary latency. |
270 | Unfortunely we can't use all the NET_RX_* feedback here. | 270 | Unfortunely we can't use all the NET_RX_* feedback here. |
271 | This would turn on IM for devices that is not contributing | 271 | This would turn on IM for devices that is not contributing |
272 | to backlog congestion with unnecessary latency. | 272 | to backlog congestion with unnecessary latency. |
273 | 273 | ||
274 | We monitor the the device RX-ring and have: | 274 | We monitor the the device RX-ring and have: |
275 | 275 | ||
276 | HW Interrupt Mitigation either ON or OFF. | 276 | HW Interrupt Mitigation either ON or OFF. |
277 | 277 | ||
278 | ON: More then 1 pkt received (per intr.) OR we are dropping | 278 | ON: More then 1 pkt received (per intr.) OR we are dropping |
279 | OFF: Only 1 pkt received | 279 | OFF: Only 1 pkt received |
280 | 280 | ||
281 | Note. We only use min and max (0, 15) settings from mit_table */ | 281 | Note. We only use min and max (0, 15) settings from mit_table */ |
282 | 282 | ||
283 | 283 | ||
284 | if( tp->flags & HAS_INTR_MITIGATION) { | 284 | if( tp->flags & HAS_INTR_MITIGATION) { |
285 | if( received > 1 ) { | 285 | if( received > 1 ) { |
286 | if( ! tp->mit_on ) { | 286 | if( ! tp->mit_on ) { |
@@ -297,20 +297,20 @@ done: | |||
297 | } | 297 | } |
298 | 298 | ||
299 | #endif /* CONFIG_TULIP_NAPI_HW_MITIGATION */ | 299 | #endif /* CONFIG_TULIP_NAPI_HW_MITIGATION */ |
300 | 300 | ||
301 | dev->quota -= received; | 301 | dev->quota -= received; |
302 | *budget -= received; | 302 | *budget -= received; |
303 | 303 | ||
304 | tulip_refill_rx(dev); | 304 | tulip_refill_rx(dev); |
305 | 305 | ||
306 | /* If RX ring is not full we are out of memory. */ | 306 | /* If RX ring is not full we are out of memory. */ |
307 | if (tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) goto oom; | 307 | if (tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) goto oom; |
308 | 308 | ||
309 | /* Remove us from polling list and enable RX intr. */ | 309 | /* Remove us from polling list and enable RX intr. */ |
310 | 310 | ||
311 | netif_rx_complete(dev); | 311 | netif_rx_complete(dev); |
312 | iowrite32(tulip_tbl[tp->chip_id].valid_intrs, tp->base_addr+CSR7); | 312 | iowrite32(tulip_tbl[tp->chip_id].valid_intrs, tp->base_addr+CSR7); |
313 | 313 | ||
314 | /* The last op happens after poll completion. Which means the following: | 314 | /* The last op happens after poll completion. Which means the following: |
315 | * 1. it can race with disabling irqs in irq handler | 315 | * 1. it can race with disabling irqs in irq handler |
316 | * 2. it can race with dise/enabling irqs in other poll threads | 316 | * 2. it can race with dise/enabling irqs in other poll threads |
@@ -321,9 +321,9 @@ done: | |||
321 | * due to races in masking and due to too late acking of already | 321 | * due to races in masking and due to too late acking of already |
322 | * processed irqs. But it must not result in losing events. | 322 | * processed irqs. But it must not result in losing events. |
323 | */ | 323 | */ |
324 | 324 | ||
325 | return 0; | 325 | return 0; |
326 | 326 | ||
327 | not_done: | 327 | not_done: |
328 | if (!received) { | 328 | if (!received) { |
329 | 329 | ||
@@ -331,29 +331,29 @@ done: | |||
331 | } | 331 | } |
332 | dev->quota -= received; | 332 | dev->quota -= received; |
333 | *budget -= received; | 333 | *budget -= received; |
334 | 334 | ||
335 | if (tp->cur_rx - tp->dirty_rx > RX_RING_SIZE/2 || | 335 | if (tp->cur_rx - tp->dirty_rx > RX_RING_SIZE/2 || |
336 | tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) | 336 | tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) |
337 | tulip_refill_rx(dev); | 337 | tulip_refill_rx(dev); |
338 | 338 | ||
339 | if (tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) goto oom; | 339 | if (tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) goto oom; |
340 | 340 | ||
341 | return 1; | 341 | return 1; |
342 | 342 | ||
343 | 343 | ||
344 | oom: /* Executed with RX ints disabled */ | 344 | oom: /* Executed with RX ints disabled */ |
345 | 345 | ||
346 | 346 | ||
347 | /* Start timer, stop polling, but do not enable rx interrupts. */ | 347 | /* Start timer, stop polling, but do not enable rx interrupts. */ |
348 | mod_timer(&tp->oom_timer, jiffies+1); | 348 | mod_timer(&tp->oom_timer, jiffies+1); |
349 | 349 | ||
350 | /* Think: timer_pending() was an explicit signature of bug. | 350 | /* Think: timer_pending() was an explicit signature of bug. |
351 | * Timer can be pending now but fired and completed | 351 | * Timer can be pending now but fired and completed |
352 | * before we did netif_rx_complete(). See? We would lose it. */ | 352 | * before we did netif_rx_complete(). See? We would lose it. */ |
353 | 353 | ||
354 | /* remove ourselves from the polling list */ | 354 | /* remove ourselves from the polling list */ |
355 | netif_rx_complete(dev); | 355 | netif_rx_complete(dev); |
356 | 356 | ||
357 | return 0; | 357 | return 0; |
358 | } | 358 | } |
359 | 359 | ||
@@ -521,9 +521,9 @@ irqreturn_t tulip_interrupt(int irq, void *dev_instance, struct pt_regs *regs) | |||
521 | /* Let's see whether the interrupt really is for us */ | 521 | /* Let's see whether the interrupt really is for us */ |
522 | csr5 = ioread32(ioaddr + CSR5); | 522 | csr5 = ioread32(ioaddr + CSR5); |
523 | 523 | ||
524 | if (tp->flags & HAS_PHY_IRQ) | 524 | if (tp->flags & HAS_PHY_IRQ) |
525 | handled = phy_interrupt (dev); | 525 | handled = phy_interrupt (dev); |
526 | 526 | ||
527 | if ((csr5 & (NormalIntr|AbnormalIntr)) == 0) | 527 | if ((csr5 & (NormalIntr|AbnormalIntr)) == 0) |
528 | return IRQ_RETVAL(handled); | 528 | return IRQ_RETVAL(handled); |
529 | 529 | ||
@@ -538,17 +538,17 @@ irqreturn_t tulip_interrupt(int irq, void *dev_instance, struct pt_regs *regs) | |||
538 | /* Mask RX intrs and add the device to poll list. */ | 538 | /* Mask RX intrs and add the device to poll list. */ |
539 | iowrite32(tulip_tbl[tp->chip_id].valid_intrs&~RxPollInt, ioaddr + CSR7); | 539 | iowrite32(tulip_tbl[tp->chip_id].valid_intrs&~RxPollInt, ioaddr + CSR7); |
540 | netif_rx_schedule(dev); | 540 | netif_rx_schedule(dev); |
541 | 541 | ||
542 | if (!(csr5&~(AbnormalIntr|NormalIntr|RxPollInt|TPLnkPass))) | 542 | if (!(csr5&~(AbnormalIntr|NormalIntr|RxPollInt|TPLnkPass))) |
543 | break; | 543 | break; |
544 | } | 544 | } |
545 | 545 | ||
546 | /* Acknowledge the interrupt sources we handle here ASAP | 546 | /* Acknowledge the interrupt sources we handle here ASAP |
547 | the poll function does Rx and RxNoBuf acking */ | 547 | the poll function does Rx and RxNoBuf acking */ |
548 | 548 | ||
549 | iowrite32(csr5 & 0x0001ff3f, ioaddr + CSR5); | 549 | iowrite32(csr5 & 0x0001ff3f, ioaddr + CSR5); |
550 | 550 | ||
551 | #else | 551 | #else |
552 | /* Acknowledge all of the current interrupt sources ASAP. */ | 552 | /* Acknowledge all of the current interrupt sources ASAP. */ |
553 | iowrite32(csr5 & 0x0001ffff, ioaddr + CSR5); | 553 | iowrite32(csr5 & 0x0001ffff, ioaddr + CSR5); |
554 | 554 | ||
@@ -559,11 +559,11 @@ irqreturn_t tulip_interrupt(int irq, void *dev_instance, struct pt_regs *regs) | |||
559 | } | 559 | } |
560 | 560 | ||
561 | #endif /* CONFIG_TULIP_NAPI */ | 561 | #endif /* CONFIG_TULIP_NAPI */ |
562 | 562 | ||
563 | if (tulip_debug > 4) | 563 | if (tulip_debug > 4) |
564 | printk(KERN_DEBUG "%s: interrupt csr5=%#8.8x new csr5=%#8.8x.\n", | 564 | printk(KERN_DEBUG "%s: interrupt csr5=%#8.8x new csr5=%#8.8x.\n", |
565 | dev->name, csr5, ioread32(ioaddr + CSR5)); | 565 | dev->name, csr5, ioread32(ioaddr + CSR5)); |
566 | 566 | ||
567 | 567 | ||
568 | if (csr5 & (TxNoBuf | TxDied | TxIntr | TimerInt)) { | 568 | if (csr5 & (TxNoBuf | TxDied | TxIntr | TimerInt)) { |
569 | unsigned int dirty_tx; | 569 | unsigned int dirty_tx; |
@@ -737,17 +737,17 @@ irqreturn_t tulip_interrupt(int irq, void *dev_instance, struct pt_regs *regs) | |||
737 | #ifdef CONFIG_TULIP_NAPI | 737 | #ifdef CONFIG_TULIP_NAPI |
738 | if (rxd) | 738 | if (rxd) |
739 | csr5 &= ~RxPollInt; | 739 | csr5 &= ~RxPollInt; |
740 | } while ((csr5 & (TxNoBuf | | 740 | } while ((csr5 & (TxNoBuf | |
741 | TxDied | | 741 | TxDied | |
742 | TxIntr | | 742 | TxIntr | |
743 | TimerInt | | 743 | TimerInt | |
744 | /* Abnormal intr. */ | 744 | /* Abnormal intr. */ |
745 | RxDied | | 745 | RxDied | |
746 | TxFIFOUnderflow | | 746 | TxFIFOUnderflow | |
747 | TxJabber | | 747 | TxJabber | |
748 | TPLnkFail | | 748 | TPLnkFail | |
749 | SytemError )) != 0); | 749 | SytemError )) != 0); |
750 | #else | 750 | #else |
751 | } while ((csr5 & (NormalIntr|AbnormalIntr)) != 0); | 751 | } while ((csr5 & (NormalIntr|AbnormalIntr)) != 0); |
752 | 752 | ||
753 | tulip_refill_rx(dev); | 753 | tulip_refill_rx(dev); |
diff --git a/drivers/net/tulip/media.c b/drivers/net/tulip/media.c index f53396fe79c9..e9bc2a958c14 100644 --- a/drivers/net/tulip/media.c +++ b/drivers/net/tulip/media.c | |||
@@ -140,7 +140,7 @@ void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int val) | |||
140 | spin_unlock_irqrestore(&tp->mii_lock, flags); | 140 | spin_unlock_irqrestore(&tp->mii_lock, flags); |
141 | return; | 141 | return; |
142 | } | 142 | } |
143 | 143 | ||
144 | /* Establish sync by sending 32 logic ones. */ | 144 | /* Establish sync by sending 32 logic ones. */ |
145 | for (i = 32; i >= 0; i--) { | 145 | for (i = 32; i >= 0; i--) { |
146 | iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr); | 146 | iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr); |
diff --git a/drivers/net/tulip/tulip.h b/drivers/net/tulip/tulip.h index 05d2d96f7be2..d25020da6798 100644 --- a/drivers/net/tulip/tulip.h +++ b/drivers/net/tulip/tulip.h | |||
@@ -259,7 +259,7 @@ enum t21143_csr6_bits { | |||
259 | There are no ill effects from too-large receive rings. */ | 259 | There are no ill effects from too-large receive rings. */ |
260 | 260 | ||
261 | #define TX_RING_SIZE 32 | 261 | #define TX_RING_SIZE 32 |
262 | #define RX_RING_SIZE 128 | 262 | #define RX_RING_SIZE 128 |
263 | #define MEDIA_MASK 31 | 263 | #define MEDIA_MASK 31 |
264 | 264 | ||
265 | #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */ | 265 | #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */ |
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c index c67c91251d04..cabdf894e21e 100644 --- a/drivers/net/tulip/tulip_core.c +++ b/drivers/net/tulip/tulip_core.c | |||
@@ -1224,7 +1224,7 @@ out: | |||
1224 | * Chips that have the MRM/reserved bit quirk and the burst quirk. That | 1224 | * Chips that have the MRM/reserved bit quirk and the burst quirk. That |
1225 | * is the DM910X and the on chip ULi devices | 1225 | * is the DM910X and the on chip ULi devices |
1226 | */ | 1226 | */ |
1227 | 1227 | ||
1228 | static int tulip_uli_dm_quirk(struct pci_dev *pdev) | 1228 | static int tulip_uli_dm_quirk(struct pci_dev *pdev) |
1229 | { | 1229 | { |
1230 | if (pdev->vendor == 0x1282 && pdev->device == 0x9102) | 1230 | if (pdev->vendor == 0x1282 && pdev->device == 0x9102) |
@@ -1297,7 +1297,7 @@ static int __devinit tulip_init_one (struct pci_dev *pdev, | |||
1297 | */ | 1297 | */ |
1298 | 1298 | ||
1299 | /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache | 1299 | /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache |
1300 | aligned. Aries might need this too. The Saturn errata are not | 1300 | aligned. Aries might need this too. The Saturn errata are not |
1301 | pretty reading but thankfully it's an old 486 chipset. | 1301 | pretty reading but thankfully it's an old 486 chipset. |
1302 | 1302 | ||
1303 | 2. The dreaded SiS496 486 chipset. Same workaround as Intel | 1303 | 2. The dreaded SiS496 486 chipset. Same workaround as Intel |
@@ -1483,14 +1483,6 @@ static int __devinit tulip_init_one (struct pci_dev *pdev, | |||
1483 | sa_offset = 2; /* Grrr, damn Matrox boards. */ | 1483 | sa_offset = 2; /* Grrr, damn Matrox boards. */ |
1484 | multiport_cnt = 4; | 1484 | multiport_cnt = 4; |
1485 | } | 1485 | } |
1486 | #ifdef CONFIG_DDB5476 | ||
1487 | if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 6)) { | ||
1488 | /* DDB5476 MAC address in first EEPROM locations. */ | ||
1489 | sa_offset = 0; | ||
1490 | /* No media table either */ | ||
1491 | tp->flags &= ~HAS_MEDIA_TABLE; | ||
1492 | } | ||
1493 | #endif | ||
1494 | #ifdef CONFIG_DDB5477 | 1486 | #ifdef CONFIG_DDB5477 |
1495 | if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) { | 1487 | if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) { |
1496 | /* DDB5477 MAC address in first EEPROM locations. */ | 1488 | /* DDB5477 MAC address in first EEPROM locations. */ |
@@ -1500,7 +1492,7 @@ static int __devinit tulip_init_one (struct pci_dev *pdev, | |||
1500 | } | 1492 | } |
1501 | #endif | 1493 | #endif |
1502 | #ifdef CONFIG_MIPS_COBALT | 1494 | #ifdef CONFIG_MIPS_COBALT |
1503 | if ((pdev->bus->number == 0) && | 1495 | if ((pdev->bus->number == 0) && |
1504 | ((PCI_SLOT(pdev->devfn) == 7) || | 1496 | ((PCI_SLOT(pdev->devfn) == 7) || |
1505 | (PCI_SLOT(pdev->devfn) == 12))) { | 1497 | (PCI_SLOT(pdev->devfn) == 12))) { |
1506 | /* Cobalt MAC address in first EEPROM locations. */ | 1498 | /* Cobalt MAC address in first EEPROM locations. */ |
diff --git a/drivers/net/tulip/uli526x.c b/drivers/net/tulip/uli526x.c index 238e9c72cb3a..8b3a28f53c3d 100644 --- a/drivers/net/tulip/uli526x.c +++ b/drivers/net/tulip/uli526x.c | |||
@@ -9,7 +9,7 @@ | |||
9 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 9 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
10 | GNU General Public License for more details. | 10 | GNU General Public License for more details. |
11 | 11 | ||
12 | 12 | ||
13 | */ | 13 | */ |
14 | 14 | ||
15 | #define DRV_NAME "uli526x" | 15 | #define DRV_NAME "uli526x" |
@@ -185,7 +185,7 @@ struct uli526x_board_info { | |||
185 | 185 | ||
186 | /* NIC SROM data */ | 186 | /* NIC SROM data */ |
187 | unsigned char srom[128]; | 187 | unsigned char srom[128]; |
188 | u8 init; | 188 | u8 init; |
189 | }; | 189 | }; |
190 | 190 | ||
191 | enum uli526x_offsets { | 191 | enum uli526x_offsets { |
@@ -258,7 +258,7 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev, | |||
258 | struct uli526x_board_info *db; /* board information structure */ | 258 | struct uli526x_board_info *db; /* board information structure */ |
259 | struct net_device *dev; | 259 | struct net_device *dev; |
260 | int i, err; | 260 | int i, err; |
261 | 261 | ||
262 | ULI526X_DBUG(0, "uli526x_init_one()", 0); | 262 | ULI526X_DBUG(0, "uli526x_init_one()", 0); |
263 | 263 | ||
264 | if (!printed_version++) | 264 | if (!printed_version++) |
@@ -316,7 +316,7 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev, | |||
316 | err = -ENOMEM; | 316 | err = -ENOMEM; |
317 | goto err_out_nomem; | 317 | goto err_out_nomem; |
318 | } | 318 | } |
319 | 319 | ||
320 | db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; | 320 | db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; |
321 | db->first_tx_desc_dma = db->desc_pool_dma_ptr; | 321 | db->first_tx_desc_dma = db->desc_pool_dma_ptr; |
322 | db->buf_pool_start = db->buf_pool_ptr; | 322 | db->buf_pool_start = db->buf_pool_ptr; |
@@ -324,14 +324,14 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev, | |||
324 | 324 | ||
325 | db->chip_id = ent->driver_data; | 325 | db->chip_id = ent->driver_data; |
326 | db->ioaddr = pci_resource_start(pdev, 0); | 326 | db->ioaddr = pci_resource_start(pdev, 0); |
327 | 327 | ||
328 | db->pdev = pdev; | 328 | db->pdev = pdev; |
329 | db->init = 1; | 329 | db->init = 1; |
330 | 330 | ||
331 | dev->base_addr = db->ioaddr; | 331 | dev->base_addr = db->ioaddr; |
332 | dev->irq = pdev->irq; | 332 | dev->irq = pdev->irq; |
333 | pci_set_drvdata(pdev, dev); | 333 | pci_set_drvdata(pdev, dev); |
334 | 334 | ||
335 | /* Register some necessary functions */ | 335 | /* Register some necessary functions */ |
336 | dev->open = &uli526x_open; | 336 | dev->open = &uli526x_open; |
337 | dev->hard_start_xmit = &uli526x_start_xmit; | 337 | dev->hard_start_xmit = &uli526x_start_xmit; |
@@ -341,7 +341,7 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev, | |||
341 | dev->ethtool_ops = &netdev_ethtool_ops; | 341 | dev->ethtool_ops = &netdev_ethtool_ops; |
342 | spin_lock_init(&db->lock); | 342 | spin_lock_init(&db->lock); |
343 | 343 | ||
344 | 344 | ||
345 | /* read 64 word srom data */ | 345 | /* read 64 word srom data */ |
346 | for (i = 0; i < 64; i++) | 346 | for (i = 0; i < 64; i++) |
347 | ((u16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db->ioaddr, i)); | 347 | ((u16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db->ioaddr, i)); |
@@ -374,7 +374,7 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev, | |||
374 | goto err_out_res; | 374 | goto err_out_res; |
375 | 375 | ||
376 | printk(KERN_INFO "%s: ULi M%04lx at pci%s,",dev->name,ent->driver_data >> 16,pci_name(pdev)); | 376 | printk(KERN_INFO "%s: ULi M%04lx at pci%s,",dev->name,ent->driver_data >> 16,pci_name(pdev)); |
377 | 377 | ||
378 | for (i = 0; i < 6; i++) | 378 | for (i = 0; i < 6; i++) |
379 | printk("%c%02x", i ? ':' : ' ', dev->dev_addr[i]); | 379 | printk("%c%02x", i ? ':' : ' ', dev->dev_addr[i]); |
380 | printk(", irq %d.\n", dev->irq); | 380 | printk(", irq %d.\n", dev->irq); |
@@ -389,7 +389,7 @@ err_out_nomem: | |||
389 | if(db->desc_pool_ptr) | 389 | if(db->desc_pool_ptr) |
390 | pci_free_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20, | 390 | pci_free_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20, |
391 | db->desc_pool_ptr, db->desc_pool_dma_ptr); | 391 | db->desc_pool_ptr, db->desc_pool_dma_ptr); |
392 | 392 | ||
393 | if(db->buf_pool_ptr != NULL) | 393 | if(db->buf_pool_ptr != NULL) |
394 | pci_free_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, | 394 | pci_free_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, |
395 | db->buf_pool_ptr, db->buf_pool_dma_ptr); | 395 | db->buf_pool_ptr, db->buf_pool_dma_ptr); |
@@ -433,7 +433,7 @@ static int uli526x_open(struct net_device *dev) | |||
433 | { | 433 | { |
434 | int ret; | 434 | int ret; |
435 | struct uli526x_board_info *db = netdev_priv(dev); | 435 | struct uli526x_board_info *db = netdev_priv(dev); |
436 | 436 | ||
437 | ULI526X_DBUG(0, "uli526x_open", 0); | 437 | ULI526X_DBUG(0, "uli526x_open", 0); |
438 | 438 | ||
439 | ret = request_irq(dev->irq, &uli526x_interrupt, SA_SHIRQ, dev->name, dev); | 439 | ret = request_irq(dev->irq, &uli526x_interrupt, SA_SHIRQ, dev->name, dev); |
@@ -454,7 +454,7 @@ static int uli526x_open(struct net_device *dev) | |||
454 | /* CR6 operation mode decision */ | 454 | /* CR6 operation mode decision */ |
455 | db->cr6_data |= ULI526X_TXTH_256; | 455 | db->cr6_data |= ULI526X_TXTH_256; |
456 | db->cr0_data = CR0_DEFAULT; | 456 | db->cr0_data = CR0_DEFAULT; |
457 | 457 | ||
458 | /* Initialize ULI526X board */ | 458 | /* Initialize ULI526X board */ |
459 | uli526x_init(dev); | 459 | uli526x_init(dev); |
460 | 460 | ||
@@ -604,7 +604,7 @@ static int uli526x_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
604 | /* Restore CR7 to enable interrupt */ | 604 | /* Restore CR7 to enable interrupt */ |
605 | spin_unlock_irqrestore(&db->lock, flags); | 605 | spin_unlock_irqrestore(&db->lock, flags); |
606 | outl(db->cr7_data, dev->base_addr + DCR7); | 606 | outl(db->cr7_data, dev->base_addr + DCR7); |
607 | 607 | ||
608 | /* free this SKB */ | 608 | /* free this SKB */ |
609 | dev_kfree_skb(skb); | 609 | dev_kfree_skb(skb); |
610 | 610 | ||
@@ -782,7 +782,7 @@ static void uli526x_rx_packet(struct net_device *dev, struct uli526x_board_info | |||
782 | struct sk_buff *skb; | 782 | struct sk_buff *skb; |
783 | int rxlen; | 783 | int rxlen; |
784 | u32 rdes0; | 784 | u32 rdes0; |
785 | 785 | ||
786 | rxptr = db->rx_ready_ptr; | 786 | rxptr = db->rx_ready_ptr; |
787 | 787 | ||
788 | while(db->rx_avail_cnt) { | 788 | while(db->rx_avail_cnt) { |
@@ -821,7 +821,7 @@ static void uli526x_rx_packet(struct net_device *dev, struct uli526x_board_info | |||
821 | if ( !(rdes0 & 0x8000) || | 821 | if ( !(rdes0 & 0x8000) || |
822 | ((db->cr6_data & CR6_PM) && (rxlen>6)) ) { | 822 | ((db->cr6_data & CR6_PM) && (rxlen>6)) ) { |
823 | skb = rxptr->rx_skb_ptr; | 823 | skb = rxptr->rx_skb_ptr; |
824 | 824 | ||
825 | /* Good packet, send to upper layer */ | 825 | /* Good packet, send to upper layer */ |
826 | /* Shorst packet used new SKB */ | 826 | /* Shorst packet used new SKB */ |
827 | if ( (rxlen < RX_COPY_SIZE) && | 827 | if ( (rxlen < RX_COPY_SIZE) && |
@@ -841,7 +841,7 @@ static void uli526x_rx_packet(struct net_device *dev, struct uli526x_board_info | |||
841 | dev->last_rx = jiffies; | 841 | dev->last_rx = jiffies; |
842 | db->stats.rx_packets++; | 842 | db->stats.rx_packets++; |
843 | db->stats.rx_bytes += rxlen; | 843 | db->stats.rx_bytes += rxlen; |
844 | 844 | ||
845 | } else { | 845 | } else { |
846 | /* Reuse SKB buffer when the packet is error */ | 846 | /* Reuse SKB buffer when the packet is error */ |
847 | ULI526X_DBUG(0, "Reuse SK buffer, rdes0", rdes0); | 847 | ULI526X_DBUG(0, "Reuse SK buffer, rdes0", rdes0); |
@@ -911,7 +911,7 @@ ULi_ethtool_gset(struct uli526x_board_info *db, struct ethtool_cmd *ecmd) | |||
911 | SUPPORTED_100baseT_Full | | 911 | SUPPORTED_100baseT_Full | |
912 | SUPPORTED_Autoneg | | 912 | SUPPORTED_Autoneg | |
913 | SUPPORTED_MII); | 913 | SUPPORTED_MII); |
914 | 914 | ||
915 | ecmd->advertising = (ADVERTISED_10baseT_Half | | 915 | ecmd->advertising = (ADVERTISED_10baseT_Half | |
916 | ADVERTISED_10baseT_Full | | 916 | ADVERTISED_10baseT_Full | |
917 | ADVERTISED_100baseT_Half | | 917 | ADVERTISED_100baseT_Half | |
@@ -924,13 +924,13 @@ ULi_ethtool_gset(struct uli526x_board_info *db, struct ethtool_cmd *ecmd) | |||
924 | ecmd->phy_address = db->phy_addr; | 924 | ecmd->phy_address = db->phy_addr; |
925 | 925 | ||
926 | ecmd->transceiver = XCVR_EXTERNAL; | 926 | ecmd->transceiver = XCVR_EXTERNAL; |
927 | 927 | ||
928 | ecmd->speed = 10; | 928 | ecmd->speed = 10; |
929 | ecmd->duplex = DUPLEX_HALF; | 929 | ecmd->duplex = DUPLEX_HALF; |
930 | 930 | ||
931 | if(db->op_mode==ULI526X_100MHF || db->op_mode==ULI526X_100MFD) | 931 | if(db->op_mode==ULI526X_100MHF || db->op_mode==ULI526X_100MFD) |
932 | { | 932 | { |
933 | ecmd->speed = 100; | 933 | ecmd->speed = 100; |
934 | } | 934 | } |
935 | if(db->op_mode==ULI526X_10MFD || db->op_mode==ULI526X_100MFD) | 935 | if(db->op_mode==ULI526X_10MFD || db->op_mode==ULI526X_100MFD) |
936 | { | 936 | { |
@@ -939,11 +939,11 @@ ULi_ethtool_gset(struct uli526x_board_info *db, struct ethtool_cmd *ecmd) | |||
939 | if(db->link_failed) | 939 | if(db->link_failed) |
940 | { | 940 | { |
941 | ecmd->speed = -1; | 941 | ecmd->speed = -1; |
942 | ecmd->duplex = -1; | 942 | ecmd->duplex = -1; |
943 | } | 943 | } |
944 | 944 | ||
945 | if (db->media_mode & ULI526X_AUTO) | 945 | if (db->media_mode & ULI526X_AUTO) |
946 | { | 946 | { |
947 | ecmd->autoneg = AUTONEG_ENABLE; | 947 | ecmd->autoneg = AUTONEG_ENABLE; |
948 | } | 948 | } |
949 | } | 949 | } |
@@ -964,15 +964,15 @@ static void netdev_get_drvinfo(struct net_device *dev, | |||
964 | 964 | ||
965 | static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) { | 965 | static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) { |
966 | struct uli526x_board_info *np = netdev_priv(dev); | 966 | struct uli526x_board_info *np = netdev_priv(dev); |
967 | 967 | ||
968 | ULi_ethtool_gset(np, cmd); | 968 | ULi_ethtool_gset(np, cmd); |
969 | 969 | ||
970 | return 0; | 970 | return 0; |
971 | } | 971 | } |
972 | 972 | ||
973 | static u32 netdev_get_link(struct net_device *dev) { | 973 | static u32 netdev_get_link(struct net_device *dev) { |
974 | struct uli526x_board_info *np = netdev_priv(dev); | 974 | struct uli526x_board_info *np = netdev_priv(dev); |
975 | 975 | ||
976 | if(np->link_failed) | 976 | if(np->link_failed) |
977 | return 0; | 977 | return 0; |
978 | else | 978 | else |
@@ -1005,11 +1005,11 @@ static void uli526x_timer(unsigned long data) | |||
1005 | struct uli526x_board_info *db = netdev_priv(dev); | 1005 | struct uli526x_board_info *db = netdev_priv(dev); |
1006 | unsigned long flags; | 1006 | unsigned long flags; |
1007 | u8 TmpSpeed=10; | 1007 | u8 TmpSpeed=10; |
1008 | 1008 | ||
1009 | //ULI526X_DBUG(0, "uli526x_timer()", 0); | 1009 | //ULI526X_DBUG(0, "uli526x_timer()", 0); |
1010 | spin_lock_irqsave(&db->lock, flags); | 1010 | spin_lock_irqsave(&db->lock, flags); |
1011 | 1011 | ||
1012 | 1012 | ||
1013 | /* Dynamic reset ULI526X : system error or transmit time-out */ | 1013 | /* Dynamic reset ULI526X : system error or transmit time-out */ |
1014 | tmp_cr8 = inl(db->ioaddr + DCR8); | 1014 | tmp_cr8 = inl(db->ioaddr + DCR8); |
1015 | if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { | 1015 | if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { |
@@ -1021,9 +1021,9 @@ static void uli526x_timer(unsigned long data) | |||
1021 | /* TX polling kick monitor */ | 1021 | /* TX polling kick monitor */ |
1022 | if ( db->tx_packet_cnt && | 1022 | if ( db->tx_packet_cnt && |
1023 | time_after(jiffies, dev->trans_start + ULI526X_TX_KICK) ) { | 1023 | time_after(jiffies, dev->trans_start + ULI526X_TX_KICK) ) { |
1024 | outl(0x1, dev->base_addr + DCR1); // Tx polling again | 1024 | outl(0x1, dev->base_addr + DCR1); // Tx polling again |
1025 | 1025 | ||
1026 | // TX Timeout | 1026 | // TX Timeout |
1027 | if ( time_after(jiffies, dev->trans_start + ULI526X_TX_TIMEOUT) ) { | 1027 | if ( time_after(jiffies, dev->trans_start + ULI526X_TX_TIMEOUT) ) { |
1028 | db->reset_TXtimeout++; | 1028 | db->reset_TXtimeout++; |
1029 | db->wait_reset = 1; | 1029 | db->wait_reset = 1; |
@@ -1073,7 +1073,7 @@ static void uli526x_timer(unsigned long data) | |||
1073 | uli526x_sense_speed(db) ) | 1073 | uli526x_sense_speed(db) ) |
1074 | db->link_failed = 1; | 1074 | db->link_failed = 1; |
1075 | uli526x_process_mode(db); | 1075 | uli526x_process_mode(db); |
1076 | 1076 | ||
1077 | if(db->link_failed==0) | 1077 | if(db->link_failed==0) |
1078 | { | 1078 | { |
1079 | if(db->op_mode==ULI526X_100MHF || db->op_mode==ULI526X_100MFD) | 1079 | if(db->op_mode==ULI526X_100MHF || db->op_mode==ULI526X_100MFD) |
@@ -1404,7 +1404,7 @@ static u8 uli526x_sense_speed(struct uli526x_board_info * db) | |||
1404 | phy_mode = phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); | 1404 | phy_mode = phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); |
1405 | 1405 | ||
1406 | if ( (phy_mode & 0x24) == 0x24 ) { | 1406 | if ( (phy_mode & 0x24) == 0x24 ) { |
1407 | 1407 | ||
1408 | phy_mode = ((phy_read(db->ioaddr, db->phy_addr, 5, db->chip_id) & 0x01e0)<<7); | 1408 | phy_mode = ((phy_read(db->ioaddr, db->phy_addr, 5, db->chip_id) & 0x01e0)<<7); |
1409 | if(phy_mode&0x8000) | 1409 | if(phy_mode&0x8000) |
1410 | phy_mode = 0x8000; | 1410 | phy_mode = 0x8000; |
@@ -1414,7 +1414,7 @@ static u8 uli526x_sense_speed(struct uli526x_board_info * db) | |||
1414 | phy_mode = 0x2000; | 1414 | phy_mode = 0x2000; |
1415 | else | 1415 | else |
1416 | phy_mode = 0x1000; | 1416 | phy_mode = 0x1000; |
1417 | 1417 | ||
1418 | /* printk(DRV_NAME ": Phy_mode %x ",phy_mode); */ | 1418 | /* printk(DRV_NAME ": Phy_mode %x ",phy_mode); */ |
1419 | switch (phy_mode) { | 1419 | switch (phy_mode) { |
1420 | case 0x1000: db->op_mode = ULI526X_10MHF; break; | 1420 | case 0x1000: db->op_mode = ULI526X_10MHF; break; |
@@ -1442,7 +1442,7 @@ static u8 uli526x_sense_speed(struct uli526x_board_info * db) | |||
1442 | static void uli526x_set_phyxcer(struct uli526x_board_info *db) | 1442 | static void uli526x_set_phyxcer(struct uli526x_board_info *db) |
1443 | { | 1443 | { |
1444 | u16 phy_reg; | 1444 | u16 phy_reg; |
1445 | 1445 | ||
1446 | /* Phyxcer capability setting */ | 1446 | /* Phyxcer capability setting */ |
1447 | phy_reg = phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; | 1447 | phy_reg = phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; |
1448 | 1448 | ||
@@ -1457,7 +1457,7 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db) | |||
1457 | case ULI526X_100MHF: phy_reg |= 0x80; break; | 1457 | case ULI526X_100MHF: phy_reg |= 0x80; break; |
1458 | case ULI526X_100MFD: phy_reg |= 0x100; break; | 1458 | case ULI526X_100MFD: phy_reg |= 0x100; break; |
1459 | } | 1459 | } |
1460 | 1460 | ||
1461 | } | 1461 | } |
1462 | 1462 | ||
1463 | /* Write new capability to Phyxcer Reg4 */ | 1463 | /* Write new capability to Phyxcer Reg4 */ |
@@ -1556,7 +1556,7 @@ static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset, u16 phy_data | |||
1556 | /* Write a word data to PHY controller */ | 1556 | /* Write a word data to PHY controller */ |
1557 | for ( i = 0x8000; i > 0; i >>= 1) | 1557 | for ( i = 0x8000; i > 0; i >>= 1) |
1558 | phy_write_1bit(ioaddr, phy_data & i ? PHY_DATA_1 : PHY_DATA_0, chip_id); | 1558 | phy_write_1bit(ioaddr, phy_data & i ? PHY_DATA_1 : PHY_DATA_0, chip_id); |
1559 | 1559 | ||
1560 | } | 1560 | } |
1561 | 1561 | ||
1562 | 1562 | ||
@@ -1574,7 +1574,7 @@ static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id) | |||
1574 | return phy_readby_cr10(iobase, phy_addr, offset); | 1574 | return phy_readby_cr10(iobase, phy_addr, offset); |
1575 | /* M5261/M5263 Chip */ | 1575 | /* M5261/M5263 Chip */ |
1576 | ioaddr = iobase + DCR9; | 1576 | ioaddr = iobase + DCR9; |
1577 | 1577 | ||
1578 | /* Send 33 synchronization clock to Phy controller */ | 1578 | /* Send 33 synchronization clock to Phy controller */ |
1579 | for (i = 0; i < 35; i++) | 1579 | for (i = 0; i < 35; i++) |
1580 | phy_write_1bit(ioaddr, PHY_DATA_1, chip_id); | 1580 | phy_write_1bit(ioaddr, PHY_DATA_1, chip_id); |
@@ -1610,7 +1610,7 @@ static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id) | |||
1610 | static u16 phy_readby_cr10(unsigned long iobase, u8 phy_addr, u8 offset) | 1610 | static u16 phy_readby_cr10(unsigned long iobase, u8 phy_addr, u8 offset) |
1611 | { | 1611 | { |
1612 | unsigned long ioaddr,cr10_value; | 1612 | unsigned long ioaddr,cr10_value; |
1613 | 1613 | ||
1614 | ioaddr = iobase + DCR10; | 1614 | ioaddr = iobase + DCR10; |
1615 | cr10_value = phy_addr; | 1615 | cr10_value = phy_addr; |
1616 | cr10_value = (cr10_value<<5) + offset; | 1616 | cr10_value = (cr10_value<<5) + offset; |
@@ -1629,7 +1629,7 @@ static u16 phy_readby_cr10(unsigned long iobase, u8 phy_addr, u8 offset) | |||
1629 | static void phy_writeby_cr10(unsigned long iobase, u8 phy_addr, u8 offset, u16 phy_data) | 1629 | static void phy_writeby_cr10(unsigned long iobase, u8 phy_addr, u8 offset, u16 phy_data) |
1630 | { | 1630 | { |
1631 | unsigned long ioaddr,cr10_value; | 1631 | unsigned long ioaddr,cr10_value; |
1632 | 1632 | ||
1633 | ioaddr = iobase + DCR10; | 1633 | ioaddr = iobase + DCR10; |
1634 | cr10_value = phy_addr; | 1634 | cr10_value = phy_addr; |
1635 | cr10_value = (cr10_value<<5) + offset; | 1635 | cr10_value = (cr10_value<<5) + offset; |
@@ -1659,7 +1659,7 @@ static void phy_write_1bit(unsigned long ioaddr, u32 phy_data, u32 chip_id) | |||
1659 | static u16 phy_read_1bit(unsigned long ioaddr, u32 chip_id) | 1659 | static u16 phy_read_1bit(unsigned long ioaddr, u32 chip_id) |
1660 | { | 1660 | { |
1661 | u16 phy_data; | 1661 | u16 phy_data; |
1662 | 1662 | ||
1663 | outl(0x50000 , ioaddr); | 1663 | outl(0x50000 , ioaddr); |
1664 | udelay(1); | 1664 | udelay(1); |
1665 | phy_data = ( inl(ioaddr) >> 19 ) & 0x1; | 1665 | phy_data = ( inl(ioaddr) >> 19 ) & 0x1; |
diff --git a/drivers/net/tulip/winbond-840.c b/drivers/net/tulip/winbond-840.c index 136a70c4d5e4..8fea2aa455d4 100644 --- a/drivers/net/tulip/winbond-840.c +++ b/drivers/net/tulip/winbond-840.c | |||
@@ -38,12 +38,12 @@ | |||
38 | Copyright (C) 2001 Manfred Spraul | 38 | Copyright (C) 2001 Manfred Spraul |
39 | * ethtool support (jgarzik) | 39 | * ethtool support (jgarzik) |
40 | * Replace some MII-related magic numbers with constants (jgarzik) | 40 | * Replace some MII-related magic numbers with constants (jgarzik) |
41 | 41 | ||
42 | TODO: | 42 | TODO: |
43 | * enable pci_power_off | 43 | * enable pci_power_off |
44 | * Wake-On-LAN | 44 | * Wake-On-LAN |
45 | */ | 45 | */ |
46 | 46 | ||
47 | #define DRV_NAME "winbond-840" | 47 | #define DRV_NAME "winbond-840" |
48 | #define DRV_VERSION "1.01-d" | 48 | #define DRV_VERSION "1.01-d" |
49 | #define DRV_RELDATE "Nov-17-2001" | 49 | #define DRV_RELDATE "Nov-17-2001" |
@@ -57,7 +57,7 @@ c-help-name: Winbond W89c840 PCI Ethernet support | |||
57 | c-help-symbol: CONFIG_WINBOND_840 | 57 | c-help-symbol: CONFIG_WINBOND_840 |
58 | c-help: This driver is for the Winbond W89c840 chip. It also works with | 58 | c-help: This driver is for the Winbond W89c840 chip. It also works with |
59 | c-help: the TX9882 chip on the Compex RL100-ATX board. | 59 | c-help: the TX9882 chip on the Compex RL100-ATX board. |
60 | c-help: More specific information and updates are available from | 60 | c-help: More specific information and updates are available from |
61 | c-help: http://www.scyld.com/network/drivers.html | 61 | c-help: http://www.scyld.com/network/drivers.html |
62 | */ | 62 | */ |
63 | 63 | ||
@@ -207,7 +207,7 @@ Test with 'ping -s 10000' on a fast computer. | |||
207 | 207 | ||
208 | */ | 208 | */ |
209 | 209 | ||
210 | 210 | ||
211 | 211 | ||
212 | /* | 212 | /* |
213 | PCI probe table. | 213 | PCI probe table. |
@@ -374,7 +374,7 @@ static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |||
374 | static struct ethtool_ops netdev_ethtool_ops; | 374 | static struct ethtool_ops netdev_ethtool_ops; |
375 | static int netdev_close(struct net_device *dev); | 375 | static int netdev_close(struct net_device *dev); |
376 | 376 | ||
377 | 377 | ||
378 | 378 | ||
379 | static int __devinit w840_probe1 (struct pci_dev *pdev, | 379 | static int __devinit w840_probe1 (struct pci_dev *pdev, |
380 | const struct pci_device_id *ent) | 380 | const struct pci_device_id *ent) |
@@ -434,7 +434,7 @@ static int __devinit w840_probe1 (struct pci_dev *pdev, | |||
434 | np->mii_if.mdio_read = mdio_read; | 434 | np->mii_if.mdio_read = mdio_read; |
435 | np->mii_if.mdio_write = mdio_write; | 435 | np->mii_if.mdio_write = mdio_write; |
436 | np->base_addr = ioaddr; | 436 | np->base_addr = ioaddr; |
437 | 437 | ||
438 | pci_set_drvdata(pdev, dev); | 438 | pci_set_drvdata(pdev, dev); |
439 | 439 | ||
440 | if (dev->mem_start) | 440 | if (dev->mem_start) |
@@ -510,7 +510,7 @@ err_out_netdev: | |||
510 | return -ENODEV; | 510 | return -ENODEV; |
511 | } | 511 | } |
512 | 512 | ||
513 | 513 | ||
514 | /* Read the EEPROM and MII Management Data I/O (MDIO) interfaces. These are | 514 | /* Read the EEPROM and MII Management Data I/O (MDIO) interfaces. These are |
515 | often serial bit streams generated by the host processor. | 515 | often serial bit streams generated by the host processor. |
516 | The example below is for the common 93c46 EEPROM, 64 16 bit words. */ | 516 | The example below is for the common 93c46 EEPROM, 64 16 bit words. */ |
@@ -660,7 +660,7 @@ static void mdio_write(struct net_device *dev, int phy_id, int location, int val | |||
660 | return; | 660 | return; |
661 | } | 661 | } |
662 | 662 | ||
663 | 663 | ||
664 | static int netdev_open(struct net_device *dev) | 664 | static int netdev_open(struct net_device *dev) |
665 | { | 665 | { |
666 | struct netdev_private *np = netdev_priv(dev); | 666 | struct netdev_private *np = netdev_priv(dev); |
@@ -731,7 +731,7 @@ static int update_link(struct net_device *dev) | |||
731 | dev->name, np->phys[0]); | 731 | dev->name, np->phys[0]); |
732 | netif_carrier_on(dev); | 732 | netif_carrier_on(dev); |
733 | } | 733 | } |
734 | 734 | ||
735 | if ((np->mii & ~0xf) == MII_DAVICOM_DM9101) { | 735 | if ((np->mii & ~0xf) == MII_DAVICOM_DM9101) { |
736 | /* If the link partner doesn't support autonegotiation | 736 | /* If the link partner doesn't support autonegotiation |
737 | * the MII detects it's abilities with the "parallel detection". | 737 | * the MII detects it's abilities with the "parallel detection". |
@@ -761,7 +761,7 @@ static int update_link(struct net_device *dev) | |||
761 | result |= 0x20000000; | 761 | result |= 0x20000000; |
762 | if (result != np->csr6 && debug) | 762 | if (result != np->csr6 && debug) |
763 | printk(KERN_INFO "%s: Setting %dMBit-%s-duplex based on MII#%d\n", | 763 | printk(KERN_INFO "%s: Setting %dMBit-%s-duplex based on MII#%d\n", |
764 | dev->name, fasteth ? 100 : 10, | 764 | dev->name, fasteth ? 100 : 10, |
765 | duplex ? "full" : "half", np->phys[0]); | 765 | duplex ? "full" : "half", np->phys[0]); |
766 | return result; | 766 | return result; |
767 | } | 767 | } |
@@ -947,7 +947,7 @@ static void init_registers(struct net_device *dev) | |||
947 | iowrite32(i, ioaddr + PCIBusCfg); | 947 | iowrite32(i, ioaddr + PCIBusCfg); |
948 | 948 | ||
949 | np->csr6 = 0; | 949 | np->csr6 = 0; |
950 | /* 128 byte Tx threshold; | 950 | /* 128 byte Tx threshold; |
951 | Transmit on; Receive on; */ | 951 | Transmit on; Receive on; */ |
952 | update_csr6(dev, 0x00022002 | update_link(dev) | __set_rx_mode(dev)); | 952 | update_csr6(dev, 0x00022002 | update_link(dev) | __set_rx_mode(dev)); |
953 | 953 | ||
@@ -1584,7 +1584,7 @@ static int netdev_close(struct net_device *dev) | |||
1584 | static void __devexit w840_remove1 (struct pci_dev *pdev) | 1584 | static void __devexit w840_remove1 (struct pci_dev *pdev) |
1585 | { | 1585 | { |
1586 | struct net_device *dev = pci_get_drvdata(pdev); | 1586 | struct net_device *dev = pci_get_drvdata(pdev); |
1587 | 1587 | ||
1588 | if (dev) { | 1588 | if (dev) { |
1589 | struct netdev_private *np = netdev_priv(dev); | 1589 | struct netdev_private *np = netdev_priv(dev); |
1590 | unregister_netdev(dev); | 1590 | unregister_netdev(dev); |
@@ -1605,11 +1605,11 @@ static void __devexit w840_remove1 (struct pci_dev *pdev) | |||
1605 | * - get_stats: | 1605 | * - get_stats: |
1606 | * spin_lock_irq(np->lock), doesn't touch hw if not present | 1606 | * spin_lock_irq(np->lock), doesn't touch hw if not present |
1607 | * - hard_start_xmit: | 1607 | * - hard_start_xmit: |
1608 | * netif_stop_queue + spin_unlock_wait(&dev->xmit_lock); | 1608 | * synchronize_irq + netif_tx_disable; |
1609 | * - tx_timeout: | 1609 | * - tx_timeout: |
1610 | * netif_device_detach + spin_unlock_wait(&dev->xmit_lock); | 1610 | * netif_device_detach + netif_tx_disable; |
1611 | * - set_multicast_list | 1611 | * - set_multicast_list |
1612 | * netif_device_detach + spin_unlock_wait(&dev->xmit_lock); | 1612 | * netif_device_detach + netif_tx_disable; |
1613 | * - interrupt handler | 1613 | * - interrupt handler |
1614 | * doesn't touch hw if not present, synchronize_irq waits for | 1614 | * doesn't touch hw if not present, synchronize_irq waits for |
1615 | * running instances of the interrupt handler. | 1615 | * running instances of the interrupt handler. |
@@ -1635,11 +1635,10 @@ static int w840_suspend (struct pci_dev *pdev, pm_message_t state) | |||
1635 | netif_device_detach(dev); | 1635 | netif_device_detach(dev); |
1636 | update_csr6(dev, 0); | 1636 | update_csr6(dev, 0); |
1637 | iowrite32(0, ioaddr + IntrEnable); | 1637 | iowrite32(0, ioaddr + IntrEnable); |
1638 | netif_stop_queue(dev); | ||
1639 | spin_unlock_irq(&np->lock); | 1638 | spin_unlock_irq(&np->lock); |
1640 | 1639 | ||
1641 | spin_unlock_wait(&dev->xmit_lock); | ||
1642 | synchronize_irq(dev->irq); | 1640 | synchronize_irq(dev->irq); |
1641 | netif_tx_disable(dev); | ||
1643 | 1642 | ||
1644 | np->stats.rx_missed_errors += ioread32(ioaddr + RxMissed) & 0xffff; | 1643 | np->stats.rx_missed_errors += ioread32(ioaddr + RxMissed) & 0xffff; |
1645 | 1644 | ||
diff --git a/drivers/net/tulip/xircom_cb.c b/drivers/net/tulip/xircom_cb.c index 56344103ac23..63c2175ed138 100644 --- a/drivers/net/tulip/xircom_cb.c +++ b/drivers/net/tulip/xircom_cb.c | |||
@@ -1,11 +1,11 @@ | |||
1 | /* | 1 | /* |
2 | * xircom_cb: A driver for the (tulip-like) Xircom Cardbus ethernet cards | 2 | * xircom_cb: A driver for the (tulip-like) Xircom Cardbus ethernet cards |
3 | * | 3 | * |
4 | * This software is (C) by the respective authors, and licensed under the GPL | 4 | * This software is (C) by the respective authors, and licensed under the GPL |
5 | * License. | 5 | * License. |
6 | * | 6 | * |
7 | * Written by Arjan van de Ven for Red Hat, Inc. | 7 | * Written by Arjan van de Ven for Red Hat, Inc. |
8 | * Based on work by Jeff Garzik, Doug Ledford and Donald Becker | 8 | * Based on work by Jeff Garzik, Doug Ledford and Donald Becker |
9 | * | 9 | * |
10 | * This software may be used and distributed according to the terms | 10 | * This software may be used and distributed according to the terms |
11 | * of the GNU General Public License, incorporated herein by reference. | 11 | * of the GNU General Public License, incorporated herein by reference. |
@@ -93,7 +93,7 @@ struct xircom_private { | |||
93 | 93 | ||
94 | unsigned long io_port; | 94 | unsigned long io_port; |
95 | int open; | 95 | int open; |
96 | 96 | ||
97 | /* transmit_used is the rotating counter that indicates which transmit | 97 | /* transmit_used is the rotating counter that indicates which transmit |
98 | descriptor has to be used next */ | 98 | descriptor has to be used next */ |
99 | int transmit_used; | 99 | int transmit_used; |
@@ -153,10 +153,10 @@ static struct pci_device_id xircom_pci_table[] = { | |||
153 | MODULE_DEVICE_TABLE(pci, xircom_pci_table); | 153 | MODULE_DEVICE_TABLE(pci, xircom_pci_table); |
154 | 154 | ||
155 | static struct pci_driver xircom_ops = { | 155 | static struct pci_driver xircom_ops = { |
156 | .name = "xircom_cb", | 156 | .name = "xircom_cb", |
157 | .id_table = xircom_pci_table, | 157 | .id_table = xircom_pci_table, |
158 | .probe = xircom_probe, | 158 | .probe = xircom_probe, |
159 | .remove = xircom_remove, | 159 | .remove = xircom_remove, |
160 | .suspend =NULL, | 160 | .suspend =NULL, |
161 | .resume =NULL | 161 | .resume =NULL |
162 | }; | 162 | }; |
@@ -174,7 +174,7 @@ static void print_binary(unsigned int number) | |||
174 | buffer[i2++]='1'; | 174 | buffer[i2++]='1'; |
175 | else | 175 | else |
176 | buffer[i2++]='0'; | 176 | buffer[i2++]='0'; |
177 | if ((i&3)==0) | 177 | if ((i&3)==0) |
178 | buffer[i2++]=' '; | 178 | buffer[i2++]=' '; |
179 | } | 179 | } |
180 | printk("%s\n",buffer); | 180 | printk("%s\n",buffer); |
@@ -196,10 +196,10 @@ static struct ethtool_ops netdev_ethtool_ops = { | |||
196 | 196 | ||
197 | /* xircom_probe is the code that gets called on device insertion. | 197 | /* xircom_probe is the code that gets called on device insertion. |
198 | it sets up the hardware and registers the device to the networklayer. | 198 | it sets up the hardware and registers the device to the networklayer. |
199 | 199 | ||
200 | TODO: Send 1 or 2 "dummy" packets here as the card seems to discard the | 200 | TODO: Send 1 or 2 "dummy" packets here as the card seems to discard the |
201 | first two packets that get send, and pump hates that. | 201 | first two packets that get send, and pump hates that. |
202 | 202 | ||
203 | */ | 203 | */ |
204 | static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id) | 204 | static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
205 | { | 205 | { |
@@ -209,7 +209,7 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_ | |||
209 | unsigned long flags; | 209 | unsigned long flags; |
210 | unsigned short tmp16; | 210 | unsigned short tmp16; |
211 | enter("xircom_probe"); | 211 | enter("xircom_probe"); |
212 | 212 | ||
213 | /* First do the PCI initialisation */ | 213 | /* First do the PCI initialisation */ |
214 | 214 | ||
215 | if (pci_enable_device(pdev)) | 215 | if (pci_enable_device(pdev)) |
@@ -217,24 +217,24 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_ | |||
217 | 217 | ||
218 | /* disable all powermanagement */ | 218 | /* disable all powermanagement */ |
219 | pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000); | 219 | pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000); |
220 | 220 | ||
221 | pci_set_master(pdev); /* Why isn't this done by pci_enable_device ?*/ | 221 | pci_set_master(pdev); /* Why isn't this done by pci_enable_device ?*/ |
222 | 222 | ||
223 | /* clear PCI status, if any */ | 223 | /* clear PCI status, if any */ |
224 | pci_read_config_word (pdev,PCI_STATUS, &tmp16); | 224 | pci_read_config_word (pdev,PCI_STATUS, &tmp16); |
225 | pci_write_config_word (pdev, PCI_STATUS,tmp16); | 225 | pci_write_config_word (pdev, PCI_STATUS,tmp16); |
226 | 226 | ||
227 | pci_read_config_byte(pdev, PCI_REVISION_ID, &chip_rev); | 227 | pci_read_config_byte(pdev, PCI_REVISION_ID, &chip_rev); |
228 | 228 | ||
229 | if (!request_region(pci_resource_start(pdev, 0), 128, "xircom_cb")) { | 229 | if (!request_region(pci_resource_start(pdev, 0), 128, "xircom_cb")) { |
230 | printk(KERN_ERR "xircom_probe: failed to allocate io-region\n"); | 230 | printk(KERN_ERR "xircom_probe: failed to allocate io-region\n"); |
231 | return -ENODEV; | 231 | return -ENODEV; |
232 | } | 232 | } |
233 | 233 | ||
234 | /* | 234 | /* |
235 | Before changing the hardware, allocate the memory. | 235 | Before changing the hardware, allocate the memory. |
236 | This way, we can fail gracefully if not enough memory | 236 | This way, we can fail gracefully if not enough memory |
237 | is available. | 237 | is available. |
238 | */ | 238 | */ |
239 | dev = alloc_etherdev(sizeof(struct xircom_private)); | 239 | dev = alloc_etherdev(sizeof(struct xircom_private)); |
240 | if (!dev) { | 240 | if (!dev) { |
@@ -242,13 +242,13 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_ | |||
242 | goto device_fail; | 242 | goto device_fail; |
243 | } | 243 | } |
244 | private = netdev_priv(dev); | 244 | private = netdev_priv(dev); |
245 | 245 | ||
246 | /* Allocate the send/receive buffers */ | 246 | /* Allocate the send/receive buffers */ |
247 | private->rx_buffer = pci_alloc_consistent(pdev,8192,&private->rx_dma_handle); | 247 | private->rx_buffer = pci_alloc_consistent(pdev,8192,&private->rx_dma_handle); |
248 | if (private->rx_buffer == NULL) { | 248 | if (private->rx_buffer == NULL) { |
249 | printk(KERN_ERR "xircom_probe: no memory for rx buffer \n"); | 249 | printk(KERN_ERR "xircom_probe: no memory for rx buffer \n"); |
250 | goto rx_buf_fail; | 250 | goto rx_buf_fail; |
251 | } | 251 | } |
252 | private->tx_buffer = pci_alloc_consistent(pdev,8192,&private->tx_dma_handle); | 252 | private->tx_buffer = pci_alloc_consistent(pdev,8192,&private->tx_dma_handle); |
253 | if (private->tx_buffer == NULL) { | 253 | if (private->tx_buffer == NULL) { |
254 | printk(KERN_ERR "xircom_probe: no memory for tx buffer \n"); | 254 | printk(KERN_ERR "xircom_probe: no memory for tx buffer \n"); |
@@ -265,11 +265,11 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_ | |||
265 | spin_lock_init(&private->lock); | 265 | spin_lock_init(&private->lock); |
266 | dev->irq = pdev->irq; | 266 | dev->irq = pdev->irq; |
267 | dev->base_addr = private->io_port; | 267 | dev->base_addr = private->io_port; |
268 | 268 | ||
269 | initialize_card(private); | 269 | initialize_card(private); |
270 | read_mac_address(private); | 270 | read_mac_address(private); |
271 | setup_descriptors(private); | 271 | setup_descriptors(private); |
272 | 272 | ||
273 | dev->open = &xircom_open; | 273 | dev->open = &xircom_open; |
274 | dev->hard_start_xmit = &xircom_start_xmit; | 274 | dev->hard_start_xmit = &xircom_start_xmit; |
275 | dev->stop = &xircom_close; | 275 | dev->stop = &xircom_close; |
@@ -285,19 +285,19 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_ | |||
285 | printk(KERN_ERR "xircom_probe: netdevice registration failed.\n"); | 285 | printk(KERN_ERR "xircom_probe: netdevice registration failed.\n"); |
286 | goto reg_fail; | 286 | goto reg_fail; |
287 | } | 287 | } |
288 | 288 | ||
289 | printk(KERN_INFO "%s: Xircom cardbus revision %i at irq %i \n", dev->name, chip_rev, pdev->irq); | 289 | printk(KERN_INFO "%s: Xircom cardbus revision %i at irq %i \n", dev->name, chip_rev, pdev->irq); |
290 | /* start the transmitter to get a heartbeat */ | 290 | /* start the transmitter to get a heartbeat */ |
291 | /* TODO: send 2 dummy packets here */ | 291 | /* TODO: send 2 dummy packets here */ |
292 | transceiver_voodoo(private); | 292 | transceiver_voodoo(private); |
293 | 293 | ||
294 | spin_lock_irqsave(&private->lock,flags); | 294 | spin_lock_irqsave(&private->lock,flags); |
295 | activate_transmitter(private); | 295 | activate_transmitter(private); |
296 | activate_receiver(private); | 296 | activate_receiver(private); |
297 | spin_unlock_irqrestore(&private->lock,flags); | 297 | spin_unlock_irqrestore(&private->lock,flags); |
298 | 298 | ||
299 | trigger_receive(private); | 299 | trigger_receive(private); |
300 | 300 | ||
301 | leave("xircom_probe"); | 301 | leave("xircom_probe"); |
302 | return 0; | 302 | return 0; |
303 | 303 | ||
@@ -332,7 +332,7 @@ static void __devexit xircom_remove(struct pci_dev *pdev) | |||
332 | free_netdev(dev); | 332 | free_netdev(dev); |
333 | pci_set_drvdata(pdev, NULL); | 333 | pci_set_drvdata(pdev, NULL); |
334 | leave("xircom_remove"); | 334 | leave("xircom_remove"); |
335 | } | 335 | } |
336 | 336 | ||
337 | static irqreturn_t xircom_interrupt(int irq, void *dev_instance, struct pt_regs *regs) | 337 | static irqreturn_t xircom_interrupt(int irq, void *dev_instance, struct pt_regs *regs) |
338 | { | 338 | { |
@@ -346,11 +346,11 @@ static irqreturn_t xircom_interrupt(int irq, void *dev_instance, struct pt_regs | |||
346 | spin_lock(&card->lock); | 346 | spin_lock(&card->lock); |
347 | status = inl(card->io_port+CSR5); | 347 | status = inl(card->io_port+CSR5); |
348 | 348 | ||
349 | #ifdef DEBUG | 349 | #ifdef DEBUG |
350 | print_binary(status); | 350 | print_binary(status); |
351 | printk("tx status 0x%08x 0x%08x \n",card->tx_buffer[0],card->tx_buffer[4]); | 351 | printk("tx status 0x%08x 0x%08x \n",card->tx_buffer[0],card->tx_buffer[4]); |
352 | printk("rx status 0x%08x 0x%08x \n",card->rx_buffer[0],card->rx_buffer[4]); | 352 | printk("rx status 0x%08x 0x%08x \n",card->rx_buffer[0],card->rx_buffer[4]); |
353 | #endif | 353 | #endif |
354 | /* Handle shared irq and hotplug */ | 354 | /* Handle shared irq and hotplug */ |
355 | if (status == 0 || status == 0xffffffff) { | 355 | if (status == 0 || status == 0xffffffff) { |
356 | spin_unlock(&card->lock); | 356 | spin_unlock(&card->lock); |
@@ -366,21 +366,21 @@ static irqreturn_t xircom_interrupt(int irq, void *dev_instance, struct pt_regs | |||
366 | netif_carrier_on(dev); | 366 | netif_carrier_on(dev); |
367 | else | 367 | else |
368 | netif_carrier_off(dev); | 368 | netif_carrier_off(dev); |
369 | 369 | ||
370 | } | 370 | } |
371 | 371 | ||
372 | /* Clear all remaining interrupts */ | 372 | /* Clear all remaining interrupts */ |
373 | status |= 0xffffffff; /* FIXME: make this clear only the | 373 | status |= 0xffffffff; /* FIXME: make this clear only the |
374 | real existing bits */ | 374 | real existing bits */ |
375 | outl(status,card->io_port+CSR5); | 375 | outl(status,card->io_port+CSR5); |
376 | |||
377 | 376 | ||
378 | for (i=0;i<NUMDESCRIPTORS;i++) | 377 | |
378 | for (i=0;i<NUMDESCRIPTORS;i++) | ||
379 | investigate_write_descriptor(dev,card,i,bufferoffsets[i]); | 379 | investigate_write_descriptor(dev,card,i,bufferoffsets[i]); |
380 | for (i=0;i<NUMDESCRIPTORS;i++) | 380 | for (i=0;i<NUMDESCRIPTORS;i++) |
381 | investigate_read_descriptor(dev,card,i,bufferoffsets[i]); | 381 | investigate_read_descriptor(dev,card,i,bufferoffsets[i]); |
382 | 382 | ||
383 | 383 | ||
384 | spin_unlock(&card->lock); | 384 | spin_unlock(&card->lock); |
385 | leave("xircom_interrupt"); | 385 | leave("xircom_interrupt"); |
386 | return IRQ_HANDLED; | 386 | return IRQ_HANDLED; |
@@ -393,38 +393,38 @@ static int xircom_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
393 | int nextdescriptor; | 393 | int nextdescriptor; |
394 | int desc; | 394 | int desc; |
395 | enter("xircom_start_xmit"); | 395 | enter("xircom_start_xmit"); |
396 | 396 | ||
397 | card = netdev_priv(dev); | 397 | card = netdev_priv(dev); |
398 | spin_lock_irqsave(&card->lock,flags); | 398 | spin_lock_irqsave(&card->lock,flags); |
399 | 399 | ||
400 | /* First see if we can free some descriptors */ | 400 | /* First see if we can free some descriptors */ |
401 | for (desc=0;desc<NUMDESCRIPTORS;desc++) | 401 | for (desc=0;desc<NUMDESCRIPTORS;desc++) |
402 | investigate_write_descriptor(dev,card,desc,bufferoffsets[desc]); | 402 | investigate_write_descriptor(dev,card,desc,bufferoffsets[desc]); |
403 | 403 | ||
404 | 404 | ||
405 | nextdescriptor = (card->transmit_used +1) % (NUMDESCRIPTORS); | 405 | nextdescriptor = (card->transmit_used +1) % (NUMDESCRIPTORS); |
406 | desc = card->transmit_used; | 406 | desc = card->transmit_used; |
407 | 407 | ||
408 | /* only send the packet if the descriptor is free */ | 408 | /* only send the packet if the descriptor is free */ |
409 | if (card->tx_buffer[4*desc]==0) { | 409 | if (card->tx_buffer[4*desc]==0) { |
410 | /* Copy the packet data; zero the memory first as the card | 410 | /* Copy the packet data; zero the memory first as the card |
411 | sometimes sends more than you ask it to. */ | 411 | sometimes sends more than you ask it to. */ |
412 | 412 | ||
413 | memset(&card->tx_buffer[bufferoffsets[desc]/4],0,1536); | 413 | memset(&card->tx_buffer[bufferoffsets[desc]/4],0,1536); |
414 | memcpy(&(card->tx_buffer[bufferoffsets[desc]/4]),skb->data,skb->len); | 414 | memcpy(&(card->tx_buffer[bufferoffsets[desc]/4]),skb->data,skb->len); |
415 | 415 | ||
416 | 416 | ||
417 | /* FIXME: The specification tells us that the length we send HAS to be a multiple of | 417 | /* FIXME: The specification tells us that the length we send HAS to be a multiple of |
418 | 4 bytes. */ | 418 | 4 bytes. */ |
419 | 419 | ||
420 | card->tx_buffer[4*desc+1] = skb->len; | 420 | card->tx_buffer[4*desc+1] = skb->len; |
421 | if (desc == NUMDESCRIPTORS-1) | 421 | if (desc == NUMDESCRIPTORS-1) |
422 | card->tx_buffer[4*desc+1] |= (1<<25); /* bit 25: last descriptor of the ring */ | 422 | card->tx_buffer[4*desc+1] |= (1<<25); /* bit 25: last descriptor of the ring */ |
423 | 423 | ||
424 | card->tx_buffer[4*desc+1] |= 0xF0000000; | 424 | card->tx_buffer[4*desc+1] |= 0xF0000000; |
425 | /* 0xF0... means want interrupts*/ | 425 | /* 0xF0... means want interrupts*/ |
426 | card->tx_skb[desc] = skb; | 426 | card->tx_skb[desc] = skb; |
427 | 427 | ||
428 | wmb(); | 428 | wmb(); |
429 | /* This gives the descriptor to the card */ | 429 | /* This gives the descriptor to the card */ |
430 | card->tx_buffer[4*desc] = 0x80000000; | 430 | card->tx_buffer[4*desc] = 0x80000000; |
@@ -433,18 +433,18 @@ static int xircom_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
433 | netif_stop_queue(dev); | 433 | netif_stop_queue(dev); |
434 | } | 434 | } |
435 | card->transmit_used = nextdescriptor; | 435 | card->transmit_used = nextdescriptor; |
436 | leave("xircom-start_xmit - sent"); | 436 | leave("xircom-start_xmit - sent"); |
437 | spin_unlock_irqrestore(&card->lock,flags); | 437 | spin_unlock_irqrestore(&card->lock,flags); |
438 | return 0; | 438 | return 0; |
439 | } | 439 | } |
440 | 440 | ||
441 | 441 | ||
442 | 442 | ||
443 | /* Uh oh... no free descriptor... drop the packet */ | 443 | /* Uh oh... no free descriptor... drop the packet */ |
444 | netif_stop_queue(dev); | 444 | netif_stop_queue(dev); |
445 | spin_unlock_irqrestore(&card->lock,flags); | 445 | spin_unlock_irqrestore(&card->lock,flags); |
446 | trigger_transmit(card); | 446 | trigger_transmit(card); |
447 | 447 | ||
448 | return -EIO; | 448 | return -EIO; |
449 | } | 449 | } |
450 | 450 | ||
@@ -462,7 +462,7 @@ static int xircom_open(struct net_device *dev) | |||
462 | leave("xircom_open - No IRQ"); | 462 | leave("xircom_open - No IRQ"); |
463 | return retval; | 463 | return retval; |
464 | } | 464 | } |
465 | 465 | ||
466 | xircom_up(xp); | 466 | xircom_up(xp); |
467 | xp->open = 1; | 467 | xp->open = 1; |
468 | leave("xircom_open"); | 468 | leave("xircom_open"); |
@@ -473,31 +473,31 @@ static int xircom_close(struct net_device *dev) | |||
473 | { | 473 | { |
474 | struct xircom_private *card; | 474 | struct xircom_private *card; |
475 | unsigned long flags; | 475 | unsigned long flags; |
476 | 476 | ||
477 | enter("xircom_close"); | 477 | enter("xircom_close"); |
478 | card = netdev_priv(dev); | 478 | card = netdev_priv(dev); |
479 | netif_stop_queue(dev); /* we don't want new packets */ | 479 | netif_stop_queue(dev); /* we don't want new packets */ |
480 | 480 | ||
481 | 481 | ||
482 | spin_lock_irqsave(&card->lock,flags); | 482 | spin_lock_irqsave(&card->lock,flags); |
483 | 483 | ||
484 | disable_all_interrupts(card); | 484 | disable_all_interrupts(card); |
485 | #if 0 | 485 | #if 0 |
486 | /* We can enable this again once we send dummy packets on ifconfig ethX up */ | 486 | /* We can enable this again once we send dummy packets on ifconfig ethX up */ |
487 | deactivate_receiver(card); | 487 | deactivate_receiver(card); |
488 | deactivate_transmitter(card); | 488 | deactivate_transmitter(card); |
489 | #endif | 489 | #endif |
490 | remove_descriptors(card); | 490 | remove_descriptors(card); |
491 | 491 | ||
492 | spin_unlock_irqrestore(&card->lock,flags); | 492 | spin_unlock_irqrestore(&card->lock,flags); |
493 | 493 | ||
494 | card->open = 0; | 494 | card->open = 0; |
495 | free_irq(dev->irq,dev); | 495 | free_irq(dev->irq,dev); |
496 | 496 | ||
497 | leave("xircom_close"); | 497 | leave("xircom_close"); |
498 | 498 | ||
499 | return 0; | 499 | return 0; |
500 | 500 | ||
501 | } | 501 | } |
502 | 502 | ||
503 | 503 | ||
@@ -506,8 +506,8 @@ static struct net_device_stats *xircom_get_stats(struct net_device *dev) | |||
506 | { | 506 | { |
507 | struct xircom_private *card = netdev_priv(dev); | 507 | struct xircom_private *card = netdev_priv(dev); |
508 | return &card->stats; | 508 | return &card->stats; |
509 | } | 509 | } |
510 | 510 | ||
511 | 511 | ||
512 | #ifdef CONFIG_NET_POLL_CONTROLLER | 512 | #ifdef CONFIG_NET_POLL_CONTROLLER |
513 | static void xircom_poll_controller(struct net_device *dev) | 513 | static void xircom_poll_controller(struct net_device *dev) |
@@ -540,7 +540,7 @@ static void initialize_card(struct xircom_private *card) | |||
540 | outl(val, card->io_port + CSR0); | 540 | outl(val, card->io_port + CSR0); |
541 | 541 | ||
542 | 542 | ||
543 | val = 0; /* Value 0x00 is a safe and conservative value | 543 | val = 0; /* Value 0x00 is a safe and conservative value |
544 | for the PCI configuration settings */ | 544 | for the PCI configuration settings */ |
545 | outl(val, card->io_port + CSR0); | 545 | outl(val, card->io_port + CSR0); |
546 | 546 | ||
@@ -617,23 +617,23 @@ static void setup_descriptors(struct xircom_private *card) | |||
617 | 617 | ||
618 | /* Rx Descr2: address of the buffer | 618 | /* Rx Descr2: address of the buffer |
619 | we store the buffer at the 2nd half of the page */ | 619 | we store the buffer at the 2nd half of the page */ |
620 | 620 | ||
621 | address = (unsigned long) card->rx_dma_handle; | 621 | address = (unsigned long) card->rx_dma_handle; |
622 | card->rx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]); | 622 | card->rx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]); |
623 | /* Rx Desc3: address of 2nd buffer -> 0 */ | 623 | /* Rx Desc3: address of 2nd buffer -> 0 */ |
624 | card->rx_buffer[i*4 + 3] = 0; | 624 | card->rx_buffer[i*4 + 3] = 0; |
625 | } | 625 | } |
626 | 626 | ||
627 | wmb(); | 627 | wmb(); |
628 | /* Write the receive descriptor ring address to the card */ | 628 | /* Write the receive descriptor ring address to the card */ |
629 | address = (unsigned long) card->rx_dma_handle; | 629 | address = (unsigned long) card->rx_dma_handle; |
630 | val = cpu_to_le32(address); | 630 | val = cpu_to_le32(address); |
631 | outl(val, card->io_port + CSR3); /* Receive descr list address */ | 631 | outl(val, card->io_port + CSR3); /* Receive descr list address */ |
632 | 632 | ||
633 | 633 | ||
634 | /* transmit descriptors */ | 634 | /* transmit descriptors */ |
635 | memset(card->tx_buffer, 0, 128); /* clear the descriptors */ | 635 | memset(card->tx_buffer, 0, 128); /* clear the descriptors */ |
636 | 636 | ||
637 | for (i=0;i<NUMDESCRIPTORS;i++ ) { | 637 | for (i=0;i<NUMDESCRIPTORS;i++ ) { |
638 | /* Tx Descr0: Empty, we own it, no errors -> 0x00000000 */ | 638 | /* Tx Descr0: Empty, we own it, no errors -> 0x00000000 */ |
639 | card->tx_buffer[i*4 + 0] = 0x00000000; | 639 | card->tx_buffer[i*4 + 0] = 0x00000000; |
@@ -641,7 +641,7 @@ static void setup_descriptors(struct xircom_private *card) | |||
641 | card->tx_buffer[i*4 + 1] = 1536; | 641 | card->tx_buffer[i*4 + 1] = 1536; |
642 | if (i==NUMDESCRIPTORS-1) | 642 | if (i==NUMDESCRIPTORS-1) |
643 | card->tx_buffer[i*4 + 1] |= (1 << 25); /* bit 25 is "last descriptor" */ | 643 | card->tx_buffer[i*4 + 1] |= (1 << 25); /* bit 25 is "last descriptor" */ |
644 | 644 | ||
645 | /* Tx Descr2: address of the buffer | 645 | /* Tx Descr2: address of the buffer |
646 | we store the buffer at the 2nd half of the page */ | 646 | we store the buffer at the 2nd half of the page */ |
647 | address = (unsigned long) card->tx_dma_handle; | 647 | address = (unsigned long) card->tx_dma_handle; |
@@ -748,7 +748,7 @@ static int receive_active(struct xircom_private *card) | |||
748 | activate_receiver enables the receiver on the card. | 748 | activate_receiver enables the receiver on the card. |
749 | Before being allowed to active the receiver, the receiver | 749 | Before being allowed to active the receiver, the receiver |
750 | must be completely de-activated. To achieve this, | 750 | must be completely de-activated. To achieve this, |
751 | this code actually disables the receiver first; then it waits for the | 751 | this code actually disables the receiver first; then it waits for the |
752 | receiver to become inactive, then it activates the receiver and then | 752 | receiver to become inactive, then it activates the receiver and then |
753 | it waits for the receiver to be active. | 753 | it waits for the receiver to be active. |
754 | 754 | ||
@@ -762,13 +762,13 @@ static void activate_receiver(struct xircom_private *card) | |||
762 | 762 | ||
763 | 763 | ||
764 | val = inl(card->io_port + CSR6); /* Operation mode */ | 764 | val = inl(card->io_port + CSR6); /* Operation mode */ |
765 | 765 | ||
766 | /* If the "active" bit is set and the receiver is already | 766 | /* If the "active" bit is set and the receiver is already |
767 | active, no need to do the expensive thing */ | 767 | active, no need to do the expensive thing */ |
768 | if ((val&2) && (receive_active(card))) | 768 | if ((val&2) && (receive_active(card))) |
769 | return; | 769 | return; |
770 | 770 | ||
771 | 771 | ||
772 | val = val & ~2; /* disable the receiver */ | 772 | val = val & ~2; /* disable the receiver */ |
773 | outl(val, card->io_port + CSR6); | 773 | outl(val, card->io_port + CSR6); |
774 | 774 | ||
@@ -805,7 +805,7 @@ static void activate_receiver(struct xircom_private *card) | |||
805 | 805 | ||
806 | /* | 806 | /* |
807 | deactivate_receiver disables the receiver on the card. | 807 | deactivate_receiver disables the receiver on the card. |
808 | To achieve this this code disables the receiver first; | 808 | To achieve this this code disables the receiver first; |
809 | then it waits for the receiver to become inactive. | 809 | then it waits for the receiver to become inactive. |
810 | 810 | ||
811 | must be called with the lock held and interrupts disabled. | 811 | must be called with the lock held and interrupts disabled. |
@@ -840,7 +840,7 @@ static void deactivate_receiver(struct xircom_private *card) | |||
840 | activate_transmitter enables the transmitter on the card. | 840 | activate_transmitter enables the transmitter on the card. |
841 | Before being allowed to active the transmitter, the transmitter | 841 | Before being allowed to active the transmitter, the transmitter |
842 | must be completely de-activated. To achieve this, | 842 | must be completely de-activated. To achieve this, |
843 | this code actually disables the transmitter first; then it waits for the | 843 | this code actually disables the transmitter first; then it waits for the |
844 | transmitter to become inactive, then it activates the transmitter and then | 844 | transmitter to become inactive, then it activates the transmitter and then |
845 | it waits for the transmitter to be active again. | 845 | it waits for the transmitter to be active again. |
846 | 846 | ||
@@ -856,7 +856,7 @@ static void activate_transmitter(struct xircom_private *card) | |||
856 | val = inl(card->io_port + CSR6); /* Operation mode */ | 856 | val = inl(card->io_port + CSR6); /* Operation mode */ |
857 | 857 | ||
858 | /* If the "active" bit is set and the receiver is already | 858 | /* If the "active" bit is set and the receiver is already |
859 | active, no need to do the expensive thing */ | 859 | active, no need to do the expensive thing */ |
860 | if ((val&(1<<13)) && (transmit_active(card))) | 860 | if ((val&(1<<13)) && (transmit_active(card))) |
861 | return; | 861 | return; |
862 | 862 | ||
@@ -896,7 +896,7 @@ static void activate_transmitter(struct xircom_private *card) | |||
896 | 896 | ||
897 | /* | 897 | /* |
898 | deactivate_transmitter disables the transmitter on the card. | 898 | deactivate_transmitter disables the transmitter on the card. |
899 | To achieve this this code disables the transmitter first; | 899 | To achieve this this code disables the transmitter first; |
900 | then it waits for the transmitter to become inactive. | 900 | then it waits for the transmitter to become inactive. |
901 | 901 | ||
902 | must be called with the lock held and interrupts disabled. | 902 | must be called with the lock held and interrupts disabled. |
@@ -990,7 +990,7 @@ static void disable_all_interrupts(struct xircom_private *card) | |||
990 | { | 990 | { |
991 | unsigned int val; | 991 | unsigned int val; |
992 | enter("enable_all_interrupts"); | 992 | enter("enable_all_interrupts"); |
993 | 993 | ||
994 | val = 0; /* disable all interrupts */ | 994 | val = 0; /* disable all interrupts */ |
995 | outl(val, card->io_port + CSR7); | 995 | outl(val, card->io_port + CSR7); |
996 | 996 | ||
@@ -1031,8 +1031,8 @@ static int enable_promisc(struct xircom_private *card) | |||
1031 | unsigned int val; | 1031 | unsigned int val; |
1032 | enter("enable_promisc"); | 1032 | enter("enable_promisc"); |
1033 | 1033 | ||
1034 | val = inl(card->io_port + CSR6); | 1034 | val = inl(card->io_port + CSR6); |
1035 | val = val | (1 << 6); | 1035 | val = val | (1 << 6); |
1036 | outl(val, card->io_port + CSR6); | 1036 | outl(val, card->io_port + CSR6); |
1037 | 1037 | ||
1038 | leave("enable_promisc"); | 1038 | leave("enable_promisc"); |
@@ -1042,7 +1042,7 @@ static int enable_promisc(struct xircom_private *card) | |||
1042 | 1042 | ||
1043 | 1043 | ||
1044 | 1044 | ||
1045 | /* | 1045 | /* |
1046 | link_status() checks the the links status and will return 0 for no link, 10 for 10mbit link and 100 for.. guess what. | 1046 | link_status() checks the the links status and will return 0 for no link, 10 for 10mbit link and 100 for.. guess what. |
1047 | 1047 | ||
1048 | Must be called in locked state with interrupts disabled | 1048 | Must be called in locked state with interrupts disabled |
@@ -1051,15 +1051,15 @@ static int link_status(struct xircom_private *card) | |||
1051 | { | 1051 | { |
1052 | unsigned int val; | 1052 | unsigned int val; |
1053 | enter("link_status"); | 1053 | enter("link_status"); |
1054 | 1054 | ||
1055 | val = inb(card->io_port + CSR12); | 1055 | val = inb(card->io_port + CSR12); |
1056 | 1056 | ||
1057 | if (!(val&(1<<2))) /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */ | 1057 | if (!(val&(1<<2))) /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */ |
1058 | return 10; | 1058 | return 10; |
1059 | if (!(val&(1<<1))) /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */ | 1059 | if (!(val&(1<<1))) /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */ |
1060 | return 100; | 1060 | return 100; |
1061 | 1061 | ||
1062 | /* If we get here -> no link at all */ | 1062 | /* If we get here -> no link at all */ |
1063 | 1063 | ||
1064 | leave("link_status"); | 1064 | leave("link_status"); |
1065 | return 0; | 1065 | return 0; |
@@ -1071,7 +1071,7 @@ static int link_status(struct xircom_private *card) | |||
1071 | 1071 | ||
1072 | /* | 1072 | /* |
1073 | read_mac_address() reads the MAC address from the NIC and stores it in the "dev" structure. | 1073 | read_mac_address() reads the MAC address from the NIC and stores it in the "dev" structure. |
1074 | 1074 | ||
1075 | This function will take the spinlock itself and can, as a result, not be called with the lock helt. | 1075 | This function will take the spinlock itself and can, as a result, not be called with the lock helt. |
1076 | */ | 1076 | */ |
1077 | static void read_mac_address(struct xircom_private *card) | 1077 | static void read_mac_address(struct xircom_private *card) |
@@ -1081,7 +1081,7 @@ static void read_mac_address(struct xircom_private *card) | |||
1081 | int i; | 1081 | int i; |
1082 | 1082 | ||
1083 | enter("read_mac_address"); | 1083 | enter("read_mac_address"); |
1084 | 1084 | ||
1085 | spin_lock_irqsave(&card->lock, flags); | 1085 | spin_lock_irqsave(&card->lock, flags); |
1086 | 1086 | ||
1087 | outl(1 << 12, card->io_port + CSR9); /* enable boot rom access */ | 1087 | outl(1 << 12, card->io_port + CSR9); /* enable boot rom access */ |
@@ -1095,7 +1095,7 @@ static void read_mac_address(struct xircom_private *card) | |||
1095 | outl(i + 3, card->io_port + CSR10); | 1095 | outl(i + 3, card->io_port + CSR10); |
1096 | data_count = inl(card->io_port + CSR9) & 0xff; | 1096 | data_count = inl(card->io_port + CSR9) & 0xff; |
1097 | if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) { | 1097 | if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) { |
1098 | /* | 1098 | /* |
1099 | * This is it. We have the data we want. | 1099 | * This is it. We have the data we want. |
1100 | */ | 1100 | */ |
1101 | for (j = 0; j < 6; j++) { | 1101 | for (j = 0; j < 6; j++) { |
@@ -1136,12 +1136,12 @@ static void transceiver_voodoo(struct xircom_private *card) | |||
1136 | spin_lock_irqsave(&card->lock, flags); | 1136 | spin_lock_irqsave(&card->lock, flags); |
1137 | 1137 | ||
1138 | outl(0x0008, card->io_port + CSR15); | 1138 | outl(0x0008, card->io_port + CSR15); |
1139 | udelay(25); | 1139 | udelay(25); |
1140 | outl(0xa8050000, card->io_port + CSR15); | 1140 | outl(0xa8050000, card->io_port + CSR15); |
1141 | udelay(25); | 1141 | udelay(25); |
1142 | outl(0xa00f0000, card->io_port + CSR15); | 1142 | outl(0xa00f0000, card->io_port + CSR15); |
1143 | udelay(25); | 1143 | udelay(25); |
1144 | 1144 | ||
1145 | spin_unlock_irqrestore(&card->lock, flags); | 1145 | spin_unlock_irqrestore(&card->lock, flags); |
1146 | 1146 | ||
1147 | netif_start_queue(card->dev); | 1147 | netif_start_queue(card->dev); |
@@ -1163,15 +1163,15 @@ static void xircom_up(struct xircom_private *card) | |||
1163 | 1163 | ||
1164 | spin_lock_irqsave(&card->lock, flags); | 1164 | spin_lock_irqsave(&card->lock, flags); |
1165 | 1165 | ||
1166 | 1166 | ||
1167 | enable_link_interrupt(card); | 1167 | enable_link_interrupt(card); |
1168 | enable_transmit_interrupt(card); | 1168 | enable_transmit_interrupt(card); |
1169 | enable_receive_interrupt(card); | 1169 | enable_receive_interrupt(card); |
1170 | enable_common_interrupts(card); | 1170 | enable_common_interrupts(card); |
1171 | enable_promisc(card); | 1171 | enable_promisc(card); |
1172 | 1172 | ||
1173 | /* The card can have received packets already, read them away now */ | 1173 | /* The card can have received packets already, read them away now */ |
1174 | for (i=0;i<NUMDESCRIPTORS;i++) | 1174 | for (i=0;i<NUMDESCRIPTORS;i++) |
1175 | investigate_read_descriptor(card->dev,card,i,bufferoffsets[i]); | 1175 | investigate_read_descriptor(card->dev,card,i,bufferoffsets[i]); |
1176 | 1176 | ||
1177 | 1177 | ||
@@ -1185,15 +1185,15 @@ static void xircom_up(struct xircom_private *card) | |||
1185 | /* Bufferoffset is in BYTES */ | 1185 | /* Bufferoffset is in BYTES */ |
1186 | static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset) | 1186 | static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset) |
1187 | { | 1187 | { |
1188 | int status; | 1188 | int status; |
1189 | 1189 | ||
1190 | enter("investigate_read_descriptor"); | 1190 | enter("investigate_read_descriptor"); |
1191 | status = card->rx_buffer[4*descnr]; | 1191 | status = card->rx_buffer[4*descnr]; |
1192 | 1192 | ||
1193 | if ((status > 0)) { /* packet received */ | 1193 | if ((status > 0)) { /* packet received */ |
1194 | 1194 | ||
1195 | /* TODO: discard error packets */ | 1195 | /* TODO: discard error packets */ |
1196 | 1196 | ||
1197 | short pkt_len = ((status >> 16) & 0x7ff) - 4; /* minus 4, we don't want the CRC */ | 1197 | short pkt_len = ((status >> 16) & 0x7ff) - 4; /* minus 4, we don't want the CRC */ |
1198 | struct sk_buff *skb; | 1198 | struct sk_buff *skb; |
1199 | 1199 | ||
@@ -1216,7 +1216,7 @@ static void investigate_read_descriptor(struct net_device *dev,struct xircom_pri | |||
1216 | dev->last_rx = jiffies; | 1216 | dev->last_rx = jiffies; |
1217 | card->stats.rx_packets++; | 1217 | card->stats.rx_packets++; |
1218 | card->stats.rx_bytes += pkt_len; | 1218 | card->stats.rx_bytes += pkt_len; |
1219 | 1219 | ||
1220 | out: | 1220 | out: |
1221 | /* give the buffer back to the card */ | 1221 | /* give the buffer back to the card */ |
1222 | card->rx_buffer[4*descnr] = 0x80000000; | 1222 | card->rx_buffer[4*descnr] = 0x80000000; |
@@ -1234,9 +1234,9 @@ static void investigate_write_descriptor(struct net_device *dev, struct xircom_p | |||
1234 | int status; | 1234 | int status; |
1235 | 1235 | ||
1236 | enter("investigate_write_descriptor"); | 1236 | enter("investigate_write_descriptor"); |
1237 | 1237 | ||
1238 | status = card->tx_buffer[4*descnr]; | 1238 | status = card->tx_buffer[4*descnr]; |
1239 | #if 0 | 1239 | #if 0 |
1240 | if (status & 0x8000) { /* Major error */ | 1240 | if (status & 0x8000) { /* Major error */ |
1241 | printk(KERN_ERR "Major transmit error status %x \n", status); | 1241 | printk(KERN_ERR "Major transmit error status %x \n", status); |
1242 | card->tx_buffer[4*descnr] = 0; | 1242 | card->tx_buffer[4*descnr] = 0; |
@@ -1258,7 +1258,7 @@ static void investigate_write_descriptor(struct net_device *dev, struct xircom_p | |||
1258 | } | 1258 | } |
1259 | 1259 | ||
1260 | leave("investigate_write_descriptor"); | 1260 | leave("investigate_write_descriptor"); |
1261 | 1261 | ||
1262 | } | 1262 | } |
1263 | 1263 | ||
1264 | 1264 | ||
@@ -1271,8 +1271,8 @@ static int __init xircom_init(void) | |||
1271 | static void __exit xircom_exit(void) | 1271 | static void __exit xircom_exit(void) |
1272 | { | 1272 | { |
1273 | pci_unregister_driver(&xircom_ops); | 1273 | pci_unregister_driver(&xircom_ops); |
1274 | } | 1274 | } |
1275 | 1275 | ||
1276 | module_init(xircom_init) | 1276 | module_init(xircom_init) |
1277 | module_exit(xircom_exit) | 1277 | module_exit(xircom_exit) |
1278 | 1278 | ||
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c index ed1f837c8fda..2eb6b5f9ba0d 100644 --- a/drivers/net/via-velocity.c +++ b/drivers/net/via-velocity.c | |||
@@ -1899,6 +1899,13 @@ static int velocity_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1899 | 1899 | ||
1900 | int pktlen = skb->len; | 1900 | int pktlen = skb->len; |
1901 | 1901 | ||
1902 | #ifdef VELOCITY_ZERO_COPY_SUPPORT | ||
1903 | if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) { | ||
1904 | kfree_skb(skb); | ||
1905 | return 0; | ||
1906 | } | ||
1907 | #endif | ||
1908 | |||
1902 | spin_lock_irqsave(&vptr->lock, flags); | 1909 | spin_lock_irqsave(&vptr->lock, flags); |
1903 | 1910 | ||
1904 | index = vptr->td_curr[qnum]; | 1911 | index = vptr->td_curr[qnum]; |
@@ -1914,8 +1921,6 @@ static int velocity_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1914 | */ | 1921 | */ |
1915 | if (pktlen < ETH_ZLEN) { | 1922 | if (pktlen < ETH_ZLEN) { |
1916 | /* Cannot occur until ZC support */ | 1923 | /* Cannot occur until ZC support */ |
1917 | if(skb_linearize(skb, GFP_ATOMIC)) | ||
1918 | return 0; | ||
1919 | pktlen = ETH_ZLEN; | 1924 | pktlen = ETH_ZLEN; |
1920 | memcpy(tdinfo->buf, skb->data, skb->len); | 1925 | memcpy(tdinfo->buf, skb->data, skb->len); |
1921 | memset(tdinfo->buf + skb->len, 0, ETH_ZLEN - skb->len); | 1926 | memset(tdinfo->buf + skb->len, 0, ETH_ZLEN - skb->len); |
@@ -1933,7 +1938,6 @@ static int velocity_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1933 | int nfrags = skb_shinfo(skb)->nr_frags; | 1938 | int nfrags = skb_shinfo(skb)->nr_frags; |
1934 | tdinfo->skb = skb; | 1939 | tdinfo->skb = skb; |
1935 | if (nfrags > 6) { | 1940 | if (nfrags > 6) { |
1936 | skb_linearize(skb, GFP_ATOMIC); | ||
1937 | memcpy(tdinfo->buf, skb->data, skb->len); | 1941 | memcpy(tdinfo->buf, skb->data, skb->len); |
1938 | tdinfo->skb_dma[0] = tdinfo->buf_dma; | 1942 | tdinfo->skb_dma[0] = tdinfo->buf_dma; |
1939 | td_ptr->tdesc0.pktsize = | 1943 | td_ptr->tdesc0.pktsize = |
diff --git a/drivers/net/via-velocity.h b/drivers/net/via-velocity.h index d9a774b91ddc..f1b2640ebdc6 100644 --- a/drivers/net/via-velocity.h +++ b/drivers/net/via-velocity.h | |||
@@ -307,7 +307,7 @@ enum velocity_owner { | |||
307 | #define TX_QUEUE_NO 4 | 307 | #define TX_QUEUE_NO 4 |
308 | 308 | ||
309 | #define MAX_HW_MIB_COUNTER 32 | 309 | #define MAX_HW_MIB_COUNTER 32 |
310 | #define VELOCITY_MIN_MTU (1514-14) | 310 | #define VELOCITY_MIN_MTU (64) |
311 | #define VELOCITY_MAX_MTU (9000) | 311 | #define VELOCITY_MAX_MTU (9000) |
312 | 312 | ||
313 | /* | 313 | /* |
diff --git a/drivers/net/wan/pci200syn.c b/drivers/net/wan/pci200syn.c index eba8e5cfacc2..f485a97844cc 100644 --- a/drivers/net/wan/pci200syn.c +++ b/drivers/net/wan/pci200syn.c | |||
@@ -50,10 +50,6 @@ static const char* devname = "PCI200SYN"; | |||
50 | static int pci_clock_freq = 33000000; | 50 | static int pci_clock_freq = 33000000; |
51 | #define CLOCK_BASE pci_clock_freq | 51 | #define CLOCK_BASE pci_clock_freq |
52 | 52 | ||
53 | #define PCI_VENDOR_ID_GORAMO 0x10B5 /* uses PLX:9050 ID - this card */ | ||
54 | #define PCI_DEVICE_ID_PCI200SYN 0x9050 /* doesn't have its own ID */ | ||
55 | |||
56 | |||
57 | /* | 53 | /* |
58 | * PLX PCI9052 local configuration and shared runtime registers. | 54 | * PLX PCI9052 local configuration and shared runtime registers. |
59 | * This structure can be used to access 9052 registers (memory mapped). | 55 | * This structure can be used to access 9052 registers (memory mapped). |
@@ -262,7 +258,7 @@ static void pci200_pci_remove_one(struct pci_dev *pdev) | |||
262 | int i; | 258 | int i; |
263 | card_t *card = pci_get_drvdata(pdev); | 259 | card_t *card = pci_get_drvdata(pdev); |
264 | 260 | ||
265 | for(i = 0; i < 2; i++) | 261 | for (i = 0; i < 2; i++) |
266 | if (card->ports[i].card) { | 262 | if (card->ports[i].card) { |
267 | struct net_device *dev = port_to_dev(&card->ports[i]); | 263 | struct net_device *dev = port_to_dev(&card->ports[i]); |
268 | unregister_hdlc_device(dev); | 264 | unregister_hdlc_device(dev); |
@@ -385,6 +381,15 @@ static int __devinit pci200_pci_init_one(struct pci_dev *pdev, | |||
385 | " %u RX packets rings\n", ramsize / 1024, ramphys, | 381 | " %u RX packets rings\n", ramsize / 1024, ramphys, |
386 | pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers); | 382 | pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers); |
387 | 383 | ||
384 | if (pdev->subsystem_device == PCI_DEVICE_ID_PLX_9050) { | ||
385 | printk(KERN_ERR "Detected PCI200SYN card with old " | ||
386 | "configuration data.\n"); | ||
387 | printk(KERN_ERR "See <http://www.kernel.org/pub/" | ||
388 | "linux/utils/net/hdlc/pci200syn/> for update.\n"); | ||
389 | printk(KERN_ERR "The card will stop working with" | ||
390 | " future versions of Linux if not updated.\n"); | ||
391 | } | ||
392 | |||
388 | if (card->tx_ring_buffers < 1) { | 393 | if (card->tx_ring_buffers < 1) { |
389 | printk(KERN_ERR "pci200syn: RAM test failed\n"); | 394 | printk(KERN_ERR "pci200syn: RAM test failed\n"); |
390 | pci200_pci_remove_one(pdev); | 395 | pci200_pci_remove_one(pdev); |
@@ -396,7 +401,7 @@ static int __devinit pci200_pci_init_one(struct pci_dev *pdev, | |||
396 | writew(readw(p) | 0x0040, p); | 401 | writew(readw(p) | 0x0040, p); |
397 | 402 | ||
398 | /* Allocate IRQ */ | 403 | /* Allocate IRQ */ |
399 | if(request_irq(pdev->irq, sca_intr, SA_SHIRQ, devname, card)) { | 404 | if (request_irq(pdev->irq, sca_intr, SA_SHIRQ, devname, card)) { |
400 | printk(KERN_WARNING "pci200syn: could not allocate IRQ%d.\n", | 405 | printk(KERN_WARNING "pci200syn: could not allocate IRQ%d.\n", |
401 | pdev->irq); | 406 | pdev->irq); |
402 | pci200_pci_remove_one(pdev); | 407 | pci200_pci_remove_one(pdev); |
@@ -406,7 +411,7 @@ static int __devinit pci200_pci_init_one(struct pci_dev *pdev, | |||
406 | 411 | ||
407 | sca_init(card, 0); | 412 | sca_init(card, 0); |
408 | 413 | ||
409 | for(i = 0; i < 2; i++) { | 414 | for (i = 0; i < 2; i++) { |
410 | port_t *port = &card->ports[i]; | 415 | port_t *port = &card->ports[i]; |
411 | struct net_device *dev = port_to_dev(port); | 416 | struct net_device *dev = port_to_dev(port); |
412 | hdlc_device *hdlc = dev_to_hdlc(dev); | 417 | hdlc_device *hdlc = dev_to_hdlc(dev); |
@@ -425,7 +430,7 @@ static int __devinit pci200_pci_init_one(struct pci_dev *pdev, | |||
425 | hdlc->xmit = sca_xmit; | 430 | hdlc->xmit = sca_xmit; |
426 | port->settings.clock_type = CLOCK_EXT; | 431 | port->settings.clock_type = CLOCK_EXT; |
427 | port->card = card; | 432 | port->card = card; |
428 | if(register_hdlc_device(dev)) { | 433 | if (register_hdlc_device(dev)) { |
429 | printk(KERN_ERR "pci200syn: unable to register hdlc " | 434 | printk(KERN_ERR "pci200syn: unable to register hdlc " |
430 | "device\n"); | 435 | "device\n"); |
431 | port->card = NULL; | 436 | port->card = NULL; |
@@ -445,8 +450,10 @@ static int __devinit pci200_pci_init_one(struct pci_dev *pdev, | |||
445 | 450 | ||
446 | 451 | ||
447 | static struct pci_device_id pci200_pci_tbl[] __devinitdata = { | 452 | static struct pci_device_id pci200_pci_tbl[] __devinitdata = { |
448 | { PCI_VENDOR_ID_GORAMO, PCI_DEVICE_ID_PCI200SYN, PCI_ANY_ID, | 453 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX, |
449 | PCI_ANY_ID, 0, 0, 0 }, | 454 | PCI_DEVICE_ID_PLX_9050, 0, 0, 0 }, |
455 | { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX, | ||
456 | PCI_DEVICE_ID_PLX_PCI200SYN, 0, 0, 0 }, | ||
450 | { 0, } | 457 | { 0, } |
451 | }; | 458 | }; |
452 | 459 | ||
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig index e0874cbfefea..30ec235e6935 100644 --- a/drivers/net/wireless/Kconfig +++ b/drivers/net/wireless/Kconfig | |||
@@ -235,7 +235,35 @@ config IPW2200_MONITOR | |||
235 | promiscuous mode via the Wireless Tool's Monitor mode. While in this | 235 | promiscuous mode via the Wireless Tool's Monitor mode. While in this |
236 | mode, no packets can be sent. | 236 | mode, no packets can be sent. |
237 | 237 | ||
238 | config IPW_QOS | 238 | config IPW2200_RADIOTAP |
239 | bool "Enable radiotap format 802.11 raw packet support" | ||
240 | depends on IPW2200_MONITOR | ||
241 | |||
242 | config IPW2200_PROMISCUOUS | ||
243 | bool "Enable creation of a RF radiotap promiscuous interface" | ||
244 | depends on IPW2200_MONITOR | ||
245 | select IPW2200_RADIOTAP | ||
246 | ---help--- | ||
247 | Enables the creation of a second interface prefixed 'rtap'. | ||
248 | This second interface will provide every received in radiotap | ||
249 | format. | ||
250 | |||
251 | This is useful for performing wireless network analysis while | ||
252 | maintaining an active association. | ||
253 | |||
254 | Example usage: | ||
255 | |||
256 | % modprobe ipw2200 rtap_iface=1 | ||
257 | % ifconfig rtap0 up | ||
258 | % tethereal -i rtap0 | ||
259 | |||
260 | If you do not specify 'rtap_iface=1' as a module parameter then | ||
261 | the rtap interface will not be created and you will need to turn | ||
262 | it on via sysfs: | ||
263 | |||
264 | % echo 1 > /sys/bus/pci/drivers/ipw2200/*/rtap_iface | ||
265 | |||
266 | config IPW2200_QOS | ||
239 | bool "Enable QoS support" | 267 | bool "Enable QoS support" |
240 | depends on IPW2200 && EXPERIMENTAL | 268 | depends on IPW2200 && EXPERIMENTAL |
241 | 269 | ||
@@ -503,6 +531,23 @@ config PRISM54 | |||
503 | say M here and read <file:Documentation/modules.txt>. The module | 531 | say M here and read <file:Documentation/modules.txt>. The module |
504 | will be called prism54.ko. | 532 | will be called prism54.ko. |
505 | 533 | ||
534 | config USB_ZD1201 | ||
535 | tristate "USB ZD1201 based Wireless device support" | ||
536 | depends on USB && NET_RADIO | ||
537 | select FW_LOADER | ||
538 | ---help--- | ||
539 | Say Y if you want to use wireless LAN adapters based on the ZyDAS | ||
540 | ZD1201 chip. | ||
541 | |||
542 | This driver makes the adapter appear as a normal Ethernet interface, | ||
543 | typically on wlan0. | ||
544 | |||
545 | The zd1201 device requires external firmware to be loaded. | ||
546 | This can be found at http://linux-lc100020.sourceforge.net/ | ||
547 | |||
548 | To compile this driver as a module, choose M here: the | ||
549 | module will be called zd1201. | ||
550 | |||
506 | source "drivers/net/wireless/hostap/Kconfig" | 551 | source "drivers/net/wireless/hostap/Kconfig" |
507 | source "drivers/net/wireless/bcm43xx/Kconfig" | 552 | source "drivers/net/wireless/bcm43xx/Kconfig" |
508 | 553 | ||
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile index c86779879361..512603de309a 100644 --- a/drivers/net/wireless/Makefile +++ b/drivers/net/wireless/Makefile | |||
@@ -40,3 +40,5 @@ obj-$(CONFIG_BCM43XX) += bcm43xx/ | |||
40 | # 16-bit wireless PCMCIA client drivers | 40 | # 16-bit wireless PCMCIA client drivers |
41 | obj-$(CONFIG_PCMCIA_RAYCS) += ray_cs.o | 41 | obj-$(CONFIG_PCMCIA_RAYCS) += ray_cs.o |
42 | obj-$(CONFIG_PCMCIA_WL3501) += wl3501_cs.o | 42 | obj-$(CONFIG_PCMCIA_WL3501) += wl3501_cs.o |
43 | |||
44 | obj-$(CONFIG_USB_ZD1201) += zd1201.o | ||
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c index 00764ddd74d8..4069b79d8259 100644 --- a/drivers/net/wireless/airo.c +++ b/drivers/net/wireless/airo.c | |||
@@ -47,6 +47,7 @@ | |||
47 | #include <linux/ioport.h> | 47 | #include <linux/ioport.h> |
48 | #include <linux/pci.h> | 48 | #include <linux/pci.h> |
49 | #include <asm/uaccess.h> | 49 | #include <asm/uaccess.h> |
50 | #include <net/ieee80211.h> | ||
50 | 51 | ||
51 | #include "airo.h" | 52 | #include "airo.h" |
52 | 53 | ||
@@ -467,6 +468,8 @@ static int do8bitIO = 0; | |||
467 | #define RID_ECHOTEST_RESULTS 0xFF71 | 468 | #define RID_ECHOTEST_RESULTS 0xFF71 |
468 | #define RID_BSSLISTFIRST 0xFF72 | 469 | #define RID_BSSLISTFIRST 0xFF72 |
469 | #define RID_BSSLISTNEXT 0xFF73 | 470 | #define RID_BSSLISTNEXT 0xFF73 |
471 | #define RID_WPA_BSSLISTFIRST 0xFF74 | ||
472 | #define RID_WPA_BSSLISTNEXT 0xFF75 | ||
470 | 473 | ||
471 | typedef struct { | 474 | typedef struct { |
472 | u16 cmd; | 475 | u16 cmd; |
@@ -739,6 +742,14 @@ typedef struct { | |||
739 | u16 extSoftCap; | 742 | u16 extSoftCap; |
740 | } CapabilityRid; | 743 | } CapabilityRid; |
741 | 744 | ||
745 | |||
746 | /* Only present on firmware >= 5.30.17 */ | ||
747 | typedef struct { | ||
748 | u16 unknown[4]; | ||
749 | u8 fixed[12]; /* WLAN management frame */ | ||
750 | u8 iep[624]; | ||
751 | } BSSListRidExtra; | ||
752 | |||
742 | typedef struct { | 753 | typedef struct { |
743 | u16 len; | 754 | u16 len; |
744 | u16 index; /* First is 0 and 0xffff means end of list */ | 755 | u16 index; /* First is 0 and 0xffff means end of list */ |
@@ -767,6 +778,9 @@ typedef struct { | |||
767 | } fh; | 778 | } fh; |
768 | u16 dsChannel; | 779 | u16 dsChannel; |
769 | u16 atimWindow; | 780 | u16 atimWindow; |
781 | |||
782 | /* Only present on firmware >= 5.30.17 */ | ||
783 | BSSListRidExtra extra; | ||
770 | } BSSListRid; | 784 | } BSSListRid; |
771 | 785 | ||
772 | typedef struct { | 786 | typedef struct { |
@@ -1140,8 +1154,6 @@ struct airo_info { | |||
1140 | char defindex; // Used with auto wep | 1154 | char defindex; // Used with auto wep |
1141 | struct proc_dir_entry *proc_entry; | 1155 | struct proc_dir_entry *proc_entry; |
1142 | spinlock_t aux_lock; | 1156 | spinlock_t aux_lock; |
1143 | unsigned long flags; | ||
1144 | #define FLAG_PROMISC 8 /* IFF_PROMISC 0x100 - include/linux/if.h */ | ||
1145 | #define FLAG_RADIO_OFF 0 /* User disabling of MAC */ | 1157 | #define FLAG_RADIO_OFF 0 /* User disabling of MAC */ |
1146 | #define FLAG_RADIO_DOWN 1 /* ifup/ifdown disabling of MAC */ | 1158 | #define FLAG_RADIO_DOWN 1 /* ifup/ifdown disabling of MAC */ |
1147 | #define FLAG_RADIO_MASK 0x03 | 1159 | #define FLAG_RADIO_MASK 0x03 |
@@ -1151,6 +1163,7 @@ struct airo_info { | |||
1151 | #define FLAG_UPDATE_MULTI 5 | 1163 | #define FLAG_UPDATE_MULTI 5 |
1152 | #define FLAG_UPDATE_UNI 6 | 1164 | #define FLAG_UPDATE_UNI 6 |
1153 | #define FLAG_802_11 7 | 1165 | #define FLAG_802_11 7 |
1166 | #define FLAG_PROMISC 8 /* IFF_PROMISC 0x100 - include/linux/if.h */ | ||
1154 | #define FLAG_PENDING_XMIT 9 | 1167 | #define FLAG_PENDING_XMIT 9 |
1155 | #define FLAG_PENDING_XMIT11 10 | 1168 | #define FLAG_PENDING_XMIT11 10 |
1156 | #define FLAG_MPI 11 | 1169 | #define FLAG_MPI 11 |
@@ -1158,17 +1171,19 @@ struct airo_info { | |||
1158 | #define FLAG_COMMIT 13 | 1171 | #define FLAG_COMMIT 13 |
1159 | #define FLAG_RESET 14 | 1172 | #define FLAG_RESET 14 |
1160 | #define FLAG_FLASHING 15 | 1173 | #define FLAG_FLASHING 15 |
1161 | #define JOB_MASK 0x2ff0000 | 1174 | #define FLAG_WPA_CAPABLE 16 |
1162 | #define JOB_DIE 16 | 1175 | unsigned long flags; |
1163 | #define JOB_XMIT 17 | 1176 | #define JOB_DIE 0 |
1164 | #define JOB_XMIT11 18 | 1177 | #define JOB_XMIT 1 |
1165 | #define JOB_STATS 19 | 1178 | #define JOB_XMIT11 2 |
1166 | #define JOB_PROMISC 20 | 1179 | #define JOB_STATS 3 |
1167 | #define JOB_MIC 21 | 1180 | #define JOB_PROMISC 4 |
1168 | #define JOB_EVENT 22 | 1181 | #define JOB_MIC 5 |
1169 | #define JOB_AUTOWEP 23 | 1182 | #define JOB_EVENT 6 |
1170 | #define JOB_WSTATS 24 | 1183 | #define JOB_AUTOWEP 7 |
1171 | #define JOB_SCAN_RESULTS 25 | 1184 | #define JOB_WSTATS 8 |
1185 | #define JOB_SCAN_RESULTS 9 | ||
1186 | unsigned long jobs; | ||
1172 | int (*bap_read)(struct airo_info*, u16 *pu16Dst, int bytelen, | 1187 | int (*bap_read)(struct airo_info*, u16 *pu16Dst, int bytelen, |
1173 | int whichbap); | 1188 | int whichbap); |
1174 | unsigned short *flash; | 1189 | unsigned short *flash; |
@@ -1208,6 +1223,11 @@ struct airo_info { | |||
1208 | #define PCI_SHARED_LEN 2*MPI_MAX_FIDS*PKTSIZE+RIDSIZE | 1223 | #define PCI_SHARED_LEN 2*MPI_MAX_FIDS*PKTSIZE+RIDSIZE |
1209 | char proc_name[IFNAMSIZ]; | 1224 | char proc_name[IFNAMSIZ]; |
1210 | 1225 | ||
1226 | /* WPA-related stuff */ | ||
1227 | unsigned int bssListFirst; | ||
1228 | unsigned int bssListNext; | ||
1229 | unsigned int bssListRidLen; | ||
1230 | |||
1211 | struct list_head network_list; | 1231 | struct list_head network_list; |
1212 | struct list_head network_free_list; | 1232 | struct list_head network_free_list; |
1213 | BSSListElement *networks; | 1233 | BSSListElement *networks; |
@@ -1264,7 +1284,7 @@ static void micinit(struct airo_info *ai) | |||
1264 | { | 1284 | { |
1265 | MICRid mic_rid; | 1285 | MICRid mic_rid; |
1266 | 1286 | ||
1267 | clear_bit(JOB_MIC, &ai->flags); | 1287 | clear_bit(JOB_MIC, &ai->jobs); |
1268 | PC4500_readrid(ai, RID_MIC, &mic_rid, sizeof(mic_rid), 0); | 1288 | PC4500_readrid(ai, RID_MIC, &mic_rid, sizeof(mic_rid), 0); |
1269 | up(&ai->sem); | 1289 | up(&ai->sem); |
1270 | 1290 | ||
@@ -1705,24 +1725,24 @@ static void emmh32_final(emmh32_context *context, u8 digest[4]) | |||
1705 | static int readBSSListRid(struct airo_info *ai, int first, | 1725 | static int readBSSListRid(struct airo_info *ai, int first, |
1706 | BSSListRid *list) { | 1726 | BSSListRid *list) { |
1707 | int rc; | 1727 | int rc; |
1708 | Cmd cmd; | 1728 | Cmd cmd; |
1709 | Resp rsp; | 1729 | Resp rsp; |
1710 | 1730 | ||
1711 | if (first == 1) { | 1731 | if (first == 1) { |
1712 | if (ai->flags & FLAG_RADIO_MASK) return -ENETDOWN; | 1732 | if (ai->flags & FLAG_RADIO_MASK) return -ENETDOWN; |
1713 | memset(&cmd, 0, sizeof(cmd)); | 1733 | memset(&cmd, 0, sizeof(cmd)); |
1714 | cmd.cmd=CMD_LISTBSS; | 1734 | cmd.cmd=CMD_LISTBSS; |
1715 | if (down_interruptible(&ai->sem)) | 1735 | if (down_interruptible(&ai->sem)) |
1716 | return -ERESTARTSYS; | 1736 | return -ERESTARTSYS; |
1717 | issuecommand(ai, &cmd, &rsp); | 1737 | issuecommand(ai, &cmd, &rsp); |
1718 | up(&ai->sem); | 1738 | up(&ai->sem); |
1719 | /* Let the command take effect */ | 1739 | /* Let the command take effect */ |
1720 | ai->task = current; | 1740 | ai->task = current; |
1721 | ssleep(3); | 1741 | ssleep(3); |
1722 | ai->task = NULL; | 1742 | ai->task = NULL; |
1723 | } | 1743 | } |
1724 | rc = PC4500_readrid(ai, first ? RID_BSSLISTFIRST : RID_BSSLISTNEXT, | 1744 | rc = PC4500_readrid(ai, first ? ai->bssListFirst : ai->bssListNext, |
1725 | list, sizeof(*list), 1); | 1745 | list, ai->bssListRidLen, 1); |
1726 | 1746 | ||
1727 | list->len = le16_to_cpu(list->len); | 1747 | list->len = le16_to_cpu(list->len); |
1728 | list->index = le16_to_cpu(list->index); | 1748 | list->index = le16_to_cpu(list->index); |
@@ -2112,7 +2132,7 @@ static void airo_end_xmit(struct net_device *dev) { | |||
2112 | int fid = priv->xmit.fid; | 2132 | int fid = priv->xmit.fid; |
2113 | u32 *fids = priv->fids; | 2133 | u32 *fids = priv->fids; |
2114 | 2134 | ||
2115 | clear_bit(JOB_XMIT, &priv->flags); | 2135 | clear_bit(JOB_XMIT, &priv->jobs); |
2116 | clear_bit(FLAG_PENDING_XMIT, &priv->flags); | 2136 | clear_bit(FLAG_PENDING_XMIT, &priv->flags); |
2117 | status = transmit_802_3_packet (priv, fids[fid], skb->data); | 2137 | status = transmit_802_3_packet (priv, fids[fid], skb->data); |
2118 | up(&priv->sem); | 2138 | up(&priv->sem); |
@@ -2162,7 +2182,7 @@ static int airo_start_xmit(struct sk_buff *skb, struct net_device *dev) { | |||
2162 | if (down_trylock(&priv->sem) != 0) { | 2182 | if (down_trylock(&priv->sem) != 0) { |
2163 | set_bit(FLAG_PENDING_XMIT, &priv->flags); | 2183 | set_bit(FLAG_PENDING_XMIT, &priv->flags); |
2164 | netif_stop_queue(dev); | 2184 | netif_stop_queue(dev); |
2165 | set_bit(JOB_XMIT, &priv->flags); | 2185 | set_bit(JOB_XMIT, &priv->jobs); |
2166 | wake_up_interruptible(&priv->thr_wait); | 2186 | wake_up_interruptible(&priv->thr_wait); |
2167 | } else | 2187 | } else |
2168 | airo_end_xmit(dev); | 2188 | airo_end_xmit(dev); |
@@ -2177,7 +2197,7 @@ static void airo_end_xmit11(struct net_device *dev) { | |||
2177 | int fid = priv->xmit11.fid; | 2197 | int fid = priv->xmit11.fid; |
2178 | u32 *fids = priv->fids; | 2198 | u32 *fids = priv->fids; |
2179 | 2199 | ||
2180 | clear_bit(JOB_XMIT11, &priv->flags); | 2200 | clear_bit(JOB_XMIT11, &priv->jobs); |
2181 | clear_bit(FLAG_PENDING_XMIT11, &priv->flags); | 2201 | clear_bit(FLAG_PENDING_XMIT11, &priv->flags); |
2182 | status = transmit_802_11_packet (priv, fids[fid], skb->data); | 2202 | status = transmit_802_11_packet (priv, fids[fid], skb->data); |
2183 | up(&priv->sem); | 2203 | up(&priv->sem); |
@@ -2233,7 +2253,7 @@ static int airo_start_xmit11(struct sk_buff *skb, struct net_device *dev) { | |||
2233 | if (down_trylock(&priv->sem) != 0) { | 2253 | if (down_trylock(&priv->sem) != 0) { |
2234 | set_bit(FLAG_PENDING_XMIT11, &priv->flags); | 2254 | set_bit(FLAG_PENDING_XMIT11, &priv->flags); |
2235 | netif_stop_queue(dev); | 2255 | netif_stop_queue(dev); |
2236 | set_bit(JOB_XMIT11, &priv->flags); | 2256 | set_bit(JOB_XMIT11, &priv->jobs); |
2237 | wake_up_interruptible(&priv->thr_wait); | 2257 | wake_up_interruptible(&priv->thr_wait); |
2238 | } else | 2258 | } else |
2239 | airo_end_xmit11(dev); | 2259 | airo_end_xmit11(dev); |
@@ -2244,7 +2264,7 @@ static void airo_read_stats(struct airo_info *ai) { | |||
2244 | StatsRid stats_rid; | 2264 | StatsRid stats_rid; |
2245 | u32 *vals = stats_rid.vals; | 2265 | u32 *vals = stats_rid.vals; |
2246 | 2266 | ||
2247 | clear_bit(JOB_STATS, &ai->flags); | 2267 | clear_bit(JOB_STATS, &ai->jobs); |
2248 | if (ai->power.event) { | 2268 | if (ai->power.event) { |
2249 | up(&ai->sem); | 2269 | up(&ai->sem); |
2250 | return; | 2270 | return; |
@@ -2272,10 +2292,10 @@ static struct net_device_stats *airo_get_stats(struct net_device *dev) | |||
2272 | { | 2292 | { |
2273 | struct airo_info *local = dev->priv; | 2293 | struct airo_info *local = dev->priv; |
2274 | 2294 | ||
2275 | if (!test_bit(JOB_STATS, &local->flags)) { | 2295 | if (!test_bit(JOB_STATS, &local->jobs)) { |
2276 | /* Get stats out of the card if available */ | 2296 | /* Get stats out of the card if available */ |
2277 | if (down_trylock(&local->sem) != 0) { | 2297 | if (down_trylock(&local->sem) != 0) { |
2278 | set_bit(JOB_STATS, &local->flags); | 2298 | set_bit(JOB_STATS, &local->jobs); |
2279 | wake_up_interruptible(&local->thr_wait); | 2299 | wake_up_interruptible(&local->thr_wait); |
2280 | } else | 2300 | } else |
2281 | airo_read_stats(local); | 2301 | airo_read_stats(local); |
@@ -2290,7 +2310,7 @@ static void airo_set_promisc(struct airo_info *ai) { | |||
2290 | 2310 | ||
2291 | memset(&cmd, 0, sizeof(cmd)); | 2311 | memset(&cmd, 0, sizeof(cmd)); |
2292 | cmd.cmd=CMD_SETMODE; | 2312 | cmd.cmd=CMD_SETMODE; |
2293 | clear_bit(JOB_PROMISC, &ai->flags); | 2313 | clear_bit(JOB_PROMISC, &ai->jobs); |
2294 | cmd.parm0=(ai->flags&IFF_PROMISC) ? PROMISC : NOPROMISC; | 2314 | cmd.parm0=(ai->flags&IFF_PROMISC) ? PROMISC : NOPROMISC; |
2295 | issuecommand(ai, &cmd, &rsp); | 2315 | issuecommand(ai, &cmd, &rsp); |
2296 | up(&ai->sem); | 2316 | up(&ai->sem); |
@@ -2302,7 +2322,7 @@ static void airo_set_multicast_list(struct net_device *dev) { | |||
2302 | if ((dev->flags ^ ai->flags) & IFF_PROMISC) { | 2322 | if ((dev->flags ^ ai->flags) & IFF_PROMISC) { |
2303 | change_bit(FLAG_PROMISC, &ai->flags); | 2323 | change_bit(FLAG_PROMISC, &ai->flags); |
2304 | if (down_trylock(&ai->sem) != 0) { | 2324 | if (down_trylock(&ai->sem) != 0) { |
2305 | set_bit(JOB_PROMISC, &ai->flags); | 2325 | set_bit(JOB_PROMISC, &ai->jobs); |
2306 | wake_up_interruptible(&ai->thr_wait); | 2326 | wake_up_interruptible(&ai->thr_wait); |
2307 | } else | 2327 | } else |
2308 | airo_set_promisc(ai); | 2328 | airo_set_promisc(ai); |
@@ -2380,7 +2400,7 @@ void stop_airo_card( struct net_device *dev, int freeres ) | |||
2380 | } | 2400 | } |
2381 | clear_bit(FLAG_REGISTERED, &ai->flags); | 2401 | clear_bit(FLAG_REGISTERED, &ai->flags); |
2382 | } | 2402 | } |
2383 | set_bit(JOB_DIE, &ai->flags); | 2403 | set_bit(JOB_DIE, &ai->jobs); |
2384 | kill_proc(ai->thr_pid, SIGTERM, 1); | 2404 | kill_proc(ai->thr_pid, SIGTERM, 1); |
2385 | wait_for_completion(&ai->thr_exited); | 2405 | wait_for_completion(&ai->thr_exited); |
2386 | 2406 | ||
@@ -2701,14 +2721,14 @@ static int reset_card( struct net_device *dev , int lock) { | |||
2701 | return 0; | 2721 | return 0; |
2702 | } | 2722 | } |
2703 | 2723 | ||
2704 | #define MAX_NETWORK_COUNT 64 | 2724 | #define AIRO_MAX_NETWORK_COUNT 64 |
2705 | static int airo_networks_allocate(struct airo_info *ai) | 2725 | static int airo_networks_allocate(struct airo_info *ai) |
2706 | { | 2726 | { |
2707 | if (ai->networks) | 2727 | if (ai->networks) |
2708 | return 0; | 2728 | return 0; |
2709 | 2729 | ||
2710 | ai->networks = | 2730 | ai->networks = |
2711 | kzalloc(MAX_NETWORK_COUNT * sizeof(BSSListElement), | 2731 | kzalloc(AIRO_MAX_NETWORK_COUNT * sizeof(BSSListElement), |
2712 | GFP_KERNEL); | 2732 | GFP_KERNEL); |
2713 | if (!ai->networks) { | 2733 | if (!ai->networks) { |
2714 | airo_print_warn(ai->dev->name, "Out of memory allocating beacons"); | 2734 | airo_print_warn(ai->dev->name, "Out of memory allocating beacons"); |
@@ -2732,11 +2752,33 @@ static void airo_networks_initialize(struct airo_info *ai) | |||
2732 | 2752 | ||
2733 | INIT_LIST_HEAD(&ai->network_free_list); | 2753 | INIT_LIST_HEAD(&ai->network_free_list); |
2734 | INIT_LIST_HEAD(&ai->network_list); | 2754 | INIT_LIST_HEAD(&ai->network_list); |
2735 | for (i = 0; i < MAX_NETWORK_COUNT; i++) | 2755 | for (i = 0; i < AIRO_MAX_NETWORK_COUNT; i++) |
2736 | list_add_tail(&ai->networks[i].list, | 2756 | list_add_tail(&ai->networks[i].list, |
2737 | &ai->network_free_list); | 2757 | &ai->network_free_list); |
2738 | } | 2758 | } |
2739 | 2759 | ||
2760 | static int airo_test_wpa_capable(struct airo_info *ai) | ||
2761 | { | ||
2762 | int status; | ||
2763 | CapabilityRid cap_rid; | ||
2764 | const char *name = ai->dev->name; | ||
2765 | |||
2766 | status = readCapabilityRid(ai, &cap_rid, 1); | ||
2767 | if (status != SUCCESS) return 0; | ||
2768 | |||
2769 | /* Only firmware versions 5.30.17 or better can do WPA */ | ||
2770 | if ((cap_rid.softVer > 0x530) | ||
2771 | || ((cap_rid.softVer == 0x530) && (cap_rid.softSubVer >= 17))) { | ||
2772 | airo_print_info(name, "WPA is supported."); | ||
2773 | return 1; | ||
2774 | } | ||
2775 | |||
2776 | /* No WPA support */ | ||
2777 | airo_print_info(name, "WPA unsupported (only firmware versions 5.30.17" | ||
2778 | " and greater support WPA. Detected %s)", cap_rid.prodVer); | ||
2779 | return 0; | ||
2780 | } | ||
2781 | |||
2740 | static struct net_device *_init_airo_card( unsigned short irq, int port, | 2782 | static struct net_device *_init_airo_card( unsigned short irq, int port, |
2741 | int is_pcmcia, struct pci_dev *pci, | 2783 | int is_pcmcia, struct pci_dev *pci, |
2742 | struct device *dmdev ) | 2784 | struct device *dmdev ) |
@@ -2759,6 +2801,7 @@ static struct net_device *_init_airo_card( unsigned short irq, int port, | |||
2759 | ai = dev->priv; | 2801 | ai = dev->priv; |
2760 | ai->wifidev = NULL; | 2802 | ai->wifidev = NULL; |
2761 | ai->flags = 0; | 2803 | ai->flags = 0; |
2804 | ai->jobs = 0; | ||
2762 | ai->dev = dev; | 2805 | ai->dev = dev; |
2763 | if (pci && (pci->device == 0x5000 || pci->device == 0xa504)) { | 2806 | if (pci && (pci->device == 0x5000 || pci->device == 0xa504)) { |
2764 | airo_print_dbg(dev->name, "Found an MPI350 card"); | 2807 | airo_print_dbg(dev->name, "Found an MPI350 card"); |
@@ -2838,6 +2881,18 @@ static struct net_device *_init_airo_card( unsigned short irq, int port, | |||
2838 | set_bit(FLAG_FLASHING, &ai->flags); | 2881 | set_bit(FLAG_FLASHING, &ai->flags); |
2839 | } | 2882 | } |
2840 | 2883 | ||
2884 | /* Test for WPA support */ | ||
2885 | if (airo_test_wpa_capable(ai)) { | ||
2886 | set_bit(FLAG_WPA_CAPABLE, &ai->flags); | ||
2887 | ai->bssListFirst = RID_WPA_BSSLISTFIRST; | ||
2888 | ai->bssListNext = RID_WPA_BSSLISTNEXT; | ||
2889 | ai->bssListRidLen = sizeof(BSSListRid); | ||
2890 | } else { | ||
2891 | ai->bssListFirst = RID_BSSLISTFIRST; | ||
2892 | ai->bssListNext = RID_BSSLISTNEXT; | ||
2893 | ai->bssListRidLen = sizeof(BSSListRid) - sizeof(BSSListRidExtra); | ||
2894 | } | ||
2895 | |||
2841 | rc = register_netdev(dev); | 2896 | rc = register_netdev(dev); |
2842 | if (rc) { | 2897 | if (rc) { |
2843 | airo_print_err(dev->name, "Couldn't register_netdev"); | 2898 | airo_print_err(dev->name, "Couldn't register_netdev"); |
@@ -2875,7 +2930,7 @@ err_out_irq: | |||
2875 | err_out_unlink: | 2930 | err_out_unlink: |
2876 | del_airo_dev(dev); | 2931 | del_airo_dev(dev); |
2877 | err_out_thr: | 2932 | err_out_thr: |
2878 | set_bit(JOB_DIE, &ai->flags); | 2933 | set_bit(JOB_DIE, &ai->jobs); |
2879 | kill_proc(ai->thr_pid, SIGTERM, 1); | 2934 | kill_proc(ai->thr_pid, SIGTERM, 1); |
2880 | wait_for_completion(&ai->thr_exited); | 2935 | wait_for_completion(&ai->thr_exited); |
2881 | err_out_free: | 2936 | err_out_free: |
@@ -2933,7 +2988,7 @@ static void airo_send_event(struct net_device *dev) { | |||
2933 | union iwreq_data wrqu; | 2988 | union iwreq_data wrqu; |
2934 | StatusRid status_rid; | 2989 | StatusRid status_rid; |
2935 | 2990 | ||
2936 | clear_bit(JOB_EVENT, &ai->flags); | 2991 | clear_bit(JOB_EVENT, &ai->jobs); |
2937 | PC4500_readrid(ai, RID_STATUS, &status_rid, sizeof(status_rid), 0); | 2992 | PC4500_readrid(ai, RID_STATUS, &status_rid, sizeof(status_rid), 0); |
2938 | up(&ai->sem); | 2993 | up(&ai->sem); |
2939 | wrqu.data.length = 0; | 2994 | wrqu.data.length = 0; |
@@ -2947,7 +3002,7 @@ static void airo_send_event(struct net_device *dev) { | |||
2947 | 3002 | ||
2948 | static void airo_process_scan_results (struct airo_info *ai) { | 3003 | static void airo_process_scan_results (struct airo_info *ai) { |
2949 | union iwreq_data wrqu; | 3004 | union iwreq_data wrqu; |
2950 | BSSListRid BSSList; | 3005 | BSSListRid bss; |
2951 | int rc; | 3006 | int rc; |
2952 | BSSListElement * loop_net; | 3007 | BSSListElement * loop_net; |
2953 | BSSListElement * tmp_net; | 3008 | BSSListElement * tmp_net; |
@@ -2960,15 +3015,15 @@ static void airo_process_scan_results (struct airo_info *ai) { | |||
2960 | } | 3015 | } |
2961 | 3016 | ||
2962 | /* Try to read the first entry of the scan result */ | 3017 | /* Try to read the first entry of the scan result */ |
2963 | rc = PC4500_readrid(ai, RID_BSSLISTFIRST, &BSSList, sizeof(BSSList), 0); | 3018 | rc = PC4500_readrid(ai, ai->bssListFirst, &bss, ai->bssListRidLen, 0); |
2964 | if((rc) || (BSSList.index == 0xffff)) { | 3019 | if((rc) || (bss.index == 0xffff)) { |
2965 | /* No scan results */ | 3020 | /* No scan results */ |
2966 | goto out; | 3021 | goto out; |
2967 | } | 3022 | } |
2968 | 3023 | ||
2969 | /* Read and parse all entries */ | 3024 | /* Read and parse all entries */ |
2970 | tmp_net = NULL; | 3025 | tmp_net = NULL; |
2971 | while((!rc) && (BSSList.index != 0xffff)) { | 3026 | while((!rc) && (bss.index != 0xffff)) { |
2972 | /* Grab a network off the free list */ | 3027 | /* Grab a network off the free list */ |
2973 | if (!list_empty(&ai->network_free_list)) { | 3028 | if (!list_empty(&ai->network_free_list)) { |
2974 | tmp_net = list_entry(ai->network_free_list.next, | 3029 | tmp_net = list_entry(ai->network_free_list.next, |
@@ -2977,19 +3032,19 @@ static void airo_process_scan_results (struct airo_info *ai) { | |||
2977 | } | 3032 | } |
2978 | 3033 | ||
2979 | if (tmp_net != NULL) { | 3034 | if (tmp_net != NULL) { |
2980 | memcpy(tmp_net, &BSSList, sizeof(tmp_net->bss)); | 3035 | memcpy(tmp_net, &bss, sizeof(tmp_net->bss)); |
2981 | list_add_tail(&tmp_net->list, &ai->network_list); | 3036 | list_add_tail(&tmp_net->list, &ai->network_list); |
2982 | tmp_net = NULL; | 3037 | tmp_net = NULL; |
2983 | } | 3038 | } |
2984 | 3039 | ||
2985 | /* Read next entry */ | 3040 | /* Read next entry */ |
2986 | rc = PC4500_readrid(ai, RID_BSSLISTNEXT, | 3041 | rc = PC4500_readrid(ai, ai->bssListNext, |
2987 | &BSSList, sizeof(BSSList), 0); | 3042 | &bss, ai->bssListRidLen, 0); |
2988 | } | 3043 | } |
2989 | 3044 | ||
2990 | out: | 3045 | out: |
2991 | ai->scan_timeout = 0; | 3046 | ai->scan_timeout = 0; |
2992 | clear_bit(JOB_SCAN_RESULTS, &ai->flags); | 3047 | clear_bit(JOB_SCAN_RESULTS, &ai->jobs); |
2993 | up(&ai->sem); | 3048 | up(&ai->sem); |
2994 | 3049 | ||
2995 | /* Send an empty event to user space. | 3050 | /* Send an empty event to user space. |
@@ -3019,10 +3074,10 @@ static int airo_thread(void *data) { | |||
3019 | /* make swsusp happy with our thread */ | 3074 | /* make swsusp happy with our thread */ |
3020 | try_to_freeze(); | 3075 | try_to_freeze(); |
3021 | 3076 | ||
3022 | if (test_bit(JOB_DIE, &ai->flags)) | 3077 | if (test_bit(JOB_DIE, &ai->jobs)) |
3023 | break; | 3078 | break; |
3024 | 3079 | ||
3025 | if (ai->flags & JOB_MASK) { | 3080 | if (ai->jobs) { |
3026 | locked = down_interruptible(&ai->sem); | 3081 | locked = down_interruptible(&ai->sem); |
3027 | } else { | 3082 | } else { |
3028 | wait_queue_t wait; | 3083 | wait_queue_t wait; |
@@ -3031,16 +3086,16 @@ static int airo_thread(void *data) { | |||
3031 | add_wait_queue(&ai->thr_wait, &wait); | 3086 | add_wait_queue(&ai->thr_wait, &wait); |
3032 | for (;;) { | 3087 | for (;;) { |
3033 | set_current_state(TASK_INTERRUPTIBLE); | 3088 | set_current_state(TASK_INTERRUPTIBLE); |
3034 | if (ai->flags & JOB_MASK) | 3089 | if (ai->jobs) |
3035 | break; | 3090 | break; |
3036 | if (ai->expires || ai->scan_timeout) { | 3091 | if (ai->expires || ai->scan_timeout) { |
3037 | if (ai->scan_timeout && | 3092 | if (ai->scan_timeout && |
3038 | time_after_eq(jiffies,ai->scan_timeout)){ | 3093 | time_after_eq(jiffies,ai->scan_timeout)){ |
3039 | set_bit(JOB_SCAN_RESULTS,&ai->flags); | 3094 | set_bit(JOB_SCAN_RESULTS, &ai->jobs); |
3040 | break; | 3095 | break; |
3041 | } else if (ai->expires && | 3096 | } else if (ai->expires && |
3042 | time_after_eq(jiffies,ai->expires)){ | 3097 | time_after_eq(jiffies,ai->expires)){ |
3043 | set_bit(JOB_AUTOWEP,&ai->flags); | 3098 | set_bit(JOB_AUTOWEP, &ai->jobs); |
3044 | break; | 3099 | break; |
3045 | } | 3100 | } |
3046 | if (!signal_pending(current)) { | 3101 | if (!signal_pending(current)) { |
@@ -3069,7 +3124,7 @@ static int airo_thread(void *data) { | |||
3069 | if (locked) | 3124 | if (locked) |
3070 | continue; | 3125 | continue; |
3071 | 3126 | ||
3072 | if (test_bit(JOB_DIE, &ai->flags)) { | 3127 | if (test_bit(JOB_DIE, &ai->jobs)) { |
3073 | up(&ai->sem); | 3128 | up(&ai->sem); |
3074 | break; | 3129 | break; |
3075 | } | 3130 | } |
@@ -3079,23 +3134,23 @@ static int airo_thread(void *data) { | |||
3079 | continue; | 3134 | continue; |
3080 | } | 3135 | } |
3081 | 3136 | ||
3082 | if (test_bit(JOB_XMIT, &ai->flags)) | 3137 | if (test_bit(JOB_XMIT, &ai->jobs)) |
3083 | airo_end_xmit(dev); | 3138 | airo_end_xmit(dev); |
3084 | else if (test_bit(JOB_XMIT11, &ai->flags)) | 3139 | else if (test_bit(JOB_XMIT11, &ai->jobs)) |
3085 | airo_end_xmit11(dev); | 3140 | airo_end_xmit11(dev); |
3086 | else if (test_bit(JOB_STATS, &ai->flags)) | 3141 | else if (test_bit(JOB_STATS, &ai->jobs)) |
3087 | airo_read_stats(ai); | 3142 | airo_read_stats(ai); |
3088 | else if (test_bit(JOB_WSTATS, &ai->flags)) | 3143 | else if (test_bit(JOB_WSTATS, &ai->jobs)) |
3089 | airo_read_wireless_stats(ai); | 3144 | airo_read_wireless_stats(ai); |
3090 | else if (test_bit(JOB_PROMISC, &ai->flags)) | 3145 | else if (test_bit(JOB_PROMISC, &ai->jobs)) |
3091 | airo_set_promisc(ai); | 3146 | airo_set_promisc(ai); |
3092 | else if (test_bit(JOB_MIC, &ai->flags)) | 3147 | else if (test_bit(JOB_MIC, &ai->jobs)) |
3093 | micinit(ai); | 3148 | micinit(ai); |
3094 | else if (test_bit(JOB_EVENT, &ai->flags)) | 3149 | else if (test_bit(JOB_EVENT, &ai->jobs)) |
3095 | airo_send_event(dev); | 3150 | airo_send_event(dev); |
3096 | else if (test_bit(JOB_AUTOWEP, &ai->flags)) | 3151 | else if (test_bit(JOB_AUTOWEP, &ai->jobs)) |
3097 | timer_func(dev); | 3152 | timer_func(dev); |
3098 | else if (test_bit(JOB_SCAN_RESULTS, &ai->flags)) | 3153 | else if (test_bit(JOB_SCAN_RESULTS, &ai->jobs)) |
3099 | airo_process_scan_results(ai); | 3154 | airo_process_scan_results(ai); |
3100 | else /* Shouldn't get here, but we make sure to unlock */ | 3155 | else /* Shouldn't get here, but we make sure to unlock */ |
3101 | up(&ai->sem); | 3156 | up(&ai->sem); |
@@ -3133,7 +3188,7 @@ static irqreturn_t airo_interrupt ( int irq, void* dev_id, struct pt_regs *regs) | |||
3133 | if ( status & EV_MIC ) { | 3188 | if ( status & EV_MIC ) { |
3134 | OUT4500( apriv, EVACK, EV_MIC ); | 3189 | OUT4500( apriv, EVACK, EV_MIC ); |
3135 | if (test_bit(FLAG_MIC_CAPABLE, &apriv->flags)) { | 3190 | if (test_bit(FLAG_MIC_CAPABLE, &apriv->flags)) { |
3136 | set_bit(JOB_MIC, &apriv->flags); | 3191 | set_bit(JOB_MIC, &apriv->jobs); |
3137 | wake_up_interruptible(&apriv->thr_wait); | 3192 | wake_up_interruptible(&apriv->thr_wait); |
3138 | } | 3193 | } |
3139 | } | 3194 | } |
@@ -3187,7 +3242,7 @@ static irqreturn_t airo_interrupt ( int irq, void* dev_id, struct pt_regs *regs) | |||
3187 | set_bit(FLAG_UPDATE_MULTI, &apriv->flags); | 3242 | set_bit(FLAG_UPDATE_MULTI, &apriv->flags); |
3188 | 3243 | ||
3189 | if (down_trylock(&apriv->sem) != 0) { | 3244 | if (down_trylock(&apriv->sem) != 0) { |
3190 | set_bit(JOB_EVENT, &apriv->flags); | 3245 | set_bit(JOB_EVENT, &apriv->jobs); |
3191 | wake_up_interruptible(&apriv->thr_wait); | 3246 | wake_up_interruptible(&apriv->thr_wait); |
3192 | } else | 3247 | } else |
3193 | airo_send_event(dev); | 3248 | airo_send_event(dev); |
@@ -5485,7 +5540,7 @@ static void timer_func( struct net_device *dev ) { | |||
5485 | up(&apriv->sem); | 5540 | up(&apriv->sem); |
5486 | 5541 | ||
5487 | /* Schedule check to see if the change worked */ | 5542 | /* Schedule check to see if the change worked */ |
5488 | clear_bit(JOB_AUTOWEP, &apriv->flags); | 5543 | clear_bit(JOB_AUTOWEP, &apriv->jobs); |
5489 | apriv->expires = RUN_AT(HZ*3); | 5544 | apriv->expires = RUN_AT(HZ*3); |
5490 | } | 5545 | } |
5491 | 5546 | ||
@@ -6876,7 +6931,7 @@ static int airo_get_range(struct net_device *dev, | |||
6876 | } | 6931 | } |
6877 | range->num_txpower = i; | 6932 | range->num_txpower = i; |
6878 | range->txpower_capa = IW_TXPOW_MWATT; | 6933 | range->txpower_capa = IW_TXPOW_MWATT; |
6879 | range->we_version_source = 12; | 6934 | range->we_version_source = 19; |
6880 | range->we_version_compiled = WIRELESS_EXT; | 6935 | range->we_version_compiled = WIRELESS_EXT; |
6881 | range->retry_capa = IW_RETRY_LIMIT | IW_RETRY_LIFETIME; | 6936 | range->retry_capa = IW_RETRY_LIMIT | IW_RETRY_LIFETIME; |
6882 | range->retry_flags = IW_RETRY_LIMIT; | 6937 | range->retry_flags = IW_RETRY_LIMIT; |
@@ -7152,6 +7207,7 @@ static inline char *airo_translate_scan(struct net_device *dev, | |||
7152 | u16 capabilities; | 7207 | u16 capabilities; |
7153 | char * current_val; /* For rates */ | 7208 | char * current_val; /* For rates */ |
7154 | int i; | 7209 | int i; |
7210 | char * buf; | ||
7155 | 7211 | ||
7156 | /* First entry *MUST* be the AP MAC address */ | 7212 | /* First entry *MUST* be the AP MAC address */ |
7157 | iwe.cmd = SIOCGIWAP; | 7213 | iwe.cmd = SIOCGIWAP; |
@@ -7238,8 +7294,69 @@ static inline char *airo_translate_scan(struct net_device *dev, | |||
7238 | if((current_val - current_ev) > IW_EV_LCP_LEN) | 7294 | if((current_val - current_ev) > IW_EV_LCP_LEN) |
7239 | current_ev = current_val; | 7295 | current_ev = current_val; |
7240 | 7296 | ||
7241 | /* The other data in the scan result are not really | 7297 | /* Beacon interval */ |
7242 | * interesting, so for now drop it - Jean II */ | 7298 | buf = kmalloc(30, GFP_KERNEL); |
7299 | if (buf) { | ||
7300 | iwe.cmd = IWEVCUSTOM; | ||
7301 | sprintf(buf, "bcn_int=%d", bss->beaconInterval); | ||
7302 | iwe.u.data.length = strlen(buf); | ||
7303 | current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf); | ||
7304 | kfree(buf); | ||
7305 | } | ||
7306 | |||
7307 | /* Put WPA/RSN Information Elements into the event stream */ | ||
7308 | if (test_bit(FLAG_WPA_CAPABLE, &ai->flags)) { | ||
7309 | unsigned int num_null_ies = 0; | ||
7310 | u16 length = sizeof (bss->extra.iep); | ||
7311 | struct ieee80211_info_element *info_element = | ||
7312 | (struct ieee80211_info_element *) &bss->extra.iep; | ||
7313 | |||
7314 | while ((length >= sizeof(*info_element)) && (num_null_ies < 2)) { | ||
7315 | if (sizeof(*info_element) + info_element->len > length) { | ||
7316 | /* Invalid element, don't continue parsing IE */ | ||
7317 | break; | ||
7318 | } | ||
7319 | |||
7320 | switch (info_element->id) { | ||
7321 | case MFIE_TYPE_SSID: | ||
7322 | /* Two zero-length SSID elements | ||
7323 | * mean we're done parsing elements */ | ||
7324 | if (!info_element->len) | ||
7325 | num_null_ies++; | ||
7326 | break; | ||
7327 | |||
7328 | case MFIE_TYPE_GENERIC: | ||
7329 | if (info_element->len >= 4 && | ||
7330 | info_element->data[0] == 0x00 && | ||
7331 | info_element->data[1] == 0x50 && | ||
7332 | info_element->data[2] == 0xf2 && | ||
7333 | info_element->data[3] == 0x01) { | ||
7334 | iwe.cmd = IWEVGENIE; | ||
7335 | iwe.u.data.length = min(info_element->len + 2, | ||
7336 | MAX_WPA_IE_LEN); | ||
7337 | current_ev = iwe_stream_add_point(current_ev, end_buf, | ||
7338 | &iwe, (char *) info_element); | ||
7339 | } | ||
7340 | break; | ||
7341 | |||
7342 | case MFIE_TYPE_RSN: | ||
7343 | iwe.cmd = IWEVGENIE; | ||
7344 | iwe.u.data.length = min(info_element->len + 2, | ||
7345 | MAX_WPA_IE_LEN); | ||
7346 | current_ev = iwe_stream_add_point(current_ev, end_buf, | ||
7347 | &iwe, (char *) info_element); | ||
7348 | break; | ||
7349 | |||
7350 | default: | ||
7351 | break; | ||
7352 | } | ||
7353 | |||
7354 | length -= sizeof(*info_element) + info_element->len; | ||
7355 | info_element = | ||
7356 | (struct ieee80211_info_element *)&info_element-> | ||
7357 | data[info_element->len]; | ||
7358 | } | ||
7359 | } | ||
7243 | return current_ev; | 7360 | return current_ev; |
7244 | } | 7361 | } |
7245 | 7362 | ||
@@ -7521,7 +7638,7 @@ static void airo_read_wireless_stats(struct airo_info *local) | |||
7521 | u32 *vals = stats_rid.vals; | 7638 | u32 *vals = stats_rid.vals; |
7522 | 7639 | ||
7523 | /* Get stats out of the card */ | 7640 | /* Get stats out of the card */ |
7524 | clear_bit(JOB_WSTATS, &local->flags); | 7641 | clear_bit(JOB_WSTATS, &local->jobs); |
7525 | if (local->power.event) { | 7642 | if (local->power.event) { |
7526 | up(&local->sem); | 7643 | up(&local->sem); |
7527 | return; | 7644 | return; |
@@ -7565,10 +7682,10 @@ static struct iw_statistics *airo_get_wireless_stats(struct net_device *dev) | |||
7565 | { | 7682 | { |
7566 | struct airo_info *local = dev->priv; | 7683 | struct airo_info *local = dev->priv; |
7567 | 7684 | ||
7568 | if (!test_bit(JOB_WSTATS, &local->flags)) { | 7685 | if (!test_bit(JOB_WSTATS, &local->jobs)) { |
7569 | /* Get stats out of the card if available */ | 7686 | /* Get stats out of the card if available */ |
7570 | if (down_trylock(&local->sem) != 0) { | 7687 | if (down_trylock(&local->sem) != 0) { |
7571 | set_bit(JOB_WSTATS, &local->flags); | 7688 | set_bit(JOB_WSTATS, &local->jobs); |
7572 | wake_up_interruptible(&local->thr_wait); | 7689 | wake_up_interruptible(&local->thr_wait); |
7573 | } else | 7690 | } else |
7574 | airo_read_wireless_stats(local); | 7691 | airo_read_wireless_stats(local); |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx.h b/drivers/net/wireless/bcm43xx/bcm43xx.h index 2e83083935e1..e66fdb1f3cfd 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx.h +++ b/drivers/net/wireless/bcm43xx/bcm43xx.h | |||
@@ -645,7 +645,6 @@ struct bcm43xx_private { | |||
645 | unsigned int irq; | 645 | unsigned int irq; |
646 | 646 | ||
647 | void __iomem *mmio_addr; | 647 | void __iomem *mmio_addr; |
648 | unsigned int mmio_len; | ||
649 | 648 | ||
650 | /* Do not use the lock directly. Use the bcm43xx_lock* helper | 649 | /* Do not use the lock directly. Use the bcm43xx_lock* helper |
651 | * functions, to be MMIO-safe. */ | 650 | * functions, to be MMIO-safe. */ |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c b/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c index 35a4fcb6d923..7497fb16076e 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c | |||
@@ -92,7 +92,7 @@ static ssize_t devinfo_read_file(struct file *file, char __user *userbuf, | |||
92 | fappend("subsystem_vendor: 0x%04x subsystem_device: 0x%04x\n", | 92 | fappend("subsystem_vendor: 0x%04x subsystem_device: 0x%04x\n", |
93 | pci_dev->subsystem_vendor, pci_dev->subsystem_device); | 93 | pci_dev->subsystem_vendor, pci_dev->subsystem_device); |
94 | fappend("IRQ: %d\n", bcm->irq); | 94 | fappend("IRQ: %d\n", bcm->irq); |
95 | fappend("mmio_addr: 0x%p mmio_len: %u\n", bcm->mmio_addr, bcm->mmio_len); | 95 | fappend("mmio_addr: 0x%p\n", bcm->mmio_addr); |
96 | fappend("chip_id: 0x%04x chip_rev: 0x%02x\n", bcm->chip_id, bcm->chip_rev); | 96 | fappend("chip_id: 0x%04x chip_rev: 0x%02x\n", bcm->chip_id, bcm->chip_rev); |
97 | if ((bcm->core_80211[0].rev >= 3) && (bcm43xx_read32(bcm, 0x0158) & (1 << 16))) | 97 | if ((bcm->core_80211[0].rev >= 3) && (bcm43xx_read32(bcm, 0x0158) & (1 << 16))) |
98 | fappend("Radio disabled by hardware!\n"); | 98 | fappend("Radio disabled by hardware!\n"); |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_main.c b/drivers/net/wireless/bcm43xx/bcm43xx_main.c index 7ed18cad29f7..736dde96c4a3 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_main.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_main.c | |||
@@ -128,13 +128,15 @@ MODULE_PARM_DESC(fwpostfix, "Postfix for .fw files. Useful for debugging."); | |||
128 | static struct pci_device_id bcm43xx_pci_tbl[] = { | 128 | static struct pci_device_id bcm43xx_pci_tbl[] = { |
129 | /* Broadcom 4303 802.11b */ | 129 | /* Broadcom 4303 802.11b */ |
130 | { PCI_VENDOR_ID_BROADCOM, 0x4301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | 130 | { PCI_VENDOR_ID_BROADCOM, 0x4301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
131 | /* Broadcom 4307 802.11b */ | 131 | /* Broadcom 4307 802.11b */ |
132 | { PCI_VENDOR_ID_BROADCOM, 0x4307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | 132 | { PCI_VENDOR_ID_BROADCOM, 0x4307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
133 | /* Broadcom 4318 802.11b/g */ | 133 | /* Broadcom 4318 802.11b/g */ |
134 | { PCI_VENDOR_ID_BROADCOM, 0x4318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | 134 | { PCI_VENDOR_ID_BROADCOM, 0x4318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
135 | /* Broadcom 4319 802.11a/b/g */ | ||
136 | { PCI_VENDOR_ID_BROADCOM, 0x4319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | ||
135 | /* Broadcom 4306 802.11b/g */ | 137 | /* Broadcom 4306 802.11b/g */ |
136 | { PCI_VENDOR_ID_BROADCOM, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | 138 | { PCI_VENDOR_ID_BROADCOM, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
137 | /* Broadcom 4306 802.11a */ | 139 | /* Broadcom 4306 802.11a */ |
138 | // { PCI_VENDOR_ID_BROADCOM, 0x4321, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | 140 | // { PCI_VENDOR_ID_BROADCOM, 0x4321, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
139 | /* Broadcom 4309 802.11a/b/g */ | 141 | /* Broadcom 4309 802.11a/b/g */ |
140 | { PCI_VENDOR_ID_BROADCOM, 0x4324, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | 142 | { PCI_VENDOR_ID_BROADCOM, 0x4324, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
@@ -3299,8 +3301,7 @@ static void bcm43xx_detach_board(struct bcm43xx_private *bcm) | |||
3299 | 3301 | ||
3300 | bcm43xx_chipset_detach(bcm); | 3302 | bcm43xx_chipset_detach(bcm); |
3301 | /* Do _not_ access the chip, after it is detached. */ | 3303 | /* Do _not_ access the chip, after it is detached. */ |
3302 | iounmap(bcm->mmio_addr); | 3304 | pci_iounmap(pci_dev, bcm->mmio_addr); |
3303 | |||
3304 | pci_release_regions(pci_dev); | 3305 | pci_release_regions(pci_dev); |
3305 | pci_disable_device(pci_dev); | 3306 | pci_disable_device(pci_dev); |
3306 | 3307 | ||
@@ -3390,40 +3391,26 @@ static int bcm43xx_attach_board(struct bcm43xx_private *bcm) | |||
3390 | struct net_device *net_dev = bcm->net_dev; | 3391 | struct net_device *net_dev = bcm->net_dev; |
3391 | int err; | 3392 | int err; |
3392 | int i; | 3393 | int i; |
3393 | unsigned long mmio_start, mmio_flags, mmio_len; | ||
3394 | u32 coremask; | 3394 | u32 coremask; |
3395 | 3395 | ||
3396 | err = pci_enable_device(pci_dev); | 3396 | err = pci_enable_device(pci_dev); |
3397 | if (err) { | 3397 | if (err) { |
3398 | printk(KERN_ERR PFX "unable to wake up pci device (%i)\n", err); | 3398 | printk(KERN_ERR PFX "pci_enable_device() failed\n"); |
3399 | goto out; | 3399 | goto out; |
3400 | } | 3400 | } |
3401 | mmio_start = pci_resource_start(pci_dev, 0); | ||
3402 | mmio_flags = pci_resource_flags(pci_dev, 0); | ||
3403 | mmio_len = pci_resource_len(pci_dev, 0); | ||
3404 | if (!(mmio_flags & IORESOURCE_MEM)) { | ||
3405 | printk(KERN_ERR PFX | ||
3406 | "%s, region #0 not an MMIO resource, aborting\n", | ||
3407 | pci_name(pci_dev)); | ||
3408 | err = -ENODEV; | ||
3409 | goto err_pci_disable; | ||
3410 | } | ||
3411 | err = pci_request_regions(pci_dev, KBUILD_MODNAME); | 3401 | err = pci_request_regions(pci_dev, KBUILD_MODNAME); |
3412 | if (err) { | 3402 | if (err) { |
3413 | printk(KERN_ERR PFX | 3403 | printk(KERN_ERR PFX "pci_request_regions() failed\n"); |
3414 | "could not access PCI resources (%i)\n", err); | ||
3415 | goto err_pci_disable; | 3404 | goto err_pci_disable; |
3416 | } | 3405 | } |
3417 | /* enable PCI bus-mastering */ | 3406 | /* enable PCI bus-mastering */ |
3418 | pci_set_master(pci_dev); | 3407 | pci_set_master(pci_dev); |
3419 | bcm->mmio_addr = ioremap(mmio_start, mmio_len); | 3408 | bcm->mmio_addr = pci_iomap(pci_dev, 0, ~0UL); |
3420 | if (!bcm->mmio_addr) { | 3409 | if (!bcm->mmio_addr) { |
3421 | printk(KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", | 3410 | printk(KERN_ERR PFX "pci_iomap() failed\n"); |
3422 | pci_name(pci_dev)); | ||
3423 | err = -EIO; | 3411 | err = -EIO; |
3424 | goto err_pci_release; | 3412 | goto err_pci_release; |
3425 | } | 3413 | } |
3426 | bcm->mmio_len = mmio_len; | ||
3427 | net_dev->base_addr = (unsigned long)bcm->mmio_addr; | 3414 | net_dev->base_addr = (unsigned long)bcm->mmio_addr; |
3428 | 3415 | ||
3429 | bcm43xx_pci_read_config16(bcm, PCI_SUBSYSTEM_VENDOR_ID, | 3416 | bcm43xx_pci_read_config16(bcm, PCI_SUBSYSTEM_VENDOR_ID, |
@@ -3517,7 +3504,7 @@ err_80211_unwind: | |||
3517 | err_chipset_detach: | 3504 | err_chipset_detach: |
3518 | bcm43xx_chipset_detach(bcm); | 3505 | bcm43xx_chipset_detach(bcm); |
3519 | err_iounmap: | 3506 | err_iounmap: |
3520 | iounmap(bcm->mmio_addr); | 3507 | pci_iounmap(pci_dev, bcm->mmio_addr); |
3521 | err_pci_release: | 3508 | err_pci_release: |
3522 | pci_release_regions(pci_dev); | 3509 | pci_release_regions(pci_dev); |
3523 | err_pci_disable: | 3510 | err_pci_disable: |
@@ -3568,7 +3555,7 @@ static void bcm43xx_ieee80211_set_security(struct net_device *net_dev, | |||
3568 | unsigned long flags; | 3555 | unsigned long flags; |
3569 | int keyidx; | 3556 | int keyidx; |
3570 | 3557 | ||
3571 | dprintk(KERN_INFO PFX "set security called\n"); | 3558 | dprintk(KERN_INFO PFX "set security called"); |
3572 | 3559 | ||
3573 | bcm43xx_lock_mmio(bcm, flags); | 3560 | bcm43xx_lock_mmio(bcm, flags); |
3574 | 3561 | ||
@@ -3581,24 +3568,25 @@ static void bcm43xx_ieee80211_set_security(struct net_device *net_dev, | |||
3581 | 3568 | ||
3582 | if (sec->flags & SEC_ACTIVE_KEY) { | 3569 | if (sec->flags & SEC_ACTIVE_KEY) { |
3583 | secinfo->active_key = sec->active_key; | 3570 | secinfo->active_key = sec->active_key; |
3584 | dprintk(KERN_INFO PFX " .active_key = %d\n", sec->active_key); | 3571 | dprintk(", .active_key = %d", sec->active_key); |
3585 | } | 3572 | } |
3586 | if (sec->flags & SEC_UNICAST_GROUP) { | 3573 | if (sec->flags & SEC_UNICAST_GROUP) { |
3587 | secinfo->unicast_uses_group = sec->unicast_uses_group; | 3574 | secinfo->unicast_uses_group = sec->unicast_uses_group; |
3588 | dprintk(KERN_INFO PFX " .unicast_uses_group = %d\n", sec->unicast_uses_group); | 3575 | dprintk(", .unicast_uses_group = %d", sec->unicast_uses_group); |
3589 | } | 3576 | } |
3590 | if (sec->flags & SEC_LEVEL) { | 3577 | if (sec->flags & SEC_LEVEL) { |
3591 | secinfo->level = sec->level; | 3578 | secinfo->level = sec->level; |
3592 | dprintk(KERN_INFO PFX " .level = %d\n", sec->level); | 3579 | dprintk(", .level = %d", sec->level); |
3593 | } | 3580 | } |
3594 | if (sec->flags & SEC_ENABLED) { | 3581 | if (sec->flags & SEC_ENABLED) { |
3595 | secinfo->enabled = sec->enabled; | 3582 | secinfo->enabled = sec->enabled; |
3596 | dprintk(KERN_INFO PFX " .enabled = %d\n", sec->enabled); | 3583 | dprintk(", .enabled = %d", sec->enabled); |
3597 | } | 3584 | } |
3598 | if (sec->flags & SEC_ENCRYPT) { | 3585 | if (sec->flags & SEC_ENCRYPT) { |
3599 | secinfo->encrypt = sec->encrypt; | 3586 | secinfo->encrypt = sec->encrypt; |
3600 | dprintk(KERN_INFO PFX " .encrypt = %d\n", sec->encrypt); | 3587 | dprintk(", .encrypt = %d", sec->encrypt); |
3601 | } | 3588 | } |
3589 | dprintk("\n"); | ||
3602 | if (bcm->initialized && !bcm->ieee->host_encrypt) { | 3590 | if (bcm->initialized && !bcm->ieee->host_encrypt) { |
3603 | if (secinfo->enabled) { | 3591 | if (secinfo->enabled) { |
3604 | /* upload WEP keys to hardware */ | 3592 | /* upload WEP keys to hardware */ |
diff --git a/drivers/net/wireless/hermes.c b/drivers/net/wireless/hermes.c index 346c6febb033..2aa2f389c0d5 100644 --- a/drivers/net/wireless/hermes.c +++ b/drivers/net/wireless/hermes.c | |||
@@ -121,12 +121,6 @@ void hermes_struct_init(hermes_t *hw, void __iomem *address, int reg_spacing) | |||
121 | hw->iobase = address; | 121 | hw->iobase = address; |
122 | hw->reg_spacing = reg_spacing; | 122 | hw->reg_spacing = reg_spacing; |
123 | hw->inten = 0x0; | 123 | hw->inten = 0x0; |
124 | |||
125 | #ifdef HERMES_DEBUG_BUFFER | ||
126 | hw->dbufp = 0; | ||
127 | memset(&hw->dbuf, 0xff, sizeof(hw->dbuf)); | ||
128 | memset(&hw->profile, 0, sizeof(hw->profile)); | ||
129 | #endif | ||
130 | } | 124 | } |
131 | 125 | ||
132 | int hermes_init(hermes_t *hw) | 126 | int hermes_init(hermes_t *hw) |
@@ -347,19 +341,6 @@ static int hermes_bap_seek(hermes_t *hw, int bap, u16 id, u16 offset) | |||
347 | reg = hermes_read_reg(hw, oreg); | 341 | reg = hermes_read_reg(hw, oreg); |
348 | } | 342 | } |
349 | 343 | ||
350 | #ifdef HERMES_DEBUG_BUFFER | ||
351 | hw->profile[HERMES_BAP_BUSY_TIMEOUT - k]++; | ||
352 | |||
353 | if (k < HERMES_BAP_BUSY_TIMEOUT) { | ||
354 | struct hermes_debug_entry *e = | ||
355 | &hw->dbuf[(hw->dbufp++) % HERMES_DEBUG_BUFSIZE]; | ||
356 | e->bap = bap; | ||
357 | e->id = id; | ||
358 | e->offset = offset; | ||
359 | e->cycles = HERMES_BAP_BUSY_TIMEOUT - k; | ||
360 | } | ||
361 | #endif | ||
362 | |||
363 | if (reg & HERMES_OFFSET_BUSY) | 344 | if (reg & HERMES_OFFSET_BUSY) |
364 | return -ETIMEDOUT; | 345 | return -ETIMEDOUT; |
365 | 346 | ||
@@ -419,8 +400,7 @@ int hermes_bap_pread(hermes_t *hw, int bap, void *buf, int len, | |||
419 | } | 400 | } |
420 | 401 | ||
421 | /* Write a block of data to the chip's buffer, via the | 402 | /* Write a block of data to the chip's buffer, via the |
422 | * BAP. Synchronization/serialization is the caller's problem. len | 403 | * BAP. Synchronization/serialization is the caller's problem. |
423 | * must be even. | ||
424 | * | 404 | * |
425 | * Returns: < 0 on internal failure (errno), 0 on success, > 0 on error from firmware | 405 | * Returns: < 0 on internal failure (errno), 0 on success, > 0 on error from firmware |
426 | */ | 406 | */ |
@@ -430,7 +410,7 @@ int hermes_bap_pwrite(hermes_t *hw, int bap, const void *buf, int len, | |||
430 | int dreg = bap ? HERMES_DATA1 : HERMES_DATA0; | 410 | int dreg = bap ? HERMES_DATA1 : HERMES_DATA0; |
431 | int err = 0; | 411 | int err = 0; |
432 | 412 | ||
433 | if ( (len < 0) || (len % 2) ) | 413 | if (len < 0) |
434 | return -EINVAL; | 414 | return -EINVAL; |
435 | 415 | ||
436 | err = hermes_bap_seek(hw, bap, id, offset); | 416 | err = hermes_bap_seek(hw, bap, id, offset); |
@@ -438,49 +418,12 @@ int hermes_bap_pwrite(hermes_t *hw, int bap, const void *buf, int len, | |||
438 | goto out; | 418 | goto out; |
439 | 419 | ||
440 | /* Actually do the transfer */ | 420 | /* Actually do the transfer */ |
441 | hermes_write_words(hw, dreg, buf, len/2); | 421 | hermes_write_bytes(hw, dreg, buf, len); |
442 | 422 | ||
443 | out: | 423 | out: |
444 | return err; | 424 | return err; |
445 | } | 425 | } |
446 | 426 | ||
447 | /* Write a block of data to the chip's buffer with padding if | ||
448 | * neccessary, via the BAP. Synchronization/serialization is the | ||
449 | * caller's problem. len must be even. | ||
450 | * | ||
451 | * Returns: < 0 on internal failure (errno), 0 on success, > 0 on error from firmware | ||
452 | */ | ||
453 | int hermes_bap_pwrite_pad(hermes_t *hw, int bap, const void *buf, unsigned data_len, int len, | ||
454 | u16 id, u16 offset) | ||
455 | { | ||
456 | int dreg = bap ? HERMES_DATA1 : HERMES_DATA0; | ||
457 | int err = 0; | ||
458 | |||
459 | if (len < 0 || len % 2 || data_len > len) | ||
460 | return -EINVAL; | ||
461 | |||
462 | err = hermes_bap_seek(hw, bap, id, offset); | ||
463 | if (err) | ||
464 | goto out; | ||
465 | |||
466 | /* Transfer all the complete words of data */ | ||
467 | hermes_write_words(hw, dreg, buf, data_len/2); | ||
468 | /* If there is an odd byte left over pad and transfer it */ | ||
469 | if (data_len & 1) { | ||
470 | u8 end[2]; | ||
471 | end[1] = 0; | ||
472 | end[0] = ((unsigned char *)buf)[data_len - 1]; | ||
473 | hermes_write_words(hw, dreg, end, 1); | ||
474 | data_len ++; | ||
475 | } | ||
476 | /* Now send zeros for the padding */ | ||
477 | if (data_len < len) | ||
478 | hermes_clear_words(hw, dreg, (len - data_len) / 2); | ||
479 | /* Complete */ | ||
480 | out: | ||
481 | return err; | ||
482 | } | ||
483 | |||
484 | /* Read a Length-Type-Value record from the card. | 427 | /* Read a Length-Type-Value record from the card. |
485 | * | 428 | * |
486 | * If length is NULL, we ignore the length read from the card, and | 429 | * If length is NULL, we ignore the length read from the card, and |
@@ -553,7 +496,7 @@ int hermes_write_ltv(hermes_t *hw, int bap, u16 rid, | |||
553 | 496 | ||
554 | count = length - 1; | 497 | count = length - 1; |
555 | 498 | ||
556 | hermes_write_words(hw, dreg, value, count); | 499 | hermes_write_bytes(hw, dreg, value, count << 1); |
557 | 500 | ||
558 | err = hermes_docmd_wait(hw, HERMES_CMD_ACCESS | HERMES_CMD_WRITE, | 501 | err = hermes_docmd_wait(hw, HERMES_CMD_ACCESS | HERMES_CMD_WRITE, |
559 | rid, NULL); | 502 | rid, NULL); |
@@ -568,7 +511,6 @@ EXPORT_SYMBOL(hermes_allocate); | |||
568 | 511 | ||
569 | EXPORT_SYMBOL(hermes_bap_pread); | 512 | EXPORT_SYMBOL(hermes_bap_pread); |
570 | EXPORT_SYMBOL(hermes_bap_pwrite); | 513 | EXPORT_SYMBOL(hermes_bap_pwrite); |
571 | EXPORT_SYMBOL(hermes_bap_pwrite_pad); | ||
572 | EXPORT_SYMBOL(hermes_read_ltv); | 514 | EXPORT_SYMBOL(hermes_read_ltv); |
573 | EXPORT_SYMBOL(hermes_write_ltv); | 515 | EXPORT_SYMBOL(hermes_write_ltv); |
574 | 516 | ||
diff --git a/drivers/net/wireless/hermes.h b/drivers/net/wireless/hermes.h index 7644f72a9f4e..8e3f0e3edb58 100644 --- a/drivers/net/wireless/hermes.h +++ b/drivers/net/wireless/hermes.h | |||
@@ -328,16 +328,6 @@ struct hermes_multicast { | |||
328 | u8 addr[HERMES_MAX_MULTICAST][ETH_ALEN]; | 328 | u8 addr[HERMES_MAX_MULTICAST][ETH_ALEN]; |
329 | } __attribute__ ((packed)); | 329 | } __attribute__ ((packed)); |
330 | 330 | ||
331 | // #define HERMES_DEBUG_BUFFER 1 | ||
332 | #define HERMES_DEBUG_BUFSIZE 4096 | ||
333 | struct hermes_debug_entry { | ||
334 | int bap; | ||
335 | u16 id, offset; | ||
336 | int cycles; | ||
337 | }; | ||
338 | |||
339 | #ifdef __KERNEL__ | ||
340 | |||
341 | /* Timeouts */ | 331 | /* Timeouts */ |
342 | #define HERMES_BAP_BUSY_TIMEOUT (10000) /* In iterations of ~1us */ | 332 | #define HERMES_BAP_BUSY_TIMEOUT (10000) /* In iterations of ~1us */ |
343 | 333 | ||
@@ -347,14 +337,7 @@ typedef struct hermes { | |||
347 | int reg_spacing; | 337 | int reg_spacing; |
348 | #define HERMES_16BIT_REGSPACING 0 | 338 | #define HERMES_16BIT_REGSPACING 0 |
349 | #define HERMES_32BIT_REGSPACING 1 | 339 | #define HERMES_32BIT_REGSPACING 1 |
350 | |||
351 | u16 inten; /* Which interrupts should be enabled? */ | 340 | u16 inten; /* Which interrupts should be enabled? */ |
352 | |||
353 | #ifdef HERMES_DEBUG_BUFFER | ||
354 | struct hermes_debug_entry dbuf[HERMES_DEBUG_BUFSIZE]; | ||
355 | unsigned long dbufp; | ||
356 | unsigned long profile[HERMES_BAP_BUSY_TIMEOUT+1]; | ||
357 | #endif | ||
358 | } hermes_t; | 341 | } hermes_t; |
359 | 342 | ||
360 | /* Register access convenience macros */ | 343 | /* Register access convenience macros */ |
@@ -376,8 +359,6 @@ int hermes_bap_pread(hermes_t *hw, int bap, void *buf, int len, | |||
376 | u16 id, u16 offset); | 359 | u16 id, u16 offset); |
377 | int hermes_bap_pwrite(hermes_t *hw, int bap, const void *buf, int len, | 360 | int hermes_bap_pwrite(hermes_t *hw, int bap, const void *buf, int len, |
378 | u16 id, u16 offset); | 361 | u16 id, u16 offset); |
379 | int hermes_bap_pwrite_pad(hermes_t *hw, int bap, const void *buf, | ||
380 | unsigned data_len, int len, u16 id, u16 offset); | ||
381 | int hermes_read_ltv(hermes_t *hw, int bap, u16 rid, unsigned buflen, | 362 | int hermes_read_ltv(hermes_t *hw, int bap, u16 rid, unsigned buflen, |
382 | u16 *length, void *buf); | 363 | u16 *length, void *buf); |
383 | int hermes_write_ltv(hermes_t *hw, int bap, u16 rid, | 364 | int hermes_write_ltv(hermes_t *hw, int bap, u16 rid, |
@@ -425,10 +406,13 @@ static inline void hermes_read_words(struct hermes *hw, int off, void *buf, unsi | |||
425 | ioread16_rep(hw->iobase + off, buf, count); | 406 | ioread16_rep(hw->iobase + off, buf, count); |
426 | } | 407 | } |
427 | 408 | ||
428 | static inline void hermes_write_words(struct hermes *hw, int off, const void *buf, unsigned count) | 409 | static inline void hermes_write_bytes(struct hermes *hw, int off, |
410 | const char *buf, unsigned count) | ||
429 | { | 411 | { |
430 | off = off << hw->reg_spacing; | 412 | off = off << hw->reg_spacing; |
431 | iowrite16_rep(hw->iobase + off, buf, count); | 413 | iowrite16_rep(hw->iobase + off, buf, count >> 1); |
414 | if (unlikely(count & 1)) | ||
415 | iowrite8(buf[count - 1], hw->iobase + off); | ||
432 | } | 416 | } |
433 | 417 | ||
434 | static inline void hermes_clear_words(struct hermes *hw, int off, unsigned count) | 418 | static inline void hermes_clear_words(struct hermes *hw, int off, unsigned count) |
@@ -462,21 +446,4 @@ static inline int hermes_write_wordrec(hermes_t *hw, int bap, u16 rid, u16 word) | |||
462 | return HERMES_WRITE_RECORD(hw, bap, rid, &rec); | 446 | return HERMES_WRITE_RECORD(hw, bap, rid, &rec); |
463 | } | 447 | } |
464 | 448 | ||
465 | #else /* ! __KERNEL__ */ | ||
466 | |||
467 | /* These are provided for the benefit of userspace drivers and testing programs | ||
468 | which use ioperm() or iopl() */ | ||
469 | |||
470 | #define hermes_read_reg(base, off) (inw((base) + (off))) | ||
471 | #define hermes_write_reg(base, off, val) (outw((val), (base) + (off))) | ||
472 | |||
473 | #define hermes_read_regn(base, name) (hermes_read_reg((base), HERMES_##name)) | ||
474 | #define hermes_write_regn(base, name, val) (hermes_write_reg((base), HERMES_##name, (val))) | ||
475 | |||
476 | /* Note that for the next two, the count is in 16-bit words, not bytes */ | ||
477 | #define hermes_read_data(base, off, buf, count) (insw((base) + (off), (buf), (count))) | ||
478 | #define hermes_write_data(base, off, buf, count) (outsw((base) + (off), (buf), (count))) | ||
479 | |||
480 | #endif /* ! __KERNEL__ */ | ||
481 | |||
482 | #endif /* _HERMES_H */ | 449 | #endif /* _HERMES_H */ |
diff --git a/drivers/net/wireless/hostap/hostap_80211_tx.c b/drivers/net/wireless/hostap/hostap_80211_tx.c index 06a5214145e3..4a5be70c0419 100644 --- a/drivers/net/wireless/hostap/hostap_80211_tx.c +++ b/drivers/net/wireless/hostap/hostap_80211_tx.c | |||
@@ -534,5 +534,4 @@ int hostap_master_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
534 | } | 534 | } |
535 | 535 | ||
536 | 536 | ||
537 | EXPORT_SYMBOL(hostap_dump_tx_80211); | ||
538 | EXPORT_SYMBOL(hostap_master_start_xmit); | 537 | EXPORT_SYMBOL(hostap_master_start_xmit); |
diff --git a/drivers/net/wireless/hostap/hostap_ap.c b/drivers/net/wireless/hostap/hostap_ap.c index 06c3fa32b310..ba13125024cb 100644 --- a/drivers/net/wireless/hostap/hostap_ap.c +++ b/drivers/net/wireless/hostap/hostap_ap.c | |||
@@ -3276,17 +3276,6 @@ EXPORT_SYMBOL(hostap_init_data); | |||
3276 | EXPORT_SYMBOL(hostap_init_ap_proc); | 3276 | EXPORT_SYMBOL(hostap_init_ap_proc); |
3277 | EXPORT_SYMBOL(hostap_free_data); | 3277 | EXPORT_SYMBOL(hostap_free_data); |
3278 | EXPORT_SYMBOL(hostap_check_sta_fw_version); | 3278 | EXPORT_SYMBOL(hostap_check_sta_fw_version); |
3279 | EXPORT_SYMBOL(hostap_handle_sta_tx); | ||
3280 | EXPORT_SYMBOL(hostap_handle_sta_release); | ||
3281 | EXPORT_SYMBOL(hostap_handle_sta_tx_exc); | 3279 | EXPORT_SYMBOL(hostap_handle_sta_tx_exc); |
3282 | EXPORT_SYMBOL(hostap_update_sta_ps); | ||
3283 | EXPORT_SYMBOL(hostap_handle_sta_rx); | ||
3284 | EXPORT_SYMBOL(hostap_is_sta_assoc); | ||
3285 | EXPORT_SYMBOL(hostap_is_sta_authorized); | ||
3286 | EXPORT_SYMBOL(hostap_add_sta); | ||
3287 | EXPORT_SYMBOL(hostap_update_rates); | ||
3288 | EXPORT_SYMBOL(hostap_add_wds_links); | ||
3289 | EXPORT_SYMBOL(hostap_wds_link_oper); | ||
3290 | #ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT | 3280 | #ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT |
3291 | EXPORT_SYMBOL(hostap_deauth_all_stas); | ||
3292 | #endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */ | 3281 | #endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */ |
diff --git a/drivers/net/wireless/hostap/hostap_cs.c b/drivers/net/wireless/hostap/hostap_cs.c index 55bed923fbe9..db03dc2646df 100644 --- a/drivers/net/wireless/hostap/hostap_cs.c +++ b/drivers/net/wireless/hostap/hostap_cs.c | |||
@@ -881,6 +881,12 @@ static struct pcmcia_device_id hostap_cs_ids[] = { | |||
881 | PCMCIA_DEVICE_PROD_ID12( | 881 | PCMCIA_DEVICE_PROD_ID12( |
882 | "ZoomAir 11Mbps High", "Rate wireless Networking", | 882 | "ZoomAir 11Mbps High", "Rate wireless Networking", |
883 | 0x273fe3db, 0x32a1eaee), | 883 | 0x273fe3db, 0x32a1eaee), |
884 | PCMCIA_DEVICE_PROD_ID123( | ||
885 | "Pretec", "CompactWLAN Card 802.11b", "2.5", | ||
886 | 0x1cadd3e5, 0xe697636c, 0x7a5bfcf1), | ||
887 | PCMCIA_DEVICE_PROD_ID123( | ||
888 | "U.S. Robotics", "IEEE 802.11b PC-CARD", "Version 01.02", | ||
889 | 0xc7b8df9d, 0x1700d087, 0x4b74baa0), | ||
884 | PCMCIA_DEVICE_NULL | 890 | PCMCIA_DEVICE_NULL |
885 | }; | 891 | }; |
886 | MODULE_DEVICE_TABLE(pcmcia, hostap_cs_ids); | 892 | MODULE_DEVICE_TABLE(pcmcia, hostap_cs_ids); |
diff --git a/drivers/net/wireless/hostap/hostap_main.c b/drivers/net/wireless/hostap/hostap_main.c index 8dd4c4446a64..93786f4218f0 100644 --- a/drivers/net/wireless/hostap/hostap_main.c +++ b/drivers/net/wireless/hostap/hostap_main.c | |||
@@ -1125,11 +1125,9 @@ EXPORT_SYMBOL(hostap_set_auth_algs); | |||
1125 | EXPORT_SYMBOL(hostap_dump_rx_header); | 1125 | EXPORT_SYMBOL(hostap_dump_rx_header); |
1126 | EXPORT_SYMBOL(hostap_dump_tx_header); | 1126 | EXPORT_SYMBOL(hostap_dump_tx_header); |
1127 | EXPORT_SYMBOL(hostap_80211_header_parse); | 1127 | EXPORT_SYMBOL(hostap_80211_header_parse); |
1128 | EXPORT_SYMBOL(hostap_80211_prism_header_parse); | ||
1129 | EXPORT_SYMBOL(hostap_80211_get_hdrlen); | 1128 | EXPORT_SYMBOL(hostap_80211_get_hdrlen); |
1130 | EXPORT_SYMBOL(hostap_get_stats); | 1129 | EXPORT_SYMBOL(hostap_get_stats); |
1131 | EXPORT_SYMBOL(hostap_setup_dev); | 1130 | EXPORT_SYMBOL(hostap_setup_dev); |
1132 | EXPORT_SYMBOL(hostap_proc); | ||
1133 | EXPORT_SYMBOL(hostap_set_multicast_list_queue); | 1131 | EXPORT_SYMBOL(hostap_set_multicast_list_queue); |
1134 | EXPORT_SYMBOL(hostap_set_hostapd); | 1132 | EXPORT_SYMBOL(hostap_set_hostapd); |
1135 | EXPORT_SYMBOL(hostap_set_hostapd_sta); | 1133 | EXPORT_SYMBOL(hostap_set_hostapd_sta); |
diff --git a/drivers/net/wireless/ipw2200.c b/drivers/net/wireless/ipw2200.c index bca89cff85a6..39f82f219749 100644 --- a/drivers/net/wireless/ipw2200.c +++ b/drivers/net/wireless/ipw2200.c | |||
@@ -33,7 +33,44 @@ | |||
33 | #include "ipw2200.h" | 33 | #include "ipw2200.h" |
34 | #include <linux/version.h> | 34 | #include <linux/version.h> |
35 | 35 | ||
36 | #define IPW2200_VERSION "git-1.1.1" | 36 | |
37 | #ifndef KBUILD_EXTMOD | ||
38 | #define VK "k" | ||
39 | #else | ||
40 | #define VK | ||
41 | #endif | ||
42 | |||
43 | #ifdef CONFIG_IPW2200_DEBUG | ||
44 | #define VD "d" | ||
45 | #else | ||
46 | #define VD | ||
47 | #endif | ||
48 | |||
49 | #ifdef CONFIG_IPW2200_MONITOR | ||
50 | #define VM "m" | ||
51 | #else | ||
52 | #define VM | ||
53 | #endif | ||
54 | |||
55 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
56 | #define VP "p" | ||
57 | #else | ||
58 | #define VP | ||
59 | #endif | ||
60 | |||
61 | #ifdef CONFIG_IPW2200_RADIOTAP | ||
62 | #define VR "r" | ||
63 | #else | ||
64 | #define VR | ||
65 | #endif | ||
66 | |||
67 | #ifdef CONFIG_IPW2200_QOS | ||
68 | #define VQ "q" | ||
69 | #else | ||
70 | #define VQ | ||
71 | #endif | ||
72 | |||
73 | #define IPW2200_VERSION "1.1.2" VK VD VM VP VR VQ | ||
37 | #define DRV_DESCRIPTION "Intel(R) PRO/Wireless 2200/2915 Network Driver" | 74 | #define DRV_DESCRIPTION "Intel(R) PRO/Wireless 2200/2915 Network Driver" |
38 | #define DRV_COPYRIGHT "Copyright(c) 2003-2006 Intel Corporation" | 75 | #define DRV_COPYRIGHT "Copyright(c) 2003-2006 Intel Corporation" |
39 | #define DRV_VERSION IPW2200_VERSION | 76 | #define DRV_VERSION IPW2200_VERSION |
@@ -46,7 +83,9 @@ MODULE_AUTHOR(DRV_COPYRIGHT); | |||
46 | MODULE_LICENSE("GPL"); | 83 | MODULE_LICENSE("GPL"); |
47 | 84 | ||
48 | static int cmdlog = 0; | 85 | static int cmdlog = 0; |
86 | #ifdef CONFIG_IPW2200_DEBUG | ||
49 | static int debug = 0; | 87 | static int debug = 0; |
88 | #endif | ||
50 | static int channel = 0; | 89 | static int channel = 0; |
51 | static int mode = 0; | 90 | static int mode = 0; |
52 | 91 | ||
@@ -61,8 +100,14 @@ static int roaming = 1; | |||
61 | static const char ipw_modes[] = { | 100 | static const char ipw_modes[] = { |
62 | 'a', 'b', 'g', '?' | 101 | 'a', 'b', 'g', '?' |
63 | }; | 102 | }; |
103 | static int antenna = CFG_SYS_ANTENNA_BOTH; | ||
64 | 104 | ||
65 | #ifdef CONFIG_IPW_QOS | 105 | #ifdef CONFIG_IPW2200_PROMISCUOUS |
106 | static int rtap_iface = 0; /* def: 0 -- do not create rtap interface */ | ||
107 | #endif | ||
108 | |||
109 | |||
110 | #ifdef CONFIG_IPW2200_QOS | ||
66 | static int qos_enable = 0; | 111 | static int qos_enable = 0; |
67 | static int qos_burst_enable = 0; | 112 | static int qos_burst_enable = 0; |
68 | static int qos_no_ack_mask = 0; | 113 | static int qos_no_ack_mask = 0; |
@@ -126,7 +171,7 @@ static int ipw_send_qos_params_command(struct ipw_priv *priv, struct ieee80211_q | |||
126 | *qos_param); | 171 | *qos_param); |
127 | static int ipw_send_qos_info_command(struct ipw_priv *priv, struct ieee80211_qos_information_element | 172 | static int ipw_send_qos_info_command(struct ipw_priv *priv, struct ieee80211_qos_information_element |
128 | *qos_param); | 173 | *qos_param); |
129 | #endif /* CONFIG_IPW_QOS */ | 174 | #endif /* CONFIG_IPW2200_QOS */ |
130 | 175 | ||
131 | static struct iw_statistics *ipw_get_wireless_stats(struct net_device *dev); | 176 | static struct iw_statistics *ipw_get_wireless_stats(struct net_device *dev); |
132 | static void ipw_remove_current_network(struct ipw_priv *priv); | 177 | static void ipw_remove_current_network(struct ipw_priv *priv); |
@@ -1269,6 +1314,105 @@ static ssize_t show_cmd_log(struct device *d, | |||
1269 | 1314 | ||
1270 | static DEVICE_ATTR(cmd_log, S_IRUGO, show_cmd_log, NULL); | 1315 | static DEVICE_ATTR(cmd_log, S_IRUGO, show_cmd_log, NULL); |
1271 | 1316 | ||
1317 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
1318 | static void ipw_prom_free(struct ipw_priv *priv); | ||
1319 | static int ipw_prom_alloc(struct ipw_priv *priv); | ||
1320 | static ssize_t store_rtap_iface(struct device *d, | ||
1321 | struct device_attribute *attr, | ||
1322 | const char *buf, size_t count) | ||
1323 | { | ||
1324 | struct ipw_priv *priv = dev_get_drvdata(d); | ||
1325 | int rc = 0; | ||
1326 | |||
1327 | if (count < 1) | ||
1328 | return -EINVAL; | ||
1329 | |||
1330 | switch (buf[0]) { | ||
1331 | case '0': | ||
1332 | if (!rtap_iface) | ||
1333 | return count; | ||
1334 | |||
1335 | if (netif_running(priv->prom_net_dev)) { | ||
1336 | IPW_WARNING("Interface is up. Cannot unregister.\n"); | ||
1337 | return count; | ||
1338 | } | ||
1339 | |||
1340 | ipw_prom_free(priv); | ||
1341 | rtap_iface = 0; | ||
1342 | break; | ||
1343 | |||
1344 | case '1': | ||
1345 | if (rtap_iface) | ||
1346 | return count; | ||
1347 | |||
1348 | rc = ipw_prom_alloc(priv); | ||
1349 | if (!rc) | ||
1350 | rtap_iface = 1; | ||
1351 | break; | ||
1352 | |||
1353 | default: | ||
1354 | return -EINVAL; | ||
1355 | } | ||
1356 | |||
1357 | if (rc) { | ||
1358 | IPW_ERROR("Failed to register promiscuous network " | ||
1359 | "device (error %d).\n", rc); | ||
1360 | } | ||
1361 | |||
1362 | return count; | ||
1363 | } | ||
1364 | |||
1365 | static ssize_t show_rtap_iface(struct device *d, | ||
1366 | struct device_attribute *attr, | ||
1367 | char *buf) | ||
1368 | { | ||
1369 | struct ipw_priv *priv = dev_get_drvdata(d); | ||
1370 | if (rtap_iface) | ||
1371 | return sprintf(buf, "%s", priv->prom_net_dev->name); | ||
1372 | else { | ||
1373 | buf[0] = '-'; | ||
1374 | buf[1] = '1'; | ||
1375 | buf[2] = '\0'; | ||
1376 | return 3; | ||
1377 | } | ||
1378 | } | ||
1379 | |||
1380 | static DEVICE_ATTR(rtap_iface, S_IWUSR | S_IRUSR, show_rtap_iface, | ||
1381 | store_rtap_iface); | ||
1382 | |||
1383 | static ssize_t store_rtap_filter(struct device *d, | ||
1384 | struct device_attribute *attr, | ||
1385 | const char *buf, size_t count) | ||
1386 | { | ||
1387 | struct ipw_priv *priv = dev_get_drvdata(d); | ||
1388 | |||
1389 | if (!priv->prom_priv) { | ||
1390 | IPW_ERROR("Attempting to set filter without " | ||
1391 | "rtap_iface enabled.\n"); | ||
1392 | return -EPERM; | ||
1393 | } | ||
1394 | |||
1395 | priv->prom_priv->filter = simple_strtol(buf, NULL, 0); | ||
1396 | |||
1397 | IPW_DEBUG_INFO("Setting rtap filter to " BIT_FMT16 "\n", | ||
1398 | BIT_ARG16(priv->prom_priv->filter)); | ||
1399 | |||
1400 | return count; | ||
1401 | } | ||
1402 | |||
1403 | static ssize_t show_rtap_filter(struct device *d, | ||
1404 | struct device_attribute *attr, | ||
1405 | char *buf) | ||
1406 | { | ||
1407 | struct ipw_priv *priv = dev_get_drvdata(d); | ||
1408 | return sprintf(buf, "0x%04X", | ||
1409 | priv->prom_priv ? priv->prom_priv->filter : 0); | ||
1410 | } | ||
1411 | |||
1412 | static DEVICE_ATTR(rtap_filter, S_IWUSR | S_IRUSR, show_rtap_filter, | ||
1413 | store_rtap_filter); | ||
1414 | #endif | ||
1415 | |||
1272 | static ssize_t show_scan_age(struct device *d, struct device_attribute *attr, | 1416 | static ssize_t show_scan_age(struct device *d, struct device_attribute *attr, |
1273 | char *buf) | 1417 | char *buf) |
1274 | { | 1418 | { |
@@ -2025,16 +2169,11 @@ static int ipw_send_host_complete(struct ipw_priv *priv) | |||
2025 | return ipw_send_cmd_simple(priv, IPW_CMD_HOST_COMPLETE); | 2169 | return ipw_send_cmd_simple(priv, IPW_CMD_HOST_COMPLETE); |
2026 | } | 2170 | } |
2027 | 2171 | ||
2028 | static int ipw_send_system_config(struct ipw_priv *priv, | 2172 | static int ipw_send_system_config(struct ipw_priv *priv) |
2029 | struct ipw_sys_config *config) | ||
2030 | { | 2173 | { |
2031 | if (!priv || !config) { | 2174 | return ipw_send_cmd_pdu(priv, IPW_CMD_SYSTEM_CONFIG, |
2032 | IPW_ERROR("Invalid args\n"); | 2175 | sizeof(priv->sys_config), |
2033 | return -1; | 2176 | &priv->sys_config); |
2034 | } | ||
2035 | |||
2036 | return ipw_send_cmd_pdu(priv, IPW_CMD_SYSTEM_CONFIG, sizeof(*config), | ||
2037 | config); | ||
2038 | } | 2177 | } |
2039 | 2178 | ||
2040 | static int ipw_send_ssid(struct ipw_priv *priv, u8 * ssid, int len) | 2179 | static int ipw_send_ssid(struct ipw_priv *priv, u8 * ssid, int len) |
@@ -3104,10 +3243,10 @@ static int ipw_reset_nic(struct ipw_priv *priv) | |||
3104 | 3243 | ||
3105 | 3244 | ||
3106 | struct ipw_fw { | 3245 | struct ipw_fw { |
3107 | u32 ver; | 3246 | __le32 ver; |
3108 | u32 boot_size; | 3247 | __le32 boot_size; |
3109 | u32 ucode_size; | 3248 | __le32 ucode_size; |
3110 | u32 fw_size; | 3249 | __le32 fw_size; |
3111 | u8 data[0]; | 3250 | u8 data[0]; |
3112 | }; | 3251 | }; |
3113 | 3252 | ||
@@ -3131,8 +3270,8 @@ static int ipw_get_fw(struct ipw_priv *priv, | |||
3131 | 3270 | ||
3132 | fw = (void *)(*raw)->data; | 3271 | fw = (void *)(*raw)->data; |
3133 | 3272 | ||
3134 | if ((*raw)->size < sizeof(*fw) + | 3273 | if ((*raw)->size < sizeof(*fw) + le32_to_cpu(fw->boot_size) + |
3135 | fw->boot_size + fw->ucode_size + fw->fw_size) { | 3274 | le32_to_cpu(fw->ucode_size) + le32_to_cpu(fw->fw_size)) { |
3136 | IPW_ERROR("%s is too small or corrupt (%zd)\n", | 3275 | IPW_ERROR("%s is too small or corrupt (%zd)\n", |
3137 | name, (*raw)->size); | 3276 | name, (*raw)->size); |
3138 | return -EINVAL; | 3277 | return -EINVAL; |
@@ -3237,8 +3376,9 @@ static int ipw_load(struct ipw_priv *priv) | |||
3237 | 3376 | ||
3238 | fw = (void *)raw->data; | 3377 | fw = (void *)raw->data; |
3239 | boot_img = &fw->data[0]; | 3378 | boot_img = &fw->data[0]; |
3240 | ucode_img = &fw->data[fw->boot_size]; | 3379 | ucode_img = &fw->data[le32_to_cpu(fw->boot_size)]; |
3241 | fw_img = &fw->data[fw->boot_size + fw->ucode_size]; | 3380 | fw_img = &fw->data[le32_to_cpu(fw->boot_size) + |
3381 | le32_to_cpu(fw->ucode_size)]; | ||
3242 | 3382 | ||
3243 | if (rc < 0) | 3383 | if (rc < 0) |
3244 | goto error; | 3384 | goto error; |
@@ -3272,7 +3412,7 @@ static int ipw_load(struct ipw_priv *priv) | |||
3272 | IPW_NIC_SRAM_UPPER_BOUND - IPW_NIC_SRAM_LOWER_BOUND); | 3412 | IPW_NIC_SRAM_UPPER_BOUND - IPW_NIC_SRAM_LOWER_BOUND); |
3273 | 3413 | ||
3274 | /* DMA the initial boot firmware into the device */ | 3414 | /* DMA the initial boot firmware into the device */ |
3275 | rc = ipw_load_firmware(priv, boot_img, fw->boot_size); | 3415 | rc = ipw_load_firmware(priv, boot_img, le32_to_cpu(fw->boot_size)); |
3276 | if (rc < 0) { | 3416 | if (rc < 0) { |
3277 | IPW_ERROR("Unable to load boot firmware: %d\n", rc); | 3417 | IPW_ERROR("Unable to load boot firmware: %d\n", rc); |
3278 | goto error; | 3418 | goto error; |
@@ -3294,7 +3434,7 @@ static int ipw_load(struct ipw_priv *priv) | |||
3294 | ipw_write32(priv, IPW_INTA_RW, IPW_INTA_BIT_FW_INITIALIZATION_DONE); | 3434 | ipw_write32(priv, IPW_INTA_RW, IPW_INTA_BIT_FW_INITIALIZATION_DONE); |
3295 | 3435 | ||
3296 | /* DMA the ucode into the device */ | 3436 | /* DMA the ucode into the device */ |
3297 | rc = ipw_load_ucode(priv, ucode_img, fw->ucode_size); | 3437 | rc = ipw_load_ucode(priv, ucode_img, le32_to_cpu(fw->ucode_size)); |
3298 | if (rc < 0) { | 3438 | if (rc < 0) { |
3299 | IPW_ERROR("Unable to load ucode: %d\n", rc); | 3439 | IPW_ERROR("Unable to load ucode: %d\n", rc); |
3300 | goto error; | 3440 | goto error; |
@@ -3304,7 +3444,7 @@ static int ipw_load(struct ipw_priv *priv) | |||
3304 | ipw_stop_nic(priv); | 3444 | ipw_stop_nic(priv); |
3305 | 3445 | ||
3306 | /* DMA bss firmware into the device */ | 3446 | /* DMA bss firmware into the device */ |
3307 | rc = ipw_load_firmware(priv, fw_img, fw->fw_size); | 3447 | rc = ipw_load_firmware(priv, fw_img, le32_to_cpu(fw->fw_size)); |
3308 | if (rc < 0) { | 3448 | if (rc < 0) { |
3309 | IPW_ERROR("Unable to load firmware: %d\n", rc); | 3449 | IPW_ERROR("Unable to load firmware: %d\n", rc); |
3310 | goto error; | 3450 | goto error; |
@@ -3700,7 +3840,17 @@ static void ipw_bg_disassociate(void *data) | |||
3700 | static void ipw_system_config(void *data) | 3840 | static void ipw_system_config(void *data) |
3701 | { | 3841 | { |
3702 | struct ipw_priv *priv = data; | 3842 | struct ipw_priv *priv = data; |
3703 | ipw_send_system_config(priv, &priv->sys_config); | 3843 | |
3844 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
3845 | if (priv->prom_net_dev && netif_running(priv->prom_net_dev)) { | ||
3846 | priv->sys_config.accept_all_data_frames = 1; | ||
3847 | priv->sys_config.accept_non_directed_frames = 1; | ||
3848 | priv->sys_config.accept_all_mgmt_bcpr = 1; | ||
3849 | priv->sys_config.accept_all_mgmt_frames = 1; | ||
3850 | } | ||
3851 | #endif | ||
3852 | |||
3853 | ipw_send_system_config(priv); | ||
3704 | } | 3854 | } |
3705 | 3855 | ||
3706 | struct ipw_status_code { | 3856 | struct ipw_status_code { |
@@ -3771,6 +3921,13 @@ static void inline average_init(struct average *avg) | |||
3771 | memset(avg, 0, sizeof(*avg)); | 3921 | memset(avg, 0, sizeof(*avg)); |
3772 | } | 3922 | } |
3773 | 3923 | ||
3924 | #define DEPTH_RSSI 8 | ||
3925 | #define DEPTH_NOISE 16 | ||
3926 | static s16 exponential_average(s16 prev_avg, s16 val, u8 depth) | ||
3927 | { | ||
3928 | return ((depth-1)*prev_avg + val)/depth; | ||
3929 | } | ||
3930 | |||
3774 | static void average_add(struct average *avg, s16 val) | 3931 | static void average_add(struct average *avg, s16 val) |
3775 | { | 3932 | { |
3776 | avg->sum -= avg->entries[avg->pos]; | 3933 | avg->sum -= avg->entries[avg->pos]; |
@@ -3800,8 +3957,8 @@ static void ipw_reset_stats(struct ipw_priv *priv) | |||
3800 | priv->quality = 0; | 3957 | priv->quality = 0; |
3801 | 3958 | ||
3802 | average_init(&priv->average_missed_beacons); | 3959 | average_init(&priv->average_missed_beacons); |
3803 | average_init(&priv->average_rssi); | 3960 | priv->exp_avg_rssi = -60; |
3804 | average_init(&priv->average_noise); | 3961 | priv->exp_avg_noise = -85 + 0x100; |
3805 | 3962 | ||
3806 | priv->last_rate = 0; | 3963 | priv->last_rate = 0; |
3807 | priv->last_missed_beacons = 0; | 3964 | priv->last_missed_beacons = 0; |
@@ -4008,7 +4165,7 @@ static void ipw_gather_stats(struct ipw_priv *priv) | |||
4008 | IPW_DEBUG_STATS("Tx quality : %3d%% (%u errors, %u packets)\n", | 4165 | IPW_DEBUG_STATS("Tx quality : %3d%% (%u errors, %u packets)\n", |
4009 | tx_quality, tx_failures_delta, tx_packets_delta); | 4166 | tx_quality, tx_failures_delta, tx_packets_delta); |
4010 | 4167 | ||
4011 | rssi = average_value(&priv->average_rssi); | 4168 | rssi = priv->exp_avg_rssi; |
4012 | signal_quality = | 4169 | signal_quality = |
4013 | (100 * | 4170 | (100 * |
4014 | (priv->ieee->perfect_rssi - priv->ieee->worst_rssi) * | 4171 | (priv->ieee->perfect_rssi - priv->ieee->worst_rssi) * |
@@ -4185,7 +4342,7 @@ static void ipw_rx_notification(struct ipw_priv *priv, | |||
4185 | queue_work(priv->workqueue, | 4342 | queue_work(priv->workqueue, |
4186 | &priv->system_config); | 4343 | &priv->system_config); |
4187 | 4344 | ||
4188 | #ifdef CONFIG_IPW_QOS | 4345 | #ifdef CONFIG_IPW2200_QOS |
4189 | #define IPW_GET_PACKET_STYPE(x) WLAN_FC_GET_STYPE( \ | 4346 | #define IPW_GET_PACKET_STYPE(x) WLAN_FC_GET_STYPE( \ |
4190 | le16_to_cpu(((struct ieee80211_hdr *)(x))->frame_ctl)) | 4347 | le16_to_cpu(((struct ieee80211_hdr *)(x))->frame_ctl)) |
4191 | if ((priv->status & STATUS_AUTH) && | 4348 | if ((priv->status & STATUS_AUTH) && |
@@ -4482,6 +4639,24 @@ static void ipw_rx_notification(struct ipw_priv *priv, | |||
4482 | && priv->status & STATUS_ASSOCIATED) | 4639 | && priv->status & STATUS_ASSOCIATED) |
4483 | queue_delayed_work(priv->workqueue, | 4640 | queue_delayed_work(priv->workqueue, |
4484 | &priv->request_scan, HZ); | 4641 | &priv->request_scan, HZ); |
4642 | |||
4643 | /* Send an empty event to user space. | ||
4644 | * We don't send the received data on the event because | ||
4645 | * it would require us to do complex transcoding, and | ||
4646 | * we want to minimise the work done in the irq handler | ||
4647 | * Use a request to extract the data. | ||
4648 | * Also, we generate this even for any scan, regardless | ||
4649 | * on how the scan was initiated. User space can just | ||
4650 | * sync on periodic scan to get fresh data... | ||
4651 | * Jean II */ | ||
4652 | if (x->status == SCAN_COMPLETED_STATUS_COMPLETE) { | ||
4653 | union iwreq_data wrqu; | ||
4654 | |||
4655 | wrqu.data.length = 0; | ||
4656 | wrqu.data.flags = 0; | ||
4657 | wireless_send_event(priv->net_dev, SIOCGIWSCAN, | ||
4658 | &wrqu, NULL); | ||
4659 | } | ||
4485 | break; | 4660 | break; |
4486 | } | 4661 | } |
4487 | 4662 | ||
@@ -4577,11 +4752,10 @@ static void ipw_rx_notification(struct ipw_priv *priv, | |||
4577 | 4752 | ||
4578 | case HOST_NOTIFICATION_NOISE_STATS:{ | 4753 | case HOST_NOTIFICATION_NOISE_STATS:{ |
4579 | if (notif->size == sizeof(u32)) { | 4754 | if (notif->size == sizeof(u32)) { |
4580 | priv->last_noise = | 4755 | priv->exp_avg_noise = |
4581 | (u8) (le32_to_cpu(notif->u.noise.value) & | 4756 | exponential_average(priv->exp_avg_noise, |
4582 | 0xff); | 4757 | (u8) (le32_to_cpu(notif->u.noise.value) & 0xff), |
4583 | average_add(&priv->average_noise, | 4758 | DEPTH_NOISE); |
4584 | priv->last_noise); | ||
4585 | break; | 4759 | break; |
4586 | } | 4760 | } |
4587 | 4761 | ||
@@ -6170,8 +6344,6 @@ static void ipw_wpa_assoc_frame(struct ipw_priv *priv, char *wpa_ie, | |||
6170 | { | 6344 | { |
6171 | /* make sure WPA is enabled */ | 6345 | /* make sure WPA is enabled */ |
6172 | ipw_wpa_enable(priv, 1); | 6346 | ipw_wpa_enable(priv, 1); |
6173 | |||
6174 | ipw_disassociate(priv); | ||
6175 | } | 6347 | } |
6176 | 6348 | ||
6177 | static int ipw_set_rsn_capa(struct ipw_priv *priv, | 6349 | static int ipw_set_rsn_capa(struct ipw_priv *priv, |
@@ -6365,6 +6537,7 @@ static int ipw_wx_set_auth(struct net_device *dev, | |||
6365 | 6537 | ||
6366 | case IW_AUTH_WPA_ENABLED: | 6538 | case IW_AUTH_WPA_ENABLED: |
6367 | ret = ipw_wpa_enable(priv, param->value); | 6539 | ret = ipw_wpa_enable(priv, param->value); |
6540 | ipw_disassociate(priv); | ||
6368 | break; | 6541 | break; |
6369 | 6542 | ||
6370 | case IW_AUTH_RX_UNENCRYPTED_EAPOL: | 6543 | case IW_AUTH_RX_UNENCRYPTED_EAPOL: |
@@ -6506,7 +6679,7 @@ static int ipw_wx_set_mlme(struct net_device *dev, | |||
6506 | return 0; | 6679 | return 0; |
6507 | } | 6680 | } |
6508 | 6681 | ||
6509 | #ifdef CONFIG_IPW_QOS | 6682 | #ifdef CONFIG_IPW2200_QOS |
6510 | 6683 | ||
6511 | /* QoS */ | 6684 | /* QoS */ |
6512 | /* | 6685 | /* |
@@ -6853,61 +7026,55 @@ static int ipw_get_tx_queue_number(struct ipw_priv *priv, u16 priority) | |||
6853 | return from_priority_to_tx_queue[priority] - 1; | 7026 | return from_priority_to_tx_queue[priority] - 1; |
6854 | } | 7027 | } |
6855 | 7028 | ||
6856 | /* | 7029 | static int ipw_is_qos_active(struct net_device *dev, |
6857 | * add QoS parameter to the TX command | 7030 | struct sk_buff *skb) |
6858 | */ | ||
6859 | static int ipw_qos_set_tx_queue_command(struct ipw_priv *priv, | ||
6860 | u16 priority, | ||
6861 | struct tfd_data *tfd, u8 unicast) | ||
6862 | { | 7031 | { |
6863 | int ret = 0; | 7032 | struct ipw_priv *priv = ieee80211_priv(dev); |
6864 | int tx_queue_id = 0; | ||
6865 | struct ieee80211_qos_data *qos_data = NULL; | 7033 | struct ieee80211_qos_data *qos_data = NULL; |
6866 | int active, supported; | 7034 | int active, supported; |
6867 | unsigned long flags; | 7035 | u8 *daddr = skb->data + ETH_ALEN; |
7036 | int unicast = !is_multicast_ether_addr(daddr); | ||
6868 | 7037 | ||
6869 | if (!(priv->status & STATUS_ASSOCIATED)) | 7038 | if (!(priv->status & STATUS_ASSOCIATED)) |
6870 | return 0; | 7039 | return 0; |
6871 | 7040 | ||
6872 | qos_data = &priv->assoc_network->qos_data; | 7041 | qos_data = &priv->assoc_network->qos_data; |
6873 | 7042 | ||
6874 | spin_lock_irqsave(&priv->ieee->lock, flags); | ||
6875 | |||
6876 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) { | 7043 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) { |
6877 | if (unicast == 0) | 7044 | if (unicast == 0) |
6878 | qos_data->active = 0; | 7045 | qos_data->active = 0; |
6879 | else | 7046 | else |
6880 | qos_data->active = qos_data->supported; | 7047 | qos_data->active = qos_data->supported; |
6881 | } | 7048 | } |
6882 | |||
6883 | active = qos_data->active; | 7049 | active = qos_data->active; |
6884 | supported = qos_data->supported; | 7050 | supported = qos_data->supported; |
6885 | |||
6886 | spin_unlock_irqrestore(&priv->ieee->lock, flags); | ||
6887 | |||
6888 | IPW_DEBUG_QOS("QoS %d network is QoS active %d supported %d " | 7051 | IPW_DEBUG_QOS("QoS %d network is QoS active %d supported %d " |
6889 | "unicast %d\n", | 7052 | "unicast %d\n", |
6890 | priv->qos_data.qos_enable, active, supported, unicast); | 7053 | priv->qos_data.qos_enable, active, supported, unicast); |
6891 | if (active && priv->qos_data.qos_enable) { | 7054 | if (active && priv->qos_data.qos_enable) |
6892 | ret = from_priority_to_tx_queue[priority]; | 7055 | return 1; |
6893 | tx_queue_id = ret - 1; | ||
6894 | IPW_DEBUG_QOS("QoS packet priority is %d \n", priority); | ||
6895 | if (priority <= 7) { | ||
6896 | tfd->tx_flags_ext |= DCT_FLAG_EXT_QOS_ENABLED; | ||
6897 | tfd->tfd.tfd_26.mchdr.qos_ctrl = priority; | ||
6898 | tfd->tfd.tfd_26.mchdr.frame_ctl |= | ||
6899 | IEEE80211_STYPE_QOS_DATA; | ||
6900 | |||
6901 | if (priv->qos_data.qos_no_ack_mask & | ||
6902 | (1UL << tx_queue_id)) { | ||
6903 | tfd->tx_flags &= ~DCT_FLAG_ACK_REQD; | ||
6904 | tfd->tfd.tfd_26.mchdr.qos_ctrl |= | ||
6905 | CTRL_QOS_NO_ACK; | ||
6906 | } | ||
6907 | } | ||
6908 | } | ||
6909 | 7056 | ||
6910 | return ret; | 7057 | return 0; |
7058 | |||
7059 | } | ||
7060 | /* | ||
7061 | * add QoS parameter to the TX command | ||
7062 | */ | ||
7063 | static int ipw_qos_set_tx_queue_command(struct ipw_priv *priv, | ||
7064 | u16 priority, | ||
7065 | struct tfd_data *tfd) | ||
7066 | { | ||
7067 | int tx_queue_id = 0; | ||
7068 | |||
7069 | |||
7070 | tx_queue_id = from_priority_to_tx_queue[priority] - 1; | ||
7071 | tfd->tx_flags_ext |= DCT_FLAG_EXT_QOS_ENABLED; | ||
7072 | |||
7073 | if (priv->qos_data.qos_no_ack_mask & (1UL << tx_queue_id)) { | ||
7074 | tfd->tx_flags &= ~DCT_FLAG_ACK_REQD; | ||
7075 | tfd->tfd.tfd_26.mchdr.qos_ctrl |= CTRL_QOS_NO_ACK; | ||
7076 | } | ||
7077 | return 0; | ||
6911 | } | 7078 | } |
6912 | 7079 | ||
6913 | /* | 7080 | /* |
@@ -6977,7 +7144,7 @@ static int ipw_send_qos_info_command(struct ipw_priv *priv, struct ieee80211_qos | |||
6977 | qos_param); | 7144 | qos_param); |
6978 | } | 7145 | } |
6979 | 7146 | ||
6980 | #endif /* CONFIG_IPW_QOS */ | 7147 | #endif /* CONFIG_IPW2200_QOS */ |
6981 | 7148 | ||
6982 | static int ipw_associate_network(struct ipw_priv *priv, | 7149 | static int ipw_associate_network(struct ipw_priv *priv, |
6983 | struct ieee80211_network *network, | 7150 | struct ieee80211_network *network, |
@@ -7116,7 +7283,7 @@ static int ipw_associate_network(struct ipw_priv *priv, | |||
7116 | else | 7283 | else |
7117 | priv->sys_config.answer_broadcast_ssid_probe = 0; | 7284 | priv->sys_config.answer_broadcast_ssid_probe = 0; |
7118 | 7285 | ||
7119 | err = ipw_send_system_config(priv, &priv->sys_config); | 7286 | err = ipw_send_system_config(priv); |
7120 | if (err) { | 7287 | if (err) { |
7121 | IPW_DEBUG_HC("Attempt to send sys config command failed.\n"); | 7288 | IPW_DEBUG_HC("Attempt to send sys config command failed.\n"); |
7122 | return err; | 7289 | return err; |
@@ -7141,7 +7308,7 @@ static int ipw_associate_network(struct ipw_priv *priv, | |||
7141 | 7308 | ||
7142 | priv->assoc_network = network; | 7309 | priv->assoc_network = network; |
7143 | 7310 | ||
7144 | #ifdef CONFIG_IPW_QOS | 7311 | #ifdef CONFIG_IPW2200_QOS |
7145 | ipw_qos_association(priv, network); | 7312 | ipw_qos_association(priv, network); |
7146 | #endif | 7313 | #endif |
7147 | 7314 | ||
@@ -7415,7 +7582,7 @@ static void ipw_handle_data_packet(struct ipw_priv *priv, | |||
7415 | } | 7582 | } |
7416 | } | 7583 | } |
7417 | 7584 | ||
7418 | #ifdef CONFIG_IEEE80211_RADIOTAP | 7585 | #ifdef CONFIG_IPW2200_RADIOTAP |
7419 | static void ipw_handle_data_packet_monitor(struct ipw_priv *priv, | 7586 | static void ipw_handle_data_packet_monitor(struct ipw_priv *priv, |
7420 | struct ipw_rx_mem_buffer *rxb, | 7587 | struct ipw_rx_mem_buffer *rxb, |
7421 | struct ieee80211_rx_stats *stats) | 7588 | struct ieee80211_rx_stats *stats) |
@@ -7432,15 +7599,7 @@ static void ipw_handle_data_packet_monitor(struct ipw_priv *priv, | |||
7432 | /* Magic struct that slots into the radiotap header -- no reason | 7599 | /* Magic struct that slots into the radiotap header -- no reason |
7433 | * to build this manually element by element, we can write it much | 7600 | * to build this manually element by element, we can write it much |
7434 | * more efficiently than we can parse it. ORDER MATTERS HERE */ | 7601 | * more efficiently than we can parse it. ORDER MATTERS HERE */ |
7435 | struct ipw_rt_hdr { | 7602 | struct ipw_rt_hdr *ipw_rt; |
7436 | struct ieee80211_radiotap_header rt_hdr; | ||
7437 | u8 rt_flags; /* radiotap packet flags */ | ||
7438 | u8 rt_rate; /* rate in 500kb/s */ | ||
7439 | u16 rt_channel; /* channel in mhz */ | ||
7440 | u16 rt_chbitmask; /* channel bitfield */ | ||
7441 | s8 rt_dbmsignal; /* signal in dbM, kluged to signed */ | ||
7442 | u8 rt_antenna; /* antenna number */ | ||
7443 | } *ipw_rt; | ||
7444 | 7603 | ||
7445 | short len = le16_to_cpu(pkt->u.frame.length); | 7604 | short len = le16_to_cpu(pkt->u.frame.length); |
7446 | 7605 | ||
@@ -7494,9 +7653,11 @@ static void ipw_handle_data_packet_monitor(struct ipw_priv *priv, | |||
7494 | /* Big bitfield of all the fields we provide in radiotap */ | 7653 | /* Big bitfield of all the fields we provide in radiotap */ |
7495 | ipw_rt->rt_hdr.it_present = | 7654 | ipw_rt->rt_hdr.it_present = |
7496 | ((1 << IEEE80211_RADIOTAP_FLAGS) | | 7655 | ((1 << IEEE80211_RADIOTAP_FLAGS) | |
7656 | (1 << IEEE80211_RADIOTAP_TSFT) | | ||
7497 | (1 << IEEE80211_RADIOTAP_RATE) | | 7657 | (1 << IEEE80211_RADIOTAP_RATE) | |
7498 | (1 << IEEE80211_RADIOTAP_CHANNEL) | | 7658 | (1 << IEEE80211_RADIOTAP_CHANNEL) | |
7499 | (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | | 7659 | (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | |
7660 | (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | | ||
7500 | (1 << IEEE80211_RADIOTAP_ANTENNA)); | 7661 | (1 << IEEE80211_RADIOTAP_ANTENNA)); |
7501 | 7662 | ||
7502 | /* Zero the flags, we'll add to them as we go */ | 7663 | /* Zero the flags, we'll add to them as we go */ |
@@ -7582,6 +7743,217 @@ static void ipw_handle_data_packet_monitor(struct ipw_priv *priv, | |||
7582 | } | 7743 | } |
7583 | #endif | 7744 | #endif |
7584 | 7745 | ||
7746 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
7747 | #define ieee80211_is_probe_response(fc) \ | ||
7748 | ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT && \ | ||
7749 | (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_PROBE_RESP ) | ||
7750 | |||
7751 | #define ieee80211_is_management(fc) \ | ||
7752 | ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) | ||
7753 | |||
7754 | #define ieee80211_is_control(fc) \ | ||
7755 | ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_CTL) | ||
7756 | |||
7757 | #define ieee80211_is_data(fc) \ | ||
7758 | ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) | ||
7759 | |||
7760 | #define ieee80211_is_assoc_request(fc) \ | ||
7761 | ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ) | ||
7762 | |||
7763 | #define ieee80211_is_reassoc_request(fc) \ | ||
7764 | ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ) | ||
7765 | |||
7766 | static void ipw_handle_promiscuous_rx(struct ipw_priv *priv, | ||
7767 | struct ipw_rx_mem_buffer *rxb, | ||
7768 | struct ieee80211_rx_stats *stats) | ||
7769 | { | ||
7770 | struct ipw_rx_packet *pkt = (struct ipw_rx_packet *)rxb->skb->data; | ||
7771 | struct ipw_rx_frame *frame = &pkt->u.frame; | ||
7772 | struct ipw_rt_hdr *ipw_rt; | ||
7773 | |||
7774 | /* First cache any information we need before we overwrite | ||
7775 | * the information provided in the skb from the hardware */ | ||
7776 | struct ieee80211_hdr *hdr; | ||
7777 | u16 channel = frame->received_channel; | ||
7778 | u8 phy_flags = frame->antennaAndPhy; | ||
7779 | s8 signal = frame->rssi_dbm - IPW_RSSI_TO_DBM; | ||
7780 | s8 noise = frame->noise; | ||
7781 | u8 rate = frame->rate; | ||
7782 | short len = le16_to_cpu(pkt->u.frame.length); | ||
7783 | u64 tsf = 0; | ||
7784 | struct sk_buff *skb; | ||
7785 | int hdr_only = 0; | ||
7786 | u16 filter = priv->prom_priv->filter; | ||
7787 | |||
7788 | /* If the filter is set to not include Rx frames then return */ | ||
7789 | if (filter & IPW_PROM_NO_RX) | ||
7790 | return; | ||
7791 | |||
7792 | /* We received data from the HW, so stop the watchdog */ | ||
7793 | priv->prom_net_dev->trans_start = jiffies; | ||
7794 | |||
7795 | if (unlikely((len + IPW_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) { | ||
7796 | priv->prom_priv->ieee->stats.rx_errors++; | ||
7797 | IPW_DEBUG_DROP("Corruption detected! Oh no!\n"); | ||
7798 | return; | ||
7799 | } | ||
7800 | |||
7801 | /* We only process data packets if the interface is open */ | ||
7802 | if (unlikely(!netif_running(priv->prom_net_dev))) { | ||
7803 | priv->prom_priv->ieee->stats.rx_dropped++; | ||
7804 | IPW_DEBUG_DROP("Dropping packet while interface is not up.\n"); | ||
7805 | return; | ||
7806 | } | ||
7807 | |||
7808 | /* Libpcap 0.9.3+ can handle variable length radiotap, so we'll use | ||
7809 | * that now */ | ||
7810 | if (len > IPW_RX_BUF_SIZE - sizeof(struct ipw_rt_hdr)) { | ||
7811 | /* FIXME: Should alloc bigger skb instead */ | ||
7812 | priv->prom_priv->ieee->stats.rx_dropped++; | ||
7813 | IPW_DEBUG_DROP("Dropping too large packet in monitor\n"); | ||
7814 | return; | ||
7815 | } | ||
7816 | |||
7817 | hdr = (void *)rxb->skb->data + IPW_RX_FRAME_SIZE; | ||
7818 | if (ieee80211_is_management(hdr->frame_ctl)) { | ||
7819 | if (filter & IPW_PROM_NO_MGMT) | ||
7820 | return; | ||
7821 | if (filter & IPW_PROM_MGMT_HEADER_ONLY) | ||
7822 | hdr_only = 1; | ||
7823 | } else if (ieee80211_is_control(hdr->frame_ctl)) { | ||
7824 | if (filter & IPW_PROM_NO_CTL) | ||
7825 | return; | ||
7826 | if (filter & IPW_PROM_CTL_HEADER_ONLY) | ||
7827 | hdr_only = 1; | ||
7828 | } else if (ieee80211_is_data(hdr->frame_ctl)) { | ||
7829 | if (filter & IPW_PROM_NO_DATA) | ||
7830 | return; | ||
7831 | if (filter & IPW_PROM_DATA_HEADER_ONLY) | ||
7832 | hdr_only = 1; | ||
7833 | } | ||
7834 | |||
7835 | /* Copy the SKB since this is for the promiscuous side */ | ||
7836 | skb = skb_copy(rxb->skb, GFP_ATOMIC); | ||
7837 | if (skb == NULL) { | ||
7838 | IPW_ERROR("skb_clone failed for promiscuous copy.\n"); | ||
7839 | return; | ||
7840 | } | ||
7841 | |||
7842 | /* copy the frame data to write after where the radiotap header goes */ | ||
7843 | ipw_rt = (void *)skb->data; | ||
7844 | |||
7845 | if (hdr_only) | ||
7846 | len = ieee80211_get_hdrlen(hdr->frame_ctl); | ||
7847 | |||
7848 | memcpy(ipw_rt->payload, hdr, len); | ||
7849 | |||
7850 | /* Zero the radiotap static buffer ... We only need to zero the bytes | ||
7851 | * NOT part of our real header, saves a little time. | ||
7852 | * | ||
7853 | * No longer necessary since we fill in all our data. Purge before | ||
7854 | * merging patch officially. | ||
7855 | * memset(rxb->skb->data + sizeof(struct ipw_rt_hdr), 0, | ||
7856 | * IEEE80211_RADIOTAP_HDRLEN - sizeof(struct ipw_rt_hdr)); | ||
7857 | */ | ||
7858 | |||
7859 | ipw_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION; | ||
7860 | ipw_rt->rt_hdr.it_pad = 0; /* always good to zero */ | ||
7861 | ipw_rt->rt_hdr.it_len = sizeof(*ipw_rt); /* total header+data */ | ||
7862 | |||
7863 | /* Set the size of the skb to the size of the frame */ | ||
7864 | skb_put(skb, ipw_rt->rt_hdr.it_len + len); | ||
7865 | |||
7866 | /* Big bitfield of all the fields we provide in radiotap */ | ||
7867 | ipw_rt->rt_hdr.it_present = | ||
7868 | ((1 << IEEE80211_RADIOTAP_FLAGS) | | ||
7869 | (1 << IEEE80211_RADIOTAP_TSFT) | | ||
7870 | (1 << IEEE80211_RADIOTAP_RATE) | | ||
7871 | (1 << IEEE80211_RADIOTAP_CHANNEL) | | ||
7872 | (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | | ||
7873 | (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | | ||
7874 | (1 << IEEE80211_RADIOTAP_ANTENNA)); | ||
7875 | |||
7876 | /* Zero the flags, we'll add to them as we go */ | ||
7877 | ipw_rt->rt_flags = 0; | ||
7878 | |||
7879 | ipw_rt->rt_tsf = tsf; | ||
7880 | |||
7881 | /* Convert to DBM */ | ||
7882 | ipw_rt->rt_dbmsignal = signal; | ||
7883 | ipw_rt->rt_dbmnoise = noise; | ||
7884 | |||
7885 | /* Convert the channel data and set the flags */ | ||
7886 | ipw_rt->rt_channel = cpu_to_le16(ieee80211chan2mhz(channel)); | ||
7887 | if (channel > 14) { /* 802.11a */ | ||
7888 | ipw_rt->rt_chbitmask = | ||
7889 | cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ)); | ||
7890 | } else if (phy_flags & (1 << 5)) { /* 802.11b */ | ||
7891 | ipw_rt->rt_chbitmask = | ||
7892 | cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ)); | ||
7893 | } else { /* 802.11g */ | ||
7894 | ipw_rt->rt_chbitmask = | ||
7895 | (IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ); | ||
7896 | } | ||
7897 | |||
7898 | /* set the rate in multiples of 500k/s */ | ||
7899 | switch (rate) { | ||
7900 | case IPW_TX_RATE_1MB: | ||
7901 | ipw_rt->rt_rate = 2; | ||
7902 | break; | ||
7903 | case IPW_TX_RATE_2MB: | ||
7904 | ipw_rt->rt_rate = 4; | ||
7905 | break; | ||
7906 | case IPW_TX_RATE_5MB: | ||
7907 | ipw_rt->rt_rate = 10; | ||
7908 | break; | ||
7909 | case IPW_TX_RATE_6MB: | ||
7910 | ipw_rt->rt_rate = 12; | ||
7911 | break; | ||
7912 | case IPW_TX_RATE_9MB: | ||
7913 | ipw_rt->rt_rate = 18; | ||
7914 | break; | ||
7915 | case IPW_TX_RATE_11MB: | ||
7916 | ipw_rt->rt_rate = 22; | ||
7917 | break; | ||
7918 | case IPW_TX_RATE_12MB: | ||
7919 | ipw_rt->rt_rate = 24; | ||
7920 | break; | ||
7921 | case IPW_TX_RATE_18MB: | ||
7922 | ipw_rt->rt_rate = 36; | ||
7923 | break; | ||
7924 | case IPW_TX_RATE_24MB: | ||
7925 | ipw_rt->rt_rate = 48; | ||
7926 | break; | ||
7927 | case IPW_TX_RATE_36MB: | ||
7928 | ipw_rt->rt_rate = 72; | ||
7929 | break; | ||
7930 | case IPW_TX_RATE_48MB: | ||
7931 | ipw_rt->rt_rate = 96; | ||
7932 | break; | ||
7933 | case IPW_TX_RATE_54MB: | ||
7934 | ipw_rt->rt_rate = 108; | ||
7935 | break; | ||
7936 | default: | ||
7937 | ipw_rt->rt_rate = 0; | ||
7938 | break; | ||
7939 | } | ||
7940 | |||
7941 | /* antenna number */ | ||
7942 | ipw_rt->rt_antenna = (phy_flags & 3); | ||
7943 | |||
7944 | /* set the preamble flag if we have it */ | ||
7945 | if (phy_flags & (1 << 6)) | ||
7946 | ipw_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; | ||
7947 | |||
7948 | IPW_DEBUG_RX("Rx packet of %d bytes.\n", skb->len); | ||
7949 | |||
7950 | if (!ieee80211_rx(priv->prom_priv->ieee, skb, stats)) { | ||
7951 | priv->prom_priv->ieee->stats.rx_errors++; | ||
7952 | dev_kfree_skb_any(skb); | ||
7953 | } | ||
7954 | } | ||
7955 | #endif | ||
7956 | |||
7585 | static int is_network_packet(struct ipw_priv *priv, | 7957 | static int is_network_packet(struct ipw_priv *priv, |
7586 | struct ieee80211_hdr_4addr *header) | 7958 | struct ieee80211_hdr_4addr *header) |
7587 | { | 7959 | { |
@@ -7808,15 +8180,21 @@ static void ipw_rx(struct ipw_priv *priv) | |||
7808 | 8180 | ||
7809 | priv->rx_packets++; | 8181 | priv->rx_packets++; |
7810 | 8182 | ||
8183 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
8184 | if (priv->prom_net_dev && netif_running(priv->prom_net_dev)) | ||
8185 | ipw_handle_promiscuous_rx(priv, rxb, &stats); | ||
8186 | #endif | ||
8187 | |||
7811 | #ifdef CONFIG_IPW2200_MONITOR | 8188 | #ifdef CONFIG_IPW2200_MONITOR |
7812 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { | 8189 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { |
7813 | #ifdef CONFIG_IEEE80211_RADIOTAP | 8190 | #ifdef CONFIG_IPW2200_RADIOTAP |
7814 | ipw_handle_data_packet_monitor(priv, | 8191 | |
7815 | rxb, | 8192 | ipw_handle_data_packet_monitor(priv, |
7816 | &stats); | 8193 | rxb, |
8194 | &stats); | ||
7817 | #else | 8195 | #else |
7818 | ipw_handle_data_packet(priv, rxb, | 8196 | ipw_handle_data_packet(priv, rxb, |
7819 | &stats); | 8197 | &stats); |
7820 | #endif | 8198 | #endif |
7821 | break; | 8199 | break; |
7822 | } | 8200 | } |
@@ -7837,9 +8215,9 @@ static void ipw_rx(struct ipw_priv *priv) | |||
7837 | if (network_packet && priv->assoc_network) { | 8215 | if (network_packet && priv->assoc_network) { |
7838 | priv->assoc_network->stats.rssi = | 8216 | priv->assoc_network->stats.rssi = |
7839 | stats.rssi; | 8217 | stats.rssi; |
7840 | average_add(&priv->average_rssi, | 8218 | priv->exp_avg_rssi = |
7841 | stats.rssi); | 8219 | exponential_average(priv->exp_avg_rssi, |
7842 | priv->last_rx_rssi = stats.rssi; | 8220 | stats.rssi, DEPTH_RSSI); |
7843 | } | 8221 | } |
7844 | 8222 | ||
7845 | IPW_DEBUG_RX("Frame: len=%u\n", | 8223 | IPW_DEBUG_RX("Frame: len=%u\n", |
@@ -7982,10 +8360,10 @@ static int ipw_sw_reset(struct ipw_priv *priv, int option) | |||
7982 | IPW_DEBUG_INFO("Bind to static channel %d\n", channel); | 8360 | IPW_DEBUG_INFO("Bind to static channel %d\n", channel); |
7983 | /* TODO: Validate that provided channel is in range */ | 8361 | /* TODO: Validate that provided channel is in range */ |
7984 | } | 8362 | } |
7985 | #ifdef CONFIG_IPW_QOS | 8363 | #ifdef CONFIG_IPW2200_QOS |
7986 | ipw_qos_init(priv, qos_enable, qos_burst_enable, | 8364 | ipw_qos_init(priv, qos_enable, qos_burst_enable, |
7987 | burst_duration_CCK, burst_duration_OFDM); | 8365 | burst_duration_CCK, burst_duration_OFDM); |
7988 | #endif /* CONFIG_IPW_QOS */ | 8366 | #endif /* CONFIG_IPW2200_QOS */ |
7989 | 8367 | ||
7990 | switch (mode) { | 8368 | switch (mode) { |
7991 | case 1: | 8369 | case 1: |
@@ -7996,7 +8374,7 @@ static int ipw_sw_reset(struct ipw_priv *priv, int option) | |||
7996 | #ifdef CONFIG_IPW2200_MONITOR | 8374 | #ifdef CONFIG_IPW2200_MONITOR |
7997 | case 2: | 8375 | case 2: |
7998 | priv->ieee->iw_mode = IW_MODE_MONITOR; | 8376 | priv->ieee->iw_mode = IW_MODE_MONITOR; |
7999 | #ifdef CONFIG_IEEE80211_RADIOTAP | 8377 | #ifdef CONFIG_IPW2200_RADIOTAP |
8000 | priv->net_dev->type = ARPHRD_IEEE80211_RADIOTAP; | 8378 | priv->net_dev->type = ARPHRD_IEEE80211_RADIOTAP; |
8001 | #else | 8379 | #else |
8002 | priv->net_dev->type = ARPHRD_IEEE80211; | 8380 | priv->net_dev->type = ARPHRD_IEEE80211; |
@@ -8251,7 +8629,7 @@ static int ipw_wx_set_mode(struct net_device *dev, | |||
8251 | priv->net_dev->type = ARPHRD_ETHER; | 8629 | priv->net_dev->type = ARPHRD_ETHER; |
8252 | 8630 | ||
8253 | if (wrqu->mode == IW_MODE_MONITOR) | 8631 | if (wrqu->mode == IW_MODE_MONITOR) |
8254 | #ifdef CONFIG_IEEE80211_RADIOTAP | 8632 | #ifdef CONFIG_IPW2200_RADIOTAP |
8255 | priv->net_dev->type = ARPHRD_IEEE80211_RADIOTAP; | 8633 | priv->net_dev->type = ARPHRD_IEEE80211_RADIOTAP; |
8256 | #else | 8634 | #else |
8257 | priv->net_dev->type = ARPHRD_IEEE80211; | 8635 | priv->net_dev->type = ARPHRD_IEEE80211; |
@@ -8379,7 +8757,8 @@ static int ipw_wx_get_range(struct net_device *dev, | |||
8379 | /* Event capability (kernel + driver) */ | 8757 | /* Event capability (kernel + driver) */ |
8380 | range->event_capa[0] = (IW_EVENT_CAPA_K_0 | | 8758 | range->event_capa[0] = (IW_EVENT_CAPA_K_0 | |
8381 | IW_EVENT_CAPA_MASK(SIOCGIWTHRSPY) | | 8759 | IW_EVENT_CAPA_MASK(SIOCGIWTHRSPY) | |
8382 | IW_EVENT_CAPA_MASK(SIOCGIWAP)); | 8760 | IW_EVENT_CAPA_MASK(SIOCGIWAP) | |
8761 | IW_EVENT_CAPA_MASK(SIOCGIWSCAN)); | ||
8383 | range->event_capa[1] = IW_EVENT_CAPA_K_1; | 8762 | range->event_capa[1] = IW_EVENT_CAPA_K_1; |
8384 | 8763 | ||
8385 | range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 | | 8764 | range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 | |
@@ -8734,6 +9113,7 @@ static int ipw_wx_get_rate(struct net_device *dev, | |||
8734 | struct ipw_priv *priv = ieee80211_priv(dev); | 9113 | struct ipw_priv *priv = ieee80211_priv(dev); |
8735 | mutex_lock(&priv->mutex); | 9114 | mutex_lock(&priv->mutex); |
8736 | wrqu->bitrate.value = priv->last_rate; | 9115 | wrqu->bitrate.value = priv->last_rate; |
9116 | wrqu->bitrate.fixed = (priv->config & CFG_FIXED_RATE) ? 1 : 0; | ||
8737 | mutex_unlock(&priv->mutex); | 9117 | mutex_unlock(&priv->mutex); |
8738 | IPW_DEBUG_WX("GET Rate -> %d \n", wrqu->bitrate.value); | 9118 | IPW_DEBUG_WX("GET Rate -> %d \n", wrqu->bitrate.value); |
8739 | return 0; | 9119 | return 0; |
@@ -9351,7 +9731,7 @@ static int ipw_wx_set_monitor(struct net_device *dev, | |||
9351 | IPW_DEBUG_WX("SET MONITOR: %d %d\n", enable, parms[1]); | 9731 | IPW_DEBUG_WX("SET MONITOR: %d %d\n", enable, parms[1]); |
9352 | if (enable) { | 9732 | if (enable) { |
9353 | if (priv->ieee->iw_mode != IW_MODE_MONITOR) { | 9733 | if (priv->ieee->iw_mode != IW_MODE_MONITOR) { |
9354 | #ifdef CONFIG_IEEE80211_RADIOTAP | 9734 | #ifdef CONFIG_IPW2200_RADIOTAP |
9355 | priv->net_dev->type = ARPHRD_IEEE80211_RADIOTAP; | 9735 | priv->net_dev->type = ARPHRD_IEEE80211_RADIOTAP; |
9356 | #else | 9736 | #else |
9357 | priv->net_dev->type = ARPHRD_IEEE80211; | 9737 | priv->net_dev->type = ARPHRD_IEEE80211; |
@@ -9579,8 +9959,8 @@ static struct iw_statistics *ipw_get_wireless_stats(struct net_device *dev) | |||
9579 | } | 9959 | } |
9580 | 9960 | ||
9581 | wstats->qual.qual = priv->quality; | 9961 | wstats->qual.qual = priv->quality; |
9582 | wstats->qual.level = average_value(&priv->average_rssi); | 9962 | wstats->qual.level = priv->exp_avg_rssi; |
9583 | wstats->qual.noise = average_value(&priv->average_noise); | 9963 | wstats->qual.noise = priv->exp_avg_noise; |
9584 | wstats->qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED | | 9964 | wstats->qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED | |
9585 | IW_QUAL_NOISE_UPDATED | IW_QUAL_DBM; | 9965 | IW_QUAL_NOISE_UPDATED | IW_QUAL_DBM; |
9586 | 9966 | ||
@@ -9608,7 +9988,9 @@ static void init_sys_config(struct ipw_sys_config *sys_config) | |||
9608 | sys_config->disable_unicast_decryption = 1; | 9988 | sys_config->disable_unicast_decryption = 1; |
9609 | sys_config->exclude_multicast_unencrypted = 0; | 9989 | sys_config->exclude_multicast_unencrypted = 0; |
9610 | sys_config->disable_multicast_decryption = 1; | 9990 | sys_config->disable_multicast_decryption = 1; |
9611 | sys_config->antenna_diversity = CFG_SYS_ANTENNA_SLOW_DIV; | 9991 | if (antenna < CFG_SYS_ANTENNA_BOTH || antenna > CFG_SYS_ANTENNA_B) |
9992 | antenna = CFG_SYS_ANTENNA_BOTH; | ||
9993 | sys_config->antenna_diversity = antenna; | ||
9612 | sys_config->pass_crc_to_host = 0; /* TODO: See if 1 gives us FCS */ | 9994 | sys_config->pass_crc_to_host = 0; /* TODO: See if 1 gives us FCS */ |
9613 | sys_config->dot11g_auto_detection = 0; | 9995 | sys_config->dot11g_auto_detection = 0; |
9614 | sys_config->enable_cts_to_self = 0; | 9996 | sys_config->enable_cts_to_self = 0; |
@@ -9647,11 +10029,11 @@ we need to heavily modify the ieee80211_skb_to_txb. | |||
9647 | static int ipw_tx_skb(struct ipw_priv *priv, struct ieee80211_txb *txb, | 10029 | static int ipw_tx_skb(struct ipw_priv *priv, struct ieee80211_txb *txb, |
9648 | int pri) | 10030 | int pri) |
9649 | { | 10031 | { |
9650 | struct ieee80211_hdr_3addr *hdr = (struct ieee80211_hdr_3addr *) | 10032 | struct ieee80211_hdr_3addrqos *hdr = (struct ieee80211_hdr_3addrqos *) |
9651 | txb->fragments[0]->data; | 10033 | txb->fragments[0]->data; |
9652 | int i = 0; | 10034 | int i = 0; |
9653 | struct tfd_frame *tfd; | 10035 | struct tfd_frame *tfd; |
9654 | #ifdef CONFIG_IPW_QOS | 10036 | #ifdef CONFIG_IPW2200_QOS |
9655 | int tx_id = ipw_get_tx_queue_number(priv, pri); | 10037 | int tx_id = ipw_get_tx_queue_number(priv, pri); |
9656 | struct clx2_tx_queue *txq = &priv->txq[tx_id]; | 10038 | struct clx2_tx_queue *txq = &priv->txq[tx_id]; |
9657 | #else | 10039 | #else |
@@ -9662,9 +10044,9 @@ static int ipw_tx_skb(struct ipw_priv *priv, struct ieee80211_txb *txb, | |||
9662 | u16 remaining_bytes; | 10044 | u16 remaining_bytes; |
9663 | int fc; | 10045 | int fc; |
9664 | 10046 | ||
10047 | hdr_len = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl)); | ||
9665 | switch (priv->ieee->iw_mode) { | 10048 | switch (priv->ieee->iw_mode) { |
9666 | case IW_MODE_ADHOC: | 10049 | case IW_MODE_ADHOC: |
9667 | hdr_len = IEEE80211_3ADDR_LEN; | ||
9668 | unicast = !is_multicast_ether_addr(hdr->addr1); | 10050 | unicast = !is_multicast_ether_addr(hdr->addr1); |
9669 | id = ipw_find_station(priv, hdr->addr1); | 10051 | id = ipw_find_station(priv, hdr->addr1); |
9670 | if (id == IPW_INVALID_STATION) { | 10052 | if (id == IPW_INVALID_STATION) { |
@@ -9681,7 +10063,6 @@ static int ipw_tx_skb(struct ipw_priv *priv, struct ieee80211_txb *txb, | |||
9681 | case IW_MODE_INFRA: | 10063 | case IW_MODE_INFRA: |
9682 | default: | 10064 | default: |
9683 | unicast = !is_multicast_ether_addr(hdr->addr3); | 10065 | unicast = !is_multicast_ether_addr(hdr->addr3); |
9684 | hdr_len = IEEE80211_3ADDR_LEN; | ||
9685 | id = 0; | 10066 | id = 0; |
9686 | break; | 10067 | break; |
9687 | } | 10068 | } |
@@ -9759,9 +10140,10 @@ static int ipw_tx_skb(struct ipw_priv *priv, struct ieee80211_txb *txb, | |||
9759 | /* No hardware encryption */ | 10140 | /* No hardware encryption */ |
9760 | tfd->u.data.tx_flags |= DCT_FLAG_NO_WEP; | 10141 | tfd->u.data.tx_flags |= DCT_FLAG_NO_WEP; |
9761 | 10142 | ||
9762 | #ifdef CONFIG_IPW_QOS | 10143 | #ifdef CONFIG_IPW2200_QOS |
9763 | ipw_qos_set_tx_queue_command(priv, pri, &(tfd->u.data), unicast); | 10144 | if (fc & IEEE80211_STYPE_QOS_DATA) |
9764 | #endif /* CONFIG_IPW_QOS */ | 10145 | ipw_qos_set_tx_queue_command(priv, pri, &(tfd->u.data)); |
10146 | #endif /* CONFIG_IPW2200_QOS */ | ||
9765 | 10147 | ||
9766 | /* payload */ | 10148 | /* payload */ |
9767 | tfd->u.data.num_chunks = cpu_to_le32(min((u8) (NUM_TFD_CHUNKS - 2), | 10149 | tfd->u.data.num_chunks = cpu_to_le32(min((u8) (NUM_TFD_CHUNKS - 2), |
@@ -9841,12 +10223,12 @@ static int ipw_tx_skb(struct ipw_priv *priv, struct ieee80211_txb *txb, | |||
9841 | static int ipw_net_is_queue_full(struct net_device *dev, int pri) | 10223 | static int ipw_net_is_queue_full(struct net_device *dev, int pri) |
9842 | { | 10224 | { |
9843 | struct ipw_priv *priv = ieee80211_priv(dev); | 10225 | struct ipw_priv *priv = ieee80211_priv(dev); |
9844 | #ifdef CONFIG_IPW_QOS | 10226 | #ifdef CONFIG_IPW2200_QOS |
9845 | int tx_id = ipw_get_tx_queue_number(priv, pri); | 10227 | int tx_id = ipw_get_tx_queue_number(priv, pri); |
9846 | struct clx2_tx_queue *txq = &priv->txq[tx_id]; | 10228 | struct clx2_tx_queue *txq = &priv->txq[tx_id]; |
9847 | #else | 10229 | #else |
9848 | struct clx2_tx_queue *txq = &priv->txq[0]; | 10230 | struct clx2_tx_queue *txq = &priv->txq[0]; |
9849 | #endif /* CONFIG_IPW_QOS */ | 10231 | #endif /* CONFIG_IPW2200_QOS */ |
9850 | 10232 | ||
9851 | if (ipw_queue_space(&txq->q) < txq->q.high_mark) | 10233 | if (ipw_queue_space(&txq->q) < txq->q.high_mark) |
9852 | return 1; | 10234 | return 1; |
@@ -9854,6 +10236,88 @@ static int ipw_net_is_queue_full(struct net_device *dev, int pri) | |||
9854 | return 0; | 10236 | return 0; |
9855 | } | 10237 | } |
9856 | 10238 | ||
10239 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
10240 | static void ipw_handle_promiscuous_tx(struct ipw_priv *priv, | ||
10241 | struct ieee80211_txb *txb) | ||
10242 | { | ||
10243 | struct ieee80211_rx_stats dummystats; | ||
10244 | struct ieee80211_hdr *hdr; | ||
10245 | u8 n; | ||
10246 | u16 filter = priv->prom_priv->filter; | ||
10247 | int hdr_only = 0; | ||
10248 | |||
10249 | if (filter & IPW_PROM_NO_TX) | ||
10250 | return; | ||
10251 | |||
10252 | memset(&dummystats, 0, sizeof(dummystats)); | ||
10253 | |||
10254 | /* Filtering of fragment chains is done agains the first fragment */ | ||
10255 | hdr = (void *)txb->fragments[0]->data; | ||
10256 | if (ieee80211_is_management(hdr->frame_ctl)) { | ||
10257 | if (filter & IPW_PROM_NO_MGMT) | ||
10258 | return; | ||
10259 | if (filter & IPW_PROM_MGMT_HEADER_ONLY) | ||
10260 | hdr_only = 1; | ||
10261 | } else if (ieee80211_is_control(hdr->frame_ctl)) { | ||
10262 | if (filter & IPW_PROM_NO_CTL) | ||
10263 | return; | ||
10264 | if (filter & IPW_PROM_CTL_HEADER_ONLY) | ||
10265 | hdr_only = 1; | ||
10266 | } else if (ieee80211_is_data(hdr->frame_ctl)) { | ||
10267 | if (filter & IPW_PROM_NO_DATA) | ||
10268 | return; | ||
10269 | if (filter & IPW_PROM_DATA_HEADER_ONLY) | ||
10270 | hdr_only = 1; | ||
10271 | } | ||
10272 | |||
10273 | for(n=0; n<txb->nr_frags; ++n) { | ||
10274 | struct sk_buff *src = txb->fragments[n]; | ||
10275 | struct sk_buff *dst; | ||
10276 | struct ieee80211_radiotap_header *rt_hdr; | ||
10277 | int len; | ||
10278 | |||
10279 | if (hdr_only) { | ||
10280 | hdr = (void *)src->data; | ||
10281 | len = ieee80211_get_hdrlen(hdr->frame_ctl); | ||
10282 | } else | ||
10283 | len = src->len; | ||
10284 | |||
10285 | dst = alloc_skb( | ||
10286 | len + IEEE80211_RADIOTAP_HDRLEN, GFP_ATOMIC); | ||
10287 | if (!dst) continue; | ||
10288 | |||
10289 | rt_hdr = (void *)skb_put(dst, sizeof(*rt_hdr)); | ||
10290 | |||
10291 | rt_hdr->it_version = PKTHDR_RADIOTAP_VERSION; | ||
10292 | rt_hdr->it_pad = 0; | ||
10293 | rt_hdr->it_present = 0; /* after all, it's just an idea */ | ||
10294 | rt_hdr->it_present |= (1 << IEEE80211_RADIOTAP_CHANNEL); | ||
10295 | |||
10296 | *(u16*)skb_put(dst, sizeof(u16)) = cpu_to_le16( | ||
10297 | ieee80211chan2mhz(priv->channel)); | ||
10298 | if (priv->channel > 14) /* 802.11a */ | ||
10299 | *(u16*)skb_put(dst, sizeof(u16)) = | ||
10300 | cpu_to_le16(IEEE80211_CHAN_OFDM | | ||
10301 | IEEE80211_CHAN_5GHZ); | ||
10302 | else if (priv->ieee->mode == IEEE_B) /* 802.11b */ | ||
10303 | *(u16*)skb_put(dst, sizeof(u16)) = | ||
10304 | cpu_to_le16(IEEE80211_CHAN_CCK | | ||
10305 | IEEE80211_CHAN_2GHZ); | ||
10306 | else /* 802.11g */ | ||
10307 | *(u16*)skb_put(dst, sizeof(u16)) = | ||
10308 | cpu_to_le16(IEEE80211_CHAN_OFDM | | ||
10309 | IEEE80211_CHAN_2GHZ); | ||
10310 | |||
10311 | rt_hdr->it_len = dst->len; | ||
10312 | |||
10313 | memcpy(skb_put(dst, len), src->data, len); | ||
10314 | |||
10315 | if (!ieee80211_rx(priv->prom_priv->ieee, dst, &dummystats)) | ||
10316 | dev_kfree_skb_any(dst); | ||
10317 | } | ||
10318 | } | ||
10319 | #endif | ||
10320 | |||
9857 | static int ipw_net_hard_start_xmit(struct ieee80211_txb *txb, | 10321 | static int ipw_net_hard_start_xmit(struct ieee80211_txb *txb, |
9858 | struct net_device *dev, int pri) | 10322 | struct net_device *dev, int pri) |
9859 | { | 10323 | { |
@@ -9871,6 +10335,11 @@ static int ipw_net_hard_start_xmit(struct ieee80211_txb *txb, | |||
9871 | goto fail_unlock; | 10335 | goto fail_unlock; |
9872 | } | 10336 | } |
9873 | 10337 | ||
10338 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
10339 | if (rtap_iface && netif_running(priv->prom_net_dev)) | ||
10340 | ipw_handle_promiscuous_tx(priv, txb); | ||
10341 | #endif | ||
10342 | |||
9874 | ret = ipw_tx_skb(priv, txb, pri); | 10343 | ret = ipw_tx_skb(priv, txb, pri); |
9875 | if (ret == NETDEV_TX_OK) | 10344 | if (ret == NETDEV_TX_OK) |
9876 | __ipw_led_activity_on(priv); | 10345 | __ipw_led_activity_on(priv); |
@@ -10169,10 +10638,10 @@ static int ipw_setup_deferred_work(struct ipw_priv *priv) | |||
10169 | INIT_WORK(&priv->merge_networks, | 10638 | INIT_WORK(&priv->merge_networks, |
10170 | (void (*)(void *))ipw_merge_adhoc_network, priv); | 10639 | (void (*)(void *))ipw_merge_adhoc_network, priv); |
10171 | 10640 | ||
10172 | #ifdef CONFIG_IPW_QOS | 10641 | #ifdef CONFIG_IPW2200_QOS |
10173 | INIT_WORK(&priv->qos_activate, (void (*)(void *))ipw_bg_qos_activate, | 10642 | INIT_WORK(&priv->qos_activate, (void (*)(void *))ipw_bg_qos_activate, |
10174 | priv); | 10643 | priv); |
10175 | #endif /* CONFIG_IPW_QOS */ | 10644 | #endif /* CONFIG_IPW2200_QOS */ |
10176 | 10645 | ||
10177 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | 10646 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) |
10178 | ipw_irq_tasklet, (unsigned long)priv); | 10647 | ipw_irq_tasklet, (unsigned long)priv); |
@@ -10318,12 +10787,21 @@ static int ipw_config(struct ipw_priv *priv) | |||
10318 | |= CFG_BT_COEXISTENCE_OOB; | 10787 | |= CFG_BT_COEXISTENCE_OOB; |
10319 | } | 10788 | } |
10320 | 10789 | ||
10790 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
10791 | if (priv->prom_net_dev && netif_running(priv->prom_net_dev)) { | ||
10792 | priv->sys_config.accept_all_data_frames = 1; | ||
10793 | priv->sys_config.accept_non_directed_frames = 1; | ||
10794 | priv->sys_config.accept_all_mgmt_bcpr = 1; | ||
10795 | priv->sys_config.accept_all_mgmt_frames = 1; | ||
10796 | } | ||
10797 | #endif | ||
10798 | |||
10321 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) | 10799 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) |
10322 | priv->sys_config.answer_broadcast_ssid_probe = 1; | 10800 | priv->sys_config.answer_broadcast_ssid_probe = 1; |
10323 | else | 10801 | else |
10324 | priv->sys_config.answer_broadcast_ssid_probe = 0; | 10802 | priv->sys_config.answer_broadcast_ssid_probe = 0; |
10325 | 10803 | ||
10326 | if (ipw_send_system_config(priv, &priv->sys_config)) | 10804 | if (ipw_send_system_config(priv)) |
10327 | goto error; | 10805 | goto error; |
10328 | 10806 | ||
10329 | init_supported_rates(priv, &priv->rates); | 10807 | init_supported_rates(priv, &priv->rates); |
@@ -10335,10 +10813,10 @@ static int ipw_config(struct ipw_priv *priv) | |||
10335 | if (ipw_send_rts_threshold(priv, priv->rts_threshold)) | 10813 | if (ipw_send_rts_threshold(priv, priv->rts_threshold)) |
10336 | goto error; | 10814 | goto error; |
10337 | } | 10815 | } |
10338 | #ifdef CONFIG_IPW_QOS | 10816 | #ifdef CONFIG_IPW2200_QOS |
10339 | IPW_DEBUG_QOS("QoS: call ipw_qos_activate\n"); | 10817 | IPW_DEBUG_QOS("QoS: call ipw_qos_activate\n"); |
10340 | ipw_qos_activate(priv, NULL); | 10818 | ipw_qos_activate(priv, NULL); |
10341 | #endif /* CONFIG_IPW_QOS */ | 10819 | #endif /* CONFIG_IPW2200_QOS */ |
10342 | 10820 | ||
10343 | if (ipw_set_random_seed(priv)) | 10821 | if (ipw_set_random_seed(priv)) |
10344 | goto error; | 10822 | goto error; |
@@ -10639,6 +11117,7 @@ static int ipw_up(struct ipw_priv *priv) | |||
10639 | if (priv->cmdlog == NULL) { | 11117 | if (priv->cmdlog == NULL) { |
10640 | IPW_ERROR("Error allocating %d command log entries.\n", | 11118 | IPW_ERROR("Error allocating %d command log entries.\n", |
10641 | cmdlog); | 11119 | cmdlog); |
11120 | return -ENOMEM; | ||
10642 | } else { | 11121 | } else { |
10643 | memset(priv->cmdlog, 0, sizeof(*priv->cmdlog) * cmdlog); | 11122 | memset(priv->cmdlog, 0, sizeof(*priv->cmdlog) * cmdlog); |
10644 | priv->cmdlog_len = cmdlog; | 11123 | priv->cmdlog_len = cmdlog; |
@@ -10860,6 +11339,10 @@ static struct attribute *ipw_sysfs_entries[] = { | |||
10860 | &dev_attr_led.attr, | 11339 | &dev_attr_led.attr, |
10861 | &dev_attr_speed_scan.attr, | 11340 | &dev_attr_speed_scan.attr, |
10862 | &dev_attr_net_stats.attr, | 11341 | &dev_attr_net_stats.attr, |
11342 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
11343 | &dev_attr_rtap_iface.attr, | ||
11344 | &dev_attr_rtap_filter.attr, | ||
11345 | #endif | ||
10863 | NULL | 11346 | NULL |
10864 | }; | 11347 | }; |
10865 | 11348 | ||
@@ -10868,6 +11351,109 @@ static struct attribute_group ipw_attribute_group = { | |||
10868 | .attrs = ipw_sysfs_entries, | 11351 | .attrs = ipw_sysfs_entries, |
10869 | }; | 11352 | }; |
10870 | 11353 | ||
11354 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
11355 | static int ipw_prom_open(struct net_device *dev) | ||
11356 | { | ||
11357 | struct ipw_prom_priv *prom_priv = ieee80211_priv(dev); | ||
11358 | struct ipw_priv *priv = prom_priv->priv; | ||
11359 | |||
11360 | IPW_DEBUG_INFO("prom dev->open\n"); | ||
11361 | netif_carrier_off(dev); | ||
11362 | netif_stop_queue(dev); | ||
11363 | |||
11364 | if (priv->ieee->iw_mode != IW_MODE_MONITOR) { | ||
11365 | priv->sys_config.accept_all_data_frames = 1; | ||
11366 | priv->sys_config.accept_non_directed_frames = 1; | ||
11367 | priv->sys_config.accept_all_mgmt_bcpr = 1; | ||
11368 | priv->sys_config.accept_all_mgmt_frames = 1; | ||
11369 | |||
11370 | ipw_send_system_config(priv); | ||
11371 | } | ||
11372 | |||
11373 | return 0; | ||
11374 | } | ||
11375 | |||
11376 | static int ipw_prom_stop(struct net_device *dev) | ||
11377 | { | ||
11378 | struct ipw_prom_priv *prom_priv = ieee80211_priv(dev); | ||
11379 | struct ipw_priv *priv = prom_priv->priv; | ||
11380 | |||
11381 | IPW_DEBUG_INFO("prom dev->stop\n"); | ||
11382 | |||
11383 | if (priv->ieee->iw_mode != IW_MODE_MONITOR) { | ||
11384 | priv->sys_config.accept_all_data_frames = 0; | ||
11385 | priv->sys_config.accept_non_directed_frames = 0; | ||
11386 | priv->sys_config.accept_all_mgmt_bcpr = 0; | ||
11387 | priv->sys_config.accept_all_mgmt_frames = 0; | ||
11388 | |||
11389 | ipw_send_system_config(priv); | ||
11390 | } | ||
11391 | |||
11392 | return 0; | ||
11393 | } | ||
11394 | |||
11395 | static int ipw_prom_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) | ||
11396 | { | ||
11397 | IPW_DEBUG_INFO("prom dev->xmit\n"); | ||
11398 | netif_stop_queue(dev); | ||
11399 | return -EOPNOTSUPP; | ||
11400 | } | ||
11401 | |||
11402 | static struct net_device_stats *ipw_prom_get_stats(struct net_device *dev) | ||
11403 | { | ||
11404 | struct ipw_prom_priv *prom_priv = ieee80211_priv(dev); | ||
11405 | return &prom_priv->ieee->stats; | ||
11406 | } | ||
11407 | |||
11408 | static int ipw_prom_alloc(struct ipw_priv *priv) | ||
11409 | { | ||
11410 | int rc = 0; | ||
11411 | |||
11412 | if (priv->prom_net_dev) | ||
11413 | return -EPERM; | ||
11414 | |||
11415 | priv->prom_net_dev = alloc_ieee80211(sizeof(struct ipw_prom_priv)); | ||
11416 | if (priv->prom_net_dev == NULL) | ||
11417 | return -ENOMEM; | ||
11418 | |||
11419 | priv->prom_priv = ieee80211_priv(priv->prom_net_dev); | ||
11420 | priv->prom_priv->ieee = netdev_priv(priv->prom_net_dev); | ||
11421 | priv->prom_priv->priv = priv; | ||
11422 | |||
11423 | strcpy(priv->prom_net_dev->name, "rtap%d"); | ||
11424 | |||
11425 | priv->prom_net_dev->type = ARPHRD_IEEE80211_RADIOTAP; | ||
11426 | priv->prom_net_dev->open = ipw_prom_open; | ||
11427 | priv->prom_net_dev->stop = ipw_prom_stop; | ||
11428 | priv->prom_net_dev->get_stats = ipw_prom_get_stats; | ||
11429 | priv->prom_net_dev->hard_start_xmit = ipw_prom_hard_start_xmit; | ||
11430 | |||
11431 | priv->prom_priv->ieee->iw_mode = IW_MODE_MONITOR; | ||
11432 | |||
11433 | rc = register_netdev(priv->prom_net_dev); | ||
11434 | if (rc) { | ||
11435 | free_ieee80211(priv->prom_net_dev); | ||
11436 | priv->prom_net_dev = NULL; | ||
11437 | return rc; | ||
11438 | } | ||
11439 | |||
11440 | return 0; | ||
11441 | } | ||
11442 | |||
11443 | static void ipw_prom_free(struct ipw_priv *priv) | ||
11444 | { | ||
11445 | if (!priv->prom_net_dev) | ||
11446 | return; | ||
11447 | |||
11448 | unregister_netdev(priv->prom_net_dev); | ||
11449 | free_ieee80211(priv->prom_net_dev); | ||
11450 | |||
11451 | priv->prom_net_dev = NULL; | ||
11452 | } | ||
11453 | |||
11454 | #endif | ||
11455 | |||
11456 | |||
10871 | static int ipw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | 11457 | static int ipw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
10872 | { | 11458 | { |
10873 | int err = 0; | 11459 | int err = 0; |
@@ -10959,11 +11545,12 @@ static int ipw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
10959 | priv->ieee->set_security = shim__set_security; | 11545 | priv->ieee->set_security = shim__set_security; |
10960 | priv->ieee->is_queue_full = ipw_net_is_queue_full; | 11546 | priv->ieee->is_queue_full = ipw_net_is_queue_full; |
10961 | 11547 | ||
10962 | #ifdef CONFIG_IPW_QOS | 11548 | #ifdef CONFIG_IPW2200_QOS |
11549 | priv->ieee->is_qos_active = ipw_is_qos_active; | ||
10963 | priv->ieee->handle_probe_response = ipw_handle_beacon; | 11550 | priv->ieee->handle_probe_response = ipw_handle_beacon; |
10964 | priv->ieee->handle_beacon = ipw_handle_probe_response; | 11551 | priv->ieee->handle_beacon = ipw_handle_probe_response; |
10965 | priv->ieee->handle_assoc_response = ipw_handle_assoc_response; | 11552 | priv->ieee->handle_assoc_response = ipw_handle_assoc_response; |
10966 | #endif /* CONFIG_IPW_QOS */ | 11553 | #endif /* CONFIG_IPW2200_QOS */ |
10967 | 11554 | ||
10968 | priv->ieee->perfect_rssi = -20; | 11555 | priv->ieee->perfect_rssi = -20; |
10969 | priv->ieee->worst_rssi = -85; | 11556 | priv->ieee->worst_rssi = -85; |
@@ -10997,6 +11584,18 @@ static int ipw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
10997 | goto out_remove_sysfs; | 11584 | goto out_remove_sysfs; |
10998 | } | 11585 | } |
10999 | 11586 | ||
11587 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
11588 | if (rtap_iface) { | ||
11589 | err = ipw_prom_alloc(priv); | ||
11590 | if (err) { | ||
11591 | IPW_ERROR("Failed to register promiscuous network " | ||
11592 | "device (error %d).\n", err); | ||
11593 | unregister_netdev(priv->net_dev); | ||
11594 | goto out_remove_sysfs; | ||
11595 | } | ||
11596 | } | ||
11597 | #endif | ||
11598 | |||
11000 | printk(KERN_INFO DRV_NAME ": Detected geography %s (%d 802.11bg " | 11599 | printk(KERN_INFO DRV_NAME ": Detected geography %s (%d 802.11bg " |
11001 | "channels, %d 802.11a channels)\n", | 11600 | "channels, %d 802.11a channels)\n", |
11002 | priv->ieee->geo.name, priv->ieee->geo.bg_channels, | 11601 | priv->ieee->geo.name, priv->ieee->geo.bg_channels, |
@@ -11076,6 +11675,10 @@ static void ipw_pci_remove(struct pci_dev *pdev) | |||
11076 | priv->error = NULL; | 11675 | priv->error = NULL; |
11077 | } | 11676 | } |
11078 | 11677 | ||
11678 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
11679 | ipw_prom_free(priv); | ||
11680 | #endif | ||
11681 | |||
11079 | free_irq(pdev->irq, priv); | 11682 | free_irq(pdev->irq, priv); |
11080 | iounmap(priv->hw_base); | 11683 | iounmap(priv->hw_base); |
11081 | pci_release_regions(pdev); | 11684 | pci_release_regions(pdev); |
@@ -11200,7 +11803,12 @@ MODULE_PARM_DESC(debug, "debug output mask"); | |||
11200 | module_param(channel, int, 0444); | 11803 | module_param(channel, int, 0444); |
11201 | MODULE_PARM_DESC(channel, "channel to limit associate to (default 0 [ANY])"); | 11804 | MODULE_PARM_DESC(channel, "channel to limit associate to (default 0 [ANY])"); |
11202 | 11805 | ||
11203 | #ifdef CONFIG_IPW_QOS | 11806 | #ifdef CONFIG_IPW2200_PROMISCUOUS |
11807 | module_param(rtap_iface, int, 0444); | ||
11808 | MODULE_PARM_DESC(rtap_iface, "create the rtap interface (1 - create, default 0)"); | ||
11809 | #endif | ||
11810 | |||
11811 | #ifdef CONFIG_IPW2200_QOS | ||
11204 | module_param(qos_enable, int, 0444); | 11812 | module_param(qos_enable, int, 0444); |
11205 | MODULE_PARM_DESC(qos_enable, "enable all QoS functionalitis"); | 11813 | MODULE_PARM_DESC(qos_enable, "enable all QoS functionalitis"); |
11206 | 11814 | ||
@@ -11215,7 +11823,7 @@ MODULE_PARM_DESC(burst_duration_CCK, "set CCK burst value"); | |||
11215 | 11823 | ||
11216 | module_param(burst_duration_OFDM, int, 0444); | 11824 | module_param(burst_duration_OFDM, int, 0444); |
11217 | MODULE_PARM_DESC(burst_duration_OFDM, "set OFDM burst value"); | 11825 | MODULE_PARM_DESC(burst_duration_OFDM, "set OFDM burst value"); |
11218 | #endif /* CONFIG_IPW_QOS */ | 11826 | #endif /* CONFIG_IPW2200_QOS */ |
11219 | 11827 | ||
11220 | #ifdef CONFIG_IPW2200_MONITOR | 11828 | #ifdef CONFIG_IPW2200_MONITOR |
11221 | module_param(mode, int, 0444); | 11829 | module_param(mode, int, 0444); |
@@ -11238,5 +11846,8 @@ MODULE_PARM_DESC(cmdlog, | |||
11238 | module_param(roaming, int, 0444); | 11846 | module_param(roaming, int, 0444); |
11239 | MODULE_PARM_DESC(roaming, "enable roaming support (default on)"); | 11847 | MODULE_PARM_DESC(roaming, "enable roaming support (default on)"); |
11240 | 11848 | ||
11849 | module_param(antenna, int, 0444); | ||
11850 | MODULE_PARM_DESC(antenna, "select antenna 1=Main, 3=Aux, default 0 [both], 2=slow_diversity (choose the one with lower background noise)"); | ||
11851 | |||
11241 | module_exit(ipw_exit); | 11852 | module_exit(ipw_exit); |
11242 | module_init(ipw_init); | 11853 | module_init(ipw_init); |
diff --git a/drivers/net/wireless/ipw2200.h b/drivers/net/wireless/ipw2200.h index 4b9804900702..6044c0be2c80 100644 --- a/drivers/net/wireless/ipw2200.h +++ b/drivers/net/wireless/ipw2200.h | |||
@@ -789,7 +789,7 @@ struct ipw_sys_config { | |||
789 | u8 bt_coexist_collision_thr; | 789 | u8 bt_coexist_collision_thr; |
790 | u8 silence_threshold; | 790 | u8 silence_threshold; |
791 | u8 accept_all_mgmt_bcpr; | 791 | u8 accept_all_mgmt_bcpr; |
792 | u8 accept_all_mgtm_frames; | 792 | u8 accept_all_mgmt_frames; |
793 | u8 pass_noise_stats_to_host; | 793 | u8 pass_noise_stats_to_host; |
794 | u8 reserved3; | 794 | u8 reserved3; |
795 | } __attribute__ ((packed)); | 795 | } __attribute__ ((packed)); |
@@ -1122,6 +1122,52 @@ struct ipw_fw_error { | |||
1122 | u8 payload[0]; | 1122 | u8 payload[0]; |
1123 | } __attribute__ ((packed)); | 1123 | } __attribute__ ((packed)); |
1124 | 1124 | ||
1125 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
1126 | |||
1127 | enum ipw_prom_filter { | ||
1128 | IPW_PROM_CTL_HEADER_ONLY = (1 << 0), | ||
1129 | IPW_PROM_MGMT_HEADER_ONLY = (1 << 1), | ||
1130 | IPW_PROM_DATA_HEADER_ONLY = (1 << 2), | ||
1131 | IPW_PROM_ALL_HEADER_ONLY = 0xf, /* bits 0..3 */ | ||
1132 | IPW_PROM_NO_TX = (1 << 4), | ||
1133 | IPW_PROM_NO_RX = (1 << 5), | ||
1134 | IPW_PROM_NO_CTL = (1 << 6), | ||
1135 | IPW_PROM_NO_MGMT = (1 << 7), | ||
1136 | IPW_PROM_NO_DATA = (1 << 8), | ||
1137 | }; | ||
1138 | |||
1139 | struct ipw_priv; | ||
1140 | struct ipw_prom_priv { | ||
1141 | struct ipw_priv *priv; | ||
1142 | struct ieee80211_device *ieee; | ||
1143 | enum ipw_prom_filter filter; | ||
1144 | int tx_packets; | ||
1145 | int rx_packets; | ||
1146 | }; | ||
1147 | #endif | ||
1148 | |||
1149 | #if defined(CONFIG_IPW2200_RADIOTAP) || defined(CONFIG_IPW2200_PROMISCUOUS) | ||
1150 | /* Magic struct that slots into the radiotap header -- no reason | ||
1151 | * to build this manually element by element, we can write it much | ||
1152 | * more efficiently than we can parse it. ORDER MATTERS HERE | ||
1153 | * | ||
1154 | * When sent to us via the simulated Rx interface in sysfs, the entire | ||
1155 | * structure is provided regardless of any bits unset. | ||
1156 | */ | ||
1157 | struct ipw_rt_hdr { | ||
1158 | struct ieee80211_radiotap_header rt_hdr; | ||
1159 | u64 rt_tsf; /* TSF */ | ||
1160 | u8 rt_flags; /* radiotap packet flags */ | ||
1161 | u8 rt_rate; /* rate in 500kb/s */ | ||
1162 | u16 rt_channel; /* channel in mhz */ | ||
1163 | u16 rt_chbitmask; /* channel bitfield */ | ||
1164 | s8 rt_dbmsignal; /* signal in dbM, kluged to signed */ | ||
1165 | s8 rt_dbmnoise; | ||
1166 | u8 rt_antenna; /* antenna number */ | ||
1167 | u8 payload[0]; /* payload... */ | ||
1168 | } __attribute__ ((packed)); | ||
1169 | #endif | ||
1170 | |||
1125 | struct ipw_priv { | 1171 | struct ipw_priv { |
1126 | /* ieee device used by generic ieee processing code */ | 1172 | /* ieee device used by generic ieee processing code */ |
1127 | struct ieee80211_device *ieee; | 1173 | struct ieee80211_device *ieee; |
@@ -1133,6 +1179,12 @@ struct ipw_priv { | |||
1133 | struct pci_dev *pci_dev; | 1179 | struct pci_dev *pci_dev; |
1134 | struct net_device *net_dev; | 1180 | struct net_device *net_dev; |
1135 | 1181 | ||
1182 | #ifdef CONFIG_IPW2200_PROMISCUOUS | ||
1183 | /* Promiscuous mode */ | ||
1184 | struct ipw_prom_priv *prom_priv; | ||
1185 | struct net_device *prom_net_dev; | ||
1186 | #endif | ||
1187 | |||
1136 | /* pci hardware address support */ | 1188 | /* pci hardware address support */ |
1137 | void __iomem *hw_base; | 1189 | void __iomem *hw_base; |
1138 | unsigned long hw_len; | 1190 | unsigned long hw_len; |
@@ -1153,11 +1205,9 @@ struct ipw_priv { | |||
1153 | u32 config; | 1205 | u32 config; |
1154 | u32 capability; | 1206 | u32 capability; |
1155 | 1207 | ||
1156 | u8 last_rx_rssi; | ||
1157 | u8 last_noise; | ||
1158 | struct average average_missed_beacons; | 1208 | struct average average_missed_beacons; |
1159 | struct average average_rssi; | 1209 | s16 exp_avg_rssi; |
1160 | struct average average_noise; | 1210 | s16 exp_avg_noise; |
1161 | u32 port_type; | 1211 | u32 port_type; |
1162 | int rx_bufs_min; /**< minimum number of bufs in Rx queue */ | 1212 | int rx_bufs_min; /**< minimum number of bufs in Rx queue */ |
1163 | int rx_pend_max; /**< maximum pending buffers for one IRQ */ | 1213 | int rx_pend_max; /**< maximum pending buffers for one IRQ */ |
@@ -1308,6 +1358,29 @@ struct ipw_priv { | |||
1308 | 1358 | ||
1309 | /* debug macros */ | 1359 | /* debug macros */ |
1310 | 1360 | ||
1361 | /* Debug and printf string expansion helpers for printing bitfields */ | ||
1362 | #define BIT_FMT8 "%c%c%c%c-%c%c%c%c" | ||
1363 | #define BIT_FMT16 BIT_FMT8 ":" BIT_FMT8 | ||
1364 | #define BIT_FMT32 BIT_FMT16 " " BIT_FMT16 | ||
1365 | |||
1366 | #define BITC(x,y) (((x>>y)&1)?'1':'0') | ||
1367 | #define BIT_ARG8(x) \ | ||
1368 | BITC(x,7),BITC(x,6),BITC(x,5),BITC(x,4),\ | ||
1369 | BITC(x,3),BITC(x,2),BITC(x,1),BITC(x,0) | ||
1370 | |||
1371 | #define BIT_ARG16(x) \ | ||
1372 | BITC(x,15),BITC(x,14),BITC(x,13),BITC(x,12),\ | ||
1373 | BITC(x,11),BITC(x,10),BITC(x,9),BITC(x,8),\ | ||
1374 | BIT_ARG8(x) | ||
1375 | |||
1376 | #define BIT_ARG32(x) \ | ||
1377 | BITC(x,31),BITC(x,30),BITC(x,29),BITC(x,28),\ | ||
1378 | BITC(x,27),BITC(x,26),BITC(x,25),BITC(x,24),\ | ||
1379 | BITC(x,23),BITC(x,22),BITC(x,21),BITC(x,20),\ | ||
1380 | BITC(x,19),BITC(x,18),BITC(x,17),BITC(x,16),\ | ||
1381 | BIT_ARG16(x) | ||
1382 | |||
1383 | |||
1311 | #ifdef CONFIG_IPW2200_DEBUG | 1384 | #ifdef CONFIG_IPW2200_DEBUG |
1312 | #define IPW_DEBUG(level, fmt, args...) \ | 1385 | #define IPW_DEBUG(level, fmt, args...) \ |
1313 | do { if (ipw_debug_level & (level)) \ | 1386 | do { if (ipw_debug_level & (level)) \ |
diff --git a/drivers/net/wireless/orinoco.c b/drivers/net/wireless/orinoco.c index c2d0b09e0418..8a31b591a901 100644 --- a/drivers/net/wireless/orinoco.c +++ b/drivers/net/wireless/orinoco.c | |||
@@ -201,41 +201,12 @@ static struct { | |||
201 | /* Data types */ | 201 | /* Data types */ |
202 | /********************************************************************/ | 202 | /********************************************************************/ |
203 | 203 | ||
204 | /* Used in Event handling. | 204 | /* Beginning of the Tx descriptor, used in TxExc handling */ |
205 | * We avoid nested structures as they break on ARM -- Moustafa */ | 205 | struct hermes_txexc_data { |
206 | struct hermes_tx_descriptor_802_11 { | 206 | struct hermes_tx_descriptor desc; |
207 | /* hermes_tx_descriptor */ | ||
208 | __le16 status; | ||
209 | __le16 reserved1; | ||
210 | __le16 reserved2; | ||
211 | __le32 sw_support; | ||
212 | u8 retry_count; | ||
213 | u8 tx_rate; | ||
214 | __le16 tx_control; | ||
215 | |||
216 | /* ieee80211_hdr */ | ||
217 | __le16 frame_ctl; | 207 | __le16 frame_ctl; |
218 | __le16 duration_id; | 208 | __le16 duration_id; |
219 | u8 addr1[ETH_ALEN]; | 209 | u8 addr1[ETH_ALEN]; |
220 | u8 addr2[ETH_ALEN]; | ||
221 | u8 addr3[ETH_ALEN]; | ||
222 | __le16 seq_ctl; | ||
223 | u8 addr4[ETH_ALEN]; | ||
224 | |||
225 | __le16 data_len; | ||
226 | |||
227 | /* ethhdr */ | ||
228 | u8 h_dest[ETH_ALEN]; /* destination eth addr */ | ||
229 | u8 h_source[ETH_ALEN]; /* source ether addr */ | ||
230 | __be16 h_proto; /* packet type ID field */ | ||
231 | |||
232 | /* p8022_hdr */ | ||
233 | u8 dsap; | ||
234 | u8 ssap; | ||
235 | u8 ctrl; | ||
236 | u8 oui[3]; | ||
237 | |||
238 | __be16 ethertype; | ||
239 | } __attribute__ ((packed)); | 210 | } __attribute__ ((packed)); |
240 | 211 | ||
241 | /* Rx frame header except compatibility 802.3 header */ | 212 | /* Rx frame header except compatibility 802.3 header */ |
@@ -450,53 +421,39 @@ static int orinoco_xmit(struct sk_buff *skb, struct net_device *dev) | |||
450 | hermes_t *hw = &priv->hw; | 421 | hermes_t *hw = &priv->hw; |
451 | int err = 0; | 422 | int err = 0; |
452 | u16 txfid = priv->txfid; | 423 | u16 txfid = priv->txfid; |
453 | char *p; | ||
454 | struct ethhdr *eh; | 424 | struct ethhdr *eh; |
455 | int len, data_len, data_off; | 425 | int data_off; |
456 | struct hermes_tx_descriptor desc; | 426 | struct hermes_tx_descriptor desc; |
457 | unsigned long flags; | 427 | unsigned long flags; |
458 | 428 | ||
459 | TRACE_ENTER(dev->name); | ||
460 | |||
461 | if (! netif_running(dev)) { | 429 | if (! netif_running(dev)) { |
462 | printk(KERN_ERR "%s: Tx on stopped device!\n", | 430 | printk(KERN_ERR "%s: Tx on stopped device!\n", |
463 | dev->name); | 431 | dev->name); |
464 | TRACE_EXIT(dev->name); | 432 | return NETDEV_TX_BUSY; |
465 | return 1; | ||
466 | } | 433 | } |
467 | 434 | ||
468 | if (netif_queue_stopped(dev)) { | 435 | if (netif_queue_stopped(dev)) { |
469 | printk(KERN_DEBUG "%s: Tx while transmitter busy!\n", | 436 | printk(KERN_DEBUG "%s: Tx while transmitter busy!\n", |
470 | dev->name); | 437 | dev->name); |
471 | TRACE_EXIT(dev->name); | 438 | return NETDEV_TX_BUSY; |
472 | return 1; | ||
473 | } | 439 | } |
474 | 440 | ||
475 | if (orinoco_lock(priv, &flags) != 0) { | 441 | if (orinoco_lock(priv, &flags) != 0) { |
476 | printk(KERN_ERR "%s: orinoco_xmit() called while hw_unavailable\n", | 442 | printk(KERN_ERR "%s: orinoco_xmit() called while hw_unavailable\n", |
477 | dev->name); | 443 | dev->name); |
478 | TRACE_EXIT(dev->name); | 444 | return NETDEV_TX_BUSY; |
479 | return 1; | ||
480 | } | 445 | } |
481 | 446 | ||
482 | if (! netif_carrier_ok(dev) || (priv->iw_mode == IW_MODE_MONITOR)) { | 447 | if (! netif_carrier_ok(dev) || (priv->iw_mode == IW_MODE_MONITOR)) { |
483 | /* Oops, the firmware hasn't established a connection, | 448 | /* Oops, the firmware hasn't established a connection, |
484 | silently drop the packet (this seems to be the | 449 | silently drop the packet (this seems to be the |
485 | safest approach). */ | 450 | safest approach). */ |
486 | stats->tx_errors++; | 451 | goto drop; |
487 | orinoco_unlock(priv, &flags); | ||
488 | dev_kfree_skb(skb); | ||
489 | TRACE_EXIT(dev->name); | ||
490 | return 0; | ||
491 | } | 452 | } |
492 | 453 | ||
493 | /* Length of the packet body */ | 454 | /* Check packet length */ |
494 | /* FIXME: what if the skb is smaller than this? */ | 455 | if (skb->len < ETH_HLEN) |
495 | len = max_t(int, ALIGN(skb->len, 2), ETH_ZLEN); | 456 | goto drop; |
496 | skb = skb_padto(skb, len); | ||
497 | if (skb == NULL) | ||
498 | goto fail; | ||
499 | len -= ETH_HLEN; | ||
500 | 457 | ||
501 | eh = (struct ethhdr *)skb->data; | 458 | eh = (struct ethhdr *)skb->data; |
502 | 459 | ||
@@ -507,8 +464,7 @@ static int orinoco_xmit(struct sk_buff *skb, struct net_device *dev) | |||
507 | if (net_ratelimit()) | 464 | if (net_ratelimit()) |
508 | printk(KERN_ERR "%s: Error %d writing Tx descriptor " | 465 | printk(KERN_ERR "%s: Error %d writing Tx descriptor " |
509 | "to BAP\n", dev->name, err); | 466 | "to BAP\n", dev->name, err); |
510 | stats->tx_errors++; | 467 | goto busy; |
511 | goto fail; | ||
512 | } | 468 | } |
513 | 469 | ||
514 | /* Clear the 802.11 header and data length fields - some | 470 | /* Clear the 802.11 header and data length fields - some |
@@ -519,50 +475,38 @@ static int orinoco_xmit(struct sk_buff *skb, struct net_device *dev) | |||
519 | 475 | ||
520 | /* Encapsulate Ethernet-II frames */ | 476 | /* Encapsulate Ethernet-II frames */ |
521 | if (ntohs(eh->h_proto) > ETH_DATA_LEN) { /* Ethernet-II frame */ | 477 | if (ntohs(eh->h_proto) > ETH_DATA_LEN) { /* Ethernet-II frame */ |
522 | struct header_struct hdr; | 478 | struct header_struct { |
523 | data_len = len; | 479 | struct ethhdr eth; /* 802.3 header */ |
524 | data_off = HERMES_802_3_OFFSET + sizeof(hdr); | 480 | u8 encap[6]; /* 802.2 header */ |
525 | p = skb->data + ETH_HLEN; | 481 | } __attribute__ ((packed)) hdr; |
526 | 482 | ||
527 | /* 802.3 header */ | 483 | /* Strip destination and source from the data */ |
528 | memcpy(hdr.dest, eh->h_dest, ETH_ALEN); | 484 | skb_pull(skb, 2 * ETH_ALEN); |
529 | memcpy(hdr.src, eh->h_source, ETH_ALEN); | 485 | data_off = HERMES_802_2_OFFSET + sizeof(encaps_hdr); |
530 | hdr.len = htons(data_len + ENCAPS_OVERHEAD); | 486 | |
531 | 487 | /* And move them to a separate header */ | |
532 | /* 802.2 header */ | 488 | memcpy(&hdr.eth, eh, 2 * ETH_ALEN); |
533 | memcpy(&hdr.dsap, &encaps_hdr, sizeof(encaps_hdr)); | 489 | hdr.eth.h_proto = htons(sizeof(encaps_hdr) + skb->len); |
534 | 490 | memcpy(hdr.encap, encaps_hdr, sizeof(encaps_hdr)); | |
535 | hdr.ethertype = eh->h_proto; | 491 | |
536 | err = hermes_bap_pwrite(hw, USER_BAP, &hdr, sizeof(hdr), | 492 | err = hermes_bap_pwrite(hw, USER_BAP, &hdr, sizeof(hdr), |
537 | txfid, HERMES_802_3_OFFSET); | 493 | txfid, HERMES_802_3_OFFSET); |
538 | if (err) { | 494 | if (err) { |
539 | if (net_ratelimit()) | 495 | if (net_ratelimit()) |
540 | printk(KERN_ERR "%s: Error %d writing packet " | 496 | printk(KERN_ERR "%s: Error %d writing packet " |
541 | "header to BAP\n", dev->name, err); | 497 | "header to BAP\n", dev->name, err); |
542 | stats->tx_errors++; | 498 | goto busy; |
543 | goto fail; | ||
544 | } | 499 | } |
545 | /* Actual xfer length - allow for padding */ | ||
546 | len = ALIGN(data_len, 2); | ||
547 | if (len < ETH_ZLEN - ETH_HLEN) | ||
548 | len = ETH_ZLEN - ETH_HLEN; | ||
549 | } else { /* IEEE 802.3 frame */ | 500 | } else { /* IEEE 802.3 frame */ |
550 | data_len = len + ETH_HLEN; | ||
551 | data_off = HERMES_802_3_OFFSET; | 501 | data_off = HERMES_802_3_OFFSET; |
552 | p = skb->data; | ||
553 | /* Actual xfer length - round up for odd length packets */ | ||
554 | len = ALIGN(data_len, 2); | ||
555 | if (len < ETH_ZLEN) | ||
556 | len = ETH_ZLEN; | ||
557 | } | 502 | } |
558 | 503 | ||
559 | err = hermes_bap_pwrite_pad(hw, USER_BAP, p, data_len, len, | 504 | err = hermes_bap_pwrite(hw, USER_BAP, skb->data, skb->len, |
560 | txfid, data_off); | 505 | txfid, data_off); |
561 | if (err) { | 506 | if (err) { |
562 | printk(KERN_ERR "%s: Error %d writing packet to BAP\n", | 507 | printk(KERN_ERR "%s: Error %d writing packet to BAP\n", |
563 | dev->name, err); | 508 | dev->name, err); |
564 | stats->tx_errors++; | 509 | goto busy; |
565 | goto fail; | ||
566 | } | 510 | } |
567 | 511 | ||
568 | /* Finally, we actually initiate the send */ | 512 | /* Finally, we actually initiate the send */ |
@@ -575,25 +519,27 @@ static int orinoco_xmit(struct sk_buff *skb, struct net_device *dev) | |||
575 | if (net_ratelimit()) | 519 | if (net_ratelimit()) |
576 | printk(KERN_ERR "%s: Error %d transmitting packet\n", | 520 | printk(KERN_ERR "%s: Error %d transmitting packet\n", |
577 | dev->name, err); | 521 | dev->name, err); |
578 | stats->tx_errors++; | 522 | goto busy; |
579 | goto fail; | ||
580 | } | 523 | } |
581 | 524 | ||
582 | dev->trans_start = jiffies; | 525 | dev->trans_start = jiffies; |
583 | stats->tx_bytes += data_off + data_len; | 526 | stats->tx_bytes += data_off + skb->len; |
527 | goto ok; | ||
584 | 528 | ||
585 | orinoco_unlock(priv, &flags); | 529 | drop: |
530 | stats->tx_errors++; | ||
531 | stats->tx_dropped++; | ||
586 | 532 | ||
533 | ok: | ||
534 | orinoco_unlock(priv, &flags); | ||
587 | dev_kfree_skb(skb); | 535 | dev_kfree_skb(skb); |
536 | return NETDEV_TX_OK; | ||
588 | 537 | ||
589 | TRACE_EXIT(dev->name); | 538 | busy: |
590 | 539 | if (err == -EIO) | |
591 | return 0; | 540 | schedule_work(&priv->reset_work); |
592 | fail: | ||
593 | TRACE_EXIT(dev->name); | ||
594 | |||
595 | orinoco_unlock(priv, &flags); | 541 | orinoco_unlock(priv, &flags); |
596 | return err; | 542 | return NETDEV_TX_BUSY; |
597 | } | 543 | } |
598 | 544 | ||
599 | static void __orinoco_ev_alloc(struct net_device *dev, hermes_t *hw) | 545 | static void __orinoco_ev_alloc(struct net_device *dev, hermes_t *hw) |
@@ -629,7 +575,7 @@ static void __orinoco_ev_txexc(struct net_device *dev, hermes_t *hw) | |||
629 | struct net_device_stats *stats = &priv->stats; | 575 | struct net_device_stats *stats = &priv->stats; |
630 | u16 fid = hermes_read_regn(hw, TXCOMPLFID); | 576 | u16 fid = hermes_read_regn(hw, TXCOMPLFID); |
631 | u16 status; | 577 | u16 status; |
632 | struct hermes_tx_descriptor_802_11 hdr; | 578 | struct hermes_txexc_data hdr; |
633 | int err = 0; | 579 | int err = 0; |
634 | 580 | ||
635 | if (fid == DUMMY_FID) | 581 | if (fid == DUMMY_FID) |
@@ -637,8 +583,7 @@ static void __orinoco_ev_txexc(struct net_device *dev, hermes_t *hw) | |||
637 | 583 | ||
638 | /* Read part of the frame header - we need status and addr1 */ | 584 | /* Read part of the frame header - we need status and addr1 */ |
639 | err = hermes_bap_pread(hw, IRQ_BAP, &hdr, | 585 | err = hermes_bap_pread(hw, IRQ_BAP, &hdr, |
640 | offsetof(struct hermes_tx_descriptor_802_11, | 586 | sizeof(struct hermes_txexc_data), |
641 | addr2), | ||
642 | fid, 0); | 587 | fid, 0); |
643 | 588 | ||
644 | hermes_write_regn(hw, TXCOMPLFID, DUMMY_FID); | 589 | hermes_write_regn(hw, TXCOMPLFID, DUMMY_FID); |
@@ -658,7 +603,7 @@ static void __orinoco_ev_txexc(struct net_device *dev, hermes_t *hw) | |||
658 | * exceeded, because that's the only status that really mean | 603 | * exceeded, because that's the only status that really mean |
659 | * that this particular node went away. | 604 | * that this particular node went away. |
660 | * Other errors means that *we* screwed up. - Jean II */ | 605 | * Other errors means that *we* screwed up. - Jean II */ |
661 | status = le16_to_cpu(hdr.status); | 606 | status = le16_to_cpu(hdr.desc.status); |
662 | if (status & (HERMES_TXSTAT_RETRYERR | HERMES_TXSTAT_AGEDERR)) { | 607 | if (status & (HERMES_TXSTAT_RETRYERR | HERMES_TXSTAT_AGEDERR)) { |
663 | union iwreq_data wrqu; | 608 | union iwreq_data wrqu; |
664 | 609 | ||
@@ -1398,16 +1343,12 @@ int __orinoco_down(struct net_device *dev) | |||
1398 | return 0; | 1343 | return 0; |
1399 | } | 1344 | } |
1400 | 1345 | ||
1401 | int orinoco_reinit_firmware(struct net_device *dev) | 1346 | static int orinoco_allocate_fid(struct net_device *dev) |
1402 | { | 1347 | { |
1403 | struct orinoco_private *priv = netdev_priv(dev); | 1348 | struct orinoco_private *priv = netdev_priv(dev); |
1404 | struct hermes *hw = &priv->hw; | 1349 | struct hermes *hw = &priv->hw; |
1405 | int err; | 1350 | int err; |
1406 | 1351 | ||
1407 | err = hermes_init(hw); | ||
1408 | if (err) | ||
1409 | return err; | ||
1410 | |||
1411 | err = hermes_allocate(hw, priv->nicbuf_size, &priv->txfid); | 1352 | err = hermes_allocate(hw, priv->nicbuf_size, &priv->txfid); |
1412 | if (err == -EIO && priv->nicbuf_size > TX_NICBUF_SIZE_BUG) { | 1353 | if (err == -EIO && priv->nicbuf_size > TX_NICBUF_SIZE_BUG) { |
1413 | /* Try workaround for old Symbol firmware bug */ | 1354 | /* Try workaround for old Symbol firmware bug */ |
@@ -1426,6 +1367,19 @@ int orinoco_reinit_firmware(struct net_device *dev) | |||
1426 | return err; | 1367 | return err; |
1427 | } | 1368 | } |
1428 | 1369 | ||
1370 | int orinoco_reinit_firmware(struct net_device *dev) | ||
1371 | { | ||
1372 | struct orinoco_private *priv = netdev_priv(dev); | ||
1373 | struct hermes *hw = &priv->hw; | ||
1374 | int err; | ||
1375 | |||
1376 | err = hermes_init(hw); | ||
1377 | if (!err) | ||
1378 | err = orinoco_allocate_fid(dev); | ||
1379 | |||
1380 | return err; | ||
1381 | } | ||
1382 | |||
1429 | static int __orinoco_hw_set_bitrate(struct orinoco_private *priv) | 1383 | static int __orinoco_hw_set_bitrate(struct orinoco_private *priv) |
1430 | { | 1384 | { |
1431 | hermes_t *hw = &priv->hw; | 1385 | hermes_t *hw = &priv->hw; |
@@ -1833,7 +1787,9 @@ static int __orinoco_program_rids(struct net_device *dev) | |||
1833 | /* Set promiscuity / multicast*/ | 1787 | /* Set promiscuity / multicast*/ |
1834 | priv->promiscuous = 0; | 1788 | priv->promiscuous = 0; |
1835 | priv->mc_count = 0; | 1789 | priv->mc_count = 0; |
1836 | __orinoco_set_multicast_list(dev); /* FIXME: what about the xmit_lock */ | 1790 | |
1791 | /* FIXME: what about netif_tx_lock */ | ||
1792 | __orinoco_set_multicast_list(dev); | ||
1837 | 1793 | ||
1838 | return 0; | 1794 | return 0; |
1839 | } | 1795 | } |
@@ -2272,14 +2228,12 @@ static int orinoco_init(struct net_device *dev) | |||
2272 | u16 reclen; | 2228 | u16 reclen; |
2273 | int len; | 2229 | int len; |
2274 | 2230 | ||
2275 | TRACE_ENTER(dev->name); | ||
2276 | |||
2277 | /* No need to lock, the hw_unavailable flag is already set in | 2231 | /* No need to lock, the hw_unavailable flag is already set in |
2278 | * alloc_orinocodev() */ | 2232 | * alloc_orinocodev() */ |
2279 | priv->nicbuf_size = IEEE80211_FRAME_LEN + ETH_HLEN; | 2233 | priv->nicbuf_size = IEEE80211_FRAME_LEN + ETH_HLEN; |
2280 | 2234 | ||
2281 | /* Initialize the firmware */ | 2235 | /* Initialize the firmware */ |
2282 | err = orinoco_reinit_firmware(dev); | 2236 | err = hermes_init(hw); |
2283 | if (err != 0) { | 2237 | if (err != 0) { |
2284 | printk(KERN_ERR "%s: failed to initialize firmware (err = %d)\n", | 2238 | printk(KERN_ERR "%s: failed to initialize firmware (err = %d)\n", |
2285 | dev->name, err); | 2239 | dev->name, err); |
@@ -2337,6 +2291,13 @@ static int orinoco_init(struct net_device *dev) | |||
2337 | 2291 | ||
2338 | printk(KERN_DEBUG "%s: Station name \"%s\"\n", dev->name, priv->nick); | 2292 | printk(KERN_DEBUG "%s: Station name \"%s\"\n", dev->name, priv->nick); |
2339 | 2293 | ||
2294 | err = orinoco_allocate_fid(dev); | ||
2295 | if (err) { | ||
2296 | printk(KERN_ERR "%s: failed to allocate NIC buffer!\n", | ||
2297 | dev->name); | ||
2298 | goto out; | ||
2299 | } | ||
2300 | |||
2340 | /* Get allowed channels */ | 2301 | /* Get allowed channels */ |
2341 | err = hermes_read_wordrec(hw, USER_BAP, HERMES_RID_CHANNELLIST, | 2302 | err = hermes_read_wordrec(hw, USER_BAP, HERMES_RID_CHANNELLIST, |
2342 | &priv->channel_mask); | 2303 | &priv->channel_mask); |
@@ -2427,7 +2388,6 @@ static int orinoco_init(struct net_device *dev) | |||
2427 | printk(KERN_DEBUG "%s: ready\n", dev->name); | 2388 | printk(KERN_DEBUG "%s: ready\n", dev->name); |
2428 | 2389 | ||
2429 | out: | 2390 | out: |
2430 | TRACE_EXIT(dev->name); | ||
2431 | return err; | 2391 | return err; |
2432 | } | 2392 | } |
2433 | 2393 | ||
@@ -2795,8 +2755,6 @@ static int orinoco_ioctl_getiwrange(struct net_device *dev, | |||
2795 | int numrates; | 2755 | int numrates; |
2796 | int i, k; | 2756 | int i, k; |
2797 | 2757 | ||
2798 | TRACE_ENTER(dev->name); | ||
2799 | |||
2800 | rrq->length = sizeof(struct iw_range); | 2758 | rrq->length = sizeof(struct iw_range); |
2801 | memset(range, 0, sizeof(struct iw_range)); | 2759 | memset(range, 0, sizeof(struct iw_range)); |
2802 | 2760 | ||
@@ -2886,8 +2844,6 @@ static int orinoco_ioctl_getiwrange(struct net_device *dev, | |||
2886 | IW_EVENT_CAPA_SET(range->event_capa, SIOCGIWSCAN); | 2844 | IW_EVENT_CAPA_SET(range->event_capa, SIOCGIWSCAN); |
2887 | IW_EVENT_CAPA_SET(range->event_capa, IWEVTXDROP); | 2845 | IW_EVENT_CAPA_SET(range->event_capa, IWEVTXDROP); |
2888 | 2846 | ||
2889 | TRACE_EXIT(dev->name); | ||
2890 | |||
2891 | return 0; | 2847 | return 0; |
2892 | } | 2848 | } |
2893 | 2849 | ||
@@ -3069,8 +3025,6 @@ static int orinoco_ioctl_getessid(struct net_device *dev, | |||
3069 | int err = 0; | 3025 | int err = 0; |
3070 | unsigned long flags; | 3026 | unsigned long flags; |
3071 | 3027 | ||
3072 | TRACE_ENTER(dev->name); | ||
3073 | |||
3074 | if (netif_running(dev)) { | 3028 | if (netif_running(dev)) { |
3075 | err = orinoco_hw_get_essid(priv, &active, essidbuf); | 3029 | err = orinoco_hw_get_essid(priv, &active, essidbuf); |
3076 | if (err) | 3030 | if (err) |
@@ -3085,8 +3039,6 @@ static int orinoco_ioctl_getessid(struct net_device *dev, | |||
3085 | erq->flags = 1; | 3039 | erq->flags = 1; |
3086 | erq->length = strlen(essidbuf) + 1; | 3040 | erq->length = strlen(essidbuf) + 1; |
3087 | 3041 | ||
3088 | TRACE_EXIT(dev->name); | ||
3089 | |||
3090 | return 0; | 3042 | return 0; |
3091 | } | 3043 | } |
3092 | 3044 | ||
@@ -4347,69 +4299,6 @@ static struct ethtool_ops orinoco_ethtool_ops = { | |||
4347 | }; | 4299 | }; |
4348 | 4300 | ||
4349 | /********************************************************************/ | 4301 | /********************************************************************/ |
4350 | /* Debugging */ | ||
4351 | /********************************************************************/ | ||
4352 | |||
4353 | #if 0 | ||
4354 | static void show_rx_frame(struct orinoco_rxframe_hdr *frame) | ||
4355 | { | ||
4356 | printk(KERN_DEBUG "RX descriptor:\n"); | ||
4357 | printk(KERN_DEBUG " status = 0x%04x\n", frame->desc.status); | ||
4358 | printk(KERN_DEBUG " time = 0x%08x\n", frame->desc.time); | ||
4359 | printk(KERN_DEBUG " silence = 0x%02x\n", frame->desc.silence); | ||
4360 | printk(KERN_DEBUG " signal = 0x%02x\n", frame->desc.signal); | ||
4361 | printk(KERN_DEBUG " rate = 0x%02x\n", frame->desc.rate); | ||
4362 | printk(KERN_DEBUG " rxflow = 0x%02x\n", frame->desc.rxflow); | ||
4363 | printk(KERN_DEBUG " reserved = 0x%08x\n", frame->desc.reserved); | ||
4364 | |||
4365 | printk(KERN_DEBUG "IEEE 802.11 header:\n"); | ||
4366 | printk(KERN_DEBUG " frame_ctl = 0x%04x\n", | ||
4367 | frame->p80211.frame_ctl); | ||
4368 | printk(KERN_DEBUG " duration_id = 0x%04x\n", | ||
4369 | frame->p80211.duration_id); | ||
4370 | printk(KERN_DEBUG " addr1 = %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
4371 | frame->p80211.addr1[0], frame->p80211.addr1[1], | ||
4372 | frame->p80211.addr1[2], frame->p80211.addr1[3], | ||
4373 | frame->p80211.addr1[4], frame->p80211.addr1[5]); | ||
4374 | printk(KERN_DEBUG " addr2 = %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
4375 | frame->p80211.addr2[0], frame->p80211.addr2[1], | ||
4376 | frame->p80211.addr2[2], frame->p80211.addr2[3], | ||
4377 | frame->p80211.addr2[4], frame->p80211.addr2[5]); | ||
4378 | printk(KERN_DEBUG " addr3 = %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
4379 | frame->p80211.addr3[0], frame->p80211.addr3[1], | ||
4380 | frame->p80211.addr3[2], frame->p80211.addr3[3], | ||
4381 | frame->p80211.addr3[4], frame->p80211.addr3[5]); | ||
4382 | printk(KERN_DEBUG " seq_ctl = 0x%04x\n", | ||
4383 | frame->p80211.seq_ctl); | ||
4384 | printk(KERN_DEBUG " addr4 = %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
4385 | frame->p80211.addr4[0], frame->p80211.addr4[1], | ||
4386 | frame->p80211.addr4[2], frame->p80211.addr4[3], | ||
4387 | frame->p80211.addr4[4], frame->p80211.addr4[5]); | ||
4388 | printk(KERN_DEBUG " data_len = 0x%04x\n", | ||
4389 | frame->p80211.data_len); | ||
4390 | |||
4391 | printk(KERN_DEBUG "IEEE 802.3 header:\n"); | ||
4392 | printk(KERN_DEBUG " dest = %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
4393 | frame->p8023.h_dest[0], frame->p8023.h_dest[1], | ||
4394 | frame->p8023.h_dest[2], frame->p8023.h_dest[3], | ||
4395 | frame->p8023.h_dest[4], frame->p8023.h_dest[5]); | ||
4396 | printk(KERN_DEBUG " src = %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
4397 | frame->p8023.h_source[0], frame->p8023.h_source[1], | ||
4398 | frame->p8023.h_source[2], frame->p8023.h_source[3], | ||
4399 | frame->p8023.h_source[4], frame->p8023.h_source[5]); | ||
4400 | printk(KERN_DEBUG " len = 0x%04x\n", frame->p8023.h_proto); | ||
4401 | |||
4402 | printk(KERN_DEBUG "IEEE 802.2 LLC/SNAP header:\n"); | ||
4403 | printk(KERN_DEBUG " DSAP = 0x%02x\n", frame->p8022.dsap); | ||
4404 | printk(KERN_DEBUG " SSAP = 0x%02x\n", frame->p8022.ssap); | ||
4405 | printk(KERN_DEBUG " ctrl = 0x%02x\n", frame->p8022.ctrl); | ||
4406 | printk(KERN_DEBUG " OUI = %02x:%02x:%02x\n", | ||
4407 | frame->p8022.oui[0], frame->p8022.oui[1], frame->p8022.oui[2]); | ||
4408 | printk(KERN_DEBUG " ethertype = 0x%04x\n", frame->ethertype); | ||
4409 | } | ||
4410 | #endif /* 0 */ | ||
4411 | |||
4412 | /********************************************************************/ | ||
4413 | /* Module initialization */ | 4302 | /* Module initialization */ |
4414 | /********************************************************************/ | 4303 | /********************************************************************/ |
4415 | 4304 | ||
diff --git a/drivers/net/wireless/orinoco.h b/drivers/net/wireless/orinoco.h index f5d856db92a1..16db3e14b7d2 100644 --- a/drivers/net/wireless/orinoco.h +++ b/drivers/net/wireless/orinoco.h | |||
@@ -7,7 +7,7 @@ | |||
7 | #ifndef _ORINOCO_H | 7 | #ifndef _ORINOCO_H |
8 | #define _ORINOCO_H | 8 | #define _ORINOCO_H |
9 | 9 | ||
10 | #define DRIVER_VERSION "0.15rc3" | 10 | #define DRIVER_VERSION "0.15" |
11 | 11 | ||
12 | #include <linux/netdevice.h> | 12 | #include <linux/netdevice.h> |
13 | #include <linux/wireless.h> | 13 | #include <linux/wireless.h> |
@@ -30,20 +30,6 @@ struct orinoco_key { | |||
30 | char data[ORINOCO_MAX_KEY_SIZE]; | 30 | char data[ORINOCO_MAX_KEY_SIZE]; |
31 | } __attribute__ ((packed)); | 31 | } __attribute__ ((packed)); |
32 | 32 | ||
33 | struct header_struct { | ||
34 | /* 802.3 */ | ||
35 | u8 dest[ETH_ALEN]; | ||
36 | u8 src[ETH_ALEN]; | ||
37 | __be16 len; | ||
38 | /* 802.2 */ | ||
39 | u8 dsap; | ||
40 | u8 ssap; | ||
41 | u8 ctrl; | ||
42 | /* SNAP */ | ||
43 | u8 oui[3]; | ||
44 | unsigned short ethertype; | ||
45 | } __attribute__ ((packed)); | ||
46 | |||
47 | typedef enum { | 33 | typedef enum { |
48 | FIRMWARE_TYPE_AGERE, | 34 | FIRMWARE_TYPE_AGERE, |
49 | FIRMWARE_TYPE_INTERSIL, | 35 | FIRMWARE_TYPE_INTERSIL, |
@@ -132,9 +118,6 @@ extern int orinoco_debug; | |||
132 | #define DEBUG(n, args...) do { } while (0) | 118 | #define DEBUG(n, args...) do { } while (0) |
133 | #endif /* ORINOCO_DEBUG */ | 119 | #endif /* ORINOCO_DEBUG */ |
134 | 120 | ||
135 | #define TRACE_ENTER(devname) DEBUG(2, "%s: -> %s()\n", devname, __FUNCTION__); | ||
136 | #define TRACE_EXIT(devname) DEBUG(2, "%s: <- %s()\n", devname, __FUNCTION__); | ||
137 | |||
138 | /********************************************************************/ | 121 | /********************************************************************/ |
139 | /* Exported prototypes */ | 122 | /* Exported prototypes */ |
140 | /********************************************************************/ | 123 | /********************************************************************/ |
diff --git a/drivers/net/wireless/orinoco_cs.c b/drivers/net/wireless/orinoco_cs.c index 434f7d7ad841..b2aec4d9fbb1 100644 --- a/drivers/net/wireless/orinoco_cs.c +++ b/drivers/net/wireless/orinoco_cs.c | |||
@@ -147,14 +147,11 @@ static void orinoco_cs_detach(struct pcmcia_device *link) | |||
147 | { | 147 | { |
148 | struct net_device *dev = link->priv; | 148 | struct net_device *dev = link->priv; |
149 | 149 | ||
150 | if (link->dev_node) | ||
151 | unregister_netdev(dev); | ||
152 | |||
150 | orinoco_cs_release(link); | 153 | orinoco_cs_release(link); |
151 | 154 | ||
152 | DEBUG(0, PFX "detach: link=%p link->dev_node=%p\n", link, link->dev_node); | ||
153 | if (link->dev_node) { | ||
154 | DEBUG(0, PFX "About to unregister net device %p\n", | ||
155 | dev); | ||
156 | unregister_netdev(dev); | ||
157 | } | ||
158 | free_orinocodev(dev); | 155 | free_orinocodev(dev); |
159 | } /* orinoco_cs_detach */ | 156 | } /* orinoco_cs_detach */ |
160 | 157 | ||
@@ -178,13 +175,10 @@ orinoco_cs_config(struct pcmcia_device *link) | |||
178 | int last_fn, last_ret; | 175 | int last_fn, last_ret; |
179 | u_char buf[64]; | 176 | u_char buf[64]; |
180 | config_info_t conf; | 177 | config_info_t conf; |
181 | cisinfo_t info; | ||
182 | tuple_t tuple; | 178 | tuple_t tuple; |
183 | cisparse_t parse; | 179 | cisparse_t parse; |
184 | void __iomem *mem; | 180 | void __iomem *mem; |
185 | 181 | ||
186 | CS_CHECK(ValidateCIS, pcmcia_validate_cis(link, &info)); | ||
187 | |||
188 | /* | 182 | /* |
189 | * This reads the card's CONFIG tuple to find its | 183 | * This reads the card's CONFIG tuple to find its |
190 | * configuration registers. | 184 | * configuration registers. |
@@ -234,12 +228,6 @@ orinoco_cs_config(struct pcmcia_device *link) | |||
234 | goto next_entry; | 228 | goto next_entry; |
235 | link->conf.ConfigIndex = cfg->index; | 229 | link->conf.ConfigIndex = cfg->index; |
236 | 230 | ||
237 | /* Does this card need audio output? */ | ||
238 | if (cfg->flags & CISTPL_CFTABLE_AUDIO) { | ||
239 | link->conf.Attributes |= CONF_ENABLE_SPKR; | ||
240 | link->conf.Status = CCSR_AUDIO_ENA; | ||
241 | } | ||
242 | |||
243 | /* Use power settings for Vcc and Vpp if present */ | 231 | /* Use power settings for Vcc and Vpp if present */ |
244 | /* Note that the CIS values need to be rescaled */ | 232 | /* Note that the CIS values need to be rescaled */ |
245 | if (cfg->vcc.present & (1 << CISTPL_POWER_VNOM)) { | 233 | if (cfg->vcc.present & (1 << CISTPL_POWER_VNOM)) { |
@@ -355,19 +343,10 @@ orinoco_cs_config(struct pcmcia_device *link) | |||
355 | net_device has been registered */ | 343 | net_device has been registered */ |
356 | 344 | ||
357 | /* Finally, report what we've done */ | 345 | /* Finally, report what we've done */ |
358 | printk(KERN_DEBUG "%s: index 0x%02x: ", | 346 | printk(KERN_DEBUG "%s: " DRIVER_NAME " at %s, irq %d, io " |
359 | dev->name, link->conf.ConfigIndex); | 347 | "0x%04x-0x%04x\n", dev->name, dev->class_dev.dev->bus_id, |
360 | if (link->conf.Vpp) | 348 | link->irq.AssignedIRQ, link->io.BasePort1, |
361 | printk(", Vpp %d.%d", link->conf.Vpp / 10, | 349 | link->io.BasePort1 + link->io.NumPorts1 - 1); |
362 | link->conf.Vpp % 10); | ||
363 | printk(", irq %d", link->irq.AssignedIRQ); | ||
364 | if (link->io.NumPorts1) | ||
365 | printk(", io 0x%04x-0x%04x", link->io.BasePort1, | ||
366 | link->io.BasePort1 + link->io.NumPorts1 - 1); | ||
367 | if (link->io.NumPorts2) | ||
368 | printk(" & 0x%04x-0x%04x", link->io.BasePort2, | ||
369 | link->io.BasePort2 + link->io.NumPorts2 - 1); | ||
370 | printk("\n"); | ||
371 | 350 | ||
372 | return 0; | 351 | return 0; |
373 | 352 | ||
@@ -436,7 +415,6 @@ static int orinoco_cs_resume(struct pcmcia_device *link) | |||
436 | struct orinoco_private *priv = netdev_priv(dev); | 415 | struct orinoco_private *priv = netdev_priv(dev); |
437 | struct orinoco_pccard *card = priv->card; | 416 | struct orinoco_pccard *card = priv->card; |
438 | int err = 0; | 417 | int err = 0; |
439 | unsigned long flags; | ||
440 | 418 | ||
441 | if (! test_bit(0, &card->hard_reset_in_progress)) { | 419 | if (! test_bit(0, &card->hard_reset_in_progress)) { |
442 | err = orinoco_reinit_firmware(dev); | 420 | err = orinoco_reinit_firmware(dev); |
@@ -446,7 +424,7 @@ static int orinoco_cs_resume(struct pcmcia_device *link) | |||
446 | return -EIO; | 424 | return -EIO; |
447 | } | 425 | } |
448 | 426 | ||
449 | spin_lock_irqsave(&priv->lock, flags); | 427 | spin_lock(&priv->lock); |
450 | 428 | ||
451 | netif_device_attach(dev); | 429 | netif_device_attach(dev); |
452 | priv->hw_unavailable--; | 430 | priv->hw_unavailable--; |
@@ -458,10 +436,10 @@ static int orinoco_cs_resume(struct pcmcia_device *link) | |||
458 | dev->name, err); | 436 | dev->name, err); |
459 | } | 437 | } |
460 | 438 | ||
461 | spin_unlock_irqrestore(&priv->lock, flags); | 439 | spin_unlock(&priv->lock); |
462 | } | 440 | } |
463 | 441 | ||
464 | return 0; | 442 | return err; |
465 | } | 443 | } |
466 | 444 | ||
467 | 445 | ||
diff --git a/drivers/net/wireless/orinoco_nortel.c b/drivers/net/wireless/orinoco_nortel.c index d1a670b35338..74b9d5b2ba9e 100644 --- a/drivers/net/wireless/orinoco_nortel.c +++ b/drivers/net/wireless/orinoco_nortel.c | |||
@@ -1,9 +1,8 @@ | |||
1 | /* orinoco_nortel.c | 1 | /* orinoco_nortel.c |
2 | * | 2 | * |
3 | * Driver for Prism II devices which would usually be driven by orinoco_cs, | 3 | * Driver for Prism II devices which would usually be driven by orinoco_cs, |
4 | * but are connected to the PCI bus by a PCI-to-PCMCIA adapter used in | 4 | * but are connected to the PCI bus by a PCI-to-PCMCIA adapter used in |
5 | * Nortel emobility, Symbol LA-4113 and Symbol LA-4123. | 5 | * Nortel emobility, Symbol LA-4113 and Symbol LA-4123. |
6 | * but are connected to the PCI bus by a Nortel PCI-PCMCIA-Adapter. | ||
7 | * | 6 | * |
8 | * Copyright (C) 2002 Tobias Hoffmann | 7 | * Copyright (C) 2002 Tobias Hoffmann |
9 | * (C) 2003 Christoph Jungegger <disdos@traum404.de> | 8 | * (C) 2003 Christoph Jungegger <disdos@traum404.de> |
@@ -50,67 +49,62 @@ | |||
50 | #include <pcmcia/cisreg.h> | 49 | #include <pcmcia/cisreg.h> |
51 | 50 | ||
52 | #include "orinoco.h" | 51 | #include "orinoco.h" |
52 | #include "orinoco_pci.h" | ||
53 | 53 | ||
54 | #define COR_OFFSET (0xe0) /* COR attribute offset of Prism2 PC card */ | 54 | #define COR_OFFSET (0xe0) /* COR attribute offset of Prism2 PC card */ |
55 | #define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */ | 55 | #define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */ |
56 | 56 | ||
57 | 57 | ||
58 | /* Nortel specific data */ | ||
59 | struct nortel_pci_card { | ||
60 | unsigned long iobase1; | ||
61 | unsigned long iobase2; | ||
62 | }; | ||
63 | |||
64 | /* | 58 | /* |
65 | * Do a soft reset of the PCI card using the Configuration Option Register | 59 | * Do a soft reset of the card using the Configuration Option Register |
66 | * We need this to get going... | 60 | * We need this to get going... |
67 | * This is the part of the code that is strongly inspired from wlan-ng | 61 | * This is the part of the code that is strongly inspired from wlan-ng |
68 | * | 62 | * |
69 | * Note bis : Don't try to access HERMES_CMD during the reset phase. | 63 | * Note bis : Don't try to access HERMES_CMD during the reset phase. |
70 | * It just won't work ! | 64 | * It just won't work ! |
71 | */ | 65 | */ |
72 | static int nortel_pci_cor_reset(struct orinoco_private *priv) | 66 | static int orinoco_nortel_cor_reset(struct orinoco_private *priv) |
73 | { | 67 | { |
74 | struct nortel_pci_card *card = priv->card; | 68 | struct orinoco_pci_card *card = priv->card; |
75 | 69 | ||
76 | /* Assert the reset until the card notice */ | 70 | /* Assert the reset until the card notices */ |
77 | outw_p(8, card->iobase1 + 2); | 71 | iowrite16(8, card->bridge_io + 2); |
78 | inw(card->iobase2 + COR_OFFSET); | 72 | ioread16(card->attr_io + COR_OFFSET); |
79 | outw_p(0x80, card->iobase2 + COR_OFFSET); | 73 | iowrite16(0x80, card->attr_io + COR_OFFSET); |
80 | mdelay(1); | 74 | mdelay(1); |
81 | 75 | ||
82 | /* Give time for the card to recover from this hard effort */ | 76 | /* Give time for the card to recover from this hard effort */ |
83 | outw_p(0, card->iobase2 + COR_OFFSET); | 77 | iowrite16(0, card->attr_io + COR_OFFSET); |
84 | outw_p(0, card->iobase2 + COR_OFFSET); | 78 | iowrite16(0, card->attr_io + COR_OFFSET); |
85 | mdelay(1); | 79 | mdelay(1); |
86 | 80 | ||
87 | /* set COR as usual */ | 81 | /* Set COR as usual */ |
88 | outw_p(COR_VALUE, card->iobase2 + COR_OFFSET); | 82 | iowrite16(COR_VALUE, card->attr_io + COR_OFFSET); |
89 | outw_p(COR_VALUE, card->iobase2 + COR_OFFSET); | 83 | iowrite16(COR_VALUE, card->attr_io + COR_OFFSET); |
90 | mdelay(1); | 84 | mdelay(1); |
91 | 85 | ||
92 | outw_p(0x228, card->iobase1 + 2); | 86 | iowrite16(0x228, card->bridge_io + 2); |
93 | 87 | ||
94 | return 0; | 88 | return 0; |
95 | } | 89 | } |
96 | 90 | ||
97 | static int nortel_pci_hw_init(struct nortel_pci_card *card) | 91 | static int orinoco_nortel_hw_init(struct orinoco_pci_card *card) |
98 | { | 92 | { |
99 | int i; | 93 | int i; |
100 | u32 reg; | 94 | u32 reg; |
101 | 95 | ||
102 | /* setup bridge */ | 96 | /* Setup bridge */ |
103 | if (inw(card->iobase1) & 1) { | 97 | if (ioread16(card->bridge_io) & 1) { |
104 | printk(KERN_ERR PFX "brg1 answer1 wrong\n"); | 98 | printk(KERN_ERR PFX "brg1 answer1 wrong\n"); |
105 | return -EBUSY; | 99 | return -EBUSY; |
106 | } | 100 | } |
107 | outw_p(0x118, card->iobase1 + 2); | 101 | iowrite16(0x118, card->bridge_io + 2); |
108 | outw_p(0x108, card->iobase1 + 2); | 102 | iowrite16(0x108, card->bridge_io + 2); |
109 | mdelay(30); | 103 | mdelay(30); |
110 | outw_p(0x8, card->iobase1 + 2); | 104 | iowrite16(0x8, card->bridge_io + 2); |
111 | for (i = 0; i < 30; i++) { | 105 | for (i = 0; i < 30; i++) { |
112 | mdelay(30); | 106 | mdelay(30); |
113 | if (inw(card->iobase1) & 0x10) { | 107 | if (ioread16(card->bridge_io) & 0x10) { |
114 | break; | 108 | break; |
115 | } | 109 | } |
116 | } | 110 | } |
@@ -118,42 +112,42 @@ static int nortel_pci_hw_init(struct nortel_pci_card *card) | |||
118 | printk(KERN_ERR PFX "brg1 timed out\n"); | 112 | printk(KERN_ERR PFX "brg1 timed out\n"); |
119 | return -EBUSY; | 113 | return -EBUSY; |
120 | } | 114 | } |
121 | if (inw(card->iobase2 + 0xe0) & 1) { | 115 | if (ioread16(card->attr_io + COR_OFFSET) & 1) { |
122 | printk(KERN_ERR PFX "brg2 answer1 wrong\n"); | 116 | printk(KERN_ERR PFX "brg2 answer1 wrong\n"); |
123 | return -EBUSY; | 117 | return -EBUSY; |
124 | } | 118 | } |
125 | if (inw(card->iobase2 + 0xe2) & 1) { | 119 | if (ioread16(card->attr_io + COR_OFFSET + 2) & 1) { |
126 | printk(KERN_ERR PFX "brg2 answer2 wrong\n"); | 120 | printk(KERN_ERR PFX "brg2 answer2 wrong\n"); |
127 | return -EBUSY; | 121 | return -EBUSY; |
128 | } | 122 | } |
129 | if (inw(card->iobase2 + 0xe4) & 1) { | 123 | if (ioread16(card->attr_io + COR_OFFSET + 4) & 1) { |
130 | printk(KERN_ERR PFX "brg2 answer3 wrong\n"); | 124 | printk(KERN_ERR PFX "brg2 answer3 wrong\n"); |
131 | return -EBUSY; | 125 | return -EBUSY; |
132 | } | 126 | } |
133 | 127 | ||
134 | /* set the PCMCIA COR-Register */ | 128 | /* Set the PCMCIA COR register */ |
135 | outw_p(COR_VALUE, card->iobase2 + COR_OFFSET); | 129 | iowrite16(COR_VALUE, card->attr_io + COR_OFFSET); |
136 | mdelay(1); | 130 | mdelay(1); |
137 | reg = inw(card->iobase2 + COR_OFFSET); | 131 | reg = ioread16(card->attr_io + COR_OFFSET); |
138 | if (reg != COR_VALUE) { | 132 | if (reg != COR_VALUE) { |
139 | printk(KERN_ERR PFX "Error setting COR value (reg=%x)\n", | 133 | printk(KERN_ERR PFX "Error setting COR value (reg=%x)\n", |
140 | reg); | 134 | reg); |
141 | return -EBUSY; | 135 | return -EBUSY; |
142 | } | 136 | } |
143 | 137 | ||
144 | /* set leds */ | 138 | /* Set LEDs */ |
145 | outw_p(1, card->iobase1 + 10); | 139 | iowrite16(1, card->bridge_io + 10); |
146 | return 0; | 140 | return 0; |
147 | } | 141 | } |
148 | 142 | ||
149 | static int nortel_pci_init_one(struct pci_dev *pdev, | 143 | static int orinoco_nortel_init_one(struct pci_dev *pdev, |
150 | const struct pci_device_id *ent) | 144 | const struct pci_device_id *ent) |
151 | { | 145 | { |
152 | int err; | 146 | int err; |
153 | struct orinoco_private *priv; | 147 | struct orinoco_private *priv; |
154 | struct nortel_pci_card *card; | 148 | struct orinoco_pci_card *card; |
155 | struct net_device *dev; | 149 | struct net_device *dev; |
156 | void __iomem *iomem; | 150 | void __iomem *hermes_io, *bridge_io, *attr_io; |
157 | 151 | ||
158 | err = pci_enable_device(pdev); | 152 | err = pci_enable_device(pdev); |
159 | if (err) { | 153 | if (err) { |
@@ -162,19 +156,34 @@ static int nortel_pci_init_one(struct pci_dev *pdev, | |||
162 | } | 156 | } |
163 | 157 | ||
164 | err = pci_request_regions(pdev, DRIVER_NAME); | 158 | err = pci_request_regions(pdev, DRIVER_NAME); |
165 | if (err != 0) { | 159 | if (err) { |
166 | printk(KERN_ERR PFX "Cannot obtain PCI resources\n"); | 160 | printk(KERN_ERR PFX "Cannot obtain PCI resources\n"); |
167 | goto fail_resources; | 161 | goto fail_resources; |
168 | } | 162 | } |
169 | 163 | ||
170 | iomem = pci_iomap(pdev, 2, 0); | 164 | bridge_io = pci_iomap(pdev, 0, 0); |
171 | if (!iomem) { | 165 | if (!bridge_io) { |
172 | err = -ENOMEM; | 166 | printk(KERN_ERR PFX "Cannot map bridge registers\n"); |
173 | goto fail_map_io; | 167 | err = -EIO; |
168 | goto fail_map_bridge; | ||
169 | } | ||
170 | |||
171 | attr_io = pci_iomap(pdev, 1, 0); | ||
172 | if (!attr_io) { | ||
173 | printk(KERN_ERR PFX "Cannot map PCMCIA attributes\n"); | ||
174 | err = -EIO; | ||
175 | goto fail_map_attr; | ||
176 | } | ||
177 | |||
178 | hermes_io = pci_iomap(pdev, 2, 0); | ||
179 | if (!hermes_io) { | ||
180 | printk(KERN_ERR PFX "Cannot map chipset registers\n"); | ||
181 | err = -EIO; | ||
182 | goto fail_map_hermes; | ||
174 | } | 183 | } |
175 | 184 | ||
176 | /* Allocate network device */ | 185 | /* Allocate network device */ |
177 | dev = alloc_orinocodev(sizeof(*card), nortel_pci_cor_reset); | 186 | dev = alloc_orinocodev(sizeof(*card), orinoco_nortel_cor_reset); |
178 | if (!dev) { | 187 | if (!dev) { |
179 | printk(KERN_ERR PFX "Cannot allocate network device\n"); | 188 | printk(KERN_ERR PFX "Cannot allocate network device\n"); |
180 | err = -ENOMEM; | 189 | err = -ENOMEM; |
@@ -183,16 +192,12 @@ static int nortel_pci_init_one(struct pci_dev *pdev, | |||
183 | 192 | ||
184 | priv = netdev_priv(dev); | 193 | priv = netdev_priv(dev); |
185 | card = priv->card; | 194 | card = priv->card; |
186 | card->iobase1 = pci_resource_start(pdev, 0); | 195 | card->bridge_io = bridge_io; |
187 | card->iobase2 = pci_resource_start(pdev, 1); | 196 | card->attr_io = attr_io; |
188 | dev->base_addr = pci_resource_start(pdev, 2); | ||
189 | SET_MODULE_OWNER(dev); | 197 | SET_MODULE_OWNER(dev); |
190 | SET_NETDEV_DEV(dev, &pdev->dev); | 198 | SET_NETDEV_DEV(dev, &pdev->dev); |
191 | 199 | ||
192 | hermes_struct_init(&priv->hw, iomem, HERMES_16BIT_REGSPACING); | 200 | hermes_struct_init(&priv->hw, hermes_io, HERMES_16BIT_REGSPACING); |
193 | |||
194 | printk(KERN_DEBUG PFX "Detected Nortel PCI device at %s irq:%d, " | ||
195 | "io addr:0x%lx\n", pci_name(pdev), pdev->irq, dev->base_addr); | ||
196 | 201 | ||
197 | err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ, | 202 | err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ, |
198 | dev->name, dev); | 203 | dev->name, dev); |
@@ -201,21 +206,19 @@ static int nortel_pci_init_one(struct pci_dev *pdev, | |||
201 | err = -EBUSY; | 206 | err = -EBUSY; |
202 | goto fail_irq; | 207 | goto fail_irq; |
203 | } | 208 | } |
204 | dev->irq = pdev->irq; | ||
205 | 209 | ||
206 | err = nortel_pci_hw_init(card); | 210 | err = orinoco_nortel_hw_init(card); |
207 | if (err) { | 211 | if (err) { |
208 | printk(KERN_ERR PFX "Hardware initialization failed\n"); | 212 | printk(KERN_ERR PFX "Hardware initialization failed\n"); |
209 | goto fail; | 213 | goto fail; |
210 | } | 214 | } |
211 | 215 | ||
212 | err = nortel_pci_cor_reset(priv); | 216 | err = orinoco_nortel_cor_reset(priv); |
213 | if (err) { | 217 | if (err) { |
214 | printk(KERN_ERR PFX "Initial reset failed\n"); | 218 | printk(KERN_ERR PFX "Initial reset failed\n"); |
215 | goto fail; | 219 | goto fail; |
216 | } | 220 | } |
217 | 221 | ||
218 | |||
219 | err = register_netdev(dev); | 222 | err = register_netdev(dev); |
220 | if (err) { | 223 | if (err) { |
221 | printk(KERN_ERR PFX "Cannot register network device\n"); | 224 | printk(KERN_ERR PFX "Cannot register network device\n"); |
@@ -223,6 +226,8 @@ static int nortel_pci_init_one(struct pci_dev *pdev, | |||
223 | } | 226 | } |
224 | 227 | ||
225 | pci_set_drvdata(pdev, dev); | 228 | pci_set_drvdata(pdev, dev); |
229 | printk(KERN_DEBUG "%s: " DRIVER_NAME " at %s\n", dev->name, | ||
230 | pci_name(pdev)); | ||
226 | 231 | ||
227 | return 0; | 232 | return 0; |
228 | 233 | ||
@@ -234,9 +239,15 @@ static int nortel_pci_init_one(struct pci_dev *pdev, | |||
234 | free_orinocodev(dev); | 239 | free_orinocodev(dev); |
235 | 240 | ||
236 | fail_alloc: | 241 | fail_alloc: |
237 | pci_iounmap(pdev, iomem); | 242 | pci_iounmap(pdev, hermes_io); |
238 | 243 | ||
239 | fail_map_io: | 244 | fail_map_hermes: |
245 | pci_iounmap(pdev, attr_io); | ||
246 | |||
247 | fail_map_attr: | ||
248 | pci_iounmap(pdev, bridge_io); | ||
249 | |||
250 | fail_map_bridge: | ||
240 | pci_release_regions(pdev); | 251 | pci_release_regions(pdev); |
241 | 252 | ||
242 | fail_resources: | 253 | fail_resources: |
@@ -245,26 +256,27 @@ static int nortel_pci_init_one(struct pci_dev *pdev, | |||
245 | return err; | 256 | return err; |
246 | } | 257 | } |
247 | 258 | ||
248 | static void __devexit nortel_pci_remove_one(struct pci_dev *pdev) | 259 | static void __devexit orinoco_nortel_remove_one(struct pci_dev *pdev) |
249 | { | 260 | { |
250 | struct net_device *dev = pci_get_drvdata(pdev); | 261 | struct net_device *dev = pci_get_drvdata(pdev); |
251 | struct orinoco_private *priv = netdev_priv(dev); | 262 | struct orinoco_private *priv = netdev_priv(dev); |
252 | struct nortel_pci_card *card = priv->card; | 263 | struct orinoco_pci_card *card = priv->card; |
253 | 264 | ||
254 | /* clear leds */ | 265 | /* Clear LEDs */ |
255 | outw_p(0, card->iobase1 + 10); | 266 | iowrite16(0, card->bridge_io + 10); |
256 | 267 | ||
257 | unregister_netdev(dev); | 268 | unregister_netdev(dev); |
258 | free_irq(dev->irq, dev); | 269 | free_irq(pdev->irq, dev); |
259 | pci_set_drvdata(pdev, NULL); | 270 | pci_set_drvdata(pdev, NULL); |
260 | free_orinocodev(dev); | 271 | free_orinocodev(dev); |
261 | pci_iounmap(pdev, priv->hw.iobase); | 272 | pci_iounmap(pdev, priv->hw.iobase); |
273 | pci_iounmap(pdev, card->attr_io); | ||
274 | pci_iounmap(pdev, card->bridge_io); | ||
262 | pci_release_regions(pdev); | 275 | pci_release_regions(pdev); |
263 | pci_disable_device(pdev); | 276 | pci_disable_device(pdev); |
264 | } | 277 | } |
265 | 278 | ||
266 | 279 | static struct pci_device_id orinoco_nortel_id_table[] = { | |
267 | static struct pci_device_id nortel_pci_id_table[] = { | ||
268 | /* Nortel emobility PCI */ | 280 | /* Nortel emobility PCI */ |
269 | {0x126c, 0x8030, PCI_ANY_ID, PCI_ANY_ID,}, | 281 | {0x126c, 0x8030, PCI_ANY_ID, PCI_ANY_ID,}, |
270 | /* Symbol LA-4123 PCI */ | 282 | /* Symbol LA-4123 PCI */ |
@@ -272,13 +284,15 @@ static struct pci_device_id nortel_pci_id_table[] = { | |||
272 | {0,}, | 284 | {0,}, |
273 | }; | 285 | }; |
274 | 286 | ||
275 | MODULE_DEVICE_TABLE(pci, nortel_pci_id_table); | 287 | MODULE_DEVICE_TABLE(pci, orinoco_nortel_id_table); |
276 | 288 | ||
277 | static struct pci_driver nortel_pci_driver = { | 289 | static struct pci_driver orinoco_nortel_driver = { |
278 | .name = DRIVER_NAME, | 290 | .name = DRIVER_NAME, |
279 | .id_table = nortel_pci_id_table, | 291 | .id_table = orinoco_nortel_id_table, |
280 | .probe = nortel_pci_init_one, | 292 | .probe = orinoco_nortel_init_one, |
281 | .remove = __devexit_p(nortel_pci_remove_one), | 293 | .remove = __devexit_p(orinoco_nortel_remove_one), |
294 | .suspend = orinoco_pci_suspend, | ||
295 | .resume = orinoco_pci_resume, | ||
282 | }; | 296 | }; |
283 | 297 | ||
284 | static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION | 298 | static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION |
@@ -288,20 +302,19 @@ MODULE_DESCRIPTION | |||
288 | ("Driver for wireless LAN cards using the Nortel PCI bridge"); | 302 | ("Driver for wireless LAN cards using the Nortel PCI bridge"); |
289 | MODULE_LICENSE("Dual MPL/GPL"); | 303 | MODULE_LICENSE("Dual MPL/GPL"); |
290 | 304 | ||
291 | static int __init nortel_pci_init(void) | 305 | static int __init orinoco_nortel_init(void) |
292 | { | 306 | { |
293 | printk(KERN_DEBUG "%s\n", version); | 307 | printk(KERN_DEBUG "%s\n", version); |
294 | return pci_module_init(&nortel_pci_driver); | 308 | return pci_module_init(&orinoco_nortel_driver); |
295 | } | 309 | } |
296 | 310 | ||
297 | static void __exit nortel_pci_exit(void) | 311 | static void __exit orinoco_nortel_exit(void) |
298 | { | 312 | { |
299 | pci_unregister_driver(&nortel_pci_driver); | 313 | pci_unregister_driver(&orinoco_nortel_driver); |
300 | ssleep(1); | ||
301 | } | 314 | } |
302 | 315 | ||
303 | module_init(nortel_pci_init); | 316 | module_init(orinoco_nortel_init); |
304 | module_exit(nortel_pci_exit); | 317 | module_exit(orinoco_nortel_exit); |
305 | 318 | ||
306 | /* | 319 | /* |
307 | * Local variables: | 320 | * Local variables: |
diff --git a/drivers/net/wireless/orinoco_pci.c b/drivers/net/wireless/orinoco_pci.c index 5362c214fc8e..1c105f40f8d5 100644 --- a/drivers/net/wireless/orinoco_pci.c +++ b/drivers/net/wireless/orinoco_pci.c | |||
@@ -1,11 +1,11 @@ | |||
1 | /* orinoco_pci.c | 1 | /* orinoco_pci.c |
2 | * | 2 | * |
3 | * Driver for Prism II devices that have a direct PCI interface | 3 | * Driver for Prism 2.5/3 devices that have a direct PCI interface |
4 | * (i.e., not in a Pcmcia or PLX bridge) | 4 | * (i.e. these are not PCMCIA cards in a PCMCIA-to-PCI bridge). |
5 | * | 5 | * The card contains only one PCI region, which contains all the usual |
6 | * Specifically here we're talking about the Linksys WMP11 | 6 | * hermes registers, as well as the COR register. |
7 | * | 7 | * |
8 | * Current maintainers (as of 29 September 2003) are: | 8 | * Current maintainers are: |
9 | * Pavel Roskin <proski AT gnu.org> | 9 | * Pavel Roskin <proski AT gnu.org> |
10 | * and David Gibson <hermes AT gibson.dropbear.id.au> | 10 | * and David Gibson <hermes AT gibson.dropbear.id.au> |
11 | * | 11 | * |
@@ -41,54 +41,6 @@ | |||
41 | * under either the MPL or the GPL. | 41 | * under either the MPL or the GPL. |
42 | */ | 42 | */ |
43 | 43 | ||
44 | /* | ||
45 | * Theory of operation... | ||
46 | * ------------------- | ||
47 | * Maybe you had a look in orinoco_plx. Well, this is totally different... | ||
48 | * | ||
49 | * The card contains only one PCI region, which contains all the usual | ||
50 | * hermes registers. | ||
51 | * | ||
52 | * The driver will memory map this region in normal memory. Because | ||
53 | * the hermes registers are mapped in normal memory and not in ISA I/O | ||
54 | * post space, we can't use the usual inw/outw macros and we need to | ||
55 | * use readw/writew. | ||
56 | * This slight difference force us to compile our own version of | ||
57 | * hermes.c with the register access macro changed. That's a bit | ||
58 | * hackish but works fine. | ||
59 | * | ||
60 | * Note that the PCI region is pretty big (4K). That's much more than | ||
61 | * the usual set of hermes register (0x0 -> 0x3E). I've got a strong | ||
62 | * suspicion that the whole memory space of the adapter is in fact in | ||
63 | * this region. Accessing directly the adapter memory instead of going | ||
64 | * through the usual register would speed up significantely the | ||
65 | * operations... | ||
66 | * | ||
67 | * Finally, the card looks like this : | ||
68 | ----------------------- | ||
69 | Bus 0, device 14, function 0: | ||
70 | Network controller: PCI device 1260:3873 (Harris Semiconductor) (rev 1). | ||
71 | IRQ 11. | ||
72 | Master Capable. Latency=248. | ||
73 | Prefetchable 32 bit memory at 0xffbcc000 [0xffbccfff]. | ||
74 | ----------------------- | ||
75 | 00:0e.0 Network controller: Harris Semiconductor: Unknown device 3873 (rev 01) | ||
76 | Subsystem: Unknown device 1737:3874 | ||
77 | Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- | ||
78 | Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- | ||
79 | Latency: 248 set, cache line size 08 | ||
80 | Interrupt: pin A routed to IRQ 11 | ||
81 | Region 0: Memory at ffbcc000 (32-bit, prefetchable) [size=4K] | ||
82 | Capabilities: [dc] Power Management version 2 | ||
83 | Flags: PMEClk- AuxPwr- DSI- D1+ D2+ PME+ | ||
84 | Status: D0 PME-Enable- DSel=0 DScale=0 PME- | ||
85 | ----------------------- | ||
86 | * | ||
87 | * That's all.. | ||
88 | * | ||
89 | * Jean II | ||
90 | */ | ||
91 | |||
92 | #define DRIVER_NAME "orinoco_pci" | 44 | #define DRIVER_NAME "orinoco_pci" |
93 | #define PFX DRIVER_NAME ": " | 45 | #define PFX DRIVER_NAME ": " |
94 | 46 | ||
@@ -100,12 +52,14 @@ | |||
100 | #include <linux/pci.h> | 52 | #include <linux/pci.h> |
101 | 53 | ||
102 | #include "orinoco.h" | 54 | #include "orinoco.h" |
55 | #include "orinoco_pci.h" | ||
103 | 56 | ||
104 | /* All the magic there is from wlan-ng */ | 57 | /* Offset of the COR register of the PCI card */ |
105 | /* Magic offset of the reset register of the PCI card */ | ||
106 | #define HERMES_PCI_COR (0x26) | 58 | #define HERMES_PCI_COR (0x26) |
107 | /* Magic bitmask to reset the card */ | 59 | |
60 | /* Bitmask to reset the card */ | ||
108 | #define HERMES_PCI_COR_MASK (0x0080) | 61 | #define HERMES_PCI_COR_MASK (0x0080) |
62 | |||
109 | /* Magic timeouts for doing the reset. | 63 | /* Magic timeouts for doing the reset. |
110 | * Those times are straight from wlan-ng, and it is claimed that they | 64 | * Those times are straight from wlan-ng, and it is claimed that they |
111 | * are necessary. Alan will kill me. Take your time and grab a coffee. */ | 65 | * are necessary. Alan will kill me. Take your time and grab a coffee. */ |
@@ -113,13 +67,8 @@ | |||
113 | #define HERMES_PCI_COR_OFFT (500) /* ms */ | 67 | #define HERMES_PCI_COR_OFFT (500) /* ms */ |
114 | #define HERMES_PCI_COR_BUSYT (500) /* ms */ | 68 | #define HERMES_PCI_COR_BUSYT (500) /* ms */ |
115 | 69 | ||
116 | /* Orinoco PCI specific data */ | ||
117 | struct orinoco_pci_card { | ||
118 | void __iomem *pci_ioaddr; | ||
119 | }; | ||
120 | |||
121 | /* | 70 | /* |
122 | * Do a soft reset of the PCI card using the Configuration Option Register | 71 | * Do a soft reset of the card using the Configuration Option Register |
123 | * We need this to get going... | 72 | * We need this to get going... |
124 | * This is the part of the code that is strongly inspired from wlan-ng | 73 | * This is the part of the code that is strongly inspired from wlan-ng |
125 | * | 74 | * |
@@ -131,14 +80,13 @@ struct orinoco_pci_card { | |||
131 | * Note bis : Don't try to access HERMES_CMD during the reset phase. | 80 | * Note bis : Don't try to access HERMES_CMD during the reset phase. |
132 | * It just won't work ! | 81 | * It just won't work ! |
133 | */ | 82 | */ |
134 | static int | 83 | static int orinoco_pci_cor_reset(struct orinoco_private *priv) |
135 | orinoco_pci_cor_reset(struct orinoco_private *priv) | ||
136 | { | 84 | { |
137 | hermes_t *hw = &priv->hw; | 85 | hermes_t *hw = &priv->hw; |
138 | unsigned long timeout; | 86 | unsigned long timeout; |
139 | u16 reg; | 87 | u16 reg; |
140 | 88 | ||
141 | /* Assert the reset until the card notice */ | 89 | /* Assert the reset until the card notices */ |
142 | hermes_write_regn(hw, PCI_COR, HERMES_PCI_COR_MASK); | 90 | hermes_write_regn(hw, PCI_COR, HERMES_PCI_COR_MASK); |
143 | mdelay(HERMES_PCI_COR_ONT); | 91 | mdelay(HERMES_PCI_COR_ONT); |
144 | 92 | ||
@@ -163,19 +111,14 @@ orinoco_pci_cor_reset(struct orinoco_private *priv) | |||
163 | return 0; | 111 | return 0; |
164 | } | 112 | } |
165 | 113 | ||
166 | /* | ||
167 | * Initialise a card. Mostly similar to PLX code. | ||
168 | */ | ||
169 | static int orinoco_pci_init_one(struct pci_dev *pdev, | 114 | static int orinoco_pci_init_one(struct pci_dev *pdev, |
170 | const struct pci_device_id *ent) | 115 | const struct pci_device_id *ent) |
171 | { | 116 | { |
172 | int err = 0; | 117 | int err; |
173 | unsigned long pci_iorange; | 118 | struct orinoco_private *priv; |
174 | u16 __iomem *pci_ioaddr = NULL; | ||
175 | unsigned long pci_iolen; | ||
176 | struct orinoco_private *priv = NULL; | ||
177 | struct orinoco_pci_card *card; | 119 | struct orinoco_pci_card *card; |
178 | struct net_device *dev = NULL; | 120 | struct net_device *dev; |
121 | void __iomem *hermes_io; | ||
179 | 122 | ||
180 | err = pci_enable_device(pdev); | 123 | err = pci_enable_device(pdev); |
181 | if (err) { | 124 | if (err) { |
@@ -184,39 +127,32 @@ static int orinoco_pci_init_one(struct pci_dev *pdev, | |||
184 | } | 127 | } |
185 | 128 | ||
186 | err = pci_request_regions(pdev, DRIVER_NAME); | 129 | err = pci_request_regions(pdev, DRIVER_NAME); |
187 | if (err != 0) { | 130 | if (err) { |
188 | printk(KERN_ERR PFX "Cannot obtain PCI resources\n"); | 131 | printk(KERN_ERR PFX "Cannot obtain PCI resources\n"); |
189 | goto fail_resources; | 132 | goto fail_resources; |
190 | } | 133 | } |
191 | 134 | ||
192 | /* Resource 0 is mapped to the hermes registers */ | 135 | hermes_io = pci_iomap(pdev, 0, 0); |
193 | pci_iorange = pci_resource_start(pdev, 0); | 136 | if (!hermes_io) { |
194 | pci_iolen = pci_resource_len(pdev, 0); | 137 | printk(KERN_ERR PFX "Cannot remap chipset registers\n"); |
195 | pci_ioaddr = ioremap(pci_iorange, pci_iolen); | 138 | err = -EIO; |
196 | if (!pci_iorange) { | 139 | goto fail_map_hermes; |
197 | printk(KERN_ERR PFX "Cannot remap hardware registers\n"); | ||
198 | goto fail_map; | ||
199 | } | 140 | } |
200 | 141 | ||
201 | /* Allocate network device */ | 142 | /* Allocate network device */ |
202 | dev = alloc_orinocodev(sizeof(*card), orinoco_pci_cor_reset); | 143 | dev = alloc_orinocodev(sizeof(*card), orinoco_pci_cor_reset); |
203 | if (! dev) { | 144 | if (!dev) { |
145 | printk(KERN_ERR PFX "Cannot allocate network device\n"); | ||
204 | err = -ENOMEM; | 146 | err = -ENOMEM; |
205 | goto fail_alloc; | 147 | goto fail_alloc; |
206 | } | 148 | } |
207 | 149 | ||
208 | priv = netdev_priv(dev); | 150 | priv = netdev_priv(dev); |
209 | card = priv->card; | 151 | card = priv->card; |
210 | card->pci_ioaddr = pci_ioaddr; | ||
211 | dev->mem_start = pci_iorange; | ||
212 | dev->mem_end = pci_iorange + pci_iolen - 1; | ||
213 | SET_MODULE_OWNER(dev); | 152 | SET_MODULE_OWNER(dev); |
214 | SET_NETDEV_DEV(dev, &pdev->dev); | 153 | SET_NETDEV_DEV(dev, &pdev->dev); |
215 | 154 | ||
216 | hermes_struct_init(&priv->hw, pci_ioaddr, HERMES_32BIT_REGSPACING); | 155 | hermes_struct_init(&priv->hw, hermes_io, HERMES_32BIT_REGSPACING); |
217 | |||
218 | printk(KERN_DEBUG PFX "Detected device %s, mem:0x%lx-0x%lx, irq %d\n", | ||
219 | pci_name(pdev), dev->mem_start, dev->mem_end, pdev->irq); | ||
220 | 156 | ||
221 | err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ, | 157 | err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ, |
222 | dev->name, dev); | 158 | dev->name, dev); |
@@ -225,9 +161,7 @@ static int orinoco_pci_init_one(struct pci_dev *pdev, | |||
225 | err = -EBUSY; | 161 | err = -EBUSY; |
226 | goto fail_irq; | 162 | goto fail_irq; |
227 | } | 163 | } |
228 | dev->irq = pdev->irq; | ||
229 | 164 | ||
230 | /* Perform a COR reset to start the card */ | ||
231 | err = orinoco_pci_cor_reset(priv); | 165 | err = orinoco_pci_cor_reset(priv); |
232 | if (err) { | 166 | if (err) { |
233 | printk(KERN_ERR PFX "Initial reset failed\n"); | 167 | printk(KERN_ERR PFX "Initial reset failed\n"); |
@@ -236,11 +170,13 @@ static int orinoco_pci_init_one(struct pci_dev *pdev, | |||
236 | 170 | ||
237 | err = register_netdev(dev); | 171 | err = register_netdev(dev); |
238 | if (err) { | 172 | if (err) { |
239 | printk(KERN_ERR PFX "Failed to register net device\n"); | 173 | printk(KERN_ERR PFX "Cannot register network device\n"); |
240 | goto fail; | 174 | goto fail; |
241 | } | 175 | } |
242 | 176 | ||
243 | pci_set_drvdata(pdev, dev); | 177 | pci_set_drvdata(pdev, dev); |
178 | printk(KERN_DEBUG "%s: " DRIVER_NAME " at %s\n", dev->name, | ||
179 | pci_name(pdev)); | ||
244 | 180 | ||
245 | return 0; | 181 | return 0; |
246 | 182 | ||
@@ -252,9 +188,9 @@ static int orinoco_pci_init_one(struct pci_dev *pdev, | |||
252 | free_orinocodev(dev); | 188 | free_orinocodev(dev); |
253 | 189 | ||
254 | fail_alloc: | 190 | fail_alloc: |
255 | iounmap(pci_ioaddr); | 191 | pci_iounmap(pdev, hermes_io); |
256 | 192 | ||
257 | fail_map: | 193 | fail_map_hermes: |
258 | pci_release_regions(pdev); | 194 | pci_release_regions(pdev); |
259 | 195 | ||
260 | fail_resources: | 196 | fail_resources: |
@@ -267,87 +203,17 @@ static void __devexit orinoco_pci_remove_one(struct pci_dev *pdev) | |||
267 | { | 203 | { |
268 | struct net_device *dev = pci_get_drvdata(pdev); | 204 | struct net_device *dev = pci_get_drvdata(pdev); |
269 | struct orinoco_private *priv = netdev_priv(dev); | 205 | struct orinoco_private *priv = netdev_priv(dev); |
270 | struct orinoco_pci_card *card = priv->card; | ||
271 | 206 | ||
272 | unregister_netdev(dev); | 207 | unregister_netdev(dev); |
273 | free_irq(dev->irq, dev); | 208 | free_irq(pdev->irq, dev); |
274 | pci_set_drvdata(pdev, NULL); | 209 | pci_set_drvdata(pdev, NULL); |
275 | free_orinocodev(dev); | 210 | free_orinocodev(dev); |
276 | iounmap(card->pci_ioaddr); | 211 | pci_iounmap(pdev, priv->hw.iobase); |
277 | pci_release_regions(pdev); | 212 | pci_release_regions(pdev); |
278 | pci_disable_device(pdev); | 213 | pci_disable_device(pdev); |
279 | } | 214 | } |
280 | 215 | ||
281 | static int orinoco_pci_suspend(struct pci_dev *pdev, pm_message_t state) | 216 | static struct pci_device_id orinoco_pci_id_table[] = { |
282 | { | ||
283 | struct net_device *dev = pci_get_drvdata(pdev); | ||
284 | struct orinoco_private *priv = netdev_priv(dev); | ||
285 | unsigned long flags; | ||
286 | int err; | ||
287 | |||
288 | |||
289 | err = orinoco_lock(priv, &flags); | ||
290 | if (err) { | ||
291 | printk(KERN_ERR "%s: hw_unavailable on orinoco_pci_suspend\n", | ||
292 | dev->name); | ||
293 | return err; | ||
294 | } | ||
295 | |||
296 | err = __orinoco_down(dev); | ||
297 | if (err) | ||
298 | printk(KERN_WARNING "%s: orinoco_pci_suspend(): Error %d downing interface\n", | ||
299 | dev->name, err); | ||
300 | |||
301 | netif_device_detach(dev); | ||
302 | |||
303 | priv->hw_unavailable++; | ||
304 | |||
305 | orinoco_unlock(priv, &flags); | ||
306 | |||
307 | pci_save_state(pdev); | ||
308 | pci_set_power_state(pdev, PCI_D3hot); | ||
309 | |||
310 | return 0; | ||
311 | } | ||
312 | |||
313 | static int orinoco_pci_resume(struct pci_dev *pdev) | ||
314 | { | ||
315 | struct net_device *dev = pci_get_drvdata(pdev); | ||
316 | struct orinoco_private *priv = netdev_priv(dev); | ||
317 | unsigned long flags; | ||
318 | int err; | ||
319 | |||
320 | printk(KERN_DEBUG "%s: Orinoco-PCI waking up\n", dev->name); | ||
321 | |||
322 | pci_set_power_state(pdev, 0); | ||
323 | pci_restore_state(pdev); | ||
324 | |||
325 | err = orinoco_reinit_firmware(dev); | ||
326 | if (err) { | ||
327 | printk(KERN_ERR "%s: Error %d re-initializing firmware on orinoco_pci_resume()\n", | ||
328 | dev->name, err); | ||
329 | return err; | ||
330 | } | ||
331 | |||
332 | spin_lock_irqsave(&priv->lock, flags); | ||
333 | |||
334 | netif_device_attach(dev); | ||
335 | |||
336 | priv->hw_unavailable--; | ||
337 | |||
338 | if (priv->open && (! priv->hw_unavailable)) { | ||
339 | err = __orinoco_up(dev); | ||
340 | if (err) | ||
341 | printk(KERN_ERR "%s: Error %d restarting card on orinoco_pci_resume()\n", | ||
342 | dev->name, err); | ||
343 | } | ||
344 | |||
345 | spin_unlock_irqrestore(&priv->lock, flags); | ||
346 | |||
347 | return 0; | ||
348 | } | ||
349 | |||
350 | static struct pci_device_id orinoco_pci_pci_id_table[] = { | ||
351 | /* Intersil Prism 3 */ | 217 | /* Intersil Prism 3 */ |
352 | {0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID,}, | 218 | {0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID,}, |
353 | /* Intersil Prism 2.5 */ | 219 | /* Intersil Prism 2.5 */ |
@@ -357,11 +223,11 @@ static struct pci_device_id orinoco_pci_pci_id_table[] = { | |||
357 | {0,}, | 223 | {0,}, |
358 | }; | 224 | }; |
359 | 225 | ||
360 | MODULE_DEVICE_TABLE(pci, orinoco_pci_pci_id_table); | 226 | MODULE_DEVICE_TABLE(pci, orinoco_pci_id_table); |
361 | 227 | ||
362 | static struct pci_driver orinoco_pci_driver = { | 228 | static struct pci_driver orinoco_pci_driver = { |
363 | .name = DRIVER_NAME, | 229 | .name = DRIVER_NAME, |
364 | .id_table = orinoco_pci_pci_id_table, | 230 | .id_table = orinoco_pci_id_table, |
365 | .probe = orinoco_pci_init_one, | 231 | .probe = orinoco_pci_init_one, |
366 | .remove = __devexit_p(orinoco_pci_remove_one), | 232 | .remove = __devexit_p(orinoco_pci_remove_one), |
367 | .suspend = orinoco_pci_suspend, | 233 | .suspend = orinoco_pci_suspend, |
diff --git a/drivers/net/wireless/orinoco_pci.h b/drivers/net/wireless/orinoco_pci.h new file mode 100644 index 000000000000..7eb1e08113e0 --- /dev/null +++ b/drivers/net/wireless/orinoco_pci.h | |||
@@ -0,0 +1,104 @@ | |||
1 | /* orinoco_pci.h | ||
2 | * | ||
3 | * Common code for all Orinoco drivers for PCI devices, including | ||
4 | * both native PCI and PCMCIA-to-PCI bridges. | ||
5 | * | ||
6 | * Copyright (C) 2005, Pavel Roskin. | ||
7 | * See orinoco.c for license. | ||
8 | */ | ||
9 | |||
10 | #ifndef _ORINOCO_PCI_H | ||
11 | #define _ORINOCO_PCI_H | ||
12 | |||
13 | #include <linux/netdevice.h> | ||
14 | |||
15 | /* Driver specific data */ | ||
16 | struct orinoco_pci_card { | ||
17 | void __iomem *bridge_io; | ||
18 | void __iomem *attr_io; | ||
19 | }; | ||
20 | |||
21 | #ifdef CONFIG_PM | ||
22 | static int orinoco_pci_suspend(struct pci_dev *pdev, pm_message_t state) | ||
23 | { | ||
24 | struct net_device *dev = pci_get_drvdata(pdev); | ||
25 | struct orinoco_private *priv = netdev_priv(dev); | ||
26 | unsigned long flags; | ||
27 | int err; | ||
28 | |||
29 | err = orinoco_lock(priv, &flags); | ||
30 | if (err) { | ||
31 | printk(KERN_ERR "%s: cannot lock hardware for suspend\n", | ||
32 | dev->name); | ||
33 | return err; | ||
34 | } | ||
35 | |||
36 | err = __orinoco_down(dev); | ||
37 | if (err) | ||
38 | printk(KERN_WARNING "%s: error %d bringing interface down " | ||
39 | "for suspend\n", dev->name, err); | ||
40 | |||
41 | netif_device_detach(dev); | ||
42 | |||
43 | priv->hw_unavailable++; | ||
44 | |||
45 | orinoco_unlock(priv, &flags); | ||
46 | |||
47 | free_irq(pdev->irq, dev); | ||
48 | pci_save_state(pdev); | ||
49 | pci_disable_device(pdev); | ||
50 | pci_set_power_state(pdev, PCI_D3hot); | ||
51 | |||
52 | return 0; | ||
53 | } | ||
54 | |||
55 | static int orinoco_pci_resume(struct pci_dev *pdev) | ||
56 | { | ||
57 | struct net_device *dev = pci_get_drvdata(pdev); | ||
58 | struct orinoco_private *priv = netdev_priv(dev); | ||
59 | unsigned long flags; | ||
60 | int err; | ||
61 | |||
62 | pci_set_power_state(pdev, 0); | ||
63 | pci_enable_device(pdev); | ||
64 | pci_restore_state(pdev); | ||
65 | |||
66 | err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ, | ||
67 | dev->name, dev); | ||
68 | if (err) { | ||
69 | printk(KERN_ERR "%s: cannot re-allocate IRQ on resume\n", | ||
70 | dev->name); | ||
71 | pci_disable_device(pdev); | ||
72 | return -EBUSY; | ||
73 | } | ||
74 | |||
75 | err = orinoco_reinit_firmware(dev); | ||
76 | if (err) { | ||
77 | printk(KERN_ERR "%s: error %d re-initializing firmware " | ||
78 | "on resume\n", dev->name, err); | ||
79 | return err; | ||
80 | } | ||
81 | |||
82 | spin_lock_irqsave(&priv->lock, flags); | ||
83 | |||
84 | netif_device_attach(dev); | ||
85 | |||
86 | priv->hw_unavailable--; | ||
87 | |||
88 | if (priv->open && (! priv->hw_unavailable)) { | ||
89 | err = __orinoco_up(dev); | ||
90 | if (err) | ||
91 | printk(KERN_ERR "%s: Error %d restarting card on resume\n", | ||
92 | dev->name, err); | ||
93 | } | ||
94 | |||
95 | spin_unlock_irqrestore(&priv->lock, flags); | ||
96 | |||
97 | return 0; | ||
98 | } | ||
99 | #else | ||
100 | #define orinoco_pci_suspend NULL | ||
101 | #define orinoco_pci_resume NULL | ||
102 | #endif | ||
103 | |||
104 | #endif /* _ORINOCO_PCI_H */ | ||
diff --git a/drivers/net/wireless/orinoco_plx.c b/drivers/net/wireless/orinoco_plx.c index 210e73776545..84f696c77551 100644 --- a/drivers/net/wireless/orinoco_plx.c +++ b/drivers/net/wireless/orinoco_plx.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * Driver for Prism II devices which would usually be driven by orinoco_cs, | 3 | * Driver for Prism II devices which would usually be driven by orinoco_cs, |
4 | * but are connected to the PCI bus by a PLX9052. | 4 | * but are connected to the PCI bus by a PLX9052. |
5 | * | 5 | * |
6 | * Current maintainers (as of 29 September 2003) are: | 6 | * Current maintainers are: |
7 | * Pavel Roskin <proski AT gnu.org> | 7 | * Pavel Roskin <proski AT gnu.org> |
8 | * and David Gibson <hermes AT gibson.dropbear.id.au> | 8 | * and David Gibson <hermes AT gibson.dropbear.id.au> |
9 | * | 9 | * |
@@ -30,38 +30,18 @@ | |||
30 | * other provisions required by the GPL. If you do not delete the | 30 | * other provisions required by the GPL. If you do not delete the |
31 | * provisions above, a recipient may use your version of this file | 31 | * provisions above, a recipient may use your version of this file |
32 | * under either the MPL or the GPL. | 32 | * under either the MPL or the GPL. |
33 | |||
34 | * Caution: this is experimental and probably buggy. For success and | ||
35 | * failure reports for different cards and adaptors, see | ||
36 | * orinoco_plx_pci_id_table near the end of the file. If you have a | ||
37 | * card we don't have the PCI id for, and looks like it should work, | ||
38 | * drop me mail with the id and "it works"/"it doesn't work". | ||
39 | * | ||
40 | * Note: if everything gets detected fine but it doesn't actually send | ||
41 | * or receive packets, your first port of call should probably be to | ||
42 | * try newer firmware in the card. Especially if you're doing Ad-Hoc | ||
43 | * modes. | ||
44 | * | ||
45 | * The actual driving is done by orinoco.c, this is just resource | ||
46 | * allocation stuff. The explanation below is courtesy of Ryan Niemi | ||
47 | * on the linux-wlan-ng list at | ||
48 | * http://archives.neohapsis.com/archives/dev/linux-wlan/2001-q1/0026.html | ||
49 | * | 33 | * |
50 | * The PLX9052-based cards (WL11000 and several others) are a | 34 | * Here's the general details on how the PLX9052 adapter works: |
51 | * different beast than the usual PCMCIA-based PRISM2 configuration | ||
52 | * expected by wlan-ng. Here's the general details on how the WL11000 | ||
53 | * PCI adapter works: | ||
54 | * | 35 | * |
55 | * - Two PCI I/O address spaces, one 0x80 long which contains the | 36 | * - Two PCI I/O address spaces, one 0x80 long which contains the |
56 | * PLX9052 registers, and one that's 0x40 long mapped to the PCMCIA | 37 | * PLX9052 registers, and one that's 0x40 long mapped to the PCMCIA |
57 | * slot I/O address space. | 38 | * slot I/O address space. |
58 | * | 39 | * |
59 | * - One PCI memory address space, mapped to the PCMCIA memory space | 40 | * - One PCI memory address space, mapped to the PCMCIA attribute space |
60 | * (containing the CIS). | 41 | * (containing the CIS). |
61 | * | 42 | * |
62 | * After identifying the I/O and memory space, you can read through | 43 | * Using the later, you can read through the CIS data to make sure the |
63 | * the memory space to confirm the CIS's device ID or manufacturer ID | 44 | * card is compatible with the driver. Keep in mind that the PCMCIA |
64 | * to make sure it's the expected card. qKeep in mind that the PCMCIA | ||
65 | * spec specifies the CIS as the lower 8 bits of each word read from | 45 | * spec specifies the CIS as the lower 8 bits of each word read from |
66 | * the CIS, so to read the bytes of the CIS, read every other byte | 46 | * the CIS, so to read the bytes of the CIS, read every other byte |
67 | * (0,2,4,...). Passing that test, you need to enable the I/O address | 47 | * (0,2,4,...). Passing that test, you need to enable the I/O address |
@@ -71,7 +51,7 @@ | |||
71 | * within the PCI memory space. Write 0x41 to the COR register to | 51 | * within the PCI memory space. Write 0x41 to the COR register to |
72 | * enable I/O mode and to select level triggered interrupts. To | 52 | * enable I/O mode and to select level triggered interrupts. To |
73 | * confirm you actually succeeded, read the COR register back and make | 53 | * confirm you actually succeeded, read the COR register back and make |
74 | * sure it actually got set to 0x41, incase you have an unexpected | 54 | * sure it actually got set to 0x41, in case you have an unexpected |
75 | * card inserted. | 55 | * card inserted. |
76 | * | 56 | * |
77 | * Following that, you can treat the second PCI I/O address space (the | 57 | * Following that, you can treat the second PCI I/O address space (the |
@@ -101,16 +81,6 @@ | |||
101 | * that, I've hot-swapped a number of times during debugging and | 81 | * that, I've hot-swapped a number of times during debugging and |
102 | * driver development for various reasons (stuck WAIT# line after the | 82 | * driver development for various reasons (stuck WAIT# line after the |
103 | * radio card's firmware locks up). | 83 | * radio card's firmware locks up). |
104 | * | ||
105 | * Hope this is enough info for someone to add PLX9052 support to the | ||
106 | * wlan-ng card. In the case of the WL11000, the PCI ID's are | ||
107 | * 0x1639/0x0200, with matching subsystem ID's. Other PLX9052-based | ||
108 | * manufacturers other than Eumitcom (or on cards other than the | ||
109 | * WL11000) may have different PCI ID's. | ||
110 | * | ||
111 | * If anyone needs any more specific info, let me know. I haven't had | ||
112 | * time to implement support myself yet, and with the way things are | ||
113 | * going, might not have time for a while.. | ||
114 | */ | 84 | */ |
115 | 85 | ||
116 | #define DRIVER_NAME "orinoco_plx" | 86 | #define DRIVER_NAME "orinoco_plx" |
@@ -125,6 +95,7 @@ | |||
125 | #include <pcmcia/cisreg.h> | 95 | #include <pcmcia/cisreg.h> |
126 | 96 | ||
127 | #include "orinoco.h" | 97 | #include "orinoco.h" |
98 | #include "orinoco_pci.h" | ||
128 | 99 | ||
129 | #define COR_OFFSET (0x3e0) /* COR attribute offset of Prism2 PC card */ | 100 | #define COR_OFFSET (0x3e0) /* COR attribute offset of Prism2 PC card */ |
130 | #define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */ | 101 | #define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */ |
@@ -134,30 +105,20 @@ | |||
134 | #define PLX_INTCSR 0x4c /* Interrupt Control & Status Register */ | 105 | #define PLX_INTCSR 0x4c /* Interrupt Control & Status Register */ |
135 | #define PLX_INTCSR_INTEN (1<<6) /* Interrupt Enable bit */ | 106 | #define PLX_INTCSR_INTEN (1<<6) /* Interrupt Enable bit */ |
136 | 107 | ||
137 | static const u8 cis_magic[] = { | ||
138 | 0x01, 0x03, 0x00, 0x00, 0xff, 0x17, 0x04, 0x67 | ||
139 | }; | ||
140 | |||
141 | /* Orinoco PLX specific data */ | ||
142 | struct orinoco_plx_card { | ||
143 | void __iomem *attr_mem; | ||
144 | }; | ||
145 | |||
146 | /* | 108 | /* |
147 | * Do a soft reset of the card using the Configuration Option Register | 109 | * Do a soft reset of the card using the Configuration Option Register |
148 | */ | 110 | */ |
149 | static int orinoco_plx_cor_reset(struct orinoco_private *priv) | 111 | static int orinoco_plx_cor_reset(struct orinoco_private *priv) |
150 | { | 112 | { |
151 | hermes_t *hw = &priv->hw; | 113 | hermes_t *hw = &priv->hw; |
152 | struct orinoco_plx_card *card = priv->card; | 114 | struct orinoco_pci_card *card = priv->card; |
153 | u8 __iomem *attr_mem = card->attr_mem; | ||
154 | unsigned long timeout; | 115 | unsigned long timeout; |
155 | u16 reg; | 116 | u16 reg; |
156 | 117 | ||
157 | writeb(COR_VALUE | COR_RESET, attr_mem + COR_OFFSET); | 118 | iowrite8(COR_VALUE | COR_RESET, card->attr_io + COR_OFFSET); |
158 | mdelay(1); | 119 | mdelay(1); |
159 | 120 | ||
160 | writeb(COR_VALUE, attr_mem + COR_OFFSET); | 121 | iowrite8(COR_VALUE, card->attr_io + COR_OFFSET); |
161 | mdelay(1); | 122 | mdelay(1); |
162 | 123 | ||
163 | /* Just in case, wait more until the card is no longer busy */ | 124 | /* Just in case, wait more until the card is no longer busy */ |
@@ -168,7 +129,7 @@ static int orinoco_plx_cor_reset(struct orinoco_private *priv) | |||
168 | reg = hermes_read_regn(hw, CMD); | 129 | reg = hermes_read_regn(hw, CMD); |
169 | } | 130 | } |
170 | 131 | ||
171 | /* Did we timeout ? */ | 132 | /* Still busy? */ |
172 | if (reg & HERMES_CMD_BUSY) { | 133 | if (reg & HERMES_CMD_BUSY) { |
173 | printk(KERN_ERR PFX "Busy timeout\n"); | 134 | printk(KERN_ERR PFX "Busy timeout\n"); |
174 | return -ETIMEDOUT; | 135 | return -ETIMEDOUT; |
@@ -177,20 +138,55 @@ static int orinoco_plx_cor_reset(struct orinoco_private *priv) | |||
177 | return 0; | 138 | return 0; |
178 | } | 139 | } |
179 | 140 | ||
141 | static int orinoco_plx_hw_init(struct orinoco_pci_card *card) | ||
142 | { | ||
143 | int i; | ||
144 | u32 csr_reg; | ||
145 | static const u8 cis_magic[] = { | ||
146 | 0x01, 0x03, 0x00, 0x00, 0xff, 0x17, 0x04, 0x67 | ||
147 | }; | ||
148 | |||
149 | printk(KERN_DEBUG PFX "CIS: "); | ||
150 | for (i = 0; i < 16; i++) { | ||
151 | printk("%02X:", ioread8(card->attr_io + (i << 1))); | ||
152 | } | ||
153 | printk("\n"); | ||
154 | |||
155 | /* Verify whether a supported PC card is present */ | ||
156 | /* FIXME: we probably need to be smarted about this */ | ||
157 | for (i = 0; i < sizeof(cis_magic); i++) { | ||
158 | if (cis_magic[i] != ioread8(card->attr_io + (i << 1))) { | ||
159 | printk(KERN_ERR PFX "The CIS value of Prism2 PC " | ||
160 | "card is unexpected\n"); | ||
161 | return -ENODEV; | ||
162 | } | ||
163 | } | ||
164 | |||
165 | /* bjoern: We need to tell the card to enable interrupts, in | ||
166 | case the serial eprom didn't do this already. See the | ||
167 | PLX9052 data book, p8-1 and 8-24 for reference. */ | ||
168 | csr_reg = ioread32(card->bridge_io + PLX_INTCSR); | ||
169 | if (!(csr_reg & PLX_INTCSR_INTEN)) { | ||
170 | csr_reg |= PLX_INTCSR_INTEN; | ||
171 | iowrite32(csr_reg, card->bridge_io + PLX_INTCSR); | ||
172 | csr_reg = ioread32(card->bridge_io + PLX_INTCSR); | ||
173 | if (!(csr_reg & PLX_INTCSR_INTEN)) { | ||
174 | printk(KERN_ERR PFX "Cannot enable interrupts\n"); | ||
175 | return -EIO; | ||
176 | } | ||
177 | } | ||
178 | |||
179 | return 0; | ||
180 | } | ||
180 | 181 | ||
181 | static int orinoco_plx_init_one(struct pci_dev *pdev, | 182 | static int orinoco_plx_init_one(struct pci_dev *pdev, |
182 | const struct pci_device_id *ent) | 183 | const struct pci_device_id *ent) |
183 | { | 184 | { |
184 | int err = 0; | 185 | int err; |
185 | u8 __iomem *attr_mem = NULL; | 186 | struct orinoco_private *priv; |
186 | u32 csr_reg, plx_addr; | 187 | struct orinoco_pci_card *card; |
187 | struct orinoco_private *priv = NULL; | 188 | struct net_device *dev; |
188 | struct orinoco_plx_card *card; | 189 | void __iomem *hermes_io, *attr_io, *bridge_io; |
189 | unsigned long pccard_ioaddr = 0; | ||
190 | unsigned long pccard_iolen = 0; | ||
191 | struct net_device *dev = NULL; | ||
192 | void __iomem *mem; | ||
193 | int i; | ||
194 | 190 | ||
195 | err = pci_enable_device(pdev); | 191 | err = pci_enable_device(pdev); |
196 | if (err) { | 192 | if (err) { |
@@ -199,30 +195,30 @@ static int orinoco_plx_init_one(struct pci_dev *pdev, | |||
199 | } | 195 | } |
200 | 196 | ||
201 | err = pci_request_regions(pdev, DRIVER_NAME); | 197 | err = pci_request_regions(pdev, DRIVER_NAME); |
202 | if (err != 0) { | 198 | if (err) { |
203 | printk(KERN_ERR PFX "Cannot obtain PCI resources\n"); | 199 | printk(KERN_ERR PFX "Cannot obtain PCI resources\n"); |
204 | goto fail_resources; | 200 | goto fail_resources; |
205 | } | 201 | } |
206 | 202 | ||
207 | /* Resource 1 is mapped to PLX-specific registers */ | 203 | bridge_io = pci_iomap(pdev, 1, 0); |
208 | plx_addr = pci_resource_start(pdev, 1); | 204 | if (!bridge_io) { |
205 | printk(KERN_ERR PFX "Cannot map bridge registers\n"); | ||
206 | err = -EIO; | ||
207 | goto fail_map_bridge; | ||
208 | } | ||
209 | 209 | ||
210 | /* Resource 2 is mapped to the PCMCIA attribute memory */ | 210 | attr_io = pci_iomap(pdev, 2, 0); |
211 | attr_mem = ioremap(pci_resource_start(pdev, 2), | 211 | if (!attr_io) { |
212 | pci_resource_len(pdev, 2)); | 212 | printk(KERN_ERR PFX "Cannot map PCMCIA attributes\n"); |
213 | if (!attr_mem) { | 213 | err = -EIO; |
214 | printk(KERN_ERR PFX "Cannot remap PCMCIA space\n"); | ||
215 | goto fail_map_attr; | 214 | goto fail_map_attr; |
216 | } | 215 | } |
217 | 216 | ||
218 | /* Resource 3 is mapped to the PCMCIA I/O address space */ | 217 | hermes_io = pci_iomap(pdev, 3, 0); |
219 | pccard_ioaddr = pci_resource_start(pdev, 3); | 218 | if (!hermes_io) { |
220 | pccard_iolen = pci_resource_len(pdev, 3); | 219 | printk(KERN_ERR PFX "Cannot map chipset registers\n"); |
221 | 220 | err = -EIO; | |
222 | mem = pci_iomap(pdev, 3, 0); | 221 | goto fail_map_hermes; |
223 | if (!mem) { | ||
224 | err = -ENOMEM; | ||
225 | goto fail_map_io; | ||
226 | } | 222 | } |
227 | 223 | ||
228 | /* Allocate network device */ | 224 | /* Allocate network device */ |
@@ -235,16 +231,12 @@ static int orinoco_plx_init_one(struct pci_dev *pdev, | |||
235 | 231 | ||
236 | priv = netdev_priv(dev); | 232 | priv = netdev_priv(dev); |
237 | card = priv->card; | 233 | card = priv->card; |
238 | card->attr_mem = attr_mem; | 234 | card->bridge_io = bridge_io; |
239 | dev->base_addr = pccard_ioaddr; | 235 | card->attr_io = attr_io; |
240 | SET_MODULE_OWNER(dev); | 236 | SET_MODULE_OWNER(dev); |
241 | SET_NETDEV_DEV(dev, &pdev->dev); | 237 | SET_NETDEV_DEV(dev, &pdev->dev); |
242 | 238 | ||
243 | hermes_struct_init(&priv->hw, mem, HERMES_16BIT_REGSPACING); | 239 | hermes_struct_init(&priv->hw, hermes_io, HERMES_16BIT_REGSPACING); |
244 | |||
245 | printk(KERN_DEBUG PFX "Detected Orinoco/Prism2 PLX device " | ||
246 | "at %s irq:%d, io addr:0x%lx\n", pci_name(pdev), pdev->irq, | ||
247 | pccard_ioaddr); | ||
248 | 240 | ||
249 | err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ, | 241 | err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ, |
250 | dev->name, dev); | 242 | dev->name, dev); |
@@ -253,20 +245,11 @@ static int orinoco_plx_init_one(struct pci_dev *pdev, | |||
253 | err = -EBUSY; | 245 | err = -EBUSY; |
254 | goto fail_irq; | 246 | goto fail_irq; |
255 | } | 247 | } |
256 | dev->irq = pdev->irq; | ||
257 | 248 | ||
258 | /* bjoern: We need to tell the card to enable interrupts, in | 249 | err = orinoco_plx_hw_init(card); |
259 | case the serial eprom didn't do this already. See the | 250 | if (err) { |
260 | PLX9052 data book, p8-1 and 8-24 for reference. */ | 251 | printk(KERN_ERR PFX "Hardware initialization failed\n"); |
261 | csr_reg = inl(plx_addr + PLX_INTCSR); | 252 | goto fail; |
262 | if (!(csr_reg & PLX_INTCSR_INTEN)) { | ||
263 | csr_reg |= PLX_INTCSR_INTEN; | ||
264 | outl(csr_reg, plx_addr + PLX_INTCSR); | ||
265 | csr_reg = inl(plx_addr + PLX_INTCSR); | ||
266 | if (!(csr_reg & PLX_INTCSR_INTEN)) { | ||
267 | printk(KERN_ERR PFX "Cannot enable interrupts\n"); | ||
268 | goto fail; | ||
269 | } | ||
270 | } | 253 | } |
271 | 254 | ||
272 | err = orinoco_plx_cor_reset(priv); | 255 | err = orinoco_plx_cor_reset(priv); |
@@ -275,23 +258,6 @@ static int orinoco_plx_init_one(struct pci_dev *pdev, | |||
275 | goto fail; | 258 | goto fail; |
276 | } | 259 | } |
277 | 260 | ||
278 | printk(KERN_DEBUG PFX "CIS: "); | ||
279 | for (i = 0; i < 16; i++) { | ||
280 | printk("%02X:", readb(attr_mem + 2*i)); | ||
281 | } | ||
282 | printk("\n"); | ||
283 | |||
284 | /* Verify whether a supported PC card is present */ | ||
285 | /* FIXME: we probably need to be smarted about this */ | ||
286 | for (i = 0; i < sizeof(cis_magic); i++) { | ||
287 | if (cis_magic[i] != readb(attr_mem +2*i)) { | ||
288 | printk(KERN_ERR PFX "The CIS value of Prism2 PC " | ||
289 | "card is unexpected\n"); | ||
290 | err = -EIO; | ||
291 | goto fail; | ||
292 | } | ||
293 | } | ||
294 | |||
295 | err = register_netdev(dev); | 261 | err = register_netdev(dev); |
296 | if (err) { | 262 | if (err) { |
297 | printk(KERN_ERR PFX "Cannot register network device\n"); | 263 | printk(KERN_ERR PFX "Cannot register network device\n"); |
@@ -299,6 +265,8 @@ static int orinoco_plx_init_one(struct pci_dev *pdev, | |||
299 | } | 265 | } |
300 | 266 | ||
301 | pci_set_drvdata(pdev, dev); | 267 | pci_set_drvdata(pdev, dev); |
268 | printk(KERN_DEBUG "%s: " DRIVER_NAME " at %s\n", dev->name, | ||
269 | pci_name(pdev)); | ||
302 | 270 | ||
303 | return 0; | 271 | return 0; |
304 | 272 | ||
@@ -310,12 +278,15 @@ static int orinoco_plx_init_one(struct pci_dev *pdev, | |||
310 | free_orinocodev(dev); | 278 | free_orinocodev(dev); |
311 | 279 | ||
312 | fail_alloc: | 280 | fail_alloc: |
313 | pci_iounmap(pdev, mem); | 281 | pci_iounmap(pdev, hermes_io); |
314 | 282 | ||
315 | fail_map_io: | 283 | fail_map_hermes: |
316 | iounmap(attr_mem); | 284 | pci_iounmap(pdev, attr_io); |
317 | 285 | ||
318 | fail_map_attr: | 286 | fail_map_attr: |
287 | pci_iounmap(pdev, bridge_io); | ||
288 | |||
289 | fail_map_bridge: | ||
319 | pci_release_regions(pdev); | 290 | pci_release_regions(pdev); |
320 | 291 | ||
321 | fail_resources: | 292 | fail_resources: |
@@ -328,23 +299,20 @@ static void __devexit orinoco_plx_remove_one(struct pci_dev *pdev) | |||
328 | { | 299 | { |
329 | struct net_device *dev = pci_get_drvdata(pdev); | 300 | struct net_device *dev = pci_get_drvdata(pdev); |
330 | struct orinoco_private *priv = netdev_priv(dev); | 301 | struct orinoco_private *priv = netdev_priv(dev); |
331 | struct orinoco_plx_card *card = priv->card; | 302 | struct orinoco_pci_card *card = priv->card; |
332 | u8 __iomem *attr_mem = card->attr_mem; | ||
333 | |||
334 | BUG_ON(! dev); | ||
335 | 303 | ||
336 | unregister_netdev(dev); | 304 | unregister_netdev(dev); |
337 | free_irq(dev->irq, dev); | 305 | free_irq(pdev->irq, dev); |
338 | pci_set_drvdata(pdev, NULL); | 306 | pci_set_drvdata(pdev, NULL); |
339 | free_orinocodev(dev); | 307 | free_orinocodev(dev); |
340 | pci_iounmap(pdev, priv->hw.iobase); | 308 | pci_iounmap(pdev, priv->hw.iobase); |
341 | iounmap(attr_mem); | 309 | pci_iounmap(pdev, card->attr_io); |
310 | pci_iounmap(pdev, card->bridge_io); | ||
342 | pci_release_regions(pdev); | 311 | pci_release_regions(pdev); |
343 | pci_disable_device(pdev); | 312 | pci_disable_device(pdev); |
344 | } | 313 | } |
345 | 314 | ||
346 | 315 | static struct pci_device_id orinoco_plx_id_table[] = { | |
347 | static struct pci_device_id orinoco_plx_pci_id_table[] = { | ||
348 | {0x111a, 0x1023, PCI_ANY_ID, PCI_ANY_ID,}, /* Siemens SpeedStream SS1023 */ | 316 | {0x111a, 0x1023, PCI_ANY_ID, PCI_ANY_ID,}, /* Siemens SpeedStream SS1023 */ |
349 | {0x1385, 0x4100, PCI_ANY_ID, PCI_ANY_ID,}, /* Netgear MA301 */ | 317 | {0x1385, 0x4100, PCI_ANY_ID, PCI_ANY_ID,}, /* Netgear MA301 */ |
350 | {0x15e8, 0x0130, PCI_ANY_ID, PCI_ANY_ID,}, /* Correga - does this work? */ | 318 | {0x15e8, 0x0130, PCI_ANY_ID, PCI_ANY_ID,}, /* Correga - does this work? */ |
@@ -362,13 +330,15 @@ static struct pci_device_id orinoco_plx_pci_id_table[] = { | |||
362 | {0,}, | 330 | {0,}, |
363 | }; | 331 | }; |
364 | 332 | ||
365 | MODULE_DEVICE_TABLE(pci, orinoco_plx_pci_id_table); | 333 | MODULE_DEVICE_TABLE(pci, orinoco_plx_id_table); |
366 | 334 | ||
367 | static struct pci_driver orinoco_plx_driver = { | 335 | static struct pci_driver orinoco_plx_driver = { |
368 | .name = DRIVER_NAME, | 336 | .name = DRIVER_NAME, |
369 | .id_table = orinoco_plx_pci_id_table, | 337 | .id_table = orinoco_plx_id_table, |
370 | .probe = orinoco_plx_init_one, | 338 | .probe = orinoco_plx_init_one, |
371 | .remove = __devexit_p(orinoco_plx_remove_one), | 339 | .remove = __devexit_p(orinoco_plx_remove_one), |
340 | .suspend = orinoco_pci_suspend, | ||
341 | .resume = orinoco_pci_resume, | ||
372 | }; | 342 | }; |
373 | 343 | ||
374 | static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION | 344 | static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION |
@@ -388,7 +358,6 @@ static int __init orinoco_plx_init(void) | |||
388 | static void __exit orinoco_plx_exit(void) | 358 | static void __exit orinoco_plx_exit(void) |
389 | { | 359 | { |
390 | pci_unregister_driver(&orinoco_plx_driver); | 360 | pci_unregister_driver(&orinoco_plx_driver); |
391 | ssleep(1); | ||
392 | } | 361 | } |
393 | 362 | ||
394 | module_init(orinoco_plx_init); | 363 | module_init(orinoco_plx_init); |
diff --git a/drivers/net/wireless/orinoco_tmd.c b/drivers/net/wireless/orinoco_tmd.c index 5e68b7026186..d2b4decb7a7d 100644 --- a/drivers/net/wireless/orinoco_tmd.c +++ b/drivers/net/wireless/orinoco_tmd.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* orinoco_tmd.c | 1 | /* orinoco_tmd.c |
2 | * | 2 | * |
3 | * Driver for Prism II devices which would usually be driven by orinoco_cs, | 3 | * Driver for Prism II devices which would usually be driven by orinoco_cs, |
4 | * but are connected to the PCI bus by a TMD7160. | 4 | * but are connected to the PCI bus by a TMD7160. |
5 | * | 5 | * |
@@ -26,25 +26,13 @@ | |||
26 | * other provisions required by the GPL. If you do not delete the | 26 | * other provisions required by the GPL. If you do not delete the |
27 | * provisions above, a recipient may use your version of this file | 27 | * provisions above, a recipient may use your version of this file |
28 | * under either the MPL or the GPL. | 28 | * under either the MPL or the GPL. |
29 | |||
30 | * Caution: this is experimental and probably buggy. For success and | ||
31 | * failure reports for different cards and adaptors, see | ||
32 | * orinoco_tmd_pci_id_table near the end of the file. If you have a | ||
33 | * card we don't have the PCI id for, and looks like it should work, | ||
34 | * drop me mail with the id and "it works"/"it doesn't work". | ||
35 | * | ||
36 | * Note: if everything gets detected fine but it doesn't actually send | ||
37 | * or receive packets, your first port of call should probably be to | ||
38 | * try newer firmware in the card. Especially if you're doing Ad-Hoc | ||
39 | * modes | ||
40 | * | 29 | * |
41 | * The actual driving is done by orinoco.c, this is just resource | 30 | * The actual driving is done by orinoco.c, this is just resource |
42 | * allocation stuff. | 31 | * allocation stuff. |
43 | * | 32 | * |
44 | * This driver is modeled after the orinoco_plx driver. The main | 33 | * This driver is modeled after the orinoco_plx driver. The main |
45 | * difference is that the TMD chip has only IO port ranges and no | 34 | * difference is that the TMD chip has only IO port ranges and doesn't |
46 | * memory space, i.e. no access to the CIS. Compared to the PLX chip, | 35 | * provide access to the PCMCIA attribute space. |
47 | * the io range functionalities are exchanged. | ||
48 | * | 36 | * |
49 | * Pheecom sells cards with the TMD chip as "ASIC version" | 37 | * Pheecom sells cards with the TMD chip as "ASIC version" |
50 | */ | 38 | */ |
@@ -61,32 +49,26 @@ | |||
61 | #include <pcmcia/cisreg.h> | 49 | #include <pcmcia/cisreg.h> |
62 | 50 | ||
63 | #include "orinoco.h" | 51 | #include "orinoco.h" |
52 | #include "orinoco_pci.h" | ||
64 | 53 | ||
65 | #define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */ | 54 | #define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */ |
66 | #define COR_RESET (0x80) /* reset bit in the COR register */ | 55 | #define COR_RESET (0x80) /* reset bit in the COR register */ |
67 | #define TMD_RESET_TIME (500) /* milliseconds */ | 56 | #define TMD_RESET_TIME (500) /* milliseconds */ |
68 | 57 | ||
69 | /* Orinoco TMD specific data */ | ||
70 | struct orinoco_tmd_card { | ||
71 | u32 tmd_io; | ||
72 | }; | ||
73 | |||
74 | |||
75 | /* | 58 | /* |
76 | * Do a soft reset of the card using the Configuration Option Register | 59 | * Do a soft reset of the card using the Configuration Option Register |
77 | */ | 60 | */ |
78 | static int orinoco_tmd_cor_reset(struct orinoco_private *priv) | 61 | static int orinoco_tmd_cor_reset(struct orinoco_private *priv) |
79 | { | 62 | { |
80 | hermes_t *hw = &priv->hw; | 63 | hermes_t *hw = &priv->hw; |
81 | struct orinoco_tmd_card *card = priv->card; | 64 | struct orinoco_pci_card *card = priv->card; |
82 | u32 addr = card->tmd_io; | ||
83 | unsigned long timeout; | 65 | unsigned long timeout; |
84 | u16 reg; | 66 | u16 reg; |
85 | 67 | ||
86 | outb(COR_VALUE | COR_RESET, addr); | 68 | iowrite8(COR_VALUE | COR_RESET, card->bridge_io); |
87 | mdelay(1); | 69 | mdelay(1); |
88 | 70 | ||
89 | outb(COR_VALUE, addr); | 71 | iowrite8(COR_VALUE, card->bridge_io); |
90 | mdelay(1); | 72 | mdelay(1); |
91 | 73 | ||
92 | /* Just in case, wait more until the card is no longer busy */ | 74 | /* Just in case, wait more until the card is no longer busy */ |
@@ -97,7 +79,7 @@ static int orinoco_tmd_cor_reset(struct orinoco_private *priv) | |||
97 | reg = hermes_read_regn(hw, CMD); | 79 | reg = hermes_read_regn(hw, CMD); |
98 | } | 80 | } |
99 | 81 | ||
100 | /* Did we timeout ? */ | 82 | /* Still busy? */ |
101 | if (reg & HERMES_CMD_BUSY) { | 83 | if (reg & HERMES_CMD_BUSY) { |
102 | printk(KERN_ERR PFX "Busy timeout\n"); | 84 | printk(KERN_ERR PFX "Busy timeout\n"); |
103 | return -ETIMEDOUT; | 85 | return -ETIMEDOUT; |
@@ -110,11 +92,11 @@ static int orinoco_tmd_cor_reset(struct orinoco_private *priv) | |||
110 | static int orinoco_tmd_init_one(struct pci_dev *pdev, | 92 | static int orinoco_tmd_init_one(struct pci_dev *pdev, |
111 | const struct pci_device_id *ent) | 93 | const struct pci_device_id *ent) |
112 | { | 94 | { |
113 | int err = 0; | 95 | int err; |
114 | struct orinoco_private *priv = NULL; | 96 | struct orinoco_private *priv; |
115 | struct orinoco_tmd_card *card; | 97 | struct orinoco_pci_card *card; |
116 | struct net_device *dev = NULL; | 98 | struct net_device *dev; |
117 | void __iomem *mem; | 99 | void __iomem *hermes_io, *bridge_io; |
118 | 100 | ||
119 | err = pci_enable_device(pdev); | 101 | err = pci_enable_device(pdev); |
120 | if (err) { | 102 | if (err) { |
@@ -123,20 +105,28 @@ static int orinoco_tmd_init_one(struct pci_dev *pdev, | |||
123 | } | 105 | } |
124 | 106 | ||
125 | err = pci_request_regions(pdev, DRIVER_NAME); | 107 | err = pci_request_regions(pdev, DRIVER_NAME); |
126 | if (err != 0) { | 108 | if (err) { |
127 | printk(KERN_ERR PFX "Cannot obtain PCI resources\n"); | 109 | printk(KERN_ERR PFX "Cannot obtain PCI resources\n"); |
128 | goto fail_resources; | 110 | goto fail_resources; |
129 | } | 111 | } |
130 | 112 | ||
131 | mem = pci_iomap(pdev, 2, 0); | 113 | bridge_io = pci_iomap(pdev, 1, 0); |
132 | if (! mem) { | 114 | if (!bridge_io) { |
133 | err = -ENOMEM; | 115 | printk(KERN_ERR PFX "Cannot map bridge registers\n"); |
134 | goto fail_iomap; | 116 | err = -EIO; |
117 | goto fail_map_bridge; | ||
118 | } | ||
119 | |||
120 | hermes_io = pci_iomap(pdev, 2, 0); | ||
121 | if (!hermes_io) { | ||
122 | printk(KERN_ERR PFX "Cannot map chipset registers\n"); | ||
123 | err = -EIO; | ||
124 | goto fail_map_hermes; | ||
135 | } | 125 | } |
136 | 126 | ||
137 | /* Allocate network device */ | 127 | /* Allocate network device */ |
138 | dev = alloc_orinocodev(sizeof(*card), orinoco_tmd_cor_reset); | 128 | dev = alloc_orinocodev(sizeof(*card), orinoco_tmd_cor_reset); |
139 | if (! dev) { | 129 | if (!dev) { |
140 | printk(KERN_ERR PFX "Cannot allocate network device\n"); | 130 | printk(KERN_ERR PFX "Cannot allocate network device\n"); |
141 | err = -ENOMEM; | 131 | err = -ENOMEM; |
142 | goto fail_alloc; | 132 | goto fail_alloc; |
@@ -144,16 +134,11 @@ static int orinoco_tmd_init_one(struct pci_dev *pdev, | |||
144 | 134 | ||
145 | priv = netdev_priv(dev); | 135 | priv = netdev_priv(dev); |
146 | card = priv->card; | 136 | card = priv->card; |
147 | card->tmd_io = pci_resource_start(pdev, 1); | 137 | card->bridge_io = bridge_io; |
148 | dev->base_addr = pci_resource_start(pdev, 2); | ||
149 | SET_MODULE_OWNER(dev); | 138 | SET_MODULE_OWNER(dev); |
150 | SET_NETDEV_DEV(dev, &pdev->dev); | 139 | SET_NETDEV_DEV(dev, &pdev->dev); |
151 | 140 | ||
152 | hermes_struct_init(&priv->hw, mem, HERMES_16BIT_REGSPACING); | 141 | hermes_struct_init(&priv->hw, hermes_io, HERMES_16BIT_REGSPACING); |
153 | |||
154 | printk(KERN_DEBUG PFX "Detected Orinoco/Prism2 TMD device " | ||
155 | "at %s irq:%d, io addr:0x%lx\n", pci_name(pdev), pdev->irq, | ||
156 | dev->base_addr); | ||
157 | 142 | ||
158 | err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ, | 143 | err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ, |
159 | dev->name, dev); | 144 | dev->name, dev); |
@@ -162,7 +147,6 @@ static int orinoco_tmd_init_one(struct pci_dev *pdev, | |||
162 | err = -EBUSY; | 147 | err = -EBUSY; |
163 | goto fail_irq; | 148 | goto fail_irq; |
164 | } | 149 | } |
165 | dev->irq = pdev->irq; | ||
166 | 150 | ||
167 | err = orinoco_tmd_cor_reset(priv); | 151 | err = orinoco_tmd_cor_reset(priv); |
168 | if (err) { | 152 | if (err) { |
@@ -177,6 +161,8 @@ static int orinoco_tmd_init_one(struct pci_dev *pdev, | |||
177 | } | 161 | } |
178 | 162 | ||
179 | pci_set_drvdata(pdev, dev); | 163 | pci_set_drvdata(pdev, dev); |
164 | printk(KERN_DEBUG "%s: " DRIVER_NAME " at %s\n", dev->name, | ||
165 | pci_name(pdev)); | ||
180 | 166 | ||
181 | return 0; | 167 | return 0; |
182 | 168 | ||
@@ -188,9 +174,12 @@ static int orinoco_tmd_init_one(struct pci_dev *pdev, | |||
188 | free_orinocodev(dev); | 174 | free_orinocodev(dev); |
189 | 175 | ||
190 | fail_alloc: | 176 | fail_alloc: |
191 | pci_iounmap(pdev, mem); | 177 | pci_iounmap(pdev, hermes_io); |
178 | |||
179 | fail_map_hermes: | ||
180 | pci_iounmap(pdev, bridge_io); | ||
192 | 181 | ||
193 | fail_iomap: | 182 | fail_map_bridge: |
194 | pci_release_regions(pdev); | 183 | pci_release_regions(pdev); |
195 | 184 | ||
196 | fail_resources: | 185 | fail_resources: |
@@ -203,31 +192,32 @@ static void __devexit orinoco_tmd_remove_one(struct pci_dev *pdev) | |||
203 | { | 192 | { |
204 | struct net_device *dev = pci_get_drvdata(pdev); | 193 | struct net_device *dev = pci_get_drvdata(pdev); |
205 | struct orinoco_private *priv = dev->priv; | 194 | struct orinoco_private *priv = dev->priv; |
206 | 195 | struct orinoco_pci_card *card = priv->card; | |
207 | BUG_ON(! dev); | ||
208 | 196 | ||
209 | unregister_netdev(dev); | 197 | unregister_netdev(dev); |
210 | free_irq(dev->irq, dev); | 198 | free_irq(pdev->irq, dev); |
211 | pci_set_drvdata(pdev, NULL); | 199 | pci_set_drvdata(pdev, NULL); |
212 | free_orinocodev(dev); | 200 | free_orinocodev(dev); |
213 | pci_iounmap(pdev, priv->hw.iobase); | 201 | pci_iounmap(pdev, priv->hw.iobase); |
202 | pci_iounmap(pdev, card->bridge_io); | ||
214 | pci_release_regions(pdev); | 203 | pci_release_regions(pdev); |
215 | pci_disable_device(pdev); | 204 | pci_disable_device(pdev); |
216 | } | 205 | } |
217 | 206 | ||
218 | 207 | static struct pci_device_id orinoco_tmd_id_table[] = { | |
219 | static struct pci_device_id orinoco_tmd_pci_id_table[] = { | ||
220 | {0x15e8, 0x0131, PCI_ANY_ID, PCI_ANY_ID,}, /* NDC and OEMs, e.g. pheecom */ | 208 | {0x15e8, 0x0131, PCI_ANY_ID, PCI_ANY_ID,}, /* NDC and OEMs, e.g. pheecom */ |
221 | {0,}, | 209 | {0,}, |
222 | }; | 210 | }; |
223 | 211 | ||
224 | MODULE_DEVICE_TABLE(pci, orinoco_tmd_pci_id_table); | 212 | MODULE_DEVICE_TABLE(pci, orinoco_tmd_id_table); |
225 | 213 | ||
226 | static struct pci_driver orinoco_tmd_driver = { | 214 | static struct pci_driver orinoco_tmd_driver = { |
227 | .name = DRIVER_NAME, | 215 | .name = DRIVER_NAME, |
228 | .id_table = orinoco_tmd_pci_id_table, | 216 | .id_table = orinoco_tmd_id_table, |
229 | .probe = orinoco_tmd_init_one, | 217 | .probe = orinoco_tmd_init_one, |
230 | .remove = __devexit_p(orinoco_tmd_remove_one), | 218 | .remove = __devexit_p(orinoco_tmd_remove_one), |
219 | .suspend = orinoco_pci_suspend, | ||
220 | .resume = orinoco_pci_resume, | ||
231 | }; | 221 | }; |
232 | 222 | ||
233 | static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION | 223 | static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION |
@@ -245,7 +235,6 @@ static int __init orinoco_tmd_init(void) | |||
245 | static void __exit orinoco_tmd_exit(void) | 235 | static void __exit orinoco_tmd_exit(void) |
246 | { | 236 | { |
247 | pci_unregister_driver(&orinoco_tmd_driver); | 237 | pci_unregister_driver(&orinoco_tmd_driver); |
248 | ssleep(1); | ||
249 | } | 238 | } |
250 | 239 | ||
251 | module_init(orinoco_tmd_init); | 240 | module_init(orinoco_tmd_init); |
diff --git a/drivers/net/wireless/spectrum_cs.c b/drivers/net/wireless/spectrum_cs.c index f7b77ce54d7b..7f9aa139c347 100644 --- a/drivers/net/wireless/spectrum_cs.c +++ b/drivers/net/wireless/spectrum_cs.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Driver for 802.11b cards using RAM-loadable Symbol firmware, such as | 2 | * Driver for 802.11b cards using RAM-loadable Symbol firmware, such as |
3 | * Symbol Wireless Networker LA4100, CompactFlash cards by Socket | 3 | * Symbol Wireless Networker LA4137, CompactFlash cards by Socket |
4 | * Communications and Intel PRO/Wireless 2011B. | 4 | * Communications and Intel PRO/Wireless 2011B. |
5 | * | 5 | * |
6 | * The driver implements Symbol firmware download. The rest is handled | 6 | * The driver implements Symbol firmware download. The rest is handled |
@@ -120,8 +120,8 @@ static void spectrum_cs_release(struct pcmcia_device *link); | |||
120 | * Each block has the following structure. | 120 | * Each block has the following structure. |
121 | */ | 121 | */ |
122 | struct dblock { | 122 | struct dblock { |
123 | __le32 _addr; /* adapter address where to write the block */ | 123 | __le32 addr; /* adapter address where to write the block */ |
124 | __le16 _len; /* length of the data only, in bytes */ | 124 | __le16 len; /* length of the data only, in bytes */ |
125 | char data[0]; /* data to be written */ | 125 | char data[0]; /* data to be written */ |
126 | } __attribute__ ((packed)); | 126 | } __attribute__ ((packed)); |
127 | 127 | ||
@@ -131,9 +131,9 @@ struct dblock { | |||
131 | * items with matching ID should be written. | 131 | * items with matching ID should be written. |
132 | */ | 132 | */ |
133 | struct pdr { | 133 | struct pdr { |
134 | __le32 _id; /* record ID */ | 134 | __le32 id; /* record ID */ |
135 | __le32 _addr; /* adapter address where to write the data */ | 135 | __le32 addr; /* adapter address where to write the data */ |
136 | __le32 _len; /* expected length of the data, in bytes */ | 136 | __le32 len; /* expected length of the data, in bytes */ |
137 | char next[0]; /* next PDR starts here */ | 137 | char next[0]; /* next PDR starts here */ |
138 | } __attribute__ ((packed)); | 138 | } __attribute__ ((packed)); |
139 | 139 | ||
@@ -144,8 +144,8 @@ struct pdr { | |||
144 | * be plugged into the secondary firmware. | 144 | * be plugged into the secondary firmware. |
145 | */ | 145 | */ |
146 | struct pdi { | 146 | struct pdi { |
147 | __le16 _len; /* length of ID and data, in words */ | 147 | __le16 len; /* length of ID and data, in words */ |
148 | __le16 _id; /* record ID */ | 148 | __le16 id; /* record ID */ |
149 | char data[0]; /* plug data */ | 149 | char data[0]; /* plug data */ |
150 | } __attribute__ ((packed)); | 150 | } __attribute__ ((packed)); |
151 | 151 | ||
@@ -154,44 +154,44 @@ struct pdi { | |||
154 | static inline u32 | 154 | static inline u32 |
155 | dblock_addr(const struct dblock *blk) | 155 | dblock_addr(const struct dblock *blk) |
156 | { | 156 | { |
157 | return le32_to_cpu(blk->_addr); | 157 | return le32_to_cpu(blk->addr); |
158 | } | 158 | } |
159 | 159 | ||
160 | static inline u32 | 160 | static inline u32 |
161 | dblock_len(const struct dblock *blk) | 161 | dblock_len(const struct dblock *blk) |
162 | { | 162 | { |
163 | return le16_to_cpu(blk->_len); | 163 | return le16_to_cpu(blk->len); |
164 | } | 164 | } |
165 | 165 | ||
166 | static inline u32 | 166 | static inline u32 |
167 | pdr_id(const struct pdr *pdr) | 167 | pdr_id(const struct pdr *pdr) |
168 | { | 168 | { |
169 | return le32_to_cpu(pdr->_id); | 169 | return le32_to_cpu(pdr->id); |
170 | } | 170 | } |
171 | 171 | ||
172 | static inline u32 | 172 | static inline u32 |
173 | pdr_addr(const struct pdr *pdr) | 173 | pdr_addr(const struct pdr *pdr) |
174 | { | 174 | { |
175 | return le32_to_cpu(pdr->_addr); | 175 | return le32_to_cpu(pdr->addr); |
176 | } | 176 | } |
177 | 177 | ||
178 | static inline u32 | 178 | static inline u32 |
179 | pdr_len(const struct pdr *pdr) | 179 | pdr_len(const struct pdr *pdr) |
180 | { | 180 | { |
181 | return le32_to_cpu(pdr->_len); | 181 | return le32_to_cpu(pdr->len); |
182 | } | 182 | } |
183 | 183 | ||
184 | static inline u32 | 184 | static inline u32 |
185 | pdi_id(const struct pdi *pdi) | 185 | pdi_id(const struct pdi *pdi) |
186 | { | 186 | { |
187 | return le16_to_cpu(pdi->_id); | 187 | return le16_to_cpu(pdi->id); |
188 | } | 188 | } |
189 | 189 | ||
190 | /* Return length of the data only, in bytes */ | 190 | /* Return length of the data only, in bytes */ |
191 | static inline u32 | 191 | static inline u32 |
192 | pdi_len(const struct pdi *pdi) | 192 | pdi_len(const struct pdi *pdi) |
193 | { | 193 | { |
194 | return 2 * (le16_to_cpu(pdi->_len) - 1); | 194 | return 2 * (le16_to_cpu(pdi->len) - 1); |
195 | } | 195 | } |
196 | 196 | ||
197 | 197 | ||
@@ -343,8 +343,7 @@ spectrum_plug_pdi(hermes_t *hw, struct pdr *first_pdr, struct pdi *pdi) | |||
343 | 343 | ||
344 | /* do the actual plugging */ | 344 | /* do the actual plugging */ |
345 | spectrum_aux_setaddr(hw, pdr_addr(pdr)); | 345 | spectrum_aux_setaddr(hw, pdr_addr(pdr)); |
346 | hermes_write_words(hw, HERMES_AUXDATA, pdi->data, | 346 | hermes_write_bytes(hw, HERMES_AUXDATA, pdi->data, pdi_len(pdi)); |
347 | pdi_len(pdi) / 2); | ||
348 | 347 | ||
349 | return 0; | 348 | return 0; |
350 | } | 349 | } |
@@ -424,8 +423,8 @@ spectrum_load_blocks(hermes_t *hw, const struct dblock *first_block) | |||
424 | 423 | ||
425 | while (dblock_addr(blk) != BLOCK_END) { | 424 | while (dblock_addr(blk) != BLOCK_END) { |
426 | spectrum_aux_setaddr(hw, blkaddr); | 425 | spectrum_aux_setaddr(hw, blkaddr); |
427 | hermes_write_words(hw, HERMES_AUXDATA, blk->data, | 426 | hermes_write_bytes(hw, HERMES_AUXDATA, blk->data, |
428 | blklen / 2); | 427 | blklen); |
429 | 428 | ||
430 | blk = (struct dblock *) &blk->data[blklen]; | 429 | blk = (struct dblock *) &blk->data[blklen]; |
431 | blkaddr = dblock_addr(blk); | 430 | blkaddr = dblock_addr(blk); |
@@ -626,14 +625,11 @@ static void spectrum_cs_detach(struct pcmcia_device *link) | |||
626 | { | 625 | { |
627 | struct net_device *dev = link->priv; | 626 | struct net_device *dev = link->priv; |
628 | 627 | ||
628 | if (link->dev_node) | ||
629 | unregister_netdev(dev); | ||
630 | |||
629 | spectrum_cs_release(link); | 631 | spectrum_cs_release(link); |
630 | 632 | ||
631 | DEBUG(0, PFX "detach: link=%p link->dev_node=%p\n", link, link->dev_node); | ||
632 | if (link->dev_node) { | ||
633 | DEBUG(0, PFX "About to unregister net device %p\n", | ||
634 | dev); | ||
635 | unregister_netdev(dev); | ||
636 | } | ||
637 | free_orinocodev(dev); | 633 | free_orinocodev(dev); |
638 | } /* spectrum_cs_detach */ | 634 | } /* spectrum_cs_detach */ |
639 | 635 | ||
@@ -653,13 +649,10 @@ spectrum_cs_config(struct pcmcia_device *link) | |||
653 | int last_fn, last_ret; | 649 | int last_fn, last_ret; |
654 | u_char buf[64]; | 650 | u_char buf[64]; |
655 | config_info_t conf; | 651 | config_info_t conf; |
656 | cisinfo_t info; | ||
657 | tuple_t tuple; | 652 | tuple_t tuple; |
658 | cisparse_t parse; | 653 | cisparse_t parse; |
659 | void __iomem *mem; | 654 | void __iomem *mem; |
660 | 655 | ||
661 | CS_CHECK(ValidateCIS, pcmcia_validate_cis(link, &info)); | ||
662 | |||
663 | /* | 656 | /* |
664 | * This reads the card's CONFIG tuple to find its | 657 | * This reads the card's CONFIG tuple to find its |
665 | * configuration registers. | 658 | * configuration registers. |
@@ -709,12 +702,6 @@ spectrum_cs_config(struct pcmcia_device *link) | |||
709 | goto next_entry; | 702 | goto next_entry; |
710 | link->conf.ConfigIndex = cfg->index; | 703 | link->conf.ConfigIndex = cfg->index; |
711 | 704 | ||
712 | /* Does this card need audio output? */ | ||
713 | if (cfg->flags & CISTPL_CFTABLE_AUDIO) { | ||
714 | link->conf.Attributes |= CONF_ENABLE_SPKR; | ||
715 | link->conf.Status = CCSR_AUDIO_ENA; | ||
716 | } | ||
717 | |||
718 | /* Use power settings for Vcc and Vpp if present */ | 705 | /* Use power settings for Vcc and Vpp if present */ |
719 | /* Note that the CIS values need to be rescaled */ | 706 | /* Note that the CIS values need to be rescaled */ |
720 | if (cfg->vcc.present & (1 << CISTPL_POWER_VNOM)) { | 707 | if (cfg->vcc.present & (1 << CISTPL_POWER_VNOM)) { |
@@ -835,19 +822,10 @@ spectrum_cs_config(struct pcmcia_device *link) | |||
835 | net_device has been registered */ | 822 | net_device has been registered */ |
836 | 823 | ||
837 | /* Finally, report what we've done */ | 824 | /* Finally, report what we've done */ |
838 | printk(KERN_DEBUG "%s: index 0x%02x: ", | 825 | printk(KERN_DEBUG "%s: " DRIVER_NAME " at %s, irq %d, io " |
839 | dev->name, link->conf.ConfigIndex); | 826 | "0x%04x-0x%04x\n", dev->name, dev->class_dev.dev->bus_id, |
840 | if (link->conf.Vpp) | 827 | link->irq.AssignedIRQ, link->io.BasePort1, |
841 | printk(", Vpp %d.%d", link->conf.Vpp / 10, | 828 | link->io.BasePort1 + link->io.NumPorts1 - 1); |
842 | link->conf.Vpp % 10); | ||
843 | printk(", irq %d", link->irq.AssignedIRQ); | ||
844 | if (link->io.NumPorts1) | ||
845 | printk(", io 0x%04x-0x%04x", link->io.BasePort1, | ||
846 | link->io.BasePort1 + link->io.NumPorts1 - 1); | ||
847 | if (link->io.NumPorts2) | ||
848 | printk(" & 0x%04x-0x%04x", link->io.BasePort2, | ||
849 | link->io.BasePort2 + link->io.NumPorts2 - 1); | ||
850 | printk("\n"); | ||
851 | 829 | ||
852 | return 0; | 830 | return 0; |
853 | 831 | ||
@@ -888,11 +866,10 @@ spectrum_cs_suspend(struct pcmcia_device *link) | |||
888 | { | 866 | { |
889 | struct net_device *dev = link->priv; | 867 | struct net_device *dev = link->priv; |
890 | struct orinoco_private *priv = netdev_priv(dev); | 868 | struct orinoco_private *priv = netdev_priv(dev); |
891 | unsigned long flags; | ||
892 | int err = 0; | 869 | int err = 0; |
893 | 870 | ||
894 | /* Mark the device as stopped, to block IO until later */ | 871 | /* Mark the device as stopped, to block IO until later */ |
895 | spin_lock_irqsave(&priv->lock, flags); | 872 | spin_lock(&priv->lock); |
896 | 873 | ||
897 | err = __orinoco_down(dev); | 874 | err = __orinoco_down(dev); |
898 | if (err) | 875 | if (err) |
@@ -902,9 +879,9 @@ spectrum_cs_suspend(struct pcmcia_device *link) | |||
902 | netif_device_detach(dev); | 879 | netif_device_detach(dev); |
903 | priv->hw_unavailable++; | 880 | priv->hw_unavailable++; |
904 | 881 | ||
905 | spin_unlock_irqrestore(&priv->lock, flags); | 882 | spin_unlock(&priv->lock); |
906 | 883 | ||
907 | return 0; | 884 | return err; |
908 | } | 885 | } |
909 | 886 | ||
910 | static int | 887 | static int |
@@ -932,7 +909,7 @@ static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION | |||
932 | " David Gibson <hermes@gibson.dropbear.id.au>, et al)"; | 909 | " David Gibson <hermes@gibson.dropbear.id.au>, et al)"; |
933 | 910 | ||
934 | static struct pcmcia_device_id spectrum_cs_ids[] = { | 911 | static struct pcmcia_device_id spectrum_cs_ids[] = { |
935 | PCMCIA_DEVICE_MANF_CARD(0x026c, 0x0001), /* Symbol Spectrum24 LA4100 */ | 912 | PCMCIA_DEVICE_MANF_CARD(0x026c, 0x0001), /* Symbol Spectrum24 LA4137 */ |
936 | PCMCIA_DEVICE_MANF_CARD(0x0104, 0x0001), /* Socket Communications CF */ | 913 | PCMCIA_DEVICE_MANF_CARD(0x0104, 0x0001), /* Socket Communications CF */ |
937 | PCMCIA_DEVICE_PROD_ID12("Intel", "PRO/Wireless LAN PC Card", 0x816cc815, 0x6fbf459a), /* 2011B, not 2011 */ | 914 | PCMCIA_DEVICE_PROD_ID12("Intel", "PRO/Wireless LAN PC Card", 0x816cc815, 0x6fbf459a), /* 2011B, not 2011 */ |
938 | PCMCIA_DEVICE_NULL, | 915 | PCMCIA_DEVICE_NULL, |
diff --git a/drivers/net/wireless/zd1201.c b/drivers/net/wireless/zd1201.c new file mode 100644 index 000000000000..662ecc8a33ff --- /dev/null +++ b/drivers/net/wireless/zd1201.c | |||
@@ -0,0 +1,1929 @@ | |||
1 | /* | ||
2 | * Driver for ZyDAS zd1201 based wireless USB devices. | ||
3 | * | ||
4 | * Copyright (c) 2004, 2005 Jeroen Vreeken (pe1rxq@amsat.org) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * version 2 as published by the Free Software Foundation. | ||
9 | * | ||
10 | * Parts of this driver have been derived from a wlan-ng version | ||
11 | * modified by ZyDAS. They also made documentation available, thanks! | ||
12 | * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved. | ||
13 | */ | ||
14 | |||
15 | #include <linux/module.h> | ||
16 | #include <linux/usb.h> | ||
17 | #include <linux/netdevice.h> | ||
18 | #include <linux/etherdevice.h> | ||
19 | #include <linux/wireless.h> | ||
20 | #include <net/iw_handler.h> | ||
21 | #include <linux/string.h> | ||
22 | #include <linux/if_arp.h> | ||
23 | #include <linux/firmware.h> | ||
24 | #include <net/ieee80211.h> | ||
25 | #include "zd1201.h" | ||
26 | |||
27 | static struct usb_device_id zd1201_table[] = { | ||
28 | {USB_DEVICE(0x0586, 0x3400)}, /* Peabird Wireless USB Adapter */ | ||
29 | {USB_DEVICE(0x0ace, 0x1201)}, /* ZyDAS ZD1201 Wireless USB Adapter */ | ||
30 | {USB_DEVICE(0x050d, 0x6051)}, /* Belkin F5D6051 usb adapter */ | ||
31 | {USB_DEVICE(0x0db0, 0x6823)}, /* MSI UB11B usb adapter */ | ||
32 | {USB_DEVICE(0x1044, 0x8005)}, /* GIGABYTE GN-WLBZ201 usb adapter */ | ||
33 | {} | ||
34 | }; | ||
35 | |||
36 | static int ap; /* Are we an AP or a normal station? */ | ||
37 | |||
38 | #define ZD1201_VERSION "0.15" | ||
39 | |||
40 | MODULE_AUTHOR("Jeroen Vreeken <pe1rxq@amsat.org>"); | ||
41 | MODULE_DESCRIPTION("Driver for ZyDAS ZD1201 based USB Wireless adapters"); | ||
42 | MODULE_VERSION(ZD1201_VERSION); | ||
43 | MODULE_LICENSE("GPL"); | ||
44 | module_param(ap, int, 0); | ||
45 | MODULE_PARM_DESC(ap, "If non-zero Access Point firmware will be loaded"); | ||
46 | MODULE_DEVICE_TABLE(usb, zd1201_table); | ||
47 | |||
48 | |||
49 | static int zd1201_fw_upload(struct usb_device *dev, int apfw) | ||
50 | { | ||
51 | const struct firmware *fw_entry; | ||
52 | char *data; | ||
53 | unsigned long len; | ||
54 | int err; | ||
55 | unsigned char ret; | ||
56 | char *buf; | ||
57 | char *fwfile; | ||
58 | |||
59 | if (apfw) | ||
60 | fwfile = "zd1201-ap.fw"; | ||
61 | else | ||
62 | fwfile = "zd1201.fw"; | ||
63 | |||
64 | err = request_firmware(&fw_entry, fwfile, &dev->dev); | ||
65 | if (err) { | ||
66 | dev_err(&dev->dev, "Failed to load %s firmware file!\n", fwfile); | ||
67 | dev_err(&dev->dev, "Make sure the hotplug firmware loader is installed.\n"); | ||
68 | dev_err(&dev->dev, "Goto http://linux-lc100020.sourceforge.net for more info.\n"); | ||
69 | return err; | ||
70 | } | ||
71 | |||
72 | data = fw_entry->data; | ||
73 | len = fw_entry->size; | ||
74 | |||
75 | buf = kmalloc(1024, GFP_ATOMIC); | ||
76 | if (!buf) | ||
77 | goto exit; | ||
78 | |||
79 | while (len > 0) { | ||
80 | int translen = (len > 1024) ? 1024 : len; | ||
81 | memcpy(buf, data, translen); | ||
82 | |||
83 | err = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), 0, | ||
84 | USB_DIR_OUT | 0x40, 0, 0, buf, translen, | ||
85 | ZD1201_FW_TIMEOUT); | ||
86 | if (err < 0) | ||
87 | goto exit; | ||
88 | |||
89 | len -= translen; | ||
90 | data += translen; | ||
91 | } | ||
92 | |||
93 | err = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), 0x2, | ||
94 | USB_DIR_OUT | 0x40, 0, 0, NULL, 0, ZD1201_FW_TIMEOUT); | ||
95 | if (err < 0) | ||
96 | goto exit; | ||
97 | |||
98 | err = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), 0x4, | ||
99 | USB_DIR_IN | 0x40, 0,0, &ret, sizeof(ret), ZD1201_FW_TIMEOUT); | ||
100 | if (err < 0) | ||
101 | goto exit; | ||
102 | |||
103 | if (ret & 0x80) { | ||
104 | err = -EIO; | ||
105 | goto exit; | ||
106 | } | ||
107 | |||
108 | err = 0; | ||
109 | exit: | ||
110 | kfree(buf); | ||
111 | release_firmware(fw_entry); | ||
112 | return err; | ||
113 | } | ||
114 | |||
115 | static void zd1201_usbfree(struct urb *urb, struct pt_regs *regs) | ||
116 | { | ||
117 | struct zd1201 *zd = urb->context; | ||
118 | |||
119 | switch(urb->status) { | ||
120 | case -EILSEQ: | ||
121 | case -ENODEV: | ||
122 | case -ETIMEDOUT: | ||
123 | case -ENOENT: | ||
124 | case -EPIPE: | ||
125 | case -EOVERFLOW: | ||
126 | case -ESHUTDOWN: | ||
127 | dev_warn(&zd->usb->dev, "%s: urb failed: %d\n", | ||
128 | zd->dev->name, urb->status); | ||
129 | } | ||
130 | |||
131 | kfree(urb->transfer_buffer); | ||
132 | usb_free_urb(urb); | ||
133 | return; | ||
134 | } | ||
135 | |||
136 | /* cmdreq message: | ||
137 | u32 type | ||
138 | u16 cmd | ||
139 | u16 parm0 | ||
140 | u16 parm1 | ||
141 | u16 parm2 | ||
142 | u8 pad[4] | ||
143 | |||
144 | total: 4 + 2 + 2 + 2 + 2 + 4 = 16 | ||
145 | */ | ||
146 | static int zd1201_docmd(struct zd1201 *zd, int cmd, int parm0, | ||
147 | int parm1, int parm2) | ||
148 | { | ||
149 | unsigned char *command; | ||
150 | int ret; | ||
151 | struct urb *urb; | ||
152 | |||
153 | command = kmalloc(16, GFP_ATOMIC); | ||
154 | if (!command) | ||
155 | return -ENOMEM; | ||
156 | |||
157 | *((__le32*)command) = cpu_to_le32(ZD1201_USB_CMDREQ); | ||
158 | *((__le16*)&command[4]) = cpu_to_le16(cmd); | ||
159 | *((__le16*)&command[6]) = cpu_to_le16(parm0); | ||
160 | *((__le16*)&command[8]) = cpu_to_le16(parm1); | ||
161 | *((__le16*)&command[10])= cpu_to_le16(parm2); | ||
162 | |||
163 | urb = usb_alloc_urb(0, GFP_ATOMIC); | ||
164 | if (!urb) { | ||
165 | kfree(command); | ||
166 | return -ENOMEM; | ||
167 | } | ||
168 | usb_fill_bulk_urb(urb, zd->usb, usb_sndbulkpipe(zd->usb, zd->endp_out2), | ||
169 | command, 16, zd1201_usbfree, zd); | ||
170 | ret = usb_submit_urb(urb, GFP_ATOMIC); | ||
171 | if (ret) { | ||
172 | kfree(command); | ||
173 | usb_free_urb(urb); | ||
174 | } | ||
175 | |||
176 | return ret; | ||
177 | } | ||
178 | |||
179 | /* Callback after sending out a packet */ | ||
180 | static void zd1201_usbtx(struct urb *urb, struct pt_regs *regs) | ||
181 | { | ||
182 | struct zd1201 *zd = urb->context; | ||
183 | netif_wake_queue(zd->dev); | ||
184 | return; | ||
185 | } | ||
186 | |||
187 | /* Incoming data */ | ||
188 | static void zd1201_usbrx(struct urb *urb, struct pt_regs *regs) | ||
189 | { | ||
190 | struct zd1201 *zd = urb->context; | ||
191 | int free = 0; | ||
192 | unsigned char *data = urb->transfer_buffer; | ||
193 | struct sk_buff *skb; | ||
194 | unsigned char type; | ||
195 | |||
196 | if (!zd) { | ||
197 | free = 1; | ||
198 | goto exit; | ||
199 | } | ||
200 | |||
201 | switch(urb->status) { | ||
202 | case -EILSEQ: | ||
203 | case -ENODEV: | ||
204 | case -ETIMEDOUT: | ||
205 | case -ENOENT: | ||
206 | case -EPIPE: | ||
207 | case -EOVERFLOW: | ||
208 | case -ESHUTDOWN: | ||
209 | dev_warn(&zd->usb->dev, "%s: rx urb failed: %d\n", | ||
210 | zd->dev->name, urb->status); | ||
211 | free = 1; | ||
212 | goto exit; | ||
213 | } | ||
214 | |||
215 | if (urb->status != 0 || urb->actual_length == 0) | ||
216 | goto resubmit; | ||
217 | |||
218 | type = data[0]; | ||
219 | if (type == ZD1201_PACKET_EVENTSTAT || type == ZD1201_PACKET_RESOURCE) { | ||
220 | memcpy(zd->rxdata, data, urb->actual_length); | ||
221 | zd->rxlen = urb->actual_length; | ||
222 | zd->rxdatas = 1; | ||
223 | wake_up(&zd->rxdataq); | ||
224 | } | ||
225 | /* Info frame */ | ||
226 | if (type == ZD1201_PACKET_INQUIRE) { | ||
227 | int i = 0; | ||
228 | unsigned short infotype, framelen, copylen; | ||
229 | framelen = le16_to_cpu(*(__le16*)&data[4]); | ||
230 | infotype = le16_to_cpu(*(__le16*)&data[6]); | ||
231 | |||
232 | if (infotype == ZD1201_INF_LINKSTATUS) { | ||
233 | short linkstatus; | ||
234 | |||
235 | linkstatus = le16_to_cpu(*(__le16*)&data[8]); | ||
236 | switch(linkstatus) { | ||
237 | case 1: | ||
238 | netif_carrier_on(zd->dev); | ||
239 | break; | ||
240 | case 2: | ||
241 | netif_carrier_off(zd->dev); | ||
242 | break; | ||
243 | case 3: | ||
244 | netif_carrier_off(zd->dev); | ||
245 | break; | ||
246 | case 4: | ||
247 | netif_carrier_on(zd->dev); | ||
248 | break; | ||
249 | default: | ||
250 | netif_carrier_off(zd->dev); | ||
251 | } | ||
252 | goto resubmit; | ||
253 | } | ||
254 | if (infotype == ZD1201_INF_ASSOCSTATUS) { | ||
255 | short status = le16_to_cpu(*(__le16*)(data+8)); | ||
256 | int event; | ||
257 | union iwreq_data wrqu; | ||
258 | |||
259 | switch (status) { | ||
260 | case ZD1201_ASSOCSTATUS_STAASSOC: | ||
261 | case ZD1201_ASSOCSTATUS_REASSOC: | ||
262 | event = IWEVREGISTERED; | ||
263 | break; | ||
264 | case ZD1201_ASSOCSTATUS_DISASSOC: | ||
265 | case ZD1201_ASSOCSTATUS_ASSOCFAIL: | ||
266 | case ZD1201_ASSOCSTATUS_AUTHFAIL: | ||
267 | default: | ||
268 | event = IWEVEXPIRED; | ||
269 | } | ||
270 | memcpy(wrqu.addr.sa_data, data+10, ETH_ALEN); | ||
271 | wrqu.addr.sa_family = ARPHRD_ETHER; | ||
272 | |||
273 | /* Send event to user space */ | ||
274 | wireless_send_event(zd->dev, event, &wrqu, NULL); | ||
275 | |||
276 | goto resubmit; | ||
277 | } | ||
278 | if (infotype == ZD1201_INF_AUTHREQ) { | ||
279 | union iwreq_data wrqu; | ||
280 | |||
281 | memcpy(wrqu.addr.sa_data, data+8, ETH_ALEN); | ||
282 | wrqu.addr.sa_family = ARPHRD_ETHER; | ||
283 | /* There isn't a event that trully fits this request. | ||
284 | We assume that userspace will be smart enough to | ||
285 | see a new station being expired and sends back a | ||
286 | authstation ioctl to authorize it. */ | ||
287 | wireless_send_event(zd->dev, IWEVEXPIRED, &wrqu, NULL); | ||
288 | goto resubmit; | ||
289 | } | ||
290 | /* Other infotypes are handled outside this handler */ | ||
291 | zd->rxlen = 0; | ||
292 | while (i < urb->actual_length) { | ||
293 | copylen = le16_to_cpu(*(__le16*)&data[i+2]); | ||
294 | /* Sanity check, sometimes we get junk */ | ||
295 | if (copylen+zd->rxlen > sizeof(zd->rxdata)) | ||
296 | break; | ||
297 | memcpy(zd->rxdata+zd->rxlen, data+i+4, copylen); | ||
298 | zd->rxlen += copylen; | ||
299 | i += 64; | ||
300 | } | ||
301 | if (i >= urb->actual_length) { | ||
302 | zd->rxdatas = 1; | ||
303 | wake_up(&zd->rxdataq); | ||
304 | } | ||
305 | goto resubmit; | ||
306 | } | ||
307 | /* Actual data */ | ||
308 | if (data[urb->actual_length-1] == ZD1201_PACKET_RXDATA) { | ||
309 | int datalen = urb->actual_length-1; | ||
310 | unsigned short len, fc, seq; | ||
311 | struct hlist_node *node; | ||
312 | |||
313 | len = ntohs(*(__be16 *)&data[datalen-2]); | ||
314 | if (len>datalen) | ||
315 | len=datalen; | ||
316 | fc = le16_to_cpu(*(__le16 *)&data[datalen-16]); | ||
317 | seq = le16_to_cpu(*(__le16 *)&data[datalen-24]); | ||
318 | |||
319 | if (zd->monitor) { | ||
320 | if (datalen < 24) | ||
321 | goto resubmit; | ||
322 | if (!(skb = dev_alloc_skb(datalen+24))) | ||
323 | goto resubmit; | ||
324 | |||
325 | memcpy(skb_put(skb, 2), &data[datalen-16], 2); | ||
326 | memcpy(skb_put(skb, 2), &data[datalen-2], 2); | ||
327 | memcpy(skb_put(skb, 6), &data[datalen-14], 6); | ||
328 | memcpy(skb_put(skb, 6), &data[datalen-22], 6); | ||
329 | memcpy(skb_put(skb, 6), &data[datalen-8], 6); | ||
330 | memcpy(skb_put(skb, 2), &data[datalen-24], 2); | ||
331 | memcpy(skb_put(skb, len), data, len); | ||
332 | skb->dev = zd->dev; | ||
333 | skb->dev->last_rx = jiffies; | ||
334 | skb->protocol = eth_type_trans(skb, zd->dev); | ||
335 | zd->stats.rx_packets++; | ||
336 | zd->stats.rx_bytes += skb->len; | ||
337 | netif_rx(skb); | ||
338 | goto resubmit; | ||
339 | } | ||
340 | |||
341 | if ((seq & IEEE80211_SCTL_FRAG) || | ||
342 | (fc & IEEE80211_FCTL_MOREFRAGS)) { | ||
343 | struct zd1201_frag *frag = NULL; | ||
344 | char *ptr; | ||
345 | |||
346 | if (datalen<14) | ||
347 | goto resubmit; | ||
348 | if ((seq & IEEE80211_SCTL_FRAG) == 0) { | ||
349 | frag = kmalloc(sizeof(*frag), GFP_ATOMIC); | ||
350 | if (!frag) | ||
351 | goto resubmit; | ||
352 | skb = dev_alloc_skb(IEEE80211_DATA_LEN +14+2); | ||
353 | if (!skb) { | ||
354 | kfree(frag); | ||
355 | goto resubmit; | ||
356 | } | ||
357 | frag->skb = skb; | ||
358 | frag->seq = seq & IEEE80211_SCTL_SEQ; | ||
359 | skb_reserve(skb, 2); | ||
360 | memcpy(skb_put(skb, 12), &data[datalen-14], 12); | ||
361 | memcpy(skb_put(skb, 2), &data[6], 2); | ||
362 | memcpy(skb_put(skb, len), data+8, len); | ||
363 | hlist_add_head(&frag->fnode, &zd->fraglist); | ||
364 | goto resubmit; | ||
365 | } | ||
366 | hlist_for_each_entry(frag, node, &zd->fraglist, fnode) | ||
367 | if (frag->seq == (seq&IEEE80211_SCTL_SEQ)) | ||
368 | break; | ||
369 | if (!frag) | ||
370 | goto resubmit; | ||
371 | skb = frag->skb; | ||
372 | ptr = skb_put(skb, len); | ||
373 | if (ptr) | ||
374 | memcpy(ptr, data+8, len); | ||
375 | if (fc & IEEE80211_FCTL_MOREFRAGS) | ||
376 | goto resubmit; | ||
377 | hlist_del_init(&frag->fnode); | ||
378 | kfree(frag); | ||
379 | } else { | ||
380 | if (datalen<14) | ||
381 | goto resubmit; | ||
382 | skb = dev_alloc_skb(len + 14 + 2); | ||
383 | if (!skb) | ||
384 | goto resubmit; | ||
385 | skb_reserve(skb, 2); | ||
386 | memcpy(skb_put(skb, 12), &data[datalen-14], 12); | ||
387 | memcpy(skb_put(skb, 2), &data[6], 2); | ||
388 | memcpy(skb_put(skb, len), data+8, len); | ||
389 | } | ||
390 | skb->dev = zd->dev; | ||
391 | skb->dev->last_rx = jiffies; | ||
392 | skb->protocol = eth_type_trans(skb, zd->dev); | ||
393 | zd->stats.rx_packets++; | ||
394 | zd->stats.rx_bytes += skb->len; | ||
395 | netif_rx(skb); | ||
396 | } | ||
397 | resubmit: | ||
398 | memset(data, 0, ZD1201_RXSIZE); | ||
399 | |||
400 | urb->status = 0; | ||
401 | urb->dev = zd->usb; | ||
402 | if(usb_submit_urb(urb, GFP_ATOMIC)) | ||
403 | free = 1; | ||
404 | |||
405 | exit: | ||
406 | if (free) { | ||
407 | zd->rxlen = 0; | ||
408 | zd->rxdatas = 1; | ||
409 | wake_up(&zd->rxdataq); | ||
410 | kfree(urb->transfer_buffer); | ||
411 | } | ||
412 | return; | ||
413 | } | ||
414 | |||
415 | static int zd1201_getconfig(struct zd1201 *zd, int rid, void *riddata, | ||
416 | unsigned int riddatalen) | ||
417 | { | ||
418 | int err; | ||
419 | int i = 0; | ||
420 | int code; | ||
421 | int rid_fid; | ||
422 | int length; | ||
423 | unsigned char *pdata; | ||
424 | |||
425 | zd->rxdatas = 0; | ||
426 | err = zd1201_docmd(zd, ZD1201_CMDCODE_ACCESS, rid, 0, 0); | ||
427 | if (err) | ||
428 | return err; | ||
429 | |||
430 | wait_event_interruptible(zd->rxdataq, zd->rxdatas); | ||
431 | if (!zd->rxlen) | ||
432 | return -EIO; | ||
433 | |||
434 | code = le16_to_cpu(*(__le16*)(&zd->rxdata[4])); | ||
435 | rid_fid = le16_to_cpu(*(__le16*)(&zd->rxdata[6])); | ||
436 | length = le16_to_cpu(*(__le16*)(&zd->rxdata[8])); | ||
437 | if (length > zd->rxlen) | ||
438 | length = zd->rxlen-6; | ||
439 | |||
440 | /* If access bit is not on, then error */ | ||
441 | if ((code & ZD1201_ACCESSBIT) != ZD1201_ACCESSBIT || rid_fid != rid ) | ||
442 | return -EINVAL; | ||
443 | |||
444 | /* Not enough buffer for allocating data */ | ||
445 | if (riddatalen != (length - 4)) { | ||
446 | dev_dbg(&zd->usb->dev, "riddatalen mismatches, expected=%u, (packet=%u) length=%u, rid=0x%04X, rid_fid=0x%04X\n", | ||
447 | riddatalen, zd->rxlen, length, rid, rid_fid); | ||
448 | return -ENODATA; | ||
449 | } | ||
450 | |||
451 | zd->rxdatas = 0; | ||
452 | /* Issue SetRxRid commnd */ | ||
453 | err = zd1201_docmd(zd, ZD1201_CMDCODE_SETRXRID, rid, 0, length); | ||
454 | if (err) | ||
455 | return err; | ||
456 | |||
457 | /* Receive RID record from resource packets */ | ||
458 | wait_event_interruptible(zd->rxdataq, zd->rxdatas); | ||
459 | if (!zd->rxlen) | ||
460 | return -EIO; | ||
461 | |||
462 | if (zd->rxdata[zd->rxlen - 1] != ZD1201_PACKET_RESOURCE) { | ||
463 | dev_dbg(&zd->usb->dev, "Packet type mismatch: 0x%x not 0x3\n", | ||
464 | zd->rxdata[zd->rxlen-1]); | ||
465 | return -EINVAL; | ||
466 | } | ||
467 | |||
468 | /* Set the data pointer and received data length */ | ||
469 | pdata = zd->rxdata; | ||
470 | length = zd->rxlen; | ||
471 | |||
472 | do { | ||
473 | int actual_length; | ||
474 | |||
475 | actual_length = (length > 64) ? 64 : length; | ||
476 | |||
477 | if (pdata[0] != 0x3) { | ||
478 | dev_dbg(&zd->usb->dev, "Rx Resource packet type error: %02X\n", | ||
479 | pdata[0]); | ||
480 | return -EINVAL; | ||
481 | } | ||
482 | |||
483 | if (actual_length != 64) { | ||
484 | /* Trim the last packet type byte */ | ||
485 | actual_length--; | ||
486 | } | ||
487 | |||
488 | /* Skip the 4 bytes header (RID length and RID) */ | ||
489 | if (i == 0) { | ||
490 | pdata += 8; | ||
491 | actual_length -= 8; | ||
492 | } else { | ||
493 | pdata += 4; | ||
494 | actual_length -= 4; | ||
495 | } | ||
496 | |||
497 | memcpy(riddata, pdata, actual_length); | ||
498 | riddata += actual_length; | ||
499 | pdata += actual_length; | ||
500 | length -= 64; | ||
501 | i++; | ||
502 | } while (length > 0); | ||
503 | |||
504 | return 0; | ||
505 | } | ||
506 | |||
507 | /* | ||
508 | * resreq: | ||
509 | * byte type | ||
510 | * byte sequence | ||
511 | * u16 reserved | ||
512 | * byte data[12] | ||
513 | * total: 16 | ||
514 | */ | ||
515 | static int zd1201_setconfig(struct zd1201 *zd, int rid, void *buf, int len, int wait) | ||
516 | { | ||
517 | int err; | ||
518 | unsigned char *request; | ||
519 | int reqlen; | ||
520 | char seq=0; | ||
521 | struct urb *urb; | ||
522 | gfp_t gfp_mask = wait ? GFP_NOIO : GFP_ATOMIC; | ||
523 | |||
524 | len += 4; /* first 4 are for header */ | ||
525 | |||
526 | zd->rxdatas = 0; | ||
527 | zd->rxlen = 0; | ||
528 | for (seq=0; len > 0; seq++) { | ||
529 | request = kmalloc(16, gfp_mask); | ||
530 | if (!request) | ||
531 | return -ENOMEM; | ||
532 | urb = usb_alloc_urb(0, gfp_mask); | ||
533 | if (!urb) { | ||
534 | kfree(request); | ||
535 | return -ENOMEM; | ||
536 | } | ||
537 | memset(request, 0, 16); | ||
538 | reqlen = len>12 ? 12 : len; | ||
539 | request[0] = ZD1201_USB_RESREQ; | ||
540 | request[1] = seq; | ||
541 | request[2] = 0; | ||
542 | request[3] = 0; | ||
543 | if (request[1] == 0) { | ||
544 | /* add header */ | ||
545 | *(__le16*)&request[4] = cpu_to_le16((len-2+1)/2); | ||
546 | *(__le16*)&request[6] = cpu_to_le16(rid); | ||
547 | memcpy(request+8, buf, reqlen-4); | ||
548 | buf += reqlen-4; | ||
549 | } else { | ||
550 | memcpy(request+4, buf, reqlen); | ||
551 | buf += reqlen; | ||
552 | } | ||
553 | |||
554 | len -= reqlen; | ||
555 | |||
556 | usb_fill_bulk_urb(urb, zd->usb, usb_sndbulkpipe(zd->usb, | ||
557 | zd->endp_out2), request, 16, zd1201_usbfree, zd); | ||
558 | err = usb_submit_urb(urb, gfp_mask); | ||
559 | if (err) | ||
560 | goto err; | ||
561 | } | ||
562 | |||
563 | request = kmalloc(16, gfp_mask); | ||
564 | if (!request) | ||
565 | return -ENOMEM; | ||
566 | urb = usb_alloc_urb(0, gfp_mask); | ||
567 | if (!urb) { | ||
568 | kfree(request); | ||
569 | return -ENOMEM; | ||
570 | } | ||
571 | *((__le32*)request) = cpu_to_le32(ZD1201_USB_CMDREQ); | ||
572 | *((__le16*)&request[4]) = | ||
573 | cpu_to_le16(ZD1201_CMDCODE_ACCESS|ZD1201_ACCESSBIT); | ||
574 | *((__le16*)&request[6]) = cpu_to_le16(rid); | ||
575 | *((__le16*)&request[8]) = cpu_to_le16(0); | ||
576 | *((__le16*)&request[10]) = cpu_to_le16(0); | ||
577 | usb_fill_bulk_urb(urb, zd->usb, usb_sndbulkpipe(zd->usb, zd->endp_out2), | ||
578 | request, 16, zd1201_usbfree, zd); | ||
579 | err = usb_submit_urb(urb, gfp_mask); | ||
580 | if (err) | ||
581 | goto err; | ||
582 | |||
583 | if (wait) { | ||
584 | wait_event_interruptible(zd->rxdataq, zd->rxdatas); | ||
585 | if (!zd->rxlen || le16_to_cpu(*(__le16*)&zd->rxdata[6]) != rid) { | ||
586 | dev_dbg(&zd->usb->dev, "wrong or no RID received\n"); | ||
587 | } | ||
588 | } | ||
589 | |||
590 | return 0; | ||
591 | err: | ||
592 | kfree(request); | ||
593 | usb_free_urb(urb); | ||
594 | return err; | ||
595 | } | ||
596 | |||
597 | static inline int zd1201_getconfig16(struct zd1201 *zd, int rid, short *val) | ||
598 | { | ||
599 | int err; | ||
600 | __le16 zdval; | ||
601 | |||
602 | err = zd1201_getconfig(zd, rid, &zdval, sizeof(__le16)); | ||
603 | if (err) | ||
604 | return err; | ||
605 | *val = le16_to_cpu(zdval); | ||
606 | return 0; | ||
607 | } | ||
608 | |||
609 | static inline int zd1201_setconfig16(struct zd1201 *zd, int rid, short val) | ||
610 | { | ||
611 | __le16 zdval = cpu_to_le16(val); | ||
612 | return (zd1201_setconfig(zd, rid, &zdval, sizeof(__le16), 1)); | ||
613 | } | ||
614 | |||
615 | static int zd1201_drvr_start(struct zd1201 *zd) | ||
616 | { | ||
617 | int err, i; | ||
618 | short max; | ||
619 | __le16 zdmax; | ||
620 | unsigned char *buffer; | ||
621 | |||
622 | buffer = kzalloc(ZD1201_RXSIZE, GFP_KERNEL); | ||
623 | if (!buffer) | ||
624 | return -ENOMEM; | ||
625 | |||
626 | usb_fill_bulk_urb(zd->rx_urb, zd->usb, | ||
627 | usb_rcvbulkpipe(zd->usb, zd->endp_in), buffer, ZD1201_RXSIZE, | ||
628 | zd1201_usbrx, zd); | ||
629 | |||
630 | err = usb_submit_urb(zd->rx_urb, GFP_KERNEL); | ||
631 | if (err) | ||
632 | goto err_buffer; | ||
633 | |||
634 | err = zd1201_docmd(zd, ZD1201_CMDCODE_INIT, 0, 0, 0); | ||
635 | if (err) | ||
636 | goto err_urb; | ||
637 | |||
638 | err = zd1201_getconfig(zd, ZD1201_RID_CNFMAXTXBUFFERNUMBER, &zdmax, | ||
639 | sizeof(__le16)); | ||
640 | if (err) | ||
641 | goto err_urb; | ||
642 | |||
643 | max = le16_to_cpu(zdmax); | ||
644 | for (i=0; i<max; i++) { | ||
645 | err = zd1201_docmd(zd, ZD1201_CMDCODE_ALLOC, 1514, 0, 0); | ||
646 | if (err) | ||
647 | goto err_urb; | ||
648 | } | ||
649 | |||
650 | return 0; | ||
651 | |||
652 | err_urb: | ||
653 | usb_kill_urb(zd->rx_urb); | ||
654 | return err; | ||
655 | err_buffer: | ||
656 | kfree(buffer); | ||
657 | return err; | ||
658 | } | ||
659 | |||
660 | /* Magic alert: The firmware doesn't seem to like the MAC state being | ||
661 | * toggled in promisc (aka monitor) mode. | ||
662 | * (It works a number of times, but will halt eventually) | ||
663 | * So we turn it of before disabling and on after enabling if needed. | ||
664 | */ | ||
665 | static int zd1201_enable(struct zd1201 *zd) | ||
666 | { | ||
667 | int err; | ||
668 | |||
669 | if (zd->mac_enabled) | ||
670 | return 0; | ||
671 | |||
672 | err = zd1201_docmd(zd, ZD1201_CMDCODE_ENABLE, 0, 0, 0); | ||
673 | if (!err) | ||
674 | zd->mac_enabled = 1; | ||
675 | |||
676 | if (zd->monitor) | ||
677 | err = zd1201_setconfig16(zd, ZD1201_RID_PROMISCUOUSMODE, 1); | ||
678 | |||
679 | return err; | ||
680 | } | ||
681 | |||
682 | static int zd1201_disable(struct zd1201 *zd) | ||
683 | { | ||
684 | int err; | ||
685 | |||
686 | if (!zd->mac_enabled) | ||
687 | return 0; | ||
688 | if (zd->monitor) { | ||
689 | err = zd1201_setconfig16(zd, ZD1201_RID_PROMISCUOUSMODE, 0); | ||
690 | if (err) | ||
691 | return err; | ||
692 | } | ||
693 | |||
694 | err = zd1201_docmd(zd, ZD1201_CMDCODE_DISABLE, 0, 0, 0); | ||
695 | if (!err) | ||
696 | zd->mac_enabled = 0; | ||
697 | return err; | ||
698 | } | ||
699 | |||
700 | static int zd1201_mac_reset(struct zd1201 *zd) | ||
701 | { | ||
702 | if (!zd->mac_enabled) | ||
703 | return 0; | ||
704 | zd1201_disable(zd); | ||
705 | return zd1201_enable(zd); | ||
706 | } | ||
707 | |||
708 | static int zd1201_join(struct zd1201 *zd, char *essid, int essidlen) | ||
709 | { | ||
710 | int err, val; | ||
711 | char buf[IW_ESSID_MAX_SIZE+2]; | ||
712 | |||
713 | err = zd1201_disable(zd); | ||
714 | if (err) | ||
715 | return err; | ||
716 | |||
717 | val = ZD1201_CNFAUTHENTICATION_OPENSYSTEM; | ||
718 | val |= ZD1201_CNFAUTHENTICATION_SHAREDKEY; | ||
719 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFAUTHENTICATION, val); | ||
720 | if (err) | ||
721 | return err; | ||
722 | |||
723 | *(__le16 *)buf = cpu_to_le16(essidlen); | ||
724 | memcpy(buf+2, essid, essidlen); | ||
725 | if (!zd->ap) { /* Normal station */ | ||
726 | err = zd1201_setconfig(zd, ZD1201_RID_CNFDESIREDSSID, buf, | ||
727 | IW_ESSID_MAX_SIZE+2, 1); | ||
728 | if (err) | ||
729 | return err; | ||
730 | } else { /* AP */ | ||
731 | err = zd1201_setconfig(zd, ZD1201_RID_CNFOWNSSID, buf, | ||
732 | IW_ESSID_MAX_SIZE+2, 1); | ||
733 | if (err) | ||
734 | return err; | ||
735 | } | ||
736 | |||
737 | err = zd1201_setconfig(zd, ZD1201_RID_CNFOWNMACADDR, | ||
738 | zd->dev->dev_addr, zd->dev->addr_len, 1); | ||
739 | if (err) | ||
740 | return err; | ||
741 | |||
742 | err = zd1201_enable(zd); | ||
743 | if (err) | ||
744 | return err; | ||
745 | |||
746 | msleep(100); | ||
747 | return 0; | ||
748 | } | ||
749 | |||
750 | static int zd1201_net_open(struct net_device *dev) | ||
751 | { | ||
752 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
753 | |||
754 | /* Start MAC with wildcard if no essid set */ | ||
755 | if (!zd->mac_enabled) | ||
756 | zd1201_join(zd, zd->essid, zd->essidlen); | ||
757 | netif_start_queue(dev); | ||
758 | |||
759 | return 0; | ||
760 | } | ||
761 | |||
762 | static int zd1201_net_stop(struct net_device *dev) | ||
763 | { | ||
764 | netif_stop_queue(dev); | ||
765 | return 0; | ||
766 | } | ||
767 | |||
768 | /* | ||
769 | RFC 1042 encapsulates Ethernet frames in 802.11 frames | ||
770 | by prefixing them with 0xaa, 0xaa, 0x03) followed by a SNAP OID of 0 | ||
771 | (0x00, 0x00, 0x00). Zd requires an additional padding, copy | ||
772 | of ethernet addresses, length of the standard RFC 1042 packet | ||
773 | and a command byte (which is nul for tx). | ||
774 | |||
775 | tx frame (from Wlan NG): | ||
776 | RFC 1042: | ||
777 | llc 0xAA 0xAA 0x03 (802.2 LLC) | ||
778 | snap 0x00 0x00 0x00 (Ethernet encapsulated) | ||
779 | type 2 bytes, Ethernet type field | ||
780 | payload (minus eth header) | ||
781 | Zydas specific: | ||
782 | padding 1B if (skb->len+8+1)%64==0 | ||
783 | Eth MAC addr 12 bytes, Ethernet MAC addresses | ||
784 | length 2 bytes, RFC 1042 packet length | ||
785 | (llc+snap+type+payload) | ||
786 | zd 1 null byte, zd1201 packet type | ||
787 | */ | ||
788 | static int zd1201_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) | ||
789 | { | ||
790 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
791 | unsigned char *txbuf = zd->txdata; | ||
792 | int txbuflen, pad = 0, err; | ||
793 | struct urb *urb = zd->tx_urb; | ||
794 | |||
795 | if (!zd->mac_enabled || zd->monitor) { | ||
796 | zd->stats.tx_dropped++; | ||
797 | kfree_skb(skb); | ||
798 | return 0; | ||
799 | } | ||
800 | netif_stop_queue(dev); | ||
801 | |||
802 | txbuflen = skb->len + 8 + 1; | ||
803 | if (txbuflen%64 == 0) { | ||
804 | pad = 1; | ||
805 | txbuflen++; | ||
806 | } | ||
807 | txbuf[0] = 0xAA; | ||
808 | txbuf[1] = 0xAA; | ||
809 | txbuf[2] = 0x03; | ||
810 | txbuf[3] = 0x00; /* rfc1042 */ | ||
811 | txbuf[4] = 0x00; | ||
812 | txbuf[5] = 0x00; | ||
813 | |||
814 | memcpy(txbuf+6, skb->data+12, skb->len-12); | ||
815 | if (pad) | ||
816 | txbuf[skb->len-12+6]=0; | ||
817 | memcpy(txbuf+skb->len-12+6+pad, skb->data, 12); | ||
818 | *(__be16*)&txbuf[skb->len+6+pad] = htons(skb->len-12+6); | ||
819 | txbuf[txbuflen-1] = 0; | ||
820 | |||
821 | usb_fill_bulk_urb(urb, zd->usb, usb_sndbulkpipe(zd->usb, zd->endp_out), | ||
822 | txbuf, txbuflen, zd1201_usbtx, zd); | ||
823 | |||
824 | err = usb_submit_urb(zd->tx_urb, GFP_ATOMIC); | ||
825 | if (err) { | ||
826 | zd->stats.tx_errors++; | ||
827 | netif_start_queue(dev); | ||
828 | return err; | ||
829 | } | ||
830 | zd->stats.tx_packets++; | ||
831 | zd->stats.tx_bytes += skb->len; | ||
832 | dev->trans_start = jiffies; | ||
833 | kfree_skb(skb); | ||
834 | |||
835 | return 0; | ||
836 | } | ||
837 | |||
838 | static void zd1201_tx_timeout(struct net_device *dev) | ||
839 | { | ||
840 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
841 | |||
842 | if (!zd) | ||
843 | return; | ||
844 | dev_warn(&zd->usb->dev, "%s: TX timeout, shooting down urb\n", | ||
845 | dev->name); | ||
846 | usb_unlink_urb(zd->tx_urb); | ||
847 | zd->stats.tx_errors++; | ||
848 | /* Restart the timeout to quiet the watchdog: */ | ||
849 | dev->trans_start = jiffies; | ||
850 | } | ||
851 | |||
852 | static int zd1201_set_mac_address(struct net_device *dev, void *p) | ||
853 | { | ||
854 | struct sockaddr *addr = p; | ||
855 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
856 | int err; | ||
857 | |||
858 | if (!zd) | ||
859 | return -ENODEV; | ||
860 | |||
861 | err = zd1201_setconfig(zd, ZD1201_RID_CNFOWNMACADDR, | ||
862 | addr->sa_data, dev->addr_len, 1); | ||
863 | if (err) | ||
864 | return err; | ||
865 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); | ||
866 | |||
867 | return zd1201_mac_reset(zd); | ||
868 | } | ||
869 | |||
870 | static struct net_device_stats *zd1201_get_stats(struct net_device *dev) | ||
871 | { | ||
872 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
873 | |||
874 | return &zd->stats; | ||
875 | } | ||
876 | |||
877 | static struct iw_statistics *zd1201_get_wireless_stats(struct net_device *dev) | ||
878 | { | ||
879 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
880 | |||
881 | return &zd->iwstats; | ||
882 | } | ||
883 | |||
884 | static void zd1201_set_multicast(struct net_device *dev) | ||
885 | { | ||
886 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
887 | struct dev_mc_list *mc = dev->mc_list; | ||
888 | unsigned char reqbuf[ETH_ALEN*ZD1201_MAXMULTI]; | ||
889 | int i; | ||
890 | |||
891 | if (dev->mc_count > ZD1201_MAXMULTI) | ||
892 | return; | ||
893 | |||
894 | for (i=0; i<dev->mc_count; i++) { | ||
895 | memcpy(reqbuf+i*ETH_ALEN, mc->dmi_addr, ETH_ALEN); | ||
896 | mc = mc->next; | ||
897 | } | ||
898 | zd1201_setconfig(zd, ZD1201_RID_CNFGROUPADDRESS, reqbuf, | ||
899 | dev->mc_count*ETH_ALEN, 0); | ||
900 | |||
901 | } | ||
902 | |||
903 | static int zd1201_config_commit(struct net_device *dev, | ||
904 | struct iw_request_info *info, struct iw_point *data, char *essid) | ||
905 | { | ||
906 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
907 | |||
908 | return zd1201_mac_reset(zd); | ||
909 | } | ||
910 | |||
911 | static int zd1201_get_name(struct net_device *dev, | ||
912 | struct iw_request_info *info, char *name, char *extra) | ||
913 | { | ||
914 | strcpy(name, "IEEE 802.11b"); | ||
915 | return 0; | ||
916 | } | ||
917 | |||
918 | static int zd1201_set_freq(struct net_device *dev, | ||
919 | struct iw_request_info *info, struct iw_freq *freq, char *extra) | ||
920 | { | ||
921 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
922 | short channel = 0; | ||
923 | int err; | ||
924 | |||
925 | if (freq->e == 0) | ||
926 | channel = freq->m; | ||
927 | else { | ||
928 | if (freq->m >= 2482) | ||
929 | channel = 14; | ||
930 | if (freq->m >= 2407) | ||
931 | channel = (freq->m-2407)/5; | ||
932 | } | ||
933 | |||
934 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFOWNCHANNEL, channel); | ||
935 | if (err) | ||
936 | return err; | ||
937 | |||
938 | zd1201_mac_reset(zd); | ||
939 | |||
940 | return 0; | ||
941 | } | ||
942 | |||
943 | static int zd1201_get_freq(struct net_device *dev, | ||
944 | struct iw_request_info *info, struct iw_freq *freq, char *extra) | ||
945 | { | ||
946 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
947 | short channel; | ||
948 | int err; | ||
949 | |||
950 | err = zd1201_getconfig16(zd, ZD1201_RID_CNFOWNCHANNEL, &channel); | ||
951 | if (err) | ||
952 | return err; | ||
953 | freq->e = 0; | ||
954 | freq->m = channel; | ||
955 | |||
956 | return 0; | ||
957 | } | ||
958 | |||
959 | static int zd1201_set_mode(struct net_device *dev, | ||
960 | struct iw_request_info *info, __u32 *mode, char *extra) | ||
961 | { | ||
962 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
963 | short porttype, monitor = 0; | ||
964 | unsigned char buffer[IW_ESSID_MAX_SIZE+2]; | ||
965 | int err; | ||
966 | |||
967 | if (zd->ap) { | ||
968 | if (*mode != IW_MODE_MASTER) | ||
969 | return -EINVAL; | ||
970 | return 0; | ||
971 | } | ||
972 | |||
973 | err = zd1201_setconfig16(zd, ZD1201_RID_PROMISCUOUSMODE, 0); | ||
974 | if (err) | ||
975 | return err; | ||
976 | zd->dev->type = ARPHRD_ETHER; | ||
977 | switch(*mode) { | ||
978 | case IW_MODE_MONITOR: | ||
979 | monitor = 1; | ||
980 | zd->dev->type = ARPHRD_IEEE80211; | ||
981 | /* Make sure we are no longer associated with by | ||
982 | setting an 'impossible' essid. | ||
983 | (otherwise we mess up firmware) | ||
984 | */ | ||
985 | zd1201_join(zd, "\0-*#\0", 5); | ||
986 | /* Put port in pIBSS */ | ||
987 | case 8: /* No pseudo-IBSS in wireless extensions (yet) */ | ||
988 | porttype = ZD1201_PORTTYPE_PSEUDOIBSS; | ||
989 | break; | ||
990 | case IW_MODE_ADHOC: | ||
991 | porttype = ZD1201_PORTTYPE_IBSS; | ||
992 | break; | ||
993 | case IW_MODE_INFRA: | ||
994 | porttype = ZD1201_PORTTYPE_BSS; | ||
995 | break; | ||
996 | default: | ||
997 | return -EINVAL; | ||
998 | } | ||
999 | |||
1000 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFPORTTYPE, porttype); | ||
1001 | if (err) | ||
1002 | return err; | ||
1003 | if (zd->monitor && !monitor) { | ||
1004 | zd1201_disable(zd); | ||
1005 | *(__le16 *)buffer = cpu_to_le16(zd->essidlen); | ||
1006 | memcpy(buffer+2, zd->essid, zd->essidlen); | ||
1007 | err = zd1201_setconfig(zd, ZD1201_RID_CNFDESIREDSSID, | ||
1008 | buffer, IW_ESSID_MAX_SIZE+2, 1); | ||
1009 | if (err) | ||
1010 | return err; | ||
1011 | } | ||
1012 | zd->monitor = monitor; | ||
1013 | /* If monitor mode is set we don't actually turn it on here since it | ||
1014 | * is done during mac reset anyway (see zd1201_mac_enable). | ||
1015 | */ | ||
1016 | zd1201_mac_reset(zd); | ||
1017 | |||
1018 | return 0; | ||
1019 | } | ||
1020 | |||
1021 | static int zd1201_get_mode(struct net_device *dev, | ||
1022 | struct iw_request_info *info, __u32 *mode, char *extra) | ||
1023 | { | ||
1024 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1025 | short porttype; | ||
1026 | int err; | ||
1027 | |||
1028 | err = zd1201_getconfig16(zd, ZD1201_RID_CNFPORTTYPE, &porttype); | ||
1029 | if (err) | ||
1030 | return err; | ||
1031 | switch(porttype) { | ||
1032 | case ZD1201_PORTTYPE_IBSS: | ||
1033 | *mode = IW_MODE_ADHOC; | ||
1034 | break; | ||
1035 | case ZD1201_PORTTYPE_BSS: | ||
1036 | *mode = IW_MODE_INFRA; | ||
1037 | break; | ||
1038 | case ZD1201_PORTTYPE_WDS: | ||
1039 | *mode = IW_MODE_REPEAT; | ||
1040 | break; | ||
1041 | case ZD1201_PORTTYPE_PSEUDOIBSS: | ||
1042 | *mode = 8;/* No Pseudo-IBSS... */ | ||
1043 | break; | ||
1044 | case ZD1201_PORTTYPE_AP: | ||
1045 | *mode = IW_MODE_MASTER; | ||
1046 | break; | ||
1047 | default: | ||
1048 | dev_dbg(&zd->usb->dev, "Unknown porttype: %d\n", | ||
1049 | porttype); | ||
1050 | *mode = IW_MODE_AUTO; | ||
1051 | } | ||
1052 | if (zd->monitor) | ||
1053 | *mode = IW_MODE_MONITOR; | ||
1054 | |||
1055 | return 0; | ||
1056 | } | ||
1057 | |||
1058 | static int zd1201_get_range(struct net_device *dev, | ||
1059 | struct iw_request_info *info, struct iw_point *wrq, char *extra) | ||
1060 | { | ||
1061 | struct iw_range *range = (struct iw_range *)extra; | ||
1062 | |||
1063 | wrq->length = sizeof(struct iw_range); | ||
1064 | memset(range, 0, sizeof(struct iw_range)); | ||
1065 | range->we_version_compiled = WIRELESS_EXT; | ||
1066 | range->we_version_source = WIRELESS_EXT; | ||
1067 | |||
1068 | range->max_qual.qual = 128; | ||
1069 | range->max_qual.level = 128; | ||
1070 | range->max_qual.noise = 128; | ||
1071 | range->max_qual.updated = 7; | ||
1072 | |||
1073 | range->encoding_size[0] = 5; | ||
1074 | range->encoding_size[1] = 13; | ||
1075 | range->num_encoding_sizes = 2; | ||
1076 | range->max_encoding_tokens = ZD1201_NUMKEYS; | ||
1077 | |||
1078 | range->num_bitrates = 4; | ||
1079 | range->bitrate[0] = 1000000; | ||
1080 | range->bitrate[1] = 2000000; | ||
1081 | range->bitrate[2] = 5500000; | ||
1082 | range->bitrate[3] = 11000000; | ||
1083 | |||
1084 | range->min_rts = 0; | ||
1085 | range->min_frag = ZD1201_FRAGMIN; | ||
1086 | range->max_rts = ZD1201_RTSMAX; | ||
1087 | range->min_frag = ZD1201_FRAGMAX; | ||
1088 | |||
1089 | return 0; | ||
1090 | } | ||
1091 | |||
1092 | /* Little bit of magic here: we only get the quality if we poll | ||
1093 | * for it, and we never get an actual request to trigger such | ||
1094 | * a poll. Therefore we 'assume' that the user will soon ask for | ||
1095 | * the stats after asking the bssid. | ||
1096 | */ | ||
1097 | static int zd1201_get_wap(struct net_device *dev, | ||
1098 | struct iw_request_info *info, struct sockaddr *ap_addr, char *extra) | ||
1099 | { | ||
1100 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1101 | unsigned char buffer[6]; | ||
1102 | |||
1103 | if (!zd1201_getconfig(zd, ZD1201_RID_COMMSQUALITY, buffer, 6)) { | ||
1104 | /* Unfortunately the quality and noise reported is useless. | ||
1105 | they seem to be accumulators that increase until you | ||
1106 | read them, unless we poll on a fixed interval we can't | ||
1107 | use them | ||
1108 | */ | ||
1109 | /*zd->iwstats.qual.qual = le16_to_cpu(((__le16 *)buffer)[0]);*/ | ||
1110 | zd->iwstats.qual.level = le16_to_cpu(((__le16 *)buffer)[1]); | ||
1111 | /*zd->iwstats.qual.noise = le16_to_cpu(((__le16 *)buffer)[2]);*/ | ||
1112 | zd->iwstats.qual.updated = 2; | ||
1113 | } | ||
1114 | |||
1115 | return zd1201_getconfig(zd, ZD1201_RID_CURRENTBSSID, ap_addr->sa_data, 6); | ||
1116 | } | ||
1117 | |||
1118 | static int zd1201_set_scan(struct net_device *dev, | ||
1119 | struct iw_request_info *info, struct iw_point *srq, char *extra) | ||
1120 | { | ||
1121 | /* We do everything in get_scan */ | ||
1122 | return 0; | ||
1123 | } | ||
1124 | |||
1125 | static int zd1201_get_scan(struct net_device *dev, | ||
1126 | struct iw_request_info *info, struct iw_point *srq, char *extra) | ||
1127 | { | ||
1128 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1129 | int err, i, j, enabled_save; | ||
1130 | struct iw_event iwe; | ||
1131 | char *cev = extra; | ||
1132 | char *end_buf = extra + IW_SCAN_MAX_DATA; | ||
1133 | |||
1134 | /* No scanning in AP mode */ | ||
1135 | if (zd->ap) | ||
1136 | return -EOPNOTSUPP; | ||
1137 | |||
1138 | /* Scan doesn't seem to work if disabled */ | ||
1139 | enabled_save = zd->mac_enabled; | ||
1140 | zd1201_enable(zd); | ||
1141 | |||
1142 | zd->rxdatas = 0; | ||
1143 | err = zd1201_docmd(zd, ZD1201_CMDCODE_INQUIRE, | ||
1144 | ZD1201_INQ_SCANRESULTS, 0, 0); | ||
1145 | if (err) | ||
1146 | return err; | ||
1147 | |||
1148 | wait_event_interruptible(zd->rxdataq, zd->rxdatas); | ||
1149 | if (!zd->rxlen) | ||
1150 | return -EIO; | ||
1151 | |||
1152 | if (le16_to_cpu(*(__le16*)&zd->rxdata[2]) != ZD1201_INQ_SCANRESULTS) | ||
1153 | return -EIO; | ||
1154 | |||
1155 | for(i=8; i<zd->rxlen; i+=62) { | ||
1156 | iwe.cmd = SIOCGIWAP; | ||
1157 | iwe.u.ap_addr.sa_family = ARPHRD_ETHER; | ||
1158 | memcpy(iwe.u.ap_addr.sa_data, zd->rxdata+i+6, 6); | ||
1159 | cev = iwe_stream_add_event(cev, end_buf, &iwe, IW_EV_ADDR_LEN); | ||
1160 | |||
1161 | iwe.cmd = SIOCGIWESSID; | ||
1162 | iwe.u.data.length = zd->rxdata[i+16]; | ||
1163 | iwe.u.data.flags = 1; | ||
1164 | cev = iwe_stream_add_point(cev, end_buf, &iwe, zd->rxdata+i+18); | ||
1165 | |||
1166 | iwe.cmd = SIOCGIWMODE; | ||
1167 | if (zd->rxdata[i+14]&0x01) | ||
1168 | iwe.u.mode = IW_MODE_MASTER; | ||
1169 | else | ||
1170 | iwe.u.mode = IW_MODE_ADHOC; | ||
1171 | cev = iwe_stream_add_event(cev, end_buf, &iwe, IW_EV_UINT_LEN); | ||
1172 | |||
1173 | iwe.cmd = SIOCGIWFREQ; | ||
1174 | iwe.u.freq.m = zd->rxdata[i+0]; | ||
1175 | iwe.u.freq.e = 0; | ||
1176 | cev = iwe_stream_add_event(cev, end_buf, &iwe, IW_EV_FREQ_LEN); | ||
1177 | |||
1178 | iwe.cmd = SIOCGIWRATE; | ||
1179 | iwe.u.bitrate.fixed = 0; | ||
1180 | iwe.u.bitrate.disabled = 0; | ||
1181 | for (j=0; j<10; j++) if (zd->rxdata[i+50+j]) { | ||
1182 | iwe.u.bitrate.value = (zd->rxdata[i+50+j]&0x7f)*500000; | ||
1183 | cev=iwe_stream_add_event(cev, end_buf, &iwe, | ||
1184 | IW_EV_PARAM_LEN); | ||
1185 | } | ||
1186 | |||
1187 | iwe.cmd = SIOCGIWENCODE; | ||
1188 | iwe.u.data.length = 0; | ||
1189 | if (zd->rxdata[i+14]&0x10) | ||
1190 | iwe.u.data.flags = IW_ENCODE_ENABLED; | ||
1191 | else | ||
1192 | iwe.u.data.flags = IW_ENCODE_DISABLED; | ||
1193 | cev = iwe_stream_add_point(cev, end_buf, &iwe, NULL); | ||
1194 | |||
1195 | iwe.cmd = IWEVQUAL; | ||
1196 | iwe.u.qual.qual = zd->rxdata[i+4]; | ||
1197 | iwe.u.qual.noise= zd->rxdata[i+2]/10-100; | ||
1198 | iwe.u.qual.level = (256+zd->rxdata[i+4]*100)/255-100; | ||
1199 | iwe.u.qual.updated = 7; | ||
1200 | cev = iwe_stream_add_event(cev, end_buf, &iwe, IW_EV_QUAL_LEN); | ||
1201 | } | ||
1202 | |||
1203 | if (!enabled_save) | ||
1204 | zd1201_disable(zd); | ||
1205 | |||
1206 | srq->length = cev - extra; | ||
1207 | srq->flags = 0; | ||
1208 | |||
1209 | return 0; | ||
1210 | } | ||
1211 | |||
1212 | static int zd1201_set_essid(struct net_device *dev, | ||
1213 | struct iw_request_info *info, struct iw_point *data, char *essid) | ||
1214 | { | ||
1215 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1216 | |||
1217 | if (data->length > IW_ESSID_MAX_SIZE) | ||
1218 | return -EINVAL; | ||
1219 | if (data->length < 1) | ||
1220 | data->length = 1; | ||
1221 | zd->essidlen = data->length-1; | ||
1222 | memset(zd->essid, 0, IW_ESSID_MAX_SIZE+1); | ||
1223 | memcpy(zd->essid, essid, data->length); | ||
1224 | return zd1201_join(zd, zd->essid, zd->essidlen); | ||
1225 | } | ||
1226 | |||
1227 | static int zd1201_get_essid(struct net_device *dev, | ||
1228 | struct iw_request_info *info, struct iw_point *data, char *essid) | ||
1229 | { | ||
1230 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1231 | |||
1232 | memcpy(essid, zd->essid, zd->essidlen); | ||
1233 | data->flags = 1; | ||
1234 | data->length = zd->essidlen; | ||
1235 | |||
1236 | return 0; | ||
1237 | } | ||
1238 | |||
1239 | static int zd1201_get_nick(struct net_device *dev, struct iw_request_info *info, | ||
1240 | struct iw_point *data, char *nick) | ||
1241 | { | ||
1242 | strcpy(nick, "zd1201"); | ||
1243 | data->flags = 1; | ||
1244 | data->length = strlen(nick); | ||
1245 | return 0; | ||
1246 | } | ||
1247 | |||
1248 | static int zd1201_set_rate(struct net_device *dev, | ||
1249 | struct iw_request_info *info, struct iw_param *rrq, char *extra) | ||
1250 | { | ||
1251 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1252 | short rate; | ||
1253 | int err; | ||
1254 | |||
1255 | switch (rrq->value) { | ||
1256 | case 1000000: | ||
1257 | rate = ZD1201_RATEB1; | ||
1258 | break; | ||
1259 | case 2000000: | ||
1260 | rate = ZD1201_RATEB2; | ||
1261 | break; | ||
1262 | case 5500000: | ||
1263 | rate = ZD1201_RATEB5; | ||
1264 | break; | ||
1265 | case 11000000: | ||
1266 | default: | ||
1267 | rate = ZD1201_RATEB11; | ||
1268 | break; | ||
1269 | } | ||
1270 | if (!rrq->fixed) { /* Also enable all lower bitrates */ | ||
1271 | rate |= rate-1; | ||
1272 | } | ||
1273 | |||
1274 | err = zd1201_setconfig16(zd, ZD1201_RID_TXRATECNTL, rate); | ||
1275 | if (err) | ||
1276 | return err; | ||
1277 | |||
1278 | return zd1201_mac_reset(zd); | ||
1279 | } | ||
1280 | |||
1281 | static int zd1201_get_rate(struct net_device *dev, | ||
1282 | struct iw_request_info *info, struct iw_param *rrq, char *extra) | ||
1283 | { | ||
1284 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1285 | short rate; | ||
1286 | int err; | ||
1287 | |||
1288 | err = zd1201_getconfig16(zd, ZD1201_RID_CURRENTTXRATE, &rate); | ||
1289 | if (err) | ||
1290 | return err; | ||
1291 | |||
1292 | switch(rate) { | ||
1293 | case 1: | ||
1294 | rrq->value = 1000000; | ||
1295 | break; | ||
1296 | case 2: | ||
1297 | rrq->value = 2000000; | ||
1298 | break; | ||
1299 | case 5: | ||
1300 | rrq->value = 5500000; | ||
1301 | break; | ||
1302 | case 11: | ||
1303 | rrq->value = 11000000; | ||
1304 | break; | ||
1305 | default: | ||
1306 | rrq->value = 0; | ||
1307 | } | ||
1308 | rrq->fixed = 0; | ||
1309 | rrq->disabled = 0; | ||
1310 | |||
1311 | return 0; | ||
1312 | } | ||
1313 | |||
1314 | static int zd1201_set_rts(struct net_device *dev, struct iw_request_info *info, | ||
1315 | struct iw_param *rts, char *extra) | ||
1316 | { | ||
1317 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1318 | int err; | ||
1319 | short val = rts->value; | ||
1320 | |||
1321 | if (rts->disabled || !rts->fixed) | ||
1322 | val = ZD1201_RTSMAX; | ||
1323 | if (val > ZD1201_RTSMAX) | ||
1324 | return -EINVAL; | ||
1325 | if (val < 0) | ||
1326 | return -EINVAL; | ||
1327 | |||
1328 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFRTSTHRESHOLD, val); | ||
1329 | if (err) | ||
1330 | return err; | ||
1331 | return zd1201_mac_reset(zd); | ||
1332 | } | ||
1333 | |||
1334 | static int zd1201_get_rts(struct net_device *dev, struct iw_request_info *info, | ||
1335 | struct iw_param *rts, char *extra) | ||
1336 | { | ||
1337 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1338 | short rtst; | ||
1339 | int err; | ||
1340 | |||
1341 | err = zd1201_getconfig16(zd, ZD1201_RID_CNFRTSTHRESHOLD, &rtst); | ||
1342 | if (err) | ||
1343 | return err; | ||
1344 | rts->value = rtst; | ||
1345 | rts->disabled = (rts->value == ZD1201_RTSMAX); | ||
1346 | rts->fixed = 1; | ||
1347 | |||
1348 | return 0; | ||
1349 | } | ||
1350 | |||
1351 | static int zd1201_set_frag(struct net_device *dev, struct iw_request_info *info, | ||
1352 | struct iw_param *frag, char *extra) | ||
1353 | { | ||
1354 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1355 | int err; | ||
1356 | short val = frag->value; | ||
1357 | |||
1358 | if (frag->disabled || !frag->fixed) | ||
1359 | val = ZD1201_FRAGMAX; | ||
1360 | if (val > ZD1201_FRAGMAX) | ||
1361 | return -EINVAL; | ||
1362 | if (val < ZD1201_FRAGMIN) | ||
1363 | return -EINVAL; | ||
1364 | if (val & 1) | ||
1365 | return -EINVAL; | ||
1366 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFFRAGTHRESHOLD, val); | ||
1367 | if (err) | ||
1368 | return err; | ||
1369 | return zd1201_mac_reset(zd); | ||
1370 | } | ||
1371 | |||
1372 | static int zd1201_get_frag(struct net_device *dev, struct iw_request_info *info, | ||
1373 | struct iw_param *frag, char *extra) | ||
1374 | { | ||
1375 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1376 | short fragt; | ||
1377 | int err; | ||
1378 | |||
1379 | err = zd1201_getconfig16(zd, ZD1201_RID_CNFFRAGTHRESHOLD, &fragt); | ||
1380 | if (err) | ||
1381 | return err; | ||
1382 | frag->value = fragt; | ||
1383 | frag->disabled = (frag->value == ZD1201_FRAGMAX); | ||
1384 | frag->fixed = 1; | ||
1385 | |||
1386 | return 0; | ||
1387 | } | ||
1388 | |||
1389 | static int zd1201_set_retry(struct net_device *dev, | ||
1390 | struct iw_request_info *info, struct iw_param *rrq, char *extra) | ||
1391 | { | ||
1392 | return 0; | ||
1393 | } | ||
1394 | |||
1395 | static int zd1201_get_retry(struct net_device *dev, | ||
1396 | struct iw_request_info *info, struct iw_param *rrq, char *extra) | ||
1397 | { | ||
1398 | return 0; | ||
1399 | } | ||
1400 | |||
1401 | static int zd1201_set_encode(struct net_device *dev, | ||
1402 | struct iw_request_info *info, struct iw_point *erq, char *key) | ||
1403 | { | ||
1404 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1405 | short i; | ||
1406 | int err, rid; | ||
1407 | |||
1408 | if (erq->length > ZD1201_MAXKEYLEN) | ||
1409 | return -EINVAL; | ||
1410 | |||
1411 | i = (erq->flags & IW_ENCODE_INDEX)-1; | ||
1412 | if (i == -1) { | ||
1413 | err = zd1201_getconfig16(zd,ZD1201_RID_CNFDEFAULTKEYID,&i); | ||
1414 | if (err) | ||
1415 | return err; | ||
1416 | } else { | ||
1417 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFDEFAULTKEYID, i); | ||
1418 | if (err) | ||
1419 | return err; | ||
1420 | } | ||
1421 | |||
1422 | if (i < 0 || i >= ZD1201_NUMKEYS) | ||
1423 | return -EINVAL; | ||
1424 | |||
1425 | rid = ZD1201_RID_CNFDEFAULTKEY0 + i; | ||
1426 | err = zd1201_setconfig(zd, rid, key, erq->length, 1); | ||
1427 | if (err) | ||
1428 | return err; | ||
1429 | zd->encode_keylen[i] = erq->length; | ||
1430 | memcpy(zd->encode_keys[i], key, erq->length); | ||
1431 | |||
1432 | i=0; | ||
1433 | if (!(erq->flags & IW_ENCODE_DISABLED & IW_ENCODE_MODE)) { | ||
1434 | i |= 0x01; | ||
1435 | zd->encode_enabled = 1; | ||
1436 | } else | ||
1437 | zd->encode_enabled = 0; | ||
1438 | if (erq->flags & IW_ENCODE_RESTRICTED & IW_ENCODE_MODE) { | ||
1439 | i |= 0x02; | ||
1440 | zd->encode_restricted = 1; | ||
1441 | } else | ||
1442 | zd->encode_restricted = 0; | ||
1443 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFWEBFLAGS, i); | ||
1444 | if (err) | ||
1445 | return err; | ||
1446 | |||
1447 | if (zd->encode_enabled) | ||
1448 | i = ZD1201_CNFAUTHENTICATION_SHAREDKEY; | ||
1449 | else | ||
1450 | i = ZD1201_CNFAUTHENTICATION_OPENSYSTEM; | ||
1451 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFAUTHENTICATION, i); | ||
1452 | if (err) | ||
1453 | return err; | ||
1454 | |||
1455 | return zd1201_mac_reset(zd); | ||
1456 | } | ||
1457 | |||
1458 | static int zd1201_get_encode(struct net_device *dev, | ||
1459 | struct iw_request_info *info, struct iw_point *erq, char *key) | ||
1460 | { | ||
1461 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1462 | short i; | ||
1463 | int err; | ||
1464 | |||
1465 | if (zd->encode_enabled) | ||
1466 | erq->flags = IW_ENCODE_ENABLED; | ||
1467 | else | ||
1468 | erq->flags = IW_ENCODE_DISABLED; | ||
1469 | if (zd->encode_restricted) | ||
1470 | erq->flags |= IW_ENCODE_RESTRICTED; | ||
1471 | else | ||
1472 | erq->flags |= IW_ENCODE_OPEN; | ||
1473 | |||
1474 | i = (erq->flags & IW_ENCODE_INDEX) -1; | ||
1475 | if (i == -1) { | ||
1476 | err = zd1201_getconfig16(zd, ZD1201_RID_CNFDEFAULTKEYID, &i); | ||
1477 | if (err) | ||
1478 | return err; | ||
1479 | } | ||
1480 | if (i<0 || i>= ZD1201_NUMKEYS) | ||
1481 | return -EINVAL; | ||
1482 | |||
1483 | erq->flags |= i+1; | ||
1484 | |||
1485 | erq->length = zd->encode_keylen[i]; | ||
1486 | memcpy(key, zd->encode_keys[i], erq->length); | ||
1487 | |||
1488 | return 0; | ||
1489 | } | ||
1490 | |||
1491 | static int zd1201_set_power(struct net_device *dev, | ||
1492 | struct iw_request_info *info, struct iw_param *vwrq, char *extra) | ||
1493 | { | ||
1494 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1495 | short enabled, duration, level; | ||
1496 | int err; | ||
1497 | |||
1498 | enabled = vwrq->disabled ? 0 : 1; | ||
1499 | if (enabled) { | ||
1500 | if (vwrq->flags & IW_POWER_PERIOD) { | ||
1501 | duration = vwrq->value; | ||
1502 | err = zd1201_setconfig16(zd, | ||
1503 | ZD1201_RID_CNFMAXSLEEPDURATION, duration); | ||
1504 | if (err) | ||
1505 | return err; | ||
1506 | goto out; | ||
1507 | } | ||
1508 | if (vwrq->flags & IW_POWER_TIMEOUT) { | ||
1509 | err = zd1201_getconfig16(zd, | ||
1510 | ZD1201_RID_CNFMAXSLEEPDURATION, &duration); | ||
1511 | if (err) | ||
1512 | return err; | ||
1513 | level = vwrq->value * 4 / duration; | ||
1514 | if (level > 4) | ||
1515 | level = 4; | ||
1516 | if (level < 0) | ||
1517 | level = 0; | ||
1518 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFPMEPS, | ||
1519 | level); | ||
1520 | if (err) | ||
1521 | return err; | ||
1522 | goto out; | ||
1523 | } | ||
1524 | return -EINVAL; | ||
1525 | } | ||
1526 | out: | ||
1527 | return zd1201_setconfig16(zd, ZD1201_RID_CNFPMENABLED, enabled); | ||
1528 | } | ||
1529 | |||
1530 | static int zd1201_get_power(struct net_device *dev, | ||
1531 | struct iw_request_info *info, struct iw_param *vwrq, char *extra) | ||
1532 | { | ||
1533 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1534 | short enabled, level, duration; | ||
1535 | int err; | ||
1536 | |||
1537 | err = zd1201_getconfig16(zd, ZD1201_RID_CNFPMENABLED, &enabled); | ||
1538 | if (err) | ||
1539 | return err; | ||
1540 | err = zd1201_getconfig16(zd, ZD1201_RID_CNFPMEPS, &level); | ||
1541 | if (err) | ||
1542 | return err; | ||
1543 | err = zd1201_getconfig16(zd, ZD1201_RID_CNFMAXSLEEPDURATION, &duration); | ||
1544 | if (err) | ||
1545 | return err; | ||
1546 | vwrq->disabled = enabled ? 0 : 1; | ||
1547 | if (vwrq->flags & IW_POWER_TYPE) { | ||
1548 | if (vwrq->flags & IW_POWER_PERIOD) { | ||
1549 | vwrq->value = duration; | ||
1550 | vwrq->flags = IW_POWER_PERIOD; | ||
1551 | } else { | ||
1552 | vwrq->value = duration * level / 4; | ||
1553 | vwrq->flags = IW_POWER_TIMEOUT; | ||
1554 | } | ||
1555 | } | ||
1556 | if (vwrq->flags & IW_POWER_MODE) { | ||
1557 | if (enabled && level) | ||
1558 | vwrq->flags = IW_POWER_UNICAST_R; | ||
1559 | else | ||
1560 | vwrq->flags = IW_POWER_ALL_R; | ||
1561 | } | ||
1562 | |||
1563 | return 0; | ||
1564 | } | ||
1565 | |||
1566 | |||
1567 | static const iw_handler zd1201_iw_handler[] = | ||
1568 | { | ||
1569 | (iw_handler) zd1201_config_commit, /* SIOCSIWCOMMIT */ | ||
1570 | (iw_handler) zd1201_get_name, /* SIOCGIWNAME */ | ||
1571 | (iw_handler) NULL, /* SIOCSIWNWID */ | ||
1572 | (iw_handler) NULL, /* SIOCGIWNWID */ | ||
1573 | (iw_handler) zd1201_set_freq, /* SIOCSIWFREQ */ | ||
1574 | (iw_handler) zd1201_get_freq, /* SIOCGIWFREQ */ | ||
1575 | (iw_handler) zd1201_set_mode, /* SIOCSIWMODE */ | ||
1576 | (iw_handler) zd1201_get_mode, /* SIOCGIWMODE */ | ||
1577 | (iw_handler) NULL, /* SIOCSIWSENS */ | ||
1578 | (iw_handler) NULL, /* SIOCGIWSENS */ | ||
1579 | (iw_handler) NULL, /* SIOCSIWRANGE */ | ||
1580 | (iw_handler) zd1201_get_range, /* SIOCGIWRANGE */ | ||
1581 | (iw_handler) NULL, /* SIOCSIWPRIV */ | ||
1582 | (iw_handler) NULL, /* SIOCGIWPRIV */ | ||
1583 | (iw_handler) NULL, /* SIOCSIWSTATS */ | ||
1584 | (iw_handler) NULL, /* SIOCGIWSTATS */ | ||
1585 | (iw_handler) NULL, /* SIOCSIWSPY */ | ||
1586 | (iw_handler) NULL, /* SIOCGIWSPY */ | ||
1587 | (iw_handler) NULL, /* -- hole -- */ | ||
1588 | (iw_handler) NULL, /* -- hole -- */ | ||
1589 | (iw_handler) NULL/*zd1201_set_wap*/, /* SIOCSIWAP */ | ||
1590 | (iw_handler) zd1201_get_wap, /* SIOCGIWAP */ | ||
1591 | (iw_handler) NULL, /* -- hole -- */ | ||
1592 | (iw_handler) NULL, /* SIOCGIWAPLIST */ | ||
1593 | (iw_handler) zd1201_set_scan, /* SIOCSIWSCAN */ | ||
1594 | (iw_handler) zd1201_get_scan, /* SIOCGIWSCAN */ | ||
1595 | (iw_handler) zd1201_set_essid, /* SIOCSIWESSID */ | ||
1596 | (iw_handler) zd1201_get_essid, /* SIOCGIWESSID */ | ||
1597 | (iw_handler) NULL, /* SIOCSIWNICKN */ | ||
1598 | (iw_handler) zd1201_get_nick, /* SIOCGIWNICKN */ | ||
1599 | (iw_handler) NULL, /* -- hole -- */ | ||
1600 | (iw_handler) NULL, /* -- hole -- */ | ||
1601 | (iw_handler) zd1201_set_rate, /* SIOCSIWRATE */ | ||
1602 | (iw_handler) zd1201_get_rate, /* SIOCGIWRATE */ | ||
1603 | (iw_handler) zd1201_set_rts, /* SIOCSIWRTS */ | ||
1604 | (iw_handler) zd1201_get_rts, /* SIOCGIWRTS */ | ||
1605 | (iw_handler) zd1201_set_frag, /* SIOCSIWFRAG */ | ||
1606 | (iw_handler) zd1201_get_frag, /* SIOCGIWFRAG */ | ||
1607 | (iw_handler) NULL, /* SIOCSIWTXPOW */ | ||
1608 | (iw_handler) NULL, /* SIOCGIWTXPOW */ | ||
1609 | (iw_handler) zd1201_set_retry, /* SIOCSIWRETRY */ | ||
1610 | (iw_handler) zd1201_get_retry, /* SIOCGIWRETRY */ | ||
1611 | (iw_handler) zd1201_set_encode, /* SIOCSIWENCODE */ | ||
1612 | (iw_handler) zd1201_get_encode, /* SIOCGIWENCODE */ | ||
1613 | (iw_handler) zd1201_set_power, /* SIOCSIWPOWER */ | ||
1614 | (iw_handler) zd1201_get_power, /* SIOCGIWPOWER */ | ||
1615 | }; | ||
1616 | |||
1617 | static int zd1201_set_hostauth(struct net_device *dev, | ||
1618 | struct iw_request_info *info, struct iw_param *rrq, char *extra) | ||
1619 | { | ||
1620 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1621 | |||
1622 | if (!zd->ap) | ||
1623 | return -EOPNOTSUPP; | ||
1624 | |||
1625 | return zd1201_setconfig16(zd, ZD1201_RID_CNFHOSTAUTH, rrq->value); | ||
1626 | } | ||
1627 | |||
1628 | static int zd1201_get_hostauth(struct net_device *dev, | ||
1629 | struct iw_request_info *info, struct iw_param *rrq, char *extra) | ||
1630 | { | ||
1631 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1632 | short hostauth; | ||
1633 | int err; | ||
1634 | |||
1635 | if (!zd->ap) | ||
1636 | return -EOPNOTSUPP; | ||
1637 | |||
1638 | err = zd1201_getconfig16(zd, ZD1201_RID_CNFHOSTAUTH, &hostauth); | ||
1639 | if (err) | ||
1640 | return err; | ||
1641 | rrq->value = hostauth; | ||
1642 | rrq->fixed = 1; | ||
1643 | |||
1644 | return 0; | ||
1645 | } | ||
1646 | |||
1647 | static int zd1201_auth_sta(struct net_device *dev, | ||
1648 | struct iw_request_info *info, struct sockaddr *sta, char *extra) | ||
1649 | { | ||
1650 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1651 | unsigned char buffer[10]; | ||
1652 | |||
1653 | if (!zd->ap) | ||
1654 | return -EOPNOTSUPP; | ||
1655 | |||
1656 | memcpy(buffer, sta->sa_data, ETH_ALEN); | ||
1657 | *(short*)(buffer+6) = 0; /* 0==success, 1==failure */ | ||
1658 | *(short*)(buffer+8) = 0; | ||
1659 | |||
1660 | return zd1201_setconfig(zd, ZD1201_RID_AUTHENTICATESTA, buffer, 10, 1); | ||
1661 | } | ||
1662 | |||
1663 | static int zd1201_set_maxassoc(struct net_device *dev, | ||
1664 | struct iw_request_info *info, struct iw_param *rrq, char *extra) | ||
1665 | { | ||
1666 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1667 | int err; | ||
1668 | |||
1669 | if (!zd->ap) | ||
1670 | return -EOPNOTSUPP; | ||
1671 | |||
1672 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFMAXASSOCSTATIONS, rrq->value); | ||
1673 | if (err) | ||
1674 | return err; | ||
1675 | return 0; | ||
1676 | } | ||
1677 | |||
1678 | static int zd1201_get_maxassoc(struct net_device *dev, | ||
1679 | struct iw_request_info *info, struct iw_param *rrq, char *extra) | ||
1680 | { | ||
1681 | struct zd1201 *zd = (struct zd1201 *)dev->priv; | ||
1682 | short maxassoc; | ||
1683 | int err; | ||
1684 | |||
1685 | if (!zd->ap) | ||
1686 | return -EOPNOTSUPP; | ||
1687 | |||
1688 | err = zd1201_getconfig16(zd, ZD1201_RID_CNFMAXASSOCSTATIONS, &maxassoc); | ||
1689 | if (err) | ||
1690 | return err; | ||
1691 | rrq->value = maxassoc; | ||
1692 | rrq->fixed = 1; | ||
1693 | |||
1694 | return 0; | ||
1695 | } | ||
1696 | |||
1697 | static const iw_handler zd1201_private_handler[] = { | ||
1698 | (iw_handler) zd1201_set_hostauth, /* ZD1201SIWHOSTAUTH */ | ||
1699 | (iw_handler) zd1201_get_hostauth, /* ZD1201GIWHOSTAUTH */ | ||
1700 | (iw_handler) zd1201_auth_sta, /* ZD1201SIWAUTHSTA */ | ||
1701 | (iw_handler) NULL, /* nothing to get */ | ||
1702 | (iw_handler) zd1201_set_maxassoc, /* ZD1201SIMAXASSOC */ | ||
1703 | (iw_handler) zd1201_get_maxassoc, /* ZD1201GIMAXASSOC */ | ||
1704 | }; | ||
1705 | |||
1706 | static const struct iw_priv_args zd1201_private_args[] = { | ||
1707 | { ZD1201SIWHOSTAUTH, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | ||
1708 | IW_PRIV_TYPE_NONE, "sethostauth" }, | ||
1709 | { ZD1201GIWHOSTAUTH, IW_PRIV_TYPE_NONE, | ||
1710 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gethostauth" }, | ||
1711 | { ZD1201SIWAUTHSTA, IW_PRIV_TYPE_ADDR | IW_PRIV_SIZE_FIXED | 1, | ||
1712 | IW_PRIV_TYPE_NONE, "authstation" }, | ||
1713 | { ZD1201SIWMAXASSOC, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | ||
1714 | IW_PRIV_TYPE_NONE, "setmaxassoc" }, | ||
1715 | { ZD1201GIWMAXASSOC, IW_PRIV_TYPE_NONE, | ||
1716 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getmaxassoc" }, | ||
1717 | }; | ||
1718 | |||
1719 | static const struct iw_handler_def zd1201_iw_handlers = { | ||
1720 | .num_standard = ARRAY_SIZE(zd1201_iw_handler), | ||
1721 | .num_private = ARRAY_SIZE(zd1201_private_handler), | ||
1722 | .num_private_args = ARRAY_SIZE(zd1201_private_args), | ||
1723 | .standard = (iw_handler *)zd1201_iw_handler, | ||
1724 | .private = (iw_handler *)zd1201_private_handler, | ||
1725 | .private_args = (struct iw_priv_args *) zd1201_private_args, | ||
1726 | .get_wireless_stats = zd1201_get_wireless_stats, | ||
1727 | }; | ||
1728 | |||
1729 | static int zd1201_probe(struct usb_interface *interface, | ||
1730 | const struct usb_device_id *id) | ||
1731 | { | ||
1732 | struct zd1201 *zd; | ||
1733 | struct usb_device *usb; | ||
1734 | int err; | ||
1735 | short porttype; | ||
1736 | char buf[IW_ESSID_MAX_SIZE+2]; | ||
1737 | |||
1738 | usb = interface_to_usbdev(interface); | ||
1739 | |||
1740 | zd = kzalloc(sizeof(struct zd1201), GFP_KERNEL); | ||
1741 | if (!zd) | ||
1742 | return -ENOMEM; | ||
1743 | zd->ap = ap; | ||
1744 | zd->usb = usb; | ||
1745 | zd->removed = 0; | ||
1746 | init_waitqueue_head(&zd->rxdataq); | ||
1747 | INIT_HLIST_HEAD(&zd->fraglist); | ||
1748 | |||
1749 | err = zd1201_fw_upload(usb, zd->ap); | ||
1750 | if (err) { | ||
1751 | dev_err(&usb->dev, "zd1201 firmware upload failed: %d\n", err); | ||
1752 | goto err_zd; | ||
1753 | } | ||
1754 | |||
1755 | zd->endp_in = 1; | ||
1756 | zd->endp_out = 1; | ||
1757 | zd->endp_out2 = 2; | ||
1758 | zd->rx_urb = usb_alloc_urb(0, GFP_KERNEL); | ||
1759 | zd->tx_urb = usb_alloc_urb(0, GFP_KERNEL); | ||
1760 | if (!zd->rx_urb || !zd->tx_urb) | ||
1761 | goto err_zd; | ||
1762 | |||
1763 | mdelay(100); | ||
1764 | err = zd1201_drvr_start(zd); | ||
1765 | if (err) | ||
1766 | goto err_zd; | ||
1767 | |||
1768 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFMAXDATALEN, 2312); | ||
1769 | if (err) | ||
1770 | goto err_start; | ||
1771 | |||
1772 | err = zd1201_setconfig16(zd, ZD1201_RID_TXRATECNTL, | ||
1773 | ZD1201_RATEB1 | ZD1201_RATEB2 | ZD1201_RATEB5 | ZD1201_RATEB11); | ||
1774 | if (err) | ||
1775 | goto err_start; | ||
1776 | |||
1777 | zd->dev = alloc_etherdev(0); | ||
1778 | if (!zd->dev) | ||
1779 | goto err_start; | ||
1780 | |||
1781 | zd->dev->priv = zd; | ||
1782 | zd->dev->open = zd1201_net_open; | ||
1783 | zd->dev->stop = zd1201_net_stop; | ||
1784 | zd->dev->get_stats = zd1201_get_stats; | ||
1785 | zd->dev->wireless_handlers = | ||
1786 | (struct iw_handler_def *)&zd1201_iw_handlers; | ||
1787 | zd->dev->hard_start_xmit = zd1201_hard_start_xmit; | ||
1788 | zd->dev->watchdog_timeo = ZD1201_TX_TIMEOUT; | ||
1789 | zd->dev->tx_timeout = zd1201_tx_timeout; | ||
1790 | zd->dev->set_multicast_list = zd1201_set_multicast; | ||
1791 | zd->dev->set_mac_address = zd1201_set_mac_address; | ||
1792 | strcpy(zd->dev->name, "wlan%d"); | ||
1793 | |||
1794 | err = zd1201_getconfig(zd, ZD1201_RID_CNFOWNMACADDR, | ||
1795 | zd->dev->dev_addr, zd->dev->addr_len); | ||
1796 | if (err) | ||
1797 | goto err_net; | ||
1798 | |||
1799 | /* Set wildcard essid to match zd->essid */ | ||
1800 | *(__le16 *)buf = cpu_to_le16(0); | ||
1801 | err = zd1201_setconfig(zd, ZD1201_RID_CNFDESIREDSSID, buf, | ||
1802 | IW_ESSID_MAX_SIZE+2, 1); | ||
1803 | if (err) | ||
1804 | goto err_net; | ||
1805 | |||
1806 | if (zd->ap) | ||
1807 | porttype = ZD1201_PORTTYPE_AP; | ||
1808 | else | ||
1809 | porttype = ZD1201_PORTTYPE_BSS; | ||
1810 | err = zd1201_setconfig16(zd, ZD1201_RID_CNFPORTTYPE, porttype); | ||
1811 | if (err) | ||
1812 | goto err_net; | ||
1813 | |||
1814 | SET_NETDEV_DEV(zd->dev, &usb->dev); | ||
1815 | |||
1816 | err = register_netdev(zd->dev); | ||
1817 | if (err) | ||
1818 | goto err_net; | ||
1819 | dev_info(&usb->dev, "%s: ZD1201 USB Wireless interface\n", | ||
1820 | zd->dev->name); | ||
1821 | |||
1822 | usb_set_intfdata(interface, zd); | ||
1823 | return 0; | ||
1824 | |||
1825 | err_net: | ||
1826 | free_netdev(zd->dev); | ||
1827 | err_start: | ||
1828 | /* Leave the device in reset state */ | ||
1829 | zd1201_docmd(zd, ZD1201_CMDCODE_INIT, 0, 0, 0); | ||
1830 | err_zd: | ||
1831 | if (zd->tx_urb) | ||
1832 | usb_free_urb(zd->tx_urb); | ||
1833 | if (zd->rx_urb) | ||
1834 | usb_free_urb(zd->rx_urb); | ||
1835 | kfree(zd); | ||
1836 | return err; | ||
1837 | } | ||
1838 | |||
1839 | static void zd1201_disconnect(struct usb_interface *interface) | ||
1840 | { | ||
1841 | struct zd1201 *zd=(struct zd1201 *)usb_get_intfdata(interface); | ||
1842 | struct hlist_node *node, *node2; | ||
1843 | struct zd1201_frag *frag; | ||
1844 | |||
1845 | if (!zd) | ||
1846 | return; | ||
1847 | usb_set_intfdata(interface, NULL); | ||
1848 | if (zd->dev) { | ||
1849 | unregister_netdev(zd->dev); | ||
1850 | free_netdev(zd->dev); | ||
1851 | } | ||
1852 | |||
1853 | hlist_for_each_entry_safe(frag, node, node2, &zd->fraglist, fnode) { | ||
1854 | hlist_del_init(&frag->fnode); | ||
1855 | kfree_skb(frag->skb); | ||
1856 | kfree(frag); | ||
1857 | } | ||
1858 | |||
1859 | if (zd->tx_urb) { | ||
1860 | usb_kill_urb(zd->tx_urb); | ||
1861 | usb_free_urb(zd->tx_urb); | ||
1862 | } | ||
1863 | if (zd->rx_urb) { | ||
1864 | usb_kill_urb(zd->rx_urb); | ||
1865 | usb_free_urb(zd->rx_urb); | ||
1866 | } | ||
1867 | kfree(zd); | ||
1868 | } | ||
1869 | |||
1870 | #ifdef CONFIG_PM | ||
1871 | |||
1872 | static int zd1201_suspend(struct usb_interface *interface, | ||
1873 | pm_message_t message) | ||
1874 | { | ||
1875 | struct zd1201 *zd = usb_get_intfdata(interface); | ||
1876 | |||
1877 | netif_device_detach(zd->dev); | ||
1878 | |||
1879 | zd->was_enabled = zd->mac_enabled; | ||
1880 | |||
1881 | if (zd->was_enabled) | ||
1882 | return zd1201_disable(zd); | ||
1883 | else | ||
1884 | return 0; | ||
1885 | } | ||
1886 | |||
1887 | static int zd1201_resume(struct usb_interface *interface) | ||
1888 | { | ||
1889 | struct zd1201 *zd = usb_get_intfdata(interface); | ||
1890 | |||
1891 | if (!zd || !zd->dev) | ||
1892 | return -ENODEV; | ||
1893 | |||
1894 | netif_device_attach(zd->dev); | ||
1895 | |||
1896 | if (zd->was_enabled) | ||
1897 | return zd1201_enable(zd); | ||
1898 | else | ||
1899 | return 0; | ||
1900 | } | ||
1901 | |||
1902 | #else | ||
1903 | |||
1904 | #define zd1201_suspend NULL | ||
1905 | #define zd1201_resume NULL | ||
1906 | |||
1907 | #endif | ||
1908 | |||
1909 | static struct usb_driver zd1201_usb = { | ||
1910 | .name = "zd1201", | ||
1911 | .probe = zd1201_probe, | ||
1912 | .disconnect = zd1201_disconnect, | ||
1913 | .id_table = zd1201_table, | ||
1914 | .suspend = zd1201_suspend, | ||
1915 | .resume = zd1201_resume, | ||
1916 | }; | ||
1917 | |||
1918 | static int __init zd1201_init(void) | ||
1919 | { | ||
1920 | return usb_register(&zd1201_usb); | ||
1921 | } | ||
1922 | |||
1923 | static void __exit zd1201_cleanup(void) | ||
1924 | { | ||
1925 | usb_deregister(&zd1201_usb); | ||
1926 | } | ||
1927 | |||
1928 | module_init(zd1201_init); | ||
1929 | module_exit(zd1201_cleanup); | ||
diff --git a/drivers/net/wireless/zd1201.h b/drivers/net/wireless/zd1201.h new file mode 100644 index 000000000000..235f0ee34b24 --- /dev/null +++ b/drivers/net/wireless/zd1201.h | |||
@@ -0,0 +1,148 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2004, 2005 Jeroen Vreeken (pe1rxq@amsat.org) | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * version 2 as published by the Free Software Foundation. | ||
7 | * | ||
8 | * Parts of this driver have been derived from a wlan-ng version | ||
9 | * modified by ZyDAS. | ||
10 | * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved. | ||
11 | */ | ||
12 | |||
13 | #ifndef _INCLUDE_ZD1201_H_ | ||
14 | #define _INCLUDE_ZD1201_H_ | ||
15 | |||
16 | #define ZD1201_NUMKEYS 4 | ||
17 | #define ZD1201_MAXKEYLEN 13 | ||
18 | #define ZD1201_MAXMULTI 16 | ||
19 | #define ZD1201_FRAGMAX 2500 | ||
20 | #define ZD1201_FRAGMIN 256 | ||
21 | #define ZD1201_RTSMAX 2500 | ||
22 | |||
23 | #define ZD1201_RXSIZE 3000 | ||
24 | |||
25 | struct zd1201 { | ||
26 | struct usb_device *usb; | ||
27 | int removed; | ||
28 | struct net_device *dev; | ||
29 | struct net_device_stats stats; | ||
30 | struct iw_statistics iwstats; | ||
31 | |||
32 | int endp_in; | ||
33 | int endp_out; | ||
34 | int endp_out2; | ||
35 | struct urb *rx_urb; | ||
36 | struct urb *tx_urb; | ||
37 | |||
38 | unsigned char rxdata[ZD1201_RXSIZE]; | ||
39 | int rxlen; | ||
40 | wait_queue_head_t rxdataq; | ||
41 | int rxdatas; | ||
42 | struct hlist_head fraglist; | ||
43 | unsigned char txdata[ZD1201_RXSIZE]; | ||
44 | |||
45 | int ap; | ||
46 | char essid[IW_ESSID_MAX_SIZE+1]; | ||
47 | int essidlen; | ||
48 | int mac_enabled; | ||
49 | int was_enabled; | ||
50 | int monitor; | ||
51 | int encode_enabled; | ||
52 | int encode_restricted; | ||
53 | unsigned char encode_keys[ZD1201_NUMKEYS][ZD1201_MAXKEYLEN]; | ||
54 | int encode_keylen[ZD1201_NUMKEYS]; | ||
55 | }; | ||
56 | |||
57 | struct zd1201_frag { | ||
58 | struct hlist_node fnode; | ||
59 | int seq; | ||
60 | struct sk_buff *skb; | ||
61 | }; | ||
62 | |||
63 | #define ZD1201SIWHOSTAUTH SIOCIWFIRSTPRIV | ||
64 | #define ZD1201GIWHOSTAUTH ZD1201SIWHOSTAUTH+1 | ||
65 | #define ZD1201SIWAUTHSTA SIOCIWFIRSTPRIV+2 | ||
66 | #define ZD1201SIWMAXASSOC SIOCIWFIRSTPRIV+4 | ||
67 | #define ZD1201GIWMAXASSOC ZD1201SIWMAXASSOC+1 | ||
68 | |||
69 | #define ZD1201_FW_TIMEOUT (1000) | ||
70 | |||
71 | #define ZD1201_TX_TIMEOUT (2000) | ||
72 | |||
73 | #define ZD1201_USB_CMDREQ 0 | ||
74 | #define ZD1201_USB_RESREQ 1 | ||
75 | |||
76 | #define ZD1201_CMDCODE_INIT 0x00 | ||
77 | #define ZD1201_CMDCODE_ENABLE 0x01 | ||
78 | #define ZD1201_CMDCODE_DISABLE 0x02 | ||
79 | #define ZD1201_CMDCODE_ALLOC 0x0a | ||
80 | #define ZD1201_CMDCODE_INQUIRE 0x11 | ||
81 | #define ZD1201_CMDCODE_SETRXRID 0x17 | ||
82 | #define ZD1201_CMDCODE_ACCESS 0x21 | ||
83 | |||
84 | #define ZD1201_PACKET_EVENTSTAT 0x0 | ||
85 | #define ZD1201_PACKET_RXDATA 0x1 | ||
86 | #define ZD1201_PACKET_INQUIRE 0x2 | ||
87 | #define ZD1201_PACKET_RESOURCE 0x3 | ||
88 | |||
89 | #define ZD1201_ACCESSBIT 0x0100 | ||
90 | |||
91 | #define ZD1201_RID_CNFPORTTYPE 0xfc00 | ||
92 | #define ZD1201_RID_CNFOWNMACADDR 0xfc01 | ||
93 | #define ZD1201_RID_CNFDESIREDSSID 0xfc02 | ||
94 | #define ZD1201_RID_CNFOWNCHANNEL 0xfc03 | ||
95 | #define ZD1201_RID_CNFOWNSSID 0xfc04 | ||
96 | #define ZD1201_RID_CNFMAXDATALEN 0xfc07 | ||
97 | #define ZD1201_RID_CNFPMENABLED 0xfc09 | ||
98 | #define ZD1201_RID_CNFPMEPS 0xfc0a | ||
99 | #define ZD1201_RID_CNFMAXSLEEPDURATION 0xfc0c | ||
100 | #define ZD1201_RID_CNFDEFAULTKEYID 0xfc23 | ||
101 | #define ZD1201_RID_CNFDEFAULTKEY0 0xfc24 | ||
102 | #define ZD1201_RID_CNFDEFAULTKEY1 0xfc25 | ||
103 | #define ZD1201_RID_CNFDEFAULTKEY2 0xfc26 | ||
104 | #define ZD1201_RID_CNFDEFAULTKEY3 0xfc27 | ||
105 | #define ZD1201_RID_CNFWEBFLAGS 0xfc28 | ||
106 | #define ZD1201_RID_CNFAUTHENTICATION 0xfc2a | ||
107 | #define ZD1201_RID_CNFMAXASSOCSTATIONS 0xfc2b | ||
108 | #define ZD1201_RID_CNFHOSTAUTH 0xfc2e | ||
109 | #define ZD1201_RID_CNFGROUPADDRESS 0xfc80 | ||
110 | #define ZD1201_RID_CNFFRAGTHRESHOLD 0xfc82 | ||
111 | #define ZD1201_RID_CNFRTSTHRESHOLD 0xfc83 | ||
112 | #define ZD1201_RID_TXRATECNTL 0xfc84 | ||
113 | #define ZD1201_RID_PROMISCUOUSMODE 0xfc85 | ||
114 | #define ZD1201_RID_CNFBASICRATES 0xfcb3 | ||
115 | #define ZD1201_RID_AUTHENTICATESTA 0xfce3 | ||
116 | #define ZD1201_RID_CURRENTBSSID 0xfd42 | ||
117 | #define ZD1201_RID_COMMSQUALITY 0xfd43 | ||
118 | #define ZD1201_RID_CURRENTTXRATE 0xfd44 | ||
119 | #define ZD1201_RID_CNFMAXTXBUFFERNUMBER 0xfda0 | ||
120 | #define ZD1201_RID_CURRENTCHANNEL 0xfdc1 | ||
121 | |||
122 | #define ZD1201_INQ_SCANRESULTS 0xf101 | ||
123 | |||
124 | #define ZD1201_INF_LINKSTATUS 0xf200 | ||
125 | #define ZD1201_INF_ASSOCSTATUS 0xf201 | ||
126 | #define ZD1201_INF_AUTHREQ 0xf202 | ||
127 | |||
128 | #define ZD1201_ASSOCSTATUS_STAASSOC 0x1 | ||
129 | #define ZD1201_ASSOCSTATUS_REASSOC 0x2 | ||
130 | #define ZD1201_ASSOCSTATUS_DISASSOC 0x3 | ||
131 | #define ZD1201_ASSOCSTATUS_ASSOCFAIL 0x4 | ||
132 | #define ZD1201_ASSOCSTATUS_AUTHFAIL 0x5 | ||
133 | |||
134 | #define ZD1201_PORTTYPE_IBSS 0 | ||
135 | #define ZD1201_PORTTYPE_BSS 1 | ||
136 | #define ZD1201_PORTTYPE_WDS 2 | ||
137 | #define ZD1201_PORTTYPE_PSEUDOIBSS 3 | ||
138 | #define ZD1201_PORTTYPE_AP 6 | ||
139 | |||
140 | #define ZD1201_RATEB1 1 | ||
141 | #define ZD1201_RATEB2 2 | ||
142 | #define ZD1201_RATEB5 4 /* 5.5 really, but 5 is shorter :) */ | ||
143 | #define ZD1201_RATEB11 8 | ||
144 | |||
145 | #define ZD1201_CNFAUTHENTICATION_OPENSYSTEM 0x0001 | ||
146 | #define ZD1201_CNFAUTHENTICATION_SHAREDKEY 0x0002 | ||
147 | |||
148 | #endif /* _INCLUDE_ZD1201_H_ */ | ||