diff options
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h | 4 | ||||
-rw-r--r-- | drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c | 8 |
2 files changed, 9 insertions, 3 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h index ec62a5c8bd37..28a0bcfe61ff 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h | |||
@@ -1603,6 +1603,10 @@ | |||
1603 | * of counts that the SM entered the EEE LPI state. Clock 25MHz. Read only | 1603 | * of counts that the SM entered the EEE LPI state. Clock 25MHz. Read only |
1604 | * register. Reset on hard reset. */ | 1604 | * register. Reset on hard reset. */ |
1605 | #define MISC_REG_CPMU_LP_SM_ENT_CNT_P0 0xa8b8 | 1605 | #define MISC_REG_CPMU_LP_SM_ENT_CNT_P0 0xa8b8 |
1606 | /* [RW 16] EEE LPI Entry Events Counter. A statistic counter with the number | ||
1607 | * of counts that the SM entered the EEE LPI state. Clock 25MHz. Read only | ||
1608 | * register. Reset on hard reset. */ | ||
1609 | #define MISC_REG_CPMU_LP_SM_ENT_CNT_P1 0xa8bc | ||
1606 | /* [RW 32] The following driver registers(1...16) represent 16 drivers and | 1610 | /* [RW 32] The following driver registers(1...16) represent 16 drivers and |
1607 | 32 clients. Each client can be controlled by one driver only. One in each | 1611 | 32 clients. Each client can be controlled by one driver only. One in each |
1608 | bit represent that this driver control the appropriate client (Ex: bit 5 | 1612 | bit represent that this driver control the appropriate client (Ex: bit 5 |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c index 667d89042d35..332db64dd5be 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c | |||
@@ -785,9 +785,11 @@ static int bnx2x_hw_stats_update(struct bnx2x *bp) | |||
785 | 785 | ||
786 | pstats->host_port_stats_counter++; | 786 | pstats->host_port_stats_counter++; |
787 | 787 | ||
788 | if (CHIP_IS_E3(bp)) | 788 | if (CHIP_IS_E3(bp)) { |
789 | estats->eee_tx_lpi += REG_RD(bp, | 789 | u32 lpi_reg = BP_PORT(bp) ? MISC_REG_CPMU_LP_SM_ENT_CNT_P1 |
790 | MISC_REG_CPMU_LP_SM_ENT_CNT_P0); | 790 | : MISC_REG_CPMU_LP_SM_ENT_CNT_P0; |
791 | estats->eee_tx_lpi += REG_RD(bp, lpi_reg); | ||
792 | } | ||
791 | 793 | ||
792 | if (!BP_NOMCP(bp)) { | 794 | if (!BP_NOMCP(bp)) { |
793 | u32 nig_timer_max = | 795 | u32 nig_timer_max = |