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-rw-r--r--drivers/net/3c501.c65
-rw-r--r--drivers/net/3c503.c36
-rw-r--r--drivers/net/3c505.c215
-rw-r--r--drivers/net/3c507.c55
-rw-r--r--drivers/net/3c509.c76
-rw-r--r--drivers/net/3c515.c124
-rw-r--r--drivers/net/3c523.c91
-rw-r--r--drivers/net/3c527.c46
-rw-r--r--drivers/net/3c59x.c214
-rw-r--r--drivers/net/8139cp.c32
-rw-r--r--drivers/net/8139too.c210
-rw-r--r--drivers/net/82596.c14
-rw-r--r--drivers/net/8390.c10
-rw-r--r--drivers/net/8390p.c19
-rw-r--r--drivers/net/Kconfig48
-rw-r--r--drivers/net/Makefile5
-rw-r--r--drivers/net/acenic.c1
-rw-r--r--drivers/net/appletalk/ipddp.c41
-rw-r--r--drivers/net/arm/ep93xx_eth.c4
-rw-r--r--drivers/net/arm/ixp4xx_eth.c8
-rw-r--r--drivers/net/atl1c/atl1c_main.c73
-rw-r--r--drivers/net/atl1e/atl1e.h1
-rw-r--r--drivers/net/atl1e/atl1e_main.c11
-rw-r--r--drivers/net/atlx/atl1.c8
-rw-r--r--drivers/net/b44.c4
-rw-r--r--drivers/net/b44.h1
-rw-r--r--drivers/net/benet/be_main.c30
-rw-r--r--drivers/net/bfin_mac.c235
-rw-r--r--drivers/net/bmac.c16
-rw-r--r--drivers/net/bnx2.c32
-rw-r--r--drivers/net/bnx2.h2
-rw-r--r--drivers/net/bnx2x.h15
-rw-r--r--drivers/net/bnx2x_fw_file_hdr.h37
-rw-r--r--drivers/net/bnx2x_init.h605
-rw-r--r--drivers/net/bnx2x_init_ops.h442
-rw-r--r--drivers/net/bnx2x_init_values.h16322
-rw-r--r--drivers/net/bnx2x_main.c359
-rw-r--r--drivers/net/bonding/bond_3ad.c5
-rw-r--r--drivers/net/bonding/bond_3ad.h4
-rw-r--r--drivers/net/bonding/bond_main.c76
-rw-r--r--drivers/net/bonding/bond_sysfs.c9
-rw-r--r--drivers/net/bonding/bonding.h3
-rw-r--r--drivers/net/can/Kconfig62
-rw-r--r--drivers/net/can/Makefile7
-rw-r--r--drivers/net/can/dev.c657
-rw-r--r--drivers/net/can/sja1000/Makefile11
-rw-r--r--drivers/net/can/sja1000/ems_pci.c320
-rw-r--r--drivers/net/can/sja1000/kvaser_pci.c412
-rw-r--r--drivers/net/can/sja1000/sja1000.c637
-rw-r--r--drivers/net/can/sja1000/sja1000.h181
-rw-r--r--drivers/net/can/sja1000/sja1000_of_platform.c233
-rw-r--r--drivers/net/can/sja1000/sja1000_platform.c165
-rw-r--r--drivers/net/chelsio/common.h2
-rw-r--r--drivers/net/chelsio/cphy.h51
-rw-r--r--drivers/net/chelsio/cxgb2.c36
-rw-r--r--drivers/net/chelsio/mv88e1xxx.c5
-rw-r--r--drivers/net/chelsio/mv88x201x.c50
-rw-r--r--drivers/net/chelsio/my3126.c14
-rw-r--r--drivers/net/chelsio/sge.c5
-rw-r--r--drivers/net/chelsio/subr.c46
-rw-r--r--drivers/net/cpmac.c33
-rw-r--r--drivers/net/cxgb3/Makefile2
-rw-r--r--drivers/net/cxgb3/adapter.h2
-rw-r--r--drivers/net/cxgb3/ael1002.c958
-rw-r--r--drivers/net/cxgb3/aq100x.c355
-rw-r--r--drivers/net/cxgb3/common.h67
-rw-r--r--drivers/net/cxgb3/cxgb3_main.c74
-rw-r--r--drivers/net/cxgb3/sge.c71
-rw-r--r--drivers/net/cxgb3/t3_hw.c89
-rw-r--r--drivers/net/cxgb3/vsc8211.c70
-rw-r--r--drivers/net/davinci_emac.c2832
-rw-r--r--drivers/net/de600.c19
-rw-r--r--drivers/net/de620.c61
-rw-r--r--drivers/net/depca.c4
-rw-r--r--drivers/net/dl2k.c8
-rw-r--r--drivers/net/dm9000.c30
-rw-r--r--drivers/net/e1000/e1000_main.c40
-rw-r--r--drivers/net/e1000e/hw.h2
-rw-r--r--drivers/net/e1000e/netdev.c20
-rw-r--r--drivers/net/ehea/ehea_main.c8
-rw-r--r--drivers/net/enic/enic_main.c2
-rw-r--r--drivers/net/eql.c1
-rw-r--r--drivers/net/fec.c897
-rw-r--r--drivers/net/fec.h127
-rw-r--r--drivers/net/fec_mpc52xx.c180
-rw-r--r--drivers/net/fec_mpc52xx_phy.c26
-rw-r--r--drivers/net/forcedeth.c23
-rw-r--r--drivers/net/fs_enet/fs_enet-main.c108
-rw-r--r--drivers/net/fs_enet/fs_enet.h5
-rw-r--r--drivers/net/fs_enet/mac-fec.c34
-rw-r--r--drivers/net/fs_enet/mii-bitbang.c29
-rw-r--r--drivers/net/fs_enet/mii-fec.c32
-rw-r--r--drivers/net/fsl_pq_mdio.c53
-rw-r--r--drivers/net/gianfar.c112
-rw-r--r--drivers/net/gianfar.h4
-rw-r--r--drivers/net/hamachi.c3
-rw-r--r--drivers/net/hp100.c4
-rw-r--r--drivers/net/hplance.c21
-rw-r--r--drivers/net/ibmveth.c40
-rw-r--r--drivers/net/ifb.c1
-rw-r--r--drivers/net/igb/e1000_82575.h1
-rw-r--r--drivers/net/igb/e1000_defines.h3
-rw-r--r--drivers/net/igb/e1000_mbx.c8
-rw-r--r--drivers/net/igb/e1000_phy.h2
-rw-r--r--drivers/net/igb/e1000_regs.h1
-rw-r--r--drivers/net/igb/igb.h15
-rw-r--r--drivers/net/igb/igb_ethtool.c37
-rw-r--r--drivers/net/igb/igb_main.c143
-rw-r--r--drivers/net/igbvf/ethtool.c36
-rw-r--r--drivers/net/igbvf/igbvf.h6
-rw-r--r--drivers/net/igbvf/netdev.c18
-rw-r--r--drivers/net/irda/au1k_ir.c18
-rw-r--r--drivers/net/irda/irda-usb.c40
-rw-r--r--drivers/net/irda/pxaficp_ir.c16
-rw-r--r--drivers/net/irda/sa1100_ir.c18
-rw-r--r--drivers/net/iseries_veth.c17
-rw-r--r--drivers/net/ixgb/ixgb_hw.c20
-rw-r--r--drivers/net/ixgb/ixgb_hw.h14
-rw-r--r--drivers/net/ixgb/ixgb_main.c16
-rw-r--r--drivers/net/ixgb/ixgb_osdep.h2
-rw-r--r--drivers/net/ixgbe/Makefile2
-rw-r--r--drivers/net/ixgbe/ixgbe.h47
-rw-r--r--drivers/net/ixgbe/ixgbe_82598.c225
-rw-r--r--drivers/net/ixgbe/ixgbe_82599.c361
-rw-r--r--drivers/net/ixgbe/ixgbe_common.c78
-rw-r--r--drivers/net/ixgbe/ixgbe_common.h4
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_82598.c4
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_nl.c119
-rw-r--r--drivers/net/ixgbe/ixgbe_ethtool.c62
-rw-r--r--drivers/net/ixgbe/ixgbe_fcoe.c552
-rw-r--r--drivers/net/ixgbe/ixgbe_fcoe.h66
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c1171
-rw-r--r--drivers/net/ixgbe/ixgbe_phy.c165
-rw-r--r--drivers/net/ixgbe/ixgbe_phy.h5
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h169
-rw-r--r--drivers/net/ixp2000/ixpdev.c19
-rw-r--r--drivers/net/jazzsonic.c19
-rw-r--r--drivers/net/jme.c1
-rw-r--r--drivers/net/korina.c39
-rw-r--r--drivers/net/lasi_82596.c6
-rw-r--r--drivers/net/lib82596.c23
-rw-r--r--drivers/net/ll_temac.h374
-rw-r--r--drivers/net/ll_temac_main.c969
-rw-r--r--drivers/net/ll_temac_mdio.c120
-rw-r--r--drivers/net/loopback.c22
-rw-r--r--drivers/net/mac8390.c19
-rw-r--r--drivers/net/mac89x0.c2
-rw-r--r--drivers/net/macb.c18
-rw-r--r--drivers/net/mace.c16
-rw-r--r--drivers/net/macmace.c18
-rw-r--r--drivers/net/macvlan.c34
-rw-r--r--drivers/net/mdio.c414
-rw-r--r--drivers/net/meth.c28
-rw-r--r--drivers/net/mii.c91
-rw-r--r--drivers/net/mipsnet.c15
-rw-r--r--drivers/net/mlx4/Makefile2
-rw-r--r--drivers/net/mlx4/en_cq.c3
-rw-r--r--drivers/net/mlx4/en_ethtool.c (renamed from drivers/net/mlx4/en_params.c)67
-rw-r--r--drivers/net/mlx4/en_main.c68
-rw-r--r--drivers/net/mlx4/en_netdev.c199
-rw-r--r--drivers/net/mlx4/en_rx.c139
-rw-r--r--drivers/net/mlx4/en_tx.c112
-rw-r--r--drivers/net/mlx4/mlx4_en.h49
-rw-r--r--drivers/net/mlx4/mr.c7
-rw-r--r--drivers/net/mv643xx_eth.c98
-rw-r--r--drivers/net/mvme147.c17
-rw-r--r--drivers/net/myri10ge/myri10ge.c68
-rw-r--r--drivers/net/ne2k-pci.c2
-rw-r--r--drivers/net/ne3210.c4
-rw-r--r--drivers/net/netx-eth.c17
-rw-r--r--drivers/net/netxen/netxen_nic.h624
-rw-r--r--drivers/net/netxen/netxen_nic_ctx.c241
-rw-r--r--drivers/net/netxen/netxen_nic_ethtool.c106
-rw-r--r--drivers/net/netxen/netxen_nic_hdr.h8
-rw-r--r--drivers/net/netxen/netxen_nic_hw.c737
-rw-r--r--drivers/net/netxen/netxen_nic_hw.h76
-rw-r--r--drivers/net/netxen/netxen_nic_init.c536
-rw-r--r--drivers/net/netxen/netxen_nic_main.c411
-rw-r--r--drivers/net/netxen/netxen_nic_niu.c341
-rw-r--r--drivers/net/netxen/netxen_nic_phan_reg.h27
-rw-r--r--drivers/net/niu.c66
-rw-r--r--drivers/net/ns83820.c6
-rw-r--r--drivers/net/pasemi_mac.c58
-rw-r--r--drivers/net/pasemi_mac.h1
-rw-r--r--drivers/net/pci-skeleton.c19
-rw-r--r--drivers/net/pcmcia/3c574_cs.c2
-rw-r--r--drivers/net/pcmcia/3c589_cs.c4
-rw-r--r--drivers/net/pcnet32.c5
-rw-r--r--drivers/net/phy/mdio_bus.c29
-rw-r--r--drivers/net/phy/phy_device.c163
-rw-r--r--drivers/net/ppp_generic.c1
-rw-r--r--drivers/net/pppol2tp.c3
-rw-r--r--drivers/net/qla3xxx.c1
-rw-r--r--drivers/net/qlge/qlge_main.c1
-rw-r--r--drivers/net/r6040.c18
-rw-r--r--drivers/net/r8169.c216
-rw-r--r--drivers/net/rionet.c14
-rw-r--r--drivers/net/s2io-regs.h5
-rw-r--r--drivers/net/s2io.c22
-rw-r--r--drivers/net/sb1250-mac.c35
-rw-r--r--drivers/net/sfc/Kconfig2
-rw-r--r--drivers/net/sfc/boards.c2
-rw-r--r--drivers/net/sfc/efx.c29
-rw-r--r--drivers/net/sfc/ethtool.c19
-rw-r--r--drivers/net/sfc/falcon.c137
-rw-r--r--drivers/net/sfc/falcon_hwdefs.h3
-rw-r--r--drivers/net/sfc/falcon_xmac.c2
-rw-r--r--drivers/net/sfc/mdio_10g.c385
-rw-r--r--drivers/net/sfc/mdio_10g.h282
-rw-r--r--drivers/net/sfc/net_driver.h34
-rw-r--r--drivers/net/sfc/rx.c26
-rw-r--r--drivers/net/sfc/selftest.c22
-rw-r--r--drivers/net/sfc/selftest.h2
-rw-r--r--drivers/net/sfc/sfe4001.c3
-rw-r--r--drivers/net/sfc/tenxpress.c240
-rw-r--r--drivers/net/sfc/tx.c7
-rw-r--r--drivers/net/sfc/xenpack.h62
-rw-r--r--drivers/net/sfc/xfp_phy.c55
-rw-r--r--drivers/net/sgiseeq.c18
-rw-r--r--drivers/net/sh_eth.c497
-rw-r--r--drivers/net/sh_eth.h278
-rw-r--r--drivers/net/sis190.c2
-rw-r--r--drivers/net/skfp/skfddi.c156
-rw-r--r--drivers/net/skge.c2
-rw-r--r--drivers/net/sky2.c1
-rw-r--r--drivers/net/smc-mca.c4
-rw-r--r--drivers/net/smc911x.c23
-rw-r--r--drivers/net/smsc911x.c61
-rw-r--r--drivers/net/sun3lance.c17
-rw-r--r--drivers/net/sundance.c53
-rw-r--r--drivers/net/tc35815.c13
-rw-r--r--drivers/net/tehuti.c5
-rw-r--r--drivers/net/tg3.c97
-rw-r--r--drivers/net/tg3.h6
-rw-r--r--drivers/net/tulip/de4x5.c6
-rw-r--r--drivers/net/tulip/winbond-840.c3
-rw-r--r--drivers/net/tun.c93
-rw-r--r--drivers/net/ucc_geth.c108
-rw-r--r--drivers/net/ucc_geth.h3
-rw-r--r--drivers/net/usb/Kconfig8
-rw-r--r--drivers/net/usb/Makefile1
-rw-r--r--drivers/net/usb/cdc_ether.c33
-rw-r--r--drivers/net/usb/dm9601.c12
-rw-r--r--drivers/net/usb/hso.c8
-rw-r--r--drivers/net/usb/int51x1.c253
-rw-r--r--drivers/net/usb/kaweth.c33
-rw-r--r--drivers/net/usb/rtl8150.c9
-rw-r--r--drivers/net/usb/smsc95xx.c4
-rw-r--r--drivers/net/usb/usbnet.c37
-rw-r--r--drivers/net/veth.c2
-rw-r--r--drivers/net/via-rhine.c58
-rw-r--r--drivers/net/via-velocity.c22
-rw-r--r--drivers/net/via-velocity.h1
-rw-r--r--drivers/net/virtio_net.c19
-rw-r--r--drivers/net/vxge/vxge-main.c6
-rw-r--r--drivers/net/vxge/vxge-traffic.c4
-rw-r--r--drivers/net/wan/hdlc_fr.c1
-rw-r--r--drivers/net/wan/ixp4xx_hss.c4
-rw-r--r--drivers/net/wan/pc300_drv.c20
-rw-r--r--drivers/net/wimax/i2400m/control.c100
-rw-r--r--drivers/net/wimax/i2400m/driver.c5
-rw-r--r--drivers/net/wimax/i2400m/i2400m.h5
-rw-r--r--drivers/net/wimax/i2400m/netdev.c4
-rw-r--r--drivers/net/wimax/i2400m/rx.c6
-rw-r--r--drivers/net/wimax/i2400m/sdio.c18
-rw-r--r--drivers/net/wireless/Kconfig18
-rw-r--r--drivers/net/wireless/Makefile8
-rw-r--r--drivers/net/wireless/adm8211.c14
-rw-r--r--drivers/net/wireless/at76c50x-usb.c19
-rw-r--r--drivers/net/wireless/ath/Kconfig8
-rw-r--r--drivers/net/wireless/ath/Makefile6
-rw-r--r--drivers/net/wireless/ath/ar9170/Kconfig (renamed from drivers/net/wireless/ar9170/Kconfig)1
-rw-r--r--drivers/net/wireless/ath/ar9170/Makefile (renamed from drivers/net/wireless/ar9170/Makefile)0
-rw-r--r--drivers/net/wireless/ath/ar9170/ar9170.h (renamed from drivers/net/wireless/ar9170/ar9170.h)32
-rw-r--r--drivers/net/wireless/ath/ar9170/cmd.c (renamed from drivers/net/wireless/ar9170/cmd.c)0
-rw-r--r--drivers/net/wireless/ath/ar9170/cmd.h (renamed from drivers/net/wireless/ar9170/cmd.h)0
-rw-r--r--drivers/net/wireless/ath/ar9170/eeprom.h (renamed from drivers/net/wireless/ar9170/eeprom.h)0
-rw-r--r--drivers/net/wireless/ath/ar9170/hw.h (renamed from drivers/net/wireless/ar9170/hw.h)17
-rw-r--r--drivers/net/wireless/ath/ar9170/led.c (renamed from drivers/net/wireless/ar9170/led.c)0
-rw-r--r--drivers/net/wireless/ath/ar9170/mac.c (renamed from drivers/net/wireless/ar9170/mac.c)33
-rw-r--r--drivers/net/wireless/ath/ar9170/main.c (renamed from drivers/net/wireless/ar9170/main.c)659
-rw-r--r--drivers/net/wireless/ath/ar9170/phy.c (renamed from drivers/net/wireless/ar9170/phy.c)0
-rw-r--r--drivers/net/wireless/ath/ar9170/usb.c (renamed from drivers/net/wireless/ar9170/usb.c)6
-rw-r--r--drivers/net/wireless/ath/ar9170/usb.h (renamed from drivers/net/wireless/ar9170/usb.h)2
-rw-r--r--drivers/net/wireless/ath/ath5k/Kconfig (renamed from drivers/net/wireless/ath5k/Kconfig)1
-rw-r--r--drivers/net/wireless/ath/ath5k/Makefile (renamed from drivers/net/wireless/ath5k/Makefile)0
-rw-r--r--drivers/net/wireless/ath/ath5k/ath5k.h (renamed from drivers/net/wireless/ath5k/ath5k.h)42
-rw-r--r--drivers/net/wireless/ath/ath5k/attach.c (renamed from drivers/net/wireless/ath5k/attach.c)1
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c (renamed from drivers/net/wireless/ath5k/base.c)326
-rw-r--r--drivers/net/wireless/ath/ath5k/base.h (renamed from drivers/net/wireless/ath5k/base.h)1
-rw-r--r--drivers/net/wireless/ath/ath5k/caps.c (renamed from drivers/net/wireless/ath5k/caps.c)0
-rw-r--r--drivers/net/wireless/ath/ath5k/debug.c (renamed from drivers/net/wireless/ath5k/debug.c)0
-rw-r--r--drivers/net/wireless/ath/ath5k/debug.h (renamed from drivers/net/wireless/ath5k/debug.h)0
-rw-r--r--drivers/net/wireless/ath/ath5k/desc.c (renamed from drivers/net/wireless/ath5k/desc.c)0
-rw-r--r--drivers/net/wireless/ath/ath5k/desc.h (renamed from drivers/net/wireless/ath5k/desc.h)0
-rw-r--r--drivers/net/wireless/ath/ath5k/dma.c (renamed from drivers/net/wireless/ath5k/dma.c)2
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c (renamed from drivers/net/wireless/ath5k/eeprom.c)73
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.h (renamed from drivers/net/wireless/ath5k/eeprom.h)46
-rw-r--r--drivers/net/wireless/ath/ath5k/gpio.c (renamed from drivers/net/wireless/ath5k/gpio.c)0
-rw-r--r--drivers/net/wireless/ath/ath5k/initvals.c (renamed from drivers/net/wireless/ath5k/initvals.c)8
-rw-r--r--drivers/net/wireless/ath/ath5k/led.c (renamed from drivers/net/wireless/ath5k/led.c)10
-rw-r--r--drivers/net/wireless/ath/ath5k/pcu.c (renamed from drivers/net/wireless/ath5k/pcu.c)10
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c (renamed from drivers/net/wireless/ath5k/phy.c)496
-rw-r--r--drivers/net/wireless/ath/ath5k/qcu.c (renamed from drivers/net/wireless/ath5k/qcu.c)7
-rw-r--r--drivers/net/wireless/ath/ath5k/reg.h (renamed from drivers/net/wireless/ath5k/reg.h)9
-rw-r--r--drivers/net/wireless/ath/ath5k/reset.c (renamed from drivers/net/wireless/ath5k/reset.c)75
-rw-r--r--drivers/net/wireless/ath/ath5k/rfbuffer.h (renamed from drivers/net/wireless/ath5k/rfbuffer.h)0
-rw-r--r--drivers/net/wireless/ath/ath5k/rfgain.h (renamed from drivers/net/wireless/ath5k/rfgain.h)0
-rw-r--r--drivers/net/wireless/ath/ath9k/Kconfig (renamed from drivers/net/wireless/ath9k/Kconfig)1
-rw-r--r--drivers/net/wireless/ath/ath9k/Makefile (renamed from drivers/net/wireless/ath9k/Makefile)1
-rw-r--r--drivers/net/wireless/ath/ath9k/ahb.c (renamed from drivers/net/wireless/ath9k/ahb.c)0
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.c (renamed from drivers/net/wireless/ath9k/ani.c)8
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.h (renamed from drivers/net/wireless/ath9k/ani.h)0
-rw-r--r--drivers/net/wireless/ath/ath9k/ath9k.h (renamed from drivers/net/wireless/ath9k/ath9k.h)119
-rw-r--r--drivers/net/wireless/ath/ath9k/beacon.c (renamed from drivers/net/wireless/ath9k/beacon.c)124
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.c (renamed from drivers/net/wireless/ath9k/calib.c)129
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.h (renamed from drivers/net/wireless/ath9k/calib.h)33
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.c (renamed from drivers/net/wireless/ath9k/debug.c)3
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.h (renamed from drivers/net/wireless/ath9k/debug.h)25
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.c (renamed from drivers/net/wireless/ath9k/eeprom.c)75
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.h (renamed from drivers/net/wireless/ath9k/eeprom.h)4
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c (renamed from drivers/net/wireless/ath9k/hw.c)269
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h (renamed from drivers/net/wireless/ath9k/hw.h)95
-rw-r--r--drivers/net/wireless/ath/ath9k/initvals.h (renamed from drivers/net/wireless/ath9k/initvals.h)0
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.c (renamed from drivers/net/wireless/ath9k/mac.c)63
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.h (renamed from drivers/net/wireless/ath9k/mac.h)0
-rw-r--r--drivers/net/wireless/ath/ath9k/main.c (renamed from drivers/net/wireless/ath9k/main.c)665
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-rw-r--r--drivers/net/wireless/ath/ath9k/phy.h (renamed from drivers/net/wireless/ath9k/phy.h)5
-rw-r--r--drivers/net/wireless/ath/ath9k/rc.c (renamed from drivers/net/wireless/ath9k/rc.c)96
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-rw-r--r--drivers/net/wireless/ath/ath9k/recv.c (renamed from drivers/net/wireless/ath9k/recv.c)279
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h (renamed from drivers/net/wireless/ath9k/reg.h)0
-rw-r--r--drivers/net/wireless/ath/ath9k/virtual.c (renamed from drivers/net/wireless/ath9k/virtual.c)0
-rw-r--r--drivers/net/wireless/ath/ath9k/xmit.c (renamed from drivers/net/wireless/ath9k/xmit.c)86
-rw-r--r--drivers/net/wireless/ath/main.c22
-rw-r--r--drivers/net/wireless/ath/regd.c (renamed from drivers/net/wireless/ath9k/regd.c)251
-rw-r--r--drivers/net/wireless/ath/regd.h (renamed from drivers/net/wireless/ath9k/regd.h)40
-rw-r--r--drivers/net/wireless/ath/regd_common.h (renamed from drivers/net/wireless/ath9k/regd_common.h)0
-rw-r--r--drivers/net/wireless/atmel_cs.c2
-rw-r--r--drivers/net/wireless/b43/Kconfig8
-rw-r--r--drivers/net/wireless/b43/b43.h8
-rw-r--r--drivers/net/wireless/b43/main.c145
-rw-r--r--drivers/net/wireless/b43/rfkill.c1
-rw-r--r--drivers/net/wireless/b43legacy/Kconfig8
-rw-r--r--drivers/net/wireless/b43legacy/b43legacy.h12
-rw-r--r--drivers/net/wireless/b43legacy/main.c329
-rw-r--r--drivers/net/wireless/b43legacy/pio.c2
-rw-r--r--drivers/net/wireless/b43legacy/rfkill.c1
-rw-r--r--drivers/net/wireless/b43legacy/xmit.c2
-rw-r--r--drivers/net/wireless/b43legacy/xmit.h4
-rw-r--r--drivers/net/wireless/hostap/hostap_hw.c2
-rw-r--r--drivers/net/wireless/hostap/hostap_plx.c2
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2100.c8
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2200.c54
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_module.c4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-led.c70
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-rs.c9
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.c369
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.h6
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965.c101
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000-hw.h12
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000.c181
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-6000.c1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.c591
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.h27
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c1248
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-calib.c2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-commands.h21
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.c1119
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.h99
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-csr.h22
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debug.h3
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debugfs.c191
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-dev.h57
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c155
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.h4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-io.h253
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-power.c233
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-power.h39
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-rfkill.c1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-rx.c70
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-scan.c214
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.c27
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-tx.c29
-rw-r--r--drivers/net/wireless/iwlwifi/iwl3945-base.c1216
-rw-r--r--drivers/net/wireless/iwmc3200wifi/Kconfig24
-rw-r--r--drivers/net/wireless/iwmc3200wifi/Makefile5
-rw-r--r--drivers/net/wireless/iwmc3200wifi/bus.h57
-rw-r--r--drivers/net/wireless/iwmc3200wifi/cfg80211.c409
-rw-r--r--drivers/net/wireless/iwmc3200wifi/cfg80211.h31
-rw-r--r--drivers/net/wireless/iwmc3200wifi/commands.c920
-rw-r--r--drivers/net/wireless/iwmc3200wifi/commands.h419
-rw-r--r--drivers/net/wireless/iwmc3200wifi/debug.h124
-rw-r--r--drivers/net/wireless/iwmc3200wifi/debugfs.c453
-rw-r--r--drivers/net/wireless/iwmc3200wifi/eeprom.c187
-rw-r--r--drivers/net/wireless/iwmc3200wifi/eeprom.h114
-rw-r--r--drivers/net/wireless/iwmc3200wifi/fw.c388
-rw-r--r--drivers/net/wireless/iwmc3200wifi/fw.h100
-rw-r--r--drivers/net/wireless/iwmc3200wifi/hal.c464
-rw-r--r--drivers/net/wireless/iwmc3200wifi/hal.h236
-rw-r--r--drivers/net/wireless/iwmc3200wifi/iwm.h350
-rw-r--r--drivers/net/wireless/iwmc3200wifi/lmac.h457
-rw-r--r--drivers/net/wireless/iwmc3200wifi/main.c680
-rw-r--r--drivers/net/wireless/iwmc3200wifi/netdev.c172
-rw-r--r--drivers/net/wireless/iwmc3200wifi/rfkill.c88
-rw-r--r--drivers/net/wireless/iwmc3200wifi/rx.c1431
-rw-r--r--drivers/net/wireless/iwmc3200wifi/rx.h60
-rw-r--r--drivers/net/wireless/iwmc3200wifi/sdio.c516
-rw-r--r--drivers/net/wireless/iwmc3200wifi/sdio.h67
-rw-r--r--drivers/net/wireless/iwmc3200wifi/tx.c492
-rw-r--r--drivers/net/wireless/iwmc3200wifi/umac.h744
-rw-r--r--drivers/net/wireless/iwmc3200wifi/wext.c723
-rw-r--r--drivers/net/wireless/libertas/cmd.c26
-rw-r--r--drivers/net/wireless/libertas/defs.h21
-rw-r--r--drivers/net/wireless/libertas/dev.h3
-rw-r--r--drivers/net/wireless/libertas/host.h5
-rw-r--r--drivers/net/wireless/libertas/hostcmd.h28
-rw-r--r--drivers/net/wireless/libertas/if_cs.c34
-rw-r--r--drivers/net/wireless/libertas/if_sdio.c160
-rw-r--r--drivers/net/wireless/libertas/if_sdio.h10
-rw-r--r--drivers/net/wireless/libertas/if_spi.c13
-rw-r--r--drivers/net/wireless/libertas/if_usb.c3
-rw-r--r--drivers/net/wireless/libertas/main.c64
-rw-r--r--drivers/net/wireless/libertas/rx.c48
-rw-r--r--drivers/net/wireless/libertas/tx.c8
-rw-r--r--drivers/net/wireless/libertas/types.h2
-rw-r--r--drivers/net/wireless/libertas_tf/if_usb.c3
-rw-r--r--drivers/net/wireless/libertas_tf/main.c56
-rw-r--r--drivers/net/wireless/mac80211_hwsim.c82
-rw-r--r--drivers/net/wireless/mwl8k.c20
-rw-r--r--drivers/net/wireless/p54/p54.h74
-rw-r--r--drivers/net/wireless/p54/p54common.c348
-rw-r--r--drivers/net/wireless/p54/p54spi.c175
-rw-r--r--drivers/net/wireless/p54/p54usb.c314
-rw-r--r--drivers/net/wireless/p54/p54usb.h16
-rw-r--r--drivers/net/wireless/ray_cs.c2
-rw-r--r--drivers/net/wireless/rndis_wlan.c868
-rw-r--r--drivers/net/wireless/rt2x00/Kconfig17
-rw-r--r--drivers/net/wireless/rt2x00/Makefile2
-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.c33
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.c33
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.c20
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c3066
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.h1945
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h52
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00config.c6
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00crypto.c89
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c134
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00ht.c69
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00lib.h65
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00link.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00mac.c88
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00pci.c16
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.c48
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.h53
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c36
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.h6
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.c32
-rw-r--r--drivers/net/wireless/rtl818x/Makefile2
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180_dev.c33
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187.h7
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_dev.c76
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_leds.c218
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_leds.h57
-rw-r--r--drivers/net/wireless/strip.c2
-rw-r--r--drivers/net/wireless/wavelan.c4
-rw-r--r--drivers/net/wireless/wavelan_cs.c5
-rw-r--r--drivers/net/wireless/wl12xx/Kconfig11
-rw-r--r--drivers/net/wireless/wl12xx/Makefile4
-rw-r--r--drivers/net/wireless/wl12xx/acx.c689
-rw-r--r--drivers/net/wireless/wl12xx/acx.h1245
-rw-r--r--drivers/net/wireless/wl12xx/boot.c295
-rw-r--r--drivers/net/wireless/wl12xx/boot.h40
-rw-r--r--drivers/net/wireless/wl12xx/cmd.c353
-rw-r--r--drivers/net/wireless/wl12xx/cmd.h265
-rw-r--r--drivers/net/wireless/wl12xx/debugfs.c508
-rw-r--r--drivers/net/wireless/wl12xx/debugfs.h33
-rw-r--r--drivers/net/wireless/wl12xx/event.c127
-rw-r--r--drivers/net/wireless/wl12xx/event.h121
-rw-r--r--drivers/net/wireless/wl12xx/init.c200
-rw-r--r--drivers/net/wireless/wl12xx/init.h40
-rw-r--r--drivers/net/wireless/wl12xx/main.c1358
-rw-r--r--drivers/net/wireless/wl12xx/ps.c151
-rw-r--r--drivers/net/wireless/wl12xx/ps.h36
-rw-r--r--drivers/net/wireless/wl12xx/reg.h745
-rw-r--r--drivers/net/wireless/wl12xx/rx.c208
-rw-r--r--drivers/net/wireless/wl12xx/rx.h122
-rw-r--r--drivers/net/wireless/wl12xx/spi.c358
-rw-r--r--drivers/net/wireless/wl12xx/spi.h109
-rw-r--r--drivers/net/wireless/wl12xx/tx.c557
-rw-r--r--drivers/net/wireless/wl12xx/tx.h215
-rw-r--r--drivers/net/wireless/wl12xx/wl1251.c709
-rw-r--r--drivers/net/wireless/wl12xx/wl1251.h165
-rw-r--r--drivers/net/wireless/wl12xx/wl12xx.h409
-rw-r--r--drivers/net/wireless/wl12xx/wl12xx_80211.h156
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.c86
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.h2
-rw-r--r--drivers/net/yellowfin.c3
500 files changed, 50725 insertions, 30917 deletions
diff --git a/drivers/net/3c501.c b/drivers/net/3c501.c
index 1c5344aa57cc..367bec63620c 100644
--- a/drivers/net/3c501.c
+++ b/drivers/net/3c501.c
@@ -281,7 +281,7 @@ static int __init el1_probe1(struct net_device *dev, int ioaddr)
281 autoirq = probe_irq_off(irq_mask); 281 autoirq = probe_irq_off(irq_mask);
282 282
283 if (autoirq == 0) { 283 if (autoirq == 0) {
284 printk(KERN_WARNING "%s probe at %#x failed to detect IRQ line.\n", 284 pr_warning("%s probe at %#x failed to detect IRQ line.\n",
285 mname, ioaddr); 285 mname, ioaddr);
286 release_region(ioaddr, EL1_IO_EXTENT); 286 release_region(ioaddr, EL1_IO_EXTENT);
287 return -EAGAIN; 287 return -EAGAIN;
@@ -297,16 +297,16 @@ static int __init el1_probe1(struct net_device *dev, int ioaddr)
297 if (autoirq) 297 if (autoirq)
298 dev->irq = autoirq; 298 dev->irq = autoirq;
299 299
300 printk(KERN_INFO "%s: %s EtherLink at %#lx, using %sIRQ %d.\n", 300 pr_info("%s: %s EtherLink at %#lx, using %sIRQ %d.\n",
301 dev->name, mname, dev->base_addr, 301 dev->name, mname, dev->base_addr,
302 autoirq ? "auto":"assigned ", dev->irq); 302 autoirq ? "auto":"assigned ", dev->irq);
303 303
304#ifdef CONFIG_IP_MULTICAST 304#ifdef CONFIG_IP_MULTICAST
305 printk(KERN_WARNING "WARNING: Use of the 3c501 in a multicast kernel is NOT recommended.\n"); 305 pr_warning("WARNING: Use of the 3c501 in a multicast kernel is NOT recommended.\n");
306#endif 306#endif
307 307
308 if (el_debug) 308 if (el_debug)
309 printk(KERN_DEBUG "%s", version); 309 pr_debug("%s", version);
310 310
311 lp = netdev_priv(dev); 311 lp = netdev_priv(dev);
312 memset(lp, 0, sizeof(struct net_local)); 312 memset(lp, 0, sizeof(struct net_local));
@@ -343,7 +343,7 @@ static int el_open(struct net_device *dev)
343 unsigned long flags; 343 unsigned long flags;
344 344
345 if (el_debug > 2) 345 if (el_debug > 2)
346 printk(KERN_DEBUG "%s: Doing el_open()...", dev->name); 346 pr_debug("%s: Doing el_open()...\n", dev->name);
347 347
348 retval = request_irq(dev->irq, &el_interrupt, 0, dev->name, dev); 348 retval = request_irq(dev->irq, &el_interrupt, 0, dev->name, dev);
349 if (retval) 349 if (retval)
@@ -374,7 +374,7 @@ static void el_timeout(struct net_device *dev)
374 int ioaddr = dev->base_addr; 374 int ioaddr = dev->base_addr;
375 375
376 if (el_debug) 376 if (el_debug)
377 printk(KERN_DEBUG "%s: transmit timed out, txsr %#2x axsr=%02x rxsr=%02x.\n", 377 pr_debug("%s: transmit timed out, txsr %#2x axsr=%02x rxsr=%02x.\n",
378 dev->name, inb(TX_STATUS), 378 dev->name, inb(TX_STATUS),
379 inb(AX_STATUS), inb(RX_STATUS)); 379 inb(AX_STATUS), inb(RX_STATUS));
380 dev->stats.tx_errors++; 380 dev->stats.tx_errors++;
@@ -483,14 +483,13 @@ static int el_start_xmit(struct sk_buff *skb, struct net_device *dev)
483 lp->loading = 0; 483 lp->loading = 0;
484 dev->trans_start = jiffies; 484 dev->trans_start = jiffies;
485 if (el_debug > 2) 485 if (el_debug > 2)
486 printk(KERN_DEBUG " queued xmit.\n"); 486 pr_debug(" queued xmit.\n");
487 dev_kfree_skb(skb); 487 dev_kfree_skb(skb);
488 return 0; 488 return 0;
489 } 489 }
490 /* A receive upset our load, despite our best efforts */ 490 /* A receive upset our load, despite our best efforts */
491 if (el_debug > 2) 491 if (el_debug > 2)
492 printk(KERN_DEBUG "%s: burped during tx load.\n", 492 pr_debug("%s: burped during tx load.\n", dev->name);
493 dev->name);
494 spin_lock_irqsave(&lp->lock, flags); 493 spin_lock_irqsave(&lp->lock, flags);
495 } while (1); 494 } while (1);
496} 495}
@@ -540,11 +539,10 @@ static irqreturn_t el_interrupt(int irq, void *dev_id)
540 */ 539 */
541 540
542 if (el_debug > 3) 541 if (el_debug > 3)
543 printk(KERN_DEBUG "%s: el_interrupt() aux=%#02x", 542 pr_debug("%s: el_interrupt() aux=%#02x\n", dev->name, axsr);
544 dev->name, axsr);
545 543
546 if (lp->loading == 1 && !lp->txing) 544 if (lp->loading == 1 && !lp->txing)
547 printk(KERN_WARNING "%s: Inconsistent state loading while not in tx\n", 545 pr_warning("%s: Inconsistent state loading while not in tx\n",
548 dev->name); 546 dev->name);
549 547
550 if (lp->txing) { 548 if (lp->txing) {
@@ -555,19 +553,17 @@ static irqreturn_t el_interrupt(int irq, void *dev_id)
555 int txsr = inb(TX_STATUS); 553 int txsr = inb(TX_STATUS);
556 554
557 if (lp->loading == 1) { 555 if (lp->loading == 1) {
558 if (el_debug > 2) { 556 if (el_debug > 2)
559 printk(KERN_DEBUG "%s: Interrupt while loading [", 557 pr_debug("%s: Interrupt while loading [txsr=%02x gp=%04x rp=%04x]\n",
560 dev->name); 558 dev->name, txsr, inw(GP_LOW), inw(RX_LOW));
561 printk(" txsr=%02x gp=%04x rp=%04x]\n", 559
562 txsr, inw(GP_LOW), inw(RX_LOW));
563 }
564 /* Force a reload */ 560 /* Force a reload */
565 lp->loading = 2; 561 lp->loading = 2;
566 spin_unlock(&lp->lock); 562 spin_unlock(&lp->lock);
567 goto out; 563 goto out;
568 } 564 }
569 if (el_debug > 6) 565 if (el_debug > 6)
570 printk(KERN_DEBUG " txsr=%02x gp=%04x rp=%04x", 566 pr_debug("%s: txsr=%02x gp=%04x rp=%04x\n", dev->name,
571 txsr, inw(GP_LOW), inw(RX_LOW)); 567 txsr, inw(GP_LOW), inw(RX_LOW));
572 568
573 if ((axsr & 0x80) && (txsr & TX_READY) == 0) { 569 if ((axsr & 0x80) && (txsr & TX_READY) == 0) {
@@ -576,7 +572,7 @@ static irqreturn_t el_interrupt(int irq, void *dev_id)
576 * on trying or reset immediately ? 572 * on trying or reset immediately ?
577 */ 573 */
578 if (el_debug > 1) 574 if (el_debug > 1)
579 printk(KERN_DEBUG "%s: Unusual interrupt during Tx, txsr=%02x axsr=%02x gp=%03x rp=%03x.\n", 575 pr_debug("%s: Unusual interrupt during Tx, txsr=%02x axsr=%02x gp=%03x rp=%03x.\n",
580 dev->name, txsr, axsr, 576 dev->name, txsr, axsr,
581 inw(ioaddr + EL1_DATAPTR), 577 inw(ioaddr + EL1_DATAPTR),
582 inw(ioaddr + EL1_RXPTR)); 578 inw(ioaddr + EL1_RXPTR));
@@ -587,7 +583,7 @@ static irqreturn_t el_interrupt(int irq, void *dev_id)
587 * Timed out 583 * Timed out
588 */ 584 */
589 if (el_debug) 585 if (el_debug)
590 printk(KERN_DEBUG "%s: Transmit failed 16 times, Ethernet jammed?\n", dev->name); 586 pr_debug("%s: Transmit failed 16 times, Ethernet jammed?\n", dev->name);
591 outb(AX_SYS, AX_CMD); 587 outb(AX_SYS, AX_CMD);
592 lp->txing = 0; 588 lp->txing = 0;
593 dev->stats.tx_aborted_errors++; 589 dev->stats.tx_aborted_errors++;
@@ -598,7 +594,7 @@ static irqreturn_t el_interrupt(int irq, void *dev_id)
598 */ 594 */
599 595
600 if (el_debug > 6) 596 if (el_debug > 6)
601 printk(KERN_DEBUG " retransmitting after a collision.\n"); 597 pr_debug("%s: retransmitting after a collision.\n", dev->name);
602 /* 598 /*
603 * Poor little chip can't reset its own start 599 * Poor little chip can't reset its own start
604 * pointer 600 * pointer
@@ -616,9 +612,8 @@ static irqreturn_t el_interrupt(int irq, void *dev_id)
616 */ 612 */
617 dev->stats.tx_packets++; 613 dev->stats.tx_packets++;
618 if (el_debug > 6) 614 if (el_debug > 6)
619 printk(KERN_DEBUG " Tx succeeded %s\n", 615 pr_debug("%s: Tx succeeded %s\n", dev->name,
620 (txsr & TX_RDY) ? "." : 616 (txsr & TX_RDY) ? "." : "but tx is busy!");
621 "but tx is busy!");
622 /* 617 /*
623 * This is safe the interrupt is atomic WRT itself. 618 * This is safe the interrupt is atomic WRT itself.
624 */ 619 */
@@ -633,7 +628,8 @@ static irqreturn_t el_interrupt(int irq, void *dev_id)
633 628
634 int rxsr = inb(RX_STATUS); 629 int rxsr = inb(RX_STATUS);
635 if (el_debug > 5) 630 if (el_debug > 5)
636 printk(KERN_DEBUG " rxsr=%02x txsr=%02x rp=%04x", rxsr, inb(TX_STATUS), inw(RX_LOW)); 631 pr_debug("%s: rxsr=%02x txsr=%02x rp=%04x\n",
632 dev->name, rxsr, inb(TX_STATUS), inw(RX_LOW));
637 /* 633 /*
638 * Just reading rx_status fixes most errors. 634 * Just reading rx_status fixes most errors.
639 */ 635 */
@@ -643,7 +639,7 @@ static irqreturn_t el_interrupt(int irq, void *dev_id)
643 /* Handled to avoid board lock-up. */ 639 /* Handled to avoid board lock-up. */
644 dev->stats.rx_length_errors++; 640 dev->stats.rx_length_errors++;
645 if (el_debug > 5) 641 if (el_debug > 5)
646 printk(KERN_DEBUG " runt.\n"); 642 pr_debug("%s: runt.\n", dev->name);
647 } else if (rxsr & RX_GOOD) { 643 } else if (rxsr & RX_GOOD) {
648 /* 644 /*
649 * Receive worked. 645 * Receive worked.
@@ -654,12 +650,10 @@ static irqreturn_t el_interrupt(int irq, void *dev_id)
654 * Nothing? Something is broken! 650 * Nothing? Something is broken!
655 */ 651 */
656 if (el_debug > 2) 652 if (el_debug > 2)
657 printk(KERN_DEBUG "%s: No packet seen, rxsr=%02x **resetting 3c501***\n", 653 pr_debug("%s: No packet seen, rxsr=%02x **resetting 3c501***\n",
658 dev->name, rxsr); 654 dev->name, rxsr);
659 el_reset(dev); 655 el_reset(dev);
660 } 656 }
661 if (el_debug > 3)
662 printk(KERN_DEBUG ".\n");
663 } 657 }
664 658
665 /* 659 /*
@@ -695,11 +689,11 @@ static void el_receive(struct net_device *dev)
695 pkt_len = inw(RX_LOW); 689 pkt_len = inw(RX_LOW);
696 690
697 if (el_debug > 4) 691 if (el_debug > 4)
698 printk(KERN_DEBUG " el_receive %d.\n", pkt_len); 692 pr_debug(" el_receive %d.\n", pkt_len);
699 693
700 if (pkt_len < 60 || pkt_len > 1536) { 694 if (pkt_len < 60 || pkt_len > 1536) {
701 if (el_debug) 695 if (el_debug)
702 printk(KERN_DEBUG "%s: bogus packet, length=%d\n", 696 pr_debug("%s: bogus packet, length=%d\n",
703 dev->name, pkt_len); 697 dev->name, pkt_len);
704 dev->stats.rx_over_errors++; 698 dev->stats.rx_over_errors++;
705 return; 699 return;
@@ -718,8 +712,7 @@ static void el_receive(struct net_device *dev)
718 712
719 outw(0x00, GP_LOW); 713 outw(0x00, GP_LOW);
720 if (skb == NULL) { 714 if (skb == NULL) {
721 printk(KERN_INFO "%s: Memory squeeze, dropping packet.\n", 715 pr_info("%s: Memory squeeze, dropping packet.\n", dev->name);
722 dev->name);
723 dev->stats.rx_dropped++; 716 dev->stats.rx_dropped++;
724 return; 717 return;
725 } else { 718 } else {
@@ -753,7 +746,7 @@ static void el_reset(struct net_device *dev)
753 int ioaddr = dev->base_addr; 746 int ioaddr = dev->base_addr;
754 747
755 if (el_debug > 2) 748 if (el_debug > 2)
756 printk(KERN_INFO "3c501 reset..."); 749 pr_info("3c501 reset...\n");
757 outb(AX_RESET, AX_CMD); /* Reset the chip */ 750 outb(AX_RESET, AX_CMD); /* Reset the chip */
758 /* Aux control, irq and loopback enabled */ 751 /* Aux control, irq and loopback enabled */
759 outb(AX_LOOP, AX_CMD); 752 outb(AX_LOOP, AX_CMD);
@@ -787,7 +780,7 @@ static int el1_close(struct net_device *dev)
787 int ioaddr = dev->base_addr; 780 int ioaddr = dev->base_addr;
788 781
789 if (el_debug > 2) 782 if (el_debug > 2)
790 printk(KERN_INFO "%s: Shutting down Ethernet card at %#x.\n", 783 pr_info("%s: Shutting down Ethernet card at %#x.\n",
791 dev->name, ioaddr); 784 dev->name, ioaddr);
792 785
793 netif_stop_queue(dev); 786 netif_stop_queue(dev);
diff --git a/drivers/net/3c503.c b/drivers/net/3c503.c
index 4f08bd995836..134638a9759f 100644
--- a/drivers/net/3c503.c
+++ b/drivers/net/3c503.c
@@ -234,16 +234,16 @@ el2_probe1(struct net_device *dev, int ioaddr)
234 } 234 }
235 235
236 if (ei_debug && version_printed++ == 0) 236 if (ei_debug && version_printed++ == 0)
237 printk(version); 237 pr_debug("%s", version);
238 238
239 dev->base_addr = ioaddr; 239 dev->base_addr = ioaddr;
240 240
241 printk("%s: 3c503 at i/o base %#3x, node ", dev->name, ioaddr); 241 pr_info("%s: 3c503 at i/o base %#3x, node ", dev->name, ioaddr);
242 242
243 /* Retrieve and print the ethernet address. */ 243 /* Retrieve and print the ethernet address. */
244 for (i = 0; i < 6; i++) 244 for (i = 0; i < 6; i++)
245 dev->dev_addr[i] = inb(ioaddr + i); 245 dev->dev_addr[i] = inb(ioaddr + i);
246 printk("%pM", dev->dev_addr); 246 pr_cont("%pM", dev->dev_addr);
247 247
248 /* Map the 8390 back into the window. */ 248 /* Map the 8390 back into the window. */
249 outb(ECNTRL_THIN, ioaddr + 0x406); 249 outb(ECNTRL_THIN, ioaddr + 0x406);
@@ -256,7 +256,8 @@ el2_probe1(struct net_device *dev, int ioaddr)
256 outb_p(E8390_PAGE0, ioaddr + E8390_CMD); 256 outb_p(E8390_PAGE0, ioaddr + E8390_CMD);
257 257
258 /* Probe for, turn on and clear the board's shared memory. */ 258 /* Probe for, turn on and clear the board's shared memory. */
259 if (ei_debug > 2) printk(" memory jumpers %2.2x ", membase_reg); 259 if (ei_debug > 2)
260 pr_cont(" memory jumpers %2.2x ", membase_reg);
260 outb(EGACFR_NORM, ioaddr + 0x405); /* Enable RAM */ 261 outb(EGACFR_NORM, ioaddr + 0x405); /* Enable RAM */
261 262
262 /* This should be probed for (or set via an ioctl()) at run-time. 263 /* This should be probed for (or set via an ioctl()) at run-time.
@@ -268,7 +269,7 @@ el2_probe1(struct net_device *dev, int ioaddr)
268#else 269#else
269 ei_status.interface_num = dev->mem_end & 0xf; 270 ei_status.interface_num = dev->mem_end & 0xf;
270#endif 271#endif
271 printk(", using %sternal xcvr.\n", ei_status.interface_num == 0 ? "in" : "ex"); 272 pr_cont(", using %sternal xcvr.\n", ei_status.interface_num == 0 ? "in" : "ex");
272 273
273 if ((membase_reg & 0xf0) == 0) { 274 if ((membase_reg & 0xf0) == 0) {
274 dev->mem_start = 0; 275 dev->mem_start = 0;
@@ -292,7 +293,7 @@ el2_probe1(struct net_device *dev, int ioaddr)
292 writel(test_val, mem_base + i); 293 writel(test_val, mem_base + i);
293 if (readl(mem_base) != 0xba5eba5e 294 if (readl(mem_base) != 0xba5eba5e
294 || readl(mem_base + i) != test_val) { 295 || readl(mem_base + i) != test_val) {
295 printk("3c503: memory failure or memory address conflict.\n"); 296 pr_warning("3c503: memory failure or memory address conflict.\n");
296 dev->mem_start = 0; 297 dev->mem_start = 0;
297 ei_status.name = "3c503-PIO"; 298 ei_status.name = "3c503-PIO";
298 iounmap(mem_base); 299 iounmap(mem_base);
@@ -344,7 +345,7 @@ el2_probe1(struct net_device *dev, int ioaddr)
344 if (dev->irq == 2) 345 if (dev->irq == 2)
345 dev->irq = 9; 346 dev->irq = 9;
346 else if (dev->irq > 5 && dev->irq != 9) { 347 else if (dev->irq > 5 && dev->irq != 9) {
347 printk("3c503: configured interrupt %d invalid, will use autoIRQ.\n", 348 pr_warning("3c503: configured interrupt %d invalid, will use autoIRQ.\n",
348 dev->irq); 349 dev->irq);
349 dev->irq = 0; 350 dev->irq = 0;
350 } 351 }
@@ -359,7 +360,7 @@ el2_probe1(struct net_device *dev, int ioaddr)
359 goto out1; 360 goto out1;
360 361
361 if (dev->mem_start) 362 if (dev->mem_start)
362 printk("%s: %s - %dkB RAM, 8kB shared mem window at %#6lx-%#6lx.\n", 363 pr_info("%s: %s - %dkB RAM, 8kB shared mem window at %#6lx-%#6lx.\n",
363 dev->name, ei_status.name, (wordlength+1)<<3, 364 dev->name, ei_status.name, (wordlength+1)<<3,
364 dev->mem_start, dev->mem_end-1); 365 dev->mem_start, dev->mem_end-1);
365 366
@@ -367,7 +368,7 @@ el2_probe1(struct net_device *dev, int ioaddr)
367 { 368 {
368 ei_status.tx_start_page = EL2_MB1_START_PG; 369 ei_status.tx_start_page = EL2_MB1_START_PG;
369 ei_status.rx_start_page = EL2_MB1_START_PG + TX_PAGES; 370 ei_status.rx_start_page = EL2_MB1_START_PG + TX_PAGES;
370 printk("\n%s: %s, %dkB RAM, using programmed I/O (REJUMPER for SHARED MEMORY).\n", 371 pr_info("%s: %s, %dkB RAM, using programmed I/O (REJUMPER for SHARED MEMORY).\n",
371 dev->name, ei_status.name, (wordlength+1)<<3); 372 dev->name, ei_status.name, (wordlength+1)<<3);
372 } 373 }
373 release_region(ioaddr + 0x400, 8); 374 release_region(ioaddr + 0x400, 8);
@@ -435,15 +436,16 @@ static void
435el2_reset_8390(struct net_device *dev) 436el2_reset_8390(struct net_device *dev)
436{ 437{
437 if (ei_debug > 1) { 438 if (ei_debug > 1) {
438 printk("%s: Resetting the 3c503 board...", dev->name); 439 pr_debug("%s: Resetting the 3c503 board...", dev->name);
439 printk("%#lx=%#02x %#lx=%#02x %#lx=%#02x...", E33G_IDCFR, inb(E33G_IDCFR), 440 pr_cont(" %#lx=%#02x %#lx=%#02x %#lx=%#02x...", E33G_IDCFR, inb(E33G_IDCFR),
440 E33G_CNTRL, inb(E33G_CNTRL), E33G_GACFR, inb(E33G_GACFR)); 441 E33G_CNTRL, inb(E33G_CNTRL), E33G_GACFR, inb(E33G_GACFR));
441 } 442 }
442 outb_p(ECNTRL_RESET|ECNTRL_THIN, E33G_CNTRL); 443 outb_p(ECNTRL_RESET|ECNTRL_THIN, E33G_CNTRL);
443 ei_status.txing = 0; 444 ei_status.txing = 0;
444 outb_p(ei_status.interface_num==0 ? ECNTRL_THIN : ECNTRL_AUI, E33G_CNTRL); 445 outb_p(ei_status.interface_num==0 ? ECNTRL_THIN : ECNTRL_AUI, E33G_CNTRL);
445 el2_init_card(dev); 446 el2_init_card(dev);
446 if (ei_debug > 1) printk("done\n"); 447 if (ei_debug > 1)
448 pr_cont("done\n");
447} 449}
448 450
449/* Initialize the 3c503 GA registers after a reset. */ 451/* Initialize the 3c503 GA registers after a reset. */
@@ -529,7 +531,7 @@ el2_block_output(struct net_device *dev, int count,
529 { 531 {
530 if(!boguscount--) 532 if(!boguscount--)
531 { 533 {
532 printk("%s: FIFO blocked in el2_block_output.\n", dev->name); 534 pr_notice("%s: FIFO blocked in el2_block_output.\n", dev->name);
533 el2_reset_8390(dev); 535 el2_reset_8390(dev);
534 goto blocked; 536 goto blocked;
535 } 537 }
@@ -581,7 +583,7 @@ el2_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr, int ring_pag
581 { 583 {
582 if(!boguscount--) 584 if(!boguscount--)
583 { 585 {
584 printk("%s: FIFO blocked in el2_get_8390_hdr.\n", dev->name); 586 pr_notice("%s: FIFO blocked in el2_get_8390_hdr.\n", dev->name);
585 memset(hdr, 0x00, sizeof(struct e8390_pkt_hdr)); 587 memset(hdr, 0x00, sizeof(struct e8390_pkt_hdr));
586 el2_reset_8390(dev); 588 el2_reset_8390(dev);
587 goto blocked; 589 goto blocked;
@@ -645,7 +647,7 @@ el2_block_input(struct net_device *dev, int count, struct sk_buff *skb, int ring
645 { 647 {
646 if(!boguscount--) 648 if(!boguscount--)
647 { 649 {
648 printk("%s: FIFO blocked in el2_block_input.\n", dev->name); 650 pr_notice("%s: FIFO blocked in el2_block_input.\n", dev->name);
649 el2_reset_8390(dev); 651 el2_reset_8390(dev);
650 goto blocked; 652 goto blocked;
651 } 653 }
@@ -707,7 +709,7 @@ init_module(void)
707 for (this_dev = 0; this_dev < MAX_EL2_CARDS; this_dev++) { 709 for (this_dev = 0; this_dev < MAX_EL2_CARDS; this_dev++) {
708 if (io[this_dev] == 0) { 710 if (io[this_dev] == 0) {
709 if (this_dev != 0) break; /* only autoprobe 1st one */ 711 if (this_dev != 0) break; /* only autoprobe 1st one */
710 printk(KERN_NOTICE "3c503.c: Presently autoprobing (not recommended) for a single card.\n"); 712 pr_notice("3c503.c: Presently autoprobing (not recommended) for a single card.\n");
711 } 713 }
712 dev = alloc_eip_netdev(); 714 dev = alloc_eip_netdev();
713 if (!dev) 715 if (!dev)
@@ -720,7 +722,7 @@ init_module(void)
720 continue; 722 continue;
721 } 723 }
722 free_netdev(dev); 724 free_netdev(dev);
723 printk(KERN_WARNING "3c503.c: No 3c503 card found (i/o = 0x%x).\n", io[this_dev]); 725 pr_warning("3c503.c: No 3c503 card found (i/o = 0x%x).\n", io[this_dev]);
724 break; 726 break;
725 } 727 }
726 if (found) 728 if (found)
diff --git a/drivers/net/3c505.c b/drivers/net/3c505.c
index 2de1c9cd7bde..b28499459cd6 100644
--- a/drivers/net/3c505.c
+++ b/drivers/net/3c505.c
@@ -126,26 +126,25 @@
126 * 126 *
127 *********************************************************/ 127 *********************************************************/
128 128
129static const char filename[] = __FILE__; 129#define filename __FILE__
130 130
131static const char timeout_msg[] = "*** timeout at %s:%s (line %d) ***\n"; 131#define timeout_msg "*** timeout at %s:%s (line %d) ***\n"
132#define TIMEOUT_MSG(lineno) \ 132#define TIMEOUT_MSG(lineno) \
133 printk(timeout_msg, filename,__func__,(lineno)) 133 pr_notice(timeout_msg, filename, __func__, (lineno))
134 134
135static const char invalid_pcb_msg[] = 135#define invalid_pcb_msg "*** invalid pcb length %d at %s:%s (line %d) ***\n"
136"*** invalid pcb length %d at %s:%s (line %d) ***\n";
137#define INVALID_PCB_MSG(len) \ 136#define INVALID_PCB_MSG(len) \
138 printk(invalid_pcb_msg, (len),filename,__func__,__LINE__) 137 pr_notice(invalid_pcb_msg, (len), filename, __func__, __LINE__)
139 138
140static char search_msg[] __initdata = KERN_INFO "%s: Looking for 3c505 adapter at address %#x..."; 139#define search_msg "%s: Looking for 3c505 adapter at address %#x..."
141 140
142static char stilllooking_msg[] __initdata = "still looking..."; 141#define stilllooking_msg "still looking..."
143 142
144static char found_msg[] __initdata = "found.\n"; 143#define found_msg "found.\n"
145 144
146static char notfound_msg[] __initdata = "not found (reason = %d)\n"; 145#define notfound_msg "not found (reason = %d)\n"
147 146
148static char couldnot_msg[] __initdata = KERN_INFO "%s: 3c505 not found\n"; 147#define couldnot_msg "%s: 3c505 not found\n"
149 148
150/********************************************************* 149/*********************************************************
151 * 150 *
@@ -284,7 +283,7 @@ static inline void adapter_reset(struct net_device *dev)
284 283
285 outb_control(orig_hcr, dev); 284 outb_control(orig_hcr, dev);
286 if (!start_receive(dev, &adapter->tx_pcb)) 285 if (!start_receive(dev, &adapter->tx_pcb))
287 printk(KERN_ERR "%s: start receive command failed \n", dev->name); 286 pr_err("%s: start receive command failed\n", dev->name);
288} 287}
289 288
290/* Check to make sure that a DMA transfer hasn't timed out. This should 289/* Check to make sure that a DMA transfer hasn't timed out. This should
@@ -296,7 +295,9 @@ static inline void check_3c505_dma(struct net_device *dev)
296 elp_device *adapter = netdev_priv(dev); 295 elp_device *adapter = netdev_priv(dev);
297 if (adapter->dmaing && time_after(jiffies, adapter->current_dma.start_time + 10)) { 296 if (adapter->dmaing && time_after(jiffies, adapter->current_dma.start_time + 10)) {
298 unsigned long flags, f; 297 unsigned long flags, f;
299 printk(KERN_ERR "%s: DMA %s timed out, %d bytes left\n", dev->name, adapter->current_dma.direction ? "download" : "upload", get_dma_residue(dev->dma)); 298 pr_err("%s: DMA %s timed out, %d bytes left\n", dev->name,
299 adapter->current_dma.direction ? "download" : "upload",
300 get_dma_residue(dev->dma));
300 spin_lock_irqsave(&adapter->lock, flags); 301 spin_lock_irqsave(&adapter->lock, flags);
301 adapter->dmaing = 0; 302 adapter->dmaing = 0;
302 adapter->busy = 0; 303 adapter->busy = 0;
@@ -321,7 +322,7 @@ static inline bool send_pcb_slow(unsigned int base_addr, unsigned char byte)
321 if (inb_status(base_addr) & HCRE) 322 if (inb_status(base_addr) & HCRE)
322 return false; 323 return false;
323 } 324 }
324 printk(KERN_WARNING "3c505: send_pcb_slow timed out\n"); 325 pr_warning("3c505: send_pcb_slow timed out\n");
325 return true; 326 return true;
326} 327}
327 328
@@ -333,7 +334,7 @@ static inline bool send_pcb_fast(unsigned int base_addr, unsigned char byte)
333 if (inb_status(base_addr) & HCRE) 334 if (inb_status(base_addr) & HCRE)
334 return false; 335 return false;
335 } 336 }
336 printk(KERN_WARNING "3c505: send_pcb_fast timed out\n"); 337 pr_warning("3c505: send_pcb_fast timed out\n");
337 return true; 338 return true;
338} 339}
339 340
@@ -386,7 +387,7 @@ static bool send_pcb(struct net_device *dev, pcb_struct * pcb)
386 /* Avoid contention */ 387 /* Avoid contention */
387 if (test_and_set_bit(1, &adapter->send_pcb_semaphore)) { 388 if (test_and_set_bit(1, &adapter->send_pcb_semaphore)) {
388 if (elp_debug >= 3) { 389 if (elp_debug >= 3) {
389 printk(KERN_DEBUG "%s: send_pcb entered while threaded\n", dev->name); 390 pr_debug("%s: send_pcb entered while threaded\n", dev->name);
390 } 391 }
391 return false; 392 return false;
392 } 393 }
@@ -424,14 +425,15 @@ static bool send_pcb(struct net_device *dev, pcb_struct * pcb)
424 425
425 case ASF_PCB_NAK: 426 case ASF_PCB_NAK:
426#ifdef ELP_DEBUG 427#ifdef ELP_DEBUG
427 printk(KERN_DEBUG "%s: send_pcb got NAK\n", dev->name); 428 pr_debug("%s: send_pcb got NAK\n", dev->name);
428#endif 429#endif
429 goto abort; 430 goto abort;
430 } 431 }
431 } 432 }
432 433
433 if (elp_debug >= 1) 434 if (elp_debug >= 1)
434 printk(KERN_DEBUG "%s: timeout waiting for PCB acknowledge (status %02x)\n", dev->name, inb_status(dev->base_addr)); 435 pr_debug("%s: timeout waiting for PCB acknowledge (status %02x)\n",
436 dev->name, inb_status(dev->base_addr));
435 goto abort; 437 goto abort;
436 438
437 sti_abort: 439 sti_abort:
@@ -481,7 +483,7 @@ static bool receive_pcb(struct net_device *dev, pcb_struct * pcb)
481 while (((stat = get_status(dev->base_addr)) & ACRF) == 0 && time_before(jiffies, timeout)); 483 while (((stat = get_status(dev->base_addr)) & ACRF) == 0 && time_before(jiffies, timeout));
482 if (time_after_eq(jiffies, timeout)) { 484 if (time_after_eq(jiffies, timeout)) {
483 TIMEOUT_MSG(__LINE__); 485 TIMEOUT_MSG(__LINE__);
484 printk(KERN_INFO "%s: status %02x\n", dev->name, stat); 486 pr_info("%s: status %02x\n", dev->name, stat);
485 return false; 487 return false;
486 } 488 }
487 pcb->length = inb_command(dev->base_addr); 489 pcb->length = inb_command(dev->base_addr);
@@ -518,7 +520,7 @@ static bool receive_pcb(struct net_device *dev, pcb_struct * pcb)
518 /* safety check total length vs data length */ 520 /* safety check total length vs data length */
519 if (total_length != (pcb->length + 2)) { 521 if (total_length != (pcb->length + 2)) {
520 if (elp_debug >= 2) 522 if (elp_debug >= 2)
521 printk(KERN_WARNING "%s: mangled PCB received\n", dev->name); 523 pr_warning("%s: mangled PCB received\n", dev->name);
522 set_hsf(dev, HSF_PCB_NAK); 524 set_hsf(dev, HSF_PCB_NAK);
523 return false; 525 return false;
524 } 526 }
@@ -527,7 +529,7 @@ static bool receive_pcb(struct net_device *dev, pcb_struct * pcb)
527 if (test_and_set_bit(0, (void *) &adapter->busy)) { 529 if (test_and_set_bit(0, (void *) &adapter->busy)) {
528 if (backlog_next(adapter->rx_backlog.in) == adapter->rx_backlog.out) { 530 if (backlog_next(adapter->rx_backlog.in) == adapter->rx_backlog.out) {
529 set_hsf(dev, HSF_PCB_NAK); 531 set_hsf(dev, HSF_PCB_NAK);
530 printk(KERN_WARNING "%s: PCB rejected, transfer in progress and backlog full\n", dev->name); 532 pr_warning("%s: PCB rejected, transfer in progress and backlog full\n", dev->name);
531 pcb->command = 0; 533 pcb->command = 0;
532 return true; 534 return true;
533 } else { 535 } else {
@@ -552,7 +554,7 @@ static bool start_receive(struct net_device *dev, pcb_struct * tx_pcb)
552 elp_device *adapter = netdev_priv(dev); 554 elp_device *adapter = netdev_priv(dev);
553 555
554 if (elp_debug >= 3) 556 if (elp_debug >= 3)
555 printk(KERN_DEBUG "%s: restarting receiver\n", dev->name); 557 pr_debug("%s: restarting receiver\n", dev->name);
556 tx_pcb->command = CMD_RECEIVE_PACKET; 558 tx_pcb->command = CMD_RECEIVE_PACKET;
557 tx_pcb->length = sizeof(struct Rcv_pkt); 559 tx_pcb->length = sizeof(struct Rcv_pkt);
558 tx_pcb->data.rcv_pkt.buf_seg 560 tx_pcb->data.rcv_pkt.buf_seg
@@ -586,7 +588,7 @@ static void receive_packet(struct net_device *dev, int len)
586 skb = dev_alloc_skb(rlen + 2); 588 skb = dev_alloc_skb(rlen + 2);
587 589
588 if (!skb) { 590 if (!skb) {
589 printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name); 591 pr_warning("%s: memory squeeze, dropping packet\n", dev->name);
590 target = adapter->dma_buffer; 592 target = adapter->dma_buffer;
591 adapter->current_dma.target = NULL; 593 adapter->current_dma.target = NULL;
592 /* FIXME: stats */ 594 /* FIXME: stats */
@@ -604,7 +606,8 @@ static void receive_packet(struct net_device *dev, int len)
604 606
605 /* if this happens, we die */ 607 /* if this happens, we die */
606 if (test_and_set_bit(0, (void *) &adapter->dmaing)) 608 if (test_and_set_bit(0, (void *) &adapter->dmaing))
607 printk(KERN_ERR "%s: rx blocked, DMA in progress, dir %d\n", dev->name, adapter->current_dma.direction); 609 pr_err("%s: rx blocked, DMA in progress, dir %d\n",
610 dev->name, adapter->current_dma.direction);
608 611
609 adapter->current_dma.direction = 0; 612 adapter->current_dma.direction = 0;
610 adapter->current_dma.length = rlen; 613 adapter->current_dma.length = rlen;
@@ -623,14 +626,14 @@ static void receive_packet(struct net_device *dev, int len)
623 release_dma_lock(flags); 626 release_dma_lock(flags);
624 627
625 if (elp_debug >= 3) { 628 if (elp_debug >= 3) {
626 printk(KERN_DEBUG "%s: rx DMA transfer started\n", dev->name); 629 pr_debug("%s: rx DMA transfer started\n", dev->name);
627 } 630 }
628 631
629 if (adapter->rx_active) 632 if (adapter->rx_active)
630 adapter->rx_active--; 633 adapter->rx_active--;
631 634
632 if (!adapter->busy) 635 if (!adapter->busy)
633 printk(KERN_WARNING "%s: receive_packet called, busy not set.\n", dev->name); 636 pr_warning("%s: receive_packet called, busy not set.\n", dev->name);
634} 637}
635 638
636/****************************************************** 639/******************************************************
@@ -655,12 +658,13 @@ static irqreturn_t elp_interrupt(int irq, void *dev_id)
655 * has a DMA transfer finished? 658 * has a DMA transfer finished?
656 */ 659 */
657 if (inb_status(dev->base_addr) & DONE) { 660 if (inb_status(dev->base_addr) & DONE) {
658 if (!adapter->dmaing) { 661 if (!adapter->dmaing)
659 printk(KERN_WARNING "%s: phantom DMA completed\n", dev->name); 662 pr_warning("%s: phantom DMA completed\n", dev->name);
660 } 663
661 if (elp_debug >= 3) { 664 if (elp_debug >= 3)
662 printk(KERN_DEBUG "%s: %s DMA complete, status %02x\n", dev->name, adapter->current_dma.direction ? "tx" : "rx", inb_status(dev->base_addr)); 665 pr_debug("%s: %s DMA complete, status %02x\n", dev->name,
663 } 666 adapter->current_dma.direction ? "tx" : "rx",
667 inb_status(dev->base_addr));
664 668
665 outb_control(adapter->hcr_val & ~(DMAE | TCEN | DIR), dev); 669 outb_control(adapter->hcr_val & ~(DMAE | TCEN | DIR), dev);
666 if (adapter->current_dma.direction) { 670 if (adapter->current_dma.direction) {
@@ -682,7 +686,7 @@ static irqreturn_t elp_interrupt(int irq, void *dev_id)
682 int t = adapter->rx_backlog.length[adapter->rx_backlog.out]; 686 int t = adapter->rx_backlog.length[adapter->rx_backlog.out];
683 adapter->rx_backlog.out = backlog_next(adapter->rx_backlog.out); 687 adapter->rx_backlog.out = backlog_next(adapter->rx_backlog.out);
684 if (elp_debug >= 2) 688 if (elp_debug >= 2)
685 printk(KERN_DEBUG "%s: receiving backlogged packet (%d)\n", dev->name, t); 689 pr_debug("%s: receiving backlogged packet (%d)\n", dev->name, t);
686 receive_packet(dev, t); 690 receive_packet(dev, t);
687 } else { 691 } else {
688 adapter->busy = 0; 692 adapter->busy = 0;
@@ -713,21 +717,23 @@ static irqreturn_t elp_interrupt(int irq, void *dev_id)
713 len = adapter->irx_pcb.data.rcv_resp.pkt_len; 717 len = adapter->irx_pcb.data.rcv_resp.pkt_len;
714 dlen = adapter->irx_pcb.data.rcv_resp.buf_len; 718 dlen = adapter->irx_pcb.data.rcv_resp.buf_len;
715 if (adapter->irx_pcb.data.rcv_resp.timeout != 0) { 719 if (adapter->irx_pcb.data.rcv_resp.timeout != 0) {
716 printk(KERN_ERR "%s: interrupt - packet not received correctly\n", dev->name); 720 pr_err("%s: interrupt - packet not received correctly\n", dev->name);
717 } else { 721 } else {
718 if (elp_debug >= 3) { 722 if (elp_debug >= 3) {
719 printk(KERN_DEBUG "%s: interrupt - packet received of length %i (%i)\n", dev->name, len, dlen); 723 pr_debug("%s: interrupt - packet received of length %i (%i)\n",
724 dev->name, len, dlen);
720 } 725 }
721 if (adapter->irx_pcb.command == 0xff) { 726 if (adapter->irx_pcb.command == 0xff) {
722 if (elp_debug >= 2) 727 if (elp_debug >= 2)
723 printk(KERN_DEBUG "%s: adding packet to backlog (len = %d)\n", dev->name, dlen); 728 pr_debug("%s: adding packet to backlog (len = %d)\n",
729 dev->name, dlen);
724 adapter->rx_backlog.length[adapter->rx_backlog.in] = dlen; 730 adapter->rx_backlog.length[adapter->rx_backlog.in] = dlen;
725 adapter->rx_backlog.in = backlog_next(adapter->rx_backlog.in); 731 adapter->rx_backlog.in = backlog_next(adapter->rx_backlog.in);
726 } else { 732 } else {
727 receive_packet(dev, dlen); 733 receive_packet(dev, dlen);
728 } 734 }
729 if (elp_debug >= 3) 735 if (elp_debug >= 3)
730 printk(KERN_DEBUG "%s: packet received\n", dev->name); 736 pr_debug("%s: packet received\n", dev->name);
731 } 737 }
732 break; 738 break;
733 739
@@ -737,7 +743,7 @@ static irqreturn_t elp_interrupt(int irq, void *dev_id)
737 case CMD_CONFIGURE_82586_RESPONSE: 743 case CMD_CONFIGURE_82586_RESPONSE:
738 adapter->got[CMD_CONFIGURE_82586] = 1; 744 adapter->got[CMD_CONFIGURE_82586] = 1;
739 if (elp_debug >= 3) 745 if (elp_debug >= 3)
740 printk(KERN_DEBUG "%s: interrupt - configure response received\n", dev->name); 746 pr_debug("%s: interrupt - configure response received\n", dev->name);
741 break; 747 break;
742 748
743 /* 749 /*
@@ -746,7 +752,7 @@ static irqreturn_t elp_interrupt(int irq, void *dev_id)
746 case CMD_CONFIGURE_ADAPTER_RESPONSE: 752 case CMD_CONFIGURE_ADAPTER_RESPONSE:
747 adapter->got[CMD_CONFIGURE_ADAPTER_MEMORY] = 1; 753 adapter->got[CMD_CONFIGURE_ADAPTER_MEMORY] = 1;
748 if (elp_debug >= 3) 754 if (elp_debug >= 3)
749 printk(KERN_DEBUG "%s: Adapter memory configuration %s.\n", dev->name, 755 pr_debug("%s: Adapter memory configuration %s.\n", dev->name,
750 adapter->irx_pcb.data.failed ? "failed" : "succeeded"); 756 adapter->irx_pcb.data.failed ? "failed" : "succeeded");
751 break; 757 break;
752 758
@@ -756,7 +762,7 @@ static irqreturn_t elp_interrupt(int irq, void *dev_id)
756 case CMD_LOAD_MULTICAST_RESPONSE: 762 case CMD_LOAD_MULTICAST_RESPONSE:
757 adapter->got[CMD_LOAD_MULTICAST_LIST] = 1; 763 adapter->got[CMD_LOAD_MULTICAST_LIST] = 1;
758 if (elp_debug >= 3) 764 if (elp_debug >= 3)
759 printk(KERN_DEBUG "%s: Multicast address list loading %s.\n", dev->name, 765 pr_debug("%s: Multicast address list loading %s.\n", dev->name,
760 adapter->irx_pcb.data.failed ? "failed" : "succeeded"); 766 adapter->irx_pcb.data.failed ? "failed" : "succeeded");
761 break; 767 break;
762 768
@@ -766,7 +772,7 @@ static irqreturn_t elp_interrupt(int irq, void *dev_id)
766 case CMD_SET_ADDRESS_RESPONSE: 772 case CMD_SET_ADDRESS_RESPONSE:
767 adapter->got[CMD_SET_STATION_ADDRESS] = 1; 773 adapter->got[CMD_SET_STATION_ADDRESS] = 1;
768 if (elp_debug >= 3) 774 if (elp_debug >= 3)
769 printk(KERN_DEBUG "%s: Ethernet address setting %s.\n", dev->name, 775 pr_debug("%s: Ethernet address setting %s.\n", dev->name,
770 adapter->irx_pcb.data.failed ? "failed" : "succeeded"); 776 adapter->irx_pcb.data.failed ? "failed" : "succeeded");
771 break; 777 break;
772 778
@@ -783,7 +789,7 @@ static irqreturn_t elp_interrupt(int irq, void *dev_id)
783 dev->stats.rx_over_errors += adapter->irx_pcb.data.netstat.err_res; 789 dev->stats.rx_over_errors += adapter->irx_pcb.data.netstat.err_res;
784 adapter->got[CMD_NETWORK_STATISTICS] = 1; 790 adapter->got[CMD_NETWORK_STATISTICS] = 1;
785 if (elp_debug >= 3) 791 if (elp_debug >= 3)
786 printk(KERN_DEBUG "%s: interrupt - statistics response received\n", dev->name); 792 pr_debug("%s: interrupt - statistics response received\n", dev->name);
787 break; 793 break;
788 794
789 /* 795 /*
@@ -791,17 +797,17 @@ static irqreturn_t elp_interrupt(int irq, void *dev_id)
791 */ 797 */
792 case CMD_TRANSMIT_PACKET_COMPLETE: 798 case CMD_TRANSMIT_PACKET_COMPLETE:
793 if (elp_debug >= 3) 799 if (elp_debug >= 3)
794 printk(KERN_DEBUG "%s: interrupt - packet sent\n", dev->name); 800 pr_debug("%s: interrupt - packet sent\n", dev->name);
795 if (!netif_running(dev)) 801 if (!netif_running(dev))
796 break; 802 break;
797 switch (adapter->irx_pcb.data.xmit_resp.c_stat) { 803 switch (adapter->irx_pcb.data.xmit_resp.c_stat) {
798 case 0xffff: 804 case 0xffff:
799 dev->stats.tx_aborted_errors++; 805 dev->stats.tx_aborted_errors++;
800 printk(KERN_INFO "%s: transmit timed out, network cable problem?\n", dev->name); 806 pr_info("%s: transmit timed out, network cable problem?\n", dev->name);
801 break; 807 break;
802 case 0xfffe: 808 case 0xfffe:
803 dev->stats.tx_fifo_errors++; 809 dev->stats.tx_fifo_errors++;
804 printk(KERN_INFO "%s: transmit timed out, FIFO underrun\n", dev->name); 810 pr_info("%s: transmit timed out, FIFO underrun\n", dev->name);
805 break; 811 break;
806 } 812 }
807 netif_wake_queue(dev); 813 netif_wake_queue(dev);
@@ -811,11 +817,12 @@ static irqreturn_t elp_interrupt(int irq, void *dev_id)
811 * some unknown PCB 817 * some unknown PCB
812 */ 818 */
813 default: 819 default:
814 printk(KERN_DEBUG "%s: unknown PCB received - %2.2x\n", dev->name, adapter->irx_pcb.command); 820 pr_debug("%s: unknown PCB received - %2.2x\n",
821 dev->name, adapter->irx_pcb.command);
815 break; 822 break;
816 } 823 }
817 } else { 824 } else {
818 printk(KERN_WARNING "%s: failed to read PCB on interrupt\n", dev->name); 825 pr_warning("%s: failed to read PCB on interrupt\n", dev->name);
819 adapter_reset(dev); 826 adapter_reset(dev);
820 } 827 }
821 } 828 }
@@ -844,13 +851,13 @@ static int elp_open(struct net_device *dev)
844 int retval; 851 int retval;
845 852
846 if (elp_debug >= 3) 853 if (elp_debug >= 3)
847 printk(KERN_DEBUG "%s: request to open device\n", dev->name); 854 pr_debug("%s: request to open device\n", dev->name);
848 855
849 /* 856 /*
850 * make sure we actually found the device 857 * make sure we actually found the device
851 */ 858 */
852 if (adapter == NULL) { 859 if (adapter == NULL) {
853 printk(KERN_ERR "%s: Opening a non-existent physical device\n", dev->name); 860 pr_err("%s: Opening a non-existent physical device\n", dev->name);
854 return -EAGAIN; 861 return -EAGAIN;
855 } 862 }
856 /* 863 /*
@@ -880,17 +887,17 @@ static int elp_open(struct net_device *dev)
880 * install our interrupt service routine 887 * install our interrupt service routine
881 */ 888 */
882 if ((retval = request_irq(dev->irq, &elp_interrupt, 0, dev->name, dev))) { 889 if ((retval = request_irq(dev->irq, &elp_interrupt, 0, dev->name, dev))) {
883 printk(KERN_ERR "%s: could not allocate IRQ%d\n", dev->name, dev->irq); 890 pr_err("%s: could not allocate IRQ%d\n", dev->name, dev->irq);
884 return retval; 891 return retval;
885 } 892 }
886 if ((retval = request_dma(dev->dma, dev->name))) { 893 if ((retval = request_dma(dev->dma, dev->name))) {
887 free_irq(dev->irq, dev); 894 free_irq(dev->irq, dev);
888 printk(KERN_ERR "%s: could not allocate DMA%d channel\n", dev->name, dev->dma); 895 pr_err("%s: could not allocate DMA%d channel\n", dev->name, dev->dma);
889 return retval; 896 return retval;
890 } 897 }
891 adapter->dma_buffer = (void *) dma_mem_alloc(DMA_BUFFER_SIZE); 898 adapter->dma_buffer = (void *) dma_mem_alloc(DMA_BUFFER_SIZE);
892 if (!adapter->dma_buffer) { 899 if (!adapter->dma_buffer) {
893 printk(KERN_ERR "%s: could not allocate DMA buffer\n", dev->name); 900 pr_err("%s: could not allocate DMA buffer\n", dev->name);
894 free_dma(dev->dma); 901 free_dma(dev->dma);
895 free_irq(dev->irq, dev); 902 free_irq(dev->irq, dev);
896 return -ENOMEM; 903 return -ENOMEM;
@@ -906,7 +913,7 @@ static int elp_open(struct net_device *dev)
906 * configure adapter memory: we need 10 multicast addresses, default==0 913 * configure adapter memory: we need 10 multicast addresses, default==0
907 */ 914 */
908 if (elp_debug >= 3) 915 if (elp_debug >= 3)
909 printk(KERN_DEBUG "%s: sending 3c505 memory configuration command\n", dev->name); 916 pr_debug("%s: sending 3c505 memory configuration command\n", dev->name);
910 adapter->tx_pcb.command = CMD_CONFIGURE_ADAPTER_MEMORY; 917 adapter->tx_pcb.command = CMD_CONFIGURE_ADAPTER_MEMORY;
911 adapter->tx_pcb.data.memconf.cmd_q = 10; 918 adapter->tx_pcb.data.memconf.cmd_q = 10;
912 adapter->tx_pcb.data.memconf.rcv_q = 20; 919 adapter->tx_pcb.data.memconf.rcv_q = 20;
@@ -917,7 +924,7 @@ static int elp_open(struct net_device *dev)
917 adapter->tx_pcb.length = sizeof(struct Memconf); 924 adapter->tx_pcb.length = sizeof(struct Memconf);
918 adapter->got[CMD_CONFIGURE_ADAPTER_MEMORY] = 0; 925 adapter->got[CMD_CONFIGURE_ADAPTER_MEMORY] = 0;
919 if (!send_pcb(dev, &adapter->tx_pcb)) 926 if (!send_pcb(dev, &adapter->tx_pcb))
920 printk(KERN_ERR "%s: couldn't send memory configuration command\n", dev->name); 927 pr_err("%s: couldn't send memory configuration command\n", dev->name);
921 else { 928 else {
922 unsigned long timeout = jiffies + TIMEOUT; 929 unsigned long timeout = jiffies + TIMEOUT;
923 while (adapter->got[CMD_CONFIGURE_ADAPTER_MEMORY] == 0 && time_before(jiffies, timeout)); 930 while (adapter->got[CMD_CONFIGURE_ADAPTER_MEMORY] == 0 && time_before(jiffies, timeout));
@@ -930,13 +937,13 @@ static int elp_open(struct net_device *dev)
930 * configure adapter to receive broadcast messages and wait for response 937 * configure adapter to receive broadcast messages and wait for response
931 */ 938 */
932 if (elp_debug >= 3) 939 if (elp_debug >= 3)
933 printk(KERN_DEBUG "%s: sending 82586 configure command\n", dev->name); 940 pr_debug("%s: sending 82586 configure command\n", dev->name);
934 adapter->tx_pcb.command = CMD_CONFIGURE_82586; 941 adapter->tx_pcb.command = CMD_CONFIGURE_82586;
935 adapter->tx_pcb.data.configure = NO_LOOPBACK | RECV_BROAD; 942 adapter->tx_pcb.data.configure = NO_LOOPBACK | RECV_BROAD;
936 adapter->tx_pcb.length = 2; 943 adapter->tx_pcb.length = 2;
937 adapter->got[CMD_CONFIGURE_82586] = 0; 944 adapter->got[CMD_CONFIGURE_82586] = 0;
938 if (!send_pcb(dev, &adapter->tx_pcb)) 945 if (!send_pcb(dev, &adapter->tx_pcb))
939 printk(KERN_ERR "%s: couldn't send 82586 configure command\n", dev->name); 946 pr_err("%s: couldn't send 82586 configure command\n", dev->name);
940 else { 947 else {
941 unsigned long timeout = jiffies + TIMEOUT; 948 unsigned long timeout = jiffies + TIMEOUT;
942 while (adapter->got[CMD_CONFIGURE_82586] == 0 && time_before(jiffies, timeout)); 949 while (adapter->got[CMD_CONFIGURE_82586] == 0 && time_before(jiffies, timeout));
@@ -952,7 +959,7 @@ static int elp_open(struct net_device *dev)
952 */ 959 */
953 prime_rx(dev); 960 prime_rx(dev);
954 if (elp_debug >= 3) 961 if (elp_debug >= 3)
955 printk(KERN_DEBUG "%s: %d receive PCBs active\n", dev->name, adapter->rx_active); 962 pr_debug("%s: %d receive PCBs active\n", dev->name, adapter->rx_active);
956 963
957 /* 964 /*
958 * device is now officially open! 965 * device is now officially open!
@@ -982,7 +989,7 @@ static bool send_packet(struct net_device *dev, struct sk_buff *skb)
982 989
983 if (test_and_set_bit(0, (void *) &adapter->busy)) { 990 if (test_and_set_bit(0, (void *) &adapter->busy)) {
984 if (elp_debug >= 2) 991 if (elp_debug >= 2)
985 printk(KERN_DEBUG "%s: transmit blocked\n", dev->name); 992 pr_debug("%s: transmit blocked\n", dev->name);
986 return false; 993 return false;
987 } 994 }
988 995
@@ -1004,7 +1011,7 @@ static bool send_packet(struct net_device *dev, struct sk_buff *skb)
1004 } 1011 }
1005 /* if this happens, we die */ 1012 /* if this happens, we die */
1006 if (test_and_set_bit(0, (void *) &adapter->dmaing)) 1013 if (test_and_set_bit(0, (void *) &adapter->dmaing))
1007 printk(KERN_DEBUG "%s: tx: DMA %d in progress\n", dev->name, adapter->current_dma.direction); 1014 pr_debug("%s: tx: DMA %d in progress\n", dev->name, adapter->current_dma.direction);
1008 1015
1009 adapter->current_dma.direction = 1; 1016 adapter->current_dma.direction = 1;
1010 adapter->current_dma.start_time = jiffies; 1017 adapter->current_dma.start_time = jiffies;
@@ -1030,7 +1037,7 @@ static bool send_packet(struct net_device *dev, struct sk_buff *skb)
1030 release_dma_lock(flags); 1037 release_dma_lock(flags);
1031 1038
1032 if (elp_debug >= 3) 1039 if (elp_debug >= 3)
1033 printk(KERN_DEBUG "%s: DMA transfer started\n", dev->name); 1040 pr_debug("%s: DMA transfer started\n", dev->name);
1034 1041
1035 return true; 1042 return true;
1036} 1043}
@@ -1044,9 +1051,10 @@ static void elp_timeout(struct net_device *dev)
1044 int stat; 1051 int stat;
1045 1052
1046 stat = inb_status(dev->base_addr); 1053 stat = inb_status(dev->base_addr);
1047 printk(KERN_WARNING "%s: transmit timed out, lost %s?\n", dev->name, (stat & ACRF) ? "interrupt" : "command"); 1054 pr_warning("%s: transmit timed out, lost %s?\n", dev->name,
1055 (stat & ACRF) ? "interrupt" : "command");
1048 if (elp_debug >= 1) 1056 if (elp_debug >= 1)
1049 printk(KERN_DEBUG "%s: status %#02x\n", dev->name, stat); 1057 pr_debug("%s: status %#02x\n", dev->name, stat);
1050 dev->trans_start = jiffies; 1058 dev->trans_start = jiffies;
1051 dev->stats.tx_dropped++; 1059 dev->stats.tx_dropped++;
1052 netif_wake_queue(dev); 1060 netif_wake_queue(dev);
@@ -1068,7 +1076,7 @@ static int elp_start_xmit(struct sk_buff *skb, struct net_device *dev)
1068 check_3c505_dma(dev); 1076 check_3c505_dma(dev);
1069 1077
1070 if (elp_debug >= 3) 1078 if (elp_debug >= 3)
1071 printk(KERN_DEBUG "%s: request to send packet of length %d\n", dev->name, (int) skb->len); 1079 pr_debug("%s: request to send packet of length %d\n", dev->name, (int) skb->len);
1072 1080
1073 netif_stop_queue(dev); 1081 netif_stop_queue(dev);
1074 1082
@@ -1077,13 +1085,13 @@ static int elp_start_xmit(struct sk_buff *skb, struct net_device *dev)
1077 */ 1085 */
1078 if (!send_packet(dev, skb)) { 1086 if (!send_packet(dev, skb)) {
1079 if (elp_debug >= 2) { 1087 if (elp_debug >= 2) {
1080 printk(KERN_DEBUG "%s: failed to transmit packet\n", dev->name); 1088 pr_debug("%s: failed to transmit packet\n", dev->name);
1081 } 1089 }
1082 spin_unlock_irqrestore(&adapter->lock, flags); 1090 spin_unlock_irqrestore(&adapter->lock, flags);
1083 return 1; 1091 return 1;
1084 } 1092 }
1085 if (elp_debug >= 3) 1093 if (elp_debug >= 3)
1086 printk(KERN_DEBUG "%s: packet of length %d sent\n", dev->name, (int) skb->len); 1094 pr_debug("%s: packet of length %d sent\n", dev->name, (int) skb->len);
1087 1095
1088 /* 1096 /*
1089 * start the transmit timeout 1097 * start the transmit timeout
@@ -1107,7 +1115,7 @@ static struct net_device_stats *elp_get_stats(struct net_device *dev)
1107 elp_device *adapter = netdev_priv(dev); 1115 elp_device *adapter = netdev_priv(dev);
1108 1116
1109 if (elp_debug >= 3) 1117 if (elp_debug >= 3)
1110 printk(KERN_DEBUG "%s: request for stats\n", dev->name); 1118 pr_debug("%s: request for stats\n", dev->name);
1111 1119
1112 /* If the device is closed, just return the latest stats we have, 1120 /* If the device is closed, just return the latest stats we have,
1113 - we cannot ask from the adapter without interrupts */ 1121 - we cannot ask from the adapter without interrupts */
@@ -1119,7 +1127,7 @@ static struct net_device_stats *elp_get_stats(struct net_device *dev)
1119 adapter->tx_pcb.length = 0; 1127 adapter->tx_pcb.length = 0;
1120 adapter->got[CMD_NETWORK_STATISTICS] = 0; 1128 adapter->got[CMD_NETWORK_STATISTICS] = 0;
1121 if (!send_pcb(dev, &adapter->tx_pcb)) 1129 if (!send_pcb(dev, &adapter->tx_pcb))
1122 printk(KERN_ERR "%s: couldn't send get statistics command\n", dev->name); 1130 pr_err("%s: couldn't send get statistics command\n", dev->name);
1123 else { 1131 else {
1124 unsigned long timeout = jiffies + TIMEOUT; 1132 unsigned long timeout = jiffies + TIMEOUT;
1125 while (adapter->got[CMD_NETWORK_STATISTICS] == 0 && time_before(jiffies, timeout)); 1133 while (adapter->got[CMD_NETWORK_STATISTICS] == 0 && time_before(jiffies, timeout));
@@ -1169,7 +1177,7 @@ static int elp_close(struct net_device *dev)
1169 elp_device *adapter = netdev_priv(dev); 1177 elp_device *adapter = netdev_priv(dev);
1170 1178
1171 if (elp_debug >= 3) 1179 if (elp_debug >= 3)
1172 printk(KERN_DEBUG "%s: request to close device\n", dev->name); 1180 pr_debug("%s: request to close device\n", dev->name);
1173 1181
1174 netif_stop_queue(dev); 1182 netif_stop_queue(dev);
1175 1183
@@ -1213,7 +1221,7 @@ static void elp_set_mc_list(struct net_device *dev)
1213 unsigned long flags; 1221 unsigned long flags;
1214 1222
1215 if (elp_debug >= 3) 1223 if (elp_debug >= 3)
1216 printk(KERN_DEBUG "%s: request to set multicast list\n", dev->name); 1224 pr_debug("%s: request to set multicast list\n", dev->name);
1217 1225
1218 spin_lock_irqsave(&adapter->lock, flags); 1226 spin_lock_irqsave(&adapter->lock, flags);
1219 1227
@@ -1228,7 +1236,7 @@ static void elp_set_mc_list(struct net_device *dev)
1228 } 1236 }
1229 adapter->got[CMD_LOAD_MULTICAST_LIST] = 0; 1237 adapter->got[CMD_LOAD_MULTICAST_LIST] = 0;
1230 if (!send_pcb(dev, &adapter->tx_pcb)) 1238 if (!send_pcb(dev, &adapter->tx_pcb))
1231 printk(KERN_ERR "%s: couldn't send set_multicast command\n", dev->name); 1239 pr_err("%s: couldn't send set_multicast command\n", dev->name);
1232 else { 1240 else {
1233 unsigned long timeout = jiffies + TIMEOUT; 1241 unsigned long timeout = jiffies + TIMEOUT;
1234 while (adapter->got[CMD_LOAD_MULTICAST_LIST] == 0 && time_before(jiffies, timeout)); 1242 while (adapter->got[CMD_LOAD_MULTICAST_LIST] == 0 && time_before(jiffies, timeout));
@@ -1247,14 +1255,14 @@ static void elp_set_mc_list(struct net_device *dev)
1247 * and wait for response 1255 * and wait for response
1248 */ 1256 */
1249 if (elp_debug >= 3) 1257 if (elp_debug >= 3)
1250 printk(KERN_DEBUG "%s: sending 82586 configure command\n", dev->name); 1258 pr_debug("%s: sending 82586 configure command\n", dev->name);
1251 adapter->tx_pcb.command = CMD_CONFIGURE_82586; 1259 adapter->tx_pcb.command = CMD_CONFIGURE_82586;
1252 adapter->tx_pcb.length = 2; 1260 adapter->tx_pcb.length = 2;
1253 adapter->got[CMD_CONFIGURE_82586] = 0; 1261 adapter->got[CMD_CONFIGURE_82586] = 0;
1254 if (!send_pcb(dev, &adapter->tx_pcb)) 1262 if (!send_pcb(dev, &adapter->tx_pcb))
1255 { 1263 {
1256 spin_unlock_irqrestore(&adapter->lock, flags); 1264 spin_unlock_irqrestore(&adapter->lock, flags);
1257 printk(KERN_ERR "%s: couldn't send 82586 configure command\n", dev->name); 1265 pr_err("%s: couldn't send 82586 configure command\n", dev->name);
1258 } 1266 }
1259 else { 1267 else {
1260 unsigned long timeout = jiffies + TIMEOUT; 1268 unsigned long timeout = jiffies + TIMEOUT;
@@ -1283,17 +1291,17 @@ static int __init elp_sense(struct net_device *dev)
1283 orig_HSR = inb_status(addr); 1291 orig_HSR = inb_status(addr);
1284 1292
1285 if (elp_debug > 0) 1293 if (elp_debug > 0)
1286 printk(search_msg, name, addr); 1294 pr_debug(search_msg, name, addr);
1287 1295
1288 if (orig_HSR == 0xff) { 1296 if (orig_HSR == 0xff) {
1289 if (elp_debug > 0) 1297 if (elp_debug > 0)
1290 printk(notfound_msg, 1); 1298 pr_cont(notfound_msg, 1);
1291 goto out; 1299 goto out;
1292 } 1300 }
1293 1301
1294 /* Wait for a while; the adapter may still be booting up */ 1302 /* Wait for a while; the adapter may still be booting up */
1295 if (elp_debug > 0) 1303 if (elp_debug > 0)
1296 printk(stilllooking_msg); 1304 pr_cont(stilllooking_msg);
1297 1305
1298 if (orig_HSR & DIR) { 1306 if (orig_HSR & DIR) {
1299 /* If HCR.DIR is up, we pull it down. HSR.DIR should follow. */ 1307 /* If HCR.DIR is up, we pull it down. HSR.DIR should follow. */
@@ -1301,7 +1309,7 @@ static int __init elp_sense(struct net_device *dev)
1301 msleep(300); 1309 msleep(300);
1302 if (inb_status(addr) & DIR) { 1310 if (inb_status(addr) & DIR) {
1303 if (elp_debug > 0) 1311 if (elp_debug > 0)
1304 printk(notfound_msg, 2); 1312 pr_cont(notfound_msg, 2);
1305 goto out; 1313 goto out;
1306 } 1314 }
1307 } else { 1315 } else {
@@ -1310,7 +1318,7 @@ static int __init elp_sense(struct net_device *dev)
1310 msleep(300); 1318 msleep(300);
1311 if (!(inb_status(addr) & DIR)) { 1319 if (!(inb_status(addr) & DIR)) {
1312 if (elp_debug > 0) 1320 if (elp_debug > 0)
1313 printk(notfound_msg, 3); 1321 pr_cont(notfound_msg, 3);
1314 goto out; 1322 goto out;
1315 } 1323 }
1316 } 1324 }
@@ -1318,7 +1326,7 @@ static int __init elp_sense(struct net_device *dev)
1318 * It certainly looks like a 3c505. 1326 * It certainly looks like a 3c505.
1319 */ 1327 */
1320 if (elp_debug > 0) 1328 if (elp_debug > 0)
1321 printk(found_msg); 1329 pr_cont(found_msg);
1322 1330
1323 return 0; 1331 return 0;
1324out: 1332out:
@@ -1349,7 +1357,7 @@ static int __init elp_autodetect(struct net_device *dev)
1349 1357
1350 /* could not find an adapter */ 1358 /* could not find an adapter */
1351 if (elp_debug > 0) 1359 if (elp_debug > 0)
1352 printk(couldnot_msg, dev->name); 1360 pr_debug(couldnot_msg, dev->name);
1353 1361
1354 return 0; /* Because of this, the layer above will return -ENODEV */ 1362 return 0; /* Because of this, the layer above will return -ENODEV */
1355} 1363}
@@ -1424,16 +1432,16 @@ static int __init elplus_setup(struct net_device *dev)
1424 /* Nope, it's ignoring the command register. This means that 1432 /* Nope, it's ignoring the command register. This means that
1425 * either it's still booting up, or it's died. 1433 * either it's still booting up, or it's died.
1426 */ 1434 */
1427 printk(KERN_ERR "%s: command register wouldn't drain, ", dev->name); 1435 pr_err("%s: command register wouldn't drain, ", dev->name);
1428 if ((inb_status(dev->base_addr) & 7) == 3) { 1436 if ((inb_status(dev->base_addr) & 7) == 3) {
1429 /* If the adapter status is 3, it *could* still be booting. 1437 /* If the adapter status is 3, it *could* still be booting.
1430 * Give it the benefit of the doubt for 10 seconds. 1438 * Give it the benefit of the doubt for 10 seconds.
1431 */ 1439 */
1432 printk("assuming 3c505 still starting\n"); 1440 pr_cont("assuming 3c505 still starting\n");
1433 timeout = jiffies + 10*HZ; 1441 timeout = jiffies + 10*HZ;
1434 while (time_before(jiffies, timeout) && (inb_status(dev->base_addr) & 7)); 1442 while (time_before(jiffies, timeout) && (inb_status(dev->base_addr) & 7));
1435 if (inb_status(dev->base_addr) & 7) { 1443 if (inb_status(dev->base_addr) & 7) {
1436 printk(KERN_ERR "%s: 3c505 failed to start\n", dev->name); 1444 pr_err("%s: 3c505 failed to start\n", dev->name);
1437 } else { 1445 } else {
1438 okay = 1; /* It started */ 1446 okay = 1; /* It started */
1439 } 1447 }
@@ -1441,7 +1449,7 @@ static int __init elplus_setup(struct net_device *dev)
1441 /* Otherwise, it must just be in a strange 1449 /* Otherwise, it must just be in a strange
1442 * state. We probably need to kick it. 1450 * state. We probably need to kick it.
1443 */ 1451 */
1444 printk("3c505 is sulking\n"); 1452 pr_cont("3c505 is sulking\n");
1445 } 1453 }
1446 } 1454 }
1447 for (tries = 0; tries < 5 && okay; tries++) { 1455 for (tries = 0; tries < 5 && okay; tries++) {
@@ -1454,18 +1462,19 @@ static int __init elplus_setup(struct net_device *dev)
1454 adapter->tx_pcb.length = 0; 1462 adapter->tx_pcb.length = 0;
1455 cookie = probe_irq_on(); 1463 cookie = probe_irq_on();
1456 if (!send_pcb(dev, &adapter->tx_pcb)) { 1464 if (!send_pcb(dev, &adapter->tx_pcb)) {
1457 printk(KERN_ERR "%s: could not send first PCB\n", dev->name); 1465 pr_err("%s: could not send first PCB\n", dev->name);
1458 probe_irq_off(cookie); 1466 probe_irq_off(cookie);
1459 continue; 1467 continue;
1460 } 1468 }
1461 if (!receive_pcb(dev, &adapter->rx_pcb)) { 1469 if (!receive_pcb(dev, &adapter->rx_pcb)) {
1462 printk(KERN_ERR "%s: could not read first PCB\n", dev->name); 1470 pr_err("%s: could not read first PCB\n", dev->name);
1463 probe_irq_off(cookie); 1471 probe_irq_off(cookie);
1464 continue; 1472 continue;
1465 } 1473 }
1466 if ((adapter->rx_pcb.command != CMD_ADDRESS_RESPONSE) || 1474 if ((adapter->rx_pcb.command != CMD_ADDRESS_RESPONSE) ||
1467 (adapter->rx_pcb.length != 6)) { 1475 (adapter->rx_pcb.length != 6)) {
1468 printk(KERN_ERR "%s: first PCB wrong (%d, %d)\n", dev->name, adapter->rx_pcb.command, adapter->rx_pcb.length); 1476 pr_err("%s: first PCB wrong (%d, %d)\n", dev->name,
1477 adapter->rx_pcb.command, adapter->rx_pcb.length);
1469 probe_irq_off(cookie); 1478 probe_irq_off(cookie);
1470 continue; 1479 continue;
1471 } 1480 }
@@ -1474,32 +1483,32 @@ static int __init elplus_setup(struct net_device *dev)
1474 /* It's broken. Do a hard reset to re-initialise the board, 1483 /* It's broken. Do a hard reset to re-initialise the board,
1475 * and try again. 1484 * and try again.
1476 */ 1485 */
1477 printk(KERN_INFO "%s: resetting adapter\n", dev->name); 1486 pr_info("%s: resetting adapter\n", dev->name);
1478 outb_control(adapter->hcr_val | FLSH | ATTN, dev); 1487 outb_control(adapter->hcr_val | FLSH | ATTN, dev);
1479 outb_control(adapter->hcr_val & ~(FLSH | ATTN), dev); 1488 outb_control(adapter->hcr_val & ~(FLSH | ATTN), dev);
1480 } 1489 }
1481 printk(KERN_ERR "%s: failed to initialise 3c505\n", dev->name); 1490 pr_err("%s: failed to initialise 3c505\n", dev->name);
1482 goto out; 1491 goto out;
1483 1492
1484 okay: 1493 okay:
1485 if (dev->irq) { /* Is there a preset IRQ? */ 1494 if (dev->irq) { /* Is there a preset IRQ? */
1486 int rpt = probe_irq_off(cookie); 1495 int rpt = probe_irq_off(cookie);
1487 if (dev->irq != rpt) { 1496 if (dev->irq != rpt) {
1488 printk(KERN_WARNING "%s: warning, irq %d configured but %d detected\n", dev->name, dev->irq, rpt); 1497 pr_warning("%s: warning, irq %d configured but %d detected\n", dev->name, dev->irq, rpt);
1489 } 1498 }
1490 /* if dev->irq == probe_irq_off(cookie), all is well */ 1499 /* if dev->irq == probe_irq_off(cookie), all is well */
1491 } else /* No preset IRQ; just use what we can detect */ 1500 } else /* No preset IRQ; just use what we can detect */
1492 dev->irq = probe_irq_off(cookie); 1501 dev->irq = probe_irq_off(cookie);
1493 switch (dev->irq) { /* Legal, sane? */ 1502 switch (dev->irq) { /* Legal, sane? */
1494 case 0: 1503 case 0:
1495 printk(KERN_ERR "%s: IRQ probe failed: check 3c505 jumpers.\n", 1504 pr_err("%s: IRQ probe failed: check 3c505 jumpers.\n",
1496 dev->name); 1505 dev->name);
1497 goto out; 1506 goto out;
1498 case 1: 1507 case 1:
1499 case 6: 1508 case 6:
1500 case 8: 1509 case 8:
1501 case 13: 1510 case 13:
1502 printk(KERN_ERR "%s: Impossible IRQ %d reported by probe_irq_off().\n", 1511 pr_err("%s: Impossible IRQ %d reported by probe_irq_off().\n",
1503 dev->name, dev->irq); 1512 dev->name, dev->irq);
1504 goto out; 1513 goto out;
1505 } 1514 }
@@ -1521,7 +1530,7 @@ static int __init elplus_setup(struct net_device *dev)
1521 dev->dma = dev->mem_start & 7; 1530 dev->dma = dev->mem_start & 7;
1522 } 1531 }
1523 else { 1532 else {
1524 printk(KERN_WARNING "%s: warning, DMA channel not specified, using default\n", dev->name); 1533 pr_warning("%s: warning, DMA channel not specified, using default\n", dev->name);
1525 dev->dma = ELP_DMA; 1534 dev->dma = ELP_DMA;
1526 } 1535 }
1527 } 1536 }
@@ -1529,11 +1538,8 @@ static int __init elplus_setup(struct net_device *dev)
1529 /* 1538 /*
1530 * print remainder of startup message 1539 * print remainder of startup message
1531 */ 1540 */
1532 printk(KERN_INFO "%s: 3c505 at %#lx, irq %d, dma %d, " 1541 pr_info("%s: 3c505 at %#lx, irq %d, dma %d, addr %pM, ",
1533 "addr %pM, ", 1542 dev->name, dev->base_addr, dev->irq, dev->dma, dev->dev_addr);
1534 dev->name, dev->base_addr, dev->irq, dev->dma,
1535 dev->dev_addr);
1536
1537 /* 1543 /*
1538 * read more information from the adapter 1544 * read more information from the adapter
1539 */ 1545 */
@@ -1544,9 +1550,10 @@ static int __init elplus_setup(struct net_device *dev)
1544 !receive_pcb(dev, &adapter->rx_pcb) || 1550 !receive_pcb(dev, &adapter->rx_pcb) ||
1545 (adapter->rx_pcb.command != CMD_ADAPTER_INFO_RESPONSE) || 1551 (adapter->rx_pcb.command != CMD_ADAPTER_INFO_RESPONSE) ||
1546 (adapter->rx_pcb.length != 10)) { 1552 (adapter->rx_pcb.length != 10)) {
1547 printk("not responding to second PCB\n"); 1553 pr_cont("not responding to second PCB\n");
1548 } 1554 }
1549 printk("rev %d.%d, %dk\n", adapter->rx_pcb.data.info.major_vers, adapter->rx_pcb.data.info.minor_vers, adapter->rx_pcb.data.info.RAM_sz); 1555 pr_cont("rev %d.%d, %dk\n", adapter->rx_pcb.data.info.major_vers,
1556 adapter->rx_pcb.data.info.minor_vers, adapter->rx_pcb.data.info.RAM_sz);
1550 1557
1551 /* 1558 /*
1552 * reconfigure the adapter memory to better suit our purposes 1559 * reconfigure the adapter memory to better suit our purposes
@@ -1563,10 +1570,10 @@ static int __init elplus_setup(struct net_device *dev)
1563 !receive_pcb(dev, &adapter->rx_pcb) || 1570 !receive_pcb(dev, &adapter->rx_pcb) ||
1564 (adapter->rx_pcb.command != CMD_CONFIGURE_ADAPTER_RESPONSE) || 1571 (adapter->rx_pcb.command != CMD_CONFIGURE_ADAPTER_RESPONSE) ||
1565 (adapter->rx_pcb.length != 2)) { 1572 (adapter->rx_pcb.length != 2)) {
1566 printk(KERN_ERR "%s: could not configure adapter memory\n", dev->name); 1573 pr_err("%s: could not configure adapter memory\n", dev->name);
1567 } 1574 }
1568 if (adapter->rx_pcb.data.configure) { 1575 if (adapter->rx_pcb.data.configure) {
1569 printk(KERN_ERR "%s: adapter configuration failed\n", dev->name); 1576 pr_err("%s: adapter configuration failed\n", dev->name);
1570 } 1577 }
1571 1578
1572 dev->netdev_ops = &elp_netdev_ops; 1579 dev->netdev_ops = &elp_netdev_ops;
@@ -1631,17 +1638,17 @@ int __init init_module(void)
1631 dev->dma = dma[this_dev]; 1638 dev->dma = dma[this_dev];
1632 } else { 1639 } else {
1633 dev->dma = ELP_DMA; 1640 dev->dma = ELP_DMA;
1634 printk(KERN_WARNING "3c505.c: warning, using default DMA channel,\n"); 1641 pr_warning("3c505.c: warning, using default DMA channel,\n");
1635 } 1642 }
1636 if (io[this_dev] == 0) { 1643 if (io[this_dev] == 0) {
1637 if (this_dev) { 1644 if (this_dev) {
1638 free_netdev(dev); 1645 free_netdev(dev);
1639 break; 1646 break;
1640 } 1647 }
1641 printk(KERN_NOTICE "3c505.c: module autoprobe not recommended, give io=xx.\n"); 1648 pr_notice("3c505.c: module autoprobe not recommended, give io=xx.\n");
1642 } 1649 }
1643 if (elplus_setup(dev) != 0) { 1650 if (elplus_setup(dev) != 0) {
1644 printk(KERN_WARNING "3c505.c: Failed to register card at 0x%x.\n", io[this_dev]); 1651 pr_warning("3c505.c: Failed to register card at 0x%x.\n", io[this_dev]);
1645 free_netdev(dev); 1652 free_netdev(dev);
1646 break; 1653 break;
1647 } 1654 }
diff --git a/drivers/net/3c507.c b/drivers/net/3c507.c
index fbbaf826deff..96b86659381a 100644
--- a/drivers/net/3c507.c
+++ b/drivers/net/3c507.c
@@ -364,7 +364,7 @@ static const struct net_device_ops netdev_ops = {
364 364
365static int __init el16_probe1(struct net_device *dev, int ioaddr) 365static int __init el16_probe1(struct net_device *dev, int ioaddr)
366{ 366{
367 static unsigned char init_ID_done, version_printed; 367 static unsigned char init_ID_done;
368 int i, irq, irqval, retval; 368 int i, irq, irqval, retval;
369 struct net_local *lp; 369 struct net_local *lp;
370 370
@@ -391,10 +391,7 @@ static int __init el16_probe1(struct net_device *dev, int ioaddr)
391 goto out; 391 goto out;
392 } 392 }
393 393
394 if (net_debug && version_printed++ == 0) 394 pr_info("%s: 3c507 at %#x,", dev->name, ioaddr);
395 printk(version);
396
397 printk("%s: 3c507 at %#x,", dev->name, ioaddr);
398 395
399 /* We should make a few more checks here, like the first three octets of 396 /* We should make a few more checks here, like the first three octets of
400 the S.A. for the manufacturer's code. */ 397 the S.A. for the manufacturer's code. */
@@ -403,7 +400,8 @@ static int __init el16_probe1(struct net_device *dev, int ioaddr)
403 400
404 irqval = request_irq(irq, &el16_interrupt, 0, DRV_NAME, dev); 401 irqval = request_irq(irq, &el16_interrupt, 0, DRV_NAME, dev);
405 if (irqval) { 402 if (irqval) {
406 printk(KERN_ERR "3c507: unable to get IRQ %d (irqval=%d).\n", irq, irqval); 403 pr_cont("\n");
404 pr_err("3c507: unable to get IRQ %d (irqval=%d).\n", irq, irqval);
407 retval = -EAGAIN; 405 retval = -EAGAIN;
408 goto out; 406 goto out;
409 } 407 }
@@ -414,7 +412,7 @@ static int __init el16_probe1(struct net_device *dev, int ioaddr)
414 outb(0x01, ioaddr + MISC_CTRL); 412 outb(0x01, ioaddr + MISC_CTRL);
415 for (i = 0; i < 6; i++) 413 for (i = 0; i < 6; i++)
416 dev->dev_addr[i] = inb(ioaddr + i); 414 dev->dev_addr[i] = inb(ioaddr + i);
417 printk(" %pM", dev->dev_addr); 415 pr_cont(" %pM", dev->dev_addr);
418 416
419 if (mem_start) 417 if (mem_start)
420 net_debug = mem_start & 7; 418 net_debug = mem_start & 7;
@@ -443,18 +441,18 @@ static int __init el16_probe1(struct net_device *dev, int ioaddr)
443 dev->if_port = (inb(ioaddr + ROM_CONFIG) & 0x80) ? 1 : 0; 441 dev->if_port = (inb(ioaddr + ROM_CONFIG) & 0x80) ? 1 : 0;
444 dev->irq = inb(ioaddr + IRQ_CONFIG) & 0x0f; 442 dev->irq = inb(ioaddr + IRQ_CONFIG) & 0x0f;
445 443
446 printk(", IRQ %d, %sternal xcvr, memory %#lx-%#lx.\n", dev->irq, 444 pr_cont(", IRQ %d, %sternal xcvr, memory %#lx-%#lx.\n", dev->irq,
447 dev->if_port ? "ex" : "in", dev->mem_start, dev->mem_end-1); 445 dev->if_port ? "ex" : "in", dev->mem_start, dev->mem_end-1);
448 446
449 if (net_debug) 447 if (net_debug)
450 printk(version); 448 pr_debug("%s", version);
451 449
452 lp = netdev_priv(dev); 450 lp = netdev_priv(dev);
453 memset(lp, 0, sizeof(*lp)); 451 memset(lp, 0, sizeof(*lp));
454 spin_lock_init(&lp->lock); 452 spin_lock_init(&lp->lock);
455 lp->base = ioremap(dev->mem_start, RX_BUF_END); 453 lp->base = ioremap(dev->mem_start, RX_BUF_END);
456 if (!lp->base) { 454 if (!lp->base) {
457 printk(KERN_ERR "3c507: unable to remap memory\n"); 455 pr_err("3c507: unable to remap memory\n");
458 retval = -EAGAIN; 456 retval = -EAGAIN;
459 goto out1; 457 goto out1;
460 } 458 }
@@ -488,20 +486,20 @@ static void el16_tx_timeout (struct net_device *dev)
488 void __iomem *shmem = lp->base; 486 void __iomem *shmem = lp->base;
489 487
490 if (net_debug > 1) 488 if (net_debug > 1)
491 printk ("%s: transmit timed out, %s? ", dev->name, 489 pr_debug("%s: transmit timed out, %s? ", dev->name,
492 readw(shmem + iSCB_STATUS) & 0x8000 ? "IRQ conflict" : 490 readw(shmem + iSCB_STATUS) & 0x8000 ? "IRQ conflict" :
493 "network cable problem"); 491 "network cable problem");
494 /* Try to restart the adaptor. */ 492 /* Try to restart the adaptor. */
495 if (lp->last_restart == dev->stats.tx_packets) { 493 if (lp->last_restart == dev->stats.tx_packets) {
496 if (net_debug > 1) 494 if (net_debug > 1)
497 printk ("Resetting board.\n"); 495 pr_cont("Resetting board.\n");
498 /* Completely reset the adaptor. */ 496 /* Completely reset the adaptor. */
499 init_82586_mem (dev); 497 init_82586_mem (dev);
500 lp->tx_pkts_in_ring = 0; 498 lp->tx_pkts_in_ring = 0;
501 } else { 499 } else {
502 /* Issue the channel attention signal and hope it "gets better". */ 500 /* Issue the channel attention signal and hope it "gets better". */
503 if (net_debug > 1) 501 if (net_debug > 1)
504 printk ("Kicking board.\n"); 502 pr_cont("Kicking board.\n");
505 writew(0xf000 | CUC_START | RX_START, shmem + iSCB_CMD); 503 writew(0xf000 | CUC_START | RX_START, shmem + iSCB_CMD);
506 outb (0, ioaddr + SIGNAL_CA); /* Issue channel-attn. */ 504 outb (0, ioaddr + SIGNAL_CA); /* Issue channel-attn. */
507 lp->last_restart = dev->stats.tx_packets; 505 lp->last_restart = dev->stats.tx_packets;
@@ -553,7 +551,8 @@ static irqreturn_t el16_interrupt(int irq, void *dev_id)
553 void __iomem *shmem; 551 void __iomem *shmem;
554 552
555 if (dev == NULL) { 553 if (dev == NULL) {
556 printk ("net_interrupt(): irq %d for unknown device.\n", irq); 554 pr_err("%s: net_interrupt(): irq %d for unknown device.\n",
555 dev->name, irq);
557 return IRQ_NONE; 556 return IRQ_NONE;
558 } 557 }
559 558
@@ -566,7 +565,7 @@ static irqreturn_t el16_interrupt(int irq, void *dev_id)
566 status = readw(shmem+iSCB_STATUS); 565 status = readw(shmem+iSCB_STATUS);
567 566
568 if (net_debug > 4) { 567 if (net_debug > 4) {
569 printk("%s: 3c507 interrupt, status %4.4x.\n", dev->name, status); 568 pr_debug("%s: 3c507 interrupt, status %4.4x.\n", dev->name, status);
570 } 569 }
571 570
572 /* Disable the 82586's input to the interrupt line. */ 571 /* Disable the 82586's input to the interrupt line. */
@@ -577,7 +576,7 @@ static irqreturn_t el16_interrupt(int irq, void *dev_id)
577 unsigned short tx_status = readw(shmem+lp->tx_reap); 576 unsigned short tx_status = readw(shmem+lp->tx_reap);
578 if (!(tx_status & 0x8000)) { 577 if (!(tx_status & 0x8000)) {
579 if (net_debug > 5) 578 if (net_debug > 5)
580 printk("Tx command incomplete (%#x).\n", lp->tx_reap); 579 pr_debug("Tx command incomplete (%#x).\n", lp->tx_reap);
581 break; 580 break;
582 } 581 }
583 /* Tx unsuccessful or some interesting status bit set. */ 582 /* Tx unsuccessful or some interesting status bit set. */
@@ -591,7 +590,7 @@ static irqreturn_t el16_interrupt(int irq, void *dev_id)
591 } 590 }
592 dev->stats.tx_packets++; 591 dev->stats.tx_packets++;
593 if (net_debug > 5) 592 if (net_debug > 5)
594 printk("Reaped %x, Tx status %04x.\n" , lp->tx_reap, tx_status); 593 pr_debug("Reaped %x, Tx status %04x.\n" , lp->tx_reap, tx_status);
595 lp->tx_reap += TX_BUF_SIZE; 594 lp->tx_reap += TX_BUF_SIZE;
596 if (lp->tx_reap > RX_BUF_START - TX_BUF_SIZE) 595 if (lp->tx_reap > RX_BUF_START - TX_BUF_SIZE)
597 lp->tx_reap = TX_BUF_START; 596 lp->tx_reap = TX_BUF_START;
@@ -606,7 +605,7 @@ static irqreturn_t el16_interrupt(int irq, void *dev_id)
606 605
607 if (status & 0x4000) { /* Packet received. */ 606 if (status & 0x4000) { /* Packet received. */
608 if (net_debug > 5) 607 if (net_debug > 5)
609 printk("Received packet, rx_head %04x.\n", lp->rx_head); 608 pr_debug("Received packet, rx_head %04x.\n", lp->rx_head);
610 el16_rx(dev); 609 el16_rx(dev);
611 } 610 }
612 611
@@ -615,7 +614,7 @@ static irqreturn_t el16_interrupt(int irq, void *dev_id)
615 614
616 if ((status & 0x0700) != 0x0200 && netif_running(dev)) { 615 if ((status & 0x0700) != 0x0200 && netif_running(dev)) {
617 if (net_debug) 616 if (net_debug)
618 printk("%s: Command unit stopped, status %04x, restarting.\n", 617 pr_debug("%s: Command unit stopped, status %04x, restarting.\n",
619 dev->name, status); 618 dev->name, status);
620 /* If this ever occurs we should really re-write the idle loop, reset 619 /* If this ever occurs we should really re-write the idle loop, reset
621 the Tx list, and do a complete restart of the command unit. 620 the Tx list, and do a complete restart of the command unit.
@@ -627,7 +626,7 @@ static irqreturn_t el16_interrupt(int irq, void *dev_id)
627 /* The Rx unit is not ready, it must be hung. Restart the receiver by 626 /* The Rx unit is not ready, it must be hung. Restart the receiver by
628 initializing the rx buffers, and issuing an Rx start command. */ 627 initializing the rx buffers, and issuing an Rx start command. */
629 if (net_debug) 628 if (net_debug)
630 printk("%s: Rx unit stopped, status %04x, restarting.\n", 629 pr_debug("%s: Rx unit stopped, status %04x, restarting.\n",
631 dev->name, status); 630 dev->name, status);
632 init_rx_bufs(dev); 631 init_rx_bufs(dev);
633 writew(RX_BUF_START,shmem+iSCB_RFA); 632 writew(RX_BUF_START,shmem+iSCB_RFA);
@@ -753,9 +752,8 @@ static void init_82586_mem(struct net_device *dev)
753 int boguscnt = 50; 752 int boguscnt = 50;
754 while (readw(shmem+iSCB_STATUS) == 0) 753 while (readw(shmem+iSCB_STATUS) == 0)
755 if (--boguscnt == 0) { 754 if (--boguscnt == 0) {
756 printk("%s: i82586 initialization timed out with status %04x, " 755 pr_warning("%s: i82586 initialization timed out with status %04x, cmd %04x.\n",
757 "cmd %04x.\n", dev->name, 756 dev->name, readw(shmem+iSCB_STATUS), readw(shmem+iSCB_CMD));
758 readw(shmem+iSCB_STATUS), readw(shmem+iSCB_CMD));
759 break; 757 break;
760 } 758 }
761 /* Issue channel-attn -- the 82586 won't start. */ 759 /* Issue channel-attn -- the 82586 won't start. */
@@ -765,7 +763,7 @@ static void init_82586_mem(struct net_device *dev)
765 /* Disable loopback and enable interrupts. */ 763 /* Disable loopback and enable interrupts. */
766 outb(0x84, ioaddr + MISC_CTRL); 764 outb(0x84, ioaddr + MISC_CTRL);
767 if (net_debug > 4) 765 if (net_debug > 4)
768 printk("%s: Initialized 82586, status %04x.\n", dev->name, 766 pr_debug("%s: Initialized 82586, status %04x.\n", dev->name,
769 readw(shmem+iSCB_STATUS)); 767 readw(shmem+iSCB_STATUS));
770 return; 768 return;
771} 769}
@@ -810,7 +808,7 @@ static void hardware_send_packet(struct net_device *dev, void *buf, short length
810 lp->tx_head = TX_BUF_START; 808 lp->tx_head = TX_BUF_START;
811 809
812 if (net_debug > 4) { 810 if (net_debug > 4) {
813 printk("%s: 3c507 @%x send length = %d, tx_block %3x, next %3x.\n", 811 pr_debug("%s: 3c507 @%x send length = %d, tx_block %3x, next %3x.\n",
814 dev->name, ioaddr, length, tx_block, lp->tx_head); 812 dev->name, ioaddr, length, tx_block, lp->tx_head);
815 } 813 }
816 814
@@ -838,7 +836,7 @@ static void el16_rx(struct net_device *dev)
838 836
839 if (rfd_cmd != 0 || data_buffer_addr != rx_head + 22 837 if (rfd_cmd != 0 || data_buffer_addr != rx_head + 22
840 || (pkt_len & 0xC000) != 0xC000) { 838 || (pkt_len & 0xC000) != 0xC000) {
841 printk(KERN_ERR "%s: Rx frame at %#x corrupted, " 839 pr_err("%s: Rx frame at %#x corrupted, "
842 "status %04x cmd %04x next %04x " 840 "status %04x cmd %04x next %04x "
843 "data-buf @%04x %04x.\n", 841 "data-buf @%04x %04x.\n",
844 dev->name, rx_head, frame_status, rfd_cmd, 842 dev->name, rx_head, frame_status, rfd_cmd,
@@ -858,8 +856,7 @@ static void el16_rx(struct net_device *dev)
858 pkt_len &= 0x3fff; 856 pkt_len &= 0x3fff;
859 skb = dev_alloc_skb(pkt_len+2); 857 skb = dev_alloc_skb(pkt_len+2);
860 if (skb == NULL) { 858 if (skb == NULL) {
861 printk(KERN_ERR "%s: Memory squeeze, " 859 pr_err("%s: Memory squeeze, dropping packet.\n",
862 "dropping packet.\n",
863 dev->name); 860 dev->name);
864 dev->stats.rx_dropped++; 861 dev->stats.rx_dropped++;
865 break; 862 break;
@@ -926,7 +923,7 @@ MODULE_PARM_DESC(irq, "(ignored)");
926int __init init_module(void) 923int __init init_module(void)
927{ 924{
928 if (io == 0) 925 if (io == 0)
929 printk("3c507: You should not use auto-probing with insmod!\n"); 926 pr_notice("3c507: You should not use auto-probing with insmod!\n");
930 dev_3c507 = el16_probe(-1); 927 dev_3c507 = el16_probe(-1);
931 return IS_ERR(dev_3c507) ? PTR_ERR(dev_3c507) : 0; 928 return IS_ERR(dev_3c507) ? PTR_ERR(dev_3c507) : 0;
932} 929}
diff --git a/drivers/net/3c509.c b/drivers/net/3c509.c
index 682aad897081..d2137efbd455 100644
--- a/drivers/net/3c509.c
+++ b/drivers/net/3c509.c
@@ -257,7 +257,7 @@ static int el3_isa_id_sequence(__be16 *phys_addr)
257 && !memcmp(phys_addr, el3_devs[i]->dev_addr, 257 && !memcmp(phys_addr, el3_devs[i]->dev_addr,
258 ETH_ALEN)) { 258 ETH_ALEN)) {
259 if (el3_debug > 3) 259 if (el3_debug > 3)
260 printk(KERN_DEBUG "3c509 with address %02x %02x %02x %02x %02x %02x was found by ISAPnP\n", 260 pr_debug("3c509 with address %02x %02x %02x %02x %02x %02x was found by ISAPnP\n",
261 phys_addr[0] & 0xff, phys_addr[0] >> 8, 261 phys_addr[0] & 0xff, phys_addr[0] >> 8,
262 phys_addr[1] & 0xff, phys_addr[1] >> 8, 262 phys_addr[1] & 0xff, phys_addr[1] >> 8,
263 phys_addr[2] & 0xff, phys_addr[2] >> 8); 263 phys_addr[2] & 0xff, phys_addr[2] >> 8);
@@ -578,19 +578,18 @@ static int __devinit el3_common_init(struct net_device *dev)
578 578
579 err = register_netdev(dev); 579 err = register_netdev(dev);
580 if (err) { 580 if (err) {
581 printk(KERN_ERR "Failed to register 3c5x9 at %#3.3lx, IRQ %d.\n", 581 pr_err("Failed to register 3c5x9 at %#3.3lx, IRQ %d.\n",
582 dev->base_addr, dev->irq); 582 dev->base_addr, dev->irq);
583 release_region(dev->base_addr, EL3_IO_EXTENT); 583 release_region(dev->base_addr, EL3_IO_EXTENT);
584 return err; 584 return err;
585 } 585 }
586 586
587 printk(KERN_INFO "%s: 3c5x9 found at %#3.3lx, %s port, " 587 pr_info("%s: 3c5x9 found at %#3.3lx, %s port, address %pM, IRQ %d.\n",
588 "address %pM, IRQ %d.\n",
589 dev->name, dev->base_addr, if_names[(dev->if_port & 0x03)], 588 dev->name, dev->base_addr, if_names[(dev->if_port & 0x03)],
590 dev->dev_addr, dev->irq); 589 dev->dev_addr, dev->irq);
591 590
592 if (el3_debug > 0) 591 if (el3_debug > 0)
593 printk(KERN_INFO "%s", version); 592 pr_info("%s", version);
594 return 0; 593 return 0;
595 594
596} 595}
@@ -629,8 +628,8 @@ static int __init el3_mca_probe(struct device *device)
629 irq = pos5 & 0x0f; 628 irq = pos5 & 0x0f;
630 629
631 630
632 printk(KERN_INFO "3c529: found %s at slot %d\n", 631 pr_info("3c529: found %s at slot %d\n",
633 el3_mca_adapter_names[mdev->index], slot + 1); 632 el3_mca_adapter_names[mdev->index], slot + 1);
634 633
635 /* claim the slot */ 634 /* claim the slot */
636 strncpy(mdev->name, el3_mca_adapter_names[mdev->index], 635 strncpy(mdev->name, el3_mca_adapter_names[mdev->index],
@@ -642,7 +641,7 @@ static int __init el3_mca_probe(struct device *device)
642 irq = mca_device_transform_irq(mdev, irq); 641 irq = mca_device_transform_irq(mdev, irq);
643 ioaddr = mca_device_transform_ioport(mdev, ioaddr); 642 ioaddr = mca_device_transform_ioport(mdev, ioaddr);
644 if (el3_debug > 2) { 643 if (el3_debug > 2) {
645 printk(KERN_DEBUG "3c529: irq %d ioaddr 0x%x ifport %d\n", irq, ioaddr, if_port); 644 pr_debug("3c529: irq %d ioaddr 0x%x ifport %d\n", irq, ioaddr, if_port);
646 } 645 }
647 EL3WINDOW(0); 646 EL3WINDOW(0);
648 for (i = 0; i < 3; i++) 647 for (i = 0; i < 3; i++)
@@ -657,11 +656,11 @@ static int __init el3_mca_probe(struct device *device)
657 netdev_boot_setup_check(dev); 656 netdev_boot_setup_check(dev);
658 657
659 el3_dev_fill(dev, phys_addr, ioaddr, irq, if_port, EL3_MCA); 658 el3_dev_fill(dev, phys_addr, ioaddr, irq, if_port, EL3_MCA);
660 device->driver_data = dev; 659 dev_set_drvdata(device, dev);
661 err = el3_common_init(dev); 660 err = el3_common_init(dev);
662 661
663 if (err) { 662 if (err) {
664 device->driver_data = NULL; 663 dev_set_drvdata(device, NULL);
665 free_netdev(dev); 664 free_netdev(dev);
666 return -ENOMEM; 665 return -ENOMEM;
667 } 666 }
@@ -725,12 +724,12 @@ static int __init el3_eisa_probe (struct device *device)
725 724
726/* This remove works for all device types. 725/* This remove works for all device types.
727 * 726 *
728 * The net dev must be stored in the driver_data field */ 727 * The net dev must be stored in the driver data field */
729static int __devexit el3_device_remove (struct device *device) 728static int __devexit el3_device_remove (struct device *device)
730{ 729{
731 struct net_device *dev; 730 struct net_device *dev;
732 731
733 dev = device->driver_data; 732 dev = dev_get_drvdata(device);
734 733
735 el3_common_remove (dev); 734 el3_common_remove (dev);
736 return 0; 735 return 0;
@@ -765,7 +764,7 @@ static ushort id_read_eeprom(int index)
765 word = (word << 1) + (inb(id_port) & 0x01); 764 word = (word << 1) + (inb(id_port) & 0x01);
766 765
767 if (el3_debug > 3) 766 if (el3_debug > 3)
768 printk(KERN_DEBUG " 3c509 EEPROM word %d %#4.4x.\n", index, word); 767 pr_debug(" 3c509 EEPROM word %d %#4.4x.\n", index, word);
769 768
770 return word; 769 return word;
771} 770}
@@ -787,13 +786,13 @@ el3_open(struct net_device *dev)
787 786
788 EL3WINDOW(0); 787 EL3WINDOW(0);
789 if (el3_debug > 3) 788 if (el3_debug > 3)
790 printk(KERN_DEBUG "%s: Opening, IRQ %d status@%x %4.4x.\n", dev->name, 789 pr_debug("%s: Opening, IRQ %d status@%x %4.4x.\n", dev->name,
791 dev->irq, ioaddr + EL3_STATUS, inw(ioaddr + EL3_STATUS)); 790 dev->irq, ioaddr + EL3_STATUS, inw(ioaddr + EL3_STATUS));
792 791
793 el3_up(dev); 792 el3_up(dev);
794 793
795 if (el3_debug > 3) 794 if (el3_debug > 3)
796 printk(KERN_DEBUG "%s: Opened 3c509 IRQ %d status %4.4x.\n", 795 pr_debug("%s: Opened 3c509 IRQ %d status %4.4x.\n",
797 dev->name, dev->irq, inw(ioaddr + EL3_STATUS)); 796 dev->name, dev->irq, inw(ioaddr + EL3_STATUS));
798 797
799 return 0; 798 return 0;
@@ -805,8 +804,7 @@ el3_tx_timeout (struct net_device *dev)
805 int ioaddr = dev->base_addr; 804 int ioaddr = dev->base_addr;
806 805
807 /* Transmitter timeout, serious problems. */ 806 /* Transmitter timeout, serious problems. */
808 printk(KERN_WARNING "%s: transmit timed out, Tx_status %2.2x status %4.4x " 807 pr_warning("%s: transmit timed out, Tx_status %2.2x status %4.4x Tx FIFO room %d.\n",
809 "Tx FIFO room %d.\n",
810 dev->name, inb(ioaddr + TX_STATUS), inw(ioaddr + EL3_STATUS), 808 dev->name, inb(ioaddr + TX_STATUS), inw(ioaddr + EL3_STATUS),
811 inw(ioaddr + TX_FREE)); 809 inw(ioaddr + TX_FREE));
812 dev->stats.tx_errors++; 810 dev->stats.tx_errors++;
@@ -830,7 +828,7 @@ el3_start_xmit(struct sk_buff *skb, struct net_device *dev)
830 dev->stats.tx_bytes += skb->len; 828 dev->stats.tx_bytes += skb->len;
831 829
832 if (el3_debug > 4) { 830 if (el3_debug > 4) {
833 printk(KERN_DEBUG "%s: el3_start_xmit(length = %u) called, status %4.4x.\n", 831 pr_debug("%s: el3_start_xmit(length = %u) called, status %4.4x.\n",
834 dev->name, skb->len, inw(ioaddr + EL3_STATUS)); 832 dev->name, skb->len, inw(ioaddr + EL3_STATUS));
835 } 833 }
836#if 0 834#if 0
@@ -839,7 +837,7 @@ el3_start_xmit(struct sk_buff *skb, struct net_device *dev)
839 ushort status = inw(ioaddr + EL3_STATUS); 837 ushort status = inw(ioaddr + EL3_STATUS);
840 if (status & 0x0001 /* IRQ line active, missed one. */ 838 if (status & 0x0001 /* IRQ line active, missed one. */
841 && inw(ioaddr + EL3_STATUS) & 1) { /* Make sure. */ 839 && inw(ioaddr + EL3_STATUS) & 1) { /* Make sure. */
842 printk(KERN_DEBUG "%s: Missed interrupt, status then %04x now %04x" 840 pr_debug("%s: Missed interrupt, status then %04x now %04x"
843 " Tx %2.2x Rx %4.4x.\n", dev->name, status, 841 " Tx %2.2x Rx %4.4x.\n", dev->name, status,
844 inw(ioaddr + EL3_STATUS), inb(ioaddr + TX_STATUS), 842 inw(ioaddr + EL3_STATUS), inb(ioaddr + TX_STATUS),
845 inw(ioaddr + RX_STATUS)); 843 inw(ioaddr + RX_STATUS));
@@ -913,7 +911,7 @@ el3_interrupt(int irq, void *dev_id)
913 911
914 if (el3_debug > 4) { 912 if (el3_debug > 4) {
915 status = inw(ioaddr + EL3_STATUS); 913 status = inw(ioaddr + EL3_STATUS);
916 printk(KERN_DEBUG "%s: interrupt, status %4.4x.\n", dev->name, status); 914 pr_debug("%s: interrupt, status %4.4x.\n", dev->name, status);
917 } 915 }
918 916
919 while ((status = inw(ioaddr + EL3_STATUS)) & 917 while ((status = inw(ioaddr + EL3_STATUS)) &
@@ -924,7 +922,7 @@ el3_interrupt(int irq, void *dev_id)
924 922
925 if (status & TxAvailable) { 923 if (status & TxAvailable) {
926 if (el3_debug > 5) 924 if (el3_debug > 5)
927 printk(KERN_DEBUG " TX room bit was handled.\n"); 925 pr_debug(" TX room bit was handled.\n");
928 /* There's room in the FIFO for a full-sized packet. */ 926 /* There's room in the FIFO for a full-sized packet. */
929 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD); 927 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
930 netif_wake_queue (dev); 928 netif_wake_queue (dev);
@@ -962,7 +960,7 @@ el3_interrupt(int irq, void *dev_id)
962 } 960 }
963 961
964 if (--i < 0) { 962 if (--i < 0) {
965 printk(KERN_ERR "%s: Infinite loop in interrupt, status %4.4x.\n", 963 pr_err("%s: Infinite loop in interrupt, status %4.4x.\n",
966 dev->name, status); 964 dev->name, status);
967 /* Clear all interrupts. */ 965 /* Clear all interrupts. */
968 outw(AckIntr | 0xFF, ioaddr + EL3_CMD); 966 outw(AckIntr | 0xFF, ioaddr + EL3_CMD);
@@ -973,7 +971,7 @@ el3_interrupt(int irq, void *dev_id)
973 } 971 }
974 972
975 if (el3_debug > 4) { 973 if (el3_debug > 4) {
976 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n", dev->name, 974 pr_debug("%s: exiting interrupt, status %4.4x.\n", dev->name,
977 inw(ioaddr + EL3_STATUS)); 975 inw(ioaddr + EL3_STATUS));
978 } 976 }
979 spin_unlock(&lp->lock); 977 spin_unlock(&lp->lock);
@@ -1021,7 +1019,7 @@ static void update_stats(struct net_device *dev)
1021 int ioaddr = dev->base_addr; 1019 int ioaddr = dev->base_addr;
1022 1020
1023 if (el3_debug > 5) 1021 if (el3_debug > 5)
1024 printk(" Updating the statistics.\n"); 1022 pr_debug(" Updating the statistics.\n");
1025 /* Turn off statistics updates while reading. */ 1023 /* Turn off statistics updates while reading. */
1026 outw(StatsDisable, ioaddr + EL3_CMD); 1024 outw(StatsDisable, ioaddr + EL3_CMD);
1027 /* Switch to the stats window, and read everything. */ 1025 /* Switch to the stats window, and read everything. */
@@ -1051,7 +1049,7 @@ el3_rx(struct net_device *dev)
1051 short rx_status; 1049 short rx_status;
1052 1050
1053 if (el3_debug > 5) 1051 if (el3_debug > 5)
1054 printk(" In rx_packet(), status %4.4x, rx_status %4.4x.\n", 1052 pr_debug(" In rx_packet(), status %4.4x, rx_status %4.4x.\n",
1055 inw(ioaddr+EL3_STATUS), inw(ioaddr+RX_STATUS)); 1053 inw(ioaddr+EL3_STATUS), inw(ioaddr+RX_STATUS));
1056 while ((rx_status = inw(ioaddr + RX_STATUS)) > 0) { 1054 while ((rx_status = inw(ioaddr + RX_STATUS)) > 0) {
1057 if (rx_status & 0x4000) { /* Error, update stats. */ 1055 if (rx_status & 0x4000) { /* Error, update stats. */
@@ -1073,7 +1071,7 @@ el3_rx(struct net_device *dev)
1073 1071
1074 skb = dev_alloc_skb(pkt_len+5); 1072 skb = dev_alloc_skb(pkt_len+5);
1075 if (el3_debug > 4) 1073 if (el3_debug > 4)
1076 printk("Receiving packet size %d status %4.4x.\n", 1074 pr_debug("Receiving packet size %d status %4.4x.\n",
1077 pkt_len, rx_status); 1075 pkt_len, rx_status);
1078 if (skb != NULL) { 1076 if (skb != NULL) {
1079 skb_reserve(skb, 2); /* Align IP on 16 byte */ 1077 skb_reserve(skb, 2); /* Align IP on 16 byte */
@@ -1092,12 +1090,12 @@ el3_rx(struct net_device *dev)
1092 outw(RxDiscard, ioaddr + EL3_CMD); 1090 outw(RxDiscard, ioaddr + EL3_CMD);
1093 dev->stats.rx_dropped++; 1091 dev->stats.rx_dropped++;
1094 if (el3_debug) 1092 if (el3_debug)
1095 printk("%s: Couldn't allocate a sk_buff of size %d.\n", 1093 pr_debug("%s: Couldn't allocate a sk_buff of size %d.\n",
1096 dev->name, pkt_len); 1094 dev->name, pkt_len);
1097 } 1095 }
1098 inw(ioaddr + EL3_STATUS); /* Delay. */ 1096 inw(ioaddr + EL3_STATUS); /* Delay. */
1099 while (inw(ioaddr + EL3_STATUS) & 0x1000) 1097 while (inw(ioaddr + EL3_STATUS) & 0x1000)
1100 printk(KERN_DEBUG " Waiting for 3c509 to discard packet, status %x.\n", 1098 pr_debug(" Waiting for 3c509 to discard packet, status %x.\n",
1101 inw(ioaddr + EL3_STATUS) ); 1099 inw(ioaddr + EL3_STATUS) );
1102 } 1100 }
1103 1101
@@ -1118,7 +1116,7 @@ set_multicast_list(struct net_device *dev)
1118 static int old; 1116 static int old;
1119 if (old != dev->mc_count) { 1117 if (old != dev->mc_count) {
1120 old = dev->mc_count; 1118 old = dev->mc_count;
1121 printk("%s: Setting Rx mode to %d addresses.\n", dev->name, dev->mc_count); 1119 pr_debug("%s: Setting Rx mode to %d addresses.\n", dev->name, dev->mc_count);
1122 } 1120 }
1123 } 1121 }
1124 spin_lock_irqsave(&lp->lock, flags); 1122 spin_lock_irqsave(&lp->lock, flags);
@@ -1141,7 +1139,7 @@ el3_close(struct net_device *dev)
1141 struct el3_private *lp = netdev_priv(dev); 1139 struct el3_private *lp = netdev_priv(dev);
1142 1140
1143 if (el3_debug > 2) 1141 if (el3_debug > 2)
1144 printk("%s: Shutting down ethercard.\n", dev->name); 1142 pr_debug("%s: Shutting down ethercard.\n", dev->name);
1145 1143
1146 el3_down(dev); 1144 el3_down(dev);
1147 1145
@@ -1388,30 +1386,30 @@ el3_up(struct net_device *dev)
1388 EL3WINDOW(4); 1386 EL3WINDOW(4);
1389 net_diag = inw(ioaddr + WN4_NETDIAG); 1387 net_diag = inw(ioaddr + WN4_NETDIAG);
1390 net_diag = (net_diag | FD_ENABLE); /* temporarily assume full-duplex will be set */ 1388 net_diag = (net_diag | FD_ENABLE); /* temporarily assume full-duplex will be set */
1391 printk("%s: ", dev->name); 1389 pr_info("%s: ", dev->name);
1392 switch (dev->if_port & 0x0c) { 1390 switch (dev->if_port & 0x0c) {
1393 case 12: 1391 case 12:
1394 /* force full-duplex mode if 3c5x9b */ 1392 /* force full-duplex mode if 3c5x9b */
1395 if (sw_info & 0x000f) { 1393 if (sw_info & 0x000f) {
1396 printk("Forcing 3c5x9b full-duplex mode"); 1394 pr_cont("Forcing 3c5x9b full-duplex mode");
1397 break; 1395 break;
1398 } 1396 }
1399 case 8: 1397 case 8:
1400 /* set full-duplex mode based on eeprom config setting */ 1398 /* set full-duplex mode based on eeprom config setting */
1401 if ((sw_info & 0x000f) && (sw_info & 0x8000)) { 1399 if ((sw_info & 0x000f) && (sw_info & 0x8000)) {
1402 printk("Setting 3c5x9b full-duplex mode (from EEPROM configuration bit)"); 1400 pr_cont("Setting 3c5x9b full-duplex mode (from EEPROM configuration bit)");
1403 break; 1401 break;
1404 } 1402 }
1405 default: 1403 default:
1406 /* xcvr=(0 || 4) OR user has an old 3c5x9 non "B" model */ 1404 /* xcvr=(0 || 4) OR user has an old 3c5x9 non "B" model */
1407 printk("Setting 3c5x9/3c5x9B half-duplex mode"); 1405 pr_cont("Setting 3c5x9/3c5x9B half-duplex mode");
1408 net_diag = (net_diag & ~FD_ENABLE); /* disable full duplex */ 1406 net_diag = (net_diag & ~FD_ENABLE); /* disable full duplex */
1409 } 1407 }
1410 1408
1411 outw(net_diag, ioaddr + WN4_NETDIAG); 1409 outw(net_diag, ioaddr + WN4_NETDIAG);
1412 printk(" if_port: %d, sw_info: %4.4x\n", dev->if_port, sw_info); 1410 pr_cont(" if_port: %d, sw_info: %4.4x\n", dev->if_port, sw_info);
1413 if (el3_debug > 3) 1411 if (el3_debug > 3)
1414 printk("%s: 3c5x9 net diag word is now: %4.4x.\n", dev->name, net_diag); 1412 pr_debug("%s: 3c5x9 net diag word is now: %4.4x.\n", dev->name, net_diag);
1415 /* Enable link beat and jabber check. */ 1413 /* Enable link beat and jabber check. */
1416 outw(inw(ioaddr + WN4_MEDIA) | MEDIA_TP, ioaddr + WN4_MEDIA); 1414 outw(inw(ioaddr + WN4_MEDIA) | MEDIA_TP, ioaddr + WN4_MEDIA);
1417 } 1415 }
@@ -1455,7 +1453,7 @@ el3_suspend(struct device *pdev, pm_message_t state)
1455 struct el3_private *lp; 1453 struct el3_private *lp;
1456 int ioaddr; 1454 int ioaddr;
1457 1455
1458 dev = pdev->driver_data; 1456 dev = dev_get_drvdata(pdev);
1459 lp = netdev_priv(dev); 1457 lp = netdev_priv(dev);
1460 ioaddr = dev->base_addr; 1458 ioaddr = dev->base_addr;
1461 1459
@@ -1479,7 +1477,7 @@ el3_resume(struct device *pdev)
1479 struct el3_private *lp; 1477 struct el3_private *lp;
1480 int ioaddr; 1478 int ioaddr;
1481 1479
1482 dev = pdev->driver_data; 1480 dev = dev_get_drvdata(pdev);
1483 lp = netdev_priv(dev); 1481 lp = netdev_priv(dev);
1484 ioaddr = dev->base_addr; 1482 ioaddr = dev->base_addr;
1485 1483
@@ -1539,7 +1537,7 @@ static int __init el3_init_module(void)
1539 } 1537 }
1540 if (id_port >= 0x200) { 1538 if (id_port >= 0x200) {
1541 id_port = 0; 1539 id_port = 0;
1542 printk(KERN_ERR "No I/O port available for 3c509 activation.\n"); 1540 pr_err("No I/O port available for 3c509 activation.\n");
1543 } else { 1541 } else {
1544 ret = isa_register_driver(&el3_isa_driver, EL3_MAX_CARDS); 1542 ret = isa_register_driver(&el3_isa_driver, EL3_MAX_CARDS);
1545 if (!ret) 1543 if (!ret)
diff --git a/drivers/net/3c515.c b/drivers/net/3c515.c
index 167bf23066ea..7fd0ff743757 100644
--- a/drivers/net/3c515.c
+++ b/drivers/net/3c515.c
@@ -420,7 +420,7 @@ int init_module(void)
420 if (debug >= 0) 420 if (debug >= 0)
421 corkscrew_debug = debug; 421 corkscrew_debug = debug;
422 if (corkscrew_debug) 422 if (corkscrew_debug)
423 printk(version); 423 pr_debug("%s", version);
424 while (corkscrew_scan(-1)) 424 while (corkscrew_scan(-1))
425 found++; 425 found++;
426 return found ? 0 : -ENODEV; 426 return found ? 0 : -ENODEV;
@@ -437,7 +437,7 @@ struct net_device *tc515_probe(int unit)
437 437
438 if (corkscrew_debug > 0 && !printed) { 438 if (corkscrew_debug > 0 && !printed) {
439 printed = 1; 439 printed = 1;
440 printk(version); 440 pr_debug("%s", version);
441 } 441 }
442 442
443 return dev; 443 return dev;
@@ -516,7 +516,7 @@ static struct net_device *corkscrew_scan(int unit)
516 if (pnp_device_attach(idev) < 0) 516 if (pnp_device_attach(idev) < 0)
517 continue; 517 continue;
518 if (pnp_activate_dev(idev) < 0) { 518 if (pnp_activate_dev(idev) < 0) {
519 printk("pnp activate failed (out of resources?)\n"); 519 pr_warning("pnp activate failed (out of resources?)\n");
520 pnp_device_detach(idev); 520 pnp_device_detach(idev);
521 continue; 521 continue;
522 } 522 }
@@ -531,9 +531,9 @@ static struct net_device *corkscrew_scan(int unit)
531 continue; 531 continue;
532 } 532 }
533 if(corkscrew_debug) 533 if(corkscrew_debug)
534 printk ("ISAPNP reports %s at i/o 0x%x, irq %d\n", 534 pr_debug("ISAPNP reports %s at i/o 0x%x, irq %d\n",
535 (char*) corkscrew_isapnp_adapters[i].driver_data, ioaddr, irq); 535 (char*) corkscrew_isapnp_adapters[i].driver_data, ioaddr, irq);
536 printk(KERN_INFO "3c515 Resource configuration register %#4.4x, DCR %4.4x.\n", 536 pr_info("3c515 Resource configuration register %#4.4x, DCR %4.4x.\n",
537 inl(ioaddr + 0x2002), inw(ioaddr + 0x2000)); 537 inl(ioaddr + 0x2002), inw(ioaddr + 0x2000));
538 /* irq = inw(ioaddr + 0x2002) & 15; */ /* Use the irq from isapnp */ 538 /* irq = inw(ioaddr + 0x2002) & 15; */ /* Use the irq from isapnp */
539 SET_NETDEV_DEV(dev, &idev->dev); 539 SET_NETDEV_DEV(dev, &idev->dev);
@@ -552,7 +552,7 @@ no_pnp:
552 if (!check_device(ioaddr)) 552 if (!check_device(ioaddr))
553 continue; 553 continue;
554 554
555 printk(KERN_INFO "3c515 Resource configuration register %#4.4x, DCR %4.4x.\n", 555 pr_info("3c515 Resource configuration register %#4.4x, DCR %4.4x.\n",
556 inl(ioaddr + 0x2002), inw(ioaddr + 0x2000)); 556 inl(ioaddr + 0x2002), inw(ioaddr + 0x2000));
557 err = corkscrew_setup(dev, ioaddr, NULL, cards_found++); 557 err = corkscrew_setup(dev, ioaddr, NULL, cards_found++);
558 if (!err) 558 if (!err)
@@ -625,7 +625,7 @@ static int corkscrew_setup(struct net_device *dev, int ioaddr,
625 list_add(&vp->list, &root_corkscrew_dev); 625 list_add(&vp->list, &root_corkscrew_dev);
626#endif 626#endif
627 627
628 printk(KERN_INFO "%s: 3Com %s at %#3x,", dev->name, vp->product_name, ioaddr); 628 pr_info("%s: 3Com %s at %#3x,", dev->name, vp->product_name, ioaddr);
629 629
630 spin_lock_init(&vp->lock); 630 spin_lock_init(&vp->lock);
631 631
@@ -648,19 +648,19 @@ static int corkscrew_setup(struct net_device *dev, int ioaddr,
648 } 648 }
649 checksum = (checksum ^ (checksum >> 8)) & 0xff; 649 checksum = (checksum ^ (checksum >> 8)) & 0xff;
650 if (checksum != 0x00) 650 if (checksum != 0x00)
651 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum); 651 pr_cont(" ***INVALID CHECKSUM %4.4x*** ", checksum);
652 printk(" %pM", dev->dev_addr); 652 pr_cont(" %pM", dev->dev_addr);
653 if (eeprom[16] == 0x11c7) { /* Corkscrew */ 653 if (eeprom[16] == 0x11c7) { /* Corkscrew */
654 if (request_dma(dev->dma, "3c515")) { 654 if (request_dma(dev->dma, "3c515")) {
655 printk(", DMA %d allocation failed", dev->dma); 655 pr_cont(", DMA %d allocation failed", dev->dma);
656 dev->dma = 0; 656 dev->dma = 0;
657 } else 657 } else
658 printk(", DMA %d", dev->dma); 658 pr_cont(", DMA %d", dev->dma);
659 } 659 }
660 printk(", IRQ %d\n", dev->irq); 660 pr_cont(", IRQ %d\n", dev->irq);
661 /* Tell them about an invalid IRQ. */ 661 /* Tell them about an invalid IRQ. */
662 if (corkscrew_debug && (dev->irq <= 0 || dev->irq > 15)) 662 if (corkscrew_debug && (dev->irq <= 0 || dev->irq > 15))
663 printk(KERN_WARNING " *** Warning: this IRQ is unlikely to work! ***\n"); 663 pr_warning(" *** Warning: this IRQ is unlikely to work! ***\n");
664 664
665 { 665 {
666 char *ram_split[] = { "5:3", "3:1", "1:1", "3:5" }; 666 char *ram_split[] = { "5:3", "3:1", "1:1", "3:5" };
@@ -669,9 +669,9 @@ static int corkscrew_setup(struct net_device *dev, int ioaddr,
669 vp->available_media = inw(ioaddr + Wn3_Options); 669 vp->available_media = inw(ioaddr + Wn3_Options);
670 config = inl(ioaddr + Wn3_Config); 670 config = inl(ioaddr + Wn3_Config);
671 if (corkscrew_debug > 1) 671 if (corkscrew_debug > 1)
672 printk(KERN_INFO " Internal config register is %4.4x, transceivers %#x.\n", 672 pr_info(" Internal config register is %4.4x, transceivers %#x.\n",
673 config, inw(ioaddr + Wn3_Options)); 673 config, inw(ioaddr + Wn3_Options));
674 printk(KERN_INFO " %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n", 674 pr_info(" %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
675 8 << config & Ram_size, 675 8 << config & Ram_size,
676 config & Ram_width ? "word" : "byte", 676 config & Ram_width ? "word" : "byte",
677 ram_split[(config & Ram_split) >> Ram_split_shift], 677 ram_split[(config & Ram_split) >> Ram_split_shift],
@@ -682,7 +682,7 @@ static int corkscrew_setup(struct net_device *dev, int ioaddr,
682 dev->if_port = vp->default_media; 682 dev->if_port = vp->default_media;
683 } 683 }
684 if (vp->media_override != 7) { 684 if (vp->media_override != 7) {
685 printk(KERN_INFO " Media override to transceiver type %d (%s).\n", 685 pr_info(" Media override to transceiver type %d (%s).\n",
686 vp->media_override, 686 vp->media_override,
687 media_tbl[vp->media_override].name); 687 media_tbl[vp->media_override].name);
688 dev->if_port = vp->media_override; 688 dev->if_port = vp->media_override;
@@ -718,7 +718,7 @@ static int corkscrew_open(struct net_device *dev)
718 718
719 if (vp->media_override != 7) { 719 if (vp->media_override != 7) {
720 if (corkscrew_debug > 1) 720 if (corkscrew_debug > 1)
721 printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n", 721 pr_info("%s: Media override to transceiver %d (%s).\n",
722 dev->name, vp->media_override, 722 dev->name, vp->media_override,
723 media_tbl[vp->media_override].name); 723 media_tbl[vp->media_override].name);
724 dev->if_port = vp->media_override; 724 dev->if_port = vp->media_override;
@@ -729,7 +729,7 @@ static int corkscrew_open(struct net_device *dev)
729 dev->if_port = media_tbl[dev->if_port].next; 729 dev->if_port = media_tbl[dev->if_port].next;
730 730
731 if (corkscrew_debug > 1) 731 if (corkscrew_debug > 1)
732 printk("%s: Initial media type %s.\n", 732 pr_debug("%s: Initial media type %s.\n",
733 dev->name, media_tbl[dev->if_port].name); 733 dev->name, media_tbl[dev->if_port].name);
734 734
735 init_timer(&vp->timer); 735 init_timer(&vp->timer);
@@ -744,7 +744,7 @@ static int corkscrew_open(struct net_device *dev)
744 outl(config, ioaddr + Wn3_Config); 744 outl(config, ioaddr + Wn3_Config);
745 745
746 if (corkscrew_debug > 1) { 746 if (corkscrew_debug > 1) {
747 printk("%s: corkscrew_open() InternalConfig %8.8x.\n", 747 pr_debug("%s: corkscrew_open() InternalConfig %8.8x.\n",
748 dev->name, config); 748 dev->name, config);
749 } 749 }
750 750
@@ -777,7 +777,7 @@ static int corkscrew_open(struct net_device *dev)
777 777
778 if (corkscrew_debug > 1) { 778 if (corkscrew_debug > 1) {
779 EL3WINDOW(4); 779 EL3WINDOW(4);
780 printk("%s: corkscrew_open() irq %d media status %4.4x.\n", 780 pr_debug("%s: corkscrew_open() irq %d media status %4.4x.\n",
781 dev->name, dev->irq, inw(ioaddr + Wn4_Media)); 781 dev->name, dev->irq, inw(ioaddr + Wn4_Media));
782 } 782 }
783 783
@@ -814,8 +814,7 @@ static int corkscrew_open(struct net_device *dev)
814 if (vp->full_bus_master_rx) { /* Boomerang bus master. */ 814 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
815 vp->cur_rx = vp->dirty_rx = 0; 815 vp->cur_rx = vp->dirty_rx = 0;
816 if (corkscrew_debug > 2) 816 if (corkscrew_debug > 2)
817 printk("%s: Filling in the Rx ring.\n", 817 pr_debug("%s: Filling in the Rx ring.\n", dev->name);
818 dev->name);
819 for (i = 0; i < RX_RING_SIZE; i++) { 818 for (i = 0; i < RX_RING_SIZE; i++) {
820 struct sk_buff *skb; 819 struct sk_buff *skb;
821 if (i < (RX_RING_SIZE - 1)) 820 if (i < (RX_RING_SIZE - 1))
@@ -877,7 +876,7 @@ static void corkscrew_timer(unsigned long data)
877 int ok = 0; 876 int ok = 0;
878 877
879 if (corkscrew_debug > 1) 878 if (corkscrew_debug > 1)
880 printk("%s: Media selection timer tick happened, %s.\n", 879 pr_debug("%s: Media selection timer tick happened, %s.\n",
881 dev->name, media_tbl[dev->if_port].name); 880 dev->name, media_tbl[dev->if_port].name);
882 881
883 spin_lock_irqsave(&vp->lock, flags); 882 spin_lock_irqsave(&vp->lock, flags);
@@ -894,12 +893,12 @@ static void corkscrew_timer(unsigned long data)
894 if (media_status & Media_LnkBeat) { 893 if (media_status & Media_LnkBeat) {
895 ok = 1; 894 ok = 1;
896 if (corkscrew_debug > 1) 895 if (corkscrew_debug > 1)
897 printk("%s: Media %s has link beat, %x.\n", 896 pr_debug("%s: Media %s has link beat, %x.\n",
898 dev->name, 897 dev->name,
899 media_tbl[dev->if_port].name, 898 media_tbl[dev->if_port].name,
900 media_status); 899 media_status);
901 } else if (corkscrew_debug > 1) 900 } else if (corkscrew_debug > 1)
902 printk("%s: Media %s is has no link beat, %x.\n", 901 pr_debug("%s: Media %s is has no link beat, %x.\n",
903 dev->name, 902 dev->name,
904 media_tbl[dev->if_port].name, 903 media_tbl[dev->if_port].name,
905 media_status); 904 media_status);
@@ -907,7 +906,7 @@ static void corkscrew_timer(unsigned long data)
907 break; 906 break;
908 default: /* Other media types handled by Tx timeouts. */ 907 default: /* Other media types handled by Tx timeouts. */
909 if (corkscrew_debug > 1) 908 if (corkscrew_debug > 1)
910 printk("%s: Media %s is has no indication, %x.\n", 909 pr_debug("%s: Media %s is has no indication, %x.\n",
911 dev->name, 910 dev->name,
912 media_tbl[dev->if_port].name, 911 media_tbl[dev->if_port].name,
913 media_status); 912 media_status);
@@ -925,12 +924,12 @@ static void corkscrew_timer(unsigned long data)
925 if (dev->if_port == 8) { /* Go back to default. */ 924 if (dev->if_port == 8) { /* Go back to default. */
926 dev->if_port = vp->default_media; 925 dev->if_port = vp->default_media;
927 if (corkscrew_debug > 1) 926 if (corkscrew_debug > 1)
928 printk("%s: Media selection failing, using default %s port.\n", 927 pr_debug("%s: Media selection failing, using default %s port.\n",
929 dev->name, 928 dev->name,
930 media_tbl[dev->if_port].name); 929 media_tbl[dev->if_port].name);
931 } else { 930 } else {
932 if (corkscrew_debug > 1) 931 if (corkscrew_debug > 1)
933 printk("%s: Media selection failed, now trying %s port.\n", 932 pr_debug("%s: Media selection failed, now trying %s port.\n",
934 dev->name, 933 dev->name,
935 media_tbl[dev->if_port].name); 934 media_tbl[dev->if_port].name);
936 vp->timer.expires = jiffies + media_tbl[dev->if_port].wait; 935 vp->timer.expires = jiffies + media_tbl[dev->if_port].wait;
@@ -953,7 +952,7 @@ static void corkscrew_timer(unsigned long data)
953 952
954 spin_unlock_irqrestore(&vp->lock, flags); 953 spin_unlock_irqrestore(&vp->lock, flags);
955 if (corkscrew_debug > 1) 954 if (corkscrew_debug > 1)
956 printk("%s: Media selection timer finished, %s.\n", 955 pr_debug("%s: Media selection timer finished, %s.\n",
957 dev->name, media_tbl[dev->if_port].name); 956 dev->name, media_tbl[dev->if_port].name);
958 957
959#endif /* AUTOMEDIA */ 958#endif /* AUTOMEDIA */
@@ -966,23 +965,21 @@ static void corkscrew_timeout(struct net_device *dev)
966 struct corkscrew_private *vp = netdev_priv(dev); 965 struct corkscrew_private *vp = netdev_priv(dev);
967 int ioaddr = dev->base_addr; 966 int ioaddr = dev->base_addr;
968 967
969 printk(KERN_WARNING 968 pr_warning("%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
970 "%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
971 dev->name, inb(ioaddr + TxStatus), 969 dev->name, inb(ioaddr + TxStatus),
972 inw(ioaddr + EL3_STATUS)); 970 inw(ioaddr + EL3_STATUS));
973 /* Slight code bloat to be user friendly. */ 971 /* Slight code bloat to be user friendly. */
974 if ((inb(ioaddr + TxStatus) & 0x88) == 0x88) 972 if ((inb(ioaddr + TxStatus) & 0x88) == 0x88)
975 printk(KERN_WARNING 973 pr_warning("%s: Transmitter encountered 16 collisions --"
976 "%s: Transmitter encountered 16 collisions -- network"
977 " network cable problem?\n", dev->name); 974 " network cable problem?\n", dev->name);
978#ifndef final_version 975#ifndef final_version
979 printk(" Flags; bus-master %d, full %d; dirty %d current %d.\n", 976 pr_debug(" Flags; bus-master %d, full %d; dirty %d current %d.\n",
980 vp->full_bus_master_tx, vp->tx_full, vp->dirty_tx, 977 vp->full_bus_master_tx, vp->tx_full, vp->dirty_tx,
981 vp->cur_tx); 978 vp->cur_tx);
982 printk(" Down list %8.8x vs. %p.\n", inl(ioaddr + DownListPtr), 979 pr_debug(" Down list %8.8x vs. %p.\n", inl(ioaddr + DownListPtr),
983 &vp->tx_ring[0]); 980 &vp->tx_ring[0]);
984 for (i = 0; i < TX_RING_SIZE; i++) { 981 for (i = 0; i < TX_RING_SIZE; i++) {
985 printk(" %d: %p length %8.8x status %8.8x\n", i, 982 pr_debug(" %d: %p length %8.8x status %8.8x\n", i,
986 &vp->tx_ring[i], 983 &vp->tx_ring[i],
987 vp->tx_ring[i].length, vp->tx_ring[i].status); 984 vp->tx_ring[i].length, vp->tx_ring[i].status);
988 } 985 }
@@ -1023,7 +1020,7 @@ static int corkscrew_start_xmit(struct sk_buff *skb,
1023 else 1020 else
1024 prev_entry = NULL; 1021 prev_entry = NULL;
1025 if (corkscrew_debug > 3) 1022 if (corkscrew_debug > 3)
1026 printk("%s: Trying to send a packet, Tx index %d.\n", 1023 pr_debug("%s: Trying to send a packet, Tx index %d.\n",
1027 dev->name, vp->cur_tx); 1024 dev->name, vp->cur_tx);
1028 /* vp->tx_full = 1; */ 1025 /* vp->tx_full = 1; */
1029 vp->tx_skbuff[entry] = skb; 1026 vp->tx_skbuff[entry] = skb;
@@ -1102,7 +1099,7 @@ static int corkscrew_start_xmit(struct sk_buff *skb,
1102 while (--i > 0 && (tx_status = inb(ioaddr + TxStatus)) > 0) { 1099 while (--i > 0 && (tx_status = inb(ioaddr + TxStatus)) > 0) {
1103 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */ 1100 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
1104 if (corkscrew_debug > 2) 1101 if (corkscrew_debug > 2)
1105 printk("%s: Tx error, status %2.2x.\n", 1102 pr_debug("%s: Tx error, status %2.2x.\n",
1106 dev->name, tx_status); 1103 dev->name, tx_status);
1107 if (tx_status & 0x04) 1104 if (tx_status & 0x04)
1108 dev->stats.tx_fifo_errors++; 1105 dev->stats.tx_fifo_errors++;
@@ -1143,7 +1140,7 @@ static irqreturn_t corkscrew_interrupt(int irq, void *dev_id)
1143 status = inw(ioaddr + EL3_STATUS); 1140 status = inw(ioaddr + EL3_STATUS);
1144 1141
1145 if (corkscrew_debug > 4) 1142 if (corkscrew_debug > 4)
1146 printk("%s: interrupt, status %4.4x, timer %d.\n", 1143 pr_debug("%s: interrupt, status %4.4x, timer %d.\n",
1147 dev->name, status, latency); 1144 dev->name, status, latency);
1148 if ((status & 0xE000) != 0xE000) { 1145 if ((status & 0xE000) != 0xE000) {
1149 static int donedidthis; 1146 static int donedidthis;
@@ -1151,7 +1148,7 @@ static irqreturn_t corkscrew_interrupt(int irq, void *dev_id)
1151 Ignore a single early interrupt, but don't hang the machine for 1148 Ignore a single early interrupt, but don't hang the machine for
1152 other interrupt problems. */ 1149 other interrupt problems. */
1153 if (donedidthis++ > 100) { 1150 if (donedidthis++ > 100) {
1154 printk(KERN_ERR "%s: Bogus interrupt, bailing. Status %4.4x, start=%d.\n", 1151 pr_err("%s: Bogus interrupt, bailing. Status %4.4x, start=%d.\n",
1155 dev->name, status, netif_running(dev)); 1152 dev->name, status, netif_running(dev));
1156 free_irq(dev->irq, dev); 1153 free_irq(dev->irq, dev);
1157 dev->irq = -1; 1154 dev->irq = -1;
@@ -1160,14 +1157,14 @@ static irqreturn_t corkscrew_interrupt(int irq, void *dev_id)
1160 1157
1161 do { 1158 do {
1162 if (corkscrew_debug > 5) 1159 if (corkscrew_debug > 5)
1163 printk("%s: In interrupt loop, status %4.4x.\n", 1160 pr_debug("%s: In interrupt loop, status %4.4x.\n",
1164 dev->name, status); 1161 dev->name, status);
1165 if (status & RxComplete) 1162 if (status & RxComplete)
1166 corkscrew_rx(dev); 1163 corkscrew_rx(dev);
1167 1164
1168 if (status & TxAvailable) { 1165 if (status & TxAvailable) {
1169 if (corkscrew_debug > 5) 1166 if (corkscrew_debug > 5)
1170 printk(" TX room bit was handled.\n"); 1167 pr_debug(" TX room bit was handled.\n");
1171 /* There's room in the FIFO for a full-sized packet. */ 1168 /* There's room in the FIFO for a full-sized packet. */
1172 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD); 1169 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
1173 netif_wake_queue(dev); 1170 netif_wake_queue(dev);
@@ -1212,19 +1209,20 @@ static irqreturn_t corkscrew_interrupt(int irq, void *dev_id)
1212 if (status & StatsFull) { /* Empty statistics. */ 1209 if (status & StatsFull) { /* Empty statistics. */
1213 static int DoneDidThat; 1210 static int DoneDidThat;
1214 if (corkscrew_debug > 4) 1211 if (corkscrew_debug > 4)
1215 printk("%s: Updating stats.\n", dev->name); 1212 pr_debug("%s: Updating stats.\n", dev->name);
1216 update_stats(ioaddr, dev); 1213 update_stats(ioaddr, dev);
1217 /* DEBUG HACK: Disable statistics as an interrupt source. */ 1214 /* DEBUG HACK: Disable statistics as an interrupt source. */
1218 /* This occurs when we have the wrong media type! */ 1215 /* This occurs when we have the wrong media type! */
1219 if (DoneDidThat == 0 && inw(ioaddr + EL3_STATUS) & StatsFull) { 1216 if (DoneDidThat == 0 && inw(ioaddr + EL3_STATUS) & StatsFull) {
1220 int win, reg; 1217 int win, reg;
1221 printk("%s: Updating stats failed, disabling stats as an" 1218 pr_notice("%s: Updating stats failed, disabling stats as an interrupt source.\n",
1222 " interrupt source.\n", dev->name); 1219 dev->name);
1223 for (win = 0; win < 8; win++) { 1220 for (win = 0; win < 8; win++) {
1224 EL3WINDOW(win); 1221 EL3WINDOW(win);
1225 printk("\n Vortex window %d:", win); 1222 pr_notice("Vortex window %d:", win);
1226 for (reg = 0; reg < 16; reg++) 1223 for (reg = 0; reg < 16; reg++)
1227 printk(" %2.2x", inb(ioaddr + reg)); 1224 pr_cont(" %2.2x", inb(ioaddr + reg));
1225 pr_cont("\n");
1228 } 1226 }
1229 EL3WINDOW(7); 1227 EL3WINDOW(7);
1230 outw(SetIntrEnb | TxAvailable | 1228 outw(SetIntrEnb | TxAvailable |
@@ -1246,9 +1244,8 @@ static irqreturn_t corkscrew_interrupt(int irq, void *dev_id)
1246 } 1244 }
1247 1245
1248 if (--i < 0) { 1246 if (--i < 0) {
1249 printk(KERN_ERR "%s: Too much work in interrupt, status %4.4x. " 1247 pr_err("%s: Too much work in interrupt, status %4.4x. Disabling functions (%4.4x).\n",
1250 "Disabling functions (%4.4x).\n", dev->name, 1248 dev->name, status, SetStatusEnb | ((~status) & 0x7FE));
1251 status, SetStatusEnb | ((~status) & 0x7FE));
1252 /* Disable all pending interrupts. */ 1249 /* Disable all pending interrupts. */
1253 outw(SetStatusEnb | ((~status) & 0x7FE), ioaddr + EL3_CMD); 1250 outw(SetStatusEnb | ((~status) & 0x7FE), ioaddr + EL3_CMD);
1254 outw(AckIntr | 0x7FF, ioaddr + EL3_CMD); 1251 outw(AckIntr | 0x7FF, ioaddr + EL3_CMD);
@@ -1262,7 +1259,7 @@ static irqreturn_t corkscrew_interrupt(int irq, void *dev_id)
1262 spin_unlock(&lp->lock); 1259 spin_unlock(&lp->lock);
1263 1260
1264 if (corkscrew_debug > 4) 1261 if (corkscrew_debug > 4)
1265 printk("%s: exiting interrupt, status %4.4x.\n", dev->name, status); 1262 pr_debug("%s: exiting interrupt, status %4.4x.\n", dev->name, status);
1266 return IRQ_HANDLED; 1263 return IRQ_HANDLED;
1267} 1264}
1268 1265
@@ -1273,13 +1270,13 @@ static int corkscrew_rx(struct net_device *dev)
1273 short rx_status; 1270 short rx_status;
1274 1271
1275 if (corkscrew_debug > 5) 1272 if (corkscrew_debug > 5)
1276 printk(" In rx_packet(), status %4.4x, rx_status %4.4x.\n", 1273 pr_debug(" In rx_packet(), status %4.4x, rx_status %4.4x.\n",
1277 inw(ioaddr + EL3_STATUS), inw(ioaddr + RxStatus)); 1274 inw(ioaddr + EL3_STATUS), inw(ioaddr + RxStatus));
1278 while ((rx_status = inw(ioaddr + RxStatus)) > 0) { 1275 while ((rx_status = inw(ioaddr + RxStatus)) > 0) {
1279 if (rx_status & 0x4000) { /* Error, update stats. */ 1276 if (rx_status & 0x4000) { /* Error, update stats. */
1280 unsigned char rx_error = inb(ioaddr + RxErrors); 1277 unsigned char rx_error = inb(ioaddr + RxErrors);
1281 if (corkscrew_debug > 2) 1278 if (corkscrew_debug > 2)
1282 printk(" Rx error: status %2.2x.\n", 1279 pr_debug(" Rx error: status %2.2x.\n",
1283 rx_error); 1280 rx_error);
1284 dev->stats.rx_errors++; 1281 dev->stats.rx_errors++;
1285 if (rx_error & 0x01) 1282 if (rx_error & 0x01)
@@ -1299,7 +1296,7 @@ static int corkscrew_rx(struct net_device *dev)
1299 1296
1300 skb = dev_alloc_skb(pkt_len + 5 + 2); 1297 skb = dev_alloc_skb(pkt_len + 5 + 2);
1301 if (corkscrew_debug > 4) 1298 if (corkscrew_debug > 4)
1302 printk("Receiving packet size %d status %4.4x.\n", 1299 pr_debug("Receiving packet size %d status %4.4x.\n",
1303 pkt_len, rx_status); 1300 pkt_len, rx_status);
1304 if (skb != NULL) { 1301 if (skb != NULL) {
1305 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ 1302 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
@@ -1318,7 +1315,7 @@ static int corkscrew_rx(struct net_device *dev)
1318 break; 1315 break;
1319 continue; 1316 continue;
1320 } else if (corkscrew_debug) 1317 } else if (corkscrew_debug)
1321 printk("%s: Couldn't allocate a sk_buff of size %d.\n", dev->name, pkt_len); 1318 pr_debug("%s: Couldn't allocate a sk_buff of size %d.\n", dev->name, pkt_len);
1322 } 1319 }
1323 outw(RxDiscard, ioaddr + EL3_CMD); 1320 outw(RxDiscard, ioaddr + EL3_CMD);
1324 dev->stats.rx_dropped++; 1321 dev->stats.rx_dropped++;
@@ -1338,13 +1335,13 @@ static int boomerang_rx(struct net_device *dev)
1338 int rx_status; 1335 int rx_status;
1339 1336
1340 if (corkscrew_debug > 5) 1337 if (corkscrew_debug > 5)
1341 printk(" In boomerang_rx(), status %4.4x, rx_status %4.4x.\n", 1338 pr_debug(" In boomerang_rx(), status %4.4x, rx_status %4.4x.\n",
1342 inw(ioaddr + EL3_STATUS), inw(ioaddr + RxStatus)); 1339 inw(ioaddr + EL3_STATUS), inw(ioaddr + RxStatus));
1343 while ((rx_status = vp->rx_ring[entry].status) & RxDComplete) { 1340 while ((rx_status = vp->rx_ring[entry].status) & RxDComplete) {
1344 if (rx_status & RxDError) { /* Error, update stats. */ 1341 if (rx_status & RxDError) { /* Error, update stats. */
1345 unsigned char rx_error = rx_status >> 16; 1342 unsigned char rx_error = rx_status >> 16;
1346 if (corkscrew_debug > 2) 1343 if (corkscrew_debug > 2)
1347 printk(" Rx error: status %2.2x.\n", 1344 pr_debug(" Rx error: status %2.2x.\n",
1348 rx_error); 1345 rx_error);
1349 dev->stats.rx_errors++; 1346 dev->stats.rx_errors++;
1350 if (rx_error & 0x01) 1347 if (rx_error & 0x01)
@@ -1364,7 +1361,7 @@ static int boomerang_rx(struct net_device *dev)
1364 1361
1365 dev->stats.rx_bytes += pkt_len; 1362 dev->stats.rx_bytes += pkt_len;
1366 if (corkscrew_debug > 4) 1363 if (corkscrew_debug > 4)
1367 printk("Receiving packet size %d status %4.4x.\n", 1364 pr_debug("Receiving packet size %d status %4.4x.\n",
1368 pkt_len, rx_status); 1365 pkt_len, rx_status);
1369 1366
1370 /* Check if the packet is long enough to just accept without 1367 /* Check if the packet is long enough to just accept without
@@ -1385,7 +1382,7 @@ static int boomerang_rx(struct net_device *dev)
1385 temp = skb_put(skb, pkt_len); 1382 temp = skb_put(skb, pkt_len);
1386 /* Remove this checking code for final release. */ 1383 /* Remove this checking code for final release. */
1387 if (isa_bus_to_virt(vp->rx_ring[entry].addr) != temp) 1384 if (isa_bus_to_virt(vp->rx_ring[entry].addr) != temp)
1388 printk("%s: Warning -- the skbuff addresses do not match" 1385 pr_warning("%s: Warning -- the skbuff addresses do not match"
1389 " in boomerang_rx: %p vs. %p / %p.\n", 1386 " in boomerang_rx: %p vs. %p / %p.\n",
1390 dev->name, 1387 dev->name,
1391 isa_bus_to_virt(vp-> 1388 isa_bus_to_virt(vp->
@@ -1427,12 +1424,11 @@ static int corkscrew_close(struct net_device *dev)
1427 netif_stop_queue(dev); 1424 netif_stop_queue(dev);
1428 1425
1429 if (corkscrew_debug > 1) { 1426 if (corkscrew_debug > 1) {
1430 printk("%s: corkscrew_close() status %4.4x, Tx status %2.2x.\n", 1427 pr_debug("%s: corkscrew_close() status %4.4x, Tx status %2.2x.\n",
1431 dev->name, inw(ioaddr + EL3_STATUS), 1428 dev->name, inw(ioaddr + EL3_STATUS),
1432 inb(ioaddr + TxStatus)); 1429 inb(ioaddr + TxStatus));
1433 printk("%s: corkscrew close stats: rx_nocopy %d rx_copy %d" 1430 pr_debug("%s: corkscrew close stats: rx_nocopy %d rx_copy %d tx_queued %d.\n",
1434 " tx_queued %d.\n", dev->name, rx_nocopy, rx_copy, 1431 dev->name, rx_nocopy, rx_copy, queued_packet);
1435 queued_packet);
1436 } 1432 }
1437 1433
1438 del_timer(&vp->timer); 1434 del_timer(&vp->timer);
@@ -1534,7 +1530,7 @@ static void set_rx_mode(struct net_device *dev)
1534 1530
1535 if (dev->flags & IFF_PROMISC) { 1531 if (dev->flags & IFF_PROMISC) {
1536 if (corkscrew_debug > 3) 1532 if (corkscrew_debug > 3)
1537 printk("%s: Setting promiscuous mode.\n", 1533 pr_debug("%s: Setting promiscuous mode.\n",
1538 dev->name); 1534 dev->name);
1539 new_mode = SetRxFilter | RxStation | RxMulticast | RxBroadcast | RxProm; 1535 new_mode = SetRxFilter | RxStation | RxMulticast | RxBroadcast | RxProm;
1540 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) { 1536 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) {
diff --git a/drivers/net/3c523.c b/drivers/net/3c523.c
index 8f734d74b513..cdd955c4014c 100644
--- a/drivers/net/3c523.c
+++ b/drivers/net/3c523.c
@@ -176,7 +176,7 @@ sizeof(nop_cmd) = 8;
176 if(!p->scb->cmd) break; \ 176 if(!p->scb->cmd) break; \
177 DELAY_16(); \ 177 DELAY_16(); \
178 if(i == 1023) { \ 178 if(i == 1023) { \
179 printk(KERN_WARNING "%s:%d: scb_cmd timed out .. resetting i82586\n",\ 179 pr_warning("%s:%d: scb_cmd timed out .. resetting i82586\n",\
180 dev->name,__LINE__); \ 180 dev->name,__LINE__); \
181 elmc_id_reset586(); } } } 181 elmc_id_reset586(); } } }
182 182
@@ -291,7 +291,7 @@ static int elmc_open(struct net_device *dev)
291 ret = request_irq(dev->irq, &elmc_interrupt, IRQF_SHARED | IRQF_SAMPLE_RANDOM, 291 ret = request_irq(dev->irq, &elmc_interrupt, IRQF_SHARED | IRQF_SAMPLE_RANDOM,
292 dev->name, dev); 292 dev->name, dev);
293 if (ret) { 293 if (ret) {
294 printk(KERN_ERR "%s: couldn't get irq %d\n", dev->name, dev->irq); 294 pr_err("%s: couldn't get irq %d\n", dev->name, dev->irq);
295 elmc_id_reset586(); 295 elmc_id_reset586();
296 return ret; 296 return ret;
297 } 297 }
@@ -371,9 +371,9 @@ static void alloc586(struct net_device *dev)
371 371
372 DELAY(2); 372 DELAY(2);
373 373
374 if (p->iscp->busy) { 374 if (p->iscp->busy)
375 printk(KERN_ERR "%s: Init-Problems (alloc).\n", dev->name); 375 pr_err("%s: Init-Problems (alloc).\n", dev->name);
376 } 376
377 memset((char *) p->scb, 0, sizeof(struct scb_struct)); 377 memset((char *) p->scb, 0, sizeof(struct scb_struct));
378} 378}
379 379
@@ -470,7 +470,7 @@ static int __init do_elmc_probe(struct net_device *dev)
470 mca_set_adapter_procfn(slot, (MCA_ProcFn) elmc_getinfo, dev); 470 mca_set_adapter_procfn(slot, (MCA_ProcFn) elmc_getinfo, dev);
471 471
472 /* if we get this far, adapter has been found - carry on */ 472 /* if we get this far, adapter has been found - carry on */
473 printk(KERN_INFO "%s: 3c523 adapter found in slot %d\n", dev->name, slot + 1); 473 pr_info("%s: 3c523 adapter found in slot %d\n", dev->name, slot + 1);
474 474
475 /* Now we extract configuration info from the card. 475 /* Now we extract configuration info from the card.
476 The 3c523 provides information in two of the POS registers, but 476 The 3c523 provides information in two of the POS registers, but
@@ -507,7 +507,7 @@ static int __init do_elmc_probe(struct net_device *dev)
507 memset(pr, 0, sizeof(struct priv)); 507 memset(pr, 0, sizeof(struct priv));
508 pr->slot = slot; 508 pr->slot = slot;
509 509
510 printk(KERN_INFO "%s: 3Com 3c523 Rev 0x%x at %#lx\n", dev->name, (int) revision, 510 pr_info("%s: 3Com 3c523 Rev 0x%x at %#lx\n", dev->name, (int) revision,
511 dev->base_addr); 511 dev->base_addr);
512 512
513 /* Determine if we're using the on-board transceiver (i.e. coax) or 513 /* Determine if we're using the on-board transceiver (i.e. coax) or
@@ -529,7 +529,7 @@ static int __init do_elmc_probe(struct net_device *dev)
529 529
530 size = 0x4000; /* check for 16K mem */ 530 size = 0x4000; /* check for 16K mem */
531 if (!check586(dev, dev->mem_start, size)) { 531 if (!check586(dev, dev->mem_start, size)) {
532 printk(KERN_ERR "%s: memprobe, Can't find memory at 0x%lx!\n", dev->name, 532 pr_err("%s: memprobe, Can't find memory at 0x%lx!\n", dev->name,
533 dev->mem_start); 533 dev->mem_start);
534 retval = -ENODEV; 534 retval = -ENODEV;
535 goto err_out; 535 goto err_out;
@@ -546,7 +546,7 @@ static int __init do_elmc_probe(struct net_device *dev)
546 pr->num_recv_buffs = NUM_RECV_BUFFS_16; 546 pr->num_recv_buffs = NUM_RECV_BUFFS_16;
547 547
548 /* dump all the assorted information */ 548 /* dump all the assorted information */
549 printk(KERN_INFO "%s: IRQ %d, %sternal xcvr, memory %#lx-%#lx.\n", dev->name, 549 pr_info("%s: IRQ %d, %sternal xcvr, memory %#lx-%#lx.\n", dev->name,
550 dev->irq, dev->if_port ? "ex" : "in", 550 dev->irq, dev->if_port ? "ex" : "in",
551 dev->mem_start, dev->mem_end - 1); 551 dev->mem_start, dev->mem_end - 1);
552 552
@@ -555,7 +555,7 @@ static int __init do_elmc_probe(struct net_device *dev)
555 for (i = 0; i < 6; i++) 555 for (i = 0; i < 6; i++)
556 dev->dev_addr[i] = inb(dev->base_addr + i); 556 dev->dev_addr[i] = inb(dev->base_addr + i);
557 557
558 printk(KERN_INFO "%s: hardware address %pM\n", 558 pr_info("%s: hardware address %pM\n",
559 dev->name, dev->dev_addr); 559 dev->name, dev->dev_addr);
560 560
561 dev->netdev_ops = &netdev_ops; 561 dev->netdev_ops = &netdev_ops;
@@ -660,7 +660,7 @@ static int init586(struct net_device *dev)
660 } 660 }
661 661
662 if ((cfg_cmd->cmd_status & (STAT_OK | STAT_COMPL)) != (STAT_COMPL | STAT_OK)) { 662 if ((cfg_cmd->cmd_status & (STAT_OK | STAT_COMPL)) != (STAT_COMPL | STAT_OK)) {
663 printk(KERN_WARNING "%s (elmc): configure command failed: %x\n", dev->name, cfg_cmd->cmd_status); 663 pr_warning("%s (elmc): configure command failed: %x\n", dev->name, cfg_cmd->cmd_status);
664 return 1; 664 return 1;
665 } 665 }
666 /* 666 /*
@@ -686,7 +686,8 @@ static int init586(struct net_device *dev)
686 } 686 }
687 687
688 if ((ias_cmd->cmd_status & (STAT_OK | STAT_COMPL)) != (STAT_OK | STAT_COMPL)) { 688 if ((ias_cmd->cmd_status & (STAT_OK | STAT_COMPL)) != (STAT_OK | STAT_COMPL)) {
689 printk(KERN_WARNING "%s (elmc): individual address setup command failed: %04x\n", dev->name, ias_cmd->cmd_status); 689 pr_warning("%s (elmc): individual address setup command failed: %04x\n",
690 dev->name, ias_cmd->cmd_status);
690 return 1; 691 return 1;
691 } 692 }
692 /* 693 /*
@@ -707,7 +708,7 @@ static int init586(struct net_device *dev)
707 s = jiffies; 708 s = jiffies;
708 while (!(tdr_cmd->cmd_status & STAT_COMPL)) { 709 while (!(tdr_cmd->cmd_status & STAT_COMPL)) {
709 if (time_after(jiffies, s + 30*HZ/100)) { 710 if (time_after(jiffies, s + 30*HZ/100)) {
710 printk(KERN_WARNING "%s: %d Problems while running the TDR.\n", dev->name, __LINE__); 711 pr_warning("%s: %d Problems while running the TDR.\n", dev->name, __LINE__);
711 result = 1; 712 result = 1;
712 break; 713 break;
713 } 714 }
@@ -723,14 +724,14 @@ static int init586(struct net_device *dev)
723 if (result & TDR_LNK_OK) { 724 if (result & TDR_LNK_OK) {
724 /* empty */ 725 /* empty */
725 } else if (result & TDR_XCVR_PRB) { 726 } else if (result & TDR_XCVR_PRB) {
726 printk(KERN_WARNING "%s: TDR: Transceiver problem!\n", dev->name); 727 pr_warning("%s: TDR: Transceiver problem!\n", dev->name);
727 } else if (result & TDR_ET_OPN) { 728 } else if (result & TDR_ET_OPN) {
728 printk(KERN_WARNING "%s: TDR: No correct termination %d clocks away.\n", dev->name, result & TDR_TIMEMASK); 729 pr_warning("%s: TDR: No correct termination %d clocks away.\n", dev->name, result & TDR_TIMEMASK);
729 } else if (result & TDR_ET_SRT) { 730 } else if (result & TDR_ET_SRT) {
730 if (result & TDR_TIMEMASK) /* time == 0 -> strange :-) */ 731 if (result & TDR_TIMEMASK) /* time == 0 -> strange :-) */
731 printk(KERN_WARNING "%s: TDR: Detected a short circuit %d clocks away.\n", dev->name, result & TDR_TIMEMASK); 732 pr_warning("%s: TDR: Detected a short circuit %d clocks away.\n", dev->name, result & TDR_TIMEMASK);
732 } else { 733 } else {
733 printk(KERN_WARNING "%s: TDR: Unknown status %04x\n", dev->name, result); 734 pr_warning("%s: TDR: Unknown status %04x\n", dev->name, result);
734 } 735 }
735 } 736 }
736 /* 737 /*
@@ -774,11 +775,11 @@ static int init586(struct net_device *dev)
774 /* I don't understand this: do we really need memory after the init? */ 775 /* I don't understand this: do we really need memory after the init? */
775 int len = ((char *) p->iscp - (char *) ptr - 8) / 6; 776 int len = ((char *) p->iscp - (char *) ptr - 8) / 6;
776 if (len <= 0) { 777 if (len <= 0) {
777 printk(KERN_ERR "%s: Ooooops, no memory for MC-Setup!\n", dev->name); 778 pr_err("%s: Ooooops, no memory for MC-Setup!\n", dev->name);
778 } else { 779 } else {
779 if (len < num_addrs) { 780 if (len < num_addrs) {
780 num_addrs = len; 781 num_addrs = len;
781 printk(KERN_WARNING "%s: Sorry, can only apply %d MC-Address(es).\n", 782 pr_warning("%s: Sorry, can only apply %d MC-Address(es).\n",
782 dev->name, num_addrs); 783 dev->name, num_addrs);
783 } 784 }
784 mc_cmd = (struct mcsetup_cmd_struct *) ptr; 785 mc_cmd = (struct mcsetup_cmd_struct *) ptr;
@@ -799,7 +800,7 @@ static int init586(struct net_device *dev)
799 break; 800 break;
800 } 801 }
801 if (!(mc_cmd->cmd_status & STAT_COMPL)) { 802 if (!(mc_cmd->cmd_status & STAT_COMPL)) {
802 printk(KERN_WARNING "%s: Can't apply multicast-address-list.\n", dev->name); 803 pr_warning("%s: Can't apply multicast-address-list.\n", dev->name);
803 } 804 }
804 } 805 }
805 } 806 }
@@ -812,7 +813,7 @@ static int init586(struct net_device *dev)
812 p->xmit_buffs[i] = (struct tbd_struct *) ptr; /* TBD */ 813 p->xmit_buffs[i] = (struct tbd_struct *) ptr; /* TBD */
813 ptr = (char *) ptr + sizeof(struct tbd_struct); 814 ptr = (char *) ptr + sizeof(struct tbd_struct);
814 if ((void *) ptr > (void *) p->iscp) { 815 if ((void *) ptr > (void *) p->iscp) {
815 printk(KERN_ERR "%s: not enough shared-mem for your configuration!\n", dev->name); 816 pr_err("%s: not enough shared-mem for your configuration!\n", dev->name);
816 return 1; 817 return 1;
817 } 818 }
818 memset((char *) (p->xmit_cmds[i]), 0, sizeof(struct transmit_cmd_struct)); 819 memset((char *) (p->xmit_cmds[i]), 0, sizeof(struct transmit_cmd_struct));
@@ -936,7 +937,8 @@ elmc_interrupt(int irq, void *dev_id)
936 if (stat & STAT_CNA) { 937 if (stat & STAT_CNA) {
937 /* CU went 'not ready' */ 938 /* CU went 'not ready' */
938 if (netif_running(dev)) { 939 if (netif_running(dev)) {
939 printk(KERN_WARNING "%s: oops! CU has left active state. stat: %04x/%04x.\n", dev->name, (int) stat, (int) p->scb->status); 940 pr_warning("%s: oops! CU has left active state. stat: %04x/%04x.\n",
941 dev->name, (int) stat, (int) p->scb->status);
940 } 942 }
941 } 943 }
942#endif 944#endif
@@ -951,7 +953,8 @@ elmc_interrupt(int irq, void *dev_id)
951 p->scb->cmd = RUC_RESUME; 953 p->scb->cmd = RUC_RESUME;
952 elmc_attn586(); 954 elmc_attn586();
953 } else { 955 } else {
954 printk(KERN_WARNING "%s: Receiver-Unit went 'NOT READY': %04x/%04x.\n", dev->name, (int) stat, (int) p->scb->status); 956 pr_warning("%s: Receiver-Unit went 'NOT READY': %04x/%04x.\n",
957 dev->name, (int) stat, (int) p->scb->status);
955 elmc_rnr_int(dev); 958 elmc_rnr_int(dev);
956 } 959 }
957 } 960 }
@@ -995,11 +998,11 @@ static void elmc_rcv_int(struct net_device *dev)
995 dev->stats.rx_dropped++; 998 dev->stats.rx_dropped++;
996 } 999 }
997 } else { 1000 } else {
998 printk(KERN_WARNING "%s: received oversized frame.\n", dev->name); 1001 pr_warning("%s: received oversized frame.\n", dev->name);
999 dev->stats.rx_dropped++; 1002 dev->stats.rx_dropped++;
1000 } 1003 }
1001 } else { /* frame !(ok), only with 'save-bad-frames' */ 1004 } else { /* frame !(ok), only with 'save-bad-frames' */
1002 printk(KERN_WARNING "%s: oops! rfd-error-status: %04x\n", dev->name, status); 1005 pr_warning("%s: oops! rfd-error-status: %04x\n", dev->name, status);
1003 dev->stats.rx_errors++; 1006 dev->stats.rx_errors++;
1004 } 1007 }
1005 p->rfd_top->status = 0; 1008 p->rfd_top->status = 0;
@@ -1028,7 +1031,7 @@ static void elmc_rnr_int(struct net_device *dev)
1028 alloc_rfa(dev, (char *) p->rfd_first); 1031 alloc_rfa(dev, (char *) p->rfd_first);
1029 startrecv586(dev); /* restart RU */ 1032 startrecv586(dev); /* restart RU */
1030 1033
1031 printk(KERN_WARNING "%s: Receive-Unit restarted. Status: %04x\n", dev->name, p->scb->status); 1034 pr_warning("%s: Receive-Unit restarted. Status: %04x\n", dev->name, p->scb->status);
1032 1035
1033} 1036}
1034 1037
@@ -1043,7 +1046,7 @@ static void elmc_xmt_int(struct net_device *dev)
1043 1046
1044 status = p->xmit_cmds[p->xmit_last]->cmd_status; 1047 status = p->xmit_cmds[p->xmit_last]->cmd_status;
1045 if (!(status & STAT_COMPL)) { 1048 if (!(status & STAT_COMPL)) {
1046 printk(KERN_WARNING "%s: strange .. xmit-int without a 'COMPLETE'\n", dev->name); 1049 pr_warning("%s: strange .. xmit-int without a 'COMPLETE'\n", dev->name);
1047 } 1050 }
1048 if (status & STAT_OK) { 1051 if (status & STAT_OK) {
1049 dev->stats.tx_packets++; 1052 dev->stats.tx_packets++;
@@ -1051,18 +1054,18 @@ static void elmc_xmt_int(struct net_device *dev)
1051 } else { 1054 } else {
1052 dev->stats.tx_errors++; 1055 dev->stats.tx_errors++;
1053 if (status & TCMD_LATECOLL) { 1056 if (status & TCMD_LATECOLL) {
1054 printk(KERN_WARNING "%s: late collision detected.\n", dev->name); 1057 pr_warning("%s: late collision detected.\n", dev->name);
1055 dev->stats.collisions++; 1058 dev->stats.collisions++;
1056 } else if (status & TCMD_NOCARRIER) { 1059 } else if (status & TCMD_NOCARRIER) {
1057 dev->stats.tx_carrier_errors++; 1060 dev->stats.tx_carrier_errors++;
1058 printk(KERN_WARNING "%s: no carrier detected.\n", dev->name); 1061 pr_warning("%s: no carrier detected.\n", dev->name);
1059 } else if (status & TCMD_LOSTCTS) { 1062 } else if (status & TCMD_LOSTCTS) {
1060 printk(KERN_WARNING "%s: loss of CTS detected.\n", dev->name); 1063 pr_warning("%s: loss of CTS detected.\n", dev->name);
1061 } else if (status & TCMD_UNDERRUN) { 1064 } else if (status & TCMD_UNDERRUN) {
1062 dev->stats.tx_fifo_errors++; 1065 dev->stats.tx_fifo_errors++;
1063 printk(KERN_WARNING "%s: DMA underrun detected.\n", dev->name); 1066 pr_warning("%s: DMA underrun detected.\n", dev->name);
1064 } else if (status & TCMD_MAXCOLL) { 1067 } else if (status & TCMD_MAXCOLL) {
1065 printk(KERN_WARNING "%s: Max. collisions exceeded.\n", dev->name); 1068 pr_warning("%s: Max. collisions exceeded.\n", dev->name);
1066 dev->stats.collisions += 16; 1069 dev->stats.collisions += 16;
1067 } 1070 }
1068 } 1071 }
@@ -1099,10 +1102,11 @@ static void elmc_timeout(struct net_device *dev)
1099 struct priv *p = netdev_priv(dev); 1102 struct priv *p = netdev_priv(dev);
1100 /* COMMAND-UNIT active? */ 1103 /* COMMAND-UNIT active? */
1101 if (p->scb->status & CU_ACTIVE) { 1104 if (p->scb->status & CU_ACTIVE) {
1102#ifdef DEBUG 1105 pr_debug("%s: strange ... timeout with CU active?!?\n", dev->name);
1103 printk("%s: strange ... timeout with CU active?!?\n", dev->name); 1106 pr_debug("%s: X0: %04x N0: %04x N1: %04x %d\n", dev->name,
1104 printk("%s: X0: %04x N0: %04x N1: %04x %d\n", dev->name, (int) p->xmit_cmds[0]->cmd_status, (int) p->nop_cmds[0]->cmd_status, (int) p->nop_cmds[1]->cmd_status, (int) p->nop_point); 1107 (int)p->xmit_cmds[0]->cmd_status,
1105#endif 1108 (int)p->nop_cmds[0]->cmd_status,
1109 (int)p->nop_cmds[1]->cmd_status, (int)p->nop_point);
1106 p->scb->cmd = CUC_ABORT; 1110 p->scb->cmd = CUC_ABORT;
1107 elmc_attn586(); 1111 elmc_attn586();
1108 WAIT_4_SCB_CMD(); 1112 WAIT_4_SCB_CMD();
@@ -1112,10 +1116,10 @@ static void elmc_timeout(struct net_device *dev)
1112 WAIT_4_SCB_CMD(); 1116 WAIT_4_SCB_CMD();
1113 netif_wake_queue(dev); 1117 netif_wake_queue(dev);
1114 } else { 1118 } else {
1115#ifdef DEBUG 1119 pr_debug("%s: xmitter timed out, try to restart! stat: %04x\n",
1116 printk("%s: xmitter timed out, try to restart! stat: %04x\n", dev->name, p->scb->status); 1120 dev->name, p->scb->status);
1117 printk("%s: command-stats: %04x %04x\n", dev->name, p->xmit_cmds[0]->cmd_status, p->xmit_cmds[1]->cmd_status); 1121 pr_debug("%s: command-stats: %04x %04x\n", dev->name,
1118#endif 1122 p->xmit_cmds[0]->cmd_status, p->xmit_cmds[1]->cmd_status);
1119 elmc_close(dev); 1123 elmc_close(dev);
1120 elmc_open(dev); 1124 elmc_open(dev);
1121 } 1125 }
@@ -1162,7 +1166,7 @@ static int elmc_send_packet(struct sk_buff *skb, struct net_device *dev)
1162 break; 1166 break;
1163 } 1167 }
1164 if (i == 15) { 1168 if (i == 15) {
1165 printk(KERN_WARNING "%s: Can't start transmit-command.\n", dev->name); 1169 pr_warning("%s: Can't start transmit-command.\n", dev->name);
1166 } 1170 }
1167 } 1171 }
1168#else 1172#else
@@ -1287,11 +1291,12 @@ int __init init_module(void)
1287 free_netdev(dev); 1291 free_netdev(dev);
1288 if (io[this_dev]==0) 1292 if (io[this_dev]==0)
1289 break; 1293 break;
1290 printk(KERN_WARNING "3c523.c: No 3c523 card found at io=%#x\n",io[this_dev]); 1294 pr_warning("3c523.c: No 3c523 card found at io=%#x\n",io[this_dev]);
1291 } 1295 }
1292 1296
1293 if(found==0) { 1297 if(found==0) {
1294 if(io[0]==0) printk(KERN_NOTICE "3c523.c: No 3c523 cards found\n"); 1298 if (io[0]==0)
1299 pr_notice("3c523.c: No 3c523 cards found\n");
1295 return -ENXIO; 1300 return -ENXIO;
1296 } else return 0; 1301 } else return 0;
1297} 1302}
diff --git a/drivers/net/3c527.c b/drivers/net/3c527.c
index b61073c42bf8..c10ca30458f6 100644
--- a/drivers/net/3c527.c
+++ b/drivers/net/3c527.c
@@ -125,8 +125,6 @@ static const char* cardname = DRV_NAME;
125#define NET_DEBUG 2 125#define NET_DEBUG 2
126#endif 126#endif
127 127
128#undef DEBUG_IRQ
129
130static unsigned int mc32_debug = NET_DEBUG; 128static unsigned int mc32_debug = NET_DEBUG;
131 129
132/* The number of low I/O ports used by the ethercard. */ 130/* The number of low I/O ports used by the ethercard. */
@@ -351,15 +349,15 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
351 /* Time to play MCA games */ 349 /* Time to play MCA games */
352 350
353 if (mc32_debug && version_printed++ == 0) 351 if (mc32_debug && version_printed++ == 0)
354 printk(KERN_DEBUG "%s", version); 352 pr_debug("%s", version);
355 353
356 printk(KERN_INFO "%s: %s found in slot %d:", dev->name, cardname, slot); 354 pr_info("%s: %s found in slot %d: ", dev->name, cardname, slot);
357 355
358 POS = mca_read_stored_pos(slot, 2); 356 POS = mca_read_stored_pos(slot, 2);
359 357
360 if(!(POS&1)) 358 if(!(POS&1))
361 { 359 {
362 printk(" disabled.\n"); 360 pr_cont("disabled.\n");
363 return -ENODEV; 361 return -ENODEV;
364 } 362 }
365 363
@@ -370,7 +368,7 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
370 POS = mca_read_stored_pos(slot, 4); 368 POS = mca_read_stored_pos(slot, 4);
371 if(!(POS&1)) 369 if(!(POS&1))
372 { 370 {
373 printk("memory window disabled.\n"); 371 pr_cont("memory window disabled.\n");
374 return -ENODEV; 372 return -ENODEV;
375 } 373 }
376 374
@@ -379,7 +377,7 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
379 i=(POS>>4)&3; 377 i=(POS>>4)&3;
380 if(i==3) 378 if(i==3)
381 { 379 {
382 printk("invalid memory window.\n"); 380 pr_cont("invalid memory window.\n");
383 return -ENODEV; 381 return -ENODEV;
384 } 382 }
385 383
@@ -392,11 +390,11 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
392 390
393 if(!request_region(dev->base_addr, MC32_IO_EXTENT, cardname)) 391 if(!request_region(dev->base_addr, MC32_IO_EXTENT, cardname))
394 { 392 {
395 printk("io 0x%3lX, which is busy.\n", dev->base_addr); 393 pr_cont("io 0x%3lX, which is busy.\n", dev->base_addr);
396 return -EBUSY; 394 return -EBUSY;
397 } 395 }
398 396
399 printk("io 0x%3lX irq %d mem 0x%lX (%dK)\n", 397 pr_cont("io 0x%3lX irq %d mem 0x%lX (%dK)\n",
400 dev->base_addr, dev->irq, dev->mem_start, i/1024); 398 dev->base_addr, dev->irq, dev->mem_start, i/1024);
401 399
402 400
@@ -416,7 +414,7 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
416 dev->dev_addr[i] = mca_read_pos(slot,3); 414 dev->dev_addr[i] = mca_read_pos(slot,3);
417 } 415 }
418 416
419 printk("%s: Address %pM", dev->name, dev->dev_addr); 417 pr_info("%s: Address %pM ", dev->name, dev->dev_addr);
420 418
421 mca_write_pos(slot, 6, 0); 419 mca_write_pos(slot, 6, 0);
422 mca_write_pos(slot, 7, 0); 420 mca_write_pos(slot, 7, 0);
@@ -424,9 +422,9 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
424 POS = mca_read_stored_pos(slot, 4); 422 POS = mca_read_stored_pos(slot, 4);
425 423
426 if(POS&2) 424 if(POS&2)
427 printk(" : BNC port selected.\n"); 425 pr_cont(": BNC port selected.\n");
428 else 426 else
429 printk(" : AUI port selected.\n"); 427 pr_cont(": AUI port selected.\n");
430 428
431 POS=inb(dev->base_addr+HOST_CTRL); 429 POS=inb(dev->base_addr+HOST_CTRL);
432 POS|=HOST_CTRL_ATTN|HOST_CTRL_RESET; 430 POS|=HOST_CTRL_ATTN|HOST_CTRL_RESET;
@@ -447,7 +445,7 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
447 err = request_irq(dev->irq, &mc32_interrupt, IRQF_SHARED | IRQF_SAMPLE_RANDOM, DRV_NAME, dev); 445 err = request_irq(dev->irq, &mc32_interrupt, IRQF_SHARED | IRQF_SAMPLE_RANDOM, DRV_NAME, dev);
448 if (err) { 446 if (err) {
449 release_region(dev->base_addr, MC32_IO_EXTENT); 447 release_region(dev->base_addr, MC32_IO_EXTENT);
450 printk(KERN_ERR "%s: unable to get IRQ %d.\n", DRV_NAME, dev->irq); 448 pr_err("%s: unable to get IRQ %d.\n", DRV_NAME, dev->irq);
451 goto err_exit_ports; 449 goto err_exit_ports;
452 } 450 }
453 451
@@ -463,7 +461,7 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
463 i++; 461 i++;
464 if(i == 1000) 462 if(i == 1000)
465 { 463 {
466 printk(KERN_ERR "%s: failed to boot adapter.\n", dev->name); 464 pr_err("%s: failed to boot adapter.\n", dev->name);
467 err = -ENODEV; 465 err = -ENODEV;
468 goto err_exit_irq; 466 goto err_exit_irq;
469 } 467 }
@@ -475,10 +473,10 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
475 if(base>0) 473 if(base>0)
476 { 474 {
477 if(base < 0x0C) 475 if(base < 0x0C)
478 printk(KERN_ERR "%s: %s%s.\n", dev->name, failures[base-1], 476 pr_err("%s: %s%s.\n", dev->name, failures[base-1],
479 base<0x0A?" test failure":""); 477 base<0x0A?" test failure":"");
480 else 478 else
481 printk(KERN_ERR "%s: unknown failure %d.\n", dev->name, base); 479 pr_err("%s: unknown failure %d.\n", dev->name, base);
482 err = -ENODEV; 480 err = -ENODEV;
483 goto err_exit_irq; 481 goto err_exit_irq;
484 } 482 }
@@ -494,7 +492,7 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
494 udelay(50); 492 udelay(50);
495 if(n>100) 493 if(n>100)
496 { 494 {
497 printk(KERN_ERR "%s: mailbox read fail (%d).\n", dev->name, i); 495 pr_err("%s: mailbox read fail (%d).\n", dev->name, i);
498 err = -ENODEV; 496 err = -ENODEV;
499 goto err_exit_irq; 497 goto err_exit_irq;
500 } 498 }
@@ -527,7 +525,7 @@ static int __init mc32_probe1(struct net_device *dev, int slot)
527 init_completion(&lp->execution_cmd); 525 init_completion(&lp->execution_cmd);
528 init_completion(&lp->xceiver_cmd); 526 init_completion(&lp->xceiver_cmd);
529 527
530 printk("%s: Firmware Rev %d. %d RX buffers, %d TX buffers. Base of 0x%08X.\n", 528 pr_info("%s: Firmware Rev %d. %d RX buffers, %d TX buffers. Base of 0x%08X.\n",
531 dev->name, lp->exec_box->data[12], lp->rx_len, lp->tx_len, lp->base); 529 dev->name, lp->exec_box->data[12], lp->rx_len, lp->tx_len, lp->base);
532 530
533 dev->netdev_ops = &netdev_ops; 531 dev->netdev_ops = &netdev_ops;
@@ -939,7 +937,7 @@ static int mc32_open(struct net_device *dev)
939 */ 937 */
940 938
941 if(mc32_command(dev, 8, descnumbuffs, 4)) { 939 if(mc32_command(dev, 8, descnumbuffs, 4)) {
942 printk("%s: %s rejected our buffer configuration!\n", 940 pr_info("%s: %s rejected our buffer configuration!\n",
943 dev->name, cardname); 941 dev->name, cardname);
944 mc32_close(dev); 942 mc32_close(dev);
945 return -ENOBUFS; 943 return -ENOBUFS;
@@ -995,7 +993,7 @@ static int mc32_open(struct net_device *dev)
995 993
996static void mc32_timeout(struct net_device *dev) 994static void mc32_timeout(struct net_device *dev)
997{ 995{
998 printk(KERN_WARNING "%s: transmit timed out?\n", dev->name); 996 pr_warning("%s: transmit timed out?\n", dev->name);
999 /* Try to restart the adaptor. */ 997 /* Try to restart the adaptor. */
1000 netif_wake_queue(dev); 998 netif_wake_queue(dev);
1001} 999}
@@ -1335,11 +1333,9 @@ static irqreturn_t mc32_interrupt(int irq, void *dev_id)
1335 { 1333 {
1336 status=inb(ioaddr+HOST_CMD); 1334 status=inb(ioaddr+HOST_CMD);
1337 1335
1338#ifdef DEBUG_IRQ 1336 pr_debug("Status TX%d RX%d EX%d OV%d BC%d\n",
1339 printk("Status TX%d RX%d EX%d OV%d BC%d\n",
1340 (status&7), (status>>3)&7, (status>>6)&1, 1337 (status&7), (status>>3)&7, (status>>6)&1,
1341 (status>>7)&1, boguscount); 1338 (status>>7)&1, boguscount);
1342#endif
1343 1339
1344 switch(status&7) 1340 switch(status&7)
1345 { 1341 {
@@ -1354,7 +1350,7 @@ static irqreturn_t mc32_interrupt(int irq, void *dev_id)
1354 complete(&lp->xceiver_cmd); 1350 complete(&lp->xceiver_cmd);
1355 break; 1351 break;
1356 default: 1352 default:
1357 printk("%s: strange tx ack %d\n", dev->name, status&7); 1353 pr_notice("%s: strange tx ack %d\n", dev->name, status&7);
1358 } 1354 }
1359 status>>=3; 1355 status>>=3;
1360 switch(status&7) 1356 switch(status&7)
@@ -1376,7 +1372,7 @@ static irqreturn_t mc32_interrupt(int irq, void *dev_id)
1376 mc32_start_transceiver(dev); 1372 mc32_start_transceiver(dev);
1377 break; 1373 break;
1378 default: 1374 default:
1379 printk("%s: strange rx ack %d\n", 1375 pr_notice("%s: strange rx ack %d\n",
1380 dev->name, status&7); 1376 dev->name, status&7);
1381 } 1377 }
1382 status>>=3; 1378 status>>=3;
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c
index c56698402420..a6e8a2da3bcd 100644
--- a/drivers/net/3c59x.c
+++ b/drivers/net/3c59x.c
@@ -828,14 +828,14 @@ static int vortex_resume(struct pci_dev *pdev)
828 pci_restore_state(pdev); 828 pci_restore_state(pdev);
829 err = pci_enable_device(pdev); 829 err = pci_enable_device(pdev);
830 if (err) { 830 if (err) {
831 printk(KERN_WARNING "%s: Could not enable device \n", 831 pr_warning("%s: Could not enable device\n",
832 dev->name); 832 dev->name);
833 return err; 833 return err;
834 } 834 }
835 pci_set_master(pdev); 835 pci_set_master(pdev);
836 if (request_irq(dev->irq, vp->full_bus_master_rx ? 836 if (request_irq(dev->irq, vp->full_bus_master_rx ?
837 &boomerang_interrupt : &vortex_interrupt, IRQF_SHARED, dev->name, dev)) { 837 &boomerang_interrupt : &vortex_interrupt, IRQF_SHARED, dev->name, dev)) {
838 printk(KERN_WARNING "%s: Could not reserve IRQ %d\n", dev->name, dev->irq); 838 pr_warning("%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
839 pci_disable_device(pdev); 839 pci_disable_device(pdev);
840 return -EBUSY; 840 return -EBUSY;
841 } 841 }
@@ -894,7 +894,7 @@ static int __devexit vortex_eisa_remove(struct device *device)
894 dev = eisa_get_drvdata(edev); 894 dev = eisa_get_drvdata(edev);
895 895
896 if (!dev) { 896 if (!dev) {
897 printk("vortex_eisa_remove called for Compaq device!\n"); 897 pr_err("vortex_eisa_remove called for Compaq device!\n");
898 BUG(); 898 BUG();
899 } 899 }
900 900
@@ -1051,7 +1051,7 @@ static int __devinit vortex_probe1(struct device *gendev,
1051 struct eisa_device *edev = NULL; 1051 struct eisa_device *edev = NULL;
1052 1052
1053 if (!printed_version) { 1053 if (!printed_version) {
1054 printk (version); 1054 pr_info("%s", version);
1055 printed_version = 1; 1055 printed_version = 1;
1056 } 1056 }
1057 1057
@@ -1068,7 +1068,7 @@ static int __devinit vortex_probe1(struct device *gendev,
1068 dev = alloc_etherdev(sizeof(*vp)); 1068 dev = alloc_etherdev(sizeof(*vp));
1069 retval = -ENOMEM; 1069 retval = -ENOMEM;
1070 if (!dev) { 1070 if (!dev) {
1071 printk (KERN_ERR PFX "unable to allocate etherdev, aborting\n"); 1071 pr_err(PFX "unable to allocate etherdev, aborting\n");
1072 goto out; 1072 goto out;
1073 } 1073 }
1074 SET_NETDEV_DEV(dev, gendev); 1074 SET_NETDEV_DEV(dev, gendev);
@@ -1100,9 +1100,9 @@ static int __devinit vortex_probe1(struct device *gendev,
1100 1100
1101 print_info = (vortex_debug > 1); 1101 print_info = (vortex_debug > 1);
1102 if (print_info) 1102 if (print_info)
1103 printk (KERN_INFO "See Documentation/networking/vortex.txt\n"); 1103 pr_info("See Documentation/networking/vortex.txt\n");
1104 1104
1105 printk(KERN_INFO "%s: 3Com %s %s at %p.\n", 1105 pr_info("%s: 3Com %s %s at %p.\n",
1106 print_name, 1106 print_name,
1107 pdev ? "PCI" : "EISA", 1107 pdev ? "PCI" : "EISA",
1108 vci->name, 1108 vci->name,
@@ -1144,10 +1144,9 @@ static int __devinit vortex_probe1(struct device *gendev,
1144 chip only. */ 1144 chip only. */
1145 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency); 1145 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
1146 if (pci_latency < new_latency) { 1146 if (pci_latency < new_latency) {
1147 printk(KERN_INFO "%s: Overriding PCI latency" 1147 pr_info("%s: Overriding PCI latency timer (CFLT) setting of %d, new value is %d.\n",
1148 " timer (CFLT) setting of %d, new value is %d.\n",
1149 print_name, pci_latency, new_latency); 1148 print_name, pci_latency, new_latency);
1150 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency); 1149 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
1151 } 1150 }
1152 } 1151 }
1153 } 1152 }
@@ -1236,17 +1235,17 @@ static int __devinit vortex_probe1(struct device *gendev,
1236 checksum = (checksum ^ (checksum >> 8)) & 0xff; 1235 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1237 } 1236 }
1238 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO)) 1237 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO))
1239 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum); 1238 pr_cont(" ***INVALID CHECKSUM %4.4x*** ", checksum);
1240 for (i = 0; i < 3; i++) 1239 for (i = 0; i < 3; i++)
1241 ((__be16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]); 1240 ((__be16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]);
1242 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); 1241 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1243 if (print_info) 1242 if (print_info)
1244 printk(" %pM", dev->dev_addr); 1243 pr_cont(" %pM", dev->dev_addr);
1245 /* Unfortunately an all zero eeprom passes the checksum and this 1244 /* Unfortunately an all zero eeprom passes the checksum and this
1246 gets found in the wild in failure cases. Crypto is hard 8) */ 1245 gets found in the wild in failure cases. Crypto is hard 8) */
1247 if (!is_valid_ether_addr(dev->dev_addr)) { 1246 if (!is_valid_ether_addr(dev->dev_addr)) {
1248 retval = -EINVAL; 1247 retval = -EINVAL;
1249 printk(KERN_ERR "*** EEPROM MAC address is invalid.\n"); 1248 pr_err("*** EEPROM MAC address is invalid.\n");
1250 goto free_ring; /* With every pack */ 1249 goto free_ring; /* With every pack */
1251 } 1250 }
1252 EL3WINDOW(2); 1251 EL3WINDOW(2);
@@ -1254,17 +1253,17 @@ static int __devinit vortex_probe1(struct device *gendev,
1254 iowrite8(dev->dev_addr[i], ioaddr + i); 1253 iowrite8(dev->dev_addr[i], ioaddr + i);
1255 1254
1256 if (print_info) 1255 if (print_info)
1257 printk(", IRQ %d\n", dev->irq); 1256 pr_cont(", IRQ %d\n", dev->irq);
1258 /* Tell them about an invalid IRQ. */ 1257 /* Tell them about an invalid IRQ. */
1259 if (dev->irq <= 0 || dev->irq >= nr_irqs) 1258 if (dev->irq <= 0 || dev->irq >= nr_irqs)
1260 printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n", 1259 pr_warning(" *** Warning: IRQ %d is unlikely to work! ***\n",
1261 dev->irq); 1260 dev->irq);
1262 1261
1263 EL3WINDOW(4); 1262 EL3WINDOW(4);
1264 step = (ioread8(ioaddr + Wn4_NetDiag) & 0x1e) >> 1; 1263 step = (ioread8(ioaddr + Wn4_NetDiag) & 0x1e) >> 1;
1265 if (print_info) { 1264 if (print_info) {
1266 printk(KERN_INFO " product code %02x%02x rev %02x.%d date %02d-" 1265 pr_info(" product code %02x%02x rev %02x.%d date %02d-%02d-%02d\n",
1267 "%02d-%02d\n", eeprom[6]&0xff, eeprom[6]>>8, eeprom[0x14], 1266 eeprom[6]&0xff, eeprom[6]>>8, eeprom[0x14],
1268 step, (eeprom[4]>>5) & 15, eeprom[4] & 31, eeprom[4]>>9); 1267 step, (eeprom[4]>>5) & 15, eeprom[4] & 31, eeprom[4]>>9);
1269 } 1268 }
1270 1269
@@ -1279,8 +1278,7 @@ static int __devinit vortex_probe1(struct device *gendev,
1279 } 1278 }
1280 1279
1281 if (print_info) { 1280 if (print_info) {
1282 printk(KERN_INFO "%s: CardBus functions mapped " 1281 pr_info("%s: CardBus functions mapped %16.16llx->%p\n",
1283 "%16.16llx->%p\n",
1284 print_name, 1282 print_name,
1285 (unsigned long long)pci_resource_start(pdev, 2), 1283 (unsigned long long)pci_resource_start(pdev, 2),
1286 vp->cb_fn_base); 1284 vp->cb_fn_base);
@@ -1307,7 +1305,7 @@ static int __devinit vortex_probe1(struct device *gendev,
1307 if (vp->info1 & 0x8000) { 1305 if (vp->info1 & 0x8000) {
1308 vp->full_duplex = 1; 1306 vp->full_duplex = 1;
1309 if (print_info) 1307 if (print_info)
1310 printk(KERN_INFO "Full duplex capable\n"); 1308 pr_info("Full duplex capable\n");
1311 } 1309 }
1312 1310
1313 { 1311 {
@@ -1319,9 +1317,9 @@ static int __devinit vortex_probe1(struct device *gendev,
1319 vp->available_media = 0x40; 1317 vp->available_media = 0x40;
1320 config = ioread32(ioaddr + Wn3_Config); 1318 config = ioread32(ioaddr + Wn3_Config);
1321 if (print_info) { 1319 if (print_info) {
1322 printk(KERN_DEBUG " Internal config register is %4.4x, " 1320 pr_debug(" Internal config register is %4.4x, transceivers %#x.\n",
1323 "transceivers %#x.\n", config, ioread16(ioaddr + Wn3_Options)); 1321 config, ioread16(ioaddr + Wn3_Options));
1324 printk(KERN_INFO " %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n", 1322 pr_info(" %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
1325 8 << RAM_SIZE(config), 1323 8 << RAM_SIZE(config),
1326 RAM_WIDTH(config) ? "word" : "byte", 1324 RAM_WIDTH(config) ? "word" : "byte",
1327 ram_split[RAM_SPLIT(config)], 1325 ram_split[RAM_SPLIT(config)],
@@ -1336,7 +1334,7 @@ static int __devinit vortex_probe1(struct device *gendev,
1336 } 1334 }
1337 1335
1338 if (vp->media_override != 7) { 1336 if (vp->media_override != 7) {
1339 printk(KERN_INFO "%s: Media override to transceiver type %d (%s).\n", 1337 pr_info("%s: Media override to transceiver type %d (%s).\n",
1340 print_name, vp->media_override, 1338 print_name, vp->media_override,
1341 media_tbl[vp->media_override].name); 1339 media_tbl[vp->media_override].name);
1342 dev->if_port = vp->media_override; 1340 dev->if_port = vp->media_override;
@@ -1369,8 +1367,8 @@ static int __devinit vortex_probe1(struct device *gendev,
1369 if (mii_status && mii_status != 0xffff) { 1367 if (mii_status && mii_status != 0xffff) {
1370 vp->phys[phy_idx++] = phyx; 1368 vp->phys[phy_idx++] = phyx;
1371 if (print_info) { 1369 if (print_info) {
1372 printk(KERN_INFO " MII transceiver found at address %d," 1370 pr_info(" MII transceiver found at address %d, status %4x.\n",
1373 " status %4x.\n", phyx, mii_status); 1371 phyx, mii_status);
1374 } 1372 }
1375 if ((mii_status & 0x0040) == 0) 1373 if ((mii_status & 0x0040) == 0)
1376 mii_preamble_required++; 1374 mii_preamble_required++;
@@ -1378,7 +1376,7 @@ static int __devinit vortex_probe1(struct device *gendev,
1378 } 1376 }
1379 mii_preamble_required--; 1377 mii_preamble_required--;
1380 if (phy_idx == 0) { 1378 if (phy_idx == 0) {
1381 printk(KERN_WARNING" ***WARNING*** No MII transceivers found!\n"); 1379 pr_warning(" ***WARNING*** No MII transceivers found!\n");
1382 vp->phys[0] = 24; 1380 vp->phys[0] = 24;
1383 } else { 1381 } else {
1384 vp->advertising = mdio_read(dev, vp->phys[0], MII_ADVERTISE); 1382 vp->advertising = mdio_read(dev, vp->phys[0], MII_ADVERTISE);
@@ -1394,7 +1392,7 @@ static int __devinit vortex_probe1(struct device *gendev,
1394 if (vp->capabilities & CapBusMaster) { 1392 if (vp->capabilities & CapBusMaster) {
1395 vp->full_bus_master_tx = 1; 1393 vp->full_bus_master_tx = 1;
1396 if (print_info) { 1394 if (print_info) {
1397 printk(KERN_INFO " Enabling bus-master transmits and %s receives.\n", 1395 pr_info(" Enabling bus-master transmits and %s receives.\n",
1398 (vp->info2 & 1) ? "early" : "whole-frame" ); 1396 (vp->info2 & 1) ? "early" : "whole-frame" );
1399 } 1397 }
1400 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2; 1398 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2;
@@ -1414,7 +1412,7 @@ static int __devinit vortex_probe1(struct device *gendev,
1414 dev->netdev_ops = &vortex_netdev_ops; 1412 dev->netdev_ops = &vortex_netdev_ops;
1415 1413
1416 if (print_info) { 1414 if (print_info) {
1417 printk(KERN_INFO "%s: scatter/gather %sabled. h/w checksums %sabled\n", 1415 pr_info("%s: scatter/gather %sabled. h/w checksums %sabled\n",
1418 print_name, 1416 print_name,
1419 (dev->features & NETIF_F_SG) ? "en":"dis", 1417 (dev->features & NETIF_F_SG) ? "en":"dis",
1420 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis"); 1418 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis");
@@ -1442,7 +1440,7 @@ free_region:
1442 if (vp->must_free_region) 1440 if (vp->must_free_region)
1443 release_region(dev->base_addr, vci->io_size); 1441 release_region(dev->base_addr, vci->io_size);
1444 free_netdev(dev); 1442 free_netdev(dev);
1445 printk(KERN_ERR PFX "vortex_probe1 fails. Returns %d\n", retval); 1443 pr_err(PFX "vortex_probe1 fails. Returns %d\n", retval);
1446out: 1444out:
1447 return retval; 1445 return retval;
1448} 1446}
@@ -1464,13 +1462,13 @@ issue_and_wait(struct net_device *dev, int cmd)
1464 for (i = 0; i < 100000; i++) { 1462 for (i = 0; i < 100000; i++) {
1465 if (!(ioread16(ioaddr + EL3_STATUS) & CmdInProgress)) { 1463 if (!(ioread16(ioaddr + EL3_STATUS) & CmdInProgress)) {
1466 if (vortex_debug > 1) 1464 if (vortex_debug > 1)
1467 printk(KERN_INFO "%s: command 0x%04x took %d usecs\n", 1465 pr_info("%s: command 0x%04x took %d usecs\n",
1468 dev->name, cmd, i * 10); 1466 dev->name, cmd, i * 10);
1469 return; 1467 return;
1470 } 1468 }
1471 udelay(10); 1469 udelay(10);
1472 } 1470 }
1473 printk(KERN_ERR "%s: command 0x%04x did not complete! Status=0x%x\n", 1471 pr_err("%s: command 0x%04x did not complete! Status=0x%x\n",
1474 dev->name, cmd, ioread16(ioaddr + EL3_STATUS)); 1472 dev->name, cmd, ioread16(ioaddr + EL3_STATUS));
1475} 1473}
1476 1474
@@ -1480,7 +1478,7 @@ vortex_set_duplex(struct net_device *dev)
1480 struct vortex_private *vp = netdev_priv(dev); 1478 struct vortex_private *vp = netdev_priv(dev);
1481 void __iomem *ioaddr = vp->ioaddr; 1479 void __iomem *ioaddr = vp->ioaddr;
1482 1480
1483 printk(KERN_INFO "%s: setting %s-duplex.\n", 1481 pr_info("%s: setting %s-duplex.\n",
1484 dev->name, (vp->full_duplex) ? "full" : "half"); 1482 dev->name, (vp->full_duplex) ? "full" : "half");
1485 1483
1486 EL3WINDOW(3); 1484 EL3WINDOW(3);
@@ -1522,7 +1520,7 @@ vortex_up(struct net_device *dev)
1522 pci_restore_state(VORTEX_PCI(vp)); 1520 pci_restore_state(VORTEX_PCI(vp));
1523 err = pci_enable_device(VORTEX_PCI(vp)); 1521 err = pci_enable_device(VORTEX_PCI(vp));
1524 if (err) { 1522 if (err) {
1525 printk(KERN_WARNING "%s: Could not enable device \n", 1523 pr_warning("%s: Could not enable device\n",
1526 dev->name); 1524 dev->name);
1527 goto err_out; 1525 goto err_out;
1528 } 1526 }
@@ -1533,14 +1531,14 @@ vortex_up(struct net_device *dev)
1533 config = ioread32(ioaddr + Wn3_Config); 1531 config = ioread32(ioaddr + Wn3_Config);
1534 1532
1535 if (vp->media_override != 7) { 1533 if (vp->media_override != 7) {
1536 printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n", 1534 pr_info("%s: Media override to transceiver %d (%s).\n",
1537 dev->name, vp->media_override, 1535 dev->name, vp->media_override,
1538 media_tbl[vp->media_override].name); 1536 media_tbl[vp->media_override].name);
1539 dev->if_port = vp->media_override; 1537 dev->if_port = vp->media_override;
1540 } else if (vp->autoselect) { 1538 } else if (vp->autoselect) {
1541 if (vp->has_nway) { 1539 if (vp->has_nway) {
1542 if (vortex_debug > 1) 1540 if (vortex_debug > 1)
1543 printk(KERN_INFO "%s: using NWAY device table, not %d\n", 1541 pr_info("%s: using NWAY device table, not %d\n",
1544 dev->name, dev->if_port); 1542 dev->name, dev->if_port);
1545 dev->if_port = XCVR_NWAY; 1543 dev->if_port = XCVR_NWAY;
1546 } else { 1544 } else {
@@ -1549,13 +1547,13 @@ vortex_up(struct net_device *dev)
1549 while (! (vp->available_media & media_tbl[dev->if_port].mask)) 1547 while (! (vp->available_media & media_tbl[dev->if_port].mask))
1550 dev->if_port = media_tbl[dev->if_port].next; 1548 dev->if_port = media_tbl[dev->if_port].next;
1551 if (vortex_debug > 1) 1549 if (vortex_debug > 1)
1552 printk(KERN_INFO "%s: first available media type: %s\n", 1550 pr_info("%s: first available media type: %s\n",
1553 dev->name, media_tbl[dev->if_port].name); 1551 dev->name, media_tbl[dev->if_port].name);
1554 } 1552 }
1555 } else { 1553 } else {
1556 dev->if_port = vp->default_media; 1554 dev->if_port = vp->default_media;
1557 if (vortex_debug > 1) 1555 if (vortex_debug > 1)
1558 printk(KERN_INFO "%s: using default media %s\n", 1556 pr_info("%s: using default media %s\n",
1559 dev->name, media_tbl[dev->if_port].name); 1557 dev->name, media_tbl[dev->if_port].name);
1560 } 1558 }
1561 1559
@@ -1570,13 +1568,13 @@ vortex_up(struct net_device *dev)
1570 vp->rx_oom_timer.function = rx_oom_timer; 1568 vp->rx_oom_timer.function = rx_oom_timer;
1571 1569
1572 if (vortex_debug > 1) 1570 if (vortex_debug > 1)
1573 printk(KERN_DEBUG "%s: Initial media type %s.\n", 1571 pr_debug("%s: Initial media type %s.\n",
1574 dev->name, media_tbl[dev->if_port].name); 1572 dev->name, media_tbl[dev->if_port].name);
1575 1573
1576 vp->full_duplex = vp->mii.force_media; 1574 vp->full_duplex = vp->mii.force_media;
1577 config = BFINS(config, dev->if_port, 20, 4); 1575 config = BFINS(config, dev->if_port, 20, 4);
1578 if (vortex_debug > 6) 1576 if (vortex_debug > 6)
1579 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config); 1577 pr_debug("vortex_up(): writing 0x%x to InternalConfig\n", config);
1580 iowrite32(config, ioaddr + Wn3_Config); 1578 iowrite32(config, ioaddr + Wn3_Config);
1581 1579
1582 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) { 1580 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
@@ -1602,7 +1600,7 @@ vortex_up(struct net_device *dev)
1602 1600
1603 if (vortex_debug > 1) { 1601 if (vortex_debug > 1) {
1604 EL3WINDOW(4); 1602 EL3WINDOW(4);
1605 printk(KERN_DEBUG "%s: vortex_up() irq %d media status %4.4x.\n", 1603 pr_debug("%s: vortex_up() irq %d media status %4.4x.\n",
1606 dev->name, dev->irq, ioread16(ioaddr + Wn4_Media)); 1604 dev->name, dev->irq, ioread16(ioaddr + Wn4_Media));
1607 } 1605 }
1608 1606
@@ -1704,13 +1702,13 @@ vortex_open(struct net_device *dev)
1704 /* Use the now-standard shared IRQ implementation. */ 1702 /* Use the now-standard shared IRQ implementation. */
1705 if ((retval = request_irq(dev->irq, vp->full_bus_master_rx ? 1703 if ((retval = request_irq(dev->irq, vp->full_bus_master_rx ?
1706 &boomerang_interrupt : &vortex_interrupt, IRQF_SHARED, dev->name, dev))) { 1704 &boomerang_interrupt : &vortex_interrupt, IRQF_SHARED, dev->name, dev))) {
1707 printk(KERN_ERR "%s: Could not reserve IRQ %d\n", dev->name, dev->irq); 1705 pr_err("%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1708 goto err; 1706 goto err;
1709 } 1707 }
1710 1708
1711 if (vp->full_bus_master_rx) { /* Boomerang bus master. */ 1709 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1712 if (vortex_debug > 2) 1710 if (vortex_debug > 2)
1713 printk(KERN_DEBUG "%s: Filling in the Rx ring.\n", dev->name); 1711 pr_debug("%s: Filling in the Rx ring.\n", dev->name);
1714 for (i = 0; i < RX_RING_SIZE; i++) { 1712 for (i = 0; i < RX_RING_SIZE; i++) {
1715 struct sk_buff *skb; 1713 struct sk_buff *skb;
1716 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1)); 1714 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1));
@@ -1728,7 +1726,7 @@ vortex_open(struct net_device *dev)
1728 } 1726 }
1729 if (i != RX_RING_SIZE) { 1727 if (i != RX_RING_SIZE) {
1730 int j; 1728 int j;
1731 printk(KERN_EMERG "%s: no memory for rx ring\n", dev->name); 1729 pr_emerg("%s: no memory for rx ring\n", dev->name);
1732 for (j = 0; j < i; j++) { 1730 for (j = 0; j < i; j++) {
1733 if (vp->rx_skbuff[j]) { 1731 if (vp->rx_skbuff[j]) {
1734 dev_kfree_skb(vp->rx_skbuff[j]); 1732 dev_kfree_skb(vp->rx_skbuff[j]);
@@ -1750,7 +1748,7 @@ err_free_irq:
1750 free_irq(dev->irq, dev); 1748 free_irq(dev->irq, dev);
1751err: 1749err:
1752 if (vortex_debug > 1) 1750 if (vortex_debug > 1)
1753 printk(KERN_ERR "%s: vortex_open() fails: returning %d\n", dev->name, retval); 1751 pr_err("%s: vortex_open() fails: returning %d\n", dev->name, retval);
1754out: 1752out:
1755 return retval; 1753 return retval;
1756} 1754}
@@ -1766,9 +1764,9 @@ vortex_timer(unsigned long data)
1766 int media_status, old_window; 1764 int media_status, old_window;
1767 1765
1768 if (vortex_debug > 2) { 1766 if (vortex_debug > 2) {
1769 printk(KERN_DEBUG "%s: Media selection timer tick happened, %s.\n", 1767 pr_debug("%s: Media selection timer tick happened, %s.\n",
1770 dev->name, media_tbl[dev->if_port].name); 1768 dev->name, media_tbl[dev->if_port].name);
1771 printk(KERN_DEBUG "dev->watchdog_timeo=%d\n", dev->watchdog_timeo); 1769 pr_debug("dev->watchdog_timeo=%d\n", dev->watchdog_timeo);
1772 } 1770 }
1773 1771
1774 disable_irq_lockdep(dev->irq); 1772 disable_irq_lockdep(dev->irq);
@@ -1781,12 +1779,12 @@ vortex_timer(unsigned long data)
1781 netif_carrier_on(dev); 1779 netif_carrier_on(dev);
1782 ok = 1; 1780 ok = 1;
1783 if (vortex_debug > 1) 1781 if (vortex_debug > 1)
1784 printk(KERN_DEBUG "%s: Media %s has link beat, %x.\n", 1782 pr_debug("%s: Media %s has link beat, %x.\n",
1785 dev->name, media_tbl[dev->if_port].name, media_status); 1783 dev->name, media_tbl[dev->if_port].name, media_status);
1786 } else { 1784 } else {
1787 netif_carrier_off(dev); 1785 netif_carrier_off(dev);
1788 if (vortex_debug > 1) { 1786 if (vortex_debug > 1) {
1789 printk(KERN_DEBUG "%s: Media %s has no link beat, %x.\n", 1787 pr_debug("%s: Media %s has no link beat, %x.\n",
1790 dev->name, media_tbl[dev->if_port].name, media_status); 1788 dev->name, media_tbl[dev->if_port].name, media_status);
1791 } 1789 }
1792 } 1790 }
@@ -1802,7 +1800,7 @@ vortex_timer(unsigned long data)
1802 break; 1800 break;
1803 default: /* Other media types handled by Tx timeouts. */ 1801 default: /* Other media types handled by Tx timeouts. */
1804 if (vortex_debug > 1) 1802 if (vortex_debug > 1)
1805 printk(KERN_DEBUG "%s: Media %s has no indication, %x.\n", 1803 pr_debug("%s: Media %s has no indication, %x.\n",
1806 dev->name, media_tbl[dev->if_port].name, media_status); 1804 dev->name, media_tbl[dev->if_port].name, media_status);
1807 ok = 1; 1805 ok = 1;
1808 } 1806 }
@@ -1822,13 +1820,11 @@ vortex_timer(unsigned long data)
1822 if (dev->if_port == XCVR_Default) { /* Go back to default. */ 1820 if (dev->if_port == XCVR_Default) { /* Go back to default. */
1823 dev->if_port = vp->default_media; 1821 dev->if_port = vp->default_media;
1824 if (vortex_debug > 1) 1822 if (vortex_debug > 1)
1825 printk(KERN_DEBUG "%s: Media selection failing, using default " 1823 pr_debug("%s: Media selection failing, using default %s port.\n",
1826 "%s port.\n",
1827 dev->name, media_tbl[dev->if_port].name); 1824 dev->name, media_tbl[dev->if_port].name);
1828 } else { 1825 } else {
1829 if (vortex_debug > 1) 1826 if (vortex_debug > 1)
1830 printk(KERN_DEBUG "%s: Media selection failed, now trying " 1827 pr_debug("%s: Media selection failed, now trying %s port.\n",
1831 "%s port.\n",
1832 dev->name, media_tbl[dev->if_port].name); 1828 dev->name, media_tbl[dev->if_port].name);
1833 next_tick = media_tbl[dev->if_port].wait; 1829 next_tick = media_tbl[dev->if_port].wait;
1834 } 1830 }
@@ -1843,13 +1839,13 @@ vortex_timer(unsigned long data)
1843 iowrite16(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax, 1839 iowrite16(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax,
1844 ioaddr + EL3_CMD); 1840 ioaddr + EL3_CMD);
1845 if (vortex_debug > 1) 1841 if (vortex_debug > 1)
1846 printk(KERN_DEBUG "wrote 0x%08x to Wn3_Config\n", config); 1842 pr_debug("wrote 0x%08x to Wn3_Config\n", config);
1847 /* AKPM: FIXME: Should reset Rx & Tx here. P60 of 3c90xc.pdf */ 1843 /* AKPM: FIXME: Should reset Rx & Tx here. P60 of 3c90xc.pdf */
1848 } 1844 }
1849 1845
1850leave_media_alone: 1846leave_media_alone:
1851 if (vortex_debug > 2) 1847 if (vortex_debug > 2)
1852 printk(KERN_DEBUG "%s: Media selection timer finished, %s.\n", 1848 pr_debug("%s: Media selection timer finished, %s.\n",
1853 dev->name, media_tbl[dev->if_port].name); 1849 dev->name, media_tbl[dev->if_port].name);
1854 1850
1855 EL3WINDOW(old_window); 1851 EL3WINDOW(old_window);
@@ -1865,21 +1861,21 @@ static void vortex_tx_timeout(struct net_device *dev)
1865 struct vortex_private *vp = netdev_priv(dev); 1861 struct vortex_private *vp = netdev_priv(dev);
1866 void __iomem *ioaddr = vp->ioaddr; 1862 void __iomem *ioaddr = vp->ioaddr;
1867 1863
1868 printk(KERN_ERR "%s: transmit timed out, tx_status %2.2x status %4.4x.\n", 1864 pr_err("%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1869 dev->name, ioread8(ioaddr + TxStatus), 1865 dev->name, ioread8(ioaddr + TxStatus),
1870 ioread16(ioaddr + EL3_STATUS)); 1866 ioread16(ioaddr + EL3_STATUS));
1871 EL3WINDOW(4); 1867 EL3WINDOW(4);
1872 printk(KERN_ERR " diagnostics: net %04x media %04x dma %08x fifo %04x\n", 1868 pr_err(" diagnostics: net %04x media %04x dma %08x fifo %04x\n",
1873 ioread16(ioaddr + Wn4_NetDiag), 1869 ioread16(ioaddr + Wn4_NetDiag),
1874 ioread16(ioaddr + Wn4_Media), 1870 ioread16(ioaddr + Wn4_Media),
1875 ioread32(ioaddr + PktStatus), 1871 ioread32(ioaddr + PktStatus),
1876 ioread16(ioaddr + Wn4_FIFODiag)); 1872 ioread16(ioaddr + Wn4_FIFODiag));
1877 /* Slight code bloat to be user friendly. */ 1873 /* Slight code bloat to be user friendly. */
1878 if ((ioread8(ioaddr + TxStatus) & 0x88) == 0x88) 1874 if ((ioread8(ioaddr + TxStatus) & 0x88) == 0x88)
1879 printk(KERN_ERR "%s: Transmitter encountered 16 collisions --" 1875 pr_err("%s: Transmitter encountered 16 collisions --"
1880 " network cable problem?\n", dev->name); 1876 " network cable problem?\n", dev->name);
1881 if (ioread16(ioaddr + EL3_STATUS) & IntLatch) { 1877 if (ioread16(ioaddr + EL3_STATUS) & IntLatch) {
1882 printk(KERN_ERR "%s: Interrupt posted but not delivered --" 1878 pr_err("%s: Interrupt posted but not delivered --"
1883 " IRQ blocked by another device?\n", dev->name); 1879 " IRQ blocked by another device?\n", dev->name);
1884 /* Bad idea here.. but we might as well handle a few events. */ 1880 /* Bad idea here.. but we might as well handle a few events. */
1885 { 1881 {
@@ -1903,7 +1899,7 @@ static void vortex_tx_timeout(struct net_device *dev)
1903 1899
1904 dev->stats.tx_errors++; 1900 dev->stats.tx_errors++;
1905 if (vp->full_bus_master_tx) { 1901 if (vp->full_bus_master_tx) {
1906 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name); 1902 pr_debug("%s: Resetting the Tx ring pointer.\n", dev->name);
1907 if (vp->cur_tx - vp->dirty_tx > 0 && ioread32(ioaddr + DownListPtr) == 0) 1903 if (vp->cur_tx - vp->dirty_tx > 0 && ioread32(ioaddr + DownListPtr) == 0)
1908 iowrite32(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc), 1904 iowrite32(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc),
1909 ioaddr + DownListPtr); 1905 ioaddr + DownListPtr);
@@ -1938,7 +1934,7 @@ vortex_error(struct net_device *dev, int status)
1938 unsigned char tx_status = 0; 1934 unsigned char tx_status = 0;
1939 1935
1940 if (vortex_debug > 2) { 1936 if (vortex_debug > 2) {
1941 printk(KERN_ERR "%s: vortex_error(), status=0x%x\n", dev->name, status); 1937 pr_err("%s: vortex_error(), status=0x%x\n", dev->name, status);
1942 } 1938 }
1943 1939
1944 if (status & TxComplete) { /* Really "TxError" for us. */ 1940 if (status & TxComplete) { /* Really "TxError" for us. */
@@ -1946,10 +1942,10 @@ vortex_error(struct net_device *dev, int status)
1946 /* Presumably a tx-timeout. We must merely re-enable. */ 1942 /* Presumably a tx-timeout. We must merely re-enable. */
1947 if (vortex_debug > 2 1943 if (vortex_debug > 2
1948 || (tx_status != 0x88 && vortex_debug > 0)) { 1944 || (tx_status != 0x88 && vortex_debug > 0)) {
1949 printk(KERN_ERR "%s: Transmit error, Tx status register %2.2x.\n", 1945 pr_err("%s: Transmit error, Tx status register %2.2x.\n",
1950 dev->name, tx_status); 1946 dev->name, tx_status);
1951 if (tx_status == 0x82) { 1947 if (tx_status == 0x82) {
1952 printk(KERN_ERR "Probably a duplex mismatch. See " 1948 pr_err("Probably a duplex mismatch. See "
1953 "Documentation/networking/vortex.txt\n"); 1949 "Documentation/networking/vortex.txt\n");
1954 } 1950 }
1955 dump_tx_ring(dev); 1951 dump_tx_ring(dev);
@@ -1975,13 +1971,13 @@ vortex_error(struct net_device *dev, int status)
1975 if (status & StatsFull) { /* Empty statistics. */ 1971 if (status & StatsFull) { /* Empty statistics. */
1976 static int DoneDidThat; 1972 static int DoneDidThat;
1977 if (vortex_debug > 4) 1973 if (vortex_debug > 4)
1978 printk(KERN_DEBUG "%s: Updating stats.\n", dev->name); 1974 pr_debug("%s: Updating stats.\n", dev->name);
1979 update_stats(ioaddr, dev); 1975 update_stats(ioaddr, dev);
1980 /* HACK: Disable statistics as an interrupt source. */ 1976 /* HACK: Disable statistics as an interrupt source. */
1981 /* This occurs when we have the wrong media type! */ 1977 /* This occurs when we have the wrong media type! */
1982 if (DoneDidThat == 0 && 1978 if (DoneDidThat == 0 &&
1983 ioread16(ioaddr + EL3_STATUS) & StatsFull) { 1979 ioread16(ioaddr + EL3_STATUS) & StatsFull) {
1984 printk(KERN_WARNING "%s: Updating statistics failed, disabling " 1980 pr_warning("%s: Updating statistics failed, disabling "
1985 "stats as an interrupt source.\n", dev->name); 1981 "stats as an interrupt source.\n", dev->name);
1986 EL3WINDOW(5); 1982 EL3WINDOW(5);
1987 iowrite16(SetIntrEnb | (ioread16(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD); 1983 iowrite16(SetIntrEnb | (ioread16(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD);
@@ -1998,7 +1994,7 @@ vortex_error(struct net_device *dev, int status)
1998 u16 fifo_diag; 1994 u16 fifo_diag;
1999 EL3WINDOW(4); 1995 EL3WINDOW(4);
2000 fifo_diag = ioread16(ioaddr + Wn4_FIFODiag); 1996 fifo_diag = ioread16(ioaddr + Wn4_FIFODiag);
2001 printk(KERN_ERR "%s: Host error, FIFO diagnostic register %4.4x.\n", 1997 pr_err("%s: Host error, FIFO diagnostic register %4.4x.\n",
2002 dev->name, fifo_diag); 1998 dev->name, fifo_diag);
2003 /* Adapter failure requires Tx/Rx reset and reinit. */ 1999 /* Adapter failure requires Tx/Rx reset and reinit. */
2004 if (vp->full_bus_master_tx) { 2000 if (vp->full_bus_master_tx) {
@@ -2006,7 +2002,7 @@ vortex_error(struct net_device *dev, int status)
2006 /* 0x80000000 PCI master abort. */ 2002 /* 0x80000000 PCI master abort. */
2007 /* 0x40000000 PCI target abort. */ 2003 /* 0x40000000 PCI target abort. */
2008 if (vortex_debug) 2004 if (vortex_debug)
2009 printk(KERN_ERR "%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status); 2005 pr_err("%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2010 2006
2011 /* In this case, blow the card away */ 2007 /* In this case, blow the card away */
2012 /* Must not enter D3 or we can't legally issue the reset! */ 2008 /* Must not enter D3 or we can't legally issue the reset! */
@@ -2075,7 +2071,7 @@ vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
2075 while (--i > 0 && (tx_status = ioread8(ioaddr + TxStatus)) > 0) { 2071 while (--i > 0 && (tx_status = ioread8(ioaddr + TxStatus)) > 0) {
2076 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */ 2072 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
2077 if (vortex_debug > 2) 2073 if (vortex_debug > 2)
2078 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n", 2074 pr_debug("%s: Tx error, status %2.2x.\n",
2079 dev->name, tx_status); 2075 dev->name, tx_status);
2080 if (tx_status & 0x04) dev->stats.tx_fifo_errors++; 2076 if (tx_status & 0x04) dev->stats.tx_fifo_errors++;
2081 if (tx_status & 0x38) dev->stats.tx_aborted_errors++; 2077 if (tx_status & 0x38) dev->stats.tx_aborted_errors++;
@@ -2101,14 +2097,14 @@ boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)
2101 unsigned long flags; 2097 unsigned long flags;
2102 2098
2103 if (vortex_debug > 6) { 2099 if (vortex_debug > 6) {
2104 printk(KERN_DEBUG "boomerang_start_xmit()\n"); 2100 pr_debug("boomerang_start_xmit()\n");
2105 printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n", 2101 pr_debug("%s: Trying to send a packet, Tx index %d.\n",
2106 dev->name, vp->cur_tx); 2102 dev->name, vp->cur_tx);
2107 } 2103 }
2108 2104
2109 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) { 2105 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) {
2110 if (vortex_debug > 0) 2106 if (vortex_debug > 0)
2111 printk(KERN_WARNING "%s: BUG! Tx Ring full, refusing to send buffer.\n", 2107 pr_warning("%s: BUG! Tx Ring full, refusing to send buffer.\n",
2112 dev->name); 2108 dev->name);
2113 netif_stop_queue(dev); 2109 netif_stop_queue(dev);
2114 return 1; 2110 return 1;
@@ -2204,7 +2200,7 @@ vortex_interrupt(int irq, void *dev_id)
2204 status = ioread16(ioaddr + EL3_STATUS); 2200 status = ioread16(ioaddr + EL3_STATUS);
2205 2201
2206 if (vortex_debug > 6) 2202 if (vortex_debug > 6)
2207 printk("vortex_interrupt(). status=0x%4x\n", status); 2203 pr_debug("vortex_interrupt(). status=0x%4x\n", status);
2208 2204
2209 if ((status & IntLatch) == 0) 2205 if ((status & IntLatch) == 0)
2210 goto handler_exit; /* No interrupt: shared IRQs cause this */ 2206 goto handler_exit; /* No interrupt: shared IRQs cause this */
@@ -2219,19 +2215,19 @@ vortex_interrupt(int irq, void *dev_id)
2219 goto handler_exit; 2215 goto handler_exit;
2220 2216
2221 if (vortex_debug > 4) 2217 if (vortex_debug > 4)
2222 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n", 2218 pr_debug("%s: interrupt, status %4.4x, latency %d ticks.\n",
2223 dev->name, status, ioread8(ioaddr + Timer)); 2219 dev->name, status, ioread8(ioaddr + Timer));
2224 2220
2225 do { 2221 do {
2226 if (vortex_debug > 5) 2222 if (vortex_debug > 5)
2227 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n", 2223 pr_debug("%s: In interrupt loop, status %4.4x.\n",
2228 dev->name, status); 2224 dev->name, status);
2229 if (status & RxComplete) 2225 if (status & RxComplete)
2230 vortex_rx(dev); 2226 vortex_rx(dev);
2231 2227
2232 if (status & TxAvailable) { 2228 if (status & TxAvailable) {
2233 if (vortex_debug > 5) 2229 if (vortex_debug > 5)
2234 printk(KERN_DEBUG " TX room bit was handled.\n"); 2230 pr_debug(" TX room bit was handled.\n");
2235 /* There's room in the FIFO for a full-sized packet. */ 2231 /* There's room in the FIFO for a full-sized packet. */
2236 iowrite16(AckIntr | TxAvailable, ioaddr + EL3_CMD); 2232 iowrite16(AckIntr | TxAvailable, ioaddr + EL3_CMD);
2237 netif_wake_queue (dev); 2233 netif_wake_queue (dev);
@@ -2263,8 +2259,8 @@ vortex_interrupt(int irq, void *dev_id)
2263 } 2259 }
2264 2260
2265 if (--work_done < 0) { 2261 if (--work_done < 0) {
2266 printk(KERN_WARNING "%s: Too much work in interrupt, status " 2262 pr_warning("%s: Too much work in interrupt, status %4.4x.\n",
2267 "%4.4x.\n", dev->name, status); 2263 dev->name, status);
2268 /* Disable all pending interrupts. */ 2264 /* Disable all pending interrupts. */
2269 do { 2265 do {
2270 vp->deferred |= status; 2266 vp->deferred |= status;
@@ -2281,7 +2277,7 @@ vortex_interrupt(int irq, void *dev_id)
2281 } while ((status = ioread16(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete)); 2277 } while ((status = ioread16(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2282 2278
2283 if (vortex_debug > 4) 2279 if (vortex_debug > 4)
2284 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n", 2280 pr_debug("%s: exiting interrupt, status %4.4x.\n",
2285 dev->name, status); 2281 dev->name, status);
2286handler_exit: 2282handler_exit:
2287 spin_unlock(&vp->lock); 2283 spin_unlock(&vp->lock);
@@ -2313,14 +2309,14 @@ boomerang_interrupt(int irq, void *dev_id)
2313 status = ioread16(ioaddr + EL3_STATUS); 2309 status = ioread16(ioaddr + EL3_STATUS);
2314 2310
2315 if (vortex_debug > 6) 2311 if (vortex_debug > 6)
2316 printk(KERN_DEBUG "boomerang_interrupt. status=0x%4x\n", status); 2312 pr_debug("boomerang_interrupt. status=0x%4x\n", status);
2317 2313
2318 if ((status & IntLatch) == 0) 2314 if ((status & IntLatch) == 0)
2319 goto handler_exit; /* No interrupt: shared IRQs can cause this */ 2315 goto handler_exit; /* No interrupt: shared IRQs can cause this */
2320 2316
2321 if (status == 0xffff) { /* h/w no longer present (hotplug)? */ 2317 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2322 if (vortex_debug > 1) 2318 if (vortex_debug > 1)
2323 printk(KERN_DEBUG "boomerang_interrupt(1): status = 0xffff\n"); 2319 pr_debug("boomerang_interrupt(1): status = 0xffff\n");
2324 goto handler_exit; 2320 goto handler_exit;
2325 } 2321 }
2326 2322
@@ -2330,16 +2326,16 @@ boomerang_interrupt(int irq, void *dev_id)
2330 } 2326 }
2331 2327
2332 if (vortex_debug > 4) 2328 if (vortex_debug > 4)
2333 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n", 2329 pr_debug("%s: interrupt, status %4.4x, latency %d ticks.\n",
2334 dev->name, status, ioread8(ioaddr + Timer)); 2330 dev->name, status, ioread8(ioaddr + Timer));
2335 do { 2331 do {
2336 if (vortex_debug > 5) 2332 if (vortex_debug > 5)
2337 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n", 2333 pr_debug("%s: In interrupt loop, status %4.4x.\n",
2338 dev->name, status); 2334 dev->name, status);
2339 if (status & UpComplete) { 2335 if (status & UpComplete) {
2340 iowrite16(AckIntr | UpComplete, ioaddr + EL3_CMD); 2336 iowrite16(AckIntr | UpComplete, ioaddr + EL3_CMD);
2341 if (vortex_debug > 5) 2337 if (vortex_debug > 5)
2342 printk(KERN_DEBUG "boomerang_interrupt->boomerang_rx\n"); 2338 pr_debug("boomerang_interrupt->boomerang_rx\n");
2343 boomerang_rx(dev); 2339 boomerang_rx(dev);
2344 } 2340 }
2345 2341
@@ -2374,7 +2370,7 @@ boomerang_interrupt(int irq, void *dev_id)
2374 dev_kfree_skb_irq(skb); 2370 dev_kfree_skb_irq(skb);
2375 vp->tx_skbuff[entry] = NULL; 2371 vp->tx_skbuff[entry] = NULL;
2376 } else { 2372 } else {
2377 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n"); 2373 pr_debug("boomerang_interrupt: no skb!\n");
2378 } 2374 }
2379 /* dev->stats.tx_packets++; Counted below. */ 2375 /* dev->stats.tx_packets++; Counted below. */
2380 dirty_tx++; 2376 dirty_tx++;
@@ -2382,7 +2378,7 @@ boomerang_interrupt(int irq, void *dev_id)
2382 vp->dirty_tx = dirty_tx; 2378 vp->dirty_tx = dirty_tx;
2383 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) { 2379 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) {
2384 if (vortex_debug > 6) 2380 if (vortex_debug > 6)
2385 printk(KERN_DEBUG "boomerang_interrupt: wake queue\n"); 2381 pr_debug("boomerang_interrupt: wake queue\n");
2386 netif_wake_queue (dev); 2382 netif_wake_queue (dev);
2387 } 2383 }
2388 } 2384 }
@@ -2392,8 +2388,8 @@ boomerang_interrupt(int irq, void *dev_id)
2392 vortex_error(dev, status); 2388 vortex_error(dev, status);
2393 2389
2394 if (--work_done < 0) { 2390 if (--work_done < 0) {
2395 printk(KERN_WARNING "%s: Too much work in interrupt, status " 2391 pr_warning("%s: Too much work in interrupt, status %4.4x.\n",
2396 "%4.4x.\n", dev->name, status); 2392 dev->name, status);
2397 /* Disable all pending interrupts. */ 2393 /* Disable all pending interrupts. */
2398 do { 2394 do {
2399 vp->deferred |= status; 2395 vp->deferred |= status;
@@ -2413,7 +2409,7 @@ boomerang_interrupt(int irq, void *dev_id)
2413 } while ((status = ioread16(ioaddr + EL3_STATUS)) & IntLatch); 2409 } while ((status = ioread16(ioaddr + EL3_STATUS)) & IntLatch);
2414 2410
2415 if (vortex_debug > 4) 2411 if (vortex_debug > 4)
2416 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n", 2412 pr_debug("%s: exiting interrupt, status %4.4x.\n",
2417 dev->name, status); 2413 dev->name, status);
2418handler_exit: 2414handler_exit:
2419 spin_unlock(&vp->lock); 2415 spin_unlock(&vp->lock);
@@ -2428,13 +2424,13 @@ static int vortex_rx(struct net_device *dev)
2428 short rx_status; 2424 short rx_status;
2429 2425
2430 if (vortex_debug > 5) 2426 if (vortex_debug > 5)
2431 printk(KERN_DEBUG "vortex_rx(): status %4.4x, rx_status %4.4x.\n", 2427 pr_debug("vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2432 ioread16(ioaddr+EL3_STATUS), ioread16(ioaddr+RxStatus)); 2428 ioread16(ioaddr+EL3_STATUS), ioread16(ioaddr+RxStatus));
2433 while ((rx_status = ioread16(ioaddr + RxStatus)) > 0) { 2429 while ((rx_status = ioread16(ioaddr + RxStatus)) > 0) {
2434 if (rx_status & 0x4000) { /* Error, update stats. */ 2430 if (rx_status & 0x4000) { /* Error, update stats. */
2435 unsigned char rx_error = ioread8(ioaddr + RxErrors); 2431 unsigned char rx_error = ioread8(ioaddr + RxErrors);
2436 if (vortex_debug > 2) 2432 if (vortex_debug > 2)
2437 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error); 2433 pr_debug(" Rx error: status %2.2x.\n", rx_error);
2438 dev->stats.rx_errors++; 2434 dev->stats.rx_errors++;
2439 if (rx_error & 0x01) dev->stats.rx_over_errors++; 2435 if (rx_error & 0x01) dev->stats.rx_over_errors++;
2440 if (rx_error & 0x02) dev->stats.rx_length_errors++; 2436 if (rx_error & 0x02) dev->stats.rx_length_errors++;
@@ -2448,7 +2444,7 @@ static int vortex_rx(struct net_device *dev)
2448 2444
2449 skb = dev_alloc_skb(pkt_len + 5); 2445 skb = dev_alloc_skb(pkt_len + 5);
2450 if (vortex_debug > 4) 2446 if (vortex_debug > 4)
2451 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n", 2447 pr_debug("Receiving packet size %d status %4.4x.\n",
2452 pkt_len, rx_status); 2448 pkt_len, rx_status);
2453 if (skb != NULL) { 2449 if (skb != NULL) {
2454 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ 2450 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
@@ -2478,8 +2474,8 @@ static int vortex_rx(struct net_device *dev)
2478 break; 2474 break;
2479 continue; 2475 continue;
2480 } else if (vortex_debug > 0) 2476 } else if (vortex_debug > 0)
2481 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of " 2477 pr_notice("%s: No memory to allocate a sk_buff of size %d.\n",
2482 "size %d.\n", dev->name, pkt_len); 2478 dev->name, pkt_len);
2483 dev->stats.rx_dropped++; 2479 dev->stats.rx_dropped++;
2484 } 2480 }
2485 issue_and_wait(dev, RxDiscard); 2481 issue_and_wait(dev, RxDiscard);
@@ -2498,7 +2494,7 @@ boomerang_rx(struct net_device *dev)
2498 int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx; 2494 int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx;
2499 2495
2500 if (vortex_debug > 5) 2496 if (vortex_debug > 5)
2501 printk(KERN_DEBUG "boomerang_rx(): status %4.4x\n", ioread16(ioaddr+EL3_STATUS)); 2497 pr_debug("boomerang_rx(): status %4.4x\n", ioread16(ioaddr+EL3_STATUS));
2502 2498
2503 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){ 2499 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2504 if (--rx_work_limit < 0) 2500 if (--rx_work_limit < 0)
@@ -2506,7 +2502,7 @@ boomerang_rx(struct net_device *dev)
2506 if (rx_status & RxDError) { /* Error, update stats. */ 2502 if (rx_status & RxDError) { /* Error, update stats. */
2507 unsigned char rx_error = rx_status >> 16; 2503 unsigned char rx_error = rx_status >> 16;
2508 if (vortex_debug > 2) 2504 if (vortex_debug > 2)
2509 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error); 2505 pr_debug(" Rx error: status %2.2x.\n", rx_error);
2510 dev->stats.rx_errors++; 2506 dev->stats.rx_errors++;
2511 if (rx_error & 0x01) dev->stats.rx_over_errors++; 2507 if (rx_error & 0x01) dev->stats.rx_over_errors++;
2512 if (rx_error & 0x02) dev->stats.rx_length_errors++; 2508 if (rx_error & 0x02) dev->stats.rx_length_errors++;
@@ -2520,7 +2516,7 @@ boomerang_rx(struct net_device *dev)
2520 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr); 2516 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr);
2521 2517
2522 if (vortex_debug > 4) 2518 if (vortex_debug > 4)
2523 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n", 2519 pr_debug("Receiving packet size %d status %4.4x.\n",
2524 pkt_len, rx_status); 2520 pkt_len, rx_status);
2525 2521
2526 /* Check if the packet is long enough to just accept without 2522 /* Check if the packet is long enough to just accept without
@@ -2566,7 +2562,7 @@ boomerang_rx(struct net_device *dev)
2566 if (skb == NULL) { 2562 if (skb == NULL) {
2567 static unsigned long last_jif; 2563 static unsigned long last_jif;
2568 if (time_after(jiffies, last_jif + 10 * HZ)) { 2564 if (time_after(jiffies, last_jif + 10 * HZ)) {
2569 printk(KERN_WARNING "%s: memory shortage\n", dev->name); 2565 pr_warning("%s: memory shortage\n", dev->name);
2570 last_jif = jiffies; 2566 last_jif = jiffies;
2571 } 2567 }
2572 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) 2568 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE)
@@ -2598,7 +2594,7 @@ rx_oom_timer(unsigned long arg)
2598 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) /* This test is redundant, but makes me feel good */ 2594 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) /* This test is redundant, but makes me feel good */
2599 boomerang_rx(dev); 2595 boomerang_rx(dev);
2600 if (vortex_debug > 1) { 2596 if (vortex_debug > 1) {
2601 printk(KERN_DEBUG "%s: rx_oom_timer %s\n", dev->name, 2597 pr_debug("%s: rx_oom_timer %s\n", dev->name,
2602 ((vp->cur_rx - vp->dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying"); 2598 ((vp->cur_rx - vp->dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying");
2603 } 2599 }
2604 spin_unlock_irq(&vp->lock); 2600 spin_unlock_irq(&vp->lock);
@@ -2655,9 +2651,9 @@ vortex_close(struct net_device *dev)
2655 vortex_down(dev, 1); 2651 vortex_down(dev, 1);
2656 2652
2657 if (vortex_debug > 1) { 2653 if (vortex_debug > 1) {
2658 printk(KERN_DEBUG"%s: vortex_close() status %4.4x, Tx status %2.2x.\n", 2654 pr_debug("%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2659 dev->name, ioread16(ioaddr + EL3_STATUS), ioread8(ioaddr + TxStatus)); 2655 dev->name, ioread16(ioaddr + EL3_STATUS), ioread8(ioaddr + TxStatus));
2660 printk(KERN_DEBUG "%s: vortex close stats: rx_nocopy %d rx_copy %d" 2656 pr_debug("%s: vortex close stats: rx_nocopy %d rx_copy %d"
2661 " tx_queued %d Rx pre-checksummed %d.\n", 2657 " tx_queued %d Rx pre-checksummed %d.\n",
2662 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits); 2658 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits);
2663 } 2659 }
@@ -2666,8 +2662,7 @@ vortex_close(struct net_device *dev)
2666 if (vp->rx_csumhits && 2662 if (vp->rx_csumhits &&
2667 (vp->drv_flags & HAS_HWCKSM) == 0 && 2663 (vp->drv_flags & HAS_HWCKSM) == 0 &&
2668 (vp->card_idx >= MAX_UNITS || hw_checksums[vp->card_idx] == -1)) { 2664 (vp->card_idx >= MAX_UNITS || hw_checksums[vp->card_idx] == -1)) {
2669 printk(KERN_WARNING "%s supports hardware checksums, and we're " 2665 pr_warning("%s supports hardware checksums, and we're not using them!\n", dev->name);
2670 "not using them!\n", dev->name);
2671 } 2666 }
2672#endif 2667#endif
2673 2668
@@ -2717,16 +2712,16 @@ dump_tx_ring(struct net_device *dev)
2717 int i; 2712 int i;
2718 int stalled = ioread32(ioaddr + PktStatus) & 0x04; /* Possible racy. But it's only debug stuff */ 2713 int stalled = ioread32(ioaddr + PktStatus) & 0x04; /* Possible racy. But it's only debug stuff */
2719 2714
2720 printk(KERN_ERR " Flags; bus-master %d, dirty %d(%d) current %d(%d)\n", 2715 pr_err(" Flags; bus-master %d, dirty %d(%d) current %d(%d)\n",
2721 vp->full_bus_master_tx, 2716 vp->full_bus_master_tx,
2722 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE, 2717 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE,
2723 vp->cur_tx, vp->cur_tx % TX_RING_SIZE); 2718 vp->cur_tx, vp->cur_tx % TX_RING_SIZE);
2724 printk(KERN_ERR " Transmit list %8.8x vs. %p.\n", 2719 pr_err(" Transmit list %8.8x vs. %p.\n",
2725 ioread32(ioaddr + DownListPtr), 2720 ioread32(ioaddr + DownListPtr),
2726 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]); 2721 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]);
2727 issue_and_wait(dev, DownStall); 2722 issue_and_wait(dev, DownStall);
2728 for (i = 0; i < TX_RING_SIZE; i++) { 2723 for (i = 0; i < TX_RING_SIZE; i++) {
2729 printk(KERN_ERR " %d: @%p length %8.8x status %8.8x\n", i, 2724 pr_err(" %d: @%p length %8.8x status %8.8x\n", i,
2730 &vp->tx_ring[i], 2725 &vp->tx_ring[i],
2731#if DO_ZEROCOPY 2726#if DO_ZEROCOPY
2732 le32_to_cpu(vp->tx_ring[i].frag[0].length), 2727 le32_to_cpu(vp->tx_ring[i].frag[0].length),
@@ -2970,7 +2965,7 @@ static void set_rx_mode(struct net_device *dev)
2970 2965
2971 if (dev->flags & IFF_PROMISC) { 2966 if (dev->flags & IFF_PROMISC) {
2972 if (vortex_debug > 3) 2967 if (vortex_debug > 3)
2973 printk(KERN_NOTICE "%s: Setting promiscuous mode.\n", dev->name); 2968 pr_notice("%s: Setting promiscuous mode.\n", dev->name);
2974 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm; 2969 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm;
2975 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) { 2970 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) {
2976 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast; 2971 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
@@ -3145,8 +3140,7 @@ static void acpi_set_WOL(struct net_device *dev)
3145 iowrite16(RxEnable, ioaddr + EL3_CMD); 3140 iowrite16(RxEnable, ioaddr + EL3_CMD);
3146 3141
3147 if (pci_enable_wake(VORTEX_PCI(vp), PCI_D3hot, 1)) { 3142 if (pci_enable_wake(VORTEX_PCI(vp), PCI_D3hot, 1)) {
3148 printk(KERN_INFO "%s: WOL not supported.\n", 3143 pr_info("%s: WOL not supported.\n", pci_name(VORTEX_PCI(vp)));
3149 pci_name(VORTEX_PCI(vp)));
3150 3144
3151 vp->enable_wol = 0; 3145 vp->enable_wol = 0;
3152 return; 3146 return;
@@ -3164,7 +3158,7 @@ static void __devexit vortex_remove_one(struct pci_dev *pdev)
3164 struct vortex_private *vp; 3158 struct vortex_private *vp;
3165 3159
3166 if (!dev) { 3160 if (!dev) {
3167 printk("vortex_remove_one called for Compaq device!\n"); 3161 pr_err("vortex_remove_one called for Compaq device!\n");
3168 BUG(); 3162 BUG();
3169 } 3163 }
3170 3164
diff --git a/drivers/net/8139cp.c b/drivers/net/8139cp.c
index 02330f3d5a55..c9fc0ff14a4d 100644
--- a/drivers/net/8139cp.c
+++ b/drivers/net/8139cp.c
@@ -471,8 +471,7 @@ static void cp_rx_err_acct (struct cp_private *cp, unsigned rx_tail,
471 u32 status, u32 len) 471 u32 status, u32 len)
472{ 472{
473 if (netif_msg_rx_err (cp)) 473 if (netif_msg_rx_err (cp))
474 printk (KERN_DEBUG 474 pr_debug("%s: rx err, slot %d status 0x%x len %d\n",
475 "%s: rx err, slot %d status 0x%x len %d\n",
476 cp->dev->name, rx_tail, status, len); 475 cp->dev->name, rx_tail, status, len);
477 cp->dev->stats.rx_errors++; 476 cp->dev->stats.rx_errors++;
478 if (status & RxErrFrame) 477 if (status & RxErrFrame)
@@ -547,7 +546,7 @@ rx_status_loop:
547 } 546 }
548 547
549 if (netif_msg_rx_status(cp)) 548 if (netif_msg_rx_status(cp))
550 printk(KERN_DEBUG "%s: rx slot %d status 0x%x len %d\n", 549 pr_debug("%s: rx slot %d status 0x%x len %d\n",
551 dev->name, rx_tail, status, len); 550 dev->name, rx_tail, status, len);
552 551
553 buflen = cp->rx_buf_sz + NET_IP_ALIGN; 552 buflen = cp->rx_buf_sz + NET_IP_ALIGN;
@@ -626,7 +625,7 @@ static irqreturn_t cp_interrupt (int irq, void *dev_instance)
626 return IRQ_NONE; 625 return IRQ_NONE;
627 626
628 if (netif_msg_intr(cp)) 627 if (netif_msg_intr(cp))
629 printk(KERN_DEBUG "%s: intr, status %04x cmd %02x cpcmd %04x\n", 628 pr_debug("%s: intr, status %04x cmd %02x cpcmd %04x\n",
630 dev->name, status, cpr8(Cmd), cpr16(CpCmd)); 629 dev->name, status, cpr8(Cmd), cpr16(CpCmd));
631 630
632 cpw16(IntrStatus, status & ~cp_rx_intr_mask); 631 cpw16(IntrStatus, status & ~cp_rx_intr_mask);
@@ -658,7 +657,7 @@ static irqreturn_t cp_interrupt (int irq, void *dev_instance)
658 657
659 pci_read_config_word(cp->pdev, PCI_STATUS, &pci_status); 658 pci_read_config_word(cp->pdev, PCI_STATUS, &pci_status);
660 pci_write_config_word(cp->pdev, PCI_STATUS, pci_status); 659 pci_write_config_word(cp->pdev, PCI_STATUS, pci_status);
661 printk(KERN_ERR "%s: PCI bus error, status=%04x, PCI status=%04x\n", 660 pr_err("%s: PCI bus error, status=%04x, PCI status=%04x\n",
662 dev->name, status, pci_status); 661 dev->name, status, pci_status);
663 662
664 /* TODO: reset hardware */ 663 /* TODO: reset hardware */
@@ -705,7 +704,7 @@ static void cp_tx (struct cp_private *cp)
705 if (status & LastFrag) { 704 if (status & LastFrag) {
706 if (status & (TxError | TxFIFOUnder)) { 705 if (status & (TxError | TxFIFOUnder)) {
707 if (netif_msg_tx_err(cp)) 706 if (netif_msg_tx_err(cp))
708 printk(KERN_DEBUG "%s: tx err, status 0x%x\n", 707 pr_debug("%s: tx err, status 0x%x\n",
709 cp->dev->name, status); 708 cp->dev->name, status);
710 cp->dev->stats.tx_errors++; 709 cp->dev->stats.tx_errors++;
711 if (status & TxOWC) 710 if (status & TxOWC)
@@ -722,7 +721,7 @@ static void cp_tx (struct cp_private *cp)
722 cp->dev->stats.tx_packets++; 721 cp->dev->stats.tx_packets++;
723 cp->dev->stats.tx_bytes += skb->len; 722 cp->dev->stats.tx_bytes += skb->len;
724 if (netif_msg_tx_done(cp)) 723 if (netif_msg_tx_done(cp))
725 printk(KERN_DEBUG "%s: tx done, slot %d\n", cp->dev->name, tx_tail); 724 pr_debug("%s: tx done, slot %d\n", cp->dev->name, tx_tail);
726 } 725 }
727 dev_kfree_skb_irq(skb); 726 dev_kfree_skb_irq(skb);
728 } 727 }
@@ -755,7 +754,7 @@ static int cp_start_xmit (struct sk_buff *skb, struct net_device *dev)
755 if (TX_BUFFS_AVAIL(cp) <= (skb_shinfo(skb)->nr_frags + 1)) { 754 if (TX_BUFFS_AVAIL(cp) <= (skb_shinfo(skb)->nr_frags + 1)) {
756 netif_stop_queue(dev); 755 netif_stop_queue(dev);
757 spin_unlock_irqrestore(&cp->lock, intr_flags); 756 spin_unlock_irqrestore(&cp->lock, intr_flags);
758 printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n", 757 pr_err(PFX "%s: BUG! Tx Ring full when queue awake!\n",
759 dev->name); 758 dev->name);
760 return 1; 759 return 1;
761 } 760 }
@@ -882,7 +881,7 @@ static int cp_start_xmit (struct sk_buff *skb, struct net_device *dev)
882 } 881 }
883 cp->tx_head = entry; 882 cp->tx_head = entry;
884 if (netif_msg_tx_queued(cp)) 883 if (netif_msg_tx_queued(cp))
885 printk(KERN_DEBUG "%s: tx queued, slot %d, skblen %d\n", 884 pr_debug("%s: tx queued, slot %d, skblen %d\n",
886 dev->name, entry, skb->len); 885 dev->name, entry, skb->len);
887 if (TX_BUFFS_AVAIL(cp) <= (MAX_SKB_FRAGS + 1)) 886 if (TX_BUFFS_AVAIL(cp) <= (MAX_SKB_FRAGS + 1))
888 netif_stop_queue(dev); 887 netif_stop_queue(dev);
@@ -996,7 +995,7 @@ static void cp_reset_hw (struct cp_private *cp)
996 schedule_timeout_uninterruptible(10); 995 schedule_timeout_uninterruptible(10);
997 } 996 }
998 997
999 printk(KERN_ERR "%s: hardware reset timeout\n", cp->dev->name); 998 pr_err("%s: hardware reset timeout\n", cp->dev->name);
1000} 999}
1001 1000
1002static inline void cp_start_hw (struct cp_private *cp) 1001static inline void cp_start_hw (struct cp_private *cp)
@@ -1166,7 +1165,7 @@ static int cp_open (struct net_device *dev)
1166 int rc; 1165 int rc;
1167 1166
1168 if (netif_msg_ifup(cp)) 1167 if (netif_msg_ifup(cp))
1169 printk(KERN_DEBUG "%s: enabling interface\n", dev->name); 1168 pr_debug("%s: enabling interface\n", dev->name);
1170 1169
1171 rc = cp_alloc_rings(cp); 1170 rc = cp_alloc_rings(cp);
1172 if (rc) 1171 if (rc)
@@ -1201,7 +1200,7 @@ static int cp_close (struct net_device *dev)
1201 napi_disable(&cp->napi); 1200 napi_disable(&cp->napi);
1202 1201
1203 if (netif_msg_ifdown(cp)) 1202 if (netif_msg_ifdown(cp))
1204 printk(KERN_DEBUG "%s: disabling interface\n", dev->name); 1203 pr_debug("%s: disabling interface\n", dev->name);
1205 1204
1206 spin_lock_irqsave(&cp->lock, flags); 1205 spin_lock_irqsave(&cp->lock, flags);
1207 1206
@@ -1224,7 +1223,7 @@ static void cp_tx_timeout(struct net_device *dev)
1224 unsigned long flags; 1223 unsigned long flags;
1225 int rc; 1224 int rc;
1226 1225
1227 printk(KERN_WARNING "%s: Transmit timeout, status %2x %4x %4x %4x\n", 1226 pr_warning("%s: Transmit timeout, status %2x %4x %4x %4x\n",
1228 dev->name, cpr8(Cmd), cpr16(CpCmd), 1227 dev->name, cpr8(Cmd), cpr16(CpCmd),
1229 cpr16(IntrStatus), cpr16(IntrMask)); 1228 cpr16(IntrStatus), cpr16(IntrMask));
1230 1229
@@ -1873,7 +1872,7 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1873#ifndef MODULE 1872#ifndef MODULE
1874 static int version_printed; 1873 static int version_printed;
1875 if (version_printed++ == 0) 1874 if (version_printed++ == 0)
1876 printk("%s", version); 1875 pr_info("%s", version);
1877#endif 1876#endif
1878 1877
1879 if (pdev->vendor == PCI_VENDOR_ID_REALTEK && 1878 if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
@@ -1995,8 +1994,7 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1995 if (rc) 1994 if (rc)
1996 goto err_out_iomap; 1995 goto err_out_iomap;
1997 1996
1998 printk (KERN_INFO "%s: RTL-8139C+ at 0x%lx, " 1997 pr_info("%s: RTL-8139C+ at 0x%lx, %pM, IRQ %d\n",
1999 "%pM, IRQ %d\n",
2000 dev->name, 1998 dev->name,
2001 dev->base_addr, 1999 dev->base_addr,
2002 dev->dev_addr, 2000 dev->dev_addr,
@@ -2113,7 +2111,7 @@ static struct pci_driver cp_driver = {
2113static int __init cp_init (void) 2111static int __init cp_init (void)
2114{ 2112{
2115#ifdef MODULE 2113#ifdef MODULE
2116 printk("%s", version); 2114 pr_info("%s", version);
2117#endif 2115#endif
2118 return pci_register_driver(&cp_driver); 2116 return pci_register_driver(&cp_driver);
2119} 2117}
diff --git a/drivers/net/8139too.c b/drivers/net/8139too.c
index 1fc45431a620..8ae72ec14456 100644
--- a/drivers/net/8139too.c
+++ b/drivers/net/8139too.c
@@ -126,19 +126,12 @@
126#undef RTL8139_NDEBUG 126#undef RTL8139_NDEBUG
127 127
128 128
129#if RTL8139_DEBUG
130/* note: prints function name for you */
131# define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
132#else
133# define DPRINTK(fmt, args...)
134#endif
135
136#ifdef RTL8139_NDEBUG 129#ifdef RTL8139_NDEBUG
137# define assert(expr) do {} while (0) 130# define assert(expr) do {} while (0)
138#else 131#else
139# define assert(expr) \ 132# define assert(expr) \
140 if(unlikely(!(expr))) { \ 133 if(unlikely(!(expr))) { \
141 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \ 134 pr_err("Assertion failed! %s,%s,%s,line=%d\n", \
142 #expr, __FILE__, __func__, __LINE__); \ 135 #expr, __FILE__, __func__, __LINE__); \
143 } 136 }
144#endif 137#endif
@@ -784,8 +777,8 @@ static __devinit struct net_device * rtl8139_init_board (struct pci_dev *pdev)
784 777
785 /* set this immediately, we need to know before 778 /* set this immediately, we need to know before
786 * we talk to the chip directly */ 779 * we talk to the chip directly */
787 DPRINTK("PIO region size == 0x%02X\n", pio_len); 780 pr_debug("PIO region size == 0x%02lX\n", pio_len);
788 DPRINTK("MMIO region size == 0x%02lX\n", mmio_len); 781 pr_debug("MMIO region size == 0x%02lX\n", mmio_len);
789 782
790retry: 783retry:
791 if (use_io) { 784 if (use_io) {
@@ -865,19 +858,17 @@ retry:
865 } 858 }
866 859
867 /* if unknown chip, assume array element #0, original RTL-8139 in this case */ 860 /* if unknown chip, assume array element #0, original RTL-8139 in this case */
868 dev_printk (KERN_DEBUG, &pdev->dev, 861 dev_dbg(&pdev->dev, "unknown chip version, assuming RTL-8139\n");
869 "unknown chip version, assuming RTL-8139\n"); 862 dev_dbg(&pdev->dev, "TxConfig = 0x%lx\n", RTL_R32 (TxConfig));
870 dev_printk (KERN_DEBUG, &pdev->dev,
871 "TxConfig = 0x%lx\n", RTL_R32 (TxConfig));
872 tp->chipset = 0; 863 tp->chipset = 0;
873 864
874match: 865match:
875 DPRINTK ("chipset id (%d) == index %d, '%s'\n", 866 pr_debug("chipset id (%d) == index %d, '%s'\n",
876 version, i, rtl_chip_info[i].name); 867 version, i, rtl_chip_info[i].name);
877 868
878 if (tp->chipset >= CH_8139B) { 869 if (tp->chipset >= CH_8139B) {
879 u8 new_tmp8 = tmp8 = RTL_R8 (Config1); 870 u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
880 DPRINTK("PCI PM wakeup\n"); 871 pr_debug("PCI PM wakeup\n");
881 if ((rtl_chip_info[tp->chipset].flags & HasLWake) && 872 if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
882 (tmp8 & LWAKE)) 873 (tmp8 & LWAKE))
883 new_tmp8 &= ~LWAKE; 874 new_tmp8 &= ~LWAKE;
@@ -896,7 +887,7 @@ match:
896 } 887 }
897 } 888 }
898 } else { 889 } else {
899 DPRINTK("Old chip wakeup\n"); 890 pr_debug("Old chip wakeup\n");
900 tmp8 = RTL_R8 (Config1); 891 tmp8 = RTL_R8 (Config1);
901 tmp8 &= ~(SLEEP | PWRDN); 892 tmp8 &= ~(SLEEP | PWRDN);
902 RTL_W8 (Config1, tmp8); 893 RTL_W8 (Config1, tmp8);
@@ -949,7 +940,7 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev,
949 { 940 {
950 static int printed_version; 941 static int printed_version;
951 if (!printed_version++) 942 if (!printed_version++)
952 printk (KERN_INFO RTL8139_DRIVER_NAME "\n"); 943 pr_info(RTL8139_DRIVER_NAME "\n");
953 } 944 }
954#endif 945#endif
955 946
@@ -965,7 +956,7 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev,
965 pdev->device == PCI_DEVICE_ID_REALTEK_8139 && 956 pdev->device == PCI_DEVICE_ID_REALTEK_8139 &&
966 pdev->subsystem_vendor == PCI_VENDOR_ID_ATHEROS && 957 pdev->subsystem_vendor == PCI_VENDOR_ID_ATHEROS &&
967 pdev->subsystem_device == PCI_DEVICE_ID_REALTEK_8139) { 958 pdev->subsystem_device == PCI_DEVICE_ID_REALTEK_8139) {
968 printk(KERN_INFO "8139too: OQO Model 2 detected. Forcing PIO\n"); 959 pr_info("8139too: OQO Model 2 detected. Forcing PIO\n");
969 use_io = 1; 960 use_io = 1;
970 } 961 }
971 962
@@ -1018,21 +1009,20 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev,
1018 tp->mii.reg_num_mask = 0x1f; 1009 tp->mii.reg_num_mask = 0x1f;
1019 1010
1020 /* dev is fully set up and ready to use now */ 1011 /* dev is fully set up and ready to use now */
1021 DPRINTK("about to register device named %s (%p)...\n", dev->name, dev); 1012 pr_debug("about to register device named %s (%p)...\n", dev->name, dev);
1022 i = register_netdev (dev); 1013 i = register_netdev (dev);
1023 if (i) goto err_out; 1014 if (i) goto err_out;
1024 1015
1025 pci_set_drvdata (pdev, dev); 1016 pci_set_drvdata (pdev, dev);
1026 1017
1027 printk (KERN_INFO "%s: %s at 0x%lx, " 1018 pr_info("%s: %s at 0x%lx, %pM, IRQ %d\n",
1028 "%pM, IRQ %d\n",
1029 dev->name, 1019 dev->name,
1030 board_info[ent->driver_data].name, 1020 board_info[ent->driver_data].name,
1031 dev->base_addr, 1021 dev->base_addr,
1032 dev->dev_addr, 1022 dev->dev_addr,
1033 dev->irq); 1023 dev->irq);
1034 1024
1035 printk (KERN_DEBUG "%s: Identified 8139 chip type '%s'\n", 1025 pr_debug("%s: Identified 8139 chip type '%s'\n",
1036 dev->name, rtl_chip_info[tp->chipset].name); 1026 dev->name, rtl_chip_info[tp->chipset].name);
1037 1027
1038 /* Find the connected MII xcvrs. 1028 /* Find the connected MII xcvrs.
@@ -1046,14 +1036,12 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev,
1046 if (mii_status != 0xffff && mii_status != 0x0000) { 1036 if (mii_status != 0xffff && mii_status != 0x0000) {
1047 u16 advertising = mdio_read(dev, phy, 4); 1037 u16 advertising = mdio_read(dev, phy, 4);
1048 tp->phys[phy_idx++] = phy; 1038 tp->phys[phy_idx++] = phy;
1049 printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x " 1039 pr_info("%s: MII transceiver %d status 0x%4.4x advertising %4.4x.\n",
1050 "advertising %4.4x.\n",
1051 dev->name, phy, mii_status, advertising); 1040 dev->name, phy, mii_status, advertising);
1052 } 1041 }
1053 } 1042 }
1054 if (phy_idx == 0) { 1043 if (phy_idx == 0) {
1055 printk(KERN_INFO "%s: No MII transceivers found! Assuming SYM " 1044 pr_info("%s: No MII transceivers found! Assuming SYM transceiver.\n",
1056 "transceiver.\n",
1057 dev->name); 1045 dev->name);
1058 tp->phys[0] = 32; 1046 tp->phys[0] = 32;
1059 } 1047 }
@@ -1073,13 +1061,13 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev,
1073 if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0) 1061 if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0)
1074 tp->mii.full_duplex = full_duplex[board_idx]; 1062 tp->mii.full_duplex = full_duplex[board_idx];
1075 if (tp->mii.full_duplex) { 1063 if (tp->mii.full_duplex) {
1076 printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name); 1064 pr_info("%s: Media type forced to Full Duplex.\n", dev->name);
1077 /* Changing the MII-advertised media because might prevent 1065 /* Changing the MII-advertised media because might prevent
1078 re-connection. */ 1066 re-connection. */
1079 tp->mii.force_media = 1; 1067 tp->mii.force_media = 1;
1080 } 1068 }
1081 if (tp->default_port) { 1069 if (tp->default_port) {
1082 printk(KERN_INFO " Forcing %dMbps %s-duplex operation.\n", 1070 pr_info(" Forcing %dMbps %s-duplex operation.\n",
1083 (option & 0x20 ? 100 : 10), 1071 (option & 0x20 ? 100 : 10),
1084 (option & 0x10 ? "full" : "half")); 1072 (option & 0x10 ? "full" : "half"));
1085 mdio_write(dev, tp->phys[0], 0, 1073 mdio_write(dev, tp->phys[0], 0,
@@ -1342,7 +1330,7 @@ static int rtl8139_open (struct net_device *dev)
1342 netif_start_queue (dev); 1330 netif_start_queue (dev);
1343 1331
1344 if (netif_msg_ifup(tp)) 1332 if (netif_msg_ifup(tp))
1345 printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#llx IRQ %d" 1333 pr_debug("%s: rtl8139_open() ioaddr %#llx IRQ %d"
1346 " GP Pins %2.2x %s-duplex.\n", dev->name, 1334 " GP Pins %2.2x %s-duplex.\n", dev->name,
1347 (unsigned long long)pci_resource_start (tp->pci_dev, 1), 1335 (unsigned long long)pci_resource_start (tp->pci_dev, 1),
1348 dev->irq, RTL_R8 (MediaStatus), 1336 dev->irq, RTL_R8 (MediaStatus),
@@ -1404,7 +1392,7 @@ static void rtl8139_hw_start (struct net_device *dev)
1404 RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic); 1392 RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
1405 } 1393 }
1406 1394
1407 DPRINTK("init buffer addresses\n"); 1395 pr_debug("init buffer addresses\n");
1408 1396
1409 /* Lock Config[01234] and BMCR register writes */ 1397 /* Lock Config[01234] and BMCR register writes */
1410 RTL_W8 (Cfg9346, Cfg9346_Lock); 1398 RTL_W8 (Cfg9346, Cfg9346_Lock);
@@ -1566,14 +1554,13 @@ static inline void rtl8139_thread_iter (struct net_device *dev,
1566 tp->mii.full_duplex = duplex; 1554 tp->mii.full_duplex = duplex;
1567 1555
1568 if (mii_lpa) { 1556 if (mii_lpa) {
1569 printk (KERN_INFO 1557 pr_info("%s: Setting %s-duplex based on MII #%d link"
1570 "%s: Setting %s-duplex based on MII #%d link"
1571 " partner ability of %4.4x.\n", 1558 " partner ability of %4.4x.\n",
1572 dev->name, 1559 dev->name,
1573 tp->mii.full_duplex ? "full" : "half", 1560 tp->mii.full_duplex ? "full" : "half",
1574 tp->phys[0], mii_lpa); 1561 tp->phys[0], mii_lpa);
1575 } else { 1562 } else {
1576 printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n", 1563 pr_info("%s: media is unconnected, link down, or incompatible connection\n",
1577 dev->name); 1564 dev->name);
1578 } 1565 }
1579#if 0 1566#if 0
@@ -1588,11 +1575,11 @@ static inline void rtl8139_thread_iter (struct net_device *dev,
1588 1575
1589 rtl8139_tune_twister (dev, tp); 1576 rtl8139_tune_twister (dev, tp);
1590 1577
1591 DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n", 1578 pr_debug("%s: Media selection tick, Link partner %4.4x.\n",
1592 dev->name, RTL_R16 (NWayLPAR)); 1579 dev->name, RTL_R16 (NWayLPAR));
1593 DPRINTK ("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n", 1580 pr_debug("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n",
1594 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus)); 1581 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus));
1595 DPRINTK ("%s: Chip config %2.2x %2.2x.\n", 1582 pr_debug("%s: Chip config %2.2x %2.2x.\n",
1596 dev->name, RTL_R8 (Config0), 1583 dev->name, RTL_R8 (Config0),
1597 RTL_R8 (Config1)); 1584 RTL_R8 (Config1));
1598} 1585}
@@ -1652,14 +1639,14 @@ static void rtl8139_tx_timeout_task (struct work_struct *work)
1652 int i; 1639 int i;
1653 u8 tmp8; 1640 u8 tmp8;
1654 1641
1655 printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x " 1642 pr_debug("%s: Transmit timeout, status %2.2x %4.4x %4.4x media %2.2x.\n",
1656 "media %2.2x.\n", dev->name, RTL_R8 (ChipCmd), 1643 dev->name, RTL_R8 (ChipCmd),
1657 RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus)); 1644 RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus));
1658 /* Emit info to figure out what went wrong. */ 1645 /* Emit info to figure out what went wrong. */
1659 printk (KERN_DEBUG "%s: Tx queue start entry %ld dirty entry %ld.\n", 1646 pr_debug("%s: Tx queue start entry %ld dirty entry %ld.\n",
1660 dev->name, tp->cur_tx, tp->dirty_tx); 1647 dev->name, tp->cur_tx, tp->dirty_tx);
1661 for (i = 0; i < NUM_TX_DESC; i++) 1648 for (i = 0; i < NUM_TX_DESC; i++)
1662 printk (KERN_DEBUG "%s: Tx descriptor %d is %8.8lx.%s\n", 1649 pr_debug("%s: Tx descriptor %d is %8.8lx.%s\n",
1663 dev->name, i, RTL_R32 (TxStatus0 + (i * 4)), 1650 dev->name, i, RTL_R32 (TxStatus0 + (i * 4)),
1664 i == tp->dirty_tx % NUM_TX_DESC ? 1651 i == tp->dirty_tx % NUM_TX_DESC ?
1665 " (queue head)" : ""); 1652 " (queue head)" : "");
@@ -1741,7 +1728,7 @@ static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
1741 spin_unlock_irqrestore(&tp->lock, flags); 1728 spin_unlock_irqrestore(&tp->lock, flags);
1742 1729
1743 if (netif_msg_tx_queued(tp)) 1730 if (netif_msg_tx_queued(tp))
1744 printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n", 1731 pr_debug("%s: Queued Tx packet size %u to slot %d.\n",
1745 dev->name, len, entry); 1732 dev->name, len, entry);
1746 1733
1747 return 0; 1734 return 0;
@@ -1772,7 +1759,7 @@ static void rtl8139_tx_interrupt (struct net_device *dev,
1772 if (txstatus & (TxOutOfWindow | TxAborted)) { 1759 if (txstatus & (TxOutOfWindow | TxAborted)) {
1773 /* There was an major error, log it. */ 1760 /* There was an major error, log it. */
1774 if (netif_msg_tx_err(tp)) 1761 if (netif_msg_tx_err(tp))
1775 printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n", 1762 pr_debug("%s: Transmit error, Tx status %8.8x.\n",
1776 dev->name, txstatus); 1763 dev->name, txstatus);
1777 dev->stats.tx_errors++; 1764 dev->stats.tx_errors++;
1778 if (txstatus & TxAborted) { 1765 if (txstatus & TxAborted) {
@@ -1803,7 +1790,7 @@ static void rtl8139_tx_interrupt (struct net_device *dev,
1803 1790
1804#ifndef RTL8139_NDEBUG 1791#ifndef RTL8139_NDEBUG
1805 if (tp->cur_tx - dirty_tx > NUM_TX_DESC) { 1792 if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
1806 printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n", 1793 pr_err("%s: Out-of-sync dirty pointer, %ld vs. %ld.\n",
1807 dev->name, dirty_tx, tp->cur_tx); 1794 dev->name, dirty_tx, tp->cur_tx);
1808 dirty_tx += NUM_TX_DESC; 1795 dirty_tx += NUM_TX_DESC;
1809 } 1796 }
@@ -1828,12 +1815,12 @@ static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
1828#endif 1815#endif
1829 1816
1830 if (netif_msg_rx_err (tp)) 1817 if (netif_msg_rx_err (tp))
1831 printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n", 1818 pr_debug("%s: Ethernet frame had errors, status %8.8x.\n",
1832 dev->name, rx_status); 1819 dev->name, rx_status);
1833 dev->stats.rx_errors++; 1820 dev->stats.rx_errors++;
1834 if (!(rx_status & RxStatusOK)) { 1821 if (!(rx_status & RxStatusOK)) {
1835 if (rx_status & RxTooLong) { 1822 if (rx_status & RxTooLong) {
1836 DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n", 1823 pr_debug("%s: Oversized Ethernet frame, status %4.4x!\n",
1837 dev->name, rx_status); 1824 dev->name, rx_status);
1838 /* A.C.: The chip hangs here. */ 1825 /* A.C.: The chip hangs here. */
1839 } 1826 }
@@ -1866,7 +1853,7 @@ static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
1866 break; 1853 break;
1867 } 1854 }
1868 if (tmp_work <= 0) 1855 if (tmp_work <= 0)
1869 printk (KERN_WARNING PFX "rx stop wait too long\n"); 1856 pr_warning(PFX "rx stop wait too long\n");
1870 /* restart receive */ 1857 /* restart receive */
1871 tmp_work = 200; 1858 tmp_work = 200;
1872 while (--tmp_work > 0) { 1859 while (--tmp_work > 0) {
@@ -1877,7 +1864,7 @@ static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
1877 break; 1864 break;
1878 } 1865 }
1879 if (tmp_work <= 0) 1866 if (tmp_work <= 0)
1880 printk (KERN_WARNING PFX "tx/rx enable wait too long\n"); 1867 pr_warning(PFX "tx/rx enable wait too long\n");
1881 1868
1882 /* and reinitialize all rx related registers */ 1869 /* and reinitialize all rx related registers */
1883 RTL_W8_F (Cfg9346, Cfg9346_Unlock); 1870 RTL_W8_F (Cfg9346, Cfg9346_Unlock);
@@ -1888,7 +1875,7 @@ static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
1888 RTL_W32 (RxConfig, tp->rx_config); 1875 RTL_W32 (RxConfig, tp->rx_config);
1889 tp->cur_rx = 0; 1876 tp->cur_rx = 0;
1890 1877
1891 DPRINTK("init buffer addresses\n"); 1878 pr_debug("init buffer addresses\n");
1892 1879
1893 /* Lock Config[01234] and BMCR register writes */ 1880 /* Lock Config[01234] and BMCR register writes */
1894 RTL_W8 (Cfg9346, Cfg9346_Lock); 1881 RTL_W8 (Cfg9346, Cfg9346_Lock);
@@ -1942,7 +1929,7 @@ static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
1942 unsigned int cur_rx = tp->cur_rx; 1929 unsigned int cur_rx = tp->cur_rx;
1943 unsigned int rx_size = 0; 1930 unsigned int rx_size = 0;
1944 1931
1945 DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x," 1932 pr_debug("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
1946 " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx, 1933 " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx,
1947 RTL_R16 (RxBufAddr), 1934 RTL_R16 (RxBufAddr),
1948 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); 1935 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
@@ -1962,17 +1949,17 @@ static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
1962 pkt_size = rx_size - 4; 1949 pkt_size = rx_size - 4;
1963 1950
1964 if (netif_msg_rx_status(tp)) 1951 if (netif_msg_rx_status(tp))
1965 printk(KERN_DEBUG "%s: rtl8139_rx() status %4.4x, size %4.4x," 1952 pr_debug("%s: rtl8139_rx() status %4.4x, size %4.4x,"
1966 " cur %4.4x.\n", dev->name, rx_status, 1953 " cur %4.4x.\n", dev->name, rx_status,
1967 rx_size, cur_rx); 1954 rx_size, cur_rx);
1968#if RTL8139_DEBUG > 2 1955#if RTL8139_DEBUG > 2
1969 { 1956 {
1970 int i; 1957 int i;
1971 DPRINTK ("%s: Frame contents ", dev->name); 1958 pr_debug("%s: Frame contents ", dev->name);
1972 for (i = 0; i < 70; i++) 1959 for (i = 0; i < 70; i++)
1973 printk (" %2.2x", 1960 pr_cont(" %2.2x",
1974 rx_ring[ring_offset + i]); 1961 rx_ring[ring_offset + i]);
1975 printk (".\n"); 1962 pr_cont(".\n");
1976 } 1963 }
1977#endif 1964#endif
1978 1965
@@ -1984,12 +1971,12 @@ static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
1984 if (!tp->fifo_copy_timeout) 1971 if (!tp->fifo_copy_timeout)
1985 tp->fifo_copy_timeout = jiffies + 2; 1972 tp->fifo_copy_timeout = jiffies + 2;
1986 else if (time_after(jiffies, tp->fifo_copy_timeout)) { 1973 else if (time_after(jiffies, tp->fifo_copy_timeout)) {
1987 DPRINTK ("%s: hung FIFO. Reset.", dev->name); 1974 pr_debug("%s: hung FIFO. Reset.", dev->name);
1988 rx_size = 0; 1975 rx_size = 0;
1989 goto no_early_rx; 1976 goto no_early_rx;
1990 } 1977 }
1991 if (netif_msg_intr(tp)) { 1978 if (netif_msg_intr(tp)) {
1992 printk(KERN_DEBUG "%s: fifo copy in progress.", 1979 pr_debug("%s: fifo copy in progress.",
1993 dev->name); 1980 dev->name);
1994 } 1981 }
1995 tp->xstats.early_rx++; 1982 tp->xstats.early_rx++;
@@ -2033,8 +2020,7 @@ no_early_rx:
2033 netif_receive_skb (skb); 2020 netif_receive_skb (skb);
2034 } else { 2021 } else {
2035 if (net_ratelimit()) 2022 if (net_ratelimit())
2036 printk (KERN_WARNING 2023 pr_warning("%s: Memory squeeze, dropping packet.\n",
2037 "%s: Memory squeeze, dropping packet.\n",
2038 dev->name); 2024 dev->name);
2039 dev->stats.rx_dropped++; 2025 dev->stats.rx_dropped++;
2040 } 2026 }
@@ -2049,12 +2035,10 @@ no_early_rx:
2049 if (unlikely(!received || rx_size == 0xfff0)) 2035 if (unlikely(!received || rx_size == 0xfff0))
2050 rtl8139_isr_ack(tp); 2036 rtl8139_isr_ack(tp);
2051 2037
2052#if RTL8139_DEBUG > 1 2038 pr_debug("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
2053 DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
2054 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, 2039 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
2055 RTL_R16 (RxBufAddr), 2040 RTL_R16 (RxBufAddr),
2056 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); 2041 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
2057#endif
2058 2042
2059 tp->cur_rx = cur_rx; 2043 tp->cur_rx = cur_rx;
2060 2044
@@ -2075,7 +2059,7 @@ static void rtl8139_weird_interrupt (struct net_device *dev,
2075 void __iomem *ioaddr, 2059 void __iomem *ioaddr,
2076 int status, int link_changed) 2060 int status, int link_changed)
2077{ 2061{
2078 DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n", 2062 pr_debug("%s: Abnormal interrupt, status %8.8x.\n",
2079 dev->name, status); 2063 dev->name, status);
2080 2064
2081 assert (dev != NULL); 2065 assert (dev != NULL);
@@ -2104,7 +2088,7 @@ static void rtl8139_weird_interrupt (struct net_device *dev,
2104 pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status); 2088 pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
2105 pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status); 2089 pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
2106 2090
2107 printk (KERN_ERR "%s: PCI Bus error %4.4x.\n", 2091 pr_err("%s: PCI Bus error %4.4x.\n",
2108 dev->name, pci_cmd_status); 2092 dev->name, pci_cmd_status);
2109 } 2093 }
2110} 2094}
@@ -2198,7 +2182,7 @@ static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance)
2198 out: 2182 out:
2199 spin_unlock (&tp->lock); 2183 spin_unlock (&tp->lock);
2200 2184
2201 DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n", 2185 pr_debug("%s: exiting interrupt, intr_status=%#4.4x.\n",
2202 dev->name, RTL_R16 (IntrStatus)); 2186 dev->name, RTL_R16 (IntrStatus));
2203 return IRQ_RETVAL(handled); 2187 return IRQ_RETVAL(handled);
2204} 2188}
@@ -2249,7 +2233,7 @@ static int rtl8139_close (struct net_device *dev)
2249 napi_disable(&tp->napi); 2233 napi_disable(&tp->napi);
2250 2234
2251 if (netif_msg_ifdown(tp)) 2235 if (netif_msg_ifdown(tp))
2252 printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n", 2236 pr_debug("%s: Shutting down ethercard, status was 0x%4.4x.\n",
2253 dev->name, RTL_R16 (IntrStatus)); 2237 dev->name, RTL_R16 (IntrStatus));
2254 2238
2255 spin_lock_irqsave (&tp->lock, flags); 2239 spin_lock_irqsave (&tp->lock, flags);
@@ -2292,11 +2276,11 @@ static int rtl8139_close (struct net_device *dev)
2292 other threads or interrupts aren't messing with the 8139. */ 2276 other threads or interrupts aren't messing with the 8139. */
2293static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 2277static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2294{ 2278{
2295 struct rtl8139_private *np = netdev_priv(dev); 2279 struct rtl8139_private *tp = netdev_priv(dev);
2296 void __iomem *ioaddr = np->mmio_addr; 2280 void __iomem *ioaddr = tp->mmio_addr;
2297 2281
2298 spin_lock_irq(&np->lock); 2282 spin_lock_irq(&tp->lock);
2299 if (rtl_chip_info[np->chipset].flags & HasLWake) { 2283 if (rtl_chip_info[tp->chipset].flags & HasLWake) {
2300 u8 cfg3 = RTL_R8 (Config3); 2284 u8 cfg3 = RTL_R8 (Config3);
2301 u8 cfg5 = RTL_R8 (Config5); 2285 u8 cfg5 = RTL_R8 (Config5);
2302 2286
@@ -2317,7 +2301,7 @@ static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2317 if (cfg5 & Cfg5_BWF) 2301 if (cfg5 & Cfg5_BWF)
2318 wol->wolopts |= WAKE_BCAST; 2302 wol->wolopts |= WAKE_BCAST;
2319 } 2303 }
2320 spin_unlock_irq(&np->lock); 2304 spin_unlock_irq(&tp->lock);
2321} 2305}
2322 2306
2323 2307
@@ -2326,19 +2310,19 @@ static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2326 aren't messing with the 8139. */ 2310 aren't messing with the 8139. */
2327static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 2311static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2328{ 2312{
2329 struct rtl8139_private *np = netdev_priv(dev); 2313 struct rtl8139_private *tp = netdev_priv(dev);
2330 void __iomem *ioaddr = np->mmio_addr; 2314 void __iomem *ioaddr = tp->mmio_addr;
2331 u32 support; 2315 u32 support;
2332 u8 cfg3, cfg5; 2316 u8 cfg3, cfg5;
2333 2317
2334 support = ((rtl_chip_info[np->chipset].flags & HasLWake) 2318 support = ((rtl_chip_info[tp->chipset].flags & HasLWake)
2335 ? (WAKE_PHY | WAKE_MAGIC 2319 ? (WAKE_PHY | WAKE_MAGIC
2336 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST) 2320 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
2337 : 0); 2321 : 0);
2338 if (wol->wolopts & ~support) 2322 if (wol->wolopts & ~support)
2339 return -EINVAL; 2323 return -EINVAL;
2340 2324
2341 spin_lock_irq(&np->lock); 2325 spin_lock_irq(&tp->lock);
2342 cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic); 2326 cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
2343 if (wol->wolopts & WAKE_PHY) 2327 if (wol->wolopts & WAKE_PHY)
2344 cfg3 |= Cfg3_LinkUp; 2328 cfg3 |= Cfg3_LinkUp;
@@ -2359,87 +2343,87 @@ static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2359 if (wol->wolopts & WAKE_BCAST) 2343 if (wol->wolopts & WAKE_BCAST)
2360 cfg5 |= Cfg5_BWF; 2344 cfg5 |= Cfg5_BWF;
2361 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ 2345 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */
2362 spin_unlock_irq(&np->lock); 2346 spin_unlock_irq(&tp->lock);
2363 2347
2364 return 0; 2348 return 0;
2365} 2349}
2366 2350
2367static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 2351static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2368{ 2352{
2369 struct rtl8139_private *np = netdev_priv(dev); 2353 struct rtl8139_private *tp = netdev_priv(dev);
2370 strcpy(info->driver, DRV_NAME); 2354 strcpy(info->driver, DRV_NAME);
2371 strcpy(info->version, DRV_VERSION); 2355 strcpy(info->version, DRV_VERSION);
2372 strcpy(info->bus_info, pci_name(np->pci_dev)); 2356 strcpy(info->bus_info, pci_name(tp->pci_dev));
2373 info->regdump_len = np->regs_len; 2357 info->regdump_len = tp->regs_len;
2374} 2358}
2375 2359
2376static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) 2360static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2377{ 2361{
2378 struct rtl8139_private *np = netdev_priv(dev); 2362 struct rtl8139_private *tp = netdev_priv(dev);
2379 spin_lock_irq(&np->lock); 2363 spin_lock_irq(&tp->lock);
2380 mii_ethtool_gset(&np->mii, cmd); 2364 mii_ethtool_gset(&tp->mii, cmd);
2381 spin_unlock_irq(&np->lock); 2365 spin_unlock_irq(&tp->lock);
2382 return 0; 2366 return 0;
2383} 2367}
2384 2368
2385static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) 2369static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2386{ 2370{
2387 struct rtl8139_private *np = netdev_priv(dev); 2371 struct rtl8139_private *tp = netdev_priv(dev);
2388 int rc; 2372 int rc;
2389 spin_lock_irq(&np->lock); 2373 spin_lock_irq(&tp->lock);
2390 rc = mii_ethtool_sset(&np->mii, cmd); 2374 rc = mii_ethtool_sset(&tp->mii, cmd);
2391 spin_unlock_irq(&np->lock); 2375 spin_unlock_irq(&tp->lock);
2392 return rc; 2376 return rc;
2393} 2377}
2394 2378
2395static int rtl8139_nway_reset(struct net_device *dev) 2379static int rtl8139_nway_reset(struct net_device *dev)
2396{ 2380{
2397 struct rtl8139_private *np = netdev_priv(dev); 2381 struct rtl8139_private *tp = netdev_priv(dev);
2398 return mii_nway_restart(&np->mii); 2382 return mii_nway_restart(&tp->mii);
2399} 2383}
2400 2384
2401static u32 rtl8139_get_link(struct net_device *dev) 2385static u32 rtl8139_get_link(struct net_device *dev)
2402{ 2386{
2403 struct rtl8139_private *np = netdev_priv(dev); 2387 struct rtl8139_private *tp = netdev_priv(dev);
2404 return mii_link_ok(&np->mii); 2388 return mii_link_ok(&tp->mii);
2405} 2389}
2406 2390
2407static u32 rtl8139_get_msglevel(struct net_device *dev) 2391static u32 rtl8139_get_msglevel(struct net_device *dev)
2408{ 2392{
2409 struct rtl8139_private *np = netdev_priv(dev); 2393 struct rtl8139_private *tp = netdev_priv(dev);
2410 return np->msg_enable; 2394 return tp->msg_enable;
2411} 2395}
2412 2396
2413static void rtl8139_set_msglevel(struct net_device *dev, u32 datum) 2397static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
2414{ 2398{
2415 struct rtl8139_private *np = netdev_priv(dev); 2399 struct rtl8139_private *tp = netdev_priv(dev);
2416 np->msg_enable = datum; 2400 tp->msg_enable = datum;
2417} 2401}
2418 2402
2419static int rtl8139_get_regs_len(struct net_device *dev) 2403static int rtl8139_get_regs_len(struct net_device *dev)
2420{ 2404{
2421 struct rtl8139_private *np; 2405 struct rtl8139_private *tp;
2422 /* TODO: we are too slack to do reg dumping for pio, for now */ 2406 /* TODO: we are too slack to do reg dumping for pio, for now */
2423 if (use_io) 2407 if (use_io)
2424 return 0; 2408 return 0;
2425 np = netdev_priv(dev); 2409 tp = netdev_priv(dev);
2426 return np->regs_len; 2410 return tp->regs_len;
2427} 2411}
2428 2412
2429static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf) 2413static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
2430{ 2414{
2431 struct rtl8139_private *np; 2415 struct rtl8139_private *tp;
2432 2416
2433 /* TODO: we are too slack to do reg dumping for pio, for now */ 2417 /* TODO: we are too slack to do reg dumping for pio, for now */
2434 if (use_io) 2418 if (use_io)
2435 return; 2419 return;
2436 np = netdev_priv(dev); 2420 tp = netdev_priv(dev);
2437 2421
2438 regs->version = RTL_REGS_VER; 2422 regs->version = RTL_REGS_VER;
2439 2423
2440 spin_lock_irq(&np->lock); 2424 spin_lock_irq(&tp->lock);
2441 memcpy_fromio(regbuf, np->mmio_addr, regs->len); 2425 memcpy_fromio(regbuf, tp->mmio_addr, regs->len);
2442 spin_unlock_irq(&np->lock); 2426 spin_unlock_irq(&tp->lock);
2443} 2427}
2444 2428
2445static int rtl8139_get_sset_count(struct net_device *dev, int sset) 2429static int rtl8139_get_sset_count(struct net_device *dev, int sset)
@@ -2454,12 +2438,12 @@ static int rtl8139_get_sset_count(struct net_device *dev, int sset)
2454 2438
2455static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data) 2439static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2456{ 2440{
2457 struct rtl8139_private *np = netdev_priv(dev); 2441 struct rtl8139_private *tp = netdev_priv(dev);
2458 2442
2459 data[0] = np->xstats.early_rx; 2443 data[0] = tp->xstats.early_rx;
2460 data[1] = np->xstats.tx_buf_mapped; 2444 data[1] = tp->xstats.tx_buf_mapped;
2461 data[2] = np->xstats.tx_timeouts; 2445 data[2] = tp->xstats.tx_timeouts;
2462 data[3] = np->xstats.rx_lost_in_ring; 2446 data[3] = tp->xstats.rx_lost_in_ring;
2463} 2447}
2464 2448
2465static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data) 2449static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
@@ -2486,15 +2470,15 @@ static const struct ethtool_ops rtl8139_ethtool_ops = {
2486 2470
2487static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 2471static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2488{ 2472{
2489 struct rtl8139_private *np = netdev_priv(dev); 2473 struct rtl8139_private *tp = netdev_priv(dev);
2490 int rc; 2474 int rc;
2491 2475
2492 if (!netif_running(dev)) 2476 if (!netif_running(dev))
2493 return -EINVAL; 2477 return -EINVAL;
2494 2478
2495 spin_lock_irq(&np->lock); 2479 spin_lock_irq(&tp->lock);
2496 rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL); 2480 rc = generic_mii_ioctl(&tp->mii, if_mii(rq), cmd, NULL);
2497 spin_unlock_irq(&np->lock); 2481 spin_unlock_irq(&tp->lock);
2498 2482
2499 return rc; 2483 return rc;
2500} 2484}
@@ -2527,7 +2511,7 @@ static void __set_rx_mode (struct net_device *dev)
2527 int i, rx_mode; 2511 int i, rx_mode;
2528 u32 tmp; 2512 u32 tmp;
2529 2513
2530 DPRINTK ("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n", 2514 pr_debug("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
2531 dev->name, dev->flags, RTL_R32 (RxConfig)); 2515 dev->name, dev->flags, RTL_R32 (RxConfig));
2532 2516
2533 /* Note: do not reorder, GCC is clever about common statements. */ 2517 /* Note: do not reorder, GCC is clever about common statements. */
@@ -2643,7 +2627,7 @@ static int __init rtl8139_init_module (void)
2643 * even if no 8139 board is found. 2627 * even if no 8139 board is found.
2644 */ 2628 */
2645#ifdef MODULE 2629#ifdef MODULE
2646 printk (KERN_INFO RTL8139_DRIVER_NAME "\n"); 2630 pr_info(RTL8139_DRIVER_NAME "\n");
2647#endif 2631#endif
2648 2632
2649 return pci_register_driver(&rtl8139_pci_driver); 2633 return pci_register_driver(&rtl8139_pci_driver);
diff --git a/drivers/net/82596.c b/drivers/net/82596.c
index cca94b9c08ae..77547545509b 100644
--- a/drivers/net/82596.c
+++ b/drivers/net/82596.c
@@ -122,13 +122,13 @@ static char version[] __initdata =
122#define ISCP_BUSY 0x00010000 122#define ISCP_BUSY 0x00010000
123#define MACH_IS_APRICOT 0 123#define MACH_IS_APRICOT 0
124#else 124#else
125#define WSWAPrfd(x) ((struct i596_rfd *)(x)) 125#define WSWAPrfd(x) ((struct i596_rfd *)((long)x))
126#define WSWAPrbd(x) ((struct i596_rbd *)(x)) 126#define WSWAPrbd(x) ((struct i596_rbd *)((long)x))
127#define WSWAPiscp(x) ((struct i596_iscp *)(x)) 127#define WSWAPiscp(x) ((struct i596_iscp *)((long)x))
128#define WSWAPscb(x) ((struct i596_scb *)(x)) 128#define WSWAPscb(x) ((struct i596_scb *)((long)x))
129#define WSWAPcmd(x) ((struct i596_cmd *)(x)) 129#define WSWAPcmd(x) ((struct i596_cmd *)((long)x))
130#define WSWAPtbd(x) ((struct i596_tbd *)(x)) 130#define WSWAPtbd(x) ((struct i596_tbd *)((long)x))
131#define WSWAPchar(x) ((char *)(x)) 131#define WSWAPchar(x) ((char *)((long)x))
132#define ISCP_BUSY 0x0001 132#define ISCP_BUSY 0x0001
133#define MACH_IS_APRICOT 1 133#define MACH_IS_APRICOT 1
134#endif 134#endif
diff --git a/drivers/net/8390.c b/drivers/net/8390.c
index ec3e22e6306f..21153dea8ebe 100644
--- a/drivers/net/8390.c
+++ b/drivers/net/8390.c
@@ -74,14 +74,8 @@ EXPORT_SYMBOL(ei_netdev_ops);
74struct net_device *__alloc_ei_netdev(int size) 74struct net_device *__alloc_ei_netdev(int size)
75{ 75{
76 struct net_device *dev = ____alloc_ei_netdev(size); 76 struct net_device *dev = ____alloc_ei_netdev(size);
77#ifdef CONFIG_COMPAT_NET_DEV_OPS 77 if (dev)
78 if (dev) { 78 dev->netdev_ops = &ei_netdev_ops;
79 dev->hard_start_xmit = ei_start_xmit;
80 dev->get_stats = ei_get_stats;
81 dev->set_multicast_list = ei_set_multicast_list;
82 dev->tx_timeout = ei_tx_timeout;
83 }
84#endif
85 return dev; 79 return dev;
86} 80}
87EXPORT_SYMBOL(__alloc_ei_netdev); 81EXPORT_SYMBOL(__alloc_ei_netdev);
diff --git a/drivers/net/8390p.c b/drivers/net/8390p.c
index da863c91d1d0..d225c291fd93 100644
--- a/drivers/net/8390p.c
+++ b/drivers/net/8390p.c
@@ -79,14 +79,8 @@ EXPORT_SYMBOL(eip_netdev_ops);
79struct net_device *__alloc_eip_netdev(int size) 79struct net_device *__alloc_eip_netdev(int size)
80{ 80{
81 struct net_device *dev = ____alloc_ei_netdev(size); 81 struct net_device *dev = ____alloc_ei_netdev(size);
82#ifdef CONFIG_COMPAT_NET_DEV_OPS 82 if (dev)
83 if (dev) { 83 dev->netdev_ops = &eip_netdev_ops;
84 dev->hard_start_xmit = eip_start_xmit;
85 dev->get_stats = eip_get_stats;
86 dev->set_multicast_list = eip_set_multicast_list;
87 dev->tx_timeout = eip_tx_timeout;
88 }
89#endif
90 return dev; 84 return dev;
91} 85}
92EXPORT_SYMBOL(__alloc_eip_netdev); 86EXPORT_SYMBOL(__alloc_eip_netdev);
@@ -97,16 +91,15 @@ void NS8390p_init(struct net_device *dev, int startp)
97} 91}
98EXPORT_SYMBOL(NS8390p_init); 92EXPORT_SYMBOL(NS8390p_init);
99 93
100#if defined(MODULE) 94static int __init NS8390p_init_module(void)
101
102int init_module(void)
103{ 95{
104 return 0; 96 return 0;
105} 97}
106 98
107void cleanup_module(void) 99static void __exit NS8390p_cleanup_module(void)
108{ 100{
109} 101}
110 102
111#endif /* MODULE */ 103module_init(NS8390p_init_module);
104module_exit(NS8390p_cleanup_module);
112MODULE_LICENSE("GPL"); 105MODULE_LICENSE("GPL");
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 214a92d1ef75..3df8fc4376dd 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1,4 +1,3 @@
1
2# 1#
3# Network device configuration 2# Network device configuration
4# 3#
@@ -26,15 +25,6 @@ menuconfig NETDEVICES
26# that for each of the symbols. 25# that for each of the symbols.
27if NETDEVICES 26if NETDEVICES
28 27
29config COMPAT_NET_DEV_OPS
30 default y
31 bool "Enable older network device API compatibility"
32 ---help---
33 This option enables kernel compatibility with older network devices
34 that do not use net_device_ops interface.
35
36 If unsure, say Y.
37
38config IFB 28config IFB
39 tristate "Intermediate Functional Block support" 29 tristate "Intermediate Functional Block support"
40 depends on NET_CLS_ACT 30 depends on NET_CLS_ACT
@@ -526,15 +516,16 @@ config STNIC
526config SH_ETH 516config SH_ETH
527 tristate "Renesas SuperH Ethernet support" 517 tristate "Renesas SuperH Ethernet support"
528 depends on SUPERH && \ 518 depends on SUPERH && \
529 (CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7763 || \ 519 (CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712 || \
530 CPU_SUBTYPE_SH7619) 520 CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7619 || \
521 CPU_SUBTYPE_SH7724)
531 select CRC32 522 select CRC32
532 select MII 523 select MII
533 select MDIO_BITBANG 524 select MDIO_BITBANG
534 select PHYLIB 525 select PHYLIB
535 help 526 help
536 Renesas SuperH Ethernet device driver. 527 Renesas SuperH Ethernet device driver.
537 This driver support SH7710, SH7712, SH7763 and SH7619. 528 This driver support SH7710, SH7712, SH7763, SH7619, and SH7724.
538 529
539config SUNLANCE 530config SUNLANCE
540 tristate "Sun LANCE support" 531 tristate "Sun LANCE support"
@@ -927,6 +918,16 @@ config NET_NETX
927 To compile this driver as a module, choose M here. The module 918 To compile this driver as a module, choose M here. The module
928 will be called netx-eth. 919 will be called netx-eth.
929 920
921config TI_DAVINCI_EMAC
922 tristate "TI DaVinci EMAC Support"
923 depends on ARM && ARCH_DAVINCI
924 select PHYLIB
925 help
926 This driver supports TI's DaVinci Ethernet .
927
928 To compile this driver as a module, choose M here: the module
929 will be called davinci_emac_driver. This is recommended.
930
930config DM9000 931config DM9000
931 tristate "DM9000 support" 932 tristate "DM9000 support"
932 depends on ARM || BLACKFIN || MIPS 933 depends on ARM || BLACKFIN || MIPS
@@ -1858,8 +1859,8 @@ config 68360_ENET
1858 the Motorola 68360 processor. 1859 the Motorola 68360 processor.
1859 1860
1860config FEC 1861config FEC
1861 bool "FEC ethernet controller (of ColdFire CPUs)" 1862 bool "FEC ethernet controller (of ColdFire and some i.MX CPUs)"
1862 depends on M523x || M527x || M5272 || M528x || M520x || M532x || MACH_MX27 1863 depends on M523x || M527x || M5272 || M528x || M520x || M532x || MACH_MX27 || ARCH_MX35
1863 help 1864 help
1864 Say Y here if you want to use the built-in 10/100 Fast ethernet 1865 Say Y here if you want to use the built-in 10/100 Fast ethernet
1865 controller on some Motorola ColdFire and Freescale i.MX processors. 1866 controller on some Motorola ColdFire and Freescale i.MX processors.
@@ -2351,7 +2352,7 @@ config UGETH_TX_ON_DEMAND
2351 2352
2352config MV643XX_ETH 2353config MV643XX_ETH
2353 tristate "Marvell Discovery (643XX) and Orion ethernet support" 2354 tristate "Marvell Discovery (643XX) and Orion ethernet support"
2354 depends on MV64360 || MV64X60 || (PPC_MULTIPLATFORM && PPC32) || PLAT_ORION 2355 depends on MV64X60 || PPC32 || PLAT_ORION
2355 select INET_LRO 2356 select INET_LRO
2356 select PHYLIB 2357 select PHYLIB
2357 help 2358 help
@@ -2362,6 +2363,14 @@ config MV643XX_ETH
2362 Some boards that use the Discovery chipset are the Momenco 2363 Some boards that use the Discovery chipset are the Momenco
2363 Ocelot C and Jaguar ATX and Pegasos II. 2364 Ocelot C and Jaguar ATX and Pegasos II.
2364 2365
2366config XILINX_LL_TEMAC
2367 tristate "Xilinx LL TEMAC (LocalLink Tri-mode Ethernet MAC) driver"
2368 select PHYLIB
2369 depends on PPC_DCR_NATIVE
2370 help
2371 This driver supports the Xilinx 10/100/1000 LocalLink TEMAC
2372 core used in Xilinx Spartan and Virtex FPGAs
2373
2365config QLA3XXX 2374config QLA3XXX
2366 tristate "QLogic QLA3XXX Network Driver Support" 2375 tristate "QLogic QLA3XXX Network Driver Support"
2367 depends on PCI 2376 depends on PCI
@@ -2435,10 +2444,14 @@ menuconfig NETDEV_10000
2435 2444
2436if NETDEV_10000 2445if NETDEV_10000
2437 2446
2447config MDIO
2448 tristate
2449
2438config CHELSIO_T1 2450config CHELSIO_T1
2439 tristate "Chelsio 10Gb Ethernet support" 2451 tristate "Chelsio 10Gb Ethernet support"
2440 depends on PCI 2452 depends on PCI
2441 select CRC32 2453 select CRC32
2454 select MDIO
2442 help 2455 help
2443 This driver supports Chelsio gigabit and 10-gigabit 2456 This driver supports Chelsio gigabit and 10-gigabit
2444 Ethernet cards. More information about adapter features and 2457 Ethernet cards. More information about adapter features and
@@ -2471,6 +2484,7 @@ config CHELSIO_T3
2471 tristate "Chelsio Communications T3 10Gb Ethernet support" 2484 tristate "Chelsio Communications T3 10Gb Ethernet support"
2472 depends on CHELSIO_T3_DEPENDS 2485 depends on CHELSIO_T3_DEPENDS
2473 select FW_LOADER 2486 select FW_LOADER
2487 select MDIO
2474 help 2488 help
2475 This driver supports Chelsio T3-based gigabit and 10Gb Ethernet 2489 This driver supports Chelsio T3-based gigabit and 10Gb Ethernet
2476 adapters. 2490 adapters.
@@ -2506,6 +2520,7 @@ config ENIC
2506config IXGBE 2520config IXGBE
2507 tristate "Intel(R) 10GbE PCI Express adapters support" 2521 tristate "Intel(R) 10GbE PCI Express adapters support"
2508 depends on PCI && INET 2522 depends on PCI && INET
2523 select MDIO
2509 ---help--- 2524 ---help---
2510 This driver supports Intel(R) 10GbE PCI Express family of 2525 This driver supports Intel(R) 10GbE PCI Express family of
2511 adapters. For more information on how to identify your adapter, go 2526 adapters. For more information on how to identify your adapter, go
@@ -2668,6 +2683,7 @@ config TEHUTI
2668config BNX2X 2683config BNX2X
2669 tristate "Broadcom NetXtremeII 10Gb support" 2684 tristate "Broadcom NetXtremeII 10Gb support"
2670 depends on PCI 2685 depends on PCI
2686 select FW_LOADER
2671 select ZLIB_INFLATE 2687 select ZLIB_INFLATE
2672 select LIBCRC32C 2688 select LIBCRC32C
2673 help 2689 help
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index a1c25cb4669f..774c2b45bdb8 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -2,6 +2,8 @@
2# Makefile for the Linux network (ethercard) device drivers. 2# Makefile for the Linux network (ethercard) device drivers.
3# 3#
4 4
5obj-$(CONFIG_TI_DAVINCI_EMAC) += davinci_emac.o
6
5obj-$(CONFIG_E1000) += e1000/ 7obj-$(CONFIG_E1000) += e1000/
6obj-$(CONFIG_E1000E) += e1000e/ 8obj-$(CONFIG_E1000E) += e1000e/
7obj-$(CONFIG_IBM_NEW_EMAC) += ibm_newemac/ 9obj-$(CONFIG_IBM_NEW_EMAC) += ibm_newemac/
@@ -95,6 +97,7 @@ obj-$(CONFIG_SH_ETH) += sh_eth.o
95# 97#
96 98
97obj-$(CONFIG_MII) += mii.o 99obj-$(CONFIG_MII) += mii.o
100obj-$(CONFIG_MDIO) += mdio.o
98obj-$(CONFIG_PHYLIB) += phy/ 101obj-$(CONFIG_PHYLIB) += phy/
99 102
100obj-$(CONFIG_SUNDANCE) += sundance.o 103obj-$(CONFIG_SUNDANCE) += sundance.o
@@ -134,6 +137,8 @@ obj-$(CONFIG_AX88796) += ax88796.o
134 137
135obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o 138obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o
136obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o 139obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o
140ll_temac-objs := ll_temac_main.o ll_temac_mdio.o
141obj-$(CONFIG_XILINX_LL_TEMAC) += ll_temac.o
137obj-$(CONFIG_QLA3XXX) += qla3xxx.o 142obj-$(CONFIG_QLA3XXX) += qla3xxx.o
138obj-$(CONFIG_QLGE) += qlge/ 143obj-$(CONFIG_QLGE) += qlge/
139 144
diff --git a/drivers/net/acenic.c b/drivers/net/acenic.c
index 57bc71527850..08419ee10290 100644
--- a/drivers/net/acenic.c
+++ b/drivers/net/acenic.c
@@ -2573,7 +2573,6 @@ restart:
2573 netif_wake_queue(dev); 2573 netif_wake_queue(dev);
2574 } 2574 }
2575 2575
2576 dev->trans_start = jiffies;
2577 return NETDEV_TX_OK; 2576 return NETDEV_TX_OK;
2578 2577
2579overflow: 2578overflow:
diff --git a/drivers/net/appletalk/ipddp.c b/drivers/net/appletalk/ipddp.c
index da64ba88d7f8..9832b757f109 100644
--- a/drivers/net/appletalk/ipddp.c
+++ b/drivers/net/appletalk/ipddp.c
@@ -39,6 +39,7 @@
39static const char version[] = KERN_INFO "ipddp.c:v0.01 8/28/97 Bradford W. Johnson <johns393@maroon.tc.umn.edu>\n"; 39static const char version[] = KERN_INFO "ipddp.c:v0.01 8/28/97 Bradford W. Johnson <johns393@maroon.tc.umn.edu>\n";
40 40
41static struct ipddp_route *ipddp_route_list; 41static struct ipddp_route *ipddp_route_list;
42static DEFINE_SPINLOCK(ipddp_route_lock);
42 43
43#ifdef CONFIG_IPDDP_ENCAP 44#ifdef CONFIG_IPDDP_ENCAP
44static int ipddp_mode = IPDDP_ENCAP; 45static int ipddp_mode = IPDDP_ENCAP;
@@ -50,7 +51,7 @@ static int ipddp_mode = IPDDP_DECAP;
50static int ipddp_xmit(struct sk_buff *skb, struct net_device *dev); 51static int ipddp_xmit(struct sk_buff *skb, struct net_device *dev);
51static int ipddp_create(struct ipddp_route *new_rt); 52static int ipddp_create(struct ipddp_route *new_rt);
52static int ipddp_delete(struct ipddp_route *rt); 53static int ipddp_delete(struct ipddp_route *rt);
53static struct ipddp_route* ipddp_find_route(struct ipddp_route *rt); 54static struct ipddp_route* __ipddp_find_route(struct ipddp_route *rt);
54static int ipddp_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 55static int ipddp_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
55 56
56static const struct net_device_ops ipddp_netdev_ops = { 57static const struct net_device_ops ipddp_netdev_ops = {
@@ -71,6 +72,7 @@ static struct net_device * __init ipddp_init(void)
71 if (!dev) 72 if (!dev)
72 return ERR_PTR(-ENOMEM); 73 return ERR_PTR(-ENOMEM);
73 74
75 dev->priv_flags &= ~IFF_XMIT_DST_RELEASE;
74 strcpy(dev->name, "ipddp%d"); 76 strcpy(dev->name, "ipddp%d");
75 77
76 if (version_printed++ == 0) 78 if (version_printed++ == 0)
@@ -118,6 +120,8 @@ static int ipddp_xmit(struct sk_buff *skb, struct net_device *dev)
118 struct ipddp_route *rt; 120 struct ipddp_route *rt;
119 struct atalk_addr *our_addr; 121 struct atalk_addr *our_addr;
120 122
123 spin_lock(&ipddp_route_lock);
124
121 /* 125 /*
122 * Find appropriate route to use, based only on IP number. 126 * Find appropriate route to use, based only on IP number.
123 */ 127 */
@@ -126,8 +130,10 @@ static int ipddp_xmit(struct sk_buff *skb, struct net_device *dev)
126 if(rt->ip == paddr) 130 if(rt->ip == paddr)
127 break; 131 break;
128 } 132 }
129 if(rt == NULL) 133 if(rt == NULL) {
134 spin_unlock(&ipddp_route_lock);
130 return 0; 135 return 0;
136 }
131 137
132 our_addr = atalk_find_dev_addr(rt->dev); 138 our_addr = atalk_find_dev_addr(rt->dev);
133 139
@@ -173,6 +179,8 @@ static int ipddp_xmit(struct sk_buff *skb, struct net_device *dev)
173 if(aarp_send_ddp(rt->dev, skb, &rt->at, NULL) < 0) 179 if(aarp_send_ddp(rt->dev, skb, &rt->at, NULL) < 0)
174 dev_kfree_skb(skb); 180 dev_kfree_skb(skb);
175 181
182 spin_unlock(&ipddp_route_lock);
183
176 return 0; 184 return 0;
177} 185}
178 186
@@ -195,7 +203,9 @@ static int ipddp_create(struct ipddp_route *new_rt)
195 return -ENETUNREACH; 203 return -ENETUNREACH;
196 } 204 }
197 205
198 if (ipddp_find_route(rt)) { 206 spin_lock_bh(&ipddp_route_lock);
207 if (__ipddp_find_route(rt)) {
208 spin_unlock_bh(&ipddp_route_lock);
199 kfree(rt); 209 kfree(rt);
200 return -EEXIST; 210 return -EEXIST;
201 } 211 }
@@ -203,6 +213,8 @@ static int ipddp_create(struct ipddp_route *new_rt)
203 rt->next = ipddp_route_list; 213 rt->next = ipddp_route_list;
204 ipddp_route_list = rt; 214 ipddp_route_list = rt;
205 215
216 spin_unlock_bh(&ipddp_route_lock);
217
206 return 0; 218 return 0;
207} 219}
208 220
@@ -215,6 +227,7 @@ static int ipddp_delete(struct ipddp_route *rt)
215 struct ipddp_route **r = &ipddp_route_list; 227 struct ipddp_route **r = &ipddp_route_list;
216 struct ipddp_route *tmp; 228 struct ipddp_route *tmp;
217 229
230 spin_lock_bh(&ipddp_route_lock);
218 while((tmp = *r) != NULL) 231 while((tmp = *r) != NULL)
219 { 232 {
220 if(tmp->ip == rt->ip 233 if(tmp->ip == rt->ip
@@ -222,19 +235,21 @@ static int ipddp_delete(struct ipddp_route *rt)
222 && tmp->at.s_node == rt->at.s_node) 235 && tmp->at.s_node == rt->at.s_node)
223 { 236 {
224 *r = tmp->next; 237 *r = tmp->next;
238 spin_unlock_bh(&ipddp_route_lock);
225 kfree(tmp); 239 kfree(tmp);
226 return 0; 240 return 0;
227 } 241 }
228 r = &tmp->next; 242 r = &tmp->next;
229 } 243 }
230 244
245 spin_unlock_bh(&ipddp_route_lock);
231 return (-ENOENT); 246 return (-ENOENT);
232} 247}
233 248
234/* 249/*
235 * Find a routing entry, we only return a FULL match 250 * Find a routing entry, we only return a FULL match
236 */ 251 */
237static struct ipddp_route* ipddp_find_route(struct ipddp_route *rt) 252static struct ipddp_route* __ipddp_find_route(struct ipddp_route *rt)
238{ 253{
239 struct ipddp_route *f; 254 struct ipddp_route *f;
240 255
@@ -252,7 +267,7 @@ static struct ipddp_route* ipddp_find_route(struct ipddp_route *rt)
252static int ipddp_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 267static int ipddp_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
253{ 268{
254 struct ipddp_route __user *rt = ifr->ifr_data; 269 struct ipddp_route __user *rt = ifr->ifr_data;
255 struct ipddp_route rcp; 270 struct ipddp_route rcp, rcp2, *rp;
256 271
257 if(!capable(CAP_NET_ADMIN)) 272 if(!capable(CAP_NET_ADMIN))
258 return -EPERM; 273 return -EPERM;
@@ -266,9 +281,19 @@ static int ipddp_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
266 return (ipddp_create(&rcp)); 281 return (ipddp_create(&rcp));
267 282
268 case SIOCFINDIPDDPRT: 283 case SIOCFINDIPDDPRT:
269 if(copy_to_user(rt, ipddp_find_route(&rcp), sizeof(struct ipddp_route))) 284 spin_lock_bh(&ipddp_route_lock);
270 return -EFAULT; 285 rp = __ipddp_find_route(&rcp);
271 return 0; 286 if (rp)
287 memcpy(&rcp2, rp, sizeof(rcp2));
288 spin_unlock_bh(&ipddp_route_lock);
289
290 if (rp) {
291 if (copy_to_user(rt, &rcp2,
292 sizeof(struct ipddp_route)))
293 return -EFAULT;
294 return 0;
295 } else
296 return -ENOENT;
272 297
273 case SIOCDELIPDDPRT: 298 case SIOCDELIPDDPRT:
274 return (ipddp_delete(&rcp)); 299 return (ipddp_delete(&rcp));
diff --git a/drivers/net/arm/ep93xx_eth.c b/drivers/net/arm/ep93xx_eth.c
index b72b3d639f6e..fbf4645417d4 100644
--- a/drivers/net/arm/ep93xx_eth.c
+++ b/drivers/net/arm/ep93xx_eth.c
@@ -253,7 +253,7 @@ static int ep93xx_rx(struct net_device *dev, int processed, int budget)
253 skb = dev_alloc_skb(length + 2); 253 skb = dev_alloc_skb(length + 2);
254 if (likely(skb != NULL)) { 254 if (likely(skb != NULL)) {
255 skb_reserve(skb, 2); 255 skb_reserve(skb, 2);
256 dma_sync_single(NULL, ep->descs->rdesc[entry].buf_addr, 256 dma_sync_single_for_cpu(NULL, ep->descs->rdesc[entry].buf_addr,
257 length, DMA_FROM_DEVICE); 257 length, DMA_FROM_DEVICE);
258 skb_copy_to_linear_data(skb, ep->rx_buf[entry], length); 258 skb_copy_to_linear_data(skb, ep->rx_buf[entry], length);
259 skb_put(skb, length); 259 skb_put(skb, length);
@@ -331,7 +331,7 @@ static int ep93xx_xmit(struct sk_buff *skb, struct net_device *dev)
331 ep->descs->tdesc[entry].tdesc1 = 331 ep->descs->tdesc[entry].tdesc1 =
332 TDESC1_EOF | (entry << 16) | (skb->len & 0xfff); 332 TDESC1_EOF | (entry << 16) | (skb->len & 0xfff);
333 skb_copy_and_csum_dev(skb, ep->tx_buf[entry]); 333 skb_copy_and_csum_dev(skb, ep->tx_buf[entry]);
334 dma_sync_single(NULL, ep->descs->tdesc[entry].buf_addr, 334 dma_sync_single_for_cpu(NULL, ep->descs->tdesc[entry].buf_addr,
335 skb->len, DMA_TO_DEVICE); 335 skb->len, DMA_TO_DEVICE);
336 dev_kfree_skb(skb); 336 dev_kfree_skb(skb);
337 337
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index a740053d3af3..1fcf8388b1c8 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -561,8 +561,8 @@ static int eth_poll(struct napi_struct *napi, int budget)
561 dma_unmap_single(&dev->dev, desc->data - NET_IP_ALIGN, 561 dma_unmap_single(&dev->dev, desc->data - NET_IP_ALIGN,
562 RX_BUFF_SIZE, DMA_FROM_DEVICE); 562 RX_BUFF_SIZE, DMA_FROM_DEVICE);
563#else 563#else
564 dma_sync_single(&dev->dev, desc->data - NET_IP_ALIGN, 564 dma_sync_single_for_cpu(&dev->dev, desc->data - NET_IP_ALIGN,
565 RX_BUFF_SIZE, DMA_FROM_DEVICE); 565 RX_BUFF_SIZE, DMA_FROM_DEVICE);
566 memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n], 566 memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n],
567 ALIGN(NET_IP_ALIGN + desc->pkt_len, 4) / 4); 567 ALIGN(NET_IP_ALIGN + desc->pkt_len, 4) / 4);
568#endif 568#endif
@@ -1149,7 +1149,7 @@ static int __devinit eth_init_one(struct platform_device *pdev)
1149 struct net_device *dev; 1149 struct net_device *dev;
1150 struct eth_plat_info *plat = pdev->dev.platform_data; 1150 struct eth_plat_info *plat = pdev->dev.platform_data;
1151 u32 regs_phys; 1151 u32 regs_phys;
1152 char phy_id[BUS_ID_SIZE]; 1152 char phy_id[MII_BUS_ID_SIZE + 3];
1153 int err; 1153 int err;
1154 1154
1155 if (!(dev = alloc_etherdev(sizeof(struct port)))) 1155 if (!(dev = alloc_etherdev(sizeof(struct port))))
@@ -1207,7 +1207,7 @@ static int __devinit eth_init_one(struct platform_device *pdev)
1207 __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control); 1207 __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control);
1208 udelay(50); 1208 udelay(50);
1209 1209
1210 snprintf(phy_id, BUS_ID_SIZE, PHY_ID_FMT, "0", plat->phy); 1210 snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, "0", plat->phy);
1211 port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, 0, 1211 port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, 0,
1212 PHY_INTERFACE_MODE_MII); 1212 PHY_INTERFACE_MODE_MII);
1213 if ((err = IS_ERR(port->phydev))) 1213 if ((err = IS_ERR(port->phydev)))
diff --git a/drivers/net/atl1c/atl1c_main.c b/drivers/net/atl1c/atl1c_main.c
index 83a12125b94e..cd547a205fb9 100644
--- a/drivers/net/atl1c/atl1c_main.c
+++ b/drivers/net/atl1c/atl1c_main.c
@@ -164,6 +164,24 @@ static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
164} 164}
165 165
166/* 166/*
167 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
168 * of the idle status register until the device is actually idle
169 */
170static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
171{
172 int timeout;
173 u32 data;
174
175 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
176 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
177 if ((data & IDLE_STATUS_MASK) == 0)
178 return 0;
179 msleep(1);
180 }
181 return data;
182}
183
184/*
167 * atl1c_phy_config - Timer Call-back 185 * atl1c_phy_config - Timer Call-back
168 * @data: pointer to netdev cast into an unsigned long 186 * @data: pointer to netdev cast into an unsigned long
169 */ 187 */
@@ -220,11 +238,11 @@ static void atl1c_check_link_status(struct atl1c_adapter *adapter)
220 /* link down */ 238 /* link down */
221 if (netif_carrier_ok(netdev)) { 239 if (netif_carrier_ok(netdev)) {
222 hw->hibernate = true; 240 hw->hibernate = true;
223 atl1c_set_aspm(hw, false);
224 if (atl1c_stop_mac(hw) != 0) 241 if (atl1c_stop_mac(hw) != 0)
225 if (netif_msg_hw(adapter)) 242 if (netif_msg_hw(adapter))
226 dev_warn(&pdev->dev, 243 dev_warn(&pdev->dev,
227 "stop mac failed\n"); 244 "stop mac failed\n");
245 atl1c_set_aspm(hw, false);
228 } 246 }
229 netif_carrier_off(netdev); 247 netif_carrier_off(netdev);
230 } else { 248 } else {
@@ -240,10 +258,10 @@ static void atl1c_check_link_status(struct atl1c_adapter *adapter)
240 adapter->link_duplex != duplex) { 258 adapter->link_duplex != duplex) {
241 adapter->link_speed = speed; 259 adapter->link_speed = speed;
242 adapter->link_duplex = duplex; 260 adapter->link_duplex = duplex;
261 atl1c_set_aspm(hw, true);
243 atl1c_enable_tx_ctrl(hw); 262 atl1c_enable_tx_ctrl(hw);
244 atl1c_enable_rx_ctrl(hw); 263 atl1c_enable_rx_ctrl(hw);
245 atl1c_setup_mac_ctrl(adapter); 264 atl1c_setup_mac_ctrl(adapter);
246 atl1c_set_aspm(hw, true);
247 if (netif_msg_link(adapter)) 265 if (netif_msg_link(adapter))
248 dev_info(&pdev->dev, 266 dev_info(&pdev->dev,
249 "%s: %s NIC Link is Up<%d Mbps %s>\n", 267 "%s: %s NIC Link is Up<%d Mbps %s>\n",
@@ -1106,7 +1124,6 @@ static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1106static int atl1c_stop_mac(struct atl1c_hw *hw) 1124static int atl1c_stop_mac(struct atl1c_hw *hw)
1107{ 1125{
1108 u32 data; 1126 u32 data;
1109 int timeout;
1110 1127
1111 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1128 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1112 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN | 1129 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
@@ -1117,25 +1134,13 @@ static int atl1c_stop_mac(struct atl1c_hw *hw)
1117 data &= ~TXQ_CTRL_EN; 1134 data &= ~TXQ_CTRL_EN;
1118 AT_WRITE_REG(hw, REG_TWSI_CTRL, data); 1135 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1119 1136
1120 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 1137 atl1c_wait_until_idle(hw);
1121 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
1122 if ((data & (IDLE_STATUS_RXQ_NO_IDLE |
1123 IDLE_STATUS_TXQ_NO_IDLE)) == 0)
1124 break;
1125 msleep(1);
1126 }
1127 1138
1128 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1139 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1129 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1140 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1130 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1141 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1131 1142
1132 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 1143 return (int)atl1c_wait_until_idle(hw);
1133 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
1134 if ((data & IDLE_STATUS_MASK) == 0)
1135 return 0;
1136 msleep(1);
1137 }
1138 return data;
1139} 1144}
1140 1145
1141static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw) 1146static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
@@ -1178,8 +1183,6 @@ static int atl1c_reset_mac(struct atl1c_hw *hw)
1178{ 1183{
1179 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter; 1184 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1180 struct pci_dev *pdev = adapter->pdev; 1185 struct pci_dev *pdev = adapter->pdev;
1181 u32 idle_status_data = 0;
1182 int timeout = 0;
1183 int ret; 1186 int ret;
1184 1187
1185 AT_WRITE_REG(hw, REG_IMR, 0); 1188 AT_WRITE_REG(hw, REG_IMR, 0);
@@ -1198,15 +1201,10 @@ static int atl1c_reset_mac(struct atl1c_hw *hw)
1198 AT_WRITE_FLUSH(hw); 1201 AT_WRITE_FLUSH(hw);
1199 msleep(10); 1202 msleep(10);
1200 /* Wait at least 10ms for All module to be Idle */ 1203 /* Wait at least 10ms for All module to be Idle */
1201 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 1204
1202 AT_READ_REG(hw, REG_IDLE_STATUS, &idle_status_data); 1205 if (atl1c_wait_until_idle(hw)) {
1203 if ((idle_status_data & IDLE_STATUS_MASK) == 0)
1204 break;
1205 msleep(1);
1206 }
1207 if (timeout >= AT_HW_MAX_IDLE_DELAY) {
1208 dev_err(&pdev->dev, 1206 dev_err(&pdev->dev,
1209 "MAC state machine cann't be idle since" 1207 "MAC state machine can't be idle since"
1210 " disabled for 10ms second\n"); 1208 " disabled for 10ms second\n");
1211 return -1; 1209 return -1;
1212 } 1210 }
@@ -1242,9 +1240,7 @@ static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1242 1240
1243 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1241 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1244 1242
1245 pm_ctrl_data &= PM_CTRL_SERDES_PD_EX_L1; 1243 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1246 pm_ctrl_data |= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1247 pm_ctrl_data |= ~PM_CTRL_SERDES_L1_EN;
1248 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << 1244 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1249 PM_CTRL_L1_ENTRY_TIMER_SHIFT); 1245 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1250 1246
@@ -1254,19 +1250,11 @@ static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1254 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN; 1250 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1255 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1; 1251 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1256 1252
1257 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) { 1253 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1258 pm_ctrl_data |= AT_ASPM_L1_TIMER << 1254 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1259 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1260 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1261 } else
1262 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1263
1264 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1265 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1266 else
1267 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1268
1269 } else { 1255 } else {
1256 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1257 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1270 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1258 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1271 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN; 1259 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1272 1260
@@ -2123,7 +2111,6 @@ static int atl1c_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2123 atl1c_tx_map(adapter, skb, tpd, type); 2111 atl1c_tx_map(adapter, skb, tpd, type);
2124 atl1c_tx_queue(adapter, skb, tpd, type); 2112 atl1c_tx_queue(adapter, skb, tpd, type);
2125 2113
2126 netdev->trans_start = jiffies;
2127 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2114 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2128 return NETDEV_TX_OK; 2115 return NETDEV_TX_OK;
2129} 2116}
diff --git a/drivers/net/atl1e/atl1e.h b/drivers/net/atl1e/atl1e.h
index 2bf63b4368e2..ba48220df16a 100644
--- a/drivers/net/atl1e/atl1e.h
+++ b/drivers/net/atl1e/atl1e.h
@@ -429,7 +429,6 @@ struct atl1e_adapter {
429 struct mii_if_info mii; /* MII interface info */ 429 struct mii_if_info mii; /* MII interface info */
430 struct atl1e_hw hw; 430 struct atl1e_hw hw;
431 struct atl1e_hw_stats hw_stats; 431 struct atl1e_hw_stats hw_stats;
432 struct net_device_stats net_stats;
433 432
434 bool have_msi; 433 bool have_msi;
435 u32 wol; 434 u32 wol;
diff --git a/drivers/net/atl1e/atl1e_main.c b/drivers/net/atl1e/atl1e_main.c
index 1342418fb209..e1ae10cf30c1 100644
--- a/drivers/net/atl1e/atl1e_main.c
+++ b/drivers/net/atl1e/atl1e_main.c
@@ -1154,7 +1154,7 @@ static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1154{ 1154{
1155 struct atl1e_adapter *adapter = netdev_priv(netdev); 1155 struct atl1e_adapter *adapter = netdev_priv(netdev);
1156 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats; 1156 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1157 struct net_device_stats *net_stats = &adapter->net_stats; 1157 struct net_device_stats *net_stats = &netdev->stats;
1158 1158
1159 net_stats->rx_packets = hw_stats->rx_ok; 1159 net_stats->rx_packets = hw_stats->rx_ok;
1160 net_stats->tx_packets = hw_stats->tx_ok; 1160 net_stats->tx_packets = hw_stats->tx_ok;
@@ -1182,7 +1182,7 @@ static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1182 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1182 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1183 net_stats->tx_window_errors = hw_stats->tx_late_col; 1183 net_stats->tx_window_errors = hw_stats->tx_late_col;
1184 1184
1185 return &adapter->net_stats; 1185 return net_stats;
1186} 1186}
1187 1187
1188static void atl1e_update_hw_stats(struct atl1e_adapter *adapter) 1188static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
@@ -1310,7 +1310,7 @@ static irqreturn_t atl1e_intr(int irq, void *data)
1310 1310
1311 /* link event */ 1311 /* link event */
1312 if (status & (ISR_GPHY | ISR_MANUAL)) { 1312 if (status & (ISR_GPHY | ISR_MANUAL)) {
1313 adapter->net_stats.tx_carrier_errors++; 1313 netdev->stats.tx_carrier_errors++;
1314 atl1e_link_chg_event(adapter); 1314 atl1e_link_chg_event(adapter);
1315 break; 1315 break;
1316 } 1316 }
@@ -1795,8 +1795,7 @@ static void atl1e_tx_map(struct atl1e_adapter *adapter,
1795 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1795 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1796 1796
1797 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1797 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1798 if (tx_buffer->skb) 1798 BUG_ON(tx_buffer->skb);
1799 BUG();
1800 1799
1801 tx_buffer->skb = NULL; 1800 tx_buffer->skb = NULL;
1802 tx_buffer->length = 1801 tx_buffer->length =
@@ -1895,7 +1894,7 @@ static int atl1e_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1895 atl1e_tx_map(adapter, skb, tpd); 1894 atl1e_tx_map(adapter, skb, tpd);
1896 atl1e_tx_queue(adapter, tpd_req, tpd); 1895 atl1e_tx_queue(adapter, tpd_req, tpd);
1897 1896
1898 netdev->trans_start = jiffies; 1897 netdev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
1899 spin_unlock_irqrestore(&adapter->tx_lock, flags); 1898 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1900 return NETDEV_TX_OK; 1899 return NETDEV_TX_OK;
1901} 1900}
diff --git a/drivers/net/atlx/atl1.c b/drivers/net/atlx/atl1.c
index 4e817126e280..560f3873d347 100644
--- a/drivers/net/atlx/atl1.c
+++ b/drivers/net/atlx/atl1.c
@@ -2213,8 +2213,7 @@ static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
2213 nr_frags = skb_shinfo(skb)->nr_frags; 2213 nr_frags = skb_shinfo(skb)->nr_frags;
2214 next_to_use = atomic_read(&tpd_ring->next_to_use); 2214 next_to_use = atomic_read(&tpd_ring->next_to_use);
2215 buffer_info = &tpd_ring->buffer_info[next_to_use]; 2215 buffer_info = &tpd_ring->buffer_info[next_to_use];
2216 if (unlikely(buffer_info->skb)) 2216 BUG_ON(buffer_info->skb);
2217 BUG();
2218 /* put skb in last TPD */ 2217 /* put skb in last TPD */
2219 buffer_info->skb = NULL; 2218 buffer_info->skb = NULL;
2220 2219
@@ -2280,8 +2279,8 @@ static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
2280 ATL1_MAX_TX_BUF_LEN; 2279 ATL1_MAX_TX_BUF_LEN;
2281 for (i = 0; i < nseg; i++) { 2280 for (i = 0; i < nseg; i++) {
2282 buffer_info = &tpd_ring->buffer_info[next_to_use]; 2281 buffer_info = &tpd_ring->buffer_info[next_to_use];
2283 if (unlikely(buffer_info->skb)) 2282 BUG_ON(buffer_info->skb);
2284 BUG(); 2283
2285 buffer_info->skb = NULL; 2284 buffer_info->skb = NULL;
2286 buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ? 2285 buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ?
2287 ATL1_MAX_TX_BUF_LEN : buf_len; 2286 ATL1_MAX_TX_BUF_LEN : buf_len;
@@ -2438,7 +2437,6 @@ static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2438 atl1_tx_queue(adapter, count, ptpd); 2437 atl1_tx_queue(adapter, count, ptpd);
2439 atl1_update_mailbox(adapter); 2438 atl1_update_mailbox(adapter);
2440 mmiowb(); 2439 mmiowb();
2441 netdev->trans_start = jiffies;
2442 return NETDEV_TX_OK; 2440 return NETDEV_TX_OK;
2443} 2441}
2444 2442
diff --git a/drivers/net/b44.c b/drivers/net/b44.c
index b70b81ec34c3..36d4d377ec2f 100644
--- a/drivers/net/b44.c
+++ b/drivers/net/b44.c
@@ -782,7 +782,7 @@ static int b44_rx(struct b44 *bp, int budget)
782 drop_it: 782 drop_it:
783 b44_recycle_rx(bp, cons, bp->rx_prod); 783 b44_recycle_rx(bp, cons, bp->rx_prod);
784 drop_it_no_recycle: 784 drop_it_no_recycle:
785 bp->stats.rx_dropped++; 785 bp->dev->stats.rx_dropped++;
786 goto next_pkt; 786 goto next_pkt;
787 } 787 }
788 788
@@ -1647,7 +1647,7 @@ static int b44_close(struct net_device *dev)
1647static struct net_device_stats *b44_get_stats(struct net_device *dev) 1647static struct net_device_stats *b44_get_stats(struct net_device *dev)
1648{ 1648{
1649 struct b44 *bp = netdev_priv(dev); 1649 struct b44 *bp = netdev_priv(dev);
1650 struct net_device_stats *nstat = &bp->stats; 1650 struct net_device_stats *nstat = &dev->stats;
1651 struct b44_hw_stats *hwstat = &bp->hw_stats; 1651 struct b44_hw_stats *hwstat = &bp->hw_stats;
1652 1652
1653 /* Convert HW stats into netdevice stats. */ 1653 /* Convert HW stats into netdevice stats. */
diff --git a/drivers/net/b44.h b/drivers/net/b44.h
index e678498de6db..0443f6801f60 100644
--- a/drivers/net/b44.h
+++ b/drivers/net/b44.h
@@ -384,7 +384,6 @@ struct b44 {
384 384
385 struct timer_list timer; 385 struct timer_list timer;
386 386
387 struct net_device_stats stats;
388 struct b44_hw_stats hw_stats; 387 struct b44_hw_stats hw_stats;
389 388
390 struct ssb_device *sdev; 389 struct ssb_device *sdev;
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
index 5c378b5e8e41..5f17d80300ae 100644
--- a/drivers/net/benet/be_main.c
+++ b/drivers/net/benet/be_main.c
@@ -478,8 +478,6 @@ static int be_xmit(struct sk_buff *skb, struct net_device *netdev)
478 478
479 be_txq_notify(&adapter->ctrl, txq->id, wrb_cnt); 479 be_txq_notify(&adapter->ctrl, txq->id, wrb_cnt);
480 480
481 netdev->trans_start = jiffies;
482
483 be_tx_stats_update(adapter, wrb_cnt, copied, stopped); 481 be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
484 return NETDEV_TX_OK; 482 return NETDEV_TX_OK;
485} 483}
@@ -637,6 +635,22 @@ static void be_rx_stats_update(struct be_adapter *adapter,
637 stats->be_rx_bytes += pktsize; 635 stats->be_rx_bytes += pktsize;
638} 636}
639 637
638static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
639{
640 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
641
642 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
643 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
644 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
645 if (ip_version) {
646 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
647 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
648 }
649 ipv6_chk = (ip_version && (tcpf || udpf));
650
651 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
652}
653
640static struct be_rx_page_info * 654static struct be_rx_page_info *
641get_rx_page_info(struct be_adapter *adapter, u16 frag_idx) 655get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
642{ 656{
@@ -752,9 +766,7 @@ static void be_rx_compl_process(struct be_adapter *adapter,
752{ 766{
753 struct sk_buff *skb; 767 struct sk_buff *skb;
754 u32 vtp, vid; 768 u32 vtp, vid;
755 int l4_cksm;
756 769
757 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
758 vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp); 770 vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
759 771
760 skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN); 772 skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
@@ -769,10 +781,10 @@ static void be_rx_compl_process(struct be_adapter *adapter,
769 781
770 skb_fill_rx_data(adapter, skb, rxcp); 782 skb_fill_rx_data(adapter, skb, rxcp);
771 783
772 if (l4_cksm && adapter->rx_csum) 784 if (do_pkt_csum(rxcp, adapter->rx_csum))
773 skb->ip_summed = CHECKSUM_UNNECESSARY;
774 else
775 skb->ip_summed = CHECKSUM_NONE; 785 skb->ip_summed = CHECKSUM_NONE;
786 else
787 skb->ip_summed = CHECKSUM_UNNECESSARY;
776 788
777 skb->truesize = skb->len + sizeof(struct sk_buff); 789 skb->truesize = skb->len + sizeof(struct sk_buff);
778 skb->protocol = eth_type_trans(skb, adapter->netdev); 790 skb->protocol = eth_type_trans(skb, adapter->netdev);
@@ -1626,10 +1638,12 @@ static void be_netdev_init(struct net_device *netdev)
1626 1638
1627 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO | 1639 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
1628 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM | 1640 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
1629 NETIF_F_IPV6_CSUM | NETIF_F_TSO6; 1641 NETIF_F_IPV6_CSUM;
1630 1642
1631 netdev->flags |= IFF_MULTICAST; 1643 netdev->flags |= IFF_MULTICAST;
1632 1644
1645 adapter->rx_csum = true;
1646
1633 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops); 1647 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
1634 1648
1635 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops); 1649 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c
index b4da18213324..c15fc281f79f 100644
--- a/drivers/net/bfin_mac.c
+++ b/drivers/net/bfin_mac.c
@@ -194,13 +194,13 @@ static int desc_list_init(void)
194 struct dma_descriptor *b = &(r->desc_b); 194 struct dma_descriptor *b = &(r->desc_b);
195 195
196 /* allocate a new skb for next time receive */ 196 /* allocate a new skb for next time receive */
197 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2); 197 new_skb = dev_alloc_skb(PKT_BUF_SZ + NET_IP_ALIGN);
198 if (!new_skb) { 198 if (!new_skb) {
199 printk(KERN_NOTICE DRV_NAME 199 printk(KERN_NOTICE DRV_NAME
200 ": init: low on mem - packet dropped\n"); 200 ": init: low on mem - packet dropped\n");
201 goto init_error; 201 goto init_error;
202 } 202 }
203 skb_reserve(new_skb, 2); 203 skb_reserve(new_skb, NET_IP_ALIGN);
204 r->skb = new_skb; 204 r->skb = new_skb;
205 205
206 /* 206 /*
@@ -566,9 +566,9 @@ static void adjust_tx_list(void)
566 */ 566 */
567 if (current_tx_ptr->next->next == tx_list_head) { 567 if (current_tx_ptr->next->next == tx_list_head) {
568 while (tx_list_head->status.status_word == 0) { 568 while (tx_list_head->status.status_word == 0) {
569 mdelay(1); 569 udelay(10);
570 if (tx_list_head->status.status_word != 0 570 if (tx_list_head->status.status_word != 0
571 || !(bfin_read_DMA2_IRQ_STATUS() & 0x08)) { 571 || !(bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)) {
572 goto adjust_head; 572 goto adjust_head;
573 } 573 }
574 if (timeout_cnt-- < 0) { 574 if (timeout_cnt-- < 0) {
@@ -606,93 +606,41 @@ static int bfin_mac_hard_start_xmit(struct sk_buff *skb,
606 struct net_device *dev) 606 struct net_device *dev)
607{ 607{
608 u16 *data; 608 u16 *data;
609 609 u32 data_align = (unsigned long)(skb->data) & 0x3;
610 current_tx_ptr->skb = skb; 610 current_tx_ptr->skb = skb;
611 611
612 if (ANOMALY_05000285) { 612 if (data_align == 0x2) {
613 /* 613 /* move skb->data to current_tx_ptr payload */
614 * TXDWA feature is not avaible to older revision < 0.3 silicon 614 data = (u16 *)(skb->data) - 1;
615 * of BF537 615 *data = (u16)(skb->len);
616 * 616 current_tx_ptr->desc_a.start_addr = (u32)data;
617 * Only if data buffer is ODD WORD alignment, we do not 617 /* this is important! */
618 * need to memcpy 618 blackfin_dcache_flush_range((u32)data,
619 */ 619 (u32)((u8 *)data + skb->len + 4));
620 u32 data_align = (u32)(skb->data) & 0x3;
621 if (data_align == 0x2) {
622 /* move skb->data to current_tx_ptr payload */
623 data = (u16 *)(skb->data) - 1;
624 *data = (u16)(skb->len);
625 current_tx_ptr->desc_a.start_addr = (u32)data;
626 /* this is important! */
627 blackfin_dcache_flush_range((u32)data,
628 (u32)((u8 *)data + skb->len + 4));
629 } else {
630 *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len);
631 memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data,
632 skb->len);
633 current_tx_ptr->desc_a.start_addr =
634 (u32)current_tx_ptr->packet;
635 if (current_tx_ptr->status.status_word != 0)
636 current_tx_ptr->status.status_word = 0;
637 blackfin_dcache_flush_range(
638 (u32)current_tx_ptr->packet,
639 (u32)(current_tx_ptr->packet + skb->len + 2));
640 }
641 } else { 620 } else {
642 /* 621 *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len);
643 * TXDWA feature is avaible to revision < 0.3 silicon of 622 memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data,
644 * BF537 and always avaible to BF52x 623 skb->len);
645 */ 624 current_tx_ptr->desc_a.start_addr =
646 u32 data_align = (u32)(skb->data) & 0x3; 625 (u32)current_tx_ptr->packet;
647 if (data_align == 0x0) { 626 if (current_tx_ptr->status.status_word != 0)
648 u16 sysctl = bfin_read_EMAC_SYSCTL(); 627 current_tx_ptr->status.status_word = 0;
649 sysctl |= TXDWA; 628 blackfin_dcache_flush_range(
650 bfin_write_EMAC_SYSCTL(sysctl); 629 (u32)current_tx_ptr->packet,
651 630 (u32)(current_tx_ptr->packet + skb->len + 2));
652 /* move skb->data to current_tx_ptr payload */
653 data = (u16 *)(skb->data) - 2;
654 *data = (u16)(skb->len);
655 current_tx_ptr->desc_a.start_addr = (u32)data;
656 /* this is important! */
657 blackfin_dcache_flush_range(
658 (u32)data,
659 (u32)((u8 *)data + skb->len + 4));
660 } else if (data_align == 0x2) {
661 u16 sysctl = bfin_read_EMAC_SYSCTL();
662 sysctl &= ~TXDWA;
663 bfin_write_EMAC_SYSCTL(sysctl);
664
665 /* move skb->data to current_tx_ptr payload */
666 data = (u16 *)(skb->data) - 1;
667 *data = (u16)(skb->len);
668 current_tx_ptr->desc_a.start_addr = (u32)data;
669 /* this is important! */
670 blackfin_dcache_flush_range(
671 (u32)data,
672 (u32)((u8 *)data + skb->len + 4));
673 } else {
674 u16 sysctl = bfin_read_EMAC_SYSCTL();
675 sysctl &= ~TXDWA;
676 bfin_write_EMAC_SYSCTL(sysctl);
677
678 *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len);
679 memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data,
680 skb->len);
681 current_tx_ptr->desc_a.start_addr =
682 (u32)current_tx_ptr->packet;
683 if (current_tx_ptr->status.status_word != 0)
684 current_tx_ptr->status.status_word = 0;
685 blackfin_dcache_flush_range(
686 (u32)current_tx_ptr->packet,
687 (u32)(current_tx_ptr->packet + skb->len + 2));
688 }
689 } 631 }
690 632
633 /* make sure the internal data buffers in the core are drained
634 * so that the DMA descriptors are completely written when the
635 * DMA engine goes to fetch them below
636 */
637 SSYNC();
638
691 /* enable this packet's dma */ 639 /* enable this packet's dma */
692 current_tx_ptr->desc_a.config |= DMAEN; 640 current_tx_ptr->desc_a.config |= DMAEN;
693 641
694 /* tx dma is running, just return */ 642 /* tx dma is running, just return */
695 if (bfin_read_DMA2_IRQ_STATUS() & 0x08) 643 if (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)
696 goto out; 644 goto out;
697 645
698 /* tx dma is not running */ 646 /* tx dma is not running */
@@ -718,7 +666,7 @@ static void bfin_mac_rx(struct net_device *dev)
718 666
719 /* allocate a new skb for next time receive */ 667 /* allocate a new skb for next time receive */
720 skb = current_rx_ptr->skb; 668 skb = current_rx_ptr->skb;
721 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2); 669 new_skb = dev_alloc_skb(PKT_BUF_SZ + NET_IP_ALIGN);
722 if (!new_skb) { 670 if (!new_skb) {
723 printk(KERN_NOTICE DRV_NAME 671 printk(KERN_NOTICE DRV_NAME
724 ": rx: low on mem - packet dropped\n"); 672 ": rx: low on mem - packet dropped\n");
@@ -726,7 +674,7 @@ static void bfin_mac_rx(struct net_device *dev)
726 goto out; 674 goto out;
727 } 675 }
728 /* reserve 2 bytes for RXDWA padding */ 676 /* reserve 2 bytes for RXDWA padding */
729 skb_reserve(new_skb, 2); 677 skb_reserve(new_skb, NET_IP_ALIGN);
730 current_rx_ptr->skb = new_skb; 678 current_rx_ptr->skb = new_skb;
731 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2; 679 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
732 680
@@ -1022,7 +970,8 @@ static int __devinit bfin_mac_probe(struct platform_device *pdev)
1022{ 970{
1023 struct net_device *ndev; 971 struct net_device *ndev;
1024 struct bfin_mac_local *lp; 972 struct bfin_mac_local *lp;
1025 int rc, i; 973 struct platform_device *pd;
974 int rc;
1026 975
1027 ndev = alloc_etherdev(sizeof(struct bfin_mac_local)); 976 ndev = alloc_etherdev(sizeof(struct bfin_mac_local));
1028 if (!ndev) { 977 if (!ndev) {
@@ -1047,13 +996,6 @@ static int __devinit bfin_mac_probe(struct platform_device *pdev)
1047 goto out_err_probe_mac; 996 goto out_err_probe_mac;
1048 } 997 }
1049 998
1050 /* set the GPIO pins to Ethernet mode */
1051 rc = peripheral_request_list(pin_req, DRV_NAME);
1052 if (rc) {
1053 dev_err(&pdev->dev, "Requesting peripherals failed!\n");
1054 rc = -EFAULT;
1055 goto out_err_setup_pin_mux;
1056 }
1057 999
1058 /* 1000 /*
1059 * Is it valid? (Did bootloader initialize it?) 1001 * Is it valid? (Did bootloader initialize it?)
@@ -1069,26 +1011,14 @@ static int __devinit bfin_mac_probe(struct platform_device *pdev)
1069 1011
1070 setup_mac_addr(ndev->dev_addr); 1012 setup_mac_addr(ndev->dev_addr);
1071 1013
1072 /* MDIO bus initial */ 1014 if (!pdev->dev.platform_data) {
1073 lp->mii_bus = mdiobus_alloc(); 1015 dev_err(&pdev->dev, "Cannot get platform device bfin_mii_bus!\n");
1074 if (lp->mii_bus == NULL) 1016 rc = -ENODEV;
1075 goto out_err_mdiobus_alloc; 1017 goto out_err_probe_mac;
1076
1077 lp->mii_bus->priv = ndev;
1078 lp->mii_bus->read = bfin_mdiobus_read;
1079 lp->mii_bus->write = bfin_mdiobus_write;
1080 lp->mii_bus->reset = bfin_mdiobus_reset;
1081 lp->mii_bus->name = "bfin_mac_mdio";
1082 snprintf(lp->mii_bus->id, MII_BUS_ID_SIZE, "0");
1083 lp->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1084 for (i = 0; i < PHY_MAX_ADDR; ++i)
1085 lp->mii_bus->irq[i] = PHY_POLL;
1086
1087 rc = mdiobus_register(lp->mii_bus);
1088 if (rc) {
1089 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
1090 goto out_err_mdiobus_register;
1091 } 1018 }
1019 pd = pdev->dev.platform_data;
1020 lp->mii_bus = platform_get_drvdata(pd);
1021 lp->mii_bus->priv = ndev;
1092 1022
1093 rc = mii_probe(ndev); 1023 rc = mii_probe(ndev);
1094 if (rc) { 1024 if (rc) {
@@ -1107,7 +1037,7 @@ static int __devinit bfin_mac_probe(struct platform_device *pdev)
1107 /* now, enable interrupts */ 1037 /* now, enable interrupts */
1108 /* register irq handler */ 1038 /* register irq handler */
1109 rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt, 1039 rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt,
1110 IRQF_DISABLED | IRQF_SHARED, "EMAC_RX", ndev); 1040 IRQF_DISABLED, "EMAC_RX", ndev);
1111 if (rc) { 1041 if (rc) {
1112 dev_err(&pdev->dev, "Cannot request Blackfin MAC RX IRQ!\n"); 1042 dev_err(&pdev->dev, "Cannot request Blackfin MAC RX IRQ!\n");
1113 rc = -EBUSY; 1043 rc = -EBUSY;
@@ -1130,11 +1060,8 @@ out_err_reg_ndev:
1130out_err_request_irq: 1060out_err_request_irq:
1131out_err_mii_probe: 1061out_err_mii_probe:
1132 mdiobus_unregister(lp->mii_bus); 1062 mdiobus_unregister(lp->mii_bus);
1133out_err_mdiobus_register:
1134 mdiobus_free(lp->mii_bus); 1063 mdiobus_free(lp->mii_bus);
1135out_err_mdiobus_alloc:
1136 peripheral_free_list(pin_req); 1064 peripheral_free_list(pin_req);
1137out_err_setup_pin_mux:
1138out_err_probe_mac: 1065out_err_probe_mac:
1139 platform_set_drvdata(pdev, NULL); 1066 platform_set_drvdata(pdev, NULL);
1140 free_netdev(ndev); 1067 free_netdev(ndev);
@@ -1149,8 +1076,7 @@ static int __devexit bfin_mac_remove(struct platform_device *pdev)
1149 1076
1150 platform_set_drvdata(pdev, NULL); 1077 platform_set_drvdata(pdev, NULL);
1151 1078
1152 mdiobus_unregister(lp->mii_bus); 1079 lp->mii_bus->priv = NULL;
1153 mdiobus_free(lp->mii_bus);
1154 1080
1155 unregister_netdev(ndev); 1081 unregister_netdev(ndev);
1156 1082
@@ -1188,6 +1114,74 @@ static int bfin_mac_resume(struct platform_device *pdev)
1188#define bfin_mac_resume NULL 1114#define bfin_mac_resume NULL
1189#endif /* CONFIG_PM */ 1115#endif /* CONFIG_PM */
1190 1116
1117static int __devinit bfin_mii_bus_probe(struct platform_device *pdev)
1118{
1119 struct mii_bus *miibus;
1120 int rc, i;
1121
1122 /*
1123 * We are setting up a network card,
1124 * so set the GPIO pins to Ethernet mode
1125 */
1126 rc = peripheral_request_list(pin_req, DRV_NAME);
1127 if (rc) {
1128 dev_err(&pdev->dev, "Requesting peripherals failed!\n");
1129 return rc;
1130 }
1131
1132 rc = -ENOMEM;
1133 miibus = mdiobus_alloc();
1134 if (miibus == NULL)
1135 goto out_err_alloc;
1136 miibus->read = bfin_mdiobus_read;
1137 miibus->write = bfin_mdiobus_write;
1138 miibus->reset = bfin_mdiobus_reset;
1139
1140 miibus->parent = &pdev->dev;
1141 miibus->name = "bfin_mii_bus";
1142 snprintf(miibus->id, MII_BUS_ID_SIZE, "0");
1143 miibus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1144 if (miibus->irq == NULL)
1145 goto out_err_alloc;
1146 for (i = 0; i < PHY_MAX_ADDR; ++i)
1147 miibus->irq[i] = PHY_POLL;
1148
1149 rc = mdiobus_register(miibus);
1150 if (rc) {
1151 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
1152 goto out_err_mdiobus_register;
1153 }
1154
1155 platform_set_drvdata(pdev, miibus);
1156 return 0;
1157
1158out_err_mdiobus_register:
1159 mdiobus_free(miibus);
1160out_err_alloc:
1161 peripheral_free_list(pin_req);
1162
1163 return rc;
1164}
1165
1166static int __devexit bfin_mii_bus_remove(struct platform_device *pdev)
1167{
1168 struct mii_bus *miibus = platform_get_drvdata(pdev);
1169 platform_set_drvdata(pdev, NULL);
1170 mdiobus_unregister(miibus);
1171 mdiobus_free(miibus);
1172 peripheral_free_list(pin_req);
1173 return 0;
1174}
1175
1176static struct platform_driver bfin_mii_bus_driver = {
1177 .probe = bfin_mii_bus_probe,
1178 .remove = __devexit_p(bfin_mii_bus_remove),
1179 .driver = {
1180 .name = "bfin_mii_bus",
1181 .owner = THIS_MODULE,
1182 },
1183};
1184
1191static struct platform_driver bfin_mac_driver = { 1185static struct platform_driver bfin_mac_driver = {
1192 .probe = bfin_mac_probe, 1186 .probe = bfin_mac_probe,
1193 .remove = __devexit_p(bfin_mac_remove), 1187 .remove = __devexit_p(bfin_mac_remove),
@@ -1201,7 +1195,11 @@ static struct platform_driver bfin_mac_driver = {
1201 1195
1202static int __init bfin_mac_init(void) 1196static int __init bfin_mac_init(void)
1203{ 1197{
1204 return platform_driver_register(&bfin_mac_driver); 1198 int ret;
1199 ret = platform_driver_register(&bfin_mii_bus_driver);
1200 if (!ret)
1201 return platform_driver_register(&bfin_mac_driver);
1202 return -ENODEV;
1205} 1203}
1206 1204
1207module_init(bfin_mac_init); 1205module_init(bfin_mac_init);
@@ -1209,6 +1207,7 @@ module_init(bfin_mac_init);
1209static void __exit bfin_mac_cleanup(void) 1207static void __exit bfin_mac_cleanup(void)
1210{ 1208{
1211 platform_driver_unregister(&bfin_mac_driver); 1209 platform_driver_unregister(&bfin_mac_driver);
1210 platform_driver_unregister(&bfin_mii_bus_driver);
1212} 1211}
1213 1212
1214module_exit(bfin_mac_cleanup); 1213module_exit(bfin_mac_cleanup);
diff --git a/drivers/net/bmac.c b/drivers/net/bmac.c
index 44d015f70d1c..9578a3dfac01 100644
--- a/drivers/net/bmac.c
+++ b/drivers/net/bmac.c
@@ -1247,6 +1247,16 @@ static const struct ethtool_ops bmac_ethtool_ops = {
1247 .get_link = ethtool_op_get_link, 1247 .get_link = ethtool_op_get_link,
1248}; 1248};
1249 1249
1250static const struct net_device_ops bmac_netdev_ops = {
1251 .ndo_open = bmac_open,
1252 .ndo_stop = bmac_close,
1253 .ndo_start_xmit = bmac_output,
1254 .ndo_set_multicast_list = bmac_set_multicast,
1255 .ndo_set_mac_address = bmac_set_address,
1256 .ndo_change_mtu = eth_change_mtu,
1257 .ndo_validate_addr = eth_validate_addr,
1258};
1259
1250static int __devinit bmac_probe(struct macio_dev *mdev, const struct of_device_id *match) 1260static int __devinit bmac_probe(struct macio_dev *mdev, const struct of_device_id *match)
1251{ 1261{
1252 int j, rev, ret; 1262 int j, rev, ret;
@@ -1308,12 +1318,8 @@ static int __devinit bmac_probe(struct macio_dev *mdev, const struct of_device_i
1308 bmac_enable_and_reset_chip(dev); 1318 bmac_enable_and_reset_chip(dev);
1309 bmwrite(dev, INTDISABLE, DisableAll); 1319 bmwrite(dev, INTDISABLE, DisableAll);
1310 1320
1311 dev->open = bmac_open; 1321 dev->netdev_ops = &bmac_netdev_ops;
1312 dev->stop = bmac_close;
1313 dev->ethtool_ops = &bmac_ethtool_ops; 1322 dev->ethtool_ops = &bmac_ethtool_ops;
1314 dev->hard_start_xmit = bmac_output;
1315 dev->set_multicast_list = bmac_set_multicast;
1316 dev->set_mac_address = bmac_set_address;
1317 1323
1318 bmac_get_station_address(dev, addr); 1324 bmac_get_station_address(dev, addr);
1319 if (bmac_verify_checksum(dev) != 0) 1325 if (bmac_verify_checksum(dev) != 0)
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index b0cb29d4cc01..f53017250e09 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -48,6 +48,7 @@
48#include <linux/cache.h> 48#include <linux/cache.h>
49#include <linux/firmware.h> 49#include <linux/firmware.h>
50#include <linux/log2.h> 50#include <linux/log2.h>
51#include <linux/list.h>
51 52
52#include "bnx2.h" 53#include "bnx2.h"
53#include "bnx2_fw.h" 54#include "bnx2_fw.h"
@@ -2630,14 +2631,15 @@ bnx2_tx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
2630 tx_buf = &txr->tx_buf_ring[sw_ring_cons]; 2631 tx_buf = &txr->tx_buf_ring[sw_ring_cons];
2631 skb = tx_buf->skb; 2632 skb = tx_buf->skb;
2632 2633
2634 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
2635 prefetch(&skb->end);
2636
2633 /* partial BD completions possible with TSO packets */ 2637 /* partial BD completions possible with TSO packets */
2634 if (skb_is_gso(skb)) { 2638 if (tx_buf->is_gso) {
2635 u16 last_idx, last_ring_idx; 2639 u16 last_idx, last_ring_idx;
2636 2640
2637 last_idx = sw_cons + 2641 last_idx = sw_cons + tx_buf->nr_frags + 1;
2638 skb_shinfo(skb)->nr_frags + 1; 2642 last_ring_idx = sw_ring_cons + tx_buf->nr_frags + 1;
2639 last_ring_idx = sw_ring_cons +
2640 skb_shinfo(skb)->nr_frags + 1;
2641 if (unlikely(last_ring_idx >= MAX_TX_DESC_CNT)) { 2643 if (unlikely(last_ring_idx >= MAX_TX_DESC_CNT)) {
2642 last_idx++; 2644 last_idx++;
2643 } 2645 }
@@ -2649,7 +2651,7 @@ bnx2_tx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
2649 skb_dma_unmap(&bp->pdev->dev, skb, DMA_TO_DEVICE); 2651 skb_dma_unmap(&bp->pdev->dev, skb, DMA_TO_DEVICE);
2650 2652
2651 tx_buf->skb = NULL; 2653 tx_buf->skb = NULL;
2652 last = skb_shinfo(skb)->nr_frags; 2654 last = tx_buf->nr_frags;
2653 2655
2654 for (i = 0; i < last; i++) { 2656 for (i = 0; i < last; i++) {
2655 sw_cons = NEXT_TX_BD(sw_cons); 2657 sw_cons = NEXT_TX_BD(sw_cons);
@@ -2662,7 +2664,8 @@ bnx2_tx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
2662 if (tx_pkt == budget) 2664 if (tx_pkt == budget)
2663 break; 2665 break;
2664 2666
2665 hw_cons = bnx2_get_hw_tx_cons(bnapi); 2667 if (hw_cons == sw_cons)
2668 hw_cons = bnx2_get_hw_tx_cons(bnapi);
2666 } 2669 }
2667 2670
2668 txr->hw_tx_cons = hw_cons; 2671 txr->hw_tx_cons = hw_cons;
@@ -3308,7 +3311,7 @@ bnx2_set_rx_mode(struct net_device *dev)
3308{ 3311{
3309 struct bnx2 *bp = netdev_priv(dev); 3312 struct bnx2 *bp = netdev_priv(dev);
3310 u32 rx_mode, sort_mode; 3313 u32 rx_mode, sort_mode;
3311 struct dev_addr_list *uc_ptr; 3314 struct netdev_hw_addr *ha;
3312 int i; 3315 int i;
3313 3316
3314 if (!netif_running(dev)) 3317 if (!netif_running(dev))
@@ -3367,21 +3370,19 @@ bnx2_set_rx_mode(struct net_device *dev)
3367 sort_mode |= BNX2_RPM_SORT_USER0_MC_HSH_EN; 3370 sort_mode |= BNX2_RPM_SORT_USER0_MC_HSH_EN;
3368 } 3371 }
3369 3372
3370 uc_ptr = NULL;
3371 if (dev->uc_count > BNX2_MAX_UNICAST_ADDRESSES) { 3373 if (dev->uc_count > BNX2_MAX_UNICAST_ADDRESSES) {
3372 rx_mode |= BNX2_EMAC_RX_MODE_PROMISCUOUS; 3374 rx_mode |= BNX2_EMAC_RX_MODE_PROMISCUOUS;
3373 sort_mode |= BNX2_RPM_SORT_USER0_PROM_EN | 3375 sort_mode |= BNX2_RPM_SORT_USER0_PROM_EN |
3374 BNX2_RPM_SORT_USER0_PROM_VLAN; 3376 BNX2_RPM_SORT_USER0_PROM_VLAN;
3375 } else if (!(dev->flags & IFF_PROMISC)) { 3377 } else if (!(dev->flags & IFF_PROMISC)) {
3376 uc_ptr = dev->uc_list;
3377
3378 /* Add all entries into to the match filter list */ 3378 /* Add all entries into to the match filter list */
3379 for (i = 0; i < dev->uc_count; i++) { 3379 i = 0;
3380 bnx2_set_mac_addr(bp, uc_ptr->da_addr, 3380 list_for_each_entry(ha, &dev->uc_list, list) {
3381 bnx2_set_mac_addr(bp, ha->addr,
3381 i + BNX2_START_UNICAST_ADDRESS_INDEX); 3382 i + BNX2_START_UNICAST_ADDRESS_INDEX);
3382 sort_mode |= (1 << 3383 sort_mode |= (1 <<
3383 (i + BNX2_START_UNICAST_ADDRESS_INDEX)); 3384 (i + BNX2_START_UNICAST_ADDRESS_INDEX));
3384 uc_ptr = uc_ptr->next; 3385 i++;
3385 } 3386 }
3386 3387
3387 } 3388 }
@@ -6179,6 +6180,8 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev)
6179 txbd->tx_bd_vlan_tag_flags = vlan_tag_flags | TX_BD_FLAGS_START; 6180 txbd->tx_bd_vlan_tag_flags = vlan_tag_flags | TX_BD_FLAGS_START;
6180 6181
6181 last_frag = skb_shinfo(skb)->nr_frags; 6182 last_frag = skb_shinfo(skb)->nr_frags;
6183 tx_buf->nr_frags = last_frag;
6184 tx_buf->is_gso = skb_is_gso(skb);
6182 6185
6183 for (i = 0; i < last_frag; i++) { 6186 for (i = 0; i < last_frag; i++) {
6184 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 6187 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
@@ -6207,7 +6210,6 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev)
6207 mmiowb(); 6210 mmiowb();
6208 6211
6209 txr->tx_prod = prod; 6212 txr->tx_prod = prod;
6210 dev->trans_start = jiffies;
6211 6213
6212 if (unlikely(bnx2_tx_avail(bp, txr) <= MAX_SKB_FRAGS)) { 6214 if (unlikely(bnx2_tx_avail(bp, txr) <= MAX_SKB_FRAGS)) {
6213 netif_tx_stop_queue(txq); 6215 netif_tx_stop_queue(txq);
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 5b570e17c839..026ed1c84698 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -6552,6 +6552,8 @@ struct sw_pg {
6552 6552
6553struct sw_tx_bd { 6553struct sw_tx_bd {
6554 struct sk_buff *skb; 6554 struct sk_buff *skb;
6555 unsigned short is_gso;
6556 unsigned short nr_frags;
6555}; 6557};
6556 6558
6557#define SW_RXBD_RING_SIZE (sizeof(struct sw_bd) * RX_DESC_CNT) 6559#define SW_RXBD_RING_SIZE (sizeof(struct sw_bd) * RX_DESC_CNT)
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index a329bee25550..8678457849f9 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -965,6 +965,21 @@ struct bnx2x {
965 int gunzip_outlen; 965 int gunzip_outlen;
966#define FW_BUF_SIZE 0x8000 966#define FW_BUF_SIZE 0x8000
967 967
968 struct raw_op *init_ops;
969 /* Init blocks offsets inside init_ops */
970 u16 *init_ops_offsets;
971 /* Data blob - has 32 bit granularity */
972 u32 *init_data;
973 /* Zipped PRAM blobs - raw data */
974 const u8 *tsem_int_table_data;
975 const u8 *tsem_pram_data;
976 const u8 *usem_int_table_data;
977 const u8 *usem_pram_data;
978 const u8 *xsem_int_table_data;
979 const u8 *xsem_pram_data;
980 const u8 *csem_int_table_data;
981 const u8 *csem_pram_data;
982 const struct firmware *firmware;
968}; 983};
969 984
970 985
diff --git a/drivers/net/bnx2x_fw_file_hdr.h b/drivers/net/bnx2x_fw_file_hdr.h
new file mode 100644
index 000000000000..3f5ee5d7cc2a
--- /dev/null
+++ b/drivers/net/bnx2x_fw_file_hdr.h
@@ -0,0 +1,37 @@
1/* bnx2x_fw_file_hdr.h: FW binary file header structure.
2 *
3 * Copyright (c) 2007-2009 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
10 * Written by: Vladislav Zolotarov <vladz@broadcom.com>
11 * Based on the original idea of John Wright <john.wright@hp.com>.
12 */
13
14#ifndef BNX2X_INIT_FILE_HDR_H
15#define BNX2X_INIT_FILE_HDR_H
16
17struct bnx2x_fw_file_section {
18 __be32 len;
19 __be32 offset;
20};
21
22struct bnx2x_fw_file_hdr {
23 struct bnx2x_fw_file_section init_ops;
24 struct bnx2x_fw_file_section init_ops_offsets;
25 struct bnx2x_fw_file_section init_data;
26 struct bnx2x_fw_file_section tsem_int_table_data;
27 struct bnx2x_fw_file_section tsem_pram_data;
28 struct bnx2x_fw_file_section usem_int_table_data;
29 struct bnx2x_fw_file_section usem_pram_data;
30 struct bnx2x_fw_file_section csem_int_table_data;
31 struct bnx2x_fw_file_section csem_pram_data;
32 struct bnx2x_fw_file_section xsem_int_table_data;
33 struct bnx2x_fw_file_section xsem_pram_data;
34 struct bnx2x_fw_file_section fw_version;
35};
36
37#endif /* BNX2X_INIT_FILE_HDR_H */
diff --git a/drivers/net/bnx2x_init.h b/drivers/net/bnx2x_init.h
index 39ba2936c0c2..3ba4d888068f 100644
--- a/drivers/net/bnx2x_init.h
+++ b/drivers/net/bnx2x_init.h
@@ -1,4 +1,5 @@
1/* bnx2x_init.h: Broadcom Everest network driver. 1/* bnx2x_init.h: Broadcom Everest network driver.
2 * Structures and macroes needed during the initialization.
2 * 3 *
3 * Copyright (c) 2007-2009 Broadcom Corporation 4 * Copyright (c) 2007-2009 Broadcom Corporation
4 * 5 *
@@ -8,6 +9,7 @@
8 * 9 *
9 * Maintained by: Eilon Greenstein <eilong@broadcom.com> 10 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
10 * Written by: Eliezer Tamir 11 * Written by: Eliezer Tamir
12 * Modified by: Vladislav Zolotarov <vladz@broadcom.com>
11 */ 13 */
12 14
13#ifndef BNX2X_INIT_H 15#ifndef BNX2X_INIT_H
@@ -45,33 +47,71 @@
45#define OP_WR_64 0x8 /* write 64 bit pattern */ 47#define OP_WR_64 0x8 /* write 64 bit pattern */
46#define OP_WB 0x9 /* copy a string using DMAE */ 48#define OP_WB 0x9 /* copy a string using DMAE */
47 49
48/* Operation specific for E1 */
49#define OP_RD_E1 0xa /* read single register */
50#define OP_WR_E1 0xb /* write single register */
51#define OP_IW_E1 0xc /* write single register using mailbox */
52#define OP_SW_E1 0xd /* copy a string to the device */
53#define OP_SI_E1 0xe /* copy a string using mailbox */
54#define OP_ZR_E1 0xf /* clear memory */
55#define OP_ZP_E1 0x10 /* unzip then copy with DMAE */
56#define OP_WR_64_E1 0x11 /* write 64 bit pattern on E1 */
57#define OP_WB_E1 0x12 /* copy a string using DMAE */
58
59/* Operation specific for E1H */
60#define OP_RD_E1H 0x13 /* read single register */
61#define OP_WR_E1H 0x14 /* write single register */
62#define OP_IW_E1H 0x15 /* write single register using mailbox */
63#define OP_SW_E1H 0x16 /* copy a string to the device */
64#define OP_SI_E1H 0x17 /* copy a string using mailbox */
65#define OP_ZR_E1H 0x18 /* clear memory */
66#define OP_ZP_E1H 0x19 /* unzip then copy with DMAE */
67#define OP_WR_64_E1H 0x1a /* write 64 bit pattern on E1H */
68#define OP_WB_E1H 0x1b /* copy a string using DMAE */
69
70/* FPGA and EMUL specific operations */ 50/* FPGA and EMUL specific operations */
71#define OP_WR_EMUL_E1H 0x1c /* write single register on E1H Emul */ 51#define OP_WR_EMUL 0xa /* write single register on Emulation */
72#define OP_WR_EMUL 0x1d /* write single register on Emulation */ 52#define OP_WR_FPGA 0xb /* write single register on FPGA */
73#define OP_WR_FPGA 0x1e /* write single register on FPGA */ 53#define OP_WR_ASIC 0xc /* write single register on ASIC */
74#define OP_WR_ASIC 0x1f /* write single register on ASIC */ 54
55/* Init stages */
56#define COMMON_STAGE 0
57#define PORT0_STAGE 1
58#define PORT1_STAGE 2
59/* Never reorder FUNCx stages !!! */
60#define FUNC0_STAGE 3
61#define FUNC1_STAGE 4
62#define FUNC2_STAGE 5
63#define FUNC3_STAGE 6
64#define FUNC4_STAGE 7
65#define FUNC5_STAGE 8
66#define FUNC6_STAGE 9
67#define FUNC7_STAGE 10
68#define STAGE_IDX_MAX 11
69
70#define STAGE_START 0
71#define STAGE_END 1
72
73
74/* Indices of blocks */
75#define PRS_BLOCK 0
76#define SRCH_BLOCK 1
77#define TSDM_BLOCK 2
78#define TCM_BLOCK 3
79#define BRB1_BLOCK 4
80#define TSEM_BLOCK 5
81#define PXPCS_BLOCK 6
82#define EMAC0_BLOCK 7
83#define EMAC1_BLOCK 8
84#define DBU_BLOCK 9
85#define MISC_BLOCK 10
86#define DBG_BLOCK 11
87#define NIG_BLOCK 12
88#define MCP_BLOCK 13
89#define UPB_BLOCK 14
90#define CSDM_BLOCK 15
91#define USDM_BLOCK 16
92#define CCM_BLOCK 17
93#define UCM_BLOCK 18
94#define USEM_BLOCK 19
95#define CSEM_BLOCK 20
96#define XPB_BLOCK 21
97#define DQ_BLOCK 22
98#define TIMERS_BLOCK 23
99#define XSDM_BLOCK 24
100#define QM_BLOCK 25
101#define PBF_BLOCK 26
102#define XCM_BLOCK 27
103#define XSEM_BLOCK 28
104#define CDU_BLOCK 29
105#define DMAE_BLOCK 30
106#define PXP_BLOCK 31
107#define CFC_BLOCK 32
108#define HC_BLOCK 33
109#define PXP2_BLOCK 34
110#define MISC_AEU_BLOCK 35
111
112/* Returns the index of start or end of a specific block stage in ops array*/
113#define BLOCK_OPS_IDX(block, stage, end) \
114 (2*(((block)*STAGE_IDX_MAX) + (stage)) + (end))
75 115
76 116
77struct raw_op { 117struct raw_op {
@@ -118,292 +158,6 @@ union init_op {
118 struct raw_op raw; 158 struct raw_op raw;
119}; 159};
120 160
121#include "bnx2x_init_values.h"
122
123static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val);
124static int bnx2x_gunzip(struct bnx2x *bp, u8 *zbuf, int len);
125
126static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data,
127 u32 len)
128{
129 int i;
130
131 for (i = 0; i < len; i++) {
132 REG_WR(bp, addr + i*4, data[i]);
133 if (!(i % 10000)) {
134 touch_softlockup_watchdog();
135 cpu_relax();
136 }
137 }
138}
139
140static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, const u32 *data,
141 u16 len)
142{
143 int i;
144
145 for (i = 0; i < len; i++) {
146 REG_WR_IND(bp, addr + i*4, data[i]);
147 if (!(i % 10000)) {
148 touch_softlockup_watchdog();
149 cpu_relax();
150 }
151 }
152}
153
154static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
155{
156 int offset = 0;
157
158 if (bp->dmae_ready) {
159 while (len > DMAE_LEN32_WR_MAX) {
160 bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
161 addr + offset, DMAE_LEN32_WR_MAX);
162 offset += DMAE_LEN32_WR_MAX * 4;
163 len -= DMAE_LEN32_WR_MAX;
164 }
165 bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
166 addr + offset, len);
167 } else
168 bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
169}
170
171static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)
172{
173 u32 buf_len = (((len * 4) > FW_BUF_SIZE) ? FW_BUF_SIZE : (len * 4));
174 u32 buf_len32 = buf_len / 4;
175 int i;
176
177 memset(bp->gunzip_buf, fill, buf_len);
178
179 for (i = 0; i < len; i += buf_len32) {
180 u32 cur_len = min(buf_len32, len - i);
181
182 bnx2x_write_big_buf(bp, addr + i * 4, cur_len);
183 }
184}
185
186static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, const u32 *data,
187 u32 len64)
188{
189 u32 buf_len32 = FW_BUF_SIZE / 4;
190 u32 len = len64 * 2;
191 u64 data64 = 0;
192 int i;
193
194 /* 64 bit value is in a blob: first low DWORD, then high DWORD */
195 data64 = HILO_U64((*(data + 1)), (*data));
196 len64 = min((u32)(FW_BUF_SIZE/8), len64);
197 for (i = 0; i < len64; i++) {
198 u64 *pdata = ((u64 *)(bp->gunzip_buf)) + i;
199
200 *pdata = data64;
201 }
202
203 for (i = 0; i < len; i += buf_len32) {
204 u32 cur_len = min(buf_len32, len - i);
205
206 bnx2x_write_big_buf(bp, addr + i * 4, cur_len);
207 }
208}
209
210/*********************************************************
211 There are different blobs for each PRAM section.
212 In addition, each blob write operation is divided into a few operations
213 in order to decrease the amount of phys. contiguous buffer needed.
214 Thus, when we select a blob the address may be with some offset
215 from the beginning of PRAM section.
216 The same holds for the INT_TABLE sections.
217**********************************************************/
218#define IF_IS_INT_TABLE_ADDR(base, addr) \
219 if (((base) <= (addr)) && ((base) + 0x400 >= (addr)))
220
221#define IF_IS_PRAM_ADDR(base, addr) \
222 if (((base) <= (addr)) && ((base) + 0x40000 >= (addr)))
223
224static const u32 *bnx2x_sel_blob(u32 addr, const u32 *data, int is_e1)
225{
226 IF_IS_INT_TABLE_ADDR(TSEM_REG_INT_TABLE, addr)
227 data = is_e1 ? tsem_int_table_data_e1 :
228 tsem_int_table_data_e1h;
229 else
230 IF_IS_INT_TABLE_ADDR(CSEM_REG_INT_TABLE, addr)
231 data = is_e1 ? csem_int_table_data_e1 :
232 csem_int_table_data_e1h;
233 else
234 IF_IS_INT_TABLE_ADDR(USEM_REG_INT_TABLE, addr)
235 data = is_e1 ? usem_int_table_data_e1 :
236 usem_int_table_data_e1h;
237 else
238 IF_IS_INT_TABLE_ADDR(XSEM_REG_INT_TABLE, addr)
239 data = is_e1 ? xsem_int_table_data_e1 :
240 xsem_int_table_data_e1h;
241 else
242 IF_IS_PRAM_ADDR(TSEM_REG_PRAM, addr)
243 data = is_e1 ? tsem_pram_data_e1 : tsem_pram_data_e1h;
244 else
245 IF_IS_PRAM_ADDR(CSEM_REG_PRAM, addr)
246 data = is_e1 ? csem_pram_data_e1 : csem_pram_data_e1h;
247 else
248 IF_IS_PRAM_ADDR(USEM_REG_PRAM, addr)
249 data = is_e1 ? usem_pram_data_e1 : usem_pram_data_e1h;
250 else
251 IF_IS_PRAM_ADDR(XSEM_REG_PRAM, addr)
252 data = is_e1 ? xsem_pram_data_e1 : xsem_pram_data_e1h;
253
254 return data;
255}
256
257static void bnx2x_init_wr_wb(struct bnx2x *bp, u32 addr, const u32 *data,
258 u32 len, int gunzip, int is_e1, u32 blob_off)
259{
260 int offset = 0;
261
262 data = bnx2x_sel_blob(addr, data, is_e1) + blob_off;
263
264 if (gunzip) {
265 int rc;
266#ifdef __BIG_ENDIAN
267 int i, size;
268 u32 *temp;
269
270 temp = kmalloc(len, GFP_KERNEL);
271 size = (len / 4) + ((len % 4) ? 1 : 0);
272 for (i = 0; i < size; i++)
273 temp[i] = swab32(data[i]);
274 data = temp;
275#endif
276 rc = bnx2x_gunzip(bp, (u8 *)data, len);
277 if (rc) {
278 BNX2X_ERR("gunzip failed ! rc %d\n", rc);
279#ifdef __BIG_ENDIAN
280 kfree(temp);
281#endif
282 return;
283 }
284 len = bp->gunzip_outlen;
285#ifdef __BIG_ENDIAN
286 kfree(temp);
287 for (i = 0; i < len; i++)
288 ((u32 *)bp->gunzip_buf)[i] =
289 swab32(((u32 *)bp->gunzip_buf)[i]);
290#endif
291 } else {
292 if ((len * 4) > FW_BUF_SIZE) {
293 BNX2X_ERR("LARGE DMAE OPERATION ! "
294 "addr 0x%x len 0x%x\n", addr, len*4);
295 return;
296 }
297 memcpy(bp->gunzip_buf, data, len * 4);
298 }
299
300 if (bp->dmae_ready) {
301 while (len > DMAE_LEN32_WR_MAX) {
302 bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
303 addr + offset, DMAE_LEN32_WR_MAX);
304 offset += DMAE_LEN32_WR_MAX * 4;
305 len -= DMAE_LEN32_WR_MAX;
306 }
307 bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
308 addr + offset, len);
309 } else
310 bnx2x_init_ind_wr(bp, addr, bp->gunzip_buf, len);
311}
312
313static void bnx2x_init_block(struct bnx2x *bp, u32 op_start, u32 op_end)
314{
315 int is_e1 = CHIP_IS_E1(bp);
316 int is_e1h = CHIP_IS_E1H(bp);
317 int is_emul_e1h = (CHIP_REV_IS_EMUL(bp) && is_e1h);
318 int hw_wr, i;
319 union init_op *op;
320 u32 op_type, addr, len;
321 const u32 *data, *data_base;
322
323 if (CHIP_REV_IS_FPGA(bp))
324 hw_wr = OP_WR_FPGA;
325 else if (CHIP_REV_IS_EMUL(bp))
326 hw_wr = OP_WR_EMUL;
327 else
328 hw_wr = OP_WR_ASIC;
329
330 if (is_e1)
331 data_base = init_data_e1;
332 else /* CHIP_IS_E1H(bp) */
333 data_base = init_data_e1h;
334
335 for (i = op_start; i < op_end; i++) {
336
337 op = (union init_op *)&(init_ops[i]);
338
339 op_type = op->str_wr.op;
340 addr = op->str_wr.offset;
341 len = op->str_wr.data_len;
342 data = data_base + op->str_wr.data_off;
343
344 /* careful! it must be in order */
345 if (unlikely(op_type > OP_WB)) {
346
347 /* If E1 only */
348 if (op_type <= OP_WB_E1) {
349 if (is_e1)
350 op_type -= (OP_RD_E1 - OP_RD);
351
352 /* If E1H only */
353 } else if (op_type <= OP_WB_E1H) {
354 if (is_e1h)
355 op_type -= (OP_RD_E1H - OP_RD);
356 }
357
358 /* HW/EMUL specific */
359 if (op_type == hw_wr)
360 op_type = OP_WR;
361
362 /* EMUL on E1H is special */
363 if ((op_type == OP_WR_EMUL_E1H) && is_emul_e1h)
364 op_type = OP_WR;
365 }
366
367 switch (op_type) {
368 case OP_RD:
369 REG_RD(bp, addr);
370 break;
371 case OP_WR:
372 REG_WR(bp, addr, op->write.val);
373 break;
374 case OP_SW:
375 bnx2x_init_str_wr(bp, addr, data, len);
376 break;
377 case OP_WB:
378 bnx2x_init_wr_wb(bp, addr, data, len, 0, is_e1, 0);
379 break;
380 case OP_SI:
381 bnx2x_init_ind_wr(bp, addr, data, len);
382 break;
383 case OP_ZR:
384 bnx2x_init_fill(bp, addr, 0, op->zero.len);
385 break;
386 case OP_ZP:
387 bnx2x_init_wr_wb(bp, addr, data, len, 1, is_e1,
388 op->str_wr.data_off);
389 break;
390 case OP_WR_64:
391 bnx2x_init_wr_64(bp, addr, data, len);
392 break;
393 default:
394 /* happens whenever an op is of a diff HW */
395#if 0
396 DP(NETIF_MSG_HW, "skipping init operation "
397 "index %d[%d:%d]: type %d addr 0x%x "
398 "len %d(0x%x)\n",
399 i, op_start, op_end, op_type, addr, len, len);
400#endif
401 break;
402 }
403 }
404}
405
406
407/**************************************************************************** 161/****************************************************************************
408* PXP 162* PXP
409****************************************************************************/ 163****************************************************************************/
@@ -567,111 +321,6 @@ static const struct arb_line write_arb_addr[NUM_WR_Q-1] = {
567 PXP2_REG_RQ_BW_WR_UBOUND30} 321 PXP2_REG_RQ_BW_WR_UBOUND30}
568}; 322};
569 323
570static void bnx2x_init_pxp(struct bnx2x *bp)
571{
572 u16 devctl;
573 int r_order, w_order;
574 u32 val, i;
575
576 pci_read_config_word(bp->pdev,
577 bp->pcie_cap + PCI_EXP_DEVCTL, &devctl);
578 DP(NETIF_MSG_HW, "read 0x%x from devctl\n", devctl);
579 w_order = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
580 if (bp->mrrs == -1)
581 r_order = ((devctl & PCI_EXP_DEVCTL_READRQ) >> 12);
582 else {
583 DP(NETIF_MSG_HW, "force read order to %d\n", bp->mrrs);
584 r_order = bp->mrrs;
585 }
586
587 if (r_order > MAX_RD_ORD) {
588 DP(NETIF_MSG_HW, "read order of %d order adjusted to %d\n",
589 r_order, MAX_RD_ORD);
590 r_order = MAX_RD_ORD;
591 }
592 if (w_order > MAX_WR_ORD) {
593 DP(NETIF_MSG_HW, "write order of %d order adjusted to %d\n",
594 w_order, MAX_WR_ORD);
595 w_order = MAX_WR_ORD;
596 }
597 if (CHIP_REV_IS_FPGA(bp)) {
598 DP(NETIF_MSG_HW, "write order adjusted to 1 for FPGA\n");
599 w_order = 0;
600 }
601 DP(NETIF_MSG_HW, "read order %d write order %d\n", r_order, w_order);
602
603 for (i = 0; i < NUM_RD_Q-1; i++) {
604 REG_WR(bp, read_arb_addr[i].l, read_arb_data[i][r_order].l);
605 REG_WR(bp, read_arb_addr[i].add,
606 read_arb_data[i][r_order].add);
607 REG_WR(bp, read_arb_addr[i].ubound,
608 read_arb_data[i][r_order].ubound);
609 }
610
611 for (i = 0; i < NUM_WR_Q-1; i++) {
612 if ((write_arb_addr[i].l == PXP2_REG_RQ_BW_WR_L29) ||
613 (write_arb_addr[i].l == PXP2_REG_RQ_BW_WR_L30)) {
614
615 REG_WR(bp, write_arb_addr[i].l,
616 write_arb_data[i][w_order].l);
617
618 REG_WR(bp, write_arb_addr[i].add,
619 write_arb_data[i][w_order].add);
620
621 REG_WR(bp, write_arb_addr[i].ubound,
622 write_arb_data[i][w_order].ubound);
623 } else {
624
625 val = REG_RD(bp, write_arb_addr[i].l);
626 REG_WR(bp, write_arb_addr[i].l,
627 val | (write_arb_data[i][w_order].l << 10));
628
629 val = REG_RD(bp, write_arb_addr[i].add);
630 REG_WR(bp, write_arb_addr[i].add,
631 val | (write_arb_data[i][w_order].add << 10));
632
633 val = REG_RD(bp, write_arb_addr[i].ubound);
634 REG_WR(bp, write_arb_addr[i].ubound,
635 val | (write_arb_data[i][w_order].ubound << 7));
636 }
637 }
638
639 val = write_arb_data[NUM_WR_Q-1][w_order].add;
640 val += write_arb_data[NUM_WR_Q-1][w_order].ubound << 10;
641 val += write_arb_data[NUM_WR_Q-1][w_order].l << 17;
642 REG_WR(bp, PXP2_REG_PSWRQ_BW_RD, val);
643
644 val = read_arb_data[NUM_RD_Q-1][r_order].add;
645 val += read_arb_data[NUM_RD_Q-1][r_order].ubound << 10;
646 val += read_arb_data[NUM_RD_Q-1][r_order].l << 17;
647 REG_WR(bp, PXP2_REG_PSWRQ_BW_WR, val);
648
649 REG_WR(bp, PXP2_REG_RQ_WR_MBS0, w_order);
650 REG_WR(bp, PXP2_REG_RQ_WR_MBS1, w_order);
651 REG_WR(bp, PXP2_REG_RQ_RD_MBS0, r_order);
652 REG_WR(bp, PXP2_REG_RQ_RD_MBS1, r_order);
653
654 if (r_order == MAX_RD_ORD)
655 REG_WR(bp, PXP2_REG_RQ_PDR_LIMIT, 0xe00);
656
657 REG_WR(bp, PXP2_REG_WR_USDMDP_TH, (0x18 << w_order));
658
659 if (CHIP_IS_E1H(bp)) {
660 val = ((w_order == 0) ? 2 : 3);
661 REG_WR(bp, PXP2_REG_WR_HC_MPS, val);
662 REG_WR(bp, PXP2_REG_WR_USDM_MPS, val);
663 REG_WR(bp, PXP2_REG_WR_CSDM_MPS, val);
664 REG_WR(bp, PXP2_REG_WR_TSDM_MPS, val);
665 REG_WR(bp, PXP2_REG_WR_XSDM_MPS, val);
666 REG_WR(bp, PXP2_REG_WR_QM_MPS, val);
667 REG_WR(bp, PXP2_REG_WR_TM_MPS, val);
668 REG_WR(bp, PXP2_REG_WR_SRC_MPS, val);
669 REG_WR(bp, PXP2_REG_WR_DBG_MPS, val);
670 REG_WR(bp, PXP2_REG_WR_DMAE_MPS, 2); /* DMAE is special */
671 REG_WR(bp, PXP2_REG_WR_CDU_MPS, val);
672 }
673}
674
675 324
676/**************************************************************************** 325/****************************************************************************
677* CDU 326* CDU
@@ -695,128 +344,12 @@ static void bnx2x_init_pxp(struct bnx2x *bp)
695 (0x80 | ((_type) & 0xf << 3) | (CDU_CRC8(_cid, _region, _type) & 0x7)) 344 (0x80 | ((_type) & 0xf << 3) | (CDU_CRC8(_cid, _region, _type) & 0x7))
696#define CDU_RSRVD_INVALIDATE_CONTEXT_VALUE(_val) ((_val) & ~0x80) 345#define CDU_RSRVD_INVALIDATE_CONTEXT_VALUE(_val) ((_val) & ~0x80)
697 346
698/*****************************************************************************
699 * Description:
700 * Calculates crc 8 on a word value: polynomial 0-1-2-8
701 * Code was translated from Verilog.
702 ****************************************************************************/
703static u8 calc_crc8(u32 data, u8 crc)
704{
705 u8 D[32];
706 u8 NewCRC[8];
707 u8 C[8];
708 u8 crc_res;
709 u8 i;
710
711 /* split the data into 31 bits */
712 for (i = 0; i < 32; i++) {
713 D[i] = data & 1;
714 data = data >> 1;
715 }
716
717 /* split the crc into 8 bits */
718 for (i = 0; i < 8; i++) {
719 C[i] = crc & 1;
720 crc = crc >> 1;
721 }
722
723 NewCRC[0] = D[31] ^ D[30] ^ D[28] ^ D[23] ^ D[21] ^ D[19] ^ D[18] ^
724 D[16] ^ D[14] ^ D[12] ^ D[8] ^ D[7] ^ D[6] ^ D[0] ^ C[4] ^
725 C[6] ^ C[7];
726 NewCRC[1] = D[30] ^ D[29] ^ D[28] ^ D[24] ^ D[23] ^ D[22] ^ D[21] ^
727 D[20] ^ D[18] ^ D[17] ^ D[16] ^ D[15] ^ D[14] ^ D[13] ^
728 D[12] ^ D[9] ^ D[6] ^ D[1] ^ D[0] ^ C[0] ^ C[4] ^ C[5] ^ C[6];
729 NewCRC[2] = D[29] ^ D[28] ^ D[25] ^ D[24] ^ D[22] ^ D[17] ^ D[15] ^
730 D[13] ^ D[12] ^ D[10] ^ D[8] ^ D[6] ^ D[2] ^ D[1] ^ D[0] ^
731 C[0] ^ C[1] ^ C[4] ^ C[5];
732 NewCRC[3] = D[30] ^ D[29] ^ D[26] ^ D[25] ^ D[23] ^ D[18] ^ D[16] ^
733 D[14] ^ D[13] ^ D[11] ^ D[9] ^ D[7] ^ D[3] ^ D[2] ^ D[1] ^
734 C[1] ^ C[2] ^ C[5] ^ C[6];
735 NewCRC[4] = D[31] ^ D[30] ^ D[27] ^ D[26] ^ D[24] ^ D[19] ^ D[17] ^
736 D[15] ^ D[14] ^ D[12] ^ D[10] ^ D[8] ^ D[4] ^ D[3] ^ D[2] ^
737 C[0] ^ C[2] ^ C[3] ^ C[6] ^ C[7];
738 NewCRC[5] = D[31] ^ D[28] ^ D[27] ^ D[25] ^ D[20] ^ D[18] ^ D[16] ^
739 D[15] ^ D[13] ^ D[11] ^ D[9] ^ D[5] ^ D[4] ^ D[3] ^ C[1] ^
740 C[3] ^ C[4] ^ C[7];
741 NewCRC[6] = D[29] ^ D[28] ^ D[26] ^ D[21] ^ D[19] ^ D[17] ^ D[16] ^
742 D[14] ^ D[12] ^ D[10] ^ D[6] ^ D[5] ^ D[4] ^ C[2] ^ C[4] ^
743 C[5];
744 NewCRC[7] = D[30] ^ D[29] ^ D[27] ^ D[22] ^ D[20] ^ D[18] ^ D[17] ^
745 D[15] ^ D[13] ^ D[11] ^ D[7] ^ D[6] ^ D[5] ^ C[3] ^ C[5] ^
746 C[6];
747
748 crc_res = 0;
749 for (i = 0; i < 8; i++)
750 crc_res |= (NewCRC[i] << i);
751
752 return crc_res;
753}
754 347
755/* registers addresses are not in order 348/* registers addresses are not in order
756 so these arrays help simplify the code */ 349 so these arrays help simplify the code */
757static const int cm_start[E1H_FUNC_MAX][9] = { 350static const int cm_blocks[9] = {
758 {MISC_FUNC0_START, TCM_FUNC0_START, UCM_FUNC0_START, CCM_FUNC0_START, 351 MISC_BLOCK, TCM_BLOCK, UCM_BLOCK, CCM_BLOCK, XCM_BLOCK,
759 XCM_FUNC0_START, TSEM_FUNC0_START, USEM_FUNC0_START, CSEM_FUNC0_START, 352 TSEM_BLOCK, USEM_BLOCK, CSEM_BLOCK, XSEM_BLOCK
760 XSEM_FUNC0_START},
761 {MISC_FUNC1_START, TCM_FUNC1_START, UCM_FUNC1_START, CCM_FUNC1_START,
762 XCM_FUNC1_START, TSEM_FUNC1_START, USEM_FUNC1_START, CSEM_FUNC1_START,
763 XSEM_FUNC1_START},
764 {MISC_FUNC2_START, TCM_FUNC2_START, UCM_FUNC2_START, CCM_FUNC2_START,
765 XCM_FUNC2_START, TSEM_FUNC2_START, USEM_FUNC2_START, CSEM_FUNC2_START,
766 XSEM_FUNC2_START},
767 {MISC_FUNC3_START, TCM_FUNC3_START, UCM_FUNC3_START, CCM_FUNC3_START,
768 XCM_FUNC3_START, TSEM_FUNC3_START, USEM_FUNC3_START, CSEM_FUNC3_START,
769 XSEM_FUNC3_START},
770 {MISC_FUNC4_START, TCM_FUNC4_START, UCM_FUNC4_START, CCM_FUNC4_START,
771 XCM_FUNC4_START, TSEM_FUNC4_START, USEM_FUNC4_START, CSEM_FUNC4_START,
772 XSEM_FUNC4_START},
773 {MISC_FUNC5_START, TCM_FUNC5_START, UCM_FUNC5_START, CCM_FUNC5_START,
774 XCM_FUNC5_START, TSEM_FUNC5_START, USEM_FUNC5_START, CSEM_FUNC5_START,
775 XSEM_FUNC5_START},
776 {MISC_FUNC6_START, TCM_FUNC6_START, UCM_FUNC6_START, CCM_FUNC6_START,
777 XCM_FUNC6_START, TSEM_FUNC6_START, USEM_FUNC6_START, CSEM_FUNC6_START,
778 XSEM_FUNC6_START},
779 {MISC_FUNC7_START, TCM_FUNC7_START, UCM_FUNC7_START, CCM_FUNC7_START,
780 XCM_FUNC7_START, TSEM_FUNC7_START, USEM_FUNC7_START, CSEM_FUNC7_START,
781 XSEM_FUNC7_START}
782};
783
784static const int cm_end[E1H_FUNC_MAX][9] = {
785 {MISC_FUNC0_END, TCM_FUNC0_END, UCM_FUNC0_END, CCM_FUNC0_END,
786 XCM_FUNC0_END, TSEM_FUNC0_END, USEM_FUNC0_END, CSEM_FUNC0_END,
787 XSEM_FUNC0_END},
788 {MISC_FUNC1_END, TCM_FUNC1_END, UCM_FUNC1_END, CCM_FUNC1_END,
789 XCM_FUNC1_END, TSEM_FUNC1_END, USEM_FUNC1_END, CSEM_FUNC1_END,
790 XSEM_FUNC1_END},
791 {MISC_FUNC2_END, TCM_FUNC2_END, UCM_FUNC2_END, CCM_FUNC2_END,
792 XCM_FUNC2_END, TSEM_FUNC2_END, USEM_FUNC2_END, CSEM_FUNC2_END,
793 XSEM_FUNC2_END},
794 {MISC_FUNC3_END, TCM_FUNC3_END, UCM_FUNC3_END, CCM_FUNC3_END,
795 XCM_FUNC3_END, TSEM_FUNC3_END, USEM_FUNC3_END, CSEM_FUNC3_END,
796 XSEM_FUNC3_END},
797 {MISC_FUNC4_END, TCM_FUNC4_END, UCM_FUNC4_END, CCM_FUNC4_END,
798 XCM_FUNC4_END, TSEM_FUNC4_END, USEM_FUNC4_END, CSEM_FUNC4_END,
799 XSEM_FUNC4_END},
800 {MISC_FUNC5_END, TCM_FUNC5_END, UCM_FUNC5_END, CCM_FUNC5_END,
801 XCM_FUNC5_END, TSEM_FUNC5_END, USEM_FUNC5_END, CSEM_FUNC5_END,
802 XSEM_FUNC5_END},
803 {MISC_FUNC6_END, TCM_FUNC6_END, UCM_FUNC6_END, CCM_FUNC6_END,
804 XCM_FUNC6_END, TSEM_FUNC6_END, USEM_FUNC6_END, CSEM_FUNC6_END,
805 XSEM_FUNC6_END},
806 {MISC_FUNC7_END, TCM_FUNC7_END, UCM_FUNC7_END, CCM_FUNC7_END,
807 XCM_FUNC7_END, TSEM_FUNC7_END, USEM_FUNC7_END, CSEM_FUNC7_END,
808 XSEM_FUNC7_END},
809};
810
811static const int hc_limits[E1H_FUNC_MAX][2] = {
812 {HC_FUNC0_START, HC_FUNC0_END},
813 {HC_FUNC1_START, HC_FUNC1_END},
814 {HC_FUNC2_START, HC_FUNC2_END},
815 {HC_FUNC3_START, HC_FUNC3_END},
816 {HC_FUNC4_START, HC_FUNC4_END},
817 {HC_FUNC5_START, HC_FUNC5_END},
818 {HC_FUNC6_START, HC_FUNC6_END},
819 {HC_FUNC7_START, HC_FUNC7_END}
820}; 353};
821 354
822#endif /* BNX2X_INIT_H */ 355#endif /* BNX2X_INIT_H */
diff --git a/drivers/net/bnx2x_init_ops.h b/drivers/net/bnx2x_init_ops.h
new file mode 100644
index 000000000000..32552b9366cb
--- /dev/null
+++ b/drivers/net/bnx2x_init_ops.h
@@ -0,0 +1,442 @@
1/* bnx2x_init_ops.h: Broadcom Everest network driver.
2 * Static functions needed during the initialization.
3 * This file is "included" in bnx2x_main.c.
4 *
5 * Copyright (c) 2007-2009 Broadcom Corporation
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation.
10 *
11 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
12 * Written by: Vladislav Zolotarov <vladz@broadcom.com>
13 */
14#ifndef BNX2X_INIT_OPS_H
15#define BNX2X_INIT_OPS_H
16
17static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val);
18static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len);
19
20static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data,
21 u32 len)
22{
23 int i;
24
25 for (i = 0; i < len; i++) {
26 REG_WR(bp, addr + i*4, data[i]);
27 if (!(i % 10000)) {
28 touch_softlockup_watchdog();
29 cpu_relax();
30 }
31 }
32}
33
34static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, const u32 *data,
35 u16 len)
36{
37 int i;
38
39 for (i = 0; i < len; i++) {
40 REG_WR_IND(bp, addr + i*4, data[i]);
41 if (!(i % 10000)) {
42 touch_softlockup_watchdog();
43 cpu_relax();
44 }
45 }
46}
47
48static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
49{
50 int offset = 0;
51
52 if (bp->dmae_ready) {
53 while (len > DMAE_LEN32_WR_MAX) {
54 bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
55 addr + offset, DMAE_LEN32_WR_MAX);
56 offset += DMAE_LEN32_WR_MAX * 4;
57 len -= DMAE_LEN32_WR_MAX;
58 }
59 bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
60 addr + offset, len);
61 } else
62 bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
63}
64
65static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)
66{
67 u32 buf_len = (((len * 4) > FW_BUF_SIZE) ? FW_BUF_SIZE : (len * 4));
68 u32 buf_len32 = buf_len / 4;
69 int i;
70
71 memset(bp->gunzip_buf, fill, buf_len);
72
73 for (i = 0; i < len; i += buf_len32) {
74 u32 cur_len = min(buf_len32, len - i);
75
76 bnx2x_write_big_buf(bp, addr + i * 4, cur_len);
77 }
78}
79
80static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, const u32 *data,
81 u32 len64)
82{
83 u32 buf_len32 = FW_BUF_SIZE / 4;
84 u32 len = len64 * 2;
85 u64 data64 = 0;
86 int i;
87
88 /* 64 bit value is in a blob: first low DWORD, then high DWORD */
89 data64 = HILO_U64((*(data + 1)), (*data));
90 len64 = min((u32)(FW_BUF_SIZE/8), len64);
91 for (i = 0; i < len64; i++) {
92 u64 *pdata = ((u64 *)(bp->gunzip_buf)) + i;
93
94 *pdata = data64;
95 }
96
97 for (i = 0; i < len; i += buf_len32) {
98 u32 cur_len = min(buf_len32, len - i);
99
100 bnx2x_write_big_buf(bp, addr + i * 4, cur_len);
101 }
102}
103
104/*********************************************************
105 There are different blobs for each PRAM section.
106 In addition, each blob write operation is divided into a few operations
107 in order to decrease the amount of phys. contiguous buffer needed.
108 Thus, when we select a blob the address may be with some offset
109 from the beginning of PRAM section.
110 The same holds for the INT_TABLE sections.
111**********************************************************/
112#define IF_IS_INT_TABLE_ADDR(base, addr) \
113 if (((base) <= (addr)) && ((base) + 0x400 >= (addr)))
114
115#define IF_IS_PRAM_ADDR(base, addr) \
116 if (((base) <= (addr)) && ((base) + 0x40000 >= (addr)))
117
118static const u8 *bnx2x_sel_blob(struct bnx2x *bp, u32 addr, const u8 *data)
119{
120 IF_IS_INT_TABLE_ADDR(TSEM_REG_INT_TABLE, addr)
121 data = bp->tsem_int_table_data;
122 else IF_IS_INT_TABLE_ADDR(CSEM_REG_INT_TABLE, addr)
123 data = bp->csem_int_table_data;
124 else IF_IS_INT_TABLE_ADDR(USEM_REG_INT_TABLE, addr)
125 data = bp->usem_int_table_data;
126 else IF_IS_INT_TABLE_ADDR(XSEM_REG_INT_TABLE, addr)
127 data = bp->xsem_int_table_data;
128 else IF_IS_PRAM_ADDR(TSEM_REG_PRAM, addr)
129 data = bp->tsem_pram_data;
130 else IF_IS_PRAM_ADDR(CSEM_REG_PRAM, addr)
131 data = bp->csem_pram_data;
132 else IF_IS_PRAM_ADDR(USEM_REG_PRAM, addr)
133 data = bp->usem_pram_data;
134 else IF_IS_PRAM_ADDR(XSEM_REG_PRAM, addr)
135 data = bp->xsem_pram_data;
136
137 return data;
138}
139
140static void bnx2x_write_big_buf_wb(struct bnx2x *bp, u32 addr, u32 len)
141{
142 int offset = 0;
143
144 if (bp->dmae_ready) {
145 while (len > DMAE_LEN32_WR_MAX) {
146 bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
147 addr + offset, DMAE_LEN32_WR_MAX);
148 offset += DMAE_LEN32_WR_MAX * 4;
149 len -= DMAE_LEN32_WR_MAX;
150 }
151 bnx2x_write_dmae(bp, bp->gunzip_mapping + offset,
152 addr + offset, len);
153 } else
154 bnx2x_init_ind_wr(bp, addr, bp->gunzip_buf, len);
155}
156
157static void bnx2x_init_wr_wb(struct bnx2x *bp, u32 addr, const u32 *data,
158 u32 len)
159{
160 /* This is needed for NO_ZIP mode, currently supported
161 in little endian mode only */
162 data = (const u32*)bnx2x_sel_blob(bp, addr, (const u8*)data);
163
164 if ((len * 4) > FW_BUF_SIZE) {
165 BNX2X_ERR("LARGE DMAE OPERATION ! "
166 "addr 0x%x len 0x%x\n", addr, len*4);
167 return;
168 }
169 memcpy(bp->gunzip_buf, data, len * 4);
170
171 bnx2x_write_big_buf_wb(bp, addr, len);
172}
173
174static void bnx2x_init_wr_zp(struct bnx2x *bp, u32 addr,
175 u32 len, u32 blob_off)
176{
177 int rc, i;
178 const u8 *data = NULL;
179
180 data = bnx2x_sel_blob(bp, addr, data) + 4*blob_off;
181
182 if (data == NULL) {
183 panic("Blob not found for addr 0x%x\n", addr);
184 return;
185 }
186
187 rc = bnx2x_gunzip(bp, data, len);
188 if (rc) {
189 BNX2X_ERR("gunzip failed ! addr 0x%x rc %d\n", addr, rc);
190 BNX2X_ERR("blob_offset=0x%x\n", blob_off);
191 return;
192 }
193
194 /* gunzip_outlen is in dwords */
195 len = bp->gunzip_outlen;
196 for (i = 0; i < len; i++)
197 ((u32 *)bp->gunzip_buf)[i] =
198 cpu_to_le32(((u32 *)bp->gunzip_buf)[i]);
199
200 bnx2x_write_big_buf_wb(bp, addr, len);
201}
202
203static void bnx2x_init_block(struct bnx2x *bp, u32 block, u32 stage)
204{
205 int hw_wr, i;
206 u16 op_start =
207 bp->init_ops_offsets[BLOCK_OPS_IDX(block,stage,STAGE_START)];
208 u16 op_end =
209 bp->init_ops_offsets[BLOCK_OPS_IDX(block,stage,STAGE_END)];
210 union init_op *op;
211 u32 op_type, addr, len;
212 const u32 *data, *data_base;
213
214 /* If empty block */
215 if (op_start == op_end)
216 return;
217
218 if (CHIP_REV_IS_FPGA(bp))
219 hw_wr = OP_WR_FPGA;
220 else if (CHIP_REV_IS_EMUL(bp))
221 hw_wr = OP_WR_EMUL;
222 else
223 hw_wr = OP_WR_ASIC;
224
225 data_base = bp->init_data;
226
227 for (i = op_start; i < op_end; i++) {
228
229 op = (union init_op *)&(bp->init_ops[i]);
230
231 op_type = op->str_wr.op;
232 addr = op->str_wr.offset;
233 len = op->str_wr.data_len;
234 data = data_base + op->str_wr.data_off;
235
236 /* HW/EMUL specific */
237 if (unlikely((op_type > OP_WB) && (op_type == hw_wr)))
238 op_type = OP_WR;
239
240 switch (op_type) {
241 case OP_RD:
242 REG_RD(bp, addr);
243 break;
244 case OP_WR:
245 REG_WR(bp, addr, op->write.val);
246 break;
247 case OP_SW:
248 bnx2x_init_str_wr(bp, addr, data, len);
249 break;
250 case OP_WB:
251 bnx2x_init_wr_wb(bp, addr, data, len);
252 break;
253 case OP_SI:
254 bnx2x_init_ind_wr(bp, addr, data, len);
255 break;
256 case OP_ZR:
257 bnx2x_init_fill(bp, addr, 0, op->zero.len);
258 break;
259 case OP_ZP:
260 bnx2x_init_wr_zp(bp, addr, len,
261 op->str_wr.data_off);
262 break;
263 case OP_WR_64:
264 bnx2x_init_wr_64(bp, addr, data, len);
265 break;
266 default:
267 /* happens whenever an op is of a diff HW */
268#if 0
269 DP(NETIF_MSG_HW, "skipping init operation "
270 "index %d[%d:%d]: type %d addr 0x%x "
271 "len %d(0x%x)\n",
272 i, op_start, op_end, op_type, addr, len, len);
273#endif
274 break;
275 }
276 }
277}
278
279/* PXP */
280static void bnx2x_init_pxp(struct bnx2x *bp)
281{
282 u16 devctl;
283 int r_order, w_order;
284 u32 val, i;
285
286 pci_read_config_word(bp->pdev,
287 bp->pcie_cap + PCI_EXP_DEVCTL, &devctl);
288 DP(NETIF_MSG_HW, "read 0x%x from devctl\n", devctl);
289 w_order = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
290 if (bp->mrrs == -1)
291 r_order = ((devctl & PCI_EXP_DEVCTL_READRQ) >> 12);
292 else {
293 DP(NETIF_MSG_HW, "force read order to %d\n", bp->mrrs);
294 r_order = bp->mrrs;
295 }
296
297 if (r_order > MAX_RD_ORD) {
298 DP(NETIF_MSG_HW, "read order of %d order adjusted to %d\n",
299 r_order, MAX_RD_ORD);
300 r_order = MAX_RD_ORD;
301 }
302 if (w_order > MAX_WR_ORD) {
303 DP(NETIF_MSG_HW, "write order of %d order adjusted to %d\n",
304 w_order, MAX_WR_ORD);
305 w_order = MAX_WR_ORD;
306 }
307 if (CHIP_REV_IS_FPGA(bp)) {
308 DP(NETIF_MSG_HW, "write order adjusted to 1 for FPGA\n");
309 w_order = 0;
310 }
311 DP(NETIF_MSG_HW, "read order %d write order %d\n", r_order, w_order);
312
313 for (i = 0; i < NUM_RD_Q-1; i++) {
314 REG_WR(bp, read_arb_addr[i].l, read_arb_data[i][r_order].l);
315 REG_WR(bp, read_arb_addr[i].add,
316 read_arb_data[i][r_order].add);
317 REG_WR(bp, read_arb_addr[i].ubound,
318 read_arb_data[i][r_order].ubound);
319 }
320
321 for (i = 0; i < NUM_WR_Q-1; i++) {
322 if ((write_arb_addr[i].l == PXP2_REG_RQ_BW_WR_L29) ||
323 (write_arb_addr[i].l == PXP2_REG_RQ_BW_WR_L30)) {
324
325 REG_WR(bp, write_arb_addr[i].l,
326 write_arb_data[i][w_order].l);
327
328 REG_WR(bp, write_arb_addr[i].add,
329 write_arb_data[i][w_order].add);
330
331 REG_WR(bp, write_arb_addr[i].ubound,
332 write_arb_data[i][w_order].ubound);
333 } else {
334
335 val = REG_RD(bp, write_arb_addr[i].l);
336 REG_WR(bp, write_arb_addr[i].l,
337 val | (write_arb_data[i][w_order].l << 10));
338
339 val = REG_RD(bp, write_arb_addr[i].add);
340 REG_WR(bp, write_arb_addr[i].add,
341 val | (write_arb_data[i][w_order].add << 10));
342
343 val = REG_RD(bp, write_arb_addr[i].ubound);
344 REG_WR(bp, write_arb_addr[i].ubound,
345 val | (write_arb_data[i][w_order].ubound << 7));
346 }
347 }
348
349 val = write_arb_data[NUM_WR_Q-1][w_order].add;
350 val += write_arb_data[NUM_WR_Q-1][w_order].ubound << 10;
351 val += write_arb_data[NUM_WR_Q-1][w_order].l << 17;
352 REG_WR(bp, PXP2_REG_PSWRQ_BW_RD, val);
353
354 val = read_arb_data[NUM_RD_Q-1][r_order].add;
355 val += read_arb_data[NUM_RD_Q-1][r_order].ubound << 10;
356 val += read_arb_data[NUM_RD_Q-1][r_order].l << 17;
357 REG_WR(bp, PXP2_REG_PSWRQ_BW_WR, val);
358
359 REG_WR(bp, PXP2_REG_RQ_WR_MBS0, w_order);
360 REG_WR(bp, PXP2_REG_RQ_WR_MBS1, w_order);
361 REG_WR(bp, PXP2_REG_RQ_RD_MBS0, r_order);
362 REG_WR(bp, PXP2_REG_RQ_RD_MBS1, r_order);
363
364 if (r_order == MAX_RD_ORD)
365 REG_WR(bp, PXP2_REG_RQ_PDR_LIMIT, 0xe00);
366
367 REG_WR(bp, PXP2_REG_WR_USDMDP_TH, (0x18 << w_order));
368
369 if (CHIP_IS_E1H(bp)) {
370 val = ((w_order == 0) ? 2 : 3);
371 REG_WR(bp, PXP2_REG_WR_HC_MPS, val);
372 REG_WR(bp, PXP2_REG_WR_USDM_MPS, val);
373 REG_WR(bp, PXP2_REG_WR_CSDM_MPS, val);
374 REG_WR(bp, PXP2_REG_WR_TSDM_MPS, val);
375 REG_WR(bp, PXP2_REG_WR_XSDM_MPS, val);
376 REG_WR(bp, PXP2_REG_WR_QM_MPS, val);
377 REG_WR(bp, PXP2_REG_WR_TM_MPS, val);
378 REG_WR(bp, PXP2_REG_WR_SRC_MPS, val);
379 REG_WR(bp, PXP2_REG_WR_DBG_MPS, val);
380 REG_WR(bp, PXP2_REG_WR_DMAE_MPS, 2); /* DMAE is special */
381 REG_WR(bp, PXP2_REG_WR_CDU_MPS, val);
382 }
383}
384
385/*****************************************************************************
386 * Description:
387 * Calculates crc 8 on a word value: polynomial 0-1-2-8
388 * Code was translated from Verilog.
389 ****************************************************************************/
390static u8 calc_crc8(u32 data, u8 crc)
391{
392 u8 D[32];
393 u8 NewCRC[8];
394 u8 C[8];
395 u8 crc_res;
396 u8 i;
397
398 /* split the data into 31 bits */
399 for (i = 0; i < 32; i++) {
400 D[i] = data & 1;
401 data = data >> 1;
402 }
403
404 /* split the crc into 8 bits */
405 for (i = 0; i < 8; i++) {
406 C[i] = crc & 1;
407 crc = crc >> 1;
408 }
409
410 NewCRC[0] = D[31] ^ D[30] ^ D[28] ^ D[23] ^ D[21] ^ D[19] ^ D[18] ^
411 D[16] ^ D[14] ^ D[12] ^ D[8] ^ D[7] ^ D[6] ^ D[0] ^ C[4] ^
412 C[6] ^ C[7];
413 NewCRC[1] = D[30] ^ D[29] ^ D[28] ^ D[24] ^ D[23] ^ D[22] ^ D[21] ^
414 D[20] ^ D[18] ^ D[17] ^ D[16] ^ D[15] ^ D[14] ^ D[13] ^
415 D[12] ^ D[9] ^ D[6] ^ D[1] ^ D[0] ^ C[0] ^ C[4] ^ C[5] ^ C[6];
416 NewCRC[2] = D[29] ^ D[28] ^ D[25] ^ D[24] ^ D[22] ^ D[17] ^ D[15] ^
417 D[13] ^ D[12] ^ D[10] ^ D[8] ^ D[6] ^ D[2] ^ D[1] ^ D[0] ^
418 C[0] ^ C[1] ^ C[4] ^ C[5];
419 NewCRC[3] = D[30] ^ D[29] ^ D[26] ^ D[25] ^ D[23] ^ D[18] ^ D[16] ^
420 D[14] ^ D[13] ^ D[11] ^ D[9] ^ D[7] ^ D[3] ^ D[2] ^ D[1] ^
421 C[1] ^ C[2] ^ C[5] ^ C[6];
422 NewCRC[4] = D[31] ^ D[30] ^ D[27] ^ D[26] ^ D[24] ^ D[19] ^ D[17] ^
423 D[15] ^ D[14] ^ D[12] ^ D[10] ^ D[8] ^ D[4] ^ D[3] ^ D[2] ^
424 C[0] ^ C[2] ^ C[3] ^ C[6] ^ C[7];
425 NewCRC[5] = D[31] ^ D[28] ^ D[27] ^ D[25] ^ D[20] ^ D[18] ^ D[16] ^
426 D[15] ^ D[13] ^ D[11] ^ D[9] ^ D[5] ^ D[4] ^ D[3] ^ C[1] ^
427 C[3] ^ C[4] ^ C[7];
428 NewCRC[6] = D[29] ^ D[28] ^ D[26] ^ D[21] ^ D[19] ^ D[17] ^ D[16] ^
429 D[14] ^ D[12] ^ D[10] ^ D[6] ^ D[5] ^ D[4] ^ C[2] ^ C[4] ^
430 C[5];
431 NewCRC[7] = D[30] ^ D[29] ^ D[27] ^ D[22] ^ D[20] ^ D[18] ^ D[17] ^
432 D[15] ^ D[13] ^ D[11] ^ D[7] ^ D[6] ^ D[5] ^ C[3] ^ C[5] ^
433 C[6];
434
435 crc_res = 0;
436 for (i = 0; i < 8; i++)
437 crc_res |= (NewCRC[i] << i);
438
439 return crc_res;
440}
441
442#endif /* BNX2X_INIT_OPS_H */
diff --git a/drivers/net/bnx2x_init_values.h b/drivers/net/bnx2x_init_values.h
deleted file mode 100644
index 1f22c9ab66d4..000000000000
--- a/drivers/net/bnx2x_init_values.h
+++ /dev/null
@@ -1,16322 +0,0 @@
1#ifndef __BNX2X_INIT_VALUES_H__
2#define __BNX2X_INIT_VALUES_H__
3
4/* bnx2x_init_values.h: Broadcom NX2 10G network driver.
5 *
6 * Copyright (c) 2007-2009 Broadcom Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, except as noted below.
11 *
12 * This file contains firmware data derived from proprietary unpublished
13 * source code, Copyright (c) 2007-2009 Broadcom Corporation.
14 *
15 * Permission is hereby granted for the distribution of this firmware data
16 * in hexadecimal or equivalent format, provided this copyright notice is
17 * accompanying it.
18 *
19 *
20 * This array contains the list of operations needed to initialize the chip.
21 *
22 * For each block in the chip there are three init stages:
23 * common - HW used by both ports,
24 * port1 and port2 - initialization for a specific Ethernet port.
25 * When a port is opened or closed, the management CPU tells the driver
26 * whether to init/disable common HW in addition to the port HW.
27 * This way the first port going up will first initializes the common HW,
28 * and the last port going down also resets the common HW
29 *
30 * For each init stage/block there is a list of actions needed in a format:
31 * {operation, register, data}
32 * where:
33 * OP_WR - write a value to the chip.
34 * OP_RD - read a register (usually a clear on read register).
35 * OP_SW - string write, write a section of consecutive addresses to the chip.
36 * OP_SI - copy a string using indirect writes.
37 * OP_ZR - clear a range of memory.
38 * OP_ZP - unzip and copy using DMAE.
39 * OP_WB - string copy using DMAE.
40 *
41 * The #defines mark the stages.
42 *
43 */
44
45static const struct raw_op init_ops[] = {
46#define PRS_COMMON_START 0
47 {OP_WR, PRS_REG_INC_VALUE, 0xf},
48 {OP_WR, PRS_REG_EVENT_ID_1, 0x45},
49 {OP_WR, PRS_REG_EVENT_ID_2, 0x84},
50 {OP_WR, PRS_REG_EVENT_ID_3, 0x6},
51 {OP_WR, PRS_REG_NO_MATCH_EVENT_ID, 0x4},
52 {OP_WR, PRS_REG_CM_HDR_TYPE_0, 0x0},
53 {OP_WR, PRS_REG_CM_HDR_TYPE_1, 0x12170000},
54 {OP_WR, PRS_REG_CM_HDR_TYPE_2, 0x22170000},
55 {OP_WR, PRS_REG_CM_HDR_TYPE_3, 0x32170000},
56 {OP_ZR, PRS_REG_CM_HDR_TYPE_4, 0x5},
57 {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_1, 0x12150000},
58 {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_2, 0x22150000},
59 {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_3, 0x32150000},
60 {OP_ZR, PRS_REG_CM_HDR_LOOPBACK_TYPE_4, 0x4},
61 {OP_WR, PRS_REG_CM_NO_MATCH_HDR, 0x2100000},
62 {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_0, 0x100000},
63 {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_1, 0x10100000},
64 {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_2, 0x20100000},
65 {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_3, 0x30100000},
66 {OP_ZR_E1, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_4, 0x4},
67 {OP_WR_E1H, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_4, 0x40100000},
68 {OP_ZR_E1H, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_5, 0x3},
69 {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_0, 0x100000},
70 {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_1, 0x12140000},
71 {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_2, 0x22140000},
72 {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_3, 0x32140000},
73 {OP_ZR_E1, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_4, 0x4},
74 {OP_WR_E1H, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_4, 0x42140000},
75 {OP_ZR_E1H, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_5, 0x3},
76 {OP_RD, PRS_REG_NUM_OF_PACKETS, 0x0},
77 {OP_RD, PRS_REG_NUM_OF_CFC_FLUSH_MESSAGES, 0x0},
78 {OP_RD, PRS_REG_NUM_OF_TRANSPARENT_FLUSH_MESSAGES, 0x0},
79 {OP_RD, PRS_REG_NUM_OF_DEAD_CYCLES, 0x0},
80 {OP_WR_E1H, PRS_REG_FCOE_TYPE, 0x8906},
81 {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_0, 0xff},
82 {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_1, 0xff},
83 {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_2, 0xff},
84 {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_3, 0xff},
85 {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_4, 0xff},
86 {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_5, 0xff},
87 {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_6, 0xff},
88 {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_7, 0xff},
89 {OP_WR, PRS_REG_PURE_REGIONS, 0x3e},
90 {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_0, 0x0},
91 {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_1, 0x3f},
92 {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_2, 0x3f},
93 {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_3, 0x3f},
94 {OP_WR_E1, PRS_REG_PACKET_REGIONS_TYPE_4, 0x0},
95 {OP_WR_E1H, PRS_REG_PACKET_REGIONS_TYPE_4, 0x3f},
96 {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_5, 0x3f},
97 {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_6, 0x3f},
98 {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_7, 0x3f},
99#define PRS_COMMON_END 52
100#define SRCH_COMMON_START 52
101 {OP_WR_E1H, SRC_REG_E1HMF_ENABLE, 0x1},
102#define SRCH_COMMON_END 53
103#define TSDM_COMMON_START 53
104 {OP_WR_E1, TSDM_REG_CFC_RSP_START_ADDR, 0x411},
105 {OP_WR_E1H, TSDM_REG_CFC_RSP_START_ADDR, 0x211},
106 {OP_WR_E1, TSDM_REG_CMP_COUNTER_START_ADDR, 0x400},
107 {OP_WR_E1H, TSDM_REG_CMP_COUNTER_START_ADDR, 0x200},
108 {OP_WR_E1, TSDM_REG_Q_COUNTER_START_ADDR, 0x404},
109 {OP_WR_E1H, TSDM_REG_Q_COUNTER_START_ADDR, 0x204},
110 {OP_WR_E1, TSDM_REG_PCK_END_MSG_START_ADDR, 0x419},
111 {OP_WR_E1H, TSDM_REG_PCK_END_MSG_START_ADDR, 0x219},
112 {OP_WR, TSDM_REG_CMP_COUNTER_MAX0, 0xffff},
113 {OP_WR, TSDM_REG_CMP_COUNTER_MAX1, 0xffff},
114 {OP_WR, TSDM_REG_CMP_COUNTER_MAX2, 0xffff},
115 {OP_WR, TSDM_REG_CMP_COUNTER_MAX3, 0xffff},
116 {OP_ZR_E1, TSDM_REG_AGG_INT_EVENT_0, 0x2},
117 {OP_WR_E1H, TSDM_REG_AGG_INT_EVENT_0, 0x20},
118 {OP_WR_E1H, TSDM_REG_AGG_INT_EVENT_1, 0x0},
119 {OP_WR, TSDM_REG_AGG_INT_EVENT_2, 0x34},
120 {OP_WR, TSDM_REG_AGG_INT_EVENT_3, 0x35},
121 {OP_ZR_E1, TSDM_REG_AGG_INT_EVENT_4, 0x7c},
122 {OP_ZR_E1H, TSDM_REG_AGG_INT_EVENT_4, 0x1c},
123 {OP_WR_E1H, TSDM_REG_AGG_INT_T_0, 0x1},
124 {OP_ZR_E1H, TSDM_REG_AGG_INT_T_1, 0x5f},
125 {OP_WR, TSDM_REG_ENABLE_IN1, 0x7ffffff},
126 {OP_WR, TSDM_REG_ENABLE_IN2, 0x3f},
127 {OP_WR, TSDM_REG_ENABLE_OUT1, 0x7ffffff},
128 {OP_WR, TSDM_REG_ENABLE_OUT2, 0xf},
129 {OP_RD, TSDM_REG_NUM_OF_Q0_CMD, 0x0},
130 {OP_RD, TSDM_REG_NUM_OF_Q1_CMD, 0x0},
131 {OP_RD, TSDM_REG_NUM_OF_Q3_CMD, 0x0},
132 {OP_RD, TSDM_REG_NUM_OF_Q4_CMD, 0x0},
133 {OP_RD, TSDM_REG_NUM_OF_Q5_CMD, 0x0},
134 {OP_RD, TSDM_REG_NUM_OF_Q6_CMD, 0x0},
135 {OP_RD, TSDM_REG_NUM_OF_Q7_CMD, 0x0},
136 {OP_RD, TSDM_REG_NUM_OF_Q8_CMD, 0x0},
137 {OP_RD, TSDM_REG_NUM_OF_Q9_CMD, 0x0},
138 {OP_RD, TSDM_REG_NUM_OF_Q10_CMD, 0x0},
139 {OP_RD, TSDM_REG_NUM_OF_Q11_CMD, 0x0},
140 {OP_RD, TSDM_REG_NUM_OF_PKT_END_MSG, 0x0},
141 {OP_RD, TSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0},
142 {OP_RD, TSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0},
143 {OP_WR_E1, TSDM_REG_INIT_CREDIT_PXP_CTRL, 0x1},
144 {OP_WR_ASIC, TSDM_REG_TIMER_TICK, 0x3e8},
145 {OP_WR_EMUL, TSDM_REG_TIMER_TICK, 0x1},
146 {OP_WR_FPGA, TSDM_REG_TIMER_TICK, 0xa},
147#define TSDM_COMMON_END 96
148#define TCM_COMMON_START 96
149 {OP_WR, TCM_REG_XX_MAX_LL_SZ, 0x20},
150 {OP_WR, TCM_REG_XX_OVFL_EVNT_ID, 0x32},
151 {OP_WR, TCM_REG_TQM_TCM_HDR_P, 0x2150020},
152 {OP_WR, TCM_REG_TQM_TCM_HDR_S, 0x2150020},
153 {OP_WR, TCM_REG_TM_TCM_HDR, 0x30},
154 {OP_WR, TCM_REG_ERR_TCM_HDR, 0x8100000},
155 {OP_WR, TCM_REG_ERR_EVNT_ID, 0x33},
156 {OP_WR, TCM_REG_EXPR_EVNT_ID, 0x30},
157 {OP_WR, TCM_REG_STOP_EVNT_ID, 0x31},
158 {OP_WR, TCM_REG_STORM_WEIGHT, 0x2},
159 {OP_WR, TCM_REG_PRS_WEIGHT, 0x5},
160 {OP_WR, TCM_REG_PBF_WEIGHT, 0x6},
161 {OP_WR, TCM_REG_USEM_WEIGHT, 0x2},
162 {OP_WR, TCM_REG_CSEM_WEIGHT, 0x2},
163 {OP_WR, TCM_REG_CP_WEIGHT, 0x0},
164 {OP_WR, TCM_REG_TSDM_WEIGHT, 0x5},
165 {OP_WR, TCM_REG_TQM_P_WEIGHT, 0x2},
166 {OP_WR, TCM_REG_TQM_S_WEIGHT, 0x2},
167 {OP_WR, TCM_REG_TM_WEIGHT, 0x2},
168 {OP_WR, TCM_REG_TCM_TQM_USE_Q, 0x1},
169 {OP_WR, TCM_REG_GR_ARB_TYPE, 0x1},
170 {OP_WR, TCM_REG_GR_LD0_PR, 0x1},
171 {OP_WR, TCM_REG_GR_LD1_PR, 0x2},
172 {OP_WR, TCM_REG_CFC_INIT_CRD, 0x1},
173 {OP_WR, TCM_REG_FIC0_INIT_CRD, 0x40},
174 {OP_WR, TCM_REG_FIC1_INIT_CRD, 0x40},
175 {OP_WR, TCM_REG_TQM_INIT_CRD, 0x20},
176 {OP_WR, TCM_REG_XX_INIT_CRD, 0x13},
177 {OP_WR, TCM_REG_XX_MSG_NUM, 0x20},
178 {OP_ZR, TCM_REG_XX_TABLE, 0xa},
179 {OP_SW, TCM_REG_XX_DESCR_TABLE, 0x200000},
180 {OP_WR, TCM_REG_N_SM_CTX_LD_0, 0x7},
181 {OP_WR, TCM_REG_N_SM_CTX_LD_1, 0x7},
182 {OP_WR, TCM_REG_N_SM_CTX_LD_2, 0x8},
183 {OP_WR, TCM_REG_N_SM_CTX_LD_3, 0x8},
184 {OP_ZR_E1, TCM_REG_N_SM_CTX_LD_4, 0x4},
185 {OP_WR_E1H, TCM_REG_N_SM_CTX_LD_4, 0x1},
186 {OP_ZR_E1H, TCM_REG_N_SM_CTX_LD_5, 0x3},
187 {OP_WR, TCM_REG_TCM_REG0_SZ, 0x6},
188 {OP_WR_E1, TCM_REG_PHYS_QNUM0_0, 0xd},
189 {OP_WR_E1, TCM_REG_PHYS_QNUM0_1, 0x2d},
190 {OP_WR_E1, TCM_REG_PHYS_QNUM1_0, 0x7},
191 {OP_WR_E1, TCM_REG_PHYS_QNUM1_1, 0x27},
192 {OP_WR_E1, TCM_REG_PHYS_QNUM2_0, 0x7},
193 {OP_WR_E1, TCM_REG_PHYS_QNUM2_1, 0x27},
194 {OP_WR_E1, TCM_REG_PHYS_QNUM3_0, 0x7},
195 {OP_WR_E1, TCM_REG_PHYS_QNUM3_1, 0x27},
196 {OP_WR, TCM_REG_TCM_STORM0_IFEN, 0x1},
197 {OP_WR, TCM_REG_TCM_STORM1_IFEN, 0x1},
198 {OP_WR, TCM_REG_TCM_TQM_IFEN, 0x1},
199 {OP_WR, TCM_REG_STORM_TCM_IFEN, 0x1},
200 {OP_WR, TCM_REG_TQM_TCM_IFEN, 0x1},
201 {OP_WR, TCM_REG_TSDM_IFEN, 0x1},
202 {OP_WR, TCM_REG_TM_TCM_IFEN, 0x1},
203 {OP_WR, TCM_REG_PRS_IFEN, 0x1},
204 {OP_WR, TCM_REG_PBF_IFEN, 0x1},
205 {OP_WR, TCM_REG_USEM_IFEN, 0x1},
206 {OP_WR, TCM_REG_CSEM_IFEN, 0x1},
207 {OP_WR, TCM_REG_CDU_AG_WR_IFEN, 0x1},
208 {OP_WR, TCM_REG_CDU_AG_RD_IFEN, 0x1},
209 {OP_WR, TCM_REG_CDU_SM_WR_IFEN, 0x1},
210 {OP_WR, TCM_REG_CDU_SM_RD_IFEN, 0x1},
211 {OP_WR, TCM_REG_TCM_CFC_IFEN, 0x1},
212#define TCM_COMMON_END 159
213#define TCM_FUNC0_START 159
214 {OP_WR_E1H, TCM_REG_PHYS_QNUM0_0, 0xd},
215 {OP_WR_E1H, TCM_REG_PHYS_QNUM1_0, 0x7},
216 {OP_WR_E1H, TCM_REG_PHYS_QNUM2_0, 0x7},
217 {OP_WR_E1H, TCM_REG_PHYS_QNUM3_0, 0x7},
218#define TCM_FUNC0_END 163
219#define TCM_FUNC1_START 163
220 {OP_WR_E1H, TCM_REG_PHYS_QNUM0_1, 0x2d},
221 {OP_WR_E1H, TCM_REG_PHYS_QNUM1_1, 0x27},
222 {OP_WR_E1H, TCM_REG_PHYS_QNUM2_1, 0x27},
223 {OP_WR_E1H, TCM_REG_PHYS_QNUM3_1, 0x27},
224#define TCM_FUNC1_END 167
225#define TCM_FUNC2_START 167
226 {OP_WR_E1H, TCM_REG_PHYS_QNUM0_0, 0x1d},
227 {OP_WR_E1H, TCM_REG_PHYS_QNUM1_0, 0x17},
228 {OP_WR_E1H, TCM_REG_PHYS_QNUM2_0, 0x17},
229 {OP_WR_E1H, TCM_REG_PHYS_QNUM3_0, 0x17},
230#define TCM_FUNC2_END 171
231#define TCM_FUNC3_START 171
232 {OP_WR_E1H, TCM_REG_PHYS_QNUM0_1, 0x3d},
233 {OP_WR_E1H, TCM_REG_PHYS_QNUM1_1, 0x37},
234 {OP_WR_E1H, TCM_REG_PHYS_QNUM2_1, 0x37},
235 {OP_WR_E1H, TCM_REG_PHYS_QNUM3_1, 0x37},
236#define TCM_FUNC3_END 175
237#define TCM_FUNC4_START 175
238 {OP_WR_E1H, TCM_REG_PHYS_QNUM0_0, 0x4d},
239 {OP_WR_E1H, TCM_REG_PHYS_QNUM1_0, 0x47},
240 {OP_WR_E1H, TCM_REG_PHYS_QNUM2_0, 0x47},
241 {OP_WR_E1H, TCM_REG_PHYS_QNUM3_0, 0x47},
242#define TCM_FUNC4_END 179
243#define TCM_FUNC5_START 179
244 {OP_WR_E1H, TCM_REG_PHYS_QNUM0_1, 0x6d},
245 {OP_WR_E1H, TCM_REG_PHYS_QNUM1_1, 0x67},
246 {OP_WR_E1H, TCM_REG_PHYS_QNUM2_1, 0x67},
247 {OP_WR_E1H, TCM_REG_PHYS_QNUM3_1, 0x67},
248#define TCM_FUNC5_END 183
249#define TCM_FUNC6_START 183
250 {OP_WR_E1H, TCM_REG_PHYS_QNUM0_0, 0x5d},
251 {OP_WR_E1H, TCM_REG_PHYS_QNUM1_0, 0x57},
252 {OP_WR_E1H, TCM_REG_PHYS_QNUM2_0, 0x57},
253 {OP_WR_E1H, TCM_REG_PHYS_QNUM3_0, 0x57},
254#define TCM_FUNC6_END 187
255#define TCM_FUNC7_START 187
256 {OP_WR_E1H, TCM_REG_PHYS_QNUM0_1, 0x7d},
257 {OP_WR_E1H, TCM_REG_PHYS_QNUM1_1, 0x77},
258 {OP_WR_E1H, TCM_REG_PHYS_QNUM2_1, 0x77},
259 {OP_WR_E1H, TCM_REG_PHYS_QNUM3_1, 0x77},
260#define TCM_FUNC7_END 191
261#define BRB1_COMMON_START 191
262 {OP_SW, BRB1_REG_LL_RAM, 0x2000020},
263 {OP_WR, BRB1_REG_SOFT_RESET, 0x1},
264 {OP_RD, BRB1_REG_NUM_OF_FULL_CYCLES_4, 0x0},
265 {OP_SW, BRB1_REG_FREE_LIST_PRS_CRDT, 0x30220},
266 {OP_WR, BRB1_REG_SOFT_RESET, 0x0},
267#define BRB1_COMMON_END 196
268#define BRB1_PORT0_START 196
269 {OP_WR_E1, BRB1_REG_PAUSE_LOW_THRESHOLD_0, 0xb8},
270 {OP_WR_E1, BRB1_REG_PAUSE_HIGH_THRESHOLD_0, 0x114},
271 {OP_RD, BRB1_REG_NUM_OF_PAUSE_CYCLES_0, 0x0},
272 {OP_RD, BRB1_REG_NUM_OF_FULL_CYCLES_0, 0x0},
273#define BRB1_PORT0_END 200
274#define BRB1_PORT1_START 200
275 {OP_WR_E1, BRB1_REG_PAUSE_LOW_THRESHOLD_1, 0xb8},
276 {OP_WR_E1, BRB1_REG_PAUSE_HIGH_THRESHOLD_1, 0x114},
277 {OP_RD, BRB1_REG_NUM_OF_PAUSE_CYCLES_1, 0x0},
278 {OP_RD, BRB1_REG_NUM_OF_FULL_CYCLES_1, 0x0},
279#define BRB1_PORT1_END 204
280#define TSEM_COMMON_START 204
281 {OP_RD, TSEM_REG_MSG_NUM_FIC0, 0x0},
282 {OP_RD, TSEM_REG_MSG_NUM_FIC1, 0x0},
283 {OP_RD, TSEM_REG_MSG_NUM_FOC0, 0x0},
284 {OP_RD, TSEM_REG_MSG_NUM_FOC1, 0x0},
285 {OP_RD, TSEM_REG_MSG_NUM_FOC2, 0x0},
286 {OP_RD, TSEM_REG_MSG_NUM_FOC3, 0x0},
287 {OP_WR, TSEM_REG_ARB_ELEMENT0, 0x1},
288 {OP_WR, TSEM_REG_ARB_ELEMENT1, 0x2},
289 {OP_WR, TSEM_REG_ARB_ELEMENT2, 0x3},
290 {OP_WR, TSEM_REG_ARB_ELEMENT3, 0x0},
291 {OP_WR, TSEM_REG_ARB_ELEMENT4, 0x4},
292 {OP_WR, TSEM_REG_ARB_CYCLE_SIZE, 0x1},
293 {OP_WR, TSEM_REG_TS_0_AS, 0x0},
294 {OP_WR, TSEM_REG_TS_1_AS, 0x1},
295 {OP_WR, TSEM_REG_TS_2_AS, 0x4},
296 {OP_WR, TSEM_REG_TS_3_AS, 0x0},
297 {OP_WR, TSEM_REG_TS_4_AS, 0x1},
298 {OP_WR, TSEM_REG_TS_5_AS, 0x3},
299 {OP_WR, TSEM_REG_TS_6_AS, 0x0},
300 {OP_WR, TSEM_REG_TS_7_AS, 0x1},
301 {OP_WR, TSEM_REG_TS_8_AS, 0x4},
302 {OP_WR, TSEM_REG_TS_9_AS, 0x0},
303 {OP_WR, TSEM_REG_TS_10_AS, 0x1},
304 {OP_WR, TSEM_REG_TS_11_AS, 0x3},
305 {OP_WR, TSEM_REG_TS_12_AS, 0x0},
306 {OP_WR, TSEM_REG_TS_13_AS, 0x1},
307 {OP_WR, TSEM_REG_TS_14_AS, 0x4},
308 {OP_WR, TSEM_REG_TS_15_AS, 0x0},
309 {OP_WR, TSEM_REG_TS_16_AS, 0x4},
310 {OP_WR, TSEM_REG_TS_17_AS, 0x3},
311 {OP_ZR, TSEM_REG_TS_18_AS, 0x2},
312 {OP_WR, TSEM_REG_ENABLE_IN, 0x3fff},
313 {OP_WR, TSEM_REG_ENABLE_OUT, 0x3ff},
314 {OP_WR, TSEM_REG_FIC0_DISABLE, 0x0},
315 {OP_WR, TSEM_REG_FIC1_DISABLE, 0x0},
316 {OP_WR, TSEM_REG_PAS_DISABLE, 0x0},
317 {OP_WR, TSEM_REG_THREADS_LIST, 0xff},
318 {OP_ZR, TSEM_REG_PASSIVE_BUFFER, 0x400},
319 {OP_WR, TSEM_REG_FAST_MEMORY + 0x18bc0, 0x1},
320 {OP_WR, TSEM_REG_FAST_MEMORY + 0x18000, 0x34},
321 {OP_WR, TSEM_REG_FAST_MEMORY + 0x18040, 0x18},
322 {OP_WR, TSEM_REG_FAST_MEMORY + 0x18080, 0xc},
323 {OP_WR, TSEM_REG_FAST_MEMORY + 0x180c0, 0x20},
324 {OP_WR_ASIC, TSEM_REG_FAST_MEMORY + 0x18300, 0x7a120},
325 {OP_WR_EMUL, TSEM_REG_FAST_MEMORY + 0x18300, 0x138},
326 {OP_WR_FPGA, TSEM_REG_FAST_MEMORY + 0x18300, 0x1388},
327 {OP_WR, TSEM_REG_FAST_MEMORY + 0x183c0, 0x1f4},
328 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x2000, 0xb2},
329 {OP_WR_E1H, TSEM_REG_FAST_MEMORY + 0x11480, 0x1},
330 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x23c8, 0xc1},
331 {OP_WR_EMUL_E1H, TSEM_REG_FAST_MEMORY + 0x11480, 0x0},
332 {OP_SW_E1, TSEM_REG_FAST_MEMORY + 0x23c8 + 0x304, 0x10223},
333 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x1000, 0x2b3},
334 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1020, 0xc8},
335 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x1000 + 0xacc, 0x10223},
336 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1000, 0x2},
337 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0xa020, 0xc8},
338 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1c18, 0x4},
339 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0xa000, 0x2},
340 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1c10, 0x2},
341 {OP_WR_E1H, TSEM_REG_FAST_MEMORY + 0x1ad0, 0x0},
342 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x800, 0x2},
343 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x1ad8, 0x4},
344 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x808, 0x2},
345 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3678, 0x6},
346 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x810, 0x4},
347 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3670, 0x2},
348 {OP_SW_E1, TSEM_REG_FAST_MEMORY + 0x1fb0, 0x40224},
349 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5000, 0x2},
350 {OP_SW_E1, TSEM_REG_FAST_MEMORY + 0x4cb0, 0x80228},
351 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5008, 0x4},
352 {OP_ZP_E1, TSEM_REG_INT_TABLE, 0x930000},
353 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5018, 0x4},
354 {OP_WR_64_E1, TSEM_REG_INT_TABLE + 0x360, 0x140230},
355 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5028, 0x4},
356 {OP_ZP_E1, TSEM_REG_PRAM, 0x324f0000},
357 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5038, 0x4},
358 {OP_ZP_E1, TSEM_REG_PRAM + 0x8000, 0x33250c94},
359 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5048, 0x4},
360 {OP_ZP_E1, TSEM_REG_PRAM + 0x10000, 0xe4d195e},
361 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5058, 0x4},
362 {OP_WR_64_E1, TSEM_REG_PRAM + 0x11e00, 0x5c400232},
363 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5068, 0x4},
364 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5078, 0x2},
365 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x4000, 0x2},
366 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x4008, 0x2},
367 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x62c0, 0x200224},
368 {OP_ZP_E1H, TSEM_REG_INT_TABLE, 0x9b0000},
369 {OP_WR_64_E1H, TSEM_REG_INT_TABLE + 0x398, 0xd0244},
370 {OP_ZP_E1H, TSEM_REG_PRAM, 0x325e0000},
371 {OP_ZP_E1H, TSEM_REG_PRAM + 0x8000, 0x35960c98},
372 {OP_ZP_E1H, TSEM_REG_PRAM + 0x10000, 0x1aea19fe},
373 {OP_WR_64_E1H, TSEM_REG_PRAM + 0x143d0, 0x57860246},
374#define TSEM_COMMON_END 297
375#define TSEM_PORT0_START 297
376 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x22c8, 0x20},
377 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x2000, 0x16c},
378 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x4000, 0x16c},
379 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0xb000, 0x28},
380 {OP_WR_E1, TSEM_REG_FAST_MEMORY + 0x4b60, 0x0},
381 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0xb140, 0xc},
382 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1400, 0xa},
383 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x32c0, 0x12},
384 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1450, 0x6},
385 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3350, 0x64},
386 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1500, 0x2},
387 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x8108, 0x2},
388 {OP_SW_E1, TSEM_REG_FAST_MEMORY + 0x1500 + 0x8, 0x50234},
389 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1500 + 0x1c, 0x7},
390 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1570, 0x12},
391 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x9c0, 0x4c},
392 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x800, 0x2},
393 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x820, 0xe},
394 {OP_SW_E1, TSEM_REG_FAST_MEMORY + 0x1fb0, 0x20239},
395 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x2908, 0x2},
396#define TSEM_PORT0_END 317
397#define TSEM_PORT1_START 317
398 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x2348, 0x20},
399 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x25b0, 0x16c},
400 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x45b0, 0x16c},
401 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0xb0a0, 0x28},
402 {OP_WR_E1, TSEM_REG_FAST_MEMORY + 0x4b64, 0x0},
403 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0xb170, 0xc},
404 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1428, 0xa},
405 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3308, 0x12},
406 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1468, 0x6},
407 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x34e0, 0x64},
408 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1538, 0x2},
409 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x8110, 0x2},
410 {OP_SW_E1, TSEM_REG_FAST_MEMORY + 0x1538 + 0x8, 0x5023b},
411 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x1538 + 0x1c, 0x7},
412 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x15b8, 0x12},
413 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0xaf0, 0x4c},
414 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x808, 0x2},
415 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x858, 0xe},
416 {OP_SW_E1, TSEM_REG_FAST_MEMORY + 0x1fb8, 0x20240},
417 {OP_ZR_E1, TSEM_REG_FAST_MEMORY + 0x2910, 0x2},
418#define TSEM_PORT1_END 337
419#define TSEM_FUNC0_START 337
420 {OP_WR_E1H, TSEM_REG_FAST_MEMORY + 0x2b60, 0x0},
421 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3000, 0x2},
422 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8, 0x50248},
423 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1c, 0x7},
424 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x31c0, 0x8},
425 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5000, 0x2},
426 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5080, 0x12},
427 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x4000, 0x2},
428#define TSEM_FUNC0_END 345
429#define TSEM_FUNC1_START 345
430 {OP_WR_E1H, TSEM_REG_FAST_MEMORY + 0x2b64, 0x0},
431 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3038, 0x2},
432 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x3038 + 0x8, 0x5024d},
433 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3038 + 0x1c, 0x7},
434 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x31e0, 0x8},
435 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5010, 0x2},
436 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x50c8, 0x12},
437 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x4008, 0x2},
438#define TSEM_FUNC1_END 353
439#define TSEM_FUNC2_START 353
440 {OP_WR_E1H, TSEM_REG_FAST_MEMORY + 0x2b68, 0x0},
441 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3070, 0x2},
442 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x3070 + 0x8, 0x50252},
443 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3070 + 0x1c, 0x7},
444 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3200, 0x8},
445 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5020, 0x2},
446 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5110, 0x12},
447 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x4010, 0x20257},
448#define TSEM_FUNC2_END 361
449#define TSEM_FUNC3_START 361
450 {OP_WR_E1H, TSEM_REG_FAST_MEMORY + 0x2b6c, 0x0},
451 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x30a8, 0x2},
452 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x30a8 + 0x8, 0x50259},
453 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x30a8 + 0x1c, 0x7},
454 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3220, 0x8},
455 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5030, 0x2},
456 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5158, 0x12},
457 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x4018, 0x2025e},
458#define TSEM_FUNC3_END 369
459#define TSEM_FUNC4_START 369
460 {OP_WR_E1H, TSEM_REG_FAST_MEMORY + 0x2b70, 0x0},
461 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x30e0, 0x2},
462 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x30e0 + 0x8, 0x50260},
463 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x30e0 + 0x1c, 0x7},
464 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3240, 0x8},
465 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5040, 0x2},
466 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x51a0, 0x12},
467 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x4020, 0x20265},
468#define TSEM_FUNC4_END 377
469#define TSEM_FUNC5_START 377
470 {OP_WR_E1H, TSEM_REG_FAST_MEMORY + 0x2b74, 0x0},
471 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3118, 0x2},
472 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x3118 + 0x8, 0x50267},
473 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3118 + 0x1c, 0x7},
474 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3260, 0x8},
475 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5050, 0x2},
476 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x51e8, 0x12},
477 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x4028, 0x2026c},
478#define TSEM_FUNC5_END 385
479#define TSEM_FUNC6_START 385
480 {OP_WR_E1H, TSEM_REG_FAST_MEMORY + 0x2b78, 0x0},
481 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3150, 0x2},
482 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x3150 + 0x8, 0x5026e},
483 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3150 + 0x1c, 0x7},
484 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3280, 0x8},
485 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5060, 0x2},
486 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5230, 0x12},
487 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x4030, 0x20273},
488#define TSEM_FUNC6_END 393
489#define TSEM_FUNC7_START 393
490 {OP_WR_E1H, TSEM_REG_FAST_MEMORY + 0x2b7c, 0x0},
491 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3188, 0x2},
492 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x3188 + 0x8, 0x50275},
493 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x3188 + 0x1c, 0x7},
494 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x32a0, 0x8},
495 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5070, 0x2},
496 {OP_ZR_E1H, TSEM_REG_FAST_MEMORY + 0x5278, 0x12},
497 {OP_SW_E1H, TSEM_REG_FAST_MEMORY + 0x4038, 0x2027a},
498#define TSEM_FUNC7_END 401
499#define MISC_COMMON_START 401
500 {OP_WR_E1, MISC_REG_GRC_TIMEOUT_EN, 0x1},
501 {OP_WR, MISC_REG_PLL_STORM_CTRL_1, 0x71d2911},
502 {OP_WR, MISC_REG_PLL_STORM_CTRL_2, 0x0},
503 {OP_WR, MISC_REG_PLL_STORM_CTRL_3, 0x9c0424},
504 {OP_WR, MISC_REG_PLL_STORM_CTRL_4, 0x0},
505 {OP_WR, MISC_REG_LCPLL_CTRL_1, 0x209},
506 {OP_WR_E1, MISC_REG_SPIO, 0xff000000},
507#define MISC_COMMON_END 408
508#define MISC_FUNC0_START 408
509 {OP_WR_E1H, MISC_REG_NIG_WOL_P0, 0x0},
510#define MISC_FUNC0_END 409
511#define MISC_FUNC1_START 409
512 {OP_WR_E1H, MISC_REG_NIG_WOL_P1, 0x0},
513#define MISC_FUNC1_END 410
514#define MISC_FUNC2_START 410
515 {OP_WR_E1H, MISC_REG_NIG_WOL_P0, 0x0},
516#define MISC_FUNC2_END 411
517#define MISC_FUNC3_START 411
518 {OP_WR_E1H, MISC_REG_NIG_WOL_P1, 0x0},
519#define MISC_FUNC3_END 412
520#define MISC_FUNC4_START 412
521 {OP_WR_E1H, MISC_REG_NIG_WOL_P0, 0x0},
522#define MISC_FUNC4_END 413
523#define MISC_FUNC5_START 413
524 {OP_WR_E1H, MISC_REG_NIG_WOL_P1, 0x0},
525#define MISC_FUNC5_END 414
526#define MISC_FUNC6_START 414
527 {OP_WR_E1H, MISC_REG_NIG_WOL_P0, 0x0},
528#define MISC_FUNC6_END 415
529#define MISC_FUNC7_START 415
530 {OP_WR_E1H, MISC_REG_NIG_WOL_P1, 0x0},
531#define MISC_FUNC7_END 416
532#define NIG_COMMON_START 416
533 {OP_WR, NIG_REG_PBF_LB_IN_EN, 0x1},
534 {OP_WR, NIG_REG_PRS_REQ_IN_EN, 0x1},
535 {OP_WR, NIG_REG_EGRESS_DEBUG_IN_EN, 0x1},
536 {OP_WR, NIG_REG_BRB_LB_OUT_EN, 0x1},
537 {OP_WR, NIG_REG_PRS_EOP_OUT_EN, 0x1},
538#define NIG_COMMON_END 421
539#define NIG_PORT0_START 421
540 {OP_WR, NIG_REG_LLH0_CM_HEADER, 0x300000},
541 {OP_WR, NIG_REG_LLH0_EVENT_ID, 0x28},
542 {OP_WR, NIG_REG_LLH0_ERROR_MASK, 0x0},
543 {OP_WR, NIG_REG_LLH0_XCM_MASK, 0x4},
544 {OP_WR, NIG_REG_LLH0_BRB1_NOT_MCP, 0x1},
545 {OP_WR, NIG_REG_STATUS_INTERRUPT_PORT0, 0x0},
546 {OP_WR_E1H, NIG_REG_LLH0_CLS_TYPE, 0x1},
547 {OP_WR, NIG_REG_LLH0_XCM_INIT_CREDIT, 0x30},
548 {OP_WR, NIG_REG_BRB0_PAUSE_IN_EN, 0x1},
549 {OP_WR, NIG_REG_EGRESS_PBF0_IN_EN, 0x1},
550 {OP_WR, NIG_REG_BRB0_OUT_EN, 0x1},
551 {OP_WR, NIG_REG_XCM0_OUT_EN, 0x1},
552#define NIG_PORT0_END 433
553#define NIG_PORT1_START 433
554 {OP_WR, NIG_REG_LLH1_CM_HEADER, 0x300000},
555 {OP_WR, NIG_REG_LLH1_EVENT_ID, 0x28},
556 {OP_WR, NIG_REG_LLH1_ERROR_MASK, 0x0},
557 {OP_WR, NIG_REG_LLH1_XCM_MASK, 0x4},
558 {OP_WR, NIG_REG_LLH1_BRB1_NOT_MCP, 0x1},
559 {OP_WR, NIG_REG_STATUS_INTERRUPT_PORT1, 0x0},
560 {OP_WR_E1H, NIG_REG_LLH1_CLS_TYPE, 0x1},
561 {OP_WR, NIG_REG_LLH1_XCM_INIT_CREDIT, 0x30},
562 {OP_WR, NIG_REG_BRB1_PAUSE_IN_EN, 0x1},
563 {OP_WR, NIG_REG_EGRESS_PBF1_IN_EN, 0x1},
564 {OP_WR, NIG_REG_BRB1_OUT_EN, 0x1},
565 {OP_WR, NIG_REG_XCM1_OUT_EN, 0x1},
566#define NIG_PORT1_END 445
567#define UPB_COMMON_START 445
568 {OP_WR, GRCBASE_UPB + PB_REG_CONTROL, 0x20},
569#define UPB_COMMON_END 446
570#define CSDM_COMMON_START 446
571 {OP_WR_E1, CSDM_REG_CFC_RSP_START_ADDR, 0xa11},
572 {OP_WR_E1H, CSDM_REG_CFC_RSP_START_ADDR, 0x211},
573 {OP_WR_E1, CSDM_REG_CMP_COUNTER_START_ADDR, 0xa00},
574 {OP_WR_E1H, CSDM_REG_CMP_COUNTER_START_ADDR, 0x200},
575 {OP_WR_E1, CSDM_REG_Q_COUNTER_START_ADDR, 0xa04},
576 {OP_WR_E1H, CSDM_REG_Q_COUNTER_START_ADDR, 0x204},
577 {OP_WR, CSDM_REG_CMP_COUNTER_MAX0, 0xffff},
578 {OP_WR, CSDM_REG_CMP_COUNTER_MAX1, 0xffff},
579 {OP_WR, CSDM_REG_CMP_COUNTER_MAX2, 0xffff},
580 {OP_WR, CSDM_REG_CMP_COUNTER_MAX3, 0xffff},
581 {OP_WR, CSDM_REG_AGG_INT_EVENT_0, 0xc6},
582 {OP_WR, CSDM_REG_AGG_INT_EVENT_1, 0x0},
583 {OP_WR, CSDM_REG_AGG_INT_EVENT_2, 0x34},
584 {OP_WR, CSDM_REG_AGG_INT_EVENT_3, 0x35},
585 {OP_ZR, CSDM_REG_AGG_INT_EVENT_4, 0x1c},
586 {OP_WR, CSDM_REG_AGG_INT_T_0, 0x1},
587 {OP_ZR, CSDM_REG_AGG_INT_T_1, 0x5f},
588 {OP_WR, CSDM_REG_ENABLE_IN1, 0x7ffffff},
589 {OP_WR, CSDM_REG_ENABLE_IN2, 0x3f},
590 {OP_WR, CSDM_REG_ENABLE_OUT1, 0x7ffffff},
591 {OP_WR, CSDM_REG_ENABLE_OUT2, 0xf},
592 {OP_RD, CSDM_REG_NUM_OF_Q0_CMD, 0x0},
593 {OP_RD, CSDM_REG_NUM_OF_Q1_CMD, 0x0},
594 {OP_RD, CSDM_REG_NUM_OF_Q3_CMD, 0x0},
595 {OP_RD, CSDM_REG_NUM_OF_Q4_CMD, 0x0},
596 {OP_RD, CSDM_REG_NUM_OF_Q5_CMD, 0x0},
597 {OP_RD, CSDM_REG_NUM_OF_Q6_CMD, 0x0},
598 {OP_RD, CSDM_REG_NUM_OF_Q7_CMD, 0x0},
599 {OP_RD, CSDM_REG_NUM_OF_Q8_CMD, 0x0},
600 {OP_RD, CSDM_REG_NUM_OF_Q9_CMD, 0x0},
601 {OP_RD, CSDM_REG_NUM_OF_Q10_CMD, 0x0},
602 {OP_RD, CSDM_REG_NUM_OF_Q11_CMD, 0x0},
603 {OP_RD, CSDM_REG_NUM_OF_PKT_END_MSG, 0x0},
604 {OP_RD, CSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0},
605 {OP_RD, CSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0},
606 {OP_WR_E1, CSDM_REG_INIT_CREDIT_PXP_CTRL, 0x1},
607 {OP_WR_ASIC, CSDM_REG_TIMER_TICK, 0x3e8},
608 {OP_WR_EMUL, CSDM_REG_TIMER_TICK, 0x1},
609 {OP_WR_FPGA, CSDM_REG_TIMER_TICK, 0xa},
610#define CSDM_COMMON_END 485
611#define USDM_COMMON_START 485
612 {OP_WR_E1, USDM_REG_CFC_RSP_START_ADDR, 0xa11},
613 {OP_WR_E1H, USDM_REG_CFC_RSP_START_ADDR, 0x411},
614 {OP_WR_E1, USDM_REG_CMP_COUNTER_START_ADDR, 0xa00},
615 {OP_WR_E1H, USDM_REG_CMP_COUNTER_START_ADDR, 0x400},
616 {OP_WR_E1, USDM_REG_Q_COUNTER_START_ADDR, 0xa04},
617 {OP_WR_E1H, USDM_REG_Q_COUNTER_START_ADDR, 0x404},
618 {OP_WR_E1, USDM_REG_PCK_END_MSG_START_ADDR, 0xa21},
619 {OP_WR_E1H, USDM_REG_PCK_END_MSG_START_ADDR, 0x421},
620 {OP_WR, USDM_REG_CMP_COUNTER_MAX0, 0xffff},
621 {OP_WR, USDM_REG_CMP_COUNTER_MAX1, 0xffff},
622 {OP_WR, USDM_REG_CMP_COUNTER_MAX2, 0xffff},
623 {OP_WR, USDM_REG_CMP_COUNTER_MAX3, 0xffff},
624 {OP_WR, USDM_REG_AGG_INT_EVENT_0, 0x46},
625 {OP_WR, USDM_REG_AGG_INT_EVENT_1, 0x5},
626 {OP_WR, USDM_REG_AGG_INT_EVENT_2, 0x34},
627 {OP_WR, USDM_REG_AGG_INT_EVENT_3, 0x35},
628 {OP_ZR_E1, USDM_REG_AGG_INT_EVENT_4, 0x5c},
629 {OP_WR_E1H, USDM_REG_AGG_INT_EVENT_4, 0x7},
630 {OP_ZR_E1H, USDM_REG_AGG_INT_EVENT_5, 0x5b},
631 {OP_WR, USDM_REG_AGG_INT_MODE_0, 0x1},
632 {OP_ZR_E1, USDM_REG_AGG_INT_MODE_1, 0x1f},
633 {OP_ZR_E1H, USDM_REG_AGG_INT_MODE_1, 0x3},
634 {OP_WR_E1H, USDM_REG_AGG_INT_MODE_4, 0x1},
635 {OP_ZR_E1H, USDM_REG_AGG_INT_MODE_5, 0x1b},
636 {OP_WR, USDM_REG_ENABLE_IN1, 0x7ffffff},
637 {OP_WR, USDM_REG_ENABLE_IN2, 0x3f},
638 {OP_WR, USDM_REG_ENABLE_OUT1, 0x7ffffff},
639 {OP_WR, USDM_REG_ENABLE_OUT2, 0xf},
640 {OP_RD, USDM_REG_NUM_OF_Q0_CMD, 0x0},
641 {OP_RD, USDM_REG_NUM_OF_Q1_CMD, 0x0},
642 {OP_RD, USDM_REG_NUM_OF_Q2_CMD, 0x0},
643 {OP_RD, USDM_REG_NUM_OF_Q3_CMD, 0x0},
644 {OP_RD, USDM_REG_NUM_OF_Q4_CMD, 0x0},
645 {OP_RD, USDM_REG_NUM_OF_Q5_CMD, 0x0},
646 {OP_RD, USDM_REG_NUM_OF_Q6_CMD, 0x0},
647 {OP_RD, USDM_REG_NUM_OF_Q7_CMD, 0x0},
648 {OP_RD, USDM_REG_NUM_OF_Q8_CMD, 0x0},
649 {OP_RD, USDM_REG_NUM_OF_Q9_CMD, 0x0},
650 {OP_RD, USDM_REG_NUM_OF_Q10_CMD, 0x0},
651 {OP_RD, USDM_REG_NUM_OF_Q11_CMD, 0x0},
652 {OP_RD, USDM_REG_NUM_OF_PKT_END_MSG, 0x0},
653 {OP_RD, USDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0},
654 {OP_RD, USDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0},
655 {OP_WR_E1, USDM_REG_INIT_CREDIT_PXP_CTRL, 0x1},
656 {OP_WR_ASIC, USDM_REG_TIMER_TICK, 0x3e8},
657 {OP_WR_EMUL, USDM_REG_TIMER_TICK, 0x1},
658 {OP_WR_FPGA, USDM_REG_TIMER_TICK, 0xa},
659#define USDM_COMMON_END 532
660#define CCM_COMMON_START 532
661 {OP_WR, CCM_REG_XX_OVFL_EVNT_ID, 0x32},
662 {OP_WR, CCM_REG_CQM_CCM_HDR_P, 0x2150020},
663 {OP_WR, CCM_REG_CQM_CCM_HDR_S, 0x2150020},
664 {OP_WR, CCM_REG_ERR_CCM_HDR, 0x8100000},
665 {OP_WR, CCM_REG_ERR_EVNT_ID, 0x33},
666 {OP_WR, CCM_REG_STORM_WEIGHT, 0x2},
667 {OP_WR, CCM_REG_TSEM_WEIGHT, 0x0},
668 {OP_WR, CCM_REG_XSEM_WEIGHT, 0x5},
669 {OP_WR, CCM_REG_USEM_WEIGHT, 0x5},
670 {OP_ZR, CCM_REG_PBF_WEIGHT, 0x2},
671 {OP_WR, CCM_REG_CSDM_WEIGHT, 0x2},
672 {OP_WR, CCM_REG_CQM_P_WEIGHT, 0x3},
673 {OP_WR, CCM_REG_CQM_S_WEIGHT, 0x2},
674 {OP_WR, CCM_REG_CCM_CQM_USE_Q, 0x1},
675 {OP_WR, CCM_REG_CNT_AUX1_Q, 0x2},
676 {OP_WR, CCM_REG_CNT_AUX2_Q, 0x2},
677 {OP_WR, CCM_REG_INV_DONE_Q, 0x1},
678 {OP_WR, CCM_REG_GR_ARB_TYPE, 0x1},
679 {OP_WR, CCM_REG_GR_LD0_PR, 0x1},
680 {OP_WR, CCM_REG_GR_LD1_PR, 0x2},
681 {OP_WR, CCM_REG_CFC_INIT_CRD, 0x1},
682 {OP_WR, CCM_REG_CQM_INIT_CRD, 0x20},
683 {OP_WR, CCM_REG_FIC0_INIT_CRD, 0x40},
684 {OP_WR, CCM_REG_FIC1_INIT_CRD, 0x40},
685 {OP_WR, CCM_REG_XX_INIT_CRD, 0x3},
686 {OP_WR, CCM_REG_XX_MSG_NUM, 0x18},
687 {OP_ZR, CCM_REG_XX_TABLE, 0x12},
688 {OP_SW_E1, CCM_REG_XX_DESCR_TABLE, 0x240242},
689 {OP_SW_E1H, CCM_REG_XX_DESCR_TABLE, 0x24027c},
690 {OP_WR, CCM_REG_N_SM_CTX_LD_0, 0x1},
691 {OP_WR, CCM_REG_N_SM_CTX_LD_1, 0x2},
692 {OP_WR, CCM_REG_N_SM_CTX_LD_2, 0x8},
693 {OP_WR, CCM_REG_N_SM_CTX_LD_3, 0x8},
694 {OP_ZR, CCM_REG_N_SM_CTX_LD_4, 0x4},
695 {OP_WR, CCM_REG_CCM_REG0_SZ, 0x4},
696 {OP_WR_E1, CCM_REG_QOS_PHYS_QNUM0_0, 0x9},
697 {OP_WR_E1, CCM_REG_QOS_PHYS_QNUM0_1, 0x29},
698 {OP_WR_E1, CCM_REG_QOS_PHYS_QNUM1_0, 0xa},
699 {OP_WR_E1, CCM_REG_QOS_PHYS_QNUM1_1, 0x2a},
700 {OP_WR_E1, CCM_REG_QOS_PHYS_QNUM2_0, 0x7},
701 {OP_WR_E1, CCM_REG_QOS_PHYS_QNUM2_1, 0x27},
702 {OP_WR_E1, CCM_REG_QOS_PHYS_QNUM3_0, 0x7},
703 {OP_WR_E1, CCM_REG_QOS_PHYS_QNUM3_1, 0x27},
704 {OP_WR_E1, CCM_REG_PHYS_QNUM1_0, 0xc},
705 {OP_WR_E1, CCM_REG_PHYS_QNUM1_1, 0x2c},
706 {OP_WR_E1, CCM_REG_PHYS_QNUM2_0, 0xc},
707 {OP_WR_E1, CCM_REG_PHYS_QNUM2_1, 0x2c},
708 {OP_WR_E1, CCM_REG_PHYS_QNUM3_0, 0xc},
709 {OP_WR_E1, CCM_REG_PHYS_QNUM3_1, 0x2c},
710 {OP_WR, CCM_REG_CCM_STORM0_IFEN, 0x1},
711 {OP_WR, CCM_REG_CCM_STORM1_IFEN, 0x1},
712 {OP_WR, CCM_REG_CCM_CQM_IFEN, 0x1},
713 {OP_WR, CCM_REG_STORM_CCM_IFEN, 0x1},
714 {OP_WR, CCM_REG_CQM_CCM_IFEN, 0x1},
715 {OP_WR, CCM_REG_CSDM_IFEN, 0x1},
716 {OP_WR, CCM_REG_TSEM_IFEN, 0x1},
717 {OP_WR, CCM_REG_XSEM_IFEN, 0x1},
718 {OP_WR, CCM_REG_USEM_IFEN, 0x1},
719 {OP_WR, CCM_REG_PBF_IFEN, 0x1},
720 {OP_WR, CCM_REG_CDU_AG_WR_IFEN, 0x1},
721 {OP_WR, CCM_REG_CDU_AG_RD_IFEN, 0x1},
722 {OP_WR, CCM_REG_CDU_SM_WR_IFEN, 0x1},
723 {OP_WR, CCM_REG_CDU_SM_RD_IFEN, 0x1},
724 {OP_WR, CCM_REG_CCM_CFC_IFEN, 0x1},
725#define CCM_COMMON_END 596
726#define CCM_FUNC0_START 596
727 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM0_0, 0x9},
728 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM1_0, 0xa},
729 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM2_0, 0x7},
730 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM3_0, 0x7},
731 {OP_WR_E1H, CCM_REG_PHYS_QNUM1_0, 0xc},
732 {OP_WR_E1H, CCM_REG_PHYS_QNUM2_0, 0xb},
733 {OP_WR_E1H, CCM_REG_PHYS_QNUM3_0, 0x7},
734#define CCM_FUNC0_END 603
735#define CCM_FUNC1_START 603
736 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM0_1, 0x29},
737 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM1_1, 0x2a},
738 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM2_1, 0x27},
739 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM3_1, 0x27},
740 {OP_WR_E1H, CCM_REG_PHYS_QNUM1_1, 0x2c},
741 {OP_WR_E1H, CCM_REG_PHYS_QNUM2_1, 0x2b},
742 {OP_WR_E1H, CCM_REG_PHYS_QNUM3_1, 0x27},
743#define CCM_FUNC1_END 610
744#define CCM_FUNC2_START 610
745 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM0_0, 0x19},
746 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM1_0, 0x1a},
747 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM2_0, 0x17},
748 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM3_0, 0x17},
749 {OP_WR_E1H, CCM_REG_PHYS_QNUM1_0, 0x1c},
750 {OP_WR_E1H, CCM_REG_PHYS_QNUM2_0, 0x1b},
751 {OP_WR_E1H, CCM_REG_PHYS_QNUM3_0, 0x17},
752#define CCM_FUNC2_END 617
753#define CCM_FUNC3_START 617
754 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM0_1, 0x39},
755 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM1_1, 0x3a},
756 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM2_1, 0x37},
757 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM3_1, 0x37},
758 {OP_WR_E1H, CCM_REG_PHYS_QNUM1_1, 0x3c},
759 {OP_WR_E1H, CCM_REG_PHYS_QNUM2_1, 0x3b},
760 {OP_WR_E1H, CCM_REG_PHYS_QNUM3_1, 0x37},
761#define CCM_FUNC3_END 624
762#define CCM_FUNC4_START 624
763 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM0_0, 0x49},
764 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM1_0, 0x4a},
765 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM2_0, 0x47},
766 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM3_0, 0x47},
767 {OP_WR_E1H, CCM_REG_PHYS_QNUM1_0, 0x4c},
768 {OP_WR_E1H, CCM_REG_PHYS_QNUM2_0, 0x4b},
769 {OP_WR_E1H, CCM_REG_PHYS_QNUM3_0, 0x47},
770#define CCM_FUNC4_END 631
771#define CCM_FUNC5_START 631
772 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM0_1, 0x69},
773 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM1_1, 0x6a},
774 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM2_1, 0x67},
775 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM3_1, 0x67},
776 {OP_WR_E1H, CCM_REG_PHYS_QNUM1_1, 0x6c},
777 {OP_WR_E1H, CCM_REG_PHYS_QNUM2_1, 0x6b},
778 {OP_WR_E1H, CCM_REG_PHYS_QNUM3_1, 0x67},
779#define CCM_FUNC5_END 638
780#define CCM_FUNC6_START 638
781 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM0_0, 0x59},
782 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM1_0, 0x5a},
783 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM2_0, 0x57},
784 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM3_0, 0x57},
785 {OP_WR_E1H, CCM_REG_PHYS_QNUM1_0, 0x5c},
786 {OP_WR_E1H, CCM_REG_PHYS_QNUM2_0, 0x5b},
787 {OP_WR_E1H, CCM_REG_PHYS_QNUM3_0, 0x57},
788#define CCM_FUNC6_END 645
789#define CCM_FUNC7_START 645
790 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM0_1, 0x79},
791 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM1_1, 0x7a},
792 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM2_1, 0x77},
793 {OP_WR_E1H, CCM_REG_QOS_PHYS_QNUM3_1, 0x77},
794 {OP_WR_E1H, CCM_REG_PHYS_QNUM1_1, 0x7c},
795 {OP_WR_E1H, CCM_REG_PHYS_QNUM2_1, 0x7b},
796 {OP_WR_E1H, CCM_REG_PHYS_QNUM3_1, 0x77},
797#define CCM_FUNC7_END 652
798#define UCM_COMMON_START 652
799 {OP_WR, UCM_REG_XX_OVFL_EVNT_ID, 0x32},
800 {OP_WR, UCM_REG_UQM_UCM_HDR_P, 0x2150020},
801 {OP_WR, UCM_REG_UQM_UCM_HDR_S, 0x2150020},
802 {OP_WR, UCM_REG_TM_UCM_HDR, 0x30},
803 {OP_WR, UCM_REG_ERR_UCM_HDR, 0x8100000},
804 {OP_WR, UCM_REG_ERR_EVNT_ID, 0x33},
805 {OP_WR, UCM_REG_EXPR_EVNT_ID, 0x30},
806 {OP_WR, UCM_REG_STOP_EVNT_ID, 0x31},
807 {OP_WR, UCM_REG_STORM_WEIGHT, 0x2},
808 {OP_WR, UCM_REG_TSEM_WEIGHT, 0x4},
809 {OP_WR, UCM_REG_CSEM_WEIGHT, 0x0},
810 {OP_WR, UCM_REG_XSEM_WEIGHT, 0x2},
811 {OP_WR, UCM_REG_DORQ_WEIGHT, 0x2},
812 {OP_WR, UCM_REG_CP_WEIGHT, 0x0},
813 {OP_WR, UCM_REG_USDM_WEIGHT, 0x2},
814 {OP_WR, UCM_REG_UQM_P_WEIGHT, 0x7},
815 {OP_WR, UCM_REG_UQM_S_WEIGHT, 0x2},
816 {OP_WR, UCM_REG_TM_WEIGHT, 0x2},
817 {OP_WR, UCM_REG_UCM_UQM_USE_Q, 0x1},
818 {OP_WR, UCM_REG_INV_CFLG_Q, 0x1},
819 {OP_WR, UCM_REG_GR_ARB_TYPE, 0x1},
820 {OP_WR, UCM_REG_GR_LD0_PR, 0x1},
821 {OP_WR, UCM_REG_GR_LD1_PR, 0x2},
822 {OP_WR, UCM_REG_CFC_INIT_CRD, 0x1},
823 {OP_WR, UCM_REG_FIC0_INIT_CRD, 0x40},
824 {OP_WR, UCM_REG_FIC1_INIT_CRD, 0x40},
825 {OP_WR, UCM_REG_TM_INIT_CRD, 0x4},
826 {OP_WR, UCM_REG_UQM_INIT_CRD, 0x20},
827 {OP_WR, UCM_REG_XX_INIT_CRD, 0xe},
828 {OP_WR, UCM_REG_XX_MSG_NUM, 0x1b},
829 {OP_ZR, UCM_REG_XX_TABLE, 0x12},
830 {OP_SW_E1, UCM_REG_XX_DESCR_TABLE, 0x1b0266},
831 {OP_SW_E1H, UCM_REG_XX_DESCR_TABLE, 0x1b02a0},
832 {OP_WR, UCM_REG_N_SM_CTX_LD_0, 0x10},
833 {OP_WR, UCM_REG_N_SM_CTX_LD_1, 0x7},
834 {OP_WR, UCM_REG_N_SM_CTX_LD_2, 0xf},
835 {OP_WR, UCM_REG_N_SM_CTX_LD_3, 0x10},
836 {OP_ZR_E1, UCM_REG_N_SM_CTX_LD_4, 0x4},
837 {OP_WR_E1H, UCM_REG_N_SM_CTX_LD_4, 0xb},
838 {OP_ZR_E1H, UCM_REG_N_SM_CTX_LD_5, 0x3},
839 {OP_WR, UCM_REG_UCM_REG0_SZ, 0x3},
840 {OP_WR_E1, UCM_REG_PHYS_QNUM0_0, 0xf},
841 {OP_WR_E1, UCM_REG_PHYS_QNUM0_1, 0x2f},
842 {OP_WR_E1, UCM_REG_PHYS_QNUM1_0, 0xe},
843 {OP_WR_E1, UCM_REG_PHYS_QNUM1_1, 0x2e},
844 {OP_WR, UCM_REG_UCM_STORM0_IFEN, 0x1},
845 {OP_WR, UCM_REG_UCM_STORM1_IFEN, 0x1},
846 {OP_WR, UCM_REG_UCM_UQM_IFEN, 0x1},
847 {OP_WR, UCM_REG_STORM_UCM_IFEN, 0x1},
848 {OP_WR, UCM_REG_UQM_UCM_IFEN, 0x1},
849 {OP_WR, UCM_REG_USDM_IFEN, 0x1},
850 {OP_WR, UCM_REG_TM_UCM_IFEN, 0x1},
851 {OP_WR, UCM_REG_UCM_TM_IFEN, 0x1},
852 {OP_WR, UCM_REG_TSEM_IFEN, 0x1},
853 {OP_WR, UCM_REG_CSEM_IFEN, 0x1},
854 {OP_WR, UCM_REG_XSEM_IFEN, 0x1},
855 {OP_WR, UCM_REG_DORQ_IFEN, 0x1},
856 {OP_WR, UCM_REG_CDU_AG_WR_IFEN, 0x1},
857 {OP_WR, UCM_REG_CDU_AG_RD_IFEN, 0x1},
858 {OP_WR, UCM_REG_CDU_SM_WR_IFEN, 0x1},
859 {OP_WR, UCM_REG_CDU_SM_RD_IFEN, 0x1},
860 {OP_WR, UCM_REG_UCM_CFC_IFEN, 0x1},
861#define UCM_COMMON_END 714
862#define UCM_FUNC0_START 714
863 {OP_WR_E1H, UCM_REG_PHYS_QNUM0_0, 0xf},
864 {OP_WR_E1H, UCM_REG_PHYS_QNUM1_0, 0xe},
865 {OP_WR_E1H, UCM_REG_PHYS_QNUM2_0, 0x0},
866 {OP_WR_E1H, UCM_REG_PHYS_QNUM3_0, 0x0},
867#define UCM_FUNC0_END 718
868#define UCM_FUNC1_START 718
869 {OP_WR_E1H, UCM_REG_PHYS_QNUM0_1, 0x2f},
870 {OP_WR_E1H, UCM_REG_PHYS_QNUM1_1, 0x2e},
871 {OP_WR_E1H, UCM_REG_PHYS_QNUM2_1, 0x0},
872 {OP_WR_E1H, UCM_REG_PHYS_QNUM3_1, 0x0},
873#define UCM_FUNC1_END 722
874#define UCM_FUNC2_START 722
875 {OP_WR_E1H, UCM_REG_PHYS_QNUM0_0, 0x1f},
876 {OP_WR_E1H, UCM_REG_PHYS_QNUM1_0, 0x1e},
877 {OP_WR_E1H, UCM_REG_PHYS_QNUM2_0, 0x0},
878 {OP_WR_E1H, UCM_REG_PHYS_QNUM3_0, 0x0},
879#define UCM_FUNC2_END 726
880#define UCM_FUNC3_START 726
881 {OP_WR_E1H, UCM_REG_PHYS_QNUM0_1, 0x3f},
882 {OP_WR_E1H, UCM_REG_PHYS_QNUM1_1, 0x3e},
883 {OP_WR_E1H, UCM_REG_PHYS_QNUM2_1, 0x0},
884 {OP_WR_E1H, UCM_REG_PHYS_QNUM3_1, 0x0},
885#define UCM_FUNC3_END 730
886#define UCM_FUNC4_START 730
887 {OP_WR_E1H, UCM_REG_PHYS_QNUM0_0, 0x4f},
888 {OP_WR_E1H, UCM_REG_PHYS_QNUM1_0, 0x4e},
889 {OP_WR_E1H, UCM_REG_PHYS_QNUM2_0, 0x0},
890 {OP_WR_E1H, UCM_REG_PHYS_QNUM3_0, 0x0},
891#define UCM_FUNC4_END 734
892#define UCM_FUNC5_START 734
893 {OP_WR_E1H, UCM_REG_PHYS_QNUM0_1, 0x6f},
894 {OP_WR_E1H, UCM_REG_PHYS_QNUM1_1, 0x6e},
895 {OP_WR_E1H, UCM_REG_PHYS_QNUM2_1, 0x0},
896 {OP_WR_E1H, UCM_REG_PHYS_QNUM3_1, 0x0},
897#define UCM_FUNC5_END 738
898#define UCM_FUNC6_START 738
899 {OP_WR_E1H, UCM_REG_PHYS_QNUM0_0, 0x5f},
900 {OP_WR_E1H, UCM_REG_PHYS_QNUM1_0, 0x5e},
901 {OP_WR_E1H, UCM_REG_PHYS_QNUM2_0, 0x0},
902 {OP_WR_E1H, UCM_REG_PHYS_QNUM3_0, 0x0},
903#define UCM_FUNC6_END 742
904#define UCM_FUNC7_START 742
905 {OP_WR_E1H, UCM_REG_PHYS_QNUM0_1, 0x7f},
906 {OP_WR_E1H, UCM_REG_PHYS_QNUM1_1, 0x7e},
907 {OP_WR_E1H, UCM_REG_PHYS_QNUM2_1, 0x0},
908 {OP_WR_E1H, UCM_REG_PHYS_QNUM3_1, 0x0},
909#define UCM_FUNC7_END 746
910#define USEM_COMMON_START 746
911 {OP_RD, USEM_REG_MSG_NUM_FIC0, 0x0},
912 {OP_RD, USEM_REG_MSG_NUM_FIC1, 0x0},
913 {OP_RD, USEM_REG_MSG_NUM_FOC0, 0x0},
914 {OP_RD, USEM_REG_MSG_NUM_FOC1, 0x0},
915 {OP_RD, USEM_REG_MSG_NUM_FOC2, 0x0},
916 {OP_RD, USEM_REG_MSG_NUM_FOC3, 0x0},
917 {OP_WR, USEM_REG_ARB_ELEMENT0, 0x1},
918 {OP_WR, USEM_REG_ARB_ELEMENT1, 0x2},
919 {OP_WR, USEM_REG_ARB_ELEMENT2, 0x3},
920 {OP_WR, USEM_REG_ARB_ELEMENT3, 0x0},
921 {OP_WR, USEM_REG_ARB_ELEMENT4, 0x4},
922 {OP_WR, USEM_REG_ARB_CYCLE_SIZE, 0x1},
923 {OP_WR, USEM_REG_TS_0_AS, 0x0},
924 {OP_WR, USEM_REG_TS_1_AS, 0x1},
925 {OP_WR, USEM_REG_TS_2_AS, 0x4},
926 {OP_WR, USEM_REG_TS_3_AS, 0x0},
927 {OP_WR, USEM_REG_TS_4_AS, 0x1},
928 {OP_WR, USEM_REG_TS_5_AS, 0x3},
929 {OP_WR, USEM_REG_TS_6_AS, 0x0},
930 {OP_WR, USEM_REG_TS_7_AS, 0x1},
931 {OP_WR, USEM_REG_TS_8_AS, 0x4},
932 {OP_WR, USEM_REG_TS_9_AS, 0x0},
933 {OP_WR, USEM_REG_TS_10_AS, 0x1},
934 {OP_WR, USEM_REG_TS_11_AS, 0x3},
935 {OP_WR, USEM_REG_TS_12_AS, 0x0},
936 {OP_WR, USEM_REG_TS_13_AS, 0x1},
937 {OP_WR, USEM_REG_TS_14_AS, 0x4},
938 {OP_WR, USEM_REG_TS_15_AS, 0x0},
939 {OP_WR, USEM_REG_TS_16_AS, 0x4},
940 {OP_WR, USEM_REG_TS_17_AS, 0x3},
941 {OP_ZR, USEM_REG_TS_18_AS, 0x2},
942 {OP_WR, USEM_REG_ENABLE_IN, 0x3fff},
943 {OP_WR, USEM_REG_ENABLE_OUT, 0x3ff},
944 {OP_WR, USEM_REG_FIC0_DISABLE, 0x0},
945 {OP_WR, USEM_REG_FIC1_DISABLE, 0x0},
946 {OP_WR, USEM_REG_PAS_DISABLE, 0x0},
947 {OP_WR, USEM_REG_THREADS_LIST, 0xffff},
948 {OP_ZR, USEM_REG_PASSIVE_BUFFER, 0x800},
949 {OP_WR, USEM_REG_FAST_MEMORY + 0x18bc0, 0x1},
950 {OP_WR, USEM_REG_FAST_MEMORY + 0x18000, 0x1a},
951 {OP_WR, USEM_REG_FAST_MEMORY + 0x18040, 0x4e},
952 {OP_WR, USEM_REG_FAST_MEMORY + 0x18080, 0x10},
953 {OP_WR, USEM_REG_FAST_MEMORY + 0x180c0, 0x20},
954 {OP_WR_ASIC, USEM_REG_FAST_MEMORY + 0x18300, 0x7a120},
955 {OP_WR_EMUL, USEM_REG_FAST_MEMORY + 0x18300, 0x138},
956 {OP_WR_FPGA, USEM_REG_FAST_MEMORY + 0x18300, 0x1388},
957 {OP_WR, USEM_REG_FAST_MEMORY + 0x183c0, 0x1f4},
958 {OP_WR_ASIC, USEM_REG_FAST_MEMORY + 0x18380, 0x1dcd6500},
959 {OP_WR_EMUL, USEM_REG_FAST_MEMORY + 0x18380, 0x4c4b4},
960 {OP_WR_FPGA, USEM_REG_FAST_MEMORY + 0x18380, 0x4c4b40},
961 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x5000, 0xc2},
962 {OP_WR_EMUL_E1H, USEM_REG_FAST_MEMORY + 0x11480, 0x0},
963 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1020, 0xc8},
964 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x11480, 0x1},
965 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1000, 0x2},
966 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x2000, 0x102},
967 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4640, 0x40},
968 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x8980, 0xc8},
969 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x57f0, 0x4},
970 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x8960, 0x2},
971 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x57d8, 0x5},
972 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3228, 0x4},
973 {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x57d8 + 0x14, 0x10281},
974 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3200, 0x9},
975 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1c60, 0x20},
976 {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x3200 + 0x24, 0x102bb},
977 {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x2830, 0x20282},
978 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3180, 0x20},
979 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5000, 0x400},
980 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4000, 0x2},
981 {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x4000 + 0x8, 0x102bc},
982 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4000 + 0xc, 0x3},
983 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6b68, 0x2},
984 {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x6b68 + 0x8, 0x202bd},
985 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6b10, 0x2},
986 {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x74c0, 0x202bf},
987 {OP_WR, USEM_REG_FAST_MEMORY + 0x10800, 0x1000000},
988 {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x10c00, 0x100284},
989 {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x10c00, 0x1002c1},
990 {OP_WR, USEM_REG_FAST_MEMORY + 0x10800, 0x0},
991 {OP_SW_E1, USEM_REG_FAST_MEMORY + 0x10c40, 0x100294},
992 {OP_SW_E1H, USEM_REG_FAST_MEMORY + 0x10c40, 0x1002d1},
993 {OP_ZP_E1, USEM_REG_INT_TABLE, 0xc30000},
994 {OP_ZP_E1H, USEM_REG_INT_TABLE, 0xd20000},
995 {OP_WR_64_E1, USEM_REG_INT_TABLE + 0x368, 0x1302a4},
996 {OP_WR_64_E1H, USEM_REG_INT_TABLE + 0x3a8, 0xb02e1},
997 {OP_ZP_E1, USEM_REG_PRAM, 0x314c0000},
998 {OP_ZP_E1H, USEM_REG_PRAM, 0x31b60000},
999 {OP_ZP_E1, USEM_REG_PRAM + 0x8000, 0x35ef0c53},
1000 {OP_ZP_E1H, USEM_REG_PRAM + 0x8000, 0x36500c6e},
1001 {OP_ZP_E1, USEM_REG_PRAM + 0x10000, 0x361319cf},
1002 {OP_ZP_E1H, USEM_REG_PRAM + 0x10000, 0x37591a02},
1003 {OP_ZP_E1, USEM_REG_PRAM + 0x18000, 0x7112754},
1004 {OP_ZP_E1H, USEM_REG_PRAM + 0x18000, 0x286127d9},
1005 {OP_WR_64_E1, USEM_REG_PRAM + 0x18ee0, 0x4e2402a6},
1006 {OP_WR_64_E1H, USEM_REG_PRAM + 0x1ff40, 0x401802e3},
1007#define USEM_COMMON_END 842
1008#define USEM_PORT0_START 842
1009 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1400, 0xa0},
1010 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x9000, 0xa0},
1011 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1900, 0x10},
1012 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x9500, 0x40},
1013 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1980, 0x30},
1014 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x9700, 0x3c},
1015 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4740, 0xb4},
1016 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x2450, 0xb4},
1017 {OP_WR_E1, USEM_REG_FAST_MEMORY + 0x1d90, 0x0},
1018 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x2ad0, 0x2},
1019 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1b40, 0x4},
1020 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3080, 0x20},
1021 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1b60, 0x20},
1022 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x8000, 0x12c},
1023 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x5318, 0x98},
1024 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x3238, 0x0},
1025 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5000, 0x20},
1026 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5100, 0x20},
1027 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5200, 0x20},
1028 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5300, 0x20},
1029 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5400, 0x20},
1030 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5500, 0x20},
1031 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5600, 0x20},
1032 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5700, 0x20},
1033 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5800, 0x20},
1034 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5900, 0x20},
1035 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5a00, 0x20},
1036 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5b00, 0x20},
1037 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5c00, 0x20},
1038 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5d00, 0x20},
1039 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5e00, 0x20},
1040 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5f00, 0x20},
1041 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6b78, 0x52},
1042 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6e08, 0xc},
1043#define USEM_PORT0_END 876
1044#define USEM_PORT1_START 876
1045 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1680, 0xa0},
1046 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x9280, 0xa0},
1047 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1940, 0x10},
1048 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x9600, 0x40},
1049 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1a40, 0x30},
1050 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x97f0, 0x3c},
1051 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x4a10, 0xb4},
1052 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x2720, 0xb4},
1053 {OP_WR_E1, USEM_REG_FAST_MEMORY + 0x1d94, 0x0},
1054 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x2ad8, 0x2},
1055 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1b50, 0x4},
1056 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3100, 0x20},
1057 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x1be0, 0x20},
1058 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x84b0, 0x12c},
1059 {OP_ZR_E1, USEM_REG_FAST_MEMORY + 0x5578, 0x98},
1060 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x323c, 0x0},
1061 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5080, 0x20},
1062 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5180, 0x20},
1063 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5280, 0x20},
1064 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5380, 0x20},
1065 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5480, 0x20},
1066 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5580, 0x20},
1067 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5680, 0x20},
1068 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5780, 0x20},
1069 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5880, 0x20},
1070 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5980, 0x20},
1071 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5a80, 0x20},
1072 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5b80, 0x20},
1073 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5c80, 0x20},
1074 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5d80, 0x20},
1075 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5e80, 0x20},
1076 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x5f80, 0x20},
1077 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6cc0, 0x52},
1078 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x6e38, 0xc},
1079#define USEM_PORT1_END 910
1080#define USEM_FUNC0_START 910
1081 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x2a30, 0x0},
1082 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3000, 0x4},
1083 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4018, 0x2},
1084#define USEM_FUNC0_END 913
1085#define USEM_FUNC1_START 913
1086 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x2a34, 0x0},
1087 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3010, 0x4},
1088 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4028, 0x2},
1089#define USEM_FUNC1_END 916
1090#define USEM_FUNC2_START 916
1091 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x2a38, 0x0},
1092 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3020, 0x4},
1093 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4038, 0x2},
1094#define USEM_FUNC2_END 919
1095#define USEM_FUNC3_START 919
1096 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x2a3c, 0x0},
1097 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3030, 0x4},
1098 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4048, 0x2},
1099#define USEM_FUNC3_END 922
1100#define USEM_FUNC4_START 922
1101 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x2a40, 0x0},
1102 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3040, 0x4},
1103 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4058, 0x2},
1104#define USEM_FUNC4_END 925
1105#define USEM_FUNC5_START 925
1106 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x2a44, 0x0},
1107 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3050, 0x4},
1108 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4068, 0x2},
1109#define USEM_FUNC5_END 928
1110#define USEM_FUNC6_START 928
1111 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x2a48, 0x0},
1112 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3060, 0x4},
1113 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4078, 0x2},
1114#define USEM_FUNC6_END 931
1115#define USEM_FUNC7_START 931
1116 {OP_WR_E1H, USEM_REG_FAST_MEMORY + 0x2a4c, 0x0},
1117 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x3070, 0x4},
1118 {OP_ZR_E1H, USEM_REG_FAST_MEMORY + 0x4088, 0x2},
1119#define USEM_FUNC7_END 934
1120#define CSEM_COMMON_START 934
1121 {OP_RD, CSEM_REG_MSG_NUM_FIC0, 0x0},
1122 {OP_RD, CSEM_REG_MSG_NUM_FIC1, 0x0},
1123 {OP_RD, CSEM_REG_MSG_NUM_FOC0, 0x0},
1124 {OP_RD, CSEM_REG_MSG_NUM_FOC1, 0x0},
1125 {OP_RD, CSEM_REG_MSG_NUM_FOC2, 0x0},
1126 {OP_RD, CSEM_REG_MSG_NUM_FOC3, 0x0},
1127 {OP_WR, CSEM_REG_ARB_ELEMENT0, 0x1},
1128 {OP_WR, CSEM_REG_ARB_ELEMENT1, 0x2},
1129 {OP_WR, CSEM_REG_ARB_ELEMENT2, 0x3},
1130 {OP_WR, CSEM_REG_ARB_ELEMENT3, 0x0},
1131 {OP_WR, CSEM_REG_ARB_ELEMENT4, 0x4},
1132 {OP_WR, CSEM_REG_ARB_CYCLE_SIZE, 0x1},
1133 {OP_WR, CSEM_REG_TS_0_AS, 0x0},
1134 {OP_WR, CSEM_REG_TS_1_AS, 0x1},
1135 {OP_WR, CSEM_REG_TS_2_AS, 0x4},
1136 {OP_WR, CSEM_REG_TS_3_AS, 0x0},
1137 {OP_WR, CSEM_REG_TS_4_AS, 0x1},
1138 {OP_WR, CSEM_REG_TS_5_AS, 0x3},
1139 {OP_WR, CSEM_REG_TS_6_AS, 0x0},
1140 {OP_WR, CSEM_REG_TS_7_AS, 0x1},
1141 {OP_WR, CSEM_REG_TS_8_AS, 0x4},
1142 {OP_WR, CSEM_REG_TS_9_AS, 0x0},
1143 {OP_WR, CSEM_REG_TS_10_AS, 0x1},
1144 {OP_WR, CSEM_REG_TS_11_AS, 0x3},
1145 {OP_WR, CSEM_REG_TS_12_AS, 0x0},
1146 {OP_WR, CSEM_REG_TS_13_AS, 0x1},
1147 {OP_WR, CSEM_REG_TS_14_AS, 0x4},
1148 {OP_WR, CSEM_REG_TS_15_AS, 0x0},
1149 {OP_WR, CSEM_REG_TS_16_AS, 0x4},
1150 {OP_WR, CSEM_REG_TS_17_AS, 0x3},
1151 {OP_ZR, CSEM_REG_TS_18_AS, 0x2},
1152 {OP_WR, CSEM_REG_ENABLE_IN, 0x3fff},
1153 {OP_WR, CSEM_REG_ENABLE_OUT, 0x3ff},
1154 {OP_WR, CSEM_REG_FIC0_DISABLE, 0x0},
1155 {OP_WR, CSEM_REG_FIC1_DISABLE, 0x0},
1156 {OP_WR, CSEM_REG_PAS_DISABLE, 0x0},
1157 {OP_WR, CSEM_REG_THREADS_LIST, 0xffff},
1158 {OP_ZR, CSEM_REG_PASSIVE_BUFFER, 0x800},
1159 {OP_WR, CSEM_REG_FAST_MEMORY + 0x18bc0, 0x1},
1160 {OP_WR, CSEM_REG_FAST_MEMORY + 0x18000, 0x10},
1161 {OP_WR, CSEM_REG_FAST_MEMORY + 0x18040, 0x12},
1162 {OP_WR, CSEM_REG_FAST_MEMORY + 0x18080, 0x30},
1163 {OP_WR, CSEM_REG_FAST_MEMORY + 0x180c0, 0xe},
1164 {OP_WR, CSEM_REG_FAST_MEMORY + 0x183c0, 0x1f4},
1165 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x5000, 0x42},
1166 {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x11480, 0x1},
1167 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1020, 0xc8},
1168 {OP_WR_EMUL_E1H, CSEM_REG_FAST_MEMORY + 0x11480, 0x0},
1169 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1000, 0x2},
1170 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x1000, 0x42},
1171 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x2000, 0xc0},
1172 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x7020, 0xc8},
1173 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x3070, 0x80},
1174 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x7000, 0x2},
1175 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x4280, 0x4},
1176 {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x11e8, 0x0},
1177 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x25c0, 0x240},
1178 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3000, 0xc0},
1179 {OP_SW_E1, CSEM_REG_FAST_MEMORY + 0x2ec8, 0x802a8},
1180 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x4070, 0x80},
1181 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x5280, 0x4},
1182 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x6700, 0x100},
1183 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x9000, 0x400},
1184 {OP_SW_E1H, CSEM_REG_FAST_MEMORY + 0x6b08, 0x2002e5},
1185 {OP_WR, CSEM_REG_FAST_MEMORY + 0x10800, 0x13fffff},
1186 {OP_SW_E1, CSEM_REG_FAST_MEMORY + 0x10c00, 0x1002b0},
1187 {OP_SW_E1H, CSEM_REG_FAST_MEMORY + 0x10c00, 0x100305},
1188 {OP_WR, CSEM_REG_FAST_MEMORY + 0x10800, 0x0},
1189 {OP_SW_E1, CSEM_REG_FAST_MEMORY + 0x10c40, 0x1002c0},
1190 {OP_SW_E1H, CSEM_REG_FAST_MEMORY + 0x10c40, 0x100315},
1191 {OP_ZP_E1, CSEM_REG_INT_TABLE, 0x710000},
1192 {OP_ZP_E1H, CSEM_REG_INT_TABLE, 0x740000},
1193 {OP_WR_64_E1, CSEM_REG_INT_TABLE + 0x380, 0x1002d0},
1194 {OP_WR_64_E1H, CSEM_REG_INT_TABLE + 0x380, 0x100325},
1195 {OP_ZP_E1, CSEM_REG_PRAM, 0x32290000},
1196 {OP_ZP_E1H, CSEM_REG_PRAM, 0x32260000},
1197 {OP_ZP_E1, CSEM_REG_PRAM + 0x8000, 0x23630c8b},
1198 {OP_ZP_E1H, CSEM_REG_PRAM + 0x8000, 0x246e0c8a},
1199 {OP_WR_64_E1, CSEM_REG_PRAM + 0xc930, 0x654002d2},
1200 {OP_WR_64_E1H, CSEM_REG_PRAM + 0xcbb0, 0x64f00327},
1201#define CSEM_COMMON_END 1014
1202#define CSEM_PORT0_START 1014
1203 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1400, 0xa0},
1204 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x8000, 0xa0},
1205 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1900, 0x10},
1206 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x8500, 0x40},
1207 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1980, 0x30},
1208 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x8700, 0x3c},
1209 {OP_WR_E1, CSEM_REG_FAST_MEMORY + 0x5118, 0x0},
1210 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x4040, 0x6},
1211 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x2300, 0xe},
1212 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x3040, 0x6},
1213 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x2410, 0x30},
1214#define CSEM_PORT0_END 1025
1215#define CSEM_PORT1_START 1025
1216 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1680, 0xa0},
1217 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x8280, 0xa0},
1218 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1940, 0x10},
1219 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x8600, 0x40},
1220 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x1a40, 0x30},
1221 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x87f0, 0x3c},
1222 {OP_WR_E1, CSEM_REG_FAST_MEMORY + 0x511c, 0x0},
1223 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x4058, 0x6},
1224 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x2338, 0xe},
1225 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x3058, 0x6},
1226 {OP_ZR_E1, CSEM_REG_FAST_MEMORY + 0x24d0, 0x30},
1227#define CSEM_PORT1_END 1036
1228#define CSEM_FUNC0_START 1036
1229 {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1148, 0x0},
1230 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3300, 0x2},
1231 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x6040, 0x30},
1232#define CSEM_FUNC0_END 1039
1233#define CSEM_FUNC1_START 1039
1234 {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x114c, 0x0},
1235 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3308, 0x2},
1236 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x6100, 0x30},
1237#define CSEM_FUNC1_END 1042
1238#define CSEM_FUNC2_START 1042
1239 {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1150, 0x0},
1240 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3310, 0x2},
1241 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x61c0, 0x30},
1242#define CSEM_FUNC2_END 1045
1243#define CSEM_FUNC3_START 1045
1244 {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1154, 0x0},
1245 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3318, 0x2},
1246 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x6280, 0x30},
1247#define CSEM_FUNC3_END 1048
1248#define CSEM_FUNC4_START 1048
1249 {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1158, 0x0},
1250 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3320, 0x2},
1251 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x6340, 0x30},
1252#define CSEM_FUNC4_END 1051
1253#define CSEM_FUNC5_START 1051
1254 {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x115c, 0x0},
1255 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3328, 0x2},
1256 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x6400, 0x30},
1257#define CSEM_FUNC5_END 1054
1258#define CSEM_FUNC6_START 1054
1259 {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1160, 0x0},
1260 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3330, 0x2},
1261 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x64c0, 0x30},
1262#define CSEM_FUNC6_END 1057
1263#define CSEM_FUNC7_START 1057
1264 {OP_WR_E1H, CSEM_REG_FAST_MEMORY + 0x1164, 0x0},
1265 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x3338, 0x2},
1266 {OP_ZR_E1H, CSEM_REG_FAST_MEMORY + 0x6580, 0x30},
1267#define CSEM_FUNC7_END 1060
1268#define XPB_COMMON_START 1060
1269 {OP_WR, GRCBASE_XPB + PB_REG_CONTROL, 0x20},
1270#define XPB_COMMON_END 1061
1271#define DQ_COMMON_START 1061
1272 {OP_WR, DORQ_REG_MODE_ACT, 0x2},
1273 {OP_WR, DORQ_REG_NORM_CID_OFST, 0x3},
1274 {OP_WR, DORQ_REG_OUTST_REQ, 0x4},
1275 {OP_WR, DORQ_REG_DPM_CID_ADDR, 0x8},
1276 {OP_WR, DORQ_REG_RSP_INIT_CRD, 0x2},
1277 {OP_WR, DORQ_REG_NORM_CMHEAD_TX, 0x90},
1278 {OP_WR, DORQ_REG_CMHEAD_RX, 0x90},
1279 {OP_WR, DORQ_REG_SHRT_CMHEAD, 0x800090},
1280 {OP_WR, DORQ_REG_ERR_CMHEAD, 0x8140000},
1281 {OP_WR, DORQ_REG_AGG_CMD0, 0x8a},
1282 {OP_WR, DORQ_REG_AGG_CMD1, 0x80},
1283 {OP_WR, DORQ_REG_AGG_CMD2, 0x90},
1284 {OP_WR, DORQ_REG_AGG_CMD3, 0x80},
1285 {OP_WR, DORQ_REG_SHRT_ACT_CNT, 0x6},
1286 {OP_WR, DORQ_REG_DQ_FIFO_FULL_TH, 0x7d0},
1287 {OP_WR, DORQ_REG_DQ_FIFO_AFULL_TH, 0x76c},
1288 {OP_WR, DORQ_REG_REGN, 0x7c1004},
1289 {OP_WR, DORQ_REG_IF_EN, 0xf},
1290#define DQ_COMMON_END 1079
1291#define TIMERS_COMMON_START 1079
1292 {OP_ZR, TM_REG_CLIN_PRIOR0_CLIENT, 0x2},
1293 {OP_WR, TM_REG_LIN_SETCLR_FIFO_ALFULL_THR, 0x1c},
1294 {OP_WR, TM_REG_CFC_AC_CRDCNT_VAL, 0x1},
1295 {OP_WR, TM_REG_CFC_CLD_CRDCNT_VAL, 0x1},
1296 {OP_WR, TM_REG_CLOUT_CRDCNT0_VAL, 0x1},
1297 {OP_WR, TM_REG_CLOUT_CRDCNT1_VAL, 0x1},
1298 {OP_WR, TM_REG_CLOUT_CRDCNT2_VAL, 0x1},
1299 {OP_WR, TM_REG_EXP_CRDCNT_VAL, 0x1},
1300 {OP_WR_E1, TM_REG_PCIARB_CRDCNT_VAL, 0x1},
1301 {OP_WR_E1H, TM_REG_PCIARB_CRDCNT_VAL, 0x2},
1302 {OP_WR_ASIC, TM_REG_TIMER_TICK_SIZE, 0x3d090},
1303 {OP_WR_EMUL, TM_REG_TIMER_TICK_SIZE, 0x9c},
1304 {OP_WR_FPGA, TM_REG_TIMER_TICK_SIZE, 0x9c4},
1305 {OP_WR, TM_REG_CL0_CONT_REGION, 0x8},
1306 {OP_WR, TM_REG_CL1_CONT_REGION, 0xc},
1307 {OP_WR, TM_REG_CL2_CONT_REGION, 0x10},
1308 {OP_WR, TM_REG_TM_CONTEXT_REGION, 0x20},
1309 {OP_WR, TM_REG_EN_TIMERS, 0x1},
1310 {OP_WR, TM_REG_EN_REAL_TIME_CNT, 0x1},
1311 {OP_WR, TM_REG_EN_CL0_INPUT, 0x1},
1312 {OP_WR, TM_REG_EN_CL1_INPUT, 0x1},
1313 {OP_WR, TM_REG_EN_CL2_INPUT, 0x1},
1314#define TIMERS_COMMON_END 1101
1315#define TIMERS_PORT0_START 1101
1316 {OP_WR, TM_REG_LIN0_LOGIC_ADDR, 0x0},
1317 {OP_WR, TM_REG_LIN0_PHY_ADDR_VALID, 0x0},
1318 {OP_ZR, TM_REG_LIN0_PHY_ADDR, 0x2},
1319#define TIMERS_PORT0_END 1104
1320#define TIMERS_PORT1_START 1104
1321 {OP_WR, TM_REG_LIN1_LOGIC_ADDR, 0x0},
1322 {OP_WR, TM_REG_LIN1_PHY_ADDR_VALID, 0x0},
1323 {OP_ZR, TM_REG_LIN1_PHY_ADDR, 0x2},
1324#define TIMERS_PORT1_END 1107
1325#define XSDM_COMMON_START 1107
1326 {OP_WR_E1, XSDM_REG_CFC_RSP_START_ADDR, 0x614},
1327 {OP_WR_E1H, XSDM_REG_CFC_RSP_START_ADDR, 0x424},
1328 {OP_WR_E1, XSDM_REG_CMP_COUNTER_START_ADDR, 0x600},
1329 {OP_WR_E1H, XSDM_REG_CMP_COUNTER_START_ADDR, 0x410},
1330 {OP_WR_E1, XSDM_REG_Q_COUNTER_START_ADDR, 0x604},
1331 {OP_WR_E1H, XSDM_REG_Q_COUNTER_START_ADDR, 0x414},
1332 {OP_WR, XSDM_REG_CMP_COUNTER_MAX0, 0xffff},
1333 {OP_WR, XSDM_REG_CMP_COUNTER_MAX1, 0xffff},
1334 {OP_WR, XSDM_REG_CMP_COUNTER_MAX2, 0xffff},
1335 {OP_WR, XSDM_REG_CMP_COUNTER_MAX3, 0xffff},
1336 {OP_WR, XSDM_REG_AGG_INT_EVENT_0, 0x20},
1337 {OP_WR, XSDM_REG_AGG_INT_EVENT_1, 0x20},
1338 {OP_WR, XSDM_REG_AGG_INT_EVENT_2, 0x34},
1339 {OP_WR, XSDM_REG_AGG_INT_EVENT_3, 0x35},
1340 {OP_WR, XSDM_REG_AGG_INT_EVENT_4, 0x23},
1341 {OP_WR, XSDM_REG_AGG_INT_EVENT_5, 0x24},
1342 {OP_WR, XSDM_REG_AGG_INT_EVENT_6, 0x25},
1343 {OP_WR, XSDM_REG_AGG_INT_EVENT_7, 0x26},
1344 {OP_WR, XSDM_REG_AGG_INT_EVENT_8, 0x27},
1345 {OP_WR, XSDM_REG_AGG_INT_EVENT_9, 0x29},
1346 {OP_WR, XSDM_REG_AGG_INT_EVENT_10, 0x2a},
1347 {OP_WR, XSDM_REG_AGG_INT_EVENT_11, 0x2b},
1348 {OP_WR, XSDM_REG_AGG_INT_EVENT_12, 0x2c},
1349 {OP_WR, XSDM_REG_AGG_INT_EVENT_13, 0x2d},
1350 {OP_ZR, XSDM_REG_AGG_INT_EVENT_14, 0x52},
1351 {OP_WR, XSDM_REG_AGG_INT_MODE_0, 0x1},
1352 {OP_ZR, XSDM_REG_AGG_INT_MODE_1, 0x1f},
1353 {OP_WR, XSDM_REG_ENABLE_IN1, 0x7ffffff},
1354 {OP_WR, XSDM_REG_ENABLE_IN2, 0x3f},
1355 {OP_WR, XSDM_REG_ENABLE_OUT1, 0x7ffffff},
1356 {OP_WR, XSDM_REG_ENABLE_OUT2, 0xf},
1357 {OP_RD, XSDM_REG_NUM_OF_Q0_CMD, 0x0},
1358 {OP_RD, XSDM_REG_NUM_OF_Q1_CMD, 0x0},
1359 {OP_RD, XSDM_REG_NUM_OF_Q3_CMD, 0x0},
1360 {OP_RD, XSDM_REG_NUM_OF_Q4_CMD, 0x0},
1361 {OP_RD, XSDM_REG_NUM_OF_Q5_CMD, 0x0},
1362 {OP_RD, XSDM_REG_NUM_OF_Q6_CMD, 0x0},
1363 {OP_RD, XSDM_REG_NUM_OF_Q7_CMD, 0x0},
1364 {OP_RD, XSDM_REG_NUM_OF_Q8_CMD, 0x0},
1365 {OP_RD, XSDM_REG_NUM_OF_Q9_CMD, 0x0},
1366 {OP_RD, XSDM_REG_NUM_OF_Q10_CMD, 0x0},
1367 {OP_RD, XSDM_REG_NUM_OF_Q11_CMD, 0x0},
1368 {OP_RD, XSDM_REG_NUM_OF_PKT_END_MSG, 0x0},
1369 {OP_RD, XSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0},
1370 {OP_RD, XSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0},
1371 {OP_WR_E1, XSDM_REG_INIT_CREDIT_PXP_CTRL, 0x1},
1372 {OP_WR_ASIC, XSDM_REG_TIMER_TICK, 0x3e8},
1373 {OP_WR_EMUL, XSDM_REG_TIMER_TICK, 0x1},
1374 {OP_WR_FPGA, XSDM_REG_TIMER_TICK, 0xa},
1375#define XSDM_COMMON_END 1156
1376#define QM_COMMON_START 1156
1377 {OP_WR, QM_REG_ACTCTRINITVAL_0, 0x6},
1378 {OP_WR, QM_REG_ACTCTRINITVAL_1, 0x5},
1379 {OP_WR, QM_REG_ACTCTRINITVAL_2, 0xa},
1380 {OP_WR, QM_REG_ACTCTRINITVAL_3, 0x5},
1381 {OP_WR, QM_REG_PCIREQAT, 0x2},
1382 {OP_WR, QM_REG_CMINITCRD_0, 0x4},
1383 {OP_WR, QM_REG_CMINITCRD_1, 0x4},
1384 {OP_WR, QM_REG_CMINITCRD_2, 0x4},
1385 {OP_WR, QM_REG_CMINITCRD_3, 0x4},
1386 {OP_WR, QM_REG_CMINITCRD_4, 0x4},
1387 {OP_WR, QM_REG_CMINITCRD_5, 0x4},
1388 {OP_WR, QM_REG_CMINITCRD_6, 0x4},
1389 {OP_WR, QM_REG_CMINITCRD_7, 0x4},
1390 {OP_WR, QM_REG_OUTLDREQ, 0x4},
1391 {OP_WR, QM_REG_CTXREG_0, 0x7c},
1392 {OP_WR, QM_REG_CTXREG_1, 0x3d},
1393 {OP_WR, QM_REG_CTXREG_2, 0x3f},
1394 {OP_WR, QM_REG_CTXREG_3, 0x9c},
1395 {OP_WR, QM_REG_ENSEC, 0x7},
1396 {OP_ZR, QM_REG_QVOQIDX_0, 0x5},
1397 {OP_WR, QM_REG_WRRWEIGHTS_0, 0x1010101},
1398 {OP_WR, QM_REG_QVOQIDX_5, 0x0},
1399 {OP_WR, QM_REG_QVOQIDX_6, 0x4},
1400 {OP_WR, QM_REG_QVOQIDX_7, 0x4},
1401 {OP_WR, QM_REG_QVOQIDX_8, 0x2},
1402 {OP_WR, QM_REG_WRRWEIGHTS_1, 0x8012004},
1403 {OP_WR, QM_REG_QVOQIDX_9, 0x5},
1404 {OP_WR, QM_REG_QVOQIDX_10, 0x5},
1405 {OP_WR, QM_REG_QVOQIDX_11, 0x5},
1406 {OP_WR, QM_REG_QVOQIDX_12, 0x5},
1407 {OP_WR, QM_REG_WRRWEIGHTS_2, 0x20081001},
1408 {OP_WR, QM_REG_QVOQIDX_13, 0x8},
1409 {OP_WR, QM_REG_QVOQIDX_14, 0x6},
1410 {OP_WR, QM_REG_QVOQIDX_15, 0x7},
1411 {OP_WR, QM_REG_QVOQIDX_16, 0x0},
1412 {OP_WR, QM_REG_WRRWEIGHTS_3, 0x1010120},
1413 {OP_ZR, QM_REG_QVOQIDX_17, 0x4},
1414 {OP_WR, QM_REG_WRRWEIGHTS_4, 0x1010101},
1415 {OP_ZR_E1, QM_REG_QVOQIDX_21, 0x4},
1416 {OP_WR_E1H, QM_REG_QVOQIDX_21, 0x0},
1417 {OP_WR_E1, QM_REG_WRRWEIGHTS_5, 0x1010101},
1418 {OP_WR_E1H, QM_REG_QVOQIDX_22, 0x4},
1419 {OP_ZR_E1, QM_REG_QVOQIDX_25, 0x4},
1420 {OP_WR_E1H, QM_REG_QVOQIDX_23, 0x4},
1421 {OP_WR_E1, QM_REG_WRRWEIGHTS_6, 0x1010101},
1422 {OP_WR_E1H, QM_REG_QVOQIDX_24, 0x2},
1423 {OP_ZR_E1, QM_REG_QVOQIDX_29, 0x3},
1424 {OP_WR_E1H, QM_REG_WRRWEIGHTS_5, 0x8012004},
1425 {OP_WR_E1H, QM_REG_QVOQIDX_25, 0x5},
1426 {OP_WR_E1H, QM_REG_QVOQIDX_26, 0x5},
1427 {OP_WR_E1H, QM_REG_QVOQIDX_27, 0x5},
1428 {OP_WR_E1H, QM_REG_QVOQIDX_28, 0x5},
1429 {OP_WR_E1H, QM_REG_WRRWEIGHTS_6, 0x20081001},
1430 {OP_WR_E1H, QM_REG_QVOQIDX_29, 0x8},
1431 {OP_WR_E1H, QM_REG_QVOQIDX_30, 0x6},
1432 {OP_WR_E1H, QM_REG_QVOQIDX_31, 0x7},
1433 {OP_WR, QM_REG_QVOQIDX_32, 0x1},
1434 {OP_WR_E1, QM_REG_WRRWEIGHTS_7, 0x1010101},
1435 {OP_WR_E1H, QM_REG_WRRWEIGHTS_7, 0x1010120},
1436 {OP_WR, QM_REG_QVOQIDX_33, 0x1},
1437 {OP_WR, QM_REG_QVOQIDX_34, 0x1},
1438 {OP_WR, QM_REG_QVOQIDX_35, 0x1},
1439 {OP_WR, QM_REG_QVOQIDX_36, 0x1},
1440 {OP_WR, QM_REG_WRRWEIGHTS_8, 0x1010101},
1441 {OP_WR, QM_REG_QVOQIDX_37, 0x1},
1442 {OP_WR, QM_REG_QVOQIDX_38, 0x4},
1443 {OP_WR, QM_REG_QVOQIDX_39, 0x4},
1444 {OP_WR, QM_REG_QVOQIDX_40, 0x2},
1445 {OP_WR, QM_REG_WRRWEIGHTS_9, 0x8012004},
1446 {OP_WR, QM_REG_QVOQIDX_41, 0x5},
1447 {OP_WR, QM_REG_QVOQIDX_42, 0x5},
1448 {OP_WR, QM_REG_QVOQIDX_43, 0x5},
1449 {OP_WR, QM_REG_QVOQIDX_44, 0x5},
1450 {OP_WR, QM_REG_WRRWEIGHTS_10, 0x20081001},
1451 {OP_WR, QM_REG_QVOQIDX_45, 0x8},
1452 {OP_WR, QM_REG_QVOQIDX_46, 0x6},
1453 {OP_WR, QM_REG_QVOQIDX_47, 0x7},
1454 {OP_WR, QM_REG_QVOQIDX_48, 0x1},
1455 {OP_WR, QM_REG_WRRWEIGHTS_11, 0x1010120},
1456 {OP_WR, QM_REG_QVOQIDX_49, 0x1},
1457 {OP_WR, QM_REG_QVOQIDX_50, 0x1},
1458 {OP_WR, QM_REG_QVOQIDX_51, 0x1},
1459 {OP_WR, QM_REG_QVOQIDX_52, 0x1},
1460 {OP_WR, QM_REG_WRRWEIGHTS_12, 0x1010101},
1461 {OP_WR, QM_REG_QVOQIDX_53, 0x1},
1462 {OP_WR_E1, QM_REG_QVOQIDX_54, 0x1},
1463 {OP_WR_E1H, QM_REG_QVOQIDX_54, 0x4},
1464 {OP_WR_E1, QM_REG_QVOQIDX_55, 0x1},
1465 {OP_WR_E1H, QM_REG_QVOQIDX_55, 0x4},
1466 {OP_WR_E1, QM_REG_QVOQIDX_56, 0x1},
1467 {OP_WR_E1H, QM_REG_QVOQIDX_56, 0x2},
1468 {OP_WR_E1, QM_REG_WRRWEIGHTS_13, 0x1010101},
1469 {OP_WR_E1H, QM_REG_WRRWEIGHTS_13, 0x8012004},
1470 {OP_WR_E1, QM_REG_QVOQIDX_57, 0x1},
1471 {OP_WR_E1H, QM_REG_QVOQIDX_57, 0x5},
1472 {OP_WR_E1, QM_REG_QVOQIDX_58, 0x1},
1473 {OP_WR_E1H, QM_REG_QVOQIDX_58, 0x5},
1474 {OP_WR_E1, QM_REG_QVOQIDX_59, 0x1},
1475 {OP_WR_E1H, QM_REG_QVOQIDX_59, 0x5},
1476 {OP_WR_E1, QM_REG_QVOQIDX_60, 0x1},
1477 {OP_WR_E1H, QM_REG_QVOQIDX_60, 0x5},
1478 {OP_WR_E1, QM_REG_WRRWEIGHTS_14, 0x1010101},
1479 {OP_WR_E1H, QM_REG_WRRWEIGHTS_14, 0x20081001},
1480 {OP_WR_E1, QM_REG_QVOQIDX_61, 0x1},
1481 {OP_WR_E1H, QM_REG_QVOQIDX_61, 0x8},
1482 {OP_WR_E1, QM_REG_QVOQIDX_62, 0x1},
1483 {OP_WR_E1H, QM_REG_QVOQIDX_62, 0x6},
1484 {OP_WR_E1, QM_REG_QVOQIDX_63, 0x1},
1485 {OP_WR_E1H, QM_REG_QVOQIDX_63, 0x7},
1486 {OP_WR_E1, QM_REG_WRRWEIGHTS_15, 0x1010101},
1487 {OP_WR_E1H, QM_REG_QVOQIDX_64, 0x0},
1488 {OP_WR_E1, QM_REG_VOQQMASK_0_LSB, 0xffff003f},
1489 {OP_WR_E1H, QM_REG_WRRWEIGHTS_15, 0x1010120},
1490 {OP_ZR_E1, QM_REG_VOQQMASK_0_MSB, 0x2},
1491 {OP_ZR_E1H, QM_REG_QVOQIDX_65, 0x4},
1492 {OP_WR_E1, QM_REG_VOQQMASK_1_MSB, 0xffff003f},
1493 {OP_WR_E1H, QM_REG_WRRWEIGHTS_16, 0x1010101},
1494 {OP_WR_E1, QM_REG_VOQQMASK_2_LSB, 0x100},
1495 {OP_WR_E1H, QM_REG_QVOQIDX_69, 0x0},
1496 {OP_WR_E1, QM_REG_VOQQMASK_2_MSB, 0x100},
1497 {OP_WR_E1H, QM_REG_QVOQIDX_70, 0x4},
1498 {OP_WR_E1H, QM_REG_QVOQIDX_71, 0x4},
1499 {OP_WR_E1H, QM_REG_QVOQIDX_72, 0x2},
1500 {OP_WR_E1H, QM_REG_WRRWEIGHTS_17, 0x8012004},
1501 {OP_WR_E1H, QM_REG_QVOQIDX_73, 0x5},
1502 {OP_WR_E1H, QM_REG_QVOQIDX_74, 0x5},
1503 {OP_WR_E1H, QM_REG_QVOQIDX_75, 0x5},
1504 {OP_WR_E1H, QM_REG_QVOQIDX_76, 0x5},
1505 {OP_WR_E1H, QM_REG_WRRWEIGHTS_18, 0x20081001},
1506 {OP_WR_E1H, QM_REG_QVOQIDX_77, 0x8},
1507 {OP_WR_E1H, QM_REG_QVOQIDX_78, 0x6},
1508 {OP_WR_E1H, QM_REG_QVOQIDX_79, 0x7},
1509 {OP_WR_E1H, QM_REG_QVOQIDX_80, 0x0},
1510 {OP_WR_E1H, QM_REG_WRRWEIGHTS_19, 0x1010120},
1511 {OP_ZR_E1H, QM_REG_QVOQIDX_81, 0x4},
1512 {OP_WR_E1H, QM_REG_WRRWEIGHTS_20, 0x1010101},
1513 {OP_WR_E1H, QM_REG_QVOQIDX_85, 0x0},
1514 {OP_WR_E1H, QM_REG_QVOQIDX_86, 0x4},
1515 {OP_WR_E1H, QM_REG_QVOQIDX_87, 0x4},
1516 {OP_WR_E1H, QM_REG_QVOQIDX_88, 0x2},
1517 {OP_WR_E1H, QM_REG_WRRWEIGHTS_21, 0x8012004},
1518 {OP_WR_E1H, QM_REG_QVOQIDX_89, 0x5},
1519 {OP_WR_E1H, QM_REG_QVOQIDX_90, 0x5},
1520 {OP_WR_E1H, QM_REG_QVOQIDX_91, 0x5},
1521 {OP_WR_E1H, QM_REG_QVOQIDX_92, 0x5},
1522 {OP_WR_E1H, QM_REG_WRRWEIGHTS_22, 0x20081001},
1523 {OP_WR_E1H, QM_REG_QVOQIDX_93, 0x8},
1524 {OP_WR_E1H, QM_REG_QVOQIDX_94, 0x6},
1525 {OP_WR_E1H, QM_REG_QVOQIDX_95, 0x7},
1526 {OP_WR_E1H, QM_REG_QVOQIDX_96, 0x1},
1527 {OP_WR_E1H, QM_REG_WRRWEIGHTS_23, 0x1010120},
1528 {OP_WR_E1H, QM_REG_QVOQIDX_97, 0x1},
1529 {OP_WR_E1H, QM_REG_QVOQIDX_98, 0x1},
1530 {OP_WR_E1H, QM_REG_QVOQIDX_99, 0x1},
1531 {OP_WR_E1H, QM_REG_QVOQIDX_100, 0x1},
1532 {OP_WR_E1H, QM_REG_WRRWEIGHTS_24, 0x1010101},
1533 {OP_WR_E1H, QM_REG_QVOQIDX_101, 0x1},
1534 {OP_WR_E1H, QM_REG_QVOQIDX_102, 0x4},
1535 {OP_WR_E1H, QM_REG_QVOQIDX_103, 0x4},
1536 {OP_WR_E1H, QM_REG_QVOQIDX_104, 0x2},
1537 {OP_WR_E1H, QM_REG_WRRWEIGHTS_25, 0x8012004},
1538 {OP_WR_E1H, QM_REG_QVOQIDX_105, 0x5},
1539 {OP_WR_E1H, QM_REG_QVOQIDX_106, 0x5},
1540 {OP_WR_E1H, QM_REG_QVOQIDX_107, 0x5},
1541 {OP_WR_E1H, QM_REG_QVOQIDX_108, 0x5},
1542 {OP_WR_E1H, QM_REG_WRRWEIGHTS_26, 0x20081001},
1543 {OP_WR_E1H, QM_REG_QVOQIDX_109, 0x8},
1544 {OP_WR_E1H, QM_REG_QVOQIDX_110, 0x6},
1545 {OP_WR_E1H, QM_REG_QVOQIDX_111, 0x7},
1546 {OP_WR_E1H, QM_REG_QVOQIDX_112, 0x1},
1547 {OP_WR_E1H, QM_REG_WRRWEIGHTS_27, 0x1010120},
1548 {OP_WR_E1H, QM_REG_QVOQIDX_113, 0x1},
1549 {OP_WR_E1H, QM_REG_QVOQIDX_114, 0x1},
1550 {OP_WR_E1H, QM_REG_QVOQIDX_115, 0x1},
1551 {OP_WR_E1H, QM_REG_QVOQIDX_116, 0x1},
1552 {OP_WR_E1H, QM_REG_WRRWEIGHTS_28, 0x1010101},
1553 {OP_WR_E1H, QM_REG_QVOQIDX_117, 0x1},
1554 {OP_WR_E1H, QM_REG_QVOQIDX_118, 0x4},
1555 {OP_WR_E1H, QM_REG_QVOQIDX_119, 0x4},
1556 {OP_WR_E1H, QM_REG_QVOQIDX_120, 0x2},
1557 {OP_WR_E1H, QM_REG_WRRWEIGHTS_29, 0x8012004},
1558 {OP_WR_E1H, QM_REG_QVOQIDX_121, 0x5},
1559 {OP_WR_E1H, QM_REG_QVOQIDX_122, 0x5},
1560 {OP_WR_E1H, QM_REG_QVOQIDX_123, 0x5},
1561 {OP_WR_E1H, QM_REG_QVOQIDX_124, 0x5},
1562 {OP_WR_E1H, QM_REG_WRRWEIGHTS_30, 0x20081001},
1563 {OP_WR_E1H, QM_REG_QVOQIDX_125, 0x8},
1564 {OP_WR_E1H, QM_REG_QVOQIDX_126, 0x6},
1565 {OP_WR_E1H, QM_REG_QVOQIDX_127, 0x7},
1566 {OP_WR_E1H, QM_REG_WRRWEIGHTS_31, 0x1010120},
1567 {OP_WR_E1H, QM_REG_VOQQMASK_0_LSB, 0x3f003f},
1568 {OP_WR_E1H, QM_REG_VOQQMASK_0_MSB, 0x0},
1569 {OP_WR_E1H, QM_REG_VOQQMASK_0_LSB_EXT_A, 0x3f003f},
1570 {OP_WR_E1H, QM_REG_VOQQMASK_0_MSB_EXT_A, 0x0},
1571 {OP_WR_E1H, QM_REG_VOQQMASK_1_LSB, 0x0},
1572 {OP_WR_E1H, QM_REG_VOQQMASK_1_MSB, 0x3f003f},
1573 {OP_WR_E1H, QM_REG_VOQQMASK_1_LSB_EXT_A, 0x0},
1574 {OP_WR_E1H, QM_REG_VOQQMASK_1_MSB_EXT_A, 0x3f003f},
1575 {OP_WR_E1H, QM_REG_VOQQMASK_2_LSB, 0x1000100},
1576 {OP_WR_E1H, QM_REG_VOQQMASK_2_MSB, 0x1000100},
1577 {OP_WR_E1H, QM_REG_VOQQMASK_2_LSB_EXT_A, 0x1000100},
1578 {OP_WR_E1H, QM_REG_VOQQMASK_2_MSB_EXT_A, 0x1000100},
1579 {OP_ZR, QM_REG_VOQQMASK_3_LSB, 0x2},
1580 {OP_WR_E1, QM_REG_VOQQMASK_4_LSB, 0xc0},
1581 {OP_WR_E1H, QM_REG_VOQQMASK_3_LSB_EXT_A, 0x0},
1582 {OP_WR_E1, QM_REG_VOQQMASK_4_MSB, 0xc0},
1583 {OP_WR_E1H, QM_REG_VOQQMASK_3_MSB_EXT_A, 0x0},
1584 {OP_WR_E1, QM_REG_VOQQMASK_5_LSB, 0x1e00},
1585 {OP_WR_E1H, QM_REG_VOQQMASK_4_LSB, 0xc000c0},
1586 {OP_WR_E1, QM_REG_VOQQMASK_5_MSB, 0x1e00},
1587 {OP_WR_E1H, QM_REG_VOQQMASK_4_MSB, 0xc000c0},
1588 {OP_WR_E1, QM_REG_VOQQMASK_6_LSB, 0x4000},
1589 {OP_WR_E1H, QM_REG_VOQQMASK_4_LSB_EXT_A, 0xc000c0},
1590 {OP_WR_E1, QM_REG_VOQQMASK_6_MSB, 0x4000},
1591 {OP_WR_E1H, QM_REG_VOQQMASK_4_MSB_EXT_A, 0xc000c0},
1592 {OP_WR_E1, QM_REG_VOQQMASK_7_LSB, 0x8000},
1593 {OP_WR_E1H, QM_REG_VOQQMASK_5_LSB, 0x1e001e00},
1594 {OP_WR_E1, QM_REG_VOQQMASK_7_MSB, 0x8000},
1595 {OP_WR_E1H, QM_REG_VOQQMASK_5_MSB, 0x1e001e00},
1596 {OP_WR_E1, QM_REG_VOQQMASK_8_LSB, 0x2000},
1597 {OP_WR_E1H, QM_REG_VOQQMASK_5_LSB_EXT_A, 0x1e001e00},
1598 {OP_WR_E1, QM_REG_VOQQMASK_8_MSB, 0x2000},
1599 {OP_WR_E1H, QM_REG_VOQQMASK_5_MSB_EXT_A, 0x1e001e00},
1600 {OP_ZR_E1, QM_REG_VOQQMASK_9_LSB, 0x7},
1601 {OP_WR_E1H, QM_REG_VOQQMASK_6_LSB, 0x40004000},
1602 {OP_WR_E1H, QM_REG_VOQQMASK_6_MSB, 0x40004000},
1603 {OP_WR_E1H, QM_REG_VOQQMASK_6_LSB_EXT_A, 0x40004000},
1604 {OP_WR_E1H, QM_REG_VOQQMASK_6_MSB_EXT_A, 0x40004000},
1605 {OP_WR_E1H, QM_REG_VOQQMASK_7_LSB, 0x80008000},
1606 {OP_WR_E1H, QM_REG_VOQQMASK_7_MSB, 0x80008000},
1607 {OP_WR_E1H, QM_REG_VOQQMASK_7_LSB_EXT_A, 0x80008000},
1608 {OP_WR_E1H, QM_REG_VOQQMASK_7_MSB_EXT_A, 0x80008000},
1609 {OP_WR_E1H, QM_REG_VOQQMASK_8_LSB, 0x20002000},
1610 {OP_WR_E1H, QM_REG_VOQQMASK_8_MSB, 0x20002000},
1611 {OP_WR_E1H, QM_REG_VOQQMASK_8_LSB_EXT_A, 0x20002000},
1612 {OP_WR_E1H, QM_REG_VOQQMASK_8_MSB_EXT_A, 0x20002000},
1613 {OP_ZR_E1H, QM_REG_VOQQMASK_9_LSB, 0x2},
1614 {OP_WR_E1H, QM_REG_VOQQMASK_9_LSB_EXT_A, 0x0},
1615 {OP_WR_E1H, QM_REG_VOQQMASK_9_MSB_EXT_A, 0x0},
1616 {OP_WR_E1H, QM_REG_VOQQMASK_10_LSB, 0x0},
1617 {OP_WR_E1H, QM_REG_VOQQMASK_10_MSB, 0x0},
1618 {OP_WR_E1H, QM_REG_VOQQMASK_10_LSB_EXT_A, 0x0},
1619 {OP_WR_E1H, QM_REG_VOQQMASK_10_MSB_EXT_A, 0x0},
1620 {OP_WR_E1H, QM_REG_VOQQMASK_11_LSB, 0x0},
1621 {OP_WR_E1H, QM_REG_VOQQMASK_11_MSB, 0x0},
1622 {OP_WR_E1H, QM_REG_VOQQMASK_11_LSB_EXT_A, 0x0},
1623 {OP_WR_E1H, QM_REG_VOQQMASK_11_MSB_EXT_A, 0x0},
1624 {OP_WR_E1H, QM_REG_VOQPORT_0, 0x0},
1625 {OP_WR, QM_REG_VOQPORT_1, 0x1},
1626 {OP_ZR, QM_REG_VOQPORT_2, 0xa},
1627 {OP_WR, QM_REG_CMINTVOQMASK_0, 0xc08},
1628 {OP_WR, QM_REG_CMINTVOQMASK_1, 0x40},
1629 {OP_WR, QM_REG_CMINTVOQMASK_2, 0x100},
1630 {OP_WR, QM_REG_CMINTVOQMASK_3, 0x20},
1631 {OP_WR, QM_REG_CMINTVOQMASK_4, 0x17},
1632 {OP_WR, QM_REG_CMINTVOQMASK_5, 0x80},
1633 {OP_WR, QM_REG_CMINTVOQMASK_6, 0x200},
1634 {OP_WR, QM_REG_CMINTVOQMASK_7, 0x0},
1635 {OP_WR_E1, QM_REG_HWAEMPTYMASK_LSB, 0xffff01ff},
1636 {OP_WR_E1H, QM_REG_HWAEMPTYMASK_LSB, 0x1ff01ff},
1637 {OP_WR_E1, QM_REG_HWAEMPTYMASK_MSB, 0xffff01ff},
1638 {OP_WR_E1H, QM_REG_HWAEMPTYMASK_MSB, 0x1ff01ff},
1639 {OP_WR_E1H, QM_REG_HWAEMPTYMASK_LSB_EXT_A, 0x1ff01ff},
1640 {OP_WR_E1H, QM_REG_HWAEMPTYMASK_MSB_EXT_A, 0x1ff01ff},
1641 {OP_WR, QM_REG_ENBYPVOQMASK, 0x13},
1642 {OP_WR, QM_REG_VOQCREDITAFULLTHR, 0x13f},
1643 {OP_WR, QM_REG_VOQINITCREDIT_0, 0x140},
1644 {OP_WR, QM_REG_VOQINITCREDIT_1, 0x140},
1645 {OP_ZR, QM_REG_VOQINITCREDIT_2, 0x2},
1646 {OP_WR, QM_REG_VOQINITCREDIT_4, 0xc0},
1647 {OP_ZR, QM_REG_VOQINITCREDIT_5, 0x7},
1648 {OP_WR, QM_REG_TASKCRDCOST_0, 0x48},
1649 {OP_WR, QM_REG_TASKCRDCOST_1, 0x48},
1650 {OP_ZR, QM_REG_TASKCRDCOST_2, 0x2},
1651 {OP_WR, QM_REG_TASKCRDCOST_4, 0x48},
1652 {OP_ZR, QM_REG_TASKCRDCOST_5, 0x7},
1653 {OP_WR, QM_REG_BYTECRDINITVAL, 0x8000},
1654 {OP_WR, QM_REG_BYTECRDCOST, 0x25e4},
1655 {OP_WR, QM_REG_BYTECREDITAFULLTHR, 0x7fff},
1656 {OP_WR_E1, QM_REG_ENBYTECRD_LSB, 0x7},
1657 {OP_WR_E1H, QM_REG_ENBYTECRD_LSB, 0x70007},
1658 {OP_WR_E1, QM_REG_ENBYTECRD_MSB, 0x7},
1659 {OP_WR_E1H, QM_REG_ENBYTECRD_MSB, 0x70007},
1660 {OP_WR_E1H, QM_REG_ENBYTECRD_LSB_EXT_A, 0x70007},
1661 {OP_WR_E1H, QM_REG_ENBYTECRD_MSB_EXT_A, 0x70007},
1662 {OP_WR, QM_REG_BYTECRDPORT_LSB, 0x0},
1663 {OP_WR, QM_REG_BYTECRDPORT_MSB, 0xffffffff},
1664 {OP_WR_E1, QM_REG_FUNCNUMSEL_LSB, 0x0},
1665 {OP_WR_E1H, QM_REG_BYTECRDPORT_LSB_EXT_A, 0x0},
1666 {OP_WR_E1, QM_REG_FUNCNUMSEL_MSB, 0xffffffff},
1667 {OP_WR_E1H, QM_REG_BYTECRDPORT_MSB_EXT_A, 0xffffffff},
1668 {OP_WR_E1H, QM_REG_PQ2PCIFUNC_0, 0x0},
1669 {OP_WR_E1H, QM_REG_PQ2PCIFUNC_1, 0x2},
1670 {OP_WR_E1H, QM_REG_PQ2PCIFUNC_2, 0x1},
1671 {OP_WR_E1H, QM_REG_PQ2PCIFUNC_3, 0x3},
1672 {OP_WR_E1H, QM_REG_PQ2PCIFUNC_4, 0x4},
1673 {OP_WR_E1H, QM_REG_PQ2PCIFUNC_5, 0x6},
1674 {OP_WR_E1H, QM_REG_PQ2PCIFUNC_6, 0x5},
1675 {OP_WR_E1H, QM_REG_PQ2PCIFUNC_7, 0x7},
1676 {OP_WR, QM_REG_CMINTEN, 0xff},
1677#define QM_COMMON_END 1456
1678#define PBF_COMMON_START 1456
1679 {OP_WR, PBF_REG_INIT, 0x1},
1680 {OP_WR, PBF_REG_INIT_P4, 0x1},
1681 {OP_WR, PBF_REG_MAC_LB_ENABLE, 0x1},
1682 {OP_WR, PBF_REG_IF_ENABLE_REG, 0x7fff},
1683 {OP_WR, PBF_REG_INIT_P4, 0x0},
1684 {OP_WR, PBF_REG_INIT, 0x0},
1685 {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P4, 0x0},
1686#define PBF_COMMON_END 1463
1687#define PBF_PORT0_START 1463
1688 {OP_WR, PBF_REG_INIT_P0, 0x1},
1689 {OP_WR, PBF_REG_MAC_IF0_ENABLE, 0x1},
1690 {OP_WR, PBF_REG_INIT_P0, 0x0},
1691 {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P0, 0x0},
1692#define PBF_PORT0_END 1467
1693#define PBF_PORT1_START 1467
1694 {OP_WR, PBF_REG_INIT_P1, 0x1},
1695 {OP_WR, PBF_REG_MAC_IF1_ENABLE, 0x1},
1696 {OP_WR, PBF_REG_INIT_P1, 0x0},
1697 {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P1, 0x0},
1698#define PBF_PORT1_END 1471
1699#define XCM_COMMON_START 1471
1700 {OP_WR, XCM_REG_XX_OVFL_EVNT_ID, 0x32},
1701 {OP_WR, XCM_REG_XQM_XCM_HDR_P, 0x3150020},
1702 {OP_WR, XCM_REG_XQM_XCM_HDR_S, 0x3150020},
1703 {OP_WR, XCM_REG_TM_XCM_HDR, 0x1000030},
1704 {OP_WR, XCM_REG_ERR_XCM_HDR, 0x8100000},
1705 {OP_WR, XCM_REG_ERR_EVNT_ID, 0x33},
1706 {OP_WR, XCM_REG_EXPR_EVNT_ID, 0x30},
1707 {OP_WR, XCM_REG_STOP_EVNT_ID, 0x31},
1708 {OP_WR, XCM_REG_STORM_WEIGHT, 0x3},
1709 {OP_WR, XCM_REG_TSEM_WEIGHT, 0x6},
1710 {OP_WR, XCM_REG_CSEM_WEIGHT, 0x3},
1711 {OP_WR, XCM_REG_USEM_WEIGHT, 0x3},
1712 {OP_WR, XCM_REG_DORQ_WEIGHT, 0x2},
1713 {OP_WR, XCM_REG_PBF_WEIGHT, 0x0},
1714 {OP_WR, XCM_REG_NIG0_WEIGHT, 0x2},
1715 {OP_WR, XCM_REG_CP_WEIGHT, 0x0},
1716 {OP_WR, XCM_REG_XSDM_WEIGHT, 0x6},
1717 {OP_WR, XCM_REG_XQM_P_WEIGHT, 0x4},
1718 {OP_WR, XCM_REG_XQM_S_WEIGHT, 0x2},
1719 {OP_WR, XCM_REG_TM_WEIGHT, 0x2},
1720 {OP_WR, XCM_REG_XCM_XQM_USE_Q, 0x1},
1721 {OP_WR, XCM_REG_XQM_BYP_ACT_UPD, 0x6},
1722 {OP_WR, XCM_REG_UNA_GT_NXT_Q, 0x0},
1723 {OP_WR, XCM_REG_AUX1_Q, 0x2},
1724 {OP_WR, XCM_REG_AUX_CNT_FLG_Q_19, 0x1},
1725 {OP_WR, XCM_REG_GR_ARB_TYPE, 0x1},
1726 {OP_WR, XCM_REG_GR_LD0_PR, 0x1},
1727 {OP_WR, XCM_REG_GR_LD1_PR, 0x2},
1728 {OP_WR, XCM_REG_CFC_INIT_CRD, 0x1},
1729 {OP_WR, XCM_REG_FIC0_INIT_CRD, 0x40},
1730 {OP_WR, XCM_REG_FIC1_INIT_CRD, 0x40},
1731 {OP_WR, XCM_REG_TM_INIT_CRD, 0x4},
1732 {OP_WR, XCM_REG_XQM_INIT_CRD, 0x20},
1733 {OP_WR, XCM_REG_XX_INIT_CRD, 0x2},
1734 {OP_WR_E1, XCM_REG_XX_MSG_NUM, 0x1f},
1735 {OP_WR_E1H, XCM_REG_XX_MSG_NUM, 0x20},
1736 {OP_ZR, XCM_REG_XX_TABLE, 0x12},
1737 {OP_SW_E1, XCM_REG_XX_DESCR_TABLE, 0x1f02d4},
1738 {OP_SW_E1H, XCM_REG_XX_DESCR_TABLE, 0x1f0329},
1739 {OP_WR, XCM_REG_N_SM_CTX_LD_0, 0xf},
1740 {OP_WR, XCM_REG_N_SM_CTX_LD_1, 0x7},
1741 {OP_WR, XCM_REG_N_SM_CTX_LD_2, 0xb},
1742 {OP_WR, XCM_REG_N_SM_CTX_LD_3, 0xe},
1743 {OP_ZR_E1, XCM_REG_N_SM_CTX_LD_4, 0x4},
1744 {OP_WR_E1H, XCM_REG_N_SM_CTX_LD_4, 0xe},
1745 {OP_ZR_E1H, XCM_REG_N_SM_CTX_LD_5, 0x3},
1746 {OP_WR, XCM_REG_XCM_REG0_SZ, 0x4},
1747 {OP_WR, XCM_REG_XCM_STORM0_IFEN, 0x1},
1748 {OP_WR, XCM_REG_XCM_STORM1_IFEN, 0x1},
1749 {OP_WR, XCM_REG_XCM_XQM_IFEN, 0x1},
1750 {OP_WR, XCM_REG_STORM_XCM_IFEN, 0x1},
1751 {OP_WR, XCM_REG_XQM_XCM_IFEN, 0x1},
1752 {OP_WR, XCM_REG_XSDM_IFEN, 0x1},
1753 {OP_WR, XCM_REG_TM_XCM_IFEN, 0x1},
1754 {OP_WR, XCM_REG_XCM_TM_IFEN, 0x1},
1755 {OP_WR, XCM_REG_TSEM_IFEN, 0x1},
1756 {OP_WR, XCM_REG_CSEM_IFEN, 0x1},
1757 {OP_WR, XCM_REG_USEM_IFEN, 0x1},
1758 {OP_WR, XCM_REG_DORQ_IFEN, 0x1},
1759 {OP_WR, XCM_REG_PBF_IFEN, 0x1},
1760 {OP_WR, XCM_REG_NIG0_IFEN, 0x1},
1761 {OP_WR, XCM_REG_NIG1_IFEN, 0x1},
1762 {OP_WR, XCM_REG_CDU_AG_WR_IFEN, 0x1},
1763 {OP_WR, XCM_REG_CDU_AG_RD_IFEN, 0x1},
1764 {OP_WR, XCM_REG_CDU_SM_WR_IFEN, 0x1},
1765 {OP_WR, XCM_REG_CDU_SM_RD_IFEN, 0x1},
1766 {OP_WR, XCM_REG_XCM_CFC_IFEN, 0x1},
1767#define XCM_COMMON_END 1538
1768#define XCM_PORT0_START 1538
1769 {OP_WR_E1, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8},
1770 {OP_WR_E1, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2},
1771 {OP_WR_E1, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0},
1772 {OP_WR_E1, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0},
1773 {OP_WR_E1, XCM_REG_WU_DA_CNT_CMD00, 0x2},
1774 {OP_WR_E1, XCM_REG_WU_DA_CNT_CMD10, 0x2},
1775 {OP_WR_E1, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff},
1776 {OP_WR_E1, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff},
1777#define XCM_PORT0_END 1546
1778#define XCM_PORT1_START 1546
1779 {OP_WR_E1, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8},
1780 {OP_WR_E1, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2},
1781 {OP_WR_E1, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0},
1782 {OP_WR_E1, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0},
1783 {OP_WR_E1, XCM_REG_WU_DA_CNT_CMD01, 0x2},
1784 {OP_WR_E1, XCM_REG_WU_DA_CNT_CMD11, 0x2},
1785 {OP_WR_E1, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff},
1786 {OP_WR_E1, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff},
1787#define XCM_PORT1_END 1554
1788#define XCM_FUNC0_START 1554
1789 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8},
1790 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2},
1791 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0},
1792 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0},
1793 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD00, 0x2},
1794 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD10, 0x2},
1795 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff},
1796 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff},
1797 {OP_WR_E1H, XCM_REG_PHYS_QNUM3_0, 0x0},
1798#define XCM_FUNC0_END 1563
1799#define XCM_FUNC1_START 1563
1800 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8},
1801 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2},
1802 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0},
1803 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0},
1804 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD01, 0x2},
1805 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD11, 0x2},
1806 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff},
1807 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff},
1808 {OP_WR_E1H, XCM_REG_PHYS_QNUM3_1, 0x0},
1809#define XCM_FUNC1_END 1572
1810#define XCM_FUNC2_START 1572
1811 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8},
1812 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2},
1813 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0},
1814 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0},
1815 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD00, 0x2},
1816 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD10, 0x2},
1817 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff},
1818 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff},
1819 {OP_WR_E1H, XCM_REG_PHYS_QNUM3_0, 0x0},
1820#define XCM_FUNC2_END 1581
1821#define XCM_FUNC3_START 1581
1822 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8},
1823 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2},
1824 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0},
1825 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0},
1826 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD01, 0x2},
1827 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD11, 0x2},
1828 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff},
1829 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff},
1830 {OP_WR_E1H, XCM_REG_PHYS_QNUM3_1, 0x0},
1831#define XCM_FUNC3_END 1590
1832#define XCM_FUNC4_START 1590
1833 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8},
1834 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2},
1835 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0},
1836 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0},
1837 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD00, 0x2},
1838 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD10, 0x2},
1839 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff},
1840 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff},
1841 {OP_WR_E1H, XCM_REG_PHYS_QNUM3_0, 0x0},
1842#define XCM_FUNC4_END 1599
1843#define XCM_FUNC5_START 1599
1844 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8},
1845 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2},
1846 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0},
1847 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0},
1848 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD01, 0x2},
1849 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD11, 0x2},
1850 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff},
1851 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff},
1852 {OP_WR_E1H, XCM_REG_PHYS_QNUM3_1, 0x0},
1853#define XCM_FUNC5_END 1608
1854#define XCM_FUNC6_START 1608
1855 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8},
1856 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2},
1857 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0},
1858 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0},
1859 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD00, 0x2},
1860 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD10, 0x2},
1861 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff},
1862 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff},
1863 {OP_WR_E1H, XCM_REG_PHYS_QNUM3_0, 0x0},
1864#define XCM_FUNC6_END 1617
1865#define XCM_FUNC7_START 1617
1866 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8},
1867 {OP_WR_E1H, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2},
1868 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0},
1869 {OP_WR_E1H, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0},
1870 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD01, 0x2},
1871 {OP_WR_E1H, XCM_REG_WU_DA_CNT_CMD11, 0x2},
1872 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff},
1873 {OP_WR_E1H, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff},
1874 {OP_WR_E1H, XCM_REG_PHYS_QNUM3_1, 0x0},
1875#define XCM_FUNC7_END 1626
1876#define XSEM_COMMON_START 1626
1877 {OP_RD, XSEM_REG_MSG_NUM_FIC0, 0x0},
1878 {OP_RD, XSEM_REG_MSG_NUM_FIC1, 0x0},
1879 {OP_RD, XSEM_REG_MSG_NUM_FOC0, 0x0},
1880 {OP_RD, XSEM_REG_MSG_NUM_FOC1, 0x0},
1881 {OP_RD, XSEM_REG_MSG_NUM_FOC2, 0x0},
1882 {OP_RD, XSEM_REG_MSG_NUM_FOC3, 0x0},
1883 {OP_WR, XSEM_REG_ARB_ELEMENT0, 0x1},
1884 {OP_WR, XSEM_REG_ARB_ELEMENT1, 0x2},
1885 {OP_WR, XSEM_REG_ARB_ELEMENT2, 0x3},
1886 {OP_WR, XSEM_REG_ARB_ELEMENT3, 0x0},
1887 {OP_WR, XSEM_REG_ARB_ELEMENT4, 0x4},
1888 {OP_WR, XSEM_REG_ARB_CYCLE_SIZE, 0x1},
1889 {OP_WR, XSEM_REG_TS_0_AS, 0x0},
1890 {OP_WR, XSEM_REG_TS_1_AS, 0x1},
1891 {OP_WR, XSEM_REG_TS_2_AS, 0x4},
1892 {OP_WR, XSEM_REG_TS_3_AS, 0x0},
1893 {OP_WR, XSEM_REG_TS_4_AS, 0x1},
1894 {OP_WR, XSEM_REG_TS_5_AS, 0x3},
1895 {OP_WR, XSEM_REG_TS_6_AS, 0x0},
1896 {OP_WR, XSEM_REG_TS_7_AS, 0x1},
1897 {OP_WR, XSEM_REG_TS_8_AS, 0x4},
1898 {OP_WR, XSEM_REG_TS_9_AS, 0x0},
1899 {OP_WR, XSEM_REG_TS_10_AS, 0x1},
1900 {OP_WR, XSEM_REG_TS_11_AS, 0x3},
1901 {OP_WR, XSEM_REG_TS_12_AS, 0x0},
1902 {OP_WR, XSEM_REG_TS_13_AS, 0x1},
1903 {OP_WR, XSEM_REG_TS_14_AS, 0x4},
1904 {OP_WR, XSEM_REG_TS_15_AS, 0x0},
1905 {OP_WR, XSEM_REG_TS_16_AS, 0x4},
1906 {OP_WR, XSEM_REG_TS_17_AS, 0x3},
1907 {OP_ZR, XSEM_REG_TS_18_AS, 0x2},
1908 {OP_WR, XSEM_REG_ENABLE_IN, 0x3fff},
1909 {OP_WR, XSEM_REG_ENABLE_OUT, 0x3ff},
1910 {OP_WR, XSEM_REG_FIC0_DISABLE, 0x0},
1911 {OP_WR, XSEM_REG_FIC1_DISABLE, 0x0},
1912 {OP_WR, XSEM_REG_PAS_DISABLE, 0x0},
1913 {OP_WR, XSEM_REG_THREADS_LIST, 0xffff},
1914 {OP_ZR, XSEM_REG_PASSIVE_BUFFER, 0x800},
1915 {OP_WR, XSEM_REG_FAST_MEMORY + 0x18bc0, 0x1},
1916 {OP_WR, XSEM_REG_FAST_MEMORY + 0x18000, 0x0},
1917 {OP_WR, XSEM_REG_FAST_MEMORY + 0x18040, 0x18},
1918 {OP_WR, XSEM_REG_FAST_MEMORY + 0x18080, 0xc},
1919 {OP_WR, XSEM_REG_FAST_MEMORY + 0x180c0, 0x66},
1920 {OP_WR_ASIC, XSEM_REG_FAST_MEMORY + 0x18300, 0x7a120},
1921 {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x18300, 0x138},
1922 {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18300, 0x1388},
1923 {OP_WR, XSEM_REG_FAST_MEMORY + 0x183c0, 0x1f4},
1924 {OP_WR_ASIC, XSEM_REG_FAST_MEMORY + 0x18340, 0x1f4},
1925 {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x18340, 0x0},
1926 {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18340, 0x5},
1927 {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x18380, 0x4c4b4},
1928 {OP_WR_ASIC, XSEM_REG_FAST_MEMORY + 0x18380, 0x1dcd6500},
1929 {OP_WR_EMUL_E1H, XSEM_REG_FAST_MEMORY + 0x11480, 0x0},
1930 {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18380, 0x4c4b40},
1931 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3d60, 0x4},
1932 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x11480, 0x1},
1933 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3d60 + 0x10, 0x202f3},
1934 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x29c8, 0x4},
1935 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3000, 0x48},
1936 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x29c8 + 0x10, 0x20348},
1937 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x1020, 0xc8},
1938 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x2080, 0x48},
1939 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x1000, 0x2},
1940 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x9020, 0xc8},
1941 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3128, 0x8e},
1942 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x9000, 0x2},
1943 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x3368, 0x0},
1944 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x21a8, 0x86},
1945 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3370, 0x202f5},
1946 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x2000, 0x20},
1947 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3b90, 0x402f7},
1948 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x23c8, 0x0},
1949 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3e20, 0x202fb},
1950 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x23d0, 0x2034a},
1951 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x1518, 0x1},
1952 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2498, 0x4034c},
1953 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x1830, 0x0},
1954 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x2c20, 0x0},
1955 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x1838, 0x0},
1956 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x2c10, 0x0},
1957 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x1820, 0x202fd},
1958 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2c08, 0x20350},
1959 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4ac0, 0x2},
1960 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x3010, 0x1},
1961 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4b00, 0x4},
1962 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x4040, 0x10},
1963 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x1f48, 0x202ff},
1964 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x4000, 0x100352},
1965 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6ac0, 0x2},
1966 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6b00, 0x4},
1967 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x8408, 0x20362},
1968 {OP_WR, XSEM_REG_FAST_MEMORY + 0x10800, 0x0},
1969 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x10c00, 0x100301},
1970 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x10c00, 0x100364},
1971 {OP_WR, XSEM_REG_FAST_MEMORY + 0x10800, 0x1000000},
1972 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x10c40, 0x80311},
1973 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x10c40, 0x80374},
1974 {OP_WR, XSEM_REG_FAST_MEMORY + 0x10800, 0x2000000},
1975 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x10c60, 0x80319},
1976 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x10c60, 0x8037c},
1977 {OP_ZP_E1, XSEM_REG_INT_TABLE, 0xb50000},
1978 {OP_ZP_E1H, XSEM_REG_INT_TABLE, 0xbd0000},
1979 {OP_WR_64_E1, XSEM_REG_INT_TABLE + 0x368, 0x130321},
1980 {OP_WR_64_E1H, XSEM_REG_INT_TABLE + 0x3a8, 0xb0384},
1981 {OP_ZP_E1, XSEM_REG_PRAM, 0x33660000},
1982 {OP_ZP_E1H, XSEM_REG_PRAM, 0x34060000},
1983 {OP_ZP_E1, XSEM_REG_PRAM + 0x8000, 0x38b30cda},
1984 {OP_ZP_E1H, XSEM_REG_PRAM + 0x8000, 0x37960d02},
1985 {OP_ZP_E1, XSEM_REG_PRAM + 0x10000, 0x3bb11b07},
1986 {OP_ZP_E1H, XSEM_REG_PRAM + 0x10000, 0x3bc31ae8},
1987 {OP_ZP_E1, XSEM_REG_PRAM + 0x18000, 0x2a2629f4},
1988 {OP_ZP_E1H, XSEM_REG_PRAM + 0x18000, 0x382629d9},
1989 {OP_WR_64_E1, XSEM_REG_PRAM + 0x1d6c0, 0x45280323},
1990 {OP_ZP_E1H, XSEM_REG_PRAM + 0x20000, 0x124537e3},
1991 {OP_WR_64_E1H, XSEM_REG_PRAM + 0x22220, 0x3bbc0386},
1992#define XSEM_COMMON_END 1741
1993#define XSEM_PORT0_START 1741
1994 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3ba0, 0x14},
1995 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xc000, 0xfc},
1996 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3c40, 0x24},
1997 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x24a8, 0x14},
1998 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x1400, 0xa},
1999 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x2548, 0x24},
2000 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x1450, 0x6},
2001 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x2668, 0x24},
2002 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3378, 0xfc},
2003 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x2788, 0x24},
2004 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x3b58, 0x0},
2005 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x28a8, 0x24},
2006 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3d78, 0x20325},
2007 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xa000, 0x28},
2008 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3d88, 0x100327},
2009 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xa140, 0xc},
2010 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x1500, 0x0},
2011 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x29e0, 0x20388},
2012 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x1508, 0x1},
2013 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x3000, 0x1},
2014 {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5020, 0x2},
2015 {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5030, 0x2},
2016 {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5000, 0x2},
2017 {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5010, 0x2},
2018 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x5040, 0x0},
2019 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x5208, 0x1},
2020 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x5048, 0xe},
2021 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x6ac8, 0x2038a},
2022 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x50b8, 0x1},
2023 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6b10, 0x42},
2024 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x4ac8, 0x20337},
2025 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6d20, 0x4},
2026 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4b10, 0x42},
2027 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4d20, 0x4},
2028#define XSEM_PORT0_END 1775
2029#define XSEM_PORT1_START 1775
2030 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3bf0, 0x14},
2031 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xc3f0, 0xfc},
2032 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3cd0, 0x24},
2033 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x24f8, 0x14},
2034 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x1428, 0xa},
2035 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x25d8, 0x24},
2036 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x1468, 0x6},
2037 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x26f8, 0x24},
2038 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x3768, 0xfc},
2039 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x2818, 0x24},
2040 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x3b5c, 0x0},
2041 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x2938, 0x24},
2042 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3d80, 0x20339},
2043 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xa0a0, 0x28},
2044 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x3dc8, 0x10033b},
2045 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0xa170, 0xc},
2046 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x1504, 0x0},
2047 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x29e8, 0x2038c},
2048 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x150c, 0x1},
2049 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x3004, 0x1},
2050 {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5028, 0x2},
2051 {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5038, 0x2},
2052 {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5008, 0x2},
2053 {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5018, 0x2},
2054 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x5044, 0x0},
2055 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0x520c, 0x1},
2056 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x5080, 0xe},
2057 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x6ad0, 0x2038e},
2058 {OP_WR_E1, XSEM_REG_FAST_MEMORY + 0x50bc, 0x1},
2059 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6c18, 0x42},
2060 {OP_SW_E1, XSEM_REG_FAST_MEMORY + 0x4ad0, 0x2034b},
2061 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x6d30, 0x4},
2062 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4c18, 0x42},
2063 {OP_ZR_E1, XSEM_REG_FAST_MEMORY + 0x4d30, 0x4},
2064#define XSEM_PORT1_END 1809
2065#define XSEM_FUNC0_START 1809
2066 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7e0, 0x0},
2067 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x29f0, 0x100390},
2068 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x5048, 0xe},
2069#define XSEM_FUNC0_END 1812
2070#define XSEM_FUNC1_START 1812
2071 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7e4, 0x0},
2072 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2a30, 0x1003a0},
2073 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x5080, 0xe},
2074#define XSEM_FUNC1_END 1815
2075#define XSEM_FUNC2_START 1815
2076 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7e8, 0x0},
2077 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2a70, 0x1003b0},
2078 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x50b8, 0xe},
2079#define XSEM_FUNC2_END 1818
2080#define XSEM_FUNC3_START 1818
2081 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7ec, 0x0},
2082 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2ab0, 0x1003c0},
2083 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x50f0, 0xe},
2084#define XSEM_FUNC3_END 1821
2085#define XSEM_FUNC4_START 1821
2086 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7f0, 0x0},
2087 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2af0, 0x1003d0},
2088 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x5128, 0xe},
2089#define XSEM_FUNC4_END 1824
2090#define XSEM_FUNC5_START 1824
2091 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7f4, 0x0},
2092 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2b30, 0x1003e0},
2093 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x5160, 0xe},
2094#define XSEM_FUNC5_END 1827
2095#define XSEM_FUNC6_START 1827
2096 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7f8, 0x0},
2097 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2b70, 0x1003f0},
2098 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x5198, 0xe},
2099#define XSEM_FUNC6_END 1830
2100#define XSEM_FUNC7_START 1830
2101 {OP_WR_E1H, XSEM_REG_FAST_MEMORY + 0xc7fc, 0x0},
2102 {OP_SW_E1H, XSEM_REG_FAST_MEMORY + 0x2bb0, 0x100400},
2103 {OP_ZR_E1H, XSEM_REG_FAST_MEMORY + 0x51d0, 0xe},
2104#define XSEM_FUNC7_END 1833
2105#define CDU_COMMON_START 1833
2106 {OP_WR, CDU_REG_CDU_CONTROL0, 0x1},
2107 {OP_WR_E1H, CDU_REG_MF_MODE, 0x1},
2108 {OP_WR, CDU_REG_CDU_CHK_MASK0, 0x3d000},
2109 {OP_WR, CDU_REG_CDU_CHK_MASK1, 0x3d},
2110 {OP_WB_E1, CDU_REG_L1TT, 0x200034d},
2111 {OP_WB_E1H, CDU_REG_L1TT, 0x2000410},
2112 {OP_WB_E1, CDU_REG_MATT, 0x20054d},
2113 {OP_WB_E1H, CDU_REG_MATT, 0x280610},
2114 {OP_ZR_E1, CDU_REG_MATT + 0x80, 0x2},
2115 {OP_WB_E1, CDU_REG_MATT + 0x88, 0x6056d},
2116 {OP_ZR, CDU_REG_MATT + 0xa0, 0x18},
2117#define CDU_COMMON_END 1844
2118#define DMAE_COMMON_START 1844
2119 {OP_ZR, DMAE_REG_CMD_MEM, 0xe0},
2120 {OP_WR, DMAE_REG_CRC16C_INIT, 0x0},
2121 {OP_WR, DMAE_REG_CRC16T10_INIT, 0x1},
2122 {OP_WR_E1, DMAE_REG_PXP_REQ_INIT_CRD, 0x1},
2123 {OP_WR_E1H, DMAE_REG_PXP_REQ_INIT_CRD, 0x2},
2124 {OP_WR, DMAE_REG_PCI_IFEN, 0x1},
2125 {OP_WR, DMAE_REG_GRC_IFEN, 0x1},
2126#define DMAE_COMMON_END 1851
2127#define PXP_COMMON_START 1851
2128 {OP_WB_E1, PXP_REG_HST_INBOUND_INT + 0x400, 0x50573},
2129 {OP_WB_E1H, PXP_REG_HST_INBOUND_INT + 0x400, 0x50638},
2130 {OP_WB_E1, PXP_REG_HST_INBOUND_INT + 0x420, 0x50578},
2131 {OP_WB_E1H, PXP_REG_HST_INBOUND_INT, 0x5063d},
2132 {OP_WB_E1, PXP_REG_HST_INBOUND_INT, 0x5057d},
2133 {OP_WB_E1H, PXP_REG_HST_INBOUND_INT + 0x20, 0x50642},
2134#define PXP_COMMON_END 1857
2135#define CFC_COMMON_START 1857
2136 {OP_ZR_E1H, CFC_REG_LINK_LIST, 0x100},
2137 {OP_WR, CFC_REG_CONTROL0, 0x10},
2138 {OP_WR, CFC_REG_DISABLE_ON_ERROR, 0x3fff},
2139 {OP_WR, CFC_REG_INTERFACES, 0x280000},
2140 {OP_WR, CFC_REG_LCREQ_WEIGHTS, 0x84924a},
2141 {OP_WR, CFC_REG_INTERFACES, 0x0},
2142#define CFC_COMMON_END 1863
2143#define HC_COMMON_START 1863
2144 {OP_ZR_E1, HC_REG_USTORM_ADDR_FOR_COALESCE, 0x4},
2145#define HC_COMMON_END 1864
2146#define HC_PORT0_START 1864
2147 {OP_WR_E1, HC_REG_CONFIG_0, 0x1080},
2148 {OP_ZR_E1, HC_REG_UC_RAM_ADDR_0, 0x2},
2149 {OP_WR_E1, HC_REG_ATTN_NUM_P0, 0x10},
2150 {OP_WR_E1, HC_REG_LEADING_EDGE_0, 0xffff},
2151 {OP_WR_E1, HC_REG_TRAILING_EDGE_0, 0xffff},
2152 {OP_WR_E1, HC_REG_AGG_INT_0, 0x0},
2153 {OP_WR_E1, HC_REG_ATTN_IDX, 0x0},
2154 {OP_ZR_E1, HC_REG_ATTN_BIT, 0x2},
2155 {OP_WR_E1, HC_REG_VQID_0, 0x2b5},
2156 {OP_WR_E1, HC_REG_PCI_CONFIG_0, 0x0},
2157 {OP_ZR_E1, HC_REG_P0_PROD_CONS, 0x4a},
2158 {OP_WR_E1, HC_REG_INT_MASK, 0x1ffff},
2159 {OP_ZR_E1, HC_REG_PBA_COMMAND, 0x2},
2160 {OP_WR_E1, HC_REG_CONFIG_0, 0x1a80},
2161 {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS, 0x24},
2162 {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a},
2163 {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a},
2164 {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a},
2165#define HC_PORT0_END 1882
2166#define HC_PORT1_START 1882
2167 {OP_WR_E1, HC_REG_CONFIG_1, 0x1080},
2168 {OP_ZR_E1, HC_REG_UC_RAM_ADDR_1, 0x2},
2169 {OP_WR_E1, HC_REG_ATTN_NUM_P1, 0x10},
2170 {OP_WR_E1, HC_REG_LEADING_EDGE_1, 0xffff},
2171 {OP_WR_E1, HC_REG_TRAILING_EDGE_1, 0xffff},
2172 {OP_WR_E1, HC_REG_AGG_INT_1, 0x0},
2173 {OP_WR_E1, HC_REG_ATTN_IDX + 0x4, 0x0},
2174 {OP_ZR_E1, HC_REG_ATTN_BIT + 0x8, 0x2},
2175 {OP_WR_E1, HC_REG_VQID_1, 0x2b5},
2176 {OP_WR_E1, HC_REG_PCI_CONFIG_1, 0x0},
2177 {OP_ZR_E1, HC_REG_P1_PROD_CONS, 0x4a},
2178 {OP_WR_E1, HC_REG_INT_MASK + 0x4, 0x1ffff},
2179 {OP_ZR_E1, HC_REG_PBA_COMMAND + 0x8, 0x2},
2180 {OP_WR_E1, HC_REG_CONFIG_1, 0x1a80},
2181 {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x90, 0x24},
2182 {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a},
2183 {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a},
2184 {OP_ZR_E1, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a},
2185#define HC_PORT1_END 1900
2186#define HC_FUNC0_START 1900
2187 {OP_WR_E1H, HC_REG_CONFIG_0, 0x1080},
2188 {OP_WR_E1H, HC_REG_FUNC_NUM_P0, 0x0},
2189 {OP_WR_E1H, HC_REG_ATTN_NUM_P0, 0x10},
2190 {OP_WR_E1H, HC_REG_ATTN_IDX, 0x0},
2191 {OP_ZR_E1H, HC_REG_ATTN_BIT, 0x2},
2192 {OP_WR_E1H, HC_REG_VQID_0, 0x2b5},
2193 {OP_WR_E1H, HC_REG_PCI_CONFIG_0, 0x0},
2194 {OP_ZR_E1H, HC_REG_P0_PROD_CONS, 0x4a},
2195 {OP_WR_E1H, HC_REG_INT_MASK, 0x1ffff},
2196 {OP_ZR_E1H, HC_REG_PBA_COMMAND, 0x2},
2197 {OP_WR_E1H, HC_REG_CONFIG_0, 0x1a80},
2198 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS, 0x24},
2199 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a},
2200 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a},
2201 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a},
2202#define HC_FUNC0_END 1915
2203#define HC_FUNC1_START 1915
2204 {OP_WR_E1H, HC_REG_CONFIG_1, 0x1080},
2205 {OP_WR_E1H, HC_REG_FUNC_NUM_P1, 0x1},
2206 {OP_WR_E1H, HC_REG_ATTN_NUM_P1, 0x10},
2207 {OP_WR_E1H, HC_REG_ATTN_IDX + 0x4, 0x0},
2208 {OP_ZR_E1H, HC_REG_ATTN_BIT + 0x8, 0x2},
2209 {OP_WR_E1H, HC_REG_VQID_1, 0x2b5},
2210 {OP_WR_E1H, HC_REG_PCI_CONFIG_1, 0x0},
2211 {OP_ZR_E1H, HC_REG_P1_PROD_CONS, 0x4a},
2212 {OP_WR_E1H, HC_REG_INT_MASK + 0x4, 0x1ffff},
2213 {OP_ZR_E1H, HC_REG_PBA_COMMAND + 0x8, 0x2},
2214 {OP_WR_E1H, HC_REG_CONFIG_1, 0x1a80},
2215 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x90, 0x24},
2216 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a},
2217 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a},
2218 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a},
2219#define HC_FUNC1_END 1930
2220#define HC_FUNC2_START 1930
2221 {OP_WR_E1H, HC_REG_CONFIG_0, 0x1080},
2222 {OP_WR_E1H, HC_REG_FUNC_NUM_P0, 0x2},
2223 {OP_WR_E1H, HC_REG_ATTN_NUM_P0, 0x10},
2224 {OP_WR_E1H, HC_REG_ATTN_IDX, 0x0},
2225 {OP_ZR_E1H, HC_REG_ATTN_BIT, 0x2},
2226 {OP_WR_E1H, HC_REG_VQID_0, 0x2b5},
2227 {OP_WR_E1H, HC_REG_PCI_CONFIG_0, 0x0},
2228 {OP_ZR_E1H, HC_REG_P0_PROD_CONS, 0x4a},
2229 {OP_WR_E1H, HC_REG_INT_MASK, 0x1ffff},
2230 {OP_ZR_E1H, HC_REG_PBA_COMMAND, 0x2},
2231 {OP_WR_E1H, HC_REG_CONFIG_0, 0x1a80},
2232 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS, 0x24},
2233 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a},
2234 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a},
2235 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a},
2236#define HC_FUNC2_END 1945
2237#define HC_FUNC3_START 1945
2238 {OP_WR_E1H, HC_REG_CONFIG_1, 0x1080},
2239 {OP_WR_E1H, HC_REG_FUNC_NUM_P1, 0x3},
2240 {OP_WR_E1H, HC_REG_ATTN_NUM_P1, 0x10},
2241 {OP_WR_E1H, HC_REG_ATTN_IDX + 0x4, 0x0},
2242 {OP_ZR_E1H, HC_REG_ATTN_BIT + 0x8, 0x2},
2243 {OP_WR_E1H, HC_REG_VQID_1, 0x2b5},
2244 {OP_WR_E1H, HC_REG_PCI_CONFIG_1, 0x0},
2245 {OP_ZR_E1H, HC_REG_P1_PROD_CONS, 0x4a},
2246 {OP_WR_E1H, HC_REG_INT_MASK + 0x4, 0x1ffff},
2247 {OP_ZR_E1H, HC_REG_PBA_COMMAND + 0x8, 0x2},
2248 {OP_WR_E1H, HC_REG_CONFIG_1, 0x1a80},
2249 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x90, 0x24},
2250 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a},
2251 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a},
2252 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a},
2253#define HC_FUNC3_END 1960
2254#define HC_FUNC4_START 1960
2255 {OP_WR_E1H, HC_REG_CONFIG_0, 0x1080},
2256 {OP_WR_E1H, HC_REG_FUNC_NUM_P0, 0x4},
2257 {OP_WR_E1H, HC_REG_ATTN_NUM_P0, 0x10},
2258 {OP_WR_E1H, HC_REG_ATTN_IDX, 0x0},
2259 {OP_ZR_E1H, HC_REG_ATTN_BIT, 0x2},
2260 {OP_WR_E1H, HC_REG_VQID_0, 0x2b5},
2261 {OP_WR_E1H, HC_REG_PCI_CONFIG_0, 0x0},
2262 {OP_ZR_E1H, HC_REG_P0_PROD_CONS, 0x4a},
2263 {OP_WR_E1H, HC_REG_INT_MASK, 0x1ffff},
2264 {OP_ZR_E1H, HC_REG_PBA_COMMAND, 0x2},
2265 {OP_WR_E1H, HC_REG_CONFIG_0, 0x1a80},
2266 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS, 0x24},
2267 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a},
2268 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a},
2269 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a},
2270#define HC_FUNC4_END 1975
2271#define HC_FUNC5_START 1975
2272 {OP_WR_E1H, HC_REG_CONFIG_1, 0x1080},
2273 {OP_WR_E1H, HC_REG_FUNC_NUM_P1, 0x5},
2274 {OP_WR_E1H, HC_REG_ATTN_NUM_P1, 0x10},
2275 {OP_WR_E1H, HC_REG_ATTN_IDX + 0x4, 0x0},
2276 {OP_ZR_E1H, HC_REG_ATTN_BIT + 0x8, 0x2},
2277 {OP_WR_E1H, HC_REG_VQID_1, 0x2b5},
2278 {OP_WR_E1H, HC_REG_PCI_CONFIG_1, 0x0},
2279 {OP_ZR_E1H, HC_REG_P1_PROD_CONS, 0x4a},
2280 {OP_WR_E1H, HC_REG_INT_MASK + 0x4, 0x1ffff},
2281 {OP_ZR_E1H, HC_REG_PBA_COMMAND + 0x8, 0x2},
2282 {OP_WR_E1H, HC_REG_CONFIG_1, 0x1a80},
2283 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x90, 0x24},
2284 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a},
2285 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a},
2286 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a},
2287#define HC_FUNC5_END 1990
2288#define HC_FUNC6_START 1990
2289 {OP_WR_E1H, HC_REG_CONFIG_0, 0x1080},
2290 {OP_WR_E1H, HC_REG_FUNC_NUM_P0, 0x6},
2291 {OP_WR_E1H, HC_REG_ATTN_NUM_P0, 0x10},
2292 {OP_WR_E1H, HC_REG_ATTN_IDX, 0x0},
2293 {OP_ZR_E1H, HC_REG_ATTN_BIT, 0x2},
2294 {OP_WR_E1H, HC_REG_VQID_0, 0x2b5},
2295 {OP_WR_E1H, HC_REG_PCI_CONFIG_0, 0x0},
2296 {OP_ZR_E1H, HC_REG_P0_PROD_CONS, 0x4a},
2297 {OP_WR_E1H, HC_REG_INT_MASK, 0x1ffff},
2298 {OP_ZR_E1H, HC_REG_PBA_COMMAND, 0x2},
2299 {OP_WR_E1H, HC_REG_CONFIG_0, 0x1a80},
2300 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS, 0x24},
2301 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a},
2302 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a},
2303 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a},
2304#define HC_FUNC6_END 2005
2305#define HC_FUNC7_START 2005
2306 {OP_WR_E1H, HC_REG_CONFIG_1, 0x1080},
2307 {OP_WR_E1H, HC_REG_FUNC_NUM_P1, 0x7},
2308 {OP_WR_E1H, HC_REG_ATTN_NUM_P1, 0x10},
2309 {OP_WR_E1H, HC_REG_ATTN_IDX + 0x4, 0x0},
2310 {OP_ZR_E1H, HC_REG_ATTN_BIT + 0x8, 0x2},
2311 {OP_WR_E1H, HC_REG_VQID_1, 0x2b5},
2312 {OP_WR_E1H, HC_REG_PCI_CONFIG_1, 0x0},
2313 {OP_ZR_E1H, HC_REG_P1_PROD_CONS, 0x4a},
2314 {OP_WR_E1H, HC_REG_INT_MASK + 0x4, 0x1ffff},
2315 {OP_ZR_E1H, HC_REG_PBA_COMMAND + 0x8, 0x2},
2316 {OP_WR_E1H, HC_REG_CONFIG_1, 0x1a80},
2317 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x90, 0x24},
2318 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a},
2319 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a},
2320 {OP_ZR_E1H, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a},
2321#define HC_FUNC7_END 2020
2322#define PXP2_COMMON_START 2020
2323 {OP_WR_E1H, PXP2_REG_RQ_DRAM_ALIGN, 0x1},
2324 {OP_WR, PXP2_REG_PGL_CONTROL0, 0xe38340},
2325 {OP_WR, PXP2_REG_PGL_CONTROL1, 0x3c10},
2326 {OP_WR_E1H, PXP2_REG_RQ_ELT_DISABLE, 0x1},
2327 {OP_WR_E1H, PXP2_REG_WR_REV_MODE, 0x0},
2328 {OP_WR, PXP2_REG_PGL_INT_TSDM_0, 0xffffffff},
2329 {OP_WR, PXP2_REG_PGL_INT_TSDM_1, 0xffffffff},
2330 {OP_WR, PXP2_REG_PGL_INT_TSDM_2, 0xffffffff},
2331 {OP_WR, PXP2_REG_PGL_INT_TSDM_3, 0xffffffff},
2332 {OP_WR, PXP2_REG_PGL_INT_TSDM_4, 0xffffffff},
2333 {OP_WR, PXP2_REG_PGL_INT_TSDM_5, 0xffffffff},
2334 {OP_WR, PXP2_REG_PGL_INT_TSDM_6, 0xffffffff},
2335 {OP_WR, PXP2_REG_PGL_INT_TSDM_7, 0xffffffff},
2336 {OP_WR_E1, PXP2_REG_PGL_INT_USDM_1, 0xffffffff},
2337 {OP_WR, PXP2_REG_PGL_INT_USDM_2, 0xffffffff},
2338 {OP_WR, PXP2_REG_PGL_INT_USDM_3, 0xffffffff},
2339 {OP_WR, PXP2_REG_PGL_INT_USDM_4, 0xffffffff},
2340 {OP_WR, PXP2_REG_PGL_INT_USDM_5, 0xffffffff},
2341 {OP_WR, PXP2_REG_PGL_INT_USDM_6, 0xffffffff},
2342 {OP_WR, PXP2_REG_PGL_INT_USDM_7, 0xffffffff},
2343 {OP_WR_E1H, PXP2_REG_PGL_INT_XSDM_1, 0xffffffff},
2344 {OP_WR, PXP2_REG_PGL_INT_XSDM_2, 0xffffffff},
2345 {OP_WR, PXP2_REG_PGL_INT_XSDM_3, 0xffffffff},
2346 {OP_WR, PXP2_REG_PGL_INT_XSDM_4, 0xffffffff},
2347 {OP_WR, PXP2_REG_PGL_INT_XSDM_5, 0xffffffff},
2348 {OP_WR, PXP2_REG_PGL_INT_XSDM_6, 0xffffffff},
2349 {OP_WR, PXP2_REG_PGL_INT_XSDM_7, 0xffffffff},
2350 {OP_WR, PXP2_REG_PGL_INT_CSDM_0, 0xffffffff},
2351 {OP_WR, PXP2_REG_PGL_INT_CSDM_1, 0xffffffff},
2352 {OP_WR, PXP2_REG_PGL_INT_CSDM_2, 0xffffffff},
2353 {OP_WR, PXP2_REG_PGL_INT_CSDM_3, 0xffffffff},
2354 {OP_WR, PXP2_REG_PGL_INT_CSDM_4, 0xffffffff},
2355 {OP_WR, PXP2_REG_PGL_INT_CSDM_5, 0xffffffff},
2356 {OP_WR, PXP2_REG_PGL_INT_CSDM_6, 0xffffffff},
2357 {OP_WR, PXP2_REG_PGL_INT_CSDM_7, 0xffffffff},
2358 {OP_WR_E1, PXP2_REG_PGL_INT_XSDM_0, 0xffff3330},
2359 {OP_WR_E1H, PXP2_REG_PGL_INT_XSDM_0, 0xff802000},
2360 {OP_WR_E1, PXP2_REG_PGL_INT_XSDM_1, 0xffff3340},
2361 {OP_WR_E1H, PXP2_REG_PGL_INT_USDM_0, 0xf0005000},
2362 {OP_WR_E1, PXP2_REG_PGL_INT_USDM_0, 0xf0003000},
2363 {OP_WR_E1H, PXP2_REG_PGL_INT_USDM_1, 0xf0008000},
2364 {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ6, 0x8},
2365 {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ9, 0x8},
2366 {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ10, 0x8},
2367 {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ11, 0x2},
2368 {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ17, 0x4},
2369 {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ18, 0x5},
2370 {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ19, 0x4},
2371 {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ22, 0x0},
2372 {OP_WR, PXP2_REG_RD_START_INIT, 0x1},
2373 {OP_WR, PXP2_REG_WR_DMAE_TH, 0x3f},
2374 {OP_WR, PXP2_REG_RQ_BW_RD_ADD0, 0x40},
2375 {OP_WR, PXP2_REG_PSWRQ_BW_ADD1, 0x1808},
2376 {OP_WR, PXP2_REG_PSWRQ_BW_ADD2, 0x803},
2377 {OP_WR, PXP2_REG_PSWRQ_BW_ADD3, 0x803},
2378 {OP_WR, PXP2_REG_RQ_BW_RD_ADD4, 0x40},
2379 {OP_WR, PXP2_REG_RQ_BW_RD_ADD5, 0x3},
2380 {OP_WR, PXP2_REG_PSWRQ_BW_ADD6, 0x803},
2381 {OP_WR, PXP2_REG_PSWRQ_BW_ADD7, 0x803},
2382 {OP_WR, PXP2_REG_PSWRQ_BW_ADD8, 0x803},
2383 {OP_WR, PXP2_REG_PSWRQ_BW_ADD9, 0x10003},
2384 {OP_WR, PXP2_REG_PSWRQ_BW_ADD10, 0x803},
2385 {OP_WR, PXP2_REG_PSWRQ_BW_ADD11, 0x803},
2386 {OP_WR, PXP2_REG_RQ_BW_RD_ADD12, 0x3},
2387 {OP_WR, PXP2_REG_RQ_BW_RD_ADD13, 0x3},
2388 {OP_WR, PXP2_REG_RQ_BW_RD_ADD14, 0x3},
2389 {OP_WR, PXP2_REG_RQ_BW_RD_ADD15, 0x3},
2390 {OP_WR, PXP2_REG_RQ_BW_RD_ADD16, 0x3},
2391 {OP_WR, PXP2_REG_RQ_BW_RD_ADD17, 0x3},
2392 {OP_WR, PXP2_REG_RQ_BW_RD_ADD18, 0x3},
2393 {OP_WR, PXP2_REG_RQ_BW_RD_ADD19, 0x3},
2394 {OP_WR, PXP2_REG_RQ_BW_RD_ADD20, 0x3},
2395 {OP_WR, PXP2_REG_RQ_BW_RD_ADD22, 0x3},
2396 {OP_WR, PXP2_REG_RQ_BW_RD_ADD23, 0x3},
2397 {OP_WR, PXP2_REG_RQ_BW_RD_ADD24, 0x3},
2398 {OP_WR, PXP2_REG_RQ_BW_RD_ADD25, 0x3},
2399 {OP_WR, PXP2_REG_RQ_BW_RD_ADD26, 0x3},
2400 {OP_WR, PXP2_REG_RQ_BW_RD_ADD27, 0x3},
2401 {OP_WR, PXP2_REG_PSWRQ_BW_ADD28, 0x2403},
2402 {OP_WR, PXP2_REG_RQ_BW_WR_ADD29, 0x2f},
2403 {OP_WR, PXP2_REG_RQ_BW_WR_ADD30, 0x9},
2404 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND0, 0x19},
2405 {OP_WR, PXP2_REG_PSWRQ_BW_UB1, 0x184},
2406 {OP_WR, PXP2_REG_PSWRQ_BW_UB2, 0x183},
2407 {OP_WR, PXP2_REG_PSWRQ_BW_UB3, 0x306},
2408 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND4, 0x19},
2409 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND5, 0x6},
2410 {OP_WR, PXP2_REG_PSWRQ_BW_UB6, 0x306},
2411 {OP_WR, PXP2_REG_PSWRQ_BW_UB7, 0x306},
2412 {OP_WR, PXP2_REG_PSWRQ_BW_UB8, 0x306},
2413 {OP_WR, PXP2_REG_PSWRQ_BW_UB9, 0xc86},
2414 {OP_WR, PXP2_REG_PSWRQ_BW_UB10, 0x306},
2415 {OP_WR, PXP2_REG_PSWRQ_BW_UB11, 0x306},
2416 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND12, 0x6},
2417 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND13, 0x6},
2418 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND14, 0x6},
2419 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND15, 0x6},
2420 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND16, 0x6},
2421 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND17, 0x6},
2422 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND18, 0x6},
2423 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND19, 0x6},
2424 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND20, 0x6},
2425 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND22, 0x6},
2426 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND23, 0x6},
2427 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND24, 0x6},
2428 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND25, 0x6},
2429 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND26, 0x6},
2430 {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND27, 0x6},
2431 {OP_WR, PXP2_REG_PSWRQ_BW_UB28, 0x306},
2432 {OP_WR, PXP2_REG_RQ_BW_WR_UBOUND29, 0x13},
2433 {OP_WR, PXP2_REG_RQ_BW_WR_UBOUND30, 0x6},
2434 {OP_WR, PXP2_REG_PSWRQ_BW_L1, 0x1004},
2435 {OP_WR, PXP2_REG_PSWRQ_BW_L2, 0x1004},
2436 {OP_WR, PXP2_REG_PSWRQ_BW_RD, 0x106440},
2437 {OP_WR, PXP2_REG_PSWRQ_BW_WR, 0x106440},
2438 {OP_WR_E1H, PXP2_REG_RQ_ILT_MODE, 0x1},
2439 {OP_WR, PXP2_REG_RQ_RBC_DONE, 0x1},
2440#define PXP2_COMMON_END 2137
2441#define MISC_AEU_COMMON_START 2137
2442 {OP_ZR, MISC_REG_AEU_GENERAL_ATTN_0, 0x16},
2443 {OP_WR_E1H, MISC_REG_AEU_ENABLE1_NIG_0, 0x55540000},
2444 {OP_WR_E1H, MISC_REG_AEU_ENABLE2_NIG_0, 0x55555555},
2445 {OP_WR_E1H, MISC_REG_AEU_ENABLE3_NIG_0, 0x5555},
2446 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_NIG_0, 0xf0000000},
2447 {OP_WR_E1H, MISC_REG_AEU_ENABLE1_PXP_0, 0x55540000},
2448 {OP_WR_E1H, MISC_REG_AEU_ENABLE2_PXP_0, 0x55555555},
2449 {OP_WR_E1H, MISC_REG_AEU_ENABLE3_PXP_0, 0x5555},
2450 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_PXP_0, 0xf0000000},
2451 {OP_WR_E1H, MISC_REG_AEU_ENABLE1_NIG_1, 0x55540000},
2452 {OP_WR_E1H, MISC_REG_AEU_ENABLE2_NIG_1, 0x55555555},
2453 {OP_WR_E1H, MISC_REG_AEU_ENABLE3_NIG_1, 0x5555},
2454 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_NIG_1, 0xf0000000},
2455 {OP_WR_E1H, MISC_REG_AEU_ENABLE1_PXP_1, 0x0},
2456 {OP_WR_E1H, MISC_REG_AEU_ENABLE2_PXP_1, 0x10000},
2457 {OP_WR_E1H, MISC_REG_AEU_ENABLE3_PXP_1, 0x5014},
2458 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_PXP_1, 0x0},
2459 {OP_WR_E1H, MISC_REG_AEU_CLR_LATCH_SIGNAL, 0xc00},
2460 {OP_WR_E1H, MISC_REG_AEU_GENERAL_MASK, 0x3},
2461#define MISC_AEU_COMMON_END 2156
2462#define MISC_AEU_PORT0_START 2156
2463 {OP_WR_E1, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0, 0xbf5c0000},
2464 {OP_WR_E1H, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0, 0xff5c0000},
2465 {OP_WR_E1, MISC_REG_AEU_ENABLE2_FUNC_0_OUT_0, 0xfff51fef},
2466 {OP_WR_E1H, MISC_REG_AEU_ENABLE2_FUNC_0_OUT_0, 0xfff55fff},
2467 {OP_WR, MISC_REG_AEU_ENABLE3_FUNC_0_OUT_0, 0xffff},
2468 {OP_WR_E1, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, 0x500003e0},
2469 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, 0xf00003e0},
2470 {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_1, 0x0},
2471 {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_0_OUT_1, 0xa000},
2472 {OP_ZR, MISC_REG_AEU_ENABLE3_FUNC_0_OUT_1, 0x5},
2473 {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_2, 0xfe00000},
2474 {OP_ZR_E1, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_3, 0x14},
2475 {OP_ZR_E1H, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_3, 0x7},
2476 {OP_WR_E1, MISC_REG_AEU_ENABLE1_NIG_0, 0x55540000},
2477 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_4, 0x400},
2478 {OP_WR_E1, MISC_REG_AEU_ENABLE2_NIG_0, 0x55555555},
2479 {OP_ZR_E1H, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_5, 0x3},
2480 {OP_WR_E1, MISC_REG_AEU_ENABLE3_NIG_0, 0x5555},
2481 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_5, 0x1000},
2482 {OP_WR_E1, MISC_REG_AEU_ENABLE4_NIG_0, 0x0},
2483 {OP_ZR_E1H, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_6, 0x3},
2484 {OP_WR_E1, MISC_REG_AEU_ENABLE1_PXP_0, 0x55540000},
2485 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_6, 0x4000},
2486 {OP_WR_E1, MISC_REG_AEU_ENABLE2_PXP_0, 0x55555555},
2487 {OP_ZR_E1H, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_7, 0x3},
2488 {OP_WR_E1, MISC_REG_AEU_ENABLE3_PXP_0, 0x5555},
2489 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_7, 0x10000},
2490 {OP_WR_E1, MISC_REG_AEU_ENABLE4_PXP_0, 0x0},
2491 {OP_ZR_E1H, MISC_REG_AEU_INVERTER_1_FUNC_0, 0x4},
2492 {OP_WR_E1, MISC_REG_AEU_INVERTER_1_FUNC_0, 0x0},
2493 {OP_ZR_E1, MISC_REG_AEU_INVERTER_2_FUNC_0, 0x3},
2494 {OP_WR_E1, MISC_REG_AEU_MASK_ATTN_FUNC_0, 0x7},
2495#define MISC_AEU_PORT0_END 2188
2496#define MISC_AEU_PORT1_START 2188
2497 {OP_WR_E1, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0, 0xbf5c0000},
2498 {OP_WR_E1H, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0, 0xff5c0000},
2499 {OP_WR_E1, MISC_REG_AEU_ENABLE2_FUNC_1_OUT_0, 0xfff51fef},
2500 {OP_WR_E1H, MISC_REG_AEU_ENABLE2_FUNC_1_OUT_0, 0xfff55fff},
2501 {OP_WR, MISC_REG_AEU_ENABLE3_FUNC_1_OUT_0, 0xffff},
2502 {OP_WR_E1, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, 0x500003e0},
2503 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, 0xf00003e0},
2504 {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_1, 0x0},
2505 {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_1_OUT_1, 0xa000},
2506 {OP_ZR, MISC_REG_AEU_ENABLE3_FUNC_1_OUT_1, 0x5},
2507 {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_2, 0xfe00000},
2508 {OP_ZR_E1, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_3, 0x14},
2509 {OP_ZR_E1H, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_3, 0x7},
2510 {OP_WR_E1, MISC_REG_AEU_ENABLE1_NIG_1, 0x55540000},
2511 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_4, 0x800},
2512 {OP_WR_E1, MISC_REG_AEU_ENABLE2_NIG_1, 0x55555555},
2513 {OP_ZR_E1H, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_5, 0x3},
2514 {OP_WR_E1, MISC_REG_AEU_ENABLE3_NIG_1, 0x5555},
2515 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_5, 0x2000},
2516 {OP_WR_E1, MISC_REG_AEU_ENABLE4_NIG_1, 0x0},
2517 {OP_ZR_E1H, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_6, 0x3},
2518 {OP_WR_E1, MISC_REG_AEU_ENABLE1_PXP_1, 0x55540000},
2519 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_6, 0x8000},
2520 {OP_WR_E1, MISC_REG_AEU_ENABLE2_PXP_1, 0x55555555},
2521 {OP_ZR_E1H, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_7, 0x3},
2522 {OP_WR_E1, MISC_REG_AEU_ENABLE3_PXP_1, 0x5555},
2523 {OP_WR_E1H, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_7, 0x20000},
2524 {OP_WR_E1, MISC_REG_AEU_ENABLE4_PXP_1, 0x0},
2525 {OP_ZR_E1H, MISC_REG_AEU_INVERTER_1_FUNC_1, 0x4},
2526 {OP_WR_E1, MISC_REG_AEU_INVERTER_1_FUNC_1, 0x0},
2527 {OP_ZR_E1, MISC_REG_AEU_INVERTER_2_FUNC_1, 0x3},
2528 {OP_WR_E1, MISC_REG_AEU_MASK_ATTN_FUNC_1, 0x7},
2529#define MISC_AEU_PORT1_END 2220
2530
2531};
2532
2533static const u32 init_data_e1[] = {
2534 0x00010000, 0x000204c0, 0x00030980, 0x00040e40, 0x00051300, 0x000617c0,
2535 0x00071c80, 0x00082140, 0x00092600, 0x000a2ac0, 0x000b2f80, 0x000c3440,
2536 0x000d3900, 0x000e3dc0, 0x000f4280, 0x00104740, 0x00114c00, 0x001250c0,
2537 0x00135580, 0x00145a40, 0x00155f00, 0x001663c0, 0x00176880, 0x00186d40,
2538 0x00197200, 0x001a76c0, 0x001b7b80, 0x001c8040, 0x001d8500, 0x001e89c0,
2539 0x001f8e80, 0x00209340, 0x00002000, 0x00004000, 0x00006000, 0x00008000,
2540 0x0000a000, 0x0000c000, 0x0000e000, 0x00010000, 0x00012000, 0x00014000,
2541 0x00016000, 0x00018000, 0x0001a000, 0x0001c000, 0x0001e000, 0x00020000,
2542 0x00022000, 0x00024000, 0x00026000, 0x00028000, 0x0002a000, 0x0002c000,
2543 0x0002e000, 0x00030000, 0x00032000, 0x00034000, 0x00036000, 0x00038000,
2544 0x0003a000, 0x0003c000, 0x0003e000, 0x00040000, 0x00042000, 0x00044000,
2545 0x00046000, 0x00048000, 0x0004a000, 0x0004c000, 0x0004e000, 0x00050000,
2546 0x00052000, 0x00054000, 0x00056000, 0x00058000, 0x0005a000, 0x0005c000,
2547 0x0005e000, 0x00060000, 0x00062000, 0x00064000, 0x00066000, 0x00068000,
2548 0x0006a000, 0x0006c000, 0x0006e000, 0x00070000, 0x00072000, 0x00074000,
2549 0x00076000, 0x00078000, 0x0007a000, 0x0007c000, 0x0007e000, 0x00080000,
2550 0x00082000, 0x00084000, 0x00086000, 0x00088000, 0x0008a000, 0x0008c000,
2551 0x0008e000, 0x00090000, 0x00092000, 0x00094000, 0x00096000, 0x00098000,
2552 0x0009a000, 0x0009c000, 0x0009e000, 0x000a0000, 0x000a2000, 0x000a4000,
2553 0x000a6000, 0x000a8000, 0x000aa000, 0x000ac000, 0x000ae000, 0x000b0000,
2554 0x000b2000, 0x000b4000, 0x000b6000, 0x000b8000, 0x000ba000, 0x000bc000,
2555 0x000be000, 0x000c0000, 0x000c2000, 0x000c4000, 0x000c6000, 0x000c8000,
2556 0x000ca000, 0x000cc000, 0x000ce000, 0x000d0000, 0x000d2000, 0x000d4000,
2557 0x000d6000, 0x000d8000, 0x000da000, 0x000dc000, 0x000de000, 0x000e0000,
2558 0x000e2000, 0x000e4000, 0x000e6000, 0x000e8000, 0x000ea000, 0x000ec000,
2559 0x000ee000, 0x000f0000, 0x000f2000, 0x000f4000, 0x000f6000, 0x000f8000,
2560 0x000fa000, 0x000fc000, 0x000fe000, 0x00100000, 0x00102000, 0x00104000,
2561 0x00106000, 0x00108000, 0x0010a000, 0x0010c000, 0x0010e000, 0x00110000,
2562 0x00112000, 0x00114000, 0x00116000, 0x00118000, 0x0011a000, 0x0011c000,
2563 0x0011e000, 0x00120000, 0x00122000, 0x00124000, 0x00126000, 0x00128000,
2564 0x0012a000, 0x0012c000, 0x0012e000, 0x00130000, 0x00132000, 0x00134000,
2565 0x00136000, 0x00138000, 0x0013a000, 0x0013c000, 0x0013e000, 0x00140000,
2566 0x00142000, 0x00144000, 0x00146000, 0x00148000, 0x0014a000, 0x0014c000,
2567 0x0014e000, 0x00150000, 0x00152000, 0x00154000, 0x00156000, 0x00158000,
2568 0x0015a000, 0x0015c000, 0x0015e000, 0x00160000, 0x00162000, 0x00164000,
2569 0x00166000, 0x00168000, 0x0016a000, 0x0016c000, 0x0016e000, 0x00170000,
2570 0x00172000, 0x00174000, 0x00176000, 0x00178000, 0x0017a000, 0x0017c000,
2571 0x0017e000, 0x00180000, 0x00182000, 0x00184000, 0x00186000, 0x00188000,
2572 0x0018a000, 0x0018c000, 0x0018e000, 0x00190000, 0x00192000, 0x00194000,
2573 0x00196000, 0x00198000, 0x0019a000, 0x0019c000, 0x0019e000, 0x001a0000,
2574 0x001a2000, 0x001a4000, 0x001a6000, 0x001a8000, 0x001aa000, 0x001ac000,
2575 0x001ae000, 0x001b0000, 0x001b2000, 0x001b4000, 0x001b6000, 0x001b8000,
2576 0x001ba000, 0x001bc000, 0x001be000, 0x001c0000, 0x001c2000, 0x001c4000,
2577 0x001c6000, 0x001c8000, 0x001ca000, 0x001cc000, 0x001ce000, 0x001d0000,
2578 0x001d2000, 0x001d4000, 0x001d6000, 0x001d8000, 0x001da000, 0x001dc000,
2579 0x001de000, 0x001e0000, 0x001e2000, 0x001e4000, 0x001e6000, 0x001e8000,
2580 0x001ea000, 0x001ec000, 0x001ee000, 0x001f0000, 0x001f2000, 0x001f4000,
2581 0x001f6000, 0x001f8000, 0x001fa000, 0x001fc000, 0x001fe000, 0x00200000,
2582 0x00202000, 0x00204000, 0x00206000, 0x00208000, 0x0020a000, 0x0020c000,
2583 0x0020e000, 0x00210000, 0x00212000, 0x00214000, 0x00216000, 0x00218000,
2584 0x0021a000, 0x0021c000, 0x0021e000, 0x00220000, 0x00222000, 0x00224000,
2585 0x00226000, 0x00228000, 0x0022a000, 0x0022c000, 0x0022e000, 0x00230000,
2586 0x00232000, 0x00234000, 0x00236000, 0x00238000, 0x0023a000, 0x0023c000,
2587 0x0023e000, 0x00240000, 0x00242000, 0x00244000, 0x00246000, 0x00248000,
2588 0x0024a000, 0x0024c000, 0x0024e000, 0x00250000, 0x00252000, 0x00254000,
2589 0x00256000, 0x00258000, 0x0025a000, 0x0025c000, 0x0025e000, 0x00260000,
2590 0x00262000, 0x00264000, 0x00266000, 0x00268000, 0x0026a000, 0x0026c000,
2591 0x0026e000, 0x00270000, 0x00272000, 0x00274000, 0x00276000, 0x00278000,
2592 0x0027a000, 0x0027c000, 0x0027e000, 0x00280000, 0x00282000, 0x00284000,
2593 0x00286000, 0x00288000, 0x0028a000, 0x0028c000, 0x0028e000, 0x00290000,
2594 0x00292000, 0x00294000, 0x00296000, 0x00298000, 0x0029a000, 0x0029c000,
2595 0x0029e000, 0x002a0000, 0x002a2000, 0x002a4000, 0x002a6000, 0x002a8000,
2596 0x002aa000, 0x002ac000, 0x002ae000, 0x002b0000, 0x002b2000, 0x002b4000,
2597 0x002b6000, 0x002b8000, 0x002ba000, 0x002bc000, 0x002be000, 0x002c0000,
2598 0x002c2000, 0x002c4000, 0x002c6000, 0x002c8000, 0x002ca000, 0x002cc000,
2599 0x002ce000, 0x002d0000, 0x002d2000, 0x002d4000, 0x002d6000, 0x002d8000,
2600 0x002da000, 0x002dc000, 0x002de000, 0x002e0000, 0x002e2000, 0x002e4000,
2601 0x002e6000, 0x002e8000, 0x002ea000, 0x002ec000, 0x002ee000, 0x002f0000,
2602 0x002f2000, 0x002f4000, 0x002f6000, 0x002f8000, 0x002fa000, 0x002fc000,
2603 0x002fe000, 0x00300000, 0x00302000, 0x00304000, 0x00306000, 0x00308000,
2604 0x0030a000, 0x0030c000, 0x0030e000, 0x00310000, 0x00312000, 0x00314000,
2605 0x00316000, 0x00318000, 0x0031a000, 0x0031c000, 0x0031e000, 0x00320000,
2606 0x00322000, 0x00324000, 0x00326000, 0x00328000, 0x0032a000, 0x0032c000,
2607 0x0032e000, 0x00330000, 0x00332000, 0x00334000, 0x00336000, 0x00338000,
2608 0x0033a000, 0x0033c000, 0x0033e000, 0x00340000, 0x00342000, 0x00344000,
2609 0x00346000, 0x00348000, 0x0034a000, 0x0034c000, 0x0034e000, 0x00350000,
2610 0x00352000, 0x00354000, 0x00356000, 0x00358000, 0x0035a000, 0x0035c000,
2611 0x0035e000, 0x00360000, 0x00362000, 0x00364000, 0x00366000, 0x00368000,
2612 0x0036a000, 0x0036c000, 0x0036e000, 0x00370000, 0x00372000, 0x00374000,
2613 0x00376000, 0x00378000, 0x0037a000, 0x0037c000, 0x0037e000, 0x00380000,
2614 0x00382000, 0x00384000, 0x00386000, 0x00388000, 0x0038a000, 0x0038c000,
2615 0x0038e000, 0x00390000, 0x00392000, 0x00394000, 0x00396000, 0x00398000,
2616 0x0039a000, 0x0039c000, 0x0039e000, 0x003a0000, 0x003a2000, 0x003a4000,
2617 0x003a6000, 0x003a8000, 0x003aa000, 0x003ac000, 0x003ae000, 0x003b0000,
2618 0x003b2000, 0x003b4000, 0x003b6000, 0x003b8000, 0x003ba000, 0x003bc000,
2619 0x003be000, 0x003c0000, 0x003c2000, 0x003c4000, 0x003c6000, 0x003c8000,
2620 0x003ca000, 0x003cc000, 0x003ce000, 0x003d0000, 0x003d2000, 0x003d4000,
2621 0x003d6000, 0x003d8000, 0x003da000, 0x003dc000, 0x003de000, 0x003e0000,
2622 0x003e2000, 0x003e4000, 0x003e6000, 0x003e8000, 0x003ea000, 0x003ec000,
2623 0x003ee000, 0x003f0000, 0x003f2000, 0x003f4000, 0x003f6000, 0x003f8000,
2624 0x003fa000, 0x003fc000, 0x003fe000, 0x003fe001, 0x00000000, 0x000001ff,
2625 0x00000200, 0x00000001, 0x00000003, 0x00bebc20, 0x00000003, 0x00bebc20,
2626 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2627 0xffffffff, 0xffffffff, 0x00000000, 0x00007ff8, 0x00000000, 0x00003500,
2628 0xffffffff, 0x00000000, 0xffffffff, 0x00000000, 0xffffffff, 0x00000003,
2629 0x00bebc20, 0xffffffff, 0x00000000, 0xffffffff, 0x00000000, 0xffffffff,
2630 0x00000003, 0x00bebc20, 0x00002000, 0x000040c0, 0x00006180, 0x00008240,
2631 0x0000a300, 0x0000c3c0, 0x0000e480, 0x00010540, 0x00012600, 0x000146c0,
2632 0x00016780, 0x00018840, 0x0001a900, 0x0001c9c0, 0x0001ea80, 0x00020b40,
2633 0x00022c00, 0x00024cc0, 0x00026d80, 0x00028e40, 0x0002af00, 0x0002cfc0,
2634 0x0002f080, 0x00031140, 0x00033200, 0x000352c0, 0x00037380, 0x00039440,
2635 0x0003b500, 0x0003d5c0, 0x0003f680, 0x00041740, 0x00043800, 0x000458c0,
2636 0x00047980, 0x00049a40, 0x00008000, 0x00010380, 0x00018700, 0x00020a80,
2637 0x00028e00, 0x00031180, 0x00039500, 0x00041880, 0x00049c00, 0x00051f80,
2638 0x0005a300, 0x00062680, 0x0006aa00, 0x00072d80, 0x0007b100, 0x00083480,
2639 0x0008b800, 0x00093b80, 0x0009bf00, 0x000a4280, 0x000ac600, 0x000b4980,
2640 0x000bcd00, 0x000c5080, 0x000cd400, 0x000d5780, 0x000ddb00, 0x00001900,
2641 0x00000000, 0xffffffff, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2642 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2643 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2644 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2645 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2646 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x00000000, 0x00007ff8,
2647 0x00000000, 0x00001500, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2648 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x40000000, 0x40000000,
2649 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2650 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2651 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2652 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2653 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2654 0x00000000, 0x00007ff8, 0x00000000, 0x00001500, 0x00001000, 0x00002080,
2655 0x00003100, 0x00004180, 0x00005200, 0x00006280, 0x00007300, 0x00008380,
2656 0x00009400, 0x0000a480, 0x0000b500, 0x0000c580, 0x0000d600, 0x0000e680,
2657 0x0000f700, 0x00010780, 0x00011800, 0x00012880, 0x00013900, 0x00014980,
2658 0x00015a00, 0x00016a80, 0x00017b00, 0x00018b80, 0x00019c00, 0x0001ac80,
2659 0x0001bd00, 0x0001cd80, 0x0001de00, 0x0001ee80, 0x0001ff00, 0x10000000,
2660 0x000028ad, 0x00000000, 0x00010001, 0x00350804, 0xccccccc1, 0xffffffff,
2661 0xffffffff, 0x7058103c, 0x00000000, 0xcccc0201, 0xcccccccc, 0x00000000,
2662 0xffffffff, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2663 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2664 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2665 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2666 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2667 0x40000000, 0x40000000, 0x40000000, 0x00000000, 0x00007ff8, 0x00000000,
2668 0x00003500, 0x000e01b7, 0x011600d6, 0x0000ffff, 0x00000000, 0x0000ffff,
2669 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
2670 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
2671 0x00000000, 0x00100000, 0x00000000, 0x007201bb, 0x012300f3, 0x0000ffff,
2672 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
2673 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
2674 0x00000000, 0x0000ffff, 0x00000000, 0x00100000, 0x00000000, 0xfffffff3,
2675 0x320fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c,
2676 0xcdcdcdcd, 0xfffffff1, 0x30efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2677 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c,
2678 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406,
2679 0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c,
2680 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2681 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, 0x302fffff, 0x0c30c30c,
2682 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xfffffff7,
2683 0x31efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0020cf3c,
2684 0xcdcdcdcd, 0xfffffff5, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2685 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x310fffff, 0x0c30c30c,
2686 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1,
2687 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c,
2688 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2689 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305,
2690 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2,
2691 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c,
2692 0xcdcdcdcd, 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2693 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xfffffff7, 0x30efffff, 0x0c30c30c,
2694 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5,
2695 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c,
2696 0xcdcdcdcd, 0xfffffff3, 0x31efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2697 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x310fffff, 0x0c30c30c,
2698 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6,
2699 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c,
2700 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014,
2701 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c,
2702 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa,
2703 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c,
2704 0xcdcdcdcd, 0xffffff97, 0x056fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000,
2705 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x310fffff, 0x0c30c30c,
2706 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3,
2707 0x320fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c,
2708 0xcdcdcdcd, 0xfffffff1, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2709 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c,
2710 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406,
2711 0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c,
2712 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2713 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffff8a, 0x042fffff, 0x0c30c30c,
2714 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffff97,
2715 0x05cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, 0x0020cf3c,
2716 0xcdcdcdcd, 0xfffffff5, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2717 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x300fffff, 0x0c30c30c,
2718 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1,
2719 0x300fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c,
2720 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2721 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305,
2722 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2,
2723 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c,
2724 0xcdcdcdcd, 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300,
2725 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffff97, 0x040fffff, 0x0c30c30c,
2726 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5,
2727 0x300fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c,
2728 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
2729 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
2730 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff,
2731 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c,
2732 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
2733 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
2734 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff,
2735 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c,
2736 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
2737 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
2738 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff,
2739 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c,
2740 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
2741 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
2742 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff,
2743 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c,
2744 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
2745 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
2746 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff,
2747 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c,
2748 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
2749 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
2750 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xffffffff,
2751 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c,
2752 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
2753 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
2754 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xffffffff,
2755 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c,
2756 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc,
2757 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c,
2758 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xffffffff,
2759 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c,
2760 0xcdcdcdcd, 0x00100000, 0x00070100, 0x00028170, 0x000b8198, 0x00020250,
2761 0x00010270, 0x000f0280, 0x00010370, 0x00080000, 0x00080080, 0x00028100,
2762 0x000b8128, 0x000201e0, 0x00010200, 0x00070210, 0x00020280, 0x000f0000,
2763 0x000800f0, 0x00028170, 0x000b8198, 0x00020250, 0x00010270, 0x000b8280,
2764 0x00080338, 0x00100000, 0x00080100, 0x00028180, 0x000b81a8, 0x00020260,
2765 0x00018280, 0x000e8298, 0x00080380, 0x00028000, 0x000b8028, 0x000200e0,
2766 0x00010100, 0x00008110, 0x00000118, 0xcccccccc, 0xcccccccc, 0xcccccccc,
2767 0xcccccccc, 0x00002000, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc,
2768 0x00002000, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x00002000
2769};
2770
2771static const u32 init_data_e1h[] = {
2772 0x00010000, 0x000204c0, 0x00030980, 0x00040e40, 0x00051300, 0x000617c0,
2773 0x00071c80, 0x00082140, 0x00092600, 0x000a2ac0, 0x000b2f80, 0x000c3440,
2774 0x000d3900, 0x000e3dc0, 0x000f4280, 0x00104740, 0x00114c00, 0x001250c0,
2775 0x00135580, 0x00145a40, 0x00155f00, 0x001663c0, 0x00176880, 0x00186d40,
2776 0x00197200, 0x001a76c0, 0x001b7b80, 0x001c8040, 0x001d8500, 0x001e89c0,
2777 0x001f8e80, 0x00209340, 0x00002000, 0x00004000, 0x00006000, 0x00008000,
2778 0x0000a000, 0x0000c000, 0x0000e000, 0x00010000, 0x00012000, 0x00014000,
2779 0x00016000, 0x00018000, 0x0001a000, 0x0001c000, 0x0001e000, 0x00020000,
2780 0x00022000, 0x00024000, 0x00026000, 0x00028000, 0x0002a000, 0x0002c000,
2781 0x0002e000, 0x00030000, 0x00032000, 0x00034000, 0x00036000, 0x00038000,
2782 0x0003a000, 0x0003c000, 0x0003e000, 0x00040000, 0x00042000, 0x00044000,
2783 0x00046000, 0x00048000, 0x0004a000, 0x0004c000, 0x0004e000, 0x00050000,
2784 0x00052000, 0x00054000, 0x00056000, 0x00058000, 0x0005a000, 0x0005c000,
2785 0x0005e000, 0x00060000, 0x00062000, 0x00064000, 0x00066000, 0x00068000,
2786 0x0006a000, 0x0006c000, 0x0006e000, 0x00070000, 0x00072000, 0x00074000,
2787 0x00076000, 0x00078000, 0x0007a000, 0x0007c000, 0x0007e000, 0x00080000,
2788 0x00082000, 0x00084000, 0x00086000, 0x00088000, 0x0008a000, 0x0008c000,
2789 0x0008e000, 0x00090000, 0x00092000, 0x00094000, 0x00096000, 0x00098000,
2790 0x0009a000, 0x0009c000, 0x0009e000, 0x000a0000, 0x000a2000, 0x000a4000,
2791 0x000a6000, 0x000a8000, 0x000aa000, 0x000ac000, 0x000ae000, 0x000b0000,
2792 0x000b2000, 0x000b4000, 0x000b6000, 0x000b8000, 0x000ba000, 0x000bc000,
2793 0x000be000, 0x000c0000, 0x000c2000, 0x000c4000, 0x000c6000, 0x000c8000,
2794 0x000ca000, 0x000cc000, 0x000ce000, 0x000d0000, 0x000d2000, 0x000d4000,
2795 0x000d6000, 0x000d8000, 0x000da000, 0x000dc000, 0x000de000, 0x000e0000,
2796 0x000e2000, 0x000e4000, 0x000e6000, 0x000e8000, 0x000ea000, 0x000ec000,
2797 0x000ee000, 0x000f0000, 0x000f2000, 0x000f4000, 0x000f6000, 0x000f8000,
2798 0x000fa000, 0x000fc000, 0x000fe000, 0x00100000, 0x00102000, 0x00104000,
2799 0x00106000, 0x00108000, 0x0010a000, 0x0010c000, 0x0010e000, 0x00110000,
2800 0x00112000, 0x00114000, 0x00116000, 0x00118000, 0x0011a000, 0x0011c000,
2801 0x0011e000, 0x00120000, 0x00122000, 0x00124000, 0x00126000, 0x00128000,
2802 0x0012a000, 0x0012c000, 0x0012e000, 0x00130000, 0x00132000, 0x00134000,
2803 0x00136000, 0x00138000, 0x0013a000, 0x0013c000, 0x0013e000, 0x00140000,
2804 0x00142000, 0x00144000, 0x00146000, 0x00148000, 0x0014a000, 0x0014c000,
2805 0x0014e000, 0x00150000, 0x00152000, 0x00154000, 0x00156000, 0x00158000,
2806 0x0015a000, 0x0015c000, 0x0015e000, 0x00160000, 0x00162000, 0x00164000,
2807 0x00166000, 0x00168000, 0x0016a000, 0x0016c000, 0x0016e000, 0x00170000,
2808 0x00172000, 0x00174000, 0x00176000, 0x00178000, 0x0017a000, 0x0017c000,
2809 0x0017e000, 0x00180000, 0x00182000, 0x00184000, 0x00186000, 0x00188000,
2810 0x0018a000, 0x0018c000, 0x0018e000, 0x00190000, 0x00192000, 0x00194000,
2811 0x00196000, 0x00198000, 0x0019a000, 0x0019c000, 0x0019e000, 0x001a0000,
2812 0x001a2000, 0x001a4000, 0x001a6000, 0x001a8000, 0x001aa000, 0x001ac000,
2813 0x001ae000, 0x001b0000, 0x001b2000, 0x001b4000, 0x001b6000, 0x001b8000,
2814 0x001ba000, 0x001bc000, 0x001be000, 0x001c0000, 0x001c2000, 0x001c4000,
2815 0x001c6000, 0x001c8000, 0x001ca000, 0x001cc000, 0x001ce000, 0x001d0000,
2816 0x001d2000, 0x001d4000, 0x001d6000, 0x001d8000, 0x001da000, 0x001dc000,
2817 0x001de000, 0x001e0000, 0x001e2000, 0x001e4000, 0x001e6000, 0x001e8000,
2818 0x001ea000, 0x001ec000, 0x001ee000, 0x001f0000, 0x001f2000, 0x001f4000,
2819 0x001f6000, 0x001f8000, 0x001fa000, 0x001fc000, 0x001fe000, 0x00200000,
2820 0x00202000, 0x00204000, 0x00206000, 0x00208000, 0x0020a000, 0x0020c000,
2821 0x0020e000, 0x00210000, 0x00212000, 0x00214000, 0x00216000, 0x00218000,
2822 0x0021a000, 0x0021c000, 0x0021e000, 0x00220000, 0x00222000, 0x00224000,
2823 0x00226000, 0x00228000, 0x0022a000, 0x0022c000, 0x0022e000, 0x00230000,
2824 0x00232000, 0x00234000, 0x00236000, 0x00238000, 0x0023a000, 0x0023c000,
2825 0x0023e000, 0x00240000, 0x00242000, 0x00244000, 0x00246000, 0x00248000,
2826 0x0024a000, 0x0024c000, 0x0024e000, 0x00250000, 0x00252000, 0x00254000,
2827 0x00256000, 0x00258000, 0x0025a000, 0x0025c000, 0x0025e000, 0x00260000,
2828 0x00262000, 0x00264000, 0x00266000, 0x00268000, 0x0026a000, 0x0026c000,
2829 0x0026e000, 0x00270000, 0x00272000, 0x00274000, 0x00276000, 0x00278000,
2830 0x0027a000, 0x0027c000, 0x0027e000, 0x00280000, 0x00282000, 0x00284000,
2831 0x00286000, 0x00288000, 0x0028a000, 0x0028c000, 0x0028e000, 0x00290000,
2832 0x00292000, 0x00294000, 0x00296000, 0x00298000, 0x0029a000, 0x0029c000,
2833 0x0029e000, 0x002a0000, 0x002a2000, 0x002a4000, 0x002a6000, 0x002a8000,
2834 0x002aa000, 0x002ac000, 0x002ae000, 0x002b0000, 0x002b2000, 0x002b4000,
2835 0x002b6000, 0x002b8000, 0x002ba000, 0x002bc000, 0x002be000, 0x002c0000,
2836 0x002c2000, 0x002c4000, 0x002c6000, 0x002c8000, 0x002ca000, 0x002cc000,
2837 0x002ce000, 0x002d0000, 0x002d2000, 0x002d4000, 0x002d6000, 0x002d8000,
2838 0x002da000, 0x002dc000, 0x002de000, 0x002e0000, 0x002e2000, 0x002e4000,
2839 0x002e6000, 0x002e8000, 0x002ea000, 0x002ec000, 0x002ee000, 0x002f0000,
2840 0x002f2000, 0x002f4000, 0x002f6000, 0x002f8000, 0x002fa000, 0x002fc000,
2841 0x002fe000, 0x00300000, 0x00302000, 0x00304000, 0x00306000, 0x00308000,
2842 0x0030a000, 0x0030c000, 0x0030e000, 0x00310000, 0x00312000, 0x00314000,
2843 0x00316000, 0x00318000, 0x0031a000, 0x0031c000, 0x0031e000, 0x00320000,
2844 0x00322000, 0x00324000, 0x00326000, 0x00328000, 0x0032a000, 0x0032c000,
2845 0x0032e000, 0x00330000, 0x00332000, 0x00334000, 0x00336000, 0x00338000,
2846 0x0033a000, 0x0033c000, 0x0033e000, 0x00340000, 0x00342000, 0x00344000,
2847 0x00346000, 0x00348000, 0x0034a000, 0x0034c000, 0x0034e000, 0x00350000,
2848 0x00352000, 0x00354000, 0x00356000, 0x00358000, 0x0035a000, 0x0035c000,
2849 0x0035e000, 0x00360000, 0x00362000, 0x00364000, 0x00366000, 0x00368000,
2850 0x0036a000, 0x0036c000, 0x0036e000, 0x00370000, 0x00372000, 0x00374000,
2851 0x00376000, 0x00378000, 0x0037a000, 0x0037c000, 0x0037e000, 0x00380000,
2852 0x00382000, 0x00384000, 0x00386000, 0x00388000, 0x0038a000, 0x0038c000,
2853 0x0038e000, 0x00390000, 0x00392000, 0x00394000, 0x00396000, 0x00398000,
2854 0x0039a000, 0x0039c000, 0x0039e000, 0x003a0000, 0x003a2000, 0x003a4000,
2855 0x003a6000, 0x003a8000, 0x003aa000, 0x003ac000, 0x003ae000, 0x003b0000,
2856 0x003b2000, 0x003b4000, 0x003b6000, 0x003b8000, 0x003ba000, 0x003bc000,
2857 0x003be000, 0x003c0000, 0x003c2000, 0x003c4000, 0x003c6000, 0x003c8000,
2858 0x003ca000, 0x003cc000, 0x003ce000, 0x003d0000, 0x003d2000, 0x003d4000,
2859 0x003d6000, 0x003d8000, 0x003da000, 0x003dc000, 0x003de000, 0x003e0000,
2860 0x003e2000, 0x003e4000, 0x003e6000, 0x003e8000, 0x003ea000, 0x003ec000,
2861 0x003ee000, 0x003f0000, 0x003f2000, 0x003f4000, 0x003f6000, 0x003f8000,
2862 0x003fa000, 0x003fc000, 0x003fe000, 0x003fe001, 0x00000000, 0x000001ff,
2863 0x00000200, 0x00000001, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2864 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2865 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2866 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2867 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2868 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000000, 0x00007ff8,
2869 0x00000000, 0x00003500, 0xffffffff, 0x00000000, 0xffffffff, 0x00000000,
2870 0xffffffff, 0xffffffff, 0x00000000, 0xffffffff, 0x00000000, 0xffffffff,
2871 0xffffffff, 0x00000000, 0xffffffff, 0x00000000, 0xffffffff, 0x00000003,
2872 0x00bebc20, 0xffffffff, 0x00000000, 0xffffffff, 0x00000000, 0xffffffff,
2873 0x00000003, 0x00bebc20, 0xffffffff, 0x00000000, 0xffffffff, 0x00000000,
2874 0xffffffff, 0x00000003, 0x00bebc20, 0xffffffff, 0x00000000, 0xffffffff,
2875 0x00000000, 0xffffffff, 0x00000003, 0x00bebc20, 0xffffffff, 0x00000000,
2876 0xffffffff, 0x00000000, 0xffffffff, 0x00000003, 0x00bebc20, 0xffffffff,
2877 0x00000000, 0xffffffff, 0x00000000, 0xffffffff, 0x00000003, 0x00bebc20,
2878 0x00002000, 0x000040c0, 0x00006180, 0x00008240, 0x0000a300, 0x0000c3c0,
2879 0x0000e480, 0x00010540, 0x00012600, 0x000146c0, 0x00016780, 0x00018840,
2880 0x0001a900, 0x0001c9c0, 0x0001ea80, 0x00020b40, 0x00022c00, 0x00024cc0,
2881 0x00026d80, 0x00028e40, 0x0002af00, 0x0002cfc0, 0x0002f080, 0x00031140,
2882 0x00033200, 0x000352c0, 0x00037380, 0x00039440, 0x0003b500, 0x0003d5c0,
2883 0x0003f680, 0x00041740, 0x00043800, 0x000458c0, 0x00047980, 0x00049a40,
2884 0x00008000, 0x00010380, 0x00018700, 0x00020a80, 0x00028e00, 0x00031180,
2885 0x00039500, 0x00041880, 0x00049c00, 0x00051f80, 0x0005a300, 0x00062680,
2886 0x0006aa00, 0x00072d80, 0x0007b100, 0x00083480, 0x0008b800, 0x00093b80,
2887 0x0009bf00, 0x000a4280, 0x000ac600, 0x000b4980, 0x000bcd00, 0x000c5080,
2888 0x000cd400, 0x000d5780, 0x000ddb00, 0x00001900, 0x00000028, 0x00100000,
2889 0x00000000, 0x00000000, 0xffffffff, 0x40000000, 0x40000000, 0x40000000,
2890 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2891 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2892 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2893 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2894 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x00000000,
2895 0x00007ff8, 0x00000000, 0x00001500, 0xffffffff, 0xffffffff, 0xffffffff,
2896 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2897 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2898 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2899 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
2900 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x40000000,
2901 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2902 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2903 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2904 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2905 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2906 0x40000000, 0x00000000, 0x00007ff8, 0x00000000, 0x00001500, 0x00001000,
2907 0x00002080, 0x00003100, 0x00004180, 0x00005200, 0x00006280, 0x00007300,
2908 0x00008380, 0x00009400, 0x0000a480, 0x0000b500, 0x0000c580, 0x0000d600,
2909 0x0000e680, 0x0000f700, 0x00010780, 0x00011800, 0x00012880, 0x00013900,
2910 0x00014980, 0x00015a00, 0x00016a80, 0x00017b00, 0x00018b80, 0x00019c00,
2911 0x0001ac80, 0x0001bd00, 0x0001cd80, 0x0001de00, 0x0001ee80, 0x0001ff00,
2912 0x10000000, 0x000028ad, 0x00000000, 0x00010001, 0x00350804, 0xccccccc5,
2913 0xffffffff, 0xffffffff, 0x7058103c, 0x00000000, 0xcccc0201, 0xcccccccc,
2914 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc,
2915 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc,
2916 0xcccc0201, 0xcccccccc, 0x00000000, 0xffffffff, 0x40000000, 0x40000000,
2917 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2918 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2919 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2920 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2921 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000, 0x40000000,
2922 0x00000000, 0x00007ff8, 0x00000000, 0x00003500, 0x000e0232, 0x011600d6,
2923 0x00100000, 0x00000000, 0x00720236, 0x012300f3, 0x00100000, 0x00000000,
2924 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2925 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2926 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2927 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2928 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2929 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2930 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2931 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2932 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2933 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2934 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2935 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2936 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2937 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2938 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2939 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2940 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2941 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2942 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2943 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2944 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000,
2945 0x0000ffff, 0x00000000, 0xfffffff3, 0x320fffff, 0x0c30c30c, 0xc30c30c3,
2946 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x30efffff,
2947 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd,
2948 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3,
2949 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3,
2950 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff,
2951 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd,
2952 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3,
2953 0x0010cf3c, 0xcdcdcdcd, 0xfffffff7, 0x31efffff, 0x0c30c30c, 0xc30c30c3,
2954 0xcf3cf300, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x302fffff,
2955 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd,
2956 0xfffffff3, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3,
2957 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x310fffff, 0x0c30c30c, 0xc30c30c3,
2958 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff,
2959 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd,
2960 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014, 0xf3cf3cf3,
2961 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3,
2962 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, 0x302fffff,
2963 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd,
2964 0xfffffff7, 0x30efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3,
2965 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x304fffff, 0x0c30c30c, 0xc30c30c3,
2966 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x31efffff,
2967 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd,
2968 0xfffffff1, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3,
2969 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3,
2970 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff,
2971 0x0c30c305, 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd,
2972 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3,
2973 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3,
2974 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffff97, 0x056fffff,
2975 0x0c30c30c, 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd,
2976 0xfffffff5, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3,
2977 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x320fffff, 0x0c30c30c, 0xc30c30c3,
2978 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x310fffff,
2979 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd,
2980 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3,
2981 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3,
2982 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff,
2983 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd,
2984 0xffffff8a, 0x042fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3,
2985 0x0010cf3c, 0xcdcdcdcd, 0xffffff97, 0x05cfffff, 0x0c30c30c, 0xc30c30c3,
2986 0xcf3cc000, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x310fffff,
2987 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd,
2988 0xfffffff3, 0x316fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3,
2989 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x302fffff, 0x0c30c30c, 0xc30c30c3,
2990 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff,
2991 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd,
2992 0xfffffff6, 0x30bfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf314, 0xf3cf3cf3,
2993 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3,
2994 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, 0x302fffff,
2995 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd,
2996 0xfffffff7, 0x31cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3,
2997 0x0020cf3c, 0xcdcdcdcd, 0xfffffff0, 0x307fffff, 0x0c30c30c, 0xc30c30c3,
2998 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff,
2999 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd,
3000 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3,
3001 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3,
3002 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff,
3003 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd,
3004 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3,
3005 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3,
3006 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff,
3007 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd,
3008 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3,
3009 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3,
3010 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff,
3011 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd,
3012 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3,
3013 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3,
3014 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff,
3015 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd,
3016 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3,
3017 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3,
3018 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff,
3019 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd,
3020 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3,
3021 0x0000cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3,
3022 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff,
3023 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd,
3024 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3,
3025 0x0004cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3,
3026 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff,
3027 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd,
3028 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3,
3029 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3,
3030 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0x00100000, 0x00070100,
3031 0x00028170, 0x000b8198, 0x00020250, 0x00010270, 0x000f0280, 0x00010370,
3032 0x00080000, 0x00080080, 0x00028100, 0x000b8128, 0x000201e0, 0x00010200,
3033 0x00070210, 0x00020280, 0x000f0000, 0x000800f0, 0x00028170, 0x000b8198,
3034 0x00020250, 0x00010270, 0x000b8280, 0x00080338, 0x00100000, 0x00080100,
3035 0x00028180, 0x000b81a8, 0x00020260, 0x00018280, 0x000e8298, 0x00080380,
3036 0x000b0000, 0x000100b0, 0x000280c0, 0x000580e8, 0x00020140, 0x00010160,
3037 0x000e0170, 0x00038250, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc,
3038 0x00002000, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x00002000,
3039 0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x04002000
3040};
3041
3042static const u32 tsem_int_table_data_e1[] = {
3043 0x00088b1f, 0x00000000, 0x51fbff00, 0x03f0c0cf, 0x19d9458a, 0x1138fc18,
3044 0x5980a1fc, 0xd8181998, 0x88039880, 0x81b8803d, 0x91a18191, 0xdafd7891,
3045 0xbf760862, 0x6ec30330, 0x0211e620, 0x1082239a, 0xf354029f, 0x0f5fc806,
3046 0x6512b315, 0x3a263860, 0x06a77ef0, 0x298d2ade, 0xc1124536, 0x1e4586de,
3047 0x93476f19, 0xca8922ff, 0xff4041df, 0x65296340, 0x229dbe54, 0x04a65e84,
3048 0xe4d1a5a1, 0xd7f2a1ed, 0x5192fea1, 0x0dee6ec6, 0xf8003ca8, 0x6065495c,
3049 0x00606549
3050};
3051
3052static const u32 tsem_pram_data_e1[] = {
3053 0x00088b1f, 0x00000000, 0x7dedff00, 0xd554780b, 0x733ef0b5, 0x49999cce,
3054 0x424e4cce, 0x4c22f212, 0x21a08812, 0x8a80af0c, 0x2201277f, 0x282039f5,
3055 0x4201d458, 0xd4837908, 0xcdedaf4b, 0x11102484, 0x0547f435, 0x5088768b,
3056 0x340da2d1, 0x0ec160d2, 0x6d7b1420, 0xc0faf06f, 0x480bf5ea, 0xb12f3141,
3057 0xcbc57e20, 0xe7dad6bf, 0x264ce664, 0xafdbd880, 0xb4fdffff, 0xece7d9b8,
3058 0xebdaf7b3, 0x7b5ad7b5, 0x75923ded, 0xc7bf9302, 0x03fc45d8, 0x8c4d4fe5,
3059 0xf2c109b1, 0x80f66667, 0xc9b18727, 0x473afebd, 0x6d55633c, 0x9da23b19,
3060 0x99ec258c, 0x50281421, 0x2c23d5fe, 0xbfdf8250, 0xf097c365, 0x4219b6ff,
3061 0xd0977c3e, 0xc3e611e9, 0x02d5e4fb, 0x933a876b, 0xea0c319c, 0x4b19b98c,
3062 0x126b2c64, 0x4b223fa3, 0xe0ff828d, 0x8f392573, 0x27fc34b1, 0x61467574,
3063 0xc678c0ae, 0x5c531e32, 0x38a9d0d4, 0x843f7815, 0xbcd2c67f, 0x0731b725,
3064 0xbc03cf63, 0xbcf071c9, 0x61de3a5a, 0xc22eefe5, 0x3af3a1df, 0xae58cd6a,
3065 0x32773e30, 0x416589a7, 0xf3e33ebf, 0x3d6346ac, 0x4fe3d99b, 0xec3fc346,
3066 0x8c517ecc, 0xb1138f30, 0xcb3c018c, 0x632f0e54, 0x5467b2bd, 0x6a9b1f10,
3067 0x2c32a258, 0x852f0f58, 0x56338765, 0xed975e03, 0xf8165c16, 0x2f6c39fe,
3068 0xbed7e631, 0x15ead66b, 0xa362593e, 0xb50404a1, 0x67eff4e4, 0x11bfcb11,
3069 0x2b30fef1, 0xea4ab2a0, 0xaf805595, 0xfb765aaa, 0x67edfe95, 0x54e88933,
3070 0x5bf6b929, 0x5adefc61, 0xf1866ae6, 0x02d59997, 0x91fb2fac, 0x7a83e5d3,
3071 0x21476366, 0x36d0fa83, 0xc1198981, 0x9e00afef, 0x007f91db, 0xa52b2a1e,
3072 0x740642de, 0xb02bddec, 0x871c0ce6, 0x776cbbf7, 0x0c65f306, 0x6658e70c,
3073 0x32e73826, 0x74893a41, 0xd2073071, 0xf324bcc1, 0xcea84289, 0xb0f3dc54,
3074 0x9de29f7f, 0xe7f4ed87, 0x38e60b49, 0xf25700bd, 0x57a06650, 0x9d3ab5b1,
3075 0xea563265, 0xbe442969, 0x8decb538, 0x9e025855, 0xf7c02413, 0x08a78b7c,
3076 0x5798a9fb, 0xa780cd9d, 0x8d1859e6, 0xff2db43f, 0x0cf80933, 0xc4c5f3ba,
3077 0x76313f21, 0xf04f843c, 0x5a11f1cf, 0xde981c5d, 0xb08b2b97, 0x05f1091f,
3078 0x1f011772, 0x26a0423f, 0x544d28e0, 0x29fc573a, 0xd0a0d86b, 0xc3595bfa,
3079 0xe50069c6, 0x3f0cbc11, 0x0843ac61, 0x1cbd4be5, 0xb0ff3bba, 0x3c303b94,
3080 0x04f3d3ff, 0xab7e1274, 0x1fc8b700, 0xbfd97615, 0xca61f812, 0xf7c0e6ab,
3081 0x362a3f80, 0xd40b7e0b, 0xe8dbaf4d, 0x5e26f77d, 0x3765d80f, 0x16d74ff2,
3082 0xbdf00ba8, 0x1bf1fda5, 0x155ebf91, 0x3b763359, 0xfa84ca22, 0x3b06a4e5,
3083 0xc0750f1b, 0x578db147, 0xbbef362b, 0x692fbf1f, 0xf41b30b3, 0xf17bb157,
3084 0x7d42371d, 0xc33361f1, 0x6b5b1526, 0x2fa814e5, 0x582d0bf1, 0xf0e029ef,
3085 0xfe8976f9, 0xc7bed0ad, 0x1b389ed1, 0xc6ba73e8, 0x63329cca, 0xc4f6f675,
3086 0xa567c059, 0xf8851dfe, 0xc176e95d, 0xf29f6885, 0xc943d6ea, 0xb917af38,
3087 0x8b6d977c, 0x7f1d4e66, 0xab64f7f0, 0xbc1ef818, 0x64f3065f, 0xd662efd0,
3088 0xb07a8854, 0xd93aeb62, 0xebe20f69, 0xe34a8d74, 0x8bdfc9f4, 0x577c0e30,
3089 0xc2e08af9, 0x989a5629, 0x7bb0e517, 0xf3ce6db7, 0x56afce0a, 0xbce3b6ce,
3090 0x6ed8cb56, 0x2efe7fb1, 0xfea5cd54, 0xbc2172cd, 0x59b4dd2f, 0xdb910e2e,
3091 0x8c836db2, 0x1ac86d70, 0xd7208dec, 0xd7807841, 0x52f583b2, 0x0fa803d4,
3092 0x233cbf25, 0x852acf84, 0xb2cbe258, 0x1a73226d, 0xddd388f8, 0x13fc2ef7,
3093 0x6bdbe5f0, 0x74eabc27, 0x1aa7d3eb, 0x1aa8cedd, 0xbcdea51d, 0xf8f81119,
3094 0xc003a471, 0x827884d3, 0x9f06ad72, 0x97cb3263, 0x9b877fa0, 0x3cbb02a9,
3095 0xd999365f, 0xf563067c, 0xd2dd07b0, 0xd99750f5, 0xf582e652, 0x7bb1fa50,
3096 0x0493d42a, 0x9f3867ef, 0xc25bc17a, 0x2496abd7, 0x9579e00f, 0xfce0e6c0,
3097 0x30d0218f, 0xc0c955af, 0xa6f7809f, 0x8bcf7969, 0x3c7b0682, 0xb17f8bd6,
3098 0x39fa8326, 0xa198fd43, 0xf7cbac9f, 0x324e16a3, 0x9616a3f4, 0x8dfcfde8,
3099 0x595db1fa, 0x37854d3f, 0x2c29e118, 0x0491fbd5, 0xbf6f5768, 0x37a979b2,
3100 0x73c2364f, 0x13f53973, 0xbcc5d53b, 0x1ae7ae0a, 0xb776b03f, 0xed95ef08,
3101 0xb0d763b1, 0x5028be50, 0x0edb8005, 0x17ca1252, 0x0ca29331, 0x8eeb187c,
3102 0x27a1d433, 0x4175e4f5, 0x958813fd, 0x45397c69, 0x9f90bd26, 0x43faa562,
3103 0x85e90a29, 0x5ef06e87, 0x8e20eb83, 0x2ea192cd, 0x11ab477b, 0x14e01af8,
3104 0x60961258, 0x7ff52417, 0xf1ccdabf, 0x217a9050, 0x5f7c18fb, 0x8ecdea65,
3105 0xa635fa85, 0x6f116bfc, 0xe5eb812e, 0x63559128, 0x230b28bb, 0x233ab4fd,
3106 0x085f79ef, 0x00871a9e, 0xbf6085fd, 0x126f668d, 0xdaf8d7f2, 0xc0127c67,
3107 0xcc086ab7, 0x12ba0527, 0x60f8099e, 0xa43d5a3d, 0x69f10938, 0x43be4191,
3108 0xfc6197c7, 0x06ff1a1c, 0xc71ba3c4, 0xbe3fe84f, 0x61927325, 0x897a6b7c,
3109 0x0cab7c61, 0x4fbf03e3, 0xc6d66dad, 0xc0ddfc07, 0x99a134d8, 0x97a4b7c6,
3110 0x65abf8d0, 0x3f186256, 0x5bfc6faa, 0x819efe70, 0x83799fe6, 0xa5e9fe71,
3111 0x7ccbf9c6, 0x5f6ab3fe, 0xa28fc6d2, 0x5e16cff9, 0x2f4ff3e2, 0xf0b7f3e5,
3112 0x77c6fb7e, 0x5effe1f4, 0x8077bf9c, 0x93592df1, 0x5a1ff38d, 0x85bf9c6e,
3113 0xbb545f8f, 0xa15f1b53, 0x3b0917f1, 0x9687fcf9, 0xc5b2f8d3, 0x923e42eb,
3114 0xfdaaa353, 0x81a44f68, 0x1d260c40, 0x0472a6e5, 0x1fa00518, 0x04990a86,
3115 0x9c5143c7, 0x0145ceef, 0x7d4129bf, 0x5120fcc7, 0x352acfa0, 0x9edb2f9e,
3116 0xa59ea32f, 0x376889f7, 0x6d453ff1, 0x6c37ad22, 0x1c3fc5bd, 0x136eede0,
3117 0x5a2f587d, 0xa45f937f, 0xe5db8ef5, 0xf005c660, 0x1c9e5ff9, 0xaf3a1cd5,
3118 0x935172f0, 0x418764f9, 0xbe3c388e, 0x1aa23602, 0x26476be0, 0x9fac1098,
3119 0xc60a3d04, 0x7a0e3b2f, 0x6653cb14, 0x009c8f6e, 0x50e4cb3d, 0xf6e5a9b9,
3120 0x93bd8f88, 0x5bbaf303, 0xc4a4ff83, 0xb9727df1, 0x9ffc47e0, 0x4654b75b,
3121 0x09a8b4fd, 0x7910e98c, 0xd4e8d2af, 0x6fe2dbbb, 0x4e9f0816, 0x243dcfc4,
3122 0x97fd8c8a, 0xde2fd766, 0xddf0c830, 0x486fe63c, 0xd70bf682, 0xc2a21fce,
3123 0xc7307ffc, 0x53ed1632, 0x13548490, 0x354b31c9, 0xa7316f81, 0x15399d75,
3124 0x31ccf72a, 0xb9faec1b, 0x07fd635e, 0xb77ac625, 0xa1366fd9, 0x6044b1bd,
3125 0xfbdfa19b, 0xf5ef8daa, 0x71093671, 0x78daae9c, 0x78722777, 0x2c72c3ef,
3126 0xae89563e, 0x5bfcabf7, 0x87aa9e1d, 0xeb402ccd, 0x43024765, 0xc812fa3a,
3127 0x7caaf35e, 0xdef0e1de, 0x3dbab66f, 0x3ffdcf00, 0xe19f0912, 0x1ebc77f0,
3128 0x1d8136ed, 0x4be1b1d7, 0xe1b7da33, 0xff8709f3, 0xf3e11581, 0xf7d46551,
3129 0xcfe17df3, 0xf3849f39, 0xfe5b5553, 0xed2113a0, 0x3fbe5a2a, 0x7f0844e8,
3130 0x619b6d95, 0xcff12fa8, 0xbc5fb435, 0xfde1be61, 0x8625a6a2, 0x971b0bf7,
3131 0x7df3ea1a, 0x7fb4323f, 0xe1ad4560, 0x8fd57dfd, 0xa0ffde18, 0x3ea19d64,
3132 0xd0d1bbd7, 0x9b399efe, 0xaf4def0d, 0xe513bc8f, 0x915deea8, 0x5671bae1,
3133 0xda38f939, 0xc9156783, 0xb4f8f485, 0xe0e48926, 0xca938d74, 0x5671b6ee,
3134 0xc583d72f, 0x5e9c4c0c, 0x71af9ce1, 0x4665ea32, 0xc2aff3fa, 0xea0f9f05,
3135 0x849c137f, 0xcc83713f, 0x02c2c002, 0xe3e3eb8b, 0x7de4315e, 0x6fde65c7,
3136 0xd71f4100, 0x11d8bdff, 0xf35579f9, 0x046aa1fc, 0xb72821ff, 0xb9d7152c,
3137 0x0f7d6d1e, 0x302e5f7f, 0xc673e84f, 0xd79c9256, 0xb94ceb69, 0xf941f5cc,
3138 0xf402e4ce, 0x40e5cbbf, 0xc6a5f576, 0xa2a4016b, 0x3ceb449e, 0xa401f901,
3139 0x592fc0c0, 0xdceef906, 0x955c1227, 0xaf4013a8, 0xc19e63ae, 0x8133d426,
3140 0x8d77e903, 0x49dc3842, 0xa04b6f54, 0x66b3bd75, 0x1213a0fa, 0xe543c7d2,
3141 0xa87335a7, 0xa5e3593c, 0x094d44f2, 0xaa6bc795, 0x59a8eca9, 0x35c7e541,
3142 0xaa3f2a3e, 0xcff2a469, 0x1e544d35, 0xe540d9ad, 0x2a7e357b, 0x54dc6bbb,
3143 0xba2bf9f6, 0xecd78dfe, 0x80afcd55, 0x67ea8795, 0x43d4b9b4, 0x739276db,
3144 0xf9ca1257, 0x365ce519, 0x8e67e3da, 0x31996382, 0xf9c2be30, 0xba3a606d,
3145 0xf6295ec9, 0xf5c7fd03, 0xe28b6f7f, 0xd899b274, 0xd9a67074, 0xe17fc323,
3146 0x7543905a, 0x16065909, 0x7b0cd724, 0xed617e84, 0x8e5d7a43, 0x9bddcc4e,
3147 0x71e8133b, 0xe5bf99f2, 0xda75bf61, 0x407517fa, 0x059875a4, 0xbd21779e,
3148 0xeb46f042, 0x9aabef5a, 0xfe0cbfbe, 0xd7f0faba, 0xfbfe8e9e, 0xfea54141,
3149 0x985ab4cf, 0x13dc7884, 0x67e607ed, 0xef3f0e67, 0x965c7940, 0x444f5264,
3150 0x565e83c0, 0x4aa864b4, 0x66d3fae8, 0x12699fac, 0x7ad0b7a6, 0x35998cec,
3151 0x554af90a, 0xfa430c4f, 0xf7a95127, 0x56492cb3, 0x9ebc804f, 0xc31596de,
3152 0x5f3f6fd7, 0x12c7b707, 0x485f82bf, 0xf0deffed, 0x0e8fd40c, 0xecad630f,
3153 0x03ea2b13, 0xedf59778, 0xfd2672fd, 0x6c57e295, 0xda1cf98f, 0x7bf8160b,
3154 0x1207e291, 0xab7ef5d5, 0x659f445a, 0x6edf3e34, 0x73be0f18, 0xc5f73eea,
3155 0xadf14bcc, 0xc4864ec4, 0xf169d611, 0x366db2c6, 0xc4aeb8d5, 0x6d55ea1a,
3156 0x9d61aac9, 0xfc807fc1, 0x42416ab3, 0xb8d729be, 0x1a5247a8, 0xdcaf8005,
3157 0xab7ea4e4, 0xc2aede04, 0xe17b21da, 0xa72b5751, 0x9df040db, 0x94ec39ae,
3158 0xac4bde40, 0x7c0201e0, 0xa7232d25, 0x6aeb9ea2, 0x7b444bad, 0xf33c4cb0,
3159 0xf7c22790, 0x8d024d3b, 0xee6fc4b7, 0x1aa3ae35, 0x57e8307f, 0x167e4e7f,
3160 0xd4864e53, 0xcedc4d3b, 0x80f7ef0e, 0xf0e5efd6, 0x48fdb953, 0xfece8de1,
3161 0xfb6caa78, 0x1c92f642, 0x82f2ffc1, 0x57f1d278, 0x401cf26e, 0xedba5a7d,
3162 0x9fa3d918, 0x0fd97d9a, 0xf53f425f, 0x44929f9f, 0x5e7d5271, 0x6129303e,
3163 0x7c5a059c, 0x9ef7f817, 0xfd3d610f, 0x6ccddfec, 0x2ec7c00d, 0x6f782b40,
3164 0x13335fd6, 0xa17d4133, 0x5ad05b56, 0xcfdd7146, 0x2a8edc4c, 0xd1071e62,
3165 0xa1e53581, 0x4cc5d91d, 0x5d4f11d3, 0xb8c76dec, 0x329c3a10, 0x1667a4c9,
3166 0x18ed1a36, 0xf50d7fb0, 0xf58c1bc5, 0x11333662, 0x7af149f5, 0x340bf333,
3167 0xf7fbc33f, 0x7fe12a4d, 0x855eab31, 0xf9a4aaeb, 0x26540b23, 0x157c02a5,
3168 0x6f3679bf, 0x4c5fc63e, 0xe3d10fdc, 0x38e24b23, 0x7ef1a5fc, 0x3fef0dd9,
3169 0xf7771d69, 0x8b06488d, 0x89c6157f, 0x6d730c58, 0xfbf1fd65, 0x870fe16d,
3170 0xfbaf5f57, 0x383469c5, 0xdb826dc4, 0x2f7f811f, 0xeba67c68, 0xd5445beb,
3171 0x8ddc17e0, 0x21bf10f5, 0xb2e2d446, 0xee911322, 0x67d5aa5d, 0x14f7a18a,
3172 0xb4edf7b7, 0xde80eab8, 0x0679373f, 0x4ec81389, 0xed2165c8, 0xd2f26e7e,
3173 0xade14ef3, 0x995bb462, 0x3b45c814, 0xe218d614, 0x07e35953, 0x8b91ca31,
3174 0x833b66f1, 0x6fe81475, 0x9fa0f841, 0xdb92f655, 0xbbc62e58, 0xbfa1de41,
3175 0x87851cc7, 0x94dba805, 0x59fd8656, 0x7cf18c92, 0xaf58d39b, 0x1d207fc2,
3176 0x3f8a3046, 0xc2908f45, 0xa86018f0, 0xe32eed0f, 0x84e851f3, 0x201fdd91,
3177 0x8b10763e, 0x02556943, 0x26cf8c22, 0xfe7d9d49, 0x7bfa2656, 0x2f8a7e1c,
3178 0x2ae5fb40, 0xc5a95f6f, 0x507f97cf, 0x12ee3830, 0x3ceaa8fa, 0x21419068,
3179 0x7fbe3d75, 0x71fe625e, 0x3a6f41df, 0xd10d5561, 0xde4d739b, 0xd40f4869,
3180 0x009f0893, 0x760d78e3, 0x2a1a9a60, 0xf8c20be7, 0x88e1aae3, 0x5dfd0667,
3181 0x2ddef26e, 0xe387f426, 0xea4ffbaa, 0x4882ffd7, 0xfeeabcf3, 0xbfebf587,
3182 0x15ff5232, 0x977979bf, 0xf4a9f80f, 0x803a4f57, 0x5267d999, 0xe80ba253,
3183 0xc1b5be5e, 0xa9f97281, 0x5d2073e4, 0xd38bf33f, 0x16e7c923, 0xb74f9751,
3184 0xff11e422, 0x7e9d1f10, 0xd03bd1e9, 0xd5b73aae, 0x607c52ac, 0x0160259b,
3185 0x5d6caca6, 0x9b63e5c2, 0xafaf18e5, 0xb3f902fe, 0x2fa8cdaa, 0x32785f4a,
3186 0x40cde311, 0x0e7fcd49, 0xb9507f90, 0x68852fe5, 0x5eb15577, 0xdfe17bd2,
3187 0xe3e7f8e1, 0x2f981ec8, 0xaf7ff4c7, 0x6955f3ef, 0x7d6aa978, 0x84910bf4,
3188 0xcdfc83a5, 0x9a25f6f0, 0x68a4ffbd, 0xdf38a78f, 0xf9113644, 0xf307c74c,
3189 0xeebf7b73, 0x8f73a7c5, 0x5b9d3c01, 0xe421ddfe, 0xd727f284, 0x165a677b,
3190 0xe735fcfe, 0x0dd4f2c0, 0xaed4317a, 0x6767d7d6, 0xeca7e69b, 0x39b965e1,
3191 0xb03f40e0, 0xe5d9b37c, 0xfcbeba43, 0xc19e2ffc, 0x1607ccb8, 0xbfe870d7,
3192 0xef83e5ec, 0xb2f500dd, 0xdbf8e61d, 0x211434f8, 0x2a974831, 0x6c62bbf8,
3193 0xbfa50e90, 0x473b283e, 0x8e3fe7f1, 0x6ca3d20b, 0x8d993ec7, 0x298f8fea,
3194 0x0ee4fb2d, 0x5a5d0225, 0x3fa2158e, 0x57e2f751, 0xcfafea32, 0xe0d8175e,
3195 0xdcf8088c, 0x62ec907c, 0x51d113c4, 0xdd1f53a3, 0x0157dac2, 0xeabf505d,
3196 0xff7f0a74, 0xc7fe9a2f, 0xc4399cfe, 0x86bcafcf, 0xb67f28fb, 0x25fe70b8,
3197 0xc0e83caf, 0xaa929c79, 0xdb3f5f39, 0x7186e890, 0x44becc4b, 0xbcfe4a95,
3198 0x121fb9e4, 0xf23e2dbf, 0x7f8a44c3, 0x89b27730, 0x325f056c, 0xa6d16fce,
3199 0x62bf34d9, 0x2bbe25e6, 0xe0f45679, 0x8959e0fe, 0x4111df4d, 0xae24522e,
3200 0x5b354f8f, 0xa7654d70, 0x7dc0e170, 0xff45b785, 0x2dff8a56, 0x0fcaf8a5,
3201 0xb620fdf5, 0xad67ea8c, 0x885f4e9c, 0xac1abefa, 0xbafca13c, 0xd23b7565,
3202 0xf710f4e7, 0x571b8c60, 0xe1a7c931, 0xfd08b843, 0x0da6478a, 0x4e61f4e6,
3203 0x0efb4f29, 0x7c14fdf4, 0xcddbed8e, 0xe1ae5b6e, 0x2331763b, 0x6d72fe38,
3204 0x0a3b807c, 0x8953d5ed, 0x9845ff60, 0xafa4a15f, 0x85576037, 0x7c8857f0,
3205 0xf2df7973, 0x5d6f9708, 0xa633fdde, 0xbebffbe3, 0xbf07e5c3, 0xe0057b43,
3206 0xf7a60c0a, 0xa40966fb, 0x102c2c0f, 0x98b7ae49, 0xbe36b935, 0xe004f9d7,
3207 0xeddd7096, 0x3fec17e3, 0x764ff08e, 0xf87af16c, 0x565f442e, 0xfe8e78e1,
3208 0xbb72e9fd, 0x04ff9358, 0x6cff28c9, 0x81fb9713, 0x8f1f09fd, 0xbffd984b,
3209 0x15e50678, 0xaff713e4, 0x7b365fcb, 0x6f9fde70, 0xbddef03f, 0xb79fa720,
3210 0xd46a72e8, 0x5a72e19f, 0x8b0273b2, 0x639fa724, 0x3924421a, 0xe511e785,
3211 0x3e20e954, 0x4fe947fe, 0x85377f1d, 0x87d74fe1, 0x5c31e103, 0x7459fe1f,
3212 0xf087d446, 0xd7961de7, 0xbe74ff9f, 0xf4adf9d3, 0x29431597, 0xa5f3a63e,
3213 0x7c7d77ce, 0xbf5df3a9, 0x7f01a378, 0x182defe1, 0x3cb80183, 0x4714cdbb,
3214 0xf7c3df28, 0x43bbe17f, 0x4f09e3a9, 0x58c65a6e, 0xf8d4a1d3, 0xac3fbad0,
3215 0xded612de, 0x84f7561d, 0xd586f7b5, 0xcbed0dab, 0x3cc80edb, 0x686025af,
3216 0x8678ae27, 0x1228327d, 0x5fb9fabf, 0xec85fada, 0x7a50be43, 0x4af37be9,
3217 0x3c63b3e6, 0xf148af7c, 0xf1c01e91, 0x67a7182a, 0xf31f867b, 0x3c6c1a24,
3218 0xf6a3d4ee, 0x6c5ed03a, 0xdef5e588, 0xea157904, 0xaf79fd3d, 0x7af5c78d,
3219 0xd88ebd3c, 0xd8edfb10, 0x76f4911e, 0x8f4d9f87, 0x8ac267e4, 0xc1d47242,
3220 0xe3cf7a06, 0x2544d3fd, 0x5fc6057d, 0x8617449a, 0xef6a8a74, 0x419e6071,
3221 0x3bac9ecf, 0x45f3c0e7, 0x8db48a6f, 0x7b7683d8, 0x2dc7920c, 0x77f88725,
3222 0x53df329f, 0xbf7e3193, 0x4579fb87, 0x11ecc36b, 0xa9f896b6, 0xa32e5958,
3223 0xecbf053e, 0x82ff71b8, 0xd6a945cb, 0xe326c95f, 0xdc7bfd7b, 0xbdfb45c1,
3224 0xbdf18b74, 0x34078b57, 0x863272eb, 0x71fcd18d, 0xf4d28f1e, 0xe73134f2,
3225 0x8f4039ce, 0xc322c39e, 0x7b33fbfd, 0x99c7a244, 0x9ebf7ced, 0x23d7f6e2,
3226 0x3e92f77f, 0x89d4f1d4, 0xac0f24f2, 0xfd5f3aaf, 0x9187bcaf, 0x987d766f,
3227 0x3b2833fb, 0xfd907d77, 0xe6ffac5b, 0x590ff4fd, 0x5e53f6ff, 0x493ed1b7,
3228 0xe276ebcf, 0x7fbd9ef7, 0xeb187f4c, 0x9f142dbb, 0xabfd79ee, 0x9e9fe45c,
3229 0xd4129695, 0x80433d77, 0xec1f68fe, 0x83b72afd, 0xa27ad7d6, 0x99251fdb,
3230 0xfe7b47db, 0x8f10b1f6, 0xed0acc25, 0x49a3d786, 0xb35eaa9e, 0x67ad3c51,
3231 0xa17957ef, 0x9d77ff76, 0x7fb6a54f, 0x736763d9, 0xb17c2276, 0xeaa7df7c,
3232 0x5f3fd7b7, 0xad17f98b, 0xf085e4fb, 0xbeefca7e, 0xda3d45c9, 0x43db93b3,
3233 0xe78ee6dd, 0x68ee7f70, 0x6695dcfd, 0x0a3773c0, 0x9bac0a55, 0xa014cf0d,
3234 0xcbc7f4dc, 0xbc271437, 0xfcf47c52, 0xc10f835f, 0xdd9df5cd, 0xde70156f,
3235 0x21fc7f5f, 0x2dd785ea, 0x7cfa97c4, 0x25a96f3f, 0xf372e57b, 0x9c799876,
3236 0x799dffe4, 0x992b810b, 0x3ff328f7, 0x2d7fbd37, 0xe12e8939, 0xcf9fd072,
3237 0xf5443ef7, 0x822eed97, 0xfdf90af7, 0xf9f27ff6, 0xefba6b7f, 0x2e3bba04,
3238 0x7ff2ef3f, 0x4c0f79f2, 0xd7ef37f7, 0x7e62aee8, 0xbeefd54b, 0xadbef821,
3239 0x4ffb5b9e, 0xcd03ef2e, 0xd7ebb75f, 0x994d5c98, 0xaf439f18, 0xc569d601,
3240 0xc311b33e, 0xcc466b85, 0x14ced154, 0xf52bf6c3, 0xfb99af72, 0x5bee224d,
3241 0x086f9c62, 0xcd31f38f, 0x3d2da28f, 0x8a525a18, 0x94958ec9, 0x96bedc55,
3242 0xc06eed5c, 0x176b9acb, 0x887728b8, 0xc5ea3d8d, 0x1764da7a, 0xfcc3afc5,
3243 0xb9817ac9, 0xa56fb005, 0x8c396f6b, 0x84798dfe, 0xa5c96029, 0xab9618f2,
3244 0x59a4b8b5, 0x8f7e0d95, 0xdbac6392, 0x45bac69c, 0x38cacfeb, 0xe624d6fc,
3245 0x38b4f8c7, 0x798abf72, 0x8918e26d, 0xb1b75009, 0x17fa1f26, 0xf7e32496,
3246 0x1ec0311b, 0x5abdcf12, 0xe1f6f63c, 0x1bbb6c71, 0x44d238f1, 0x2e4a6b71,
3247 0xfcb8bc25, 0x8d9e786b, 0x55d788d5, 0x094f88ed, 0x7f6e5ffd, 0x34ccdf91,
3248 0xbad2597f, 0xdc984690, 0xcd3b6336, 0x9d2cbe4f, 0xcbd25d38, 0x332d3a35,
3249 0x43a745d0, 0xe818fa04, 0xdbf9e3a2, 0x2e9c27d2, 0x6fdff8e1, 0x07fe1276,
3250 0x974e97a2, 0x50cdc534, 0xbf9acd5e, 0x49fd1530, 0x1879a7ac, 0xfe6b33ed,
3251 0x66ef1482, 0xea93a43e, 0xf42f4862, 0xb7e002db, 0xf3fb7efd, 0x7aea2714,
3252 0x081dd8e9, 0x456fd94f, 0x75fc0566, 0x00b3b76f, 0x65f92f7e, 0x5b4b43f4,
3253 0x33fb8a45, 0x57779029, 0x6eafbec8, 0xcafd97f7, 0xdd29f34e, 0x06dff169,
3254 0xfaee97df, 0xb0ec9724, 0xd7e4bd95, 0x38125ef8, 0xb91d7ddd, 0x2a5bafb8,
3255 0x9c23ff71, 0x9e65625f, 0x3bb9d027, 0x6dc60e7a, 0xdf3c6d84, 0x1ee5b4b6,
3256 0x7f90c5b3, 0x91dbd666, 0x28bdf05e, 0xc213be50, 0xa9e79a17, 0x2f9d1dfb,
3257 0x36be1c0a, 0x76f31fb3, 0xe8edb74b, 0xe953f8c6, 0xc30b8b51, 0xbedb55d2,
3258 0x298dfda0, 0xd1d97abf, 0x68b6fe41, 0xf3f43f88, 0xc489b7fb, 0x15ad951f,
3259 0x9d4087e4, 0x25b2a2f8, 0x72ebfc72, 0xafd969fe, 0x01f2eef6, 0xfd7ecb0a,
3260 0x5be30382, 0x3ab7dba7, 0x76dfffc8, 0x3f5bb8e9, 0x91e5bf3f, 0xa7f9fa4b,
3261 0xbfe01ff1, 0xc58720dc, 0x220db649, 0xcbe0047f, 0xadef948b, 0xcbd95bf3,
3262 0x38c39f67, 0xcfcee774, 0xcb78439f, 0xe7cbfbff, 0xaf609fd0, 0x88add4db,
3263 0xa5de9797, 0xddfe9e38, 0x9dc7992c, 0x817c5fbb, 0x1fdd9fe2, 0x7f01df80,
3264 0x4a9ef7ba, 0x7bb27f47, 0x1889d7c7, 0x77be592f, 0xef9c60da, 0x0ca757f2,
3265 0x88f41166, 0xfadf225e, 0x1afe20af, 0xad03af4e, 0xe9efc807, 0xdfa37a02,
3266 0x69b717d9, 0x3071e0a9, 0xd9af16a7, 0xddce391e, 0x7ad33e2f, 0x8d379dd7,
3267 0x72ecd2c7, 0xd3882bb2, 0x1c7403bc, 0xdbf4057d, 0x7fe688fe, 0x175fa646,
3268 0xb4e803fe, 0x677e8c2c, 0xfcfd175b, 0x3ad77c19, 0x4d38c068, 0xa6f00ae0,
3269 0x27bfd1c7, 0xa3227fbb, 0x25fced7c, 0x6e90c5c5, 0xbb44c1b7, 0x8e9b3e5f,
3270 0x9a9f0ffb, 0xe7e7ef7b, 0xc62a2c32, 0xbef74a1b, 0xfdd3f24f, 0x538a11ea,
3271 0xdd9e2d33, 0xf0fefacd, 0x5396a3f8, 0xcec5b559, 0xfe1a3be3, 0x74e3fe31,
3272 0xce2d73d0, 0x8f58f9c3, 0xf7140cff, 0xde799569, 0xafdf1e88, 0x16a1f2d8,
3273 0x4bd2094f, 0x3a748498, 0x08fdc976, 0xe22a0f1d, 0x1c686261, 0xad7c7233,
3274 0xd1adde2f, 0xf187e90b, 0x2538becb, 0x6e30d3d4, 0x67de17e5, 0xf741f411,
3275 0xecff1e66, 0xa3ce4736, 0xbf9ae3d2, 0xff53970a, 0x2f33c595, 0xc5b7ff07,
3276 0x52765f8f, 0xea78e1bf, 0x8f5910bc, 0x75f32dbf, 0xc5f7aaff, 0xbe4305ca,
3277 0x7bc9b941, 0xa2b1f904, 0xcfcc98f5, 0x52f3f0a5, 0xb53b7cfa, 0x97ced1bc,
3278 0xad778a44, 0x7a40396a, 0xe85f5c3c, 0xf0e1a6fb, 0xade0d09e, 0x44ebe36c,
3279 0x5fbb4ee7, 0xf73a7e81, 0xae7e26ef, 0xe28c7edc, 0xfdb6876d, 0x5908ee5a,
3280 0xf09d7157, 0xf9dfc087, 0x1e5cbeca, 0xec79e5b7, 0xd19ce3e1, 0x9ed561f4,
3281 0x6d54e3c8, 0x4e30c2ff, 0xe645af99, 0xc7a5fdeb, 0xefb92d3b, 0xb74efec1,
3282 0x79e6199b, 0xa7116e9e, 0xf5173a47, 0xea6eb6ae, 0xbd707ee7, 0x23fd7ca4,
3283 0xf8cc5cfc, 0x1f28a3b7, 0xe991f97e, 0x63c4c61f, 0xfe878409, 0x9f396b5a,
3284 0x9dc4feb6, 0x3d6ef48a, 0xeb88af72, 0x6fc42ed4, 0xf79f9d88, 0x3b14f54e,
3285 0x8fbc85e8, 0x5d91e33c, 0xc4cdf5c3, 0xfc0326a3, 0x5c60ce30, 0x1fa1ea07,
3286 0xf982a73c, 0xe88f086e, 0xf08e9c28, 0xb549aa88, 0x61e7fd09, 0x5e743c56,
3287 0xacd7ef40, 0xb003cf1a, 0xd89ce30b, 0x1e4cd24f, 0x8bbe4c47, 0x3cfd3e97,
3288 0xbf94714e, 0xa059e60e, 0xf02cd378, 0x7d7d927d, 0xe78641c6, 0xde5126bf,
3289 0x78c59676, 0x554bac6e, 0xdfd0267c, 0x596ce4cf, 0xf949d937, 0x4258d707,
3290 0x20580ff3, 0x6f51f917, 0x587defd7, 0x7e1a427e, 0x1a88fd02, 0x7e5a597c,
3291 0x21d610c2, 0xc9bd7da0, 0x0e27cfce, 0xf84de255, 0xbd9af3fd, 0xec3f9fa9,
3292 0xec315e77, 0xcee5e29c, 0xc94fc627, 0x05d43a5f, 0xcf7ab4fc, 0x8f5fcc14,
3293 0x477f27bf, 0x12798aaa, 0xe7829e7f, 0xc85fe257, 0xf50c931f, 0x9c1fab13,
3294 0xc8fff54a, 0xf50e931f, 0x8dff1a6f, 0xca04cbd7, 0x3d582d57, 0xebf22a7a,
3295 0x2cf9cb55, 0xce5188c0, 0x75bc40ef, 0x7bba3e79, 0x1ff31391, 0x5f8e657a,
3296 0x4376c1e6, 0xa5bc7126, 0x40ed1f29, 0x75350d3c, 0xfe7f22d4, 0xb157ef7c,
3297 0x4c9c17a8, 0xaca8fc25, 0xc1fa455e, 0x2f1749a3, 0x9e174791, 0x93eba64f,
3298 0x01f78acd, 0xf991e384, 0xe05ce823, 0xad332533, 0x98cf5f3c, 0x78d4c0c7,
3299 0x469167a2, 0x1ad3844f, 0x58bf8f92, 0x5cfcc9f4, 0xafa6934c, 0x9e38aaa6,
3300 0x2f172be0, 0xe1edf75e, 0x4be7507a, 0xc8695ced, 0x1087c679, 0x7de29f5e,
3301 0xffd092c8, 0x161de33c, 0x9f7c0acf, 0x1d3e7c5c, 0x9f3f5bf9, 0x91ce7e18,
3302 0x48a6bd49, 0x76b35ff6, 0x782071ce, 0x2aef563d, 0x77f3371c, 0x41879dce,
3303 0xc91746be, 0x1ccd4c2e, 0x827c62bd, 0x5215cfc4, 0x4695439e, 0x971324bf,
3304 0xa310f643, 0x8b1ed67d, 0xb9bf46e0, 0xf49541e7, 0x6dd15a77, 0x44f557e4,
3305 0x3e60b467, 0xfcc3cf50, 0x4c66295c, 0xd90d1ca3, 0xbf401313, 0x5ce0e40f,
3306 0x339c1c98, 0x71c673ae, 0xdb3a2e7b, 0x553fa83a, 0xb00c0feb, 0xe0b9e0c4,
3307 0xe5eb911e, 0xc1271a9e, 0xf6f98431, 0xa57efae1, 0x18b56de3, 0xde02fdcf,
3308 0xe8bc405f, 0xc0e5ff78, 0xa3457bf4, 0xe8912bdf, 0x74fe7e17, 0x6bfbc5be,
3309 0xf8aa7f6c, 0x15742ad0, 0x869dcfc3, 0x6a4ab5d3, 0x78ae88da, 0x682f9ee2,
3310 0x36e9d19d, 0x412b857a, 0xe3a0641a, 0xe8efd8eb, 0x10985f3d, 0x4f7e9d5e,
3311 0xfdef900f, 0xcf5f0b07, 0x9c4bc7c2, 0x8de291d3, 0x1060feb4, 0xcf58212e,
3312 0xf8d1e6b5, 0xde3c4d83, 0x10bdbfd3, 0x7fd03e71, 0x30f2a5e6, 0x2fde5573,
3313 0x50fdffe0, 0xf110ffbe, 0xfe22223f, 0x03bc463f, 0xf6c63ffe, 0x4fff8057,
3314 0xdd7f852e, 0xf4d32fae, 0x2bee1942, 0xc5fcff01, 0x13313339, 0x15142dc6,
3315 0x5b25ffe2, 0xd21f6d45, 0x62725b7d, 0xb92c8f50, 0x199f7abe, 0xb3c970f8,
3316 0x9169f102, 0x73fd5e76, 0x784b5ced, 0x1cf15f5e, 0xcbc9e91f, 0x49f9f7e7,
3317 0x336d950f, 0xe410bf3e, 0xc7ca74db, 0x93f3f1f5, 0xe11726a2, 0x68a33ff8,
3318 0xd628a2fa, 0x0e9c2ed0, 0x864daa43, 0x29e4f03c, 0x9f90fd7d, 0xbe726497,
3319 0x3fb5f14f, 0x07c61998, 0xf8fc52dc, 0xbc63e200, 0xcdfb1530, 0xef56e4d7,
3320 0xe30ae86f, 0x33e19f3a, 0x6acbfb9e, 0x1bfb9e34, 0x686294de, 0x4c86cd7f,
3321 0xfe91fbc3, 0xafef0d6b, 0x50d636db, 0x8372d51f, 0xb6e8fda1, 0x4c7d4302,
3322 0xfb4316e0, 0x1a678771, 0xefda13ea, 0x789fb435, 0xfde18174, 0x86a51df5,
3323 0xba7e37f7, 0xa9bf50cc, 0xed0d5ff7, 0x5eb88b03, 0x94935fdc, 0x740ae786,
3324 0x2a5fecbc, 0xbe7c549b, 0xe6a4db34, 0x744f3e86, 0xccb1733b, 0x357fa373,
3325 0xb14cbc90, 0xae85a726, 0x6cccf9cf, 0xac536bd0, 0x55817ac6, 0xe07497e3,
3326 0xcdfe2017, 0xa55ca356, 0x026bcf56, 0x2ca59bb3, 0xd2f94619, 0x58b75f20,
3327 0xc5bb7eb9, 0xedfa657a, 0xaa7f6c4e, 0xece74032, 0x444be5c3, 0xd2a2caf9,
3328 0xcca9fb47, 0x1b96f945, 0x4d3e466d, 0xccaf401a, 0xc3cf1ab3, 0x9b61ea8b,
3329 0xfd139064, 0xd0a8f9f9, 0xdbe2c2e7, 0xa0676f28, 0x05a4e57e, 0x7d016eb7,
3330 0xa97b2729, 0x9aaf9fd4, 0x97988a63, 0x3bf590f7, 0xfa1b49fa, 0x210f4fd9,
3331 0xde92bb7e, 0xccf30a7e, 0x92f5e72a, 0x316c94bf, 0x775825e2, 0x5479e60d,
3332 0x508e7e4e, 0x54dcffe5, 0xae2b78d3, 0x173cfaf7, 0x1133307d, 0x06d203f3,
3333 0xd55e9ff0, 0x4d5cf1e6, 0xc345adc9, 0x14d53fb0, 0x7a45bf7a, 0xfd10aaa0,
3334 0x1e5aa198, 0xc8a653f4, 0xd53f4af9, 0x0a8c19fa, 0x5503ed14, 0xaba0fb21,
3335 0x048723f8, 0x9377f8f3, 0x17c8a7f7, 0xe7b7460b, 0x6ecb73f1, 0xabb24cd7,
3336 0xd75f8254, 0xe78ae943, 0xe92bd429, 0x66731249, 0xf06787f4, 0x06636f3c,
3337 0x338fafbc, 0xf7aa14b9, 0xe59e380a, 0x820d8cc7, 0x5bffeaf1, 0xf7eaf824,
3338 0x3cf94f5f, 0xe29aa516, 0x993cfaa7, 0xc7afdfb6, 0xcd26cf8b, 0xd63c418a,
3339 0x6e77db5f, 0xacfd6187, 0x7ec76de2, 0xd337aecf, 0x8205f5b8, 0x6f3ebde1,
3340 0x741dc369, 0xe15d2b1e, 0x79862ef3, 0x3496dc23, 0x73fd570e, 0xb8234b02,
3341 0x43d2f7fe, 0x8aecbfe8, 0x0dbc6176, 0xe889b1f0, 0x6738ceed, 0xf30f27d2,
3342 0x34a418aa, 0x25fb21af, 0x96fa1fb2, 0x4cdbaf95, 0xf688959d, 0x4635f254,
3343 0x66f5c5b8, 0xc51707f2, 0xe0af942a, 0xd1a159af, 0x55ef38d5, 0x9cef3349,
3344 0xbdd4f00b, 0xfd4c3223, 0x2d347671, 0x15df043d, 0xfcbb46b7, 0xef78fece,
3345 0x01387272, 0x6e10b7ee, 0xcd214371, 0xdc21da9b, 0x33d8173f, 0xde77c819,
3346 0x14ff44e9, 0x977dc313, 0xd3fff870, 0xefc4e3ca, 0x879a5558, 0xeb7c549c,
3347 0x16584196, 0xb51ddc91, 0x7fceb80e, 0xfcebe568, 0xeb08d687, 0xfdeee5fc,
3348 0x7ed39f28, 0x6dd14b08, 0xeadaecd2, 0x197b50ec, 0xec49d6f4, 0x318baf57,
3349 0x7ec5ce3f, 0x3ccbb607, 0x9719d94d, 0x1ed0cbb7, 0xedd3fe43, 0x8d5abfb1,
3350 0x9e886476, 0xb3d34afd, 0x9ea15d5f, 0x4eed80bd, 0x68881bdd, 0x91c824c7,
3351 0x1b38dcf5, 0x2a957fc7, 0x1be3ca33, 0x6d9f9e20, 0x0e1f6c8b, 0xce5d0eb4,
3352 0xd68cc8cf, 0xefd754f9, 0xc560dfdc, 0x9c2fed32, 0x247fe0d9, 0xe329f71b,
3353 0xedde5187, 0xaea4fd40, 0xf10d83f8, 0x886de3ab, 0xc04f88cd, 0xf9c6d3a3,
3354 0x648b69c4, 0x1e03960f, 0x0e3c064d, 0xd903f6c7, 0xdfad5783, 0x6ee78c4b,
3355 0x837c35ba, 0xbc71979e, 0xce3ebbae, 0xe545b8c3, 0xe7a473ec, 0x399c7aaf,
3356 0xf74475c6, 0x011c61bf, 0xd77ddfe7, 0xb7716b7f, 0xd5178a0e, 0x0c4d7abd,
3357 0x0a2aa7c6, 0x9586f4fa, 0xa49985db, 0x5976bb07, 0x576708dc, 0xece7cf1c,
3358 0x10f135da, 0xaf3e39c6, 0x85299c39, 0xaf5d2dd8, 0x4333c91c, 0x8f3b5d7f,
3359 0x209449e4, 0xd17e27e7, 0xfc5c57df, 0x128f3ccf, 0xc7d0273c, 0x0ebe566f,
3360 0xf8f1b7ad, 0xc798d3c9, 0xf7b19a36, 0xfaf963a3, 0x1c7a6891, 0xe3bf479f,
3361 0x7f7ea1f3, 0xc7e57054, 0xdd262b00, 0xab664c55, 0x00a68de5, 0x6e0a8f96,
3362 0xbe55e311, 0x4d3cfc91, 0x911b1652, 0x4728fd01, 0x8e0803db, 0x8dd7a3a3,
3363 0xa7ea29db, 0x0b2c3eea, 0xc402ef14, 0x2baf5c7b, 0x37fc7d09, 0xa1b38d87,
3364 0xe14d215f, 0x7e77b77a, 0x29ef1f94, 0x8fb9344a, 0x6767aa80, 0xc58c2f0e,
3365 0xe68b7ff7, 0xd258f2f2, 0x8e5c2689, 0x38a03970, 0x5a669bd4, 0x710d96df,
3366 0xef822f27, 0xe7884d97, 0x9805e97e, 0x9639c87d, 0x0967e3c7, 0x00b90714,
3367 0x14e78178, 0xb53e02fa, 0x3317cc4b, 0x89b0f416, 0x0bf055b9, 0xee4293ec,
3368 0x68ffc1d9, 0x4d60fc76, 0x4d38f6ff, 0x45e0333e, 0xd5db1976, 0x5c0cee09,
3369 0xfc81774f, 0xb4fa030d, 0x7ca958d5, 0x184d46ad, 0xa7b8f206, 0xafea8926,
3370 0x0ca938d7, 0xe7a08cd4, 0x545c6bfb, 0xa7b5368f, 0x552c7ad3, 0xfe879baf,
3371 0x0b12fdf5, 0xbc23b7bd, 0x8e567bc4, 0x97f9c887, 0x0093e62e, 0x3d352fae,
3372 0x38d6fb52, 0xc6a7afe2, 0xfd31d400, 0x8ad9ffbf, 0x054d643f, 0xa3fa983d,
3373 0x415359c3, 0x78129f8e, 0x181e02fe, 0x552e748e, 0xb7329f2f, 0xf0a9a2c4,
3374 0x4df31b6b, 0xc8bcc24d, 0x8e153fde, 0xe8f6cc61, 0x1d4ea69f, 0xfdc7f309,
3375 0xf6c614fe, 0xc7abdeda, 0xfba9d873, 0x818bab3f, 0xfc6dc8f9, 0x82899f3e,
3376 0x7d4056a7, 0x0bf39b33, 0x98b53c93, 0x3773d9cf, 0xbefee273, 0x1b5ece3e,
3377 0xdb7613b7, 0x51399db8, 0xe6c1fce0, 0x411e5aca, 0xbae86e6f, 0xef3ede11,
3378 0x8f74d7c0, 0x2fb78c0f, 0x2f5e30d5, 0xfa0711c5, 0xd7ff752e, 0xe95c8eb4,
3379 0x491f3d77, 0xc4847cfc, 0xe6ba2bf3, 0xfda66e26, 0xba1f6878, 0x4723da8f,
3380 0xd2ded7b6, 0xed0681d6, 0x659fb7be, 0xa68372f0, 0xf5c62457, 0x05d16bff,
3381 0x61b947bf, 0x5fda38de, 0x09e2d3aa, 0xe57a3a93, 0x2f7e76f9, 0x13d43e5c,
3382 0x3c04784e, 0xd1a5d70f, 0x1e605533, 0x6048ffcc, 0x28028433, 0xdbcf36dd,
3383 0xc2d24fd8, 0xd197be4d, 0x7165d85e, 0xe3a3d9a2, 0xd903eeab, 0x6121fa8a,
3384 0x8fda31cf, 0x643a13aa, 0x8f97f7a4, 0xcb714d7c, 0x3275733a, 0x1b176dd5,
3385 0xbdb4feb0, 0x99d6237a, 0x6fa9ebef, 0xd60c3f00, 0x13e3e1ce, 0x90bb63d4,
3386 0x3b5829e8, 0x7e06ef57, 0xf5e665d8, 0x4b391f2f, 0x5ccbb1fc, 0xe18d9f3d,
3387 0xef987af5, 0xaa6f58ae, 0x52905409, 0xe1fd65fb, 0xb7aeb09b, 0x77da92ff,
3388 0x3f6e54db, 0xa40cde2a, 0x855d5f7f, 0x2ea43dba, 0xf2b33af1, 0xc55f9f52,
3389 0x7f29af81, 0xe70f72b8, 0xce1bc447, 0xc3cdef13, 0x7a8ce975, 0xa4eb51d4,
3390 0xd73673b8, 0x9f0301d7, 0xb753e7e9, 0x2a2cbc98, 0x085ecf44, 0xce42ff5b,
3391 0x84a8b1d9, 0x38b4fe90, 0xbb033a76, 0x6f182b34, 0x2a2e64cd, 0x950f3187,
3392 0xee96dbd9, 0xbb2db447, 0x7a89d5af, 0xfad73e2b, 0x68e89780, 0xd09e1ff4,
3393 0xe8fae2f4, 0x01a31bfc, 0x7782f59e, 0xf17a888d, 0xe74ab365, 0xb2243a2f,
3394 0x35b53b37, 0x5330ad8c, 0xf73b5cbd, 0x5de95e6d, 0xeef51233, 0x19ab9322,
3395 0x4f0cb3d7, 0x2fbe19be, 0xaae19ddb, 0xe7bcc165, 0xc496d8b2, 0xef304ab1,
3396 0xaa3faf59, 0xb546d9f1, 0xd2f786c9, 0x9543fbe8, 0x71d2eb6d, 0x7db3fb7f,
3397 0xbd3c901f, 0x7c41951f, 0x447ad15c, 0xbf69daf6, 0x29f3c64c, 0xd6fad99f,
3398 0xbef75a3f, 0x0b74196c, 0xeb2ff5ea, 0x79b8744d, 0x06f43d20, 0x38373fe8,
3399 0xac6a87c8, 0x5dc2fe54, 0xde9a2d7d, 0xd3295105, 0xbfb4606c, 0x9156e990,
3400 0xb9ade68f, 0x7c0ac1a6, 0x8eac82f4, 0x179b3e44, 0x5b7c4b95, 0xbe722b16,
3401 0xdd07b964, 0x0dcfb692, 0x6535d4f5, 0x3c53bed3, 0x6f68c8be, 0x88526d54,
3402 0xc80ec00f, 0xdca83e47, 0x7ee1f260, 0x4edac9a2, 0x45e77de7, 0x368fcd31,
3403 0xaf5c4f9e, 0x6cdf3be9, 0xdcbddf1e, 0xf392c539, 0x511e7451, 0xe51fbfaf,
3404 0x9128be24, 0x55ffb47c, 0xe741de72, 0x38fbbf18, 0xc879c356, 0x0428e3fe,
3405 0x794e3e87, 0x57d21c70, 0x27ec1fe5, 0x6b8df83f, 0x4dd67b75, 0x3be5ac71,
3406 0x9b05fcb4, 0xf3f6307b, 0x1827a6b4, 0x7780b1fa, 0xeeafa329, 0x1ccf4093,
3407 0xf933d3ec, 0x90d3530d, 0x6cf7c1be, 0xb90f4192, 0xc1d3a025, 0xfbeead28,
3408 0x51f6e47e, 0xf533ed61, 0xa986ccfa, 0xf3c3fb93, 0xb7582db4, 0x1be97b42,
3409 0xe11d5f4b, 0xa1f573a3, 0xe3e9c5fd, 0xe9fd4bdf, 0xb51a97fc, 0xf80fa0f0,
3410 0x27ac60ef, 0x7a7cf31f, 0xca273367, 0x8d4966e1, 0x21d08572, 0x37af8a35,
3411 0x35afe725, 0xf7883fe0, 0x4ffd035c, 0xfb0d38d5, 0x968b8b8a, 0x549879d1,
3412 0xc7cc5e9d, 0xca6d77cf, 0xfe27ec32, 0x16ae387f, 0x7000f70e, 0xc307fd4c,
3413 0x5e30c231, 0x031c8e10, 0x870b577c, 0x7a6b3b18, 0x8f6bda06, 0x280f2898,
3414 0x66b3e4d1, 0x6ff65da2, 0x0ca78a26, 0x880f3c67, 0xfb0de329, 0x2c7b99b4,
3415 0x9efe31f3, 0xd2c3b129, 0xb7279458, 0xa9d716b3, 0x5f64489f, 0x39ab73c1,
3416 0x726e870e, 0x204ffde3, 0x665fd495, 0x1f82b7b9, 0x82fbe6f2, 0x70d33efa,
3417 0xbde3e595, 0xe7a39ba0, 0xfb8d18df, 0xaa1e7366, 0xe7983cc2, 0x352ff195,
3418 0x92bc8330, 0x2c20d21d, 0xabe33b25, 0x701b87a8, 0x147076bf, 0xf6045bb7,
3419 0xe4e1c370, 0xbcb9ef48, 0xf0f35b9e, 0x341b8c34, 0x8b5e74af, 0xcdb353fe,
3420 0xf31fb2df, 0xe8531e76, 0x47acd6de, 0x50998dfd, 0x6899d717, 0xfd6314bd,
3421 0xdf719adb, 0x176cc9fd, 0x68cd11da, 0x47fb60bf, 0x566bf214, 0xf0d338d5,
3422 0x6d3a927e, 0x76b2d81d, 0xc1798ab2, 0x87148af5, 0x732addeb, 0x773c5cf5,
3423 0x8dd1ee31, 0x51ebd60d, 0x071ab98f, 0x949ebca9, 0x339aeb8c, 0x7b463ad3,
3424 0xae68c80f, 0xb1a8a675, 0x6ff0fac1, 0x3d20fac0, 0x9dc1b1b3, 0x2b2efd86,
3425 0x883bfad5, 0xe2178a71, 0xef68bc34, 0xd2f4fb33, 0xcbcc06c6, 0xf5836b12,
3426 0xaddf30a9, 0x353d72cf, 0xfb47fa18, 0xc3e3e60b, 0x877b057b, 0xca4e744b,
3427 0x603b6306, 0x9991b67e, 0x0cd7dfb4, 0x2bef117a, 0xdfc91dee, 0xf234fbeb,
3428 0xd3ed1370, 0x6f5c7b60, 0xbdbcc96c, 0x57df833c, 0x8a15db20, 0x307ac037,
3429 0x149ef315, 0xf371ffa6, 0x8fb6a4b8, 0x01f78511, 0x75a3f084, 0xf73a32ed,
3430 0xdc661d69, 0x8cd3979f, 0x16798975, 0xaa27bfa0, 0x4637e7c6, 0x8341f96b,
3431 0x6dda0a58, 0x133e4dc3, 0xfcc91bb6, 0x02c75e54, 0x628d8f64, 0x8d1f541d,
3432 0x1e16635e, 0x41d2725b, 0x2dcc71ab, 0x47aa38f2, 0x71313b44, 0xf2471eae,
3433 0x74be414e, 0x61766b47, 0x7e3fef0a, 0xf7ca2cc6, 0xcdef69f5, 0x313d8633,
3434 0x7eb5e60d, 0x50ceddc6, 0x2f5f4efb, 0x48adfb75, 0x68cbf983, 0xa0bda221,
3435 0x364575db, 0xe5984f5e, 0xc6147a7e, 0x26cddb11, 0x58ad9fbc, 0x6f16638b,
3436 0xbb444fc8, 0x5cdf68ac, 0x44d787b2, 0xd16cbb73, 0x77b219fa, 0x9af79e14,
3437 0xfe7f764f, 0x183109ba, 0xb9b06fa7, 0xfe47ae62, 0xdfbf23fd, 0xb1ed4af5,
3438 0x0a6bc4e6, 0xc19b1e50, 0x8ffbc6af, 0xcadd9a0e, 0x758be418, 0x6ccec8c3,
3439 0xc7d6f28e, 0xffcdbf42, 0x41d574ea, 0xf73667fd, 0x4e3823f8, 0x8f7f1443,
3440 0x6f2126f7, 0x3ff7edf6, 0x1e8c5c2f, 0xfdf0fc78, 0x91b183fe, 0x43bdf1ef,
3441 0xfed05fc3, 0xd9dd90f0, 0xdcc4f660, 0xcbbdf087, 0xead679e7, 0x112f5189,
3442 0x86b4fb67, 0xd67603e7, 0xe64058b8, 0xbd62d1f7, 0xdd3f68a4, 0x22d25caf,
3443 0x097cdc50, 0x3a3d226b, 0xeed5894c, 0xc5e631a7, 0x4dbd1696, 0x795b4bed,
3444 0x42d632fb, 0xe17a75ed, 0x8301b5bd, 0xf0ce3a1d, 0xdcd11dfd, 0x78acdd6f,
3445 0xfffb431f, 0xc4d91991, 0x1167c04f, 0x07e22df3, 0x31b977d8, 0x371faf9a,
3446 0xf6c8db62, 0xb863f128, 0xe05cb87d, 0xc207b3e7, 0x9379d553, 0xde0a3d61,
3447 0x7ad3219f, 0x49f9add4, 0xeb7c9387, 0x7ff9846f, 0x244af59f, 0x23bddaa7,
3448 0x425f8275, 0x33befaf9, 0x2d1bdeec, 0xa6ba680f, 0xcb43fe25, 0x6b3ef9ef,
3449 0xfd0dc379, 0xf402cedc, 0x9eed61dd, 0x48a41412, 0xafd01979, 0x3adc1f41,
3450 0xddbf58c2, 0x39dfac65, 0x7d3df229, 0xb4d46b6b, 0xd6aa7bd0, 0xf38e700e,
3451 0x575e8d2d, 0x0b12df7f, 0x0b7bebcf, 0xf9815ee9, 0xc17fb494, 0x1b14faf3,
3452 0xd91ea0f3, 0xfb46cfbf, 0xbc8a5521, 0x55164319, 0xbde2efe0, 0x9f9d8af0,
3453 0x17ff4037, 0x998a05e3, 0x97de0fb7, 0x1251f7c4, 0x3c5a493c, 0x633495c3,
3454 0x1b87b7d4, 0x0bca2afd, 0xdc46d896, 0x27e60d77, 0xe8edef1a, 0x0f38fe8a,
3455 0xcf9863fd, 0xe84f8c6c, 0x3e7d5a71, 0x2c7f28ff, 0x39cfbb5a, 0x346b6e9c,
3456 0xa30ba8f9, 0x39d23d73, 0xb973df07, 0x87bb52f9, 0x43c129ff, 0x26896879,
3457 0xb3ac171e, 0x9c528eb9, 0xea0ff344, 0xf306b8b4, 0x56ef5d7d, 0x1095ecc2,
3458 0xed7d22ff, 0x39f5f5d7, 0x38f377e4, 0x156a2d88, 0x360dc3ae, 0xfaa66ebd,
3459 0x00a6e6d3, 0x5aaffdf9, 0x831f189c, 0x6718ddef, 0x411dcdf3, 0x065d5d7e,
3460 0x0e7bc14b, 0xb4cbb0de, 0x6abdd6fe, 0xd8f5c669, 0xdb76f36d, 0xba49f242,
3461 0xf9d1efec, 0xf9fd08a6, 0xf90dfd0c, 0xf8c1fd76, 0xfd7788ad, 0xa7f61bfd,
3462 0xceff2202, 0x691bf949, 0xa17b1fed, 0x42cbb89e, 0xf7fd4f71, 0xe7cfca0f,
3463 0x7a8cfdd1, 0x4e14137f, 0xd51ace87, 0x8e5d8f90, 0xe507377a, 0x67f49da0,
3464 0x8320cb45, 0x69f5d4de, 0x681bf9c5, 0x57482cbf, 0xb5212e2d, 0x38aa5e93,
3465 0xbc68bfff, 0x349e903b, 0xf7e9124e, 0x3549c781, 0x38e0e3e8, 0xf7700c93,
3466 0xc132671f, 0xdac38fa1, 0x9fe70ca2, 0xae3ccceb, 0x33986672, 0x1e823626,
3467 0x83714bd1, 0x60ff70c9, 0x62b2e49d, 0x4eca75ff, 0x287f3435, 0xef005f7c,
3468 0xf02164c5, 0x867ac1d5, 0xf30b72c1, 0x3d405e52, 0x072213f6, 0x62a5d9a2,
3469 0xf8c262bf, 0xc62ef9e9, 0xbdb945fe, 0x33727d10, 0x8bd82df2, 0x7e3b583f,
3470 0x49ec0f95, 0x4769ecc9, 0x93764aba, 0x6b68f313, 0x45c51315, 0x64ac92eb,
3471 0xca12adff, 0xbd739455, 0x2243a95f, 0x8f7df438, 0x9f29e681, 0xc33cd077,
3472 0x9ffb3bef, 0x76a14f1b, 0x3b57eefd, 0x0f93d730, 0x93545bfd, 0x4e5d450b,
3473 0x2127d853, 0x47ef0ff4, 0xec4520da, 0x8e9dbc27, 0x6ce901ff, 0x3d2070ee,
3474 0x88a5e3ba, 0x951b1079, 0x310798ef, 0x271f4c2f, 0xe00ecd1c, 0x238742f7,
3475 0xe5f48323, 0xa5f50546, 0xdc9fccfd, 0xb4cbd24e, 0x7fafadef, 0x56a984e6,
3476 0xbc6c4f9e, 0xfe206f57, 0x7d62f1d3, 0xf3c641f3, 0x7f94bd53, 0x483c3972,
3477 0xfb43cb82, 0xe2297600, 0x425836be, 0x4938fc86, 0x354fe631, 0x63e21e48,
3478 0x56d54df3, 0x5b4927da, 0x927dc569, 0x063392d5, 0x37ded8fd, 0xf983fec1,
3479 0xbe793a35, 0x6bff786a, 0xb4661ef0, 0xc4531573, 0x06a379fb, 0x34baafb0,
3480 0x77d9acfa, 0xf501fe69, 0x3775c1e1, 0x71524e2a, 0x399b35dd, 0x4bad03bc,
3481 0xe103bf7a, 0xfc7dd1eb, 0x392c1bf7, 0xffae3f56, 0x4a35e3e1, 0xbc3e4f1e,
3482 0x7078046f, 0xcd31acdf, 0x546df84d, 0xd5fd1525, 0xcc5111e8, 0x656fea1a,
3483 0x67f7a2cc, 0xccf1e3e2, 0x8f8c6b22, 0xe3a3979c, 0x1df2b769, 0x186f1ded,
3484 0x8f7f0e5f, 0x7c21e8e2, 0xe84ca9d9, 0x91bb97cf, 0xfc381317, 0x5aa6f7a1,
3485 0xbc458633, 0x7f1fb27f, 0xde4df186, 0xf7e74664, 0x19b94306, 0xeed56efa,
3486 0xb5c0aa43, 0xf2f4fc0b, 0xc2a6147b, 0xe477e6fa, 0xc939405f, 0xcfcfdf6b,
3487 0xf026b4d1, 0xefb51e7b, 0x625dc7c3, 0x12c8fee7, 0xcc654abb, 0xf12ff751,
3488 0xdb5a37f7, 0x5e789ca3, 0xb22e35b1, 0xd763931f, 0xb49a68f3, 0xb41d0873,
3489 0xcfb7a14f, 0xcddcc79b, 0x1b3dc50a, 0x257fe0ad, 0xa9ffb5f4, 0x82023fb6,
3490 0xf9dce30b, 0xf99aebdb, 0x7f3e51f9, 0xfb62ab8c, 0x5c8ec4c4, 0x740efc41,
3491 0xf70cc6db, 0x3b5855db, 0xe7ce51b2, 0x7699bc9a, 0x68eaa718, 0x5bd62247,
3492 0x4e9d3edf, 0xb71d6f7e, 0x47777b37, 0x3fa0dc53, 0x79f96a7d, 0xcc29f3f2,
3493 0xdd3fa837, 0xad00a5ca, 0xd3e7e5ab, 0xcd1c6f99, 0x0b8d67db, 0xc2d3bfbe,
3494 0xc8b1a4d8, 0x884f1c00, 0x30f4489f, 0x7a064ddb, 0x675e3c80, 0x7881e8d7,
3495 0x76b7a3ea, 0x76a74bef, 0xcd71e0bf, 0xf72a615f, 0xa5fbf5d7, 0xe5f7678e,
3496 0x5b7dd05b, 0x13f736e5, 0x3b0b4f78, 0xe6be5222, 0xfefc29c2, 0x771685c4,
3497 0x0b57da0c, 0x6a1453ff, 0xf3937f69, 0x7f0d22fd, 0xf745cc9d, 0xdad6f80e,
3498 0x984ebef8, 0x54f1967f, 0xc23fb8fe, 0x44da8bf7, 0x305f1bca, 0xbf61f145,
3499 0xbf05ed79, 0xe2f9fdc4, 0x773a68c6, 0xae7bf0be, 0x2dd76893, 0xc4e6c27c,
3500 0xfe597bdf, 0x327e6641, 0xc9fcbbf4, 0xdf07d50c, 0x24f0af45, 0x27a05d59,
3501 0x8853db1f, 0x3083457e, 0x0630be7f, 0x0ec7cafc, 0x98b8c2ac, 0xcf94cdf4,
3502 0xf47f506d, 0x615677b1, 0x18b7e9bc, 0xf63b26e7, 0x63b442dd, 0xf4d0425f,
3503 0xc1c03ffd, 0x5a4d874b, 0xa9aac4fd, 0x4daff2a0, 0x2a293568, 0x562765fa,
3504 0xc4d939e1, 0x1318f738, 0xfd8ef78c, 0x6fec42b3, 0xcea313c1, 0xe7f7806d,
3505 0xbec817ed, 0xdf693a00, 0x014f370b, 0xb278bbbb, 0x582d975e, 0x86668f8f,
3506 0x3339be38, 0xd9da3e38, 0x8b7c7aad, 0x718cdd45, 0xd505e3f7, 0x3fe82453,
3507 0xceaea1c3, 0xc4d8c919, 0x1baaf9f5, 0xc476cfc6, 0x98f18cdd, 0x837dbed6,
3508 0x1f18d5f8, 0x03de656b, 0xd37f7866, 0xb66e43e3, 0x07e36202, 0x30a8c679,
3509 0x29d641ff, 0xf4dfa7ab, 0x4463e41d, 0x0d59f3bf, 0x939204f6, 0xf4d28843,
3510 0xc2defc15, 0xe34ef93e, 0x1f57db7c, 0xc3cfc1d1, 0x5e24f5e8, 0x59195d6f,
3511 0xc312dc5f, 0x2a35baf9, 0x4d66fbf2, 0x03be003f, 0x8b6d7f14, 0x08cf0ff6,
3512 0x1f900fea, 0xa79224eb, 0x807f5c75, 0x93b4cd1c, 0xefec46dc, 0xab6bcadb,
3513 0xab79af76, 0xf8c68ee4, 0x30c7ae82, 0xcce38682, 0xfa0d3bb5, 0x017daf39,
3514 0x3151d7e9, 0xc9c7872a, 0xc53093f1, 0xb59847a8, 0xdf743b3d, 0x3cda77fe,
3515 0xe3d3ae33, 0x7439013f, 0x8ef969df, 0x9f9e4bfc, 0x7f38c72d, 0x9c1dbd88,
3516 0x678a54c7, 0xfa17ebf4, 0xbbfd6a73, 0x5f04ae72, 0x15f065ea, 0xdcbaf84f,
3517 0x19fd833c, 0xfbfd2fe3, 0xc17db593, 0x223ae326, 0xa4f38647, 0x7f8027ce,
3518 0x2cfe8853, 0x9ea9f4d6, 0x6bbdd107, 0x064fe524, 0x31e7e5c7, 0xc4bfbe81,
3519 0x81f25ddf, 0x963d453e, 0xc56fb927, 0x71ed79f6, 0xc0efda2a, 0xbf1af56f,
3520 0x3a6fc849, 0xaae35b9d, 0xebbe69f3, 0xfa4bb204, 0x3ada41d9, 0xd024d79a,
3521 0x9e0d99ef, 0x87e715e7, 0x7beba7c0, 0xeb55bfe8, 0xe7e73c7f, 0xf9f8fb67,
3522 0xcd1f943e, 0x0eae679f, 0x1c3d5fba, 0x732885fe, 0xd5eb2109, 0xeb8a36ab,
3523 0x5abb78eb, 0x85edd7fe, 0x25d701f2, 0xf8377d07, 0x84e1c068, 0x1e518b76,
3524 0x7cb55f50, 0xb664f742, 0x7f0c89b6, 0x8de700b2, 0xd74f237a, 0x8795be93,
3525 0x5bb2240a, 0x49d97a82, 0x37ae8bf6, 0xb06b5603, 0x2bb5b9fd, 0xaf51eb0b,
3526 0xc7ecf76a, 0xc7c5a08b, 0x7348e106, 0x9277bb70, 0xddfc4597, 0x5dbb1cb8,
3527 0x8f3423d7, 0xe80a2b8d, 0x6d2a855e, 0xe1d49d3d, 0x345378a3, 0x104271e2,
3528 0x7d7afa1f, 0x15e3a5a7, 0x8197bced, 0xd83af51f, 0xaca69525, 0x7ef8ff60,
3529 0xe7df0866, 0x841f3839, 0xeabbe7d3, 0x0f83c027, 0x0d43f0f1, 0xc75009ef,
3530 0x04982d7b, 0xfde617eb, 0x6b5c50cc, 0x56e04232, 0x104e3eb8, 0x5d8f5c4d,
3531 0x07e22e46, 0x58f7ed31, 0x41cf24ec, 0xe5bb707c, 0xe7168701, 0x3f29eed5,
3532 0xa1390268, 0xcf3e367d, 0xd4c95dee, 0xddad6cef, 0x6f2f4bdf, 0x7496f2d6,
3533 0xb5e2b17b, 0xf846cdd4, 0x1cbb7f79, 0x47792f1c, 0x8ed063dd, 0x5c51ee19,
3534 0xb5e41fe8, 0xf98fdccf, 0xf07bd924, 0x7c820407, 0xe5c2dd9e, 0xc34bb814,
3535 0x43db9bcb, 0xd874adfb, 0xbbfb3975, 0x28fb23cc, 0xcba457e7, 0x5a72217d,
3536 0xbe3850e3, 0xc4167e60, 0xa3d464a7, 0x83f7f97a, 0xcf1fb3c3, 0x3e039525,
3537 0x78eb6d50, 0xbf996d6b, 0x7c7286d2, 0x8e50b994, 0x9be65bbb, 0x315d2146,
3538 0xa219cc11, 0x79f3d61f, 0xf02876e8, 0xe5f20b65, 0x1a10c73a, 0x7751f86f,
3539 0x1fbc0e74, 0xc613768e, 0x7eec5b7d, 0x0efc23f4, 0xe2072eef, 0x14ef5673,
3540 0x8cad4fdc, 0x85b5aeae, 0xdf6bef3c, 0x8f89ed06, 0x1fee22bd, 0xf8c03f95,
3541 0x7cdaf1bd, 0x02cfa9a0, 0x20c855e3, 0x0f5459a7, 0x655ade20, 0x3ef7bede,
3542 0x5611a5fa, 0xf97bf229, 0x95befd60, 0x536df3f8, 0xfd17d21c, 0xcb93b424,
3543 0xee1a4f45, 0x16c1b27b, 0xe003ae17, 0x1fbf1077, 0x06c931b4, 0x4a1efffd,
3544 0xc4d3d3d4, 0x6b8e74a5, 0xfb40965a, 0x8f7fba44, 0xa4fd0b7a, 0x4d17bf3b,
3545 0x3c2ec8fc, 0xd3e30c38, 0x4e9cd109, 0xeb558fd0, 0x1b1d6ac7, 0x48ffbf94,
3546 0x8efe491f, 0x141dbebe, 0xe0e7ea04, 0xd735d74d, 0xd841f885, 0x83ffea1f,
3547 0xa5b48cc2, 0x1f9affc8, 0x7c61f647, 0x7b45dd70, 0xce21ac65, 0xebe0d3e6,
3548 0x0a3e4748, 0x3ed147b5, 0x7d67b3ed, 0x0cdf57f3, 0xf4e2767a, 0x715e0096,
3549 0x6e8acb5f, 0x6fe817fe, 0x36b3d81a, 0x8d3ec3c0, 0xf8660e2f, 0x3d4fdc44,
3550 0xfba05c38, 0x79450fdc, 0xe095aa73, 0x5c5a8938, 0x33cb5120, 0xe5e28c4f,
3551 0x1eb8620f, 0xaf863cfc, 0xbca837d7, 0x1c88e89e, 0xbdad9847, 0xeb89a9ff,
3552 0x91f935f7, 0x684fd1f3, 0xedaaf5fa, 0xfc211cde, 0x8e13eebe, 0xdd7dda09,
3553 0xe3c76f94, 0xfe340bfd, 0xe8873b06, 0xf8abb414, 0x876e9d7e, 0x4d9f6d9e,
3554 0xf78213f5, 0x2c047bbd, 0x9f904f3d, 0xf148aef4, 0x6f58e2a1, 0x55a5e622,
3555 0xcb8e4544, 0xf4f0d20c, 0x38a30d59, 0xcfdc29ef, 0xb7bfe6cb, 0x1b25f585,
3556 0x1d7ba49e, 0xe29f994a, 0x1a1b45bd, 0xc8aebf68, 0x80a7302f, 0xc78799fe,
3557 0x943a3581, 0x710d116e, 0xb552c5e7, 0xe4139b1c, 0xae1dfc5b, 0x9b25f7d0,
3558 0x57ea19c6, 0x1816976f, 0x7a823bf2, 0xbfec90a7, 0x3e757ef0, 0x8f4fb70f,
3559 0xf10d38d7, 0x861b05ee, 0x78cdf217, 0x73217ede, 0x36177cd1, 0x11ef1966,
3560 0xb2b84c6e, 0x1ec1827b, 0x538445f5, 0x3fa8fd26, 0xf7f80e3f, 0x17f7c485,
3561 0xe08c3a7c, 0x7bc38bf8, 0x8e018c5d, 0xc433e668, 0xdff326cf, 0xf8f1b429,
3562 0xef8ff023, 0x7e407652, 0x07f577cc, 0x1fc01dae, 0xfa87fdc8, 0xb9937903,
3563 0x024d65fe, 0x9c4ce0e5, 0x66cfb46a, 0x6e75f0c7, 0xc1b44c76, 0x679a2b3e,
3564 0x6b57376c, 0x776b5737, 0xa84a38b9, 0xa164265d, 0xe9fde33e, 0x71951fbf,
3565 0xffca6dfa, 0xedc310dc, 0x6eaa9fd7, 0xbbf40c6f, 0xd0773b56, 0xefdade6f,
3566 0xf735ad4a, 0x5e5285e5, 0x1e6fe6e0, 0x09dfc3ac, 0xf601dde9, 0xfcc1e83f,
3567 0x7ba0df67, 0x6eeff4ba, 0xb432d15f, 0xa954f008, 0x8bb973c9, 0x15dcafcf,
3568 0x3f418790, 0xae1ce529, 0x827d96b4, 0x5a5df214, 0x22b76f09, 0x2ff06cc6,
3569 0xffd5a27f, 0x6549c635, 0x1840495a, 0x3652ed06, 0xec24116d, 0x0b577f0f,
3570 0x66a949e0, 0x93dfd0fe, 0xedcf194a, 0x6fc7db9a, 0x04e61616, 0x9a68d0f1,
3571 0x5c62a391, 0x85da3135, 0xaa47cceb, 0x50f10eb7, 0xce8051fe, 0xa8fc4c49,
3572 0xbdbb425d, 0x23d7755b, 0x7078eb7f, 0xae0a6a8a, 0x711fd1a3, 0xfcfa9b38,
3573 0x30bebe62, 0x4766a8f6, 0xe976eb37, 0x42edc661, 0x5712a75a, 0x3efc308e,
3574 0xb69c6261, 0xef32244e, 0x37da854e, 0xa327a232, 0xccae24f9, 0x2c76e66e,
3575 0x2cb4f7a7, 0x3e7c16cf, 0xb1c8f06d, 0xd647df78, 0xbf8480da, 0x26dafe3b,
3576 0x51fbc453, 0xc3fc359a, 0xf9c59e3c, 0x9cb8f3e9, 0x99dbd05e, 0xe84f8807,
3577 0x3d3d10f2, 0xd8c1dfb2, 0xff3ef4e3, 0xe97bf8d9, 0x997acafe, 0xc74e4f7e,
3578 0x69eab77f, 0xb4a6bc41, 0x3708166c, 0xdc7a78da, 0x5ca39f0e, 0xe78d971e,
3579 0xfb94073a, 0x16873b15, 0xbd7dca85, 0x1cd9f44c, 0xdbafe796, 0xe1887ff7,
3580 0x5890eaeb, 0x4bc43ecf, 0x8a3adb65, 0xc2d92cef, 0x4067f77f, 0xfe215cfc,
3581 0x07ee1284, 0xfbe1cf94, 0x4acff95e, 0x7ab2ff44, 0xe5acfbfe, 0xb8f077db,
3582 0x0b998fce, 0xcb7943f5, 0x0728a10e, 0x8773077f, 0x9f0428b0, 0xca7ee5a9,
3583 0xaec6bf83, 0x5bd71fcb, 0x718efce1, 0x0e53b462, 0xe87eb8d9, 0xb87c57cc,
3584 0xf669dc1f, 0xcebb6396, 0xe61768e4, 0xfff8e977, 0xe99b8efd, 0xa77db5dc,
3585 0xa3658025, 0x8ac939a9, 0xcad70efb, 0x6eabe42e, 0xe9127bd5, 0x5a792713,
3586 0x78d8fbf1, 0xbe16abbb, 0x58d85a75, 0x3c72b955, 0x8fe30c4c, 0x72e63f89,
3587 0xf43aa493, 0x24b186bc, 0xeb9daa37, 0x67d7132d, 0x1e7ccc87, 0xf787193b,
3588 0xb3ee3107, 0xe3878724, 0xf294dc68, 0xca1f9d00, 0x70d3bd38, 0x5fc830ce,
3589 0x1b7dbfee, 0x2c3fff7e, 0x00284ba1, 0x0000284b, 0x00088b1f, 0x00000000,
3590 0x7dd5ff00, 0xc5547c7b, 0xbddcf8f5, 0x0dd90afb, 0xdc3bf79b, 0x24280c10,
3591 0x01049e6c, 0x878424d9, 0x28026e20, 0x47796bc8, 0xd2026c92, 0x6dfad0fe,
3592 0xe5318316, 0x16d46b6b, 0x882ea945, 0x835ab696, 0xb80d06a2, 0x47d62228,
3593 0x2d8aa523, 0x2220a5da, 0xfb1b6484, 0x6fcb56c0, 0xec9999ce, 0x0f0d9bde,
3594 0x7cf9fb6b, 0xdcc98fe1, 0xe6739f79, 0x9ce7339c, 0xb5331d99, 0x228ca8cd,
3595 0x389aa6a4, 0xfd2d34bc, 0x84e90ee9, 0xf00b9085, 0x8321226f, 0xf121326c,
3596 0xbd3ca484, 0x582c524d, 0x1c5a7fbe, 0x052627d6, 0xaed84bbe, 0xa0af9686,
3597 0x84225ba9, 0xa0e4258c, 0x31cc7881, 0x2ae8b484, 0xfd68d947, 0x7b488496,
3598 0x663b2d13, 0x68db4573, 0x9d63967f, 0xeab4ac07, 0xa33e6398, 0xda4bf68b,
3599 0x4264c7e9, 0x121230de, 0x8c1ddb41, 0x6dd3ed60, 0x42229074, 0x07891b26,
3600 0x233d1bbf, 0xc1dfda14, 0xbfb083a1, 0xa6eab797, 0xc37b697a, 0x19d8b220,
3601 0x9b74ef32, 0x6ca5db0e, 0xe8e921dd, 0x5a48b8f7, 0x513f321e, 0x595b01ef,
3602 0xcc67cc26, 0x43844ed4, 0xae3d56dd, 0x1ce8c2a7, 0xb05466b6, 0x8fe868de,
3603 0xe6ed7bd6, 0xfa7e8c4f, 0xbd2fc7fd, 0xbf50246f, 0xc1b47255, 0x37df5bfc,
3604 0xa9a1c9ce, 0x4932e7e7, 0x613a6420, 0xf0bf36ff, 0xdfa151be, 0x70a6efa7,
3605 0x76eaf5a2, 0xa32fd2ef, 0xc5a95769, 0x24268d23, 0x8b6bccf3, 0xdefd2148,
3606 0x74112266, 0x5736dd6e, 0xfbce8d91, 0x0e535dcd, 0x58845149, 0x20f9339f,
3607 0xc421f015, 0x06b4e19f, 0x3a5225e7, 0x722fce30, 0x10b3fd2a, 0x55ef46b2,
3608 0x95ddf099, 0xb7eb4559, 0xccf830c6, 0x42e0cc1f, 0x157bec2c, 0x0b80975f,
3609 0x8c0a7f1d, 0xdce5915f, 0x2454fd01, 0x329bd846, 0xaff99e61, 0xebdc2999,
3610 0x823d92ec, 0x672b8d56, 0x579d0cf0, 0x79b84e65, 0xe2f1c06d, 0x44f8d963,
3611 0x7180cfef, 0xefb2f109, 0xf9216932, 0x3873f6c1, 0x1f77e9be, 0x3a864efb,
3612 0xd7f38273, 0x4d836fe2, 0xe861fac2, 0xa3ac116c, 0xc7cf98f6, 0x0f53ace8,
3613 0xe6799674, 0xd043e230, 0xeab6cfcd, 0xd5fd1531, 0x5fd88cd9, 0x708f4d9d,
3614 0x1a780cd9, 0x2c03534c, 0xcc1ba69a, 0xc7850f5e, 0x1f26f39b, 0x7e297292,
3615 0x20fa316e, 0xb4b7437d, 0x48dfca16, 0xe8b7e361, 0xdf216b74, 0x34859772,
3616 0x6e1d5e21, 0x376bcf98, 0x6a7e2147, 0x26bd1ae7, 0x9f8fcfda, 0x63de5897,
3617 0x67fa12f1, 0x72f66bad, 0x22e24768, 0xfe024fec, 0x738c075c, 0x4ae9fdac,
3618 0x51bf6e79, 0xb7a7dfa1, 0xf027fdb1, 0xe8c6db50, 0x0107ec4b, 0xbd3c20d7,
3619 0xf024fdaa, 0x8db07f31, 0x17a505d1, 0xcecd7780, 0x3349db08, 0x0102eb1b,
3620 0xe5568cfa, 0x6d93dbeb, 0xf3044727, 0xd007f035, 0x81620ec1, 0x79f2d679,
3621 0xeeb9d3ce, 0x6755fd83, 0x50341ff6, 0x0d1f16d4, 0x881f7ee0, 0xffd66b7e,
3622 0x0164fb3a, 0x0e93ab21, 0xadf62a61, 0x7f7aa861, 0x6f78e56f, 0x7bb69482,
3623 0x4d4dd382, 0xcbee1b61, 0xb80d939a, 0x19532d9f, 0x231cb35f, 0x133c508e,
3624 0xdebe43f2, 0x457db17b, 0x9964db64, 0x71e2bdc2, 0xfa44d6c9, 0xaba44fcf,
3625 0xa36ce224, 0xf5b67dfd, 0x0025a8f5, 0xc82eafdf, 0x37ae98a4, 0x3777ad82,
3626 0x3b5d3be7, 0xde91c029, 0xcc248c1b, 0x3fb72f7a, 0x01223be2, 0xec386b3c,
3627 0x1f2e9ebb, 0x17a529fb, 0xf6c1cecf, 0xcf92e8ab, 0xf6eb3d3e, 0xbbbce94f,
3628 0xcbb44c76, 0x4e4d3640, 0x7c409fa4, 0xa53b7d84, 0x4c99389f, 0x37de2895,
3629 0x351ebdb4, 0xfcfbb68e, 0x81f3a397, 0xf7cdbf6f, 0xe5e799fd, 0xbb9700f5,
3630 0x75ecf67e, 0x95e35e50, 0xce304d62, 0x95ffc7ce, 0xdea9fb42, 0x26100f51,
3631 0xd57cbf4d, 0x74f5a7e8, 0xfbec6dde, 0xa836c1ce, 0xf713f9f7, 0x6ef0075f,
3632 0xf2c26b6a, 0xc36c4f33, 0x7b3f6bfc, 0x683fdf76, 0x94675abd, 0x799dea1d,
3633 0xa5e23f7e, 0xc077a5d6, 0xeba2077a, 0x33f6bbcd, 0xe126d97e, 0x1973237e,
3634 0x2d74131f, 0x9ff3f7e8, 0x2a1b1e2d, 0x16f7c437, 0x833b9723, 0xcb391c98,
3635 0x994d6ff7, 0xb3d205a5, 0x85cc44cf, 0xfe8dbaf5, 0xcf9868ec, 0x1f174628,
3636 0xb6d47871, 0x2db831ad, 0xf9fb1ed8, 0x487bee80, 0x9e7d2873, 0x6b4ef4a2,
3637 0x0050b8ed, 0xeb0afde3, 0x11257ad3, 0x2f37be14, 0x7cc12e38, 0x18354722,
3638 0xbf9e706a, 0xd574e564, 0xebc5e5a1, 0xe96a3d18, 0x059b0be0, 0x907d8beb,
3639 0x4d32bbb2, 0xb2603e41, 0xd6ce3e33, 0x6aed5297, 0xd7efd2b2, 0x65d973af,
3640 0x4f97c78a, 0x4a9c9e1f, 0x211b3ff3, 0x65fe2015, 0x8f39c989, 0x5ba9c705,
3641 0xd04e465f, 0xd9a2eaf9, 0x11b0497e, 0x07c8b5fd, 0xd7ba31b6, 0xf205bd13,
3642 0x89f200fa, 0x072e16ba, 0x1279b077, 0x96632073, 0xae59db15, 0x83ce098d,
3643 0x3058b3b6, 0x29b8c81f, 0x678ee407, 0xc51dca2e, 0x233df388, 0xe4f101f8,
3644 0xee09cc2e, 0x711d04b7, 0x8c13fe01, 0x7e30b534, 0x4ffb4953, 0x8a4d2e8f,
3645 0x09a60a2e, 0x16b95883, 0xf2f0b74e, 0x923b451f, 0x3b5e01a2, 0x60f25563,
3646 0xdaf2be20, 0x6e4cddcd, 0xe91c72bf, 0x08740dd0, 0xaa4ebbe3, 0x6472f6e4,
3647 0xf70e94ae, 0x5c3a471c, 0xabf8cede, 0xb8d4bdbb, 0x259ba68c, 0xefe61732,
3648 0x7404f4e6, 0x9bf9a764, 0x7d71a3a2, 0xd9fcebee, 0x39baa7c0, 0x61ef75dd,
3649 0x4e86f6f4, 0xbcf801e7, 0x36e47db1, 0xf95a0790, 0x113b5528, 0x6f8a6edf,
3650 0xd67a0493, 0x67a0c3ba, 0x3b1355d5, 0x6ef757ec, 0x081a1fbe, 0x7b7707ee,
3651 0x2fe872e5, 0x5d9a6e35, 0x992f5096, 0xeef34a9c, 0xfb04525a, 0xd96b652d,
3652 0xd20ba01e, 0x20ab912e, 0x0ddced5f, 0xab8fafed, 0x2099cbb3, 0x9927b6f7,
3653 0x47ebfd69, 0xcdfb6314, 0xf4294ae9, 0xb620a9e7, 0x706f2127, 0x9cdb3ca1,
3654 0xf20ed23c, 0x88daedce, 0x0651177a, 0xb89ca1d9, 0xbea16bf4, 0x6c80b3db,
3655 0xe3ecc292, 0xcb03923d, 0x08de91bd, 0x3b7a7eda, 0xeddc7fd3, 0x139f1f6c,
3656 0xa1a911f0, 0xd78c1173, 0x788982fd, 0xbd9d20a4, 0x930a67b9, 0x509a2fb3,
3657 0x746d9ece, 0x34541390, 0x10568c8f, 0x358e02af, 0xa03a99ad, 0x9966425b,
3658 0xf8cb1e60, 0x4c0d5a3c, 0x3973446e, 0x9b2f7590, 0x1fbe72c7, 0x78eb4796,
3659 0xaffbe46a, 0x9b05c995, 0xe0e41727, 0x921e3e39, 0x73970245, 0xe5bae874,
3660 0xb527dc3e, 0xe2feb34f, 0xdbbc8e4c, 0xe855e842, 0x6c7a5a47, 0x6ca6e3e2,
3661 0x3301203d, 0xa55ad949, 0x57d7e7da, 0x5d3d5f13, 0x755bf5e7, 0xa8b989be,
3662 0xfc82dd37, 0x6c91837c, 0x77f7fa97, 0x5be3344f, 0x3cceb115, 0xcdd7e409,
3663 0xfa3fd416, 0x8720e9f6, 0xb8f4022e, 0x84dec97c, 0xea1670ab, 0x09d3bd68,
3664 0xede03b56, 0x5a8e1c47, 0xbdafab7d, 0xd19c0f46, 0x4325c9ea, 0x4186e969,
3665 0x549e0173, 0xa198b75f, 0xa7b68d9d, 0x8fb612f5, 0xf213627b, 0xf7ec26ab,
3666 0xeb1b68f6, 0xd859d627, 0xcb2e2c00, 0x27c98eb9, 0x7adc3dab, 0x9e85a3d2,
3667 0x074f28bd, 0x82db33f4, 0xafc7e1fb, 0xbd194b48, 0x01284151, 0x41fdb23d,
3668 0x5278fee8, 0x3d447a41, 0xf4e0ddca, 0xb647a786, 0xaf54dc5f, 0xd29b3d02,
3669 0x27a65ae3, 0x4fdb085b, 0xa7232e8c, 0x7c007932, 0x159f542b, 0xefbb54fb,
3670 0xedf6fd05, 0xefdccbfb, 0x1fb606dd, 0x801c29bb, 0xfce8fbde, 0x9be74665,
3671 0x48fdd036, 0xfdd137cb, 0xffc214d8, 0x981fe7b5, 0x04079c27, 0x73663dbf,
3672 0x745f0076, 0x19ab7f6f, 0x47f396c9, 0xc83fcbf7, 0x65de98be, 0x5fb4ca86,
3673 0xa1afdd33, 0xe0a663f4, 0xea63e6b6, 0xb9113901, 0x8947ad5e, 0x266883f4,
3674 0xdeb1bebf, 0xa3d24238, 0x55f1c3de, 0x007d73ab, 0x46f41e7c, 0x6324114a,
3675 0x131bd33d, 0xde00e640, 0x417a47b6, 0x20484e3f, 0xccc2e7ae, 0x67df3f67,
3676 0xfce29f02, 0xeac51090, 0xff7df2f7, 0x4ff7af29, 0x4b9c869e, 0x3a283f70,
3677 0x0f2271d7, 0x3b448f2c, 0x172c2f3a, 0xd73be9f3, 0x137cd998, 0xbedecaee,
3678 0xc18f0429, 0x3e75757d, 0x5eeb37e0, 0x25a97e9f, 0x8b908e38, 0xf981ba5a,
3679 0xf581fc83, 0xb81a8e54, 0x7e7eeb5e, 0x71d0d33e, 0x7b5fdf04, 0xb482b8a8,
3680 0x2bfbe0d5, 0x5635c7ee, 0x2522fa02, 0x9d2c4707, 0xe1befd57, 0x088d1f6c,
3681 0xeafb4364, 0x314dd758, 0x9331dfb4, 0xdfa0fef8, 0xa09ce0ab, 0x0c531e27,
3682 0xf5e0dde0, 0xd3f9e087, 0x8f7fd618, 0xe991ecd5, 0xd623b8fe, 0x3ded0d15,
3683 0x03eec465, 0xe5077339, 0x896fb027, 0x4df808af, 0x0147f13d, 0x5d58c79c,
3684 0xbf4031f1, 0xc9366772, 0xf257fca2, 0x63f7c2e7, 0x84b95111, 0xfb71f3f6,
3685 0x85799f6f, 0xcaf85ab6, 0x03df85b9, 0x22317afa, 0x18e2e803, 0x513b97d5,
3686 0x830656df, 0x944bddbe, 0xfc30b6c1, 0xcc0ba457, 0x20beb33a, 0x55663f98,
3687 0x7a442f9f, 0x6fc30c4d, 0xe214f9fd, 0x09fe8589, 0x627bbf9e, 0x1f5df614,
3688 0x56ea8230, 0x78833e7f, 0xeb1f7f68, 0x985b7548, 0x30c53771, 0xc84ddb7a,
3689 0xf7e570d4, 0x0f7671f1, 0xb030fb65, 0x7f02f24d, 0xe1bf5eac, 0x07e532cf,
3690 0x3eacebd5, 0xe831694c, 0x8f36d56f, 0xc7f3474f, 0xd11f8c0c, 0xc5cdb37f,
3691 0xeb47b941, 0x0e03c7e9, 0x4b20f43c, 0x2e52e0f9, 0xbc3596b7, 0x13d825f9,
3692 0x3cc4f5aa, 0xdcb3f69e, 0x4a983cec, 0x2cb33e8b, 0xbfb6028f, 0x25b73bf2,
3693 0x5c4a5c80, 0x32eccad0, 0xf40d9264, 0x4331c95e, 0x317910be, 0xfa8f4b3d,
3694 0xe29fe231, 0xe7188beb, 0x82f7c04c, 0x80f504c1, 0x7a45b705, 0xd07c213d,
3695 0xa5a1e1cc, 0x7eb84f9b, 0x767feda5, 0xfe81196c, 0x739ca23a, 0xdc163e81,
3696 0xcfc54e76, 0x53ff25ba, 0xad5d028f, 0x649fdab1, 0x433865dd, 0x623bfee8,
3697 0xc43af3bc, 0x675e4f53, 0xa04cfaf6, 0x87c640df, 0x30eacf60, 0x940a3cd9,
3698 0xa2cf111b, 0x291a9fdd, 0xe60ecbe3, 0x361e9e97, 0x196be819, 0xde0337b1,
3699 0x1244b597, 0x033f084f, 0xc3e81805, 0x3f609e7d, 0x3cde3b4b, 0xaddcfc0a,
3700 0x2c9d23f7, 0x8f105b35, 0x9c7af3ee, 0x74316907, 0x8a7b45f9, 0x8e5123fb,
3701 0x9e7d60db, 0x9f47c67b, 0x263f491a, 0x7eb8efd2, 0xfdf0edd7, 0xe228c8a1,
3702 0x4b78fa00, 0xf3a70ef6, 0x832b35ef, 0xeabc2863, 0x460e948d, 0x734e3763,
3703 0xd243fe88, 0x77fc6aac, 0xcc25f5bc, 0x65d9b967, 0xc2be3904, 0x32a7cf41,
3704 0x6457c9e0, 0xef8a151b, 0x9185f2f1, 0x45ef8f97, 0x6c7fbf7c, 0x661ff4a4,
3705 0xe1c7dd1f, 0xa5ea23df, 0x71f27db0, 0x0e7ea906, 0x4a686bd2, 0x943c7ddb,
3706 0x3e79f3e7, 0x604bd79b, 0x9f7c1df9, 0xeacb9c7c, 0xc5f1c769, 0x3b36fe30,
3707 0xe015b1d6, 0x8cf9db45, 0x22fb1740, 0x16b7a8bc, 0xfc077e52, 0xea3a6d6d,
3708 0xedaf94ad, 0xc4d97ac0, 0x4cf58d17, 0x03485728, 0xcfb07be5, 0xcf84148b,
3709 0x274a52a6, 0xd7b03cb4, 0x04aedb64, 0xa9f02af1, 0x8c7b63c5, 0xc3c9eff4,
3710 0xd43e9251, 0x61e5428e, 0xa3b30c7b, 0xd27f6118, 0x9e991899, 0x85f10c36,
3711 0x3e5f2274, 0x608c6ebe, 0xf4fba078, 0x7bd418b5, 0xfba1397d, 0x97c704e5,
3712 0x0f1f67e0, 0x8ab5e352, 0x5e6de1e3, 0x8d8c516f, 0x007b4fc9, 0x31c7ddf7,
3713 0x165c7eac, 0x0f424393, 0xcb8703ff, 0xc8549a4d, 0xd5533195, 0x1c4dc5fa,
3714 0x44c5379f, 0x087ebc09, 0x88f215f3, 0x345f17f2, 0x5e0b0fdd, 0x217f2135,
3715 0xb0d9031b, 0x63bd68ff, 0x2c0a6e58, 0xe472a58a, 0x18dfaa26, 0x22ddb1f3,
3716 0x3cefdf68, 0x85d04a3f, 0x3e9c8095, 0x1853d625, 0xe54f7e40, 0x296bae1d,
3717 0xba437ca1, 0xd037fe34, 0xd694c93a, 0xd8560c87, 0x03a64ef9, 0x208fed02,
3718 0xe147f40a, 0xb850e7fe, 0xc63bc76b, 0x319fe0e9, 0x96f11e92, 0x9f70f247,
3719 0x7585ffbd, 0x9cf2ed21, 0x51d1eccd, 0xceb8ffbe, 0xe9fa0175, 0xd42dfdba,
3720 0x7d198fcb, 0x3096add9, 0x63df46e5, 0xf2c1490f, 0x3d973fc5, 0x762fca46,
3721 0xe4fd7677, 0xa5eeba66, 0x861db29d, 0x5fe77a5c, 0x7a031ddf, 0x0ec1a775,
3722 0xdf2a46e7, 0xbcc3d5ef, 0x791e981b, 0x83a6a74c, 0x9f55dfb3, 0x1962d273,
3723 0x83dea8be, 0x3be09cfa, 0x4adf7e42, 0x5c81577c, 0x461c465f, 0x66b4ff48,
3724 0xe1420cd5, 0x0eb2c2b7, 0x6be7d1f9, 0xbc1ea1a7, 0x7cb07892, 0x4fe18b59,
3725 0x4561f2a1, 0xeabf3aab, 0x56fe7561, 0x67df3aaf, 0x2f0f2e7f, 0x32c7a7df,
3726 0xd94b3e3a, 0xb03fe03e, 0x3d05e4c1, 0x98af5b48, 0x3ca4cbd7, 0x24f813b1,
3727 0x4760fb95, 0x48e11758, 0x6ebebe04, 0xc5e2696f, 0xe7f57cec, 0x10de21af,
3728 0x37a8237d, 0x6c6f12e4, 0x63cb7eff, 0xf4238415, 0xe071f0ab, 0x2cb671bc,
3729 0xc6263afc, 0x10653d0a, 0x8bbe27f6, 0x45e3827e, 0xcfea3ce1, 0x8f98079b,
3730 0x5d9fdb05, 0x1b9c7e19, 0xa9b1c6fa, 0x7db064e4, 0xfc6b931c, 0xa3e82d1c,
3731 0x7e127cfe, 0x07a17917, 0x31a5db07, 0xd9a48afd, 0xf906454e, 0x8b63b094,
3732 0x224270fd, 0x3bb464e6, 0xebcfcfdd, 0x5fb05cf6, 0x083d009f, 0x6514e3f6,
3733 0x714e9f9f, 0x66c6f7d9, 0xf70687eb, 0x941d768b, 0x43f8ceae, 0x58b2eef8,
3734 0x6b8e1c6b, 0x57187627, 0xdba2fbd0, 0xe8bb062b, 0x6778ff7c, 0x546ba279,
3735 0x30f53f28, 0xe85189bf, 0x9c95165f, 0xbc391a25, 0xd42dfdac, 0x95bea8bb,
3736 0xd3e74c0d, 0xbd23b7bd, 0x04ce24af, 0xbd9ef3a0, 0xff5c33c3, 0xf315fc86,
3737 0x6259e599, 0x9ba79820, 0x2abfee98, 0x1d599f3e, 0x99d3ef4c, 0xc71c061d,
3738 0x025b1441, 0x7cd9a51e, 0xd3d4f329, 0xf9be84fc, 0x908e9183, 0x12fe7cf1,
3739 0x9df0a7b4, 0xd4b253c0, 0x36f30495, 0xbc74b8c1, 0x824de208, 0x5dac69b4,
3740 0xe4a27481, 0x3079b3d4, 0x0d264f3c, 0x675f5069, 0x9d6ccbf6, 0xd0090674,
3741 0x985e0fbe, 0xc6fcf2b7, 0x568bbdd9, 0x158b77c0, 0xcf9188f9, 0xe52c4763,
3742 0x2fe46687, 0xc9b75866, 0xfd1cfbe2, 0x94f53c64, 0x3d8fb829, 0x3bda0943,
3743 0x02369106, 0xe72c5ae3, 0x1b58b03c, 0x8f9049b1, 0xe0faf5b0, 0x66ce70fc,
3744 0x2346e8f1, 0x0b19dc9f, 0x677a527c, 0xf285e025, 0x19ff6665, 0xc3ef5ca8,
3745 0x73e0b773, 0x4d7e7c31, 0x1325cf9c, 0xe2588706, 0xb01ef1c0, 0x40419cae,
3746 0x49d65984, 0xd44b7ed0, 0x25eff454, 0x7969e000, 0x8abd54ec, 0xd53bc56f,
3747 0xeab9c4f9, 0x9d4bb27c, 0x3f93d337, 0xcf928be8, 0x16217499, 0xc02359cf,
3748 0xfce062de, 0xebcf99a2, 0x3d74a408, 0xfd3e71ef, 0xbb13f58d, 0x8eeebcfa,
3749 0xe3b41231, 0xd0cd9825, 0xde57d53f, 0xcafa658b, 0x97281e27, 0xf3cfc803,
3750 0xc0f9b626, 0x837cd3ae, 0x7e8bbf64, 0x1b2ab66f, 0x3d5494f4, 0xc76624d3,
3751 0xf54adbd1, 0x865b7cb4, 0xe689becd, 0x1d7ec1eb, 0xd5b7f30b, 0x49f68d3c,
3752 0x0247ab13, 0xdc8fe0cd, 0x8366c9b6, 0x81e5717a, 0x8bd046c9, 0x76db1057,
3753 0xbfbe8612, 0xce86fba2, 0x53c809f7, 0x5e9c48bc, 0xf3290f22, 0x7cbc0d71,
3754 0xc59dfc07, 0xe18b13f2, 0x65feca5c, 0x3a75e475, 0x90e0eec0, 0x77d62e51,
3755 0xa16ebde4, 0xcecd65e3, 0xb3bc3b43, 0x0973f99c, 0x3463f7df, 0x905c6afb,
3756 0x8f3cb1ce, 0x707587e7, 0x899c6ebb, 0x746d6bf9, 0x36666288, 0x8c71fac0,
3757 0xfc44edfe, 0x5af2fb63, 0xfd07fc12, 0x47fb0795, 0x5829343e, 0x7467dc1c,
3758 0xbdb37ca8, 0x1bd696a9, 0x87edf7a3, 0xa78e3c7d, 0xa37d3c79, 0xbf9406f4,
3759 0x628b3a9d, 0x6d7db1d4, 0x861302ce, 0x14b80653, 0x04d07edb, 0x7c904cfd,
3760 0xbd4c6698, 0x5fa609bf, 0xd147edc5, 0x06ef4649, 0x12a68eba, 0x77b4678a,
3761 0xd820f9fc, 0x4907e5a5, 0x88e9e001, 0x0739c841, 0x7a15d39e, 0x3a1afb1c,
3762 0xfd406c98, 0x2a932ffc, 0xd5013bf0, 0xd2bbce8c, 0xbe2116c6, 0x755f2c0f,
3763 0xe36a3f28, 0xb337e464, 0x6abf32a6, 0x57b35cfd, 0x10ce4092, 0xbbd277e6,
3764 0xb10a6f32, 0xc43f0897, 0x773206fb, 0x44f39857, 0x4fd31c6d, 0x3b3066ab,
3765 0xa346fd6f, 0x1d537fca, 0x335eecc7, 0x8c8f26e3, 0xfcc47943, 0x5c7179a7,
3766 0x46411b6f, 0xe10a9f00, 0xaf504523, 0x81edf4ab, 0x9cba8cf8, 0x8e3999f3,
3767 0xfdea0302, 0xbe08df9c, 0xf6c41cee, 0xd2423cf3, 0x9367ae81, 0x87ffe406,
3768 0x7e456f4b, 0x18f11373, 0x951f6f00, 0x310278b1, 0xd55359ef, 0xa71cd27a,
3769 0x5cf37f3a, 0xf0c51ead, 0xe79dc621, 0x09579752, 0x5aaa783d, 0xfff05e0f,
3770 0xb9468abe, 0xdd54f89a, 0xe7e02185, 0xc000f660, 0xe873f30b, 0x1bdc6e91,
3771 0xbebc3f99, 0x388def3d, 0x127767d8, 0x4976cfbe, 0xb2ffd1cb, 0x82115a4b,
3772 0xaf5ad4ff, 0xb8647204, 0x987dd855, 0x7934e4de, 0xc3df83f7, 0x91128359,
3773 0x49e3cebc, 0x493c400e, 0xadbe907e, 0x57165665, 0x30b51c41, 0xa45b349f,
3774 0x16fef41d, 0x65da3e5d, 0x2aaca25b, 0x0da6fa3b, 0x13d4054a, 0x44c558f6,
3775 0x6e9c6df2, 0xd7779dc2, 0xbafe31c5, 0x71766259, 0x9e333ccf, 0x9cb3e32b,
3776 0xbc413f2a, 0x9d828e4c, 0x229c6470, 0x63fda3ea, 0x5c95c1b3, 0x44af5340,
3777 0xd2171197, 0xd11b265e, 0x4fe1a8ae, 0xb476b1f1, 0xce0fc7eb, 0x9cfd3b41,
3778 0x2fb43c8e, 0xfd844b12, 0xffd8292a, 0xf4dbd99c, 0xdf53a710, 0xdcbf4db1,
3779 0x7bbba412, 0x8d5cb8e2, 0xaf409124, 0xe7ba767d, 0x7ba7684c, 0x5ffce75c,
3780 0xa35acba0, 0x2171ed0f, 0x07df8af4, 0x38ab8b92, 0x9cca18bd, 0xf9d056f3,
3781 0xb46bbcf5, 0x1d19f9c3, 0xe7ffb46d, 0x9da344f7, 0x50455f51, 0x652c6d3e,
3782 0xec07a47c, 0x9f1d745f, 0xf9e35745, 0x8ad4a360, 0x663ba3f2, 0x6af1d232,
3783 0x073c01cb, 0x74a56f57, 0x569f2218, 0x6be750ef, 0xdf9e2748, 0x47ee9f6b,
3784 0x0517c8cf, 0x56ef761f, 0xd4c323b7, 0xcb8f377c, 0x7da77c8b, 0x7d4c0556,
3785 0x9d8b3dae, 0x8641e9c3, 0x1de8a3ae, 0x2eefb723, 0x008a9db0, 0x7494fb56,
3786 0xc7adfd31, 0xfb665a7a, 0x2283c99f, 0x6e568e3e, 0xedbd7115, 0xe0bfca3a,
3787 0xb0f42afc, 0x07f2c222, 0x92721d74, 0x42df382e, 0x7fe84ede, 0x7c084e42,
3788 0x52109695, 0xa743f742, 0xc9434fe0, 0xed37c050, 0x0489f71f, 0xd8314391,
3789 0x7dce07bf, 0x9478f8e3, 0xb7203c1e, 0x17b33a3d, 0x6a59abe8, 0x06693940,
3790 0x9ba69f3d, 0x83ca1724, 0x323daa97, 0x692c7bc0, 0xd6833598, 0x8cee6f1b,
3791 0x3a513804, 0x3f4a1239, 0xb197c44d, 0x11d1524b, 0xbf457796, 0x848e961d,
3792 0xc47df33c, 0x74e998f4, 0x054fd0c5, 0x7a687e38, 0xc8e76240, 0xeb1f9629,
3793 0xbadbfda1, 0x53274869, 0xf30f5789, 0xf1a9b0ab, 0x9d49253f, 0xa3f4a69f,
3794 0x70c38c0f, 0x1f4e7870, 0x08772ea1, 0xfcd4477e, 0x857c932e, 0xc1f9187a,
3795 0x5d80efc1, 0x193d7221, 0xd50dfa01, 0x6a1f7144, 0xb8ebe0e9, 0xf26fdd6f,
3796 0xbf185c75, 0x13b70f49, 0x2bfc4b5f, 0xd3fa969f, 0xeb1bf759, 0x7a10a4e5,
3797 0x65e2fb14, 0x907f8b03, 0xa9fe655e, 0xe5193312, 0x642afa03, 0x3fb14576,
3798 0x8cfa05ae, 0x315dd209, 0xcf119eff, 0x19086ce9, 0xa1367402, 0x5327c23d,
3799 0xfef1e4bc, 0xcbba05ae, 0xe223ea0f, 0xd254d15c, 0xa532be8f, 0x705fd42c,
3800 0xa47d09df, 0xd26b6a40, 0xb91f0267, 0x1be609a7, 0xe3434f42, 0x512f808b,
3801 0xda7dc27a, 0xcbaace4f, 0xf026f435, 0x52e5f42e, 0x367480d2, 0xea60a75b,
3802 0xf2855cab, 0x5b32dcb5, 0xacdfed0f, 0x0936f462, 0xea0b31e8, 0xdca5e9ab,
3803 0xe96bceac, 0x0ba88e91, 0x9f4b571d, 0x10dbd103, 0x5f2137a0, 0x6f4d2f63,
3804 0x75bfe3d3, 0x7f1e9b7a, 0xd2d37a11, 0xbb5fe099, 0xa0e56c22, 0x4b57d73f,
3805 0xde0a0f28, 0xf904d61d, 0xa89975e1, 0xb68aef4f, 0xdf5d7ea3, 0x3b0bcac0,
3806 0xbdc4321d, 0xe5e3ad64, 0xc872ce99, 0xe5a7afd7, 0x23a2ebb4, 0xd8662e2c,
3807 0xef3cac9d, 0xadd786ae, 0x587867a0, 0x6f3f97fb, 0xb968a396, 0x2fb799b7,
3808 0x7c872d6d, 0xff6b0b7d, 0x46a9f819, 0xb79a7c43, 0x7d5fbe09, 0x1d9da66f,
3809 0x3efe99ab, 0x9777af91, 0xd8ebdcf4, 0x5bb595ae, 0x883cd075, 0xe99ff9e0,
3810 0x75f1d7e5, 0xd6cadc4e, 0xfae27719, 0x8ba50aa9, 0xea0f0115, 0xb574a76f,
3811 0x06dfc8c5, 0x4a973f38, 0x4e9069ad, 0x5217eca1, 0x22ded987, 0xcc7e650f,
3812 0x7b8874ed, 0x45fd99e2, 0xce20fff8, 0x9f4432a0, 0xd99e27b8, 0x84bd4563,
3813 0xa0018a18, 0xa8ac4787, 0xa4ff0b5f, 0x812221ef, 0x723587bc, 0xbfac243d,
3814 0x03564a72, 0x865311ea, 0x5fa53f08, 0x9b8e94bf, 0xc98be177, 0x3f43ece1,
3815 0xe69ee3e2, 0x7a7d1371, 0x075337b2, 0x880bb174, 0xf4800524, 0x7f41afde,
3816 0x487e05db, 0xa43ca426, 0xf2caf004, 0xbd7fe35b, 0x853c65a9, 0xef41aeaf,
3817 0x2196a101, 0xccc9dc61, 0x1c1be24e, 0x53fe7fd5, 0xc467c4f4, 0xff362638,
3818 0x1e544d95, 0x7e31d123, 0x8fe38736, 0xe90abf8c, 0xd3c73677, 0x2a7f05cf,
3819 0x9fc00520, 0xddbc70e6, 0x347aa664, 0x8356c3f2, 0x133c6f86, 0xcb6a720f,
3820 0xbabbfa80, 0xaa57c35c, 0xb92bb8f9, 0x092b7ede, 0x4a727ea0, 0x7a7a62f2,
3821 0x6bdbd30b, 0xbf50472c, 0xe98479e9, 0x8fc4b5ed, 0xbed68ffa, 0x9d53b359,
3822 0xe7536baf, 0xf9d5dbeb, 0x8e0f1c9e, 0xaea5b3d3, 0xd58aec18, 0x768bbf0f,
3823 0x5fc16aec, 0x42fe6abc, 0x5fc67115, 0xed06ba1e, 0x6f98df51, 0x6f4f4d3c,
3824 0xd0b8aac5, 0xfa9c02df, 0xb22f35ec, 0x613714f8, 0xeb1e8276, 0x4e70f988,
3825 0xa4791a25, 0x9c7927e5, 0x86fb089f, 0x84792fe0, 0x8e7a23c9, 0x8241d77d,
3826 0xd7ab5c7c, 0xbd73c4f5, 0x84d39f97, 0xfa0793fe, 0x35d3d00f, 0x4164480d,
3827 0xdb7f6439, 0x9fc88724, 0xc0668579, 0xee99be73, 0x6c978067, 0x545971c9,
3828 0xca05f0f4, 0x7bcf8199, 0xbd0d72ea, 0x2dd6f388, 0x81665e9c, 0xff8e8527,
3829 0xe781c97b, 0x32b7c3ba, 0x5963997a, 0xd1faf487, 0xe22f466a, 0xe7e577dc,
3830 0x4dfc873c, 0x747d79ce, 0x5ef54112, 0x17491e9a, 0x8fe67ce7, 0x1d1897af,
3831 0xf87d55d4, 0x82cfe818, 0x246e1c2f, 0x3e10faf1, 0x64cd34d1, 0x934a3b06,
3832 0xaa839d81, 0xbc5c7fa6, 0x38cf8434, 0x13134a22, 0x88ee5940, 0x5d6cfb47,
3833 0x669c7aa4, 0x7fbbf3a9, 0x4fd2f380, 0xd44ed123, 0x954130fb, 0x70eb77a4,
3834 0x6b3edb8c, 0x31527e60, 0x7707559f, 0x7ec3f3ee, 0x08ebff5c, 0x359f953d,
3835 0x5ac5f792, 0xe4c4b65a, 0x6a7186ca, 0xb3233e74, 0x5fa27663, 0xb03b8c57,
3836 0xf283d65d, 0x931af8d5, 0x106901c3, 0xefd2e1c6, 0xb5fea1d9, 0x4f8c89d1,
3837 0x2aeb11df, 0xca0f8848, 0xa43f614b, 0xc6a49652, 0xc126fd04, 0x376606f8,
3838 0x5c710bf9, 0x6361be32, 0xb69e7d88, 0x568f1b0f, 0xf5f8c096, 0x61ce29f7,
3839 0x1da307de, 0xd39f30e5, 0x9a7b8fdc, 0x474efdfb, 0xcce03f31, 0x752cfabe,
3840 0xf734f4f1, 0x518e9e13, 0xbd4487fb, 0x8ecc09a5, 0x6cd1b272, 0xbf07a8de,
3841 0x1c6f313a, 0x21ec4946, 0x93c60353, 0xea78602c, 0x6dbd13d9, 0xa5ff8853,
3842 0xfbf4a12e, 0xd87f9f30, 0xba43379c, 0x31b8f5bc, 0x23df0ed4, 0x0f77f3b1,
3843 0x089e97a7, 0xeb718a96, 0x0fbf2a12, 0xe799ec78, 0xe5f63c47, 0x13bc8ac7,
3844 0xc099effb, 0xfe5f6bf8, 0xb84f2c3b, 0xf5d843dd, 0x69f7f207, 0xd0547bfd,
3845 0x044073b0, 0xfd6bcfb3, 0x3f050bf3, 0x05f9fee3, 0xec2d1f9c, 0x45827e60,
3846 0x4a9cd266, 0x247717cb, 0x946e73b2, 0x9fe55b27, 0x515e44f7, 0xcba0863c,
3847 0x3ecef49e, 0x2123f67f, 0xee3aecfe, 0xeb13accf, 0xdf5eaddb, 0xbadf0903,
3848 0x8481fb3f, 0x6d6cfe30, 0xa08bc3dc, 0xe20b0c47, 0xc18dad61, 0x2dae42ad,
3849 0xef6f7b07, 0xe8718272, 0xd65adf6b, 0xb5e0f604, 0x2a0b003f, 0xa7d431f2,
3850 0x079c38eb, 0x53bc575a, 0x9d951447, 0x4251107d, 0x8aec9fe6, 0x4351e551,
3851 0x4d03890f, 0xb5514ead, 0xaa186f4f, 0xfd643faa, 0x4cf2aa35, 0x9f2abe4f,
3852 0xaaad72d5, 0x65ad55fe, 0x87f0fcaa, 0xcfd557af, 0xa3074323, 0x0c90ecfd,
3853 0xb57221b6, 0x3e554ab7, 0xaa2de772, 0x86919ff6, 0xbd69e3cd, 0x79fe42dd,
3854 0x8aa39d1c, 0x39ce7183, 0xed554b6d, 0x62b6a49b, 0x9f46f01f, 0xbd6893e4,
3855 0xcb5f1c15, 0x62ff993b, 0x556afb74, 0xd8a367ff, 0x5fad183d, 0xa32e7696,
3856 0x912ed61e, 0x7efea447, 0xfb8eeada, 0xa8ee219b, 0xf296bfbf, 0x356eda4d,
3857 0xfe80bf3d, 0x8e6fd5a6, 0x5d3f7026, 0x7461490a, 0x0b0ba5ad, 0x5bbd7fea,
3858 0xe627b465, 0xc687ec91, 0xc40cbc23, 0x5fc7f4ab, 0xae76612f, 0x76ada7de,
3859 0xf559ff88, 0x47a432d6, 0x2e9a9253, 0x5d351422, 0xd3508e44, 0xa6aed585,
3860 0x6a25c183, 0x3dc2d03a, 0x0ba6a1da, 0x43ffa7e2, 0x2ae02de0, 0x553b1ee0,
3861 0x785a374d, 0xda0093e7, 0xc95eddd9, 0xfc6123ee, 0x70dbede2, 0x1fd2975d,
3862 0xf86a89f5, 0x34701c16, 0x2c6e1059, 0x61e84cbe, 0x68ffae26, 0xaf4213fd,
3863 0x7ae44b89, 0xf847ef15, 0x0f259a17, 0xfe7d51ea, 0x865f12c2, 0xa7f4132f,
3864 0x44ecc206, 0xf0c4a4ce, 0x3efc4676, 0xc0519d90, 0x2620f675, 0x03886b2f,
3865 0x882be1ed, 0xc9ddf90b, 0x3ed15bca, 0x63f2cab4, 0xad9ebbf4, 0x35527a62,
3866 0xbf9f22f1, 0xaa02b8e2, 0xfb109287, 0x528e16ab, 0x02b3e487, 0x20f2e1bf,
3867 0x79087485, 0x1378c2e0, 0x62e6864a, 0xad471f95, 0x30df82e7, 0xbd097f84,
3868 0xe0278c57, 0x189af829, 0xe41a44cf, 0x1a17d824, 0x6846473e, 0x3b6a48fd,
3869 0xe0f3b08d, 0x22fe2160, 0x44265dad, 0xe9916e0f, 0xcc90f238, 0x57f14226,
3870 0xdda07360, 0xce7488af, 0xe625ef87, 0xc2bd26b6, 0x935713ed, 0x80c4fb3e,
3871 0xfe12eaf2, 0xc91e59e8, 0x7f6668ff, 0x6bf0b43f, 0xf89fe5d3, 0x5e3c6d03,
3872 0x55ef1052, 0x078f0f2f, 0xa76fea7a, 0x857d1fb4, 0x02eb23f6, 0xc3f6a1b1,
3873 0x9206fbbe, 0x1373d71f, 0x424ddc71, 0x693710f4, 0x133f3c9b, 0x4e54c4ec,
3874 0xecca4146, 0xab5da458, 0x8ed1eb07, 0x012ba3ac, 0x2121afba, 0x60ccda7e,
3875 0xfee5e639, 0x74371179, 0x42e27d29, 0x3fc78da2, 0xc22778b0, 0x5f38a0f9,
3876 0x139e740e, 0xcf701471, 0x2221fc16, 0x9139a84e, 0x4973839f, 0xf74ff42e,
3877 0xb444a6db, 0x29fdd01f, 0xbec7ee85, 0xef2c22b8, 0xeb351fb7, 0xb2147117,
3878 0x42ed10b5, 0x7bd742cb, 0x7a10f019, 0x3ea86fcb, 0x1234f780, 0x0dd7a615,
3879 0x0381f63a, 0x553b0b8a, 0x46f59e71, 0x7b01807a, 0x8e3c8bc1, 0xafad4daf,
3880 0xe3c89b3f, 0xe739f893, 0x181af052, 0x4eee3c1f, 0xf532e3e0, 0x27771130,
3881 0x7f42f8e0, 0xc151efb8, 0xd8bcefb5, 0xe13df707, 0x72e02ee0, 0x29f3a8ae,
3882 0x3d6c97c0, 0xeef00092, 0x83ee7288, 0xfd47e9fa, 0x705d24a7, 0x1772155e,
3883 0xb6f6cbc6, 0xcf3f78cb, 0x5bc5813d, 0xc8c8f7b9, 0x4c3bba1a, 0x6ead37e8,
3884 0xc2f51d7f, 0x68ca46ae, 0xa6761ea9, 0xbfa90e91, 0x0340bd88, 0x47ce81ef,
3885 0x681f3d62, 0x75e22fd6, 0x7f7f3ae8, 0x3efc3809, 0xe42a1c1c, 0x9ee18351,
3886 0x919c5f57, 0x1551903e, 0x75da1f42, 0xb0f4e66c, 0x013cef56, 0x4cef1dfd,
3887 0x55fd0cdb, 0x53071dc8, 0x24eb3e00, 0xd1357fbc, 0x26cbeec4, 0x2574fbf3,
3888 0xdc3b06fe, 0xb34a4e37, 0xe1a9fde0, 0xe09d91df, 0xdd78fe17, 0x4f70316d,
3889 0x5c3ff44c, 0x4efde1d2, 0xe4fb9e42, 0x57f0428e, 0xa26fb02e, 0x162685b9,
3890 0xddf99197, 0xe5165f48, 0x891aaf23, 0x61a3f619, 0x6bde0368, 0x68cb4409,
3891 0xc9938cb7, 0x313ba024, 0x561f716f, 0xfafb877c, 0x7c52ef70, 0x2814d89f,
3892 0x0ed34b58, 0xdd620f4e, 0x0503cb13, 0xfc20960d, 0x16a65c45, 0x3c385b3e,
3893 0x66c6f1dc, 0xcdbb17d0, 0x52c9fce2, 0x9f23d362, 0xfb666759, 0xe255d8e6,
3894 0xc2b3edfc, 0xe11dd4b9, 0xf6063c18, 0x7932fbdf, 0xb17f2692, 0xe3470639,
3895 0xc7d415fa, 0xbb58d9d7, 0xbf071e6e, 0x44b2a3ee, 0x6f8e5f88, 0xa66f1f0a,
3896 0x5c73b124, 0x8beff72d, 0x1f7ab5ef, 0x42d58dc6, 0xf04176bc, 0x6bc695fb,
3897 0x01fc788b, 0x27ad10e1, 0xef78d1fa, 0x7ab179dc, 0x0e4bfcaf, 0x3ebebe7b,
3898 0x0fe22749, 0xcf4defd1, 0x0be3615b, 0xf9d8934b, 0xe807182a, 0x7dc37bc7,
3899 0x4a7b85f1, 0xce45c913, 0x0ef3eefb, 0x889fdc55, 0x9f9f7737, 0xfd7e7184,
3900 0x29fda5fa, 0xe15c6096, 0x92dff040, 0x86e5e6c8, 0xd082bf78, 0xdefb0aef,
3901 0x8f1c4e37, 0xc147f3df, 0xbb45fd3e, 0x7feaf78c, 0x75374871, 0xd779987b,
3902 0x5db83127, 0x7dc7af13, 0x1c47d233, 0x2f8cc2db, 0x35fb89ea, 0x76aa9ee2,
3903 0xfccbbb7e, 0x10fe608b, 0xbc6e1c47, 0xc48e9ca5, 0x30c777bc, 0x99f7b87c,
3904 0xed059ef0, 0x77bde317, 0xe257f8c7, 0xf1a9b0be, 0xd7b73b7c, 0x9fdebeec,
3905 0xa6bcf781, 0x40c33b31, 0x728de0f4, 0xd8f504fd, 0x4a65699b, 0x06fac53f,
3906 0xffb216c9, 0x410f452e, 0x7854ebb8, 0x23770fed, 0xfbf457e2, 0x4fbe61f9,
3907 0xe702c389, 0xbe5c25b7, 0x8351d92d, 0x1f38affa, 0x8cb0fe7d, 0x139f17f1,
3908 0xbcf927e6, 0xcff3c255, 0xeb211752, 0xf95a1f29, 0x88334164, 0x844925b9,
3909 0xbec3175c, 0x46e909df, 0xf97c9fb5, 0x87ecfdbd, 0xaeae5424, 0x57280d20,
3910 0xdd58fe56, 0xfbdc9aae, 0xb49fd067, 0xdce1fbfe, 0xb1d6272e, 0x479e8939,
3911 0x2629ef40, 0xd61f20c5, 0x3185f93e, 0x1f78194a, 0x777ca69c, 0xaff81e98,
3912 0x46aed319, 0x48bfa61b, 0x44963c72, 0xc927b7f1, 0x9ed20db5, 0xbdff59f7,
3913 0x7e4cbdb5, 0xb9438d6c, 0x2efd64d5, 0x087975f2, 0xc0f7ebe3, 0x1e14093b,
3914 0x97d31326, 0x720d7412, 0x5e2dea14, 0xf1e387a4, 0x6266aa6b, 0x74049ede,
3915 0x29cbf71f, 0xefce3153, 0x800e9197, 0x4752a6f7, 0x3625d81e, 0x997bb255,
3916 0xb3f31366, 0xf6317f7b, 0x0c837035, 0x0cbfbb6b, 0x8eb6c1ce, 0xf7b03efd,
3917 0x7cfee8b4, 0x5a57e210, 0x8bf163ae, 0xfeff3a09, 0xe2f190d4, 0xe049bd23,
3918 0x691f8f87, 0x388f38c4, 0x21af34b9, 0xcdca5e24, 0x9edbd171, 0x1ec27685,
3919 0xb61bb083, 0xa8bde045, 0x8183a1da, 0x18435c8f, 0x1bdc459e, 0xdf5421cc,
3920 0x8470a2ed, 0xbf914ba0, 0x19f24da6, 0x12fdf0a2, 0xded4e3f4, 0x0f984be5,
3921 0x7ae7ea72, 0xf98983f4, 0x5c9abdc5, 0x212efe06, 0x364be69f, 0xfae34766,
3922 0xfe223cfc, 0x5cd97f31, 0xb8f3274e, 0x923f3f1e, 0xb1297bc1, 0x5bbb4067,
3923 0x474a24cc, 0xf2fcd4b7, 0x675c22b6, 0xf41a218d, 0x19f7e105, 0x6f08cf58,
3924 0x653f72ff, 0xa58df765, 0x72743640, 0x62e7c286, 0xf9c030fb, 0xdd9b3bb2,
3925 0x88c323bb, 0xee8cfc03, 0x81b7c37d, 0x8834c27d, 0x7f29aff9, 0xa3e49732,
3926 0x73866d5e, 0x44afadd4, 0x2f22f8f0, 0xc8ec4fbf, 0xfa9cf883, 0x8c7cb4aa,
3927 0xc01a3913, 0x0dba3777, 0xc7dc0cfe, 0x5448ef94, 0xf2da0e36, 0xb87a19fd,
3928 0xf54299af, 0xd92f9a35, 0x0fcb2f72, 0xd1d4aff5, 0x4f2d92fc, 0xfdd3d0cd,
3929 0x7fc6bee1, 0x5b35f20a, 0xbe7cb176, 0xf34ca57f, 0x655e5bcd, 0x4960e1f5,
3930 0x2dc1ec09, 0x68786707, 0xb9a267ff, 0xf1fbb7bc, 0xe5fbb59e, 0x3b50bae1,
3931 0xe332636b, 0x9db8675b, 0x59264cf8, 0x1ef0055c, 0xb2febe11, 0x5a0f1d64,
3932 0xac54c569, 0x4927b457, 0xf325dbe1, 0xf7e56e71, 0x924627a3, 0xb7e60896,
3933 0x3c5144f3, 0x8e18e81c, 0x93afc77e, 0x6e9e9862, 0x38fbe3f3, 0x4f011fa2,
3934 0x77189fd1, 0xe067c835, 0xac789acb, 0x3f8664ec, 0x1c46ce3a, 0xdd839867,
3935 0xcb4aae2b, 0xbc51fc03, 0xf4de39e9, 0x8dbbfcec, 0x1bf68fcd, 0xa0728b9d,
3936 0x07f8ec00, 0x33f5a2be, 0xd2d6f383, 0x93324149, 0x3136b72f, 0x3a206b7f,
3937 0x6269e90b, 0xa5677f24, 0x668ebd50, 0xe4c6870e, 0x466f7e68, 0xc2512bc0,
3938 0x1c389a71, 0xcf78fcd3, 0x5dd74af2, 0x775a1ff1, 0xf01cbe08, 0xf681ca5e,
3939 0xf5b3b7ab, 0xcd7bf0c4, 0xd4188cfe, 0xf557eef7, 0xa6836677, 0xb8c1097d,
3940 0x164c7736, 0x8227bfb6, 0xd93bf198, 0x332ed7de, 0xa0ade997, 0x2c778acf,
3941 0x123ae788, 0x7bec47ea, 0xc58da2af, 0x39d70667, 0xd3af90a3, 0x6369d7c6,
3942 0xe8aaf4eb, 0x64091c95, 0xa7f6b6cc, 0xf7f83ee3, 0x9f2a37f5, 0xe7daa7f7,
3943 0x7d83fae1, 0xd65e103d, 0xd6f93a73, 0xa9e622f0, 0x9c1f6781, 0xf013f335,
3944 0xed8dfd84, 0x52e9a946, 0x5926b3cc, 0xfb35939c, 0x8e1bf33b, 0xd5daca57,
3945 0xb9e2cedd, 0xeba6a289, 0x3a99ddba, 0xed102b88, 0x1027c16a, 0x3dffb41f,
3946 0x89edcc9a, 0x806d2469, 0x93c7c4f8, 0x0ddac28b, 0x9cf6bbf1, 0xe2cd13d8,
3947 0x8af6b5d5, 0x277b789e, 0x9cf4afdc, 0x8c0aef63, 0xc06fd8d3, 0x259cf4cf,
3948 0x5f282ed8, 0x9c73f9d4, 0x3fb7f63f, 0x7e603205, 0xe7b2a685, 0x47d53b15,
3949 0x7e431cb6, 0xecb8385d, 0x7f9a4cb6, 0xc88ff935, 0xcb530bcf, 0xfca4c8be,
3950 0x9fb27f7c, 0x7d9647e5, 0x5bf21431, 0x44feacfc, 0xefc0f3c7, 0x633fc789,
3951 0xaf507252, 0x41592d78, 0x3ae5c9b8, 0x02647402, 0xc7ae8625, 0xe309aaf4,
3952 0x075c04f6, 0xba4d0b4a, 0x6ff77086, 0x07a3eedf, 0x812957e6, 0xf3b0153f,
3953 0x5f803b71, 0xf403b2af, 0xdf7bb144, 0x8eff7b3d, 0x483e5df7, 0x1e027576,
3954 0x16bb23ea, 0x5dfcd265, 0x1fa09f91, 0x3dd0724f, 0xc515f601, 0xf9d01646,
3955 0x9c9b5d4a, 0xd5913fa0, 0xe11eb376, 0x745eedca, 0xfc28178d, 0xf3f7d95e,
3956 0x61b2a5ef, 0xb18f309c, 0xefd40f9c, 0xe06ff2fb, 0x633fadf7, 0x7af983b1,
3957 0xdb96c76c, 0xdb1aff40, 0x4c97f6f1, 0x39fbb30e, 0xc163de62, 0x97bf49ae,
3958 0xfe709bb4, 0x5eae3b63, 0xfdc7f501, 0xe80b23b6, 0x5f31c264, 0x9e85b013,
3959 0xaaa52fbd, 0xcf90e5ee, 0x39d71a2e, 0xc04ddfa0, 0x54aa53e3, 0xf478460d,
3960 0x857c7832, 0xf1dd67f1, 0x68fd9b87, 0x7fdf54fc, 0xfa3afaa2, 0x20c97b91,
3961 0xc433f83b, 0xbdad7a7d, 0x5d2568f4, 0x213efd1f, 0xa2106740, 0x6f3c4f4f,
3962 0x98248ca6, 0xaad1252f, 0x5939b97c, 0x96c2bf55, 0x929f2aa9, 0x7caab574,
3963 0xcaa7929a, 0x56311f4f, 0x7b06ff55, 0x637f2aa9, 0xfd5534c9, 0x2aa5474a,
3964 0x536be79f, 0xd4382fd5, 0x423f2eae, 0xfe43c064, 0x90ebfb51, 0xa0749d16,
3965 0x74f8b5d9, 0x8e90ebc3, 0x87030bfd, 0xed7c5ed6, 0xe1d7b6f9, 0x6b17b0bb,
3966 0xfb0933ef, 0xc5b2cdf1, 0x276f0c6b, 0x0567d24e, 0x75901fdf, 0x18d33eec,
3967 0x94eaebab, 0xa67de0a2, 0xa62f6089, 0x7c58a848, 0x00e347ee, 0x3d980b4f,
3968 0x062028ed, 0x68adbee3, 0x686a3c87, 0x2c0fe678, 0xf81d200e, 0x5cc084de,
3969 0x9e27bad5, 0x5dd6a977, 0xe0d56e4a, 0x5f2a8d69, 0x555dbb61, 0x06d24a7f,
3970 0xe534f955, 0xdd3c1a07, 0x60dfcaaf, 0xd3c1a2df, 0x7e9e0d36, 0xf4172aae,
3971 0x5aedc1dd, 0x451ec0fb, 0xcefef1d3, 0x75c3c072, 0x8f8803a7, 0x72d6ce92,
3972 0x47b5d3c0, 0x855f10db, 0xb039673e, 0x0d43e2cb, 0xa3ea43af, 0xf76831e7,
3973 0xa612635a, 0xb4151a07, 0x1c6c1d6b, 0x46a1e981, 0x75ff7e3b, 0xefa60963,
3974 0x7d303a34, 0xa62a71af, 0x4c4e8d9d, 0xb0db1adb, 0xed8d73fe, 0xdb162ecc,
3975 0x3a45def7, 0x75ba07d8, 0x8278377e, 0x77923f17, 0xeecbf003, 0xc86efe41,
3976 0x37ec45df, 0x25f9a24c, 0xbee844c0, 0x374f29fc, 0x80023aa4, 0xca1c3757,
3977 0x18f1828a, 0x1e473a6d, 0xa477e1e8, 0x3ea1f84c, 0x37bb909d, 0xd16c9338,
3978 0x79a66f2c, 0xb3c63644, 0x83a1f84d, 0x2033d712, 0x33a9d04a, 0xf7c806e1,
3979 0x7772b044, 0x401b84ca, 0xfec6ff0f, 0xff3f4773, 0x61291df9, 0x9ccfe7fc,
3980 0xd760ac56, 0x70d5fc39, 0x30e3c02b, 0x48396fb7, 0x4d09619e, 0x0679f54b,
3981 0x0747b390, 0x80f0b7b8, 0xe009b4ae, 0xcfb3a6d0, 0xebef78c1, 0xb7e8040d,
3982 0x5fe7624a, 0xca95cf51, 0x0dcf41e4, 0x1d4f3c26, 0x605639d1, 0x7814995c,
3983 0x3dbce00c, 0xdee112a5, 0x00640d63, 0x4e29bcfc, 0x3c0f8f96, 0xf243d926,
3984 0x079f0606, 0xb6fc6e52, 0x3858f3e1, 0x62913cf8, 0xcfb6fa63, 0x807a0e91,
3985 0x74a91fc8, 0x3e7ec1d4, 0x0ab8ea52, 0x4d38cfef, 0xad3aff6c, 0x3ed0abde,
3986 0x139a28e4, 0x9219e762, 0xd1f7606a, 0xd82262e1, 0x71916f3b, 0x39e16b9f,
3987 0x7be99521, 0xce702748, 0xe789179c, 0xf63a2382, 0xfeb6819e, 0xb3d70e02,
3988 0xe3dbc283, 0xbd32a616, 0xdd566ca2, 0xfed02f33, 0x6045d67a, 0xe1ce3dd7,
3989 0x34f58fa8, 0x342ae850, 0x8e70dd3d, 0x1cec9b95, 0x9dbfe824, 0xf2d17f0f,
3990 0xfb6e3a67, 0xfd68efeb, 0xda45d64f, 0xaed88651, 0xc2ddf841, 0x358c2f2b,
3991 0xb0b4fea3, 0xe40cbd2a, 0x07ee7ce2, 0x27d5645c, 0x1f503ba0, 0x1727846d,
3992 0x9af25b97, 0xcac90429, 0x3c234ab8, 0xb69d5525, 0xd5d219a6, 0xc237eec3,
3993 0xa3b52913, 0x1a833576, 0x70b7475b, 0xff3ff211, 0x5e748dbb, 0x0acbd78b,
3994 0xfb89cf3b, 0x145735ae, 0xf7e822cf, 0xa23b8f08, 0xeaf3c040, 0xd16f0e22,
3995 0xd787116e, 0x3fae1489, 0x0b9c90e6, 0x67d63f6a, 0x0b5def40, 0xc01ecddf,
3996 0xe72ea0cf, 0x4607e3fa, 0xfdf6ae36, 0xe2ee3112, 0x3afe7654, 0x0994a462,
3997 0x4c2de4fa, 0xfdcee40e, 0xba22aee2, 0x9b0edcfe, 0x1615e30e, 0x7800bdd7,
3998 0x78e76de8, 0xd8769034, 0x4b3cb34f, 0x221df93e, 0x8f754e26, 0xd2f252f7,
3999 0x0f2b69de, 0x7e859795, 0xbca87967, 0x96b4092c, 0xf2145c83, 0x7d4ff851,
4000 0x2f9cd58d, 0x3d3f2037, 0xf31eb8d0, 0x983d1b07, 0xe16c6a1e, 0xcb15b97c,
4001 0x987c69df, 0xe72f65f3, 0x7bf13bcb, 0x4c5ce347, 0x58ba35f7, 0x9519ca3e,
4002 0xecc4fb0a, 0x37c4f8c2, 0xf80898b6, 0x4c3b7ae7, 0x77419f18, 0xc68f63c4,
4003 0x0991fc41, 0xe36a71ef, 0xbe7cb490, 0xf7761e8f, 0x0525377b, 0x1f8be9c6,
4004 0xc8717d02, 0x9874f4c0, 0x4be05628, 0xe4fe8ff9, 0x0fafd006, 0xf4158a2b,
4005 0xcdd482e9, 0xac50ef2c, 0x7c2f9a06, 0x8a5de794, 0x22ac04d5, 0x5be421f5,
4006 0x358a3d87, 0x1f8be682, 0x7b95887d, 0xc7f33a09, 0x06f5ba3d, 0x2259f00f,
4007 0x51fd801d, 0x449cce6e, 0xd79505c5, 0x5f6007a5, 0x325a494c, 0xcec5f609,
4008 0x63e90514, 0x00e1b29a, 0xd88fa7e4, 0xfaab87a6, 0x46de4b0e, 0x57165768,
4009 0x937687a9, 0x846cd6d2, 0xdd879376, 0x376d0faf, 0x8daed475, 0xdf619f90,
4010 0x74fd07a6, 0xf8b1f027, 0x2f223f60, 0x169f05ca, 0x3ba37271, 0x720f289c,
4011 0x0f289ddb, 0x66ca5c04, 0xf60dde57, 0xc976facf, 0x663cc126, 0x0a417d4b,
4012 0x86e89310, 0xbf2949f7, 0x97f53ebe, 0x5db40dd6, 0xc5afe43d, 0x7c370ffc,
4013 0xa6fbfcbb, 0xfbfc30d4, 0x41dfbe43, 0xfbdc43de, 0x0ef64687, 0x2e1c33cc,
4014 0xac4b1df5, 0x712a8ef8, 0x7acf4159, 0x97f3cb9e, 0x9fe5a520, 0x7f8bb4f1,
4015 0x70e7407f, 0x52ab38c1, 0x3fb21fb9, 0x6549a87f, 0x8f735ffb, 0xce728064,
4016 0x6d52ea1f, 0xea3cf7aa, 0x76bfbb08, 0x6d3b38a9, 0xee36b89c, 0x3b693564,
4017 0x1fecc8e8, 0xf70b526f, 0xc7fab2dc, 0x6a788b7f, 0xdf781c6d, 0xe3106ab9,
4018 0xd78173a7, 0x496eba50, 0xde4f901d, 0xdc38097b, 0xfd0e0e1b, 0x9c5843d6,
4019 0x2438bf7b, 0x5daeef1e, 0xb3c57117, 0xfc798d77, 0x827d76bb, 0xafaffa2e,
4020 0xcf5fc195, 0xbbf54fe0, 0x157e60c7, 0xec04ad8b, 0xe7fca156, 0x3fe11777,
4021 0x6df67e5a, 0x179bc9f1, 0x65bbe1d7, 0xf3d8f861, 0xb898f8e1, 0x854dafcf,
4022 0xf3f70a9e, 0xde121e20, 0x7e738239, 0x1f6ba265, 0x1653d3f4, 0xce0e9bf8,
4023 0xddec71a1, 0xaed183f0, 0x325df0fd, 0x1106b8b2, 0xe75a7c97, 0x6de815f9,
4024 0x19fa3def, 0x106eb3f2, 0xbc8f7416, 0x97a0f341, 0x7ce6c3fd, 0x4647e013,
4025 0xefa18df8, 0x7f140f8f, 0xff2e1bfb, 0xdf6ca7fa, 0x9ed43889, 0xa0665f6d,
4026 0xfb12eefd, 0x54782062, 0x70fde3c8, 0x24b7a43f, 0x9767e512, 0xdef07c44,
4027 0x02695771, 0xe95d2dea, 0xdfa43d46, 0x2bb8b9f6, 0xd7fb1b3d, 0x92bb8f9e,
4028 0xdc6ccc4b, 0x7d2153c9, 0x2154f92f, 0xf0dfbdc8, 0xa376cbf8, 0xb03de0a7,
4029 0x408d8f0f, 0x928dfeff, 0xa0e010bf, 0xbd77573d, 0xc94ca0b5, 0xa6be7fed,
4030 0xeb049beb, 0xbbae3dab, 0xe95dbe1b, 0xfd76bb79, 0xb9c408df, 0x15ff5b8f,
4031 0xaeeff781, 0x19ddfcfc, 0x5e80ab93, 0x12026ae1, 0xf545d319, 0x54bf9a09,
4032 0x8939d6fc, 0x4333d39e, 0x6f25e5ce, 0x9e2e38b3, 0xfde7cf6a, 0xed5c09de,
4033 0x960dc751, 0x5e308afa, 0xe147f645, 0x7b1d60bd, 0x73c4436f, 0xf3cfc9bd,
4034 0x243ebcf4, 0x9d70ed0d, 0xfaf3aa19, 0xfa2d1f1d, 0x0881f21e, 0xa678ef8c,
4035 0xcc3c44fd, 0xf19d8ff5, 0x0945793f, 0xedbd77d2, 0x9df4246f, 0xbdf5dac0,
4036 0x86d77caa, 0x7056fbe0, 0x5ff6ab1f, 0x2a25ca32, 0x4f105ac7, 0xdae335e4,
4037 0xda4af910, 0xef07dcfe, 0x55df94d1, 0xbe50c002, 0xd074cf36, 0x3cfc9576,
4038 0x8de44844, 0x92aeda0e, 0x67891f9f, 0xe78f2b25, 0xb09f3df5, 0xff28ba7c,
4039 0x7fac4ce3, 0x1c6fe895, 0x79164f2b, 0x22d5dfde, 0x9623789f, 0x25f68a67,
4040 0xc6239f2c, 0xaded64af, 0xade4feac, 0x7a099cff, 0x33f7e08d, 0xe09cb8d2,
4041 0xfe5152ef, 0xba2b4cef, 0xba8ebc68, 0xf107cb9c, 0x1dc5550e, 0x85df22d3,
4042 0x6126dc7d, 0x9ded61ec, 0x9fe7b406, 0x0dcb698d, 0xe22f2fbd, 0x56e59c7a,
4043 0x7baaf38c, 0x9976f871, 0x1e813bc7, 0xe9fb9cb3, 0xfa0b642b, 0x65ef7a61,
4044 0x3d207e7c, 0x97fae570, 0x57ecf855, 0x46d3dfce, 0xef1d2547, 0xf1130fdc,
4045 0xd619027e, 0xee02f189, 0x27c44934, 0x116abde0, 0x45971757, 0x8e7e701c,
4046 0xbd82297b, 0x13b27aa7, 0x97caeff9, 0x6ebb7d98, 0xef28ebcb, 0xda0aca96,
4047 0xea1ebe97, 0xe9f0075a, 0x2f77b2b6, 0x87dfae57, 0xc531f4fb, 0x8160fdc6,
4048 0xbcf0a151, 0x3dfc3fb3, 0x8517f169, 0x3ffcbabf, 0x5dad7f0c, 0x5fd7dc5d,
4049 0x7ff1857d, 0x07e656dd, 0xfd3c73b6, 0x7314a749, 0xf0023d78, 0x33a2b73a,
4050 0x20865a3b, 0x778c4eee, 0x29df90ab, 0x6f56f382, 0xde009583, 0xdccea5bb,
4051 0x5fe0c30f, 0x9f38ae7b, 0x69715441, 0xf7c3fb3b, 0xf7d04be9, 0xfa4dffd3,
4052 0x8dfbd44e, 0x1f1bf076, 0x15e5ef65, 0x18c9fe77, 0x4ef41f1a, 0x0f073b1a,
4053 0x317e676e, 0x2c171711, 0x713c32b7, 0xd55d53ff, 0xffc1e33b, 0xc4c3f624,
4054 0xfe06d248, 0x76d74a04, 0xa076d74e, 0x41bf416b, 0x176d143f, 0xfa41be06,
4055 0x912e2c25, 0xfdb7e9c3, 0x25e1fae1, 0x7fe1fae0, 0xa9bbae13, 0xdbfe8c3e,
4056 0x4ed02217, 0x3ff385a3, 0xbc055c38, 0x0e2fd323, 0xfff4c8e7, 0xd3239c0c,
4057 0x439d9515, 0xf9207bc0, 0x988fc5a4, 0x5a7d9877, 0xe9f64df4, 0x4f9c1923,
4058 0x8f18fde9, 0x4c7bc5ab, 0x27bc3f7a, 0xef1c5fa4, 0x30fff2ea, 0xd370b5de,
4059 0x9fdcb5a6, 0x985efdab, 0xfbbf203e, 0x7ff8e056, 0xb0b04fcd, 0x7caabf61,
4060 0x54b7faf1, 0xef3c4be5, 0x415f965f, 0x5bfffbd8, 0x57e105fe, 0x2afcf998,
4061 0xb51ff81d, 0xc43741f2, 0xc7a023f9, 0x7afe5f1b, 0xf93087d4, 0xb78c6cea,
4062 0xe5af8dba, 0xff7ff18b, 0xbe947be4, 0xf66068be, 0x3ffb63d6, 0xfd392837,
4063 0x79e165e9, 0xd084711d, 0xeff5c2d9, 0x5acf401b, 0x54fbd848, 0xa60ffada,
4064 0xc6307b33, 0x30be5149, 0x710c4cd7, 0x9dcc1f94, 0xcf4beecb, 0x0c630705,
4065 0x2d173ea6, 0x3e27a99f, 0xd2bb8f78, 0xd099f7a2, 0xffbea9ef, 0x75efe26e,
4066 0xd558b893, 0x21d9783d, 0x9cdf9c63, 0xbd2fe612, 0xf786d2c5, 0xba1de787,
4067 0x60f7dceb, 0x14f46f2f, 0x7177b8b1, 0xbaf7f0ff, 0x3e83f12b, 0x9c2a7a08,
4068 0x5fee24fb, 0xff40635f, 0x2addb6ba, 0xca669fbe, 0xd9a38b12, 0xc533e2c3,
4069 0x3beba4fe, 0xf767ca64, 0x48f7e060, 0xbe0c1b2a, 0x67a0b9e1, 0xbb3d47ef,
4070 0x2e4364be, 0x927eafe0, 0x1b94dc74, 0xafd4ef3c, 0xd7b60bff, 0x7a6d67f2,
4071 0x4fd5f6b9, 0xbd210f1a, 0xb1d17388, 0xb5e61f46, 0x1305d6f6, 0x93fd17ff,
4072 0x6de2ff63, 0x57dc7482, 0xd0c70f8e, 0x3b1bfb75, 0x827b2dff, 0xbb0823b0,
4073 0x214ed682, 0xbf7888f8, 0xe36e97d2, 0xa296b2ef, 0x59e883df, 0xc1edf82a,
4074 0xd7f9fcfe, 0x27d717e9, 0x61ffe5d5, 0xf4b97cfe, 0xe4c49b5f, 0x8fee96aa,
4075 0xed0cfd56, 0xb5be82cf, 0x6200bff4, 0x0bf8e852, 0x27bc25ea, 0xab55773e,
4076 0xcdf49c61, 0xe5b57de9, 0x9b830664, 0xb15c2e46, 0x3c78503c, 0x0be78c87,
4077 0x0ec6bc93, 0x87810f76, 0xefd5d3af, 0x48bc5303, 0xab971719, 0xfafff2ea,
4078 0xa2e4e039, 0x8917266f, 0xcb489f4a, 0xe56eb7e8, 0xfe56eb12, 0xb90eeb9b,
4079 0xd648b4a7, 0x40e3ef05, 0x81c435fc, 0xfdd978f6, 0x56ccead4, 0x5203ddfc,
4080 0x7e028812, 0x995eeb77, 0xde8e9efd, 0x790e4fa1, 0xf88bad3f, 0x5c7a003e,
4081 0x3bbd9e35, 0x769b8da4, 0xd5ea78f3, 0xbf78dd96, 0x9a0efb51, 0xf376cb88,
4082 0xa1efb4fe, 0x9de2f689, 0x687bed03, 0x1c783253, 0x67c93e76, 0xe7172971,
4083 0xcf20dda3, 0xdd35fc43, 0x5da2355f, 0x4ac7c6e1, 0x05a4f3ee, 0xa32732f1,
4084 0x9799df1f, 0xa3be7171, 0xd32fff2e, 0x81dd6caf, 0x94aed8f7, 0x3a64477e,
4085 0x827f40dc, 0x9bf1f72f, 0x6fc84c57, 0x3df33bc4, 0xf7c19e6b, 0x24be7a87,
4086 0xd4bd97e8, 0xbb13e33b, 0x09c435d8, 0x564dbd27, 0xc771d78a, 0x1baf683c,
4087 0xf785c47b, 0xe3bcc776, 0x927f8880, 0xc329c077, 0x233e85bc, 0xff209bf4,
4088 0x78d9f7e2, 0xf2e5d59c, 0x37f52bb9, 0x8cfca7fe, 0xb75d5ee2, 0xbf0457c1,
4089 0x13d9e0e7, 0xa103bf81, 0x1993ff9d, 0x93be8bba, 0x7ae511dc, 0x8b34f012,
4090 0x5ef109cb, 0xdecc8572, 0x94edef49, 0xeeb85ed1, 0xabfb7e7f, 0xdb4b9547,
4091 0xbd6dea15, 0x2265cf61, 0x7bb1d7ad, 0x0ae5f92d, 0x79c249c6, 0xc287ec0d,
4092 0x7fada89e, 0x297b294a, 0xe35bed03, 0xdeda3df1, 0x067cd987, 0xfafd57c2,
4093 0x603f8e00, 0x7ebf1f39, 0xf42d916f, 0x19f3959d, 0xdb43e77d, 0xdf107329,
4094 0xff174b97, 0x332dced7, 0xa891e265, 0xbc91cd7c, 0x4c25ef4c, 0x3a405dff,
4095 0x02445d31, 0xbb08ba98, 0xd894b0cf, 0x9c4e5d31, 0x5c55ae98, 0x3718195d,
4096 0xf8c04814, 0x39ff17d3, 0xdce6e80a, 0x215ae375, 0xf2dbf146, 0xbef56923,
4097 0xbd853c9e, 0x3fc2f497, 0xd9f4077f, 0xcb863ff3, 0xa2471be2, 0x1848641c,
4098 0xa57bd33f, 0x54d7bb32, 0x17dc5df2, 0x325dfde2, 0x96e1f989, 0xfee26627,
4099 0xc4cdf209, 0x826f826d, 0xb8e7393f, 0xdcc3c58e, 0xc67be12a, 0x6e1d7eed,
4100 0x99159cb1, 0xb9ddf85e, 0x3cacddf6, 0x2bda2ea7, 0xd8ce7cd1, 0x26be5608,
4101 0x4ff70bda, 0xee3f1216, 0xfb70c5cb, 0x4bfb8644, 0xdf8a2f8c, 0x8227a00b,
4102 0xbf6d12a1, 0xeeccc3a2, 0x30ff1051, 0x70b9ffe0, 0x4f170a7e, 0xf1f18433,
4103 0xbf1943d1, 0xb6a65d1f, 0xe5e50c87, 0xdf6529f7, 0x0cb47807, 0x810d6471,
4104 0x9b9d31fa, 0x3b042c1e, 0x9f808e90, 0xb7b1b3e6, 0xb4535fa3, 0x1b29517b,
4105 0x959ff501, 0x67bfbc58, 0x4c6fbf2f, 0xfea10902, 0x794ab5b1, 0x1a2bd42e,
4106 0x40d3f8c2, 0x51df8570, 0x2f398674, 0xd1d1f88a, 0xbb436670, 0xd277c13c,
4107 0x7e58959e, 0x6f5be3f2, 0x5f4168dc, 0xe3f40782, 0x44d71517, 0x91b46f18,
4108 0xffcc0b10, 0x1b7efca7, 0xbb00c869, 0x4cc7aae8, 0x3e2fd03a, 0xee18e2a2,
4109 0x9e81fcf7, 0x98fd21b7, 0xfd219b9e, 0x43373d23, 0x9b9e9c7a, 0xcf413d21,
4110 0x38ae90cd, 0xccc7876f, 0x8e2189c9, 0xf0bfd0b9, 0x5be769f7, 0xd7f18439,
4111 0x1af7f1be, 0x14fbfc71, 0x0fb7c217, 0xfe087bdf, 0xd1b3edde, 0x8b989481,
4112 0xdecf5bd0, 0x749fa3bf, 0xff08b820, 0x0a7cb6a3, 0x6eee6bc7, 0xdcffca3d,
4113 0xcad47f76, 0x872b7a90, 0xce7db118, 0xa0a3270b, 0x1f5b6eff, 0x5d121d7c,
4114 0xcb1d4cf2, 0xb9fc7caf, 0x828e371b, 0x0fbe3bf9, 0xf9f74174, 0xdb73486a,
4115 0xfc00fb7f, 0x1fed2a5e, 0xa47a24e3, 0x2f3c66c0, 0x85a1d668, 0xb3d75883,
4116 0xa09b9dd1, 0x0c2fb3fd, 0xbe509585, 0x01bed843, 0xadc2923a, 0xe7ae0377,
4117 0x10a05346, 0x78dd0bee, 0xa71b0e41, 0x8a529f7d, 0x7a064e70, 0xcaddfe43,
4118 0x025f4653, 0x7f74df6f, 0xe223fb6b, 0xa5e015fd, 0xafa5c80a, 0xac2f40a2,
4119 0xed04f1e4, 0x06fd87bb, 0x2439e9d6, 0xdabdf813, 0xfdea31d1, 0x49e38bb7,
4120 0x8d7b39a4, 0xb3d7c04e, 0x830d4f7b, 0x7e2989f7, 0xc57bc186, 0x455c86db,
4121 0x31ef7f42, 0x8f97ec67, 0xf587183c, 0xe769f7f1, 0x10156d91, 0xbcdf3337,
4122 0xd2580dff, 0x0af1db42, 0x9c599b88, 0x74841d24, 0x19399289, 0x7dc465e2,
4123 0x4a236583, 0x9a96c20f, 0x7d44af61, 0x4c9814ae, 0x37287c88, 0xd847f247,
4124 0x558a3c85, 0xa524a7e5, 0x534feaaa, 0xd3e554b2, 0x95548c47, 0xd867718b,
4125 0x46f5540b, 0xc28604c7, 0x83ae8e79, 0xa4ff03bd, 0x3986f18c, 0x7eb91c2f,
4126 0x7ccfcd24, 0x43be0e6a, 0x9f2f2cf9, 0x17b95cf9, 0xe143d1f0, 0xd50aa469,
4127 0x6c1f92e9, 0xd33a107e, 0xf76a179c, 0xa1d0713e, 0xe179c65c, 0x8184e712,
4128 0xed164fde, 0xca04e7b5, 0xbe001f37, 0xd9c5fa39, 0x3edbf036, 0x14cbf63b,
4129 0xcdfd4788, 0x0caefe10, 0x440c3f3f, 0x43fb7d37, 0xbcdd1852, 0xc3279325,
4130 0xf2440dd0, 0xe9643a32, 0x7eecc3cc, 0xb5f295de, 0xa1af814f, 0x4243c0bd,
4131 0x6b577f7f, 0xb46d1bdf, 0xb036e6ff, 0xc32bbd47, 0x7bbea50d, 0x6fe12b93,
4132 0x64ef4839, 0x93bbb6f9, 0x07bbf0e3, 0xb73761f4, 0xb8520df7, 0xffbb553e,
4133 0x60c2e4ee, 0x5c775939, 0x29dc9f55, 0x1bf2ab35, 0x7bf9d533, 0xdb439b4b,
4134 0xad8fa40f, 0xd189787c, 0x6ef70395, 0x37bfb0a5, 0xfff3e62c, 0xd5800901,
4135 0x00800020, 0x00000000, 0x00088b1f, 0x00000000, 0x19b5ff00, 0x6554540b,
4136 0xcef7bbfa, 0x7860190b, 0x77421028, 0x840a4498, 0xb0285789, 0xd71ea08d,
4137 0x8f4c1ada, 0xe5935654, 0xe04d7903, 0xe3d8f4b6, 0xb68fad18, 0x695b6d07,
4138 0x9656356b, 0xb139e4e7, 0x36254644, 0xeb495bae, 0x66a254d6, 0x42d899e4,
4139 0x7a26704c, 0xf75a9d6d, 0x5efffefb, 0x5b602e67, 0xe74ed69d, 0xffffef9f,
4140 0x27ef7ffb, 0x70ca1490, 0xf60800ce, 0x9970ccac, 0xd6f70601, 0x8018e41a,
4141 0xe2eff4d3, 0xf9b8daf0, 0xcf03837a, 0x3a380057, 0x01cfe3cc, 0x031401d6,
4142 0x7b81295c, 0x5914f3a2, 0xff60e760, 0x2fbdf165, 0x00490801, 0xde8d179e,
4143 0xe38456ed, 0x6e67065c, 0xf08d9ef8, 0xd918064e, 0xbfefff72, 0x25f5c22a,
4144 0x8c0ee3b0, 0xbd0d43c4, 0x5c75d79b, 0x9fcd7114, 0x77d1d704, 0x98809679,
4145 0x55706b80, 0x00e207b4, 0x3c636a9a, 0x679e3e62, 0x2e990e86, 0xa6f1c804,
4146 0x01529bb5, 0xc0228a8e, 0x78074439, 0xe3ef14a0, 0x245f041b, 0xa4ef39a7,
4147 0x67c8b9df, 0xe7c72fcc, 0x35b03245, 0xe99432bf, 0x7ed77bc6, 0xbf1ce787,
4148 0xce91a203, 0x8f4a803f, 0x2e5c4c03, 0x19bdbb04, 0x3f233ffe, 0x1812bd4d,
4149 0xf0619f90, 0x605aba1d, 0x25a9ccd7, 0xa7e92b00, 0x061dfb4c, 0x196fd890,
4150 0xb2957f70, 0xe57cb2bf, 0xf08b10a5, 0x2040fd56, 0xa70fbd9b, 0x7fd5fff1,
4151 0xf198376f, 0xda53f57c, 0x530f427d, 0xfbe52f90, 0x77b3f03a, 0x3de277eb,
4152 0x235ef853, 0x8499fddc, 0x697636ef, 0xc7245fbf, 0xe0e60d24, 0x3828028f,
4153 0x916db12d, 0xf1366bde, 0xdf4ae6f7, 0xea097bbd, 0xc925e9b1, 0xd1adc46e,
4154 0x00e2d3dd, 0xa83983f9, 0xf2f1d4e4, 0x7a8cda6b, 0xa7c30c2a, 0xbdf34b76,
4155 0xca175f74, 0x5e319ea8, 0xe2c960ce, 0x5f1c2cf8, 0x0bd7c573, 0xf735f101,
4156 0x7ed0d0e8, 0x1146cf00, 0xcf3c08e4, 0xf2ae31ed, 0x07f4c39a, 0xfcc79c2d,
4157 0x66132f9e, 0x1d75f2e7, 0x1ced01d1, 0x98bf702f, 0x093e8021, 0x60b541f1,
4158 0x5f4b8edf, 0xc925724f, 0x9f004fbf, 0x589ec05c, 0x5cfd4264, 0x7da39fc1,
4159 0x8fe02433, 0xe11d6c94, 0xfdc8a859, 0x7c7fd28a, 0x8b77e023, 0x434f167b,
4160 0xd750e00a, 0x0cd43eb2, 0x0c6d906c, 0xe8f012df, 0xf17d2f49, 0xa416f4ce,
4161 0x604932f3, 0x1f17dff6, 0x7f10161a, 0xd0b4455f, 0xeff7b026, 0xbe55f7a4,
4162 0x74cef4fa, 0x8e6be337, 0x26f51065, 0x4e902e38, 0x47978f47, 0x183aae58,
4163 0x712bf554, 0x9c7f2177, 0xfb3edd2b, 0xd1dbf412, 0x223160a5, 0x684b97bd,
4164 0xabc30838, 0x49ab8fdc, 0xae5133d6, 0xe8813f82, 0x6e17966c, 0xe4bbf191,
4165 0x97417bd6, 0x1d372118, 0x2f5533f7, 0xd3c71caa, 0xf72de2a1, 0xd1bf903b,
4166 0x9fb3021d, 0xecccbb46, 0xe4fcb1b3, 0x7f104b83, 0x0bb25fa3, 0xeeb2cf48,
4167 0x7e4847bd, 0x403b6b1d, 0xe7401e77, 0x2eb66eda, 0x527d9933, 0xd98be31e,
4168 0x414688ad, 0x6056ad7c, 0x7c35a7c6, 0x0c7be61e, 0x7c3f51bc, 0x3804ce06,
4169 0x9e7ceb18, 0xfbf35bf8, 0x1096fbcf, 0xe3ca1bb5, 0xad901f99, 0x3fa61b9d,
4170 0x466000df, 0xa3db43fa, 0x3c304fbd, 0x6125af68, 0x27b13d7b, 0x9e0b70eb,
4171 0xcf53789f, 0xc55f75cc, 0x416ea7c3, 0x68f6cd78, 0x0913e726, 0xf3a549e0,
4172 0x3d7ba627, 0x18a56178, 0xb9216fea, 0xb7d8c677, 0x47f1f9e3, 0x13bb3fa7,
4173 0xa767dae1, 0xf24c89d9, 0x7de5191f, 0xda011d3c, 0x7d953e7f, 0xef1c2907,
4174 0xa52fc50a, 0x57dc6667, 0x24cfe74e, 0xaa8f09da, 0xa347a1bf, 0xfaf2801c,
4175 0x16797c12, 0x8293bd34, 0x87c45067, 0xc79dc4eb, 0xdbcbb404, 0xc483ae0c,
4176 0xfe47eaf7, 0xf90ca87a, 0x37e67aa9, 0xfa44cf0f, 0x0c9bdf6a, 0xaf584ef4,
4177 0x6c40e2e3, 0xdffc9720, 0x915ffdc6, 0x288edd4f, 0x7111c7cb, 0x5e23a1a6,
4178 0xa7753703, 0x888e3e5a, 0x65c07537, 0x8e82f50c, 0xfc57a9f8, 0x1d745eaa,
4179 0x201aba25, 0x8422e3c0, 0x0557640c, 0x78a0e092, 0xc8c7ba10, 0xced63fe4,
4180 0xd1916546, 0x8b822f51, 0x224179e2, 0x6fc85298, 0xc17e5c5d, 0x713fa67b,
4181 0x9266ca17, 0xfbf54135, 0x223385ac, 0xf1bfb3ed, 0xcdcfb215, 0xc39f6646,
4182 0x8d2f3c51, 0x391ff3c5, 0xc2bf7d9e, 0x87f305f4, 0xf5a4f933, 0x17385adf,
4183 0x0aef141c, 0x9bc2e4da, 0xf4516d70, 0x29c52c72, 0x1dee4958, 0xc03aeff7,
4184 0xe6f5b9e4, 0xbf7784a3, 0x0e0fe999, 0x0507b970, 0xf7d5279e, 0xa0429856,
4185 0xb77a242b, 0xfdd57a31, 0xf3872dc1, 0xe0fef85c, 0x8079390b, 0xf24cbcf6,
4186 0xe505fe0f, 0x7fc62a73, 0x3b5c36ec, 0x853bbff7, 0x7a58e0f2, 0xd9475beb,
4187 0x2c3c2a7b, 0x4f5438f0, 0xf7fee07c, 0xa264ce99, 0x8b08c313, 0xcd77030f,
4188 0x2b9bf260, 0xfe91c6e5, 0xf4b42783, 0x7d53a58d, 0x7d4fa55f, 0xcd37bd5f,
4189 0x8e39322a, 0x9479fc18, 0x90cc5ff7, 0xc48d7c35, 0xcde2f3fa, 0x75e16fb4,
4190 0x11c20244, 0x3f4356f6, 0x2635bf51, 0x5f48db8c, 0x6f608d4d, 0xa1efb603,
4191 0xcfab89b8, 0x29f5e785, 0x03722b2f, 0x78ed09a7, 0x906762b1, 0x6eecc894,
4192 0x5ebb7011, 0xabedc4ac, 0xe80f43a0, 0x75c4472f, 0xfda035bf, 0xa03c770d,
4193 0x5dc64577, 0x74f151cf, 0xbb8f4fce, 0xa6c84a9e, 0x31623df8, 0x9e66bab3,
4194 0x7bb1d055, 0xf74e90e9, 0x43eedcf0, 0x1a74f03b, 0xcf486ded, 0x8173a2e3,
4195 0x6f53e515, 0x1f91e5f0, 0x2e3ddfa8, 0xb0fed8ba, 0xe9056070, 0x3cbe741b,
4196 0x1bc4ef56, 0x233ac040, 0x77eed938, 0x25f65d50, 0xd412b8b0, 0xe2274d43,
4197 0xdd12aa2d, 0x3c70e69d, 0x5167e354, 0x5ca3ee0e, 0xf55f682b, 0xa29bb457,
4198 0x30fded7c, 0xb8f85a3f, 0x515dfb95, 0x98eee8a2, 0x576e5fc0, 0x1d06dcf4,
4199 0x9e67f712, 0xb914cb47, 0x4522dd63, 0x4a8d2dd6, 0x9ac60f9c, 0x53f2123c,
4200 0x82f51bb6, 0xb7ce9970, 0x028c5697, 0x9dfa8ad0, 0x5efe3e05, 0x539e36b7,
4201 0xf2ca590e, 0xcbcb0e72, 0xaf7514b3, 0x7a40dc17, 0xc2fe5135, 0x2fc12ef5,
4202 0x082bfad1, 0x1601d5b1, 0x06a8ad1d, 0x2701ceb6, 0x9b81e75b, 0x9da1f3ad,
4203 0x83a00bad, 0x9f8297ad, 0xaf8170ad, 0xb83e580d, 0xf98832dd, 0x52bd7e18,
4204 0xb45cbca4, 0xfc7ae264, 0x675e4571, 0xf9460797, 0x8f2f9f92, 0x614ae079,
4205 0x2e4d9d74, 0xdd99b353, 0x923172ab, 0x5177e27d, 0xb5a14de0, 0x9dec0202,
4206 0xf190c98b, 0xeb20d99d, 0x0702ae08, 0x48fee783, 0x5c069479, 0x04ee573a,
4207 0xd89aa972, 0x7628764e, 0x5d364c52, 0x87d7d61c, 0x54171e56, 0x49d201bd,
4208 0x3ebc60f9, 0x2ce88321, 0x5cfcae8a, 0xdaf190c6, 0x3a9df7b6, 0x8545a38c,
4209 0x84362d95, 0xe53f590f, 0xf3e55970, 0xd91f0899, 0x9ba9d276, 0x595e7649,
4210 0x1563b7a8, 0x39d86eba, 0x184dcf07, 0x4e50a3fc, 0x52824d92, 0xb1515d5c,
4211 0x677e8079, 0x74ebac94, 0xdbc657e8, 0x5719c580, 0xd59f8014, 0xe46568b3,
4212 0x7ebc3527, 0x7ae1635d, 0xbd706bdb, 0x60da7e4a, 0xc8cac5f2, 0x73759ad3,
4213 0x6e5f2993, 0x3ff7f030, 0xbce72c9a, 0x22327282, 0x9841533e, 0x44f73c4f,
4214 0xe4101c21, 0x186b5696, 0xf7c08fff, 0x77c21fcf, 0x5deb8a6b, 0x594dcf16,
4215 0x534ffa40, 0x676779f2, 0x245d8a59, 0x3f8616fc, 0xd2d59310, 0x5207478a,
4216 0x7bd21f9c, 0x776e18c1, 0x5eb95a1f, 0x329ab6ce, 0x27581f1d, 0xfbae0fd8,
4217 0xe28f977a, 0x084827d0, 0xd599f3be, 0x34744035, 0x428c8189, 0xd11dd7d4,
4218 0x27640cc7, 0xa80b1daa, 0x7fc8a5bc, 0x06bc039b, 0x96e51fe6, 0x2d98f533,
4219 0xe5c107ec, 0xa5ca1ef8, 0xd2ace9c8, 0x8d4971e3, 0xa5ad1f7b, 0x3c2af6ae,
4220 0xa2413c21, 0xad0a49a7, 0x1538bb20, 0x13e19eff, 0xb953a7e6, 0xabf12a3d,
4221 0x6def4f67, 0x42741c69, 0xed361f84, 0x0fabe6f9, 0xa34ddf50, 0x0f5d3b66,
4222 0x1696dffb, 0x1ab00bea, 0xd517c4d4, 0x1b75672f, 0x955fd47d, 0x397f3eed,
4223 0xaf78abdd, 0xfa7146df, 0x1b40fee2, 0x9ec1cb95, 0x2fdc69c3, 0x6bfe3ad4,
4224 0x93e4e7e1, 0x750512b9, 0x905ecbac, 0xabe446bc, 0x050bea99, 0xdc7c20f6,
4225 0x47137684, 0xa9bf79f7, 0xbd0d95f6, 0x2fa819af, 0xc43c67c1, 0xff42ad6f,
4226 0x5c37adaa, 0xad62f54a, 0xd62fdb57, 0x13d77bf5, 0xb43b75dd, 0xd9bf6afb,
4227 0x4f5f7ca4, 0xea8d9af5, 0x26bded3e, 0xa8f337ea, 0x67eed3fe, 0xa6fd2a66,
4228 0xa940ff92, 0x772a5733, 0xeb333f88, 0x235e0cff, 0x68fcd6f2, 0x7042dd8b,
4229 0xe2ced9ba, 0x6606fd6d, 0xd87deac7, 0x446cc89a, 0x8ddadbf5, 0x5567eac0,
4230 0x1b4ff98e, 0xfc8fa41d, 0x5d5993a7, 0xab3cf58c, 0xf09e3047, 0x22651efe,
4231 0x173ddda0, 0x1114ca1f, 0xd93d73cf, 0x5fb7aa76, 0x7f80eb5e, 0x4fa6179d,
4232 0x4ae7f7ad, 0xd40cab3b, 0x7d88dd47, 0xf7356e14, 0x4266d93e, 0xd01379b8,
4233 0x3b2d240d, 0xe2a6ea8e, 0xe97812fd, 0x503ef01d, 0x1a976b8e, 0xbeb0524f,
4234 0x9447908f, 0x09e4093c, 0xa2a379fa, 0x04ece8b7, 0xfd8c79cd, 0x71f7cd1c,
4235 0xefda99a5, 0x6e7f0e3d, 0xfe73c509, 0x02e3bc7d, 0xc136fdcd, 0xcd91f76d,
4236 0xbc3ff004, 0xb188ae57, 0xcd82bfc2, 0x17e7121d, 0x886fee68, 0xec9fb79d,
4237 0xdd0bfcbb, 0x4b703b18, 0x01657764, 0x2f504780, 0xe7b586b3, 0x21db07c5,
4238 0x1d47f116, 0x57998dd4, 0x16ea8078, 0x5fddaca3, 0x54c5daae, 0x4399aa98,
4239 0xb73b919c, 0x9121d1fb, 0x9c0945d9, 0x117970f7, 0x5e0f59c9, 0x46dcbc79,
4240 0x66fba569, 0x598bf303, 0x8a762dbd, 0x5a9d9347, 0x68d727f9, 0xd2ea9fe5,
4241 0x956d3bca, 0x6ee9de56, 0x6dcfbcad, 0xead7cad5, 0xb6cfcad1, 0xfee69671,
4242 0x0d4af6b4, 0x02f37d3c, 0xbdf3fdcd, 0xce70350b, 0xf734ab8e, 0xd32c7467,
4243 0xaf77e79c, 0x76ab9cd6, 0x2e0ed636, 0xb18f35f4, 0x08c41133, 0x567aabfd,
4244 0xff70a0ed, 0xff3c1aad, 0x1f6ffd6f, 0xc8a7ffa3, 0xbdde31d7, 0x37743b15,
4245 0xd165ebb9, 0x999dae3c, 0x59eb9427, 0x9cb6f6bf, 0x77431558, 0x54e6fc95,
4246 0xff941bf2, 0x0e16c391, 0x7df6fddb, 0x8e0acf14, 0xae88ab38, 0x1f7b80a2,
4247 0xa192f385, 0xba38aaf6, 0x32d900ef, 0xe89c8f85, 0x02a5e5fe, 0x857e34e8,
4248 0x3cb094f0, 0x93acf0af, 0xd972f0e2, 0x1636de77, 0x4be9c96e, 0xa120f3c2,
4249 0x6a85e794, 0x22e81447, 0xeca152e4, 0x29e92503, 0xf3abf961, 0xc007ec23,
4250 0x6880fd40, 0x2759b6f2, 0x9bec77aa, 0xb98f5625, 0x86f67d58, 0xa57362e0,
4251 0x067f2645, 0x25dff7c5, 0xc4cedebb, 0xb44a76b8, 0x139eaccb, 0x54c46d02,
4252 0xa4a31890, 0x76afa9e5, 0xed871f50, 0xff2bcd2c, 0xb56d4774, 0x6f919727,
4253 0xb6f09409, 0x67f5fe99, 0xa2648eba, 0xcb0407fc, 0xf6fc42fa, 0x332759ad,
4254 0x25197f28, 0xcd014494, 0xe9471c4f, 0x24dcccfc, 0x78c3f919, 0x0f65101b,
4255 0xab73c289, 0x9390fac0, 0x08ccd8f4, 0x67a8ddff, 0xbe940b79, 0x5e451aec,
4256 0x54b65f6a, 0x4f803fc1, 0x7e78c2ac, 0x4c1bf74d, 0xc329752e, 0x6dca1cca,
4257 0x37fbe0b7, 0x5017354c, 0x428e0a5f, 0xd5e7ef3b, 0xfa4d2d3e, 0xed557929,
4258 0xbf76cf6b, 0xd348652e, 0xc4cec32f, 0x6391e709, 0xbe615ee7, 0x9b03fbf9,
4259 0x1a1e59a2, 0xe6ce94d8, 0x4ff7e18b, 0x71aff7b1, 0x93b1a3bf, 0xd7df5aeb,
4260 0x9ef5dfd8, 0x81e7348f, 0x0d3e90a4, 0x4aec0ff9, 0xca35779d, 0x6305e46f,
4261 0xa8abf509, 0x715b38b7, 0x3dc0fdf8, 0xbe10e7d3, 0xa7e7cdff, 0x6bfdbe4c,
4262 0xa6ee6cfd, 0xed6c79f2, 0xd6070611, 0x963ad806, 0x55bfb54f, 0x20dfc357,
4263 0x90e5ea9b, 0xd13ec930, 0x1b31e6bc, 0x67fa83ef, 0x7ca4a94f, 0xd06e9fdc,
4264 0xc38b35f1, 0x0e26a5a9, 0x6b4f9bcf, 0x48de6f50, 0x00bf6dfd, 0x61ed010e,
4265 0xec7ce0a9, 0x3abbe47a, 0xa36b95d9, 0x2875727a, 0xd0fe874f, 0x56b81f94,
4266 0x1ebe7d40, 0xfe27caef, 0x53062c05, 0x599d1813, 0x890c37d4, 0x63013c9e,
4267 0x764f4dc1, 0x3ffd5357, 0x8a73c934, 0xadad7632, 0x83fa9aab, 0x8ff70321,
4268 0x847c9e5b, 0x16b7c3f9, 0xe77a4cd7, 0x31f24113, 0xf0497e7b, 0x16f6676e,
4269 0xf88c2c30, 0xaf3a82bb, 0xfa9b7ea1, 0x5f14609b, 0xdff8db67, 0xacc72a5f,
4270 0xae3c6d4b, 0x316b42dd, 0x2ceee5e9, 0xe8ca7bfa, 0x5f902366, 0x48873e20,
4271 0x5cf87af8, 0x40f20a76, 0x6f560d75, 0x78285fac, 0xf8a3e8d5, 0x1675cea1,
4272 0xbdecacdb, 0xd79f1b24, 0xf467dd24, 0xeefcb1b6, 0x3a46a8cf, 0xef58f5db,
4273 0x1070df50, 0x846d1cd8, 0x7a1161e6, 0xfde36c59, 0xc008dc17, 0xd1b793cf,
4274 0xc0ef4379, 0xdf278a31, 0x24aeba67, 0x72880c39, 0x8693c509, 0xdeacbdd8,
4275 0xecc9b66b, 0xf197a43b, 0x4ee1718f, 0x382fcfd2, 0xfa455c0f, 0x7805306d,
4276 0x03ccaadd, 0x91b726cf, 0x7287fee5, 0x9ecbfcd9, 0xf4a9f441, 0xb6cdfd22,
4277 0x4a9db988, 0x1f9df87f, 0xae750bf6, 0x5b83c2a5, 0x9f916436, 0xbcf85ea1,
4278 0x5bae1251, 0x0ff7c138, 0x963efa2a, 0xfe10f4e2, 0xf73e6ed5, 0xfb4ddb0b,
4279 0xcf4947cd, 0x271666bd, 0x58fdf6cf, 0xf4f61b3e, 0x9f207932, 0x117f12d7,
4280 0xc91bde7c, 0xe1cf48e7, 0x9fe57287, 0x9d305fcf, 0xb8291dff, 0x190c9bed,
4281 0xfdd86fbf, 0xbbb211c6, 0xdf1e7506, 0x18339da5, 0x9aff6127, 0x1d1cd130,
4282 0x5d444fb3, 0x9fbf5466, 0x8f7ed3aa, 0xa9cd3905, 0xa9dfc9bb, 0xbff0717e,
4283 0xb8f9a98b, 0x846be94b, 0x1f2cebc0, 0x87f23e10, 0xe58782f5, 0xd18e7545,
4284 0x23de6026, 0x585abadd, 0x35ce909e, 0xbb9ec9db, 0xe4fd06d0, 0x34473a07,
4285 0xe98f5f9b, 0xb835bfa3, 0xd6fc9176, 0x4c9953bc, 0x9be7767d, 0x8d7e940b,
4286 0xc562a9e7, 0x3f098b2e, 0xc71b9fd1, 0xa148b5ec, 0xf584c4af, 0x7c852650,
4287 0x15e7c48f, 0xd363fcca, 0xef3e9aeb, 0x685932bf, 0x001e0053, 0x00000000
4288};
4289
4290static const u32 usem_int_table_data_e1[] = {
4291 0x00088b1f, 0x00000000, 0x51fbff00, 0x03f0c0cf, 0x1915c58a, 0x19d44418,
4292 0x18344c18, 0x20685618, 0xb58969c4, 0x9fd329b8, 0x90c0c2c9, 0x40b9c40d,
4293 0x7cc40f9c, 0xfc0c0c4c, 0x17ebc44c, 0xf5b04514, 0x84181904, 0x026ffc80,
4294 0x85d70c0c, 0x8bbe1818, 0x03083030, 0xf1402ef9, 0x01ce2004, 0x58a06f62,
4295 0x045e900b, 0x2c40ddc4, 0x7cdf8a22, 0x6bf20251, 0x37f95185, 0x847bf8d1,
4296 0x1057ebf0, 0x47af2fc1, 0x161b1e40, 0x3e3f22d1, 0x3bd02922, 0x015f5810,
4297 0xc7265f95, 0x0f27d0c0, 0xb8a87f8c, 0x4bfc9201, 0x0e5cbb20, 0x6096f6c2,
4298 0xf2062860, 0x9bb0150d, 0x2f9403eb, 0x857dca01, 0xcc0003ca, 0x688cbacc,
4299 0x00688cba
4300};
4301
4302static const u32 usem_pram_data_e1[] = {
4303 0x00088b1f, 0x00000000, 0x7de5ff00, 0x4514780b, 0x74f570b6, 0x9924ccf7,
4304 0xf2124c99, 0x00493de0, 0x210e0311, 0x9970c044, 0x46a2c024, 0x141a020d,
4305 0x84920275, 0x7e889790, 0x33feaeec, 0xa8a08901, 0x17acb9f1, 0x376141dd,
4306 0x0c06e8b2, 0x60e03518, 0xba2eb300, 0xe7c045c1, 0x36bc8026, 0xb9f04324,
4307 0x9d6f5ecb, 0xdd33d553, 0xc7c4099d, 0xffef7fde, 0xa55f9f8f, 0x71ebaaba,
4308 0xe9d4e7de, 0x278f3242, 0xdf210a64, 0x9f968fc1, 0xf890848b, 0x206f5950,
4309 0x8841922e, 0x6df466d7, 0x88cfa64c, 0x68e67a23, 0xd11d985a, 0xef435837,
4310 0x9ed5cbe9, 0x186934a4, 0x1c790f21, 0x23e21258, 0x5ab54e84, 0x16f50520,
4311 0xe0933ba8, 0x213e3a7d, 0x0ff8e8fd, 0x30f8e246, 0x1a18992d, 0xe0311067,
4312 0xf9ad537b, 0x421eb089, 0xc3e6476a, 0x213b16fc, 0x9f9f7bfd, 0xa7eb888e,
4313 0xf7c10def, 0xb59efa24, 0x6529efef, 0x13fd0e57, 0xf66ddff6, 0xf108146d,
4314 0x71c7fcef, 0x8699ef58, 0x5d130e39, 0xd9b7766f, 0xbeea053f, 0xb6899f6c,
4315 0xc0fb6ee7, 0xe5fed126, 0xda0944db, 0xf0233b0d, 0x8275cefd, 0xa695ea0f,
4316 0xa4ae47d6, 0x9136c0f5, 0xf8d30f3c, 0x4092062d, 0x613371c8, 0xeb15873f,
4317 0x5aac1145, 0x6dd77ebe, 0xa3495f30, 0xf7d04489, 0x2e88378f, 0x28d92fa8,
4318 0xaf9d08f8, 0x8c07b5fc, 0xc578e803, 0xc23ea13e, 0x1f1beb41, 0x3ee83a33,
4319 0xd8fcef97, 0x7ce146d6, 0x0e2663da, 0xa4a3ee23, 0x52908d3e, 0x03e996df,
4320 0x9ba5fbe8, 0xbe802705, 0x4ed9dd74, 0x83695f58, 0xe3a45c3c, 0x228bae2d,
4321 0xee6c918e, 0xd7cc08ef, 0xdbe7147c, 0xf9830f26, 0x65dfce4a, 0x6ee52404,
4322 0xca2e9193, 0xdf603ae9, 0x3da7bcca, 0x053e716b, 0xd22fe59e, 0x8abf68f9,
4323 0x6c270597, 0xdc40c2b1, 0xd7ce8eb0, 0xb05e0a22, 0x8daafec0, 0x7deaac23,
4324 0x7d876e14, 0x1bd6fa94, 0x7d605ba7, 0x69458deb, 0xd716f1a1, 0x7d76a7fd,
4325 0xdd13536b, 0xf3e3bd69, 0x748287b4, 0x4a5ea844, 0x4fe90b88, 0x8e8119f2,
4326 0x85e7e795, 0xe2f7c418, 0xcc38913a, 0x3a15f1a1, 0xe9c07ef0, 0xf1958774,
4327 0x12dbc701, 0x842ce03b, 0xc73b6eb7, 0x54c814a3, 0x8f94af8f, 0x7ae83e00,
4328 0x2c763d6a, 0x6124f71f, 0x81c7a4f9, 0x33da7b70, 0x1eb5cb12, 0xc67f3e27,
4329 0x75cb0133, 0xcf96171e, 0xe9606679, 0xbf63e4f3, 0x58053de7, 0xf1b8f06e,
4330 0x253d6ff9, 0xaa79d658, 0xcf26f9f0, 0x7b372c32, 0x65fcf8bc, 0xeb2c2acf,
4331 0x6e58b53d, 0xb2d17c05, 0x7ec3e3c1, 0x58753ddb, 0xf1ea7a36, 0x469eebf9,
4332 0x3870d72c, 0xb648b2da, 0x7360e144, 0x3b453b11, 0x6573cd89, 0x9b1eb4cb,
4333 0xf309eacf, 0x5a46d9bc, 0x3ad3704f, 0x3280cb85, 0xd689b67f, 0xf6b15407,
4334 0x1c92f721, 0xf10fad33, 0x3594f6b2, 0x5a089cae, 0xed65a94f, 0x7379d623,
4335 0x847d6922, 0xda8fb58f, 0xa289cfec, 0xacf551f5, 0xc9134c7d, 0x18fad0b5,
4336 0xefa7ab3f, 0x695ae573, 0xd595bd3d, 0xe6f13f33, 0xb33d68da, 0xa93fbd8d,
4337 0x2c3a27c3, 0x55b0f13d, 0x14202c76, 0xb9de4d57, 0x9bca892e, 0x5dc746ad,
4338 0x7bc849c4, 0x892ef9de, 0xd90687ca, 0xde6ded85, 0x746eacc5, 0x77b77b61,
4339 0x2edff629, 0xaa5db1bb, 0xb7db0fbe, 0x9ed8dd1b, 0xed835d50, 0xdb17b28d,
4340 0x8a3f5647, 0x2f468ded, 0x5eaa4fb6, 0x65d7f58b, 0x55e7b61f, 0xaffec7af,
4341 0xfed87d1b, 0x5c9bfdf8, 0x05fd6953, 0xe41dbdc1, 0x5dc10ade, 0x9e815242,
4342 0xee4093ea, 0xf9f970d5, 0x6d1d101c, 0x446fe9af, 0x6efadc3e, 0xbfc00be6,
4343 0xf507ebf8, 0x983edfa2, 0x89bce38c, 0x1c74c8e3, 0xa4e3e2f1, 0x334137bf,
4344 0x257bfa4e, 0x382d38ca, 0xc6df444e, 0x24defad9, 0x2bde7aed, 0x0fd9c655,
4345 0xdac2b4fc, 0xffa57db7, 0x9ebb4b39, 0xe329973f, 0x89eb847c, 0x1a7adbe9,
4346 0xa7c2d03e, 0x7c2083e1, 0xf138e28e, 0xc64f5b7d, 0x327c2d41, 0xd3e1060e,
4347 0xeff4e381, 0x070d38db, 0x3869f0b5, 0x97cf8418, 0x7dc19f08, 0x21c657db,
4348 0x0e327c2d, 0x5ff3e105, 0xbee49eb8, 0x53fdb38d, 0x7fb67c2d, 0x498f841a,
4349 0xef0cf580, 0x3f32bedb, 0xf327c2d3, 0xec7c20b3, 0x7da5ce38, 0x67fb671b,
4350 0xff6cf85a, 0xfe9f082c, 0xbee8ce38, 0xaff32bed, 0xfe64f85a, 0x149f0835,
4351 0xb633e001, 0xfc69eb6f, 0xc69f0b5c, 0xb9f083cf, 0xdf19c70c, 0x384cf5b7,
4352 0x84cf85ae, 0x64f841e3, 0xf626bee0, 0xe3c69c6d, 0x1e34f85a, 0x3267c20f,
4353 0x6fb9338e, 0x42709afb, 0x27099f0b, 0x8e99f082, 0xebbb64e3, 0xc7465198,
4354 0xce3ef6b1, 0xf0b467eb, 0x104cfd79, 0x38e3d73e, 0xa938e8d3, 0x52671f17,
4355 0x933e16a7, 0x29f0833a, 0xeaae71c0, 0x77af38db, 0x7af3e16a, 0x853e1067,
4356 0x7db5ce38, 0x2ea4d7db, 0x75267c2d, 0x3b8cf831, 0xa36b9550, 0x3a1754ed,
4357 0x95cafa45, 0x40972e1d, 0xd59da2eb, 0x8093bb45, 0xf62a225d, 0x89756906,
4358 0xe6cb7df4, 0x8907f498, 0xb9c8eeda, 0x4ac7e813, 0xddb531ad, 0x52213d11,
4359 0xb8c4e763, 0xb8f53562, 0xfd340319, 0x3453f3e3, 0xa30589ed, 0xddfded34,
4360 0xc0fa9ae9, 0xfe9a4992, 0x3472ab83, 0xaecba1f5, 0xf64ff4d6, 0xa7a9a0de,
4361 0xd359baae, 0x7ced787f, 0x6b25fb4d, 0x97ed354b, 0xea6896fa, 0x42fdd597,
4362 0xfd747fd3, 0xe5fb4d72, 0xda6a0f8d, 0xd71ffac7, 0x3cb5c7d4, 0xbe3fe9a3,
4363 0xfb4d79f5, 0x69378715, 0x6db627da, 0x3cafd4d5, 0xcecebaf9, 0x5f8fd8b3,
4364 0xd022ebc6, 0x7f76613d, 0xf8f7e67f, 0x1bac46ad, 0x8ed05807, 0x722d65df,
4365 0x35f8a31c, 0xd1c0b5be, 0x7017e28f, 0xf6457e0a, 0xda4b9280, 0x267bf3e8,
4366 0xd3b12fb9, 0xdd18f7e7, 0xd8c3db97, 0x041e94a7, 0xc3a50492, 0xfdbea500,
4367 0x63d19901, 0x23f3c0ce, 0x95fbe9da, 0x1888c086, 0xb312cf5a, 0x777e811b,
4368 0x8a2fcc0a, 0xf4154914, 0xf411348b, 0xce481e0b, 0xa2abc17c, 0x298355d7,
4369 0x71a10a1f, 0x24eec957, 0xaade33b0, 0x1d82f76e, 0xee983352, 0xcd21006b,
4370 0x4bdfbb42, 0x0607b4fd, 0xe9b92517, 0xb5232678, 0x1bf3d5d3, 0x3869fce9,
4371 0xebd00b7f, 0x7c7f307b, 0x294df9cf, 0x9bf33413, 0xe6689487, 0xfce91b37,
4372 0xafde4276, 0xa7e7c53e, 0xc8449848, 0x3853845f, 0x094869bf, 0x9180ffce,
4373 0xf9ea2bfa, 0x1ff38323, 0xd67ffd86, 0x2653fedb, 0xa43ff769, 0x237fbb54,
4374 0xea91ffdb, 0x48fe7cb3, 0xe151ffdc, 0x90ffdb2c, 0x137fb652, 0xbf38371b,
4375 0x93ff082d, 0x2f677f30, 0xb3529bf3, 0x5a1ffbb4, 0x89bfdda6, 0xfd5ddfcd,
4376 0x82df9f2d, 0xbe139ff3, 0x5a1ffb65, 0x4d1bf386, 0x8fd0276e, 0x95646071,
4377 0x1d4fce8f, 0x04490761, 0x40f3a172, 0xfd163239, 0x148497e4, 0x913dc75c,
4378 0x8abede8c, 0xf286f4a4, 0x58fccbc6, 0x996c951f, 0xb4e2efd4, 0xb67378be,
4379 0xb612e411, 0x21657f53, 0x8d1dea5f, 0x7937d222, 0x4e1be4d2, 0x28d9dbd7,
4380 0xc77ea17a, 0x207d9393, 0xe44d2aff, 0x4f787cf6, 0xfe787e22, 0x9fa353f9,
4381 0x5f4bef57, 0x8f95ac2e, 0x2df8a9b7, 0x90e547e8, 0x98165591, 0x1fa9aed7,
4382 0xa1107ea1, 0xd427c5fe, 0x249420cf, 0xbe6cca8f, 0x04bfa8cf, 0x2fea36f5,
4383 0xd5213b41, 0x75e25fb8, 0xae8c307d, 0x3f289f3f, 0x26f3ee17, 0x9e3a2964,
4384 0xc8f7f8c4, 0xf807c11a, 0x14597db8, 0x3d687e05, 0x4d38de85, 0xfb0fee9d,
4385 0x7c12ae07, 0x86380bcf, 0x9333e01b, 0xbd60478f, 0x67605eb4, 0xe8a21cef,
4386 0xb0514fef, 0x8a40d560, 0xb338d08b, 0xa44e4b88, 0x5a59cfef, 0xa2e84328,
4387 0x2f061055, 0x2059fa01, 0xe0119753, 0x69278de7, 0x7ae8389c, 0xf1b3b66f,
4388 0x63e4ba67, 0x14f5aa6d, 0x3e5766c8, 0xa1414f5d, 0x359feb88, 0xd1fedb43,
4389 0x619728ce, 0x3d572d0c, 0xc9ccf381, 0x54dfb6d7, 0x75cfada0, 0xef54eb6b,
4390 0x6ef7a0c9, 0xa73fd129, 0x9cfba160, 0x5d2b8417, 0xade75d28, 0x56b70e1c,
4391 0x5e0d5ec9, 0xda556dc1, 0x26e0a021, 0x5f7c2fb8, 0xf6ffd9ec, 0xa17ada65,
4392 0xb05f5b57, 0xa73e374a, 0xff1ce39b, 0x683e8047, 0x83e80279, 0xa718f3c2,
4393 0xd55c908f, 0xc18dc7d2, 0x50fa306d, 0x625c71f6, 0x8ebe3828, 0xdac2c7d1,
4394 0x50f4f0a8, 0x9707a418, 0x7a14be9a, 0xc3d38db8, 0x8a1e9ca7, 0x6ae96ad7,
4395 0x4cadf12e, 0xb2dfefa2, 0xe9e21766, 0xe8c850a0, 0x3d0a97e1, 0xc1e869b4,
4396 0x8f41e9cd, 0x3d38dbbf, 0x4673f6dc, 0xb67c7a0f, 0x5b687a71, 0x29264e7b,
4397 0xf14af13d, 0x3c53a9a0, 0x376ef0e8, 0x7c503d02, 0xf987a584, 0x8dd37dc1,
4398 0xde02fad3, 0x9c5f03d6, 0x053db01e, 0x4e104ec0, 0xcf6a7ef8, 0x684e54fe,
4399 0xc36bc5ea, 0x31b2bfe3, 0x6a98ee3b, 0x57f5e55d, 0xf5531dc5, 0x53375c5b,
4400 0x9be45f53, 0xbc5fe9ab, 0xbed350b6, 0xa69176b0, 0x3baac17d, 0xef42f535,
4401 0x6ffd35cf, 0x69ad565f, 0xb56ab5bf, 0x9296fda6, 0xb9f534c7, 0xfa6b5fee,
4402 0x5eb054df, 0xff273ed3, 0xacfb4d45, 0xf5345b19, 0x34d7ae99, 0x2f3b0dfd,
4403 0x31e81ebd, 0xc048a0eb, 0x71e638fe, 0xf71fdd20, 0xa4f2c48c, 0x717c89c7,
4404 0xcb0133da, 0x4fcd8d7d, 0x7cbb495c, 0x26882819, 0x91167f4c, 0x2cf64218,
4405 0xcaaf5777, 0x504e7d02, 0x7971feef, 0x1077b551, 0x07065395, 0xad6f39c2,
4406 0x11c7f891, 0xe2528022, 0x50c407f3, 0x6d1b567b, 0x3dbdeb8f, 0xb614ad6f,
4407 0x0a4dab3d, 0xe3e56e3b, 0x61ed4385, 0x7e2133e2, 0x3ec10326, 0xb9f6e2ea,
4408 0x204cbdbe, 0x84e7eaf9, 0x8ffe472c, 0x5cfd3031, 0xa2726466, 0x1cff6b6c,
4409 0x7fba8362, 0xe685d544, 0x95cca7ab, 0xaa91f408, 0xb5e2e3e1, 0x3ce46997,
4410 0x3c6de881, 0xcd38d9d0, 0x5775c5f3, 0xd8ebde6a, 0x2bbae225, 0x7d508640,
4411 0x07e48c3d, 0xfd97a00c, 0x8d6643cd, 0xceba7586, 0x355e401a, 0xd8fda3c6,
4412 0x771199e1, 0xe63c024c, 0x53d27963, 0x8f71e580, 0x9e63cb1b, 0x788f2c12,
4413 0xf36cb0aa, 0x33f2c32c, 0x4fcb178f, 0xfcb0ab3c, 0xe58b53c8, 0x2c5acf61,
4414 0x587c7a0f, 0x61d4f01e, 0x1ea7bef9, 0x234f56cb, 0x171e9d96, 0x29bf0a96,
4415 0xddd3d0f0, 0x4fa7ae49, 0x805dfd03, 0x07c4e2ce, 0x0a0d57aa, 0x8ae259d1,
4416 0x59bdab87, 0xd6f371a1, 0x249d389a, 0x0861e868, 0x81e364f8, 0x5e9c4c5e,
4417 0xade7b7c2, 0x9ed82f95, 0x1d8726d5, 0x7ff9f2bf, 0xf9cdbd0d, 0xa216f491,
4418 0x7a3a81a7, 0x3d18bd4a, 0x87c7124d, 0xc18e69e8, 0xa71ff4ce, 0x1f6087a7,
4419 0x628ffc61, 0xabc6ea30, 0x14573aec, 0x73f3678b, 0xb2d16a07, 0x7b9f3678,
4420 0x15ae1d05, 0x48df3fed, 0xc8f773c0, 0x78808fbf, 0xaa61f77d, 0xdf7b9328,
4421 0x7a5e9e9f, 0xfd0bbb87, 0x551f22a0, 0xb67ae3a2, 0xb8324447, 0x0cc81846,
4422 0xeac84e92, 0xce75bfe1, 0x44bac34f, 0x9f7de162, 0xf3986673, 0x4f670228,
4423 0xeb871789, 0x6357eb0a, 0xcfe3bc60, 0xca1323fc, 0xe6148639, 0x688b34df,
4424 0x0bff13df, 0x506f804e, 0x499c991f, 0x0c0f0710, 0x3ed1da37, 0xf0b459f0,
4425 0x667ad2f3, 0x29ab7e08, 0xdf515a8c, 0xfc2126d7, 0xa2357d86, 0x77e01f7f,
4426 0x317f3931, 0x0df7ce78, 0xf3c097f8, 0x62f1f262, 0x1cb89172, 0xfdd2372f,
4427 0x9d1ced77, 0xe403a0fe, 0xade185e0, 0xd7e95f9c, 0x7d28bcf3, 0x4aee3a2f,
4428 0x75b8e850, 0x88f3a108, 0xefc71da2, 0xc984b86e, 0xdbeec52f, 0x05f5f266,
4429 0xb59267af, 0xf9c53de3, 0xbbaf194f, 0xf81b05e5, 0x0c924b5b, 0xf06163f6,
4430 0xf5e594a0, 0xda8b76c9, 0xd6d46cfe, 0x19856bbb, 0x3a2768f5, 0x068f67a2,
4431 0x1fb7613d, 0x3b72061b, 0x9c654b09, 0xfb464925, 0x4ef72a31, 0x3346a5d7,
4432 0xe4c7cf3f, 0x9418e6c1, 0x663da717, 0xaf53ffec, 0x9471b7a7, 0x40d210f5,
4433 0x1e419a8e, 0xded4b6d3, 0xcf4af7fb, 0x3c4617d2, 0xbf926df7, 0x4cd0fb02,
4434 0xfc0effff, 0x5d61220d, 0x5eb2b719, 0x872e9af4, 0xf3359be7, 0xca1cf7d1,
4435 0x2977eb19, 0x891be217, 0x96e8571c, 0x5c638bea, 0x8bae2c9f, 0xcfed6bb0,
4436 0xb2bd4d18, 0x635dbfb1, 0x541fc28f, 0x412a92fe, 0xe329fa02, 0x5925d3e4,
4437 0x7d740956, 0x1090426f, 0xfd6056e8, 0x466dcdca, 0x95ce03b7, 0x5b7ade19,
4438 0x4cdfc51f, 0x897c9289, 0x61cf16b9, 0x9d2fea4b, 0x4ce67a0a, 0x88048ac3,
4439 0xbb162c1b, 0xf30fc9ef, 0x79312cbe, 0x0727c8bf, 0xa73df6b4, 0x55c7420f,
4440 0x945c639e, 0xeaab8e58, 0x8f16061d, 0x009b8fd1, 0x1c5fc6e3, 0xf79b153e,
4441 0x413b074f, 0xc68aa70f, 0xca3746b3, 0x665ffa45, 0xfc0a4e08, 0x13f314de,
4442 0x697e3a24, 0x2dc63b5d, 0x11deca4e, 0xbc80bcbf, 0x4b3fb9ec, 0xd528f1d2,
4443 0x15a4bcbe, 0x813f99e6, 0x371c444f, 0xf8e54c7d, 0x04c93fa9, 0x4f3910e4,
4444 0x4862657b, 0x063bfb86, 0xf90cc862, 0x161bf33b, 0x4fbc01e7, 0xe547bf81,
4445 0xdf241de6, 0xb5207886, 0x9cdfe099, 0x00198621, 0x7de433a7, 0x1e1538db,
4446 0x87232572, 0x94829533, 0xf1c14c1e, 0xefc1fddd, 0xb4d41532, 0xb9e0638a,
4447 0xc23ff8a4, 0x72471877, 0x50b7980b, 0x897b9ec0, 0x97e81ab9, 0x3f1a51fa,
4448 0x9a51fa8d, 0x34a3f53a, 0x437222f5, 0x1425e402, 0x9f13293d, 0xb4d27080,
4449 0x88ec928f, 0x555262c7, 0xafd1f603, 0xbe6dfc79, 0xe903489d, 0x7d5fcb3e,
4450 0xee90b336, 0xc5896ae7, 0xf57394fd, 0x0e0cb145, 0xa33e25a5, 0x7f73d2cb,
4451 0xddc61b47, 0x8c3f2548, 0x6fcfcec7, 0x051e6236, 0xdc994ab4, 0x7de949f4,
4452 0xa20d89ff, 0xfd06c22b, 0xbd6573e8, 0xff7fdfc9, 0xf212fdfa, 0xb4a3ee38,
4453 0xfa01266e, 0xc02791eb, 0x09d723f7, 0x7e185f2e, 0xaf74e42a, 0x013ba7e8,
4454 0xf143e37e, 0xf574fbac, 0x4abe1cd5, 0xfb5d29fd, 0xfd2f960f, 0xbcbe4688,
4455 0x93efba29, 0x027933c6, 0x00a417f0, 0x1e0fd7f2, 0xf8c7a93f, 0x7f1f81ab,
4456 0x6907f1b2, 0xff8e9ef9, 0xfeba4fd4, 0xbfd63d61, 0xcbfadc3e, 0xbb697d5f,
4457 0xd297ea97, 0x23653c3f, 0x494edf94, 0x8a4e09b5, 0x2b8db2f7, 0x3b902e6d,
4458 0x7c06d792, 0xce27ca71, 0x870f4708, 0x06a57cb8, 0x78804588, 0xc749fc2b,
4459 0xa1e9bd3f, 0xf89ec0eb, 0xc76ca36a, 0xc99d6a38, 0x5cf4a26f, 0x8f28b0d1,
4460 0x3b7ac18c, 0x16703fab, 0x51b2bfe8, 0xd3a6a23e, 0x953ddfd2, 0x94357900,
4461 0x921a0652, 0x7fa3f4a0, 0xf3e1b152, 0x546f60e9, 0xabf20092, 0xff983dfe,
4462 0x87d4589b, 0x9ee8c685, 0x499818ed, 0xafd9f780, 0xb3a1e1b2, 0x6afe0da2,
4463 0xbe9038c3, 0x37f7097f, 0x3f6b245a, 0x82b9273c, 0x54f2015c, 0x31f10781,
4464 0x8bc5637f, 0x4ed31abf, 0xe1b1d3d7, 0x0541364f, 0xea4fc527, 0x9bf05fae,
4465 0xcbbd1dd7, 0x87ca4eef, 0xd156bb6a, 0xee468e4f, 0xb2b13527, 0xaedbf64c,
4466 0x6ca4f2a4, 0xd2f4ecbd, 0xbd2f65c7, 0x2067dbf0, 0xc9a1fd7e, 0xbf8e9c39,
4467 0x073da5f8, 0xe2fad127, 0x3cbf722d, 0x908b0db6, 0x254bc210, 0x7a597ffd,
4468 0xafa50f08, 0x463a31ec, 0xc6f7e7b3, 0x78b1f086, 0x19232ecb, 0xb91e13dd,
4469 0x6d8cbbf5, 0xa9783096, 0x760e9f6f, 0xbf178adf, 0x3bbc8236, 0x892053b5,
4470 0xb9e061c9, 0x85da0f7e, 0x23c42700, 0x6f1053c7, 0x1495feba, 0x145fa02f,
4471 0x37dbe93c, 0xe3027971, 0x9e90d239, 0xce9d7e5f, 0xc991f25f, 0x792ffb09,
4472 0xec1b2ef9, 0xc55484e3, 0x95d9fae8, 0x4adf2009, 0x1d826f64, 0xe4bcf64b,
4473 0xde91bbb9, 0x9ddff78a, 0xae92e2c0, 0x95d406fe, 0xbfb0fede, 0xe0e6eb85,
4474 0x1b888afe, 0x59e4aee9, 0xcb47df31, 0x6332252f, 0xb8be184b, 0xf2726656,
4475 0x2354f3c4, 0x509dfdd0, 0x22fbc0f4, 0x627703d7, 0xbe6ef3dc, 0x62316a17,
4476 0xc3334bfd, 0xc0d930d3, 0x2bd32ce5, 0xf0dd7a41, 0xd38bea00, 0x70895d83,
4477 0xd21956be, 0xc437a80f, 0x1912d3fd, 0xc19e987e, 0xc99ea8f7, 0xbfd0e785,
4478 0x8c457655, 0x7a87bcd1, 0x297f9945, 0x3bae9f9f, 0x13b5ec12, 0x8ffde109,
4479 0xdf0acb9f, 0x4542bb53, 0x66fe2a5f, 0x3561befc, 0xdf856fe3, 0x4067337d,
4480 0x180717fb, 0xa07bc0ff, 0xfcbae967, 0x6bbed889, 0xc0f280b6, 0xf8e1fc44,
4481 0xf9cc837a, 0xd0aedb5a, 0x24b75d09, 0x05e8ab44, 0xf8458fc6, 0x7a2f5ea3,
4482 0x92a7be92, 0x9f309597, 0x0a78e7ad, 0xfe7316df, 0xf96b219f, 0xef8bac9f,
4483 0x99653e53, 0x33edfbec, 0x3f94afc0, 0x57e00ebd, 0xfdf61f39, 0x07cdcdb7,
4484 0xfa7ca66f, 0x4f857ab7, 0xcf53f2b5, 0xef5b25a7, 0x7a9f4026, 0xa0dbfd3e,
4485 0x4f96122a, 0x7cb0f3e9, 0x7feda83a, 0xf02a7e54, 0x45f802ab, 0xc8a7e085,
4486 0xa8e0dec3, 0xd9568797, 0xd21e5611, 0xd99201df, 0xba14fe93, 0xf4ade853,
4487 0x4143e5f7, 0x52e904ee, 0x5d20bba1, 0xdfa7742a, 0xfa7e16af, 0xc13249f6,
4488 0x26bfe575, 0xd65cffa3, 0xe942f2c4, 0x66077b7b, 0xa85c9c20, 0xdeed48c6,
4489 0x75d4fd81, 0xaf5eae9f, 0xd5d2efeb, 0xddfd75f3, 0xa6957aba, 0xb363597f,
4490 0xfdfe2091, 0xb2e27e9a, 0xb8d1c867, 0x63eaf470, 0x59c3597e, 0xc2e817a3,
4491 0xe5f7c012, 0x790bc4e5, 0x221d8186, 0x28ba05c6, 0x7e206b8c, 0xe7d939b1,
4492 0x656372a5, 0x743f8b04, 0x58b603d9, 0x618cae5a, 0xb1bc40f5, 0xf29ee406,
4493 0xe2c1103c, 0x01f95d8a, 0x9fca8c5b, 0x51126f6a, 0xc8f9b76e, 0x167e708c,
4494 0x47c828d5, 0x76b7a46d, 0x4d35ee76, 0x06590cb4, 0xd15aa571, 0x1df83609,
4495 0xe0d937d5, 0x29aba9dc, 0xfa02faf5, 0x451fe17c, 0x8ae97b4c, 0x75818db4,
4496 0xea4baf11, 0x4e6ff2af, 0x59d3ef12, 0x9a0b7f74, 0xc7739f98, 0x423d9d1a,
4497 0x153d20d6, 0x411a9659, 0xe27f529e, 0x86bcf688, 0x1f2945f1, 0xb69d64af,
4498 0xd29f795d, 0xa5f3fa01, 0x6eedb41b, 0xa07f0fee, 0x3258c9f0, 0x2ca3fb96,
4499 0xf2e5c30e, 0xfaed3134, 0xae8f8a02, 0x68989116, 0x4449bbbd, 0x166f747c,
4500 0x234f107c, 0xb7e478de, 0x7940120a, 0x03a9c0a8, 0xbbd8c9f8, 0xf6d8eabc,
4501 0x812fe669, 0x3c7fb66e, 0xd9693fe6, 0x11c3fdb1, 0xd5fd406f, 0x263e4343,
4502 0xeee7fb3d, 0xff73c08c, 0xa4569dae, 0xef1daef7, 0xd425f90e, 0x6139335f,
4503 0xbf3b5d9d, 0xd3f4031e, 0x0254dcb5, 0x306baef2, 0xd8aec78b, 0x3698f5f1,
4504 0x33f7afd4, 0xfe6461fd, 0x3fd37761, 0x41fa133e, 0x76057749, 0xe428cec3,
4505 0x23d7caa7, 0x6bbbdf30, 0x6e99d7c7, 0x9fb74fcb, 0xd1e79e0a, 0x5b052565,
4506 0x2c317d61, 0x8df2a18f, 0xd3542f89, 0x761bcbf9, 0xf6d01719, 0x39ff37dc,
4507 0xd768e406, 0x750f6656, 0x41cf6dca, 0xf194431e, 0xe29972dc, 0x8a9813ab,
4508 0x33bfcd3a, 0xdf02e466, 0x3fcb84f4, 0x57d63e31, 0xaffca478, 0x62e08781,
4509 0x33eacef2, 0x6fefb00b, 0xe318fb3f, 0x4ba4269a, 0xab7fbf65, 0xe57b46af,
4510 0xfecefb62, 0x82df6e7f, 0x76fb2fbf, 0xfbef9bff, 0x7abbd738, 0xe749e83e,
4511 0xfac1ee3b, 0xae27564b, 0xeef48fb7, 0xffc7fd85, 0x7bffeefb, 0xc52b7de3,
4512 0xfbe2edbb, 0x5affcdfe, 0x36f1ffbc, 0x7e3b778e, 0x3fe6f3d7, 0x57df7d71,
4513 0x6ff9bdce, 0xf6def78e, 0xadf5d8af, 0x067b2a86, 0xa9015f5d, 0x316182b5,
4514 0x92dbbe37, 0xd76c80e1, 0x8f30fd73, 0xc34bce0e, 0x23014df8, 0x904d0bf3,
4515 0xfb7e0747, 0x0b89411c, 0x1d751fa2, 0x1bae1fb7, 0xc8768254, 0x9987ae75,
4516 0xb55520dd, 0xadfed366, 0x989c0b39, 0x0fd24973, 0x7b3ea1bb, 0xfd6baf32,
4517 0xe204f7c9, 0x7f1da812, 0x2d35ce5d, 0xef5ed760, 0xa5eed112, 0x1fbbda25,
4518 0x9ece990c, 0x3dfad04f, 0xfadadd73, 0xfada054d, 0x8dde3e1c, 0xc6ffad84,
4519 0x7107c17c, 0x13f65355, 0x356710f1, 0x9089942d, 0x5542f90c, 0x98bfc12b,
4520 0x7f7daf93, 0xe3c1f81f, 0x531c3c7f, 0x971c0a4d, 0xb6485c20, 0xfa48dce8,
4521 0xeebe4700, 0x7d63d9d6, 0x244ccf90, 0x8de38327, 0x838c4ee5, 0xe65b7f73,
4522 0x5596cbef, 0xb2cfc0ad, 0xfc56cfce, 0x4de0dee5, 0xe38dffb8, 0x2fe084a4,
4523 0xbff444bb, 0xadff9d65, 0xe2fbe5e0, 0x8fe3c143, 0x3a97cbc5, 0xb8b20cbc,
4524 0xccabf008, 0x16a985fd, 0xca0fab27, 0xc8de7827, 0x9fa905fd, 0x42d3788b,
4525 0xcc8bdf79, 0x5f386ce6, 0x30148f33, 0x1afd71de, 0x3983f511, 0xe575c04d,
4526 0x8f31904f, 0x7e4373f8, 0x6f3be026, 0xbf1515dc, 0x0270cb60, 0xb871173c,
4527 0xb42a9117, 0xeff9c95f, 0x84cacbbe, 0xf6820673, 0x211722ef, 0xadbf52d7,
4528 0x47f04b28, 0x4b157852, 0x0e9d1bc4, 0x1c816f71, 0xb5bdc4d1, 0x47fdf875,
4529 0x8b9c6842, 0xbe4deff5, 0x5fe5d4fc, 0x323b3ca9, 0x1e41fa8c, 0x5849bb9e,
4530 0xaff156dc, 0x70626f6f, 0x7c132cac, 0x7e774829, 0xee755f39, 0x83e71cf8,
4531 0x0e3bdebf, 0xa3f664e5, 0xefd1a3a3, 0x6fd03977, 0x437ee4a8, 0x0d11d7b7,
4532 0xa6eeae71, 0x9b3e7e54, 0x55cb536b, 0xfdcfdca5, 0x7e40bfee, 0xa6bb2d21,
4533 0xf822b50a, 0xf1802471, 0x08d4ef5c, 0xfe4c31b2, 0x1931ffeb, 0x6154fd38,
4534 0x627e001c, 0xfd91e026, 0xd1abe98a, 0xadbc2ab1, 0x3494f6b9, 0xe01e27a6,
4535 0x0e754477, 0x0be163f9, 0x75c03e7e, 0xf4db447f, 0xadfb30fc, 0x5638b135,
4536 0xe2df5bde, 0x34379c77, 0x9700cb25, 0x9a8aa61b, 0x2655fb73, 0x238d97ee,
4537 0x795d60e3, 0x9b655d6f, 0x11697808, 0x66ddf09d, 0xa359d365, 0xb079cc3b,
4538 0x3e309e1e, 0xca8fd5c4, 0xe78022ce, 0x082387d1, 0xf2efd1f8, 0xf834c673,
4539 0x430d226e, 0x2b882e3a, 0xb5c39afe, 0x72c764d3, 0x1cb65e56, 0x6b4de74f,
4540 0xa3858fb0, 0x7fbc01d4, 0xe3211827, 0xbd878921, 0x501bf4a7, 0x1bb5fac6,
4541 0xf6e115ed, 0xed823c3f, 0xef3898bf, 0xfbfc2099, 0x51fb2de1, 0xec073fab,
4542 0xae3ca983, 0x09ae83d2, 0x0cf747f2, 0x1bfa07c1, 0xe7ac61fc, 0xdf84efb1,
4543 0xbeb3be55, 0x8559e981, 0xde70f5ee, 0xccace1cb, 0xe2c4dc7f, 0xfce27faf,
4544 0x8159c0a5, 0x4abd7eaf, 0xa6af2a7f, 0xd751e3a8, 0x197d8e37, 0x268a9bec,
4545 0x43a06ec1, 0x466d4855, 0xc6cac3e0, 0x6f3864c7, 0xe360eb99, 0x8c7f2912,
4546 0xd3a09f3a, 0x9a3bf2c4, 0x0dbcafd3, 0x1adce4e8, 0xe242e813, 0x0dace3ba,
4547 0x06bbf0e4, 0x7be19fe7, 0x227bef6a, 0x790178d9, 0xcea7b1f5, 0x8f525535,
4548 0x9ceb8c9b, 0x432d9655, 0xb296ecf8, 0x8aa2725d, 0xb14d3a9e, 0x1f3caed8,
4549 0x8748e650, 0x5c3e74e7, 0x1311f787, 0xd242ef81, 0xfbf15bea, 0x62aa5bd4,
4550 0xd4961d18, 0x3d6232ef, 0xf32bfb19, 0xf9e8f329, 0x369e7669, 0x6e4178ef,
4551 0x4b8020db, 0xd4bfc99e, 0x1f4e8619, 0x8ee72b33, 0xb84f53df, 0xf98edd28,
4552 0x2c4f48ff, 0x1b44f455, 0xef2bb9e6, 0x3e3335cf, 0xc489e957, 0x49627a70,
4553 0xf01123b5, 0x6a4764b0, 0x92c93022, 0x084b4e3f, 0xf03e27a7, 0x43e373b0,
4554 0xaeeebbfc, 0x5c4f54d9, 0xb313d2ae, 0xf44e9023, 0x959ae5ef, 0xe88b8d73,
4555 0xff6f0509, 0x03e6f2c3, 0xf86113d0, 0x56b346fb, 0x54d8dc4f, 0xc6e27a88,
4556 0xfbe6a2d9, 0x17cd6baa, 0x09d913d3, 0x3b2eb173, 0xcfd0c2a3, 0x39bfdc07,
4557 0x61fbf3c4, 0x6b17d01e, 0x9b8476cc, 0x26f46f5e, 0x55f6c7d7, 0x825fffae,
4558 0x97d722b3, 0x43f761cc, 0x8243a4f4, 0x2e64bcf4, 0xd002eb95, 0x4beb9323,
4559 0x4e71e56e, 0x07cd9c9d, 0x96a19b39, 0x0afdecb3, 0x950bd337, 0x9abfc98d,
4560 0xae6fdb47, 0xda669d95, 0xdc90e6ff, 0xddcb54cd, 0xe1096635, 0x96ee43dc,
4561 0xae7bb930, 0x4fda1c69, 0x53efedbd, 0x3ca96f2e, 0x430ce61b, 0xa2f3051f,
4562 0x1ddfdf34, 0xda76fb1d, 0xef2fc02b, 0xfb7e788a, 0xf603b739, 0x033b7d8d,
4563 0x7c53e9ec, 0xfcb8db3d, 0x5cf8f4eb, 0xc81ca953, 0xd3d983bd, 0x84459be5,
4564 0xe303455f, 0x91618aff, 0x4fad073e, 0xcf16ff4f, 0x60ef1761, 0x0774b0e7,
4565 0xfc2ad979, 0xadb77e2f, 0x1605ce06, 0x1cf017af, 0x005fbe19, 0x78731678,
4566 0xe3173916, 0xdaf14a39, 0xe53fe7f0, 0xa6a2dfbc, 0x5f0f18f5, 0x2bf6d3e4,
4567 0x29f5761f, 0x4cf247f0, 0xaf790f0c, 0xc9f5be08, 0xeba0cf90, 0xe78d5ce7,
4568 0xdaf5e547, 0x7ef907e7, 0xb4fe8a17, 0xe4fbe857, 0xd3bfcccf, 0x1ea0fbc3,
4569 0x123f252e, 0x5c29fb2e, 0x70f5fe32, 0xd40e0de9, 0x01f3c7be, 0x2b0e3c3d,
4570 0x649d2572, 0x6e7e1f00, 0xf15ca170, 0x42e143be, 0xb1e3bbe7, 0x40fb9ae1,
4571 0xbcb8738e, 0xf4d7706b, 0x02157e87, 0xb75e2bf6, 0xad024f65, 0x6327abcf,
4572 0x78a178e1, 0x070f56ad, 0x03837ef5, 0xaabcfaf5, 0xc7e4022d, 0xfbdfe42e,
4573 0xc31ef895, 0x5d6e547b, 0xed3cf546, 0xe4dd20bf, 0xfdf07386, 0x9b940111,
4574 0x47c6dd0a, 0x8e25fb30, 0x03a3a1cb, 0x3f515302, 0xe4760a35, 0xd3047f47,
4575 0x704f1457, 0xc4f34bbf, 0xbc73a7af, 0x2352b8b0, 0xc52563c3, 0xf4f3f01b,
4576 0x63af5e26, 0x4a2de076, 0x39f05ebd, 0xbbab9004, 0x8c5f7664, 0x8e04e240,
4577 0x847e9504, 0x04ecd5f3, 0xb4779e15, 0x28dffa33, 0x8f81f138, 0xf043f7fe,
4578 0x33dd2bdc, 0xf4afa63b, 0x3e29c0ae, 0xfde78b42, 0xe379ad11, 0x9bf9c1fa,
4579 0x737bc4e0, 0x9cf0629a, 0xbb2d58e8, 0xbf9525ff, 0xf00be7a7, 0xd1f7d43b,
4580 0x438584cc, 0x088cf37e, 0x79c50fcc, 0xa65d9853, 0x7bfa4f96, 0xfe6fbe80,
4581 0x45692551, 0xc7942c7b, 0x04de7ee8, 0x3410cde3, 0x09104ef9, 0x09ff3a03,
4582 0x7cd5bfc6, 0x9249f181, 0xef96f31d, 0xedcf2bb2, 0x5e2cbbec, 0x799c1e6f,
4583 0xef851e68, 0x13a255b9, 0x0c9ba85c, 0x2059838e, 0x09941e6f, 0x7db9cbf0,
4584 0x81e98bb2, 0x853bd428, 0xefc51eef, 0x0e590ad9, 0x8fbc291a, 0x7ca397e9,
4585 0xbd511f3d, 0x0a5882ed, 0xf70f1fa9, 0xee76cce0, 0x7880e69a, 0x95fec64b,
4586 0x2b39ce70, 0x20f07ed7, 0xbb3573e0, 0xaac8e907, 0xeed3f45c, 0x7e4053ba,
4587 0x06f14c3b, 0x9d99cfef, 0x9d20f07c, 0xf155d6f7, 0xcf396e78, 0x9c237f15,
4588 0x27dbce63, 0xdfb41d3a, 0x16adeb82, 0x66bcc738, 0x2adc48a4, 0x5a4adcf8,
4589 0xaf33be31, 0xb039ceea, 0x0faa12ee, 0xf72864c5, 0xfa844b4f, 0xafdf013a,
4590 0xf08dbaf4, 0xdaeb66bd, 0x3a0cc6b3, 0x07ed117f, 0xc75caf60, 0x106e55fa,
4591 0x5dfa909c, 0xca18f4d4, 0x020da2cb, 0x4ad3345e, 0x1b335fed, 0xe3a667d7,
4592 0xefa3aeb6, 0xbc317ad3, 0x886ee30f, 0x27ce11b9, 0xf13ae92b, 0x78d509fd,
4593 0xdf445d2e, 0x75a4cda3, 0xde389dc3, 0x810275a2, 0x264b03ef, 0x01323f24,
4594 0x3b27dbc6, 0xaed0fda1, 0xdd611b5f, 0xfaf9d1b7, 0x8817f1d3, 0x3fa0d36d,
4595 0xc760a5f9, 0x46ea87fb, 0x0baddc60, 0x542f0c36, 0xe63ac70d, 0x0c103b13,
4596 0x651f3a92, 0x4efb0447, 0x755968b8, 0xcdabec0d, 0x406c9f1b, 0x046b3aba,
4597 0xc28c7e3d, 0x3c874ddb, 0x2e79646a, 0xc6a3decd, 0xfd1c9536, 0xdf152228,
4598 0x1b31a3bf, 0x921626f3, 0x709bcc7c, 0xa47b3357, 0x0f84657d, 0xb2ed6ae2,
4599 0x6f3c087d, 0xe7c2695e, 0xfd312f9d, 0x0db839d3, 0xd627dbe3, 0x5fbe04c9,
4600 0xf52eb15c, 0x89e3c069, 0x9bd232cd, 0x1bcb2cf8, 0xc5897e28, 0xb1d79ac9,
4601 0x352c4f71, 0xa0b57bb2, 0x5f8bd69d, 0xb40af254, 0x51c8ac72, 0x2f4a728a,
4602 0x6b72f497, 0x46d593d1, 0xf21ed920, 0x9474e96a, 0xef54a557, 0x90f5a100,
4603 0x306a8357, 0x5797aa6e, 0xc8a2c495, 0x5f8874a9, 0xbe0f9616, 0xf1d02d6d,
4604 0x8183ecad, 0x5f6bff56, 0xb77a053e, 0x49e04acc, 0x5a7f6485, 0x80417460,
4605 0x6d35e65f, 0xa0f812f9, 0xde045e64, 0xf01c75c7, 0x26b37c00, 0x8bafcf0e,
4606 0x6f08857c, 0x78b72f25, 0x95ce96ad, 0xb75ce3f8, 0xfd6a5c48, 0x5c451255,
4607 0xee877eaa, 0xe74af4a3, 0xf051bdb9, 0x743ca881, 0xbbdefb5f, 0xc76eb033,
4608 0xf6e32d75, 0xd22b1ac1, 0x9f9fa1f3, 0x7af4095d, 0x0102bddb, 0xdd789d7b,
4609 0x2b0fa035, 0x880e0ad6, 0xcbdf170f, 0xefa62fde, 0xfd0fbac3, 0xa515d19a,
4610 0x7fd0076f, 0xf6c7bac5, 0x820dff62, 0xb43fc603, 0x89ed10be, 0xb048af12,
4611 0xfa3b437d, 0x614f540f, 0x57b3599e, 0xaffa004c, 0x0764dfb8, 0x23a14953,
4612 0xf9db2e85, 0xecc4087d, 0xbe8b331c, 0x15160ab7, 0xc51e93df, 0x4fa82102,
4613 0xbd2a4e81, 0x5fdace8c, 0x36409d92, 0xf64ba717, 0xae09fc1d, 0xe767c55f,
4614 0x74ef874c, 0x047ea98a, 0x975e6d3a, 0xe23b046b, 0xfcc04f84, 0x49749e8a,
4615 0x4a3b6a2c, 0x0567cba1, 0xd07baf26, 0x7b0e8ea3, 0x4ba71dd0, 0x5128fe85,
4616 0xb6595fa3, 0xfdf0264f, 0xdd1e9ebd, 0x908dfd72, 0x32f851ff, 0x6f5d0fdd,
4617 0xd1cfcd6e, 0x48e0575e, 0x2f5009eb, 0x8fde5892, 0x12e50fc2, 0xdefb0fcb,
4618 0xbfcdd3eb, 0x87e78229, 0x2c883f01, 0xe74fc97f, 0x0bf37b7d, 0x66792f98,
4619 0x6875fb53, 0xe941bcdf, 0xd9bfe000, 0x7fe8fc4a, 0x950e50f8, 0x6f988836,
4620 0xe67f244d, 0xaedf952c, 0xfe2cbfe4, 0x5de11583, 0xcbe4d5ba, 0x6e97efa3,
4621 0xf3063a3f, 0x30079611, 0x49bbc7bf, 0xde1fe760, 0xfdf031b6, 0xf2c4a950,
4622 0xc176f470, 0xe71648f0, 0xaa2d78ea, 0xa136ec00, 0x57b3dd8e, 0x6c937f5a,
4623 0x0775c552, 0x2f38ca45, 0x63e787ed, 0xb8678a5e, 0xa7d6011f, 0xc94ddfbe,
4624 0x9178e9bf, 0xa3695fd1, 0x695cf68c, 0xc84e96dd, 0x6c3d2cc3, 0xb2b73f42,
4625 0xfc11acee, 0xbc3fdcd8, 0x55f3f784, 0x3c9a8a36, 0x6ff91ebc, 0x04dfa275,
4626 0xe50d5bf9, 0xeb437e78, 0x0faf58ed, 0xb17a079f, 0x7fc5ad3c, 0x4bddb1d8,
4627 0x95f8b841, 0xbef0d9df, 0x368dd6be, 0xeea9eefc, 0x3da7f9c2, 0x57eaddf2,
4628 0xeddf305f, 0x0941fc34, 0x5d48baeb, 0x931d60be, 0x997d746b, 0xc4e261f9,
4629 0xa5eb7b41, 0x7c839f2f, 0x7fad8eec, 0x5bd60e7b, 0x9ee75ff6, 0xb21abc83,
4630 0xf60ec233, 0x0fa6e548, 0x79559f30, 0xd99224af, 0xfe2f9d7f, 0x3b80f30e,
4631 0x6139343f, 0x271dceb4, 0xd1bd8086, 0x04dbe5b9, 0xba5defc8, 0x73c61a63,
4632 0x4dcb6e96, 0x05e26124, 0xeb74094a, 0xb21e43eb, 0x0dcd5f1e, 0x73ff98cd,
4633 0xe41be286, 0xb17f3043, 0x83e59cbe, 0xe2de783a, 0xdef9f0e6, 0x1b14f23d,
4634 0x193f5d66, 0xb30362e4, 0xaf9a2e0b, 0xf1e28078, 0x6fe03ef2, 0x4f2e6af3,
4635 0x0cefe3c2, 0x54f141fc, 0x57cda913, 0xe161b2fc, 0xb6819e6f, 0xf35eb886,
4636 0x807dfd15, 0x3e4f929b, 0x58f5d22b, 0xd6cdf024, 0x287e63df, 0x01cf2de0,
4637 0x21cbf9f2, 0x293e1710, 0x10fe3007, 0xefc261d8, 0x1c774b2c, 0xdce9fe42,
4638 0xb5f31fb6, 0xeeebcf09, 0xcb1fc124, 0x9eb1e5c3, 0x96560dca, 0x0fe1c8e7,
4639 0x1b0e9079, 0x8ef9e73e, 0x3c958e8c, 0x1ff2dec8, 0xf853225b, 0x4f2c2a7d,
4640 0xc7c37cb3, 0x8430af3c, 0xe002612f, 0x7982fda9, 0xec1c0aa5, 0xd42b8700,
4641 0xf3e1bcf9, 0xdf79834c, 0x3f805f1c, 0x7cc1d390, 0x041f5a5d, 0xe13e9bf9,
4642 0x0f230910, 0x3cb3d73a, 0xfc394ee0, 0x7e4accf7, 0x4f9eb36f, 0xebcb7d7d,
4643 0xbffad8bd, 0x221a7c2f, 0x1eae381d, 0xc3e71d4e, 0x9ce3f1cb, 0xf7f07fef,
4644 0xfe826521, 0x81cf93fb, 0xda1bcb1e, 0x899f788d, 0xfdf13fe2, 0x5a78f076,
4645 0xf31126c7, 0x9bea6b3e, 0xe5eb8e51, 0x273f0545, 0x1bf7afd1, 0x468adebe,
4646 0xb63a27a6, 0x3a167d5a, 0xaf5bc74e, 0x6c573d21, 0xd3bcc76e, 0x18af75bd,
4647 0xcbe754db, 0xaa7c27a0, 0xbcbc77f5, 0x6dca0c6b, 0x7e98bf7e, 0x9b14631e,
4648 0xfc29b2a7, 0xcf9b953c, 0xec59e66a, 0x2dda37ad, 0xb4ef9f17, 0xc609bae4,
4649 0xeccadd3b, 0xe2f5d3a5, 0xf9985f0c, 0x49bd714f, 0x0f3b2d48, 0xef12faa5,
4650 0x7bb2b359, 0x245b44d5, 0xad4b5fda, 0xf7470e13, 0x7988d283, 0x79aa2b2f,
4651 0xce7dcc9e, 0x0af7c024, 0xd604d5eb, 0xabe012bb, 0xbb65e3f2, 0x26dd809b,
4652 0xa867e527, 0xf59459cf, 0x8819fb1b, 0xa5ff854f, 0xe08919d6, 0x3bc9127f,
4653 0x5d71d608, 0xe812d7ca, 0x8b0f56bf, 0x47f393df, 0x56f3c187, 0x8e27bec9,
4654 0x553adb8e, 0xb5e84270, 0x34fbdd27, 0x2e998671, 0xf8b17ded, 0x5fdd1c0d,
4655 0xf680d3b7, 0xb7e0d5a0, 0x1ac42ed3, 0x0e849ad1, 0xa43883ac, 0x0214fc04,
4656 0xf41e21f3, 0xfdc16798, 0xcd4236c8, 0x94e7e853, 0x449ff734, 0xf774904f,
4657 0xc30390a1, 0x385abd28, 0x39712abd, 0x8e9bfb2b, 0xacf786db, 0x6a91a4c4,
4658 0x5635df20, 0x4f0dda37, 0xe869fbf0, 0x41e4246f, 0xa74892c4, 0x3a26fefa,
4659 0x38fbe6af, 0x1ea6af3a, 0xe3d6d2e3, 0xc2c74866, 0xbe3897e9, 0x05a2e98e,
4660 0xcd3310e1, 0x796bf8a0, 0xeb4213c3, 0x4e27898e, 0x6b5fb43f, 0x2801efc1,
4661 0xfbd5797b, 0xebb458b0, 0xc8d3eba6, 0x36b4e889, 0x53ad81af, 0x1c4edcf3,
4662 0xa5dfee02, 0xabd74e7d, 0x714617a9, 0x09112779, 0xdcc59de4, 0xbbfc384a,
4663 0x5fbef035, 0x013837da, 0x5fb843f0, 0xcf9025ed, 0x41f7cd12, 0xb7f4d7e7,
4664 0xcd807443, 0x0c871daf, 0x43bfabb2, 0xbfeb9cbd, 0x25fc9651, 0x329e9451,
4665 0x62615687, 0x49125676, 0x9ba5efc3, 0x4a7ca1fa, 0x79839659, 0xa32d4227,
4666 0x086b61ab, 0x00b0cdf2, 0x3fba9bcf, 0x9351ed12, 0xd2237899, 0xe2367be1,
4667 0x1661d395, 0x7043cf1f, 0xa1d0372c, 0xd69455a4, 0x814d7be8, 0x8a42c31c,
4668 0xa2687a84, 0xb94657e3, 0x9f28a3aa, 0x2774ccd6, 0xf6c2c619, 0x3bb95ede,
4669 0x52f6b90b, 0xaa1a0888, 0x1969eef7, 0xef04228c, 0xbdde20f1, 0x6bc6807b,
4670 0xec153a95, 0x6d7f9df0, 0x32eeb064, 0x9b5f7953, 0x3e8feac2, 0xdc2577b4,
4671 0xcf6e9337, 0x49f6147f, 0x7851f6cc, 0xd58fe5de, 0x9bddf3dc, 0x39d6517e,
4672 0x173f8372, 0x3abe05ee, 0x1df5eec0, 0x777e0d6e, 0xa3787a8f, 0xd1fba945,
4673 0xd86fc88f, 0xbcad728f, 0x1bb63f7e, 0xa1cb4ea0, 0x81dcfe71, 0x472f9f74,
4674 0x74969a1d, 0xa1af1d29, 0xd93e0930, 0xd0ea357f, 0x30eef81e, 0x578f8704,
4675 0x82141eee, 0xc3fcb483, 0xd5932d3d, 0x0f70f870, 0x857d21d8, 0x7d0fabc3,
4676 0xebe87088, 0x6c5d29be, 0x935cbc07, 0xd6fbc06d, 0xc16c38ae, 0x45fd0af8,
4677 0xe3e23ea0, 0xbbe5efac, 0xa11fc56c, 0xd354ece3, 0x429ef297, 0x4dd1bd57,
4678 0x628fb12a, 0xe96a6cf7, 0xf5ca2ba7, 0x25abac36, 0x358f75ca, 0xf78ff71e,
4679 0x76e35c00, 0x0b8ea73b, 0xb8b135d1, 0xeefdc1c7, 0x5bf32ca3, 0xf2f254a3,
4680 0x6225ec9a, 0x81c9c40a, 0xfb43e217, 0x8de65f89, 0x19f74118, 0xde6032ef,
4681 0xfb8b28fc, 0x2b63cc20, 0x7721f808, 0x1ee20aec, 0xbe218827, 0xd9abe650,
4682 0x9af5fcc1, 0x396f8342, 0x6015ef3b, 0xb47d10bc, 0xc023e8e9, 0x1db1a3e8,
4683 0xa9a2a3e9, 0x6347d19d, 0x06644e75, 0x3f03373b, 0xc60496bf, 0xa23bde02,
4684 0x51269abe, 0x151a1ffa, 0x91ba01a8, 0xe5a6e7bd, 0x3d708a5d, 0x7c3f161d,
4685 0x7abeca7d, 0x4b6d6fc3, 0xe06943ca, 0xe033ee4f, 0x37029779, 0x858c5fa5,
4686 0x58b6c5e5, 0xfc035fdd, 0xedb4272a, 0x6d6fed85, 0x36f31f79, 0xd86efb6c,
4687 0x66dbef05, 0x42390c53, 0x5beed6f3, 0xd767f78e, 0xd87dd806, 0x05e024d1,
4688 0x3c3bdebd, 0xe104ff18, 0x1a4f7601, 0xf91da3c0, 0x5eff1365, 0x7051ab2c,
4689 0x1a1f9e81, 0x890deec5, 0xebf3b0b4, 0xd7111621, 0xcec2c439, 0xbdf7e259,
4690 0x95bf8225, 0xfb01bf75, 0xa69943c7, 0xbcfdffde, 0xaf89a4bf, 0xe854f82b,
4691 0x28d24a89, 0x4ce47fb8, 0xa2d13b8c, 0xa8d89fa1, 0xca78d514, 0x88788f7b,
4692 0x47aa0ef3, 0xff3dd8af, 0x94abd02e, 0xfc00be7e, 0x968dfb04, 0x4a6e0023,
4693 0x70cfa07f, 0x0defa1f8, 0x1e60f987, 0xecb617b0, 0x3de2225e, 0x6bc47d1a,
4694 0x491bdc26, 0x914667fb, 0xfdf4adaa, 0x425a68cc, 0x13d78e3d, 0x2b207d79,
4695 0x1a713f53, 0x3d7cfa04, 0xb64ebb8f, 0xc931fcf0, 0xd186ea3e, 0x5c766750,
4696 0xea245256, 0xe16f8505, 0xb738080e, 0x75f9f896, 0x00c5204a, 0x58f85378,
4697 0x56fc180a, 0x2452b4aa, 0x18f20187, 0x7dd0f1de, 0x9dcbbd4b, 0xdf652fab,
4698 0xcf9fea71, 0xc1f9ebe4, 0x3d17f5f6, 0x099eefbe, 0xb7372df0, 0xad03723d,
4699 0x0e7a5c57, 0x479707cf, 0xa1795c55, 0xebf42f7b, 0xdbfce77f, 0x4d874051,
4700 0x7ec298df, 0xe1c3550f, 0xc029e2d6, 0xbdf932f7, 0xc951242e, 0xb1e55633,
4701 0xcbb71b42, 0xf8299510, 0xffaced1c, 0xf8081140, 0xf0b14af4, 0x9e32547e,
4702 0xe5d14e1f, 0x9f87fead, 0xc132f9c5, 0x71250030, 0xcf3628c9, 0x324ecc37,
4703 0x9ce0ffd3, 0x173f1a69, 0xaf72477b, 0xdef1d2b0, 0x357cec21, 0x19aaae33,
4704 0xc6c4c4ea, 0xfbda26cf, 0x6b13320a, 0xb8c2c6a7, 0xdf18c9d1, 0xdaeb35ca,
4705 0xc812bd53, 0x8c9a9269, 0x88d38979, 0x7a633eca, 0x08eeed03, 0xe3902eba,
4706 0x742c8cd7, 0xe7ede54e, 0x4d43ffe8, 0x2a99f6e4, 0xc72ae37f, 0x8d54e75c,
4707 0xf78b52fd, 0x9fe9fd01, 0xf2e1ede2, 0xfce33e2c, 0x77c9e2df, 0x1eb3f9c2,
4708 0xe10e399e, 0x27a3ab7e, 0xd470f5dc, 0xab815dc3, 0x9fd98e1e, 0x86c6a738,
4709 0x2e1e9381, 0x48ed48d3, 0xdc0a63d0, 0xc77970f5, 0x9de2e8cc, 0xabde1334,
4710 0xe0c48ef8, 0x23350ef8, 0x9ba41ea1, 0x01ef1168, 0xf5e28cce, 0xbab04737,
4711 0x64a8ef82, 0xae1eb7c4, 0xc666387a, 0x58e3f7f1, 0x2f00bdff, 0xe202e509,
4712 0xcc9ba147, 0x31ddaad4, 0xec507a2a, 0x2e1c69eb, 0xfb46bed4, 0x8ade3739,
4713 0xafb02671, 0xe08425a7, 0xd6ce5b96, 0xf2dc3b95, 0xf4a9f83c, 0x72bfbc75,
4714 0xff3fe10a, 0xca2f3c14, 0xce0555e4, 0xdad1be53, 0xa69ad3c9, 0xc338829f,
4715 0x7efb9350, 0x1080cfa0, 0x1475e783, 0x707447ee, 0xd767bed7, 0xf870f5d6,
4716 0xb131fc03, 0x3a14bc27, 0xe3c2c0fb, 0x20c8034e, 0xbcc797b0, 0xf20d1196,
4717 0x86c5349b, 0x715c4b8d, 0x0e383f38, 0x63a457a7, 0xcf83b881, 0x423fa9ed,
4718 0x5aa3ed8e, 0x36c72552, 0x96d3ee8b, 0x4c729ef8, 0x8e64d3c1, 0xbbc4c987,
4719 0x934be20b, 0xd045f489, 0xed0e481f, 0xe7d95bbf, 0xf6103240, 0xc1c58379,
4720 0x67df3fe4, 0xbcd4df70, 0xf8b3f984, 0x0b6659fc, 0x02435f7e, 0xce104752,
4721 0x91df7829, 0x5a1b18d7, 0x4fbf9287, 0x66115486, 0x7bc3cdcf, 0xc85c29ae,
4722 0x75a15177, 0x8482ac98, 0x75f0fdf7, 0x7b33a99c, 0x5bad8f21, 0x9d814774,
4723 0x1bec21d7, 0xfc93fb83, 0xe9ff4023, 0xee35cfdb, 0xda7680ae, 0xf1fb08af,
4724 0x59162ff5, 0xc3b021fc, 0xb93e7be4, 0xb2953b77, 0x8509ea35, 0xfbe0b37e,
4725 0xde81cbd4, 0xdd6103fd, 0xd1d54053, 0xf659e772, 0x6376431d, 0xecf304ba,
4726 0xff7966e9, 0x8125c439, 0xdfa7ab7d, 0xa1a74bef, 0x08604578, 0x5d8a29f8,
4727 0x1eead536, 0x57cfa569, 0x9b66eff3, 0x05188ece, 0xf4c1f978, 0x4f4b4074,
4728 0xba511d0a, 0xecf00f1a, 0x69fcf8ca, 0xcddfc730, 0x7a009738, 0x43dfb151,
4729 0x026b8a76, 0x3b37a7ac, 0x3dd5897e, 0x3b017ac5, 0x2e67b15e, 0xdd9087e6,
4730 0x74a641d4, 0xcbc71b74, 0xccab733c, 0x600fcdee, 0x48eafdfe, 0x473b5ee5,
4731 0xb791d824, 0x54d94ead, 0xd586e707, 0x6b7efe2c, 0x83f1ac95, 0x86dd90dd,
4732 0x66fbb3ef, 0x6da65f6f, 0xfe604cff, 0xfb57a17e, 0x3412589c, 0x9cf6edf7,
4733 0xc035e0d7, 0x3123c3bc, 0xaf3f413f, 0x79fa7f7e, 0xe6adf3f5, 0x636ad57e,
4734 0xcaa748ed, 0x6560592e, 0xaaf750f6, 0xcae0ebc7, 0xe7e0deba, 0x93480f36,
4735 0xb5abf754, 0x082c8ead, 0x328c6f77, 0x79ef029e, 0x00e2cfc4, 0xc3dff255,
4736 0xe59b83dd, 0xde81f166, 0x98161de6, 0xe1a0768a, 0xf608bf49, 0x4100b0fc,
4737 0xe02b3bfb, 0xf8d02c32, 0xee4fcc01, 0xbdc007e1, 0xd65eb426, 0x01f98bb0,
4738 0x4fe8d5f5, 0x027f5194, 0x387accf4, 0x17c01e9b, 0x41fe8694, 0xfc85dfd0,
4739 0xcfb82ca9, 0x12c3fb92, 0x5ad497a5, 0xf5a37fd6, 0x096ae35d, 0x927755fc,
4740 0xe363294c, 0x98d7efc3, 0x93555fa9, 0xf508224c, 0xf8785eab, 0xc06be9fd,
4741 0x09758e5f, 0xad287f70, 0xf7fa58d7, 0xf8debfdd, 0xb81afef0, 0x65fa946f,
4742 0x7f2aaceb, 0x78fe37b7, 0x0b918c04, 0x3dba47f0, 0xa1f0237f, 0x8a68af12,
4743 0x111f7ce0, 0x8068bba4, 0x57274297, 0x7e8f9b2f, 0xe725c445, 0x589e4087,
4744 0x16ffc716, 0x46c38f2b, 0x129ff7b1, 0xbf905bdd, 0x023f3adf, 0x8cefcbe2,
4745 0x5cfe8a3c, 0xe7c59593, 0xd04a79f7, 0xb9f0527e, 0x3f702acb, 0xf8103fc9,
4746 0xcdf1daed, 0x6497e071, 0x43de02c9, 0x9efb24da, 0x7900cf4c, 0x82bedb34,
4747 0xa26b296e, 0x6b13bf11, 0xbc0ff08a, 0x35a7655b, 0x9b4cfbf1, 0xa81deece,
4748 0x661e63ce, 0x4565ddcd, 0x308bf3fa, 0xeec6567e, 0x7befa0c3, 0xfd212fd3,
4749 0x7f4012e1, 0x13fbf390, 0x61a8fcf0, 0x42e20d8f, 0x827efc1d, 0x09cd0d33,
4750 0xbe5969f3, 0xf0362fe5, 0x70e7ded7, 0xe2b52338, 0xdb654a3d, 0x83ffbc44,
4751 0x0b709bce, 0x161ba7c4, 0xf7efb264, 0x8a6777d8, 0x67ff4cfe, 0x167cc0f3,
4752 0xc8efc434, 0xb2727b14, 0xf583ebd9, 0x188b5535, 0xbbac9e2f, 0xbf0a6c37,
4753 0x5f6f4c37, 0x712ab49e, 0x87cc04e9, 0xf3676a5a, 0x594fc6f4, 0x9f12c4df,
4754 0x24b2df8a, 0xcfeb08bf, 0xc08126fa, 0x5a679715, 0x03c89e52, 0xcec89e3f,
4755 0x44ac30e1, 0xcafda376, 0x6fe89fcf, 0xbe43dc37, 0x6cde5793, 0x4aeb3738,
4756 0xfdfb6624, 0x77600997, 0xe0b1fbb9, 0x8a07d322, 0x1be5377d, 0x6f557c6d,
4757 0x8d34e6e7, 0x41207fbd, 0xa77fb378, 0x55eec022, 0x06ff61eb, 0x7bb587a6,
4758 0xe10c7909, 0xf52dbe90, 0x2947b81a, 0x3b068ffd, 0x7c02dbcc, 0x3cf80f11,
4759 0x54fcf787, 0xd08dff10, 0xda20d15e, 0x927eb0fd, 0x95f01971, 0x70283762,
4760 0x6cdf3c69, 0x91d7431e, 0x5f60d675, 0x3378874e, 0xcffa05f0, 0x2fbcfee3,
4761 0x5357f40e, 0x8273c240, 0xa3bbb3ac, 0x60e4a816, 0x3e0379d3, 0x5bfcf37f,
4762 0xd881e7da, 0x2dbde0cb, 0xef17e606, 0x28f7fbde, 0x9e6f4b90, 0x82f1c6ef,
4763 0xbb4f4376, 0x6b91e118, 0x67718315, 0xc44c5db5, 0xb79003ac, 0xaa9a2d35,
4764 0xbb77a131, 0x7213fb37, 0xb4f495bf, 0x1ec0721f, 0x11d8c311, 0x3e74ce1c,
4765 0x6f48f809, 0xe36e5c57, 0x24c1e6f1, 0x6ca3ee1d, 0x18b71f3c, 0x8a6e1fbf,
4766 0x7d472fb2, 0xaea5eccc, 0xbf1fa7dd, 0x13ef9e06, 0xe711fdd9, 0xb7a7e445,
4767 0xda1e2e76, 0x2a5be2a6, 0x5f4f1139, 0xf9db3ff5, 0xd5ffed06, 0x4716489e,
4768 0xa9979c97, 0xf50877bf, 0xf97871f7, 0x38f3b007, 0xd7b800ef, 0x2fdb07e9,
4769 0xfafc3d1d, 0xc3da1b3c, 0x1ea0e981, 0x376bac46, 0xac5bfe02, 0x90d9d7f9,
4770 0x00a3eadf, 0x33925e2e, 0xf3804c90, 0x7403927a, 0x7626a815, 0xb5b627f0,
4771 0x97800c18, 0x98c98d8c, 0x9f89b3a7, 0xafaa2e57, 0xe8ab2635, 0xef3f1162,
4772 0x877b293a, 0x1f9eaac4, 0x72f931b0, 0x6fe94f72, 0x43e34f30, 0xc61e1913,
4773 0x31b06cde, 0xd18afb7d, 0xe866cd7b, 0xdf80c477, 0xfbdeed0d, 0xcfb85efa,
4774 0xc761d178, 0x3dff8858, 0xbf607362, 0x6a9b7dc6, 0xf1b7cf20, 0x5452d013,
4775 0x14286caf, 0x37de740d, 0xefc58388, 0x1fd0180e, 0x893dc60f, 0xf9f60e2b,
4776 0x1bcf5f10, 0xf9cd062d, 0xdefc1bd8, 0x326d7bdd, 0x89b12fb6, 0x2dadc788,
4777 0x37a07139, 0xbbeeac5a, 0x8e2fa06d, 0x12c0d5b5, 0x629f7894, 0xb03c4daf,
4778 0xf4d19af5, 0x061d89cf, 0x71dba03b, 0xf61179e0, 0x484938eb, 0xd87a408c,
4779 0x8f3c746f, 0x3a37bc7a, 0x1d7478d8, 0x2abf016f, 0xff9aa7f0, 0x7f5a34a1,
4780 0x858a55a3, 0xfe052efc, 0xf9943eca, 0xb5c4f51d, 0xe4ac82de, 0xb8817ada,
4781 0x3a5f92b3, 0x7f944ece, 0xd2e9012f, 0x6a3d7368, 0xda0ef663, 0x30f727d7,
4782 0xae15e8bb, 0xe1524947, 0x829f8050, 0x8b1b7aa7, 0xe9eb2a33, 0xdbdffe6d,
4783 0xca549e98, 0x9bd74bef, 0xe9178764, 0x0fcb1b66, 0xe6fd7877, 0x6b23c854,
4784 0xcf7fc54c, 0xfb679549, 0x93e7a47b, 0x1b057bda, 0xf8060cdb, 0x8762ac0e,
4785 0x6de68310, 0x20ebed1f, 0x48f5499d, 0x09878d7f, 0xdd6971f2, 0x48ee2c9d,
4786 0x7fbf0de5, 0x81d1cf0d, 0x7a79f87f, 0x1396817f, 0x18afd69b, 0xdbf5f088,
4787 0x7042af80, 0x65037ca2, 0xe811ad55, 0x5652d175, 0xe973f316, 0xc8dd6b45,
4788 0x58eb459f, 0x5b1ee17e, 0x0ce7ae32, 0x886257a7, 0x27f9001c, 0x657f0e2e,
4789 0x6e9c79dd, 0xd13c354f, 0xfa52f30c, 0x73e013fa, 0x4f63e352, 0x7a1572c3,
4790 0xc641b53d, 0xb5224a71, 0x7cadf6e7, 0x18076dbc, 0x20dc4fbd, 0x5ffdc0e7,
4791 0x0ec4bd13, 0x3637ec71, 0x7e41146c, 0x9cf401bf, 0xf41cf8cc, 0x0f3dc9ed,
4792 0xf402fd46, 0x4081bb5c, 0x2315fcbc, 0xe2a2d929, 0x5febdd8b, 0x696ff0d5,
4793 0x1835f55d, 0x158b6f97, 0x7c2bce40, 0x15fdc0ab, 0xe42af3a3, 0xfc74ebff,
4794 0x2fbd953f, 0xdfb03b47, 0x9fff9c13, 0x9ff94198, 0x10d98a3e, 0xaf38c023,
4795 0x07dfc318, 0xa40ff5f7, 0x6d5ca0bf, 0xbf5721eb, 0xcdb57266, 0xafe74a96,
4796 0xe31bb6b8, 0x71f5c10c, 0xaa6279ba, 0x02c93742, 0x6296bfc0, 0x8bc01870,
4797 0x99e815c2, 0xdfb7cdda, 0xd95c8690, 0x0f39e122, 0xf9e2473f, 0x0277ca1f,
4798 0xe486bf0a, 0x6eb7c299, 0xd5d83473, 0x8056ab53, 0xe7971f5d, 0x253cfa45,
4799 0x52c687b8, 0xf80a767d, 0x383c8c38, 0x57c7e5c1, 0xf762fbb2, 0x7a000fee,
4800 0x221ea12e, 0x13ac87ec, 0xa51780ec, 0xdd8eb1dd, 0x5a3c3ac3, 0x2bbf9cd0,
4801 0xef0c1ff5, 0x41fb8f40, 0x7c634787, 0x3c84603a, 0xa63e11d5, 0x839088c7,
4802 0x570c40fc, 0x5b3e000f, 0xcdd7f544, 0x4a75fd2a, 0x553a45ae, 0x347970e0,
4803 0xc55f5f93, 0x95ff7db0, 0xe21585d3, 0x2f73aa85, 0x024890ea, 0x605167e3,
4804 0xf8c22e7c, 0xba4cf6a7, 0xdafde90a, 0x076ef4f0, 0xfe162aff, 0x48f5a73d,
4805 0xec33319f, 0x13cb1df8, 0x46223392, 0xb0f91f63, 0x57f1bddc, 0xfd01d7e8,
4806 0x46f7bf02, 0xff4025ff, 0xfbdd0c24, 0xf0abdd28, 0xa501d0a7, 0x55a26b8b,
4807 0x174f41f2, 0x02a379ca, 0xe7745797, 0x33474f95, 0x9780b079, 0x66f25e8e,
4808 0x60fcfd94, 0x81ec9f3c, 0xcf0cf9e7, 0x7c02be21, 0x67e1f22b, 0x3dafe117,
4809 0xaf6c76d1, 0xe60174f9, 0x73f2d4a9, 0x9f3e7aab, 0xd1a5eeb2, 0x4b7ce682,
4810 0xca34ee7f, 0x5a2bbee2, 0x48ea3e77, 0x34c7d10b, 0xd92ecf6e, 0xff73c268,
4811 0x7802d02d, 0xbdfecddb, 0xbb3de56c, 0x0a4f0d44, 0x4cd115ea, 0xe1f42b8e,
4812 0xc3246658, 0x55f2ffa8, 0xc86ee172, 0xab59f9ff, 0xdd346f37, 0x77a316c7,
4813 0x07e8b5f6, 0xf182af38, 0xd833caaf, 0xc6241f21, 0xde201765, 0x7c0a2481,
4814 0x33cd8fb8, 0x1979d52e, 0xe70ec9fa, 0x0f079038, 0xf8297c73, 0x9bd0e055,
4815 0xaf0deb9e, 0xe27c387b, 0x8e5ebb79, 0x9efe7314, 0x5c5dfbc2, 0xe045788e,
4816 0x2f711b27, 0x59fd6117, 0xe505fe4c, 0x73c11648, 0x727597c9, 0x5e9fe5e4,
4817 0x91acbc8e, 0xc2da1323, 0x0bfa11ca, 0x1bf1ffcb, 0x4b1da216, 0x63b7870e,
4818 0x3d334677, 0x93fa0f1c, 0xb2f78bf6, 0x3987def3, 0xc48a52dd, 0x0ddac9bc,
4819 0x5713cc26, 0x366d90e4, 0xaf7f81c9, 0x16fa06d9, 0x1f76cd7a, 0xc5e70c9e,
4820 0x9c074649, 0x03929f5f, 0xd453f788, 0xfa45af01, 0xc7fbc7c8, 0x0223c8c3,
4821 0x47ef12f1, 0x9cefd083, 0x9f213626, 0x5046992c, 0x78deee7f, 0x4955d205,
4822 0x74008a5e, 0x23175a5b, 0x54ec7b40, 0x94e401bb, 0x962b8fb2, 0x71b0c819,
4823 0xd40707c8, 0x6f0ae472, 0xcdbbfe15, 0x49dce343, 0x47210c72, 0x33fb3d1f,
4824 0x8da8bc75, 0x22f1d5d6, 0xfbe07f5a, 0x468e8bc4, 0x78801e07, 0xae6c3fd1,
4825 0x94779876, 0xea28ff25, 0x912ac4b7, 0xc5d6e4a8, 0x4a1fb7ec, 0x2e3c952f,
4826 0x34a95a45, 0x81c4d04e, 0x6073ab6f, 0x582bf81c, 0xe380c54f, 0x7870c34f,
4827 0x7b5846af, 0x1fa3ad9b, 0x13e40b97, 0x97e8f882, 0xfc42255f, 0x063b9145,
4828 0x2fe2ac7b, 0xa197900b, 0x037fdbf0, 0xd7b57d1c, 0x00008000, 0x00088b1f,
4829 0x00000000, 0x7dcdff00, 0xd5947809, 0xe77df0d5, 0x24cb2d9d, 0x7642c993,
4830 0x03bbec26, 0x4eb1ab09, 0x04906008, 0x8d441007, 0xb0900938, 0xd2910364,
4831 0x208196d6, 0x2b188a06, 0x0eb154b5, 0x4551fa14, 0xdb1ab61b, 0x1a4013a0,
4832 0xad563414, 0x61a5afd8, 0x80891d91, 0xe58ad3fd, 0x7bdce73b, 0x264ef333,
4833 0xe79f6a02, 0xcdcf0f0f, 0xcf7bde5d, 0x773dfb3d, 0x79632d49, 0x9b19223b,
4834 0xed50b390, 0xccc9a906, 0x831b163c, 0x43632f1f, 0x087a3e79, 0x6b9859e6,
4835 0xf26b6320, 0x01de7975, 0x9fc75d8c, 0xa269fd3b, 0x678e3e15, 0x30d6fe6c,
4836 0xb53349eb, 0x7fe1d767, 0x268c5d79, 0x649f595f, 0x9fc7d93d, 0x24bf8f9f,
4837 0x4c33ffc1, 0x2b1812cf, 0xe1a7e263, 0x70ffdfcb, 0xdfc7b418, 0x54dec655,
4838 0x805689dd, 0x12dcdca7, 0xd8ceddd5, 0x13c7f933, 0x52d491dc, 0x223ddf87,
4839 0xb97178c6, 0x71debde3, 0x55de798c, 0x0fc816d9, 0x4a3d1936, 0x64e2fc34,
4840 0xe8826b76, 0x06947e0f, 0x041967c5, 0x55437ff9, 0xfe97632c, 0xc5f4a3ad,
4841 0x32f2b89f, 0x7a8afbe0, 0xb439639d, 0x185068ab, 0xd1cc62cb, 0x19cd7995,
4842 0x4785d58c, 0x5fd0620d, 0xa748bece, 0x292fca01, 0x8329af66, 0x870800d1,
4843 0xa23fc241, 0xd41b7d35, 0xd8983757, 0xca5ec86a, 0xe119ac61, 0xd9a23bd5,
4844 0x077e3f00, 0x0fa67e1d, 0x6bca00cc, 0x630b2e1d, 0xff78c29b, 0x7b64c29b,
4845 0xb483347b, 0xecd192db, 0xd7a7c004, 0xf40d1633, 0x6983c481, 0x036e92f6,
4846 0x1f3099f4, 0x8018f33d, 0x3eadd94e, 0xadd2f115, 0x9163aed5, 0xadf471fe,
4847 0x4ddbe68c, 0x6039d76f, 0xf7813afc, 0x543b4d9d, 0xd873e03d, 0x156ada98,
4848 0xf728d2d2, 0xa8f3c458, 0x2c6aaaec, 0xa8f7cd8f, 0xa59f686e, 0x00b3ed54,
4849 0xe678d85e, 0xcce502d8, 0x848f8307, 0x18d616fa, 0x2398d905, 0x2828ce2d,
4850 0xd9c6751f, 0x1de60038, 0xf60a62ed, 0x1a32d8c7, 0xcba45fbf, 0x38b2fd85,
4851 0xfd0052a7, 0x2307fb0c, 0x767ec8bc, 0xec568d36, 0xf35c6f00, 0xc01ec518,
4852 0xe24d305f, 0xfeccf5ab, 0x73d7ec53, 0xba40e748, 0x7398ebda, 0xfaefb423,
4853 0x2c31bf72, 0xd2bedfca, 0xb778d0aa, 0x46b9ddbb, 0xd879f346, 0x9c8fdf0a,
4854 0x0067ddee, 0xf1cf8678, 0x03da33ec, 0x519733e6, 0x1e2d297f, 0x11d2479a,
4855 0x8ba60e77, 0xcfd4312d, 0xc6be33a8, 0x4baed001, 0xca07cc15, 0x543f9ad3,
4856 0x5569af10, 0x71d20acd, 0x825ed367, 0x3f79b537, 0xea11814f, 0x7201dd20,
4857 0x8f301755, 0xcd1d16c5, 0xa145b163, 0x99c5e574, 0x7fa82e89, 0x6c5eeac4,
4858 0xc79fea19, 0x62771cca, 0xbebff415, 0x7cfb5ba9, 0xb7bc027b, 0x278867c1,
4859 0xab72dfd9, 0xb269fa91, 0xf3847fb8, 0x72de9cab, 0x476f7900, 0x48a39fd3,
4860 0x88e21a2e, 0x8e8709be, 0x96123d13, 0x78a0ce00, 0x0a85a1fd, 0x85f5aa83,
4861 0x23a53340, 0xddb8279e, 0x8899318e, 0xf89f806f, 0x09311ac7, 0x8c62f2f8,
4862 0x91c706bb, 0xd91427ed, 0xb45f5022, 0xcf77c5e7, 0x598e652e, 0xfbcf003d,
4863 0x6eb2778b, 0x12f77748, 0xbb7b7ba4, 0x21878f81, 0xb38b313f, 0xa4bbfb16,
4864 0xce38e9b0, 0xf942984b, 0x979e064b, 0x95abfaf8, 0xeb11ebe3, 0x7896c5a4,
4865 0xf02b278e, 0xbc614bf1, 0x7a1eb05d, 0xb3bfcad7, 0xcd617e0b, 0x1e705f9c,
4866 0xbb64bfa8, 0xdbdfa2dd, 0x3d5cee9d, 0x08cd93e7, 0xde11c8e7, 0xc3b7c87d,
4867 0x90fb3cf3, 0xe098d3ff, 0x27ce3c93, 0xcfbefcc1, 0x467ea36a, 0x8865699d,
4868 0xb9852cf7, 0xd32ee902, 0xa1ae10d7, 0x89a3dfc8, 0xb61e407f, 0x52c378e3,
4869 0x800354aa, 0x13acc712, 0xdec67758, 0x5da9dab6, 0x3ee708e6, 0xd3ab37e4,
4870 0x207cf245, 0x2be54ac2, 0xc07f3833, 0xfc407ff7, 0x2ed3cb05, 0x7e01a394,
4871 0x7e438a39, 0x8fc8ec8c, 0xbcf013bf, 0x63a5e42d, 0x613feeff, 0x3acd71ff,
4872 0x0c9d02a7, 0x65e9123f, 0xa2f874d0, 0x8fe1152a, 0x00ffc063, 0x358e6da0,
4873 0xa52ce507, 0x5d20a1cc, 0x875c229b, 0x230fd4ad, 0x4732b9bd, 0xef86ade7,
4874 0x893b46e6, 0x3ed8df7e, 0x366667ec, 0xc01f6fcc, 0xe115fc1e, 0xb6b07b03,
4875 0x6ff4f508, 0x3d4469ff, 0xd7f2976a, 0x38a22434, 0x48ae3f80, 0xf7a7e0bd,
4876 0x410bd271, 0x73d60ef4, 0xebf6f4c1, 0x039ead05, 0xf4e05d7c, 0x9f226770,
4877 0x522f35c5, 0xead07eb9, 0xd1e8ceb5, 0x3a083f41, 0x7e708a5c, 0x0c5cf881,
4878 0x7ae38832, 0x583eb346, 0x0e1d99de, 0x76a4898b, 0x1c3b45ff, 0xd1df1316,
4879 0xadcceb0e, 0x47c01507, 0x576a8379, 0x8fd50a61, 0xff489cd9, 0x8714eb17,
4880 0x41a4e509, 0x71787e25, 0x4bd93865, 0xbb67ef09, 0xdbb107a3, 0xcff21520,
4881 0x8ec9dddc, 0xf188c656, 0xf18790ed, 0xd679592f, 0xc5277568, 0x1793e804,
4882 0x4308be1b, 0x644ff73c, 0x62c64e03, 0x0ed6a70b, 0xf0290883, 0x537f09bd,
4883 0x6b83af10, 0x69ac1454, 0x95269dee, 0xfb1dd6e8, 0xfe5ace1b, 0xbd700d9c,
4884 0xceb46dbc, 0xf537c81d, 0x05ec6757, 0xb8232bf8, 0xf7b4be5d, 0x33e42f5a,
4885 0x92f77f59, 0x3f7bd262, 0x13192b07, 0xeedf1fa0, 0x61eb8273, 0xd53d6856,
4886 0x2a76871f, 0x850023d7, 0x7a3ee651, 0x70d427f4, 0x27f5aa87, 0x7baa3988,
4887 0x7f107e02, 0xbf84e18d, 0x77209eea, 0x48e70419, 0xc5bf7fec, 0xfca092c8,
4888 0xb623c80a, 0x037f7093, 0xe2074778, 0xaa6f0fd1, 0xe08454f5, 0x5f0fd50b,
4889 0x0e905d3b, 0xd16abfd0, 0xb12e3cd3, 0xb3d20770, 0x4864e8ce, 0xe151cf7f,
4890 0x55ba081f, 0xd4bb9e08, 0x1b88f430, 0x91e2f7e6, 0x7f7e0754, 0x984afea9,
4891 0x46fd122e, 0x979c14f7, 0x851ad69a, 0xc35f70f6, 0x032dbe95, 0xc54dbf48,
4892 0x4e872bf2, 0xbe03dcd8, 0x8466fcd1, 0x7e7687a6, 0x9ac8fa95, 0x6150ff40,
4893 0x7cc17e7c, 0xfe3434a4, 0xf244194b, 0x7a1f50c7, 0x1ab799d2, 0xa072bde6,
4894 0x997ba7e0, 0x983ee51d, 0xabab46de, 0x6e402622, 0xaaed15ff, 0x9c70b842,
4895 0xcf342194, 0x741f9885, 0x41a66678, 0xc31bf387, 0x7f4a6ed0, 0xb0effd0f,
4896 0x4eff7e21, 0xfe7dafce, 0x3a0daf3d, 0x3fbe68c4, 0xf80071c6, 0xaf803ae5,
4897 0xeac18c12, 0xfb79c08c, 0x62e51e88, 0x48e6e57e, 0x61f30a9f, 0x5a170cbb,
4898 0xd6e81ea4, 0x4fa07e11, 0x19e7c20d, 0x46e238ed, 0xd235fefa, 0xd1f88d51,
4899 0x5fd15b37, 0xc6acf985, 0x28a2367a, 0x2fdfe711, 0xf505b9d2, 0x18cb4bfc,
4900 0x57a5f3f1, 0x4c137798, 0x1d7efb76, 0xd646cbf1, 0x9fbef88f, 0x570cf2ee,
4901 0x3af3c924, 0xb9ab3b84, 0xb77a8756, 0x43aed7a7, 0xb9b7da7d, 0x3e23a74e,
4902 0x8622ff70, 0x5799e4fc, 0xff5f00f4, 0x37ea556d, 0x686f07e4, 0xaf40ef7e,
4903 0x92f481cd, 0x7c16cb78, 0x43788d90, 0xbfaad083, 0xe3f662d0, 0x52c3e80d,
4904 0x63fb1d6c, 0xf11d25ac, 0xe9faf8d4, 0x5fd02d5e, 0x67a71bc5, 0xfe2a5e20,
4905 0x18262260, 0xd1be87f3, 0xe59fefc8, 0x2e67f684, 0xe872ad2c, 0x257a9fc1,
4906 0x85d91ba6, 0x446cd632, 0x6ebca13f, 0xa01f4381, 0x76ffa5cf, 0x8f9cd0c8,
4907 0xaa1a1ffd, 0xe78065b2, 0x5de18e2b, 0xd13b0858, 0xbfa12fee, 0x472fb006,
4908 0xafcf11d8, 0xff734567, 0x20f646d1, 0xa5a1fdb8, 0x7a631c73, 0xa1dfde74,
4909 0xbdd361c1, 0x907e7df0, 0x8634741f, 0x18b6b5db, 0x2141876e, 0x8bce113b,
4910 0x3d78b7bf, 0xc8717450, 0xfd0c5147, 0x641f5dcc, 0x2e8f807a, 0xfe47e6b2,
4911 0x35767288, 0xf971d692, 0x5cca3f83, 0xe5cbf166, 0xdcf8231d, 0x70ed78ef,
4912 0xe7da1d94, 0xe717df6f, 0x1ddfc009, 0x9db57f4c, 0x5c7033af, 0x7d33e346,
4913 0x07a42f4b, 0x04d9e3fb, 0xaff9a43b, 0xf9c715bf, 0x74874120, 0xdbf4245e,
4914 0xc028b0ef, 0x525fcedf, 0xf3247c41, 0xe6666de5, 0xebc80d8d, 0x04b88d9b,
4915 0x648b6f2e, 0x37b7685e, 0x7a4712c6, 0xa3259926, 0x5f14e99e, 0xe0cf8937,
4916 0x43cf8972, 0xa3a6cf83, 0x2759f15f, 0x1b6f70fe, 0xf7ced76f, 0xd74fc14b,
4917 0x7ceff3fb, 0x0aec3ea5, 0x8d845df1, 0x638ae9d3, 0xf7f41764, 0x1ebe8df2,
4918 0xe4ed10d6, 0x4f1832fa, 0x8d2b5f6f, 0xdf7f7ec0, 0x050bca66, 0xfba6de97,
4919 0x21ca7e76, 0x1fc02a80, 0x53baa6dc, 0x9c1fc26d, 0xbe8af90c, 0xbad1c657,
4920 0xd08bf25a, 0x4f30777b, 0x306fca23, 0xf77a487f, 0xfadd01b0, 0x296672a3,
4921 0x318bb748, 0x4237ce76, 0x047ca41e, 0x9d3831e3, 0x50ee6460, 0x62af80eb,
4922 0x98c35e24, 0x23e1f407, 0xdf640d1b, 0xf8fb5f0f, 0xf7e04cde, 0xd60c1bd3,
4923 0x9ce430e5, 0x3ea5f617, 0x0673f503, 0xe40aac9b, 0x3d7ddb4f, 0x5f4bee50,
4924 0x0fc85d50, 0x923c37a7, 0xf3d21330, 0x0065bf20, 0x0346e947, 0xf8d9cf95,
4925 0x159f9528, 0x42fa5d72, 0x97d47f7c, 0x4eaff787, 0xf9ce3a40, 0x486989ea,
4926 0x6b46ed97, 0x9690c1ff, 0x631c536d, 0x6f3df002, 0xbf269873, 0xe0e6c75d,
4927 0x995d243c, 0x47af6ee2, 0xa6d53f13, 0x1f7176fb, 0x04dfd69f, 0xa0aa72ff,
4928 0x3029c4e3, 0x57a18aef, 0x77dfafc8, 0xc9ec9c20, 0xf92a919b, 0xffc1be8f,
4929 0x20db9def, 0xde95fb9f, 0xa09dbe41, 0x674158f3, 0xb7a45cb0, 0x9f3ccc4b,
4930 0xfc9ebafb, 0x4a8b5ccf, 0x91f686f8, 0x7bfea163, 0xf40fbda2, 0x5321ca2c,
4931 0x848dd7b3, 0x0da36376, 0xf7d0ed0c, 0x19f2f37c, 0xdb3bc9d8, 0x025bc7f4,
4932 0xd59a33e6, 0x387f41f6, 0xca821987, 0xcf2c7a9d, 0xc7cb6b35, 0x2cfbb8f6,
4933 0xad630ffa, 0x77c972da, 0xfab4d88f, 0x7381df62, 0xf3009b3f, 0x92a4392b,
4934 0x7d237cff, 0xafc22efc, 0x5dbf3a47, 0x3bbe0db8, 0xf872b02c, 0x4915e9da,
4935 0x142357c8, 0xd3acf186, 0xe3cb42d7, 0x665ea41f, 0x7e3edf40, 0xe63816fa,
4936 0xdc51e7b6, 0xa0b119ef, 0xdff08f3d, 0x7afb1ebc, 0x8d9b753d, 0xed8233c7,
4937 0xfcdcb046, 0xfe46ecb7, 0x3dd2b7e0, 0x837f4a16, 0x5ced85e9, 0x89eb06ef,
4938 0xe1213b60, 0xbcb7860a, 0x0fb1a74d, 0x191ea15f, 0x8c27681a, 0xc3be2764,
4939 0x6d8370f5, 0x30f5c768, 0x2f8431f8, 0xad3d30cf, 0x6adfc1c3, 0x220376c4,
4940 0x0039b1ed, 0xb76b0ad2, 0x167fb208, 0x405b7ef7, 0xb6ffaa1c, 0x8dea1d5a,
4941 0x418cf8f6, 0xeb91a71b, 0x9d8477d5, 0x1cfa13a8, 0xceb4abd6, 0x4eee18df,
4942 0xc9b8e3d4, 0x8c96c746, 0x48f9f88e, 0xcfccefb4, 0xbeac7e95, 0x8fb1fb86,
4943 0x389a5d58, 0xa893eb19, 0x5fa2fb89, 0xd9edf28e, 0xfcf34e1b, 0x420d7154,
4944 0xe733d439, 0xf4016ddf, 0xf87036a9, 0x8f89e183, 0x319276e5, 0xb207f917,
4945 0xd0e8f67c, 0xd5895c7a, 0x679cfb53, 0xff474fef, 0x07c6d3ed, 0x7ebf51d2,
4946 0xede7141a, 0x169e1e4c, 0xb0a4faf2, 0x2e223123, 0x11ca14f0, 0x9dda41e4,
4947 0x55fbe1db, 0x57245d4b, 0x9d3a5d3f, 0x2e9667d2, 0xb613faa1, 0x9adf1a0c,
4948 0x775767f3, 0x35c9d3c0, 0xd989d92a, 0x18af5746, 0x59a4eef8, 0x1385f147,
4949 0xbb799155, 0xd19cb122, 0xb3f6727a, 0x0278b613, 0x6c277ee2, 0x6743a27a,
4950 0xfd8f8cf3, 0x9cbdfa66, 0xbda144b5, 0x23d7e76a, 0x2db5ec1d, 0xac7fe316,
4951 0x55db0125, 0xb6bdcd2a, 0xb7c71d29, 0x2c7c6732, 0xf59197f2, 0x0ba9b947,
4952 0xb828f6e7, 0xe72c4a5d, 0x1fa1bfc3, 0x8a7efd0b, 0x9e842b76, 0x2f3a0bb1,
4953 0xb1ed38b4, 0xc922efa4, 0x81b8275f, 0x728cbe5f, 0x60b84776, 0xd313d65d,
4954 0x7c785d61, 0x2ac5b16e, 0xf0a9c3f8, 0x5fab8e75, 0x5bf8886c, 0x609ef167,
4955 0x7811de38, 0xc9038e0d, 0x8681c654, 0xbcf9f2c6, 0xe26ab36d, 0x0eff1842,
4956 0x79f9ff15, 0x1ba3d72c, 0x2a3c5bc3, 0x7c03c3ca, 0xdb25de3d, 0x2b7c60a3,
4957 0x0736bf25, 0xc5775fe3, 0x2da5b8f2, 0xeb889dcf, 0xa344e4f6, 0x3736e303,
4958 0xea038f2b, 0xc05f7c9c, 0xd63823ad, 0x7ac27b37, 0xcd095c01, 0xa4231cee,
4959 0x0d317153, 0xaac2edf8, 0xa0dd2196, 0x6b23211d, 0x9157b87f, 0x92686c8b,
4960 0x4028f429, 0x6772861a, 0x454f728c, 0x559b0cba, 0xfa718d55, 0xffbe3294,
4961 0x77715670, 0x9c9f01b5, 0xa43c2b7d, 0xe8225c3f, 0xc9d194cf, 0x36b3fa68,
4962 0xacae081b, 0x819f3fcd, 0xf9b59f7c, 0xa012bd2e, 0x1ac79687, 0xdf67fe68,
4963 0xe295d79a, 0x58989f16, 0xea7a10cf, 0x1e5f8287, 0x69d87410, 0x8b7fcd0c,
4964 0xac6fbb45, 0x55405bcf, 0xe2f9f569, 0x5b3880d8, 0xd265f945, 0xed6393e7,
4965 0xfaf3ce34, 0x80c903ba, 0x3167e7cf, 0xe68a0787, 0xf148dd6d, 0xbac69dd7,
4966 0xe4efb8f1, 0xa431d0a9, 0x7f03fefb, 0x7e8c9038, 0x60fb2ce4, 0xbfda23f4,
4967 0x4ad2f43f, 0x0e7e7f2c, 0x4ff88c1b, 0x60ad3ef2, 0x619fe63c, 0x7faf84b5,
4968 0x65b1316e, 0xbf7db718, 0x210ffc6e, 0xc74cbebf, 0xcf04bf50, 0xe832461b,
4969 0x19f53112, 0xfd382374, 0xba4a0f51, 0x91190303, 0x886e921e, 0xee90edbf,
4970 0xc11af2df, 0x2a9ae12f, 0xb6f3dee2, 0x7c8f1f6e, 0x53665c92, 0xe1204e30,
4971 0x793d91ba, 0xd9dbf631, 0x0ed0ef93, 0x221b12bf, 0x0ec21d2e, 0x610d88ef,
4972 0x2fed8387, 0x637738b3, 0xe1d91bbb, 0x36ff82e1, 0x7fed06c6, 0x08597ee0,
4973 0xed8d0dba, 0x1fdf0f10, 0xe3ff621b, 0xdef0f146, 0x43ff72b1, 0xc97f0f1b,
4974 0xad6ff5c8, 0x293c3d8d, 0x1374bc84, 0xb5d6ebe3, 0xc67ed11a, 0xf5212835,
4975 0x518b62d9, 0x1c7e1fee, 0x125fb01b, 0xe0438fac, 0xefb628f7, 0x17b7cdbb,
4976 0xe9890d5b, 0x5bee8111, 0xdeb0ebbf, 0x29ce310d, 0x22fb3f81, 0xf6a6fb46,
4977 0x0afa462a, 0x141e5ef2, 0x371429f4, 0x934f38b0, 0xbec1badd, 0x1cd69dd5,
4978 0x3ee483f2, 0xd6ab54d5, 0x938b8c4f, 0x239f9ced, 0xd89d699c, 0x3c097f89,
4979 0x70dbfcc1, 0x4c45b8dc, 0xf7231fb3, 0x3caae261, 0xcd0b318a, 0x6af8a311,
4980 0x32f758d7, 0x1d6bb403, 0x209b1cc9, 0xcd685d1f, 0x9b6a7d41, 0xfdc468e3,
4981 0x7917959a, 0x02e57e3c, 0xfd4e5de6, 0x7732f9f0, 0x17ca2f37, 0x2e302dd2,
4982 0xe1c71110, 0x72e38888, 0x1cd27606, 0x8f0ae1c7, 0x9293b00b, 0x3e75ba1e,
4983 0x1adae895, 0xd0054eda, 0x77df46d5, 0x50efd742, 0x3771ed2e, 0x8cf71fe7,
4984 0x19be05bb, 0x7c737718, 0x4b4c14f3, 0x8f04dfec, 0x0ff38997, 0x2cf80f1e,
4985 0xf826ee2b, 0xee2deaec, 0x50881e8f, 0xa5dc5dbe, 0xc4275e23, 0x6b77d085,
4986 0x487d75f2, 0x4770b35f, 0x233abb28, 0x7dbff22e, 0xa086645e, 0x179d2df7,
4987 0x2d27f179, 0xdcb3a446, 0x06f090f7, 0xe591139f, 0x264a0d15, 0xf6733fae,
4988 0xc075a35d, 0xd37fc6a5, 0x79e3a03a, 0x42ee3e0f, 0x678003e4, 0xcea03aac,
4989 0x7977f207, 0xea56919b, 0x22ffb32a, 0x4df6e31b, 0x53b5e606, 0xefb6337b,
4990 0x7efb78c7, 0x633656db, 0xd31faadc, 0x547ac47b, 0xa8fdceb9, 0x7ee39468,
4991 0x8d5b2a4d, 0xbebcadf9, 0x6197998a, 0x847a3a5c, 0xf003d98e, 0x670ce319,
4992 0xc67c00f6, 0x7934d9e6, 0x2f9e4eb9, 0x25778dc6, 0x32efbe6b, 0x7da69bbd,
4993 0xa69fbb92, 0x10ce653e, 0x6aad3e4d, 0x577da694, 0xf981cfb0, 0x9addcf0c,
4994 0x266bddf6, 0x6b3df26b, 0x3fb4d01f, 0xcd9eaacd, 0x9c7a79c6, 0xce003dcd,
4995 0xdece0259, 0xdf358beb, 0x0dd5d7f5, 0xf920a1f3, 0xffee1f14, 0x326c16cd,
4996 0xfa73c44b, 0xfa69e77a, 0x5e6aff3d, 0x9df80293, 0x19386b5d, 0x7c219f18,
4997 0xea4b7e00, 0x8c1cf615, 0x5b5eba5b, 0xe9e1a73f, 0xce902995, 0xe7cb6af5,
4998 0x829cbee1, 0xdf2dadfc, 0x823d73ad, 0x71ed9deb, 0xe228ce22, 0x7f03ac3d,
4999 0x97b8d244, 0x9778f037, 0xc41de9ea, 0xb13a5a1f, 0x762fc96f, 0x44a62fc1,
5000 0xd984bf2d, 0x7a52fcb5, 0x1f30e770, 0x88ff88eb, 0xe47c413e, 0x78017f81,
5001 0xf895f897, 0x7cb438b7, 0x9de15df5, 0xdb91af31, 0x3ff96d0d, 0xb5f1b4e2,
5002 0xe3ee917e, 0xd4aeb7a8, 0xbf71522f, 0x7df1e58d, 0x57f52bfb, 0x6bb21d07,
5003 0xdb3ad7f6, 0x17173a4f, 0xfb175718, 0x3f709749, 0x137636f1, 0xfefb89fb,
5004 0xd900f885, 0x1f801b77, 0xb98708d8, 0xcc30ff7d, 0xac147fbf, 0x760a6537,
5005 0xb238cbe3, 0xd77dfe27, 0x587af86a, 0x085c5ff4, 0x9387dcaf, 0xf9e472e7,
5006 0xe7c91621, 0x3c01fb29, 0xf143f1a8, 0x022d9ffc, 0xf7dbadd7, 0x96f5a42f,
5007 0xc4c43f3c, 0x7e10bfb9, 0x3aefe93f, 0xfc8935fc, 0x6e78f081, 0x6d3123cf,
5008 0xf9c407f7, 0x3bcf692e, 0xb7ee47eb, 0x7b2a9675, 0x6c3fda55, 0x9b1dc255,
5009 0x5e93d842, 0xfd72dff1, 0x1c43a675, 0xe07c57ba, 0x2bd1ebfa, 0x00aed007,
5010 0xb962fbde, 0x5af602c5, 0x5febdbf1, 0xbf114444, 0xbd541eb6, 0xb2e0a1bd,
5011 0x036d1ed9, 0x6984363c, 0xab4c88ed, 0xf403c9cc, 0x3daf58b1, 0x11f727e7,
5012 0x6367db83, 0x27fd80fb, 0x8fe34ef8, 0xfdc21cac, 0x6e78ecb5, 0xe488bfdf,
5013 0x9114c1fe, 0x175a0caf, 0xbf70d655, 0xe9f8236c, 0x4cfd010d, 0xfb50b789,
5014 0x533911a5, 0xc08e29e2, 0x332bbbd7, 0x5627f214, 0x21f90a2a, 0x5347a267,
5015 0x9cb8b5fd, 0x623fc4c9, 0xbbe8299c, 0x6edaffc1, 0x38bb1e1c, 0x37fb238f,
5016 0xe6f6f3c7, 0x4e94d1f8, 0xb88ab789, 0xf21fb5b3, 0x93846547, 0xa1aa35fa,
5017 0xc7a6a5f7, 0xb5ad79f3, 0x6a27e930, 0x84e3fee2, 0xbf38c4de, 0xf9a3fb89,
5018 0x71fc1363, 0x7f66a67e, 0xf1138c68, 0x773e857d, 0x53ba9ea2, 0x78b3bdd0,
5019 0x758fb3bf, 0x75276e3f, 0x12fbf78c, 0x1dfbc643, 0x0fde28e3, 0x5e71ea5f,
5020 0xa47f71c1, 0x2fcd8443, 0xb7c48f3f, 0xd45483db, 0x7746f54f, 0x5abbae35,
5021 0x0eff8377, 0x2dbc7dc5, 0xf0301fb4, 0xae077750, 0xb06656af, 0xb7e416bd,
5022 0x7fa18c65, 0x5ba2df5f, 0x6bf5061e, 0xf58acc3c, 0x75f03723, 0xbb7ae95b,
5023 0x8069a703, 0x8865b075, 0x8bac1f5f, 0xd7bc218f, 0xc46e4cb7, 0xf73581fd,
5024 0xa19a1b32, 0x1b9b565a, 0x06d0fe85, 0xf8dd7216, 0x09b39094, 0xd4557b39,
5025 0xdfe8f117, 0x53d3a087, 0x0fa04e82, 0x879d22d6, 0xf0afbab7, 0x4fae38fd,
5026 0xfae22548, 0x1bcebf74, 0x373f3d6a, 0xf21d773a, 0xe86f40c1, 0x0b5ac3f5,
5027 0x1175b7e7, 0xdda8e7ae, 0xb5ee7e2e, 0x59dfea54, 0xba07a63a, 0x9d74114f,
5028 0xdf9f81b2, 0x5faed760, 0xc89fa557, 0x7a867fa8, 0x8b5ef4a5, 0xa543e317,
5029 0x821e190d, 0x7a38a5cb, 0x7868bea2, 0xd2f985df, 0xc62b2cac, 0x657f9c23,
5030 0xe43ea9ca, 0xbfae3262, 0xd494ecf4, 0xe3c76427, 0xb269df68, 0x16b5b7e0,
5031 0x0d473f3b, 0xfc008e28, 0xb6586e97, 0x7cefcf17, 0xfb466bf4, 0xd6d4474b,
5032 0x54d9d861, 0x2192ce40, 0x2159ea98, 0xfef82bc5, 0x1fa2bdd5, 0x5c61bfcf,
5033 0xa9dc7fb3, 0x3e69070d, 0x63cc0c47, 0xb4ba3e06, 0xfa3b3ee7, 0xcde32bdb,
5034 0xfb93c714, 0xf75547b2, 0xf48464e3, 0xda0815ad, 0x56110dfd, 0x43fc7f8c,
5035 0x82465df0, 0xc7d21f7b, 0x057c7cbd, 0x6596c1da, 0xa3c474a6, 0x1a92797b,
5036 0xd7ba7007, 0xd1ef342a, 0x788c93cb, 0x8ae6617e, 0x4f50e3c1, 0x95ce610d,
5037 0x2879df18, 0xd3948596, 0x9d7cf1f3, 0x60655c58, 0x849a68c6, 0x172fe311,
5038 0xbf8a146b, 0x015bfee0, 0x988e67d0, 0xf7aaf95f, 0xec3f88a3, 0x1e186ff0,
5039 0x733fe5cb, 0x1e494aaa, 0xe46bcec1, 0x19d58ca7, 0x799fa093, 0xdb39606b,
5040 0xf1fdec8d, 0xc043fe0e, 0x3af2ef79, 0x5b257d6d, 0x7f9d39f3, 0x5befe061,
5041 0xeb682ed0, 0xe8f2953f, 0xaba40e60, 0x8cc5b17b, 0x0b4684e7, 0x51ad14bc,
5042 0x665fa8ac, 0xbf8c68ae, 0x9b33f20f, 0xb4f20754, 0xe8eb0bc4, 0x8f39d3ef,
5043 0x693d4dcb, 0x6ed9703d, 0xdced82ef, 0x2bff5c51, 0x2c70f77a, 0x3dd6287f,
5044 0xadf1d71c, 0x9e18589f, 0x06d6399b, 0x1ec618fe, 0xc5106ccd, 0xd06cac1f,
5045 0x5a3b00a4, 0x6026b064, 0x16c3dfbc, 0xb7be3226, 0x779c0e65, 0xf90d79a5,
5046 0x07e89581, 0x1f91f9f2, 0x672c50f8, 0x15d7d6d5, 0xeac39f3a, 0x9a07e40d,
5047 0xd6781f85, 0xae009b5e, 0x6e3d7317, 0xde2d3920, 0x687e4316, 0x235c8af1,
5048 0xaef16ff2, 0xe043d218, 0x63d87e07, 0xc78e9f98, 0x481e6456, 0xeb8b7e84,
5049 0x96aa1c32, 0xb8ff5a7e, 0x5ba498e6, 0x4b4fbf47, 0xe8a193b7, 0x94d2f406,
5050 0xff0824a7, 0x3d8bd04e, 0x477e4b16, 0x7ab782e1, 0xcb9e019a, 0xee746155,
5051 0x83ff33a8, 0xbed1c6a5, 0xe6175c9e, 0xdfafb725, 0xcafcdf68, 0xb744a19a,
5052 0xfde57a60, 0xb470e667, 0x16afec27, 0xa1ec7a86, 0xc9e1ecee, 0xc2b0fe50,
5053 0xeaa1ebe5, 0xa72879f1, 0x6f5c0959, 0x6614b7be, 0xfdec6468, 0xece666a5,
5054 0x4b07d8c5, 0x68ff94ad, 0x3fe52269, 0xf4a76a5e, 0x287da593, 0x68e2293d,
5055 0x0180ce52, 0x25475f88, 0x951af970, 0x6cdee220, 0x8caa2251, 0x307cffbc,
5056 0xa1c56754, 0x4d8c27d2, 0x271eec63, 0xdfc02320, 0x046f7e99, 0xdf3db912,
5057 0x4b8eb062, 0x9571ff44, 0xd8befa42, 0x3da6bb75, 0x3c4625f8, 0x64facdff,
5058 0x9ce9cbfa, 0x1938dd98, 0xfcfef0f8, 0x69fb4d58, 0xfc9a2935, 0xcd3b04e4,
5059 0x775e527b, 0x8503f94d, 0xa2f935fd, 0x9e024036, 0xf8db302f, 0xb7d8aafe,
5060 0xd7c6cc67, 0xf6de56eb, 0x2ef0d56a, 0xaf7807df, 0x7d50321e, 0x5d243d30,
5061 0x31d7ad67, 0x73368037, 0xfa0dcc3d, 0x933b593d, 0x11fceae4, 0x95fdd90b,
5062 0x1ddf32db, 0xdb63f901, 0x7ebfb40c, 0x5aec456c, 0xb63e3fdc, 0x418a3e2d,
5063 0x32a95eea, 0x7ac1fa1f, 0xe80591ab, 0xcb15dcb7, 0x9156fce8, 0xf940e4d7,
5064 0xf9efda2f, 0xd1dbcc95, 0x5120441f, 0xbd543e3e, 0xe7e8853e, 0x14befc24,
5065 0xf902dde6, 0xf1afa033, 0x16ccf8c8, 0x8519d70e, 0xd9fcc0ad, 0xfaf5bfb0,
5066 0xb171c03e, 0x8744b6a0, 0x50f501eb, 0x1dcbe93c, 0x2dbe432a, 0xfda0605c,
5067 0xa91fb9bb, 0x94cf311b, 0xde9c2921, 0x64479d2a, 0x7fa8992f, 0x021c0ad6,
5068 0xd6fd16ed, 0x77d689b4, 0x0f77e44c, 0xfc16aef4, 0x26747c89, 0x08633986,
5069 0x3de08558, 0x46fc7ef7, 0xd3e3f7ac, 0xfde7083b, 0x32b5dea5, 0x5cebf801,
5070 0xe9107789, 0x49e2c7b5, 0x7ef182ae, 0x96f5c8d2, 0xf140e507, 0x9cbf4beb,
5071 0x9d3e272d, 0x38247069, 0x25655f48, 0xb93abea1, 0x98e740c6, 0x3519de99,
5072 0x3b3fd689, 0x38e58f88, 0x71f6f527, 0x9ac9df08, 0x96fb860c, 0xf2546bc5,
5073 0x78ff9007, 0xffe72f7b, 0x1b3755a7, 0x28d6fd0e, 0x23a5d66e, 0x60b23cdf,
5074 0x9a639d38, 0xc141d621, 0x9033e07a, 0x7f2f7755, 0x7e1ede7e, 0xb56586ce,
5075 0x181defe8, 0x7c158f38, 0xbfde44bc, 0xd650073c, 0xd1474fed, 0xd4dcbee5,
5076 0xf0ed1a3d, 0xe2550fd9, 0x6addb3b3, 0x3d022587, 0x0ef6e82f, 0xcfe43efb,
5077 0xe94e7817, 0xb854ff21, 0xae02677b, 0xd26b7457, 0x3e786e95, 0xdbdac4f6,
5078 0xaf73bbe1, 0xe6241c18, 0x7f49e24b, 0x6e697bcc, 0x8ef3c0d7, 0x2f97f51d,
5079 0x38bfef99, 0xe7c01493, 0x38dd7b7c, 0x775c00eb, 0xe21d84bb, 0xe6e3b1f8,
5080 0xbac5e02a, 0xc343c14e, 0xcb50c4ec, 0x3d773c6a, 0x3024c413, 0xec42784e,
5081 0x7a101f8f, 0x1109fa45, 0xa67e785d, 0x7b37f38e, 0x0dbf2155, 0xbffa347e,
5082 0x944f9c52, 0xebea5f7a, 0xfb4b5632, 0xf81247c1, 0x8ab9c639, 0xe055da97,
5083 0xa8a82ece, 0x420f2b12, 0x79356d97, 0x97d419bd, 0x480fd035, 0xfbe762ee,
5084 0x9e57c643, 0x652db645, 0x417e7ccd, 0xbc19ceed, 0x1d19cd25, 0x75894ded,
5085 0xf51b0ae3, 0xfc60706f, 0x69c854a4, 0xf5e2ad79, 0xdd9079f1, 0xd98af194,
5086 0xdb066ec2, 0x28f60ea7, 0x0ecd0ec8, 0x56acb3b2, 0xde01576b, 0xc2471c48,
5087 0x2ba70c1b, 0x987842c2, 0xbda17007, 0x0f7b712d, 0x15b8244c, 0x03b25007,
5088 0x35cca53c, 0x01e70626, 0x477b3ef5, 0xd5e782f8, 0xcf315e01, 0x1c4bb860,
5089 0xff70fb9f, 0x5187cf18, 0x1e6829bc, 0xfec11e92, 0x894ba49a, 0xa4b7e387,
5090 0x7e7a2141, 0x3207eeda, 0x7e491b8a, 0x9d500581, 0x44d77bf6, 0xeba567d4,
5091 0xf866ff40, 0xd3f247f9, 0x8517563c, 0x7cc152fc, 0xbe50932b, 0x46d3757c,
5092 0xe1bedfa2, 0x49ca237d, 0x53d7cda1, 0x5c288317, 0xb4bcd3fb, 0x1044f580,
5093 0xd7446f9e, 0x9c378a6f, 0xbdc65e95, 0x37b34f00, 0x41b0ceab, 0x1ce2769a,
5094 0x60e48791, 0xc463c78e, 0xb11cc6f8, 0x9c11bfee, 0x6e7e7a95, 0x76f086fc,
5095 0x5b7d27e2, 0x68baf3b8, 0x9fbf62fd, 0x943a33d5, 0xaff76a9e, 0xdffaec82,
5096 0x217e3c0c, 0xbd55f1f5, 0x5025e293, 0x2aaefc2e, 0x079b8f2b, 0x2cb4f1e9,
5097 0xc225e3d2, 0x4e71cbae, 0xf149dfad, 0xf768d9b7, 0x5d3fca03, 0xfee293b7,
5098 0x476657c6, 0x6a7dffa1, 0x78b5ccfd, 0xb6d4ebbe, 0x4be76499, 0xde76939f,
5099 0x1ff40c6d, 0xbd17d772, 0xdfe463f8, 0x9f1461ad, 0x16efd92f, 0xabd01eeb,
5100 0x9ebeced0, 0x8eb651eb, 0xb452d5eb, 0x1ec80387, 0x8b76c6f6, 0x51bddc4b,
5101 0xc9ca020e, 0xe99e2e4e, 0xe81eddfe, 0x11cbf177, 0xc2a10f0e, 0xdf91d3ea,
5102 0x3da1f56e, 0xf1f85f2c, 0x0ee73c51, 0x1fa3fff6, 0xd90ffb48, 0x92f77a8d,
5103 0xc26f282e, 0x1bab97ee, 0x27e8add3, 0x5ff13b08, 0x3439bfc0, 0xfe1087fe,
5104 0x01ff118b, 0x6bc720fb, 0x06679e38, 0x1ac4ffe1, 0xdb95974e, 0xfae147ba,
5105 0x774d78f1, 0x6f8eb3f2, 0x9ff849eb, 0xcff01ab5, 0x3f5a5fe3, 0x8ff006ab,
5106 0x3fc408eb, 0xdfbc5bc0, 0xe0eff02e, 0x78e1aff8, 0x3a786b67, 0x3d9e03ab,
5107 0xf1618e74, 0xf40e4daf, 0xf984ce1b, 0xb33a9fc8, 0x01d5655d, 0x83f4987e,
5108 0xbfb560be, 0xe24d7f42, 0xe6af6e7f, 0x0a7fa841, 0x1453fe9f, 0x76ee61d2,
5109 0x80efa41e, 0x82ece67f, 0xfc7fb8fe, 0x95e9bf76, 0x7e01f12e, 0xa9d24dd3,
5110 0xd918b982, 0x1d3f86c5, 0xe28375c1, 0x786d4f84, 0xd7dc468f, 0xd7ded7a8,
5111 0x851933c0, 0x382f8c36, 0x278466cc, 0x8a1ef835, 0xf91c619b, 0x9f3f3d9f,
5112 0xbce490b1, 0x6dbe7355, 0xba19f322, 0xa758ffa0, 0xf2c6fdd0, 0x39513945,
5113 0x55d4e30c, 0x2ee9c704, 0x78fce68a, 0xff23aab9, 0xfdc8ccb1, 0xf93fb948,
5114 0xde0ff0ae, 0x25d7c2ed, 0xd2b175ef, 0x18c29777, 0x164b81d9, 0x23ef17a3,
5115 0x112a7ac0, 0x31ecf7c7, 0x228edd11, 0xd57f804c, 0x6036e228, 0x1f4f9102,
5116 0x1f4f9c64, 0x38a26c8c, 0x5e54ac39, 0xd0f8bb40, 0xfc839312, 0x8a68b8da,
5117 0xf4203ed7, 0x2b9183dd, 0x1e1f685d, 0x313a348a, 0x783d7e85, 0x1a30ce88,
5118 0x0df18786, 0xafba46c9, 0x796e6853, 0x0fbe9705, 0xd4789e27, 0x06dea00c,
5119 0x55c637ee, 0xd75dd7e0, 0xc5d23b63, 0x9c6d1f4f, 0x743c32a7, 0xe055a3dc,
5120 0x293a714b, 0xbe82639e, 0x2b8e01c3, 0xdcb12f68, 0x9df1e56e, 0x8b27400d,
5121 0xe5c1be9f, 0x03f7c3cc, 0xe35cf0ca, 0x6419c628, 0x935fe104, 0xfaf2332f,
5122 0x26afc4f0, 0xec66cbac, 0x103ecccf, 0x3a8656e9, 0x45f7d704, 0x978c5ed1,
5123 0x25f183df, 0xe27aa61b, 0xe67ac997, 0x26b4f1d1, 0x89cccf12, 0x8144d378,
5124 0x9823a9cf, 0xeef01a2f, 0x778da83b, 0xf9d3e7dd, 0xef7e037a, 0x911afbd1,
5125 0xbb66753f, 0xb8e30ac1, 0xb82194f2, 0x7e5b292e, 0x25a6f073, 0xa5d7f39a,
5126 0xcfc75e42, 0x80feb585, 0x041e21c7, 0xcdbc4561, 0xeafdb3d0, 0x8807ce10,
5127 0xdd9b4a97, 0x2816ed43, 0x71950f14, 0xc1ff4936, 0x1d207dd0, 0x41f0141f,
5128 0xf851353f, 0xbd3431bd, 0xf5ca26fa, 0xabad1d73, 0x9bb90be7, 0x9b6de52f,
5129 0x27c6de56, 0x82bda9da, 0xede0307e, 0x26769141, 0xff44e317, 0x5cb912e3,
5130 0x78e2dd64, 0x9d35b22c, 0x7908b7ce, 0xfef13729, 0x88f7f8e5, 0x8da24c74,
5131 0x00f095fa, 0x7ec71ebf, 0x9001a074, 0x56d64f5f, 0x87347f93, 0x33b5c405,
5132 0x5f24edfc, 0xebb7cc77, 0x4c75dd11, 0x10b3ad8d, 0xc2f7caf5, 0x1f47a81c,
5133 0xacf5d634, 0x4ed8ec8a, 0xb214dbee, 0x3d230366, 0xc261e229, 0x23558cfe,
5134 0xa1407ce9, 0x5e0fefc2, 0x7478b1ca, 0x31a718d1, 0x630b6910, 0xf13f3a14,
5135 0xf27fb137, 0x89e2f450, 0x5185d728, 0x33a63d46, 0xfbf52b58, 0xe8b76b77,
5136 0x33de18fb, 0x0e763156, 0x77c88f03, 0xa8d5b8c2, 0x8d7e7877, 0x4aa29b33,
5137 0x21c77f22, 0xdee1e027, 0xca7f406b, 0x09df2f7f, 0x4b7a5ffd, 0xe93bb3d4,
5138 0x0b8f4bfb, 0xf2e4f63e, 0x7d65cffc, 0x92afcf1e, 0xff3cf9f5, 0xe45feca4,
5139 0x5faa0e9f, 0x4bff5416, 0x3ebc5f9e, 0x7e83df3f, 0xd2ce68eb, 0xd214a385,
5140 0xbe847b53, 0x23ee5c28, 0xf6ea16fc, 0xf33474f2, 0xdc6eb2e9, 0x6ba2536e,
5141 0xd51fda0f, 0xf682d272, 0x2764d5f7, 0x704f9fe5, 0x75c44b2f, 0x63c524d4,
5142 0xa1fb7d44, 0xc4c1ec97, 0xed1fce4e, 0xf8e3c2e9, 0xbfa0929b, 0x05fb7ea1,
5143 0x8c4eacfd, 0x1c7ef5bf, 0x80ae1c49, 0x26f99e7e, 0x23a7fcf0, 0x49be1b3c,
5144 0xb592b33f, 0x487f48fd, 0x86be7549, 0xe32763f3, 0xe645e734, 0x8d11c4ff,
5145 0xe78627f1, 0xf3f50045, 0x67a5d797, 0x5ff3ff42, 0x04bd3d7d, 0xe76125fd,
5146 0xcc74da2b, 0xdb34f789, 0x1be7a518, 0x7de2313f, 0x8d5d8ab3, 0xaed071c6,
5147 0x00dcd212, 0x9c04cab8, 0x93f4e760, 0x8373ec03, 0x3d8c1bd0, 0x5f37f7cd,
5148 0x7a47ab3d, 0x9dd5d7ce, 0xf6ed0e7a, 0x3ee42528, 0xddf166cd, 0x17ce4ed1,
5149 0xe87a15ef, 0x11b39a6a, 0x8c6bf9e7, 0xb73e4021, 0x60fb93ba, 0x855f1c49,
5150 0x1ccdeec2, 0x01db3166, 0xe43f43cf, 0x1b2554fb, 0x3c608632, 0xd184cdf8,
5151 0x6d7e24ef, 0xc795b53c, 0x3c781b53, 0xbcd6d0b5, 0x33379408, 0x31ad9526,
5152 0x84d8c1df, 0x0339485f, 0xf36f8591, 0x9d5f324c, 0xc79b263f, 0x767f30bb,
5153 0x506b63fd, 0xb9c29a6e, 0xf0d0fb1f, 0x17a8e181, 0x7422325a, 0x37e79056,
5154 0x498c8be3, 0x8efcb143, 0x639e5871, 0x222af4b2, 0x8be232fc, 0xc75de337,
5155 0x3db05f90, 0x46dc41c6, 0x307dfc5f, 0x2adbf70f, 0x0f75a79d, 0xda87708a,
5156 0xc087fa77, 0x4ac931ab, 0x19901369, 0x870917fd, 0xf9fc1f1c, 0xdfd0cd45,
5157 0x8349e5c9, 0x9f71db57, 0x3490c725, 0x467e3fd4, 0xe072fb82, 0xac7527f8,
5158 0x6e292e17, 0x024b8e16, 0x5dee030e, 0xd95dbe03, 0xac06732a, 0x898f26f3,
5159 0xcdefe4d0, 0xc0ce658f, 0x29bded38, 0xc2f4fc9a, 0x0ff69aee, 0xa9afeacc,
5160 0x6735302f, 0xb1f80555, 0x1e49fb9d, 0x62d2a782, 0xee7f4709, 0xfc5f0def,
5161 0xfff441e5, 0xf40eab36, 0xd9eee755, 0xa1db97f2, 0x4e3c65d5, 0x3b47f145,
5162 0xc9cecbc5, 0xa77a28f3, 0xe85f703e, 0xf3a66b22, 0x03ed9d3e, 0x7cee75c9,
5163 0x773a7eeb, 0x03ef5df6, 0xeb124af5, 0x086c21dd, 0x55cbc3da, 0xaebc511f,
5164 0xefcf9222, 0x8cc7ebe2, 0xfb8a0fb8, 0xdf81d78a, 0xd10fc2ef, 0x50f36c3f,
5165 0xfeb73b3c, 0x1d9bed18, 0xba7ae448, 0x1e817522, 0x42551def, 0x1c68768a,
5166 0xe068abe8, 0x3646e697, 0xbbee1770, 0x1fb85866, 0xb19936de, 0x1e2be458,
5167 0x884a69df, 0xf3d77ba1, 0xbca8f26b, 0xfa9c2da2, 0x1e6d4f7f, 0x5f09e747,
5168 0xa1ff6853, 0xe5a1e520, 0x29b87e78, 0x11e033dc, 0x77e0b718, 0xde21e577,
5169 0xf3f1762a, 0x9fea05b5, 0x5a4016b3, 0xdf479b56, 0x49aca817, 0x42617f01,
5170 0x05bfb72e, 0xaf21f368, 0x46acb30e, 0x7d1aabbb, 0x3d479ebd, 0x9e90b463,
5171 0x807b6e89, 0x336cafc6, 0x24f7f7d3, 0xd0d77f71, 0xdb1ae1c2, 0xc972a2e6,
5172 0xba93530f, 0x860fd669, 0x7c7acdf8, 0xc2d0c397, 0x6dddfda8, 0xf39528fd,
5173 0xafcfbb7d, 0x21ae3ee9, 0x14b8eafe, 0x71dbf798, 0x90dc958a, 0xa57c3d20,
5174 0x0b34786a, 0xc7daa7a1, 0xf4e7e369, 0xdcfc6d4c, 0x738a615e, 0x31c0127e,
5175 0x3d16b1f1, 0x48b107ee, 0x35f115b3, 0x7b60c471, 0xa97c8049, 0x2237ef7b,
5176 0xdeeb0c7d, 0x369da237, 0x501b9a41, 0x33ce2e5f, 0x05e9eb04, 0x2f4f5249,
5177 0x1dda54a3, 0xf9067576, 0x82ac33a9, 0xccfc8501, 0x7e54fa10, 0x1a6b4cdf,
5178 0x1e6ee3a0, 0xc5347fc7, 0x45f502bd, 0xbe9b0e73, 0x7366f483, 0x7cc3ee3a,
5179 0x9d03f057, 0x89f90acd, 0x751e742d, 0x0ebb08e2, 0x04abffe3, 0x6f8e525c,
5180 0xa2c58f34, 0x5b2a7bfd, 0x77befd82, 0x4ecd9de7, 0x47f1afe8, 0x0f689999,
5181 0x25cfb8e4, 0xcc297bf1, 0xd70d7ada, 0x446f9583, 0x0bde51d8, 0xfb863170,
5182 0xb44c7b9d, 0xda72814e, 0xc37ca8cf, 0x89ef09b4, 0x7ac14654, 0x7dcfc615,
5183 0x7c87cc33, 0x9866f8dc, 0xef46ed1e, 0x4873f774, 0x7b37dccf, 0xa1f5c18f,
5184 0x67a4c1b3, 0x9f38f7e4, 0x09db3d27, 0x5bd237bc, 0xe5267cc1, 0xe5c35dd3,
5185 0x69f048a5, 0xb73f90b1, 0x552ba390, 0xaf0e485d, 0xe340063c, 0xca63e93e,
5186 0x27e85dc0, 0x7ef42dd8, 0x02cb9493, 0x79410f5c, 0x3a18ff41, 0x8dfd2bff,
5187 0x6b2c3960, 0xe5bf52b3, 0xef21766d, 0xb94bca36, 0x6372162b, 0x2cc67e12,
5188 0x53bbe7c1, 0x5e20efdc, 0xee41aa0a, 0x3f1f68a3, 0xcfc9e50b, 0xf22b4637,
5189 0x624df017, 0x54fc8049, 0xd0cfde37, 0xb9c5313f, 0x41666f88, 0xcc9fe81a,
5190 0xac4ff76e, 0xfe0012e3, 0x74322b89, 0x9da9df78, 0xe6f9db7f, 0x8f7ff8e6,
5191 0x48e29790, 0x67f44f5f, 0x0e61550d, 0x397e873c, 0x2cf7ef8e, 0xb8f1c55c,
5192 0x45cae0d0, 0x2fe162ff, 0xa1978a15, 0x697a81df, 0x632a91d8, 0xfee51c60,
5193 0x0ecc41b6, 0xd6d29878, 0x1337d283, 0x0f1147dc, 0x04d36d45, 0xa37d06be,
5194 0x4ea1c5fd, 0x7832471e, 0x198d8e4d, 0xab724718, 0x6933e748, 0xe04cfacc,
5195 0x1d7ade7e, 0xbee4c3c5, 0x992b8ca3, 0x807cbcf0, 0x5f42fd1d, 0x37ef4e9b,
5196 0x7299c704, 0xb0bfddb8, 0xbf7640d9, 0xc3cff1ac, 0x2e7f5074, 0xed05d9c3,
5197 0x777a97c9, 0xbcf5f21b, 0x0d57dec9, 0xe4ff9f90, 0x7691a8ce, 0xf4eb3e3f,
5198 0x47689ebe, 0x188f00eb, 0xa35baaef, 0xbfb979e6, 0xc9f7c113, 0x7e4b7f38,
5199 0x79f3e60e, 0x9f88dd6d, 0xc89954ae, 0xbe015d0e, 0x48760165, 0xe7a91dda,
5200 0x7c91fda5, 0xfae7ae5d, 0xda323cab, 0xb408c9eb, 0x395c933b, 0xf87d77c8,
5201 0xddbf1a79, 0x1476b4d9, 0x38a5c1ca, 0xed28b73a, 0xbc1cb046, 0xd31c14b6,
5202 0x8eed1d5e, 0xcf52ebd4, 0xfa35bb4b, 0xfe772fe5, 0x8a55cd15, 0xe032407b,
5203 0xb73d6eeb, 0x2deb775f, 0xe3633fc4, 0x6f91e926, 0x1e8f5e6e, 0x98f47a13,
5204 0x74568f46, 0x27060762, 0x741c9adf, 0x4cf3ed15, 0x3d447fdc, 0xa3dfd81f,
5205 0xe0c7a329, 0x7327c63c, 0xc15dfb3b, 0x1ffe99dd, 0xfa6b7c9f, 0x88b2587f,
5206 0xff40ddf7, 0xfd732617, 0x99efac1f, 0x73a7bf95, 0x2f5f4f69, 0x0ca383da,
5207 0xc1da03ec, 0x16fb0886, 0x5ec80f61, 0xbf7b4784, 0x4d5c1ece, 0x7888599b,
5208 0x1e0f610a, 0xf616fe4a, 0x94a1f240, 0x5227291b, 0x48e5822e, 0x9f84c5ca,
5209 0xe9113ac2, 0x57bf1ef4, 0x6cf7ae50, 0x7b46fda3, 0xcf9460c4, 0x976e3f76,
5210 0xc1d6f242, 0xf1f9084e, 0x6ed68bcb, 0xf290b948, 0x5ca7e522, 0x20ecc5c8,
5211 0xd6a7d8b9, 0xf70a333d, 0x6bdd92cb, 0x72fde393, 0xd823b652, 0x57ca743e,
5212 0xb3645918, 0xf218aae3, 0x81a43955, 0x44ea657c, 0xbe499e1e, 0xd968bf35,
5213 0x6fd3f24d, 0xf4fcfbfe, 0xe9f84e9b, 0x3f0dbe7f, 0x3f63f475, 0x3c03b2ce,
5214 0xdf40b257, 0x6df9f866, 0xfb8c3bc2, 0x7af9dd0f, 0x0497d600, 0x8d319377,
5215 0xae133ee2, 0x2f8a2ab3, 0x7494be0a, 0x6cc0fe96, 0x93387711, 0xe1077ae2,
5216 0x82c0f5c5, 0x447bd39b, 0xb35c5367, 0xb327d711, 0x03f40d21, 0x9b7ff33a,
5217 0xbdef516f, 0x3e749371, 0xfb9dfc96, 0x4392c78d, 0xb1c78dfb, 0xb5d29bfc,
5218 0xf8899720, 0x300b8fde, 0x29e138de, 0x0acb6791, 0x46d38f10, 0x3c9ffac8,
5219 0xfa81ece9, 0x38b8c981, 0x53de39c5, 0xf4b3de45, 0x3f6818f0, 0x8fe619e1,
5220 0xd8fd439b, 0xb8f6e8ec, 0xedfcc288, 0x3b1fe795, 0x51e886bc, 0xddcce5cb,
5221 0x3ffbe7a2, 0x79059f22, 0x447e404b, 0x6f037e50, 0x616fa51f, 0x9045e781,
5222 0x9c21949f, 0xff00aece, 0x7fdf8601, 0x5585ed05, 0xa8d71861, 0xd6f8db8c,
5223 0xf56bd415, 0xb545ed0a, 0x14d581e3, 0xfbc55338, 0x735f94b9, 0xc23e09d8,
5224 0xbe78bb03, 0x93ed4a4f, 0x37e8bd1e, 0xa1bddce0, 0xb9d2714e, 0xb78a1183,
5225 0x7c47465b, 0xdad149f7, 0x6bd1fc27, 0x1e7867bf, 0x6fbe56ef, 0x8dd6cfbf,
5226 0x6e99f7be, 0xb2fbfc61, 0xfe7f9f43, 0xefe70a5e, 0x21d15931, 0xa8a5c7eb,
5227 0x37111fbc, 0x68a1f1a0, 0x7be85d4a, 0xb8c513b0, 0x425fb8cd, 0x24f6dcf8,
5228 0x28d9b7e2, 0x93f2fdf1, 0x196377c8, 0x60cfc4d3, 0x9fdfca7c, 0x8d4172f2,
5229 0x19d74f9e, 0x9bafaf84, 0xa91480ef, 0xf2f8fdbf, 0xf4cbd104, 0x8476f835,
5230 0xfb5db7c0, 0xe8ebefbd, 0xf7c3ac35, 0x48e76f82, 0xf86a763e, 0x22ef5a3d,
5231 0x538e8cfe, 0x5747e8ac, 0xe0d6c2b8, 0x9f2fc17a, 0x6cbe27bf, 0x1d03fb96,
5232 0x02b5efe4, 0x890abf94, 0x4febcf47, 0x74bafca2, 0x3cb9eded, 0x7335f3b6,
5233 0x52bc01f6, 0x7fbe0fc8, 0x27faf9e4, 0x7c092e31, 0xd794f541, 0x2c1dc007,
5234 0xf941758f, 0x15f920ec, 0x03fa47f2, 0xa9e001ed, 0xb8b7ea27, 0x007b4663,
5235 0xd04cfc9f, 0x27b8a2e9, 0xfb9a3cda, 0x78ddcd93, 0xfb8523ba, 0x7c09cf8f,
5236 0x9bed126e, 0x90f003c3, 0x1f1fe1aa, 0xe6025bae, 0x3fba784d, 0x93fbce4e,
5237 0x63d07c82, 0xbf5e36cd, 0x27a3e52d, 0x7cfed93d, 0xa6af7f70, 0x7880527c,
5238 0xf1fff7f1, 0xee23f461, 0x91db7817, 0x27b0e472, 0xc139d052, 0xf0214eff,
5239 0x5163bd07, 0x74a1fc8e, 0x761f8fe4, 0xd04f4fe4, 0x774ef4f7, 0x3a7bdf67,
5240 0xfa0cef7e, 0xea3de19e, 0xd05eff9b, 0xae883f2d, 0x1d744179, 0x942f9413,
5241 0xff46af79, 0x5c5cbd4a, 0x09e3f4ff, 0x54df1871, 0x9fbf38e8, 0xbd934f9f,
5242 0xfc956f99, 0xf230e67b, 0xcf9f9fab, 0xd7279e12, 0xce79ba09, 0x787a893d,
5243 0x51e1ea12, 0xd414fcfe, 0x5f3f9443, 0x7e61fb80, 0xea81757b, 0xed91abef,
5244 0x7afd922f, 0xefec8560, 0x3a4bca33, 0xb225cf32, 0xbd0bf777, 0xa4ad3cc3,
5245 0xf035e7f7, 0xfe7d3fef, 0x2b5fc3f3, 0x7841b50f, 0xf79410d9, 0x775fb504,
5246 0x22b6fb03, 0x82c7fbe8, 0xe504d7ea, 0x6be507d7, 0xcd17dfb4, 0x8b0e4852,
5247 0xc9fdf046, 0xe60cb960, 0xda522f8f, 0xf6ed63e3, 0xff24895c, 0x1357234e,
5248 0xfafe79aa, 0xa829fff3, 0xa7c80c89, 0xb21e89b0, 0xc05a30ef, 0xb9d041fd,
5249 0xc1f8151e, 0xbcde89d0, 0xecde99d8, 0x79ef6c13, 0xd7f03ffd, 0xd22fda24,
5250 0x54fb25f8, 0x9551be6d, 0xbbbd4770, 0x5f603228, 0xe2265995, 0xfdf3baba,
5251 0x6389889b, 0x22fc0352, 0x6744f84f, 0xfb653cc0, 0x575d5f71, 0xd4f8bc71,
5252 0x719b89f0, 0xd8b4687f, 0x14f1b4d7, 0xf68aa5ec, 0x6fc452ba, 0x5d39e1c6,
5253 0xebee176c, 0x0fd030b9, 0x70bd7562, 0x523f8d9e, 0xd550bbf9, 0x53c01f40,
5254 0x79d3b311, 0xea7899d3, 0x47d43bbe, 0x0df92f47, 0x47efb77c, 0xd3b412ea,
5255 0xd2c49747, 0xa945a639, 0x17dcefdc, 0x366135dd, 0x1e231be4, 0xf8db7d26,
5256 0xf74a58c4, 0xad95ceaa, 0x353ae856, 0x5f646279, 0x3c268fac, 0x4fc43639,
5257 0x9dfc065c, 0x38276a99, 0x426b36dc, 0xabdbfa3d, 0x085fb40d, 0xfc457e2d,
5258 0x3069a4f3, 0x968bb7ae, 0xb0fda7f5, 0x1a4f9fe2, 0x8ab0f787, 0x3ed0371f,
5259 0x4ace8b49, 0xeaf72271, 0x6a2e74b1, 0x7a910ad6, 0xcdf4a2ee, 0x1abafcff,
5260 0xbeb569ef, 0x0efbd0a0, 0x7bad5c77, 0x9b9e1067, 0xf74ee9ac, 0x7580de2e,
5261 0x3efb9e00, 0x17b7bebe, 0x089f21cf, 0xa473a2ab, 0x8bee9ed0, 0xbfb35e95,
5262 0xdb0b313b, 0xd0e5d6ab, 0xa39414fe, 0x956a7cff, 0x41ef09ba, 0xc2594515,
5263 0xa9f6fcf1, 0x75c518af, 0xa26e3d4e, 0x478e2277, 0x8fac67ba, 0xe8b8fba3,
5264 0x8a53b3e9, 0x3c014a3d, 0x67d0da4c, 0x96126262, 0xfb7d049b, 0x1e011544,
5265 0xfced748a, 0x24a4f643, 0xa527e786, 0x05b899f6, 0x97ea71e6, 0xd87ce9bd,
5266 0xe4e754c1, 0x2fd7c054, 0x52539cd2, 0x6e5e11e3, 0x0ffcdeb7, 0xe3fc8fdf,
5267 0xe404e285, 0x395287af, 0x56d1bf5f, 0xbef8109c, 0x3d45c977, 0x469bc1f1,
5268 0x277a22fb, 0xc14d3c30, 0x41f03675, 0x67cdc62c, 0xf00b7589, 0x219d92f3,
5269 0xa9e1abfc, 0xf1abd12a, 0x48d9f1a7, 0x0f5f3f5f, 0x19f5177f, 0x5f2037ad,
5270 0x2d7321b1, 0xa693b9da, 0x0f44ec25, 0x91fe7ed6, 0x3c230bed, 0x7985b619,
5271 0x7e3032c3, 0xfc871cea, 0x7aeb12cd, 0xc804b64d, 0x77ff68a1, 0xfbe73f0f,
5272 0xeb8f6877, 0xfe7bbfbe, 0x9fb812d7, 0x4697db21, 0x5ce83c59, 0xf458b69c,
5273 0xfaa38f48, 0x3cf0a7a5, 0x060bc95a, 0x2f2503b2, 0x8ad63fc4, 0x06f807fa,
5274 0xf3c16be3, 0x81aa63fa, 0x933a31c7, 0xad18cf4b, 0x1331b25c, 0xc99dbe71,
5275 0xdc86cd65, 0x3b239b89, 0x2b52cb97, 0x5ee34fd7, 0x9651efe0, 0x71e8b50e,
5276 0x0bf4737f, 0x7ba16d6f, 0x86c20b74, 0xd289bde0, 0xaf444c17, 0x63c58b16,
5277 0x13ef0dbd, 0x9031f458, 0xedca9b3e, 0x9f90bd69, 0xcde9955c, 0x7ba52843,
5278 0xf0df7212, 0x9e6792ec, 0xe797e3c5, 0x70da7798, 0x2765dfc0, 0xbbcbd3e7,
5279 0x063f8a54, 0x1f9623ef, 0x61cc69dc, 0x788fb137, 0x32c3fd83, 0xdfde22d6,
5280 0xf07dfd0d, 0xa9abe1fe, 0x0687fbc1, 0x2a5e4fba, 0x37730ff6, 0xe9770428,
5281 0x3fcf7e12, 0x8dc79637, 0xfa052e4f, 0x1ede691b, 0x0f3c10eb, 0x294eedcd,
5282 0xf866bc53, 0x0b0daef5, 0x13d98e28, 0x6e7184f1, 0x89e26ef1, 0xae3a4730,
5283 0x085e4bf3, 0xfe96fc23, 0x7e5fee6a, 0xfaf78599, 0xd702e20a, 0x2f91fbd5,
5284 0xde197e38, 0x9cfd941f, 0x7a63f65e, 0x45f731a7, 0x7cc31f58, 0xabd8634a,
5285 0xbd2067f7, 0x9f71d292, 0x5d2bb653, 0xbc5ea3fe, 0x61afac1d, 0x4ab45d1d,
5286 0xecc7efe5, 0x041d9136, 0x01644f59, 0xad672cf7, 0x72346838, 0x8712c63b,
5287 0xeedaff09, 0x1c769fbf, 0x6eeaf1ea, 0x2687b8a5, 0x51ef27f1, 0xfbf8e915,
5288 0x853a8574, 0x268157ee, 0x97497ba3, 0x7b5fb953, 0x679f953a, 0xd0774a28,
5289 0xb5f29cfd, 0x0cf2c726, 0x7dfb4fde, 0x95df584f, 0x684b9aeb, 0x26f7f33f,
5290 0xae54ab8a, 0x45867308, 0x3b17f3f1, 0x6af9d006, 0x51f011bd, 0xe2fae766,
5291 0xa56f98b2, 0x745dd27d, 0x8ecf419f, 0xdcbea1e8, 0x7963f5c2, 0x923de00c,
5292 0x186e8a33, 0xe8c767be, 0x9bf624dc, 0x7c602834, 0x3f439445, 0xbf7f28f6,
5293 0x83563a4d, 0xdf6c1b71, 0x31e21077, 0x8474da76, 0xe49515ef, 0x76b49019,
5294 0xaf7dfa04, 0xdeb899a8, 0x6fb55a2e, 0xf9dfea1c, 0x8de307db, 0xeaf45609,
5295 0xe63f6407, 0x88b7fa0b, 0x90c56773, 0x22b677c7, 0xb93cb8d2, 0x8a2f1e55,
5296 0xef345348, 0xf2fac910, 0xbf1e0655, 0x8a8f3d07, 0xc7d97ca5, 0xa5b96fd4,
5297 0x6ff50139, 0x30c36ef9, 0x6951d3d4, 0x978b2e5c, 0x011f65a5, 0x44362abe,
5298 0x6583bbd3, 0xe623029e, 0xca156acb, 0x4f8bbffb, 0xbf3d3e47, 0xe428b5e2,
5299 0xbe61139f, 0x5a97689e, 0xe8398417, 0xc795a1de, 0xe8afceeb, 0x6695f749,
5300 0xf82d9b59, 0x45acc19e, 0xbfa86ddd, 0x467d5a8f, 0x975a3fac, 0xd3bcc3a1,
5301 0xbcc6cd6a, 0xe51b7f53, 0x2df38bcf, 0xa57c83f4, 0x6d973a70, 0xbfc467db,
5302 0xcc44324f, 0x1f2be2f7, 0x4ff8c2f4, 0x2f737a79, 0x07c02bb4, 0xcf1052bd,
5303 0x9764292f, 0xf3f1b62b, 0x2a0f92ee, 0xee400f90, 0xa83e09e6, 0xf7daf5d8,
5304 0x902a1e51, 0xf23a43fe, 0x7ef3f011, 0x71b1df2a, 0xefdfe31c, 0x76913e47,
5305 0x0c2bf20c, 0xf1df8c36, 0xa71a667c, 0xe18f943f, 0xfc019ee5, 0x39fb5d1c,
5306 0x741c8d04, 0x1a575f46, 0xcbc587b7, 0x5d6fa44c, 0x5a1e5c69, 0x428eed56,
5307 0x657c5dfa, 0x67dc01df, 0x5601df29, 0x1e421eda, 0x712a3e04, 0x3f0451fe,
5308 0x389517f9, 0xfcff28df, 0xc85ef9db, 0xf3e32561, 0xd4adf393, 0x7acbf98b,
5309 0xc124fdf1, 0xe04c652f, 0x2e6f576b, 0x50ce4277, 0x0ebde98e, 0x4db73f31,
5310 0xf7e50efb, 0x22dcfcc5, 0x28bad665, 0x17d20fc4, 0x103e0ff5, 0x04fa9469,
5311 0xbedc5c9a, 0x4bf1ce91, 0x57f8497a, 0xdf403809, 0x7e6c6339, 0xf274b63a,
5312 0xe095644e, 0x778f639b, 0xfc07af49, 0xcf4adf9d, 0xeabf116c, 0x7c93c603,
5313 0x7dcbc723, 0x38ddd279, 0x87dfe86f, 0x8f71cbfd, 0xd8f4227a, 0xe5c651cf,
5314 0xe52fc243, 0xa1fab732, 0x614707bb, 0xee968bbb, 0x9cde7003, 0xacd2ab8e,
5315 0xfd13bdf4, 0x59def805, 0xfadc50af, 0x1fe75898, 0xa8b5fc7b, 0x7e7e01e2,
5316 0x277c427f, 0x307f0cf9, 0x6de1263e, 0x7038f1b2, 0x0f52dc30, 0x9f73b849,
5317 0x2c6eefb8, 0xbee3f097, 0x4a9f2051, 0x957e4a3c, 0xf982f5f7, 0xda4e7896,
5318 0xfe73b54f, 0x463d4cae, 0x943a77e7, 0xfc27f707, 0x5ce213a2, 0xe33c6b79,
5319 0x8915ff71, 0x8af735fb, 0xb40c8b18, 0xc08ed23f, 0x807d1acf, 0xa7bf69fd,
5320 0x8b3ce716, 0xd690bb74, 0xc73ffa8d, 0xd0398cea, 0xe699d96f, 0x9dcef871,
5321 0xb8ef43f4, 0x31a353ea, 0x9f8bb55e, 0x52fc9377, 0xc93f6176, 0xffb8b941,
5322 0x83eab454, 0xefc8e182, 0xbed035bf, 0x63e3d14e, 0xcfdfe88d, 0x187332dd,
5323 0x41ef01a2, 0xbb3f5ea0, 0xbf266879, 0x984d6059, 0x3621f786, 0x01ed333f,
5324 0xaf559f28, 0xd80dbbd2, 0xd16fca0f, 0x5f1499a3, 0x52d6113d, 0xf8fd0a30,
5325 0xf456a81f, 0x32df6fe3, 0x7f6c31f4, 0x0c6ba5bb, 0x39b1b63d, 0x7d4ef296,
5326 0xe907d934, 0x8073caf7, 0xc7dee2d5, 0x3fde845f, 0xe22a9edc, 0x2f755ffc,
5327 0xdd6f8fdc, 0xacef4618, 0x75ed1a14, 0x4f6f1c3e, 0x54675a17, 0x23eaf11a,
5328 0xbf255bdd, 0x99918e6c, 0xb9508693, 0x0fca0939, 0x451f9a1a, 0x51f0723b,
5329 0x3f7c60cb, 0x86d7a992, 0x9a7f7315, 0x6ac63bef, 0x70912ddf, 0x0fc6247c,
5330 0xdf7e4fee, 0x1b08eb84, 0xefa44fdd, 0xedf8aecf, 0x6783b434, 0xe1b4f6b7,
5331 0x09ef4fbc, 0xa703fba3, 0xcf77da0d, 0x57def56e, 0x79297df0, 0x9a74f56f,
5332 0xfc938fd6, 0x377bc37e, 0x839ed37f, 0xa5b9d1bc, 0xdd194b0b, 0x8d397efb,
5333 0x2263f7d1, 0xe789dabe, 0x4d6a4b08, 0x7307bc56, 0xf71ef912, 0xfcab76b3,
5334 0xcb99a5fe, 0x99ddc9c1, 0xe4b7bf74, 0x525f3c6f, 0x3ef178a7, 0x9fa7fef2,
5335 0xb30af3a0, 0xabc4cfc1, 0xf3feed09, 0xa1a7a7ba, 0xb8765c38, 0xfe7de257,
5336 0xf9f95bcb, 0x32ef0e8a, 0x2079dc1c, 0xdfb9dec9, 0xcbfb5dfc, 0x9f110e32,
5337 0x2fcfbdae, 0x4fd72cf1, 0x8c3f026f, 0xdbc7e218, 0x90e74b67, 0xa9617cbf,
5338 0xca4bd29b, 0x23b7b5b1, 0xe9a25b1f, 0xeb1fc0be, 0xbdf1519f, 0x835df2a8,
5339 0x783ae1af, 0xbd346454, 0xd2d9f293, 0x7a8fb425, 0xa5156961, 0x0e32de92,
5340 0x46aec777, 0xfab3eefa, 0x9fbc06cc, 0xb46446fb, 0x90b603b0, 0xdeeced74,
5341 0xb9d79cb1, 0x4afa701f, 0x9d6dcfb8, 0x6af38519, 0x61b63e7c, 0x2235d224,
5342 0x5f7e8ada, 0x724738a9, 0xabf73d6a, 0x7fa398cf, 0x3df40f93, 0x024a61b3,
5343 0xbb3737be, 0x5869def1, 0xb147b25e, 0xb1c07ae2, 0xae145267, 0xb7d53edb,
5344 0xa8fde144, 0x7bcbd74f, 0x3bfa5e55, 0xd8f2a354, 0xca3f6c14, 0x0cf667a7,
5345 0x7c8d75be, 0x9e82f232, 0x879ebfee, 0x5c938a72, 0x0938a70b, 0xb9e2c4fc,
5346 0xf3afd991, 0x3afb4af8, 0x6ef3ac57, 0x347ef317, 0x31f726dd, 0x04773ca8,
5347 0x61bd3f2f, 0xefec44e7, 0x158366ec, 0xb36cfee1, 0x079ffa81, 0xc01d33eb,
5348 0x5f2b667b, 0xd71e60f7, 0xf2b767cb, 0x3abccdf5, 0x5f29bebe, 0xfbf27060,
5349 0xcc7e5aa2, 0xef47680d, 0x5ef274fb, 0x9f273cc8, 0x97b03cdf, 0xbe60df38,
5350 0x7475618d, 0x9e9bec8f, 0xdbe60d17, 0x855f92f9, 0xd7e7687e, 0xe044f8ce,
5351 0xf91de513, 0xbcc3f255, 0xdedf7cf5, 0x07383756, 0x47f24ef9, 0xd5593bf0,
5352 0x57dfc646, 0x7bd385d4, 0xed2293b8, 0x530fb406, 0x20c65ae2, 0xe74e3e5a,
5353 0xab9a807e, 0x37bde273, 0xf90a6d56, 0x748acece, 0x744557ee, 0xdeefc465,
5354 0xcf3f2b74, 0xc97fee29, 0x86922614, 0x84527b76, 0x343b0bed, 0xaefd3a79,
5355 0xcfc0f47b, 0x3db76e93, 0xd8c1ddda, 0xee0bd32f, 0x267cc3d1, 0x7776da65,
5356 0xbff3fc83, 0xb7f3c09a, 0x201a86d9, 0x78994cbf, 0xd7c818cf, 0x4a9f3ba7,
5357 0xece7180f, 0x38692e96, 0x19ff283f, 0xbbc5d796, 0xa5698e7f, 0x49760fb8,
5358 0x24b41d69, 0xfdfedfc3, 0x7fa3963d, 0x2df3fbb4, 0x18ee9606, 0x7f097980,
5359 0xdd25b4e8, 0xf8f4abf9, 0x8cc5e58e, 0xf5e74e3d, 0x0e1efc3c, 0x09ccb8fc,
5360 0xf38a4f78, 0x97bcb15b, 0x2f741353, 0x9fefc1c7, 0xf252fbc9, 0xff5f543e,
5361 0xb70db27d, 0x92ec9f72, 0x2a1dff81, 0x0fbda9c5, 0x89fc34a6, 0xf6a9f9de,
5362 0xa23096b0, 0x4d9ef683, 0x7753be39, 0xa20bdd1b, 0x6f4c87fb, 0x57337d27,
5363 0xac683bfa, 0x29dff987, 0xfcfc8960, 0x1f82a3c1, 0x3d652f4f, 0x9fe8807a,
5364 0xca39b77f, 0x985c700e, 0xfa85ebe8, 0xfddc3220, 0xe9d7c427, 0x0ba9d50d,
5365 0xaa1ef0e3, 0xed0f91c9, 0x7df978cf, 0xb7e132ce, 0x42f1cdb2, 0x3bbea82f,
5366 0x46535da1, 0x87684ddf, 0x757c17de, 0xfe97c321, 0x192bd423, 0xed049d7c,
5367 0xde5d3ce8, 0xb1e2bbf2, 0x4fed85dd, 0x700d98f4, 0xbc06009b, 0xfa1e35a7,
5368 0xf7a3611c, 0xfb4a98aa, 0x7efe5ecf, 0xa2799e92, 0xd5eef86c, 0x3ee2e933,
5369 0x9413dd11, 0xeff89274, 0x1a181740, 0x999d59fd, 0xbeee1019, 0xfdfd036c,
5370 0xf91f492f, 0xddc2e2ce, 0x7742fe3c, 0xe31e4524, 0xe2cda748, 0xb0759fef,
5371 0xbf916f8b, 0xd1e9620a, 0x330d9fe8, 0x11c9db43, 0xf5d88d1b, 0xff2f6d77,
5372 0x92fc2e9d, 0xe0706cc1, 0xa2a5923b, 0xd0b558cd, 0x2d5bef8e, 0x7bd3378c,
5373 0xe85f0b25, 0x96c1fc4e, 0xb60590fc, 0x89621b63, 0xa866565f, 0xf5b9ff84,
5374 0x2a1dde8c, 0xf3a64fa8, 0x36f5f994, 0x12daa34a, 0x6fecfca9, 0x7ae2c9de,
5375 0xe0a7d389, 0xa68cba7f, 0xd3ff4b73, 0xd9d6529b, 0x6691a77b, 0xf0bbcfba,
5376 0x0b6bb720, 0xc7bfcaa7, 0xbbafefc2, 0xc8ae3804, 0xb90b8a1a, 0xe753dc3a,
5377 0xf0ba57ef, 0xe77e00be, 0x677d5034, 0xfc4a57ef, 0x82dd049a, 0x7a9cb3df,
5378 0xde913330, 0x59ef147f, 0x9aed174e, 0xceb3bdc5, 0x4fbcb5de, 0x6a227bb4,
5379 0xddf2135c, 0xc8696774, 0x9ef52d77, 0xcffa0730, 0x7a48d486, 0x373ee147,
5380 0xf59a97f8, 0xf11e8b4c, 0xbf9b2d30, 0xba753973, 0xfd90deb6, 0x4373e939,
5381 0x92778776, 0x4d8fa80c, 0xecfb6d2e, 0xf50ec2ae, 0xf6bf7d65, 0x2354d15d,
5382 0xbe3d4fd9, 0x69f90b3b, 0xf4515de2, 0xbfffd10f, 0xff10b4ec, 0xb83bc49b,
5383 0x112b2ccd, 0xbeadc2f5, 0xdbfffb27, 0xefc1b1fb, 0x03bf06c4, 0x42eb7fdb,
5384 0xdd607e4d, 0x6fed350f, 0xa9ae5fab, 0xad5bec1f, 0xfa6ccfa9, 0xb43f2699,
5385 0xfb4d39f9, 0x693647e1, 0xbcb647ea, 0xfdbfa9a4, 0xfe4d0ecc, 0x683fd68e,
5386 0xb6d9dfda, 0x61cf9357, 0xe7da68ef, 0xe4d03f9a, 0x57ff5ac7, 0xc4aefed3,
5387 0xf1fa9a13, 0xfa9af3f6, 0x68ae7d09, 0x2f8e05f2, 0x373fed35, 0x457757ba,
5388 0x0cea22bf, 0x433aadf1, 0xf944f861, 0x6629a6e5, 0xba6b07d4, 0xf8247d0a,
5389 0xd3b0b96f, 0x7ba307ac, 0x6cd563ac, 0x3d5ff11f, 0xc1a0bbff, 0xde7f4f76,
5390 0x1ff8c4e5, 0x6bdf8d7b, 0x527f068b, 0x8c7e301f, 0xff02ccd3, 0x9e6c5dee,
5391 0x778f9355, 0x77da6a25, 0xd4d76e99, 0x68fbb927, 0x38e653ea, 0xaab4f934,
5392 0x5df69a11, 0xf9353897, 0xa69e4f0c, 0x971af77d, 0x76b3df26, 0xef7da6ba,
5393 0x7d4d6ef5, 0x4d1cef5f, 0x55adff7d, 0xbac0fc9a, 0xb7f69a25, 0xf5347bd5,
5394 0x9a357d83, 0x5aa6ccfa, 0xf3687e4d, 0xe1fb4d7a, 0xfa9abc47, 0x355b2d91,
5395 0xa99fb7f5, 0x68efe4d3, 0xbfb4d7ad, 0xc9a7cdb3, 0x9a83b0e7, 0xf7e6b9f6,
5396 0xd6b1f935, 0xefed344f, 0xa9a63c4a, 0xab3f6f1f, 0xce7e97a9, 0x6b9f3e84,
5397 0x53df85cb, 0xe697f8e0, 0x6ef7f6fb, 0x1f742877, 0x6ed75cea, 0x96c57df2,
5398 0x24fd1530, 0x6c99c517, 0xf5111078, 0xb727de15, 0x8539f3f1, 0x238aaf14,
5399 0x944c887f, 0x810bcf1d, 0xab8510df, 0xf40c8cb6, 0xfefc23ab, 0xccf5ea5b,
5400 0xdadff79b, 0xd5dcff84, 0xf288beee, 0xfb6eaf31, 0x989f7a38, 0x1c225679,
5401 0x77bffdf2, 0x956dde83, 0x19f378e9, 0x17f00fa6, 0xa6d5860f, 0x389af90e,
5402 0x05f378c1, 0xb6c1ef86, 0x22e22bf7, 0x17bdc7f8, 0x16bff406, 0xf7f817d6,
5403 0x9a976b23, 0xffc76fe9, 0xf295a96c, 0x522696eb, 0x3a00fffe, 0x0047bf29,
5404 0x000047bf, 0x00088b1f, 0x00000000, 0x7dedff00, 0x4554780b, 0xeedd7096,
5405 0x9d248fdb, 0x777579d0, 0x493cdc9e, 0xf09d0848, 0x3a3e00d8, 0xc0406021,
5406 0x490435e6, 0x41a8c1a4, 0xf881ba43, 0xbb75744f, 0xb2021031, 0x10d191b3,
5407 0x0186c195, 0x099d1964, 0x09d1a32e, 0xe09af09a, 0x1c604c3a, 0x3719d9c5,
5408 0x8ee2a3a0, 0xcfe31e10, 0x7fc38fee, 0x937ba9ce, 0x380e9dbe, 0xf7ff3afe,
5409 0xb4fbfa3f, 0xab755538, 0x739d554e, 0x2aaa3cea, 0x89895ead, 0xde6d6322,
5410 0xf39f4a1c, 0xc99899da, 0x316f36d8, 0x0ebddbc1, 0x72defd82, 0x9d7a774a,
5411 0x5bcbbf94, 0xaf1ef041, 0xdebdd28b, 0x79f74a1a, 0x92fe543d, 0x9fe081b7,
5412 0xb6947d7a, 0xff299b7b, 0xc10b6f15, 0x046dbc07, 0x53f5eabf, 0x4bdde1da,
5413 0x76de1be9, 0x76f4ef2a, 0xb7a6fc10, 0x6f2ee08b, 0xbc87c10f, 0xf11f04bd,
5414 0x98f8269e, 0x1ed28fb7, 0xbe9467ef, 0xf2a7eded, 0x0957bc77, 0xdbbf8ebe,
5415 0xcd2afc19, 0x2631e49f, 0x7ae69730, 0xc9ccc21e, 0x00f63226, 0xff824bfe,
5416 0xcc8846e2, 0x8cfdd8c2, 0xb0d73eff, 0x9413769a, 0x3ff2fe77, 0x74c60285,
5417 0x1f8d8ca5, 0xf662690f, 0xc634c6ce, 0xe675b026, 0xd318724f, 0x63d75740,
5418 0x4e09fb07, 0xd6191319, 0x2d75dfc3, 0x58c7dffe, 0x94bffc3c, 0x834c78e5,
5419 0x14095369, 0x55befb42, 0x1a777f82, 0x3e20d755, 0xbf1c8dab, 0x95135a69,
5420 0xf82c3e57, 0x5563020d, 0x8be9f322, 0x587dfb18, 0xc11b0154, 0x2e8f25d8,
5421 0x2172c447, 0x04830edc, 0x443a8ff8, 0x2c5d7e0e, 0x9da5b18e, 0xd29b1d86,
5422 0x84aaf106, 0xfdf035ef, 0x0c1a562b, 0x3a3d64ab, 0x1df203c4, 0x9ec618da,
5423 0x4ba6b8b7, 0x8a60ff90, 0xf687a7c6, 0xed9fc999, 0x2dec648c, 0xe6066b8b,
5424 0x77dcf25f, 0xc07f1b0c, 0x7ec6cf6c, 0xe2ba1b66, 0xfdff4117, 0x9df6b5c7,
5425 0xe1f3f0d2, 0x6c67296e, 0xdfca0ddc, 0x02ec973c, 0xa2ffca3c, 0x9ffce175,
5426 0xf85645d0, 0x492f01f3, 0x1a4a78e0, 0xeadb3a55, 0x7cf8825a, 0x47b9e919,
5427 0xe5f85303, 0xacf6ab6d, 0xae552181, 0x82e11aca, 0x2582eeef, 0xcd8c1963,
5428 0x418e9265, 0x38e67cf9, 0x2d4d069a, 0x17822e64, 0x6fa51f31, 0xb1aabbc5,
5429 0x4fccc59d, 0x21b26bb0, 0x82b8d435, 0x78cb72f1, 0x947c65b9, 0xabab71f4,
5430 0x20e5e38e, 0xba4c4ebc, 0xa5c71b23, 0x5596f5e0, 0x58737aa2, 0xefc476ff,
5431 0x3f1783cb, 0xd2863211, 0x174077c7, 0xeb1e6826, 0x73ac3d31, 0xf7d18ea3,
5432 0x7e088f8d, 0x2e856ba4, 0xb791992a, 0x0be418fb, 0xf4027481, 0xd2fc8451,
5433 0x92373a9f, 0x0949e4e8, 0x92707c1a, 0x0b1fa7d6, 0xb3f8d4e3, 0x87d12d05,
5434 0x1efc005e, 0x48fa0388, 0xea0e9e1f, 0xe00d219a, 0x67afa01f, 0xaff3bdb0,
5435 0xce0e5dff, 0x49cdfb97, 0xa357ce12, 0xe801d606, 0xd6b6f7d8, 0x99925bbe,
5436 0x94ed6014, 0x6ba47e31, 0x73edda26, 0xb17ae0c7, 0xdfa84ea5, 0xfb0d65ad,
5437 0xfbf687f3, 0xb417ae2a, 0x2ba6c27f, 0x9cbb53f7, 0x9ff295cf, 0x63c5fae2,
5438 0x5eadebca, 0x16ad69f5, 0xe8713ff0, 0x131a5e9c, 0x6f0d1c62, 0xe00666e7,
5439 0x3338eeef, 0xe44261dd, 0x45e7f2fa, 0x949fe60e, 0x1fa144e9, 0xb5d23ead,
5440 0x178814c3, 0xf9e817ef, 0xd13744e7, 0x4419cf40, 0xe0f89fcf, 0x690639d3,
5441 0xfb4822c4, 0x20ba6a60, 0xd660bd75, 0x672cdd23, 0x99ab4a76, 0x6007d293,
5442 0x9d7e91f9, 0x38f4a7be, 0x76b20fef, 0xbe2bafca, 0x7cf482d7, 0x8a95c6bf,
5443 0xa5eb2d70, 0x2feb377c, 0x2dfcc1b3, 0xd47b5e6c, 0x6fcf5806, 0x025a6a79,
5444 0xff3cefcc, 0xce98a3b2, 0xe27c25dd, 0x7a3f8893, 0xc13eaf10, 0xfa113eb3,
5445 0x92a5fbbf, 0x3f9049f5, 0x85d7cb47, 0x175f2bfd, 0x8f047e45, 0x97a1f81b,
5446 0xe341cb8f, 0xab9546d2, 0x09f2a1f8, 0x9da010e6, 0xff0683fe, 0xfe00b4ce,
5447 0xdfe87e28, 0x898e5093, 0x7ae0f7fd, 0xc434dfbb, 0x083f7ae0, 0x29c71be2,
5448 0x806b1838, 0x2ad690fe, 0x882a8863, 0xe1621fde, 0xb9f7ac76, 0xa79fdf4c,
5449 0xcfefa230, 0x4060e605, 0xa67417bf, 0x5ae50166, 0x0456cbaa, 0xbe60acf8,
5450 0x6ee50626, 0x38054bcd, 0xd725234f, 0x1fd744a7, 0xa61537b5, 0xa7f7fca1,
5451 0xf7ff280a, 0x698dec19, 0x5d84fdaa, 0xe321408f, 0x3f9f3861, 0x0ec776c0,
5452 0x3e284bc5, 0x14429ff6, 0xf33d0663, 0xbf888b19, 0xebe444d9, 0x57f13d44,
5453 0x066d4e23, 0x3c94e3f6, 0x9feda1a6, 0xf9edf190, 0xef744b4a, 0x16ecf183,
5454 0xf7c3f542, 0x60f8432b, 0x2c3f243f, 0xa7d1fa8c, 0xfa563e71, 0x64bea663,
5455 0x6a75d027, 0x86974b84, 0xc716c182, 0xcb998be5, 0x4fb49e97, 0xe67d7133,
5456 0xc8a8de4c, 0xdd8f6a65, 0x09d1e5c6, 0xf843e49d, 0x1d9a4944, 0x9c80d724,
5457 0x97f8abbd, 0xbb8f11a7, 0x2d2ea68c, 0xdd16eca4, 0x7d94fa9f, 0xff707d30,
5458 0x7fd94bbd, 0xeffbe16f, 0xefb5991c, 0xf1babb12, 0x3aecc67b, 0xfd972fc4,
5459 0x6d8f995e, 0xf22adfb8, 0x0b7ec871, 0xf9c5eb03, 0x832b2513, 0xc7c0b574,
5460 0xdc253abf, 0x36c47c8f, 0xf4f8d2e7, 0xfe0cfcb2, 0x58c15ade, 0x13c651a6,
5461 0x19704bfe, 0x20ce6659, 0x5663549c, 0x9b1e29c1, 0x06c8feaa, 0xe69e5549,
5462 0x679551cb, 0x7055db34, 0xaab14b56, 0x8736a8fe, 0x97f5ce0a, 0xede7eaab,
5463 0x31e0aa75, 0xfaaa15ed, 0xaa5c3b63, 0x1aaec2f2, 0x1eb8f955, 0xd09e0a8f,
5464 0xffaaa0db, 0xaa7da777, 0xcd7d49f2, 0x9f29f2aa, 0x5be0a8b5, 0xf554dbfb,
5465 0x57eabf6f, 0x7fb09795, 0x354f9556, 0xd3c157ee, 0xeaabafcc, 0x16fb80bf,
5466 0xb61dcff0, 0x0cfe556e, 0xbbeab8e9, 0xaa4e733b, 0x75e417e0, 0x270e2df6,
5467 0xe72d68be, 0xfb6cd1fb, 0x5876aa07, 0xfebe68e7, 0x7b6f3c61, 0x510b1fcf,
5468 0xf4d76e4e, 0x4add21a7, 0xf222735a, 0xdcf16671, 0x2c664043, 0x14aab1db,
5469 0xf94e5bc5, 0x1d308753, 0x8a5fdced, 0x715f926c, 0x05a610f2, 0xd0a58bae,
5470 0x44d7b31c, 0xc8b4c61f, 0x8ad53853, 0x3dcc34a8, 0xdf44e98c, 0x5728a9aa,
5471 0x3f5c785f, 0x2a28f91a, 0x074fa146, 0x827d67d1, 0x7eb9f886, 0xf28fc9b1,
5472 0x24c532c7, 0x96139032, 0xb1d65a1f, 0x9a8b4c02, 0x1af66d31, 0xfa0f5f99,
5473 0xba519780, 0xfe666bc9, 0xaf67206c, 0x93fae08d, 0x43a795f7, 0x44ab233b,
5474 0xe699aa33, 0x48258f51, 0xe5f5bed0, 0x765d9c96, 0xb0edd6c6, 0x42e5d7cf,
5475 0xc59e19ff, 0x4e01a23b, 0x30058e63, 0x2398167f, 0x25b19936, 0xfa76df3b,
5476 0x97c287f2, 0x244d9d33, 0x5cf6c417, 0x7694ffd4, 0x6e7e9637, 0xdf2198d7,
5477 0x11e74bf7, 0xf1adf798, 0xc21df4e1, 0xa75f9925, 0xb60b475d, 0xf69ef90b,
5478 0x4cfc7c10, 0x977fdf1a, 0x0a7d73a4, 0x66eb8487, 0xacc6cbe5, 0x808ca7a0,
5479 0xa93adcb9, 0xf0ea0ce1, 0xa027d9a2, 0xe0d7627c, 0x892b907b, 0xe0832958,
5480 0x4e01c3db, 0x6c625840, 0xc7eb967f, 0xc5d5afd8, 0xfa00d9d8, 0xc351a849,
5481 0xcf9e615b, 0xa3e20e66, 0x89f1aa5b, 0x8fdd0630, 0xf43b769d, 0xc60aadb3,
5482 0x3d56f00b, 0x7a9437d7, 0xf68c34a3, 0xf8d32ff7, 0xcdaece7e, 0xf49ea3b7,
5483 0xe79e3ca5, 0x3e8bfdbc, 0xeb7b44ce, 0x3589a52a, 0xf205c11e, 0xb4e95acd,
5484 0xae9ea0fb, 0x8423e611, 0x348bf2de, 0x1dd7be91, 0xa090447e, 0x1269a7de,
5485 0x7e9589c1, 0x0d52771a, 0xbf801bb4, 0x6609f44d, 0xe63db7c8, 0x9b3f1013,
5486 0xf06769d9, 0x885a331d, 0x3cc8d7fe, 0xcbf86b61, 0x0f418fa2, 0x769d79d3,
5487 0x13bba7ac, 0x271f33e8, 0xb86663d4, 0x47e3c94e, 0xa3eb10b0, 0x0d3e86a4,
5488 0x9f40dc73, 0xd47d4a8f, 0xddc5fb43, 0xe80b2926, 0xa6c585fb, 0xda211d8a,
5489 0x9f9e54fb, 0xfeea310d, 0x1f3e5a2d, 0x6cbedc8a, 0xf0a8ebe6, 0xa6689af1,
5490 0x526be392, 0x846f5bc6, 0xc8cdb5af, 0x6ef8015c, 0xd0cc7e85, 0x55abe1be,
5491 0xe83f1c66, 0x4fea4ed0, 0xc764f2e4, 0x6ec8728f, 0x21c75e0a, 0x3f9408f4,
5492 0xa3e908a2, 0x7c08dfcf, 0xdbd2a868, 0xfeb26f51, 0x7b809343, 0x116b2273,
5493 0x5358be50, 0xdc447aca, 0xae5744d7, 0x793e8433, 0xd654ba33, 0x839fd94f,
5494 0x3d774bd7, 0x9c12fde3, 0x31d57fef, 0x1f56c7d4, 0x05718f8f, 0x3a4c53d0,
5495 0xd662cba7, 0x98fe45a2, 0xbd29dacc, 0x7a52f585, 0xd4a7eb1b, 0xa622ccc1,
5496 0x694ecca5, 0x3a527319, 0x2d28799d, 0xce942d67, 0xce94ed64, 0x8294bd62,
5497 0x93a9433d, 0x9aeec999, 0xa637fb07, 0xd293980b, 0xa50f31ef, 0x7e9ce999,
5498 0xc10b582b, 0x4a76b377, 0x24ef803b, 0x8c01fa3d, 0x9c827694, 0x904df4c3,
5499 0x79769873, 0xa3652625, 0xd287201f, 0xa53b5e23, 0x94c5bcc7, 0x541d78f6,
5500 0x396f6def, 0x9d78efa5, 0x56f09e94, 0x75ebda50, 0xde53bd51, 0xf5df4a1a,
5501 0xcf7d287a, 0x69e940db, 0xdfd28faf, 0x1d299b79, 0xc67e07a5, 0x2be9cdf9,
5502 0xf53e7d44, 0x0243bd23, 0xe591ecf9, 0xe68761d2, 0xb8f1dc99, 0x40661a6e,
5503 0x235b283a, 0x7359fd20, 0xa43f0e34, 0x0b56729b, 0xe1ba42f7, 0x0cdfd704,
5504 0x0fd248d6, 0x82f56dad, 0x0876ed04, 0x5808da7d, 0xa9e9e9cb, 0x9f208d73,
5505 0xbad93a4b, 0x19c23b08, 0xee81194f, 0xfd3ce876, 0x64bca03b, 0x08d734a7,
5506 0xc8e4d67b, 0x8fb1ff53, 0xe93e54c3, 0x03346b08, 0xfb3d2b3c, 0xe38138a9,
5507 0x7befc281, 0xaee6733b, 0x253c44cd, 0x34c5f3c2, 0xbf512c30, 0xfa44c47e,
5508 0xd9db6175, 0x93c00d42, 0x68454c1a, 0xebd40617, 0xae1fba42, 0xf2b9705e,
5509 0x9655b6dd, 0x0d879c46, 0x0e5a809f, 0x7d19a959, 0xd5f3ab85, 0x5ebe6aed,
5510 0x837b4cff, 0x09eb03fe, 0x7f6f6837, 0x7d32a396, 0x3a7effc2, 0xdd6fa60f,
5511 0x6bf68ff5, 0x8e640fc8, 0x5774fdc1, 0xfd339734, 0x04ee9fa0, 0xc8c577bc,
5512 0x1a4cc6f0, 0x5c43ca17, 0xd29b0db7, 0x77803efd, 0x1f573985, 0xd47ff2c7,
5513 0xd14277d8, 0xa6d770ae, 0xc933825c, 0xc621b13f, 0x8f931393, 0x97df3cfa,
5514 0x0d1f935a, 0xbff80293, 0xafcb9d39, 0xe95cb7ad, 0x447681dd, 0xc16586b3,
5515 0x979b3b77, 0x7681cc6f, 0xf419bc7e, 0xdc478007, 0x0b31bd5a, 0x6a37d3ca,
5516 0x19656a26, 0x78fc7887, 0x4d9ef573, 0x8f255fa8, 0x7686c98e, 0x99796433,
5517 0xb857db1a, 0x55bce806, 0x95a7b6af, 0x7e649ff4, 0xce6686a9, 0x954d6c82,
5518 0x3a1df4ed, 0xdfb81156, 0xefc64cfd, 0xd53c5957, 0x57fdcedd, 0xfee19186,
5519 0x25fc6027, 0xc3bfb923, 0xfe48ceb2, 0x7ff24b0e, 0xca03bc9d, 0x7634db2d,
5520 0x6b44e954, 0xea1d5aed, 0x3b598bfb, 0x810ee3f2, 0xe14bef7f, 0x0a28217a,
5521 0xec0373e9, 0xd3deadf2, 0xfc03328b, 0x9f0ab684, 0xc97bf680, 0x0fa15ac8,
5522 0x07e49ff7, 0x2dfbb405, 0x15c12e15, 0x8781f689, 0xb965cfca, 0xf80e927e,
5523 0xfbe12ad9, 0xb992fd40, 0xa15d7012, 0xd2768adf, 0x605158f3, 0xf8b3a77f,
5524 0x3b07ac3c, 0x75d5f499, 0x782bc27a, 0x97654ebe, 0x95f6c01e, 0xff2e0c75,
5525 0xabb7067e, 0x5d013d77, 0xe24c1f20, 0xdd89f376, 0xce3fa489, 0xa0770d69,
5526 0xa9e274fd, 0x6f0465d1, 0x3d40ec99, 0xc9eec4f2, 0xb39d31d3, 0x3bd52665,
5527 0xb41eb021, 0xb96ce787, 0xd4fcc45b, 0xdb0bc00c, 0x7a27a33b, 0x41e5b39c,
5528 0xcb47fbf9, 0xe358bcb0, 0x91da09fb, 0x22fb8dc5, 0x1c9e4ed0, 0xa6124af9,
5529 0xf57d3427, 0x5dffd0dd, 0xdc2bf666, 0xe31b9d9e, 0xfe1cb1fe, 0x74a9f731,
5530 0xbfd7ea1d, 0xf5a74f4b, 0xc41ccf9c, 0xec835007, 0xf6f65bba, 0x8a4d061e,
5531 0x3fded6dd, 0xe65ccc15, 0xc11f30e8, 0x5ecbb4b4, 0xd657d386, 0xe9823ce3,
5532 0x194f5ef4, 0xa7e52faa, 0xba608e5b, 0x3bf5d724, 0xff179f9c, 0xbcaf7be1,
5533 0xc7c8f008, 0x07a8cdeb, 0x37d13e65, 0xebf92763, 0x21f90c74, 0x45a7926b,
5534 0x746c048b, 0x787ca0c6, 0x835169f6, 0xad21b9fb, 0xc3610c25, 0xb41ae97d,
5535 0xb745770b, 0xb3b8d0d4, 0xe3ce19c2, 0x210fb0db, 0x3b45645d, 0x809f9063,
5536 0x3e1d692f, 0x10d3e993, 0x634731ed, 0x1fcf187e, 0xe1ce17a8, 0x5af503f3,
5537 0x27ea04c2, 0x13fb2046, 0xbfdc06d4, 0xddfef26d, 0x38093cc6, 0xcf48d61f,
5538 0x64ebf40e, 0x67fe7095, 0xb02e9c91, 0xfa44d37a, 0x96cd9c84, 0xb89dcf16,
5539 0xe897560e, 0x3ba40beb, 0xf40706d8, 0x19827491, 0x055bd7da, 0x219c830e,
5540 0x7e87f0bc, 0x42c98b0c, 0xbf828d7a, 0x0bda02b5, 0x1c7033d0, 0xdf834cf3,
5541 0x9b177429, 0x4235c7c1, 0x65acbfa6, 0xdf053dbc, 0x9f2e0cb8, 0x83496f01,
5542 0x7c6568f8, 0x009a1c60, 0xd1ea027c, 0x66f006f8, 0x05d21b76, 0xa7817a48,
5543 0xc703124c, 0x8471ad5f, 0x7a645da1, 0x4fe8fbf5, 0x02394289, 0xf753fe78,
5544 0x69f22324, 0x327238f0, 0x46df08d2, 0x6f5187d0, 0xfce2e99f, 0x11e958db,
5545 0x18423ec8, 0x3a2c9fc7, 0x35681fd0, 0x017416ad, 0xf326b5e3, 0xa5667a7d,
5546 0xcae51ba7, 0x3b08e2cc, 0xac9df7d2, 0xf3999d7d, 0xc04c91f7, 0xf81b146f,
5547 0x41c4d899, 0x4f47f0bd, 0x97127bbf, 0x97b59934, 0xf9fee2e4, 0x70b3fdf8,
5548 0x3a3eb6fd, 0x4ff107b3, 0x3baa79cc, 0x5e741a06, 0x197dd794, 0x6ca4ebf7,
5549 0x1c0e3f13, 0xe0079247, 0x8d44bf40, 0x41e81cba, 0x65742b05, 0x71a21a13,
5550 0xe444d1bf, 0x7a819ccf, 0xe486944a, 0x6129c83b, 0x33fd4841, 0xf9e4ae88,
5551 0xaee7d657, 0x375a4c8c, 0x03af89ab, 0x171bb7eb, 0x5583ca46, 0x6dfa09d6,
5552 0x011f3604, 0xa658df74, 0xd7680bf5, 0xac28fd62, 0x919de2cf, 0x8769d743,
5553 0x03399a4e, 0x1ac3f4e5, 0x74366ef3, 0x7edc815e, 0xc3ed7a4b, 0xf90e5471,
5554 0x7dfc91a2, 0x436af801, 0xb8f5eac1, 0xac6dfd59, 0xb48cee6b, 0xc989f9a1,
5555 0x3ee2660b, 0x68cb589b, 0x47cb83fd, 0x575ea63d, 0xa3c737b2, 0xbbf988ff,
5556 0xce7ac1be, 0x8655de4c, 0xbaf07cfa, 0x1a97742a, 0x105f7a1b, 0xa65f3933,
5557 0x954fd846, 0x92215e93, 0x114ce09e, 0xa2ed03e3, 0x1f7c190d, 0x1335fdba,
5558 0x23ec43ed, 0x5cb71fa3, 0x93ef577b, 0xa50eb0b9, 0xae683457, 0x1cefa3b0,
5559 0x484ce1fa, 0xddeafda7, 0xf50affd5, 0x1a657da6, 0xb06ff987, 0x10e819be,
5560 0x9d80f5f1, 0x2fdaf001, 0xa3a0b4f6, 0xd992b1a4, 0xfa55df71, 0xf3f723d9,
5561 0x49df9d0b, 0x645735f2, 0x820e493b, 0x2f401e65, 0x7e896900, 0x56731978,
5562 0x68dd90b6, 0x5907cccd, 0xf6bd6e8d, 0xfe5fb425, 0xefd0cf49, 0xd242af38,
5563 0xe7f8c095, 0x65ba4a55, 0x5917c7e8, 0xf311ea39, 0x3f94ec2b, 0xf3ced2bf,
5564 0x417f3c8d, 0x17f28385, 0xbe783a54, 0x3e61f209, 0x7bf85616, 0x42eed0bd,
5565 0x41a48c53, 0x93a5783f, 0x50355f97, 0x0f603bf9, 0x87c90264, 0xde49f987,
5566 0xe1a67cb7, 0xb84f12f1, 0x0d5c005f, 0x123d4591, 0x1a7ddfce, 0x8624167b,
5567 0x01999114, 0xe9c2b67e, 0xf3f942d7, 0x13809fcc, 0x6af546f9, 0xbfe43667,
5568 0x719a2c91, 0xc0386f7c, 0xabf9c66e, 0xe9de6915, 0x351bf007, 0xd8cf14c9,
5569 0x7dadfb21, 0x67e48c2b, 0xfc875d05, 0xa2456cac, 0xf2f0c7ac, 0x7ecdcb6d,
5570 0x0e40c7d4, 0xdff63ad2, 0x001e9227, 0x1cedf0f2, 0xca5e8bd4, 0x484987b4,
5571 0xb37e6ab7, 0xa12f2f54, 0x19992af6, 0x9559f2ed, 0x97c6bdbc, 0xea0d7e34,
5572 0x3379a655, 0xf71a0e91, 0xafda3b32, 0x2a9f56cf, 0x9b78458b, 0x87e5cedd,
5573 0x56342e5a, 0xe12e396f, 0x731a3c78, 0x7ee7d516, 0xe94f46ad, 0xc830ad2e,
5574 0xd2deb4cf, 0x2a18fca0, 0xd83dec6f, 0xa955424e, 0xb3d4137d, 0x8fd138c0,
5575 0xf3cf4dbd, 0x1488f77d, 0x8b54b067, 0x4182e65d, 0xa7914efe, 0x187c82d0,
5576 0xc545f245, 0x525fa35f, 0xf9923fc3, 0xc45df814, 0x3176f971, 0x5d95c93b,
5577 0x27207aea, 0x52af2835, 0x67f9d4da, 0x2fc504b2, 0xe0879aa5, 0xb87ab679,
5578 0xe71e0bdc, 0xc2bab8e0, 0x34b8d146, 0xd7285c7c, 0x74d73f20, 0x2b73f288,
5579 0xa124bb45, 0x853f6bbc, 0x92f51fe3, 0x9e00bac8, 0x13345d55, 0x66d669e9,
5580 0x6643b90d, 0x0b925eb3, 0xe2b71b37, 0x671e08df, 0x6436f8f0, 0x1cdf6968,
5581 0x1bd707d0, 0x7d6c1f49, 0xb8c1a4c4, 0xe15be822, 0x973857e8, 0x099e1a55,
5582 0x532230f3, 0x6bafd7d6, 0x34693cb9, 0xacea9d11, 0xfa04e58f, 0xa5d1841f,
5583 0xeebeb023, 0x72bcec7a, 0x68e91b8a, 0xac72c1dc, 0x93639658, 0x2a7c60fa,
5584 0x933873ff, 0xd6f7e602, 0x7c1518fe, 0x5544d5fb, 0x2e1012fd, 0x8d53e581,
5585 0x69f2aa79, 0xf82a71e6, 0x5514db0e, 0x54d219fd, 0xce677c15, 0xb3faaa9d,
5586 0xf055f3ed, 0x544bc55d, 0xee3ae7f5, 0x2fcf9555, 0xbe55487f, 0x0546b9d0,
5587 0x7bf8aa2f, 0xaec5fd55, 0x92f95546, 0xe555279a, 0x9293f6c1, 0x3f726696,
5588 0xe79b56cf, 0x8be483a4, 0x0e46704b, 0x14a967ad, 0x3dd703fb, 0x53eb822a,
5589 0xe51af5c1, 0xe04178f5, 0x48feb1fd, 0xe29df20d, 0x91ed637f, 0xd75cff2a,
5590 0x3ec6c9e4, 0xec72fa13, 0xb2dd23ef, 0xc51fdc13, 0xc53bfcfc, 0x04fdd57f,
5591 0x56f683d4, 0x715ba647, 0xabbf43bf, 0xf9fd0f4b, 0xb7bfe435, 0xb40bd736,
5592 0xe7ae6e0f, 0x7aab957e, 0xc00d8ae6, 0x7ef38583, 0x828e78e5, 0x70447327,
5593 0xcf1860ff, 0x95fb26df, 0x52bf439e, 0xb03f6336, 0x17787e28, 0xac509bb5,
5594 0x467fa1f7, 0x7a08f6a8, 0x662e5b94, 0x07284836, 0x97ff5397, 0x5823ec2b,
5595 0xd2567988, 0x398daf56, 0xbd5b7da0, 0xc61ead6f, 0x69399756, 0xbcd0b3cb,
5596 0x1fc8c3cd, 0x94e668f3, 0xe7816b2d, 0xa25321ff, 0xf9104975, 0xf75f3f3c,
5597 0xd03db9c6, 0xa5956b5f, 0x706ae508, 0xf3bb9279, 0x941bb1e2, 0xd5f2bf3f,
5598 0xd1bfee0f, 0x671d75f7, 0x87ca029a, 0x24568bf5, 0x1d004732, 0x7ed08648,
5599 0x74c81ff9, 0x27ac9ee5, 0x5a33d63f, 0xcfc893d7, 0xd7ff2617, 0xddf0bdc4,
5600 0x3dcae979, 0xfe43a7a8, 0xea1f300f, 0xcf9ebcd1, 0x29e744bc, 0xbf40f352,
5601 0x2c3bfd47, 0x941edd34, 0x95ad17db, 0x5a07e8fd, 0xd097a91d, 0x7e324fce,
5602 0x0eea7e46, 0x83abb71d, 0x07e7f7ed, 0xb276edec, 0xedcbf7bf, 0xad5396ec,
5603 0x8ccf7f99, 0xe45a263e, 0xf98840f8, 0x09b546d0, 0xab12af28, 0xf9024fc5,
5604 0x4f523ba2, 0x498b047e, 0x6a983bf6, 0xc5017e54, 0x791dd06f, 0x6f7480bf,
5605 0x7e415ae9, 0x6017f47a, 0x75e5077b, 0x2417f609, 0xe8b4ff19, 0xb51bd8e3,
5606 0x23f206cf, 0x04fd1084, 0x27f8a1e1, 0xa3f1fb82, 0xccfb813e, 0x27d270ca,
5607 0x397dc782, 0x6650e4b3, 0xff48f23c, 0x7e503bc9, 0x7ed1d29f, 0x84bd1c38,
5608 0x1fcce149, 0x266f7ed0, 0x7223efb7, 0x91f95462, 0x0fe644f6, 0x64b35ff4,
5609 0x321127f3, 0x48cc5b0c, 0x51c6df7d, 0xbcdbdfd8, 0xbb3a13bf, 0xd841f48d,
5610 0x7bfed0f6, 0xeee7e64f, 0xab69465c, 0x01b7976c, 0x9cfa631f, 0xd9fa4cd7,
5611 0x843fe036, 0x4a257bb7, 0x4a1cdefd, 0x54ed7a77, 0x4c5bcbbe, 0x83af1ef0,
5612 0x72debde0, 0x9d79f74a, 0xb792ff94, 0x7a9fe082, 0x7bb6945d, 0x15ff286b,
5613 0x03e087af, 0x5f8206de, 0x44507d45, 0xa533753f, 0xa85b786f, 0x46dbd3bc,
5614 0x3f5e9bf0, 0xbdde5da5, 0xdbc87f94, 0x6f11f04e, 0xbcc7c107, 0x78f7045d,
5615 0xdb7d287b, 0xeff94bdb, 0xdc134f78, 0xb1938f2b, 0xfa2f5ee6, 0x84a25c2b,
5616 0xaeb3ddfa, 0xd7ea336a, 0x331a65b6, 0x9736f38a, 0x39fa0566, 0x78f255b6,
5617 0x86956d9f, 0x87a040fc, 0xb39f51fa, 0xf8fa7b2d, 0x405f2a34, 0x49b15be5,
5618 0xabac4a30, 0x56cafeb8, 0x159ea9ea, 0x77c1020f, 0xfd2b6adb, 0xb25b805a,
5619 0xbadca9c3, 0xedbb244a, 0x3a278d79, 0x245deb9b, 0xae3aadbf, 0x1074283f,
5620 0x22e9fb21, 0x974a44b2, 0xa3fc7365, 0x23ef4232, 0xfc4a5919, 0xc707b9a4,
5621 0xf182ab67, 0xf555be21, 0x5a5f8c46, 0x49f183ef, 0x3aae3fa4, 0xc3247804,
5622 0xc07f1178, 0x6cc2fc87, 0xad97d719, 0xaf08eb55, 0x94f365e4, 0xda346778,
5623 0xfa9e6de9, 0xa56f84b9, 0x36cd7e48, 0xfbe8a1d7, 0xe7ca4e50, 0xe1f1ac7c,
5624 0x50fe7f4e, 0xf082327c, 0xddb8c6df, 0xd2fa0c90, 0x00e310fe, 0xc7a9478b,
5625 0x198f78fd, 0x26f1fa43, 0xb2627acb, 0x3d8ff9c0, 0x6dff122c, 0xc1f7a067,
5626 0x7e81cf77, 0x503943e7, 0xfa156fba, 0x72cd1eab, 0x3c02cc4d, 0x3f8d247e,
5627 0x531c0224, 0xaf4fdbce, 0x1ea0f717, 0xae7deb0d, 0x3e37f209, 0xb689d9b8,
5628 0x6966ec71, 0xdb5bb22d, 0xd01357b2, 0xa82c95ff, 0xcb4947d7, 0x3bb63c65,
5629 0xd5cf7b78, 0xb64fe48b, 0x76903aae, 0x865bf784, 0xfa8e26fd, 0x61ba187d,
5630 0x1a481632, 0x55c91914, 0x2fec45e2, 0xe5cda1ec, 0x66fc5fd8, 0x215fd287,
5631 0xe775f7f6, 0x65e3e469, 0xbc085756, 0x37279386, 0xb38b2393, 0x8e48e322,
5632 0x9424b124, 0xb8ebcf23, 0xe49df2dc, 0x861d24fa, 0x1fb43499, 0xc4ae7e25,
5633 0xe8e383d3, 0x243d3235, 0x61c74219, 0xfde80d57, 0xddb7aa3e, 0xe749c9b1,
5634 0x0b3e304b, 0x6c75ab45, 0xeaf3ae05, 0xdaf37092, 0xa4a0f410, 0x018e505b,
5635 0x468bdfdf, 0xb9b3b523, 0xe1a3b79c, 0x56cadced, 0x32625c11, 0x6bc842fb,
5636 0x6e5a7d25, 0x4e2c81e7, 0xbe0f49b7, 0xae18f1b4, 0x3a3adbef, 0xc69cf413,
5637 0x04ed11bf, 0xc92d09df, 0xfb6d44d7, 0x78013d8e, 0x79e3cb35, 0xb5cfef4e,
5638 0x7b40ff23, 0x915728f9, 0x7fc9f25f, 0xcc0566c1, 0x5addf2bb, 0xa3fd8fd9,
5639 0x29a21b6b, 0x2eb55cbe, 0x36a3f50c, 0xb07a2466, 0x85d13cea, 0x4560f401,
5640 0x1f410cba, 0x4af4b2fb, 0x3254d53c, 0x7c32e311, 0x728a9e5f, 0x583ef009,
5641 0xe1fb451d, 0xdeef65d4, 0x5be01639, 0xd47688ae, 0xe5ab9ecb, 0xfd2713e7,
5642 0x26e74351, 0xdb9c7cde, 0xb7fdb77d, 0x7bf41eb2, 0xb3e9c827, 0x7a41e768,
5643 0x77b3334b, 0x52dcbac1, 0xcdff226d, 0xb3c557ad, 0xb91a7681, 0x7da3c7a4,
5644 0x5335fdc1, 0x803ca1fa, 0xa67d26fe, 0xaa330fae, 0xa1233d45, 0xab6f9d4f,
5645 0x1a66703a, 0xcb56d3f4, 0xf6bb6e3f, 0x7d8471fe, 0x93f21af5, 0xf429f500,
5646 0x4dfe4093, 0xe78097d1, 0x191a3716, 0x32eb73c9, 0x41e519a3, 0xe49c25b7,
5647 0x1362db5f, 0x321ba1e9, 0x9ea18757, 0x8faaa86c, 0xdea474c6, 0xa77d03b7,
5648 0x7dffbbdd, 0xe4812d9e, 0x817f3f2d, 0xfa0c5984, 0xae7abdc0, 0xb6faf8e4,
5649 0x7944cb4c, 0xc3f2a1a9, 0x8b7dffbb, 0xac077d0f, 0x3490f085, 0x7e0f912c,
5650 0xe29bbe00, 0x2fdf02d4, 0x444e6740, 0xabae74f8, 0x4243e507, 0x8b1baf9c,
5651 0x56ce9ab6, 0xcae2f9d2, 0x5d33e238, 0x31e987b5, 0x18c8b2bf, 0x9f0ae7c8,
5652 0xfffcb5fc, 0xbbe71cb4, 0x59b81c99, 0xf7e337bb, 0xbe73a59f, 0x369ece19,
5653 0x154f230c, 0x9acf18fb, 0x4b6c8a63, 0x7d59eafb, 0xf6eafd48, 0xc567ce6c,
5654 0x643e7e7a, 0x72f4c54e, 0xfaf8c38a, 0x96c73c44, 0xa9f9cd93, 0x714912cd,
5655 0xd674b6e2, 0xdf037185, 0xf7f70d72, 0xdafff1c4, 0x3fc9d32a, 0xa2782ad4,
5656 0x3e78197d, 0xeb8695c2, 0x147306d7, 0xa6b7fd09, 0xfcceb972, 0xabc6331e,
5657 0x409a9da1, 0xf3dec1fc, 0x9198e9a9, 0x0bfe4c3e, 0xa49ef12d, 0xa3b7f00f,
5658 0x17fd1c5f, 0xdadddfc1, 0xbf6f86af, 0x984b86aa, 0x354f054e, 0x6669e1aa,
5659 0xe6c96c35, 0x361dfa7a, 0x490cfe75, 0x1ca7270d, 0x73f0d309, 0x7f01a6ed,
5660 0xbbf044b3, 0xa07e0199, 0x01769a0d, 0xafa525e7, 0xadb2fc96, 0x93dfdca9,
5661 0x73f6af5c, 0xb596b224, 0x6df90231, 0xfcb6f954, 0x73fa0255, 0x7cead56c,
5662 0x8c150798, 0xbff48acb, 0x9f95d724, 0x02e9718d, 0x4b3aee7e, 0xc5cde9eb,
5663 0x238b6875, 0xcf934a3e, 0x1fdd0d05, 0x95b8d0b7, 0x7c0f9076, 0xfa45e301,
5664 0xe62f840f, 0xc76726ba, 0x05f03e73, 0x7df997ee, 0xa503e43a, 0x41f8e1bf,
5665 0x3962c7e1, 0xab9ca26e, 0xa5b722b9, 0x97a9ab9c, 0x0475c7cf, 0x92b9c79d,
5666 0x81e7465c, 0x09aef4ae, 0xc877c50f, 0xce6cbe67, 0x946e9877, 0xdf20d7cf,
5667 0xef9cf4f9, 0xd5f0df30, 0xfd28672a, 0xafbcbcf0, 0xcc37b43c, 0xf8c071fc,
5668 0xab47b656, 0x82477760, 0xd3bcf039, 0x740ff843, 0x3a3337ba, 0x0f2b5a47,
5669 0xbf338be7, 0xe908d3db, 0x0b975a5b, 0xd66567d7, 0x338f3d59, 0xfe51ebf5,
5670 0xdff7979e, 0x38dd820d, 0xdb94c05a, 0xbb668da5, 0xccbdfd11, 0x57f2a19f,
5671 0xd5877e28, 0x31acd22b, 0x0188ff80, 0x4cd3823f, 0x33e34de7, 0x35118fc9,
5672 0x2b3771d5, 0xccf73c04, 0xa2046f98, 0x554e85dc, 0x658fc790, 0x97d0fd97,
5673 0x035e383c, 0xce02abfa, 0x0f441923, 0x3573b923, 0xe7014995, 0xff655bca,
5674 0x9b1f00c5, 0x7f609796, 0x7896cc3f, 0xd679863c, 0xda9fff72, 0x6ab8665f,
5675 0xd833b553, 0xdfaab27e, 0x722fd956, 0xfed5f6f3, 0xf4d5c337, 0x0ecfda61,
5676 0xb21cdf6a, 0xd576c1fd, 0x11afbc7e, 0x3e436f1f, 0xb5ffce18, 0x1ba7965f,
5677 0xf45e9e6c, 0xd818e97f, 0x06071495, 0x6a8898fa, 0xc369ff23, 0x5d5379f9,
5678 0xa60fdab2, 0x1f927e63, 0x90d647cf, 0x3e6048fc, 0x9859df8a, 0x47d7f287,
5679 0xbbf1e74d, 0x1371b960, 0x8798c179, 0xfd00dea1, 0x3f57f2a9, 0x46d3f7c2,
5680 0x3c42eec1, 0xfff3c783, 0x89abdd8a, 0xfa4bdf1c, 0x64b84a73, 0xdbde81b8,
5681 0xe32575ea, 0x3dc21bf7, 0xfeeb1835, 0x762ebb3c, 0x1b3de83d, 0x7c08c630,
5682 0x71bb3576, 0xfb84cfbe, 0xf58fa724, 0x27a21a71, 0x1d96ddcb, 0xb27a00da,
5683 0xa8695de8, 0xf2345af7, 0xa1fc2f39, 0x65bd6cbf, 0xfd10a6e7, 0x029bfa2b,
5684 0x8f002b5b, 0x956dba00, 0xfe81e6f5, 0xd0ee2496, 0x3163b406, 0x3fa90ab8,
5685 0xd2a35ce5, 0xeb37d35f, 0xf7ecab6f, 0xdeb3fa52, 0x559f1ea3, 0x59f1a1ef,
5686 0xe947fde5, 0x2f8e2b6f, 0xb4dd5f04, 0x1e8ed93f, 0x7aa96fe8, 0x8783567c,
5687 0x72d567c6, 0x7f40e1ff, 0xbfacdf4d, 0x931ef936, 0xe1d3e64d, 0x0e37fdce,
5688 0x1a76ab9c, 0x29b4ae51, 0x7f7940fe, 0xbfb414bb, 0x37f796ad, 0x714bfbe5,
5689 0xbddfe4e9, 0x18df33d4, 0xfdc35f6a, 0x247ac98c, 0x2648f593, 0xcf0891eb,
5690 0x3ea67a99, 0xf0b0e81e, 0x22f9b6c5, 0x1e73e3ec, 0x153e333a, 0xf62f19e0,
5691 0x5f6117cf, 0x99e2f39a, 0xc9f04903, 0xccbe2fcb, 0xe6787fcb, 0x9b94324a,
5692 0x2fcdef7c, 0x962a3803, 0xde0ac7ef, 0x8db7bf4a, 0xbba37ae2, 0xbfee73e1,
5693 0xfb8af904, 0x87aa6356, 0x42f17fa1, 0x32d47f72, 0xe94eefa8, 0x310f2cb7,
5694 0x6eea4a2f, 0x467e4f38, 0xff287914, 0x40bfe1e6, 0xee53cfb4, 0xefab9467,
5695 0x6d454467, 0x8c2ffd22, 0xef28cdf9, 0xba0e8c22, 0x28d6f84f, 0x642c1fbe,
5696 0x376e0af6, 0x39f25948, 0x31cfba0d, 0xd76e58bf, 0xb1cfcb7c, 0xb1c6a17c,
5697 0xdfd9ed1e, 0x478aaa4e, 0x173958f5, 0x7f783797, 0x1bf5d772, 0xbe0e1f9c,
5698 0x23e7393f, 0x23c2eb81, 0x3ba5bfb8, 0xb9f7e257, 0xa886fc02, 0x9f370ef7,
5699 0x7db8a3b5, 0x0e9f383f, 0x0e319f3e, 0xfee69f3e, 0xfeb0b5a8, 0xcb7ee8ee,
5700 0x5d9fc413, 0xc86be721, 0x5fcd06bc, 0xd8a628fd, 0xb7a45a79, 0x32b7cd9b,
5701 0xc1f9caaf, 0xa2ca4146, 0x794feafd, 0x3183fd2a, 0x8e2a14bb, 0xb819f483,
5702 0x4e6deabf, 0x5d19fe86, 0xcf073d9c, 0x45fe3795, 0xde5cf21b, 0xd63e796e,
5703 0xb9d38546, 0x3d28c6ce, 0x51dddbd9, 0x97fa1933, 0x9a74d345, 0x72a8b297,
5704 0x8da96f3a, 0x8f68ed65, 0xd7239f06, 0xce9bb88e, 0x68ad6901, 0x703a4041,
5705 0xa461d92e, 0xe8b989f8, 0xc5c8e786, 0x8f239d9b, 0x91cfc999, 0x7425e947,
5706 0xea45b459, 0x7f239e43, 0xf7df146c, 0x713c71bb, 0x278c3f88, 0xa21c706d,
5707 0x31d1c799, 0xf5f2023f, 0x7f231766, 0xc7de3cba, 0xea5075e4, 0x861ecc1b,
5708 0xb7ab40f2, 0x68a7a84b, 0x613ef9c3, 0x4e5869b0, 0xf7c8bf08, 0xfbe8e947,
5709 0x34cd724f, 0xd7231aaf, 0x5afce7cb, 0x7a4fe908, 0x4fe29475, 0xc3674d0a,
5710 0x0d3cc9d1, 0xf0a7473f, 0x9e9302e1, 0x302df7ce, 0x0fd14ad9, 0xef0800b2,
5711 0xfa8098b3, 0xf7e22db7, 0x0dbb4581, 0x5337e7e9, 0x6ff9ff6e, 0xb9f9ba18,
5712 0x43353e7c, 0x4ee3f747, 0x8f61cc09, 0xd57e7a19, 0x869e8ce9, 0x66bb9a6e,
5713 0xec87599d, 0xeff2e2f7, 0x867b6115, 0x167553e3, 0x779fec89, 0xa85ca146,
5714 0x0f1f5b4e, 0x42caa2f0, 0x94dfdd1d, 0x08ee44e3, 0xd19fc72e, 0xa28e4eba,
5715 0x51e7d178, 0x624748a5, 0xa3e22a7f, 0xea0289c4, 0x9e2a37bd, 0xd7e1cdea,
5716 0x18dea0c5, 0x7f67d394, 0x1eb462ef, 0x127a50b6, 0x302c4fda, 0x07cb236e,
5717 0xf302a3b4, 0x01627ed1, 0x2f2c27eb, 0x9085f6b6, 0x609a4a17, 0x0d5292db,
5718 0xd0909e7c, 0xff92a942, 0xee5b43ac, 0x57aeb10f, 0xc6fd75e5, 0x601b4c76,
5719 0x8ed0713b, 0x2ae5fb01, 0xd517dbce, 0x61e32ca7, 0x17657548, 0xe9b18ec9,
5720 0x88933e15, 0x1e6106bf, 0x45fb04af, 0xd5b0de75, 0xfba14beb, 0x6d38f2fe,
5721 0xa346d62b, 0x1c55031d, 0xbcdb9f48, 0x9965296d, 0xcec8e383, 0x8d13e991,
5722 0x17a889b6, 0x5c725ff3, 0x97f40ccb, 0x74349b24, 0x5326013e, 0x6e612f75,
5723 0x38b4f459, 0xccdd4534, 0x2ed0926e, 0x3f3d25ef, 0xf896bae1, 0x62f0e120,
5724 0xa4ab7186, 0xef0176b8, 0x23f40d03, 0x97ae6fdf, 0x5c57b9e3, 0x048e3465,
5725 0xcefec0eb, 0xf38d0ec8, 0x747945cd, 0x518e69e5, 0xe5d58fc2, 0xdcfc71c9,
5726 0xe1d5fdc2, 0x3ae8097e, 0x4057b6a9, 0x380c0138, 0x5c27c5f4, 0x426b4c6f,
5727 0x045af279, 0x6db58bf9, 0xf207cc99, 0x45745527, 0xfb3ce0e5, 0xc9a6ffa5,
5728 0xdf0b0790, 0x9c207cad, 0xa136b3f4, 0x25d90665, 0x285869f7, 0x1c98cf3f,
5729 0xc828c7ee, 0x609ffce1, 0x1ea94d6b, 0x44d3e987, 0xcf975f37, 0x1db39067,
5730 0x9f11d9f4, 0x1c58fa2d, 0x759a7bd4, 0x9b73e9a1, 0x7ec0efdc, 0x185fcf21,
5731 0x7f911973, 0x3b9382b5, 0xdbeef739, 0xce82cfb7, 0x55e74613, 0x8d7ac936,
5732 0x4e444ed2, 0xd846153b, 0x45cf0c1d, 0xdf07660a, 0x9b3ecc07, 0xf9abd60f,
5733 0x7b486d2b, 0x791cc1eb, 0xb26b491f, 0x4cb2fd61, 0x94fd0dbb, 0x1a55f7c1,
5734 0x70da26d3, 0x0c671a7d, 0x7031a9d0, 0xcb4ee85f, 0x53cf1f7e, 0x2c747a99,
5735 0x70591cf0, 0x2173c7aa, 0x972837b1, 0x1d3797cf, 0x9b42e7e2, 0x78bd454c,
5736 0x14c9a10e, 0xfec74457, 0xa99cfc4c, 0x3a64df52, 0x64def246, 0x1356f1e7,
5737 0xa2020fee, 0x3ba1e7c7, 0x83cd18ed, 0x0e5a6f52, 0x7b26ab97, 0x5bfbc317,
5738 0xd53f76e1, 0x3e9d130b, 0x161fe00d, 0x4ffee8c7, 0x55f39198, 0x318fac04,
5739 0x7e95ef80, 0xd1d1cb6f, 0x172535bc, 0x7e1096f5, 0x6704de22, 0x1b22b64d,
5740 0xdf38dbed, 0xb4636fd0, 0xaf9cdf42, 0x5be7971f, 0x3e51a769, 0x434f7aff,
5741 0x58b2fcce, 0xd73913f4, 0xa6bb60e4, 0x83b446e5, 0x6fe391b4, 0x6186ded8,
5742 0x285e6bdb, 0xf238f7b7, 0xc8b23685, 0x50e9ed8c, 0xc3a0845e, 0xfe76e467,
5743 0x30ede357, 0x97df74b3, 0x9f305a60, 0xa3de942d, 0xa38c46a4, 0xddfa1b8f,
5744 0xebbf9637, 0x90247ed4, 0xfc717bbf, 0x1ecf932b, 0xee1ca12b, 0xdb2eda3f,
5745 0x619d8a27, 0x2ededb91, 0x3ee87bf0, 0xef4edc21, 0x8776c836, 0x0f3d4c25,
5746 0xf941f783, 0xe0ae5c3a, 0xc72ee6e7, 0x046b8a31, 0x77e5f3f3, 0xb40e8a3e,
5747 0x73ef504f, 0x04bb7364, 0x1c4bb453, 0x610d9fb2, 0x9da01bf4, 0x80fdf0a2,
5748 0xfa42b75f, 0x3f005ba7, 0x0d6fc803, 0x7b242bb4, 0xc90dbe88, 0xe7c8697d,
5749 0x053bf2a9, 0x5cd7f643, 0x4785a72e, 0xfe434b3f, 0x4feb8b2e, 0xf982efc0,
5750 0xae4785fc, 0x5e78e026, 0xce703198, 0xab43e286, 0x7bf3a717, 0x1cffc7d9,
5751 0xfed10aed, 0x457feecd, 0x86b4dd9d, 0x5ce5c0f4, 0xdf5bfc0f, 0x8cbedb07,
5752 0x821d9deb, 0xcda4efda, 0x5fe77ae5, 0x7acc7de4, 0x2df7a455, 0x2eb965ce,
5753 0x0ab61f20, 0x7f28e5e6, 0xe7e11f53, 0x5e3f56e6, 0x2103d9ff, 0xed1841f8,
5754 0x804e73fa, 0xacdc5c3d, 0xa35a3f27, 0x8dc47d29, 0xafc31ce2, 0x71cb87b3,
5755 0x1e4b7d79, 0x24f3f235, 0x5b17ae2e, 0x39d3f75c, 0x23f3e095, 0x243bd5c3,
5756 0xbea53dcb, 0x7947db01, 0xfe479a62, 0x23684b80, 0x964dbfa0, 0x7678c17b,
5757 0xf3c864e2, 0x12b90463, 0x18456875, 0xed93abb6, 0x3f8aedb1, 0xe8c8a2a3,
5758 0xb75ef808, 0x1a58c8b8, 0x8c8d2f40, 0x6e0ddf9f, 0x01dcceff, 0xafa55a7d,
5759 0x459f70e8, 0xf89c50df, 0x433901a7, 0xcab8658a, 0x0ffa518e, 0x70163f3e,
5760 0xf38c2c5e, 0x5a67b729, 0xe818dcf1, 0x962b6bb7, 0x6df9c48f, 0x582f5d15,
5761 0x3ffa1e61, 0xe739d030, 0xecbe650f, 0xb872f993, 0x43b1f3f5, 0xf6318ca0,
5762 0x97823b04, 0xc64e80d6, 0x68fe408f, 0xfb94d4cc, 0x5cb38c43, 0xfd08671e,
5763 0xafdcd6fa, 0xe6975fa7, 0x51afd086, 0xc504767f, 0xd461021f, 0xf4211d9b,
5764 0xec8213eb, 0xedcf900f, 0x1d49d09c, 0x270f307d, 0x6f611d6e, 0x919ee894,
5765 0xf6045ec3, 0x32678bc3, 0x239f6f51, 0x23c7bc0c, 0x608c31db, 0x221623b0,
5766 0x6799735e, 0xc50203df, 0x48ee5a51, 0x5c04eea3, 0xa7ad9b8f, 0x3711fb24,
5767 0xdc613ac2, 0xb2daf5a1, 0x0ce2a119, 0x274038ff, 0xef02ba28, 0x042ac007,
5768 0xc48695c4, 0x63e282cb, 0x38194e18, 0x5a1dabff, 0x7562aeff, 0x35e36afc,
5769 0xac30bfee, 0x0427fe60, 0x2eaa1f3c, 0x0bae5f9f, 0xe2a9cf8e, 0xba9d0b5a,
5770 0x887c7c60, 0x6f8cb26f, 0x2907b6ca, 0x452d3e0e, 0x64acfde4, 0xc707cf64,
5771 0xbd850cbd, 0xc3ea2d0e, 0xf7f48c15, 0x9e363f60, 0x5eff2517, 0x09cf6305,
5772 0x7d5ade74, 0x59e9e4df, 0x1cfbf8e7, 0x8fd8e52d, 0x50c3532d, 0xafbe0e3f,
5773 0xf09bc4a0, 0x7de04c98, 0x22dde569, 0xe10d62cb, 0x53b77cc7, 0x8797e2b9,
5774 0x4b12a6fa, 0x55eeb9c0, 0xdd3ea06c, 0x1e85f2a3, 0x59d6d6f7, 0x1c4fef14,
5775 0x82ec29ef, 0xa33b24a2, 0x66aa4879, 0x3cc00764, 0x86fae2a8, 0xce345d94,
5776 0xc58c354b, 0xaaa038f2, 0x7076013c, 0xbf184fa4, 0xe30fce2a, 0x76c1c154,
5777 0x4deccde7, 0x0de64a43, 0xfccdf9e5, 0x5e39068d, 0x646e46f8, 0x633be91c,
5778 0x77d418d8, 0xa69f8b2c, 0xeb04b8f5, 0x34597e81, 0x03c54284, 0x68fb4337,
5779 0x5f90ba07, 0xc4dfd1e2, 0x30caef54, 0xc9f74887, 0xb38e6284, 0xf1e4eb10,
5780 0xfc467ce1, 0x9507086d, 0x9859f80b, 0xbce0706c, 0xc3000c1b, 0x333d0590,
5781 0x56be4026, 0x15af37f6, 0x33308898, 0x4fdc8ddb, 0xe36bbca8, 0x866d77a7,
5782 0xff7407eb, 0xcfec30be, 0xfa53bfc7, 0xdb8ef219, 0xfb27be0d, 0x7dfc1ccd,
5783 0x951df919, 0xff9b87fe, 0xfb6ddee1, 0x2777d4c3, 0x3267bf70, 0x20e56bd1,
5784 0x4cbc12bd, 0x1efc47a6, 0x4abdc2e5, 0x0c77adb1, 0xfb3c37de, 0xfd1d8470,
5785 0xf0e303e0, 0xefe5a9dd, 0xed75fdd1, 0x9361e00d, 0x8c0fbe48, 0xafef6e4b,
5786 0x02fd171d, 0xbc06dae4, 0x4fe78434, 0x279d192a, 0xcf4ab8b0, 0x000e7489,
5787 0x1392a0c6, 0x4013ef01, 0xf10e1b7b, 0xf15baf73, 0xb0710b9d, 0xd02bd45f,
5788 0x4255b06e, 0x483b087e, 0xbf19ab49, 0xd5e0ac1f, 0x1a3d07a8, 0xf5c352e9,
5789 0x3ea6d9e8, 0xe935cf11, 0xe445fae2, 0x2e68e71f, 0x37e807c7, 0x0bf9d19e,
5790 0xce7c926d, 0xdfc4a471, 0xfbe4cb4d, 0x84cfd29b, 0xfe591ad1, 0x47fbd2f7,
5791 0xd54e23b3, 0xf2c6764b, 0x442fc5f6, 0x11ecfcff, 0x00d3eaa7, 0xe167d82e,
5792 0x2ba9d270, 0xecc66669, 0xd10bacfb, 0xef3b3f9f, 0x807495d4, 0x78d9f68b,
5793 0x464614f9, 0x097df8ce, 0x319fd10b, 0xd559b461, 0xd7385bfe, 0xd53cdff1,
5794 0xcf21341a, 0x5a36df63, 0xe8c94f39, 0xf3b3ad3e, 0x2e31a797, 0x47f654e9,
5795 0xdf482e87, 0xde0b2281, 0x717f9323, 0x9d0f1451, 0x9dd9d329, 0x1452eef8,
5796 0x68bb2dfa, 0xfa0d477e, 0x6bfe9fe9, 0x4382f4fc, 0xccca9779, 0x1bff812a,
5797 0x2c2b981b, 0x99ee8023, 0x9f9d7343, 0x81b8a603, 0xffd28f82, 0x6960bc10,
5798 0xbc4098c5, 0x0a3b51b6, 0x0d0a175e, 0xc70587a4, 0xfd082e87, 0x549cf1db,
5799 0x2fd6cfc4, 0x10ba75c2, 0x002a9fd9, 0x9eb79e1c, 0x7c42edd6, 0x1ec176ff,
5800 0x3af8eb00, 0xa22bef56, 0xd6a3fc75, 0x027a3d51, 0xdfc5dbbe, 0xe396686f,
5801 0xbbc64f50, 0x019f687c, 0x32b9d1dd, 0xfc9e8a5f, 0x05e36548, 0xb03fa047,
5802 0xcbf7346e, 0x69d3925c, 0x49cf1686, 0x01f74ba0, 0xfa85ad81, 0xf5976bee,
5803 0xeecc9fa8, 0x3d47a33c, 0x19c0eeba, 0xad4bde3d, 0xa9da1843, 0x8477a6db,
5804 0x32feffd2, 0x97f2ab5a, 0xd1d77629, 0xe8f5ec94, 0x16abab77, 0xeade1ee8,
5805 0x6e1fb9d7, 0x251c32f5, 0xb2df7763, 0x55b8fc9f, 0x98f5eece, 0x477d652e,
5806 0xc588ddf1, 0xdceaad2e, 0x089a92c0, 0xcabe3c55, 0x9782ab13, 0xc0eac0b6,
5807 0x21b4bb3e, 0xc31df549, 0xef82cf5d, 0xd0fe0e28, 0xd790affe, 0x736db171,
5808 0x16bbfa2f, 0xcc7ad4bb, 0x62b5ceec, 0x11ede20c, 0xfece1aec, 0x84b77e12,
5809 0x00d2108f, 0x7de60abd, 0xa3d7075a, 0x648c2aea, 0x0c22549f, 0xab595af3,
5810 0x7393e3f5, 0x54f45347, 0xa810eeee, 0xbb972ddc, 0x576e046b, 0xa975f2cb,
5811 0x8392e38c, 0x75d1a727, 0x37a39f52, 0xa5df0033, 0x88e7e515, 0x437d651e,
5812 0xc4855719, 0x290d8df5, 0xddb0e9ef, 0x5817dfa5, 0x4b8d1a6c, 0xa92d47a5,
5813 0x1e55c351, 0xd59e905d, 0xbdf943a7, 0xff9d41b4, 0xbef2d1f3, 0x90f2c79e,
5814 0x2d18de9f, 0x07189f88, 0xbca53fe1, 0x81ef0277, 0x0f3ad25d, 0xead67d22,
5815 0xdf700abb, 0x1175a4bb, 0x7e4394ac, 0xb8afdf1d, 0xce01a2be, 0x751befc3,
5816 0xa7de330e, 0x8814adf5, 0x00b0976e, 0xb06d27bd, 0xa1dac13e, 0x7722bf70,
5817 0xe4f59cc3, 0x98283d0f, 0x13286f51, 0x83de221d, 0x8fc61c6f, 0x83e6517e,
5818 0x1f2fac13, 0x2246caf1, 0x9eca7585, 0x99f6823f, 0xf996b7ec, 0x3d948e30,
5819 0xc4bf204e, 0x4371809d, 0xc922a611, 0x37b03991, 0xad9a4184, 0xf920af6d,
5820 0xe66f563e, 0x58da62ef, 0xfc70bca0, 0xbe701333, 0x0bb27510, 0xfde87b93,
5821 0x9b6d39bd, 0xcc5ca22f, 0x3d1470cc, 0x193df805, 0xf27ffbc6, 0x16bfc175,
5822 0x3fcba9da, 0x0ad3f246, 0xd6fd81e4, 0xda3964d9, 0x5acff6a1, 0xc121ae51,
5823 0x7ea7cacc, 0x32f89413, 0xc3ed15d0, 0x9fa4a55d, 0x9f7ee558, 0xddb8942d,
5824 0x2e7ca0fc, 0xe2d6f98d, 0xd1befaf9, 0xf495f28c, 0xcaabfb1b, 0x5e283104,
5825 0xe61a3750, 0x4fada579, 0x5be9de75, 0xe901bf6c, 0x187db82c, 0x395e2abe,
5826 0x8a2d7b4d, 0xcc1d77ee, 0xfee8deb0, 0x3ea8d694, 0x8733a4b7, 0x53bbdd07,
5827 0xf6d99fcb, 0x777ba0a4, 0xeef74119, 0xddee82f2, 0x2df9efa9, 0xba094e74,
5828 0xe7bea777, 0x54cdb067, 0xe6930fd5, 0x9c88e0a9, 0x23f555bb, 0xe7d5cbed,
5829 0xbcff8eae, 0x77c74842, 0x2e7d7d06, 0xe0668798, 0xc198e28d, 0x0a2f247d,
5830 0x3e1a432a, 0x6984cc2e, 0x0ba1a173, 0x9139a4e9, 0xe386e7db, 0xa0badb0f,
5831 0x9788e31d, 0xfc6fe88c, 0x452fe089, 0x9f28c4fb, 0x18fd1953, 0xaf33ed53,
5832 0x52be7015, 0x5cf2dbd2, 0x7d61f3b3, 0x494af7f2, 0xdee01dfc, 0x463eb8d1,
5833 0xf9036c7c, 0xaf7e55e6, 0x476cac78, 0x5f3ced28, 0x0f353258, 0xcc7fcfbe,
5834 0xece28331, 0xf07efc1d, 0xa78f3d4e, 0xe7e55ef8, 0xfa3bf35b, 0xfe008e34,
5835 0xf5c7993e, 0xa59c6790, 0xeba91f14, 0xf9165d84, 0x1eaceda9, 0x75d465ef,
5836 0x7ee14776, 0xab3ce056, 0x60c9bf47, 0x89cfbcbe, 0xaf68e1fd, 0x743dacff,
5837 0x9e6d6d3c, 0x98e3f89e, 0x1eabd72c, 0x91bb72d6, 0xb9e16639, 0x575e4571,
5838 0xabe3e7ed, 0xe7e7a85a, 0x1d1a3160, 0x9c836e42, 0xc396ab3e, 0x707ef50e,
5839 0xca3d7f8b, 0xaadf900e, 0x4c174b7a, 0x12b7bb27, 0x31f236e4, 0x797573c8,
5840 0x17c91372, 0x7caae790, 0x3c80de77, 0xdf0ebfcf, 0x426a769d, 0x8170f38e,
5841 0xda78f348, 0xffe69535, 0xf4479819, 0x64333da7, 0xde7cf8de, 0xc65ebe6c,
5842 0xb7580fb5, 0x2ebf7ae0, 0xf2f6ebe0, 0x7dfaf230, 0x0a775d79, 0x4c2845bd,
5843 0xa270cedd, 0x634625db, 0x387b9e09, 0x1365f296, 0x7eaae1c6, 0xfd3dd02e,
5844 0x6e3eeb7f, 0xbf5ffd41, 0xfd05a8ff, 0xa3f6ee61, 0x594db016, 0x8b5a4ead,
5845 0x85d03c7a, 0xba9ef51d, 0x7fc22e8e, 0x6eb8fb65, 0x21d95fcc, 0xee3dfbd0,
5846 0xd3a71703, 0x135f5938, 0x0e770bc6, 0xf28fd783, 0x37befeb8, 0x307ee24f,
5847 0xfb89f417, 0xdf8301fd, 0x801d202f, 0x5ebc425c, 0x35e5f017, 0xb1a373b6,
5848 0xf51e9422, 0x1f7cf26f, 0xe867a8d9, 0xef85afaf, 0x52c71c71, 0x488de98e,
5849 0xb205fb47, 0x27edddb5, 0xfb604617, 0xfa863af5, 0x17df8285, 0xe21fbd29,
5850 0xd6a83ff8, 0x3580a7a1, 0xbe696b56, 0x52d7a83f, 0x74fbda3b, 0xc15e2f04,
5851 0xae1c55cf, 0x0929a8fe, 0x56a0fdda, 0x530c7ba0, 0x31f3fbef, 0xe0af1784,
5852 0x3d305afa, 0x4c1af42b, 0x3bf4c19f, 0xbe6b4e84, 0xc91e9d19, 0xe4d5ef93,
5853 0xe7dc02b1, 0x59a7dd61, 0xe11e7e91, 0xae2be3f7, 0x7fa1d61d, 0x6cc9bd33,
5854 0x31e0027f, 0x0b7aff5a, 0xbcc389ca, 0x8776b0bc, 0x748de5c0, 0x5261f237,
5855 0xbda19eb3, 0x971e7efb, 0x7ae3ef4b, 0xfad0e3c5, 0x31af8c05, 0xe51d37b1,
5856 0x4f1c9a52, 0x2ac7457a, 0x905c53f6, 0xaf319bcb, 0x96ef54d9, 0xbd71e537,
5857 0x40839143, 0xe4fdaee6, 0xc44f6d97, 0xcb2f147b, 0xe55341e7, 0xfa32b2f6,
5858 0xf485cfa7, 0x672f4caa, 0xf8143c64, 0x6cff4cb2, 0x1f68cfdb, 0x59c72d9f,
5859 0xd1743666, 0x833ccc79, 0x879453eb, 0xabdf52b3, 0x39ae7dc5, 0x3a7cedfd,
5860 0x25378d67, 0xc9fbe226, 0xd27877fc, 0x60d6dba7, 0x9c372fdc, 0xe0ec31d6,
5861 0x381e7453, 0x35bc6b2c, 0x49439c54, 0x7a2557dd, 0x6aeeb08f, 0x3c0aa53a,
5862 0x7d39d0f7, 0x1701d91f, 0x5c9f13a7, 0x2ddea9b5, 0x7bc654fc, 0x5d3ef28c,
5863 0x80f3f727, 0x8b8b169c, 0xf329eb06, 0x1c659e80, 0x2ed6586f, 0xab35af5a,
5864 0x75a92158, 0xcefe29ec, 0x0149ed66, 0xa458bddf, 0x304ce873, 0x608defdf,
5865 0xfc8b1f25, 0x3657241d, 0x748c4dc6, 0xd784fb2f, 0xd7af704c, 0xaf29f046,
5866 0x61ade944, 0x687c88ce, 0x4f11e167, 0xe1dbce16, 0xde275694, 0x8ef0bc57,
5867 0x336ba64e, 0xd32e2fbf, 0x2d4ee5da, 0xeb9c6233, 0xc2e3e800, 0x5cf7fe20,
5868 0xddfba44d, 0xa0fec3bf, 0xbf0d959f, 0xaf677921, 0xed1d38b9, 0x33dac2a2,
5869 0x1bbb084d, 0xf51d3cfe, 0xff610f89, 0xf41ebd20, 0x72809b7b, 0xd3bd24e4,
5870 0x8635795d, 0xd35979da, 0xcbf91d3f, 0xf740a6f7, 0xb8ec3e6f, 0xfdf2b7a8,
5871 0x7873dc89, 0xf2fd1c2f, 0xb9a3f2b3, 0xd42ce91c, 0x243afad0, 0xddeb3bd5,
5872 0x0a2bffa3, 0x20d8c3d7, 0x7e0a7afd, 0xc865a3df, 0xfb4a9bbf, 0xe421cca3,
5873 0xdff469ef, 0xb071f365, 0x15e5a1ec, 0x9e165f7a, 0xe990ac93, 0x3cbcb838,
5874 0xa13fc07f, 0xebefca73, 0xa1fe0108, 0x3fdfc62a, 0x2ba7bb05, 0xaab8f81c,
5875 0x67f92a73, 0x0dc23caa, 0xd1c333fd, 0xeb4dd7e1, 0x28cff718, 0x818dda30,
5876 0x1bb44d7e, 0x1f7faa99, 0x252b077f, 0x74f786f3, 0x14897ddc, 0x666bafcf,
5877 0x795aef14, 0xe7a53475, 0x2120df5f, 0xfbc318ff, 0x6b7ee95b, 0x8cec86b6,
5878 0xfeb53e95, 0xcb80a533, 0x7c052985, 0x60f95cde, 0x01b0e52f, 0xa2ec097b,
5879 0x5db9f37b, 0xa9887514, 0x7ce0a5ec, 0xf28c97b2, 0x13101d3d, 0xe04257ae,
5880 0x6941477d, 0xca977e0d, 0xd9ce885a, 0x72fefc3b, 0xe4d738f0, 0xf8553e73,
5881 0x35f2317a, 0xe7076fd2, 0xe776e0eb, 0x41ac9415, 0x4c38da3e, 0xe65cab7c,
5882 0x8c6d95fb, 0x16ddcbe6, 0x05f4f343, 0x0296736b, 0x78017e5d, 0x0bd23de0,
5883 0x3444674e, 0xe5c17f7c, 0x3df3c08c, 0x6ba81c8a, 0x36efa70b, 0xc58bce66,
5884 0x48cda373, 0xf9ded0f7, 0x9c46a98e, 0x38da7be7, 0x7dfd29ff, 0x1638b5d8,
5885 0xae8269f9, 0xf2876f5f, 0x5133cee4, 0x784df7a8, 0xf22c7e7d, 0xfe7870e1,
5886 0xcf1918fd, 0x1e12c486, 0x70bd8797, 0x004f6ca2, 0xba27ee7e, 0x87fa9de8,
5887 0x6fd1181a, 0x56ffabf7, 0xbe7c7c87, 0xfb8cc233, 0x230717e6, 0x0bcabde8,
5888 0x3de81a6f, 0x7df95a9a, 0x7d742fd5, 0x7cbf4873, 0x22f74b5d, 0x47fe6fdd,
5889 0xfba3f22b, 0x3b9d0355, 0xc373a87c, 0x6af7dc45, 0xc39c673b, 0x5f6b5677,
5890 0xc3f2dbfa, 0xd25486ca, 0x3ff8148b, 0xbe2746bc, 0xe45e7bf3, 0x8ea1e272,
5891 0xf77d217f, 0x0b976ba1, 0x17ca7cf0, 0x44c7ff07, 0xb7ee6b94, 0x79444f2e,
5892 0xe5c5fee6, 0x7eee5889, 0x4a13c22d, 0xc05eb95f, 0x7eca3efd, 0xa8aef699,
5893 0x90ad0ff2, 0x5d6d23e9, 0x3d07bd0b, 0x7b02e4e1, 0x130fbbe0, 0xac4e34b2,
5894 0x65b7e13f, 0x7c05f7b1, 0xa457aeb7, 0x93f8e338, 0x01d51165, 0x814f7974,
5895 0x7e2ff14e, 0x930ebf23, 0xf019c7df, 0x77f2f4e3, 0x8af6367f, 0x1aa37dfc,
5896 0x83a1ee81, 0x5ee432fe, 0x8affad1a, 0x88df7a58, 0xc73bce89, 0x8b38478c,
5897 0x3e6205de, 0x00ccd1e3, 0xaf71693d, 0x7400cba6, 0xe869d154, 0x57befd22,
5898 0xacb0433c, 0xf173dd3f, 0x2134c8d3, 0xe7267f84, 0xe39434d4, 0xf81a7ec1,
5899 0x8ade2245, 0x71e955be, 0xc1fe20a5, 0x15a59bfe, 0x287f9077, 0xd6937fd8,
5900 0x8f666a2b, 0xe9dff7c7, 0xf78c2f3a, 0x8bf22369, 0xfae287a2, 0xffc1081d,
5901 0x3970c66b, 0xbad5f0a6, 0x5dff1e5e, 0xcc6a5bd7, 0xe656b484, 0x9db003ab,
5902 0x75fda0fa, 0xa377f39d, 0xb5dd611f, 0x60631145, 0x3bbdd6be, 0xfc813d8f,
5903 0x66352e6f, 0xeed777e1, 0x1fcc2e30, 0xfee097a4, 0xf2e18ca6, 0x184f4072,
5904 0x97cbdf66, 0xed5bfaf1, 0xe463397f, 0x87ff6cf3, 0x87607fef, 0xedc31d8f,
5905 0x4fdc25f0, 0xe0f0edc2, 0xc791437d, 0x792ebb4a, 0x63ca879d, 0xc04877fe,
5906 0xec79265e, 0xbd51231a, 0xb1b9cee4, 0xbbbf4764, 0x0d325620, 0xb4433f6d,
5907 0x87f2626b, 0x71e8afb6, 0xa8e39f6e, 0x871ced11, 0x1749fb96, 0x99bef408,
5908 0x9db9f7a2, 0xeee3e902, 0xeb1f9d4a, 0x2ef57829, 0x85d57ee0, 0x4c3f9d0e,
5909 0x150fd418, 0xdca071fd, 0xa2b9502e, 0x637a2a4f, 0x71fb93af, 0xe5e78c17,
5910 0x16b986b7, 0xd87d7ce1, 0x13f94615, 0xc67cf126, 0x0093479c, 0x813df45e,
5911 0xfacbff11, 0xc1a742a4, 0xcea5e6fa, 0xd7be1b8c, 0x4fa64db3, 0x8352cf85,
5912 0xbfd943f8, 0xdd39f39a, 0x1dfee1d7, 0x7ff7fb8b, 0xe0f2f4aa, 0x7eff6176,
5913 0x466ff108, 0x1fbe121d, 0x19d15bff, 0x4aff3eca, 0x5efe0bd6, 0x23debf59,
5914 0x72af8825, 0x7db8764e, 0x6fd64eb5, 0xce6f2b86, 0xbcfc7aff, 0xdfdf1e47,
5915 0x8e779f8a, 0x9f43bff9, 0xf50bd01d, 0x4779c7a1, 0xc64fc941, 0x6b86bcc0,
5916 0x739e743d, 0x1ecdf7b8, 0xb055f595, 0x7c745573, 0x41af4534, 0xc35dc8bb,
5917 0xd1cd03fd, 0x7ec9afd2, 0xf7a5ae39, 0xef921e57, 0xd5783e73, 0xea2d694c,
5918 0xd92e90c9, 0xd9de927b, 0xc6a3525d, 0xb77d19bf, 0x34aafdf8, 0xb157eb8a,
5919 0x552bf232, 0xf19b4675, 0x7c737fbc, 0x2be431fb, 0xb4ad6edf, 0xc6feb03b,
5920 0x237d72d1, 0x44d5b7f7, 0x618fdfd3, 0x95407a41, 0x57df5827, 0x645305eb,
5921 0xfa70d13f, 0xc3ba2fc1, 0xd1e95cb8, 0x39d79f12, 0xd055dff9, 0xe0b97277,
5922 0xbf23086e, 0x886bda09, 0x820d67d7, 0x5f3ddf1f, 0x4cfbd729, 0x13ff25ec,
5923 0xcaa0d3c5, 0x2ca7ceb9, 0xd4dfb20e, 0xbb95a3f1, 0x33724b7e, 0x73148e38,
5924 0x0d0b8e40, 0xd2268dc4, 0x60959079, 0xbc9fe24f, 0x5dd24b72, 0x1f80ff38,
5925 0x71dc93f3, 0x9730fca8, 0xfb223e7a, 0x3cebc973, 0x7e2433fe, 0xc7933cd4,
5926 0x95ddf08f, 0xa5c87e10, 0xc51d8f23, 0xb374a3bf, 0xc75d51b8, 0x3247ba49,
5927 0xd208ff44, 0x518dae3b, 0x8a4719fb, 0xb23b8fdc, 0x7fa33053, 0x8f3ca46a,
5928 0x9c31b77f, 0x7fe9eaf4, 0x79458ea8, 0xf9d3aca0, 0xcf5e7cb9, 0x04a5707f,
5929 0x07f89bbf, 0xe3061cd1, 0xf507c5fa, 0xb0e249bf, 0xbbf09464, 0x63b408fa,
5930 0x7561ffce, 0x2febce04, 0x2fbfc520, 0x3169daf1, 0x2bd23fa4, 0x0fd82dcb,
5931 0xbfc80ba3, 0x45a5fb2c, 0x07230fd8, 0xdfc139fd, 0x6bbf976d, 0xfc853306,
5932 0xf8f3af98, 0x6b82737e, 0xa6cfc126, 0xa61efe33, 0xffcefc83, 0xfe8d7402,
5933 0x2c183ca2, 0x1a7f9fc6, 0xbc61d6ce, 0xf5de39a8, 0xb3d1f136, 0x08f9091a,
5934 0x9338a7be, 0xfb44bf6f, 0xc6194e23, 0xfcf40a73, 0x0cea465d, 0xbcb46bd6,
5935 0xc760098e, 0xb0093c62, 0xe6f18059, 0x53ae393c, 0x6c44ce10, 0x6b9d49ff,
5936 0xf997be13, 0x5f68b764, 0x8f604c4b, 0x83bf77c5, 0x83824be3, 0x3895c5c7,
5937 0x1f1f1293, 0x6024ce2e, 0xee9c053f, 0x8715b9f8, 0x25737180, 0xe7bec49e,
5938 0x635720a4, 0xf7ce87b1, 0x48c8533f, 0x718b7fae, 0x21f9259e, 0xc83548e2,
5939 0xd5cf2463, 0x394dc571, 0xfe9d10af, 0x3dc4f1b5, 0x1cb7d863, 0x13f3e2ff,
5940 0xe8f8f78c, 0xb7b2164b, 0x51effabe, 0x5e76cfb4, 0x42f0fda6, 0x8fbe41bf,
5941 0xecfdc7d0, 0x2ff23a9d, 0x2dbb005c, 0x3d9f603e, 0x3ddbcf9a, 0xe89539d4,
5942 0x596f40ff, 0x2f3fd604, 0x777c6fe7, 0x48d9fcc1, 0xbd22bd97, 0xe3e78b07,
5943 0xd03b0ed0, 0xbd404e2b, 0x975c5be5, 0xb1098fef, 0xd0f0c62e, 0xcbe44cef,
5944 0xc05f947c, 0x07ea63e9, 0xd772fedc, 0x598a38f3, 0x72ee0b96, 0x63c1c93d,
5945 0xf1411629, 0xc5435b9f, 0xa7ef5e59, 0x856aa37d, 0xbe1cf740, 0xa3a59c71,
5946 0x82b7de5b, 0xd3e5d3fc, 0xe70e6e49, 0x9b880eb7, 0x15b7caab, 0x23879c0c,
5947 0x815475ff, 0xe31dc699, 0xb3c12c29, 0xbff8ca87, 0x73b875c5, 0xfb3a086c,
5948 0x695fdb16, 0x9fdb6eff, 0xb6ddf792, 0x6e3be6bf, 0x77de6d7f, 0xf1dee71b,
5949 0xf57fe31d, 0xccff6e3b, 0xaf3f3c77, 0x73ffffe5, 0x70700300, 0x5cf83f9c,
5950 0xdfbc7040, 0x1f3efc70, 0x36106d96, 0x6a4177f7, 0x42b57a8c, 0x462d5100,
5951 0x0877a2ef, 0x71e24d66, 0x46658db0, 0xf0610eff, 0x5f32807c, 0x1db90b4b,
5952 0xe8bfce61, 0x4e79858b, 0xc596f475, 0x126c9fa2, 0x82fd877f, 0x132acefc,
5953 0x18cef4cd, 0xfbc04cd4, 0xa161cdf1, 0x7261aae3, 0x23edc37b, 0xdc9617cf,
5954 0xfe9e3631, 0xfbc8436c, 0xfec82f1d, 0x23077347, 0xa51324bf, 0xafd47984,
5955 0xd0fa8094, 0x3f3c2388, 0x76398baa, 0xda525e10, 0xa507b23c, 0x8b6fc434,
5956 0x998def1c, 0xfe869d99, 0x0bd018e8, 0x14f81e31, 0x8e2905c6, 0x4a7aa665,
5957 0xe58c1f7f, 0x31d16dfd, 0xe55bee81, 0xac4cf3f2, 0x9e2aa0f9, 0xebae8ef7,
5958 0xc50265e3, 0xfe2396f3, 0xe574d2bf, 0x89934cef, 0xff37e618, 0x8ce29980,
5959 0x48bd2627, 0x8956777f, 0xf331adef, 0x6ed1872a, 0x1cd63c06, 0xbbf4471c,
5960 0xf7a4d0e4, 0x7733e9f1, 0x750f68a6, 0x17f1514f, 0x1dfd969c, 0x8940bf8a,
5961 0xf65efd6b, 0xfe887c93, 0x221fba17, 0xab1dea51, 0x27f7b6f9, 0xfc10d8ef,
5962 0xfee045bf, 0xb8afdf21, 0xde9c687f, 0x6e78119e, 0xaf3cb372, 0xdc78bacb,
5963 0xecf7f142, 0xee33c793, 0x01976d11, 0x4d71d2f6, 0xcfb8f463, 0x094a6b8f,
5964 0xe1c0b4c7, 0xf07de0d7, 0x35fbd5c5, 0xa285faca, 0xb2b1d6a3, 0x9fa7a31f,
5965 0x12ff7ae2, 0x60ffe714, 0x30bf3f2c, 0xf1e390af, 0x0824d801, 0x1b12c9af,
5966 0x711c7d51, 0x2a1b598b, 0x7605549e, 0xacb9e231, 0xccade399, 0x34975577,
5967 0x7339fb15, 0xd309bfb4, 0xa9b49aa2, 0xbdaf6fe4, 0x9bfa84d8, 0x63e5dafb,
5968 0x4cbf93b7, 0x713da12f, 0xefda9f4f, 0xa5a30ab6, 0xfd2784f1, 0x0cdf5a9d,
5969 0x71e3ec91, 0x9fa24433, 0xb230aa98, 0x4c74635f, 0x2e78426b, 0xca8a8bd7,
5970 0xcc22a6e3, 0x3e934416, 0x4523d458, 0xe83f97df, 0x51998b07, 0x74f38f1f,
5971 0xe2aaf8b3, 0xcc35bb4f, 0xe7ae1af1, 0x5d5f1b5f, 0x74bbcef9, 0x971954ae,
5972 0x9c4a2f32, 0xaaf8b874, 0x5dc1ce72, 0x2e75457e, 0x4ff62dc3, 0xb8e3ff47,
5973 0xf2f46783, 0xfe334b39, 0xfe25611d, 0x8bf5ee3a, 0xe2557714, 0x45cf6eac,
5974 0x3be1abd2, 0x0e3f7e3d, 0x06213f96, 0xf1e217df, 0x9ef157d7, 0xffef1e94,
5975 0xd4bee999, 0xc5fdf21b, 0xe63f184e, 0xa1cde9bf, 0xa76bcbb4, 0x98b790f4,
5976 0x45e77752, 0x387ed78a, 0x53ef1d56, 0xb49779e2, 0xd56333ce, 0x0e0923e7,
5977 0xc369f78e, 0xddc6bfb9, 0x97bfa3a3, 0x48c77ee1, 0x73a4bbf2, 0xfaebdd19,
5978 0x246ba4f2, 0xf1875de2, 0x38ba00b6, 0xe187b0ef, 0x9de7613b, 0xb38c30f6,
5979 0xa73eeb8d, 0x752ff3c7, 0xfd1eaf62, 0x12718061, 0x1f744d1e, 0xf7cfc8b8,
5980 0xdfd09676, 0x5c69bae3, 0x136fe3ac, 0xe59ffb17, 0x00210141, 0x00002101,
5981 0x00088b1f, 0x00000000, 0x17b5ff00, 0x67534c5d, 0xb7b77cf4, 0x0bdf96e5,
5982 0x72223f2a, 0xa29862c1, 0xa740c2dc, 0xac741631, 0x4a8a5c13, 0x66b50102,
5983 0x2d09922e, 0xcbc2ccd9, 0x01893ad2, 0xb8b2c3dd, 0x26a9f364, 0x87b6e883,
5984 0x6ead93fa, 0x840b0b55, 0xc3e22e25, 0x52c9719c, 0xba33330d, 0xd8dc6281,
5985 0xdf39d85c, 0xd8bdb5bd, 0xa4da2cbd, 0xdf3f3d39, 0xfff9df39, 0x0730000a,
5986 0xb956e7da, 0xf84ce706, 0xffc6cfa5, 0x4fa43d0f, 0xbddde38c, 0x1726eb4b,
5987 0x3ebbf1c4, 0x036935c9, 0xce9c5df8, 0xf6002b94, 0x1c5ace87, 0xaccf1f04,
5988 0xedfc2176, 0x4ab5dfc2, 0xd2f7803a, 0xee202d4c, 0x96a666fd, 0xd2afdef8,
5989 0x4fe9027a, 0x8ed77bdb, 0x70045e97, 0x106b4196, 0xc12e55f9, 0xb8e08271,
5990 0x4546fac3, 0x25c06e5c, 0x80fce938, 0xe89b34ad, 0xd9a55cc7, 0xf5f4137b,
5991 0x00674539, 0xdaaf39e9, 0x09f489ac, 0x06a019bb, 0xc15c0ce9, 0x556bf624,
5992 0x7fdfdb81, 0x4a4f2ad2, 0xdbf11c7a, 0xe036cc1d, 0x3c8150de, 0xf7c71e59,
5993 0xfc028fd3, 0xd422666e, 0xb9e97402, 0xd77264b8, 0x3bafa8aa, 0x52816a3f,
5994 0x5c5b4ca2, 0xdf5e30ab, 0x12acfd4b, 0xbefcf860, 0x170568e2, 0xa0172095,
5995 0xe0373f4d, 0xb19c5bdc, 0x3d7fc010, 0x4698ca05, 0x4adf9113, 0x2a8e143f,
5996 0xa769da22, 0xb6e5785f, 0x4c27f7fc, 0xcdba11ab, 0xbdc268fe, 0xc3829dda,
5997 0x2eedc99a, 0x7920ce6d, 0x212fce31, 0xb74bd3a5, 0x51cc22ad, 0xf413e428,
5998 0x025ac217, 0x36ada8d2, 0x0406ef6e, 0x7ca1b07e, 0xa488539b, 0x70d69da0,
5999 0x6f50044a, 0xdf045395, 0xcd7b088b, 0x7c461281, 0x2be726f1, 0xbf11366f,
6000 0x042aae4f, 0xcbe7e3f4, 0x09417916, 0x3464dfbf, 0xf3aa8e21, 0x3c52fed3,
6001 0x953176af, 0x34ef6adc, 0x4193f1f2, 0xe3d6ee7e, 0xfc3433b2, 0x5ff72172,
6002 0xcb9e0136, 0x8e38031d, 0x18f67776, 0x756eedcf, 0x3f7461de, 0x337fa0f8,
6003 0x904d81ca, 0x6bde8907, 0x3b3aa394, 0x001ff18d, 0x43d62670, 0x0d41d537,
6004 0xe7e1c641, 0x45d513e8, 0x582a0615, 0xbf373f11, 0xf974467e, 0xf062faf9,
6005 0x5117f10c, 0xd80d567d, 0x024dbf28, 0xf5e10194, 0x9f412d92, 0x9eb9155f,
6006 0xfc01650f, 0xde17d728, 0x7e30c83e, 0x915f8f7d, 0x4a6e505a, 0xd2ca97ae,
6007 0x32f7b8e3, 0x401653d6, 0x036cf0f5, 0x9858fbc5, 0x794d1581, 0x28bef1f3,
6008 0x6eb17d57, 0xbc4ead9c, 0x31dfe6a7, 0x3a44f9cc, 0x0d9a81d5, 0x61205f9a,
6009 0x5817fcbc, 0x55ed1060, 0x491c3d35, 0xb2b9f8a3, 0xec8532d5, 0x23a50ed8,
6010 0x6b126dee, 0x3c2ee118, 0x160ef840, 0xf6e7f090, 0x005b9d2b, 0xd8b754ed,
6011 0x5bdc52af, 0x15aacc3a, 0x40dade88, 0x50596bf4, 0xff122937, 0xc4a97bc4,
6012 0x55aa672f, 0x9eb3be21, 0x445f8df8, 0xade7aa44, 0x7865a514, 0x8d28cbb7,
6013 0xeac1b37d, 0x551f500e, 0xf411a337, 0x3587476f, 0x84b5fe40, 0xce90cd9b,
6014 0xbea041eb, 0xedcf5b7b, 0x328f45b7, 0x099f48a3, 0x5f916757, 0x16d3cc0b,
6015 0xea356115, 0x7841c82e, 0xb005bee1, 0xb4e2bc1f, 0x73b94645, 0x05ac4c3e,
6016 0xc49f4be0, 0x8327c861, 0xd7c03963, 0xc30e7cbe, 0x2fd3853e, 0x8c39cafa,
6017 0x470e54f8, 0xa8356b7c, 0x959e3cca, 0xdd02fbe1, 0x7059a727, 0x7e6f9b25,
6018 0xf9623ebd, 0x29ef0baa, 0xba3e7ba6, 0x93962eea, 0x5a20c7c8, 0x6ad6142c,
6019 0x6730c9fd, 0x06c3e75e, 0xe881e3b2, 0x60a73a61, 0x460d61be, 0xef308421,
6020 0xaa6febbf, 0xd96f9b52, 0xf193b802, 0x04faf467, 0x3cd02287, 0xfad24b7a,
6021 0x5fc5787f, 0x48529e3c, 0xf31eb2b9, 0x413719e6, 0xd48fd20a, 0xbe7f736b,
6022 0x4f18eb9e, 0xc0ddb8c0, 0xcf9c1278, 0xcbf8b56f, 0x74ad1f28, 0xa7e7248f,
6023 0x0ac4faf4, 0xb432bb30, 0x4fbc329c, 0x600e6c47, 0x8f30b220, 0x4916211d,
6024 0x19df3ec5, 0x244774de, 0x96e0c3d8, 0xd73c7e71, 0x46e6d87d, 0xb6f389a5,
6025 0xf9268d33, 0xd54a5c13, 0x34592ce2, 0xf6d56fd8, 0x8b5d935a, 0xb56e0c73,
6026 0x9471756b, 0xfbeb059a, 0x381679e8, 0xa9e7fd88, 0x734ebb18, 0xd001cf2c,
6027 0x93c7c38b, 0xd1311e9f, 0xef990f3c, 0xd8e3993d, 0x0c8a791f, 0x3794391d,
6028 0x41f6260c, 0x24077e81, 0x63946dc0, 0x6e611c91, 0x192dca25, 0x9f7d259f,
6029 0x2f6e15d8, 0x01905777, 0xfe0450ba, 0x465f3483, 0x1a77502d, 0x639d77ed,
6030 0x3bfa9070, 0xf70502e0, 0x1bf1e8fd, 0xdd214f87, 0xb4c98e73, 0x5783ba8e,
6031 0x16ef9ef9, 0x78ff7827, 0xbc2d77c2, 0x3537831e, 0x0239887a, 0x403af249,
6032 0x6eed1dfb, 0x6e687f46, 0x05301f74, 0xc36ed052, 0xbdafad39, 0x41404b0e,
6033 0x1de8ac7c, 0xe79df091, 0x1cd1e419, 0xa5162653, 0x1980ff11, 0xafdc2502,
6034 0xfd84baa6, 0xfc855f84, 0xd8cfed8e, 0xf4c0f1fe, 0x6bd52158, 0x0a235327,
6035 0x8cb73fdf, 0x922f05fb, 0xed2fdf1b, 0xcd3361a1, 0x0643dc1b, 0x868eddb9,
6036 0x713f343b, 0x4be918cf, 0xf9e7df0e, 0x53af2880, 0x7e062fdc, 0xe1633d8d,
6037 0x58092c6d, 0x38731509, 0xca5536cf, 0x6eaddf3c, 0x1f18dcc6, 0x91757049,
6038 0xc991709f, 0xc7e76f34, 0xf5aed1ab, 0x419fa341, 0xc877e62f, 0xd0c7d5a2,
6039 0xa3f0163a, 0x94a2237c, 0x7b8ba1f7, 0x1cfd0cfc, 0x40aa62aa, 0x8c2120f1,
6040 0x3e3d16c7, 0x6e1f802f, 0x70a9fc4b, 0xe01aae6c, 0x2b61ac35, 0x5ea353d6,
6041 0x6e01000f, 0xd4e3f9a7, 0x8e23bd08, 0x2af9839a, 0xf9f8977f, 0xe055677d,
6042 0xe814d4fc, 0x6bafd649, 0x6ab375ec, 0xf33dc90d, 0x7b2ed3f7, 0x47d3f792,
6043 0x3b2276f8, 0x244ced7b, 0x2bbe30bf, 0x15efbfa9, 0x411ccb5d, 0xb5c981f4,
6044 0x5975ce8f, 0xbea9ab22, 0x1cdc981f, 0xee91f18f, 0x8b82fda1, 0x91f516ef,
6045 0x87cf8c00, 0xcc67e523, 0xa2769794, 0x125beec7, 0xe9b8e397, 0x0aa1fc69,
6046 0xa1efdacf, 0xfda79aca, 0x17fa867e, 0x7f57cfab, 0x1dbcb26e, 0xa497f9a2,
6047 0xe7d27e7e, 0x9912c01f, 0x3893cbf7, 0x6487b683, 0xaa3c75e0, 0xa67ef5ef,
6048 0xc87b48fc, 0x06199dff, 0xed5cf895, 0x7ff4d0cf, 0xc18beba6, 0x9bf61d51,
6049 0xf6f9b935, 0xfc39f427, 0x8a71c98b, 0xa4f2bdee, 0xdf824a00, 0xa0a982ab,
6050 0x195df824, 0xf6e031ca, 0x7c8362c8, 0x81a978f5, 0xc2b1335f, 0xbd735fc0,
6051 0x14bf80ca, 0x5f90675d, 0x01bd6bff, 0xc5bd30df, 0xcff1bf20, 0xd63c066d,
6052 0xb95875bf, 0x4936e789, 0x0ae41baf, 0x157e8d3b, 0x2afd18f5, 0x15fa35ee,
6053 0x37e25bd3, 0xdfacb7fa, 0xf64e5fe8, 0xde855c83, 0x91fcffa1, 0x2060fb49,
6054 0x34f3c33c, 0x13029d35, 0xa8c44734, 0x66c21fb6, 0xf0a617be, 0x84a2e2ff,
6055 0xd7a72c3c, 0x0919da3f, 0xb9d2b32f, 0x2b369d0f, 0x512edbbd, 0xfe3e600d,
6056 0x2e76d705, 0x000ee017, 0x00000000
6057};
6058
6059static const u32 csem_int_table_data_e1[] = {
6060 0x00088b1f, 0x00000000, 0xe3e3ff00, 0x51f86066, 0xb8d3c10f, 0x72361818,
6061 0x0143f821, 0x684333b7, 0x0606163e, 0xc77e2001, 0x9ef0c0c8, 0x38330491,
6062 0x207eec10, 0x27880abb, 0x7dcf5071, 0xe52f1143, 0x5f5d9fa1, 0x153d76a0,
6063 0x837f7818, 0x031083b0, 0x03309b83, 0x8408b483, 0x55045fbf, 0xc10851de,
6064 0x99412e7e, 0xfa819f5d, 0xbbeb8d01, 0x00038031, 0x00000000
6065};
6066
6067static const u32 csem_pram_data_e1[] = {
6068 0x00088b1f, 0x00000000, 0x7de5ff00, 0xd5547c0b, 0x733ef7b5, 0x9993331e,
6069 0x420f264c, 0x084f0042, 0x21842a20, 0x38880840, 0x8d069009, 0x8808089a,
6070 0x420100ca, 0xa9113248, 0x676d5e97, 0x6ad11422, 0xa36d2d1b, 0x4101da97,
6071 0x180d45a3, 0x1d0340e8, 0x5abc414c, 0x5b4a0a8d, 0x3c3141b5, 0xe878490a,
6072 0xef5bd6c5, 0x33ef6b5e, 0x42667399, 0xfddfb6a2, 0x7f17dfbe, 0xecfb36fe,
6073 0x7b5ef673, 0x7b5affad, 0x231fb5ed, 0xd313c659, 0x057c8415, 0x7213d77f,
6074 0xf4842448, 0x0b3b4eeb, 0x108e3a68, 0xb0398e7f, 0xb4242055, 0x24edefef,
6075 0x4db39085, 0x267355b3, 0x98c7fb21, 0xf2d3d743, 0x80fc81b3, 0xdd4f9699,
6076 0xd121c479, 0x514ed57c, 0x3ed37282, 0xb1df7e2b, 0xde400851, 0xf1fd6e6b,
6077 0xb5df34b5, 0x699b2453, 0x376424d5, 0xda425491, 0xa9fd842d, 0x6a5f98f1,
6078 0x4daad965, 0xf682effb, 0x626683ca, 0x37b7dfa5, 0xafc86e89, 0x08042adc,
6079 0xf76aaf6d, 0x5a00ca83, 0xd080b2df, 0x7e695568, 0x1a8a63eb, 0xfb03c84f,
6080 0xb368ecfe, 0x67da7213, 0xfd82aa21, 0x491c6f28, 0x7b604548, 0x7dfa00e1,
6081 0x65c136c5, 0x6c57f5a2, 0xf401d73c, 0xc3c93455, 0x8adf5a44, 0x47511b06,
6082 0x22bfb6b0, 0x07cb5ed0, 0x794eded8, 0xfe57b428, 0x110a3de5, 0x1bb29fa1,
6083 0x74a2abbe, 0x76b5bf40, 0xb1eafb4f, 0x559f8d3d, 0xe8f6d1cf, 0x0a2fd57b,
6084 0xb562e82e, 0x8e807889, 0xb9d6dd8e, 0x7fa1db4f, 0xf8f0cab5, 0xdc2c7ec8,
6085 0x08a8fd05, 0xed0a526c, 0x6526df40, 0xfaeec8e9, 0x87fc3456, 0xacfabe9e,
6086 0x72889efe, 0x47da7a63, 0x3bbc3a59, 0xbb88415f, 0xa44bd691, 0xaa3a5280,
6087 0x4207f9fb, 0xa1e32122, 0x96a8917e, 0xe4a9faee, 0x23fe0711, 0x0f949ff4,
6088 0x81f1bdfe, 0x72dd99ad, 0x9904e95b, 0xbcedcb75, 0xea51cb93, 0x5fac8dca,
6089 0xf20c7f4b, 0xf9d4f4a0, 0xee3e989c, 0x8374c34b, 0xfdbe454f, 0xd30237dc,
6090 0x9f0b9f7a, 0xc3cbe93f, 0x8dcfa374, 0x22be53e9, 0x12be034c, 0x6fb36f7c,
6091 0x7c5ba62e, 0x8cfe7c1e, 0x06d31caf, 0x7f3e0d5f, 0xd31ab7de, 0x3e3f3e6d,
6092 0x1eb7d17f, 0x1d5f46d3, 0x5e403ba6, 0x05f26d34, 0xbe5dbdf0, 0xbe834c06,
6093 0xc7be7c46, 0x11f4c417, 0x64c747ce, 0x3e512f92, 0x49c4dc38, 0x8a924ec5,
6094 0xcd32f9dd, 0x7cb09527, 0x7cfe1dea, 0x3d53e685, 0x32f94f34, 0x6f9432a0,
6095 0x3501f9a6, 0xfdf07cac, 0xf342c0a4, 0x7cacfd83, 0x02ee23c8, 0xa90fcd2b,
6096 0x37c3e563, 0x68e20bfa, 0x9580787e, 0x542dbd5f, 0xabf9a360, 0x7679591b,
6097 0xa76a9933, 0xcb10ecf9, 0x9ee1bce7, 0x39f34f1a, 0xfb9f2cad, 0x83aa7f81,
6098 0xd8db73e6, 0x04ce93f7, 0x2d1ed544, 0xbab21d87, 0x6d595098, 0x4b70cff4,
6099 0x515e6913, 0xca2e21ef, 0x6eadff1f, 0x43f29d29, 0xc8796376, 0x9bcb1f3f,
6100 0xbf963714, 0xfcc32fe3, 0xe583d92e, 0x2c55fdc7, 0xfcb078af, 0x98bdff73,
6101 0x2c7eca0f, 0x58fad4b7, 0xf963f15e, 0x58f5da80, 0x80391eff, 0x1f6b23e5,
6102 0x4a3df2c3, 0x5f1fcb00, 0x1a7ba4fb, 0x3c11afcd, 0xd23c073f, 0x01649cb4,
6103 0x4ad31a9e, 0x09d69e28, 0xf7e02e64, 0x8a3a0007, 0x0ae975cb, 0x3f8ee1ea,
6104 0xfa0d3ee4, 0x90297f8b, 0xc3ccfa5f, 0xaffdf899, 0xd6991eb0, 0x4f5ef623,
6105 0xba799bce, 0x2cde727a, 0x8069ead7, 0xfb58d6f7, 0x378ecf56, 0x79e9e927,
6106 0x67ab42b3, 0xdf13d23b, 0xbce57eb7, 0xcf4f5935, 0x3d5a955b, 0xc49e907b,
6107 0x74d3d1be, 0xa69fcf44, 0xb4fe6123, 0xfafd3d20, 0xf7b8cf46, 0xf719fcf4,
6108 0x6f3f985e, 0x7de93d60, 0x3de9a7ab, 0xde9a7f3d, 0x08e7f30b, 0xdf506bf6,
6109 0x7dee35fa, 0xbdc67f3d, 0x47cfe61f, 0xdf664f48, 0xa1f5d9ea, 0x3ebb3f9e,
6110 0x04e7f30c, 0x6fac33d6, 0x48fdcafd, 0x8fdc9fcf, 0xc2e9fcc2, 0x5beaae7a,
6111 0xd23ebb3d, 0x47d767f3, 0x817cfe61, 0x5bea8cf5, 0xa2ff72bf, 0x5fee4fe7,
6112 0x0931fcc2, 0xbe98cf50, 0x54fc13d1, 0xa7e09fcf, 0xb0d8fe61, 0xa37df19e,
6113 0xcf5daf27, 0x30f6bc9f, 0x9004527f, 0xd5bec4fb, 0xf3d76c13, 0xe61ed827,
6114 0xe7ac20cf, 0x2bf5beba, 0x3f9e84ef, 0xfcc22779, 0xcafd8e19, 0xf40f7aa7,
6115 0x7c4f5a10, 0x39ecf5cf, 0x9ecfe7ab, 0x8cfe61b3, 0xd3a67ac6, 0xaf7ab27a,
6116 0x9e875267, 0xc23a933f, 0x7ac3c9fc, 0x9eadf466, 0xfe7a1d3d, 0xf308e9ec,
6117 0x73f91f27, 0x35fadf53, 0x9fcf53a9, 0x3f8c9d49, 0x4cd70f63, 0x3a72d075,
6118 0xfa44ba16, 0xdc67b5c9, 0x45e6816e, 0x4e8bcb27, 0x44bf0117, 0xd20dfcd4,
6119 0xf7e916ea, 0x39896df6, 0xbf48930f, 0xfa14a0a3, 0xb1bd4f15, 0x2123bf48,
6120 0xe7e74e2f, 0x7493ba24, 0x01a2e4f9, 0x95fbf7ba, 0xf795d10c, 0xaeb57b9f,
6121 0xa393dd3c, 0x4f9467cb, 0xa83fbdd2, 0xbf9740a6, 0xba0df562, 0xb7fd33f7,
6122 0xeb59f2ea, 0x3fbdd76f, 0xae916eac, 0x0afacafc, 0x8155f95d, 0x35fcba95,
6123 0x7baeff0d, 0x03e3547f, 0xc1d1f2ba, 0x63e57587, 0xf2eb8f42, 0xa93d0f63,
6124 0xeb7c7f7b, 0x84f95d66, 0xcaebcfa3, 0xd0edb627, 0xb93dafe5, 0xd9e7e0c7,
6125 0xf0d7ed9d, 0x27b808bc, 0x574fefcc, 0xc50bdfd0, 0x0657982b, 0xdf8fd1d8,
6126 0x3d54bf1f, 0xbcabe54e, 0xa14d58b2, 0x129905f2, 0x0fe7ae3a, 0x8db2bf28,
6127 0x9277bf3e, 0x7d274ae7, 0x19e2af7e, 0x9fe18ced, 0x24083c52, 0x04d5520d,
6128 0x41fcb1a9, 0x20b1e199, 0xc7e1cbe3, 0x535ef7e8, 0x9a44f0d7, 0xd7e62fef,
6129 0x129e5e03, 0x38d3884c, 0x7bc0d491, 0xf3826671, 0x73330782, 0xe047f69f,
6130 0xaa20fd75, 0xbd774287, 0x1a4f65eb, 0x6b9b19f8, 0x1f83f6df, 0xed106eb2,
6131 0x9e4200d7, 0xf90ede16, 0x07efd287, 0xd0f34d2d, 0xf50accfa, 0x57db23d3,
6132 0xb123fb68, 0xff6806fd, 0x37da1ec5, 0xb5d3c90f, 0xae5c196f, 0xd0a2df6b,
6133 0x1fd49df6, 0x6f23fda8, 0x12610a9f, 0x7f0b2f21, 0x83cdf6c4, 0x07fdb1cb,
6134 0x895f3a15, 0xdc2e3f6c, 0x77f4107e, 0x3e3fb41f, 0x4c87ff46, 0x707ff7d2,
6135 0x0affbe85, 0xb52bffeb, 0x71fb78c7, 0xe116ffd8, 0xe0ffeb18, 0x337fd60a,
6136 0xbedc37ab, 0x43ffcc23, 0x7b37ffd0, 0x64d67fea, 0xa8afff7d, 0xccdff7d4,
6137 0xf6a77fda, 0x8edf6f14, 0x9c2bbfed, 0xa2bffd62, 0xcc57db12, 0x47e0171e,
6138 0x09ab88c9, 0x40c9f6d0, 0x03fa986a, 0x903b685c, 0xa0a2488e, 0x6151e426,
6139 0x6f71d208, 0xe7dbc31c, 0x686f1471, 0x9cf8fc6f, 0xcb65a804, 0x8e2ef3a5,
6140 0xf2db15f5, 0x584bb015, 0x4b2be74e, 0x4165a938, 0x364df111, 0x28c30398,
6141 0xd1411dbd, 0x0db2f90f, 0xfec005d7, 0x4164cd79, 0x91277c09, 0xf4ff3c10,
6142 0x4736a367, 0x2e98cbf6, 0xdbdb93a9, 0x3c2df422, 0x23202a8f, 0xd37d286a,
6143 0xbbe30401, 0x79d31ff3, 0x8bf3a110, 0x833ce80f, 0x227e4850, 0xa23ef6b3,
6144 0xb7c825f3, 0x9412f9d1, 0xdf8b5213, 0xa70eead1, 0x384bfa51, 0x4c4b1ffd,
6145 0x43be3f5f, 0x7ea9f808, 0x31bdfe7e, 0xb05d4f38, 0xde9946da, 0x7f42c74d,
6146 0xfb4f2eb2, 0x753907e5, 0x360736ed, 0x155fc80b, 0xaa8a55f8, 0xf5e2c849,
6147 0xddd79419, 0xc54fbfef, 0x7f594e9e, 0xfdcb711b, 0xae77fbe9, 0x69390612,
6148 0xe6ddb3bb, 0xb84e361c, 0xd7a84c33, 0x4794c324, 0x634dadc8, 0x29035a64,
6149 0xb71fcb75, 0xb33bb445, 0x5d9f9f48, 0xc877cfa2, 0xe944d96e, 0xc81528ea,
6150 0x9cef5a26, 0xad72fab9, 0x8929bb1d, 0x57b799c9, 0x9be8ca92, 0x3c0e6903,
6151 0xe79ca276, 0x1ab7d93a, 0x32c5de3d, 0x3c82c29d, 0xc808fdfd, 0xef829fd5,
6152 0xfd64eedd, 0x573bd236, 0x684bb8b6, 0x142ee73f, 0x236f8003, 0x67da7ffd,
6153 0x69b29b73, 0x32a7feba, 0xc7f74531, 0x8f3cff48, 0x328d3fb1, 0xcbf3c38c,
6154 0x6e19cf8d, 0x3ffcb9da, 0xf4d07c06, 0xd283e004, 0xa3e39c7f, 0x7c32aedb,
6155 0x9b9ecd78, 0x4f5d0f01, 0xcae50488, 0xc71b72f1, 0x3d3a92cb, 0xc8f1082e,
6156 0x7365c720, 0x23879c85, 0xe3873070, 0x1ebd5960, 0xbf127737, 0x2e431e9c,
6157 0xfa6c36f3, 0xdd1a9a61, 0x6e390fbf, 0x1fb23fe6, 0x4fdd13f9, 0xb8bba726,
6158 0xd1acee9c, 0xe5c6df97, 0xeb97277a, 0x0ec7fadc, 0x6e41f350, 0xe8320357,
6159 0x4d3ef7bb, 0x793a6d9e, 0x8d3cb87a, 0xe5c5de74, 0x98f7d779, 0xb6f48d3c,
6160 0xd5b67971, 0x90c9905f, 0xf48d7a68, 0xd51d582d, 0xb9e4051f, 0x9e5b1fd0,
6161 0xf27e60de, 0x55e788f1, 0x8f92338d, 0x8ad9e847, 0x7e5d5286, 0xee9e6079,
6162 0x0bf565fd, 0xea4be575, 0x17caeb96, 0x975bbfaf, 0x9effe85f, 0xab05fdee,
6163 0x77e5756b, 0x2ba43cd6, 0x98fe5f9f, 0xf3cf3f2e, 0x39fdee84, 0xcae93773,
6164 0xa73c9767, 0xb4599f2b, 0x752f975d, 0x6fbdd6ef, 0x2dd577da, 0x8e37cf80,
6165 0x89fc0488, 0x30275ccf, 0x4b99f82e, 0xc73bc176, 0xbae22a7d, 0xd30237dd,
6166 0xe2173e93, 0x0f2fb4fe, 0x8b608ed3, 0x3a09c61d, 0x89252e2e, 0x6e9bccd4,
6167 0x103f5dae, 0xe38269c6, 0xacd316e9, 0x4264ff5a, 0x91526d7e, 0x0af5c5df,
6168 0x44258d09, 0xd386c180, 0x944625d1, 0x5e52f5b7, 0x727f0d4f, 0x5b717974,
6169 0xc7dee7ec, 0x8ce15e17, 0xd6e97711, 0x7e019253, 0xbbf7274f, 0x0295e58d,
6170 0x4e7c8929, 0xd7a803c8, 0x5bb8f8e7, 0xaffd30a9, 0x405e91dc, 0x0d0f901c,
6171 0x7b5cb9af, 0xfde4148d, 0x3a592701, 0x7f565e3d, 0x13bece8d, 0x03f6ca88,
6172 0x3dd58dbc, 0xad70d15f, 0xfb33bbee, 0x1abba445, 0x1844c56c, 0x375e4b16,
6173 0xb50e1d81, 0x0a399e0c, 0x61bf74e8, 0xd82a7182, 0x33c2fd0f, 0xe3e4a2be,
6174 0x04afc812, 0xb9be93d3, 0x3cfbb698, 0x95f71e98, 0xafb1fa63, 0xdf36d306,
6175 0xf23f4c6a, 0xc0fd31f9, 0x3fd31eb7, 0x3d30eaf9, 0xf4c7abea, 0xd3005f3d,
6176 0x4c06bec3, 0x6235f1df, 0x620beada, 0x6373e1da, 0x6f5de9aa, 0xc7c93bb8,
6177 0xbf80d3e1, 0x78eb3818, 0xfaed5560, 0x3b38ddc9, 0xd6afba6f, 0xcf9bb03f,
6178 0x8e66f5c5, 0x1e1d5487, 0x336080be, 0xf297ace2, 0xb0e3997a, 0x9763efa7,
6179 0x6bff377b, 0xc4de36f0, 0x8a6fccfc, 0x653c6eb7, 0xd594f018, 0x89fa9e1b,
6180 0x34f1bbe3, 0x7e64e4de, 0x8fd3c70f, 0xe6311fa0, 0x84e00515, 0xd7f08bf4,
6181 0xa71636dc, 0xd409ebe6, 0x6a716553, 0xfa1af6de, 0x75fa2b6e, 0x6e301181,
6182 0xb7f11f9c, 0x3f8710e1, 0x274cd47f, 0xcff73d7d, 0xf99e9388, 0xcdf9c6ee,
6183 0xbc1d00d2, 0x5b9746c6, 0xad5f18e3, 0xe8445226, 0xb0d0f6b8, 0x468b5c67,
6184 0x49225e62, 0x55c07df0, 0x5ea31f1a, 0x7f032bea, 0x9aebe37b, 0xa1b3cff8,
6185 0xff27f6be, 0x78e90b9e, 0xe397f313, 0xdbf4445a, 0x1769e849, 0x2e3c37f0,
6186 0x10695d99, 0xa61aeedf, 0x086fd138, 0xf3fcf5d8, 0x376e7cd3, 0x3ca21eff,
6187 0xb771c56a, 0x37f90d2e, 0xe9e1f3f4, 0x6f5fe07d, 0x7e37bdf6, 0xf80c0a2e,
6188 0x37b3f097, 0x5d9bd8fb, 0xc5f56e24, 0xe77fed20, 0x0f3951be, 0x870760ab,
6189 0x0f5a79b0, 0xa5d6d6fc, 0xff7cf48c, 0x33b8e26b, 0xeb71c355, 0xf9db4260,
6190 0xf9cbeb88, 0x40132ba6, 0x9c1eb42e, 0xe4ed741f, 0x722f7e7e, 0xafa99b3d,
6191 0x2fac6bcf, 0x68c22141, 0xa2bc6eda, 0x6a420490, 0x22a3cf44, 0x6d5c6fce,
6192 0xec1b887e, 0xa8d6b9b3, 0xfd3c6f30, 0x1a854866, 0xf385f1f5, 0xc0769e87,
6193 0x9a656c3c, 0x863c79c9, 0xaab4b51c, 0x8f69d331, 0xf504af9c, 0x4275f3f9,
6194 0xe7ce2351, 0xa35984d4, 0x3a719c60, 0xbb050f8f, 0x56a9869f, 0xc534cacf,
6195 0xddda9c79, 0x09590dd3, 0x6017fe6c, 0x225b64f6, 0x3ed39bda, 0xcfffbe0b,
6196 0x7aa7a7a6, 0x69087a34, 0xc0589f22, 0xacb2d39e, 0x51efdf9e, 0x0a8ba41f,
6197 0xb34937c4, 0x37cc39fc, 0xaffff4ad, 0x12bd4086, 0xbd7ab5e6, 0x3cdfa28d,
6198 0xd36f9e1a, 0x53bf47b5, 0xf857b5b5, 0x93bd67ae, 0x7b86bb48, 0xf957bf2a,
6199 0x068af0fa, 0xc7ef53ab, 0xdef2ea26, 0xe753ba60, 0xc03fc2d7, 0x2411af71,
6200 0x87255fc0, 0x5f64a75f, 0x0cda780f, 0xbf9843c1, 0x2abdec08, 0x51e29b4b,
6201 0x015a5d51, 0x34f28b9f, 0xfe73abfc, 0xa9d4ed4c, 0x7a0265d7, 0x54a4be46,
6202 0x20a9f2e5, 0x4c44cde2, 0xbf98bf34, 0x4569a8bd, 0xa75b8c31, 0x50fe6c4c,
6203 0x301c4a46, 0x75272e3f, 0x3d4f10b9, 0xa0454c4b, 0x3bc9679f, 0xfa11b18e,
6204 0xb0544e78, 0xf5ebc5d2, 0xdf9d3c7e, 0xeacbf2eb, 0xe4a5f9f5, 0x075854d6,
6205 0x2641ba5f, 0x86ec0101, 0xe898fcbe, 0x91977ac4, 0x6e30759a, 0xbbc79cff,
6206 0x94893916, 0xfaabe941, 0x17732fcd, 0x892e3a52, 0xd6d5fc6c, 0x31279771,
6207 0x05662bfa, 0xff7d3714, 0xb7b1a693, 0xbf440b51, 0x7583ac0f, 0x71297f6d,
6208 0xf2d1256d, 0x1bf4bafb, 0x81fcd5e9, 0x4e64f5a8, 0xe0834a47, 0x63b0c40e,
6209 0x3d30248a, 0x6aeef6e3, 0x838ba9c9, 0x223e42e4, 0xf18df20e, 0x78744294,
6210 0x067a2cda, 0x7e19e34b, 0xd4820f00, 0x4dbe78a5, 0xf55169fd, 0xfbf52d5f,
6211 0x903fd627, 0xabab9fd6, 0x4a9ff73f, 0xfa28d0ff, 0x5fd5620b, 0x76179bf5,
6212 0xa93da9f9, 0x0e67e978, 0x53c9c742, 0x8baa5d52, 0xeb72b5ca, 0x9a6e1d0f,
6213 0x0efc949e, 0x80a9ebc0, 0xde4b1458, 0x76f2c3ab, 0xbb8805db, 0xfd693fc1,
6214 0x11ff9fa7, 0xdf3e23c6, 0x9e313b2a, 0x990e60d6, 0x37563ea9, 0xd9262f2d,
6215 0xf2c63f98, 0x21139e0f, 0xafe3d41f, 0xa59fd9e2, 0x8a0afec2, 0x0a5f1e14,
6216 0xbd5b3fa1, 0x1c42d3e5, 0xea17489f, 0x683bf191, 0xda1252ff, 0x424a85bf,
6217 0x13a53974, 0xce5e04e3, 0x8fd36f17, 0xf80e89ce, 0xdfce1b57, 0x7397ef8d,
6218 0x14b974ff, 0xa36ed29f, 0x26409eff, 0xf8d43d80, 0x3fcc0241, 0x2fdcf35d,
6219 0x7a518fb2, 0xdd796cce, 0x49f04421, 0x8df3a3d3, 0x47b57f8b, 0x76ded9ed,
6220 0xf48b3d50, 0x4af1b483, 0xbabf720d, 0x7295a599, 0xd52d71c8, 0xb24dcafb,
6221 0x571f4fcb, 0x33f4f0be, 0xf31c424f, 0x30d7668f, 0x178aff5a, 0x8937bc0e,
6222 0x976c57e6, 0x37598a53, 0xb76a42ec, 0xfff4bc5c, 0x72dd39d5, 0x80f978a8,
6223 0xcf628ea2, 0x96ea4fef, 0xfbed8ac7, 0x9a2a3215, 0xf71b531f, 0x18f66d2b,
6224 0x563c6972, 0x9ac27e08, 0x814bfee7, 0x7da9e2f8, 0x199fe902, 0x0e9b9f83,
6225 0x7c001fa0, 0x39723942, 0x7866e585, 0x02e54bdf, 0x93935af6, 0x6e46fcb1,
6226 0x753ea04f, 0xc5f9e224, 0xf2fdb43d, 0xd05d993f, 0xef17f2ff, 0x4e3f4071,
6227 0xd70c3548, 0x2a61fcbf, 0xd972afd8, 0x94c4ea9f, 0xea7f2f3d, 0x65b788bb,
6228 0x15377f6f, 0x9dc449e3, 0xc7b1c26e, 0x5bfd0e9f, 0xf63671b2, 0x20f1296f,
6229 0x297fcaee, 0xfa680496, 0xb68a4499, 0x0e8bd0c7, 0x362717ae, 0xf68c4753,
6230 0x1fcc04ef, 0x23bf5ec1, 0x422abee2, 0xffa026ee, 0xa17de5df, 0x3fe6021e,
6231 0x1d3930b3, 0xaf5c4c90, 0x8919b7a8, 0xb60f2dd7, 0x0f4e7c82, 0x7587f772,
6232 0xfc912f16, 0x57c21f9c, 0xedf15eb4, 0x7c99fde9, 0xf2e52a88, 0x3f38e8ef,
6233 0xfbc39e15, 0x9adbb2ad, 0x7c8efbad, 0xfeddd995, 0xa53ede2a, 0xe7c60e3b,
6234 0xfdb1a913, 0xa6b201d5, 0x8e9c74f7, 0x7e8457c0, 0xf2df7d33, 0x4d6fd310,
6235 0x45a503df, 0x30f17e50, 0x0ef81fd3, 0x574a3fc6, 0xef963fa8, 0x3da0259f,
6236 0x58e6f3a0, 0xe645bd7a, 0xd72fad7a, 0x96e94270, 0xbc088484, 0xc849fd40,
6237 0x595f5c7f, 0x177e81ba, 0xd0bd2f61, 0x3eba239e, 0x71976f4d, 0xfa053ffd,
6238 0xfeb74d7f, 0xef4c8d93, 0xfc9ff67b, 0x07236e2c, 0xf412799e, 0x5fa7ea95,
6239 0x4b957d05, 0xdd7fdfa0, 0xeddef2d6, 0xdaff4f54, 0xdea9e9a8, 0xb4f51a7e,
6240 0x1278c77c, 0x6aff4f4b, 0x7a989177, 0xd4c79f4a, 0xe21b7b53, 0xfd94fff8,
6241 0x2897f8d4, 0xd9a7f9eb, 0x68f89ec3, 0x4a2f87b4, 0x68d3f22a, 0x61dfe90f,
6242 0x3f8d1b92, 0xde1a770d, 0x755d7e2a, 0x309dd805, 0x85dc352e, 0x2ee1a971,
6243 0xe3ab7e2a, 0xcffcb19f, 0x74a26b10, 0x4fd4b7cd, 0xa5847981, 0x2bbce08b,
6244 0xeb88967f, 0x048b96a6, 0xc880bef5, 0x7df06fb8, 0xf078cd53, 0xfdfca743,
6245 0x52f7b3b6, 0xbf13e77a, 0xebe5d6cc, 0xbfebf464, 0xc9abeafc, 0x73b73fb4,
6246 0xeca7cefe, 0x63ca89be, 0xe28424ae, 0x24f39d28, 0x82484fe2, 0x3e40acf8,
6247 0x7e63a08e, 0x7f0f3eb9, 0xebbb5253, 0xaffdede9, 0xa6f90f3b, 0xb63edbe9,
6248 0xa42ef576, 0x2979b143, 0x20a54f12, 0xef3fca57, 0x04302138, 0x549b52ed,
6249 0x7aaf3112, 0xb79ddb9c, 0x0f1ccda7, 0x9cfe4bfe, 0xe70c0951, 0xeb7e7183,
6250 0xbcebf6e5, 0xbb004d5f, 0x0b39be7e, 0x0fe7afe7, 0xb58f8e2d, 0xe385b26f,
6251 0x575f00ec, 0x750bb4e9, 0x277dc522, 0xc5ff42e9, 0xad92b76f, 0xbefdd631,
6252 0xe4f89b2f, 0xfe8dcb83, 0x736e5489, 0xd1e70e39, 0x2272134f, 0xa6eb36e4,
6253 0x5a239253, 0x71f7f00e, 0xdbeb3cc4, 0x0d7017f2, 0xb6b16dfc, 0x88c49615,
6254 0xf384fdd7, 0x5f2bca6f, 0x69d5fee0, 0xf012f9cd, 0xd45d9a71, 0xd41e39c5,
6255 0x192475f4, 0x794d7409, 0xe3a3f965, 0x87bd8e29, 0x57ec1744, 0x539f36f5,
6256 0xbbe6313c, 0xfd427e46, 0x901e47e0, 0x23afc89d, 0xe012c972, 0x56d991eb,
6257 0xef96eb02, 0x58aaae2a, 0xb3374e74, 0x523cc878, 0xe138d9f2, 0xe6fe3eff,
6258 0x150f89cf, 0xb79c7e50, 0xd1c0fdb3, 0x7f7a63f8, 0x6a0429de, 0xc8a1c005,
6259 0x004229f2, 0xc48564e2, 0x0164e8f3, 0x48fafdf5, 0x2c1f95fb, 0xd5f6017d,
6260 0x4e0b3754, 0x96af2d13, 0xb1c014da, 0x025db837, 0x9546fcff, 0x20de31b8,
6261 0x159a8cd5, 0x203ad711, 0x96afc84b, 0x277eddbf, 0x2cc2f7f0, 0xdcba0133,
6262 0x6039cf23, 0x3cd0bfdc, 0xa7a0f516, 0x47c1fd7e, 0xa0934ca6, 0x30f8821e,
6263 0xc530a1e2, 0x9ecfcba6, 0xa8ba064a, 0xdb98a6dc, 0x90c571ee, 0xe18532df,
6264 0xcdf6cfac, 0x7d99fff2, 0x1bed4c9b, 0x691cb5c3, 0x512b46df, 0x2c7fadf6,
6265 0x56b2b6fb, 0x58b80fed, 0x3fab37b9, 0x6be575c8, 0xb2c5fa4b, 0xd8faaf6f,
6266 0xbe35fdfc, 0x2073bb0f, 0x23a36fb5, 0x6a40dbec, 0x6dc462df, 0xffcd15d3,
6267 0x59bec5ec, 0xeff477fe, 0x316fb055, 0xd1523bfa, 0xe6a2b7db, 0x456fb45a,
6268 0x7edd4503, 0xcf852ca8, 0x6fb47ae7, 0x1b367f0b, 0x16cbb2f3, 0x57c03f03,
6269 0x71af6fb0, 0x80ed073b, 0x38a45b9d, 0xdabefdb1, 0xdabed2b9, 0x3e25ffb9,
6270 0xe56e766b, 0x239e7620, 0xcecc871a, 0x7664ccad, 0x665ee56e, 0x630e56e7,
6271 0xdf68ce76, 0x1beca20a, 0x047abefb, 0x8be71efd, 0x83b8bf99, 0x95cf1796,
6272 0x7efa165d, 0x5f9daab1, 0x691f19a8, 0x122916ef, 0xdeca39f2, 0x39e1ceb9,
6273 0xddecde90, 0x86ef605b, 0x0a1b1da2, 0xc7c4647a, 0xba6d430d, 0xbe4772fd,
6274 0x4bf5ff68, 0x107f2fa0, 0xbefd9e71, 0xf68bcd89, 0x163ed17d, 0xa7376ef4,
6275 0xc98551e7, 0x47e7c3b3, 0x24753a7b, 0x43aaf7d3, 0x544e3871, 0xbfac0937,
6276 0x15010bf7, 0x5dbf81c6, 0x9df2f9c2, 0x797cd97b, 0x83f1998e, 0xcec89bfc,
6277 0x2c16505d, 0xdcc3c08c, 0xd718154b, 0x0b112b9c, 0x0e0baff8, 0xfc0a70dd,
6278 0xd69705d6, 0x00bbbfa3, 0x89bec39e, 0x32eb6ded, 0x2e77bb68, 0xa1de7017,
6279 0x1798efed, 0x3f7a97b6, 0xec737e76, 0x38531a7d, 0x13ee533d, 0xa72fb002,
6280 0x2f107db7, 0x239bfd72, 0xc8bf21b6, 0xf8cc625b, 0x985ef6a4, 0x97c62e4f,
6281 0x6fcc55aa, 0xf289f30e, 0xf9a2154d, 0xbc5d2544, 0x2f9bb530, 0xfda4ee77,
6282 0xbfb9e94d, 0xf7a2df1a, 0x3e71b8e1, 0xd7bf80b3, 0x3e341f13, 0xf39ff547,
6283 0xb8a9fa9d, 0x8fc8c79f, 0x5ccecd46, 0x5e814643, 0x3cf26fbe, 0xf4701e3a,
6284 0x942f949f, 0x0de6dbce, 0xd9e79dd3, 0x9372f9c5, 0x54b4d8e7, 0x6a48f815,
6285 0x97b76700, 0x4a903f6f, 0x3b8b77fb, 0xe6420733, 0x78a6ffb3, 0x62d0fe20,
6286 0xa83b42ed, 0xcccd30e1, 0x8e57f870, 0x9c0323c3, 0x09bc70d3, 0xafd44e0a,
6287 0xf1cec190, 0xca5e647d, 0x6f5fd067, 0x144f8f90, 0x859fa09f, 0x720578da,
6288 0xa9bcffa1, 0x5bc5c999, 0x6e5ca023, 0x81075d26, 0x8229d5ef, 0x2aab442b,
6289 0x21ff6e0c, 0xd57ab7ec, 0x9e839f4a, 0xcdae0b97, 0xf4f61d8c, 0x963898d4,
6290 0x3718e162, 0x9b8c4609, 0x24bde00b, 0xc668b7d8, 0x1efceff6, 0x3f4647b3,
6291 0xf5b98a65, 0xe533d008, 0x09b264df, 0x7fe8061e, 0xfa303811, 0xf07a5131,
6292 0xa4fdf735, 0x2afdfb72, 0xfc0ec1c8, 0x1fc052ee, 0xf8d886f2, 0x257b95a3,
6293 0x4df21a75, 0x8e904393, 0x1c98e32f, 0xc8dfa960, 0x3cb45be7, 0x6fde1fe0,
6294 0x7ef86416, 0x324f9506, 0xfa6a9a2d, 0x7786a0e2, 0x2fcd1ab3, 0x47a42788,
6295 0x6fb00dd8, 0xd596eb91, 0x4f91b7c1, 0xeea2ac37, 0x27cd1a99, 0x07603e4d,
6296 0x28afc72f, 0x8fee09fd, 0x9bea7fb9, 0x599a4fea, 0xacfb3faf, 0x868faf5d,
6297 0x015eda38, 0x4e690aed, 0xf20fc5d4, 0xd65e6ccc, 0xce20f562, 0x5d935ebb,
6298 0xfb68d59b, 0x0b971573, 0xcf2257cc, 0x0e854def, 0xd3b1bac1, 0xfad13e4a,
6299 0x2ce1843d, 0xd5783c72, 0xf5f941ea, 0x5e04ff54, 0x98fe4f7f, 0xb40eff96,
6300 0x5516fb07, 0xf1c67b7d, 0xf5278b48, 0x6669afd6, 0x69be3f66, 0xbe76b4bf,
6301 0x9783baee, 0x4dfc62b4, 0x2cd87f5b, 0xc32e7e7a, 0xd048b8fc, 0xca5073ad,
6302 0x9ff2fd71, 0xe558ff50, 0xfc43f532, 0xfcf94428, 0x31a7b6ea, 0xf9f67d5e,
6303 0xfe833763, 0x48adf8ac, 0x3a9f542c, 0x1093c5b6, 0x80a207db, 0x24d1509f,
6304 0x91167ae2, 0x2333b942, 0xd6420cfc, 0x14bc7e30, 0x62a7768f, 0x4c503987,
6305 0xf5d8afbf, 0xddc43649, 0xf6601e3a, 0xc73cffcf, 0x1b2dbfa3, 0x242bfbd6,
6306 0x946f8eb6, 0x9f1cbdcf, 0xe6db7667, 0x1a16fd82, 0x8ad779d8, 0x39b239c6,
6307 0x6550ce22, 0x7b5c5996, 0x59f70db7, 0x70139ffb, 0x17d0329f, 0xdb52ce79,
6308 0x39e679ff, 0x822b9766, 0xcdce0072, 0xef6c3456, 0xc5783880, 0xaffa3351,
6309 0x0a7386de, 0x5f53a7f8, 0x23fd017a, 0xc5d4506f, 0x8fe2a341, 0x0cc8620d,
6310 0x2aa6b3f1, 0x7f3403b4, 0xb18df30c, 0xc5bdf0e3, 0xb4bc56c9, 0xb29f9777,
6311 0xcfcbc570, 0x6cdcf03a, 0xc60756eb, 0x1f2e1b21, 0x378a8fff, 0xd9743e36,
6312 0x8e69e378, 0xf5995f8f, 0x21a435eb, 0x9490e319, 0x1892dcbe, 0xee308b71,
6313 0x29ecf85f, 0xb33b0f58, 0x014fafe3, 0xb8ff95bd, 0xe07dd4f0, 0x3ab3ed8f,
6314 0x3ef6bc61, 0x13d7047f, 0x7376efb4, 0xee78ef3d, 0xe9875c59, 0x05d9a3f8,
6315 0x3dec75b5, 0x23d61831, 0x917fb63a, 0x55db710a, 0x3ce3a77b, 0xa9ced56d,
6316 0x798c49fd, 0x6e029680, 0x07587d03, 0xa5abca32, 0xd03065a9, 0x1bca9679,
6317 0xfc70b65c, 0xc58ab1b8, 0x371e55e3, 0xbd7b16de, 0xdc4e2a2d, 0xeb96f334,
6318 0x926efc60, 0x43e92a5d, 0x9530f8bc, 0xc83ee8e3, 0x9a43db6f, 0xbf298fbd,
6319 0x2a0ff0b3, 0xf20df7a7, 0xc969acfb, 0xb2849eaf, 0xe31ee4a6, 0xf03ea1c5,
6320 0xdbcf5b4d, 0x6c7f7662, 0xf1d9bd06, 0x83cf8c6b, 0x835ce8dc, 0xd9f0bc74,
6321 0x9cb38860, 0xc2eebb94, 0xcd7b33fd, 0x62aa2fb8, 0x3fa8fbef, 0xc6df3b1d,
6322 0xd7c232f5, 0xf8483ad5, 0xf083ad8f, 0x4b779c39, 0x73338b3c, 0x5a1c43fe,
6323 0x1e73e075, 0xd638666f, 0xc53dd0e2, 0x6c2dd39f, 0xceb6913f, 0xcfe5b558,
6324 0xf5c4310a, 0xd3903c85, 0x8baecbb1, 0x02707c6a, 0xae44261f, 0xf38ec4a7,
6325 0xb8ddd787, 0xe07e40bc, 0x4bd7857f, 0xc4207e68, 0xfbc203cf, 0xe83d8624,
6326 0x61d6c4d8, 0xfbd8e43a, 0x95f5b50f, 0x4f418b14, 0x575b7d03, 0xaffe8de9,
6327 0x26191fcb, 0xf9a3e39b, 0xd8cbe674, 0x45827c76, 0x61fb76f8, 0xf5a8852a,
6328 0xcfac0b7f, 0x60531d37, 0x638da1fe, 0xf0cf7f5a, 0xe799f279, 0xb1ef3c45,
6329 0xed05b1ae, 0x545ed1b8, 0x341f1613, 0xd3833bd2, 0xe3641d5b, 0xf11d99c4,
6330 0xe7ad3b01, 0x11bb2bcc, 0x8edbd5cf, 0xdf5a7e29, 0x959786c1, 0x52fd88b6,
6331 0x22044e30, 0xe2f33fe8, 0x7eb66cfe, 0xc6e5e6c4, 0x76f0e676, 0xdbb1cdbc,
6332 0xa73b6ef1, 0xbf85676b, 0x77e76151, 0x69dedf2e, 0xea073dc9, 0x132add3b,
6333 0xba7fbfd8, 0xc40a2c51, 0x45927f68, 0x4cf2e2d6, 0x8978e86f, 0xd9e31de7,
6334 0x493146f9, 0x557aff41, 0x84d1de7c, 0x15154814, 0x6a6b14e2, 0x35d2fed9,
6335 0x81a577df, 0xde24d7bc, 0x756deb86, 0x533afe06, 0xbf10f99c, 0x192b4e70,
6336 0xda357007, 0x49b7449b, 0xf8aaff47, 0x1e70fea2, 0xc7f72d7f, 0xf3c2e488,
6337 0xb0a3a297, 0x3a23fa08, 0x8c6b4e4d, 0x5ed905f5, 0x7c113c42, 0xf3fa9d91,
6338 0xb1cbe492, 0xeda3d42a, 0xb4b4a9a3, 0xa742c41e, 0x4b0ab71b, 0xfcddec79,
6339 0x77ec4e59, 0x4f3e36e7, 0x99d51370, 0xc183f6ca, 0x23b9d1b8, 0xc68c9b21,
6340 0xe29b890f, 0x0b9fc6d1, 0x07eff6db, 0x41d6b47b, 0xcf5489dc, 0x31555728,
6341 0x8e8dce0b, 0x805908b1, 0xfe6f73d3, 0x6d6bd696, 0xd0fe7116, 0x85f6d769,
6342 0xcf4113ba, 0xdc11e46c, 0xfe5007ff, 0x4e9bb92a, 0x0240bee3, 0xdf76a4af,
6343 0xb45d312b, 0xfce7bce3, 0x10071646, 0x98bfd5c9, 0x2470e2cc, 0xf1f3f400,
6344 0xf3a70564, 0x7ef0a43c, 0x3ae78299, 0x72f6bd96, 0x3930886e, 0xb92bf244,
6345 0xb4be7f48, 0x86c8eade, 0x77e27975, 0x9939c2b7, 0xbf5f5e32, 0x53b9fd12,
6346 0xd07e7eaa, 0x4f5c25d3, 0xf0b4baff, 0x32bfd810, 0xebb452cf, 0xcfeae7fd,
6347 0x59f71aa5, 0x2fb0bd21, 0x93ddea8c, 0xabbef442, 0xd6c7e6f2, 0x7a397cc1,
6348 0x011915ff, 0x482ac9fb, 0xe7ce0b9c, 0x97d068ac, 0x79bb03ef, 0xd893b015,
6349 0xebef172f, 0xc36dbf95, 0xdc79317f, 0x0aebf965, 0xe2dbfbc1, 0xecb2ae31,
6350 0x9f68c5b5, 0xfe7a69cc, 0x7f3d555a, 0x7c8c236d, 0xde39f3d4, 0x369be7a5,
6351 0xcf89ecff, 0xf3fa7909, 0x4b3e46be, 0x021bc784, 0xb5110e2c, 0x09b82dbf,
6352 0xd9f236e9, 0x0b76d7c8, 0x7ce2f75f, 0x96257fa5, 0x81b26654, 0x842974ee,
6353 0xa3d4617a, 0x80487b0c, 0x094a0f7f, 0xae57e2d4, 0x69efb478, 0x19423fbc,
6354 0x7a06cefb, 0x2ebd0224, 0xd13823d4, 0x46de7607, 0x5bb6703e, 0x909f5841,
6355 0x59e9aeaf, 0xfe94f79e, 0xfa22d8fe, 0xefc046d5, 0x762bd468, 0x0489376e,
6356 0x9e8264d6, 0x6e309cba, 0x6a2cfa37, 0x9ff70499, 0x286cb510, 0xc4e27bdc,
6357 0x1f7cc7f4, 0x8248e74a, 0x431b82fb, 0x3ec15317, 0xeba738fd, 0xde7bb066,
6358 0xec04a425, 0x6c71cde0, 0xa798b29e, 0xdc2ab77f, 0xed7b4eae, 0x59bef87a,
6359 0x785ce156, 0xcb56f367, 0x4507c830, 0x9bc47fbc, 0xb4157758, 0x332cd1df,
6360 0x812ccaba, 0xd8bf1061, 0x1dbb632b, 0x7cf19365, 0x6b6fd865, 0x3a40fb66,
6361 0x2c713f9b, 0x1de7b08e, 0x055e9fc1, 0x4c27acf1, 0x0c9ff7b1, 0xfdf89ab7,
6362 0xfc70df35, 0x7fda8c6d, 0xf6cadc37, 0x0878fdc7, 0xe97547ed, 0x330e3e79,
6363 0xcb96b87d, 0x6f4bf7f9, 0x6ceffec0, 0x47185416, 0x6e3bc50a, 0x39fb451c,
6364 0xe3c488f1, 0x392e2c30, 0x9bbfbf8e, 0x1f80d2b8, 0x0223af13, 0x3fc4f3e8,
6365 0x35b7dc12, 0xce2966ae, 0xa0eb7eab, 0x7586cf38, 0xb05b8a52, 0xe8ec6773,
6366 0x956f8fbf, 0x9c4cb874, 0x798169e6, 0x04a384e6, 0xa384eded, 0x123cf2fa,
6367 0x369db110, 0x4f6bf3fd, 0x5605f3ea, 0x49076f8e, 0xf86f7c05, 0x3aba4452,
6368 0x01eb88bb, 0xd9676f5a, 0xa6efbc00, 0xda9c22f3, 0x6297e9a5, 0x7e71ac51,
6369 0xf281e026, 0xe08509eb, 0x52c4f2f8, 0x5fefc63b, 0x05715a59, 0x7f9feb8c,
6370 0xac4573cf, 0x7611e073, 0xafed8129, 0xe2502772, 0x0ad7ae29, 0xe975df8c,
6371 0xebf63125, 0x70d6386b, 0x7d39e1ad, 0xd6279c69, 0xad0fc4be, 0x58290fcc,
6372 0x6050423a, 0x204fb65e, 0x078ed7c0, 0x373d973c, 0x640f27e3, 0xe0de3d00,
6373 0x2db3f405, 0x963b82cd, 0xeacab19f, 0x07bef360, 0x1fb0b5fc, 0x94aa5eef,
6374 0xae7b1f60, 0xabce0377, 0x2ba0876e, 0x5ba9677c, 0x9770e788, 0x8866c858,
6375 0xe9754b67, 0xee03c6b7, 0x4758cea7, 0xc4b27de9, 0x427e7284, 0xfefd2176,
6376 0xbe30422a, 0x03b5e3c0, 0x229b266f, 0xc0ff23cf, 0x95b0ff9a, 0xd5b0fbd6,
6377 0xf6497289, 0xdfa004b8, 0xe5ffdff5, 0xbceebd00, 0x0e394664, 0xed1ff3e0,
6378 0x4f9cadbb, 0x6bdce3a3, 0x3ca4ff01, 0xe5c3f505, 0xc965a871, 0xe5012f70,
6379 0x54758c7b, 0xf24d2fcd, 0xe946db50, 0xf09bb249, 0x76e22e7e, 0xdf6d4eab,
6380 0x45efe119, 0x090903e8, 0x69a5f604, 0x166854f6, 0xff14f142, 0x10f62ce3,
6381 0xca9233cc, 0x0929bf69, 0xf5616256, 0xc2674ab5, 0x9f71aae7, 0x2e65c53b,
6382 0xb8226e1c, 0xd2360daf, 0x9d9afd42, 0xdaf3ecd5, 0x66f68244, 0x605263ed,
6383 0xa367ad0d, 0xf88566d4, 0x2d5ba649, 0x4944ad80, 0xbde78a92, 0x7d339507,
6384 0x32fd65b4, 0x50afec31, 0x0ff31f65, 0xf5ac4171, 0xfcc38fba, 0xfc00bcf2,
6385 0xf5d43eca, 0x2e35b80a, 0x75cf6b2b, 0x79fe82c0, 0x3f706ed8, 0xbb8f90ac,
6386 0xb1353f13, 0xeba102fd, 0xb69dbf71, 0x1bb4668e, 0x15de0f54, 0x953eaf41,
6387 0x75cf9e08, 0xb572ffd3, 0xf611772d, 0xb9938f83, 0xf4169ac1, 0x2d91c4dd,
6388 0x5f6bc780, 0xa238bbc7, 0x3784c8ec, 0xde806b3c, 0x8c3f6a6f, 0xa2131878,
6389 0x33e5c8fa, 0x2a7b8552, 0x943ce19c, 0xfcf95ab7, 0x949bdb8e, 0xd1fd71d2,
6390 0x3338e5af, 0x6bd357f2, 0xace7bea3, 0xb198b576, 0xc13200d6, 0xba110ed8,
6391 0xc0b350e9, 0x8221bd1e, 0x4f99df7f, 0xbae942f1, 0xfc0ef417, 0x19818bf3,
6392 0xcd0d9b80, 0x7e82b1df, 0xa3f1e37c, 0xb11d7e99, 0xa227fabf, 0xf6cac3a7,
6393 0x0f803b87, 0xf22ffbd5, 0x728423f1, 0xea95cb0e, 0x443c6447, 0xe711bdc3,
6394 0x81ac5e9a, 0xf0b2330b, 0xf9011c7c, 0x0a234288, 0x3a364cd6, 0x7f9aaf81,
6395 0xcfec26bd, 0x9eb9e226, 0xded64e55, 0xcbf3591a, 0xefe8165d, 0xfe82f8aa,
6396 0xf5175b97, 0x97f3a25e, 0x5e30f388, 0x67e70ba9, 0x090a4bde, 0x7e0b7f24,
6397 0xb9eb6905, 0xc4a57e3a, 0x0757e0c5, 0xfff8d1e8, 0x6d93fb27, 0x6a83cfec,
6398 0x25ae7f77, 0x51b6df9e, 0x4f7b90bb, 0x05c33a7d, 0x89169c39, 0xd95ebe0b,
6399 0x51e77e93, 0x2dd706fd, 0x7a0d9f4a, 0xea99b13c, 0x8f5a29b1, 0xde09725d,
6400 0x6bdae75b, 0xd4677b43, 0x5fbc8beb, 0x7be31b5e, 0x1199e88d, 0x5371f307,
6401 0x5dc060d7, 0x8b924ab6, 0x41d9b129, 0xb6afad91, 0x91c6eb26, 0x8fddf1e8,
6402 0x2ff35276, 0xf8d2bf35, 0xe4afd85e, 0xcf1686e3, 0xff148214, 0xc7f7dfb4,
6403 0x5f01e679, 0xfcd938d7, 0x829a0e13, 0xab03fcbf, 0xcfa00ee7, 0x0710fb46,
6404 0x42231aeb, 0x125e2c99, 0x4f5be9d2, 0xe83365fa, 0xc248634f, 0xc74fcc71,
6405 0xcf4261b1, 0x4b8bf4f4, 0xab52f464, 0xc0ca7e02, 0xab1ac25c, 0x7bafb826,
6406 0x47bb3660, 0xbb0e6066, 0xe3dff1f7, 0x7dcc7ad8, 0xd0dc6c71, 0x4b581fd2,
6407 0xc97e81ee, 0x739bf112, 0x40dd39be, 0xef0fc42a, 0x0ddf738f, 0xb914b0fc,
6408 0x4e191fb1, 0xde2812e2, 0x0146a432, 0x552437f6, 0x1b8b02aa, 0x40ee3612,
6409 0x28cbeb4a, 0xdc61f356, 0x16b6a0ca, 0xcd1920e2, 0x6cf5cfb1, 0x5dbf9388,
6410 0xea29abbc, 0x3886ca3c, 0x541f6fe6, 0x8b937f68, 0x709479d9, 0x0f9286dc,
6411 0xbf88edfc, 0xf1db3b0d, 0xf50f5b19, 0x1b3e3227, 0x30205fe7, 0xf3c497e8,
6412 0x6488543f, 0x91f9c24d, 0x99df04df, 0xb23f382c, 0xd8235711, 0x58e297cf,
6413 0xe09d755c, 0x9ff90f5a, 0xb8165d48, 0xffc3476f, 0xeadf278f, 0x8e2be892,
6414 0xc367ceeb, 0xc3ea959c, 0x8eaf20f3, 0xaf87e7c9, 0x0d741ec5, 0x8b737866,
6415 0x9aeffdba, 0x4eb282dc, 0x8788566e, 0x78ebda44, 0x1df7e705, 0xe60b9c42,
6416 0x05cb1d43, 0xe160a746, 0x7d2403e7, 0x43db869c, 0x27781c6d, 0xb7e9132e,
6417 0xbc18ff11, 0xb2e2cc1f, 0xfd1a3d00, 0x86a473e1, 0x73c69e73, 0xe15969a0,
6418 0xee3a4db8, 0xe0512d93, 0xbe722f8e, 0x97fe86d9, 0xdff4c1d7, 0x60fe8788,
6419 0x6e732e3c, 0x15abf292, 0xae5fdbe4, 0xdb7b0449, 0x0ee3ceff, 0x0f91af90,
6420 0xcc7f829d, 0xfadf5841, 0x9f731c83, 0xa5a69688, 0x7f05280d, 0x0d3d2d34,
6421 0xbd79ed53, 0x07198a5d, 0xeef5cd3c, 0x9eb5e31b, 0xc3f30c58, 0xb39fd0d3,
6422 0x73de779e, 0x6177baa3, 0x8e3ebc7c, 0xd15ebbf1, 0x8026a8f8, 0x5de7759e,
6423 0x927eec09, 0x90ff7644, 0x8373c993, 0x492a52cf, 0xd1b9ef91, 0xdc47e91f,
6424 0x1181e633, 0xad9320d8, 0xbf166b88, 0x5065ced1, 0x97e4c743, 0xb9fae8c8,
6425 0xec294c6f, 0xcc6d919f, 0x30dc5d2e, 0x254bdb1d, 0x5387580f, 0x312d2ebe,
6426 0x73ae20b9, 0x1c9fd176, 0x517c1470, 0xe02e6b46, 0x91e888fd, 0xd431e36d,
6427 0x65b7f38d, 0x88409573, 0x9ea52a42, 0x9726241a, 0xb8eeb819, 0xff7314d0,
6428 0xe6c6ddb3, 0x4e71cddf, 0x06d2d34c, 0x8d8d9697, 0x39440fcc, 0x7aa47869,
6429 0xae365e98, 0xc5309cfb, 0x6fb40a47, 0x994ea7d4, 0x40dd6104, 0x9c2987b3,
6430 0xd63d9aff, 0xf40521f4, 0x4b01d60c, 0xe4d47da8, 0x9abf8439, 0xfc4af18a,
6431 0xfd5f9a13, 0x8e03e602, 0xded00aeb, 0x8f5ffd51, 0xd98232fa, 0xd3d82b6f,
6432 0xe7653888, 0xc107f7de, 0xdf87dffa, 0xeb0f10bf, 0xba917f40, 0x9e7ec1e2,
6433 0x78ddffbc, 0xe1f43738, 0x715e2cfd, 0x351e6197, 0xfaecc6c1, 0x6c92b6a3,
6434 0xdf02d7e8, 0x227ae77f, 0xb3564970, 0x01e58d75, 0x5c9e70d1, 0x554f2f7f,
6435 0x9ee1b263, 0x5bd63f1e, 0x32e7efc5, 0xcb92a1ca, 0x4db6f961, 0xed0a864a,
6436 0x7eb6dc7b, 0xa08f6e70, 0x14d93cbd, 0x8d11f38f, 0xc6db459e, 0xfa773028,
6437 0xaf99b34b, 0x6ccab77f, 0xc317705c, 0xf387967a, 0xc1e748cd, 0x6fac367d,
6438 0xfed8cfc9, 0xadb48594, 0x7abed4d5, 0x0b79d99a, 0x7c963f63, 0xa7f616a8,
6439 0x90f25bc2, 0x7862f380, 0x4e3a7eff, 0x883f5679, 0x7ec65eeb, 0x31cdef1a,
6440 0xe6d55f9e, 0xfcb8cb53, 0xf50788cb, 0x6b5cea2f, 0x369f5b33, 0x1fceffc6,
6441 0xff61b2ca, 0x91fe3c6d, 0x79c0264b, 0x86871de8, 0x3eee5c24, 0x1efc33e5,
6442 0x1a57b826, 0x823e93d2, 0x654db669, 0xbf3464f7, 0xaae02f7d, 0xef1db83a,
6443 0xf6bafb19, 0x94f9aaa6, 0x6b30f603, 0x91fa8776, 0xa43f01ab, 0x97f9d04c,
6444 0x282e9bd5, 0xf8cbbe6c, 0x7e7f0770, 0x1b37f407, 0x3fab59f6, 0x7ce54c9a,
6445 0x317ca547, 0xbf321ef2, 0xa6ee7f4d, 0xfad5fdaf, 0x2b5bf5a9, 0xd1fbe2af,
6446 0xf869df8c, 0x2c78e6cf, 0x6eba52db, 0x9ad16500, 0xf30627bd, 0x4e7868f3,
6447 0x1197c347, 0x4948cb3f, 0x8110ba61, 0xb147e693, 0xcb3c9a5f, 0xfef216ea,
6448 0xbaf8d3fb, 0x8fc41a5e, 0x118dc37a, 0xdb721d1f, 0x2367d060, 0xb87a3a3e,
6449 0x3627e45f, 0xa99427e6, 0x678842ee, 0x9d763751, 0x394fc233, 0xbc1dd529,
6450 0x0b6cf40f, 0xf8c479c3, 0xd7b99ccb, 0x57cf1c65, 0xe1fdabc6, 0xdb943d3e,
6451 0x6017d844, 0x5a7bc3f6, 0xb73eed3b, 0x7c04a86b, 0xb4f4c22f, 0x7435c4af,
6452 0xd2f97768, 0xc0382e27, 0x411cee8f, 0x11d38e30, 0x77f7a7af, 0xf9e91136,
6453 0xa543971d, 0x3f8ffad4, 0xd2da8d83, 0xda1dfb8a, 0xa071e4bf, 0xb145cd2f,
6454 0xfe27f9fa, 0x86f7e11d, 0x4cf5c5dd, 0xe02c979b, 0x99abbb72, 0xda2f67ad,
6455 0x30f28a58, 0x437ad7ee, 0xd0661670, 0x638d3caa, 0x51bf9014, 0xdf5c4b3e,
6456 0x51607dc1, 0xf08f2272, 0xdc1e017d, 0x2f5653a7, 0x28c3dc62, 0x93bb7cbf,
6457 0x6b57a39d, 0x42b71e70, 0x790ebd8a, 0xb5f4dda5, 0xc7ec63fa, 0xed0126c2,
6458 0x65fe91a4, 0x0dd76a5b, 0xd67fd020, 0x847ee8bf, 0xe25da206, 0x55fad4fd,
6459 0xff785c46, 0x50fad440, 0x7224f5db, 0xe6f2f53f, 0xbf2fb8c5, 0xb09ff69a,
6460 0x85c61238, 0x7a35fa34, 0x1428fd8d, 0x8816c8cf, 0x5c16aee3, 0xefa39f60,
6461 0xeeeb7327, 0xb0d85c3f, 0xafc8207f, 0x66fb625d, 0xce02fddb, 0x203f3b0b,
6462 0xbd607d6c, 0x3d69eb80, 0xed99afca, 0x8e59ea07, 0xe7dc0a35, 0x8851b657,
6463 0xf565c729, 0x11a1aef9, 0x60796a76, 0x8ea86b86, 0x1fdc46de, 0x54a1a2b2,
6464 0x9d807cf7, 0xfdb893c7, 0x48df4dee, 0x38cc624d, 0x9a5fa693, 0x97fa69be,
6465 0x3cd9576f, 0xcc1c0a47, 0xfebb04c8, 0xa84bce18, 0xcedabe5d, 0xd1e607d7,
6466 0xb89faa57, 0x581f5ba0, 0xb3e4c792, 0xe7c62c44, 0xca57d93d, 0x1e7d9d07,
6467 0x7fefd767, 0xd1fdb6f8, 0x85e9a1fa, 0x5ea33fd6, 0xc5aff918, 0x30728cd5,
6468 0x82e81ff2, 0x7b1bc1f9, 0x0407816d, 0xa74677d0, 0xe915af7f, 0x702b48ec,
6469 0x3fc839c1, 0xce9407c0, 0x31dbf4ea, 0x9496235f, 0xc75e71da, 0xfae34de7,
6470 0xe1c83f16, 0xab4ed67e, 0x473b2c7b, 0xb80c9254, 0x36db5298, 0xf8a4e2d3,
6471 0x2174647c, 0xe53a2bdc, 0x1099b6b1, 0xc8f25efa, 0x5fb84298, 0xb6d6ca7e,
6472 0xea2e2d77, 0x2d8ed5d7, 0x57e5fb84, 0xf680dd80, 0x10db9607, 0x89e53d57,
6473 0x9579f2e7, 0x5cce3fbd, 0xcbdd9f32, 0x292bcacc, 0x3c742d8f, 0xfc3c3cab,
6474 0x959fa0f7, 0x1045c5ad, 0x8884a9b7, 0xaacf1d37, 0x2d908edc, 0x93e78d9b,
6475 0x6cdb7be8, 0xf076559e, 0xc5ad2eeb, 0xb0f2adf1, 0x0e44fa84, 0x44a8b8b1,
6476 0xdfa56afb, 0x7ea38dad, 0xdaefe52f, 0xe60b8b24, 0x1fb9f4af, 0x936bb5e6,
6477 0xf11aaadc, 0x7c1f935c, 0x35ac7407, 0xfdfb75b1, 0x684f0daf, 0xbf78ccbb,
6478 0xc32647df, 0x67c5a43c, 0x9e58d4c1, 0x7cf138af, 0xc589be44, 0xbfe58c35,
6479 0x512cecd2, 0xd5170033, 0xaf161487, 0x4fe07fa6, 0x17a61156, 0xeb9d84d5,
6480 0xf04c3aaa, 0xa1f54b1c, 0x02c73c42, 0xd63ffcfb, 0x735ff0e1, 0x571ba58e,
6481 0x92054f8c, 0xc08a5930, 0x55bb34f5, 0x9bfb1797, 0x887f4046, 0x7382e718,
6482 0xa9866218, 0xbfed0766, 0x294d0578, 0x4ba7243f, 0xea5afb84, 0xe1114ea6,
6483 0x3235a9be, 0x62623fdf, 0xf6b5cce7, 0xb47f389a, 0x64bdb4f4, 0xecfdc807,
6484 0x36b9ad5b, 0xf3817eb6, 0x6bbfad61, 0x60113704, 0xe08075de, 0x149c80f9,
6485 0xb3fc02d2, 0xe01e7711, 0x127b3ded, 0x375b37e7, 0x90197fa6, 0x97a6ccba,
6486 0x57f78a55, 0xfa84591f, 0xdd304ae0, 0x6ff34993, 0x7cb197d9, 0x2642e986,
6487 0xf6dbf085, 0xc6bf9672, 0xcd086174, 0xce5f6bbf, 0x49c0b0f2, 0xf623b607,
6488 0x48ff428a, 0x7de38768, 0xc01afb9b, 0xf16264b7, 0x0515e917, 0x7db453d7,
6489 0x44e96b21, 0x1ef8f00b, 0xa7884dd8, 0xdafc16d4, 0x02eaf106, 0x3dfb0ab7,
6490 0x837bf336, 0xf1aa69be, 0x7099b455, 0xf02903fe, 0x4fce43ff, 0xc9a42e4d,
6491 0x8bec0d7d, 0x6bee8d25, 0xb4ed1d60, 0xf606d3dd, 0xad1bec66, 0x377ec053,
6492 0x5ca7f3bd, 0x0afc9fbc, 0x37d8cf56, 0xf6909ce8, 0x066fece7, 0x8f5c8a6d,
6493 0xffcf6d3e, 0x62a3be14, 0x5054ff40, 0xaa0ee49d, 0x44dc6b87, 0xbe60b255,
6494 0x362f9fac, 0xb69f6611, 0x82ce4ad9, 0x10c0c95c, 0xf6455b8e, 0x6bc84e92,
6495 0x26b49cf6, 0x9b5f69f5, 0x845abd92, 0x23293971, 0xd8117478, 0x7bb1dfff,
6496 0x1bb7043d, 0x14be73f7, 0xed8cd7be, 0xfec1b10f, 0x177fd010, 0xf2a7f349,
6497 0x2f8b17f8, 0x88dc9493, 0x07ef3079, 0xec1a7efd, 0x63609f37, 0xbf6807fb,
6498 0x63abb044, 0x58e98a88, 0x81656788, 0xdf983d28, 0xde8f1a43, 0xdc7feb47,
6499 0x9649e2ca, 0x0f8ba206, 0x38b3c766, 0x8b074ccb, 0x8dc9c60f, 0x10ff82b7,
6500 0xc1388e77, 0xa5fce87f, 0x22fee122, 0xae2379c9, 0x11341d8f, 0x3959f7a0,
6501 0x99f584e0, 0x7524abae, 0xafaee933, 0xab5bcb93, 0xbd4571f7, 0x7372e20a,
6502 0x7d3fcc1d, 0x7ee09f36, 0x4a53aee8, 0x934dd600, 0x91352c32, 0xf92b9ff1,
6503 0x0b390f77, 0xfe21e332, 0x408e37bc, 0xc5f613fb, 0xbf0e4099, 0x056396de,
6504 0x3c04bc3c, 0x32487ca2, 0xfa86ef3b, 0x7a502e92, 0xdb39f133, 0x63a92f27,
6505 0x277f2812, 0xe15760dd, 0xad67a9be, 0x7ee0378d, 0x784c17d0, 0x8a4beebf,
6506 0x2ff214ab, 0x609d579d, 0x6ccd9f7f, 0xbcfec38c, 0xbcfec260, 0xf575d714,
6507 0xc3f74a4a, 0x4a7c5823, 0xec0911b2, 0x502a64b2, 0x73cfa6ef, 0x493cd9e3,
6508 0xe3cbd3b3, 0x2e3cfe99, 0x200f3c10, 0x7f51f299, 0x9d3afdb4, 0xebf7045d,
6509 0x2ad59bf4, 0x4ae38e02, 0x4851b8b5, 0xe4cf7884, 0xdb7e8212, 0xe78cbb64,
6510 0x307f6072, 0xc29b1b9c, 0x0f94efed, 0x813d712a, 0xdc30e04a, 0xe762d97f,
6511 0x75f168f7, 0x4e39ebc5, 0x226d23ae, 0x5dd791f8, 0x07882e22, 0x8a497f5d,
6512 0xe74e47e9, 0x10233ef5, 0x97be8129, 0x0095517f, 0xef44f977, 0x2faf4de7,
6513 0xe0e3053c, 0x39e18b54, 0x8f4889f8, 0x4ff7cf1b, 0x4fee1a77, 0xd6f3e78e,
6514 0xe47064c1, 0x1d6d313e, 0xf238ba68, 0x8b53f409, 0x65f01714, 0x3efdddbb,
6515 0x5bfa7bac, 0x38b97265, 0xb63e33e2, 0xa5c46f9f, 0xa1ff5c38, 0x2e03b4f8,
6516 0xf3afaeae, 0xafbf695b, 0x07eaca1e, 0xb95d821c, 0xc92997f2, 0xf1cde760,
6517 0xa968decc, 0x97c03b86, 0xcbe18133, 0x3f5bba39, 0xe267c557, 0x01be9a7b,
6518 0x3d9ea0ee, 0xac7e6072, 0xd78a6575, 0xedd78055, 0xb3f38276, 0xe65ba51f,
6519 0xed699e82, 0xf86789ec, 0x6aeba637, 0x7587ee57, 0x6c67ff1d, 0xe03698bc,
6520 0xde391292, 0x3864e87f, 0x3375aaf3, 0xf3fda66f, 0xbf5c65da, 0x8be7e549,
6521 0x1e92f122, 0x770d1781, 0xef16761d, 0x7533f0d1, 0x3c22bbf7, 0x2119fa9f,
6522 0x9e124cce, 0x99f86887, 0x9c3867e2, 0x138d8872, 0xddc7e1bd, 0xe6069ce5,
6523 0x87370a31, 0x280a6e18, 0xb7f7f03e, 0x118fc07a, 0x8af54f37, 0x3cf12f9b,
6524 0x53bdaafc, 0x186ebb2f, 0x7df7e9f4, 0xb689d31a, 0x8f82fbd8, 0x56ef7e72,
6525 0x06cc6eea, 0x8993717b, 0x48937f9d, 0xe714adc6, 0x7bb4e3bb, 0x20b26be5,
6526 0xf6625dbf, 0x19b37b67, 0xbb76cfed, 0xd77183c7, 0xcb9e0b34, 0x0da79226,
6527 0x06bbf5f6, 0xdfc8d458, 0xc72ef8d1, 0x9a1ca361, 0xeffc0278, 0xf3fc98d7,
6528 0x1b81ca6e, 0x197a48ec, 0x93b8c393, 0xe21126ca, 0xfdfc8e42, 0xe04faf80,
6529 0xc3c02d4e, 0x25ef0571, 0xa0ae3eaa, 0xbecdfc5d, 0xbe210bb7, 0x9e1feda9,
6530 0xc2ede7b0, 0x3ef09182, 0xdc6bd9c3, 0x3c796aae, 0xd276014a, 0xc4fd2f70,
6531 0xfd2679f0, 0x8025f2bd, 0x72eeec9f, 0x73eb7de3, 0x1d1784e0, 0x736d6e77,
6532 0x60b3074d, 0x4e7d6fbc, 0x9b1f9d88, 0x1d3dd47d, 0x7dd4654c, 0xb70f1ceb,
6533 0x715dd691, 0xdffdf462, 0x163e7c74, 0xd7fbf10f, 0xc1c40a43, 0x6b9a951b,
6534 0x26a27cd8, 0xa68fec0b, 0xf947f877, 0x08e1f8d6, 0xc3ff7ddd, 0x88f3f8f8,
6535 0x38f7624b, 0x4eb829b5, 0xdf6128f8, 0xeb71f235, 0x39f7ae2b, 0x0f9c5eab,
6536 0xb96c70f6, 0x576dd71b, 0xfe7c4539, 0x64b21213, 0x125cbc81, 0xca3477ae,
6537 0x4213d4ea, 0x2a447bf7, 0xe5a76119, 0x8dc5fa7b, 0x70eff685, 0xf00e4c78,
6538 0x43aea42b, 0x4984ddf0, 0x6ec16339, 0x4dacc7db, 0xa34c7186, 0xb455d29b,
6539 0x874dded5, 0xc7275746, 0x858e1dc9, 0xf678c726, 0xe0a1d81d, 0x7c0b76b1,
6540 0x71a0e1af, 0xff2639ef, 0xfc803c08, 0x2c20f1bb, 0x07c6bc80, 0xfcb54f1b,
6541 0xa10f1f3f, 0x1e9f2081, 0x087100f1, 0x43c2b7c7, 0xc355f016, 0xaed7f503,
6542 0xfe68fe02, 0xf6c2a35a, 0x0d796a1d, 0x7cf64507, 0x10a5cf7c, 0xf6443fdc,
6543 0x6d39d959, 0x57ae224f, 0x6d64ecbc, 0x3ed87e74, 0x6498ba98, 0xebf983b2,
6544 0x8c89efda, 0x57e80909, 0xe106a18e, 0x06e3f40e, 0x71743da2, 0x4176917e,
6545 0x71377b80, 0xf806796f, 0xd064a197, 0xe2e6318b, 0x877fe010, 0xf8064a6d,
6546 0xc9b63987, 0x5daf8059, 0x0ebd5623, 0x01aed643, 0x516f2fe5, 0xcd27fdbb,
6547 0x6af0b5ee, 0x746ff6b5, 0xbd74fb30, 0x020f9d9b, 0x87491dbb, 0x2c41ff66,
6548 0x9a108740, 0x86cafa63, 0x0db9baf6, 0x41d039ec, 0x205fbaf9, 0xe41fe04d,
6549 0x5329dc9b, 0x17ebcfc1, 0xcece8092, 0x860c5fbd, 0xf3716538, 0xde8147ab,
6550 0xd43d6d62, 0x350f5fa5, 0xbf9ad1fa, 0x342bcda3, 0xcf9b487f, 0xe504df82,
6551 0xd3b9fcd9, 0x26add6cc, 0x6e782c87, 0xeaf3f1f9, 0xbfae6e55, 0x3147ed12,
6552 0xa42dc7ef, 0xeed2e915, 0xf399b91d, 0x9d10f8a3, 0x39436687, 0x3e513721,
6553 0x1defc4dc, 0xbfa5c9b9, 0xbc96e157, 0x688ef7d8, 0xbef6f4f5, 0xd6b87c71,
6554 0x6df46eb0, 0x763e43d3, 0xfa7fc8cf, 0xd2773cd8, 0xc12fd110, 0xce979a80,
6555 0x327069ee, 0x62521c3e, 0xb9fb578f, 0xb5324efe, 0xe5b9c365, 0x8efe7bfd,
6556 0x7b2be3e3, 0xf81efefe, 0x494f1389, 0x4eb5f604, 0x012e353a, 0xd2f3e7d7,
6557 0xab593d70, 0x9369fbd7, 0x88e7b08d, 0x5777ed1f, 0xdc7a520e, 0xc167d00a,
6558 0x1e67b7f4, 0x77d429ff, 0x2244b8f1, 0x2a144dcf, 0xc710a19e, 0xbfbfe42d,
6559 0xfe605073, 0x907e5692, 0xf3c5eeff, 0x21b0b71c, 0xc48fbb42, 0x9be7211c,
6560 0x9a193df8, 0x593a6f5c, 0x8eca4a74, 0xfdfc0f96, 0x5a0be233, 0xf399a15c,
6561 0x11fcb48f, 0xa77cb7cf, 0xfc096ee9, 0x89a4eff3, 0xeed11dc4, 0xe0ce950c,
6562 0x2f1ce223, 0x4a7e0c3b, 0xbd3f73cb, 0xde2b8e99, 0x4adc4437, 0xfede6de8,
6563 0x5be4367a, 0x8ff798c5, 0x9dfbf918, 0xfef1bbe6, 0x2a092191, 0xfb5bd3d2,
6564 0x38a6ae93, 0x27720d19, 0x65cbcfcc, 0xe51877f7, 0xff9ecafb, 0xd91b6e48,
6565 0x927bbf33, 0xbf0e51bf, 0xeb80533d, 0xc3c9bd4e, 0xb47ddb88, 0xbfda7e9f,
6566 0x9fa7ed10, 0xf8af63fa, 0xbdff989c, 0x1af30d2f, 0x9f7bbd5e, 0x4e7f064e,
6567 0x64f4e9c3, 0xbb899b86, 0xec4c9a7f, 0xf232f2dd, 0xf30773ed, 0xd710e66b,
6568 0x3fe99bec, 0x78ae0a77, 0xd27e17b4, 0x4ab3fb0a, 0x0e738d38, 0x41ffa217,
6569 0xe31079f8, 0x1c473638, 0x7bdee789, 0xa19bddfd, 0x5b9832f9, 0xbf0578e3,
6570 0x36b802c7, 0x6f45538e, 0xb2e049d4, 0x98ab4a15, 0xba7ee31d, 0xce519746,
6571 0xf6094847, 0x8d3a27a3, 0xabd23038, 0xefdae7f9, 0x4c7e50c0, 0xddf5a24f,
6572 0xff63e6aa, 0xce61c6a2, 0xdfc69e97, 0x9c95fa9e, 0x1cdee3c0, 0x4e4e17ff,
6573 0xdbd80b7b, 0xe519be93, 0xecd72c66, 0x90342147, 0xfc1fa983, 0xa9092191,
6574 0x97850fa8, 0xe3a6e214, 0x3fa8190c, 0xaf8a4eff, 0xe3ddbc40, 0xc27acf64,
6575 0x1325f55b, 0xe37724f1, 0x663e0e4e, 0x96eddc03, 0x1f106cea, 0xba5ecebd,
6576 0xda6f5406, 0xf0b305a7, 0x1336879e, 0xf4d99081, 0x102d73e6, 0x251ef047,
6577 0xa0a03e78, 0xc054ff79, 0x56a5efe9, 0x5e75479c, 0x08b1e424, 0xbcd8333f,
6578 0x587e06c6, 0x6f9d8530, 0x7448983b, 0x27f790fb, 0x8f06bc30, 0x1dd9bf9f,
6579 0x2f12fca3, 0x29dc499f, 0xc72e38d9, 0x70a3fc63, 0x3ffb09bd, 0x481d704d,
6580 0x9e65bf01, 0xce85f380, 0xa40e13bd, 0xee3b7a50, 0x333b444c, 0xdde0f83d,
6581 0xc6882a4e, 0xcf8b1eff, 0x780a16bb, 0xeaa140cf, 0x59617cc2, 0x98dfee26,
6582 0x99e48ff0, 0x433e50c5, 0x74cdf9c6, 0x788252b1, 0x2134d9d4, 0x7b8be607,
6583 0xf85ab684, 0x297f5c1d, 0xfd38876b, 0x7cff30c9, 0x0c7938a7, 0xaa9c76fe,
6584 0xefe187e5, 0x3cc31203, 0x0bced56d, 0x7cb4cdfb, 0xf7016cd5, 0x66774eef,
6585 0x7e047f10, 0x7953d70a, 0x6cb8a58e, 0xb8005fee, 0x3fa4599e, 0xc4bb3837,
6586 0xeb910246, 0xef138216, 0xf7c83b21, 0xfc097769, 0xe7ae7c5e, 0xcfbc7037,
6587 0xfbac9b99, 0x3f3094ae, 0x6453bbd3, 0xb3e471f7, 0xf4d6a1df, 0x87ae46eb,
6588 0xf1f9f037, 0x8e864f3c, 0xd288628e, 0x5b3f4088, 0x62e5be47, 0xa5cf0e1b,
6589 0xe78707e2, 0x1c6ef6d3, 0x8ad79861, 0x17116b95, 0x6f1d6c69, 0x1382ec36,
6590 0xdfea6ec1, 0x9f4f25bb, 0x97c7a18f, 0x3d9a13b5, 0xc457bd98, 0xf9d9c375,
6591 0x8902cf94, 0xaebfd3f2, 0x726098bd, 0xd078801d, 0x78dc97ad, 0xbd944e8f,
6592 0x1be8a0f8, 0x50df8bd9, 0x7aa3cc1d, 0x1f0264fd, 0x41910737, 0x8ba63760,
6593 0x380a7edb, 0xa6e3a4ea, 0xb48e0639, 0xef9b4771, 0x063d5217, 0x6c3390dc,
6594 0xa5fa659d, 0xa4efdc34, 0x76c3f7cd, 0xae25fa84, 0x6fd2fe18, 0xf774b212,
6595 0x4aed847a, 0xe7225f84, 0x64bf7b7e, 0x9547f53a, 0x206fa01c, 0x7b458ff1,
6596 0x42c97186, 0xf10518d8, 0x1873b4c1, 0x744af1e7, 0xf3e38afe, 0xb02f88d3,
6597 0xb752427f, 0x15fd187e, 0xd63cce2d, 0x7a53f9a9, 0x8de3849c, 0xa57dd8b3,
6598 0x810a4e1a, 0xb3ffa09f, 0xf4eb8c44, 0xfdad1b86, 0xa212f0de, 0x564c08f6,
6599 0xfae1788f, 0xf2f175f7, 0x197c6d17, 0x05f6864a, 0x343e1a27, 0x9bc718bc,
6600 0x83c434ff, 0xba6f1a7a, 0x0e6f197a, 0xaed1908c, 0x7cd7e6f7, 0xeaf3e4ea,
6601 0x37a62704, 0x7f1b355c, 0xd82c6897, 0xf937f011, 0x6b8e15b8, 0x1c9c33d5,
6602 0xc1245b68, 0xec1791fa, 0x1cb76647, 0xfff078b4, 0x81c4c600, 0x008000d5,
6603 0x00000000, 0x00088b1f, 0x00000000, 0x7cbdff00, 0xd5547c0b, 0x67b7efb9,
6604 0x332479ef, 0x49926649, 0x1d843c32, 0x09212108, 0x11bc210e, 0x11084937,
6605 0x88a80ca2, 0x1f01d68f, 0x4d092060, 0x6f53d5ad, 0x52812133, 0xbd583d6c,
6606 0xf4f47bd6, 0x41ed5837, 0x0108750d, 0x26702783, 0xd0f098a0, 0x7ac0f820,
6607 0x452968da, 0x5a18921b, 0xf5cf6a0f, 0xf6b7df7c, 0x8326664e, 0x73def7a5,
6608 0xd62e9f87, 0xf5af6b5e, 0x5ff9efad, 0x4a9b5adf, 0x500a9fc0, 0x982015b3,
6609 0xe1f95006, 0x06484a86, 0x01203be8, 0x96d40314, 0xfe1b41c9, 0xb1fdb4b5,
6610 0x0cdd45c7, 0x51df8956, 0xf5c02661, 0x950b7e20, 0x06e6c50e, 0xbc95e658,
6611 0xd6801672, 0xe1bfde2e, 0x62a82592, 0xf9af7afd, 0xe89b1ee3, 0x5fff35fb,
6612 0xb800c803, 0x197f7f51, 0x2ffb0ffd, 0x1860a4d3, 0x3b365d5f, 0x978dffba,
6613 0xa6913fca, 0x62d72c02, 0x3e4fc39e, 0x22f2a793, 0xac24becc, 0x8fb74457,
6614 0xcfb92673, 0xe32ff1d9, 0x32d7fc61, 0x65f3c5c0, 0xaff7516f, 0xc8ed77e9,
6615 0x523d48f2, 0xace80166, 0xdb1971b7, 0x7f016e5e, 0x4d2581c8, 0x0065c450,
6616 0x9d0a0152, 0x581998b8, 0x0d0164bf, 0x136308f9, 0x3ab9f7e0, 0xdf86131d,
6617 0x07e3883f, 0x8e30dc70, 0x3801c81f, 0xfae4ef54, 0xae1ef56b, 0x2f82935f,
6618 0x877fe3a4, 0xb8a8b0bf, 0xdfedc59e, 0xdf38fc51, 0x8f0a4be2, 0x93d69b3b,
6619 0x71830b4f, 0xf73f9eb4, 0x0de3fd16, 0xb6bfdc30, 0xbf8b33fd, 0xf9ebf2f0,
6620 0xa7e7f35b, 0xcd3f3ca8, 0xcf0c15ab, 0x180144bb, 0x9a5ceb83, 0x635fcd1b,
6621 0xc6f9589e, 0xfeb96fca, 0x56fcac7e, 0x90c7acc4, 0x32a2f40f, 0xffc38a8d,
6622 0xa6d0264b, 0x437e5e5f, 0xb3f8b1f2, 0xdb2305bd, 0x72c97e01, 0x974f1e1a,
6623 0xbe2b7417, 0x19974142, 0xb752baf5, 0x40efd40b, 0xb2b9ca0a, 0x4889c213,
6624 0x2be7f5d8, 0xf4a8513e, 0x9471f04a, 0x6c7c033e, 0x1e1e5bc8, 0xe425d17f,
6625 0xbcf0da6b, 0x7764148b, 0x0b1f3d11, 0xa8eb3881, 0xea1471a1, 0x6c39601f,
6626 0x155a61d9, 0x635c75c2, 0x547d3b81, 0xe0328a26, 0x937db894, 0xf6e3c4d3,
6627 0x8266c5ff, 0x3e5e01ab, 0x48025998, 0x3cead79f, 0x42011306, 0xbff7e066,
6628 0xdfb9524e, 0x240824e6, 0x74a0fce0, 0x945ec8db, 0xb45c8012, 0x25b4653b,
6629 0x364388d8, 0xd91f612b, 0x8157bf61, 0x2fdbb406, 0x050ef78d, 0xc914076e,
6630 0x4c738fe6, 0x7ef4598d, 0xf61e7bb8, 0xa8a4559b, 0xcb8bb0db, 0xda877eaa,
6631 0x9d580efb, 0xfeff5ef4, 0x699877ef, 0x1780bf9c, 0x0ed78429, 0xe7da8158,
6632 0xf241cc3b, 0xe3e48b1f, 0xfdeb09b2, 0xec560003, 0xb8557f3f, 0xd76e5014,
6633 0x13a37740, 0xc724b9cb, 0x8d7bf238, 0xfece9bd6, 0xe50a31c3, 0xd39740b4,
6634 0x956fdd02, 0x8fd9901e, 0x41c92694, 0x53f61ac8, 0x5a32ead7, 0x3a256c80,
6635 0x7ae1b416, 0x4bdafdb1, 0xb4bf5c4a, 0xe1771f48, 0x9321419f, 0x7ad1085c,
6636 0xf84da8bb, 0x14d012a3, 0x6d4b29c0, 0x97e4ed31, 0xce459e90, 0xc973e7e8,
6637 0xef5ea277, 0xf84bf18e, 0xf7bcd133, 0x8bbcc53b, 0xf726bfe4, 0xb65ffae0,
6638 0x43cdef68, 0x9a4e077a, 0x0e7c59e1, 0x6732b1e7, 0xd0da5f24, 0x973983ae,
6639 0x07fd8bb7, 0xe9153513, 0xc7f49979, 0x9ad1f541, 0xfdf2f53a, 0x940cf6a7,
6640 0xb9787760, 0x13028579, 0x7b4f1d58, 0x3df98632, 0xff3aaf82, 0x22d9f963,
6641 0xf91d9341, 0x5bddb0bc, 0x0465ae46, 0x8f913b1f, 0x80c95ef8, 0x295cf3c6,
6642 0x78fb0d1f, 0x46a25cf9, 0xb9f2fefa, 0xffcd1ad1, 0xfa6be92a, 0x3feffeb0,
6643 0xfe48983b, 0x2aa8f913, 0x2e0317a8, 0xd659f79b, 0xa1f7a15f, 0x6dc13951,
6644 0xf5d16f58, 0x81c4e5fc, 0xefc4f9a3, 0x67de4deb, 0xe3651a69, 0xe48515c4,
6645 0x9c96b737, 0x0d2477c5, 0x7ed107a4, 0x7709d524, 0xfb401960, 0xa40b7d21,
6646 0x1993eb02, 0x36f34042, 0x9534f06a, 0x29abe60b, 0x1c41efc4, 0xe341dbb3,
6647 0xe7a429a9, 0x338bd7f0, 0xf923857d, 0x0a8f52de, 0xd6b4f385, 0x1b2534db,
6648 0x93bd5f60, 0x1ef56deb, 0x57ad5f2e, 0x2c74dcb9, 0x8e20c1f9, 0x3459ab53,
6649 0x7df86d25, 0x8fb0aa57, 0x8867e805, 0x052005ae, 0x0b73a803, 0x5ef5d61e,
6650 0x249b8291, 0x27ae1392, 0x97289f82, 0x08dc9ec1, 0x4d2936fe, 0x35b26693,
6651 0xf28bbcb0, 0x063efc4d, 0x59f3e0ff, 0xdca3fb23, 0x4baaeaa3, 0xbae67e62,
6652 0x961724b4, 0x52f8743f, 0x6e916ca8, 0xb8017c39, 0x5bf512ee, 0xfe380be5,
6653 0x7842f0f4, 0x74c3e310, 0x15f10c14, 0xfd13b77f, 0x402c3a33, 0xca80c1f2,
6654 0xd3a45976, 0x492e7da3, 0x323e70e7, 0xe0c7af9d, 0x30cad67b, 0xe83ed1e9,
6655 0x17be2349, 0xb4767cdb, 0xc843a428, 0xf66e9355, 0x9cde3848, 0x26578b74,
6656 0xa6fa26d2, 0x75fe446f, 0xd884e3a4, 0x6323a3bf, 0xa6f68aac, 0x4fbc6f29,
6657 0x1cd9ad76, 0xcc2b8161, 0x71113dbd, 0x719e133c, 0x9f22bc52, 0xbdf235f6,
6658 0x01c977f3, 0x73886bf6, 0x9e758fc8, 0x7186f64a, 0xd92e6b9e, 0x7fd256bc,
6659 0xf5ed117a, 0x54f26260, 0x5dd0cff2, 0xd6b8ebc6, 0x6f91d626, 0xd8bb17f6,
6660 0x9f0f859f, 0x6dfef7c0, 0xe9fc8010, 0xca1fdd35, 0x9a94f480, 0x907b32f2,
6661 0xe4d2c3ce, 0xfc9f2a14, 0x9701725d, 0x897b92a7, 0x764d073f, 0xa77de695,
6662 0x46ce2d5e, 0x72ded17d, 0xd61d0098, 0x0a1cb782, 0xa1ea2795, 0xe5f51b38,
6663 0x971b7aad, 0x5c9deb27, 0x70f7aa9e, 0x49db1879, 0x76c75e9f, 0xb037b7d2,
6664 0xd85dea9d, 0x1c31e54e, 0xdba2ca97, 0x96bc7893, 0xb42c92db, 0xd0c9838e,
6665 0xfa4fcc6c, 0xb70c4e14, 0x3fe01782, 0xab6afb1e, 0x978c2aed, 0x34a17f56,
6666 0xb3f4f90d, 0xac142aaf, 0xee3c5b1f, 0xbb60bfa1, 0x1fa667f9, 0x9bde90db,
6667 0x8f5a394e, 0xaa9edd63, 0xfa41d8fc, 0x9d112c79, 0xb9b59923, 0xa63a434b,
6668 0xcd1c6f93, 0x3660d76c, 0x7af4d3d6, 0xd95d7cc0, 0xa595807c, 0x42e0f93d,
6669 0xaf597125, 0x577f21b3, 0xa3dffdda, 0xabb025ba, 0xaa2aeca2, 0x7b248863,
6670 0xb641cc97, 0x7b92b1f7, 0x95bbc605, 0x127fff0e, 0xd17b0dbf, 0x91a43fa4,
6671 0x49a9987f, 0xbcb372e0, 0xe1a49383, 0x95bf46e7, 0x49ff458e, 0x25debafa,
6672 0x98cd7db3, 0xc741692f, 0xfa35fb48, 0x96ab38cd, 0x9e66fc91, 0x72a26f2f,
6673 0xeb8b8559, 0x9ab355be, 0x1ccbfec8, 0x94bf7b97, 0x65d07fdf, 0x512dbd66,
6674 0x389c5fb0, 0x8e9bf468, 0x7bb8464a, 0xf8312ba0, 0x69f5e92c, 0xd612637f,
6675 0x8ab27917, 0x0337dd64, 0xb63b5dd7, 0xebe57b51, 0xde576cad, 0xf2e12f24,
6676 0x6990a899, 0x21d0bed8, 0x2a64c379, 0x4a6a3ff3, 0xe4a776a3, 0xd42db625,
6677 0xa6289da6, 0xbbd96cf6, 0xd5a7ea90, 0xa7510a32, 0x2ef38594, 0xb9c5bf60,
6678 0xbe1b5e29, 0xd0fc2a77, 0x85dfd245, 0x04de49b9, 0xf04af3f2, 0x7baa1ae9,
6679 0x9506dead, 0x6958f1d6, 0x4aa38d32, 0x5bd6135e, 0x1ffd286e, 0x2f894744,
6680 0xda892405, 0xd7e10a5d, 0xc3f77f27, 0x6bf62732, 0xd9012719, 0xde70a9cf,
6681 0x85fe889f, 0x026a899d, 0xb38b69f9, 0xb16bde8c, 0x5c4dce48, 0xff5295f7,
6682 0x7d598e40, 0x7e3dc71e, 0x41e39d9b, 0x8c055be5, 0x36df8e83, 0xe542e386,
6683 0xa84bf35b, 0x78126e3c, 0xcaadf2bd, 0x41376e0a, 0xe54a9c98, 0xf7e2dfed,
6684 0xb0fe97b6, 0x1fe38dcc, 0xdf62ef1b, 0x562a7282, 0xf624fc22, 0xbfde8907,
6685 0x77fb9abd, 0x9d0f9948, 0x0b17fec5, 0x38ac8a52, 0x213bb97f, 0x58c57faa,
6686 0x497d5457, 0x2562a8f6, 0x16564fc2, 0x6fd54564, 0xb38a9628, 0xe6fbfa23,
6687 0x57d54427, 0xb38ab994, 0x54dffa23, 0xbeaa2a39, 0xa8aca6f2, 0x1cd342fa,
6688 0x61ea3fe1, 0xf3b0997e, 0x20d965f9, 0xa9fc898c, 0x037df453, 0x3b26efdb,
6689 0xa9f812ef, 0x09f885c8, 0x55d652e5, 0xd8b971cc, 0x00affbae, 0x92667b74,
6690 0x2ebf17ff, 0x83de8f1c, 0x4999fe20, 0x16fc4878, 0x201e2376, 0xdc60a47c,
6691 0xcca7a08e, 0x2bc71d11, 0xff27cd40, 0x84b9d15b, 0x67b954f1, 0x319a1979,
6692 0xbdfa31f2, 0x8161f90a, 0x2ee86243, 0xa5c732ea, 0xf46c62b7, 0xabae06fb,
6693 0x316be9d0, 0x09529bf9, 0x6eb4058b, 0x7ac635c2, 0xb72e3a0c, 0x8ef90a9e,
6694 0xdfff1432, 0xfd2c575c, 0x7f791b00, 0xa0d74b11, 0x8881c74b, 0x760718a7,
6695 0xc43e32a6, 0x3e1e3b9f, 0x254f7030, 0xa45737fa, 0xee48737f, 0xf79785e5,
6696 0x97b8c66f, 0xb8c67bc3, 0x2cd0fbc6, 0xfbc6fcf3, 0x2955cf43, 0xd89df3fe,
6697 0x73ce293f, 0xf9ff14b7, 0x17fdd173, 0x03a36a28, 0x4828f8ed, 0xfbf100de,
6698 0x2410aab8, 0x35ad3d2b, 0x43e8b951, 0x747842bf, 0x1340d9f1, 0x837af395,
6699 0xfeb8adc7, 0x956572eb, 0x1e060df2, 0x8cd75d8a, 0x3a4fb154, 0xabb5497a,
6700 0x5012ded8, 0x68bfb4ed, 0xd3b55879, 0x8345aa3e, 0x6a2fda0a, 0x691b4d13,
6701 0x63e5a1bf, 0x549cf589, 0x52f3e7e1, 0xca318e05, 0x5e7f6567, 0xb6d5962a,
6702 0x8b09479e, 0x60317cd4, 0x94703021, 0x48c15e70, 0x0954779c, 0xa3be683a,
6703 0xbe1d070f, 0xa57e3f08, 0x29146f38, 0xa7e93a5b, 0x91fa45a4, 0x16825b52,
6704 0x391637e9, 0xaff5515d, 0xc7d8aa9c, 0xbd45467b, 0x159a9d77, 0x6bf10fd5,
6705 0x46a0e12e, 0xe42ae40b, 0x5e894d47, 0x7cb177c2, 0xfd7d17fc, 0xe093875e,
6706 0xaadd9813, 0x97138fec, 0x7f82a5bc, 0xa457cfb1, 0x6fea7d8a, 0x6e583d68,
6707 0x35f4154f, 0xe2013ec9, 0x3e933710, 0x4f71d6c4, 0xc3c68aba, 0x77a43d91,
6708 0x22e9bb5e, 0x4ef86f42, 0x29d7d5ea, 0xe9decfa8, 0xc44eefa6, 0x8ba923fa,
6709 0x699e7d44, 0xffac04cf, 0xd45cb534, 0x374d36af, 0x057e017b, 0xc32baf8b,
6710 0xe7dbba7a, 0xfb79c54f, 0x12ad8ecd, 0x24c519e2, 0x787b9141, 0x0588fbff,
6711 0x160a29e3, 0x21734c95, 0xd8ab76ad, 0xa024d72f, 0x25fea3ff, 0xaafc4a9a,
6712 0xdce43049, 0x1d714193, 0x9134ceee, 0x6ff630bf, 0x87be0b76, 0xfcd8e7ef,
6713 0xc25f42b5, 0xa5fa2ac9, 0xca2ff7fb, 0x9ed8bd24, 0xe7f5e4ea, 0x21e799ef,
6714 0x7d74857f, 0x7ffdfa97, 0x3c536ba4, 0x62cc9aba, 0xfc96de9e, 0xf9bb8a52,
6715 0xd21c51e3, 0xbb70bcb0, 0x4213cfcf, 0xcb8c2ba8, 0xf5848f35, 0x4bc59746,
6716 0x90fb7d38, 0x6cacaf7c, 0xb213f3d4, 0x9c8de85d, 0x1bb8da62, 0xfaeb9fcb,
6717 0x3bcd14f2, 0x1819e683, 0x01f51cb7, 0x56e3039c, 0xe93a8a14, 0x0d172c83,
6718 0xf81ede10, 0xf7979256, 0x7e0763c7, 0xbfac03fb, 0x97be4777, 0x8907f470,
6719 0x82ab3f82, 0xb07b1a13, 0xbc1acd3e, 0x3e748c2a, 0x967fe694, 0x6b36e0f4,
6720 0x9beb1270, 0x8d126363, 0xfbc0692f, 0x877f6310, 0x32d538fb, 0x1fee2471,
6721 0x88d82f39, 0x11ccb7cf, 0x45e6367c, 0xee28da9e, 0x3c5b37bc, 0xf9c0e837,
6722 0x06ff885b, 0xc074433d, 0x03c72758, 0x45a47910, 0x61e443b2, 0xbce260ff,
6723 0x1f192d49, 0x359cf7d6, 0xcfaebef1, 0xe68057d8, 0x9b933d58, 0x27399e78,
6724 0x6c4cc936, 0xd4ccff00, 0xb6af4859, 0xfa7de7ad, 0x7de8ee8c, 0x7f4eacfa,
6725 0x9bdf03a9, 0x7cfc7ef5, 0xdc7d3cc8, 0x299410d9, 0x89e9cf5e, 0xdf4f37ee,
6726 0x1f3bcfa7, 0x54cdfcfd, 0x868dbe3d, 0x8e7991d1, 0x33ff7d3a, 0x0a427c78,
6727 0x3af929e9, 0x516ef919, 0x3a9d9865, 0xeb5a37ec, 0xf90e5fb1, 0x85971b47,
6728 0x11779da7, 0xa8f56dfd, 0x93f216d0, 0x7b0d2e1e, 0x770d3c2a, 0x7988d4c2,
6729 0xf837bd74, 0xe0bef838, 0xdc9eb4e3, 0xbac7cf9f, 0x410cd3b9, 0x739d7875,
6730 0x820d3e75, 0xd3a0f3e0, 0xd99e7cc2, 0x61e9cbf5, 0x98f5647c, 0x5f588d40,
6731 0x6a089a82, 0xe7b53f84, 0x65d546a6, 0xce3a3e43, 0x9f8fae98, 0x351d1de4,
6732 0x0c37818e, 0x5a9abdf9, 0x643849de, 0xe31d63ba, 0x13d9948e, 0x3e2dc6a2,
6733 0x64272b1e, 0x2476e11c, 0xd7089ff2, 0x70a2569f, 0x80772cc6, 0x3fb30038,
6734 0xc9706254, 0x68ec9976, 0xe7e8d9ee, 0xc8cbb4e6, 0x84fc72ed, 0xef9f3fa9,
6735 0xe9f9fbfe, 0x99f9a2d2, 0xcfcd1156, 0x3f345f74, 0xf3455733, 0x9a3f946d,
6736 0x4dd6632f, 0x6abf6a89, 0x7d545163, 0xa37383fc, 0x006167fa, 0xdc4fac8c,
6737 0xffaa24ba, 0xa22beda4, 0xba9f93ea, 0x5e7faa2d, 0x7b544d70, 0x2baacefe,
6738 0xa8617f92, 0xb11faa2e, 0xf20df4d7, 0x1fedbabf, 0xeff9e6a2, 0x34a2ff96,
6739 0xcbaf2f3d, 0x438e997f, 0xc7fa1a5c, 0x4538e1a2, 0x93f215e9, 0xbe37f6ae,
6740 0xa04bfca0, 0x53bce544, 0x1b780960, 0xd909edb1, 0x1b5f9127, 0xa136ac83,
6741 0xc13268df, 0x8ff7f23a, 0x879c4c9a, 0x2abcec34, 0xaa8be04d, 0x9ff7e134,
6742 0xf8a69b46, 0xeccff066, 0x78449ede, 0xa0993643, 0xe29ae29b, 0xc671bf65,
6743 0x716be101, 0x7034793e, 0x7934ab5e, 0xa899b2f6, 0x329bf287, 0xd1e51fef,
6744 0x7d71507e, 0x3f1fc78d, 0x8b9ff941, 0xfa4a9b0e, 0x03faa72a, 0x7d70b714,
6745 0x2461e7a1, 0x3eaf795e, 0x49f6893c, 0x67957d46, 0xbfea66e3, 0x93858eea,
6746 0xf43aff68, 0x498e8efc, 0x88721165, 0x388adf5c, 0x697be8f8, 0xc4673f22,
6747 0x6aacdb87, 0x6bca0f63, 0x3ffc2c9a, 0xa5ef85c6, 0x903ffae1, 0x9c0b361e,
6748 0xbad33015, 0xde724e31, 0xba8085df, 0xe194cb0e, 0x8d7ea478, 0x84c1f54a,
6749 0x26f9dc68, 0x08fb4411, 0xffc72a5b, 0xbb7f0d5b, 0x36f98f2e, 0x3fee88e8,
6750 0xc144f778, 0xd7236fcf, 0x2c67df90, 0xdd061d62, 0xfc3f75e7, 0x7b87eea9,
6751 0xe446ffc9, 0x78edd79b, 0xf5f0893c, 0xa7815c99, 0xe8cfe78d, 0x4d267d72,
6752 0x3bf5e9e0, 0x79919c13, 0x2b90eac7, 0x36db5eaa, 0x423679ca, 0xeb1bd70f,
6753 0xad0a4bf0, 0x3f6e8363, 0xc93d9dd5, 0xf1e301b7, 0xdc70d3a7, 0xbf171d9a,
6754 0x37de8fbd, 0x3888640d, 0x6ef9e01a, 0xd7180f79, 0x4415f2df, 0xd297d2e1,
6755 0x25e57e44, 0x95cb0ba2, 0xdf513858, 0x776c6256, 0xfcc6f951, 0x7c3bb272,
6756 0xbeb0961e, 0x84cc13ac, 0xb3fb96d3, 0x53f4c4cc, 0x2f677de0, 0x9a5f6d2e,
6757 0x04dcf3ca, 0xc5c5333e, 0x9d5dbf77, 0xc686fd44, 0x4319c633, 0x2bd459b9,
6758 0x419cc057, 0x246b9af9, 0x9f380dc6, 0xeefb9e8d, 0xe299b318, 0xbbdf31af,
6759 0x0ef0bfe0, 0xf00ac5ea, 0xf8c6b8f2, 0x7e51a900, 0x90cb03f8, 0xbf24ed1c,
6760 0x98532eba, 0x677539f2, 0xd1fe7cac, 0xebf030df, 0xdfce9007, 0x57b17d55,
6761 0xbb7fba42, 0xfb57e07a, 0x4fadf9f0, 0xb5c5dfa1, 0x87fddb66, 0xc3ce22d3,
6762 0x917ddcce, 0xc8f10ced, 0x33924ff3, 0x25eac97a, 0xeaa0f8fb, 0xbc489ca5,
6763 0x616d227f, 0xb307bd27, 0x479ee2d3, 0xab2beec4, 0x6ed93f48, 0x8699c655,
6764 0xeba7de5e, 0x930bdd65, 0xd25d79f9, 0xfd447ad0, 0x57f39979, 0xbcac0775,
6765 0xd7477fbf, 0xbf17aa87, 0x9f991998, 0x54bd416b, 0x7274a873, 0x2a9ce749,
6766 0xf1cf66f2, 0x6fd4a9c1, 0x21efeca3, 0xe978393d, 0xefaa64e3, 0x5e4bf379,
6767 0x6574dc0f, 0xf323f7f4, 0x9b5cf922, 0xf92ef034, 0x567dea93, 0xa550f295,
6768 0xdd8ef2fb, 0x4e9af58e, 0x9eb83bf4, 0x239eae0b, 0x6a7ed34f, 0x979404bf,
6769 0xb02709aa, 0x9569af73, 0xaac79482, 0x65bddb6a, 0x9aabd60c, 0xba931797,
6770 0x3f0b26d6, 0x0522d356, 0xa7f03c69, 0x748a7f31, 0x357d28db, 0xb00b1fef,
6771 0x18a8efbd, 0x787d5cff, 0x4ff459ea, 0x9d9f2d7d, 0xb4363a23, 0x763f3959,
6772 0x196c292e, 0xd85ef383, 0xea02852d, 0xb9f6ddb0, 0x5d6a3ec4, 0xcd0b31e8,
6773 0xe5b9eebb, 0xfb0f04d9, 0x90b49df6, 0xfad75c7f, 0xbcfeb958, 0x20fb8458,
6774 0x9dfac5db, 0xf322931d, 0xfc21f749, 0x81f8c883, 0xf70805f4, 0x09e39082,
6775 0xdaab3e5d, 0xbb123627, 0x7dedafd0, 0xe6bf625a, 0x3bdf9374, 0xffdfebb8,
6776 0xffdde695, 0xff98932f, 0x7fc657c5, 0x4f1805f0, 0xc0f3e8d4, 0xda1653f9,
6777 0x9ab4d61f, 0x173bc5cf, 0x77dbbefa, 0xf0c67b95, 0x571636fe, 0x3880b16f,
6778 0xc10099b7, 0x381e29e7, 0x91ab2c06, 0x07511f9e, 0x0e7147a4, 0xdd60d658,
6779 0x71467646, 0xc608e3c2, 0xb9d717db, 0xf70f9e15, 0x9de31b08, 0xedead657,
6780 0x858f6aa5, 0x9e3570f2, 0x75e90b5e, 0x7113f84d, 0x51f6df5e, 0xbf6716b9,
6781 0x7e16ed5c, 0xc303d0d3, 0xa7d2ebde, 0x87985db0, 0xc6c860e2, 0x66b85f76,
6782 0xdd53e280, 0xda0ed47e, 0x03fcb817, 0x6f607744, 0x2beb4a82, 0xccc9f7dd,
6783 0xfe79889e, 0x5187dba4, 0xa3f979af, 0xe7e266a9, 0x2aa68f9e, 0xfbcfc349,
6784 0xe2eb1c32, 0xddaa55e5, 0x4e6f4e22, 0xb68f9df6, 0x186f0483, 0xb769ade7,
6785 0xda07f9f3, 0xe28e96c1, 0x75b83b48, 0xf3d20edd, 0x168bd976, 0xcb6d3501,
6786 0x3fdc0dfd, 0x91e24bc9, 0x480616db, 0x8fa7650f, 0x8afe13f5, 0xcfd4cdf3,
6787 0xae52267d, 0xe91b7fdb, 0x4f08e291, 0xd46bcc8a, 0xd17e7a98, 0xb75c9121,
6788 0xaf9a266b, 0xc96fd808, 0xef0f5f0e, 0x54338a9f, 0x9e1ec7da, 0xa7c40e51,
6789 0x38901e9f, 0xf54e6b5f, 0xf922cd6f, 0xbfb9951e, 0x010bf0e5, 0x9bee973a,
6790 0x9f44c506, 0x4e9fdeb1, 0xe38c830b, 0x2f042e6c, 0xff79bb4d, 0xdfd21e2d,
6791 0x611fa69f, 0x86f7617c, 0x234afc80, 0xe7ca06e2, 0x61420bd8, 0xd721271a,
6792 0x3ce32c57, 0xf3276e79, 0x7bf562cb, 0x4d941f29, 0x4d875c75, 0xfa23adf1,
6793 0xb144ee6c, 0x657b1e9f, 0xb23eba79, 0x1bce857f, 0xe92f9cfd, 0xed3d0b33,
6794 0x5f180abb, 0x399d1df3, 0xbe09a4d4, 0x6b2e76c1, 0x46a63adb, 0xf044dbc6,
6795 0xdf79e8db, 0x44bc5bfe, 0xd75139bf, 0xb6448cf7, 0xfff9d88b, 0xe499f499,
6796 0x35b35a6e, 0x7c4cf88b, 0x7bf64753, 0xf067ef5a, 0x2e7f1403, 0xaa922bd9,
6797 0x8d0fcbc5, 0x4e3c9777, 0xea9cdd72, 0xf01575cb, 0xc300acf1, 0x76b8c49e,
6798 0x57fffd87, 0xe91fff64, 0xf8a2dcfc, 0x4ddfc46d, 0xf16cdd7a, 0x7fb64ea9,
6799 0x0ff34a9f, 0xfc746fad, 0xf6e9b5f5, 0xff8265ba, 0x4fb7d71b, 0x15399f5f,
6800 0x4bc68df5, 0x4e67ee06, 0xff48060e, 0x78a0929a, 0xec3e3e13, 0xdd90f72a,
6801 0xc5f4396d, 0xa6f7b238, 0x2807af24, 0xd66075af, 0x2dfbb22a, 0xfd636fa3,
6802 0xbc85f4ff, 0x9e623922, 0xad256913, 0x697ebfe4, 0xcfe2cbac, 0x42fc75a5,
6803 0x5d6323d7, 0xabdf6ee9, 0x11bc88ee, 0x915f758c, 0x9fbe80fe, 0x17f1eaf3,
6804 0xff9c73f7, 0x2f4487eb, 0xd6ee279d, 0x3e02b771, 0x783b1bd6, 0x1a55c655,
6805 0x1f7ba31c, 0xd8261d8d, 0xe4a6cb46, 0x5d39c454, 0x36326cb2, 0xb70d9a7d,
6806 0x4c6c74e6, 0xebba6fed, 0xbd213496, 0x0b2021fb, 0xaf9d167c, 0xa4d24d00,
6807 0x6bc53cc8, 0x14f3f155, 0xc91bf8cf, 0x9e56ff2e, 0xb4d84e62, 0xf7f292da,
6808 0xbace2be7, 0x9f3df7a3, 0x2a2655ba, 0x31f42b94, 0x8a0c4e14, 0xa74c17bc,
6809 0xf133537d, 0x067bff12, 0x2df6cad7, 0x5cdae5f5, 0xfbee4f68, 0x8b1d6db7,
6810 0xd62d9776, 0xfa46f54f, 0x3dc0a77b, 0xd78ff943, 0x46ee30a6, 0xfef3273f,
6811 0x12d3a9df, 0xc462b723, 0x88f7c06b, 0x27f2a352, 0x265f23e1, 0x4aed7e93,
6812 0xb922df55, 0x7cc9740c, 0xe941244f, 0xd8e2b8b1, 0x03c23ed9, 0xd38bf7e8,
6813 0xd6c43ec5, 0x6d17ce26, 0x317ec6aa, 0x269ce9c1, 0x79c5d847, 0x579fc8b7,
6814 0x9c60f91f, 0x05dc3105, 0x02e4f1d3, 0xdec37f1c, 0xc34a6496, 0xf6f33fad,
6815 0x5392ba4c, 0xe91df8a2, 0xa54ffeb8, 0xc236391d, 0x53835ba9, 0xf0a13f89,
6816 0x93f21484, 0x94040a85, 0xf1f138a2, 0x14de22a9, 0x87c53cd7, 0x3ed850ff,
6817 0xe5e12d7d, 0x2f58b0da, 0xa6c661cd, 0x7ae036bc, 0x2a635b5f, 0x6ffb578d,
6818 0xbf934607, 0xe05d297a, 0x4d2f179a, 0xa02bef11, 0x74acff50, 0x41e7ae97,
6819 0x5f0be513, 0x7d8cf3d2, 0xcfdc4c97, 0x6db0bf98, 0x3d44eca1, 0x3f6f0828,
6820 0x76cd79c4, 0x4df24aab, 0x3f040e78, 0x771813da, 0x0c5c1ed6, 0x5dfae714,
6821 0x7db095e0, 0x6fc0e257, 0x0e061f49, 0x773a5558, 0x876e704d, 0x977f1c54,
6822 0x0f2b4f7e, 0x31c5b215, 0x2f98dcfc, 0x94e7fda1, 0xe0bd2413, 0x6504dff3,
6823 0x88e35c3b, 0xd31277e4, 0xd5eba25d, 0x89b0c4ae, 0x260645ce, 0xe9875ee1,
6824 0x7813a61a, 0x3cce835e, 0x2cbbfbf6, 0xe07ee703, 0xa49cba66, 0xe8207907,
6825 0x2ac9f684, 0xa704d1f9, 0x7048ebc6, 0x3480deaa, 0xa9daae92, 0x6ed0fc08,
6826 0x35e7251e, 0x6baed877, 0x36eb8713, 0x135d85b4, 0xff8f3f40, 0x8f3a36d5,
6827 0x8393aa1f, 0xfefc3d99, 0x6c2fe92d, 0xf9cb1a6b, 0xa28c80bd, 0x949963b6,
6828 0x7954eb4a, 0xb545e87d, 0x07c122f4, 0xb767afba, 0xfea1f689, 0xaa0ee7a8,
6829 0xaf3f443b, 0x925f69d5, 0x8742f6c5, 0xf07843d7, 0xee7c297e, 0xded7b45a,
6830 0x05297cc7, 0xd35eaeb8, 0xb19a07a1, 0x87569fdf, 0xe93ee872, 0x1aff5673,
6831 0x3e57cfd2, 0x2148f35c, 0x665ddbf9, 0x9df9256f, 0x18cfc09e, 0x5668bf87,
6832 0x1dd845b7, 0xe0c81d8c, 0xf33180fb, 0xf4d99ed4, 0xfdd7c233, 0xce9525fb,
6833 0x03cdfbbd, 0x9aee88e3, 0xe85a3ff6, 0xfeed64be, 0x4b4f188f, 0x9a1afe19,
6834 0x035b766f, 0x039b6bdf, 0x1b5ef9db, 0x9fbe43fa, 0x7f08f218, 0xe73a7832,
6835 0x390886d9, 0xec2e913c, 0xe3fc060d, 0xebb55e29, 0xf6907af6, 0xedee58dd,
6836 0x8d2275b8, 0x07cf57bf, 0xc035ef18, 0xf7c431a1, 0x971af04d, 0xa0fef3c6,
6837 0x967a4152, 0x4eedaeff, 0xa3ffa22d, 0x3dbf02e9, 0x66702e9a, 0x89bf8676,
6838 0xf1df5de8, 0xd69925b1, 0x8e343679, 0x4521b9f6, 0xf1c6714d, 0x1bf64323,
6839 0xcab54f63, 0xd7fa8580, 0x2bf6079e, 0x14a6ef28, 0xef4bdf94, 0x8d594db6,
6840 0x4ca2f7cf, 0xe2ae2852, 0xefe294fe, 0x0c6fb35e, 0xe7786ff5, 0xc7e4a9f3,
6841 0xe74f481e, 0x607e7ff5, 0x1be278fd, 0x22497fea, 0x606ed9d9, 0x69d866bf,
6842 0xbe29d901, 0x5ffa405f, 0xf63cf54c, 0xdd2cbbcb, 0xf72ed84b, 0x12ec809a,
6843 0x01ed9ff5, 0xf849dff5, 0xf689c0ae, 0x664fefc0, 0x6dd5df3b, 0xa32718d2,
6844 0xf5c49f5f, 0xbea91b92, 0xc9ccbbab, 0x05f74e76, 0xc35ec88a, 0x109c7887,
6845 0x9d1224c0, 0xfca8be04, 0xe9993b88, 0xe7e5fc36, 0x86e3d06e, 0x75c5e29a,
6846 0xca3965d8, 0xa4e2223e, 0xf4711ba8, 0x9edb33c9, 0xee817b40, 0x0fdc28d4,
6847 0xffbf0bef, 0xd5563d5d, 0x59773ebd, 0xeeb3ae33, 0x07edcc84, 0x585e7df5,
6848 0x7a4393d7, 0x86e2867e, 0xefdc5d3a, 0xb033e7a5, 0x675df74e, 0x094b1b6a,
6849 0xd8aecd63, 0xb9ca987e, 0x412950be, 0xbaabf9c8, 0x99859b0f, 0xb5fe93e7,
6850 0x9f2eba1e, 0x9ff5cdee, 0x920242b1, 0xc0e5fad8, 0xb5c45f6f, 0xf910703d,
6851 0xe14e271f, 0x10ff5872, 0xcf018d6f, 0xc97ef6c8, 0x4bbd23f0, 0x5afb1f48,
6852 0x123ae1e5, 0x4d8a8352, 0x3fd277f5, 0xbac016dd, 0x9f7b433f, 0x99c7e254,
6853 0x3f49f7fe, 0x997e4ffb, 0xf7b96641, 0xb7c7d8b4, 0xd27cb45a, 0xb809d69f,
6854 0xa7a38db5, 0x3c8ba5af, 0xe215b14f, 0xa57e4b9e, 0x009cc1c7, 0xfef1223c,
6855 0x5106765c, 0x655a17ee, 0xe7f882cd, 0xce56043c, 0xe7a37f23, 0xfd01ef6f,
6856 0x941fe1a7, 0xf57abdcf, 0x182bc21e, 0x627deeb7, 0x89bfb9c4, 0xbb6d69f4,
6857 0x6b84ff04, 0xfc4cf75f, 0x5e46097b, 0x1db6beeb, 0x3ca0c647, 0xee8b9eab,
6858 0x9ee861b7, 0xbdf7887b, 0xefa39a1b, 0xae957c1b, 0x308996e3, 0xea0b7091,
6859 0xb307fb13, 0xd4569d02, 0xfd3257df, 0x7e5e109f, 0x84f824c9, 0xf2ed957e,
6860 0x671eb713, 0x1a3f844a, 0x8f7c00b8, 0xe8676f28, 0x99d7dd30, 0xa5e59cdb,
6861 0xa22ae639, 0x165b6e7d, 0x825019c7, 0x9837dd32, 0x19cbf9ad, 0xd3b4075f,
6862 0x9d642f74, 0x89c127ee, 0xa3bf287f, 0x8e9d6baf, 0x460beee7, 0x82073dd3,
6863 0xdacf348d, 0xd1fee29d, 0xbff19dfa, 0xc7d5a813, 0xc9d4f0d9, 0xac0e9423,
6864 0xabf7450e, 0xdb53f9d5, 0x05bcfd16, 0x9f181278, 0xfccf7d11, 0xfc43ef4a,
6865 0xc5f02cc9, 0x4638fadb, 0xc219b5fb, 0x7920d67f, 0x410ddf24, 0xb37a4839,
6866 0x0b240a4e, 0xd58e0b7c, 0x865df748, 0x65f7e8be, 0x73f9d6ef, 0xbc2fae97,
6867 0xfabf7c2e, 0xe7482919, 0x24ff7780, 0x427bfe9a, 0x1f49cbab, 0x5d6af562,
6868 0x6df199b3, 0x10b46c15, 0xabd58dbe, 0xd97d21aa, 0x1638a16e, 0x7e354fab,
6869 0x0b7432e9, 0x4b7ffe5c, 0x98737af7, 0xffeb4cf3, 0x3ca5e4a7, 0xdfadbdd4,
6870 0x745e50b1, 0xf9087da4, 0xa27a1956, 0x5defebaf, 0x7c86edcf, 0x9614c0a7,
6871 0x15da456f, 0xf1a283ee, 0x50cb6ef4, 0x7cf3929e, 0x38139d83, 0x51e86e3f,
6872 0x3ae538ec, 0x14fc5f2e, 0xada17970, 0xa2f84ed4, 0x2bc9b8ff, 0x4c7f9ca9,
6873 0x4c3e442e, 0xe103203f, 0x89f6fe8d, 0xfe90078f, 0x37c513a2, 0xfa7cbe52,
6874 0xd83f8c09, 0xf8b3a7be, 0x115fe457, 0x7d91a4e1, 0x4ecaec2f, 0xc783bdfb,
6875 0x7fddf8e1, 0x4af1e8bc, 0xcbc7c3f2, 0x095c698a, 0x787ee9db, 0x1a871e91,
6876 0x7bd9178e, 0xfdd1e222, 0xbedf2219, 0x47fbf3c5, 0x78b05f69, 0xf94bd9b7,
6877 0xff66c58e, 0xafa404a6, 0xdbc905e8, 0xe91db380, 0x8d24f43e, 0x52a4f68b,
6878 0xeef166be, 0xf6a21def, 0xd3125dda, 0x28bedfdf, 0xc7c5177f, 0xb8a5eca0,
6879 0x577edfd7, 0x7384bdc1, 0x7053dc0e, 0x477cc457, 0x595f8552, 0xe399957c,
6880 0xfb68ef71, 0xcf292b2f, 0xff60eda9, 0x1eeafbd0, 0xb0577f0b, 0xae0f024b,
6881 0xf0e788f3, 0xbd0f89af, 0x085a4efb, 0x9eb697e4, 0xf1c4f4b4, 0x017946cf,
6882 0xce6171b7, 0xf0b76ebf, 0x7fbdca3d, 0x6b7ad0b0, 0xf388fb9e, 0x126d5569,
6883 0x67aaa7fb, 0x794aa0e4, 0x58af039e, 0x9a6b3f48, 0x8accc825, 0x3b73376c,
6884 0xffaa51f9, 0x65f859b1, 0xe8d7ef43, 0xbde86e7a, 0x746b0761, 0xd6d775ff,
6885 0x17bf3d68, 0xf1a32db4, 0x579a7bfd, 0x7ba03df3, 0x5ff7c7b6, 0x4b5c1f86,
6886 0x2b8c52fb, 0xee8a9f6b, 0x7e90df77, 0xc7bfd807, 0x3257c9fa, 0x3cd8f3f4,
6887 0x1efd23c8, 0xaf19af0c, 0x7e7d3da0, 0xc43c6ab2, 0xd71e3bc9, 0x8f1180f1,
6888 0x8e26c307, 0xfafdb167, 0x285a2eda, 0xfe76d68e, 0x796bf199, 0x872c67fb,
6889 0xbe0ef6ca, 0xf83d7aaf, 0xaf1f1037, 0x093bb76f, 0x08f65747, 0x6ed25fbb,
6890 0x6a25060d, 0x7c91350f, 0xef8a0ffb, 0x4aaf023b, 0xf740a38c, 0x7e756b7f,
6891 0xb7f9d5ae, 0x6367f716, 0xbe8adee8, 0x772fbeff, 0xe2ba11c7, 0xdf3fa351,
6892 0x993875d0, 0x8404b8f8, 0x12125a7f, 0x8790c9fe, 0xc6465f11, 0x936f81d1,
6893 0x5bb7d73c, 0x52f8bef9, 0x6d2d3fdd, 0xc593df16, 0x51fe8bfa, 0xddff9176,
6894 0x8d8de82b, 0xd1ad35a7, 0xd232bbfd, 0xea0fdfd9, 0xc313f878, 0xa8f2e8df,
6895 0xe53b001c, 0xb2a897e7, 0x756fc837, 0xe77f342b, 0x63cf8954, 0x2989d53b,
6896 0x194beef1, 0xce3a9be5, 0x28cbea37, 0x43fd864f, 0xc88eedce, 0x998dfc7d,
6897 0xcd54af02, 0xcf240391, 0xb2cf7d88, 0xfbb8aca2, 0xba44c81e, 0xd77b18df,
6898 0xee45a64f, 0x391db47b, 0xf23f67a4, 0xf7495e3c, 0x859b6a8c, 0x8d9be87f,
6899 0x8e10a6e3, 0xb5c5c607, 0xed20d6cd, 0x4f516a4f, 0xd2307bf8, 0x76bfb20f,
6900 0x07e91169, 0x991c1bee, 0x3a72cf48, 0x2ff5c4aa, 0x8e38c36f, 0xfb2f2fc3,
6901 0x2baaf58c, 0xf91bac5b, 0x1f6f1996, 0x6a1fec61, 0x6a9c092e, 0x7a51af3c,
6902 0xd3511f78, 0xb749ee2e, 0x5c62fa1e, 0x7fdbd216, 0xadc63fe0, 0xa64172c6,
6903 0x25adbf88, 0xbee98fa1, 0x6cbbe7cf, 0x90e8f171, 0xd89a97bf, 0x3dcc6a0e,
6904 0xf6578c19, 0x859c2e23, 0x4fedf37e, 0x7ad1df79, 0xca4ee128, 0xf1adf5c7,
6905 0x837e778f, 0x13601a9c, 0xd04ddae3, 0x9ee125c4, 0xd6b81c48, 0xdd0fee29,
6906 0xaa49c7ab, 0x7d7a8c3f, 0x505df62f, 0x03eecf14, 0x2349e65b, 0x1bf0dded,
6907 0xafbebad5, 0x85b1d82f, 0xf163e08e, 0x476eb551, 0x2e39fc88, 0x1ba2e2c6,
6908 0xb4f5a333, 0xc644ede1, 0xb25dfdb9, 0xc8c47293, 0x268c5fd7, 0x7ef887dc,
6909 0xeb3c9c42, 0xf65ebaa7, 0x0dbee7ea, 0x9be665b3, 0x0d288e69, 0x63fc851c,
6910 0xe93fe97d, 0xcb1c5208, 0x04caf83f, 0x9dfaff92, 0x2445e7d1, 0xdfdf3f3f,
6911 0xaafcb20a, 0x433e7643, 0x3a5fda32, 0xd214caf8, 0xbfb786b3, 0xf97211cc,
6912 0xbee2c722, 0x29467d3c, 0x6bff6249, 0x77fec492, 0x4c93d2af, 0xfddaaefb,
6913 0xfef22fb2, 0xbbe721bc, 0x4501fd75, 0x65d7f3ec, 0x686f5caa, 0x3a617a17,
6914 0x7f9c4a20, 0x98f3c8a5, 0xed11fe79, 0xdf2fa825, 0xe880b710, 0x9ad7d942,
6915 0x6aef5807, 0x9e989a4f, 0x198393da, 0x05ef11d9, 0xf24cdc68, 0x801b0d7b,
6916 0xc81d88fd, 0xefa52ebf, 0xf4beb10f, 0x59c604fd, 0x523c2647, 0x64adce29,
6917 0xc0f5bf20, 0x239355db, 0x3d05fffd, 0xc1f103ee, 0x09e72843, 0x87cebf31,
6918 0xcf42b04d, 0xae3d0813, 0xee2c71d2, 0x8ec89aaf, 0x5757f763, 0x0e1b938a,
6919 0xc7f28158, 0xf9581fb5, 0x07e7d03e, 0x1dfef2d6, 0x9327f92e, 0xffbf019f,
6920 0x381f2a6a, 0x3d3276b8, 0x7de0fcff, 0x53de7357, 0xaf9514da, 0x1e7d1008,
6921 0x797f51c2, 0x97c276f7, 0x90e30a5d, 0xefd3aea2, 0x9eeaf9d2, 0x9b7f3356,
6922 0xc677bd59, 0xc22481e3, 0xe94b454f, 0x9d3d9dbb, 0xe21feb0a, 0xd947032a,
6923 0x289d4719, 0xe3851c66, 0x165c82f8, 0x71a4ab1f, 0x5314944f, 0xc9db0937,
6924 0x1c274d9f, 0x55c618e5, 0x9cff3d06, 0xdfd9f829, 0x13f9c091, 0x3d082609,
6925 0xba28ec83, 0xcebeb437, 0x9b436438, 0x86bdf51c, 0x4ceedef1, 0xd7b0ae71,
6926 0xa490b3d0, 0x16ed1eb1, 0x3db686e5, 0xf58eb419, 0x49eb10e6, 0xb459b343,
6927 0xd02512ef, 0xfe0ccdf9, 0xfc4038d8, 0x508f4639, 0xc12c4b2e, 0x77db84b1,
6928 0xea079d0f, 0xe28239f7, 0xe7635d5e, 0x686efe44, 0x3b8f73b0, 0x4e39fc5e,
6929 0xda4833e7, 0xcfb12cd1, 0xf3af6d89, 0xd1c67c88, 0x1e2fc233, 0x1c9fe85d,
6930 0xa0063fcf, 0x25fbec44, 0xe6ad7e5d, 0x86e7788a, 0xdf223d1b, 0xe06c73b4,
6931 0xef71e928, 0x373e04ee, 0xfc8975ec, 0x974b696c, 0xac9fdf42, 0x5066956f,
6932 0xfb9f5a3c, 0x829f7f1e, 0x83f662f5, 0x6e7cfde1, 0xbbbcdd5a, 0xc7438b5c,
6933 0x1f111eb5, 0x01dfe897, 0xbd57d08f, 0xd37814fd, 0x23da7df5, 0xaa735e74,
6934 0xdf14ecd2, 0x4aef8999, 0xf9fdd06f, 0x199bd78d, 0xd5029d37, 0xc43fce2c,
6935 0xdd32c539, 0xfba0df2f, 0x3bdf11f9, 0xe99b033f, 0x7bf6229c, 0xdfafc367,
6936 0x02bf8fac, 0xf6371e34, 0x759bf5bb, 0x2fb3783c, 0x4ca5f9fa, 0x40e6071d,
6937 0x10f3f90e, 0x1fbe17c6, 0x71c09791, 0xa4e1697a, 0xbe8338b8, 0xeff55703,
6938 0xe434a9c0, 0x1ef790de, 0x1da3bfc7, 0xdfcd7e67, 0x80499c13, 0xc5ce7109,
6939 0xe19fe386, 0xf2126e3f, 0xaa2dcfd6, 0x4346829d, 0x077017ee, 0x331f9916,
6940 0xe7463ee4, 0x3df1ffff, 0x22505ca0, 0xcacf25f3, 0x3a1e31fe, 0x32f5b09f,
6941 0x7015c6fe, 0x8d75c41c, 0xce35d7d3, 0x2edf111a, 0x571d5a8c, 0x97d7877f,
6942 0xc471101a, 0x9e4765cd, 0x75627195, 0xfbefe248, 0x5f62c3aa, 0xf6265d5b,
6943 0x02ad39b5, 0x49bcaea7, 0xbb126a0a, 0x9f44d3c3, 0x6ccb3fa1, 0x7a180f02,
6944 0x5d2fc432, 0xf09da87f, 0x3e3a0dc1, 0xc9a3d588, 0xf94e5dd0, 0xc9345be6,
6945 0x472af74b, 0x6abf3f7c, 0xeee4ebda, 0xa83fa72f, 0x22effc6f, 0xf7d1eac4,
6946 0x0f12fe3d, 0x07bad3e5, 0xb8e21657, 0x38fef347, 0xe6a6f48e, 0x2df37632,
6947 0x3b13888f, 0x7ca3811d, 0x3f45a4df, 0x6bc96fef, 0x747e21eb, 0x5ec7e302,
6948 0x3a96f757, 0xbcf9ab81, 0xc09c3abf, 0xb75643df, 0xb0bbf9db, 0xc486d6ea,
6949 0xdb7fe429, 0xeb1daf65, 0xcb27ad95, 0xc5959f88, 0xad4a3ee2, 0xb38bdc5d,
6950 0x10b7fdb9, 0x3b7bd77d, 0x2df9cfa2, 0xfba8bf3d, 0xf58f3d06, 0xa3091b6b,
6951 0xf9f7ffa5, 0x5f3a8d9b, 0x662ebaea, 0xfea9c14c, 0x26afe690, 0xfd7fec7d,
6952 0xd71d0b45, 0xa5794ed5, 0x6d88ae9c, 0xefdca8f4, 0x268ee6fa, 0xf41af34a,
6953 0xf93a6477, 0x707351f9, 0x82d2e32c, 0xd30fbb2b, 0xa98dffb0, 0x3afaa714,
6954 0x225aa6ba, 0x0eb7bbf4, 0xf91c73fd, 0xb7498035, 0x494b855b, 0x25e3a15a,
6955 0x07b5c761, 0x3e50670e, 0xb7ec97a2, 0x9277ca80, 0xdeacb1b3, 0x12792a7d,
6956 0xa2bd96e1, 0xed19c21c, 0xa503f732, 0xa4e6e727, 0x3336fa48, 0x6242177d,
6957 0x9c9e801c, 0xdb230b1b, 0xdb5fff1b, 0x27a4d3ff, 0x289eb6d5, 0x84f837fb,
6958 0x3efe7cbb, 0xcad07037, 0xbce808f7, 0xc72115c6, 0x347f7457, 0x644b370b,
6959 0x7ce873a7, 0x3b41227a, 0xbaa0ee05, 0x95256102, 0xb2c38bce, 0x96377fb8,
6960 0x7d4cf7fd, 0xb84a59fe, 0xcee9ee83, 0xe737cfd1, 0x5bf73742, 0x6a5c0300,
6961 0x8befe4e0, 0xe5cbc04b, 0x29785b6c, 0x5082f1c1, 0x099fbf88, 0x73ae2867,
6962 0xe63bfd36, 0xe61ef238, 0x0ce7029b, 0x0e74c87e, 0xc51bee26, 0xd75ba7ae,
6963 0xf09a59c7, 0xe81d043b, 0x086cee7e, 0x35fbb9f1, 0xbf9fa3d0, 0x3cc75fc7,
6964 0xb9d1f7dc, 0x3b6835db, 0x208fcc89, 0xeb4f9ff7, 0xa7ade391, 0x198b2967,
6965 0x9f449cca, 0x7d30ce14, 0x75f2bf6d, 0x4d6dd3f4, 0x35df57ca, 0xe283f7d0,
6966 0x6f4b73e1, 0xd3ef1bfb, 0xd349627d, 0x97b1bef8, 0x7da6c7be, 0x1de9584e,
6967 0x001363f2, 0xe6b3ddfe, 0xc66f6437, 0x07e01af7, 0xfb11e7be, 0xf72d06bd,
6968 0x3df0c67c, 0xedfee335, 0x950ae0ce, 0x72ac6fee, 0xaddff8db, 0x9b8db229,
6969 0x87ca794e, 0x21bffcd2, 0x6a40fabd, 0x2883c49e, 0x638c19c1, 0x83b2bd75,
6970 0x2fd69b36, 0x22f7c669, 0xf432fac0, 0x006401ef, 0xb763b77f, 0x1e69ef8a,
6971 0xa5b43d41, 0x74abf6b2, 0x2e1e1a0f, 0x6f2f0955, 0xf4bcd971, 0xe895ae5d,
6972 0xdbd30fb5, 0x2ff71368, 0xb16bfb8c, 0x19b46c7c, 0x8daf4a79, 0x77cc7671,
6973 0xfcda773e, 0xbfe89bff, 0x9324a93f, 0xcbfe6070, 0x3f7c3df3, 0x7758c129,
6974 0xc3eb8d89, 0x37191af7, 0x6a7dd136, 0x1d31aba4, 0xe1e21ef8, 0xba149ca4,
6975 0x25d8d51f, 0xa63753ee, 0x9b7fd807, 0xf3fb12fd, 0x4ed2cec6, 0x0e83078a,
6976 0x6eabdf0b, 0xaa34f974, 0x4421d207, 0x3ef89ffe, 0x69bbe0df, 0xfd21ef98,
6977 0xed91505e, 0xde5157d7, 0x4a1b9a7f, 0x6169bde9, 0xc0f1126d, 0xe5061ef8,
6978 0x4e9519e0, 0x7befa3cf, 0xfbe4e281, 0x501c8617, 0x9d995831, 0xb90d7cba,
6979 0xf8ef8d38, 0x3bea2535, 0x8f5e437e, 0x98b90a24, 0x44cc26e9, 0x71a5577e,
6980 0xf061e563, 0x8f00bffd, 0x30b1ae40, 0x0030b1ae
6981};
6982
6983static const u32 xsem_int_table_data_e1[] = {
6984 0x00088b1f, 0x00000000, 0x243bff00, 0xa3f0c0c3, 0x4aef811e, 0xf1303031,
6985 0x12d18aa2, 0x6064e3ef, 0x6062e010, 0xfbe20530, 0x330c0c3c, 0x204cf480,
6986 0x6066e516, 0x1ae20310, 0xc40dde20, 0x19f8807b, 0x1039fc50, 0x1be200ef,
6987 0xbefd103c, 0xfe0c0c4c, 0xc4081c40, 0x95fc40c1, 0x1be18181, 0x73f6f103,
6988 0x4c30330a, 0x2ff04715, 0x249fd903, 0xc1ffe7e9, 0xe90c4386, 0xa071df6b,
6989 0x10acf37d, 0x7b20467c, 0x9aaa15be, 0xcdf85605, 0xbf268858, 0x18bf8d08,
6990 0x0372fe8f, 0x4d5afe54, 0x81b5b334, 0xcd4909e9, 0x6efc4d3a, 0x40aac741,
6991 0x3101a9ff, 0x5ff1ad00, 0x000368ca, 0x00000000
6992};
6993
6994static const u32 xsem_pram_data_e1[] = {
6995 0x00088b1f, 0x00000000, 0x7de5ff00, 0xd5947809, 0xe77df0d5, 0x9926665d,
6996 0x6c81bc99, 0x44d84eac, 0x4242740b, 0x61db101a, 0x8311688b, 0x9817054b,
6997 0x264f6408, 0xdac7f520, 0x0040cfef, 0x8b435151, 0x03b45a35, 0x341b0504,
6998 0x024180d8, 0x2d82e00e, 0x5d6ad8d5, 0xc8a0d2da, 0x1b80931a, 0xcefc5dfe,
6999 0xc9bef739, 0x82264efb, 0xf5ffffb5, 0xf8f8fefb, 0xf77bee5c, 0xce73ddb3,
7000 0xe28ef73d, 0x8b94c718, 0xff12fb18, 0xdd98c7be, 0xd71b18c6, 0x2356329d,
7001 0xcf2d4ad2, 0x03d058cd, 0xac62ccff, 0x9785addc, 0x653633a7, 0x5ef91a87,
7002 0x4837e412, 0x6de43b61, 0xde549d7b, 0x23e79ebe, 0xa0cfcd6e, 0xc83aa3fc,
7003 0xdeded04b, 0x5065c0f2, 0x6643b9de, 0x91dbb11b, 0xc2963671, 0xe30731d8,
7004 0xcf90597f, 0xc9c0ac66, 0xf61be5b3, 0x45f6c5cd, 0x84e6764d, 0x1577cafe,
7005 0xf20cbcce, 0x86550785, 0x2f37ca55, 0xbe43fad3, 0x60352c38, 0x9f3263be,
7006 0x1ca7685f, 0x3bf50cde, 0x37292d3c, 0x553b18b8, 0x8d5e60e5, 0x4b776ab1,
7007 0x18a3f5ca, 0xcf6f092b, 0xf52576c5, 0x3a970f92, 0x97e6c765, 0xb6bae1fb,
7008 0x97bb3e4a, 0xf12dd2b1, 0xcf923bcc, 0xfff84be1, 0xf91ca358, 0x862f941e,
7009 0xb7e83275, 0x32e4d590, 0xab5fc719, 0xf0dddd79, 0xd3a5553b, 0x7cbe4638,
7010 0xed038c2b, 0x7c969e2a, 0x1b0ac4b8, 0xf8c0340b, 0xb39cbbed, 0x7d70b937,
7011 0x6e11b4cb, 0x1addd75c, 0xe70c2bd6, 0x717a74ef, 0x5cb41b7e, 0xbf592f28,
7012 0xd5182b41, 0x96e95fdd, 0xd579d6be, 0x980d4d0e, 0x53d3a3ca, 0x47798c55,
7013 0x184be774, 0xbf4037f3, 0xb36b094c, 0xff7f7746, 0x96322580, 0xcccbfd8c,
7014 0x1feee8eb, 0x43df4920, 0x013fc16f, 0x6e3da15e, 0xb781ab82, 0xdbfc3ac5,
7015 0xb3b78ddb, 0xd2a3c0ba, 0xdfee6d99, 0x3c401f48, 0x106a7cc0, 0x11ae904e,
7016 0x644cf3f3, 0xdfe81493, 0xc4ba67e3, 0x918f5f7a, 0x9f2ca8d6, 0x420b58c1,
7017 0x78cafda3, 0x116c6bc8, 0x93f631f3, 0xa9fed915, 0x059fbf90, 0x57bce2e6,
7018 0xc4228148, 0x690d6313, 0x24abbf48, 0xffd71b36, 0x94349c03, 0xf407eaaf,
7019 0x99af7009, 0x9649bd96, 0x3093dcc4, 0xbdc4f05f, 0x214fd4e9, 0x3f42a3f5,
7020 0x8fdfcf43, 0xe9639b9e, 0x322dcf47, 0x7ea4a9fa, 0x4fd6179c, 0xeb04ee4d,
7021 0x8c4b727c, 0x7ea4ee7e, 0x2eb617dc, 0xd6898afd, 0x46515cf9, 0xf54e24fd,
7022 0x97d400b1, 0x2d607a0d, 0x5dca197e, 0xef6389f5, 0x98ba6665, 0xdff912bc,
7023 0xa6625c0d, 0x389c848b, 0xfa261d0b, 0xd0f258fb, 0x5bec7e93, 0x44830f22,
7024 0x5f1a3512, 0x5c91afeb, 0x41dfd498, 0xbbfa3bf9, 0x31dc2e48, 0x0eb17021,
7025 0x59b1c0f3, 0x816bc83f, 0xe831eb6f, 0xb129e61a, 0x36bd4c34, 0xefcba34c,
7026 0x261c3956, 0x88dbf80f, 0x683ed023, 0x08911ceb, 0xa4d2f5f9, 0x365c205f,
7027 0x27c11b33, 0x5895664e, 0x48cece2f, 0x9e9ddd3e, 0x826429bd, 0x8041ead3,
7028 0xdfbba97f, 0x0d206ad5, 0xbb2b6be9, 0xb6f48421, 0xa7ac106a, 0x854f633f,
7029 0x14848fae, 0x20a83f68, 0xd769e10d, 0xe3cdbf80, 0x28fe306b, 0x1c19ff1a,
7030 0x3f8e0777, 0xf6f8e7ae, 0xf1963921, 0x2c8b831d, 0x18343be3, 0x177de81f,
7031 0x0f8c55bb, 0xd8c09bf0, 0x685ba1f3, 0x22e0fb7c, 0x8d6eff1a, 0x8fc65915,
7032 0x05ff1aeb, 0xdea5f71c, 0x82643fd6, 0x4b83fd75, 0xf8d7ebac, 0x0b655ffa,
7033 0xb471f8c5, 0x16875ffe, 0x2e0ff5f0, 0xf3b7ebe1, 0xf7c6bb7e, 0x75ffc174,
7034 0xdeadf71c, 0xa2743fd6, 0x9517fd75, 0xe76fd759, 0xcacbbfe3, 0x1a2ef8c5,
7035 0x1950bdff, 0x6545ff5f, 0x0f66be34, 0xb48e90f8, 0x61957101, 0x040d9f18,
7036 0x19254886, 0x6474a7e5, 0xfda0c61f, 0xe084363a, 0xa71c4770, 0x80e2cfbb,
7037 0xf2dd5cde, 0xa381858e, 0x08559e40, 0x9fad2f9a, 0xa59ca1a4, 0x0b7b9072,
7038 0x341754c5, 0xb0dfb4c9, 0x70f0f675, 0x937b6f98, 0x82fcc21c, 0x65879775,
7039 0xbcd8efda, 0xb0a76c3c, 0xf0ff7e08, 0xcd1bd1a1, 0x174e8aeb, 0x5ac7a8d6,
7040 0xe7c47c2d, 0x46cc9a13, 0xa6fcc256, 0xeb8c1121, 0x39031fce, 0xbe7e40ca,
7041 0xd314720f, 0x078c2ae3, 0x9c828fdf, 0x6f999a65, 0x3c7df196, 0x991cdec4,
7042 0xff827282, 0xbc38531d, 0xc2912d8f, 0xd6cfff08, 0x3e50d22e, 0x0789ac2d,
7043 0x23cf77a0, 0xb9d4f028, 0x28de1ecb, 0x08bd3c11, 0x15891b9f, 0xa033fb19,
7044 0xb6801fb5, 0xa5afb6b0, 0xbc2c2ddd, 0xcfea0d32, 0x483f935f, 0x3cdff587,
7045 0xc6563edb, 0x07f983fd, 0xd98f88d8, 0x630e5b00, 0xaad71bb3, 0xe3732003,
7046 0x56fdf56c, 0x0139fb53, 0x22e6fe6b, 0x0d5dbe6b, 0x37d436ab, 0x01b6258a,
7047 0xd2b5bdfa, 0x938c6e5a, 0x78e1f528, 0x20fde315, 0x56f7cf85, 0x67e2c74c,
7048 0x573af09d, 0xf98d6de7, 0x5952ef04, 0xd6cbf684, 0x4ff84664, 0x9d017aa6,
7049 0xbe7a3baf, 0x3f875573, 0xf733e60f, 0x19e0994e, 0xbdd6ff3d, 0x18db7ef1,
7050 0x563f6b48, 0xd7a30491, 0x79ff3d13, 0xa3d7a34b, 0x1f961e93, 0xe9cefe8a,
7051 0x829e9a24, 0x1efa934d, 0x6f2bd535, 0x51efb2b8, 0x6e957d13, 0x17c96599,
7052 0xea58e787, 0x5be6d617, 0x14d617ca, 0xafe7ca5b, 0xe7c9645e, 0xd4b4ee87,
7053 0x9974b79f, 0xcad6fca5, 0x37e52c7b, 0xe4b5ad17, 0xb11e04e7, 0xf671bfd4,
7054 0x6db94b06, 0x20d725ef, 0x25bf551f, 0x3e37dc33, 0x007b1d75, 0x5d4fc1f5,
7055 0x71f10f8a, 0xf88d2aa2, 0x979554e0, 0x4ca6f6d2, 0xc1cb8047, 0x16715402,
7056 0xad086b2e, 0x9972889e, 0x5e2cfc91, 0x1a1433b6, 0xe4adda08, 0xb5c9f825,
7057 0x09008b1a, 0x174fac4b, 0xa6ca771d, 0x94f3d6f2, 0x67a302d7, 0x5b972cf6,
7058 0x6e0f7f63, 0xe508bfcc, 0x00f26f4e, 0x3ee006fe, 0xf7f621d7, 0x8932f2e8,
7059 0x33bf99e5, 0xfcf89cb6, 0x65b3909c, 0x6507971a, 0xcc9bf6cf, 0x8c8f983c,
7060 0xf1aafca8, 0x28a8001a, 0x4f3b5127, 0x2e007a46, 0x50cbd0b0, 0xedb77f0b,
7061 0x155e6993, 0xa3c61328, 0x235bc9c8, 0x1c899ca1, 0x68dd7c18, 0x7eff879c,
7062 0x29aef909, 0xb6f5f699, 0x8f7de9aa, 0x3c9f882a, 0xcd544f4a, 0x5558f4a6,
7063 0x55a3d280, 0x5fbe9445, 0x6b694955, 0x0f4a52d5, 0xfd288557, 0x4a6ad553,
7064 0xa1aaabdf, 0x5aaa9df4, 0x1550ff4a, 0xcabdb4a6, 0x0fc1a94f, 0x4937f25d,
7065 0xaec2abe8, 0xf2879d80, 0x565ac567, 0xe216dd40, 0xf21a5f73, 0x67d759f9,
7066 0x3f1f5023, 0xa19d8efb, 0xbc1bdfbe, 0x77ade9a2, 0x5f49fa3c, 0xfe030829,
7067 0x3b967b33, 0x9c9e38e3, 0x819d3636, 0xf867ba3c, 0x46dbbe13, 0x92415e51,
7068 0x37c90d81, 0xdfa31dcb, 0x75f08c61, 0x7f313c3e, 0x016b98e7, 0xfd1ec71f,
7069 0x7bf6366b, 0x717fec4e, 0x87da6407, 0x0f936459, 0x1b8265f1, 0x3b9d6bed,
7070 0x0f3fbc84, 0x82ea3efc, 0x0660cb5f, 0x274904e9, 0x68db3bfa, 0xb1c20a67,
7071 0xc40c3e39, 0xdc1ececf, 0x5c7e41e4, 0x8fd3669c, 0x918380c6, 0xeba43796,
7072 0xd3fef32e, 0xad9fcd64, 0x9037a691, 0x5c26f63c, 0x4ae91a3f, 0x430e8fd7,
7073 0x6a51a7fc, 0x4d38b3f4, 0xbf028fd3, 0x3432da9e, 0x61dfef81, 0x27d60fbe,
7074 0x5d82bd12, 0xd5fff548, 0x1fade9f3, 0x358c3e63, 0x281c0fb2, 0xe86ca00f,
7075 0x1e9dedf9, 0xd13e5778, 0xcd5f10f2, 0x2fa867ea, 0x5fffc1c4, 0x157ec10e,
7076 0x06fd1bca, 0xfd90e41b, 0xdebdf8db, 0xf3b41e32, 0xb637361a, 0x156e9deb,
7077 0x2ba0cc76, 0x1a1a5790, 0x3a2764cb, 0x92beeb75, 0x9b07c968, 0x7d96e9fa,
7078 0xfc01ff06, 0x4152820f, 0x541329ba, 0x56b8a1d4, 0x23bf304b, 0x2f013f28,
7079 0x2bd78941, 0x016ab477, 0x0b63912f, 0xe5b719ea, 0xbde77418, 0xef208ff1,
7080 0x6546fe4f, 0xdff962f7, 0xae505660, 0xf720c51a, 0x2f9f906c, 0x9635b772,
7081 0x77b940ce, 0xf9f7c6d2, 0x83cf2c05, 0xab114f46, 0xe73d46c9, 0x8e9b6623,
7082 0xfb11fff4, 0x64d3279d, 0x1a6cf86f, 0x6afe73ad, 0xfa0b3eeb, 0x585f2599,
7083 0xb017cd6b, 0xde90536b, 0x2ca9d60b, 0x5a5f212c, 0x9d36bdcb, 0x95642dfa,
7084 0x41dec8ab, 0xbdc6057b, 0x00ca674d, 0x73f95f98, 0x43e7658f, 0xae363bfe,
7085 0x7bf61ba7, 0xff3e1f71, 0xe6b0a492, 0x1a0ff287, 0x19707f33, 0x55e1f6c3,
7086 0x6e42a728, 0x7accdbe6, 0xceebefe2, 0xc6be7a3f, 0x8fc3d27e, 0x6f21e620,
7087 0x18e1fc91, 0x9b34da76, 0x10adf424, 0xbae037a5, 0xbe6b7a4d, 0x2f918380,
7088 0x19dfca8f, 0xe9a7ff95, 0xe859892d, 0xc81488ed, 0xfa7325b7, 0x52417d42,
7089 0x37c0b53a, 0x47ad3fe9, 0xd2ffe5ff, 0xff4207fe, 0xeffe96d9, 0x3ff697fc,
7090 0x57fcc7ac, 0xfcbfeac6, 0x433b6db9, 0x9e4a6f20, 0x60c3c879, 0xd4a93a1f,
7091 0xef00f8a4, 0x7a579b65, 0x284e0e90, 0xf3d20f21, 0x3d3cb0c9, 0x46ec3d16,
7092 0xa23f207a, 0x5da125df, 0xfe84ff85, 0xdf753d4f, 0x3e67dc4c, 0x64eaacdb,
7093 0x47b16d2f, 0x15afc0ec, 0xd833c58d, 0xe11fca18, 0xc8cfbbf9, 0xd2b26f98,
7094 0x0f93c967, 0x0dffa0a5, 0x13d84528, 0x2a97d211, 0xc5cc3eea, 0x3ac8287d,
7095 0xdba2cf89, 0xfae7f8e1, 0xd7cc7c90, 0xc3967a12, 0x0fcf493c, 0x1b04b80a,
7096 0xa3233bef, 0x72b593ef, 0xfd54683f, 0xd4ffa122, 0xc749dcdb, 0xdf6274c0,
7097 0x7941df61, 0x8583c069, 0xbd53feb9, 0x4731e1f5, 0x756d3e60, 0x2648f1bf,
7098 0x767c1938, 0x2ffe61b6, 0x2ef6f79e, 0x9d85db8f, 0x4c2eddd7, 0x424dbced,
7099 0x69e66b6f, 0xa0f11a99, 0x41b65c5e, 0x73e085f5, 0x4f4db6d9, 0xea768a3c,
7100 0x70df76bb, 0xdb74bfe8, 0x00987f4b, 0x6aedd2f9, 0x0cbe0cd2, 0x8dd29497,
7101 0xbffc2097, 0x1e376c74, 0x92f57e4a, 0xbfcd1de6, 0x374fb8ff, 0xefb74a3e,
7102 0x9ee8d8d3, 0xb0d298f0, 0xc5756b4f, 0x91c34bc0, 0xaaafd45c, 0xa1ae7eb7,
7103 0xaf72793d, 0x63d352c4, 0x4bc373c0, 0x9c2027a4, 0x4f028f08, 0xaa8b785d,
7104 0xa0bc041f, 0x14f0373c, 0x9080fe5d, 0x779fd83f, 0xd3f3d114, 0xf95fa3cf,
7105 0xd70fbb3d, 0xedf4f45f, 0x71c75c1e, 0xf5d392a5, 0xfc532b63, 0x1a916e30,
7106 0xe529d14a, 0xff1e8bdf, 0xe15bd121, 0xe14c3f1b, 0x9fbfa0f6, 0x50a6f68d,
7107 0xc2df5c3f, 0xfad037f5, 0xe880580a, 0x3931e8ae, 0xa7e90c2f, 0x3dbe9b0a,
7108 0xc8645f06, 0x6f8e2f9c, 0xd60b8504, 0x12ed1c77, 0x4efeb3f4, 0x7f266f0e,
7109 0xfc8622c8, 0x3fc343ff, 0xfe5316ce, 0x93c70753, 0xbe09b643, 0x4ccf6d02,
7110 0xb77775af, 0x0d4e7e20, 0x1fa2a7f2, 0x9094c82d, 0x25f48780, 0x31bf2bf4,
7111 0x87e3952d, 0xd16c9579, 0x2980f40e, 0xb7eb1df8, 0x18e77ea8, 0x65f63b4b,
7112 0x4bf8f77a, 0xef30f8c4, 0x8fbfdc38, 0x86a2b0a7, 0x55bbeb18, 0xf61ef836,
7113 0x997d1371, 0x7bf39bf8, 0xbf9c3ddd, 0xcf0f7e0d, 0x9fe58e9a, 0x07f9c9bc,
7114 0x08fee1db, 0x52a48af3, 0x25ebbef9, 0x16760792, 0x75d7c589, 0x6b6be0aa,
7115 0x302741b9, 0x304a456f, 0xdff60bd1, 0xfe4fe087, 0xd07582b3, 0x832f24ce,
7116 0x67a79e38, 0x16df067f, 0x251ffe0a, 0xad9ff95b, 0xbbdf7ce7, 0x7da2157e,
7117 0x3f0d4cae, 0x2bf228f1, 0x8bc867f0, 0xe1e6aafc, 0x1fd74fba, 0xc04dc3f8,
7118 0x0c1ba7a7, 0xcfcab53e, 0x7a2d3e68, 0xf484b376, 0xa7a7cd19, 0x891b408b,
7119 0x3df0a7c5, 0xb5169f26, 0x9f953ffe, 0x8faefc06, 0x0f219f82, 0xb463837b,
7120 0xf3633c3c, 0xe5a33c12, 0xc9bdfc21, 0x9fd27bb2, 0xbd067741, 0xfcb2fc95,
7121 0x1817f222, 0x5dd06974, 0x741a5d17, 0x62ffc3d7, 0xf9745f81, 0xa005a460,
7122 0x2a5dbc93, 0xcd6555d9, 0xda0c3cfc, 0x8b203cbd, 0x6da7e4e0, 0x3cbcd58c,
7123 0x0f9cc920, 0xa21be547, 0xf2a3fbea, 0x03f55179, 0x4b4af951, 0x03a6b2fd,
7124 0x47fc231a, 0x4becf52c, 0xc41f651f, 0xfd8c87b0, 0x4678d826, 0x0c5d210b,
7125 0xde50d4ec, 0x0541cba9, 0x1ee0ff45, 0x0ec5ec99, 0x182af180, 0x3d3ea3a7,
7126 0xb1b9021c, 0xf0edc9d2, 0xd3d3bd0e, 0x8995d207, 0xac99df3c, 0x67b942ad,
7127 0x7274ef7c, 0x5e47473f, 0xe4d127a7, 0x2cd238a7, 0x0d6edc93, 0xfcb1e9b3,
7128 0x10a3b020, 0x6f595bde, 0x39ffdce5, 0x5e0d764d, 0x8d68f68a, 0x771343ec,
7129 0x3d1bb2c1, 0x68e92ae8, 0x6ccd7a1e, 0x55f0bef8, 0x3a558e99, 0x70633ce2,
7130 0x57e42c5e, 0x89ec99fa, 0xb3f42c13, 0x6ccfe889, 0x82c576e6, 0x08fa5135,
7131 0x54f4435b, 0xa1a25ae0, 0xe03b053c, 0x973fab7d, 0xe88945f3, 0xb5bd68af,
7132 0x278f68dc, 0x95df685a, 0x03cb59d4, 0x65da3ec2, 0xcb0649f0, 0x86833920,
7133 0x42e7da0f, 0x47934f2e, 0xf01b335d, 0x665071d1, 0xb6799e78, 0x9c7c2659,
7134 0x97e7e7ad, 0xfc4c942c, 0x493ac156, 0x6a701a1e, 0x7ad27e43, 0x3b6d5797,
7135 0x177d9cfe, 0x3fcecdd2, 0xa439f98e, 0x1ddf3b6d, 0xcff31bb1, 0x8ff83dbd,
7136 0x29fd67ac, 0x37e49d7b, 0x26ebd8ee, 0xf3d8ef7a, 0x6177c1db, 0xfc9d977e,
7137 0x3f7b1d75, 0xd7f4831f, 0x845edcb1, 0x1063aef2, 0xf7aa87b7, 0x95a63e7c,
7138 0x8415d7f6, 0xc6b2a3b7, 0xbfe6a3f5, 0x3092961e, 0xdea15585, 0xf89e37b0,
7139 0x93bcf829, 0x7b1d0bfc, 0xb80ecf3e, 0xa9eb75fe, 0x1d39e710, 0x59fb366e,
7140 0xf7225f9c, 0x8f770783, 0xcf0cb4df, 0x69f71ba3, 0xca7ca1f3, 0x831f7f0b,
7141 0x59e3b472, 0xabb50fae, 0x79e38fad, 0xe1fc8745, 0xdce01532, 0x9fd54c8e,
7142 0x1194fbb1, 0x62a34393, 0xe4efe5c1, 0x7850b937, 0x4fb70a68, 0x21e1fdff,
7143 0x73bcb9f9, 0xae121d87, 0x7fc38bfb, 0xd7b0b944, 0xac69744e, 0x32c374f7,
7144 0xb7ce57d2, 0x7fcae1ee, 0xd0b83a17, 0x0b914b75, 0x7fd4f759, 0x5aff7c73,
7145 0xa2fcd2f6, 0x9d27a0f9, 0xf283b9ef, 0x9a3edcdb, 0xfbd205ef, 0x7869ff82,
7146 0xeef0167f, 0xabbaff39, 0xddd7cdff, 0x9d5fde3b, 0xe3aef02b, 0x85f07f79,
7147 0xbefcd3bf, 0xf4db9cae, 0x0dee94df, 0x9b15febd, 0xa80ccdf7, 0xb8d59d3f,
7148 0xb2b8b150, 0x19abff7c, 0xc0cafa50, 0xdf388903, 0x37e751c9, 0xc2a6fa46,
7149 0x92c9a6ed, 0x9641ec8d, 0x907b0928, 0x840351db, 0x496030fe, 0x0321e901,
7150 0xf5cfde06, 0x0ebbc506, 0x195f1fcf, 0xb147df3c, 0x3bec6c14, 0x97ebcc01,
7151 0x9ed5bc8b, 0xfcc4b9fc, 0x603a3478, 0xa20ff7f0, 0xa0703b5e, 0xa42f7a4c,
7152 0xe8beefa4, 0x97bfce99, 0xe7bb1669, 0x0ed5af4a, 0xdab24dca, 0x7f45534b,
7153 0xff9f18d3, 0x0e149734, 0x0f261c03, 0xfa1269fa, 0x570f2747, 0x5cf90499,
7154 0xf6815816, 0xb59754c5, 0xc33c06bf, 0xe1cdf719, 0x380d5768, 0x8797590e,
7155 0x93241c70, 0x70bcf49f, 0xdc1379c4, 0x2f18c232, 0x871f14c3, 0x1f729f63,
7156 0xbd859df9, 0x904d474d, 0x5aab5c57, 0xb4159f90, 0xc81c3997, 0xe5ec36ce,
7157 0x84cde0de, 0x2188adfd, 0x032bf80d, 0xdad3bf65, 0x06dfd91f, 0x3e2ebe5e,
7158 0x537e3c0c, 0x851bbcbc, 0x45ae8197, 0x74ebf20a, 0x62fa17b4, 0x1f9e0cfd,
7159 0xdce85218, 0x570bd84d, 0xa4291778, 0x50cc0cf7, 0x8e855f10, 0x1cf0aba6,
7160 0x6893e1c4, 0xd9b7171e, 0x64707f68, 0x91f70449, 0xdfe50ab5, 0x10e3e9b0,
7161 0x7b2f33df, 0x0c9df4ee, 0x8d7ee6fd, 0xf1e53dc7, 0x7dbf8ff3, 0x8c44e5f9,
7162 0x2c781417, 0x46afff84, 0x167aff3f, 0x2d380389, 0xa1285854, 0x25bdfa0f,
7163 0xefc5bef6, 0xdfe3cd6d, 0xfbba5377, 0xdefd5f39, 0x3abfcae4, 0xd8e40e7d,
7164 0x5df300fb, 0xe1a30e98, 0xfd5db315, 0xaf0e669d, 0x1e1621e0, 0xe42ae3c2,
7165 0xe139d33c, 0x9ffe821d, 0x99b3d3fb, 0xea4ed768, 0xe5c09518, 0x17b230eb,
7166 0x385ec282, 0x3e09bccb, 0xa1d7ca17, 0x79fe7409, 0x8ac77650, 0xec2adc2b,
7167 0x7c625fed, 0x751da409, 0xfb4646ac, 0x1f92758d, 0x60e75437, 0xb7c4639b,
7168 0x9f86abe4, 0xfe0de04a, 0x8f3c6ce4, 0x842fe3e1, 0xbc6609a6, 0xa938cdb5,
7169 0x0789e98c, 0x74df7bfc, 0xe14df51e, 0xc23df68b, 0x35b3ab77, 0xfc862f37,
7170 0x6fc05db8, 0xc82ffee6, 0xf36979ff, 0xefd21b06, 0xcb3675a5, 0x2aa96af9,
7171 0x6cb1b1ec, 0xe66bce2c, 0x0b3ba77e, 0xf65072f1, 0xb0673c61, 0x88168cf9,
7172 0x0d182e71, 0xfd1fec4f, 0x9d555be9, 0xdab76bf8, 0xbae11f30, 0x430723fb,
7173 0x56977a3b, 0x9e6b1a53, 0x9e7cec03, 0xedc3590b, 0xfdffd263, 0xc3a93be0,
7174 0xf68c9915, 0x7e131d67, 0x63fa688f, 0xb767c744, 0xafee30b0, 0x5ca2af68,
7175 0x68cf5b38, 0xdc90077f, 0xf037768f, 0x7eccf7fb, 0xb69b8b9c, 0x82f512ff,
7176 0xc749668a, 0xa50a8623, 0x6d3f4355, 0xc65129b0, 0x6bc3387d, 0xa3eabbc4,
7177 0xc5f137af, 0xf8215556, 0xfbb0981e, 0xe3f71c66, 0x9ea18d36, 0xd3b17fe2,
7178 0xc7f8fb83, 0x07c499cd, 0x57ebadbd, 0xa9aaec55, 0x972a3748, 0x30f4d187,
7179 0x92ce3eaa, 0xf40e4cbf, 0x699afe47, 0x8be25d6f, 0x6befbf81, 0xbc173892,
7180 0xfe16f940, 0xbdbe4cff, 0x80b7c869, 0xa3e2679c, 0xf90f5abe, 0xbe4b1a96,
7181 0xa9bc962d, 0x7bc5f708, 0x5e22a686, 0x26aabf17, 0xdb6f92c7, 0xe739f8aa,
7182 0xb94e2233, 0xdbe411a3, 0xadf24db7, 0x8c5be411, 0x5fbf9078, 0xff0b7ca8,
7183 0x36dff0d7, 0xd6316f94, 0xf9566bab, 0x08f9a636, 0x8d31b7c9, 0xaf3c4b36,
7184 0x7c9f3b5d, 0x47af9293, 0xeaa0f8fd, 0x3f418f8b, 0xfe3e84db, 0xc44b888c,
7185 0xe5ce5071, 0x7f8d3a6a, 0xe2ee72a1, 0xff73950b, 0xe4367045, 0x8c1de2dc,
7186 0xd27b9ce2, 0x8b739721, 0x939c8177, 0x9cb91e90, 0x7187bc5b, 0x7c945cbf,
7187 0xbe43d91b, 0x115faa31, 0x4d83ede1, 0x02df0fe9, 0xabf58dfd, 0x1fd4073e,
7188 0xc6ef2ddb, 0xae5de599, 0x7adc10a6, 0x1783bbc8, 0x0876ef26, 0x6c720779,
7189 0x68d7ca08, 0x5b35f0fa, 0x8f77c1e3, 0x2bff5e3f, 0xcadf97e4, 0x86f8de74,
7190 0xbd0f9f8d, 0x1678fe36, 0x6263d7d2, 0xdc848b3e, 0x510aaf6b, 0xe45e53ff,
7191 0xf1772beb, 0x468af138, 0xd4561fae, 0xfc2f614b, 0x17c27733, 0x78bfce1a,
7192 0x2152c48f, 0xebcecb3f, 0xf38d27b3, 0xc3233632, 0x720b0f44, 0xbfcfc94a,
7193 0xf40e6140, 0x72ba97e3, 0x5bfea24f, 0xfefdc39a, 0xf17be2a5, 0xd0abadab,
7194 0x88fc5dff, 0x46a5e744, 0xe711ab7c, 0xa26e23db, 0x77f91979, 0x6627e3a3,
7195 0x99a9b88a, 0x1bc294bf, 0x947fc462, 0x7fe6b16e, 0x966ff822, 0x62f04adc,
7196 0xe331cbaf, 0x5d7a8c38, 0xe0283a70, 0x7ed32754, 0x802705da, 0x27bd379b,
7197 0x33d3009c, 0xe1ba5232, 0x585bfc52, 0xebef566f, 0xbd16e035, 0x5d7fc36e,
7198 0x0de9fa2a, 0x7b9c060e, 0x1dc05fac, 0x939202ec, 0xa758f0d1, 0x33b5f975,
7199 0xe8094e31, 0xe84ce486, 0x181700d7, 0x70d26f2f, 0x47977dcb, 0xd664fd05,
7200 0xe1829a4c, 0xae30b30c, 0x6a0bca1c, 0x0fdcbd17, 0x1dee31e0, 0x4edc58ef,
7201 0x0f609b2f, 0x56ec39e0, 0x41c92767, 0x35db0e83, 0x141c07ae, 0xbfddddf0,
7202 0xf9d93272, 0x7a8e924d, 0x24e23048, 0xae0106b8, 0xa828ff78, 0x8106fc70,
7203 0x0eff911e, 0x8719f23c, 0x8bc91ee3, 0x635c9dfe, 0x40bc42bf, 0x8e66ccfd,
7204 0x22586097, 0x4eb164bc, 0xa8a97f3a, 0x84117c95, 0x8206d35f, 0xe19f219f,
7205 0x93c665cf, 0x58957e89, 0x4c954bf4, 0xa8a965fb, 0xf35ed337, 0x99e7a407,
7206 0x036caa4f, 0xfbfe1b81, 0x4f3e7a2a, 0x9e34501c, 0xb6bc04da, 0x085d3c21,
7207 0x77ae4eb7, 0xfba0be45, 0x50794650, 0x39e05909, 0x5f73d1e5, 0x0671af09,
7208 0x518e90bc, 0xcbe735be, 0x92682f98, 0x9ef4df58, 0x50f3c5eb, 0xef17bf33,
7209 0x7ffbc239, 0x18b1f24c, 0xba60beeb, 0x8b9e85ee, 0xbcf16e80, 0x8eba37a4,
7210 0xd23b5386, 0xe9bab7f3, 0xe76735f9, 0xe7a44ca1, 0x43f7123d, 0xce5a2734,
7211 0x1e763d35, 0x09d5b5f7, 0xeeeb0f74, 0x6df5557c, 0xcb90c6f4, 0x7ed1ee82,
7212 0xbb37df30, 0xf1821704, 0x141c5ba2, 0x18f347ef, 0xb353f5c2, 0x64e6de7c,
7213 0xf567d7c9, 0x2edbbfde, 0x37278cc5, 0x3f2323f4, 0xf8c3c71a, 0x6f1826f9,
7214 0xd178f764, 0x2fe183fb, 0xfabadf38, 0xbad9bfdb, 0x6ebe718c, 0xb590543c,
7215 0xb88d5e10, 0xe05223a8, 0x73ea2a47, 0xfc4b25d3, 0xc85ccc15, 0x7fdc6fad,
7216 0x7bdc96aa, 0xa74d2cff, 0xebb774fb, 0xe89d77c6, 0xe2674f33, 0xdbe26f7c,
7217 0xec7fefb8, 0x5998e7e7, 0x44d6f636, 0xab263fdc, 0xe3eae90c, 0xa1f92a43,
7218 0xe3ca9e3f, 0xedf9af6e, 0x3e5d0501, 0x3898f0d7, 0x8938cd76, 0xb037acec,
7219 0x87a8f1eb, 0x047f983b, 0xef132fc1, 0xd5d465ed, 0x5f02f14c, 0xae12dd8f,
7220 0xa537d4c6, 0xc435e933, 0x219924db, 0x7dfc5ade, 0x7f20b8a7, 0x032c87fb,
7221 0x1fa0a05d, 0x07b1fb50, 0x9bd63259, 0x33264fe0, 0x27e37c66, 0xf3075e6f,
7222 0xf6487f18, 0xacdea179, 0x03172e03, 0x7ae47a7d, 0xe0980b1b, 0xab858135,
7223 0xfe34dfd1, 0x9c3affa8, 0x3be81177, 0xa8a44f78, 0x07b54379, 0x6a25ebf3,
7224 0x72050c1f, 0x6d9eb03d, 0xbf7267b5, 0xea017285, 0xf5c13761, 0x4eb05ebc,
7225 0x728861f2, 0x8a5af341, 0x93a82a2f, 0xb6e142e8, 0xbc1cc4b0, 0xfa03b0df,
7226 0xda1eb6dd, 0x05fee167, 0xbadfb1ed, 0x875e6f33, 0x49e60772, 0xb9f9ebed,
7227 0xf3b4017c, 0x2dd4bf22, 0xd78afea2, 0xb3ef0c4b, 0x7df3d514, 0xea90e8a9,
7228 0x7dc6f2c3, 0x3b7ed08f, 0x97ebc603, 0x6450fb8e, 0xca0bdd2a, 0x2fba7494,
7229 0xf84c1a19, 0x7f1c60eb, 0xf220fa6c, 0xabbc520b, 0x98a0c097, 0x64fe63e3,
7230 0xb3f2421f, 0xeb4cb7c0, 0x96bcfd0b, 0x236e9c93, 0xe7433aba, 0xde0147ed,
7231 0x1bf78001, 0x40e55e22, 0xab5a07ce, 0xc2fc5f69, 0x9b9f943e, 0x38a24d34,
7232 0x8f2c858e, 0x8e6638e2, 0xebe6fae7, 0xe8c33b97, 0xed5d7be7, 0x0fdf881c,
7233 0xefa76e5c, 0x1cb8dbed, 0x4ad41f6e, 0xebe3f6fe, 0x58f78655, 0x24cbd7aa,
7234 0xabd78e2f, 0x7e563f74, 0x1431c78c, 0xc7fae36e, 0xdfbcf581, 0xe1b7a8e3,
7235 0x439607b9, 0x11ab70be, 0xb4e5c0e7, 0xe8167f61, 0x90c2fe3c, 0xdd62e5bb,
7236 0x75a1f63d, 0xd92434cb, 0x2e5b7968, 0x8b0971e4, 0x2d1cbd90, 0x1cf1cb77,
7237 0x197c83dd, 0xeae6271d, 0x0e9063b6, 0x5d105f22, 0x19521c57, 0x07d231da,
7238 0x9714b96d, 0x73a247b6, 0x92cdf18b, 0x8a1ae31f, 0x4987b1de, 0xcfe70eff,
7239 0x2fee11fb, 0x8619daef, 0x3c431f2c, 0xb1ca9c80, 0xa7e9fe77, 0x1be4fdf0,
7240 0x02088c0e, 0xb827c9ba, 0x59be711b, 0x4f3c799b, 0x52eb1bd6, 0x9b2f3ef0,
7241 0x40e497da, 0x02ccad61, 0x52713926, 0x13775ff2, 0xd4741fdf, 0x667c0c77,
7242 0xb8053569, 0xc1cb7ebf, 0x66ef55f7, 0xd8646315, 0x043d84ef, 0xf51f81f6,
7243 0x6b5de29b, 0x1d133453, 0x9b59ef14, 0x55f7c322, 0x1aa61e22, 0x576857f7,
7244 0x8a71f1ac, 0x06fa4af7, 0x3f4638d3, 0x2edabf46, 0x1ee86ede, 0x7fd6f69e,
7245 0xd68fce31, 0xf286a9f9, 0x1e9fba22, 0x4fd2f7e3, 0xadcfefce, 0x395e6093,
7246 0xac14cbaf, 0x8cc1f39e, 0x1d73e6a1, 0xcafc3523, 0x98da6fd9, 0x9cbf04df,
7247 0xbf31c53f, 0xe38ddf09, 0x7f01ef80, 0x61493757, 0x23f984a7, 0xe516795a,
7248 0x0af3e475, 0x98ae7fe1, 0x1aebcfca, 0x8158de33, 0x4b233f7c, 0xa1607a22,
7249 0x8937d680, 0xfa2f35f4, 0x78b30bfd, 0x8f6842fb, 0x08f8d8fc, 0x13904fe7,
7250 0x1523945e, 0x52e6d7eb, 0x8bc93afd, 0xc86e37fd, 0x28a47d27, 0x5e546647,
7251 0xa3f48477, 0x4923a6a2, 0xb7c0c7c8, 0xa81f50eb, 0x51d76898, 0x68fc1b8e,
7252 0xe2ebf7f0, 0xe8732b3e, 0xc67ef1a3, 0x8be646ff, 0x21f2d7c1, 0xf583d72e,
7253 0x39831f9c, 0xdf5f5f9c, 0x2f0ae2a6, 0x9f89bf84, 0xfce16f8f, 0x43763f2a,
7254 0x2f87de2e, 0xc3efccdc, 0x453f581f, 0x78fa7d43, 0xa6fda258, 0xbd737f27,
7255 0xabbf9a35, 0x7defbe25, 0xe0d2fd5d, 0xe18f836f, 0xaf1c6aef, 0xef14f80c,
7256 0xf5f3464f, 0x0fe1b54c, 0xaf7cc3b7, 0x03d61a79, 0xddf29df3, 0x26ad3d3b,
7257 0x14f90939, 0x3c2817cc, 0x2b90cb9e, 0xfb8f0ae5, 0x8bf3dafb, 0xb76c3f1a,
7258 0x677e47fa, 0xebf1e44f, 0xfdd12a75, 0x07b3f8f9, 0x7f205d9f, 0x9d5f285e,
7259 0xf18d3f8f, 0x7ed63de5, 0x2de8277e, 0x8076bfba, 0xfae0046b, 0x8a26fd4a,
7260 0xa9e8fdf3, 0x3f113323, 0xce81bba5, 0xddeabe91, 0x4e72822c, 0x557ed309,
7261 0x3dd328d2, 0xb244a601, 0xf99b73af, 0x956dc798, 0x7a26e33e, 0x1ed6792a,
7262 0x4bed019e, 0x86307e76, 0x779668e2, 0xe85a5c52, 0x872fa129, 0x1f20c75a,
7263 0x7e3c2894, 0x042e5a2c, 0xd70fdc1c, 0x367e2bb6, 0xc2da4fae, 0x69288fdf,
7264 0x9bb551b8, 0x746e25ce, 0x3a3d46a8, 0x1d010dd7, 0x9c5dfde3, 0x02ddf99f,
7265 0x6dac6e23, 0x2513972b, 0x81d92a4d, 0xb7b65b25, 0xc970fc63, 0x77f2763b,
7266 0xa19cb705, 0x9e5310fb, 0x94fe46d9, 0x396c9360, 0xb711eb7f, 0xd88e45b9,
7267 0xb1b0ee31, 0x211dce9c, 0x0df2847f, 0xcf97e3b1, 0xfa585f17, 0x219d9ecc,
7268 0xafe96100, 0x7ca0f49e, 0xd9b2d539, 0x7e877083, 0xba6e32bf, 0xc3669c47,
7269 0xa7195f3d, 0x01ff0a79, 0x438f738c, 0x9c4635d8, 0xa4be96eb, 0xb2fcc247,
7270 0x739c62f3, 0xdbe5e974, 0xef1c7d3e, 0x7b3db411, 0x6f9c71fa, 0x7e3e3fd9,
7271 0xd8c1e31c, 0x77ed275e, 0xa2dea7c1, 0xdda36c38, 0xb5dfb126, 0xe2927d6f,
7272 0xb5dfdbd7, 0xf6b7b0fb, 0x6307c73d, 0xf6fb603c, 0x6fd0522f, 0x34cf64b9,
7273 0xd92eebf2, 0xc5952531, 0x148c2fd8, 0x017c36e9, 0xf8d1f3f1, 0x8078d03a,
7274 0x023ed6e2, 0xebfca37c, 0x286dbb8a, 0x5ecc71e7, 0x1f5b6f11, 0x8f429efb,
7275 0xebc6daf8, 0xe51cb9ae, 0x1fd7237e, 0xfb671bcf, 0xdbf1e026, 0x7abf8017,
7276 0x1b102fc3, 0x3fe11f7f, 0xa2fb4f00, 0xe369f7f0, 0x8a3c5fc2, 0x7b7d8d65,
7277 0x5c8db38d, 0x7b8cdc00, 0xfc380f10, 0x88c91c87, 0x5c525fe7, 0x866de233,
7278 0x4f9ff717, 0x91fde307, 0x5ce76a13, 0xc7b85fba, 0x68bc63ae, 0x89b79ec9,
7279 0xbc77da7f, 0x26687e41, 0xb3b423ee, 0x3f1e3fae, 0xd675892e, 0xae7c79b9,
7280 0xefc63f80, 0x5df43d7a, 0x3a72e9c4, 0x7b77e236, 0x9d95db8b, 0xee36cf5c,
7281 0xfdd79467, 0x76c3c451, 0x41ca4be3, 0xcaf91d3c, 0x0e036878, 0xddc390ba,
7282 0xe3b1e871, 0x2beebba3, 0xfe217c08, 0x8aea1f70, 0xc0fc8733, 0x7a37e4b1,
7283 0x0790c59b, 0xfc781bed, 0xfb1abb7a, 0x9711b05e, 0x3e688ffe, 0x3c585f0d,
7284 0xffe6f9fa, 0x81d3e175, 0x4f724fca, 0x2dfdb538, 0x774f1cb6, 0x9eecdf4a,
7285 0x7d149961, 0x1cebca6f, 0x473b7187, 0xbb83b434, 0xdeb16cec, 0x6f57e136,
7286 0x78a64a7b, 0x070d55e5, 0xcb478e48, 0x2f7c0a8b, 0x337cc625, 0x9a2b7cc5,
7287 0xf6d13ef8, 0x82ec3bac, 0xeff6da7e, 0xa8ae7a22, 0xd2f1423f, 0x95f96f2f,
7288 0x8b8a6ad6, 0x6c227dc0, 0xd3db7f9a, 0xdc90c6fb, 0x44b2ef16, 0x8c49338f,
7289 0x3d8e6c13, 0x8cfeb04e, 0x50d29c65, 0xcebba683, 0xc529de3f, 0x77f6237f,
7290 0x83eb85aa, 0xe9e41aa7, 0x0fe318e1, 0x77d6aa73, 0xa4bf60a1, 0xfcdc67f7,
7291 0x13d919bd, 0x12e5fa47, 0x093bce77, 0x146a9849, 0x4cbd55af, 0x87fd77c4,
7292 0x5df10d2f, 0xe18abeed, 0x7c22577c, 0x551e7e4d, 0x4bd4300f, 0x2cbcb4d5,
7293 0xcb442bf4, 0xc6c92d1b, 0x2ffc26c2, 0xf54f4f71, 0x644779d2, 0x70f3e220,
7294 0xfb1571c6, 0x9f944bfd, 0x5b0a2fea, 0xfbf30a95, 0x2df2484b, 0xdfd97e83,
7295 0xe794183e, 0x977fd9ee, 0xd963f11e, 0xb0aa57e2, 0xbb461e77, 0xa4e0bd84,
7296 0xaf7906f8, 0x08f9de93, 0xf5a4ee3e, 0xf9f1d81e, 0xff5fa413, 0xb9f8cec2,
7297 0x202f580f, 0xde750aaf, 0x9f1df1c7, 0xd457fe3f, 0x8c31b19f, 0xd438f85f,
7298 0x3ea1bb47, 0x8e9cec9e, 0xa0c61367, 0x85f0a45f, 0x3ca266bb, 0xf4e78c2b,
7299 0x6a4cf858, 0x3bfa1ab8, 0xc7f3cc96, 0x77a20db6, 0x759f4a25, 0x81e8dc53,
7300 0xe055cf1d, 0x4cfed4be, 0xa97dc33c, 0xe7a105fd, 0x53bc52ff, 0xcd7aab55,
7301 0x4cc5e3f1, 0xf3ef9af1, 0x12de6294, 0x2fc8c4af, 0xfe847c41, 0xba04a6aa,
7302 0xaffa0407, 0xd48f9fa5, 0x447c3bce, 0xfcfea1c7, 0x3fa453fe, 0x7ae883ca,
7303 0xcebdf946, 0x395ee221, 0xd77573b4, 0x059d6a0f, 0x9fd35f3c, 0xaa1693cb,
7304 0xf853b0ff, 0xcf79458f, 0x87fd797e, 0xeeeefc84, 0x10afb787, 0xd344d0ef,
7305 0x6fd146ef, 0x5fbf96e9, 0x959deb1c, 0xefa7f318, 0xc858943f, 0x76ca7a86,
7306 0x857fbd27, 0x7de028ef, 0x3f1a9d85, 0x44f32ad7, 0xdd9b9de8, 0xc5971e42,
7307 0x9ddde845, 0x581e62fe, 0xd1ccf31f, 0x9fbd34fa, 0x61939cf6, 0x0bf9595c,
7308 0xbbe23f6e, 0xc7e7e77c, 0x71859e7e, 0x1714f189, 0xffc2fe5f, 0xb7283a22,
7309 0x3f22e647, 0xb3b76e74, 0xdbe7c88d, 0xfc8c1d5f, 0x0646a6da, 0xf38af9f7,
7310 0xbb06f2ba, 0x58bffef5, 0xdaaaa9c7, 0xbbbef0cb, 0xa4b6af71, 0x57f33917,
7311 0x5fa3d727, 0x725ffa71, 0xdf5bbf12, 0x35553a73, 0x59df133b, 0x3897ea30,
7312 0x77c5cb62, 0x137c5e51, 0x71eaee39, 0x9c5df53f, 0x25ac47cf, 0x153efd05,
7313 0x3ca377a0, 0x3e92d92f, 0xfb04fd10, 0x043bc69d, 0x8fdc04de, 0xb25eabf6,
7314 0xef3531a7, 0x7caa2733, 0xf430ca99, 0x54cc8cdf, 0x1b1d1d60, 0x67f414ce,
7315 0x9cea4718, 0x9dee4b1d, 0x3ad3c676, 0x98f61c4a, 0x09cf9df7, 0x8d0f7aba,
7316 0x1e3e64fe, 0xee3187f2, 0x724c357e, 0x2f388ef8, 0xbb012bd5, 0x6e97bf08,
7317 0x79699399, 0xa1a9457f, 0x04a7c07a, 0x4eb662cf, 0x6fc932cb, 0xa5e2bc63,
7318 0x264a9959, 0x4ffe577e, 0xddcabd17, 0x24a16678, 0x01150bd2, 0x9faeb663,
7319 0xa2887ee5, 0x7e1039e6, 0x15d3cb1a, 0x86a54919, 0x358e3df8, 0x7502ea50,
7320 0x5653bf8b, 0x9e4e50c9, 0xe8f6e710, 0x1bb4c2ef, 0xdc92775e, 0x6c620d0f,
7321 0x07be3a78, 0x4dd04de1, 0x10f153f0, 0x5763e61e, 0x1797192a, 0x93b47433,
7322 0x7d8050a5, 0x5d54f409, 0xe9133d35, 0x18fcfe11, 0x07a64907, 0xbfa3cfcc,
7323 0x41ea05fc, 0x3dfca740, 0x70b2efbf, 0xc3188035, 0x3aafc981, 0xe877f199,
7324 0xccc3bf56, 0x71a5c6f6, 0x68e77892, 0x1731c91f, 0x84ebfeeb, 0x94558a3c,
7325 0xff09d5b7, 0x4473c1c8, 0xa822ce97, 0x58bbc617, 0xd7521e24, 0x9994e528,
7326 0x90593dff, 0x3ea9d137, 0xcd1e5ad1, 0xa2d72017, 0xf8206dc6, 0x449fbf41,
7327 0x5449fbf5, 0x557c9fbf, 0x829c06bf, 0x7c3e8d8e, 0x556562a7, 0x1f1b809e,
7328 0x06e021cf, 0xef8919f0, 0x9c5b31e8, 0x13879c4f, 0x6cc4e35c, 0xf01f58ec,
7329 0x4e971e5a, 0x612fb978, 0x41c6276f, 0x865aa4b3, 0x890aef76, 0x97f0d3ef,
7330 0x63b532e7, 0xf0f883ba, 0xb94e311e, 0xc30af380, 0xbea3d53f, 0x1eaff493,
7331 0xd5bd9df5, 0xdf5d8b8f, 0xe27cdbdd, 0xb127cf63, 0xe26bfe97, 0x75fff663,
7332 0x0bc552e5, 0xe786bf6f, 0x49f25db6, 0xf55bd007, 0xd438f2cc, 0xfd8f1333,
7333 0x70be95a3, 0xd031d33d, 0xa438ef8a, 0xb8b7a06f, 0xd1efd661, 0x7d1bd274,
7334 0x40758be5, 0xe00fd5de, 0x7f189370, 0xf73f1d6a, 0xf70965be, 0xe87981d3,
7335 0x8b37fac7, 0x0a3937fa, 0xc470dfc9, 0xbabfdfc6, 0x91eb96a5, 0xa658fcb7,
7336 0xef1ee9f3, 0x803fe151, 0x2a5d6edf, 0xb1e92385, 0x7562d7de, 0x9e6e3f78,
7337 0xbdfa3f18, 0xe6f300aa, 0xbd6396ae, 0xd2e9c557, 0xfd1757b8, 0x9602c54e,
7338 0xb321de27, 0xd4eb3f7e, 0xcd67e4bb, 0x2c7deea8, 0x1ee816b4, 0x7ba04ff5,
7339 0xebc7973c, 0xe2171462, 0x485c78d1, 0x4f3a20cb, 0xd9dfe433, 0xdc04de91,
7340 0x307f99af, 0xeff3aeff, 0xa6f4af8b, 0x2a1def9a, 0xef2ce2e7, 0xbeab54f5,
7341 0xea6f9434, 0xc15fd039, 0x0dced654, 0x39535e61, 0xfcc4ade8, 0x7249be18,
7342 0xa3094d2a, 0x3cf4545c, 0xaf7a8856, 0xa8c3ef78, 0xd55d25af, 0x0ebe67a5,
7343 0x4b8e6fff, 0xbc5cbe26, 0xb6f74bd6, 0xdbcf8b3f, 0x7b24f489, 0x57017c72,
7344 0xed087a4f, 0xc6aeebe0, 0x5cf7a775, 0xf3e6b54f, 0x157dbe91, 0x6ffc8080,
7345 0x4fce073e, 0xf6df7bb6, 0xa37efce2, 0xf4bbf432, 0x44ef8f84, 0x86cfca18,
7346 0x887c5007, 0x0463309c, 0xbc46bf8e, 0x6ababa6f, 0xaa2ba524, 0xbc794898,
7347 0xaf2a8adc, 0xea447348, 0xaa74e917, 0x1a556f77, 0xf95557e5, 0xebe03528,
7348 0xfbd0d5f0, 0x7c618e93, 0xf02e877c, 0xf0136497, 0xe5fe900b, 0x73a4ab48,
7349 0x195ea745, 0xd8df77c1, 0x7077d840, 0xc10d7a59, 0xf919d357, 0xe53ea135,
7350 0x548798ed, 0xf8419dad, 0x564af452, 0xc56fe508, 0x5c228e07, 0x2d4bde9d,
7351 0xd3da5aef, 0x7fbd46c6, 0x836f051a, 0xb871b6de, 0x7a712fdf, 0xfdfb868b,
7352 0xe3178b6a, 0xb2bfee22, 0x82295deb, 0x1c43983b, 0xe7e6bfee, 0xdee13db4,
7353 0x09be7b32, 0xe9eceeee, 0x04fbf704, 0x7016ef9c, 0xa87816ad, 0x46acf016,
7354 0xa47e53b8, 0x3a44fbc8, 0xc47bd29d, 0x112bb7fb, 0x08ca901f, 0x7d878077,
7355 0x30c98854, 0xf179ba1e, 0x7412eecf, 0x1fc8dbab, 0xfcf2bb2a, 0x127b7708,
7356 0x05c3bb87, 0x06ba2078, 0x3cb17bb8, 0x5d54f044, 0x9f50ce1c, 0x15e441e3,
7357 0x7e267b84, 0xb800f8e7, 0x871f8df7, 0x058270f2, 0xe4d25ace, 0x23fb830b,
7358 0x124b7f7c, 0xbf0d1e7c, 0xafbf8d24, 0x6f77f06b, 0x88b571fa, 0xef16aeb7,
7359 0x511c2227, 0xe00879af, 0x4f0e34c3, 0xc8a47dfe, 0x164d28fb, 0xe0357ff6,
7360 0x161fcb01, 0x19c210fa, 0x73c51fd3, 0x56c93cfb, 0x38454fb9, 0xf2efe1f5,
7361 0x1b10a4b0, 0x6878cd98, 0x85a5fe2f, 0xc6f31798, 0x4ad7aff9, 0x44aeb23f,
7362 0x7de903bd, 0xdd6de918, 0xcf0daaab, 0x57a5e43f, 0xcb67ee59, 0x5e89fdb3,
7363 0x42407f82, 0xc13ee6bd, 0x5e916b87, 0x1edc7e68, 0xe0e8295e, 0xeefef16e,
7364 0xee7e823d, 0xa0fcfc17, 0x7e3e3741, 0x74cd643f, 0x9498c71e, 0x20ef1361,
7365 0x4e399846, 0xc0d7d130, 0xd9179834, 0xe94a5e36, 0x8ef64b9d, 0x7e36f89d,
7366 0x7d23f314, 0x6773be25, 0x9b43bf98, 0xa1f50fd7, 0xd9dde344, 0x39c4de89,
7367 0xa23d3174, 0x6520f788, 0xc4b64f6e, 0xdab5df7c, 0x7e81dfb7, 0x13e6de99,
7368 0xafa7f3ef, 0x6be2f184, 0xf54764dd, 0x59cde40d, 0x2d577908, 0xcb0c55d8,
7369 0xc1707cb9, 0xf44d0bbc, 0x5f8bdf11, 0x595d7547, 0xf64af480, 0xa93fa438,
7370 0xf844ea1d, 0xe8bdac02, 0xcd487abf, 0xc1fb87eb, 0xfdb18943, 0xb9e2b370,
7371 0x7593c4bf, 0xb09fc5a9, 0x3b53f54e, 0xde55a27d, 0x43fb13ac, 0xfe56a99f,
7372 0xcb83f630, 0xc59f7f44, 0x0f147e07, 0x6e729674, 0xa4cfc92a, 0x0fef636b,
7373 0xc216aad5, 0x47aa39f7, 0xe50ebe73, 0xee6f5c6b, 0x9d187721, 0x8c0d9c83,
7374 0x2ffe88d8, 0x3396be83, 0x8c42e72e, 0xbac693eb, 0x3ef4867e, 0x9d01f702,
7375 0x01f71ee8, 0x34c3cbcc, 0x5b949ba2, 0x587fe46c, 0x5eecf825, 0x046b5fc1,
7376 0x7c803d5f, 0x81df0235, 0x13fa51f6, 0x90eb4fc1, 0x12dd20ff, 0x78f5ce9f,
7377 0x6197bef1, 0x8c772cc7, 0xab1cf7a5, 0x0fda365d, 0x61ed7794, 0xfb05da17,
7378 0xf7e8ebc6, 0x7a59dd91, 0x59e58dc0, 0x43c03f0e, 0x91d2cc4a, 0x2f733e5e,
7379 0xe2abe8b8, 0xf4fd015b, 0x72a2b0ae, 0x949ea47f, 0x451fdec7, 0x9ef453a7,
7380 0xcb5faa80, 0x70fd3fd0, 0xe113a552, 0x8f3c70fc, 0xcfcdaad3, 0x3e03b826,
7381 0xe29bc5b6, 0x5f6752a5, 0x1f1ef5d5, 0x2f70ff76, 0x12ec12ef, 0x0c0d82f2,
7382 0xf92661b1, 0x7bde2b50, 0x1b10de64, 0xcb139269, 0xf432e787, 0x0f94f5eb,
7383 0xcdcbc8bd, 0x90ae5e5c, 0x434bcb62, 0x65e4377f, 0xd2315cb4, 0xb74d1795,
7384 0x5d54a7dc, 0x66f2463e, 0xc1ff6c64, 0xfcede3ef, 0xf3e66a1d, 0x2cf7a7e5,
7385 0xdefd7807, 0x83d42f0c, 0xf7c57f0c, 0x5a27ac62, 0xcab89e3e, 0xf40357d8,
7386 0xcd02d03e, 0xaff8f0fb, 0xfbad57dc, 0xd5b9e141, 0x9c140fa4, 0xa8b4a1cb,
7387 0x11f13a76, 0x9318d3c3, 0xfd7c7c9d, 0xdf883d0f, 0x7ce2b5e3, 0xc61abd7c,
7388 0x1b7da4b8, 0x0e607aef, 0xe3c175c0, 0xe38f9d32, 0x14d90d3d, 0xbcb2c2df,
7389 0xef1ba7a4, 0xdf0f1e23, 0x31c731ee, 0xe9d4fc14, 0x37bffd47, 0x1f582c7a,
7390 0x8d537fdb, 0x83bb44ff, 0x5da246f9, 0x675dfa01, 0x9fbff504, 0x18dde938,
7391 0x18da1f23, 0x8fc733ef, 0xf15be918, 0xdc21ced3, 0x33f78adf, 0xab9dd217,
7392 0xf4d79d0f, 0xdc7c17ce, 0xc733e863, 0x4547d273, 0x7dc0359c, 0xca7fc596,
7393 0x098f49cf, 0xf473187f, 0xca271e52, 0x7b94bdbd, 0xd3133c78, 0xd3ff9763,
7394 0x3d51a47e, 0xb821b4ec, 0xd3daf2fe, 0x2fa5deab, 0x6280f3d6, 0x60bdc711,
7395 0x79787c63, 0x2059be0c, 0x102f07ee, 0x7d065de7, 0xd0df7f15, 0x465d39b3,
7396 0xd4f4add3, 0x1fa74425, 0x5fc9541f, 0x87f4015b, 0xd4f4987a, 0x698f7a78,
7397 0x3d9713d9, 0xf9c00b78, 0x95324393, 0x10739d97, 0x87ffb65d, 0x3bfce28f,
7398 0xefd2ab7f, 0x70727c26, 0xb7ebc51a, 0xbb9ef78b, 0xedc5cef8, 0x5c5c1bda,
7399 0xbb9c14ae, 0x8bbbe897, 0x35f3c2ae, 0x7382dbe4, 0x565e900f, 0x4ebdef80,
7400 0x788f75c0, 0xe8229279, 0x1fb60277, 0xea1cbb92, 0x3e72b615, 0x15431361,
7401 0x10de8fe4, 0x0637bbef, 0xf2e0df3f, 0x0b45e25a, 0xff50d75b, 0x24c3f40c,
7402 0x02c85c53, 0x8507fbf1, 0xe584b878, 0x21a5887a, 0xd6f908df, 0x77d6ff4d,
7403 0xd69ddbb0, 0xc2e91a75, 0xb04e75ae, 0xebdd61d8, 0x73e72efc, 0xb6146fa1,
7404 0x7579f0e6, 0xe3e7e7ad, 0x7ba7ad63, 0x7da9131d, 0xf1ec627b, 0x1fe317ef,
7405 0x9bc22aab, 0xbc44ac5b, 0xbe105bb7, 0xd5f7c35d, 0xf627d60a, 0x2aeb4c91,
7406 0xc4b52dac, 0xe6d4152b, 0x857afbd3, 0xdbb5f3eb, 0x1753fb4c, 0x97fe425e,
7407 0xc6eb0d27, 0x2e6bfdcb, 0xaea8bc23, 0x7e913bbc, 0x7c553d8f, 0xec5e7bc7,
7408 0x84e9e397, 0x49531a16, 0x4f76eaf2, 0xf74dfbac, 0x56a9e347, 0x80ec09e0,
7409 0x0c9e132c, 0x3fb744fc, 0x8efcb9b6, 0xe21cf0f7, 0x509afe11, 0x0a2bf2ef,
7410 0xe1b1e97f, 0xd7a0a4f7, 0x040fa063, 0xdf7e082e, 0xf5cbc4b2, 0x6f813f0a,
7411 0x77c63e03, 0x08c2e7d0, 0x379127b7, 0x4e3fb193, 0x5b83e70f, 0x1e82f8f7,
7412 0xcf5ec526, 0x59eb5d6b, 0xc7a042ca, 0x3eb8d49c, 0xee7afbd1, 0x05c72162,
7413 0x4f8ba7ac, 0xfa7c2df3, 0x385b9ada, 0x9ffc0a9f, 0xd10f7fdc, 0xbc70b1f5,
7414 0x7a54e30f, 0x486bcf5b, 0xd062e307, 0x1b10b0c1, 0x8f7ffd95, 0xfe684e0e,
7415 0x3ee08f11, 0xee15fb02, 0xde4fc5d3, 0xbf3cc63f, 0xfd27e2b7, 0x9aa5f69e,
7416 0x0ea73b0b, 0xf41df64d, 0xfb277ed2, 0x434961aa, 0x633f815d, 0xa3cf12fb,
7417 0x6e9fa19f, 0xc6cfe245, 0x578bd2c4, 0xc72e0556, 0xaaea8bf3, 0x8fd1cba2,
7418 0x973d0aaa, 0xce9b9ea1, 0xd623177f, 0xcdcc7d7b, 0xaab2bbf1, 0x983fce92,
7419 0x94f4c423, 0xd80077ee, 0x47f24c89, 0x7eab2e2b, 0x1d01a9a6, 0x789adffd,
7420 0x025540a7, 0xd0b3d3ab, 0x1194945f, 0x1fefc132, 0xb2ee7e2e, 0x8ebf6d26,
7421 0xe8761ae7, 0x8e60fd1f, 0x8b59ca81, 0x6545ecff, 0x93c05f41, 0x1c731cf1,
7422 0x124bf06b, 0x46cf13f9, 0x5acf13f9, 0xf30491e6, 0x5b3b0afe, 0x1ce87871,
7423 0x8fc26152, 0x5f01e02c, 0x5bbb1f68, 0x1e5cebe7, 0x607d21ef, 0xb23645d5,
7424 0xff09d6eb, 0x2fd0cff4, 0xe851704d, 0xe0c301bc, 0xc096beb0, 0x73c4e1d7,
7425 0xaded190c, 0xf8dde508, 0x4f4c9762, 0x4f984a1f, 0xf3095e64, 0x1564597d,
7426 0x931d0fda, 0x3f20ef5a, 0xe69033a0, 0xd67ebc06, 0x84b0e5af, 0x817912e7,
7427 0xb5ce118b, 0x0bc32872, 0x77217ff5, 0xc1bd6066, 0x1f4ef450, 0xf7845e9e,
7428 0xf3a60212, 0x8eb421ce, 0x33dcbcee, 0x2552d17f, 0x6feffcea, 0x5fcb9b17,
7429 0xc62ffa71, 0xf93b5479, 0x1f4960fb, 0x57be7448, 0x94ee75dd, 0x64f2fb47,
7430 0xd123c737, 0x41d5d205, 0x559d37ae, 0xc87d09bc, 0xf3323d9f, 0x7c3ccb45,
7431 0xec22bc96, 0x53a03ad1, 0xe832a73c, 0xb7e29863, 0xaf0d1d21, 0x3c66ef81,
7432 0xfb77d0c6, 0xf079e8b8, 0x31b9fa98, 0xe897183f, 0xcb973e55, 0x7a28e3f7,
7433 0xf9f12dd8, 0xdced8a87, 0x1921646e, 0x20c73af1, 0xcf05653c, 0x8fe33227,
7434 0x8d77b5ec, 0x82b62773, 0x0b9e75e7, 0xb9cfc6de, 0xa733e7a3, 0x3c16eef9,
7435 0xdcd399ef, 0x7b9e3e6f, 0xf8ba29ce, 0xab774c43, 0x51e3fb9d, 0x2250fc5e,
7436 0xb7a6f67d, 0x21e3545e, 0x46e6f1dd, 0xae609f7a, 0x73bfef9b, 0xf88aa759,
7437 0xe35d300f, 0x5a6156e7, 0x27cc6ddf, 0xfa2a0df2, 0x84896e1d, 0x721ab86f,
7438 0xbe18beb7, 0xb9bdd51a, 0x425f3b07, 0xf41a05b4, 0x321b3a5c, 0x5ef935da,
7439 0xaede79e6, 0xf14e0e0b, 0x838a47fb, 0x6ebdd5d6, 0x58c1c107, 0x7c24d427,
7440 0xbc49c174, 0xa5c066cf, 0x37f1dd6b, 0xf8fe855f, 0x1cdce4de, 0x790fe8c7,
7441 0x579f3c9c, 0xc13e9c34, 0x0b939022, 0xb91ffedd, 0xb77afca1, 0xcb4c2eff,
7442 0x95839d1c, 0x5537c421, 0x0390af98, 0x1c00a517, 0xb8141a3e, 0xd1e11938,
7443 0xf482f7d2, 0x2e4ec3fe, 0x1ba70e0f, 0x1bab6d7a, 0xc8bd9be9, 0xf7e35af5,
7444 0x38ed5632, 0x008dff7e, 0xe55e8f9f, 0xcb95cdef, 0x22ee6bde, 0x62ccb2ff,
7445 0x7a4621d9, 0x1e0df858, 0x7bc4db76, 0xf39d7cd1, 0x79ef0e14, 0xcf74f18d,
7446 0xd952de6e, 0xbcfdbef2, 0x957e3ca5, 0xae632d29, 0x2b09d8b7, 0xecf75d04,
7447 0xd11afd07, 0x3a5fccfd, 0xd92dde99, 0xc893e9a9, 0xa738f1cf, 0xfd53f9b3,
7448 0x4ffdc632, 0x1f912d58, 0x6f51fc69, 0xe7e42b53, 0xc87d1387, 0x5ceff3ae,
7449 0x97ef899c, 0x3f70b454, 0x28bcaa67, 0x7d203fe3, 0xefdf3f68, 0xe108bf31,
7450 0x5d7bf2e4, 0x369af3a6, 0x474332b5, 0xe5d5be7a, 0x7f907947, 0xc45dffbd,
7451 0x30e7e1a7, 0x40e7ddf6, 0xce38c00f, 0x39bc5bfc, 0x0df91f48, 0x0ea53f4e,
7452 0x5c81c4a6, 0x039857cb, 0x298d54d3, 0x98e34c4e, 0xe5ecd303, 0x9daa7f42,
7453 0x2783fa45, 0xf7c34f27, 0x9f9bf3c4, 0x17db14fc, 0x927d912a, 0x9bf29e89,
7454 0xee82fd5f, 0x28f3f9c3, 0x5b5bf74e, 0x39dd8b34, 0xff9ac1ba, 0x9f359376,
7455 0x33e6b111, 0x03f35a0f, 0x7d266d70, 0x1e1eff73, 0x9a7a529f, 0x1e7defdf,
7456 0x3c22a060, 0x3e49d9b6, 0xce6d294e, 0xd38778c6, 0x586dbb4f, 0xdceffbbe,
7457 0xeadceeee, 0xf72577a4, 0xe2c717bd, 0x6a1df092, 0x3f2c46e7, 0x8d90d71d,
7458 0x4fa845fe, 0xbbb04b71, 0x71bb408e, 0xbd06a5e7, 0x69be2986, 0xfdf83fe7,
7459 0xf6adce94, 0x9c51c630, 0xd3e4f5de, 0xb7a79f48, 0xec7d200e, 0xc3642979,
7460 0x70f7437e, 0xf3884ffc, 0xe954e458, 0x7e3dab16, 0x1d01e842, 0xe879b527,
7461 0xd6b8ba17, 0xc24beeba, 0xa8a77cd6, 0x7d331b7f, 0x10f8c74f, 0xdc34aaef,
7462 0x7ec53767, 0xc173fdbf, 0xa53d4f17, 0x8b2b7419, 0x37991ef7, 0xe2befba5,
7463 0xdb73eeee, 0x8e800325, 0x4316114a, 0x4697bfba, 0x0f85db8d, 0x38927fd1,
7464 0xadfceb2f, 0x5539f04c, 0xef896455, 0xaafbd2e8, 0x4d53697c, 0xed4151fb,
7465 0xd27c94be, 0xdca5f757, 0xca67da66, 0xb9481eb6, 0xdb6bfa19, 0xebefd0a2,
7466 0xe279cd95, 0xf8490981, 0xf9c06e5d, 0xe7fa3962, 0xf25e1ada, 0x8bd03d60,
7467 0xbde39ac7, 0xa5c76b0a, 0xe9f1354d, 0x834ba5d7, 0x0e74ca9f, 0x5a72e79f,
7468 0x461ef172, 0x1dff2d69, 0x1b86d2be, 0xe11abbae, 0x4fdf9ebe, 0x9e5856cf,
7469 0xb653fc0c, 0x8fef86fd, 0xc7c1ef86, 0x3e70f9c6, 0x2d24f8d9, 0x3fadbbde,
7470 0xee76f743, 0x44ff71b5, 0x7b465c34, 0xfdef7e38, 0xe508ab81, 0xa2f7f412,
7471 0x3fb52c6d, 0xe47d0368, 0x6bd0e4c4, 0xd3954337, 0x570fe1ac, 0x95965c53,
7472 0x253e809e, 0x373ab7d4, 0xf48dbe4b, 0xb5f67975, 0x97fb5aa8, 0x943a3c51,
7473 0x8a37b4c7, 0xa27ed6c3, 0x47a57cf1, 0x68f77e32, 0xa25e99a4, 0x119df5eb,
7474 0x2ab7dfa2, 0xcd720a5b, 0x1d97efa4, 0xd878a1ad, 0x19c871e8, 0xc13b8a68,
7475 0x7c4bd1fd, 0x027a14ec, 0x22d91c93, 0xcf287c5e, 0x48a7bbd3, 0xa5104097,
7476 0x5ea9b297, 0x6cb5eb84, 0x4bcfa63a, 0x99640791, 0x33f203cb, 0x79278b6d,
7477 0x3eb7a6d0, 0xa3a473f1, 0x1e74d1fa, 0xefdc5fd6, 0xe846f36e, 0x77e358bd,
7478 0x9e74da71, 0x5276692f, 0x8fe9d53c, 0xcb979234, 0xeb138e30, 0xd9b4ed3f,
7479 0xbd3b5f40, 0x8c64efbd, 0xe06b6e0b, 0x6a9f8aef, 0xfb593be8, 0x9a37fd8a,
7480 0xf17d8def, 0xdf13fe08, 0x8bf8f54f, 0xacdfb83d, 0xa9d371e0, 0x2a332b7d,
7481 0x68c9e063, 0x6655a497, 0x79d2bda0, 0x91b7cbab, 0x0ae953eb, 0xc8d3ddf9,
7482 0xfc2f92af, 0x79e9f749, 0xbea07877, 0xe1faea1b, 0xe5073eff, 0xfc77e88d,
7483 0xa1ddf640, 0x1f3eed0f, 0xa015905f, 0x03f4e3fb, 0x7cfe3036, 0xa0144585,
7484 0xafb8f9b7, 0xc93ca18c, 0x25ebf9cf, 0xb05c238a, 0x7c1ebac6, 0x1fbcdae7,
7485 0x292fe116, 0xb0b8c50e, 0xd68b4a06, 0x718bcb5b, 0xbc50f0ff, 0x94cbc517,
7486 0x19cb59d4, 0xad1f908b, 0x7b4bfeac, 0xca7db82c, 0x6bf9f58c, 0xa3b9163c,
7487 0x50f9dc92, 0x95f5a3ce, 0xd20037a2, 0x1cfec49b, 0x6d2733bc, 0x4b1da401,
7488 0xc82da427, 0x7cee7bc4, 0x8ed3231f, 0x8fbf98f8, 0x45953a57, 0x7177f106,
7489 0xa58fee18, 0x346452cd, 0xe42c1de6, 0xe3bfcb19, 0x6eb820fb, 0x63313df3,
7490 0xf35eb8dd, 0xc726f677, 0x10cf71ab, 0x2f2e6bd7, 0xab287013, 0x3afc5bb7,
7491 0x90a5ea13, 0x7f78dbfb, 0x55da95a9, 0xb7697e34, 0x5ff62bf4, 0x1399b7d8,
7492 0x68a135f0, 0x798b8c83, 0x878e4ba8, 0x0f75892f, 0xdf80b0e5, 0xf4143743,
7493 0x107d7e43, 0x02fecff5, 0x9f2439c0, 0x45809f84, 0x5c5e301c, 0xca9e5766,
7494 0xfcf397b3, 0x8ae04f3e, 0xaf6081da, 0x873a01a9, 0xbde72f9a, 0x471bf78c,
7495 0x425e0626, 0xf9b7ccbc, 0xb7c42b07, 0x17e411fe, 0xf0e1ca5d, 0x4bcad8f0,
7496 0xc5d9632a, 0x933fbf02, 0x3e5ce81a, 0xa3ef8bb4, 0xd54eacee, 0x8bfef7ec,
7497 0xfb094790, 0x4f5ee95b, 0xee890ee7, 0x1d223f13, 0x8fb6fba1, 0x6865e95c,
7498 0x9e01a7c7, 0x223eee50, 0x5ef815b1, 0xace3565e, 0x9e212f45, 0x787ce2b3,
7499 0x38de5fde, 0xd1772e49, 0x15beb9fa, 0xcf01b95f, 0x8de75283, 0x0e748b1c,
7500 0x2d779eeb, 0xe3d0ff7c, 0xb9faf1a5, 0x96d3de38, 0x8f17d287, 0x16f3f1c2,
7501 0x387c84bd, 0xa1ee8e3a, 0xdcac02a7, 0x8d5d287d, 0xcb1a547a, 0x60fa87d8,
7502 0x58ef0cda, 0xe43fb9f4, 0xdb24e3e1, 0x50b379e4, 0xf3cb1bcf, 0xf92c7e7d,
7503 0xae111237, 0xed5271a5, 0x17ce3a6c, 0xe85ea3bf, 0xcb823f40, 0x9529ef84,
7504 0xea7e3819, 0x69269e50, 0x3c0f8a11, 0x99bde064, 0xd12de9c7, 0x25e9c919,
7505 0x454a4c5f, 0x1b50ee3b, 0xbf20d418, 0xec340d0e, 0xf48b88cc, 0x792361f0,
7506 0x2df7617d, 0x5ff7e0c9, 0xfa1b0692, 0xa1d7af0f, 0x513213fa, 0xf5c1beae,
7507 0x7e5c4ff1, 0xa65f57f2, 0x4fbf8ec5, 0x0a78e048, 0x61638b9e, 0x3838ff93,
7508 0x13d233fb, 0x2c3ce783, 0xf027da6c, 0x1c734dbd, 0x7ed15977, 0x72841dfa,
7509 0x01f742d6, 0x71ac1bca, 0xc5c597e7, 0xf3a0d71e, 0x0b1b39e0, 0x1e3225f5,
7510 0x21d7f688, 0xc2d573a9, 0x4b17ba24, 0x73c13be7, 0xc6990b1a, 0x63eb9e0f,
7511 0x33cd77cd, 0xaee9fa85, 0x9af5acc7, 0x2c7aa73e, 0xe383d5a7, 0xb4adebb4,
7512 0x29cf048f, 0x6fd8ced4, 0x90b6c23a, 0xeedcfc0a, 0xe21de5e5, 0x6fa8cf3c,
7513 0x5b3ed7f4, 0xf8def713, 0x556de8bb, 0x2e007820, 0x219f368f, 0xf359747f,
7514 0x418b823e, 0x89f0dd0f, 0x7c132167, 0x225baa52, 0x69ede036, 0x7bb86e0f,
7515 0xc990d814, 0x871f05fb, 0x9feddd36, 0xbbf8e508, 0x8ebe260f, 0x73e2eacf,
7516 0xd90f3312, 0x42172e64, 0x9d4f7775, 0xfa8bca68, 0x9b43ed5d, 0x340a98af,
7517 0xb78a3595, 0x27c1e6bf, 0x4e4e595e, 0xdf111a8b, 0xcf3839df, 0xa23bca6d,
7518 0x8fc82ef2, 0xa8f5e536, 0xf2a8a4f2, 0x40fca8b4, 0x1dcdbf5e, 0x40fb2c19,
7519 0xd4f83fde, 0x9efbf815, 0x7322fd6d, 0x358f05f1, 0xf02bb6f2, 0xb3cb7cf7,
7520 0x56d3eff8, 0xc93e4b34, 0xba2b3f24, 0xb55bf3ce, 0x0e10a3f9, 0x1ca32f2d,
7521 0x74926b28, 0x0d5debd4, 0xc79423db, 0xbb535e76, 0x963f6e06, 0x76a11c35,
7522 0xd23ff6bd, 0xef7c7c46, 0xdea9f7c8, 0xd89fcef9, 0x5befeb0c, 0x751e76f5,
7523 0x4e2c0a44, 0x7f7eee48, 0xdbfb6dbd, 0x0a2fbfdd, 0xf9fbdbdf, 0x8d1c900f,
7524 0xc41e07ba, 0xf9bab8f9, 0xbde380c4, 0x7bd2cf23, 0xdd1c7fb4, 0x03aa16fc,
7525 0x2cce4bf1, 0x9fdda053, 0x438f8fcb, 0xb4df0b7d, 0x67e37dc5, 0xdc12f852,
7526 0x81651e8f, 0x5bdc704b, 0xc3ef87cb, 0xac384c9f, 0xef863eb6, 0xf0786f95,
7527 0x98142be5, 0xeb7761df, 0xb709fc20, 0xf06f094d, 0x7f2b727c, 0x1dff4551,
7528 0xa0f0e7e1, 0xc83641d6, 0xa6c0993f, 0xeb787e53, 0x3d7f9863, 0x3faf04e1,
7529 0xac9075ba, 0xf27209a3, 0xdf90a98a, 0xf7e6c7ac, 0x37ae04da, 0x369bf31b,
7530 0x8453ffdc, 0xfbe32b0b, 0x76335e0d, 0x5b9d3c80, 0x66db6a72, 0x1fdcc780,
7531 0xdb9c93c5, 0x55dd76dc, 0x50870479, 0xa611c61e, 0x7ed3780a, 0x215d7248,
7532 0xee1fa27d, 0xf1ba7d81, 0xe2dc1ee9, 0xd2e2fda5, 0x37a8edca, 0x451dcea4,
7533 0xc7a145fb, 0xddc9e92f, 0x52193869, 0x3ae92fa8, 0x8db2eb97, 0xef5223e2,
7534 0xf51e9372, 0x033df8a0, 0x0fa23be0, 0x36cbc097, 0x096d9eb1, 0x80f6bfdc,
7535 0xf3f51a67, 0xc47fe49e, 0x42ca6321, 0xc5a7f24e, 0xf372be91, 0x202b9006,
7536 0x7989d7d7, 0x097b5baf, 0x466e29f9, 0xfc28f13f, 0x67d7efee, 0xbffeb754,
7537 0xaef2032e, 0xdd6ebb6e, 0xf33f7f2c, 0x0dbaf6b9, 0x5b90dcbc, 0x7b79d2eb,
7538 0xad4abf63, 0x3ea4e3e6, 0x5c46c978, 0x28c2bc47, 0xece17b7e, 0xd1971b11,
7539 0xad2d7ffe, 0xfdfdf99f, 0x5a3f0ed0, 0x7a86c43c, 0xc29f81a9, 0x1257fee1,
7540 0x89373d60, 0xf035efdf, 0xb74f8c64, 0x907f51e2, 0x3b407f41, 0xeb403135,
7541 0x0c627d07, 0xfae06e0f, 0x3316d204, 0xad2997c1, 0xfffbf0e3, 0xfdb53820,
7542 0x4ff4e02b, 0xc947779f, 0x0c379021, 0x7a5f2ffb, 0xedff72dc, 0x23d1013f,
7543 0x8000702a, 0x00008000, 0x00088b1f, 0x00000000, 0x7dc5ff00, 0xd554780b,
7544 0x733ef0b5, 0x9992bcce, 0x924c2664, 0x84e3c849, 0x71100840, 0xf0444312,
7545 0x51888431, 0xd4503b69, 0x20717ad8, 0x9926023c, 0x4b62d5a8, 0x79120cff,
7546 0x22341809, 0x0281c150, 0x06f55bc5, 0x701a8c45, 0xaf7a8a44, 0xb7ad8ef6,
7547 0xff7f6c57, 0x4a8f8808, 0xd2f5a232, 0x5ad7fd97, 0xce64ef7b, 0xb6b4a924,
7548 0xdc3ef9bd, 0xd9cfb3ee, 0xd7b5ed7b, 0xf6b5af6b, 0x4cf5a61e, 0xd8c05c0a,
7549 0xce6a2566, 0x7c2c64ae, 0x61edf148, 0x67cf07f0, 0xf7fb193b, 0x95d5a0b4,
7550 0xf19fd8c9, 0xe6c60aef, 0x2729bf7e, 0x8ded0658, 0x61cb1823, 0xcfbbf52c,
7551 0xd500ded4, 0x7a3f4bb9, 0x3f7c0f7c, 0x8ca97bf7, 0x43ef03e9, 0xf7c18c8f,
7552 0x5b6dbcef, 0xd2842ecf, 0x793519d2, 0xf986bca0, 0xef7bc056, 0x27435898,
7553 0xbe0ef7f4, 0x5563097a, 0x35e5bbdf, 0xdbb19136, 0x93632a5d, 0xf8ab5b18,
7554 0x258a9873, 0xbbe0db0b, 0x644b2cf0, 0x7d63114f, 0x0cd85311, 0x23b875fd,
7555 0xb8c1175b, 0xf995d71d, 0x1f5fd0c2, 0xef867e63, 0xf7a54b2d, 0x4c3ddc3a,
7556 0x744bf6c3, 0x0ec24017, 0x19faa17e, 0x5a37e3d4, 0x7814bb22, 0x76c2ce5e,
7557 0x3e325f6c, 0xf3fa8612, 0x7f7d0e30, 0x0f644a63, 0x8f82cfb6, 0xa371dea0,
7558 0xfe861237, 0x47622cec, 0xfa763a78, 0x8c1c3273, 0x05acaae5, 0x8228efe1,
7559 0x2b59943a, 0x0701cdd9, 0x713fcfe2, 0x0f007396, 0x6899775f, 0x3d95a93e,
7560 0xf437ff4f, 0x7ddbd6c7, 0xe1b0a063, 0xcf6f58ab, 0x3b997826, 0x66f88558,
7561 0xb803fc1a, 0x89c81fea, 0xcce7c3ac, 0xb1eb8557, 0x479fe9da, 0x5520fff0,
7562 0xb61ff847, 0x0ab635b3, 0x66d61528, 0x0bfc00cb, 0x43fb5878, 0x37630c00,
7563 0x978000e3, 0xd670d7ff, 0x2bf3c3a9, 0x07ad0a5d, 0x556df9fc, 0xbc67cd8c,
7564 0xd4f2fe7d, 0x58899577, 0x1a6b51aa, 0xa5735b3c, 0xef46c7bf, 0xe28f3fb1,
7565 0x0bfa0da5, 0x25b7f132, 0x09ba44ee, 0xd86977e2, 0xba9defff, 0xfdf0eb03,
7566 0xf8765c44, 0xfbe074be, 0xf9a3173a, 0xfc3955cf, 0x475535ac, 0xc8fc4afc,
7567 0xd7c24eb2, 0x713f90fe, 0x724e393c, 0xfcbaf7bf, 0x00be2237, 0x0f74d1ef,
7568 0x75a545e2, 0x63d7864d, 0x43b06f89, 0xd556dcfb, 0x33e0377d, 0xf349ccb8,
7569 0x9cdef095, 0x158cbf1d, 0x74ffee0f, 0x8695736a, 0xe9c65ff3, 0x02b72d9d,
7570 0x62f112e2, 0x5d03a819, 0x63f1642c, 0xe7886526, 0x8445f45a, 0xc247517f,
7571 0x2fdff4f7, 0x49ef89ac, 0x92ba617e, 0x2ba0bf04, 0xdd70d15d, 0x375f0a82,
7572 0x373e258b, 0x6e183650, 0x82d5cf89, 0x245d24ee, 0xe2357be3, 0x7c60d27b,
7573 0xf93d2c7b, 0x99706fd8, 0xdc94f095, 0xfa11633f, 0xf03b21ee, 0x16ddd00f,
7574 0xdd7a2145, 0x646a5772, 0x3da7f225, 0x19f117be, 0xad157c3a, 0x1492ef77,
7575 0xdb2bc19d, 0x9441302c, 0x9c9d8733, 0x4a7a4b8f, 0x617a9f90, 0x9f587ece,
7576 0x9dd5d7de, 0xc1024561, 0xeaebf358, 0xdeffa42e, 0xfde6af67, 0x19d548ac,
7577 0x618843d4, 0xfe143718, 0xbc032b43, 0x2cc5349e, 0xe0175e34, 0xff09c257,
7578 0x435fe17a, 0xe8bc80c5, 0xbf1c06c3, 0x9807cb8b, 0xe71a12e1, 0x1d6c29db,
7579 0x526cdb8c, 0x6f6826fc, 0xb23e3a5e, 0x4361c392, 0x20146a3e, 0x9b589b35,
7580 0xf7c03152, 0x2513a6cd, 0x36f195b7, 0x85bbde0d, 0xf78175f1, 0x5f002a8e,
7581 0x4c7d6da3, 0xfa45ba45, 0xd8a5f687, 0xff80345e, 0xf9bff5e6, 0x7cdfc213,
7582 0x8d1748c0, 0xb1e7198f, 0x8a9e9134, 0xb524e806, 0xd589e392, 0x8018c8b0,
7583 0xa9ea29d7, 0x8a88b1b5, 0xcd565a78, 0x66e9024e, 0x8199e91e, 0xecace3f4,
7584 0x0ca1f364, 0x11fcc07d, 0xf74a7b80, 0xc24697ce, 0x58daeefb, 0xb4374e3e,
7585 0x4e8bb6ec, 0xbeb0345d, 0xba4bce12, 0x41cca937, 0x0077d1e3, 0x83bf7f8a,
7586 0xfb371bde, 0x6ef2c482, 0xa4d32efa, 0xe0f6bd12, 0xcd1be423, 0x38c0a39f,
7587 0x328c979b, 0x82a67ae1, 0xbcb9437c, 0xaeec7db0, 0x7f678415, 0x07b7ca09,
7588 0x09ce80d3, 0x942abe9f, 0xeaeea52f, 0xbfa0bb5f, 0xffd5dca7, 0x138e258d,
7589 0x47f4e270, 0xa648be90, 0x23bd64e7, 0x6e2ecbdf, 0x0c716f29, 0x17f01eff,
7590 0x35be2de1, 0x4d0fcb9d, 0xffa2faa1, 0x475cef30, 0x374469f0, 0x222f6db7,
7591 0xdac0dc79, 0x591ade89, 0xbbf482c4, 0x69c2c6c8, 0xe08b1740, 0x172874b5,
7592 0x3d32b16f, 0x4496fd61, 0x2146f58c, 0x31616e0f, 0x7d96fefa, 0x2c35ed49,
7593 0x26f684ea, 0x62a68b1b, 0x6f6c69d9, 0xef417166, 0x3e26b67f, 0xbe7c1d67,
7594 0x77758b37, 0x20d444d7, 0x1dab7bcc, 0xbe065774, 0x33eb4ed0, 0x5a4ef965,
7595 0x7f0af4cf, 0x4fa83dd1, 0x76fb355e, 0x27bedd01, 0xe7e24bd6, 0xbbf5575e,
7596 0xd514f788, 0xdf8ff344, 0x9cfc2563, 0xeb8dbd02, 0xdd9b9f7f, 0xdeca1b3c,
7597 0x7a3bdd56, 0x55c9a234, 0x1839db30, 0xb39eebcf, 0xb8dd2037, 0xb7c226dd,
7598 0x65cc7e7c, 0xddd57aa6, 0x522bff02, 0x088abb23, 0x9e9113dd, 0x7d4946aa,
7599 0x82ce26ca, 0x5666bbfa, 0xe6f509d7, 0xec411deb, 0x07ed07af, 0xb9b817a8,
7600 0x5b7028de, 0x2eb27e68, 0x06e92be7, 0x52fea1c6, 0x84a5e22e, 0xc85b8c63,
7601 0x7f89b641, 0xe6eff427, 0x493b2925, 0xafd3f6ff, 0x96fd1189, 0xd7882c05,
7602 0x795c84e7, 0x3695ca4e, 0x9a2b972b, 0xa832ee6b, 0x9941f73f, 0x95e01d6f,
7603 0x83de8295, 0x4a3f1bef, 0x5e9e91d1, 0xef5fe8f9, 0x9fb419fd, 0x5ba2c0fd,
7604 0xd2017da1, 0x73dbac18, 0x6047970a, 0x8fd4307f, 0x38f6c08d, 0xb1c1e36e,
7605 0xb41c7f64, 0xc846fb08, 0xe0b4c6cf, 0x4fd085d6, 0x3e9993e3, 0xbcf664a0,
7606 0x5ee8f239, 0xf7643f6c, 0x1b7e81ed, 0x1b5e3853, 0xdf491b9f, 0x4e0f613f,
7607 0x733cc377, 0x3c9f91ad, 0x05e37281, 0x677bd92b, 0xc2117459, 0xaed3b67f,
7608 0x70277be0, 0x4250e95e, 0xeaf3829b, 0x043d9276, 0x10b39a7c, 0x36b93bbe,
7609 0xe04bcf9b, 0x0986e4e9, 0xcd9b17c4, 0xb3f0bc7c, 0xc27fbd0a, 0x0391981c,
7610 0x974f13f5, 0x534056fb, 0xb512c05f, 0xee873d00, 0xbd5e76e3, 0x7881df49,
7611 0x09538762, 0xa11eb95e, 0x62678b8d, 0xf2e9687b, 0x1c7ca3af, 0xde51cf8e,
7612 0xd9b904b3, 0xc805e2cb, 0x461adb4f, 0x9f514675, 0x91f38f74, 0x585e655a,
7613 0x171ba07c, 0x9994f77f, 0xc87e35e3, 0xbe7cf44c, 0xb57ce3fd, 0x707fae2a,
7614 0x65c8109c, 0xe48ff926, 0x1d5d4272, 0xfec8ceaa, 0x2d973d0c, 0xfb633aec,
7615 0x1de0ceeb, 0xe6bfa06e, 0x9de7fffb, 0x38df8465, 0x9ed645c9, 0xca797c49,
7616 0x748b9fec, 0x5a89aeeb, 0xf3e827e6, 0xeaaf820d, 0x63fec2ad, 0x1f224b51,
7617 0x6aaaf6ca, 0x72cbdd23, 0x677fa0bd, 0xc1f7cb8c, 0x1fc126ed, 0x1ea2b4df,
7618 0x6641c29b, 0x1c47a885, 0xfd4ebfd8, 0x6a20f94f, 0xe17a87a9, 0x9165a8f2,
7619 0x004f9128, 0xcc1b51df, 0x2756d4fb, 0x03406fe7, 0x3268b3f6, 0x48b97d23,
7620 0x02b5fb05, 0x3d5deb9f, 0x9fa72eb0, 0xfafa7376, 0xf0056023, 0xf7898f3d,
7621 0x82ef60ac, 0x4da67b1c, 0x607ee289, 0x2eeb16de, 0xb5f2117b, 0x7ae2755f,
7622 0x8e48576e, 0x569b6bcd, 0x4bea15b2, 0xeb405c0f, 0xd399369f, 0x9b88d2e5,
7623 0x2114e2f4, 0x11adeb1f, 0x3fdfd90b, 0x01f21851, 0x74764ff4, 0x53947c23,
7624 0x280f1831, 0x10f40dd7, 0x5d83a849, 0xcb93a534, 0x9cf20655, 0x524bd825,
7625 0x671ca3de, 0x919ff649, 0x1f52c23e, 0xf4c7b971, 0x527b946c, 0x0aebdf2e,
7626 0xae49b974, 0xf5c6ce8d, 0x72e4f585, 0x7842bf73, 0xa42d626d, 0xe81ea44f,
7627 0x91e8571f, 0xeb986ad3, 0x2a26eb2b, 0xd117775f, 0x27594b78, 0x57a913e9,
7628 0xd783a386, 0x7e0e84bf, 0xed007486, 0xe8b01f8d, 0xe35e3065, 0x9a6d1672,
7629 0x44e74bc8, 0x4f5c8fd2, 0xc49eb8da, 0xf43ce532, 0x4c7eb265, 0x7ac987d6,
7630 0xf5c2db30, 0x69675c9d, 0xe74f64cf, 0xe594c076, 0xfcc19511, 0x3ff9a636,
7631 0x60349cce, 0xb2de84d7, 0xb10bf4d9, 0xe0a3601e, 0xd369c5bd, 0xf686ca6e,
7632 0xc8fcc690, 0x9780a957, 0xbb7cf09d, 0xb36b7bb0, 0x2d7bdd39, 0x5acd7e9c,
7633 0x703b9580, 0xcfb4625d, 0x1732678d, 0xe7c4a3d2, 0x577c2776, 0xfd71df81,
7634 0x8dbdffd4, 0x7c24a5b5, 0x9d9cfd5f, 0xcfe7eae4, 0xb256233a, 0x6e858247,
7635 0x57eb2fe8, 0x7b53b256, 0x3e92739f, 0xd0fa15ed, 0xd128f683, 0x5fae2acb,
7636 0x21275d71, 0x648f5535, 0x35cafb48, 0x4a045123, 0xcdc9acfb, 0xf6c1aced,
7637 0x8a2f6890, 0xcae9cf5d, 0xcfccfb4a, 0x62773ddd, 0x6861e01d, 0x588fff9f,
7638 0xe981d0e7, 0xe787dfe5, 0xc7c380a1, 0x472c1fb1, 0xdfaab57a, 0xf406deb9,
7639 0x1e5d4335, 0xd1e60bbf, 0xa170ef94, 0xfc29ab9e, 0x846f2ff5, 0xcc0787fa,
7640 0xbceb8acc, 0x1b1d7a67, 0x5dfcbc35, 0xe89f3112, 0x5b97e049, 0x4deb19f6,
7641 0xa87ac69d, 0xc82f58cb, 0x4f4e7a70, 0xfbe1d920, 0xd5b5d033, 0x4ec1f2da,
7642 0xbcfad780, 0xa7d1f495, 0x067160ee, 0xfc535bca, 0x5ad9e218, 0xf444f1f8,
7643 0x3fba846f, 0x02b4b051, 0x38cac4ed, 0x3faf91fe, 0x742bcfb7, 0x01b7810d,
7644 0x899b31fc, 0x3ad60cf0, 0x85ce492f, 0x2c789f04, 0x845f0ffe, 0x9d9a2ff9,
7645 0x9e9bbae2, 0xaa4e67f8, 0x60927b42, 0x572da164, 0x2dfb887f, 0xae096f78,
7646 0xf059e9ff, 0xb0d5c01e, 0x46c3eb85, 0xbe434b16, 0xd3bb066d, 0x477c4b06,
7647 0x5b875f06, 0x5155e2da, 0x8c8edff8, 0xa70871da, 0x802d27f6, 0xfb1ab1f4,
7648 0xaf93b04d, 0xe07ae0cd, 0xd7767d96, 0xdd1e0329, 0x2ba87a86, 0x912a75c7,
7649 0x61fc84ff, 0xb8968a79, 0x09577a1f, 0x6bf88b5e, 0xa658f5b2, 0xfc57f8c1,
7650 0xf79233e9, 0xa7cd978b, 0x5d80c47d, 0xb4f9256d, 0x3d20aef8, 0xdf2b697f,
7651 0x6ade9e17, 0xa7ef11d7, 0xe3fdf3b7, 0xc4473ce2, 0x857bff06, 0x8bdbdb9b,
7652 0x19453be1, 0xbc64c78c, 0x55f0ffbd, 0xf7a3a45e, 0xdc2f1f19, 0xf78fedc9,
7653 0x62af805d, 0xf7f60efe, 0xefd8177e, 0xaaf9e20a, 0x2e2e510f, 0xd0faaede,
7654 0x9c87604e, 0xbc598fe4, 0x0b71cafd, 0xa7dfd81d, 0x5fa1a623, 0xe895c768,
7655 0x02f7c289, 0x89d7ee11, 0xb5cf015d, 0x1d93171d, 0x95bb7477, 0xedb6e9c3,
7656 0xf15c79c5, 0x4af89527, 0xda20b133, 0xff161dc7, 0xfd67e438, 0x70333de1,
7657 0x959fde5d, 0x1ff7a26b, 0xf10b9857, 0x85965ee1, 0x5a2b17cf, 0x61b7f900,
7658 0x899992cb, 0x866a4ef6, 0xad35eb4a, 0x8f567970, 0x7ae9f883, 0xdb4da3d4,
7659 0xfc707f81, 0xf2ff6fd9, 0x3f224f46, 0x4cc55edd, 0xc3cbf609, 0xc27a235f,
7660 0x6be028bf, 0x57d7c0b1, 0xaa6b2be5, 0x12968be4, 0xef8ba394, 0x0d71296e,
7661 0xf3f45761, 0x0f9cc3c5, 0xb850cbef, 0xc32f20ff, 0x6e18cfb0, 0x3528e65f,
7662 0xf9b15e91, 0x940f7f98, 0xc62db0d9, 0x0c81f7fd, 0x640fda8d, 0xfb5f7b70,
7663 0x5efb6ddd, 0xcd4d7987, 0x80cf6e08, 0x97f3217a, 0x71ebbae3, 0xb1983557,
7664 0xbbb26288, 0x6e56c3d8, 0x8edc6ac7, 0xf6c99cde, 0x8fd84bae, 0x997f6277,
7665 0x62f61724, 0xffc7bd3f, 0xdaf10c78, 0x44f1f05c, 0xe7420fb4, 0x1fa0b33e,
7666 0x90add1cd, 0x02f8773c, 0xd425e90c, 0x282d8b3d, 0x21c3901b, 0xc913d71f,
7667 0x0653faf3, 0x3c84efdf, 0xfde7ea71, 0x3b7f9c11, 0xb73e9cdc, 0x3f214b2d,
7668 0xc44f36e4, 0xb5ff408e, 0xa5ed2a7c, 0x67efc225, 0x5f94fddb, 0x288efa45,
7669 0xd75831ae, 0x35f47f39, 0x30a88dcc, 0x8bbb87ce, 0x77d9dfc9, 0x854f9a60,
7670 0x1feec736, 0x788519ad, 0xf0fb32ea, 0x27af877d, 0xe1f7e70d, 0x386993ee,
7671 0x2add86bf, 0xf221bbcd, 0xb2c2d649, 0x33f0b901, 0xca3af825, 0x1c52e601,
7672 0x0f94be38, 0x34feee1f, 0xfb83816b, 0x567f480b, 0xa7978d0e, 0x8e7ed3dc,
7673 0x39715fdf, 0x1e8f975f, 0xee5046b7, 0xfd07647d, 0x3f6f2096, 0x777d7272,
7674 0xefee432a, 0xdf500b3a, 0x2a6fd7f4, 0xf89ca135, 0xdfcf8b8e, 0x402ce963,
7675 0x628dfc7e, 0x1ae967ec, 0x6c808b13, 0x5006b25f, 0xa3e8f203, 0x40299f47,
7676 0x9ee1ff79, 0x27e60a67, 0x9dfc97c0, 0x78e57b2c, 0xfd266fc2, 0x344b1ea8,
7677 0xef9bc70f, 0xe57f72b3, 0xf9547e30, 0xfdc2db3e, 0xab3e7da1, 0xbf28748e,
7678 0xf1486beb, 0xc7db7da3, 0xe6ff246c, 0xacbf0b77, 0x83da3fdf, 0x7df918fb,
7679 0x1e15ff52, 0x974a4f4e, 0xd483fe42, 0xe3c938b2, 0x7bde59bf, 0xe4133d60,
7680 0xbff3ac3d, 0xd9345f21, 0x3246c7e2, 0xe20b0fa2, 0xd0ecd2cd, 0xad653f50,
7681 0xbf15f4e4, 0x2afb44c3, 0x81d7ae4b, 0x928aecf2, 0x30133694, 0x6d2527a2,
7682 0xf201c622, 0xfde94b73, 0xfba73570, 0x7f231670, 0x516b0e5b, 0xb8bb5e48,
7683 0x326f3edf, 0xea83ad73, 0x9edc11ac, 0x16df32f1, 0x5dd698b5, 0xc490ff41,
7684 0x480bd487, 0x3f1f283f, 0x3f446c52, 0x7642b74a, 0x9cea6aa7, 0x470efd8b,
7685 0xc847134f, 0xa7a73ffd, 0x893ffafe, 0x188f269e, 0x3a829e8e, 0x36d793d1,
7686 0x3f093d34, 0xcfbf79f1, 0xbfdc01c2, 0xdd7c0b66, 0xfc4ee427, 0x9bf49b0e,
7687 0x99df382b, 0x3699bfa2, 0xfd455447, 0x9c7f33e1, 0x187dffe8, 0x27dc5fec,
7688 0x0efda0e5, 0xf395c8e5, 0x16375a74, 0x417f41eb, 0xd236c5ea, 0x629af78f,
7689 0x64af6845, 0x8fd96f8f, 0xb73d9174, 0xed2562ac, 0xa8dcf2ff, 0x92b7500f,
7690 0x7559741f, 0x0488d4e0, 0xdf10e17b, 0xe5df34cf, 0xbbd3e7a7, 0x1a107db9,
7691 0x387b216d, 0x7184a5d4, 0x96039b9d, 0x6b41da08, 0x095fee15, 0x3cebb06f,
7692 0xa0afa3ee, 0x740fcfb8, 0x488a171e, 0x8ecf6fff, 0x35bd23ef, 0x91efc838,
7693 0xf83a3f1c, 0x1fc7ca85, 0x8efc68c3, 0xeaaf1e72, 0xfee75ab8, 0x1d7eb115,
7694 0x6e39fcb3, 0x18d607b4, 0x85c659f9, 0x18809cfa, 0x7afe6f18, 0xae43ad3b,
7695 0xd2ccf1ca, 0x0cff5c6d, 0x67e40b96, 0x162c9ace, 0xfa6fc446, 0x05241cf9,
7696 0xbb4573d6, 0xcb39378c, 0x79684502, 0xb7e9bbbf, 0xbd00a4af, 0x8e9fa166,
7697 0x68c2ca6f, 0x987f93f7, 0xfc7dc9d7, 0xc90009a0, 0x5cffd6c5, 0x42697357,
7698 0xf03fbc5d, 0x6b6bdcfd, 0xf6ef48f2, 0xa0d823b7, 0x6fdd658f, 0x351e31d7,
7699 0xbd81aed0, 0xf852eb6b, 0xb5c761f7, 0x3c068e57, 0xfffc7228, 0x7f47eb5c,
7700 0xc6199da1, 0x4b4f844b, 0xfd0cdfea, 0x7ef9743b, 0x784af6bc, 0x590ac1e1,
7701 0x1fad66bf, 0x6ccfbbe0, 0x2a508fec, 0x1c8ac7be, 0x6dacd6ef, 0x0de7d6eb,
7702 0x276005d8, 0x39911aec, 0x7eac1f60, 0x85fb667b, 0xebaa5630, 0x5dea0b53,
7703 0x1e43e7a9, 0x648fec85, 0xe4203d7e, 0x572cdfc3, 0xf47641f5, 0x57241181,
7704 0x4b20667b, 0xe483fec2, 0x80796876, 0xf6073da1, 0xdbc21748, 0xd3e3fc7b,
7705 0xef7b422f, 0x1b1fdfec, 0xb77be3a9, 0x37bb45ce, 0xba234e74, 0x2353ed0d,
7706 0x4dadd00a, 0x71e80bf0, 0x7a480b8a, 0x7412ea5a, 0x8c330eea, 0x521c7473,
7707 0xbe898526, 0x83ae0a5a, 0xf8f7ccb5, 0xe438425f, 0xde7932be, 0xf7c11ebf,
7708 0xead2a10f, 0xffd825ad, 0x9da1856e, 0x44f4aeb0, 0x37da02d6, 0x30b59bbd,
7709 0x5d25bbe1, 0x973e120f, 0x890f33ec, 0xe08f5fc7, 0x67e6de71, 0xdca3f69f,
7710 0x90a228f8, 0x22d0684c, 0xbd40a76b, 0x9684c1a1, 0xcc8cab20, 0x1ce291bb,
7711 0x06361675, 0xed0477e6, 0xdf638426, 0x7053c337, 0x814ff0de, 0x8b02db47,
7712 0xab6e9f48, 0x4e2839b3, 0x56ff3a54, 0xc52b83c2, 0x5758788f, 0xe3839d5a,
7713 0xe19acf34, 0xd808f8a2, 0x7cded871, 0x2fc8b7d7, 0xd75ae124, 0x3b45ae65,
7714 0xb9ec0aa7, 0xfcee00a7, 0x7d6a6b8c, 0xd523c7c0, 0x3bb7e5fd, 0xb43e5e30,
7715 0x266eff1c, 0x25368ba7, 0x2546fe10, 0xa25941f9, 0x8bb0b35f, 0x8d9f8ddb,
7716 0x2be218b0, 0xf6e08d9f, 0xd8e1a5ec, 0xc39f2474, 0xda2a4f5a, 0xffe621d3,
7717 0x2ccff704, 0xd0f7d0e0, 0xe479713a, 0x3fc9d569, 0xdcf4f366, 0x5fb6217b,
7718 0x85fed1aa, 0xe00f3d69, 0x3d6bbdb8, 0xf04c75be, 0x2aefd601, 0xbd4f7da3,
7719 0x3278a827, 0x7d70bcf9, 0xaabd9f7b, 0xd288fd1c, 0xa8fb5aee, 0x5ae6f49d,
7720 0x2d7f7ea7, 0x69dfd3ca, 0x16c01f3c, 0x7e874d8f, 0x833efe96, 0x8f6b5dc6,
7721 0x0ff5c5ac, 0xbda954ef, 0x607411d8, 0xb9be4bbf, 0x2bd22265, 0x504a4473,
7722 0xed3d9a8f, 0xb618e90c, 0xb12fe42b, 0xe30c0279, 0xf3c3d3c4, 0x45f50534,
7723 0x1d333d92, 0x5fb455fd, 0xb6bf90f1, 0x18c7f05a, 0x36d382a0, 0x3fb68562,
7724 0x6fb0188f, 0x1ce3f95e, 0xbb4a1f0d, 0xfee364c7, 0x14ba9af3, 0x5b2df686,
7725 0x42663f15, 0xc627bd7f, 0xea6e0ed0, 0xa69c6854, 0xb82d27d2, 0x93a5b96f,
7726 0xec4877f3, 0x057f0033, 0xf18c5768, 0xa07b0aa4, 0x5839fb8d, 0xc448d8ec,
7727 0x3d7c63f3, 0x12f78319, 0xad8cabfc, 0xf440f2e0, 0x86711167, 0x0257e126,
7728 0x3eed484d, 0xef5bb48f, 0xf3b7fd16, 0x59bb8c52, 0xc455f989, 0xf062b96b,
7729 0x2af2cb87, 0x91fa7df1, 0xdfe40cf8, 0xfa17d038, 0xb32ab697, 0xcc29fd6e,
7730 0xf1a4eb6f, 0xbcc1343e, 0x056a4e40, 0x0452073e, 0x7d7657bc, 0x86e90332,
7731 0xd7e232d5, 0x6a69aee6, 0x6fc78393, 0x4ec85ed0, 0xed89d96d, 0x929737d9,
7732 0xc8f8c67e, 0x35fe786c, 0x1cb3e70f, 0x79d7f707, 0x61170eef, 0x48fd33bc,
7733 0xe29fd6e0, 0x90a417f8, 0xd61b35bf, 0xe54199c6, 0x796ff41a, 0xa88bf959,
7734 0xf533bd7f, 0xc647840a, 0x382e30f5, 0x38e48cab, 0x8a7c33d5, 0x3794177f,
7735 0x0e34dc78, 0x116aefec, 0x711e7c5e, 0xd119c40c, 0x62e3876f, 0xdecb0f1c,
7736 0x7e46a89c, 0x7be7d07e, 0xacbb4e90, 0xccd7c42e, 0x42df97ae, 0xc6d33b7d,
7737 0x9aee293a, 0xd3c4b764, 0x3a4419be, 0x7a733bed, 0xd7083dc7, 0x947d0775,
7738 0x8f6492cf, 0xb739715c, 0x93da3fcb, 0xec3f23aa, 0xec1b7212, 0x797f1e47,
7739 0x9323ef9c, 0xf6efc8ed, 0x23b72faf, 0x777febfb, 0x17c3923b, 0x28f3c3de,
7740 0x890f7ca4, 0xc35f5f7d, 0x5fd434d9, 0xaed23d2b, 0xd8f7ca4d, 0xba3df22d,
7741 0xd0f7ce87, 0x0ff8f276, 0xee494186, 0xae222dba, 0x43cef7e5, 0x84bb87ff,
7742 0x7b2bc0e4, 0x3748c353, 0x64ed3b67, 0x4b6e6997, 0x7b6ae114, 0x3cc11ada,
7743 0xe0453688, 0x578890eb, 0x2c1c4459, 0x834744a3, 0x4025a0e2, 0xa4fc3f72,
7744 0xd2abc799, 0x85ee8f22, 0x1ce1e37a, 0xd462cf11, 0x54d9f87f, 0x8a6377c2,
7745 0x37fd8e9e, 0x8608fbfe, 0x183eaa71, 0x09f9d70f, 0x87bb707b, 0x7fbc5ae2,
7746 0xe75582f6, 0x8968b3f1, 0x33b0f01b, 0x93bfedc2, 0x05a8a6a5, 0x8993bde6,
7747 0x32f59f3c, 0xd9e7c5ae, 0x8f2461b7, 0x8231a0cb, 0xdcb5b2fb, 0xe32f545f,
7748 0x1fb98755, 0xa5c45eae, 0xf45ece4e, 0xb458a608, 0xb8b52d29, 0xdd7cfb4f,
7749 0xdf9ff234, 0x2a2cff79, 0xfd18d7eb, 0x3fd08bfd, 0x3f103c5f, 0xf9f77e96,
7750 0xf6e167cc, 0xd0ff80f3, 0xbe8cf604, 0xfd46ab46, 0x775cc459, 0xc3d03ea3,
7751 0x43177ab0, 0x1a2506d9, 0x19600af1, 0x7ad6d3de, 0x57bd7052, 0x6f4899b7,
7752 0x7e4cdb85, 0xcbd24f7c, 0x67ae1eab, 0xbd70f5df, 0xe08ea803, 0x336cb238,
7753 0xe883788b, 0x4533056f, 0xbc2934b1, 0x6ad2ed5c, 0xb2dfd287, 0x8b7336bf,
7754 0xcdda1a6d, 0x77f226f9, 0xd7f16e7f, 0xa338bf91, 0xcda9d684, 0x96a6b2d9,
7755 0x7d2f13b7, 0xa8078f6e, 0x1b8d32fd, 0x40cf4c96, 0x8782fa79, 0xf19217c7,
7756 0x58ddb0b6, 0x2cc38e4f, 0xf5eb1889, 0xa736382c, 0x120dc798, 0xf420bf9f,
7757 0x8aebe7c4, 0x167dbe04, 0xfe72bb94, 0xde38f22b, 0x1cbcf94c, 0x875d5f95,
7758 0xe30a3074, 0x725845ca, 0x84cc2abf, 0x99751fe0, 0x48fa2147, 0xcdcdb782,
7759 0x96bc29e9, 0x5aff21fb, 0xfee193f8, 0xf82593d0, 0xb8c5efd8, 0x42cbbd65,
7760 0xf5f3e871, 0x1a64a497, 0xf5fdb7f7, 0x96feffbf, 0xaad7e7ef, 0x45c6bf22,
7761 0x8bbe6972, 0xe2a4e5cf, 0xe7c51bdb, 0x701fb00e, 0x0ad56b1e, 0xbfd32394,
7762 0x3479a0e9, 0x8239061f, 0x3de5ac71, 0x9bd7a805, 0x304a7bab, 0x5f8c935e,
7763 0xf2935684, 0xef9bde0c, 0xda08fd81, 0xf18c6b0d, 0x55f1c1b8, 0x2666617f,
7764 0xee4e7bee, 0xd7f5197f, 0x2fe93b7e, 0xad17bff8, 0x16cfffc8, 0x388b5c91,
7765 0x2e316383, 0xee894a14, 0xda1171f8, 0x6a8edc31, 0x44eeb6ea, 0x5b7e713b,
7766 0xff0f7c42, 0xef18deb3, 0xc8326b63, 0x8c3aceef, 0x4e1e1bcf, 0xfc506efa,
7767 0x65d69daf, 0x0e3825b3, 0x10f41df9, 0x599c1de5, 0xbeb86262, 0x116faaf5,
7768 0x7633a92a, 0xc67e7da3, 0x466bd7c9, 0x3e3fd4a6, 0xebfabfb2, 0x57d9d683,
7769 0x6f5ceb82, 0x7ec4c162, 0x619d709a, 0x3ac51b7d, 0xe2fa799f, 0x8fe75c12,
7770 0x825c5ff7, 0xdcd9bceb, 0x29be47ee, 0x41af0775, 0x32ba9cfc, 0xe615f640,
7771 0x9d1f20ef, 0x94de3d2f, 0xfd378f44, 0x2eb1e8e3, 0x59321f31, 0xe3f4363f,
7772 0x3d1fa8cb, 0xe50f3d16, 0xf59b7cc1, 0xfc49ea2f, 0x679fd21b, 0xe3ff92b3,
7773 0xdd3f1ff0, 0xdd18f948, 0xb227d92a, 0xb05ac3bf, 0xc3a3ed18, 0x617d796f,
7774 0xd3fef865, 0xb5e5fd85, 0x59fa30b1, 0xda40bee4, 0x78f2c997, 0x03cf98b9,
7775 0x8cdffe99, 0x3ce21bf8, 0x20dc7fd2, 0x3e45b1de, 0x6eef76e5, 0xc7fdc7c5,
7776 0x6e4fe49d, 0x85cf343e, 0x220fe2fe, 0xfcdc7fdc, 0x8ff93974, 0x8a5e4497,
7777 0xeb193e62, 0x1fb85c56, 0xddfbb259, 0x9003cc34, 0xe7d85efb, 0xf9499fde,
7778 0xeffdc635, 0x69939107, 0x70003798, 0xa7708fbf, 0xa416e27a, 0xffd866fb,
7779 0xb360de61, 0xfd863f16, 0xd9187b36, 0xc65d9505, 0xef8ca0fd, 0x48580b6e,
7780 0x56eb6eee, 0xb3af2822, 0x3ca2c12c, 0xcf2c6bd4, 0x80753a75, 0xfe9922cf,
7781 0x077e9017, 0x5dfeeae2, 0xa7fe9758, 0x44e9ad9e, 0xe6663dbf, 0xdb3ca177,
7782 0x4cf214ea, 0xdbf6f923, 0x7591dd87, 0x6fc37609, 0x584edc23, 0x34c1f322,
7783 0xbd60d516, 0x1ff1cd16, 0x7946f5c7, 0xf7924d1f, 0xaf197589, 0x494585bf,
7784 0x9eb1352f, 0xc4b0bcfe, 0xf9e392f7, 0xf4370718, 0x75ca5ac3, 0xe4dd93f4,
7785 0xab9c51f0, 0x6356cfeb, 0x9bef987b, 0x55961f81, 0x5cafd00c, 0xcdbf4907,
7786 0x6a1d1fc2, 0xe90ab138, 0xb8a5d437, 0xe8dd7f70, 0x08dbf4e3, 0x9bcc2ffb,
7787 0xd677e64d, 0x1d13cc69, 0xdd7fff8e, 0xff9c77cf, 0x9cac3d7f, 0x5bf8c7fa,
7788 0x3f97efdf, 0xfce5ef9c, 0x7fbeffa5, 0xe70add9e, 0x2579a4cb, 0xfd935bef,
7789 0x79df72ee, 0x8bf0f2be, 0xf17c7c24, 0x70c7c60f, 0x6b2530f2, 0x7242fde8,
7790 0x96afe35c, 0xf8e0ff87, 0x1e8723c6, 0xa881334a, 0xf6145258, 0x6fcebb72,
7791 0x50cf1788, 0x371e7e1d, 0x453e7955, 0x9f5ddc72, 0x9ceee221, 0x5a7a5f9f,
7792 0x126af5a5, 0x43a6e1f1, 0xdabe1f4e, 0xf14c58e0, 0xe9f8e4d9, 0x067fb652,
7793 0x1c72512e, 0xb8f911b5, 0xa9e3cbf8, 0x3d396517, 0x56749f24, 0xc90a7984,
7794 0x392f5a79, 0x4c111d3e, 0x32eaef58, 0x410c08d8, 0xcc2d36d7, 0x4f9e1232,
7795 0xf4f6e2cb, 0xc89f224b, 0x05e7e16b, 0xfaa673ee, 0x35e31f71, 0x7ca77cf1,
7796 0xd67a604f, 0x02ef9424, 0xc0decf9f, 0x4797804c, 0x4f249dcc, 0x1f0e4dc2,
7797 0xc7e93fca, 0x10effd91, 0xa5f38b71, 0x19676ff3, 0xfebfbce9, 0x85fbe24f,
7798 0xdaffbe92, 0xc016ddb8, 0x181f818d, 0x186befd1, 0x4c1a2a67, 0x33f5c3b7,
7799 0xcb2efd1c, 0x459edc0a, 0xa44ff178, 0x94f3e6fc, 0xf195a92f, 0x622fe893,
7800 0xfa3aac07, 0xfce26d37, 0x239f5b0b, 0xaabeebf6, 0xcd979459, 0x73c88fcf,
7801 0x8fd9c336, 0x9ff9fb1b, 0xf5fd8fdb, 0xc8fd93bf, 0x9c7681dc, 0x7e69a9e7,
7802 0xed5ffbca, 0x5f71f804, 0xc875a8f8, 0xdcf22cf3, 0x5df997c5, 0xcdc3f6f6,
7803 0xb0ef6ae9, 0xe563ff70, 0x34ff93e7, 0x34fbf9f9, 0xdf0ea3f4, 0x7be4584f,
7804 0x9e22fcc6, 0xf82576c6, 0x9e3143b7, 0x8092f7af, 0x447f3e57, 0x6cf4c5e8,
7805 0xa75c51ff, 0x6cdb8f8f, 0x9e4c1d2c, 0x9b172e4a, 0x2f8a0e03, 0xbcf27734,
7806 0x8ce5e697, 0xfa3377e4, 0xafd0cb4f, 0xbda18b38, 0xf8233537, 0xf57efc33,
7807 0x9ab08edb, 0xd9f77e8e, 0xdebbed0c, 0xa9febce3, 0x6c73f83b, 0xa1ef2d0f,
7808 0xecc74678, 0xaaef288f, 0xae9fcfea, 0x7824adaa, 0xb1e08fc9, 0x7cadcf1a,
7809 0x0fe3c591, 0xbf43fcb2, 0x5f93f13c, 0x9e06e3ff, 0xf8f21d9f, 0x908fe85d,
7810 0x3d54f17e, 0xe6a67e46, 0xab68dc03, 0xd87cf952, 0x9e88f3f7, 0x2b4c0f9a,
7811 0xeb29ff47, 0x9da397b4, 0x072bf55b, 0xbe3ef7ed, 0x24f2972b, 0x0fc13dea,
7812 0x2b3a3e51, 0x5da35723, 0xa0e3085a, 0xfef1fbbd, 0x6e11cbab, 0xa336ff29,
7813 0xdfc61cff, 0xc7fa34ec, 0xd9e78d99, 0x4f9bdd2f, 0x4762cbfb, 0x6fec53f0,
7814 0x11c39db3, 0xa3ce23de, 0x3279bf08, 0xcfbe4bff, 0x4e344d56, 0x146db7f6,
7815 0x6172972f, 0x6d0599b3, 0xe4f203c5, 0xf22e9678, 0x635e444c, 0xa79e2cf7,
7816 0x8f0eea22, 0x81f3bf31, 0x238f2bcc, 0xb4b3c73c, 0xe61f96af, 0x402f9418,
7817 0x187e62fd, 0x9c5805c5, 0xe7a92dfc, 0xca3d1db8, 0x727a2165, 0x9c51df02,
7818 0xed09e806, 0xb1e34bf9, 0x6b9e78e9, 0x52f44774, 0x73e1f3c4, 0x3693c226,
7819 0xd38a35eb, 0xbc7c2ba4, 0x6b3df5e2, 0xc61fa2c7, 0xb865e6f5, 0xabbb7aa4,
7820 0x353a511a, 0x4d9f9023, 0x52968cfb, 0xbffaaf1c, 0xf29f3ccc, 0x17f92a50,
7821 0x291a0a3a, 0x6df7b29f, 0x4e3ce1ab, 0x77661972, 0xa8e4fe53, 0xbc505fae,
7822 0x194079c0, 0x72762f32, 0xd6f083b6, 0xa0cd8e1c, 0x3d4b9b1c, 0x43b56724,
7823 0xb538a2bf, 0x094356b6, 0x7eccdac4, 0x0b439e13, 0xefe460af, 0x32e1d31c,
7824 0x8a157ae1, 0xc3be98fc, 0xa418987f, 0x0f8c8afd, 0x937e7844, 0xee1567b9,
7825 0x3d15b4c3, 0x3d718797, 0xcd4db80e, 0xbc5fd865, 0x872dfc99, 0x4fd21952,
7826 0xddf15761, 0xb85ea153, 0xb0f145c6, 0x296ee7be, 0xcc2aff24, 0xf310cc73,
7827 0xf336ca2c, 0x9aa50ffe, 0x9b699f50, 0xd5470f98, 0x04d559dc, 0x875083f7,
7828 0x3c8a467e, 0x453f1955, 0xa9ea143f, 0xd7e0ecf4, 0xffb63f30, 0x14b2d21c,
7829 0xe3490e7e, 0xb2e712fe, 0xf3c71fb7, 0xfc2c3b3d, 0xc391e79c, 0xdf936613,
7830 0xe0a6ad6f, 0xe6ee7c3a, 0x663794f9, 0x42e70c9b, 0x847ff006, 0x1d4756f2,
7831 0x6bd705fa, 0xaff61630, 0x68bd3999, 0xd13b3d6b, 0x2d38b8bf, 0x97ba7948,
7832 0x8a5545b5, 0x3d4eb99f, 0xec27ab50, 0x3d70b673, 0xef8fbcd3, 0x35f793cb,
7833 0x6e5fa65f, 0x2dda36cb, 0x927ff5fd, 0xfe83f2dd, 0xfdc6fff1, 0xf3ee330a,
7834 0xe497ed92, 0x3b20dd7d, 0xe1bfa93c, 0x8f9918ec, 0x0e303d52, 0xd29da7b7,
7835 0xf21b0a4e, 0xe21daa75, 0xd8cda17c, 0x5c23e5ff, 0xbf995f34, 0x5f52b593,
7836 0xf1fa7981, 0xd7f2301f, 0x70a23cc9, 0x09f7cf35, 0xee746c9b, 0x29dacbd0,
7837 0x8b24687f, 0xd3f90a2a, 0x6d7ce87a, 0xc111e636, 0x47b2eb77, 0x99dbbf51,
7838 0xf24a8d6f, 0x6e105752, 0x509fe63b, 0xeb646abe, 0x3ae71c22, 0xc7638d07,
7839 0x308b93fc, 0x15bfc085, 0x06f4ebe5, 0x05c85f1e, 0x9bf48c7d, 0xa1d39a3b,
7840 0xa1e78ebd, 0x99133cc8, 0x50f12217, 0x3b9bf02d, 0xca115176, 0xf04ab5c1,
7841 0x99ae7151, 0x4e0dffcb, 0xec195e71, 0x79c0cf6b, 0xfbc63ee4, 0xf898370f,
7842 0xaf376479, 0xf9d18c77, 0xf82fa079, 0x728ebb39, 0x2832779e, 0xaf09253f,
7843 0xc9e53f32, 0xe411e0b4, 0xcbf3e497, 0xd6124e92, 0x6f47ce8f, 0xfaedc43b,
7844 0xcd0b06ea, 0x35c96fa3, 0x5bec97e4, 0xffa86262, 0x9cadbbab, 0xdbc692ee,
7845 0x51616756, 0xd88b57ec, 0xf5ca7e51, 0x16bb32ff, 0xfd14b5d6, 0x6b5a47be,
7846 0x38053a2f, 0xa01ada3e, 0x74aecfb2, 0xf9d217aa, 0xa928b9d2, 0xf9f2d89e,
7847 0xe60e5ab5, 0x140bc4db, 0xb7e79920, 0xea93347e, 0xb077f199, 0xcf16eafe,
7848 0xc39034d7, 0x3be2637d, 0xffff7814, 0xdbc47f79, 0x19731691, 0x87a1f77b,
7849 0x5f1d8666, 0x91fddf41, 0x9c71e725, 0xc4d3bd41, 0xc8c5567a, 0x5df4245f,
7850 0x5e879725, 0x25ec8587, 0x653fc8af, 0x151f2235, 0x5f503b23, 0x714e5399,
7851 0x0fd3077b, 0x8f3db0c4, 0x7682cf9f, 0x6395ffa2, 0x26da7fb8, 0x49e582e8,
7852 0x184f54bf, 0x22cadbe5, 0x2fdf7d37, 0x23580f8f, 0xc7c63fdc, 0x0be9e37f,
7853 0xf325be28, 0xe573196a, 0xf280b9cf, 0xfbf50c6c, 0xa61ce2ec, 0x73c7cae6,
7854 0xc2cd2bec, 0x36f515ee, 0x8bc53067, 0x043e44f3, 0x2b8dee7b, 0x7c865bbf,
7855 0xf7e0e674, 0xbb5ca347, 0x82fb02ca, 0xeed8e421, 0xfac72e1c, 0x0a358ecc,
7856 0x0ce3577c, 0xfac2f08e, 0x773a95bf, 0xa8291e06, 0x82cd311b, 0xf8581747,
7857 0x9af11551, 0x3dc4e829, 0xaee7c387, 0x77982809, 0xc7ced2ba, 0x7e6a0ccd,
7858 0x9c10f73a, 0x70075ca3, 0xbcb854af, 0xc9d28f86, 0xd3d52a8e, 0xa3611cf1,
7859 0x0aaad738, 0xe74971b9, 0xf5ed1526, 0x35beb79f, 0xe006d355, 0x878885fb,
7860 0x78c8a2ff, 0xcbdca23e, 0xce5962ed, 0x900bf556, 0xf0ad56fe, 0x12f336bc,
7861 0xf8e9ce7c, 0x9565b4ca, 0x557da798, 0xfa254b6a, 0x4f3d0769, 0x0965e787,
7862 0xaf7f2b75, 0xc02f16d1, 0xed0be673, 0x8f8849c1, 0x7bbde7cf, 0x3b87ca27,
7863 0x0778df73, 0x30de24f3, 0xaf91390b, 0x98eef588, 0x79eb069e, 0xf22dd8ac,
7864 0x0f446c3c, 0x3f72c6c7, 0xdb1e7f64, 0xfaf28538, 0xe7e1ce66, 0xb165af49,
7865 0x9ef81eb6, 0x3ed0159c, 0xd9117263, 0xde453391, 0x02b78cc5, 0x9817e869,
7866 0x435c4371, 0x5d9c3a39, 0xacd79574, 0xc3f024f7, 0x7eb1bad5, 0xfeb1a96d,
7867 0xfeb19f35, 0x1a7fc98d, 0xd97f589b, 0xf48d9fee, 0xf3c2bcf4, 0x3097c33e,
7868 0x47bdd117, 0x32fda309, 0x715c99e1, 0x27e7970e, 0x77d8abfe, 0x5199333d,
7869 0xdb3ed67b, 0x20373c2e, 0x68aad7fd, 0xb665e09f, 0xef7e0cc2, 0xb8bbea03,
7870 0x3d1cf222, 0x0761d314, 0x3f71756f, 0x816bbc2e, 0xd3ce0e7e, 0x46aa3f89,
7871 0x4e9052da, 0x76261cb2, 0xa552f239, 0x239aec8d, 0xb9e4ee82, 0x058d2aea,
7872 0x8602cf30, 0x1be5839c, 0xe88bd766, 0xc87f0ea7, 0x69dbe718, 0x8a5be51a,
7873 0x415b1831, 0x5d0487f5, 0xfff2911f, 0x57589a07, 0xef1840e0, 0x1e5cfaec,
7874 0x74652e87, 0x656cfe5e, 0xdd25d509, 0xae01fe4b, 0x41a18d1e, 0xe927f445,
7875 0x0b4ea7f9, 0xbf7a83d1, 0x34bbf849, 0xea590213, 0xb8807092, 0xc93d42c9,
7876 0x7195fec8, 0x6c9b7cba, 0x7ef8fcd7, 0x7e75930e, 0xd44b2bde, 0xaa6a29a1,
7877 0xf2fcfd40, 0x3b7f48ef, 0x879c417c, 0xe746cd25, 0xa3e38693, 0x767f825d,
7878 0x4b91f125, 0xe8f89abb, 0x3b92cea7, 0x9c6bee08, 0xa5afd42e, 0x0cba9730,
7879 0x2a23fd2a, 0x4fce3bf0, 0x474f8a6a, 0xed66f9be, 0x825aa9f1, 0x9bef869c,
7880 0xc6a9f7f8, 0x7df0bdef, 0x69f7c246, 0xe0d97df0, 0x6d3b77ef, 0xec44d351,
7881 0x21ef4aa7, 0xc9a5187d, 0xade6235e, 0xaeeff166, 0xa3b17911, 0xd47de0d3,
7882 0x3cc6a55b, 0x67d93613, 0xa4e4fca3, 0x94ab92bc, 0x57c839e5, 0xba9adb57,
7883 0x97bfa07b, 0x655e3ac5, 0x82e67e0a, 0x2dcf2fe7, 0x57fc8a39, 0x98688b6b,
7884 0x8b2d77d7, 0xedc5c2ae, 0xc47c169b, 0xe1f24c5d, 0x6693e459, 0x03363835,
7885 0xedcc67ea, 0x222d6fa3, 0x9bce79fe, 0x495e1839, 0xa45e1227, 0x493fa417,
7886 0xf770c92f, 0x3bd7e7af, 0x3b6f1129, 0x4a5851d8, 0x16b18abb, 0xe7ad779e,
7887 0x880bcc0f, 0x65ad8668, 0x2f35da34, 0xdc93092f, 0x00fdcab8, 0x9cbd65e5,
7888 0x944ffc1b, 0x7e177567, 0xcbe1a052, 0x716379de, 0xc6f000df, 0x95e137fe,
7889 0xbca0e3f6, 0x862d0fe3, 0xf8e1e3bc, 0x421b8e4c, 0xfcc550bb, 0x47949de4,
7890 0xf0e39a1c, 0x109179e1, 0x5256c1e6, 0xc2ec8afc, 0x6f6e14e7, 0xb09b1587,
7891 0x3f37cee3, 0xaf7b7199, 0x33dedfa9, 0x9477d7e4, 0x6e3bb873, 0x35fde5d5,
7892 0xc79c5edc, 0x4b393db8, 0x51742fb4, 0xefc3ccbb, 0x86fdc9d8, 0xd58f4f1d,
7893 0x03b05fb1, 0xe9607ec9, 0x322ccec2, 0x7f839bde, 0xde40d64a, 0xb73366f8,
7894 0x7c99b75f, 0x62e79455, 0x9ce2f7e1, 0x318cfe91, 0xff64fc7c, 0x628e6e62,
7895 0xd7f74f88, 0xc5fe4eff, 0x3f307752, 0x585bfa07, 0x4c502fe6, 0x33f71708,
7896 0x1c3e7d02, 0xd6fe9863, 0xfeed1a32, 0x9bcb59ab, 0xcfa262a6, 0xcfa41ce2,
7897 0xc59f4009, 0x9d1cfa06, 0x24e5c993, 0xb3e925c2, 0x934b2e9f, 0x1782caf3,
7898 0xee1d3f60, 0xa3355fce, 0xf56ddcbd, 0x9e5abcf1, 0x072c9827, 0xa059e012,
7899 0xaa3c7871, 0xc24cf04a, 0x39e19371, 0xa4493e1f, 0xf9c66ccf, 0xc97e3861,
7900 0x59d858d6, 0x2f2fc031, 0x083583db, 0xacdf3f7f, 0x41a3fbe2, 0xa20eab70,
7901 0xe46febaf, 0x2a509471, 0x4f1847d7, 0x67f181c9, 0x5faff189, 0xfaf0e9cb,
7902 0xdd10b17f, 0x8451f802, 0x9f68b67f, 0x7944ddd5, 0xcc6bb354, 0x00ed1227,
7903 0x13a9b719, 0x94f1cdef, 0xe605919b, 0x4bc634cc, 0xf1e26eea, 0x8b58eb9a,
7904 0x7ebde119, 0x3a9fb18e, 0xcc13feb6, 0xc9bbab0b, 0xd3983cf8, 0x8b19671f,
7905 0xc2a39671, 0xfc07d08f, 0xd3f4fc82, 0xdf0fc5cc, 0xf63bf40a, 0xe8156587,
7906 0x6b32ba77, 0x504deec9, 0xf1b6f1ff, 0xd669ff54, 0x06f3bfb7, 0xa128efb6,
7907 0xb9260d7a, 0xf9083ee1, 0xd54df511, 0xc114d78d, 0xa2ed47b8, 0x39f95bdf,
7908 0xb04a6f02, 0xe7bc1663, 0xf28a389d, 0xbc846b21, 0xdbc85be9, 0xc9d0bdaf,
7909 0xd66f5e53, 0x9358dfc9, 0x79f5efc2, 0x2bbffcad, 0x66b73f30, 0x3c57a894,
7910 0x47eb1e3f, 0x1ee84f95, 0x8726de80, 0xce6ff886, 0x09da7ee5, 0x1c744aa5,
7911 0x4326a5e0, 0xe7c4dff4, 0xd1e2b335, 0x9a8fe45c, 0x04cfde6a, 0xc5b5b4df,
7912 0x2ce99ef8, 0x6d737bd5, 0x250f2869, 0x70e7b59f, 0xa9ed2cfd, 0x67fbe080,
7913 0x8db6effc, 0x36037e80, 0x0c5387c5, 0xdf977e4c, 0xe7e0e55f, 0x22fe02cb,
7914 0xd3bcfd0d, 0xb37f3cfd, 0x0722b6da, 0x0f5fe7f7, 0x5e712a5a, 0x51f95b2e,
7915 0x27d26fb4, 0xf9449b4f, 0x466636be, 0xdf74073d, 0xf1787c41, 0x48690527,
7916 0xdd230e6c, 0x259aba4b, 0x48c6bde9, 0xdbafc0d7, 0x5cbf3272, 0xdae81b5e,
7917 0xc3d7403e, 0xd700b9d9, 0xa9ae098f, 0x3fd5fd46, 0x265f124e, 0xbc9c3b8f,
7918 0x7944bfc0, 0x275f003a, 0x661e5ff1, 0x7f2315c5, 0xecfe4bb6, 0xa62c3842,
7919 0x29b39d18, 0xe9e37c54, 0x7630ea60, 0x1f2f8486, 0x8315ae7d, 0x4d3fc2e1,
7920 0xcffc7fda, 0x3cf2fb83, 0xf9df0ed1, 0x5c00c659, 0x242bfe30, 0x7871570f,
7921 0x5c2d2bb6, 0x5c7b08be, 0xe59be7ee, 0xf38cbb7c, 0xe7e14aad, 0x77e8bdde,
7922 0xf97bdf21, 0xcfb87ef8, 0x7ce41d63, 0xcf6f4242, 0x169c05b1, 0xee75db98,
7923 0x1b9fa27a, 0xb469f858, 0x8339968f, 0x74f117ff, 0x843e14c4, 0xcc859cfb,
7924 0xa057f14f, 0x1272778f, 0x6f090dec, 0x879a9e32, 0xf3c9a791, 0xc0cfc649,
7925 0xbec8c5ba, 0xfad8e793, 0xf39e7be7, 0xc7897694, 0x6577f462, 0x8654ff08,
7926 0x452147f0, 0xc99e7ea1, 0x2fb87c52, 0xc853ee98, 0x6cc998be, 0xd6679724,
7927 0xe19e7d72, 0xd487f6e0, 0xc7f1c3fb, 0x92339715, 0x991b3357, 0xe7c73738,
7928 0xd9874c95, 0x2c0ee7ac, 0xadf4da67, 0xd1ef900b, 0xe007d14e, 0x7ee0e99f,
7929 0x215cecec, 0x24cf583f, 0xf5fdf3d4, 0x67be7a41, 0xe49fca12, 0x9e66c9fb,
7930 0x8cd2fee3, 0x99ca8c73, 0xa12777be, 0xeda8cf9e, 0xcc728499, 0x737bf2e9,
7931 0x1fdc0d27, 0xd1c78c98, 0x871926b9, 0x4cfa2f3b, 0x3f191fe6, 0xc706736b,
7932 0xcfd238e2, 0x55894671, 0x1e154be1, 0x583fe897, 0x76ec7484, 0xff434d15,
7933 0xe81b1cc5, 0xcbba1823, 0x1730bc15, 0x008fede9, 0xf10e6e0f, 0x75e3c055,
7934 0x347bc135, 0xe1e12c3e, 0x2b878136, 0xfb3d5e85, 0x89f14ab0, 0x43e97f1a,
7935 0xbd084218, 0xe2116662, 0x45e93f57, 0x59d8bf79, 0xf8a2a030, 0xb24e63fe,
7936 0x5abf1633, 0xb195f14f, 0x4f4c4c5b, 0x22e393d0, 0x327b8629, 0x30cbec26,
7937 0xcce82fd4, 0x617fbc35, 0x7b4328d7, 0xa1bc7479, 0x2a57a2fd, 0xb149f50c,
7938 0x2ff78629, 0x50daab7e, 0x1ae7a4bf, 0x3f53fbc3, 0x83a86d98, 0xde70d0c6,
7939 0xd8559f7b, 0x65f79836, 0xbe196ff1, 0x19b6cdff, 0xf3bc60af, 0xb2f7d8a4,
7940 0x0a563fb0, 0xe9205878, 0x637cdcf6, 0xaa25517f, 0xf3df2154, 0x79eb05bf,
7941 0xc034f6be, 0x0bbf625c, 0xc4f68ddb, 0x7ac62de2, 0x55a6f743, 0xe7071b28,
7942 0xe354b479, 0x79c93955, 0x79ae351e, 0x50cfa426, 0xe317d82e, 0x62ec1110,
7943 0x8e1b33cc, 0xfd6cbfcf, 0x2fe8d84b, 0xfefe7f5b, 0xf5d90b16, 0xaa7d5f8b,
7944 0xac8f0a2a, 0xdbfae35e, 0xa7fae375, 0xdfd71a96, 0x7fae33e9, 0xfae364fa,
7945 0xf5c6fdbb, 0x5c6b511f, 0x7180ccff, 0x8cebb3fd, 0x34139feb, 0x06c8ffae,
7946 0xb7e7fae3, 0x70bbd718, 0x8b3d7199, 0xed0d4bc2, 0xe52febc9, 0xdb9af165,
7947 0x7a01ef8c, 0x2074094d, 0xa04168e9, 0xc677f281, 0x30cf7fb4, 0xc03d324e,
7948 0xf744d1be, 0x6e3ec1bf, 0xf4fe729b, 0xfc8ad201, 0xf1f4c9bd, 0xeec2b96f,
7949 0xfa017414, 0x0ae513a8, 0x614f17d8, 0xd8563759, 0xeda181fb, 0x12bf290b,
7950 0xbee279f5, 0x36b93878, 0x7d894f48, 0x0a7ab0f2, 0x81f6c9f7, 0xf470f27d,
7951 0x8fb31c7b, 0x4f5a8ec8, 0x5d1ba57e, 0xf14f8e1c, 0xcfe825d1, 0xf2f4827d,
7952 0x32700071, 0xe71c7bc0, 0x4f1fe303, 0x8dfe4099, 0xd928b36f, 0x1982ffed,
7953 0xcdd83096, 0xe2ada898, 0x953a4f3d, 0x2f6f42f5, 0x858ffe14, 0xb95be0f6,
7954 0x9851efdc, 0xc5e6e385, 0x7b14bce8, 0xdd79c46d, 0xe3027123, 0x4f782008,
7955 0xca011c61, 0x9ba73b5e, 0xf8ae52d3, 0xc049ee99, 0x4ae9fce7, 0x6ab5d929,
7956 0xcd3de50a, 0xfd2141bf, 0x787fff34, 0x2cfa1719, 0x4cb95cb9, 0xd85db3e2,
7957 0x482edc03, 0x149ac3c7, 0x07416277, 0xc2e7cde1, 0xb8fe8675, 0xfc47ff1f,
7958 0x0ae3cd7c, 0xd06726d3, 0x675a3331, 0x0f3c6f5c, 0x9c38daa5, 0x0d999b8f,
7959 0x058139f1, 0x57bc0ec9, 0xfbc6d103, 0x7bfbcf1b, 0xd3fa1463, 0x7cfff554,
7960 0xcfe306ad, 0x9ffa2e38, 0xfe863e1d, 0x63ebd566, 0xf41abfe8, 0xba14c0fc,
7961 0xcebfa324, 0x87f87bf8, 0xc27e9178, 0xbb2f413c, 0xbdfb8c9d, 0x2386fc92,
7962 0x98c09055, 0xe7e663bf, 0x16dabdc3, 0xe63c9fbe, 0x984d635b, 0x37666337,
7963 0x32fbe79e, 0x6df3087b, 0xc7e4274f, 0x790cbac3, 0x3cb4e98f, 0xb657efae,
7964 0x71865c36, 0x07115ea2, 0x7835a7bb, 0xaab7ae19, 0x0e2f28f9, 0x277257ef,
7965 0x40f16f7c, 0x6a9f027b, 0xdd43068e, 0x5e1008ec, 0x10b6b556, 0x3dc598dd,
7966 0x6ef3ab50, 0xfc130573, 0x148e1712, 0xcc2d86f6, 0x984c595c, 0xc1f7f0c6,
7967 0x55f38674, 0xc4e9da5d, 0x0bd5a87d, 0x2bca25fd, 0xfa2590ad, 0xb6b4d7ad,
7968 0x94abdc10, 0xb33b1060, 0x3b51668e, 0xe1aadbe0, 0xbe785459, 0x67922af5,
7969 0x3e6de716, 0x3867f7bc, 0xdabd59fc, 0xc87289e7, 0x8728d23f, 0x5db56fee,
7970 0xd95af88e, 0x93c68cba, 0x756f6b78, 0x8df58e5d, 0xbed15ead, 0xb54dda82,
7971 0x71f482ba, 0x8621681a, 0xc7ad1671, 0xb03d7189, 0x03c61933, 0x045b5ecd,
7972 0xe1eac899, 0x05a3b2f0, 0x5d731f44, 0x8df4061c, 0xbc7d03e5, 0xfb4cccb3,
7973 0x1df3dbd3, 0xafedfef4, 0x0fd1798f, 0x1e01607c, 0xf98aff51, 0xf0238ff4,
7974 0x88721167, 0xf200c169, 0x23572595, 0x6b86747f, 0xdfe3ad36, 0xbbc49fda,
7975 0x1f28cec5, 0x20ef92d4, 0xe17cebbb, 0xf7148d0c, 0x27bc0950, 0x44f00fe3,
7976 0x8176f472, 0xe2efdba7, 0xefdbbe7e, 0xcec79460, 0xd55fc196, 0x148d5d00,
7977 0x059b25f2, 0x056f6ca8, 0xeb8252c1, 0x0b416365, 0x49d675e8, 0xbfd1db2f,
7978 0xcd7eed83, 0x4deaa18d, 0x58599e35, 0xaa7c9c6e, 0xbef1d91d, 0x618b3f4b,
7979 0xc474be89, 0x4581ab97, 0xc51fccf0, 0x1d783d8e, 0x89a7af35, 0x5e3ab4f6,
7980 0xe9ed174f, 0xf7cf5e01, 0x20d4a93f, 0x97f14960, 0xd5c6477c, 0x2dbe51a3,
7981 0xb27cfc60, 0x3b60e7b8, 0x91c2f213, 0xdb06ab31, 0xbe74626f, 0x50ffb640,
7982 0x4e38e7b4, 0x394629ac, 0xfdf8c73c, 0x6c878156, 0xe9f689c7, 0xb6319f14,
7983 0xa64af8cb, 0xf42bece3, 0xfdb1997d, 0xd3bdf141, 0x1d363671, 0xc71b47db,
7984 0x53da20df, 0x08ef3c1d, 0x473f21c4, 0x15efda2f, 0xc76c76ed, 0xed8d4bf1,
7985 0x2bf8c56b, 0x43ad0095, 0xf8899f3f, 0x9d568ee4, 0xf67cc9ea, 0x7e0cc8ea,
7986 0x99f0598e, 0xf21b196b, 0x23abfcdc, 0x9a4cbe79, 0x0ff7e3de, 0x7b650f21,
7987 0xb8a34b86, 0x10b5eaaf, 0x421d591d, 0xec3e088e, 0x8b4a2397, 0xf717138f,
7988 0x3d197f97, 0x8e7ee103, 0xfe00acf2, 0xbef39e90, 0x04c16263, 0x98db9679,
7989 0xef0982c2, 0x1864177b, 0xe53759ea, 0xccf7de1a, 0x77686519, 0xb4378e54,
7990 0xf13e58b3, 0xae826dc7, 0x0c2aca52, 0x02bef2ed, 0x923e73a6, 0xf479b576,
7991 0x677bc314, 0xa474f54b, 0xcb57d3ed, 0x367cabfb, 0x39b70b94, 0x1f236547,
7992 0x3275a4fe, 0xef20df1a, 0x8974a26c, 0xc9474bd2, 0xa2eab656, 0xc7f54a5e,
7993 0x7aaf3cdc, 0xd78fab65, 0x6f9d188b, 0x4b5ad95e, 0x2f81c7f5, 0x56d7fcb1,
7994 0xa07b953f, 0xfb0e160e, 0x43aff411, 0x7fa13b3f, 0xfd023fac, 0xfa1db963,
7995 0xd087f2c7, 0x856fb63f, 0x10feb17e, 0x83e585c0, 0x7f3e0fd0, 0xfac7fa00,
7996 0xd500d6a6, 0xa3ad6bef, 0x20d686fa, 0x36b6f795, 0xadb5f3d0, 0xdd5f542d,
7997 0x7bca8cba, 0xae54c35a, 0xed435d6c, 0x1f37a116, 0x1f1fe713, 0x7dcfc69b,
7998 0x467faf27, 0xeed5f29e, 0x4504a8bb, 0x93c8655e, 0x7dc3c8c8, 0x2f31a775,
7999 0x7047f110, 0x931e39d8, 0xe02b18e1, 0x2b62cf18, 0xa0dcb952, 0x2e98eb38,
8000 0xc0a9dddf, 0xf85b23a7, 0xc57517ba, 0x81a73da9, 0xcc56378f, 0x2cc27993,
8001 0xef1f8aaf, 0x957af7c5, 0x8f2a7558, 0x831f9337, 0x553f0179, 0x9133dce2,
8002 0x7084c479, 0x7f419369, 0x1fb3cc27, 0x270e6e5f, 0x78286de2, 0x7c78f22b,
8003 0xe4ecad43, 0xb6d49bf7, 0x52cd9147, 0xbf742dfc, 0x102ead89, 0x04f4a0d5,
8004 0xc24f7482, 0x603373f8, 0xed720593, 0x874ce5dc, 0xb8d1af32, 0x505dcaff,
8005 0xa8e7d861, 0xfd3236e7, 0xccb7e822, 0x194a4fb8, 0x3be19b7d, 0x0cf7de5b,
8006 0xddcf16ed, 0xb7f9f686, 0x22f2ad14, 0x8a32473e, 0xafd7593b, 0xd7003960,
8007 0x044d8ec2, 0xbde05057, 0xfdf9d157, 0xefc5fbed, 0xfffb0844, 0x2f812ec7,
8008 0xd7da7adb, 0x6af3758e, 0x84d87a49, 0xa7e3e7fa, 0xee8e49d2, 0xfe44c47d,
8009 0x622c71ed, 0x01337942, 0xbf6c48cc, 0x56726f00, 0x151ccae9, 0x574ce5eb,
8010 0x8b117eb1, 0xec08bed3, 0x17a43aff, 0xb11fffb0, 0x7e4cfd43, 0xbf3cc7f0,
8011 0xba7a4a2b, 0x8967ac44, 0xd16d07dc, 0x73c3fd92, 0x635fc8f3, 0x26d6073c,
8012 0xdc2b01f6, 0xef18d955, 0xff261ded, 0xd6fde9ce, 0x1eb005d4, 0x2a3a9cce,
8013 0xba0df3e5, 0xd173c869, 0xbf2abecb, 0x623d016c, 0x086597e4, 0x9fca99ff,
8014 0xaabba167, 0xf89c7479, 0xe52ccda6, 0x728e9e98, 0x4beea06c, 0x3ba2bb27,
8015 0x89a3f087, 0x1adbd9f5, 0x3900fca4, 0xd377ed4f, 0x560f985c, 0xf74ff222,
8016 0xb53adeb5, 0x661f2126, 0x52dfa0b7, 0x3d45ab16, 0xf2665a5a, 0xaf27a845,
8017 0x1f617fc1, 0x73c7eedd, 0xf3055afa, 0xc71e18a1, 0xbabce9da, 0x794a85f6,
8018 0x4b91da40, 0xb0760e98, 0xe16511c3, 0x997e81b2, 0x477c83f0, 0x5ccff5c8,
8019 0xad0f3435, 0x3e47da40, 0x33ecddd4, 0x74863f87, 0x998759f7, 0x6309e5b3,
8020 0x9183a97b, 0x6a545b9e, 0xa60ae889, 0x3dd3b423, 0x850eda8b, 0x1c2115e5,
8021 0x50f3bdd3, 0x254c1f8f, 0x52dd4dba, 0x7bc35745, 0x79f5c14c, 0x1e99c700,
8022 0x1a49a0fd, 0xd35ef057, 0xb42ecb04, 0x5e22c71b, 0xa5d19c70, 0x6285c784,
8023 0x575afbbe, 0x159e9e10, 0xefcb68f3, 0x87873bc7, 0xcf78fcf9, 0xe90ea2e9,
8024 0x73ce31bf, 0x37f56543, 0x95c6def0, 0x74d85531, 0x33ae7c46, 0x53ce26c7,
8025 0x3802e006, 0x5538459f, 0xbffc9b84, 0x8f4d7e7c, 0xc819bf70, 0xbb8a5ab1,
8026 0xc4b1324e, 0xa32cabb8, 0xc8cdfe42, 0x4ebc1173, 0x0ba9dcef, 0xdfac4a2e,
8027 0xb8fd7444, 0x761fe7c2, 0xcd2f3c6a, 0xfd13d7ef, 0x7ee4ebc4, 0x487f9c59,
8028 0xdff6f011, 0xe79e36e3, 0x6c583a61, 0x0d2de60b, 0x25fe1fb7, 0xc4a4ca2e,
8029 0x18e830fd, 0x649d5718, 0x759f3ca3, 0x7f4b8f32, 0x337cc743, 0x8afcf12c,
8030 0x6ae9d04d, 0xe4af31a7, 0x77b71e5c, 0xe8f589ce, 0xc6be71b3, 0x567964b8,
8031 0xdd17bdc2, 0x91ffe4f5, 0x6ebecc71, 0xfd2e0f9e, 0x09044b6b, 0x78e51df4,
8032 0xa5587be8, 0xee92e5f8, 0xa17df96b, 0x7ba01e87, 0x1d2fa156, 0xbc5ea1e9,
8033 0xe8c6bf5f, 0x3bb059ef, 0x1f452ab0, 0xc45a57ec, 0x48d7e4c2, 0xfb2527f6,
8034 0x279b7e91, 0x563e69f6, 0x93ca718e, 0xa58f8beb, 0x88a67ee0, 0x91dbb9d1,
8035 0x8f7493ea, 0xedfb5831, 0x2b294f78, 0x24f4f7e3, 0x0525fbaf, 0x3ef3c216,
8036 0x1c63aeb9, 0x37d867e4, 0xbefff389, 0x7d7ecf17, 0x96f3f40c, 0x81ce18ae,
8037 0x099ba5bc, 0xae81e38f, 0xac64ecb1, 0xa0fba876, 0x5f4df3b2, 0xa5c0bced,
8038 0x68d7dfc6, 0x9639eaea, 0xcbbc93aa, 0xfa7807ca, 0xad3efd8e, 0x4e27f88c,
8039 0x575107bf, 0xb841e1c4, 0x7ecbfcf1, 0x137327d3, 0xbe7c60e9, 0x7c83edc6,
8040 0xbf9357d3, 0xceb84635, 0x7599bd94, 0x1c6b870d, 0x3d1bd5c2, 0xb7689591,
8041 0x0ff6b848, 0xa5fabf73, 0x934f155f, 0x0120fa8d, 0x12ff534f, 0x865bf69e,
8042 0xc0966786, 0xf28e4fcf, 0xb70642fb, 0xd5fd457f, 0xccf78461, 0x51ebb163,
8043 0xb3bc023c, 0x53de7f08, 0x15331459, 0x14acebf8, 0xe42959f4, 0xa8ce8f8e,
8044 0x17dbd0b0, 0xa75e7e53, 0x7743dbc6, 0x79e08a2e, 0x0b8bdf02, 0xe0dfd10a,
8045 0x7ba56e3c, 0x7949429e, 0x2f5cb222, 0x573fb1e6, 0xab0f1219, 0x78bcb9f3,
8046 0xd4f9b5f1, 0x596fbddf, 0xed83ca19, 0x5ef5df22, 0xef0da757, 0xc47895ef,
8047 0x2194057a, 0x2a117c4b, 0x3f2b7bba, 0x218ee9b3, 0xf1f133c6, 0x1be24bee,
8048 0x572c9e39, 0xbb7297e4, 0xe2aa3954, 0x2efb8739, 0xd9ee937d, 0x2352afba,
8049 0xe337fb99, 0xfe127d7f, 0x7d666fa3, 0x8acbd39d, 0x2aa3f47c, 0x037da5ef,
8050 0xfe2521ea, 0x9fc432b3, 0x0ff34825, 0x3b656dbd, 0x6a78c195, 0xe72bf414,
8051 0xe12fe727, 0x80b65e76, 0x7ae099ce, 0xc5abe020, 0xa44f52fb, 0xf387bd0b,
8052 0xa9713d22, 0x4c89cfc6, 0xef5d68d2, 0xce853c9b, 0xf917ecf5, 0x2c4bf114,
8053 0xc32efe43, 0xf76f0233, 0x0c45fb9e, 0x770da9ef, 0x055ee99b, 0xbf78f5a6,
8054 0x7a147409, 0x9a7ba35d, 0xf16a9e81, 0x5f17a8de, 0xfb869b3b, 0x66f903e8,
8055 0x3e40fb82, 0xe77d8797, 0x6f3a5ad4, 0x2e67daf3, 0x9ffe8135, 0x5d8557ce,
8056 0x39e18b12, 0xfc158d9a, 0xd84380dc, 0x4ed78e01, 0x8efc2035, 0x2ab3dfc9,
8057 0x4f767a09, 0xdbbe95be, 0xf9678968, 0x48740e30, 0xdfee5165, 0xfaeffba1,
8058 0x38ba0bcf, 0x8f2b9a1e, 0xe8e09d92, 0x3de2f7e6, 0x5c13af9d, 0x7841f708,
8059 0x33ee329e, 0x57b63d57, 0x06a378c2, 0xf8ba77be, 0xe24ca67a, 0x77dcd0f7,
8060 0x785dcfe9, 0xc2ba5eef, 0x4be8fee8, 0x3906cc0a, 0xd7c45f5e, 0x1632b3a1,
8061 0xe5fc851b, 0xb6af28d2, 0x0d9b7a33, 0x17c97aed, 0xf4a947a3, 0x97916add,
8062 0x29727abe, 0xe3a499f1, 0x57c105b9, 0x02366e91, 0x76493c5f, 0x9d302c4e,
8063 0xc72ae3f0, 0x95c7e3fc, 0x3fb71d58, 0x2fd42e2c, 0x819326a5, 0x380b8adf,
8064 0xec12c8dd, 0xee77b252, 0xf52cb410, 0xc6c45b7d, 0xb7ffbf30, 0xa3a566e7,
8065 0x2796da5d, 0x0dbf3ced, 0x095db5f1, 0x38e117a4, 0xbed2a5ff, 0x4ed7c5ef,
8066 0x6db8e034, 0xdbe42f30, 0x58ea7e7b, 0x9b49f68f, 0x2a7c4fcb, 0x26dcd7c7,
8067 0x9fbc1eb1, 0x2bff16fd, 0xbb8c6fe8, 0x47447df9, 0x43635ca6, 0x4cf787fa,
8068 0xad7bcfd8, 0xd81a0bf8, 0x07f90d4f, 0xcf66ba16, 0xb116efc0, 0x6bb42ae0,
8069 0x86a87517, 0x11ee177b, 0xb9e162f2, 0xd84d1614, 0xfc9c2c1f, 0xb6373a2d,
8070 0x8b1a5cf0, 0x8f75bd82, 0x8f7d1738, 0x0ac45738, 0x443b3d38, 0xdfe515e9,
8071 0x24bef7cc, 0xcbf995bd, 0xdf39f3bd, 0xb7e802b3, 0x14b1e949, 0xa71b10c1,
8072 0xebce9efc, 0x62ead7bc, 0x780492d1, 0x0473cd07, 0xd38c268b, 0x1b39deff,
8073 0x7d6067cd, 0xcc0efd39, 0x787841d7, 0x784bd5af, 0x91ffbe1c, 0xf40e3c06,
8074 0xc780ca3f, 0xd097fdc1, 0x96b5eff8, 0x13ff497e, 0x375fe986, 0xefd03fc0,
8075 0xf7b71a68, 0xa71ffcc8, 0x891ddf02, 0xf9edbdde, 0x331dfc4a, 0x017efd2b,
8076 0xa6aceaeb, 0x338f8473, 0xe77a673a, 0x83bddfe1, 0xee779af9, 0x8c70f8b2,
8077 0xae7c733e, 0x333d086f, 0x78c2b99a, 0xc72c979f, 0x7cd31417, 0xb4db9f92,
8078 0x32f30b88, 0x0b9aa56d, 0xc6d11f7f, 0x71bb9162, 0x236952df, 0x42e32739,
8079 0xe53fdfb2, 0x3b3cf2a9, 0x6f7907c9, 0x979112cb, 0x5e08ec57, 0xd4beeb81,
8080 0x13fcded4, 0xd283f6f8, 0xcc373a36, 0x33f69b98, 0xe1a36e32, 0xa315bf2f,
8081 0xf0c0305f, 0x7a13cdfc, 0xf77e0670, 0x18271043, 0xd82f51c7, 0xb5bcc41d,
8082 0xb8df620d, 0xfaf31ec1, 0x0de6e412, 0xb357da05, 0xe893da17, 0xf72fd276,
8083 0xdedd3946, 0x227e8050, 0xfcc4f635, 0xedb7cc22, 0xe976f711, 0x55778a16,
8084 0xfefba31e, 0xff7dcbe6, 0x8ebce49a, 0xd1da377c, 0x8694ce32, 0x6b687779,
8085 0xbef7e46c, 0x7af2a7d5, 0xa08c7ffd, 0xffb01073, 0xf9432d49, 0xfee55fb2,
8086 0x3adf1120, 0x67d0e62b, 0xf94058db, 0xe41f22f7, 0x744bf76c, 0x35d9e4af,
8087 0xebfd6863, 0xdd3ef85f, 0x973fb70b, 0x43beb1eb, 0xf563d24e, 0xde155f56,
8088 0x973fb85b, 0x5a9dabdb, 0xc122ad34, 0x579d5d7e, 0xe3f9f24d, 0x894c6335,
8089 0x0aef8ff1, 0xfa51b079, 0x1578b537, 0xb8f9679e, 0xd233fa32, 0xf4ec07a3,
8090 0x83a6513b, 0xfba2abbf, 0xe95a372d, 0x0faa0177, 0x875cdb8e, 0x8d34c3fb,
8091 0x074d91f2, 0x99cf04ed, 0x2d7efc75, 0x5de516fc, 0xf491c1d3, 0xa9f556fb,
8092 0x6c27ca71, 0x6095f14a, 0xe0feafdc, 0xffd7ba54, 0x057186e4, 0x644eff28,
8093 0xaf7405ea, 0xf43c06f1, 0x6343f509, 0x17b5f3f9, 0xe75579d3, 0x50e0d4c6,
8094 0x8fa9107e, 0xdaefef92, 0xdbde5b9f, 0x6719f885, 0x7dfca1f3, 0xb8f1f14f,
8095 0xd9f12bef, 0xf915c53a, 0xd77ad2f9, 0xbc7dfa69, 0x6f778efa, 0x43dcf462,
8096 0x73f72b74, 0x0bd5e3c9, 0x12dfb57d, 0x4bbf8b9f, 0xe052bf56, 0x624efc5d,
8097 0x7e9ca9bd, 0x7de24faf, 0xb73dd263, 0x24fd084f, 0x69af93cb, 0xd8205f74,
8098 0x1fe80511, 0x4ad8793a, 0xe3727674, 0x2eaf3a04, 0x9c07abc7, 0x4f2f80b8,
8099 0x7113e864, 0xf2169f5d, 0xdf257eaa, 0x30e7caa7, 0xe77f0c7e, 0xa5487e30,
8100 0x573eaebc, 0x92e30d3c, 0xef593df2, 0x4ab74f9f, 0x3fb597bf, 0x6f5a45f7,
8101 0xf48627a0, 0x49c17a64, 0x82f43a7a, 0xe7ae1775, 0x8c2c95c7, 0x5bf0cffe,
8102 0x8ec7f7fc, 0xfd92b21c, 0xef9c77dc, 0x9fdd076f, 0xe01788e6, 0x17a1a1fd,
8103 0xeb1c9246, 0xe0ef8fcb, 0xdf9db6f6, 0xf046f8ab, 0xcdff1162, 0xe611f711,
8104 0xf9f79da0, 0xed147b21, 0x9e29283c, 0xbdbb6610, 0x2a70fcf4, 0x940fff43,
8105 0xca63cf14, 0xeefd2f01, 0xdf176b0c, 0x3bfbe8c7, 0x5163820b, 0x0c59df2e,
8106 0xfbf03bfd, 0xe7def453, 0x521782a3, 0x5cb18a0c, 0xf52e5e31, 0xa42c1f9b,
8107 0x5e67cae7, 0xed2a7bfe, 0xed463da2, 0x62f06b21, 0x9cafc79a, 0xf310e76c,
8108 0xeef7aafc, 0x41182d1d, 0x06e128eb, 0x98dd933c, 0x05b3978c, 0x3b7bf126,
8109 0x74c91f1c, 0x5f9ebfd9, 0x5ffa1f02, 0x21f6bce8, 0xc6eb8ebe, 0x591cb859,
8110 0x63ec813b, 0xc86296d6, 0x88715b9f, 0xbbd0c3df, 0xdceb49c1, 0x843ff667,
8111 0x86fe28fa, 0xed7bf199, 0x3f4022c0, 0xf9a1e4c5, 0x4f9123e5, 0xcf2d64bf,
8112 0xd1e8fbb3, 0x39e60bf7, 0xfbf25cf0, 0xd2c97386, 0xa49d085f, 0xe1c63fa1,
8113 0x97e6d3d3, 0x255d7b71, 0x7aeff8f8, 0xf4eb346d, 0x0de16bbb, 0x711fc8e3,
8114 0xa41fa2d2, 0x775b87df, 0x4ae90981, 0x77f2172d, 0xbc9f9f13, 0x7bde4b2f,
8115 0x8a9f8c95, 0x7f9262c2, 0x33782c4d, 0x827ea1de, 0x61c259e9, 0x91fff746,
8116 0x6984df7b, 0xe29f9a88, 0xf485acb6, 0xf67be0c2, 0xbbf25f2c, 0xf5bbff6c,
8117 0xf42b5c2a, 0xd38795ef, 0xe07eaf50, 0x3a46fbe2, 0x5d7a8f7d, 0xc36cf3e5,
8118 0x83af300f, 0x4e14a605, 0x879276a2, 0x5dbc281f, 0xf341b9ca, 0x7ec17a47,
8119 0xebe83df0, 0x7fee429a, 0x710cae63, 0xc16c2bc8, 0x9fa94d3c, 0xc2668a42,
8120 0xdca7f373, 0xe3d21a7a, 0x19c5b5a9, 0xc60f302b, 0xda2567ad, 0x8ca3a1d5,
8121 0x78eb8bce, 0xf8c5f8df, 0x89fe32fb, 0x9fdbf7e8, 0x243bf461, 0xb4e4f3c3,
8122 0xed89b99e, 0x9eb90a73, 0xf6285f9b, 0xe44c8599, 0x8de32657, 0xb162fbaf,
8123 0xf0796aee, 0x2687da72, 0x4b78b7bd, 0xa487a0ba, 0x7fcfede7, 0x1ea0f297,
8124 0x4913de36, 0xef185fb1, 0x612c5783, 0x532c42e5, 0x61bdaf28, 0x0d739713,
8125 0xb92cceaf, 0x5ee9d78b, 0xef3b6985, 0x59e3dfa1, 0x12caebb0, 0xad16e5c6,
8126 0x05c7a483, 0xb412fe05, 0x555be2e3, 0xc345f217, 0x51e09516, 0x56d73ecd,
8127 0x8b7a7e78, 0x06bbec99, 0xbce9cf01, 0x9bad1a60, 0xe00b34c6, 0x4c16b4fd,
8128 0xab75fb23, 0xa4a1ddf8, 0x6f7bc079, 0xe043156a, 0x99d7c6c7, 0x043c53f0,
8129 0xa261bc1d, 0xbf805a75, 0xec70890b, 0x79bfc854, 0x33783f3a, 0xfec14fd6,
8130 0xabe9cf1f, 0x7dd0969b, 0x3ef8c936, 0x7d120b6d, 0x91f3162e, 0x471e4cf8,
8131 0xf10fb3e2, 0x2bd2f689, 0x85ef4853, 0x6291541e, 0x9fdd8bd9, 0xda7cbed2,
8132 0x99df2ba1, 0x8137cf8a, 0x9ea3a2dd, 0x6fb3f51d, 0xa35b9ea3, 0xfe7a8c52,
8133 0x962ce2a1, 0xff71afa4, 0x39f5ff39, 0x3d04a669, 0xf1c83ea9, 0xa4e73aa4,
8134 0xcff7a42d, 0xebe91d7e, 0xaacbee84, 0xf1ef7848, 0x83b8fec2, 0x37eabd61,
8135 0xc70d21fd, 0xa66f5869, 0xe975c979, 0x7ca079c3, 0x208d4f6b, 0xc5e5f7fd,
8136 0x4eb95fa9, 0xeb8df4fd, 0xde09e920, 0x9742affb, 0xf24c2718, 0xb05154e8,
8137 0x9d0437ca, 0xc6007a2c, 0x38b6fec5, 0xf3d2fee9, 0xa3e2571d, 0x5f05bd7f,
8138 0x71d71d53, 0xd1f91147, 0x74686f4d, 0xfb44e0c8, 0xc7c80555, 0xd02fa0f5,
8139 0xc4af516f, 0x647ba1df, 0x1ee9590f, 0xb74dfae6, 0xd5e38cdc, 0xb09ab71f,
8140 0xabe1d4fd, 0x495c1226, 0x2a780aeb, 0xfbde8a18, 0xbe05e28a, 0x3d81fc04,
8141 0xe72dfc41, 0xc1370093, 0xba29fb01, 0x08afa88f, 0x0e4133d6, 0xedc859bc,
8142 0x65df782e, 0xf7e6fa21, 0xd7cff561, 0x575f3495, 0x64df7cd2, 0x17ccdf44,
8143 0x782cf9a4, 0xe7c26adb, 0xb6bfee0b, 0xa73df704, 0x79a74dd6, 0x4ff0ca9d,
8144 0x553afe44, 0x210ffd00, 0x0fdc172f, 0x0bfb2cf3, 0xd3b76cf3, 0xcf3b0d7a,
8145 0xf60ef88c, 0x89f9e617, 0xcf3943a0, 0x0d3d34f7, 0xcf43f9f3, 0x2efd0caa,
8146 0xc6c0fca1, 0xbf4ebca9, 0x73321713, 0x4a6d087a, 0xdedf7ca5, 0x04fbfe6e,
8147 0x78c00e52, 0x260f49e7, 0xd55387a2, 0xd0c9e6fa, 0x3f07ffdf, 0x00b71737,
8148 0x0000b717, 0x00088b1f, 0x00000000, 0x7dcdff00, 0xd554780b, 0x733effb5,
8149 0x64932666, 0x08124c92, 0x3c984081, 0x49849009, 0x768a8802, 0x02d10478,
8150 0x89794f0d, 0x42100793, 0x69b5a05e, 0x0240cd6b, 0x350d45a2, 0x01d45a2a,
8151 0x0da2a281, 0xbc150a0a, 0x45622a03, 0xb68b57c5, 0x514026e5, 0x5ea0c679,
8152 0xffd7b5ae, 0x4e7dadfa, 0x5490ce72, 0x7dfbdedb, 0xdf1f7cff, 0x5afd9f66,
8153 0xd7b5ed7b, 0xe7bdaf5e, 0xcbaa3dc2, 0xe4e216ef, 0xff6f05dd, 0xf7a517bc,
8154 0xfc812eaa, 0x02cddf58, 0x2cc38ff9, 0x934a14fe, 0xfe70a68b, 0xa56b9b65,
8155 0xa689c422, 0xa141fdbf, 0x367d85fc, 0x0bf2a0b7, 0xcef74529, 0xea8f7e46,
8156 0x2fed415a, 0x259f680c, 0xd8b97386, 0x5deae544, 0x2e509a23, 0xcae61e1e,
8157 0x0df2f2a0, 0x09644261, 0x6856fbfe, 0x3be9237f, 0x6ba50b52, 0x34786f55,
8158 0xfd2f4da5, 0x6fa5c944, 0x578f3756, 0xf724abf3, 0xb97e34dd, 0xf9ed5855,
8159 0x399edca8, 0xf388472d, 0x03136d7b, 0x233f32d9, 0xb03fcb87, 0x5d8d7952,
8160 0x7bf85af8, 0x0e6a7dad, 0xd2b6e28f, 0x0fa98b38, 0xfae94a91, 0xea60ef18,
8161 0x938d317f, 0x8b7de342, 0x0e5c1fbf, 0xe7cb0edf, 0x9fa88a0b, 0xf6626d7b,
8162 0xf55dd973, 0x4ddb34f4, 0x6d46f61d, 0x553b577b, 0x3cc62588, 0x2422a1e1,
8163 0x477914bf, 0xa432be57, 0x7ca42abc, 0xa7cfbf47, 0x1f2f3914, 0x1fc6037f,
8164 0x12c785d1, 0x2c3b8f0d, 0x72eb1df4, 0x44d8128f, 0xbab12dff, 0xfe09cbed,
8165 0x9b88c6e7, 0x55a94fd1, 0x47cdae38, 0x5f9e0ebd, 0x86345589, 0x87bbe3e5,
8166 0xa6f3e9eb, 0xe2c31afe, 0xced11f28, 0x89bd53e3, 0xda9e4376, 0xab9ae09b,
8167 0x4ba7a3c1, 0x4ebb85b7, 0x7fa0f3ea, 0xa6b12d55, 0xbeeecd7c, 0x7c0693ae,
8168 0xfa7fc52f, 0x3449bfd2, 0x8bc091fb, 0xdddaabfc, 0xe892307a, 0xcdf14da7,
8169 0x17bf5375, 0x9d1d7e0e, 0x1f75e6ed, 0x9beb4459, 0x7f3ea6af, 0xbedbe698,
8170 0x426cf547, 0xfdd86fbf, 0xe7fd0c4a, 0x6e0f8b9b, 0x2fd5efa7, 0xddbb89a7,
8171 0xc50ff35d, 0x17dd85e3, 0xfbe953a3, 0x08f643f9, 0xb9e68c31, 0x9dac7e37,
8172 0x5c4762e8, 0xaf78b77b, 0xef5dd6d5, 0x35b5bcef, 0xdea1aa7a, 0x3d1ad179,
8173 0x252f40cd, 0x8bd62fbb, 0x5f9fc65c, 0xefc2efcd, 0xc7bd7d89, 0xf4bdf4aa,
8174 0x5ac6fdf7, 0xc35fbd28, 0xf736bddb, 0x6e096b13, 0xcf309eff, 0xfcfb8216,
8175 0x682db31b, 0x728dfe7f, 0xcbcdbd2d, 0x244f5fe9, 0x8b68fc63, 0xbc7d77a4,
8176 0xf70b6e35, 0x7b696a53, 0x8fda1aec, 0x93ebbfa5, 0x55d290d2, 0xcfc96a5e,
8177 0xb76f3ac4, 0xdc002fb5, 0x46b115e7, 0xe7eaeb89, 0xdb9bb77e, 0xc9f3df9f,
8178 0x270fe063, 0x4f901dee, 0x41f94d64, 0x3f2a3eb9, 0xa64151ff, 0x7f3dfa8b,
8179 0xf80f5f4f, 0xfb9b76c2, 0xbbb7a636, 0xf7d83ca2, 0xa7187f7a, 0xb9effd16,
8180 0xe90fa462, 0xca5e1247, 0xb8e4fae7, 0xabbf257e, 0xfb8b68df, 0x17e0d1be,
8181 0xb679b7bf, 0xeffcb250, 0x31627d69, 0x6ee7ec3f, 0x4d74a1d6, 0xf89b7098,
8182 0xbb864ac9, 0x22ec7844, 0x030b964d, 0x228995bd, 0xc9b0befe, 0xf1117dfc,
8183 0xbc5f7c09, 0x5cbdfcde, 0xa56ead34, 0x98092df9, 0x3fda0bbf, 0x6bec04fe,
8184 0x5ec5affd, 0xff7a0514, 0x4f54cc36, 0x40fe35f8, 0x255f091f, 0xc7c11fb4,
8185 0x8102519e, 0xbbdf5895, 0xe8679e54, 0xa775debc, 0x2287bb70, 0xab4167ff,
8186 0x5b8f5d61, 0xf0913584, 0x1c2edc7a, 0x47e8f989, 0xf5fa8508, 0x6c0b0bef,
8187 0x0f7726a1, 0x04b92afe, 0xc231af7c, 0x5bbe0822, 0x427ce05d, 0x49f7d8ac,
8188 0x5d29fa32, 0x356de853, 0xe6c177c0, 0xd4e7e87d, 0xe25dfdbe, 0xf8ef54d7,
8189 0x58d340d8, 0xddf8eb82, 0x1ba1a7aa, 0xb1af4eb8, 0xe1014088, 0x02212ee3,
8190 0xf27f94f1, 0x5a62e493, 0x7cb6cf97, 0xa4625c92, 0x36cc457f, 0x129ea3d2,
8191 0xef3ebc24, 0xfcd2ef61, 0x305cd38e, 0x5d7ad09f, 0x57866beb, 0x2ab867c7,
8192 0x87a3bb6a, 0x54f740cf, 0x5577f59e, 0xf7efb178, 0xcfa002d9, 0x3c5f8dc8,
8193 0xb9f40f38, 0xa14ae6d7, 0xa9f66bb1, 0x2de6955e, 0x0c81a8f6, 0x4f7b639c,
8194 0x9ce05744, 0x52e053d9, 0xd9aef30d, 0x7ce116a3, 0x62fbbf39, 0xf7366942,
8195 0x44edc533, 0xa03c07fb, 0xf8e09edf, 0xf7fd5b9b, 0xccd79ff8, 0x7f65ceff,
8196 0xf8037090, 0x9953c6c0, 0x07c4efe0, 0x79a6e6ff, 0xc6fccf9e, 0xad10bc8e,
8197 0x047f4123, 0xe09bb45f, 0x2af810bc, 0x8e5c105a, 0xd037aabd, 0xa5443acd,
8198 0xff4f19d8, 0x09137c32, 0xf82e84be, 0x94a89e08, 0x56705d11, 0x38eddbbb,
8199 0xa2382f67, 0x694fc173, 0x12f29342, 0x0dc9f3b4, 0x493a5afe, 0xbf1d7f10,
8200 0x70cae167, 0x8a4d0bc8, 0x97be8c27, 0xdcf955ed, 0x191bdb2a, 0x3f1816c0,
8201 0xd2f9c9c8, 0x1840d547, 0xa3a827e5, 0xea9b30ff, 0xf547be2f, 0xfb148ed0,
8202 0x07f6de37, 0x8375d61b, 0x881ca04d, 0x344b5c03, 0xfdec96b8, 0x8d0a67e1,
8203 0x2ddf78b3, 0xe2ce3007, 0x170f1407, 0xe8edf3a8, 0x8a43c977, 0x67405788,
8204 0x3a46e3b6, 0xce64d85b, 0x0bad122f, 0xc1fc1554, 0x9ef09dfc, 0x96fd415c,
8205 0xdd730eef, 0xa102f18d, 0x4abc42e5, 0xff68d4f0, 0x3b58cacf, 0xcfd500f7,
8206 0x3c6768da, 0xe2170f9c, 0xb5abf608, 0x0d204135, 0x1d6326b6, 0x6bf9efcf,
8207 0xe6b1d632, 0x2995ff77, 0xcebf59ba, 0xaa37b4fd, 0x2148a9d7, 0xc4514eae,
8208 0xfba0a9b7, 0xba8a538b, 0x201b6fa9, 0x9b36c5f7, 0xca879fbf, 0x8afc6c0f,
8209 0x3d85c1f9, 0x6eae81be, 0xbf6bb7e8, 0x892dc3fa, 0x02e18348, 0xd716f0e9,
8210 0x2427d80d, 0x35be620f, 0xdb4f569b, 0x97f0f944, 0x44b9386c, 0xf793864d,
8211 0x42c7f60b, 0x3efabf43, 0x80be06d9, 0x0fe48474, 0x1cf201b6, 0x7b9daa3d,
8212 0x4c77f6db, 0x9e06e8c9, 0xd71b6ea3, 0x5c100db3, 0xd17759ef, 0x845bd05c,
8213 0xbe0d1fc5, 0x775ebc2d, 0xa2b3c22f, 0x5d4357d1, 0x89ef82ad, 0xfed389a2,
8214 0x47d385a2, 0x5139f085, 0xc05c785f, 0x620310b3, 0xf3de3f81, 0xccbecf8c,
8215 0xadac7f37, 0xe8357821, 0x022b1fc4, 0xeaffe85b, 0x63508746, 0x46b5ed20,
8216 0xce5451a3, 0x5206fbb4, 0xd503edb9, 0x1dde40a2, 0xc7a7afa0, 0xa5f7fd85,
8217 0x718c4673, 0x2e1ff6fd, 0xaafe8899, 0x8c22a976, 0xd3b73bfa, 0xd44e8226,
8218 0x7c02fda7, 0x9ec2fe1c, 0x57b4be02, 0x6b979011, 0x35ef8f28, 0x80deada3,
8219 0xa4772f01, 0xd50f18d8, 0x9cf29929, 0x4d0f7ab6, 0xbbcf7ea2, 0xeb90ec4a,
8220 0x26cb876d, 0x25b1bce2, 0xd701d896, 0x1d63c3fe, 0x58b75829, 0xd59bef2b,
8221 0x8f71f57b, 0x547fd0b8, 0x6f0c07ec, 0x4445b663, 0xa3c6bb53, 0xa6460161,
8222 0x30a1f243, 0xc18daf0d, 0x37770ef1, 0xe317e3eb, 0x2a28c493, 0x044ea9df,
8223 0x255ce79c, 0x2da3ac2e, 0x0aeee896, 0x4ef36f6a, 0x0dfa9abc, 0x078b8d8b,
8224 0xd2526b7c, 0x8abf3d78, 0xbf3865ad, 0xcfc2f122, 0x08b6b7fb, 0x65fec6f9,
8225 0xe9bee32a, 0x35cfde21, 0xd47e390e, 0x51cf953e, 0xe343a571, 0x4abbefdb,
8226 0xc9059c69, 0x0f4147be, 0xc46dfc9d, 0x39fc02ab, 0xf96162cb, 0xe735f1ac,
8227 0xbd21f05a, 0xa48a6cfc, 0x563d7d37, 0xc0bab2f5, 0xe8d51e3f, 0xc8ab9573,
8228 0xa7986f91, 0xc345b7ad, 0x78039157, 0x3a2f61da, 0x9da5f384, 0x3cdce3be,
8229 0x01cd3890, 0x59ea853d, 0x7aa9cfd0, 0xf47631da, 0xfc01c33b, 0x3255ea2e,
8230 0x8b16ed01, 0x6fd8d5da, 0x22abd78b, 0x8dabe068, 0xa2ee3936, 0x1822114b,
8231 0x22ee35df, 0x7f6e3f5a, 0xe9045a29, 0x970c6ddc, 0xe4a31af5, 0x452379fe,
8232 0xb50f9fee, 0xf969b4f9, 0x7baf997f, 0x5cfd7ccc, 0x96b61fec, 0x46fefe48,
8233 0xa55bf50a, 0xa1484eb4, 0xec4eadf9, 0xa7bf03b0, 0x98225dea, 0xb2f78069,
8234 0xa08bc679, 0x7acedc61, 0x9f3c1c97, 0x3370f5ae, 0x75f35dfc, 0xd54e1e32,
8235 0x7b1e3227, 0x84c93fee, 0x53feaec7, 0xbcbc784d, 0xff1e4cff, 0x77d67d54,
8236 0x87b43ff4, 0xf826ddfe, 0xe74dfabb, 0xdf6ec571, 0x3b97f040, 0x980fc45d,
8237 0x505f886e, 0x3df15db9, 0xdbe4357e, 0xe404c28f, 0x7dc2afbe, 0xfe065c83,
8238 0x65ce0df0, 0x4982e7d6, 0xd17eb7e0, 0xeecd69cc, 0xded0138b, 0xfb017c4d,
8239 0x11af2f49, 0xf8270ced, 0x3583e885, 0x7cb9bab4, 0xf4106fb7, 0x4e8e1d22,
8240 0xa775e679, 0x20fb42df, 0xa3dfdf6c, 0x582f8fb1, 0x2878a7db, 0x46abd96d,
8241 0x7c75f71a, 0xb1a7a4aa, 0x6dc8be03, 0x68d5efa5, 0xb6ef7c47, 0x020e9797,
8242 0xdac3aa7e, 0x81f70173, 0x8b96ff97, 0x7dabe473, 0xfbe2074b, 0xf2cfaa36,
8243 0xdabdbd87, 0x5d2fe863, 0x5196fcb8, 0x5533a95d, 0xefd0ffee, 0xf435f6db,
8244 0x89db1c03, 0x0b9209bd, 0x0a2aebab, 0x0d83c64e, 0xff07ef79, 0x58b7c412,
8245 0x5d3dda1f, 0xeef9031d, 0x28799243, 0x948f7c3f, 0x100f861b, 0xe40a4b01,
8246 0x83670fbe, 0xb08f544f, 0x470aa0bb, 0x79611de4, 0xc384623b, 0xbffd50a5,
8247 0xdbe397f7, 0xa1a42f21, 0xe83c617d, 0xf164caf9, 0x1b6dc9ef, 0xf04ff642,
8248 0x34edeabd, 0x3ada955e, 0xfbc29c65, 0x7c153f28, 0xde2fadfb, 0x04d7f4d6,
8249 0x9c01cfac, 0xfbcf046b, 0xa9653f5a, 0xcf502bbe, 0xe7bd68e7, 0x7337aa0a,
8250 0xe864df56, 0x7e9ac547, 0x52112626, 0x947e64ae, 0xe5c83b03, 0x83d4b6e7,
8251 0x3e7c525e, 0xd7dfc1e0, 0x35f9c1e1, 0xfa384934, 0x62455e12, 0x8d1a7520,
8252 0xa2d5213b, 0xc0140fdb, 0xe39b443d, 0x965afd33, 0x1939f2c7, 0xfd1d0388,
8253 0x4b4ee3b3, 0xfc064ef5, 0x670ffd7a, 0x75f1cbcd, 0xf2e86e73, 0xb2deddbc,
8254 0x57b6700c, 0xfc7f5939, 0xeed44500, 0x41615989, 0x8a7a1a35, 0xf9f40d73,
8255 0x0e0b91a3, 0x8c7c26f6, 0x43cdf28f, 0xbc6fb3ff, 0xcaf2357e, 0x72f77881,
8256 0xeb7173d0, 0xc2efd648, 0xbca3377d, 0x981be1d2, 0x373c5340, 0x062837c0,
8257 0xbc517c87, 0x9451275c, 0xfc2dd453, 0x45629e12, 0xe518df8e, 0xc53f472b,
8258 0x5d8f2396, 0x23d66f81, 0x8d106f6c, 0x739fb9bd, 0x9dde5176, 0xe1e3affc,
8259 0xfd8f3698, 0x25ed7136, 0x75fedf9a, 0x82069e31, 0x1bceecb7, 0xba50d417,
8260 0x109452d0, 0xdf704d54, 0x575d4a96, 0xf6078bfa, 0x9cee7925, 0x4ebb834d,
8261 0xcaeadb83, 0x50e7ee34, 0x79741bb8, 0xeb0a17e5, 0xf947fc83, 0x81b1fd17,
8262 0x661f29bb, 0x74c1f8b9, 0x16395b9c, 0x886c93b6, 0x7a45bda0, 0x9c1a3be4,
8263 0x73bed28f, 0x35f7f1c4, 0x21189ef8, 0x683e27db, 0x507ec009, 0xaf0f7634,
8264 0x4ed513d3, 0x15634a8f, 0x721db70b, 0xb2f0a950, 0x31d7fcfe, 0x4ad7db7f,
8265 0xf54e6af3, 0xddbc07dd, 0xfe496f1c, 0x0df0e180, 0x6b790a9d, 0x3fc79cb4,
8266 0x1e793790, 0xc6cb84d3, 0x6b589942, 0xcd31fc81, 0x50b2a725, 0xba63fb91,
8267 0xde30daf0, 0x7ae3e14c, 0x7bb79def, 0x07bc4fa1, 0xbee0885d, 0xfbf9f851,
8268 0x74e0111c, 0xfd72089e, 0xe72b449b, 0x7d137c75, 0xd24bdcdc, 0x547d27c7,
8269 0xc056ffc6, 0xee646efd, 0xc79a3a80, 0x650687d4, 0xdcd57eb0, 0x5df3f19b,
8270 0xe8d54f70, 0x6feff686, 0xbfd88eb1, 0x699fa833, 0xdfec8437, 0xf5f5bdf1,
8271 0xfb47f8cc, 0xa74748e8, 0x4bece4fe, 0x5b4eb878, 0x4bbcebd2, 0xc2127f59,
8272 0x8fd1f2c5, 0xa85b7db4, 0x5a2f453a, 0xd26e239f, 0x89960897, 0x62259663,
8273 0x10afafbe, 0x3ad0156f, 0x15463ebe, 0xcbd35c0d, 0xfd68a6ed, 0xe13fe94d,
8274 0x0f5bd833, 0xe1af608b, 0x92f0aed4, 0x8218d5ef, 0xbdba8a7b, 0x27ca9631,
8275 0xc6bd27f6, 0xefaeefc0, 0xfd0ac3b5, 0xf37486ee, 0x66d949f7, 0x68b267fd,
8276 0x94fe3152, 0xfb7ae6e1, 0xb3a22781, 0xfea553f7, 0x21888622, 0x0b7af2df,
8277 0x1d3e718b, 0x2fda2e93, 0x69111c10, 0x2eb18fbe, 0x75ff27cb, 0x5615c601,
8278 0xb7ea9f39, 0x1debb655, 0x288b7927, 0xa7ac9c50, 0xca532293, 0x4a7fc825,
8279 0xd3d203f2, 0xcf4e6ef5, 0xf28f79d2, 0xce1ef5f3, 0x9d15a417, 0x6b25bf40,
8280 0x7d62b73e, 0xf8970cee, 0x9a696f2e, 0x762ab000, 0x5a441cb7, 0x809a2c16,
8281 0xa1d17663, 0xef4883da, 0x6adbd4ec, 0xe1d3be59, 0xd3a345be, 0xfda6a25b,
8282 0xe1d68730, 0x87aa3d96, 0x4da603f3, 0x790bdc9f, 0xa27be71b, 0x444baaa3,
8283 0x54572433, 0x012fdeab, 0xdb6f7797, 0xdf9a78c1, 0x18a3f527, 0xbdeacfee,
8284 0xfa99f70c, 0x4a4e9c89, 0xe81bfa2b, 0x673e2bcc, 0xf6f26c79, 0xd5126b36,
8285 0x5e2af42f, 0xbd6bdbec, 0xfda01022, 0xcf26deb7, 0x0e74f581, 0xc98f1f60,
8286 0xade8f699, 0x67da7c02, 0x6671a34b, 0x10a4b0de, 0x55194ce3, 0x1bbd456c,
8287 0x201921bf, 0xbf4e8ba5, 0xf9f5ee8b, 0x76eb6957, 0xf18565ee, 0x2d33b1d8,
8288 0xf2c17206, 0x907d695d, 0xf5d4bf12, 0xade048dd, 0xe18592e3, 0xc11a38ec,
8289 0x6ede86fa, 0xe648aef9, 0xd807cb3b, 0xb760c203, 0x2ceb433c, 0x99e6f20c,
8290 0x36e27e67, 0xe2672b9e, 0x18fabe5a, 0x922fedfc, 0x736491bf, 0xbff011ea,
8291 0xa03cfdfe, 0x9c9af393, 0x24467a4d, 0xcd6abfce, 0x84fe08ae, 0x690899fc,
8292 0x6cf91dcf, 0x2fec58d2, 0x4e1c478c, 0xf32bfce8, 0x7f5287d9, 0x6f1aeeee,
8293 0x8fc2cb5b, 0xb9fca11f, 0xa36fc580, 0x689ce9f3, 0xf03bff39, 0xb64ecddf,
8294 0x10a9ddeb, 0xb77f383c, 0x967ce3f4, 0xc3a88d62, 0xbc022bf9, 0xb714b3bf,
8295 0x55f88eb5, 0xf70f73e5, 0x44bdfd03, 0xe5451838, 0x648bad2f, 0xcd92f67e,
8296 0xfd0eac73, 0xfbfb2a3d, 0x3d3fbdcd, 0x3de91bbe, 0xc53ff955, 0x31c5a4f2,
8297 0xb57ecbfe, 0xd3da0864, 0x52fa2ef9, 0xa8bf4f7f, 0x3f69c304, 0x5fef34e7,
8298 0x1be097d9, 0xd2cda1b6, 0xcdbcd28f, 0xa1d2034a, 0x04386e03, 0x690df3bb,
8299 0xb05f6e6e, 0xc24d453d, 0xf817ec36, 0xee7c07f8, 0xec81e59b, 0xf6c7cfe6,
8300 0xc1725d13, 0xf4e5a510, 0x2c358246, 0x8fbe68f9, 0xf3c4d7f1, 0xfa77b5d9,
8301 0xe604f3fb, 0xe0071241, 0xf87bb62e, 0x37f80a1c, 0xf9cf3d62, 0xd7ac3cb2,
8302 0x061ff915, 0x25f39d9d, 0xbd2e7078, 0x55fc7a40, 0xcacc7fa8, 0xf3717cf3,
8303 0xebb0d1bb, 0x1c7e90c4, 0x5e487f0e, 0xafd404fb, 0x7e16e01a, 0xb1e03f6a,
8304 0x3f0226eb, 0x6d773bd5, 0x1d2a7ee4, 0xe5b9e81e, 0x4c1e2ebb, 0xbd789c82,
8305 0x0e8064f0, 0x2ffcca77, 0x2a3d7bc7, 0xe37cb54d, 0xa47f3297, 0xa445f388,
8306 0xbf515a75, 0x0f47ca54, 0x689fe769, 0xc8fe65cd, 0x5aeeeda4, 0x31525faf,
8307 0xf8a7d7ca, 0xadaec2fb, 0xde749b9f, 0xab61a555, 0x23fb65d8, 0x3325e763,
8308 0x79e7be5e, 0x2dced767, 0xec87bfbd, 0xfd4e1fc2, 0x3b036cc0, 0x3cbb06fa,
8309 0x7f10b7a7, 0xe7e8bd01, 0x0bfb8d34, 0xef6a5fec, 0x524d3f05, 0x849d9c95,
8310 0xc287a48f, 0xbef8ce58, 0x598ecfe3, 0x2eb6e7cd, 0x4844d567, 0x0567c83e,
8311 0xe5185fb5, 0x5bf30bbb, 0xc2f39da8, 0x1c86ceea, 0x7bca2332, 0x3a57be37,
8312 0x073193da, 0x45ef3f3a, 0xb9255abe, 0x7720cd2b, 0xd7bee339, 0xe51759f9,
8313 0xbe7cc66d, 0x91b1fd6f, 0x520c6704, 0xad22cf5d, 0x9c7e5ba3, 0xfc05bdba,
8314 0xc93081f8, 0x980aa38f, 0x0bf3e91f, 0xda15ffed, 0x33e23ef7, 0xe279d1af,
8315 0x738fdc23, 0x7af2b18e, 0x3ca96abe, 0xa170e748, 0x6c84011c, 0x79ce1d8d,
8316 0x6fe1146f, 0xbe1553bc, 0x3d45f46e, 0x1e7af5a5, 0x2bd099f8, 0xb0af54d2,
8317 0xfb1dac57, 0x5bcefbf7, 0x8d47d6d5, 0xbba9f9d0, 0x37767097, 0x5bcf396f,
8318 0x01f447c2, 0xdf2ac65e, 0x5b0ebe6f, 0xc3ac41d1, 0x9f1e6738, 0x539ce38b,
8319 0xc304f98f, 0x43df187f, 0x1f3a19e7, 0xf27ef8e1, 0xe1158fd2, 0x7dff60b7,
8320 0xdafb676e, 0xd3eb5b5e, 0xee7c25bf, 0x81ed925d, 0xf005e89d, 0x68cff05e,
8321 0x7bb3cb3b, 0x7c1f84a3, 0x84d4ef65, 0x2f45ec00, 0xdf044f41, 0x79642de8,
8322 0x77bfacb8, 0x7f53950e, 0x5f68c2fd, 0x2f345ec0, 0x069feb42, 0x7d15fb46,
8323 0x52837db8, 0xda0e66fb, 0xbe6488af, 0xf9203473, 0x706c7378, 0x9bdf4a9e,
8324 0xa814cf3f, 0xd6045477, 0xeddea2a4, 0xe5435fd2, 0x6fd43549, 0x122192f3,
8325 0xf951ffce, 0xf3ce68dc, 0x32738df6, 0x4cfb671f, 0x5f6f54f3, 0x697aaff8,
8326 0x51bcd5eb, 0x3d83f796, 0x9429e514, 0x9b63f4a7, 0xab573fac, 0x974691f7,
8327 0x0f99cfb4, 0x5a44a6f8, 0xd2fde741, 0x99d2c24b, 0xc2fb7929, 0x5948f3ef,
8328 0xe728db06, 0xc29f5c56, 0xcbd9a3f4, 0x5b7c6b66, 0x1c0d0fef, 0xcb2f2123,
8329 0xb70b39bf, 0x679e8384, 0x41b78796, 0xbe5a3bee, 0xfb7a0a32, 0x0c1a9f4c,
8330 0xa3395c83, 0xaf29dbd0, 0xaf5c62a5, 0xd74cb71c, 0xc0a582ff, 0x0eedcbeb,
8331 0xf7cb3771, 0x3ea302c1, 0x556fafa5, 0xa37898cb, 0x27615cde, 0x2cf042fe,
8332 0x9a6df6d1, 0x7d3bd7d3, 0xebe9f404, 0xf4fa8de3, 0xe40f65a7, 0xc6d2fef2,
8333 0x8def5b3b, 0xb90e993f, 0xfaa7226d, 0x0f7a9d78, 0x57e74dd6, 0x25db97a0,
8334 0xfb6b08bd, 0xdf298b47, 0x07887b30, 0xd389eaf6, 0x1d6f4c1c, 0x1f2ce12d,
8335 0xf08ecc37, 0xb0d76ec2, 0x06ed8c2b, 0x83fb6b37, 0x1ba628f4, 0xee28beff,
8336 0xf32ed2a7, 0x3065cf95, 0x0f60bcdd, 0xe515b93c, 0x7fb3872f, 0x8e5a32b6,
8337 0x24bbf95b, 0x29bd2e8d, 0x5fb17aab, 0x32a5e98e, 0xe5c31dc2, 0x7a678fbf,
8338 0x57dc367a, 0x7d127c00, 0xd2bc5db2, 0x258ccc1e, 0xe8d31ffc, 0xfb237a0f,
8339 0x98a36af5, 0xf796856e, 0xf59e3cfd, 0x797f9238, 0x437ddf3c, 0x7bb3ef39,
8340 0x3ec42efb, 0xf0c91e5a, 0xf2c9731c, 0xbcb19563, 0xb7dfe60f, 0xc5fc30f4,
8341 0xbcec8ac7, 0x55ed8e5f, 0x73fade59, 0x9f841a9d, 0x9acfa75b, 0x86dfc725,
8342 0xe1baa8f9, 0xd4dde4a3, 0x5595fccf, 0x7e6ed093, 0x7053edc5, 0xf69af6de,
8343 0x4369fb29, 0x4afcf3f7, 0x97d47fb3, 0xf98c9dee, 0x760764d5, 0x1e7ea41c,
8344 0x116a739c, 0xee9fd3d6, 0x3ef5869b, 0xe17d6f6f, 0xeb77044f, 0x5eb23f8a,
8345 0x6fb47d74, 0xd85fbe26, 0x5fae1bf3, 0x16bff2bd, 0xb6afce41, 0xcfd17a4a,
8346 0x7e8d1ae3, 0x1e6f8645, 0x7cae57ea, 0xc881f59d, 0x7f9223ec, 0xf8fdfede,
8347 0x5bbde9ce, 0xdda8505e, 0xd5bd88d2, 0x5c81aa9c, 0x94676b9c, 0x0692b460,
8348 0xed3d4a7c, 0x8d182bac, 0xa459f175, 0x5b74b89c, 0x4b181f88, 0x7fd9a091,
8349 0x16d2dda8, 0xf242bf19, 0x19f41d82, 0x7d297f5a, 0xf3df7ae7, 0x9168857b,
8350 0xdf7763df, 0xf75cb57b, 0xfc387060, 0xb09b19ae, 0xfd76e7ee, 0x77e8d326,
8351 0x872f4d0d, 0xacffce57, 0xeace5fb6, 0xbdb665fb, 0xb9005ed3, 0x7d33fceb,
8352 0xfe76744c, 0x3f9cc1c9, 0x112bb4ad, 0x577f974a, 0x72465a78, 0x65b78d7c,
8353 0x07e7e424, 0xe34befb5, 0xaf82465b, 0x384e7ce9, 0xff59725a, 0x85c96acf,
8354 0x47f3abbe, 0xc992d451, 0x992d03df, 0x4582ff68, 0x8ff853da, 0x3a78a8e0,
8355 0xd2dde369, 0x0cb7e10f, 0x26e87e47, 0x1a71f5e4, 0xe91f25c2, 0xa58fbe69,
8356 0xf9e63b4b, 0xbd9bf639, 0x7ad07f54, 0x707ca9bb, 0x9adf9cc0, 0x03e7ed2e,
8357 0xfa6fe243, 0xc3fbeda9, 0x213c8e70, 0x3fd7f5ba, 0xd4f38da3, 0x3c719d53,
8358 0x0acfa6aa, 0x6e1f4eb7, 0x80dbdf29, 0xf13a8fef, 0xf1126b7d, 0x6398a5e5,
8359 0x9e5fcf2a, 0xfb494f67, 0xbe790bcd, 0xe7179c24, 0xff821781, 0x67ca5885,
8360 0x7892be43, 0x3e3af3d5, 0xf2bfe743, 0xb04945a3, 0xae947edf, 0x7d3cf9db,
8361 0xde3a9740, 0xefa46c1a, 0x2e3f4364, 0x8569382f, 0x2c49ecde, 0xdaec1ab3,
8362 0xd81cf3eb, 0xe4378b57, 0xd6748c39, 0x10e0adb0, 0xece21c49, 0x2007ab36,
8363 0xf7035837, 0xd86f7e42, 0x05f8b6a6, 0x54bc3b97, 0xc0f3acff, 0x68b7a8db,
8364 0xe43e6c43, 0xe2fdbd6d, 0xcb1223f5, 0xdd0e700c, 0x9c875e66, 0xd87e7316,
8365 0x04fe736e, 0xffde80ce, 0xa0bcbb7c, 0xc8705f39, 0x83e4ff9c, 0x9c81675b,
8366 0xbdff55cb, 0x3f89f42a, 0xf384384d, 0x5e17d3f1, 0x2cfac68c, 0x41d94bfd,
8367 0x71a149e8, 0x0a6eb422, 0x56ff08f4, 0xb2e3e985, 0xf81e9178, 0x810f1e81,
8368 0x93a4619d, 0x683fe10a, 0xfebcb94d, 0xcb32d119, 0x5955744b, 0x64e0bcb7,
8369 0x57bf5741, 0x43b3acb6, 0xb71d0bce, 0x9c2ffda7, 0x6aec375e, 0xd964a3c5,
8370 0xc5637555, 0xd62df809, 0xf4013bbe, 0x854bfc57, 0xe7e28ae5, 0xbe0abd07,
8371 0xce63b6df, 0x9ace9c0d, 0xedd0f8c8, 0x2af78b7d, 0xbbca28c1, 0x5dba4946,
8372 0x7d615eb8, 0x1cd1a4bd, 0x36b65747, 0xd9a6de24, 0xf778be5c, 0x9f86fffe,
8373 0x18f1dcbe, 0x1e5c33c7, 0x05781827, 0xa7c55b7a, 0x153ded82, 0x330dbf9b,
8374 0x2d79cb97, 0xbfe1e7d4, 0xaee1e396, 0xcf3a5592, 0xd0c893b7, 0x574bf0f9,
8375 0xe1066a51, 0x8de6aafd, 0xbd9b94aa, 0x7597ecc5, 0xb0ce39da, 0x918221ca,
8376 0x28a1cf04, 0xdf45d7bb, 0x628fae2f, 0x18516179, 0x9cf99fc9, 0x438e708a,
8377 0xdda0c4f4, 0x965477a9, 0x25e2aa83, 0x571eaa1e, 0x56c5b002, 0xfc8a48c1,
8378 0x04bf3213, 0xd25526de, 0x3f00d78f, 0x1798cdd6, 0xab6f524d, 0x03f706b4,
8379 0xc0e79d2f, 0x4abd7336, 0x38d1e79a, 0xefe659c8, 0xeb9da2d5, 0x36feecd7,
8380 0x60ddf8cc, 0x527d65df, 0xc8556bd7, 0x7aa70433, 0xb3cb0447, 0x402398c4,
8381 0xef14ab57, 0x29150ec3, 0xefa0e39d, 0x2f964e25, 0xe7946ee6, 0x838c3347,
8382 0x0dd78390, 0xae67b966, 0xbe04cde2, 0xd670bac4, 0x1fdca9a7, 0x64e58bde,
8383 0x4e484396, 0x7daa3966, 0x12e39d8e, 0x825af39b, 0x1f9ac790, 0x0ad0f148,
8384 0xf3e47f32, 0x96709ee8, 0x4aa79a7b, 0x5d79a7b9, 0x31ff6e1f, 0x390beb40,
8385 0xf9b9e25a, 0xb71e1c9e, 0x89db2a9f, 0x200f523e, 0x7a133ab9, 0x41e5c102,
8386 0x67472eb9, 0xb04afac5, 0x9bfcfaee, 0xe0a3db63, 0xf1e512c7, 0xd86e4bdf,
8387 0xed879da2, 0xf003c2eb, 0x8a549c53, 0xf60c5a0e, 0xe4325ba9, 0xac7231f9,
8388 0x8f56ab77, 0x966519fd, 0x80ff77a9, 0xd07b29e0, 0xe9486ee2, 0xf5e1075a,
8389 0x27fe6266, 0x83e785d7, 0x958e46ee, 0x7963a7f6, 0x0e479f92, 0x73bf1c17,
8390 0xedefd6bb, 0x9a531619, 0x48f44118, 0x942c9cfd, 0xe1a8edf6, 0xa4076c45,
8391 0xbbb9ba35, 0x19359038, 0xb32a9cf2, 0x9afefd17, 0xa4e9e06e, 0xde52f18b,
8392 0xd94cb93d, 0x72f2e124, 0x5fc8dfbc, 0xf0fdb385, 0xe8de76a4, 0x347441eb,
8393 0x8d71cf82, 0xe8d3ad9f, 0x74cf5d66, 0xb98ba263, 0x3741b790, 0xd8b9e473,
8394 0xfada5749, 0x7af0dd12, 0x485d13b7, 0x6be211ba, 0x4b742fb4, 0xdf443b79,
8395 0x7bb7d4ea, 0x0e88b7d0, 0x6de8c89e, 0x074217a8, 0xf1181ac2, 0x252cfc8f,
8396 0x2a4762a3, 0x564904b4, 0x2cdc47e1, 0xd7c646ce, 0x4ac0d65d, 0x55bfa782,
8397 0xab00cbae, 0x653a3ba4, 0x5cf911fc, 0xd9f88bdf, 0x0b17fbe2, 0x4e2fd52f,
8398 0x4ab76c12, 0x2626f927, 0xa409db8e, 0xb0aa0770, 0xf68a50e7, 0xffb231c5,
8399 0xc46fa262, 0x5e7f51b3, 0xdcc69c4b, 0x2a7fc246, 0xfb407e58, 0xef6e7ce8,
8400 0x5ef6c8b7, 0xd303a52b, 0x5f6a3ee4, 0x2bf8c615, 0x264073be, 0x58d264e8,
8401 0x66249d33, 0x4f41394a, 0xbadd331b, 0x7e0890dc, 0x9838d250, 0xf08699cf,
8402 0xd85daaa2, 0x7d48cfa7, 0x4df578a3, 0xbe004793, 0xd83de367, 0xeca7a7c2,
8403 0x494aff60, 0x7f1f9ce3, 0x5b653d08, 0x98df7f38, 0x780f7be9, 0x17b8ad3f,
8404 0x250fa2ec, 0x27b15f33, 0xcb5f7b52, 0xa3bf73d4, 0xc77f8a74, 0xa62390db,
8405 0xfeb950cc, 0xb9ed2114, 0x338e51a2, 0x35b9ffd9, 0x3c9bfa91, 0x94f0e15a,
8406 0xf25770b6, 0xb455f832, 0xd1a63df5, 0x98b84377, 0x70139cfd, 0xcd4cc80d,
8407 0x24821f86, 0xe4e46ed4, 0xfd5a9901, 0xc806ca31, 0xc9c70343, 0x47d7a7fd,
8408 0x2d37e83f, 0xcfb7ee53, 0xe7a77db4, 0xbf5caf09, 0x5b584d6c, 0x5b52345a,
8409 0xf3a51070, 0x039ec6b2, 0x2a94999f, 0xde07ac26, 0x4d8aaa7f, 0x317b6f0c,
8410 0x4ca885f3, 0x8f82f837, 0xfba65914, 0xee99836d, 0xb7b4c6db, 0xb6f949dd,
8411 0x7ed2392d, 0x0bf3e9a7, 0x82e5825d, 0xef9231b6, 0x64896fb5, 0xd5cc73fe,
8412 0xed27151a, 0x97dfac5d, 0xd7f1246a, 0xe17b86ba, 0xda752e37, 0x2c7e70db,
8413 0xfb3a607c, 0x499b4bfb, 0xfd5c47bf, 0x4f7eb35a, 0x6658787a, 0xa87afa37,
8414 0x019a0e5e, 0x55ad951d, 0x36070e98, 0x997dec78, 0xcc2e29cf, 0x4c19ccaf,
8415 0xf32fff07, 0xf05c7384, 0x37fb7a65, 0xb091f784, 0xba0e0b1f, 0xd7c83a1a,
8416 0x3716e30b, 0x1a7eb315, 0xfe63ed99, 0xbc255035, 0xd4cf1d10, 0xec126fe8,
8417 0xd64be0a0, 0x97d8bed6, 0xdf6865af, 0x4e995ce3, 0xbe70eba6, 0x7366d06f,
8418 0xb6be0265, 0x9c16e155, 0x4a5693b7, 0xe77da6fa, 0xbb80bdc0, 0xfc0222ac,
8419 0x7ed6b8e0, 0xd16b0afe, 0x77f7ca46, 0x1c546b08, 0xe98f2be8, 0xfbe5903b,
8420 0xe9f7eb0c, 0xc828c42f, 0xd76ba50d, 0xfa34b849, 0xe323d610, 0x4f9c69e3,
8421 0xc3e4a4b7, 0x53d3a0ae, 0x766c6b20, 0x5d0308e6, 0x1e9850cc, 0x60873e68,
8422 0x55979d9f, 0xfa728f92, 0x32f41fbe, 0x1d306c69, 0x6a85d871, 0x76abc725,
8423 0xe20f0a24, 0x3b443a87, 0x241d23cb, 0xea3f808f, 0x27e7467c, 0x475e1744,
8424 0xeb7ad742, 0x3d6b657c, 0xde784681, 0xf4e0ef56, 0xb0977aa9, 0x5ed84f12,
8425 0x67f9c89f, 0xb69cddeb, 0xf7f167d4, 0x9c3deae7, 0x8a3f59df, 0x7bd42ff3,
8426 0x7ebbbf39, 0xabbfa722, 0x84efe22f, 0x3a4be61f, 0x93f9d1df, 0x9f3a5f4e,
8427 0x05aba50a, 0x33dc6684, 0x0fccf6a0, 0x79883e75, 0xf8bbf258, 0xa9cebe93,
8428 0x113f914a, 0xceb450fc, 0x5428ff01, 0x22f33ecf, 0xdca3b9e1, 0x1da1f1c9,
8429 0x0ec1f242, 0x8dcf83a7, 0x0dd8bb64, 0x32c340fb, 0x869ddb6f, 0xb95e7873,
8430 0xba06ac22, 0x5c36a9bd, 0x7d740d58, 0x29ac5d73, 0xfdeebf3f, 0xff50fad7,
8431 0x2df18b3f, 0xbb1cfac2, 0x7fa3d4e3, 0xdf8fefa4, 0xeb033a71, 0x796c704e,
8432 0x1edee308, 0x2ad1c1a1, 0xceddbae1, 0x08c0d2f2, 0xcfe14fa9, 0x2d738861,
8433 0xfb7d894e, 0x31e70437, 0xda061d6d, 0xc146b35d, 0x754ab32e, 0x1f2aa4ad,
8434 0xfbe8bd63, 0x2af5b59f, 0x7c630ba9, 0xfb6a3496, 0x4cff18d4, 0x57de3cf8,
8435 0x78a75cb0, 0xe91f8085, 0x41ec2ff8, 0x71c41192, 0x685011c5, 0xad94851c,
8436 0xae17b0f9, 0xe428fd79, 0x10eea574, 0x873ed5cb, 0x8428e393, 0xd8d676df,
8437 0x9077529f, 0xfed689eb, 0xc8c838a6, 0xf83b5ee1, 0xeb1b6805, 0x40759256,
8438 0x268b9f60, 0x94f1ef85, 0xd6cbdf69, 0xe2f8a628, 0xe655337b, 0xac32878b,
8439 0x14ca0e9c, 0x89a5139a, 0x5e9d29cf, 0x3c707f89, 0x9e535963, 0x2f81917d,
8440 0x4bdf6897, 0x78a62cb3, 0x321943c7, 0x98106a2e, 0x6777a505, 0x3217daa5,
8441 0xdc7373df, 0x24bf5ebd, 0xea757f2b, 0xe883f470, 0x8ff6aea0, 0xddb95a64,
8442 0x84970ca1, 0x59e741c7, 0x74e9c714, 0x72e82e7b, 0xeff8a7cc, 0xeb3f0c95,
8443 0x3ecf1559, 0x7bfc2cfd, 0xe30a7f15, 0x9862a9f3, 0x0ec8df66, 0xf2ce9c8c,
8444 0x8ca9d78f, 0xd72dfc84, 0x7fd3fc7f, 0x547c4689, 0x57694ecd, 0x690db4a5,
8445 0x6ce5edf5, 0xd0f6ab57, 0x9f0388fe, 0x5fcdfb35, 0xd14ff67d, 0xf897acad,
8446 0x5bf8b493, 0xdeaaf78e, 0xc0e38279, 0xd0afb8f4, 0x37ca3576, 0x71eaa7ac,
8447 0xb63fba01, 0xf78d9f70, 0x851ecd4d, 0x5d9a98f5, 0xe7c01317, 0x4aadf66a,
8448 0x272e2ee8, 0x5e3d5fb4, 0xd5bfb740, 0xc39fb588, 0xc384487f, 0xffad0ff8,
8449 0xaf546676, 0x62054353, 0x3b60aed5, 0x1c705588, 0x8e2d72c7, 0xc19023b3,
8450 0xe49ee17e, 0xc4f59aed, 0xedbf49f0, 0x1063bab0, 0x88417caf, 0x53addd89,
8451 0x7e7920fc, 0x047da39f, 0xed85f0bf, 0x1791cb2a, 0x7ef147b6, 0xff7edea8,
8452 0x55dbc441, 0x8dd8566f, 0x308e2557, 0xaa77aade, 0x0fe061c2, 0xc50bb035,
8453 0xd2e70cf7, 0x416aa3a7, 0x145a4b5f, 0xadf816ef, 0xde98ee1d, 0x35da7806,
8454 0xd61a5afa, 0x45d79232, 0xf814ff83, 0x5cce419a, 0x8e7ef7b2, 0xe77aa413,
8455 0x6df9ae59, 0x51b3c724, 0xce036f0f, 0xd80a1b33, 0x65a4bd4f, 0x05cb3547,
8456 0x105d23db, 0xccdb4e69, 0xd1be29f7, 0x9346fbc6, 0x4fc0ced3, 0xaacff682,
8457 0x4e030f2c, 0x5ad3cbec, 0xcedeab3c, 0xb3b64832, 0x0dfb7868, 0xae88e7f6,
8458 0xda5a4bfa, 0xfea9d3a2, 0xe7dfbb27, 0xee4839d4, 0x23ce25e3, 0x3f4738b9,
8459 0xf7c919d9, 0xf9d93eed, 0xd12f09eb, 0xc65ae778, 0xfb0c52f4, 0x1b20e06c,
8460 0x41b73fd7, 0x25f301c6, 0x5a0fd611, 0xb6673e78, 0x27ac2927, 0x9f84df03,
8461 0x8f9f3b33, 0xf63ef0b6, 0xab717bff, 0xc86b15b3, 0xb2eb847d, 0x5bfe8047,
8462 0xed11fbb5, 0x7fe5fd9a, 0xed6affa7, 0xa4529b7b, 0x3bef238d, 0xc20e3d08,
8463 0xd53beda5, 0x796efbc9, 0x2fef9d94, 0xbee6182c, 0xe8f81e71, 0x518e329b,
8464 0x043f77f4, 0x3bc16ffd, 0x596f6cf1, 0x41f7736e, 0x36c38bfe, 0x282c13f6,
8465 0xa1f51cf0, 0xed9d8c7e, 0x75b1224a, 0x6dadec04, 0xa8be5229, 0x933b435c,
8466 0xe88fdc50, 0xacf84fcd, 0x8f84580c, 0xa50793f2, 0x523ebaf2, 0xd9daf16e,
8467 0xfbe413ff, 0xc2ecc792, 0xfe2f7b8f, 0x5d7ea4e7, 0x0efd2a99, 0x517f608f,
8468 0xcc17195a, 0x4edd878c, 0x69ca9ba3, 0x9fa06e54, 0x4cc14dca, 0xed674fc8,
8469 0x72891ed2, 0xf9954de8, 0x46835eb2, 0xfd07e8a7, 0xceb8a5b6, 0x2bbbbcb3,
8470 0xb0ef404a, 0xed2518bc, 0xdf09bf21, 0xaf386614, 0xe9241a6f, 0x07f341b8,
8471 0xf848b7fa, 0xf8e41700, 0x4ca6f625, 0xb8fab9c8, 0x789ba24b, 0x78dab3bc,
8472 0xa49a224b, 0xc78b44ff, 0xdf1e7d43, 0xd3bfd826, 0xcb1864fe, 0x1efba7cb,
8473 0x9fe30179, 0xc730727e, 0x04a5b411, 0xf2e6ed16, 0xaee38e70, 0x082c2a78,
8474 0x327b3f78, 0x9f58ed8a, 0xf61ca4d9, 0xcb025459, 0x1ea28761, 0x3afe805c,
8475 0xe0298736, 0xc2299fa3, 0x2df2889e, 0xa80e59bd, 0x3f63afa8, 0x17b10549,
8476 0x4e94afc8, 0xd9f7dc84, 0x276cc196, 0x950decfa, 0xf7d0292f, 0x13eef835,
8477 0xc67e0b4d, 0x3ff4bff2, 0x6fea7e9e, 0xaff3bb83, 0xdb366c54, 0xd7f5f4c3,
8478 0x2418efcb, 0x0c7703ed, 0xcac97a92, 0x7fe92e41, 0x30796c8b, 0xf929e795,
8479 0xeb03ad03, 0x131fb47f, 0xd63f6f60, 0x714127b2, 0xccc1cf02, 0xdbef035f,
8480 0x7a759ea4, 0x42fd8dbb, 0x79462f15, 0xe774fed9, 0xb0ef7c15, 0x78729542,
8481 0xdbde4585, 0x99eed0ab, 0xb2674456, 0xcdf08b7d, 0x16fb6d7a, 0x8e471b55,
8482 0x01d6d9fb, 0xd4109fd2, 0xf0e42ff2, 0x7149b83d, 0x2c69e6e2, 0x05c86d5f,
8483 0x8e6e2f5e, 0x1a79f8e4, 0x87b88bc7, 0x5cfd9f8a, 0x116633e2, 0xae7407eb,
8484 0xd4ae7f31, 0x9dd573f8, 0x5ee0c757, 0xe5477881, 0xad1712fb, 0xbfe03e9e,
8485 0x4f7af8a1, 0x5f4b63e3, 0x41f99478, 0xc417ed25, 0xfcd52d59, 0x529f4bcb,
8486 0xba5c9e58, 0x9887eafa, 0x136dbeef, 0xb6705fb8, 0xe368fee5, 0xf8d5ec7a,
8487 0x0f7b5767, 0xf54a5fd7, 0xa337fb65, 0x36ad9e19, 0x5d09e00f, 0xfeddefc7,
8488 0x6a5ff529, 0xf242d15f, 0xf3e5ee45, 0xdc8e28bf, 0x95f027f6, 0x676ce1ed,
8489 0x7be7f5a3, 0x2d6c6746, 0x33ff308b, 0xbf3384cf, 0xf72b1339, 0x9e7427fd,
8490 0xe780edfa, 0x5db1f787, 0x02e9bded, 0x80e2d0e7, 0xae1d5fb9, 0xafdf1afd,
8491 0xc0c4f78a, 0xeb45534f, 0x7d68fe81, 0xdfedc47e, 0xd0fb71b1, 0x768e3cf9,
8492 0xf4fb0c23, 0x9ba64899, 0xbae4fd33, 0x1076799c, 0xb16d679f, 0xde09de92,
8493 0x674be864, 0x1b8a6562, 0x0a87a03e, 0x3387a497, 0x1ed85a63, 0xc1d94670,
8494 0xb64d9b69, 0xfcd3a8ab, 0x897f44da, 0x26d01fa0, 0xb58ea9ec, 0x80c72047,
8495 0xe7cc8fcf, 0xcefb8834, 0xd07376a1, 0xbebfce29, 0x84dcf259, 0xcf3e0578,
8496 0xe3f61b7e, 0x733df0b4, 0x564f269f, 0x4fdcbf6e, 0xdcaa7588, 0xeb3fb0ae,
8497 0x02fe7692, 0xddba5eea, 0xa972e89f, 0x6e22f15f, 0xb2e3696b, 0xa5fba025,
8498 0x81e6ebb5, 0x2c79f5ee, 0xb75feed5, 0xd3c32a29, 0x27fb4e16, 0x74f1f2fb,
8499 0x8a59aafc, 0x5c279f1e, 0x7b45f9fa, 0x2dcb2c38, 0x4db288e9, 0xa3655fd4,
8500 0x49c796b2, 0x395bf5d1, 0xb84f1d3f, 0x5efb02cd, 0xb9df769b, 0x70ebf9a7,
8501 0x524f04f6, 0x6d4fe496, 0x6f9ef229, 0xbef25bfb, 0x0a6fc5f6, 0x81fee262,
8502 0xfa91c83c, 0x7f047f7a, 0x72106816, 0x96e7c68f, 0x704eaec2, 0xfb306e66,
8503 0x9b36b273, 0x9bb643f3, 0xcd3bd9f3, 0xe6bddcf9, 0x7355e7bc, 0x7b7185de,
8504 0xfa09e177, 0xa103e236, 0xbe85236f, 0xfa94ceed, 0xb7d0f236, 0xc6df4291,
8505 0xc8dbe877, 0x1e46df43, 0xd0f236fa, 0xdf4291b7, 0x1a39f7c6, 0x7b352a9e,
8506 0xe381d629, 0xeb84f6d4, 0x5fbc00f1, 0x6049cc2e, 0x52ac2a3e, 0x24b0bd1f,
8507 0x4ec7e59b, 0x0754d33b, 0x38f499db, 0x7ca2b7a7, 0xc37ab2e3, 0x75647b7f,
8508 0xc76e14df, 0xdf9ae7f6, 0x6573fb49, 0xf613b87e, 0x9f55d68e, 0x13d886ac,
8509 0x444df288, 0xf6b60bfd, 0x556fc0ad, 0x6fec2bdd, 0x7ee15d6f, 0xfd7207e7,
8510 0xc7a2eed8, 0xdce3152d, 0x7d26df03, 0x7b6fc649, 0x6a3b461c, 0xac485fa8,
8511 0x3f21e435, 0xa1f39b35, 0x35f0207e, 0x355f69af, 0x6e3c1d31, 0xbe0bef6b,
8512 0x0749e27f, 0xa13af3df, 0x6cc4edd9, 0xba63cb17, 0x8f29df3c, 0xc26ca3dd,
8513 0x2b24bdf9, 0x1c77db8e, 0xd3dd30ca, 0x2f4b4d0b, 0xdabcb3e5, 0x58ab5f99,
8514 0x8cd94e30, 0xaf59fb15, 0x73e68c4e, 0xb60d16e9, 0x0dff9041, 0x440e0f70,
8515 0xe868e898, 0xbf10b8b6, 0xfd533f65, 0x4353bb61, 0x4c4396fc, 0x16d7d3e5,
8516 0x17b5ef98, 0x1f2a6d5d, 0x878cef68, 0x96ff4873, 0xd64b9f06, 0xe7cce8b9,
8517 0x4bd686f9, 0x847f3c56, 0x25bc56bf, 0x9a32d3e5, 0x7b40b787, 0xfe1f239f,
8518 0xe014ef39, 0x16c5bcaf, 0x54bef38b, 0x9d44873b, 0xb72e5cf9, 0xae2bbf0a,
8519 0x5dcaee8b, 0xed4b1bc2, 0x2536b4bf, 0x71dd1d33, 0x14255934, 0x2472192d,
8520 0xe57d0837, 0x8246278d, 0x8dd4aaae, 0xbf2a2ec9, 0xc56c0955, 0x71d3ec45,
8521 0xa4ae123b, 0xf8b4fff2, 0x75a2c91e, 0xef05b64a, 0xba3e0f9d, 0xbde04d23,
8522 0x9f6b1391, 0x3cb8e68f, 0x6d92fe8d, 0xc1d008ae, 0xf59526c6, 0xd4cdd814,
8523 0xd93a2eb8, 0x011f14d8, 0x8c7ca6bd, 0x717297e2, 0x0bdf49b4, 0x9aa147c5,
8524 0xe69b8efd, 0x2a90f17b, 0xf36a40ef, 0xf592ee5c, 0xaf6cba45, 0xe7d7b3df,
8525 0x47d3527b, 0x96be362b, 0x3f7d0b79, 0x2e7f783b, 0xd65784ae, 0x2f79e6ef,
8526 0xdadf6cb5, 0x1d7bd297, 0xd7985dbe, 0x45c6b7f2, 0x7ce3495f, 0x87c65db9,
8527 0x89f9b5ff, 0x4fc4fcc7, 0xc27a6cef, 0x8541fb0e, 0x1e876035, 0x46e4fe5c,
8528 0xae18e23b, 0xbf91b6db, 0xcc56da2f, 0xbefd00f6, 0x7c7aa7da, 0xf28f86b3,
8529 0x1706cab1, 0x60ffb3cd, 0x23ca4fc9, 0xa14b1c64, 0xdc35fa3a, 0x4db8b813,
8530 0x66bcc3c9, 0xe3b0ed14, 0x1a3bff1e, 0x37dd09df, 0x17a7871d, 0xabbd86f6,
8531 0xdf20f145, 0x89993ed3, 0x0f4472cb, 0x39b92fd3, 0x0869719d, 0x0a1fd5eb,
8532 0x8e70bed2, 0xd7e88764, 0xcf695587, 0xad123c43, 0xd83db973, 0x85e43a6b,
8533 0x0ffbe597, 0x8d0e7455, 0x2ede87ca, 0x169455c4, 0x744d568d, 0xd23e335e,
8534 0x0b660fb4, 0xfea2bec3, 0xa67e8966, 0x69498cfc, 0xce37faa6, 0x67e21a18,
8535 0x672aefce, 0xe99575fe, 0xdbaa975d, 0xe3856efd, 0xbf9ac67b, 0xd33b7a53,
8536 0xf6a60dd9, 0xe99a6255, 0x9b25975d, 0x133c65df, 0x8fa1d995, 0x41f76b95,
8537 0xb4dafb66, 0x9dfcadef, 0xafda6226, 0x7f3cd303, 0x8da5e794, 0x1dba08fd,
8538 0x9ffe367d, 0x1979ddd6, 0x898f19d1, 0x3bd85bf8, 0xe479667c, 0x42a9eb08,
8539 0x669543ae, 0x92caaa8f, 0xff2aa8f6, 0x9be23b11, 0x24d6ff09, 0x93754942,
8540 0xaa46f6c2, 0x938a48ef, 0x7df1dbf9, 0x075ef9a7, 0xf284bbfa, 0xf6316a43,
8541 0x35796857, 0x42e71bcd, 0xb047ec35, 0x6bfde983, 0x19f4eafd, 0xb43ecf7a,
8542 0x3760df1f, 0x6d8ae7ef, 0x23f60e3b, 0x8a2f4cbc, 0x497c43cd, 0x5b54cb65,
8543 0x74e5f671, 0x8bfdf3a6, 0x7fb616e5, 0x857e1c75, 0xdca3ace9, 0xddf191ea,
8544 0xd51f18ff, 0x0d6f695e, 0x3445bfa5, 0x1799f81f, 0x013c54ed, 0x5e03d645,
8545 0x432e81fa, 0x0dd492f0, 0x753c74be, 0x7ca42de2, 0x1c33fe31, 0x004a11f1,
8546 0xbc32f27c, 0xfad478e8, 0x2c13e45f, 0x013c1267, 0x3fa42786, 0xff742a31,
8547 0x20efc2dd, 0x84506c74, 0x3c6ef94b, 0xed24bb4c, 0xe4d30336, 0x2977dbbc,
8548 0xb3ebc81e, 0x7bf9592e, 0xc914bd27, 0x9319f538, 0x93b3fbcc, 0x7ee48a7e,
8549 0x81297999, 0xd36ffddb, 0x8fd177d1, 0x8d099fee, 0x5defd6ff, 0xddac1a2d,
8550 0x46211a4b, 0xc44ffb7c, 0x4072ebaf, 0xe749e74f, 0xf0d2e379, 0xf6ed4cef,
8551 0x951e5e1c, 0x3edaf1ca, 0xf3a88ecd, 0x4ed69f63, 0xca98b71f, 0xefa005dd,
8552 0x17b009fe, 0x4b4c6eaf, 0xe317be36, 0x3b63655b, 0x788af26f, 0x5dc38b4e,
8553 0x8a473809, 0x4d77c857, 0x27d5df8e, 0xe388fe01, 0x26bd6cab, 0x7fc7d751,
8554 0xe4593c3a, 0xe9c85f20, 0xb3617589, 0x3d78768d, 0xed2c1a6d, 0x7e39fa35,
8555 0x7a3872ce, 0xaadff636, 0x0508d15d, 0xfdeaba5a, 0xcf3a2e91, 0x8f7c5957,
8556 0xef7f660f, 0x85cf3e46, 0xec2e636b, 0x513cba70, 0x0fb0aab1, 0xffcafdce,
8557 0x9c31e579, 0xb615befb, 0x9fa3c804, 0x840aa07d, 0xc679d0ce, 0xe1a7c472,
8558 0xdd3fae92, 0x10f7c912, 0x1784553f, 0xea25a6fe, 0xe9975cfe, 0x0b3bdd5c,
8559 0x41deffe3, 0xb8c08ee3, 0x1889ad81, 0xc4cfe3d7, 0x1915beb8, 0x57d9dd31,
8560 0xbd66b4f4, 0xeab6f394, 0xeecd64f6, 0x791ef90c, 0x6270f7c8, 0x1e47be41,
8561 0xc8523df2, 0x4dbef8f7, 0x6c0c2ff3, 0x7e83cf68, 0xb22b1fea, 0x75bcf96a,
8562 0xbf7e4166, 0x80f08945, 0x78a2dcff, 0xc1bc70fa, 0xc4def966, 0xd57590f2,
8563 0x49da6bd3, 0xedd03306, 0x84392e0f, 0x8c6e6e31, 0xc7e53588, 0xea9afa39,
8564 0x4c52ba17, 0x0e25d7e5, 0xef5f9536, 0x7fe533ce, 0xa9a57598, 0x18cf64fe,
8565 0xa347fe53, 0x9fd537ae, 0xca6a9dea, 0xc7389f4f, 0x51667f54, 0xc6fca9b1,
8566 0xe54c4bd9, 0x4ccb7c73, 0x3fe579f9, 0xa9bfd535, 0xdca98576, 0x9c565c2b,
8567 0x77a17b77, 0x865fde11, 0x2de945de, 0x8d38656f, 0x9c7a3aeb, 0x7977dba5,
8568 0x5072694e, 0x36dea1bf, 0xd7ee25d0, 0x68070e80, 0xc0be67f7, 0x7e1bd2b9,
8569 0xf522a0c9, 0x417d23de, 0x42f5a137, 0x1e4747cb, 0x35a6e8b8, 0x7a2a7a2c,
8570 0xc4f895a6, 0x140e2be8, 0xf57e51a4, 0xad338553, 0x5f465fc4, 0x54f9e07d,
8571 0xb53d37ca, 0x3b0f964a, 0x51e51170, 0xf320df4f, 0x1a8b05d3, 0x7af90c8f,
8572 0x31e69f86, 0x6ba907fa, 0xd26ed23d, 0xa769bc6d, 0x80f0883d, 0x01e04d78,
8573 0x13e89069, 0x4fa201e9, 0x7d12afa4, 0x710ba596, 0xe913e890, 0xf13fd221,
8574 0x7fa4f7fd, 0xfa4c3d22, 0x49b7d227, 0x847a44ff, 0xefa44ff4, 0xf4e6cfd5,
8575 0xb71f7a83, 0x397d43fb, 0x6beb47a7, 0xf5c7fbf9, 0xb9fe9c75, 0x5ddfcfde,
8576 0x433b7443, 0xba31ed90, 0x7e1aabff, 0x76edd847, 0xfd1acedb, 0x9e578ac2,
8577 0xb2bfbaa7, 0x46b456a1, 0x5ab69f62, 0xba394f63, 0xf33d90fc, 0x6538ab5b,
8578 0x0f5ebf90, 0xe10d26f7, 0x98bbfbf1, 0x8fdf6b6f, 0xf203e989, 0x520a9d69,
8579 0x9f28297d, 0x2aba5f99, 0x0fc7f886, 0x81b5a9be, 0x74b43e5e, 0x0bfb7f7f,
8580 0x87da4e8d, 0x8c873378, 0xebbbf2e8, 0xf8ceef7e, 0x1e5f831a, 0x8e3d6cfe,
8581 0xf3c7f747, 0x473e219f, 0xf1eb93f7, 0xef6ad741, 0x707ee923, 0xef47fe3d,
8582 0x6092f0b7, 0x1acd77be, 0x512dcb2b, 0x38c41156, 0x35cf9c7a, 0xc43c968e,
8583 0xe9535c3b, 0x3eb738e4, 0x23ef1df4, 0xde2f3d52, 0x25fcdb99, 0xf2edcfd5,
8584 0xe6d1f7bb, 0x8f3ce541, 0xb63e4bc2, 0xc5a35ed7, 0x43bda01d, 0x753bf396,
8585 0xfc831188, 0xe1db2941, 0x7da8551e, 0x001c577e, 0xfaca47ea, 0xfe97f441,
8586 0xdd178d15, 0xc4068fb5, 0x6e21e4b5, 0x93b5406c, 0x8c36c6e3, 0xb9bdf209,
8587 0xded7b1e9, 0x4e22aad3, 0xd8c7e638, 0xfaa74f47, 0xefcf0266, 0xf00f73ee,
8588 0x5c5a7e50, 0x53a46f5a, 0xebb5de43, 0x62e67d66, 0xe97c755d, 0x4bd7d778,
8589 0x9e21b7c7, 0x5dfcf18a, 0x6eba17eb, 0xafa5eba1, 0x2ea5e153, 0x977f03fc,
8590 0xfad74faf, 0xfffb3ec1, 0xb70cfacb, 0xcc7df0b6, 0x07874ab0, 0x7ad77d70,
8591 0x262edcdd, 0xf1783ee0, 0xa441f725, 0x5f7cd24b, 0x8a967f80, 0xc05c1331,
8592 0x81cd4b91, 0xdeb4279d, 0xef59eff2, 0x077a90e1, 0x7cd60ae2, 0xbd79769d,
8593 0x1af521dd, 0x7ed60b62, 0x374ced2d, 0xe43d7ce2, 0xed1fb1b6, 0x1e3d70cd,
8594 0xa3ccebc3, 0xf1a71c75, 0x96a243a3, 0xd7120fcf, 0xf1df58fc, 0xcb8f52da,
8595 0xee72cc5e, 0x6e59a778, 0x514df09c, 0xd09dc623, 0xd68e442b, 0x6837e1fc,
8596 0x9a275efd, 0x7bd0dfb8, 0xf26837f2, 0xf93de869, 0xf26886e7, 0x01488a65,
8597 0x3c2f1a9f, 0xbded2e12, 0xd92ef183, 0x2f46926f, 0x8c556e69, 0x9f083d06,
8598 0x55f1cc15, 0x8b9077bc, 0xbf9cfd71, 0xfd38045e, 0x3f7208a1, 0x22918993,
8599 0x6c2123ff, 0x79039df2, 0xf55ab33f, 0x2ce427fd, 0xc2e65efd, 0xd8abdf70,
8600 0x4e44af77, 0x28f78f99, 0x4b8c15c6, 0xe303bb47, 0x1c9f2cdd, 0xbcb1a470,
8601 0x8b657d84, 0x6f7fdaeb, 0x6e92f9d0, 0x9106f795, 0x3a60dee2, 0xe9d7966d,
8602 0x86fe41fc, 0xed0215ac, 0x71cdb826, 0x1ffb7a38, 0x6b0ac6ba, 0xfdfccf41,
8603 0xfa7bb987, 0x66f3aec3, 0xb0f1a0ec, 0x7b19bf83, 0xf7cc78c5, 0x163ed8cd,
8604 0x39d98699, 0xbd3179cd, 0xa74e793b, 0x26f1aee7, 0xcf7c6b08, 0x1af1d678,
8605 0xcf1d4f8a, 0x2f5e02ff, 0x2fd78774, 0x37290b06, 0xa23e4a47, 0xac2ab7e3,
8606 0x1f671ef3, 0xa5445c63, 0x33e9e243, 0xb87b8c80, 0x3cf15775, 0xfd17a93e,
8607 0x7545ef81, 0xd43cb8a3, 0xc736250e, 0xc77f5e70, 0xef83ccec, 0x7c122746,
8608 0xea7c39d7, 0xd9cbc250, 0x492660fc, 0x0d93e230, 0xfaef7c0d, 0x07aab3dc,
8609 0xeaa57ff2, 0x4f01eb5e, 0x3f655379, 0x95e6f8a0, 0xc509f864, 0xa3e3eee6,
8610 0xaf121d2b, 0x32b3feba, 0xa7f788ad, 0xca241570, 0x3de4d5f7, 0xe81e5d72,
8611 0x8be3261f, 0x3dccfbf5, 0x232307c9, 0x1feb1f24, 0xbeaef926, 0xf38ed49e,
8612 0x48cfd449, 0xf74953e2, 0xb03eb045, 0x1a4de5db, 0x78ca7f0a, 0x75a79261,
8613 0x97a3bfbd, 0x5af03f7c, 0x68d0f991, 0x643f8fca, 0xef2a0113, 0xf14c2f18,
8614 0x946f8564, 0xfa16bbf2, 0x44b098fd, 0xfc0cafd2, 0x611ddc20, 0x32346f7a,
8615 0x8f94ce2b, 0xd533f4f2, 0x6a95198f, 0x0ef58f2a, 0x4fc79531, 0x7be537cc,
8616 0xaa655d17, 0x58f667df, 0xefafbe53, 0xa4fd5306, 0xbca669f2, 0xe49297ce,
8617 0x76a03127, 0xc0fda9ae, 0xfd5312ba, 0xf9857f14, 0xf7bf54fd, 0x9e025648,
8618 0x697f9477, 0xbc87966b, 0x96116aaf, 0x90ef5d91, 0xde5a3afc, 0x5ce89907,
8619 0x6491efc4, 0x0cccfd34, 0x8a8dfa8f, 0x46292673, 0xae24f7e1, 0x60f99b73,
8620 0x3f39a261, 0x2af795de, 0x2b9c6e96, 0xa828fe34, 0x6a929e80, 0xf3efa6ad,
8621 0x347c6a86, 0x9eb2e457, 0xefeb5dfe, 0xff5a621b, 0x4e5d7c50, 0x05e7cf0f,
8622 0x6f9ed2dd, 0xf9ec179c, 0x9ec0bc46, 0x9ec3cc6f, 0x7b0fac6f, 0xf61cb1be,
8623 0xc179637c, 0x8c1d3321, 0x83a66238, 0xe99a8e2b, 0xd0cfa740, 0xd5b2baf5,
8624 0xa7c21f4c, 0xb07f94f8, 0x6a7f575e, 0xf5d09fa6, 0xd78b0921, 0x1153826f,
8625 0xfbfca48f, 0x642eb5eb, 0x87d73abd, 0xf6f90df0, 0xbe50e0da, 0x48785b27,
8626 0xe4b77815, 0xd79e6d51, 0x27e5ad0d, 0x7d5bb6c3, 0xae7de6bf, 0x5f4355d1,
8627 0x871d5749, 0x1f070f9e, 0xffa4347d, 0x02f9fbd7, 0xfe3b3fa8, 0xf41db262,
8628 0x45df2ed1, 0xee1f036b, 0x49b715dd, 0x77bcba7a, 0xe39533f2, 0x9a598e18,
8629 0x82ebf014, 0xf036df18, 0x6bb39bcb, 0x1367f815, 0x458ed145, 0x8ff9cb88,
8630 0x17e464b0, 0x77f7940c, 0xdf2b7645, 0xe2f9d07f, 0x17192482, 0xf35432d8,
8631 0xdc647af3, 0xa543f3ce, 0xe3ca24dd, 0xe2e338e2, 0x83bf796c, 0x05e499d4,
8632 0xe1c7c039, 0x47c041f0, 0x69df85b3, 0x39b9b56c, 0x86ffc46e, 0x83f7e02a,
8633 0x72f90b1c, 0x35df2680, 0x0070e47c, 0x85eb41fe, 0x1c1d9ce9, 0x5be29870,
8634 0x99736e87, 0x892d39f2, 0x76c3faa6, 0x79e54dbb, 0x79532cc1, 0x298f21c1,
8635 0x28c8e23f, 0x8e2bfd53, 0x2bf94d7a, 0xea9a275b, 0x9169fd5f, 0xda249f29,
8636 0x077e061f, 0x3e8f522a, 0xe2553433, 0x7e382dc9, 0xb19dc16f, 0xa6a7def2,
8637 0xba72eb5f, 0xd3ecf71e, 0xde5439e8, 0x71f7681f, 0x5f43751c, 0x187be1e1,
8638 0x129f4d0e, 0xa7c03d66, 0xde772dc5, 0xe39bf0a3, 0xe578f596, 0xd3417d4e,
8639 0xdd39740f, 0x35ecaf10, 0x082f2bc6, 0xe03dfeeb, 0x3dd6d2ff, 0x7681fe14,
8640 0x9f86df39, 0x88def9da, 0x3c28570e, 0xda38b533, 0xefee8e2d, 0x25b2d8f5,
8641 0x1465259d, 0xfef41dfd, 0xcad3cd98, 0x365fdd6f, 0x4fd5a79e, 0x0bf0d5f4,
8642 0xfba567bb, 0x305bc7bb, 0xbe67ce4c, 0xd4f372c5, 0x32cf8e6c, 0x3bdf83bd,
8643 0x51fdea5b, 0xf3b74ab9, 0xe323105b, 0xdd8c44a7, 0x79edfa0d, 0x44cf893c,
8644 0xfbe468bb, 0xff9c5a47, 0xee5b6b4d, 0xf3454419, 0x7bda4ded, 0xe81b0160,
8645 0x9258d261, 0xd884f2c3, 0xb35765b6, 0xc7a2e493, 0x3f6cacea, 0x35ddbfe9,
8646 0xceb8248b, 0x49031bfb, 0x407d01ef, 0xb4be81b6, 0x71e54721, 0x1b9ec1ae,
8647 0x4df6fd81, 0xfb3d9c67, 0xced08405, 0x754fa90b, 0x874c6f43, 0xaffe3cfa,
8648 0xf143ede3, 0x42adeba4, 0xd74c338b, 0xd7f1d2e0, 0xf0d07769, 0x707fdfa7,
8649 0x6d15b32f, 0x8a3df272, 0xd2db8889, 0x4725afd7, 0x86ad65d2, 0x3f03d40f,
8650 0xa15ea9ea, 0xfb031d9a, 0xc7708772, 0x43a1bab8, 0xc2bffd3d, 0x9eff8e8b,
8651 0xc4f557ee, 0xc2f9421f, 0xeab7dd77, 0xd9ff4e89, 0x3e06577b, 0xb468e321,
8652 0x5ba40975, 0x677d3fd8, 0x6f3f7994, 0x8d7696cc, 0xa2beda71, 0x6799ddf3,
8653 0xf60217e6, 0xaa5586f1, 0x39e42fc6, 0xc4529c5e, 0x3a8b11ef, 0xe533cb17,
8654 0xcfd62f1a, 0xc80f85d7, 0xf5aee0f7, 0x455c2516, 0x9b6692f9, 0x15a048d8,
8655 0xf38fbbfb, 0x1b93bf66, 0x449efe71, 0x3726cdc0, 0x49b4b71a, 0xb94fec09,
8656 0xc5ecbdfc, 0x5c7ef94e, 0x8bd9bbe8, 0x2f17fd35, 0x86df602a, 0xcfee65fa,
8657 0x8f6bced6, 0xe12b7cf0, 0x0ba5bd67, 0x02de8d7e, 0xe8311df2, 0xf3b4aac3,
8658 0x8e969c70, 0x24fc3737, 0xc2795df1, 0xce16446f, 0xb76b46f3, 0xf89d7471,
8659 0x9d2afdd5, 0x1cc3c27e, 0x171a1faf, 0x4affd670, 0x1a7e7774, 0xd3d37fdd,
8660 0xdff4e83e, 0xa85f877c, 0x1e8969c3, 0xff043e05, 0x57e8dbbf, 0x8248f3f9,
8661 0x3127fd90, 0x6ab48ff0, 0xb98d89fd, 0xf44fdddd, 0xf1c5d8ad, 0xbe2cab10,
8662 0xf25c40ff, 0xef1fea19, 0x3ce5deb0, 0xf8fb8090, 0xd3bb3493, 0xe4d6f3e5,
8663 0x7ef2d1b0, 0xe55f8740, 0x2898eef5, 0x1f1373ef, 0xba77d815, 0x08aa7f1f,
8664 0xfbaa42f6, 0x466b7c49, 0x3f75fe31, 0x14707149, 0x61b339c3, 0x484f0db1,
8665 0x7b7c3eb6, 0xcbbb8461, 0x403ad27f, 0xe4f4e7c6, 0xc97e9947, 0xb8cdfdc3,
8666 0x73f71574, 0xca453b2c, 0x2cf78d6b, 0xd90d9d03, 0x67986c26, 0xdffbadab,
8667 0x23929819, 0xf852d1f7, 0xe21b7bd2, 0xac28567e, 0x84572c07, 0x7cc4071e,
8668 0x6c5fcf5e, 0x3285f2d2, 0x992acb7f, 0xc5ded56f, 0x3bd9aada, 0x98a44f30,
8669 0xedf0f40f, 0xf3043d9a, 0xe0798a40, 0xf21af83b, 0x83c86be0, 0xbe0f21af,
8670 0x0d7c1486, 0x51444bdf, 0xfd2a9e72, 0xfb0de33d, 0xf19efe03, 0xfe09b906,
8671 0xfe1e631e, 0xf87d631e, 0xf0e58c7b, 0xe1cb18f7, 0xe1e631ef, 0x87d631ef,
8672 0x8798c7bf, 0x1f58c7bf, 0x1e631efe, 0x7d631efe, 0xe58c7bf8, 0xcb18f7f0,
8673 0xe631efe1, 0xd631efe1, 0x58c7bf87, 0x629d737e, 0xacdd07f2, 0xba503bbd,
8674 0xa3e98e3e, 0x2928b539, 0x3ff7d687, 0xc7e7ff23, 0xf3ac54b6, 0x6efc25de,
8675 0x47845560, 0x44d373ae, 0x2116eeb9, 0x0e7db9d7, 0x76edf3af, 0xf1942f99,
8676 0x03f4a1c2, 0x74f8cabf, 0x0a4157e9, 0xf8520abf, 0xafc29055, 0xfd2ade32,
8677 0x57e1482a, 0x55f877c1, 0x82afc290, 0xa4157e14, 0x8520abf0, 0xfc29055f,
8678 0xbf07682a, 0x55f8520a, 0x157e1df0, 0xe0abf0a4, 0x038231fb, 0x2e1d15fe,
8679 0x26e9f9c8, 0xd0e8943d, 0x4cba87a4, 0xc6f9c879, 0x8df390fa, 0x8df390e5,
8680 0x8df390e5, 0xc6f9c879, 0x8df390fa, 0x88f11bf9, 0xef296f71, 0xde41db1b,
8681 0x9a73e637, 0x86c1affc, 0xf9c37935, 0x46b69157, 0x2e298f29, 0x9e72eb92,
8682 0x58ff059a, 0x1c92b86b, 0x763921eb, 0x8d676fc5, 0x89f892bf, 0x2b976f16,
8683 0x6f582dda, 0xbad37bf6, 0xe38282f9, 0x3bfe7383, 0x7f75cb91, 0xbad1ff2b,
8684 0xac14ede7, 0x90cb6c37, 0x3dede970, 0xd522a5c2, 0xbbe577eb, 0xbe3a17af,
8685 0xa5f98f5e, 0x28520e01, 0x910710f3, 0x1f33bb77, 0x2d5bedf1, 0x5d0b8c8a,
8686 0x4372e329, 0xe349aae9, 0x3b2d5b4b, 0xbb50440e, 0x83c562f6, 0x5699077b,
8687 0x0f96c871, 0x43e6d53c, 0x89cba89e, 0x6b83e2d5, 0x903c42af, 0x7f6eb70e,
8688 0xf7c13e24, 0x0bb746dd, 0x738d197b, 0x8ec217cd, 0x64985bdf, 0xda04f297,
8689 0xea1cdf41, 0x0c9bbc57, 0x4732bdf4, 0xff3e7b9e, 0xe8caabb2, 0xb5edd0fb,
8690 0xdd1ee157, 0xeed908a4, 0x33478f37, 0x2a34a71e, 0xc9fef09b, 0x8bc2ede8,
8691 0xd4bfb1fb, 0xddba1ee0, 0x71e32f65, 0x4eff7c5d, 0x4378b7ef, 0x2c17df32,
8692 0x13e3ad16, 0xf0a127d9, 0xde3ae6fb, 0x62af7e68, 0x0fe2c47e, 0x2ffc8ec1,
8693 0x7121c3df, 0xc3dcfbf1, 0x6c7866b9, 0xc4dbe221, 0xe40ef95e, 0xabc5e1e4,
8694 0xbe5c137a, 0xf2077c80, 0x5f6a2f9a, 0xf966fce3, 0xcf93240e, 0xcf8f8648,
8695 0x857e41c3, 0xe298ffdf, 0xe5e968df, 0x15e0bdc6, 0xdfd404b6, 0x0b503c2e,
8696 0xaf790906, 0xb6579f55, 0x57096238, 0x95e22f40, 0x11fd0378, 0x7a0198e7,
8697 0xf8d8f3c9, 0x56a9907d, 0x46fc0d97, 0x5d8a7397, 0x7542ec72, 0xf7df0c74,
8698 0x2e13910b, 0xb8e6f636, 0x8e3d7f8d, 0x93ef83a4, 0xce15df2f, 0xf88f8572,
8699 0xb9e6f807, 0x5977193c, 0x91c3ecb9, 0x38aed496, 0x8129d392, 0xf3df78ad,
8700 0xe88eea74, 0x11cb0a51, 0xdb5fc087, 0x7be79f1a, 0x5eabc582, 0x1710fbe3,
8701 0x96881f1b, 0x7fa4aaf7, 0x9bc34ca5, 0xa85a6f6e, 0x16994fad, 0x5ebc743f,
8702 0xe74bcfbe, 0x71f7bf30, 0x72c6d1b1, 0x28bca846, 0x880feb84, 0xb46f2b73,
8703 0xc5d3ddf1, 0x27578b6b, 0x777eee8a, 0xcfe32bc5, 0x349771b5, 0xa84e38da,
8704 0x2b477b5c, 0x965877f4, 0xd2e8726a, 0x27efe66d, 0x4fe44272, 0xad44fdfd,
8705 0xaf5bf14e, 0xa83964cc, 0xee71c6d6, 0xb94857f3, 0x0110ec48, 0xbf9867dc,
8706 0xef059c62, 0xe5dfcc58, 0xd0dd28f5, 0x7c9a3bd1, 0x12830934, 0x8a5ea7de,
8707 0xed32be60, 0xcfce3f52, 0xe9c894ba, 0xe4b2978d, 0xd11dac77, 0xbca16b4b,
8708 0x26beff5f, 0x1c44cd17, 0xb2e40165, 0x1dd74c3e, 0x2218d744, 0x4357e357,
8709 0x302bcabc, 0xf9b24fc3, 0x734e2156, 0xf7c146d2, 0x7e432691, 0x90d982a2,
8710 0x2fb00aa7, 0x3ef90a52, 0xef8544c6, 0xbe1e4cb7, 0xb407db4c, 0x11f3042f,
8711 0x37c3f77e, 0xf1006a7e, 0x3b7db337, 0x7d77582c, 0x6dfcf83f, 0x64e60efc,
8712 0x7bc762bf, 0xcf4d3e81, 0x743de9d6, 0xd4882c5f, 0x694e63ec, 0x8fb4eaff,
8713 0x9c7e5801, 0xc446f227, 0x2d802eb3, 0xb0b69fb3, 0x6ca8aa84, 0x1b9c9e59,
8714 0x94236379, 0x6ed37fac, 0x9162df32, 0xfe489ff7, 0x717578e3, 0xe50fb0a4,
8715 0xf92ad78b, 0xe1d79788, 0xd8d87afa, 0x777ac349, 0xe74941d1, 0x03eeccfe,
8716 0x5df960bd, 0x4cff2619, 0xf84a5a68, 0x105a3ec6, 0xfc63fad3, 0x5c84d0d2,
8717 0x889f1de1, 0xf9f5c877, 0x02e2208a, 0xdbf96ae7, 0x8ff2bd9e, 0x278c9c6b,
8718 0xedcd8fce, 0x3fe22377, 0x38fe65fe, 0x7f1ab15f, 0xf14daa37, 0x3de57379,
8719 0xdf5809c8, 0x7e76ecc8, 0xa66660c7, 0x212f9e4b, 0x72db9676, 0x845df2dd,
8720 0x694b7b10, 0x846f3cb6, 0x8f3c9dd5, 0xb66e3afd, 0x3ef3ea57, 0x33df336e,
8721 0x5cead3d5, 0xbff83769, 0xa0f127ba, 0x7ffbde45, 0xf1d812c4, 0xa06bd122,
8722 0xe6016fb7, 0xbde208fb, 0xcf1f7e19, 0xa3477f4f, 0xef694f93, 0x74f4e865,
8723 0xdf22eeac, 0xda712897, 0x9e81aadd, 0x7c28d6ca, 0x4ea4b11f, 0xadf627de,
8724 0xfcbde451, 0x8f57ec1e, 0xdf9af9cf, 0x17fc7a51, 0xc350b211, 0x91fb7cef,
8725 0x5d291cd7, 0xdd53fdf8, 0x7f926caf, 0x6f103306, 0x9c36b73f, 0x7afe41df,
8726 0x018fd158, 0x87b6647f, 0xf11269d7, 0x1a9fd434, 0xbe29fbe3, 0x07238897,
8727 0xf05c6f61, 0x7df8b7f3, 0x29bd9ae1, 0xf161eefc, 0x78d5bcee, 0x61ebe547,
8728 0x89723bbe, 0x2e9d8b7e, 0xea90e43b, 0x973e58c6, 0xeed1f417, 0xf6768ba9,
8729 0xf3ebe9e7, 0x0794ae60, 0x9c723c8a, 0x453e9a0b, 0x354db308, 0x7fe793d5,
8730 0xedd43ee8, 0x95f6a1a2, 0xbe2af7d0, 0x7b029ecb, 0x5760dd89, 0xb631edd5,
8731 0x7073e3ac, 0x77b7cf9e, 0xaf8dbbff, 0x4d4776eb, 0xa9d85d9f, 0xe84f66cf,
8732 0x9d7fb903, 0xbd1d82e2, 0x11bee9cc, 0x8765f5f1, 0x14f0886c, 0xf2dce293,
8733 0xe4bb92dd, 0xb72525bb, 0x9b3f31e6, 0xc7c9358f, 0xbc5187bd, 0x9402cb8f,
8734 0xdfbcf7c6, 0x657bade7, 0x53d01ec0, 0xe0f7cbd0, 0x7b5e5ccb, 0x2a2e419c,
8735 0xef4c526d, 0x17f9e818, 0x721da573, 0xc019a93e, 0xa6b74ddf, 0xd086f1d8,
8736 0x108f127c, 0x46baf837, 0xaa3b7a27, 0x932571c7, 0xf941c552, 0x9dc114ae,
8737 0xfe33c722, 0x9349514e, 0xaa063df9, 0xfedd72cf, 0xafee28dc, 0x4ef345d8,
8738 0x3862ea41, 0xa78c0f09, 0x3fa87bf6, 0xebc38f37, 0xd80c1a51, 0x8f983760,
8739 0xcfca1678, 0x186c0575, 0xbe51a4a7, 0x2b5be28f, 0x89adf1c7, 0x2e40e7b5,
8740 0x03ecbab0, 0xa360f28c, 0xbe78cf7c, 0x0411fbf6, 0x65cbcb2f, 0xf3dc2784,
8741 0x867defd2, 0x8358abe2, 0xd629acbf, 0xad365f2c, 0xe67d61b3, 0xc35ef0f4,
8742 0x971d1a97, 0xfbe18e34, 0x2f5665f5, 0x69f097df, 0xb2ebfef8, 0x27e1bbf0,
8743 0x90fcd399, 0x8d79052d, 0x3c097d2f, 0x829e06f7, 0xd23efc19, 0x678e70b2,
8744 0xe26ae39e, 0xfbe276f9, 0xe40fc201, 0xe3115715, 0x8fc4e89b, 0x66b2c038,
8745 0xc176faf3, 0x65df2513, 0xfde62e6f, 0xb3eac8b7, 0xac708cbb, 0xfb819fdf,
8746 0xdf68735b, 0xe127fde3, 0xcc7df1f2, 0xc8dc0f53, 0x3806fbbf, 0x8f28e781,
8747 0x3bde027b, 0xba61ba22, 0x4167e9d6, 0xfacfdc81, 0xacc35178, 0xec3f0ed2,
8748 0xf7a9f6bb, 0x06f3e420, 0xffd86f5a, 0x76a7da7b, 0x71a4005c, 0xddf265ed,
8749 0xab7dd0ba, 0x9f7d57ef, 0xdf56fbea, 0x8ad98fcf, 0x174a8982, 0xbdf3a1df,
8750 0xf06eb9f6, 0x77834934, 0x84aeb6ae, 0xc18557d7, 0x986237ae, 0x53f3dfdc,
8751 0xfd1ffbcd, 0xbd54dfa1, 0x03306c7c, 0xfaf53df7, 0xe3f3b8fa, 0x03ec3b64,
8752 0x30ea5bd0, 0xe5fd674b, 0xe262df5c, 0xfc9da51f, 0x04aafb63, 0x0a1d8ff0,
8753 0xdf96e1fb, 0xe5bee523, 0xe17bc8cf, 0xf8bf9667, 0x77aa2cf6, 0x0b8dc1fa,
8754 0xca2ff78c, 0x2c5f9282, 0xfc0b7924, 0x0f269163, 0xe5f4cc6c, 0xe7ec330d,
8755 0xc99ffbb2, 0xdb98fec4, 0x6f0a7792, 0xf9bcd1a8, 0x3f3fa3bd, 0x5787d2f3,
8756 0x5dcebbb9, 0x6b251e7d, 0x3b15b5de, 0xf493788d, 0x0756777e, 0x38a55b9f,
8757 0x6953e8b7, 0x61f33163, 0x8f7a4891, 0xa1eeb5d2, 0xa8dc50f4, 0x5a579cb0,
8758 0xfea03237, 0xd2ebf22f, 0x8df953b5, 0xf4bd7d28, 0x73f45f77, 0xa67f8757,
8759 0x35734eb6, 0x4c3d9e7a, 0xe5b9c3ee, 0xbc45f629, 0xf8ec53ff, 0x5a39cdbd,
8760 0xf3329cf9, 0x72f5cef7, 0xd5fbf275, 0x9fb827d8, 0x58eaf584, 0xcbf6936b,
8761 0x57ad97ed, 0x1d02e432, 0x9d9ac58e, 0x6f66a172, 0xcbc9a45c, 0x8d8b5eb4,
8762 0x71f8b5eb, 0xcfa55eb9, 0xbc17f5be, 0xd3f34653, 0xef93a3de, 0xecb4940a,
8763 0xb39b75e0, 0x852d9d66, 0x5864fdea, 0xa8fe298a, 0x05cf36b4, 0x35dcfd3b,
8764 0x07e06d1b, 0xf126193f, 0xf3f74a16, 0x1d62f8b5, 0x148f38af, 0xaf473f83,
8765 0x83b83e0f, 0x5975b9c6, 0x77f1b478, 0x3d1a02ed, 0xc6c6d697, 0xdad2bc61,
8766 0x7fa17be2, 0xe840e7e9, 0x2e113bfe, 0xf50945f7, 0x6279fd87, 0x55ef878c,
8767 0x377ed7cf, 0x43feb42f, 0xdafddd1a, 0x4cbfdf26, 0x92796c8a, 0x226a3be3,
8768 0xe913e03c, 0x8c01ade9, 0xdc067a0b, 0x2f7c8b76, 0xf5b2bd33, 0xa241c073,
8769 0x20f5c73c, 0x105b7bc5, 0xbf2813ed, 0x79ef22c9, 0xdd32aaa5, 0xa607e1a7,
8770 0x5e8b9437, 0x5f1efcad, 0x2151bbe7, 0x9b176af4, 0x1fdde0d7, 0xefc12f7b,
8771 0xa9f4e9a6, 0xa7d3a3f7, 0xcd3dbf4e, 0x9cf7d76f, 0xcd1489df, 0x49e592ce,
8772 0x0bb8d076, 0xbfc41bee, 0xf35df16b, 0x35ef6bb4, 0x4c37ce76, 0x65c7defe,
8773 0xfa974df3, 0x6df3cf52, 0x66e84c2e, 0xd4f3a1be, 0x431e89f7, 0x694fe9df,
8774 0x1394fe92, 0xd4639d0a, 0x70b2c4ee, 0xe7d3ab8e, 0xbff5dba5, 0x8f87bdef,
8775 0xf669c586, 0xc828d6aa, 0xdfb5f397, 0x99411151, 0x86a9f7c7, 0xaff9faef,
8776 0xf3a75fbf, 0xdab593e9, 0xef5a28f9, 0x75167ec1, 0xf50f7c69, 0x2889d358,
8777 0x627313bc, 0x6f4f848c, 0xde4dab77, 0x76511673, 0xbbcfde37, 0xfe3cd6e9,
8778 0x8d8594bd, 0xbd9f587d, 0xf98d2ea9, 0x587e4dc2, 0x1ea74517, 0x83e348b0,
8779 0xaf16b791, 0xd7f502be, 0xc2eff0a7, 0x4e7a742d, 0x43f6e7ad, 0x2313903d,
8780 0x53daa79b, 0xfa961e59, 0xbb17ee82, 0x7c451155, 0x127c0d4f, 0x3fb2cbfb,
8781 0xe2cfe71d, 0x983f52f5, 0xe06b1164, 0x50d81d3f, 0xf82fa134, 0xfc8ac3c4,
8782 0xe60d9a3d, 0x0e86bcf7, 0x7c02fa2a, 0xbc5df426, 0x5e2d6d5b, 0xe482a7e8,
8783 0x16d1d80e, 0x9e588b3a, 0x93e345bf, 0xf8db9ac7, 0xaf1d7ebd, 0x78bfe08f,
8784 0x7ec42aa7, 0x1a276a14, 0xff07d9a8, 0x7b8faf1f, 0x0080003d, 0x00000000,
8785 0x00088b1f, 0x00000000, 0x7cb5ff00, 0x65545c0b, 0xce7bf8da, 0xc0cc2b99,
8786 0x1245c880, 0x85848b87, 0xd780c034, 0x508151da, 0xb9bba0bb, 0x658e21ba,
8787 0x500665ca, 0xd7775ddb, 0xa6a18cfe, 0x45fa7d66, 0x80ed65a6, 0x76c36a97,
8788 0xa8283448, 0x59990bc9, 0x6a37627f, 0x5b63b92f, 0xba402de6, 0x6dbfedfc,
8789 0xbcf3cf7d, 0x511730e7, 0x6fbefddb, 0x797bf9fc, 0x9f5ef3df, 0xcfbcf3fb,
8790 0x8c346339, 0x63181b75, 0x418e8b2a, 0x89486839, 0x8d8c9964, 0x615f6909,
8791 0xf6c3894c, 0xc645db25, 0x7cfb4046, 0x1962c893, 0xfa31d72b, 0x1fbf8f7d,
8792 0x3c1f7631, 0x42f3c337, 0x07d634a9, 0xcc37d7fd, 0xd6c972a0, 0xf1ae6dc2,
8793 0x2509258c, 0x606393b1, 0xb66ae3c0, 0xce258a07, 0x2b307719, 0x8da4d3cc,
8794 0x73c325d2, 0xc7292bb5, 0x496f9fe0, 0x0c4943e3, 0xd4699dc6, 0x7b4377cf,
8795 0x414e6981, 0xba5f8c14, 0x325b2a33, 0x6f5dfbfb, 0xc91b1811, 0x4673a558,
8796 0xcc614b1c, 0x67e1ddf1, 0x1fb0a94c, 0xf304d398, 0x7709e57f, 0xa38ba0bb,
8797 0x82492dae, 0xb3aa3c23, 0x7fa058a7, 0x6f31d895, 0x4e73cc12, 0xa04def70,
8798 0x5338e6fe, 0xe5a1fac0, 0xccc63ae9, 0xff398ce9, 0xcf3487cf, 0x3b89e2e7,
8799 0x8778c016, 0xce047f73, 0x1ff8f553, 0x6c3201f2, 0xb2cf689d, 0x8dbce1e4,
8800 0x1c124d7b, 0x56637b74, 0xbee39c09, 0xda46c7c7, 0xf79f2f33, 0xa8b668b6,
8801 0xdbcbda04, 0x6957c118, 0xd48ee85f, 0x5eeddc20, 0x696131a6, 0x28689a62,
8802 0x956c48cf, 0x52dbca07, 0x06b9a2d8, 0xe10dbb7f, 0x899eeb00, 0x025492dc,
8803 0x9f7b15ed, 0x79433248, 0xa5ebc8d6, 0x9c7a7f7b, 0xddff4045, 0xd5e20d5a,
8804 0x0b1a62ae, 0x25d7bb8c, 0xb250dcd8, 0x12c668f2, 0x7d6ea310, 0x59b19199,
8805 0xaf9a7096, 0x630e7b62, 0xc17dfeb9, 0xab3f6a73, 0x8fb8c562, 0xd903f531,
8806 0x8bfca1cb, 0xe21f7bca, 0x7ab52ff3, 0xf1192b8b, 0xfcbc2662, 0x84548b65,
8807 0x05fbaeed, 0xfac05636, 0xac1a637e, 0x6ac9165f, 0xf4a17c71, 0xcf049b57,
8808 0xb2101c57, 0x787b30b5, 0x1ee6b766, 0xd1169103, 0xd389b559, 0x75768ad9,
8809 0x7fe02251, 0x2d408b45, 0x3357950e, 0x2f2abe1c, 0x80e6664d, 0xb6b656fd,
8810 0x8eb0cc68, 0x09ce19a3, 0x539e1dfd, 0x5e78a59a, 0x7cb185b6, 0x89fe27c0,
8811 0xa53e6bf8, 0x3f0037b9, 0x2e1cadd5, 0xbede56ce, 0x3b900338, 0x1362b699,
8812 0x26dea0d2, 0x6b3ebd50, 0xaa35fcc2, 0xfcfe7ac0, 0x9a586935, 0x354c4e08,
8813 0xf0025490, 0xa3d194dc, 0xd73bfc41, 0x5d42f3ca, 0x0d5eb01d, 0xde48e512,
8814 0xf1c06a9e, 0x3caf1a66, 0xd146b677, 0x6c33af78, 0x3609bb03, 0x61506d51,
8815 0x4434ef59, 0x56b3b960, 0x715950cc, 0x09166173, 0x1611dfe0, 0x6122c591,
8816 0x3d5eaaca, 0x3b501240, 0xf6845870, 0x83fb48dc, 0x0c719f48, 0x33e802b8,
8817 0x06057991, 0xf9dfdff4, 0x7fce2e59, 0x17df18cb, 0x5eaeb60c, 0x017e7d33,
8818 0x8b26c3d0, 0x5f4c8e7c, 0xc8f1d22e, 0xb0af4043, 0x6cd5a7bf, 0xcf073e83,
8819 0x42e6c257, 0x08c2cc3b, 0xb984dfcf, 0xafdfc0f7, 0xce226f31, 0x54de74cf,
8820 0xcc9af71c, 0xc35a25a7, 0xf5f60106, 0x63fb149b, 0x053b8fb8, 0x116cf8f5,
8821 0xc58d2071, 0xfe6afd7e, 0xc2796d9c, 0x4ffc03a6, 0xa367e8e7, 0x4062e645,
8822 0xf1519aa2, 0xc163a406, 0x60ab6366, 0x0f3307fd, 0x2e80cbdd, 0x31d01e1e,
8823 0x5eaf9c2d, 0x7d3dcfcf, 0x0094ec20, 0x2a8f46fd, 0xf4165916, 0x2958ab37,
8824 0x29943ff4, 0x9fd8557a, 0x9fd8dce9, 0xbe6d0ae9, 0x8196590c, 0x7a88d0fc,
8825 0x78eff51b, 0xca011bf3, 0xe1e2e944, 0xe2573848, 0x3d4b052f, 0x3c1b29f4,
8826 0x85fff4fd, 0x5352f4b2, 0xfca1efcb, 0x19bda475, 0xb0727751, 0x501d94f8,
8827 0xa3c9b0f6, 0xf9f264b3, 0xf1dff702, 0xa2226fab, 0xfabeff45, 0x7bef4e07,
8828 0xcea58ad9, 0xe9b8c022, 0x9b57921d, 0xfa7ef975, 0xa9e361e3, 0x39e18fd4,
8829 0x5ba20dfb, 0xe1ffb010, 0xd37f710f, 0x14af0675, 0x17d4e381, 0x38ff3a7c,
8830 0x751d1e66, 0x284646fa, 0xb1913ef8, 0x8c3cdc58, 0x7068b81f, 0x6fb9c137,
8831 0xa14ff991, 0x488b1eaf, 0xf191e9f8, 0xe991c0a4, 0x7e9122b2, 0x5e8ad5eb,
8832 0x4cb385f0, 0xe8d67f3f, 0x5e0cff38, 0xff386d12, 0xcdd6b960, 0x8ec18a60,
8833 0x5727d254, 0x007fa792, 0xd740ca79, 0xfb6a97bc, 0xf90fc233, 0x78fc074a,
8834 0xc02f0c97, 0x25f9c33f, 0x64bbfe79, 0x1065ddb8, 0x127e9c39, 0x6e992702,
8835 0xf650ba14, 0x5863982f, 0x9f1fb469, 0x47ddd7ec, 0x8f099323, 0xe383ffe3,
8836 0xdfc213ef, 0x01d62737, 0xff51b11b, 0xfc784598, 0x579fc05f, 0xf80bfeb4,
8837 0x9fc50eeb, 0xe23d7f57, 0xd2d171ef, 0x0880fc84, 0x26d2a1c8, 0x0658f9c2,
8838 0x932ffe23, 0xe09b2cc2, 0xffe4767c, 0x8fef889b, 0xfc2bdf22, 0x37d8a63e,
8839 0x49e4f51e, 0x7dc19ec6, 0xb50f44f9, 0x10a766a7, 0xbac75f9f, 0xf01db013,
8840 0xf117379c, 0xe876d82e, 0xfb7d2c24, 0x5df5865e, 0x1ecb0615, 0x5bbf6f38,
8841 0xfe61a974, 0x8ef72886, 0xc36eb0a5, 0x1716995d, 0xd59633b6, 0x3ca07286,
8842 0xbe7a82cc, 0x85cb8a21, 0xa4e90586, 0x277e0f87, 0x73c2ad25, 0x34b3082c,
8843 0x6c86ff41, 0xa01323df, 0x6cd630de, 0x57d74171, 0x1dbe9605, 0xd1d1cfc7,
8844 0x38730d3a, 0x323c36dd, 0x057a8dda, 0x7af3cff4, 0x1e593fa8, 0x0d9cf0c6,
8845 0x6884b68d, 0x2297cba0, 0x61b3a3ec, 0x4e24a3ff, 0xd0c90dd7, 0xa136e50e,
8846 0x387dc164, 0x6fbe78df, 0x17b082df, 0xfa2cc2f7, 0xd0591034, 0xb195727e,
8847 0x42a5e509, 0x73a57797, 0x75c63779, 0xc9c2076a, 0xd4659d35, 0x937ffcc2,
8848 0xbb814be9, 0x556c6360, 0x0afe1fb4, 0x70c8c59d, 0x7a735617, 0xe5974d73,
8849 0xd7733562, 0xe65f080b, 0x96f8070b, 0x42414169, 0xadd93469, 0xe5faefb8,
8850 0xf7091780, 0x527fe1cf, 0x619ee564, 0x2847e7f8, 0x4c88f32c, 0x328fe404,
8851 0x0ca3f9c6, 0x6fe908e9, 0x0051d015, 0x75df31fd, 0x65c3a751, 0x6bf1823a,
8852 0x70d3258d, 0x3f85cfbd, 0x89e363e4, 0x87f34a7f, 0x3656675b, 0xf40b0397,
8853 0x9fd899f6, 0x51148eed, 0xf130ae5f, 0x7f644ef5, 0xc5f51a36, 0x79bd5fc9,
8854 0x23c7961d, 0x86cb6e4a, 0x7c16dbfe, 0xfce2845d, 0x353e096f, 0x0b6fe39e,
8855 0xb468fffe, 0xbf56ca43, 0x43fef449, 0x192859f7, 0xaf4e5032, 0x15a67d04,
8856 0xb074e4b0, 0x74463ef2, 0x896ac890, 0xfd65e36e, 0x47a30c05, 0x00f37539,
8857 0xbcca8ed8, 0x9747fff0, 0xce896c74, 0xa2c69f5f, 0x7433ea82, 0x0bfd4109,
8858 0xcf41c94d, 0x171f8d6f, 0x39a67cf4, 0x3b3ea83b, 0xff505263, 0x82d32ddb,
8859 0x9c4e77ea, 0x8e7fd419, 0xdd504e6d, 0x1f244cc6, 0x738aea3a, 0xe1bb013f,
8860 0xdc92bab5, 0xe397544f, 0xd0f6aa63, 0xe805b37e, 0x5f3bdb24, 0x91ea0935,
8861 0x43265687, 0x11cb537d, 0xf43c4f5e, 0x66e03245, 0xf9d1cb73, 0x53dbd02a,
8862 0x45f43c6f, 0x6d1fd40a, 0xa7cfe2e9, 0x40a362c0, 0x39bcb6ac, 0x9af805df,
8863 0x8adf629b, 0xa9779af8, 0xf98a28f6, 0xbdccd7f7, 0xb942592f, 0x06746730,
8864 0xc53727ec, 0xbf3e10fe, 0x759ef62b, 0x1ffb0091, 0x46ab5b7d, 0x5d98bf3c,
8865 0xa1e915b2, 0xf3a722ff, 0x91978853, 0x96097eff, 0x8a61d903, 0x3c92bd9c,
8866 0x03adf854, 0x1512c6f4, 0xa54749c2, 0xe544ceb7, 0x2a78baa1, 0xd999d48f,
8867 0x57638012, 0xc795065d, 0x7ed42cea, 0x95226ebc, 0x546cea27, 0x4c575bbe,
8868 0x095d7765, 0xb2ff0a95, 0x6a0d96bd, 0x2a974224, 0x4fceb4ea, 0x63d2578f,
8869 0x69d92820, 0xf9d09f05, 0x39adbd4d, 0x9d75ce9b, 0x6959e909, 0x81f9da3f,
8870 0x9dfa0459, 0x3d11d56a, 0x9b74354f, 0x475e5675, 0x22fbb8b9, 0xbc118af3,
8871 0x5fb02a9f, 0xfd1b278c, 0x030ea998, 0x841b4bf5, 0xefd8597e, 0xf79404cd,
8872 0x16356b53, 0x509e63b4, 0xf61e9733, 0x90df146f, 0x20e31d70, 0x05d86cca,
8873 0x903ad518, 0x6ba07157, 0x63f439f1, 0x0f77283a, 0x4746f5f2, 0xf9472ed7,
8874 0x60ccba34, 0x95f2e7a9, 0x08e24be4, 0x2fee026f, 0xda86a571, 0x198f628d,
8875 0x9d5f60e5, 0x69d21677, 0x0ae72c81, 0x30ef5c34, 0x80bde411, 0x576dfb7c,
8876 0xedf3da22, 0xd02f9edc, 0xfa44ec96, 0xfe7156ae, 0xf77a3165, 0xd5475c1e,
8877 0xf42cf15d, 0xb44d89eb, 0xc568426c, 0x6069641f, 0x14d617b7, 0xeddca267,
8878 0xaf885b61, 0x13fd5ec1, 0x338fdbd2, 0x9945df81, 0xf89e6048, 0x4da6f0e2,
8879 0xd7adda02, 0xce5d21e7, 0x300f9ad5, 0xf65f07e0, 0xdcfbd100, 0x7a1e7348,
8880 0xafecbe0a, 0x7cce3d79, 0x26e78040, 0x00bf3036, 0xe9cf55ea, 0xf0049f4d,
8881 0x1513d3a9, 0x4b69af54, 0xc0127d30, 0x07f855a7, 0x09b747fa, 0x0ebb942a,
8882 0x04a72b79, 0xb7c405fb, 0x0d73f8b3, 0x0680dfdf, 0xd98bd8ed, 0xb06fa266,
8883 0x0fef4997, 0x9bba34cc, 0x2371bf60, 0xa057b36a, 0xce6994fd, 0xea497ec3,
8884 0x63f40881, 0x1555bffa, 0x19efc9bb, 0x78c9f888, 0xd33d7d3f, 0x287b5121,
8885 0x70e6b5dd, 0xcd26af7f, 0x50f119b0, 0x51d3af1d, 0x88b171d9, 0x92569d91,
8886 0x4db97686, 0xd0cbfdc3, 0xb8737bf1, 0xaf5e491e, 0xa240b921, 0x0b6cb608,
8887 0xc5dd4a63, 0xf8d63226, 0xbf21b08b, 0x34c9c007, 0xc83f6563, 0x41476235,
8888 0x1b7f505a, 0x8e7a1ff6, 0x8ff31cf6, 0xbb49794f, 0x5e4aad63, 0x2965e90f,
8889 0x183fa373, 0x72abc72a, 0xc0b965a3, 0x8c74fcf1, 0x9cf111be, 0xe77d0126,
8890 0x504cc950, 0xb2338626, 0xd75f1337, 0x773e91bb, 0xa7fd39eb, 0x2ddcbc89,
8891 0x309afef2, 0x577a42e6, 0xb94d87fc, 0x79b929f6, 0xe6978f34, 0x91b25a91,
8892 0x879813ae, 0x24ec57d6, 0x43d81fa5, 0xaa02127a, 0xd7c47481, 0x161c4954,
8893 0xa672279e, 0x448ce515, 0x4fb1b0fe, 0x5f77e403, 0x40aac478, 0x78e355fc,
8894 0xe9b8e043, 0xef194e34, 0x4fb2255c, 0x245c9047, 0x89a6723a, 0x4b562fe4,
8895 0xfe8088ec, 0xa0d6eb16, 0xf5c6539e, 0x14fc1c82, 0x9047f0f0, 0x087e588b,
8896 0xffd710f2, 0x2c43c833, 0x10f20aff, 0x3c824fdb, 0xf207d2c4, 0x063fdb10,
8897 0xbce58879, 0xe4568dbb, 0x69b69a9f, 0x7e20d3ec, 0x017ddb50, 0xc369def5,
8898 0xa64391d3, 0xe1e4dea3, 0xe1cbaf9f, 0x2def457e, 0xa0fd9f1c, 0x00ffd1bf,
8899 0x8a6b5cba, 0xef1eb2be, 0x1ef9b237, 0x7cb6d380, 0x27f4876e, 0x1cd2faf0,
8900 0x226dd535, 0xb7e38edb, 0xfaf86be5, 0x3e396229, 0x79f345b7, 0xb245d37b,
8901 0x9e4ea69f, 0x9e0724b6, 0x3da162db, 0xbdef5fc7, 0x8db73f81, 0x7a43ede2,
8902 0x253e7e56, 0xeff8a4d7, 0x652fdce9, 0xbd012764, 0xff4afcd3, 0x3e7226f7,
8903 0x4eefed0c, 0xc3dd8b13, 0x992de3c0, 0xd02f896f, 0x483e469e, 0x6a8be00e,
8904 0x4285f133, 0x55fd0a87, 0xa73872e5, 0x073a6569, 0x43f042dd, 0x3a72831d,
8905 0x25f64f4e, 0xe0c6c5c0, 0x9905bb3c, 0x01f9425f, 0x0a07d44a, 0xa07c283f,
8906 0xf0227bd0, 0x3fed1099, 0xf421cdc7, 0xca8f94aa, 0x358ee8e7, 0xdaf09cfe,
8907 0xdfa136a1, 0x87cc3377, 0xc1c513e3, 0xfe46ef77, 0xd19a358c, 0xc87c2cf5,
8908 0x1c9c3b50, 0xc2effaeb, 0x570b9143, 0x7065c780, 0x5ff2f0d0, 0x39c90385,
8909 0xbf48e394, 0xfdadc8c3, 0x5db2d139, 0x44f7e9ce, 0xd21f6d8e, 0x57a0bf51,
8910 0xafd0dfa1, 0xd9dac367, 0x7f39f2db, 0x05547428, 0x89eb103a, 0xcbd4ce78,
8911 0x9e729ee5, 0x632e73a1, 0xc2d2ff24, 0x9e287b78, 0xc8057395, 0x0139c3bf,
8912 0xb8c61ff1, 0xd81d717d, 0x4d4fe817, 0x3ed335c9, 0x567e47fa, 0xcff995b6,
8913 0x6f0e477f, 0x88944a7f, 0x32fd141e, 0x8b482ed4, 0xe90664e6, 0x3f42661d,
8914 0xfc4b53af, 0xe67f05ee, 0x3e871825, 0x3fe49b21, 0x71e320bf, 0x1158fe70,
8915 0xafbebbed, 0x63d42e0d, 0x4e06a37d, 0x6fbe300a, 0x6436183b, 0x136ed897,
8916 0x07deef40, 0xd4f5063a, 0x2c7b9005, 0x7273b19d, 0x73cfa11c, 0x73fa24f1,
8917 0xa6243b35, 0x3b4a5003, 0xf4879abe, 0x6d53b4b4, 0xf6d0b8a2, 0x3d218ec7,
8918 0xcc156e9e, 0xb5f49768, 0xbfa1f1c2, 0xd6e8c1b3, 0xa822ff43, 0x0665ff63,
8919 0xd7ccdb8d, 0x4383f8a3, 0x7d53ef5e, 0x85c60a75, 0x1350ec66, 0x2f3e97dc,
8920 0x3b3ed1b9, 0x0aa57dbc, 0x02dda7eb, 0x4571838b, 0x04aeead2, 0x2d3e57a8,
8921 0xce30b458, 0x8b3a2861, 0xe7ca82f1, 0xf30bc599, 0xc918b657, 0xa0da5dcf,
8922 0x6017d8fe, 0xb7bb945f, 0x29eed06a, 0x5edc19df, 0x0eb83bb9, 0xeff922f8,
8923 0x00f68668, 0x8e6dfcf9, 0xcdec8631, 0xed1b2c71, 0xe3c0d64d, 0xbf7c8ab9,
8924 0x71756edc, 0xcb82ba39, 0x8cbec66d, 0xea5f7f45, 0x63e92afc, 0x91cfaf03,
8925 0xfea0a7eb, 0x2f1c57f9, 0xe5aa5c0a, 0x604f3fb5, 0xb79c0f56, 0x426f53ba,
8926 0xfdbabfff, 0xb71811ef, 0x51f309af, 0x22bd9f7c, 0xdbded099, 0x10b926d8,
8927 0xfd0ecebe, 0x56e0112e, 0x8d3de07d, 0x5f7088d9, 0xadcaf64e, 0xe31eb5cc,
8928 0x64515edc, 0xdd4744dd, 0xb666a714, 0x4f38a581, 0x84debb5f, 0x2bf54076,
8929 0x8ddd741f, 0xd30203f5, 0xfb471e23, 0xee964e88, 0x2da58640, 0xfbe426dd,
8930 0xbc4244e9, 0x913d9e22, 0x8865af84, 0xe033c477, 0x212cf11d, 0x51bc713e,
8931 0x2274e6e3, 0x73f4fd51, 0xde0abf1c, 0x1acda48b, 0xe46caf6c, 0x63b19e78,
8932 0xa230b6cf, 0xe9933503, 0x7a7ef080, 0xa6bbc727, 0x14669d73, 0x08636fd2,
8933 0x876bb41d, 0x77f700e8, 0xe0841d19, 0x8df002bf, 0x0e942072, 0x93dff142,
8934 0xd806e5c3, 0x429fa7df, 0x7e08dbfb, 0x23c7f301, 0x1ef55646, 0xcaf5818d,
8935 0x973bcfa2, 0xf8d8fb43, 0x08da5897, 0xe4157f8a, 0xe66bfc62, 0x5d10eb3b,
8936 0xc85eb33d, 0x57a97a46, 0x813cf6fb, 0x70a88b71, 0x27f4e38a, 0x32f9d9cf,
8937 0xfa20bb9c, 0xd816a49b, 0x5a6bcd7f, 0xc928deba, 0x35ec8715, 0xf129978c,
8938 0xc533c074, 0x5a1d9cc9, 0x2d6b171e, 0x73fa05b4, 0x5cfc09fd, 0xb2819a85,
8939 0xc017e8e5, 0x608eb87c, 0x555e7ee3, 0x28178f07, 0x1295597e, 0x8e0e6837,
8940 0x77a6081b, 0x2e455fa8, 0xc6a55f8f, 0x3b466cdd, 0xb3017ebc, 0x4d5ea587,
8941 0xcc78f03f, 0x74dfb2d3, 0x0af1fb45, 0x1bb1427a, 0x6e382b99, 0x65a9c8a1,
8942 0x8f1ef913, 0x6ab8e2fe, 0x76fdc604, 0x8a8f840b, 0x704f900e, 0xdab70ade,
8943 0xf802166d, 0x19ffee49, 0xedc01bd2, 0xa0f6ab8c, 0x19dd2128, 0x990ebf68,
8944 0x8e91ab3e, 0xd695bce0, 0x9cf02237, 0x38ae590e, 0x7f148dda, 0x8a5b64ab,
8945 0x612aee90, 0xf430ef3d, 0x0b5cf954, 0xa2d729f9, 0xaccec527, 0xb7ee0d6e,
8946 0xce487731, 0xe01eff8c, 0x396401bb, 0x992e7bd7, 0xf12332fe, 0x99906fde,
8947 0x879f9123, 0xedc09ff4, 0x5cfe4537, 0x3c581dbf, 0x6e71de60, 0xac05531d,
8948 0xa673e37f, 0x4f78faa0, 0x9bff507c, 0xcf41ccda, 0x4119bdb3, 0x598f73cf,
8949 0xdd79ea82, 0x4ffa8313, 0x5416d0f8, 0x0e2be49f, 0x4ce53fea, 0x307d5049,
8950 0x9573ce13, 0xe35bc1fb, 0x33fea085, 0xf9a0facd, 0x05446767, 0x320d07d5,
8951 0x52bb647c, 0xce5f77b1, 0x686ef6e5, 0x76f7c0a9, 0x8a3af04b, 0xc4e77ebf,
8952 0xd8e6f5e0, 0xa1fbd782, 0xfa0bd978, 0xc27e0554, 0xb15fa073, 0x13f81dfc,
8953 0x9a13f02a, 0xfac09fc1, 0x604fe08b, 0x027f01e9, 0x7f025fdb, 0xe0adeb02,
8954 0x20fd604f, 0x6f583ff8, 0xf2a62bab, 0x6a12ba95, 0xbafc16bf, 0xc98f75e4,
8955 0xd7971eeb, 0x74e177fd, 0x5def9e42, 0x9c6ebe79, 0xdcffcd2f, 0xbc563c59,
8956 0x2d3cfc04, 0x87c6acfa, 0x5f0ac37e, 0x062dc611, 0xc61892de, 0x7ddd99a5,
8957 0xf5062eac, 0x338a08d9, 0xb78192b3, 0x7d52ae31, 0xc9b4d520, 0x0fecfa8c,
8958 0xbef3e2ef, 0x7c8cc956, 0xefeda879, 0x85cf3811, 0x5f74614b, 0xef107a4a,
8959 0x5461bf1b, 0x31cf04df, 0x05b33a0e, 0x37e90804, 0x0bb7e90f, 0x4ddd4a69,
8960 0xcd25bdf7, 0x53c41a2d, 0x3c29f215, 0x0ea3cb7f, 0x635cfe7e, 0xf61373d0,
8961 0xe54ab287, 0xb9c238a6, 0x2f3e6536, 0xf1a477f5, 0xcf73cf7b, 0x053f5e1d,
8962 0xe2cb6ff5, 0x5e7f7811, 0xec5efcd5, 0xc7c157bd, 0xc85f07e7, 0x76cafba4,
8963 0x9fe0cf98, 0x96aed9cf, 0x8eff7ceb, 0x68a296b4, 0x02cd1c54, 0x05c50b1b,
8964 0x5fee85b6, 0x38f6daaa, 0x65556e50, 0x0066addc, 0x248f7e9f, 0xbdf837c7,
8965 0xb8c4c391, 0x22f9e71d, 0x5f57ef02, 0xc3bd1cf7, 0x38edf886, 0xf6eb811c,
8966 0xfe414ab7, 0xb72b68d3, 0x355b478f, 0xad0bbf84, 0x5ef02387, 0x30e7a377,
8967 0x4bcabb87, 0xd7243fe7, 0x7824a1fb, 0xfe7449b7, 0xd0624b8a, 0x5586763d,
8968 0xb66679a2, 0xb9e2358d, 0xbd7c3c7a, 0xb799ab1c, 0x825e2da7, 0xbf1e3ffb,
8969 0x7b224f20, 0xca350410, 0xef661bf1, 0xcaa43b41, 0xf386d923, 0x79e40aef,
8970 0x4e9cd4bb, 0xdfdb4adf, 0x78f8f285, 0xd26c88f1, 0x699f8a11, 0x916f76e5,
8971 0x7a869ec6, 0x3660c7a4, 0x583f9d22, 0xfc446a9c, 0xdb12c21e, 0xec69778b,
8972 0xe6c7bc06, 0xba98f5eb, 0x7aee9023, 0xb425735a, 0xf2f99477, 0xe88775e5,
8973 0x2e6f087b, 0xbbb953c2, 0xf8f380d1, 0x73dbc7f1, 0x7fea26ac, 0x3cdefddc,
8974 0x327aabb4, 0xe92ec9c2, 0xa7f230d2, 0x5db99aab, 0xd891d3dc, 0x924f7818,
8975 0xf2fd9563, 0xdaf0910c, 0xfb96a6d7, 0x0587bddd, 0x39d353f5, 0xde0eec2f,
8976 0xea7dc98f, 0x1dc7b451, 0xf50c4b4f, 0x1b5d43a2, 0x6cffe78b, 0xcafef067,
8977 0xd43b3865, 0x00d8d8de, 0x0fb4757a, 0xe8818df1, 0x13e15dbc, 0xc153e133,
8978 0xb7064f63, 0xf9e27ae7, 0x65a3a4bd, 0xe5f5d10f, 0x64eea4f1, 0x7f121ff4,
8979 0xe778a3a9, 0xc567fcb5, 0xaff0086e, 0xea8bfa18, 0x313cd4e2, 0xbc1f6fc5,
8980 0xb6ab6b96, 0xabbf448e, 0x1ecafc84, 0xac2cf606, 0x3a7b44e9, 0xb61ff292,
8981 0xad83bae1, 0x76bfba6a, 0x7d66daea, 0xa0d97602, 0xf6051805, 0x2d53b83d,
8982 0x0cd97bdf, 0x952ed768, 0xcccfdaed, 0xf4097cf6, 0x488d73af, 0x866473e7,
8983 0x27d31f91, 0x5bcfbdcb, 0xbb24ef92, 0x426498e1, 0x8786687f, 0x668ec1db,
8984 0x7b56d76e, 0x2a63ff92, 0x6acdedda, 0x8a60d4cc, 0xed94e21d, 0xddb2d390,
8985 0x80cd7a7b, 0x4e9bfc86, 0x8c963d81, 0xbb5b2a79, 0x33b9e112, 0xb3d91673,
8986 0xec99a94e, 0x83db6589, 0x6fb007ed, 0xcf55ea82, 0x7217da85, 0xdc13cb7c,
8987 0xdb87f8ae, 0xc67643ac, 0x0a67f438, 0xc871a9a5, 0x78c82f0f, 0x959bfc55,
8988 0xb7942de3, 0x9e6551b3, 0x1021c4a5, 0xfb9d355e, 0x6edf702b, 0xfc859847,
8989 0x10af558d, 0xe4bffb5c, 0x3c7f4c7e, 0x33f47823, 0x36fedf0e, 0x6a35e74e,
8990 0x48f98dc1, 0x34b64035, 0xaf704e9f, 0x6bb338c1, 0x13e48230, 0x17c8c563,
8991 0x7f70162b, 0x5f3186d5, 0x7e156b28, 0xb7abd108, 0x54527ca8, 0xb3689c80,
8992 0x02bf50a6, 0x3ea3b30d, 0x90b4695b, 0xe3a31b7e, 0x6ae17a76, 0xc3d2364f,
8993 0xb5c7f018, 0x31f8f101, 0xfb010186, 0xc7807eed, 0xc27895ff, 0x1d49951c,
8994 0x191fa015, 0x95fd435b, 0xf0a241f9, 0xdf9ad7f1, 0xfc1bf304, 0x23bc03f3,
8995 0x585fde11, 0x93b7a42d, 0xfff728e6, 0xca97c4b5, 0xbd002e79, 0x63181c61,
8996 0xc7378834, 0x9fc837ce, 0xf5eeb273, 0x8228ae38, 0xf708a3ef, 0x5e30f583,
8997 0xe79651fe, 0xbcbc79b1, 0xf9152e4d, 0x7b6790d5, 0x95f50adf, 0x593ff679,
8998 0x8899ae49, 0xb4ca573e, 0x9c4cf602, 0xbbf9186f, 0xf0891de2, 0x03f005fa,
8999 0x5ac2fbf2, 0x64169cc1, 0xaf3a712f, 0x3cec4de1, 0x454ef4f3, 0xdd6cb838,
9000 0xc6d79819, 0x5a2d7f38, 0x05a737a5, 0xbd2007de, 0x0251ffa3, 0x2fd1f2ff,
9001 0x5372bfe3, 0x57946dc5, 0x8cd62ab5, 0xc83517f7, 0xa6d7290f, 0x87ba50ff,
9002 0xb7a44edf, 0xa0b5a66a, 0x0b69a97e, 0xa1516e7d, 0x084dfe3d, 0x74c9245f,
9003 0xe81768da, 0x5bf1bd7e, 0x95a38f15, 0xbb37140a, 0x4e911a0b, 0xcafd87e9,
9004 0x7e71b9a7, 0xfba0b3cc, 0x391886ae, 0xee862bef, 0x9f227ee1, 0xf7952eff,
9005 0xa3efe40d, 0xc6324f6a, 0xf93a8e71, 0xe602d53d, 0x52dd7ba1, 0x6f654dd6,
9006 0x2f01f578, 0x8d1aee4d, 0x7607f87e, 0x1a91c52d, 0x511936d7, 0xb5b166ce,
9007 0x031fbc26, 0xfbee7936, 0x1bdb2bdc, 0x9468f7a1, 0xc7e7959f, 0x92bccaf3,
9008 0x83a03cf8, 0xf8a38033, 0x57c7cb9c, 0x02207fbd, 0xfefe7ee1, 0xca7ef3fd,
9009 0xb9020fd0, 0xd654f305, 0xbdd064b6, 0x67758b8c, 0xabf1fbe4, 0x1fc153e0,
9010 0xf08399b4, 0x0eb9670a, 0x0d9f33e0, 0xd36e63e4, 0xc0a9f0b5, 0xf03d4939,
9011 0xe8250463, 0xa1439231, 0x5ee05678, 0x3cd56acd, 0xeefb56fe, 0xb3ffe802,
9012 0xed19a2b5, 0x7ef0cbca, 0xf578fc0d, 0x28d791fc, 0x257b3f90, 0x5a78297c,
9013 0xff54bcc8, 0xfb8f8a30, 0xf144a170, 0x7c69ffc3, 0x4bd9e435, 0xb7c2aef2,
9014 0x257a7ca1, 0x2ab45cbe, 0xf8437f84, 0x2d2f8874, 0x7f002ff0, 0xc41155f6,
9015 0x1d7e0a8f, 0x5193f066, 0x2d1875ff, 0x3e39766e, 0xfdc5dfd1, 0xec0ab654,
9016 0xf087e149, 0xe3fc8fab, 0xad017c50, 0x541f50d8, 0xa9f305e7, 0xc92bc782,
9017 0x7dee452d, 0x4d47bcc4, 0x7067dd02, 0x9685fe3e, 0xfb94e9f2, 0xe2dee50c,
9018 0x6fae3cd1, 0xc08fcb42, 0xa27bc16e, 0x233d194d, 0xd5ebded1, 0x7bf0f328,
9019 0x74d68fd7, 0xcd7cc68f, 0xb2f1a68f, 0x4cf3c357, 0x8c2dba94, 0x4a3f03c7,
9020 0x6e10bad0, 0xa6e3091f, 0x91f01da3, 0x783bcbf0, 0xc6634e3d, 0xe9b882fa,
9021 0xaaf7a826, 0x83e1f895, 0x5376fcb2, 0x0982d1f9, 0x604fd405, 0x661e1047,
9022 0x3ad09581, 0x0c5d1082, 0xe7e8f9fb, 0x5ef07363, 0x03ff3940, 0xf48e3c79,
9023 0x431cf91b, 0x095ff6f1, 0x045f6f14, 0xf784c3aa, 0x289fd302, 0x93f6814e,
9024 0xa6cd4ebf, 0xc115cafb, 0x4dfea3eb, 0x56e538a6, 0x4b96e79a, 0x99c5ea03,
9025 0xe90d7dfe, 0xbc8b82cd, 0xa0d8c97d, 0xf45b667c, 0xbb27ee38, 0x8f512353,
9026 0xf06d7a29, 0x60437ed8, 0x1cacf51c, 0x8faa1e77, 0x5029247b, 0xf7b1be2f,
9027 0xa79c74e1, 0xb2cae35c, 0xf98f3018, 0x1fb424a9, 0x943ef7ca, 0xdeed764e,
9028 0x9fe8e98d, 0x9c3d3794, 0xb87aa36e, 0x1523fc9d, 0x7df9f73f, 0x0a6d7693,
9029 0x9d6fa3b0, 0x52fbedc0, 0x68851bdd, 0xf1bacedf, 0xb71875f3, 0x816bfb1f,
9030 0x590b70e2, 0xb7d43af7, 0xaf9c1965, 0xe48e8358, 0xf747cc3f, 0xddc67ba4,
9031 0xfee51bbe, 0xabbf8cf1, 0xcdfea097, 0x657cd153, 0x0e39bdcc, 0x041b6fe3,
9032 0xfbf9bf8a, 0xd77ba68f, 0x4d056bc5, 0x51ea0c7c, 0xc7fd779e, 0xe38228bc,
9033 0xbbb21b3d, 0x356cbdb0, 0x75a59f6f, 0x3ce0f6b7, 0xcf28684f, 0x4a65140a,
9034 0xf63dc049, 0x3df8f31f, 0x72cda2dd, 0xcebcb1be, 0x8db16dd8, 0xa3fce781,
9035 0xfe567f8c, 0x3b83c901, 0xb6dcbc65, 0xf123bdfa, 0xdaa46f30, 0x2b9467fe,
9036 0x3a7e3eef, 0x4159e50d, 0xa44cd9f4, 0xfb1ab1f3, 0xee781593, 0x2bc52d26,
9037 0x528959ad, 0xb9cff41c, 0x5863da7f, 0xf8bd5a2e, 0xfb8c0ac9, 0x1f91d76e,
9038 0x856feca6, 0x5fd11660, 0xd3f8dc3d, 0x676e107b, 0xa479e71e, 0x8faf1a2b,
9039 0xe2fe5abb, 0x1f3c75b3, 0x1d3af9fc, 0x99d42f95, 0xb88e1998, 0xea9e2eaf,
9040 0x5333afbf, 0xfa73e6c9, 0xaea6f252, 0xa5ee5f34, 0xb65bca30, 0x1e51d06e,
9041 0xf6d6ae7d, 0x6bc01e55, 0xa6ce0dec, 0xc6b9f28d, 0x576cf8c2, 0x83840cf2,
9042 0x2ef2e375, 0xe54f6134, 0xedeaff71, 0x64490d9e, 0xf53eaf87, 0xcf3c054c,
9043 0x0ef92fcc, 0x5e76ebc7, 0xe1c178a4, 0x10ca87f6, 0x5a4de5de, 0xdcf93e7e,
9044 0x8f4f1e67, 0xbce3127b, 0x7fc9a96f, 0xea79d9af, 0xde508d99, 0x26b979bb,
9045 0xe87fde90, 0xf795bf79, 0xbabe2d73, 0x75fe1c12, 0x89387abe, 0xf809a7f8,
9046 0xe7dff32a, 0x6bd59aab, 0xf3737e08, 0xc3e6c64b, 0x5da8cffe, 0x674fc849,
9047 0x744cddc6, 0x0814eaee, 0x571c8afe, 0xf3e6a7c6, 0xd12ae8fb, 0x48ec99b3,
9048 0x057f8e59, 0xf7c2239e, 0xd2cff68d, 0xaafe8ed1, 0xcf55c16d, 0x3d0eb07d,
9049 0xe99b8c22, 0x9e7d0ca8, 0x62a7b1af, 0xc8be715e, 0xe7d0e7ed, 0x712be7b7,
9050 0xc5b71e78, 0xa790109f, 0x458d84e2, 0x13fea346, 0x972061bc, 0x9eb76d9d,
9051 0x06ffa155, 0xc1c7e17e, 0x38fb2876, 0x695faf40, 0xab2ad7bf, 0x5f951e71,
9052 0x50f84eee, 0x3d00de64, 0xc617c93e, 0x0eeb01bc, 0xa6d02bf9, 0x049efba1,
9053 0x37880b92, 0x6bea87cc, 0xf584d71f, 0xc78e1ab3, 0x97e083be, 0x930cb8f1,
9054 0x3ce7fdf2, 0x0b3e7edb, 0x79e86ce5, 0x4f395fab, 0x7b68e1f4, 0xe740a2e8,
9055 0x9556799f, 0xbff3ed75, 0x167cf7b1, 0xdaacefe2, 0x57fe8f97, 0x8597c69f,
9056 0x957ea878, 0x157ff3cb, 0xc57b4a0e, 0x138f0d06, 0x23f2260a, 0x140ba50b,
9057 0xc63be807, 0xedd500e3, 0x0e9e48bb, 0x4c78f076, 0x145dd88d, 0xda8bf187,
9058 0xcf285d53, 0x5fb9e306, 0x28dbf306, 0xd65521cf, 0xa481aa83, 0x1ed72039,
9059 0xee07a219, 0xfe419e0f, 0x1e3ce0d5, 0x6561e507, 0x2bb43385, 0x433f21ce,
9060 0xe4aad97b, 0x67e748f5, 0x507323dc, 0xf59dbe3e, 0xdf8a6a8f, 0x926e1ebd,
9061 0x30958ec8, 0x4e0878c7, 0x4b70e743, 0x2987d13c, 0xb3387176, 0xd1abf405,
9062 0xbf24ef98, 0x9fbf38fa, 0xf381b9ab, 0xf3857b13, 0x1bed7393, 0xf980f89a,
9063 0x93f3257e, 0x7ace4f62, 0x97c41ffd, 0x9edae70f, 0x470cbe40, 0xc5f38859,
9064 0xb51e5247, 0x72871ef2, 0x90e8691f, 0x8962f8fd, 0x49b4d79e, 0x58e5ef0c,
9065 0x0af291bc, 0xca16d98a, 0x3cc59cb7, 0x8f5e7953, 0xf029d1ef, 0x52ebf67c,
9066 0x81a1e62e, 0xdbf74d3d, 0x34f66145, 0x15ead3cc, 0x1eae1905, 0x7d009ceb,
9067 0xf73e7ef6, 0x024aa757, 0x8481b1e9, 0x6653b270, 0xe29677ce, 0x5a7e957e,
9068 0x9833eb91, 0xe62cec87, 0x7bc2c81e, 0xc81de655, 0xa556fbc2, 0xc3d7bcdf,
9069 0x322f496b, 0xc05e758f, 0x79f3a73a, 0xbc0bf3bc, 0x5279071f, 0x16c3df23,
9070 0x436edf4a, 0x27456b7f, 0x15ec7fbf, 0x3cc03f93, 0x19c01733, 0xf01e7af1,
9071 0x63fd436a, 0xf21b3667, 0x6e91f8cf, 0x7d9a9fe4, 0xbd7cc302, 0x136d76ea,
9072 0xd5aa85c6, 0xe7a458be, 0x6bef6d8d, 0xf06b9e90, 0x8e3c765e, 0xdcbc7267,
9073 0x35bf7944, 0xf5efc626, 0x00ffaeda, 0x63ce76e3, 0x553a8b5c, 0x003c51ef,
9074 0x57ae36e5, 0xfe42dad5, 0xc97983bf, 0x073477ff, 0x3c60cdd3, 0xf287e78f,
9075 0x737ce9c9, 0xdccc7f10, 0x1e63f9ce, 0x681b73e6, 0x675fc538, 0x5d91c7c6,
9076 0xf1c71fe2, 0xafce9360, 0x3fa63b43, 0xfc7ca045, 0x5ad730fe, 0xe95c8fb4,
9077 0x7fe9aedc, 0xbd2b05ed, 0x5b73a3f7, 0x3cf98c7f, 0x733bddb2, 0x149556c3,
9078 0x1d999fb0, 0x1fd8de3c, 0x120fcac6, 0x21d7edde, 0x25b97c3e, 0xbe31f267,
9079 0x777819a3, 0x4483c60a, 0x3d0d1f1e, 0x6b8e5d87, 0xfdfc671c, 0xb3df6528,
9080 0x3cb91313, 0xa3a26e63, 0x5bbf392e, 0xc651d7c9, 0x504132df, 0x9fb8d1ee,
9081 0xfaae5824, 0xd7de1a5e, 0xde2b9e60, 0x3bf960d7, 0xef161f39, 0xa2feb06b,
9082 0xf78b0f9c, 0xf78ed835, 0x956f5835, 0xbef161f3, 0x5f78eb06, 0x722be583,
9083 0xdc71ec3e, 0x6df1e52a, 0xa2e90a7c, 0x946d790b, 0x1d1bdebf, 0xdc151f52,
9084 0x085a37bf, 0xa8128fae, 0xc6c269bf, 0x78ff30a7, 0xc52f9293, 0xc3b446cc,
9085 0xfbf9c22a, 0x7b06a91a, 0xf3f404ec, 0x45ed778b, 0x9bf81e7f, 0x882b9fde,
9086 0xef4a505e, 0x1968c497, 0x27dba3ca, 0x804f47d8, 0xcd8ec7f1, 0x724adb48,
9087 0xecf74f52, 0x31bb3fbd, 0x6f7ae292, 0x25824c49, 0xaee465a7, 0x9a7d42b5,
9088 0x85fa2041, 0x512a6ef9, 0x67984cfc, 0xab62c746, 0x1307cb8a, 0x9285cbda,
9089 0xb3ae0963, 0x8b9f4122, 0xd588f872, 0x51fb819e, 0x6a345de0, 0x45da1a59,
9090 0x07f36a5d, 0xbd759f18, 0x57e866a3, 0xa53c7129, 0x69d693df, 0x99bfb8f9,
9091 0x736ba919, 0x36607e70, 0x0d367794, 0xd9fdc66b, 0x9ea170c4, 0x855997e4,
9092 0x027f20f2, 0x66e99ba7, 0x357b1f6e, 0xfa345566, 0x62d361f5, 0x4bb75ef0,
9093 0x1931f3c6, 0x3c65c7cf, 0x81573de3, 0x6173df8a, 0x585cf789, 0x2da3e686,
9094 0x4db12fcf, 0x240f7820, 0xcdb3e605, 0x0097df92, 0xd4f7a10a, 0xf31c729c,
9095 0x34ee594b, 0xcadc95e6, 0x9e6879c7, 0x778e392a, 0x6f7c1d5e, 0x8ff38ca8,
9096 0xbdce5467, 0x166bcb89, 0xbf79e1a9, 0xe61731d7, 0x397dcf15, 0x7d50e281,
9097 0x06a5d16e, 0x5e05cfbc, 0x5ec67947, 0x8b2efee6, 0x77337ce7, 0xabf51c7f,
9098 0xcea9e397, 0x7c74eee8, 0xe64fa3af, 0xf07ea52f, 0xe4979e3b, 0x81ba81cc,
9099 0xf3a123de, 0xa776e739, 0x4fbd4147, 0x5f488bd0, 0xbcfe26ce, 0x673fe647,
9100 0x7c9f3c8a, 0x24f3a61e, 0x3bfa3e21, 0xf7c24e5f, 0xbc193710, 0xf7fcb94b,
9101 0x66dc93a6, 0x6fcc74de, 0x4e782f3a, 0xadf1be62, 0x98a5296d, 0xed5e7f6f,
9102 0xb3eb0679, 0x5d78d2db, 0x0a693968, 0x93d23e7c, 0xb7c8f984, 0x6296a5b6,
9103 0x91f9f23e, 0x5944cf2d, 0x97eaea02, 0xcd73e24e, 0x98a56983, 0xeb5b3c9f,
9104 0x7487563e, 0x5f4e7bf3, 0x4e077dfa, 0xdaaa7c23, 0x7d3efdb9, 0x2f0b81df,
9105 0x603e7ea1, 0x7582bca4, 0xdf099213, 0x6ecfedf5, 0x6beb7a46, 0x6c3f1351,
9106 0x99ff7e6a, 0x2d3f50df, 0x6b665985, 0xc90c563d, 0xba1db494, 0x3b35f71b,
9107 0xd625f3dc, 0x89bc4f17, 0x047b31f6, 0x13a5ebe7, 0x4f914a73, 0xfbec0efb,
9108 0xd9b3ea05, 0xe2d86091, 0x13d05e7e, 0x8ff72a7e, 0x40b8c02b, 0x0cbbb19f,
9109 0x9dfeafe7, 0xec1fe796, 0x718e9b8f, 0xc09cff82, 0x6e2a31f3, 0xfa8492d8,
9110 0xf9e57c56, 0xf8c1bfbd, 0x74f4efe6, 0xcd1353df, 0xa94abded, 0xe1397f31,
9111 0xcc5ed76f, 0x5e7be95b, 0x15aff74f, 0xe2b39318, 0x2963ac7b, 0x3feaff3e,
9112 0x78865eff, 0xee769428, 0x772ff6c5, 0x438445eb, 0x7916c68f, 0x8f61f233,
9113 0x0acefc9a, 0x3bd15eb9, 0xdc27ef82, 0x8bf84457, 0xfa8492d9, 0xafc472b6,
9114 0xcf7dc0ee, 0x833cb696, 0x567b0f7e, 0x670e774b, 0xc1b8079f, 0xd47bb3b8,
9115 0xfb034998, 0x5e90aa30, 0xca5b0bce, 0xf7f9c49e, 0xf5e77ef0, 0xae9e085b,
9116 0x5c33d73d, 0xd431fa0f, 0xad85e7c7, 0xf767ed41, 0x7e859b3c, 0xcddfb9e9,
9117 0xa154ff26, 0x2a5f8573, 0xf4836b77, 0x58824922, 0x3fca5b8c, 0x02198b93,
9118 0x0ee759e2, 0x927be8ee, 0x6b9fc7f9, 0x00357b56, 0x5b2d0aa3, 0x0acdf98b,
9119 0xde26543f, 0xabe78c5a, 0xd1d31b14, 0xf5c8a97e, 0x9c5f2195, 0x3c5d33d5,
9120 0xd65b7bf4, 0x6bad955b, 0x7c1da0e6, 0x45fcfda5, 0xc95f4796, 0x9b55f87c,
9121 0xdf781dde, 0xb5fe5a18, 0xa84f998e, 0xb585f5fc, 0x95e5b25a, 0x78d6def9,
9122 0x55afe81c, 0x71f97347, 0x8337fa12, 0xac93fb1c, 0x0aad16ef, 0x04eeffee,
9123 0xad594f9e, 0xfea3a5f1, 0x7b7fe653, 0x87db8982, 0xca3a5f2a, 0xb371d0ab,
9124 0xbcde5925, 0xa9bc9020, 0xd14e156c, 0xd20824fb, 0x2b3c3f58, 0xe6372e75,
9125 0x87870d13, 0x0f197cf8, 0x70f1e612, 0xd66caabe, 0x4f30f4db, 0x022f9855,
9126 0xd18725ed, 0x50768117, 0x6b122bdf, 0xa317d192, 0x5fe29fcc, 0x5653894f,
9127 0xfd36d478, 0x71c1eb70, 0x865e4fd0, 0x5628037f, 0x537ce44f, 0xeb4e16de,
9128 0x1f2f9331, 0x677cb6e9, 0xa73c38f0, 0xfb1f8029, 0x06c576da, 0xf70cebfa,
9129 0xa751f74d, 0xfffa6f88, 0x07bd31f9, 0xb5b2295e, 0x4e794f78, 0x4083efe0,
9130 0x3907de9d, 0x5677df27, 0x43086d7e, 0x95f739fa, 0x4fb8f883, 0x7b9c91f0,
9131 0x7246cdb1, 0x23ed4fac, 0x626bb739, 0xf947af11, 0xbd6e50ca, 0x24a7f138,
9132 0x7c12fa3f, 0xd29ef865, 0x2f8ea566, 0xd01d81cc, 0xe490b6d1, 0xe7896cc9,
9133 0x6a5db051, 0x71138f13, 0xe1932f78, 0xde86d8c4, 0xd443f23a, 0x3a97b466,
9134 0x42f72a27, 0x25f9ff1a, 0x31f53f3f, 0xe456bef3, 0xc50372cf, 0x6abec07d,
9135 0xc0ed097e, 0x8c16b105, 0x4dc287a7, 0x898c5fb9, 0xe22966fe, 0x7da31de9,
9136 0xbc3cc4ec, 0x9f91f4cf, 0xf64ed401, 0x5a6bf57c, 0xd5fb37f2, 0x7e517b03,
9137 0x71f68db9, 0x0e9e0113, 0x547af74d, 0xbed41771, 0x67ed342e, 0x1c91bd21,
9138 0x97d6f4e1, 0x07bf8bb9, 0x4e4fdf22, 0xfa00f192, 0x7d22358c, 0x87cf1c08,
9139 0x409ff6db, 0x9dd7d379, 0x943a724a, 0x3db6ce9f, 0xe3728116, 0xaeefd043,
9140 0x87c07880, 0x7ca59f8b, 0x0798f980, 0x6b3de502, 0xf837cf83, 0x2fc98fed,
9141 0xda039b64, 0x821b1e91, 0x4170a1eb, 0xf106f4ba, 0x7df68b81, 0xc01bf23f,
9142 0x777a6aa7, 0xa861c235, 0x52ea173e, 0x4850fd40, 0x2b3fa43d, 0xfdc3f6e1,
9143 0xebcd1813, 0x25eded18, 0xcf1f7e3f, 0xbd07adef, 0xe103f546, 0xee2d3f74,
9144 0xc315bd03, 0x8bea16f5, 0x8a6e88aa, 0xd01df55f, 0x83cabdd2, 0xe1259fed,
9145 0x291e81f9, 0xfed5534e, 0xf7fa2c72, 0x699826eb, 0xb18fd07e, 0xa0731794,
9146 0x11fd163d, 0x7a21dda5, 0x0cf7e5d2, 0x287e50b2, 0x9bc94eed, 0x42e5794e,
9147 0x5f3e1677, 0x8719cb27, 0xeb097508, 0x10e1ce8c, 0x76b3df38, 0x287ce489,
9148 0xf4c956de, 0x8b21f20a, 0xe15e39f2, 0x1e4503f1, 0xe572c854, 0x7267b610,
9149 0xf72937fe, 0x84cf7852, 0x9c8c3f7c, 0x23815af8, 0xcef8a5ab, 0xbccd13fd,
9150 0x79a78f2e, 0xe789fc79, 0x3e7abded, 0xc713252b, 0x45f79599, 0xd528f2fd,
9151 0x0e505f2f, 0x781c93c4, 0xe70b1d50, 0xb0467caa, 0x8a90c3d4, 0xd04535d2,
9152 0x2d532d9d, 0x1ab8a22f, 0x2e1ae7e6, 0x1d2857df, 0xf8e44e45, 0x1fb914ad,
9153 0xa057b95e, 0x6a73a5fb, 0xf2076f7e, 0x580fde86, 0x08a6b056, 0x18beeff9,
9154 0x5fd026a7, 0x4bfcd6be, 0xcbeb821b, 0xc514d76a, 0x95e7c30d, 0x8d76b6ab,
9155 0x57cf9764, 0x8a2c6f61, 0xaede5f35, 0x5e9cfbec, 0xf574e7d9, 0xcc7840c8,
9156 0x1234535f, 0x7fba65ca, 0xdcfc1e17, 0x5eb5dae7, 0x5d2d57ca, 0xb7c4f743,
9157 0x8a0daa5c, 0xbe6b5eb3, 0x7ba6e60a, 0x3fed2b90, 0xde0874b4, 0x312b8c5e,
9158 0xc43dafe0, 0x0137c067, 0xf4cbc5eb, 0x289f143a, 0xfd063c5f, 0x3c5f6653,
9159 0x113e3026, 0x339be25a, 0xb88ae522, 0x2c3e04a8, 0x0f030cb3, 0x89d1ffa5,
9160 0x3f1ace3c, 0xa8f1d391, 0x5e3b55d9, 0xe9d71462, 0xa57bf941, 0x22fe4cf7,
9161 0xbf07efef, 0x9c233267, 0x9bd4ebf7, 0xdfd3fe30, 0x87c50df9, 0xe619d7fb,
9162 0x03077bf3, 0x5de7804b, 0x029be3f1, 0x26abc0e3, 0xdc243b71, 0x9a9dedca,
9163 0xe3d5f50c, 0xa1c6994b, 0x1bd912f8, 0xdf74e199, 0x05f6d7d2, 0x8efeb7e9,
9164 0x8bde133c, 0x0dbb75f4, 0xff356fc8, 0xa8b17ffc, 0x3e3afb87, 0xbeb4bca5,
9165 0x7ca33f6f, 0xde728db5, 0x3936a1e0, 0x6cdbabdf, 0xe2fef6c4, 0xbf6117bf,
9166 0x8fe9724d, 0x98f8f02f, 0x83f12a52, 0x3bf9ff00, 0x4c7b53d4, 0x54c51f1b,
9167 0x2db0ca99, 0x7fc0bf24, 0xe1bd468e, 0xe3982b8f, 0x04c38b86, 0x54d215c6,
9168 0x2580ae3c, 0xd2d215c6, 0xeb015c78, 0x12c05718, 0x8ed80ae3, 0x63ac0571,
9169 0x18eb015c, 0xc63ac057, 0xb8c4b015, 0x297fb602, 0x0fd1e7bf, 0x3dc78b82,
9170 0x57f7240d, 0xc0337e62, 0xbf27656f, 0x47b95abf, 0x7c617ba2, 0xdff503cf,
9171 0xad3b7965, 0x678ede72, 0xd607dd2b, 0x882c901c, 0xc41f7c22, 0x3bf98e95,
9172 0x1e314703, 0x5822d354, 0x7db198d6, 0x6363ed3e, 0xa507de47, 0x6d47bed8,
9173 0x4f44cd11, 0x828d9f1c, 0xd57c8f5b, 0x57e287b1, 0x949d7105, 0x2cd35fef,
9174 0xcebb8c30, 0xd93f72d3, 0x0e6b4129, 0x1d92abdd, 0x9376d4ed, 0x9cf552ff,
9175 0xef7c0e60, 0x45e266bb, 0x7dca1392, 0x88fe52f5, 0xf37a3d39, 0x6b3d2092,
9176 0xf85779e3, 0x29c7ec27, 0x1d9377e7, 0x2d176012, 0x6c6c7bc5, 0xf7a5be97,
9177 0xe0e09c4d, 0x9dae108e, 0xd1d95577, 0xb5f31eb2, 0x55fe687e, 0xdef924e1,
9178 0x47bf9b3a, 0x92f8fc52, 0xbd60077d, 0xb25a2dc1, 0x609f6e53, 0x1e526dbf,
9179 0x28d819e6, 0x53b472ee, 0x27d67e4f, 0x8a0faf5b, 0xd74a14bb, 0x8563dc51,
9180 0x7dfd205a, 0x3b9f6ac4, 0x4672e809, 0x6f14bdf1, 0x246f1199, 0xf0e8563e,
9181 0x4fc96b49, 0xe315de70, 0x0a9877f9, 0x34e7ecb5, 0xa5cf9c9f, 0x5eb0a9e0,
9182 0x2cf7e370, 0xbd0b3316, 0xc008b03f, 0xe5517187, 0x188b1ffb, 0xe850afcf,
9183 0x8156c56a, 0xbcbe8ae8, 0x84bdf010, 0x103df845, 0x6af77fd0, 0x289bfdb9,
9184 0xc4f27bf2, 0xe28f3c4d, 0xfca7663e, 0x7d486591, 0xd7d7e912, 0x0f6ed07c,
9185 0xdb892ebf, 0x9c38e6f7, 0x3571f17f, 0xc61707e5, 0x276e9edd, 0xf9405f3d,
9186 0x6ef78213, 0xaf1bfbe9, 0xf3833f26, 0xb9aa8e27, 0x927801dc, 0xf485d59f,
9187 0x3b1ef14a, 0xcaebc795, 0xbf229ca9, 0x5efa161f, 0xcbe77f43, 0xb0be382d,
9188 0xf84160c6, 0xc03df15f, 0xffbfabb0, 0xebf394e6, 0x5c9ec512, 0x6be3c233,
9189 0x51e10583, 0xef49d718, 0xf3caa589, 0xb25b9c3f, 0x8b69f109, 0x1f5c2e60,
9190 0x00b669ef, 0x40f08b7c, 0x3dd1c602, 0x66cf7c36, 0x513053a0, 0x7265f53e,
9191 0xcc3aeb74, 0x1349a953, 0x2daf184c, 0x1852db0a, 0xa517f30b, 0x7677d324,
9192 0x1c78da6a, 0x4e4a0fb6, 0x92dc5307, 0x62aac7c0, 0xf1cf7e31, 0x3fb5cbe8,
9193 0xdfcf293d, 0xb3e65b3e, 0x782f8efe, 0xe3b5f11e, 0xfbe9bbb4, 0xef4f4c1c,
9194 0xf60fd3af, 0xd1c6fb35, 0xe855af14, 0xae39b068, 0x45a8e909, 0xa5a513d6,
9195 0x8ed1a9ef, 0x37b3cc68, 0x96ca1c23, 0x4b175c5c, 0x4e3e1ce7, 0x87dfe4a6,
9196 0xe502c9c6, 0xde46ffed, 0x5aba89fd, 0x5baddf2a, 0x9d776545, 0xe8079e8b,
9197 0xbf08238b, 0x7d6f101f, 0xf130d27b, 0x4733a656, 0xbe05be92, 0x90edf1e7,
9198 0xbbf02af8, 0x33efc018, 0xd9eea23a, 0x8348f680, 0xcdf782c6, 0xd2bcff98,
9199 0xfde1f240, 0x59c6c349, 0x2819f815, 0xf4c83b2e, 0xe9878839, 0x112aa919,
9200 0x926dff9e, 0x44e71410, 0x2273c1be, 0x7c8960df, 0xf9f952a3, 0xa30d69e6,
9201 0x7da194ef, 0x40fb22e0, 0xbf5df84f, 0xd40ae406, 0x20a665ef, 0x442172b9,
9202 0xf32380ae, 0xac5f7a33, 0x0936cb43, 0xe9cffcfe, 0x19ca5c50, 0xb878ce46,
9203 0xe61d199c, 0xb3be9e79, 0xf9461d50, 0x44efc0c5, 0xf2374767, 0xac25bdbc,
9204 0x461dd684, 0x3e7bd0de, 0x38188ef7, 0xbff414f9, 0xd90361f7, 0x9613eb39,
9205 0xe477ffe6, 0x71279fcd, 0xdf813c78, 0xed5d5073, 0x059b0e7b, 0xb15d8fbc,
9206 0xbe236590, 0xc439ef95, 0x7bf218c1, 0x39eff5ff, 0x123c988c, 0x0ae0e7bf,
9207 0xdc439efa, 0x30e7be15, 0x6171b26a, 0x461cf7e0, 0x30b11e4d, 0xc60e7bf8,
9208 0xb29df885, 0x39efc1ff, 0xbbce4fa4, 0x370e7bfc, 0xa0ff364e, 0x3d8039ef,
9209 0x4fe3899b, 0x63c6d8e4, 0x3b9f2899, 0xe3e5fdf4, 0x97643df2, 0xb2c52f68,
9210 0xa2a5c228, 0xc56dd176, 0x73d16df2, 0x5f03b63f, 0x1578444c, 0x037d963d,
9211 0x5125977e, 0xf2bca1eb, 0x49b6ad27, 0xb96bff38, 0x3cf8c9b6, 0x2f5fde34,
9212 0x73f60f9f, 0xcd0bf60b, 0xe2e8531f, 0x0e5cc9ae, 0xa9cb93cd, 0xc7bfc3f5,
9213 0xbf326f3f, 0xbed6be4f, 0xe077bf61, 0xd9feca7a, 0xdc56c596, 0x4ef7ec0f,
9214 0xb7ec27dc, 0x88664b04, 0xf80f7a0e, 0xc9757a72, 0x2e7462fb, 0x3fb38f90,
9215 0x9528f6e1, 0x14772ae9, 0x1ea30dda, 0x7ee14770, 0xe80e3547, 0xdf907df1,
9216 0x68f406ba, 0xf576fc3f, 0x7fdb1e80, 0xdaf9e36b, 0x9f6ff3a1, 0xf491fdcc,
9217 0x7e3403a9, 0x4dddfc0c, 0x1440c1fe, 0xe5e96dda, 0x14ae3447, 0xf66d4f7a,
9218 0x93764127, 0x8c7bf899, 0x01e636dc, 0x8c3d2191, 0x1e78c1d9, 0xe90c4163,
9219 0xef1d4ab9, 0xfdc0f95a, 0x38d1d222, 0x803bec37, 0xaedfaefe, 0xaf7e0c1a,
9220 0xaae34bd7, 0x5ec025e4, 0x64ee7a0b, 0x9474bf3c, 0x5ed08f2c, 0x39d9efc4,
9221 0x77d08fcb, 0x0b8ec0a6, 0x79be8f99, 0x594f9430, 0xe6bfb3ad, 0x62be5333,
9222 0x77a5bf50, 0xfa3d66ff, 0x5ba5e5b5, 0x2f17e435, 0xa58f5969, 0x269ef1c3,
9223 0x197d918e, 0xcbec1fd4, 0xfb65faa0, 0xf547d90c, 0xc7d717fd, 0xd02eb30d,
9224 0x13a456c1, 0xaa8e0e85, 0x4fd0e33d, 0xb30cea3d, 0x3c1df7f0, 0x269a5df4,
9225 0x5df4bdf9, 0xcadd39ff, 0x5d3965f3, 0x3f1df8c0, 0xa9ea8e8c, 0xaf1df2bf,
9226 0x1c8a956b, 0x8dcefa1c, 0x5e28b986, 0x7248cb39, 0xfff646ae, 0xc89897aa,
9227 0xbaf8511e, 0xb539e55a, 0x18c5fb1e, 0x8a9bfe79, 0x7aabf7d1, 0xcf9451c4,
9228 0xcfac3f4d, 0xacfba54a, 0x178f7ad8, 0x5db81de7, 0x15b9efa0, 0x5ab97384,
9229 0x9e389628, 0x4447e785, 0xa7815dfe, 0x98487e51, 0x37bfc147, 0xbf972530,
9230 0xf8cf103f, 0xca98db77, 0x369df21c, 0xed7a1e39, 0xeff1b4ef, 0xf7e7cd92,
9231 0x25510d72, 0xf9f1cba5, 0xf9e81b82, 0x1f52efc1, 0x2afee2b1, 0x71b4ef94,
9232 0x4e61bf7b, 0x557f3d06, 0x3d41af30, 0x5d807ae1, 0x7a6d3be9, 0xef80fbe4,
9233 0xf887bdb3, 0xd9f7d6ba, 0x1c0fef94, 0x23c3705d, 0xbd1c397b, 0x3355ef78,
9234 0xafe418cb, 0x3c3117ff, 0x56c0d29e, 0x000056c0
9235};
9236
9237static const u32 tsem_int_table_data_e1h[] = {
9238 0x00088b1f, 0x00000000, 0x51fbff00, 0x03f0c0cf, 0x3370278a, 0x45e39c30,
9239 0x8381e9f0, 0x5fd32918, 0x50c0cec6, 0x4055c401, 0x3f880bbc, 0x7c3032b1,
9240 0xff5e2566, 0xdb042935, 0x21818248, 0x88d7881e, 0x49a83031, 0xa41dc422,
9241 0x03261819, 0xb150a1f9, 0x5f3a4047, 0x0f77328a, 0x80a69c16, 0x872ae629,
9242 0x9163a760, 0x6819c647, 0x50e54bf2, 0xf40499f9, 0xa2be340f, 0xa2ffca8e,
9243 0xa013a10a, 0xe4d157e2, 0x3be542bf, 0xa6bafea0, 0x4edcdd8e, 0xc35dfd32,
9244 0xfc01a102, 0x9847b099, 0x009847b0
9245};
9246
9247static const u32 tsem_pram_data_e1h[] = {
9248 0x00088b1f, 0x00000000, 0x7dedff00, 0xd554780b, 0x733ef0b5, 0x7993331e,
9249 0x31e424e4, 0x1e4e1081, 0x03086820, 0xb78a8884, 0xf6301027, 0xd57876d2,
9250 0xaf0e2d58, 0x6b86f210, 0x7fb6bd2d, 0x78490806, 0x111fc1a8, 0x29e1d5ad,
9251 0x311d82f6, 0x0388b622, 0xbdabd228, 0x557c5837, 0x0bd11feb, 0x2a44908a,
9252 0xe5b5ef6a, 0x3ef6b5ee, 0x09939cc9, 0xafdb7b04, 0x7cfdffff, 0xc7ecee9f,
9253 0xf5ed7bd9, 0xfdad6bda, 0x8131c918, 0xe4230da4, 0x06fbfc22, 0x109d9221,
9254 0x9d37a132, 0xd72120e3, 0x66924218, 0x92ddfd2f, 0xbadc4214, 0xa349bfe2,
9255 0xe4febba9, 0x5f5f9a1a, 0xa4aff0ec, 0x4d1f5b4d, 0x2d096a78, 0x2fa1efbf,
9256 0x7cd04fc3, 0xad79ecfa, 0xce7eb4c5, 0x5d0fc924, 0x10ab1a1d, 0xd8e7ed02,
9257 0x520176c2, 0x9097e581, 0x927fa130, 0x45f8e8af, 0x9fe8b884, 0x37fe9724,
9258 0xa5b21c89, 0xd1e43e60, 0x99029ea0, 0x31364846, 0x7e6055fe, 0xf509fc36,
9259 0xd0677744, 0x779e75ef, 0x7fec13e5, 0xdb0a5f8e, 0xf27347e9, 0x4dc87203,
9260 0x6d08c6d3, 0xfb1dc749, 0xf908395d, 0xe4990cc0, 0xd8b68763, 0x0fca6ffe,
9261 0xd214754c, 0x080b67fe, 0x49d9f9ff, 0xcc82da36, 0x3be1eda6, 0x1a1f4e22,
9262 0xd99f67cc, 0xe0dfb8e8, 0x40dfdddf, 0x5fc0a7ff, 0xe5a1094b, 0x9e0c1ccb,
9263 0xc5d9d9e4, 0x1989ce30, 0xbf4316d7, 0x3213a673, 0x9d4d5688, 0x4490f63d,
9264 0x891aebf3, 0xcddb4edf, 0xcf1c0d29, 0xcbf8d981, 0xe80293a7, 0x60ee8e97,
9265 0xffc45f7d, 0x64ef38eb, 0xcc3fde3e, 0xfa102b1e, 0x8a97f641, 0xa0725da9,
9266 0x4bd153f9, 0x2d056a48, 0xee53191f, 0xd09a769f, 0xe6e9e4f2, 0x721340f6,
9267 0xc425211d, 0x1aea7293, 0xc91677fa, 0xad4228ba, 0xee8c0b6a, 0x4a6b0fe5,
9268 0x22f9fdff, 0x12fa01d0, 0x6a1fd6fb, 0xa0e9e99c, 0x7b375af8, 0xf4d08796,
9269 0x0f2cc0f5, 0xd9f5efe0, 0xd68f10b3, 0x676673f6, 0xfb5e0227, 0x06feef1b,
9270 0xfa08d03a, 0xb5b3c73d, 0xea48907e, 0x39fbf423, 0x31c3d13a, 0x9301dffd,
9271 0x0964254d, 0xb34d1b30, 0xd2a6d525, 0xe88d6cfa, 0x95e33891, 0x3b69b102,
9272 0x28994992, 0x0ff352e3, 0x2637bb61, 0x71c34ad9, 0xef0773e6, 0xb81a55c7,
9273 0x6fa50e67, 0x751274d6, 0x2912ba51, 0x75e2c6aa, 0x1a548a5d, 0xddc7038e,
9274 0x68425e1c, 0xe1c0cf7b, 0x02d86571, 0x47329fd0, 0xf5c2c40c, 0x42678003,
9275 0x4ca24a6f, 0x18f8e6ee, 0xfbbf72fd, 0x338f506c, 0x8e00bb8f, 0xecaa9009,
9276 0x0c8f0e3b, 0xb201937c, 0x43fc8296, 0xe02463c2, 0xb91eccfb, 0xe5070124,
9277 0x17f0a18f, 0xa42dae15, 0x1412d47b, 0x47ec56b2, 0x0324a4f4, 0xde1157bd,
9278 0x4f51290f, 0x42157e51, 0xd78b84ab, 0x129e6a5c, 0x35f06539, 0x193ba9f0,
9279 0x5e1cbfc7, 0xe518a048, 0x88d43152, 0xe307c078, 0xed4df92b, 0xbacba502,
9280 0x947ee5d1, 0x90218a6f, 0xe17e4333, 0x3bf457df, 0xbdccff37, 0xca91d29c,
9281 0xd3396b91, 0x2cdf8a8f, 0x8e92eb67, 0xc82008b5, 0x0f49b964, 0x40241210,
9282 0xeb6f0377, 0xbc78a2be, 0xfb5bbf04, 0xe7c86fdd, 0xc9983260, 0x053f9327,
9283 0x79bd07fa, 0xf0077ed3, 0x5edf3af5, 0x5d6bcc07, 0x7a825efe, 0xe8c7d38a,
9284 0x5daf95d7, 0x81d6ce52, 0xee808d7c, 0x9ea748c3, 0xc6a7d1f2, 0xa6767e02,
9285 0x748bf72a, 0x08933b7e, 0x6b75d9ea, 0xd02b7848, 0xb5e594b5, 0xb5e1696f,
9286 0x9d3b8e74, 0xd698bebc, 0xed06bcd3, 0x3adbbea9, 0x68870b49, 0x8d8b6b7e,
9287 0x85ab1fb5, 0x311f9a45, 0x8a148491, 0xc2c56d4f, 0xbe5a4e95, 0x17eaa375,
9288 0x34fd5eb5, 0x2d6725a2, 0xdeb2dfb4, 0xbdf00aa6, 0x3b23ad8f, 0x443849f3,
9289 0x39b1dfc7, 0x69239bf9, 0xf9b2143e, 0xf24fd387, 0xd945faf8, 0x022844a5,
9290 0x9c3a31b4, 0xae5c7921, 0xa9e50204, 0x7ecb7cbc, 0xa48ebfff, 0x5d363df0,
9291 0x45a0aff2, 0x4ccfd63b, 0x769e28d0, 0x3f048168, 0xc0f07f4d, 0xccefcc7c,
9292 0xdd00260c, 0x9f9c6e76, 0xc0f14c00, 0x461b99e6, 0xd2617b41, 0x6ce91d61,
9293 0x1f47ffd6, 0x00ec3a28, 0x9e994b38, 0x7e0d6a4f, 0xbcf9a253, 0x89b91249,
9294 0xadcf214e, 0x1fdbdc21, 0x4f5811b2, 0x8b6de8fb, 0xcdd44ebe, 0xb4eb5779,
9295 0x5d7f818f, 0x2009160f, 0x86353bda, 0x923741e7, 0xbeec8af0, 0xc85cefe3,
9296 0x5d2913ea, 0xbf2e0e80, 0x96675962, 0x4756f85a, 0x3c717079, 0x1c755ab9,
9297 0x897a488f, 0x578bd690, 0x62469ffa, 0xf07ae9f0, 0xe9f58128, 0x8163e78a,
9298 0x7ca05d27, 0x9cab830f, 0x1c1eb9ef, 0x6357caf7, 0x21b1f1e3, 0x7fa01eef,
9299 0x6177c522, 0x50eb0424, 0x0a24617a, 0x57c9e2fc, 0x9a0bb034, 0xc5c93109,
9300 0x7cfbd1a1, 0x1337201d, 0xaf583e22, 0x837e8dd7, 0x81568fc9, 0x6fe630f8,
9301 0xb7e4f7b4, 0xc1fb5893, 0xf87287a8, 0x697853ce, 0xcb87bb39, 0x847f4f59,
9302 0x732447ad, 0x4f75c21c, 0x5e7561e1, 0xc84c7d1c, 0x97cb940a, 0x817ae049,
9303 0xedcddea6, 0x6c06a751, 0x7900dfae, 0x910240b7, 0x134ddf38, 0x42d27ad8,
9304 0xe9a05d74, 0x162f44a3, 0x664b9d70, 0x2eb2d7fa, 0xbc9fd1f5, 0x16e9165d,
9305 0xd468df40, 0x8734803e, 0x23cd31f8, 0x92474c01, 0x26af4c56, 0x49f34c11,
9306 0xa405a63b, 0xaf43531b, 0x422a89f8, 0xfac4c47e, 0xa4e720c9, 0xe58b63da,
9307 0x3264d0bb, 0x3cce3eb2, 0x73782d9a, 0xf8ebf890, 0xe75f021d, 0xfc8aa648,
9308 0xf17af843, 0xe818b06e, 0xfc2854c5, 0xefccdbbb, 0x0ebe24e2, 0x693dea38,
9309 0xdd335780, 0xcd54548d, 0xf06d5a7c, 0x1c2444a9, 0xc41f32c7, 0xd6b8cc63,
9310 0xfb7356fe, 0x9c9f98c6, 0x491f23a2, 0x50cf666e, 0x71bdf438, 0x0828d1f0,
9311 0xab419e7c, 0x29b23adc, 0xb6494bbf, 0x6b9a5ac8, 0xe8764f74, 0x893f2f38,
9312 0x7ceb6747, 0xbe2af0ac, 0xa9b3c181, 0xcb0a9e07, 0xc297fa3a, 0xfea64ff3,
9313 0x1db24ca4, 0x86a20bd6, 0xbc56de70, 0x42def9f6, 0xd2e4fe8f, 0x57d66991,
9314 0x02d78a4a, 0x069f8587, 0xe37c7f68, 0xe47fea4b, 0x211bfac3, 0xa9ec2a41,
9315 0xe60101f9, 0x1a40ad7f, 0xc85e2913, 0xa0eda268, 0x6af5cd70, 0x698b8ecc,
9316 0x91f41937, 0x74c90b66, 0xee92cfbe, 0xe43ed023, 0xf41d9127, 0x6df367b3,
9317 0x7d695ba5, 0x63b69faa, 0x1e4005fd, 0x0b6d1dae, 0x9fd1b940, 0xf5329e4e,
9318 0x112efd47, 0xe836e1f0, 0xe4c3f163, 0x1fb436b1, 0x6fa27c95, 0xc75f2389,
9319 0x1d157cb9, 0x9eb0ea71, 0xb094cab8, 0x8ffa1b33, 0xb53e4314, 0x5d61f89a,
9320 0xe6cdd49f, 0x30e1c651, 0x59fa9de6, 0x6a7e0040, 0xc03b31f7, 0x3fd04855,
9321 0x74da3254, 0xb4dd1ff0, 0x7e42f50e, 0x50531754, 0xd83fa23f, 0x5f3d9e1f,
9322 0xd00bed3d, 0xb9d47d7e, 0x92be076a, 0x9fa0e9fc, 0xc8568f57, 0xf8bdfa60,
9323 0xfff63b3b, 0x1862a7b9, 0x47cf9989, 0x0bb1d10d, 0xa670c1a9, 0x67a618e1,
9324 0xed31da1b, 0xd30b786c, 0x594ae9fe, 0xebceda8e, 0xc0d7e27e, 0x3f0f101e,
9325 0xc00f3447, 0x5c75d51d, 0x12a21c17, 0x82802eb3, 0xd36fff06, 0xdaf0bcd8,
9326 0x086bc46c, 0x67d54de6, 0xe0367878, 0x9e000a5b, 0xc2223887, 0x77867cd2,
9327 0x01d03fc0, 0x3c8e8bca, 0x5cf102b7, 0x9e02c64d, 0x0ca4c937, 0x13e03cf4,
9328 0x827d89d6, 0x03800eed, 0xfe69f3f2, 0xc1fa8ffa, 0xf78659fb, 0x9e29978c,
9329 0x4b494e00, 0x8eadc664, 0x913b95f2, 0x27d7120b, 0xf9927abd, 0xbdf6bdd9,
9330 0xcf00eff6, 0xac894696, 0x68a6bc85, 0xf7b7114a, 0x15824a41, 0xdcdfc1d3,
9331 0x28fd3e56, 0xe2b90bd8, 0x5a648757, 0x3a5eb43e, 0x4f2311d9, 0xfd746559,
9332 0xb0c276a4, 0xecf2e6e5, 0x074f3990, 0xb7347f40, 0xc43e5cc5, 0x87aef5c6,
9333 0xad1e4078, 0xe8b65af3, 0xd3fd7157, 0xea240d55, 0x02f26396, 0x1791a7c3,
9334 0x423b13bc, 0x46cb7e74, 0x4c038c11, 0xb3f5b1b7, 0x7ca3be15, 0xd74f2f71,
9335 0x5231fa5b, 0x46dba269, 0x193d30c6, 0xddba7d6f, 0x46ce3c56, 0x4db06bfb,
9336 0x72a3671e, 0x042292e4, 0x5b9777ec, 0x93f9e3d1, 0x8e126dd3, 0xebb5209f,
9337 0xfbab8522, 0x4adfe23a, 0xee4cbef1, 0x2c7c828e, 0x21fcd62b, 0x30fe4750,
9338 0xd51263ca, 0x15f66261, 0x700253c1, 0x6c4a7850, 0xfb044e38, 0x0738a6e9,
9339 0xcc997dfb, 0x4a365dfa, 0xf6376823, 0x3655e703, 0xd80ce119, 0x34fd0904,
9340 0x1555974e, 0xa34df739, 0x9f554ed9, 0x2667fd05, 0x78c16705, 0x7e6fb946,
9341 0x1963fa29, 0x2bf4ccc3, 0x0167d477, 0x2206547f, 0x4e7f80d3, 0x926c5f7b,
9342 0x36b7bce9, 0xf144bf10, 0x702b9eff, 0x7357f41b, 0xb008fd7b, 0x5e06df7f,
9343 0x3b2a0098, 0xa5ac7a80, 0xa25fa564, 0x148972e5, 0xca3f2995, 0x25bf0f13,
9344 0x2a1a4017, 0x938b3886, 0x477d33d4, 0x35224bf5, 0xf5231cbd, 0xa27e218f,
9345 0x72d03c80, 0x60256f55, 0xdba8380f, 0xef863270, 0x1e734c94, 0x7cd8fa6c,
9346 0x72e37a7f, 0x27e79829, 0x09fe0387, 0x49dde9da, 0x26927fcc, 0xde000bfa,
9347 0xa6ffaf7b, 0xc4fcf006, 0x67f93366, 0x5a4d7f56, 0x79696ffe, 0xfee26810,
9348 0xd5fcb4b6, 0x80f1bcb4, 0x979c5697, 0x9432ca63, 0x24f0050b, 0xbf07f932,
9349 0xe41d67be, 0xcf5bf878, 0x572f58db, 0xf835bc37, 0xa720e1c3, 0xa43f831d,
9350 0x052d59c4, 0x3e42ff91, 0x1c28b5f0, 0x098f9992, 0x62134f78, 0x18176e52,
9351 0x5a9c9bf6, 0xdc947488, 0x988ea9d2, 0x8fc0ddf5, 0xc1ddfcb2, 0xf4878e1f,
9352 0x78ad4c6d, 0x0120a455, 0xd768d03f, 0xe018b713, 0xe234effa, 0x1fc479a9,
9353 0xa47338a5, 0x7a6a78b0, 0xf30a285e, 0x09fd5272, 0x233dd3eb, 0xf0c56b5f,
9354 0x3b0fc581, 0x3f20ad94, 0x61b68cb4, 0x7865b35c, 0xf90290e4, 0xd1406a0c,
9355 0x5dca677a, 0x4c6d8821, 0xe37c63cd, 0xd4f5b3f4, 0x7e8c3c35, 0xbdbfa198,
9356 0xad5e1f1c, 0x67b3f51c, 0x31ded9a2, 0x2b2701d6, 0xdb36f4a2, 0xa694ce51,
9357 0xbe82c54f, 0x9b539a7e, 0x69e51a76, 0x233fb9a4, 0xe36ed1de, 0xc96b8bf1,
9358 0x593768b5, 0xe1fd12e2, 0x71f86bcd, 0xdcbcd913, 0xfc1849d3, 0x5189f4e6,
9359 0xcfd79bc4, 0x9bd866f0, 0x9bbf3e1e, 0xfc04234a, 0xf3f89ebe, 0xeb6f0ccd,
9360 0x7fa28baf, 0x29ec7eb7, 0x85bd67b4, 0xce3f261d, 0xa1ca1ef8, 0x76c4fcfe,
9361 0x18f6a1a8, 0x23711bcb, 0x19e9a78a, 0x61ebbd69, 0xaddbb72b, 0x92275374,
9362 0x4763d062, 0x8315a747, 0x84b7bede, 0x3cab4ec2, 0x6297587a, 0x7ef2adf0,
9363 0xdf867cd4, 0x7cd8cb7b, 0xd3f47b69, 0x93989def, 0xf266e304, 0x7f11b0f8,
9364 0xebcbf1ee, 0x284f78cd, 0x2d85c4b4, 0x67eab77e, 0xcc4b52f4, 0x5f39abe5,
9365 0x57a7222b, 0xe8ce192a, 0x4f3e3035, 0x84bcf832, 0xdf3279f1, 0xd12f4837,
9366 0x921d010e, 0x4dff994a, 0x4df37e2c, 0x5e8c1d29, 0x00c88f37, 0xa9fefc3f,
9367 0x97663edd, 0x7126ba30, 0xc6efbc7e, 0x71c80211, 0x40268972, 0xc33e727d,
9368 0x13c53253, 0xa5c977ac, 0x4ef6efcc, 0x525db0d4, 0x0b5ba309, 0x5fe14c7c,
9369 0x898a7403, 0x5b4b3b1f, 0x6b7fa075, 0x741d4ef1, 0xe1c53259, 0xd4cf0a20,
9370 0xd81b0a52, 0x805fb49d, 0xc51853d7, 0x49525ab8, 0xfca5d870, 0x82a2427a,
9371 0x10f887cd, 0xe94b686c, 0x7e58253c, 0x20b26268, 0xa7ef7ed0, 0x80f1c07c,
9372 0x8f173c71, 0x785fdfa3, 0xfddcf512, 0xc8364df0, 0x1cebf6a9, 0x36a5279a,
9373 0xf707f83f, 0xf108e697, 0xbcc6e7e2, 0x2acb83fb, 0x35f812c7, 0x9572fc31,
9374 0x16dee3c8, 0x22475dfe, 0x57c82e6a, 0xa5f76f48, 0x830feaf5, 0x65e47aff,
9375 0xfecbe312, 0x87a189f4, 0xb21824dd, 0x1fd5f765, 0xdef8ce92, 0x7940179e,
9376 0x24ef03eb, 0x8a52afc6, 0x9136fcb9, 0x5e867fdb, 0x140792d1, 0x00a12727,
9377 0xd72277ae, 0x02da4f4f, 0xf054c50b, 0x4eb8c3bb, 0xae74c8b8, 0xca9f1937,
9378 0xe6a6ff9c, 0x4ae2bd33, 0x9776b089, 0x903aa78d, 0xa834d6df, 0xc65a1fa8,
9379 0x439ed5de, 0x7866b0f1, 0x73be1f93, 0xb9196b8c, 0x3cdbf68d, 0x2b70797c,
9380 0x30fdc00c, 0xac22bfd4, 0x8d5f8c83, 0x0e03307d, 0x61d21992, 0x7e09cc9f,
9381 0x2467e011, 0x24905fdb, 0xeb8fb512, 0x4795df1d, 0x6967cde1, 0x0dc19f28,
9382 0xb6ebc9fe, 0x6f9c2ae0, 0xa2946b7e, 0xc99bce9b, 0x42216acb, 0xebcc225c,
9383 0xb21e7c72, 0x9f8ebe31, 0x025df7f6, 0xe1c4d3ec, 0xdb22dddf, 0x472d59a7,
9384 0x7e085088, 0xf289ed1b, 0x6a6ceac9, 0xa381c797, 0xd56bf391, 0xc3f8672e,
9385 0x89ab7e18, 0x75f29924, 0x1fc233fb, 0x7711fac6, 0x514fb80a, 0x4358d1cd,
9386 0xcf00b23a, 0xf61a29ef, 0x48eb6b57, 0xe9177c83, 0x78025b4e, 0x8b8f0310,
9387 0x5277fd74, 0x90b8c4be, 0xd6eb607b, 0x81a7f0e5, 0x4085d10c, 0x0fa9e4cb,
9388 0x178e9879, 0x69e307dc, 0xd2bf2b2a, 0xf5f0e371, 0x4d7cb10b, 0x6a5957c4,
9389 0x147f6be5, 0x129ddaf9, 0x9fb77ac5, 0x8fc1b5f1, 0xad1f9c89, 0xbf8c687c,
9390 0xd6afc79e, 0x335f3e72, 0x708549a1, 0x9b51dadf, 0x2ce69e30, 0x7c015cda,
9391 0x25aa32de, 0x64de7c0c, 0x17df35f0, 0xdb2efea1, 0xa35ad31f, 0x72264eb0,
9392 0xeed456be, 0xeb7b9006, 0x38935d7c, 0xbe0534bc, 0x5f39b806, 0x93f807bf,
9393 0xae08ddfd, 0x076bd7c1, 0x45bad7cc, 0xfed39b6f, 0xc2d927fc, 0xf1891ed7,
9394 0xd7c067e7, 0xb30a4f00, 0x963edc63, 0xdfea7eca, 0x06e7e9c7, 0x6b99f989,
9395 0xe5ac1cb9, 0x1fb6b072, 0x223ff839, 0x9afe03f3, 0xc98b3072, 0xe5a24381,
9396 0x8cae9389, 0xd3b0251f, 0x9e7bc8e3, 0xe1b5fc24, 0xbc4334de, 0x27fe3c72,
9397 0xbe84cd30, 0xcfd234f4, 0xe4c0e744, 0x73c98f3b, 0x76be727f, 0xfe387c68,
9398 0xa7f46453, 0x26922ef8, 0xffbe395c, 0x7215705a, 0x43f0367e, 0xb728c582,
9399 0x3a667a31, 0x86a92bc0, 0xd304799e, 0x28ad79a9, 0x81be86a7, 0x2bfa0a58,
9400 0x3bc62b6a, 0x68ad999c, 0x98f3399f, 0x24fc31be, 0xb88d7ceb, 0x33d71378,
9401 0x02217949, 0x853d9feb, 0x9eaa3f70, 0xcc9951f9, 0xd5e2301f, 0x18a8fd86,
9402 0xbbd0d47e, 0x79a79f70, 0x97da3d78, 0x3bd637cd, 0x36c3ede2, 0xf077eefb,
9403 0x3ed35f4d, 0x0e5a1aeb, 0xbbc9aefd, 0xc3b3c49f, 0xfb18798c, 0x6e3e4e46,
9404 0xa8b51e73, 0x32df5c60, 0xc76adefc, 0xfeb26734, 0x7ae7be7a, 0xbbd1ee57,
9405 0x54768f2c, 0x6f9f8c6e, 0x03e0c7e9, 0xa343e885, 0xe4183710, 0x4ce7091e,
9406 0x3f04849a, 0x924dc7d8, 0x90729d20, 0x5aa97b1e, 0xff401689, 0x9cbc6627,
9407 0x3db2f685, 0xbce406b8, 0x0380abe9, 0x53aba9e2, 0x96c6f35e, 0xe6f19d9f,
9408 0xa56cc1b7, 0x7ee2d5df, 0xb148838e, 0xdc2763fb, 0x4b7ed1db, 0xe9c737c8,
9409 0x09ae149c, 0xcc13c402, 0xbf8f0ae5, 0x72e69928, 0xa45fc799, 0xe7394b14,
9410 0xbe34b90f, 0xeb93795e, 0x7602df15, 0x1cc4e74e, 0x713bd716, 0x30674f2b,
9411 0xdbc73efe, 0xc234f375, 0x535feef5, 0xf6e5251f, 0xe29befc2, 0x9922f8c7,
9412 0x3ebb4765, 0x2b9d852b, 0x26e7b120, 0xa26b5fe0, 0xccfc6244, 0xff9781a1,
9413 0x61d4f108, 0x06cabe0b, 0xea156b3c, 0xdb465861, 0xc79c6ca5, 0x28f74263,
9414 0x3ae6cf18, 0x02f5fb8b, 0x6a72e345, 0xdbf40b12, 0xef8521db, 0x3a52c0bd,
9415 0x91057b8f, 0x37c0ecbf, 0x8c29d022, 0xb1448ba9, 0x303a43de, 0xe61b089f,
9416 0x5187e0b9, 0x33c44bbf, 0xc61b614c, 0xf6cc7e8d, 0x7888d643, 0x03a8836e,
9417 0xedc9bfb4, 0x4297f82a, 0x1ae77e88, 0x40be77f8, 0xc4c8316b, 0xc608b2e0,
9418 0x7cedad93, 0xa039d853, 0xaffb7a3e, 0x5237df4f, 0x548f8173, 0x1ce8372c,
9419 0x694ef514, 0x5ff2df42, 0x12f38189, 0xdc58abc6, 0x2a5f5acd, 0xde4017e9,
9420 0x0bc2e5ac, 0x7e053a7f, 0x6467aaf4, 0x3ca7a3f4, 0x41bf4723, 0x045b35f3,
9421 0x076d53f4, 0x770fe89d, 0x51f2c23e, 0xfb43a28f, 0x8c05db73, 0xdbd9d507,
9422 0xe201bdef, 0x0488cf8a, 0x19708dfd, 0xe29d8bee, 0x59fb2673, 0x80079cbe,
9423 0x9a1cb66a, 0xec57df0b, 0x77d813b7, 0xf16e79a8, 0xf9a06fb7, 0xf464c7c5,
9424 0xac766a51, 0x657f6050, 0x40885849, 0xc1326bbe, 0xc4fb43f1, 0xbeda0ef0,
9425 0x369edbcb, 0x2bfb0dc7, 0x455da20e, 0xa7b4f6e1, 0xa9f4a6cd, 0x0d353f0c,
9426 0x2ddcabbe, 0x98ffc1f8, 0xa38eccf2, 0x9abbf419, 0xa73c0427, 0x45cbb550,
9427 0x9cba18b4, 0xdfa3136a, 0x9d33f880, 0x8bc5f827, 0xc034eb49, 0x0d8ecd7b,
9428 0xb713168a, 0x9230d33c, 0x7cdef668, 0x1c7413cd, 0x93ed5dfa, 0x58a61f82,
9429 0xe041236b, 0x9ce7ce8f, 0x30dcdb65, 0x08ca15bf, 0x59abcc0f, 0xc38b7681,
9430 0x7ec1f6f3, 0x8b78657a, 0x57d68d32, 0x2945b23e, 0xaaa7e18f, 0x2d10d75d,
9431 0x6d4e3f86, 0xd4bf4dce, 0xae867b7a, 0x54f0b15b, 0x88b7a612, 0xc4665614,
9432 0xc8767bec, 0x453f9c49, 0xdf06ff53, 0x18275e87, 0xef3d0ac7, 0x741abc41,
9433 0xbd32a65b, 0xbcedd060, 0x7528e9ca, 0xb388cd17, 0xd02f7aaf, 0x2af10ec1,
9434 0x1bfbd315, 0x6c6e987c, 0x9b3e90d0, 0xe1577f00, 0x7b9606be, 0x88629127,
9435 0xa275788b, 0x3c9f52c2, 0x21962f5d, 0xf960124e, 0x8283dbb4, 0x1bf98976,
9436 0x383926e9, 0xb75c820f, 0x964c4fc9, 0x49bebae8, 0x7e252e09, 0x77b4be3a,
9437 0x6075c972, 0xc8e705a7, 0x1d9fb0a9, 0xe8f160ac, 0xa2e40f88, 0x7ccbef89,
9438 0xd6f2664b, 0x7c60a194, 0x8bf7d364, 0x41eda1b6, 0x7d365e18, 0xec277cbf,
9439 0xe67ed1ab, 0x1aae54ca, 0xee4fda65, 0x9b49fbe5, 0x4fd4d13b, 0xa30adcda,
9440 0x8fd8c59f, 0x6cfd6073, 0x19bd7b9a, 0x4695b99e, 0x8fd8f53f, 0x4af36067,
9441 0x199263bb, 0xb1aa3b9e, 0xfddbf49f, 0x06881f68, 0xdc7690ff, 0x4eef7517,
9442 0xc496b71a, 0x1fe4d1f2, 0x2a1e78c3, 0x947cb155, 0x24c13138, 0xb27a494f,
9443 0x74a83f29, 0x6a7da9b0, 0x9f54c720, 0x85b5765e, 0xbfa8dd2f, 0x8a814f31,
9444 0xab38b126, 0xbd415832, 0x81d83c53, 0xbb06bbf9, 0x75dcef51, 0xb02af07d,
9445 0xd05600f7, 0xc12977f3, 0xbe1c6a31, 0x0812f3a1, 0x1b34cfc6, 0x32ec7da4,
9446 0x7939efbe, 0xde2357c8, 0xd9d7dfa7, 0xd12447ba, 0xf14a43fc, 0xadef3023,
9447 0x8de3b332, 0x9d824338, 0xce6bfea0, 0x8a16da2e, 0x50cb6bc1, 0x6f422fca,
9448 0xd0722dbf, 0x73b8fc07, 0x4a576ff5, 0xa1a6be14, 0x7a6e1e0a, 0xe1edfe5c,
9449 0x9b99b510, 0x00fb9687, 0xea8576ff, 0x15f1d88f, 0x8e3e7e3a, 0xdfc61bbf,
9450 0xd93b332b, 0x673dbe3a, 0x477c69a2, 0x7c698556, 0xa7c74287, 0xf56fb1f2,
9451 0x8a7c7c3b, 0x7909ebbf, 0xc7077e56, 0xe05567b7, 0xa90acdf8, 0xd09f8d30,
9452 0x9001fe33, 0xcdfdc39f, 0xf37ae73f, 0xcd2ab3fc, 0xfcd857f3, 0x80feae8f,
9453 0xf3809f8f, 0x80fe597f, 0x92ab3fcd, 0xfacedfcd, 0xdbdf19ed, 0x6157ff83,
9454 0x37f5affe, 0xe649dcff, 0x36ab0ff9, 0xc6cedfcf, 0x27f5637f, 0x8e377c7c,
9455 0x09fca6ff, 0x6ab0ff9b, 0x07b15f1c, 0xca47c0fd, 0xf07a8490, 0xa461a99f,
9456 0xa35d4061, 0x923a40e3, 0xc837a9c5, 0x5dc70839, 0x3eef8c09, 0xe6fca04f,
9457 0x24a7d5ee, 0xea90254c, 0xd3ce5acb, 0x158bbb55, 0xd0842fe6, 0x41c4585f,
9458 0xc45fb85d, 0xb46c8cf5, 0x78538787, 0x218bf73b, 0x78dc2fc8, 0xac5b9e23,
9459 0x77dc13b3, 0xfa3056a7, 0xc0f1ff1f, 0xf3b1ade8, 0x5a8ba6b2, 0x13fecb65,
9460 0xef38c783, 0xa6ab2454, 0xa78829fc, 0x127c3d50, 0x9e9a1ffc, 0xb478e996,
9461 0x83f043fc, 0x1b958aae, 0x768c2e76, 0xce9f2277, 0xfe1cbbeb, 0xf7c31253,
9462 0xdc053ba9, 0xc37cf847, 0xd9f40552, 0xc99756a2, 0x74e3a86f, 0x8ece7eea,
9463 0x79c68dfb, 0x14505bbe, 0xc1fdf909, 0xbb051d6f, 0x41e6f171, 0x276eefa6,
9464 0x1470d5e1, 0x79fac173, 0xff3a5543, 0xe3eccadb, 0xeb6b8c44, 0x9c1c5843,
9465 0x49b8810c, 0x7906db59, 0x52dccd08, 0xf9ec9b26, 0xfce6835b, 0x7ce6156d,
9466 0x6d961ca7, 0x112ccf60, 0xefda16c8, 0xcb65ebf7, 0x8e3600b9, 0x76e64957,
9467 0xbbef1b25, 0xb4198694, 0x8e90fbe8, 0xe9156283, 0xdf65573a, 0xddd4f01a,
9468 0xae28932d, 0xb8a91dc7, 0x454a140f, 0xb2a82dbf, 0x9de15b79, 0x00f43b2b,
9469 0x8fee6785, 0x15a7c444, 0x2e838efe, 0xf3ed46dd, 0x907fcd8e, 0x9d6c7e21,
9470 0x3bfe158f, 0xa3e75b96, 0xcc3eb02a, 0x19cb590b, 0xa9f9589f, 0x36f17f6e,
9471 0xf37b3db3, 0xb5fb58b6, 0x530cd76a, 0x56f8497e, 0x9bc5fb53, 0x17ea99e7,
9472 0xd5312eb5, 0x6a59682f, 0xfd0bcfca, 0x8efed4c8, 0xf54c2be5, 0x635fafdf,
9473 0x62adbfaa, 0x6b7f2983, 0xfb5321f0, 0x98b6ca5b, 0x47076dea, 0x68e4077d,
9474 0x9e22ebd5, 0x3ee0bdfd, 0x9bd82f75, 0xee12dc17, 0xed447e73, 0x33839015,
9475 0xb4815ed4, 0xf478ff73, 0x2c1ea9a7, 0xf9a24d87, 0x2d5598ca, 0x0997a099,
9476 0x6572cfea, 0x24d0aac2, 0xd7b0178a, 0x9b887ca9, 0x041d1215, 0x0f724cce,
9477 0x318b771f, 0xa9971df5, 0x7d054cdf, 0xb17adf7c, 0xdd797e23, 0xd4c379d6,
9478 0xaf6a7e38, 0xb02192dc, 0xce5975ce, 0xb569189f, 0xb1a73ce5, 0xeb817dbf,
9479 0xe9856ad9, 0x19bdea83, 0x86736193, 0xe223e5fa, 0xf9ec9b9d, 0x0db0223e,
9480 0x53feb048, 0x98861f81, 0x76aa6bf6, 0xfbe49ae5, 0xe11121ec, 0x409d05aa,
9481 0x5217eaf5, 0x72028d60, 0x35923d16, 0xa1c0346b, 0xef4055af, 0x75c54fec,
9482 0xe9436cfd, 0x3fafd836, 0xf4c010d3, 0x4c3286a3, 0x3104354f, 0x02a1b0fd,
9483 0xf50d93d3, 0x2c347698, 0x86bdf4c7, 0x36efa610, 0xbbfa60b4, 0xdf4c5686,
9484 0xe98cd86a, 0x4c610d1b, 0x4c741b3b, 0xd1e8790d, 0x0f6e01bf, 0x84d71b1b,
9485 0x2e7cc3db, 0xe73da98d, 0xf7ff70c2, 0x11f3fbbc, 0x7f9fef60, 0x6cfb8ecb,
9486 0xcacbe1fd, 0x51d3fd6f, 0x3ca57b47, 0x639d083c, 0x8133bd6b, 0x2369c9d1,
9487 0xec1c64a5, 0xcff4ecff, 0xc4bcc7cf, 0xfd84f52e, 0xfa713c33, 0xfa5d7885,
9488 0xf444e9e5, 0x949982ee, 0xfe1ea71e, 0xf7e822af, 0x607fac02, 0x71111c07,
9489 0x6dd1261d, 0x95d7a07e, 0xe1784de2, 0x2f1059f7, 0xbf83d73b, 0x8b882cf6,
9490 0xd8a8ab5d, 0x3b36f9ff, 0xf9d2f881, 0xcfbc2e03, 0x36d8fe75, 0x32e3c82f,
9491 0x3d8e189f, 0x6b4d6147, 0xb761d922, 0xe736efc9, 0xa50ab7cf, 0x689a1e78,
9492 0x0347b389, 0x3861a95f, 0xe0d9d20f, 0x67e8d4c3, 0x71c14f99, 0x65caecce,
9493 0x5e7e3371, 0x424eec83, 0x277ea57e, 0x869fffb6, 0x0c7ebfa7, 0x23690878,
9494 0x5e08381f, 0xdb98bb71, 0xf97efb7f, 0x814cfa49, 0x20392af8, 0x82f60e7f,
9495 0x1177fe9d, 0x6122651c, 0x2eb7e8de, 0x63ec8622, 0x69b77ca0, 0x669dfa3c,
9496 0x7317f4f8, 0xe6b7c52e, 0x042234fb, 0x9c46bf68, 0x80fe0aa4, 0x02f530f3,
9497 0x788cabc6, 0x6ee49749, 0xc6f4c611, 0xbc78ea4b, 0xa1d1c6b8, 0xb9d16904,
9498 0xee4bdcb6, 0x38699e9f, 0xaf39c2a6, 0x02ab470a, 0x64454fce, 0xb9e80954,
9499 0xd2ab6d73, 0x12ac1ec0, 0x2f15dfcf, 0x67679b7e, 0x6125bd71, 0x8ebcdbb9,
9500 0xb420fe72, 0x1d9ca35f, 0x8a9f7472, 0x31b59fc9, 0xefdadb3b, 0xf6c0fb04,
9501 0x1f776a2d, 0xd683769f, 0xfbb54f17, 0x3e30553f, 0x5c53112e, 0x7bdfc0c9,
9502 0x9d82604a, 0xd772a9e2, 0x7e8f68fb, 0xdc468724, 0xd4fd097d, 0x9f6e7e77,
9503 0x88727ce9, 0xf338c3b4, 0x8881f227, 0x743bcb76, 0x15f8fd3d, 0xe4db9d99,
9504 0xf67b80e7, 0xfebef995, 0xdf9b9e02, 0x84e78556, 0x8ff7de3e, 0x242dff68,
9505 0x81d22f01, 0x1d8116b4, 0x4ad88e79, 0xc8e74f01, 0x31f1de6b, 0x3a95b874,
9506 0x05ef404a, 0x863b662d, 0xfca6bfda, 0x7ce6cde2, 0x06999939, 0xa37ca4fa,
9507 0xce02c24c, 0xb37f54cf, 0x177ec55d, 0x5826fa93, 0x8fee2557, 0x348957cc,
9508 0x9ad5ea84, 0x34567f67, 0xb411c28f, 0x88c83f33, 0x66492cbf, 0x4a656076,
9509 0xc27d8158, 0x7fc6da0f, 0x832006f7, 0x7104dc3d, 0xfc489228, 0xfc5f483b,
9510 0x56fc295e, 0xbaf58d78, 0xc3881c4f, 0xe212ee21, 0xdad603ee, 0x86cf6e05,
9511 0xe7c03d30, 0xc705f86d, 0x7615f92c, 0x2452de7e, 0x9cfdd022, 0x12d908ea,
9512 0x851fdeb1, 0xbb5edc78, 0x7106957f, 0x7b6ac0fc, 0xdfdc6f6a, 0x0f649768,
9513 0xe159f962, 0xf73c72d5, 0xf00b4520, 0xef8f21de, 0xc41f9c2b, 0x9c016f04,
9514 0xdc40f523, 0x3a75ce1e, 0xdf215bbd, 0xf3c0a9e4, 0xef20751f, 0xbc7bbfb4,
9515 0x9c418ed3, 0xa35a41da, 0xbb5fe53a, 0xa01fb2cf, 0x902ef399, 0x5067d04b,
9516 0x09a2e780, 0x235cb9c6, 0x7e3cedcd, 0x2e31fe73, 0x4381748f, 0xdf39ee3e,
9517 0xe14770e6, 0x2899093c, 0xb7f1ed9d, 0x63dfc072, 0x56fdc3f0, 0xcaa77f68,
9518 0x7df2d7da, 0x9edf3bdd, 0x097c9e9c, 0xa5f7547d, 0xeb31c240, 0xadd49d48,
9519 0x7dd61f00, 0xd7f96129, 0x5d1a9bd6, 0xe6f46355, 0x59f04a2b, 0x27a604fb,
9520 0x8e813e01, 0x64dfbb13, 0x027087bd, 0x2f4261f8, 0x386d7c3f, 0x7f498852,
9521 0x8f04a7bf, 0x6be383c5, 0xd3ebeff7, 0xbbe009ff, 0xf3feb1ff, 0x11dff4fa,
9522 0x679afe0f, 0xd10becf7, 0x17f2b5f5, 0x10e1780f, 0x6b52c7d3, 0xacef9c1a,
9523 0x0bdab1de, 0x1491f972, 0x3f5d02f2, 0xef718b0e, 0x0c3ba6e7, 0x70ddd3be,
9524 0xf396b08f, 0xaf9f99dd, 0x2ff836fb, 0x5590ef9f, 0xb2ec0f8c, 0x2994ed47,
9525 0x3096db6b, 0x7f65d8f9, 0xf19be59f, 0x7edd53bc, 0x7ca8beb3, 0x0d3481fc,
9526 0xb885550f, 0xff451cff, 0x7ffb76a0, 0xabbb034c, 0xdea3748e, 0xe3077eb3,
9527 0xf68c997f, 0xb1253cc0, 0x0e71bd6f, 0xa5e38eab, 0xde1d6dae, 0xbb6baf13,
9528 0x9a1334f9, 0xad3bf40e, 0xbb7055df, 0x9f30e1df, 0x42f034df, 0x5feeccc2,
9529 0x0583c4f5, 0xceb853ef, 0x2bc57f6e, 0x29f2c7e4, 0x23e77fd3, 0xa5fb1e0b,
9530 0x755cbfd6, 0x6b18fd52, 0xb4eb1b5f, 0x2bfb9fb6, 0x2d5a5807, 0x0fe0bd47,
9531 0xf1916f56, 0x9ef57bbc, 0x861f3b6d, 0x76dbccf8, 0x7fda70ff, 0xde979ed5,
9532 0xabe69eb8, 0xa653929e, 0xe1b869b3, 0x9f41a29e, 0xf2dffa3a, 0xa8f4bd71,
9533 0x4525fa7c, 0x7fcacd1b, 0x974bdc9c, 0x290ea7aa, 0x7c5f7464, 0x521c894c,
9534 0x85b67ed8, 0xa7f7913e, 0xeab15f81, 0xd0142f89, 0x141f1f5f, 0x1c767a48,
9535 0x09796e7c, 0x13c063ed, 0xabd393d2, 0xf6967e87, 0xa82e9475, 0xb2f42d17,
9536 0xaf98fbb6, 0xc42fd007, 0x3f7f29e3, 0xb7d84bf9, 0x0fdd9df9, 0xf278a878,
9537 0x9f30bc9f, 0xe33d52d3, 0x4ead9ff3, 0x1520fb83, 0xc54d2872, 0x3c579594,
9538 0xbfe403fa, 0x907fc7c5, 0xeac5cec6, 0x575cfc19, 0xd173cc06, 0x9e707323,
9539 0x7c8824e5, 0x7633f158, 0x4482fccf, 0x238a9f4a, 0xd839f727, 0xab7a763a,
9540 0x4f11371d, 0xfb0242c3, 0xe189af18, 0x640f181d, 0x607f0de7, 0x65913fec,
9541 0x60e0bf98, 0x30e45af4, 0xa5d1f1ee, 0xb77f9624, 0x9d03b737, 0xd3d50cce,
9542 0x475c8e21, 0x87c710a4, 0x2bf69170, 0xce9a9f1e, 0x52681dcf, 0xea8eff11,
9543 0x0e5029ff, 0xdd65dbed, 0x8efa6059, 0x1deecc5c, 0x3e3e4eff, 0xec013b85,
9544 0xd469d3d7, 0xbf338c1e, 0x9d630e03, 0x0c5676a6, 0x3bc8c59f, 0x6bedff93,
9545 0xf21bbc98, 0x0a519e1f, 0x609d9ff5, 0x81df0472, 0x8ae142fd, 0xa1fd63a6,
9546 0x07ea02d9, 0x93c6893b, 0x9732edf3, 0x95bd7373, 0x12fc285f, 0x7c3dc7ac,
9547 0x2324e303, 0x2dbed01d, 0x8fbf48df, 0xae30abd5, 0x86bf6fb7, 0xfae62f1c,
9548 0x1f45ad60, 0x07524790, 0x2d5b7fb4, 0x0c3e7787, 0x35e54bf2, 0xcafc81a4,
9549 0x27c15ef8, 0xf1bc8fbb, 0x9fb72a3d, 0x35b90c44, 0xdcab55eb, 0x409dec56,
9550 0x27edc9e2, 0x2b893f6e, 0xae3cb4b7, 0x903bbadc, 0x7ad6ff9f, 0xd3e3c0d5,
9551 0x7a1a3c16, 0x5a7c3fb2, 0x1db7e4f5, 0x493d5c5a, 0x45209dff, 0xe0d1f97d,
9552 0x2aff8343, 0xcf06a5ff, 0xa9f0f50b, 0x7c3d87c1, 0x9f61f06a, 0x8f09a478,
9553 0xe1bbfad6, 0xc0853a6f, 0xcfc63273, 0xfdb00fab, 0xd1ddfa67, 0x2f888521,
9554 0xd239971d, 0x4a48747a, 0xc96c3e6c, 0x75ed2c47, 0x69603e4b, 0xebe4b41f,
9555 0xf7abed4d, 0xb9d8511f, 0x9da9a89e, 0xe4a7fcb8, 0x01f13883, 0x6baa1d63,
9556 0x010954fb, 0xf1bbb87f, 0x0925797b, 0xfe5e2079, 0xf2f188bc, 0x26e38a2e,
9557 0xeed74e3a, 0x608f7c6c, 0x57c593b5, 0x2f6ed4ba, 0x93ab93d8, 0x553bbe58,
9558 0x683d0269, 0x593b7794, 0xd02bafdc, 0xb18a4ded, 0x203fdeef, 0x08ef1ea2,
9559 0x7e78d293, 0xa140de28, 0xfd20edf8, 0x80fdb3d5, 0x61d7b02e, 0x30ac84bc,
9560 0xd154e3f0, 0xe21cb59d, 0xde22ad35, 0xe2b85b6b, 0x239c2f16, 0xfb903ae9,
9561 0xbe5a329d, 0xdb22d7e8, 0x52e90ca6, 0xf81f8c46, 0x9a6d0911, 0xf5fec024,
9562 0x059fe47a, 0xb85f9807, 0x797c7d70, 0x95dfe4a8, 0x4054efbb, 0xee7f52ef,
9563 0x87beec64, 0x23c54fd1, 0xff03f296, 0x15a6e5c8, 0xdb951fe3, 0x1e41f5cd,
9564 0xe4ec183f, 0x92c7bee7, 0xb77fdcb1, 0x9e0fdec5, 0xa77fe62a, 0xeba7d28c,
9565 0x3ce04898, 0x2203f9c1, 0x6efce7d2, 0xe3007e76, 0xbf01d7fc, 0xe7b12b77,
9566 0x7c82cea9, 0x1ebfd55d, 0xefccfb3b, 0x3e06ee8b, 0xc14ef7da, 0x767a694f,
9567 0x7e23dbdf, 0xdf67f905, 0xf4877acc, 0xa0e53f6d, 0xba55f713, 0xff907a0e,
9568 0x4dff9ebb, 0x7f90ddd6, 0xecf18ece, 0x145f83ae, 0xad753f00, 0x1e8057b4,
9569 0xefe7e2ec, 0x45ff3d56, 0xbfae0741, 0xa9c7488d, 0x9f4fe64e, 0xef5ff03f,
9570 0xf381fdc1, 0xc0ace807, 0x42e838be, 0xa5fbaaf9, 0x5d6fe313, 0x14517fcf,
9571 0xa5fc27eb, 0xfbe5a9f3, 0x521e5d9d, 0x4be017b6, 0x7544fb62, 0x1b6ebabf,
9572 0xd3512fbc, 0x40594876, 0xf0bca7eb, 0xafd002a7, 0xdd997b5d, 0x3c7729d4,
9573 0x8179fb0a, 0xca340f35, 0x209d5e94, 0xff698364, 0x0128de6b, 0x978bea39,
9574 0x715c613f, 0xfc58f8a0, 0x043e0d7f, 0x4f3fe99d, 0x29854c18, 0xdef8ff07,
9575 0x0e27a03b, 0x8d2f91da, 0x59127ef9, 0xe5ccf681, 0xfff4dde6, 0xe885bcdc,
9576 0x03bde640, 0xefe13de6, 0xc0d7de77, 0xbed4a1a1, 0xcf97d072, 0xf30bbf9f,
9577 0x847e3c7b, 0xfefc8077, 0xfcf9dfd2, 0x7bee98af, 0x97bddd29, 0x7f87f79f,
9578 0x9feef3e7, 0xcb9ebfee, 0x79c2aee9, 0xfe17ba98, 0xa95df084, 0xfe12939e,
9579 0xbfbde5be, 0xfef61bf9, 0x35bf9b5a, 0x93cf1b27, 0x70b0c03a, 0x40b6667b,
9580 0xc8ed7178, 0x9dd82a99, 0xd5ef3f62, 0x7e60484c, 0xf7b02895, 0x1650c821,
9581 0xcfdc240f, 0xf80d6382, 0xdd9b880e, 0x4ddc933b, 0xc9137768, 0xbc53aedf,
9582 0xbe7abdac, 0x911acf1f, 0x21056f71, 0x8fc9399f, 0xbf8b6ef1, 0x5d1028d9,
9583 0x74aef6a0, 0x818f37f5, 0xb48f23df, 0x9805ed45, 0x33690fbe, 0xaaca638f,
9584 0xdc87f262, 0x53bce6f9, 0xbcede733, 0xf061073f, 0x0c247c3b, 0xd4716cf1,
9585 0xd3ce1561, 0x02256389, 0x4938a54f, 0x0efc086b, 0x7dfccfbb, 0x7ee10252,
9586 0xc7865fef, 0xa716048a, 0xed718512, 0x9471e03a, 0x78dce30d, 0xe2f11b48,
9587 0x08baf7c7, 0xf17baff7, 0xf80ed4da, 0x663fc094, 0xd5fa17f6, 0x12d3fb84,
9588 0x691a42ef, 0x76e69dd3, 0x2cbe8fdc, 0xb25d189d, 0x969d39aa, 0xd062e899,
9589 0x4c7d0e21, 0x7cf03174, 0xd2b1f4a5, 0xebff8ac5, 0xf75f1813, 0x2e832f47,
9590 0xef1d6e99, 0x7fdcc9d7, 0x133f0128, 0x820199f2, 0x7fdcabfb, 0xbc745290,
9591 0x7eaa24a7, 0x7e0097bc, 0xe01a945c, 0x86deef2f, 0x3f73a4f1, 0x00dbff7f,
9592 0x44afd54f, 0xebf8a0e2, 0x5121eddc, 0x2b0a5ef8, 0xb6569fe0, 0x404fb889,
9593 0xacd168a4, 0xc3627d98, 0x85faa80f, 0xb953e707, 0x4e9e1ed7, 0xf7dcafbf,
9594 0x61da0141, 0xcfd1bb2b, 0x605cfd09, 0x14750f74, 0xa5703ec0, 0x2b11fcc4,
9595 0x6049acbf, 0xcfb396f1, 0xae20cab9, 0xe762ec23, 0xb7232b7f, 0x7398f6c8,
9596 0x9904a14d, 0x739e9bc5, 0x3d085ea1, 0x28f9e021, 0xdcf62f80, 0x9c87e1a9,
9597 0xf060427d, 0x9df197ed, 0x4f5dca98, 0xaa7c4275, 0x1fbb2df2, 0x5dbaf8cc,
9598 0xc87ee29f, 0xf1ec5f94, 0x2e1fa076, 0x7d12e29a, 0x44bb01e2, 0xb6da8fe4,
9599 0x6843f41a, 0x36a2f91e, 0x2beffdc2, 0x7eab57f4, 0xb83efcf1, 0xf4f55670,
9600 0x7f885ee3, 0xe1df699d, 0xaec0b8c5, 0xfae7c74b, 0x3591fff8, 0xd6ffffdc,
9601 0x3b4f7669, 0x067fffbe, 0xf176a0fe, 0xfb9609d3, 0xb106bbab, 0xb44914f7,
9602 0x71ef52e8, 0xf0b9ed55, 0xcfafc428, 0x51e4fdee, 0xcffabb80, 0xfc14787f,
9603 0xa9d0720a, 0xba827dc2, 0xf18ebf9f, 0xdfbbe33e, 0xf9d03d70, 0x2f18e3c4,
9604 0xfa9b7ced, 0xe75ff41f, 0xc0b3a7f3, 0xea7ceccf, 0x4f10698f, 0xa9f9f3b9,
9605 0x9dce6ef8, 0x27494ccf, 0x9189f471, 0x0786ff02, 0xd2b5af10, 0x11db48ed,
9606 0x51ce7ff4, 0xd9ff83ba, 0xd489d713, 0xc69978b0, 0xe3bb39e3, 0xc4fbc7c7,
9607 0x7d66da6f, 0x4842c6e7, 0x0646bf65, 0x4139c710, 0x006639e9, 0xe3cddc74,
9608 0x5d6f9175, 0x0e738e32, 0x3af4a0fe, 0x85e3a16b, 0x3d8f45b6, 0x836d750c,
9609 0x44e38dfa, 0x233f8007, 0x413fbefe, 0xe40122ff, 0x60bfef68, 0x37e80cfc,
9610 0x73b84e9d, 0xd82c85cf, 0xee48f8bf, 0x85ef8b9e, 0x21576f3c, 0xfcf9511e,
9611 0x9d4f289b, 0xf8c71ccf, 0xf071e136, 0x8ff3d24e, 0x99f92bc5, 0x1eedbacc,
9612 0x74e1ff16, 0xe690f880, 0x071e72c5, 0xc46d7c62, 0x0b8bfa87, 0x73b1718d,
9613 0x40bec627, 0x7877f6cd, 0x6e97a5bc, 0xd7a044c2, 0xcfdc97fb, 0x02a0f030,
9614 0x8d8dae1e, 0xc38fc67b, 0x2d3dc4f5, 0x427a0374, 0xae27b3bc, 0x7b13d849,
9615 0xcde16175, 0xcef47178, 0xda5e2c2d, 0x8f3fc729, 0xaf41c465, 0x9fe25976,
9616 0x3fc581e1, 0x2b8f372f, 0x9760d3c5, 0xf15afd86, 0xf8abf675, 0xae5bfdfa,
9617 0xe85f9d81, 0xdaad7f77, 0x3de61f7c, 0x05dd3825, 0xef6d6bfb, 0xa7cf042b,
9618 0x2b73b374, 0xf967be7c, 0x3fb3d3f9, 0xd62e3117, 0xfa823914, 0x8c3faadd,
9619 0xbc2b57fd, 0x6b787077, 0xe3f5b3f7, 0xd84f5eec, 0x7b39fb4d, 0xebe439f8,
9620 0x63efddda, 0xaee8ee5c, 0x988e95a7, 0x8fd616f5, 0xce7ccc70, 0x80a8793e,
9621 0xdfe379c5, 0x3171ab1b, 0x40eeb37b, 0x76ea71fc, 0xa71a6a7f, 0x9851142a,
9622 0xf1e9701d, 0x2dfa48ce, 0x7699dfd0, 0x3a4ddf19, 0xbee31113, 0xc9701c17,
9623 0x95a11f7c, 0x475d0fc9, 0x71c09ef1, 0xf0a77f76, 0x573c04b5, 0xd2f1e77f,
9624 0xb7fde077, 0x8358a93b, 0x82b6dfdd, 0x4fdb69f1, 0xef4021f4, 0x13dfe3b6,
9625 0x07dafd61, 0xffb18df8, 0x4fd44e8b, 0x50fd50f1, 0x10a06ef4, 0x77aad5d8,
9626 0x66cb7dae, 0x938e9f82, 0x2342eb0e, 0x83ee07ed, 0xbc39b9c0, 0x569dee57,
9627 0xaa88f00a, 0x7d0a754d, 0xf9bb21e7, 0xafde557d, 0x21ef9aac, 0x6bc6af90,
9628 0x266f8fd0, 0xcc664b8b, 0x9f165232, 0x87f7190c, 0xabc213ca, 0xaf7f7ce8,
9629 0x28bb3706, 0x8d9e7c5e, 0x78112fd9, 0x06a26a27, 0x2e63d3f6, 0x4bc1de7e,
9630 0x83bcecbc, 0x7aa3643b, 0xf6ff61fd, 0x9e08930d, 0x7c06d867, 0x819e73d9,
9631 0x2f800b44, 0xea7d768d, 0x321de72d, 0x5a2a13e1, 0x17338722, 0xfd5025ee,
9632 0x77866ab2, 0xf11fe42b, 0xb2cdf7b0, 0x3821f748, 0xdb8db0df, 0x1560d9a3,
9633 0xe77df6e7, 0x6fbeebec, 0x78a53296, 0x853f30e9, 0x535ff5d3, 0xca7c5ce1,
9634 0x0d4fc52d, 0x2d856951, 0xa3dc1a63, 0x78bc7949, 0xcfcd066c, 0x34f4ff5f,
9635 0xe2f7ffac, 0xff3459b1, 0xb20e7b93, 0xcf012afa, 0xaeb0bec1, 0xeff01a76,
9636 0xd9fb96d7, 0xb9663314, 0x77f0057f, 0x77eef02e, 0xae706917, 0xefe15ba2,
9637 0xdda00465, 0x7f0c89d0, 0x9f77ee99, 0x98657f02, 0xf00563ad, 0x7fcf63eb,
9638 0x16f78491, 0x2aa1fbf9, 0xdce15469, 0x789a2d15, 0xf3e712f1, 0xccfbbcfa,
9639 0x498dcbf5, 0x3f8177c1, 0xbc8de79a, 0xef1d1a6f, 0x0e718ae1, 0xf2d00e76,
9640 0x829aa34e, 0xe9c85d74, 0xcb3df84a, 0x8b3e7c45, 0x02c290c5, 0x7f5caddf,
9641 0x5751ef19, 0x1ef4578b, 0xdbab8735, 0x67fbefd5, 0x3378007f, 0x007f8293,
9642 0x3fdf59fc, 0xb815c57b, 0xe519f500, 0x5c7de25f, 0xeb333de3, 0xea4468bb,
9643 0xfb3efb8e, 0x5a2efe56, 0x9bfef07f, 0x69ba283b, 0x682f39ff, 0x39518f7b,
9644 0xf150b31b, 0x31cfd1c3, 0xd2fd0bcb, 0x0426c220, 0x1fa71076, 0xf788cf3c,
9645 0xb822ee1f, 0x1765db5f, 0xbbaff074, 0x7d4549fe, 0x3a70b99e, 0xae5d5ffa,
9646 0x339c08ec, 0xc35bbaea, 0x018a3d7d, 0xe869e401, 0xf828c481, 0x3e1e5487,
9647 0xe7c3c8b7, 0x8f37fe66, 0xdb5175db, 0xa9fd81df, 0xa06a3fbc, 0xed8bdcc5,
9648 0xee9e9912, 0x8e10d06a, 0x087424a1, 0x8e81fdd6, 0xebe6e397, 0x46cfa737,
9649 0x9eeb9e9b, 0xee1ff880, 0x28ffc18e, 0xcc74bf77, 0xe63a3377, 0xd1d0e3bb,
9650 0x7bdd6efa, 0x6858e0ae, 0x28fcba77, 0x7d675fbe, 0xdf4aceaf, 0x21f5a93a,
9651 0xed2b3b78, 0xfeb8a7c0, 0xb31bf418, 0x29d22c7c, 0x00939e86, 0x3e07318e,
9652 0x06bc01b5, 0xe7ec1f1d, 0x9ba9793c, 0xf1d673ad, 0x063acad2, 0x9fb4e307,
9653 0xf74cd6e5, 0x451c0a0e, 0x69ca897e, 0x87c58dba, 0xb7efb6fa, 0x9d4b9cff,
9654 0x59502cf3, 0x73ff14bf, 0xfe064f00, 0xfbf3756f, 0x7ff17dea, 0xf8a3b43b,
9655 0x3fe61dbf, 0xbbcffc00, 0xfb0dfe14, 0x87eb8abf, 0xa29fd82a, 0xda1ff47c,
9656 0x3a1cb4cc, 0x8dd134ee, 0x8764b072, 0xd931f7c8, 0x3e865ffb, 0xfd5d7259,
9657 0xb917b821, 0xf20267e4, 0xfefe42eb, 0xfdfc27e5, 0xc1b9eb4b, 0xea10b2f2,
9658 0x1f9fcbcb, 0xaa3ea30c, 0xff2e65da, 0xbbcf7767, 0xde785997, 0xad352417,
9659 0x2b4ebdf7, 0xb9bbcffe, 0xb4e858de, 0xd72f7bc5, 0xdbd68748, 0x33cce74c,
9660 0x83f4f4a6, 0xa6cfa0fe, 0xb8f189bd, 0xc409957f, 0xa5297413, 0x2019de10,
9661 0xf4094285, 0xd7e5cc5b, 0x72d86fe8, 0x1d9ffaf3, 0xcc43df32, 0x43df316d,
9662 0xbe6ade1c, 0x66d57887, 0x51c43df3, 0xc43df361, 0x338d766b, 0xae4747e5,
9663 0xb31fb537, 0x3f29b27f, 0x534dfa36, 0x66c7f1fb, 0xda13f29a, 0x7f6a67bf,
9664 0x4df35bed, 0x5475d7f5, 0xf86fea9a, 0x7f299968, 0x9b3ff763, 0x311747da,
9665 0x61b878fd, 0x5bdc1179, 0x7872f030, 0xa15362a9, 0x9b08e97c, 0x9e5b105a,
9666 0x90056ba6, 0x7fe0e916, 0x532f27f5, 0x8a2a3f1c, 0x898ba75d, 0x536fd26c,
9667 0xd47ce61c, 0x8f7dfe6d, 0x35722c97, 0xcb527ea4, 0xbc1d9a08, 0x63cf0f24,
9668 0xc63af953, 0x01b1dbf5, 0xa0dfb7ea, 0x9b46d57c, 0x2f956f20, 0x9a01bde3,
9669 0xad8fd886, 0x1f9f77b0, 0xd4f99a72, 0xf95e8fd7, 0x0738db9d, 0x53facad4,
9670 0x264bc6cb, 0x3fca3139, 0x172d8c2a, 0x73c74f16, 0xabf5fd40, 0xb35c16f8,
9671 0x3bbc107d, 0xa3530f3c, 0x16cca9bc, 0x67dfdcf7, 0x7fd0bfee, 0x8ec7dcda,
9672 0x7cf00cfa, 0x26daf7ce, 0x7b56bf38, 0x51fa377b, 0x5e337619, 0x5decf37a,
9673 0x479e0363, 0xac3e481a, 0xb6fdc6f7, 0xebe13445, 0xd177ce36, 0xe0d333db,
9674 0x3f66419c, 0x87a155fe, 0x1b47ebe9, 0x042cd742, 0xe98711c2, 0xb456795e,
9675 0x39f81a6e, 0xeb79f8c3, 0xe7f8b64d, 0x0c3c92a0, 0x48a0e92f, 0xdd505ec1,
9676 0x2b9c2f68, 0x4f0bd77f, 0x0f68dcc7, 0x38e87926, 0x17b4c7f3, 0xbad4fbb1,
9677 0x5ee8e67f, 0x947d0db8, 0x026c0ee5, 0x93e592fd, 0x17dd9688, 0x83dbf49e,
9678 0x788ef02d, 0xefcdb263, 0x00b77cc6, 0x4c7fd9e3, 0x5e3a20c8, 0x84459fe3,
9679 0x75f0f1af, 0xeec83e78, 0xabb8c7ae, 0xcfc24f31, 0xe6711809, 0x89d9be0b,
9680 0xabc6cf80, 0xe107ee7b, 0xdc17907b, 0xf7e876c1, 0xc71946c2, 0x982c9c6d,
9681 0x4b798dea, 0xf78dbf9b, 0x6cdcb2be, 0xde74e5de, 0x933db700, 0xa8f8d5c1,
9682 0xae113240, 0x28f4bdff, 0x5cfb35f8, 0xc507def8, 0xc7c010c7, 0x73fb3d39,
9683 0x3a79319b, 0xee419aaf, 0x9ed16bad, 0x4ea7ef89, 0x8fa1e637, 0xe33bd134,
9684 0xe2fc332a, 0xc6fd1946, 0x3c6e4945, 0x886e10ef, 0xe79afa72, 0xf99be4df,
9685 0x5c295b9d, 0xf8884eab, 0xd1d6b6de, 0xfd28f4ba, 0xe5cdbcae, 0xf17d6b0f,
9686 0xf0634e7f, 0x7ba7f852, 0x4f36de40, 0x79e3f9c3, 0x31ff806a, 0x0d9c3c81,
9687 0x452c17fc, 0x236c183e, 0xc7d36fb0, 0x7930f04e, 0xd951ed9e, 0x72be357b,
9688 0x85be8726, 0xfda76cd7, 0x5dfa7995, 0xb0f36ff7, 0x4f36ff75, 0x72ff759c,
9689 0x975707ef, 0x54851fb5, 0x37b445d4, 0x111fa908, 0x3d53476b, 0x1bfd0e56,
9690 0xc7f13179, 0xff6fd005, 0x65bf9a76, 0xede5f644, 0x80cfb034, 0xecfb0d0f,
9691 0xaed98f4e, 0x3fbbd18c, 0xfbbd30f4, 0xf4c0cf43, 0xfda18fee, 0xe345efe9,
9692 0x4aa935da, 0xb4f7bd7c, 0xac1fdd87, 0xe7821553, 0x0fd9fb03, 0xdae5c9d8,
9693 0xd6feef3a, 0x1ff9cba5, 0x4f832e39, 0xfcfefacd, 0xf4112d31, 0x4207ca54,
9694 0x86b777dc, 0x3c6dbf2c, 0xad9b6bd0, 0xf7cc3378, 0x78fe1667, 0xf59f4d68,
9695 0x18f1cc2b, 0x6ac78b8e, 0x099b478a, 0x973c3b8f, 0xb6bf0fb0, 0xdf30afbe,
9696 0xf8e4e9f3, 0x09bf7aa6, 0xeb373bc6, 0x6b8822bd, 0x1cf9ced4, 0x1ed7fef5,
9697 0xaebccca7, 0x1d397e18, 0xa1e00567, 0x799fd673, 0xe303ae7c, 0xb99eab4a,
9698 0x58e2112a, 0x7a0d9335, 0xaa7df044, 0x4839f9f3, 0xecfb7397, 0x2e79c03a,
9699 0x3d139d99, 0xa3daefb7, 0xa4f8f710, 0x2c7258e1, 0x793dcf7d, 0xfda648bc,
9700 0xbc7bdb9d, 0x7703c248, 0xd43bd361, 0x5b7f1735, 0xdef77014, 0x37e1e84b,
9701 0x368f5b07, 0xe57c593a, 0x37173841, 0x6abfda86, 0x7a65f212, 0x285eed9a,
9702 0x1dbf1d17, 0x395c21fc, 0xa62fe63f, 0xd04ab259, 0x7ec11633, 0xee373cd3,
9703 0xc972f967, 0x9dfa6cc8, 0xe387ad12, 0x6af9c4cc, 0x04efc098, 0xf1444eb8,
9704 0xef3c02f7, 0x3ef86076, 0x02b243f1, 0xbdffc29e, 0x78093c1a, 0x09ab3a4f,
9705 0x77c41a89, 0x471e6e8a, 0xd30a6953, 0x3ab7ddbf, 0x848cf7f0, 0x53aaaf05,
9706 0x3cdafea8, 0xdd8efd93, 0x920b63f9, 0x55691fc0, 0x0df2de99, 0xb463e1eb,
9707 0x6be7078b, 0xe6231737, 0x40577c75, 0x921d1955, 0x8a6b6c33, 0xf9c78c35,
9708 0x25fe98f3, 0x3dff1a52, 0x1eb7ca29, 0x1c43a6cd, 0xc5cef8d8, 0xfc522bbf,
9709 0x7803cebf, 0xf0fcdb46, 0xabfb8f4e, 0x92ca386f, 0x28ccfb69, 0x945e5fbe,
9710 0xc39de1c0, 0xfbef07de, 0xd345e34e, 0xd4b5187d, 0x27b74efc, 0xe214b4d0,
9711 0x6defd0fc, 0x8bcef8c9, 0x38a29eb9, 0x0bbb9691, 0x0aaee5cd, 0x47e18f9a,
9712 0xf6d677eb, 0xae925f86, 0x37f63832, 0xbf0f1038, 0x79fd506c, 0x340e8f94,
9713 0xb07f30f8, 0xda34c341, 0x0fcb1230, 0x2f31f837, 0x986cf4da, 0x7faffa4f,
9714 0xeebb1490, 0x9d54efc2, 0x75c3e18c, 0xf9ade472, 0x88df8f80, 0xaf15af88,
9715 0xdefe478e, 0x3a8e9a34, 0x7367bd86, 0xfefec632, 0xd257f2e9, 0x0d5f284a,
9716 0xd3afd1f9, 0xefc3c64a, 0x17f3b096, 0xf63a4170, 0x257aee1e, 0xe093f9a0,
9717 0x34c63477, 0xfbc2863b, 0xc95bc1a4, 0xfd239458, 0xbbf089c5, 0x6c337b0b,
9718 0x949a7eb4, 0x07f8ecd7, 0x64deab80, 0xe7e7afe7, 0x6c9f1f33, 0xbce3afd6,
9719 0x0a66ff4c, 0x71bce3c5, 0x537e09f8, 0x39acfd00, 0x3307b9c6, 0xbf54891e,
9720 0xeb8a76e1, 0xdfb3efe6, 0xc754485f, 0xf7bde1fb, 0xcec35ecd, 0xbec5f7a9,
9721 0xff99bee7, 0xe1e2440e, 0x29176825, 0x103bf63e, 0x0f7b0a29, 0x4d930489,
9722 0xe5cdedef, 0x0606ccfd, 0x1f57d09a, 0x15fde6cf, 0xfb0e791d, 0x8897df83,
9723 0xf087eff5, 0xccd8c3df, 0x3574d3f5, 0xed4dec50, 0x5bd4676d, 0x7759ebbf,
9724 0x0bd1216d, 0x890143f6, 0xed04bd80, 0xd4bb698a, 0xdc02030f, 0xd7ce33ef,
9725 0xcdf80b3e, 0x93ddfdef, 0xebc3027d, 0x8a7d3c93, 0xd4494eff, 0xe3079813,
9726 0x123c16fb, 0xca7603da, 0x6206bb3e, 0x8fe47452, 0xf8947ef8, 0xe701c53b,
9727 0xbc0f53fc, 0xd9e5eecf, 0xbf38143a, 0x7c5bd2b8, 0x4551c413, 0xf3033ea5,
9728 0x816f4ef7, 0xfa9e83fc, 0xdda3d887, 0x1f0137c5, 0x06f7f3a4, 0x01000408,
9729 0xe1aa080e, 0x43fd638f, 0x64654eb3, 0x2bf2cc9f, 0x873637bd, 0x3f5f2132,
9730 0xf208f80f, 0x7dbfb48d, 0xc021c149, 0x86e16e47, 0x423763e6, 0x037f68de,
9731 0x5789ffb6, 0x3b8ffe65, 0x4af60d98, 0x79a55e4f, 0x625e4c4f, 0xa960e279,
9732 0x239abf31, 0xd073c47f, 0x3bd807b5, 0x6607a95d, 0xd4cf3008, 0xff1033fd,
9733 0xbcb7d5e7, 0x878c342b, 0x04eb608f, 0xf41b978b, 0xa6e1ee30, 0x79f783d9,
9734 0x9d61f863, 0xc4c76cd7, 0x0fbc27dc, 0x1fd3ddf0, 0x36cbaf8f, 0xf74a9ef6,
9735 0xc6efd88f, 0x547b030d, 0x86b9b884, 0xa3dc2e69, 0x70c1fea7, 0x98395c12,
9736 0xcde35fd6, 0xb55e3a41, 0xa9cdfb3b, 0xa75f2f5a, 0x80772964, 0xf8b54e3e,
9737 0x3f5cd935, 0x7f8b508f, 0x372b4893, 0xf0b5c10a, 0x8f686c9e, 0x937de2ac,
9738 0x4728195d, 0x228eb967, 0x5f3183f5, 0xcbbfefcd, 0x476b832b, 0xc4591e81,
9739 0x76556ef4, 0xdfa658a0, 0x8d973d57, 0xf0670bbf, 0x2452555d, 0xf7bb9c6d,
9740 0x3791b75c, 0x21e4477e, 0xef09d5b5, 0x5afb18f2, 0x6437fbb5, 0xc7fd3ec1,
9741 0x3b46de87, 0x36624971, 0x76d359c2, 0x69df815c, 0x7ca36da9, 0xd8fbbf47,
9742 0xa3c763d9, 0xc887f25f, 0xbe026fa0, 0xc368d0fe, 0xd9fdddcb, 0xfd522f55,
9743 0xea85d3a6, 0xd3038368, 0xd5fd7a9d, 0xf09c0ae0, 0x49c9b82e, 0x1cf1e9f9,
9744 0xeafe055d, 0xf51eb7bc, 0x3a8ae3d8, 0xd3aff80a, 0xe066c3fb, 0x9124aae7,
9745 0x5f0febf3, 0x7ef8f3d6, 0xb9efcd3d, 0xbfa6edb7, 0xa160df68, 0x7ba9fed9,
9746 0x41fc8dc4, 0x02df92ed, 0xb66ed51f, 0xb3fd6085, 0xbef1da39, 0x1be82773,
9747 0xfbe65fd4, 0xa6051b99, 0x5873430f, 0xf772fa1c, 0x74be2b34, 0xfd8c7091,
9748 0xe99124bd, 0x84290aab, 0x5f1576fb, 0x2ffeb17a, 0xba69c71f, 0x1c77da0f,
9749 0xe31bd637, 0x838ef754, 0xf6fd527c, 0x5fcff461, 0xafb0dabc, 0x77ffd475,
9750 0x61cfc53e, 0xe874f538, 0xd0d941e7, 0xa4cfd427, 0x1ee78678, 0xf9243e79,
9751 0x47a97908, 0x2e6dacff, 0xf6fa04c9, 0x7eb313d6, 0xb74a25d2, 0x3e781297,
9752 0xc9737f74, 0x13ed38a4, 0x8c73ed2c, 0x7fb14ffc, 0x3a0f3c2b, 0xda0ef37b,
9753 0xbd93fa5e, 0x6df00f27, 0x4bfa59b0, 0x86dfc636, 0xb7fc19fd, 0x65fbbbc7,
9754 0xa5e9ef78, 0x10f140a4, 0x2068df66, 0x15245b87, 0xc0d1877f, 0x3ebe1ef3,
9755 0x8d797c55, 0x78bdff09, 0x9f95302f, 0xfb4cd06e, 0x2e178ba1, 0x7b3f7bc3,
9756 0x41563af8, 0xdb3eec42, 0x7da6b923, 0xc70fffd0, 0xb8a385d7, 0xfe4a381f,
9757 0x328c70c6, 0x385e81e9, 0x5fe54df2, 0x69310e17, 0xec366976, 0xa1b1ad53,
9758 0x0b66909f, 0x6ec07239, 0xf7ec5ffb, 0x0734201a, 0x61a899e7, 0xce57da6c,
9759 0x079f6039, 0x448e79c6, 0x40e3498e, 0x056d749e, 0x913f53ac, 0xe5a1afd0,
9760 0x8619390e, 0xfde1d56e, 0xd8952a2b, 0xb0754e5f, 0xe6f51986, 0xab876277,
9761 0xe5a258a4, 0xb879d5e3, 0xdd94e5ee, 0xfdf60755, 0xcfe17736, 0xbc931357,
9762 0x5ab27da2, 0xc7f68a58, 0x9b17c49a, 0x3d38df61, 0x0233d981, 0x58f9b179,
9763 0x267abc46, 0xbdf72daf, 0x31c41378, 0xaed4aeb6, 0xab6e7f06, 0x0c391c33,
9764 0x6e3df9eb, 0xdcaa3dfc, 0xf816e175, 0x83710abd, 0x314bd70d, 0x2b6bbc29,
9765 0x6078179c, 0x8bec1f84, 0x40d760ad, 0x5c6e35fb, 0x421a5bff, 0xe2af2f68,
9766 0xf5f6c0eb, 0xe7385493, 0x9296e8dc, 0x916bbd61, 0xb8056feb, 0x64efba5e,
9767 0xd03ae3b3, 0x4196fe63, 0x80cbef3c, 0x71cb4d75, 0x14f5e58c, 0x68575b19,
9768 0x3485c183, 0x44ffc3f2, 0x33d412ad, 0x6b0ed127, 0x04ab2f74, 0xbfd68e3b,
9769 0x7a78a0ec, 0x85e3993c, 0xe8f4e7d7, 0xa0cd93a5, 0xbd15c507, 0xef3a12f9,
9770 0x7a633f1d, 0x3fda09ea, 0xe7452bbc, 0x18778213, 0xe84947bb, 0xc1242587,
9771 0x74d0c76f, 0x9dfb0e74, 0xbd17aa5b, 0x3849c7e8, 0x491f635f, 0x0f7ec519,
9772 0x7ac3da1d, 0x83919093, 0x0cca98fb, 0xe2835ef6, 0x66fde371, 0xdd5677e3,
9773 0xb3a7f8c4, 0x67df2978, 0x43de5971, 0x895fae70, 0x784ee99b, 0x4f862137,
9774 0x0b7bcb15, 0x07cc0912, 0xcd544b7b, 0xe449bfe5, 0xd8834afb, 0xb70eadef,
9775 0xa32ed085, 0x35e98452, 0xd9f68a24, 0xf981d268, 0xe66de031, 0x0d2c35c2,
9776 0x278d8e2f, 0xbbe2c8ba, 0xc7ec1101, 0x788d5bb4, 0x44f5f04c, 0x96bfdeba,
9777 0xfc36e3c8, 0x66538c77, 0x7d7ee214, 0x5fab1266, 0x0fbbc815, 0x338dbcec,
9778 0xc69c61a6, 0xf58cefb0, 0x16dfb0d2, 0xab579872, 0xc17b5c42, 0x3a16ebb0,
9779 0xb6753e59, 0x8868e0fe, 0x0b53b66b, 0x2fee1b34, 0xf96af8b3, 0xb034e2e6,
9780 0xba1e16cb, 0x4ce4ed15, 0x8b65d995, 0x8250ce36, 0xdadee1a3, 0x8a07f43c,
9781 0x84484c37, 0x4ed5847d, 0x8575e27f, 0xfbe267e8, 0xc7b503b9, 0x355da6b6,
9782 0xab71e419, 0xca90128d, 0xeeb24bfb, 0xb17c0b1e, 0xcced0f21, 0xc6c109ad,
9783 0xd6efda24, 0xabfcd67f, 0x4ea7fe68, 0x8c38f0bd, 0xd5813ab3, 0xc051bbc3,
9784 0x12e73d9b, 0xc9bbe1b6, 0x3d6f8dfd, 0x1252f097, 0xa8ca7f7b, 0x7e536fff,
9785 0x80007d7c, 0x00008000, 0x00088b1f, 0x00000000, 0x7dbdff00, 0xd5947c0b,
9786 0x66fdf895, 0x666579be, 0xf263c992, 0xc2130922, 0x9e4e5e4b, 0x124c2280,
9787 0x4cb443c2, 0xe8202a10, 0xa79034f0, 0xbadc5d48, 0x30040cff, 0x5706b650,
9788 0x84ea2b11, 0xbbaac562, 0x351ba341, 0xb88080ea, 0xda446dd6, 0x8ffd16d2,
9789 0x4810154a, 0xfed2b58a, 0x39cf65dd, 0x7cccdef7, 0xb5f01993, 0x3efeb4ff,
9790 0xe7ddf7ee, 0xce73df79, 0x12e973bd, 0x2c614dfc, 0x5630a494, 0x51c1d8ca,
9791 0x618cf58c, 0x24dea98c, 0x064dcf06, 0x34e2d26f, 0xa37efac6, 0xf5e1bb67,
9792 0x926f6617, 0x25d8c6c3, 0x79fa2ed1, 0xa0b199aa, 0xcdb3b189, 0xc11c166e,
9793 0x336699d8, 0x1f966b95, 0x9fa0c698, 0xb9850e9a, 0xc55b19f2, 0x3f6336da,
9794 0x69923baf, 0x3d0155dc, 0xf4648e0b, 0x5bfe0977, 0xd528fcbd, 0xebc9dd5f,
9795 0xaa0eb2d7, 0x4f3192bf, 0xf76b3c07, 0x1cd0595a, 0x51df5fae, 0x4a1f69ac,
9796 0xd7bf51d2, 0x3b06fb25, 0x5bdd8c9c, 0x2abefc3d, 0x5d569f78, 0xfae1f662,
9797 0x13e38e58, 0x87afa8ab, 0xebe63af7, 0x77aeb188, 0x49de5c04, 0xac4e8a82,
9798 0x32b1d0ed, 0xe03ad6c6, 0x1ec62e9f, 0x6c7cd850, 0x15f7f6b7, 0xc2632919,
9799 0x9e2ad6ed, 0xf898c70c, 0xa8bc6a70, 0x88d48167, 0xc467dab2, 0x345e35f5,
9800 0x0ef3fbd2, 0x63075fb3, 0x3ff4c91e, 0x7fac2d70, 0x1953eb26, 0x909f53cc,
9801 0xcd5d8e38, 0x71258b58, 0xba673e37, 0x08a17d0c, 0x53333038, 0xf8337e71,
9802 0xc4ebf62b, 0x71944769, 0xed403ed8, 0xa98ed967, 0xc473400c, 0x8303735e,
9803 0x90b037f7, 0xce060aca, 0x28fdfa0f, 0x2359dfb2, 0xdd1be5b5, 0x09ecf2da,
9804 0x7e6332da, 0x9a4fd782, 0x1a4eca9b, 0x04fefdc2, 0x0311d6a6, 0x5802b72e,
9805 0x5eed7eb1, 0x0464e04b, 0x923beb1e, 0xaec6e535, 0x88c9c0ac, 0x1ff16a71,
9806 0x135ff059, 0x589d775f, 0xdf4607f7, 0x5bc00ead, 0x71190b3d, 0x46c140dd,
9807 0xacc658ef, 0x7c45e616, 0xf16fd81d, 0xcfe812b0, 0x00b76e66, 0xabbb1b7c,
9808 0xdef02595, 0x30ef876a, 0xe196273f, 0xfaf03569, 0x0e88058c, 0x39da8fe0,
9809 0x5bed99bd, 0xb713e415, 0xcdfedaab, 0xff00dde7, 0x4f0293dd, 0x24ac3d95,
9810 0x0ea3ac46, 0x5e1e91d6, 0x07eb39c7, 0x582f8865, 0xa5ec6fcf, 0xa6461748,
9811 0xf3d78524, 0x5cb5e1ad, 0x5dc6af0b, 0x1837a236, 0x1844bde7, 0xcea761a7,
9812 0xceb2846f, 0x7e4463dc, 0x3ce917b9, 0x1c72de06, 0x6f3c4c4a, 0xe0c73c43,
9813 0xfcaceda7, 0x1cc7e43e, 0xc7181fe4, 0x6527eeb6, 0x8f818b27, 0xfa1737aa,
9814 0x054dbea0, 0x547186fe, 0x08a9bff8, 0x6d3bd9c8, 0xe9d03255, 0xc3e73b29,
9815 0x7a2e890d, 0x0abc50ee, 0xe75d35e2, 0xd5fa47c9, 0xcc43b827, 0x66a3f1c1,
9816 0xcb601942, 0xf962c1ae, 0xefe81ebd, 0xcb1b9821, 0xf0098416, 0xcbc2c878,
9817 0xefca392f, 0x6ee308dd, 0x0de5e64a, 0xd5b9bd3f, 0x16ca093f, 0xe5439e59,
9818 0x416d0c87, 0xffdde03d, 0x44f5c982, 0x28f7b53e, 0x32305e58, 0x4d4c04f0,
9819 0x2365843f, 0x4226a65e, 0xf4b720e7, 0x9b769a2f, 0xeed05ea0, 0xa78427fb,
9820 0xfb39ff5c, 0x26363cf1, 0x4d7e7f66, 0xacdf797f, 0x53bf183f, 0xfbf87577,
9821 0x419dc4d4, 0xc2e76f3d, 0xe7a72c76, 0x9ff43f03, 0x6d89a2fe, 0x0623e285,
9822 0xda179b76, 0x632c5dd5, 0xd43908c1, 0xb679f023, 0x5b7241d9, 0xf943afbe,
9823 0xa9f9063d, 0x7d70e487, 0xfe46aa47, 0x7f5cb94a, 0x7f4d5af1, 0xc27c8e39,
9824 0x43dabd57, 0xe2feadf2, 0x121efa64, 0x736cf4f2, 0xf889e926, 0xc8d20ce3,
9825 0x1338f0f5, 0x72f8b059, 0xefa24ce3, 0xcbe61c72, 0x06bdb922, 0xa4240ce7,
9826 0x87bc8237, 0x750c2e71, 0x465f2525, 0x0276d99f, 0x67ac4591, 0x63341a9b,
9827 0x07dcdbff, 0xfc18be1c, 0xb844e520, 0x1edb51bd, 0x811b23f4, 0x4863edf4,
9828 0x7aacffb7, 0xd4fa91cc, 0x5038f066, 0x8af6a86f, 0x34372e23, 0x86647e4d,
9829 0x5169280a, 0xd97f3d39, 0xd1e881b6, 0x411f706e, 0x3aeddafc, 0xafbe1f97,
9830 0x483ce9b7, 0x730e2d27, 0x51bdf100, 0x7281c1b9, 0x076bf643, 0xb8f38f31,
9831 0x7a421b60, 0xd57ade3d, 0x0f54898b, 0xa9199266, 0xc6f7ff1f, 0x0f17c583,
9832 0x31bd8f1c, 0xfa0b88f1, 0x6e744b57, 0x910be00b, 0x1d0471fa, 0xdf63f744,
9833 0x779cc6a9, 0xff093d74, 0x8436f8b8, 0xe7fe1112, 0x8119ba6d, 0x4d2ef318,
9834 0x9e9bbe56, 0xdf25145a, 0x3c3b7f93, 0xd095ed88, 0x49f20a0f, 0xa32696fe,
9835 0x90bc2dfc, 0x3922e958, 0x73b5ee9f, 0xb6e385b1, 0x7d9a8ed8, 0xed988fa4,
9836 0x3ebfd913, 0xb849fd3e, 0x64aade18, 0x04601f88, 0x4ae37a86, 0x412bb070,
9837 0x1597e22f, 0xd3e50caa, 0xa76f3a40, 0x77d7f4f9, 0xeb11e743, 0x0edd516f,
9838 0x75fd6ba4, 0x99ca331e, 0xe6398ef5, 0xaa379410, 0x20f9d9ae, 0x02defa87,
9839 0xb7d6127b, 0x1cc8ad29, 0xc15a8f8b, 0x2df9c46e, 0xd669d64d, 0x1d669f23,
9840 0xf7e8dfe7, 0x9eb9925b, 0xb13fdd68, 0x9f1253c7, 0x79d2407e, 0xcb9b8f51,
9841 0x5856c754, 0xe7c0de9f, 0x0763896b, 0xc1e37eca, 0x0b7ecb6b, 0xa87569c9,
9842 0x44f68039, 0x549b78f4, 0xbe078f77, 0xf8f9826f, 0xc7c39cb1, 0x3aa254df,
9843 0x16d74376, 0x47330257, 0x4b3837d4, 0x6c17fe08, 0xdf0f4c69, 0xc63d2137,
9844 0xd3849798, 0x68efe4bc, 0xe8a2f93f, 0xc3b7f732, 0x5d0d10d9, 0xcba2c6b6,
9845 0x4b37a879, 0x3999fcf9, 0x9343fe72, 0x8c7c8ebe, 0x49b29ba6, 0x977c83cc,
9846 0x5876cf01, 0x66caa76f, 0x807d43ec, 0x9844d6b6, 0xe636cddf, 0x393e9900,
9847 0x32677cb5, 0xe7acb7ac, 0x3f219180, 0x1d693a74, 0xf47da275, 0x8e14a6b8,
9848 0x838a533f, 0x3dc7499e, 0xf8014f4f, 0xb824f676, 0x99d4f814, 0x0630fa02,
9849 0xbc088f7c, 0x9fc6d633, 0xf21c686a, 0xb65fac8f, 0xc3767988, 0x6b0250f3,
9850 0xb2bd8335, 0xc607c84f, 0x154fe7ee, 0x99c61718, 0xdde8cafd, 0xf58a2f64,
9851 0x80b5021f, 0x43d3d3f5, 0x77fd14e3, 0x585edbc0, 0xeade047d, 0xdbc221cd,
9852 0x6bdf46db, 0xe3c69f08, 0x772c74a1, 0x87933d1e, 0x70b670f8, 0x25efb5fb,
9853 0x6ee9006b, 0xd3d67e20, 0x0e2eeafc, 0x81e2fe62, 0x8353ab78, 0x2eeb5fa4,
9854 0x5877d1e6, 0x129cdfb7, 0x6c1b3efe, 0x2eb00986, 0x4270e666, 0x47c2c4f8,
9855 0x896be0bb, 0xa3eb500f, 0x081f02ed, 0x3ec48fa7, 0x4eef1fa7, 0x780666e3,
9856 0xefe66b3f, 0xdf246799, 0xfe7d0987, 0x005e4251, 0x0d1f33f7, 0x7a46ce07,
9857 0x91e95d50, 0xe2cea77a, 0xac3e6fb9, 0x67abbd9b, 0x5963c04f, 0xed15ada5,
9858 0x4f2665ab, 0xcb5dda12, 0xeb2bd3de, 0xc48409f3, 0x3c042b07, 0x5df732cf,
9859 0x36ff3f88, 0xc209e38b, 0x97ff769f, 0xf8bca3bf, 0xa2bf681d, 0x9346ef4b,
9860 0xcda56971, 0xf596fd8f, 0x876d3c54, 0xad5b2bf7, 0x2efd062e, 0x04fee29b,
9861 0xf765bded, 0xf21b5c59, 0xa438bf71, 0x5dfa0b3c, 0x03be60fb, 0x9d7581e5,
9862 0x06ecd337, 0xeb7ee093, 0x6de02b4c, 0x8964b293, 0x7dac0852, 0x1516ca7f,
9863 0x57feacf0, 0x281667e5, 0xc17f755f, 0x8c75f316, 0x1cb282bd, 0xd0ff59ed,
9864 0xfedf6899, 0xf646a712, 0x7f6fb72e, 0xca274479, 0x82a65bc5, 0xece5180a,
9865 0xce60d9d4, 0xb78a532b, 0xf4fc6198, 0x0ea14f14, 0x32935bc6, 0xb7f62661,
9866 0x7fb1bef4, 0x77df09dd, 0xa99acca4, 0x44de13e6, 0xcaccef7b, 0x926ed0a1,
9867 0x54b3cf2c, 0x56697f42, 0x27a7b616, 0x090fbf00, 0x77f68f8f, 0xbdfdbf67,
9868 0x1cd4e660, 0x53454bc0, 0xbffd0aa5, 0x96db729e, 0x36315731, 0x877281fe,
9869 0x983fc607, 0x15a664b2, 0x9469dff0, 0xf16d97f5, 0xcc9d58c0, 0xbe0186f7,
9870 0xbafef1ff, 0x9fa86699, 0x742dea96, 0xcd53fac0, 0x91996ff7, 0x65f81dfb,
9871 0x4fbd12a4, 0x1271482c, 0x90461cdf, 0x33ebade6, 0xf82afd72, 0x71d3873d,
9872 0x9424797f, 0x4ce511ed, 0x10dcee5e, 0x4e9c7e5b, 0x33b972e5, 0x8f77f621,
9873 0xef004b90, 0xb3e90ea0, 0x96181acb, 0xc027961f, 0xc409e64f, 0x3cb9db5f,
9874 0x639abe01, 0xd98e3e27, 0x5fe537df, 0xd3f53b80, 0xe8ac7aa9, 0x0d7290bf,
9875 0x71c56666, 0x69764cbe, 0xcf5975e4, 0xbfb79252, 0xeb7c154a, 0x5671f0e2,
9876 0x330ae56a, 0xb8470cf7, 0xc58b76c8, 0x4b47f33a, 0x88d052ff, 0xe2d6b9fc,
9877 0xacf9c0c9, 0xc19e57dd, 0xd787632e, 0xf8d72c5d, 0x98ebc24b, 0xf407ef4a,
9878 0x44b9fd0b, 0x5f31eeff, 0x57c95e07, 0x7d1a5780, 0xc33ad2bf, 0x3bfd69fd,
9879 0x7ee3fb03, 0xc57a019e, 0x1b9e7b18, 0x415eb853, 0xe422ebf8, 0x5f214ada,
9880 0x3d916a41, 0xabc5fe7e, 0x8fcd6f76, 0xf503771c, 0x7a7df80f, 0x412fee0a,
9881 0x2b1ca2be, 0xb0b33d53, 0x8a4f597e, 0xa079ed03, 0xde828db7, 0x8937a454,
9882 0xa694cee7, 0x76ef5a72, 0x863bb1c5, 0x3913f81d, 0x83c536af, 0x22c649f6,
9883 0xc4497e9f, 0x87fca4fc, 0xff453bfe, 0x1f9e9c25, 0xc5e7a7ed, 0x2fc23fc8,
9884 0xdf40dcc4, 0x5fce0763, 0x08ce36c1, 0x2582f5fd, 0x7091f380, 0x2ff4b6fb,
9885 0xb8ba87ed, 0xda912a7a, 0x260f1c65, 0x219ea0ba, 0xb9f9c5c5, 0x6bc4e3e3,
9886 0xe9755f51, 0xebe2e299, 0x2651b946, 0xe7bfa4e5, 0x764a8548, 0xbb2e584c,
9887 0x72919ec8, 0x87366833, 0xbdbfdfeb, 0x9446c667, 0x2fbe26ab, 0x1483d34f,
9888 0xe3cf0a2f, 0x2fae14e5, 0x2798f827, 0x24781d96, 0x08e52ed9, 0x75e1e3ad,
9889 0x5863ec95, 0xd7e85d9f, 0xf93f2109, 0x664c9eb3, 0xf0e13ec2, 0xb67bfa90,
9890 0xdcaff429, 0x47a5a64f, 0xa53b0659, 0xee105741, 0x89cfbf1f, 0x8263fba0,
9891 0xf3f1a20e, 0xc013e55d, 0x48708fc1, 0xc872e14d, 0xed056509, 0x17f4150b,
9892 0xb55cffc0, 0x3f35bdcd, 0x2e36de62, 0x1d7a9d8f, 0xe0576397, 0xfe54b48b,
9893 0x3b25efbd, 0x1e1873f1, 0x2ff98edc, 0x1d76f701, 0xc17dc1ab, 0x09f01d21,
9894 0xaf8da2d2, 0x598bfcf3, 0x29e7efd4, 0xeffeb93a, 0x1bb72e45, 0xd7ce3c61,
9895 0xbfd63f64, 0x3b5da83c, 0xdcdfde7f, 0x658f4e54, 0x68853dc7, 0xdaf30cc7,
9896 0x285fb8dc, 0xc07399eb, 0xdde1e500, 0x4b6b038a, 0xc1de1f3a, 0x4ba814f9,
9897 0x67ade5c0, 0xa5b5fb22, 0xbefa3a72, 0x38fc31d6, 0xcbc457a7, 0xcd3e08e2,
9898 0x7871b54d, 0x084cfac1, 0x472b554f, 0x9bfbf3e5, 0x0180f787, 0xf0075bd6,
9899 0xe12db140, 0x64b1d9d6, 0xf8f90583, 0x1f237338, 0xa258ef9f, 0xdd788b1b,
9900 0xebbec8c9, 0xf00f0f97, 0x147b4875, 0xe903b2e8, 0x5cd4eaf2, 0x71d86f1a,
9901 0x7c0c758f, 0x1376861f, 0xec3b95fa, 0x4c57dc01, 0x4dcdf54e, 0xedce7845,
9902 0x4a2064ab, 0xeb4dac1a, 0xfbef112d, 0x7d4177eb, 0x7e9f63a2, 0x36f3ce2c,
9903 0xc2bab6c6, 0xfaa981eb, 0x6f5a1fd1, 0xa02d3e04, 0xd6e11072, 0xfbf5e469,
9904 0xcf8a3316, 0x8cfbe834, 0xf7f41df8, 0xa3cfa22c, 0x2fc414ba, 0x6ed09bee,
9905 0x737bd3ae, 0x67d7dc14, 0x07a8dc98, 0xf4421f60, 0x54c2c87e, 0x26fff40b,
9906 0x574e513c, 0x8fd8efe9, 0x502aaaf0, 0xae242ddc, 0x60dc85da, 0xcd37dc41,
9907 0x7a25629e, 0x39dd5f64, 0xbff51ab4, 0xfa09e395, 0xcc7e8b31, 0xff30a2e6,
9908 0x2aef3afd, 0xfd48ffda, 0xa8514876, 0x8dd7439f, 0xb112ddde, 0x50fec22f,
9909 0xaa521ffe, 0xfa40ee73, 0xb23afb17, 0x7ac2d30f, 0x2295ed17, 0xfdde245b,
9910 0x3ca17e62, 0x7b48a3a4, 0x7ed3ed14, 0xb1dfd67b, 0xd9c83a65, 0x823a33f1,
9911 0xd152073a, 0x01ff33f3, 0xf60551d6, 0x70e005ac, 0x33972a5b, 0xfafdf287,
9912 0x30df9c44, 0x3abc3f58, 0xd31be09c, 0x938f0b64, 0xe90ffc2e, 0x482fee46,
9913 0xbfcfe04f, 0xe73b72a7, 0x1e5c6927, 0x978d21fe, 0xfb6313d3, 0xf510be2b,
9914 0x1f971354, 0xfcb9cb5b, 0x41b7ae8f, 0xedadfbf4, 0x668a31de, 0xef760f7f,
9915 0xf76e5486, 0x885fb91a, 0x0a9613c7, 0x873b06fa, 0xabb614f0, 0xda503c78,
9916 0xccf45fa1, 0xf372f2a3, 0xbfe8d97b, 0xe69fedbf, 0xb6f487dd, 0xf27a37f2,
9917 0xf1149c57, 0xbec99582, 0xbfdc64f4, 0xabf6c427, 0x75d6273c, 0x1f9199ba,
9918 0x1b8c53f8, 0x893dec82, 0xaf284371, 0x34e0f9da, 0x2cd5bfe4, 0xe5e0fe40,
9919 0x5c51373b, 0x61407970, 0x69f7052e, 0x1627ee5e, 0x47bd58f8, 0xdf4bf1af,
9920 0x931936ae, 0x77e984c7, 0x6e369b45, 0x58abb358, 0xf6f6fe53, 0x440b2569,
9921 0xfcb0a1c8, 0xa3ef4699, 0x1ef495fb, 0xd47ea76d, 0xc3f8d2ec, 0x461cee97,
9922 0x97f597eb, 0x77ad3731, 0x66816b59, 0xf395acde, 0x49f9bc49, 0xd4bb45ba,
9923 0x469e731f, 0x008ffbcd, 0xff08fefe, 0x4353d2ff, 0xa92d1e69, 0xba40ffbe,
9924 0xcac3cf09, 0xdabf1afc, 0xb027c724, 0x7ee16656, 0xff23a049, 0x5081ece5,
9925 0x6fffa72a, 0x71d1f70f, 0xfee305f6, 0xca0beebf, 0xcc397126, 0x0c3614da,
9926 0x6aa7e31e, 0xa0bfb4ed, 0xa7c52bbe, 0x616beb95, 0xa45f2d47, 0xd45177ad,
9927 0x5dea28bb, 0x6912bfc9, 0x2805299f, 0x0d7f78d7, 0xcff38f82, 0xa0ba351c,
9928 0x6e34f8de, 0x3d3916c7, 0x6cef5097, 0x438e24b3, 0x4b36ca7f, 0x52f5005e,
9929 0x38bafaff, 0x48336d1d, 0x033b8a3f, 0x5ffed6e1, 0x88a8b677, 0x0fb07dc7,
9930 0xfe587900, 0x8a1641e8, 0xae375390, 0x01cb3c53, 0xef2176de, 0x7d7cdcea,
9931 0x71a0ee75, 0x5d93f428, 0xd395e7c7, 0x23515fb1, 0x08d4e5da, 0x419a5f7f,
9932 0xc1cccfb3, 0x8d254e32, 0x9a9ce3cb, 0xea1432a0, 0xa3daef65, 0x875fd8a8,
9933 0xbb337a42, 0x41130009, 0xdc25d957, 0xa4b1b9be, 0x2636595d, 0x5d56870c,
9934 0xe00718f5, 0xeadd35a7, 0x8f737d46, 0x0d2437d3, 0x182279e7, 0xf8fcedc4,
9935 0xda2a3d13, 0x7a753fef, 0x619cd20a, 0x8ef4b838, 0xd6a7d46c, 0x6d9e7c13,
9936 0xae63fbfd, 0x4da22867, 0xdcddabfe, 0x23b3d19e, 0xa487db8c, 0x8c37d2af,
9937 0xe727bd24, 0xf4229e97, 0x3df33a45, 0xadfaa367, 0x68c9f08c, 0x861be93d,
9938 0x2cf6e6ef, 0x815577c7, 0xafbe0f77, 0xa8aab8ca, 0x6c17de05, 0xa14baa0b,
9939 0x62bbcbdd, 0x85cb83fb, 0x4c75813e, 0x75c9f5c2, 0xc82e495c, 0x7e38867a,
9940 0xd60fc90a, 0x1ff7b119, 0x2f7d2230, 0x216d347f, 0xa36eb7ce, 0x30949991,
9941 0xf4ea7ffc, 0x64f9c6ce, 0x082bb477, 0x93dfe91b, 0x1dff4ae3, 0xfcfe477e,
9942 0x96f928c8, 0xfe5c5fd3, 0x2cf7a75f, 0x1b67948f, 0x6927848d, 0xc7e7873f,
9943 0x69d5fded, 0xeabecf5c, 0xf9c12ef4, 0x276d7434, 0x3daacf7f, 0xf9631a1f,
9944 0xe2f9a3ab, 0x6a54704a, 0x6ea0bef8, 0xeb8039be, 0x25547f2f, 0x68dda83a,
9945 0xdd5938a4, 0x9fb8fb33, 0x46e61ee7, 0xb1d75139, 0xe30e594f, 0x4fb33ed6,
9946 0xd7011159, 0x05017541, 0x2ec233e7, 0xafcb90f9, 0x3f47ba68, 0x872dda32,
9947 0x9c4e5c2d, 0x15f9b72d, 0x8359eb80, 0x9deb0eaf, 0xfdbab2cd, 0xbc3c61f9,
9948 0x11fa6fb9, 0x3fb037cc, 0xb3e20a67, 0xd33bb755, 0x475af50c, 0x5f48dd19,
9949 0x36fa753f, 0x54525c23, 0x4fb6276f, 0xd7bbb34e, 0x89975b43, 0xfbbca115,
9950 0x1f1870ba, 0xefe32745, 0x85d3fce1, 0x91db8872, 0x813fc845, 0xa7b4bb34,
9951 0x361dae48, 0xc73c75f0, 0x9eff7cf8, 0xe89079ea, 0x8d0a48f8, 0x54175d9b,
9952 0x7f9d9fd0, 0x6b9239e6, 0x9d30ffb2, 0xe4891e79, 0xb3cf2bdf, 0x56f488c3,
9953 0xf950e42b, 0x8f947ba3, 0x4bfde623, 0x6e91f430, 0xba019fb2, 0xfdf7d1b4,
9954 0x3ea8d333, 0xbdf0b933, 0xe16aed42, 0x79088afb, 0x4311d723, 0xf5c3ecee,
9955 0x1cf44ed8, 0xc82772e4, 0xbe628dfd, 0x157cf8d1, 0x9a7c1fe5, 0xde99ea06,
9956 0x3123fd1b, 0x48787a2e, 0xe527f502, 0xbedf3440, 0xe51ce82a, 0xfe46cea5,
9957 0xe52bb25a, 0x22bd64fc, 0x34fec567, 0xc10f4382, 0x4a977ea1, 0x7a32a9eb,
9958 0xc111de87, 0xfd16bf0f, 0x03f9b81d, 0x07fdca23, 0xa25dfdfe, 0x8536fac7,
9959 0xedacf1e2, 0xd43ce35d, 0xf4a7fe47, 0xe2ce6768, 0xf1db0126, 0xa784bbc2,
9960 0x2e5c9d59, 0x53ee77d7, 0x74c2d997, 0xc0e67f9a, 0xf56748ad, 0xfb86261d,
9961 0xdfbfa022, 0xe9a27c20, 0xca47c254, 0xb4f878dd, 0x9472e0ce, 0x47e48df9,
9962 0x3e54fd85, 0xdca429fa, 0x4eaa7bfe, 0xfbf809f8, 0x1cbc690b, 0xa7df1fa6,
9963 0xdcb08f08, 0xe45f10b5, 0x603a299f, 0x5bb87dc6, 0x5a7f3f21, 0xe4678725,
9964 0xc6c7aabc, 0x54ce9b97, 0x50d437a1, 0x587b1cde, 0x7fcbf7be, 0x810bfed1,
9965 0xe41f786f, 0xd410d9ef, 0xd1fe72f3, 0x7277cbf8, 0xce831b7d, 0x11d71bfe,
9966 0x3da4dfad, 0xc9e6e920, 0x8f46aa5d, 0xea469dd8, 0x731b0ecf, 0x728ec79c,
9967 0x61d8cf1e, 0xc76cfae0, 0xe500737a, 0x780b9bc9, 0xa17d995e, 0x43cf8831,
9968 0xf875a5ba, 0x1f3650fd, 0x5ba755bf, 0x0dd6e583, 0x7842d636, 0x4b3a24f5,
9969 0x19127e91, 0x1e5c8f97, 0x973cf03e, 0x5b7e7567, 0xeb3fc180, 0x5397737c,
9970 0xe2cd39dc, 0xf333b8c6, 0xb3ce341d, 0xd72ba40f, 0x2e8dfb73, 0x83ab3f78,
9971 0x03c49ff3, 0x2fa253c8, 0xae120fc9, 0xb8727861, 0xf8927e4b, 0x67f4bbf8,
9972 0xa77cbd03, 0xda3daabc, 0x46dbdc78, 0xbe4ed5df, 0x706c3acf, 0xc7869fa1,
9973 0x6fd1e217, 0xb3b7baed, 0xb51d824f, 0x7a2df33a, 0xfd85be4a, 0x27bf86ac,
9974 0x3817bc09, 0x74afbeb9, 0x2da9ba72, 0xacbe20e9, 0xfc44d93d, 0xe5c19b6c,
9975 0x5684ed9a, 0xcff6331e, 0xa8dbbd62, 0x63b5955d, 0x5477e61a, 0x7038ae3d,
9976 0x6e4f1fbf, 0xfcf0aede, 0xbd774fb8, 0x72f98891, 0xf2b02bec, 0xe1629e31,
9977 0xe4eb9deb, 0x5eece272, 0x7bd13800, 0xf672f193, 0x63fa95fb, 0xc20a63c1,
9978 0xfac056b3, 0x139533ec, 0xec7e84ff, 0x61ee49bd, 0x9ecfe4b0, 0x3feee9b9,
9979 0xeecfbcc1, 0xf746e299, 0x978b5a65, 0x69cfa7e8, 0x037ee371, 0xf40cf7c4,
9980 0x78efae17, 0x685af123, 0xabe9fa77, 0xd76e508b, 0x799e798a, 0xe10ebf5e,
9981 0x7fc9e1b2, 0x6bdf8c9b, 0x09aa4a03, 0xf8fbd9c7, 0xbe63677f, 0xf2469eea,
9982 0xfd3cb517, 0x17f311ba, 0xfe768174, 0x03926f7e, 0xf9fe9deb, 0xef08c9f6,
9983 0xfa168e96, 0xede7e67e, 0xe4f03e54, 0x77f6bdbf, 0x1378e3f4, 0xccef58dd,
9984 0x2f09fbf3, 0xf2953e75, 0xf5d1e2db, 0xb9fb7d8e, 0x8f3d44bc, 0xcb9f307c,
9985 0x92d74931, 0x793f4f7e, 0xbd48c4db, 0x0ab7df21, 0x026b4e7f, 0x099f23d7,
9986 0xe0adadfe, 0x9ecfcef1, 0xfda7ccb5, 0x1c343181, 0x6375c5f7, 0x2ddc5d38,
9987 0x71d751e0, 0x46c1a187, 0xdf9fa9ed, 0x73e3df02, 0x27e7d02c, 0x64852923,
9988 0xd7ca25cf, 0x0faa57f9, 0xbfa026f5, 0x1f45e6e7, 0xeb1f382a, 0x2d432698,
9989 0xfe69f3cd, 0xf91d561d, 0x6c6d6cbd, 0x38bffb3f, 0xe02ec26d, 0x59dd907c,
9990 0x3922e39d, 0x8b0f7260, 0x6bb387b0, 0x27182d7c, 0xcfad7ebe, 0xbe3c07ad,
9991 0xb4e8ea7c, 0x727e5041, 0xf84c52a4, 0xcf5c2bd7, 0x4e346df9, 0x81c1fa3d,
9992 0x3e0b768f, 0xf5307749, 0xdc03921a, 0x32a5501f, 0xaa7e46d5, 0xf513923e,
9993 0xee0f42ad, 0x736e7e11, 0x764dde5f, 0x26bb676a, 0xed061f62, 0xf72a366c,
9994 0xf310fde5, 0xe7f8674a, 0x1971de93, 0xa467be69, 0xf27e603c, 0x8b7e4a7b,
9995 0xbca11bf6, 0x57d1fcc1, 0x285de59d, 0x3d33e51f, 0xefe4bf8e, 0x74b8fbe2,
9996 0x15ca174f, 0xa35537b6, 0x95c9e20f, 0xe79f3703, 0x0f95fb7a, 0x901b0e89,
9997 0xdf7c710e, 0x5ede8d49, 0xe815c24e, 0x890fa5f0, 0x7177970e, 0x55d0daf9,
9998 0xd4fdc46e, 0x69d7e10e, 0x7484f410, 0xbfe8fb84, 0x9c69933a, 0xe1a1c986,
9999 0x0bcea728, 0x12ff3bba, 0x3a43b7a7, 0x0e01f91d, 0xdedd1eed, 0x8fd40ca2,
10000 0xf0978d4a, 0xe6f800dd, 0xa3daf376, 0xd7d56768, 0x6bf23730, 0x07e0a743,
10001 0xbe117bb0, 0xcbd55d0d, 0x6941bfb1, 0x0ddfc933, 0x41b4c976, 0x63a86e50,
10002 0xd96fc8a5, 0x425e2abb, 0x7c5d60ba, 0x035d9e3f, 0x4dd22cf6, 0x9f5bbd5a,
10003 0xdb8f7a8f, 0x2c8fd7bd, 0x723bf6a3, 0xf2e7145d, 0xf38a3157, 0x19fb40ef,
10004 0x68d65df5, 0x36fb3f6e, 0x5cc5dd92, 0x6537e409, 0xd60d753e, 0x622ff06f,
10005 0xcd11d794, 0xb4292fc7, 0x5808680f, 0x56681f29, 0x1a7fb717, 0x9f1f38ba,
10006 0x4f91f093, 0xe4adcf43, 0xc4c17f8f, 0xd0fe11fc, 0xce9a5f37, 0x268becf5,
10007 0x359fb3d2, 0xb0c7d87b, 0xbc85b7a0, 0x6dac7097, 0xdd21d7cb, 0x09937632,
10008 0xcc4cb1e7, 0xf5c0cda3, 0x03d0b246, 0x3cf8db05, 0x77e174d4, 0xa789d74c,
10009 0xe2e79b51, 0xe17f93f0, 0xc88f189c, 0x39e85d22, 0x797eba18, 0xeea4f890,
10010 0x9a5fde19, 0x677853c9, 0xfb4abd04, 0x0b1e9a28, 0xbbd9b8c4, 0x4c282a0e,
10011 0xd1cd77b2, 0x35f5f9f0, 0xeb08d82c, 0x2e977ebc, 0xd91c6538, 0x9e490b4d,
10012 0x58b237af, 0xd2232af9, 0x9556fdb9, 0xbf442dea, 0x36cdd576, 0xb93fa477,
10013 0xb3a3c12a, 0x24571da0, 0x12ded8fd, 0x4a9d1b8c, 0x6f11bbb7, 0xd25dd2e3,
10014 0x5bd8d30e, 0xdcdff703, 0xcda1bc0e, 0x1ff70e3f, 0xf309f581, 0xda09ae29,
10015 0x0edcfc8d, 0xf7fb8f68, 0x9cfed7dd, 0xb85bdfef, 0x070402ff, 0x6f5499c9,
10016 0x9d8ffa09, 0x5cb5de05, 0xb1ddd93f, 0x93aaf3d6, 0xcdc0e7af, 0x3ee216b7,
10017 0x8dae61b1, 0x5781e1f8, 0xde9ca594, 0xbee21140, 0x83f9c7da, 0xe13c7f01,
10018 0x3b247a22, 0x1bc9a1aa, 0x9c8f4d88, 0xaec01a5f, 0xe81b3b42, 0x93b70d71,
10019 0x13f38c6d, 0xbfb94ba7, 0x6915b947, 0x8d3e4acf, 0xbf497be6, 0x35ff7cfd,
10020 0x81bcfdf9, 0x8079e3f3, 0x3f7bd203, 0xe9ccbf9d, 0xe07aeb7c, 0x15bef847,
10021 0x4225b1f8, 0x7fef47fe, 0x1fb89e70, 0x1ef6f290, 0x3a5177a7, 0x6fdda1ca,
10022 0xab50c66d, 0x2f0d8f94, 0x397e196f, 0x958ccbbb, 0xf0335fa1, 0x60fd246b,
10023 0x445ed68c, 0x09ea3f4f, 0xfed8baeb, 0x6dd2bb8f, 0x3f3fcddf, 0xaee52f30,
10024 0x7981d2f4, 0x73a8e929, 0xadbb6f10, 0xa58fb401, 0x3e7a291f, 0x499f044b,
10025 0x03fdca7c, 0xfeb021c6, 0x37ef82fd, 0x888f7a89, 0x84bec467, 0xf3a5c1f8,
10026 0xf679487d, 0x6c91f471, 0xb5f97df7, 0x2f5238e4, 0x8c8dd346, 0xaa7ae0a3,
10027 0xd7afc4c7, 0xcfec5fb6, 0x29f8e8a2, 0x800b5fc1, 0x6dde7037, 0xc417e086,
10028 0x19d8778f, 0x99f813e5, 0x71e31527, 0x7ce08daf, 0x386fb234, 0xfa66b7b6,
10029 0x92ba44be, 0x8f7c5d7e, 0x115aaa71, 0x6bddacbf, 0x7f9e4408, 0xd18337b9,
10030 0xb376bd38, 0x91fc0f5f, 0x87dbe99b, 0xcc15fded, 0xf33d441d, 0x2b8a168f,
10031 0x8a5b8181, 0x8591a6f2, 0xefce1112, 0x205efb25, 0x0cf7d5fa, 0x39e3bf47,
10032 0xdf0e3425, 0xdafe109f, 0xfb5fc213, 0xcf7bd77e, 0x17ad02be, 0xf16e72bf,
10033 0x5ece918f, 0x7d21e4b4, 0xe7f4b09c, 0xdda125bf, 0x92b9817d, 0x690e772e,
10034 0x55ef5991, 0x2767fc23, 0x7ffdb1ec, 0x373c0b6f, 0x532b788a, 0xb7c3ed19,
10035 0x19f97067, 0xe3c4bf3e, 0xb4ebefad, 0x1cf937fe, 0xdfe1c193, 0x501ce719,
10036 0xd7df0661, 0xfce10e74, 0x50aed7d8, 0xdd66afbc, 0x41eb3ffa, 0xb5acd42e,
10037 0x9f09e907, 0x71ab8ed1, 0x283a83f8, 0xb970309f, 0xcd737f04, 0x07fd6165,
10038 0xc849d4f5, 0xc5077e33, 0xfd0a96bf, 0xcde9acb5, 0xa15fa1bf, 0x49e66546,
10039 0xf2c71845, 0x9f041e1e, 0x4f2db53e, 0xf2bff144, 0xa3a67747, 0xd458ca7e,
10040 0xa6c1f226, 0x55fed03a, 0x2fe8373c, 0x6f672f59, 0x132764a9, 0x1ede001d,
10041 0x22f6f0cc, 0xe24a2f1f, 0x7745c17e, 0x08fe035a, 0xf057b879, 0x7cfd3461,
10042 0xcdbce710, 0x01151997, 0xaa616fec, 0xefd46ff7, 0x7234e79d, 0xfa12bced,
10043 0x5f4823c5, 0x4fddd877, 0x22f2eef0, 0x05d263f3, 0x0e316bfc, 0xb7b1a204,
10044 0xbaf867b0, 0xbee3a47c, 0x5fa1dfbc, 0xf0e4dbab, 0x91bbf0bb, 0xf176cbbe,
10045 0xe3f141e2, 0xd2232e40, 0x8545c347, 0xf76961e8, 0xae51c79b, 0xa221a837,
10046 0x1b66a593, 0xa2e1b1e1, 0xd5a9e9ca, 0xdb243670, 0xa4d7ee03, 0x6032d27a,
10047 0x277bfe9e, 0x093c5325, 0x17c389f8, 0xe39c452a, 0x37c332f8, 0xf7e00328,
10048 0x36f13590, 0x305d7fdc, 0x8f3092bb, 0xf408d1ad, 0xe7753570, 0x43d84735,
10049 0xa5aec72c, 0xfeb7ee83, 0x6e5af386, 0xaf5119f6, 0xd134f0af, 0x4945b179,
10050 0x98c752c1, 0xd24fbc48, 0xf5fd1a5f, 0xc8497ef1, 0x3c8df797, 0x9d20646f,
10051 0xcf6c3c73, 0x39b2f510, 0xc79fbcbf, 0xe7c39e6a, 0xbb427828, 0x728887f7,
10052 0x170f2891, 0x7979d2f5, 0xf797e09a, 0xd17af1c7, 0xe3152ce3, 0x99e1997c,
10053 0x7682708c, 0xc7d22341, 0x673a166b, 0xfe404ac4, 0x935bbca1, 0xc82c764b,
10054 0x770869b9, 0x4c982718, 0x67a44cf5, 0x41c81358, 0xa96f67c0, 0xb5b3e08b,
10055 0xe305e81c, 0x289aaf41, 0x2bf1241e, 0xcf8d1af1, 0x77ca1985, 0x181f4fcb,
10056 0x51985ebf, 0xcd7e303a, 0x17c250d8, 0xf38c4bd1, 0xf5f0f11f, 0x03c73b6b,
10057 0x0cf2ebf0, 0xb1c183d2, 0x49b37c91, 0xb5ca51c0, 0x78b413f7, 0xe39d3cfd,
10058 0xbbd45ea1, 0xda1f7684, 0xe23eeed1, 0x7853f7bf, 0xae02b4fd, 0xfe5da497,
10059 0x5f2e024f, 0x529f6ba6, 0xd1fb44cf, 0xe2f214bf, 0x47ee74cb, 0x8ddebc07,
10060 0x09fa95f3, 0x19304ce4, 0xebd178f8, 0x6c339226, 0xd5e51f63, 0x83ffbd40,
10061 0xea645af0, 0xf41535bb, 0xdec10fca, 0xbb511631, 0x0647284b, 0x48c7efec,
10062 0xd433b0ba, 0x0e19addb, 0xf4941f6e, 0x48d7b8f1, 0x0ca5aebe, 0x657287e4,
10063 0x210c63fc, 0x6bf0e40b, 0xc142bf22, 0x6214aebc, 0x07f61767, 0x8c97ff70,
10064 0xa3dc30d2, 0xe8213bc7, 0x450cd1e0, 0xb215bc25, 0xaddbc442, 0x5f6e7eef,
10065 0x139e5d0c, 0x4d9365e7, 0xe7ec76be, 0x916fddec, 0x18c27e9d, 0x8b66de1c,
10066 0x7c18ddf1, 0xfc2521ec, 0xf4a7b6fd, 0x98d5e37e, 0xc1f67e7f, 0x4bdd619b,
10067 0x1c6ef47b, 0x5f3de972, 0xed1e33bc, 0xc5031eec, 0x6fdf406b, 0x4dde7153,
10068 0xa13caedc, 0x67c1d2d3, 0x3df76977, 0x907a0baf, 0xdca572e7, 0x157cfa91,
10069 0x93797373, 0xcb1bb890, 0x3b71dd1f, 0xce5dcb9d, 0x003d87bc, 0x666bd3f7,
10070 0x3b7c5d92, 0xcf5e51f3, 0x39ed56b2, 0xda6d15db, 0x073bedf2, 0x3925c39c,
10071 0xfd102abc, 0x2ba5f85e, 0xf3fbeb63, 0x333f2e82, 0x7afdf88a, 0xfdf8cc53,
10072 0x09fc85ef, 0xb4fbd9c7, 0x2f57fbf1, 0x8c6fbf1f, 0xed87df8a, 0x3df8e888,
10073 0x6113f7ef, 0x91bf606f, 0x2acffc71, 0xa3e3af62, 0x58b7690c, 0x9f19f935,
10074 0x125bb00c, 0x45e37be9, 0xd8f99c4b, 0x2b67fde8, 0xd7d38f63, 0x5f368e3f,
10075 0xe79edc20, 0xb5fdc809, 0x8bc693a4, 0x6567a459, 0xe1c7da59, 0x3df43976,
10076 0xf4babcfa, 0xf8be4b6f, 0x2ce66158, 0x176d47f2, 0xf29bbc76, 0xbb463f33,
10077 0xba72f908, 0x4c10b5eb, 0x278fd971, 0x8487570e, 0x1d7a26f9, 0x42675f40,
10078 0x98d8f211, 0xfd234f69, 0x3a6e66eb, 0xfee82797, 0xe8abbbd6, 0xbdffcf7c,
10079 0x322332a7, 0x53f72a6e, 0x8f69460d, 0x96fa34d9, 0x65e3e945, 0x1d916f5d,
10080 0x70d7f606, 0x7a7f3e14, 0xc3d26ef5, 0x1d37992b, 0xd5f7bde9, 0xe56e7411,
10081 0x3961eadb, 0x4bfc9b9f, 0x35bf3c0c, 0x3987ec8d, 0x75373e62, 0x67503b73,
10082 0x1c6818f6, 0xd239730f, 0xe7cd8b69, 0x8554420b, 0xf3fd75f2, 0x631de747,
10083 0x15fcc493, 0xbdf00f6c, 0x52d93c4e, 0xdbce265f, 0x31eae384, 0x8990260d,
10084 0x6e8996cf, 0x28a73e17, 0x83cf955e, 0x6b1a79e3, 0x3afac1ca, 0xd7cf4873,
10085 0xc7483309, 0xa2f0fdf6, 0x37945db2, 0xeb70bdce, 0xb36f7c0a, 0x8a313c93,
10086 0x04cf4c79, 0x6dfc88b9, 0xb75c6666, 0x4d3c16c9, 0xf4f133f1, 0x8f88b857,
10087 0xf91843fd, 0x07581241, 0xd9b53f9d, 0xb171f9ce, 0xb050e60e, 0x085c716c,
10088 0x9ce27ee2, 0xf3c7e6c3, 0x672f20c4, 0x5f3fa265, 0xc44ad5f9, 0xee67c80b,
10089 0x5df78a17, 0x11f3f20d, 0x88a5de42, 0x7908b5f9, 0x8adcc597, 0xe480c7b8,
10090 0x95f6fddd, 0x267ee037, 0xa3f7798d, 0x71387bbc, 0x32fdc506, 0x93e68f98,
10091 0xc8d5433a, 0x5b57a72d, 0x46af98ce, 0xe7053bcb, 0xbed3e597, 0x9413b337,
10092 0xbd04a497, 0x69529799, 0xfd12361f, 0x37210631, 0x3e78598e, 0xcf3166c2,
10093 0x8853333b, 0x78598e6e, 0xb6b7c25e, 0x7ddadc5b, 0x3f0a437d, 0xdd3e7fbf,
10094 0xc0f1c66c, 0xe113b98e, 0x07cc7607, 0xdfce167e, 0x41d29c2c, 0x6f9b0279,
10095 0xe01bdc54, 0x6bbb66fd, 0xeba40abd, 0x7f70a99f, 0xc728ea8f, 0x3cf69c7c,
10096 0x44f31b87, 0xf7be451b, 0xf6a38b66, 0x9a63f219, 0xb7d63d78, 0xed96e319,
10097 0xac0e1d5b, 0x37d95697, 0xaafb88cd, 0x9bb1cc15, 0xaff7a0c5, 0xbe608f80,
10098 0xe032c73f, 0x63f41149, 0x85bae23d, 0xefbe20d6, 0xf0177fc1, 0xdc3294f2,
10099 0x82bff2bf, 0x773a42ee, 0xd27a3cc9, 0x85dd8d97, 0xbc60d86f, 0xe485b982,
10100 0xf256f7af, 0x72132fb8, 0x571cbc60, 0x61b5d9f0, 0x85efa7ba, 0x5bb43ca2,
10101 0x4cd37ff8, 0x80ebae3c, 0x91c4ca21, 0xc69fac43, 0xe4cdc1f9, 0x6bd3e71f,
10102 0xfb0ff858, 0x4ff70cab, 0xf86a6972, 0x60ef9873, 0xbbb322a8, 0x8dea0ea5,
10103 0x91fb8357, 0xcf15afaf, 0x543cf142, 0xe5e9237e, 0x65cd9d1e, 0x373e71d4,
10104 0xc3aba017, 0x94b847ab, 0x60b4b639, 0x4129d73f, 0xd8cde67a, 0x9fd382de,
10105 0xc94cfc23, 0x9e00c699, 0x00996b37, 0xc8bf2678, 0xffa30f9f, 0xac2fff5a,
10106 0xcc74f118, 0x279ef520, 0xb9ffe789, 0x0ed53d68, 0xce97593e, 0xc22e7b33,
10107 0xcf3f28f9, 0x8b74d0c6, 0xa997fef8, 0xd7974955, 0x300f3cbb, 0xe5cf4b25,
10108 0x871e0ce3, 0xa66f9c6d, 0x7146e5bc, 0x7d53030f, 0xf08c3ff9, 0xc5b8c8af,
10109 0x7f3606bb, 0x46fd8c5f, 0x07b7164a, 0xfdc0dce6, 0x1f228dc2, 0xcc4f7e47,
10110 0xbfb27ee2, 0x377b4e64, 0x1e3dec93, 0x949dfd6f, 0x48d9235f, 0xf2115f94,
10111 0x5f248fe5, 0x278edfca, 0x85dfb47f, 0x29e799fc, 0x40bed036, 0xef2921c8,
10112 0x68ef22bd, 0x1018f301, 0x1ee23d4f, 0xabe5a395, 0xccdd0e48, 0xf7fef47c,
10113 0x00ff3c15, 0xfd80d308, 0x6b4334dd, 0x6af3cd3f, 0x8fcf37cb, 0x3e38afb6,
10114 0x7c0bb8e4, 0xa473efda, 0x6b433c9d, 0x87fa2f27, 0xcf4992af, 0xfea2fc67,
10115 0x3e70e0d2, 0x3e546351, 0x27c88351, 0x3c2aec6a, 0x4f911694, 0xf3cdd8d4,
10116 0xaeba1a89, 0xedc44f94, 0xb029af29, 0xde24e31f, 0xec94d25a, 0x727f910d,
10117 0x8a4ff310, 0xaf6e74c2, 0x0c3cf3b0, 0xa2bca1e6, 0xce95871c, 0x8aeab45d,
10118 0x9adb8fc8, 0xddf8d768, 0x5577aeb7, 0xbfe93d61, 0x4843f995, 0xc3f6b137,
10119 0x5f7c59d9, 0x7ee143b3, 0x3302ff74, 0x059d3bed, 0xc15c4d5e, 0xd1c767a9,
10120 0xa66ef8af, 0x3f27d64b, 0x2f830ec9, 0x019e18ab, 0x8979d185, 0xb67af6fe,
10121 0x5190fc91, 0xea99ca72, 0x338038a6, 0xf5f92c69, 0x921775e7, 0x2cd9923f,
10122 0xb84a61ee, 0xdb7379ff, 0x69ebcc55, 0x97576eec, 0x3774c2db, 0x43ec4b36,
10123 0xf48accac, 0x7bd7efda, 0xbd7e44ce, 0x30b79364, 0x19d7da0b, 0x8bbfe483,
10124 0x1f7a57a0, 0x2ede5f4f, 0xe150c5e8, 0xe602b05d, 0xd18efbd7, 0x0a6bfb8d,
10125 0xcfff41cc, 0x7e4c94bf, 0x230e7549, 0x9cb1b53d, 0xf45e93cb, 0x3e3ac193,
10126 0xfaf7e64d, 0xa466ac6c, 0x4ca7cf5f, 0xc55e3a23, 0xe83d8702, 0x7405db47,
10127 0xd2cf7918, 0x8eb96d1e, 0xa9fe9075, 0x3d00667b, 0xf2947c93, 0xf4b99eb8,
10128 0x741b8c06, 0xa1b3db6a, 0x285c395a, 0xbcf147f4, 0xff982da9, 0xf2e3ac50,
10129 0x0f772d91, 0xf5fb439a, 0x2c4f8e45, 0xa17f7228, 0xebaece5c, 0x73d29fb5,
10130 0xa17ae7fe, 0xad1ff454, 0x3d854abf, 0x17e41937, 0x7da56fee, 0x7ca9f506,
10131 0xcfadd750, 0x59e785d4, 0xbb49da22, 0x890bea50, 0x8c09f2af, 0xbbb579e1,
10132 0x1a7c84b2, 0xbe2086c2, 0x13e27fa1, 0x29583705, 0xf71fbfd4, 0xf18ad785,
10133 0xa8fc1e80, 0x733afdbf, 0xb36be900, 0xd2fa44d2, 0x3c3ff68c, 0xd23e2ab7,
10134 0xe35eff0b, 0x4c7d23d7, 0xdd374d64, 0x9926f500, 0xb728ac7b, 0x31fe4e80,
10135 0x585a7e92, 0xa29f6f30, 0x7efa23a1, 0x98edf936, 0x5af52474, 0x9edcf7f0,
10136 0x74bcc599, 0x0fe793cf, 0xa83aeedc, 0xd8267df0, 0xeed1079f, 0x93375b7a,
10137 0x2c2664e8, 0x3955eb03, 0x9e9ff8b4, 0xdf472da9, 0x5ad0c50f, 0x48744328,
10138 0x9c540678, 0x51bdf44f, 0x98f7291e, 0xb3e5ee56, 0xf8de78af, 0x423fc396,
10139 0x1d7583ff, 0x0ef6891b, 0x8fc4aa58, 0x27b0f4d1, 0xb78f7beb, 0x118ac9ec,
10140 0x7e15e96f, 0x68586be5, 0x40ca33e5, 0x687f3b7a, 0x82333e9d, 0xbc7f252e,
10141 0x1379e06c, 0xae3cebca, 0xc6ccc135, 0x252e1104, 0xf928ffdc, 0xd3a41ae3,
10142 0x95fd3094, 0xa487f789, 0x06cc197c, 0xd75dbd23, 0x01ea0965, 0xbfa2853f,
10143 0x8afe906b, 0xdc89f6c2, 0x184cb477, 0x98f96740, 0x4cf60e17, 0xb495d201,
10144 0x8e958a4f, 0xfde73c16, 0xb6f74bfc, 0xe8237ce0, 0xc3842dea, 0x8ae80559,
10145 0xf4036afc, 0x147bf6ad, 0x4bfc49dd, 0x359cba7b, 0x6e677ed1, 0xc1b3d702,
10146 0xcf49dbea, 0xba24b882, 0xa70e737b, 0x21e62abb, 0x5a672bba, 0x6b34a97a,
10147 0x0974d1cb, 0x74b4ea23, 0x8bba23e7, 0x7478d7a6, 0x4ee91837, 0x2bd4dbea,
10148 0x48e7ddd3, 0x8fc5df77, 0x3eee9039, 0xa7c672cf, 0x937a68bb, 0xc59f6cf2,
10149 0x75768951, 0xfa428d63, 0xa19df8a1, 0x511e582d, 0xf6764f9f, 0xd93764be,
10150 0xfc4d8ddd, 0x478f497b, 0x0533798f, 0x7cf7c56b, 0x1b96256f, 0xe877c1d7,
10151 0xcf18f4ba, 0x0f7a19ab, 0xa1b85eff, 0xbfbc0de9, 0xdbcfd1a0, 0x337a7cbf,
10152 0x6c0a879d, 0xdbcbed16, 0xd8dcb12a, 0x8a7fdbca, 0x31abae71, 0x82d02dbf,
10153 0x96daafef, 0x6fdbe6ef, 0x114fd76e, 0x3ca7ddeb, 0x6bb506f7, 0x3f6eede3,
10154 0xe4604e6c, 0xfaf6e027, 0x29ceb164, 0xd33af8bb, 0x867ebe3e, 0x4563e80b,
10155 0xb9ec9f9f, 0x6575744f, 0xece2ef24, 0xb695cbb3, 0x474e7c1c, 0xbc47a639,
10156 0x43f55bbb, 0x37741c78, 0x3675710c, 0xf8c8d3f7, 0x5429e621, 0x5717d847,
10157 0x443b7367, 0x614f4bd6, 0xfd8d7e74, 0x72fe4ecc, 0x3e0cdf19, 0x07d414c4,
10158 0x976146b8, 0x4e778cc4, 0xbb22682f, 0x1960fa62, 0x4ba90ce7, 0x4bc2dc61,
10159 0xe58b4f9f, 0xe6cb2a47, 0x9129f3f6, 0xd7df2177, 0x4875f204, 0x4890fb17,
10160 0x90f0fce8, 0xdb9ed077, 0xe734cc97, 0xf3e5f6dc, 0xbcecd4f2, 0x01cd6e7f,
10161 0x549aeaf8, 0xe58bf7bc, 0xf2b79429, 0x4c161e83, 0xff381c4a, 0x1a0b2ae9,
10162 0xcf8a0f29, 0x518b657f, 0xe5c257dc, 0x3f813cda, 0xd1186936, 0xa7815cef,
10163 0x17a16cea, 0xca31598b, 0x6f0279a9, 0x1937343f, 0x336ebeb8, 0x798fc944,
10164 0x1e3f28d9, 0x6bcf6b8e, 0x97c947bf, 0x4aee311a, 0x62afc761, 0xfd3fe47d,
10165 0xa7f1d844, 0xfc76e61e, 0xfe41d66a, 0x719fded3, 0x961ebe3b, 0xed12f487,
10166 0xabddad07, 0x6877d72d, 0xdea00dcb, 0xaec6ffb1, 0x8633b928, 0x1f7ba5fb,
10167 0x3f432fae, 0x77cecd64, 0x235dffc8, 0x2b404ce5, 0xe740c067, 0x51a1e672,
10168 0xd6fabfe4, 0xd819e3f2, 0xf26995d5, 0x76c9ef4b, 0x5e77f846, 0x0d2e79e4,
10169 0x7a11fb8c, 0xc16f23ed, 0xd28b2c7d, 0xa572d14f, 0xe915c850, 0x5bf290ff,
10170 0xc6429bca, 0x77ec14f5, 0x9b60f1df, 0xe1ef3b28, 0xc4afa16c, 0x4dfa4dfe,
10171 0x88547da4, 0xd7d211f6, 0xba2226a8, 0xbf727eb0, 0xe847d26d, 0x662505a5,
10172 0x19917bc4, 0xa6e11bf8, 0xd9f58db7, 0x68f1f434, 0x83f7e5f6, 0xf451efda,
10173 0x0b63f723, 0x84dcfd05, 0xff181891, 0xb81f720f, 0x5ccfd38a, 0xf4843de6,
10174 0x9cd5fbf3, 0xf0bee47e, 0x3d03ef9b, 0xa07dc8fa, 0xdd7e4fdc, 0xdd3f60fd,
10175 0x863ec058, 0xe95cb1e7, 0xfdf1e017, 0x45d38546, 0x3ddf9cfd, 0xf2c2c556,
10176 0x733368e2, 0xb97086ab, 0x8cc9a665, 0x0316977e, 0x99cd2fdf, 0xd2d97ef5,
10177 0xb413f908, 0xb8401f97, 0xf9276eb1, 0xdaadeb77, 0x3d2b3671, 0xf711fd77,
10178 0xc95a8f55, 0x08e174af, 0xc2e59323, 0x0f9411ae, 0xc78199fe, 0x6e7ce55b,
10179 0xb5f7bc3f, 0xb95bd410, 0xcc6296ee, 0x0255a82f, 0xb7c1d62f, 0x77beac0f,
10180 0x756bbf91, 0x672f7141, 0xe427c50f, 0xbafdf1b8, 0xc6c7927e, 0xf73f5c03,
10181 0xdf940929, 0x4787ef0b, 0x38fee9c6, 0xdcefcb88, 0xb807df4c, 0x5b47a91e,
10182 0xf827f3fa, 0x1b30b413, 0xa7ce1294, 0x704de708, 0x985fcb7f, 0x13798ae7,
10183 0x04e2231b, 0xbe663ed0, 0xcf2179db, 0x01726147, 0xba6567cc, 0x7fd717a7,
10184 0x4f85c44a, 0xa9e23889, 0xfc571e44, 0xfe7d7f7b, 0x7ae20db4, 0x3b8894e8,
10185 0xc6d14a9e, 0x44bd649b, 0x6cd93cf1, 0x60346ef6, 0x37799ebc, 0x3d70fe82,
10186 0x7ca26a64, 0x5f1c4595, 0x6b252fbd, 0x1ac811ee, 0x106a3e54, 0xd399fbb4,
10187 0xe3041fab, 0x9ed36f2c, 0xf715ea83, 0xba0af6db, 0xa7f0b5e9, 0x506b371c,
10188 0xd76c28f5, 0xb3df80bb, 0x289e5fda, 0xbfea5ecb, 0xc910baf7, 0x8ff2fea3,
10189 0x3a9ce242, 0xf8c893f7, 0x61f8bc40, 0xfa30bc74, 0xbc74699c, 0x37e4b17f,
10190 0x245fef11, 0x6ee2d4e4, 0xd5b86f1e, 0x820f36cc, 0x6775b7ef, 0x26b8fc50,
10191 0x135c3fd1, 0xbf5bf7ef, 0xa4879e51, 0x9edcdecf, 0xcff8f8fe, 0xf5e3e222,
10192 0x2f5a3e22, 0x5da9d7d7, 0xcf0164df, 0x3e3e31ef, 0x60739079, 0x9f3a3c7c,
10193 0x33b445e2, 0xac3c610c, 0x55b87071, 0xd12aebe9, 0x39617c4f, 0x35f73ca3,
10194 0x416b2d6f, 0x2d9af23f, 0x615596e2, 0x380bd777, 0xd3975bc7, 0x8d2e63ab,
10195 0xb9813ebf, 0xe593d622, 0xc994d14b, 0x33c88f92, 0xad93541d, 0x34db9f69,
10196 0xf07f5344, 0xef9a51ba, 0x4d22fef9, 0x1af5a0b9, 0x6d61fd4d, 0x88f29a15,
10197 0xea6bd79d, 0x4921b217, 0xa23b6fe4, 0xbb125f47, 0xf347302a, 0x85def47d,
10198 0xb29ff69a, 0xa0931da6, 0x7b45a75e, 0x7bf3332f, 0x8594c67a, 0x76c7a9f3,
10199 0xc3f4d52c, 0x29504a82, 0xf633df0b, 0x79a7b899, 0x878f0f79, 0x5ab5dd5c,
10200 0xbead4e33, 0x1d18f08e, 0x7d622def, 0x086e37e4, 0x1b20ee28, 0xd55dff18,
10201 0xaeed4ed5, 0x78c8f764, 0x2241c6c8, 0xb2cd97de, 0xd3475d39, 0xc3ec8d85,
10202 0xe4f4bb0b, 0xc3642c7f, 0xf0449a1f, 0x6b80b032, 0x302efe20, 0xf0bb17ee,
10203 0x798ddd8c, 0xb5bfb745, 0xca63e68c, 0xde05d2d4, 0x5eb9181f, 0x5d2d48eb,
10204 0x3a5addd8, 0xa5a09a48, 0x27786883, 0xc174b47b, 0xcbbff042, 0x86753bc0,
10205 0xb7fe6e96, 0xf081dce0, 0x5be186b5, 0x62d3d07c, 0xbcf1b823, 0x999f6935,
10206 0x1d143d84, 0x4e7690d7, 0xbbb09070, 0x2e323f45, 0x93f159b1, 0x771fd55d,
10207 0x0bcc109c, 0xd53da3e6, 0xc95fb8c4, 0x6fe5107b, 0xbd24bf0c, 0x9497e78f,
10208 0xc09b9d70, 0xf32d67f5, 0x663efc92, 0x93a4fee1, 0x9fc8abd5, 0x913592b4,
10209 0x9cd9fddd, 0xe8efc2e9, 0xca577aa7, 0x9f901853, 0x8b29f600, 0x06aed7f0,
10210 0x1fef1a8b, 0xd2a7868a, 0x78ed04ad, 0x4b75986e, 0xfca3e07d, 0xedde0f15,
10211 0x68ff89a9, 0x51e65fed, 0xb497e522, 0x1278e587, 0xc9ae529e, 0x49ac4c71,
10212 0x117c899f, 0xc8d8e725, 0xd693f8e8, 0x41fd239f, 0xe3238e32, 0x9bfed14c,
10213 0x55b8bb08, 0xc1d2718f, 0xce782df9, 0x21e1d8b7, 0xeb29613f, 0x4fdf05b9,
10214 0xa8b47730, 0xb8bfe12e, 0x2ffbf58a, 0x2babeae2, 0xf26fb5c4, 0xf247a12b,
10215 0x65b3c607, 0xff961c7c, 0xf1a11ff1, 0x8b95c524, 0xf2f398f3, 0xd3d22708,
10216 0xfba6bf40, 0x8fd02bf8, 0x8a97d75e, 0x3130aaf5, 0xfdde223d, 0xf5a212a6,
10217 0x367990fc, 0x6fdb9e45, 0x6ed31d60, 0xe8327f21, 0xa727bc49, 0x58bbfb93,
10218 0xac3db457, 0x0759bf92, 0xafba412b, 0xde711165, 0x2a77f0fc, 0x659607eb,
10219 0xec95d21e, 0x82f1a789, 0xe0a3ca72, 0xc84c53f9, 0x8cffb941, 0xf993cfb7,
10220 0x4f7ef218, 0x94547799, 0x1c75f823, 0x03fd871b, 0x94e595bf, 0xf8017fa2,
10221 0xc7e48953, 0xfa253cfe, 0xa31f803e, 0x31f32fd6, 0xf212f6f4, 0x5c8b2d1b,
10222 0x8780d7ef, 0x9c7e5bb4, 0xc8e9e8c3, 0x3eb3d171, 0x3d6fc4e1, 0x47a4b9f8,
10223 0x68da3f93, 0xfa0d0d84, 0x79145e13, 0xbb5a1d81, 0x9d1c96fd, 0xf7df1b80,
10224 0xf15e095c, 0xf8f221f1, 0xaebe3e04, 0xf8f3261d, 0x0c971c24, 0x0d0afb84,
10225 0x8ff7fb5c, 0x115f70fd, 0x2e12ee0b, 0x7e7b4ae7, 0xdbd2f881, 0xbc23a58f,
10226 0x577aa617, 0xe3dcfd63, 0x5d144fa1, 0xfa555e78, 0x7b8794b3, 0xe74f4ba1,
10227 0xe3ae1aff, 0x25e1b072, 0xf386893d, 0xb38a26dd, 0x41bd74d6, 0x66d9e176,
10228 0xfc06b410, 0x72180cbd, 0x08fc65d8, 0xb78ef051, 0xd9eb924f, 0xe5f62390,
10229 0xef32fd62, 0x39b9d607, 0x475e6627, 0xdfb41c3f, 0xf4aa1c05, 0x1cf09263,
10230 0x92be7f59, 0x791797da, 0x3af45f5f, 0xfe78722a, 0xf7b329db, 0xc3efec3e,
10231 0xd81d9c9e, 0xfbbe955f, 0x67c23670, 0xbbe742ad, 0x79f898a6, 0x5e712cdc,
10232 0xc9a8426f, 0x3399e78d, 0x667df873, 0xf7a47e23, 0xfdf91c62, 0xe0a677b5,
10233 0xffd93439, 0xe7474508, 0xee7b1947, 0xc12c7f83, 0x3722e6f8, 0xd8bf6fde,
10234 0xba2fee24, 0x002c1acb, 0x91baf239, 0x186547df, 0x66e744d2, 0xe4f592fa,
10235 0xb3d34cd7, 0x727748a9, 0xadbcf2de, 0x01f78f7c, 0x7cb15e60, 0xafa5a53f,
10236 0x7bfa0d78, 0x75c83d04, 0x2beca94f, 0xe185b26e, 0xa33cf32f, 0xf82553e1,
10237 0x1b43ee43, 0xd05b5ef0, 0xbccde7bf, 0x6daf7d1c, 0x5874feff, 0xf6363dff,
10238 0x837eb8c8, 0x1e3493c5, 0x6bdc51f9, 0x278717fb, 0xa477df89, 0xbcf6a7bd,
10239 0xbf97b7c8, 0xdeef1253, 0x51ccff9b, 0x827b97be, 0xcb85e5e2, 0x7078ffbc,
10240 0x99564869, 0x739d357a, 0xdeae5ef7, 0x8fadff2b, 0x28bedfb9, 0xd3dff7be,
10241 0xbcec6af9, 0xceb15ec5, 0x88617e70, 0xe7f729ce, 0x7e54be2d, 0x1a477bd9,
10242 0x08d23ef0, 0xf6bcc838, 0xb48fbc06, 0xd0bf4638, 0xe576cb9f, 0xc4aa877b,
10243 0x8f301abc, 0x3df23530, 0x38f0b7a7, 0x302f2269, 0xfb7c8894, 0x9d3d2ecb,
10244 0x11e5ffe3, 0x31dd8cdd, 0xcb9b9de6, 0xa9ca32e1, 0x0e8d1f12, 0xe3b5fbf2,
10245 0x79e793d5, 0xe8d8b9e4, 0x845675f9, 0x63f9c56e, 0xf1ac729e, 0x3f7cb91c,
10246 0x99dde72b, 0xf0d1f1c2, 0x9bdf899a, 0xf27cf2aa, 0x4ad094ce, 0x168713e2,
10247 0x1e04c3cf, 0xe50faf3b, 0x99b2b9d1, 0x8f10efdc, 0xfaa7261e, 0xc8be51ca,
10248 0xd4caee7b, 0xc111c526, 0x87a2578f, 0x1af5dc30, 0xbb840ebc, 0x7ecbbe91,
10249 0x7c151f4f, 0xdc363ccb, 0xfa112dcf, 0x5a9ec96e, 0x7ee587b2, 0x3d4ef4e9,
10250 0x669c6fe5, 0xba72ae3c, 0xd0fda14d, 0xeb631f52, 0x7cad2e40, 0xaa3378a2,
10251 0xb09925ae, 0x1efe1496, 0xe9661f7f, 0xbaf8a8c6, 0xbd495fd8, 0xbe5fc72a,
10252 0xd7176b4d, 0x467f6db0, 0x51f4e9fb, 0xb0563f2e, 0x2b3fd226, 0x57f6d01f,
10253 0xa7d667b3, 0xbce8cf38, 0x8fc21180, 0xec572d37, 0x1958ca57, 0x4f358fea,
10254 0x9fc46e7c, 0x17c78960, 0x434ffbf8, 0x7ddff187, 0x8efe27c2, 0xc96f3e08,
10255 0x1720fcf5, 0xf2ef3efd, 0xf5ceaef9, 0x7f45c9cd, 0x7e7cbbc9, 0x702eea17,
10256 0x8d2bb33d, 0xfd8b5bf4, 0xfaff922e, 0xdffe5cc1, 0x0035f78b, 0x71264c9c,
10257 0x49aeba6f, 0x4df6489f, 0x43ece880, 0x7e731de7, 0x26776540, 0xd3da43f2,
10258 0xbf6067d3, 0x1eada7ce, 0x72d6df5c, 0x2ffa214f, 0xf3f356b6, 0x8f1366a1,
10259 0x397e07df, 0x538600f1, 0xaf6c7686, 0xa39d1740, 0xfd107f7b, 0x3fbaad42,
10260 0x98bcc61f, 0x5f3cc9d6, 0xda175d32, 0x3c62283f, 0x899035a7, 0x68e77df1,
10261 0x9a4e6f7e, 0xcb90bcbe, 0x36276e7f, 0xe85c5c08, 0x627f202a, 0x17fa41af,
10262 0x2e742c3b, 0x2eff8eab, 0xf1c628c6, 0x70eaf32f, 0xf176910e, 0xf9a666d9,
10263 0x1d51869d, 0x4890d04a, 0x3c50a8f7, 0x30436ea8, 0x67d416fd, 0x4f14a94f,
10264 0x7b4bf393, 0xe302ab3d, 0xdd8f5266, 0xbfb838a2, 0x0bfdd84d, 0x71e3fc98,
10265 0x9e82f9b7, 0xff7b0816, 0xf7872b16, 0xc3cee652, 0x2ccd0b76, 0x76ac0751,
10266 0x2947654b, 0x90d6b3ad, 0x8c85768c, 0x47b7c51f, 0x1ac9fb62, 0xe7e7617e,
10267 0xe1be959e, 0xf419c9d8, 0x3f865d41, 0x693c85db, 0xffcfce18, 0x83cca1b1,
10268 0xd786caf1, 0x30efd046, 0x3c781299, 0x1996e41c, 0x843a11ef, 0xbdd61efa,
10269 0xc88b15ea, 0x73880a5b, 0xd8defccd, 0x453939c6, 0x78f11e74, 0x71ffdd1f,
10270 0x23ca10de, 0x847906fe, 0x92bea637, 0xe01fbbfb, 0xd90debbd, 0xf941d760,
10271 0x789fee74, 0x25684879, 0x92991bde, 0x47978977, 0x72c13e85, 0x6cc25e4e,
10272 0x5685172a, 0x3e3ca1ea, 0x7197932f, 0x36040a03, 0x6cf06f35, 0xc92dda3f,
10273 0x87702ec2, 0xc377bce8, 0x917423cb, 0x1e7758fe, 0x84676797, 0x3e4cf93f,
10274 0xc20e6dbb, 0xfaec647b, 0xded27969, 0xc9f5a36e, 0x2cf6caf5, 0xffbb7633,
10275 0x957e7210, 0xc53da738, 0x3c2d5aca, 0x044fe7fe, 0x1eec1c3c, 0x7fcbf141,
10276 0xfde14dcd, 0x4f74423b, 0xfa27ec8f, 0xb8e41c77, 0x7bfe15ab, 0xf2a3e759,
10277 0xcb977ebc, 0xb38c2be5, 0xea19c691, 0xe79be7e1, 0xfe2214e4, 0xc0aa6f00,
10278 0xc9f7ca9b, 0xd07e7ced, 0x13fefe2f, 0xf46287e8, 0x0afc1ffb, 0xe787e7ea,
10279 0x27274d1d, 0x5aab38c5, 0x2fb6dc78, 0x69e880b9, 0xf7dc558a, 0xc75da252,
10280 0x9f6e3cf8, 0xc592f3ba, 0xaf091d79, 0x69c6850c, 0x09cc7011, 0xf6339f0d,
10281 0xaffbaf9b, 0x8eeb4bff, 0xef0797c0, 0xc5d8396d, 0x9f1e37ef, 0xf485f1c7,
10282 0xe076429c, 0x677f4d76, 0x9fb547d6, 0xae5f28c0, 0xda80a521, 0x6fee2bdf,
10283 0x61d9f795, 0xdc71fcbb, 0x57bb45be, 0xfcc1a7de, 0x1c645993, 0x8cdeffb2,
10284 0x70bf710e, 0x286f3aff, 0x8874eb11, 0xef223a75, 0xcfe7ec33, 0x73797d63,
10285 0xb8e903ed, 0xfdfdfe1f, 0xfd12298d, 0x563cf869, 0xf1d7c87f, 0x1e5572f0,
10286 0x1bdf2797, 0xa33ce45e, 0xe70fd9e0, 0x7849f9a8, 0xbb537f22, 0x94ba5a31,
10287 0xf411ccf3, 0xf3bf8039, 0xe278e5bf, 0xbbfad97e, 0x7338be79, 0xbebae969,
10288 0xf9875f33, 0x07ddb209, 0x34a0c078, 0x21bc27ec, 0x7327ec4f, 0xbc9c4e58,
10289 0x339e6f47, 0xde917fa6, 0x7b27ef47, 0xd9efe593, 0xbd1afd69, 0x397bfe4e,
10290 0x7efc73fe, 0xfca36b83, 0x7a8f183c, 0x176e16ce, 0xf2da2fd6, 0x037e0263,
10291 0x797d54fd, 0x5312bf38, 0x3bf8f3c5, 0x4af3ab5b, 0x7760ab67, 0xdc552494,
10292 0xa6e50f99, 0xfc93c6c7, 0xf154192e, 0xf3c83e79, 0xe04d8f35, 0x7c5747df,
10293 0x79cb043e, 0x8a797913, 0xf79479e7, 0x9eccb460, 0x2bb6159a, 0xd173ccee,
10294 0x1d4afab8, 0x42676bdd, 0x63d60623, 0xf944dd7a, 0xf1ae1280, 0x5d26259e,
10295 0xbff3ac53, 0x03d3f4f7, 0xc04cbf8f, 0x1fd0ba7f, 0x2105fc28, 0xe82fe355,
10296 0xcfe7e44d, 0x92fd5f7b, 0x9bdcd7ce, 0x079f5be7, 0x67ad1bed, 0xf287cd6f,
10297 0x1407eb06, 0x603c53ef, 0xc61fa087, 0x608b60e5, 0xadd9cabe, 0xd89fb45e,
10298 0x2559b76a, 0x18ff0ab8, 0xf007a9de, 0xa7b5e57b, 0x0f883c7e, 0x4c79c5e3,
10299 0xf1a07214, 0x15fdbfb5, 0x678dc4e3, 0x1b346e6c, 0x7c3f7627, 0x135fda27,
10300 0x1bfedfbb, 0x3cfcc3d7, 0x44f79c90, 0xfbc27ff4, 0x9a265d09, 0xabeec4ff,
10301 0x6bfd6056, 0x402eebdf, 0x44eeb93a, 0x42c505b0, 0x3effabef, 0x880e7348,
10302 0x7cd97a7d, 0x39f1b8d1, 0x013f8f09, 0x1e0893a0, 0xf8f0e73f, 0xced9f28a,
10303 0x0e6e8f3b, 0x7b549391, 0x78ec0ade, 0x605f3b8a, 0x7b8c6e09, 0xd1fd73c8,
10304 0xd5e3d57e, 0x7f783eb0, 0x20cc1f5d, 0x729e9ec2, 0x24820cd1, 0xc9672e5c,
10305 0x39a5729a, 0xcabf534b, 0x3ef9af91, 0xcd2af33d, 0x42ae99f7, 0xc8d6794d,
10306 0x37fa9a89, 0xe535cbba, 0x6a6613d9, 0xaa7b57ea, 0x60c2e535, 0xf17ea687,
10307 0xf7ed2e91, 0x788f4c63, 0x7eee3a28, 0x27a59f03, 0x2d9ee43d, 0x06f4d53b,
10308 0x85fe273e, 0xafda2383, 0x8ec5cd7c, 0xf4bdf037, 0x9f9f472b, 0x9be67e92,
10309 0x3180b6f5, 0x53393fb6, 0x83df082d, 0xf3f1d7a0, 0xfb25ef53, 0x937880fe,
10310 0xa0a6a7e7, 0x5090195f, 0x9fb9db75, 0x5c32efe2, 0x6efdc458, 0x943111c7,
10311 0x7f276e4f, 0xd34371e5, 0x79e47fb3, 0xf728b903, 0xaf9bebae, 0x8b94f759,
10312 0xcbbacd3e, 0x3c28aad9, 0x5729a1dd, 0xd4d6ee39, 0x5eb99e9f, 0x6ba67df3,
10313 0xb69e144b, 0xba37ca6b, 0x53c28e1f, 0x9e9e147b, 0xf4977cd2, 0x5ffc2ddd,
10314 0x0adfa1af, 0x3d42939e, 0xc9878895, 0x1f08faa7, 0x2ada7a13, 0x1cd74f11,
10315 0x957c20ef, 0x2895bd04, 0x348ecb2e, 0x20cf81bd, 0xddb0cbec, 0x7a4ce681,
10316 0x91766c1e, 0xf370ebff, 0x691e7a48, 0xfffbd376, 0xcf409e68, 0xe87b355f,
10317 0x33cd9ff9, 0xecd3d9e8, 0x734767a5, 0xae7fd507, 0xcffb8bb9, 0xddeffb52,
10318 0xc1bf45c8, 0x01a85d79, 0xc18ec623, 0x9e9e495b, 0xc79d084f, 0xeb7f06f2,
10319 0x3420a9ec, 0x901d67f0, 0x9e207f2f, 0xfb4f2e45, 0x1e0e7860, 0x19fdf8cc,
10320 0x43a37f22, 0x3b4429e7, 0x0fe3f47c, 0x32e6a7de, 0x37bd69b6, 0x183a7f13,
10321 0x132866cb, 0x90f7e9b2, 0x93cfbc1e, 0xa8b3d8c3, 0xf7bee84a, 0xb9636707,
10322 0xe79efc57, 0x241fc7e0, 0xc75bfc3b, 0xe2033dd9, 0xc707a3ec, 0x7b3fb388,
10323 0x7f4765ca, 0x46afd1cf, 0x471e11d8, 0xc3cbdf85, 0x3bf80d0a, 0xa16ae51c,
10324 0xf1ecf501, 0x5421e738, 0xe0c97953, 0x7bb75c52, 0x5f91e51e, 0xe1dfa06f,
10325 0xfdf0a39b, 0xec97acaf, 0xf7a0fae2, 0xa7ed1346, 0x2b3ce98e, 0x957a3f90,
10326 0xce10c7be, 0x14fe3d37, 0x7b5ea9e9, 0xafc21e5f, 0xbcbdf1fa, 0x4c7becec,
10327 0x0d944771, 0x8f953e1c, 0x6fdb393f, 0x33e15efb, 0x0d11d71b, 0x1d83b99f,
10328 0xf4115f7c, 0x201da2e4, 0x3daac7cb, 0x2c5714f5, 0x75c30cf7, 0x389af51c,
10329 0x81ed7aff, 0xf237e461, 0xf08bce94, 0x360cf4ff, 0xa2e7fad0, 0xe83f44de,
10330 0xd6207d42, 0x1f9e15ef, 0xa23dedcc, 0x2e67dc13, 0xe0bed2b0, 0xa3df8e98,
10331 0xeedf5d10, 0xcfa3fbe2, 0x9c87dce2, 0xdc57be28, 0x0becff54, 0x5aef5fd0,
10332 0xebdd750b, 0x58f6411d, 0x1740136f, 0x54f7ba68, 0xddfe39d3, 0xa12016e4,
10333 0xf82def38, 0x6cfef82f, 0xfc5f9df7, 0xb07fea06, 0x1d26ead6, 0xf04518e2,
10334 0x2f2a285b, 0xfd93354e, 0x6e4e78b4, 0x5bc5ea05, 0x56f0bc44, 0x614e9abb,
10335 0xe8d93543, 0xdb967e80, 0x0403370a, 0x6ab4cad9, 0x5364fe23, 0x9b1dce4d,
10336 0xe87ab9f1, 0x58f22376, 0x9b7d98dd, 0x07ad8cd1, 0xf9252e16, 0x19a77a17,
10337 0x3adb75e6, 0xe7ef8bbd, 0xdadaf9e4, 0x22f7946f, 0xc898f7e9, 0xd020024f,
10338 0xa5c9357e, 0x4949f668, 0x181f4e82, 0x6331e22c, 0xda4bd8d9, 0xe44ed778,
10339 0xdf8bb3a3, 0x1e271e19, 0xec2efda1, 0x7b8adfc7, 0x4fefa39e, 0x5c3ae391,
10340 0xcc75ff7c, 0xf6899408, 0x07ae42e4, 0x7cffcdc6, 0x7fac2943, 0x4743b75c,
10341 0xd5b70d79, 0xb87880bf, 0x68f025d0, 0x4fc85d60, 0x7c97f937, 0x4c421bf0,
10342 0xf0dce69a, 0xbba5f495, 0xa91951c7, 0xde424b2f, 0x397d48ca, 0x12adafa1,
10343 0x8fd4a2f5, 0x211ae6c1, 0x8e489b8f, 0x475e6c1e, 0x7ecdc3e5, 0x6e691e7a,
10344 0x8db8f215, 0x79aaffbe, 0x01c790a7, 0xd2f78f21, 0xf9e6eefb, 0xd9ad7cf4,
10345 0xa985cf47, 0x6e11d7be, 0xd73b8e32, 0xdcbca3ec, 0x189b0f43, 0x742ef1c6,
10346 0x038f289b, 0x47b1e238, 0xc94f30d2, 0xa344e744, 0xe5a295f3, 0x743d3f7c,
10347 0xe5b7b80e, 0xfef7e46d, 0x17b4233c, 0xa7a7c707, 0x4765cca3, 0xe0f1f4b9,
10348 0x8e8724f3, 0xb4765cba, 0x2e3e4fa7, 0xdd971eca, 0x0d3fe500, 0x71fd25ee,
10349 0x9bb2e7d4, 0xe3c9fca0, 0xdfbbfcbd, 0xf940b765, 0xfc7dc1d3, 0xd051807b,
10350 0x2fe0ecff, 0x33958e48, 0x47f220e5, 0x2a7f39a5, 0xd7d00ba8, 0x2f9107e5,
10351 0x992e67a6, 0x60b17c8a, 0x72e88bb0, 0x41fd6ba6, 0xd91acf2c, 0x1515e2ae,
10352 0x46e15b1e, 0x5691576c, 0xa9bb62ad, 0xc46c7739, 0x6e86d376, 0xcddb2357,
10353 0x236fb318, 0xb7706f96, 0x2e9f68ab, 0x1a563940, 0xe59647ee, 0x65a72977,
10354 0xddd5dd3e, 0xe307d25e, 0x0fa4bcba, 0xe62a5c24, 0xff426f56, 0xe2976367,
10355 0xa9a5dfc0, 0x27f4ab98, 0x62ee6033, 0x0a93de03, 0x3dfffaf2, 0x87ac77ae,
10356 0xf9623675, 0xadb72a1a, 0xedfa06ff, 0xe2f6007f, 0x8000e831, 0x00008000,
10357 0x00088b1f, 0x00000000, 0x3cd5ff00, 0xe5547809, 0x9dcee7b5, 0x4c92642d,
10358 0xe2420836, 0x96249964, 0x26b6432c, 0x0c486410, 0xf90130ee, 0x10196544,
10359 0x044816c2, 0x7eab17eb, 0xe0171a19, 0xd16b8d69, 0xb5c46faa, 0x61e4b6af,
10360 0x1d0958d4, 0x87d252aa, 0xb410553a, 0x88a47479, 0x119099f0, 0xc7d278dc,
10361 0xf7fce73b, 0x24cee666, 0xbefd1480, 0xff938607, 0xcfd9fbfe, 0x005ffff9,
10362 0xb3f85380, 0x34607f02, 0x3d2538fe, 0x0468048c, 0xd1bf67f1, 0x0395b26d,
10363 0x8c0734ac, 0x412fa3a0, 0x6010aba3, 0x76960eaf, 0x24a40014, 0x0b7afcc3,
10364 0x74b08d96, 0x5de7960b, 0x05480368, 0x20bada68, 0xda85816e, 0x6066e3bb,
10365 0xe21745fb, 0x52ce38af, 0xe0546e05, 0x9bd40a93, 0x4f34899c, 0x1fd24d9a,
10366 0x856fc7ca, 0x064a7850, 0x3d9ab7e8, 0x448004ba, 0x0dac7b93, 0xfb9bedc7,
10367 0x8758834e, 0x31d688af, 0xeb1ebd6c, 0x6c3200e3, 0xca1f1e56, 0x5e541982,
10368 0xc846ed09, 0xcff5b846, 0xda22a4fb, 0x2327c597, 0x5f434e84, 0xf9ec5f20,
10369 0x63fe1654, 0xe0543d06, 0x6e03e97a, 0x70d79969, 0xea566020, 0x743967f1,
10370 0x226670ec, 0x7ed45ede, 0x18bf046f, 0x7dfb43bf, 0xbe8de215, 0xbf697537,
10371 0x0f5b5403, 0x0230438d, 0xd9dfb8cb, 0x855efe12, 0x878f0dff, 0xc3c06749,
10372 0x10f0a1a4, 0x1af01fb5, 0xd7de8e41, 0xa66ecb0a, 0xc0bee473, 0xd1fcca9d,
10373 0xf7218108, 0xf445f2a7, 0xfe05dafe, 0x25ff02f5, 0x5a74e736, 0x38fcdd5f,
10374 0x8e005390, 0x4d79356d, 0xa9ffdc99, 0x1744293d, 0x2d837593, 0x5b5b3e9a,
10375 0x00de8367, 0xcdd5adb0, 0x14bad7d0, 0x3f8076f4, 0xf97336b5, 0x2e16d6ad,
10376 0x30f568ef, 0x8ebad9dc, 0xdb5a5fe1, 0xeb577eb9, 0xdbbf2e46, 0x6fe865ea,
10377 0x5fbf917d, 0x86657f3b, 0xff4d12db, 0x45cec9d5, 0x7b9e8fc4, 0x3e9913aa,
10378 0xc853f7b8, 0xc81a9eab, 0xc344b66f, 0x9d658301, 0x8f65c094, 0xd9e1f711,
10379 0xc36de316, 0x8c73fd7d, 0x19c689bb, 0xad7e09a8, 0x4a437c43, 0x30d0f180,
10380 0xbe9abdd2, 0x3a1c464b, 0xe4f56689, 0xeb0efe12, 0x6407bf3c, 0xd39b56d9,
10381 0x383e47a5, 0x17558f1a, 0x6582dc00, 0x78f3ce0f, 0xfa85abaa, 0x48c07e41,
10382 0x3fa29ce3, 0x097c7193, 0x3af07766, 0x0e1ca210, 0xb1e808c4, 0xd18f2c49,
10383 0x40ddc850, 0x60f99fba, 0x1913e9e0, 0xcb3382b6, 0xa8f870c5, 0x9e03ab93,
10384 0x6567a432, 0xd584c3ac, 0xa4f8127d, 0x46538412, 0xd38e00d6, 0x13d46e97,
10385 0x5644149c, 0x9fc3c750, 0x6322dfc9, 0x14cbf186, 0x6b94d448, 0xed35a3cd,
10386 0x9a99aceb, 0x5cf4befa, 0xb4d2ff1e, 0xfaed348b, 0xc59a5746, 0x232f53bc,
10387 0x6f7465d8, 0x0974805c, 0x9b1c9956, 0x98bdfeb0, 0x062822f8, 0xbf1b1698,
10388 0x317be089, 0x376a5e19, 0x14c9c0ed, 0x934e7dc0, 0x108b237d, 0xc6db9755,
10389 0x99edc76b, 0x76c36353, 0x6957e657, 0x25c121d7, 0x1dabdfb4, 0xa7df3453,
10390 0xe9ae5e57, 0x93fb32ef, 0xcef5ad08, 0xc6f7cd7a, 0x9f41af96, 0xe5b1300c,
10391 0x014be824, 0x343afbc6, 0xecee94e3, 0xbf1fb4d2, 0xeb12641b, 0x378e7d92,
10392 0x741f9609, 0x152ac4ca, 0x24df9b87, 0x3fa5f558, 0x4e01f683, 0x9f5159b0,
10393 0x83dc8a4b, 0x963d0247, 0xcae52927, 0x812db7a0, 0xf21270e8, 0x89bf48f5,
10394 0x6321c230, 0xbff2a963, 0x4c1f104e, 0x32002052, 0x16abf607, 0x3a79804b,
10395 0x4598d78b, 0x1be5056a, 0xc906c1f5, 0x3847a691, 0x50540e47, 0x8a0428f9,
10396 0x973aca08, 0x2a6bf89e, 0xb2a58f34, 0x0469dc09, 0xbf74483f, 0x2fdc7c4f,
10397 0xe2c4da05, 0xcfc4c982, 0x68ff3f75, 0x17ac6dde, 0x5c261c62, 0xfebaefdf,
10398 0xfd6b4a91, 0x91f53fbb, 0x7e216c37, 0xcd7eb26f, 0x8dcb5278, 0x7f19c72d,
10399 0x2d6fb96a, 0x92e177cc, 0x9f680ddb, 0xaffe3610, 0xed0a76cc, 0x53a23ada,
10400 0xb8c9fc23, 0x1ed420ba, 0xc418be3a, 0xbfea3177, 0x04d35a7a, 0x5ddfd7c2,
10401 0x6f576c4e, 0x9e087210, 0x1c4ef545, 0x29463ea7, 0xa7d44f83, 0xb2a1ed2a,
10402 0x6ae9cb9e, 0x6f68957d, 0x587bc757, 0x96ad1fb4, 0x522ef195, 0x9ca2cdcb,
10403 0xa0f7cea9, 0xe5aa1728, 0x397170ff, 0x613fb44e, 0x29ef559b, 0x53ffe908,
10404 0x0f18ddaa, 0xa06ec9e3, 0xc933903d, 0x1abb481e, 0xeda21f98, 0xb15eb685,
10405 0x237ff317, 0x44c58c7b, 0xdf63cb8f, 0x90eeb921, 0xf1bae480, 0x8bd38376,
10406 0xd49e7ff3, 0x12c6b451, 0xb7e7dfc2, 0x6abb7c08, 0xb6329ce3, 0xde6af95f,
10407 0x3923e226, 0x85c8f76e, 0x563addf8, 0x4ea77ac7, 0xe88138b6, 0xfbd0af7b,
10408 0xd848ff6a, 0x8686f2d0, 0xb2f5519e, 0x6cc1f3c4, 0xfaf9c1fc, 0xf4f51bef,
10409 0x8e59c206, 0x9370973f, 0xdcf42999, 0x95add448, 0xea36f3f8, 0x3dd23359,
10410 0x3a9c1b25, 0x1af29f6c, 0xf1a267ea, 0xc7d0bf41, 0x24f8c5af, 0x8f959c14,
10411 0x6ff6c9bd, 0x8e528ca1, 0xcf2d7bf8, 0x7c89979d, 0x9fce347a, 0xd0db7c4b,
10412 0x75d78db2, 0xe3cadd8d, 0x10583583, 0xcce2cf8e, 0x9e97fc28, 0x3fa5ff01,
10413 0x8271fe26, 0x75cfa403, 0xbeb47428, 0x78b796e5, 0xef95cbbf, 0x43325fac,
10414 0x472cb8ed, 0x39c68f97, 0x0e1f0832, 0x74074e85, 0x5f050ab6, 0xfabe1357,
10415 0x1373fb17, 0xf9f0ecb1, 0x3ed9ba47, 0x88972aec, 0x4071cdee, 0xf92a3f74,
10416 0x410ef68b, 0x0ed68eff, 0x5a5bcbb6, 0x84be18bb, 0x55bad073, 0x8d10dd7c,
10417 0xc067f9df, 0x131ffcef, 0x01f4a3bf, 0xadfb03a3, 0x4e3c07da, 0x1180ff85,
10418 0x2b4cf4c2, 0x27e225f1, 0xfae24ba1, 0x2120b93a, 0x138fa9a0, 0x738e52fe,
10419 0xcae9f13c, 0x37aabb19, 0x98792148, 0x311d0b1c, 0x0ed7cc49, 0xc41daf85,
10420 0x22ff2ad7, 0x11ea963f, 0xc49d6fcf, 0x37e0437e, 0xf3c0bfc4, 0x3bba78a8,
10421 0x881baf1a, 0xabc1a78e, 0xc607feb6, 0xc7fa276b, 0xaf8237a4, 0x653778c4,
10422 0x77f9e346, 0x7c555e0a, 0x7fe4536f, 0x236f3c38, 0x7f9ea73c, 0xb4cb6f3c,
10423 0xf891b8f1, 0x453ece1e, 0xf75d47d2, 0x7e5a7210, 0x2d3a722e, 0xdff8aadb,
10424 0x461677e8, 0xa26dfdd3, 0xf74359bb, 0x53c8339e, 0x4f298fcf, 0x848b7891,
10425 0x3ab8128d, 0x3fdfd12c, 0xdf561ccb, 0x4e3c179d, 0xf8d6ce0a, 0x75bf9367,
10426 0x29b3fc6b, 0xfd696118, 0xe5349bd8, 0x9aadeb3a, 0xada697f6, 0x6e5fd4d5,
10427 0xbfa9af5b, 0x4d01ff32, 0x63c76af9, 0xd3e67e11, 0xe77afa9a, 0x73f5346f,
10428 0xea6bb79b, 0x68f4b7e7, 0xfe7817ea, 0x78ab29aa, 0x1c0adadc, 0x356b6d2f,
10429 0x65d3f12b, 0xfe03ab0c, 0x8b83125a, 0xdfd9070f, 0xd7b7f4ac, 0xafb24bb2,
10430 0x32d1fd83, 0xc296ab9f, 0xcd9d8aaa, 0xb5f4126f, 0x2d78955a, 0xad5be18d,
10431 0x3befd636, 0xee19f35a, 0xf128756c, 0x5dc3255a, 0x4e254ead, 0xb48c3173,
10432 0xbb66af0b, 0x3d2164a7, 0x44bcbda6, 0xe980b807, 0xc167f87f, 0x77bc5a5e,
10433 0xdce28ebc, 0x8e5eca35, 0xffb37f57, 0xe3afe436, 0x950726cd, 0x311fb77b,
10434 0xf9a30ad8, 0x32b7ee65, 0x6cf8c338, 0x0d5fcb6e, 0x45cd67e4, 0x0863ba0f,
10435 0xa59a9d39, 0xf7207e63, 0xcc2f5003, 0x05218336, 0xd9ecc1f5, 0xf80da392,
10436 0x189207bb, 0x3f58dcfa, 0x133e0f4d, 0x7a2deb96, 0x979e299f, 0x3fa332e6,
10437 0x132c4b3d, 0x50f07a4c, 0x7324a43d, 0x7d0d7e9c, 0x383ca1b4, 0xbf18b865,
10438 0x1c3f22cf, 0xe96f5dfb, 0xbddd9030, 0xfa2fe76e, 0xb87ac36f, 0xf1ce53d3,
10439 0x25625c3d, 0x3e792dfd, 0x371a9dd6, 0x3520bcbc, 0x5f1850e1, 0x4e19254f,
10440 0xe1d1f8a5, 0x7adc5277, 0x9cf1c193, 0x05dfba2d, 0xc9a77eca, 0xc16ffb12,
10441 0x4dde4dd7, 0x713e4852, 0xb84d3b7f, 0x01e226cf, 0xc1b367da, 0x7e445797,
10442 0xb3f676f6, 0x16d72a9b, 0x2e9a9d11, 0x15313e91, 0xa69de285, 0x8fd92f96,
10443 0x91cfd48f, 0x90f14cf0, 0xfe656fc3, 0x93badfdb, 0x8b8d45f9, 0x5c7d5b7a,
10444 0x6ab80b2e, 0x39a3e3c3, 0xa64dff93, 0x4beaa7b8, 0x3c4cff11, 0x53fbdce9,
10445 0xd5a077dc, 0x17e52fff, 0x9a82bcd4, 0x5bcc8867, 0xde647aa8, 0x6e0975ad,
10446 0x2c9aefdc, 0x94f30651, 0x5ea3a674, 0xdedf5540, 0x9765159a, 0xbd3ac8ef,
10447 0xffd6d67e, 0x6cf9fac0, 0x4d31bff9, 0xbe48d5d8, 0x05e337df, 0xe553ad03,
10448 0x9ffe48ef, 0xfe707d43, 0xd7924d39, 0xf67a7a83, 0x44c37692, 0x7df9dce9,
10449 0x88a0e5b9, 0xc2ed238b, 0x3607b6f7, 0x2b5c9ba6, 0x92617c73, 0x1e50726f,
10450 0x4743a544, 0xcf3add34, 0x1fceb740, 0x76d16e93, 0x73bce0f1, 0xf1a08bb3,
10451 0x8acbdfcf, 0xc83e27f2, 0xa91fbd3a, 0xf781ffad, 0x636b1d6d, 0xef4472b8,
10452 0xea27593c, 0x01627c45, 0x80eff21d, 0x74b8e657, 0x3c7b6669, 0x195033c5,
10453 0xb77d278c, 0xf2065bac, 0xd4ef410f, 0x5cfe468f, 0x1f67f0a2, 0x7e243ef8,
10454 0x7ef7055c, 0x25980941, 0x22ae4bd5, 0x09f4b73d, 0xfc4f0843, 0x27f393af,
10455 0xcb7e94ab, 0xda469d2d, 0xb567f2ef, 0x1a71d4ed, 0x1fc88a5f, 0x19fa5f57,
10456 0x73f0ddb0, 0xa7556fde, 0x5977dfb6, 0x62872971, 0x084b1659, 0xa7d267ef,
10457 0x1baec947, 0x5b27cac2, 0x3f20bf39, 0x9e03e0f3, 0xc4fa21b1, 0x71f14764,
10458 0xf9e9f65c, 0x23ff5b58, 0xf71cb1f3, 0xf9e891ac, 0xbf78f97d, 0xeb4599dd,
10459 0xa0f3f556, 0xc4c379de, 0xdca0677a, 0x37a4f226, 0x9e2daefd, 0x3804e4f8,
10460 0x2a161d88, 0x6a85d2f9, 0x369d74be, 0xcfb93a5f, 0x49b979c7, 0x716dbd07,
10461 0xbd89f748, 0x55dbce1e, 0x59b776ed, 0x5dd3fcb0, 0xa3fc994e, 0x64b96ff1,
10462 0xdfeab75a, 0x484efea8, 0xbeb0e58f, 0xf66bbce3, 0xd53bebd9, 0x30f6aa2e,
10463 0x06560ed2, 0xfec96bdb, 0xe3b6f84d, 0x2be7824d, 0xf7691eaf, 0x7a138bde,
10464 0x57c1a8e2, 0x8cfc97be, 0xcf1c63d7, 0xaffaf441, 0xc67e16cb, 0x0302cf4c,
10465 0x1f091fcb, 0x450cdbca, 0x764fae6e, 0xf54d975f, 0x99d0bd8a, 0xa3b2069d,
10466 0x23df7275, 0xf95f12d7, 0xde1bce65, 0xbf07c77c, 0xccedb5ff, 0xeb2685f9,
10467 0x863ff671, 0x749a338b, 0xa2f8a6e0, 0x4a56d6a4, 0x6dc50c7e, 0xf3544794,
10468 0x9fed918a, 0xc8acd7b0, 0xb5573ce6, 0xd9eb49df, 0x1c33d628, 0xbe5a9abd,
10469 0x8731e4d0, 0xbba9bf9b, 0x4c30badc, 0x16ca5e3e, 0xdbd22ef1, 0xa21cc87a,
10470 0xc5f2d9f7, 0x65f8b7ff, 0x091e0c9a, 0xe4a16ced, 0x082ffe15, 0xf80e783f,
10471 0x2083ce19, 0xf9583743, 0x38216a7c, 0x17022e18, 0xdbbb7cc3, 0x60337c4b,
10472 0xbe248e08, 0xbbf57fea, 0xfe9be202, 0x57b6278b, 0x5f3bf9c1, 0x06fff48a,
10473 0xfe78dbc6, 0xdbbe5781, 0x7039fc43, 0xf4ace187, 0x6764eac6, 0xe451f127,
10474 0x53bbcb79, 0x01d73e64, 0x8b967afd, 0x03e8ab7a, 0x1b72a497, 0xe64cd8eb,
10475 0x1cde908b, 0x37aab4f5, 0xc2bf6017, 0xd7ac744f, 0xb5e49960, 0x80aed363,
10476 0x70ac458e, 0xa657a671, 0x2fa8a772, 0x95e8995c, 0x15585cb0, 0x4a6fea23,
10477 0xc52642f4, 0xcb960143, 0x0fac00f9, 0x8bd08017, 0xf7938237, 0x96419189,
10478 0x6f17fd84, 0x3e709735, 0xa4390216, 0x8e288bff, 0xb74e221a, 0x2f7908e6,
10479 0xbefa12ce, 0x179b46b8, 0xc95b30f9, 0x4a6bdb1b, 0xe7561072, 0x1d12f738,
10480 0x1bfc938b, 0x7ca32a1e, 0xa1360e90, 0x75567d7c, 0xaa779f2b, 0x35ed1afd,
10481 0xcdbf84bd, 0xe2bc7012, 0x9f7936e9, 0x238ce713, 0xf2cdcfc3, 0xa807b5ed,
10482 0x7b5a11dd, 0xc578f0f9, 0x47f71c7e, 0xd78795cb, 0x1bb14c57, 0x43f1fbe7,
10483 0xe5cbcf25, 0xebe679ff, 0xf80b3bfa, 0x7e43c14c, 0x7ddda372, 0x046fd79c,
10484 0x9ffad0b0, 0x40147114, 0x47e50673, 0xd2653c97, 0x11f19f91, 0x03c8639a,
10485 0xddc61bf8, 0xe31bff04, 0xc77f8267, 0x27e099f8, 0xfc133f18, 0x04cfc607,
10486 0x1e3b7f17, 0x8d802283, 0x4e4b4e39, 0x301ce879, 0x1c86bd72, 0xf9c1cf81,
10487 0x7f3c8dbb, 0xf8cddd9d, 0xebf7a41d, 0x9973a5e0, 0x0bc189cd, 0x6fc34e92,
10488 0xf0dfdd03, 0x7870e9f9, 0x2325cf51, 0xe853bfeb, 0x67a9d45a, 0x15d45ffb,
10489 0x6b086f88, 0x918e4177, 0x395f0beb, 0x1fe34f18, 0xd7e20eb5, 0xa796e129,
10490 0x82f944e9, 0x08332d67, 0x677675bf, 0xe51bed09, 0x51f6833c, 0x83c1f5d4,
10491 0x7c78cb13, 0x75a364ab, 0xb8e51f04, 0x911f6221, 0xb5f75078, 0x81bfd139,
10492 0x257e6ffa, 0x7a82768b, 0x10dc8407, 0xed43491f, 0xcff32d77, 0xccb05374,
10493 0x7e9deb8a, 0x0a1e6e4a, 0x29f675ff, 0x5477e78c, 0xc7cf537e, 0xe952fe15,
10494 0x1df2ae76, 0x6b901e39, 0x6ae77e84, 0xb236a5d2, 0xc9e3274b, 0xee57ac2f,
10495 0xe6757419, 0xf4fb47bc, 0x6ec194ec, 0xc8d63e63, 0x5f8562df, 0x6dd85854,
10496 0x36bd1174, 0x59ca1f77, 0xe4fa6164, 0xb3f6c62c, 0xbc9aec72, 0x89d56167,
10497 0xe14a1fc7, 0xea9a56f6, 0xceba783a, 0x60dfe38a, 0x6d36fede, 0x93f5ae69,
10498 0xcf2c44ba, 0x1076934f, 0x9ccb605c, 0xe5a3649a, 0x37fd797a, 0x41d94fe6,
10499 0xa3957522, 0x29b9fd9e, 0xecc264a4, 0x9639ad43, 0xcb071f0e, 0x4d64d675,
10500 0x31b4d2f9, 0xdb97f69a, 0x57f535b2, 0xd4d38fe6, 0xe55ef3ab, 0x2bb4d528,
10501 0x51660a4e, 0x60fb875c, 0x64e780b9, 0x7da25daf, 0x1c62beef, 0x3f3da796,
10502 0xca6e41cb, 0xda7ea566, 0xd12f5a96, 0x69f10063, 0x70ea8744, 0x1f47fae5,
10503 0xe222c1a2, 0x67eec686, 0xe76d3876, 0x130c3710, 0x7100ac2f, 0xdc5c3f8e,
10504 0xa02f1910, 0xf4907cfe, 0xd7abf167, 0xdc70db58, 0x2e2755cd, 0xef3ee1b0,
10505 0x8238c1cc, 0x47128dec, 0x833fc70c, 0x04d92272, 0xf0c8f4ff, 0x03fc10dc,
10506 0x1f850bf0, 0x3ef69c05, 0xdf0533fa, 0x4a7dbf5f, 0x07f38dfa, 0x57efc51e,
10507 0xafbe4460, 0x6f78e8d8, 0xdea7e50d, 0xf9ce8191, 0x03ae24e1, 0x77e81beb,
10508 0xb0f7c439, 0x46bbe9e8, 0x0f77f0a7, 0x94aba6b9, 0x731fdffc, 0x71aabf14,
10509 0xcba35dfb, 0xf370f542, 0x70f69a27, 0xa6b774bb, 0xb6a6677c, 0xbb94ef7c,
10510 0xe70ffbc3, 0x5c6c3597, 0x9ca37460, 0x392c3c36, 0x8be843bd, 0x28a4f5c1,
10511 0x097ba1fa, 0xdb43dbeb, 0x716d1997, 0xe157edd1, 0x6cb79478, 0xaadec618,
10512 0x193aea7a, 0x7faa879a, 0x71cf9d47, 0x08fbe77e, 0xcdf64f71, 0xc3b09af3,
10513 0x8db8251f, 0x2fb27ce1, 0xf47b9c47, 0x1dc0f63f, 0xee79d35f, 0xeabe22eb,
10514 0xa3f6144f, 0x9d33f3a8, 0x08f1610e, 0xd6455fc1, 0xd2ec8e80, 0x0f58d2c0,
10515 0x2d359ca0, 0x8ae8f38b, 0x7e088fc9, 0x5e4f1e68, 0x9a0f2dc7, 0xeb1fce91,
10516 0x3cbb1a74, 0x9616c140, 0xd9fd9efb, 0xf7e93b8c, 0xe92f7102, 0x2fb3ed7c,
10517 0xad7d8407, 0x1e637a11, 0xb7629ff1, 0xd3565500, 0xc768305d, 0x5e10cf48,
10518 0xbf6b9ca8, 0xc987fdf5, 0x7a11efcf, 0x370af283, 0xb4e05fb0, 0x1d0df368,
10519 0xbbf8e72c, 0xd73efc2d, 0xb78feb59, 0xf3968dda, 0xd84647a8, 0x218779b5,
10520 0x57fbc5f4, 0x5e9b3d22, 0xd05ef997, 0x04f6adb1, 0x911fd308, 0x28da6c78,
10521 0xe5ab9cb3, 0xcbe55ba3, 0x830f6cbc, 0xd185f519, 0x83a706f8, 0x55b57fe5,
10522 0xd27ab7cc, 0x4ec83337, 0x8bd6eeaf, 0xcdc32f4b, 0x5b064eb3, 0xb79b3cd8,
10523 0x5d929699, 0x603fd753, 0xf749f455, 0x0a534957, 0x843b5c04, 0xc0bf457d,
10524 0x417e4290, 0xecf1c4bd, 0x3551ee9e, 0x123da784, 0x3c256cf8, 0x5c6635c4,
10525 0x1c314cdf, 0x5e50b77d, 0xf9f2d214, 0xd71aa59e, 0xacecf1aa, 0xf27659ee,
10526 0x5cec3f63, 0x072907b8, 0xccd9ec93, 0x8782d74f, 0x893deefd, 0x93ca74ae,
10527 0x3fee534c, 0xf60c49ec, 0x67bdbf91, 0xf744ac52, 0x3bfc7019, 0x5f757c69,
10528 0xf4ae0c7b, 0x9297de66, 0x44fe752f, 0xf67b153e, 0x67aaa271, 0xa7dbe4eb,
10529 0xf7e7495c, 0xf14ac073, 0xf85974ec, 0x2147f0d5, 0x6d5eaacf, 0x6c49fc92,
10530 0xa633edaa, 0xa34f11db, 0xe4a97e5a, 0xf735db7d, 0xafd6cf00, 0x5fa38c1e,
10531 0x567f9894, 0xb1bc4439, 0x47f3faaa, 0x57f9c5ae, 0xfe4fbc61, 0xedaec2dd,
10532 0x917f08fb, 0x7c60fdf1, 0x7be62ff5, 0xd733e3a3, 0xcddfda32, 0x73df1c77,
10533 0x69c7442d, 0xea817183, 0xcb173e5f, 0x58a8d6e7, 0xfc287c85, 0xee5b647a,
10534 0x7f5835de, 0x66062fe4, 0xfd2737d7, 0x58ade8ea, 0x58b9f9be, 0x2491f3c6,
10535 0x391d90f0, 0xebcf29b2, 0x744b06c1, 0x6fb25ec1, 0xcf8e25b0, 0x327b3e69,
10536 0x512fb7ef, 0x76b7f27e, 0x7e4843f6, 0x7cc2e86c, 0xe88ff746, 0xb9a3cbfb,
10537 0xbcc5b81f, 0xca5c8a0d, 0x5fde142f, 0x242ff54d, 0xa5427e73, 0x6327e1df,
10538 0x7dac149c, 0x2b22be05, 0x92e7deb2, 0x5bdd10e7, 0x697ba15c, 0xf97c84bf,
10539 0x06f708d5, 0xc7f2f7da, 0x89c3f3ff, 0x17da9fb8, 0x1555feae, 0x07d96fae,
10540 0x84e340a9, 0xdfb43ae8, 0xb66b6c70, 0x3f057f90, 0xf18c5e2b, 0x27d30c1e,
10541 0x35123b2b, 0xd1aea6e5, 0x7a6183de, 0x729ef068, 0x04e7c4a3, 0xed5c8a8d,
10542 0xeddbba37, 0xfba5d794, 0x713f4ca9, 0xce84b51f, 0xf7ff08ab, 0x91ff1899,
10543 0x5da2f67c, 0xf3566739, 0x4e60c93c, 0x0b75b923, 0x97dc0dfc, 0x31e289b7,
10544 0xf1493d9f, 0x33b9823b, 0xb3f9c30a, 0x9c1bd577, 0x7b8931e7, 0x9f43318f,
10545 0x13da77eb, 0xf9837db9, 0x699e4d4b, 0x4d09cb55, 0x015567fe, 0xd2501fb0,
10546 0x89bd2b66, 0xba1487ce, 0x7aee9fdc, 0xf1def18d, 0x18bbabc0, 0xf2dc4f9f,
10547 0xd3bbcd31, 0x5d83f4c2, 0x11163c4a, 0xbf98356f, 0x69efe450, 0xe87e7f8d,
10548 0x9445bdb1, 0xcaf438ff, 0xd3ca22b8, 0x87fd942e, 0xf7c99d7e, 0x86dff69c,
10549 0xf7cecb70, 0xb91e2f39, 0x0c7ba8de, 0x8d43d092, 0xba648fb4, 0xc77ae3ff,
10550 0xf42e72ce, 0x850d81c3, 0x1f353f8c, 0xe864703d, 0xa75d5078, 0x3ebabe3a,
10551 0xddb57c75, 0x5f22ecdf, 0x17f46fd0, 0x415ffd91, 0xfb6130e7, 0x17f78fea,
10552 0xbbe85a25, 0x4913f855, 0xb7e30e58, 0x2abcf57f, 0xf06a7cf2, 0x47c9565c,
10553 0xfdadd3ed, 0xaff91199, 0x8321e3af, 0x7eef5c3b, 0x752a73cf, 0xdafdeabd,
10554 0xfd85ab7e, 0x2576939b, 0xe90e9f1f, 0x1deb0ed4, 0xb7bff23e, 0xc7e41c98,
10555 0x905c9a27, 0x3469f88b, 0x9afef8fa, 0xe4d12fda, 0x7991efe6, 0x234481f9,
10556 0x81e5bdd0, 0xf7fce554, 0x42bd602b, 0x9c16e871, 0xd756acb7, 0xd212c5bc,
10557 0x2cfeaa87, 0x0bdf871b, 0x3ea91ee8, 0xdf2027e4, 0xdb6b1594, 0x2da3f687,
10558 0xa0ae7bff, 0x6eb25963, 0x24b938c8, 0x1b65c857, 0x9e42c874, 0xa89d1d85,
10559 0xbf0d1de0, 0xacd7ee1c, 0x40fcf452, 0x0743d9bc, 0x8ab713bb, 0xf513ab7b,
10560 0x5104edbe, 0x124b400b, 0x89f4995d, 0xfab4baf1, 0x1cc86c9c, 0xd8e3cbb6,
10561 0xc8504f2e, 0xccd4b77d, 0xf7435bf7, 0xc132fd5c, 0xd0c8218b, 0x413d5609,
10562 0x4bc30324, 0x2a70c5c0, 0x0cbc3334, 0x015e19da, 0x02af0c1d, 0x89f8433f,
10563 0x1ed80daf, 0xff656edc, 0x3a25f2e9, 0xd765cbb2, 0xcf97ed0e, 0x3c35f052,
10564 0x57cb503e, 0xa63e3b9c, 0x8772f72a, 0x7cd8cbc5, 0x2f157be6, 0xec4fe226,
10565 0x34de0317, 0xc0209382, 0x46264ce3, 0xdd78a6ce, 0x6b7ef7c6, 0xbae5c9c1,
10566 0x6547c4b3, 0x1777adc0, 0xda97810c, 0x9e64f9a1, 0xb90327c2, 0xe951f8c0,
10567 0x8dae48f5, 0x30dd2acb, 0x7b234c50, 0xc84f4d10, 0xc59675a0, 0xa7a71cd6,
10568 0x5f3fb722, 0x7a8f5336, 0x66b4acb4, 0x5f90a90d, 0xe5154ee6, 0xd32f3589,
10569 0xf3fb7d51, 0x71728a97, 0x81c1a94d, 0xcbdae85e, 0xfa825e66, 0x27dcadd9,
10570 0xa011a337, 0xb672637b, 0x2b761738, 0x724dcaf7, 0x2fba5ae6, 0x580dba66,
10571 0x0063b8df, 0x22d7ecfc, 0xb8bc91b7, 0xb37b1c45, 0x3aafd055, 0x2e4b7dd6,
10572 0x2fb333d9, 0xb87486de, 0x28dd6d79, 0x18f79bb2, 0xa49ff8c5, 0x81bdc6da,
10573 0xc49932f8, 0xbf7556bd, 0xc189ef58, 0xadb24072, 0xad0cc969, 0x59c75d4b,
10574 0xe9d77bcc, 0x774fcde6, 0x023d206f, 0x15c70736, 0xbefb1463, 0x34c4cb65,
10575 0x1d7030f4, 0x20475e56, 0x0b4d772e, 0xee91dd56, 0x1bc6847a, 0xf87c1388,
10576 0x7529d108, 0x75cbe878, 0xc43b943e, 0xdfb581f7, 0xbd23eabc, 0x042e29f4,
10577 0xae4df9c7, 0x475a71fb, 0x51902e93, 0x45fbf48a, 0x05007a2c, 0x9096be21,
10578 0x0f107398, 0x1af04e6d, 0x77945e59, 0x99f9ca36, 0x8b03172a, 0x4fc43c71,
10579 0x8b55cb99, 0xcc5422ee, 0x60937e6e, 0x16bdbba5, 0x179e686b, 0x724d3d68,
10580 0xe4f881b0, 0xc607e268, 0xc76e594f, 0xf454fe0a, 0x9eb6f759, 0xa288c6db,
10581 0xb2e4c20b, 0xaf89db69, 0x6f7486ff, 0x5071663a, 0x3e3c90f3, 0xe79c46b6,
10582 0x46fa345a, 0x5d09d395, 0x9c383e26, 0xc5a2f5b8, 0x07d26ed4, 0xb7a4d9bd,
10583 0xda06f727, 0xe81e7dc8, 0xc8463bde, 0x7fd7ea89, 0x7d8b9d23, 0xfc8cccf9,
10584 0xf9104091, 0x839c5e23, 0x8af4fc73, 0xad5f0738, 0xeca93de4, 0x788b7de1,
10585 0x573b8d54, 0xde2dbcf6, 0x6ff07985, 0x122bbd05, 0x713e967f, 0x6fc455e3,
10586 0xd48bef91, 0x6949b478, 0x7bd7a2b7, 0xf227ed37, 0xc51351bd, 0xbfc345a3,
10587 0xa27a6a37, 0xc8d1e396, 0xb9bd46f7, 0xb14afe4a, 0xa1f8a08f, 0xb436944b,
10588 0x87c70b3f, 0xf709af46, 0x35c9fab6, 0xd3952b0e, 0xc7d60e2d, 0xe10e3d57,
10589 0x6489e1ed, 0x9e5519e6, 0xd893ad97, 0x5af156bf, 0x49c9bcfc, 0x7e7e28eb,
10590 0xe8cdfb14, 0xe97b8bef, 0xde913e4a, 0x837bd012, 0x2cc189cd, 0xb9ba67ba,
10591 0xfe41df3b, 0x9d5a1ff8, 0x68430ff0, 0x503c6a7d, 0x4b54bf27, 0x2d8e87ef,
10592 0x3f0b38c2, 0xa679eead, 0xd5e58ccd, 0x1055e9eb, 0x13f384a5, 0xdf2aafc8,
10593 0xc6978329, 0xd543ef01, 0x39153b08, 0xc0e9a537, 0x188f8616, 0x0db008db,
10594 0x29300f91, 0x4fcd8bf4, 0x39c7d4d2, 0x4ff4d02e, 0xd4d2cca8, 0xf788c5b7,
10595 0xfa71e032, 0xef422a0b, 0x3f9d1248, 0x0083f4d1, 0xbd08adfe, 0x7e27b917,
10596 0x4f7e4eea, 0x3ce06fe2, 0x2565f245, 0x7926f69a, 0x5dfc4cab, 0x435ea5fd,
10597 0xa6529fcf, 0xb956f11b, 0x9c1cfd1b, 0xb69f4267, 0x01e0263e, 0x5bb317ea,
10598 0x984bc9af, 0x85f2da6c, 0x629e4a79, 0xe4d58c2c, 0x2ef10629, 0x61d8fef8,
10599 0x0545f31d, 0xbaaafce4, 0x006cf08c, 0x6f1a2daf, 0x5df840c7, 0x1c5ac6c7,
10600 0x426a96f4, 0xc932cbcf, 0x8b4baa41, 0xb5b351ff, 0xd6ed1ff8, 0x52cc7be2,
10601 0x9bd3be2d, 0xb0bef8b5, 0x4cd78b45, 0xd96f168f, 0xda6826eb, 0x346bdbdb,
10602 0x578dbce5, 0xe45fda68, 0x8f29a19d, 0x4d7af17b, 0x858ec2fb, 0xaee2fa9a,
10603 0x957a9ae5, 0x83e386cf, 0x11d5bef1, 0xdd03a6fc, 0x74a0f869, 0xf335cfe7,
10604 0x9ff450fd, 0x05e8a79f, 0x2bd7fe85, 0xf8dde576, 0xb892f7c3, 0x7a158b4e,
10605 0x50df3070, 0xee78e06d, 0x6d725b3d, 0xc505e91c, 0x7b14b9de, 0x894f3907,
10606 0x1d9455b2, 0xa2bf717e, 0x36ab9f64, 0x2cf746de, 0x8a8afdc4, 0x09b5edc3,
10607 0x1de23ed4, 0x494af4d6, 0xf91dde73, 0x67a66b2e, 0xd1209cad, 0x3f7144bd,
10608 0x841ef231, 0xdeab3efa, 0x2739a319, 0x96bdee1f, 0x78c25f9a, 0x2f148c01,
10609 0x3efccce8, 0x721fda31, 0x5fd9946c, 0xf6ffb373, 0x79cdc967, 0xfecc6ba7,
10610 0xecefe20c, 0x79f5eeb1, 0x3aa3b788, 0x3dfd8d87, 0x00d6fde5, 0x2fdf8c6d,
10611 0x3ca4ccf5, 0xbb8600e9, 0xdfd4d794, 0xbd2663b3, 0x5be5c45b, 0xac221503,
10612 0xe68f3fa6, 0x71a41fb9, 0xbbd6480e, 0xbbefb14b, 0x20cf3e13, 0x73a2667b,
10613 0xff3e12fe, 0xfc2f387e, 0xee147bfc, 0x406df50f, 0x79f0f367, 0x8e25cfee,
10614 0xc1a73e53, 0x77e4c2aa, 0x4f79419d, 0xb9b6e22a, 0xb8d4be0a, 0xff328e6d,
10615 0x29621c01, 0x5db9f3ea, 0xacbc667f, 0xe253eb48, 0x158766bd, 0xac71bfc7,
10616 0x7bef84a5, 0x221d4b39, 0xb8e357de, 0xb1f7f231, 0x87ba67b3, 0x88ed22b5,
10617 0x97869e26, 0x57cc8792, 0x42c5e646, 0x1fe316fb, 0x76cb1f58, 0x74fac0e8,
10618 0xc6863fce, 0x85f9ca3f, 0xfbdacdb9, 0x3e5bf3dd, 0x02dff0d2, 0xfa9a27cf,
10619 0x30d04a40, 0x781ff706, 0x1bd4f475, 0xaffd7f10, 0x9e282a98, 0xe4f5ba45,
10620 0x0fc68795, 0x897797dc, 0xb4ce1bf0, 0x1d79cfcf, 0x5afdcabd, 0x5bfb9f75,
10621 0xd03971f7, 0xefb8881a, 0xbfc4d1e4, 0x09fe342a, 0x0e8fc9f2, 0x431c234a,
10622 0xe76673e5, 0x57a9388b, 0xabda7779, 0x55ed3bbc, 0x2af689de, 0x957b42ef,
10623 0xbbeaa177, 0x9c095edd, 0x8e64bf74, 0x816a7ae4, 0x0f76efc4, 0x969b3ed1,
10624 0x5de88b07, 0x60715363, 0xbbf3249e, 0x7df423dd, 0x45bb7788, 0x69f49592,
10625 0x6ef435ea, 0xcf08f0f7, 0xd9d8b251, 0x50d789f9, 0x28d870bc, 0xc5f4a3e4,
10626 0x7bd2666f, 0xdd53c7bd, 0x3fbf89c7, 0xf31f6495, 0x9f12ebf3, 0x6033832b,
10627 0xef16719c, 0x13cbbf7a, 0xf32734e7, 0x0a89b9c4, 0xbd0be647, 0x9cb04a56,
10628 0x2e6f72e8, 0x68dabbbf, 0x385777e2, 0x7617539f, 0x7df2221f, 0x4d1fc95c,
10629 0x6a1fd23e, 0x5f2127de, 0xbbd3379c, 0xca675a39, 0x6ef126fd, 0xa0cfe02e,
10630 0x0f747677, 0xbdf245ca, 0x1de29c1b, 0xf0a6de5e, 0xf90930f7, 0x45bd3dca,
10631 0xb7a779a0, 0x7ec0e7b2, 0xe5af27d2, 0x53f393b9, 0x56c7ef43, 0x7f676fc6,
10632 0xc6df20af, 0x797ae2f3, 0xee17a8ff, 0xc79cfa24, 0x7e56617c, 0xd7fff479,
10633 0xf5bc3860, 0x5a3ff62f, 0xf77a1990, 0xaddef616, 0xaf2c3f20, 0x343faea7,
10634 0x42e5e9ce, 0xe5a97bcd, 0x93dd8f43, 0x7486724b, 0x5948f911, 0x88633f9a,
10635 0x05f3d3fe, 0x774feffd, 0x97f9a04d, 0x60bc8b37, 0x6fda6f88, 0xdce898f9,
10636 0x3ef21963, 0x723fdabf, 0xf5b72b9f, 0x9f703e30, 0x617f68f3, 0xf08cbcfb,
10637 0xbfb3eea5, 0x05a3ef7b, 0xdfdf73b6, 0x6e777df7, 0x6d71811a, 0x767950d2,
10638 0x7e613eb4, 0x3fed4999, 0x8fedaf56, 0xb1e5390e, 0xd1de48bb, 0xe254e96f,
10639 0xc4cbb21e, 0xee5daa17, 0x2920e254, 0x02ed83b0, 0x71724bcd, 0xfb61e4b7,
10640 0xda3be6a8, 0x947fb424, 0x61af7057, 0x685f217b, 0x775f1071, 0x49f9ef22,
10641 0x58cef41e, 0xc44773ce, 0x758b3fd7, 0xbc7844df, 0xa335aff9, 0xf2defe28,
10642 0x38942b97, 0x72abd84e, 0x69cb3f85, 0x4147da7e, 0x996df302, 0x730abeb2,
10643 0x55c9fb33, 0x5e4591e0, 0xac93c943, 0xdff1c1df, 0x141a01ff, 0x43d0aaaf,
10644 0x000043d0
10645};
10646
10647static const u32 usem_int_table_data_e1h[] = {
10648 0x00088b1f, 0x00000000, 0x51fbff00, 0x03f0c0cf, 0x1894738a, 0x18357a18,
10649 0x326b3618, 0x31686830, 0x20318830, 0xaf8568e4, 0x9fa65371, 0x8181959b,
10650 0x81f98817, 0xd7881058, 0x6c303133, 0xff5e2260, 0xfb045111, 0xc303209e,
10651 0x197f2051, 0x6614ee90, 0x64055860, 0x2fe2031f, 0x1080be40, 0x100c8303,
10652 0x606115ff, 0xc1d20530, 0xc4036c40, 0x9bf145c7, 0x7c80827f, 0xbf2a08bc,
10653 0x279f8d1b, 0x25ff5f8c, 0x0ff2fc11, 0xc363c808, 0xc7e41632, 0x7a052247,
10654 0x29370207, 0xca8ff2a2, 0x543c3033, 0x51d06060, 0x919bf082, 0x6280ede4,
10655 0xec21e4c7, 0xb8c09229, 0x28b5ca07, 0x2a773762, 0x5004fe50, 0x34894bce,
10656 0x41d3dcf7, 0x8434afe5, 0x3ebc00d0, 0x03a8e414, 0x000003a8
10657};
10658
10659static const u32 usem_pram_data_e1h[] = {
10660 0x00088b1f, 0x00000000, 0x7de5ff00, 0xc5547c0b, 0x3d9cf8b9, 0x926eece7,
10661 0x2126cddd, 0x26c2bc21, 0xb80d4401, 0x41a00c40, 0x94520f37, 0xa2a1e1a8,
10662 0x24786c22, 0xf622ef21, 0xddbf1f62, 0x52c488f0, 0xd4c51f1b, 0xb051768b,
10663 0x40368bd1, 0x5c1758d0, 0x6d8b459e, 0xd5a045e8, 0x5e40137a, 0xa540b206,
10664 0xcffd45b6, 0xdd9ccdf7, 0x26364e73, 0xf6ffef6a, 0x9fdbfffe, 0xcccce61d,
10665 0x7cdf3337, 0x9be6bdf3, 0x91be6489, 0xf21387d8, 0x256efc25, 0x108951e4,
10666 0x9b4e1892, 0x9fc6933c, 0xedb10994, 0x3bea247e, 0x9e0c8499, 0xd146706b,
10667 0x64085fa2, 0x21064b4e, 0x758d65c9, 0x793dfa46, 0xe8bc7d91, 0x9819c308,
10668 0xbdbae47c, 0x720c8409, 0x8266f6d3, 0x7fe92fbf, 0xc637b73f, 0x79c87491,
10669 0xe131a285, 0xbc9a4afa, 0x877bfa48, 0x149bbeaa, 0x48dda675, 0xfd51fbfb,
10670 0x9085b720, 0x4678c31f, 0x40cba942, 0x78b8e8b2, 0xfd2e6f5d, 0xaf0e3a3f,
10671 0x295be8cd, 0x1c1a2210, 0x242444b1, 0xa0482326, 0x679fbe9d, 0x49d7ed3c,
10672 0xaa36a708, 0x49e74ac8, 0x0896b4c8, 0x808972f5, 0x76cd8878, 0x78e97b25,
10673 0xe22e7d57, 0x220d57bc, 0x27d69da4, 0x684ed392, 0x61c4953a, 0x232dc7bd,
10674 0xd57e4206, 0x07123fae, 0x199b1b85, 0xdc155e24, 0x0e210f06, 0xc7afc513,
10675 0x8f2ae98c, 0xc4c9a79d, 0xab210d71, 0x574c0e3d, 0xfa634679, 0xdb27d0d8,
10676 0xf9d00673, 0xe9d8320c, 0x63834848, 0x1191dda6, 0x2dc72786, 0x0938e730,
10677 0xae2926c9, 0x2f5a54c4, 0x4dc840d1, 0xf342dc84, 0x19082375, 0x5084ec49,
10678 0xbc933dfc, 0x019dca2c, 0x45e60779, 0x7cc37103, 0x2e033263, 0xc62de291,
10679 0x1c95cf69, 0x1bf8efe1, 0x785fdf80, 0xc1d6152c, 0xefcc1b7d, 0xf0ece219,
10680 0x46dd9e02, 0x7f5a26e7, 0x5e4ceca5, 0x468ae14a, 0xad832eda, 0x1e1094bb,
10681 0x1fc04cdf, 0xc9cc8fed, 0x30d7acd5, 0xb4224718, 0xeb05dc73, 0x75b27164,
10682 0x1574095a, 0xf2e61d61, 0x77655875, 0x38fd19d9, 0x11fa2449, 0xb1fa5aed,
10683 0x8fe96864, 0xba9fb17e, 0xbf69e79e, 0x3bed424d, 0xbd3ce953, 0x4dce0c4b,
10684 0xa160dbf4, 0x0af80051, 0x80c425bc, 0x41f92afd, 0x63a05265, 0x179e1ab4,
10685 0xf6f7e9cb, 0xefcf730e, 0x52e2062d, 0x2a5372e8, 0xcec4777c, 0x6626e3a0,
10686 0x6b4cec47, 0xe987f1cf, 0xc925d924, 0x4c0eef40, 0xac47041b, 0x477ce300,
10687 0x9c049b24, 0xf6a4727f, 0x08edd3ff, 0x377ae1f1, 0xda5475f0, 0x3d203c51,
10688 0x468b1f79, 0x3450883c, 0x17e70c39, 0xad17cf1c, 0x4a434f45, 0x5868e348,
10689 0x875f9a5f, 0x79a663f4, 0xb09be62b, 0x3fca1edc, 0xacc9e58b, 0xba5e5d3e,
10690 0x55e3bd18, 0x6eda1759, 0x4291c203, 0x38445e70, 0x9bbf5096, 0x94203f30,
10691 0x1fd625ff, 0xb7f7eaca, 0xceed251f, 0xf9c29e0d, 0x003b2ebf, 0xd6dbc29f,
10692 0x2e94adc0, 0x7c106e0e, 0xec0f9a26, 0x75fe418c, 0x9f0cfd7e, 0xd767e289,
10693 0xea0b9338, 0x8398df9f, 0xefedbcf9, 0x5e5a24db, 0x20945db5, 0xd679d86f,
10694 0x5bf141d6, 0xfc7f6a63, 0xb83dfa66, 0x602f245d, 0x9f71d377, 0x48b4e29d,
10695 0x92f9633e, 0xdaad9628, 0xc01e6bb0, 0x91336b2d, 0xeaa70a28, 0x6f3bd2cd,
10696 0x03d2f9a6, 0x552a8132, 0x838cea9b, 0x4f897e69, 0x8afc8168, 0x3f601f9d,
10697 0x0ca4b9dd, 0xe039f7f6, 0x752f945b, 0xee93dadb, 0x7dcbdfa6, 0x7ea00a5b,
10698 0x09c166f9, 0x7ebe5c4b, 0xbf0087d7, 0x211e55bc, 0xcd15f852, 0xdaa1c431,
10699 0x17db792f, 0xade309df, 0x9426477a, 0xabb291ed, 0x1891190f, 0xe02346a4,
10700 0x13d36ab5, 0xe79be046, 0x1fb0073c, 0x2f559f05, 0xbb687ed3, 0x2704d7ea,
10701 0xc0daad4c, 0x3785cdf8, 0x68bce6a3, 0x19d57981, 0x37fb4147, 0xbd42351f,
10702 0xebf15f52, 0xdf180e51, 0x8c016306, 0x6306fd73, 0x566f8a89, 0x3356ff34,
10703 0xe94d53ae, 0xbd19dd03, 0xce39e7af, 0x397c95b7, 0xdf484015, 0x4338cf92,
10704 0x339e87c5, 0x57fd21c4, 0x11c48b34, 0xdf781f81, 0x8760fbe7, 0xbe03f195,
10705 0xc0ed4b5e, 0x75ebc21a, 0x4fd7cec9, 0x88cd660a, 0xe71ee7c0, 0xcb91a3f2,
10706 0x7e41278f, 0x2e69f4d0, 0xf971d63f, 0xe271e4d1, 0x933d67f7, 0x71ef5d30,
10707 0x67bcfa61, 0x4f3ea61a, 0xc17bd611, 0x8dd30733, 0x7f7e371e, 0x698653c9,
10708 0xbf16a7b3, 0x8e59e2bf, 0x178f66e9, 0x59e6bfbf, 0xa78b6983, 0x9eadd311,
10709 0x3d5b4c26, 0xbaf7ac3e, 0x36d319a7, 0xff7e0b4f, 0x530da7b5, 0xe98027bf,
10710 0x9a5f584e, 0x98ed3c06, 0xc31cf6ee, 0x03a7af74, 0x9cf7eddb, 0xc72d74c1,
10711 0xe49b2dbb, 0x366f1448, 0x18394117, 0x91cae85f, 0x88be3e69, 0x7ae693e5,
10712 0x9f348c73, 0x8a79a6e4, 0x8195c1c7, 0x0fcd131c, 0x29e565ae, 0x66b9243f,
10713 0xb2f14f9a, 0xaeb5b4f2, 0x4f9a28dc, 0xa3e5646b, 0xa3737bd6, 0x8f947e69,
10714 0x39b75f95, 0xf3431b90, 0xf2b0b5d7, 0x67927eb1, 0x01b1f9a1, 0xd07f1f96,
10715 0xf9a56795, 0x9f2cedf1, 0xcf37a1f5, 0x1d59f346, 0x5d4dfdac, 0x9a58bc81,
10716 0xcac829bf, 0xf24ab96f, 0x2e4003ed, 0xb5cf980b, 0xd1c7e4e4, 0xe59dae7c,
10717 0x4b16860b, 0xb7f4088e, 0x0858ee53, 0xb0867c22, 0x7e5125d1, 0xf1d8d3b3,
10718 0x647d1510, 0x4baaf0a1, 0x2033fca2, 0xfe504593, 0x963af0b0, 0x19648c07,
10719 0xbc2a3f94, 0x65bbe58d, 0x5cff9607, 0x46f2c038, 0x87ff9607, 0x7bf30870,
10720 0xef961765, 0xf2c4fe10, 0xff961746, 0xf981385e, 0xcb1bb2fd, 0x962e853b,
10721 0xfcb1ba37, 0x5753e949, 0xdf2fed3e, 0xdc2e9ee0, 0x5ddb7208, 0x6a597286,
10722 0x597e0649, 0x04fff9cf, 0xaf2d0640, 0x3944641f, 0xacf3f3b8, 0xd3814517,
10723 0x97c800f6, 0x05fa04bc, 0x485b3385, 0xc2827d04, 0x7386fb11, 0x349317cb,
10724 0xa2f96e70, 0x20f3814c, 0x1fea89c2, 0xdc5f9d9c, 0x17cf1da4, 0x129c0ae5,
10725 0x7fb5979c, 0xcbe5baf3, 0xbe78ed6c, 0xd4e054ac, 0xfeb89c20, 0x4f20278d,
10726 0xc809c0d4, 0xe59c0aa5, 0x7fb12708, 0x271971e3, 0x8cb8e06b, 0x7538144b,
10727 0xff506708, 0x378c04e0, 0xac63c76b, 0x863ce050, 0xbfd61e78, 0x534cb979,
10728 0x5531e3b4, 0xc29e7029, 0x0ff6a4f1, 0x16ab6ece, 0x21adbb3f, 0x3847acfc,
10729 0xaf37fb23, 0x3f169b5c, 0x7e10b6b9, 0x6b9c2136, 0xb76707fb, 0xdd9f8b4d,
10730 0x5e7e10b6, 0xe98cfc43, 0x6372bcdf, 0x8dc9f8b5, 0x0de7e10d, 0xfeb8cf1c,
10731 0xa26f678d, 0x137b3f16, 0x2009f843, 0x37fb1b9c, 0x2d24fc9e, 0x4293f27e,
10732 0xe10779f8, 0x9c1fee4c, 0xfc5a49bd, 0xe10a4dec, 0x67080fe7, 0x95e6ff4a,
10733 0x9f8b503f, 0xfc2181fc, 0x7270807c, 0xa94ccddc, 0xbdac70a4, 0x4c3fd9c3,
10734 0xc3fd9f8b, 0x8939f842, 0x3852a670, 0x29c37de9, 0xa7e2d148, 0x9f842520,
10735 0xb6e708f3, 0x9fd9c1fe, 0xfecfc5a2, 0xae7e1094, 0xfa3b9c20, 0xe182af37,
10736 0x0c14fc5a, 0x55b9f867, 0x8672871a, 0xd8274eca, 0x9a19dfe7, 0xc13212e3,
10737 0xd179624e, 0xf7a024ee, 0x433e8a88, 0xad225dda, 0x371cd96f, 0xd6a231fe,
10738 0x068d726b, 0xaa56cf4a, 0x9af5a9e5, 0x1ad149d8, 0x15ce2a3d, 0x4c27c9af,
10739 0x9fa9ac1b, 0x29a69458, 0x3ae7381f, 0xf720f94d, 0x487e4d78, 0xfa9a4dd9,
10740 0x35736ac3, 0x6fcbe1f9, 0xf54fd4d7, 0xd3e4d4ce, 0xa9afdcd7, 0x8171b23f,
10741 0xa69afca6, 0xb5f94d72, 0xfc9aa5be, 0xd7dfcdf5, 0xb2d31fd4, 0x437e5342,
10742 0xf29a63db, 0x35278171, 0x9e0709f9, 0xb1bfd4d5, 0xf94d05fd, 0x68af63c4,
10743 0x6c7727ca, 0x3e6fe4d5, 0xfd4d6bf3, 0x9addc129, 0xbd9fadfc, 0x439fa9ab,
10744 0x6fab53fe, 0xd4d03f9b, 0xa13f6a9f, 0xf24eff29, 0x553d3a27, 0xccaf1f6b,
10745 0x32afcc21, 0x01afd988, 0xc6f311ab, 0xa76616c1, 0x271c4b58, 0x7718fd29,
10746 0xa00c742f, 0x033403f4, 0xe0ce5176, 0xe83a6bb2, 0xe4ddeff7, 0xbf4ec6be,
10747 0xbee8cf7f, 0xbf411ec1, 0x9026f4a1, 0x061d4864, 0x8fe5f548, 0x73de8cca,
10748 0xd51d5c87, 0x18d7db49, 0x68e2a382, 0xe73123fe, 0xf9c7a03e, 0x83ee0306,
10749 0x42d49168, 0x411368bd, 0xd4d1e9bb, 0xaabd17ac, 0x1866b0fd, 0x308433d5,
10750 0x3bb235dc, 0xc328f519, 0x9bd03af8, 0x79d187ea, 0xd164260d, 0xbcbb718a,
10751 0x61fb6823, 0x8fe0c925, 0x3f991930, 0x91bfd424, 0xfd819ff6, 0x6bfe812f,
10752 0x94dfe97a, 0xbfd34936, 0xd34ca539, 0xfb48d9bf, 0x90f213b7, 0xbfde26e1,
10753 0xcb36fd19, 0xfec64c56, 0xd865294d, 0x6a46a3ff, 0x8ffba977, 0x88fff50e,
10754 0x31ebf681, 0xc7b9bb30, 0xd26ed3fc, 0x5ca53fce, 0x9b237f3b, 0x2e434aff,
10755 0xe71a3fef, 0x0e456abf, 0x394a7f9b, 0xc189bf9b, 0x0b6ff50d, 0xfa01bfe1,
10756 0xfd2f69ff, 0xb5b3d29b, 0xa95e1ff3, 0xf589bf9d, 0x76e194ff, 0xfb05bfde,
10757 0x6dc57a7f, 0x2bc3fe6c, 0xc9a37fb1, 0x31fa04ed, 0xf5ae890e, 0x50c9fed1,
10758 0x040d256a, 0x40fda172, 0xfd1e3a3a, 0xd21a7708, 0x8bdf1c70, 0x2576f466,
10759 0xf21bd29a, 0xc3b32f33, 0x5273947d, 0xd39aaabb, 0x1ce6c57a, 0x2c3df023,
10760 0x3164224f, 0x36a2ea1f, 0x3c9be911, 0xa48df26d, 0x26d0bde3, 0xe8bf217a,
10761 0xe03e29e9, 0x322635af, 0x49da08bf, 0x3fdf0024, 0x1798d9fe, 0xa7d2f3d4,
10762 0x53e51b8b, 0xde45fc91, 0x96ba325c, 0x1002ef8e, 0x9c7f2a81, 0x186071da,
10763 0x1eed487f, 0x139fed42, 0x23efeb32, 0xbe41ef6a, 0x687bda83, 0xe63a9338,
10764 0xdebaf357, 0x5fc7411f, 0x0b9f9444, 0x6e2f79e7, 0x624f0a29, 0x5af8f7fb,
10765 0x31eb07c1, 0x450c797f, 0xc53c787e, 0xbe4d04de, 0x07eac4c6, 0x2f7c136f,
10766 0x0dc30808, 0xe1c199f8, 0xcd2f1811, 0x36b3b1cf, 0xb1de7747, 0x7dd1b05f,
10767 0x5d0866b4, 0x599c308b, 0xa40f25c4, 0x565eefed, 0xa76b832c, 0x8186105d,
10768 0xa166b09f, 0x3768024c, 0x0649137b, 0xde3a0e27, 0xfe0cedfb, 0x527c970c,
10769 0x239b47ed, 0x74455d9b, 0x458a733c, 0x69acff1c, 0xed3ff2da, 0xc619718c,
10770 0x53cd74d2, 0x45ddcfd8, 0xe77bf2da, 0xb9f7f368, 0x572a79b5, 0x0fab9065,
10771 0x53bfe994, 0xdf8124b4, 0x001bf431, 0xe3907ce3, 0xd95ac1e1, 0x6a5759ab,
10772 0x72951b76, 0x09b88470, 0x8bdb0bce, 0x5fcfeb3d, 0x7b17cdae, 0x6b85f9b5,
10773 0xdd39f074, 0x7febe29c, 0xa683e81c, 0x283e81a7, 0xfa724f3e, 0x2d55f308,
10774 0x9a13dc7d, 0x650fa306, 0xb624a71e, 0x33d6a704, 0x18dc58fa, 0x8a1e9913,
10775 0x52e0f443, 0x0f4297d3, 0xfc3d38f3, 0x6943d399, 0xeeae9693, 0xc9d5be23,
10776 0x6b03fdb4, 0x1d3ae177, 0x3d198a11, 0x87a140fc, 0xb83d0d0e, 0xd7e83d39,
10777 0x87a71e6f, 0x7a308f79, 0x0767afd0, 0xa68e87a7, 0xeb4932cb, 0x1d74aeb9,
10778 0x0eba7934, 0xa3b775ba, 0x47ae8a1f, 0x10587a44, 0x389d379a, 0x65e42fcd,
10779 0xd38bd63d, 0x01a79603, 0x09e209da, 0xacf7a7db, 0x2684f94f, 0x7914da5f,
10780 0x36da6bfd, 0xfaa93dac, 0xf2f2d55e, 0xbb7fb55a, 0x268b79a2, 0xa6f7c4bf,
10781 0xd3697ea6, 0x717e4d2e, 0xfa9a3be3, 0xd21cd70b, 0x7fbd8be4, 0xbf9fd4d4,
10782 0xfe5353bc, 0x4d59ed60, 0x176503f9, 0xdcfbf935, 0xbfd4d37f, 0x13f08e77,
10783 0xa2eefe75, 0xeba89fa8, 0xa7169acf, 0x0d70cfc9, 0xec37d4d2, 0xa02ef6bc,
10784 0x8bef83c7, 0x4f8ff404, 0xffd1a79d, 0x7653a9f9, 0x1e939d42, 0x5383ee07,
10785 0x9e98d19e, 0x9f7138f1, 0xc24cf39c, 0x1edb42f4, 0x2a15c80b, 0xc8e04b47,
10786 0x96e574a6, 0x20d935ba, 0xdfca09d7, 0xd46f958a, 0xb2128779, 0x8a639414,
10787 0x2326c2ef, 0x44204c09, 0xc7c4e100, 0xe5551415, 0x37947d1d, 0xd0914151,
10788 0x23b0bcb3, 0x279af7f2, 0x23db878b, 0xf7847f9c, 0x7a021935, 0xe72f7752,
10789 0x29029524, 0x64277f52, 0xad81f205, 0x34a94f5c, 0xb9517e32, 0xb12e5075,
10790 0xaa303e41, 0x6bfaabf6, 0x206c9ba1, 0x66ba49d0, 0x5d36973f, 0x04f7e1af,
10791 0x4089cfbc, 0xdf34136f, 0xd66f9a2b, 0x25daebb4, 0x81abb8e2, 0xfdb95097,
10792 0x527a292a, 0xd8153e04, 0x0c6b3293, 0x14f5d38c, 0x5112dbe6, 0x34f2ec8f,
10793 0xc7f385af, 0x4c169e73, 0x30da78cf, 0xac09e53d, 0x93c07385, 0x1e98039e,
10794 0xda63b4f7, 0xe98639e1, 0x4c0e9e47, 0xc19cf43f, 0x209e4ff4, 0x9f3cc7a6,
10795 0x43c47a61, 0x0e70027e, 0xfe98cc7b, 0xb4c763c1, 0xe98c93dd, 0xfb0f8f05,
10796 0x5f5df651, 0xcb867774, 0x7f4073ed, 0xbb6ce811, 0xcd6eac78, 0xbd9d30d0,
10797 0xa423f2b9, 0x85cf0533, 0x0f4e264d, 0x087a1a49, 0x2377ed80, 0xe51f4bd0,
10798 0xc3a7324d, 0x2e47dade, 0xbfe179af, 0x7caede87, 0xd30b7a4b, 0x3d1d10d3,
10799 0x4f45f7a5, 0xe9e9aa1f, 0xe4cec18a, 0x1fa7a720, 0x7d6b73f3, 0x3b1251bf,
10800 0x77e90ca7, 0x800cdbae, 0xdcfca5aa, 0x98699084, 0x5efbc4bf, 0xa3b5c149,
10801 0x0d1be81e, 0xe8d2eb72, 0x73828fbf, 0xe8c74b87, 0x3ef6a7e2, 0xf49d3d3f,
10802 0xda17778e, 0xba3e2543, 0xc61109e8, 0x1af0cd1b, 0xc8d32065, 0x461a4278,
10803 0x905ce4be, 0xc4897981, 0x739f7b43, 0x3af38446, 0xc06b7542, 0x5d785f6f,
10804 0x1632bd69, 0xf67a9de0, 0x5e90591f, 0xf475fae1, 0x7cf5111e, 0x09d17812,
10805 0x25c90df8, 0xfc193393, 0x4691c1f3, 0x6409ea3b, 0xde7f16ba, 0x6bf835db,
10806 0xcfce5548, 0x7f11931b, 0x1a8cae23, 0xf5fc0fd4, 0xc2fbdfc5, 0xf79802e7,
10807 0xfb3e037f, 0xf17d8fe2, 0xbc72e245, 0xdfe746d6, 0xf8cc73bd, 0x07c01cc7,
10808 0xcadf1abf, 0x3c7e9c79, 0xb5f492f9, 0x493bb8e8, 0x14f6e3a1, 0x24d85b88,
10809 0xa5fe11da, 0x61626bd6, 0xfa70425d, 0xede14f58, 0xbd80a73f, 0x0b553e7f,
10810 0xef074b2f, 0x6d1781d2, 0x4d2d7760, 0x3270d85e, 0x69283ac2, 0x835d4b55,
10811 0xb687ad45, 0x1a97f369, 0x382d6985, 0xecec472e, 0x6a272031, 0x5edf181b,
10812 0x6702a98e, 0xf6097269, 0x3d39ae73, 0x3e7bd996, 0xc7360fc6, 0xe738bf21,
10813 0xfffac329, 0x06f4f1ec, 0x210f1947, 0x1984e4ad, 0x4b2d31f8, 0xaf7ebdef,
10814 0xc5fd2cf4, 0x7edde788, 0x89e80af9, 0x97dffa66, 0x09107760, 0x9adc0af3,
10815 0xba6bd116, 0xd66fbe01, 0x39db47f4, 0x2fe23394, 0xdf6abed3, 0x4294e448,
10816 0xd45e54b7, 0xe780bd83, 0xd41a4b9b, 0xcb55597a, 0x9af93577, 0xd41a47b6,
10817 0xfc055c7a, 0x525ff283, 0x3740482b, 0xba8c9c95, 0x811acb25, 0x8218af8e,
10818 0x088f804f, 0xb9955eac, 0x9fa6e8c3, 0x75b2b7ce, 0xe77c6deb, 0x8854e63c,
10819 0x3733283b, 0x597239e2, 0x20f9b5cb, 0xaeb7ce67, 0x5bf9024c, 0x5efa5e21,
10820 0xbff68451, 0x5f2e0494, 0xcf56a0e4, 0x2841f4e7, 0xe9bcd55c, 0x17c212cf,
10821 0x981977cd, 0xb70f465f, 0xbe91cb8d, 0xf9bd53f0, 0x8ecdc150, 0x6eaa789e,
10822 0x237468bb, 0xcbffa45f, 0xc149e30a, 0xd454b15f, 0x9771d126, 0xffa27737,
10823 0x1dec8ce2, 0xe0af83f5, 0x67e73d97, 0xa3153e49, 0xb497979a, 0x260b3f43,
10824 0xe3888ef1, 0x1f280fde, 0x995bfb3f, 0x57221f00, 0x742cad69, 0xc7bb70cd,
10825 0x61590c40, 0x6b4167bb, 0xfbe02145, 0xd1d3ebec, 0x8a445bee, 0xa40eb86c,
10826 0x9cec0b31, 0x7180c4f3, 0x1fc9e755, 0xeb54136c, 0xe464b1f0, 0x305ca678,
10827 0x1034bb89, 0xd8107bbe, 0xf539a65f, 0xf858e2ed, 0x9076292e, 0x15ca25f0,
10828 0x17f180b7, 0x2f77d873, 0xfd01d731, 0x634a7b52, 0x4a7b51af, 0x94f6a793,
10829 0x66425f26, 0x453c4126, 0xf132d3c9, 0x4d278809, 0x8ec941f9, 0xb5252be3,
10830 0xfd1fa0f5, 0x16e1fb9c, 0x843489d8, 0x37aa87ca, 0xa62acb9e, 0x9892e9f3,
10831 0x0f894bff, 0xc5654258, 0x5e5e5a20, 0x2cba33e6, 0xa277e73d, 0x943dc275,
10832 0x163c03f3, 0xd1bf7007, 0x886be2c7, 0xaae2ca43, 0xf3ef5a4f, 0xba2ad81f,
10833 0x8f506ca2, 0x9bc6577e, 0xafe7f5fa, 0x4f212f9f, 0x9bca3ce2, 0x561c6067,
10834 0x3e07788f, 0x7059b91f, 0x27ec22f9, 0xf1341651, 0xc332092e, 0x1ad7e29f,
10835 0x0f5fcbae, 0x6bdf9579, 0x1bfcaea2, 0x440197f3, 0x258a5fc3, 0x913970f7,
10836 0xbfc013f1, 0x7f710520, 0xc9f8637d, 0x2f5fe03d, 0x844ff8df, 0xefbb543f,
10837 0xff89fc29, 0xe88ff1d4, 0x48bcfe31, 0x78deabf0, 0x778875f5, 0xcfd5ff2c,
10838 0xb7ee846c, 0x926352b3, 0xe57bae93, 0x1736d5a6, 0x6bc91df0, 0xd6717d83,
10839 0x448b4e27, 0x7997df0f, 0x59711fdc, 0xc2bbf004, 0x73fc293f, 0x4ef8fcaf,
10840 0x6caea3b0, 0x4fe8ed92, 0x4c05366d, 0x5bab9e94, 0xb1921497, 0xf964ef98,
10841 0xfd022f47, 0xc7c9b4d7, 0xfe5a74d5, 0x41259fcb, 0x94a5107c, 0x48648621,
10842 0x549f6803, 0x00b8fc6f, 0x121a8df4, 0x6faafdc4, 0x167ffd07, 0xd8b0f28f,
10843 0x1cb3db18, 0xd049341d, 0x5a6afd9e, 0xb4517c7f, 0x69db7a41, 0xb2d46fe0,
10844 0xbe90bf44, 0x3bb7195d, 0x00eb642a, 0xc913abe4, 0x0aabe044, 0xd98f885e,
10845 0x7e5f2b1d, 0x1d276c66, 0xdfc6d757, 0xbe1504da, 0x52e97b14, 0xfc5fc2cb,
10846 0x1f3bd1da, 0xa3f740bf, 0xe455bf5a, 0xdb8da394, 0x56967e4b, 0xc41b01ca,
10847 0x906e5573, 0xb9fa5e9d, 0x5f17d5f2, 0xd9fc167a, 0x4739347f, 0xaf15f852,
10848 0x13723bee, 0x916c57cd, 0x69b21407, 0xf0a48458, 0xffd0d4fa, 0xaf0f8f96,
10849 0x7db6f947, 0xf618c746, 0xe1f187fd, 0xb2d8a975, 0xf4c648cb, 0xcb5e47c4,
10850 0x2587632e, 0x74b4fac2, 0xb7fe8016, 0x1abfe5f2, 0xdd9def81, 0xa9819029,
10851 0x61b9f011, 0x8087ea1f, 0xbe4f5c27, 0xd3f5a15e, 0xeba1afd5, 0xbf467202,
10852 0x857afa5e, 0x5c00bf9c, 0xf4a1b388, 0x21afdafd, 0x264fee0e, 0xeca1e027,
10853 0x306c87b5, 0x2d52d39f, 0x56e7f3a3, 0x2bbf0127, 0x7649bd93, 0xb2f7d94c,
10854 0xfa461fe7, 0x70f43d2b, 0xba57f312, 0x76501906, 0x3cc1077a, 0x1bbfaf17,
10855 0xdc4259e7, 0xcf658748, 0x9a3e4589, 0x69912a7e, 0x93ec225b, 0x9c9f7c4b,
10856 0x2e2e817e, 0x4569e79d, 0xe441fc2e, 0xe8bbe172, 0xcf987d0f, 0x98906a85,
10857 0xd6ccd4ff, 0xd06c80eb, 0xfd10d1c8, 0xe5147c6e, 0xae61b9c7, 0x56ee7081,
10858 0x28179613, 0x5343c447, 0x6275b207, 0x51db0772, 0xdf0793b9, 0xecbb7ea1,
10859 0x69ab1a8a, 0xe9467287, 0x9fef197f, 0xf41a3b8e, 0x9149d3b7, 0x46e191ed,
10860 0x3d500f85, 0xaa674543, 0xfff6cefd, 0xdfb606c6, 0x9beffd95, 0xffca0d31,
10861 0x23ed9872, 0x97720768, 0x10302b8e, 0x16cd77cb, 0x48983f90, 0xdf3ed220,
10862 0xae7df328, 0x0bd3d72d, 0xc424bf1d, 0xfa06e8aa, 0x4075c789, 0x34f25f79,
10863 0xa3e2af6d, 0xadafd035, 0x1f655c27, 0x707e7297, 0xf5c1f81e, 0xd6407e61,
10864 0x5e2bf627, 0xbdf652b4, 0x5fec2cf4, 0x0ebd5fba, 0x1172bfd8, 0xcd93ffcc,
10865 0x4fdc8e7b, 0x2d27edf7, 0xf2d5beca, 0x2dbefd55, 0xc630fadb, 0xedf7eb9f,
10866 0x496b4327, 0xbf4b7dc4, 0x43b7dc47, 0xf847fe3b, 0x24c782aa, 0x2aaf96a3,
10867 0x7c37b27c, 0x16e4f9ea, 0xd57881d9, 0x3bfa49f3, 0xd27ab24c, 0x0a8742a3,
10868 0x47ff95fd, 0x47e070d5, 0xe8553a21, 0x0aa74430, 0xade7ea1d, 0xfcbea3c5,
10869 0x522df023, 0x537a297a, 0x4a95f3c6, 0xa6038b3f, 0xc90ff6ed, 0x50b97c44,
10870 0xfdc691cc, 0xf3a80643, 0x45be5d3e, 0xcba5df57, 0xbbeae917, 0x4d5af975,
10871 0x3db6cafd, 0x10748246, 0x9713d4d0, 0x31393bff, 0xfadd1221, 0xf5a1bf98,
10872 0x39ee11a2, 0xd88258d4, 0xbc415e5e, 0xdc191f10, 0x51b9e221, 0x3d71c537,
10873 0xa73637f8, 0x8f94bcfa, 0x7e628eac, 0xd07b6e85, 0xd5d34f16, 0x4c1f2c71,
10874 0x1f03d634, 0xa307be54, 0xbbb1df98, 0x538b6828, 0x7e9d5bd9, 0x8778f911,
10875 0x0dbdf22f, 0xdd70692a, 0xd7b97a3b, 0x758f9ca1, 0x62c6db47, 0x3e29d17f,
10876 0xa2a9c7a0, 0xf8396525, 0x27451aa1, 0xea8bece8, 0x79c1b5ee, 0xfd3fb755,
10877 0xfbf439ae, 0x164477e2, 0x4975e38e, 0xd0765483, 0x975de219, 0xf05c402d,
10878 0x859fa45a, 0x2d17667e, 0x3f791b5a, 0x2576f394, 0xe0466596, 0x390ed4bb,
10879 0x51ef3eae, 0xd7ad94e0, 0xe74ff77d, 0xed11a6fb, 0xda8df2ff, 0x9fb73772,
10880 0xfce4647f, 0xc7191c67, 0xbfe657ed, 0xaa7b7ce1, 0x1cd77198, 0x07dd3eba,
10881 0xf9a26244, 0xd7117e4b, 0xc166d2e7, 0xe237fe07, 0x57fdc44d, 0xf546824d,
10882 0xd82e887d, 0xcef4d75f, 0xffb6bac7, 0x4007eb39, 0x307faf47, 0xda69dff6,
10883 0x471ffaf5, 0x37f905bd, 0x407ca68e, 0xdbcfd67a, 0x02f18519, 0x48ad3bdd,
10884 0xde3bddff, 0xe401f94b, 0x613934df, 0xff3bdd9c, 0xa9e8163a, 0x0ca9857b,
10885 0x30f760f8, 0xb95dbfe6, 0x3b63afe3, 0xc2aefe50, 0x1a366c75, 0xffc99f99,
10886 0xdee08f8f, 0x9d3f25c2, 0x3c17e815, 0xd7e6beae, 0xf0823e51, 0xbea59aff,
10887 0xe76df40f, 0x43e3cd53, 0xce64adba, 0x1c5f1856, 0x79a87f8b, 0x758bf26b,
10888 0xd6aaffb4, 0xb485c65d, 0xcfedef3c, 0xfd1c62c7, 0x5d37a656, 0x879e3b90,
10889 0xc66d87f8, 0x2994acef, 0x26c02f9e, 0x5df646a3, 0xb07935a6, 0xe5e27a8f,
10890 0xf5a7f473, 0x1aef1f17, 0xaffd7d99, 0xc5c10f8f, 0x67d59ff8, 0x7fde6016,
10891 0xf403e8fb, 0x2e909a83, 0xd27ef995, 0x4cfa8752, 0xfb3ef35f, 0xfa0e86bf,
10892 0xd0216f3b, 0x4d9b799f, 0xfdebdaff, 0xeb81d1b8, 0x3d07dfa2, 0xf7c77ce9,
10893 0xd5aaff30, 0x27ede389, 0xfd368fbd, 0x5beeb63f, 0xfadbbae9, 0xfe77f79e,
10894 0xfbdde7c5, 0x8f33bfba, 0xce1dbbaf, 0xfede6b53, 0x75f7c71c, 0xffe95cf9,
10895 0xf457ba52, 0xad4376fd, 0x6f8e933d, 0x82b4690e, 0xe25f7162, 0x03a64b25,
10896 0x0f2f70a2, 0x383bf8c0, 0x57608d5f, 0xbf989935, 0x581824cd, 0x82dddabc,
10897 0x3b4447e2, 0x5fae4eeb, 0x0cb439dc, 0x5d3b90f5, 0x827d413f, 0x39edb548,
10898 0xee7b7eb4, 0x6ac62742, 0xdcc7f192, 0x853d9f90, 0xe6f6b5e7, 0x12e204ef,
10899 0x677f7ea8, 0xa003f4ee, 0x12e5dee7, 0x29a60f51, 0xa7efbfea, 0x93efb014,
10900 0x7dd0f6b4, 0xdefe6d6e, 0xddfcda39, 0x843dde1c, 0x229eff8d, 0x587e07c1,
10901 0x8953ce53, 0x2d3597e0, 0x0a908996, 0xabb54671, 0xbbb8eec1, 0x197edb48,
10902 0x7f2a6728, 0xe3c537e3, 0x5c78436f, 0x3921788a, 0xed03de22, 0xdc7c8f13,
10903 0xf9c7b3ed, 0x489ace20, 0x7bc7864e, 0x37e89caa, 0xccb8f6e7, 0x3596cbdb,
10904 0x659fb0ed, 0xd8ae1d9d, 0x9be1bdd3, 0xe11cfb70, 0x2ff185a4, 0xcfb444bb,
10905 0xae7d9d65, 0x5dd7cbac, 0xbf1d650f, 0x073cbaed, 0x786372eb, 0x5c5a865d,
10906 0xccabf604, 0x8b7c87ed, 0x1687e593, 0xe8ae7611, 0x00d2fac3, 0x8466f117,
10907 0x9897d1e3, 0x9ce02b8b, 0x405a3ccc, 0x6b5dc87f, 0xe60f9445, 0x55c7010c,
10908 0xf8c64934, 0x450d8fe3, 0x85deb059, 0x7f562613, 0x09c30d9f, 0xf1c25cf8,
10909 0x516a425e, 0xbf57257f, 0x0b3b32fc, 0xea0825ce, 0x845c4bbf, 0xb8ed41dc,
10910 0x10216c92, 0x126af10d, 0x078ec6f1, 0x8e40b93f, 0xdae4fc6b, 0x496efc3c,
10911 0xabe9c30a, 0xe5fc6f7e, 0x17fe9d9f, 0x29c767e5, 0x3a427491, 0xd497bb12,
10912 0x3f7cf776, 0xa54d63c3, 0xba434be0, 0xfbeac80b, 0xb66605d3, 0x87ebfe0f,
10913 0xe64f9013, 0x2c4c74fc, 0xe26407f3, 0x6e1ac47d, 0x3af25c37, 0x760fc162,
10914 0xcfce9fc9, 0x6a6cf373, 0x87a4aabe, 0x9ffe1db8, 0xd3489710, 0x51a17cee,
10915 0x048b3b04, 0xcdebffd1, 0xc57bc28f, 0xcca376fa, 0x6bafbe06, 0x3f002fd1,
10916 0xf2afee11, 0xa6d29479, 0x75aaf1b1, 0x59c77b5b, 0x75cf6c69, 0xd571df80,
10917 0xc5b7ddf9, 0x80fdd82f, 0x1d5143d7, 0xe6114505, 0xafe3893b, 0xf0dff770,
10918 0x7f4ceafe, 0x99780caa, 0xce6a2f99, 0xee669df9, 0x264098cf, 0x770ab8c0,
10919 0x0c9b66df, 0x744072eb, 0x1ad57dc2, 0x3ba345ff, 0x1eb1f9c2, 0xfc1f009f,
10920 0x676427f0, 0xc4f3e009, 0xd808a24f, 0x73f1efd5, 0xcfb80cc9, 0x1eae8191,
10921 0x731df817, 0xb84fcccc, 0x74c76cce, 0x9c8e6156, 0x68cdfb48, 0x50838fb5,
10922 0xfebcc1b5, 0xcb03b33a, 0x4a76f087, 0xac95c1bd, 0x5ed1a75e, 0xbffe691d,
10923 0x79f8128b, 0x937bf399, 0x75bd7f84, 0x35a9f9cb, 0x41fa0b90, 0xd167e2be,
10924 0xfdc135d3, 0xe09a6971, 0xf60df903, 0x050be630, 0x53de1fd4, 0x64cfafee,
10925 0x7ba15672, 0xcdab9e3d, 0x1e02f7da, 0x887f78e7, 0x678287d3, 0xf1fabf05,
10926 0xbf29f52a, 0x9fed55ba, 0xdc6dabba, 0x54dfa06b, 0x81bb05fb, 0x3a96aa82,
10927 0x6b0fb08c, 0xe1909eda, 0x073ee67c, 0xa2a44b83, 0x83f8eab1, 0x0f166675,
10928 0xcdfc67b2, 0x2e4e80f3, 0x2c8135af, 0x1745ae24, 0xdf87c06d, 0x0f7f3833,
10929 0xdfde6c71, 0x57d36489, 0x3c0fabf0, 0x597cf2f6, 0xe715370d, 0x4732ab33,
10930 0x03da7706, 0x81e4bb95, 0x675a7a2a, 0xe572c78e, 0x074ae0fb, 0xfb420fbe,
10931 0x1f7871c3, 0x4fb81137, 0x8ed2d192, 0xa81f6cf7, 0x5874638d, 0x88cbb2d6,
10932 0x7bcd54f9, 0xfa3f4a22, 0x50bb34fd, 0x30bcaf1b, 0xe02863af, 0x5814d0a5,
10933 0xa7408ce6, 0x7394a393, 0x2729afca, 0xc76e945c, 0x27247ffe, 0xa2722996,
10934 0x95e3e303, 0xe7df02f6, 0x3031392a, 0x5a589c92, 0xeb0818e7, 0xfa4774b0,
10935 0x4b24d840, 0x149a99df, 0xefbc4e49, 0x47cce761, 0xeef67df9, 0xdc4e54d9,
10936 0xb31392a0, 0xf44e90a3, 0xf6513eed, 0x42725f49, 0xcbffb759, 0x907de6fc,
10937 0xf7f61113, 0x71393a17, 0xe518bf8f, 0x45b33dc4, 0x4facbdcd, 0x391394fb,
10938 0x5e61f749, 0xa044c676, 0x7db9f79f, 0x0bdf9473, 0x5e407e80, 0x11d94664,
10939 0xd1b97a6f, 0x53ff5f1b, 0xfffaf97f, 0xbe159e10, 0x3fda94be, 0x7448d4a6,
10940 0x979e9048, 0xbaf947de, 0xf8c8f400, 0xb907d2fa, 0x67c7539f, 0x66cf808b,
10941 0x6b2cf9aa, 0x7266ed5f, 0xf52da6a1, 0xfcb4b999, 0x09d946fe, 0x30fef2a2,
10942 0xf352cddf, 0x5ea8ccdd, 0xe3196ef8, 0x13fd97bb, 0x6dea7f50, 0xfce67f7e,
10943 0x11b3f296, 0x31f408ce, 0xe68c6e67, 0x7189dede, 0x06d8c9bf, 0x113de5fb,
10944 0xe63f79cf, 0x71c1c07a, 0x7d04c9bf, 0x9e3e49fa, 0x2f3d7c79, 0x3e794878,
10945 0x22de5fc5, 0x6d574fa6, 0xd57f1116, 0x57ff6cad, 0x073e0b37, 0xff8c17cd,
10946 0x56d79e1b, 0xb5e760ec, 0x39850674, 0x78aff5aa, 0xce1ea3af, 0x08362a09,
10947 0xf70cde78, 0xa59f001e, 0xce259f1c, 0x29573c0a, 0xc1fad26d, 0x2f6da21b,
10948 0x1e101b90, 0x78abc3fa, 0x105342fd, 0x7f0a1dcf, 0x20373829, 0xabb6d49f,
10949 0x59fb711a, 0x9a2a4fb0, 0x0d9ddf75, 0x3704ae78, 0xadaf41d4, 0x7b96d16a,
10950 0x8b17bcf8, 0x146d8c81, 0xb33df93e, 0xf778f4f3, 0xf653f1e8, 0x8873f12d,
10951 0x9ff327e2, 0xfe259f87, 0xf05e785d, 0xc7a2f175, 0x3f145d47, 0x324f181f,
10952 0x6c7e3f61, 0xf17f2170, 0xbbe22bbe, 0x189e8b4e, 0xe50f79a9, 0xef2f1ca7,
10953 0x83f5dc19, 0x80b55ea0, 0x6fd74af5, 0xf34497d9, 0x38c85b73, 0x6d286638,
10954 0x90e3cad2, 0xa0756ffc, 0xbb5b9f7c, 0xdab88045, 0x60befcc5, 0x7c09ef99,
10955 0xe5c1e63f, 0xfad3de54, 0xdc9bc70b, 0x287e5e70, 0x53fc882a, 0x409ddfa1,
10956 0xfa6f94bf, 0x0c4e38f9, 0x9ca3e60e, 0xb8ec136a, 0x4c51032f, 0x8275d16e,
10957 0x4cf66d77, 0x5f016bfe, 0x6a5fe617, 0x4358eb63, 0x75f60dd7, 0x5be79f81,
10958 0x80f83e98, 0xe73b22ff, 0xd992eff4, 0x490238fb, 0x44e77e40, 0x8f915cfb,
10959 0x939aee70, 0x1ddf5aa4, 0x37fe8c9d, 0xe0fc4e09, 0x36fbffa3, 0xbacbdbeb,
10960 0x7f4cfa2a, 0xd3c157d7, 0x1f3add4e, 0x9c2f6a8a, 0x8272e780, 0xf20bdf13,
10961 0xd179e1c7, 0xfef646c9, 0x1fae41cd, 0xd805f7e9, 0x78f7ea1f, 0x21c0c066,
10962 0x145a7a2e, 0xbf6295c6, 0x533f4c69, 0x3bfd29f3, 0x6e375f48, 0xa3b486a9,
10963 0x7f8e165e, 0x066edf74, 0xd04d3fb9, 0x19d149c4, 0x27ffbee1, 0xbea397c0,
10964 0x36493e02, 0xc8797ca3, 0x19eebece, 0x1ef02466, 0x3235e5da, 0x06bdd1d2,
10965 0xe06c91c7, 0x04c98f2f, 0x83e5c7f6, 0x3b9d1e37, 0xa445ca00, 0x26f7e28f,
10966 0xa56b8354, 0x91aac598, 0x5c9847e2, 0xfffbc13a, 0xaed79513, 0xa097786b,
10967 0x7ce27b07, 0xb674bf70, 0x0754d773, 0x0f325bf8, 0xcf7386ad, 0x23f67959,
10968 0x1b1d6047, 0xc74fbbd8, 0x9da1e4d7, 0x0577d0f6, 0xe8c767dc, 0xbb9c017a,
10969 0x391ea767, 0xe0f7c742, 0xb73c449a, 0xbc4aeb9c, 0xe731ce07, 0x0e9d141e,
10970 0x5de16f5a, 0x7f9c0b56, 0x122d1f4e, 0x0f2f0ab7, 0xeff47692, 0xeefdadcc,
10971 0xca4fb0dd, 0xf7843ca8, 0x87fcca9c, 0xfc840ea6, 0xd7db017a, 0xb846dd78,
10972 0x74ded9e7, 0xfb4998d1, 0x00f5a12f, 0x59eb35dd, 0x028d9abd, 0xe25817be,
10973 0x64f9027f, 0x1f0146c9, 0xfaa769c4, 0xf5c199af, 0xbed12981, 0xf9a7b69e,
10974 0x700f6852, 0x03ddc637, 0x743593e7, 0x527ed89c, 0x97539e1d, 0x98b476d0,
10975 0x2efc6fb4, 0x5eb25bc2, 0xb0af7020, 0xe3ea526c, 0x41de0093, 0x47e509d9,
10976 0x08dcfd77, 0xfb479ee3, 0x2fe1441b, 0x42a63b14, 0xc103f27d, 0x152eef8e,
10977 0xbafb8b5e, 0x623bef9b, 0x14e2cd1f, 0xefdca204, 0x2af1d493, 0xb869d125,
10978 0xd7964a9f, 0x3abcc3d5, 0x06a989bc, 0x468ba7a4, 0x2927e390, 0x7f54ddbe,
10979 0x7164613d, 0x27bc7b30, 0xfe2a1d8c, 0x1d3a32b9, 0xcb6a2fdb, 0x98b33e41,
10980 0x853c6114, 0x23e98ebb, 0x7ca3ab9d, 0x94eb57e0, 0x7df029ed, 0x7e136acf,
10981 0x932af0bf, 0x7586173b, 0xf4fb7fa0, 0xbdc0997a, 0xd3eb95c7, 0x9e3ac1d7,
10982 0xe13b2cde, 0x8e7c40dc, 0xbe9411c5, 0x7b64fcca, 0xa7b833d6, 0xcb7f199b,
10983 0x02eeee7b, 0x94a5dbe0, 0x7e70994f, 0xe2563e5a, 0xf53e4728, 0x4be3145c,
10984 0xe7a57e7a, 0x1b8d6553, 0x65a1cb22, 0xd0e59105, 0x37ee7ad0, 0x6b9f2c8d,
10985 0xbbe98588, 0xf078c9e3, 0x0d571663, 0xf404d79b, 0x70bb20fc, 0xf3781ed0,
10986 0xdc819fd3, 0x3be2b4ad, 0x7d92d565, 0x83e8c09d, 0xeb9fff00, 0xec29f2df,
10987 0x51b9b287, 0x29d90ef8, 0x47d80f58, 0x1cf0136b, 0x8c57c4bb, 0x79e25778,
10988 0xf4b49b4b, 0xef21f8ae, 0xa5c48b73, 0x31655f96, 0x77aaa5c4, 0x6e9447f4,
10989 0xdbf33f69, 0xcab01f04, 0xdcea3fa3, 0xe62670ff, 0xe5ae38ed, 0x6b583f5c,
10990 0xfa3eba45, 0x40d5c5c8, 0x287ef3b7, 0x89dbd010, 0xf20f5dd7, 0x7049bab0,
10991 0xf4b89f80, 0x297dac87, 0x3ee30f6d, 0x5f4673fa, 0xb01dce94, 0x3fd7aa0f,
10992 0x6feb1fb1, 0xff001c14, 0xd46286e8, 0x22bcca27, 0x9d8df2c1, 0x79504768,
10993 0x7b68f185, 0xec1262bc, 0x2655ea83, 0x1562b83b, 0xb3e8527a, 0x40a7bf93,
10994 0xb3b1cecc, 0xb4673b68, 0x9eb2f903, 0x4239c52e, 0xfd029e48, 0xbd1978d4,
10995 0x3b2abe75, 0x4df48b61, 0xbd1eec9f, 0xd0227f42, 0xfe98665f, 0x33cfacf6,
10996 0xf69e3d02, 0x91671809, 0xf40bf407, 0x9fe2b2f9, 0x1eb51621, 0xea7d17d5,
10997 0xfd07b0e9, 0xe958cbc1, 0xe854fa61, 0xc7874f51, 0x8c0f7225, 0x51d5a1fb,
10998 0xfabc8f38, 0xce59ef37, 0xcf9e19f6, 0x923fd5e5, 0x44bafb04, 0x0a407162,
10999 0x1624ab5e, 0x5c63d637, 0x0719d74f, 0xba7c67f5, 0x0e8acc71, 0x20f1edc9,
11000 0x4a3ea9b7, 0xdf9fb402, 0xe3117e6c, 0xd2bfcf2b, 0x37ea2779, 0x003a516f,
11001 0x92b66ffc, 0x3e21da00, 0xade547e4, 0x1369c622, 0x4b359029, 0x712bbf65,
11002 0xb2bf1531, 0xb7cbbe22, 0xb4857c9a, 0x27ebf97d, 0xc25c62c6, 0x7b7fa60a,
11003 0x39d8115f, 0x2c63b788, 0x972a3bdc, 0x5e8e7c58, 0x345df82f, 0xdebbc3b3,
11004 0x7a03998c, 0xdeccd09b, 0xb96f2c17, 0xfca93657, 0x65a2fbbb, 0x939e1ea5,
11005 0xc33ae979, 0x3e300afb, 0x4a76fbf5, 0xcbd74e5c, 0xdbcafe8c, 0xcae7d464,
11006 0x805cb79b, 0x63f2cd78, 0x6b77b426, 0xc11a2f9a, 0xd5fbcd9e, 0xc41decab,
11007 0xa7135136, 0xae3e23d7, 0x20980c59, 0x0ab5abae, 0xbe6871cf, 0x3c2df313,
11008 0xc66bed1e, 0x6afc556f, 0x8a5eebc7, 0xbf6d8ac2, 0x857be1b4, 0x786c9bed,
11009 0xabf9aa5f, 0xc47b55e3, 0xf034b5c3, 0x4e3bb878, 0x918fe413, 0xc1cee1e3,
11010 0x7d21283f, 0x878dad16, 0xbf8ccd23, 0x456671d1, 0xa4350f7a, 0xe9fabd77,
11011 0xddcf10f3, 0xe793f5b5, 0x5f95dc61, 0xe21e7e5c, 0x6882a86c, 0xe6a53d07,
11012 0xfe31f795, 0x1f176955, 0x97a0edc3, 0xc3f1897f, 0x7268fe17, 0x3b0bb402,
11013 0xfe80a74e, 0xdfcb6171, 0x782e2092, 0xe8a98ed9, 0x3db659df, 0xedbddf0f,
11014 0xfa059ecd, 0x7e23f5f5, 0x7b6ebf59, 0x3c60f75a, 0xeeba79d0, 0x714227c0,
11015 0x2c552d8e, 0xe3c1d47e, 0x8e47371b, 0xcf11ef17, 0xaeeb3ad8, 0x5b1fc029,
11016 0x67d09e99, 0xba61e35c, 0x63f4379e, 0xf8f3371d, 0xbe3b96d5, 0x3cf1ae32,
11017 0xd7ae83fc, 0x7c6d18b8, 0x8bada7e8, 0x942cf17f, 0x1af426b5, 0x07e818d7,
11018 0xf47894fe, 0xd95da3cf, 0xdeb08931, 0xa4f181ff, 0x0e857eb0, 0xa69fd7e0,
11019 0x8cf8bf80, 0x44bf441c, 0xef098770, 0x38ef966b, 0xc2e9fb8a, 0xef1843f6,
11020 0xf85c784d, 0xb1fa1205, 0x03ee5df8, 0x6568d9aa, 0x1d7c90f1, 0x61d25e20,
11021 0x2e3cefc3, 0x12b5d192, 0x9c5bd92f, 0x3498b2e4, 0x8b0b3efe, 0xf8daace7,
11022 0x0c3f8f01, 0x09309baf, 0x2bf3abd6, 0x3c1550e3, 0x130f01d8, 0x91c071d5,
11023 0x714352e3, 0x8375bac0, 0x1e3e04f5, 0xf9a5f38a, 0xe9ef10a1, 0x8a468e13,
11024 0x81b0bf2b, 0x905f0fc5, 0x568fdf23, 0x626b82e2, 0xd7d6fb74, 0xbee078bf,
11025 0xf175f1e6, 0xa1c63f34, 0x5f051ba1, 0xf323575d, 0x846327f7, 0x85b7646f,
11026 0x0a549bee, 0x4f2cfbfa, 0x997dc0c4, 0xbe234ed6, 0x55d8a293, 0xdc5dbe7c,
11027 0x8af5d6df, 0xf5a27188, 0xbf907b2d, 0x3547f9eb, 0x8fd1473f, 0x6f1f2377,
11028 0x1f931b75, 0x3ead5b5d, 0xb5d3850b, 0xeba44dfb, 0x189dcdea, 0x79bfbaa7,
11029 0x7543b19b, 0xc3f20cfe, 0xd77f1aa7, 0x22c6bb6b, 0xa2efe73f, 0xcad9fbe9,
11030 0x3f8d63f9, 0x9b353f72, 0xa9fa6a2f, 0xed18b6f0, 0x3bfbbe96, 0x05eeb927,
11031 0x99dae778, 0x45ae751e, 0xd08be69c, 0x6462cfff, 0x3237576e, 0xa395383f,
11032 0x959c3ef8, 0xda2707bd, 0x5b2f51a2, 0x0c749d66, 0x665d21de, 0xcc5c6235,
11033 0x471e3aca, 0x326723f3, 0xeb4af7ac, 0xbbc604ed, 0xb2abf01a, 0x9bbb65ef,
11034 0x27273e80, 0xcfaa6517, 0x1bf19461, 0x4f881807, 0xd3ad8fbd, 0x4a7d8206,
11035 0x1850ef24, 0x7f699dc7, 0xb62e4095, 0x9f7f987b, 0x02313d5c, 0xf64bb7be,
11036 0x6e14097d, 0x04e0be7b, 0xba4f6cd7, 0x7e43f067, 0x1df69706, 0x4753bc5d,
11037 0x69c977e7, 0x6ad13d40, 0x1569d808, 0x4f6a8d62, 0x41d70346, 0x5e12521c,
11038 0x8978c0a5, 0x11e63cc7, 0x46d43f70, 0xf50adaa8, 0x5de6929c, 0x9249d895,
11039 0x72159dee, 0x57a50478, 0xc557a70b, 0xff65675f, 0xf03b70a6, 0x0cb896fd,
11040 0xbbe40752, 0x7d46ead6, 0x0b9b29e2, 0xdfd23fef, 0x88938868, 0xf54ed127,
11041 0x5fb450bb, 0xda3b7dcd, 0xe71f26af, 0xa613e6d2, 0xc9232749, 0x8e3e049b,
11042 0x7882d102, 0xe06a9b88, 0x70abb2fa, 0xdc785264, 0x19c48971, 0x2c3bf280,
11043 0x6e808f78, 0x1e7aaf2f, 0xdc768b16, 0x3e1a7c74, 0xe1d19b11, 0x6a71b035,
11044 0x0389dbbe, 0xe3a747df, 0xaf1bae3d, 0x70b56f26, 0x0911277e, 0xdcc59df8,
11045 0x2ffe384e, 0x4abdf069, 0x224f8a2a, 0x38c2644c, 0xde2130e9, 0x83cf9625,
11046 0x6fa9aff6, 0xeb01ef07, 0x0c870b5f, 0xb5efabb5, 0xe0e5c0de, 0x8a514b11,
11047 0xac93ee85, 0xb818b5e1, 0xb82c9d9d, 0x65a04e4e, 0x9fc801fe, 0x61e796d2,
11048 0xc8d08a5c, 0x5ac46ae8, 0x4466fb82, 0xad55c790, 0xd53d468a, 0xa8de2664,
11049 0x8e3f70f1, 0xd0f1e578, 0x3f9f8f8b, 0x28185639, 0xa50d6928, 0x1fceda35,
11050 0xa62c35cc, 0x4502d08b, 0x8b10fe14, 0x5ff40c6b, 0x6c9dc33f, 0x1bd30718,
11051 0x2877bf56, 0xc16bdaee, 0x1ba86863, 0x14c0ffba, 0x2ef82164, 0xdd0ef108,
11052 0x51b8720f, 0x0ec653c9, 0x463406ef, 0x332ef287, 0x698df7e5, 0xdaf37f2c,
11053 0x7ef0f5a1, 0xe8bda74d, 0xc78c0b66, 0xcf0ebf6c, 0x9af102c3, 0x937bd5f7,
11054 0x4738ca2f, 0xc1e40c6f, 0x07b7c7fb, 0x23c5fbd9, 0xfc7ba1ad, 0x59378f28,
11055 0xed007c94, 0x43d6a28b, 0x5aaad7c8, 0x01b9610e, 0x9e1d34f2, 0x421bc810,
11056 0x65bf79e7, 0xb5f2414c, 0x716b5e14, 0xb1c13c32, 0xbf6632d0, 0xb8c3c1a4,
11057 0x61d9bdfa, 0x6e2b483c, 0x86e1e1d0, 0x858785af, 0x87a86f6b, 0x3bfa55f7,
11058 0x0b174a6f, 0x73d35f00, 0xdb8ef80c, 0xf41663c4, 0x145fd0bf, 0x670e23ca,
11059 0xbcf72f43, 0xc2853b15, 0x97d35729, 0xaba14ed2, 0x9d26e8de, 0xef63afd8,
11060 0xe7e96a83, 0x87ae2ddf, 0x8b32de00, 0x8896dd2b, 0x0577c7f3, 0x8b8bbba6,
11061 0x74c213f2, 0x09ee2c4d, 0x11feaef0, 0x5a1f82cb, 0xe9dafe54, 0x34c54b39,
11062 0x011fde3a, 0x3c31b823, 0xdee5c49f, 0x9e7451a8, 0xc6032e89, 0xb8b11fd5,
11063 0xdb3b4057, 0x6200609c, 0xf71226cb, 0xf70c4104, 0xfa8feca3, 0xaf8ecc1d,
11064 0x56f8362f, 0xfc60f3b0, 0xfa611dbb, 0x47d1d0e8, 0x5b47d190, 0xb547d227,
11065 0x47d193bf, 0x346e5d5b, 0x3b03573f, 0xc70491ba, 0x5937bac1, 0x61a40b0a,
11066 0x82626e94, 0xb23740f5, 0xc282b6f7, 0x3aebc428, 0xf58f5f18, 0xe652e3e1,
11067 0x36fadbd5, 0x71fb481e, 0x0799d806, 0xa61e780d, 0xb7a94de0, 0x46e2c2c3,
11068 0x7ee6cdff, 0x99a9fa11, 0x961fb1d4, 0x3f81eb6f, 0xed875c60, 0xd05dcce0,
11069 0xae9b36de, 0x6fdc2390, 0xf815c1e3, 0x7f23784e, 0x04963bd7, 0x7bd720bd,
11070 0x3fdb07c7, 0xde807c21, 0xe8f80193, 0x0af2fdc4, 0xdd9667bf, 0xce40b826,
11071 0xef618f0f, 0x616ebc90, 0x16bbf576, 0xaf4ca791, 0x5bb83c49, 0x7b2bfb04,
11072 0x27eb0195, 0x9ea19a42, 0x5f5e2aff, 0x95ddf8d2, 0x89e85575, 0x7818d272,
11073 0x78f9e4cf, 0xfd2d1ef7, 0xa9a4c7c4, 0x1eed29e0, 0x45a290f7, 0xee265094,
11074 0xc810f05d, 0x3e3f4a55, 0x7231bb4d, 0x442de014, 0x233e943f, 0x776d0fad,
11075 0x7c6bad88, 0x5b0be80c, 0xf1152ef6, 0xae7e8e5d, 0x47bc166b, 0xc567eb49,
11076 0xb4adda90, 0x4d2c567d, 0xf3c09f21, 0x087e7903, 0x743fd34b, 0x7dfa041a,
11077 0x9ecbf703, 0x922578e5, 0x6399bafd, 0xb8f4cf20, 0x9418e4ec, 0x85beca0b,
11078 0x5ce05467, 0xdbe7e25b, 0x0334c169, 0x8fb29bac, 0x6021a0a5, 0x4d2b42a5,
11079 0xce201872, 0xbb8f5de1, 0x7b0bce08, 0x5fb73be3, 0xea81eecb, 0xc7ce7fbf,
11080 0xebf58df3, 0x2fb8f4bf, 0xb7e039fe, 0xf8f1dcca, 0xbeaf9a4c, 0x69fa32f6,
11081 0xdf54c457, 0x68ef55fc, 0xeeffc7e8, 0x00c4dfd5, 0x333ffa1d, 0x353fbc45,
11082 0xf1e8cace, 0xb60e6780, 0x04efe2cb, 0x1c4a8192, 0x15ce2ab2, 0x865eb8ca,
11083 0xdf86994b, 0x05bacf51, 0xa7ac2059, 0xf6878a57, 0xae78a931, 0xae2eab78,
11084 0xbb2f3955, 0x80fcc025, 0x42beb159, 0x74faefec, 0x3e49f7f6, 0x9992fa63,
11085 0xa1ce0ffe, 0x3373f2a6, 0x5efb31d7, 0x09598710, 0x3f08f98d, 0x5afd1536,
11086 0xfefb4439, 0xaf40d641, 0xf4f28064, 0x67978454, 0x13a795d6, 0x6b915bf4,
11087 0x4df9c3ae, 0x0cfd2a25, 0x13a346e5, 0xd1f4f1f8, 0xf7f9fe94, 0xe1bff4cb,
11088 0x867f3226, 0xcdb8ceca, 0xbe515f71, 0xc4696f46, 0xfb7e8577, 0x523f38b9,
11089 0x2163c5fc, 0x4115173c, 0x8f1e803c, 0x95610eb9, 0xdf13d1d5, 0xf1e9fc7a,
11090 0x8f51e0ad, 0x9d0f9cb7, 0x9e8ef1f9, 0x23e3d1f8, 0x5be97e7c, 0x7530eb0b,
11091 0x4bf288b4, 0xfc4f7bc1, 0xedfaf5b0, 0x009eb4b5, 0x0df142f4, 0x30174cf8,
11092 0x862b27be, 0x3a6c4fd3, 0x140b37e2, 0x0f4801c0, 0x55e3d798, 0x04acc78f,
11093 0xd5813ede, 0x1af80fdf, 0xed00fc89, 0xb2dd6521, 0xc6f76bd2, 0xe8c4de41,
11094 0xa7abd14c, 0xbd50bc72, 0xbce6f51a, 0x9bfa2b44, 0x9a9eaf40, 0x5e5bc614,
11095 0xde571b15, 0x600bcb48, 0xfc0afe9f, 0x0608b1d1, 0x95bcc5df, 0x56e05ff0,
11096 0xe2ca5f3c, 0xb7df0559, 0x93d5a67e, 0xce0bfaa7, 0xdc3dfe82, 0x05655ee4,
11097 0x87108c7f, 0xff1479e7, 0xd7f875c7, 0xf36bb3b6, 0x0afc7c7a, 0x27b931fe,
11098 0xab7a14de, 0x7cfd72b3, 0xfa0a1930, 0x3337d8f2, 0x137f8163, 0xbf447c7f,
11099 0x4563c4c4, 0x6e9c3821, 0xe2059e91, 0xa7b77d0e, 0x763e0b7f, 0x15494a90,
11100 0x7253bb1f, 0xd8deb3af, 0xeb298f93, 0xc7af8535, 0x05dde214, 0x4429a67e,
11101 0x1ec84bfa, 0xffcf0d48, 0xb3f72b79, 0x6043210d, 0x1c585f9e, 0x79f3ff8c,
11102 0xd54de686, 0x9b3fe84b, 0xb66d9ff7, 0x121bfde0, 0x7842ba94, 0x93f7c34e,
11103 0xf0f8c6bc, 0xbd656438, 0xd3096a53, 0xfbe2e6e7, 0xe42f14d9, 0x38f098cb,
11104 0x090559b6, 0xe3e20fdf, 0xf66cdf38, 0xd3db9c42, 0x2b0dfb92, 0x83843df8,
11105 0x527e7163, 0x3fc81460, 0xb6e5f97d, 0x4e50d5bd, 0x3d6095eb, 0x910afe3e,
11106 0x3b821ff9, 0x5217be4c, 0xe953d77b, 0xa13946f6, 0xdc3671d0, 0xe801bd7b,
11107 0xb8c2283e, 0x655cfcfd, 0xcf7645e7, 0xabec45c1, 0xf6f0a7ae, 0x02f7625d,
11108 0x81db28f2, 0xedfa7a7a, 0x49f34e8b, 0xd3b41e70, 0xcf22abd3, 0x5bfdf81b,
11109 0x68bb3f45, 0xeb0fbf75, 0xe3efc0de, 0xba8e2ffa, 0x1be7d60e, 0x2d61d5d3,
11110 0x44f4295d, 0xf438ebe9, 0xf1f99dd3, 0xdfcb503a, 0x049cbccb, 0xe3d151f2,
11111 0xeb8afac3, 0x9bd7a863, 0xe6dc3f3e, 0x857eb2ee, 0x35e8af3e, 0x6423d97d,
11112 0xd34644af, 0xebe3ce71, 0x2edcd733, 0x41c68bb3, 0x886fd38c, 0x73cbde56,
11113 0x393e8344, 0x95ed21af, 0xac573866, 0x07f97e63, 0x3d8d656b, 0xbedb86ec,
11114 0x67bd9ed8, 0xb6b97f3b, 0xef8a23fc, 0xcef8f141, 0x868ed6ad, 0x7e1491fd,
11115 0xbf67b7cf, 0xc9c82f06, 0x31a32379, 0xafdf4e7e, 0x7efa7e7e, 0x7035fdf5,
11116 0xd8c1aafb, 0xd2a9da38, 0x1636ec4f, 0xcd697d47, 0x14f0cd93, 0x73f86f5e,
11117 0xd4b8879b, 0xa3ae6f7f, 0xa44e7a21, 0x781468f7, 0xc2e7be0a, 0x0fe098cb,
11118 0x1eff95a8, 0x6cdd9de9, 0xf413f337, 0x6088efd6, 0x8683ea3e, 0xe82203a7,
11119 0x048223f5, 0xa0ecf0f5, 0x6350b0cb, 0xb97b300f, 0xef003d87, 0x657cd0a4,
11120 0x0f662eeb, 0x5da1d4b4, 0x0aed4951, 0xe01b3b90, 0x7cc1901d, 0x27681940,
11121 0x885eec84, 0x7786caaf, 0x0c5db932, 0x37a5a74f, 0x1f33fab2, 0x8c35374f,
11122 0x9dd5bb00, 0xce932f0c, 0xa8fb5db4, 0xf557da99, 0x508a24a9, 0x76c8aafb,
11123 0x4ed677ed, 0xde3bdca2, 0xa4bbc025, 0x65a8ff34, 0xecedff72, 0x8fd1b699,
11124 0xda81bf82, 0x54d9b767, 0xfb6f6f76, 0x039b66e3, 0xfedbd9f1, 0xcd17b4e8,
11125 0xdf8a3804, 0xe421f282, 0xbe28fe07, 0xf442a3ff, 0x53780b17, 0xe5f6e5e8,
11126 0x88ced10b, 0x0a6ae6ba, 0x736593c4, 0xb8db703a, 0xc186365f, 0x706189a9,
11127 0x376e4a26, 0xfbbdd3f4, 0x3bf028ea, 0x04fa3bbf, 0x2b7e79da, 0xf41fdbf3,
11128 0xe3a91594, 0x026d6bdb, 0x10c097a7, 0xdc777fd8, 0xec0127b8, 0xc0596c95,
11129 0xb2fd4ef7, 0x99f1e9ef, 0xdb669fc0, 0x6629d257, 0xfde2364f, 0x60547f32,
11130 0x3d2ac3c8, 0x4ddfcfce, 0x3fdc5ff5, 0xdcff1d44, 0xb5abcd6e, 0xc022f831,
11131 0x7bdccecf, 0xde80f40c, 0xae584ee4, 0x2b9004b8, 0x24a1eae4, 0xdd6a5f3c,
11132 0x689f0367, 0xe0e77f17, 0xa49eeb7c, 0xdaad3405, 0xb0369ff2, 0x3e38eae3,
11133 0xf8ed4bce, 0x76e5535e, 0xa113df11, 0x003d26fd, 0x85d6eb7e, 0x1fdeec59,
11134 0xc8a6afbb, 0xef9ff1d5, 0x9cc45219, 0x4cff7889, 0x98a737d1, 0x9f183ebd,
11135 0x1dfd8ebf, 0xf7ba29cc, 0xefe56ec9, 0xcff5e993, 0xe2b26c67, 0xa9f8c32f,
11136 0x4fd67665, 0xfb2bfb6f, 0x53e204b3, 0x296cbfed, 0xb3f8c220, 0xefc24b3f,
11137 0x3da40fe7, 0x3df60855, 0x01239d91, 0xa2f644ac, 0xa7cfcb7e, 0xbc2f6fe8,
11138 0x6793be7b, 0x3cbd6ede, 0x6e2466eb, 0xd004d72a, 0x9803dcc7, 0x07c991d3,
11139 0xf5bbff45, 0x55dfad33, 0x722b07af, 0x6e3fd732, 0x780210d5, 0xfbc2cc77,
11140 0x8c240713, 0xc9ebd2f7, 0xbd058353, 0x204fc3e8, 0x4d6d6d7d, 0xfe7b018f,
11141 0x009f60df, 0xc65eb6dd, 0x49aa83f7, 0xc7781ee0, 0xb455baa9, 0x24fc6007,
11142 0x67d87af3, 0xe0a13e8a, 0x1eeaeda5, 0x7fda58f3, 0x7d8345f6, 0x76f10505,
11143 0x57682ff0, 0xc1fdf84f, 0xfe679004, 0x07e784a0, 0xc6f717d9, 0x45f1542c,
11144 0x7e0355ff, 0x6eeafb7f, 0xfc60f7ed, 0x8b6ed0f5, 0x7bcbd981, 0x063dfff7,
11145 0x57dbd4f8, 0x90bc212f, 0x6f53d13e, 0xcf3bfd46, 0xd1fc862a, 0x8899bd6a,
11146 0xde2187d9, 0x152c6a6b, 0xfaef426b, 0x6487ce70, 0xd4f49595, 0x2778422b,
11147 0xd0f0092e, 0xf0561f43, 0x3e33d3ac, 0x773d71b2, 0xef0f1918, 0x4d5db65e,
11148 0xc77bc0a8, 0x0afb18fe, 0x8f4ccf94, 0xee7bdeea, 0xfdf0e9c9, 0x9ddec8a0,
11149 0x7ee22ab8, 0x62b3bdda, 0xdf6a8778, 0xeb8a4e52, 0xc5d06576, 0xfad16f0b,
11150 0x3345f657, 0xbce4baff, 0x224f7d5e, 0xf1c7df5c, 0xcecc1815, 0xe183bce9,
11151 0xac6fa8bd, 0xb0f574cf, 0x4361fff7, 0x0058393d, 0xfad462e2, 0xffac234e,
11152 0x3e8ad9bf, 0x25a5fc67, 0x978bf806, 0xb4210ee4, 0x9268b2df, 0xac15740b,
11153 0x33b07623, 0x18301fb6, 0x37325d60, 0xcf5c62a5, 0x731cfc2b, 0x31a34b49,
11154 0x4b174555, 0x19d839f8, 0xaf129bd9, 0x9632befa, 0xfb3397f1, 0x71817fca,
11155 0x91347f1d, 0xd0f41191, 0xfe4cb185, 0xa77a336e, 0xc77a866f, 0x68df780d,
11156 0xef5ffeef, 0x97937787, 0x038c731c, 0x5894e0bf, 0x0eda0fb6, 0x710f52be,
11157 0x821f6dc1, 0x6672a2d4, 0xa068b163, 0x1c45befd, 0x9877afcc, 0x90d6bdfd,
11158 0x12b8943f, 0xc5379e60, 0xd6fdbe32, 0xdce68301, 0xbefe2dec, 0x8cb1f5ef,
11159 0x32c6a50f, 0x03d6dabf, 0x700b09b9, 0xc447b9ff, 0x64f01f82, 0x456c3d47,
11160 0xe8a80fc5, 0x6f0f936f, 0xfe863e9d, 0xc1977273, 0x38edcb0e, 0xf30882fc,
11161 0x24219c75, 0xf43d204e, 0xac6f0a39, 0x5d5bde1a, 0xc71d1e0c, 0x0aafd86e,
11162 0xfe04a9fe, 0xbfcd0671, 0x43c52ed5, 0x7f82983c, 0xff4a1e65, 0xdae2168e,
11163 0xe4adc160, 0xfe15fada, 0x31efe568, 0xe513b04c, 0x5d2033ef, 0x6eb9b76e,
11164 0x6f72c589, 0xeccfe40a, 0x36d27a63, 0x72494f2e, 0x9fc070f1, 0x79f34eb2,
11165 0xb7a78caa, 0xe3e7effe, 0x4bafd254, 0x0ec8afd7, 0x76cdd22f, 0xf0ee4f16,
11166 0x10e9cc06, 0x8e96d677, 0x154a9f7f, 0x8e3f7b97, 0xfdf68cff, 0x830eb6c2,
11167 0x558fee01, 0x50e210ef, 0xbea7eddd, 0xa933a21d, 0xedafe905, 0x5c7dc118,
11168 0xe65dfcde, 0x9f72a48f, 0xe786ebbf, 0xf87fb0eb, 0x8120fb39, 0x1bfd93a6,
11169 0xfc410e56, 0xafb06c06, 0xfba278c2, 0x46dad206, 0x92ebd023, 0xe52d2c65,
11170 0x9a4bd5e7, 0x4b3fb8dc, 0xc478b3d6, 0x4ca9b165, 0x257a733e, 0xf8c1e886,
11171 0x7b4dbade, 0x5c1ff08f, 0x7d6d9e7e, 0x4bf40f6a, 0x80fbebe9, 0x9eda9b8f,
11172 0x55c30758, 0x46ecf5e8, 0x4594e119, 0x3df3cf6b, 0xb8cfccb1, 0xf7a330fd,
11173 0x5ce51bc9, 0xb26c4f78, 0xbfc1d897, 0x4dc6d6fd, 0xb7eff022, 0xd9539e80,
11174 0x7b79073e, 0x3163df66, 0xd6f907df, 0x47e02069, 0x652466df, 0x62fb545b,
11175 0x343786ef, 0xb9bcb7fb, 0xebfa3a6e, 0xe005e23b, 0x55becaf3, 0xe8cdbef0,
11176 0xfff70dbc, 0x9ffdba9d, 0xc2b7dacf, 0x4f7ad0ba, 0xd4fffdf1, 0xe9ffba34,
11177 0x718db8a7, 0x66d9c002, 0xdccefc8c, 0xfe90df4b, 0xa3b57c42, 0x297d5f07,
11178 0x6c1ff996, 0xeaffb4e9, 0xffa12e3b, 0x4e3e3421, 0x2be54f37, 0x002a9374,
11179 0x0ae91bfe, 0x517c008e, 0x533d02bc, 0xccfe7a3d, 0x0795dc0c, 0xe1ff3c24,
11180 0x2e3c4be7, 0x6a947704, 0x99f986bf, 0x6fdd6fb2, 0xf2b238c0, 0x9e82576b,
11181 0x45e8509f, 0xb82b3cfa, 0x7953c787, 0x71f61676, 0x8eb07e04, 0xec8ae3e3,
11182 0xff7debee, 0x65cf40c1, 0xf98462d4, 0x1d82f590, 0x772945d6, 0xbdef67ac,
11183 0x94f0e61e, 0x2dbf87ef, 0xde3d83be, 0xf0cc3d21, 0x5c42341d, 0x931f28eb,
11184 0xc5c84463, 0xb70c40fd, 0xb67d860f, 0xfbafca84, 0xacebf255, 0xaa7488dc,
11185 0xce23e1e0, 0xb1c4aeb7, 0xc7ce3f79, 0x5d1f07e9, 0x82ff0aa2, 0x3f6c0924,
11186 0xe7db028b, 0xbb3fc022, 0x90dba6ef, 0x4c88efde, 0xb7b076ef, 0x47efe1e2,
11187 0x8cfa406d, 0x7bc7669b, 0xce494f2f, 0x7e8d38a8, 0xef74c3e4, 0xced067a6,
11188 0xfd85fa03, 0x97fd1bde, 0x0893fd01, 0x74a3ef74, 0x853f5aaf, 0xfc5d280e,
11189 0x7ca5f01d, 0x7285d3d7, 0x65e0a90e, 0x731cee9b, 0xe9e19daa, 0x8d5200ff,
11190 0x8000b56e, 0x00008000, 0x00088b1f, 0x00000000, 0x7dbdff00, 0xd5547c09,
11191 0xf37df8d5, 0x3332c966, 0xb2764c99, 0xa00c4930, 0x80490e2c, 0x084ed8b0,
11192 0xc3884a20, 0x93a0d752, 0x364b0900, 0x94569510, 0x8b062081, 0xb62d1518,
11193 0xef858320, 0x106d1b43, 0x268358a8, 0x622d1110, 0xa57fb1dc, 0x41459041,
11194 0xed1fa822, 0xe73bf587, 0x33337bdc, 0x6a02266f, 0xefc7e1ff, 0xdf77dee6,
11195 0xcf7ece5d, 0x6ec5f739, 0x843631d3, 0xae630731, 0x7d8c01e6, 0xf4bf3f8f,
11196 0xa12d8c97, 0xcf3773e7, 0x8224715e, 0xf0f7cfd1, 0x5e79babf, 0xc776bd50,
11197 0xe91c57af, 0xc5cfafe7, 0xffe0525f, 0x8967a671, 0x47f1558c, 0x89ef4cac,
11198 0xfbc025b5, 0x6cd69d11, 0xe266b498, 0x03846319, 0x8319789f, 0x1c636ff6,
11199 0x6faa3e54, 0x1f2bd3de, 0xe9cc31ca, 0x9b39a685, 0x998f1533, 0x1b3605b1,
11200 0x27f967ad, 0xb0dd93d3, 0xc6c646de, 0xc59bbae3, 0xd9dd727c, 0x99c68536,
11201 0x8f7329e0, 0x66678389, 0xa07b9e4f, 0x6607f9ff, 0x886d964f, 0x70a13ebf,
11202 0x4018eabe, 0x7ec48c4b, 0x0c985563, 0xc9bf9fe6, 0x326533e4, 0xc49f05b6,
11203 0xa3db2ac3, 0xfd329b7c, 0xccf4d9ef, 0x9633b7a5, 0x75a4cb6b, 0xb15aeac1,
11204 0x646858ee, 0xdfbcc197, 0x9bb59666, 0x1dd5d1e1, 0xb081e2de, 0xef462d8f,
11205 0x389989d4, 0x1c1af398, 0x9d629aff, 0x6a5801ed, 0x38a6cbac, 0x6992d007,
11206 0xcf8fb65e, 0xeced9793, 0xeea1b2cf, 0x2db9e670, 0xf8128d8c, 0xc930ad62,
11207 0x421c3f70, 0xd9e1c6f1, 0x20175e13, 0x1750867c, 0xd5e27e7a, 0x667d1ba8,
11208 0x0144f3ff, 0x78632fbf, 0xd3c1adf9, 0x1d0e66db, 0x553e6027, 0xcacc6649,
11209 0x5c554b3c, 0xdb6628ff, 0x773ff0e4, 0x1c2e628c, 0x57189a7f, 0x8ffacbb6,
11210 0x10aeafa6, 0x78869afa, 0x22e88ead, 0xd053eaba, 0xbcc07469, 0x8bdd194c,
11211 0xee98fac1, 0x80ac5eda, 0xbd71eaba, 0x29554800, 0xf6c7ebe0, 0xd7338d84,
11212 0x01d99e23, 0x0cc9cb13, 0xcdb567dd, 0xd1b6e1c0, 0xe866fa30, 0xb865e097,
11213 0x838bc003, 0xde3585e3, 0xdc6bf88a, 0xd7886268, 0xdc39636f, 0x68d953ac,
11214 0x42b7f403, 0xc6f7247f, 0x57039ea9, 0xd931bd41, 0x9e6050e8, 0xc22e8613,
11215 0xa0ab89fb, 0xadc3e88d, 0xbc4fbe20, 0xdf9ae23a, 0xa277bb40, 0x8bc0e58e,
11216 0x05b08d5b, 0xa7bfc3a4, 0x482936f9, 0x27c42da7, 0xc1b2c7f3, 0xbede7826,
11217 0xd5d11869, 0x052ce2ac, 0xe6ce76e9, 0xdb9f0558, 0x2a74d8c7, 0xd863eff3,
11218 0x13e89542, 0x16dea0f8, 0xde618f80, 0xd5e1153a, 0x6c93ce3b, 0x11ec6588,
11219 0x23e335db, 0x32ce81d2, 0xcc1b2459, 0x5f5043d8, 0xb46b7009, 0x4b1614bb,
11220 0x0a7306f5, 0x236321f1, 0x0cadae08, 0xd518d4f0, 0x6045775d, 0x7f5e2cff,
11221 0x86eaf1a4, 0x9ec63486, 0x22357189, 0xbb303e9e, 0x87f9c11f, 0x44a9d526,
11222 0x7fae82e7, 0x127ece80, 0x2c2ed4bd, 0xe0f38762, 0x0e660ef7, 0x47901ba4,
11223 0xf8066eb7, 0x9b3de895, 0xbd355d70, 0xc38e3e8e, 0x657cb6d5, 0x7ba184f4,
11224 0x21788eb9, 0x8cc7d817, 0xaeef11f0, 0x7ecdcb53, 0x66c5b3b9, 0x52ed4c17,
11225 0xfcfc5b26, 0x79eb7286, 0x593b9733, 0x98229a50, 0x7ec762d7, 0xac23a23e,
11226 0xe5fae4c7, 0xdd62cad1, 0x3e185f78, 0xeb890d7e, 0xaccf9467, 0xf2ff7fe5,
11227 0x1fd0a19b, 0x9f89577f, 0xc4fce35e, 0xc5a3f5e5, 0x3c22269f, 0xbdf09390,
11228 0xeb1cc5db, 0xeadf3a97, 0x5fb9748b, 0x3ea09b65, 0x2af464d8, 0xe66db831,
11229 0xf18a25b0, 0x945b0d90, 0xa820cb56, 0x2e614bff, 0x7fe9c3c0, 0xbfae54a9,
11230 0x133e3dd7, 0xa1d9afde, 0x7e852e73, 0xf10a2d35, 0xf337b383, 0x371d0045,
11231 0x31075947, 0xb770af18, 0xf68065d9, 0xc9044ad3, 0xd7009c65, 0x2feb9061,
11232 0x8268cae8, 0xc02df5e7, 0x5d3d507f, 0xf5c6a808, 0x6c319dea, 0x83be1f80,
11233 0x1fb47cde, 0x1bda00ec, 0x4f67c89d, 0x9ff1f245, 0x81f0cc8a, 0xbe528310,
11234 0x4a0188e7, 0x6e825961, 0x62c67af4, 0x78504f00, 0x30b51cb1, 0x3c07a5db,
11235 0x35e67a2b, 0x7546be00, 0x9f08aab5, 0x8e872eac, 0xe9f3fd99, 0x3bed18bb,
11236 0x39d0ef4b, 0xd6d5f403, 0x7aabcfbd, 0x31d0eb80, 0x942af58d, 0x6f9e3189,
11237 0x4623de10, 0x7b63d5d5, 0xf557b15c, 0xa57cff40, 0xe905b76e, 0x44e61aec,
11238 0x24f92ab9, 0xc1b593ae, 0x81ec5972, 0xda15974e, 0xb5771c47, 0xc7fd800d,
11239 0xe38299b8, 0x7c0dfd49, 0x0e9162c6, 0x44ca5de3, 0x3fe86718, 0x8e47c118,
11240 0x68ef75b3, 0xbe3ef905, 0x18e28c63, 0x6be74a10, 0x38b7e398, 0xce9f77ae,
11241 0x3475f889, 0x9406d733, 0x62ba7f13, 0xf64bc20c, 0xf5cb1def, 0xa78f48ca,
11242 0xee154408, 0x1de70627, 0xb76fa37e, 0x6c33d601, 0xd1b77796, 0xd99fb011,
11243 0xed4bc68c, 0x523ed2f4, 0xb10a780e, 0xd2c6b6cc, 0xb78e2338, 0x7e800db6,
11244 0x1fb07549, 0x78ef4f68, 0xa6b8414f, 0x882875d7, 0x777badcf, 0x3ad37ad1,
11245 0xf82979da, 0x176179eb, 0x5603db74, 0xdb23ed1d, 0xf2cdf5ca, 0x666f5c53,
11246 0xadb27ac7, 0x2c7dfe09, 0xd724f42f, 0xf66bf8c1, 0x17ef7566, 0x2895eee5,
11247 0x52e403e4, 0xc691ac6e, 0xe9eacbb9, 0xbdabfb8f, 0xd20f73b1, 0xdf7bf3e0,
11248 0xb47f12b1, 0x137e13c4, 0xf84a7df7, 0xba485c48, 0x37d9ad98, 0xb179415f,
11249 0xa67014a6, 0xca59c284, 0x7eb8358d, 0xf45b1fa2, 0x27cfa024, 0xd8829eed,
11250 0xcca57b40, 0x20159d1e, 0x8f7be497, 0x19ee662f, 0xed6190b0, 0x16595be5,
11251 0xb17ef7c9, 0xc27df201, 0x9122fbc0, 0x2e2c9a9e, 0x569fb617, 0xcf388dd8,
11252 0xfb425833, 0x975e0633, 0xe0407af0, 0x52763b33, 0x870875b6, 0xf8e80d93,
11253 0x4fde4899, 0x8dee8f2b, 0x83bb09d5, 0xe0eb0bd3, 0x08fb82f4, 0xc666bfb4,
11254 0x748c3c72, 0x9cf48a79, 0xfee2a64e, 0x76f81786, 0x1b0edd23, 0xf48dddef,
11255 0x9d04ce9f, 0xa274e78c, 0x63dbf7a5, 0x711d7cb9, 0xdc218bbc, 0x0ee615f3,
11256 0xc654ef67, 0xbe29bb72, 0x0fd13463, 0xce1943f0, 0x4eb53437, 0x66dca035,
11257 0x7fa809b6, 0xa0eb137e, 0xae05797e, 0x366f48dd, 0x79f89b97, 0xe9c6d9be,
11258 0x07d39326, 0x1c273fbc, 0x3e436d3f, 0xa3e7e01a, 0x7347a478, 0x26de3d28,
11259 0x011bf4e0, 0x3df1d0df, 0xf1f8e177, 0x02973a1d, 0x603b0c83, 0x3ae831f6,
11260 0x49e8016c, 0xf40653e4, 0xcfb40b0f, 0x9f2215b2, 0x153956a5, 0xb302ebc4,
11261 0xd7dc1efb, 0xf98d9472, 0x5f3acf48, 0x6c97bc3d, 0x7efe1173, 0x67689eb4,
11262 0x90686c11, 0x2c40f59d, 0x9557e3b7, 0xfa7ebca1, 0x53ca235b, 0xbdbfe487,
11263 0x01e5d1b9, 0x50c7f1f4, 0x0e123f7c, 0xa7395adf, 0x2e5fb7c5, 0x8039cb04,
11264 0x0f8e5ad7, 0x77c7e76e, 0x7cb9502c, 0x3d6b9608, 0x3e4423e1, 0xc1fc3c08,
11265 0xeb84daec, 0x4045c6cc, 0xfacd1de9, 0xfa4f7b61, 0xf358c5f8, 0x2f67b34f,
11266 0x8c5f8fac, 0xc7d5084d, 0xd7ae88ba, 0x75478015, 0x6150ea8b, 0xec8bf50b,
11267 0xfaffc42e, 0x7689c566, 0x9516eee1, 0xf2fd61e8, 0x729bd228, 0x8f6e5fbd,
11268 0x84aec419, 0x6b3ff052, 0x5a7d258f, 0x5fe62b1b, 0xfcc0bf06, 0xbabc6da7,
11269 0x3d79e6dd, 0x6fad0e50, 0xe11226f9, 0x71593fdc, 0x4abb411d, 0x85818fab,
11270 0x84df7814, 0xd70829bf, 0x322a0dc1, 0xad9ef5d6, 0xf6f09526, 0x8c378e2e,
11271 0x0a33be75, 0xa6a7f5d6, 0x7b40bad1, 0xaf8eeceb, 0xeb05dd6f, 0xfae68daf,
11272 0xeb9a36b9, 0xcebbd3e7, 0xbb7a41f7, 0x9274e176, 0x9ef4c37b, 0xdce5038f,
11273 0x730efd1b, 0x6d4acc39, 0xd4e3fb47, 0x68fbe52e, 0xa235a100, 0x0aed1e9f,
11274 0x06a9ca35, 0x1c4415db, 0x1f0039f5, 0x145b5f84, 0x073eafc1, 0xd6932ef8,
11275 0xd9d70279, 0x14b2316e, 0xfc0b3f68, 0xbae4fd88, 0xcf7ac47f, 0x9a6f5f84,
11276 0xa0b468ed, 0xbebfd50b, 0x1e20bc6e, 0xa2d57c60, 0x669c7da7, 0x67c44e51,
11277 0x10c5d1b3, 0xc283deff, 0xab78103e, 0xba773411, 0x0f01c865, 0x81fd6fec,
11278 0x7fbe2734, 0x48d9c77a, 0x47ed199d, 0x7d876a8f, 0x565de9a9, 0x5bbb87d4,
11279 0x39de5ece, 0xc19be480, 0xbb3beb0e, 0x33ddb0ef, 0xcfed47e0, 0xfd88bf6a,
11280 0x0dcdead5, 0xaa227681, 0x1a945259, 0xda5a523a, 0x220ca9fe, 0x0f2863fe,
11281 0x57cc19bd, 0x3e5efb0f, 0x54d3d050, 0xd7be40e6, 0xcdbb7be2, 0xe00f619d,
11282 0xb736cddb, 0xf385d703, 0x3ed2e6a4, 0xe83eb0b3, 0x0679e9cd, 0x0c6fee1d,
11283 0xed29bd43, 0xb44fb93d, 0xfd7323c7, 0x5ef693fb, 0xce73fef7, 0x68c7da0f,
11284 0x74ec83df, 0xc52c740e, 0x282d5a73, 0x03320785, 0x784adff7, 0xacfb16a9,
11285 0xaab7308e, 0xcdb62fb0, 0xca53b270, 0x7dd0ac83, 0xf3869e00, 0x780f387d,
11286 0x377fcf10, 0x4e11eb3b, 0xda1b0efa, 0x91afb0af, 0x50560fb8, 0xf8708c96,
11287 0x8c9aecc0, 0x2599fef2, 0xf4fae88c, 0x14f7ccb3, 0xbb4b7a6c, 0x0366e88e,
11288 0xffe882bb, 0x5b99dd0a, 0xebe266dd, 0x7e7ef8b1, 0xe50ea347, 0xa1cf8e6f,
11289 0x797ab943, 0x474eb347, 0x2f19e0f4, 0x0f5674e0, 0x54dfebeb, 0xba48fea7,
11290 0x2e9e1498, 0xabf6f042, 0xb849bc40, 0x30f4128d, 0x3286e10a, 0xb27f4bb9,
11291 0x370fc233, 0xb54b0bc0, 0x58c78e87, 0xa9c20667, 0x7d63c5ed, 0x9abc613a,
11292 0x8add8f97, 0xabf9a970, 0xcc618889, 0x418f2f5f, 0x30b2ffba, 0x72735dbc,
11293 0x0f5b9d71, 0x3dab78c4, 0x157be48b, 0xbda230eb, 0xaddd7200, 0xd2eb900f,
11294 0xe867db8e, 0xf7f1c628, 0x12d9510d, 0xe759f380, 0x461624b0, 0x3f72c85f,
11295 0x00396dda, 0xe155f47f, 0xfcc5e4f9, 0xda476e18, 0xb25afc83, 0x9678b7dc,
11296 0xe7a18c7b, 0x8e0df6f1, 0xb14e7f24, 0xc87a1ec6, 0xa78dedce, 0x81cf5ced,
11297 0x3ae17660, 0xe2c5fd4f, 0xa9d342f3, 0x0cadf7dc, 0xdb6a74e0, 0xa05e79bb,
11298 0xe3ac53a3, 0xdf9097f6, 0xb9d336be, 0xfbf078ae, 0x7e2c4b79, 0xfb8abcfe,
11299 0x2f55d852, 0x407569bc, 0xbb2de2ff, 0xf001bde3, 0xbfe98abb, 0x4ceba6ee,
11300 0x8fef979c, 0x20fb3be9, 0x274bd83e, 0x16501d12, 0x3c6af8bf, 0x373803a7,
11301 0x14ff450d, 0x633f8fe7, 0x5ddd8053, 0x3dc6b0bc, 0x1fc02f26, 0xf9922e73,
11302 0x0efaeb02, 0xab891e23, 0xfda999cf, 0x9e25bb76, 0xd62f4de4, 0x8f4de50b,
11303 0x7848baf0, 0x3c25db6a, 0x913e0df7, 0x97c5f681, 0x07c5d83d, 0xaf7ec1ec,
11304 0xdc7b1637, 0xf5fc7263, 0xdea77dbf, 0x5ef30ee6, 0xacff188b, 0xda127873,
11305 0xd6c6c57d, 0xe1f9c2cb, 0x0b5339e4, 0x57ce37a7, 0x7fb8e346, 0x1f1a6739,
11306 0xeddb5d6e, 0x3fe69fba, 0x0aab07d8, 0xf44b0bb0, 0xdced379e, 0x326ab05f,
11307 0x3f2e6bd4, 0xd9ce8e3b, 0xdc845e92, 0xdb798abb, 0xf4b57f90, 0xbefdf121,
11308 0x4b2a5bc4, 0x693dbc45, 0x11ba7077, 0x43f920fc, 0x396d470b, 0xe13cc8c1,
11309 0x75cf03ce, 0x799235c3, 0xbede1e41, 0xfe7a40c1, 0x4e1ff3cd, 0x3f7a03cd,
11310 0x5b60d6b6, 0x5ace530a, 0x51ed3bb7, 0x360da7f4, 0x1fa814d9, 0x865eb473,
11311 0x4eb95f7c, 0x1c3d2375, 0xe27b7b5b, 0x00bf2874, 0x7582adfe, 0x50306e54,
11312 0x770dacfb, 0xc109fb50, 0x12eb95d7, 0x7cbca3fa, 0x4481fdb3, 0xeface3c4,
11313 0xf11ebfee, 0xeb68c5b2, 0xaaca183f, 0x263dc526, 0x3673de00, 0xb7d50646,
11314 0xdc2cd8e8, 0x532bc487, 0x1dcfdd3c, 0xdc631eb0, 0x6b63c44f, 0x18d51f88,
11315 0x92ccedc7, 0x9aefb029, 0xbec96721, 0x8a27bddf, 0x662bc9f4, 0xd6c8ec95,
11316 0xb7f3ffc1, 0xf45ea12b, 0x3649de9d, 0x58f3c09e, 0xce866781, 0x8a8fa040,
11317 0x7a2f5e08, 0x68764f51, 0x78254591, 0x1d5c82b7, 0x65de4a43, 0x7efd0b1e,
11318 0x4753df21, 0xfd0e1ead, 0x1818c6c6, 0xb45fa1ea, 0xa06629ce, 0x4e797f27,
11319 0xc06769ff, 0x9733467e, 0x42e2ed1e, 0x5f6a0866, 0x0a7d6511, 0x4c185aed,
11320 0x28b0fa8f, 0xd8f9f822, 0x813daecb, 0x5b58c4f6, 0xbfa4bb70, 0xbfa0389c,
11321 0xb1b97efe, 0x8fe7cf7b, 0x567d804c, 0x9ec953ec, 0xde5c90be, 0x41cafb8f,
11322 0xda51bf7c, 0x29bdef04, 0xf9e6f3a0, 0x9052cb63, 0x86140abe, 0xe763ae7e,
11323 0x5ce5f3c3, 0x018c9f41, 0xf1f9fb9e, 0xbb39d13c, 0x7f6c8ebb, 0xeebcc15d,
11324 0xe2ffae3a, 0xcb0fd9e5, 0xf73b4eab, 0x87f5686f, 0x53fe7f96, 0xf078a3fa,
11325 0x0b5e19ab, 0xe585ff95, 0xfe5c2dc9, 0x5685e56a, 0x6975c85f, 0x4e7d5bd7,
11326 0xcf13d20d, 0xd7e27909, 0xfe7a4617, 0x6b8f9e33, 0x9e8486e2, 0x219ec18f,
11327 0xea877978, 0x760e5ce9, 0x6fd8edd7, 0x5711d980, 0x665a4b08, 0xb9468acb,
11328 0xdcf164d6, 0x97e01719, 0xa8d4dfea, 0xedd1f943, 0xfb0431af, 0xf5f9e46d,
11329 0xffbe389e, 0x875e38f2, 0xfb9d2bf3, 0x92794437, 0x2f6f38f5, 0x7e3033a3,
11330 0x85fbcb25, 0xaf7690fc, 0x9da577b4, 0x7d59ed2b, 0xb367b703, 0x7e41dd63,
11331 0x5fafd633, 0xed183f90, 0xef73e474, 0xe7da28ae, 0x107b8a67, 0x731569f2,
11332 0xa017143d, 0x7c0deb07, 0xbcf5dafd, 0x13ec2716, 0x413b26e6, 0x1d1ccfb6,
11333 0x8d6f9e5e, 0xc2ff53d3, 0x40ca6fc7, 0xb6b3ee3b, 0xce50339b, 0xfff1a67e,
11334 0x0f0fc4f6, 0x507d7e0b, 0xe15893e8, 0xf9087827, 0xedc0ea08, 0xfef02dae,
11335 0xe26ec58a, 0xbe2edfab, 0x1747ca91, 0x8fe7a42f, 0xfcd265c5, 0xdc77c2b6,
11336 0x23a700d9, 0x17d2552b, 0x3eee8d33, 0x91def0b1, 0x1bf91d08, 0xc799d70e,
11337 0x3b63336f, 0xcce5f3a3, 0xf26c27c7, 0x1f01f806, 0xe90c7dc3, 0x09af9f79,
11338 0x9d2a5ebc, 0x2b4eb356, 0x7a6eadea, 0xb7a2103d, 0xa72f11db, 0xf6226759,
11339 0xfa3a55ab, 0xf3a12934, 0xaf5cc83f, 0x2366bf61, 0xd37c8feb, 0x92f5c51c,
11340 0x029bdfb6, 0x9ed0ab7f, 0xd433f285, 0xcce4615f, 0x7b5e823b, 0xc4ef5d5b,
11341 0x9333bc91, 0x56eb4edd, 0x3ef44e29, 0xb4e707ce, 0xc639f10f, 0x975fd089,
11342 0xc775b56d, 0xc779f855, 0x185c71fd, 0xfe4f5c7f, 0xee3aed1f, 0xd570e789,
11343 0x296485fa, 0xc4c742fd, 0xd9c5167e, 0xe844fc82, 0x0fe70f0f, 0x48de3aba,
11344 0xd510dbfb, 0xa8b8c5e9, 0x3e7e66f7, 0x55e51a4f, 0x5a95dfd0, 0xfe8858dc,
11345 0x71c67fb0, 0xbc7da63f, 0xf1cf1927, 0x4e8d92bd, 0x2c5ce3f4, 0x76680e3f,
11346 0x478138f1, 0xd358eb47, 0x03ec8de1, 0xf0ec4aeb, 0x34a11a14, 0xf8d226c4,
11347 0x096eac49, 0x11fa0de2, 0xa3dbf230, 0x743c8a7c, 0x213c9743, 0x91a56147,
11348 0xaddb77c8, 0xbc3c531e, 0x5d467437, 0x53edfa3d, 0xe23c78ab, 0x6de9e284,
11349 0x1b8d0ecf, 0x5e3932cb, 0xbb88aff0, 0xd0346fe6, 0x3e37f2ba, 0xfcd1f146,
11350 0x95eb578d, 0x1f943900, 0x27fea06f, 0x9bd39d5e, 0x851f18fc, 0x880ebf8f,
11351 0x4662f4e7, 0x8a10e11f, 0xbfa58687, 0x313ff17e, 0xf609dcae, 0xef3cb050,
11352 0x20243f17, 0x0cfaa16f, 0x3c7d73c9, 0xc07f23d7, 0xd358057c, 0x7cc8661f,
11353 0x8fe40d85, 0xbe6c6add, 0xde51e306, 0xbc431d1a, 0x2bf9efb7, 0xcd676bc5,
11354 0xb6bc5070, 0xcf7dfdfb, 0x3ff6c72c, 0x118362cc, 0x87be29fe, 0x7ccff415,
11355 0xc9e3c91b, 0xb1326edf, 0xd9a5b025, 0x3c53376f, 0x8e954d78, 0xeed17ca1,
11356 0xe832661b, 0xa0db5c78, 0x47f8e02b, 0x0ef12839, 0x7c446404, 0xfc21bc48,
11357 0x6e3198b6, 0x5fad02fc, 0x7e80cbae, 0xc7dc04f0, 0x4e906b96, 0x15d9557a,
11358 0x75c817f4, 0x4c9f485d, 0xfa69ff8a, 0xc3d467e4, 0x9c5fc5b7, 0x74819e1e,
11359 0x5ac3d5ae, 0x7164dbfd, 0x0bbf6255, 0x4213e1e9, 0xd7894dfe, 0x7e3043c4,
11360 0xc76f0616, 0xf00c1c84, 0xff19df8f, 0x1fe3fc23, 0xe3091ca1, 0xc8c67f1f,
11361 0x9da36fe5, 0x0c2936dd, 0xe627bcbf, 0x32eeadd7, 0x6f8cfea2, 0xb3cac251,
11362 0xc651ab6c, 0xfae05713, 0x2b44fc64, 0xb7c0c38f, 0xde5ffb11, 0x7b0bbad4,
11363 0x165ec6e5, 0x15dbe68d, 0x37b9c3df, 0x046b3ccc, 0x30163b9f, 0xea3aa38a,
11364 0xa82bc918, 0xb093b8fb, 0x0023f295, 0xb8e04f1f, 0x9d638a17, 0x1d9215b6,
11365 0x8656e324, 0xf8f3e0d8, 0xcfd9789e, 0x6fc447f5, 0xe27a0f7a, 0xb05d624f,
11366 0x5fb067ff, 0x141602fc, 0x9971919f, 0x62af3af8, 0xc47547cc, 0x3bdadfc8,
11367 0xf304b3ce, 0x3386ba3f, 0x8f5053e7, 0xa215b529, 0x72cfb53c, 0x66fc61b6,
11368 0x9fee29f9, 0xf98f3e5f, 0x79012a96, 0xca2c9e05, 0x05bc4203, 0x0a7607fa,
11369 0xac53b6f9, 0x5fe4f41b, 0x5abaf9e3, 0xa4f403e2, 0x756e87c4, 0xed784aab,
11370 0x02a7af0a, 0x43fedaf0, 0xf919fd78, 0xe48b9df2, 0x852f0fcb, 0x9171fe6e,
11371 0x8c4bf374, 0x3b090c6f, 0x578867df, 0x67407ced, 0xbef88347, 0x78db3a07,
11372 0xf9d2f189, 0xa7a89fe6, 0x5dfae142, 0x5c28427c, 0xfaeb1657, 0x5166bc91,
11373 0xd57a70ce, 0x4ffe6096, 0x12d891e7, 0x1e7a5c86, 0x3b7bfac9, 0x1967888d,
11374 0xd5eb9107, 0xf6c88fe6, 0x0f25169a, 0xbb859fcf, 0xe039d3cf, 0xe8bfdb74,
11375 0x079a101c, 0x0f9de7c2, 0x39fc8de4, 0xdcd01d56, 0xa677fc0a, 0x752748c9,
11376 0x377e3995, 0x7bf7fd0a, 0xa0e7cc0d, 0xffd811fe, 0x5ffbc60a, 0x03bcb4d1,
11377 0x305757fd, 0x479c57bd, 0x1db9ef95, 0x7c7c8315, 0xf2955ec5, 0xfe66d8bf,
11378 0x2c458ebc, 0x4c74ff41, 0x02398e81, 0x8aeb19e0, 0x78008e62, 0x07b78dc6,
11379 0x7939e5d5, 0xc13798ae, 0xfde82bdd, 0x82b31ba4, 0xae78a7fa, 0x3a9e7a08,
11380 0x9ea8372b, 0xa822375e, 0xa385ef7f, 0xde99ea83, 0x67fa836b, 0xaa0e4c37,
11381 0x1cde34e7, 0xab18ffd4, 0xec147c7b, 0x5bfa3fb3, 0xebcc3f00, 0xd60cb8ea,
11382 0xb7ac433b, 0xa0f29aef, 0x5afd81f7, 0x53381e31, 0xcf17c990, 0x00abdf8d,
11383 0xff08671c, 0x39bee5ce, 0x55cfe341, 0x677e88ab, 0x048e1a36, 0xacf469fa,
11384 0xc02a4f6b, 0x38a7c6b9, 0xb95ea15b, 0xecf9f826, 0xbde81b1d, 0xf6e0bed9,
11385 0xeb839bb9, 0xd29cde83, 0xb901e79f, 0x4672bf29, 0x87dfb042, 0x9989d085,
11386 0xb599f4e4, 0x7aa5ffdc, 0x24e86afb, 0x27ec5f18, 0xd0438dd2, 0x9839298d,
11387 0xc11d226e, 0xfaf95374, 0x0708a1d6, 0xfba3fc2d, 0x0bc9e869, 0xfe007eff,
11388 0x7d306716, 0xfb4ee169, 0xec567583, 0x95efd850, 0x6acfb850, 0x2a797879,
11389 0x633b850b, 0x1fd7233e, 0x688fedc1, 0xd981fde0, 0x89ca18f3, 0xa8163bb3,
11390 0xe3638718, 0xecff3c79, 0xed07af8e, 0x2f898473, 0x97c484e5, 0xf80425d6,
11391 0xe97c647f, 0xaf19c634, 0x67111764, 0x844ffddc, 0x8f00c807, 0x0b11f301,
11392 0x71dd119c, 0x3c7f48c5, 0x653f2b49, 0xb9e3fa09, 0xfe2bd204, 0xbc3d6c78,
11393 0x03e6343d, 0xc653ae37, 0x8ebe64e5, 0x930a2bcc, 0x8497fc9f, 0xb40fcc04,
11394 0x75f9e347, 0x3a7cfb4b, 0x22bcc977, 0xc302f226, 0x4fa4ffd8, 0x14d7f19a,
11395 0x26760bb2, 0x0afebd70, 0x176dd78e, 0xa92fbc88, 0x471a7bd7, 0x2a7adfc6,
11396 0xc52a5d95, 0x2894bb13, 0xf46153e7, 0x3f0947ca, 0xe685bf51, 0xa8147f8f,
11397 0x38ee6a47, 0x0bf507bb, 0x6c63fdc0, 0x6f4058b7, 0xfdbd7e2b, 0xd12b68bb,
11398 0xaaebd76b, 0x9c342faf, 0xd8c47089, 0x222d8e01, 0xe445afdf, 0xd6f5c9fb,
11399 0xf4baa445, 0x9c1ed879, 0x8ae327ff, 0xc28dfdda, 0x3afe71fe, 0x976417bc,
11400 0x76e5cf2c, 0x870169db, 0x276e160d, 0x9db91318, 0x1f39ab50, 0xfb7036d5,
11401 0xacd7a40c, 0x8c718096, 0xdfea1689, 0x4c685cdf, 0xdf8471c4, 0x42a67965,
11402 0x4572c576, 0x77e47b21, 0xfcf4d1b6, 0x868509cf, 0x6fffe844, 0x6011af31,
11403 0x16636588, 0x93438f5f, 0xe892fe17, 0x68c252ff, 0x36898d2a, 0x5db67fe1,
11404 0x6a91f481, 0x5da91976, 0x8aa71f0d, 0x1afbe44e, 0xb464f229, 0x42718071,
11405 0xdfdfa26e, 0xe2d2edc4, 0xfe4189b1, 0xf18cf7fe, 0xd0afdfc2, 0x53942eeb,
11406 0xef7814bf, 0xeaefffc9, 0xf1476b67, 0xaffff5ad, 0x7ffee48c, 0xf1081f19,
11407 0x85c73bff, 0x1e23fff5, 0xfe7eeda2, 0x2dd893e9, 0x3e50d29f, 0xea7a30ed,
11408 0xb5d5fcf1, 0x6878ec1d, 0xa4ebe7ee, 0x7dc0c0b8, 0x673c4ed9, 0xbb64cf2d,
11409 0x4b6f482c, 0x7f3b4318, 0x696ea747, 0xe95f3c24, 0x3e7c3665, 0xbf3f2d7c,
11410 0x3871ae55, 0x0e529b71, 0xfdc89d5c, 0x1f380687, 0xbdf1725b, 0x27186dc9,
11411 0xd9953958, 0xb2350d51, 0xda2b22c6, 0xd8596b45, 0x4168e3f3, 0x770a134f,
11412 0x4276fe51, 0x0fb7cf17, 0x7693a7ed, 0x73e2217e, 0x2ce79758, 0x7971cf8f,
11413 0xcf112242, 0x5f3aeda9, 0xb27d73b8, 0xa46ae8ad, 0xf0be81af, 0xc29188e7,
11414 0xbb32e64f, 0x03f8e227, 0xd87cf1b7, 0x677f294a, 0xf01e98e8, 0x75e0453e,
11415 0xd79e5aca, 0xff7fcec1, 0x45ed2abd, 0x9433e346, 0x2d53952b, 0x5513f43e,
11416 0x697a64b6, 0x99c56e5d, 0xe5a2f283, 0x2bd6376d, 0xe86df3f3, 0x9dfd7097,
11417 0x91fb4729, 0xfcb8c9a9, 0x52a3b3d2, 0x8f1e909e, 0x64d438a7, 0xf1236f41,
11418 0x72409cb0, 0xc034657e, 0x92ed72bb, 0xf3d7985d, 0xc5191ffe, 0x5da80e9b,
11419 0x5fb07143, 0xe6167001, 0xa567a962, 0xa648b7e4, 0x718aa671, 0x7982ffbc,
11420 0xfef3fc23, 0xda75e5aa, 0xf30301cf, 0x9d1d0046, 0x038379de, 0x09e5eeed,
11421 0x93cfe411, 0xaa83da71, 0x42523ee7, 0x5c1aaefa, 0xd12d4dda, 0x9c83f436,
11422 0x3a61f9de, 0xb93e4dc6, 0xed05ace7, 0xbbe87fd8, 0x7c2f982c, 0x16bbd17c,
11423 0x93f1c017, 0x9de52a45, 0x86f42add, 0x897dfb84, 0x271fee1c, 0xdc2117ba,
11424 0xddfc5b6f, 0x2a3cc0d0, 0xe88130b6, 0xa54fb679, 0x9cb75c90, 0x168d1cdd,
11425 0xbabd774a, 0x2ea82e39, 0x89b540f5, 0xbf3b85d5, 0x69e824bc, 0x6306d376,
11426 0xf7e703aa, 0x38fa42ac, 0x7474e7ae, 0xe7c59b7c, 0xa7aff4cd, 0x11b069bc,
11427 0xb47f83ed, 0xea2b5898, 0x81877d33, 0x8abb49e7, 0x8f0ba015, 0x9d76bfc0,
11428 0xa68e5e7b, 0xc63e66f1, 0xcc1947e5, 0xebe010b5, 0x724d9969, 0x998fbb41,
11429 0x25c6389f, 0xae675c01, 0xe3fa1850, 0xc022ffb0, 0xfde1679f, 0xa5fda15f,
11430 0x379967dd, 0xf9480e58, 0x3cf02955, 0x79f821bd, 0x696fcb65, 0x43cc199c,
11431 0x27602079, 0x735f9e69, 0xd80af50c, 0x67ed4147, 0x519b66f6, 0x14496f8f,
11432 0x6ca1edf1, 0xfef0f7d8, 0x18ec88ae, 0x927e184f, 0x36c5c9e5, 0x17cfd622,
11433 0x7c795047, 0x5172a331, 0xaae3a722, 0x44efb796, 0xc766a97b, 0x738e2316,
11434 0x9681f1c9, 0x999bd613, 0xe896ef5f, 0x1e21af3d, 0x28252cd9, 0xe1b3504e,
11435 0x32ec91ac, 0xd1529f01, 0x00f08a5e, 0x1cc2dc3c, 0x503cf1ab, 0xc7f0655a,
11436 0x5bffe0e9, 0x60c3bf72, 0xd1da80bf, 0xb5173991, 0xb94fb95f, 0x5abcf96f,
11437 0xf30c7a05, 0x4583e4be, 0xd8cd1f42, 0x2f796938, 0xcefd5100, 0xfc9d1963,
11438 0x78f649bc, 0x516bc091, 0x8f64fdc4, 0xe3d88517, 0xb7dc3dec, 0xe64ac7a4,
11439 0xa5a23d24, 0xcc07493b, 0x23f7a06c, 0x4ddebd84, 0x120f2d6f, 0xcc3d245c,
11440 0xe4685d5c, 0xc8c79be6, 0xb26f4aed, 0xa326d7f0, 0x30e816bf, 0xba063ec8,
11441 0xed6baa0b, 0x9d0d2ff1, 0xb41f2819, 0xe7ccb876, 0x60e7c2d4, 0x9a5fcf22,
11442 0xb38d70e1, 0x8073c00d, 0x85f9397b, 0x10ca46f1, 0x3dc6dbe4, 0x6edf2377,
11443 0x0ff37ce4, 0x92b30f41, 0xf049113c, 0x9af4b3dc, 0xe77fc41a, 0xf2065312,
11444 0x8a6967b3, 0x3dfd0f1a, 0xc39214ab, 0x18a697a3, 0x97d3ce11, 0x7c871e0d,
11445 0x345ccb9d, 0x1638b4fe, 0x9c186ed6, 0x7947e5c4, 0x6319819d, 0xf4462908,
11446 0x506a9f0b, 0x9a8c2fc8, 0x6be02264, 0xf557c096, 0xa4adb78a, 0x6ff01caf,
11447 0xe01f5e28, 0x2aeab33f, 0xee701f09, 0x52c7cb08, 0x66b154af, 0x3b8c0a63,
11448 0xd11b6567, 0x82479c31, 0x95b2d7fa, 0x66eaaf84, 0xd5dd7b4d, 0xb9d83f84,
11449 0xb589cf11, 0xf79f823b, 0x8276124f, 0xbe913993, 0x225a773d, 0xb471af30,
11450 0x4ad94f80, 0x6b7286c5, 0x84b6b2fa, 0x7d3ea01b, 0xed84eaaf, 0x8587c374,
11451 0x1f2823fa, 0x1cdecced, 0x719c57f2, 0x9fb09238, 0x52edcac7, 0x8619ef45,
11452 0x3ce2d3ed, 0xd8cfd0c3, 0x618591f5, 0x73a1df7e, 0x11e4732a, 0xfca20f95,
11453 0x341b1b2a, 0x2fbec029, 0x3112d833, 0xf365e91e, 0xb83dc593, 0xd4f84088,
11454 0x7e24ac46, 0x887e45a8, 0x34c3f3f0, 0xdda17b8c, 0x7942a2f3, 0x30476c84,
11455 0x34709fbd, 0x9091c226, 0x9033efb9, 0x8a6f2e9c, 0xf971f3a5, 0xea2322b2,
11456 0xb16df2d5, 0xf9c11f64, 0x86cbbdf4, 0x6879f1fa, 0x649ede59, 0x39bcb718,
11457 0xe306a9d3, 0x19dcf431, 0x0d39ceb0, 0x8efe2487, 0x23bf80f4, 0x7807f0e1,
11458 0x4f2f6a0b, 0xe0497212, 0x238a2d8d, 0xef3a5abd, 0x58089cd5, 0x48ba99d7,
11459 0xe9ec93ca, 0x8c66c47c, 0xe903fca0, 0xabdf1abf, 0x7944cfdb, 0x0e57673e,
11460 0xf169fc21, 0xd3dffe36, 0xcbbda187, 0x68616efe, 0x66cb4d67, 0xf6864db7,
11461 0x6fce14db, 0x19afead3, 0xddc4768f, 0xbd9e5c49, 0xd5d07205, 0x41b7b197,
11462 0x0e40ba0e, 0x11f20bbe, 0x4e2fefeb, 0x8b87faa6, 0xb47e541d, 0x47951fb8,
11463 0xf25fbf84, 0xd102101d, 0x2e2492ed, 0xc9249717, 0x6482faf8, 0xffc66934,
11464 0x3a21ddfb, 0x6c67de1b, 0x9d36309b, 0xc15cebb1, 0xa9c6f7fa, 0xd3b5fac1,
11465 0x8c971b60, 0x0a15dbe7, 0xeee5a3d9, 0xe1fd4191, 0x7bc464dc, 0x9e5fac2b,
11466 0x86f49dbf, 0xe81938c3, 0xb8e2a6f1, 0x37d7fea0, 0x9fd506a4, 0xfad07248,
11467 0x0ecf8d26, 0xb4b9bf6a, 0xecbd507f, 0xa431919c, 0xf1014777, 0x679102cf,
11468 0x8e770704, 0xfbef1b17, 0xa4b0dd75, 0x5fbd60bb, 0x73d033ef, 0x5e243e2d,
11469 0x9951ac67, 0xbe9bc607, 0x2c1fe406, 0x74e348f1, 0x0e2fafe2, 0xb25ce858,
11470 0x7f6f29bc, 0x350fd401, 0xe80f2819, 0x55b8b2d0, 0x6a1daf68, 0x2832b04a,
11471 0x6155cb3d, 0x2c8cd8d7, 0x2d15de40, 0xa6f9425b, 0x93933e65, 0xef7697ec,
11472 0xc0eeb293, 0x122e2af3, 0xd53de4f9, 0xfe10aad7, 0x67df045c, 0xe15ee922,
11473 0xf127b071, 0x4ef4e12a, 0x0ae3aebe, 0x13f5865b, 0xb9f71f91, 0x6a71d60b,
11474 0x0e856362, 0xbeea15fd, 0xcf9f9204, 0xb6e90cab, 0xf2819e74, 0xafbf660c,
11475 0x533ac06e, 0xbe395372, 0x66a3ca55, 0x7c6898cf, 0x021405d6, 0x6d3c16fd,
11476 0xae01ea7a, 0xfb7d78ff, 0x8203df40, 0x8e8e913e, 0x2c5732c7, 0xf5a1562d,
11477 0xc276fe7e, 0x87ee7c06, 0xee106fa7, 0xfdc1bd7b, 0xefe01266, 0x20df0af3,
11478 0x128b6f92, 0x70b4af88, 0xf2e4623f, 0xa07c8bcb, 0x9fa6e5f8, 0x7e9296cf,
11479 0x26706e98, 0xe56e493a, 0x3adca0a7, 0x7640d2b2, 0xacbbd330, 0x3e8f4893,
11480 0xe72c744f, 0x8c77a239, 0x691df5c3, 0x5f9864c8, 0xa552be51, 0x1fd20af3,
11481 0xe7e3efef, 0x0f5587d4, 0xdbcc24d8, 0x525878a0, 0x3edcdd28, 0x5de5186f,
11482 0x596ded6a, 0xeabc097e, 0xe64bb009, 0x8179e4ec, 0x3f53bf2c, 0x3ee06075,
11483 0x3cf9f196, 0x4af94105, 0x1daf5955, 0x2ec8eb34, 0xc273c18c, 0xa254f789,
11484 0x8d5913b3, 0x9f019343, 0x86bb7527, 0x2ff505de, 0xea8f7a26, 0xda223ea1,
11485 0xeb842ff3, 0x0ccadd5c, 0xfaf30b25, 0x091aaf0f, 0xacfe7def, 0x2e6c49c1,
11486 0xcf39fcec, 0x43fdeecc, 0x1bd815f6, 0xe1ddb8bd, 0xcffbc14a, 0x1acd1d73,
11487 0xc7c3807b, 0x00204981, 0x056adb17, 0x7876376d, 0x3c01e588, 0x31d74f57,
11488 0xe079e04f, 0xb1e3c8b0, 0xa873f324, 0x24a61bb4, 0x5d333973, 0xbd9be9c7,
11489 0x037a70ac, 0x0f502afb, 0x173db948, 0xbf55aaf3, 0xbb72901e, 0xfe52358a,
11490 0xdb99238a, 0x1f15b32f, 0x9835ddd9, 0x2bfd0289, 0x56683c6c, 0xf3e4d9b5,
11491 0xb698d265, 0x7a60fb40, 0x73279732, 0x8e3ecf8c, 0x3ac95be4, 0xfd353ef8,
11492 0x2af8373e, 0xf543323a, 0xc36d854f, 0x6f8d3b32, 0xb79fa270, 0x756bf052,
11493 0x256be2a3, 0x51eb853b, 0x299d57e9, 0x3f56a8f4, 0x8d25e885, 0xd1a99a3e,
11494 0x5831acbb, 0xe97ac2cf, 0xaf5cb2de, 0x68ee9d76, 0x0e61c10b, 0x6ff50bac,
11495 0xa7b7c785, 0x38add684, 0xeb21a301, 0x31ee64a9, 0x780fb8b1, 0x5d08eade,
11496 0x215f769f, 0xd4fb15eb, 0xf9c2bbae, 0xbbe62b55, 0x04293554, 0x243eed2f,
11497 0x9c76b43e, 0x97854bc4, 0x45a2b7c3, 0xd67e7c21, 0xf2321f6d, 0x61ba4b6f,
11498 0xe02ff0cd, 0xb047497d, 0x6f9412af, 0x1e41ab95, 0xd3d28667, 0x456cd61c,
11499 0xad61a9ba, 0xdf9053cb, 0x1faf9b5a, 0xb5867e8e, 0xa9f9d36f, 0xa39aded4,
11500 0x7a50058b, 0xbf8e5773, 0x17e74fca, 0x5cfc278a, 0xe9ddc3f0, 0xe01e9fa5,
11501 0xeaa37335, 0xd4141c8a, 0x7a3fe44f, 0xbcb38e09, 0x63fa235e, 0xe53f0967,
11502 0xab59d685, 0x2e5ff7e7, 0xcf015eb8, 0x0fdd7b9f, 0x7764f727, 0x76173f85,
11503 0x3d1a5bdb, 0xfb81b1ff, 0xfe7ca55b, 0xff22ef5a, 0x3b0bb42e, 0xe3c6ceac,
11504 0x9eb91a7d, 0xbd724f9e, 0x3979e842, 0x5b35d1cf, 0x13305e29, 0xf68080ed,
11505 0xa56f56cf, 0xd9f1a578, 0xcbb45699, 0xbe99ae8f, 0x8f52f30a, 0xbd274d36,
11506 0xa97bf95f, 0x40c63df7, 0x4d68a27b, 0x907bfad9, 0x5247378e, 0xdda2b15c,
11507 0x2045ce23, 0x639fa167, 0x6cab970d, 0x95b39735, 0x90071fa8, 0xfd8bec7e,
11508 0xf4f0acee, 0x68087e45, 0xe779bd27, 0x779fcf74, 0xfe77b8c2, 0x25e9da29,
11509 0x755ad850, 0x5adbcf64, 0xcf563f51, 0xde20f0ff, 0xe07b01d3, 0x7b4b5ffd,
11510 0x0645aa00, 0xea325b4f, 0x54076121, 0x6c321bab, 0xbd083768, 0x7f801ff1,
11511 0xe7f87844, 0x11cbfc12, 0xdbf101fe, 0x9c381b4f, 0x7fe06ba7, 0xcbc72578,
11512 0x2b6ca6f2, 0x6d3f2f9e, 0xebbb26c8, 0x821ca6d3, 0x00078cff, 0x1f5fdcfe,
11513 0x0035776c, 0x817cf1fc, 0x96f587f0, 0xfc043bb7, 0x0dfe1c9d, 0x256cee1c,
11514 0xc084672f, 0x57f94bd9, 0xe4d1fe77, 0x78e23b44, 0x57d92b64, 0xaca8b7c7,
11515 0x932ec03e, 0xac37d176, 0xdfb449f1, 0xf767fc24, 0xf28418e9, 0xd7e1f4a7,
11516 0xd98788ac, 0x3150785b, 0x95ccfe04, 0xeec7f144, 0xa8edbbf9, 0xdd5f116f,
11517 0xe245d476, 0x19b986a9, 0xd796c7e9, 0x4239e00e, 0x45bf7171, 0xb66fbc8d,
11518 0x19bef823, 0xda9592e6, 0x8ce2c5d1, 0xa4f5c088, 0x79d3ef69, 0xbebdc618,
11519 0xd6eaf9cd, 0x5de7c4f9, 0x25b97941, 0xfe80d5ac, 0xd0acd636, 0x05eaed3d,
11520 0x8642d685, 0x5a3ab571, 0x09453387, 0x56aecbca, 0x564f6475, 0x447c4519,
11521 0x892455e4, 0xdc29497e, 0x629c902f, 0x2474f2a3, 0xda707d23, 0x7de1f462,
11522 0x255f382a, 0x9ddefce3, 0x41dbc226, 0x5fc0135c, 0x333f0a35, 0xb7a442a8,
11523 0xd3a7185b, 0x297bcc5b, 0x972707ae, 0xa71fa875, 0xc939342d, 0xa18f8dce,
11524 0x42cdd2f8, 0x5e62ddde, 0x313d46ee, 0x61746ccd, 0x317ae309, 0x1a30d7f9,
11525 0x0df987a6, 0xef748cbd, 0xf3a234b0, 0xdf123c59, 0x8ef87c96, 0x95ea5808,
11526 0x1fa38e60, 0xf6dd7e18, 0x5e285c7d, 0xf609f8fc, 0x8546d74b, 0x170c8bf7,
11527 0x2e5c5070, 0x609b3ff2, 0xc75828ec, 0x6f0714a8, 0x3fb8d877, 0xc9e02d7a,
11528 0xb6afc7e2, 0xfc79799d, 0xb1f30ab2, 0xbc58f7f9, 0x5d541f24, 0xc8cabd50,
11529 0x62794f9f, 0x34eaf143, 0x8e61dec6, 0x2ab78881, 0xee782194, 0x61f18b2f,
11530 0xf43aef7c, 0xd4b1db87, 0xd64cbd13, 0x978eaf33, 0x0e3b660d, 0x25e3fdc7,
11531 0x2abf9e02, 0x0031ad60, 0x83d7d6f7, 0xb437f3fd, 0x02fb5aea, 0xb7d3af7c,
11532 0xea7d21b6, 0x1b061c22, 0xaf1ee3cc, 0xa539e2e4, 0xadc5e96a, 0xa689e2b7,
11533 0xa0a3d5e2, 0xacf9e3ae, 0xfee6bf5d, 0x59805b89, 0xeab76e11, 0xcb9abb59,
11534 0x52e100e9, 0xa978776b, 0xe2853cdf, 0x202e3237, 0x86183ff1, 0x2de3c40f,
11535 0x4e307d62, 0x37df1583, 0x7cd7c786, 0x8ccc2f81, 0x15cfb846, 0xf257377c,
11536 0xbf30535b, 0x0478823d, 0x2ed0553e, 0x22ddb806, 0xe2f89eca, 0x476e14a1,
11537 0xcfc2943f, 0xe25cf7ef, 0x95dccc7c, 0x82797941, 0x7c4daa5f, 0x75ff397c,
11538 0xc5307ca2, 0xf5cbe34e, 0x8a7ebd00, 0x0240e8e3, 0x691ebd20, 0x68fb27ac,
11539 0xc3880b16, 0x49fbfa65, 0x77ad0eba, 0xf7dd11cb, 0x66bb1a58, 0x5f95e820,
11540 0x8e513a44, 0xce6c62de, 0xf68733a9, 0x52e67193, 0xefa061d6, 0x993f4903,
11541 0x55633fd0, 0x9535e533, 0xf41efc2a, 0x578b42e9, 0xc7e27607, 0x067bbe22,
11542 0xa79c46ec, 0xfca15634, 0x773169af, 0x975f2096, 0x2c7a8d5a, 0xdff1163f,
11543 0x8d17595b, 0x2b2d89ff, 0xdf8606e6, 0xe631504d, 0xa4f80b07, 0xadfb05d8,
11544 0xebc3f947, 0xe4695d2b, 0x4ff5128d, 0x665c61f7, 0x03a079ea, 0x762e1faa,
11545 0x5fa7bcc1, 0x91d9cf15, 0xfa7e7c62, 0xdecf413e, 0xe9de34e3, 0x53f3e4c7,
11546 0xf90af9fc, 0x7f5e2bfc, 0xea2f8e50, 0x2f9e6b0f, 0x827f3cd1, 0xf89f5bd7,
11547 0xf68bd8aa, 0xda4e68eb, 0x921423a5, 0x37214657, 0x12b6974a, 0xbb754b9c,
11548 0xb59a3978, 0xdc2ff2ea, 0xdb8a64ef, 0xf7809298, 0x50588fce, 0xd533ff0f,
11549 0x7e814c65, 0xfe79269f, 0x499ce586, 0x7288d78a, 0xe91f3df7, 0xf21e9285,
11550 0xae428d27, 0xa6e5ea9f, 0x831ea5f7, 0xf1c3de71, 0xbb9c752f, 0xe4f9c743,
11551 0x4d738cc7, 0x4738c86a, 0xfebecc7f, 0x24e1ca9c, 0x517691c7, 0xe94bba71,
11552 0x663afc85, 0x70bf9064, 0x18cebdee, 0xcc314bf4, 0xcfd00377, 0x919cda5d,
11553 0x7dcfe307, 0x0a8cc5ee, 0xbe849bb4, 0x32a739af, 0xdaa3c817, 0x5f950a73,
11554 0xc4647db4, 0xdb35b37b, 0xa0e38cda, 0x45942d5f, 0x12aaeb01, 0xa77d04eb,
11555 0xa7a01c9f, 0x4274bd8d, 0xf3cc3c6e, 0xa13b9e32, 0xd5ce7c47, 0x3dfd1f35,
11556 0x4a11efea, 0x97f2f8d8, 0x7b077f62, 0xee611fb8, 0x6151e5c5, 0xee34576f,
11557 0x390614f3, 0xfaa2fc60, 0xbf02f9f0, 0x1528eb12, 0x50fa6ffa, 0xe003844b,
11558 0x1e3de43c, 0x9b58af5f, 0x62fe8b99, 0x04e8f263, 0x7e8f5b82, 0x67ee2ed6,
11559 0xd67ee16d, 0x02c77b52, 0xbb994efc, 0xf883ec57, 0xbf09b2dd, 0x2c067c93,
11560 0x378eef0b, 0x89bf7ac9, 0x3f714663, 0x7ef3d618, 0xf220f99f, 0x6e28decd,
11561 0x361b4ecf, 0x43e50a30, 0xceb46667, 0x4facfc06, 0x4af7732a, 0xc6abf6c0,
11562 0xc9a17b61, 0xe08ca7d2, 0xf42e88cb, 0xb8feee49, 0xfe8fec4e, 0x35b18f11,
11563 0x87d806e1, 0xee950de7, 0x45067803, 0xcbc5c27b, 0xe5c5ef2f, 0x8d97bbb9,
11564 0x0757b1e0, 0xaff5cceb, 0x760fce43, 0x180e82fd, 0x94d2c8ef, 0x30380fc1,
11565 0x5d78531e, 0xfcff04af, 0xa33c92b3, 0xa23fe702, 0x68f07d63, 0x18ebb171,
11566 0x1d71f02e, 0xf74a06c2, 0x80b7a028, 0x31e4def3, 0xa9f541d1, 0x15cc71c5,
11567 0x9a9dbfe8, 0xb1bf541a, 0xffa83b34, 0x07fa33cd, 0xea689f3d, 0xb00bafc8,
11568 0x97b67b67, 0x5a9f04bc, 0xed0a258b, 0xbe5a4fba, 0xb416e0f9, 0x4eaa3703,
11569 0xef6759b4, 0x48c1f4dc, 0xf00675e8, 0x497e471b, 0x3ed1f907, 0x7a747997,
11570 0x7e303e97, 0x50758a74, 0xd73ca2be, 0x68dc6c5e, 0xf29dadae, 0x78ae7f09,
11571 0xe25ebcd1, 0x72cb9bfc, 0xa99e3f51, 0x79fc9f7b, 0xcfbe6635, 0xe21e2f53,
11572 0xbd442ddf, 0x357f7402, 0xe2f688be, 0xc0fc1039, 0x0e3b45ff, 0x86cd9c51,
11573 0xf7b44dc1, 0xf1e9e6d3, 0x942d64fe, 0x81c65fa8, 0xba018adc, 0x036368e9,
11574 0x48de61b7, 0xe5db85a6, 0xbf90a6e7, 0xf7146f7c, 0x8c4decfb, 0xcc48efa5,
11575 0xda86b86d, 0xd345ce6b, 0x1da96ff8, 0xfa2f28e3, 0x13e28505, 0x2da75313,
11576 0x8decfdc5, 0x1db80ef2, 0xe7f89de6, 0xdc23c7ab, 0x7bf1b66a, 0x77d51302,
11577 0x5941e7f2, 0xbd0d78d5, 0x7b65513f, 0x621fb015, 0xe342ddce, 0x001b444e,
11578 0xcb50eaea, 0x5597a803, 0x3f9f6b63, 0x5a31bca0, 0x9ed4de48, 0x26f7a48b,
11579 0xfdfd7114, 0x0c4f217b, 0x635d7c9d, 0xe7a24dcf, 0xbd7c2e92, 0xf7f282b2,
11580 0xf51b090d, 0x4321bdf8, 0xaffd42a7, 0x4a9fd73d, 0xfa37dfb9, 0x2fbe91fd,
11581 0x7af84860, 0xbe8de61c, 0xc8d8af11, 0xe3c8d12c, 0x62c375b3, 0xd5791858,
11582 0x9e39cf3d, 0xc73a6c6f, 0x3bff8ff3, 0xe417f5cd, 0x9d4592c3, 0x31178c7a,
11583 0xe10d8473, 0xd8305255, 0x67c01151, 0x8c9baeea, 0xeac31f88, 0xafa88db7,
11584 0x0516504d, 0xf916af3c, 0xdd795a58, 0xfc83e422, 0x3fd49b8e, 0xd106792c,
11585 0x4136ade7, 0x9e8f82a0, 0xdf2c7c16, 0x0e33a0ef, 0xf73b71e0, 0x79a6b7f3,
11586 0xd13942de, 0x7c6ec851, 0x4767e49e, 0x7e69c606, 0x9e03f5ae, 0x1bb21423,
11587 0xbeaf293b, 0xc3a1c0a4, 0xdd7bc0f8, 0xf3f3877a, 0x26d1f685, 0xca96fdf6,
11588 0x6fb8e216, 0x1d97f2fd, 0xedaf182e, 0xd43cbcee, 0xcfde720b, 0x0b7bf17a,
11589 0x1e75d6cc, 0x2fb587cf, 0xef903b47, 0x0ce1e227, 0x4d3ba2e3, 0x76816e74,
11590 0xbed4778a, 0xef0a7a6c, 0xe15ad5bb, 0x17f30afc, 0x8ad912bd, 0x4af6dc74,
11591 0xc7f51ea4, 0x9f3dbd1d, 0x5e8a7c21, 0xcf063be9, 0x9316ae8b, 0xe3fd919e,
11592 0xb6f24a3a, 0x485ef587, 0x4ce9697e, 0x81a7a7f2, 0xa0994bf3, 0x7fc172d3,
11593 0x6747c11e, 0x0f8892eb, 0x45822ecf, 0x91753c63, 0xda1b7032, 0x7d0b0e0b,
11594 0xe5f24e97, 0x411f3c44, 0xb1fec4fb, 0xeaa18f74, 0x1f106c5c, 0x14cb9f56,
11595 0xed471dfc, 0x05cadf92, 0x7d84989f, 0xb5d04331, 0x3f245bb4, 0x624f74b2,
11596 0x6263ec2a, 0x95bdf03d, 0xc8f9fee2, 0x31ba7e4f, 0x80be90da, 0x022b926e,
11597 0xedbea7f8, 0x8a768626, 0x744dde29, 0x40ca0333, 0xb766653b, 0x971b629d,
11598 0x592feb08, 0x7bc3a996, 0x6a79f29b, 0x7fd1a5ea, 0x27c8aa44, 0xa0e6b730,
11599 0x8ba86b5d, 0x9a7de274, 0x1e3cf133, 0x87057f34, 0xbb837ce3, 0xf98ced08,
11600 0x3fe4284f, 0xe503fb43, 0x7503d0d2, 0xcabf40c6, 0x5106e74d, 0xb9ca7d3c,
11601 0x2634a8cb, 0x38472e7b, 0x5ebb9d94, 0x8fd06be0, 0x710e3f8a, 0xc192bf71,
11602 0xc86e7267, 0x4792bf44, 0x4f1f3c45, 0x0347b667, 0x546b7de3, 0xb8c98ff2,
11603 0x9933f4a4, 0x804fdef0, 0xdf46fd3e, 0xa3df4198, 0x0a9dfad1, 0xb93ffeb9,
11604 0xbffa40d1, 0xa19dedaa, 0x79fe783a, 0xf5092ba6, 0xa7837ac9, 0x6733f708,
11605 0x0339efb2, 0xb83ee7d4, 0xe1dc3ad5, 0xbeb36787, 0x69f50735, 0xfd11c033,
11606 0xd52bcd5f, 0xf76e3ef1, 0x1a38f344, 0xcf496fa7, 0x739f3a5a, 0x73e09b2e,
11607 0x7a44ceb6, 0x2dd02ce8, 0x5243d00b, 0x2f3948ef, 0xeba48ff5, 0x5f973d6a,
11608 0xca18e6d5, 0x9debf323, 0xa442ee49, 0x1f3c7ebb, 0x9e77afd0, 0xf902355a,
11609 0xe53c74e0, 0x21bd4b5d, 0xc585e0f9, 0x244794c9, 0x03e492f5, 0x7ca5cf29,
11610 0xf52f7497, 0xfd3fe8d6, 0xc3bfd6ef, 0x3cd293af, 0x7d02a577, 0xfae7ab5d,
11611 0x85bd5aeb, 0xfc6c67e8, 0xcdd23d24, 0x43d1cbc5, 0x0a1e8e42, 0x3d35a392,
11612 0xa94581e8, 0x1c5e7e52, 0x7c11cc1f, 0xedc4de33, 0x81f39448, 0x8da6b5e3,
11613 0xb1f7087e, 0xd9eb953a, 0x3ddd6b9f, 0xa9d5ffc9, 0x97ff2697, 0xfc9c5ea4,
11614 0xfe54efff, 0xbcad0a9d, 0xa3710fc7, 0xf3bd3fbc, 0x83ea1f72, 0x03f40c83,
11615 0x6896c1ea, 0x0fa126c7, 0xc5445f48, 0x1f487ef8, 0xfe9ef614, 0xf5e1a9df,
11616 0xff6c66c1, 0xd240fab1, 0xc91be497, 0xb42f9227, 0x62f9247c, 0xbce16fc2,
11617 0x8b7a7888, 0xd6aa8fdf, 0x0e289b7b, 0x8c1e88e9, 0xc76dd9fc, 0xdf88536d,
11618 0xe084f442, 0x04bf3f1f, 0x1fc90deb, 0xff245f92, 0x98fe0b54, 0xf243f829,
11619 0xf9b56ec5, 0x0a9811d1, 0x08f9e690, 0x93e488e5, 0xfab5e7aa, 0x42ba47a1,
11620 0x199b234f, 0xae90c75f, 0xa40ca1aa, 0xfc0f532b, 0xf512f070, 0xa48bbec2,
11621 0xf3feafa7, 0x0f55f4f4, 0xa7e674f4, 0x1da853d0, 0x03be61fb, 0x1f3673d6,
11622 0x9fa66de4, 0x8dfc26de, 0x9b21fb71, 0x46f6079f, 0x35ee7df1, 0x67ff93a6,
11623 0xcf3cf7c2, 0x3303da57, 0xd241bf85, 0x01d81e69, 0xf8fc4369, 0xbcc0f3c7,
11624 0x847b938b, 0x877c5367, 0x3327cf11, 0x03b40ca1, 0x537fb27a, 0xee4d2ed3,
11625 0x17fe8a45, 0xb480f3c2, 0x1c6edd9f, 0xaf1e1690, 0x027ed303, 0xa262275e,
11626 0xb22bf92a, 0x00a35c4b, 0xba890f3f, 0xc2094fb7, 0xf902faf1, 0x2e55b2fc,
11627 0xd607ca3d, 0xf475ddfd, 0xcaa5bc77, 0x31fece7a, 0x8f099eb0, 0x1d1fbf32,
11628 0x151d8f9e, 0x511fedd3, 0x717fbf98, 0x95fed65a, 0x451be7a4, 0x9ea74ade,
11629 0x3d4483c7, 0x8096ea1f, 0xbea6817a, 0xeab7f796, 0x3e60593b, 0x928dd209,
11630 0x0eecf1cb, 0xfa601fb0, 0x2fa8b3f6, 0xff430a6c, 0x86fc6d46, 0x5ca2cf57,
11631 0x6c50a1db, 0xde0e1baa, 0xfa070481, 0x07d5383e, 0xc65d77ef, 0x78dbcdd8,
11632 0x43b5f6fd, 0x132f7956, 0x1bdc06e3, 0x2e2b3432, 0x502847ca, 0xa199597c,
11633 0x4d3dbef0, 0x1eb913ca, 0x0214f746, 0xaf9867de, 0x77ef2977, 0xd1674de7,
11634 0x4ba6adfb, 0x5186ff98, 0xac6fefe1, 0xe4c6fd10, 0xfe7d84c7, 0xe1ca9a70,
11635 0x3406fc2f, 0x694d343f, 0xff9f7f0e, 0x1d2fc109, 0x78213f18, 0xfe855a4e,
11636 0x84a30eed, 0xc2157bb7, 0x41632c7b, 0x9f98347e, 0xbad71bea, 0x7cf41a4b,
11637 0xbc0d2ebb, 0x77bf687e, 0x03db05a5, 0x5f069bf4, 0xf7801fa6, 0x77de61dd,
11638 0xfadfbf04, 0x125af843, 0xdba0bef2, 0x5d8e9259, 0xa31ef441, 0xc67d1377,
11639 0xb4362bc4, 0x91dc6ba3, 0xe0bcf12b, 0x12d2cfe7, 0x138c9b82, 0xb4dff084,
11640 0xc8033192, 0x6fcf124e, 0xebfc855b, 0xe7f775d6, 0x1ae928fc, 0x5c0136af,
11641 0xef07f5c9, 0xeb769cbf, 0x024ff42a, 0xaa73d05d, 0xadd603eb, 0x4d66c7e5,
11642 0x7f86947d, 0xfc91ff05, 0x70007d40, 0x16f941ca, 0x08e8c87f, 0x044f93a0,
11643 0x7c894e9c, 0xdcd18ef2, 0xe2c8ec9e, 0x3c6977e5, 0xa099f52e, 0x9e9253cb,
11644 0x90e002a2, 0xf43f4416, 0xf60221f7, 0x29ba704d, 0xbdf3f25e, 0xbfc0c525,
11645 0xfcfe761d, 0x66fed67f, 0x5fcd3795, 0xcff78ed7, 0x2096f7b5, 0xf7c7ba5c,
11646 0x768fda2e, 0x6e024dc4, 0x67bdaddf, 0xc08077bf, 0xbbffa273, 0xf41f40ab,
11647 0xa46a9e3d, 0x3e94250f, 0x2fa50d5e, 0xfa7de6af, 0xbd3d043b, 0x7950b7ff,
11648 0xcfbcd2e0, 0x17107bf0, 0x5bc0beff, 0xe3af06b1, 0xa31d7835, 0xbaca97a9,
11649 0x4afe482f, 0xe3be5cb9, 0xe312fbe1, 0xd0a9afd1, 0x3d3f2475, 0x3cf4483f,
11650 0x77e926d7, 0x4fd5c115, 0x47ed0fcf, 0x2cdc9dfa, 0xf491b5e9, 0xc39424cf,
11651 0x29f5fc23, 0xfea88728, 0xc5c60970, 0x91eafafc, 0x6fb72855, 0x1ffd9068,
11652 0x2f37fea5, 0xa6ade393, 0x8c8f12e7, 0xeefa463d, 0xafa97ca6, 0x3fb9271e,
11653 0xefbf85a7, 0xfeddff4c, 0x4687e41f, 0x6ad65c0d, 0xff4d5eea, 0x6fd017d5,
11654 0x2fef34cb, 0xa95f3cd2, 0xd4d1afa9, 0x2fdf821b, 0x1f10a19b, 0x38f01596,
11655 0xb52f96a5, 0xef4ae1f4, 0xf5ba73b6, 0xfb2662b9, 0x26af882e, 0xb5faf3d4,
11656 0x1a4b1be9, 0x75f501cc, 0x5f384a9b, 0xf7016cc0, 0x7ae6419f, 0x4307a055,
11657 0x20b3720f, 0xd9b907bd, 0xf9efab4f, 0xafe07ff3, 0x0a371429, 0xab764bb2,
11658 0x5536f5c1, 0x75bbdbac, 0x810182ff, 0x4be7d5f1, 0x63dd5cf0, 0x5cdbc71c,
11659 0x2ed02632, 0xae25cd62, 0xfeca7d80, 0x5efbbee3, 0xeb3cf9c5, 0xd1b25cfe,
11660 0x114f718c, 0x12f3b4df, 0xfa8aa5f4, 0x6ff856ba, 0x2f1e61c6, 0x5aa293c6,
11661 0x080fe673, 0xee6b27d8, 0xbb6cfb83, 0xb7dfe55b, 0x00fc07ab, 0x8398ca9c,
11662 0x33a750f2, 0xb6a5e517, 0xfc2cc4c5, 0xf76f782f, 0xd442eadd, 0xc61707d3,
11663 0x2bd35e51, 0xb17cfce9, 0xe277a63b, 0x45b7a84c, 0xb6f246df, 0x54b1feed,
11664 0xcb5d52ee, 0x2d8c6cbb, 0x894af75e, 0x1e7c72f9, 0x3bba7043, 0x2592a5fd,
11665 0xa6f7ef40, 0x8f7de83b, 0x03b896dd, 0x0c07eded, 0x0e043714, 0xe7e89278,
11666 0x3c60d341, 0xe92d976f, 0xf2b1714f, 0xc38d26c7, 0xf7e5a47b, 0xd25e2819,
11667 0x9f91b3a9, 0x58c0f3c8, 0xb19a93ca, 0xabde944c, 0xdfe57ca9, 0x7bc7ac7f,
11668 0x14eb5da6, 0x55cd4efa, 0x6dff375f, 0x1b2bd410, 0xc67ee9b2, 0x9474e7cb,
11669 0x9ae9fe17, 0x53cc3ebe, 0x47591c3e, 0x9fd0a5f9, 0x9e56bbee, 0xc92fec77,
11670 0x0daafec7, 0x428e3853, 0x47cfda3b, 0xe14fa857, 0xab32ce3d, 0xbbf30a25,
11671 0xc8c77e8f, 0x3ef473af, 0xe6ef7d13, 0xd6e7b353, 0x8f74f135, 0x767d2d09,
11672 0x15587154, 0xf4dac380, 0x29c925fd, 0xf8126ed8, 0x032d6fdc, 0x75d32f3e,
11673 0x93e90fd3, 0x5f5e588a, 0x92cdeebb, 0xa38fb04d, 0x7ca5f44f, 0xd70c84b1,
11674 0xd78074ba, 0x93d70ce1, 0xd9fb8a54, 0xc79bfcaf, 0x593a5f25, 0xb5f4889e,
11675 0xcbf5d059, 0x0313cae7, 0xc5416eff, 0xc1d13d29, 0x02c7462b, 0x5469eefa,
11676 0x6ce782ba, 0xf43883a0, 0xe710cf9b, 0x85e7a016, 0x57d8c35b, 0x3db9d34b,
11677 0x84dbf6d6, 0xba208e51, 0x29e498fe, 0xfea0379d, 0xa447fa62, 0x16988ee7,
11678 0x77752e62, 0x1ddb243e, 0x34327049, 0x3322fa45, 0x1aea7fd1, 0x4ff3a2e7,
11679 0x96c99f73, 0xfd143e00, 0xfcf2f13f, 0x3fa04fdf, 0xf13efb9e, 0x604b3ffe,
11680 0xaff6433c, 0x68bc5ab4, 0x58b31c5c, 0x838f88f4, 0x3147c5fa, 0x9d62ad3f,
11681 0xc540f481, 0x5d4584ba, 0x6e807f28, 0xdda6bfd0, 0xc0c32997, 0xc63d18fd,
11682 0x192f3f57, 0x5e781693, 0xbbf24139, 0x377cbe27, 0xc6c944fd, 0x65f33d01,
11683 0xa7cb8da5, 0xf7f8eb71, 0x58872b75, 0x7bbf74f4, 0xe89babdd, 0xc8bcf01e,
11684 0x5157bc5c, 0xf844ceb9, 0xbc58b4ea, 0xbef12bb6, 0x0b1f4581, 0xae74a1e5,
11685 0x0e19f54f, 0xca9147c2, 0x54b911f4, 0x190a3dd2, 0xf0b13c3f, 0x1d31c7d1,
11686 0xbbe673f3, 0xefc0187e, 0xe9d38b8c, 0xf92a6d99, 0xc4f1b51f, 0x1ab7d7ea,
11687 0x888fd90b, 0x4710f627, 0xe29d62ac, 0xe3e1e2bb, 0xe238da89, 0xbdc5d2bf,
11688 0xa238eeb3, 0x5187be81, 0x4588e229, 0x7f5a156b, 0xbdfe42e5, 0xee38a292,
11689 0x18b23e3f, 0xed2fa0e8, 0xc5cb6bdf, 0x7fae693c, 0x8be2992a, 0x5eaf5f80,
11690 0x99fc8f3b, 0x5e1ce975, 0xb03be265, 0x199d2387, 0x58afde78, 0xae704917,
11691 0x07f6727c, 0x7de3e44f, 0x81f189c0, 0xa09b6be7, 0xe19f180f, 0xce39683d,
11692 0xd0f725b1, 0xd68b6777, 0xf31939c3, 0x73d963b4, 0xde226537, 0xde303252,
11693 0x2e55fb29, 0xef0fbbbd, 0xd86ce707, 0x950ad977, 0xbb6b0f7f, 0xf021f489,
11694 0xb80b327c, 0xd9633e2f, 0xd72346eb, 0xa8792c67, 0xfe1db3b0, 0xc29f6cfb,
11695 0x4104fc73, 0x26b7b8ad, 0x5bef27e1, 0xf7f8e995, 0x0a754b36, 0x8902c3dd,
11696 0x7e97f746, 0xa3fdc191, 0xcedc1979, 0xd270cb2d, 0x55ea9e3d, 0x4cd2e726,
11697 0xbdf74e3e, 0x55e73875, 0x282a3aeb, 0x1317f9ae, 0x976a57f9, 0xad22ba45,
11698 0xf9e31f3c, 0xad779401, 0xaa3c0237, 0xfc6e5c1c, 0xad63d042, 0x94d5d263,
11699 0x0767ae9f, 0x5607eff0, 0xac9cb85b, 0x9bb8058e, 0x86e90139, 0x1939f7e2,
11700 0xb8e253e5, 0xe6028329, 0x8c3b4457, 0xc7fab0e3, 0x0d63abdd, 0xfec1a7e8,
11701 0x38420f97, 0x237f5dc6, 0x9559efae, 0xb4801af8, 0xbfed00aa, 0x3c3cd567,
11702 0xd8ad9777, 0xf0e50e3d, 0xf1832ddc, 0x7b2b0546, 0x23d25dee, 0x3bfe0573,
11703 0x395a3e45, 0x81bbf1d4, 0xb9706437, 0xdfb951e9, 0x2f0106e8, 0x79f20749,
11704 0xf7030af5, 0x47bc83e3, 0xe4bd5301, 0xdab71a43, 0x728891d2, 0x81bb7ab8,
11705 0x8cdf87ee, 0x973806eb, 0x751f492f, 0xdcaae800, 0x51df4310, 0x344ef2ad,
11706 0x51aabd62, 0xbdffbaa1, 0xd3a40c84, 0x60bd962f, 0x1c39fa45, 0xfa839ad9,
11707 0xa45e6ba9, 0xda29ee93, 0x8beedfb8, 0xaf743965, 0xc3ad8669, 0x9965df82,
11708 0x8edb20b1, 0xada0fc72, 0x0fcf88d5, 0xb0ea6736, 0x46d9b2ee, 0xbfa5dd61,
11709 0x885fea92, 0x41fa177c, 0x9e3852ba, 0x1b769aab, 0xdd2feff1, 0xd4e2e82b,
11710 0x41f6efb3, 0x4675503f, 0x2fd41f47, 0x527d0740, 0x28cfce11, 0x9a6b9fa4,
11711 0xa4bc1e78, 0x03a41a83, 0x8239bbe0, 0xbdb66a0e, 0x43f21770, 0x373fe20d,
11712 0x9e808e94, 0xf9fda9db, 0x7f18e30d, 0x44e91dbf, 0x2fa833ea, 0xce3fa033,
11713 0x058bebc8, 0x0c7da1fe, 0xe00ef76f, 0xf9dd75f9, 0xd07c4108, 0x66d77e13,
11714 0x4c3e04e8, 0x8ad77724, 0xd8ae76fd, 0x9dfc456e, 0x1ef7767a, 0x3f54b78c,
11715 0x11dada0f, 0x3c041f86, 0x56ff716a, 0x19d93f5a, 0xab5fb8b5, 0x74ddff7f,
11716 0x96b0f82f, 0xfdc9fdf1, 0xfec5ead6, 0xfef173e5, 0x2acfb13a, 0xadb5e026,
11717 0xc13be72f, 0xf4c7c867, 0x3fb121dd, 0xbbf83d8f, 0xfec5bbba, 0x6cc9449a,
11718 0x0f8456cd, 0x0fe517e2, 0x28cb8fd0, 0x397409e5, 0xe50365b5, 0xc97c4bf7,
11719 0xd7efbff5, 0x93fc2e2b, 0x9d8f1254, 0xb6f77c3d, 0xa1c9f045, 0x763292fb,
11720 0xd8befc00, 0x240d9f4c, 0xcc07d57a, 0xce46e927, 0x49a7f457, 0x61bee2d7,
11721 0x5f1c56fc, 0x1bd07bce, 0x0e71c7ad, 0x721fce32, 0x8b2f92fd, 0x3b5da7ea,
11722 0x4efd8ad8, 0x5ed1b259, 0x3f7c7811, 0xbbef46c3, 0xf7806ed0, 0xf2143b5d,
11723 0xe7121f5f, 0xbdf743fd, 0xe01f2d60, 0xc577f7a7, 0xe19d25ba, 0xe4c9fa0f,
11724 0xb9daf77a, 0x6ebb583f, 0xbae48729, 0xe1bfee8b, 0xeb976c5a, 0x2051f8c7,
11725 0x4a384a9d, 0xfaf7957a, 0x344b74b4, 0xdaaaf527, 0xa6d77d33, 0x9dfca21d,
11726 0x78ed7690, 0x2c3a3ec2, 0x9ebbcdf2, 0xe77df956, 0x41edc965, 0x33188ef7,
11727 0x259fea07, 0x15b6aef3, 0x49b73c62, 0x521e7ba1, 0x4acfc0af, 0x923e807d,
11728 0xdef0c1f6, 0x36a57f3c, 0xf10275de, 0x63bc7559, 0x44927e1c, 0x7d57a5da,
11729 0xa0c6aadd, 0xcf1b6aff, 0x53749383, 0xf89db275, 0x93dc5aa1, 0xeef15b2a,
11730 0xf74861c4, 0xce281b4f, 0x58df7653, 0xb3fbda23, 0x8a1f4d37, 0x127bc0e0,
11731 0x6c4fdf28, 0xe047921c, 0xebc4b661, 0xc6c4bef1, 0xbfc7af47, 0x87633a5f,
11732 0xc1a1df4a, 0xcb8f9071, 0x7f23c8ee, 0xcec8e1eb, 0xaed02389, 0x436ab5ff,
11733 0xa6e47ebb, 0xffb08b21, 0x58ef4b48, 0xc6d078fa, 0xf4bbaa38, 0xa427a431,
11734 0x03f32c1d, 0x90bdc5eb, 0xaf9cdeec, 0x8a97757a, 0xefac0bc8, 0xaef9f183,
11735 0xddf4910d, 0xa3a352a8, 0xdbe715b9, 0x8ee74499, 0x2526385a, 0x2b9ee9db,
11736 0x8cb369d9, 0x9725222c, 0x453023da, 0xc74375f9, 0x5e4fa81d, 0x1832c3bf,
11737 0xd4cb8bbf, 0xb9cb43f3, 0x90e3cd7d, 0x61dfc171, 0xeac8eb92, 0x3b57e9cd,
11738 0x2f7f7c9e, 0x74ec2b9e, 0x3fde919f, 0xebe9ecb1, 0xd89e1f51, 0x7dc7639c,
11739 0x4919db1f, 0x198e0bf7, 0x78e7bf82, 0xb4c2f7a9, 0x3de4a9f7, 0xc1defcd7,
11740 0xfba49cf6, 0xb9cbde0b, 0x98f2d2ec, 0x74662e4e, 0x065cfc4f, 0xe8e4fee3,
11741 0x7e62b6ef, 0xc9a34561, 0x8e64f786, 0x7c63fd20, 0xdf4abb6b, 0xdfbba201,
11742 0xdb23af80, 0x703ee8f3, 0x5ebcc7c5, 0xf0f8acd1, 0xc3fb72fe, 0xc2fe53f7,
11743 0xf137b04c, 0x3db7796a, 0xebe1fabd, 0x38ce0d91, 0x3bf1cb3d, 0xf3366700,
11744 0xef908b7c, 0x75bebc3a, 0xffe38a4f, 0xfd2cfdbf, 0x077bd313, 0xf09347df,
11745 0x57aae796, 0x720a2e80, 0x72fbf0fd, 0x9fb22cf1, 0x50f62e4f, 0xb4395a79,
11746 0xb3d2246a, 0x15ee8625, 0x51e3b4bc, 0x5373bf15, 0x79f06dbd, 0x308f1f3c,
11747 0x9ff7d0c7, 0x90bc5cbe, 0x17279a82, 0x8a3f89d7, 0x15f854b6, 0xb55e547c,
11748 0xfbde8dad, 0x0b5e4772, 0xd97debde, 0x9ac5c31c, 0x3be820ab, 0x3dbf1299,
11749 0xfb9657dd, 0x1cd7fcfa, 0x9fdd72cf, 0xc56e9e6f, 0x21fdb57d, 0xe23865ae,
11750 0x86c63a37, 0xc8a56076, 0x86ba392f, 0x23c7d9db, 0x18abfe62, 0xed7c7cf0,
11751 0x0efc4494, 0xa9b6ccd1, 0xc57b63d7, 0xe786c54e, 0x49cee703, 0x7dcf3c56,
11752 0xe2b4efa6, 0xd6cfaa3d, 0x3e57fbc8, 0x237bbbfa, 0xd829b3c6, 0x9eab447f,
11753 0x84293239, 0xfc32f44c, 0xcbee9ea4, 0xe4ed017e, 0x451f393f, 0x89f813fe,
11754 0x99927cc3, 0x4bbf722f, 0x9c57f9f7, 0x7d8a46ff, 0xcbb6f7b7, 0x17b506f8,
11755 0x63f6f015, 0xd096b76b, 0x68de4fdf, 0xbfbae1b0, 0xf1a068dc, 0x4db9c0e7,
11756 0xbe3deb07, 0xb0839f99, 0x13e8e78e, 0x6779f99b, 0xef3f334e, 0xb833cf54,
11757 0x60d2fdf8, 0xe80a2cba, 0xeb2ddf47, 0x7323bbe1, 0x737f7c5c, 0x7ee27f40,
11758 0xb1bf442f, 0x9fee99ac, 0xa93e6a5d, 0xaaff7e96, 0x74dd1791, 0x08bd13db,
11759 0x23ff22b8, 0x98ba4add, 0xf5c786b3, 0x0b83cded, 0x9d24fe91, 0x5803bf68,
11760 0x3bfc646f, 0xfa28bab2, 0xb324f7ee, 0x62fa80c3, 0x18e77c4a, 0x075f4f04,
11761 0x916aaf97, 0xe4f785ce, 0xec29bd58, 0x15dec477, 0xbc1a78f2, 0x7abbf74b,
11762 0xcff7f8db, 0x59317dc4, 0x474abe82, 0xda293e7d, 0xba038dfe, 0xf2ffae74,
11763 0xf5d03d3a, 0x3bf691a4, 0xd7809db2, 0x7af35ff5, 0x167b7d9e, 0x7def3fd4,
11764 0xec3d3af6, 0xf695d26f, 0x2fa80621, 0x75cdf259, 0xc9b9e063, 0x3bd83ae1,
11765 0x9b139e60, 0x7f71d292, 0xdb087ed0, 0x8e7a27a7, 0xee2b5960, 0xba569d8f,
11766 0xf4cc2d06, 0xa77b7ff7, 0x0e4be0e5, 0xc0d3bd7f, 0xa73bbbe8, 0x87f5cb7b,
11767 0xd70e9d2f, 0xa109dea9, 0xdd8ce5ed, 0x5e7cf947, 0x7e076f7e, 0x788911dc,
11768 0x5dd38aaf, 0xd3c7bcb9, 0xe3c7b9a0, 0xe4d5f7e4, 0x7f792afd, 0xfdff72ea,
11769 0x7297b5b3, 0x00ffecff, 0x4fb2f369, 0x00008000, 0x00088b1f, 0x00000000,
11770 0x7de5ff00, 0x5554740b, 0x55b9e896, 0x2a493eb7, 0x54842549, 0xaa84a925,
11771 0xc0902b7c, 0x310c7c25, 0x0403e548, 0x6a285888, 0xa205a0d4, 0x01148280,
11772 0x55f4741d, 0x9a7c3061, 0x179f8ee9, 0x102d4622, 0xdd787195, 0x866db1d1,
11773 0x3220538f, 0xb40e9afc, 0xd38ceb63, 0x68d1d01d, 0x38311b63, 0x6f360cf4,
11774 0x4dce7def, 0x802a56ea, 0x6f7be7be, 0xf65e97ad, 0xee739f61, 0xffb3ecf9,
11775 0x5f5bdf67, 0xa5eb2c19, 0x0f24c664, 0xa153ab63, 0x63595a74, 0xff7b9419,
11776 0x68d2cfe9, 0xac839ac6, 0xc18f2e3b, 0xd3f5a35f, 0x7ccf5051, 0x2e504bba,
11777 0xcd1a484b, 0x139960c6, 0x996fd062, 0x12aeb189, 0x6d3b26e8, 0x12d8c2cc,
11778 0x019dfe09, 0x19caf9ff, 0x956c674b, 0x44edfe15, 0xf08742b8, 0x7f466683,
11779 0x3f98059f, 0x1fd8c0df, 0x3925744f, 0x9d9d8cf5, 0xbb0c2e1d, 0xbc65fb18,
11780 0x009ce6cf, 0x8ecd1ded, 0xbec634a6, 0xd4a4c37c, 0xd09eff43, 0x60f927df,
11781 0xe67aa5fc, 0x6d9284ef, 0x24d8ce1f, 0xc3ea2f28, 0x61dfa053, 0x8db6f157,
11782 0xa9cbbcf0, 0x3f9e0c63, 0xfce70aeb, 0x82c678f5, 0x32f2932e, 0x32777ea3,
11783 0x9f1eeb80, 0x9dfb1c3e, 0xfe5d7d7d, 0x936eb03d, 0xec1258cc, 0x598c067b,
11784 0x0030780e, 0x07c32fac, 0xb40e3442, 0xbea09307, 0x0e74f5c5, 0x2f307c23,
11785 0x0dd8c89b, 0x06ebef8c, 0xf11fbc39, 0x196494c5, 0x6f9b37f7, 0x3283db0f,
11786 0x3333a38c, 0x98bbae03, 0x4d3f5875, 0x8eb19800, 0x7f60c34b, 0x3263c066,
11787 0x24c78096, 0xa1eaa6c6, 0xe9afac13, 0x0990fa97, 0x7884d7d6, 0x85d07014,
11788 0xd72c7a23, 0xc58bf8c3, 0xbc8ecbbc, 0x58c1c46b, 0xeb07fe10, 0x5de62259,
11789 0x3d7771dc, 0x9092cb9e, 0xc0b74ce1, 0x7ffa25f5, 0x72c79d0f, 0xf2feefd1,
11790 0xe29c46ad, 0x7eda1dfe, 0xafa6d9cb, 0x52fcf0f5, 0xfdc46dd6, 0x6a8ceb2e,
11791 0x0cf9a8ef, 0x977cbbd7, 0x99debeb6, 0xc2748698, 0x97b1b2c6, 0xe74d54f4,
11792 0x99f448bd, 0xca746faa, 0x66e19fb8, 0x371304c5, 0xf4479f3d, 0xb00cdec2,
11793 0x63ac7ec8, 0x8b4fd118, 0xb1e74f4b, 0x9cc49764, 0x7ebb18e3, 0x42731657,
11794 0x61aefd53, 0xc85d2654, 0x5fcffaa0, 0x57de3639, 0xd75e7032, 0xc6ab6abf,
11795 0x6aff5df5, 0x3aea9511, 0x4e1d049a, 0x867497d5, 0x2ce71d61, 0x9b800eb0,
11796 0x8162c08e, 0xd66e9a7e, 0x99e11887, 0x57bfb199, 0x596bc72c, 0x424fa5df,
11797 0xfd8a0e58, 0x3a24974a, 0x1f3c6484, 0x433d61ef, 0x031e627a, 0x79993bb5,
11798 0xa05ca5cd, 0x398ebb1b, 0x24dfe063, 0x19ce2fce, 0x81ee9ccf, 0xfc583976,
11799 0x87584ab3, 0x0941ae61, 0x5c737b41, 0x33e436d2, 0xe574f416, 0xe20d73c3,
11800 0x4e38aeb9, 0x54ee0937, 0x1d2af3cd, 0xadfa2adc, 0x18769a4b, 0xb3c1b2e9,
11801 0x5121e888, 0xc7acd4c9, 0x406a5fa4, 0x67d5b9fa, 0x623ba4f8, 0x585fa21c,
11802 0x295e0dc7, 0x7378fc84, 0x50ddb683, 0x44ad75f9, 0x8e47d425, 0xfbf6d5e7,
11803 0xd003d229, 0x717e103b, 0x9c0c3d24, 0xc3a3c583, 0x1224f073, 0xb9cccbbd,
11804 0x5be012b9, 0xee181b0e, 0xf7cf14df, 0x97310e79, 0x0f80fd86, 0x8875e260,
11805 0x2e4fa817, 0xc537e2d7, 0xb0e7c5a3, 0x867e2d3a, 0xb7fbb57b, 0xda6ae435,
11806 0x35237c33, 0xcb8b59ed, 0xbfb67034, 0xc47fd342, 0xec0d6aea, 0xf4d4ce0a,
11807 0xa37f5bcf, 0xbd682e06, 0xa8bfd35d, 0xbda6817d, 0xa69f7438, 0x268ed47d,
11808 0xf9da5c0d, 0x98ffa688, 0xda6b8f5d, 0x6a3786c7, 0x7e1dc7da, 0xe84f034a,
11809 0x7fe9a2da, 0x34db07cd, 0x5fba93ed, 0xdb5fb4d3, 0x9e0686f3, 0xd35bbbdc,
11810 0x0385ca7f, 0x1d8ab81a, 0x31aff4d3, 0x4f0356ff, 0xa6abfeb5, 0xc7fb74ff,
11811 0xce19f69a, 0x67da6a3f, 0xd2d1bfb9, 0x93973c6b, 0xa5ff2bd7, 0x9359ee79,
11812 0x5f50dfef, 0xdd954b34, 0xebf48641, 0x35ba3e24, 0x0184a74d, 0x972a83fe,
11813 0x1c9e1d04, 0xc1392561, 0xb78e59f2, 0x32b0e914, 0x6e7c7c8c, 0xe0f24497,
11814 0x28bd28ab, 0x91ebd1ff, 0x4afd9da0, 0x22765e52, 0xc45d41dd, 0x331e29fc,
11815 0x39d62393, 0x81aaceac, 0x9aed7b87, 0xa706b6fe, 0xe7c33da6, 0x2d67b4d6,
11816 0xb6703456, 0x7fd35cbf, 0x068f6ac4, 0x34eb0576, 0x7bd6f3fd, 0x6b417035,
11817 0x517fa683, 0x5ed34fbb, 0x69ac5a1c, 0xafc3b51f, 0x573b4b81, 0xd98ffa6b,
11818 0x8fb4d415, 0xb4d7af0d, 0xaadc3b8f, 0xb5742781, 0xf35ffa6b, 0x3ed34841,
11819 0xa6877ba9, 0x4e9edafd, 0x77b93c0d, 0x94ffa697, 0x5c0d610b, 0xfa688ec5,
11820 0x6a4f98d7, 0x0fd6a9e0, 0xdba7fd35, 0x67da6b4f, 0xb4d73f38, 0x2cd076ab,
11821 0x7adad7f7, 0xaf5d1761, 0x7cf359fc, 0x90c3dab0, 0x486f823e, 0xd613b34a,
11822 0x3fe102eb, 0x777ce49c, 0x28ed1e9c, 0x8c14182f, 0x41ad2901, 0x420c92fd,
11823 0x480ae90c, 0xe2a6358c, 0x20ac4028, 0xc15549b7, 0x4f68c9f3, 0x73aa9000,
11824 0x1fa0fcb9, 0xeb5ad813, 0x1bb266a7, 0xdf40971c, 0x29bfc25d, 0xa0944b83,
11825 0x85ebaa9f, 0x4ea166f9, 0x726f3a02, 0x582e3cf9, 0xaf9d7dcf, 0x6862cb4f,
11826 0x705b0427, 0x9307a01d, 0x9e6f41bb, 0x79776388, 0x378f064b, 0x89780cc3,
11827 0x5c48ef98, 0x32cca3ab, 0xcc33fcf4, 0xff7fa967, 0xae3e06b8, 0x8a6bfb04,
11828 0xa0a7ff18, 0xfbb065ee, 0x37c0035a, 0x153d8c05, 0x4cfc12b0, 0x5b704ec0,
11829 0x7b6549c0, 0x96e54dc0, 0x1ded4280, 0x5f827281, 0x0e087808, 0xdca8ea05,
11830 0xfd52f016, 0xc10340f6, 0x547c04af, 0xa62c08ee, 0x9f80b5f2, 0x560677da,
11831 0x40f3fc13, 0xc0ceca90, 0x237faa7a, 0x9bf04ad0, 0xdf827681, 0xdca8840a,
11832 0xe541d815, 0xb52740ee, 0x22ec0def, 0x9840edf8, 0x30e070e0, 0x5d0207c1,
11833 0x7c0c1f04, 0x40a1f040, 0x03879537, 0x0d1e543d, 0xf1fb52f4, 0x078205c0,
11834 0x576b4bce, 0x2e576133, 0xd2c07412, 0x2f793db8, 0x85f6523f, 0xbb462d8e,
11835 0x43a09177, 0x87983543, 0xcc867740, 0x2ecd6dc2, 0x13a06a3c, 0x71c9d137,
11836 0x96af2fb4, 0x4070d04e, 0x33560d7a, 0x5a9bd237, 0xc9e954b6, 0x90ae0cfe,
11837 0xbb732f42, 0x336feb88, 0xb537f553, 0x85283e37, 0x079b9ed0, 0xf811b276,
11838 0x9f6123e6, 0xe5c7147c, 0xc1bf39f5, 0xa35f768d, 0x66c0af14, 0xb277fe01,
11839 0x8c2fe03b, 0x5ed77fa4, 0x9fb456d3, 0xc235f5d4, 0xe7183a38, 0x5a2eecbf,
11840 0x6c3b2357, 0xbd40f5c0, 0x72fc0f47, 0xe2dbe6c6, 0x2fbeba02, 0x2234175b,
11841 0x85425913, 0x8cc644de, 0x48f3df76, 0xf7fce7e7, 0x17c1c21c, 0x9c429559,
11842 0x78537ae7, 0x7f30adf8, 0xb2bd11ef, 0x5e3439cd, 0x00ceb796, 0xf6997de1,
11843 0xa0773fb7, 0x17f75f1d, 0xe1cf0fbd, 0x21b12184, 0xe9dd7404, 0x3acf8892,
11844 0xd94d3a5d, 0x02fdf766, 0xa26df9d7, 0xa01d4eff, 0x56ebdbf2, 0xb612b2bc,
11845 0x20a2b8d4, 0xf055ed19, 0x5f680c0f, 0x034e61cf, 0x989b87ca, 0xea1c5de7,
11846 0xf823e666, 0x52a41656, 0xe176f9b6, 0x21636ebe, 0xa6157d82, 0x8afb589c,
11847 0x383bd75e, 0x752c70d8, 0xdd90f29a, 0xfbc70077, 0xeb43d136, 0x7a69313a,
11848 0x5d4bee21, 0x49c33997, 0xdeb366fd, 0xdf7d7017, 0x53fafbee, 0x9d306f29,
11849 0x61f488fc, 0x3fb06981, 0x3779c233, 0x38e0ef03, 0x214b0fcd, 0x3e9573a4,
11850 0xa74cc11a, 0x7a851ff1, 0x805e9229, 0x4b7fd04e, 0x9399cdeb, 0x4dd2f448,
11851 0x3e926ff2, 0xfa7b0468, 0x28542e84, 0x8c4e89e9, 0x5173ac12, 0xee49d01a,
11852 0xc0f0f4d0, 0xe423287a, 0x17d9d020, 0xfe9fde38, 0xe2371ae1, 0x93dbf96d,
11853 0x66b7889c, 0xd0079c1d, 0x9ea8f073, 0x442604ec, 0xd2dafebb, 0xb207f910,
11854 0xc529cca2, 0x7172e373, 0x7ead9ebf, 0x4ddc863d, 0x74f4e5c8, 0x0ba86ec2,
11855 0xef9cb8d1, 0x2e7d76d5, 0x2e7d473f, 0x15a6df3f, 0xc3d52d9f, 0xf81c4ffa,
11856 0x8d2ce8dc, 0x3fd58fb1, 0x823f2879, 0x3aef97ae, 0x7e83cd3d, 0xb92eeb17,
11857 0xbea07131, 0xd2abcc50, 0xe898de91, 0x5c896adb, 0xc75d3f57, 0xa75d22e7,
11858 0x11e75d00, 0x768a7f5d, 0x33936cf9, 0xbb2856f9, 0x28613501, 0xc95a2f7d,
11859 0x14c05c7f, 0x2f32172a, 0x0c808b95, 0xc1bd8e90, 0xf7888d27, 0xd52758fb,
11860 0x777e503f, 0xbdf5d23a, 0xd9f91f3a, 0xd517594b, 0xb5bd672f, 0xaf37b478,
11861 0x1daef35f, 0xeb537d56, 0x44915393, 0x7fcd0c6f, 0xdb39cb17, 0x4e834fa5,
11862 0x5cec93e2, 0xe4b747c0, 0xe613227f, 0xd5677dbf, 0x3f505913, 0x85cfcf5b,
11863 0xa2e7e31d, 0x7de891ca, 0xe0145f03, 0x78a6dff3, 0xa4fa5f68, 0x345f0d3a,
11864 0x123cce3e, 0xcfbbd38c, 0x8ae6da14, 0xfbf293e0, 0xf28590ff, 0x13bdee4c,
11865 0xdbf97bcf, 0xef3c54a6, 0xfbd718fb, 0xaf8d4792, 0x119efaa8, 0xe2cfdfbd,
11866 0x85f7ec15, 0xb22fefa0, 0x17f7d119, 0x658a3812, 0xcb287603, 0xf2cbd9f1,
11867 0x72f6f406, 0x88d1cedd, 0x95ebd027, 0x7df70e78, 0xd632d9dc, 0x9420fa85,
11868 0xe1887683, 0xecd29335, 0x7617e8d2, 0x8d850129, 0x7f3e219f, 0x198ee38a,
11869 0xfca92ebc, 0xeed19fd0, 0xd0591930, 0xce7c465c, 0x677f2226, 0x9abf891a,
11870 0x3879b511, 0xb7e9d78f, 0x84ff1e0c, 0xefe1ef58, 0x841d3fb8, 0xc52cbcfd,
11871 0x2feb879a, 0x3cc0fc53, 0x19d24724, 0x2e4773cd, 0x3e7563e7, 0xa076e966,
11872 0xc1347e9d, 0x8f9e3b77, 0xfd52471a, 0xcfaec3c8, 0x667cf1f2, 0xe5506c57,
11873 0xaec78d33, 0x84e972e3, 0xf84419c1, 0x014b9544, 0x6f2fd609, 0xa7ff286f,
11874 0x371d700f, 0x8c612d98, 0xc34ab077, 0x35ff7ed9, 0xdf1f4077, 0xcae3eaa0,
11875 0x1a8ef8a8, 0x018a61f7, 0x3ecc57d7, 0xf141f152, 0x0e4e551d, 0xb1b0bfd2,
11876 0x889fc42e, 0x79c7f597, 0xce3fb9fe, 0x8d79c3a3, 0xe6328e42, 0xf8237b77,
11877 0xae00d6d4, 0x307fc68b, 0xff8d7cb3, 0xd9c0d560, 0xffa6bb7e, 0x4d4ed588,
11878 0xd6e82bbb, 0x57ade7b4, 0x6b417034, 0x517fa6b9, 0x170347bb, 0xfd34ea87,
11879 0x6af0ed47, 0x06ced2e0, 0xbb31ff4d, 0xb1f69a7c, 0xf69ac5e1, 0x1afd8771,
11880 0x6ad74278, 0x3e6bff4d, 0x27da6a08, 0xb4d7af75, 0xaad3db5f, 0xb6f72781,
11881 0xb94ffa6b, 0x57b4d210, 0xb4d5bfb1, 0xd75f98d7, 0xf1c62fc0, 0xeb54e778,
11882 0x9b9e683f, 0x81afdf6e, 0xf1e7885f, 0x23ce199a, 0xf9c5e7da, 0x278b6f06,
11883 0x3ee5987e, 0xffdf69a9, 0x8dcdc8c8, 0x47a12fc0, 0xb67fe474, 0xc53d71d5,
11884 0x1d39aa1a, 0xd7bef1c4, 0xe66a1f2b, 0xbaf7d1cb, 0x7a9d8e90, 0x75f2266b,
11885 0x039cf97e, 0xd0ac7640, 0xc51aa2b3, 0xc9eebb9d, 0xf48e5803, 0x6c8d5ebe,
11886 0xf270d253, 0x7da39600, 0x1903575f, 0xca716533, 0xf996583b, 0x70d8d6c7,
11887 0xbce7ab89, 0xe0c4e583, 0xb3941a8a, 0xb17e2660, 0x3e7dd608, 0x846d9238,
11888 0xaa652575, 0xd10f5e71, 0x1d0caaed, 0xdbaaf9f1, 0x4b37142c, 0xa322d6bf,
11889 0xe81cdf3e, 0xec10791a, 0xd3a7f4dc, 0x69dc62d7, 0xa1f9d83d, 0xc017b022,
11890 0x59f2c7ee, 0xe043ebb0, 0xbb046d1c, 0x604dcb1f, 0x73fd63f7, 0x9c23f760,
11891 0x7ad974fe, 0xc9d56e7c, 0x6172ea7b, 0xca0f11fc, 0xd7533456, 0x0e2b7539,
11892 0x0fec7ac0, 0x4b28ad1a, 0xe267ae8c, 0xec8eb09c, 0x0a8eb065, 0x51078b42,
11893 0x3052ecfd, 0x1c39321c, 0x2becfd07, 0x1db81a74, 0x2eb045ff, 0x97cf8b58,
11894 0xaedee93e, 0xb6f9f630, 0x8a1937b3, 0x5d799f61, 0x014d6db7, 0xe6799738,
11895 0xf1d3be02, 0x93fc602c, 0x09cd8f79, 0x97860c96, 0x48ff7a14, 0x2cee4972,
11896 0x16b53e46, 0xeb81947d, 0x85fd50da, 0x3ce2b3a2, 0x0839cc8f, 0x787e7eeb,
11897 0x23e758bc, 0xaff2aa73, 0x79cf5c66, 0xef50ef94, 0x47218cef, 0xffe853fe,
11898 0x2f5c7993, 0xe5159fc3, 0x08938d93, 0x949d81b3, 0xf376f20c, 0xd1a7d5a4,
11899 0x41ad90a7, 0xbb23e509, 0x144fcf08, 0x7823c828, 0x1e44fc4a, 0x537947b2,
11900 0xe733e454, 0x1f3678c1, 0xf1914ed8, 0x785ac5b1, 0x19e79c33, 0x0c7ac0c3,
11901 0x3282e977, 0x92f0c1ec, 0x9e605157, 0x5fb0798e, 0xb51b3780, 0x8e9165fe,
11902 0x9f717d91, 0x378beeba, 0xdda76829, 0xf0f5c797, 0xecbb8096, 0x7ffa0313,
11903 0x4027d94a, 0xfd8b9947, 0xabe40f92, 0x04abd1ad, 0xd2e19fa1, 0x2237efdf,
11904 0x3ac5df61, 0xfd639f51, 0x27bb089a, 0xb86b8c47, 0x19bc27a4, 0x6a4abd9a,
11905 0xbd06fcc4, 0x618cefe4, 0xc9e69577, 0x4666b9fc, 0x1e7786ed, 0x5f309c96,
11906 0xba486366, 0x4bf1c687, 0xc2dbd40a, 0xb1ab3ebc, 0xf0085a53, 0x3a4e791d,
11907 0xac9c7507, 0x08feb0c5, 0xa0e5d93c, 0xede78564, 0xc425068f, 0x55eadd83,
11908 0xdae22258, 0x52bdfc4b, 0xf57db4f0, 0x864fb2c4, 0x8abdbae1, 0xa59be717,
11909 0xcadf9bf2, 0x2b1f3d70, 0xbd42a9bf, 0xc33d1bf6, 0x9c6f8cfb, 0x8c5a724a,
11910 0xa9a5a87d, 0x973ccf5b, 0x729267f1, 0x9e93f11e, 0x2ce2ddbc, 0xf17dfe00,
11911 0xd6c34b36, 0x47767418, 0x75b3a71e, 0xe2deaa99, 0x73d749eb, 0xeafaa93c,
11912 0x1fa72b1b, 0x4cad6e55, 0xce3ab0e1, 0x24f1ecca, 0x8f5a8637, 0xf98e3dad,
11913 0x19bbd622, 0xfde2b1e6, 0xac2b77cc, 0x21f03788, 0xcc9f34bc, 0xe7d6e9e5,
11914 0x4637e4dd, 0x3e20cfd3, 0x5c9bd100, 0x1dd97486, 0x31ba066a, 0x682a33cd,
11915 0x5bfeda2f, 0x2472848b, 0x284ab593, 0xb5d96d47, 0xe7d46587, 0x1bd8afb2,
11916 0x12be8ec3, 0xa9e7a83f, 0xcf8325da, 0x2abbf9cf, 0x0c0d43b2, 0xe5c9b6e9,
11917 0xa9f9e1b4, 0x6474da74, 0xe22faa78, 0x3a0bd73c, 0x7aad672e, 0xd60ad3e4,
11918 0xeb256549, 0xd63af2a2, 0x5987a54b, 0x99ab2c65, 0xf32d6542, 0xf98d3952,
11919 0xad63aca9, 0x9d64ce54, 0x2eb3d654, 0xa3bfc12a, 0xe4accbd2, 0x7608de87,
11920 0x9973960c, 0x985bca97, 0x482dca9f, 0xfef013df, 0xdbe095a1, 0xbb952759,
11921 0x459dff80, 0x53311f18, 0x39e417b9, 0x3c836f96, 0xf20c32c7, 0xf8c269dc,
11922 0x83ca9b88, 0x43ca8501, 0x0f2a7281, 0xefd43c07, 0xca8ea068, 0x952f01e3,
11923 0x540d0227, 0xd47c0576, 0x316054ef, 0xfc05ef95, 0x581fbe54, 0x8107e54d,
11924 0x12ff9520, 0x91654f58, 0xe20ae411, 0x163ddddb, 0x8f9c9afd, 0xe8271e8d,
11925 0x84f34fa3, 0xfdd1ebff, 0x78f1e2f7, 0x83ba3a8e, 0x94aed5b1, 0x6e6d1e90,
11926 0xe504279d, 0x74937746, 0x4eeb9437, 0x64d63b70, 0xd93b244b, 0x724abed6,
11927 0xa4bbb8c2, 0x9c027d6e, 0x0fbcdeed, 0x4f4198e7, 0x6b65ed54, 0x7f841413,
11928 0xe819a4ff, 0xdfc1ab70, 0x7fda15bb, 0xcebfd2f5, 0xaece8331, 0xc7f53c48,
11929 0xed4c38d7, 0x66b20e93, 0xf207c02b, 0x26993f4e, 0x10a075f1, 0xc7d2fe3e,
11930 0xe3e4d673, 0x791cb93a, 0x368e05d5, 0x5b0f19fa, 0xdb18cfc8, 0x0eac667e,
11931 0x2dab49e0, 0x471fe865, 0xf5b8a3f4, 0xdba2fd50, 0x563ae7d5, 0x1e2337a4,
11932 0xee0a7dd6, 0x65e51389, 0xcf8c58f7, 0xbbab8e45, 0xfe99f9ba, 0xf647f332,
11933 0x5e332e93, 0x54e79151, 0x7403ffde, 0x86df4d1e, 0xaebf1f4b, 0x3598f8a3,
11934 0xf6faf515, 0x7a772e14, 0xdb43e3b3, 0x53dbdd60, 0x9f21bc05, 0x610eb5f6,
11935 0x8dbad7d8, 0x6fc764b9, 0x1d36f38f, 0xd1bff6c1, 0x69a0db29, 0x636fbc7b,
11936 0x14f9c131, 0xea9759af, 0xca5ea377, 0xb1fae049, 0x9c48f1cd, 0xffff8233,
11937 0xe6eee422, 0xadaebeca, 0xd7ad4fe8, 0x6e7802b1, 0x1b05fadb, 0x4bce30dc,
11938 0x022ec09b, 0xc2f27938, 0x9ed0050d, 0x513741bb, 0xae1e642f, 0x0b4da5e3,
11939 0xe128d95f, 0x0b5323b8, 0x213cdc61, 0x7586733f, 0x74095d8f, 0xc6d466de,
11940 0x63f5fa15, 0x8597e73e, 0xd019cc30, 0x5e2239bf, 0x1ac0d5b1, 0x4166f522,
11941 0x35b7973e, 0x4c34bc45, 0xd33cf1e1, 0xe3d0f888, 0x11aaffb0, 0xbe93fe3c,
11942 0x9ff14cd6, 0x9e7fc774, 0xe9ed0e9c, 0x4d053a1d, 0x74b6d95a, 0x9efd018d,
11943 0xf22758db, 0x3f8956e3, 0x76e6cc1f, 0xb92c1832, 0x1efc2273, 0xf2ca37b0,
11944 0xf6a7e223, 0x7184a086, 0x4b11aa8c, 0xa7378c25, 0x3093ee3b, 0xe0de91fe,
11945 0xe8897c93, 0xfda9f927, 0x2b9f22ae, 0x6f67d61f, 0xf735e784, 0x3c0cbeb1,
11946 0x81b79857, 0x566409f2, 0xecdf3916, 0x27878e22, 0xb43d2064, 0x691ad7df,
11947 0x9af8d15d, 0x991eaee5, 0x1ce07c3f, 0xccbfdba3, 0xfdb8e7e7, 0xf9029871,
11948 0x1f8f1260, 0x9339789c, 0x6dd9e5ec, 0x23f41ef1, 0xb2393c4f, 0x2aa7e096,
11949 0x9eff683c, 0x1a62b978, 0x9a9fb396, 0x484efd49, 0x05c630ec, 0xbb753f66,
11950 0x7939f58c, 0xef1c2eb0, 0x71e891b4, 0x89f753f6, 0xc5a91fe7, 0xf05d72f6,
11951 0x2e9fd0ef, 0x012d7e6f, 0x891505e3, 0x7961646f, 0x6abdd742, 0x837fcc3f,
11952 0xd51afd95, 0xda4377b5, 0x3fc1d4df, 0x6b993ce6, 0x378c78c0, 0xf3ce973f,
11953 0xf031e626, 0xf92f077c, 0xba3b95b7, 0x8e8b01de, 0x5bd9d75d, 0x9ebad783,
11954 0x5883d65d, 0x34158756, 0x61ed59a3, 0xa72c41ef, 0xd16bf975, 0xa0fba9bc,
11955 0xdd9620f5, 0xc45e7d23, 0xedffabff, 0x055e3796, 0xab63c478, 0xe68768ac,
11956 0x633dde3f, 0x0d2fc51b, 0x60a1f90c, 0x8f55bf92, 0xa6f66c04, 0xf6787ca2,
11957 0xfa875919, 0x8d6ae4dd, 0x4f74d843, 0x4ce30eae, 0x175a53db, 0xe20bbed3,
11958 0x28f1e219, 0x8ba421e8, 0x2a6f1482, 0x25f013f2, 0x829dc39d, 0x7e294d3e,
11959 0x8bd60a6b, 0x7efe8e7b, 0xd85e1cf1, 0x4e35afdf, 0xa55279a2, 0x08cdc4a0,
11960 0x42ec23b4, 0x7f33b79f, 0x96c3e206, 0xf18adfe8, 0xce2a82ad, 0xd3912cff,
11961 0x996f7605, 0x10508f48, 0x3fd5bd3e, 0xe6c1cf0b, 0xe01bcfeb, 0xb06a0774,
11962 0x25c93edf, 0x367fee98, 0x39061c4b, 0x3fc2eb43, 0x5ba4e78c, 0x51cec9d2,
11963 0x806b6fd7, 0x0eec22f1, 0x968dc7dc, 0xba54e781, 0xf5f620db, 0xe60b2884,
11964 0xf5d4f1f3, 0x7ae7cc6e, 0xd4edd61d, 0x62f47ae1, 0x5d0fb03d, 0xfa227ac4,
11965 0xd7fafed1, 0xd23b14cd, 0x897e6305, 0x4729cc97, 0xcea17fee, 0xd71a3713,
11966 0x615fd6ff, 0xe509295c, 0x67f3ac08, 0x919927fb, 0xf1f7a34f, 0xfb88be42,
11967 0xfe8cbd80, 0xe71f4cc3, 0xbf46e6df, 0x0d94fe84, 0x43bfdc61, 0xd45c60f6,
11968 0x0c926966, 0x39b5fb11, 0xd99e9eb8, 0x728fdfe8, 0x82796665, 0x8b3df482,
11969 0x72b5ae75, 0x0f983efe, 0xfd622beb, 0x7136167f, 0xfe7c4ec0, 0xe24ef799,
11970 0x67583a91, 0xcfea3155, 0xbca5eec7, 0xcc8fcd89, 0xcfeb8c3c, 0x3fb93f74,
11971 0x7ef40615, 0x3e7dce2d, 0x77656f8f, 0x87bc9ac8, 0xc9acbf2c, 0xac58c88b,
11972 0xd07a076d, 0xd95d2ac0, 0xa829d5a5, 0x2509746f, 0x9da06733, 0xf923a492,
11973 0x9a4a720e, 0x8d1ed31b, 0x7f812ba2, 0xcdde7cf5, 0xb373a7cf, 0xb039f859,
11974 0x737cc55e, 0x7aacd8a2, 0x336f304e, 0xd03279b0, 0x3ead737d, 0x8f1fa124,
11975 0xb232f1fd, 0x26f70d97, 0xada73e0e, 0x19cce706, 0xd41fa728, 0x2aaf2959,
11976 0x67a0af0a, 0x94fc99fe, 0x1da8d307, 0xc53365ea, 0xabd6233d, 0xcf6b058f,
11977 0x3bfd4ae3, 0x0cce7858, 0x4cfae0d7, 0xa899dcc7, 0x32973367, 0xf6e8ff3a,
11978 0xe7b547a2, 0x78ef7e4a, 0x50b1a38c, 0xe79c07f8, 0x5af6c74c, 0xcfa3efb4,
11979 0x9cbba555, 0xc2f5b161, 0x2f5c0523, 0xa72824e4, 0x90aec8ea, 0x66f04ec9,
11980 0xfd23c3cb, 0xb9f2efa4, 0x57e5301f, 0xec43d216, 0x1f087363, 0x3f5dc255,
11981 0xa8738629, 0xfba1d3ee, 0x7e3ddec2, 0x5099e9e0, 0x7bf5fd4e, 0xdfa0c74d,
11982 0xe32cefd4, 0xeb377eb0, 0xa081819e, 0xf90361e0, 0x7cbe6b8d, 0x440315a5,
11983 0x414c8dcd, 0xe3ceabbd, 0x6efae028, 0x25e4218f, 0xb32c5af9, 0xd907246d,
11984 0xf4114bc5, 0xe89e9002, 0x6f31b787, 0x91f92b63, 0x8612fcb6, 0xaccd3c79,
11985 0x97d20ef3, 0xe30c8d67, 0x383637af, 0xffb0550d, 0x869d1b1b, 0x219f78f9,
11986 0x23b43ab3, 0xa8506a6e, 0x8546a6fe, 0xfd799bd7, 0xd50f06dc, 0xf0f46dcf,
11987 0x5bd40b7a, 0xd4290f30, 0x6f718015, 0x753aa4b6, 0xe8d01f78, 0x4c17ede5,
11988 0xfc1c7ed4, 0x8c27cc01, 0xbc910b8f, 0xf1d1ed6f, 0x7c7f237b, 0x9ab58248,
11989 0x3b0ecb12, 0xe8f77f11, 0xcc175014, 0x2b332d94, 0x7836cfc0, 0x7f687a43,
11990 0x1032858e, 0x3617bb91, 0x7ea10b79, 0xe2b643b7, 0x7b8376fe, 0xc147f98b,
11991 0x9de132a5, 0xbdde00fe, 0x3af741d8, 0x3efc455b, 0xf14cc4b8, 0x2875b066,
11992 0x6496ccde, 0xb7863b0a, 0x86b02c77, 0x39031ed0, 0x7bd8e748, 0x00764c8f,
11993 0x6ea3c3c8, 0xe6768bb4, 0xca9f182b, 0xb7e5aa5c, 0xaa0b85f4, 0x6646bc68,
11994 0xbebd3f45, 0xbcd78f91, 0xa1d21753, 0x71b9655d, 0xf341d226, 0x3fa0a60e,
11995 0x53c2ecfb, 0xee10c3b5, 0x3f2e1450, 0x79a172b4, 0x9c4753e1, 0xcebf1fb8,
11996 0x79fd405a, 0x5fd9af1c, 0x0d2f5dbd, 0xb79d33f0, 0x0c7e4073, 0x61ca3796,
11997 0x5e63271c, 0xc1f182b5, 0xc627d874, 0xbc8c3bf3, 0x4ca7783e, 0x0be92df7,
11998 0xf475b0e5, 0x0b677f00, 0x1f23a614, 0xd17c9126, 0x9dc8d7f0, 0xc179f85a,
11999 0x32efc0a7, 0x9db82bee, 0xd1673e51, 0x903f6d76, 0x57943a93, 0xfadaedd9,
12000 0xe3fa8b5b, 0x443c1a02, 0xe7e6d9e3, 0x9f7a2f72, 0xc70afb03, 0x74bed115,
12001 0xd7285f7c, 0x72d8bea0, 0x1b8bea80, 0x44e9c565, 0x0a79d779, 0x53b45ff7,
12002 0xeb806166, 0x44cd9617, 0xa4dfaa7a, 0xf5c8f0a3, 0xc2e48bac, 0xc6adf695,
12003 0x19f7a23b, 0xf2efbfbd, 0xa88e5cf5, 0x6613e0f6, 0x1edb07b2, 0x9ef0e8b6,
12004 0x78adec15, 0x55dc2b8c, 0x402c1d54, 0x1dc8407b, 0x973d25c3, 0xa216cd27,
12005 0x51ed8353, 0xa1fc6477, 0x13f55465, 0xd86fd405, 0x6e3c758d, 0x968efb41,
12006 0xe3173f63, 0xe6d6ea4d, 0x13db5de3, 0xa63f951f, 0x729bc7cd, 0x7f2a3321,
12007 0x7f2a2f2c, 0x7da6946c, 0x545c75aa, 0x51b5d8fe, 0x1a3563f9, 0x967b9678,
12008 0xcaf5ffa6, 0x86f81a4d, 0xfd343bf2, 0xd6ee78e7, 0x7754dfb4, 0x66fda6bf,
12009 0x7c0d4aef, 0x6b5fc36b, 0x6be6dffa, 0xb1dfb4d6, 0xf69a27f8, 0x2d49ff68,
12010 0xf9701577, 0x3feed9be, 0xd06c0149, 0x3df791f7, 0x28de996a, 0x7b9e46f7,
12011 0xa7b70252, 0xb9fdfba2, 0x8bfbd380, 0x058f9f12, 0x1c789aed, 0xf135d8f3,
12012 0x854570ba, 0x71c61bb9, 0x21df951a, 0x0ee262dd, 0x6bb6bfbf, 0x3ff6d9ee,
12013 0xbc60fd0e, 0x1b5cc4a6, 0xff8c3bea, 0x37b940fa, 0x5f747487, 0x4abf5b61,
12014 0x69b83d22, 0x5cab8f15, 0xaf3c5230, 0x8eac1d7f, 0xdc46fbc6, 0xeceba96b,
12015 0x2da47110, 0x85424718, 0xfd4199e4, 0x7ef1c656, 0xe3574d3f, 0x371a3e8e,
12016 0xa418dca3, 0x7e85bcfc, 0xcdc0e309, 0x7bc5663e, 0x02cb7493, 0x069bff9a,
12017 0x265d9925, 0xb016da2e, 0x67cc0f33, 0x635c155f, 0x527dbd84, 0xb3d4f7d0,
12018 0xcfddbcf0, 0x5bd31e28, 0x1853edf0, 0xe143e98f, 0x219d7408, 0xf73f3c73,
12019 0x5fcfeec0, 0xe6daf981, 0x5ca197a5, 0x5acf6e8d, 0x43ebf7be, 0x6e7f6997,
12020 0xde1f5bd9, 0x1fe7b97b, 0x25ba75d8, 0x38c87da2, 0xf3264369, 0xe001d044,
12021 0x80fde62c, 0xf9f5c85c, 0xc5230af2, 0xfc01aeb1, 0xbfbe0215, 0x89cff8aa,
12022 0x3fb9e03b, 0x44eefb39, 0x65ea1d3b, 0x847e87ac, 0x9fe53fd7, 0x9c92fca3,
12023 0xa3df6051, 0x9b171dfd, 0x7215c76e, 0x8d6d95ba, 0x6a0718bd, 0xd13a344a,
12024 0xbb32cfcf, 0x07193eca, 0x7ee06d74, 0xfeffb475, 0xddbfbf5c, 0x9177fe49,
12025 0x944b2718, 0x9e7f2b7a, 0x4e4c8399, 0x3114f717, 0x6a4fa1f0, 0x655e5097,
12026 0x8d3f942e, 0x89fd8be4, 0xa4238a46, 0xc1dc445b, 0x171358b2, 0xfb06e350,
12027 0x9095ef13, 0x4bc3d3ee, 0xf18f9e28, 0x5c6f1c02, 0x11d693a1, 0x32c82f1d,
12028 0x86bad3e7, 0xd7f59f1e, 0xe6314827, 0x1a875a89, 0x279e889f, 0xea04f684,
12029 0x64f16599, 0x7bef444f, 0x79556149, 0xd7e470e1, 0x51d393de, 0x90329f7e,
12030 0x5e8a1c3e, 0x143ccf30, 0x42b4fe31, 0xfe63dfee, 0xe63d6478, 0xe3228787,
12031 0xef41ccd9, 0x2a0c102b, 0x7bb18466, 0x77ce1143, 0xc277cf94, 0x1ec9d8a0,
12032 0xfe87b504, 0xd7217d5f, 0x9730d303, 0x19f2386d, 0x81dbcbf7, 0x12dcb1af,
12033 0xd67d92b0, 0xf087fc01, 0x9527010b, 0xca9b80a1, 0xda85016d, 0x09ca07b7,
12034 0x21e0257e, 0x8ea04778, 0x5e02d7ca, 0x6819dfaa, 0x01e7f820, 0x819d951f,
12035 0x46ff54c5, 0x9bf04fc0, 0xbf04d581, 0x0160f685, 0x53d7a9c6, 0x4ad03bb9,
12036 0xed037bed, 0x081dbf04, 0xec0e1951, 0x8103faa0, 0x060f824e, 0x287c1176,
12037 0x70f82610, 0x479530e0, 0x7f545d03, 0xc101f03c, 0xc93ee337, 0x15df58ae,
12038 0x4f8578c0, 0xf77da276, 0x15a16fac, 0x7cfb6bed, 0x79c5159d, 0x04b74fbb,
12039 0x8d1d1ce3, 0xef131efc, 0x040e3123, 0xed086876, 0x67fcfb39, 0xf6a54c8e,
12040 0x19bed4b9, 0xc4a70487, 0xafdb82b6, 0xfa91996c, 0x0a2130d9, 0xda58eb9e,
12041 0xdc03d218, 0xed4f185a, 0xf93215b6, 0xfce9cf6d, 0xeedc8529, 0x336df922,
12042 0xa541fb70, 0x5c853583, 0xe429aede, 0x161f5cf7, 0xca4a73f1, 0x9e47ad8b,
12043 0xa6ed542d, 0x7f7187f5, 0x3fb079f6, 0x55bcef5c, 0xb597bc66, 0x72b3a3dd,
12044 0xcbdf937b, 0xb8bf603a, 0xc50f587e, 0x6e7cd985, 0xade6db2f, 0xe63975a5,
12045 0xd6ed48df, 0xd05347a2, 0xaff76f4f, 0x6deb439a, 0xd9ae2994, 0x82903bee,
12046 0x89cf6cf7, 0xf0db277c, 0x64a86f78, 0x8d9e7af0, 0xe3077f5a, 0xec03837e,
12047 0xec63d7a5, 0x496ed303, 0xc71130cf, 0x331cd47b, 0xe829d78e, 0xfe7121d7,
12048 0xc4ca0f63, 0xb0302f7f, 0x2db9e0fb, 0x5105df60, 0xb6bf540e, 0xbd55e302,
12049 0x289dbe85, 0x8e779f37, 0x9c03203f, 0xcfc7c75a, 0x82bf255d, 0xf79c3476,
12050 0xbf502de7, 0x5e4dbee1, 0x4db0ea5c, 0x6ec835ce, 0xcadff3ed, 0x4397f8c0,
12051 0x5a8f9ed2, 0xf9f62dbe, 0xb78f8782, 0xf14c9565, 0x378adb64, 0xbcf9075d,
12052 0x33ff91bb, 0xc38a3e8b, 0x5cde4c30, 0x86450ea7, 0x35fc9e63, 0xff7717ce,
12053 0xcd423aa6, 0xdf3a8f26, 0x6aef9c58, 0xb1e234f1, 0xc62f9b5a, 0x279286ba,
12054 0xbf239257, 0x81ef1429, 0x942cb164, 0xb819cf23, 0xe49e0adc, 0x052524f6,
12055 0x8f3c1a4d, 0xe6a02f9a, 0x0be7440f, 0x29e05efc, 0xde62c4cb, 0x4fd67ee7,
12056 0xd73a41bf, 0xbd1b3c17, 0x92e36794, 0x35874931, 0x7a12d819, 0xde2aa7ef,
12057 0x3d0626ba, 0x2853e5a8, 0x1fc100c7, 0x2e713216, 0x38f8ea9b, 0x64ce3e3a,
12058 0x2ae082b6, 0x4318358b, 0x33e5ab5e, 0x2b7f9c62, 0x759b74e4, 0x870dcedf,
12059 0x1a8f7cf0, 0x8b6a3728, 0xfd01b42e, 0x3d09e084, 0x7d4cd7c9, 0x2257d6e7,
12060 0x4117f5d6, 0xa18c5b9f, 0x6e87bc62, 0x504af187, 0x94bf22ae, 0xd582fc50,
12061 0x7d5de047, 0x1d843fee, 0x75c5fcf0, 0x3cff7429, 0xda1c6d6f, 0x4ccced47,
12062 0xf83360f4, 0xd046c653, 0x32e90d83, 0x8b387d06, 0xfc0e348c, 0xe226aa59,
12063 0xcbd70cbd, 0x60972835, 0x2616fbdd, 0x99ac3e91, 0x31acdeff, 0xc9f65700,
12064 0x65b2cf94, 0x9cd3cf29, 0xca3aeff4, 0x31fb7913, 0xf75df7ee, 0x9fbd2d50,
12065 0x67ca2194, 0xb283cfd1, 0xc2533d72, 0x0b952e70, 0x99bf142d, 0x133e417c,
12066 0x4851a7e9, 0x17fa3c7a, 0x6d735e3c, 0x0f79acaf, 0xb68f526d, 0x8f54603f,
12067 0xb7464676, 0xef3edeb6, 0x6153d3cd, 0xfca5f69e, 0xbf8bf6e1, 0x7070823b,
12068 0x24e28e95, 0x5064fbea, 0x4df14193, 0xf9819839, 0x8ccc1b9b, 0xbe6db9e4,
12069 0x60f28ad9, 0xc93c7a7f, 0x2cdbf6bf, 0xcbae8764, 0x3b438a6f, 0x556f34d9,
12070 0x8c23960a, 0x3b18adc1, 0x2dd5e6bd, 0x9127d937, 0x55f355bc, 0xec1cac82,
12071 0xdc8dbb81, 0xf73e09c8, 0xe51954f4, 0x9967cf25, 0xa796eaf4, 0xadd8f983,
12072 0xd4e1d695, 0xf9be4cb1, 0xba76f87e, 0xbeb896b7, 0x1da11a70, 0x7ca379e0,
12073 0x7b4115d7, 0x3f705a46, 0x9cb66d36, 0x6b7ca469, 0xf982324c, 0xccfd0b0d,
12074 0x658df588, 0x573e48e6, 0xf2fbe4f9, 0x87c63c7f, 0x0e595f87, 0x2bdc695c,
12075 0x3e417bf1, 0xfca19be7, 0xf210d369, 0x1f8ff554, 0x8bfce029, 0xf57a4b6c,
12076 0x7da6318c, 0xce22abf5, 0x9e46e567, 0x61bb32a7, 0xc3dd1d5a, 0xcc65bb04,
12077 0xdc517be7, 0x27a7b50b, 0x7b713dd2, 0xbde30b2e, 0x8e817041, 0xf8d27bc7,
12078 0xb98ded7f, 0x936a1f14, 0x3cc129fc, 0xb9f097cc, 0x01dafcf0, 0x7f308947,
12079 0xeb970e5b, 0xe2b7e42c, 0xb38c357d, 0xe0fd7238, 0x74b505ef, 0xa61ec8cc,
12080 0x789e85f8, 0x888c69cf, 0x1c5c63b7, 0xcfd117e3, 0xc2d5ee4d, 0xe1682e53,
12081 0xc0d0662a, 0x3c2d6635, 0x3785aad5, 0x7d3b7115, 0x3f5b5dba, 0x1d85a9c3,
12082 0x74e307d9, 0xc2dfcf3c, 0xf049e222, 0x447e5ef7, 0x68dd681c, 0x765f3efe,
12083 0xcb8a52f7, 0x78f0e5b6, 0x3695638f, 0x42c591ce, 0x732fe212, 0xd63c5469,
12084 0x863f66bd, 0xa30bed97, 0x5efc41e3, 0xa9a1f002, 0x7c8a3147, 0x9e68eaf0,
12085 0xd23dde87, 0xce08bdb7, 0x5f0c60b3, 0x4d1dabc7, 0xdac53f74, 0x5caf88d3,
12086 0xb0695f22, 0xe88a7cbe, 0xf90f1d40, 0x7fb11822, 0xf84887e4, 0x37be51a1,
12087 0x8be41e70, 0x2cfea460, 0xfbd036e9, 0xa1be62ab, 0xcfe543f8, 0xa28f7172,
12088 0x89f4dde6, 0x9bbcd4b1, 0x705f2255, 0x4ebe5457, 0x1936a39f, 0xaebee7fd,
12089 0xf8b1f195, 0x682ef910, 0xe5887ce2, 0x837f9106, 0xe22c187c, 0xa6f5887c,
12090 0x637856ef, 0x050b8bd9, 0x63bfdc5d, 0x224f86c9, 0x73acb7f6, 0xbe5e0685,
12091 0x910de1eb, 0xe3f751f9, 0xbf08303f, 0xed7e519e, 0x2f9db152, 0x2bcbff4f,
12092 0x48cd0ccd, 0xcf2807df, 0x319c1596, 0x5ea77bf2, 0x42eb9e23, 0xcc99ff61,
12093 0x2fd1f2b3, 0xf2e211db, 0x37889d6c, 0x33155b34, 0x3b9981c6, 0x50c71355,
12094 0x4b4d11e3, 0xd854b65c, 0x7c7f7247, 0x7ca56bc1, 0x14f9e1dc, 0xf1aa48df,
12095 0x32c6cedc, 0x9c6453d6, 0xdd62066b, 0xc056c18e, 0xd957f9e9, 0xc0c74133,
12096 0xf8174dbe, 0xb0fdc97b, 0x8f2467ec, 0xea68e42e, 0xa39c44db, 0x0b2dbf9f,
12097 0x8b3e70aa, 0xb0fb49db, 0x1e1aff31, 0xd1c6d417, 0xe73de24c, 0x343be3c1,
12098 0x7e226df5, 0xb5f1e572, 0x85d33971, 0x2fc621bc, 0x1adf1a8c, 0x7181fc73,
12099 0xabbdf1b5, 0x714f37b8, 0x2e3a184f, 0xe9cdd236, 0xdfdd9d69, 0x83317185,
12100 0x06667fe0, 0xf288993a, 0xe3e9ff80, 0xc1ae7e79, 0x198f8da1, 0xfa0baf30,
12101 0x98b8973f, 0x3efa8ae4, 0x0599fdb5, 0x27cbca12, 0xa4e8fdf0, 0x5a24f2c1,
12102 0xde44d88e, 0x811cb47c, 0xd37034f9, 0x36cf5cc3, 0xe50f8a4b, 0xfe7ef473,
12103 0x7587f17f, 0xc8bbe389, 0x778eceae, 0x0f632e9a, 0x638205b7, 0xf175b9f1,
12104 0x0778c5fe, 0x918ef77e, 0xe3944f69, 0xf88ceb7b, 0x298ec56c, 0xb60f3173,
12105 0x13ebf04d, 0xa7a23a69, 0xb7d3dbf4, 0x29e823ea, 0xa173e8dd, 0x13ae9c3d,
12106 0x87f85ff9, 0xd227b471, 0x318c6db7, 0xa9d76abf, 0xd601adb0, 0x6d8e7111,
12107 0x9fee9ec2, 0xadcc8eef, 0xd27188fa, 0x34b1be4d, 0xa3fe7f5f, 0x87e5af98,
12108 0xc459b7cd, 0x6cf9d4c3, 0x67f76a77, 0x7f69fa33, 0xd487a136, 0xfee336f9,
12109 0x15d5f062, 0x75fe13e7, 0x69777cff, 0xf93367f7, 0xf5367f69, 0x7cea1b3b,
12110 0x3e6c3f2d, 0x76cfe0bb, 0x3d97def1, 0x64377f9e, 0x9a23f7a8, 0xbdccf3fb,
12111 0xed2f9466, 0xe850bc6a, 0xfa5173bb, 0x3be849ae, 0x6973f9f5, 0x3dff14b9,
12112 0x7326f877, 0xfa873d2c, 0x933b098d, 0x09933b09, 0xd9e1133b, 0x0d57a735,
12113 0xbbfc7a07, 0x95cf371d, 0xbecfaf41, 0x1cf8f4ff, 0xf1d9df80, 0xe832b98b,
12114 0x9eafd9a9, 0x1e0b337e, 0xfbdbfe29, 0xe9f4fc38, 0x5bb4073e, 0xadcccf82,
12115 0x18693805, 0xbaeacfd7, 0xb97779d5, 0x7cb95db9, 0x6f8f1e75, 0x3d459c82,
12116 0x67e39cd6, 0xcafc7f18, 0x1f349bd1, 0xeecf2ffa, 0x03105f4d, 0x7cb96a2f,
12117 0x1e7f2175, 0x9889c0ad, 0xaf48c6cf, 0xc7bea8dd, 0x8f7da752, 0x23692925,
12118 0x2c7187d9, 0x96394564, 0xfbd0f660, 0x7316d797, 0x533370bd, 0xe15fb81a,
12119 0x1c79102c, 0x4dcbdef4, 0x6b5c62e5, 0xfdb12fe5, 0x09e79d66, 0x79ff77f4,
12120 0x68e1bcd2, 0x7379ab3e, 0x3bde06a3, 0xde7dfedd, 0xb1fd9e4f, 0x64e56dc4,
12121 0x36998f1e, 0x7bdfc9ca, 0xa22b888b, 0x3e143c5d, 0xff73753f, 0x1e9f007e,
12122 0x0f54cf8e, 0x37b5a7c7, 0xff9c0d69, 0xf4de94f2, 0xc34f89c7, 0x0835f131,
12123 0xfbf851af, 0x7ea99b93, 0x88ed1ea0, 0xc55be12b, 0xd85f9aab, 0xc80b392c,
12124 0x9a19675e, 0x14c660fc, 0x1e7bac67, 0x3d48cfa4, 0x197bb46b, 0x3486a3da,
12125 0xeff98dc5, 0xc7d17fcd, 0x1573dbcc, 0x525ef88b, 0x367de53c, 0x1fc91927,
12126 0x93349fdf, 0xb659fc61, 0xd4bc234c, 0x3e51d526, 0xeb187ea6, 0x3a357f44,
12127 0x7c9f5d0f, 0xe909e53b, 0x4061e86d, 0xecc79fd9, 0xe95f2331, 0x5d92563f,
12128 0x99570048, 0x295f2e87, 0x26753d0f, 0x324f43cf, 0xd85e313a, 0x998c689e,
12129 0x9badfe87, 0x71fb5dfb, 0x1fb8697f, 0x886eff23, 0xe56c97d8, 0x9f58eef7,
12130 0xab46f500, 0x5dfc518f, 0x615bffec, 0x4dfda907, 0xf9433f56, 0x4e2a37a0,
12131 0xa9f45fb4, 0x77e07f5c, 0xe231dc5b, 0x0dbb5f28, 0xa3fdfcf4, 0x99cf5cac,
12132 0xfb3eddb9, 0x27dfb137, 0x44962b28, 0xdd3624bc, 0x3737450d, 0x9dde78ea,
12133 0x2d7397ca, 0x9c07ca46, 0xf7d3b16b, 0x2102e66c, 0xf446a4f6, 0xfe56eebf,
12134 0xd8acb53e, 0x7b7e9e91, 0xfe5f94ed, 0x00b5e196, 0x66a7db97, 0xc2bde818,
12135 0x28f31253, 0x5df383a9, 0xa994debd, 0xea1bccb8, 0x7645af4f, 0xc8c3182c,
12136 0xc1757a4e, 0x4e95ad43, 0x8aea8ff2, 0x737d9e91, 0x770fa2a6, 0x77d8c363,
12137 0x04f2ffb1, 0xfbd5cf2e, 0xfc09e5a5, 0x646bde7d, 0xffec6cdf, 0x4917c555,
12138 0x725f48d5, 0x2bae0e6f, 0x33dd3fa2, 0x5b9ff445, 0xcffa813c, 0xf5ddafe6,
12139 0xce3977d2, 0xc8f99da5, 0xec7ce8c7, 0xf429ecb1, 0xbde458b7, 0xe81f9086,
12140 0xa3d64577, 0xce22c5bf, 0x6e505a53, 0x4f218eeb, 0x3ec332d4, 0xa042e46e,
12141 0xb18c8cd7, 0xcff5aa54, 0xa175f47a, 0x90fce718, 0xec1fe738, 0x6ac3b4f7,
12142 0x3df80e27, 0x843cefe0, 0xe172f8f8, 0xb0f1f4a9, 0xbf6a07a5, 0x6ec7bf26,
12143 0x16ceffec, 0xb00371f9, 0x2db3bef6, 0xdf8c5bd0, 0x87886019, 0x8bf91189,
12144 0x25f6bf62, 0xefd0526b, 0x20f4b381, 0xbc0476dd, 0x030d6b23, 0xe42cbfcf,
12145 0xd2160b08, 0x2eb106f3, 0x0ceb5a47, 0x2c38bb8c, 0x6073ca3a, 0x6791aacc,
12146 0xa6536a73, 0xbb0ba1a6, 0x2716299c, 0xe45df7fa, 0xfbe06417, 0x7c9f180d,
12147 0xf78636e7, 0x9d69595f, 0xfd75da12, 0xc6f788f3, 0xe17b8957, 0xed2d5f3e,
12148 0xefd6c327, 0x5ff23197, 0x507382d3, 0xc33df56e, 0x92f19457, 0xc691ddb6,
12149 0x5dee1ff3, 0x02721f18, 0xed2d67bd, 0xb04f4fc2, 0x30f8700c, 0xa9719fa6,
12150 0x7282d5d9, 0x140957e6, 0xe7b7d677, 0xfbc820b3, 0x1bfbecb0, 0xf9c877c2,
12151 0x6c4f2e90, 0xb65b9e16, 0xb9ec9e28, 0x0675a976, 0xe8f731f9, 0xd178ac58,
12152 0xa7ee62ce, 0x2b628ffc, 0x4fb5cfbf, 0x1f63f4e4, 0xb8e1723f, 0x77ffe7ab,
12153 0x49f99e84, 0x7fde93b2, 0x4da3ed52, 0x8e47f843, 0x5f213a91, 0xf8115e84,
12154 0x199f3333, 0x792f45f9, 0xc774b079, 0x96bdaf6b, 0x5b53e8ce, 0x841b4748,
12155 0x138ea3fd, 0xc6a21f9f, 0xf243c578, 0xb87ab252, 0xedfab0be, 0x75af3841,
12156 0xce63e9df, 0xfba085ff, 0xd90fd935, 0xd3ad7fb1, 0xfa32c6e7, 0x9c96983d,
12157 0x3e78dd7b, 0xe9fb332d, 0x96baec95, 0x61dfce33, 0x28f0563e, 0x9fd837cf,
12158 0xefc3685d, 0x1b0e5941, 0xe265d364, 0x27d046f1, 0x19d8cbce, 0xdeaf9146,
12159 0x99e78072, 0xbaca58b6, 0xc5a1af30, 0x6a465692, 0x56f3c2d8, 0xcb16fed5,
12160 0x1607d221, 0x5adfdf85, 0xb8487f50, 0x0947c04c, 0xe110ebae, 0x5077ed43,
12161 0x128b5dc8, 0x5a5ef866, 0xfd4ad29c, 0x83d7b2cc, 0x34e6ca79, 0x6644f746,
12162 0xe217f02b, 0xccc75f35, 0xbec9f431, 0x5a4fae62, 0xaabaca4a, 0x7e327d69,
12163 0xd8b58eb9, 0xe7a4eccb, 0x7cf0ef11, 0xcf968673, 0x577813bf, 0xf91669c7,
12164 0x4eae77b4, 0xc38ed609, 0x1bf79338, 0xcb16e7a4, 0xf5107302, 0xcbf8e25a,
12165 0x391a678e, 0xd7fb78d4, 0x43bef18a, 0x2c4fae79, 0x0678e2b3, 0x8d15f7c6,
12166 0x9c62e1f7, 0x7bfbd5ff, 0x47bd2cc0, 0x581d304d, 0x7deb1ed8, 0x13f3feac,
12167 0xcfd1f2f7, 0xbc7960fd, 0x02871b56, 0x091eec79, 0x72565afb, 0xd53550e6,
12168 0x0bd3f8f0, 0xfd519fc2, 0xf6317492, 0xbf7f120b, 0x2bc5283f, 0xe10c5df4,
12169 0x69c7a4a7, 0x3ef030f1, 0x6f873f2d, 0xde1e781a, 0x7c4c6937, 0xd7cb4e87,
12170 0x38ff1cdf, 0x059f9345, 0x7131ec7c, 0xde23c63f, 0x3888f5a7, 0x6f18c21d,
12171 0x049d17a0, 0x89c7f7ff, 0xc33f9c1b, 0x4099acef, 0x5c60eb8e, 0xfa27e1c9,
12172 0x5dba3936, 0xe239efc8, 0x78d10ffb, 0x2e48c9fe, 0x7a47a5af, 0x51af785c,
12173 0x119bd69b, 0x7c5fdf8b, 0xee0642f8, 0xfd19c5e7, 0xdf743b79, 0xe769e2f4,
12174 0xcbc402e6, 0x6ffbed11, 0x474df8ea, 0x22f8a7ce, 0xe5c0a5fd, 0x3a4b2fdf,
12175 0xd92571b3, 0xddb80b8d, 0x7dfa7ff8, 0x73e617b3, 0xa497753b, 0x084fcf95,
12176 0xfc141cb9, 0xd320bb60, 0x2aee43f7, 0x3a40adf2, 0x0bac936a, 0x3ce72e50,
12177 0x9af2f3cc, 0xb3d55b1e, 0xb47f0628, 0xd5fdf28c, 0xbabf08c8, 0xe491bd7c,
12178 0x3725b35e, 0x28f772f9, 0x9fbb9f43, 0xde7a94e4, 0x79988f55, 0xdb8f8abe,
12179 0x7bbee9d1, 0x3a260f29, 0x7ea8653f, 0x449d23d5, 0x137f6a0f, 0xc5f28f8e,
12180 0x15c52372, 0x818fa1ce, 0xb72b3b71, 0x59d7a233, 0xc098c889, 0x7d0663f1,
12181 0x49607499, 0x106b8e1c, 0x6a0bdcfe, 0xcca1a45c, 0xde7889ec, 0xb9995b70,
12182 0x9a4e823a, 0x8e0fcf19, 0x2337ff1e, 0xac22fb55, 0xa80c63b1, 0x94c6317f,
12183 0x97ed9f26, 0xf278643b, 0x0395b4fc, 0x0ee3cc7c, 0xc5a3e743, 0x232dbe71,
12184 0xf30dac7b, 0x5e0ec0d2, 0x0460b0d3, 0xf64db7e2, 0x3c0368bd, 0xa2687ef4,
12185 0x0bdfea3c, 0x7c16ed3e, 0x05f9d43a, 0xd23001d9, 0x1d9c7b18, 0x80e297c4,
12186 0x2327c64e, 0xebe7345f, 0xf63142ea, 0xf3ec5c79, 0x7878f632, 0xc7b3f7e4,
12187 0x1afe890f, 0x6ded1c7b, 0x46fdd44f, 0xb6768c24, 0x7e3d8627, 0x05f11242,
12188 0xc2742791, 0x0dd5dce0, 0x39313978, 0x5697be99, 0x5defc090, 0x527fa04e,
12189 0xabc87e06, 0x7ed1f3a7, 0x7ff52d99, 0x43f84917, 0x47f0608c, 0x62f905fe,
12190 0xb6bff30e, 0xe23e2248, 0x1b7835f7, 0x73e57e9f, 0xd19236de, 0xf9c036ba,
12191 0xdb46fde1, 0x6233f9c5, 0x8ea467dd, 0x5037fd52, 0x13ef1165, 0x889d3c33,
12192 0xf741acfb, 0x72f75174, 0x9fd36d78, 0xdc1fac77, 0xed7286ff, 0x8b86d9bd,
12193 0x5a622e3c, 0x4b8f42c2, 0x6daa9798, 0x10cea9bf, 0xb9a82f7d, 0x6bd9bb4f,
12194 0x7d0f5e88, 0xd621d417, 0x1f71dd9b, 0xcd4fbfdd, 0xa644f9e6, 0x04e28c65,
12195 0xa66df7d1, 0x3d1e5db1, 0x8c0dcfda, 0x38e8fdec, 0x52a9e639, 0xb181b0fc,
12196 0x79e5122d, 0x7973df6b, 0xfe73fea6, 0x3ad6947d, 0x760ec79c, 0xd1d3da10,
12197 0xf7a849ef, 0x51f7ea5a, 0xdfab3c55, 0x4dbf4a8f, 0xc163eb47, 0xc6aed429,
12198 0xb87bf1fd, 0xf911e955, 0x7f582be4, 0x2b7f7a7f, 0x9bdf7b18, 0xcf29eadb,
12199 0x7fbc7320, 0xb29a186c, 0xc8784614, 0x6fc8c85a, 0xf2683c00, 0xdbd94c09,
12200 0x16e79f69, 0x224c3633, 0x33da683c, 0xfdd3d340, 0x7e6d42c0, 0x0353ec01,
12201 0x57abfb47, 0xd94d53f2, 0xf39597f9, 0x9a638a57, 0x94e4bdc4, 0x97fbe251,
12202 0xed14aca5, 0x9edbf4a2, 0x0738f3a1, 0x5f7181e7, 0xdd629c74, 0xf1826e3b,
12203 0x77fc8fd1, 0xe2cd2fc1, 0xaefd5b6e, 0xf4c8f30f, 0xce549b1e, 0xf30d2cd7,
12204 0x12e97bf2, 0x8a6e7c46, 0x8fcc6667, 0x1e4c2a97, 0x04c9bbc4, 0x32596c30,
12205 0xd4067332, 0x7b3c45eb, 0x8464c48d, 0xf3315599, 0x5dfaa3f8, 0x577d10a1,
12206 0xd479a868, 0x20b22bef, 0x679d4e7f, 0x2ef577d0, 0x7bf93cf3, 0x6be7e8d6,
12207 0xcea99e29, 0x87fe143f, 0xbfde8efa, 0x8137bcd5, 0x441d53c7, 0xf4038daf,
12208 0x417cf04a, 0xca3cf88f, 0x66d5bb85, 0xfa29577b, 0x4c1e670f, 0x114a3650,
12209 0xd2ce08fb, 0x7e03eff3, 0xd7faf1bf, 0xbc927761, 0x1897dfef, 0x8beefbef,
12210 0xdae422fe, 0x09597c3a, 0x191a5ef3, 0xfba431e5, 0x29973faa, 0xa0f600ff,
12211 0xdf111391, 0xd6f18049, 0x1fefce3d, 0x3e77e336, 0xc0e7fef0, 0x13edfe40,
12212 0xd1f76c16, 0xbcd43677, 0x5da3cc5c, 0x3ef0325b, 0x837df472, 0x89c611bd,
12213 0x99b26f98, 0x9f401305, 0x0531f4a4, 0xb9ecf3bf, 0x03a65468, 0xa07d6c7e,
12214 0x93bf0150, 0xa5ee8999, 0x337ead2a, 0x0ae10eff, 0xef676916, 0xefa56e97,
12215 0x64bf86bd, 0x3e14bf94, 0xc3ee88cf, 0x70c4c39f, 0xddf8ff2e, 0xcbe47afb,
12216 0x7a5d7da9, 0xfb93f3d4, 0xf67fa4fc, 0xed3d4fd9, 0x9962e7e2, 0x751f9111,
12217 0xcf545b1d, 0x979f8ae9, 0x5f27ea2c, 0xfdf86a30, 0x46a35eda, 0x5b17c81e,
12218 0x65fd46be, 0x67aa89ea, 0xe3e33fd3, 0x2dde28f9, 0x53edb5db, 0xdbd03e44,
12219 0xc35fdf2a, 0xbc73a1ae, 0xcf331698, 0xd5dce06e, 0x71e26e73, 0x79c7c674,
12220 0x9ff7946e, 0xff404d46, 0xe87147c0, 0xd82fc464, 0xdd952917, 0x58798ecc,
12221 0x8e994ce5, 0xf3b2bd72, 0xe487a41d, 0x3c0f3cb3, 0x5ffdfc7a, 0x7e8595be,
12222 0x9dc99ec3, 0xed2f6859, 0x3d15f2f9, 0xd3d5578e, 0x193eb0cb, 0x58a41e4a,
12223 0x10aa784c, 0xcf5033b4, 0xf59144e3, 0xe74a9eb4, 0xcfe4e565, 0x871a4e50,
12224 0xd933df6e, 0x87e4c2c2, 0x3da02675, 0xfe7c7cc7, 0x57cab364, 0x70972fec,
12225 0x9f81845e, 0x52ea54f6, 0x7b9f616a, 0x6c15919e, 0x46f3d3dc, 0xe7bfce02,
12226 0x7acd39ec, 0xf322fe98, 0x5afbac45, 0x2b53ee71, 0x7efec97b, 0xf92bac4a,
12227 0xa1c52f6c, 0x30de9553, 0xc3d4dbea, 0x37fefa7a, 0xc8bcf0b3, 0x38a14c61,
12228 0xfc5eba9a, 0xd73e2a6e, 0x88de7282, 0x5632b3fb, 0x287eec28, 0x55832a33,
12229 0xcc9a8f98, 0x6b484a76, 0x417d2b53, 0xa5e4e7a4, 0xad939e9c, 0xbf18c3fe,
12230 0xa3af5e4f, 0x59f24538, 0xcbf406df, 0x0565cb92, 0xf84ae4c9, 0xb7f310ec,
12231 0xf9d4f98a, 0xa88cf5d5, 0x7ee84bf4, 0x62e3b324, 0x132aaefe, 0xcc5abf8e,
12232 0x59eb14ef, 0x2c3be8c5, 0x55ad67c9, 0x83272fe8, 0x33df419d, 0x9a79e2b8,
12233 0xb745f335, 0x99d94f27, 0xb1e0e745, 0xe30ad91e, 0x365b64a5, 0xceb94154,
12234 0x32ff23a1, 0x3c5187a9, 0x9d27a93d, 0x4f527de4, 0x8a2728a1, 0x0f4269fa,
12235 0xd4933970, 0xaf2d50f3, 0xa4d2a16f, 0x3f8717ca, 0xda98fb8c, 0x717cb8cb,
12236 0x98be4978, 0x517cb8d2, 0x9556b8e9, 0x325acc2b, 0x0ff7ea1f, 0x06b5acff,
12237 0x73f77b9e, 0xbbe5fefe, 0xbcbe5cd9, 0xfbf725fb, 0xd3bf694d, 0x42aa5ca3,
12238 0x4dfa05c3, 0x33edc0bb, 0xbaab1f95, 0x48113625, 0xe7839a63, 0xc8ba1f87,
12239 0xd9843b9f, 0x63af00d5, 0x9529c912, 0xdd056b6e, 0x83eab3ae, 0x81fed849,
12240 0x3477de89, 0x98e5ce39, 0x83fe1ec1, 0x7c41f7ae, 0x33f7f8ef, 0x415def7a,
12241 0x437e82f5, 0x9a2e494b, 0xe4396c84, 0x3e416058, 0xae487984, 0xe918721e,
12242 0x3a080ebc, 0xe9af673e, 0x5b3fc308, 0x69fcdfcc, 0xc1ffd43e, 0x9340eb9e,
12243 0x1e973d4c, 0x885f2f41, 0xe82b3bf3, 0x7bdd29a6, 0xfc04c953, 0xcd1e62fe,
12244 0x0dfece7b, 0xdcb27fbd, 0xc69f1ff6, 0x3aa72efa, 0x4f7cfa8e, 0xcf19a568,
12245 0x1f9bd0f5, 0xabb4409f, 0x7b235fe3, 0x7ee3e4ef, 0xd0f89a33, 0x78cf3b12,
12246 0xadf3fc90, 0x8b7f9688, 0xc80f864a, 0x91667abf, 0xe7121e79, 0x1e4259eb,
12247 0xddb8554d, 0xe7e56f5e, 0x5fb25f55, 0x8b8afea6, 0xd2af55f6, 0x5ae4f28d,
12248 0xf29b7fe4, 0x7d4bd124, 0xbd97a73e, 0x0a0f9e82, 0x63ecce7c, 0xed97e89d,
12249 0x196e982f, 0xe23ef80b, 0x1cff13d2, 0x52c6bb19, 0x291dcf06, 0x024bf095,
12250 0xd6c97a6c, 0xcf00a9b5, 0xa7a22452, 0x1dad92fa, 0x967fd04d, 0x03a94135,
12251 0xb3f9e8f8, 0x0eaf3416, 0x9784bc05, 0xe3f872e9, 0x1b9e1754, 0xcaccd3c7,
12252 0x4ffe8cb0, 0x8cbf63bd, 0xc46df6fa, 0x2ee311ab, 0x7567c11e, 0x6a571f04,
12253 0x238fb82c, 0x2f2126a5, 0x5e51e33d, 0xd537cace, 0x7c75a18f, 0x1a4c6c7d,
12254 0x506f77be, 0xa73c95f8, 0x7e82c9ff, 0x6b27ccea, 0xccdfa053, 0xd7196692,
12255 0x912cd47b, 0xd7da3cfc, 0xc793f944, 0xd2ac393b, 0x74073d2d, 0x5b6fbc79,
12256 0x6fb61273, 0xd53e4897, 0xe21d2f2b, 0xa7d38fea, 0x0b0f7e3a, 0x3077e1b6,
12257 0xb7af29cf, 0xb1f53e60, 0xcccf05be, 0x7f1c3c01, 0xb8c43f53, 0xc0ad1f4d,
12258 0x244cdf71, 0x356d9e3a, 0x8cb1f469, 0x5e84694e, 0xd36f1ead, 0x0d4af5c0,
12259 0x29cfd3c5, 0x7806e592, 0xad5df3de, 0xd191397b, 0xbd77da52, 0xe14c7be8,
12260 0xa1cc797c, 0xd63cbe23, 0x8a9cb8f7, 0xfb4659f0, 0xde769991, 0xb21a92fa,
12261 0x5b29ceaf, 0x826744f5, 0x54f1d50f, 0x4f8a3e3a, 0x9ced1e23, 0x6df68fff,
12262 0x1dbd20b3, 0xe323bf75, 0x89675d39, 0xa1d0571a, 0x5df0dfaa, 0xda9fa471,
12263 0x7ef3fb51, 0x3851eb86, 0xd7946bfe, 0xd57d238f, 0xa7a2643b, 0x9afecaa3,
12264 0x27bf8614, 0xffecd262, 0x9ac91dfe, 0xda7597f1, 0x5db47034, 0xdbfdcfb5,
12265 0x0ec4cba7, 0xd847a466, 0x3ec2f947, 0xe0771fd2, 0x1768aefa, 0xf7e8eb29,
12266 0x45d90649, 0x8a2edcf9, 0xbe5487b6, 0xb889d66e, 0x65c78eac, 0x58dff9a3,
12267 0xf1eec3fa, 0x8e492ad8, 0xc65bbfbc, 0xbe9073ba, 0x8612a3e6, 0x75d01ef1,
12268 0x15fc23a7, 0x078b6deb, 0xccad7c39, 0xbfbf6976, 0x3f37bfca, 0x1e77d4be,
12269 0x367495e5, 0x6561df4c, 0x07e518ab, 0x9e786be8, 0xad665e11, 0x258bd488,
12270 0x8d2df1fd, 0xd84ba45d, 0xac78859b, 0xf1e46b38, 0x38e89e8f, 0x851fea97,
12271 0xae2bf225, 0x93ea2e52, 0xe67bb8f9, 0x7f6778f0, 0x938f3379, 0xe5fc0915,
12272 0x5d691a94, 0xdcf7808a, 0xb59efb16, 0x41fa54a4, 0x07dfa2f9, 0xef8029df,
12273 0x61e690af, 0xb1553d9e, 0xca5291d7, 0x9777b5e3, 0xa14af278, 0x15f12a2c,
12274 0x3d5e2296, 0x77d35f60, 0x9f643dc5, 0x33bce3a9, 0xfd16e3ca, 0xbcc96146,
12275 0xee8f0edc, 0x6863ed07, 0xe3d8869c, 0x7a38fb40, 0xf6ec6e7e, 0xfc39b843,
12276 0x30fb237d, 0x0c0643d2, 0x52f2a664, 0x16e5e32a, 0x8846aefa, 0x1e0de7fb,
12277 0x9146f3d2, 0x103788af, 0xf4c7fc91, 0x1cbe34f5, 0x58f7419e, 0x8325d82d,
12278 0x7691f9fb, 0x6a84ac94, 0x6aade322, 0xdf94a8b9, 0x1528ce73, 0x604cf3ef,
12279 0xa8afc813, 0xea3cfcbc, 0xc3cd43f3, 0xc85765ec, 0x63f35e7b, 0xc3fa49d3,
12280 0xa55f27e4, 0x4a0e607d, 0x1f39df91, 0x4a89bf6a, 0xc28a1c94, 0x5cf350d3,
12281 0x22dc79ed, 0xd76af6e8, 0xcc7a655d, 0x2ed1f94e, 0x056b07ce, 0xd5dbf57d,
12282 0xbe3f1e3f, 0xfe861f3f, 0xfefbd9ca, 0x4a7ef893, 0x37a56842, 0x145e7ec6,
12283 0xe531f9fb, 0xce70d3c1, 0xfba18c1b, 0x0799ded1, 0xd20263a7, 0xf1f2c77b,
12284 0x9eb005f0, 0x2dfcc537, 0x6feb9596, 0x1c5b4785, 0x1ef998ba, 0x7a78fe6f,
12285 0xd93f0da2, 0xdce395ff, 0xa7206dfb, 0xd07d1e5b, 0x7581b0ac, 0x15d96b30,
12286 0xe347f9ce, 0x6d5d7513, 0x625e305b, 0xf7aabd4d, 0xaf5c5a14, 0x697de024,
12287 0x764de7ed, 0xb4460efc, 0x43c6a03d, 0xc6a5bd54, 0xa4bb544d, 0x1fe3c1c2,
12288 0x7bfced33, 0x69f6153d, 0xb20fdfa4, 0xaff21aae, 0x226d3b30, 0x19fd0ab1,
12289 0xe4fb5add, 0x4657bf3a, 0x9eda2a3b, 0x45334da8, 0x7abd07d9, 0x1715df94,
12290 0xfe54fdb5, 0xc454acf8, 0x17795451, 0xcf9a4765, 0xbb40499f, 0x670bedeb,
12291 0x8d142e28, 0x5c2eeb9f, 0xaebd9fde, 0x83f74f5d, 0xb7ad71d1, 0xfdd2e42f,
12292 0x1baf11a0, 0xcccad4c1, 0x808cc43f, 0x6b7b4c97, 0x18ec1195, 0xf82983a3,
12293 0x58fc36dd, 0x8d0dc633, 0x7c9c7817, 0xd7fb9d84, 0x2fc18b89, 0x95335185,
12294 0x78c17da0, 0xef48ce7c, 0xef5d99d3, 0x09bdbd91, 0x9e2186ea, 0xa6199ec7,
12295 0x5307118b, 0xc08a63cf, 0xb7e66eef, 0x4d81efe3, 0xf7f78bb1, 0x59db462e,
12296 0xa22d3cfc, 0x2d62e27f, 0x3ce22d3e, 0x435b8327, 0xd3ec79df, 0xe7116f3e,
12297 0xfb1a596b, 0x63a3ec1c, 0x7aa2439f, 0xc5b6130e, 0x596c39e1, 0x758a4dbc,
12298 0x2f8b990e, 0x845b0e7f, 0xefd2a95f, 0xb204acb4, 0xe8a6f7af, 0x7b41fbe8,
12299 0xcb59c313, 0xb2fdfe31, 0xaccfde99, 0xb4367110, 0x6b9f10a4, 0x84bf97b7,
12300 0xa371db71, 0x7b8e74f5, 0xbcffd125, 0x60feff8e, 0x1fea78cf, 0xf883b327,
12301 0xfb0780bb, 0x1bbbe9aa, 0xd3bbfcd1, 0x33dd007a, 0x3db9ceb6, 0x839c016b,
12302 0x9980fb25, 0xcf839bfb, 0x4a3fef07, 0x7b4bbe05, 0xa654b9f8, 0xbda3d49d,
12303 0xec66f25e, 0x8fe351f3, 0x3a9da47b, 0xaa362b20, 0x98fc8baf, 0xeca33b91,
12304 0x642db3e9, 0x47c65b67, 0x39c0f7d5, 0x9f8ebdd1, 0xa1d916ec, 0x87ebaf3d,
12305 0x114aa738, 0x7d7f3087, 0xfb65e28a, 0x7e714efa, 0x25c6d1e9, 0xfe5df727,
12306 0xe7135e9c, 0xa1c453b4, 0x00e22e7e, 0x7e7fc29d, 0xf2a4e023, 0xea9b80cd,
12307 0x04280adf, 0x0b940aef, 0x77cfc161, 0x47cb3e56, 0x84aaaf17, 0xcf47edfb,
12308 0x7f7dbf73, 0xbe83a862, 0x42de74ef, 0xbda417df, 0xdbbf144d, 0x2c727c07,
12309 0x1fbf49ce, 0x4cdb3478, 0xa5a3b3f1, 0x8a7bfbbf, 0xd16b7cbb, 0xc70bb8f1,
12310 0xeb4e7ab3, 0x6f184e70, 0xee8b855d, 0x47e036a5, 0xeeffa114, 0xffbe8932,
12311 0x040e1b34, 0x3a5445ef, 0xf169f537, 0x65ff0f59, 0x1ddff195, 0x617f42c8,
12312 0xa4e88b8c, 0x2273ef42, 0x4fba373e, 0x571e5f91, 0x871beed8, 0x7af18071,
12313 0x14fbbe26, 0x3bac4534, 0xe0426f0e, 0x44895379, 0x0a1a73df, 0x86e5d1bf,
12314 0xa32fae54, 0x3475ffeb, 0xdd1b83d7, 0x773ce8db, 0x50b2ba3b, 0xf913efaf,
12315 0x2964b310, 0x285fbf48, 0x1cb1dd77, 0x65915bf6, 0xc011bb1f, 0x6853a32d,
12316 0x4f4afbfd, 0xd8f81c53, 0x21c65785, 0x76b31dfd, 0x79ce305a, 0x53dfc9cc,
12317 0xf9951387, 0xf29db77b, 0xa4f2312d, 0xe958f2d5, 0x95fdfa22, 0xef7cfc7f,
12318 0xdf7cd1da, 0x0af5524c, 0xfb815b8c, 0xdef9424d, 0xc3f902b2, 0xfc83b998,
12319 0xaa73e8cc, 0x88b35f70, 0xfc64f3de, 0xb6bf4f7b, 0x3f782c86, 0x0267ed1c,
12320 0xff426c7d, 0x3d04f778, 0x5eadaf7d, 0xe782e7e6, 0x1fa4e788, 0x997e13a3,
12321 0x65667c76, 0xc0fa633e, 0xde1d6079, 0xf13ad0d7, 0xadefaa3e, 0xf86292bf,
12322 0xc9d683b5, 0xf9589efc, 0xcdcfd1b0, 0x9a20b276, 0x1615b386, 0x709fa176,
12323 0x99c69f30, 0xcce3e56d, 0x9b7c7112, 0x1759ffa0, 0x81df9475, 0xcf80d6f4,
12324 0x7927cc95, 0x50f5cc72, 0xb7ac1d57, 0x41c6ce1e, 0x569346fe, 0x5b39090e,
12325 0xf745525f, 0x07dcc7bd, 0xbfbea3c6, 0xe1e574be, 0x9fc22732, 0xb74154d4,
12326 0xd52fa529, 0x945a5d20, 0x4c2f8a2e, 0x5d74cb76, 0x36b97d78, 0x17afd14e,
12327 0xb44bf4a3, 0x928fa8be, 0x54f7113b, 0xf9c4434e, 0x4b9f72cf, 0xab83a488,
12328 0x2f1ccbc7, 0xd67baf7e, 0x1da71e05, 0xe9f7978c, 0x7803a573, 0xd8ef3e89,
12329 0xa73e8978, 0xeaad3c01, 0x8c1dcbaa, 0xbf6f155f, 0x1ac9792e, 0x8d1be799,
12330 0xaf8a1fb7, 0x4156d1e6, 0x579e5caf, 0x3b7dbe08, 0xb771443b, 0xeff94bb7,
12331 0xff731d4b, 0xb3bfe296, 0x0d63a858, 0xcbe045ca, 0xe8f94239, 0x344ce423,
12332 0xf4f8061e, 0xbf2e283f, 0x28b7f3fb, 0x21caaa2e, 0xea25f213, 0xea1fc113,
12333 0x1f9099b9, 0xf02f6f91, 0x2d5e87ef, 0x457ca87f, 0x383f21eb, 0x1fcc8fa4,
12334 0x5fc5dffc, 0x18cd717b, 0x52167617, 0xd1cab83c, 0xac7bc7a5, 0x3dd250c9,
12335 0xd27f8892, 0xf5919c3a, 0x591c6e3c, 0xa12f714f, 0xa6b8d4f7, 0xbb3ebeda,
12336 0x5518412b, 0xc24d47a4, 0xc4fd51de, 0x64538e7d, 0x54faaa7f, 0x57fef716,
12337 0x08f74fab, 0xfb543a7d, 0x79bb73de, 0x43cbe7dc, 0x1c800f3d, 0xa46f9c9f,
12338 0x0e4cb8ef, 0xa3dfcc3f, 0xfe498470, 0x9137746f, 0x69fb0c1f, 0xe604a346,
12339 0xf3e64475, 0xf3bee5a9, 0xefd60a6d, 0x0af4bb95, 0x16ff07f5, 0x568603e0,
12340 0x0d869dfa, 0x137d738f, 0xd651f457, 0xba83dee5, 0xe6994fb3, 0x61efc24a,
12341 0xdf835f6f, 0x8c2a0b01, 0xb598ebbe, 0xee458bb4, 0xdc31a5f7, 0xff9c9daf,
12342 0x68071dd6, 0x69ea1fdd, 0x035768dd, 0x9d964f9d, 0xcfe7050e, 0xfd23dbf6,
12343 0xf7d97dec, 0xb7009dda, 0x086c697c, 0xa3c37ad1, 0xecf3017e, 0x078d5733,
12344 0x73ed8d4b, 0x0bf5181f, 0x7346c7c0, 0xa3cc04d5, 0xdbdfb6ac, 0xdae51f3e,
12345 0x60265bd9, 0xbcec1bfc, 0x83b7d456, 0xcdb7dff6, 0x5d3bbf8c, 0xd69f78ed,
12346 0xabafa231, 0x5abfbf06, 0x48f7e0ed, 0x87bed1be, 0x7b404cc6, 0x73c1ec39,
12347 0x0c9f344f, 0x164cdd22, 0x2f1765eb, 0xbd41fc51, 0x9e73d997, 0xf8ff47d3,
12348 0x8fb80f40, 0x455cbf6b, 0x7db922f7, 0xa026f9ba, 0x3c7d75d5, 0xf1db0c7f,
12349 0xbf58e07b, 0x001d8628, 0x4be75cf3, 0xcaebf3c6, 0xde8637ba, 0x36fbedcd,
12350 0xf6e783e0, 0x44bc7064, 0xc31e6fb7, 0xafb882ed, 0x9272cfde, 0x7ff5c03d,
12351 0xf312c0b0, 0xa9b7553b, 0x3b1ad2fa, 0x552d450f, 0x23daa579, 0x21b35f80,
12352 0xc69bbf02, 0x7cfdff70, 0xf103a7a9, 0x7fe77df7, 0xe50b710a, 0xf6cf52f1,
12353 0xae91c331, 0x97ad5f04, 0xee01c663, 0xc5a3f31c, 0x13416e2b, 0x73beabef,
12354 0x86e96fe9, 0x7441dba6, 0xf8e95065, 0xffe3a221, 0xe27bf48b, 0x20efd0fb,
12355 0x14fe7479, 0xd347c3dd, 0x03bf4ab1, 0x9be6c874, 0x79e80692, 0x7ec1ba28,
12356 0xe806928b, 0xfb7ea87a, 0x931fbfce, 0xe9c607de, 0xabdd2cbd, 0xd059b7f4,
12357 0x540f7a91, 0xfd79ce29, 0xfeec8cd7, 0xf5463da3, 0x7e35c677, 0xca3fe811,
12358 0x72b0aea3, 0x37b47fb9, 0x3d19fb97, 0x9a9fba66, 0xbe295ee9, 0x235d0dbb,
12359 0xf211adc6, 0x75dba67e, 0xeaaf3959, 0xfddf550b, 0x43777c4f, 0x00800098,
12360 0x00000000, 0x00088b1f, 0x00000000, 0x7dedff00, 0xc754740b, 0xeebd6095,
12361 0x91a93fd7, 0x16883e9e, 0xc085a092, 0xeb404616, 0x7d3d05ff, 0xa71f3210,
12362 0x900b18c1, 0x04e08b4c, 0x60dd491b, 0x9e3d90e2, 0x123231a1, 0x1f62cd9f,
12363 0xbd6678cc, 0x8c030d39, 0xc077b19d, 0x0b611c56, 0x3837e2dc, 0x71c6ec4b,
12364 0x3c4c9c18, 0x6c0843c2, 0xc718d36c, 0xbc4ab243, 0x0f7adef7, 0x0b756bf5,
12365 0xcceb43db, 0x40e75764, 0xaabd5ea9, 0xfeeb75ba, 0x7ad3d56f, 0xcecc6333,
12366 0x53f817d8, 0x08acbc3d, 0x65cb191a, 0xfc05f3f4, 0xebf2e2db, 0xdf632b25,
12367 0xb4cbeeb9, 0x2c93f943, 0x1e670adf, 0x355faf63, 0xb188acca, 0xf6e3a9ae,
12368 0xfa87b3ea, 0x8c08758f, 0x127b4315, 0xef768674, 0x0077c154, 0x27d1311e,
12369 0x7d1e9d2e, 0xfd4c9fde, 0x8795cdae, 0x9d32fab3, 0xaf7a6863, 0x59b18d3e,
12370 0xca0e9bf8, 0x332d9320, 0x5aedcca0, 0xcca012c7, 0x9636f92c, 0xb12e624c,
12371 0xf2933184, 0x6bcae99e, 0x39f015df, 0xfe831993, 0x56f595eb, 0x0d5d7f30,
12372 0xcccf31c0, 0x3889f1bc, 0xc9c9d37a, 0x97cd5ed0, 0xd769e30a, 0xfe9fde1d,
12373 0xe4f329a5, 0x572e3630, 0xfbcdf5a0, 0xf04cf98c, 0xeb6e756b, 0xe7033602,
12374 0xd1cc7187, 0x1e60a9c7, 0x1d01e999, 0x2adb5ee5, 0xaa6b3fe8, 0xafe5e1c9,
12375 0x6cdef84b, 0x3e1bdfc6, 0x4ac67ace, 0xe2d9c686, 0x54fac809, 0x4c498ec6,
12376 0x6f5b2fe9, 0xf8e767c1, 0xb2857ac3, 0xcd6e533e, 0xebcbc455, 0x07e1c792,
12377 0x860f6778, 0xcb1d6f8d, 0x55633a58, 0x8b9f699f, 0x387d6d0e, 0x58fb305c,
12378 0x5f4fe5fa, 0x33467cc0, 0x5d398fc7, 0x5d79f847, 0x3e90fa32, 0xeed4ae2a,
12379 0x4b189362, 0xfc87ec96, 0x992adcf0, 0x36053e1d, 0x7e53f633, 0x0402b8af,
12380 0xc29fed04, 0x738014bf, 0x5aef6e9b, 0x16ddd027, 0xa21f4c6c, 0x4c0b2597,
12381 0x2e96381a, 0x9bd4d449, 0xea69c79a, 0xd44f57cb, 0xdb736fec, 0x43fa9add,
12382 0xea6a661b, 0x354a27ae, 0xd59d55f5, 0xef56f19a, 0xff69ab9c, 0x686feed6,
12383 0x7f9e6bea, 0x747f5350, 0xe911caff, 0x885f1a22, 0x89e991b6, 0xd23b0579,
12384 0x3a4d88bf, 0x9cc5cffc, 0xf7f7a3d3, 0x7ec27f21, 0xb7af6ebd, 0xd5fe82ad,
12385 0xe78d3f57, 0xc5f4b4fd, 0xf90072bc, 0x17d956a3, 0x402bc798, 0xad528d7b,
12386 0xf445be95, 0x4536635e, 0xee951be4, 0x11560ab6, 0xda66afc7, 0x6db0aafd,
12387 0x7e47aebd, 0xebd01a2e, 0x3759be61, 0x2157fcb5, 0xc706fc35, 0xc7afcc67,
12388 0xa5cb84f5, 0x9318eeff, 0x609e397a, 0xfc017fb5, 0x8cc9acc4, 0xa3c74795,
12389 0x5db7a74a, 0x6f5f6337, 0xeafccadd, 0xa0582b7a, 0xda3ee90e, 0xfc3b67ba,
12390 0x516b927a, 0x5ebe1dd6, 0x6feffe15, 0xef815f86, 0xf323ff5f, 0xdb1013ed,
12391 0xe6fc88b2, 0xcfeb5ddf, 0x02402bb5, 0x7a1527bc, 0x278291a8, 0x0e908b12,
12392 0x83650398, 0x51f99071, 0xc133d40e, 0x9652846f, 0x38af041c, 0x3034ef68,
12393 0x7e71eb2a, 0xa6861071, 0x35eb45d2, 0x288dca0e, 0xa92c456f, 0xebc79cee,
12394 0x875e068e, 0xd52ea8f7, 0x3ee7baf2, 0xea92875e, 0x43af275e, 0x5aefaa3f,
12395 0xb8cef58c, 0x014489c0, 0x5825beeb, 0x5a1e0e37, 0x05ff4bca, 0xe4994a81,
12396 0x5de83896, 0xec7ea7a7, 0x3707af22, 0xf2d0fa71, 0xf65e3183, 0x5f19b3f9,
12397 0x813f3c3d, 0xfdc24dbf, 0x006fd75c, 0x828ad43c, 0xd5ef0ec3, 0x3f87320c,
12398 0xe4d5f715, 0xe097d990, 0x3133a033, 0x8ccf886d, 0x4ab1982c, 0x0f793e20,
12399 0xedcaadf1, 0xe968e3e1, 0x5af51eab, 0xfc3bec01, 0xe51931be, 0xfaa7a730,
12400 0x2c12e0b2, 0xd013f9f1, 0xfc327b3e, 0x1f4e1e4b, 0x32a25c2a, 0x5fb5a55f,
12401 0x32b6aa8f, 0x59b72618, 0x8559d117, 0xd92c9d79, 0x716dcb87, 0x2e2fe550,
12402 0x56e1c22f, 0x1f39ade5, 0xfb1a6cf8, 0xb9967c3a, 0xaeb36a0a, 0xd9f0abbe,
12403 0x933e30ba, 0x8496f7ad, 0x321019f0, 0xb7d9f0d3, 0x276e9e89, 0x83094e5f,
12404 0x4f182675, 0x23e80cf6, 0xc05499ca, 0x3e244243, 0xb21bfb9b, 0x97c8a21f,
12405 0x5817f037, 0x987e6e67, 0x5cf4519c, 0xfee7aab5, 0xdda2b3a8, 0x117a67e2,
12406 0xc87c70cb, 0xd2313b2c, 0xbe3cb573, 0x6bba0609, 0x90f80ea8, 0x63be810f,
12407 0x06dc151f, 0xcec99bcf, 0x805ab862, 0x31e2aac7, 0x71ad6e8c, 0xec909d2f,
12408 0xecf505bc, 0x4e6e8518, 0xdf11a766, 0xc7bd76c3, 0xb59de442, 0x01f1cbe8,
12409 0xc70937cd, 0xbf226673, 0xc6db40d5, 0x33fde182, 0x99f00fb1, 0x3e7cc835,
12410 0x08eacf78, 0x46af5808, 0xf48d9efd, 0xfe51eacf, 0xe8095f57, 0xe5a5ea25,
12411 0x00745b97, 0xa4013fbf, 0x517c8b57, 0x642e9c30, 0x7ee3d3e6, 0xaffdd57c,
12412 0x90341fb6, 0xffdb0ebc, 0xcfb0419a, 0xd5394e00, 0x1afa20e4, 0xc8cf6464,
12413 0x48c7c14e, 0xbc21acbe, 0xade3f6a8, 0x176826f6, 0x622e91e8, 0xf640b37b,
12414 0xb36ca7d0, 0xf305f381, 0x867a55fa, 0x30afcbe7, 0x34ed1139, 0x7ed4f3cb,
12415 0xfa23136c, 0x3c97b6a8, 0xb8476755, 0x44cc7606, 0x0abd24b8, 0xc7153f97,
12416 0x70e260bd, 0x7f08daf9, 0xe4fe0ad5, 0x43331d41, 0x694fbfbb, 0xff5fa30f,
12417 0xfcd3b720, 0x702bc44f, 0x43f0c8dd, 0x4ed007bf, 0xe5689306, 0x43ff03dd,
12418 0x69dcf784, 0x01df3f77, 0xf028ae5d, 0x6e856ffc, 0x5124da3f, 0xf5cd3eb9,
12419 0xc7a07cfd, 0x7c6e917f, 0x0fc866e2, 0xd5f74439, 0x9027cff6, 0xd9f1521e,
12420 0x10f48637, 0xe8f84dc2, 0xdb8344b3, 0x387510aa, 0xe5bf0abc, 0x2a57c88c,
12421 0x577c2a9c, 0x0bab7a7c, 0xe7b37bc6, 0xf61c135f, 0x454bf821, 0xfb847ee7,
12422 0x674fc1cd, 0x92ef88b8, 0x34667635, 0xfc5266f9, 0x964ca488, 0x3ea2a62b,
12423 0x85cc7388, 0x74cb8c75, 0x364cbad1, 0x02fd1da3, 0xf393274b, 0x82734860,
12424 0xf7f08ccf, 0xd2ec37a7, 0xa9d6fb43, 0xfbc13322, 0x36bcb35b, 0x09fea75a,
12425 0x9399eb86, 0xd60361e9, 0x6577f3e8, 0x9c11293e, 0xbf475083, 0xa2f1c6c7,
12426 0xf8f4689f, 0xc75fb9e0, 0xc10a1cd6, 0xee02c1cb, 0xe7cd9d8f, 0x1e17dae5,
12427 0x842976d9, 0xad0fda3f, 0xbdddd4d3, 0x2976dbdf, 0x106ede54, 0x3697dc44,
12428 0xd9db8e85, 0x5ff404c0, 0xe13b455a, 0x903743a1, 0x2c6bf586, 0xae0a7e78,
12429 0x008fe70f, 0x5be73fff, 0xd2ff3d62, 0x8ff650a9, 0xff69fee1, 0x0df91f24,
12430 0x2b1ffcea, 0x5f38ffeb, 0xa6387317, 0xb3ba1e01, 0x9f70c5bf, 0x3f7c6c6a,
12431 0x7a72504d, 0xf54372e6, 0x739e8677, 0x3ea55179, 0x73de3a0f, 0x1ce91d12,
12432 0x994c76a8, 0x7de911f6, 0x71bbd227, 0x48b5bea8, 0xf08be8d7, 0x220573fe,
12433 0x16c07bc1, 0xa15b3db9, 0x5c139d97, 0xdfe8d9dd, 0x6c73ab3f, 0xcbce2586,
12434 0xe51e3adc, 0x7adb56fd, 0xe2e653a2, 0x38c058eb, 0xf4cbcebf, 0xd1e81978,
12435 0x82b7fe79, 0x8dd62a42, 0xf886c2cc, 0xe70bf557, 0x01d13e89, 0xd7f2bbfd,
12436 0x5ddd7199, 0x1c66f5b6, 0x82d684cf, 0xea3c386e, 0xe6ec0fba, 0xf4cbcef3,
12437 0xb2e9e089, 0xc57bb9b9, 0xa33fa801, 0xee5e7bac, 0x6aaf6a3a, 0x09149ff4,
12438 0x4367e07f, 0xf568e8dd, 0x87263ce2, 0x3ac246bd, 0xb2c66c73, 0xec89784f,
12439 0x0dbf5513, 0x9dad4fe9, 0x91bafa72, 0x15d763e4, 0xf244cf9d, 0x07305e53,
12440 0xbcaf9fde, 0x7b720d6d, 0xa3bf6bbe, 0x1cf7c45f, 0xf3e3f902, 0x764dbf73,
12441 0x2e77359d, 0x56b3e7b7, 0x98549179, 0x3fa1f04f, 0x5bc54f31, 0x195f569e,
12442 0xa0b7171d, 0xd4de30fa, 0x2c59d1ea, 0x2abe90c0, 0x70f3fcc2, 0x40bb3b7d,
12443 0x5972d7b1, 0x2d2bda31, 0xc863df26, 0x420d960f, 0xe2a1c23a, 0x8e814575,
12444 0x7c8620e8, 0x942667b0, 0xb465d95d, 0xd3ccfaaf, 0x5f980417, 0x4366df17,
12445 0x8cdbd0be, 0xb31bc47e, 0xa80d1f8a, 0xffc24df3, 0xb7b22533, 0x2f848eb0,
12446 0xfc79397d, 0x86c7966e, 0xb032eceb, 0xa7f248a6, 0xfdf380b6, 0x927e5907,
12447 0x8ddad10f, 0x7bd2041b, 0x66377caa, 0xc237d932, 0x5c8cdb78, 0xd25f80ce,
12448 0x3ebf402b, 0xffa017a4, 0xf7b35a17, 0x7ba205e9, 0xadf1e519, 0x12efb152,
12449 0xfe1fb90b, 0xca898166, 0x547eca93, 0xc336717f, 0xaffc8235, 0x8430f2aa,
12450 0xc7ca94df, 0xf1f26533, 0x732f224c, 0x2e3f7195, 0x5cdc7ce2, 0x5fb97b14,
12451 0xfb7a339a, 0x8d7a4b1c, 0x90285287, 0x98dd79e8, 0xc52e4987, 0xa3396f12,
12452 0x5da33788, 0xa7073fa1, 0x73fdb513, 0xaaffde45, 0xb274e620, 0xe51472b4,
12453 0xa4e92c41, 0xde83cfe2, 0x79ff97cf, 0x68da47ec, 0x99a3e3ae, 0xe042d4f2,
12454 0x2e9cbf93, 0x96e583df, 0xbbdb23d7, 0x772f63f3, 0x72801ed3, 0x37df04f1,
12455 0x79b3e923, 0xfb97b185, 0x48bed14b, 0xf845f6e1, 0x3d15cbfc, 0xd2794b14,
12456 0x11b36504, 0xff011fd6, 0xfcc28e8f, 0xef5073cb, 0xe5817b72, 0x0fa4b99e,
12457 0x67e1dfb1, 0x3ec42eb2, 0x1c147b06, 0x0543b441, 0xeddd9239, 0x2d7efd8d,
12458 0x643f487d, 0x5c61ccaf, 0x2ff3a81f, 0x7af8e12c, 0xb0e0147a, 0x25eade00,
12459 0xc29baf6e, 0xbfcb50e0, 0x7dbd8c2d, 0xe043e92a, 0x1fbb0548, 0x444205cb,
12460 0xd0a7af7b, 0x1a7e7318, 0xe2d9780b, 0xe4918d60, 0xefd8c9c9, 0xca0d9a4b,
12461 0xd3cee9aa, 0x4b96d728, 0x5c60e787, 0x1ff8fbf9, 0x79d21be6, 0xc1a561be,
12462 0xaeff45e5, 0xbc3bb24b, 0xac478c76, 0x7ccafaa2, 0x52af43bb, 0x94dfb63e,
12463 0x6c05db7c, 0xe57d51d7, 0xda1f24ef, 0xd617dfc3, 0xf1c6c99d, 0xfb1deb36,
12464 0x959dc618, 0xe78d837c, 0x9e36ac1b, 0x3c6d109f, 0x29b560ef, 0xcf1b0779,
12465 0x4a6d583b, 0xf3c6c1de, 0x929b560e, 0xbcf1b077, 0xe4a6d583, 0xef3c6c1d,
12466 0x7929b560, 0x3bcf1b07, 0xde6a6d58, 0x1538d3c1, 0x9e3691e3, 0x78dab077,
12467 0xe36ac1de, 0x97980779, 0x3c6c1de7, 0xf17000ef, 0x722d83bc, 0x943ac1de,
12468 0xf1ff2077, 0x67a49618, 0x547f5fb8, 0x7b06cfa9, 0x786334dd, 0xe76ab55e,
12469 0x17182dfe, 0xfc7209ab, 0x5e783955, 0x77b414d9, 0x457e300a, 0x04dfb066,
12470 0x114565fe, 0xb0d5f0c3, 0x13f3c3f9, 0xbde7d9dd, 0xb0a3fa02, 0x03bc2997,
12471 0x18ea29e5, 0xfe7c3f7f, 0x3b577161, 0x65d6e78f, 0x3bf08b7e, 0x78482cbb,
12472 0x8718e7c3, 0x13f253ad, 0xffad56b5, 0xb2e67f2a, 0x995f71f9, 0xf80899d4,
12473 0xbb6d4590, 0x8c2ff988, 0xd7f15ebb, 0x6ab7dc61, 0x15771b50, 0xb8d41b33,
12474 0x844bcf3c, 0xe1df39c1, 0x6b045f1c, 0x2a7f016a, 0xc1cfe601, 0x53ae15a4,
12475 0xa45e7c12, 0x881bddb7, 0x453bbcbe, 0xaa6814c7, 0x9e606404, 0x6a2012a5,
12476 0xc654d286, 0xf24cd2ac, 0xfe9d389b, 0xf1bdd4d7, 0x030f28d9, 0x6c04467a,
12477 0xf9a83c23, 0xbf580485, 0x2bfc8334, 0x332aeff2, 0x3a47bffd, 0xcc82eb50,
12478 0x5d8238f3, 0x2f80cd62, 0x5c266ef9, 0xceab9336, 0x45eb6f90, 0x73c335e6,
12479 0x9b37e941, 0x2d4e2905, 0x76f28933, 0x6541ccb5, 0x695774d1, 0xcea3f011,
12480 0x7ae175ec, 0x0966ecaa, 0xee3d85f9, 0xf148db3c, 0x32e97ae4, 0xf60049e0,
12481 0x48da62f8, 0x2ec88a76, 0x451cf8ab, 0x2f1f48bb, 0xadc92278, 0x61ebd88a,
12482 0x0a2a83b2, 0x2dc7c919, 0x7cfcb22c, 0xcfcb84ac, 0xdf5d4b37, 0xfbd73c44,
12483 0x878fd516, 0xd0be8f2e, 0x6d9b794a, 0x5bc2f161, 0x6f628afd, 0x90e72447,
12484 0xe901b93d, 0x8f04f17a, 0x1688e10d, 0xf62a78c7, 0x1b49ecf0, 0x767baec1,
12485 0xd45aec14, 0x2aecb743, 0xfa9399fb, 0xb1ca3b50, 0xd0ba4f0e, 0x9092baef,
12486 0xc3ddaa38, 0x8d67143c, 0x6979af1c, 0x9920e214, 0xfe13bfa8, 0xea639d0b,
12487 0x87fb023a, 0x54bcfbe5, 0x428ef8e1, 0x634be387, 0xa0d317cf, 0x613e27d4,
12488 0x771b8d0b, 0x970e0459, 0xf5c0d041, 0xfdff62b9, 0x78f624a0, 0x7d72812a,
12489 0xf22efca9, 0xf974d561, 0x7caa5867, 0xbae1df3b, 0x2d29fc40, 0xf9024faa,
12490 0x767f66bc, 0x0689ea01, 0x2ae35edb, 0x52d5f780, 0x3a22fdf9, 0x5b1ff46f,
12491 0x1eb16e1e, 0xf7bc478f, 0xa3cb22b9, 0xc50911bb, 0x28de4fe4, 0x67e4fee2,
12492 0xfe288784, 0x638bafe4, 0xea7b2fbe, 0xc9fc8673, 0x5b1ffe70, 0x639de3cc,
12493 0x068e0147, 0xf1465728, 0xc28ca6eb, 0xbf5a8dfc, 0x443ebf6e, 0x854110ce,
12494 0xdc6c69e6, 0xfc1163af, 0xba35973d, 0x147b37bf, 0xf310b1d6, 0xf591b571,
12495 0x31c57dda, 0x7e96aff7, 0x3307ca03, 0xd0a9fd5b, 0x6f30bcc4, 0xb2be50da,
12496 0x0fafd5c9, 0x383f738d, 0xe537e0e1, 0xb37e7008, 0xf272e638, 0xf91e9c7c,
12497 0xe119bd75, 0x7e066ae9, 0x255fb08d, 0x9bffdc25, 0x9611e13b, 0x3a637688,
12498 0xe411f743, 0x3637cf09, 0x83637e29, 0x2a767fa2, 0x2c53d472, 0xe52ce952,
12499 0xe851b9f5, 0xfbcad7fa, 0xb69c4a8d, 0x2bf26251, 0xec7ff491, 0x38fce6e9,
12500 0x71c6e728, 0xf30def38, 0xf453dfcf, 0xd3d89ec4, 0xa00c9ecf, 0x91b5b993,
12501 0xf63075f1, 0x0274b174, 0xf6d4bfcc, 0xf8901cf4, 0x0d9b2fb0, 0x2e9c5f94,
12502 0xef0c58bf, 0x57c28b6d, 0x69782b9f, 0xb03a3e86, 0x34a05bfb, 0x9010f942,
12503 0xfa405481, 0x6fec55ed, 0x14308e01, 0xf1de0420, 0x3af4e7e8, 0xce7c1ee4,
12504 0x7fe46d5c, 0xca1bc884, 0x3999569f, 0x83a774df, 0x0efe88ff, 0x9339d333,
12505 0x9fcf20ae, 0xfcf26576, 0x6a3c3868, 0x456ff4fe, 0x71cf198f, 0xc4166577,
12506 0xebddf285, 0x6f26989b, 0xe78575dc, 0x8a4fc185, 0xc949fad3, 0x8f8527e4,
12507 0x74b9909f, 0x247fa85e, 0x021fdcc8, 0x5c50267f, 0xa917e43c, 0x7c98cffe,
12508 0x7ff15cf9, 0xcd1dfd02, 0x4947119f, 0x07308b0f, 0x74ddff3e, 0x8f10dff9,
12509 0x1fd3d023, 0x9fd3d0a3, 0x347fdfb0, 0x11cc627a, 0xf0cc68b7, 0x1eb2bb71,
12510 0x708eb5b7, 0xd321203f, 0x54ce9119, 0x9b7a02fa, 0xe8763250, 0xb4f3217d,
12511 0x4b136f4a, 0xbd3ebf8a, 0xf0bec05d, 0xafe1acef, 0xd149d6ec, 0x7ab59dfb,
12512 0xfa0f28cc, 0xf19bd732, 0x99d4c49e, 0x6bce072e, 0x006c9911, 0x3e5cbb38,
12513 0x007b9e33, 0x64bf2f3b, 0xcdc1bc84, 0x7e3f2e22, 0xdcffecad, 0x2aff9c09,
12514 0x7dbe0b96, 0x6c4d7fc0, 0x4df70197, 0x4958ff7d, 0x7b88fdec, 0x35ee4872,
12515 0xf7208c96, 0xe2f8565e, 0x2b5f0573, 0xe729d6da, 0xfb445899, 0xfdec5567,
12516 0x942b348c, 0x45d75273, 0x745be3a4, 0x2285e787, 0xe21467ac, 0xe4c7e7e0,
12517 0xcd4c3ce0, 0xfc406d2b, 0xf1c4563e, 0x7dfecd17, 0xb3fc146a, 0x4ad70089,
12518 0xfd0199f6, 0xc7ff5969, 0x11e748ac, 0x39d9158e, 0x0390069c, 0x5995df80,
12519 0xfc31b7ba, 0xb5a495d9, 0x67f7d487, 0x67aefe2b, 0x5267e414, 0xf1c3ce0e,
12520 0x4c0e7e1a, 0x3ec5cf2d, 0x88b4b01e, 0x80ffb9fb, 0x73fc0efc, 0xe358a4a8,
12521 0x64a8fee7, 0xb5f73f64, 0x1adc8f7f, 0xcba8e850, 0x7d9ed911, 0x40fbf621,
12522 0xdd60e0e7, 0xb9157cef, 0xaa6f6e11, 0xdbd89ee5, 0x7a59697b, 0xd1c3879c,
12523 0x24e7b4c8, 0x28dff16e, 0x8f5d2de0, 0x77e968f3, 0x5ffae325, 0x1a58c385,
12524 0xe78c73f3, 0xff31e867, 0x7d79f9c3, 0x94be2ba9, 0x198f36ec, 0x07d837f5,
12525 0xb95f6714, 0xcd1f2539, 0x6b67d82a, 0x93be96a9, 0xefa6474a, 0x403bd2e4,
12526 0xfc9caadf, 0x534c6117, 0xa899bca8, 0xa5699bc8, 0x29afdfb1, 0x8e48af18,
12527 0x632baf2c, 0x73dbe71f, 0x79744e77, 0xfb379eac, 0x4f1b4147, 0x8f25bd6e,
12528 0x69474e63, 0x7921faa9, 0x7087eaac, 0x5e868d3c, 0x0bd10c48, 0xcce4510d,
12529 0x3631c068, 0x9db51f04, 0x98afe502, 0xc0a6f98d, 0x39d89daf, 0x96c7dee4,
12530 0x4f138851, 0xc87f8d0f, 0xa047af60, 0xb1a5dde3, 0xbca37fcf, 0xdb7c37e9,
12531 0x47f9d236, 0x28c5d5a3, 0x3173623f, 0xb19fec3b, 0xf6f295b3, 0x94ad05c6,
12532 0x029d6687, 0xf498fde5, 0xab79f92e, 0x30a7de6c, 0x9e5c367d, 0x5e398d6c,
12533 0x97d8728b, 0x28c537f6, 0xf8ebcd7e, 0x37f93a4a, 0x153ca3af, 0xb347ee24,
12534 0xf74ecc0d, 0xb97cafa4, 0x202f58fb, 0x9a2f3012, 0x763ee8c4, 0x7ac7e1a7,
12535 0x051b47cc, 0xe65cfe3e, 0x974ff9e7, 0xf0a3fc77, 0x31a0e59e, 0x7f543b7f,
12536 0xfb4d9a51, 0xcfe569de, 0xf39bf6bb, 0x9ea5849f, 0xc19e15b6, 0xa753e1f3,
12537 0xec1c5327, 0x6b8f03c5, 0xbc5aecec, 0xdf7e80c7, 0x7e861e0b, 0x35d329a2,
12538 0x9c3b2471, 0xae927f31, 0xa89a508c, 0xfa5e7a94, 0xf86d9d05, 0xf7f73bfb,
12539 0xbd67e848, 0x724cc078, 0x9e81ea7f, 0xe32155f8, 0x3e719627, 0xfe3d06b6,
12540 0x35af0019, 0x093273d3, 0xf92b1def, 0xce799173, 0x632bc2d4, 0x0f9d00a4,
12541 0x6b5791df, 0x2ebba50e, 0x794cd6a9, 0x639d5ce4, 0xfceb1d8a, 0xf4fc431c,
12542 0x4082fdda, 0x112edd7e, 0xe19aef50, 0xec7a86ba, 0xc3eb890d, 0x496b53a9,
12543 0xe72a75ab, 0x2de4761e, 0xc7ef8039, 0xf1a7af4f, 0x7b64593b, 0xe5c658cc,
12544 0x99068bf0, 0x80f17de6, 0x55c8e748, 0x7c69debc, 0x0f30cbd6, 0xa6dea3e0,
12545 0xa7d87ba7, 0xe5114e8d, 0x8134e9d0, 0xdf2d82ed, 0xee8578e9, 0x0288ec99,
12546 0xb94a2fef, 0xa96cca9f, 0xf7a77f44, 0x748f2e77, 0xbfa55f7e, 0xa96433c9,
12547 0x49c0ed0c, 0xff94269e, 0x36e4b6cc, 0xdf24f17c, 0xe68743bf, 0xcffc03cf,
12548 0x227fc17d, 0x6b21f70e, 0xf75c78cf, 0x6a76a507, 0x1f0f45bf, 0xb0f442bd,
12549 0xe3efc8c5, 0x8e717578, 0x858eb003, 0xcf1101d6, 0x8352184f, 0x2a6de794,
12550 0x8b74f2e3, 0x81630fca, 0x7d3de01f, 0xc507bf06, 0xcea9da26, 0x84270726,
12551 0x559ea3de, 0x0597aca6, 0xc2f9f132, 0xd83777f8, 0xf6158c1d, 0xb08b37a6,
12552 0xef8985fe, 0x7a86c86e, 0x5e78ef49, 0xb3f778cf, 0xb2b1896c, 0x9f5e0cde,
12553 0x9367eef6, 0x9bd15ea0, 0x3095ebc9, 0x9bb078d4, 0xbd9ab37a, 0xa4be3879,
12554 0x0f15bf19, 0xfd7f1472, 0x45d26f52, 0x28355f8c, 0x031f87eb, 0xfbece3ce,
12555 0xe2ef3a47, 0x78fd5b34, 0x86c9832e, 0x3419f8b0, 0x6077dc85, 0xff2409a9,
12556 0xf30bfbd4, 0xf63f7f45, 0x84fd99d7, 0x2759bbdf, 0xad8073d9, 0x7e145fdd,
12557 0x5c2e7b79, 0xc8d96dee, 0x8c4e785c, 0xef0966b1, 0xd64c0833, 0x78e3c17d,
12558 0x855f9c4e, 0x187f9d47, 0xc8b5b05c, 0x3d70439f, 0x70a8e34f, 0x7937cb5d,
12559 0x6b7ade51, 0x0427ae59, 0xe084d74f, 0x456c180f, 0x0f1dacda, 0x1b5d3ee1,
12560 0x40209c13, 0x1b7cb93d, 0xb1b5dbed, 0x8e081fc1, 0xef81ba90, 0x096f5b63,
12561 0x289763ed, 0x9b9d21b7, 0x216ed68c, 0xb8eeb191, 0xe60c1984, 0xe5d631d9,
12562 0x406e7bc5, 0xd8ef7477, 0x1c74659b, 0x8beb3800, 0xc7a1f9b4, 0x83fb3a15,
12563 0x98e60f22, 0x01ce7976, 0x047bba5d, 0xdc70f786, 0xa88c3783, 0x5df616ff,
12564 0xa4be6234, 0x11a2e7a3, 0xeb03bee9, 0xf3c74e30, 0x6ff988c6, 0xbd5eb963,
12565 0x91e74a2f, 0x4f1c4bd6, 0x7aeeb2a7, 0xe9e0152a, 0xbdd02d58, 0x9247f5bc,
12566 0x7d7d60e6, 0xb192ae2b, 0xe78755e5, 0x38b4b920, 0x72c29ffb, 0x95381b25,
12567 0xccb4240a, 0x10f667a5, 0x4d62b93d, 0xe887b33c, 0x8a4f16c9, 0x1772bea6,
12568 0x280cceec, 0xfa686637, 0xeafee531, 0x83f43632, 0x949a98e7, 0xdb665c7d,
12569 0xeeb8c019, 0x3bc19732, 0xc2de3210, 0x3262cdbe, 0x1c11edc2, 0xcbd28d74,
12570 0xe0ad3fcf, 0x1c52842b, 0xf7cf1f7a, 0xefc40af4, 0xba7a6d1d, 0xcbdcd3c7,
12571 0x35e6aeed, 0x202ecf82, 0x0dbdf81e, 0xed40af77, 0xeba7deee, 0x1bef1193,
12572 0x47000f00, 0x7d84f8da, 0x9347112c, 0x4ad5dce9, 0xdf775605, 0xb38e0339,
12573 0xdd023be2, 0x9bbf5567, 0xb2bfc2a0, 0x91ce91a9, 0xa45e7c01, 0x4d9d754f,
12574 0x5ce947f6, 0x9789cad5, 0x6187a80d, 0x3406977d, 0x5bd6d4f8, 0xcafada3c,
12575 0xd1fada8d, 0xf29ee532, 0xf90d3634, 0x209978e9, 0xb52439e2, 0xf9d651fe,
12576 0xe75ef1b7, 0x0a79d16e, 0xe8cdb3e9, 0x7efa819f, 0xbaa2e8b7, 0x3bcf0eda,
12577 0xf89df118, 0xb1f100e1, 0xc5b9fc40, 0xf8354b20, 0x8176973d, 0xb60576e8,
12578 0x0f67f3ab, 0xfd754fbd, 0x554dfaf0, 0x1b9c5aee, 0x4730bbe8, 0x90ed0905,
12579 0x9316517a, 0x222f88f3, 0xbdf9779e, 0xa36f07c2, 0xeeb803f6, 0x7d852242,
12580 0x44feebba, 0xbde6179f, 0x3a56cdeb, 0x215776e7, 0xf91d81d0, 0xd6e7475e,
12581 0x2f79e3e6, 0x7903ef28, 0x2ef28168, 0x9226a1fd, 0x128d33ef, 0x9ce577c9,
12582 0xe42f2a97, 0xb6e7b517, 0x219e67e6, 0xe7beeb3b, 0xb579d276, 0xc17239c9,
12583 0x2d0fa8d3, 0x471dfe7c, 0x1866df04, 0x34ef23a7, 0x3271cfc9, 0x61d72f3f,
12584 0x2f68e453, 0xfd7551c8, 0x50e3bfb0, 0x692261ae, 0x9bcd1e41, 0x5da9566e,
12585 0xf8283926, 0xffe8756b, 0xdde6538e, 0x75a76d5f, 0x487a3da7, 0x316775c0,
12586 0xe60166ef, 0x7c3a82bb, 0x55f950ec, 0xf8b5d7ed, 0x565de80b, 0x5b63b5af,
12587 0x65e3d745, 0x6dbb5f30, 0x2dcfc8c0, 0x1fa88d06, 0xdef8e0ee, 0xf2c3e348,
12588 0x50ee7475, 0x4730fbe2, 0x7680983f, 0x39a3face, 0xf608d8e3, 0xd3acde8d,
12589 0x148311c8, 0xf33791a7, 0x67f2b573, 0x772b43a1, 0xa39651be, 0x4f245f69,
12590 0xdfdfb4d3, 0x3fa9a858, 0xbcd4ace0, 0x9d5360ff, 0xcdb26ea6, 0xb16fbcd3,
12591 0xe3d4d62f, 0xde6b9773, 0xa558e31f, 0xf5bd3769, 0xed0126a3, 0xc077b371,
12592 0x06e87805, 0x1e4b28de, 0x12d323d2, 0xe32865e0, 0x2c562d0a, 0x744df3bb,
12593 0x3c7bb64e, 0xec4497e8, 0x773a1dff, 0xc97c4e69, 0xdfe5035c, 0xfc5abe0b,
12594 0xc9a00e7e, 0x3ddbf685, 0xf0e3684f, 0x5f38abc7, 0xb94365a9, 0x280ac1eb,
12595 0x67b05ef3, 0x81e97bf0, 0xcc7f707b, 0x45db8c71, 0x2ec999af, 0x5376899a,
12596 0xb071bf88, 0x397e66ba, 0xbe427bf6, 0xf582f917, 0xbc0a6932, 0x3b08cfb7,
12597 0x35ee7a8b, 0xebcbf523, 0xe685d01d, 0xce597ff7, 0xceb3c1e5, 0xfc717bda,
12598 0xb2d03e8e, 0x7dcf4fc8, 0xaebf4468, 0x013fafa3, 0xe70cd9f5, 0xcfb44687,
12599 0x7a2b9e87, 0x61c60c4e, 0x0e1fe39c, 0x63de23e9, 0xa46e5edd, 0x722b4ff1,
12600 0x7a3be5bd, 0xf78b4f3a, 0x864a6b37, 0xe1cb73e4, 0x63ef1fa0, 0x7bf3b4b7,
12601 0x368e789b, 0xf9069c92, 0xbca861fc, 0xf41d367d, 0x4f1a4cc1, 0x97960fa3,
12602 0x3edee9f9, 0xfbcd6fc8, 0x5c34972b, 0xc8257cc5, 0x4cf3ed71, 0xb1961e7e,
12603 0x73fa0301, 0xed35d720, 0xfb95cb1b, 0xde58d39c, 0x2e072017, 0xdbdf2338,
12604 0x9f8abb7d, 0xaae0b833, 0x16787da3, 0x47e789f0, 0x3f861d9f, 0xe1dbd78e,
12605 0x81a465ed, 0x661bfd90, 0xff7157ff, 0x7228e5ea, 0xbfb2a2fb, 0x014084fb,
12606 0x33b7550a, 0x8577e88e, 0xa5ed75b9, 0xcf97dc42, 0xdebfa2b7, 0xee8123f2,
12607 0xffb2ffc1, 0xac3b34ad, 0x54f878df, 0x7697de1a, 0x86953a1f, 0x0cdb89f7,
12608 0xcf68cdf6, 0x3dd07d03, 0x3f5e8ee4, 0xa87edfc1, 0xb79f1fb0, 0x140e0af7,
12609 0xeb9eeec9, 0x364eb40d, 0xa3fd15b0, 0x3ae0517d, 0xabedce58, 0x2a76e5c3,
12610 0x13982edd, 0xc98f7ef5, 0x1e9013e7, 0x5c213e40, 0x820fc047, 0xe66dbefa,
12611 0xd4f648a6, 0x27df0565, 0xde1919b7, 0xfe836dfb, 0x59d38eb8, 0xbdf88da7,
12612 0xb0c39685, 0x71d7012e, 0x1c7881ee, 0xa181837f, 0xf7c2a19d, 0x03e05671,
12613 0xabfbff5c, 0x2dcf0c0d, 0x27ad596f, 0x81bfbf7c, 0x87fa27db, 0x0335bd7f,
12614 0x2e80cbea, 0x270f3bf1, 0x9d38df56, 0xbfbee301, 0x7569db86, 0x2f881b0f,
12615 0x6e13ad97, 0xa50e4bdd, 0xff6e956b, 0x70d3a146, 0xdba70dfa, 0xe6baf461,
12616 0xdbebd1eb, 0x90ecb7e5, 0x61f7a819, 0x438ce7ff, 0x731efa3a, 0x1a7e401c,
12617 0x0718613c, 0x2ada4f70, 0x63c3c039, 0xa7bef5d3, 0x9c6e50d2, 0x6df9ede0,
12618 0x7f2e057b, 0x7d71cbec, 0x8646dd19, 0x2a2e08f7, 0xd95176fb, 0x0a0b3b37,
12619 0x62cfc8f1, 0xa9ca1260, 0xf9ce256c, 0x1d35818a, 0xe452ff46, 0x8ffa67f2,
12620 0x87b77b6d, 0x2b7fefd0, 0xcaab74e7, 0xe64669c5, 0xf7c56c3a, 0x045f8d0f,
12621 0xe06cbce3, 0x282735e7, 0x09c94de3, 0x52822c36, 0xe4e5c157, 0xd438156f,
12622 0x3e149ffa, 0x437f2760, 0xe6685cf8, 0xd1b79ff8, 0xf8eb8cdf, 0xbd75c999,
12623 0x305fde1c, 0xea1b7ce1, 0x3f49eebd, 0xb9dfe3c9, 0xee1d9073, 0xa27ff056,
12624 0x63cf37fc, 0x3532cfee, 0x72d7f68e, 0xe90969f4, 0x68a532d9, 0x30f148dc,
12625 0xe66ccdf7, 0xbaba014a, 0x5aa54399, 0xaafc745f, 0x82fc8071, 0x2fc40deb,
12626 0xb9e9d337, 0x0553efda, 0x8e46e9ee, 0x4a97d607, 0xb6e41b7a, 0x67921658,
12627 0xfaa0f150, 0xfb2996e3, 0x5b1ebf69, 0xcfee28c7, 0x8f84d3d8, 0x84e76d15,
12628 0x41e71856, 0x02b06c83, 0x3627cfbe, 0x8534bdad, 0x626c9fb1, 0x3a0b05cc,
12629 0x5cccc9bb, 0x6c7d0377, 0xd81ea892, 0xbbfaa364, 0x5e54ec9b, 0xa2c738b6,
12630 0xa4e079fe, 0xede20a67, 0x671ed644, 0xed73cc2d, 0x41f081ac, 0xfdf4063b,
12631 0x376b4298, 0x0cccf4fa, 0x947a37ed, 0xf028adef, 0x8333743f, 0xfcbe40b9,
12632 0x8e83e702, 0x467f1bed, 0xe6b1cf72, 0x49fa037a, 0xb7176df9, 0xf1bddd62,
12633 0x5f680d77, 0x04fa007c, 0x7eec0ce9, 0x9e501366, 0x81da339c, 0xa66f9a0e,
12634 0xeb2f38d0, 0x77c80d82, 0x430263de, 0xf7a0fcfa, 0xd71c71ba, 0xe12d7457,
12635 0xe6744df9, 0x48ad2d9f, 0xfbb8fc22, 0x7f7c75f2, 0xf7a1748b, 0xf9effa29,
12636 0x87ee0243, 0x9dfda379, 0x467fec4a, 0xb7af90cf, 0xa41306d7, 0x02f87208,
12637 0xa3978b8c, 0x86581d70, 0xbd1937b7, 0x413cf053, 0xe1c74293, 0xfa158bed,
12638 0x941b4c04, 0x213229ef, 0xc1239f8d, 0x5258169f, 0x41f93262, 0xe7e038fe,
12639 0xabbabe96, 0x811e9622, 0xcff5a87d, 0x762187d8, 0xfc3a347c, 0x437e25b2,
12640 0x4329c3e6, 0x4323f475, 0x1fa07fef, 0x82fbe919, 0xe3c9aca6, 0xb9778a46,
12641 0x83bec007, 0xc300eafd, 0xf4829ec9, 0x4fca8d3e, 0x91d9748e, 0xc171cc7f,
12642 0xd82fa83d, 0x3bf23a5d, 0x7b5abdda, 0x87e141a8, 0x7a1ec506, 0x3feb42b4,
12643 0x5ed49f81, 0x84a4fdc1, 0x3fe34ce3, 0xff273f85, 0x057c8cc9, 0xfd834ef3,
12644 0xfed22579, 0xc7aed554, 0x2ed8137e, 0x740673a2, 0xbe15f48e, 0xe0a8bfce,
12645 0xebe5547a, 0x48d7c865, 0xaf9cbdbf, 0xa96dc7c3, 0x1c0bf9aa, 0x7b945b77,
12646 0xf157f710, 0x139fdaf1, 0xe7ee5f08, 0x1f4f0852, 0xb59ce7b3, 0x031f9740,
12647 0x2e80fb1c, 0xf19d39af, 0x9affd049, 0x6c9f19cb, 0x1d03921d, 0xbf53c5cf,
12648 0xa717936d, 0x19fd42b4, 0xef187ba4, 0x8a3ade93, 0x1cf43e6f, 0xbe753fe7,
12649 0x52cbfc0f, 0x0d8a9f90, 0xda03a341, 0x262efb33, 0x7c581da0, 0xe414fee4,
12650 0x6e7068c3, 0xdce054ad, 0x4bdad8f8, 0xf01e9c29, 0x455aee1c, 0xf49fb9bf,
12651 0x6bff111b, 0xdfa23237, 0xd97ed7fe, 0x49fc7c81, 0xfa84bc5f, 0xf1a3e3f0,
12652 0xd7ff945e, 0x3a7c998e, 0x6f10fc81, 0x8fb5c822, 0x91f7030d, 0x2f4479bd,
12653 0x3ee8ffa1, 0xc83ddbf6, 0x4cd7ee8f, 0xb5b1f968, 0x51d75d7d, 0xddf5b5ef,
12654 0xf2c4557b, 0x87e5d1a5, 0xd38f8df6, 0x6ffad57a, 0x28ed9937, 0xb9113f47,
12655 0xfbdb589c, 0x6bbfd92a, 0xc0cc6f07, 0x47c7ea38, 0xca094fff, 0x379bf735,
12656 0xb99e504a, 0x8251b8df, 0xc71feeed, 0x2dd9227b, 0x84f4b371, 0x665f5557,
12657 0xe26a27bf, 0xfa141b45, 0xd5dceec8, 0x57f00938, 0x03896e7c, 0x7b6ab6f3,
12658 0x139d14f1, 0x79fe2fdf, 0x21c3ca7d, 0x22033afd, 0xce8a8de5, 0x0eafc7d5,
12659 0xaa47cba1, 0x94ef9a0c, 0x0f38d57d, 0x2df7e2b6, 0x0275c56f, 0xec0efa3a,
12660 0xbfc880b6, 0xf046bb2f, 0xf601bfa1, 0xb23f784b, 0x923daea7, 0x9910f742,
12661 0xbd3f9ce8, 0x1c53eb08, 0x5628eddb, 0x8726a7cc, 0x02cb4bd8, 0xe809bf3a,
12662 0xe4cfa9a8, 0x203f7b27, 0x62baa45e, 0xfd743d47, 0x85b26337, 0xdc9a7108,
12663 0x1ca0e777, 0xc0d78f0f, 0x5b8418cf, 0xa7ceafb5, 0xa651f8f3, 0x042dd247,
12664 0x993b9ab8, 0x161d7884, 0x4b9a69d7, 0xf8f0a2f1, 0xdbb03d8e, 0x93ecfd8c,
12665 0xabc21275, 0x8fb8a5da, 0xc0e4113d, 0x7972565f, 0x6757f2a6, 0x3af5e780,
12666 0xc9e6b503, 0x69577e50, 0xcc7491ef, 0xece9780b, 0xc600ffbb, 0x1f073a17,
12667 0xf30e9f8c, 0x98b7be74, 0x9ae79e61, 0x829e6b54, 0x9ae706fd, 0xa21bc81f,
12668 0x1af9f09b, 0x345db92a, 0xd6442f64, 0x5f0aa57f, 0x2c1e968f, 0xd0f3fcac,
12669 0x579fe083, 0x7cff7254, 0x709f8f05, 0x7f5c3cff, 0x1d5972a8, 0xef82ad77,
12670 0x2af972e1, 0x47e039d9, 0x5b5e5c93, 0x32f7a769, 0x90a516fb, 0x92defd7f,
12671 0xf875bb14, 0x43a239f8, 0x7c379c97, 0x739ed57c, 0x6653e57b, 0x3d647bf4,
12672 0x897ba7f1, 0x97fcc3e0, 0x9db9ff6a, 0xeee5d902, 0xdf0f8366, 0x2c0ae153,
12673 0x07d8f1e1, 0x22cf8364, 0xaa89d90c, 0xddab791d, 0x6abb5021, 0x63f6aa57,
12674 0xbbe3c9c0, 0xfb788a4b, 0x556b8b65, 0xa75c58e5, 0x97179e85, 0x398ce7f3,
12675 0xf55fa14f, 0x918152e0, 0x4aec501c, 0xedc34e95, 0x72fb4fce, 0x438a4712,
12676 0xa7d0af3d, 0xc21367ca, 0x63d543f8, 0x7e7054cf, 0x5e3d40eb, 0xf7fc7a88,
12677 0x7c3cfb1a, 0x8fe3d05c, 0x463f5257, 0x2e7e8bfd, 0xebf9233a, 0xadfc6566,
12678 0x4e05feea, 0x59bc20d6, 0xfd19b02c, 0xf5fa68cc, 0x139d8a7b, 0xc519fdad,
12679 0x3f1dbc7e, 0xc8e4561f, 0xcbf3f168, 0x70f2b795, 0xf9f9a9ff, 0x8c687d96,
12680 0xd557bf62, 0x1ffb86bc, 0x6a04f7a7, 0x97feff90, 0xe1eee281, 0xfaa53def,
12681 0xecd3229f, 0xa32ca9cf, 0xf723fd0e, 0xe83f1e1a, 0x43bfb24e, 0x7a5bcc7e,
12682 0x05ace386, 0xb8ed107f, 0x51266f47, 0x32f686d9, 0x385e2b94, 0x1588f947,
12683 0x77f0b46b, 0xfb174c63, 0xf3a6cbaf, 0x9eac2d03, 0x7d2d4ce2, 0x5016d249,
12684 0x0f63dd0a, 0xf2be469d, 0x0fdbd01e, 0x88ffbe84, 0xc799befa, 0xfba636e1,
12685 0x661af728, 0xc278b40f, 0x7dad7eed, 0x8dc4a950, 0x6f09d9a2, 0x5cb85bf4,
12686 0x3e27a339, 0xd378c0ef, 0x7d8cc64c, 0x37b82e5c, 0x474938f2, 0xfc04e6df,
12687 0xd2bb6a08, 0x500c457e, 0x6bf28a1c, 0xbed5eaf0, 0x3ee8d3a7, 0x27cdac97,
12688 0x39ffefb5, 0xbcf0cbc9, 0x970f7252, 0xbd36ee4b, 0xa12a4792, 0x83b797ef,
12689 0xed0e393f, 0x1bfdbb4b, 0x8b807788, 0xc8de48f9, 0x3ecbb89a, 0xe9f4af25,
12690 0x3f257f99, 0x2891c574, 0x79eea479, 0x7ca48f3c, 0x1e787727, 0x0ca9f4e9,
12691 0x48f3edfb, 0xe8e7bd1d, 0xf2edcb1e, 0x5baaa649, 0x3b8a1c71, 0x7c79144e,
12692 0x209f6277, 0x626abc61, 0xe9775f1f, 0xafb238b6, 0x3ab57e1b, 0xba81e505,
12693 0xe22c9f4f, 0xfde4fdf8, 0x5fb06acf, 0xc944afc9, 0xe37aeb02, 0xcb3f0dfd,
12694 0xd9bb75e0, 0xc436fd8e, 0xc9f33fa3, 0x23c7d6af, 0x1280df7e, 0x17c7e7f7,
12695 0xc9f1c8c4, 0x667578a1, 0x959dc515, 0xfa08b578, 0x5c50cc70, 0x8bdfbc27,
12696 0x746e5c55, 0x7142bb83, 0xef3c23cd, 0x9aee9ddf, 0x9ebff547, 0x29dff8c4,
12697 0xfd1e2990, 0xc635d02a, 0x62c1a68d, 0x3ffd2f31, 0xe62758e3, 0xbac7ba91,
12698 0xf47c427e, 0xf23b3ad7, 0xfca7f411, 0x9db0f793, 0x6a8623f4, 0x0333cf31,
12699 0xf7405b3f, 0xdf295231, 0x8fb28f73, 0xa2cfe0e9, 0x2cd0095f, 0x34f43cc1,
12700 0x2333df25, 0xfe38898e, 0xfb6b830e, 0xf52fcc54, 0xc4cd8e8b, 0x3c148e04,
12701 0x779e196f, 0x2f9e6412, 0x6a4ff357, 0xfe5a3cde, 0x9479c049, 0xf3f056ef,
12702 0xf980b296, 0xc4cf3574, 0xf9293a96, 0x43cca5b5, 0x807c42f7, 0xde73afb3,
12703 0xcffc846b, 0xf21115c3, 0x982beb3f, 0xf3699f62, 0x5f73db8d, 0xaafd3a21,
12704 0x78c3c679, 0xe68ee2ae, 0x0fdcecc5, 0x28bb830d, 0xf234d3e9, 0x6ff8febb,
12705 0xfb67a409, 0xbc3e906e, 0x00b13416, 0x78071fc5, 0x40cfbddc, 0xe06b8671,
12706 0xd10d8dbf, 0xf054efb3, 0xd5f78f71, 0x04f7fd11, 0xfdf1e3ea, 0xb7cf2bdf,
12707 0x7ee4b7bd, 0x01bdf7b4, 0xc60b1dfe, 0x13d63fb8, 0x6ed18b10, 0xf2fb83b9,
12708 0xf5846564, 0x7eb8e399, 0x52a3e70a, 0xab4aff85, 0xdeeb9e38, 0x7b987ee7,
12709 0x48afcf03, 0x7b705c8a, 0x74fd5e78, 0xc6a09a56, 0xca45c7d3, 0x92091cbf,
12710 0x447968de, 0x7cc9efa0, 0x33cbfcd9, 0xf1f391e9, 0x462f7a2b, 0x3634bfce,
12711 0x168cfc90, 0x638f0ecf, 0xff2a9dff, 0x7638f3a6, 0xeb44957a, 0xd7e4f64e,
12712 0xeb43638c, 0xb0fb83bf, 0x7d845674, 0x6fe383b8, 0xf1db1d9c, 0x3b63caeb,
12713 0x1e3113fe, 0xc78c7b7f, 0x6c7961ff, 0x8abaebf3, 0xdbffc2d8, 0x1fdfc318,
12714 0x57fffe09, 0xe78407cf, 0x0bcfc3ff, 0x30039f84, 0x17b0f5bd, 0x9d84badb,
12715 0xefc33f41, 0x24d6bf8d, 0x93141c80, 0xce7dd3f6, 0x1f3ce505, 0xecdeadb6,
12716 0x9d0c2bdb, 0xf5f1501b, 0x23f73568, 0x5eebbca5, 0x04d45efc, 0x829f5039,
12717 0xfe72b2f1, 0x59ae4377, 0x898c5e78, 0xc9e63a52, 0xc5f4cde0, 0x5b749760,
12718 0x5359e722, 0xe9a2f195, 0x35d58391, 0xe315678b, 0x7c8a3d1f, 0x4a87ff0e,
12719 0xe5ea521c, 0x6899e9f7, 0xf34c5f4f, 0x1ed1d3da, 0x9fc93c4a, 0xbc99f827,
12720 0x67b2e097, 0xdc7fe62f, 0x7be11b20, 0x26ffc946, 0x1b2bbbcf, 0x60c9d2e3,
12721 0xf05e6217, 0x920fcc69, 0x7bd12b3f, 0x66977cea, 0x19ea3f71, 0x9f301303,
12722 0xcfca9deb, 0xdf9eb139, 0xe6a6fd91, 0xfc1acef5, 0xca055a97, 0xfc23b5eb,
12723 0xf3f9d53f, 0x442b65f6, 0xebcdf80c, 0xf8df2891, 0xe5dff976, 0x9e1e68ba,
12724 0xe24c7be7, 0xbf409caf, 0xec78e019, 0xefd12168, 0xffe5e38a, 0xc7fe8cd4,
12725 0x3cf09164, 0xe254afcc, 0x78941705, 0x502f1a87, 0xacff5bf3, 0xc03e49c4,
12726 0x03940bf8, 0x72810f18, 0x9ddd2cfb, 0x67db4fd6, 0x67ffe045, 0xf21f1e04,
12727 0x87c794fe, 0x9c8e8d0a, 0x7f94f3d0, 0x63ef8b35, 0x2fe79fab, 0x0fcf78d4,
12728 0x7e14f595, 0xefc7ef4f, 0x9d6e15a1, 0x5f3d446e, 0x0e2b35b8, 0x4fb219cb,
12729 0x5ef80697, 0x4eb0fab6, 0x7448bfdd, 0xe75957b4, 0xca4133b6, 0x961abdef,
12730 0x8b34bff7, 0xa968679f, 0x097bfbe6, 0xd418a0ff, 0x6e229b1f, 0xb131f341,
12731 0xca47d24a, 0x5f80b52b, 0x76b6708c, 0x7c55b873, 0x75edf8b7, 0x53c5cf38,
12732 0x1658adc1, 0xa3aec9ac, 0xf5db7bb8, 0xb9bf68ad, 0xae9c6f07, 0xd19978a6,
12733 0x43c4fe8e, 0xdbb8da03, 0xfe3cd513, 0xe01a2afe, 0x457bb788, 0xef0b8ff2,
12734 0x927e8915, 0xbfe42c5b, 0xde981b26, 0xdc45f58a, 0x4c682a2e, 0x5b3ac3ad,
12735 0x60f64492, 0xd27b19c1, 0x714379c3, 0x377be4b0, 0xdd3c458c, 0xc6aacf2e,
12736 0xe45b2ed3, 0x5f9fb8e3, 0x7edacf35, 0x6f3a3df6, 0xc54baeaa, 0x8d2f9a8b,
12737 0xcf556796, 0x3f1bb83d, 0x70d39cd3, 0x8c06c18b, 0xbd1e163f, 0x5fce5468,
12738 0xa1ecb64a, 0x91e16c3c, 0x557f94eb, 0xcf6eadf3, 0xa1abb275, 0xf7fb119f,
12739 0xd7f9e26c, 0x2c0e00d7, 0xb2dd617b, 0xdba1ef09, 0x7583eca8, 0x9b63f3e3,
12740 0x6ff4a972, 0x7c795072, 0xf8951953, 0x64f4c999, 0xa75edbcc, 0x59d5edbc,
12741 0x524dcec3, 0xe8b76f5e, 0x15f108fc, 0x7aa3f792, 0x1f4fde78, 0xee35e3c7,
12742 0xbefa0633, 0x99acfba1, 0x5f4d77e4, 0x0ff444eb, 0x9ae73f3e, 0x60777088,
12743 0x2e842dde, 0x961d913e, 0x9d83f424, 0xdbe60b0e, 0x1aaffb0a, 0x874c3cf1,
12744 0x3c623018, 0xc0cf200c, 0x9eee8b23, 0x6fdcfceb, 0xf1058d5f, 0x58fcdb7b,
12745 0x8fcfffef, 0x58fc957d, 0x273f3577, 0x0291caad, 0x8bde4ea7, 0xf2d919e5,
12746 0xd89c8870, 0x94f9e4e6, 0x1127936d, 0x4e76ee1f, 0x321d5a4a, 0x8f23675e,
12747 0x3bdf245f, 0xfcfa12d9, 0x1f3cd597, 0x67302c96, 0x33567924, 0xc7ddebfb,
12748 0xd76e411b, 0x3ffbb244, 0xe5d029f9, 0x238ba04c, 0x90389edf, 0x343f19c7,
12749 0x71adb71e, 0x2831c4f5, 0xd8982e9f, 0xd3af1e14, 0x5858e3c4, 0x5c5a2e5e,
12750 0x4ea3456e, 0xa179d0b6, 0xdbd404e0, 0x2633f1e1, 0xbd702706, 0xbde0672e,
12751 0x83319814, 0xf961b195, 0xdf305fb9, 0xfbc327cf, 0xa4751acb, 0x5d3cd42f,
12752 0x36c8a341, 0x6c167d01, 0x3f28f834, 0xa45e28d7, 0xec6fc576, 0x90320a94,
12753 0x6b383fce, 0x16ae3094, 0x34731f1e, 0x049eefee, 0x026d1dfd, 0x5dba0bdd,
12754 0x073d4f1e, 0x3fdbd2de, 0xf96de307, 0x3d77576c, 0xac9fcff4, 0xf4fcf093,
12755 0x3f1e7cf0, 0xd8a05dff, 0x3671e139, 0x4bb433a4, 0x1bf0e3c2, 0x38d83a15,
12756 0xd7adeb9b, 0x1d537f14, 0x4e17ed47, 0xcd9d3f3f, 0xb8b46df5, 0xbc6551fe,
12757 0x6d82c6ce, 0x177f7193, 0x93ea18e8, 0xf35ac6ce, 0x76f190e4, 0xdbe7e6cc,
12758 0x60fcc19e, 0x907e686a, 0xf3c301e7, 0x2b9caa82, 0x037dffec, 0xc8377be2,
12759 0x6e63d46b, 0x141fcf1b, 0x8339ab1e, 0x4e086372, 0xc377b7ae, 0xbec8079e,
12760 0xbe312473, 0x457bfa2e, 0xc502a3de, 0x7c160ae7, 0xea1e3c76, 0xf74499cc,
12761 0x2767dcb0, 0x3ca2b16f, 0xe316205a, 0x53b71ebd, 0xc26795b8, 0xeffdd27c,
12762 0xbcefa1ac, 0x7f903e16, 0x81e5f70e, 0x0f9d0366, 0xfddef554, 0xf03534ef,
12763 0xc64fbdf6, 0xe0ae7b61, 0x79f1d8b0, 0x763f7d23, 0xfa7e4bfe, 0x110b58bb,
12764 0x81e7903a, 0xe44497b3, 0xd716cb9b, 0x151f23df, 0x4cf2522e, 0x3f4f5ccd,
12765 0xc0c8b7d0, 0xead3cec8, 0x9f5913cd, 0x46e83c53, 0x8fe5215f, 0x43fcf052,
12766 0x29be90de, 0x6c7a0a3c, 0x63d39dcc, 0x112d9d3f, 0x1e82673e, 0x17927843,
12767 0xf87d3cf1, 0xf650effe, 0x8a5e9a3f, 0xff518726, 0xde63fbf0, 0x5c36c10c,
12768 0xee31db8f, 0x3af68a53, 0xd3a2e394, 0x71661fdf, 0x628a4eba, 0xa149fdcf,
12769 0xa7e7a8df, 0xcf27477a, 0x7fd987f4, 0xd563791e, 0x4df352ff, 0xa0f6bfaa,
12770 0x65ab0f62, 0xbbfe5293, 0x72a037ef, 0x21bf788d, 0x86fdf239, 0x68090e87,
12771 0x1bf7a8a7, 0xcd59194e, 0x4f3c54e1, 0xf277dcab, 0xe93b222d, 0x62fcdfd4,
12772 0x78a98beb, 0x509049df, 0x3a1fb51d, 0x1dbe7a47, 0xa7b223ec, 0xe3cb7efa,
12773 0xf9f887ad, 0xc8def6f0, 0xaddbdddf, 0x32f5dfd8, 0xaed1b923, 0xe86db79c,
12774 0xb744f251, 0x8b8f96e2, 0xb74b71a1, 0x3d56303d, 0x7f23ebc7, 0x8cc71b4f,
12775 0x60ecb716, 0xdbb73a41, 0xa07046b1, 0x39ddb87e, 0x79ca5ddc, 0x4c71a8dd,
12776 0xb973e479, 0xb94c71e1, 0xb9c79b5a, 0xf7c4966f, 0x680825db, 0xce759aef,
12777 0x7fb73a36, 0x9d22904c, 0xcd5a5ef3, 0x257cf4e5, 0xc8d0720f, 0x8560e3e9,
12778 0xf06ff740, 0xfbee1e1e, 0x1efc63c1, 0x7e02c1ce, 0x7bcd470f, 0xa66bf7a8,
12779 0xe83de50e, 0x2f7a9dfe, 0xc367bd47, 0x5ae08f98, 0x7d1c5cf4, 0xe1876bc7,
12780 0xbddb8d90, 0x1a3f7e5e, 0x43e61065, 0x8913cc4d, 0x6bab6b5f, 0xef7a6ac4,
12781 0x8f4fdb8e, 0x7bf04754, 0xe91f8a7d, 0x2fea8eae, 0xfad6afac, 0xf70f540b,
12782 0xde54ee17, 0xecd98be3, 0x87fbfb4e, 0x9e8f1c63, 0xf1b63b32, 0xfb48ecc4,
12783 0xfda2c5b6, 0x5e5aaf1e, 0xb0dfe456, 0xbb0dc5ef, 0x7af5c92f, 0xa7ff60b7,
12784 0x1ba7ca4a, 0xcaae9f28, 0x7c31eed5, 0xe3291ffc, 0x294065a9, 0xd77ca3bb,
12785 0xbc4a97f9, 0x7b944bac, 0x2f69ee10, 0xd397e368, 0x97e3690f, 0x35937b33,
12786 0x78ff7cf5, 0x6785fbcd, 0x8bda6926, 0xda68f703, 0x68142f4b, 0x1503e5ea,
12787 0xaf2bf79a, 0xb3ea6ad4, 0x65f8da82, 0x61c5cdf5, 0xb47d38f7, 0xdca01abe,
12788 0xe6757ed0, 0xcbde6a6f, 0x575da358, 0xaebb4796, 0xebb51b89, 0xf6cdc752,
12789 0xd397d76a, 0x325f5dad, 0xbef2e3e6, 0x7f2e3e7e, 0xc7c95db6, 0xdfb058e5,
12790 0x2d938d33, 0xf7a9b768, 0xfef7d5a9, 0x5866372f, 0x007f40df, 0x00000000
12791};
12792
12793static const u32 csem_int_table_data_e1h[] = {
12794 0x00088b1f, 0x00000000, 0xe4b3ff00, 0x51f86066, 0xb97bc10f, 0x726e1818,
12795 0x0143f821, 0xd08667cf, 0x0c0c2c6a, 0xc6cc401a, 0xcec0c0c4, 0x717ebc44,
12796 0x1d7b044e, 0x4cc30307, 0x31c8de20, 0x481afef0, 0x7e879d7c, 0x42f3a976,
12797 0x81c15968, 0x570837f7, 0xb430310a, 0xc430330a, 0x0cf84088, 0x55f2a8a2,
12798 0xa9b60842, 0x39766524, 0x0003f502, 0x3471cc24, 0x00000380
12799};
12800
12801static const u32 csem_pram_data_e1h[] = {
12802 0x00088b1f, 0x00000000, 0x7de5ff00, 0xd554780b, 0x733ef0b5, 0x7993331e,
12803 0x0f20f264, 0x0084f102, 0x021842a2, 0x27088784, 0x01a8c421, 0x54bc8083,
12804 0x48433c26, 0xbfa81132, 0x2677bd6d, 0xb5ad1104, 0xbc1b6951, 0x14101de8,
12805 0xd1a07515, 0x40e81c06, 0xdbdab114, 0xd5a8f8a8, 0x40445076, 0x8bcbc248,
12806 0xaf7fd52d, 0xe649cfb5, 0xd4484c9c, 0xffffbff6, 0xdbf3f1fd, 0xd9cfb3ec,
12807 0xdaf5ed7b, 0xf6bdad6b, 0x9a32c11e, 0xe4224e24, 0x65a3f85b, 0xf4842784,
12808 0x0adb2ce9, 0x64918fda, 0x8b2ffc42, 0x108e36f2, 0xf08e77ee, 0xbc8451a4,
12809 0x980b99b5, 0xcfbc3d69, 0x9fad0846, 0x603d34de, 0xff6422ce, 0xef02b308,
12810 0x8f9ade9f, 0xbd2fc9f5, 0x7b6814e7, 0x00bc4bd5, 0x13bed375, 0x109d88ce,
12811 0xa1e5b9af, 0xf6f3e96b, 0x85b27897, 0x93fc450e, 0x9085244d, 0xfec21663,
12812 0x52fab22e, 0x6d56ab2b, 0xf4077fde, 0x2664de5b, 0xd54fda56, 0xaed365ee,
12813 0x8765f5a5, 0x54af0244, 0xfa95ab6d, 0x00f2fad2, 0x9afa8417, 0x71c67f7d,
12814 0x79480ada, 0x27212870, 0x5f22167d, 0x96ceeb49, 0x79f45994, 0x11676045,
12815 0x83b15fbc, 0xfbe89b73, 0x7ff69b15, 0x3457fd0c, 0xda79038a, 0x36ed8aff,
12816 0x63610f22, 0x1e604b7f, 0xbc01a64b, 0xc4886f55, 0x97e5eb4c, 0x70044956,
12817 0xa54bd424, 0x61ff180e, 0x38c07649, 0x0d1c7087, 0xd0cf559f, 0xd577e871,
12818 0x986e702f, 0x7889b55a, 0xddd69e00, 0xda4f39d6, 0xd2b55e61, 0xf77ef860,
12819 0xb7bc127d, 0xb2f6502c, 0x36f80655, 0xe700454b, 0xd2d2cda6, 0xadfd9da1,
12820 0x0ea6fed8, 0xd90d63ae, 0x76a89ea9, 0x47d27963, 0xacee6c88, 0x04a21057,
12821 0x407700ed, 0xf3ac3e9a, 0x812e79f9, 0x3fd0d190, 0x674b644f, 0xc83094ff,
12822 0xe8f7fe07, 0xf60f813f, 0xb2db023a, 0xd2b5e93a, 0x772dff45, 0x4bacebd2,
12823 0x9ed09fa5, 0x56bfdd17, 0xa074043e, 0x5cfbd4f0, 0x4be23e58, 0x4f8372c3,
12824 0xcafdbc46, 0x06cb0437, 0x3f9f1b9f, 0xe58b1be6, 0xe5829f26, 0x2c62be13,
12825 0x7c52be03, 0x0e6f8b6f, 0x1e7d5b96, 0xaf94fe7c, 0xbeedcb1c, 0xacfe7c1a,
12826 0x772c6eef, 0xfcf8fcf8, 0x2c7adf05, 0x2c7abe83, 0xb01af977, 0xf005f46c,
12827 0xdb7d97bd, 0x05f26cb1, 0x5f1ef9f1, 0x5f219613, 0x407dcb18, 0x7d865a5f,
12828 0xf01e582d, 0xabe5887d, 0x777e08be, 0xcb1c77d0, 0x3bbc5507, 0x817c9027,
12829 0x10a9cde2, 0x92171517, 0x8be4a258, 0xca589eb4, 0xf9b729ea, 0x4f5a25f3,
12830 0xc53ad0f1, 0x70cadf63, 0xfbd699be, 0xccf6b0d6, 0x8581487b, 0xacfd33d6,
12831 0x4a83c07d, 0x07d69581, 0xc1f6b3d4, 0x7105fc9b, 0xc0383eb4, 0x11deafda,
12832 0xfad1b02e, 0x9ed641d5, 0xed932213, 0x66139eb4, 0x94b7dcf5, 0xcf5a0ec9,
12833 0xbcf5616d, 0x9d93fd8f, 0x61179eb4, 0x153f8fdf, 0xeb4f1c9e, 0xfb59dbe3,
12834 0xd0a44bc4, 0x0913eb45, 0x7b02f587, 0xad02617e, 0xbd58b817, 0x20995fa8,
12835 0x7dbfe0c7, 0xa1116462, 0x7fddb0bc, 0xd3a422b3, 0x455914ba, 0xfe9f14dc,
12836 0x8b0f5839, 0xbfb43164, 0x84532fe5, 0x912eb471, 0x17fed0d5, 0x1fb6057f,
12837 0x6f6c6510, 0xf6c2aff7, 0xed8c9203, 0xb07bdaa6, 0x60a8aafe, 0xbded727b,
12838 0x92abfef8, 0x6b83ed82, 0x41fac21f, 0x63ed83d1, 0xef8d7f6b, 0xd83c941f,
12839 0x80dac8fe, 0xffeb4852, 0x00b679c1, 0x9e71d75f, 0xfc0d9272, 0xa52b4c1a,
12840 0x238ebafc, 0x1e3e4073, 0xf2a6a600, 0x525d2eb0, 0xfbedbf40, 0x3c93de47,
12841 0x3276f2a7, 0xf53e97d4, 0xf3f61640, 0xd223f61c, 0xfb9ef87e, 0x58cdf899,
12842 0xbf133f5d, 0x69fad729, 0xaceaf784, 0xdf67ebbd, 0xf0f5e337, 0xf5a1537c,
12843 0x71fb17b3, 0x135e6ef4, 0x87a09dbf, 0xad4adbe7, 0x4fd8839f, 0x09e0ef42,
12844 0xfd74638b, 0x5a65c584, 0x7ec47f3f, 0x1e0ef4fa, 0xeba71a45, 0x6b969147,
12845 0xfd887cfd, 0x9faef7a4, 0x1ead74b0, 0xd685691e, 0xa7ec11cf, 0xa5e6ef7f,
12846 0xc3d3af98, 0xfad2ae63, 0xcf748939, 0x073f5dea, 0x1cfc7a1c, 0xe7e07470,
12847 0xa833c21c, 0x702af377, 0xe053f1ea, 0x25cfc0ec, 0xdeaae7ec, 0xa9c073f5,
12848 0x6701cfc7, 0x0e447e07, 0x77ac35e6, 0xd7882af3, 0xbe20a7e3, 0x0e4e3f03,
12849 0x3bd119e0, 0xa3ed5e78, 0x7dabcfc7, 0x8a93f03a, 0x1dee8cf0, 0x7a29853c,
12850 0x74a614fc, 0x784647e0, 0x9faef5c6, 0xf8f45357, 0x03a53579, 0x3f61573f,
12851 0x5e6ef5d7, 0xfc7aa985, 0xe076a614, 0xc9fb1727, 0x78476cf7, 0xd1c7ed08,
12852 0xfb073f7d, 0xb073f1eb, 0xae7e077f, 0xd0a67ec5, 0xee7bb27e, 0x8f5328a7,
12853 0x0ecca29f, 0x9e2214fc, 0x3f5de86f, 0xf8f53307, 0x81d99839, 0xcfd8a99f,
12854 0xabcdded4, 0x7e3d0ae8, 0xf860ae8a, 0xc08c2499, 0x9dae8675, 0x727e9e6e,
12855 0x857cbf7d, 0x2ef3efa3, 0x6e5de756, 0xaf0f7602, 0x45a433d9, 0xf6fbe9e1,
12856 0x0fb9091d, 0xa6bb6890, 0x8fc076e0, 0xd1795a83, 0xd8fc4d76, 0x951d9d38,
12857 0xeaea24a0, 0x757dc549, 0x1d29f7ef, 0x9d4f6ba0, 0x3daeb573, 0xabab93dd,
12858 0xd78f9467, 0xa6bfdfbd, 0xe2bf5740, 0xef751bee, 0xd16ff967, 0xcfd7b3d5,
12859 0xa83fbdd3, 0xfdaea17e, 0x5d0a86ca, 0x958155fb, 0xdb35faba, 0x7f7ba27f,
12860 0xae8d7058, 0x03d3787d, 0xe111f6ba, 0x91f57447, 0xbdd31e87, 0x8b65ba3f,
12861 0x87cc7dae, 0xc7daeacf, 0xeae97645, 0xa3df1ed7, 0xf6baff7b, 0xa4faba03,
12862 0xbdd7bf8b, 0xd5de4f9f, 0x3f96dbdb, 0xe29fdeeb, 0x7ed74cfa, 0x0697da7d,
12863 0x3aeed53b, 0xe75a8d76, 0xfa08ae41, 0x0974fe25, 0x43b0d5ed, 0xd7d4bac2,
12864 0xc714fcce, 0xe528f952, 0x22c0e91f, 0x92f91939, 0x21bb51fe, 0x95f96fbf,
12865 0xaefcfa11, 0x5d2b9ef1, 0x925df9f4, 0x862bb867, 0x8df9437d, 0xca506923,
12866 0xed8d2826, 0xdf8c89f7, 0x0d2e320b, 0xf7bf423e, 0x2707da9a, 0x3e70fad0,
12867 0xf1f2083f, 0xbb426732, 0x35278e3a, 0x999c5ef0, 0x5f74dfa0, 0xfe93de56,
12868 0xdf587928, 0x5c19da9f, 0x45ebbf67, 0x51da1a4f, 0xc1f89fb5, 0x9fd759ce,
12869 0x212fabce, 0x849f70af, 0xf7e903fd, 0x79a697fd, 0x89667f68, 0xe3d119fa,
12870 0xa1fc744b, 0xe4187e38, 0x3f8c20e1, 0xe6f8ebba, 0xe3756301, 0x75cb325b,
12871 0x3a245be3, 0xdf908bbe, 0x8eae7ed7, 0x9e30894f, 0xcfb93790, 0x66737c71,
12872 0x9f7f8e39, 0xe8aefd44, 0xc63ae3f1, 0xbff9816f, 0x07fcdddf, 0x3fcfd78c,
12873 0x7f3f42b3, 0xa3ffcd89, 0xf8ead3da, 0x3fff3871, 0xfcd9a773, 0xfcd82b33,
12874 0x8edfaccd, 0xf81d9df1, 0xc7f8c08f, 0x9cdf19ba, 0xff3f413d, 0xf3f52a2b,
12875 0x4ff1b337, 0xc7505ed6, 0x5ff8e3b7, 0xfcd81772, 0xf1c4a8af, 0x0dc7b325,
12876 0xc46523fc, 0xf8e804d5, 0x7c551fa4, 0x742ec0a9, 0x2487281c, 0x6421a152,
12877 0xe100371b, 0xf18e2bb8, 0x947157db, 0xf99f50df, 0x500939f1, 0xfd4799cd,
12878 0x57d79546, 0x4097c8ec, 0xf53b61ef, 0xa0a896b7, 0x91e26e2e, 0x7306c9bf,
12879 0xb7851060, 0x43f789b5, 0xeb86f17d, 0xbd5fa002, 0x14a0b266, 0x184813be,
12880 0xcbfe7f9e, 0xe7a25b61, 0xd4972c65, 0x5122c78b, 0x07e1d6f2, 0x35219016,
12881 0xc029be14, 0xeb3ba304, 0x0e3f529f, 0xa98fe31c, 0xffa843df, 0xc6c899f3,
12882 0xf7f50bfb, 0xfea11ea0, 0xa4ce3a1e, 0xdda3bf16, 0xf0a34e1d, 0x7ff0aa97,
12883 0xfd79302a, 0xe02e36f4, 0xd5f9f2a7, 0x7fa0478f, 0x1b6ee0bd, 0x1c277a45,
12884 0x5d24fe65, 0x0fcbce9d, 0x6ddf6a74, 0x10e16c0e, 0x6be032bf, 0x21268a3a,
12885 0x5067d68b, 0xffbe775c, 0x07a9bec1, 0xb7212739, 0xa54c4512, 0x9abedfef,
12886 0xe3a2efeb, 0xb9cc52ce, 0x32521d6c, 0x24d7284c, 0x909634c3, 0x88471a5b,
12887 0x5d3207b4, 0x448d3f11, 0x58a33b8d, 0xaa559f5f, 0x8a8ab7af, 0xb570a268,
12888 0x66c8e74e, 0x39ecefda, 0x9c6d76fa, 0x4644a681, 0x52bc7567, 0xfa74938a,
12889 0xb9943668, 0x7485d8f0, 0xdf62e39e, 0x1778f06a, 0x7e8c2489, 0x010fbfbc,
12890 0xf193faba, 0x362e79bd, 0x73bc236f, 0x4a528b44, 0x8ca739e7, 0x1b7f000f,
12891 0x9f68ffe1, 0xd0e5314d, 0x22a3fd72, 0x8f9d7531, 0x1eb9fe11, 0x22827ce3,
12892 0xcbf3f3ac, 0xdf19cf8d, 0xffe9531c, 0x2d07f029, 0xa0fe00bf, 0xf9551ff0,
12893 0x32af53a3, 0x3d9af0fe, 0xda1f80d3, 0xe904f237, 0xadcbf2aa, 0xa92cbf2a,
12894 0x2105f3d7, 0xb8e8111e, 0xfb970e6c, 0xcc1f1440, 0x5960f956, 0x6e6f9e83,
12895 0x3d317e27, 0x6ee65d06, 0x9a6f7cd8, 0x9f7e75dc, 0xff337ca8, 0x9f88fdc1,
12896 0x7464f3ae, 0xd3a543ba, 0xf6fa35ed, 0xdeba555b, 0x4e75d2ae, 0x51afc3c3,
12897 0xc9e641f5, 0xdde41101, 0x9e8d53fb, 0x3d3d1d11, 0x708d3d2a, 0xf3d2a1de,
12898 0x7a331f8e, 0xa88de11a, 0x9c348cf4, 0xae80c913, 0x5be11af0, 0xf9977770,
12899 0xccab5c60, 0xde9e9b1f, 0x4755fca6, 0x05579ea3, 0x3475586f, 0x6c56ce4a,
12900 0x2fabae9f, 0xbdd5cc0f, 0x4ca1acbf, 0x7ea4bed7, 0xd17daeb9, 0xf5753bfa,
12901 0x758fff32, 0xbbb82fef, 0x7b7ed756, 0xf6bafdcd, 0xeb0fe5f9, 0x1b3d73ea,
12902 0x9ecfef75, 0x3ed759b3, 0x5d19f4ab, 0x9de28cfb, 0x6574faba, 0xd37deeb7,
12903 0x066eabbe, 0x3deb7cfe, 0x713d809e, 0xc605fdc1, 0x45b82f33, 0xd473bc37,
12904 0x1f5f2327, 0xf2c10df3, 0x7c8dcfb8, 0x1637d27f, 0x66a6d6cb, 0x7413ac3b,
12905 0x124a5c5d, 0xcd326908, 0x0fdf5dab, 0xeb8269d6, 0xa9e4c869, 0xb37ad3f5,
12906 0x28794649, 0x78489069, 0x2c1c2124, 0xed1c2a36, 0xa47b547c, 0xaa06f687,
12907 0xb6ba93f8, 0x3f624497, 0x76523ef7, 0x7765f005, 0xcbfd03eb, 0x4da7bb00,
12908 0xed8debb5, 0x8d291c95, 0x1ac84e7e, 0x626ac384, 0xc4a54776, 0x5772bfe4,
12909 0x4271017a, 0xe6b83c3d, 0x2905e372, 0x9f02a793, 0x78e4eb64, 0x3a35c359,
12910 0x9a204efd, 0x6df807dc, 0x8af9eea4, 0xbeead7ed, 0x479fb53b, 0x5741abb8,
12911 0xb165838c, 0xe81333f4, 0xe67370e1, 0xa700618c, 0x4deb1472, 0x3c2ed07d,
12912 0x755e2be5, 0xafd01074, 0xbee3cb14, 0xf31e5839, 0xea3cb079, 0x53f2c72b,
12913 0x11960d5f, 0xfe58dddf, 0xf2c7e7c5, 0x2c7adf63, 0x63d5f23f, 0x01afa1f9,
12914 0x017df7cb, 0xb6fb0f2c, 0x2f8ef963, 0xaf8b6588, 0x9f56cb09, 0x7726a582,
12915 0x71ddf13d, 0x093e1d75, 0xcf8317fc, 0xed7f3aa4, 0x7c9d09fa, 0x87dfc716,
12916 0xb9e1a67c, 0xf2acc1a4, 0x1f8e8a43, 0x4397c012, 0xbda1eb3e, 0xb0f95441,
12917 0xb763efbb, 0x6bfcb77b, 0x0fea6df8, 0x7e4eb7e4, 0x53f030ca, 0x34fc4f76,
12918 0xa7e28f8c, 0xb31726a9, 0xfa7e547b, 0x8623cc19, 0x8c0f315f, 0xf6513e90,
12919 0x826f929a, 0xbaa56c75, 0x601f420f, 0x763aacfd, 0x05b77d1d, 0x10c0baed,
12920 0x0ece3758, 0xd860dbf9, 0x21fb3847, 0xf7567e25, 0x49f233f3, 0xd05778f7,
12921 0xa01a59bf, 0xdaea4f44, 0x78638d6e, 0x31489ab5, 0xfddaeba1, 0x2f729e83,
12922 0x81758a1c, 0x01f7c224, 0x8c4774f7, 0x0cada97e, 0xaf09edf8, 0x72af8e75,
12923 0x8f63bfa0, 0xca0f3dfd, 0x2f6626a9, 0x68f335c7, 0x93f093b7, 0xc76fc06e,
12924 0xa77664ba, 0x7dbdbc41, 0xbb42e490, 0xe3d64c81, 0xc3a05fcf, 0x4714fddf,
12925 0xd6eeb82d, 0x06fe21a7, 0xbd38357e, 0x49ebf817, 0xcf84f7bf, 0x7fef3085,
12926 0xd27b3e01, 0x45e93d8f, 0x342fc8a2, 0xedb7f9d1, 0x80fb961b, 0x1e5ee30c,
12927 0x9afedadf, 0x7e5f9e11, 0x4b6e3e47, 0x25b8f8d1, 0xa41f8093, 0xc6d9cbca,
12928 0x2e81e32b, 0x40f4fd1d, 0x9f77ee4f, 0x7eff8264, 0xdfdf4b3a, 0xe2fec67d,
12929 0xa70dc225, 0x89243ae3, 0x92bf53c4, 0xd1e36cf7, 0xfc47719f, 0x67d83710,
12930 0xe0c9d773, 0xaffc9e37, 0xeb3d0cb0, 0x0f670be3, 0x3f04e93d, 0x5f1a656c,
12931 0x1d063473, 0x982ab2b5, 0xf68f6355, 0xf5f49a57, 0x715cf5b3, 0xc725e710,
12932 0xeb061ccf, 0xa8e6ab8c, 0x0d3f7a08, 0x959fad4b, 0x738e1269, 0x3c767b72,
12933 0x4c02fff3, 0x4048ec9f, 0x67d2737d, 0xd9fff7c1, 0x8fd774f0, 0x8d210f06,
12934 0xe80b33e4, 0xdd96da73, 0xcaddfbfd, 0x825e7083, 0x890929f8, 0x69bf815f,
12935 0x3b7fffa5, 0xb015fa00, 0x0debf5ae, 0x70f37ef2, 0x3743be78, 0xd64efd1e,
12936 0xbbe18cf6, 0x204ee5ee, 0xa7be34c7, 0xbaabfbf4, 0xbb62bdbf, 0xc76f46b5,
12937 0xdeeae826, 0x9d1af4a6, 0x00ff0b5d, 0x1386bdc3, 0x54ab0960, 0xb04db0d9,
12938 0xda7e07af, 0xf049c103, 0x5ef6385f, 0x79222595, 0x16971464, 0x6385d3e0,
12939 0x6797fe35, 0xa9ea99ff, 0x048a6f13, 0xa25c8ce4, 0xaea9e550, 0x899bf220,
12940 0x917d6898, 0xc6c2f6fa, 0x6eb02515, 0x26f9789d, 0x931643f4, 0xc7f82752,
12941 0x0f3ea4e5, 0x89a7b5e2, 0xf3e418a9, 0x39c77934, 0xad1e4a32, 0x2e9d8482,
12942 0xe3b7af5a, 0xabaf7fa9, 0xd7d06b2f, 0x525b9297, 0xe97edf60, 0x38049106,
12943 0xf6fa1bd0, 0xf61779af, 0xacd48cbb, 0x57fb7583, 0xa16bbc6a, 0x5419088b,
12944 0xf6fd556f, 0x0a32bcf1, 0x71604b87, 0x7a1f6d16, 0x7ff32279, 0x2406662a,
12945 0x59ffbe85, 0xa95bc8e3, 0x07dfa206, 0xbc7ec1d6, 0x6f713a7f, 0xf7e95d23,
12946 0xc237e15d, 0x5d03d9ab, 0x3855c3f6, 0x4a73b792, 0xcb1e8620, 0x67263814,
12947 0x102bbeaa, 0xc7b8ba5c, 0x7bfd4334, 0xd13253f3, 0xde1ed3f1, 0x668c2793,
12948 0xc0fc03fc, 0xe792ed09, 0xd69ff487, 0x7f82ffa5, 0x68fdff6a, 0xfeba79ff,
12949 0xfb53fda7, 0xfe05d81f, 0xaffab179, 0x2ff3edfa, 0xa93ea9fb, 0x4e97f178,
12950 0x13c9d742, 0x9b8a7d42, 0xdb72b5d2, 0x96854ebd, 0x13bf05c7, 0x8044f5f8,
12951 0xef458e2f, 0x154e0587, 0x41cec542, 0x49fe0ddc, 0xecf93ffb, 0xf11e30cf,
12952 0x85d136d5, 0xe6edb4f1, 0x61ca99b0, 0x12f2e375, 0x23f58392, 0x19df7eac,
12953 0x7a4dea1e, 0xfa78abfe, 0x1f902997, 0x8d453942, 0x9ed1852f, 0x79fadead,
12954 0x5e4fac11, 0x64728ed2, 0xbfc60efc, 0xaffa8898, 0xdaef8a4c, 0x38c4e14e,
12955 0x8bc55781, 0x6767f1b7, 0x37942778, 0x82fa017c, 0xc7e8227a, 0x572bbf1b,
12956 0x8235d4ed, 0x8d98f923, 0x190c7bfe, 0xc3517a03, 0x3b30090b, 0x5f99eeb5,
12957 0x70a11ce7, 0xa6fada9d, 0x97c28b93, 0x83674f26, 0x8f73fe8b, 0x6ddebddc,
12958 0x6d16f2a5, 0x96eb690f, 0xd7daa4dc, 0x8a565621, 0xf3e42761, 0xdd166e54,
12959 0xf2b8fa7e, 0x7a9f27f9, 0x7f99e20c, 0xd107bb32, 0xff3c57fe, 0x69e3fbda,
12960 0x314ec57d, 0xc34d84b9, 0xd274a5ce, 0xbfff4bc7, 0x1e93b73b, 0x4d79bf15,
12961 0xe7b18792, 0xd27624f7, 0xfdcec565, 0x15d61912, 0xfb83931f, 0x063d88a5,
12962 0x8a47827d, 0x7ba85ec0, 0x8825bfe6, 0xc7d89e33, 0x18acd491, 0x1afcdcf8,
12963 0x278003da, 0xaf4aa7a4, 0xde19fa0e, 0x80ba52f7, 0xcbd236de, 0x5522def8,
12964 0x90bf40bf, 0xfbf94167, 0x07903d85, 0x0dd991f5, 0x617f2878, 0xf3e61395,
12965 0xf8c35085, 0x537bf1fc, 0x8b959f40, 0x961714fe, 0x13f979ec, 0x5bfe423f,
12966 0x528ff6f6, 0x9444be30, 0x45ae1374, 0xe79874fe, 0x70b34d92, 0x07894b9e,
12967 0x71fcb0f9, 0xcb4034be, 0xde29020b, 0xac4e4319, 0x2f939322, 0xd2e250b6,
12968 0xfe017e79, 0x77efe824, 0xb436c0f8, 0xa024efbb, 0xcea47e0f, 0x580c5a85,
12969 0xf46160bf, 0x2ebaabfa, 0xa33eb010, 0x7deb77f9, 0x93a7402d, 0xd85495fd,
12970 0xc112f177, 0xfb83e2af, 0xbfcbf696, 0xd195253d, 0x9e42c889, 0xf75d1dfa,
12971 0x7873c327, 0xac5445bf, 0xc8efba39, 0xe39d59b7, 0xa7c756af, 0x7ac1c770,
12972 0x6c4a45fd, 0xd44f35fb, 0xb75d00f4, 0x4a2cf8a3, 0x6ffc99de, 0xbbc99fbd,
12973 0xe981ff26, 0xfe7ed0c5, 0xf8239330, 0x0a43d60e, 0xdb153857, 0x50e4cff7,
12974 0x3a3f503f, 0x156f9c96, 0xb7d73955, 0xc285f91b, 0x51f1702f, 0x24e3037c,
12975 0xdf701d22, 0xfa06e965, 0xf51e947d, 0xaeceb8c2, 0xbc726afd, 0x455bf34c,
12976 0x9b203ebd, 0xdee81e98, 0x9e23f2ae, 0x53c0c52a, 0x52fc818f, 0x20cbf579,
12977 0xcc2962bf, 0xcd1dcbff, 0x72a3cfef, 0x935065fb, 0x355ebd5b, 0xaef96dca,
12978 0xdc9624d1, 0x9377697e, 0x9f4b7298, 0x7b5b94c7, 0xfff9f904, 0xf0d55eb4,
12979 0x78f00c38, 0x351e274d, 0x3e1dd93d, 0x90f27a8d, 0x8d5e2320, 0x1dfe927a,
12980 0xf95d7926, 0x8d43e351, 0xab9e2aff, 0x51f402ba, 0x7c6a9f07, 0x1aa7c1d8,
12981 0xef89761f, 0x6c68f0ea, 0x34fb00bf, 0x96f9ae14, 0x528ed38d, 0x4ed2d257,
12982 0x7f26df70, 0xaafb8f26, 0xe584f396, 0xf3111081, 0xd5303f43, 0x753b068c,
12983 0x3d6fdfe2, 0x7785177d, 0x2c8bf13e, 0x445ea02f, 0xb7d2ffbb, 0xf3a04edf,
12984 0x79e2a799, 0x54fb453e, 0x0239974a, 0x70a38e17, 0x3f8815ce, 0xb7e2113e,
12985 0x0a34f91c, 0xfae5f98e, 0x4c4dfc3a, 0xa7a7ece9, 0x9fabbff7, 0xb7cb7df2,
12986 0x1d3f5d29, 0x50bbc844, 0x10bc388a, 0x81d357cd, 0xde7f14ae, 0x00605c51,
12987 0x5088a9ea, 0xbd77e51a, 0xf3fb3220, 0xa319c2ed, 0x9fc9bec1, 0xf19e2c3d,
12988 0x7bf460fb, 0x3b3eaabd, 0x41e397eb, 0x650d9fcf, 0xf67b7fa3, 0xac4722d0,
12989 0x9566d0bc, 0xf7535ecf, 0x5cecda5d, 0xbff94f3d, 0x7da3b48d, 0xc95bb7e3,
12990 0x82fb18b6, 0x5f4d451b, 0x7fa374ab, 0x8e7f1d3c, 0xe97387ca, 0x51b9f1a7,
12991 0xf5399b74, 0x4aece084, 0x34fbf807, 0xa1fb0fca, 0x06be05f8, 0x235b36fc,
12992 0xe231a545, 0xf8a9cf79, 0x6be0789b, 0x0c2dcfcc, 0xc7800be5, 0x8baf3b42,
12993 0xc9a93c83, 0x143250eb, 0x60789ae0, 0x5347cff9, 0xe21ef63e, 0xeb8f90dd,
12994 0x3c919d0d, 0x2361fc31, 0xb07fa13e, 0x2e888f33, 0x627bd7c4, 0xebc012e9,
12995 0x04acb37b, 0x95df35f6, 0xe0b155dc, 0xf5b3332c, 0xbd292e66, 0xbffb8a30,
12996 0xb3f9bf0f, 0x8a02e11d, 0x9676b38f, 0xff95ddf7, 0x759fdc98, 0x0e5a8171,
12997 0xf56790f8, 0x71002e64, 0xf9e222b4, 0xe50e04f9, 0xfeb4527d, 0xfe9a6fca,
12998 0x54f5e43c, 0x89973887, 0x110b57b6, 0xdbd8f809, 0xfb0053b4, 0x289926fd,
12999 0x6a108f18, 0x8a8ccd86, 0x05111d7b, 0xdff357c4, 0xf80edde6, 0x4cd3373d,
13000 0xe8652e00, 0x01d82719, 0x512342e7, 0xd79bba0e, 0x5a647c1f, 0x10fd08a1,
13001 0x3f230fe4, 0x74db2514, 0x499359f5, 0xdba5373f, 0x95647344, 0xeafd063b,
13002 0xbd67c624, 0xff966fd6, 0x04dbf4cf, 0x5f18dfaa, 0xedfad18b, 0x7df18926,
13003 0x8d4b7e94, 0xd656dfa5, 0x17c0a9ca, 0xa766f72b, 0xbe575d02, 0x2c4fa4b1,
13004 0x8fbaf6fd, 0xa86ff7f9, 0xfd6de679, 0x1e1b7ea8, 0x51fadfa5, 0xae2316fd,
13005 0xa5ea5a3b, 0xcffcb37e, 0xa0ebdfc8, 0xb7cc62df, 0xa69fc558, 0xb5438adf,
13006 0xfb8adfa8, 0xa97cbaf1, 0xfa4f5249, 0xb397ecad, 0x6dba2eb0, 0xf007f831,
13007 0x0dedfa0a, 0x38c1cf55, 0x5dfee7a0, 0x3d277d72, 0x3d5bd557, 0x67843ff7,
13008 0xecadcf4d, 0xd33da1cf, 0x9e990f95, 0xf4c5995b, 0x4cbdcadc, 0xc41cadcf,
13009 0xbf519cf4, 0x6fd17415, 0x21eafbec, 0x23f47bf4, 0x1b7d7eb3, 0x23992f6d,
13010 0xfdf42dba, 0x9f3b5912, 0x5a3a3351, 0xd4bbfddf, 0x9f73be8d, 0x3d2e73c1,
13011 0x823fbbe9, 0x7a841bbe, 0x91c8206c, 0x1c6e3f91, 0xd3e5d368, 0xb1f5f7bd,
13012 0x79045ee7, 0xfe8f03f9, 0xe62607f7, 0xfafbed27, 0xbb9048d8, 0xaa1e00f7,
13013 0xf9519eef, 0x47e7d5af, 0x28793a7d, 0x7baaf793, 0x1baafe18, 0xd5df3639,
13014 0x7586407c, 0xd1176fe0, 0x2f7dbe8f, 0x9b67a3f3, 0xc0d8fa5b, 0x225fffcf,
13015 0x2bfd25ca, 0x87e28b29, 0x302b1739, 0xce2bb9ee, 0xccfc05b9, 0x80b10239,
13016 0xd0e0bb1d, 0x7ec0278d, 0x3d71705d, 0xe00bbdda, 0xc8e92279, 0xa1db98fb,
13017 0xebf6f527, 0xaf9da6bc, 0xf9ae9065, 0x8ccd1310, 0x7157132e, 0x5d59cd81,
13018 0x5da823f3, 0xc62df986, 0xabdf893c, 0x47cd9ff3, 0x8fe45f10, 0xe5f8cc7c,
13019 0x72788def, 0xad54bc33, 0xaa78f5e6, 0x89e262e1, 0x2ca4ba52, 0xb72f13a5,
13020 0x975914bf, 0x39cbed01, 0xf38cb7f4, 0x9c66f0d6, 0xcd4786bf, 0xbea059bf,
13021 0x24743f3f, 0x86889e66, 0x22f92ee7, 0xf80dde1a, 0x33d34b78, 0x206190d7,
13022 0x3c981f97, 0x7c0d1f3f, 0x178a7bf4, 0x73ade70a, 0x2bcee907, 0x65e2a3bd,
13023 0x6148e7aa, 0x24780c8a, 0xf367c035, 0x96be77ca, 0xb377e742, 0x210b9592,
13024 0x937f59f5, 0x688f103c, 0x1ea3b6b6, 0x9470f8d4, 0x5985c999, 0xf5ef2bd5,
13025 0x7ae21575, 0x50b9c4d3, 0x3d06c2be, 0x7999e6a7, 0xd7f261ef, 0xbaf7fdcc,
13026 0x6788518c, 0x91482e58, 0x5d015eb6, 0x86a73fe8, 0x40bc5d18, 0x69cffa17,
13027 0xe020fda4, 0x73993abd, 0xa6fde187, 0x3f02f79d, 0xcfa56ebd, 0x39cbce41,
13028 0x0e8616f7, 0x65ca7a7b, 0xc58858f9, 0xc8cc18c7, 0x173f5ceb, 0x5d897bc0,
13029 0xe68993ed, 0x8e00f796, 0x366e5489, 0xfd00c3c3, 0x46fe8a2f, 0x07c8c5fb,
13030 0x7503e53d, 0x2ab9efc7, 0x3a075f9e, 0xeddf01d8, 0xde43d812, 0xb47f5b30,
13031 0x1720af76, 0x3a34de22, 0x65f5d134, 0x2983a314, 0xd66f9e06, 0xbd9e2aea,
13032 0xef844e21, 0x6ffea06f, 0x7ebb0712, 0xf8d41f5f, 0xc5772cdd, 0xd215c413,
13033 0xe806f4a3, 0xcd7de8b7, 0x11b7a6ea, 0xa6ae375f, 0x15dc99e6, 0x407d1a5f,
13034 0x6f0e5e0f, 0xd34fcadd, 0x61799891, 0x467e55df, 0xb3f2f599, 0xe6fedacf,
13035 0xedab8870, 0x90af50e5, 0x7e2e8250, 0xecccd330, 0x07ab6696, 0x0dfdbcf9,
13036 0xee45bdd1, 0xa8a67faa, 0x257f0174, 0x64e27cfa, 0x4de80898, 0xa67c9597,
13037 0xe3007bcd, 0xe0f5e8b7, 0xe907ab75, 0x33ff5dd7, 0xedfecccc, 0xead31ece,
13038 0x9078c3d7, 0xc7eb28d7, 0x5a47ae33, 0x79a7a95c, 0xbf71d479, 0x71b4bcef,
13039 0x84beebbe, 0x3c60b497, 0xd89fdb4e, 0x89767bc3, 0x73163f60, 0x0a107dba,
13040 0xfe6fee39, 0x59bffa13, 0xff7ddd1a, 0x530a3f10, 0xe3bebf3c, 0x9f638c49,
13041 0x34c8f67e, 0xaf159f90, 0xe542c4f0, 0x838775af, 0x889e5984, 0x45427604,
13042 0x5dfb8f23, 0xcde70844, 0xa833b288, 0xf1f0c327, 0x5ef503a2, 0xa0732ec5,
13043 0xf15f7e84, 0x103967f2, 0xc35d6b7f, 0x59ff9ff4, 0x91fd1f95, 0xa807c81c,
13044 0xbcfed810, 0xa88f3e91, 0xb76a79fc, 0x6fe80e6d, 0xc73b3b6e, 0x2d9c115b,
13045 0x0ce2a39a, 0x16459bf7, 0xc36ddee7, 0x33ff6c3c, 0x0331e61c, 0x48e7d17c,
13046 0x53d0fcb5, 0x5cbd30cf, 0xe00624d1, 0xf6c5703c, 0x1710ad9d, 0x8cd0f8af,
13047 0xfb77abf6, 0xd3ec0919, 0xcf3e2fc9, 0xf1371bce, 0x976878ba, 0x3e76e438,
13048 0x59f8866c, 0x01ea1563, 0xf5823f5a, 0xfbf71aa0, 0x15b2718e, 0xd97dee2f,
13049 0xe2b8514f, 0xf13b4f37, 0x36cb705c, 0xb723c627, 0xa05f7e5f, 0x7831dc4b,
13050 0x9c771abf, 0xf5c105fa, 0xf1dc7621, 0x2127caa4, 0x48ee3eb3, 0x3c6127b6,
13051 0x5799c292, 0xd17e231a, 0x5fcfffc1, 0xcdf60278, 0xf2faed4e, 0xf2bb8009,
13052 0xfc4f739b, 0x2a93e294, 0xdbac1720, 0xc3df67de, 0xbbed067d, 0xd27d55f7,
13053 0xb8d3ccfa, 0x27fad34f, 0x6b7a1bb3, 0x2645fbdd, 0xeeb453ec, 0xe2053afc,
13054 0x4ef7abb8, 0xf56d7f41, 0x4953934b, 0x2b407f0c, 0xbd037f81, 0xd23227d8,
13055 0x39b1b9ad, 0x4d3ce013, 0x77eb0ee9, 0x58393c47, 0xb2f4e2c5, 0x11de471a,
13056 0x4bae5f7b, 0xc671b8dc, 0x3ac1d7cd, 0x65ba28de, 0xf1f88bd2, 0xe1cf4a61,
13057 0x0ee3a0bd, 0x38209f75, 0xe3f1b2f5, 0x4a0ff0d3, 0x7d660baf, 0xe342fe1c,
13058 0x0c7cff92, 0xba931ada, 0x7b871f8d, 0xdf6d3f81, 0x2159bf6f, 0x5da39016,
13059 0x1edc61cf, 0x0f7d47e8, 0x85fcfad2, 0x1cbb884c, 0xc0efdb17, 0x66bdebfc,
13060 0xd8aaa3cc, 0x53ca01fb, 0xe36f4beb, 0xf7511abe, 0xc7495adf, 0x5127db1f,
13061 0x56ef3a7d, 0xab3b8b07, 0xb4b88074, 0x6ae7c4ec, 0xb5f199fc, 0x2eee9716,
13062 0x32d63d1e, 0xabbfed80, 0x5b5591fb, 0x43112cff, 0x0b1b9fbc, 0xd9723af4,
13063 0x0f0d547d, 0x98c3c02e, 0xd896fde8, 0xfd8efff1, 0x80dd0316, 0x758f609e,
13064 0x7ad0a7ec, 0x07ab883f, 0xed620fb8, 0x666eb5df, 0x62ad34fb, 0x6d45bcec,
13065 0xc5a465ff, 0xe812efb0, 0x4f4bbedd, 0x78aef8f3, 0xb42706ca, 0x9d7c574f,
13066 0xbf5b14ba, 0xd4e16adf, 0xe7be037b, 0x67257ebe, 0x05981bcc, 0x78d5597c,
13067 0x4a7b0244, 0xf9b4df5b, 0xe7fd529e, 0x78f2cf53, 0xb05d644e, 0x51bbf519,
13068 0x1613547f, 0x5bc23437, 0xab7a616e, 0x1fad89ba, 0x023976a7, 0xa9cfda76,
13069 0xaf91bb03, 0x911c77ab, 0x83bfb4fc, 0x45237fdb, 0x60acf2a2, 0xc14408fd,
13070 0xfd85ea7f, 0x897f6c39, 0x71c6ebf9, 0xf1c752ee, 0xe38f6286, 0x374671dd,
13071 0x507f0ace, 0x2e7ee762, 0x4149de3f, 0x9dfd0d99, 0xe409116c, 0xf20c9ffd,
13072 0xe31881c5, 0x5a88b5cf, 0x0fc98b3c, 0x1cf1475d, 0xbb9d83a6, 0xb42513e4,
13073 0xc63b57bb, 0xfde7087e, 0x19243b57, 0xb57517e2, 0xeeb52f2c, 0x4069dcdf,
13074 0x5b84baef, 0xdeae3f71, 0xb2575f80, 0x1ae21f2b, 0x51d2c2ae, 0xbd46aec0,
13075 0x7498a093, 0x1476aff0, 0xce14caa7, 0x469daab5, 0x0b9e3704, 0xc5459de5,
13076 0x65de1f30, 0xec635972, 0x52f6883b, 0x8bc289e2, 0xe39fd2e8, 0xca469724,
13077 0x7f968fd0, 0x39696953, 0x052e8d88, 0xb1858c53, 0x99fcddec, 0xdb779c2e,
13078 0x507fd50e, 0x614aec88, 0x8eb06479, 0xcf8aedb4, 0x43f1c321, 0xb47e50a2,
13079 0x1db9cfa9, 0x5e83f7fb, 0x4a24eb5a, 0x8a339502, 0x86cf9955, 0x2c23acf3,
13080 0xe9f0365c, 0x857aff99, 0xf10d6bf6, 0xd9b457e8, 0x25527cb5, 0x46cce401,
13081 0x41bcc41e, 0x936fe560, 0xe634e13a, 0x25781213, 0x298d3eea, 0xa1fd1dbc,
13082 0x7c589bb3, 0xff572780, 0xcf8b027a, 0xafc00091, 0x542b2fae, 0xe212cf38,
13083 0x3bfbc30e, 0x580f181c, 0x9422c6f6, 0x3443a01f, 0xf58a92be, 0xac1b5ee7,
13084 0x67f01cce, 0xbf555a36, 0xc0b4afc6, 0x6ac59b39, 0xf54a7dbf, 0x18a962e7,
13085 0x975e41fa, 0xe5faf2a8, 0x9843a2d2, 0x8a59e68f, 0x8e753e7a, 0x31acdcfe,
13086 0xaa204b4f, 0xfe601c9f, 0xadbc9773, 0xb708cda6, 0xc56b7f31, 0xc35d7d76,
13087 0x37a027e3, 0x127402af, 0x80e2e5fb, 0x3237e23d, 0x4613d7f8, 0x9afc777d,
13088 0xb5f8f4d3, 0xdafc7aca, 0xa7f11886, 0xadc3afc7, 0x97e697c7, 0xf8df8776,
13089 0xc873fab1, 0x8afc2aff, 0x548ed556, 0x4aff4af1, 0x654c292d, 0x42e9dc03,
13090 0x28c2e518, 0x30f61947, 0x9feeff07, 0xafc5a81c, 0xefd40edc, 0xb87cea69,
13091 0x1b3becc5, 0xf00f11c8, 0xe08e51ba, 0x79e82024, 0x75d8f91b, 0xfac40acc,
13092 0x4d7b7c8c, 0x355cf4f7, 0x0b23d5fd, 0x809b57e9, 0x3f23877f, 0x89bef3b0,
13093 0x05975024, 0xc176ea72, 0x59f41dfa, 0xb8458bdc, 0x17b885f7, 0x5efb820f,
13094 0xa43e585c, 0x0db4abe6, 0x306e7825, 0x029f3e18, 0xdca1e9fa, 0xf7a069f6,
13095 0x29484bbc, 0xc51fc1e8, 0x0f03f3b1, 0x38bf65a8, 0x85abd549, 0xef824c6f,
13096 0xe70ca243, 0xdb42dbd5, 0xdea0832c, 0x2a3de3c4, 0xabfa84de, 0x90d6fc60,
13097 0x6c5ae0c8, 0x38820c09, 0xc7115ec8, 0x013c5d6d, 0xd87665cf, 0x2f96216f,
13098 0xccfa16d2, 0x9f4a28b9, 0x7a3d36b7, 0x36b9c415, 0xa9e7629a, 0x7e9ab14c,
13099 0xec1bfad8, 0xc537b792, 0x1eeaf2ca, 0x51e7401a, 0xbaacfd3d, 0xb879330e,
13100 0xabf3a556, 0xf9c46f4b, 0x64e214bf, 0xf88a4758, 0x461a6edb, 0x3dee39e7,
13101 0xb0cf8d41, 0xf528e578, 0x2fd03afd, 0xdfeb5fa8, 0xddc3e9e5, 0xe7020547,
13102 0x2cd546f4, 0x15eb7f45, 0xca73e527, 0x704a7917, 0x616df024, 0xcdef0128,
13103 0xd04c7ef1, 0x22dd1fae, 0x4f33f8e8, 0x22f3575d, 0x44c05e54, 0x3edf50f9,
13104 0xec18222e, 0xfc0f00a0, 0xfd71ed75, 0xd55685f3, 0x149272ee, 0x970df3e0,
13105 0x5ef20e78, 0x7b89dadb, 0x6dbb850d, 0xa3845f71, 0xfa9c3ced, 0xbe25e5a5,
13106 0xbf7ad638, 0x62f8caca, 0x9d7044a3, 0x8ed4b8d9, 0x4b03c5f1, 0xf580ae2b,
13107 0x7b1fabfd, 0x8e7588ae, 0xc53f4a3c, 0x252c7cb3, 0xfe058c9e, 0xbc31cb5e,
13108 0xc697a7d7, 0xf8d7f7c8, 0x8d6fe359, 0xc697d3af, 0x35e56279, 0x7665637e,
13109 0x21d2c15a, 0xdafe049c, 0xe38f0e3e, 0x5cf1aeb6, 0x9f8ddcf6, 0x7800c9ac,
13110 0xd0e74dbc, 0x3884b6ee, 0xb1bd9625, 0xfec4eac1, 0x6bf8d75b, 0x2eef8f21,
13111 0x27a09c2a, 0x0377efbb, 0x813f5bfa, 0x677c2ca0, 0x73c32fa9, 0x642c4bbc,
13112 0x85bbc40b, 0x1c5bf4fa, 0x6f93ffc0, 0x7de14758, 0xeb84d4ac, 0x8dd146eb,
13113 0x08abfbf0, 0x1a83f8c1, 0x8d37edcf, 0xcf3e8e6c, 0xff3584fc, 0xc7a52b59,
13114 0xd21756b3, 0xe6e3c925, 0x3ff77e00, 0xf209dbfe, 0x8cd176dd, 0xfaabec74,
13115 0xaf77da43, 0x36dd9959, 0x0ad94e33, 0x64f293df, 0xc7b71394, 0x123c5ee9,
13116 0x78a04dee, 0x4ea3928f, 0xbbf1f9fa, 0x71d50f44, 0xbb449e14, 0x2892f909,
13117 0xc5d2ec8a, 0x4728fd29, 0x30905c9a, 0x4d8f2047, 0x885cabd3, 0x1ca83b0b,
13118 0xc3d8b28c, 0x962477e0, 0x105379d3, 0xfac2c4ac, 0x754e116b, 0x3cc6cb9c,
13119 0x7997ca79, 0x608a3870, 0x71121448, 0xdf4d7fa1, 0x6d7a7a6a, 0x59794102,
13120 0xa810b0fb, 0x126cfda3, 0xaf885622, 0x01722964, 0x0a251aa4, 0xef179e32,
13121 0xff304e5f, 0x78fd96d2, 0x42dd8742, 0x37c47e85, 0xfb5882fc, 0x869c7c79,
13122 0x401fcf2f, 0x6a1ce46f, 0x8de6003f, 0x73c6cadb, 0x3b4166bf, 0xa87f43bd,
13123 0xba9158f6, 0xdcfb8efe, 0xc209f2c4, 0x3ef44893, 0x687f519b, 0xebb8c9f6,
13124 0xbf606b22, 0x189fdc68, 0x055bb49c, 0xcead1bbe, 0xa89f43b7, 0x1098e6eb,
13125 0xfbf427d5, 0x66c8d0dc, 0xf72b07b8, 0x5dc72663, 0x3f21c9f4, 0xbefbf80f,
13126 0x17c8c47a, 0x2e54c223, 0x32a1f6d5, 0xeae1a7dc, 0x19fb43a8, 0x9e49de83,
13127 0xed152a3e, 0x8cdf955c, 0xdbe4d678, 0x77b9f728, 0x0ccd9bbb, 0x1a47e62e,
13128 0x275c21c6, 0xe836721c, 0xb078b7a5, 0x29f2dbf7, 0xbf5c281e, 0xf4a3f902,
13129 0xb81f384b, 0x21bfe601, 0xe415bd74, 0x27af7be4, 0x5475fa21, 0xbcd3f69e,
13130 0x0fae3e27, 0xc04e27ae, 0xf3fef543, 0x46127aea, 0x01c8777a, 0x78e89395,
13131 0x46ffc689, 0xa3e4d77e, 0xc8de2e0e, 0x047673c6, 0x0b9e59d6, 0x663065e2,
13132 0x7805c9b2, 0x3aedecd5, 0xfe25bed5, 0x56ffb474, 0x1eba88bb, 0x4f800665,
13133 0x5ecd44ea, 0xe3a25b77, 0x051dab53, 0x4fdb97a9, 0xfea45ef5, 0x1b39d459,
13134 0xfe8ed0af, 0x84a2f79b, 0xfe37bfcf, 0x7914289a, 0x898dfc3a, 0x7f15dd1b,
13135 0xb08471f1, 0x9ffec2fb, 0x230cdf9f, 0x7727dc7f, 0xe25aefce, 0xf5422579,
13136 0xf5aade47, 0x3f193675, 0xd7969c39, 0xfb682f55, 0x01e9dd9f, 0xa98fbca3,
13137 0x70c66fac, 0xeef20f4b, 0x25f8a9b5, 0xb3e80664, 0xb76a61f1, 0xff957564,
13138 0xbcfceaf3, 0xb6f78636, 0x8307db5b, 0x3de7ad3c, 0x2f687135, 0xb0264c46,
13139 0xb413762b, 0x8ffbdc7b, 0x5bde513a, 0x4feb7492, 0x8fc0bb57, 0xa7d9a9f2,
13140 0x7c6a5d9a, 0x552ec3af, 0x3e2d1bd7, 0x795135ca, 0x193cf0a1, 0x1c03f1e7,
13141 0xbfe62e75, 0xd05701c2, 0x3d584f63, 0x365fc075, 0xd838973a, 0xce12192f,
13142 0xb096f162, 0x93bb3e4e, 0xde419b47, 0xb03f1482, 0xfae9f9fe, 0x1eeb8837,
13143 0x0971b19e, 0x85aa5e0c, 0x97e9bec0, 0xd560d847, 0xfbc7f304, 0x6bfbb0e5,
13144 0xfbb2e5fa, 0x31c73732, 0xa18b65fb, 0xfa5ac27c, 0x144bcc18, 0xfb9cdf88,
13145 0x5006e1fd, 0x64f90e21, 0xf800d29c, 0x382b14b0, 0x71170c8f, 0x19de9473,
13146 0xbc839042, 0x994ac489, 0xd247f163, 0xfb48ffb9, 0xf39128cb, 0x06323f81,
13147 0x9a373c12, 0x9e7d8a11, 0xf13895e8, 0x8debd987, 0xbcc1ce5d, 0x41cfcaa2,
13148 0xa937ce89, 0xe9839d84, 0xf050fb88, 0x8eadbf01, 0xadb2715b, 0xab3ed817,
13149 0xd9e1813f, 0xc101bfe8, 0x5a825e60, 0x822257bf, 0x2bfd1135, 0xdfaff03f,
13150 0xcaff4164, 0xd041dc46, 0xb1c41fb7, 0xce3aecf8, 0xbfea1ebd, 0x702dda10,
13151 0x37268fcf, 0x343c3c9a, 0x40b716e1, 0x775e755f, 0x5f7c0736, 0x00ef172a,
13152 0x9c275b9e, 0x6716bc1d, 0xf8c99ed2, 0xf975e14e, 0x9afd1af6, 0xacfd1d44,
13153 0xd6895710, 0x08690ef3, 0x5cadedd8, 0xaafc1b9c, 0x831ce5d6, 0xe7a8b397,
13154 0x3cdd0411, 0x1fcc6cd3, 0xe7f55369, 0x90b2e3df, 0x84f5b51f, 0xc63d6fce,
13155 0xe8f30d7f, 0x386a8738, 0x973c6a77, 0x11dd969a, 0x7cc74a07, 0xee0952dc,
13156 0x43672332, 0xbce3b436, 0x124cf6ce, 0x6a64bce3, 0x5cf31ac4, 0xbc5256b0,
13157 0x4b780d7d, 0x40126b15, 0xcedea71f, 0x1f1188f4, 0xc47f9c6d, 0xfb47d841,
13158 0x1f331883, 0xd2d32b45, 0x4c584a6e, 0xbf4b4fdf, 0x79ed4b01, 0x19885d83,
13159 0x71b24c57, 0x64dcec3f, 0xfc18b103, 0xed1b24cd, 0x9de7b4ef, 0xff1415f7,
13160 0x37bb8c76, 0x37bc31c4, 0x37bc31c4, 0xe53e1a48, 0xcebf9078, 0xf7975bba,
13161 0x4967c1b4, 0xd10f2010, 0xb9f28e9f, 0xdde8c5c4, 0xf682bef9, 0xdca21f4d,
13162 0xc4941730, 0x436c9106, 0x21f167be, 0xafc87ced, 0x4024cf7c, 0x96db94be,
13163 0x16fbfaa5, 0x0604df46, 0x530df9f7, 0xb214dc70, 0xe2983ac6, 0xc9a96979,
13164 0xd3a3710d, 0xc2723f0b, 0x1985e991, 0x0f20792d, 0x1b8f79a7, 0x984a97e6,
13165 0x8e6cb85f, 0x2ed30814, 0xc2a81b93, 0x01ba7462, 0x4ccb3bf7, 0xc7aef331,
13166 0xe9fed8d8, 0x961738d1, 0x90d36969, 0x92f59d4e, 0x8c4bf004, 0x35e54a7c,
13167 0xcea8f17d, 0x6f94cc73, 0x790c5b14, 0x1349136b, 0x185beb87, 0xb1ac95f1,
13168 0x35b7aab3, 0x39064979, 0x52ab7d84, 0x3a3547aa, 0x4d5f500f, 0xfe28b8c1,
13169 0xbfd7a171, 0x79c37f06, 0x45ea015d, 0x10c88e4d, 0xa0ade7a6, 0xa1e2a377,
13170 0xe83f7b6d, 0x9f8efb0f, 0x0739dbfc, 0x55fd3bec, 0x9e807768, 0xbbcf7e3d,
13171 0xf4c7380e, 0x2e2c3dc9, 0x4fc18772, 0xfa63645b, 0x74ad8f7f, 0x8177e01e,
13172 0x9e791fef, 0x77257e28, 0xe593fdb3, 0xde70de01, 0x506f7f5d, 0x70c93055,
13173 0xf11f908f, 0x1fdea55a, 0x46c7a466, 0x2cb78b1b, 0xca59b1df, 0x4f7c6190,
13174 0x5c7f8c25, 0x378f43f5, 0xd1dfd03a, 0x63b859e0, 0xd9be0484, 0x7566435f,
13175 0x6445bdff, 0x025287eb, 0x151e67fb, 0x0f38466f, 0x2f6af7aa, 0x8fcb25f9,
13176 0xdd63a329, 0x27b0f54d, 0x187bcec4, 0x13e4b1e7, 0x129528b9, 0x1cfdc96f,
13177 0xfef0ddfa, 0xf33d743d, 0xee1f7ddc, 0xd9e719b3, 0x051f5ef5, 0x2a65b3fd,
13178 0x6de78dbd, 0x3ed88597, 0x41e262f8, 0xfe72ecf9, 0xc5cec436, 0x678de318,
13179 0x00db650f, 0xa9b0bf0f, 0x323cc4f1, 0xef6dce06, 0xfe20343a, 0x9f56f772,
13180 0x828bef52, 0x3ca1bb7b, 0xce5823ee, 0xe2902303, 0xf6f432bf, 0xd55fc05d,
13181 0x3ef13b4d, 0x8faaefb4, 0x9c2742aa, 0xe9ad4b90, 0x6e876a25, 0x8b20f903,
13182 0x5a7d9d39, 0xc49cf9bd, 0x9f866afc, 0xb7e7d4db, 0x20723e01, 0xd9fe5bdf,
13183 0xdbef4a04, 0xd1f3c52a, 0x6f3da5f7, 0xf7c3efd3, 0x3cdabe76, 0xed6b79b5,
13184 0x9c5e6a55, 0x0e4d3bf1, 0xb97ca9e6, 0x75f4eb78, 0xea8a297d, 0xa9917ef6,
13185 0xf3c3939e, 0x2d9f1a42, 0xe945a523, 0xa349f831, 0x84df076f, 0xd3f38e7e,
13186 0xbeb8bae8, 0x3f83c54c, 0x4c4fdd4d, 0x91957883, 0xa73a7a8f, 0x32462add,
13187 0x7c8dbe41, 0x7dcddad2, 0xb31b2128, 0x4acb162f, 0xa8cfc411, 0x15cebbf9,
13188 0x171cdf65, 0x14fe0fea, 0xe32b6ee4, 0x083d0efb, 0xf7e8314e, 0xff5c4537,
13189 0x54e43a57, 0xe90fffb8, 0x13f20e37, 0x4f787ecc, 0x4f98e71b, 0x808a0651,
13190 0x4f2c62ff, 0x81954afa, 0x97db3a83, 0x04e73c6e, 0x086dbbfb, 0xab51b8c1,
13191 0x69ef0f43, 0xe37a8f1b, 0x4a8f4ab4, 0x3f9be5a1, 0xdadace83, 0xc7177982,
13192 0xa771a92e, 0x58e2e64b, 0x39d8b4f3, 0x7778bddd, 0xf9a872a8, 0xfa540b35,
13193 0xfb6211dd, 0x4d370be9, 0xc9747a47, 0xa1fd54bf, 0xf50e46b2, 0x4b3e918e,
13194 0x3e63d7dc, 0x3e40a2da, 0x5e85df7e, 0xbba441e4, 0xda776e91, 0x371eec5d,
13195 0x7b8246a1, 0xe26d8eed, 0x8571ff70, 0x73ff7b10, 0x9df4ddb6, 0x479c63e6,
13196 0xdb2ff077, 0x2faebb5a, 0x908ff981, 0xf08dcf80, 0x425ff36b, 0xd4a7a614,
13197 0x2f3776f9, 0xf2c49912, 0x7f75d434, 0x815b9c39, 0x790793fd, 0xc6adcf96,
13198 0x35f834a1, 0x28f38d78, 0x7cf12be2, 0x8f035b41, 0xf877d979, 0x77067dd9,
13199 0xfd70e5ac, 0x9a4e8eed, 0x7bf6d15e, 0x30ca9baa, 0xfb43cb6f, 0xedb63b01,
13200 0x29f6c263, 0xcf7873d6, 0x0cf4b75b, 0xeea57cb1, 0xa30849e8, 0x374a62db,
13201 0xdebb3ff0, 0x0caf909f, 0x0a27de8c, 0x8c0ca0dc, 0x4122b7de, 0xb15957cc,
13202 0xf9eeba7d, 0x8e35768d, 0x9ef5eaa5, 0x24d48fe4, 0x696f8cc4, 0x9fc9a6f2,
13203 0xda778f26, 0x0a6f6665, 0x59198381, 0xd1879f80, 0x7afaa1bf, 0x3df99d9e,
13204 0xafa5cd0f, 0xa73c6f54, 0x3258a7db, 0x096bd196, 0xbbcf825f, 0x0f14bbd3,
13205 0xd8bdbd3a, 0xf8c3cfae, 0xe6d1f3a1, 0x3689c9a1, 0x189ca33f, 0x43d237bf,
13206 0xe919ef8b, 0xc007a462, 0x5bc67e09, 0x35816d7b, 0x38b7ce14, 0xaf7fb706,
13207 0x4d6ee115, 0xb9c0ac9b, 0xf9f4eacd, 0x3e01fe58, 0xb0fb074c, 0x768eceb4,
13208 0x8d87eaae, 0x225c5dea, 0x5ecbb557, 0xd9232ab2, 0x24d2a7b9, 0xb58993e0,
13209 0x17161991, 0x583e8f21, 0xa4f7045c, 0x32387c4e, 0xbff14203, 0x5646f07e,
13210 0xd77916df, 0xfcfb86e2, 0x690a8a4b, 0x2fd071fd, 0x95fa2fa0, 0x6efbe0db,
13211 0xf973c4eb, 0x1fdeccba, 0xcf9d2e65, 0xed66b1ee, 0xb33ed495, 0xf2aef5d0,
13212 0x4157e0f0, 0x4a5b2b7e, 0x542e218a, 0xba781109, 0xce2955de, 0xad872db0,
13213 0x7be9e3fb, 0x4f3cd91f, 0x76ee21d9, 0x8bae2d71, 0x94058795, 0xc588722f,
13214 0x573a0567, 0x6d6efd2b, 0x2993b51c, 0x5a26d77e, 0xd317e0dc, 0x97f07ee7,
13215 0xb22a26d7, 0xa35cf51c, 0x70077c1f, 0x7cb135ac, 0x0c6ffd82, 0xc65c8f8e,
13216 0x23efd82e, 0x34cfe025, 0x1a582cfb, 0x1725f3db, 0x37c8e79e, 0xb18978b1,
13217 0x76bb6dfd, 0x00ce49ae, 0x243ea8be, 0x1fc3fca1, 0x84559fd8, 0x613549c9,
13218 0x0eaad0e7, 0x53773c13, 0xcf08a87d, 0x84b9c0dd, 0xe07a754f, 0xa6ee735f,
13219 0x9e18af93, 0x44ae040a, 0xd0b71a88, 0xf9d5d56e, 0x9810d354, 0xdce3e10f,
13220 0xcf846e70, 0xa2ecd530, 0xa0afe7f3, 0xe087c525, 0xff70f372, 0x89e4fd4c,
13221 0x559fdc3c, 0x2d79aa27, 0xbe3e7626, 0xe557dd63, 0x39fb2b4f, 0xdd028f4a,
13222 0x25b1ff4f, 0x53f6c6cf, 0xe6d6afd0, 0x8429c75b, 0x35ed7f03, 0x7219e782,
13223 0xe0334993, 0xb19446cf, 0x47166fc0, 0x6c97caa2, 0x65fe9b3f, 0x9b36e940,
13224 0x7e53237e, 0x9fc1faff, 0xe3bbff22, 0x68b2ab4d, 0x59f8739d, 0x2e74c33d,
13225 0xef30b28b, 0x6bf565a8, 0xd006e74c, 0xc358e8ba, 0x4af1b0ea, 0xa3b33e17,
13226 0x143fc8ae, 0xba3171c6, 0x01ae50ee, 0x2c4c16fe, 0x901c23ae, 0xcb477f70,
13227 0x794b5957, 0xe2d1f806, 0x5d747a60, 0x3673c16d, 0x28179b88, 0xec4fe432,
13228 0xfa41ef51, 0x5786a5be, 0x7f4266de, 0x7fc04a09, 0x53e183bc, 0x54690ba3,
13229 0x5e3c81ae, 0x81ae5412, 0x0e7ebd7d, 0x7e83a24f, 0x96adf23f, 0x1bcfa089,
13230 0x0f28f9df, 0x82bf73ef, 0x2df233f5, 0xf9d243ea, 0xff6dfe9c, 0xe4fbd1cd,
13231 0xa9f91cfd, 0x03251df0, 0xec9cafda, 0x3951b722, 0x2c8853ac, 0xad9f8365,
13232 0x091b2ff7, 0xd91f4fd3, 0xa070af4a, 0x3ae3093e, 0x67bb13f6, 0x7e8dd400,
13233 0xec496933, 0x949dde55, 0x17ee3773, 0x7d346625, 0x85d610b8, 0x4a7bb1df,
13234 0xfcc14538, 0xee3b17d3, 0x9718236b, 0x373891b2, 0x9b898dc4, 0xd453f9a4,
13235 0xf1899af8, 0x945e7255, 0x87ceacff, 0x79085f7e, 0x2c6c63f2, 0x8fce81bf,
13236 0x823afd07, 0x848e58c8, 0xa0365938, 0x3df583d8, 0x4fe1f824, 0x588fff69,
13237 0xb2ca7c59, 0x8fe2e89d, 0xb7160e65, 0xe2c9c079, 0xf062718f, 0xe22bb016,
13238 0xd81710ce, 0x4b8f6d15, 0x0bcfee02, 0xdf709bae, 0xe309a0ee, 0x018b4fdc,
13239 0xb517ec17, 0x5bc8255f, 0x6d7f6748, 0x7eb5dd2a, 0xabe4911f, 0x0bf7ee20,
13240 0x9d3fab27, 0xbb8f304f, 0x801484fd, 0x0cc4dcfd, 0x3c744d4b, 0xd9839e69,
13241 0x1573bfbb, 0x043a04cc, 0x1811c6f7, 0x38becc7f, 0xb9e3d013, 0xe056b91d,
13242 0x4701178b, 0x66890f14, 0x5fd09dd7, 0x6f0a39e2, 0xf9673e16, 0x223c82fd,
13243 0xfc77e29e, 0xee19768d, 0x1ada7ad1, 0x56f311bc, 0xbde1379f, 0xee4a2fc1,
13244 0xf17f50e9, 0x3d02ecac, 0x305674fc, 0xbcf3e70e, 0x62f3e709, 0x2bd5fb5c,
13245 0x0c0fdc29, 0xc12ef161, 0xcfd00446, 0xbe40a982, 0xae5f3e93, 0xafa6b1f2,
13246 0xd11c8137, 0xc11c23fa, 0x29820c73, 0xcb48e51f, 0x276b6a27, 0x67d44f98,
13247 0xfc0f0b66, 0x8b5d371c, 0x8879853b, 0x25284d17, 0xb04dcf68, 0x05ce788b,
13248 0xbce199f2, 0x0f5544db, 0xb2b8fc4f, 0xbb07e584, 0x9ebdc30f, 0x7ef576cd,
13249 0x739f7530, 0xd727ca92, 0xa16f0891, 0x245dd7ed, 0x4d27886e, 0x8fdfa8ba,
13250 0x5f60ca78, 0x57fb514e, 0xf0855dda, 0xede89f38, 0x450d29bf, 0x2c3d6027,
13251 0xfc008a20, 0x6862d934, 0x09d23b07, 0x9febf0f7, 0xfd50e03f, 0x19924cdc,
13252 0xeda6c79d, 0x87e14d43, 0xb5fb446e, 0x5e037258, 0x0f95da76, 0xdfc03f20,
13253 0xc5cb9222, 0xb1f29f25, 0x1721c37c, 0x2cae046d, 0x8769fca4, 0x50dd5cf9,
13254 0x79d2b7ef, 0xf5903d5f, 0xfa087c0f, 0x93c7cae5, 0x8fdf4093, 0x95a5e957,
13255 0x7f01df1a, 0x7f19e2b9, 0xca7786b9, 0x2c8ed3e7, 0x37934f7c, 0x67e83be0,
13256 0x1f98188f, 0xf29bbf6b, 0xafc0d3eb, 0xfd04ed3b, 0x5ba59fb8, 0x699c80e6,
13257 0x7caab4e3, 0xd5d72c6d, 0xbf0fdcae, 0xc0bfe4fb, 0xbec28dd6, 0x75e8a517,
13258 0x83024fbf, 0xcfd72bd7, 0x68790698, 0xccf31176, 0x5173d452, 0x1e92fcd1,
13259 0xdf1a2fc5, 0x9c59dab5, 0xc99fe348, 0xe1e5dfbb, 0x840be4f9, 0x8748b2b8,
13260 0xcff1a2bf, 0xf7187f44, 0xe6122781, 0x67f9189f, 0x93fc3757, 0x40165e7f,
13261 0x9fe1756f, 0xba7f8c43, 0x0fda1be3, 0xe4616bde, 0xaa1c779f, 0xff2dddbd,
13262 0xfcf3c25c, 0xbe4ef7ab, 0x93657eec, 0x6a9f9f4f, 0x62d9c72c, 0x54bb2fe7,
13263 0xea96efbc, 0xbd01ca6f, 0xcec4d531, 0xe32409ef, 0xeeef0a16, 0xfcdeed38,
13264 0xefa86c9a, 0xda1e9814, 0x1ea33219, 0x78f769da, 0x669b7e30, 0x0557e761,
13265 0x23ce044f, 0xe45afbb8, 0xd921dfe8, 0x587660ee, 0xfb8f0c50, 0x37f1ec02,
13266 0x9d8c1f18, 0x2a43cb9a, 0xa662fa5a, 0x971d4617, 0xcfefc336, 0xbfccea3d,
13267 0x06967c00, 0x79dfa3b8, 0xcf784a8f, 0x0951f552, 0xf76fe3f5, 0xf1045dbd,
13268 0x79cf2d51, 0x8bb79ecc, 0xfbc2860a, 0xa1fedf8c, 0x8ead65ea, 0x5f404047,
13269 0x1fddee1a, 0x4b1e71d7, 0x297e6f7f, 0x674e51f0, 0xf93ef1bb, 0x3fdb1c60,
13270 0x11644d99, 0xb4719886, 0xdeb85ef4, 0xfcaf78cc, 0xff3b30ec, 0x27b0f336,
13271 0x2af2bdf6, 0x37ef187f, 0x8a77f6a7, 0xe7efec13, 0x6841f65a, 0xdd6cc884,
13272 0xd7354a0e, 0x26a33f30, 0x9349f81b, 0xf8a3fc43, 0x44327e0b, 0xb706bbf7,
13273 0xd07ff3a9, 0xa9fbb02d, 0x4bee1222, 0xefb09cfe, 0x363aea82, 0x40f4c9ca,
13274 0xe617eaee, 0xcb239c03, 0xcba06695, 0xd7162eb3, 0x5b0905f9, 0x6e6e81b2,
13275 0x8253f701, 0x0bf93ca2, 0x223df3ae, 0xd3b10e94, 0xe27d3df6, 0x8ff8c246,
13276 0x9c633d3a, 0xed099f60, 0x31bbe087, 0x824773e3, 0x588fb71e, 0x9aeb049b,
13277 0xab853706, 0x13bd9b78, 0x81ae0d0e, 0x8f97c64e, 0x00c6cb3a, 0xd03be01e,
13278 0x8e474d4b, 0x8d7be059, 0xcf7b821f, 0xe2883e30, 0x4e83e00b, 0x4016e0be,
13279 0xa283c35d, 0xfdb7cfae, 0x8b42f88b, 0x17c8f46b, 0x7e70b710, 0x0b98be2f,
13280 0x05f23578, 0xce3ce7b5, 0x505cf618, 0xc6937962, 0xe7b13fe7, 0x896efbe3,
13281 0xd913de60, 0x6bbf6567, 0x7dc049e8, 0xd8b8df90, 0x1c9f6d98, 0x28a6a4cb,
13282 0x7664e559, 0x2a3bf6bd, 0xda1cc223, 0xa2a8239f, 0xbced0db8, 0xdd27a87e,
13283 0x31c8fe2a, 0x46fb838e, 0x033e3731, 0x1270d0ec, 0xcc236bd8, 0x87906125,
13284 0x1989b65d, 0xdae63f60, 0xfcc36426, 0xfab21e5f, 0x5ed2584d, 0x9bfe5bee,
13285 0x7da772ad, 0x66c3e9a5, 0xfc6d5bb5, 0x4c7f2a35, 0x2779d852, 0x70d1ebd0,
13286 0x9003eb68, 0xc2e0e009, 0xdadf4db3, 0x22878f50, 0x00936f14, 0xfd878a0e,
13287 0xfb04691c, 0x24a4df21, 0xb03b064f, 0x3800584f, 0x9d7ef6db, 0x92cef109,
13288 0x021febd0, 0x3eda25bc, 0x0fbf5bac, 0x35b7b46b, 0x3ff3487b, 0xf3497b34,
13289 0x82aec17b, 0x1fd532f6, 0xbed99971, 0x05b084d8, 0xe47853ef, 0xa2957cac,
13290 0xe740b3ca, 0xe3cea251, 0x7082d266, 0x4ca9f769, 0x7251f153, 0x39abfa88,
13291 0x54c84ed0, 0xeaa9878a, 0xdd532a7d, 0x6e22fbfa, 0x3efb1b1e, 0x9e9fad15,
13292 0x1bae37de, 0xa3f61ad7, 0xc879687e, 0xf94feec7, 0xc3f98fbd, 0x7ef007e3,
13293 0xb1dfd601, 0x09feec59, 0x21c3c317, 0x763af629, 0xf1eb9551, 0x9c0e48a6,
13294 0xe7bfdec7, 0x1e6eb8ef, 0xf7f7f3d8, 0x771c8ec1, 0x97902042, 0xa8c4fe3b,
13295 0x180fcc78, 0x695f232b, 0x6f3f7afd, 0x9cf611b4, 0xccdeff44, 0x728f0a41,
13296 0xc167c025, 0x8f5395f2, 0x9dfd0a3c, 0xe8902a3f, 0x92451f73, 0xe5c42067,
13297 0x1ddfd48b, 0x7b31c83a, 0xa83f6b4a, 0x11c7defe, 0x21216f95, 0xc567bb43,
13298 0xa9e7451c, 0x1a1ffdea, 0x2f1ea75d, 0x74e4213e, 0xfdfc0fa5, 0x5a10e233,
13299 0xaa9ce1fc, 0x9ff3490f, 0xf5ce7cf0, 0x600a778d, 0xc69f5fbf, 0xdc6a2513,
13300 0xe9ea641b, 0x4e21c547, 0x6ff60d3a, 0x4e8f33f3, 0xb7e5bc83, 0xf4814c78,
13301 0x99be7686, 0x3e16f503, 0x462abde6, 0xba1f5efc, 0x9955ef13, 0xa3e4cf1b,
13302 0x5fc7f1a7, 0x3864f94d, 0x3b309dd0, 0x4bdd8f30, 0x81efa462, 0x1491ff3d,
13303 0xbe3dda19, 0x91bfa3bb, 0x2a9caf0e, 0x9eac7dc0, 0xdbe461e8, 0xfe9e747d,
13304 0x5377e12b, 0xbf8fc42d, 0xfac2ea9b, 0xac34beab, 0xddeafc6b, 0xd81264fb,
13305 0x4e9f1a79, 0x337c6249, 0x49a3f76e, 0x2f49dec4, 0xc586de23, 0xc97ffe33,
13306 0xee25d9aa, 0xa3e8d359, 0x843ae977, 0x2d27ea8c, 0xaa563790, 0x70fb3ac2,
13307 0x4425da11, 0x5c62cf3d, 0xb7f366df, 0xda75014d, 0xccfeefd3, 0xf57acb94,
13308 0x6fc5397b, 0x0eb00bd5, 0x99ab0916, 0x78ed531e, 0x9d231e0d, 0x08a523df,
13309 0x19f0777f, 0xe708c0f9, 0xf6f91d4b, 0xda07ae0a, 0x18cce0ef, 0xc6262598,
13310 0x8f868798, 0xc7ae8499, 0x8f5fbdd9, 0xdbd78c6f, 0x178ee7ef, 0xdad011fe,
13311 0xe919bc9d, 0xf4d76c66, 0x900c1147, 0xec1fa58b, 0x29f1b993, 0x8ba2df48,
13312 0x3ae85112, 0xcfe9fa43, 0x2b9293f5, 0xb956df91, 0xf8eeb3d8, 0x4f22faad,
13313 0xf93b233c, 0xd87a6c4e, 0x5bb77c06, 0x1c41b7a8, 0xf4fb3af5, 0xc2bd103a,
13314 0xe2660bcf, 0x131115fd, 0x94dad081, 0x886699d0, 0x243f7833, 0x20a1be78,
13315 0xf0327fb4, 0x0b42abe9, 0xe76d59fa, 0xca387909, 0xd50a6cee, 0x6b2ec0d9,
13316 0xf3e7664a, 0x5d10260e, 0x78c5f4fe, 0x8e9a6fa6, 0xc4a69d9e, 0x62ee1f68,
13317 0x28833cfc, 0x9ff439c9, 0x7f29eb45, 0xc7dc1f80, 0x42927181, 0x325afdce,
13318 0x39732dd8, 0xf6da23f4, 0x992d798e, 0x7b7adbc2, 0x2999ea02, 0xe9ddf74d,
13319 0xfe0884a2, 0x6f3e2463, 0xfef0e32f, 0x8dd92284, 0x59c5a2f5, 0xf98df7e8,
13320 0x09466926, 0xa220dfb4, 0xaf8533df, 0x755e2014, 0xabc38d3a, 0x9170f63c,
13321 0x623df85a, 0x0e3674ff, 0xc093f971, 0x24a77d3f, 0x66fe0469, 0x07d5ac9e,
13322 0x122eefe1, 0xfab6ff83, 0xcdfb73a5, 0x2cf57db4, 0xa78df30e, 0x3f8832b8,
13323 0xd68a7f8a, 0x5baf384b, 0xc005a942, 0xf58a33d7, 0xaac31ee7, 0xd4ab393d,
13324 0xfbd10246, 0xe50b9cf9, 0xfdb5a0fa, 0xf11dfc56, 0xf98122bd, 0xa37e7269,
13325 0xe7b3efca, 0x9bbee924, 0xa9dd984e, 0xaa4dd5c9, 0xfaa8ddfc, 0x193d73cd,
13326 0x094bf1ba, 0x40fe87b3, 0x64810bda, 0x7ed8b8f7, 0x96f6b4f4, 0x25e1f3c3,
13327 0xd068dfbe, 0x310d3787, 0xe57cbdf8, 0x348be45a, 0xc8f78dce, 0x37edf5b8,
13328 0x8dd7d58f, 0x0fd46bf2, 0x8f8b20b3, 0x3427aaef, 0x2f6b307d, 0x683c422f,
13329 0x33c53e56, 0xbb7ac5da, 0x317d27bd, 0x7d1bae26, 0x17be4971, 0xfa2e90cc,
13330 0xefe2e3e2, 0x4b7e2fa5, 0x54b196dd, 0x578edfae, 0xa4fecdd7, 0x298de83f,
13331 0x81478efc, 0xbae8da8f, 0x47c18e69, 0xc5a3bada, 0x1ca88a01, 0xc5381ea3,
13332 0x5ca663f6, 0x91fe274c, 0x0e80719d, 0x12ed423d, 0xa97b0c77, 0xe51b3e35,
13333 0x68ef43ab, 0x2eca257a, 0xb87ef311, 0xda85325d, 0xc02e52a3, 0x2be10fd7,
13334 0x2925ef52, 0x882b8482, 0xc19da61f, 0xa0579038, 0xcfae2cfe, 0x817f224f,
13335 0x3b12e3fe, 0xaf68c3e5, 0x0ae87168, 0xe94f6697, 0x1e23a5f9, 0xc3dd9339,
13336 0x1149f1aa, 0x7fe413e0, 0x04fb8f26, 0x7fd41bff, 0x8000b303, 0x00008000,
13337 0x00088b1f, 0x00000000, 0x7cc5ff00, 0x55547809, 0xf579f096, 0x55492d5e,
13338 0x146caa92, 0xb612f08b, 0x84582484, 0x5916ec80, 0xa014a358, 0x8168cb80,
13339 0x9a126b0b, 0x69ee9c71, 0x0242a6ff, 0x83b74343, 0xe8cedad2, 0x3ad857f4,
13340 0x08b41a83, 0xd09d0301, 0x584c5015, 0xf82e0834, 0x1a6d1ad9, 0x84490ed1,
13341 0xbfbb46d6, 0x739cffcf, 0x2aaa4bef, 0xffff4d85, 0xb49fdf3f, 0xdeefb97d,
13342 0x67b9ef77, 0x979ee73f, 0xb3559bdb, 0xf6e008ad, 0x14078a99, 0x77f1d000,
13343 0xe042c022, 0xadacc37f, 0xc78ef016, 0x69fcd7be, 0xe7f80d87, 0x9c2ffc3b,
13344 0xa42cfc90, 0x900bcf50, 0xce54b009, 0x7d57fc5f, 0x3c5e3d33, 0x52fe7a27,
13345 0x92b9fd98, 0xf81b700c, 0xf71c30cd, 0xff8ec5f3, 0xc7154bec, 0x7e8b2e97,
13346 0x4a4ce99e, 0xff8790bf, 0xbe230118, 0xd4ca0153, 0x22b79dba, 0x5527ddbc,
13347 0x334c558f, 0x390ffed1, 0x350ffec5, 0x7c800c97, 0x1674df80, 0x3db1f8a7,
13348 0x1c2111b6, 0xd1bad00d, 0xec71edc6, 0xefc5f107, 0x3c66e7e8, 0x21fc059f,
13349 0x52b4b607, 0x4801b721, 0xc4ed1805, 0xff602745, 0x0d3f9e2a, 0xc02486c7,
13350 0x5c2473ef, 0xe7af00d9, 0xf104e798, 0x5eb8c3bd, 0xe30dd700, 0xf75c01fa,
13351 0xf72746c8, 0xe6e8db5f, 0x442e0dfe, 0xfac0066a, 0x37af2714, 0x8776f72f,
13352 0xe35bdf1f, 0x50e7e6cc, 0xf844da3e, 0x7b2fe036, 0x1004086a, 0xac77afdf,
13353 0x807494d0, 0xb1e2b72a, 0x01d1f566, 0x8e58e34f, 0xbe25cbf3, 0x102ab72b,
13354 0x1fe5e7c4, 0xc4072bae, 0xee33575f, 0x2aa9f887, 0xfc368355, 0x63d34967,
13355 0x0cdf453b, 0xdefa08d6, 0x33028e22, 0x86cd16b5, 0x28f02cfb, 0xf1f7151e,
13356 0x6ff78936, 0x1d412af5, 0x278b79ff, 0x63871e9a, 0xae58bee8, 0x0ffe80b3,
13357 0x47305bdf, 0x9d718609, 0xdfa29305, 0xd6757c5b, 0xfed8cae7, 0xe898b47c,
13358 0xbf3fb63e, 0xb7744edc, 0xc1863fe3, 0x95fba230, 0x8d6fa58b, 0xc5ba3e85,
13359 0x8e74b1b6, 0x9d16bf1d, 0x673a27ef, 0xc6ce9b5c, 0xce8b7ffb, 0x904e110f,
13360 0x1bf470be, 0x30049e8b, 0x1a07e9bb, 0x55f679d1, 0x32add78d, 0x861433ce,
13361 0xd4fe79d2, 0xb76ff859, 0xaafcdf42, 0xfe2d2fa6, 0xe79f6b82, 0x22bfed6f,
13362 0x69fde745, 0xdf7e6f5f, 0x8034f3be, 0xf9ce78c1, 0x8df8d139, 0xbd2c6ba5,
13363 0x62f7ca16, 0xe635b5e9, 0xa05d061c, 0x60689913, 0x555fbc1c, 0xd16b8e19,
13364 0x162e97ad, 0x7e4f08ff, 0x5f8071ff, 0xd6fab9f3, 0x76827493, 0xe02057cd,
13365 0x03c84732, 0x052075f2, 0x0ade5be9, 0xec0444e1, 0x3e738b96, 0x28f5a8d7,
13366 0x39c469f0, 0x8353e7e8, 0xfadf6ace, 0xb2075765, 0x96fb19fc, 0x14b01069,
13367 0x972173d2, 0xd255f0b1, 0x7e69233a, 0xcb68f980, 0x10b2d32e, 0x05ba639e,
13368 0x9b51f5ee, 0x4e03da28, 0x9d1a07a1, 0xfbb75e26, 0x6e099b2b, 0xf0e57804,
13369 0xf8406280, 0x09e7563c, 0x33218bd2, 0xc945fbf0, 0x9cdfcf3a, 0xdc048104,
13370 0x9b76b41f, 0x2b44f90f, 0x3941c806, 0x825906d3, 0x9d64b835, 0xdc91f616,
13371 0xa8347b75, 0xd1bbb946, 0xe048ef78, 0x6c92402e, 0xa99474fe, 0x0fde8b26,
13372 0x79c54fb7, 0xfa6a1537, 0xb2e29c36, 0xf1a03fea, 0x93ab66ae, 0xf83eebde,
13373 0x5a662dcf, 0x20f02be7, 0x335af084, 0x4f8e1532, 0xa4839873, 0x93d4ca37,
13374 0xddfb09aa, 0x8fa4003d, 0x970b2da6, 0x3a6dd200, 0xb138d7b4, 0x8c74429d,
13375 0xd0bfbf43, 0xde843379, 0x9a74881a, 0x4334e921, 0x6692abea, 0x4946f595,
13376 0xac841a92, 0xb374fd3e, 0x408cd1a4, 0xee0a497b, 0x3c53433b, 0xf9bfd835,
13377 0x8fc516aa, 0xba3e932f, 0x951f4fb1, 0x3dbdf5c9, 0x019686ba, 0xff344266,
13378 0x3d0a3596, 0x798b6254, 0xbe0fed2e, 0xe6557cc9, 0x429f1e8c, 0xfbf913ba,
13379 0x825e8c62, 0xa653fb18, 0x03b935fe, 0xc58af0f1, 0x8454defb, 0x19b4e7bb,
13380 0x70e7c59e, 0xfb933b11, 0xc631a7e3, 0x07b6c51e, 0x757a270f, 0xe215eb84,
13381 0x07f50723, 0xd7b1f579, 0xa3b63f9e, 0xf18e98a7, 0x0d22dd4a, 0xcf2d99b2,
13382 0xf0fb33ba, 0x92bf0fde, 0xad78b10e, 0xdbde7a97, 0x8e8d7ce8, 0xad8f0fdb,
13383 0x979ed8b3, 0x48d749fc, 0xf8bdfdf5, 0x95e5e434, 0xe25e890b, 0x0c2e57ff,
13384 0x4afdb2f2, 0x0c3e59d2, 0xfe783879, 0x51e92272, 0x21aea7c4, 0x6cb8f49f,
13385 0x9f99679e, 0x06841c85, 0xc36e0a8e, 0xc12485fe, 0xf624aff7, 0xbc23cf1c,
13386 0x3cf262df, 0xeb68db4b, 0x202a2f87, 0xd175b9fd, 0xe2803379, 0x2887e505,
13387 0x84ee8a4f, 0xa00db1bb, 0x05ff113c, 0x72482152, 0xd0108662, 0x785e35be,
13388 0xd319da9a, 0xfbc214f4, 0xddb35c65, 0x29e9eb41, 0xd7f0f7c4, 0x057d132b,
13389 0xbf5ff1fd, 0xee1a7c11, 0xe6d1b0d3, 0x1c2f50d3, 0x7ee4e8d8, 0xb73746e3,
13390 0xdcea3687, 0xfc913a6e, 0xaa1ff243, 0x169f16bc, 0xa5e657a1, 0x0330fd0a,
13391 0x35c10ef5, 0x00609403, 0x23c66f79, 0x7288f2c0, 0x10a4dc10, 0x393cf0bd,
13392 0xfa44f87d, 0xe888ee5c, 0x3b56ad43, 0x82a59321, 0x67985ee9, 0x09d1f7e2,
13393 0xd59f3e08, 0x3fd23e7f, 0xfc8cbfaa, 0xefc38416, 0xb0b996f2, 0xb37c390d,
13394 0x7adf885d, 0x4bd1e965, 0xf4b9fdc0, 0x43b95ebc, 0x8feb84bd, 0x1f84cf0f,
13395 0x8f18bda2, 0xe2bc2184, 0xff045dcf, 0x100b1684, 0xb2b0d07d, 0xf21a167c,
13396 0x5ca2b5f9, 0x8448fdc0, 0xef8c1bbe, 0xc4c3cb59, 0x23a0074f, 0x645ef08d,
13397 0x7e49d9f3, 0x3f04b997, 0xdddb9578, 0x3937ae0a, 0x0951e2c3, 0xf1bee1b4,
13398 0x2d7f11eb, 0xce21b819, 0x1cc9696f, 0xb713e7a2, 0xc93ef1bd, 0x08e6d7b7,
13399 0xcc986cab, 0xf6111d9d, 0xe33c007c, 0x74927f24, 0x476877dc, 0x0e4e3f5a,
13400 0x6abb9eb0, 0x6b5e9209, 0x09ec933d, 0xafd33ee3, 0xacbfd8da, 0x6e5117a7,
13401 0x8f26270f, 0x42133d65, 0x63f2430d, 0x6d98e713, 0x3c23aff6, 0x7a3e65a0,
13402 0xedfbdf0a, 0xafd20065, 0x543fdbd3, 0x312d0fc9, 0x40e80ee5, 0xa32a8f38,
13403 0xf27da853, 0x6e7ce4e3, 0x127724cf, 0xec9b0e7e, 0xcefbed3a, 0x0474bd46,
13404 0x8da9cbf2, 0xf9023a50, 0x368dade3, 0x746f4f6e, 0xa3667b72, 0x38a3db9b,
13405 0x3af3fc4e, 0xbd7f138e, 0x6fd4e381, 0x4f6a71c3, 0x7ad43ae0, 0x489872df,
13406 0xe5bc677e, 0xbc2da8d0, 0xfadb892b, 0x742c933b, 0x50c9c38e, 0xfc4fec67,
13407 0x370c4e14, 0x2ee50780, 0xdb53fdd5, 0xad3f680d, 0x1c6502fe, 0xf754d4c0,
13408 0xae3a6d5c, 0x8fe87b3b, 0x19f1c2be, 0x6a7ec3a9, 0x3b6f7843, 0x893868e3,
13409 0xf5c7d2fd, 0x3f883a9f, 0x92a2244f, 0xb7643c24, 0xc7365179, 0xc418d293,
13410 0x24c2f768, 0xfd19a7ec, 0xc8a5b9ec, 0x3a4a4b0a, 0xb005c0f2, 0x73e1b1f3,
13411 0x25df886d, 0x513fff76, 0x9b6812df, 0xfa9d3a53, 0xbc927010, 0xcb20e62b,
13412 0x7d2510fb, 0xadbfda11, 0xd4c4ff0e, 0xabc07f08, 0xf48d21fc, 0x02af44c3,
13413 0x77a674ae, 0xf7d2a470, 0xd5b798dc, 0x15313651, 0x2ed7f7f9, 0xc269f995,
13414 0x741bc534, 0x635f97f4, 0x7af384de, 0xe26fd129, 0xd4b559c5, 0xe2e3982e,
13415 0x4dd96fbe, 0xa5ff24b5, 0x5fbd6b8e, 0x5c87efc2, 0xc547d666, 0x638bce1a,
13416 0xe3798d17, 0xffc8c991, 0x0c4b69ee, 0x7d7c4b3e, 0x84935fd6, 0x567732fd,
13417 0x34752aa1, 0x6bb5df70, 0xbf978d1b, 0xe572c0de, 0x59e8f249, 0xa5ed8ac4,
13418 0xd33e3869, 0x24c278a1, 0xa93ed32a, 0xa771a34d, 0xcdb421e2, 0x553b8ef4,
13419 0x5423e344, 0x9fea4ccf, 0xd89d4bd5, 0x4e66d19e, 0x66f384bd, 0x6c78a4e7,
13420 0xf099def8, 0xff10ae8f, 0xf249ccce, 0x1714e824, 0xa4ae9f04, 0xa9eac7be,
13421 0x8f1ce9d6, 0x3ad32495, 0x6131e2ba, 0x92d6febf, 0x147045ff, 0x514052fb,
13422 0x91a5dc68, 0xc7e4fb1f, 0xe275293f, 0x0aa1fabc, 0x099cfc90, 0xe091fee7,
13423 0xa89ad99f, 0xf5402027, 0xbd296716, 0x9c516f57, 0x2befb89b, 0x5181f9a1,
13424 0x5c79fd66, 0x769de4f7, 0x6fe507b6, 0x745fb3e5, 0x6cc1cef2, 0x9adfca17,
13425 0x49ed4c56, 0xcbdbf093, 0xc39f2adf, 0x930826e3, 0xebbf2952, 0x1dbdf81f,
13426 0x4d293f25, 0x0c4ff5c7, 0x416eb173, 0x116a953a, 0x83e70d7a, 0x55dfef42,
13427 0x945bf3c1, 0x8f3a3f01, 0xa7e4aff3, 0xff715a14, 0x5109e959, 0x710ce7f3,
13428 0x8de7f545, 0x45aa5818, 0xfcf2b1d8, 0xadfea8ac, 0x88e94a45, 0x69bef988,
13429 0x45fd5109, 0x11d2aea5, 0x2b6ff311, 0x5fd5181f, 0x54565b72, 0xb269a67f,
13430 0xa11b1fd0, 0x7dc854bc, 0x9bfb2979, 0x0a87acd9, 0x1bee629d, 0x8e3f7e38,
13431 0x7f09b617, 0xfe85d0aa, 0xb4a5d214, 0x80fd88ad, 0xc68f7c36, 0x8f52ec8b,
13432 0x3ddda005, 0xfc80ec91, 0xf62fe209, 0x6677658b, 0x6305fa3b, 0xb768ae89,
13433 0x752fe023, 0xfaf1db44, 0xcc27e144, 0x0bad7f01, 0x75a739e9, 0x6557fb1e,
13434 0x6145d5e9, 0xbf467c20, 0x2a370b1f, 0x13779dd1, 0xac6ab61f, 0x890ce737,
13435 0xd4adafd9, 0xf48c7ec1, 0xb7c8e6ef, 0xe0217d8c, 0xc6ff276d, 0xffb18738,
13436 0x4733ceb5, 0xe17ec69d, 0xacd73adf, 0xa9a5859c, 0xcf5fe171, 0x9c2c4cfe,
13437 0x4f32a979, 0xfb15fe81, 0xeca9ad85, 0x7a4fe22f, 0xf0c13f3c, 0xcf51ca7f,
13438 0x9cf522b9, 0x585f4943, 0x673d6d70, 0xff2d7bac, 0x78d758cf, 0xde54ea1f,
13439 0xf7bf78df, 0x7fc4aeb9, 0x27e71bbe, 0xae9e79c5, 0x5cfe7fc4, 0x9a19fcf4,
13440 0x7940e35e, 0x278a0e3e, 0xa93f7840, 0x959ae46b, 0x52d6f59c, 0x5fa1f65b,
13441 0xf670b723, 0xb52d40f9, 0x27833b53, 0xb9fe78ad, 0xf94eaa39, 0xea2fc307,
13442 0x0aa56717, 0x55f8e47f, 0x78e3aedd, 0x53b7407d, 0x88ff51dc, 0xaaf8a76e,
13443 0x28730bde, 0x370ef48e, 0xc438a7ad, 0xf62d879b, 0xfa154def, 0xdf7c857e,
13444 0xfea90f68, 0x857f0415, 0xf251e3ad, 0xe9bf2a49, 0x1c5f10b1, 0xbf2f7f27,
13445 0x5c77bfbf, 0xbf683a0b, 0x1d048fe3, 0x7e7d08be, 0x22defebd, 0xe20ca662,
13446 0xa917c553, 0x096c4a4f, 0x51fd48be, 0xf54574e6, 0x83ff93c7, 0x0f76cdef,
13447 0xae6f7a8c, 0x0f35159e, 0xf21cd8fd, 0x902c6a87, 0x353e91a3, 0xcfc87a25,
13448 0xefe3c58b, 0x0e3df9e5, 0x6051b927, 0x7f55d74e, 0x29e4fb1c, 0x7d8bf811,
13449 0xc4553dbe, 0x9ec88373, 0x52273ae3, 0x556b6e75, 0xd0e6709f, 0x887e267f,
13450 0xbaac63ed, 0x95c3d68c, 0x1e77c4dd, 0xba0ae9bb, 0xe3d2f0e0, 0x686ae7f3,
13451 0x4de33dff, 0xfb1c38ff, 0x215f1ec7, 0xfb4d53fa, 0xfadfb1b2, 0x7fa27df8,
13452 0xd9bc69a3, 0xb819ec83, 0xf9296e7f, 0x7fbee90b, 0x9b75fa27, 0xd4155b1d,
13453 0xa8099503, 0x4cd5b0d7, 0xf7a6140a, 0x2ddbc7c5, 0xc0915f68, 0x175e6cc8,
13454 0x156ec0d2, 0xc26574f1, 0x13d920d0, 0x13abd8ad, 0x0c132ade, 0x9264777a,
13455 0x09da879d, 0xdd9d7151, 0xfbe1ef82, 0x0bff3665, 0xc9c26f82, 0x87a5ea3a,
13456 0x200d960e, 0xea9138fe, 0xede43c64, 0x7d26ea9b, 0x21edf085, 0x01fffefb,
13457 0xf078e6be, 0x3ec59ad5, 0x2579f59d, 0x86f38f64, 0x3e947921, 0x3a6a15fa,
13458 0x21084f3f, 0xeebfb0ef, 0xb1fe5375, 0x90f165c6, 0xf2427eff, 0x35b6f5ef,
13459 0xdaa18f32, 0x29a91f05, 0xb17bf5a6, 0xcff25b7d, 0x6a2fb919, 0x910ba1be,
13460 0x33d9c03f, 0xe8815174, 0x6aa87f13, 0xe1f90f61, 0xe490ff3d, 0x83f9f8a1,
13461 0x183f8144, 0x8fd1f3d2, 0x777bf9f1, 0xf1b679e7, 0x65a78173, 0x0e9aecc1,
13462 0x06b38fec, 0xe3fca06f, 0x47ff34a1, 0xad3b8784, 0x87cc91c1, 0xb449f58e,
13463 0x8e05e28f, 0x0ff88c53, 0x32dd3ce3, 0x705c7fbc, 0x46c1fded, 0x64e96576,
13464 0x7f637781, 0xe88db1c4, 0xf124def1, 0xe10780dc, 0x303e26e8, 0x0785eae0,
13465 0x8f393886, 0xd4ff2200, 0x2e8be325, 0xa7ec8f5a, 0xdc7910ea, 0xff38983f,
13466 0x8ac24552, 0x4de77dfd, 0x791a0f1c, 0xfb1022e0, 0x49b53e4d, 0xf803e065,
13467 0x96a2513b, 0xcb5c695e, 0x7684fdf1, 0xf6fe262d, 0x2a9d3db2, 0xd5a9bfdf,
13468 0xf6a0e25f, 0x5379e8fd, 0x093f1c65, 0x59c52a82, 0xc6623b93, 0x467fe71b,
13469 0x18bd4feb, 0x4d293cfd, 0x3041c3da, 0xb24f3228, 0x974dc641, 0x10a7664f,
13470 0x2b186b1f, 0x8b0f48a8, 0xd4a4c2ae, 0xb0d33d3e, 0x4959e711, 0x2db8da9f,
13471 0x8fbceb38, 0x88dc69f6, 0xf49a3f0c, 0x435b9baa, 0xc2ce0aee, 0x623630bd,
13472 0x0617291f, 0x2fbf2f1e, 0x23ae38f0, 0xb0d397e7, 0x43356e6f, 0xc3c3ef50,
13473 0x0c2f8914, 0xbbfe38df, 0xf6c1d17c, 0x62db626b, 0xead9e495, 0x711e8136,
13474 0x113d04be, 0x6c7d08f4, 0xea8d49cf, 0xb59e92ab, 0xca7ed109, 0x924fb978,
13475 0x7ad45067, 0xd062bf86, 0xacea50f3, 0xc663f256, 0xdfb1563b, 0x3b293292,
13476 0x93a2fd6a, 0x042ef8d1, 0x63e2979f, 0x71c087cf, 0x5ab3c4c0, 0x29327f94,
13477 0x63f983bc, 0xcfd187d2, 0xee8f9ca7, 0xfcc9a697, 0xaedd2c56, 0xfb184f85,
13478 0x7fe969cb, 0xde5d3e3f, 0xcda67c68, 0x8667c689, 0x039f1a2f, 0x6be34596,
13479 0x1f1a3fa0, 0x898d5783, 0x7d61bf1a, 0xd87f5461, 0xcd44a70f, 0x198342cf,
13480 0x75be1fd9, 0x91fcd45e, 0xf545163b, 0x67753f47, 0xe0dcfcd4, 0xbcf1a88a,
13481 0x2efe6bdd, 0x368417fa, 0x3427cd44, 0xfe87be9b, 0x4bfe3637, 0x53ff7ed4,
13482 0xa18daff4, 0xe7d256ff, 0xa85e8813, 0xecfb0b37, 0xa425b919, 0x6f4d5d3f,
13483 0x9b79437c, 0xf9ceb140, 0xf03cc0aa, 0x2fd8e0d4, 0x7a429f54, 0xdaa2306e,
13484 0xd6a37a84, 0x1ec8ab04, 0x71326a3c, 0xf390d31e, 0x3f84d317, 0xc89a62f2,
13485 0x7b78197b, 0xd922ed1a, 0x43ea5541, 0x248efa73, 0x935453f2, 0xfec9da09,
13486 0x1fd61e69, 0xbe101ce7, 0x0755f719, 0x4ac5e701, 0x982d2792, 0xbea8fc88,
13487 0xa9fc72a9, 0x8e83f20e, 0xe4e6a4f6, 0x9f8453ce, 0x4e9b0e2b, 0xfaa6ab7c,
13488 0xf0df6403, 0xa1e7a19c, 0xdef39fbf, 0xf1495846, 0xe65fd196, 0xe699bf5e,
13489 0xe67bbb2f, 0x7b7f8a48, 0xacaddf9f, 0x43a08d2c, 0xc51739e4, 0xa40eabf1,
13490 0xd867fb09, 0xdc7ec313, 0x3a6bd569, 0x538c3ed0, 0xbb407d85, 0xf10d2071,
13491 0x88f281f1, 0x0169f859, 0xed1f9d33, 0xb827df2a, 0x80df21d0, 0xdd9f4a6d,
13492 0xe643bfd2, 0xda3b20fa, 0x00937d6f, 0xf74438a3, 0x1de33df0, 0x955dfe86,
13493 0xecbbf8cb, 0xf97f9e88, 0xaf02e1fe, 0x90f620f7, 0xe22ce70e, 0x17fc063c,
13494 0x42fe5ea5, 0xd24ee5ea, 0xebf911c7, 0x2676bb55, 0x2e7e7f91, 0xc6e3f847,
13495 0x3a49dff3, 0xe54d2eff, 0x9dddaff3, 0x047cfeb0, 0xae422ade, 0xe3557ea8,
13496 0xf991f5c0, 0x39c6b5cd, 0xe7468afc, 0xa8e52758, 0xf923b5a2, 0xfe7f604e,
13497 0xb75c34c3, 0x7b95d772, 0xa6fbd00e, 0x67614c9e, 0xd2dfbc03, 0x82e380f7,
13498 0x28817fa5, 0xcd33b6bf, 0xa67570cc, 0x09613889, 0xbbe44e36, 0xb803e825,
13499 0xda637da8, 0x7c3fe22c, 0xbfb0561e, 0xa4cc15a0, 0xb3fa16bf, 0x33f484cc,
13500 0x3f6779e0, 0x69cfed1e, 0x1b73ef3a, 0xfb7ef8f8, 0x922a7bdd, 0xd6340fd8,
13501 0x8141d633, 0x3def3f20, 0x499cc057, 0x0ae99f79, 0x9fb817fb, 0xeefb9e8d,
13502 0xec99bc1e, 0xbbdfb1b0, 0x0ef4bfe0, 0xf022c5f2, 0xfac6baf0, 0x1134d740,
13503 0x4b03f97a, 0x44ed1d2f, 0xa66d0dbf, 0x3685e530, 0xbdf2b39c, 0xcf75774a,
13504 0x9c230fcb, 0x66f9af1f, 0x7f7082bf, 0xbfe7bcb4, 0x3bf3e00e, 0x4741529e,
13505 0xfdd9f1be, 0xbc447a5a, 0x2bfeee79, 0xafe86f2c, 0x2924ff3c, 0x1eac97a5,
13506 0xd60f9392, 0x322a34bc, 0x9f4e485e, 0xf74e9099, 0xe2d2933b, 0xc6c46fde,
13507 0x3f886ba5, 0xf6757e59, 0x5cbe0d4b, 0xc372f92d, 0xf9f9a30b, 0xf3dea486,
13508 0x2af3fe88, 0x3436c1e7, 0xf1af395b, 0x3587e48e, 0x31337e2f, 0x8f57cf32,
13509 0xa95ba97c, 0xf74b7275, 0x09fa3aa6, 0x1e5e4efb, 0xeaab71cb, 0x1e73a2cf,
13510 0x3269fabe, 0xf9bdf7f5, 0x6e079f2d, 0xbbf83ebb, 0x78917911, 0x79ea4aae,
13511 0xc54af497, 0xf94eab01, 0xb90392ac, 0x7ec2ee27, 0x1fea2b65, 0x5725cf3c,
13512 0x29a7b1c7, 0x00a83b1e, 0xc32ab7e5, 0x2be4ac09, 0xe520941b, 0xee34d6c3,
13513 0xfb1832dd, 0x1616ea6b, 0x2556bb11, 0x59567d0b, 0xb13704af, 0xe9873e1f,
13514 0xa365285c, 0xbfee50e4, 0xd778e3e5, 0x85feb171, 0x3cf6b08d, 0xf55d9dc6,
13515 0x38205e5f, 0x395a35d6, 0x292176cf, 0xfb8c196c, 0x84abda5e, 0xdc9f7a02,
13516 0x1c44b976, 0x98f42ab6, 0xf55df685, 0xe411c2dc, 0x381d7636, 0xb93d216d,
13517 0x59b1e1aa, 0x309179f2, 0x8b9641ff, 0x9595bbb5, 0xd5ac7991, 0xa4420ee8,
13518 0x02f842fd, 0x40eafb13, 0x2cfa494e, 0x435e1a6b, 0xb6bd42e8, 0xf58569ff,
13519 0x97e242da, 0xf9ef0e0f, 0xdf686fdd, 0x923dff83, 0x7d745ff1, 0x805f07f8,
13520 0xb94a8bfd, 0x633c5c0f, 0xb2b2f8a1, 0xde217cc1, 0xba6352fd, 0xcfda1eef,
13521 0xfd638f88, 0x10162dee, 0x10d93ff7, 0x82ec9e7c, 0x1cb2c7a3, 0x9a57f9e1,
13522 0xce68f080, 0xec0acb1e, 0xc8ce48db, 0xc11db85e, 0xbef57178, 0x84f18d74,
13523 0x78fac4b1, 0x3921a0f7, 0x5877a25e, 0xe9579f28, 0x5f10b4ee, 0x173f8657,
13524 0x9f8dfff7, 0x89c6f2cc, 0x574e5fb7, 0x273f33a4, 0x6437de4a, 0x30b9618c,
13525 0x90c3daf7, 0x60bee58d, 0xa9d90f45, 0x3b91070d, 0xbfb7a214, 0xec0ee087,
13526 0x7ce9d04f, 0x9f3e0725, 0xcfb111d8, 0xf47ca51f, 0xf95e59e6, 0xf099ac64,
13527 0xb193efb9, 0xf3df525a, 0xaac74cae, 0x97997978, 0xdedd85d3, 0x18bbec9c,
13528 0x9e09072d, 0xd95bee30, 0x147be764, 0x2d2d8394, 0x70729145, 0xc45daac7,
13529 0x07aa4de7, 0x1b2a0225, 0x79abfa17, 0xc887927e, 0x0cce36a3, 0x4eaa1f10,
13530 0xfc27f31f, 0x289bf715, 0xff508fef, 0x3ff74dcd, 0x39ac724d, 0x1e646560,
13531 0xf1d4d2a4, 0xe88516ab, 0xa26bc3ba, 0xf5810afd, 0x75f0ea96, 0x94553c70,
13532 0x7bdc53a9, 0x202cc274, 0x59bcfd3c, 0x39afbce1, 0x8b35bfd5, 0xe55c7be8,
13533 0x2fa396f9, 0xbbbee804, 0x11141c6b, 0x7f79c67c, 0x2a0c2e3e, 0x00b9b3ae,
13534 0xe6edb43c, 0xc4dd4b83, 0x38cf3fbf, 0xdd867ec6, 0x2bd20213, 0x503fe835,
13535 0x1f9ec7de, 0x093ad30a, 0x1522be39, 0xee9359f7, 0x58b4be64, 0x27ca1efd,
13536 0x36fb203d, 0xe08ab7cd, 0x8a27a5b3, 0xf5c87bf8, 0x48baf9e5, 0x6f74cdfe,
13537 0x4b7ce7e9, 0x69f05997, 0x71c00dd7, 0x4cfcd722, 0xe32f21a6, 0xb83b06cd,
13538 0xd6546aad, 0x44d7da46, 0x79e8dbf0, 0x1ea5c1d7, 0x2d9cdf82, 0x91333df9,
13539 0xff7622e5, 0xa99f888f, 0x62b4c0ce, 0x99e1166b, 0x9ff7a6f0, 0x7be4a1f7,
13540 0xf9a01f03, 0x115e4873, 0xfcbc6f54, 0xf8bd3f92, 0x7375d12c, 0x95c72faa,
13541 0xc2bcd7cf, 0xc6277629, 0xff9c3b95, 0x31b7c901, 0x89f095bf, 0xfcd16fef,
13542 0x51efc236, 0xc5b35f89, 0xfe593ba7, 0xdfed3a7d, 0xf141be7b, 0x3c8df7cf,
13543 0xff6c96df, 0xcfef9ef7, 0x54e67cf2, 0x2f5a37e4, 0x399e7819, 0xfe201839,
13544 0xa2824dab, 0xa8f8f84d, 0xe49b966b, 0x6f91cb6e, 0xd7bc9286, 0x40dc7926,
13545 0x9be6b179, 0x6fdc9196, 0xf3277419, 0xe42f17ff, 0xfb11aa16, 0x7f17a724,
13546 0x2f3be745, 0xe2c5b1cf, 0x7c73a1cf, 0x9c69cf2c, 0xefba496b, 0xf911e92f,
13547 0x7e921826, 0xd7b3fc5d, 0x7194d7b8, 0x61da479e, 0x8f38f38c, 0x5c890dd8,
13548 0xfa57b67f, 0x98f81ae1, 0xd1e0ec7f, 0xc2f2bfd9, 0xa92baa09, 0x36c13169,
13549 0xb5253e3a, 0x92fdee22, 0x0c119355, 0xb2186d7a, 0x8d3435d3, 0x39d89f3b,
13550 0x3ee116af, 0xf8550108, 0x0cf9d169, 0x255e2af0, 0xdaf18f32, 0x63cbeb9a,
13551 0x21afe33c, 0x63cd8d79, 0x969b0e4c, 0x23ae525b, 0xbcdaf19f, 0xd18cf9b8,
13552 0x5171d119, 0xc0ce8641, 0x7f047285, 0x4189c286, 0xf1833791, 0x26eabf94,
13553 0x9fe3855b, 0xde5999e3, 0x9b1cae95, 0x13e0ed0b, 0x3adb6c4f, 0x8470e50d,
13554 0x6bf503c0, 0xf1f5c988, 0xe6f507ec, 0xc31b5e47, 0x3dea387e, 0x4e02f395,
13555 0x1d0c4b09, 0x137fd08b, 0x2a27a541, 0xf63e12bf, 0xdbf1326d, 0x2dfd549e,
13556 0x9b4f4fa2, 0x092875ca, 0x15c5875a, 0x900eee47, 0xe076807f, 0x3e84339f,
13557 0x7b8a35b7, 0x65ee9b4b, 0x74e0993d, 0xe423538e, 0xd8432f24, 0x1f638aa5,
13558 0x2ca0b50c, 0x4c9d325d, 0xd7f5c7ce, 0xa64fafed, 0x73dade34, 0xd2a44f6f,
13559 0xff353b9f, 0xff3c0c82, 0x51aeca17, 0xb75bf236, 0x7e12c706, 0xae6ce142,
13560 0x20d02ccf, 0x87f615a0, 0x3c29eaa7, 0x9504ba14, 0x5b71a54f, 0x257e34d0,
13561 0x58555ff1, 0x30f6979c, 0x6dcc8aa3, 0xd5dfb854, 0xeb4a9358, 0x79b6fd55,
13562 0x97afe910, 0xf39f8432, 0xf13cd5e2, 0xcd1a06be, 0x25c33fbf, 0xa2682a99,
13563 0x324be37c, 0x5575d94f, 0xfec679e5, 0x55338d05, 0x7e41f227, 0xce11c778,
13564 0x7559368b, 0x73c26fa2, 0x94d1f020, 0xd5687ec0, 0x7640d9e1, 0x1e05dbaf,
13565 0x24f7c705, 0xfc447cf6, 0xd56cd3d0, 0xc1373ee9, 0x715203b9, 0x1eb23dfd,
13566 0xb619172c, 0xdcf7d1de, 0xe9a12fd8, 0x24439497, 0xe57be0be, 0x4c076d04,
13567 0x3be24477, 0xc959d849, 0xc3127b57, 0xe967ba26, 0x59efdf41, 0x4e0fab86,
13568 0x380d7de0, 0xec0ed973, 0xf85cf4b1, 0xe5c33a71, 0x05c83e24, 0x8d342701,
13569 0x26af49d6, 0x8e7cbd38, 0x09eea704, 0xaae1fd28, 0x208e8b1a, 0xa4a3cfca,
13570 0xc9f4a6cc, 0x5f625577, 0xb0b286df, 0xfca41b27, 0x9d2b6eb7, 0x8547d916,
13571 0xfdefa933, 0xf8e278ff, 0x9c21dab6, 0x48a80bff, 0x49b63b7f, 0x214e74a9,
13572 0xde122857, 0x0781428c, 0xdbb40baa, 0x7cef78c4, 0x2a4773e4, 0xe79e7fdb,
13573 0xf3ed3ab1, 0xf85e58b2, 0x0ff0d17e, 0x17c2521f, 0x76d2466e, 0xc94be63e,
13574 0x9a7573c7, 0x875c3c8e, 0x3cb8fef3, 0xfd8c2a34, 0x79ffab16, 0x3f57cfe2,
13575 0x80bdb15c, 0xb31eeff4, 0x4ff49ca7, 0xf671e047, 0xeb345fcb, 0x0ee422db,
13576 0x7264f486, 0x3ecc61dd, 0x3d36e755, 0xf776fe4e, 0xfba74541, 0xcf736ef4,
13577 0xb2bb8250, 0xd50b33e9, 0xfc1d5663, 0xb2ebfd84, 0xda5eff4c, 0x3563526f,
13578 0x864dcfd7, 0x873f5c1d, 0x20eb917a, 0x4fa16e43, 0xf51d9f2e, 0x1d04756c,
13579 0x06f293de, 0x6461fe3d, 0xbca49abf, 0x1c38a61e, 0x772dfddb, 0xf7f5a70c,
13580 0xf180fccb, 0x191c355e, 0x04df784c, 0x3c6b71af, 0x5c6a0eef, 0xaef79cbf,
13581 0xc46f5eed, 0xfe52d3fc, 0x56fdcb4f, 0x20dffa67, 0x7cb6d778, 0xc2d2a16a,
13582 0xa1a1f3aa, 0x3486f714, 0x4719c53d, 0x6fcaf48f, 0x69553c8c, 0x5f9a163d,
13583 0xaf581175, 0x536bbd20, 0xbd2f7e90, 0x396638db, 0x348fdf3e, 0x8b3b2149,
13584 0xe3d92af1, 0x60df66fd, 0xcefd5f9a, 0x8f4963d7, 0xf020241d, 0xaf375f7f,
13585 0x4378461d, 0x244e2ffe, 0xac0bdb39, 0xcd390cd7, 0xf7c53927, 0x8bff89f3,
13586 0x7acb9fa8, 0x7da58f79, 0x7ee5cb1e, 0x225c9013, 0x203cb3ff, 0xdfc93bff,
13587 0x3ca277cb, 0x59a3fbf0, 0x9bb4f7ce, 0xa337ecbc, 0xfdc91f5e, 0xdfd4c5e2,
13588 0x64ea5ed3, 0x843aa739, 0xf0d79242, 0x04275e11, 0x45f2d740, 0xfd22f80a,
13589 0x648cbcff, 0xf1242f71, 0xd8433939, 0x9e8e5083, 0xd873c1e2, 0x3e4a3555,
13590 0xe8a5ec22, 0x9a5a7b4b, 0xbf6d97f9, 0x26524698, 0xda5384ed, 0xd678ff49,
13591 0x6d28fffb, 0xa7d786d5, 0x73c3a82c, 0xf2a5386e, 0xf71961f8, 0x1c9f2585,
13592 0xb21af991, 0xa89a7a1b, 0x13e7a61f, 0xe5f54fb0, 0x4bebbd13, 0x9a4d1cc8,
13593 0xb528e3b3, 0x12a17c53, 0x2da6db72, 0x166a3f6b, 0xfc479e62, 0x6e6470d7,
13594 0x75e3d51e, 0x0242b39f, 0x6df0d882, 0x222f47cf, 0x8c3e1e1e, 0xa7638ff8,
13595 0x7fcc38f0, 0x060d7fe8, 0x6ef1ff77, 0x4091ea45, 0xc7e27cd2, 0xafb506ae,
13596 0x2254808f, 0xfddf5363, 0x007b7da4, 0x677fe76d, 0x2267077a, 0xf00ccf3e,
13597 0xfa7ddb73, 0xcb124cdb, 0x5c4567fd, 0xe6f160df, 0x6434ff11, 0x871ba863,
13598 0x2299ad4f, 0x856453ef, 0x379cf7b8, 0x18390a67, 0x0aed8015, 0x33aaebc7,
13599 0xd4bf7488, 0xe82d7aa0, 0xc0845d2f, 0x6fa4a992, 0x01f75e64, 0xfc5e3f90,
13600 0x283cfa45, 0xdf900fbb, 0xc1eb7682, 0x11d6c45f, 0x316fd978, 0xeb0058f2,
13601 0x2b5fc44d, 0x0ff8149b, 0x67aac5c4, 0x93afe7a2, 0x1babf275, 0x8c1b1d77,
13602 0x5cf35d74, 0x2df938cc, 0xe211ff7c, 0x5d5d7878, 0xcdc33d74, 0x197fd299,
13603 0x7fc9c30e, 0x3d62be41, 0xd5a0d661, 0x60ac7c8a, 0xf6224314, 0x0be04992,
13604 0x67cb2bf5, 0x8a6f61be, 0xb9ea5e85, 0x94a75c04, 0x94743bbb, 0xd4a681ea,
13605 0x8f687965, 0x9f189a29, 0xee2598d2, 0x4aa0b4a7, 0xbc930c75, 0x77ec59fe,
13606 0xa967bc07, 0xd49564de, 0x5fc4e097, 0xd3c8fbca, 0xddfe92af, 0x9d6c60ea,
13607 0x9553c0a8, 0x8219379c, 0xcaefb435, 0x69dea2dd, 0xf9e8eeed, 0xeb4f1255,
13608 0x8c7d3a9e, 0xa11585d2, 0xa7897198, 0x3a98c6aa, 0xdc38b116, 0xadef299f,
13609 0xf5fb7d64, 0xd1fc5bd6, 0xb78dfc2c, 0xf8c63ae5, 0xef914ce6, 0x1063c4ad,
13610 0xd505d77d, 0x2ad1f120, 0xfc2c9025, 0xc72c705e, 0xb067ddf3, 0xbdcfac81,
13611 0x3ee9e25f, 0x7e7c3fc9, 0x19e2bf7c, 0xfdc57df1, 0x7f868b3f, 0x832cf80d,
13612 0x0d83f9f1, 0xde50b03f, 0x56df9631, 0xffd999d5, 0x13f1235d, 0x7a6b5fcb,
13613 0x858767f9, 0x7f2c5bec, 0x6b95fa55, 0xf6fc2fc0, 0x0df85bff, 0xcb91af3a,
13614 0x398735ac, 0x09f6b53f, 0xabf943c5, 0xf7ab9d6b, 0x7f7cf23c, 0x359eb9ef,
13615 0xc6063de8, 0xa4e7bd30, 0x63bd175d, 0x96bdedfd, 0xe726bcde, 0x66b72f05,
13616 0xe0dd3e73, 0x6675d8ab, 0xf67dbf49, 0xbd7fc253, 0x276258d4, 0xa4fba3ff,
13617 0x9ce8a3c9, 0xc02e4caf, 0x566f8ff3, 0xee91fc81, 0x033be1a6, 0xa9e17f08,
13618 0x5f94c5a2, 0xed0a7f1f, 0xb707dd13, 0x0257fd16, 0xd27b07df, 0xb667ee48,
13619 0xbdfb488d, 0xfb61d783, 0x70b27dde, 0xe9e93967, 0xb445a593, 0x54e382ae,
13620 0xed285e9f, 0x42c9f554, 0xbd84477b, 0xc8a64dfa, 0xff716fcf, 0x1b8a51fe,
13621 0x7b35ef66, 0xdb323f28, 0x8094dfec, 0xa0be15f0, 0xb771aa78, 0x9e47ed63,
13622 0xbe5175a4, 0xf38acd28, 0x8d08e9fe, 0x1851ed57, 0xb2a6eefe, 0x3f643dbc,
13623 0xec87aa83, 0x7dd37762, 0x1f920ff9, 0xfe40fcd4, 0x1dfb117d, 0x66fa154b,
13624 0xb6660df6, 0xec839dd7, 0xbca72ebf, 0xeb1777a8, 0xfb43ce8d, 0xc37dfc2c,
13625 0x78dc051e, 0xa3ee63ce, 0x3a1e132f, 0x50b69c0f, 0x70d25010, 0x4711d2da,
13626 0x25ed1b7f, 0x9cc2f30c, 0xe161ddaf, 0x7ffdcdfa, 0x2b79d0b0, 0xf384fb9f,
13627 0x7e286b6f, 0x19ef3f20, 0x3a77bf95, 0x85aafcda, 0x4eb2b4f8, 0x91590181,
13628 0x271e66e3, 0xcffd4afd, 0x369e84ea, 0xe4857ff8, 0x0dff8377, 0xf5215879,
13629 0xe35b7dda, 0xffa1bbf3, 0x96ef041e, 0x03deb841, 0x0eb9cb75, 0xd11d81e9,
13630 0xfc5257f3, 0x17cd237a, 0xa9f2befc, 0xbdd5f1e8, 0xfd601e7c, 0xbf47ab1f,
13631 0x2e7ff433, 0x5f9f12e4, 0xa618af0e, 0x7d7d3ca1, 0x8830cd7a, 0x293caf93,
13632 0x6ec306fd, 0xd89b0e5f, 0xebcec5ee, 0x2162bc6a, 0xfad55b7b, 0x6773f627,
13633 0xf4c97d35, 0xe16a6f28, 0xc05bd97a, 0x79f08ebf, 0x49dd934b, 0x877976fe,
13634 0x9af303d0, 0x42a0c1ac, 0xa25aa1e3, 0xf161f773, 0x90e049bd, 0x4816fec2,
13635 0xe252b8bd, 0xe3c4a575, 0x06e38c4a, 0x8c8c7d53, 0xbc652be3, 0xd7673abe,
13636 0xa9292a31, 0xdaebe394, 0x1e13268e, 0x5bd081e7, 0x6f4242f3, 0xec31f419,
13637 0x40beac50, 0xd10f770b, 0x95936d77, 0x4be7d6eb, 0x0ebf35bd, 0x5fd296f5,
13638 0xb40f747f, 0x7ef1fc8b, 0xddac7701, 0x9e886cad, 0xfc201aef, 0x7fd2cbd8,
13639 0x4d101c2e, 0xb01ef297, 0x9e7f7e53, 0xfc827aae, 0xfb46bb56, 0x7e458eb7,
13640 0xf55bf5c3, 0xeaf129e1, 0x4df68cb5, 0xfd181719, 0xc3679405, 0x0ee721f9,
13641 0xffdc6447, 0x7f84039f, 0x1ab266b3, 0xc446ba20, 0xb30a0b49, 0x7349c6e2,
13642 0x8637f409, 0x71b3f7dc, 0x77927191, 0xb7e228d7, 0x2cef757f, 0xaaa6baa7,
13643 0xba2fa13a, 0x29bae126, 0xfb03f7e4, 0xd67555d1, 0x5533c520, 0x7dfc2fc8,
13644 0xc909f11a, 0x46529363, 0xc671827c, 0x42feb4ed, 0xf3c4eaba, 0xfb446c2f,
13645 0x2c2fcb8e, 0xabf992fd, 0x3738846d, 0xbc406de2, 0x3788c3b8, 0xbf0aaf2a,
13646 0xa95e78d6, 0x51dc7075, 0xb5ea24d9, 0x337c8e1b, 0xede10b34, 0xd0f3fe6e,
13647 0x3e4f54e5, 0x86e7d840, 0x54a7d0e2, 0x1ef5f457, 0xb5ff5c5b, 0xb52bff57,
13648 0xe6950f2c, 0x6bf64c8e, 0x791fa20e, 0xb7d1ea13, 0xa538e0bf, 0xbdc248e1,
13649 0x5aebcf94, 0xfce61fe1, 0xc3553a1e, 0x3783f626, 0xe4b72d41, 0x8dfa451f,
13650 0x4ea29d2b, 0x3f6941e9, 0xf208ffa9, 0x773883f5, 0xf97f6146, 0x8549f437,
13651 0x10d5ebe4, 0xe95532d8, 0xa42a07af, 0xdfcdacdc, 0xf6ae85b5, 0x0aa7fd63,
13652 0x31184f29, 0xf58cbdb0, 0x8633fe9f, 0x4edfab5f, 0xbbb8ff64, 0xae52754d,
13653 0xabfbf119, 0x6227e441, 0x271d905c, 0xe485fb5f, 0x7f794ecf, 0x65493d5c,
13654 0x8b2699fc, 0x10b7f0d6, 0xdd37cc8f, 0xb2411da7, 0x5f87796f, 0x583e26cd,
13655 0xdefa3bbb, 0xe7e8e889, 0xc8a0b1ba, 0x7cec8547, 0xbf8c6517, 0x31d5f874,
13656 0x6fd56fc4, 0xd04a3b7f, 0x96519be7, 0x67c36bf4, 0xe2228ab4, 0xe2229366,
13657 0x475afde6, 0x556bc532, 0x645f5507, 0xef41bf3d, 0x813ca597, 0xf503f226,
13658 0xabe67403, 0x1fc126ea, 0xe2d166a6, 0x7e444bfe, 0xf7fbccc8, 0xbe462f1b,
13659 0x067b1ef9, 0x40f21704, 0xf987b995, 0x89b4eaaf, 0x7d3aa9e1, 0xc4447339,
13660 0x775a017b, 0xeabfe900, 0xc4fac075, 0xe76fa40e, 0xd891f7d3, 0x027eff9f,
13661 0xb2c761fb, 0xfb8b97b7, 0x7f48152f, 0x9af6fc3d, 0x60f691d1, 0x2f7100e2,
13662 0x3707840e, 0x10bf3f79, 0x6c3c4bfb, 0xbf324582, 0xaf79f820, 0x2e309b8c,
13663 0x9c40737b, 0xfd7aecb8, 0x2b66eae9, 0xeab9fe50, 0x19d72b03, 0x92bcdd7d,
13664 0xeab87ee3, 0x06fa4d1f, 0xa91bfefc, 0xcaf0f87d, 0xebfcf4d1, 0xe46fabc3,
13665 0x29b2a97c, 0x2011cf2a, 0x5fe4dcf8, 0x5deef57d, 0x69b67fe4, 0xb6149fec,
13666 0xee977d9d, 0x9835f769, 0x8ad1dbf9, 0x067613fd, 0x2aafc892, 0x11df4f9c,
13667 0x98d56bed, 0x32dfd0ff, 0xfb3b2bfc, 0xd88aa757, 0x7c75c2bf, 0x4e8b6e41,
13668 0xa7bad394, 0x9a688b8a, 0xd7a4e382, 0xe57f93c6, 0x0cb7f3e8, 0xf8933e78,
13669 0xe0496eec, 0xd9028bbc, 0x4460cf82, 0x1aebdc14, 0x64ff675e, 0xf51aa35d,
13670 0xdef188fd, 0x7b88065f, 0x3e0cef87, 0xe65e290b, 0x5da2bda3, 0x932fb8d7,
13671 0x1cd6b1ce, 0xaea93e62, 0x3df18b33, 0x07ba05a2, 0x411fc09a, 0x273f0807,
13672 0x65d211e8, 0x8438259e, 0xbdbdfafc, 0x2eb28af7, 0xf5ea2824, 0xf3875a6a,
13673 0x5b974c77, 0xb3c7a5f7, 0x9ee92743, 0xe3be1d07, 0x8a1e2259, 0x5badff1d,
13674 0x9f8e41e4, 0xf8f1fa13, 0x78e8ff4c, 0xc500327a, 0x48a05f22, 0xef8835fa,
13675 0x35e763ed, 0xfe787ad3, 0xc70243dd, 0xf73b8f89, 0x63fdf026, 0x75e44ba7,
13676 0x34dbea4b, 0x6d661efa, 0xec813283, 0xf79cdad2, 0xec197bf8, 0x5c9e9117,
13677 0xf7c83e1b, 0x7b7515af, 0xc0e37967, 0xec2dddb1, 0x9df93cc3, 0x7cf8ec72,
13678 0x3c067e39, 0xdb9e3219, 0x673ef74e, 0xf14ecdca, 0xeef89bdd, 0xd7a956f5,
13679 0x6662df17, 0xe80cea3f, 0x227f7166, 0x481639ee, 0xd4ab7dbd, 0x63dfb1f7,
13680 0x76fdfa1b, 0x67c2ceb9, 0x73dd3360, 0x7d9f7ec4, 0x170ff4bb, 0xefd79781,
13681 0xf4bd5df7, 0xfeff6313, 0xea5b8942, 0x8a3051f5, 0xed087af4, 0xe45bd70d,
13682 0x9eddb026, 0xae32305f, 0xa9df41df, 0x753bf2eb, 0x57fa0d6a, 0xf6c7bee7,
13683 0xb9cb78f0, 0x86fbf997, 0x1d900973, 0xcfad9ee7, 0xe47a1a1e, 0x79774136,
13684 0x14e151ef, 0xbff41a30, 0x645a1184, 0xffa0cd7e, 0xff0e9283, 0x394575c7,
13685 0x63e645a0, 0x07fea90e, 0x475419dd, 0x38fec9dd, 0x21ed809e, 0x3ca86b9e,
13686 0x846b50d7, 0x7034bb9d, 0xee3e5c79, 0x406a5f3b, 0x6e7493d8, 0xecad725b,
13687 0x14845637, 0x22b0eefe, 0x9b7fa20c, 0x51caf9c2, 0xbf5c2d0d, 0xf154a4b1,
13688 0x3c5a8578, 0x7c19f04b, 0xfc26c0b4, 0x7a5f8303, 0x88f925f1, 0xb85fc9c6,
13689 0xb10bfa55, 0xda1a34fc, 0x4bfad167, 0xea878abd, 0x47c9af36, 0x4ebdc6cb,
13690 0xf8b5eee1, 0x4cd2f908, 0x9f96317a, 0x1ffb735e, 0xb775fc25, 0x80525e5f,
13691 0xfdcf1feb, 0x4ff1286c, 0xe8e435e5, 0xddbf4945, 0xae71c08e, 0x7597a963,
13692 0x8db9f504, 0x5697841d, 0xd3b2bf60, 0x8365bed5, 0x8eb9b7f0, 0xc09c22a0,
13693 0x4d15a5f5, 0xad6efe76, 0x713aa1a2, 0x26e3e90c, 0x7ec763d5, 0x52e9c379,
13694 0x179423ca, 0x2a973a89, 0xabbba8bb, 0xbbba8bb2, 0xe7fee9b9, 0xeff813dc,
13695 0x11d74403, 0xb57e3a58, 0x3ef87be1, 0x9335df56, 0x7fe1370f, 0x4b350f4e,
13696 0xbb686cfc, 0xc4863992, 0x887fdd34, 0xfd7eeee0, 0x8a7d0b45, 0xd5e63551,
13697 0xd6825459, 0xde79d6ec, 0xb52d752d, 0xe0365694, 0x429dbbb7, 0x43839aef,
13698 0xbfcd6fd8, 0xea9b7abe, 0x258c6f83, 0xd2d5d5fb, 0xc112d636, 0x501b9def,
13699 0x63a1c76f, 0x1ca49835, 0xca2adc6b, 0x0947e922, 0x3e6aaeb9, 0x8bf9499a,
13700 0x7ce7924e, 0x1e49df6a, 0xdec56d81, 0xc923c933, 0x5a2fd99f, 0x4d4bbd63,
13701 0xad03cf2a, 0x49edd463, 0x666df091, 0xc4852ef8, 0xa31d003a, 0x8e441716,
13702 0xd6bffcd7, 0x3e851707, 0x07d288e8, 0x16429e06, 0x0388efe0, 0xa75cad87,
13703 0xae3ff740, 0x036a3a08, 0xc26efd05, 0x76e48a60, 0x0f7bdd32, 0x834f9727,
13704 0x41afa9bb, 0xfba54b58, 0xea2ab0e9, 0xbeb086fb, 0xbff7289f, 0x50b70b49,
13705 0x7964f03d, 0xda053a5f, 0xe80cde79, 0x4e0bd6e1, 0x18ba0efe, 0xb24edc3c,
13706 0x5a53e785, 0xe2143f2b, 0x99c27bef, 0x4d82eb9a, 0x871d6f7e, 0xd3787dde,
13707 0x0f8182e0, 0x44d5ee95, 0x79ec533d, 0xfc28186e, 0x42bc9bbc, 0x414b910f,
13708 0x2093c0f5, 0xd3f9f7c4, 0xebde43a1, 0x54c73fc7, 0x1ee90b8c, 0x31ba3a6f,
13709 0x208f8c89, 0xe7469fcf, 0xa79de351, 0x19933e63, 0x9f049d4a, 0x7d34ce12,
13710 0x73febf67, 0x28355374, 0xebefbde5, 0x5171fae9, 0xa7a83ddf, 0xa9f78de9,
13711 0x7af1597e, 0x43d9beb9, 0xfc538ddf, 0x7b3ad613, 0xc03659f5, 0x722b8198,
13712 0xfbe84e06, 0xc0fc046e, 0xdfb12475, 0x277c448d, 0xfe231702, 0xe751922e,
13713 0x48b83bbb, 0x65913aa7, 0x7bfe36e9, 0xa1b6853b, 0x79af29e3, 0x339fcd28,
13714 0x7dea8330, 0x62f246eb, 0xfb02705a, 0xecbf92b9, 0x78449de0, 0xf7c6bc50,
13715 0xd37cc02b, 0x320bf7fb, 0xb227bf81, 0x3e77c55b, 0x6d1f91db, 0x3a052ca9,
13716 0x23c35fd5, 0xd3f93a25, 0x0f365c5b, 0x256c477d, 0x707dedb8, 0x1d44d8d7,
13717 0xd44d8d48, 0x72f51879, 0xb1ad78b1, 0x8f4e7919, 0x98f1fd8d, 0x627e90ef,
13718 0x7842dff3, 0x98a9287a, 0xde530eff, 0x5cdcd32b, 0x7fbf250f, 0xf03049aa,
13719 0xe7e36c50, 0xec94f57d, 0x3d52d667, 0x9359c237, 0x78ff5c01, 0x0a546934,
13720 0xb4d565d5, 0x9aee7a89, 0x77eb008c, 0x7d615fb3, 0xd25ad35f, 0xb2e2f64a,
13721 0xdd75c2c3, 0x07512e35, 0xd080c81f, 0x3d347af3, 0xa0f419a6, 0x8f594bfb,
13722 0x5c65d064, 0x7bd0943a, 0x91dec2e3, 0xdb429384, 0xfdd037cb, 0x7470b8c2,
13723 0x69d2197d, 0xf7a9d135, 0xc9cd1e3b, 0x7d061ef5, 0xd9987190, 0x06ee929d,
13724 0xdfc69cbd, 0x516af023, 0xa0c08f7f, 0x4144f6e3, 0xe055332f, 0x7577e70c,
13725 0x4e96375a, 0x14e11bff, 0x4bb0bac1, 0x00004bb0
13726};
13727
13728static const u32 xsem_int_table_data_e1h[] = {
13729 0x00088b1f, 0x00000000, 0x93cbff00, 0x51f86065, 0xd2f9c08f, 0xbcde0c0c,
13730 0xc4b462a8, 0x0c0c5c0c, 0x0e5c4041, 0x7b401ac4, 0xdbe9016f, 0xcdce1c40,
13731 0xc40110c0, 0x1ff881fb, 0x6207ff10, 0x04d6200d, 0x79405fe2, 0x5b1ba845,
13732 0xda181898, 0x8803b880, 0x875880bb, 0x97418191, 0x93fb7891, 0xde181984,
13733 0x7af82389, 0xcd0c0c12, 0xfff3f452, 0x5631c360, 0x29efb5f4, 0x174e3ed0,
13734 0x19c73f04, 0x505c2498, 0xe0bb70d5, 0x4d078337, 0xcf8d179e, 0x9e7f4787,
13735 0x5cbf2a21, 0x4d3f950b, 0x23e18187, 0x2d0a9a92, 0xc7416efc, 0x0c0c468a,
13736 0xabc4464a, 0xca8c60df, 0xd081300f, 0xb1adf900, 0x0003a809, 0x00000000
13737};
13738
13739static const u32 xsem_pram_data_e1h[] = {
13740 0x00088b1f, 0x00000000, 0x7de5ff00, 0xd5547c09, 0xf37df0f5, 0x66499996,
13741 0x0d909326, 0x8a027108, 0x081380a8, 0xc3b44069, 0x8e22a222, 0x260dc55b,
13742 0x1037d902, 0xfdaff0fd, 0x2d361032, 0x4682d0d6, 0xa0c0748b, 0x0d0482c1,
13743 0x00e02418, 0xd52ff82e, 0x5b7bbfd8, 0x16c34a0c, 0x7e1b8092, 0xce7fe5b5,
13744 0xef25f7b9, 0x6d80264d, 0xfdfb5fbf, 0xe6f169bf, 0x5ddf7bbc, 0x3dcf76ce,
13745 0x14fbdcf7, 0xf89628db, 0xe0cec663, 0x2cabd20f, 0xdd51b18c, 0xa0db6ce9,
13746 0x74fa87a1, 0x6559ffe7, 0x4287ead3, 0x6ed0ab1e, 0x9cfdd61e, 0x7e5485b1,
13747 0x386b8c40, 0xf4d31cbb, 0x8f0e1b10, 0x9616c96d, 0x6e7dd8cc, 0x0901bf46,
13748 0x912974be, 0x5615ceb1, 0x780cbaf7, 0x085c7aae, 0x20c8f7df, 0xf7c25077,
13749 0x1652c93c, 0xbaa23fe4, 0xbecc01d7, 0x6cb3233f, 0xe0da66c6, 0xc3fc0f6f,
13750 0x7cbea07a, 0x63106cac, 0x059969ea, 0x77ea7fa0, 0x3403a512, 0x00efc336,
13751 0x6c2df978, 0xfeeed0dc, 0xecfd13b9, 0xe8b78073, 0x5b7e89f9, 0x097f90c0,
13752 0xecffa893, 0x5faa4afb, 0xf2f16f6f, 0x073e6c5b, 0x8d941636, 0x7f963bcf,
13753 0x8be7c2e9, 0x7aa16e9b, 0xd82c5318, 0xc8b772cf, 0x635cfc4f, 0xbbfaee96,
13754 0x76a214f1, 0x04d3d874, 0x3188feed, 0xb6bfb5e9, 0xd543c032, 0x0563d556,
13755 0xaad84cbc, 0x700c7f86, 0x84295ae9, 0x9d9765b0, 0xfb4bc031, 0x9d870e6a,
13756 0x9fcb0f9a, 0xaa1805a8, 0xff36b728, 0xdbc40afc, 0xa3ad9956, 0xf784fc66,
13757 0x3bc71b56, 0x9e70e46b, 0x6ba5839d, 0xf7c74f77, 0xccad1a0b, 0x6e95f50e,
13758 0x057a9fcf, 0x54fbf9c0, 0xd74a4586, 0x01fad02f, 0xea92185c, 0xcf18ee11,
13759 0x36e0fda8, 0xca1eb439, 0x939ab877, 0x1ff1836f, 0xcf31b4ab, 0x676fd0c5,
13760 0x80adf273, 0x96d0a287, 0xd15ef849, 0x2c8bc946, 0xfaeb6134, 0x7bc2fb37,
13761 0xaf241ba5, 0x5c52f015, 0x433ccb17, 0xc0ce1f78, 0x3906d6bf, 0x9fc863fc,
13762 0x1964e30b, 0x49ead748, 0x57f6c64c, 0x37671e68, 0x0e558e9e, 0x376b1e61,
13763 0xda01ba5c, 0x5ecaf781, 0xc438bc94, 0x200b0b32, 0xb76fb65f, 0x81d67b4f,
13764 0x0da05be3, 0x96b8e276, 0x3f2e586a, 0xeecdbb94, 0xd5adfec1, 0xd17e4126,
13765 0x9e5ab5ea, 0x75c5fe81, 0xcd8f3197, 0x419aafd0, 0x88fe4629, 0x9b018f4c,
13766 0xc453fb18, 0xf91eaf98, 0x37690944, 0x9fa2e419, 0x2ef44f14, 0xf54d93ae,
13767 0x4b192603, 0x007eff82, 0x82be027f, 0x57849d3b, 0x05736e9d, 0x3b74e91f,
13768 0x2987e425, 0xfac6d99d, 0x48e7f4f5, 0x754fe807, 0x5fd29ba5, 0xba52a654,
13769 0xf443d2b2, 0x07f10279, 0x6fd172e9, 0x4e3658d7, 0x3e5d7681, 0x4b3146e6,
13770 0xa71be298, 0xe7e09c02, 0x01ddf270, 0xf19673c9, 0x6a13e9eb, 0x72651720,
13771 0x53e49b15, 0x05ac02fa, 0xb42f30e6, 0x9be8dcaf, 0xd7b19a38, 0x1c71e059,
13772 0x502922ff, 0xac657480, 0x740fd53e, 0x1e812259, 0xc52d7c01, 0x961e0241,
13773 0x067e05f4, 0x4f713d3a, 0x24b2b3f6, 0x70889ac6, 0x668f73de, 0x54353d50,
13774 0x0cf50a8f, 0xc93d773a, 0xf54c73d3, 0xd02f4f24, 0xf54b59eb, 0x9eafcfd8,
13775 0x318fa627, 0x917a67f7, 0x580bcf5e, 0xfcf3916e, 0x633c95c6, 0x333fb9ac,
13776 0x949ea84a, 0x002cbdbb, 0x7f9d65e5, 0x864fb358, 0xf8c6c77c, 0x23328f11,
13777 0x86df8d1f, 0xaa4139f5, 0x97147c8c, 0xa7926313, 0x09825f78, 0x9fb933ee,
13778 0x7f927ca9, 0x653f29a0, 0x7c11a5da, 0x5eb770e9, 0x54e86026, 0xfea35e38,
13779 0xd234fd6a, 0xd9fae33b, 0x9fa07e08, 0x03cef483, 0xbb170263, 0x57d8dfa1,
13780 0x407ff406, 0x8eee5c0b, 0x2e3037c2, 0xea62a589, 0x991a60b1, 0x78e554bf,
13781 0xfbffdf1b, 0xfde107c1, 0xe0e74b72, 0x4bff8078, 0x8e21f71a, 0x4ca88ffb,
13782 0x32316e81, 0x3172c0ab, 0x6ffa4656, 0xb3f64669, 0x975e0341, 0x917e000d,
13783 0xa65debba, 0x1f915206, 0x4115825b, 0x3025cfe4, 0x8c7eb041, 0xe115641d,
13784 0xfef085e0, 0xc454bc80, 0xfd0355bf, 0x835f6c61, 0xfb5287f6, 0x5b7ed8ad,
13785 0x075bed2f, 0xb7da98e6, 0xda9817a5, 0x3ed069b7, 0x706747c8, 0xf01f68be,
13786 0x93b18637, 0x6fb53e6c, 0xf6a02f4d, 0xc0ac6a97, 0x574c7ed4, 0xbb60dffb,
13787 0x49fb63df, 0x703fc651, 0xe9fc798c, 0x6bf1e645, 0x416cfc7c, 0x431fb450,
13788 0x20a497e3, 0x117a7f1f, 0xd795bf1f, 0xabbed5db, 0x049aff0b, 0x5ea43aed,
13789 0xac683fc6, 0x9417fc79, 0xe56fc798, 0x2c17bbed, 0xa83bed13, 0x196978fd,
13790 0x2505ff1f, 0x0d66bed4, 0xb48f9178, 0x211531fe, 0x40d34f9c, 0x07485280,
13791 0x921d28fa, 0x93e818c0, 0x8481b2df, 0x38620787, 0x03137ddf, 0xd6e8e6fc,
13792 0x12042ca7, 0x9970f308, 0x8de2e9e0, 0x3f3e34e3, 0x9f5e6907, 0xab3aba2d,
13793 0x8cf9a651, 0x2e86b4ad, 0x37b6fe82, 0x678441ca, 0x2432bcad, 0x760a7cd3,
13794 0xb0a7be02, 0xf3ff3e30, 0x8ceb61aa, 0x674c8ae3, 0x2dadab57, 0xd2eab906,
13795 0x90d9e3ef, 0x055fe80a, 0x6ea8c132, 0x34f415b8, 0x39fc3d03, 0x0f4c63e8,
13796 0x392edcab, 0x5d9c7a04, 0x059b946c, 0xb2092edc, 0xff4087f7, 0xdffa227f,
13797 0xb77c70aa, 0x884293ce, 0xcc566fff, 0xcd9f50d1, 0xa4058eae, 0x5ca3f777,
13798 0xbb73a9d0, 0x14f64435, 0x9f88074c, 0x191449db, 0x1baed3fb, 0x305c94de,
13799 0x31f4d63f, 0x0b3777bd, 0xf2854e2d, 0x0ee79733, 0xeff8c370, 0x211d669a,
13800 0x7cc4fce3, 0xc7242dfd, 0x8725bfac, 0x2b0d69b1, 0xdc00fed4, 0xbcfd4d3e,
13801 0x1dfef0c5, 0x577c3301, 0x576e1981, 0xed05aa43, 0xad894299, 0xa9ef7a85,
13802 0xedebe730, 0x3812964c, 0x3f7b455d, 0x85f41c01, 0x3a60f747, 0x89bb1f02,
13803 0xfcddd3ae, 0xe53fbd5d, 0x4c2ca90f, 0x124b71f3, 0x5127fa23, 0x8f9b80b9,
13804 0xd3bfb23b, 0x0fcf9b55, 0xa0fe99fd, 0xec8cf84c, 0x58aecb7f, 0xd9ec059f,
13805 0x552f9a96, 0xf1c8c164, 0xc67ff644, 0xb8f1c8fc, 0x721f9c35, 0x39cf9183,
13806 0x53f2449f, 0x5fb8e379, 0x53f0321e, 0xbfb5fd69, 0xaf78643c, 0x1326eeb8,
13807 0xc3ba185c, 0x26bf3e54, 0xbb3f94d7, 0x3f94d0ba, 0x131cd973, 0xd07c1b9c,
13808 0xfcc67e54, 0x7bfca605, 0xe5311e2a, 0xc2b055df, 0x7811df04, 0xf6fe54ca,
13809 0xf94d6b69, 0xdc975d96, 0xf5547288, 0xde70cc81, 0xfad1daf8, 0xbf37b473,
13810 0xa45e2876, 0x57b011c7, 0x818e0e50, 0x7b6982bd, 0xabb248e3, 0x31e60f41,
13811 0x4b56a130, 0xc6cb83fb, 0xa4665ea2, 0xefd2433f, 0xc634c183, 0x843c979e,
13812 0x6346b93f, 0x89616061, 0x71f17425, 0x6fc86ca7, 0x0d7e4739, 0x9ec8fa08,
13813 0xf44b72f9, 0x72ebe5e7, 0xd3bd402f, 0x5f803e9b, 0x3ae79c7f, 0x99103d84,
13814 0xbf31225f, 0x7ebeb9f1, 0x7ae25cba, 0x53ac44be, 0x3bea5e4a, 0x0e10b99e,
13815 0x5b38ae0f, 0x5480f57b, 0xfd6893d4, 0x803f2127, 0x51e81814, 0x24c8375c,
13816 0x65bb6ddf, 0xea1957ea, 0x99abd004, 0x4257bfcc, 0x9bde133d, 0xec30cb7e,
13817 0xd475ef87, 0x8931acfb, 0xcab6f5e6, 0xa43cbfc9, 0x94fc7d22, 0x469ca91e,
13818 0x80656b69, 0x059543d2, 0x595e7e94, 0xe54b6941, 0x540f4a7c, 0x63fd2906,
13819 0x3f4a32e5, 0xf4a6acad, 0x4a1acae3, 0x510cac3f, 0xa3e95eda, 0x2e879754,
13820 0xf617ebfd, 0xc0b758b0, 0x8b0f6e03, 0xb2822cb1, 0xdee724cd, 0x53f39454,
13821 0xa3066f8e, 0x63ea7fbd, 0xde8ca260, 0x6fc915f1, 0x47d1d3bd, 0x085e4af6,
13822 0xcf4fa798, 0xa70c7b7c, 0x26c2dd93, 0x8f47d033, 0xf79cf45c, 0x2b04a1de,
13823 0xa9c032c8, 0x519c9bde, 0x0fb985ea, 0x3a2e75e9, 0x70e75f31, 0x3eb7675c,
13824 0xac6c97fd, 0x206972f7, 0xcaf7879f, 0xf0b30f34, 0xd7a45eb3, 0xf49bc50f,
13825 0x5bd29fda, 0x2e89dca0, 0x33a735fc, 0x6e48e748, 0x8354ffaa, 0xc7882995,
13826 0x2e10d8a6, 0x7bed4f8d, 0x38f285d6, 0x3eae5537, 0x7c77b234, 0x5467d695,
13827 0x29e30c3b, 0xa7c3346f, 0xdcc9a5aa, 0xbb89e07f, 0x95f21875, 0x45d0fabb,
13828 0x4a54ff48, 0xa6e67af5, 0xb1ced46a, 0x7c7141ba, 0x79f10efe, 0xf13c6370,
13829 0xa93bac2b, 0x3fbb3ffc, 0xf7a3d5bd, 0xf606b187, 0x01f50d85, 0xf73a0de4,
13830 0xdd07a8fa, 0x3f34af95, 0xfd49abd2, 0x1885ed06, 0x206677f8, 0xac10abd6,
13831 0x2f5e5bd7, 0xe397ad07, 0xf6a68df3, 0xbe8f3de0, 0x7af7c7a6, 0xb5855be7,
13832 0x7d04e3ea, 0xe7f0a575, 0xabd9d714, 0xbc4af3cd, 0xec6f2e09, 0x679a6d5b,
13833 0x7f900ff0, 0xc8292156, 0x9b82253f, 0x32c7143a, 0x6a97fa09, 0xe5bd50f1,
13834 0x6a572f12, 0x1e02d16b, 0xb466c762, 0xd1cdee33, 0xfb73cff9, 0x1fdf401f,
13835 0x1ecaadfd, 0xd7e17cc5, 0xb06cf551, 0xe7e82d6f, 0x0dbdd011, 0xef5053c5,
13836 0x3d76dd1d, 0x98b327d9, 0xa48b85df, 0x8d9d5602, 0x6609ce76, 0x7ffc8c99,
13837 0x35defd82, 0xc8deb0d2, 0x9fd468b7, 0xf3cccb99, 0x2667d82c, 0x0cc6bf38,
13838 0x939bb1e7, 0x56f3df91, 0xa0b730aa, 0x6ff39a5c, 0xbe49b8b7, 0x12c559f2,
13839 0x3f08ef5a, 0xa66ebdd8, 0x2fb907f4, 0xec99e57d, 0x87e8a1dc, 0xf75bfae0,
13840 0x7026140f, 0x3128a53b, 0xff20f9a4, 0x3f91868b, 0xfbe182b9, 0xa7a825a1,
13841 0x5de64e82, 0xefd27acf, 0xb23ff687, 0xd27cfabf, 0xfa214fc3, 0xbe49d721,
13842 0xda759450, 0xd84916c3, 0x974a415b, 0x76eb718b, 0x5c044d6b, 0x47d7011b,
13843 0xbf377fc0, 0xbf133225, 0x35025aa5, 0x5fce2496, 0x4a482f68, 0x47f816a7,
13844 0x51ed4fea, 0xb53fed7f, 0x3fa834fe, 0xfd7f54db, 0x0bfeb53f, 0x29bff47b,
13845 0xafa5fd5a, 0x0416da6c, 0x79b4537d, 0x3cc18b95, 0x4ea95474, 0x4bdd02f6,
13846 0x21762fd6, 0x82511c1f, 0xa3e7e42e, 0x34727921, 0x22d2f87e, 0xe7cca2fc,
13847 0x855d7090, 0xc7fd427f, 0x54d9f85e, 0x59bee7b4, 0xbd69baaf, 0x5b0d6754,
13848 0x1acb4e41, 0xdfa0a70a, 0x1c83e017, 0x46527a5e, 0x9fccd1b8, 0x4aafcf45,
13849 0x701eff46, 0x844f588a, 0xab2a5ec9, 0x9c24f3fd, 0x2759ca87, 0x7be459c9,
13850 0x04e9fed8, 0x5ab98fd2, 0xe87ccf5c, 0xe5f9d927, 0x0de52f02, 0xbb293b3f,
13851 0x30f6bd30, 0x4cb013ea, 0x7c8f0ec8, 0x41d840af, 0xc4ce2c87, 0xb1425856,
13852 0xa11fb11f, 0xc2f1d4de, 0xaa0edc42, 0xf0e4f0da, 0xb6afd083, 0x24badfda,
13853 0x7974be03, 0xf33f553b, 0x7a7aafd7, 0x62edcbd7, 0x5efdd7bd, 0x34f3de88,
13854 0x89adfb0a, 0xd86a25a7, 0xc971f685, 0x841bd55a, 0x9e9b25c7, 0x5c69ee7d,
13855 0xf5627eaf, 0x17f5045e, 0xc3e37a6f, 0x6f170031, 0xf0a71351, 0xe4a43861,
13856 0xc394fa6e, 0xba23f9bf, 0xf2f451e9, 0x18679a1b, 0x4270fe7f, 0xb78a5d37,
13857 0xb0d8d6ec, 0x5098f89e, 0x716b5bbf, 0xfd4fa144, 0x676849c1, 0x56f86d55,
13858 0xd1e575c3, 0xc94b125d, 0xb5cf8288, 0x80bd906f, 0x0a7a2278, 0x2fd1757a,
13859 0xd0397ca2, 0x247af505, 0xbdcb22bd, 0x1465fa81, 0x93fd17af, 0xbe2fdfc0,
13860 0x4fec7e8a, 0x43c45ead, 0xb9f78bc1, 0x95873c70, 0xcfe7ce0a, 0x3f464e2c,
13861 0x4c1a817d, 0x9fca5376, 0x9fb9ac17, 0xbdff2ff8, 0xfaf993fb, 0x42d7d7d0,
13862 0x2fb05573, 0xeaf6738e, 0x799c68db, 0x587c402c, 0x0fec8cf0, 0xc2b5fa41,
13863 0x22896f26, 0x9732c527, 0x80ebc393, 0xc3ce30b8, 0xbf414eb8, 0xd0e5efee,
13864 0xcc8ff27a, 0xee0fa861, 0x6cf1fdd7, 0x8b5fc12e, 0xb27184fd, 0xdae75f45,
13865 0xbb5bfc4c, 0x74e919b4, 0x052f806c, 0x4ce56afd, 0x487c0a09, 0xf95ea067,
13866 0x3853abbd, 0xc947989d, 0x5d81ef16, 0x639f0130, 0x67d566f9, 0x8f7a6e1f,
13867 0x6ee8c99d, 0x1f689e7f, 0xf3831dfa, 0x5664e1f9, 0x7c651f50, 0x07aeb235,
13868 0xf0375e60, 0xb9de4199, 0xc23ed7fc, 0xff975de5, 0x31934dd0, 0xb9f7abff,
13869 0x387be11c, 0xc2bf425f, 0xfbbf9429, 0x83f48956, 0xc9a38595, 0xe42aad79,
13870 0xc91f9cdc, 0x457fd02f, 0x0df0338a, 0x744093b6, 0xde5abf20, 0xa8df784a,
13871 0x575db157, 0x39757acf, 0x20fa17ce, 0x707d064f, 0x603eb759, 0xe81eb9ab,
13872 0xf20aeedd, 0x7a1a9bf5, 0x5f9469ee, 0x07a0d790, 0xe3f557e5, 0xdc6f8ff8,
13873 0x209de1fb, 0x75ebc7b7, 0xd5eb35b9, 0x782db948, 0x7c84bd69, 0xc7b7291a,
13874 0x894ac00b, 0x3cf0b726, 0xb416dcaa, 0xaaf44bfc, 0x65c7c78e, 0xf5d55eb3,
13875 0x8cf86f64, 0xca9793d4, 0x127aa89e, 0xecb3ef7e, 0xf3a8fc9e, 0x457fcea1,
13876 0x80bd29bf, 0x9f3a09fc, 0xc5d87cea, 0xf61f3aa7, 0xf098cff0, 0x3b7f9918,
13877 0xc10c04f2, 0x7f255dbf, 0xdf134962, 0xdef7838f, 0xf8459fec, 0xc734d1f2,
13878 0x9fecdfaa, 0x11438468, 0x79447d70, 0x8fec045f, 0x80881f28, 0x4be54c2b,
13879 0x8c6af71a, 0x2a6c20f8, 0x2bff9d67, 0x759445f6, 0x950f3eac, 0x82d49c37,
13880 0x9d691fc8, 0x753fea1a, 0xe8a89821, 0x9329dc3f, 0x7003b0ff, 0xe9da04bc,
13881 0x0a1198d8, 0x6c591e82, 0x0ecdebe7, 0x012ba777, 0x1cf1c5d2, 0x96d24cee,
13882 0x9fd41ea0, 0x1fb9da77, 0xe9dfc3a4, 0x31f8378a, 0xa4c9360e, 0x6c425bc7,
13883 0x093f3472, 0xdf8434cc, 0x3e5bd616, 0xe0768ff7, 0x87b633be, 0xcf40cefb,
13884 0xfa4765ab, 0x56bf5c7c, 0x23605ecb, 0xedc16b36, 0x77a1742e, 0x71ba0d34,
13885 0xfd9f3c1a, 0x6db7ccb6, 0xafa53e82, 0x8471dd61, 0x2b189f05, 0x72de7ee1,
13886 0x4d999fe2, 0x6b321d7c, 0x28797479, 0x39e5ef12, 0x77a869e6, 0xb9f0fd61,
13887 0xd7ac0fd1, 0xe23ab053, 0x42f5d379, 0x3d69aa6e, 0xce6b5458, 0xd4f5880f,
13888 0xc9feba37, 0x7fa49964, 0xeb84a170, 0xafb7a17a, 0x38de8796, 0xb1d3e80d,
13889 0xbfb8664f, 0x2649aa7a, 0xc8da9cfa, 0x305953f7, 0x8cafe489, 0xd4be9275,
13890 0xf286d6f1, 0x7aef7175, 0x9feb6dac, 0x3e421fb2, 0xe187f6da, 0x6db482bf,
13891 0x778327db, 0x47cafc20, 0x3d607fe9, 0x65d84fcb, 0xc7733f27, 0x7ff1272e,
13892 0xa5dfcec7, 0x76f0843f, 0x3af7f92b, 0x1c3b7d76, 0xa163b1f9, 0x60f500b5,
13893 0x7ebe00c7, 0xedf9daaa, 0x7f9a16f0, 0x331d1117, 0x7de88d14, 0x072fe9aa,
13894 0x54e02e30, 0xed0a8c13, 0x24b15d8b, 0xdaafe55f, 0xb1d11fc9, 0x80ecdbf3,
13895 0x9e379fe3, 0xd3ffb132, 0x5ed364e1, 0x73c5fec2, 0x8ef979bf, 0xc02ecfd1,
13896 0xdd86f1fd, 0x9fc84cda, 0x875fdaf0, 0x78ed7ea3, 0xed4ddb89, 0xdc1acb6a,
13897 0x48ba18df, 0xbd02a85e, 0xfac851da, 0xd16fb631, 0x4728f1c4, 0x57f2f13d,
13898 0x2f9cb3f2, 0x7c28263e, 0x8feffb3d, 0xf5c7c90f, 0x9364339f, 0x1ddfdc70,
13899 0x89ea03f8, 0x4be2565d, 0xebc7bc7d, 0x733d9017, 0xfbdf71ae, 0x52dc6e3f,
13900 0xbdc67cf8, 0xff9cdfe0, 0xfa878aad, 0x3d072917, 0x03e77cf9, 0x7a726f04,
13901 0xc9e7bfa9, 0xa7ff6bef, 0xa025fdd1, 0xe3dcebbb, 0x4b3fff0e, 0x0ba7b7f7,
13902 0x3e31bbba, 0xbfb5fca0, 0xa87eff52, 0x37f96b9e, 0xe36f7ba7, 0xb7fdedd7,
13903 0x33f79e2c, 0x5664fca1, 0xe2c340ed, 0x6f3dd2da, 0x5bee4267, 0xb1e37b69,
13904 0xf623e3bf, 0x5e34f47b, 0xf1b6fee5, 0xed03efb8, 0xac4978b2, 0xab3af917,
13905 0xfa2fb0bf, 0x3b23cbcf, 0x63da7fa4, 0xc5304f64, 0x2bf712b3, 0xe99f4adf,
13906 0x360bd8a5, 0xc200e3e2, 0x6c052bee, 0x4afe6f5e, 0x4adc3e62, 0xfd7e9fed,
13907 0xd373b43e, 0x83b264d2, 0xf7fb2521, 0xfe64d775, 0xad3344bc, 0x98f5ae87,
13908 0x129347d7, 0x89a8ebcd, 0x19abbea2, 0x0ed5ffef, 0x3c021429, 0xcbf01f8c,
13909 0x8ea7f444, 0x126548bf, 0x605893c0, 0x263bae11, 0x9df5cc3a, 0x836c7dc0,
13910 0xc5eff1bf, 0x3c2ec4e3, 0x47e95c0e, 0xc9900e3c, 0x3c4e7aaf, 0x6f09bf62,
13911 0xc78c2199, 0xe3978a61, 0x4bd4a131, 0x1eb16a7e, 0x1da26ec7, 0x349638a3,
13912 0xb82b3ca3, 0xa078e69e, 0x9ebeb875, 0x4cdf0dee, 0xd115cfac, 0x257f8ea4,
13913 0xcdd9f64d, 0x5cfad1f5, 0xa50fcba7, 0x7fc74e87, 0xaac92e94, 0x8e692e99,
13914 0xebca0a39, 0x8c3f5c64, 0x1c99f2c4, 0xb42a0b4e, 0x0fd624df, 0x28e678d7,
13915 0xa4278041, 0xaf482a65, 0x22f6db7c, 0x79b51f8c, 0xc5c7ea25, 0x1f9a166d,
13916 0xe112596c, 0x428d487d, 0xf7167bf0, 0xd4f7a428, 0xfe395e2b, 0xbb3f4320,
13917 0xba06e34f, 0x7c97ef9f, 0xd8cce67f, 0xf0c7f46c, 0xde7fc61f, 0x59b7eb00,
13918 0x063859ab, 0x615b34f0, 0xf404b8c1, 0x73ec4b93, 0x0cdc9f93, 0xe4aaefe3,
13919 0x55ce7aee, 0xf2bd37be, 0x015f4ecf, 0x45f9f63d, 0x94c76d8c, 0xc6288a6f,
13920 0x9a8ff6f5, 0xf7cabe38, 0x1e40d0b3, 0x0dfb2187, 0xab2f8afb, 0xcaf33fdc,
13921 0x891a5f1f, 0x1d71dceb, 0x7eb8e343, 0xa971e2cd, 0x8a70bd62, 0x0ebce279,
13922 0xe283afd4, 0x9f74bf68, 0xe7168cec, 0xbfac41b8, 0x28f1837f, 0xb2d47690,
13923 0x57d7196a, 0xbefc93ac, 0x5b1b5ac1, 0x661e251f, 0x7e116a8d, 0xf8374122,
13924 0x7fb8d9c9, 0x0d9fdbc3, 0xe919c6af, 0xa8e536d6, 0x1d27bc32, 0x61b9f7f0,
13925 0xc51feaff, 0x11f7ae2f, 0x2dec1bbf, 0xf451fc93, 0xdfc0bd47, 0x91df3dd4,
13926 0xa6d2f49f, 0xdfe416b5, 0xa62d6b4b, 0x553ad8fd, 0xb04631f8, 0xa9afd811,
13927 0x2cceec7b, 0xd93ecba4, 0xe5a5f18b, 0x40b5274d, 0x48c47d94, 0xe8fd627c,
13928 0xdd556f7f, 0xb50eeed4, 0x75e2267e, 0xc31b09c7, 0xad76f575, 0x3f5a38ba,
13929 0x7ef2b4ef, 0xf7f566ce, 0xf7f8cf0d, 0x0eb8efc3, 0xae3c7847, 0xf0996b3f,
13930 0x1ff24483, 0x553e3e23, 0xbf3842c7, 0xf5157ae2, 0x8c8da9c2, 0xc94077e6,
13931 0x06feb863, 0xd1b1ff79, 0xe37173af, 0x5da0df96, 0xb924d650, 0x4ca24b71,
13932 0x8fd0d169, 0x2f18de5b, 0xe99c3ce3, 0xdd6fe3d1, 0xc8356ec3, 0x10aaab45,
13933 0xd98ef6be, 0xfbb61771, 0xd0c69b65, 0xdebdf14e, 0xfc79c2e9, 0x2491a6cb,
13934 0xeb8dbd07, 0x34564ae5, 0x841ce311, 0x87e48c3e, 0x4c631ba1, 0xa07215f0,
13935 0x54d7ca1f, 0x6f3ccb6b, 0xd32dfa14, 0x788fb124, 0xf42dfa9e, 0x7b7e99ff,
13936 0x016fd75f, 0x23906fd9, 0x419bc0bf, 0xd344a5bf, 0x4f25736f, 0xee7de20a,
13937 0x482941ce, 0xab6fb9d7, 0xdbf4d149, 0x2fbe4aa6, 0x4dc459ba, 0x7e803477,
13938 0xdfa0dcbb, 0x45bf401a, 0xa3191f89, 0x73fa7ee9, 0xbfd0b7e8, 0xa136fe46,
13939 0xde328b7e, 0x74fe041b, 0xe9bc36fd, 0xe1b7e920, 0x3c53160d, 0xf84d44f0,
13940 0x6fd57a9b, 0x68add252, 0xbd53ef1f, 0x67f851b1, 0x37c7b093, 0x6c46388b,
13941 0x955cf507, 0x5cf4c3f6, 0xb9eaf9de, 0x759e117f, 0x2b77373d, 0x9ee8b8a3,
13942 0xdcf5c87c, 0xe7a0eddc, 0xae47e424, 0x64eee6e7, 0xa1172fdc, 0xd0f486df,
13943 0x97ca8c6f, 0xe5fbf985, 0xde4f198d, 0xf08df50d, 0x941b5ea9, 0xefadd11f,
13944 0x5df51946, 0xbe8bd695, 0xfa7e77db, 0x77d0ab6e, 0xa206c7a0, 0x0fe48d7e,
13945 0xde39936f, 0xc3e8c77c, 0x79465f1b, 0xfb4c9df9, 0xf859ef92, 0xa33bd1fe,
13946 0x7f21670f, 0xf3fa2a7d, 0xd9e9c6a2, 0xfaa4195e, 0xc7cebc27, 0xfb91ba57,
13947 0xb81acbcb, 0x2b56587d, 0xe7f03c87, 0x69df31a4, 0x9dc2ffd8, 0xf8014b12,
13948 0x13f56b26, 0x9febb40e, 0x1f589957, 0xf034c94d, 0x629cacc3, 0xd957fbf2,
13949 0xfcf0eb5d, 0xd9852cd1, 0xec5fbfd0, 0xed147498, 0xbe1ce2e0, 0x9e2c501f,
13950 0xb3b071eb, 0x4464f4bb, 0x9ce3483c, 0x9eb3fb37, 0xad531671, 0x9f53ae9c,
13951 0xb7184295, 0x22ee33da, 0xb8a17a44, 0x5dfcfcce, 0xc9377f21, 0xf62f842d,
13952 0xee351cae, 0x85d72f43, 0x4f027da7, 0x9e131780, 0x3c545242, 0x64a7a501,
13953 0xa5e37726, 0x4b2d77f0, 0xf0a05f70, 0x91f68929, 0xe3adc723, 0x3afc722d,
13954 0x773f751e, 0xbf2fa8b1, 0x6b9d2d69, 0x8e8bc48a, 0x747c48e7, 0x1f023de1,
13955 0x7e5d69ef, 0xd71891ed, 0x7a437c04, 0x809ff826, 0x3fc76817, 0xf9d322ee,
13956 0x5e048f9b, 0x9b8f5646, 0x370fe180, 0xe43a1c61, 0x79ccd5e7, 0x63e02fb3,
13957 0x119ec7d4, 0x315e9d38, 0x7dc01ac6, 0x4ef60dda, 0x1f3a83d2, 0x3e72b30e,
13958 0xd95e84d4, 0x3c62afd1, 0x251bf3ad, 0xe521da37, 0xb5e13b61, 0x0ed1f81c,
13959 0xf53ef645, 0x578124cd, 0x6aaf9d37, 0xd013f314, 0x26eb82c1, 0xf10abe7d,
13960 0x9b2358f3, 0xebca5d38, 0x58b25d38, 0x94c7ed27, 0x30de48d5, 0x71aca78c,
13961 0xeba1c50e, 0x0e7e19fa, 0xf0a29d23, 0x7f8d12af, 0xb39b3a19, 0x62cde7bb,
13962 0xb5aa6e51, 0xe7dc43fa, 0xb1f20a99, 0xfe10d896, 0x3efe1677, 0x2450fc57,
13963 0x78132ebd, 0x757884db, 0xb93afe20, 0x8efe15fd, 0xf9e969ce, 0x84d04ae5,
13964 0x9f4f09d7, 0x53b7fce6, 0xac5fa0f2, 0xcfc86f0b, 0xc74a3f90, 0xd233f21b,
13965 0x465729a1, 0xddf00f38, 0x78e7a327, 0x28d4bf71, 0x0f3b85f7, 0x919ffaf2,
13966 0xb8ca2cbc, 0xff7f307f, 0x4deebe40, 0xc55987de, 0xf7f0413a, 0xfdcef63b,
13967 0x77bf9123, 0xd12fdc4a, 0xf7da6f14, 0xd7cac1bc, 0x20ec1b4d, 0xf6dfb807,
13968 0xe75deab6, 0xae1fa9e9, 0xc03972b2, 0xe0c784f5, 0x0704baf7, 0x75a6f182,
13969 0xa4178a36, 0xf6e40c7e, 0x6f5f51aa, 0x5ba4b3b2, 0x7faf7ab3, 0x37bfa88a,
13970 0x8787497b, 0x47a87b61, 0x21bda11b, 0xce45eddd, 0xe0ffba17, 0x43bae35c,
13971 0x3bdfcff0, 0x1f9dbd2e, 0xce554f1a, 0x4c5f699a, 0xb54aab8f, 0xd1515e04,
13972 0x992c9bbe, 0xe7a0b7e2, 0x70ffce82, 0xa36ab7fd, 0xa59faf7a, 0xd08ec8da,
13973 0x2d5ecbcf, 0xf010583b, 0x254fa5f6, 0xe32b0179, 0x7f38b183, 0x1079878c,
13974 0x8ff72f92, 0xca6ee8fa, 0xed9f6997, 0x29f5dfc6, 0x1bc87dc5, 0xbb1d0c79,
13975 0xfb225331, 0x6cac3de1, 0x36e1da34, 0x268ab3e6, 0x47e73f21, 0xd73c21f1,
13976 0x3d5b5992, 0x3d7203c1, 0x85542ea2, 0x674277a9, 0xaf483be2, 0x7a433271,
13977 0x4cfafb35, 0xbef7f9c0, 0xdc4cb33f, 0x813b078a, 0x8fb119ea, 0x31b96125,
13978 0xce5a24be, 0xeaf86e8c, 0x7fa05bfd, 0x5ecbf7a3, 0x69bb940f, 0x7281c3af,
13979 0x85b56436, 0x19780c05, 0xe85542c3, 0xc87d1a77, 0x83ea0b77, 0xf07bb002,
13980 0xd341497c, 0xc2172ada, 0xbf7a25ab, 0xe498183c, 0xaa6dfe82, 0x32e93939,
13981 0x0e500bd4, 0xcd5f29ab, 0x4ad795cb, 0xce710c5e, 0xf1415a6b, 0x12b57948,
13982 0x14dc601d, 0xd78d9892, 0xbd41b21b, 0xfbc3569b, 0xc17f3859, 0xed6f58fb,
13983 0x416ff7c9, 0xa4fd03bd, 0xfdf237f7, 0xcf783cfa, 0x3b527283, 0x5c2bea87,
13984 0x073c312d, 0xcf91b053, 0x55fb054f, 0xec37e62f, 0xdde68a7e, 0xdf5ed029,
13985 0xc28f9c0c, 0xd13ce913, 0xe74dc948, 0x80be1f38, 0x0e0756f4, 0xa5f05f18,
13986 0x4909f8f3, 0xa3fd62c0, 0x6dfd7fdb, 0x9e535cfc, 0x07d68177, 0x272779ea,
13987 0xfc42c329, 0xe1f69274, 0x03be010f, 0x79379c56, 0x9cdecb3c, 0xc316b42f,
13988 0x1b6398fc, 0x6acfef44, 0x1e71471c, 0xe29f99b3, 0xe68ea63c, 0x57bbe776,
13989 0xefe843da, 0x4ced577b, 0xaf7be7c3, 0xf6f3d2b4, 0xb70f5c4d, 0xbf21680f,
13990 0x2ad5e1fb, 0x552ff3c3, 0x13d265ab, 0x74aa3787, 0x867e576e, 0x6fe437c7,
13991 0xdec876e2, 0xc3debcd5, 0x9b7edc75, 0x936dccf0, 0x5fce1e70, 0xeaf9cfcf,
13992 0x875f5a7a, 0x4d0bb9e6, 0x9ea45bf3, 0xa970f5d5, 0xf54147c0, 0x8f4fda5a,
13993 0xfaa5bbd4, 0x6fa1187c, 0x9d9f714b, 0x24c3d3f6, 0x91f5a547, 0x6e8e65f1,
13994 0x43f20dbf, 0xefe23bf8, 0xc32afdb2, 0x45f48d75, 0x678a24db, 0xf21ef9c3,
13995 0x3e493747, 0xf8287b8c, 0x7b221ad8, 0xe33b943c, 0xf99e703f, 0xc8f0cac4,
13996 0x03d22b48, 0xb58e54f4, 0x84bf8ff3, 0xb3df47e7, 0xf010e461, 0x5fe12e4f,
13997 0x5ace138f, 0xb27ee3cf, 0x8c995bde, 0xc4d98de7, 0xf207a43e, 0x3016646b,
13998 0x92a38de8, 0xf93b96ef, 0xfb46e0fc, 0x966ba747, 0xf3879d56, 0xeb8d916c,
13999 0x957acf47, 0x0bc78bce, 0x3e0bd618, 0xb70a77b4, 0x0cd648af, 0x73b850fc,
14000 0x0ea83245, 0xcbc444b6, 0xe6738954, 0xa76f1a85, 0x5ee49770, 0xaf47686b,
14001 0xdb57af47, 0xb41bdfce, 0xd5bda793, 0xa3fd885f, 0xa1ad7e71, 0xa7ac88de,
14002 0xd4bdfb47, 0xa75ff393, 0xffb9e257, 0x0a65779c, 0x62f9cf76, 0x3ee320ca,
14003 0x7eea9e8f, 0x2df7ece6, 0x5fc067cc, 0x98631fce, 0x86ef40cf, 0x40ff2051,
14004 0xb91a1bbf, 0xea30d73d, 0x459a56a0, 0xbde51bb0, 0xcba3f84c, 0xbbfdf226,
14005 0x16f7cc86, 0xc94ffca1, 0x581f8892, 0x49f5a030, 0x83cdfb24, 0x59f900fb,
14006 0x787cfdfc, 0xe1b2e51f, 0xa0a72e29, 0x4fa83c2f, 0x98af56ca, 0x256be544,
14007 0xb0dfd60f, 0x92ec9736, 0x51991c82, 0xb241ed7e, 0x0f1a0a93, 0x833ca226,
14008 0x7b44aefc, 0xd5ac6ca0, 0x9758ea8d, 0xdfce5d4b, 0x9961e715, 0xcf0c3dcd,
14009 0x5876e077, 0xf796f934, 0x72b76133, 0xe1cf2cb9, 0x26eefb72, 0x3e784715,
14010 0xad724e72, 0x728cb1cb, 0xc72dd59c, 0xd04f577b, 0x870fae50, 0x99a38a24,
14011 0xe5007a80, 0xe71e837c, 0xf3d8edc4, 0xd973f395, 0xbf20a599, 0x72ea5f38,
14012 0xa475cbae, 0x2d2b373c, 0xee3f62b7, 0xe34ed2bb, 0xf6d57098, 0xfae3ef0f,
14013 0x275ff68a, 0x3260f55c, 0x853cc7ea, 0x78e979c7, 0x5c78552d, 0xad7e8f60,
14014 0x3df5a05c, 0xf445fe9f, 0xd9ab33e3, 0x8b6f125f, 0xb5eff1e7, 0xb9fdf12a,
14015 0x9c87b3e4, 0x9e7ca79d, 0x4b9d5caf, 0xe5f6f53e, 0xe27ae69d, 0xf5476991,
14016 0xf01dafac, 0xbe3c0618, 0x8a59f1b5, 0xc2f13e0f, 0x8748a9c1, 0xe7c01de2,
14017 0x9d1b5fc8, 0x4e7a8c2c, 0x55bcd109, 0x39d320d4, 0xb384a603, 0xe51a716f,
14018 0x1575c798, 0x3f12766f, 0x0d64bd15, 0x8bf7814d, 0x9c317db6, 0x76166ae2,
14019 0xf05adc52, 0x072f6105, 0x1ca3865b, 0xbe3c2914, 0xfc2f522c, 0xe7edc6da,
14020 0xd3b1edb6, 0x1d527c70, 0xa8a2dfbf, 0x6ad576fe, 0xc278a7d8, 0x50bb52a6,
14021 0x8379f68e, 0xfe78c7c0, 0xbc67fb17, 0x2b8f4157, 0xf5c0db6b, 0x1aa35144,
14022 0x8a327bc2, 0x63b4b6ea, 0xc7d171bc, 0x957ff256, 0xf3a49dd7, 0x6f361314,
14023 0x794aff22, 0x8fda6ca3, 0x59df11eb, 0x18ad8727, 0x4a50d897, 0x1f0090fb,
14024 0xc45eb824, 0xf8c0fe53, 0x3bcde2c3, 0x850105b7, 0xef3f2fc5, 0xac72fd42,
14025 0xf10bbd79, 0x359ef50e, 0x3c47bade, 0x2223fd67, 0xc386f39e, 0x2f4b6f74,
14026 0xf0c79cf1, 0xb794100f, 0x4e78e66d, 0xec87d756, 0xb667e84b, 0x47feca3f,
14027 0xe9be7d97, 0x1e7835eb, 0xe3a5eda1, 0x25dfb06b, 0x0d72fb7f, 0x5db189c6,
14028 0xcaf79a76, 0xe280f85f, 0xbef7f5b7, 0xc87f09b0, 0xfe29e786, 0xab13fdbd,
14029 0xdf6b6b17, 0xe31d3879, 0x7cb7db06, 0xccfe8c97, 0x26af3b79, 0xadbcef7f,
14030 0x94585213, 0x914f4379, 0x11e7437f, 0xb7491f7f, 0x297b0dbd, 0xd004ed9e,
14031 0x5760f51d, 0x297d6e9c, 0x88f67f8f, 0xd18ddcf8, 0x88f43bcf, 0xe5b86dc7,
14032 0xff512bc6, 0xf27b7037, 0xefb9719c, 0x3f2f3d03, 0x146e3a0f, 0x37f5d7f1,
14033 0xf72e359c, 0xf401fe04, 0x74cdd8b2, 0xf661bafc, 0xbcc69faf, 0xc6bd3e86,
14034 0x03cf86e5, 0x8a79fa7f, 0xa73e6c77, 0xa5e8e51d, 0x343c50df, 0x078a6fd2,
14035 0xd3afa3e7, 0x11ca3cf1, 0xce3a73b5, 0xad3b9d3f, 0xd14fdf74, 0x9e488fce,
14036 0x47beb7da, 0xce266a7e, 0xaeb3b435, 0x973f8f1f, 0x9d6b78c4, 0xd0579e3c,
14037 0x3d7de301, 0xe22e7a2e, 0xeb5f397a, 0xc5bdbef1, 0x1f6d5ef9, 0xe00fee28,
14038 0xb5a5c8f1, 0xb3f1107f, 0x729374dd, 0xcf075e90, 0xe3ad471a, 0x72f42dc1,
14039 0xf47b1c77, 0x38aeeab8, 0x21ba08f6, 0xea9e713d, 0x3807538a, 0x49f9046d,
14040 0x2e768a3e, 0x8f2d7da2, 0xa3576f7f, 0xe3d6379f, 0xf4117dda, 0x9bdbc7d6,
14041 0x7b72e8bc, 0x50fc71ae, 0x4266d13c, 0xb57c4f52, 0xbf5d1f7d, 0x7f4bb4cf,
14042 0xebbefad7, 0x148954bc, 0x5eeb1e79, 0x86d2cbe4, 0xeccfe483, 0xf18b7f5a,
14043 0x7bff09b6, 0xc5320bdb, 0xdfa92f39, 0x523dfa4b, 0xbde1947f, 0x7bfa512d,
14044 0xe7d85dbf, 0x68fe7c8d, 0x7219c97b, 0x7b6d3d40, 0x975f13b6, 0x71483c6d,
14045 0xbdd66fd6, 0xe218b5ac, 0x08fe7027, 0xf6d3c619, 0xa4e1eee2, 0x30fdc5cf,
14046 0x8954ed91, 0xa29bca76, 0xf1be53b7, 0xe29da9a4, 0x76e6bd60, 0x63bdbb9c,
14047 0xac76ef8a, 0xb73358ef, 0xcbd58f13, 0xf6d14393, 0xd8aaec69, 0x29e6afef,
14048 0x0f74a3cc, 0x7bdf938e, 0xc862bb23, 0xcce79cee, 0x112e38f9, 0xbae28d53,
14049 0x388816aa, 0x537a9fb0, 0xce55de91, 0x77f618eb, 0xe0d7e231, 0x01dd51ff,
14050 0x9aaaf686, 0xbf42cfea, 0xd1dea443, 0x642c2d12, 0xe73cf7a0, 0xed0f14e4,
14051 0x90d3848b, 0x0f32079e, 0x67ef58ab, 0xcfabfe11, 0x0524b614, 0x5059f7fa,
14052 0x7a802ef2, 0x0c5ff7d9, 0xd67b3bf0, 0x8781c3af, 0xa9bf9365, 0x0079dacc,
14053 0x35ec2bd7, 0xc847ed3b, 0x7f74ecbb, 0x3b1af948, 0xd6ef778d, 0xbb239f6f,
14054 0xc656d7fb, 0x556087f7, 0xb996f783, 0xb7871d79, 0x2fe6bb7e, 0xcbe35768,
14055 0x1afe7ed0, 0x89eb8f28, 0xfeb4b18d, 0x8e2978e9, 0x7fcb51ee, 0xa8a9a1ed,
14056 0x3963f2d7, 0x4e6fe63f, 0x7d415509, 0x6e1c49ad, 0xee8034dd, 0xc97e28ab,
14057 0x7ba5f149, 0x8652beb7, 0xe6fb54f3, 0x60330c58, 0xfb09afed, 0x7ee237ff,
14058 0x63d51aad, 0x642f338c, 0x2e78c78a, 0x536118a8, 0x3f23135c, 0xfa11c906,
14059 0xe8e31ab1, 0xc5d8113c, 0xa84e7aa6, 0x89780f9d, 0xf8fd838f, 0x3f70aa39,
14060 0xe59107d4, 0x76fdfcf4, 0xdcbd8e7e, 0xba39ef0a, 0x9d6b97cb, 0xeeae1c79,
14061 0x3349f5c7, 0xe744ff95, 0xb3df9173, 0x23fe5e5e, 0x7aaedebd, 0xe265fbf8,
14062 0xfe489b7e, 0x57a5d43d, 0xb4717afe, 0xf4a25bfb, 0x2fdf9e9f, 0xed05a0b1,
14063 0xba762d96, 0x67ef0bb7, 0xdb0e73c0, 0x55ffbe34, 0xfdd30ae2, 0x3e843b39,
14064 0xd309892e, 0x44fd3e7d, 0xc23cb03f, 0x22f2d6cc, 0x15f4bdd2, 0xb3f8c33b,
14065 0x3e9cd7d2, 0xb6e977a4, 0x957f5b6f, 0xb18bf185, 0x7d2bd7e4, 0x1f117fed,
14066 0xd3c35a94, 0x2dbcfee9, 0xe7f78656, 0x3b796db5, 0x4db5e51d, 0x9c27a70d,
14067 0xb4af5f65, 0x57be6ade, 0x58e38c40, 0xbc42e865, 0xaf3f4177, 0x9e8bd45b,
14068 0xdb8632b9, 0x9f18f6d7, 0xdde48635, 0xb1d44f7c, 0xc641c6ca, 0x9e45fbf3,
14069 0x7fb17ae8, 0x9d8ffa8c, 0x38f47743, 0x263fdaf7, 0xe699ed09, 0x96407464,
14070 0xfa8e3d81, 0xe4eea8bc, 0x7c1ff430, 0x6fdfa316, 0xf9c389e0, 0x73ad33e8,
14071 0xcfbfea18, 0x19873bd2, 0x952399e7, 0x92a28f36, 0x8ed2875f, 0xfaf327b5,
14072 0xb5378c31, 0xf7a68b4f, 0x12c4c586, 0x8e1e8afe, 0x7a8e7a8d, 0xabe70c4c,
14073 0x531f6834, 0x43e5176c, 0x2d33f76f, 0x31b87a44, 0x49ebc3c6, 0xbcf8690b,
14074 0x20fb6eb8, 0x950a1e23, 0x72072a6a, 0x642cf84a, 0x832cb52b, 0x2bdbd6fe,
14075 0x28f0ef9c, 0xf2813f74, 0x55f8ba7f, 0x3933a6ee, 0x518e3191, 0x5c6614e0,
14076 0xe7eb33f2, 0x6fd51448, 0xcc69fc43, 0x646456ef, 0xf7926a95, 0xa94f5618,
14077 0x7e2ecc03, 0x43055a5f, 0xec44793d, 0x0c1fa3ef, 0x3d7c6ed3, 0x383f7a48,
14078 0x328bb180, 0x4f09bef0, 0xbf80db9c, 0x3eb3706b, 0x2b69e309, 0x5317d718,
14079 0x488f68dc, 0x033b00c1, 0x595554fc, 0x03df8837, 0x2f187cc2, 0xf42c2649,
14080 0xf37ee5cf, 0x8083b43b, 0x843df94f, 0x1550b157, 0x86c318a0, 0x9e3aefc9,
14081 0x96f3fbf1, 0xeb8ccc7d, 0x0741128f, 0x7a4ddc16, 0x7fbac1cc, 0x5aa3009d,
14082 0x155b7d45, 0xdc1cb7f7, 0x59b8739f, 0x58c3ed18, 0x42c70b07, 0x1caa18ea,
14083 0x2bbfca33, 0x5f03600b, 0xf39ac7ba, 0xf402e523, 0xf5bb445a, 0xf7a83f84,
14084 0xbf7a88ab, 0xabf7a88a, 0xe3abd5b3, 0x2836dca9, 0x58a5ef03, 0xf02f595c,
14085 0x09b3dbc6, 0x867e01bc, 0xcc7f3de0, 0xfb15e312, 0x18d784e6, 0x962b1bd1,
14086 0x8e6eba07, 0xfa7e20c9, 0x4eaedc59, 0x8966978c, 0xc3d70c35, 0xbefd248b,
14087 0x1877e64f, 0x1b6e63de, 0xa223e1c9, 0xcf02cd9d, 0x55bf748b, 0xb276f28f,
14088 0xb7947abf, 0x263e56f7, 0x6f67797a, 0xde8d89fd, 0xea5ef89f, 0x5a8d8eaf,
14089 0x4bd50fff, 0xf47daf65, 0x76efee0e, 0xa03727e9, 0x6e676cde, 0x1a54fd46,
14090 0x16b7fadf, 0x4cedc27a, 0xde999a5b, 0xc0dfc831, 0x9a17316f, 0x49f2479f,
14091 0xf472fe14, 0x29df7185, 0x61f3bbda, 0xe74d5e7e, 0xbe315c83, 0x9f7cb589,
14092 0xdc79eefc, 0x46cb078f, 0x25dfe61f, 0xe1aeeff2, 0x0fdde3f6, 0x1b0fb4cb,
14093 0xc1d5bf79, 0xe1efcdff, 0x801f07b8, 0x5f33ddbc, 0xa233850a, 0xdec5dbdd,
14094 0x677a878f, 0xde44fe88, 0x9e601583, 0x68e4cb49, 0xbe7160f7, 0x45e1cfd4,
14095 0x8b317fde, 0x66fdc5f9, 0x3159e7e6, 0x22dbe26e, 0x0f55a425, 0x82c79eed,
14096 0xd1ef802b, 0xc7be04fe, 0x9c592ffd, 0x8d2e66c7, 0x9adfd7c7, 0xa77fd260,
14097 0x70e27886, 0x8baf66be, 0x7cfe6ee7, 0x149eb5ee, 0xe54579e3, 0x1ee9ac74,
14098 0x9bd52aa0, 0x3d4dfa8a, 0x80f33d7d, 0x07a76a1c, 0x1f218f31, 0x7e1256ec,
14099 0x3d24f30c, 0x5084aa95, 0x3f6e2a2f, 0x37bb47cb, 0x5eb3f39e, 0xaebc4b5e,
14100 0x177ccecb, 0xe6461dfe, 0x5dcfff81, 0xdff3a1e1, 0xa7fc3957, 0x5d95fe71,
14101 0xa380de39, 0xb7043f27, 0xe15771f2, 0x8e7a33b8, 0x7af34aa7, 0x0ebedec9,
14102 0xcbf245e6, 0x3fd86d79, 0xc8f9ead9, 0xadfbfd83, 0xd30fd0ca, 0x23de3f13,
14103 0x153fc821, 0x24714fea, 0xc194dc72, 0xbc72fed8, 0xfff4146f, 0xe8bf7132,
14104 0x52264aa2, 0x08b7571e, 0x34a51fef, 0x913ea447, 0x8f72a64e, 0x974a7b8a,
14105 0xd5297a54, 0x56f36bf1, 0xb6983dd3, 0x36fb790b, 0xa25fa0b7, 0x402fe045,
14106 0xb52d97f6, 0xed1df682, 0xde308aee, 0x60d2c727, 0xb961c1de, 0x9abf09ab,
14107 0x13bf919b, 0x456c13ca, 0x66b55218, 0x7149d10a, 0xc87cb057, 0x0604754f,
14108 0xe37da2c7, 0x6987df31, 0xd6711d4d, 0xf8bb31fb, 0xfbc7136d, 0xb7e71263,
14109 0xa63fbc48, 0x6e307b36, 0xbb6bb1e2, 0xbc22abee, 0xe38872c3, 0x7ef93ffd,
14110 0x37bc4f6e, 0xc0699b4f, 0x327b33bb, 0x0267fde1, 0x5e054bcf, 0xaa1d04ab,
14111 0xc4ab3e04, 0xe255afbd, 0x812adcde, 0x3bc42adf, 0x7b888fa4, 0x3d23177b,
14112 0xef119520, 0xa1d6bfc0, 0x7b432641, 0x520f0f7c, 0xb75be087, 0xb2a4fc85,
14113 0xbc43efc3, 0xde39135b, 0x03a00e6d, 0xdde035f1, 0xc241f983, 0x78e0eaa7,
14114 0x0e9cf286, 0xef105602, 0xa739f123, 0xb6fde007, 0x87d424d8, 0xd6784c63,
14115 0x1f9fc712, 0xf3e29fde, 0xf390a25b, 0x6a25fc48, 0x5d605efc, 0x8fb37bbe,
14116 0x765c44ab, 0x1197b895, 0xcd7688f1, 0xbb0fc02a, 0x3f93e398, 0x2f60221f,
14117 0xfd6249a5, 0xc074055f, 0x3d8527fc, 0x74c67884, 0xb75f2c67, 0x762a5a24,
14118 0x04a788ab, 0x4b0fdf7e, 0x6cb4b20c, 0xf18043c6, 0x1e641a97, 0xe1fdf584,
14119 0xc8ff335a, 0x7ee2256e, 0xc893cf49, 0x56df2b6f, 0x2f7fb82d, 0x74debfcf,
14120 0xe69e5bae, 0xfe10f78b, 0x35da1203, 0xb872133f, 0xfa85f902, 0x8bc3d7c7,
14121 0x152c1f05, 0x223f06f7, 0x2131e7f8, 0x7ceb8fcf, 0x48e7e5e3, 0xf1e64f96,
14122 0x1699898e, 0x9862bf71, 0xe309e319, 0x834cf5bd, 0xc6dad17e, 0x9fdd2943,
14123 0x92b63ec9, 0x650ec6dc, 0xf8afe43e, 0xf10c1f8f, 0x7dfd70fb, 0xd78a1ed1,
14124 0xeb1dbfef, 0x0e83bf89, 0x711587b4, 0xd7cca4cf, 0xef51cd93, 0xeef2ad8d,
14125 0xa65fa1b1, 0xbeecfeb7, 0x73f11b69, 0x1e44e5de, 0xbfe027d6, 0x8ec03663,
14126 0xc157581a, 0xc81bd62f, 0xa57a8c5e, 0xebfc49c6, 0x1be7fe80, 0x17b624f8,
14127 0xc754ceff, 0x5f501bb5, 0x240680bc, 0x6a2fc130, 0xcf11d906, 0xfa0f7380,
14128 0xfea956b1, 0xac2f38be, 0x8fee8f8a, 0xdf2c65fb, 0x5d657087, 0xac2bf26a,
14129 0x9ef47d54, 0xef59ac7b, 0x44f314ac, 0x9cb344c2, 0x4fc2f3e8, 0x39577d45,
14130 0x5fb13b02, 0x9227a7c9, 0x1cde273c, 0x52a89e7d, 0xf7de20b5, 0xcb8c3551,
14131 0xe3573077, 0xfd0f73f6, 0xe49f68c3, 0x3af06054, 0x7ce983f4, 0x7d7190b6,
14132 0xaedc6417, 0x04f5c7d4, 0xe715bdf2, 0x3ff13703, 0xcb0807ce, 0xdefc6a17,
14133 0xe42dbbe3, 0xe4225887, 0x672151ed, 0xfd7c85cb, 0x8acbe51c, 0x297b58f7,
14134 0xab9085fd, 0x90872895, 0xe0cd8f1e, 0x3fb8bcf6, 0x2ccf5f4c, 0xfba08db4,
14135 0x161cab22, 0x4f94179a, 0xae0721ac, 0x768f760f, 0x7647ffa3, 0x4e03b966,
14136 0xfba2cfcc, 0x2cf8a5dc, 0x37cdf237, 0x9c1759ce, 0xc8161e2d, 0x2b16f74f,
14137 0xea4bf72a, 0x8957c8f7, 0xf75408fb, 0xd5fd0ccd, 0xd856264f, 0x9635de29,
14138 0xe4d787c7, 0x81de1366, 0x86b19d1e, 0xb4ca5a75, 0xfbeebaeb, 0xec9feac3,
14139 0xef835ee5, 0x6960de85, 0x41a17641, 0xfb88d44f, 0xc8279924, 0xc5f41886,
14140 0x31268bc2, 0xd4f5eff4, 0xcde8bd13, 0x2e6f5cf5, 0x4deba292, 0xf5d78edd,
14141 0xd17ea466, 0x4c17c5d3, 0x54bf9d36, 0x7a465e1d, 0x3f744867, 0xcac3b242,
14142 0xd7992ff7, 0x33d19b9b, 0xec95f01f, 0xed0be030, 0xf16fdd21, 0x89e328e3,
14143 0xae4793d4, 0x00d7e7d3, 0x4b343bdd, 0xfa393cf3, 0x79abf3ac, 0xfd3fc85e,
14144 0x794fcd08, 0x5a5347a7, 0xd92d7350, 0x69770c23, 0x1c2ef70c, 0x0bbf7d5e,
14145 0x46b87be9, 0x56af9fec, 0x74bf1843, 0x197166b8, 0x0f76d5c1, 0x2fdc66d2,
14146 0x3de1741e, 0xc8d6b34d, 0x247e9fb4, 0xf14e9826, 0x399fdf9f, 0x63e21b23,
14147 0x9a5dac16, 0x6b38fc8e, 0x373a52dd, 0x37c1247b, 0x59806fd8, 0x79ec8796,
14148 0xbcc6fefd, 0xb43ead67, 0xdbe37bc7, 0xfdd1d5bc, 0x27f8553d, 0x779853ae,
14149 0x7643ae08, 0x8674c6bb, 0xfc8e0f81, 0x82eb4ec2, 0x8ed82d2a, 0x58bad570,
14150 0x2555837c, 0x280fbf44, 0x0fb571d5, 0xf0ea94e9, 0x73298b5d, 0x4f7ed024,
14151 0xdbc472ef, 0x3b5f456f, 0x2d3ebbee, 0x3a0245ee, 0xbbf264dd, 0x56d77df2,
14152 0xb66347e1, 0x4463f25e, 0x7c97a7be, 0x62938f17, 0x7ff9e8ee, 0x6869ffb7,
14153 0x315df58f, 0xe6b4bf8e, 0xe84f92f8, 0xa11f7989, 0xcf8bc450, 0x5a1b175a,
14154 0x66ce4518, 0xb3c7f389, 0xce997ec4, 0xebd7858f, 0xe3e739f6, 0x5e973e48,
14155 0xfaf884b8, 0xcd2a7dcb, 0xafc0656b, 0x17a5efa8, 0x507dd346, 0xe2bb9e0b,
14156 0xfc0b8c71, 0xf94cbf6a, 0xc4eda725, 0xf53fedc7, 0xce8239d2, 0x9df4a9df,
14157 0x5df6af88, 0xda01e74d, 0x3ad3fdc5, 0x7c9cd29e, 0xc1c6bc3d, 0xe9de50f5,
14158 0x743c919f, 0xa66857f1, 0x779e7286, 0x5e5ce7fa, 0x31d9fef0, 0xdeebec38,
14159 0xe0a1771c, 0x2cd7806b, 0x2169349f, 0xc2df9bd4, 0x0d8d8ae5, 0x7b1f9196,
14160 0xd1f7ac6d, 0xc6bff228, 0xb5f931e1, 0xf3965bf2, 0x4caec0f7, 0xcc99c434,
14161 0xc87bdf12, 0x65efcd3f, 0x4b20ee65, 0xfa127945, 0xcc0e5bb0, 0xdbb772f7,
14162 0xd3d4e3cd, 0x79c6bb17, 0xd6fd6985, 0xe8abce3d, 0x53b09e79, 0x13465bf2,
14163 0x5f9e3ddc, 0x9e368e8d, 0xa58c71ee, 0xd1f1edf2, 0xb450ffdb, 0xc0595adf,
14164 0x8b4fa07c, 0x79bffdc4, 0xd434fba1, 0xe3ab791f, 0xb8c32413, 0x4d8a6bf2,
14165 0x35794ff1, 0x5fdf74b9, 0xed5ceafe, 0x76bc835e, 0x36cd85d1, 0x4743e5d1,
14166 0xd532e880, 0x40e3dfe1, 0xf0a17cb9, 0x583d4f81, 0x11d3a72f, 0x82bc382d,
14167 0xae7ddbf4, 0x3ea7e768, 0x8d53a48c, 0x1fac13a0, 0xd2740cb2, 0x7ef913e9,
14168 0x07d2faeb, 0x8bfdc53e, 0x45edf8a7, 0x08b1ebbd, 0xc74465fa, 0xf383a75f,
14169 0x0fd82b6b, 0xdfc2f381, 0xbbf8a665, 0xe827f15e, 0x7f47e3ad, 0x51dff60e,
14170 0x944efb94, 0x1f5851cd, 0xe17387e7, 0xc17dbbad, 0x8fa2e30f, 0xf3a9c527,
14171 0x04167cc3, 0x71aa3e01, 0xf1f7a3fb, 0xb682c43c, 0x974f18f3, 0xf1362e9c,
14172 0x01738a43, 0xff415397, 0x211e7ba3, 0xc50d6ebe, 0xbd19ed7a, 0xd9c5278f,
14173 0x185c1f0b, 0xffb34364, 0x11c1f1ef, 0x29f837cd, 0xde60479c, 0xf0bd79c2,
14174 0x1b86c7f9, 0x18ea97fb, 0x79c4e697, 0xf6fcfaa9, 0xbde383b7, 0x1e1d70fb,
14175 0xab7b275c, 0x8e254860, 0xbf7c60c0, 0x37f4f5c8, 0x145bdfe8, 0x68f0c4ff,
14176 0xcae2f476, 0xdfa0977d, 0x99b2aab5, 0xc5d85552, 0x0ce2ed0c, 0x688f5dfe,
14177 0x2b5e05f7, 0xcae2ebf4, 0xb5b7ee66, 0x70db9905, 0x323b00cf, 0x8ad8fc92,
14178 0x69cf6cc3, 0x7e8dc06a, 0x83dc4d73, 0x65812aa0, 0x67e85919, 0x1a0ccc4a,
14179 0x938d77f0, 0x4f2cd7ef, 0xfdc6e3dd, 0x8fd42b10, 0x9a5b33fe, 0x77e4ca72,
14180 0xe5995d7b, 0xd7e93a04, 0x7ab0c744, 0x1f91249f, 0x1f8454f2, 0x1fa994f2,
14181 0x7da6cd89, 0x28bc488a, 0x281dfe36, 0xb3ff0985, 0x9dfe87c0, 0x3e6ea5a4,
14182 0x8fc295ce, 0xaffa04fd, 0x363b022f, 0xc1f645d6, 0x7c2c0b92, 0xe853687d,
14183 0x3c6b2bbe, 0xf1c5af2f, 0xff71d871, 0x59f5c643, 0xde276098, 0xd5d32610,
14184 0xf1c2128b, 0xdc2123cc, 0xe0978587, 0x5c63a37a, 0xfcf803cb, 0xd7207b79,
14185 0xa6ff7809, 0x0901f36f, 0x81fc33f7, 0x35cf118b, 0x03d33072, 0x772d7fe5,
14186 0x74b96266, 0x8138fac8, 0x39e017a7, 0x9f618087, 0xdcd7df94, 0xe13dcb0d,
14187 0x112be60b, 0x5fdf86fb, 0xc7b7cc6c, 0x1fb02af8, 0x4acbdf91, 0xfda242fc,
14188 0x074cfc41, 0x34fdff9f, 0xf2772f3f, 0x07f10575, 0x6e3ed7f2, 0x3c529d3f,
14189 0x87efb871, 0xb4dd79d8, 0xbcf363ef, 0x114f686e, 0xe05ad8eb, 0x4fb0c557,
14190 0xb3e2a177, 0x545d3f20, 0xfd8dcf0d, 0x2727628d, 0xf2dae838, 0xdebd76a8,
14191 0x83af3c3f, 0x4f4f94f8, 0x92247b22, 0xed74762f, 0x69eff027, 0x9e33a1dd,
14192 0xf1c388b2, 0xfad1ff4c, 0xfdae93ee, 0x761c45aa, 0x5efca873, 0x69fe3fbe,
14193 0x99c51c6e, 0xa3b8fdea, 0xda336969, 0xf53477c5, 0xbcf8899d, 0x3fe2e0a3,
14194 0xed43ba63, 0xfa8b13dc, 0xce897ee2, 0xc1f9dd97, 0xa42c6aeb, 0x475fdf5b,
14195 0x2f3c1ff7, 0xeb3a71e4, 0x01fe9154, 0x7ef8d6e6, 0x47df8857, 0xae02bcc5,
14196 0x715fd157, 0xdb743877, 0xf3dd000d, 0x3406e87a, 0xebefa6f7, 0x43d5037c,
14197 0x893ddea0, 0xf7f494f6, 0x726fbd1a, 0x35d7bf98, 0xe346c57e, 0x8daf1ee9,
14198 0x0f8fafc6, 0xeff84a7a, 0xf7b88fc2, 0xf8c7c74d, 0x77dc7c99, 0x1d75dec4,
14199 0xe03acb3b, 0x3fb0db0e, 0xde3e78f3, 0x7cfc489f, 0x1fa05985, 0xf6fa745f,
14200 0xe33e3f20, 0xbd45edf4, 0x4ceb6257, 0xbc920657, 0xcbcf85bc, 0xc905c0e4,
14201 0x0313fe30, 0x21271702, 0x9cfb9a1e, 0xc07fbd97, 0x80fbf9ce, 0x81f7f39d,
14202 0x5baf9d0c, 0xecd7c89c, 0x538d2274, 0x92c77eff, 0xbb1f87ad, 0xc4fbf81d,
14203 0xbb3efcdb, 0xe373d952, 0x9697e443, 0x3e2e3199, 0xfc203d32, 0x7c5d2d0c,
14204 0x433bc7c8, 0xa332f2e1, 0xc1ce9621, 0x9b2f98cc, 0x319fdbee, 0x32c3c79f,
14205 0xadf879a5, 0x22c275a6, 0xb3d2d711, 0x4483f41e, 0xfe7333d6, 0x6517ba04,
14206 0x471ee69b, 0x9c35917e, 0xf44e66cf, 0x608e78c9, 0xf68932cc, 0xf21f47f1,
14207 0x3c00b634, 0x45ef1433, 0xe0f99d31, 0xfbc20d7f, 0xb99aca51, 0x9e45347f,
14208 0x4853f993, 0xf3e1ed57, 0x1073c23d, 0xc79f0e4f, 0x69cfd861, 0xdd322b53,
14209 0x38f7cfc8, 0x7207a87c, 0x827df56f, 0x22fdd574, 0x0afbbcfa, 0x171801d8,
14210 0x27b77b9a, 0xb724f907, 0xd4a3eede, 0xd01894c6, 0xb30ab96b, 0x31a29a61,
14211 0x0c698ec5, 0xbd9a61b3, 0x354fd850, 0xe0fd9137, 0x786bf1ca, 0xd36e79bf,
14212 0xfbe35ff3, 0xb7784af9, 0xdcabe064, 0xa3bfb7a6, 0x3f3e7673, 0x565efdc5,
14213 0x9fd699a7, 0xf0cdeac3, 0x38668de5, 0x47866c33, 0x65c333ee, 0x67683638,
14214 0xe11ef88c, 0x86569d9e, 0xde2b2bdf, 0xf438a56c, 0xa0ae7157, 0xe93b5e78,
14215 0x4dc509c5, 0x712718d9, 0x05a745fc, 0xfe3b95fd, 0x59c532fa, 0x658a6e74,
14216 0xfbb86718, 0x831618d3, 0xed9bbc71, 0x18bf30eb, 0xd9fe8768, 0xb5f6cde2,
14217 0xedb34f18, 0x434f9d52, 0xedb50f14, 0x4bbcfc6f, 0x086b06e7, 0x6f8e2ee3,
14218 0xe445fe7f, 0xfa1be3cb, 0xaaf61d93, 0x7d60b414, 0xdd3847c1, 0x3ebd08c7,
14219 0xe2f5e846, 0xfc7af33a, 0xaf6e970a, 0xfce287ba, 0xe3812637, 0x2fb2b5bb,
14220 0x2577c587, 0x8c6dfb74, 0x40dd67b0, 0x7687cfcf, 0xd08879d3, 0x7ba179cf,
14221 0x6bd11f35, 0xb3ea0c41, 0x0cdaa38e, 0x5c5d4bf4, 0xcea3c663, 0xcc8497df,
14222 0x24ba27cf, 0xcf0ce7a1, 0xc55e3033, 0xe71524b3, 0xdfa367ef, 0x8bbd7f53,
14223 0xbc2f19db, 0x20f2e9a0, 0x992a7b8b, 0xb2ae70c7, 0x79b3ef5b, 0x089e31fd,
14224 0xfbb035e9, 0xbb447179, 0x2eb1fd7a, 0xda5fcf2e, 0x448279f8, 0x95638781,
14225 0xe86ec8fb, 0x7d2b23b2, 0x380689be, 0x727766af, 0x776fe12e, 0xf986bdf2,
14226 0xdec364aa, 0x4e30bbe4, 0x8f414eae, 0xe3b92b36, 0x498f9fb9, 0x3d72e7c4,
14227 0x11f313f6, 0x6ff56d8f, 0xd81cb0b8, 0x718c23d9, 0x5735f967, 0xe41a26fb,
14228 0xb9f287fe, 0x3712b74e, 0x392bcbc7, 0x9cf093cd, 0xff0d7148, 0xfd71618e,
14229 0x80dcb76d, 0xcfcd5ef8, 0xcc2b67d3, 0x963c832f, 0xfaedb96c, 0xfcbcf061,
14230 0xec5e5199, 0x2b71540f, 0x78de2f3e, 0x3d15ce92, 0x8efee16a, 0x0504fa48,
14231 0x13fa3d9f, 0x39ea0147, 0xcb75efa8, 0x9f7f7a08, 0x239bec05, 0xdcef83e3,
14232 0xb38e4505, 0xa06f0ffa, 0x9f3330f8, 0x684bdf02, 0x97ae75bf, 0xe9e8ebbc,
14233 0xd19becc2, 0xa02df754, 0x8fc87978, 0x0c297eba, 0xa489eb99, 0x6fc16aef,
14234 0xe4621bf0, 0x7d72c893, 0xdce904a6, 0xd07cc974, 0x43ff0693, 0x8a6aa1c9,
14235 0x076c8dcf, 0xc1985823, 0xe181da0e, 0x9b972875, 0xfc169c78, 0x88b65b24,
14236 0x61c41f63, 0xf915c7ba, 0xf8a21811, 0x83d13652, 0x4d99bd78, 0x37d754c6,
14237 0xc3f5396d, 0x52abfcb1, 0xa2bf73cb, 0xe7249cfa, 0xdd30ee6d, 0x9c4fdb6f,
14238 0x70f36f47, 0x8feeff58, 0x64d45f9e, 0xe3aeb8a7, 0xbfd23427, 0x149e300b,
14239 0xb768bfcb, 0x3d68c058, 0x78cfa5be, 0xab6e538c, 0x1fa5f7e7, 0x5e33efab,
14240 0x1ebccb3b, 0xf9f44fa9, 0x39fe20f6, 0xbe7afd1a, 0x83ce1726, 0x771c788b,
14241 0xcc8a9f4a, 0xd274288a, 0x2ad44bdf, 0xd3fd7132, 0xbbc38f79, 0xcc14f08e,
14242 0x9fefc850, 0x5c9a7e4a, 0xe83a9fe1, 0x02edbff6, 0xaca139ba, 0xec25fe0f,
14243 0xdfa1d793, 0xfbd90bf3, 0xf7507b80, 0xacacfd3e, 0xa3df9d00, 0xfb40f40f,
14244 0x56161533, 0xe266df80, 0x609c353c, 0xae674f9a, 0x719e2896, 0x78f372d6,
14245 0xe36ebef0, 0xaac05afc, 0x5622dea9, 0x6ac1694f, 0xce217e73, 0x273c2e47,
14246 0x8a76e3c7, 0xfaf9cd6a, 0x8d92c0b9, 0xf0d1ac67, 0xc7d335f6, 0xc702fbe7,
14247 0xa36cdd27, 0x2ab7ddfe, 0x6977ef8e, 0x6df387cc, 0xe9272ae7, 0xa01662ff,
14248 0xe629dc7e, 0x7307f2fd, 0xed20b37d, 0x37d33f98, 0xcb9e0fab, 0x2d23f3e7,
14249 0xf99e4919, 0x13c57ebd, 0xbf007859, 0xbce187cf, 0x8524dc5b, 0x036c2187,
14250 0x9fc11d51, 0x3826bde3, 0x3679e37e, 0x6e38fc7d, 0x3ef673e3, 0x9e116fa7,
14251 0xb8f9929b, 0x0225f98d, 0xad1b251f, 0x98d17f26, 0x79d0528d, 0x6aaf9e39,
14252 0x1acaf7a1, 0xf54d58ce, 0xec1d798a, 0xba076601, 0x2b58298d, 0x755660e3,
14253 0x25d0f1e9, 0x1ccbced1, 0x755c7810, 0x945f5e5b, 0xbed1c7db, 0x9d1027ed,
14254 0xf84a7a43, 0x06d858a3, 0xec8cc5ed, 0x7b3f2982, 0xe2938721, 0x26a6bd1e,
14255 0x4a2fbe8d, 0x653361fb, 0x0e789bff, 0xd03e32b3, 0x99da0e37, 0x2ba5f169,
14256 0xc1bebf24, 0xcf9d6fe4, 0x88e4f0f1, 0xa22a4b8a, 0x3a75b7ac, 0x53d5213f,
14257 0x3b70409c, 0x599da79f, 0x20c06a9d, 0xb8e32317, 0xd3db8cbe, 0x3a8fe742,
14258 0xfe744ab7, 0x20e929f9, 0xea7e0f9d, 0xff430f5a, 0x09d02a40, 0x1253eff5,
14259 0xfcf7845b, 0x34dc3565, 0x73a40de7, 0xe3178c56, 0xc61b4a0f, 0x1a0ea5c9,
14260 0x62e3b73f, 0xbee2d62b, 0x218cca54, 0x61df9023, 0x866e33dc, 0x3ce3a3e7,
14261 0x075f5ed4, 0xc2ea7ba7, 0xa1dcc660, 0xce7fbed8, 0xc38f281b, 0x7cbce862,
14262 0x99cae00a, 0xb432e940, 0xe65952cf, 0x5333b46e, 0xa04678a7, 0x8b957f4f,
14263 0x916493b7, 0xf684dc67, 0x270e08e3, 0xd6f92c3c, 0xa0ae1311, 0xfcac5276,
14264 0x1cf87a93, 0xfa1b4ded, 0x7a061c27, 0xc4c8a84f, 0xf10653f6, 0xa70b5134,
14265 0xbbfb3d61, 0x75a01ee8, 0x23373cc8, 0xbbef3d7d, 0x2eb82971, 0x0b06dfdc,
14266 0xfb63d075, 0x97fdf4d3, 0xfbec83b0, 0xf2f0870b, 0x97994ec2, 0x24e7cfc9,
14267 0x15f6eba6, 0xfaa1d72f, 0x5ea246e2, 0xf9db8f7d, 0xe47c395f, 0xeb42bf07,
14268 0xa0803ce5, 0x58e9f953, 0x0bcc3216, 0x21bed3e5, 0xb4fcb3fb, 0xef1cf4cb,
14269 0x95c63509, 0xa1ec1497, 0xb2943bef, 0x509f3a66, 0x838e6f5a, 0x7a2622bf,
14270 0x979f3abb, 0x3059969f, 0xf99abb6a, 0x2c3ee9f9, 0xb95a27d8, 0xd3f3f364,
14271 0xfc6e1992, 0xe8539456, 0x7169cb39, 0x0a71fae1, 0x67a847ce, 0x7aa09642,
14272 0xda5d3779, 0x79a62ddd, 0xe1c3dda8, 0xa8bfb10e, 0xb7f5ebe7, 0x39c4d34f,
14273 0x7bcf7e3d, 0x2028255b, 0x4dd3cfc0, 0x5ddfc927, 0xf09bb4d2, 0x3745f3a3,
14274 0xd059629e, 0xaae4a780, 0x6405b0e6, 0xfdb8e9fc, 0x025e874b, 0xcba3d924,
14275 0x7d4b3bf3, 0xbf1f2163, 0xef90616b, 0x792eacd8, 0xcab37527, 0xf0fd0b22,
14276 0x6389d2ee, 0xdf2f308d, 0x35f37efd, 0xb2b78113, 0x6bf7f286, 0x6b7bdee3,
14277 0x7506c621, 0x4ce83b9d, 0xb00d3bf7, 0x0076022d, 0xbb00cc3c, 0x2313f223,
14278 0xe02353f2, 0xcdbe5e34, 0xbd974e19, 0xfb8e6d8c, 0xf4051ae0, 0xf0df5b5c,
14279 0x6479bc74, 0xd747d579, 0x4b8ef7e0, 0x7bf7f8b3, 0xaf249acb, 0x65a3d064,
14280 0xe4871e5e, 0x3368b6f0, 0x9a1e2287, 0x507d44df, 0x71b928d2, 0xdfa8e0fd,
14281 0xdf182612, 0xabde18f3, 0x92d3ebe7, 0x5ef483fa, 0xb10ff5af, 0x3a3f3c90,
14282 0x772a73e4, 0x362dfdae, 0xaf3dfcc5, 0x52bbf6de, 0x50b7812d, 0xc7f7eadf,
14283 0xa8f96db7, 0x20aa7bfb, 0x7d7ded7f, 0x469f497b, 0xc72f5b9c, 0xe5ba38fe,
14284 0xa3e3c745, 0x7dd14e43, 0xd6187fba, 0x079a01f4, 0x2e4ef3b1, 0xff75abc0,
14285 0x14787a54, 0x27785fda, 0x4f1fce2f, 0x704ba148, 0x059a7a5e, 0xef76c12e,
14286 0x3768bd29, 0x80ec6a7e, 0x5e0cf2da, 0xdc4df309, 0x01ffc249, 0xfc00cb67,
14287 0xc7e9dd64, 0xa4e1c2ff, 0xe609ba16, 0xafefeab6, 0x1ecdefc1, 0xc032d018,
14288 0x8ff7f002, 0xe0993a5f, 0x419e5a8b, 0x04eac2f8, 0x196b0f0e, 0x03fbc320,
14289 0x23267d83, 0xa3bbd6fd, 0xa109fdcb, 0xc5fef46f, 0x891df60e, 0x84aafb43,
14290 0x2c783bcf, 0x757a06da, 0x4db1d17a, 0xd31f01eb, 0xf49623ff, 0x5bb6fadd,
14291 0x1e13f3ae, 0x6f8c7e82, 0xa6f8114c, 0xbbf49179, 0x5f44f642, 0xba130b9c,
14292 0x6f4ce9e9, 0x71bcd0f6, 0xb416c569, 0x0fa6521f, 0x55e379a5, 0xee27ef97,
14293 0xe9e9dd51, 0xc4fe9e24, 0x5bfae6ed, 0x46bc50b6, 0xb24e43ca, 0xdf171eab,
14294 0x23b90067, 0xba0870fe, 0x3c7cdc58, 0x73190dff, 0x80001bd1, 0x00008000,
14295 0x00088b1f, 0x00000000, 0x7dddff00, 0xc594780d, 0xbbbcf0b5, 0x26effeef,
14296 0xb24d9bbb, 0xf379f909, 0x71100843, 0xa9189313, 0x18884dd6, 0x220bb531,
14297 0x49716b62, 0xc93049f8, 0x2d16ad46, 0x544859bd, 0x46d10882, 0xe1b80a04,
14298 0xfd2b6202, 0x1a8c4582, 0xf68882e8, 0x72dfbd2b, 0xbd3fadeb, 0x8a7e1bd7,
14299 0xb4564288, 0xeb6dea5c, 0x2666739d, 0x5c9377d9, 0x9f7b7aa8, 0xbe8f8be7,
14300 0xcef33bce, 0xfe73399c, 0xb3339ce6, 0x9086bb1a, 0x258e4264, 0x4ec730dc,
14301 0xe631df9f, 0x224c9d15, 0xf433bba4, 0xc84b499c, 0xc421127b, 0x09f04845,
14302 0x0e7b6853, 0xd1eddf21, 0xb4897504, 0x734de1de, 0x44b2d116, 0xc345bd7c,
14303 0xd57fbde5, 0xd2b3e5de, 0xd32d3172, 0x9912abe7, 0xbd33f58b, 0xfe5a0e69,
14304 0xa7aefe02, 0x9f561ee5, 0x58ad25ae, 0x7fbec39f, 0xe5dc84aa, 0x76d4cfa3,
14305 0x7d296e3a, 0xb5b89dae, 0x916b8e9d, 0x0bca1789, 0x5d6c16e7, 0x736a614e,
14306 0x897842cc, 0x51269bd7, 0xe6364ef8, 0x76d1566a, 0xc8afa7bf, 0x515c8435,
14307 0x97b0cde0, 0xff40f9d1, 0x44d21c74, 0x3c369527, 0x37981cfe, 0x7ad7afad,
14308 0xcf3a64b3, 0x39fe1ddb, 0xe35ebed0, 0xd0b4429d, 0x77c0b789, 0x8823b405,
14309 0x3b76399f, 0x40f227b6, 0xffffbc19, 0xb8954f08, 0x4f115fee, 0x7534ef77,
14310 0xf8242c9d, 0xb7fd05f7, 0x2aa1d7b9, 0xbad2fa07, 0xcb871a4e, 0xd0ffc377,
14311 0x24ad4871, 0x2c3a1493, 0x8d6e22ab, 0xbfe836ff, 0x7a07e979, 0x513781a2,
14312 0xf02ff43d, 0xeb0a4ebe, 0x82fce952, 0x76cf24fb, 0xb2cfdec2, 0xe8959211,
14313 0x21e613bf, 0xc3f79ee0, 0xd17f34e6, 0x3f2c7cf0, 0x76e6a978, 0xe4b79c5a,
14314 0xf4edaecc, 0x590f79fb, 0xdb865108, 0x9d711ed3, 0xb8cf7fdf, 0x9f495c9a,
14315 0x86b0defa, 0x19fdebe2, 0xb69cb3c4, 0x1a435f7b, 0x73efff00, 0x743f95bc,
14316 0x853211f7, 0xb5d95f90, 0xd0499df8, 0xbddbe483, 0x53b7e288, 0xd0234122,
14317 0xd23d4cc3, 0xd28860c3, 0xfeb095c3, 0xfbe87d74, 0x872707ee, 0x067d7482,
14318 0x619100c9, 0xbec4153e, 0xbfa9895d, 0x29eb00a3, 0xb44d049d, 0x0e68da3e,
14319 0x5e80956d, 0x50a5a028, 0x5feb093f, 0x07fad895, 0x38e230ef, 0x1d1933dd,
14320 0x433a3776, 0xb6001cc1, 0xc6de008b, 0x7694a3a2, 0x64487482, 0xb69994ef,
14321 0xe36c7c61, 0x3a52c172, 0xb4dbe2f0, 0xe4dab23f, 0xb01f4f19, 0xbb943284,
14322 0x4a3c7152, 0xbe91ab0f, 0xfd470664, 0xab42d38f, 0x394f5c70, 0x36a3cbac,
14323 0x1f787cef, 0x014591fd, 0xc89937f8, 0x7d09634a, 0xe8c3a44a, 0xe1c0eba4,
14324 0x134f5d21, 0x60bb83a0, 0x7f878a00, 0x536f386f, 0xd89ffbe8, 0x08038425,
14325 0x484e58cd, 0x75f5611d, 0xa4c72ccb, 0x86d4f029, 0xddf4090d, 0x03bc1bca,
14326 0xd972be82, 0xf3fb48d3, 0xeb22ba73, 0x83c036a3, 0x804bbe1f, 0x29b73ffe,
14327 0xefd32856, 0xd3f2c0a7, 0xbf870bef, 0x7df039ff, 0xe0c7c019, 0x65166d27,
14328 0x1f8c34bb, 0x80b9fcf1, 0x6f69ebaf, 0x9c6278ec, 0xd98f7ef8, 0xf007ffbd,
14329 0x4e1ef145, 0xb45e0174, 0xf0f1aeb8, 0xc7d1f4ba, 0x5e7eb44d, 0x82b1d69b,
14330 0xd4bfd3e2, 0xf015f386, 0xbd1a95de, 0xec8de48e, 0xa5a594ff, 0x2ff9865c,
14331 0x964f7465, 0x62e22819, 0x2e1fa2f1, 0x485dd253, 0xd23587a2, 0xf0e5ef28,
14332 0x517f8001, 0xf8f7cc77, 0x621abfdf, 0x21be09db, 0x3f07148a, 0x92452ba7,
14333 0x12fcdd61, 0x3ebd375b, 0x56e40f3a, 0x9f02dc3c, 0x8de5c6ff, 0x7c788ba0,
14334 0xbbe01bff, 0x5dbe246c, 0xe84c81fa, 0x80d4bfd7, 0x9fef8a78, 0xf77e1090,
14335 0x4d0489b4, 0x4bd6ee94, 0xfaebd212, 0x90212d07, 0xe8a6839b, 0x6067c00e,
14336 0xdeb88dff, 0x0acd1ae7, 0xea364da1, 0xf705bf19, 0x171f18db, 0xdc80140c,
14337 0xece7473b, 0xee73eba5, 0xa09eda37, 0xa4208024, 0xadda37e5, 0x5ee7ff40,
14338 0xb3f589be, 0x5a10a2dc, 0xe986000e, 0x7fe081b8, 0x578a11b6, 0xc7119669,
14339 0x0a57b13f, 0x8fbea019, 0x5e4639e2, 0x36ffa39e, 0x8dcb0c94, 0x3800a841,
14340 0x07082cfa, 0x8e23699d, 0x59335df7, 0xd16fc745, 0xad0d5e48, 0x2932596f,
14341 0x31e0ced4, 0x16d5cac6, 0x4a90e90d, 0x45bff986, 0xdee0bc73, 0xa7275622,
14342 0x60ac7970, 0x851243bb, 0x3ab8c9b3, 0x05fa05a2, 0x4bf5a03e, 0x78673ea0,
14343 0x7f565a1d, 0x479817f4, 0x7d351ecb, 0x9eaf3d34, 0xba5892c7, 0x17a619ca,
14344 0x17c3294b, 0xf1a126a9, 0x2f1b5e14, 0x21226a5b, 0xe963e02d, 0x2ae27234,
14345 0xc0e0f4da, 0x5b23a074, 0xa3a92f69, 0xe269c0cf, 0xa7b8510d, 0x36bcf7f6,
14346 0xd477b68e, 0xba613244, 0xcdbfa581, 0xf0d5793b, 0xaf380b3a, 0x4b427fe9,
14347 0x7e1e38ac, 0xeef14147, 0x89bb62b6, 0x7d88aeb3, 0x92efc0ae, 0x0f2f4c35,
14348 0x1fe02bc0, 0x75cde999, 0xfd526f5c, 0x617af28a, 0xafd404d7, 0xce40ffa0,
14349 0xf4c0953d, 0x903dc831, 0xaa8e6d33, 0x9e741cab, 0x14d56766, 0xc71b1947,
14350 0x27e98367, 0xa788fea1, 0x243d78eb, 0xb5e6a5da, 0xc75ab716, 0x0cf9476e,
14351 0x90dd16f1, 0x2c88e4c8, 0xafd17961, 0x10ab3d75, 0xe6e9193e, 0x2839cdde,
14352 0x97481b97, 0x89bce81e, 0xc740f484, 0x98248c8b, 0x1162e940, 0x9f48966d,
14353 0x881bd78b, 0x8d7eb312, 0x89b97521, 0x49bb85cb, 0x7bbfbf04, 0x357d5c67,
14354 0x7d68db09, 0x2d8491b3, 0xd755ecf0, 0x8e7d50b7, 0x85f7d67c, 0xe93df621,
14355 0x8bbdf366, 0x3aa3bbaf, 0x79d3f5a4, 0xdd51306f, 0x5d0684ea, 0x97533eb8,
14356 0x267ae0f5, 0x1e737896, 0x2bf2bd06, 0xa52b679d, 0xf5f03fdb, 0x6639f812,
14357 0xbc00aaaf, 0x9c1ab59b, 0x0361f47f, 0xd524e7e2, 0x6bfeb0e3, 0x59aee41d,
14358 0x8dae79f4, 0x8075f378, 0x2cd67b26, 0xaf3c48db, 0x00d4c57a, 0xd0e0d374,
14359 0xd32ae8a8, 0xf972c3a1, 0xe5ff8e0a, 0x1cd6d096, 0xa014f744, 0xa15cf2a7,
14360 0x9994c957, 0x474c7cb4, 0x6e5a3bed, 0x43f56399, 0x4f60037f, 0x0efdf2d0,
14361 0x77eecf26, 0x453d71e8, 0xd057cc59, 0xfb071d0d, 0x9ec55f33, 0x43658e02,
14362 0x74609fed, 0xbaf0f5c3, 0xea0f7346, 0xd5fa21e1, 0x22dfa410, 0xfaf01e9f,
14363 0xf32b970a, 0xf8a16ec1, 0x1412857e, 0x2f608fc8, 0x3e295fb3, 0xe5a52de6,
14364 0x79174e57, 0x67402956, 0xf2bcde4c, 0x4159331d, 0xccf37c87, 0x27fb1f4f,
14365 0xb4fe7f5a, 0xfad0315e, 0x746b4005, 0x88915efd, 0xbe0bc617, 0xbe810868,
14366 0x7b33d26c, 0x15ff69b4, 0xfbd19ecc, 0x71842c37, 0xc079d05e, 0x084a69de,
14367 0xeb03b73d, 0xa2943cd3, 0x863aabc9, 0x16cbe0cf, 0xf439bdf6, 0xa0bb9fb3,
14368 0xa413d53e, 0xff26a3ed, 0x74d75846, 0x7a889283, 0xc25ad7f9, 0x381709c6,
14369 0x878f5e28, 0x9c7ddd98, 0x4e304956, 0xa1fb0dbf, 0x90b69a7c, 0x33a273f6,
14370 0xe543e715, 0x2759da2f, 0x82b618d6, 0x34375dfc, 0x8fed84ae, 0xd3d37ceb,
14371 0x8bf8f968, 0xb4e59ec5, 0x0fa7d06a, 0x073d29eb, 0xafbb32d6, 0x016ca35e,
14372 0x16fd90fc, 0x8f58879c, 0xb5c59ac0, 0xb2581f50, 0x8f9016ec, 0xc839f163,
14373 0x3723127b, 0x166891cf, 0x86c6d3f0, 0xe830dedc, 0x1e89fe95, 0x4dc4af54,
14374 0x8dd29f17, 0xa93db59d, 0xee8df863, 0x5f3d21d3, 0x1740ff6e, 0x43d33972,
14375 0xca804e30, 0x0ff82265, 0x594c72e5, 0xad995a3b, 0x5495e063, 0xeba9df6e,
14376 0x47fc1253, 0x9e5a5d60, 0x97f78ffc, 0x145e302a, 0x4ae922e5, 0xa93cbe46,
14377 0xba03cef3, 0xf5875475, 0xfd7a3175, 0x99d983a4, 0x076e06f5, 0x963eb092,
14378 0x797d450f, 0xc5ee9a95, 0x7fa704f3, 0xf7c9845b, 0xce1af591, 0x401ab71f,
14379 0x20654d8f, 0x23d06c93, 0xc15fe856, 0x0e9ea7fe, 0x3969ebeb, 0xbf58597b,
14380 0x4f813f88, 0x46c3be28, 0x1b93ef3a, 0x29bf8c6c, 0x459fa01a, 0xe5f50415,
14381 0x63b52d22, 0xd2bde04b, 0xe5d74037, 0xa40e8bd4, 0x8a67f22f, 0xf9ef8a15,
14382 0x5033b784, 0xb1ca97bb, 0x30a43a97, 0xafe60bec, 0xe5356c37, 0xb57b5f00,
14383 0xcdcf5836, 0xf9b1ca12, 0x1b05951d, 0x9ec97968, 0x13fd702b, 0x2e5d182a,
14384 0x2f503909, 0xb1f2e54e, 0xa3d210de, 0x8933fe1d, 0xf6883ec0, 0x1374f68f,
14385 0x64ad28fd, 0xae401e24, 0x1421e8ab, 0xd1f6a653, 0x57265ed4, 0x24e79509,
14386 0xf2126ec6, 0x8938e41e, 0xf4d503b3, 0x88fa1411, 0xa4a23dc9, 0x7213dc82,
14387 0x97dd98f9, 0x3e3b44e8, 0x97d6153f, 0x9b9327ae, 0x6bc425bb, 0x7d456933,
14388 0xd0c0f422, 0x9c8f5cb8, 0xbe9906d2, 0xcf813c32, 0xae0e677c, 0x8bd212eb,
14389 0x95e844fa, 0xdf20e8b1, 0x88fbe1a9, 0xbc60e9d1, 0x9afec153, 0x75f0934e,
14390 0x65a6bc74, 0x853cdc24, 0x50536d3d, 0x693d323f, 0x9e127a64, 0x97d0cbe6,
14391 0x5e31faf1, 0xc1ebc61f, 0x77d33d54, 0x3d859d62, 0xd98d3a93, 0x85975301,
14392 0xfc08a4b4, 0x94eade35, 0x26bb61e4, 0xa8d18ef0, 0x1f65095c, 0x9ef905c9,
14393 0x2a62f950, 0xc4c80fad, 0xa1657c0b, 0xefa1e978, 0xb7fb7337, 0xd7cd9527,
14394 0xabf467ad, 0xd8a47d93, 0xc112eb0a, 0x99346f7d, 0x051e81d8, 0xe8db373e,
14395 0x1df02577, 0xefa1b7e3, 0x1cc3a48d, 0x2bd57df3, 0x173fd426, 0x0c85b65e,
14396 0xb3f88f68, 0x94bfb41d, 0x4ed01bdf, 0x0d8af73d, 0xae39e9f5, 0xefc25d0f,
14397 0x7e611e40, 0x41aebe16, 0x008e3552, 0xc6334bed, 0xf6140881, 0xd983b359,
14398 0x21ed2359, 0x99139f5e, 0x80cae8c3, 0x8e0bcdfb, 0x4ca00781, 0x7fa021e1,
14399 0x7e32716e, 0x5699ec0f, 0x3efa43fc, 0x187ab3e0, 0x40c5fdf6, 0xf7ed06af,
14400 0x7d2918e7, 0x8b2ed74d, 0xd1e7483e, 0x83b5699c, 0xfeceab7e, 0x41dddfd7,
14401 0xd1ee1fcb, 0xf3ac0311, 0x497369f6, 0xb7f2d8ee, 0x3e3ba431, 0x772fc310,
14402 0x9b9754ef, 0x40e5d57b, 0xbf7cba9f, 0x653ae6d3, 0xf9e1d941, 0xc1b5d282,
14403 0x87ba7ad0, 0xd5786bc2, 0x8668fa80, 0x1390ffd3, 0x7a26ade4, 0xc86cf018,
14404 0xf80a78fe, 0x9ffd023b, 0x5034f048, 0x31148a36, 0x5f5f03fc, 0xb6cfcd30,
14405 0x61b7828f, 0x06a311fc, 0x75ad4cf1, 0x173944f6, 0xd2e27ce0, 0x403c3f7b,
14406 0x9668bfe7, 0xdf02bed9, 0xcacb6b78, 0x18449ec1, 0x4dfd6049, 0x8bbec21f,
14407 0xf5846bb6, 0xb693353f, 0xac3570a3, 0x89b0fa67, 0x6f801244, 0x69dda85b,
14408 0x1bfc4ba4, 0x77776fce, 0xf4c3cb44, 0x359dbb7f, 0xf94e0113, 0xe80fb22f,
14409 0x37e851e3, 0xeade4ec6, 0x4bfc7264, 0x463299fb, 0x02b699f8, 0x038d9afe,
14410 0xfe3a4afa, 0x0cf97ff5, 0xa5e2fde5, 0x823ee1af, 0xb33e63ce, 0xc80a4dab,
14411 0x1e0fc5a7, 0xdf62f7c0, 0x8ad32a76, 0x36d7b6fb, 0xa1d95818, 0xcda9f2c7,
14412 0xb8b95f6c, 0x3cc10a57, 0x931759a5, 0x6c2f412a, 0x640dd9d6, 0xf1e35e24,
14413 0xb7a6c1f8, 0xf5efc013, 0xf61d2201, 0xc7b3127b, 0xb809adec, 0x135a507f,
14414 0xac0cbec0, 0x9043f1bf, 0x6b378b8f, 0x902f603d, 0xcff4367d, 0xc37cde2c,
14415 0xe85685c4, 0x4aa4d3e7, 0xb96d13f0, 0xd0543c01, 0x7e6217ce, 0xf4f5c89e,
14416 0x6ae5bcbd, 0xd0f1f805, 0x62ff0666, 0xd0077187, 0xd17ff5d1, 0x1ac97f22,
14417 0xb93b07e2, 0x089def5b, 0xda6cad7c, 0xe7d61d3e, 0x1ae99983, 0x224bbf6c,
14418 0x638bc076, 0x5fbc0a69, 0xe03ec92c, 0x8df586e3, 0x4f76b1b5, 0xc7f9939d,
14419 0xa597b32a, 0xaf91580c, 0x6d3e80e6, 0x08f94cde, 0xdef59fc6, 0x0d70eeef,
14420 0x6b3495f3, 0xa1532dfd, 0x1e7567ff, 0x7b21bbe0, 0x90b7d366, 0x4c2fe0be,
14421 0xe398b5f1, 0x99f2abeb, 0xa4f822c1, 0xeae400b5, 0x05ad15e2, 0x8cec51f6,
14422 0x44d93e21, 0x213272f9, 0xf9129da7, 0x1993fc02, 0x63bed54e, 0xb59a7dac,
14423 0xc67a8350, 0xedde21e8, 0xb74a99f4, 0xb71fb0c9, 0x6f58c925, 0x7d23d24b,
14424 0x77ba7fcb, 0xbce86fe7, 0x2ffa749e, 0x26ccbe80, 0x6bd062de, 0x455ed44a,
14425 0x35405acd, 0x136461da, 0xcc89afb3, 0x92eb85fc, 0x31558ec9, 0x125373fb,
14426 0x39504fdb, 0x73f405f1, 0x1f3fddee, 0x64b6fc06, 0xec053c7d, 0xcfc5c085,
14427 0xb35fe0f4, 0xdf284bf6, 0x011f1ead, 0xcff409ba, 0x868a0b24, 0xc3c072e5,
14428 0xbcfc46f4, 0x98e924e6, 0xb145751c, 0x82974a9f, 0x41076ee5, 0xd4b8da7a,
14429 0x46fef68c, 0x4004c857, 0x2b7cadff, 0xee46a7ec, 0xfb6e340f, 0x740b5785,
14430 0xe3ec921e, 0xfe30aca1, 0x17986c18, 0x3e71d2d2, 0xc41796dc, 0x8f4a9ef2,
14431 0xb759d696, 0x5ccae3fd, 0xce9f53c0, 0x9eaded03, 0xdf980481, 0x244edb87,
14432 0xb61afcc0, 0x0dde7169, 0x16524fa1, 0x09cb0d16, 0x905fc69d, 0x5d827604,
14433 0x42f8c2b2, 0xedb87c5e, 0x560594d3, 0x7d403fe6, 0x5e3a3a5a, 0xc9cacecc,
14434 0xdff5fdf0, 0x6672eb64, 0x72042197, 0xf9898cf0, 0x33bb45f7, 0xaeffa636,
14435 0xcdfe124b, 0x3fd02cde, 0xa2796543, 0xf7c4e406, 0x2efe6ced, 0xf0166f7d,
14436 0xba9247e5, 0xb52b259f, 0x52e54424, 0x84894ae3, 0xf33fcca8, 0x20594bdc,
14437 0xfedc3fff, 0x0c5d5652, 0x89dff17c, 0x6a498de7, 0xaff09a7f, 0x0ce1f4ba,
14438 0x63ceaf18, 0x31cc7e60, 0x3da2abfc, 0xa4fccf59, 0x816b9483, 0x8377c50e,
14439 0xd82f660d, 0x18c483bb, 0x5d5b9702, 0x7ad7f73f, 0xd82ef9bd, 0xe3ef88d7,
14440 0xf40d5ffa, 0xfa92e144, 0x5827f424, 0x9f28a28a, 0x77fcb4bf, 0x918cf5d1,
14441 0x8d9d74ff, 0xc6cd4eb0, 0x0471e1e8, 0x780f43e9, 0x6558b7d3, 0xed2957d0,
14442 0xf7a2be8c, 0xe59f706b, 0x814c2732, 0xdd3e80b8, 0x76f9056d, 0x43b9817d,
14443 0xb3ef0893, 0x333ed042, 0x0bbf10bd, 0x0ffa3156, 0xc3f410a6, 0x095691a5,
14444 0xe676b4fd, 0x20a8cfe7, 0xf8b455f6, 0xe76624b3, 0xbd6789b8, 0x5fd70f36,
14445 0xc70738c2, 0x400fd08b, 0xcf2f2047, 0x23a44648, 0x7b425fa9, 0x9de9ab54,
14446 0x458efd07, 0xbac52b57, 0x2a1aba72, 0xeae89dff, 0x23c74149, 0x20afcae8,
14447 0xa38db95d, 0x23f715d3, 0x127b765f, 0x36bec1f4, 0x2d6be395, 0xfbd13f97,
14448 0x2eafc28d, 0x796b7cc1, 0x6b46b57f, 0xc47a0b58, 0xd638fba3, 0xda89bc3f,
14449 0x4a7fb0c5, 0x3e9ebb03, 0x57cfb5c7, 0x6448dd70, 0x9608fc00, 0x2fa88dab,
14450 0x7244d31f, 0x9d498ec0, 0xe81bbad4, 0x515e7523, 0x0bee3b49, 0x17a01c33,
14451 0x7fa2d740, 0x1f34e974, 0x1c5823b3, 0x8f533a28, 0x07969cfb, 0x8ecc7d2b,
14452 0x097e41a8, 0xa02936ac, 0xe7f5a707, 0x08fa072c, 0x031e232c, 0x86cf71d2,
14453 0x9dcfe045, 0xac80f56d, 0xb225f113, 0x9d77cd52, 0x05538b12, 0x0f18226f,
14454 0x0d338e1b, 0xe821f96c, 0xf422c6ff, 0x8ff90c9b, 0x8dea09f3, 0xd6438dcb,
14455 0xde2136ad, 0xd068fc45, 0x25741146, 0x3fb191fa, 0x7a646892, 0x407ca468,
14456 0x054a73ff, 0xa1eb7f11, 0x3cca2e9c, 0x5ff823de, 0x456ca3c4, 0xc8b01cbe,
14457 0xbf399c2b, 0x049c4332, 0xb36c77fc, 0x00fd8416, 0x19598dfa, 0x694fcadd,
14458 0x50e92028, 0xaaab9ffb, 0xbcca6233, 0xc1f7d0fd, 0x5f573755, 0xa877fa8b,
14459 0x7aa6c01e, 0x26bd9459, 0xc355e205, 0x83b532f5, 0xff127d8d, 0x1be6e2be,
14460 0x941eaaa8, 0xee7ff8c4, 0xd11f82f4, 0xc5e35444, 0xf5c727c2, 0x5bfda3af,
14461 0x383ede15, 0xefe826ee, 0x7e5112a9, 0xe14bd3a0, 0xf753ab5b, 0xdfe52887,
14462 0xf78c4143, 0xaf0e537f, 0x6c319d5a, 0xe17b501f, 0xc36549cf, 0xefa3c276,
14463 0x495d76d5, 0x3fd8b2c7, 0x15fe83d5, 0x92e03efa, 0xe7890ed0, 0xf49704d7,
14464 0x656becd5, 0xe09d7d84, 0x74f5f662, 0x2fba4960, 0x581df941, 0xdf6023e6,
14465 0xe9c4bb52, 0xe3e4bb42, 0xfd680753, 0x1f9f59b9, 0xbb40a71e, 0xbec1e67b,
14466 0x4651702a, 0xa9d81bf9, 0x6f94490d, 0xaeccfd8c, 0xe31cfaa6, 0x967e8205,
14467 0x38fd39d8, 0x97fc0482, 0x32a4fbdd, 0x5a4277a0, 0x6ba36eb3, 0x379703f9,
14468 0xfbe1c713, 0x9779f8cd, 0x205f98bb, 0xa1b55850, 0x26dffa00, 0x5617b011,
14469 0x594f1e15, 0x63a9fb80, 0xbe630b29, 0x0a7bec6b, 0x53b8d9f1, 0xcb1e2a37,
14470 0x7804e1a9, 0x45f9796c, 0x338dc82f, 0x42650921, 0x04ea1c83, 0x41a1b6bb,
14471 0x29211603, 0x03bfcd0d, 0xf5731fe3, 0x5f9d3c64, 0x8177d706, 0xa706b79d,
14472 0xbfe9bcc2, 0xd1b57d12, 0xc4e508b7, 0x2b46b9c6, 0xeb0a91c6, 0xd83c41ee,
14473 0xc3c05ecd, 0x34aac2aa, 0xe665a718, 0x4dc63b74, 0xf5073da8, 0x077e0f2d,
14474 0xae0245fd, 0x1aba7d55, 0xa9ca77b0, 0x0a0bf75d, 0x4673a677, 0xf5f2878d,
14475 0xe2eeed38, 0x5710acfb, 0xff8e5d1f, 0x174664bf, 0xf82f921d, 0x8ff452ed,
14476 0x677f5892, 0x1fb31f76, 0x55e9716f, 0x5c5bf1fe, 0x36bdaecc, 0xe4069918,
14477 0xb01e5fb2, 0x201d5d80, 0x5f604fde, 0x65567c4d, 0x9313ae3b, 0x0536ae5f,
14478 0xd74666fd, 0x425763c0, 0xee32b5fd, 0xf03c8867, 0x5cf71863, 0x8ab3cba7,
14479 0xf2803e70, 0x90214583, 0xfe5cfbc7, 0x96fac2ef, 0xdcf57b73, 0x831637cb,
14480 0x5fd8517f, 0x5099cf9d, 0x94da766f, 0x4e406b27, 0x796649fe, 0x6468c603,
14481 0xc967ed1a, 0xb71c4ee7, 0x84ea14d3, 0x68f60ff5, 0xeac9beb1, 0xdbf4045f,
14482 0x29faeb78, 0x0d608798, 0xd51e8015, 0xd008bab9, 0xa0bedd31, 0xf2e8c51f,
14483 0x4f238811, 0x2597ce0b, 0x767117d0, 0x63f034cd, 0x85c5bee1, 0xce2adc7e,
14484 0x1529e31f, 0x2b22329c, 0x34917c74, 0xf9bce76c, 0xbc32d9e7, 0xc68ff614,
14485 0xd5eefcc8, 0xec04cd73, 0xf448f25c, 0xf8fc06b0, 0x7b0108ae, 0xc257b9b8,
14486 0x5f0b9a71, 0xe5fec3d0, 0xdfc65eee, 0xa0dfbe01, 0x78c2cbf8, 0xedc2cb94,
14487 0x67460e81, 0x1c787224, 0xb679f9e0, 0x76d0849e, 0x42577e31, 0xc0793396,
14488 0xf8f3d3fb, 0x37f73343, 0xf5884d51, 0xcec25cab, 0x5b8ea158, 0x49d771f0,
14489 0xf016af11, 0xfca92c5a, 0xc3d9e2e4, 0x183c4fbf, 0x1bfc0e9d, 0x7e05f4a5,
14490 0xccd20da7, 0xf3a75e7b, 0xc93650db, 0x9b98a603, 0x04b69392, 0xa45253de,
14491 0xfbed2f78, 0x0dd03a64, 0xafc821a9, 0xda957d2d, 0xeb8b2b66, 0xa58c5e60,
14492 0x53ea07b5, 0xfd442aef, 0x5993710c, 0x1cb3fdf4, 0xe65669af, 0x08af73c7,
14493 0x341c40e6, 0x9eefa0f1, 0x2bfc61d7, 0x4d87e8cc, 0x73636ba5, 0xf82573e2,
14494 0xf8a4dcbd, 0x7767e800, 0xf00252ad, 0xc41f7888, 0x0d16670b, 0x3d38e3e7,
14495 0x7d2b7792, 0x983976ee, 0x6a40cedf, 0x1f785e00, 0x1fc70eb2, 0xe3079fc1,
14496 0x9e0f7c42, 0x32c2d2e7, 0xc0c9fffa, 0xefb8ed96, 0x483e6037, 0xef1bdf6d,
14497 0x35adfe80, 0xc78c5e92, 0xd52dd9c6, 0x02beb789, 0xf6783ff4, 0x018796d4,
14498 0x7af6dbae, 0xce25ef30, 0x9bfeb91e, 0xb33f3ecc, 0x3f00a2dd, 0x9b72e56c,
14499 0x27c88fda, 0x3f6c5dc1, 0x1e476f19, 0x27f7a975, 0xddafe543, 0x05f0648e,
14500 0x0b3cb3b7, 0x7c03df21, 0x70d837ff, 0xd7f4013e, 0x13c10dbf, 0x8db20f97,
14501 0x8ff483e7, 0xe6f20f9e, 0xe8104b0e, 0x09af7ce1, 0x8f3292fd, 0x45b59d7b,
14502 0x7524001f, 0x01cf0e38, 0x72581b79, 0xca1ae7e6, 0x8b0f727f, 0x8f12c923,
14503 0x4b4afd33, 0x6bcc5c58, 0x808bff07, 0x774c765b, 0x3e408b7b, 0x713779b2,
14504 0xb39351bf, 0x2ef16140, 0x94d43796, 0x7b002e10, 0x87ae55ea, 0x5e2ccc9a,
14505 0x87d0e835, 0x26a35d61, 0x185d1fff, 0x93df62d7, 0xd8941a5f, 0x884f56b8,
14506 0x0a2775d9, 0x9d3d6135, 0x07d80f67, 0x59ab6eb0, 0x9f286b7c, 0xc7a1bf60,
14507 0x5890e2c0, 0x41ccec1e, 0xe22f5939, 0x3f99fb56, 0xa7c79eae, 0xf45acc4e,
14508 0x745ca40c, 0xb035ad48, 0xaab0bb3f, 0x0fe8fd12, 0x9f13393c, 0x7ed52bf5,
14509 0xa7e045ff, 0x238e1bcf, 0x1d7bff0b, 0xbd99e8f1, 0xd447ec3c, 0x5945fb50,
14510 0xbe815729, 0x15f621cc, 0x2095ff20, 0xe9abad5d, 0xc13e83b3, 0x12349768,
14511 0xa77239d8, 0xfbeb0ccb, 0xf5068768, 0xe343b054, 0xcf027685, 0x8fccc939,
14512 0xf3324d74, 0x0aa5d06b, 0xd9e238c1, 0x0771e3a1, 0xa272dfde, 0x2353c309,
14513 0x76a3e7b1, 0x7d3466b9, 0xd0ebfa2d, 0x4fc11ab5, 0xa0d4cd17, 0xde82fbdf,
14514 0xc6fd173b, 0x790202ce, 0xd6b61d54, 0x1eac3595, 0x2982e779, 0xebfac3ea,
14515 0x12486664, 0x33f209c5, 0xcbe79935, 0x616de1c5, 0x1f1cba97, 0xa90c698f,
14516 0x3fc4f5cb, 0xc58f2d21, 0xa7df620f, 0x75f93326, 0xc70e5561, 0xe3f307b7,
14517 0x6797fcc4, 0x3269bc30, 0xb33733d9, 0x41d02e6a, 0x7397c42e, 0xabfcc9e0,
14518 0x7f082674, 0x092e75ee, 0xde0e23e9, 0x80da300e, 0x3c593abe, 0x3f856ff4,
14519 0xe4caee1e, 0xbc1fae14, 0xd65f886e, 0x8f18f5db, 0x493f5cbe, 0x0e5ab25d,
14520 0xfebf950d, 0x27db2cfd, 0x9e796a75, 0x50e51d8d, 0xe5cd9d9d, 0x11d9e484,
14521 0x6a56f786, 0x3a3cc02f, 0x3f6025b5, 0x8ad5bb4c, 0x6fd968f3, 0xf3703f42,
14522 0xd02c81b2, 0x03552de3, 0x89b71005, 0x2b402fc7, 0xdb45f90b, 0xfee8b9d5,
14523 0xd884ec03, 0x4b5f3c76, 0xfef5671d, 0xf60cb920, 0xbf762739, 0xb76afa01,
14524 0xfd15f509, 0xf00603bf, 0x839cbcb3, 0x3687ccf6, 0x0bb41b7f, 0x9e5bc398,
14525 0x85bb01cd, 0xfdcd4dd9, 0x0bb01e86, 0xe2623aeb, 0xd59ff07c, 0x591fb8ea,
14526 0x3bff44e9, 0x6fbf56e9, 0xddf714d8, 0x17603888, 0xbd3af3ae, 0x3bf0227f,
14527 0x7f983bd5, 0x8351b670, 0x5af50379, 0xb79022cf, 0x7b6a4d67, 0xad8dacfc,
14528 0x75a196d7, 0xb5bda0f6, 0xf675cc65, 0xd73ac014, 0xb63f886b, 0x6758669f,
14529 0x7c4dbeba, 0x78becf9d, 0xf3ac0175, 0x2eafbbc7, 0xa75e7580, 0xdf02f2eb,
14530 0x5bfc39b4, 0x27bf6993, 0x3da1f06f, 0x2f58f225, 0x24f71e97, 0x432bfdab,
14531 0xff21ffe5, 0x30fa58ca, 0x5a87043c, 0x4af4ba1f, 0x3a83c806, 0xd5bfe1a3,
14532 0xaa37f08b, 0x4068cf1f, 0x3ffec77f, 0x0766ba7f, 0x2d7e81c8, 0xbfa223da,
14533 0x0f3fb2fd, 0xeffda1ec, 0x69413db8, 0xb91bfeec, 0x246dd85f, 0x88abf041,
14534 0x27b0807d, 0x5bf1e5e3, 0x251f3e7c, 0xbb006f7b, 0x8dfacbe6, 0x633bf81b,
14535 0xe76653e8, 0xcc3c936e, 0x7e8bdc6f, 0xf37d96e4, 0x3e27e0ed, 0xe37e621d,
14536 0xd18b1796, 0x7a18dc6f, 0x65790c2d, 0xc3b25fa4, 0xdb71a3fe, 0x07c804b1,
14537 0xba5cfb10, 0x8c933daf, 0xefdea8f4, 0x489d0e9e, 0x0a01fc80, 0x71e82577,
14538 0x07aa2b8b, 0xfba16fba, 0x6c23c83d, 0xa187a391, 0xc11716df, 0x3ed2973c,
14539 0xc44ffef5, 0xf4fa3779, 0xf6377728, 0xd790214b, 0x4e7f7a29, 0x9235e806,
14540 0x2078c761, 0xc98bb3e7, 0xb294d4de, 0xf7baf8d8, 0xe1e4e4f3, 0x0d81b07c,
14541 0x03bf4889, 0x83b5e23a, 0xe360db3c, 0xf9464cf2, 0x8e4dc7f6, 0x630fcb10,
14542 0x6218ffed, 0xc8a34276, 0x5849930b, 0x68b5eba6, 0x585df7b6, 0xe1f7906f,
14543 0x5b1f7938, 0xbbfb7116, 0x52f51849, 0xca181933, 0x176d8b0f, 0x7887d71f,
14544 0xd21faab8, 0x1f80ac5a, 0x07ab4eec, 0xb8f881e0, 0xf6c83eba, 0x961f94eb,
14545 0xafd30c96, 0xbf410758, 0x1d0fdc2d, 0x08fe3868, 0x4fa06fd0, 0xd77d83b2,
14546 0xdbf461e4, 0x905bf744, 0xefcf1b47, 0x379d57a4, 0x97ff163a, 0xd1f5a8a6,
14547 0xe4eff950, 0x453ebd5f, 0xfe62f7cd, 0x343f6fc2, 0xf1897ecf, 0xe2bcdc65,
14548 0xfef1a9f7, 0xbccfb176, 0x2738795c, 0x870f2d45, 0x79677fca, 0x2eb43758,
14549 0x1d50f2f1, 0xe59bf8cf, 0x5c70ffe1, 0x4f7d99e3, 0x03bec027, 0xa7d878ec,
14550 0x63aedcac, 0xfd1413f9, 0xe9e2f1b1, 0xc597ab5a, 0x5ea2b54f, 0xa657871d,
14551 0xe33c38f3, 0xd45ed7eb, 0xf335bae2, 0x3ef37138, 0x369a079b, 0x9c631758,
14552 0xba7e3e36, 0x0e9eec84, 0x471f154b, 0xce7e026d, 0x753c74bb, 0x8f8b0a75,
14553 0x20725852, 0x6f3e216f, 0xa7eb35eb, 0x7598fe49, 0x1ba22aaf, 0xdbe85182,
14554 0x33890728, 0x14c6fde6, 0xc6bf5766, 0x7adc8bf3, 0xad608e76, 0xfd85e2cd,
14555 0xf2c35b8c, 0xf2e07e9f, 0x18bc826d, 0xfaf1c2a3, 0x4344edf2, 0xae8cf2f1,
14556 0xb04ae517, 0x3901ead9, 0xa237fc28, 0x5e3c8bff, 0x3ffad971, 0xfcf7de8e,
14557 0x3c7bd30f, 0xf18bf67e, 0xddb8d6fe, 0x151b8a7a, 0xe3a4105f, 0xca5f1023,
14558 0x63bf4919, 0x1d1633f5, 0x1df14d1f, 0xfe766149, 0xb857cc14, 0x2963394c,
14559 0x3f009e8d, 0x5063d911, 0x7e09afc0, 0xab8fd412, 0xaa3e78d3, 0xe6267ca7,
14560 0x2573b369, 0x58ce1ce2, 0x4307e476, 0xc8ecc3eb, 0x9f5cc60f, 0xde47672f,
14561 0x087df0ee, 0xd2b27674, 0x1e01e78b, 0x61f851b5, 0x619cf87f, 0xe22e73d4,
14562 0xfca5c63c, 0xd1c45f2d, 0x4bff17d5, 0x3a92d472, 0x75f95d96, 0x13cfd1cb,
14563 0x763a7fc0, 0xff9e413f, 0x45bc4119, 0x6b6449f7, 0x103b5f8c, 0x197bf961,
14564 0xfef15e1c, 0xa1bef83f, 0x999bd521, 0xfc7fdf4a, 0x1248d1ae, 0x652e9ea9,
14565 0x67c5b172, 0x4b42b8c5, 0x697fcb2f, 0x8e504659, 0xb4df80b7, 0x3389fc08,
14566 0x4f7dd809, 0x2013fd3a, 0xf7d1ee8f, 0x226d41ac, 0x1167dbf8, 0xbdcef3b0,
14567 0x9c33cacb, 0x6798c9fe, 0xe3006cb7, 0xceb3dd18, 0xf9561e60, 0x523e9f17,
14568 0xa2f08a53, 0x5065c13f, 0x3db9679f, 0xf133c995, 0x6f843d9c, 0x3ff3fa2f,
14569 0xdaf9606e, 0x0ed79701, 0x0fe1097e, 0x8c1128b7, 0x61ecb42b, 0x96b95bc6,
14570 0x30fc87cd, 0x65a9e903, 0xf831654f, 0xa9af494d, 0xf2ddec18, 0xdf715bdf,
14571 0xe983f1f7, 0xcfb12798, 0x7c02afe5, 0x37434ad8, 0x4d9a7d81, 0xf7bb01c7,
14572 0x1537dde3, 0xfe42dc03, 0x39bf03ad, 0x4d9d7f1d, 0x462717ed, 0x64bf7796,
14573 0x33ee2647, 0x5afeac9b, 0x133aff98, 0x9db82383, 0xfee14f9f, 0x17fe78f2,
14574 0xd5aa9f7c, 0xdfa938e0, 0x5c9c6235, 0x3a7585c8, 0x0de637e2, 0x9e1293cb,
14575 0xf1701867, 0x99fec73c, 0x97854f2c, 0xbe752ead, 0x37c947e7, 0x253c0094,
14576 0x8b57f2a9, 0xe4475967, 0xb2a4940b, 0x5cea9678, 0xb322e5a2, 0x7aed73a7,
14577 0x4adb27a4, 0x9454e2c2, 0xbfaec09e, 0x06991a36, 0xbbf2bce7, 0x9e02d7c3,
14578 0x20d45ff7, 0x4799e49e, 0x28933e30, 0x56f2f1b1, 0x004e740f, 0xadfd8c7f,
14579 0x954960eb, 0xa0157b2e, 0xefa749f4, 0xffe45481, 0xaf1842d6, 0x2c745fea,
14580 0x059f72bf, 0x59dd0cfd, 0x795f984d, 0xea833dee, 0x33fc4e7c, 0x3e605648,
14581 0x6fdf6e65, 0xdb604e31, 0x279a8d23, 0x15aa44fb, 0x1825a6f9, 0x36398e99,
14582 0xce50bad7, 0x1f7efbca, 0xee43bb04, 0x91024194, 0x03579d0e, 0xcb82d3e7,
14583 0xc7f5fa09, 0xb035db77, 0x3f3cd95e, 0x7fff7066, 0xbee3f14e, 0x4205c445,
14584 0x3749bf2c, 0xc7ec08f0, 0xdf03e5e4, 0xec7ac20c, 0xc05a6871, 0xb68baa7f,
14585 0x9f65dfa0, 0xd9acfd05, 0xbe2b797d, 0x2bd9cb41, 0x1b0718ed, 0x6ceee57c,
14586 0xf3a7e7cc, 0x3cca3f1c, 0xf9654a1f, 0x8b3ef248, 0xfc99f406, 0xa8c0f104,
14587 0x0aa523b2, 0x968a7ee1, 0x07df3f69, 0x8e1e4a7a, 0x0a3f829b, 0xaa4354f4,
14588 0xcdd0077f, 0xa5a4b9d0, 0x892e7666, 0x2db5a79f, 0x9c176f7d, 0xfdc2d9f7,
14589 0x4ff707b9, 0xbffe859e, 0x7582594e, 0xf960e0b8, 0xb2a42f95, 0xfc48e278,
14590 0xd63cc41f, 0x65bf7ddc, 0x02e28d7a, 0x8c7597fa, 0x574ee45e, 0x5f19f80f,
14591 0xde63f049, 0x611d75ee, 0xeccdc62d, 0xa35c7f27, 0xd677ecc4, 0xb2d33d33,
14592 0xe3cfed93, 0xd29737f7, 0x921ebf2f, 0x0cbf4c33, 0x764eff95, 0xf4e2efcb,
14593 0x6fbcdfca, 0x5efdea21, 0xbf12fdbc, 0x8f611bbf, 0x9637f5c7, 0x50f2231d,
14594 0x61c786aa, 0xd84db4f6, 0x9e554149, 0x9f95954e, 0xfbaa343b, 0x47649f5f,
14595 0x3b79107a, 0x72caed29, 0xfe8fdbc8, 0x4edfa088, 0x3c8915e4, 0xcb1560a2,
14596 0x8c6a09f7, 0x4dd12e78, 0x687f30ba, 0x124b091c, 0xf006d7fa, 0xe42a6dfc,
14597 0x4fefd111, 0xff62e6a4, 0xa567899b, 0x22a6e516, 0xc826fc01, 0xb802493f,
14598 0xc1161b43, 0x7159b778, 0x9fe4133c, 0x033ee124, 0xc7dd39f9, 0x35a756f2,
14599 0x3a43b8b0, 0x4e50cfd5, 0x697467cf, 0x3cc7ab9a, 0x22579156, 0x5e044ff2,
14600 0xd3be38aa, 0x01ca2c27, 0x54f228b9, 0xe53d99d6, 0x39c11760, 0x1cbf3868,
14601 0xbcf3346c, 0x776fd613, 0x4f9e2e63, 0x2979b2fe, 0xf91678f1, 0x7f44fa29,
14602 0xe46cbba6, 0x37416739, 0x7089eb31, 0xecc7dc6d, 0x3d06aafc, 0x71b063ce,
14603 0x072bfa06, 0xec04351b, 0x037eaa81, 0xf1b8c3a3, 0x93d5ce36, 0x872bf430,
14604 0x054f204c, 0xceca5c3d, 0x085beba5, 0x6d83e0fe, 0x524ef33b, 0xd6d43fde,
14605 0x9341cf8b, 0x12bdabd4, 0x03cea1cf, 0xb48df5c9, 0x1af95afc, 0x6689b7c8,
14606 0x6a849449, 0x96faafd3, 0x60c4f54c, 0x287df472, 0x7be1bedf, 0xba3e3cac,
14607 0x9beda245, 0xed623ed3, 0xa9d33681, 0xefff5ed8, 0x57eb41b5, 0x267f7fd0,
14608 0x351cf9f1, 0xebf464ee, 0x3f41123c, 0xa57fd712, 0xadba3e4c, 0xdc9fb47a,
14609 0x54951f3c, 0x8854fcf3, 0x7b72d0f8, 0xefc6315a, 0x13d944ad, 0x030cfa81,
14610 0xe30827b3, 0xccf1f687, 0xf4e46d6f, 0xbf843240, 0xf208206a, 0x81c73dae,
14611 0xe7c90fdf, 0xf310863d, 0x8ff1b19b, 0x9e0578be, 0xb679124b, 0x6733d884,
14612 0x36f9815f, 0x135af2aa, 0xdb29a73f, 0x7bbce133, 0xc1db8ebb, 0xe6c47cbc,
14613 0x04f3885f, 0xddf6a4be, 0x507e1bd1, 0x7674fc04, 0x41f30fef, 0xa7a8ddce,
14614 0xe45184fb, 0x933a595a, 0xeb3a836b, 0xb77e894a, 0x016fe6c6, 0x32c77c3a,
14615 0x311c3a6f, 0xa9549b9a, 0xc1bc0077, 0xd780b4e7, 0x8e274e64, 0x473e0cd9,
14616 0x3c824fb5, 0x1b1376d4, 0x7b2fd937, 0x7f845cf1, 0x851b74b6, 0xf2625dbb,
14617 0x88947e9b, 0x92a15576, 0x26c87108, 0xcb55ee7e, 0xcb9688e5, 0x1b6e7f91,
14618 0xc1a997c8, 0x13ef4d78, 0x7fe7b05a, 0xbfe2e3cb, 0x9f9f51cd, 0xb83371e8,
14619 0x569673c5, 0xcfe802b9, 0x523aaba5, 0xab40e94b, 0xfd7084f7, 0x37186d32,
14620 0x772b603e, 0xa5efd00f, 0x42951fec, 0xe67b773e, 0xbe214a8f, 0xdc7a75a7,
14621 0x8f7298be, 0x357fd19b, 0x59bc03b4, 0xefc14b5a, 0x97f5b5fb, 0xfa2bfb48,
14622 0xf50dfdf2, 0x35706063, 0x7059a319, 0x9359fe6e, 0xffac3b7f, 0x30c7f985,
14623 0xfa40fc2e, 0xaf21f7d1, 0xd18ea8e3, 0xe793305d, 0x69ee93e3, 0x0eee9409,
14624 0x5e7839e7, 0x1ebf8b0a, 0xa8fcc09e, 0xfcb17e54, 0xe61289d1, 0x66ced621,
14625 0x266f62e7, 0xfa018e91, 0x68593a3d, 0x1c8af4fd, 0x796b7fb4, 0x77f4c89e,
14626 0x7eb0097c, 0xca8f6fd3, 0xb2c7f720, 0xeb746ee7, 0x3e188194, 0x975149be,
14627 0x97542e6f, 0x9751e5bf, 0x97f15dbf, 0x9365b109, 0xe8107bd9, 0xdf8955f5,
14628 0xb10d7147, 0xa4ba7f23, 0x935dd820, 0xe7e74a5f, 0xe53e5989, 0xf17ef94f,
14629 0xf5820aa5, 0x5b8d3b29, 0xfdcf508d, 0x3f5e5aef, 0xd98c4dd9, 0xea07c44e,
14630 0xf3c4a8e9, 0x93185d32, 0xb1ef7b22, 0x6d343f33, 0xecfda7ab, 0x1f20af9d,
14631 0xe43558a7, 0xa5ebc09b, 0x04c3b446, 0x289bb45f, 0x963c537d, 0x819a338f,
14632 0x9e75dbde, 0xd697d0f5, 0x2f40506c, 0xb1182657, 0xc83fed6f, 0x9b96d7a8,
14633 0xcb4ec40c, 0x63371f07, 0x3e265cb9, 0x20a123c8, 0x51e786ce, 0x0ad4279d,
14634 0x60eda5f3, 0x160eedbe, 0xeb96d757, 0x7ed3cf51, 0x3e0f5d71, 0x9c1109a1,
14635 0xf98ca57f, 0xc1661ca6, 0x7c247477, 0x6be734ff, 0x518486ad, 0x7bb3a58e,
14636 0xfed10e39, 0xbf83dfa1, 0xdfa0f6d2, 0x13b950ae, 0x271bcfea, 0xc0a8b9e0,
14637 0x592f79d0, 0xda15c003, 0x67e87cb9, 0x3f04f2e7, 0xa542f90b, 0x852bbe5e,
14638 0xf8149030, 0x053b050f, 0xfb8204ec, 0xccb71100, 0xd97a8a34, 0x0da6fd0b,
14639 0xe0e767b5, 0x56997852, 0x60253585, 0x27f1bca7, 0xe4b1c3a0, 0x931a6145,
14640 0xe429e213, 0xc3c316c5, 0x19af6a47, 0xef0a3d6d, 0x9b0cf2c7, 0x84c7ad9d,
14641 0xad4be00c, 0xe8064279, 0x478776cd, 0x0b94c5f1, 0xae6a76e9, 0xdb45f013,
14642 0x35adf2d1, 0x18e5f2c7, 0xc69854fd, 0xe76d00e4, 0x1ef0a24d, 0xc0192934,
14643 0xdb8ca3bf, 0x7cb5c6cc, 0xe9bae3bd, 0x41ddb4b8, 0xb6971d1b, 0x843266db,
14644 0x8da30935, 0x78c0a15f, 0xa2971a97, 0x833f911d, 0x93a503af, 0x0ec1f820,
14645 0xaf4834da, 0xf2be7833, 0x1e3664c1, 0xffe75429, 0xf8e99be4, 0xcea65f98,
14646 0xda51b9f7, 0xfa7a01d4, 0x56c25369, 0x3837cfa0, 0xfcb61cdd, 0x69d83e43,
14647 0x382bcc6f, 0x71267284, 0xd1100779, 0xf28bd20c, 0x0bc1c846, 0xa1cac769,
14648 0x8de1e54c, 0x0fde7469, 0x079d1ee4, 0x3c721f9d, 0xa5f68f9d, 0x56935bd9,
14649 0x417e1236, 0xa06e029f, 0x218be053, 0x5f838d3a, 0xa5b91bd0, 0x37251317,
14650 0x9e173b53, 0xa425eec2, 0x2bc5e595, 0xa3f3c399, 0xd8dd3e44, 0x18d1e6ca,
14651 0x746fb844, 0xe6f318fc, 0xffe718ee, 0xf735c01e, 0xbef04fca, 0x3f9ee222,
14652 0x1477f601, 0xc96979de, 0xc6f07bff, 0xca97f9db, 0xcf8b1f0f, 0xacd2f8c5,
14653 0x1e1f989d, 0x7cc56d98, 0x3f3c69f1, 0xc1a0d036, 0x0fdd00b8, 0x85a23ee2,
14654 0x97204318, 0x5cbb72a7, 0x45785b9c, 0xe0d6fe62, 0x7d45068b, 0xde7c513f,
14655 0xe97982b8, 0xbf2c65c1, 0x6f7ec87c, 0x1f7ed056, 0x9cfc73d2, 0x93317744,
14656 0x28f7dded, 0xe689fbea, 0x44fdf513, 0x7121ed0b, 0x32948a6f, 0xdddfbf9c,
14657 0xbbfe9043, 0x9f58b96d, 0x88fa65ae, 0xa3e9837c, 0xbaa21cee, 0x399d691f,
14658 0x94f31134, 0x46c15e78, 0x6ff83fc8, 0x9a7e0bf2, 0xc2fca926, 0xc9afe543,
14659 0xf0e6dc2f, 0x5b3a02ef, 0x92cde458, 0xebd63d28, 0xd2987f99, 0x8108a6eb,
14660 0x7cd6c574, 0x44dda7d8, 0xe4d2df5a, 0x02febd21, 0xa53275e9, 0xbd153cd7,
14661 0x15fc61ee, 0xe82d2144, 0x0b4e8875, 0xfd00f3e3, 0x6edc60fb, 0x5befef47,
14662 0x6fd35f60, 0x683cb0f0, 0x2f19d796, 0x59e0621f, 0x5c783320, 0xf3c22d5a,
14663 0x0f13f43a, 0x4df0e5cf, 0x12a69d2c, 0xf1631fc6, 0x824caa4f, 0xfe6192b6,
14664 0x6ffd9931, 0x7c43b8c1, 0xcfdb08f4, 0x6b5b808e, 0x739a7a45, 0x057f8b07,
14665 0x802ecc2c, 0x1d1a5838, 0x7f1f267f, 0xdaafa74e, 0x4a66ed01, 0xfa610f0c,
14666 0x167f850f, 0xdfd99faf, 0xb370798c, 0x63c775aa, 0x2f2120ed, 0x2e6ddc45,
14667 0x7dab7f6f, 0xd2f20ea6, 0xe3aad767, 0x64ef735d, 0xb339b6f1, 0x25ccfdd5,
14668 0x7cc13fab, 0x03aad24d, 0x53bdcdfc, 0xda49ff5d, 0x026c9c50, 0x710ec9c4,
14669 0xe520d03f, 0xd7a3e013, 0xba6f1793, 0x84f9d287, 0x8095149f, 0x9486f0df,
14670 0xd04f6dc6, 0x271bb3f2, 0x94f5f961, 0x28ff7eef, 0xc0296fd4, 0xe25c3572,
14671 0xe056fb04, 0x8567ca43, 0xc8cc77e5, 0xc27d0049, 0xe087bdfb, 0xdfd9b77b,
14672 0x73b6933d, 0x3cc5c94f, 0xd7ee6ad6, 0xeac85c18, 0xc6d2be6f, 0x52ef9552,
14673 0x6d5c5fd0, 0x1d35f766, 0x04bb7e29, 0x73abaaf2, 0xd5e4b979, 0x243e5049,
14674 0x3af7827d, 0xcab66b9c, 0xe92d0eb0, 0xb93ecfcc, 0xa44f0a50, 0xf276a978,
14675 0xbcd99bfe, 0x4b9e4b6a, 0xaea93e07, 0xf64cfd62, 0x41e67654, 0x2c79cd3b,
14676 0x26374b9f, 0xbf05fe00, 0x957df0e5, 0x5c7d2bb0, 0x3de4bc4e, 0xfb4491d6,
14677 0x0f2519f5, 0x7157d14c, 0x664bdd8c, 0x7d03e765, 0xfc191cde, 0x2cbcd3f4,
14678 0xb8cab6ef, 0xe1e40d3c, 0x297d7e2d, 0x2c6ecbcc, 0x1179043e, 0x65951589,
14679 0x246da798, 0xfe94beb8, 0x3f03a7c7, 0x5649fd5e, 0x559d1002, 0xbe82ff4d,
14680 0xafba0a66, 0xe537d356, 0x65e9c9db, 0x2adf9697, 0xd30d36fa, 0x3ef658f7,
14681 0xe102ab85, 0xaf5a86fa, 0xc7138d0d, 0x8ee3f19f, 0x2fe03725, 0xc30efe56,
14682 0x987c8bd7, 0x798dd901, 0x825da7c0, 0x38026f4f, 0x9e089af4, 0x3c96ca8f,
14683 0x7180f093, 0x7a88c785, 0x055f8e2f, 0x33e0997c, 0x1709192f, 0x6ec2c9fc,
14684 0xf02e7f65, 0x7af064a3, 0x38979dfa, 0xe3a2e187, 0x7a0e91df, 0xcf0611fc,
14685 0xc995a966, 0x112fbe19, 0x311697fe, 0x7cf53edf, 0x1eeccdcb, 0xcbf83703,
14686 0x3c527630, 0xcbee0869, 0x9f310758, 0xb3e7d700, 0x9e9b3e8d, 0x4736edce,
14687 0xedcfd23d, 0x283aa354, 0xff74c25e, 0xd41e700f, 0x7ec1f704, 0x62f1216f,
14688 0x47d29cfc, 0x6ec63d20, 0xe3c6f012, 0xb90c65a9, 0x789f3f1a, 0x5baf0cfc,
14689 0xe29e0d24, 0x7cd0e1fc, 0xf19e732f, 0xaf4b8af6, 0xb93a5bf6, 0xec39d17f,
14690 0xfa842c4f, 0xa0f6625a, 0xe123d13f, 0xda96af7e, 0x6ba7201f, 0x71fa086b,
14691 0xfa0d569c, 0x321d8513, 0xff5c9f16, 0x6ab7264d, 0xf73f089b, 0x4f17e6c8,
14692 0xe064a98f, 0x1ad6787e, 0x800b0d95, 0xaaac1bff, 0x56b50673, 0x4e788f16,
14693 0x503211c8, 0xa87f7a06, 0x0fef423c, 0x8a1c8194, 0xf6ae7fbf, 0x3b7bf322,
14694 0xacf84a2f, 0x032b1cf5, 0x19acefbd, 0x56790328, 0x14fef767, 0x13dc55d6,
14695 0xbdcf8f19, 0x97911ae9, 0x1a745972, 0x0e2247cf, 0x7fe6c47a, 0x3fc63d39,
14696 0xa08a5675, 0xcbb5759f, 0xcfe7e7ce, 0xd8767a01, 0xefc12a73, 0xaad8db34,
14697 0xd138bb03, 0xce903fe1, 0x5f17e8e4, 0x9a17e6c0, 0x56de3c52, 0x66587fed,
14698 0xee1e22c3, 0x81b878e5, 0x9bf3d9eb, 0xa90fb8b4, 0x0d3e16f6, 0x9bc0a0a1,
14699 0xbe42123a, 0x147ea2f5, 0xa79dc6f7, 0xda185506, 0x7d436f3f, 0xf557f8bb,
14700 0xb09b2718, 0x1894435e, 0x6431397d, 0x327fdd56, 0x5553a779, 0x5d37a2be,
14701 0xbecafed5, 0x717d555c, 0xfeaa9278, 0x544b37aa, 0x54c8b2e5, 0xdfabfb55,
14702 0xaf9552a9, 0x6aa19819, 0x3df403bf, 0x4e37e3c5, 0xffbd52cf, 0x37f4e368,
14703 0x5d7d3e21, 0xefaa3bf4, 0x043f704f, 0x85237a09, 0x040bfe74, 0x53ac5ebd,
14704 0x9acd4f7d, 0x7c0e54b0, 0xac16fecf, 0x95f77966, 0xfdb16314, 0xdb52ec2d,
14705 0x28903713, 0x84b62be6, 0x40984f24, 0xbeba9dde, 0xf107afb1, 0x0f7ba97a,
14706 0x6be6b826, 0xc69754c0, 0x22633b51, 0x0d5c8220, 0xf1638379, 0xbfd6a5fb,
14707 0xa97fe480, 0xd5b837f5, 0xd4526feb, 0x54296feb, 0xa3cdbfaf, 0x0ac4ff5e,
14708 0xbc3bfaf5, 0xaa4ff5ea, 0xb27faf51, 0xa9febd4f, 0x9febd573, 0xffaf57e6,
14709 0xbaf506b8, 0xd7aab667, 0x7aa97b3b, 0x4b82735d, 0x74f1f554, 0xc849e820,
14710 0xf795bccf, 0xa453dbaa, 0x42e86268, 0x5f02d9d0, 0x8d63e603, 0x35487aef,
14711 0x4c7d3c5e, 0xf48f3c20, 0xe547d22b, 0x727f6e38, 0xa97aa0ba, 0xda325c6a,
14712 0x73c03719, 0xff6e04ee, 0x33b746fb, 0xd58afc84, 0xe6fbb1eb, 0x08dae4b1,
14713 0xd1f7c57d, 0xd82bea63, 0xf7869b47, 0xefd163d1, 0x59ea84bb, 0xfa357c1c,
14714 0x33b0eecf, 0x999a0e38, 0x5429ff3d, 0xd1db435d, 0xde141536, 0x743e6177,
14715 0x93cd77fc, 0x1df20fd1, 0x7183abd2, 0x7c1124ef, 0x7c5123ce, 0x755d89fa,
14716 0xf10165be, 0x645fb9e9, 0xc9a9e009, 0x7a0e5038, 0xa3fcc2ff, 0xee7c63ef,
14717 0xdd65d248, 0xe21c7207, 0x3909e33f, 0x49c9e5c5, 0xf2d10388, 0x27f71339,
14718 0x8ae2897a, 0xee29e7c1, 0x269bacf7, 0x5a259ea1, 0xd5b1e633, 0x9ea12edd,
14719 0xf60ffbaa, 0xf4c71f6c, 0x52e788da, 0x6e2ed781, 0xa13b301f, 0x62dd0e0f,
14720 0xadf890fc, 0xec7a8f68, 0x3fb4deb0, 0x47f98716, 0xdbb17f76, 0x25dce0c8,
14721 0x89c2b911, 0xdd7106c7, 0x7ce1fd61, 0xe0c8db9b, 0x4623a5db, 0xe264efc0,
14722 0x31f0fb47, 0xd63c8a99, 0xefd624ef, 0x17f05cd1, 0x7e6fcd9a, 0xa9f21aab,
14723 0xf472e0e5, 0xa88f7fdf, 0xb677f7fd, 0xffbfe84a, 0x3e9b851e, 0x1b8f76dd,
14724 0xef28b2f4, 0x1e21b802, 0xfbe8ed00, 0x04ab7754, 0xadafb1fe, 0xb10f3dbf,
14725 0xbfb25f76, 0x83087ea1, 0x3d60fe0b, 0x83367f85, 0xd281b7d2, 0x11efb6cb,
14726 0xfbc61ff4, 0xa969c76b, 0x31fc8106, 0xc097bb1d, 0xfb67af2d, 0xbb1ec3e2,
14727 0x7444cfca, 0x7a47380e, 0xf20e7b29, 0x9cc54fbe, 0x3474a0d3, 0x1fbafdea,
14728 0xa47cb065, 0x44c8b6f6, 0xe39e4b88, 0xdb87d771, 0x56b2c4de, 0x265e60f6,
14729 0x88e5f7dc, 0xa2ef5ef9, 0x4e7231f5, 0x63efd2b6, 0xeace8de4, 0x1e6bcbc3,
14730 0xbc608b69, 0x25efc753, 0x5ee3347b, 0xbfc63fbb, 0x6e38cef2, 0xc4831927,
14731 0x69b8429e, 0x4f4eff4f, 0x5a3f4023, 0x762a7cbb, 0xd3706d1f, 0xeef562fe,
14732 0x1b1264c5, 0xf6d9587f, 0x88fdc20e, 0x6743f7e4, 0x36127c86, 0x641b7c51,
14733 0xdf4d0338, 0xe511b86f, 0xaf76deaf, 0x1aa1ee07, 0xb7067f0b, 0x7e56217c,
14734 0xdf8e387e, 0xe7e5c5cf, 0xc9d16d93, 0xdb7b4e30, 0x5d6f0a80, 0xfdf1176d,
14735 0xc452369a, 0x7ac43fea, 0xf4828d4d, 0x42d28a73, 0xf27ae204, 0xc1fc0d80,
14736 0x10263ed4, 0x8db9d67f, 0xb8306f18, 0xa2e4bc18, 0x9e63e90b, 0x3e00c19d,
14737 0x1f4a4cbf, 0xe1d52fef, 0x4cbefafe, 0xefbfb62b, 0x780fe337, 0x29eadf29,
14738 0xc37fb41a, 0x61c7867c, 0xf973d3f8, 0x0fbf6449, 0x5d3e80e4, 0xd38538c6,
14739 0xf1d70b3e, 0xf027f6cb, 0xcc1137ae, 0x5a67d647, 0x5cb85ed1, 0x6a19dd38,
14740 0x8fe3c7bc, 0xffe509e2, 0xf74f1c7d, 0x93fcc83d, 0xf04fddf7, 0x4a59053c,
14741 0xe987caff, 0x87971c6a, 0xcf87c4a9, 0x082a36ae, 0x465eb00d, 0xed409fe2,
14742 0x8d8bd211, 0x82a7e04d, 0x80ecaf7a, 0xaa2788d4, 0xb9e1335d, 0x1764e2a6,
14743 0x6bdae3b0, 0x13c08b3f, 0x2f801162, 0xc109037b, 0xab98bc55, 0xf877c740,
14744 0xd7813959, 0xe565cc27, 0xe89f5e44, 0xef4ce563, 0x0035520b, 0xcb471716,
14745 0xca6f3ab4, 0x80bc7907, 0xfcf173b0, 0x84cd8d7e, 0x73ab0bcb, 0xdfd43566,
14746 0x8b9cf049, 0xaf09ffa8, 0x5f1eb34f, 0x637a0799, 0x0dfbfab6, 0xd6a90f1c,
14747 0x30d35de3, 0x17aea6de, 0xeb64acf1, 0xfbf137f9, 0x53fd7522, 0xf59b7bfc,
14748 0xd41a647c, 0x7fc7abe7, 0xac5bd79c, 0xca8def2c, 0x037f767e, 0xd78c7faf,
14749 0xc61ea09b, 0x5af5642f, 0x6f09df71, 0x18e1c9d7, 0x431e33e2, 0xbf33260c,
14750 0x233696f2, 0xbf3c57f2, 0x73f707dd, 0x9bf30d95, 0xf519297d, 0x32fb86de,
14751 0x5049dc98, 0x51debc06, 0x77a8a2e4, 0x37cc65da, 0x48f5bad0, 0x972b064f,
14752 0x871f9c27, 0xead489e4, 0xe4c64461, 0x9ae8a5f4, 0x9005f012, 0x0ff4596b,
14753 0xfbe33ae8, 0x918fe21a, 0x664de973, 0x83e58fe2, 0x39554e05, 0x5574cee5,
14754 0x5cecd77b, 0x74b5bd55, 0xcc9eaa92, 0xdc9f2276, 0x5ccbe9cb, 0x17aaa254,
14755 0x6d9065f7, 0xb59d9dbc, 0x554fe5d3, 0xa85f3bb5, 0x9f8d0224, 0xa3dc49ba,
14756 0x7c8231e6, 0x9b96d7b8, 0xb3f8fc0a, 0x4e440ab6, 0xf627e53b, 0x1ba7f3b4,
14757 0x54fa598c, 0xcb10b978, 0x7e583bcf, 0x879b7b7f, 0x9e087395, 0xab6f6faf,
14758 0xca2ef2c1, 0x69fcf09f, 0xdb9f179b, 0xcfa15969, 0x2bfda47f, 0xda1e9fb4,
14759 0xa19f943f, 0x3373c3fd, 0x3f9e1fed, 0xfd43fda1, 0x942fda06, 0xc170a69f,
14760 0x0fda29f3, 0xed31ffbc, 0xb44fca1f, 0xb6bcb0f9, 0x1f962e6d, 0xf3e3f36f,
14761 0x7c06b6b1, 0x8ad6d9df, 0x96db47e5, 0xb6e1f3e2, 0xdbdb3e20, 0x2f7d6256,
14762 0xf9e793a7, 0x2be7dc79, 0xf103bdd9, 0x219fdfeb, 0x9d2fbb61, 0x154a539f,
14763 0x3f2ab97a, 0xfc033fa7, 0xfceabd02, 0xc21fc054, 0x8c786261, 0x0668e387,
14764 0x91270fb3, 0x930b72c8, 0x1f07181f, 0x6159e7df, 0xae35fca1, 0x4e7bad95,
14765 0xd3eb145f, 0x4778d81a, 0x5c409db9, 0xce519241, 0xbb439b8e, 0xcaa45273,
14766 0xd007f2c2, 0x14dc430f, 0x5aece53f, 0x21e64672, 0x5725c00d, 0x331e3d50,
14767 0x397c21af, 0xb7809c18, 0x57fde0d1, 0x696d378e, 0xa75fbb2f, 0x6c0c2ba6,
14768 0xe2b6f666, 0xb9c63afd, 0x9f4cb0be, 0xef1f9f2e, 0x717498e9, 0x5224dd3a,
14769 0x9bf176f9, 0x8ccfa144, 0x31fef526, 0x6a89417d, 0xb8bda67f, 0xd1572886,
14770 0xfbd48b7e, 0xbdfe733c, 0x198cefaa, 0xf5eaa90f, 0xfaaa15ae, 0x1e73bbba,
14771 0xc73e0371, 0x6199b8b1, 0x210272f5, 0x4fdd85e4, 0x4ce65c20, 0x92738f36,
14772 0x605f7ec2, 0x133dff37, 0xd6797fbe, 0x5c65f1ce, 0x09f2fb8d, 0x482c560e,
14773 0x0f406a0c, 0x448bfc7d, 0x9e3b7f94, 0x7e9fa0d1, 0x40690922, 0xe6a64cde,
14774 0x015fd424, 0xf16b8c37, 0x942d26aa, 0x85a2898b, 0x8a2455f2, 0x7fba3afb,
14775 0xf5d264d1, 0x9ffad16b, 0xd9f2d131, 0x2cb3ff4c, 0xfa8c30bf, 0x67af80ba,
14776 0xadc7d881, 0xdcfde397, 0x37f44cc6, 0x7625cfa9, 0x874bfdf0, 0x970df989,
14777 0xc153ca3b, 0x46373e0e, 0x7dcda83e, 0x14058de2, 0x63b4b6df, 0x1fef14f8,
14778 0x9ea33457, 0x94cbcfd7, 0xf75e5abe, 0xd44faa7a, 0xf307937c, 0xcffa5b38,
14779 0x6b76e029, 0xff228fc9, 0x3c84e874, 0x9e411253, 0x893d970d, 0x3b1e6624,
14780 0x93c9deda, 0x11fa2151, 0x375f326f, 0x4ff95f31, 0x4bc87695, 0xd179e02c,
14781 0xf2d2db3b, 0x7f0fc7ab, 0x5074e3ef, 0xa0352248, 0x348b0b5f, 0xe074109e,
14782 0x31fcabb5, 0x2f2efca6, 0x4b930b9c, 0xf2c40788, 0xf785d244, 0xd57fc829,
14783 0x7c9a3e62, 0x50a21af0, 0x0d6ad8fb, 0x70d16093, 0x75fb84bf, 0xfce5cfbe,
14784 0x9c6af667, 0xec259c8f, 0x74e80f26, 0x1bd599f2, 0xacfc3a01, 0xf4d8c75b,
14785 0xd0bebab8, 0x2def504a, 0x1487d42a, 0xebcbee09, 0xe5407bc2, 0xc8c9122d,
14786 0xb9a63801, 0xdf7e83e7, 0xb63a416b, 0x9fc72fac, 0xe359b830, 0x0efc40af,
14787 0xc2357b28, 0x9aeda2e8, 0x82b7eb27, 0xf001393d, 0xdcbc0562, 0x430d5f91,
14788 0x1e2217e7, 0x2f79f217, 0xc8e8f3e4, 0x833fc21c, 0x70bc7887, 0x6ea2ef1f,
14789 0xcf528fe1, 0xaad2f1f3, 0xa2bdc36f, 0xff2d11ed, 0x3e352299, 0x5322e957,
14790 0x70c34be6, 0x66173851, 0xb8015c82, 0xd80f82af, 0x919f9afc, 0x941cc6c8,
14791 0x6f68356b, 0x3f306994, 0x9b2e9e3d, 0x8fdc9932, 0x7dd9d866, 0x4853eee4,
14792 0x93e5c3cf, 0xc2482c6f, 0x5bb333fd, 0x8fcb326c, 0x58957af4, 0xe12af7bf,
14793 0x72e7e45f, 0xa1de1ccc, 0xb127057b, 0x892b60bc, 0xb4bc87ac, 0x2bf5f6b1,
14794 0xdc707332, 0xb53d7de1, 0xa53f205d, 0x5c7988cc, 0xa13e44ab, 0x69995472,
14795 0x57384f63, 0xfa74e465, 0xf79d4da8, 0x6fcf9db3, 0x418f5f3b, 0xf27bc8a3,
14796 0x9cc716d6, 0xafeba9f3, 0x88963f47, 0xff720ed3, 0x1d59a0e1, 0xa4e46d57,
14797 0xaba87830, 0xc1f10cca, 0x6da7162e, 0xdd99bfec, 0xc7efbb6b, 0xed302f78,
14798 0xa87a0153, 0x57ebede7, 0x0b58fdaa, 0x5f91fa77, 0xf164fde3, 0x398a317e,
14799 0xe31fec3d, 0x335b62fd, 0x43c27ef9, 0x7b0e218a, 0x61de7562, 0x7277ec33,
14800 0x1f0f9e08, 0xef017da7, 0x81bba6dd, 0x974fb82e, 0xa3fbb114, 0x54ffd7e2,
14801 0xb2f11e96, 0x78efac53, 0x3ba5da2b, 0xd81c98cb, 0x2dfce079, 0x2b3f69e3,
14802 0xf9d52473, 0x3a399580, 0x29b7a75c, 0x97b3c37d, 0xeed19a90, 0xa9943b29,
14803 0xef726af9, 0xc1eff55a, 0x1c0df734, 0xff2828b6, 0x1fba035e, 0x4279fc3c,
14804 0x1451f211, 0x08c4bf7f, 0xc19930c2, 0x76b3e70d, 0x17993e6b, 0x676f0f4b,
14805 0x36ff58ca, 0x0d2f8ba7, 0xae1ab557, 0xa56f45b3, 0xfd7060cc, 0xb9c6e40e,
14806 0x5894f1f0, 0xb5c0467b, 0x03df8c7b, 0xe2abf0f8, 0x1fad42a9, 0xfa74f062,
14807 0x6ed3c3bf, 0xfcf0e8fd, 0xb3f3c395, 0x9b5eec43, 0x515ff591, 0xe1ab759f,
14808 0x647cfb3d, 0x0a49880e, 0x7f115fef, 0x182993ee, 0xebf8e613, 0x59f4e52d,
14809 0x078fe5ca, 0xc09150cf, 0x1e63577b, 0x924caf66, 0xbe5ca16a, 0x2cf77f00,
14810 0x02c3ef93, 0xbf9e3f1a, 0x4619ef21, 0x64d77f95, 0x9ddeba31, 0x878a8d2e,
14811 0xcf362cd2, 0xb2ea4703, 0xd8f1bfc1, 0x7202063b, 0xbfcf3361, 0x6bdecc7e,
14812 0x05a67b84, 0x425ca11e, 0x747d019f, 0xc7bc2811, 0x2a333f4a, 0xd3c651d6,
14813 0xc6d6f1b0, 0x4f188df1, 0x1564a73c, 0x3a557b32, 0x387385a4, 0x0b7daf6b,
14814 0x5b5b7fef, 0xfdeca32a, 0x1d5ff8d2, 0x5bf0ff87, 0x7a30b729, 0xe1459299,
14815 0x90fe916b, 0x0e5a6df0, 0x2a7fd148, 0xbd157c82, 0xa01fe71f, 0x4691ec78,
14816 0x8b2d29e2, 0x9f988bd1, 0xdb80bf98, 0x5c02dd76, 0x06bbdb07, 0xbca51a54,
14817 0x8917d0bd, 0xbcc1ff5c, 0x2b5c5f50, 0x654c73b3, 0xdafbae32, 0xee78a98a,
14818 0x17cf376c, 0x1fa35e89, 0x164477f5, 0x763dbc70, 0xb811b7f1, 0xafd83947,
14819 0x883ffbc3, 0x15bee03c, 0x8dff1fee, 0x5389f78c, 0xfb81aa7a, 0x391c0ecc,
14820 0xebfb009f, 0x843a59f9, 0x87973e7b, 0x35b51783, 0xc8ec1e78, 0x0c6d7667,
14821 0x6965d7fd, 0x89127db9, 0x35af39c0, 0x8b3cec25, 0xd603db95, 0x001b2723,
14822 0x43c56b7e, 0xde862906, 0x10196566, 0x68fa35ae, 0x17f6878a, 0x6125a7d8,
14823 0x7bc1ffe6, 0xb3ce8719, 0x5a1e19da, 0xbda10f4a, 0xf767ed60, 0x2965d635,
14824 0xb852ce4c, 0xe6f7d2f7, 0xebd99f89, 0x8e94bea1, 0xbdfc3b97, 0xd3d6cecd,
14825 0x4beec65c, 0x3fed7b5a, 0xc83ee1db, 0x471df844, 0x79f2efd8, 0x7292b80a,
14826 0x48dfbc35, 0xcbf81724, 0x5abe632e, 0x235ef86f, 0x2f82fbd8, 0x62d5cade,
14827 0x39f947bb, 0x0a2b4789, 0x4cae7043, 0xdb35b1d0, 0xcc1640ff, 0x0bc5f28f,
14828 0x7c44ef68, 0xf63f10d3, 0xdf33c862, 0x32e64525, 0x076f443b, 0x68d42c3e,
14829 0xe116fc54, 0x549e26eb, 0x73dda3fd, 0xa15da73f, 0x46423bf7, 0xfe4de702,
14830 0x22667178, 0x191da7d8, 0x1af3dec2, 0x259b5f01, 0x8c0e625f, 0xdc5a2ff3,
14831 0x72381e0f, 0xedc601bc, 0xbe02f3a0, 0xeb75f87d, 0x3a53b06a, 0x53e45eec,
14832 0xd0ecbe31, 0xfd60f5f0, 0xdf7bd6ec, 0xd4647f04, 0x3acdeec1, 0x11867538,
14833 0xd3b69fe8, 0xa07f3f40, 0x04f0f7fb, 0xfd1aa7e8, 0xb3ed0b06, 0x8b77c3a6,
14834 0xb011ff88, 0x6b75176f, 0x3c83f755, 0xc2c5e5cc, 0x8e12168b, 0xac2c2fd9,
14835 0x6b9e0ef8, 0x0131785c, 0xcfcc3fdf, 0xcfcc3fed, 0xf8e2edbd, 0x5f3f9978,
14836 0xfb8afacf, 0xde9c4f6f, 0x8eddfe4a, 0xbbf7c63a, 0xa59afd60, 0xfaa83d01,
14837 0xc73f5335, 0x687f64f3, 0x21b093b3, 0xf311de06, 0x98e1224c, 0x5dda8771,
14838 0x52709134, 0xfa32faec, 0x15af9e1d, 0xe6d0ffeb, 0xdd8e3c46, 0x1e1538ff,
14839 0x53cffb87, 0xff6471e1, 0x87ff5805, 0xf44bc2b6, 0xfe8c793f, 0x0ff05473,
14840 0xef8f9bf7, 0x7bac1dcf, 0xeef942d6, 0xc6c57860, 0xf7e14b57, 0x7bf80cf7,
14841 0xb7afa41b, 0xeeb9cf0a, 0xfa0e7822, 0x7a7ffd81, 0x1f52f21f, 0xc0f7aad8,
14842 0xe8ba8318, 0x7a28cf3c, 0x83d89f26, 0x789cef70, 0x87959dbe, 0xdeff1ceb,
14843 0x90ec8728, 0x942c6a67, 0x8ce7a0ed, 0x015a1224, 0x235297fb, 0xdf1139ca,
14844 0x34fefd12, 0xb392ab53, 0x46a17ee2, 0x68d87f9e, 0x26aff161, 0xac2cffab,
14845 0x574d12ff, 0x1f68cfcb, 0xf03b0ba7, 0x0e213b7c, 0xf888d7dc, 0xc5fb0c8e,
14846 0xf97d703c, 0x9b0b9c08, 0x0cffe397, 0x1509fbbe, 0xd1ef102b, 0x0fcdb15e,
14847 0xf38f79f9, 0xa6e3e47d, 0x2313db88, 0xf2d9753f, 0xba1bb357, 0xecb7e8e2,
14848 0x8cc23b77, 0x40d9757e, 0xcfc8dabf, 0x7ce072eb, 0x67bf00e3, 0xb9fb414e,
14849 0xde30f4ae, 0xfc275947, 0xf3e32b02, 0x601d3256, 0x54788b4f, 0x8217e402,
14850 0xdd86b0dd, 0x616f5853, 0x275ffae5, 0xba17b9e1, 0x8114b21f, 0x65add99c,
14851 0x071e22fe, 0x1e61cf3b, 0x02c9ae34, 0x7cf20efc, 0xaffdf397, 0xe7a7bde1,
14852 0x3a478e57, 0x0fe5ffa8, 0xddc31ef1, 0x0d9f4ce9, 0x3ea1b3ee, 0xca7837ab,
14853 0xddcd5ee1, 0xed6ecce9, 0x2509c395, 0xa3ec7631, 0xa7285519, 0x5e395e3f,
14854 0x19271b13, 0xc2e4cd9f, 0x94ffe11a, 0xce70e5a3, 0xf0d2e3ea, 0xdd3ea13f,
14855 0x1bdfc263, 0x53fdecd3, 0xbabfde39, 0x63bf80c6, 0xe277b551, 0x5fb0b9ba,
14856 0x1f31904c, 0x84d7b35b, 0xc55d9cf0, 0x6f8383ee, 0xef35ee41, 0xcbbf871d,
14857 0x62896f56, 0xd9b364de, 0xc1f10053, 0xc0dfbdfa, 0xf1389fdf, 0x902cc4f8,
14858 0x9593c783, 0xfb6fbc2c, 0x3a748a71, 0x26fbe3ef, 0x579df7b0, 0xdb6ab9e3,
14859 0x347f8b1a, 0x4bd088ff, 0xedcdf7f1, 0xd73e2f4e, 0x6899f807, 0x5e1c80f4,
14860 0x675fe438, 0xbfd607f7, 0x24a59d19, 0xf306ffa0, 0xa7edea17, 0xeb1df7f0,
14861 0x49dd8fbb, 0x42e93e30, 0xbcfb15fa, 0xb9eb71f8, 0x8faddafe, 0xd5df83ce,
14862 0xf8e76fab, 0x59f7bfe7, 0xdfc629af, 0x5ff8149b, 0xf31f7713, 0xc5de38f7,
14863 0x1911c4f3, 0x76a4b9ef, 0x8ff81645, 0x2037ec4e, 0x33589dbd, 0x1057ef19,
14864 0x5853d5e3, 0x8f4f94ed, 0xb029953b, 0x15b20bbe, 0xb676ff36, 0xe9ef157f,
14865 0xbdf811f8, 0x2d3ee8ce, 0xda0dafe6, 0xc71009a3, 0x7944ed14, 0x5afd3e68,
14866 0xddb7bdfc, 0xdd7007e9, 0xa0115d29, 0x6d2fcd2b, 0xbf03b7a8, 0xf71bbf64,
14867 0x82092971, 0x8ef8349f, 0x077bf701, 0x9ed019f7, 0x9d977c1e, 0xef711fcf,
14868 0x059a359f, 0x7e06dcf7, 0xdae50e39, 0x0b746660, 0x784dbfb3, 0x51e0e4cf,
14869 0x5e3cd5ff, 0xd1efc69c, 0xefbb034c, 0x18533ec2, 0xc4fa3eec, 0x6c9043b8,
14870 0xfdfbe373, 0x882fbc16, 0x24f9d93e, 0x7f1b8f69, 0xf1748937, 0xfdf823ef,
14871 0x09fe5903, 0xc81fa720, 0xe15bfda3, 0xeed893fb, 0x4affae42, 0x9211598c,
14872 0xc74bc7ce, 0xd9fd337e, 0xccfa5ef8, 0xa80f7ecd, 0xb047d78b, 0x5ff0603e,
14873 0xbdf8f38d, 0x328cf48d, 0x5f7aafcf, 0x49d97de4, 0x6e028eb8, 0x23b4678a,
14874 0x93d2f1e3, 0x029ff6cd, 0x3974f11f, 0x80979eb4, 0x7832fc0f, 0xb63ec0bf,
14875 0xea26ab8e, 0x9ce93c99, 0xde32f68c, 0x27931430, 0x07df7cb8, 0x3a839748,
14876 0x97a0d3ef, 0x847547a2, 0x2d48c3dd, 0x5457f003, 0x16f576b0, 0x7010f7e6,
14877 0x07e7e19c, 0x1e593b1a, 0x3ee799e1, 0x856f9ac8, 0xa81ff3f3, 0xff0bcfce,
14878 0x0124ed21, 0x8f5633fc, 0xc4575092, 0xc22d76ec, 0x6e8f7ec5, 0xdfc14e8d,
14879 0x3e3e0c0b, 0x2712fd11, 0xbc5ecaf4, 0x15d57607, 0x6d27a01a, 0x4fbf9731,
14880 0xfb8979b0, 0x6d3dc4dd, 0xc81978f1, 0x99b2fa66, 0x3b82eff8, 0x25138ffe,
14881 0xf14b0785, 0xff744abe, 0x52cd206b, 0x7e589af6, 0x9185ea3b, 0x2fea42f7,
14882 0xff827bf1, 0xb053e5bb, 0x9f806556, 0xd5e80260, 0x7fb676d3, 0x40225bc4,
14883 0x3cd96bbf, 0xb803e03b, 0x4ef882ff, 0x5bc45e83, 0x4e1e2825, 0x9e3eac4b,
14884 0x1bbc84ce, 0x1ba00f81, 0xa3be17e8, 0x9d9e7f7d, 0x763ff6c3, 0x17943f27,
14885 0xaa5e43d4, 0x490157d0, 0x0f7dc0d6, 0x024a1d27, 0xcec9e5d0, 0xc872e73c,
14886 0x292871f7, 0xe076f6b1, 0x0e7bc110, 0x73ff3814, 0x922efc35, 0x05f80a77,
14887 0xfed53b77, 0x5e787888, 0xfd401ca8, 0xc6985ff3, 0x800053c5, 0x00008000,
14888 0x00088b1f, 0x00000000, 0x7db5ff00, 0xd554780b, 0x733effb5, 0x79332666,
14889 0x84841e4e, 0xe4249840, 0x09308401, 0x0741410f, 0x68151048, 0x85280978,
14890 0x42100793, 0x17b6881e, 0x240cdb5b, 0x41b45a20, 0x768bd151, 0xb4544140,
14891 0x03414141, 0x58a50077, 0x56d56351, 0x880dcb6d, 0xa8311fbc, 0xadadff97,
14892 0xfb5bf5ff, 0x90ce649c, 0xf9b7b5a8, 0x67d9d83e, 0x7b5ad7bf, 0x3bdaf5ed,
14893 0x3f437cdf, 0x756109d7, 0x10f4422b, 0x116dce22, 0xa3109862, 0x42f382dc,
14894 0x11c885d8, 0xca8df3fc, 0x5c3adb89, 0x8df88588, 0xdaf9aaaa, 0x2bc89eb5,
14895 0x1f5c2deb, 0x774675e3, 0xb5f1bdf1, 0x28f250ff, 0x084c21b3, 0x5d3dfe87,
14896 0x1e310f88, 0x90ea7b8d, 0x460ca7dd, 0x09ac2e1a, 0x75ac5442, 0xa51a45fa,
14897 0xbacc4e6f, 0x4285e653, 0x5c6cc775, 0xe34ad899, 0xca2a6f96, 0x1fb29112,
14898 0xd0aaf341, 0xea9e55e7, 0x0a8752cd, 0xeaa8f6d1, 0xebf684da, 0x6a8f9e55,
14899 0xa51eb8f3, 0xdbd627ef, 0x9fa9cb5c, 0x273e7d0a, 0xc5d16b7a, 0x0ab794b9,
14900 0xf280bdab, 0x45da2d56, 0x54782efd, 0xb177f62d, 0x81f7aa3e, 0xf80ba0b5,
14901 0x3a894d60, 0x1ea8327c, 0xe39469d6, 0x7268f7bf, 0xc2fcd157, 0x63cc77e9,
14902 0xd1f7e2a3, 0xd1f44efc, 0xfc7f21e6, 0x82b13093, 0x45daeaf2, 0x2bdceed1,
14903 0xa1c27de1, 0x01727b45, 0x031eb95f, 0x18e3a19e, 0x7808bcf0, 0xbabd20c6,
14904 0xabf04bc5, 0xa0f5487d, 0x4be6bece, 0x98df80d1, 0xae47453d, 0x61b5f7c1,
14905 0xecda8c22, 0xcefe9c3b, 0x8b8f34ad, 0x3d4155ab, 0x193dd28a, 0xdbc68289,
14906 0x2e7cf96e, 0x4dbf73e0, 0xd2917acc, 0x47a7b7d2, 0x46fd285b, 0x21f51fa7,
14907 0x6a352709, 0xae7cf47a, 0x98b93edf, 0x9edcc7f2, 0x7aa082c4, 0x2ce9d63f,
14908 0x6b655f14, 0x718d16ff, 0x78d8d62a, 0x2e5e065d, 0xbf341d62, 0xfe118d8b,
14909 0x8b9704e5, 0x5fb8dbbd, 0xbf464f03, 0x4183c015, 0xa56f544f, 0xe38fa5db,
14910 0x114717b3, 0xe1b4d35c, 0x64e82e9e, 0x2e3483c1, 0xe51f5bfa, 0xff7de675,
14911 0x74780d71, 0x25969be0, 0x8f03fc0c, 0xbc6da44f, 0xde59be97, 0x93d10ab3,
14912 0x7d78d0e0, 0xcbdf42aa, 0x850984f6, 0xda532bfa, 0x9c09288e, 0xac14fb77,
14913 0x8c3cf17f, 0x9871f657, 0xf7c7e505, 0xf3c79f5e, 0xc12bc10a, 0x7a2bb529,
14914 0x96d698bf, 0xdf8209ea, 0x736d3ec5, 0x7d06be79, 0xe79bce74, 0x4c37bb51,
14915 0x4c5c5f60, 0x76467c23, 0xf801b1c2, 0x5df5c619, 0x6f6fa676, 0xb1d7e01e,
14916 0x7ac8575e, 0xfdeb215d, 0x0b7d3040, 0x29ebc68f, 0x82cc24ff, 0xdc0fe5ef,
14917 0x71a6e594, 0x8e3bdf8e, 0xce3c75d7, 0x75fd879b, 0xcffa953c, 0xe59d72bd,
14918 0x733ad00f, 0x8d9d65bf, 0xb757c64e, 0x7b6b8ceb, 0x3acb7c42, 0x6874ea37,
14919 0xab33f3ac, 0xfa8ada3b, 0x9cb155bb, 0x14fb6a8a, 0xcc8d7fdf, 0xd0d056bb,
14920 0x0f4936b5, 0xfc236bb5, 0x6685d7c0, 0x6e7f04db, 0xf1a01f27, 0x583d27be,
14921 0x8f8e1e98, 0x023c3f75, 0xea9f75f4, 0x9701b9f2, 0x9cfcef21, 0x57efc7f2,
14922 0xb1f9025d, 0x0fc47e12, 0xc70fe02c, 0x73278b53, 0xb5cdaf7e, 0xb4f9fa82,
14923 0x047f6ff1, 0x63dc5cfd, 0x5f5e0b73, 0x90b3fdf1, 0xaf82f9a7, 0xc66e5c11,
14924 0xebce54b8, 0xd619ef57, 0xe8f17288, 0xbba65760, 0x0214be0b, 0xaa358ae7,
14925 0x01d21f69, 0x3ed5e3c1, 0x3ac6e290, 0x8713380c, 0xa83a9acd, 0x4fc81e13,
14926 0x9709d41f, 0x9ad0bb5a, 0xfb12fbf8, 0xfc414194, 0x9749f00c, 0x3cff44e7,
14927 0xa2d2c7c9, 0xc873f683, 0x8ff942fc, 0xff48cf51, 0xcc57c1d2, 0x705178fc,
14928 0x1950e09e, 0xc21c5f92, 0xca42aa37, 0xb7ca43ab, 0xf99cfaf7, 0x13f8e840,
14929 0x31bee4d3, 0xc3aa58e0, 0x9145bb71, 0xc53ee47c, 0x2d7e89bf, 0x4bedbab5,
14930 0x8e2ffe69, 0x4fd0f311, 0xae385599, 0xced97de5, 0x8ab52beb, 0x7c02b086,
14931 0x633d70f7, 0x435fd4dd, 0xc3e51c58, 0x7aa21f25, 0x7941ec13, 0xf31adf83,
14932 0xf0934f09, 0x5bc5d230, 0x83c78d9d, 0x14dd59e0, 0xeed7ca6b, 0xee3c6e4a,
14933 0xc62fcce8, 0x6ff4c92f, 0x387ead22, 0xaa7f22e0, 0x8c1eb577, 0xb249fa20,
14934 0xd469e168, 0xff83c5ef, 0x66eb9d1b, 0x262f0fbc, 0xe9a816fc, 0xf5a61d2f,
14935 0x3d56edb6, 0x9befd09b, 0x5f11fcf2, 0x1b787a5f, 0x9bd9af7d, 0x7775ee21,
14936 0x8e143fae, 0x8a5d7717, 0x17efa74e, 0x05c3d90e, 0xcda501c9, 0xd1ed63f1,
14937 0x84babfbc, 0xbb875bbb, 0x6b05dfd1, 0xa094f46b, 0x6b44177a, 0x7a20d4f4,
14938 0xa975dd29, 0xfc31e44e, 0x1f106a7c, 0x8f4f74ff, 0x2f7d2ab1, 0xb1af7dfb,
14939 0xe9c74a16, 0x736fdefd, 0xe686b93f, 0xe61ddbed, 0xbef34cd9, 0x0b2ce6f0,
14940 0xb3785fda, 0xea7f4f42, 0x4fb3f4e5, 0xb47e3153, 0x31bbd245, 0x293488de,
14941 0x8e59954f, 0xfc1a313e, 0x699ed5ff, 0xe59d69f5, 0x2c829665, 0xad9b79e0,
14942 0x7de62e6d, 0x95ab1141, 0xc67eceb8, 0xfdb9b9a5, 0x9f27dd85, 0xf4f87f00,
14943 0x60053efe, 0x6776172b, 0x7e5469e7, 0x5921e3e1, 0xc2f7ea2e, 0xf01ec97d,
14944 0xf7366d85, 0xeede994f, 0xdf60f289, 0x9c61fd1b, 0xf77fe825, 0xa435c355,
14945 0x52f9cb1f, 0xe3934f3e, 0xce8294fa, 0xee2da37e, 0xbf028f5f, 0xb3cdbdf8,
14946 0x7fa59299, 0x8b19e8cf, 0x773f61f5, 0xd5b28781, 0xe26dc261, 0xde782b27,
14947 0x8763c2a5, 0x1172841c, 0xa2e55f44, 0x6fcfbf98, 0x405f7f34, 0x17df027c,
14948 0xaf7f37ae, 0x5aab8d10, 0xfc8b7d69, 0xf682efe6, 0xfb112f8f, 0xe269f8da,
14949 0xd6f17ef3, 0xf54cc26f, 0x0fe74f84, 0xa5c7e60e, 0xc7c11fb4, 0xfefc579e,
14950 0x3defc015, 0x7433af2a, 0xd2d3cb5d, 0x448f1d78, 0x6b6e63fc, 0x598f5e10,
14951 0xe0893584, 0x1c2ecc7a, 0x47e80549, 0xbeab9c08, 0xcdfe613d, 0xfedee4d4,
14952 0x3296a55f, 0xe0b24bdf, 0x05c3b83c, 0xedfd47ce, 0x7e8a9939, 0x791756ca,
14953 0x77e6835b, 0xe47de6d1, 0xdf5790e7, 0xf54d7e23, 0x37f58d8e, 0x1d79a58e,
14954 0xd4f557bb, 0x33af3177, 0xe3f99f24, 0x28f71e09, 0xf2843fc2, 0x2d4c9ccf,
14955 0xde9cbc21, 0x34b5327c, 0x3115fe98, 0x8d1e982b, 0xebc26694, 0xf489ac82,
14956 0xeb05ad18, 0x89d7ad09, 0x0d7cf35f, 0xb1553a78, 0x787a2ba4, 0xe54f7414,
14957 0x05577f39, 0x3d9acee4, 0x33e83f36, 0x0f17e362, 0x6cfa0adf, 0xda40b9b6,
14958 0x2f547bb5, 0x5bb174e4, 0x1ce267f5, 0xba34fe6b, 0xeecce712, 0x68352e21,
14959 0x170e74dd, 0xb0b97ce3, 0x596252eb, 0x1933f72e, 0x9eed44f2, 0xdfa03c87,
14960 0x5cf1e6ee, 0xf1affa9a, 0xff99af3f, 0x20fdcf9d, 0x81f046f1, 0xc0b2278d,
14961 0x3e0f89df, 0x99fd8697, 0x791db5f5, 0x83875a21, 0x2c7e68fe, 0x7ff45fbf,
14962 0xa3a5f2c5, 0xbbfaf559, 0x349ec3c0, 0x07ffc33b, 0xcd026fcf, 0x7e73b12f,
14963 0xe03d9f34, 0x6b3cc6cb, 0x9c766ddc, 0xd11d17b3, 0xb4a7e079, 0x89f989a0,
14964 0x06e4f9fa, 0x289b2d7f, 0xee16bf88, 0x09c2bf9e, 0xf151a179, 0x6f280f40,
14965 0x2adcf956, 0xddfaa0df, 0xecc29784, 0x213bf6bb, 0xe5443e9f, 0x3abc74d4,
14966 0xa8b38fea, 0x54fbc2fe, 0xf8dbefce, 0x80da3fd3, 0x11360dd7, 0x47863c06,
14967 0x63c7d26f, 0x3e916879, 0x37cd45bf, 0xb7a0569d, 0x013d51ec, 0xe51cdfb4,
14968 0xd5b2f7c1, 0xf4c163b6, 0x50bf1f35, 0x2bd7f37f, 0xf81a40fe, 0xc2fcb984,
14969 0x27ce9f30, 0x5c6fbe42, 0x027f7535, 0x89eb2b52, 0x72e6fc8b, 0xf34ebcfc,
14970 0xdf7fd5a9, 0x17a6b99a, 0x29c173f0, 0xabf60b44, 0x1df595b5, 0x054d6811,
14971 0xfeec2f1e, 0xac78152c, 0xb27ff57d, 0xebf81744, 0x51cd4fd8, 0x84222709,
14972 0xc6e74b38, 0xfdd01637, 0x5dc5c9a5, 0x8fb17fd4, 0x6d5b17dc, 0x63905ebe,
14973 0x8afc6ff7, 0xddc5c1f9, 0x17575f5a, 0x5fb9dbf4, 0x124b4e7d, 0x205380d2,
14974 0xbae4da1d, 0xe484fb11, 0x1f417bc1, 0xdd4d569b, 0x6be77944, 0xa2424836,
14975 0xf7923336, 0xfcc7f60b, 0x7d8d7ea0, 0x017c15b2, 0x1fc930e9, 0xe523ec5e,
14976 0xbcbad584, 0xfb5f75b0, 0xe62ecce4, 0x26cd3ab3, 0x923edbcf, 0x2b4dcc6f,
14977 0x9c874f0e, 0x0345f161, 0x75ebc21f, 0x157c1027, 0x97eabe9d, 0x3df0512d,
14978 0xda723449, 0xfa71345b, 0x245a10b8, 0x0b8f0bea, 0x4fa21670, 0x7bc7e02c,
14979 0x31abd79e, 0x8e89fcdf, 0xd06af03b, 0xf8562f83, 0xeaefd337, 0x63508746,
14980 0x46b5ed20, 0xa0d451a3, 0x4beebfa9, 0x540fb6e5, 0x3ed49fd6, 0x2e3d3e06,
14981 0xc8cbf7e0, 0xf8c131e9, 0x74b877db, 0xdeabfa02, 0xf52e7a49, 0x4d877e77,
14982 0x5957a004, 0x3d50bf69, 0xec2fe1db, 0xcd4be069, 0x5cbc808a, 0xaf7c794b,
14983 0xfaf5651d, 0x9792e083, 0x9a91e12e, 0xbb70c59e, 0x9a1ef560, 0x9573fa08,
14984 0xdbd721da, 0xc04f970e, 0x2a4b6379, 0xfb5e63b5, 0xa4758f0e, 0x56b16f01,
14985 0x9aab37de, 0x5c5b718d, 0xf62a3fe8, 0x436f9e03, 0x534445ae, 0xc28f86bb,
14986 0x874c0cfc, 0x3a6143e4, 0x85021b5c, 0xf817770e, 0x14c289f1, 0x77ca8231,
14987 0xcf3013a8, 0x1752aef3, 0x958b68f0, 0x9b308776, 0x9af40277, 0x78b8d8b0,
14988 0x7a446fcc, 0xabffcf06, 0xcf3c25d8, 0x80bc48af, 0x7af241be, 0xbd0df231,
14989 0x7d8655cb, 0x8fbc23e3, 0xfc721d6b, 0x9f2a3da8, 0x43a462a3, 0xbbefdbe7,
14990 0xc89c68ca, 0xd024dabe, 0xa89f3183, 0xf00baf61, 0x858b1ce7, 0x3786b3e5,
14991 0x2f80d722, 0xd21be518, 0xf819bd25, 0x75609958, 0xae3c7f81, 0x574ae7d3,
14992 0x6820a3b1, 0x161eb69d, 0x0ec55e1d, 0xbdbb69c0, 0x97ce10f8, 0x738efa36,
14993 0x54d27f73, 0xaa14f407, 0x273f4167, 0x64c768ea, 0x0ee9dfa3, 0x424177c0,
14994 0x5bb478e9, 0xc2ac9628, 0x5eb85b7e, 0x3e208115, 0xe39360db, 0x211cb82e,
14995 0xc73a4302, 0xe3f8405d, 0xf9a397f6, 0xd653837b, 0xfb92886b, 0x2974cee7,
14996 0xd3d4ae2f, 0x83fa7ab5, 0xccc7baf9, 0xfec7cfd7, 0xe4a94b71, 0x53a677ef,
14997 0xeb4ad5bf, 0xab268878, 0x80edda92, 0x973a89ef, 0xcd058408, 0xc6758af7,
14998 0x38d0408b, 0x3b2ef51d, 0x183e2045, 0x47c66e1f, 0xb9237ae7, 0x125d44fc,
14999 0xfefbb1c3, 0xec704c53, 0x04c33fec, 0xcffb2bc7, 0x7513f2e2, 0xffd1df39,
15000 0x4ffa6ec0, 0xb3bfcd33, 0x5dfc7edf, 0x82fad2ec, 0x22eddcbf, 0xd374c07e,
15001 0xbb2676ca, 0x7606fda2, 0x9871f12f, 0x95f7dc80, 0x0576cb53, 0xe96d87f1,
15002 0x0b9f5d76, 0xfadf80a4, 0x6b4e3ac4, 0x8f1a5d77, 0x0be26ef6, 0xcbd0e76c,
15003 0xcf1b456b, 0xfa02fc13, 0xbab648bd, 0x96977cb9, 0x98c8bd0d, 0xf33c8747,
15004 0x859f48bb, 0x9ed841f6, 0x1f6347bf, 0x4db6b45f, 0xa9aa7d86, 0xde088d59,
15005 0xfdf407d7, 0x17cfb631, 0xd5d7b079, 0xbdf11da0, 0x9c5dee9f, 0x84d4f80d,
15006 0xde61e5b5, 0x2dfef7fb, 0x57c8e70f, 0xc5f7167b, 0x9f54adf7, 0x5b7b0fe5,
15007 0xbfa8278d, 0xb3e5c27e, 0x9b4ce88c, 0xfa1ffdf5, 0xfa9eeb7d, 0x36c7985e,
15008 0x2e483dd8, 0x56f659ac, 0xb078f1c6, 0xe083ef21, 0x16f8825f, 0xa6bb43eb,
15009 0xdf2063a9, 0x0f32487d, 0x96ee87e5, 0x3ed0c372, 0x83496fc2, 0x2ce1f7dc,
15010 0x619a89f0, 0xe1541776, 0x9616fcf0, 0x3987c3b7, 0x9f9f385c, 0xebc193ed,
15011 0xc84e43b3, 0x78a2fb40, 0xf154e7a6, 0x1b6dc9af, 0xe04ff642, 0x68db350f,
15012 0x75b56abc, 0xf78538f2, 0xa9f031d1, 0x78bfb79a, 0x135fd747, 0x8c5a9f81,
15013 0x5f78f04b, 0x432127ef, 0x9a7a893b, 0xabbef5a3, 0x9b8cdea8, 0x1fa15393,
15014 0x99fae895, 0x19404898, 0x1068fcc9, 0x9e5720ec, 0x7a0f52db, 0xc034d14d,
15015 0xf0ec97c1, 0x981afce0, 0x71c91c22, 0xf4fed0d8, 0x57ee34a9, 0x2ec316e9,
15016 0x03de60aa, 0xdf3d35f4, 0x2c6969ab, 0x38fe939f, 0x3b3fd1d0, 0xfbc325ae,
15017 0xa30bf077, 0xdf3787fe, 0xe2eb483a, 0x79e430dc, 0x36e9bdbb, 0x3aadb3cc,
15018 0x9847f592, 0xc9eed0f3, 0x2a02c39b, 0xc8b68aec, 0x3fe7d0d5, 0xb07b988a,
15019 0xfee3c107, 0x83222d28, 0x799acdda, 0x95e42ac3, 0xa5eef1fd, 0xd692e7a0,
15020 0xd3e7c0e1, 0x83262d4e, 0x6872afc6, 0x8969137d, 0xd968fbe7, 0x8be43831,
15021 0x449e25e3, 0x2ee2a0f1, 0x53e72fe7, 0x0ff1c8a2, 0xe8496947, 0xf2d2c4a7,
15022 0x66f855c4, 0x837b616d, 0xfdc1e868, 0x8a8bb79c, 0x037fe4ae, 0x75f4470e,
15023 0x6b89b3ec, 0xf6fad32f, 0xd4f18dad, 0xefcb7cd3, 0x96b7399e, 0xe296f9d2,
15024 0x9a6a80c4, 0x55d61677, 0x9be92be5, 0x79f3f24c, 0x65ef3e9b, 0xaeadbcfa,
15025 0x1cfde0ac, 0x437aef3a, 0xc285f95e, 0x50ff20fa, 0xac5f15fe, 0x87ca5eff,
15026 0x307d2e59, 0x20d6e70d, 0x3649db0b, 0x22ded384, 0x7d5df23d, 0xbed38f9e,
15027 0xf7f1c473, 0x149ef8d5, 0x3d27db2e, 0x7ec3f16c, 0x37763c50, 0x9ac9e9e3,
15028 0x634a8f48, 0x1db70895, 0xf0995072, 0xd9fc5cb2, 0x69edbf98, 0x661575a5,
15029 0x6e01d768, 0xa92de2f3, 0xb43cf01f, 0x6f205381, 0xf8eb928d, 0xd7937916,
15030 0x6cb85531, 0x3589942c, 0x531fc816, 0xf329725d, 0xa63fb915, 0xe30daf09,
15031 0xd71a10cd, 0xbb05c3fb, 0x1fc4fa17, 0xbcd10ba0, 0x7f1f0a67, 0x9cfc2d9f,
15032 0x5c022ade, 0x95a2c7ff, 0x89bc06f3, 0x4825e63e, 0x53d938fa, 0x8cdff865,
15033 0x9117bf79, 0xad1967d7, 0xd923ca63, 0xad5fac99, 0xf9f0c1eb, 0xd14f79ae,
15034 0xeff686e9, 0xfd83f43c, 0x99fa9d3b, 0xfec8637a, 0xe061ec2d, 0xf6dbf333,
15035 0x877b4b51, 0x4c9914fe, 0x475eb870, 0xc5def5e9, 0xa9153fac, 0xf847c291,
15036 0xfaa51969, 0xf21c7721, 0xa0484f2e, 0xb9fddc75, 0xb77e83d4, 0x843dbc5c,
15037 0x46377fca, 0xd2dcf515, 0x64d4f2cb, 0xbdc99fbd, 0x9d869fc7, 0x2408b0f5,
15038 0x17b9a50c, 0x8f5ed65d, 0x564ef9a1, 0x52c435b7, 0xa4de84f9, 0xbdf104c7,
15039 0x5bb6121b, 0xd8ddd7a1, 0x627dfccf, 0x99df59ae, 0xc0551a24, 0x7350f279,
15040 0x0f807dbd, 0x0c8ad7d1, 0x0188b7a9, 0xdfee8062, 0x47fbb963, 0x13ed1f7a,
15041 0x0be1d92f, 0xbb433579, 0x3a5c7007, 0x18b9b3e9, 0x7ae55857, 0xd951de6a,
15042 0xe48c779e, 0xdf9d2f2c, 0x84e8ebc7, 0x08f29308, 0x6e48a7f2, 0xcea67a40,
15043 0x3a39e9cd, 0xa17e51e7, 0x67eb23ce, 0x7d803f14, 0x73faba56, 0xb772f02b,
15044 0x6ef9c253, 0x761faa67, 0xc6a68ab5, 0xe55e98f1, 0x4883a6ae, 0xe3c503cb,
15045 0x382ecc71, 0xd220e4b4, 0xb6f43bbb, 0x5fdd0e25, 0x5dbff3c0, 0xa3dbd3a7,
15046 0x8834dea6, 0xbbedc9f6, 0xf6ebdfa5, 0x4da7533e, 0xc6de404a, 0xa8e8eef9,
15047 0x3422b2fa, 0xa8cf22da, 0xb758cdde, 0xc1e8f9b7, 0xc9e75a78, 0xff3c11ba,
15048 0x9e5e75d3, 0x09bad9ff, 0xa33dfe9c, 0x27ae39f8, 0x6c79673e, 0xd6a3b6d2,
15049 0xe45faa14, 0xb7d8bc55, 0xdf857ad7, 0xdeb1744f, 0xf581cf26, 0x1f600e74,
15050 0xf534198f, 0xe9303bf1, 0xda276d0c, 0x5171b8cf, 0x3c99c611, 0x7a8ac4a2,
15051 0x2216bf33, 0x4e93ad3e, 0x8dee8bbf, 0xf8eb57f5, 0x6157bf3b, 0x1bdf9e78,
15052 0xdf6cf0cb, 0xf9031191, 0x8ccee960, 0x6f89489e, 0x046f7a1a, 0xd97ed7e0,
15053 0xff6df3c2, 0x8ef59c28, 0x774bf6d0, 0x7a89ec0e, 0x22df0967, 0xfb3cde48,
15054 0x83b87ffc, 0x71b395cf, 0x027d5f4d, 0xc957f6fe, 0x39b248df, 0x5ff818f1,
15055 0xd01e5eef, 0xce5d05cb, 0x02233d26, 0x6e8d5fe7, 0x427f0457, 0xb4b86cfe,
15056 0x217f0ee7, 0x17f62c65, 0x9c1373c6, 0xb9191cc3, 0x7f7087c7, 0xfd467e47,
15057 0x9258fcbd, 0xb9effa07, 0x63a48fed, 0xf34dadfc, 0xfa8c793f, 0xf8b7ef3f,
15058 0x9d4e746c, 0x5e174d17, 0x2a7e1f05, 0x777bed92, 0x9c2f342b, 0x717b9bc3,
15059 0x86b1473e, 0x2c39c32f, 0x73cfbcfc, 0x1975b714, 0x17aaadf1, 0x7a05ed1f,
15060 0x30608d7c, 0x5b5fca82, 0xed7cc11b, 0xc8e79b35, 0xb8f7f432, 0xfbe9efec,
15061 0x0bb63cef, 0x05d57de9, 0x65fa5277, 0xa1e31c46, 0x034581fc, 0x79ce9ed0,
15062 0x3dfd4c91, 0x80128af7, 0xbad06abf, 0x69922b7d, 0x1c37837e, 0x34a2f4b5,
15063 0x1ea529ff, 0x373ec0e9, 0xf9fd821e, 0x6e6e196f, 0x9a5b643f, 0xd96d829a,
15064 0x75c9ffcb, 0xe59bfe7c, 0x9f75dc82, 0x3a25ed8f, 0x4a0183e5, 0x348d99d3,
15065 0x8fd4b0d7, 0x6386340a, 0x6767af23, 0x6ff7b4f3, 0x49075815, 0x8977981e,
15066 0x91e7c3dd, 0x7811b7df, 0x78e5af3e, 0xf62bbf58, 0x3b7a0a3d, 0x707a25af,
15067 0xfa4cbd3e, 0x7fa8d5fc, 0x7cebcac4, 0xa2f7a9e5, 0x2189df61, 0xbf09d93d,
15068 0x78db7e48, 0xe3eeafd4, 0xf587f016, 0x09fae279, 0x8ecd4f80, 0x9fb91b9d,
15069 0xfa07872a, 0x4bcec56e, 0x2f205307, 0x993c20de, 0x321dc7a0, 0xaf42abff,
15070 0x56a5a547, 0xe652fc6c, 0x5f398a5b, 0xfc27da4c, 0xca4ca2fe, 0xe7e88f49,
15071 0x63cd68a0, 0xee24c97e, 0xafd7c4ee, 0xebe518a8, 0xb0c97cd3, 0x27e71b6f,
15072 0xfda97b9d, 0xb2ec65b0, 0x5bd8cb7d, 0xdf2e1953, 0xebb3dcf3, 0xdfd197e7,
15073 0x73e17623, 0xdf303f52, 0xc1be9ec0, 0xcdebcf2e, 0x2f4067c4, 0xe34d79c6,
15074 0xed93f5e6, 0x29afe0bd, 0x076832aa, 0x91e523c1, 0xbe379630, 0x62b3f8ef,
15075 0x6df9f156, 0xe1b55bc8, 0xd9f22f92, 0x885fed41, 0x37eeaed2, 0x7932760c,
15076 0x3bab0bde, 0xe3c8f217, 0xfa6bde51, 0x96d5bcb1, 0x39d0358a, 0x53e61d7a,
15077 0x95fc92a3, 0x457f2411, 0x73af7dc6, 0x2de51034, 0x5beffb42, 0xcd046c7f,
15078 0xf1290633, 0x86a468ef, 0x485a45de, 0x7d39fc97, 0xf3f8135b, 0x3f926143,
15079 0xbe610d47, 0x7433ac64, 0x07c4039c, 0x6f3be234, 0x11a339d0, 0x3917183f,
15080 0x7d78cac6, 0x907552dd, 0x3922e5ce, 0x1ada0802, 0xdef3943b, 0x61638228,
15081 0x2eb42aa4, 0x252347f4, 0x3ac7cdbc, 0x984427c7, 0xc42515ea, 0xbf8fb1da,
15082 0x1d55faef, 0x3cb86a4f, 0x8370d4bf, 0x7413babf, 0xfac87dbf, 0x776f7ae5,
15083 0x3abe630e, 0xeb7ef956, 0xdf15b22e, 0x8b8f3c09, 0x7373e7cc, 0x2394e45c,
15084 0xd475e09a, 0x7ae87be1, 0x1c25d743, 0xfa8e4fdf, 0x167c2289, 0xedcfc7ec,
15085 0xb66b776c, 0x5bf73eb5, 0xa2f36b82, 0x47ec0f5c, 0x70bed32f, 0xb54e9f80,
15086 0x0cdb9cb3, 0x37ea92d9, 0x5c7170f7, 0xdfba6bcb, 0x6f5b37dc, 0xbe7c14ef,
15087 0xc5eecf34, 0x615ef47e, 0x48ec1034, 0xd26fd2f5, 0x16f25b6c, 0xe5e6ebce,
15088 0x819a1e29, 0x69efc150, 0x97e47ccb, 0x095ebcfc, 0x817f0adc, 0x40bb73ef,
15089 0xfeb175fd, 0x5f94e9d5, 0x9e0c8bf7, 0x8fa447cf, 0x8abc62d7, 0xeb5be670,
15090 0x71c9bd62, 0xff979f04, 0xb279f2a1, 0x91f29f2e, 0x6ed9d7cc, 0x378a6eb3,
15091 0x04ad7e19, 0x36eb6f1d, 0xb05ef2ca, 0x4d3ca293, 0x26c4ffb6, 0xd7a2dfeb,
15092 0xfbf1d04b, 0xb4a74eb1, 0x683f99ff, 0xa0ac2393, 0x95fb77ff, 0x46fbc6be,
15093 0x17e19378, 0x933cac7a, 0x54b7986d, 0xf4c690de, 0x66d3dba4, 0xe8dcfce9,
15094 0xc31c0d17, 0x9fcb4f21, 0x3b37f3d9, 0x2a33df41, 0x1f21479c, 0x22b1547e,
15095 0x0cfd7a0a, 0x21840d4d, 0x917a6abe, 0x4bae43b7, 0x395eb8c7, 0x1fa1b96e,
15096 0xdf00ca06, 0x710e6dbd, 0x81ffcb2f, 0x96fac121, 0xfa45e781, 0x1a6eadbe,
15097 0x7eb060f3, 0xfe27695d, 0x72e51833, 0x6a45573f, 0xd57d07bf, 0xc1e1baee,
15098 0x54fbbd60, 0xbc7943f9, 0xcf71f4ef, 0x3c1f79d5, 0x6f39099e, 0xb8c6a702,
15099 0xf011fa1d, 0xd5f6fd49, 0xefda73cf, 0xdaf00b3e, 0x92fa94e4, 0x85e3edb5,
15100 0x359faf94, 0x09f7cf80, 0xd85e1d53, 0x8477daf5, 0xadaf61f9, 0xc5ee159f,
15101 0x44f7eaba, 0x985761f9, 0xd21befa7, 0x6fbbf8bb, 0xade98dbb, 0x667feeca,
15102 0xdaabb50b, 0x89e99fdb, 0x96ed95e8, 0x642357be, 0x6d37b479, 0xf79450e5,
15103 0xcd79fa64, 0xf2e18ee6, 0xe5c15537, 0x58ac81e1, 0x539b7782, 0x1375853b,
15104 0xbcfdb2bd, 0x1fbf2eca, 0xfa12e9d1, 0x96fffb25, 0x42bf7144, 0x8f3f6bcf,
15105 0x584f7d67, 0x91f3c9bd, 0xaf207dbf, 0x7dcbb347, 0x7ea46a21, 0xe725c478,
15106 0x9e39a475, 0x8f4185f7, 0xdcb78a47, 0xef809593, 0xfcd2af24, 0x0d4cb2fe,
15107 0xd06e1fc0, 0xf2f5329f, 0xbb5157db, 0xd9555f4f, 0xd7e7336f, 0xfbe30f8b,
15108 0x13d5159c, 0x6bbcad39, 0xf5cb9f32, 0xa2eea71f, 0xa7a984f2, 0xe06bbfd8,
15109 0xd9954e7f, 0xe9989a9f, 0xdf813355, 0x83f6ff5c, 0xd9e1ff54, 0xaf001627,
15110 0x473533c3, 0xf6dbec26, 0x4cff97d6, 0xfe5d6df3, 0x36a3d627, 0xf8116b44,
15111 0xd3f7717e, 0xc566bf5c, 0x7e802cff, 0x74956350, 0xb5db9c63, 0x91bf3d3a,
15112 0xffa2c5a9, 0x63bf15aa, 0xb722223d, 0xbbd7f245, 0x3a3f1fbe, 0x65f9bcd3,
15113 0x0e2dda85, 0x54e1ae6f, 0xfce1e7f5, 0xa204ab3b, 0x2b860c95, 0x5ce775eb,
15114 0x47e06881, 0x72b948b3, 0xbf10d6f1, 0xa8925031, 0xdda88bdb, 0x8f5526e2,
15115 0x41dbf457, 0x17f5a1a7, 0xf7ae77d3, 0x8a57bf3d, 0x763df926, 0x30d7fdd7,
15116 0xfe0045fe, 0x64cf33ae, 0x9c3d026e, 0x5674f9df, 0x34369fb0, 0x72be72bd,
15117 0x7df4e7fd, 0xd8be8e73, 0xc2db6f40, 0x0b85f64c, 0xf4eb24cf, 0xc2e9e926,
15118 0xe7ecd933, 0xd9f7d44e, 0x0967c505, 0x085fbb47, 0x9e10678e, 0x971ce1a6,
15119 0x0e1a6de3, 0x9d61fbb9, 0x6f8e2e2f, 0x67be0e1a, 0x68e141f0, 0x41bb63ca,
15120 0xf41e534e, 0x8a7f8364, 0xfe2ca6e2, 0x42ca6fee, 0xd22d97fb, 0xa7cc630e,
15121 0x8e14b9f2, 0xf0b5a27b, 0x6e7caefe, 0x8de426e0, 0x929dea71, 0x253bd4ef,
15122 0xb75d097f, 0xe8ed2996, 0x1ee64fa4, 0x3ea4b3a7, 0x5c82f496, 0xde6593e4,
15123 0x370bf329, 0x6fe1d894, 0xbcc9b7af, 0xfd897d6b, 0x35f7e618, 0x4fc4b569,
15124 0xc5bf7473, 0xdda97f02, 0xfafefb0b, 0x3f1ce1e5, 0xcf3edb31, 0x7af6694b,
15125 0x035c69bb, 0xe6fdfd0f, 0xf9f48bef, 0x0b890df4, 0xedb6a5ea, 0xf639c30b,
15126 0x8e32e8a4, 0xb4a64960, 0x6cfb3ee3, 0xaa917c47, 0x6dc2dbeb, 0xea5ba1d0,
15127 0x8fd78c1b, 0xef5e06ed, 0x2ff9a148, 0x5ea5e3d6, 0xfab848b6, 0xe37c959e,
15128 0x052d7ce5, 0xc005d5e7, 0x2c5ce71d, 0xef2173e5, 0x7919bc49, 0xf0a15f03,
15129 0x82f1f15d, 0x9f95d814, 0xc7f694c8, 0x8f2c7c50, 0xe513de1a, 0xd4cf5c06,
15130 0xdc00ca1d, 0xa89d758d, 0x68e97af3, 0xafbfb4eb, 0x8c6877cf, 0x30477c8f,
15131 0x1d6fd77d, 0x20248872, 0xd5ab6e71, 0x5bd42583, 0xbf43f7fd, 0x36aadfa8,
15132 0x3b9704f9, 0x91739780, 0xbd41dffb, 0x0b621b05, 0xed180fa0, 0xf22fae17,
15133 0x7bcd0796, 0x5e3356e0, 0xf3993506, 0xf3997783, 0x0d06715b, 0xe5dbe7fb,
15134 0x21f9cc07, 0x93f9cc87, 0x3371dc1f, 0xea854fb6, 0xbe855fbb, 0x87f1e7f3,
15135 0x7a9f4e70, 0xe06895f9, 0xcb5ff16b, 0x0b8f420f, 0x3c21678d, 0x7c73d02a,
15136 0x97a6145b, 0xba5ae22b, 0xdc4643e1, 0x30627606, 0xdf0a54dd, 0x95da6b41,
15137 0xa68acff5, 0x6744bd9b, 0xcfdecb55, 0xecb37a90, 0x5ad36477, 0xd0cee43b,
15138 0x3be3bb71, 0xc6ebd222, 0x21192a3e, 0x365eaecb, 0xfe8a7c4e, 0x1e37bcd6,
15139 0x2bf258f4, 0x929be585, 0x075fb297, 0x3edd1cdd, 0x6f4e46fb, 0x30f0c09e,
15140 0x9b0b92ec, 0xe5144095, 0x8744235d, 0x8bf11f7f, 0xf1210da5, 0xe2426b9f,
15141 0xcb99d682, 0xf7daee17, 0x504710ff, 0xe38278e1, 0x678cae2e, 0x5e801ff4,
15142 0xb04a7959, 0xa9f2aa7d, 0xe5ccc26f, 0xf5f35d72, 0xade71875, 0xf1cb5df0,
15143 0xaacb577b, 0xa3fe38e2, 0x4ba8e973, 0xcb73853b, 0x5eaf7738, 0xf29551b7,
15144 0xfd84b7bc, 0x8e7691c8, 0x8876ac8b, 0xebcd0440, 0xebdd9450, 0xd697efa2,
15145 0xb2bcb147, 0xe85ce480, 0x270a948b, 0x627a4dc7, 0xbbc4eed0, 0xd565cb2a,
15146 0xd51e12f1, 0xb0fc51bf, 0xa8c3571d, 0x3293fc8b, 0xd80448bf, 0xf23a0bbe,
15147 0xf803ad06, 0x468bce0b, 0x59565fa9, 0x9f00fb03, 0xab68738e, 0xad155eb9,
15148 0xc838a3f3, 0x35efe67b, 0xd7eb8da2, 0x2c26faee, 0x3d907bf8, 0x435ef59a,
15149 0xf97556ff, 0x3865fd4a, 0x20744fcb, 0x6cbe8384, 0xeebedcba, 0x6823921e,
15150 0x7b0d2b7d, 0xdf295af8, 0x9e51b2dd, 0x679f2463, 0xd6eb4e01, 0xef867c92,
15151 0xce206fa4, 0xf70a2c44, 0xea5ef94b, 0x6766eb0b, 0xf2f45cb1, 0x400a5e3f,
15152 0x487b691f, 0xbad2bb61, 0xbaefd97c, 0x3973fafb, 0xe3c2a7f8, 0xb61cb184,
15153 0xde518a6e, 0x4f91f587, 0xc864c530, 0x1ef7faf9, 0x4bdefe6e, 0x3ec166f5,
15154 0xb2741e22, 0xfb90c47d, 0x2ebeb90d, 0x1ac9cb56, 0x75feb9d6, 0xf0516db1,
15155 0xf88a89bb, 0x6cb725ef, 0x36e3cfd6, 0x2afc3f5a, 0x83e295c7, 0xf5198ff0,
15156 0x73c96646, 0xef58f865, 0xfb1ebd16, 0x532dca5f, 0xe68ebdee, 0xc5b0fe55,
15157 0x81a17b0d, 0x66f5e107, 0xd7c70e01, 0x77400b3a, 0x7b4ac7c3, 0xc97c91d9,
15158 0x0a8623e7, 0xab1a378e, 0xcb363bf7, 0xc2934a62, 0x9fa91e89, 0x1ed245e3,
15159 0x98b4351f, 0x132496ed, 0x6e2aebcc, 0x4fdeb265, 0xf7f8bdb9, 0x4f98bba3,
15160 0x4a145d07, 0x6df8fbf9, 0x2f3926ca, 0x0e27c72f, 0xf6c9c07f, 0x39fae3ce,
15161 0xe881e064, 0x0fcb1868, 0x0d8b5f3a, 0xa0b59ba1, 0xa0879c07, 0x6e982507,
15162 0x8b7174cc, 0xee2be122, 0xbaf7f293, 0xe8379958, 0xf13ff482, 0x229ba0bf,
15163 0x4eeff0c1, 0xdbd6340f, 0x74481e9d, 0xd07408b0, 0x0e842f51, 0xec3fd584,
15164 0xa542fcdb, 0x2b876223, 0xab148284, 0x17ce21f0, 0xebc32467, 0xb11fab1e,
15165 0x12adbd78, 0x92ac7d2f, 0xf1b4e8ee, 0x7d701785, 0x4b7de22f, 0xbc285c1e,
15166 0x4524bf54, 0x1fad7db0, 0x713155c9, 0x45204edc, 0xbb0a8e58, 0x5f68a513,
15167 0x2ffb2312, 0xfe3829e9, 0x5af3fa8e, 0x36e674e2, 0xc15efe1c, 0x47da0572,
15168 0x9f7b7017, 0x5af7b645, 0x219bed29, 0x95b698f5, 0x5cbf1c61, 0x2c9f7772,
15169 0xb1c4c9d0, 0xa2393a66, 0xde9195d3, 0x8dd6ed94, 0xf0249e75, 0xfe86d283,
15170 0x3bd4de7c, 0x0277ab8b, 0xb047cf9f, 0xeab259fc, 0x618693c7, 0x7bc42f7e,
15171 0x9333c280, 0xa83fb3b7, 0x4ff661b4, 0xb4be843e, 0x2bdfc9d5, 0x59f5b5b2,
15172 0xf715ff90, 0xa1f49ddc, 0x7b01c674, 0x9ad7b512, 0x957f9ca6, 0xedbec9d2,
15173 0x989e40ef, 0xfae55d3c, 0x3fb48593, 0xce39068b, 0xd6e7df24, 0xd26fea24,
15174 0x69c38528, 0xa95d3a8e, 0xa40fc1b7, 0x2ca9f7e3, 0xe47f9745, 0x5592813d,
15175 0x73d2b27d, 0xc9213fe1, 0xfd390bb8, 0x18fea353, 0xa5e40365, 0xfee4e3be,
15176 0x1fa3ea33, 0x4b3a7bf4, 0xd5bf55ca, 0x09e462e1, 0x7cbf5cae, 0x8cd1d875,
15177 0x40b6a468, 0xfde9a536, 0x7584bec7, 0xe3174c4e, 0x77ee03d7, 0xcf1362aa,
15178 0xf984adb7, 0x1b965442, 0x4291abf4, 0xd6e3facd, 0x8f27ccfe, 0x7a3b698e,
15179 0x6e8fe537, 0x8ced241e, 0xbe617dba, 0x707cb04b, 0x77e48c74, 0x98239b6d,
15180 0x5ab88ffe, 0x3da4e2a3, 0x650ded8e, 0xb67c493a, 0xf87efeac, 0xed22cbb9,
15181 0xcc7e7147, 0xc71a687f, 0x53ad9427, 0x07b86103, 0x6f6cc6b0, 0xded48aa8,
15182 0xb5087ec6, 0x07da841b, 0xa3a03340, 0xd30a35f2, 0x8f7adf61, 0x9cf9993d,
15183 0xcafac2e2, 0x70fd0323, 0x9c7b940e, 0x857cc71c, 0x826be0fd, 0xb9d870fb,
15184 0xb5890705, 0x009f6b67, 0x258d254e, 0xe446efac, 0xfabfcc6a, 0xec1704aa,
15185 0x26fe9d17, 0xbe0b5ec2, 0xc64d6d64, 0x9655fcbe, 0x3130f19b, 0xc91595ce,
15186 0xfbe4ed74, 0xae6d4711, 0xe8efcc2c, 0xe705a74a, 0x9215c4ed, 0x39df69be,
15187 0x1ee18f70, 0x3f0708ab, 0xfb259ad8, 0x5adcb39d, 0xbdf291bc, 0x151ac21d,
15188 0x67cafa07, 0x5fd85efa, 0x75e62dfb, 0x046217ea, 0x35b289e4, 0x74bce56b,
15189 0x96d610fa, 0xe71a78c2, 0x02b4e6d4, 0xe43a01d8, 0xdb63fedb, 0xba0ec701,
15190 0x3d30ae98, 0xc10e7ad0, 0xbfde9c8e, 0xe9ca32f4, 0xcbd03efb, 0x7e81b1c4,
15191 0x522f1b88, 0xb6be38ab, 0xe078493d, 0x6d176c77, 0x93b48f2c, 0x67be023c,
15192 0x9f8319f0, 0x1d785d10, 0xdef89d89, 0x22534752, 0xceb5be1e, 0x75b3e9c1,
15193 0x7825612e, 0xe24bab6f, 0x6e750bfc, 0x72ea9b4e, 0x758bfbf8, 0xa8efce1e,
15194 0x97f9c11b, 0xdf9cbceb, 0xd3813755, 0xf98aeb57, 0x08afc1bb, 0x0c97cc3e,
15195 0x27f063be, 0x3e0cbe83, 0x73574a15, 0x17b8cc09, 0x1f99ed41, 0xeb107c1a,
15196 0xf27414b0, 0xe9cf0327, 0x092fb14a, 0xceb450fc, 0x5228ff06, 0x0aff3dcf,
15197 0x22bdb9c1, 0xed22ed92, 0xf6c1f242, 0x079f0748, 0x0bb176a9, 0xdbfa89f6,
15198 0x0eef47bc, 0xad6f873a, 0x88358450, 0xc4bc7f8e, 0x7441ac29, 0xac596f3c,
15199 0xd9673f29, 0xa4f46ffb, 0xd18ddffe, 0x1e69b372, 0xe2797e47, 0xf7d13ff1,
15200 0x4cf2fcdf, 0xf34ef026, 0xc608fcd8, 0x9f5c2bbd, 0xd79cab47, 0x9796765d,
15201 0x7d4b86fa, 0xd4b86fab, 0x08e3f0b7, 0xa23dcf8a, 0x2d24a3e3, 0xb1a79df6,
15202 0x9baeec6f, 0xb44ec047, 0xfa4bde52, 0xf2a3f804, 0x2bf8e8bf, 0x70c6165d,
15203 0xf7d06d2d, 0x36dc706b, 0xb258f5c1, 0xf14ef960, 0xd7bf010a, 0x03d85fb1,
15204 0x63882b24, 0x40afc38a, 0x6be52276, 0xab98ec0e, 0xe411f77f, 0x21d96576,
15205 0x4735b396, 0x087fc724, 0x705ced9f, 0x83b2ca7f, 0xf6b44f5c, 0x466fc536,
15206 0xc1daf50c, 0xc0e34037, 0x7ece695f, 0x1a2efd81, 0x547fbe15, 0x5f2f7fae,
15207 0xa2e298ad, 0xf2ab6467, 0x959645de, 0x4259f3d3, 0xf91a473f, 0x96e832bc,
15208 0x61c708f8, 0xdbe63796, 0xe7f10417, 0x597bfd52, 0xa714c58e, 0x9d967f79,
15209 0xcd8f39fb, 0x9bdefd49, 0xcf9f6e93, 0xf7cdcffc, 0xa5fa8c05, 0x60ab0539,
15210 0x835d2e4f, 0xf6cea6a8, 0x7d56d925, 0x7fa92e5e, 0x8b5ce839, 0x2ea2f8e2,
15211 0x9e4307cf, 0x475f8539, 0xef59fcf2, 0xb9e17caa, 0xac8fe017, 0x9f1873fc,
15212 0x75839553, 0x7fae4afb, 0x839634f8, 0x70ca91bc, 0xff12e1c8, 0x35fdcf85,
15213 0xb55d711a, 0x97bda43b, 0x6b48a3d2, 0xfb60aaee, 0xf6878d5e, 0xadf81c49,
15214 0xfaffefd9, 0xfbe67f0b, 0x14b0849d, 0xe3986e3d, 0x7c766ad4, 0xb06bf1ca,
15215 0x7286f9c7, 0x1d5f1c7f, 0xf956beda, 0x4257f59a, 0x68a7c32c, 0x3c8997cf,
15216 0x12979d8f, 0xf76ae7c1, 0x2aec4cac, 0x1fb4288e, 0xb0c1ce23, 0x358ad5ff,
15217 0x59cfc39f, 0x9384d77b, 0xff65de92, 0xca1eeda1, 0x31384a8e, 0xeec62050,
15218 0x5893b62a, 0x2c9fc705, 0xed38edd5, 0x63f64cfe, 0xd7772777, 0x2446a7ae,
15219 0xdd5bb592, 0xbeb38831, 0xae84c428, 0xb649f4f0, 0xd3cf6b94, 0xfb3f823e,
15220 0xe59536e2, 0xa2db8bca, 0x6cd43f78, 0xe220f07b, 0x529e6b04, 0x2d58edd8,
15221 0xafce385a, 0x1c2a8766, 0xec1de7c1, 0xcfddf147, 0x5173f173, 0x8b5f404b,
15222 0x66ef149a, 0xc3bb4f9a, 0x6823d31d, 0xbe80af3e, 0x87173488, 0xff470d35,
15223 0x079ffcc6, 0x37920b7f, 0xc83f3517, 0xef548df1, 0xbf37cb02, 0x3c38e08d,
15224 0xc1dec93a, 0x186ecf3c, 0x45f5fec2, 0x586bdb4d, 0xe116d83e, 0x8ce9e982,
15225 0xe40f7ccd, 0x81de3e80, 0x9c8f296c, 0x67d1edd5, 0x1f59505f, 0x2fb13cc2,
15226 0xb871e8cf, 0xf537bb46, 0x4b666f76, 0x5b26a7f9, 0xfea34fee, 0xd1a3a6a2,
15227 0xc9fea8fd, 0xfa73ef5d, 0x166fbebe, 0x3df0b645, 0x223b93cf, 0xc9e09ef8,
15228 0xfe39ff1d, 0x7cef1a35, 0x250498d3, 0xc89d9f68, 0xba7dc9b6, 0xf32fc641,
15229 0x13d61725, 0x673d789a, 0xac28a5b7, 0xa4de032f, 0xf1dd9fb7, 0x3643df12,
15230 0x1c1febe4, 0xb14b382f, 0x18a3dc86, 0x8d72083d, 0xd7bf55a3, 0x63dba6d1,
15231 0xaffa6ffe, 0x5927bfd1, 0xe471f58a, 0xc4610d3d, 0xbd64b86f, 0x27b73522,
15232 0xc1dcddf6, 0x97b899ee, 0x7192de2d, 0xfbb7a297, 0x737fe811, 0xbb678ddf,
15233 0xbb9b52cb, 0x1c5ff227, 0xe0958526, 0xce887733, 0x875a9257, 0x347bbec1,
15234 0x8615ca4d, 0xb56aad3f, 0xbf04bc22, 0x3e67445e, 0xd0aafde4, 0x49c90760,
15235 0x563d7c67, 0x71daf161, 0x99d9463e, 0x3bb7ea2e, 0x75bec137, 0xec7c2ec4,
15236 0x29d17b7f, 0xd2e927fd, 0xf618f20f, 0x7155a517, 0xd878ac81, 0xa9ba74f1,
15237 0x41e54a9a, 0x29b553f4, 0xea390590, 0x2bda5d9c, 0xa9fd0e51, 0xabd640aa,
15238 0xfd14e9d7, 0x69a3dfa0, 0xf72c0bae, 0xd0128cee, 0x44af2c3f, 0xd3c8bb49,
15239 0x41614dce, 0x1cbf76e7, 0xc777118b, 0x66df4afe, 0x0bcc3f39, 0x7b22fcf2,
15240 0x5de41663, 0xd145dc63, 0x39de3c8d, 0xe145bc7d, 0xa39fd28d, 0x3ea211c7,
15241 0xec136f8f, 0x267b6a77, 0x33e6e58c, 0x632f2dc9, 0xf4cf33fc, 0xa387b8e7,
15242 0xbb05fe69, 0xf1c9dcb8, 0x86cf95e7, 0xd3df3005, 0x5db144cf, 0xca4db4eb,
15243 0x12a3a763, 0x143b1e59, 0xf65cf0f5, 0xa6153d63, 0x5a742ec0, 0x9424f611,
15244 0xf2c1ee6f, 0x32dd6540, 0x1254d7f6, 0x4b1c817b, 0x7fc804e9, 0x67f737a7,
15245 0x37e9d17b, 0x415cbe55, 0xbbe357df, 0xfee71a26, 0x0880f58c, 0x799e23b6,
15246 0x83fd6ff6, 0x5a463bfd, 0x3ed994f9, 0x5183d066, 0xf923945e, 0xd48e5160,
15247 0x71c86e53, 0xd11d5a71, 0xaf3a70f4, 0xc207f253, 0xb481eb03, 0xef61131f,
15248 0x3bb4d23f, 0x9c048951, 0x09ff5903, 0xfa956fb8, 0x366d99d6, 0xbe5553f6,
15249 0x3b65e512, 0xf157ddd4, 0x554ac97d, 0x1695e3ca, 0xf950df79, 0xffb656e5,
15250 0x2ce33fd4, 0xde083c00, 0x6db6dfac, 0xe471f556, 0xf4b7a7b8, 0x808d7e91,
15251 0x10797f9e, 0xc62635fb, 0x59537989, 0x0790dace, 0x2a7a5eb8, 0x69fee382,
15252 0x34e22f1c, 0x73f67f2a, 0x0598cf09, 0xc1d027ac, 0x4ab9fccd, 0x77d5cfe7,
15253 0xfb83135f, 0x955de210, 0xb25c79ef, 0xff827a7a, 0xd1ebc286, 0xbf3f9d1c,
15254 0x83f338fc, 0x8837da2a, 0xfbac5b0f, 0xab3f1713, 0x78b95cb0, 0x308f35d5,
15255 0x26c77ddf, 0x5ce22f70, 0xc1d183d3, 0x91cfa8f8, 0xbdb3b0fc, 0xa62feb87,
15256 0x5bfdb2fa, 0x2d9f3cd1, 0x13e60f36, 0xddefc78a, 0x07f559fe, 0x226cafb5,
15257 0xcaef22f9, 0x2d125ff5, 0xf833fd3f, 0xfb2736cb, 0x7cff0951, 0xadacea3f,
15258 0x7fd60169, 0xf32779f6, 0x72b1b39d, 0xf3a49fdf, 0xf98d97d4, 0xb66bf4dc,
15259 0x9a61fccb, 0xd0b439c0, 0x98d7ee6f, 0x9b1cead7, 0x4f78b7a4, 0xd544fc0c,
15260 0x47f40f84, 0xb711f9f8, 0xedc6d77f, 0x40b3d743, 0x4fb1d76f, 0xba608f9f,
15261 0xe24bdb39, 0xd90bece5, 0x8d1d9e7c, 0xf34ef495, 0x74de854d, 0xb8a65636,
15262 0xa87a0499, 0x387a4974, 0xed89a63b, 0xed956702, 0xc9b51e9c, 0x74cb9576,
15263 0x5fd13b7f, 0xb407e812, 0x63aabb09, 0x19e40b4d, 0x05e1f9f0, 0x4f70069c,
15264 0x0e8ed43b, 0xd7f9c53a, 0xe333efaa, 0xebf6051d, 0x89a79fb0, 0xba6bc7ef,
15265 0xedb5593c, 0xf0257f4a, 0x614db554, 0x197fda7f, 0x13acd0fd, 0xd1003f0c,
15266 0xc29f62e5, 0x6e2c22ef, 0xfb116db8, 0xbdac96d3, 0xac6f7415, 0x6f7eb163,
15267 0xf2a2a8fc, 0x693a8e7c, 0x395ee4ff, 0xdfdf019e, 0xef1d28e7, 0xf38cb875,
15268 0x3bf0f68b, 0x47496e39, 0xfea46d94, 0x35941aaa, 0xa19a4e3c, 0x19f5cae7,
15269 0xd8b02270, 0xaa3be761, 0x6eeed3df, 0xbb3cc6fd, 0x9d31cf9b, 0x934d1fcf,
15270 0xdedb93f7, 0x2fccf796, 0x26243d7d, 0x41e45bee, 0xf46061be, 0xd063b887,
15271 0x22f3f520, 0x35f61cf8, 0xcf34ebec, 0xff660dac, 0xe653ce4e, 0xe66d80fc,
15272 0x730eee7c, 0x9cd9af3e, 0xce6ebcf7, 0x0ee309ff, 0xf41384eb, 0x4235c46f,
15273 0xfd0a46ff, 0xf5261ddb, 0x7fa1e46f, 0x8dfe8523, 0x91bfd0ef, 0x3c8dfe87,
15274 0xa1e46ff4, 0xfe85237f, 0xfeeeef8d, 0xba554e12, 0xe07814bd, 0x4eddbab8,
15275 0xf7813e23, 0x89d9c5cb, 0x558547cc, 0x1717a5ea, 0xd8fcb2e5, 0xe29a6f61,
15276 0x11937b60, 0xad18958f, 0x1c47f785, 0x2ab2d280, 0xb1db8d39, 0x55f6ba1d,
15277 0x2aae8769, 0xeec24670, 0xe4f2bad1, 0xa73d882a, 0xd418b4a3, 0xdb6b68bf,
15278 0x2f56f802, 0xff7ec03b, 0x77eee5d6, 0x63f893af, 0x5f118bfb, 0x0f738255,
15279 0x25f49b7c, 0x71ee7719, 0x4353db04, 0x4d6244fd, 0xd3f21e50, 0xd43e733a,
15280 0xe6be042f, 0x46abed35, 0x6c6fc7c6, 0xfbe0c96d, 0xe0e33e9f, 0xea9f69fb,
15281 0xcb313bf6, 0x2198f2c1, 0x1bce23cf, 0x9f7a5970, 0x95e709b2, 0xc31c7fa7,
15282 0xa650fdb9, 0x68617ee9, 0x0879765a, 0xf91df3cb, 0xe3058a35, 0xbe5f4f94,
15283 0xcd6af58f, 0xedd2e7cb, 0xd7b2dcfa, 0xeef34c5b, 0xd1370fef, 0x71adc0d1,
15284 0x5ecc7e21, 0x7783faa6, 0x31f887a5, 0xa7ca9807, 0xbe6219ad, 0x8d7c5f8f,
15285 0xbdafbca9, 0xa1cf6e23, 0xfce4b9fb, 0xa5ceb25c, 0x6f5e02c8, 0xc554bd68,
15286 0x6ff827f3, 0x4e52dbc5, 0xc673a72d, 0x2bbfaf1b, 0x9d7f0052, 0x57e03277,
15287 0x858b64d1, 0x3f4cad9d, 0xf332c487, 0x15615cb9, 0x275c573e, 0x84b855dd,
15288 0x7fda9637, 0x654c6d69, 0x47e5fa3a, 0x68812aa9, 0x3c9680d1, 0xde8bafe8,
15289 0xe838727c, 0x98dd5aaa, 0x3bf2a2ea, 0x5c16ff14, 0xb7133f20, 0x9524713d,
15290 0x495aa927, 0xaa73c27f, 0x1cff702d, 0x19edd1f0, 0x7ca4ef02, 0x68a5e6ba,
15291 0xe9d41f8e, 0x0ae6d52f, 0x6c6c1d07, 0x814f5954, 0xeb8d4cfd, 0x8d8d93a4,
15292 0x6bd0e1f1, 0x3e28c62a, 0x5c06c7c8, 0x8508fa0c, 0xefefc907, 0x97bd69ba,
15293 0x94f7c90e, 0x752e758c, 0x41a2fac9, 0x07de37b6, 0x5c7bd630, 0x372b47d7,
15294 0x3b7591be, 0x7fd73f7d, 0x7e1b9e5f, 0xbc5dbadc, 0x6d96c5ee, 0x7d29925b,
15295 0x85dda1c7, 0x7b7d2d75, 0x1a48f45c, 0x326dcbe7, 0x75b3fdae, 0x23e13e4f,
15296 0xe3777a7e, 0x0fe87693, 0x9dbf5695, 0x6679cddf, 0x0ef11da3, 0xc8dd6fd7,
15297 0x2d6c17df, 0x71807b61, 0x1194eecf, 0xa3c3ad97, 0xc1b2ac62, 0xde3ceb45,
15298 0x1585ca5f, 0xa69e32e1, 0x46f51d48, 0x55b5d602, 0xa6bac7c9, 0xe3b76f17,
15299 0xf58781fd, 0xa6fba17a, 0xa2b4f0fd, 0x357bb01e, 0xd4c71c29, 0x11993edd,
15300 0x64fbcfe8, 0x4e34e5da, 0xc81e5fa7, 0x8287de7a, 0x239c2fb4, 0xf5fa21b9,
15301 0xf5da5561, 0x4ef9559a, 0x30903d98, 0x5ec2f20d, 0x35456ef9, 0x0a23439d,
15302 0x710bb7a0, 0xa3c5a535, 0xd79d1354, 0xf6984616, 0xb4112cc1, 0x9bbfa8af,
15303 0x7e532f45, 0x530cc4fa, 0x07d399fd, 0x0b9df886, 0x7f99cb3a, 0x8f7a6d5d,
15304 0x9f2efaa6, 0xc7bb615b, 0x4a77f358, 0xbb3a62ef, 0x5abed4d1, 0x47bd354c,
15305 0xf7a9e8b3, 0x6544ce18, 0x54e1c476, 0x6658f7e8, 0xeff54769, 0x169dfcad,
15306 0x7dafda62, 0x927f3c33, 0xfd8da5e7, 0x7d3d8609, 0xe8cf7e16, 0xef0cbcea,
15307 0xbc451788, 0x9a1dec30, 0x61691e59, 0x3c48553d, 0xa8f6eb54, 0x8f691cea,
15308 0xd8b5f6aa, 0xf04d8f11, 0x4810a6b7, 0xb6151a6a, 0x477d5237, 0xdfcc9c4a,
15309 0xcc3bef85, 0xdfd052f7, 0x521f9465, 0x42bfb04b, 0xdd686bcb, 0x606a1738,
15310 0xd83b6247, 0x076c9384, 0xfbd1c633, 0xf434e837, 0xfed0807d, 0x33700c06,
15311 0xbadcaeff, 0x822f60fd, 0xd8e2b4cf, 0x549dc47c, 0x95b14d35, 0x6f495ee4,
15312 0x54bfff06, 0x7ebf6161, 0x4c03e1fb, 0x5615ed6f, 0xff4b8c8f, 0x78d4b876,
15313 0x9435dda5, 0xbad0170e, 0xb05e7fe0, 0x15f8f143, 0xe9f00f59, 0x810cfa05,
15314 0x70174a4f, 0x01d5e033, 0x7e7290bf, 0xe2286e3f, 0x0a7be426, 0x1425c057,
15315 0x0b38fa9e, 0x2772c134, 0xf3cfcbcd, 0x8c57e90a, 0xb78fdd08, 0xb0ffd9db,
15316 0xe52e1141, 0xf531e1bb, 0xf4e3b4b2, 0x6feb90cd, 0x2078a9db, 0xd97cdfbf,
15317 0xe83bdfca, 0xd9c658a7, 0xde689f4f, 0x54f41daf, 0x8ccff72c, 0xeedc89cb,
15318 0xdf5745df, 0xff864f45, 0xdd7e3426, 0x19e647b8, 0x1ab7dfa0, 0xf37d8626,
15319 0x1be1c44f, 0xe77741f2, 0xe439c74c, 0x9910f1d2, 0xbcf9e5de, 0xe39d2a34,
15320 0xbedd35cc, 0x4d69f068, 0x5b8c676f, 0x78eee542, 0x7e6f7bd0, 0x43557167,
15321 0xfbf06a46, 0x1b4ada37, 0x975381db, 0xe25a73c7, 0x7ce22574, 0xdf2e5929,
15322 0x4f763969, 0x29f844cf, 0x25b4ad8e, 0x8faea44c, 0x553439dd, 0x88be420c,
15323 0x86d74fd3, 0xcfb60acd, 0x032de91b, 0x9c61f9e4, 0x872de7ef, 0x3f6167a3,
15324 0x8d19dcae, 0x2bc5a190, 0xa2ee1fdf, 0xa2d9be73, 0xfec01a2d, 0xce7c8de0,
15325 0x3cc6d70b, 0x390ce7d8, 0x516572a3, 0x5503c84f, 0x04f038ff, 0xb96d01e4,
15326 0xea72112d, 0x81540fe9, 0xe73a1ad0, 0xe538be58, 0x6a7df494, 0xabdf0473,
15327 0x2f08a53c, 0xd48b51fc, 0xd32e797d, 0x337cdb79, 0xd2708fc6, 0xae30c3b8,
15328 0xc6124b7f, 0x30b2f8f5, 0x333cb6ae, 0x8bbb2ba6, 0x97aed691, 0xc316dff2,
15329 0xa3dbacce, 0x0f23f721, 0x4b645fb9, 0xc8791fb9, 0xf72148fd, 0xfc0d7be3,
15330 0xd71bf00e, 0x6f43e5b7, 0x39158df5, 0x8e1cf84b, 0x7f5c81cc, 0x01ee12bb,
15331 0xf15dba3f, 0x8478e4f4, 0xf9e5620f, 0x2357821b, 0xb246dd1d, 0x5edd1059,
15332 0x8221d977, 0x88c6ebe3, 0x9c7e5358, 0xbf54d923, 0x2a6695c8, 0xbfa93ebf,
15333 0x7706fca9, 0x537f29be, 0xfd5348ce, 0xa6319e49, 0xdc468ffc, 0xc53faa60,
15334 0x9f94c53b, 0xa9b66136, 0x12e28cfe, 0x59ccf953, 0xb3e54c8b, 0xf94cdbb5,
15335 0x34ee2b5b, 0x92f1ffd5, 0xaf72a6e5, 0x0e715970, 0x231f4336, 0x3e85efb8,
15336 0x6fede946, 0xe3064667, 0x4b38d475, 0x350cef97, 0x56fa900d, 0x39f7ae74,
15337 0x09ee25d0, 0xe8fb0e81, 0xe2f680f7, 0xbf06199c, 0xfa914065, 0xe8324b70,
15338 0x685eb426, 0xfd88a8f9, 0x6594f097, 0x9f6ee7ff, 0x313e2561, 0x43fdaaea,
15339 0xfb7f2832, 0x5619e6c0, 0xaea32fe2, 0x3a52ffd9, 0xdcf17fe5, 0xf07cb237,
15340 0x57284bfe, 0xfccbf772, 0xc822c134, 0x9bce06af, 0x8c75a3e1, 0x8d7d2eba,
15341 0xba53da47, 0x5235538c, 0x9d7101c0, 0x00d20380, 0xfdd227d1, 0x5f489f44,
15342 0xb72cfa27, 0xe8907109, 0xd221e913, 0xf7fdf14b, 0x3d2297a4, 0xd2297a4c,
15343 0x452f4877, 0x297a42da, 0xcdd43fd2, 0x3a83f4e2, 0xb1fddb8d, 0x8fd382ae,
15344 0xf7f096ea, 0x7196ea4f, 0x1f3a97fa, 0x8064ff7f, 0xb0087f61, 0x8bf0c69d,
15345 0x091fc0d5, 0xdb2ede7b, 0xb1bf60b9, 0xabe795e2, 0x5facc7e1, 0xb0235a22,
15346 0xb1ad5b4f, 0xfe9d1c27, 0xadf9eec9, 0x92089c55, 0xdee19ccb, 0xf8f006cf,
15347 0xb7cc5dbd, 0xc447eff5, 0x84053eb4, 0xb5d34fa7, 0x3307e0b3, 0xc656ca0a,
15348 0xeeb8ff10, 0xd03625eb, 0xae9687cb, 0xd5efa3ef, 0x03a7dbf9, 0xf7e86dbd,
15349 0xa65dfd5a, 0xae321d6b, 0x6b6b5af0, 0xbfdbdb3d, 0x03c46e14, 0xefec33ed,
15350 0x5ef958f7, 0xe085f2b1, 0xc104e8fc, 0x5b2ffaf9, 0x5af10e38, 0xcf892797,
15351 0xc46f3d1d, 0xfdf87505, 0xef1413f1, 0x8de1f863, 0x2fc29f78, 0x3e41c75a,
15352 0x77691d18, 0x0dc48587, 0x2fbedfc0, 0xbcc68fea, 0xc3277df8, 0x97d4ffbf,
15353 0xf2f78022, 0xb5fe3f0c, 0xd834968e, 0xe1df4615, 0x33c704f0, 0xe57afe19,
15354 0xe715168b, 0x64af1189, 0x3bcc638c, 0x15fd4aca, 0x5d23c674, 0x47ca6aeb,
15355 0x757d465c, 0x93d7f724, 0x49dde3be, 0xb955e7aa, 0xec3e535d, 0x22aba3c7,
15356 0x8ce9423d, 0xafa9e813, 0x3af1ea9b, 0x38d0bf0b, 0x1eb4624e, 0x1c7e8127,
15357 0x01df9cb2, 0x48109d1c, 0xa39ffbc6, 0xb03dd897, 0xb88e3e83, 0xb8ce82b3,
15358 0x088fd405, 0x2798c7da, 0x15f7edfa, 0xbcf217cd, 0x9df0cbd7, 0x29f492e6,
15359 0x3f5e7adc, 0x2c6385af, 0x3d54bbdb, 0xfae61c5f, 0xcfd1046b, 0x90da19ad,
15360 0x1fdfd481, 0x7ccc8c94, 0x7a3217d6, 0x094fdf60, 0x0bb04779, 0xf03119fa,
15361 0xbc7e84ff, 0x05bdef12, 0xe942e1db, 0x418fc0c8, 0xbbde064f, 0x0e832ba3,
15362 0x18d0e282, 0x65711def, 0xf4a17f7a, 0x199d1dd6, 0x43ad75f4, 0x8cf001d2,
15363 0xae8320f8, 0xf89a2f94, 0x2ae8eb1e, 0x067f9f07, 0xc5d2855d, 0xe9257495,
15364 0x0e27feb4, 0xba4aefee, 0xc007a4ea, 0x55d387e5, 0xf8f38a8b, 0x79a7a59f,
15365 0xee3c626d, 0x765c97ff, 0xabda441f, 0x7c17b69f, 0x198c4ca6, 0x2e13120f,
15366 0x62ec1075, 0xba32f5a1, 0x7f4a17a9, 0xbc6eeda1, 0x6e465da2, 0xfa71bb70,
15367 0xaeda1959, 0x047aed12, 0x71c21bb7, 0xf7e96f11, 0x1a72de08, 0x999e2d71,
15368 0xb90e5390, 0x2f2df26d, 0x27cc8de1, 0xf3a719ba, 0x096243f3, 0xee24bf9f,
15369 0x854f40fa, 0xcb8d693a, 0x42fac85d, 0x71d76461, 0xedea3705, 0xdc5d7fc7,
15370 0x4f8cf980, 0x37e3cb30, 0xf5fcf2ea, 0x0ffb91a2, 0xc6e1477d, 0xce59ebdc,
15371 0x61477d0f, 0xfe3d40f3, 0x81a44d20, 0x8f0a17df, 0x0efe9f9c, 0xcfbea146,
15372 0xc9ba7453, 0x5462ab70, 0x6a9bee1c, 0xaf321c56, 0x3c8c1de3, 0xfce3eb8c,
15373 0xe9cfc20d, 0xfdc0224d, 0x0903a24c, 0x61091ff9, 0xc85fef93, 0xaa35bafb,
15374 0x5790dff6, 0x4fba7b8d, 0xb057b53b, 0x4c440fcf, 0x4a77839e, 0xd7190dc6,
15375 0x17f6ed0f, 0xdbce59ba, 0xb960c8ef, 0x16d2fb13, 0xde27c9d7, 0x5fba73a4,
15376 0x8a37bca6, 0xfb46f714, 0x3bfa79d1, 0xbf91c73a, 0x40b96731, 0x736ef1bb,
15377 0xfed193bc, 0x6138d726, 0x9cfeef8d, 0x776f29bc, 0xdecdd86f, 0x042ecd8a,
15378 0xbd8adf7e, 0x7deb10aa, 0x45a7b62b, 0x4e7661a6, 0xafd2bd07, 0xa0d8b92b,
15379 0xc6f1cefb, 0xc1dd78f3, 0x286b80d9, 0xff380d3c, 0xeb1eb800, 0x077bae0a,
15380 0xaa379608, 0xad5f2423, 0xd57c908e, 0x58757380, 0x9ede7dc7, 0x5527f1c1,
15381 0xf9af090e, 0x5611aecb, 0x2c17f512, 0x93f9c91b, 0xb807c275, 0x6092c69f,
15382 0xf7b10f10, 0xce58eb09, 0x9ddcef1b, 0xe8bdf87d, 0x2ae79a24, 0x983ff687,
15383 0x4082b9df, 0xe2844916, 0xbe7a86e4, 0x05fe7f8f, 0xaa7d03d5, 0xf1af754a,
15384 0x96facec0, 0x7d71ef2a, 0xfe15207d, 0xd754f158, 0x0e55e8f1, 0x9f435f09,
15385 0x98afd21c, 0x5fb1adf7, 0x80befe85, 0x0ef55f21, 0xc6dcf193, 0xe4eef73d,
15386 0x92e1e1ad, 0x930ef5af, 0xebc0d8fc, 0xee7ebb06, 0x89c33f53, 0x3afca68f,
15387 0x98abf59c, 0x2e4c6f58, 0xc28583ec, 0x76189fa4, 0xf904f695, 0x22b5ca7e,
15388 0x945191eb, 0x13643c2f, 0x076f2a7e, 0x92794043, 0x1fb6b3f4, 0xef82a4ba,
15389 0xfc294517, 0x6f71863e, 0x22c92c29, 0xc27c41dc, 0xbd370ee9, 0x13911b4b,
15390 0x7947ca67, 0xc7ea997a, 0x9537488c, 0x98077ac7, 0x1427e3ca, 0x8a3df298,
15391 0xefd536af, 0x29ac6b39, 0x68ddac9f, 0x31529faa, 0xf83794d5, 0x24fc8a58,
15392 0xc5b92cfa, 0xb2efbed4, 0x34fd5352, 0x5ca9a55f, 0x319b3bc5, 0x25b7ab40,
15393 0x81cf1127, 0xd58c9fca, 0xe3de434b, 0xf0cb08b5, 0xfe6b77ce, 0xcbde5a33,
15394 0x80b91099, 0x6cc9afdf, 0x9e7999fc, 0x2c6b44ea, 0xcdbbd7a5, 0xc928b17c,
15395 0xb9171f9c, 0x71df814f, 0x9fcccb9c, 0x4d589653, 0xeae51ff9, 0xe44f34fc,
15396 0xbbe3ddb1, 0x300daff0, 0x4e143fe1, 0x7efc0f44, 0xef9d3b68, 0xcdebcc3e,
15397 0x070f7e32, 0x75e0937e, 0x0c126fc0, 0x824df807, 0x049bf0f3, 0x24df87d7,
15398 0x937e1cb8, 0x8721f2e0, 0xd61ff8cc, 0x55ffc662, 0x6ff1991f, 0x787765d0,
15399 0xa66ad91a, 0x9a29a10f, 0xba782df2, 0x7e9994e6, 0x1d73f142, 0x09b15b89,
15400 0x09e287c0, 0xbe387fb8, 0x8be08656, 0x37f7c3f0, 0x31477bdb, 0xd7d71e7e,
15401 0x20606d75, 0x3a2e97df, 0x6fbc0aa4, 0x71f3ac63, 0x6d3fdcfd, 0x89731ad5,
15402 0x5dcefccf, 0x763e0490, 0xdb7e909d, 0x4f1655f1, 0x207fba80, 0x29d99c64,
15403 0x3fa843da, 0xaa52fe2b, 0x26d2741d, 0x0e7bcfdf, 0x95d8797c, 0x123eb2f1,
15404 0xf6bef84f, 0x27be54cf, 0xa8d2c475, 0x8eaf8f80, 0x9f009ed1, 0x84bb9799,
15405 0x8a249bd7, 0x5c402fb7, 0xa5857fd4, 0xafb73f22, 0x722dc7bc, 0x89fef95b,
15406 0xa6e727c1, 0x2da9b8c8, 0xdd7fbab9, 0x9ea7e323, 0x777295c9, 0x71c5c794,
15407 0xf2b925de, 0x8ba90d7e, 0x010773a9, 0xd99d873e, 0x0b3acf80, 0x8ad9ebbf,
15408 0x9d09e47b, 0x0f21c8f7, 0xa3ecfe43, 0x1ff57fcb, 0x47581c3b, 0x3a617af6,
15409 0x1dfbfb7f, 0x81e2f8a6, 0xfca65d5b, 0x5324a6a0, 0xdcbbc1fd, 0x40fcf2a6,
15410 0xc87ca98e, 0x3f298f21, 0xa98465ac, 0x791f55fe, 0xad91f94d, 0xaff54c13,
15411 0xca6c5539, 0x47b688a7, 0x8abedf01, 0xcd1c53b4, 0xb9fa974d, 0xe4dc705b,
15412 0xe563bbdc, 0x7edd5f7d, 0x46fbc861, 0xd3a6b9dc, 0xd11ea875, 0xe8e52ed7,
15413 0xf52164fa, 0x1fae8746, 0xa13eb30a, 0x1de371e9, 0xe67c58f7, 0x5e2371b8,
15414 0xd0ef43bc, 0x7b8e8af5, 0xe2f19d34, 0xf178e0de, 0xbf5d61b9, 0xc75e7d1f,
15415 0xfbfce87b, 0xeb7ae5da, 0xbdf3b4ef, 0xa15e631d, 0x96c949f3, 0xd1d9bb74,
15416 0xbfaabdf5, 0x46fb4ae5, 0x25f1666b, 0x3613fdd0, 0x6dff2b4f, 0xf3c62b84,
15417 0xb75e22b4, 0xcf7617fe, 0x8f77f70a, 0x5cb07737, 0x658b1ccf, 0x8e5c94de,
15418 0xddfd338b, 0x92418884, 0x7583adbe, 0x78c84afb, 0xdc646373, 0xbbb1889a,
15419 0x8fddbf41, 0x6499e127, 0xff7c0d17, 0xf167bf4b, 0xf74d35e3, 0xbd8e68a1,
15420 0xce3f7f51, 0x4c3d036f, 0x59f24b1c, 0x5b13c93e, 0x49143d7a, 0xcb13ca72,
15421 0x8a9f6cac, 0x3757fe7b, 0xde75fafb, 0xfa4be99f, 0xb203e810, 0x07a8f40e,
15422 0xb72954f2, 0x2beb920c, 0xb8eebf52, 0x187ec0e7, 0x43f3f421, 0x174fbc70,
15423 0x6874c6f4, 0x75dfe3ac, 0xdba0c1ef, 0xfa193850, 0x3be3d0af, 0xd2f319fb,
15424 0x07ec67e1, 0xfdc67e03, 0xb66df713, 0x7c914de2, 0xe202658f, 0x6dfc0ce5,
15425 0xc6f693c9, 0x503c3a05, 0xbba8fc0f, 0x6e6a457a, 0xedf7ec0c, 0xeae31dc2,
15426 0xea3b0e82, 0x62e09bff, 0xfbbbbfc0, 0x87f1dd6d, 0x5df0be50, 0xa3baddf7,
15427 0xdef67fd3, 0x909f105b, 0x5e3a4bf1, 0x1c2cfdfc, 0x94777017, 0x323f3f79,
15428 0x9189f248, 0xe4fdf483, 0xccd6fd23, 0x0ffc042f, 0x9d552bf5, 0xbcf3c85f,
15429 0xdf98ad24, 0x8af9c6af, 0x37f35bfb, 0x8847f94a, 0x87abc4e2, 0xe36f8fc2,
15430 0x7ad7cbfb, 0x4a6ddb05, 0xde3f151b, 0x75f12af9, 0x9fb30fad, 0x0772cdcf,
15431 0x26c83bbf, 0x46576a4d, 0x5da5f6ed, 0xc2facef9, 0x60eef948, 0x0beafbe8,
15432 0x2f19bd75, 0x86df606a, 0x19eebdfa, 0x3cb1fba4, 0x9cf2c3c2, 0xa150d71e,
15433 0x37a0e9d7, 0x0e6f7cbf, 0x31f6327a, 0x671f1ca5, 0x3f0dcdc0, 0x3cce90d4,
15434 0x073c37c1, 0xb58379e7, 0x0ec5f8cb, 0xab7e1af8, 0x61ecbf0e, 0x1a1127be,
15435 0x77ce718f, 0x3f2bba20, 0xeb1fe198, 0xf8741f6e, 0xefc3bec7, 0x89691ed6,
15436 0x69f1dfc6, 0x67df26df, 0xfd5bf4e9, 0x22cbb865, 0xf03153fd, 0xfdeab53f,
15437 0x5d798d89, 0x96d50fdd, 0x9438e4ef, 0x73b68b66, 0x2cefad10, 0x7b778ff5,
15438 0x9fdc89ef, 0x26117788, 0x2ba976ea, 0xcdcbadd7, 0x8fe914a3, 0xef8ca9f6,
15439 0x5ef209f6, 0x8151f13d, 0x4fc4677d, 0x0481114c, 0x4a1f86a4, 0xe1923d5b,
15440 0x4aa1f86f, 0x9e792302, 0xda17ea33, 0xeb68e4f0, 0x851577a3, 0x53fd3bbb,
15441 0x5c647dad, 0xaa7e7754, 0xb9f39769, 0xaf97e9bf, 0x183e7ee1, 0xb6e52694,
15442 0x036efb86, 0x2ad80d9d, 0xab67586c, 0x4bbfebad, 0xabf3a851, 0x3d9ae812,
15443 0x96ade282, 0x962fbc2b, 0xbf88c22a, 0xe46f3e62, 0xf9ea352f, 0x7dbf9922,
15444 0xeab7cca5, 0xd16da7ef, 0x275820ed, 0x7a07ac52, 0x4edd36f9, 0xc5207582,
15445 0x7c1df03a, 0x35f0790d, 0x90d7c1e4, 0x0a435f07, 0xa5ef86be, 0x761538a2,
15446 0x0ad3f85b, 0xfc07f683, 0x72418569, 0xc169fc13, 0x82d3f879, 0x169fc3eb,
15447 0x5a7f0e5c, 0x69fc3970, 0xd3f879c1, 0x9fc3eb82, 0x3f879c16, 0xfc3eb82d,
15448 0xf879c169, 0xc3eb82d3, 0x0e5c169f, 0x39705a7f, 0x79c169fc, 0xeb82d3f8,
15449 0x5c169fc3, 0x62996f3e, 0xd3cdb7f2, 0x5b287fdf, 0x51f4cf1f, 0x9b1c5198,
15450 0xeffdf847, 0xc4fc7f88, 0x373c0e96, 0x2edd022f, 0x48f70ead, 0x904e373c,
15451 0x8908b778, 0x8cd9b6e7, 0x32ecbbe7, 0xb4e3245f, 0x7e07e943, 0xf49b42ab,
15452 0xdf85215b, 0x56fc290a, 0x2ab7e148, 0x2b7e94cc, 0xe15bf0a4, 0x4856fc3b,
15453 0x0a42b7e1, 0xf85215bf, 0x6fc290ad, 0x2b7e1485, 0x0adf83b4, 0xf856fc29,
15454 0x5215bf0e, 0xfdf0adf8, 0xfe03cd08, 0x905e632b, 0xf499fbf3, 0x9343a252,
15455 0xe532ea5e, 0xd707e721, 0x5c1f9c87, 0xb83f390e, 0x707e721c, 0x707e721e,
15456 0xc1f9c87d, 0xdc8349f9, 0xef20bfbc, 0xbc83b707, 0xd41f9c1f, 0xb6037be8,
15457 0x2e1b49ab, 0x35b48ebc, 0x7142794a, 0x2f353109, 0x8bfc2673, 0x35254ead,
15458 0x6d8423d6, 0x859980f9, 0x38f4d794, 0x66d13cc7, 0xae39be01, 0x05a6f080,
15459 0x0f65c704, 0x5cc97ffa, 0xf9b3f86e, 0xbf9ef087, 0x50deb043, 0x35afdfa3,
15460 0x4b847bda, 0xefd46a45, 0x2f5d77cc, 0x1ea37c74, 0x79a0cbf3, 0x8f996290,
15461 0xbbfc9378, 0xaf700b22, 0x91458b60, 0x642bb8f1, 0x5d28743c, 0xe793caad,
15462 0xf6cb16fb, 0x5388e1fd, 0xb83c5129, 0x156591ef, 0x80056c87, 0x7e0292d3,
15463 0x562f2af7, 0xab92d75f, 0xcc658711, 0x124bb0db, 0x867be09f, 0xbd84daa3,
15464 0xfd19c69c, 0xefe3b085, 0x4bb44c73, 0xa0ed0279, 0x29f40e6f, 0xf4414dde,
15465 0x9e4f2cbd, 0xb6ef9a7b, 0xfbe9cbab, 0xae4b6dc0, 0x89c5fdc6, 0xd3ddb2e1,
15466 0x386689bf, 0xf8506e4e, 0x6da8ce9e, 0xc9fb8bc2, 0x3a7e75cb, 0x5ecb9b70,
15467 0xf8bae3ce, 0x6fd1a3de, 0xbe5486c9, 0x5a2259a7, 0x450f710b, 0x3df8550c,
15468 0xb46e037c, 0xbeb1d7be, 0xb02ada2c, 0xfbe0ff2f, 0x7e2e244f, 0xa34ffb9f,
15469 0x2116c687, 0xcb3450ae, 0x0d2742f7, 0x83d9592d, 0xe5f9a5e6, 0xbfa3a17b,
15470 0xe706f258, 0x85ef929f, 0xe70cf932, 0x9879f1f9, 0xfdf853ed, 0x8dbec995,
15471 0xee370496, 0x25b72f65, 0xe136fea2, 0xf5055881, 0x8d8af708, 0x168ae575,
15472 0xbd01538b, 0x41f10388, 0x639c47f4, 0xdf25e83a, 0x59f7e363, 0x365d58a6,
15473 0xce431bf0, 0xb1c97129, 0x3151d48b, 0x4432cf7c, 0xd0d4b84e, 0x7e62e383,
15474 0x3b4e9c78, 0xba5fe7df, 0x8572c9d3, 0xbe615eb6, 0xc65f3e79, 0xf6dd56bb,
15475 0x7a4b70e1, 0x99ce9c67, 0xbc16ff34, 0x7d267b03, 0x8508f47b, 0x79bd88e5,
15476 0x0da3d704, 0xcd3df12f, 0xf06f9592, 0x0d4b943d, 0xfbcb450f, 0x52ffd26c,
15477 0xb0cdc3ae, 0xf1d7cd3b, 0x69c7ae53, 0xef93ab1d, 0xcc39d33a, 0x6a5caeef,
15478 0x119cb1b0, 0xf21a2f2a, 0x911ef1a7, 0xc23fae10, 0x60d153ce, 0x0bc03be3,
15479 0x4aac94d7, 0x91ca5712, 0x7339758b, 0xe38d8351, 0xf7f42ab2, 0x6eff42d4,
15480 0x1e3d62cf, 0xf356f16b, 0x42f24ff7, 0x7de350e4, 0xc94ebd4d, 0xb06607db,
15481 0xc6c4b43c, 0xcb39cdfe, 0xb6247ca5, 0x93ee3f0b, 0xce3e59cc, 0xe666f782,
15482 0x947af4ec, 0x5de9e82e, 0xd89a4e5d, 0x4ff864ea, 0xfcc11cb9, 0x14e5ea65,
15483 0x397cdfce, 0x9799d399, 0xee2adc65, 0x5a6e8122, 0x073be48b, 0xd1f2ebef,
15484 0xc6b1c40c, 0xc9eb3e43, 0xf44eddf4, 0x74f2218d, 0xabc035be, 0x3878801c,
15485 0x44ada6d1, 0x8dc4ec9c, 0x4d83ef82, 0xfd451c82, 0x155c82cf, 0x5691fd8f,
15486 0x2661f7c4, 0x68bf7c28, 0xf4dbd0d2, 0x43fb40fd, 0xf7e13f30, 0x29c2b457,
15487 0xcd39c47e, 0x805bb6d2, 0x685f637f, 0x5efca3be, 0x629f24ea, 0x9a923bc7,
15488 0x741b6fae, 0xe63fba1f, 0xb276e846, 0xeb076948, 0xb26193b0, 0xb7c92478,
15489 0xd3e4266a, 0xf66db0b9, 0x608109d2, 0xcb2b951f, 0xd576fc7b, 0x419206cc,
15490 0xc9fb55ff, 0xde458b1c, 0x9039233f, 0x96880bef, 0x2f949ea2, 0x4014a359,
15491 0xf5e6323f, 0x38ec67b9, 0x3a4eb0cf, 0xa7d8ed28, 0xd2e51ef2, 0x7e4d327b,
15492 0x8cb4d09b, 0x34fd8de0, 0x27f5a637, 0xf468610a, 0x1c2de160, 0x85ebf781,
15493 0x005428f1, 0xe8b798f1, 0x3bc1eaf9, 0x973ab4ff, 0x91f9c4e1, 0xa6687dbf,
15494 0xe05ff22f, 0x6b147393, 0x4b1bdff0, 0x0d5768b2, 0x50f7c1ee, 0x11bf03c7,
15495 0x9efc6db9, 0x4bb64a44, 0x7b10a9f2, 0x8960f54b, 0x4bbb50c7, 0x773cae59,
15496 0x7a9dd584, 0xdc7bfb2b, 0xd634b76c, 0xbe66cc7d, 0xf3a46be7, 0x5ee7eb07,
15497 0x9ee7bfdd, 0xf916c3ca, 0x1663c2fe, 0x8857f6ff, 0xd0f72f5e, 0x8fbd6066,
15498 0xe79ede21, 0x8cfaf1af, 0xf83a4cf7, 0x896efe95, 0x96474f41, 0x2afbe25d,
15499 0xb77691a5, 0xe54f441a, 0x0fbe15ab, 0xde4cba5a, 0x2b56d6e7, 0x6e845df2,
15500 0x99bf58ec, 0x9efcbffd, 0x117e6fd5, 0xf8750b2e, 0xbcb7b1ce, 0x84eb48e1,
15501 0x3d979fef, 0x347c9360, 0x0efb8990, 0xf2712cb7, 0x7b9fd9bb, 0x0f06ab8a,
15502 0x8c3c9e03, 0xe5d871a7, 0x8c4b7f54, 0x4bdf04b6, 0xd841cb45, 0xfcfee71d,
15503 0xba8f7e6d, 0xdf8d39b6, 0x95d92cbf, 0xd9ef0abf, 0x7ed1ee7c, 0x4497f582,
15504 0x4790ecba, 0xf9621a6a, 0x53db9e7c, 0xda2bcfbf, 0xe067cfd8, 0xd2c1bee7,
15505 0xbe7d778e, 0xaea2e71c, 0x6cc01157, 0xbaf54c53, 0xf61a63b6, 0x4b3b50d1,
15506 0xdf21bbe8, 0xdd815765, 0x5f641ec4, 0xb632ec35, 0x71b3639c, 0x77b1cfae,
15507 0xf73ef7fd, 0xf437f3ea, 0x7a1df9da, 0x9ef8ee6d, 0x2ad7ff90, 0xcbd3d82e,
15508 0x7133dd23, 0x90fca1bf, 0x62b4910d, 0xbe5b9c62, 0x7c8f731f, 0x8ef4a63f,
15509 0x7367e67c, 0xdc029380, 0xfbc9193b, 0xe94fdcb8, 0xfbf7ee90, 0xf40f6bad,
15510 0x0a7a0dd9, 0x821df978, 0x1ed79772, 0x951f2417, 0x77a62a35, 0x0bfc8c24,
15511 0x97c95583, 0xfc00dd48, 0x9a477c7e, 0xcd396f1d, 0xf1093121, 0x27417b99,
15512 0x51db3ac3, 0x993f8e3d, 0xca0e2e98, 0xfe14bdf7, 0x2f18e4bb, 0x955beff8,
15513 0xc3df9a36, 0xdf2cfaa0, 0xc51c1aed, 0x68b895fd, 0x5d4869dd, 0x03824f3c,
15514 0x3eeda9c3, 0xe3cdcfea, 0x02ca3e30, 0x07ec1b7e, 0x42f71073, 0x7e5c5bf9,
15515 0x6d29c61b, 0x68d4ef90, 0xda38e46b, 0x20fb58ea, 0x975607c8, 0x5cb04fbd,
15516 0xbddf20d8, 0xddffa39e, 0xcb2f9a11, 0x2704e5cd, 0xee33b3dc, 0xabc286dd,
15517 0x797f9f44, 0xce59ac63, 0x036b5c6c, 0xf377667e, 0xdd39c65e, 0x30da5d0e,
15518 0x2837df86, 0xbef97ab7, 0xfbc3a68a, 0xf79cdbb3, 0x7b325fc2, 0x34b623dd,
15519 0xb065ffca, 0xe9cf6b94, 0x7a6271fb, 0xa9df9320, 0xf1c9cdba, 0x8d5db3e3,
15520 0x780edebc, 0x81f0443f, 0x662ae2dc, 0xf89d1378, 0xbe596f10, 0xcedf8cce,
15521 0x77c944f9, 0xf095d7fc, 0xd5605bfe, 0x79e0aeec, 0x8997dfac, 0xb4d9a1f8,
15522 0x970ef1ef, 0x1f7c6970, 0x3343c4f6, 0x6205eff9, 0xe6cf1c9e, 0xbbc78f71,
15523 0x4c374453, 0x18fd06d7, 0xf18df3f7, 0xb4ab1eac, 0x6bbe7bc7, 0x420f7a9f,
15524 0x7c27af4e, 0xddd00fc3, 0x02e3b53e, 0x2f6b8d26, 0x5e07ef97, 0xfdf4efc1,
15525 0x6a01fffa, 0x00d36c91, 0x0000d36c, 0x00088b1f, 0x00000000, 0x7dedff00,
15526 0x65555c7b, 0xd6bbf0ba, 0xc0d857da, 0x51b08b66, 0x62020dc0, 0x10106d11,
15527 0x80a17515, 0x636a735b, 0x8dc42937, 0x910150b7, 0xf39fa8ac, 0xa96f0db1,
15528 0x962a2695, 0x8da6b675, 0xb2707595, 0xd99b1b46, 0x0f5d9a6a, 0x39d38d3a,
15529 0x32cdb653, 0x34d209bb, 0x99d37d9f, 0xde79e7be, 0x0daf60b5, 0xf9a675a4,
15530 0x3efcefce, 0x7df5e3fc, 0xee7d7bd7, 0x765ef3cf, 0xb24c6322, 0x98783631,
15531 0x8c81b183, 0x45931819, 0x77a13fc8, 0x6302edfb, 0xbeac7195, 0x28d2132d,
15532 0x0b6bff56, 0xdfe3df63, 0xa2749ef8, 0x8f2c6453, 0x5da0dbb1, 0x10af7c1b,
15533 0xd6ccabd9, 0x29d33df3, 0x148af7d0, 0xd41dd336, 0x7ec3fb1e, 0x13efd5e3,
15534 0x338b69fc, 0xe3abea7b, 0xbb78d856, 0x9a7ed0a9, 0xdd8beb05, 0x3ea81bf5,
15535 0x26e9b3cf, 0x3632c591, 0x87ff04db, 0x7b4894a5, 0x32e6c456, 0x7057b0d6,
15536 0xe1a8a11a, 0x18b18941, 0xf08b9f48, 0xbec664b1, 0x3bcdf868, 0xcfbd40b7,
15537 0x64af6f37, 0x35e67b43, 0x398a3fc7, 0xf7363046, 0x0c733652, 0xa5de6c60,
15538 0x0f569431, 0x073864f3, 0xf8dbd506, 0xc607ba5c, 0xfb2dadbf, 0x5a307fdc,
15539 0x30e59fb7, 0xbf73fef6, 0xe868e3fd, 0xde9f3197, 0x3acf4d7d, 0xa13ead66,
15540 0xc304b2af, 0x4d73af8d, 0x83155746, 0x18b6ce79, 0xcd14121c, 0x64c55e5e,
15541 0x33b32798, 0x13e41a67, 0x422bcc75, 0x16fd6cbf, 0xf3eb04d9, 0xb557fe30,
15542 0x5da9905c, 0x824fbe63, 0x7a860cf5, 0xdf5e1cc6, 0x58f7f00c, 0x4884670c,
15543 0x912de8a8, 0xcdbc1903, 0xf83d29f7, 0x21a90c1d, 0x89ef07a7, 0x5ecc1d0a,
15544 0x7b6d0657, 0x330305f0, 0x65eb0f96, 0xfceaae1c, 0xbff32aa7, 0xfb20bd6d,
15545 0x4e0ddea0, 0x2757cf07, 0x7ac1e61b, 0x364face7, 0x5cb486cc, 0x473e5ef9,
15546 0x2f8dde5b, 0xccaf8aab, 0x4f587695, 0x57c71b57, 0xe13d3ad7, 0x2f4f6bab,
15547 0xa931257c, 0x00771e67, 0x8e00d8be, 0xe382362f, 0x57c0530b, 0xa82f33a5,
15548 0x7c70bfde, 0xedfe7ecd, 0xd0765e0f, 0xceffa8fa, 0x1dbe8d07, 0xb6acffd0,
15549 0xf2b784bd, 0xc9f41bd5, 0x99ceaf50, 0xdb51704c, 0xb6cfaecf, 0x6de78032,
15550 0x1debb7ab, 0xe8eefc16, 0x9521ee93, 0x413f1059, 0x6790099e, 0x3bbc40ba,
15551 0x397ea7a2, 0x9c617ba4, 0x91cd8b25, 0x719edaec, 0x3cf428b6, 0x86da3ebb,
15552 0xafaecde3, 0x7165887a, 0xf66777fa, 0x66b3bfe6, 0xa0b317ce, 0xb3cfe43f,
15553 0xe424ce45, 0xd4510a8b, 0x3e9a9bf0, 0x79837884, 0x35e0063d, 0xdbc3fe23,
15554 0x0c38469e, 0x6ce6145e, 0xa9a94f86, 0x8b8e1f01, 0x36f38cf4, 0x826bcc88,
15555 0x8135a97a, 0x548f388b, 0x876c28a0, 0x528d8469, 0x1df90b16, 0x4802ed30,
15556 0xee9e2453, 0xc3f5f273, 0x677e3f77, 0x5c3c8131, 0xa1cf4abf, 0x3b606af4,
15557 0xfe00a757, 0xd9cc310d, 0x4fa1e8ec, 0x3e951fb5, 0x6fedfa55, 0x70ae7b7d,
15558 0x3993677d, 0x3386593c, 0x56e304c9, 0xb9cc3c3e, 0x3afcb846, 0x0f00610d,
15559 0x817ad05b, 0x7d6c0b58, 0x903537ac, 0x0fcd7657, 0x24a5b7ad, 0x86f58fb6,
15560 0x93e553ae, 0xc3ce2639, 0x015127c0, 0xfad77798, 0xf10c51a1, 0xca2f302d,
15561 0xcd8bb39d, 0x5d5bce22, 0x504d53d7, 0xbbb6e619, 0x33e944c9, 0xc368c04d,
15562 0x764d3e00, 0xe4df3fca, 0x29adb4a0, 0x9ddbca83, 0x633f9a36, 0x80698881,
15563 0x85308aa7, 0x8f3cfdff, 0xe54165e5, 0xee9c6d53, 0x11035b4e, 0xfd3920b6,
15564 0x0d79bd71, 0x0efa428b, 0xccfc883c, 0x5db2871a, 0xf5e9d430, 0x4cc42367,
15565 0x3f3e4fa4, 0x7d12ddb5, 0x163fc927, 0x02ec7061, 0x24b19b96, 0xe02374fb,
15566 0x38f2ee6b, 0x9b129027, 0xe49438d1, 0xb46f0cc2, 0x7eb00093, 0xcc78430b,
15567 0xf860e453, 0x2395aa92, 0xb26b7eb1, 0xe6718055, 0x5ae79c5a, 0xced5fda9,
15568 0x4b7bf1fb, 0x93252199, 0x9026caaa, 0x72287763, 0xdcc0896c, 0xa07787c8,
15569 0x12fe449c, 0xfea2a50f, 0xf055a3b9, 0x56cf291b, 0x21d7000b, 0x78d2eecd,
15570 0x055b1394, 0xbb6c0ee7, 0xa9a9e40d, 0x0d769e47, 0x7a817f73, 0xf4077d81,
15571 0x255ffd07, 0x5d710220, 0xca1c726d, 0x75824df1, 0xb979c317, 0x059f080d,
15572 0x6e9c9d0a, 0xc8e11339, 0xa3eb81ec, 0x65105ff8, 0x288b23cc, 0x3d141b6f,
15573 0x79406486, 0x310e4e45, 0xca41f870, 0x3a3f11da, 0xa0e909a7, 0xc51292cb,
15574 0x886f28fa, 0xf2c38948, 0xc912ad39, 0xaa9e9545, 0x7c2835d5, 0xa3be1733,
15575 0x2a912bde, 0x56be9162, 0x74a44cb6, 0xcd9286ce, 0x24e3a05e, 0x9a3b1dc1,
15576 0xb867a3d6, 0x13b5399e, 0x55bc47af, 0x9b4630ef, 0x7a496f00, 0x104e526f,
15577 0xbed9ce3f, 0xbb41892a, 0xd3cddbf3, 0x5b17fe51, 0xa1a38acb, 0xd16dbcfd,
15578 0x1e9052d9, 0x7ae6ca49, 0xc4ed4164, 0xacf00638, 0x2791fbf9, 0xe78fa0ac,
15579 0xe8569f42, 0x70b69bff, 0xd4aa179f, 0x924fed34, 0x31dee780, 0xa1b3e279,
15580 0xe0f142fe, 0x1f50a32d, 0xe2a7be08, 0xce23bea9, 0x503c87da, 0x0fc073d3,
15581 0xdaf7a00e, 0xf51ef5ff, 0xd6f895f3, 0xbed0e5f5, 0x4885f6a6, 0xa6e167ec,
15582 0xa15be43f, 0x49e8a0fc, 0x173ffec3, 0x45653fb6, 0x9edd6c02, 0xee7c7a85,
15583 0x4f28b4a6, 0xf917f21f, 0xbd51f100, 0xaaf8205f, 0x517c33e5, 0xc7bb8406,
15584 0x4c560ccf, 0xf480ccad, 0x8d625e7e, 0xf6a80f68, 0x323e5a8c, 0xf3adcb9b,
15585 0x9093eb51, 0xb53fe64e, 0xccf50925, 0x5f3c1167, 0x6fadd4f1, 0xecf2dca0,
15586 0xaf101a34, 0x38331d1e, 0x41799f51, 0x551d22bf, 0x93c6ff03, 0x04ae61dd,
15587 0x0eca2a7a, 0x6fceb827, 0x51fa411d, 0xa77c179d, 0xcc74cff2, 0xd218f385,
15588 0x748d99dc, 0x7f9d67ff, 0xcff3e22e, 0x17a766f5, 0xf5cd99f1, 0x4bd79fdb,
15589 0x05ee58a5, 0xe47b4186, 0x885febcf, 0xd8f4b548, 0xfbd2256f, 0xd67684b2,
15590 0xea36428b, 0x76ccf0ed, 0x1bb22cc3, 0x9d59d118, 0xc359d395, 0xe0e97d01,
15591 0xa8c7b218, 0x37e746a4, 0x05af85f4, 0x9dd5bd8a, 0x80d7b7df, 0x87b3527c,
15592 0x6d3511db, 0x508ec867, 0x855a92ed, 0x39ee179f, 0xda857643, 0x871f6eae,
15593 0x5e3eed4b, 0xc801955e, 0x80e5cd1d, 0x0aba4200, 0xfbf905f1, 0xd3d7f5fe,
15594 0x7bf26997, 0xb5df7f29, 0x750f2e56, 0xb7a8499d, 0x349c64d6, 0x976bfe20,
15595 0x5e42fd2b, 0xbcde341f, 0x2f0481ec, 0xc16a1f2c, 0xfd8d0ef6, 0x9a2fbb50,
15596 0xc36bfbda, 0x97bea356, 0x4c3a2ceb, 0xa42d6b9b, 0x8bd5b7ff, 0x9c5cba19,
15597 0xed13985c, 0x916183b9, 0x07472859, 0x06653c2e, 0x3b6a0248, 0xbe50888f,
15598 0x2f73ca3a, 0x031c67d2, 0x6f5090ae, 0x5fb405f8, 0x74f95e3b, 0x6e3ff604,
15599 0x066be048, 0xbf0bd753, 0xf20c5e9b, 0x2d981964, 0x06671f64, 0x0f1d2046,
15600 0xf4e5cc3c, 0x1ab67ae3, 0xb9d31bf5, 0xf72834d9, 0x3c42dca3, 0xdbe61b7f,
15601 0x1dffff05, 0xfec60ff3, 0x143fc999, 0xd0a4bddb, 0x5968dba7, 0xaebcc02d,
15602 0x8359ea1e, 0xd041be4b, 0x222d935f, 0xac34a40e, 0xdfe7a1d7, 0x82757b55,
15603 0xc113a722, 0xc8bb408e, 0x416ec830, 0xf3366e3a, 0xccb209f5, 0xf71e611a,
15604 0x8d9e1e67, 0xa76d7a7a, 0x9d611989, 0xc8c33a13, 0xe41c4d7e, 0x6cd6bd22,
15605 0x2dbd224e, 0x02ac7438, 0x14ce1fea, 0xcfac3afd, 0xcfac3e4c, 0xae76214c,
15606 0x9db19668, 0x6fb5f070, 0x960fbe51, 0x82891e2e, 0x47be0df5, 0x9d433670,
15607 0x8f73aeca, 0x15a41bff, 0xfdec7697, 0x2dff4857, 0xe113b3ca, 0x75cbba7a,
15608 0x5ba803c6, 0x39336d6b, 0xc160deb9, 0xef7838eb, 0xb13691b7, 0x9d1d7e67,
15609 0x4dfb9ee7, 0x2726a62e, 0x07099fea, 0xa11fd225, 0xc3b0e9f3, 0x3d5287c4,
15610 0x2c3b3bb2, 0xb0104fa2, 0x70f791fe, 0x164c137e, 0xbaf684bf, 0xb065ff49,
15611 0xc48e617e, 0x935773e8, 0x83df614a, 0x938b1091, 0xd1747d47, 0x38eb7642,
15612 0x3a550f85, 0xdb9b2b7b, 0x72296f8f, 0x73338555, 0xaf582cc8, 0xd66cf0a8,
15613 0x1022faab, 0xf87b32ce, 0xaf529176, 0x932892eb, 0xf46d5e1d, 0xebb2e831,
15614 0x33d250e0, 0x3fd9c9fd, 0xf601dda0, 0xf954f2c4, 0x5327845d, 0x0acdeef4,
15615 0x2dfd54fc, 0xacdffd29, 0x8b66f1c0, 0x5376e1c8, 0x7a14dc08, 0x1e97a50a,
15616 0xdb41887a, 0xeccf1ba3, 0x51a3f6be, 0x6bdf84c9, 0xfd78e61e, 0xedfaf090,
15617 0xcd802b5b, 0x4dbfa0d8, 0x0cfefc21, 0xb98bf578, 0xedaf023f, 0x9bf578a1,
15618 0x375e2187, 0xa0676489, 0xa376881d, 0xb5c0e507, 0x60f6e794, 0x51392306,
15619 0xd7398529, 0x8077e324, 0x87c91643, 0x541f28a3, 0x15c430b9, 0xe9f506b8,
15620 0x71e57069, 0x8db1017e, 0x10a4e797, 0xf6b0245d, 0xbc072c78, 0x277da1e7,
15621 0x7e668699, 0xe5b7720c, 0xdfdedf01, 0x82cd3f40, 0x983ceb6f, 0x8b66f78f,
15622 0x0eb7ed13, 0xc3d5e89f, 0x59a25a3c, 0xbf187ed6, 0x4e55fe65, 0x4533962f,
15623 0xf8374c6e, 0xef837ed0, 0xbdf88d49, 0xe97f7f9c, 0x441f67ef, 0x8d33acfb,
15624 0xb25abad1, 0x67da3a59, 0xf419652d, 0xdcaab7fd, 0xb7823079, 0xddf4e32f,
15625 0x43e6df32, 0xa3e8f43d, 0x27a8e1be, 0xf1cbb65a, 0x510d4836, 0x981cf89e,
15626 0xd38920ff, 0x94324b7d, 0x7059ba43, 0x7ec5cf97, 0x0df3e1ae, 0xff3d8794,
15627 0x4e657414, 0xe506d105, 0x76231ba7, 0xe9555ca0, 0x2e30f074, 0xcf7887df,
15628 0x7938456c, 0x7a8cb027, 0x8543ffe8, 0x0bf854de, 0x008d36c0, 0x3c1098f7,
15629 0xa31774a8, 0xca585fc0, 0x413bcfe9, 0xf31d4f59, 0x0091bfa1, 0x38070953,
15630 0xf0c11a57, 0xd5967483, 0x6ff38d93, 0x91f80c5e, 0x0f1c1d70, 0xdd5645a7,
15631 0x155f07d6, 0x0df128e6, 0xa6f90218, 0xa9be7192, 0x7a42ba44, 0x0aba046c,
15632 0x481647a2, 0xae173e88, 0x83ca15d0, 0x1cb8f708, 0xc257e758, 0xf0b1f21f,
15633 0xa694ffad, 0xa4ce35f7, 0x1e2f2e1c, 0x734a7b33, 0xd04def48, 0x656f9dd8,
15634 0xfa889a7f, 0xafbdf4e5, 0x149a6025, 0xeb8c9ee5, 0xd7fe5cd8, 0x1fff1452,
15635 0xb8f407c6, 0xffcb0f8e, 0x2dda224f, 0x235f4b95, 0x79d2bffa, 0x37989996,
15636 0x5d1ee01c, 0x00fd382c, 0x462d79bf, 0x16f824e7, 0x0c755c57, 0x6ad659e1,
15637 0x56911874, 0x1c8d62d8, 0x408f2b3b, 0xda1d8a37, 0x39ba246a, 0xf4894bf7,
15638 0x8b92b9c1, 0x0f800eaf, 0x4e0856e7, 0x32d657ac, 0x3790256c, 0xa816292b,
15639 0xa057995e, 0x1ca9657a, 0x051a275f, 0xaf4037a2, 0xde283b25, 0x8ef5a731,
15640 0x13df88a9, 0xa40f5fc5, 0x187ac1f8, 0x2e63e547, 0x959e48de, 0x56abf529,
15641 0xbb47911b, 0xacb597bf, 0x3ffc88ba, 0xde521bd3, 0xec53e93a, 0x5b51acb7,
15642 0x8235c6ee, 0x4e57771d, 0x07ca0c44, 0xefce64e6, 0x40f24811, 0x93fa0ff2,
15643 0x447140bb, 0xc20f30cf, 0x61bc89c3, 0x99eba47a, 0xdba05708, 0xdd7ca5e8,
15644 0xbe0aa733, 0x99ceb049, 0x1f67ce16, 0xfbbe0996, 0x09ff3e05, 0x5065ef40,
15645 0x5d740b1e, 0x38e4c316, 0xe626dd48, 0x2e79c70f, 0xca09f61d, 0xd438d3db,
15646 0x8fefaa28, 0xf75ca1b4, 0xb78911e8, 0xe5a52f32, 0xede947cc, 0x98f34fcc,
15647 0x74933ac1, 0xfc93af90, 0xf38e312b, 0x0367b32b, 0x8b5fd7d2, 0xe0169c4e,
15648 0x4239ddfb, 0x439428de, 0xdd68038d, 0x701f5b97, 0x067680a5, 0x5fac41aa,
15649 0x147ee396, 0x4ccab3fb, 0x74ab718f, 0x995a8e95, 0x17d61537, 0x9be2debb,
15650 0x6b8beb04, 0xf5c21cf5, 0x38374fa6, 0x1383ef10, 0x74133af8, 0x543f9fdc,
15651 0x81a3606e, 0x183f360e, 0xdb3a43e6, 0xda2035bc, 0x03e6fea1, 0x97cc0180,
15652 0xf0bc14af, 0x4e61eadd, 0x7559d38c, 0xfeed111e, 0x188f56a2, 0xe1a7e208,
15653 0x394441b2, 0x23d3be91, 0x5ab49ea2, 0x353d53d7, 0x4fd4ac5f, 0x59067937,
15654 0x4e9e4ec9, 0xa15c33f4, 0xd49fb51f, 0x045f8356, 0x4ac917b8, 0x57b7997d,
15655 0x9e8a61fb, 0x3961db56, 0xab7a67d2, 0x453f4fa3, 0x3f505b4d, 0x08f88f83,
15656 0x7bd205c6, 0xfd711fca, 0x1bf084da, 0x36abf378, 0x2103374c, 0x9d1c71f8,
15657 0x79e34cc7, 0x15d33cf8, 0xbfbf87da, 0x63e38f7f, 0xb9bbf01e, 0xe422fef5,
15658 0x1f00cda3, 0x9de6f3c4, 0xcfd4ccb3, 0x799a59f4, 0xf286a931, 0x4b070825,
15659 0xa23c75ef, 0xd53d2fcc, 0xbd695a23, 0xe76843ce, 0xe28ccba5, 0x763f6a01,
15660 0xf405741d, 0x857a776a, 0x90cbcc7a, 0x47b8945a, 0x4eb38e3a, 0x5d31ff40,
15661 0x6b4957c1, 0xf63361fd, 0x5f1466e3, 0xfe85cf4c, 0x8426fea1, 0xfc37a183,
15662 0x5e99e742, 0x4273e7cc, 0xf18edfa9, 0xe76c7494, 0x74431158, 0xd5d7e7c5,
15663 0x1c6214ea, 0xa08fb197, 0x7e90c9fd, 0x0cb8c29e, 0x7e4ecfa4, 0xb42e4a6d,
15664 0x97d1fe7f, 0x52d0b476, 0x0fb33e0e, 0xf5ab56e5, 0x9c709be6, 0xff9f2283,
15665 0x5de2724d, 0x206ddf98, 0x53be9a3d, 0x7944db4e, 0xebfd1393, 0x55df56ae,
15666 0x2cbd422f, 0xeb64c618, 0x0a138f3d, 0x3a15da9c, 0xcb793938, 0x53ef5c20,
15667 0x582c7745, 0x5f87ed02, 0x3b8d38f7, 0x94fcca7c, 0x9b0fc816, 0x30abcbf8,
15668 0xc78e5f7f, 0xfee4023c, 0xde5fd2b0, 0x6ae50fb6, 0x821cfce9, 0x4576c597,
15669 0xda39a9f2, 0xbf02f5e3, 0x52dc4737, 0xd2b8fc8e, 0x24487066, 0xfa19eb77,
15670 0x7711cd59, 0xe5bfb1db, 0x4c26f9d1, 0x36bfd60d, 0x6e3c9ca1, 0x1e2131c9,
15671 0x18132d9a, 0x0aaceb96, 0x4f1bbe9e, 0x885240fa, 0x73847772, 0xe5744cba,
15672 0x0c272864, 0xbcad0609, 0x2f7971d6, 0xb43e1dd9, 0xf5acba9f, 0x60cc8148,
15673 0x7ca05409, 0x69795493, 0x3c717a71, 0xa3b4e2c9, 0x9142b4bf, 0xaf862c37,
15674 0xf73960d3, 0x5eaf389f, 0x962e63fd, 0x867f4b50, 0x4128ccb0, 0x9bda3ff9,
15675 0x573e10c6, 0xbbc58353, 0x6844f518, 0x70205d7f, 0x4fa38e50, 0x7e337647,
15676 0x5eddee48, 0x7a341bb2, 0x7a5e5ba4, 0xf221f5a2, 0x7a811e52, 0x792058a2,
15677 0x0ceb61e9, 0x0c12feb8, 0x3c5c00b2, 0x545eb8db, 0xce267bf9, 0x49e5f005,
15678 0x5e5c9165, 0x2673e4e9, 0xd1efc60e, 0x452a5cae, 0x5e021e22, 0xc3e9e0c9,
15679 0x9378f79f, 0x9d1e507f, 0xa987fa41, 0x21fe9007, 0x0fe144fd, 0x6f078a8f,
15680 0x50a3f5d9, 0xd912cb5f, 0x85cb9503, 0xe2cfb436, 0x6947d1bc, 0x2edcc5be,
15681 0xa6bf9768, 0x892a1cf5, 0x7979444b, 0xc799d962, 0xbebd41ef, 0xfff49c29,
15682 0x5667a5a4, 0xa66e3c60, 0x211a7057, 0x7d1a59ef, 0x6f987bf7, 0x905d3a34,
15683 0x81f0ab3f, 0x914597fb, 0xb8084f68, 0x759e8cce, 0x83321656, 0xf139e29b,
15684 0x3b409633, 0x34e0a34f, 0xa1e07a3b, 0xef527ac7, 0x37bc05f5, 0xfad0fe46,
15685 0xa8d7bc3f, 0x3e7759c8, 0xc6a2d9ca, 0x700a87e4, 0x7cf5eb5d, 0xd7d18d9e,
15686 0x3927de53, 0x1cb97639, 0x3fd8a99e, 0x57b3a59e, 0xc0f7c3c6, 0xcef9416a,
15687 0xc8a956f1, 0x88e340e5, 0x0d3f1863, 0x3e48172c, 0xa252bc79, 0x5ccdda1f,
15688 0xef784d9e, 0x5d900a28, 0xb43de5d8, 0x722b5a92, 0x3674a3de, 0x94588c17,
15689 0xe3dfa76f, 0xfe479ffe, 0x9bb62563, 0x83b5a2d3, 0x0cfd0226, 0x67bcb840,
15690 0xf1e9fd26, 0xefbad196, 0xea6945f0, 0xd38ead55, 0x8bab3de4, 0xe7b0c7ae,
15691 0x52277bac, 0x3992af3c, 0x2ade9122, 0xc1376e65, 0xe61b259f, 0x4f9d5733,
15692 0x2ac7b731, 0xa27ec18b, 0xb07b5aef, 0x3389fec7, 0x78a8df20, 0x3a13f154,
15693 0x19765eef, 0xacd076e3, 0xdd7ada75, 0x16301076, 0xe5caba8a, 0x32bf76da,
15694 0xb9459fbb, 0xe038dee8, 0xaeabf21b, 0x80821e50, 0x266e7f21, 0xa61f71e3,
15695 0xced543e8, 0x517a592f, 0x6668728f, 0xc23d45e3, 0x1fd2e673, 0x385fa7e6,
15696 0xa1bef3b5, 0x3ebb4a20, 0xbf934e39, 0x534435d1, 0x30f766ff, 0xa75bf7cd,
15697 0x5ef9ab5f, 0xc9a919ee, 0x5e3d5edf, 0xfd467f53, 0x7a1cad24, 0xa3d69a37,
15698 0x79bfa7e2, 0xa3e8a5bf, 0x12ec4277, 0xe23a9d35, 0xbf91133f, 0xe4672c3f,
15699 0x33787cbf, 0x1d31f8d3, 0xe7822423, 0xf93d5c80, 0xc8e5f731, 0xbf208fef,
15700 0xa1f44fc9, 0x7343f3c2, 0xa228c9a1, 0x7ee4627f, 0x725fa879, 0x5e503990,
15701 0xfdb1d4ce, 0xff8f5442, 0x9cf30e67, 0xe3bafec7, 0xf10f4b0d, 0x1f884378,
15702 0xff78a573, 0xbfcc0670, 0x4d79790f, 0x16c3f72e, 0xffaf36ee, 0xb58e0838,
15703 0xfc9ad16d, 0xebf1fda2, 0x3bd60e3f, 0xae1d044b, 0x93e146b3, 0x7da0165a,
15704 0xa0e8bb52, 0x40c4eafe, 0x583be62c, 0xf4b46c67, 0x0a8b838f, 0x258f800f,
15705 0xa9de2837, 0x193fc3fa, 0x9e0a453e, 0x1a70b4cb, 0x90e3cb93, 0x29108f5f,
15706 0xc7239cdd, 0xf103fee7, 0xf49eb41c, 0xdc7fbcdc, 0xc847227a, 0x9f9f0859,
15707 0xe3dfaf1b, 0x17940f1e, 0x7f0b908e, 0xfe4cb826, 0x47a5c247, 0xd82f47cf,
15708 0x72a3fa0d, 0xfdfb819d, 0xbf5c33de, 0xfefd7237, 0xf68fb47c, 0x44f39b87,
15709 0xed070ee7, 0xe93ed297, 0x618d7ba1, 0x59df1819, 0x797d23a1, 0x8190997a,
15710 0x2126c2fe, 0x0f36fc8c, 0xc81648ab, 0xc878b9be, 0xaa31fd48, 0x3afded07,
15711 0x0551f390, 0xe4096b3e, 0x71e5ccdf, 0x716e35b1, 0xf5038a4a, 0x1eac1ff6,
15712 0xe27a8b8a, 0xfd9e1e11, 0x696be130, 0x2bee45df, 0x6bd0127e, 0x8512d1e5,
15713 0xd5cc5f8f, 0x2e1f3ad1, 0x949db914, 0x1f70ba2a, 0xa9d81563, 0x96065768,
15714 0x915f28eb, 0x6d59e9c7, 0x9d0a1ff7, 0x14dd94c7, 0xda88f386, 0x7d7dba24,
15715 0x2e51fb8c, 0x793d0f8f, 0xb3ed1857, 0x68742a01, 0xd6bddbef, 0xaf582e69,
15716 0x8d96d0bd, 0xdcdadfb6, 0x4d6fea68, 0xcf159746, 0x748cfca1, 0xfe8eca78,
15717 0x8cfac0a0, 0xe655cd33, 0x580feeab, 0xe936fe94, 0x9da2bf41, 0x1e289822,
15718 0xf91af161, 0xb16715f9, 0x1ccade26, 0xa76e0b02, 0xf428f3d6, 0x1b42c76a,
15719 0xeff697e1, 0x5db178d5, 0x1ba417a1, 0xcf4abbc4, 0x8983fda1, 0xe9cc8dec,
15720 0x15d9f389, 0xe51a8e52, 0x8f748dd9, 0x1f90eafd, 0x07fe5cbc, 0xe3c4be6e,
15721 0xded7de2c, 0xe18879c3, 0x0c9c525f, 0x5fce4aec, 0xbee2434b, 0x024f913f,
15722 0x40cf0e66, 0xde1e5684, 0xdac9d0ab, 0x48de827f, 0x3ebc02ba, 0x8fe5cb9c,
15723 0x36fdc0ab, 0xb2c73bca, 0xfba230d4, 0x96270b1f, 0x51384560, 0x3872ba5e,
15724 0x1f3df379, 0xcc749e10, 0x7f71b46f, 0x72e1f90b, 0x31c2a47c, 0xbe9e6449,
15725 0x3c88f2f4, 0xca1bfbe5, 0x6ab7ae7e, 0x61d90fc8, 0x02c57728, 0xcc2cd2c6,
15726 0xffb6bc61, 0x8f9c0e7a, 0x396ae885, 0x96aee5d2, 0xcfe43094, 0xcabc6564,
15727 0x0ca7d29b, 0x205fa077, 0x040ed018, 0xe3c0c3bf, 0x574edc3f, 0xb94f7ae5,
15728 0x72c47ed6, 0x1f8f664f, 0xeaf7daa6, 0x82973c77, 0x59f3aae3, 0xfd61d8a5,
15729 0x125577cd, 0xdca2724b, 0x808f765a, 0x5ab1dcf0, 0x717df8d4, 0x0325615e,
15730 0x7fce3e3f, 0x8efd13af, 0xcdafb038, 0xf575cf28, 0x5e083382, 0x0a817b81,
15731 0xf8871338, 0xe24fe02b, 0x8967bd3a, 0x57c7425e, 0x85abb1d7, 0x5de71b8f,
15732 0x9f90c82c, 0xa02f5154, 0x9956b7df, 0xa3055c7f, 0x3e9969ef, 0x9e21e301,
15733 0xe38a5616, 0x03335655, 0x332af5c6, 0xf2865399, 0x7443c6ca, 0x02b9edde,
15734 0x206f2539, 0x4f3a4fc9, 0xa4f02ae3, 0x4d1d01e7, 0x7643284d, 0x864bb867,
15735 0x167f89f1, 0x4cb5a71d, 0x59efa2f0, 0x843ce2d4, 0x11d001fe, 0x2d3c7dc5,
15736 0xe75f1a01, 0x5d7271e5, 0x80e9c18b, 0x658d4875, 0x5521ffb4, 0xd4329c1b,
15737 0xdf29b63b, 0x2d95f18f, 0x0ddfdc8d, 0xd67493f5, 0xd1c3d7fa, 0x9910ab5f,
15738 0x790a0144, 0x5659fa2a, 0x30562e85, 0xf7ee3b77, 0x41fe1933, 0xdca548bb,
15739 0x2a6f3d5a, 0xd0e52266, 0x13dc8378, 0x6b9e409f, 0xd3b240dc, 0x678daa94,
15740 0xc92b2d48, 0x7d6233af, 0x890faca8, 0xa5d54877, 0xac971714, 0xf35bf2da,
15741 0x8e086222, 0x9e1e3c59, 0x8d88ef73, 0x727cc2b7, 0x1fe3797f, 0x41873d30,
15742 0xfe5b8033, 0x4c073bb2, 0xac16ff87, 0xa62378d8, 0xe8cebc4f, 0xe08fc19c,
15743 0xfa8c6657, 0xe8fafcf1, 0xb2abf295, 0xb9d00f26, 0xd27dafc2, 0x094f1abf,
15744 0xfe954fe5, 0x4d4ef943, 0x7f865ed7, 0x120526d7, 0xdf4f0f91, 0xdb03323b,
15745 0x73de3657, 0x5f88c7c8, 0x77d00705, 0x117177a5, 0x5660ba23, 0x5e5bd097,
15746 0x490b3784, 0x1f37bfec, 0x3b7c863f, 0x13e7effe, 0x95df087f, 0x63ce8c09,
15747 0xf649fd81, 0xdfaa9a9c, 0x3eb9f223, 0x246790bd, 0xc1464ebc, 0x053bac0a,
15748 0xc7bee0da, 0x2b4e6078, 0xf02e7fa4, 0x4de38b3c, 0xef9e3c81, 0x6b40fd7b,
15749 0x4b37ae0c, 0xa78ef5c7, 0x76e68edb, 0xa8ffb748, 0x06590fd8, 0xdced0536,
15750 0x771126c0, 0xc0e0596e, 0xe2d63be7, 0xc9b96bbe, 0xcaeb0699, 0xf448dfba,
15751 0xf68a0484, 0xa7689651, 0xb6aee5b8, 0x9f69cb8f, 0xd2c0d1b1, 0x0ee06e28,
15752 0x006473c3, 0x4caab0cf, 0xacc357b2, 0x857aaf68, 0x1e88aaa4, 0x22f5087b,
15753 0xef2cb40a, 0x30ac53ad, 0xb042aefe, 0xec7b3347, 0x59fed51c, 0xeb4c9f9c,
15754 0x6820ed57, 0x8fddb0c7, 0x0b4aa7e5, 0x19bb224b, 0xf7fb83e6, 0x90264cb6,
15755 0xff5213ed, 0xd92332f4, 0x7baf76af, 0x5bb470ca, 0xa0e6a797, 0x9ae30add,
15756 0xfd7f6e24, 0xbb67ca3b, 0x285ef94e, 0x49b9e0e6, 0x05801f75, 0x8718d174,
15757 0xfeaaed53, 0xe763a5e7, 0x9505b954, 0x9f2f9b7f, 0x59ff7ec1, 0x5563dd72,
15758 0x634d4de8, 0xe9e079f8, 0xcf8dbd0a, 0x9e9a5337, 0x73dbb3ff, 0xfe93aea7,
15759 0x39feeb79, 0x9ffae1d7, 0xffd88eb1, 0x3cd8f821, 0x3ac67ff9, 0x4ff2996e,
15760 0x5f37875c, 0x43cfc86e, 0xe746d679, 0x7e2eec88, 0xdee41c2e, 0xcb9cbc3d,
15761 0x09938b39, 0x74ffc764, 0xfd84d779, 0x1c1f419d, 0x7778a1cf, 0x67183a08,
15762 0x88a1a588, 0x8ca5cdec, 0x2c8681f6, 0x4340fbe5, 0x224d3a96, 0x6e1603da,
15763 0xec520e27, 0xb94b41ce, 0x9ca719dd, 0x118b882b, 0x3fd4327d, 0xca5bcbf6,
15764 0xbee0c6e7, 0xd5ec9190, 0xf5dd36e6, 0x5e53d416, 0x868fce89, 0xd2d289da,
15765 0x5f9c4a95, 0xf6aa9f6b, 0x79e31a68, 0xb4b3b2fd, 0xa3daa74f, 0xb4f29443,
15766 0x603f7ca5, 0x1ed68b48, 0xdad6ab8d, 0x1082fa8f, 0xbaa9733b, 0xeb49d07f,
15767 0xe9d72dd3, 0xa87ffcf1, 0xb07b89dd, 0xab0714a8, 0xfeb4067a, 0xf630d74d,
15768 0xf9f77e74, 0x1fdc1c8c, 0xd05ab99a, 0xcf5539e8, 0x7e282402, 0x43e3e2a4,
15769 0x3f8873d4, 0x5fb534f7, 0xaf3e6fd2, 0x2e4c7048, 0x539cd74f, 0x1e7eec62,
15770 0x3a73712f, 0x11eaf5fa, 0xddaed16b, 0x37c6eeb7, 0xfd697d31, 0x04e5e19d,
15771 0x6f54f5af, 0xebc6cb7f, 0x7650ff30, 0xe6123dbb, 0x53a8d0f5, 0xefd009ef,
15772 0x85e33c6a, 0x2978b3eb, 0x9e14b68f, 0x7ab3d08b, 0xa4dbdfda, 0x0d9f4c0f,
15773 0x45122be5, 0x23be911c, 0x1832981d, 0x59309f9d, 0x35f57e78, 0x30e3ee8c,
15774 0x1a9f5ce5, 0xd73d0987, 0xc7c3cab7, 0xc4f00559, 0x18963573, 0x39a91f7e,
15775 0x08e9fee1, 0x818766ef, 0x8b3939e1, 0x624fee72, 0xa82aaed5, 0xbf7edc77,
15776 0x0bee167d, 0x7e881867, 0x26ce98a4, 0x9ed993c4, 0x71c2af63, 0xcd35e242,
15777 0x2037e929, 0xfbb5bc59, 0x20679ef0, 0xc9cf7b7d, 0x2a9d312f, 0xf3c3efb5,
15778 0x88465225, 0xbf6bd29f, 0x9bdc1198, 0x4a5f3387, 0x6e3b9632, 0x754e9110,
15779 0x869a6feb, 0x50c154fe, 0x4f581ae7, 0x1bf30258, 0xbd611e60, 0x7b7989f6,
15780 0xce9c20a9, 0xf59648d5, 0xdfd80d15, 0x7fba08a8, 0xae03bec0, 0x4df3a7cb,
15781 0x80f657f4, 0x0e3a47a8, 0xc38ff653, 0x1fed7b32, 0x30c2fcd3, 0x3b59e14d,
15782 0x7a15c3e4, 0xca7b635f, 0x6b77fb87, 0x106e5213, 0x69f53d1d, 0xbbd6195f,
15783 0xab1bbbf2, 0x26fd5f68, 0x9fcf1593, 0xcafb2985, 0xa574e3a1, 0x43675b3a,
15784 0x6418b46a, 0x55f11673, 0xe0725f0f, 0xe68353d8, 0x9cfaf501, 0x736e3aa7,
15785 0xda83c71e, 0x64c2d19f, 0xf74323b4, 0x81fb43ad, 0x56be7079, 0x31fda9ea,
15786 0x01e746d6, 0x518b8874, 0xa7abb57d, 0xe9df0db9, 0xff1fbb24, 0xcc82e382,
15787 0x35fc431a, 0xcedb55ac, 0x0dcfca9c, 0x2a18f4a8, 0xfdd0a52f, 0x6f7ad4f7,
15788 0x9f81e138, 0x1fad0827, 0xf6d0d70a, 0x5833b7f0, 0xe160ddde, 0xa95d88fb,
15789 0xac22b99d, 0x473da57b, 0xbf5a7f33, 0xef7fd3d0, 0xbe6d3cfd, 0xb9f6364c,
15790 0x7d07943e, 0x4e8277cd, 0x6c596fbb, 0x8d2fb6d1, 0x25777ed1, 0x4592f368,
15791 0x6d91dfe9, 0x8e1af3a2, 0xf79e137c, 0x18d8f953, 0x8af7efe2, 0x2efa2adf,
15792 0x1e74c991, 0x79de9375, 0xe3c4e50e, 0x01d24033, 0xf82c3c7d, 0x552e58cc,
15793 0x0f515bb4, 0x93d3adc6, 0xaefc7a9c, 0xbde0ce5b, 0x6ba016a0, 0xf771e584,
15794 0xc56e9b47, 0xf148b17c, 0x70fb9b0d, 0xcb51d239, 0x37bf5f77, 0x3a9fcf1b,
15795 0x5bce740d, 0x75b1b73d, 0x1e2b61ac, 0x94cb8a0b, 0xfdf069cd, 0x84e62aa1,
15796 0x6323b099, 0xfc712363, 0x15a2d12d, 0xd1f3ddf5, 0x718efff5, 0x8c19e694,
15797 0xe14219f6, 0x46d23757, 0x756e3672, 0x5bf780b6, 0x5f9b1e1e, 0x06317289,
15798 0xaf9465fc, 0xc57dca90, 0xf015c717, 0xc5b6c0f8, 0xbe23c52f, 0xdb0f5837,
15799 0xa2159e69, 0x52d8a713, 0x8b7fe5c1, 0x7b3ed185, 0x3752a8f3, 0x72ec4d1e,
15800 0x8b3c0ec9, 0x41dee2d8, 0x2d595ef3, 0x9cacd972, 0xc8580197, 0xbe9c3951,
15801 0xfd4a360c, 0xb3346e98, 0x972839f8, 0x7ce8c292, 0x81f67f50, 0x57cb84b4,
15802 0xe9cc6f6c, 0x1143debf, 0x5cc8f18d, 0x9fe467cb, 0x6dfd0b9f, 0xf299b19d,
15803 0x538d3caa, 0xdfbbbbe8, 0x1bba3d10, 0x36724bf0, 0x9e2ce41a, 0x878e63c7,
15804 0xf575b789, 0x3a20b4c2, 0x7c8055d5, 0x2ee7e2cd, 0xbebb7e30, 0x87e334a8,
15805 0x9b9d4cfc, 0x5518e5cb, 0x97ebbb1e, 0xda05dc61, 0x635f51fb, 0x0fce783f,
15806 0xb7d71952, 0x443fa851, 0x830cf37e, 0xe839ef03, 0x430e402a, 0x56825d7b,
15807 0xc9181c4f, 0xc1fb35f1, 0xa09eccbb, 0x728c4d38, 0xbea3661e, 0xeb069cde,
15808 0x744338d9, 0x6c78076e, 0xfa1068a9, 0x55c4c78a, 0x0d997e70, 0xde6fd1f5,
15809 0x1b139152, 0x8c669ebc, 0x36d0c073, 0xdb9f0fd7, 0xbfc885d3, 0xbc79235d,
15810 0x1cdd67bd, 0x3f4071be, 0x479a87a8, 0x6ae6ae97, 0x557241da, 0x6d6de567,
15811 0x073a7aae, 0xcfc155d9, 0xf813ad5d, 0xc4a4827e, 0xf28b9bcb, 0x4bf4bf49,
15812 0x492b152f, 0x57e2849f, 0xe5fd3f9d, 0x9911e907, 0x8719f1f1, 0x4cceb49b,
15813 0xda07e1fa, 0x4af9743b, 0x1e0bd47d, 0x62ba7f6d, 0xf8e33651, 0xaf105fa8,
15814 0x7bc5e63a, 0x95fda193, 0x3a16fc2a, 0xe069c91f, 0x8d9db1ed, 0xdbf48bf8,
15815 0xc8e00169, 0xa1ce82e9, 0x3c38f7b3, 0x7c3a24b7, 0x2e01f86b, 0xae7487d2,
15816 0x78f7a52b, 0x658e098f, 0x7de8efb8, 0xe7f3a25d, 0xcd4f7aa1, 0xb13070ab,
15817 0x3e9ce736, 0x0f9c4dec, 0xa76935ea, 0x01fa89d7, 0xed8a97d0, 0x094b2a36,
15818 0x5cd4b3bb, 0xd7ade8e0, 0xab6d5cba, 0x937282af, 0x03f69983, 0x99534c3c,
15819 0x79c0307f, 0x1ccf33ed, 0x3df58abf, 0xf803ae0e, 0xe6bce099, 0xe63347f9,
15820 0xedf37b40, 0xb9b426ad, 0xf5a1cf43, 0x76a4ef6e, 0x4cab4b71, 0x23c519d3,
15821 0x86b95465, 0xafd90b08, 0xe48674cc, 0xc6c934b3, 0x3d10a7ed, 0x50f80eb9,
15822 0x644af08f, 0x38d0af04, 0x49f8e871, 0xdefcc905, 0x1a52e2e4, 0xa7454377,
15823 0x5d90e31e, 0x4ec57aae, 0xefa9f4f2, 0x7bb1fb42, 0xff23a73a, 0xc81a1577,
15824 0xc1f87e1e, 0xcf119349, 0xc51265de, 0x7bd17ad1, 0x233dbac8, 0x1cae9cf5,
15825 0x7f28cd8b, 0xdbb9ccb7, 0xfec3e8ec, 0x8b3152d8, 0x965a2fce, 0xa5633b70,
15826 0x88e481bd, 0xe7b942a5, 0x71cbd8a2, 0xa213bfaa, 0x3754b727, 0x9bdef198,
15827 0x8590de7a, 0xed97dbd8, 0xbbbd1fbf, 0xf18bf961, 0x2aee4fa8, 0x79c78869,
15828 0x4ff0896f, 0xd5df1377, 0xf2029f93, 0xf1e51e38, 0x920e91a2, 0x7ff2dd2f,
15829 0x0e3b39c6, 0x5569181e, 0x43db8af8, 0x417fe25f, 0x928d66bf, 0x1c6014a7,
15830 0x8e44b52d, 0x74bc6076, 0x00d3bbdf, 0x7abd93ae, 0xfb8d63f2, 0x2fc1f481,
15831 0x49382632, 0x681e9e5f, 0xac9d22b0, 0x8f46fc6a, 0xe2ce6bf7, 0x7fe855e9,
15832 0x87b70255, 0x9818c556, 0xa1f342df, 0x2e754f45, 0xf5a7a866, 0x0137dc09,
15833 0x798fc5bf, 0xfd102316, 0xbaf18e4c, 0x298700ad, 0x30bbbe31, 0xd7ac4aad,
15834 0x129c60d9, 0xf080b447, 0xc563a29d, 0x9daf1e06, 0x115cf385, 0x59c511f3,
15835 0xd1c5a727, 0xc5a3547d, 0xc9fbc3ad, 0xf6d5677a, 0x8bce8cb5, 0xb015bc51,
15836 0x8ce1f74a, 0xb6bdc718, 0xeeab8e27, 0xdcf1a913, 0x04290575, 0xffc1212f,
15837 0xcb23e22d, 0x1ef1101a, 0x403e987e, 0x46aaf8f6, 0xcd41f913, 0x91da3b09,
15838 0xf823323d, 0x3e7aa43e, 0xb163e017, 0x0c567c02, 0x95d69bbc, 0x17bb1494,
15839 0x91faa5e7, 0x50af20f1, 0xcc2565de, 0x4beb8a9b, 0x4aedc37a, 0x0cc67a86,
15840 0x1660365d, 0xa2b9eae0, 0xc61eac78, 0xd8583c21, 0xabfb4c38, 0x40d122bf,
15841 0xf2d0d8f1, 0x5c780b27, 0x21050b32, 0x135eebae, 0x755dcfdd, 0xaaf7bee0,
15842 0x301e7e50, 0x6767c939, 0xffbc1481, 0x66771dde, 0xaeddff7c, 0xdbb5bf9c,
15843 0xa63f740d, 0xf8ccbe3b, 0xe71abcbe, 0xd9e51a88, 0x31f2788c, 0xc7f421c7,
15844 0x8f71abfe, 0x4fca461b, 0x6dac7f60, 0x63c515c0, 0x68eac6c2, 0x8529279f,
15845 0x05f78279, 0x5feb2956, 0x7a870dd5, 0x75f5ea3b, 0xf6079428, 0x378d870f,
15846 0x2226bbe7, 0x88ec46dd, 0x47dafd47, 0x171343bc, 0x79287bc1, 0xfa6204b1,
15847 0x9c79aa93, 0x3cea6624, 0x5348778a, 0x0ad93ef9, 0xdcfc6016, 0x7c84c0a0,
15848 0xfd4beaba, 0xe887700d, 0x927accd7, 0x90ae9193, 0x7f2f48b8, 0x6576e645,
15849 0xa2dbdc88, 0x02f1f9f0, 0xcf91ee25, 0x93e7bff2, 0x5228bb25, 0x1889f7d9,
15850 0xe8724295, 0xd90a5711, 0x411cc443, 0x9d9cbef0, 0x87b15073, 0x8f9ca77e,
15851 0x83e72bf7, 0x83e72b0f, 0x0b77c55f, 0x863f90c0, 0x7a4016ef, 0xe549c9bc,
15852 0x2815346f, 0x6fe399ca, 0x4892ee45, 0xf9941fb2, 0xadf994e9, 0x25734eb0,
15853 0x6d567e03, 0x5879d3d3, 0xe984c263, 0xaf32cf68, 0xdb119edc, 0x7587ef73,
15854 0x9efcbfc2, 0x095da773, 0x3a4f3a1e, 0x3ff7cac7, 0x542d7c55, 0xb612afea,
15855 0xc75f9019, 0x36e16a76, 0xc6a452fe, 0xda622cae, 0x4d1397f3, 0x4bf53443,
15856 0x97f3daac, 0x6ad7ec93, 0x68764fbe, 0x975e5fcf, 0x1f643e31, 0x0b574b56,
15857 0x806e8013, 0x7d33aa4e, 0xd685ff34, 0xcd7b8a52, 0x74c7b90d, 0x3f36ab47,
15858 0x2fcda7df, 0xabcdaddc, 0x46c3c9e7, 0x9230f429, 0xf131fc8d, 0x0cf7e44e,
15859 0x0107ef85, 0x3ab36fbf, 0xcfda1199, 0xf8bf7816, 0x1b00c61e, 0x76c94bed,
15860 0xe3ac238c, 0x5cb09ff7, 0xc3bdcbc7, 0xbe7af695, 0xdb8ec56f, 0x4b1dbee8,
15861 0x06ede1cc, 0xfc7eeff0, 0x72f1a48e, 0xfe87af0e, 0xa21bd612, 0xe5c353f4,
15862 0xfe459c93, 0x33ec9b82, 0x62b36b23, 0xc2fe016a, 0xe9399a34, 0xab0c759e,
15863 0x9075bf27, 0x51327f72, 0x43bca4e8, 0x3e6186b0, 0xf0a67045, 0xe48f85f8,
15864 0xfe4950c3, 0x89f12a75, 0xf447745b, 0xb90d97e6, 0xaaf007ba, 0x910286f8,
15865 0x5623e2e4, 0xd8f9ef46, 0xbf13f75c, 0xb016c36e, 0x8f6b336e, 0xf87a1549,
15866 0x61bcede7, 0x5c135fc4, 0xb52fda0e, 0x780b2415, 0x8588a52e, 0x4536cb9c,
15867 0xc4a3e869, 0x5f42171a, 0x4be84243, 0x9d7f7f4b, 0x3945d5ec, 0xe842ce90,
15868 0xe5be2ff0, 0xaf182c51, 0x05fa8f4c, 0x7689d58f, 0xca9e054a, 0x754f9602,
15869 0xee319b46, 0x73d18b67, 0x3fd8a579, 0xab9f4aa5, 0xb2eb59e4, 0x566bfbe1,
15870 0xf6e649d1, 0xf13d2dba, 0x96df1825, 0xea35f600, 0x5c919963, 0x1fd3b07d,
15871 0x7fd43576, 0x65fffc04, 0xeb1bfd0c, 0x65efbc64, 0x5f10e4b5, 0x7949623f,
15872 0xd05ef300, 0x437f58e8, 0xe5aff731, 0xef826ce8, 0x05bea151, 0xc23da5ef,
15873 0xc1a94cf2, 0xfebc2df5, 0x5164597a, 0x31189f90, 0x9dbfea82, 0xcef86667,
15874 0xd9a07781, 0x63ec7187, 0xdd77acf2, 0x7b7feb41, 0xaf07d714, 0xa8f11c19,
15875 0x7c991e0f, 0xd287a677, 0x685f8d74, 0xbee4104b, 0x8f8517ce, 0x92bd7236,
15876 0x78c7e25b, 0x34c2747c, 0xfd039957, 0xe90bb71d, 0xf112e742, 0xfd375be8,
15877 0xa87e2b44, 0x0fc106e4, 0x5d749b4b, 0xe3ff430e, 0x35770b11, 0xd59e291e,
15878 0x02f98652, 0xd903ee91, 0xd9ebe25c, 0x7e02aeb8, 0xe54af0fe, 0x181ea871,
15879 0xbfdb9a32, 0x3c448693, 0xdffa1430, 0xb15a2450, 0x2b7a0dff, 0x4ef1e7dd,
15880 0x1757e466, 0xe097eabb, 0x11096dbc, 0xda6fcf0c, 0xbe781a0a, 0x00ccc0d8,
15881 0xbd6b934f, 0x4a69f117, 0xf6c08cf5, 0x7a7e0747, 0x5b19ed1c, 0x703a4882,
15882 0xaef9cba2, 0x2817eb1b, 0x79e29df1, 0x9b3c70eb, 0x599ab445, 0xb9541c0f,
15883 0xcbc99ebe, 0x0ab2ffc9, 0x0accdef4, 0xce0d436b, 0x708491e7, 0xae6df3b2,
15884 0x79e20b06, 0xd13d40c3, 0x7f224941, 0xc2556a57, 0xffcc0ab4, 0x7191a062,
15885 0x1f2ff3be, 0x5381fe8a, 0x5b3575a0, 0xc75e681a, 0xc139892e, 0xa9a896ef,
15886 0xcf85a1d9, 0xf8f146ef, 0xf1e30990, 0xf5b79f80, 0x8b9a9ccc, 0x78a7a3f4,
15887 0x6b7c7f53, 0x7ece5d73, 0x2afe61fb, 0x110b0394, 0xc29785be, 0xfa404f98,
15888 0xfe61293d, 0x5b017f77, 0x60d9d680, 0x6e41fec1, 0xbfa2fabb, 0x7e9cd188,
15889 0x4b0e0b9b, 0xd7824ef8, 0x341f1021, 0x444e4e5b, 0xb528783e, 0xa1e8e88c,
15890 0x899a8f82, 0xfcf3862f, 0xeef779db, 0x137a3c41, 0xe77f69c3, 0x315982a1,
15891 0x60bef4c1, 0x32f44894, 0x4e616fee, 0x9463e23f, 0x91fbf881, 0x8c56c708,
15892 0xccf3794f, 0x824bbf64, 0x986cd975, 0x2862c4e7, 0x5da2fe87, 0x7ef13e62,
15893 0x0b8f0575, 0xd57e302b, 0xf8843b65, 0x31664a90, 0x3949ae7e, 0xef9114f7,
15894 0xb435435c, 0x25956ffa, 0xd8cfde97, 0x4270d092, 0xbb20b6d9, 0x5722906a,
15895 0x45889406, 0x5906df28, 0xeb655db8, 0xbb940594, 0xaa47fba1, 0xed29d7be,
15896 0xa65b328c, 0x371b54a3, 0x7d7015d2, 0xe97f6a1b, 0xc35edc2c, 0xae8fbc3f,
15897 0x893f35cf, 0x317438e7, 0x197f7ada, 0x0a739ca5, 0x3a54afb1, 0x7ae560df,
15898 0xd1ae4362, 0xa1bd7487, 0x2a59db98, 0x47f2ab1f, 0x872abf85, 0xef7e7bd4,
15899 0x5195f628, 0x87365e4e, 0xe599eae4, 0xd4076f78, 0xc317739e, 0xfa56897b,
15900 0x1f72aefe, 0x6f6294f1, 0x5bd8a7bd, 0x5bd8a1ff, 0x05bda3ef, 0x835186f9,
15901 0x1437bf08, 0x08dd762e, 0x20901af3, 0x3a14df11, 0xedc44c4e, 0x271971af,
15902 0x61d97d2c, 0x0ea2d111, 0x348f05e3, 0x36497bf2, 0x1598ed97, 0x95cf59f1,
15903 0x766b2cf9, 0xbcbb3469, 0x7ae3f27c, 0xe43ed1d2, 0xb9557beb, 0x994c794f,
15904 0xfe6571ff, 0x57f3286f, 0x43498fed, 0xbca132be, 0xefaf10df, 0xfc297e47,
15905 0xb9d0a729, 0xb57950a8, 0xe908c401, 0xfc9122eb, 0xe778209f, 0x25bde46a,
15906 0x4ef5f720, 0x1e68c959, 0x7660dbbf, 0x7c462c57, 0xa714664e, 0x27aae89d,
15907 0xb90365b9, 0xf8b37245, 0xca6ceb5c, 0xe5833847, 0x6381519e, 0x8e5acbb1,
15908 0x4638be72, 0x24571f4f, 0x5bbdd0a4, 0x1d0efed5, 0x0cf072f7, 0x82a66795,
15909 0xf3e25ef5, 0x6c7247ff, 0x8ee3e32c, 0xfd3a24bd, 0x4f1cde5c, 0x91237926,
15910 0x5fed0a7c, 0x636f3795, 0xbe2064cc, 0xfba1644f, 0x610a7700, 0x9de7844e,
15911 0x3f307c28, 0xff7dd197, 0x673d8ac1, 0x01d1de57, 0xceb8a14e, 0xf5b04ed8,
15912 0xfc7af883, 0x1bf75325, 0x8f8edc6c, 0x9a27e4d6, 0x4bf535e2, 0xef9ac9ac,
15913 0x35c3ec93, 0xb23b27df, 0x32ebf935, 0xffea6946, 0xc9a459c2, 0x593050df,
15914 0x2e4cbf53, 0x6665e4d3, 0x0e4877a5, 0xfa1eed36, 0xa7fd1eb1, 0xa71fa1b6,
15915 0xa14f86f5, 0x0e0bf0f1, 0xa3b5e160, 0x00e8678b, 0x87518546, 0xfc864cef,
15916 0x6793d1c6, 0x0aef80e8, 0x3afe1f07, 0xd3685819, 0x7f3c29e8, 0x53afe1f5,
15917 0xf465bf20, 0x863f3c75, 0x3adcf091, 0x2f0cea7a, 0xea1c59e0, 0xd0347479,
15918 0xea972df1, 0xf83da28f, 0xe6d365c7, 0x4ef84b26, 0x06625940, 0x8a6ce7cc,
15919 0x7efc61e7, 0x15acec73, 0xfc761178, 0x8f74f577, 0x79a337ed, 0xfc8b8ebb,
15920 0x8b8e8d5d, 0xbb0d1dfc, 0x53f6f1c8, 0xcbbef553, 0x7e9a0e04, 0x64115fdf,
15921 0xfd05af7e, 0xdc6939cd, 0xfd14c4df, 0xdfd14c4d, 0xcdfd14c4, 0x6fee7a39,
15922 0x26fe8a62, 0x89bfa396, 0x324d5be9, 0xb934efa5, 0x726f6d28, 0xbf7dda53,
15923 0x6ae729e0, 0xef380a3d, 0x985b8b4f, 0x1117e4c3, 0x4ae7a14e, 0x4f9df43a,
15924 0x45ca7ed0, 0x12fbc0e6, 0x394e2287, 0x39acbf70, 0x2e7444cf, 0x4c3bb674,
15925 0x9730bdf0, 0xb62f9be7, 0x617e503b, 0x8e9eed1e, 0x946cb6e8, 0x16b5cdbf,
15926 0x35bbee27, 0x23c7f45f, 0x1bd6149f, 0x714cdee8, 0xe9c52767, 0xbdfc2d0a,
15927 0xc7114384, 0x91e3288e, 0x9179da5c, 0x277c45f9, 0xb0eedcc7, 0x3f60e32a,
15928 0xea326e30, 0x3025c2b7, 0xbf5bf52e, 0xb0a9fa98, 0x842b8f74, 0xe1fa6b8c,
15929 0x410a2771, 0x3176a6e3, 0xc701177a, 0xf5c66875, 0xfc3f744b, 0x78c25fa2,
15930 0xd3b44761, 0x354d718e, 0x21df8c5f, 0xdfcf45bf, 0xf8742c5f, 0xb893d425,
15931 0x5bef89bd, 0x33d881c6, 0x1f0d79d3, 0x47a865c9, 0x5d9db971, 0x9a179d7c,
15932 0x9f900bfc, 0x6077958a, 0x7ba58cc0, 0x730c4c9b, 0x9128bea2, 0x38363bbe,
15933 0xe339df17, 0x1b15a0ef, 0x1f90dbdd, 0xde5c74eb, 0xdf3318b0, 0xcfb5d057,
15934 0x3bd415ff, 0xec983b19, 0x4bfb0495, 0xb404752c, 0x44cae45f, 0x5b24e3bb,
15935 0x7568724f, 0x8f7fe794, 0x31be7a06, 0xf4505eb3, 0x7763f527, 0xfdc0ef85,
15936 0x86578e88, 0x4d1f21e5, 0x645e3a33, 0x1f7fbfc0, 0x3cfc44dd, 0x8791ca2d,
15937 0x7dfdac2f, 0x8f9e0af4, 0x3788bc73, 0x69acad83, 0x8ffc7146, 0xf1452f3f,
15938 0xa79a740d, 0x7fb43a0a, 0x765373d4, 0x063613d1, 0xfaeb54e0, 0xd7e7c0ca,
15939 0x7078c069, 0xc10718d4, 0x4661e06f, 0x273a98e7, 0xe076f847, 0xfa80df7e,
15940 0xb2878c6c, 0xd61e474c, 0xd277d24b, 0xef8ef27d, 0xa827fdf8, 0x50537919,
15941 0x8389fefc, 0xf8afab92, 0xdc31c9e3, 0x6a945d4e, 0xa8788759, 0x944c9bb3,
15942 0xe748bc1e, 0x9dce9982, 0xd96bf18a, 0xa97bf7d0, 0xfae18eaf, 0x41a57921,
15943 0x74410231, 0x30e594c2, 0x0cbde6a6, 0xbbf6d0f4, 0x8bdfbac3, 0x43327003,
15944 0xdef3c89a, 0xeb178f1d, 0xac65f534, 0xe31dfddf, 0xbda7acf4, 0x8fcddbfc,
15945 0xc6554f2f, 0xc7997a43, 0xd50c7fc8, 0x6d0b6b3b, 0x843f3bea, 0xcc63c7e7,
15946 0x523de9db, 0x14877949, 0x4e315aea, 0x3de8ce11, 0x37bfc1ae, 0x9e819afb,
15947 0x3d399a76, 0xdd3c8aa7, 0xeafaf229, 0xbbeaa53b, 0x7a14cf6b, 0xa3cc2b6e,
15948 0x8fd4fc7e, 0xdf1b37b4, 0x6d6788cb, 0x6efabe34, 0x012f5a94, 0x2b0920f4,
15949 0xe23a675d, 0xfb1250ab, 0x63e7e784, 0x1d20e68a, 0xb2f2685c, 0xcdf4824f,
15950 0xc6c8f085, 0x49d5fc60, 0x3f5af7da, 0xda81331f, 0x1b6beda9, 0x284fb227,
15951 0x3a27e978, 0x69154daa, 0x624ebd1f, 0x9c3be2af, 0xa80d5920, 0xa776d597,
15952 0x78e2de40, 0xc5fc82ef, 0xbb903df4, 0x3ed1e89f, 0xfbe94e9d, 0x3f2a1e4d,
15953 0x694d54dd, 0xca9ea9a0, 0xa46a6a3f, 0x23db96f4, 0x167f9172, 0x3ec65fed,
15954 0xdaf7a209, 0x1027bd36, 0xd4553f94, 0x51ad1d37, 0x7254e8e8, 0x1c9fdfdf,
15955 0x53bbedc3, 0x3b3e38e3, 0xf7c0dec0, 0x972e80da, 0xdbfd6d5b, 0xfdca1d1d,
15956 0xf9e3a3ae, 0x3c4765fe, 0xc31f2fcf, 0x64596efd, 0xe8fed8ad, 0x3fef0378,
15957 0xefc6ac45, 0x7bf78db2, 0x77a45d2a, 0xb1357ea4, 0x5831fee8, 0x73ca163f,
15958 0xaea7f27a, 0x41e5dfe2, 0xaf9d5cbc, 0x42b6fdfa, 0x61eefaab, 0x8fcf7f3a,
15959 0x7a02f7df, 0xfad5fea7, 0x3e702663, 0x4befad0c, 0x43c9e7e5, 0xc2a9f1e1,
15960 0x6817c4b7, 0x241f2367, 0x9d45f107, 0xa542f883, 0xd6fe9543, 0xa7387216,
15961 0x0f3a151a, 0x07eee7e7, 0x76842ea3, 0xb4cce383, 0xbbe3208f, 0x9d9eb0cb,
15962 0xa12fc282, 0x63bca0fc, 0xca83f2ac, 0x0fbd2a07, 0xefe33e06, 0x8c75f334,
15963 0x5f79fa95, 0x7b475958, 0x845dc46c, 0x2b7a83d7, 0x12b1adea, 0xb0792f7f,
15964 0xedcef5d8, 0x11b19fc8, 0x96918c0e, 0xf7d4b2ac, 0xfe3ec725, 0x9543c2af,
15965 0xa3c0fd0b, 0xca0c1c17, 0x123fc3bb, 0x50e7240e, 0xf6fd238e, 0x8c4eb721,
15966 0x177629b1, 0xc7cfdfa7, 0x1d226fc8, 0x1d660875, 0x30e87bde, 0xf05f7df7,
15967 0x0ebe78e8, 0x16d68e95, 0xe3074a32, 0x96f6873a, 0xba7aea7b, 0x230779d7,
15968 0xc61a97f9, 0xacf143cb, 0xfe482bae, 0xa979c19d, 0xec0c64f0, 0xa127e81f,
15969 0xe8ef42c6, 0xe0e856dd, 0xd3f036fc, 0x67ac0dca, 0x3e8a35fd, 0xf8944c7b,
15970 0x7e8ac87b, 0xa4172ee9, 0x1a996599, 0xcf4743bd, 0xefe15f3a, 0x5645fb8a,
15971 0xa372ef8d, 0x171c1d6f, 0xe5c8521f, 0x3cf4d743, 0x2f13f711, 0xf742d5fc,
15972 0xea0c2f8b, 0xcef68d3c, 0x533d5685, 0x2a9b23de, 0x8b9dde80, 0xf90c133e,
15973 0xf39ef2a5, 0x0ef7e8e7, 0x176d7a83, 0xb5bda34f, 0x4cc4ab68, 0xeb609e78,
15974 0x3d20b737, 0x4f457bcd, 0x5b9a99e7, 0x7a471e37, 0xc04fb73c, 0x85d96fe7,
15975 0x31c5027d, 0x7c225b6b, 0x0a5fa866, 0xc77fac79, 0xe3c7c96e, 0x39c5328b,
15976 0x3ef1946a, 0xa0a5d731, 0xeb713e5d, 0xfb843a5d, 0x8b02edbc, 0xb48f7e83,
15977 0xdf0c79de, 0x8db7391d, 0x366b2fdf, 0xf9c0ee47, 0x0ceb4a97, 0xc17ca083,
15978 0x635e5e76, 0xf70cfd29, 0xcd3c1743, 0x60b3fe28, 0x8ff9046f, 0x1ff45af3,
15979 0x8eec8205, 0xfcda6dea, 0x4066d67c, 0x53b0583a, 0x07b35e5b, 0x79f241f2,
15980 0x2f12a150, 0x29b2ce19, 0xe3c2d25e, 0xef7caa07, 0xb97b5f6d, 0xde506d1c,
15981 0x897f66ff, 0x5f0ff7a5, 0x23e926f9, 0x2997cf0b, 0xff9033f9, 0x178e1bea,
15982 0xca752e15, 0xb3c55fd8, 0x675836dc, 0x2b662bdd, 0x0775edfa, 0x79e246ce,
15983 0x016145b0, 0xbd99177a, 0xded1592c, 0xe4bf607b, 0x1ed6f845, 0xfb893f34,
15984 0x9e2f7598, 0xa13c6030, 0xb262df74, 0xef312657, 0xfd9bf44a, 0x89dac8a2,
15985 0x7de9da8e, 0xce77265f, 0x1c2e7ec3, 0x0ed15b30, 0x4ff97ba8, 0xfcc76ec7,
15986 0xa7dd028b, 0x201890bc, 0x55b7993a, 0x0c437ba2, 0x1efcb42d, 0xaf10913a,
15987 0x28b6e788, 0x0ee58f7a, 0x19e23bc4, 0x4648eef0, 0xd071e13a, 0xf44b4f79,
15988 0xd9b5b9bd, 0xf9cff580, 0xbc557e38, 0x094b4a97, 0xe71e0bcf, 0x75b89cf8,
15989 0xa430e6d7, 0x64f5a783, 0x76811f8f, 0x0d3b7883, 0xe15e181d, 0xc5d85ffd,
15990 0xd37791cf, 0x376301c1, 0x2f3ce01d, 0xa7c00747, 0x472ff7a4, 0x97e89d07,
15991 0xddffbf92, 0x0ed0c7b9, 0x87e7e08f, 0xd51b77d5, 0x2e071a77, 0xdf14753c,
15992 0xbfb34ae7, 0xa5777640, 0xc5da8bed, 0x9d09de8c, 0x4be78853, 0x02bdbf26,
15993 0xca7277d1, 0x2f14d9b3, 0x6d7607d5, 0x744378c1, 0x3ac7c538, 0xe1b6cb92,
15994 0xb6c598fb, 0xc2f6936f, 0xcefd163a, 0xeb11e748, 0x3fc67e15, 0xbea2073c,
15995 0xa7780c4b, 0x07b519f3, 0xc65cfc8d, 0xe1fbed3e, 0xce9cf11d, 0x959d0c4b,
15996 0x804fd18b, 0x411c70fe, 0xc2e9fee6, 0x451dfc83, 0xa85c9fd5, 0x47b8a7be,
15997 0x60836efb, 0x3dea9b7d, 0x70429850, 0xd6371a18, 0x73797681, 0x0d84f339,
15998 0xc17d21fd, 0x5c7ca9df, 0xb5fa8bf1, 0x1bd1fb27, 0xbcc91daa, 0x15daf721,
15999 0x014775b9, 0xbbd1e39f, 0x7be1d0df, 0xf93b1d8c, 0x3fcc3bef, 0x062af208,
16000 0x1af519f7, 0xd4a753b9, 0x0fe914ff, 0x5bde76e0, 0x052892ff, 0x8bf797cb,
16001 0xa79a9fb1, 0x48753f79, 0xf5571457, 0xfe830e6f, 0x33d36cbe, 0x4c0597e4,
16002 0x23fb3791, 0x4bd46e28, 0xbedcecbe, 0x50f7cd12, 0x76085aba, 0x94222e26,
16003 0x69f6eabe, 0xa85d3deb, 0x670e7bec, 0xfff9e0d7, 0x90e031af, 0xba5f23d7,
16004 0x8e67e9df, 0x6eefe428, 0xef68287d, 0x056b0fef, 0x77ea0f96, 0x63c4cfb8,
16005 0xeafe4aa4, 0xfe4d56dd, 0xa6bb369a, 0x1dfbb5fe, 0xfed9ef9a, 0x11f7cd0c,
16006 0x7c9a9dc7, 0xa6817b5e, 0x64f7c8fe, 0xc0547e4d, 0xe63fa9a5, 0xef935bbc,
16007 0xf4f584ca, 0xe9a8cf61, 0xa9a0bb24, 0xd661d93f, 0x465d7ff4, 0x65df26b4,
16008 0xd8a3e051, 0xfbfdaa99, 0xff6e42a7, 0x7c2aa686, 0x8ed4e17f, 0x37edfaa3,
16009 0x2bc76814, 0x5de3b593, 0x1df05e29, 0xff9e9d41, 0xf8a6027e, 0x34ba09fb,
16010 0x9809fbfe, 0xc04fdfc7, 0x013f7f14, 0xe4dd7fcb, 0xa6befca4, 0x04bfca02,
16011 0xf7e6097e, 0xe9829f83, 0x609fe0cb, 0x77e0e5f9, 0xb8f7194c, 0xca1bee32,
16012 0x4e153fb8, 0xbdfd296f, 0xef87f4a3, 0x3df4ea0d, 0x795d6bdf, 0xe3e025e2,
16013 0x7467db22, 0x086e595f, 0xa31c6294, 0xe18975f3, 0xf1e667f9, 0x418a6f1d,
16014 0xa18036fd, 0x9ddcc49d, 0x6e3ee26f, 0xad438bdd, 0x81efae78, 0x07787ffd,
16015 0x27d85fbf, 0xf0e6bc51, 0xd891b3fe, 0xc29797cf, 0xe90a30e9, 0x7cd7c845,
16016 0x0d7e502b, 0x6773c77c, 0xca4af793, 0xa46d67bb, 0x554cbeef, 0x2fba3ef3,
16017 0xd7b3deed, 0xb85a7880, 0x7f7d2f7b, 0xf35af81d, 0xcd76f77d, 0x87d62b77,
16018 0x47cea174, 0xf7cf8571, 0xa9f9fdab, 0x7f2a4d7e, 0xddf3fe3f, 0x418e5647,
16019 0x6ab7bc7d, 0x17b5c600, 0x3b1139ee, 0xf1f007fb, 0x66cf4bd5, 0x3da81ea2,
16020 0xd1e72920, 0x07b57f78, 0xcf9e4af4, 0x6f7526bf, 0x63379e29, 0xb3ba047b,
16021 0x4f5b25f4, 0xee16c4e7, 0x728355df, 0xedc66176, 0xb57f8a7a, 0x83bc4a49,
16022 0x6350d3bf, 0x6baedc65, 0xdf123afb, 0xdb7dffa9, 0x1ef1ebd1, 0x23c1c774,
16023 0xc74c5ef4, 0x4fe3493e, 0xf1cb1d8d, 0xf72c763b, 0x77dcbeff, 0x09cf1224,
16024 0x8476d03e, 0xa7e75dc3, 0xf2561ff5, 0xbc12901d, 0xfeb44bf7, 0xcd2497f9,
16025 0xc0b801ef, 0xcdfba171, 0x7022d3fb, 0xf8db275d, 0x7d40d378, 0xd56a7950,
16026 0x1bff9c1c, 0xe53cf2f6, 0xddfa327d, 0xaeab8ea1, 0x767285db, 0xe7d49b61,
16027 0xd839f779, 0x98efcc2f, 0xebe9d39e, 0x1b1c2fa9, 0xc37f7004, 0x749b2035,
16028 0x62af5284, 0xa59bd72c, 0xea2a4f06, 0x47169391, 0xfdf9d204, 0x8811a1ae,
16029 0x6298c3df, 0xba49ebb9, 0x1f60be07, 0xb5a4ef1f, 0xeee9123d, 0x5211bee4,
16030 0x2dcbfef0, 0xe9ba7aca, 0x5e6f1bbb, 0x6fb553c2, 0xe9fb05bb, 0x9f2f1fc1,
16031 0xf54ad636, 0xb89df0df, 0x93aced05, 0xc0ddfc19, 0xfe460663, 0xdc3dc2f5,
16032 0x70793e4e, 0xfbe0f6f0, 0x7c14d359, 0x7df06474, 0xf5fb0bf5, 0x77dbbd4a,
16033 0x3d3d4d31, 0xed4ed7c7, 0x33beac7c, 0x5e7da10f, 0x6744b8f3, 0xf5f46a1d,
16034 0x4ffeb8b1, 0x57e769b7, 0x46b9c0ad, 0x0d8d8fef, 0x039ad7a2, 0x21637cdd,
16035 0xf2a03f3a, 0xa9f08389, 0x8664f1e2, 0xe765e7c4, 0xecd5f8ef, 0xdd7445dd,
16036 0xe3c4be3b, 0x31ef83b7, 0x74be2939, 0xb55a7f19, 0x2dfc821b, 0xbd23bdfa,
16037 0x989e686b, 0x9c1f63d2, 0x1a1f942e, 0x987e879b, 0x93ccfc9b, 0x185bec0c,
16038 0xebed16b3, 0x891dfa28, 0xd76e38cd, 0xffbd3d3e, 0xb03a6b5f, 0xef23df00,
16039 0xc0a30272, 0xe9b6bbbc, 0x4667dfbb, 0x629e773b, 0xf0ea7ee7, 0x7fa04be4,
16040 0xb489976b, 0x923d9abe, 0x5c17cf0f, 0x57dee450, 0x406f937b, 0x2e39ad7a,
16041 0x9a3fd159, 0x70fc96d8, 0x77e92e61, 0xdaeb57b2, 0xb75c9db8, 0x58bb205b,
16042 0x156a43b5, 0x629ce43b, 0xd65b9f07, 0x57e3edc9, 0xea11b604, 0x7b030dad,
16043 0x9b5de604, 0xdaec8539, 0xcadd695a, 0x473c0ec1, 0xe61bb5a5, 0xe7443c1f,
16044 0xd1cec0ae, 0xaddc2f94, 0x69b6d7cd, 0xf8bfaaf3, 0x3b6ed8d2, 0x37fa3863,
16045 0x1c615225, 0x0a9bc3f2, 0xe77f555e, 0xf49c6bce, 0xe80f27fb, 0xb8d4531c,
16046 0xd16bc204, 0xc7cc2f2b, 0xc26afb79, 0x347fe49c, 0xdae096fe, 0xd7ee17f1,
16047 0x1bdee074, 0xf0e333f2, 0xe9cfd8ed, 0xf05e917c, 0x2cbaefe1, 0xfd815d42,
16048 0x32df0499, 0xbb7b3b8c, 0x293e4922, 0xca1a08e7, 0x632affb9, 0xb2a6180c,
16049 0xe7f72c7e, 0x38eaf543, 0x0e8a405d, 0xb1811392, 0xd8af5429, 0xde57cfc0,
16050 0xfd24e119, 0xedc4c436, 0x6e2621f5, 0x75d10faf, 0x85dfa32e, 0x7df02418,
16051 0x6997ac8e, 0x9d6d60ff, 0x0417f685, 0xe10e957b, 0x955076b1, 0x887de90e,
16052 0xfd032db5, 0x8c5f353a, 0xec7b33df, 0x478b5283, 0x8cece387, 0x047d9417,
16053 0x74cb4fae, 0x90747d56, 0x996c657e, 0x3dea7e66, 0x7e7d9fcc, 0xa59f9856,
16054 0xef807e67, 0x75ff6c28, 0x86ec93ae, 0xf7f532a4, 0x2e49ea1a, 0x12fcf0a8,
16055 0x7018bde8, 0x816c7745, 0x1db66a6e, 0x96b2ff22, 0x76c4afb5, 0x1d7c91a5,
16056 0xbefe06a5, 0x4f186951, 0xfcb8e375, 0xa5d2512a, 0xc3f6b4e3, 0x7eb27191,
16057 0xc63ba41c, 0xf2e34db9, 0x79953f68, 0x6f0d7d61, 0x43d677f3, 0x13943ee5,
16058 0x7c0d7d3d, 0x466ff288, 0xd54d60bd, 0xbf9c69d8, 0x6ea2f116, 0xf6f85a3e,
16059 0xea27c493, 0xc66acc39, 0xa3667bf9, 0xc41a9ad9, 0xdf908b17, 0xc377ded0,
16060 0x138c7cbf, 0xeb6abff0, 0xe9973a7c, 0xa2b58c69, 0xfa48b75f, 0x7e25f692,
16061 0xda2ddf2c, 0xcdfbcdaf, 0x11fdfe9c, 0x1949f902, 0x0de3bae3, 0x0a498fc4,
16062 0x08f76c7f, 0xfb600e74, 0xcf1e3a77, 0x7e2810ab, 0x36143377, 0x624994da,
16063 0xba22eabd, 0xe333724f, 0x4b596347, 0x3dbbf28c, 0x796fb431, 0x9beeb293,
16064 0x2843fe75, 0xdbea8e57, 0x749e3192, 0xc4e4d6b4, 0x1b59cbfe, 0xc15a6fbd,
16065 0x153d29da, 0x9fa2f75e, 0x2226f73a, 0x63c9fddd, 0xf6d678a4, 0x50223be5,
16066 0xe5b167be, 0x044fdc56, 0xb7c6ec50, 0x73b3fb01, 0xd51df742, 0x2f60c4fb,
16067 0x027d21c7, 0x1d2127fe, 0xd8dc079c, 0x5fb77a73, 0x2317c7f8, 0x2c5f7f11,
16068 0x5b96e179, 0x9d5ffa19, 0xa82d47e4, 0x5df7465f, 0x33da9c81, 0xaaf07bf2,
16069 0x5bc55de2, 0xf01d5e37, 0xb0af182f, 0x938404a6, 0xc91965f4, 0xe8917fa5,
16070 0xf0e5d69c, 0xbc7dc2aa, 0x0e3b9f82, 0x8a15f970, 0xb70f156f, 0x43f5bbe2,
16071 0x236eef49, 0xc923313c, 0xb87a50cb, 0x3080be1c, 0xc4d93ce9, 0xa1f92318,
16072 0x4f2e4583, 0x2813cf07, 0xf33b795e, 0xf48012bc, 0xf5f7f096, 0xc70adefc,
16073 0xb782855b, 0x2fdf313f, 0x71ff9232, 0xce323b78, 0x606e34dd, 0xe50dbe6f,
16074 0xb2f8fed3, 0x37fce1c6, 0x18fa5f55, 0x3f0863f2, 0x376bf087, 0x2ff09d1e,
16075 0xc69e8f08, 0x6ecbe248, 0xae7b4b7c, 0x7fe22f4c, 0x5fb58e30, 0xaf93f9f0,
16076 0x46055f80, 0xf8f8bfbf, 0x54dead38, 0xa5c2a6f1, 0x07e0b8bf, 0x2ad47fcc,
16077 0xe70abed0, 0x748dbbe3, 0x57dd43ff, 0x5e4ff751, 0x5cf5c719, 0xd801fa68,
16078 0xb55fb84b, 0x40e4e326, 0x194f33b4, 0xfef87ed4, 0xdacb07ef, 0xb6f7f113,
16079 0xe9e2283e, 0xddff0329, 0x872f350f, 0x07e4b8f1, 0xc22f46f1, 0xf86103e9,
16080 0x1f33d404, 0xcf5cf708, 0x070671f3, 0x26e3cbe6, 0x53903de0, 0x798e357a,
16081 0xf07f12bf, 0x8f9479f1, 0x027aa62c, 0x074a5dff, 0xf61ddefe, 0x1736082b,
16082 0xbb83e7cc, 0x9d7de8d2, 0x718d7dee, 0x467f0edc, 0xdc774759, 0xe2815eff,
16083 0x355133fe, 0x84c4fee1, 0x877c2e2d, 0x437df4f3, 0xb4df69b3, 0xea3e3b41,
16084 0x978a64fd, 0xfee7e06e, 0xabea752e, 0xb75bf482, 0xc8be2dbe, 0xd1e4e7cb,
16085 0xbfa88cef, 0x86db2747, 0xc7dcff73, 0xd550df7f, 0x5fc75d67, 0x73c704b0,
16086 0xdfe2533f, 0x0fe1f9dd, 0xc3eb0526, 0x4dad4f43, 0x0daa7ec7, 0x05a72cde,
16087 0xb1ee877f, 0xaa5bb424, 0x4e955a9f, 0x0f53f4f6, 0x545fa3a4, 0xba6d63bd,
16088 0x0f70f94c, 0xbe3a65f9, 0x1b9e2fee, 0xd4f3e745, 0xdccaf6fe, 0x1d30a8af,
16089 0x3dbd412a, 0x56afeae5, 0xda41fee0, 0xffc5027d, 0x15f6b066, 0x332b67a8,
16090 0x16b15f38, 0xe87fc913, 0x776bf68f, 0x4ec5ff0d, 0x646f0794, 0x81cfd59c,
16091 0x203e127a, 0xd5df1035, 0xdfa3adf2, 0x7fcd5c09, 0x7ea7b027, 0x56ffed22,
16092 0x9de8172d, 0xfcf519ab, 0xf1a4f377, 0x59c704d1, 0xd18fb3ab, 0x794b57fb,
16093 0x6fa314f9, 0x67ec49df, 0x3fdf818b, 0xe094ee64, 0xb29270fb, 0x9d73385f,
16094 0xca717bf2, 0x639b6938, 0x53af07b7, 0x591df652, 0xdf2477ea, 0x32f0506e,
16095 0x5789e975, 0x54efd0ed, 0x1e3cc7bd, 0xe9b3bfbe, 0x619faa5c, 0x3a33f41c,
16096 0xf066985f, 0xd71f3a3c, 0x7148c3bd, 0xc1acdcd2, 0xcfd41c52, 0x11b45259,
16097 0xab4b99d3, 0x728f9d1e, 0xcd94d5b8, 0xf9f2358f, 0x114e0835, 0xed91f4e5,
16098 0xb842ceb7, 0x7fc4df9d, 0xfb61abff, 0xc2ddfa30, 0xafdee4fe, 0xf9eff89a,
16099 0xa264dd3d, 0x2b26d9f4, 0xcfeba3c3, 0xff29d935, 0x4a0e4daf, 0xcd3cf4d9,
16100 0xd7f4d8ef, 0xe14b88df, 0xb973bbf4, 0x3bf4cdab, 0x39460d88, 0x2bc03c75,
16101 0x1ddaaaed, 0xc2eb280f, 0xbdb2b8f7, 0x0e1113c9, 0x3e2c0fb9, 0x75b3a686,
16102 0x7d97df3c, 0x24eae4f3, 0x2c77d614, 0x7cc4f33d, 0x78fb7ef8, 0x270835f7,
16103 0x148bb6d3, 0x607238a7, 0xbbc22555, 0xaf91877a, 0xf9f7594f, 0x8f71e94d,
16104 0x75f97c62, 0x160dc53d, 0xc4f33b6d, 0x877f0c03, 0x9821b177, 0xbd74afde,
16105 0x7ee78f57, 0xaaf8e5e6, 0x78fc383f, 0x449b5abe, 0xf803b3fc, 0xf3a7f32a,
16106 0xcba5a2d5, 0xc6cb7e08, 0xb8426fbb, 0x937bd79d, 0x0fce9f90, 0xee744b1f,
16107 0xf820457d, 0xdbbc72ab, 0xbfe056af, 0x575b6c50, 0xc723dc98, 0x04b961bf,
16108 0x3e0743df, 0xf9fb474d, 0x3fe5fd9b, 0x6097eeb8, 0x1861fedd, 0x1a5133af,
16109 0xe0df3dfa, 0xf584ea19, 0x3ef3f7e5, 0x6af1d2e8, 0x539f9ffc, 0x36213fc0,
16110 0xe6219df8, 0xd4f9828d, 0x61fc141c, 0x26cfa859, 0xbf43a67d, 0x8fcffc11,
16111 0x198ce734, 0x9f4828fb, 0xcbdf37f7, 0x4fd875a5, 0x1ddc8f5a, 0xfcc89ef9,
16112 0x547b7a41, 0x83f98c20, 0x73f6edc6, 0xfb40cca0, 0x1724f14e, 0x2e786f10,
16113 0xe181c2ec, 0x99ff303b, 0xc2f1e381, 0xf14f604b, 0xf2931078, 0xd9f9d67b,
16114 0x50b22f81, 0xb7ae86ce, 0x882fe5ee, 0xaff66a3e, 0xfad028ba, 0xcba67f27,
16115 0x0ffafcba, 0x1645f53d, 0x7d33efe2, 0xb6fd1f20, 0x1640860b, 0xb7eea1e2,
16116 0x58ff9e5c, 0xf3e5a838, 0xf7e81b57, 0x1304eb3a, 0xf48949d1, 0x2e1fc525,
16117 0x87f1e71c, 0x924f03ba, 0xc83aed3c, 0xc48b40e3, 0x8c38d2f6, 0x399fd49b,
16118 0xcbacf286, 0xe831fdce, 0x2b71de9f, 0x41e8aa1c, 0xde12675d, 0x4dd83bf7,
16119 0x3c8fdc0f, 0x0c3bfc8f, 0xf3a369fb, 0x9c2b2cbd, 0x39f15da1, 0x7c30f3f2,
16120 0x257930bf, 0xdf79f9d2, 0x8f941cc0, 0xadfd666f, 0xbf86e28e, 0xb27ba70f,
16121 0xe6926db5, 0x3af7799c, 0x703f127c, 0x29fb54c4, 0xe7c1c99c, 0x1b8e0cb9,
16122 0x837e6ec8, 0xba2e13ef, 0x7b13f38a, 0xed53f399, 0x7b0643f2, 0x15bb7f50,
16123 0xc8ed527e, 0x1bffbf29, 0x85b3e5f1, 0xd504fd32, 0xffc7a54f, 0x4cf7fe9f,
16124 0x33412fff, 0x800063ec, 0x00008000, 0x00088b1f, 0x00000000, 0x5aa5ff00,
16125 0x5554700d, 0xbdef3e96, 0xdd2749fe, 0x12421349, 0x42068408, 0x03621a88,
16126 0xc4d67281, 0x206efce9, 0x6b01bb33, 0x8d08c42d, 0x749d2422, 0x6aece882,
16127 0x021a6eb9, 0x367564ac, 0x1d47598c, 0x809f9b47, 0x9476ec28, 0x0da0c040,
16128 0x6ba2cb0a, 0x3a26aa45, 0xab545b55, 0xa6e00eac, 0xd63b8223, 0x3be7b8e2,
16129 0x1dddb5ef, 0xa6ed4fe2, 0xee7dba8a, 0x9ee7b9cf, 0xce77ce7b, 0x52b48f3d,
16130 0x6a22ca22, 0x2a08cdcf, 0x6ea6ff0a, 0x6d4445a2, 0xf67f2429, 0xaf1f4541,
16131 0x7dbc64d3, 0x58c9a340, 0xce08eb93, 0x4754419e, 0x459a26dd, 0x654284b4,
16132 0x29bf71a4, 0x795bcbf2, 0x6d0dfebc, 0x61931741, 0xb06aad1b, 0x7aa6d513,
16133 0x1314360b, 0xaacaab0d, 0x0bcc6286, 0x4b9d2e95, 0x7efe0df4, 0x879b744a,
16134 0x2a224f99, 0xf60f14d3, 0x169c9d1b, 0x8b5dc9dc, 0x491bfb97, 0xeaa7984d,
16135 0x534f98f3, 0xa3827c08, 0xd81d4b25, 0x9964b468, 0x8eef3e23, 0x07d6d237,
16136 0xd2a14e31, 0xf9f6123b, 0x68858f4b, 0xcb17d121, 0x650faa17, 0xdaae79f2,
16137 0x51337403, 0x29ed768d, 0x70ddf785, 0x05564ccc, 0xafbc67fc, 0x670239f2,
16138 0xfa65ea34, 0x790a4752, 0x4bceccac, 0x1bcf0f1e, 0xd8293b99, 0x3f6fe7c5,
16139 0xe78990a0, 0xeeb11db5, 0x6d79e14c, 0x9bb648e6, 0xf036ddf7, 0xdb878b3b,
16140 0x2cf7fef6, 0xcf58b9ae, 0x9e433647, 0x6dfa1514, 0x174ff277, 0xce607f91,
16141 0x3f3177fb, 0xf44d69ff, 0x67bd37ed, 0x05d7d621, 0x5afd8f9e, 0x82d5f60e,
16142 0x56f0a56e, 0x3cfdda27, 0x9bbf48af, 0xe5dff86f, 0xb386575c, 0xf8be7e38,
16143 0xa7a25d39, 0x69f8bd18, 0xd602f73e, 0x43eb468b, 0x21ee5976, 0x6e717b96,
16144 0x252e8ece, 0x5fae9d71, 0x4b69768f, 0x9d15cb0e, 0x6615b8a9, 0x6c0d4d15,
16145 0x851f4276, 0x1797b38a, 0xb97f5f47, 0x9bf42d74, 0x9dbd2c12, 0x90b517cf,
16146 0xc7e2c7dc, 0x04b49bb6, 0x6a0f1679, 0x3443dc1e, 0xc90e9a95, 0xe2a77bbd,
16147 0x61bca83e, 0xd61267a9, 0x2b7bbe8d, 0x7955196f, 0x73fafdbd, 0x7975ca04,
16148 0xc9a9b0ce, 0xd7721b7d, 0x80ede5e7, 0xc400d9fe, 0xfaa94e8e, 0xc7951efe,
16149 0xbfd7c7e7, 0x46a79c68, 0xf089ce2b, 0x9dc506f8, 0x9f671ce3, 0xf587bb58,
16150 0xe9ef86be, 0xb46fbe45, 0x6938752f, 0xfda26ccd, 0xff42b91d, 0xda4b8773,
16151 0xf4914750, 0x16e1d2bf, 0x2dc760fa, 0xf0ea1f42, 0x51d03d08, 0x8ed1ed27,
16152 0x033fe906, 0x708cff51, 0xe2ec20a0, 0x4a6d7c14, 0x1cce1e9c, 0x9e494f43,
16153 0x24a99c3f, 0x991453d3, 0x3cb870ff, 0xa5fa6018, 0x939ca732, 0xc0d1ca8d,
16154 0x4b4e68fa, 0xb40ca12f, 0x674a41f9, 0x037bb1bb, 0x3ffbb61e, 0x43daedd4,
16155 0x4bcfc533, 0xf33aaf30, 0xdbf846ce, 0x692b2ce5, 0x1ec3cfac, 0xde63dfef,
16156 0x0555d3e9, 0x683fd1db, 0xfef95b73, 0x94dc5787, 0xff47bd01, 0xb78d234d,
16157 0xb05a28ae, 0x0ae994b9, 0xcc7622bb, 0xc86e6efc, 0x4fc6bb66, 0xb83553e6,
16158 0xe3a4d4ba, 0x02b67384, 0xc1aeb7fd, 0xdb261b3e, 0xfc795816, 0x57f7b94a,
16159 0xf7a627d8, 0x0aeb29da, 0xd98bd0bc, 0xf3cabef5, 0xa66eff02, 0x80f79e5e,
16160 0xdf649dc3, 0x822bcb47, 0x45c59bb0, 0x07cf36b3, 0xd9ba767f, 0xf5bb3fbc,
16161 0x51e7c87e, 0xc14e94d3, 0xb8099731, 0xf3fdc410, 0x452e953e, 0x716c30ec,
16162 0x7f993299, 0x2b22b538, 0x194eebc0, 0xb8da7df7, 0x7dc633ef, 0xd5fdc3bf,
16163 0xfdcbbedc, 0x1fb88768, 0x9e988aed, 0xd085a34d, 0x0da7f05f, 0xef44792f,
16164 0xa3a0f9a3, 0x3b0e5a66, 0xd33f025c, 0x81bf27f1, 0x5ca278e5, 0x036ee397,
16165 0x6b6e867f, 0x85d7d3e8, 0x858b4f84, 0x4bffb0bc, 0x9f609f58, 0xf5f175b1,
16166 0x9bb2ed24, 0xe7c29029, 0x20b6c3a0, 0x895344f4, 0x0ecb5f80, 0x692e08e7,
16167 0xcf8ab329, 0x017a644f, 0xabd29e09, 0xae5e7d56, 0x85fc216b, 0x8cfb2475,
16168 0x9980d504, 0x399fc4ed, 0xf2c99854, 0x167e188e, 0x49fd0fa3, 0xcff6fc13,
16169 0xd7db9a67, 0xfe7cfd14, 0x13854365, 0xa9b15eb0, 0x4eff33b0, 0xe1acfc7d,
16170 0x0699fe87, 0x943ce33f, 0x7dc7ca12, 0xce1d8f44, 0x2ee987bf, 0x1ead787b,
16171 0x8285c207, 0x5c2e14df, 0x42549c06, 0xd44dc8e7, 0xaf7dfc77, 0x47d027e9,
16172 0xfdd079e8, 0xd3af7fc7, 0x6739df4a, 0x50a4f8e2, 0xfd04e2be, 0x3df74181,
16173 0x409dc13f, 0x87395f9b, 0xdfa6cb71, 0x3327ab7b, 0xa783586e, 0xff37603b,
16174 0xed97dba2, 0xd027ff40, 0x2b11cb5b, 0x0f2b2ec1, 0x0af67ff4, 0x3bf4b78f,
16175 0xa8fb80dc, 0xbbe88667, 0xc7dec8f3, 0x7d236f61, 0xae87f166, 0xfe7bbffd,
16176 0x25679911, 0x35bd5b98, 0xcfbc4a54, 0xe37fe3d1, 0xb49f6135, 0x6fd015d0,
16177 0x39179c57, 0xfeea27ea, 0xa9f1543d, 0xf5bd0037, 0xc46bf81f, 0x0a0cfab5,
16178 0x65e96ec0, 0xe46647be, 0x6a86f57b, 0xc771e12a, 0x6ff04ad0, 0x86eac97b,
16179 0xcd5efa9d, 0x5f1f84a9, 0xfb14ccf3, 0x3bb1be6b, 0x3d57711f, 0x23cf6fba,
16180 0x23679859, 0xc99edbc8, 0xf57ac476, 0xdd163b69, 0x6bb7f72f, 0xf7206fcf,
16181 0x64ed1b3e, 0x03cccd3e, 0x99ef35fb, 0xd1f00c1d, 0xe3fafb5e, 0x1a87b895,
16182 0xe83db9ed, 0xa6dbb2bf, 0x2d670f42, 0xf8728c9e, 0xbbb359e1, 0xba0ceb17,
16183 0x2ea27879, 0x56a45a4f, 0x3bab2fee, 0x37d7711f, 0x80bfe1f1, 0xf75af5dc,
16184 0x3ce2cff3, 0x3884ad7b, 0xeb1f6171, 0xe85dd78d, 0x2dc7cf35, 0x9873ec8f,
16185 0x94972f60, 0x82cf95ee, 0xef3eaf7f, 0xf45bad92, 0x439de819, 0x11e78fd8,
16186 0x6525f2e2, 0x85ff527b, 0x5e25bdde, 0x97c5dfd6, 0x09bd8bea, 0x17f31bf6,
16187 0x526b6edf, 0x6024147c, 0xbf19f25c, 0x3b2019c9, 0x8366dfc7, 0x99e878bc,
16188 0xbe296791, 0x737ee2fe, 0x6a3ac2d8, 0x94e6d2b6, 0xf83fb8cc, 0x0ebcfef2,
16189 0x3ba9f3e7, 0x34c7910a, 0x84ac882f, 0x51b05c5f, 0x7bcf2e4a, 0xbe5f88db,
16190 0x2a971b83, 0x4f2ddf25, 0xc7ee854d, 0x38f57357, 0x16c07576, 0x1ddf280c,
16191 0x83a3fe8f, 0x8eccef9c, 0x67af77d3, 0x7e71297e, 0xad425b6f, 0x2db7de6e,
16192 0x738fc753, 0xe33f7f3c, 0xcfb19558, 0xe79287aa, 0x299152df, 0x8966d3f6,
16193 0xc60e2214, 0x88ac2ff8, 0x10a45ae1, 0x5d763578, 0xe013d23d, 0xe08acbc8,
16194 0xf2a0ef88, 0xa86e96a1, 0x4fae3b34, 0xa8204a5f, 0x0f7f8c95, 0x7b8c8bb9,
16195 0x55ef5e60, 0xdbe57ee8, 0x98d8f36f, 0x246a4b4f, 0xab53791d, 0x7c8e9223,
16196 0x46a8e468, 0xcbeb8d3b, 0x199ff18a, 0x4649afdf, 0xf6643fb8, 0x8fdbc6d8,
16197 0x6f3c438f, 0x2ab37e1d, 0xfdd0a93e, 0x4d2069a6, 0x646723f6, 0xe9b6ec11,
16198 0x3875e4b9, 0x1fc133a7, 0x65760647, 0x8fe2137b, 0xaa3b90cf, 0x137e287c,
16199 0x7ca3fafd, 0xa54f81d8, 0xf6ab0acd, 0x65b1af22, 0x3a294d0a, 0xe5b1b01d,
16200 0xa7b4befb, 0x5e2e7ec2, 0x1e3f156d, 0x73822251, 0x0aae27b9, 0x23988c3e,
16201 0xca8e7382, 0x18fc11ff, 0x09591099, 0xb4adcadc, 0xc9f196af, 0x1e2e9591,
16202 0xa0c2b2ff, 0x03e491a7, 0x57322785, 0xb5ea4f03, 0x3711b7d1, 0x09d99769,
16203 0x7be9893f, 0xa227a19d, 0x783b86c7, 0xb3410ffc, 0x4e61f10b, 0x0be462a5,
16204 0xb5f9f896, 0x908d3fb8, 0xf841c0eb, 0xdddd9367, 0xfdc1a32b, 0xbc1f20af,
16205 0xe5dddb33, 0x326f5eba, 0xcacae587, 0xee2d6afc, 0xfbdd3b29, 0xdfcc158f,
16206 0x07c91c5f, 0x4bb5b1ce, 0xdd7b6a1c, 0x47fb13ba, 0x807ba3cd, 0xde1c175f,
16207 0x9f582b27, 0xada196ad, 0x67d22ca5, 0xa429c8e6, 0x6f604bf8, 0xbdba2382,
16208 0xb2ef148d, 0x561e9f08, 0x9767eb2a, 0x4b940f71, 0xa1f603b4, 0xe6fcf7e8,
16209 0x00efabc0, 0x6686466f, 0xf58f4e09, 0x4f030ba7, 0x3e3703a6, 0x981ef8e0,
16210 0x60ffef13, 0xfa0b5ef5, 0xc3b8bf97, 0x9ef6e112, 0xbbe7c9cd, 0x0cf6ed7c,
16211 0x9e3d0bf8, 0xec7b0fd0, 0xeac7a649, 0x4e197605, 0xe88083f2, 0x29c79cfd,
16212 0x0e54b7f2, 0xdf0f41b5, 0xd698cbd2, 0x6313e812, 0xa9f331e8, 0xce1fcf41,
16213 0xb6f84879, 0x430f0b4e, 0xcc07236f, 0xe4ef7c04, 0x7f7426b8, 0x1aef105a,
16214 0xadc700f5, 0x216e3d2c, 0x0fa4b45e, 0x8cbdc4ad, 0x989d5bf4, 0xa7c8e9bf,
16215 0xdb3f38f9, 0xdbce3e63, 0x3670e472, 0xf78dcec1, 0x6cc7c704, 0x1ff4b78c,
16216 0x24bbc6c9, 0x86aadfd6, 0x4717210a, 0x47e012b8, 0x85afdfac, 0x8b7f210b,
16217 0xf1825432, 0xf996e428, 0x49a06b4c, 0xe8aad1ce, 0x34474f7e, 0xf7b1f9c1,
16218 0x6e8551f6, 0x250f8caf, 0x1d3707c8, 0xb11254bd, 0xd9a0f1c7, 0xe81395c0,
16219 0xdffdd62f, 0x09c0c8b9, 0xbf0cda5e, 0xbc27071f, 0xf5a3dc31, 0xae7dc816,
16220 0xb63b9742, 0x3bcaf85e, 0x6de32023, 0x992a5daf, 0xc6758c59, 0xa3c04a3c,
16221 0x017c7159, 0x0e0ae40e, 0xf367326c, 0x2bcf7cb9, 0xd25e4eee, 0x96b1b8dc,
16222 0xd33ad3a7, 0x6bd0b5fd, 0x5de40513, 0xb1ae5637, 0x8570f476, 0x553ebf7e,
16223 0xf6fb8f7f, 0x964ec128, 0x7d6322eb, 0x9bc17cee, 0x5d67f030, 0xf85ac6f5,
16224 0x7e597ddf, 0xf9bbe24b, 0xedaff887, 0xadd7a649, 0x339b58df, 0x1efb9f8e,
16225 0x126a7eda, 0xd9afcf5d, 0xdb36a3bb, 0x4c7f7d75, 0x98b68bee, 0x49e6959c,
16226 0xbe58fa89, 0xb71276b1, 0xaffe52eb, 0x7dcfd0fa, 0x8c3588f1, 0xb5facbb8,
16227 0xfdb7fce0, 0x0925bd71, 0x5f807fb7, 0x9d6b0533, 0xfe5bbe33, 0x12ab6db1,
16228 0x4f80561e, 0xe2bd5fec, 0x0937ec67, 0x18aa6dfb, 0x5a68a753, 0x37791d3d,
16229 0x4f4f5779, 0x6d8c53ac, 0xa8a72819, 0x49bd88b7, 0xd2b87ecb, 0x623e8e3d,
16230 0xd4ae6ff3, 0x864d9f64, 0x6fa94f1d, 0x1e15e679, 0x53ccb97f, 0x557ec956,
16231 0xbf92a9ae, 0xa6a7dd8f, 0x860fcf52, 0x80bf1db2, 0xcd07453d, 0xb949f84e,
16232 0x4f33eba6, 0xfc2efcbd, 0xe1db2f31, 0x357e64ea, 0xbcfa6955, 0xea273663,
16233 0x5f63d140, 0xffe07be5, 0xa5cbec5b, 0xd3b262ce, 0x953f1e64, 0x3df0573b,
16234 0xc6c7cfb6, 0x7aa5693e, 0x645ed3be, 0x533afefe, 0x3adbe3b1, 0xc51be493,
16235 0x12d9c169, 0xf890bf87, 0xe85c1d16, 0xf7c05cd4, 0xd6fe1da0, 0x677ff5fe,
16236 0x0c8f0e23, 0x0bba67fe, 0xd3ed75b8, 0xb6cfd874, 0x81d38f81, 0x6606270f,
16237 0x1d9ed039, 0x1fd03972, 0x16b8fbad, 0x368cbaf3, 0x8b30675e, 0xf636b19c,
16238 0x13d58e7e, 0xcdd1de12, 0x73af6bd0, 0x614b2fdb, 0x82dda9ef, 0xce8efc63,
16239 0xd788fc44, 0xe3395c19, 0xeb1265d5, 0xf5b3050c, 0xd45a033a, 0x7acc0a19,
16240 0xea34019d, 0x6751680c, 0x0cea3f40, 0x006751a0, 0x68033a8d, 0xa2d019d4,
16241 0x2bfe80ce, 0xbcb16ba8, 0x50de4e51, 0xecd1aadf, 0xf40fff82, 0xf5e4416a,
16242 0x74d31c0f, 0xc412877a, 0xfbc67f7d, 0xaf460e23, 0x28b075e8, 0xe77953c7,
16243 0xfbcb341f, 0x5eda1a20, 0xd6f71337, 0x5571b9af, 0xd9371117, 0xa3cddb14,
16244 0x6a1f5127, 0x1bdc53ef, 0x2e5fe85d, 0x5c1b6c72, 0xfa237ef8, 0xd56ecd7b,
16245 0x9abafb85, 0x6f97fa8d, 0x58ea57b0, 0x2cc739d5, 0x15fbcf72, 0xeffde1ca,
16246 0x64efeab0, 0x2cbdc6bf, 0x9545b0f7, 0x1d6fda3c, 0xcb4bf792, 0x4d738a8b,
16247 0x7eda1e42, 0x1382e7cb, 0x9df4b69d, 0xb21fd790, 0xc524d739, 0x7de48f57,
16248 0xc174fc7e, 0x45433c8d, 0xa7d5af4c, 0x7b5edf90, 0xf9213801, 0xb47e4248,
16249 0x33fcd9d6, 0x5da467e4, 0x7efce133, 0x644ee87e, 0x6d3dd6f9, 0xb09228fe,
16250 0x9930737f, 0x6df60df6, 0x99c823cd, 0x034a8fdc, 0x943fb2e2, 0x74aa1fdc,
16251 0xc6927d64, 0x3cd1e63f, 0xff755be4, 0x3f40e6b4, 0xdbb977ef, 0x61caf92a,
16252 0x2570f78f, 0xb349f1fb, 0x272fea47, 0xbde4d98f, 0x9cfb7e75, 0x8d4bfaa4,
16253 0x1fea5536, 0xc48acc1b, 0xdee52bf1, 0xaacbb063, 0xeea57bba, 0x10eb9552,
16254 0xe1d98e7f, 0x3786f2d1, 0x5cc377c0, 0x6abfd497, 0xe10bf4ac, 0xf72f7ec7,
16255 0x7f16683c, 0x8254e9ab, 0xc9abd32a, 0xad7f816d, 0x3d8a7562, 0x298fed99,
16256 0x78ab0fec, 0xbb04c6af, 0x915db0da, 0x100a42bc, 0x8695e7ac, 0xfe0d573e,
16257 0xfb0a57eb, 0x3d56bdcb, 0x5553ce0f, 0xc5d79fe1, 0xdfe78b71, 0xfc0b5e47,
16258 0x55c71d66, 0x5f671cb4, 0x37bf708f, 0x9ebe6a6d, 0xc072bbe7, 0x3319f57f,
16259 0x726a4f01, 0x95e85e7e, 0xfced5f78, 0x095bef84, 0x737da5df, 0xa8e1f7d3,
16260 0xc8493e89, 0x759a4f6b, 0xca7d61fc, 0xec14eb7b, 0x5e3eea55, 0x3474cf69,
16261 0x8ca2bb49, 0x340bffc4, 0xe02f6f3d, 0x4a6672bb, 0xeb0fa2dd, 0x6eedda6b,
16262 0x0b863fe8, 0xbefc8dbb, 0xe796e540, 0x5bd54eed, 0xdc29d30b, 0xca5b8d3f,
16263 0xe7617e14, 0x5c71d47c, 0x3d4f3fc2, 0x7d05c0bb, 0x4377697c, 0xc739351f,
16264 0x31dde1e6, 0x72ffe0cb, 0xdc55c359, 0x029d2797, 0x438f9fd8, 0x5adfacdd,
16265 0x5d41481c, 0x50d1e43d, 0x38a63f27, 0x1ebfaef1, 0x716fb74f, 0x140acfc2,
16266 0xb5b7ea27, 0xd935dda9, 0xe676bfcc, 0x9cf0370c, 0x61ea55f1, 0x76eadc23,
16267 0x53506b70, 0x6ca6b5f4, 0xff0df3d4, 0x54a6f729, 0xd7f78a4d, 0x1d147e1b,
16268 0xf11d22fc, 0x6dd447f5, 0x807f8377, 0x835eee6c, 0xfea0ec3f, 0xbf5269a6,
16269 0xe5d1d98d, 0x613b39fd, 0xf4ab5347, 0xef8d8d75, 0x0c4f9199, 0xc1cde6dd,
16270 0x7cd72bfe, 0xce5b25be, 0x8cbd7e39, 0xb8033771, 0x165eb63b, 0x463df1c3,
16271 0x6b781dfd, 0x26baea32, 0x326baea3, 0xa326baea, 0xea326bae, 0xaea326ba,
16272 0xbaea326b, 0x6baea326, 0x26baea32, 0x97ae13a9, 0x878eddf6, 0x08ea1da4,
16273 0xbc4278c8, 0xc7eab9b8, 0x55175dd5, 0xa577538d, 0xc4865714, 0xbd7bf65d,
16274 0xcea63dde, 0x26aefeca, 0xe0d57bf8, 0x431e7b84, 0x7163d25e, 0x6b5438b3,
16275 0x603c16f1, 0x54f07c17, 0x8d6f5b8d, 0xf52ecfe9, 0x9b64cbd9, 0x2ca87b8f,
16276 0x5152659a, 0x23ee34c7, 0xdf84ef56, 0x1bf09ce0, 0xd31bf0b4, 0xfcdfb8ec,
16277 0x5daec2d6, 0x0109e7aa, 0x726c13c9, 0x32375bbf, 0x2f7d30ae, 0xe5709339,
16278 0xc2b831b3, 0x90159a0f, 0x95a0ed63, 0x233f74ba, 0x37254ff8, 0x0e3f9c7f,
16279 0x9c7484ce, 0xda1a9699, 0xb5a67d87, 0x1791baa5, 0x9d8bbfb3, 0x88a6dc9d,
16280 0x06a1afbf, 0xbc1c77d9, 0x7c9e4749, 0x73d1c4ef, 0xf7f9e1bf, 0xf25d83fe,
16281 0xd793ad9d, 0xe0fffa2e, 0xae954d4d, 0x84775f8f, 0x9659e77d, 0x43b654ea,
16282 0x16d5578e, 0xb8ba922a, 0x50fe2a9a, 0x58ae3da3, 0xd377a380, 0xb577dc3c,
16283 0xc839e1b5, 0x2efec399, 0xa32cdfef, 0x6a1a6bbe, 0xd9f4cbde, 0xbe373cec,
16284 0x3dcd4dab, 0x800b0544, 0xb0c57547, 0xadd4b3ab, 0x1963dd60, 0xbf83bfde,
16285 0xa7cc5edc, 0x96fee356, 0xb3b69753, 0xce63ee4b, 0x32fbdc42, 0xf51fabab,
16286 0x9e6f2d86, 0xb2c27a90, 0xd442d70c, 0x79bcb61b, 0x5c73a75a, 0xe51b8afd,
16287 0xabab13b2, 0x66f8827f, 0x109f3eeb, 0x09a1fd67, 0xc0fb7449, 0x09f3eee4,
16288 0x3f05ae71, 0x3f4e9df8, 0xafb84c53, 0x5c944356, 0xf21dbbd5, 0x4bfeebf9,
16289 0xa8d3cf7f, 0xaaa7c9c4, 0x749c5c74, 0xe7b0c282, 0xf90ec5d1, 0x713397fe,
16290 0xdbd43cfd, 0x10b5d8a8, 0xfdaf38f3, 0xe2f8ec35, 0xc1a79ead, 0x7738cf27,
16291 0x3579f10e, 0x0d90c758, 0xbbe319ed, 0xdbd529e4, 0x3d36b688, 0x357e9260,
16292 0x6df68a58, 0xfa20f435, 0x81762fd9, 0xf393ed4f, 0x3a622c6e, 0xb79a1acf,
16293 0xe9788ede, 0x73fe8dd9, 0xec5e9e65, 0xdfeeb637, 0xe58f9c69, 0xc37987d9,
16294 0xf9e4aa85, 0x6dea37c3, 0x55c22ecc, 0x371d0e3a, 0x93aca8fc, 0x58e7fbe4,
16295 0xa55e39fb, 0xfdf9781a, 0x47bcb372, 0x7e4c4f20, 0x0a5d5eea, 0xa3de5879,
16296 0x61afbc86, 0x5299ec9c, 0x7b6ef98f, 0xc77ec80d, 0x7c653b0d, 0xe3af396c,
16297 0xa685b4a3, 0x0de404e0, 0x4e0d1e53, 0x7653bc80, 0xdc5cda8c, 0xb51810be,
16298 0xe1787f21, 0xe86d476f, 0x7543c17f, 0x56bfe1e3, 0xc2df09ad, 0x3f5951b2,
16299 0x921af79d, 0x04e8c277, 0x4d856fe4, 0x6c02596f, 0xe69e73b7, 0xb7f2937d,
16300 0xd3638922, 0xfe9a5b0d, 0x87b04aa8, 0xe490cfe9, 0x259d54ab, 0xdd14bee3,
16301 0x3e8f7dff, 0x6e8ec2a8, 0x09dcb208, 0x69e737f6, 0x1248e5d3, 0x6bacb0df,
16302 0xf3837031, 0x3f71a4b5, 0x3cbe4733, 0xe423c0c5, 0x378c8d8f, 0xbeb7a6fe,
16303 0x79c8be42, 0x8c7e18dc, 0x261c314d, 0xebef5dc4, 0x20fc1711, 0xbbdade79,
16304 0xf78ad91e, 0x76e3536d, 0xd78fbc8b, 0xdb456df4, 0x259efada, 0x4cbf2487,
16305 0x65f9cf9a, 0x9c9d7d12, 0x7b68e463, 0x39adf3f0, 0x76cbece3, 0x0ed12d70,
16306 0x37439a4e, 0xd27abde0, 0x480eea9f, 0x0fdd091c, 0x6ad9d97c, 0xecae2377,
16307 0xd8a555fa, 0xa9f5b7d7, 0xfaa98f32, 0xa751d947, 0x52540fcc, 0x87e6fc11,
16308 0xe1e011da, 0x0c3c24ec, 0x8972dd48, 0xddae7043, 0xadb60778, 0x123e4a71,
16309 0x5336ebf3, 0x98adc3e8, 0xef90e597, 0x45b70c11, 0x6f7c2ca6, 0x4aeee29a,
16310 0x2ece2bc8, 0x9d041599, 0x830a19dd, 0x15cfe8ef, 0xd5c8ea37, 0xd6ae3a69,
16311 0x7bad0da8, 0x352dfc79, 0x5bf1b82c, 0x6ff307e0, 0x7697acb7, 0xb14cd945,
16312 0x290a5cdb, 0x7067fffa, 0x3d7bc42d, 0x67ad3df6, 0x20efb05b, 0xf04afbde,
16313 0x8fa8b599, 0xe45d95fe, 0x80d50689, 0x33d3cf99, 0x7bb70481, 0xb8942cee,
16314 0xc686a513, 0x2cff91fb, 0x6a3a954f, 0x13d704cf, 0xd3da6ef8, 0xf5e4a37c,
16315 0xc7a4fe87, 0x29a5d1fb, 0x3d71e46e, 0x711b5cf3, 0x5d479eae, 0xa29afe32,
16316 0xa13c0bf3, 0xa967a7eb, 0xe69ece7e, 0xc59f794c, 0x8767a1ee, 0xbfbe3267,
16317 0xe5bc3259, 0x1803a8d5, 0x667b1fdf, 0x4fb73f70, 0xde770d29, 0x75733e07,
16318 0xb9945779, 0xde4edee4, 0x7b13e379, 0xf1867d74, 0x897dac1d, 0xfefde923,
16319 0xcb80febf, 0x002220b3, 0x00000000
16320};
16321
16322#endif /*__BNX2X_INIT_VALUES_H__*/
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index ad5ef25add3e..fbf1352e9c1c 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -53,12 +53,19 @@
53 53
54#include "bnx2x.h" 54#include "bnx2x.h"
55#include "bnx2x_init.h" 55#include "bnx2x_init.h"
56#include "bnx2x_init_ops.h"
56#include "bnx2x_dump.h" 57#include "bnx2x_dump.h"
57 58
58#define DRV_MODULE_VERSION "1.48.105" 59#define DRV_MODULE_VERSION "1.48.105-1"
59#define DRV_MODULE_RELDATE "2009/03/02" 60#define DRV_MODULE_RELDATE "2009/04/22"
60#define BNX2X_BC_VER 0x040200 61#define BNX2X_BC_VER 0x040200
61 62
63#include <linux/firmware.h>
64#include "bnx2x_fw_file_hdr.h"
65/* FW files */
66#define FW_FILE_PREFIX_E1 "bnx2x-e1-"
67#define FW_FILE_PREFIX_E1H "bnx2x-e1h-"
68
62/* Time in jiffies before concluding the transmitter is hung */ 69/* Time in jiffies before concluding the transmitter is hung */
63#define TX_TIMEOUT (5*HZ) 70#define TX_TIMEOUT (5*HZ)
64 71
@@ -1539,7 +1546,7 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
1539 len, cqe, comp_ring_cons); 1546 len, cqe, comp_ring_cons);
1540#ifdef BNX2X_STOP_ON_ERROR 1547#ifdef BNX2X_STOP_ON_ERROR
1541 if (bp->panic) 1548 if (bp->panic)
1542 return -EINVAL; 1549 return 0;
1543#endif 1550#endif
1544 1551
1545 bnx2x_update_sge_prod(fp, 1552 bnx2x_update_sge_prod(fp,
@@ -5232,13 +5239,15 @@ static void bnx2x_gunzip_end(struct bnx2x *bp)
5232 } 5239 }
5233} 5240}
5234 5241
5235static int bnx2x_gunzip(struct bnx2x *bp, u8 *zbuf, int len) 5242static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len)
5236{ 5243{
5237 int n, rc; 5244 int n, rc;
5238 5245
5239 /* check gzip header */ 5246 /* check gzip header */
5240 if ((zbuf[0] != 0x1f) || (zbuf[1] != 0x8b) || (zbuf[2] != Z_DEFLATED)) 5247 if ((zbuf[0] != 0x1f) || (zbuf[1] != 0x8b) || (zbuf[2] != Z_DEFLATED)) {
5248 BNX2X_ERR("Bad gzip header\n");
5241 return -EINVAL; 5249 return -EINVAL;
5250 }
5242 5251
5243 n = 10; 5252 n = 10;
5244 5253
@@ -5247,7 +5256,7 @@ static int bnx2x_gunzip(struct bnx2x *bp, u8 *zbuf, int len)
5247 if (zbuf[3] & FNAME) 5256 if (zbuf[3] & FNAME)
5248 while ((zbuf[n++] != 0) && (n < len)); 5257 while ((zbuf[n++] != 0) && (n < len));
5249 5258
5250 bp->strm->next_in = zbuf + n; 5259 bp->strm->next_in = (typeof(bp->strm->next_in))zbuf + n;
5251 bp->strm->avail_in = len - n; 5260 bp->strm->avail_in = len - n;
5252 bp->strm->next_out = bp->gunzip_buf; 5261 bp->strm->next_out = bp->gunzip_buf;
5253 bp->strm->avail_out = FW_BUF_SIZE; 5262 bp->strm->avail_out = FW_BUF_SIZE;
@@ -5369,8 +5378,8 @@ static int bnx2x_int_mem_test(struct bnx2x *bp)
5369 msleep(50); 5378 msleep(50);
5370 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0x03); 5379 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0x03);
5371 msleep(50); 5380 msleep(50);
5372 bnx2x_init_block(bp, BRB1_COMMON_START, BRB1_COMMON_END); 5381 bnx2x_init_block(bp, BRB1_BLOCK, COMMON_STAGE);
5373 bnx2x_init_block(bp, PRS_COMMON_START, PRS_COMMON_END); 5382 bnx2x_init_block(bp, PRS_BLOCK, COMMON_STAGE);
5374 5383
5375 DP(NETIF_MSG_HW, "part2\n"); 5384 DP(NETIF_MSG_HW, "part2\n");
5376 5385
@@ -5434,8 +5443,8 @@ static int bnx2x_int_mem_test(struct bnx2x *bp)
5434 msleep(50); 5443 msleep(50);
5435 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0x03); 5444 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0x03);
5436 msleep(50); 5445 msleep(50);
5437 bnx2x_init_block(bp, BRB1_COMMON_START, BRB1_COMMON_END); 5446 bnx2x_init_block(bp, BRB1_BLOCK, COMMON_STAGE);
5438 bnx2x_init_block(bp, PRS_COMMON_START, PRS_COMMON_END); 5447 bnx2x_init_block(bp, PRS_BLOCK, COMMON_STAGE);
5439#ifndef BCM_ISCSI 5448#ifndef BCM_ISCSI
5440 /* set NIC mode */ 5449 /* set NIC mode */
5441 REG_WR(bp, PRS_REG_NIC_MODE, 1); 5450 REG_WR(bp, PRS_REG_NIC_MODE, 1);
@@ -5510,7 +5519,7 @@ static int bnx2x_init_common(struct bnx2x *bp)
5510 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0xffffffff); 5519 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0xffffffff);
5511 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, 0xfffc); 5520 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, 0xfffc);
5512 5521
5513 bnx2x_init_block(bp, MISC_COMMON_START, MISC_COMMON_END); 5522 bnx2x_init_block(bp, MISC_BLOCK, COMMON_STAGE);
5514 if (CHIP_IS_E1H(bp)) 5523 if (CHIP_IS_E1H(bp))
5515 REG_WR(bp, MISC_REG_E1HMF_MODE, IS_E1HMF(bp)); 5524 REG_WR(bp, MISC_REG_E1HMF_MODE, IS_E1HMF(bp));
5516 5525
@@ -5518,14 +5527,14 @@ static int bnx2x_init_common(struct bnx2x *bp)
5518 msleep(30); 5527 msleep(30);
5519 REG_WR(bp, MISC_REG_LCPLL_CTRL_REG_2, 0x0); 5528 REG_WR(bp, MISC_REG_LCPLL_CTRL_REG_2, 0x0);
5520 5529
5521 bnx2x_init_block(bp, PXP_COMMON_START, PXP_COMMON_END); 5530 bnx2x_init_block(bp, PXP_BLOCK, COMMON_STAGE);
5522 if (CHIP_IS_E1(bp)) { 5531 if (CHIP_IS_E1(bp)) {
5523 /* enable HW interrupt from PXP on USDM overflow 5532 /* enable HW interrupt from PXP on USDM overflow
5524 bit 16 on INT_MASK_0 */ 5533 bit 16 on INT_MASK_0 */
5525 REG_WR(bp, PXP_REG_PXP_INT_MASK_0, 0); 5534 REG_WR(bp, PXP_REG_PXP_INT_MASK_0, 0);
5526 } 5535 }
5527 5536
5528 bnx2x_init_block(bp, PXP2_COMMON_START, PXP2_COMMON_END); 5537 bnx2x_init_block(bp, PXP2_BLOCK, COMMON_STAGE);
5529 bnx2x_init_pxp(bp); 5538 bnx2x_init_pxp(bp);
5530 5539
5531#ifdef __BIG_ENDIAN 5540#ifdef __BIG_ENDIAN
@@ -5571,60 +5580,60 @@ static int bnx2x_init_common(struct bnx2x *bp)
5571 REG_WR(bp, PXP2_REG_RQ_DISABLE_INPUTS, 0); 5580 REG_WR(bp, PXP2_REG_RQ_DISABLE_INPUTS, 0);
5572 REG_WR(bp, PXP2_REG_RD_DISABLE_INPUTS, 0); 5581 REG_WR(bp, PXP2_REG_RD_DISABLE_INPUTS, 0);
5573 5582
5574 bnx2x_init_block(bp, DMAE_COMMON_START, DMAE_COMMON_END); 5583 bnx2x_init_block(bp, DMAE_BLOCK, COMMON_STAGE);
5575 5584
5576 /* clean the DMAE memory */ 5585 /* clean the DMAE memory */
5577 bp->dmae_ready = 1; 5586 bp->dmae_ready = 1;
5578 bnx2x_init_fill(bp, TSEM_REG_PRAM, 0, 8); 5587 bnx2x_init_fill(bp, TSEM_REG_PRAM, 0, 8);
5579 5588
5580 bnx2x_init_block(bp, TCM_COMMON_START, TCM_COMMON_END); 5589 bnx2x_init_block(bp, TCM_BLOCK, COMMON_STAGE);
5581 bnx2x_init_block(bp, UCM_COMMON_START, UCM_COMMON_END); 5590 bnx2x_init_block(bp, UCM_BLOCK, COMMON_STAGE);
5582 bnx2x_init_block(bp, CCM_COMMON_START, CCM_COMMON_END); 5591 bnx2x_init_block(bp, CCM_BLOCK, COMMON_STAGE);
5583 bnx2x_init_block(bp, XCM_COMMON_START, XCM_COMMON_END); 5592 bnx2x_init_block(bp, XCM_BLOCK, COMMON_STAGE);
5584 5593
5585 bnx2x_read_dmae(bp, XSEM_REG_PASSIVE_BUFFER, 3); 5594 bnx2x_read_dmae(bp, XSEM_REG_PASSIVE_BUFFER, 3);
5586 bnx2x_read_dmae(bp, CSEM_REG_PASSIVE_BUFFER, 3); 5595 bnx2x_read_dmae(bp, CSEM_REG_PASSIVE_BUFFER, 3);
5587 bnx2x_read_dmae(bp, TSEM_REG_PASSIVE_BUFFER, 3); 5596 bnx2x_read_dmae(bp, TSEM_REG_PASSIVE_BUFFER, 3);
5588 bnx2x_read_dmae(bp, USEM_REG_PASSIVE_BUFFER, 3); 5597 bnx2x_read_dmae(bp, USEM_REG_PASSIVE_BUFFER, 3);
5589 5598
5590 bnx2x_init_block(bp, QM_COMMON_START, QM_COMMON_END); 5599 bnx2x_init_block(bp, QM_BLOCK, COMMON_STAGE);
5591 /* soft reset pulse */ 5600 /* soft reset pulse */
5592 REG_WR(bp, QM_REG_SOFT_RESET, 1); 5601 REG_WR(bp, QM_REG_SOFT_RESET, 1);
5593 REG_WR(bp, QM_REG_SOFT_RESET, 0); 5602 REG_WR(bp, QM_REG_SOFT_RESET, 0);
5594 5603
5595#ifdef BCM_ISCSI 5604#ifdef BCM_ISCSI
5596 bnx2x_init_block(bp, TIMERS_COMMON_START, TIMERS_COMMON_END); 5605 bnx2x_init_block(bp, TIMERS_BLOCK, COMMON_STAGE);
5597#endif 5606#endif
5598 5607
5599 bnx2x_init_block(bp, DQ_COMMON_START, DQ_COMMON_END); 5608 bnx2x_init_block(bp, DQ_BLOCK, COMMON_STAGE);
5600 REG_WR(bp, DORQ_REG_DPM_CID_OFST, BCM_PAGE_SHIFT); 5609 REG_WR(bp, DORQ_REG_DPM_CID_OFST, BCM_PAGE_SHIFT);
5601 if (!CHIP_REV_IS_SLOW(bp)) { 5610 if (!CHIP_REV_IS_SLOW(bp)) {
5602 /* enable hw interrupt from doorbell Q */ 5611 /* enable hw interrupt from doorbell Q */
5603 REG_WR(bp, DORQ_REG_DORQ_INT_MASK, 0); 5612 REG_WR(bp, DORQ_REG_DORQ_INT_MASK, 0);
5604 } 5613 }
5605 5614
5606 bnx2x_init_block(bp, BRB1_COMMON_START, BRB1_COMMON_END); 5615 bnx2x_init_block(bp, BRB1_BLOCK, COMMON_STAGE);
5607 bnx2x_init_block(bp, PRS_COMMON_START, PRS_COMMON_END); 5616 bnx2x_init_block(bp, PRS_BLOCK, COMMON_STAGE);
5608 REG_WR(bp, PRS_REG_A_PRSU_20, 0xf); 5617 REG_WR(bp, PRS_REG_A_PRSU_20, 0xf);
5609 /* set NIC mode */ 5618 /* set NIC mode */
5610 REG_WR(bp, PRS_REG_NIC_MODE, 1); 5619 REG_WR(bp, PRS_REG_NIC_MODE, 1);
5611 if (CHIP_IS_E1H(bp)) 5620 if (CHIP_IS_E1H(bp))
5612 REG_WR(bp, PRS_REG_E1HOV_MODE, IS_E1HMF(bp)); 5621 REG_WR(bp, PRS_REG_E1HOV_MODE, IS_E1HMF(bp));
5613 5622
5614 bnx2x_init_block(bp, TSDM_COMMON_START, TSDM_COMMON_END); 5623 bnx2x_init_block(bp, TSDM_BLOCK, COMMON_STAGE);
5615 bnx2x_init_block(bp, CSDM_COMMON_START, CSDM_COMMON_END); 5624 bnx2x_init_block(bp, CSDM_BLOCK, COMMON_STAGE);
5616 bnx2x_init_block(bp, USDM_COMMON_START, USDM_COMMON_END); 5625 bnx2x_init_block(bp, USDM_BLOCK, COMMON_STAGE);
5617 bnx2x_init_block(bp, XSDM_COMMON_START, XSDM_COMMON_END); 5626 bnx2x_init_block(bp, XSDM_BLOCK, COMMON_STAGE);
5618 5627
5619 bnx2x_init_fill(bp, TSTORM_INTMEM_ADDR, 0, STORM_INTMEM_SIZE(bp)); 5628 bnx2x_init_fill(bp, TSTORM_INTMEM_ADDR, 0, STORM_INTMEM_SIZE(bp));
5620 bnx2x_init_fill(bp, USTORM_INTMEM_ADDR, 0, STORM_INTMEM_SIZE(bp)); 5629 bnx2x_init_fill(bp, USTORM_INTMEM_ADDR, 0, STORM_INTMEM_SIZE(bp));
5621 bnx2x_init_fill(bp, CSTORM_INTMEM_ADDR, 0, STORM_INTMEM_SIZE(bp)); 5630 bnx2x_init_fill(bp, CSTORM_INTMEM_ADDR, 0, STORM_INTMEM_SIZE(bp));
5622 bnx2x_init_fill(bp, XSTORM_INTMEM_ADDR, 0, STORM_INTMEM_SIZE(bp)); 5631 bnx2x_init_fill(bp, XSTORM_INTMEM_ADDR, 0, STORM_INTMEM_SIZE(bp));
5623 5632
5624 bnx2x_init_block(bp, TSEM_COMMON_START, TSEM_COMMON_END); 5633 bnx2x_init_block(bp, TSEM_BLOCK, COMMON_STAGE);
5625 bnx2x_init_block(bp, USEM_COMMON_START, USEM_COMMON_END); 5634 bnx2x_init_block(bp, USEM_BLOCK, COMMON_STAGE);
5626 bnx2x_init_block(bp, CSEM_COMMON_START, CSEM_COMMON_END); 5635 bnx2x_init_block(bp, CSEM_BLOCK, COMMON_STAGE);
5627 bnx2x_init_block(bp, XSEM_COMMON_START, XSEM_COMMON_END); 5636 bnx2x_init_block(bp, XSEM_BLOCK, COMMON_STAGE);
5628 5637
5629 /* sync semi rtc */ 5638 /* sync semi rtc */
5630 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR, 5639 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR,
@@ -5632,16 +5641,16 @@ static int bnx2x_init_common(struct bnx2x *bp)
5632 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 5641 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET,
5633 0x80000000); 5642 0x80000000);
5634 5643
5635 bnx2x_init_block(bp, UPB_COMMON_START, UPB_COMMON_END); 5644 bnx2x_init_block(bp, UPB_BLOCK, COMMON_STAGE);
5636 bnx2x_init_block(bp, XPB_COMMON_START, XPB_COMMON_END); 5645 bnx2x_init_block(bp, XPB_BLOCK, COMMON_STAGE);
5637 bnx2x_init_block(bp, PBF_COMMON_START, PBF_COMMON_END); 5646 bnx2x_init_block(bp, PBF_BLOCK, COMMON_STAGE);
5638 5647
5639 REG_WR(bp, SRC_REG_SOFT_RST, 1); 5648 REG_WR(bp, SRC_REG_SOFT_RST, 1);
5640 for (i = SRC_REG_KEYRSS0_0; i <= SRC_REG_KEYRSS1_9; i += 4) { 5649 for (i = SRC_REG_KEYRSS0_0; i <= SRC_REG_KEYRSS1_9; i += 4) {
5641 REG_WR(bp, i, 0xc0cac01a); 5650 REG_WR(bp, i, 0xc0cac01a);
5642 /* TODO: replace with something meaningful */ 5651 /* TODO: replace with something meaningful */
5643 } 5652 }
5644 bnx2x_init_block(bp, SRCH_COMMON_START, SRCH_COMMON_END); 5653 bnx2x_init_block(bp, SRCH_BLOCK, COMMON_STAGE);
5645 REG_WR(bp, SRC_REG_SOFT_RST, 0); 5654 REG_WR(bp, SRC_REG_SOFT_RST, 0);
5646 5655
5647 if (sizeof(union cdu_context) != 1024) 5656 if (sizeof(union cdu_context) != 1024)
@@ -5649,7 +5658,7 @@ static int bnx2x_init_common(struct bnx2x *bp)
5649 printk(KERN_ALERT PFX "please adjust the size of" 5658 printk(KERN_ALERT PFX "please adjust the size of"
5650 " cdu_context(%ld)\n", (long)sizeof(union cdu_context)); 5659 " cdu_context(%ld)\n", (long)sizeof(union cdu_context));
5651 5660
5652 bnx2x_init_block(bp, CDU_COMMON_START, CDU_COMMON_END); 5661 bnx2x_init_block(bp, CDU_BLOCK, COMMON_STAGE);
5653 val = (4 << 24) + (0 << 12) + 1024; 5662 val = (4 << 24) + (0 << 12) + 1024;
5654 REG_WR(bp, CDU_REG_CDU_GLOBAL_PARAMS, val); 5663 REG_WR(bp, CDU_REG_CDU_GLOBAL_PARAMS, val);
5655 if (CHIP_IS_E1(bp)) { 5664 if (CHIP_IS_E1(bp)) {
@@ -5658,7 +5667,7 @@ static int bnx2x_init_common(struct bnx2x *bp)
5658 REG_WR(bp, CDU_REG_CDU_DEBUG, 0); 5667 REG_WR(bp, CDU_REG_CDU_DEBUG, 0);
5659 } 5668 }
5660 5669
5661 bnx2x_init_block(bp, CFC_COMMON_START, CFC_COMMON_END); 5670 bnx2x_init_block(bp, CFC_BLOCK, COMMON_STAGE);
5662 REG_WR(bp, CFC_REG_INIT_REG, 0x7FF); 5671 REG_WR(bp, CFC_REG_INIT_REG, 0x7FF);
5663 /* enable context validation interrupt from CFC */ 5672 /* enable context validation interrupt from CFC */
5664 REG_WR(bp, CFC_REG_CFC_INT_MASK, 0); 5673 REG_WR(bp, CFC_REG_CFC_INT_MASK, 0);
@@ -5666,20 +5675,25 @@ static int bnx2x_init_common(struct bnx2x *bp)
5666 /* set the thresholds to prevent CFC/CDU race */ 5675 /* set the thresholds to prevent CFC/CDU race */
5667 REG_WR(bp, CFC_REG_DEBUG0, 0x20020000); 5676 REG_WR(bp, CFC_REG_DEBUG0, 0x20020000);
5668 5677
5669 bnx2x_init_block(bp, HC_COMMON_START, HC_COMMON_END); 5678 bnx2x_init_block(bp, HC_BLOCK, COMMON_STAGE);
5670 bnx2x_init_block(bp, MISC_AEU_COMMON_START, MISC_AEU_COMMON_END); 5679 bnx2x_init_block(bp, MISC_AEU_BLOCK, COMMON_STAGE);
5671 5680
5672 /* PXPCS COMMON comes here */ 5681 /* PXPCS COMMON comes here */
5682 bnx2x_init_block(bp, PXPCS_BLOCK, COMMON_STAGE);
5673 /* Reset PCIE errors for debug */ 5683 /* Reset PCIE errors for debug */
5674 REG_WR(bp, 0x2814, 0xffffffff); 5684 REG_WR(bp, 0x2814, 0xffffffff);
5675 REG_WR(bp, 0x3820, 0xffffffff); 5685 REG_WR(bp, 0x3820, 0xffffffff);
5676 5686
5677 /* EMAC0 COMMON comes here */ 5687 /* EMAC0 COMMON comes here */
5688 bnx2x_init_block(bp, EMAC0_BLOCK, COMMON_STAGE);
5678 /* EMAC1 COMMON comes here */ 5689 /* EMAC1 COMMON comes here */
5690 bnx2x_init_block(bp, EMAC1_BLOCK, COMMON_STAGE);
5679 /* DBU COMMON comes here */ 5691 /* DBU COMMON comes here */
5692 bnx2x_init_block(bp, DBU_BLOCK, COMMON_STAGE);
5680 /* DBG COMMON comes here */ 5693 /* DBG COMMON comes here */
5694 bnx2x_init_block(bp, DBG_BLOCK, COMMON_STAGE);
5681 5695
5682 bnx2x_init_block(bp, NIG_COMMON_START, NIG_COMMON_END); 5696 bnx2x_init_block(bp, NIG_BLOCK, COMMON_STAGE);
5683 if (CHIP_IS_E1H(bp)) { 5697 if (CHIP_IS_E1H(bp)) {
5684 REG_WR(bp, NIG_REG_LLH_MF_MODE, IS_E1HMF(bp)); 5698 REG_WR(bp, NIG_REG_LLH_MF_MODE, IS_E1HMF(bp));
5685 REG_WR(bp, NIG_REG_LLH_E1HOV_MODE, IS_E1HMF(bp)); 5699 REG_WR(bp, NIG_REG_LLH_E1HOV_MODE, IS_E1HMF(bp));
@@ -5763,6 +5777,7 @@ static int bnx2x_init_common(struct bnx2x *bp)
5763static int bnx2x_init_port(struct bnx2x *bp) 5777static int bnx2x_init_port(struct bnx2x *bp)
5764{ 5778{
5765 int port = BP_PORT(bp); 5779 int port = BP_PORT(bp);
5780 int init_stage = port ? PORT1_STAGE : PORT0_STAGE;
5766 u32 low, high; 5781 u32 low, high;
5767 u32 val; 5782 u32 val;
5768 5783
@@ -5771,7 +5786,9 @@ static int bnx2x_init_port(struct bnx2x *bp)
5771 REG_WR(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, 0); 5786 REG_WR(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, 0);
5772 5787
5773 /* Port PXP comes here */ 5788 /* Port PXP comes here */
5789 bnx2x_init_block(bp, PXP_BLOCK, init_stage);
5774 /* Port PXP2 comes here */ 5790 /* Port PXP2 comes here */
5791 bnx2x_init_block(bp, PXP2_BLOCK, init_stage);
5775#ifdef BCM_ISCSI 5792#ifdef BCM_ISCSI
5776 /* Port0 1 5793 /* Port0 1
5777 * Port1 385 */ 5794 * Port1 385 */
@@ -5798,21 +5815,19 @@ static int bnx2x_init_port(struct bnx2x *bp)
5798 REG_WR(bp, PXP2_REG_PSWRQ_SRC0_L2P + func*4, PXP_ONE_ILT(i)); 5815 REG_WR(bp, PXP2_REG_PSWRQ_SRC0_L2P + func*4, PXP_ONE_ILT(i));
5799#endif 5816#endif
5800 /* Port CMs come here */ 5817 /* Port CMs come here */
5801 bnx2x_init_block(bp, (port ? XCM_PORT1_START : XCM_PORT0_START), 5818 bnx2x_init_block(bp, XCM_BLOCK, init_stage);
5802 (port ? XCM_PORT1_END : XCM_PORT0_END));
5803 5819
5804 /* Port QM comes here */ 5820 /* Port QM comes here */
5805#ifdef BCM_ISCSI 5821#ifdef BCM_ISCSI
5806 REG_WR(bp, TM_REG_LIN0_SCAN_TIME + func*4, 1024/64*20); 5822 REG_WR(bp, TM_REG_LIN0_SCAN_TIME + func*4, 1024/64*20);
5807 REG_WR(bp, TM_REG_LIN0_MAX_ACTIVE_CID + func*4, 31); 5823 REG_WR(bp, TM_REG_LIN0_MAX_ACTIVE_CID + func*4, 31);
5808 5824
5809 bnx2x_init_block(bp, func ? TIMERS_PORT1_START : TIMERS_PORT0_START, 5825 bnx2x_init_block(bp, TIMERS_BLOCK, init_stage);
5810 func ? TIMERS_PORT1_END : TIMERS_PORT0_END);
5811#endif 5826#endif
5812 /* Port DQ comes here */ 5827 /* Port DQ comes here */
5828 bnx2x_init_block(bp, DQ_BLOCK, init_stage);
5813 5829
5814 bnx2x_init_block(bp, (port ? BRB1_PORT1_START : BRB1_PORT0_START), 5830 bnx2x_init_block(bp, BRB1_BLOCK, init_stage);
5815 (port ? BRB1_PORT1_END : BRB1_PORT0_END));
5816 if (CHIP_REV_IS_SLOW(bp) && !CHIP_IS_E1H(bp)) { 5831 if (CHIP_REV_IS_SLOW(bp) && !CHIP_IS_E1H(bp)) {
5817 /* no pause for emulation and FPGA */ 5832 /* no pause for emulation and FPGA */
5818 low = 0; 5833 low = 0;
@@ -5837,25 +5852,27 @@ static int bnx2x_init_port(struct bnx2x *bp)
5837 5852
5838 5853
5839 /* Port PRS comes here */ 5854 /* Port PRS comes here */
5855 bnx2x_init_block(bp, PRS_BLOCK, init_stage);
5840 /* Port TSDM comes here */ 5856 /* Port TSDM comes here */
5857 bnx2x_init_block(bp, TSDM_BLOCK, init_stage);
5841 /* Port CSDM comes here */ 5858 /* Port CSDM comes here */
5859 bnx2x_init_block(bp, CSDM_BLOCK, init_stage);
5842 /* Port USDM comes here */ 5860 /* Port USDM comes here */
5861 bnx2x_init_block(bp, USDM_BLOCK, init_stage);
5843 /* Port XSDM comes here */ 5862 /* Port XSDM comes here */
5863 bnx2x_init_block(bp, XSDM_BLOCK, init_stage);
5844 5864
5845 bnx2x_init_block(bp, port ? TSEM_PORT1_START : TSEM_PORT0_START, 5865 bnx2x_init_block(bp, TSEM_BLOCK, init_stage);
5846 port ? TSEM_PORT1_END : TSEM_PORT0_END); 5866 bnx2x_init_block(bp, USEM_BLOCK, init_stage);
5847 bnx2x_init_block(bp, port ? USEM_PORT1_START : USEM_PORT0_START, 5867 bnx2x_init_block(bp, CSEM_BLOCK, init_stage);
5848 port ? USEM_PORT1_END : USEM_PORT0_END); 5868 bnx2x_init_block(bp, XSEM_BLOCK, init_stage);
5849 bnx2x_init_block(bp, port ? CSEM_PORT1_START : CSEM_PORT0_START,
5850 port ? CSEM_PORT1_END : CSEM_PORT0_END);
5851 bnx2x_init_block(bp, port ? XSEM_PORT1_START : XSEM_PORT0_START,
5852 port ? XSEM_PORT1_END : XSEM_PORT0_END);
5853 5869
5854 /* Port UPB comes here */ 5870 /* Port UPB comes here */
5871 bnx2x_init_block(bp, UPB_BLOCK, init_stage);
5855 /* Port XPB comes here */ 5872 /* Port XPB comes here */
5873 bnx2x_init_block(bp, XPB_BLOCK, init_stage);
5856 5874
5857 bnx2x_init_block(bp, port ? PBF_PORT1_START : PBF_PORT0_START, 5875 bnx2x_init_block(bp, PBF_BLOCK, init_stage);
5858 port ? PBF_PORT1_END : PBF_PORT0_END);
5859 5876
5860 /* configure PBF to work without PAUSE mtu 9000 */ 5877 /* configure PBF to work without PAUSE mtu 9000 */
5861 REG_WR(bp, PBF_REG_P0_PAUSE_ENABLE + port*4, 0); 5878 REG_WR(bp, PBF_REG_P0_PAUSE_ENABLE + port*4, 0);
@@ -5885,18 +5902,17 @@ static int bnx2x_init_port(struct bnx2x *bp)
5885 /* Port SRCH comes here */ 5902 /* Port SRCH comes here */
5886#endif 5903#endif
5887 /* Port CDU comes here */ 5904 /* Port CDU comes here */
5905 bnx2x_init_block(bp, CDU_BLOCK, init_stage);
5888 /* Port CFC comes here */ 5906 /* Port CFC comes here */
5907 bnx2x_init_block(bp, CFC_BLOCK, init_stage);
5889 5908
5890 if (CHIP_IS_E1(bp)) { 5909 if (CHIP_IS_E1(bp)) {
5891 REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, 0); 5910 REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, 0);
5892 REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, 0); 5911 REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, 0);
5893 } 5912 }
5894 bnx2x_init_block(bp, port ? HC_PORT1_START : HC_PORT0_START, 5913 bnx2x_init_block(bp, HC_BLOCK, init_stage);
5895 port ? HC_PORT1_END : HC_PORT0_END);
5896 5914
5897 bnx2x_init_block(bp, port ? MISC_AEU_PORT1_START : 5915 bnx2x_init_block(bp, MISC_AEU_BLOCK, init_stage);
5898 MISC_AEU_PORT0_START,
5899 port ? MISC_AEU_PORT1_END : MISC_AEU_PORT0_END);
5900 /* init aeu_mask_attn_func_0/1: 5916 /* init aeu_mask_attn_func_0/1:
5901 * - SF mode: bits 3-7 are masked. only bits 0-2 are in use 5917 * - SF mode: bits 3-7 are masked. only bits 0-2 are in use
5902 * - MF mode: bit 3 is masked. bits 0-2 are in use as in SF 5918 * - MF mode: bit 3 is masked. bits 0-2 are in use as in SF
@@ -5905,13 +5921,17 @@ static int bnx2x_init_port(struct bnx2x *bp)
5905 (IS_E1HMF(bp) ? 0xF7 : 0x7)); 5921 (IS_E1HMF(bp) ? 0xF7 : 0x7));
5906 5922
5907 /* Port PXPCS comes here */ 5923 /* Port PXPCS comes here */
5924 bnx2x_init_block(bp, PXPCS_BLOCK, init_stage);
5908 /* Port EMAC0 comes here */ 5925 /* Port EMAC0 comes here */
5926 bnx2x_init_block(bp, EMAC0_BLOCK, init_stage);
5909 /* Port EMAC1 comes here */ 5927 /* Port EMAC1 comes here */
5928 bnx2x_init_block(bp, EMAC1_BLOCK, init_stage);
5910 /* Port DBU comes here */ 5929 /* Port DBU comes here */
5930 bnx2x_init_block(bp, DBU_BLOCK, init_stage);
5911 /* Port DBG comes here */ 5931 /* Port DBG comes here */
5932 bnx2x_init_block(bp, DBG_BLOCK, init_stage);
5912 5933
5913 bnx2x_init_block(bp, port ? NIG_PORT1_START : NIG_PORT0_START, 5934 bnx2x_init_block(bp, NIG_BLOCK, init_stage);
5914 port ? NIG_PORT1_END : NIG_PORT0_END);
5915 5935
5916 REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1); 5936 REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1);
5917 5937
@@ -5931,7 +5951,9 @@ static int bnx2x_init_port(struct bnx2x *bp)
5931 } 5951 }
5932 5952
5933 /* Port MCP comes here */ 5953 /* Port MCP comes here */
5954 bnx2x_init_block(bp, MCP_BLOCK, init_stage);
5934 /* Port DMAE comes here */ 5955 /* Port DMAE comes here */
5956 bnx2x_init_block(bp, DMAE_BLOCK, init_stage);
5935 5957
5936 switch (XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config)) { 5958 switch (XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config)) {
5937 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726: 5959 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726:
@@ -6036,7 +6058,7 @@ static int bnx2x_init_func(struct bnx2x *bp)
6036 if (CHIP_IS_E1H(bp)) { 6058 if (CHIP_IS_E1H(bp)) {
6037 for (i = 0; i < 9; i++) 6059 for (i = 0; i < 9; i++)
6038 bnx2x_init_block(bp, 6060 bnx2x_init_block(bp,
6039 cm_start[func][i], cm_end[func][i]); 6061 cm_blocks[i], FUNC0_STAGE + func);
6040 6062
6041 REG_WR(bp, NIG_REG_LLH0_FUNC_EN + port*8, 1); 6063 REG_WR(bp, NIG_REG_LLH0_FUNC_EN + port*8, 1);
6042 REG_WR(bp, NIG_REG_LLH0_FUNC_VLAN_ID + port*8, bp->e1hov); 6064 REG_WR(bp, NIG_REG_LLH0_FUNC_VLAN_ID + port*8, bp->e1hov);
@@ -6049,7 +6071,7 @@ static int bnx2x_init_func(struct bnx2x *bp)
6049 REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, 0); 6071 REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, 0);
6050 REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, 0); 6072 REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, 0);
6051 } 6073 }
6052 bnx2x_init_block(bp, hc_limits[func][0], hc_limits[func][1]); 6074 bnx2x_init_block(bp, HC_BLOCK, FUNC0_STAGE + func);
6053 6075
6054 /* Reset PCIE errors for debug */ 6076 /* Reset PCIE errors for debug */
6055 REG_WR(bp, 0x2114, 0xffffffff); 6077 REG_WR(bp, 0x2114, 0xffffffff);
@@ -10595,7 +10617,6 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
10595 mmiowb(); 10617 mmiowb();
10596 10618
10597 fp->tx_bd_prod += nbd; 10619 fp->tx_bd_prod += nbd;
10598 dev->trans_start = jiffies;
10599 10620
10600 if (unlikely(bnx2x_tx_avail(fp) < MAX_SKB_FRAGS + 3)) { 10621 if (unlikely(bnx2x_tx_avail(fp) < MAX_SKB_FRAGS + 3)) {
10601 /* We want bnx2x_tx_int to "see" the updated tx_bd_prod 10622 /* We want bnx2x_tx_int to "see" the updated tx_bd_prod
@@ -11082,6 +11103,190 @@ static int __devinit bnx2x_get_pcie_speed(struct bnx2x *bp)
11082 val = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT; 11103 val = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT;
11083 return val; 11104 return val;
11084} 11105}
11106static int __devinit bnx2x_check_firmware(struct bnx2x *bp)
11107{
11108 struct bnx2x_fw_file_hdr *fw_hdr;
11109 struct bnx2x_fw_file_section *sections;
11110 u16 *ops_offsets;
11111 u32 offset, len, num_ops;
11112 int i;
11113 const struct firmware *firmware = bp->firmware;
11114 const u8 * fw_ver;
11115
11116 if (firmware->size < sizeof(struct bnx2x_fw_file_hdr))
11117 return -EINVAL;
11118
11119 fw_hdr = (struct bnx2x_fw_file_hdr *)firmware->data;
11120 sections = (struct bnx2x_fw_file_section *)fw_hdr;
11121
11122 /* Make sure none of the offsets and sizes make us read beyond
11123 * the end of the firmware data */
11124 for (i = 0; i < sizeof(*fw_hdr) / sizeof(*sections); i++) {
11125 offset = be32_to_cpu(sections[i].offset);
11126 len = be32_to_cpu(sections[i].len);
11127 if (offset + len > firmware->size) {
11128 printk(KERN_ERR PFX "Section %d length is out of bounds\n", i);
11129 return -EINVAL;
11130 }
11131 }
11132
11133 /* Likewise for the init_ops offsets */
11134 offset = be32_to_cpu(fw_hdr->init_ops_offsets.offset);
11135 ops_offsets = (u16 *)(firmware->data + offset);
11136 num_ops = be32_to_cpu(fw_hdr->init_ops.len) / sizeof(struct raw_op);
11137
11138 for (i = 0; i < be32_to_cpu(fw_hdr->init_ops_offsets.len) / 2; i++) {
11139 if (be16_to_cpu(ops_offsets[i]) > num_ops) {
11140 printk(KERN_ERR PFX "Section offset %d is out of bounds\n", i);
11141 return -EINVAL;
11142 }
11143 }
11144
11145 /* Check FW version */
11146 offset = be32_to_cpu(fw_hdr->fw_version.offset);
11147 fw_ver = firmware->data + offset;
11148 if ((fw_ver[0] != BCM_5710_FW_MAJOR_VERSION) ||
11149 (fw_ver[1] != BCM_5710_FW_MINOR_VERSION) ||
11150 (fw_ver[2] != BCM_5710_FW_REVISION_VERSION) ||
11151 (fw_ver[3] != BCM_5710_FW_ENGINEERING_VERSION)) {
11152 printk(KERN_ERR PFX "Bad FW version:%d.%d.%d.%d."
11153 " Should be %d.%d.%d.%d\n",
11154 fw_ver[0], fw_ver[1], fw_ver[2],
11155 fw_ver[3], BCM_5710_FW_MAJOR_VERSION,
11156 BCM_5710_FW_MINOR_VERSION,
11157 BCM_5710_FW_REVISION_VERSION,
11158 BCM_5710_FW_ENGINEERING_VERSION);
11159 return -EINVAL;
11160 }
11161
11162 return 0;
11163}
11164
11165static void inline be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n)
11166{
11167 u32 i;
11168 const __be32 *source = (const __be32*)_source;
11169 u32 *target = (u32*)_target;
11170
11171 for (i = 0; i < n/4; i++)
11172 target[i] = be32_to_cpu(source[i]);
11173}
11174
11175/*
11176 Ops array is stored in the following format:
11177 {op(8bit), offset(24bit, big endian), data(32bit, big endian)}
11178 */
11179static void inline bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n)
11180{
11181 u32 i, j, tmp;
11182 const __be32 *source = (const __be32*)_source;
11183 struct raw_op *target = (struct raw_op*)_target;
11184
11185 for (i = 0, j = 0; i < n/8; i++, j+=2) {
11186 tmp = be32_to_cpu(source[j]);
11187 target[i].op = (tmp >> 24) & 0xff;
11188 target[i].offset = tmp & 0xffffff;
11189 target[i].raw_data = be32_to_cpu(source[j+1]);
11190 }
11191}
11192static void inline be16_to_cpu_n(const u8 *_source, u8 *_target, u32 n)
11193{
11194 u32 i;
11195 u16 *target = (u16*)_target;
11196 const __be16 *source = (const __be16*)_source;
11197
11198 for (i = 0; i < n/2; i++)
11199 target[i] = be16_to_cpu(source[i]);
11200}
11201
11202#define BNX2X_ALLOC_AND_SET(arr, lbl, func) \
11203 do { \
11204 u32 len = be32_to_cpu(fw_hdr->arr.len); \
11205 bp->arr = kmalloc(len, GFP_KERNEL); \
11206 if (!bp->arr) { \
11207 printk(KERN_ERR PFX "Failed to allocate %d bytes for "#arr"\n", len); \
11208 goto lbl; \
11209 } \
11210 func(bp->firmware->data + \
11211 be32_to_cpu(fw_hdr->arr.offset), \
11212 (u8*)bp->arr, len); \
11213 } while (0)
11214
11215
11216static int __devinit bnx2x_init_firmware(struct bnx2x *bp, struct device *dev)
11217{
11218 char fw_file_name[40] = {0};
11219 int rc, offset;
11220 struct bnx2x_fw_file_hdr *fw_hdr;
11221
11222 /* Create a FW file name */
11223 if (CHIP_IS_E1(bp))
11224 offset = sprintf(fw_file_name, FW_FILE_PREFIX_E1);
11225 else
11226 offset = sprintf(fw_file_name, FW_FILE_PREFIX_E1H);
11227
11228 sprintf(fw_file_name + offset, "%d.%d.%d.%d.fw",
11229 BCM_5710_FW_MAJOR_VERSION,
11230 BCM_5710_FW_MINOR_VERSION,
11231 BCM_5710_FW_REVISION_VERSION,
11232 BCM_5710_FW_ENGINEERING_VERSION);
11233
11234 printk(KERN_INFO PFX "Loading %s\n", fw_file_name);
11235
11236 rc = request_firmware(&bp->firmware, fw_file_name, dev);
11237 if (rc) {
11238 printk(KERN_ERR PFX "Can't load firmware file %s\n", fw_file_name);
11239 goto request_firmware_exit;
11240 }
11241
11242 rc = bnx2x_check_firmware(bp);
11243 if (rc) {
11244 printk(KERN_ERR PFX "Corrupt firmware file %s\n", fw_file_name);
11245 goto request_firmware_exit;
11246 }
11247
11248 fw_hdr = (struct bnx2x_fw_file_hdr *)bp->firmware->data;
11249
11250 /* Initialize the pointers to the init arrays */
11251 /* Blob */
11252 BNX2X_ALLOC_AND_SET(init_data, request_firmware_exit, be32_to_cpu_n);
11253
11254 /* Opcodes */
11255 BNX2X_ALLOC_AND_SET(init_ops, init_ops_alloc_err, bnx2x_prep_ops);
11256
11257 /* Offsets */
11258 BNX2X_ALLOC_AND_SET(init_ops_offsets, init_offsets_alloc_err, be16_to_cpu_n);
11259
11260 /* STORMs firmware */
11261 bp->tsem_int_table_data = bp->firmware->data +
11262 be32_to_cpu(fw_hdr->tsem_int_table_data.offset);
11263 bp->tsem_pram_data = bp->firmware->data +
11264 be32_to_cpu(fw_hdr->tsem_pram_data.offset);
11265 bp->usem_int_table_data = bp->firmware->data +
11266 be32_to_cpu(fw_hdr->usem_int_table_data.offset);
11267 bp->usem_pram_data = bp->firmware->data +
11268 be32_to_cpu(fw_hdr->usem_pram_data.offset);
11269 bp->xsem_int_table_data = bp->firmware->data +
11270 be32_to_cpu(fw_hdr->xsem_int_table_data.offset);
11271 bp->xsem_pram_data = bp->firmware->data +
11272 be32_to_cpu(fw_hdr->xsem_pram_data.offset);
11273 bp->csem_int_table_data = bp->firmware->data +
11274 be32_to_cpu(fw_hdr->csem_int_table_data.offset);
11275 bp->csem_pram_data = bp->firmware->data +
11276 be32_to_cpu(fw_hdr->csem_pram_data.offset);
11277
11278 return 0;
11279init_offsets_alloc_err:
11280 kfree(bp->init_ops);
11281init_ops_alloc_err:
11282 kfree(bp->init_data);
11283request_firmware_exit:
11284 release_firmware(bp->firmware);
11285
11286 return rc;
11287}
11288
11289
11085 11290
11086static int __devinit bnx2x_init_one(struct pci_dev *pdev, 11291static int __devinit bnx2x_init_one(struct pci_dev *pdev,
11087 const struct pci_device_id *ent) 11292 const struct pci_device_id *ent)
@@ -11116,6 +11321,13 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
11116 if (rc) 11321 if (rc)
11117 goto init_one_exit; 11322 goto init_one_exit;
11118 11323
11324 /* Set init arrays */
11325 rc = bnx2x_init_firmware(bp, &pdev->dev);
11326 if (rc) {
11327 printk(KERN_ERR PFX "Error loading firmware\n");
11328 goto init_one_exit;
11329 }
11330
11119 rc = register_netdev(dev); 11331 rc = register_netdev(dev);
11120 if (rc) { 11332 if (rc) {
11121 dev_err(&pdev->dev, "Cannot register net device\n"); 11333 dev_err(&pdev->dev, "Cannot register net device\n");
@@ -11163,6 +11375,11 @@ static void __devexit bnx2x_remove_one(struct pci_dev *pdev)
11163 11375
11164 unregister_netdev(dev); 11376 unregister_netdev(dev);
11165 11377
11378 kfree(bp->init_ops_offsets);
11379 kfree(bp->init_ops);
11380 kfree(bp->init_data);
11381 release_firmware(bp->firmware);
11382
11166 if (bp->regview) 11383 if (bp->regview)
11167 iounmap(bp->regview); 11384 iounmap(bp->regview);
11168 11385
@@ -11412,13 +11629,20 @@ static struct pci_driver bnx2x_pci_driver = {
11412 11629
11413static int __init bnx2x_init(void) 11630static int __init bnx2x_init(void)
11414{ 11631{
11632 int ret;
11633
11415 bnx2x_wq = create_singlethread_workqueue("bnx2x"); 11634 bnx2x_wq = create_singlethread_workqueue("bnx2x");
11416 if (bnx2x_wq == NULL) { 11635 if (bnx2x_wq == NULL) {
11417 printk(KERN_ERR PFX "Cannot create workqueue\n"); 11636 printk(KERN_ERR PFX "Cannot create workqueue\n");
11418 return -ENOMEM; 11637 return -ENOMEM;
11419 } 11638 }
11420 11639
11421 return pci_register_driver(&bnx2x_pci_driver); 11640 ret = pci_register_driver(&bnx2x_pci_driver);
11641 if (ret) {
11642 printk(KERN_ERR PFX "Cannot register driver\n");
11643 destroy_workqueue(bnx2x_wq);
11644 }
11645 return ret;
11422} 11646}
11423 11647
11424static void __exit bnx2x_cleanup(void) 11648static void __exit bnx2x_cleanup(void)
@@ -11431,3 +11655,4 @@ static void __exit bnx2x_cleanup(void)
11431module_init(bnx2x_init); 11655module_init(bnx2x_init);
11432module_exit(bnx2x_cleanup); 11656module_exit(bnx2x_cleanup);
11433 11657
11658
diff --git a/drivers/net/bonding/bond_3ad.c b/drivers/net/bonding/bond_3ad.c
index faf094abef7f..d4b570886c6e 100644
--- a/drivers/net/bonding/bond_3ad.c
+++ b/drivers/net/bonding/bond_3ad.c
@@ -1850,9 +1850,10 @@ static u16 aggregator_identifier;
1850 * Can be called only after the mac address of the bond is set. 1850 * Can be called only after the mac address of the bond is set.
1851 */ 1851 */
1852void bond_3ad_initialize(struct bonding *bond, u16 tick_resolution, int lacp_fast) 1852void bond_3ad_initialize(struct bonding *bond, u16 tick_resolution, int lacp_fast)
1853{ 1853{
1854 // check that the bond is not initialized yet 1854 // check that the bond is not initialized yet
1855 if (MAC_ADDRESS_COMPARE(&(BOND_AD_INFO(bond).system.sys_mac_addr), &(bond->dev->dev_addr))) { 1855 if (MAC_ADDRESS_COMPARE(&(BOND_AD_INFO(bond).system.sys_mac_addr),
1856 bond->dev->dev_addr)) {
1856 1857
1857 aggregator_identifier = 0; 1858 aggregator_identifier = 0;
1858 1859
diff --git a/drivers/net/bonding/bond_3ad.h b/drivers/net/bonding/bond_3ad.h
index a306230381c8..2c46a154f2c6 100644
--- a/drivers/net/bonding/bond_3ad.h
+++ b/drivers/net/bonding/bond_3ad.h
@@ -26,10 +26,10 @@
26#include <asm/byteorder.h> 26#include <asm/byteorder.h>
27#include <linux/skbuff.h> 27#include <linux/skbuff.h>
28#include <linux/netdevice.h> 28#include <linux/netdevice.h>
29#include <linux/if_ether.h>
29 30
30// General definitions 31// General definitions
31#define BOND_ETH_P_LACPDU 0x8809 32#define PKT_TYPE_LACPDU cpu_to_be16(ETH_P_SLOW)
32#define PKT_TYPE_LACPDU cpu_to_be16(BOND_ETH_P_LACPDU)
33#define AD_TIMER_INTERVAL 100 /*msec*/ 33#define AD_TIMER_INTERVAL 100 /*msec*/
34 34
35#define MULTICAST_LACPDU_ADDR {0x01, 0x80, 0xC2, 0x00, 0x00, 0x02} 35#define MULTICAST_LACPDU_ADDR {0x01, 0x80, 0xC2, 0x00, 0x00, 0x02}
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 74824028f85c..2f4329e91a4c 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -695,6 +695,18 @@ static int bond_check_dev_link(struct bonding *bond, struct net_device *slave_de
695 if (bond->params.use_carrier) 695 if (bond->params.use_carrier)
696 return netif_carrier_ok(slave_dev) ? BMSR_LSTATUS : 0; 696 return netif_carrier_ok(slave_dev) ? BMSR_LSTATUS : 0;
697 697
698 /* Try to get link status using Ethtool first. */
699 if (slave_dev->ethtool_ops) {
700 if (slave_dev->ethtool_ops->get_link) {
701 u32 link;
702
703 link = slave_dev->ethtool_ops->get_link(slave_dev);
704
705 return link ? BMSR_LSTATUS : 0;
706 }
707 }
708
709 /* Ethtool can't be used, fallback to MII ioclts. */
698 ioctl = slave_ops->ndo_do_ioctl; 710 ioctl = slave_ops->ndo_do_ioctl;
699 if (ioctl) { 711 if (ioctl) {
700 /* TODO: set pointer to correct ioctl on a per team member */ 712 /* TODO: set pointer to correct ioctl on a per team member */
@@ -721,20 +733,6 @@ static int bond_check_dev_link(struct bonding *bond, struct net_device *slave_de
721 } 733 }
722 734
723 /* 735 /*
724 * Some drivers cache ETHTOOL_GLINK for a period of time so we only
725 * attempt to get link status from it if the above MII ioctls fail.
726 */
727 if (slave_dev->ethtool_ops) {
728 if (slave_dev->ethtool_ops->get_link) {
729 u32 link;
730
731 link = slave_dev->ethtool_ops->get_link(slave_dev);
732
733 return link ? BMSR_LSTATUS : 0;
734 }
735 }
736
737 /*
738 * If reporting, report that either there's no dev->do_ioctl, 736 * If reporting, report that either there's no dev->do_ioctl,
739 * or both SIOCGMIIREG and get_link failed (meaning that we 737 * or both SIOCGMIIREG and get_link failed (meaning that we
740 * cannot report link status). If not reporting, pretend 738 * cannot report link status). If not reporting, pretend
@@ -2240,6 +2238,9 @@ static int bond_miimon_inspect(struct bonding *bond)
2240{ 2238{
2241 struct slave *slave; 2239 struct slave *slave;
2242 int i, link_state, commit = 0; 2240 int i, link_state, commit = 0;
2241 bool ignore_updelay;
2242
2243 ignore_updelay = !bond->curr_active_slave ? true : false;
2243 2244
2244 bond_for_each_slave(bond, slave, i) { 2245 bond_for_each_slave(bond, slave, i) {
2245 slave->new_link = BOND_LINK_NOCHANGE; 2246 slave->new_link = BOND_LINK_NOCHANGE;
@@ -2304,6 +2305,7 @@ static int bond_miimon_inspect(struct bonding *bond)
2304 ": %s: link status up for " 2305 ": %s: link status up for "
2305 "interface %s, enabling it in %d ms.\n", 2306 "interface %s, enabling it in %d ms.\n",
2306 bond->dev->name, slave->dev->name, 2307 bond->dev->name, slave->dev->name,
2308 ignore_updelay ? 0 :
2307 bond->params.updelay * 2309 bond->params.updelay *
2308 bond->params.miimon); 2310 bond->params.miimon);
2309 } 2311 }
@@ -2322,9 +2324,13 @@ static int bond_miimon_inspect(struct bonding *bond)
2322 continue; 2324 continue;
2323 } 2325 }
2324 2326
2327 if (ignore_updelay)
2328 slave->delay = 0;
2329
2325 if (slave->delay <= 0) { 2330 if (slave->delay <= 0) {
2326 slave->new_link = BOND_LINK_UP; 2331 slave->new_link = BOND_LINK_UP;
2327 commit++; 2332 commit++;
2333 ignore_updelay = false;
2328 continue; 2334 continue;
2329 } 2335 }
2330 2336
@@ -2399,8 +2405,7 @@ static void bond_miimon_commit(struct bonding *bond)
2399 bond_3ad_handle_link_change(slave, 2405 bond_3ad_handle_link_change(slave,
2400 BOND_LINK_DOWN); 2406 BOND_LINK_DOWN);
2401 2407
2402 if (bond->params.mode == BOND_MODE_TLB || 2408 if (bond_is_lb(bond))
2403 bond->params.mode == BOND_MODE_ALB)
2404 bond_alb_handle_link_change(bond, slave, 2409 bond_alb_handle_link_change(bond, slave,
2405 BOND_LINK_DOWN); 2410 BOND_LINK_DOWN);
2406 2411
@@ -2789,7 +2794,7 @@ void bond_loadbalance_arp_mon(struct work_struct *work)
2789 */ 2794 */
2790 bond_for_each_slave(bond, slave, i) { 2795 bond_for_each_slave(bond, slave, i) {
2791 if (slave->link != BOND_LINK_UP) { 2796 if (slave->link != BOND_LINK_UP) {
2792 if (time_before_eq(jiffies, slave->dev->trans_start + delta_in_ticks) && 2797 if (time_before_eq(jiffies, dev_trans_start(slave->dev) + delta_in_ticks) &&
2793 time_before_eq(jiffies, slave->dev->last_rx + delta_in_ticks)) { 2798 time_before_eq(jiffies, slave->dev->last_rx + delta_in_ticks)) {
2794 2799
2795 slave->link = BOND_LINK_UP; 2800 slave->link = BOND_LINK_UP;
@@ -2821,7 +2826,7 @@ void bond_loadbalance_arp_mon(struct work_struct *work)
2821 * when the source ip is 0, so don't take the link down 2826 * when the source ip is 0, so don't take the link down
2822 * if we don't know our ip yet 2827 * if we don't know our ip yet
2823 */ 2828 */
2824 if (time_after_eq(jiffies, slave->dev->trans_start + 2*delta_in_ticks) || 2829 if (time_after_eq(jiffies, dev_trans_start(slave->dev) + 2*delta_in_ticks) ||
2825 (time_after_eq(jiffies, slave->dev->last_rx + 2*delta_in_ticks))) { 2830 (time_after_eq(jiffies, slave->dev->last_rx + 2*delta_in_ticks))) {
2826 2831
2827 slave->link = BOND_LINK_DOWN; 2832 slave->link = BOND_LINK_DOWN;
@@ -2932,7 +2937,7 @@ static int bond_ab_arp_inspect(struct bonding *bond, int delta_in_ticks)
2932 * the bond has an IP address) 2937 * the bond has an IP address)
2933 */ 2938 */
2934 if ((slave->state == BOND_STATE_ACTIVE) && 2939 if ((slave->state == BOND_STATE_ACTIVE) &&
2935 (time_after_eq(jiffies, slave->dev->trans_start + 2940 (time_after_eq(jiffies, dev_trans_start(slave->dev) +
2936 2 * delta_in_ticks) || 2941 2 * delta_in_ticks) ||
2937 (time_after_eq(jiffies, slave_last_rx(bond, slave) 2942 (time_after_eq(jiffies, slave_last_rx(bond, slave)
2938 + 2 * delta_in_ticks)))) { 2943 + 2 * delta_in_ticks)))) {
@@ -2976,7 +2981,7 @@ static void bond_ab_arp_commit(struct bonding *bond, int delta_in_ticks)
2976 write_lock_bh(&bond->curr_slave_lock); 2981 write_lock_bh(&bond->curr_slave_lock);
2977 2982
2978 if (!bond->curr_active_slave && 2983 if (!bond->curr_active_slave &&
2979 time_before_eq(jiffies, slave->dev->trans_start + 2984 time_before_eq(jiffies, dev_trans_start(slave->dev) +
2980 delta_in_ticks)) { 2985 delta_in_ticks)) {
2981 slave->link = BOND_LINK_UP; 2986 slave->link = BOND_LINK_UP;
2982 bond_change_active_slave(bond, slave); 2987 bond_change_active_slave(bond, slave);
@@ -3453,8 +3458,28 @@ static void bond_destroy_proc_dir(void)
3453 bond_proc_dir = NULL; 3458 bond_proc_dir = NULL;
3454 } 3459 }
3455} 3460}
3461
3462#else /* !CONFIG_PROC_FS */
3463
3464static int bond_create_proc_entry(struct bonding *bond)
3465{
3466}
3467
3468static void bond_remove_proc_entry(struct bonding *bond)
3469{
3470}
3471
3472static void bond_create_proc_dir(void)
3473{
3474}
3475
3476static void bond_destroy_proc_dir(void)
3477{
3478}
3479
3456#endif /* CONFIG_PROC_FS */ 3480#endif /* CONFIG_PROC_FS */
3457 3481
3482
3458/*-------------------------- netdev event handling --------------------------*/ 3483/*-------------------------- netdev event handling --------------------------*/
3459 3484
3460/* 3485/*
@@ -3462,10 +3487,8 @@ static void bond_destroy_proc_dir(void)
3462 */ 3487 */
3463static int bond_event_changename(struct bonding *bond) 3488static int bond_event_changename(struct bonding *bond)
3464{ 3489{
3465#ifdef CONFIG_PROC_FS
3466 bond_remove_proc_entry(bond); 3490 bond_remove_proc_entry(bond);
3467 bond_create_proc_entry(bond); 3491 bond_create_proc_entry(bond);
3468#endif
3469 down_write(&(bonding_rwsem)); 3492 down_write(&(bonding_rwsem));
3470 bond_destroy_sysfs_entry(bond); 3493 bond_destroy_sysfs_entry(bond);
3471 bond_create_sysfs_entry(bond); 3494 bond_create_sysfs_entry(bond);
@@ -4631,9 +4654,7 @@ static int bond_init(struct net_device *bond_dev, struct bond_params *params)
4631 NETIF_F_HW_VLAN_RX | 4654 NETIF_F_HW_VLAN_RX |
4632 NETIF_F_HW_VLAN_FILTER); 4655 NETIF_F_HW_VLAN_FILTER);
4633 4656
4634#ifdef CONFIG_PROC_FS
4635 bond_create_proc_entry(bond); 4657 bond_create_proc_entry(bond);
4636#endif
4637 list_add_tail(&bond->bond_list, &bond_dev_list); 4658 list_add_tail(&bond->bond_list, &bond_dev_list);
4638 4659
4639 return 0; 4660 return 0;
@@ -4671,9 +4692,7 @@ static void bond_deinit(struct net_device *bond_dev)
4671 4692
4672 bond_work_cancel_all(bond); 4693 bond_work_cancel_all(bond);
4673 4694
4674#ifdef CONFIG_PROC_FS
4675 bond_remove_proc_entry(bond); 4695 bond_remove_proc_entry(bond);
4676#endif
4677} 4696}
4678 4697
4679/* Unregister and free all bond devices. 4698/* Unregister and free all bond devices.
@@ -4692,9 +4711,7 @@ static void bond_free_all(void)
4692 bond_destroy(bond); 4711 bond_destroy(bond);
4693 } 4712 }
4694 4713
4695#ifdef CONFIG_PROC_FS
4696 bond_destroy_proc_dir(); 4714 bond_destroy_proc_dir();
4697#endif
4698} 4715}
4699 4716
4700/*------------------------- Module initialization ---------------------------*/ 4717/*------------------------- Module initialization ---------------------------*/
@@ -5130,6 +5147,7 @@ int bond_create(char *name, struct bond_params *params)
5130 goto out_rtnl; 5147 goto out_rtnl;
5131 } 5148 }
5132 5149
5150 bond_dev->priv_flags &= ~IFF_XMIT_DST_RELEASE;
5133 if (!name) { 5151 if (!name) {
5134 res = dev_alloc_name(bond_dev, "bond%d"); 5152 res = dev_alloc_name(bond_dev, "bond%d");
5135 if (res < 0) 5153 if (res < 0)
@@ -5189,9 +5207,7 @@ static int __init bonding_init(void)
5189 goto out; 5207 goto out;
5190 } 5208 }
5191 5209
5192#ifdef CONFIG_PROC_FS
5193 bond_create_proc_dir(); 5210 bond_create_proc_dir();
5194#endif
5195 5211
5196 init_rwsem(&bonding_rwsem); 5212 init_rwsem(&bonding_rwsem);
5197 5213
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c
index d28731535226..3a1b7b04eb79 100644
--- a/drivers/net/bonding/bond_sysfs.c
+++ b/drivers/net/bonding/bond_sysfs.c
@@ -251,7 +251,8 @@ static ssize_t bonding_store_slaves(struct device *d,
251 251
252 /* Note: We can't hold bond->lock here, as bond_create grabs it. */ 252 /* Note: We can't hold bond->lock here, as bond_create grabs it. */
253 253
254 rtnl_lock(); 254 if (!rtnl_trylock())
255 return restart_syscall();
255 down_write(&(bonding_rwsem)); 256 down_write(&(bonding_rwsem));
256 257
257 sscanf(buffer, "%16s", command); /* IFNAMSIZ*/ 258 sscanf(buffer, "%16s", command); /* IFNAMSIZ*/
@@ -1171,7 +1172,8 @@ static ssize_t bonding_store_primary(struct device *d,
1171 struct slave *slave; 1172 struct slave *slave;
1172 struct bonding *bond = to_bond(d); 1173 struct bonding *bond = to_bond(d);
1173 1174
1174 rtnl_lock(); 1175 if (!rtnl_trylock())
1176 return restart_syscall();
1175 read_lock(&bond->lock); 1177 read_lock(&bond->lock);
1176 write_lock_bh(&bond->curr_slave_lock); 1178 write_lock_bh(&bond->curr_slave_lock);
1177 1179
@@ -1288,7 +1290,8 @@ static ssize_t bonding_store_active_slave(struct device *d,
1288 struct slave *new_active = NULL; 1290 struct slave *new_active = NULL;
1289 struct bonding *bond = to_bond(d); 1291 struct bonding *bond = to_bond(d);
1290 1292
1291 rtnl_lock(); 1293 if (!rtnl_trylock())
1294 return restart_syscall();
1292 read_lock(&bond->lock); 1295 read_lock(&bond->lock);
1293 write_lock_bh(&bond->curr_slave_lock); 1296 write_lock_bh(&bond->curr_slave_lock);
1294 1297
diff --git a/drivers/net/bonding/bonding.h b/drivers/net/bonding/bonding.h
index ca849d2adf98..41ceca12c68f 100644
--- a/drivers/net/bonding/bonding.h
+++ b/drivers/net/bonding/bonding.h
@@ -286,8 +286,7 @@ static inline unsigned long slave_last_rx(struct bonding *bond,
286static inline void bond_set_slave_inactive_flags(struct slave *slave) 286static inline void bond_set_slave_inactive_flags(struct slave *slave)
287{ 287{
288 struct bonding *bond = netdev_priv(slave->dev->master); 288 struct bonding *bond = netdev_priv(slave->dev->master);
289 if (bond->params.mode != BOND_MODE_TLB && 289 if (!bond_is_lb(bond))
290 bond->params.mode != BOND_MODE_ALB)
291 slave->state = BOND_STATE_BACKUP; 290 slave->state = BOND_STATE_BACKUP;
292 slave->dev->priv_flags |= IFF_SLAVE_INACTIVE; 291 slave->dev->priv_flags |= IFF_SLAVE_INACTIVE;
293 if (slave_do_arp_validate(bond, slave)) 292 if (slave_do_arp_validate(bond, slave))
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index 57def0d57371..d5e18812bf49 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -12,6 +12,68 @@ config CAN_VCAN
12 This driver can also be built as a module. If so, the module 12 This driver can also be built as a module. If so, the module
13 will be called vcan. 13 will be called vcan.
14 14
15config CAN_DEV
16 tristate "Platform CAN drivers with Netlink support"
17 depends on CAN
18 default Y
19 ---help---
20 Enables the common framework for platform CAN drivers with Netlink
21 support. This is the standard library for CAN drivers.
22 If unsure, say Y.
23
24config CAN_CALC_BITTIMING
25 bool "CAN bit-timing calculation"
26 depends on CAN_DEV
27 default Y
28 ---help---
29 If enabled, CAN bit-timing parameters will be calculated for the
30 bit-rate specified via Netlink argument "bitrate" when the device
31 get started. This works fine for the most common CAN controllers
32 with standard bit-rates but may fail for exotic bit-rates or CAN
33 source clock frequencies. Disabling saves some space, but then the
34 bit-timing parameters must be specified directly using the Netlink
35 arguments "tq", "prop_seg", "phase_seg1", "phase_seg2" and "sjw".
36 If unsure, say Y.
37
38config CAN_SJA1000
39 depends on CAN_DEV
40 tristate "Philips SJA1000"
41 ---help---
42 Driver for the SJA1000 CAN controllers from Philips or NXP
43
44config CAN_SJA1000_PLATFORM
45 depends on CAN_SJA1000
46 tristate "Generic Platform Bus based SJA1000 driver"
47 ---help---
48 This driver adds support for the SJA1000 chips connected to
49 the "platform bus" (Linux abstraction for directly to the
50 processor attached devices). Which can be found on various
51 boards from Phytec (http://www.phytec.de) like the PCM027,
52 PCM038.
53
54config CAN_SJA1000_OF_PLATFORM
55 depends on CAN_SJA1000 && PPC_OF
56 tristate "Generic OF Platform Bus based SJA1000 driver"
57 ---help---
58 This driver adds support for the SJA1000 chips connected to
59 the OpenFirmware "platform bus" found on embedded systems with
60 OpenFirmware bindings, e.g. if you have a PowerPC based system
61 you may want to enable this option.
62
63config CAN_EMS_PCI
64 tristate "EMS CPC-PCI and CPC-PCIe Card"
65 depends on PCI && CAN_SJA1000
66 ---help---
67 This driver is for the one or two channel CPC-PCI and CPC-PCIe
68 cards from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de).
69
70config CAN_KVASER_PCI
71 tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards"
72 depends on PCI && CAN_SJA1000
73 ---help---
74 This driver is for the the PCIcanx and PCIcan cards (1, 2 or
75 4 channel) from Kvaser (http://www.kvaser.com).
76
15config CAN_DEBUG_DEVICES 77config CAN_DEBUG_DEVICES
16 bool "CAN devices debugging messages" 78 bool "CAN devices debugging messages"
17 depends on CAN 79 depends on CAN
diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile
index c4bead705cd9..523a941b358b 100644
--- a/drivers/net/can/Makefile
+++ b/drivers/net/can/Makefile
@@ -3,3 +3,10 @@
3# 3#
4 4
5obj-$(CONFIG_CAN_VCAN) += vcan.o 5obj-$(CONFIG_CAN_VCAN) += vcan.o
6
7obj-$(CONFIG_CAN_DEV) += can-dev.o
8can-dev-y := dev.o
9
10obj-$(CONFIG_CAN_SJA1000) += sja1000/
11
12ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c
new file mode 100644
index 000000000000..574daddc21bf
--- /dev/null
+++ b/drivers/net/can/dev.c
@@ -0,0 +1,657 @@
1/*
2 * Copyright (C) 2005 Marc Kleine-Budde, Pengutronix
3 * Copyright (C) 2006 Andrey Volkov, Varma Electronics
4 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/netdevice.h>
23#include <linux/if_arp.h>
24#include <linux/can.h>
25#include <linux/can/dev.h>
26#include <linux/can/netlink.h>
27#include <net/rtnetlink.h>
28
29#define MOD_DESC "CAN device driver interface"
30
31MODULE_DESCRIPTION(MOD_DESC);
32MODULE_LICENSE("GPL v2");
33MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
34
35#ifdef CONFIG_CAN_CALC_BITTIMING
36#define CAN_CALC_MAX_ERROR 50 /* in one-tenth of a percent */
37
38/*
39 * Bit-timing calculation derived from:
40 *
41 * Code based on LinCAN sources and H8S2638 project
42 * Copyright 2004-2006 Pavel Pisa - DCE FELK CVUT cz
43 * Copyright 2005 Stanislav Marek
44 * email: pisa@cmp.felk.cvut.cz
45 *
46 * Calculates proper bit-timing parameters for a specified bit-rate
47 * and sample-point, which can then be used to set the bit-timing
48 * registers of the CAN controller. You can find more information
49 * in the header file linux/can/netlink.h.
50 */
51static int can_update_spt(const struct can_bittiming_const *btc,
52 int sampl_pt, int tseg, int *tseg1, int *tseg2)
53{
54 *tseg2 = tseg + 1 - (sampl_pt * (tseg + 1)) / 1000;
55 if (*tseg2 < btc->tseg2_min)
56 *tseg2 = btc->tseg2_min;
57 if (*tseg2 > btc->tseg2_max)
58 *tseg2 = btc->tseg2_max;
59 *tseg1 = tseg - *tseg2;
60 if (*tseg1 > btc->tseg1_max) {
61 *tseg1 = btc->tseg1_max;
62 *tseg2 = tseg - *tseg1;
63 }
64 return 1000 * (tseg + 1 - *tseg2) / (tseg + 1);
65}
66
67static int can_calc_bittiming(struct net_device *dev, struct can_bittiming *bt)
68{
69 struct can_priv *priv = netdev_priv(dev);
70 const struct can_bittiming_const *btc = priv->bittiming_const;
71 long rate, best_rate = 0;
72 long best_error = 1000000000, error = 0;
73 int best_tseg = 0, best_brp = 0, brp = 0;
74 int tsegall, tseg = 0, tseg1 = 0, tseg2 = 0;
75 int spt_error = 1000, spt = 0, sampl_pt;
76 u64 v64;
77
78 if (!priv->bittiming_const)
79 return -ENOTSUPP;
80
81 /* Use CIA recommended sample points */
82 if (bt->sample_point) {
83 sampl_pt = bt->sample_point;
84 } else {
85 if (bt->bitrate > 800000)
86 sampl_pt = 750;
87 else if (bt->bitrate > 500000)
88 sampl_pt = 800;
89 else
90 sampl_pt = 875;
91 }
92
93 /* tseg even = round down, odd = round up */
94 for (tseg = (btc->tseg1_max + btc->tseg2_max) * 2 + 1;
95 tseg >= (btc->tseg1_min + btc->tseg2_min) * 2; tseg--) {
96 tsegall = 1 + tseg / 2;
97 /* Compute all possible tseg choices (tseg=tseg1+tseg2) */
98 brp = priv->clock.freq / (tsegall * bt->bitrate) + tseg % 2;
99 /* chose brp step which is possible in system */
100 brp = (brp / btc->brp_inc) * btc->brp_inc;
101 if ((brp < btc->brp_min) || (brp > btc->brp_max))
102 continue;
103 rate = priv->clock.freq / (brp * tsegall);
104 error = bt->bitrate - rate;
105 /* tseg brp biterror */
106 if (error < 0)
107 error = -error;
108 if (error > best_error)
109 continue;
110 best_error = error;
111 if (error == 0) {
112 spt = can_update_spt(btc, sampl_pt, tseg / 2,
113 &tseg1, &tseg2);
114 error = sampl_pt - spt;
115 if (error < 0)
116 error = -error;
117 if (error > spt_error)
118 continue;
119 spt_error = error;
120 }
121 best_tseg = tseg / 2;
122 best_brp = brp;
123 best_rate = rate;
124 if (error == 0)
125 break;
126 }
127
128 if (best_error) {
129 /* Error in one-tenth of a percent */
130 error = (best_error * 1000) / bt->bitrate;
131 if (error > CAN_CALC_MAX_ERROR) {
132 dev_err(dev->dev.parent,
133 "bitrate error %ld.%ld%% too high\n",
134 error / 10, error % 10);
135 return -EDOM;
136 } else {
137 dev_warn(dev->dev.parent, "bitrate error %ld.%ld%%\n",
138 error / 10, error % 10);
139 }
140 }
141
142 /* real sample point */
143 bt->sample_point = can_update_spt(btc, sampl_pt, best_tseg,
144 &tseg1, &tseg2);
145
146 v64 = (u64)best_brp * 1000000000UL;
147 do_div(v64, priv->clock.freq);
148 bt->tq = (u32)v64;
149 bt->prop_seg = tseg1 / 2;
150 bt->phase_seg1 = tseg1 - bt->prop_seg;
151 bt->phase_seg2 = tseg2;
152 bt->sjw = 1;
153 bt->brp = best_brp;
154 /* real bit-rate */
155 bt->bitrate = priv->clock.freq / (bt->brp * (tseg1 + tseg2 + 1));
156
157 return 0;
158}
159#else /* !CONFIG_CAN_CALC_BITTIMING */
160static int can_calc_bittiming(struct net_device *dev, struct can_bittiming *bt)
161{
162 dev_err(dev->dev.parent, "bit-timing calculation not available\n");
163 return -EINVAL;
164}
165#endif /* CONFIG_CAN_CALC_BITTIMING */
166
167/*
168 * Checks the validity of the specified bit-timing parameters prop_seg,
169 * phase_seg1, phase_seg2 and sjw and tries to determine the bitrate
170 * prescaler value brp. You can find more information in the header
171 * file linux/can/netlink.h.
172 */
173static int can_fixup_bittiming(struct net_device *dev, struct can_bittiming *bt)
174{
175 struct can_priv *priv = netdev_priv(dev);
176 const struct can_bittiming_const *btc = priv->bittiming_const;
177 int tseg1, alltseg;
178 u64 brp64;
179
180 if (!priv->bittiming_const)
181 return -ENOTSUPP;
182
183 tseg1 = bt->prop_seg + bt->phase_seg1;
184 if (!bt->sjw)
185 bt->sjw = 1;
186 if (bt->sjw > btc->sjw_max ||
187 tseg1 < btc->tseg1_min || tseg1 > btc->tseg1_max ||
188 bt->phase_seg2 < btc->tseg2_min || bt->phase_seg2 > btc->tseg2_max)
189 return -ERANGE;
190
191 brp64 = (u64)priv->clock.freq * (u64)bt->tq;
192 if (btc->brp_inc > 1)
193 do_div(brp64, btc->brp_inc);
194 brp64 += 500000000UL - 1;
195 do_div(brp64, 1000000000UL); /* the practicable BRP */
196 if (btc->brp_inc > 1)
197 brp64 *= btc->brp_inc;
198 bt->brp = (u32)brp64;
199
200 if (bt->brp < btc->brp_min || bt->brp > btc->brp_max)
201 return -EINVAL;
202
203 alltseg = bt->prop_seg + bt->phase_seg1 + bt->phase_seg2 + 1;
204 bt->bitrate = priv->clock.freq / (bt->brp * alltseg);
205 bt->sample_point = ((tseg1 + 1) * 1000) / alltseg;
206
207 return 0;
208}
209
210int can_get_bittiming(struct net_device *dev, struct can_bittiming *bt)
211{
212 struct can_priv *priv = netdev_priv(dev);
213 int err;
214
215 /* Check if the CAN device has bit-timing parameters */
216 if (priv->bittiming_const) {
217
218 /* Non-expert mode? Check if the bitrate has been pre-defined */
219 if (!bt->tq)
220 /* Determine bit-timing parameters */
221 err = can_calc_bittiming(dev, bt);
222 else
223 /* Check bit-timing params and calculate proper brp */
224 err = can_fixup_bittiming(dev, bt);
225 if (err)
226 return err;
227 }
228
229 return 0;
230}
231
232/*
233 * Local echo of CAN messages
234 *
235 * CAN network devices *should* support a local echo functionality
236 * (see Documentation/networking/can.txt). To test the handling of CAN
237 * interfaces that do not support the local echo both driver types are
238 * implemented. In the case that the driver does not support the echo
239 * the IFF_ECHO remains clear in dev->flags. This causes the PF_CAN core
240 * to perform the echo as a fallback solution.
241 */
242static void can_flush_echo_skb(struct net_device *dev)
243{
244 struct can_priv *priv = netdev_priv(dev);
245 struct net_device_stats *stats = &dev->stats;
246 int i;
247
248 for (i = 0; i < CAN_ECHO_SKB_MAX; i++) {
249 if (priv->echo_skb[i]) {
250 kfree_skb(priv->echo_skb[i]);
251 priv->echo_skb[i] = NULL;
252 stats->tx_dropped++;
253 stats->tx_aborted_errors++;
254 }
255 }
256}
257
258/*
259 * Put the skb on the stack to be looped backed locally lateron
260 *
261 * The function is typically called in the start_xmit function
262 * of the device driver. The driver must protect access to
263 * priv->echo_skb, if necessary.
264 */
265void can_put_echo_skb(struct sk_buff *skb, struct net_device *dev, int idx)
266{
267 struct can_priv *priv = netdev_priv(dev);
268
269 /* check flag whether this packet has to be looped back */
270 if (!(dev->flags & IFF_ECHO) || skb->pkt_type != PACKET_LOOPBACK) {
271 kfree_skb(skb);
272 return;
273 }
274
275 if (!priv->echo_skb[idx]) {
276 struct sock *srcsk = skb->sk;
277
278 if (atomic_read(&skb->users) != 1) {
279 struct sk_buff *old_skb = skb;
280
281 skb = skb_clone(old_skb, GFP_ATOMIC);
282 kfree_skb(old_skb);
283 if (!skb)
284 return;
285 } else
286 skb_orphan(skb);
287
288 skb->sk = srcsk;
289
290 /* make settings for echo to reduce code in irq context */
291 skb->protocol = htons(ETH_P_CAN);
292 skb->pkt_type = PACKET_BROADCAST;
293 skb->ip_summed = CHECKSUM_UNNECESSARY;
294 skb->dev = dev;
295
296 /* save this skb for tx interrupt echo handling */
297 priv->echo_skb[idx] = skb;
298 } else {
299 /* locking problem with netif_stop_queue() ?? */
300 dev_err(dev->dev.parent, "%s: BUG! echo_skb is occupied!\n",
301 __func__);
302 kfree_skb(skb);
303 }
304}
305EXPORT_SYMBOL_GPL(can_put_echo_skb);
306
307/*
308 * Get the skb from the stack and loop it back locally
309 *
310 * The function is typically called when the TX done interrupt
311 * is handled in the device driver. The driver must protect
312 * access to priv->echo_skb, if necessary.
313 */
314void can_get_echo_skb(struct net_device *dev, int idx)
315{
316 struct can_priv *priv = netdev_priv(dev);
317
318 if ((dev->flags & IFF_ECHO) && priv->echo_skb[idx]) {
319 netif_rx(priv->echo_skb[idx]);
320 priv->echo_skb[idx] = NULL;
321 }
322}
323EXPORT_SYMBOL_GPL(can_get_echo_skb);
324
325/*
326 * CAN device restart for bus-off recovery
327 */
328void can_restart(unsigned long data)
329{
330 struct net_device *dev = (struct net_device *)data;
331 struct can_priv *priv = netdev_priv(dev);
332 struct net_device_stats *stats = &dev->stats;
333 struct sk_buff *skb;
334 struct can_frame *cf;
335 int err;
336
337 BUG_ON(netif_carrier_ok(dev));
338
339 /*
340 * No synchronization needed because the device is bus-off and
341 * no messages can come in or go out.
342 */
343 can_flush_echo_skb(dev);
344
345 /* send restart message upstream */
346 skb = dev_alloc_skb(sizeof(struct can_frame));
347 if (skb == NULL) {
348 err = -ENOMEM;
349 goto out;
350 }
351 skb->dev = dev;
352 skb->protocol = htons(ETH_P_CAN);
353 cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame));
354 memset(cf, 0, sizeof(struct can_frame));
355 cf->can_id = CAN_ERR_FLAG | CAN_ERR_RESTARTED;
356 cf->can_dlc = CAN_ERR_DLC;
357
358 netif_rx(skb);
359
360 dev->last_rx = jiffies;
361 stats->rx_packets++;
362 stats->rx_bytes += cf->can_dlc;
363
364 dev_dbg(dev->dev.parent, "restarted\n");
365 priv->can_stats.restarts++;
366
367 /* Now restart the device */
368 err = priv->do_set_mode(dev, CAN_MODE_START);
369
370out:
371 netif_carrier_on(dev);
372 if (err)
373 dev_err(dev->dev.parent, "Error %d during restart", err);
374}
375
376int can_restart_now(struct net_device *dev)
377{
378 struct can_priv *priv = netdev_priv(dev);
379
380 /*
381 * A manual restart is only permitted if automatic restart is
382 * disabled and the device is in the bus-off state
383 */
384 if (priv->restart_ms)
385 return -EINVAL;
386 if (priv->state != CAN_STATE_BUS_OFF)
387 return -EBUSY;
388
389 /* Runs as soon as possible in the timer context */
390 mod_timer(&priv->restart_timer, jiffies);
391
392 return 0;
393}
394
395/*
396 * CAN bus-off
397 *
398 * This functions should be called when the device goes bus-off to
399 * tell the netif layer that no more packets can be sent or received.
400 * If enabled, a timer is started to trigger bus-off recovery.
401 */
402void can_bus_off(struct net_device *dev)
403{
404 struct can_priv *priv = netdev_priv(dev);
405
406 dev_dbg(dev->dev.parent, "bus-off\n");
407
408 netif_carrier_off(dev);
409 priv->can_stats.bus_off++;
410
411 if (priv->restart_ms)
412 mod_timer(&priv->restart_timer,
413 jiffies + (priv->restart_ms * HZ) / 1000);
414}
415EXPORT_SYMBOL_GPL(can_bus_off);
416
417static void can_setup(struct net_device *dev)
418{
419 dev->type = ARPHRD_CAN;
420 dev->mtu = sizeof(struct can_frame);
421 dev->hard_header_len = 0;
422 dev->addr_len = 0;
423 dev->tx_queue_len = 10;
424
425 /* New-style flags. */
426 dev->flags = IFF_NOARP;
427 dev->features = NETIF_F_NO_CSUM;
428}
429
430/*
431 * Allocate and setup space for the CAN network device
432 */
433struct net_device *alloc_candev(int sizeof_priv)
434{
435 struct net_device *dev;
436 struct can_priv *priv;
437
438 dev = alloc_netdev(sizeof_priv, "can%d", can_setup);
439 if (!dev)
440 return NULL;
441
442 priv = netdev_priv(dev);
443
444 priv->state = CAN_STATE_STOPPED;
445
446 init_timer(&priv->restart_timer);
447
448 return dev;
449}
450EXPORT_SYMBOL_GPL(alloc_candev);
451
452/*
453 * Free space of the CAN network device
454 */
455void free_candev(struct net_device *dev)
456{
457 free_netdev(dev);
458}
459EXPORT_SYMBOL_GPL(free_candev);
460
461/*
462 * Common open function when the device gets opened.
463 *
464 * This function should be called in the open function of the device
465 * driver.
466 */
467int open_candev(struct net_device *dev)
468{
469 struct can_priv *priv = netdev_priv(dev);
470
471 if (!priv->bittiming.tq && !priv->bittiming.bitrate) {
472 dev_err(dev->dev.parent, "bit-timing not yet defined\n");
473 return -EINVAL;
474 }
475
476 setup_timer(&priv->restart_timer, can_restart, (unsigned long)dev);
477
478 return 0;
479}
480EXPORT_SYMBOL_GPL(open_candev);
481
482/*
483 * Common close function for cleanup before the device gets closed.
484 *
485 * This function should be called in the close function of the device
486 * driver.
487 */
488void close_candev(struct net_device *dev)
489{
490 struct can_priv *priv = netdev_priv(dev);
491
492 if (del_timer_sync(&priv->restart_timer))
493 dev_put(dev);
494 can_flush_echo_skb(dev);
495}
496EXPORT_SYMBOL_GPL(close_candev);
497
498/*
499 * CAN netlink interface
500 */
501static const struct nla_policy can_policy[IFLA_CAN_MAX + 1] = {
502 [IFLA_CAN_STATE] = { .type = NLA_U32 },
503 [IFLA_CAN_CTRLMODE] = { .len = sizeof(struct can_ctrlmode) },
504 [IFLA_CAN_RESTART_MS] = { .type = NLA_U32 },
505 [IFLA_CAN_RESTART] = { .type = NLA_U32 },
506 [IFLA_CAN_BITTIMING] = { .len = sizeof(struct can_bittiming) },
507 [IFLA_CAN_BITTIMING_CONST]
508 = { .len = sizeof(struct can_bittiming_const) },
509 [IFLA_CAN_CLOCK] = { .len = sizeof(struct can_clock) },
510};
511
512static int can_changelink(struct net_device *dev,
513 struct nlattr *tb[], struct nlattr *data[])
514{
515 struct can_priv *priv = netdev_priv(dev);
516 int err;
517
518 /* We need synchronization with dev->stop() */
519 ASSERT_RTNL();
520
521 if (data[IFLA_CAN_CTRLMODE]) {
522 struct can_ctrlmode *cm;
523
524 /* Do not allow changing controller mode while running */
525 if (dev->flags & IFF_UP)
526 return -EBUSY;
527 cm = nla_data(data[IFLA_CAN_CTRLMODE]);
528 priv->ctrlmode &= ~cm->mask;
529 priv->ctrlmode |= cm->flags;
530 }
531
532 if (data[IFLA_CAN_BITTIMING]) {
533 struct can_bittiming bt;
534
535 /* Do not allow changing bittiming while running */
536 if (dev->flags & IFF_UP)
537 return -EBUSY;
538 memcpy(&bt, nla_data(data[IFLA_CAN_BITTIMING]), sizeof(bt));
539 if ((!bt.bitrate && !bt.tq) || (bt.bitrate && bt.tq))
540 return -EINVAL;
541 err = can_get_bittiming(dev, &bt);
542 if (err)
543 return err;
544 memcpy(&priv->bittiming, &bt, sizeof(bt));
545
546 if (priv->do_set_bittiming) {
547 /* Finally, set the bit-timing registers */
548 err = priv->do_set_bittiming(dev);
549 if (err)
550 return err;
551 }
552 }
553
554 if (data[IFLA_CAN_RESTART_MS]) {
555 /* Do not allow changing restart delay while running */
556 if (dev->flags & IFF_UP)
557 return -EBUSY;
558 priv->restart_ms = nla_get_u32(data[IFLA_CAN_RESTART_MS]);
559 }
560
561 if (data[IFLA_CAN_RESTART]) {
562 /* Do not allow a restart while not running */
563 if (!(dev->flags & IFF_UP))
564 return -EINVAL;
565 err = can_restart_now(dev);
566 if (err)
567 return err;
568 }
569
570 return 0;
571}
572
573static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)
574{
575 struct can_priv *priv = netdev_priv(dev);
576 struct can_ctrlmode cm = {.flags = priv->ctrlmode};
577 enum can_state state = priv->state;
578
579 if (priv->do_get_state)
580 priv->do_get_state(dev, &state);
581 NLA_PUT_U32(skb, IFLA_CAN_STATE, state);
582 NLA_PUT(skb, IFLA_CAN_CTRLMODE, sizeof(cm), &cm);
583 NLA_PUT_U32(skb, IFLA_CAN_RESTART_MS, priv->restart_ms);
584 NLA_PUT(skb, IFLA_CAN_BITTIMING,
585 sizeof(priv->bittiming), &priv->bittiming);
586 NLA_PUT(skb, IFLA_CAN_CLOCK, sizeof(cm), &priv->clock);
587 if (priv->bittiming_const)
588 NLA_PUT(skb, IFLA_CAN_BITTIMING_CONST,
589 sizeof(*priv->bittiming_const), priv->bittiming_const);
590
591 return 0;
592
593nla_put_failure:
594 return -EMSGSIZE;
595}
596
597static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev)
598{
599 struct can_priv *priv = netdev_priv(dev);
600
601 NLA_PUT(skb, IFLA_INFO_XSTATS,
602 sizeof(priv->can_stats), &priv->can_stats);
603
604 return 0;
605
606nla_put_failure:
607 return -EMSGSIZE;
608}
609
610static struct rtnl_link_ops can_link_ops __read_mostly = {
611 .kind = "can",
612 .maxtype = IFLA_CAN_MAX,
613 .policy = can_policy,
614 .setup = can_setup,
615 .changelink = can_changelink,
616 .fill_info = can_fill_info,
617 .fill_xstats = can_fill_xstats,
618};
619
620/*
621 * Register the CAN network device
622 */
623int register_candev(struct net_device *dev)
624{
625 dev->rtnl_link_ops = &can_link_ops;
626 return register_netdev(dev);
627}
628EXPORT_SYMBOL_GPL(register_candev);
629
630/*
631 * Unregister the CAN network device
632 */
633void unregister_candev(struct net_device *dev)
634{
635 unregister_netdev(dev);
636}
637EXPORT_SYMBOL_GPL(unregister_candev);
638
639static __init int can_dev_init(void)
640{
641 int err;
642
643 err = rtnl_link_register(&can_link_ops);
644 if (!err)
645 printk(KERN_INFO MOD_DESC "\n");
646
647 return err;
648}
649module_init(can_dev_init);
650
651static __exit void can_dev_exit(void)
652{
653 rtnl_link_unregister(&can_link_ops);
654}
655module_exit(can_dev_exit);
656
657MODULE_ALIAS_RTNL_LINK("can");
diff --git a/drivers/net/can/sja1000/Makefile b/drivers/net/can/sja1000/Makefile
new file mode 100644
index 000000000000..9d0c08da273c
--- /dev/null
+++ b/drivers/net/can/sja1000/Makefile
@@ -0,0 +1,11 @@
1#
2# Makefile for the SJA1000 CAN controller drivers.
3#
4
5obj-$(CONFIG_CAN_SJA1000) += sja1000.o
6obj-$(CONFIG_CAN_SJA1000_PLATFORM) += sja1000_platform.o
7obj-$(CONFIG_CAN_SJA1000_OF_PLATFORM) += sja1000_of_platform.o
8obj-$(CONFIG_CAN_EMS_PCI) += ems_pci.o
9obj-$(CONFIG_CAN_KVASER_PCI) += kvaser_pci.o
10
11ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/sja1000/ems_pci.c b/drivers/net/can/sja1000/ems_pci.c
new file mode 100644
index 000000000000..121b64101d72
--- /dev/null
+++ b/drivers/net/can/sja1000/ems_pci.c
@@ -0,0 +1,320 @@
1/*
2 * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
3 * Copyright (C) 2008 Markus Plessing <plessing@ems-wuensche.com>
4 * Copyright (C) 2008 Sebastian Haas <haas@ems-wuensche.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 */
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/interrupt.h>
23#include <linux/netdevice.h>
24#include <linux/delay.h>
25#include <linux/pci.h>
26#include <linux/can.h>
27#include <linux/can/dev.h>
28#include <linux/io.h>
29
30#include "sja1000.h"
31
32#define DRV_NAME "ems_pci"
33
34MODULE_AUTHOR("Sebastian Haas <haas@ems-wuenche.com>");
35MODULE_DESCRIPTION("Socket-CAN driver for EMS CPC-PCI/PCIe CAN cards");
36MODULE_SUPPORTED_DEVICE("EMS CPC-PCI/PCIe CAN card");
37MODULE_LICENSE("GPL v2");
38
39#define EMS_PCI_MAX_CHAN 2
40
41struct ems_pci_card {
42 int channels;
43
44 struct pci_dev *pci_dev;
45 struct net_device *net_dev[EMS_PCI_MAX_CHAN];
46
47 void __iomem *conf_addr;
48 void __iomem *base_addr;
49};
50
51#define EMS_PCI_CAN_CLOCK (16000000 / 2)
52
53/*
54 * Register definitions and descriptions are from LinCAN 0.3.3.
55 *
56 * PSB4610 PITA-2 bridge control registers
57 */
58#define PITA2_ICR 0x00 /* Interrupt Control Register */
59#define PITA2_ICR_INT0 0x00000002 /* [RC] INT0 Active/Clear */
60#define PITA2_ICR_INT0_EN 0x00020000 /* [RW] Enable INT0 */
61
62#define PITA2_MISC 0x1c /* Miscellaneous Register */
63#define PITA2_MISC_CONFIG 0x04000000 /* Multiplexed parallel interface */
64
65/*
66 * The board configuration is probably following:
67 * RX1 is connected to ground.
68 * TX1 is not connected.
69 * CLKO is not connected.
70 * Setting the OCR register to 0xDA is a good idea.
71 * This means normal output mode , push-pull and the correct polarity.
72 */
73#define EMS_PCI_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)
74
75/*
76 * In the CDR register, you should set CBP to 1.
77 * You will probably also want to set the clock divider value to 7
78 * (meaning direct oscillator output) because the second SJA1000 chip
79 * is driven by the first one CLKOUT output.
80 */
81#define EMS_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
82#define EMS_PCI_MEM_SIZE 4096 /* Size of the remapped io-memory */
83#define EMS_PCI_CAN_BASE_OFFSET 0x400 /* offset where the controllers starts */
84#define EMS_PCI_CAN_CTRL_SIZE 0x200 /* memory size for each controller */
85
86#define EMS_PCI_PORT_BYTES 0x4 /* Each register occupies 4 bytes */
87
88#define EMS_PCI_VENDOR_ID 0x110a /* PCI device and vendor ID */
89#define EMS_PCI_DEVICE_ID 0x2104
90
91static struct pci_device_id ems_pci_tbl[] = {
92 {EMS_PCI_VENDOR_ID, EMS_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
93 {0,}
94};
95MODULE_DEVICE_TABLE(pci, ems_pci_tbl);
96
97/*
98 * Helper to read internal registers from card logic (not CAN)
99 */
100static u8 ems_pci_readb(struct ems_pci_card *card, unsigned int port)
101{
102 return readb(card->base_addr + (port * EMS_PCI_PORT_BYTES));
103}
104
105static u8 ems_pci_read_reg(const struct sja1000_priv *priv, int port)
106{
107 return readb(priv->reg_base + (port * EMS_PCI_PORT_BYTES));
108}
109
110static void ems_pci_write_reg(const struct sja1000_priv *priv, int port, u8 val)
111{
112 writeb(val, priv->reg_base + (port * EMS_PCI_PORT_BYTES));
113}
114
115static void ems_pci_post_irq(const struct sja1000_priv *priv)
116{
117 struct ems_pci_card *card = (struct ems_pci_card *)priv->priv;
118
119 /* reset int flag of pita */
120 writel(PITA2_ICR_INT0_EN | PITA2_ICR_INT0, card->conf_addr
121 + PITA2_ICR);
122}
123
124/*
125 * Check if a CAN controller is present at the specified location
126 * by trying to set 'em into the PeliCAN mode
127 */
128static inline int ems_pci_check_chan(const struct sja1000_priv *priv)
129{
130 unsigned char res;
131
132 /* Make sure SJA1000 is in reset mode */
133 ems_pci_write_reg(priv, REG_MOD, 1);
134
135 ems_pci_write_reg(priv, REG_CDR, CDR_PELICAN);
136
137 /* read reset-values */
138 res = ems_pci_read_reg(priv, REG_CDR);
139
140 if (res == CDR_PELICAN)
141 return 1;
142
143 return 0;
144}
145
146static void ems_pci_del_card(struct pci_dev *pdev)
147{
148 struct ems_pci_card *card = pci_get_drvdata(pdev);
149 struct net_device *dev;
150 int i = 0;
151
152 for (i = 0; i < card->channels; i++) {
153 dev = card->net_dev[i];
154
155 if (!dev)
156 continue;
157
158 dev_info(&pdev->dev, "Removing %s.\n", dev->name);
159 unregister_sja1000dev(dev);
160 free_sja1000dev(dev);
161 }
162
163 if (card->base_addr != NULL)
164 pci_iounmap(card->pci_dev, card->base_addr);
165
166 if (card->conf_addr != NULL)
167 pci_iounmap(card->pci_dev, card->conf_addr);
168
169 kfree(card);
170
171 pci_disable_device(pdev);
172 pci_set_drvdata(pdev, NULL);
173}
174
175static void ems_pci_card_reset(struct ems_pci_card *card)
176{
177 /* Request board reset */
178 writeb(0, card->base_addr);
179}
180
181/*
182 * Probe PCI device for EMS CAN signature and register each available
183 * CAN channel to SJA1000 Socket-CAN subsystem.
184 */
185static int __devinit ems_pci_add_card(struct pci_dev *pdev,
186 const struct pci_device_id *ent)
187{
188 struct sja1000_priv *priv;
189 struct net_device *dev;
190 struct ems_pci_card *card;
191 int err, i;
192
193 /* Enabling PCI device */
194 if (pci_enable_device(pdev) < 0) {
195 dev_err(&pdev->dev, "Enabling PCI device failed\n");
196 return -ENODEV;
197 }
198
199 /* Allocating card structures to hold addresses, ... */
200 card = kzalloc(sizeof(struct ems_pci_card), GFP_KERNEL);
201 if (card == NULL) {
202 dev_err(&pdev->dev, "Unable to allocate memory\n");
203 pci_disable_device(pdev);
204 return -ENOMEM;
205 }
206
207 pci_set_drvdata(pdev, card);
208
209 card->pci_dev = pdev;
210
211 card->channels = 0;
212
213 /* Remap PITA configuration space, and controller memory area */
214 card->conf_addr = pci_iomap(pdev, 0, EMS_PCI_MEM_SIZE);
215 if (card->conf_addr == NULL) {
216 err = -ENOMEM;
217 goto failure_cleanup;
218 }
219
220 card->base_addr = pci_iomap(pdev, 1, EMS_PCI_MEM_SIZE);
221 if (card->base_addr == NULL) {
222 err = -ENOMEM;
223 goto failure_cleanup;
224 }
225
226 /* Configure PITA-2 parallel interface (enable MUX) */
227 writel(PITA2_MISC_CONFIG, card->conf_addr + PITA2_MISC);
228
229 /* Check for unique EMS CAN signature */
230 if (ems_pci_readb(card, 0) != 0x55 ||
231 ems_pci_readb(card, 1) != 0xAA ||
232 ems_pci_readb(card, 2) != 0x01 ||
233 ems_pci_readb(card, 3) != 0xCB ||
234 ems_pci_readb(card, 4) != 0x11) {
235 dev_err(&pdev->dev, "Not EMS Dr. Thomas Wuensche interface\n");
236 err = -ENODEV;
237 goto failure_cleanup;
238 }
239
240 ems_pci_card_reset(card);
241
242 /* Detect available channels */
243 for (i = 0; i < EMS_PCI_MAX_CHAN; i++) {
244 dev = alloc_sja1000dev(0);
245 if (dev == NULL) {
246 err = -ENOMEM;
247 goto failure_cleanup;
248 }
249
250 card->net_dev[i] = dev;
251 priv = netdev_priv(dev);
252 priv->priv = card;
253 priv->irq_flags = IRQF_SHARED;
254
255 dev->irq = pdev->irq;
256 priv->reg_base = card->base_addr + EMS_PCI_CAN_BASE_OFFSET
257 + (i * EMS_PCI_CAN_CTRL_SIZE);
258
259 /* Check if channel is present */
260 if (ems_pci_check_chan(priv)) {
261 priv->read_reg = ems_pci_read_reg;
262 priv->write_reg = ems_pci_write_reg;
263 priv->post_irq = ems_pci_post_irq;
264 priv->can.clock.freq = EMS_PCI_CAN_CLOCK;
265 priv->ocr = EMS_PCI_OCR;
266 priv->cdr = EMS_PCI_CDR;
267
268 SET_NETDEV_DEV(dev, &pdev->dev);
269
270 /* Enable interrupts from card */
271 writel(PITA2_ICR_INT0_EN, card->conf_addr + PITA2_ICR);
272
273 /* Register SJA1000 device */
274 err = register_sja1000dev(dev);
275 if (err) {
276 dev_err(&pdev->dev, "Registering device failed "
277 "(err=%d)\n", err);
278 free_sja1000dev(dev);
279 goto failure_cleanup;
280 }
281
282 card->channels++;
283
284 dev_info(&pdev->dev, "Channel #%d at 0x%p, irq %d\n",
285 i + 1, priv->reg_base, dev->irq);
286 } else {
287 free_sja1000dev(dev);
288 }
289 }
290
291 return 0;
292
293failure_cleanup:
294 dev_err(&pdev->dev, "Error: %d. Cleaning Up.\n", err);
295
296 ems_pci_del_card(pdev);
297
298 return err;
299}
300
301static struct pci_driver ems_pci_driver = {
302 .name = DRV_NAME,
303 .id_table = ems_pci_tbl,
304 .probe = ems_pci_add_card,
305 .remove = ems_pci_del_card,
306};
307
308static int __init ems_pci_init(void)
309{
310 return pci_register_driver(&ems_pci_driver);
311}
312
313static void __exit ems_pci_exit(void)
314{
315 pci_unregister_driver(&ems_pci_driver);
316}
317
318module_init(ems_pci_init);
319module_exit(ems_pci_exit);
320
diff --git a/drivers/net/can/sja1000/kvaser_pci.c b/drivers/net/can/sja1000/kvaser_pci.c
new file mode 100644
index 000000000000..7dd7769b9713
--- /dev/null
+++ b/drivers/net/can/sja1000/kvaser_pci.c
@@ -0,0 +1,412 @@
1/*
2 * Copyright (C) 2008 Per Dalen <per.dalen@cnw.se>
3 *
4 * Parts of this software are based on (derived) the following:
5 *
6 * - Kvaser linux driver, version 4.72 BETA
7 * Copyright (C) 2002-2007 KVASER AB
8 *
9 * - Lincan driver, version 0.3.3, OCERA project
10 * Copyright (C) 2004 Pavel Pisa
11 * Copyright (C) 2001 Arnaud Westenberg
12 *
13 * - Socketcan SJA1000 drivers
14 * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
15 * Copyright (c) 2002-2007 Volkswagen Group Electronic Research
16 * Copyright (c) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33,
17 * 38106 Braunschweig, GERMANY
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the version 2 of the GNU General Public License
21 * as published by the Free Software Foundation
22 *
23 * This program is distributed in the hope that it will be useful, but
24 * WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
26 * General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software Foundation,
30 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 */
32
33#include <linux/kernel.h>
34#include <linux/module.h>
35#include <linux/interrupt.h>
36#include <linux/netdevice.h>
37#include <linux/delay.h>
38#include <linux/pci.h>
39#include <linux/can.h>
40#include <linux/can/dev.h>
41#include <linux/io.h>
42
43#include "sja1000.h"
44
45#define DRV_NAME "kvaser_pci"
46
47MODULE_AUTHOR("Per Dalen <per.dalen@cnw.se>");
48MODULE_DESCRIPTION("Socket-CAN driver for KVASER PCAN PCI cards");
49MODULE_SUPPORTED_DEVICE("KVASER PCAN PCI CAN card");
50MODULE_LICENSE("GPL v2");
51
52#define MAX_NO_OF_CHANNELS 4 /* max no of channels on a single card */
53
54struct kvaser_pci {
55 int channel;
56 struct pci_dev *pci_dev;
57 struct net_device *slave_dev[MAX_NO_OF_CHANNELS-1];
58 void __iomem *conf_addr;
59 void __iomem *res_addr;
60 int no_channels;
61 u8 xilinx_ver;
62};
63
64#define KVASER_PCI_CAN_CLOCK (16000000 / 2)
65
66/*
67 * The board configuration is probably following:
68 * RX1 is connected to ground.
69 * TX1 is not connected.
70 * CLKO is not connected.
71 * Setting the OCR register to 0xDA is a good idea.
72 * This means normal output mode , push-pull and the correct polarity.
73 */
74#define KVASER_PCI_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)
75
76/*
77 * In the CDR register, you should set CBP to 1.
78 * You will probably also want to set the clock divider value to 0
79 * (meaning divide-by-2), the Pelican bit, and the clock-off bit
80 * (you will have no need for CLKOUT anyway).
81 */
82#define KVASER_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
83
84/*
85 * These register values are valid for revision 14 of the Xilinx logic.
86 */
87#define XILINX_VERINT 7 /* Lower nibble simulate interrupts,
88 high nibble version number. */
89
90#define XILINX_PRESUMED_VERSION 14
91
92/*
93 * Important S5920 registers
94 */
95#define S5920_INTCSR 0x38
96#define S5920_PTCR 0x60
97#define INTCSR_ADDON_INTENABLE_M 0x2000
98
99
100#define KVASER_PCI_PORT_BYTES 0x20
101
102#define PCI_CONFIG_PORT_SIZE 0x80 /* size of the config io-memory */
103#define PCI_PORT_SIZE 0x80 /* size of a channel io-memory */
104#define PCI_PORT_XILINX_SIZE 0x08 /* size of a xilinx io-memory */
105
106#define KVASER_PCI_VENDOR_ID1 0x10e8 /* the PCI device and vendor IDs */
107#define KVASER_PCI_DEVICE_ID1 0x8406
108
109#define KVASER_PCI_VENDOR_ID2 0x1a07 /* the PCI device and vendor IDs */
110#define KVASER_PCI_DEVICE_ID2 0x0008
111
112static struct pci_device_id kvaser_pci_tbl[] = {
113 {KVASER_PCI_VENDOR_ID1, KVASER_PCI_DEVICE_ID1, PCI_ANY_ID, PCI_ANY_ID,},
114 {KVASER_PCI_VENDOR_ID2, KVASER_PCI_DEVICE_ID2, PCI_ANY_ID, PCI_ANY_ID,},
115 { 0,}
116};
117
118MODULE_DEVICE_TABLE(pci, kvaser_pci_tbl);
119
120static u8 kvaser_pci_read_reg(const struct sja1000_priv *priv, int port)
121{
122 return ioread8(priv->reg_base + port);
123}
124
125static void kvaser_pci_write_reg(const struct sja1000_priv *priv,
126 int port, u8 val)
127{
128 iowrite8(val, priv->reg_base + port);
129}
130
131static void kvaser_pci_disable_irq(struct net_device *dev)
132{
133 struct sja1000_priv *priv = netdev_priv(dev);
134 struct kvaser_pci *board = priv->priv;
135 u32 intcsr;
136
137 /* Disable interrupts from card */
138 intcsr = ioread32(board->conf_addr + S5920_INTCSR);
139 intcsr &= ~INTCSR_ADDON_INTENABLE_M;
140 iowrite32(intcsr, board->conf_addr + S5920_INTCSR);
141}
142
143static void kvaser_pci_enable_irq(struct net_device *dev)
144{
145 struct sja1000_priv *priv = netdev_priv(dev);
146 struct kvaser_pci *board = priv->priv;
147 u32 tmp_en_io;
148
149 /* Enable interrupts from card */
150 tmp_en_io = ioread32(board->conf_addr + S5920_INTCSR);
151 tmp_en_io |= INTCSR_ADDON_INTENABLE_M;
152 iowrite32(tmp_en_io, board->conf_addr + S5920_INTCSR);
153}
154
155static int number_of_sja1000_chip(void __iomem *base_addr)
156{
157 u8 status;
158 int i;
159
160 for (i = 0; i < MAX_NO_OF_CHANNELS; i++) {
161 /* reset chip */
162 iowrite8(MOD_RM, base_addr +
163 (i * KVASER_PCI_PORT_BYTES) + REG_MOD);
164 status = ioread8(base_addr +
165 (i * KVASER_PCI_PORT_BYTES) + REG_MOD);
166 /* check reset bit */
167 if (!(status & MOD_RM))
168 break;
169 }
170
171 return i;
172}
173
174static void kvaser_pci_del_chan(struct net_device *dev)
175{
176 struct sja1000_priv *priv;
177 struct kvaser_pci *board;
178 int i;
179
180 if (!dev)
181 return;
182 priv = netdev_priv(dev);
183 board = priv->priv;
184 if (!board)
185 return;
186
187 dev_info(&board->pci_dev->dev, "Removing device %s\n",
188 dev->name);
189
190 /* Disable PCI interrupts */
191 kvaser_pci_disable_irq(dev);
192
193 for (i = 0; i < board->no_channels - 1; i++) {
194 if (board->slave_dev[i]) {
195 dev_info(&board->pci_dev->dev, "Removing device %s\n",
196 board->slave_dev[i]->name);
197 unregister_sja1000dev(board->slave_dev[i]);
198 free_sja1000dev(board->slave_dev[i]);
199 }
200 }
201 unregister_sja1000dev(dev);
202
203 pci_iounmap(board->pci_dev, priv->reg_base);
204 pci_iounmap(board->pci_dev, board->conf_addr);
205 pci_iounmap(board->pci_dev, board->res_addr);
206
207 free_sja1000dev(dev);
208}
209
210static int kvaser_pci_add_chan(struct pci_dev *pdev, int channel,
211 struct net_device **master_dev,
212 void __iomem *conf_addr,
213 void __iomem *res_addr,
214 void __iomem *base_addr)
215{
216 struct net_device *dev;
217 struct sja1000_priv *priv;
218 struct kvaser_pci *board;
219 int err, init_step;
220
221 dev = alloc_sja1000dev(sizeof(struct kvaser_pci));
222 if (dev == NULL)
223 return -ENOMEM;
224
225 priv = netdev_priv(dev);
226 board = priv->priv;
227
228 board->pci_dev = pdev;
229 board->channel = channel;
230
231 /* S5920 */
232 board->conf_addr = conf_addr;
233
234 /* XILINX board wide address */
235 board->res_addr = res_addr;
236
237 if (channel == 0) {
238 board->xilinx_ver =
239 ioread8(board->res_addr + XILINX_VERINT) >> 4;
240 init_step = 2;
241
242 /* Assert PTADR# - we're in passive mode so the other bits are
243 not important */
244 iowrite32(0x80808080UL, board->conf_addr + S5920_PTCR);
245
246 /* Enable interrupts from card */
247 kvaser_pci_enable_irq(dev);
248 } else {
249 struct sja1000_priv *master_priv = netdev_priv(*master_dev);
250 struct kvaser_pci *master_board = master_priv->priv;
251 master_board->slave_dev[channel - 1] = dev;
252 master_board->no_channels = channel + 1;
253 board->xilinx_ver = master_board->xilinx_ver;
254 }
255
256 priv->reg_base = base_addr + channel * KVASER_PCI_PORT_BYTES;
257
258 priv->read_reg = kvaser_pci_read_reg;
259 priv->write_reg = kvaser_pci_write_reg;
260
261 priv->can.clock.freq = KVASER_PCI_CAN_CLOCK;
262
263 priv->ocr = KVASER_PCI_OCR;
264 priv->cdr = KVASER_PCI_CDR;
265
266 priv->irq_flags = IRQF_SHARED;
267 dev->irq = pdev->irq;
268
269 init_step = 4;
270
271 dev_info(&pdev->dev, "reg_base=%p conf_addr=%p irq=%d\n",
272 priv->reg_base, board->conf_addr, dev->irq);
273
274 SET_NETDEV_DEV(dev, &pdev->dev);
275
276 /* Register SJA1000 device */
277 err = register_sja1000dev(dev);
278 if (err) {
279 dev_err(&pdev->dev, "Registering device failed (err=%d)\n",
280 err);
281 goto failure;
282 }
283
284 if (channel == 0)
285 *master_dev = dev;
286
287 return 0;
288
289failure:
290 kvaser_pci_del_chan(dev);
291 return err;
292}
293
294static int __devinit kvaser_pci_init_one(struct pci_dev *pdev,
295 const struct pci_device_id *ent)
296{
297 int err;
298 struct net_device *master_dev = NULL;
299 struct sja1000_priv *priv;
300 struct kvaser_pci *board;
301 int no_channels;
302 void __iomem *base_addr = NULL;
303 void __iomem *conf_addr = NULL;
304 void __iomem *res_addr = NULL;
305 int i;
306
307 dev_info(&pdev->dev, "initializing device %04x:%04x\n",
308 pdev->vendor, pdev->device);
309
310 err = pci_enable_device(pdev);
311 if (err)
312 goto failure;
313
314 err = pci_request_regions(pdev, DRV_NAME);
315 if (err)
316 goto failure_release_pci;
317
318 /* S5920 */
319 conf_addr = pci_iomap(pdev, 0, PCI_CONFIG_PORT_SIZE);
320 if (conf_addr == NULL) {
321 err = -ENODEV;
322 goto failure_release_regions;
323 }
324
325 /* XILINX board wide address */
326 res_addr = pci_iomap(pdev, 2, PCI_PORT_XILINX_SIZE);
327 if (res_addr == NULL) {
328 err = -ENOMEM;
329 goto failure_iounmap;
330 }
331
332 base_addr = pci_iomap(pdev, 1, PCI_PORT_SIZE);
333 if (base_addr == NULL) {
334 err = -ENOMEM;
335 goto failure_iounmap;
336 }
337
338 no_channels = number_of_sja1000_chip(base_addr);
339 if (no_channels == 0) {
340 err = -ENOMEM;
341 goto failure_iounmap;
342 }
343
344 for (i = 0; i < no_channels; i++) {
345 err = kvaser_pci_add_chan(pdev, i, &master_dev,
346 conf_addr, res_addr,
347 base_addr);
348 if (err)
349 goto failure_cleanup;
350 }
351
352 priv = netdev_priv(master_dev);
353 board = priv->priv;
354
355 dev_info(&pdev->dev, "xilinx version=%d number of channels=%d\n",
356 board->xilinx_ver, board->no_channels);
357
358 pci_set_drvdata(pdev, master_dev);
359 return 0;
360
361failure_cleanup:
362 kvaser_pci_del_chan(master_dev);
363
364failure_iounmap:
365 if (conf_addr != NULL)
366 pci_iounmap(pdev, conf_addr);
367 if (res_addr != NULL)
368 pci_iounmap(pdev, res_addr);
369 if (base_addr != NULL)
370 pci_iounmap(pdev, base_addr);
371
372failure_release_regions:
373 pci_release_regions(pdev);
374
375failure_release_pci:
376 pci_disable_device(pdev);
377
378failure:
379 return err;
380
381}
382
383static void __devexit kvaser_pci_remove_one(struct pci_dev *pdev)
384{
385 struct net_device *dev = pci_get_drvdata(pdev);
386
387 kvaser_pci_del_chan(dev);
388
389 pci_release_regions(pdev);
390 pci_disable_device(pdev);
391 pci_set_drvdata(pdev, NULL);
392}
393
394static struct pci_driver kvaser_pci_driver = {
395 .name = DRV_NAME,
396 .id_table = kvaser_pci_tbl,
397 .probe = kvaser_pci_init_one,
398 .remove = __devexit_p(kvaser_pci_remove_one),
399};
400
401static int __init kvaser_pci_init(void)
402{
403 return pci_register_driver(&kvaser_pci_driver);
404}
405
406static void __exit kvaser_pci_exit(void)
407{
408 pci_unregister_driver(&kvaser_pci_driver);
409}
410
411module_init(kvaser_pci_init);
412module_exit(kvaser_pci_exit);
diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c
new file mode 100644
index 000000000000..571f133a8fec
--- /dev/null
+++ b/drivers/net/can/sja1000/sja1000.c
@@ -0,0 +1,637 @@
1/*
2 * sja1000.c - Philips SJA1000 network device driver
3 *
4 * Copyright (c) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33,
5 * 38106 Braunschweig, GERMANY
6 *
7 * Copyright (c) 2002-2007 Volkswagen Group Electronic Research
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of Volkswagen nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * Alternatively, provided that this notice is retained in full, this
23 * software may be distributed under the terms of the GNU General
24 * Public License ("GPL") version 2, in which case the provisions of the
25 * GPL apply INSTEAD OF those given above.
26 *
27 * The provided data structures and external interfaces from this code
28 * are not restricted to be used by modules with a GPL compatible license.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
31 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
33 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
34 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
35 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
36 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
37 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
38 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
41 * DAMAGE.
42 *
43 * Send feedback to <socketcan-users@lists.berlios.de>
44 *
45 */
46
47#include <linux/module.h>
48#include <linux/init.h>
49#include <linux/kernel.h>
50#include <linux/sched.h>
51#include <linux/types.h>
52#include <linux/fcntl.h>
53#include <linux/interrupt.h>
54#include <linux/ptrace.h>
55#include <linux/string.h>
56#include <linux/errno.h>
57#include <linux/netdevice.h>
58#include <linux/if_arp.h>
59#include <linux/if_ether.h>
60#include <linux/skbuff.h>
61#include <linux/delay.h>
62
63#include <linux/can.h>
64#include <linux/can/dev.h>
65#include <linux/can/error.h>
66#include <linux/can/dev.h>
67
68#include "sja1000.h"
69
70#define DRV_NAME "sja1000"
71
72MODULE_AUTHOR("Oliver Hartkopp <oliver.hartkopp@volkswagen.de>");
73MODULE_LICENSE("Dual BSD/GPL");
74MODULE_DESCRIPTION(DRV_NAME "CAN netdevice driver");
75
76static struct can_bittiming_const sja1000_bittiming_const = {
77 .name = DRV_NAME,
78 .tseg1_min = 1,
79 .tseg1_max = 16,
80 .tseg2_min = 1,
81 .tseg2_max = 8,
82 .sjw_max = 4,
83 .brp_min = 1,
84 .brp_max = 64,
85 .brp_inc = 1,
86};
87
88static int sja1000_probe_chip(struct net_device *dev)
89{
90 struct sja1000_priv *priv = netdev_priv(dev);
91
92 if (priv->reg_base && (priv->read_reg(priv, 0) == 0xFF)) {
93 printk(KERN_INFO "%s: probing @0x%lX failed\n",
94 DRV_NAME, dev->base_addr);
95 return 0;
96 }
97 return -1;
98}
99
100static void set_reset_mode(struct net_device *dev)
101{
102 struct sja1000_priv *priv = netdev_priv(dev);
103 unsigned char status = priv->read_reg(priv, REG_MOD);
104 int i;
105
106 /* disable interrupts */
107 priv->write_reg(priv, REG_IER, IRQ_OFF);
108
109 for (i = 0; i < 100; i++) {
110 /* check reset bit */
111 if (status & MOD_RM) {
112 priv->can.state = CAN_STATE_STOPPED;
113 return;
114 }
115
116 priv->write_reg(priv, REG_MOD, MOD_RM); /* reset chip */
117 udelay(10);
118 status = priv->read_reg(priv, REG_MOD);
119 }
120
121 dev_err(dev->dev.parent, "setting SJA1000 into reset mode failed!\n");
122}
123
124static void set_normal_mode(struct net_device *dev)
125{
126 struct sja1000_priv *priv = netdev_priv(dev);
127 unsigned char status = priv->read_reg(priv, REG_MOD);
128 int i;
129
130 for (i = 0; i < 100; i++) {
131 /* check reset bit */
132 if ((status & MOD_RM) == 0) {
133 priv->can.state = CAN_STATE_ERROR_ACTIVE;
134 /* enable all interrupts */
135 priv->write_reg(priv, REG_IER, IRQ_ALL);
136 return;
137 }
138
139 /* set chip to normal mode */
140 priv->write_reg(priv, REG_MOD, 0x00);
141 udelay(10);
142 status = priv->read_reg(priv, REG_MOD);
143 }
144
145 dev_err(dev->dev.parent, "setting SJA1000 into normal mode failed!\n");
146}
147
148static void sja1000_start(struct net_device *dev)
149{
150 struct sja1000_priv *priv = netdev_priv(dev);
151
152 /* leave reset mode */
153 if (priv->can.state != CAN_STATE_STOPPED)
154 set_reset_mode(dev);
155
156 /* Clear error counters and error code capture */
157 priv->write_reg(priv, REG_TXERR, 0x0);
158 priv->write_reg(priv, REG_RXERR, 0x0);
159 priv->read_reg(priv, REG_ECC);
160
161 /* leave reset mode */
162 set_normal_mode(dev);
163}
164
165static int sja1000_set_mode(struct net_device *dev, enum can_mode mode)
166{
167 struct sja1000_priv *priv = netdev_priv(dev);
168
169 if (!priv->open_time)
170 return -EINVAL;
171
172 switch (mode) {
173 case CAN_MODE_START:
174 sja1000_start(dev);
175 if (netif_queue_stopped(dev))
176 netif_wake_queue(dev);
177 break;
178
179 default:
180 return -EOPNOTSUPP;
181 }
182
183 return 0;
184}
185
186static int sja1000_set_bittiming(struct net_device *dev)
187{
188 struct sja1000_priv *priv = netdev_priv(dev);
189 struct can_bittiming *bt = &priv->can.bittiming;
190 u8 btr0, btr1;
191
192 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
193 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
194 (((bt->phase_seg2 - 1) & 0x7) << 4);
195 if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
196 btr1 |= 0x80;
197
198 dev_info(dev->dev.parent,
199 "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1);
200
201 priv->write_reg(priv, REG_BTR0, btr0);
202 priv->write_reg(priv, REG_BTR1, btr1);
203
204 return 0;
205}
206
207/*
208 * initialize SJA1000 chip:
209 * - reset chip
210 * - set output mode
211 * - set baudrate
212 * - enable interrupts
213 * - start operating mode
214 */
215static void chipset_init(struct net_device *dev)
216{
217 struct sja1000_priv *priv = netdev_priv(dev);
218
219 /* set clock divider and output control register */
220 priv->write_reg(priv, REG_CDR, priv->cdr | CDR_PELICAN);
221
222 /* set acceptance filter (accept all) */
223 priv->write_reg(priv, REG_ACCC0, 0x00);
224 priv->write_reg(priv, REG_ACCC1, 0x00);
225 priv->write_reg(priv, REG_ACCC2, 0x00);
226 priv->write_reg(priv, REG_ACCC3, 0x00);
227
228 priv->write_reg(priv, REG_ACCM0, 0xFF);
229 priv->write_reg(priv, REG_ACCM1, 0xFF);
230 priv->write_reg(priv, REG_ACCM2, 0xFF);
231 priv->write_reg(priv, REG_ACCM3, 0xFF);
232
233 priv->write_reg(priv, REG_OCR, priv->ocr | OCR_MODE_NORMAL);
234}
235
236/*
237 * transmit a CAN message
238 * message layout in the sk_buff should be like this:
239 * xx xx xx xx ff ll 00 11 22 33 44 55 66 77
240 * [ can-id ] [flags] [len] [can data (up to 8 bytes]
241 */
242static int sja1000_start_xmit(struct sk_buff *skb, struct net_device *dev)
243{
244 struct sja1000_priv *priv = netdev_priv(dev);
245 struct net_device_stats *stats = &dev->stats;
246 struct can_frame *cf = (struct can_frame *)skb->data;
247 uint8_t fi;
248 uint8_t dlc;
249 canid_t id;
250 uint8_t dreg;
251 int i;
252
253 netif_stop_queue(dev);
254
255 fi = dlc = cf->can_dlc;
256 id = cf->can_id;
257
258 if (id & CAN_RTR_FLAG)
259 fi |= FI_RTR;
260
261 if (id & CAN_EFF_FLAG) {
262 fi |= FI_FF;
263 dreg = EFF_BUF;
264 priv->write_reg(priv, REG_FI, fi);
265 priv->write_reg(priv, REG_ID1, (id & 0x1fe00000) >> (5 + 16));
266 priv->write_reg(priv, REG_ID2, (id & 0x001fe000) >> (5 + 8));
267 priv->write_reg(priv, REG_ID3, (id & 0x00001fe0) >> 5);
268 priv->write_reg(priv, REG_ID4, (id & 0x0000001f) << 3);
269 } else {
270 dreg = SFF_BUF;
271 priv->write_reg(priv, REG_FI, fi);
272 priv->write_reg(priv, REG_ID1, (id & 0x000007f8) >> 3);
273 priv->write_reg(priv, REG_ID2, (id & 0x00000007) << 5);
274 }
275
276 for (i = 0; i < dlc; i++)
277 priv->write_reg(priv, dreg++, cf->data[i]);
278
279 stats->tx_bytes += dlc;
280 dev->trans_start = jiffies;
281
282 can_put_echo_skb(skb, dev, 0);
283
284 priv->write_reg(priv, REG_CMR, CMD_TR);
285
286 return 0;
287}
288
289static void sja1000_rx(struct net_device *dev)
290{
291 struct sja1000_priv *priv = netdev_priv(dev);
292 struct net_device_stats *stats = &dev->stats;
293 struct can_frame *cf;
294 struct sk_buff *skb;
295 uint8_t fi;
296 uint8_t dreg;
297 canid_t id;
298 uint8_t dlc;
299 int i;
300
301 skb = dev_alloc_skb(sizeof(struct can_frame));
302 if (skb == NULL)
303 return;
304 skb->dev = dev;
305 skb->protocol = htons(ETH_P_CAN);
306
307 fi = priv->read_reg(priv, REG_FI);
308 dlc = fi & 0x0F;
309
310 if (fi & FI_FF) {
311 /* extended frame format (EFF) */
312 dreg = EFF_BUF;
313 id = (priv->read_reg(priv, REG_ID1) << (5 + 16))
314 | (priv->read_reg(priv, REG_ID2) << (5 + 8))
315 | (priv->read_reg(priv, REG_ID3) << 5)
316 | (priv->read_reg(priv, REG_ID4) >> 3);
317 id |= CAN_EFF_FLAG;
318 } else {
319 /* standard frame format (SFF) */
320 dreg = SFF_BUF;
321 id = (priv->read_reg(priv, REG_ID1) << 3)
322 | (priv->read_reg(priv, REG_ID2) >> 5);
323 }
324
325 if (fi & FI_RTR)
326 id |= CAN_RTR_FLAG;
327
328 cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame));
329 memset(cf, 0, sizeof(struct can_frame));
330 cf->can_id = id;
331 cf->can_dlc = dlc;
332 for (i = 0; i < dlc; i++)
333 cf->data[i] = priv->read_reg(priv, dreg++);
334
335 while (i < 8)
336 cf->data[i++] = 0;
337
338 /* release receive buffer */
339 priv->write_reg(priv, REG_CMR, CMD_RRB);
340
341 netif_rx(skb);
342
343 dev->last_rx = jiffies;
344 stats->rx_packets++;
345 stats->rx_bytes += dlc;
346}
347
348static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
349{
350 struct sja1000_priv *priv = netdev_priv(dev);
351 struct net_device_stats *stats = &dev->stats;
352 struct can_frame *cf;
353 struct sk_buff *skb;
354 enum can_state state = priv->can.state;
355 uint8_t ecc, alc;
356
357 skb = dev_alloc_skb(sizeof(struct can_frame));
358 if (skb == NULL)
359 return -ENOMEM;
360 skb->dev = dev;
361 skb->protocol = htons(ETH_P_CAN);
362 cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame));
363 memset(cf, 0, sizeof(struct can_frame));
364 cf->can_id = CAN_ERR_FLAG;
365 cf->can_dlc = CAN_ERR_DLC;
366
367 if (isrc & IRQ_DOI) {
368 /* data overrun interrupt */
369 dev_dbg(dev->dev.parent, "data overrun interrupt\n");
370 cf->can_id |= CAN_ERR_CRTL;
371 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
372 stats->rx_over_errors++;
373 stats->rx_errors++;
374 priv->write_reg(priv, REG_CMR, CMD_CDO); /* clear bit */
375 }
376
377 if (isrc & IRQ_EI) {
378 /* error warning interrupt */
379 dev_dbg(dev->dev.parent, "error warning interrupt\n");
380
381 if (status & SR_BS) {
382 state = CAN_STATE_BUS_OFF;
383 cf->can_id |= CAN_ERR_BUSOFF;
384 can_bus_off(dev);
385 } else if (status & SR_ES) {
386 state = CAN_STATE_ERROR_WARNING;
387 } else
388 state = CAN_STATE_ERROR_ACTIVE;
389 }
390 if (isrc & IRQ_BEI) {
391 /* bus error interrupt */
392 priv->can.can_stats.bus_error++;
393 stats->rx_errors++;
394
395 ecc = priv->read_reg(priv, REG_ECC);
396
397 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
398
399 switch (ecc & ECC_MASK) {
400 case ECC_BIT:
401 cf->data[2] |= CAN_ERR_PROT_BIT;
402 break;
403 case ECC_FORM:
404 cf->data[2] |= CAN_ERR_PROT_FORM;
405 break;
406 case ECC_STUFF:
407 cf->data[2] |= CAN_ERR_PROT_STUFF;
408 break;
409 default:
410 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
411 cf->data[3] = ecc & ECC_SEG;
412 break;
413 }
414 /* Error occured during transmission? */
415 if ((ecc & ECC_DIR) == 0)
416 cf->data[2] |= CAN_ERR_PROT_TX;
417 }
418 if (isrc & IRQ_EPI) {
419 /* error passive interrupt */
420 dev_dbg(dev->dev.parent, "error passive interrupt\n");
421 if (status & SR_ES)
422 state = CAN_STATE_ERROR_PASSIVE;
423 else
424 state = CAN_STATE_ERROR_ACTIVE;
425 }
426 if (isrc & IRQ_ALI) {
427 /* arbitration lost interrupt */
428 dev_dbg(dev->dev.parent, "arbitration lost interrupt\n");
429 alc = priv->read_reg(priv, REG_ALC);
430 priv->can.can_stats.arbitration_lost++;
431 stats->rx_errors++;
432 cf->can_id |= CAN_ERR_LOSTARB;
433 cf->data[0] = alc & 0x1f;
434 }
435
436 if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING ||
437 state == CAN_STATE_ERROR_PASSIVE)) {
438 uint8_t rxerr = priv->read_reg(priv, REG_RXERR);
439 uint8_t txerr = priv->read_reg(priv, REG_TXERR);
440 cf->can_id |= CAN_ERR_CRTL;
441 if (state == CAN_STATE_ERROR_WARNING) {
442 priv->can.can_stats.error_warning++;
443 cf->data[1] = (txerr > rxerr) ?
444 CAN_ERR_CRTL_TX_WARNING :
445 CAN_ERR_CRTL_RX_WARNING;
446 } else {
447 priv->can.can_stats.error_passive++;
448 cf->data[1] = (txerr > rxerr) ?
449 CAN_ERR_CRTL_TX_PASSIVE :
450 CAN_ERR_CRTL_RX_PASSIVE;
451 }
452 }
453
454 priv->can.state = state;
455
456 netif_rx(skb);
457
458 dev->last_rx = jiffies;
459 stats->rx_packets++;
460 stats->rx_bytes += cf->can_dlc;
461
462 return 0;
463}
464
465irqreturn_t sja1000_interrupt(int irq, void *dev_id)
466{
467 struct net_device *dev = (struct net_device *)dev_id;
468 struct sja1000_priv *priv = netdev_priv(dev);
469 struct net_device_stats *stats = &dev->stats;
470 uint8_t isrc, status;
471 int n = 0;
472
473 /* Shared interrupts and IRQ off? */
474 if (priv->read_reg(priv, REG_IER) == IRQ_OFF)
475 return IRQ_NONE;
476
477 if (priv->pre_irq)
478 priv->pre_irq(priv);
479
480 while ((isrc = priv->read_reg(priv, REG_IR)) && (n < SJA1000_MAX_IRQ)) {
481 n++;
482 status = priv->read_reg(priv, REG_SR);
483
484 if (isrc & IRQ_WUI)
485 dev_warn(dev->dev.parent, "wakeup interrupt\n");
486
487 if (isrc & IRQ_TI) {
488 /* transmission complete interrupt */
489 stats->tx_packets++;
490 can_get_echo_skb(dev, 0);
491 netif_wake_queue(dev);
492 }
493 if (isrc & IRQ_RI) {
494 /* receive interrupt */
495 while (status & SR_RBS) {
496 sja1000_rx(dev);
497 status = priv->read_reg(priv, REG_SR);
498 }
499 }
500 if (isrc & (IRQ_DOI | IRQ_EI | IRQ_BEI | IRQ_EPI | IRQ_ALI)) {
501 /* error interrupt */
502 if (sja1000_err(dev, isrc, status))
503 break;
504 }
505 }
506
507 if (priv->post_irq)
508 priv->post_irq(priv);
509
510 if (n >= SJA1000_MAX_IRQ)
511 dev_dbg(dev->dev.parent, "%d messages handled in ISR", n);
512
513 return (n) ? IRQ_HANDLED : IRQ_NONE;
514}
515EXPORT_SYMBOL_GPL(sja1000_interrupt);
516
517static int sja1000_open(struct net_device *dev)
518{
519 struct sja1000_priv *priv = netdev_priv(dev);
520 int err;
521
522 /* set chip into reset mode */
523 set_reset_mode(dev);
524
525 /* common open */
526 err = open_candev(dev);
527 if (err)
528 return err;
529
530 /* register interrupt handler, if not done by the device driver */
531 if (!(priv->flags & SJA1000_CUSTOM_IRQ_HANDLER)) {
532 err = request_irq(dev->irq, &sja1000_interrupt, priv->irq_flags,
533 dev->name, (void *)dev);
534 if (err) {
535 close_candev(dev);
536 return -EAGAIN;
537 }
538 }
539
540 /* init and start chi */
541 sja1000_start(dev);
542 priv->open_time = jiffies;
543
544 netif_start_queue(dev);
545
546 return 0;
547}
548
549static int sja1000_close(struct net_device *dev)
550{
551 struct sja1000_priv *priv = netdev_priv(dev);
552
553 netif_stop_queue(dev);
554 set_reset_mode(dev);
555
556 if (!(priv->flags & SJA1000_CUSTOM_IRQ_HANDLER))
557 free_irq(dev->irq, (void *)dev);
558
559 close_candev(dev);
560
561 priv->open_time = 0;
562
563 return 0;
564}
565
566struct net_device *alloc_sja1000dev(int sizeof_priv)
567{
568 struct net_device *dev;
569 struct sja1000_priv *priv;
570
571 dev = alloc_candev(sizeof(struct sja1000_priv) + sizeof_priv);
572 if (!dev)
573 return NULL;
574
575 priv = netdev_priv(dev);
576
577 priv->dev = dev;
578 priv->can.bittiming_const = &sja1000_bittiming_const;
579 priv->can.do_set_bittiming = sja1000_set_bittiming;
580 priv->can.do_set_mode = sja1000_set_mode;
581
582 if (sizeof_priv)
583 priv->priv = (void *)priv + sizeof(struct sja1000_priv);
584
585 return dev;
586}
587EXPORT_SYMBOL_GPL(alloc_sja1000dev);
588
589void free_sja1000dev(struct net_device *dev)
590{
591 free_candev(dev);
592}
593EXPORT_SYMBOL_GPL(free_sja1000dev);
594
595static const struct net_device_ops sja1000_netdev_ops = {
596 .ndo_open = sja1000_open,
597 .ndo_stop = sja1000_close,
598 .ndo_start_xmit = sja1000_start_xmit,
599};
600
601int register_sja1000dev(struct net_device *dev)
602{
603 if (!sja1000_probe_chip(dev))
604 return -ENODEV;
605
606 dev->flags |= IFF_ECHO; /* we support local echo */
607 dev->netdev_ops = &sja1000_netdev_ops;
608
609 set_reset_mode(dev);
610 chipset_init(dev);
611
612 return register_candev(dev);
613}
614EXPORT_SYMBOL_GPL(register_sja1000dev);
615
616void unregister_sja1000dev(struct net_device *dev)
617{
618 set_reset_mode(dev);
619 unregister_candev(dev);
620}
621EXPORT_SYMBOL_GPL(unregister_sja1000dev);
622
623static __init int sja1000_init(void)
624{
625 printk(KERN_INFO "%s CAN netdevice driver\n", DRV_NAME);
626
627 return 0;
628}
629
630module_init(sja1000_init);
631
632static __exit void sja1000_exit(void)
633{
634 printk(KERN_INFO "%s: driver removed\n", DRV_NAME);
635}
636
637module_exit(sja1000_exit);
diff --git a/drivers/net/can/sja1000/sja1000.h b/drivers/net/can/sja1000/sja1000.h
new file mode 100644
index 000000000000..302d2c763ad7
--- /dev/null
+++ b/drivers/net/can/sja1000/sja1000.h
@@ -0,0 +1,181 @@
1/*
2 * sja1000.h - Philips SJA1000 network device driver
3 *
4 * Copyright (c) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33,
5 * 38106 Braunschweig, GERMANY
6 *
7 * Copyright (c) 2002-2007 Volkswagen Group Electronic Research
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of Volkswagen nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * Alternatively, provided that this notice is retained in full, this
23 * software may be distributed under the terms of the GNU General
24 * Public License ("GPL") version 2, in which case the provisions of the
25 * GPL apply INSTEAD OF those given above.
26 *
27 * The provided data structures and external interfaces from this code
28 * are not restricted to be used by modules with a GPL compatible license.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
31 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
33 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
34 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
35 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
36 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
37 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
38 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
41 * DAMAGE.
42 *
43 * Send feedback to <socketcan-users@lists.berlios.de>
44 *
45 */
46
47#ifndef SJA1000_DEV_H
48#define SJA1000_DEV_H
49
50#include <linux/can/dev.h>
51#include <linux/can/platform/sja1000.h>
52
53#define SJA1000_MAX_IRQ 20 /* max. number of interrupts handled in ISR */
54
55/* SJA1000 registers - manual section 6.4 (Pelican Mode) */
56#define REG_MOD 0x00
57#define REG_CMR 0x01
58#define REG_SR 0x02
59#define REG_IR 0x03
60#define REG_IER 0x04
61#define REG_ALC 0x0B
62#define REG_ECC 0x0C
63#define REG_EWL 0x0D
64#define REG_RXERR 0x0E
65#define REG_TXERR 0x0F
66#define REG_ACCC0 0x10
67#define REG_ACCC1 0x11
68#define REG_ACCC2 0x12
69#define REG_ACCC3 0x13
70#define REG_ACCM0 0x14
71#define REG_ACCM1 0x15
72#define REG_ACCM2 0x16
73#define REG_ACCM3 0x17
74#define REG_RMC 0x1D
75#define REG_RBSA 0x1E
76
77/* Common registers - manual section 6.5 */
78#define REG_BTR0 0x06
79#define REG_BTR1 0x07
80#define REG_OCR 0x08
81#define REG_CDR 0x1F
82
83#define REG_FI 0x10
84#define SFF_BUF 0x13
85#define EFF_BUF 0x15
86
87#define FI_FF 0x80
88#define FI_RTR 0x40
89
90#define REG_ID1 0x11
91#define REG_ID2 0x12
92#define REG_ID3 0x13
93#define REG_ID4 0x14
94
95#define CAN_RAM 0x20
96
97/* mode register */
98#define MOD_RM 0x01
99#define MOD_LOM 0x02
100#define MOD_STM 0x04
101#define MOD_AFM 0x08
102#define MOD_SM 0x10
103
104/* commands */
105#define CMD_SRR 0x10
106#define CMD_CDO 0x08
107#define CMD_RRB 0x04
108#define CMD_AT 0x02
109#define CMD_TR 0x01
110
111/* interrupt sources */
112#define IRQ_BEI 0x80
113#define IRQ_ALI 0x40
114#define IRQ_EPI 0x20
115#define IRQ_WUI 0x10
116#define IRQ_DOI 0x08
117#define IRQ_EI 0x04
118#define IRQ_TI 0x02
119#define IRQ_RI 0x01
120#define IRQ_ALL 0xFF
121#define IRQ_OFF 0x00
122
123/* status register content */
124#define SR_BS 0x80
125#define SR_ES 0x40
126#define SR_TS 0x20
127#define SR_RS 0x10
128#define SR_TCS 0x08
129#define SR_TBS 0x04
130#define SR_DOS 0x02
131#define SR_RBS 0x01
132
133#define SR_CRIT (SR_BS|SR_ES)
134
135/* ECC register */
136#define ECC_SEG 0x1F
137#define ECC_DIR 0x20
138#define ECC_ERR 6
139#define ECC_BIT 0x00
140#define ECC_FORM 0x40
141#define ECC_STUFF 0x80
142#define ECC_MASK 0xc0
143
144/*
145 * Flags for sja1000priv.flags
146 */
147#define SJA1000_CUSTOM_IRQ_HANDLER 0x1
148
149/*
150 * SJA1000 private data structure
151 */
152struct sja1000_priv {
153 struct can_priv can; /* must be the first member */
154 int open_time;
155 struct sk_buff *echo_skb;
156
157 /* the lower-layer is responsible for appropriate locking */
158 u8 (*read_reg) (const struct sja1000_priv *priv, int reg);
159 void (*write_reg) (const struct sja1000_priv *priv, int reg, u8 val);
160 void (*pre_irq) (const struct sja1000_priv *priv);
161 void (*post_irq) (const struct sja1000_priv *priv);
162
163 void *priv; /* for board-specific data */
164 struct net_device *dev;
165
166 void __iomem *reg_base; /* ioremap'ed address to registers */
167 unsigned long irq_flags; /* for request_irq() */
168
169 u16 flags; /* custom mode flags */
170 u8 ocr; /* output control register */
171 u8 cdr; /* clock divider register */
172};
173
174struct net_device *alloc_sja1000dev(int sizeof_priv);
175void free_sja1000dev(struct net_device *dev);
176int register_sja1000dev(struct net_device *dev);
177void unregister_sja1000dev(struct net_device *dev);
178
179irqreturn_t sja1000_interrupt(int irq, void *dev_id);
180
181#endif /* SJA1000_DEV_H */
diff --git a/drivers/net/can/sja1000/sja1000_of_platform.c b/drivers/net/can/sja1000/sja1000_of_platform.c
new file mode 100644
index 000000000000..aa953fb4b8d0
--- /dev/null
+++ b/drivers/net/can/sja1000/sja1000_of_platform.c
@@ -0,0 +1,233 @@
1/*
2 * Driver for SJA1000 CAN controllers on the OpenFirmware platform bus
3 *
4 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 */
19
20/* This is a generic driver for SJA1000 chips on the OpenFirmware platform
21 * bus found on embedded PowerPC systems. You need a SJA1000 CAN node
22 * definition in your flattened device tree source (DTS) file similar to:
23 *
24 * can@3,100 {
25 * compatible = "nxp,sja1000";
26 * reg = <3 0x100 0x80>;
27 * interrupts = <2 0>;
28 * interrupt-parent = <&mpic>;
29 * nxp,external-clock-frequency = <16000000>;
30 * };
31 *
32 * See "Documentation/powerpc/dts-bindings/can/sja1000.txt" for further
33 * information.
34 */
35
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/interrupt.h>
39#include <linux/netdevice.h>
40#include <linux/delay.h>
41#include <linux/can.h>
42#include <linux/can/dev.h>
43
44#include <linux/of_platform.h>
45#include <asm/prom.h>
46
47#include "sja1000.h"
48
49#define DRV_NAME "sja1000_of_platform"
50
51MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
52MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the OF platform bus");
53MODULE_LICENSE("GPL v2");
54
55#define SJA1000_OFP_CAN_CLOCK (16000000 / 2)
56
57#define SJA1000_OFP_OCR OCR_TX0_PULLDOWN
58#define SJA1000_OFP_CDR (CDR_CBP | CDR_CLK_OFF)
59
60static u8 sja1000_ofp_read_reg(const struct sja1000_priv *priv, int reg)
61{
62 return in_8(priv->reg_base + reg);
63}
64
65static void sja1000_ofp_write_reg(const struct sja1000_priv *priv,
66 int reg, u8 val)
67{
68 out_8(priv->reg_base + reg, val);
69}
70
71static int __devexit sja1000_ofp_remove(struct of_device *ofdev)
72{
73 struct net_device *dev = dev_get_drvdata(&ofdev->dev);
74 struct sja1000_priv *priv = netdev_priv(dev);
75 struct device_node *np = ofdev->node;
76 struct resource res;
77
78 dev_set_drvdata(&ofdev->dev, NULL);
79
80 unregister_sja1000dev(dev);
81 free_sja1000dev(dev);
82 iounmap(priv->reg_base);
83 irq_dispose_mapping(dev->irq);
84
85 of_address_to_resource(np, 0, &res);
86 release_mem_region(res.start, resource_size(&res));
87
88 return 0;
89}
90
91static int __devinit sja1000_ofp_probe(struct of_device *ofdev,
92 const struct of_device_id *id)
93{
94 struct device_node *np = ofdev->node;
95 struct net_device *dev;
96 struct sja1000_priv *priv;
97 struct resource res;
98 const u32 *prop;
99 int err, irq, res_size, prop_size;
100 void __iomem *base;
101
102 err = of_address_to_resource(np, 0, &res);
103 if (err) {
104 dev_err(&ofdev->dev, "invalid address\n");
105 return err;
106 }
107
108 res_size = resource_size(&res);
109
110 if (!request_mem_region(res.start, res_size, DRV_NAME)) {
111 dev_err(&ofdev->dev, "couldn't request %#x..%#x\n",
112 res.start, res.end);
113 return -EBUSY;
114 }
115
116 base = ioremap_nocache(res.start, res_size);
117 if (!base) {
118 dev_err(&ofdev->dev, "couldn't ioremap %#x..%#x\n",
119 res.start, res.end);
120 err = -ENOMEM;
121 goto exit_release_mem;
122 }
123
124 irq = irq_of_parse_and_map(np, 0);
125 if (irq == NO_IRQ) {
126 dev_err(&ofdev->dev, "no irq found\n");
127 err = -ENODEV;
128 goto exit_unmap_mem;
129 }
130
131 dev = alloc_sja1000dev(0);
132 if (!dev) {
133 err = -ENOMEM;
134 goto exit_dispose_irq;
135 }
136
137 priv = netdev_priv(dev);
138
139 priv->read_reg = sja1000_ofp_read_reg;
140 priv->write_reg = sja1000_ofp_write_reg;
141
142 prop = of_get_property(np, "nxp,external-clock-frequency", &prop_size);
143 if (prop && (prop_size == sizeof(u32)))
144 priv->can.clock.freq = *prop / 2;
145 else
146 priv->can.clock.freq = SJA1000_OFP_CAN_CLOCK; /* default */
147
148 prop = of_get_property(np, "nxp,tx-output-mode", &prop_size);
149 if (prop && (prop_size == sizeof(u32)))
150 priv->ocr |= *prop & OCR_MODE_MASK;
151 else
152 priv->ocr |= OCR_MODE_NORMAL; /* default */
153
154 prop = of_get_property(np, "nxp,tx-output-config", &prop_size);
155 if (prop && (prop_size == sizeof(u32)))
156 priv->ocr |= (*prop << OCR_TX_SHIFT) & OCR_TX_MASK;
157 else
158 priv->ocr |= OCR_TX0_PULLDOWN; /* default */
159
160 prop = of_get_property(np, "nxp,clock-out-frequency", &prop_size);
161 if (prop && (prop_size == sizeof(u32)) && *prop) {
162 u32 divider = priv->can.clock.freq * 2 / *prop;
163
164 if (divider > 1)
165 priv->cdr |= divider / 2 - 1;
166 else
167 priv->cdr |= CDR_CLKOUT_MASK;
168 } else {
169 priv->cdr |= CDR_CLK_OFF; /* default */
170 }
171
172 prop = of_get_property(np, "nxp,no-comparator-bypass", NULL);
173 if (!prop)
174 priv->cdr |= CDR_CBP; /* default */
175
176 priv->irq_flags = IRQF_SHARED;
177 priv->reg_base = base;
178
179 dev->irq = irq;
180
181 dev_info(&ofdev->dev,
182 "reg_base=0x%p irq=%d clock=%d ocr=0x%02x cdr=0x%02x\n",
183 priv->reg_base, dev->irq, priv->can.clock.freq,
184 priv->ocr, priv->cdr);
185
186 dev_set_drvdata(&ofdev->dev, dev);
187 SET_NETDEV_DEV(dev, &ofdev->dev);
188
189 err = register_sja1000dev(dev);
190 if (err) {
191 dev_err(&ofdev->dev, "registering %s failed (err=%d)\n",
192 DRV_NAME, err);
193 goto exit_free_sja1000;
194 }
195
196 return 0;
197
198exit_free_sja1000:
199 free_sja1000dev(dev);
200exit_dispose_irq:
201 irq_dispose_mapping(irq);
202exit_unmap_mem:
203 iounmap(base);
204exit_release_mem:
205 release_mem_region(res.start, res_size);
206
207 return err;
208}
209
210static struct of_device_id __devinitdata sja1000_ofp_table[] = {
211 {.compatible = "nxp,sja1000"},
212 {},
213};
214
215static struct of_platform_driver sja1000_ofp_driver = {
216 .owner = THIS_MODULE,
217 .name = DRV_NAME,
218 .probe = sja1000_ofp_probe,
219 .remove = __devexit_p(sja1000_ofp_remove),
220 .match_table = sja1000_ofp_table,
221};
222
223static int __init sja1000_ofp_init(void)
224{
225 return of_register_platform_driver(&sja1000_ofp_driver);
226}
227module_init(sja1000_ofp_init);
228
229static void __exit sja1000_ofp_exit(void)
230{
231 return of_unregister_platform_driver(&sja1000_ofp_driver);
232};
233module_exit(sja1000_ofp_exit);
diff --git a/drivers/net/can/sja1000/sja1000_platform.c b/drivers/net/can/sja1000/sja1000_platform.c
new file mode 100644
index 000000000000..628374c2a05f
--- /dev/null
+++ b/drivers/net/can/sja1000/sja1000_platform.c
@@ -0,0 +1,165 @@
1/*
2 * Copyright (C) 2005 Sascha Hauer, Pengutronix
3 * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the version 2 of the GNU General Public License
7 * as published by the Free Software Foundation
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/interrupt.h>
22#include <linux/netdevice.h>
23#include <linux/delay.h>
24#include <linux/pci.h>
25#include <linux/platform_device.h>
26#include <linux/irq.h>
27#include <linux/can.h>
28#include <linux/can/dev.h>
29#include <linux/can/platform/sja1000.h>
30#include <linux/io.h>
31
32#include "sja1000.h"
33
34#define DRV_NAME "sja1000_platform"
35
36MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
37MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the platform bus");
38MODULE_LICENSE("GPL v2");
39
40static u8 sp_read_reg(const struct sja1000_priv *priv, int reg)
41{
42 return ioread8(priv->reg_base + reg);
43}
44
45static void sp_write_reg(const struct sja1000_priv *priv, int reg, u8 val)
46{
47 iowrite8(val, priv->reg_base + reg);
48}
49
50static int sp_probe(struct platform_device *pdev)
51{
52 int err;
53 void __iomem *addr;
54 struct net_device *dev;
55 struct sja1000_priv *priv;
56 struct resource *res_mem, *res_irq;
57 struct sja1000_platform_data *pdata;
58
59 pdata = pdev->dev.platform_data;
60 if (!pdata) {
61 dev_err(&pdev->dev, "No platform data provided!\n");
62 err = -ENODEV;
63 goto exit;
64 }
65
66 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
67 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
68 if (!res_mem || !res_irq) {
69 err = -ENODEV;
70 goto exit;
71 }
72
73 if (!request_mem_region(res_mem->start, resource_size(res_mem),
74 DRV_NAME)) {
75 err = -EBUSY;
76 goto exit;
77 }
78
79 addr = ioremap_nocache(res_mem->start, resource_size(res_mem));
80 if (!addr) {
81 err = -ENOMEM;
82 goto exit_release;
83 }
84
85 dev = alloc_sja1000dev(0);
86 if (!dev) {
87 err = -ENOMEM;
88 goto exit_iounmap;
89 }
90 priv = netdev_priv(dev);
91
92 dev->irq = res_irq->start;
93 priv->irq_flags = res_irq->flags & IRQF_TRIGGER_MASK;
94 priv->reg_base = addr;
95 priv->read_reg = sp_read_reg;
96 priv->write_reg = sp_write_reg;
97 priv->can.clock.freq = pdata->clock;
98 priv->ocr = pdata->ocr;
99 priv->cdr = pdata->cdr;
100
101 dev_set_drvdata(&pdev->dev, dev);
102 SET_NETDEV_DEV(dev, &pdev->dev);
103
104 err = register_sja1000dev(dev);
105 if (err) {
106 dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
107 DRV_NAME, err);
108 goto exit_free;
109 }
110
111 dev_info(&pdev->dev, "%s device registered (reg_base=%p, irq=%d)\n",
112 DRV_NAME, priv->reg_base, dev->irq);
113 return 0;
114
115 exit_free:
116 free_sja1000dev(dev);
117 exit_iounmap:
118 iounmap(addr);
119 exit_release:
120 release_mem_region(res_mem->start, resource_size(res_mem));
121 exit:
122 return err;
123}
124
125static int sp_remove(struct platform_device *pdev)
126{
127 struct net_device *dev = dev_get_drvdata(&pdev->dev);
128 struct sja1000_priv *priv = netdev_priv(dev);
129 struct resource *res;
130
131 unregister_sja1000dev(dev);
132 dev_set_drvdata(&pdev->dev, NULL);
133
134 if (priv->reg_base)
135 iounmap(priv->reg_base);
136
137 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
138 release_mem_region(res->start, resource_size(res));
139
140 free_sja1000dev(dev);
141
142 return 0;
143}
144
145static struct platform_driver sp_driver = {
146 .probe = sp_probe,
147 .remove = sp_remove,
148 .driver = {
149 .name = DRV_NAME,
150 .owner = THIS_MODULE,
151 },
152};
153
154static int __init sp_init(void)
155{
156 return platform_driver_register(&sp_driver);
157}
158
159static void __exit sp_exit(void)
160{
161 platform_driver_unregister(&sp_driver);
162}
163
164module_init(sp_init);
165module_exit(sp_exit);
diff --git a/drivers/net/chelsio/common.h b/drivers/net/chelsio/common.h
index 4bd2455b0fe3..699d22c5fe09 100644
--- a/drivers/net/chelsio/common.h
+++ b/drivers/net/chelsio/common.h
@@ -46,7 +46,7 @@
46#include <linux/pci.h> 46#include <linux/pci.h>
47#include <linux/ethtool.h> 47#include <linux/ethtool.h>
48#include <linux/if_vlan.h> 48#include <linux/if_vlan.h>
49#include <linux/mii.h> 49#include <linux/mdio.h>
50#include <linux/crc32.h> 50#include <linux/crc32.h>
51#include <linux/init.h> 51#include <linux/init.h>
52#include <asm/io.h> 52#include <asm/io.h>
diff --git a/drivers/net/chelsio/cphy.h b/drivers/net/chelsio/cphy.h
index 79d855e267e0..1f095a9fc739 100644
--- a/drivers/net/chelsio/cphy.h
+++ b/drivers/net/chelsio/cphy.h
@@ -43,10 +43,11 @@
43 43
44struct mdio_ops { 44struct mdio_ops {
45 void (*init)(adapter_t *adapter, const struct board_info *bi); 45 void (*init)(adapter_t *adapter, const struct board_info *bi);
46 int (*read)(adapter_t *adapter, int phy_addr, int mmd_addr, 46 int (*read)(struct net_device *dev, int phy_addr, int mmd_addr,
47 int reg_addr, unsigned int *val); 47 u16 reg_addr);
48 int (*write)(adapter_t *adapter, int phy_addr, int mmd_addr, 48 int (*write)(struct net_device *dev, int phy_addr, int mmd_addr,
49 int reg_addr, unsigned int val); 49 u16 reg_addr, u16 val);
50 unsigned mode_support;
50}; 51};
51 52
52/* PHY interrupt types */ 53/* PHY interrupt types */
@@ -83,11 +84,12 @@ struct cphy_ops {
83 int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex); 84 int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
84 int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed, 85 int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
85 int *duplex, int *fc); 86 int *duplex, int *fc);
87
88 u32 mmds;
86}; 89};
87 90
88/* A PHY instance */ 91/* A PHY instance */
89struct cphy { 92struct cphy {
90 int addr; /* PHY address */
91 int state; /* Link status state machine */ 93 int state; /* Link status state machine */
92 adapter_t *adapter; /* associated adapter */ 94 adapter_t *adapter; /* associated adapter */
93 95
@@ -101,56 +103,61 @@ struct cphy {
101 u32 elmer_gpo; 103 u32 elmer_gpo;
102 104
103 const struct cphy_ops *ops; /* PHY operations */ 105 const struct cphy_ops *ops; /* PHY operations */
104 int (*mdio_read)(adapter_t *adapter, int phy_addr, int mmd_addr, 106 struct mdio_if_info mdio;
105 int reg_addr, unsigned int *val);
106 int (*mdio_write)(adapter_t *adapter, int phy_addr, int mmd_addr,
107 int reg_addr, unsigned int val);
108 struct cphy_instance *instance; 107 struct cphy_instance *instance;
109}; 108};
110 109
111/* Convenience MDIO read/write wrappers */ 110/* Convenience MDIO read/write wrappers */
112static inline int mdio_read(struct cphy *cphy, int mmd, int reg, 111static inline int cphy_mdio_read(struct cphy *cphy, int mmd, int reg,
113 unsigned int *valp) 112 unsigned int *valp)
114{ 113{
115 return cphy->mdio_read(cphy->adapter, cphy->addr, mmd, reg, valp); 114 int rc = cphy->mdio.mdio_read(cphy->mdio.dev, cphy->mdio.prtad, mmd,
115 reg);
116 *valp = (rc >= 0) ? rc : -1;
117 return (rc >= 0) ? 0 : rc;
116} 118}
117 119
118static inline int mdio_write(struct cphy *cphy, int mmd, int reg, 120static inline int cphy_mdio_write(struct cphy *cphy, int mmd, int reg,
119 unsigned int val) 121 unsigned int val)
120{ 122{
121 return cphy->mdio_write(cphy->adapter, cphy->addr, mmd, reg, val); 123 return cphy->mdio.mdio_write(cphy->mdio.dev, cphy->mdio.prtad, mmd,
124 reg, val);
122} 125}
123 126
124static inline int simple_mdio_read(struct cphy *cphy, int reg, 127static inline int simple_mdio_read(struct cphy *cphy, int reg,
125 unsigned int *valp) 128 unsigned int *valp)
126{ 129{
127 return mdio_read(cphy, 0, reg, valp); 130 return cphy_mdio_read(cphy, MDIO_DEVAD_NONE, reg, valp);
128} 131}
129 132
130static inline int simple_mdio_write(struct cphy *cphy, int reg, 133static inline int simple_mdio_write(struct cphy *cphy, int reg,
131 unsigned int val) 134 unsigned int val)
132{ 135{
133 return mdio_write(cphy, 0, reg, val); 136 return cphy_mdio_write(cphy, MDIO_DEVAD_NONE, reg, val);
134} 137}
135 138
136/* Convenience initializer */ 139/* Convenience initializer */
137static inline void cphy_init(struct cphy *phy, adapter_t *adapter, 140static inline void cphy_init(struct cphy *phy, struct net_device *dev,
138 int phy_addr, struct cphy_ops *phy_ops, 141 int phy_addr, struct cphy_ops *phy_ops,
139 const struct mdio_ops *mdio_ops) 142 const struct mdio_ops *mdio_ops)
140{ 143{
144 struct adapter *adapter = netdev_priv(dev);
141 phy->adapter = adapter; 145 phy->adapter = adapter;
142 phy->addr = phy_addr;
143 phy->ops = phy_ops; 146 phy->ops = phy_ops;
144 if (mdio_ops) { 147 if (mdio_ops) {
145 phy->mdio_read = mdio_ops->read; 148 phy->mdio.prtad = phy_addr;
146 phy->mdio_write = mdio_ops->write; 149 phy->mdio.mmds = phy_ops->mmds;
150 phy->mdio.mode_support = mdio_ops->mode_support;
151 phy->mdio.mdio_read = mdio_ops->read;
152 phy->mdio.mdio_write = mdio_ops->write;
147 } 153 }
154 phy->mdio.dev = dev;
148} 155}
149 156
150/* Operations of the PHY-instance factory */ 157/* Operations of the PHY-instance factory */
151struct gphy { 158struct gphy {
152 /* Construct a PHY instance with the given PHY address */ 159 /* Construct a PHY instance with the given PHY address */
153 struct cphy *(*create)(adapter_t *adapter, int phy_addr, 160 struct cphy *(*create)(struct net_device *dev, int phy_addr,
154 const struct mdio_ops *mdio_ops); 161 const struct mdio_ops *mdio_ops);
155 162
156 /* 163 /*
diff --git a/drivers/net/chelsio/cxgb2.c b/drivers/net/chelsio/cxgb2.c
index fa06994f9737..082cdb28b510 100644
--- a/drivers/net/chelsio/cxgb2.c
+++ b/drivers/net/chelsio/cxgb2.c
@@ -589,7 +589,7 @@ static int get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
589 } 589 }
590 590
591 cmd->port = (cmd->supported & SUPPORTED_TP) ? PORT_TP : PORT_FIBRE; 591 cmd->port = (cmd->supported & SUPPORTED_TP) ? PORT_TP : PORT_FIBRE;
592 cmd->phy_address = p->phy->addr; 592 cmd->phy_address = p->phy->mdio.prtad;
593 cmd->transceiver = XCVR_EXTERNAL; 593 cmd->transceiver = XCVR_EXTERNAL;
594 cmd->autoneg = p->link_config.autoneg; 594 cmd->autoneg = p->link_config.autoneg;
595 cmd->maxtxpkt = 0; 595 cmd->maxtxpkt = 0;
@@ -849,39 +849,9 @@ static const struct ethtool_ops t1_ethtool_ops = {
849static int t1_ioctl(struct net_device *dev, struct ifreq *req, int cmd) 849static int t1_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
850{ 850{
851 struct adapter *adapter = dev->ml_priv; 851 struct adapter *adapter = dev->ml_priv;
852 struct mii_ioctl_data *data = if_mii(req); 852 struct mdio_if_info *mdio = &adapter->port[dev->if_port].phy->mdio;
853
854 switch (cmd) {
855 case SIOCGMIIPHY:
856 data->phy_id = adapter->port[dev->if_port].phy->addr;
857 /* FALLTHRU */
858 case SIOCGMIIREG: {
859 struct cphy *phy = adapter->port[dev->if_port].phy;
860 u32 val;
861
862 if (!phy->mdio_read)
863 return -EOPNOTSUPP;
864 phy->mdio_read(adapter, data->phy_id, 0, data->reg_num & 0x1f,
865 &val);
866 data->val_out = val;
867 break;
868 }
869 case SIOCSMIIREG: {
870 struct cphy *phy = adapter->port[dev->if_port].phy;
871
872 if (!capable(CAP_NET_ADMIN))
873 return -EPERM;
874 if (!phy->mdio_write)
875 return -EOPNOTSUPP;
876 phy->mdio_write(adapter, data->phy_id, 0, data->reg_num & 0x1f,
877 data->val_in);
878 break;
879 }
880 853
881 default: 854 return mdio_mii_ioctl(mdio, if_mii(req), cmd);
882 return -EOPNOTSUPP;
883 }
884 return 0;
885} 855}
886 856
887static int t1_change_mtu(struct net_device *dev, int new_mtu) 857static int t1_change_mtu(struct net_device *dev, int new_mtu)
diff --git a/drivers/net/chelsio/mv88e1xxx.c b/drivers/net/chelsio/mv88e1xxx.c
index 0632be0d6494..809047a99e96 100644
--- a/drivers/net/chelsio/mv88e1xxx.c
+++ b/drivers/net/chelsio/mv88e1xxx.c
@@ -353,15 +353,16 @@ static struct cphy_ops mv88e1xxx_ops = {
353 .get_link_status = mv88e1xxx_get_link_status, 353 .get_link_status = mv88e1xxx_get_link_status,
354}; 354};
355 355
356static struct cphy *mv88e1xxx_phy_create(adapter_t *adapter, int phy_addr, 356static struct cphy *mv88e1xxx_phy_create(struct net_device *dev, int phy_addr,
357 const struct mdio_ops *mdio_ops) 357 const struct mdio_ops *mdio_ops)
358{ 358{
359 struct adapter *adapter = netdev_priv(dev);
359 struct cphy *cphy = kzalloc(sizeof(*cphy), GFP_KERNEL); 360 struct cphy *cphy = kzalloc(sizeof(*cphy), GFP_KERNEL);
360 361
361 if (!cphy) 362 if (!cphy)
362 return NULL; 363 return NULL;
363 364
364 cphy_init(cphy, adapter, phy_addr, &mv88e1xxx_ops, mdio_ops); 365 cphy_init(cphy, dev, phy_addr, &mv88e1xxx_ops, mdio_ops);
365 366
366 /* Configure particular PHY's to run in a different mode. */ 367 /* Configure particular PHY's to run in a different mode. */
367 if ((board_info(adapter)->caps & SUPPORTED_TP) && 368 if ((board_info(adapter)->caps & SUPPORTED_TP) &&
diff --git a/drivers/net/chelsio/mv88x201x.c b/drivers/net/chelsio/mv88x201x.c
index cd856041af34..f7136b2fd1e5 100644
--- a/drivers/net/chelsio/mv88x201x.c
+++ b/drivers/net/chelsio/mv88x201x.c
@@ -53,7 +53,7 @@ static int led_init(struct cphy *cphy)
53 * Writing these bits maps control to another 53 * Writing these bits maps control to another
54 * register. mmd(0x1) addr(0x7) 54 * register. mmd(0x1) addr(0x7)
55 */ 55 */
56 mdio_write(cphy, 0x3, 0x8304, 0xdddd); 56 cphy_mdio_write(cphy, MDIO_MMD_PCS, 0x8304, 0xdddd);
57 return 0; 57 return 0;
58} 58}
59 59
@@ -62,14 +62,14 @@ static int led_link(struct cphy *cphy, u32 do_enable)
62 u32 led = 0; 62 u32 led = 0;
63#define LINK_ENABLE_BIT 0x1 63#define LINK_ENABLE_BIT 0x1
64 64
65 mdio_read(cphy, 0x1, 0x7, &led); 65 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_CTRL2, &led);
66 66
67 if (do_enable & LINK_ENABLE_BIT) { 67 if (do_enable & LINK_ENABLE_BIT) {
68 led |= LINK_ENABLE_BIT; 68 led |= LINK_ENABLE_BIT;
69 mdio_write(cphy, 0x1, 0x7, led); 69 cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_CTRL2, led);
70 } else { 70 } else {
71 led &= ~LINK_ENABLE_BIT; 71 led &= ~LINK_ENABLE_BIT;
72 mdio_write(cphy, 0x1, 0x7, led); 72 cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_CTRL2, led);
73 } 73 }
74 return 0; 74 return 0;
75} 75}
@@ -86,7 +86,8 @@ static int mv88x201x_reset(struct cphy *cphy, int wait)
86static int mv88x201x_interrupt_enable(struct cphy *cphy) 86static int mv88x201x_interrupt_enable(struct cphy *cphy)
87{ 87{
88 /* Enable PHY LASI interrupts. */ 88 /* Enable PHY LASI interrupts. */
89 mdio_write(cphy, 0x1, 0x9002, 0x1); 89 cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL,
90 MDIO_PMA_LASI_LSALARM);
90 91
91 /* Enable Marvell interrupts through Elmer0. */ 92 /* Enable Marvell interrupts through Elmer0. */
92 if (t1_is_asic(cphy->adapter)) { 93 if (t1_is_asic(cphy->adapter)) {
@@ -102,7 +103,7 @@ static int mv88x201x_interrupt_enable(struct cphy *cphy)
102static int mv88x201x_interrupt_disable(struct cphy *cphy) 103static int mv88x201x_interrupt_disable(struct cphy *cphy)
103{ 104{
104 /* Disable PHY LASI interrupts. */ 105 /* Disable PHY LASI interrupts. */
105 mdio_write(cphy, 0x1, 0x9002, 0x0); 106 cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL, 0x0);
106 107
107 /* Disable Marvell interrupts through Elmer0. */ 108 /* Disable Marvell interrupts through Elmer0. */
108 if (t1_is_asic(cphy->adapter)) { 109 if (t1_is_asic(cphy->adapter)) {
@@ -122,25 +123,25 @@ static int mv88x201x_interrupt_clear(struct cphy *cphy)
122 123
123#ifdef MV88x2010_LINK_STATUS_BUGS 124#ifdef MV88x2010_LINK_STATUS_BUGS
124 /* Required to read twice before clear takes affect. */ 125 /* Required to read twice before clear takes affect. */
125 mdio_read(cphy, 0x1, 0x9003, &val); 126 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_RXSTAT, &val);
126 mdio_read(cphy, 0x1, 0x9004, &val); 127 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_TXSTAT, &val);
127 mdio_read(cphy, 0x1, 0x9005, &val); 128 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT, &val);
128 129
129 /* Read this register after the others above it else 130 /* Read this register after the others above it else
130 * the register doesn't clear correctly. 131 * the register doesn't clear correctly.
131 */ 132 */
132 mdio_read(cphy, 0x1, 0x1, &val); 133 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val);
133#endif 134#endif
134 135
135 /* Clear link status. */ 136 /* Clear link status. */
136 mdio_read(cphy, 0x1, 0x1, &val); 137 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val);
137 /* Clear PHY LASI interrupts. */ 138 /* Clear PHY LASI interrupts. */
138 mdio_read(cphy, 0x1, 0x9005, &val); 139 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT, &val);
139 140
140#ifdef MV88x2010_LINK_STATUS_BUGS 141#ifdef MV88x2010_LINK_STATUS_BUGS
141 /* Do it again. */ 142 /* Do it again. */
142 mdio_read(cphy, 0x1, 0x9003, &val); 143 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_RXSTAT, &val);
143 mdio_read(cphy, 0x1, 0x9004, &val); 144 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_TXSTAT, &val);
144#endif 145#endif
145 146
146 /* Clear Marvell interrupts through Elmer0. */ 147 /* Clear Marvell interrupts through Elmer0. */
@@ -172,13 +173,12 @@ static int mv88x201x_get_link_status(struct cphy *cphy, int *link_ok,
172 int *speed, int *duplex, int *fc) 173 int *speed, int *duplex, int *fc)
173{ 174{
174 u32 val = 0; 175 u32 val = 0;
175#define LINK_STATUS_BIT 0x4
176 176
177 if (link_ok) { 177 if (link_ok) {
178 /* Read link status. */ 178 /* Read link status. */
179 mdio_read(cphy, 0x1, 0x1, &val); 179 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val);
180 val &= LINK_STATUS_BIT; 180 val &= MDIO_STAT1_LSTATUS;
181 *link_ok = (val == LINK_STATUS_BIT); 181 *link_ok = (val == MDIO_STAT1_LSTATUS);
182 /* Turn on/off Link LED */ 182 /* Turn on/off Link LED */
183 led_link(cphy, *link_ok); 183 led_link(cphy, *link_ok);
184 } 184 }
@@ -205,9 +205,11 @@ static struct cphy_ops mv88x201x_ops = {
205 .interrupt_handler = mv88x201x_interrupt_handler, 205 .interrupt_handler = mv88x201x_interrupt_handler,
206 .get_link_status = mv88x201x_get_link_status, 206 .get_link_status = mv88x201x_get_link_status,
207 .set_loopback = mv88x201x_set_loopback, 207 .set_loopback = mv88x201x_set_loopback,
208 .mmds = (MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
209 MDIO_DEVS_PHYXS | MDIO_DEVS_WIS),
208}; 210};
209 211
210static struct cphy *mv88x201x_phy_create(adapter_t *adapter, int phy_addr, 212static struct cphy *mv88x201x_phy_create(struct net_device *dev, int phy_addr,
211 const struct mdio_ops *mdio_ops) 213 const struct mdio_ops *mdio_ops)
212{ 214{
213 u32 val; 215 u32 val;
@@ -216,15 +218,15 @@ static struct cphy *mv88x201x_phy_create(adapter_t *adapter, int phy_addr,
216 if (!cphy) 218 if (!cphy)
217 return NULL; 219 return NULL;
218 220
219 cphy_init(cphy, adapter, phy_addr, &mv88x201x_ops, mdio_ops); 221 cphy_init(cphy, dev, phy_addr, &mv88x201x_ops, mdio_ops);
220 222
221 /* Commands the PHY to enable XFP's clock. */ 223 /* Commands the PHY to enable XFP's clock. */
222 mdio_read(cphy, 0x3, 0x8300, &val); 224 cphy_mdio_read(cphy, MDIO_MMD_PCS, 0x8300, &val);
223 mdio_write(cphy, 0x3, 0x8300, val | 1); 225 cphy_mdio_write(cphy, MDIO_MMD_PCS, 0x8300, val | 1);
224 226
225 /* Clear link status. Required because of a bug in the PHY. */ 227 /* Clear link status. Required because of a bug in the PHY. */
226 mdio_read(cphy, 0x1, 0x8, &val); 228 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT2, &val);
227 mdio_read(cphy, 0x3, 0x8, &val); 229 cphy_mdio_read(cphy, MDIO_MMD_PCS, MDIO_STAT2, &val);
228 230
229 /* Allows for Link,Ack LED turn on/off */ 231 /* Allows for Link,Ack LED turn on/off */
230 led_init(cphy); 232 led_init(cphy);
diff --git a/drivers/net/chelsio/my3126.c b/drivers/net/chelsio/my3126.c
index 040acd29995a..4c6028512d10 100644
--- a/drivers/net/chelsio/my3126.c
+++ b/drivers/net/chelsio/my3126.c
@@ -43,11 +43,11 @@ static int my3126_interrupt_handler(struct cphy *cphy)
43 adapter = cphy->adapter; 43 adapter = cphy->adapter;
44 44
45 if (cphy->count == 50) { 45 if (cphy->count == 50) {
46 mdio_read(cphy, 0x1, 0x1, &val); 46 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val);
47 val16 = (u16) val; 47 val16 = (u16) val;
48 status = cphy->bmsr ^ val16; 48 status = cphy->bmsr ^ val16;
49 49
50 if (status & BMSR_LSTATUS) 50 if (status & MDIO_STAT1_LSTATUS)
51 t1_link_changed(adapter, 0); 51 t1_link_changed(adapter, 0);
52 cphy->bmsr = val16; 52 cphy->bmsr = val16;
53 53
@@ -114,14 +114,14 @@ static int my3126_get_link_status(struct cphy *cphy,
114 adapter_t *adapter; 114 adapter_t *adapter;
115 115
116 adapter = cphy->adapter; 116 adapter = cphy->adapter;
117 mdio_read(cphy, 0x1, 0x1, &val); 117 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val);
118 val16 = (u16) val; 118 val16 = (u16) val;
119 119
120 /* Populate elmer_gpo with the register value */ 120 /* Populate elmer_gpo with the register value */
121 t1_tpi_read(adapter, A_ELMER0_GPO, &val); 121 t1_tpi_read(adapter, A_ELMER0_GPO, &val);
122 cphy->elmer_gpo = val; 122 cphy->elmer_gpo = val;
123 123
124 *link_ok = (val16 & BMSR_LSTATUS); 124 *link_ok = (val16 & MDIO_STAT1_LSTATUS);
125 125
126 if (*link_ok) { 126 if (*link_ok) {
127 /* Turn on the LED. */ 127 /* Turn on the LED. */
@@ -163,9 +163,11 @@ static struct cphy_ops my3126_ops = {
163 .interrupt_handler = my3126_interrupt_handler, 163 .interrupt_handler = my3126_interrupt_handler,
164 .get_link_status = my3126_get_link_status, 164 .get_link_status = my3126_get_link_status,
165 .set_loopback = my3126_set_loopback, 165 .set_loopback = my3126_set_loopback,
166 .mmds = (MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
167 MDIO_DEVS_PHYXS),
166}; 168};
167 169
168static struct cphy *my3126_phy_create(adapter_t *adapter, 170static struct cphy *my3126_phy_create(struct net_device *dev,
169 int phy_addr, const struct mdio_ops *mdio_ops) 171 int phy_addr, const struct mdio_ops *mdio_ops)
170{ 172{
171 struct cphy *cphy = kzalloc(sizeof (*cphy), GFP_KERNEL); 173 struct cphy *cphy = kzalloc(sizeof (*cphy), GFP_KERNEL);
@@ -173,7 +175,7 @@ static struct cphy *my3126_phy_create(adapter_t *adapter,
173 if (!cphy) 175 if (!cphy)
174 return NULL; 176 return NULL;
175 177
176 cphy_init(cphy, adapter, phy_addr, &my3126_ops, mdio_ops); 178 cphy_init(cphy, dev, phy_addr, &my3126_ops, mdio_ops);
177 INIT_DELAYED_WORK(&cphy->phy_update, my3216_poll); 179 INIT_DELAYED_WORK(&cphy->phy_update, my3216_poll);
178 cphy->bmsr = 0; 180 cphy->bmsr = 0;
179 181
diff --git a/drivers/net/chelsio/sge.c b/drivers/net/chelsio/sge.c
index 58f6fc055f6a..3711d64e45ef 100644
--- a/drivers/net/chelsio/sge.c
+++ b/drivers/net/chelsio/sge.c
@@ -1149,8 +1149,8 @@ static inline void write_tx_desc(struct cmdQ_e *e, dma_addr_t mapping,
1149 unsigned int len, unsigned int gen, 1149 unsigned int len, unsigned int gen,
1150 unsigned int eop) 1150 unsigned int eop)
1151{ 1151{
1152 if (unlikely(len > SGE_TX_DESC_MAX_PLEN)) 1152 BUG_ON(len > SGE_TX_DESC_MAX_PLEN);
1153 BUG(); 1153
1154 e->addr_lo = (u32)mapping; 1154 e->addr_lo = (u32)mapping;
1155 e->addr_hi = (u64)mapping >> 32; 1155 e->addr_hi = (u64)mapping >> 32;
1156 e->len_gen = V_CMD_LEN(len) | V_CMD_GEN1(gen); 1156 e->len_gen = V_CMD_LEN(len) | V_CMD_GEN1(gen);
@@ -1879,7 +1879,6 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev)
1879 cpl->vlan_valid = 0; 1879 cpl->vlan_valid = 0;
1880 1880
1881send: 1881send:
1882 dev->trans_start = jiffies;
1883 ret = t1_sge_tx(skb, adapter, 0, dev); 1882 ret = t1_sge_tx(skb, adapter, 0, dev);
1884 1883
1885 /* If transmit busy, and we reallocated skb's due to headroom limit, 1884 /* If transmit busy, and we reallocated skb's due to headroom limit,
diff --git a/drivers/net/chelsio/subr.c b/drivers/net/chelsio/subr.c
index 7adf30230c4f..17720c6e5bfe 100644
--- a/drivers/net/chelsio/subr.c
+++ b/drivers/net/chelsio/subr.c
@@ -284,32 +284,29 @@ static void mi1_mdio_init(adapter_t *adapter, const struct board_info *bi)
284/* 284/*
285 * Elmer MI1 MDIO read/write operations. 285 * Elmer MI1 MDIO read/write operations.
286 */ 286 */
287static int mi1_mdio_read(adapter_t *adapter, int phy_addr, int mmd_addr, 287static int mi1_mdio_read(struct net_device *dev, int phy_addr, int mmd_addr,
288 int reg_addr, unsigned int *valp) 288 u16 reg_addr)
289{ 289{
290 struct adapter *adapter = dev->ml_priv;
290 u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr); 291 u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr);
291 292 unsigned int val;
292 if (mmd_addr)
293 return -EINVAL;
294 293
295 spin_lock(&adapter->tpi_lock); 294 spin_lock(&adapter->tpi_lock);
296 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr); 295 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr);
297 __t1_tpi_write(adapter, 296 __t1_tpi_write(adapter,
298 A_ELMER0_PORT0_MI1_OP, MI1_OP_DIRECT_READ); 297 A_ELMER0_PORT0_MI1_OP, MI1_OP_DIRECT_READ);
299 mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP); 298 mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP);
300 __t1_tpi_read(adapter, A_ELMER0_PORT0_MI1_DATA, valp); 299 __t1_tpi_read(adapter, A_ELMER0_PORT0_MI1_DATA, &val);
301 spin_unlock(&adapter->tpi_lock); 300 spin_unlock(&adapter->tpi_lock);
302 return 0; 301 return val;
303} 302}
304 303
305static int mi1_mdio_write(adapter_t *adapter, int phy_addr, int mmd_addr, 304static int mi1_mdio_write(struct net_device *dev, int phy_addr, int mmd_addr,
306 int reg_addr, unsigned int val) 305 u16 reg_addr, u16 val)
307{ 306{
307 struct adapter *adapter = dev->ml_priv;
308 u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr); 308 u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr);
309 309
310 if (mmd_addr)
311 return -EINVAL;
312
313 spin_lock(&adapter->tpi_lock); 310 spin_lock(&adapter->tpi_lock);
314 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr); 311 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr);
315 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, val); 312 __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, val);
@@ -324,16 +321,19 @@ static int mi1_mdio_write(adapter_t *adapter, int phy_addr, int mmd_addr,
324static const struct mdio_ops mi1_mdio_ops = { 321static const struct mdio_ops mi1_mdio_ops = {
325 .init = mi1_mdio_init, 322 .init = mi1_mdio_init,
326 .read = mi1_mdio_read, 323 .read = mi1_mdio_read,
327 .write = mi1_mdio_write 324 .write = mi1_mdio_write,
325 .mode_support = MDIO_SUPPORTS_C22
328}; 326};
329#endif 327#endif
330 328
331#endif 329#endif
332 330
333static int mi1_mdio_ext_read(adapter_t *adapter, int phy_addr, int mmd_addr, 331static int mi1_mdio_ext_read(struct net_device *dev, int phy_addr, int mmd_addr,
334 int reg_addr, unsigned int *valp) 332 u16 reg_addr)
335{ 333{
334 struct adapter *adapter = dev->ml_priv;
336 u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr); 335 u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr);
336 unsigned int val;
337 337
338 spin_lock(&adapter->tpi_lock); 338 spin_lock(&adapter->tpi_lock);
339 339
@@ -350,14 +350,15 @@ static int mi1_mdio_ext_read(adapter_t *adapter, int phy_addr, int mmd_addr,
350 mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP); 350 mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP);
351 351
352 /* Read the data. */ 352 /* Read the data. */
353 __t1_tpi_read(adapter, A_ELMER0_PORT0_MI1_DATA, valp); 353 __t1_tpi_read(adapter, A_ELMER0_PORT0_MI1_DATA, &val);
354 spin_unlock(&adapter->tpi_lock); 354 spin_unlock(&adapter->tpi_lock);
355 return 0; 355 return val;
356} 356}
357 357
358static int mi1_mdio_ext_write(adapter_t *adapter, int phy_addr, int mmd_addr, 358static int mi1_mdio_ext_write(struct net_device *dev, int phy_addr,
359 int reg_addr, unsigned int val) 359 int mmd_addr, u16 reg_addr, u16 val)
360{ 360{
361 struct adapter *adapter = dev->ml_priv;
361 u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr); 362 u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr);
362 363
363 spin_lock(&adapter->tpi_lock); 364 spin_lock(&adapter->tpi_lock);
@@ -380,7 +381,8 @@ static int mi1_mdio_ext_write(adapter_t *adapter, int phy_addr, int mmd_addr,
380static const struct mdio_ops mi1_mdio_ext_ops = { 381static const struct mdio_ops mi1_mdio_ext_ops = {
381 .init = mi1_mdio_init, 382 .init = mi1_mdio_init,
382 .read = mi1_mdio_ext_read, 383 .read = mi1_mdio_ext_read,
383 .write = mi1_mdio_ext_write 384 .write = mi1_mdio_ext_write,
385 .mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22
384}; 386};
385 387
386enum { 388enum {
@@ -1133,8 +1135,8 @@ int __devinit t1_init_sw_modules(adapter_t *adapter,
1133 struct cmac *mac; 1135 struct cmac *mac;
1134 int phy_addr = bi->mdio_phybaseaddr + i; 1136 int phy_addr = bi->mdio_phybaseaddr + i;
1135 1137
1136 adapter->port[i].phy = bi->gphy->create(adapter, phy_addr, 1138 adapter->port[i].phy = bi->gphy->create(adapter->port[i].dev,
1137 bi->mdio_ops); 1139 phy_addr, bi->mdio_ops);
1138 if (!adapter->port[i].phy) { 1140 if (!adapter->port[i].phy) {
1139 CH_ERR("%s: PHY %d initialization failed\n", 1141 CH_ERR("%s: PHY %d initialization failed\n",
1140 adapter->name, i); 1142 adapter->name, i);
diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c
index 3f476c7c0736..58afafbd3b9c 100644
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -202,7 +202,7 @@ struct cpmac_priv {
202 void __iomem *regs; 202 void __iomem *regs;
203 struct mii_bus *mii_bus; 203 struct mii_bus *mii_bus;
204 struct phy_device *phy; 204 struct phy_device *phy;
205 char phy_name[BUS_ID_SIZE]; 205 char phy_name[MII_BUS_ID_SIZE + 3];
206 int oldlink, oldspeed, oldduplex; 206 int oldlink, oldspeed, oldduplex;
207 u32 msg_enable; 207 u32 msg_enable;
208 struct net_device *dev; 208 struct net_device *dev;
@@ -615,13 +615,13 @@ static void cpmac_end_xmit(struct net_device *dev, int queue)
615 615
616 dev_kfree_skb_irq(desc->skb); 616 dev_kfree_skb_irq(desc->skb);
617 desc->skb = NULL; 617 desc->skb = NULL;
618 if (netif_subqueue_stopped(dev, queue)) 618 if (__netif_subqueue_stopped(dev, queue))
619 netif_wake_subqueue(dev, queue); 619 netif_wake_subqueue(dev, queue);
620 } else { 620 } else {
621 if (netif_msg_tx_err(priv) && net_ratelimit()) 621 if (netif_msg_tx_err(priv) && net_ratelimit())
622 printk(KERN_WARNING 622 printk(KERN_WARNING
623 "%s: end_xmit: spurious interrupt\n", dev->name); 623 "%s: end_xmit: spurious interrupt\n", dev->name);
624 if (netif_subqueue_stopped(dev, queue)) 624 if (__netif_subqueue_stopped(dev, queue))
625 netif_wake_subqueue(dev, queue); 625 netif_wake_subqueue(dev, queue);
626 } 626 }
627} 627}
@@ -731,7 +731,6 @@ static void cpmac_clear_tx(struct net_device *dev)
731 731
732static void cpmac_hw_error(struct work_struct *work) 732static void cpmac_hw_error(struct work_struct *work)
733{ 733{
734 int i;
735 struct cpmac_priv *priv = 734 struct cpmac_priv *priv =
736 container_of(work, struct cpmac_priv, reset_work); 735 container_of(work, struct cpmac_priv, reset_work);
737 736
@@ -818,7 +817,6 @@ static irqreturn_t cpmac_irq(int irq, void *dev_id)
818 817
819static void cpmac_tx_timeout(struct net_device *dev) 818static void cpmac_tx_timeout(struct net_device *dev)
820{ 819{
821 int i;
822 struct cpmac_priv *priv = netdev_priv(dev); 820 struct cpmac_priv *priv = netdev_priv(dev);
823 821
824 spin_lock(&priv->lock); 822 spin_lock(&priv->lock);
@@ -1093,11 +1091,24 @@ static int cpmac_stop(struct net_device *dev)
1093 return 0; 1091 return 0;
1094} 1092}
1095 1093
1094static const struct net_device_ops cpmac_netdev_ops = {
1095 .ndo_open = cpmac_open,
1096 .ndo_stop = cpmac_stop,
1097 .ndo_start_xmit = cpmac_start_xmit,
1098 .ndo_tx_timeout = cpmac_tx_timeout,
1099 .ndo_set_multicast_list = cpmac_set_multicast_list,
1100 .ndo_so_ioctl = cpmac_ioctl,
1101 .ndo_set_config = cpmac_config,
1102 .ndo_change_mtu = eth_change_mtu,
1103 .ndo_validate_addr = eth_validate_addr,
1104 .ndo_set_mac_address = eth_mac_addr,
1105};
1106
1096static int external_switch; 1107static int external_switch;
1097 1108
1098static int __devinit cpmac_probe(struct platform_device *pdev) 1109static int __devinit cpmac_probe(struct platform_device *pdev)
1099{ 1110{
1100 int rc, phy_id, i; 1111 int rc, phy_id;
1101 char *mdio_bus_id = "0"; 1112 char *mdio_bus_id = "0";
1102 struct resource *mem; 1113 struct resource *mem;
1103 struct cpmac_priv *priv; 1114 struct cpmac_priv *priv;
@@ -1143,14 +1154,8 @@ static int __devinit cpmac_probe(struct platform_device *pdev)
1143 1154
1144 dev->irq = platform_get_irq_byname(pdev, "irq"); 1155 dev->irq = platform_get_irq_byname(pdev, "irq");
1145 1156
1146 dev->open = cpmac_open; 1157 dev->netdev_ops = &cpmac_netdev_ops;
1147 dev->stop = cpmac_stop; 1158 dev->ethtool_ops = &cpmac_ethtool_ops;
1148 dev->set_config = cpmac_config;
1149 dev->hard_start_xmit = cpmac_start_xmit;
1150 dev->do_ioctl = cpmac_ioctl;
1151 dev->set_multicast_list = cpmac_set_multicast_list;
1152 dev->tx_timeout = cpmac_tx_timeout;
1153 dev->ethtool_ops = &cpmac_ethtool_ops;
1154 1159
1155 netif_napi_add(dev, &priv->napi, cpmac_poll, 64); 1160 netif_napi_add(dev, &priv->napi, cpmac_poll, 64);
1156 1161
diff --git a/drivers/net/cxgb3/Makefile b/drivers/net/cxgb3/Makefile
index 343467985321..29aff78c7820 100644
--- a/drivers/net/cxgb3/Makefile
+++ b/drivers/net/cxgb3/Makefile
@@ -5,4 +5,4 @@
5obj-$(CONFIG_CHELSIO_T3) += cxgb3.o 5obj-$(CONFIG_CHELSIO_T3) += cxgb3.o
6 6
7cxgb3-objs := cxgb3_main.o ael1002.o vsc8211.o t3_hw.o mc5.o \ 7cxgb3-objs := cxgb3_main.o ael1002.o vsc8211.o t3_hw.o mc5.o \
8 xgmac.o sge.o l2t.o cxgb3_offload.o 8 xgmac.o sge.o l2t.o cxgb3_offload.o aq100x.o
diff --git a/drivers/net/cxgb3/adapter.h b/drivers/net/cxgb3/adapter.h
index c888e97c9671..e48e508b9632 100644
--- a/drivers/net/cxgb3/adapter.h
+++ b/drivers/net/cxgb3/adapter.h
@@ -195,7 +195,7 @@ struct sge_qset { /* an SGE queue set */
195 struct sge_rspq rspq; 195 struct sge_rspq rspq;
196 struct sge_fl fl[SGE_RXQ_PER_SET]; 196 struct sge_fl fl[SGE_RXQ_PER_SET];
197 struct sge_txq txq[SGE_TXQ_PER_SET]; 197 struct sge_txq txq[SGE_TXQ_PER_SET];
198 struct napi_gro_fraginfo lro_frag_tbl; 198 int nomem;
199 int lro_enabled; 199 int lro_enabled;
200 void *lro_va; 200 void *lro_va;
201 struct net_device *netdev; 201 struct net_device *netdev;
diff --git a/drivers/net/cxgb3/ael1002.c b/drivers/net/cxgb3/ael1002.c
index e1b22490ff59..9fe008ec9ba5 100644
--- a/drivers/net/cxgb3/ael1002.c
+++ b/drivers/net/cxgb3/ael1002.c
@@ -33,14 +33,6 @@
33#include "regs.h" 33#include "regs.h"
34 34
35enum { 35enum {
36 PMD_RSD = 10, /* PMA/PMD receive signal detect register */
37 PCS_STAT1_X = 24, /* 10GBASE-X PCS status 1 register */
38 PCS_STAT1_R = 32, /* 10GBASE-R PCS status 1 register */
39 XS_LN_STAT = 24 /* XS lane status register */
40};
41
42enum {
43 AEL100X_TX_DISABLE = 9,
44 AEL100X_TX_CONFIG1 = 0xc002, 36 AEL100X_TX_CONFIG1 = 0xc002,
45 AEL1002_PWR_DOWN_HI = 0xc011, 37 AEL1002_PWR_DOWN_HI = 0xc011,
46 AEL1002_PWR_DOWN_LO = 0xc012, 38 AEL1002_PWR_DOWN_LO = 0xc012,
@@ -52,12 +44,33 @@ enum {
52 AEL_I2C_STAT = 0xc30c, 44 AEL_I2C_STAT = 0xc30c,
53 AEL2005_GPIO_CTRL = 0xc214, 45 AEL2005_GPIO_CTRL = 0xc214,
54 AEL2005_GPIO_STAT = 0xc215, 46 AEL2005_GPIO_STAT = 0xc215,
47
48 AEL2020_GPIO_INTR = 0xc103, /* Latch High (LH) */
49 AEL2020_GPIO_CTRL = 0xc108, /* Store Clear (SC) */
50 AEL2020_GPIO_STAT = 0xc10c, /* Read Only (RO) */
51 AEL2020_GPIO_CFG = 0xc110, /* Read Write (RW) */
52
53 AEL2020_GPIO_SDA = 0, /* IN: i2c serial data */
54 AEL2020_GPIO_MODDET = 1, /* IN: Module Detect */
55 AEL2020_GPIO_0 = 3, /* IN: unassigned */
56 AEL2020_GPIO_1 = 2, /* OUT: unassigned */
57 AEL2020_GPIO_LSTAT = AEL2020_GPIO_1, /* wired to link status LED */
55}; 58};
56 59
57enum { edc_none, edc_sr, edc_twinax }; 60enum { edc_none, edc_sr, edc_twinax };
58 61
59/* PHY module I2C device address */ 62/* PHY module I2C device address */
60#define MODULE_DEV_ADDR 0xa0 63enum {
64 MODULE_DEV_ADDR = 0xa0,
65 SFF_DEV_ADDR = 0xa2,
66};
67
68/* PHY transceiver type */
69enum {
70 phy_transtype_unknown = 0,
71 phy_transtype_sfp = 3,
72 phy_transtype_xfp = 6,
73};
61 74
62#define AEL2005_MODDET_IRQ 4 75#define AEL2005_MODDET_IRQ 4
63 76
@@ -74,8 +87,8 @@ static int set_phy_regs(struct cphy *phy, const struct reg_val *rv)
74 87
75 for (err = 0; rv->mmd_addr && !err; rv++) { 88 for (err = 0; rv->mmd_addr && !err; rv++) {
76 if (rv->clear_bits == 0xffff) 89 if (rv->clear_bits == 0xffff)
77 err = mdio_write(phy, rv->mmd_addr, rv->reg_addr, 90 err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr,
78 rv->set_bits); 91 rv->set_bits);
79 else 92 else
80 err = t3_mdio_change_bits(phy, rv->mmd_addr, 93 err = t3_mdio_change_bits(phy, rv->mmd_addr,
81 rv->reg_addr, rv->clear_bits, 94 rv->reg_addr, rv->clear_bits,
@@ -86,21 +99,54 @@ static int set_phy_regs(struct cphy *phy, const struct reg_val *rv)
86 99
87static void ael100x_txon(struct cphy *phy) 100static void ael100x_txon(struct cphy *phy)
88{ 101{
89 int tx_on_gpio = phy->addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL; 102 int tx_on_gpio =
103 phy->mdio.prtad == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL;
90 104
91 msleep(100); 105 msleep(100);
92 t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio); 106 t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio);
93 msleep(30); 107 msleep(30);
94} 108}
95 109
110/*
111 * Read an 8-bit word from a device attached to the PHY's i2c bus.
112 */
113static int ael_i2c_rd(struct cphy *phy, int dev_addr, int word_addr)
114{
115 int i, err;
116 unsigned int stat, data;
117
118 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL_I2C_CTRL,
119 (dev_addr << 8) | (1 << 8) | word_addr);
120 if (err)
121 return err;
122
123 for (i = 0; i < 200; i++) {
124 msleep(1);
125 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL_I2C_STAT, &stat);
126 if (err)
127 return err;
128 if ((stat & 3) == 1) {
129 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL_I2C_DATA,
130 &data);
131 if (err)
132 return err;
133 return data >> 8;
134 }
135 }
136 CH_WARN(phy->adapter, "PHY %u i2c read of dev.addr %#x.%#x timed out\n",
137 phy->mdio.prtad, dev_addr, word_addr);
138 return -ETIMEDOUT;
139}
140
96static int ael1002_power_down(struct cphy *phy, int enable) 141static int ael1002_power_down(struct cphy *phy, int enable)
97{ 142{
98 int err; 143 int err;
99 144
100 err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable); 145 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, !!enable);
101 if (!err) 146 if (!err)
102 err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, 147 err = mdio_set_flag(&phy->mdio, phy->mdio.prtad,
103 BMCR_PDOWN, enable ? BMCR_PDOWN : 0); 148 MDIO_MMD_PMAPMD, MDIO_CTRL1,
149 MDIO_CTRL1_LPOWER, enable);
104 return err; 150 return err;
105} 151}
106 152
@@ -109,11 +155,11 @@ static int ael1002_reset(struct cphy *phy, int wait)
109 int err; 155 int err;
110 156
111 if ((err = ael1002_power_down(phy, 0)) || 157 if ((err = ael1002_power_down(phy, 0)) ||
112 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) || 158 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL100X_TX_CONFIG1, 1)) ||
113 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) || 159 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_PWR_DOWN_HI, 0)) ||
114 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) || 160 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_PWR_DOWN_LO, 0)) ||
115 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) || 161 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_XFI_EQL, 0x18)) ||
116 (err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL1002_LB_EN, 162 (err = t3_mdio_change_bits(phy, MDIO_MMD_PMAPMD, AEL1002_LB_EN,
117 0, 1 << 5))) 163 0, 1 << 5)))
118 return err; 164 return err;
119 return 0; 165 return 0;
@@ -132,12 +178,15 @@ static int get_link_status_r(struct cphy *phy, int *link_ok, int *speed,
132{ 178{
133 if (link_ok) { 179 if (link_ok) {
134 unsigned int stat0, stat1, stat2; 180 unsigned int stat0, stat1, stat2;
135 int err = mdio_read(phy, MDIO_DEV_PMA_PMD, PMD_RSD, &stat0); 181 int err = t3_mdio_read(phy, MDIO_MMD_PMAPMD,
182 MDIO_PMA_RXDET, &stat0);
136 183
137 if (!err) 184 if (!err)
138 err = mdio_read(phy, MDIO_DEV_PCS, PCS_STAT1_R, &stat1); 185 err = t3_mdio_read(phy, MDIO_MMD_PCS,
186 MDIO_PCS_10GBRT_STAT1, &stat1);
139 if (!err) 187 if (!err)
140 err = mdio_read(phy, MDIO_DEV_XGXS, XS_LN_STAT, &stat2); 188 err = t3_mdio_read(phy, MDIO_MMD_PHYXS,
189 MDIO_PHYXS_LNSTAT, &stat2);
141 if (err) 190 if (err)
142 return err; 191 return err;
143 *link_ok = (stat0 & stat1 & (stat2 >> 12)) & 1; 192 *link_ok = (stat0 & stat1 & (stat2 >> 12)) & 1;
@@ -157,6 +206,7 @@ static struct cphy_ops ael1002_ops = {
157 .intr_handler = ael1002_intr_noop, 206 .intr_handler = ael1002_intr_noop,
158 .get_link_status = get_link_status_r, 207 .get_link_status = get_link_status_r,
159 .power_down = ael1002_power_down, 208 .power_down = ael1002_power_down,
209 .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
160}; 210};
161 211
162int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter, 212int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter,
@@ -171,13 +221,13 @@ int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter,
171 221
172static int ael1006_reset(struct cphy *phy, int wait) 222static int ael1006_reset(struct cphy *phy, int wait)
173{ 223{
174 return t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait); 224 return t3_phy_reset(phy, MDIO_MMD_PMAPMD, wait);
175} 225}
176 226
177static int ael1006_power_down(struct cphy *phy, int enable) 227static int ael1006_power_down(struct cphy *phy, int enable)
178{ 228{
179 return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, 229 return mdio_set_flag(&phy->mdio, phy->mdio.prtad, MDIO_MMD_PMAPMD,
180 BMCR_PDOWN, enable ? BMCR_PDOWN : 0); 230 MDIO_CTRL1, MDIO_CTRL1_LPOWER, enable);
181} 231}
182 232
183static struct cphy_ops ael1006_ops = { 233static struct cphy_ops ael1006_ops = {
@@ -188,6 +238,7 @@ static struct cphy_ops ael1006_ops = {
188 .intr_handler = t3_phy_lasi_intr_handler, 238 .intr_handler = t3_phy_lasi_intr_handler,
189 .get_link_status = get_link_status_r, 239 .get_link_status = get_link_status_r,
190 .power_down = ael1006_power_down, 240 .power_down = ael1006_power_down,
241 .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
191}; 242};
192 243
193int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter, 244int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
@@ -200,12 +251,57 @@ int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
200 return 0; 251 return 0;
201} 252}
202 253
254/*
255 * Decode our module type.
256 */
257static int ael2xxx_get_module_type(struct cphy *phy, int delay_ms)
258{
259 int v;
260
261 if (delay_ms)
262 msleep(delay_ms);
263
264 /* see SFF-8472 for below */
265 v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 3);
266 if (v < 0)
267 return v;
268
269 if (v == 0x10)
270 return phy_modtype_sr;
271 if (v == 0x20)
272 return phy_modtype_lr;
273 if (v == 0x40)
274 return phy_modtype_lrm;
275
276 v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 6);
277 if (v < 0)
278 return v;
279 if (v != 4)
280 goto unknown;
281
282 v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 10);
283 if (v < 0)
284 return v;
285
286 if (v & 0x80) {
287 v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 0x12);
288 if (v < 0)
289 return v;
290 return v > 10 ? phy_modtype_twinax_long : phy_modtype_twinax;
291 }
292unknown:
293 return phy_modtype_unknown;
294}
295
296/*
297 * Code to support the Aeluros/NetLogic 2005 10Gb PHY.
298 */
203static int ael2005_setup_sr_edc(struct cphy *phy) 299static int ael2005_setup_sr_edc(struct cphy *phy)
204{ 300{
205 static struct reg_val regs[] = { 301 static struct reg_val regs[] = {
206 { MDIO_DEV_PMA_PMD, 0xc003, 0xffff, 0x181 }, 302 { MDIO_MMD_PMAPMD, 0xc003, 0xffff, 0x181 },
207 { MDIO_DEV_PMA_PMD, 0xc010, 0xffff, 0x448a }, 303 { MDIO_MMD_PMAPMD, 0xc010, 0xffff, 0x448a },
208 { MDIO_DEV_PMA_PMD, 0xc04a, 0xffff, 0x5200 }, 304 { MDIO_MMD_PMAPMD, 0xc04a, 0xffff, 0x5200 },
209 { 0, 0, 0, 0 } 305 { 0, 0, 0, 0 }
210 }; 306 };
211 static u16 sr_edc[] = { 307 static u16 sr_edc[] = {
@@ -490,8 +586,8 @@ static int ael2005_setup_sr_edc(struct cphy *phy)
490 msleep(50); 586 msleep(50);
491 587
492 for (i = 0; i < ARRAY_SIZE(sr_edc) && !err; i += 2) 588 for (i = 0; i < ARRAY_SIZE(sr_edc) && !err; i += 2)
493 err = mdio_write(phy, MDIO_DEV_PMA_PMD, sr_edc[i], 589 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, sr_edc[i],
494 sr_edc[i + 1]); 590 sr_edc[i + 1]);
495 if (!err) 591 if (!err)
496 phy->priv = edc_sr; 592 phy->priv = edc_sr;
497 return err; 593 return err;
@@ -500,12 +596,12 @@ static int ael2005_setup_sr_edc(struct cphy *phy)
500static int ael2005_setup_twinax_edc(struct cphy *phy, int modtype) 596static int ael2005_setup_twinax_edc(struct cphy *phy, int modtype)
501{ 597{
502 static struct reg_val regs[] = { 598 static struct reg_val regs[] = {
503 { MDIO_DEV_PMA_PMD, 0xc04a, 0xffff, 0x5a00 }, 599 { MDIO_MMD_PMAPMD, 0xc04a, 0xffff, 0x5a00 },
504 { 0, 0, 0, 0 } 600 { 0, 0, 0, 0 }
505 }; 601 };
506 static struct reg_val preemphasis[] = { 602 static struct reg_val preemphasis[] = {
507 { MDIO_DEV_PMA_PMD, 0xc014, 0xffff, 0xfe16 }, 603 { MDIO_MMD_PMAPMD, 0xc014, 0xffff, 0xfe16 },
508 { MDIO_DEV_PMA_PMD, 0xc015, 0xffff, 0xa000 }, 604 { MDIO_MMD_PMAPMD, 0xc015, 0xffff, 0xa000 },
509 { 0, 0, 0, 0 } 605 { 0, 0, 0, 0 }
510 }; 606 };
511 static u16 twinax_edc[] = { 607 static u16 twinax_edc[] = {
@@ -887,132 +983,73 @@ static int ael2005_setup_twinax_edc(struct cphy *phy, int modtype)
887 msleep(50); 983 msleep(50);
888 984
889 for (i = 0; i < ARRAY_SIZE(twinax_edc) && !err; i += 2) 985 for (i = 0; i < ARRAY_SIZE(twinax_edc) && !err; i += 2)
890 err = mdio_write(phy, MDIO_DEV_PMA_PMD, twinax_edc[i], 986 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, twinax_edc[i],
891 twinax_edc[i + 1]); 987 twinax_edc[i + 1]);
892 if (!err) 988 if (!err)
893 phy->priv = edc_twinax; 989 phy->priv = edc_twinax;
894 return err; 990 return err;
895} 991}
896 992
897static int ael2005_i2c_rd(struct cphy *phy, int dev_addr, int word_addr) 993static int ael2005_get_module_type(struct cphy *phy, int delay_ms)
898{
899 int i, err;
900 unsigned int stat, data;
901
902 err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL_I2C_CTRL,
903 (dev_addr << 8) | (1 << 8) | word_addr);
904 if (err)
905 return err;
906
907 for (i = 0; i < 5; i++) {
908 msleep(1);
909 err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL_I2C_STAT, &stat);
910 if (err)
911 return err;
912 if ((stat & 3) == 1) {
913 err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL_I2C_DATA,
914 &data);
915 if (err)
916 return err;
917 return data >> 8;
918 }
919 }
920 CH_WARN(phy->adapter, "PHY %u I2C read of addr %u timed out\n",
921 phy->addr, word_addr);
922 return -ETIMEDOUT;
923}
924
925static int get_module_type(struct cphy *phy, int delay_ms)
926{ 994{
927 int v; 995 int v;
928 unsigned int stat; 996 unsigned int stat;
929 997
930 v = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, &stat); 998 v = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, &stat);
931 if (v) 999 if (v)
932 return v; 1000 return v;
933 1001
934 if (stat & (1 << 8)) /* module absent */ 1002 if (stat & (1 << 8)) /* module absent */
935 return phy_modtype_none; 1003 return phy_modtype_none;
936 1004
937 if (delay_ms) 1005 return ael2xxx_get_module_type(phy, delay_ms);
938 msleep(delay_ms);
939
940 /* see SFF-8472 for below */
941 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 3);
942 if (v < 0)
943 return v;
944
945 if (v == 0x10)
946 return phy_modtype_sr;
947 if (v == 0x20)
948 return phy_modtype_lr;
949 if (v == 0x40)
950 return phy_modtype_lrm;
951
952 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 6);
953 if (v < 0)
954 return v;
955 if (v != 4)
956 goto unknown;
957
958 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 10);
959 if (v < 0)
960 return v;
961
962 if (v & 0x80) {
963 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 0x12);
964 if (v < 0)
965 return v;
966 return v > 10 ? phy_modtype_twinax_long : phy_modtype_twinax;
967 }
968unknown:
969 return phy_modtype_unknown;
970} 1006}
971 1007
972static int ael2005_intr_enable(struct cphy *phy) 1008static int ael2005_intr_enable(struct cphy *phy)
973{ 1009{
974 int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0x200); 1010 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, 0x200);
975 return err ? err : t3_phy_lasi_intr_enable(phy); 1011 return err ? err : t3_phy_lasi_intr_enable(phy);
976} 1012}
977 1013
978static int ael2005_intr_disable(struct cphy *phy) 1014static int ael2005_intr_disable(struct cphy *phy)
979{ 1015{
980 int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0x100); 1016 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, 0x100);
981 return err ? err : t3_phy_lasi_intr_disable(phy); 1017 return err ? err : t3_phy_lasi_intr_disable(phy);
982} 1018}
983 1019
984static int ael2005_intr_clear(struct cphy *phy) 1020static int ael2005_intr_clear(struct cphy *phy)
985{ 1021{
986 int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0xd00); 1022 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, 0xd00);
987 return err ? err : t3_phy_lasi_intr_clear(phy); 1023 return err ? err : t3_phy_lasi_intr_clear(phy);
988} 1024}
989 1025
990static int ael2005_reset(struct cphy *phy, int wait) 1026static int ael2005_reset(struct cphy *phy, int wait)
991{ 1027{
992 static struct reg_val regs0[] = { 1028 static struct reg_val regs0[] = {
993 { MDIO_DEV_PMA_PMD, 0xc001, 0, 1 << 5 }, 1029 { MDIO_MMD_PMAPMD, 0xc001, 0, 1 << 5 },
994 { MDIO_DEV_PMA_PMD, 0xc017, 0, 1 << 5 }, 1030 { MDIO_MMD_PMAPMD, 0xc017, 0, 1 << 5 },
995 { MDIO_DEV_PMA_PMD, 0xc013, 0xffff, 0xf341 }, 1031 { MDIO_MMD_PMAPMD, 0xc013, 0xffff, 0xf341 },
996 { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0x8000 }, 1032 { MDIO_MMD_PMAPMD, 0xc210, 0xffff, 0x8000 },
997 { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0x8100 }, 1033 { MDIO_MMD_PMAPMD, 0xc210, 0xffff, 0x8100 },
998 { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0x8000 }, 1034 { MDIO_MMD_PMAPMD, 0xc210, 0xffff, 0x8000 },
999 { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0 }, 1035 { MDIO_MMD_PMAPMD, 0xc210, 0xffff, 0 },
1000 { 0, 0, 0, 0 } 1036 { 0, 0, 0, 0 }
1001 }; 1037 };
1002 static struct reg_val regs1[] = { 1038 static struct reg_val regs1[] = {
1003 { MDIO_DEV_PMA_PMD, 0xca00, 0xffff, 0x0080 }, 1039 { MDIO_MMD_PMAPMD, 0xca00, 0xffff, 0x0080 },
1004 { MDIO_DEV_PMA_PMD, 0xca12, 0xffff, 0 }, 1040 { MDIO_MMD_PMAPMD, 0xca12, 0xffff, 0 },
1005 { 0, 0, 0, 0 } 1041 { 0, 0, 0, 0 }
1006 }; 1042 };
1007 1043
1008 int err; 1044 int err;
1009 unsigned int lasi_ctrl; 1045 unsigned int lasi_ctrl;
1010 1046
1011 err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, &lasi_ctrl); 1047 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL,
1048 &lasi_ctrl);
1012 if (err) 1049 if (err)
1013 return err; 1050 return err;
1014 1051
1015 err = t3_phy_reset(phy, MDIO_DEV_PMA_PMD, 0); 1052 err = t3_phy_reset(phy, MDIO_MMD_PMAPMD, 0);
1016 if (err) 1053 if (err)
1017 return err; 1054 return err;
1018 1055
@@ -1024,7 +1061,7 @@ static int ael2005_reset(struct cphy *phy, int wait)
1024 1061
1025 msleep(50); 1062 msleep(50);
1026 1063
1027 err = get_module_type(phy, 0); 1064 err = ael2005_get_module_type(phy, 0);
1028 if (err < 0) 1065 if (err < 0)
1029 return err; 1066 return err;
1030 phy->modtype = err; 1067 phy->modtype = err;
@@ -1051,18 +1088,18 @@ static int ael2005_intr_handler(struct cphy *phy)
1051 unsigned int stat; 1088 unsigned int stat;
1052 int ret, edc_needed, cause = 0; 1089 int ret, edc_needed, cause = 0;
1053 1090
1054 ret = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_STAT, &stat); 1091 ret = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_STAT, &stat);
1055 if (ret) 1092 if (ret)
1056 return ret; 1093 return ret;
1057 1094
1058 if (stat & AEL2005_MODDET_IRQ) { 1095 if (stat & AEL2005_MODDET_IRQ) {
1059 ret = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 1096 ret = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL,
1060 0xd00); 1097 0xd00);
1061 if (ret) 1098 if (ret)
1062 return ret; 1099 return ret;
1063 1100
1064 /* modules have max 300 ms init time after hot plug */ 1101 /* modules have max 300 ms init time after hot plug */
1065 ret = get_module_type(phy, 300); 1102 ret = ael2005_get_module_type(phy, 300);
1066 if (ret < 0) 1103 if (ret < 0)
1067 return ret; 1104 return ret;
1068 1105
@@ -1098,6 +1135,7 @@ static struct cphy_ops ael2005_ops = {
1098 .intr_handler = ael2005_intr_handler, 1135 .intr_handler = ael2005_intr_handler,
1099 .get_link_status = get_link_status_r, 1136 .get_link_status = get_link_status_r,
1100 .power_down = ael1002_power_down, 1137 .power_down = ael1002_power_down,
1138 .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
1101}; 1139};
1102 1140
1103int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter, 1141int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter,
@@ -1107,11 +1145,667 @@ int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter,
1107 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE | 1145 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE |
1108 SUPPORTED_IRQ, "10GBASE-R"); 1146 SUPPORTED_IRQ, "10GBASE-R");
1109 msleep(125); 1147 msleep(125);
1110 return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL_OPT_SETTINGS, 0, 1148 return t3_mdio_change_bits(phy, MDIO_MMD_PMAPMD, AEL_OPT_SETTINGS, 0,
1111 1 << 5); 1149 1 << 5);
1112} 1150}
1113 1151
1114/* 1152/*
1153 * Setup EDC and other parameters for operation with an optical module.
1154 */
1155static int ael2020_setup_sr_edc(struct cphy *phy)
1156{
1157 static struct reg_val regs[] = {
1158 /* set CDR offset to 10 */
1159 { MDIO_MMD_PMAPMD, 0xcc01, 0xffff, 0x488a },
1160
1161 /* adjust 10G RX bias current */
1162 { MDIO_MMD_PMAPMD, 0xcb1b, 0xffff, 0x0200 },
1163 { MDIO_MMD_PMAPMD, 0xcb1c, 0xffff, 0x00f0 },
1164 { MDIO_MMD_PMAPMD, 0xcc06, 0xffff, 0x00e0 },
1165
1166 /* end */
1167 { 0, 0, 0, 0 }
1168 };
1169 int err;
1170
1171 err = set_phy_regs(phy, regs);
1172 msleep(50);
1173 if (err)
1174 return err;
1175
1176 phy->priv = edc_sr;
1177 return 0;
1178}
1179
1180/*
1181 * Setup EDC and other parameters for operation with an TWINAX module.
1182 */
1183static int ael2020_setup_twinax_edc(struct cphy *phy, int modtype)
1184{
1185 /* set uC to 40MHz */
1186 static struct reg_val uCclock40MHz[] = {
1187 { MDIO_MMD_PMAPMD, 0xff28, 0xffff, 0x4001 },
1188 { MDIO_MMD_PMAPMD, 0xff2a, 0xffff, 0x0002 },
1189 { 0, 0, 0, 0 }
1190 };
1191
1192 /* activate uC clock */
1193 static struct reg_val uCclockActivate[] = {
1194 { MDIO_MMD_PMAPMD, 0xd000, 0xffff, 0x5200 },
1195 { 0, 0, 0, 0 }
1196 };
1197
1198 /* set PC to start of SRAM and activate uC */
1199 static struct reg_val uCactivate[] = {
1200 { MDIO_MMD_PMAPMD, 0xd080, 0xffff, 0x0100 },
1201 { MDIO_MMD_PMAPMD, 0xd092, 0xffff, 0x0000 },
1202 { 0, 0, 0, 0 }
1203 };
1204
1205 /* TWINAX EDC firmware */
1206 static u16 twinax_edc[] = {
1207 0xd800, 0x4009,
1208 0xd801, 0x2fff,
1209 0xd802, 0x300f,
1210 0xd803, 0x40aa,
1211 0xd804, 0x401c,
1212 0xd805, 0x401e,
1213 0xd806, 0x2ff4,
1214 0xd807, 0x3dc4,
1215 0xd808, 0x2035,
1216 0xd809, 0x3035,
1217 0xd80a, 0x6524,
1218 0xd80b, 0x2cb2,
1219 0xd80c, 0x3012,
1220 0xd80d, 0x1002,
1221 0xd80e, 0x26e2,
1222 0xd80f, 0x3022,
1223 0xd810, 0x1002,
1224 0xd811, 0x27d2,
1225 0xd812, 0x3022,
1226 0xd813, 0x1002,
1227 0xd814, 0x2822,
1228 0xd815, 0x3012,
1229 0xd816, 0x1002,
1230 0xd817, 0x2492,
1231 0xd818, 0x3022,
1232 0xd819, 0x1002,
1233 0xd81a, 0x2772,
1234 0xd81b, 0x3012,
1235 0xd81c, 0x1002,
1236 0xd81d, 0x23d2,
1237 0xd81e, 0x3022,
1238 0xd81f, 0x1002,
1239 0xd820, 0x22cd,
1240 0xd821, 0x301d,
1241 0xd822, 0x27f2,
1242 0xd823, 0x3022,
1243 0xd824, 0x1002,
1244 0xd825, 0x5553,
1245 0xd826, 0x0307,
1246 0xd827, 0x2522,
1247 0xd828, 0x3022,
1248 0xd829, 0x1002,
1249 0xd82a, 0x2142,
1250 0xd82b, 0x3012,
1251 0xd82c, 0x1002,
1252 0xd82d, 0x4016,
1253 0xd82e, 0x5e63,
1254 0xd82f, 0x0344,
1255 0xd830, 0x2142,
1256 0xd831, 0x3012,
1257 0xd832, 0x1002,
1258 0xd833, 0x400e,
1259 0xd834, 0x2522,
1260 0xd835, 0x3022,
1261 0xd836, 0x1002,
1262 0xd837, 0x2b52,
1263 0xd838, 0x3012,
1264 0xd839, 0x1002,
1265 0xd83a, 0x2742,
1266 0xd83b, 0x3022,
1267 0xd83c, 0x1002,
1268 0xd83d, 0x25e2,
1269 0xd83e, 0x3022,
1270 0xd83f, 0x1002,
1271 0xd840, 0x2fa4,
1272 0xd841, 0x3dc4,
1273 0xd842, 0x6624,
1274 0xd843, 0x414b,
1275 0xd844, 0x56b3,
1276 0xd845, 0x03c6,
1277 0xd846, 0x866b,
1278 0xd847, 0x400c,
1279 0xd848, 0x2712,
1280 0xd849, 0x3012,
1281 0xd84a, 0x1002,
1282 0xd84b, 0x2c4b,
1283 0xd84c, 0x309b,
1284 0xd84d, 0x56b3,
1285 0xd84e, 0x03c3,
1286 0xd84f, 0x866b,
1287 0xd850, 0x400c,
1288 0xd851, 0x2272,
1289 0xd852, 0x3022,
1290 0xd853, 0x1002,
1291 0xd854, 0x2742,
1292 0xd855, 0x3022,
1293 0xd856, 0x1002,
1294 0xd857, 0x25e2,
1295 0xd858, 0x3022,
1296 0xd859, 0x1002,
1297 0xd85a, 0x2fb4,
1298 0xd85b, 0x3dc4,
1299 0xd85c, 0x6624,
1300 0xd85d, 0x56b3,
1301 0xd85e, 0x03c3,
1302 0xd85f, 0x866b,
1303 0xd860, 0x401c,
1304 0xd861, 0x2c45,
1305 0xd862, 0x3095,
1306 0xd863, 0x5b53,
1307 0xd864, 0x2372,
1308 0xd865, 0x3012,
1309 0xd866, 0x13c2,
1310 0xd867, 0x5cc3,
1311 0xd868, 0x2712,
1312 0xd869, 0x3012,
1313 0xd86a, 0x1312,
1314 0xd86b, 0x2b52,
1315 0xd86c, 0x3012,
1316 0xd86d, 0x1002,
1317 0xd86e, 0x2742,
1318 0xd86f, 0x3022,
1319 0xd870, 0x1002,
1320 0xd871, 0x2582,
1321 0xd872, 0x3022,
1322 0xd873, 0x1002,
1323 0xd874, 0x2142,
1324 0xd875, 0x3012,
1325 0xd876, 0x1002,
1326 0xd877, 0x628f,
1327 0xd878, 0x2985,
1328 0xd879, 0x33a5,
1329 0xd87a, 0x25e2,
1330 0xd87b, 0x3022,
1331 0xd87c, 0x1002,
1332 0xd87d, 0x5653,
1333 0xd87e, 0x03d2,
1334 0xd87f, 0x401e,
1335 0xd880, 0x6f72,
1336 0xd881, 0x1002,
1337 0xd882, 0x628f,
1338 0xd883, 0x2304,
1339 0xd884, 0x3c84,
1340 0xd885, 0x6436,
1341 0xd886, 0xdff4,
1342 0xd887, 0x6436,
1343 0xd888, 0x2ff5,
1344 0xd889, 0x3005,
1345 0xd88a, 0x8656,
1346 0xd88b, 0xdfba,
1347 0xd88c, 0x56a3,
1348 0xd88d, 0xd05a,
1349 0xd88e, 0x2972,
1350 0xd88f, 0x3012,
1351 0xd890, 0x1392,
1352 0xd891, 0xd05a,
1353 0xd892, 0x56a3,
1354 0xd893, 0xdfba,
1355 0xd894, 0x0383,
1356 0xd895, 0x6f72,
1357 0xd896, 0x1002,
1358 0xd897, 0x2b45,
1359 0xd898, 0x3005,
1360 0xd899, 0x4178,
1361 0xd89a, 0x5653,
1362 0xd89b, 0x0384,
1363 0xd89c, 0x2a62,
1364 0xd89d, 0x3012,
1365 0xd89e, 0x1002,
1366 0xd89f, 0x2f05,
1367 0xd8a0, 0x3005,
1368 0xd8a1, 0x41c8,
1369 0xd8a2, 0x5653,
1370 0xd8a3, 0x0382,
1371 0xd8a4, 0x0002,
1372 0xd8a5, 0x4218,
1373 0xd8a6, 0x2474,
1374 0xd8a7, 0x3c84,
1375 0xd8a8, 0x6437,
1376 0xd8a9, 0xdff4,
1377 0xd8aa, 0x6437,
1378 0xd8ab, 0x2ff5,
1379 0xd8ac, 0x3c05,
1380 0xd8ad, 0x8757,
1381 0xd8ae, 0xb888,
1382 0xd8af, 0x9787,
1383 0xd8b0, 0xdff4,
1384 0xd8b1, 0x6724,
1385 0xd8b2, 0x866a,
1386 0xd8b3, 0x6f72,
1387 0xd8b4, 0x1002,
1388 0xd8b5, 0x2641,
1389 0xd8b6, 0x3021,
1390 0xd8b7, 0x1001,
1391 0xd8b8, 0xc620,
1392 0xd8b9, 0x0000,
1393 0xd8ba, 0xc621,
1394 0xd8bb, 0x0000,
1395 0xd8bc, 0xc622,
1396 0xd8bd, 0x00ce,
1397 0xd8be, 0xc623,
1398 0xd8bf, 0x007f,
1399 0xd8c0, 0xc624,
1400 0xd8c1, 0x0032,
1401 0xd8c2, 0xc625,
1402 0xd8c3, 0x0000,
1403 0xd8c4, 0xc627,
1404 0xd8c5, 0x0000,
1405 0xd8c6, 0xc628,
1406 0xd8c7, 0x0000,
1407 0xd8c8, 0xc62c,
1408 0xd8c9, 0x0000,
1409 0xd8ca, 0x0000,
1410 0xd8cb, 0x2641,
1411 0xd8cc, 0x3021,
1412 0xd8cd, 0x1001,
1413 0xd8ce, 0xc502,
1414 0xd8cf, 0x53ac,
1415 0xd8d0, 0xc503,
1416 0xd8d1, 0x2cd3,
1417 0xd8d2, 0xc600,
1418 0xd8d3, 0x2a6e,
1419 0xd8d4, 0xc601,
1420 0xd8d5, 0x2a2c,
1421 0xd8d6, 0xc605,
1422 0xd8d7, 0x5557,
1423 0xd8d8, 0xc60c,
1424 0xd8d9, 0x5400,
1425 0xd8da, 0xc710,
1426 0xd8db, 0x0700,
1427 0xd8dc, 0xc711,
1428 0xd8dd, 0x0f06,
1429 0xd8de, 0xc718,
1430 0xd8df, 0x0700,
1431 0xd8e0, 0xc719,
1432 0xd8e1, 0x0f06,
1433 0xd8e2, 0xc720,
1434 0xd8e3, 0x4700,
1435 0xd8e4, 0xc721,
1436 0xd8e5, 0x0f06,
1437 0xd8e6, 0xc728,
1438 0xd8e7, 0x0700,
1439 0xd8e8, 0xc729,
1440 0xd8e9, 0x1207,
1441 0xd8ea, 0xc801,
1442 0xd8eb, 0x7f50,
1443 0xd8ec, 0xc802,
1444 0xd8ed, 0x7760,
1445 0xd8ee, 0xc803,
1446 0xd8ef, 0x7fce,
1447 0xd8f0, 0xc804,
1448 0xd8f1, 0x520e,
1449 0xd8f2, 0xc805,
1450 0xd8f3, 0x5c11,
1451 0xd8f4, 0xc806,
1452 0xd8f5, 0x3c51,
1453 0xd8f6, 0xc807,
1454 0xd8f7, 0x4061,
1455 0xd8f8, 0xc808,
1456 0xd8f9, 0x49c1,
1457 0xd8fa, 0xc809,
1458 0xd8fb, 0x3840,
1459 0xd8fc, 0xc80a,
1460 0xd8fd, 0x0000,
1461 0xd8fe, 0xc821,
1462 0xd8ff, 0x0002,
1463 0xd900, 0xc822,
1464 0xd901, 0x0046,
1465 0xd902, 0xc844,
1466 0xd903, 0x182f,
1467 0xd904, 0xc013,
1468 0xd905, 0xf341,
1469 0xd906, 0xc084,
1470 0xd907, 0x0030,
1471 0xd908, 0xc904,
1472 0xd909, 0x1401,
1473 0xd90a, 0xcb0c,
1474 0xd90b, 0x0004,
1475 0xd90c, 0xcb0e,
1476 0xd90d, 0xa00a,
1477 0xd90e, 0xcb0f,
1478 0xd90f, 0xc0c0,
1479 0xd910, 0xcb10,
1480 0xd911, 0xc0c0,
1481 0xd912, 0xcb11,
1482 0xd913, 0x00a0,
1483 0xd914, 0xcb12,
1484 0xd915, 0x0007,
1485 0xd916, 0xc241,
1486 0xd917, 0xa000,
1487 0xd918, 0xc243,
1488 0xd919, 0x7fe0,
1489 0xd91a, 0xc604,
1490 0xd91b, 0x000e,
1491 0xd91c, 0xc609,
1492 0xd91d, 0x00f5,
1493 0xd91e, 0xc611,
1494 0xd91f, 0x000e,
1495 0xd920, 0xc660,
1496 0xd921, 0x9600,
1497 0xd922, 0xc687,
1498 0xd923, 0x0004,
1499 0xd924, 0xc60a,
1500 0xd925, 0x04f5,
1501 0xd926, 0x0000,
1502 0xd927, 0x2641,
1503 0xd928, 0x3021,
1504 0xd929, 0x1001,
1505 0xd92a, 0xc620,
1506 0xd92b, 0x14e5,
1507 0xd92c, 0xc621,
1508 0xd92d, 0xc53d,
1509 0xd92e, 0xc622,
1510 0xd92f, 0x3cbe,
1511 0xd930, 0xc623,
1512 0xd931, 0x4452,
1513 0xd932, 0xc624,
1514 0xd933, 0xc5c5,
1515 0xd934, 0xc625,
1516 0xd935, 0xe01e,
1517 0xd936, 0xc627,
1518 0xd937, 0x0000,
1519 0xd938, 0xc628,
1520 0xd939, 0x0000,
1521 0xd93a, 0xc62c,
1522 0xd93b, 0x0000,
1523 0xd93c, 0x0000,
1524 0xd93d, 0x2b84,
1525 0xd93e, 0x3c74,
1526 0xd93f, 0x6435,
1527 0xd940, 0xdff4,
1528 0xd941, 0x6435,
1529 0xd942, 0x2806,
1530 0xd943, 0x3006,
1531 0xd944, 0x8565,
1532 0xd945, 0x2b24,
1533 0xd946, 0x3c24,
1534 0xd947, 0x6436,
1535 0xd948, 0x1002,
1536 0xd949, 0x2b24,
1537 0xd94a, 0x3c24,
1538 0xd94b, 0x6436,
1539 0xd94c, 0x4045,
1540 0xd94d, 0x8656,
1541 0xd94e, 0x5663,
1542 0xd94f, 0x0302,
1543 0xd950, 0x401e,
1544 0xd951, 0x1002,
1545 0xd952, 0x2807,
1546 0xd953, 0x31a7,
1547 0xd954, 0x20c4,
1548 0xd955, 0x3c24,
1549 0xd956, 0x6724,
1550 0xd957, 0x1002,
1551 0xd958, 0x2807,
1552 0xd959, 0x3187,
1553 0xd95a, 0x20c4,
1554 0xd95b, 0x3c24,
1555 0xd95c, 0x6724,
1556 0xd95d, 0x1002,
1557 0xd95e, 0x24f4,
1558 0xd95f, 0x3c64,
1559 0xd960, 0x6436,
1560 0xd961, 0xdff4,
1561 0xd962, 0x6436,
1562 0xd963, 0x1002,
1563 0xd964, 0x2006,
1564 0xd965, 0x3d76,
1565 0xd966, 0xc161,
1566 0xd967, 0x6134,
1567 0xd968, 0x6135,
1568 0xd969, 0x5443,
1569 0xd96a, 0x0303,
1570 0xd96b, 0x6524,
1571 0xd96c, 0x00fb,
1572 0xd96d, 0x1002,
1573 0xd96e, 0x20d4,
1574 0xd96f, 0x3c24,
1575 0xd970, 0x2025,
1576 0xd971, 0x3005,
1577 0xd972, 0x6524,
1578 0xd973, 0x1002,
1579 0xd974, 0xd019,
1580 0xd975, 0x2104,
1581 0xd976, 0x3c24,
1582 0xd977, 0x2105,
1583 0xd978, 0x3805,
1584 0xd979, 0x6524,
1585 0xd97a, 0xdff4,
1586 0xd97b, 0x4005,
1587 0xd97c, 0x6524,
1588 0xd97d, 0x2e8d,
1589 0xd97e, 0x303d,
1590 0xd97f, 0x2408,
1591 0xd980, 0x35d8,
1592 0xd981, 0x5dd3,
1593 0xd982, 0x0307,
1594 0xd983, 0x8887,
1595 0xd984, 0x63a7,
1596 0xd985, 0x8887,
1597 0xd986, 0x63a7,
1598 0xd987, 0xdffd,
1599 0xd988, 0x00f9,
1600 0xd989, 0x1002,
1601 0xd98a, 0x0000,
1602 };
1603 int i, err;
1604
1605 /* set uC clock and activate it */
1606 err = set_phy_regs(phy, uCclock40MHz);
1607 msleep(500);
1608 if (err)
1609 return err;
1610 err = set_phy_regs(phy, uCclockActivate);
1611 msleep(500);
1612 if (err)
1613 return err;
1614
1615 /* write TWINAX EDC firmware into PHY */
1616 for (i = 0; i < ARRAY_SIZE(twinax_edc) && !err; i += 2)
1617 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, twinax_edc[i],
1618 twinax_edc[i + 1]);
1619 /* activate uC */
1620 err = set_phy_regs(phy, uCactivate);
1621 if (!err)
1622 phy->priv = edc_twinax;
1623 return err;
1624}
1625
1626/*
1627 * Return Module Type.
1628 */
1629static int ael2020_get_module_type(struct cphy *phy, int delay_ms)
1630{
1631 int v;
1632 unsigned int stat;
1633
1634 v = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2020_GPIO_STAT, &stat);
1635 if (v)
1636 return v;
1637
1638 if (stat & (0x1 << (AEL2020_GPIO_MODDET*4))) {
1639 /* module absent */
1640 return phy_modtype_none;
1641 }
1642
1643 return ael2xxx_get_module_type(phy, delay_ms);
1644}
1645
1646/*
1647 * Enable PHY interrupts. We enable "Module Detection" interrupts (on any
1648 * state transition) and then generic Link Alarm Status Interrupt (LASI).
1649 */
1650static int ael2020_intr_enable(struct cphy *phy)
1651{
1652 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2020_GPIO_CTRL,
1653 0x2 << (AEL2020_GPIO_MODDET*4));
1654 return err ? err : t3_phy_lasi_intr_enable(phy);
1655}
1656
1657/*
1658 * Disable PHY interrupts. The mirror of the above ...
1659 */
1660static int ael2020_intr_disable(struct cphy *phy)
1661{
1662 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2020_GPIO_CTRL,
1663 0x1 << (AEL2020_GPIO_MODDET*4));
1664 return err ? err : t3_phy_lasi_intr_disable(phy);
1665}
1666
1667/*
1668 * Clear PHY interrupt state.
1669 */
1670static int ael2020_intr_clear(struct cphy *phy)
1671{
1672 /*
1673 * The GPIO Interrupt register on the AEL2020 is a "Latching High"
1674 * (LH) register which is cleared to the current state when it's read.
1675 * Thus, we simply read the register and discard the result.
1676 */
1677 unsigned int stat;
1678 int err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2020_GPIO_INTR, &stat);
1679 return err ? err : t3_phy_lasi_intr_clear(phy);
1680}
1681
1682/*
1683 * Reset the PHY and put it into a canonical operating state.
1684 */
1685static int ael2020_reset(struct cphy *phy, int wait)
1686{
1687 static struct reg_val regs0[] = {
1688 /* Erratum #2: CDRLOL asserted, causing PMA link down status */
1689 { MDIO_MMD_PMAPMD, 0xc003, 0xffff, 0x3101 },
1690
1691 /* force XAUI to send LF when RX_LOS is asserted */
1692 { MDIO_MMD_PMAPMD, 0xcd40, 0xffff, 0x0001 },
1693
1694 /* RX_LOS pin is active high */
1695 { MDIO_MMD_PMAPMD, AEL_OPT_SETTINGS,
1696 0x0020, 0x0020 },
1697
1698 /* output Module's Loss Of Signal (LOS) to LED */
1699 { MDIO_MMD_PMAPMD, AEL2020_GPIO_CFG+AEL2020_GPIO_LSTAT,
1700 0xffff, 0x0004 },
1701 { MDIO_MMD_PMAPMD, AEL2020_GPIO_CTRL,
1702 0xffff, 0x8 << (AEL2020_GPIO_LSTAT*4) },
1703
1704 /* end */
1705 { 0, 0, 0, 0 }
1706 };
1707 int err;
1708 unsigned int lasi_ctrl;
1709
1710 /* grab current interrupt state */
1711 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL,
1712 &lasi_ctrl);
1713 if (err)
1714 return err;
1715
1716 err = t3_phy_reset(phy, MDIO_MMD_PMAPMD, 125);
1717 if (err)
1718 return err;
1719 msleep(100);
1720
1721 /* basic initialization for all module types */
1722 phy->priv = edc_none;
1723 err = set_phy_regs(phy, regs0);
1724 if (err)
1725 return err;
1726
1727 /* determine module type and perform appropriate initialization */
1728 err = ael2020_get_module_type(phy, 0);
1729 if (err < 0)
1730 return err;
1731 phy->modtype = (u8)err;
1732 if (err == phy_modtype_twinax || err == phy_modtype_twinax_long)
1733 err = ael2020_setup_twinax_edc(phy, err);
1734 else
1735 err = ael2020_setup_sr_edc(phy);
1736 if (err)
1737 return err;
1738
1739 /* reset wipes out interrupts, reenable them if they were on */
1740 if (lasi_ctrl & 1)
1741 err = ael2005_intr_enable(phy);
1742 return err;
1743}
1744
1745/*
1746 * Handle a PHY interrupt.
1747 */
1748static int ael2020_intr_handler(struct cphy *phy)
1749{
1750 unsigned int stat;
1751 int ret, edc_needed, cause = 0;
1752
1753 ret = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2020_GPIO_INTR, &stat);
1754 if (ret)
1755 return ret;
1756
1757 if (stat & (0x1 << AEL2020_GPIO_MODDET)) {
1758 /* modules have max 300 ms init time after hot plug */
1759 ret = ael2020_get_module_type(phy, 300);
1760 if (ret < 0)
1761 return ret;
1762
1763 phy->modtype = (u8)ret;
1764 if (ret == phy_modtype_none)
1765 edc_needed = phy->priv; /* on unplug retain EDC */
1766 else if (ret == phy_modtype_twinax ||
1767 ret == phy_modtype_twinax_long)
1768 edc_needed = edc_twinax;
1769 else
1770 edc_needed = edc_sr;
1771
1772 if (edc_needed != phy->priv) {
1773 ret = ael2020_reset(phy, 0);
1774 return ret ? ret : cphy_cause_module_change;
1775 }
1776 cause = cphy_cause_module_change;
1777 }
1778
1779 ret = t3_phy_lasi_intr_handler(phy);
1780 if (ret < 0)
1781 return ret;
1782
1783 ret |= cause;
1784 return ret ? ret : cphy_cause_link_change;
1785}
1786
1787static struct cphy_ops ael2020_ops = {
1788 .reset = ael2020_reset,
1789 .intr_enable = ael2020_intr_enable,
1790 .intr_disable = ael2020_intr_disable,
1791 .intr_clear = ael2020_intr_clear,
1792 .intr_handler = ael2020_intr_handler,
1793 .get_link_status = get_link_status_r,
1794 .power_down = ael1002_power_down,
1795 .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
1796};
1797
1798int t3_ael2020_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr,
1799 const struct mdio_ops *mdio_ops)
1800{
1801 cphy_init(phy, adapter, phy_addr, &ael2020_ops, mdio_ops,
1802 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE |
1803 SUPPORTED_IRQ, "10GBASE-R");
1804 msleep(125);
1805 return 0;
1806}
1807
1808/*
1115 * Get link status for a 10GBASE-X device. 1809 * Get link status for a 10GBASE-X device.
1116 */ 1810 */
1117static int get_link_status_x(struct cphy *phy, int *link_ok, int *speed, 1811static int get_link_status_x(struct cphy *phy, int *link_ok, int *speed,
@@ -1119,12 +1813,15 @@ static int get_link_status_x(struct cphy *phy, int *link_ok, int *speed,
1119{ 1813{
1120 if (link_ok) { 1814 if (link_ok) {
1121 unsigned int stat0, stat1, stat2; 1815 unsigned int stat0, stat1, stat2;
1122 int err = mdio_read(phy, MDIO_DEV_PMA_PMD, PMD_RSD, &stat0); 1816 int err = t3_mdio_read(phy, MDIO_MMD_PMAPMD,
1817 MDIO_PMA_RXDET, &stat0);
1123 1818
1124 if (!err) 1819 if (!err)
1125 err = mdio_read(phy, MDIO_DEV_PCS, PCS_STAT1_X, &stat1); 1820 err = t3_mdio_read(phy, MDIO_MMD_PCS,
1821 MDIO_PCS_10GBX_STAT1, &stat1);
1126 if (!err) 1822 if (!err)
1127 err = mdio_read(phy, MDIO_DEV_XGXS, XS_LN_STAT, &stat2); 1823 err = t3_mdio_read(phy, MDIO_MMD_PHYXS,
1824 MDIO_PHYXS_LNSTAT, &stat2);
1128 if (err) 1825 if (err)
1129 return err; 1826 return err;
1130 *link_ok = (stat0 & (stat1 >> 12) & (stat2 >> 12)) & 1; 1827 *link_ok = (stat0 & (stat1 >> 12) & (stat2 >> 12)) & 1;
@@ -1144,6 +1841,7 @@ static struct cphy_ops qt2045_ops = {
1144 .intr_handler = t3_phy_lasi_intr_handler, 1841 .intr_handler = t3_phy_lasi_intr_handler,
1145 .get_link_status = get_link_status_x, 1842 .get_link_status = get_link_status_x,
1146 .power_down = ael1006_power_down, 1843 .power_down = ael1006_power_down,
1844 .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
1147}; 1845};
1148 1846
1149int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter, 1847int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter,
@@ -1159,9 +1857,10 @@ int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter,
1159 * Some cards where the PHY is supposed to be at address 0 actually 1857 * Some cards where the PHY is supposed to be at address 0 actually
1160 * have it at 1. 1858 * have it at 1.
1161 */ 1859 */
1162 if (!phy_addr && !mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &stat) && 1860 if (!phy_addr &&
1861 !t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &stat) &&
1163 stat == 0xffff) 1862 stat == 0xffff)
1164 phy->addr = 1; 1863 phy->mdio.prtad = 1;
1165 return 0; 1864 return 0;
1166} 1865}
1167 1866
@@ -1175,15 +1874,16 @@ static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok,
1175{ 1874{
1176 if (link_ok) { 1875 if (link_ok) {
1177 unsigned int status; 1876 unsigned int status;
1877 int prtad = phy->mdio.prtad;
1178 1878
1179 status = t3_read_reg(phy->adapter, 1879 status = t3_read_reg(phy->adapter,
1180 XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) | 1880 XGM_REG(A_XGM_SERDES_STAT0, prtad)) |
1181 t3_read_reg(phy->adapter, 1881 t3_read_reg(phy->adapter,
1182 XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) | 1882 XGM_REG(A_XGM_SERDES_STAT1, prtad)) |
1183 t3_read_reg(phy->adapter, 1883 t3_read_reg(phy->adapter,
1184 XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) | 1884 XGM_REG(A_XGM_SERDES_STAT2, prtad)) |
1185 t3_read_reg(phy->adapter, 1885 t3_read_reg(phy->adapter,
1186 XGM_REG(A_XGM_SERDES_STAT3, phy->addr)); 1886 XGM_REG(A_XGM_SERDES_STAT3, prtad));
1187 *link_ok = !(status & F_LOWSIG0); 1887 *link_ok = !(status & F_LOWSIG0);
1188 } 1888 }
1189 if (speed) 1889 if (speed)
@@ -1211,7 +1911,7 @@ static struct cphy_ops xaui_direct_ops = {
1211int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter, 1911int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
1212 int phy_addr, const struct mdio_ops *mdio_ops) 1912 int phy_addr, const struct mdio_ops *mdio_ops)
1213{ 1913{
1214 cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops, 1914 cphy_init(phy, adapter, MDIO_PRTAD_NONE, &xaui_direct_ops, mdio_ops,
1215 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_TP, 1915 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_TP,
1216 "10GBASE-CX4"); 1916 "10GBASE-CX4");
1217 return 0; 1917 return 0;
diff --git a/drivers/net/cxgb3/aq100x.c b/drivers/net/cxgb3/aq100x.c
new file mode 100644
index 000000000000..c51e50d925d0
--- /dev/null
+++ b/drivers/net/cxgb3/aq100x.c
@@ -0,0 +1,355 @@
1/*
2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include "common.h"
34#include "regs.h"
35
36enum {
37 /* MDIO_DEV_PMA_PMD registers */
38 AQ_LINK_STAT = 0xe800,
39 AQ_IMASK_PMA = 0xf000,
40
41 /* MDIO_DEV_XGXS registers */
42 AQ_XAUI_RX_CFG = 0xc400,
43 AQ_XAUI_TX_CFG = 0xe400,
44
45 /* MDIO_DEV_ANEG registers */
46 AQ_100M_CTRL = 0x0010,
47 AQ_10G_CTRL = 0x0020,
48 AQ_1G_CTRL = 0xc400,
49 AQ_ANEG_STAT = 0xc800,
50
51 /* MDIO_DEV_VEND1 registers */
52 AQ_FW_VERSION = 0x0020,
53 AQ_IFLAG_GLOBAL = 0xfc00,
54 AQ_IMASK_GLOBAL = 0xff00,
55};
56
57#define AQBIT(x) (1 << (x))
58#define IMASK_PMA AQBIT(0x2)
59#define IMASK_GLOBAL AQBIT(0xf)
60#define ADV_1G_FULL AQBIT(0xf)
61#define ADV_1G_HALF AQBIT(0xe)
62#define ADV_10G_FULL AQBIT(0xc)
63#define AQ_RESET (AQBIT(0xe) | AQBIT(0xf))
64#define AQ_LOWPOWER AQBIT(0xb)
65
66static int aq100x_reset(struct cphy *phy, int wait)
67{
68 /*
69 * Ignore the caller specified wait time; always wait for the reset to
70 * complete. Can take up to 3s.
71 */
72 int err = t3_phy_reset(phy, MDIO_MMD_VEND1, 3000);
73
74 if (err)
75 CH_WARN(phy->adapter, "PHY%d: reset failed (0x%x).\n",
76 phy->mdio.prtad, err);
77
78 return err;
79}
80
81static int aq100x_intr_enable(struct cphy *phy)
82{
83 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AQ_IMASK_PMA, IMASK_PMA);
84 if (err)
85 return err;
86
87 err = t3_mdio_write(phy, MDIO_MMD_VEND1, AQ_IMASK_GLOBAL, IMASK_GLOBAL);
88 return err;
89}
90
91static int aq100x_intr_disable(struct cphy *phy)
92{
93 return t3_mdio_write(phy, MDIO_MMD_VEND1, AQ_IMASK_GLOBAL, 0);
94}
95
96static int aq100x_intr_clear(struct cphy *phy)
97{
98 unsigned int v;
99
100 t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_IFLAG_GLOBAL, &v);
101 t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &v);
102
103 return 0;
104}
105
106static int aq100x_intr_handler(struct cphy *phy)
107{
108 int err;
109 unsigned int cause, v;
110
111 err = t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_IFLAG_GLOBAL, &cause);
112 if (err)
113 return err;
114
115 /* Read (and reset) the latching version of the status */
116 t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &v);
117
118 return cphy_cause_link_change;
119}
120
121static int aq100x_power_down(struct cphy *phy, int off)
122{
123 return mdio_set_flag(&phy->mdio, phy->mdio.prtad,
124 MDIO_MMD_PMAPMD, MDIO_CTRL1,
125 MDIO_CTRL1_LPOWER, off);
126}
127
128static int aq100x_autoneg_enable(struct cphy *phy)
129{
130 int err;
131
132 err = aq100x_power_down(phy, 0);
133 if (!err)
134 err = mdio_set_flag(&phy->mdio, phy->mdio.prtad,
135 MDIO_MMD_AN, MDIO_CTRL1,
136 BMCR_ANENABLE | BMCR_ANRESTART, 1);
137
138 return err;
139}
140
141static int aq100x_autoneg_restart(struct cphy *phy)
142{
143 int err;
144
145 err = aq100x_power_down(phy, 0);
146 if (!err)
147 err = mdio_set_flag(&phy->mdio, phy->mdio.prtad,
148 MDIO_MMD_AN, MDIO_CTRL1,
149 BMCR_ANENABLE | BMCR_ANRESTART, 1);
150
151 return err;
152}
153
154static int aq100x_advertise(struct cphy *phy, unsigned int advertise_map)
155{
156 unsigned int adv;
157 int err;
158
159 /* 10G advertisement */
160 adv = 0;
161 if (advertise_map & ADVERTISED_10000baseT_Full)
162 adv |= ADV_10G_FULL;
163 err = t3_mdio_change_bits(phy, MDIO_MMD_AN, AQ_10G_CTRL,
164 ADV_10G_FULL, adv);
165 if (err)
166 return err;
167
168 /* 1G advertisement */
169 adv = 0;
170 if (advertise_map & ADVERTISED_1000baseT_Full)
171 adv |= ADV_1G_FULL;
172 if (advertise_map & ADVERTISED_1000baseT_Half)
173 adv |= ADV_1G_HALF;
174 err = t3_mdio_change_bits(phy, MDIO_MMD_AN, AQ_1G_CTRL,
175 ADV_1G_FULL | ADV_1G_HALF, adv);
176 if (err)
177 return err;
178
179 /* 100M, pause advertisement */
180 adv = 0;
181 if (advertise_map & ADVERTISED_100baseT_Half)
182 adv |= ADVERTISE_100HALF;
183 if (advertise_map & ADVERTISED_100baseT_Full)
184 adv |= ADVERTISE_100FULL;
185 if (advertise_map & ADVERTISED_Pause)
186 adv |= ADVERTISE_PAUSE_CAP;
187 if (advertise_map & ADVERTISED_Asym_Pause)
188 adv |= ADVERTISE_PAUSE_ASYM;
189 err = t3_mdio_change_bits(phy, MDIO_MMD_AN, AQ_100M_CTRL, 0xfe0, adv);
190
191 return err;
192}
193
194static int aq100x_set_loopback(struct cphy *phy, int mmd, int dir, int enable)
195{
196 return mdio_set_flag(&phy->mdio, phy->mdio.prtad,
197 MDIO_MMD_PMAPMD, MDIO_CTRL1,
198 BMCR_LOOPBACK, enable);
199}
200
201static int aq100x_set_speed_duplex(struct cphy *phy, int speed, int duplex)
202{
203 /* no can do */
204 return -1;
205}
206
207static int aq100x_get_link_status(struct cphy *phy, int *link_ok,
208 int *speed, int *duplex, int *fc)
209{
210 int err;
211 unsigned int v;
212
213 if (link_ok) {
214 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AQ_LINK_STAT, &v);
215 if (err)
216 return err;
217
218 *link_ok = v & 1;
219 if (!*link_ok)
220 return 0;
221 }
222
223 err = t3_mdio_read(phy, MDIO_MMD_AN, AQ_ANEG_STAT, &v);
224 if (err)
225 return err;
226
227 if (speed) {
228 switch (v & 0x6) {
229 case 0x6:
230 *speed = SPEED_10000;
231 break;
232 case 0x4:
233 *speed = SPEED_1000;
234 break;
235 case 0x2:
236 *speed = SPEED_100;
237 break;
238 case 0x0:
239 *speed = SPEED_10;
240 break;
241 }
242 }
243
244 if (duplex)
245 *duplex = v & 1 ? DUPLEX_FULL : DUPLEX_HALF;
246
247 return 0;
248}
249
250static struct cphy_ops aq100x_ops = {
251 .reset = aq100x_reset,
252 .intr_enable = aq100x_intr_enable,
253 .intr_disable = aq100x_intr_disable,
254 .intr_clear = aq100x_intr_clear,
255 .intr_handler = aq100x_intr_handler,
256 .autoneg_enable = aq100x_autoneg_enable,
257 .autoneg_restart = aq100x_autoneg_restart,
258 .advertise = aq100x_advertise,
259 .set_loopback = aq100x_set_loopback,
260 .set_speed_duplex = aq100x_set_speed_duplex,
261 .get_link_status = aq100x_get_link_status,
262 .power_down = aq100x_power_down,
263 .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
264};
265
266int t3_aq100x_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr,
267 const struct mdio_ops *mdio_ops)
268{
269 unsigned int v, v2, gpio, wait;
270 int err;
271
272 cphy_init(phy, adapter, phy_addr, &aq100x_ops, mdio_ops,
273 SUPPORTED_1000baseT_Full | SUPPORTED_10000baseT_Full |
274 SUPPORTED_Autoneg | SUPPORTED_AUI, "1000/10GBASE-T");
275
276 /*
277 * The PHY has been out of reset ever since the system powered up. So
278 * we do a hard reset over here.
279 */
280 gpio = phy_addr ? F_GPIO10_OUT_VAL : F_GPIO6_OUT_VAL;
281 t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, gpio, 0);
282 msleep(1);
283 t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, gpio, gpio);
284
285 /*
286 * Give it enough time to load the firmware and get ready for mdio.
287 */
288 msleep(1000);
289 wait = 500; /* in 10ms increments */
290 do {
291 err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v);
292 if (err || v == 0xffff) {
293
294 /* Allow prep_adapter to succeed when ffff is read */
295
296 CH_WARN(adapter, "PHY%d: reset failed (0x%x, 0x%x).\n",
297 phy_addr, err, v);
298 goto done;
299 }
300
301 v &= AQ_RESET;
302 if (v)
303 msleep(10);
304 } while (v && --wait);
305 if (v) {
306 CH_WARN(adapter, "PHY%d: reset timed out (0x%x).\n",
307 phy_addr, v);
308
309 goto done; /* let prep_adapter succeed */
310 }
311
312 /* Datasheet says 3s max but this has been observed */
313 wait = (500 - wait) * 10 + 1000;
314 if (wait > 3000)
315 CH_WARN(adapter, "PHY%d: reset took %ums\n", phy_addr, wait);
316
317 /* Firmware version check. */
318 t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_FW_VERSION, &v);
319 if (v != 30) {
320 CH_WARN(adapter, "PHY%d: unsupported firmware %d\n",
321 phy_addr, v);
322 return 0; /* allow t3_prep_adapter to succeed */
323 }
324
325 /*
326 * The PHY should start in really-low-power mode. Prepare it for normal
327 * operations.
328 */
329 err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v);
330 if (err)
331 return err;
332 if (v & AQ_LOWPOWER) {
333 err = t3_mdio_change_bits(phy, MDIO_MMD_VEND1, MDIO_CTRL1,
334 AQ_LOWPOWER, 0);
335 if (err)
336 return err;
337 msleep(10);
338 } else
339 CH_WARN(adapter, "PHY%d does not start in low power mode.\n",
340 phy_addr);
341
342 /*
343 * Verify XAUI settings, but let prep succeed no matter what.
344 */
345 v = v2 = 0;
346 t3_mdio_read(phy, MDIO_MMD_PHYXS, AQ_XAUI_RX_CFG, &v);
347 t3_mdio_read(phy, MDIO_MMD_PHYXS, AQ_XAUI_TX_CFG, &v2);
348 if (v != 0x1b || v2 != 0x1b)
349 CH_WARN(adapter,
350 "PHY%d: incorrect XAUI settings (0x%x, 0x%x).\n",
351 phy_addr, v, v2);
352
353done:
354 return err;
355}
diff --git a/drivers/net/cxgb3/common.h b/drivers/net/cxgb3/common.h
index e508dc32f3ec..d21b705501a9 100644
--- a/drivers/net/cxgb3/common.h
+++ b/drivers/net/cxgb3/common.h
@@ -39,7 +39,7 @@
39#include <linux/init.h> 39#include <linux/init.h>
40#include <linux/netdevice.h> 40#include <linux/netdevice.h>
41#include <linux/ethtool.h> 41#include <linux/ethtool.h>
42#include <linux/mii.h> 42#include <linux/mdio.h>
43#include "version.h" 43#include "version.h"
44 44
45#define CH_ERR(adap, fmt, ...) dev_err(&adap->pdev->dev, fmt, ## __VA_ARGS__) 45#define CH_ERR(adap, fmt, ...) dev_err(&adap->pdev->dev, fmt, ## __VA_ARGS__)
@@ -184,10 +184,11 @@ struct cphy;
184struct adapter; 184struct adapter;
185 185
186struct mdio_ops { 186struct mdio_ops {
187 int (*read)(struct adapter *adapter, int phy_addr, int mmd_addr, 187 int (*read)(struct net_device *dev, int phy_addr, int mmd_addr,
188 int reg_addr, unsigned int *val); 188 u16 reg_addr);
189 int (*write)(struct adapter *adapter, int phy_addr, int mmd_addr, 189 int (*write)(struct net_device *dev, int phy_addr, int mmd_addr,
190 int reg_addr, unsigned int val); 190 u16 reg_addr, u16 val);
191 unsigned mode_support;
191}; 192};
192 193
193struct adapter_info { 194struct adapter_info {
@@ -520,27 +521,6 @@ enum {
520 MAC_RXFIFO_SIZE = 32768 521 MAC_RXFIFO_SIZE = 32768
521}; 522};
522 523
523/* IEEE 802.3 specified MDIO devices */
524enum {
525 MDIO_DEV_PMA_PMD = 1,
526 MDIO_DEV_WIS = 2,
527 MDIO_DEV_PCS = 3,
528 MDIO_DEV_XGXS = 4,
529 MDIO_DEV_ANEG = 7,
530 MDIO_DEV_VEND1 = 30,
531 MDIO_DEV_VEND2 = 31
532};
533
534/* LASI control and status registers */
535enum {
536 RX_ALARM_CTRL = 0x9000,
537 TX_ALARM_CTRL = 0x9001,
538 LASI_CTRL = 0x9002,
539 RX_ALARM_STAT = 0x9003,
540 TX_ALARM_STAT = 0x9004,
541 LASI_STAT = 0x9005
542};
543
544/* PHY loopback direction */ 524/* PHY loopback direction */
545enum { 525enum {
546 PHY_LOOPBACK_TX = 1, 526 PHY_LOOPBACK_TX = 1,
@@ -583,11 +563,12 @@ struct cphy_ops {
583 int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed, 563 int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
584 int *duplex, int *fc); 564 int *duplex, int *fc);
585 int (*power_down)(struct cphy *phy, int enable); 565 int (*power_down)(struct cphy *phy, int enable);
566
567 u32 mmds;
586}; 568};
587 569
588/* A PHY instance */ 570/* A PHY instance */
589struct cphy { 571struct cphy {
590 u8 addr; /* PHY address */
591 u8 modtype; /* PHY module type */ 572 u8 modtype; /* PHY module type */
592 short priv; /* scratch pad */ 573 short priv; /* scratch pad */
593 unsigned int caps; /* PHY capabilities */ 574 unsigned int caps; /* PHY capabilities */
@@ -595,23 +576,23 @@ struct cphy {
595 const char *desc; /* PHY description */ 576 const char *desc; /* PHY description */
596 unsigned long fifo_errors; /* FIFO over/under-flows */ 577 unsigned long fifo_errors; /* FIFO over/under-flows */
597 const struct cphy_ops *ops; /* PHY operations */ 578 const struct cphy_ops *ops; /* PHY operations */
598 int (*mdio_read)(struct adapter *adapter, int phy_addr, int mmd_addr, 579 struct mdio_if_info mdio;
599 int reg_addr, unsigned int *val);
600 int (*mdio_write)(struct adapter *adapter, int phy_addr, int mmd_addr,
601 int reg_addr, unsigned int val);
602}; 580};
603 581
604/* Convenience MDIO read/write wrappers */ 582/* Convenience MDIO read/write wrappers */
605static inline int mdio_read(struct cphy *phy, int mmd, int reg, 583static inline int t3_mdio_read(struct cphy *phy, int mmd, int reg,
606 unsigned int *valp) 584 unsigned int *valp)
607{ 585{
608 return phy->mdio_read(phy->adapter, phy->addr, mmd, reg, valp); 586 int rc = phy->mdio.mdio_read(phy->mdio.dev, phy->mdio.prtad, mmd, reg);
587 *valp = (rc >= 0) ? rc : -1;
588 return (rc >= 0) ? 0 : rc;
609} 589}
610 590
611static inline int mdio_write(struct cphy *phy, int mmd, int reg, 591static inline int t3_mdio_write(struct cphy *phy, int mmd, int reg,
612 unsigned int val) 592 unsigned int val)
613{ 593{
614 return phy->mdio_write(phy->adapter, phy->addr, mmd, reg, val); 594 return phy->mdio.mdio_write(phy->mdio.dev, phy->mdio.prtad, mmd,
595 reg, val);
615} 596}
616 597
617/* Convenience initializer */ 598/* Convenience initializer */
@@ -620,14 +601,16 @@ static inline void cphy_init(struct cphy *phy, struct adapter *adapter,
620 const struct mdio_ops *mdio_ops, 601 const struct mdio_ops *mdio_ops,
621 unsigned int caps, const char *desc) 602 unsigned int caps, const char *desc)
622{ 603{
623 phy->addr = phy_addr;
624 phy->caps = caps; 604 phy->caps = caps;
625 phy->adapter = adapter; 605 phy->adapter = adapter;
626 phy->desc = desc; 606 phy->desc = desc;
627 phy->ops = phy_ops; 607 phy->ops = phy_ops;
628 if (mdio_ops) { 608 if (mdio_ops) {
629 phy->mdio_read = mdio_ops->read; 609 phy->mdio.prtad = phy_addr;
630 phy->mdio_write = mdio_ops->write; 610 phy->mdio.mmds = phy_ops->mmds;
611 phy->mdio.mode_support = mdio_ops->mode_support;
612 phy->mdio.mdio_read = mdio_ops->read;
613 phy->mdio.mdio_write = mdio_ops->write;
631 } 614 }
632} 615}
633 616
@@ -819,8 +802,12 @@ int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
819 int phy_addr, const struct mdio_ops *mdio_ops); 802 int phy_addr, const struct mdio_ops *mdio_ops);
820int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter, 803int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter,
821 int phy_addr, const struct mdio_ops *mdio_ops); 804 int phy_addr, const struct mdio_ops *mdio_ops);
805int t3_ael2020_phy_prep(struct cphy *phy, struct adapter *adapter,
806 int phy_addr, const struct mdio_ops *mdio_ops);
822int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr, 807int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr,
823 const struct mdio_ops *mdio_ops); 808 const struct mdio_ops *mdio_ops);
824int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter, 809int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
825 int phy_addr, const struct mdio_ops *mdio_ops); 810 int phy_addr, const struct mdio_ops *mdio_ops);
811int t3_aq100x_phy_prep(struct cphy *phy, struct adapter *adapter,
812 int phy_addr, const struct mdio_ops *mdio_ops);
826#endif /* __CHELSIO_COMMON_H */ 813#endif /* __CHELSIO_COMMON_H */
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c
index 17858b9a5830..aef3ab21f5f7 100644
--- a/drivers/net/cxgb3/cxgb3_main.c
+++ b/drivers/net/cxgb3/cxgb3_main.c
@@ -37,7 +37,7 @@
37#include <linux/netdevice.h> 37#include <linux/netdevice.h>
38#include <linux/etherdevice.h> 38#include <linux/etherdevice.h>
39#include <linux/if_vlan.h> 39#include <linux/if_vlan.h>
40#include <linux/mii.h> 40#include <linux/mdio.h>
41#include <linux/sockios.h> 41#include <linux/sockios.h>
42#include <linux/workqueue.h> 42#include <linux/workqueue.h>
43#include <linux/proc_fs.h> 43#include <linux/proc_fs.h>
@@ -91,6 +91,8 @@ static const struct pci_device_id cxgb3_pci_tbl[] = {
91 CH_DEVICE(0x31, 3), /* T3B20 */ 91 CH_DEVICE(0x31, 3), /* T3B20 */
92 CH_DEVICE(0x32, 1), /* T3B02 */ 92 CH_DEVICE(0x32, 1), /* T3B02 */
93 CH_DEVICE(0x35, 6), /* T3C20-derived T3C10 */ 93 CH_DEVICE(0x35, 6), /* T3C20-derived T3C10 */
94 CH_DEVICE(0x36, 3), /* S320E-CR */
95 CH_DEVICE(0x37, 7), /* N320E-G2 */
94 {0,} 96 {0,}
95}; 97};
96 98
@@ -1593,7 +1595,7 @@ static int get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1593 } 1595 }
1594 1596
1595 cmd->port = (cmd->supported & SUPPORTED_TP) ? PORT_TP : PORT_FIBRE; 1597 cmd->port = (cmd->supported & SUPPORTED_TP) ? PORT_TP : PORT_FIBRE;
1596 cmd->phy_address = p->phy.addr; 1598 cmd->phy_address = p->phy.mdio.prtad;
1597 cmd->transceiver = XCVR_EXTERNAL; 1599 cmd->transceiver = XCVR_EXTERNAL;
1598 cmd->autoneg = p->link_config.autoneg; 1600 cmd->autoneg = p->link_config.autoneg;
1599 cmd->maxtxpkt = 0; 1601 cmd->maxtxpkt = 0;
@@ -2308,70 +2310,25 @@ static int cxgb_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
2308 struct mii_ioctl_data *data = if_mii(req); 2310 struct mii_ioctl_data *data = if_mii(req);
2309 struct port_info *pi = netdev_priv(dev); 2311 struct port_info *pi = netdev_priv(dev);
2310 struct adapter *adapter = pi->adapter; 2312 struct adapter *adapter = pi->adapter;
2311 int ret, mmd;
2312 2313
2313 switch (cmd) { 2314 switch (cmd) {
2314 case SIOCGMIIPHY: 2315 case SIOCGMIIREG:
2315 data->phy_id = pi->phy.addr; 2316 case SIOCSMIIREG:
2317 /* Convert phy_id from older PRTAD/DEVAD format */
2318 if (is_10G(adapter) &&
2319 !mdio_phy_id_is_c45(data->phy_id) &&
2320 (data->phy_id & 0x1f00) &&
2321 !(data->phy_id & 0xe0e0))
2322 data->phy_id = mdio_phy_id_c45(data->phy_id >> 8,
2323 data->phy_id & 0x1f);
2316 /* FALLTHRU */ 2324 /* FALLTHRU */
2317 case SIOCGMIIREG:{ 2325 case SIOCGMIIPHY:
2318 u32 val; 2326 return mdio_mii_ioctl(&pi->phy.mdio, data, cmd);
2319 struct cphy *phy = &pi->phy;
2320
2321 if (!phy->mdio_read)
2322 return -EOPNOTSUPP;
2323 if (is_10G(adapter)) {
2324 mmd = data->phy_id >> 8;
2325 if (!mmd)
2326 mmd = MDIO_DEV_PCS;
2327 else if (mmd > MDIO_DEV_VEND2)
2328 return -EINVAL;
2329
2330 ret =
2331 phy->mdio_read(adapter, data->phy_id & 0x1f,
2332 mmd, data->reg_num, &val);
2333 } else
2334 ret =
2335 phy->mdio_read(adapter, data->phy_id & 0x1f,
2336 0, data->reg_num & 0x1f,
2337 &val);
2338 if (!ret)
2339 data->val_out = val;
2340 break;
2341 }
2342 case SIOCSMIIREG:{
2343 struct cphy *phy = &pi->phy;
2344
2345 if (!capable(CAP_NET_ADMIN))
2346 return -EPERM;
2347 if (!phy->mdio_write)
2348 return -EOPNOTSUPP;
2349 if (is_10G(adapter)) {
2350 mmd = data->phy_id >> 8;
2351 if (!mmd)
2352 mmd = MDIO_DEV_PCS;
2353 else if (mmd > MDIO_DEV_VEND2)
2354 return -EINVAL;
2355
2356 ret =
2357 phy->mdio_write(adapter,
2358 data->phy_id & 0x1f, mmd,
2359 data->reg_num,
2360 data->val_in);
2361 } else
2362 ret =
2363 phy->mdio_write(adapter,
2364 data->phy_id & 0x1f, 0,
2365 data->reg_num & 0x1f,
2366 data->val_in);
2367 break;
2368 }
2369 case SIOCCHIOCTL: 2327 case SIOCCHIOCTL:
2370 return cxgb_extension_ioctl(dev, req->ifr_data); 2328 return cxgb_extension_ioctl(dev, req->ifr_data);
2371 default: 2329 default:
2372 return -EOPNOTSUPP; 2330 return -EOPNOTSUPP;
2373 } 2331 }
2374 return ret;
2375} 2332}
2376 2333
2377static int cxgb_change_mtu(struct net_device *dev, int new_mtu) 2334static int cxgb_change_mtu(struct net_device *dev, int new_mtu)
@@ -3106,7 +3063,6 @@ static int __devinit init_one(struct pci_dev *pdev,
3106 netdev->mem_start = mmio_start; 3063 netdev->mem_start = mmio_start;
3107 netdev->mem_end = mmio_start + mmio_len - 1; 3064 netdev->mem_end = mmio_start + mmio_len - 1;
3108 netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO; 3065 netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
3109 netdev->features |= NETIF_F_LLTX;
3110 netdev->features |= NETIF_F_GRO; 3066 netdev->features |= NETIF_F_GRO;
3111 if (pci_using_dac) 3067 if (pci_using_dac)
3112 netdev->features |= NETIF_F_HIGHDMA; 3068 netdev->features |= NETIF_F_HIGHDMA;
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c
index b3ee2bc1a005..29c79eb43beb 100644
--- a/drivers/net/cxgb3/sge.c
+++ b/drivers/net/cxgb3/sge.c
@@ -653,7 +653,8 @@ static void t3_reset_qset(struct sge_qset *q)
653 q->txq_stopped = 0; 653 q->txq_stopped = 0;
654 q->tx_reclaim_timer.function = NULL; /* for t3_stop_sge_timers() */ 654 q->tx_reclaim_timer.function = NULL; /* for t3_stop_sge_timers() */
655 q->rx_reclaim_timer.function = NULL; 655 q->rx_reclaim_timer.function = NULL;
656 q->lro_frag_tbl.nr_frags = q->lro_frag_tbl.len = 0; 656 q->nomem = 0;
657 napi_free_frags(&q->napi);
657} 658}
658 659
659 660
@@ -1239,7 +1240,6 @@ int t3_eth_xmit(struct sk_buff *skb, struct net_device *dev)
1239 q = &qs->txq[TXQ_ETH]; 1240 q = &qs->txq[TXQ_ETH];
1240 txq = netdev_get_tx_queue(dev, qidx); 1241 txq = netdev_get_tx_queue(dev, qidx);
1241 1242
1242 spin_lock(&q->lock);
1243 reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK); 1243 reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK);
1244 1244
1245 credits = q->size - q->in_use; 1245 credits = q->size - q->in_use;
@@ -1250,7 +1250,6 @@ int t3_eth_xmit(struct sk_buff *skb, struct net_device *dev)
1250 dev_err(&adap->pdev->dev, 1250 dev_err(&adap->pdev->dev,
1251 "%s: Tx ring %u full while queue awake!\n", 1251 "%s: Tx ring %u full while queue awake!\n",
1252 dev->name, q->cntxt_id & 7); 1252 dev->name, q->cntxt_id & 7);
1253 spin_unlock(&q->lock);
1254 return NETDEV_TX_BUSY; 1253 return NETDEV_TX_BUSY;
1255 } 1254 }
1256 1255
@@ -1284,9 +1283,6 @@ int t3_eth_xmit(struct sk_buff *skb, struct net_device *dev)
1284 if (vlan_tx_tag_present(skb) && pi->vlan_grp) 1283 if (vlan_tx_tag_present(skb) && pi->vlan_grp)
1285 qs->port_stats[SGE_PSTAT_VLANINS]++; 1284 qs->port_stats[SGE_PSTAT_VLANINS]++;
1286 1285
1287 dev->trans_start = jiffies;
1288 spin_unlock(&q->lock);
1289
1290 /* 1286 /*
1291 * We do not use Tx completion interrupts to free DMAd Tx packets. 1287 * We do not use Tx completion interrupts to free DMAd Tx packets.
1292 * This is good for performamce but means that we rely on new Tx 1288 * This is good for performamce but means that we rely on new Tx
@@ -2073,20 +2069,19 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
2073 struct sge_fl *fl, int len, int complete) 2069 struct sge_fl *fl, int len, int complete)
2074{ 2070{
2075 struct rx_sw_desc *sd = &fl->sdesc[fl->cidx]; 2071 struct rx_sw_desc *sd = &fl->sdesc[fl->cidx];
2072 struct sk_buff *skb = NULL;
2076 struct cpl_rx_pkt *cpl; 2073 struct cpl_rx_pkt *cpl;
2077 struct skb_frag_struct *rx_frag = qs->lro_frag_tbl.frags; 2074 struct skb_frag_struct *rx_frag;
2078 int nr_frags = qs->lro_frag_tbl.nr_frags; 2075 int nr_frags;
2079 int frag_len = qs->lro_frag_tbl.len;
2080 int offset = 0; 2076 int offset = 0;
2081 2077
2082 if (!nr_frags) { 2078 if (!qs->nomem) {
2083 offset = 2 + sizeof(struct cpl_rx_pkt); 2079 skb = napi_get_frags(&qs->napi);
2084 qs->lro_va = cpl = sd->pg_chunk.va + 2; 2080 qs->nomem = !skb;
2085 } 2081 }
2086 2082
2087 fl->credits--; 2083 fl->credits--;
2088 2084
2089 len -= offset;
2090 pci_dma_sync_single_for_cpu(adap->pdev, 2085 pci_dma_sync_single_for_cpu(adap->pdev,
2091 pci_unmap_addr(sd, dma_addr), 2086 pci_unmap_addr(sd, dma_addr),
2092 fl->buf_size - SGE_PG_RSVD, 2087 fl->buf_size - SGE_PG_RSVD,
@@ -2099,21 +2094,38 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
2099 fl->alloc_size, 2094 fl->alloc_size,
2100 PCI_DMA_FROMDEVICE); 2095 PCI_DMA_FROMDEVICE);
2101 2096
2097 if (!skb) {
2098 put_page(sd->pg_chunk.page);
2099 if (complete)
2100 qs->nomem = 0;
2101 return;
2102 }
2103
2104 rx_frag = skb_shinfo(skb)->frags;
2105 nr_frags = skb_shinfo(skb)->nr_frags;
2106
2107 if (!nr_frags) {
2108 offset = 2 + sizeof(struct cpl_rx_pkt);
2109 qs->lro_va = sd->pg_chunk.va + 2;
2110 }
2111 len -= offset;
2112
2102 prefetch(qs->lro_va); 2113 prefetch(qs->lro_va);
2103 2114
2104 rx_frag += nr_frags; 2115 rx_frag += nr_frags;
2105 rx_frag->page = sd->pg_chunk.page; 2116 rx_frag->page = sd->pg_chunk.page;
2106 rx_frag->page_offset = sd->pg_chunk.offset + offset; 2117 rx_frag->page_offset = sd->pg_chunk.offset + offset;
2107 rx_frag->size = len; 2118 rx_frag->size = len;
2108 frag_len += len;
2109 qs->lro_frag_tbl.nr_frags++;
2110 qs->lro_frag_tbl.len = frag_len;
2111 2119
2120 skb->len += len;
2121 skb->data_len += len;
2122 skb->truesize += len;
2123 skb_shinfo(skb)->nr_frags++;
2112 2124
2113 if (!complete) 2125 if (!complete)
2114 return; 2126 return;
2115 2127
2116 qs->lro_frag_tbl.ip_summed = CHECKSUM_UNNECESSARY; 2128 skb->ip_summed = CHECKSUM_UNNECESSARY;
2117 cpl = qs->lro_va; 2129 cpl = qs->lro_va;
2118 2130
2119 if (unlikely(cpl->vlan_valid)) { 2131 if (unlikely(cpl->vlan_valid)) {
@@ -2122,15 +2134,11 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
2122 struct vlan_group *grp = pi->vlan_grp; 2134 struct vlan_group *grp = pi->vlan_grp;
2123 2135
2124 if (likely(grp != NULL)) { 2136 if (likely(grp != NULL)) {
2125 vlan_gro_frags(&qs->napi, grp, ntohs(cpl->vlan), 2137 vlan_gro_frags(&qs->napi, grp, ntohs(cpl->vlan));
2126 &qs->lro_frag_tbl); 2138 return;
2127 goto out;
2128 } 2139 }
2129 } 2140 }
2130 napi_gro_frags(&qs->napi, &qs->lro_frag_tbl); 2141 napi_gro_frags(&qs->napi);
2131
2132out:
2133 qs->lro_frag_tbl.nr_frags = qs->lro_frag_tbl.len = 0;
2134} 2142}
2135 2143
2136/** 2144/**
@@ -2299,8 +2307,6 @@ no_mem:
2299 if (fl->use_pages) { 2307 if (fl->use_pages) {
2300 void *addr = fl->sdesc[fl->cidx].pg_chunk.va; 2308 void *addr = fl->sdesc[fl->cidx].pg_chunk.va;
2301 2309
2302 prefetch(&qs->lro_frag_tbl);
2303
2304 prefetch(addr); 2310 prefetch(addr);
2305#if L1_CACHE_BYTES < 128 2311#if L1_CACHE_BYTES < 128
2306 prefetch(addr + L1_CACHE_BYTES); 2312 prefetch(addr + L1_CACHE_BYTES);
@@ -2846,11 +2852,12 @@ static void sge_timer_tx(unsigned long data)
2846 unsigned int tbd[SGE_TXQ_PER_SET] = {0, 0}; 2852 unsigned int tbd[SGE_TXQ_PER_SET] = {0, 0};
2847 unsigned long next_period; 2853 unsigned long next_period;
2848 2854
2849 if (spin_trylock(&qs->txq[TXQ_ETH].lock)) { 2855 if (__netif_tx_trylock(qs->tx_q)) {
2850 tbd[TXQ_ETH] = reclaim_completed_tx(adap, &qs->txq[TXQ_ETH], 2856 tbd[TXQ_ETH] = reclaim_completed_tx(adap, &qs->txq[TXQ_ETH],
2851 TX_RECLAIM_TIMER_CHUNK); 2857 TX_RECLAIM_TIMER_CHUNK);
2852 spin_unlock(&qs->txq[TXQ_ETH].lock); 2858 __netif_tx_unlock(qs->tx_q);
2853 } 2859 }
2860
2854 if (spin_trylock(&qs->txq[TXQ_OFLD].lock)) { 2861 if (spin_trylock(&qs->txq[TXQ_OFLD].lock)) {
2855 tbd[TXQ_OFLD] = reclaim_completed_tx(adap, &qs->txq[TXQ_OFLD], 2862 tbd[TXQ_OFLD] = reclaim_completed_tx(adap, &qs->txq[TXQ_OFLD],
2856 TX_RECLAIM_TIMER_CHUNK); 2863 TX_RECLAIM_TIMER_CHUNK);
@@ -2858,8 +2865,8 @@ static void sge_timer_tx(unsigned long data)
2858 } 2865 }
2859 2866
2860 next_period = TX_RECLAIM_PERIOD >> 2867 next_period = TX_RECLAIM_PERIOD >>
2861 (max(tbd[TXQ_ETH], tbd[TXQ_OFLD]) / 2868 (max(tbd[TXQ_ETH], tbd[TXQ_OFLD]) /
2862 TX_RECLAIM_TIMER_CHUNK); 2869 TX_RECLAIM_TIMER_CHUNK);
2863 mod_timer(&qs->tx_reclaim_timer, jiffies + next_period); 2870 mod_timer(&qs->tx_reclaim_timer, jiffies + next_period);
2864} 2871}
2865 2872
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c
index 4950d5d789ae..870d44992c70 100644
--- a/drivers/net/cxgb3/t3_hw.c
+++ b/drivers/net/cxgb3/t3_hw.c
@@ -204,35 +204,33 @@ static void mi1_init(struct adapter *adap, const struct adapter_info *ai)
204/* 204/*
205 * MI1 read/write operations for clause 22 PHYs. 205 * MI1 read/write operations for clause 22 PHYs.
206 */ 206 */
207static int t3_mi1_read(struct adapter *adapter, int phy_addr, int mmd_addr, 207static int t3_mi1_read(struct net_device *dev, int phy_addr, int mmd_addr,
208 int reg_addr, unsigned int *valp) 208 u16 reg_addr)
209{ 209{
210 struct port_info *pi = netdev_priv(dev);
211 struct adapter *adapter = pi->adapter;
210 int ret; 212 int ret;
211 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr); 213 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
212 214
213 if (mmd_addr)
214 return -EINVAL;
215
216 mutex_lock(&adapter->mdio_lock); 215 mutex_lock(&adapter->mdio_lock);
217 t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1)); 216 t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1));
218 t3_write_reg(adapter, A_MI1_ADDR, addr); 217 t3_write_reg(adapter, A_MI1_ADDR, addr);
219 t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(2)); 218 t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(2));
220 ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10); 219 ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10);
221 if (!ret) 220 if (!ret)
222 *valp = t3_read_reg(adapter, A_MI1_DATA); 221 ret = t3_read_reg(adapter, A_MI1_DATA);
223 mutex_unlock(&adapter->mdio_lock); 222 mutex_unlock(&adapter->mdio_lock);
224 return ret; 223 return ret;
225} 224}
226 225
227static int t3_mi1_write(struct adapter *adapter, int phy_addr, int mmd_addr, 226static int t3_mi1_write(struct net_device *dev, int phy_addr, int mmd_addr,
228 int reg_addr, unsigned int val) 227 u16 reg_addr, u16 val)
229{ 228{
229 struct port_info *pi = netdev_priv(dev);
230 struct adapter *adapter = pi->adapter;
230 int ret; 231 int ret;
231 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr); 232 u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
232 233
233 if (mmd_addr)
234 return -EINVAL;
235
236 mutex_lock(&adapter->mdio_lock); 234 mutex_lock(&adapter->mdio_lock);
237 t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1)); 235 t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1));
238 t3_write_reg(adapter, A_MI1_ADDR, addr); 236 t3_write_reg(adapter, A_MI1_ADDR, addr);
@@ -244,8 +242,9 @@ static int t3_mi1_write(struct adapter *adapter, int phy_addr, int mmd_addr,
244} 242}
245 243
246static const struct mdio_ops mi1_mdio_ops = { 244static const struct mdio_ops mi1_mdio_ops = {
247 t3_mi1_read, 245 .read = t3_mi1_read,
248 t3_mi1_write 246 .write = t3_mi1_write,
247 .mode_support = MDIO_SUPPORTS_C22
249}; 248};
250 249
251/* 250/*
@@ -268,9 +267,11 @@ static int mi1_wr_addr(struct adapter *adapter, int phy_addr, int mmd_addr,
268/* 267/*
269 * MI1 read/write operations for indirect-addressed PHYs. 268 * MI1 read/write operations for indirect-addressed PHYs.
270 */ 269 */
271static int mi1_ext_read(struct adapter *adapter, int phy_addr, int mmd_addr, 270static int mi1_ext_read(struct net_device *dev, int phy_addr, int mmd_addr,
272 int reg_addr, unsigned int *valp) 271 u16 reg_addr)
273{ 272{
273 struct port_info *pi = netdev_priv(dev);
274 struct adapter *adapter = pi->adapter;
274 int ret; 275 int ret;
275 276
276 mutex_lock(&adapter->mdio_lock); 277 mutex_lock(&adapter->mdio_lock);
@@ -280,15 +281,17 @@ static int mi1_ext_read(struct adapter *adapter, int phy_addr, int mmd_addr,
280 ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, 281 ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0,
281 MDIO_ATTEMPTS, 10); 282 MDIO_ATTEMPTS, 10);
282 if (!ret) 283 if (!ret)
283 *valp = t3_read_reg(adapter, A_MI1_DATA); 284 ret = t3_read_reg(adapter, A_MI1_DATA);
284 } 285 }
285 mutex_unlock(&adapter->mdio_lock); 286 mutex_unlock(&adapter->mdio_lock);
286 return ret; 287 return ret;
287} 288}
288 289
289static int mi1_ext_write(struct adapter *adapter, int phy_addr, int mmd_addr, 290static int mi1_ext_write(struct net_device *dev, int phy_addr, int mmd_addr,
290 int reg_addr, unsigned int val) 291 u16 reg_addr, u16 val)
291{ 292{
293 struct port_info *pi = netdev_priv(dev);
294 struct adapter *adapter = pi->adapter;
292 int ret; 295 int ret;
293 296
294 mutex_lock(&adapter->mdio_lock); 297 mutex_lock(&adapter->mdio_lock);
@@ -304,8 +307,9 @@ static int mi1_ext_write(struct adapter *adapter, int phy_addr, int mmd_addr,
304} 307}
305 308
306static const struct mdio_ops mi1_mdio_ext_ops = { 309static const struct mdio_ops mi1_mdio_ext_ops = {
307 mi1_ext_read, 310 .read = mi1_ext_read,
308 mi1_ext_write 311 .write = mi1_ext_write,
312 .mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22
309}; 313};
310 314
311/** 315/**
@@ -325,10 +329,10 @@ int t3_mdio_change_bits(struct cphy *phy, int mmd, int reg, unsigned int clear,
325 int ret; 329 int ret;
326 unsigned int val; 330 unsigned int val;
327 331
328 ret = mdio_read(phy, mmd, reg, &val); 332 ret = t3_mdio_read(phy, mmd, reg, &val);
329 if (!ret) { 333 if (!ret) {
330 val &= ~clear; 334 val &= ~clear;
331 ret = mdio_write(phy, mmd, reg, val | set); 335 ret = t3_mdio_write(phy, mmd, reg, val | set);
332 } 336 }
333 return ret; 337 return ret;
334} 338}
@@ -348,15 +352,16 @@ int t3_phy_reset(struct cphy *phy, int mmd, int wait)
348 int err; 352 int err;
349 unsigned int ctl; 353 unsigned int ctl;
350 354
351 err = t3_mdio_change_bits(phy, mmd, MII_BMCR, BMCR_PDOWN, BMCR_RESET); 355 err = t3_mdio_change_bits(phy, mmd, MDIO_CTRL1, MDIO_CTRL1_LPOWER,
356 MDIO_CTRL1_RESET);
352 if (err || !wait) 357 if (err || !wait)
353 return err; 358 return err;
354 359
355 do { 360 do {
356 err = mdio_read(phy, mmd, MII_BMCR, &ctl); 361 err = t3_mdio_read(phy, mmd, MDIO_CTRL1, &ctl);
357 if (err) 362 if (err)
358 return err; 363 return err;
359 ctl &= BMCR_RESET; 364 ctl &= MDIO_CTRL1_RESET;
360 if (ctl) 365 if (ctl)
361 msleep(1); 366 msleep(1);
362 } while (ctl && --wait); 367 } while (ctl && --wait);
@@ -377,7 +382,7 @@ int t3_phy_advertise(struct cphy *phy, unsigned int advert)
377 int err; 382 int err;
378 unsigned int val = 0; 383 unsigned int val = 0;
379 384
380 err = mdio_read(phy, 0, MII_CTRL1000, &val); 385 err = t3_mdio_read(phy, MDIO_DEVAD_NONE, MII_CTRL1000, &val);
381 if (err) 386 if (err)
382 return err; 387 return err;
383 388
@@ -387,7 +392,7 @@ int t3_phy_advertise(struct cphy *phy, unsigned int advert)
387 if (advert & ADVERTISED_1000baseT_Full) 392 if (advert & ADVERTISED_1000baseT_Full)
388 val |= ADVERTISE_1000FULL; 393 val |= ADVERTISE_1000FULL;
389 394
390 err = mdio_write(phy, 0, MII_CTRL1000, val); 395 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, MII_CTRL1000, val);
391 if (err) 396 if (err)
392 return err; 397 return err;
393 398
@@ -404,7 +409,7 @@ int t3_phy_advertise(struct cphy *phy, unsigned int advert)
404 val |= ADVERTISE_PAUSE_CAP; 409 val |= ADVERTISE_PAUSE_CAP;
405 if (advert & ADVERTISED_Asym_Pause) 410 if (advert & ADVERTISED_Asym_Pause)
406 val |= ADVERTISE_PAUSE_ASYM; 411 val |= ADVERTISE_PAUSE_ASYM;
407 return mdio_write(phy, 0, MII_ADVERTISE, val); 412 return t3_mdio_write(phy, MDIO_DEVAD_NONE, MII_ADVERTISE, val);
408} 413}
409 414
410/** 415/**
@@ -427,7 +432,7 @@ int t3_phy_advertise_fiber(struct cphy *phy, unsigned int advert)
427 val |= ADVERTISE_1000XPAUSE; 432 val |= ADVERTISE_1000XPAUSE;
428 if (advert & ADVERTISED_Asym_Pause) 433 if (advert & ADVERTISED_Asym_Pause)
429 val |= ADVERTISE_1000XPSE_ASYM; 434 val |= ADVERTISE_1000XPSE_ASYM;
430 return mdio_write(phy, 0, MII_ADVERTISE, val); 435 return t3_mdio_write(phy, MDIO_DEVAD_NONE, MII_ADVERTISE, val);
431} 436}
432 437
433/** 438/**
@@ -444,7 +449,7 @@ int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex)
444 int err; 449 int err;
445 unsigned int ctl; 450 unsigned int ctl;
446 451
447 err = mdio_read(phy, 0, MII_BMCR, &ctl); 452 err = t3_mdio_read(phy, MDIO_DEVAD_NONE, MII_BMCR, &ctl);
448 if (err) 453 if (err)
449 return err; 454 return err;
450 455
@@ -462,34 +467,36 @@ int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex)
462 } 467 }
463 if (ctl & BMCR_SPEED1000) /* auto-negotiation required for GigE */ 468 if (ctl & BMCR_SPEED1000) /* auto-negotiation required for GigE */
464 ctl |= BMCR_ANENABLE; 469 ctl |= BMCR_ANENABLE;
465 return mdio_write(phy, 0, MII_BMCR, ctl); 470 return t3_mdio_write(phy, MDIO_DEVAD_NONE, MII_BMCR, ctl);
466} 471}
467 472
468int t3_phy_lasi_intr_enable(struct cphy *phy) 473int t3_phy_lasi_intr_enable(struct cphy *phy)
469{ 474{
470 return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 1); 475 return t3_mdio_write(phy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL,
476 MDIO_PMA_LASI_LSALARM);
471} 477}
472 478
473int t3_phy_lasi_intr_disable(struct cphy *phy) 479int t3_phy_lasi_intr_disable(struct cphy *phy)
474{ 480{
475 return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 0); 481 return t3_mdio_write(phy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL, 0);
476} 482}
477 483
478int t3_phy_lasi_intr_clear(struct cphy *phy) 484int t3_phy_lasi_intr_clear(struct cphy *phy)
479{ 485{
480 u32 val; 486 u32 val;
481 487
482 return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &val); 488 return t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT, &val);
483} 489}
484 490
485int t3_phy_lasi_intr_handler(struct cphy *phy) 491int t3_phy_lasi_intr_handler(struct cphy *phy)
486{ 492{
487 unsigned int status; 493 unsigned int status;
488 int err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &status); 494 int err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT,
495 &status);
489 496
490 if (err) 497 if (err)
491 return err; 498 return err;
492 return (status & 1) ? cphy_cause_link_change : 0; 499 return (status & MDIO_PMA_LASI_LSALARM) ? cphy_cause_link_change : 0;
493} 500}
494 501
495static const struct adapter_info t3_adap_info[] = { 502static const struct adapter_info t3_adap_info[] = {
@@ -519,6 +526,11 @@ static const struct adapter_info t3_adap_info[] = {
519 F_GPIO10_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 526 F_GPIO10_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
520 { S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI, 527 { S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
521 &mi1_mdio_ext_ops, "Chelsio T310" }, 528 &mi1_mdio_ext_ops, "Chelsio T310" },
529 {1, 0, 0,
530 F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN |
531 F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL,
532 { S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
533 &mi1_mdio_ext_ops, "Chelsio N320E-G2" },
522}; 534};
523 535
524/* 536/*
@@ -545,6 +557,8 @@ static const struct port_type_info port_types[] = {
545 { t3_qt2045_phy_prep }, 557 { t3_qt2045_phy_prep },
546 { t3_ael1006_phy_prep }, 558 { t3_ael1006_phy_prep },
547 { NULL }, 559 { NULL },
560 { t3_aq100x_phy_prep },
561 { t3_ael2020_phy_prep },
548}; 562};
549 563
550#define VPD_ENTRY(name, len) \ 564#define VPD_ENTRY(name, len) \
@@ -3864,6 +3878,7 @@ int t3_prep_adapter(struct adapter *adapter, const struct adapter_info *ai,
3864 return -EINVAL; 3878 return -EINVAL;
3865 } 3879 }
3866 3880
3881 p->phy.mdio.dev = adapter->port[i];
3867 ret = pti->phy_prep(&p->phy, adapter, ai->phy_base_addr + j, 3882 ret = pti->phy_prep(&p->phy, adapter, ai->phy_base_addr + j,
3868 ai->mdio_ops); 3883 ai->mdio_ops);
3869 if (ret) 3884 if (ret)
@@ -3923,7 +3938,7 @@ int t3_replay_prep_adapter(struct adapter *adapter)
3923 ; 3938 ;
3924 3939
3925 pti = &port_types[adapter->params.vpd.port_type[j]]; 3940 pti = &port_types[adapter->params.vpd.port_type[j]];
3926 ret = pti->phy_prep(&p->phy, adapter, p->phy.addr, NULL); 3941 ret = pti->phy_prep(&p->phy, adapter, p->phy.mdio.prtad, NULL);
3927 if (ret) 3942 if (ret)
3928 return ret; 3943 return ret;
3929 p->phy.ops->power_down(&p->phy, 1); 3944 p->phy.ops->power_down(&p->phy, 1);
diff --git a/drivers/net/cxgb3/vsc8211.c b/drivers/net/cxgb3/vsc8211.c
index d07130971b8f..4f9a1c2724f4 100644
--- a/drivers/net/cxgb3/vsc8211.c
+++ b/drivers/net/cxgb3/vsc8211.c
@@ -91,17 +91,18 @@ enum {
91 */ 91 */
92static int vsc8211_reset(struct cphy *cphy, int wait) 92static int vsc8211_reset(struct cphy *cphy, int wait)
93{ 93{
94 return t3_phy_reset(cphy, 0, 0); 94 return t3_phy_reset(cphy, MDIO_DEVAD_NONE, 0);
95} 95}
96 96
97static int vsc8211_intr_enable(struct cphy *cphy) 97static int vsc8211_intr_enable(struct cphy *cphy)
98{ 98{
99 return mdio_write(cphy, 0, VSC8211_INTR_ENABLE, INTR_MASK); 99 return t3_mdio_write(cphy, MDIO_DEVAD_NONE, VSC8211_INTR_ENABLE,
100 INTR_MASK);
100} 101}
101 102
102static int vsc8211_intr_disable(struct cphy *cphy) 103static int vsc8211_intr_disable(struct cphy *cphy)
103{ 104{
104 return mdio_write(cphy, 0, VSC8211_INTR_ENABLE, 0); 105 return t3_mdio_write(cphy, MDIO_DEVAD_NONE, VSC8211_INTR_ENABLE, 0);
105} 106}
106 107
107static int vsc8211_intr_clear(struct cphy *cphy) 108static int vsc8211_intr_clear(struct cphy *cphy)
@@ -109,18 +110,20 @@ static int vsc8211_intr_clear(struct cphy *cphy)
109 u32 val; 110 u32 val;
110 111
111 /* Clear PHY interrupts by reading the register. */ 112 /* Clear PHY interrupts by reading the register. */
112 return mdio_read(cphy, 0, VSC8211_INTR_STATUS, &val); 113 return t3_mdio_read(cphy, MDIO_DEVAD_NONE, VSC8211_INTR_STATUS, &val);
113} 114}
114 115
115static int vsc8211_autoneg_enable(struct cphy *cphy) 116static int vsc8211_autoneg_enable(struct cphy *cphy)
116{ 117{
117 return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, 118 return t3_mdio_change_bits(cphy, MDIO_DEVAD_NONE, MII_BMCR,
119 BMCR_PDOWN | BMCR_ISOLATE,
118 BMCR_ANENABLE | BMCR_ANRESTART); 120 BMCR_ANENABLE | BMCR_ANRESTART);
119} 121}
120 122
121static int vsc8211_autoneg_restart(struct cphy *cphy) 123static int vsc8211_autoneg_restart(struct cphy *cphy)
122{ 124{
123 return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, 125 return t3_mdio_change_bits(cphy, MDIO_DEVAD_NONE, MII_BMCR,
126 BMCR_PDOWN | BMCR_ISOLATE,
124 BMCR_ANRESTART); 127 BMCR_ANRESTART);
125} 128}
126 129
@@ -130,9 +133,9 @@ static int vsc8211_get_link_status(struct cphy *cphy, int *link_ok,
130 unsigned int bmcr, status, lpa, adv; 133 unsigned int bmcr, status, lpa, adv;
131 int err, sp = -1, dplx = -1, pause = 0; 134 int err, sp = -1, dplx = -1, pause = 0;
132 135
133 err = mdio_read(cphy, 0, MII_BMCR, &bmcr); 136 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMCR, &bmcr);
134 if (!err) 137 if (!err)
135 err = mdio_read(cphy, 0, MII_BMSR, &status); 138 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMSR, &status);
136 if (err) 139 if (err)
137 return err; 140 return err;
138 141
@@ -142,7 +145,8 @@ static int vsc8211_get_link_status(struct cphy *cphy, int *link_ok,
142 * once more to get the current link state. 145 * once more to get the current link state.
143 */ 146 */
144 if (!(status & BMSR_LSTATUS)) 147 if (!(status & BMSR_LSTATUS))
145 err = mdio_read(cphy, 0, MII_BMSR, &status); 148 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMSR,
149 &status);
146 if (err) 150 if (err)
147 return err; 151 return err;
148 *link_ok = (status & BMSR_LSTATUS) != 0; 152 *link_ok = (status & BMSR_LSTATUS) != 0;
@@ -156,7 +160,8 @@ static int vsc8211_get_link_status(struct cphy *cphy, int *link_ok,
156 else 160 else
157 sp = SPEED_10; 161 sp = SPEED_10;
158 } else if (status & BMSR_ANEGCOMPLETE) { 162 } else if (status & BMSR_ANEGCOMPLETE) {
159 err = mdio_read(cphy, 0, VSC8211_AUX_CTRL_STAT, &status); 163 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, VSC8211_AUX_CTRL_STAT,
164 &status);
160 if (err) 165 if (err)
161 return err; 166 return err;
162 167
@@ -170,9 +175,11 @@ static int vsc8211_get_link_status(struct cphy *cphy, int *link_ok,
170 sp = SPEED_1000; 175 sp = SPEED_1000;
171 176
172 if (fc && dplx == DUPLEX_FULL) { 177 if (fc && dplx == DUPLEX_FULL) {
173 err = mdio_read(cphy, 0, MII_LPA, &lpa); 178 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_LPA,
179 &lpa);
174 if (!err) 180 if (!err)
175 err = mdio_read(cphy, 0, MII_ADVERTISE, &adv); 181 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE,
182 MII_ADVERTISE, &adv);
176 if (err) 183 if (err)
177 return err; 184 return err;
178 185
@@ -202,9 +209,9 @@ static int vsc8211_get_link_status_fiber(struct cphy *cphy, int *link_ok,
202 unsigned int bmcr, status, lpa, adv; 209 unsigned int bmcr, status, lpa, adv;
203 int err, sp = -1, dplx = -1, pause = 0; 210 int err, sp = -1, dplx = -1, pause = 0;
204 211
205 err = mdio_read(cphy, 0, MII_BMCR, &bmcr); 212 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMCR, &bmcr);
206 if (!err) 213 if (!err)
207 err = mdio_read(cphy, 0, MII_BMSR, &status); 214 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMSR, &status);
208 if (err) 215 if (err)
209 return err; 216 return err;
210 217
@@ -214,7 +221,8 @@ static int vsc8211_get_link_status_fiber(struct cphy *cphy, int *link_ok,
214 * once more to get the current link state. 221 * once more to get the current link state.
215 */ 222 */
216 if (!(status & BMSR_LSTATUS)) 223 if (!(status & BMSR_LSTATUS))
217 err = mdio_read(cphy, 0, MII_BMSR, &status); 224 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMSR,
225 &status);
218 if (err) 226 if (err)
219 return err; 227 return err;
220 *link_ok = (status & BMSR_LSTATUS) != 0; 228 *link_ok = (status & BMSR_LSTATUS) != 0;
@@ -228,9 +236,10 @@ static int vsc8211_get_link_status_fiber(struct cphy *cphy, int *link_ok,
228 else 236 else
229 sp = SPEED_10; 237 sp = SPEED_10;
230 } else if (status & BMSR_ANEGCOMPLETE) { 238 } else if (status & BMSR_ANEGCOMPLETE) {
231 err = mdio_read(cphy, 0, MII_LPA, &lpa); 239 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_LPA, &lpa);
232 if (!err) 240 if (!err)
233 err = mdio_read(cphy, 0, MII_ADVERTISE, &adv); 241 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_ADVERTISE,
242 &adv);
234 if (err) 243 if (err)
235 return err; 244 return err;
236 245
@@ -270,23 +279,23 @@ static int vsc8211_set_automdi(struct cphy *phy, int enable)
270{ 279{
271 int err; 280 int err;
272 281
273 err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0x52b5); 282 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_EXT_PAGE_AXS, 0x52b5);
274 if (err) 283 if (err)
275 return err; 284 return err;
276 285
277 err = mdio_write(phy, 0, 18, 0x12); 286 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, 18, 0x12);
278 if (err) 287 if (err)
279 return err; 288 return err;
280 289
281 err = mdio_write(phy, 0, 17, enable ? 0x2803 : 0x3003); 290 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, 17, enable ? 0x2803 : 0x3003);
282 if (err) 291 if (err)
283 return err; 292 return err;
284 293
285 err = mdio_write(phy, 0, 16, 0x87fa); 294 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, 16, 0x87fa);
286 if (err) 295 if (err)
287 return err; 296 return err;
288 297
289 err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0); 298 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_EXT_PAGE_AXS, 0);
290 if (err) 299 if (err)
291 return err; 300 return err;
292 301
@@ -315,7 +324,7 @@ static int vsc8211_intr_handler(struct cphy *cphy)
315 unsigned int cause; 324 unsigned int cause;
316 int err, cphy_cause = 0; 325 int err, cphy_cause = 0;
317 326
318 err = mdio_read(cphy, 0, VSC8211_INTR_STATUS, &cause); 327 err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, VSC8211_INTR_STATUS, &cause);
319 if (err) 328 if (err)
320 return err; 329 return err;
321 330
@@ -367,12 +376,13 @@ int t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
367 SUPPORTED_TP | SUPPORTED_IRQ, "10/100/1000BASE-T"); 376 SUPPORTED_TP | SUPPORTED_IRQ, "10/100/1000BASE-T");
368 msleep(20); /* PHY needs ~10ms to start responding to MDIO */ 377 msleep(20); /* PHY needs ~10ms to start responding to MDIO */
369 378
370 err = mdio_read(phy, 0, VSC8211_EXT_CTRL, &val); 379 err = t3_mdio_read(phy, MDIO_DEVAD_NONE, VSC8211_EXT_CTRL, &val);
371 if (err) 380 if (err)
372 return err; 381 return err;
373 if (val & VSC_CTRL_MEDIA_MODE_HI) { 382 if (val & VSC_CTRL_MEDIA_MODE_HI) {
374 /* copper interface, just need to configure the LEDs */ 383 /* copper interface, just need to configure the LEDs */
375 return mdio_write(phy, 0, VSC8211_LED_CTRL, 0x100); 384 return t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_LED_CTRL,
385 0x100);
376 } 386 }
377 387
378 phy->caps = SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | 388 phy->caps = SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg |
@@ -380,20 +390,20 @@ int t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
380 phy->desc = "1000BASE-X"; 390 phy->desc = "1000BASE-X";
381 phy->ops = &vsc8211_fiber_ops; 391 phy->ops = &vsc8211_fiber_ops;
382 392
383 err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 1); 393 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_EXT_PAGE_AXS, 1);
384 if (err) 394 if (err)
385 return err; 395 return err;
386 396
387 err = mdio_write(phy, 0, VSC8211_SIGDET_CTRL, 1); 397 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_SIGDET_CTRL, 1);
388 if (err) 398 if (err)
389 return err; 399 return err;
390 400
391 err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0); 401 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_EXT_PAGE_AXS, 0);
392 if (err) 402 if (err)
393 return err; 403 return err;
394 404
395 err = mdio_write(phy, 0, VSC8211_EXT_CTRL, 405 err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_EXT_CTRL,
396 val | VSC_CTRL_CLAUSE37_VIEW); 406 val | VSC_CTRL_CLAUSE37_VIEW);
397 if (err) 407 if (err)
398 return err; 408 return err;
399 409
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
new file mode 100644
index 000000000000..cf689a056b38
--- /dev/null
+++ b/drivers/net/davinci_emac.c
@@ -0,0 +1,2832 @@
1/*
2 * DaVinci Ethernet Medium Access Controller
3 *
4 * DaVinci EMAC is based upon CPPI 3.0 TI DMA engine
5 *
6 * Copyright (C) 2009 Texas Instruments.
7 *
8 * ---------------------------------------------------------------------------
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * ---------------------------------------------------------------------------
24 * History:
25 * 0-5 A number of folks worked on this driver in bits and pieces but the major
26 * contribution came from Suraj Iyer and Anant Gole
27 * 6.0 Anant Gole - rewrote the driver as per Linux conventions
28 * 6.1 Chaithrika U S - added support for Gigabit and RMII features,
29 * PHY layer usage
30 */
31
32/** Pending Items in this driver:
33 * 1. Use Linux cache infrastcture for DMA'ed memory (dma_xxx functions)
34 */
35
36#include <linux/module.h>
37#include <linux/kernel.h>
38#include <linux/sched.h>
39#include <linux/string.h>
40#include <linux/timer.h>
41#include <linux/errno.h>
42#include <linux/in.h>
43#include <linux/ioport.h>
44#include <linux/slab.h>
45#include <linux/mm.h>
46#include <linux/interrupt.h>
47#include <linux/init.h>
48#include <linux/netdevice.h>
49#include <linux/etherdevice.h>
50#include <linux/skbuff.h>
51#include <linux/ethtool.h>
52#include <linux/highmem.h>
53#include <linux/proc_fs.h>
54#include <linux/ctype.h>
55#include <linux/version.h>
56#include <linux/spinlock.h>
57#include <linux/dma-mapping.h>
58#include <linux/clk.h>
59#include <linux/platform_device.h>
60#include <linux/semaphore.h>
61#include <linux/phy.h>
62#include <linux/bitops.h>
63#include <linux/io.h>
64#include <linux/uaccess.h>
65
66#include <asm/irq.h>
67#include <asm/page.h>
68
69#include <mach/emac.h>
70
71static int debug_level;
72module_param(debug_level, int, 0);
73MODULE_PARM_DESC(debug_level, "DaVinci EMAC debug level (NETIF_MSG bits)");
74
75/* Netif debug messages possible */
76#define DAVINCI_EMAC_DEBUG (NETIF_MSG_DRV | \
77 NETIF_MSG_PROBE | \
78 NETIF_MSG_LINK | \
79 NETIF_MSG_TIMER | \
80 NETIF_MSG_IFDOWN | \
81 NETIF_MSG_IFUP | \
82 NETIF_MSG_RX_ERR | \
83 NETIF_MSG_TX_ERR | \
84 NETIF_MSG_TX_QUEUED | \
85 NETIF_MSG_INTR | \
86 NETIF_MSG_TX_DONE | \
87 NETIF_MSG_RX_STATUS | \
88 NETIF_MSG_PKTDATA | \
89 NETIF_MSG_HW | \
90 NETIF_MSG_WOL)
91
92/* version info */
93#define EMAC_MAJOR_VERSION 6
94#define EMAC_MINOR_VERSION 1
95#define EMAC_MODULE_VERSION "6.1"
96MODULE_VERSION(EMAC_MODULE_VERSION);
97static const char emac_version_string[] = "TI DaVinci EMAC Linux v6.1";
98
99/* Configuration items */
100#define EMAC_DEF_PASS_CRC (0) /* Do not pass CRC upto frames */
101#define EMAC_DEF_QOS_EN (0) /* EMAC proprietary QoS disabled */
102#define EMAC_DEF_NO_BUFF_CHAIN (0) /* No buffer chain */
103#define EMAC_DEF_MACCTRL_FRAME_EN (0) /* Discard Maccontrol frames */
104#define EMAC_DEF_SHORT_FRAME_EN (0) /* Discard short frames */
105#define EMAC_DEF_ERROR_FRAME_EN (0) /* Discard error frames */
106#define EMAC_DEF_PROM_EN (0) /* Promiscous disabled */
107#define EMAC_DEF_PROM_CH (0) /* Promiscous channel is 0 */
108#define EMAC_DEF_BCAST_EN (1) /* Broadcast enabled */
109#define EMAC_DEF_BCAST_CH (0) /* Broadcast channel is 0 */
110#define EMAC_DEF_MCAST_EN (1) /* Multicast enabled */
111#define EMAC_DEF_MCAST_CH (0) /* Multicast channel is 0 */
112
113#define EMAC_DEF_TXPRIO_FIXED (1) /* TX Priority is fixed */
114#define EMAC_DEF_TXPACING_EN (0) /* TX pacing NOT supported*/
115
116#define EMAC_DEF_BUFFER_OFFSET (0) /* Buffer offset to DMA (future) */
117#define EMAC_DEF_MIN_ETHPKTSIZE (60) /* Minimum ethernet pkt size */
118#define EMAC_DEF_MAX_FRAME_SIZE (1500 + 14 + 4 + 4)
119#define EMAC_DEF_TX_CH (0) /* Default 0th channel */
120#define EMAC_DEF_RX_CH (0) /* Default 0th channel */
121#define EMAC_DEF_MDIO_TICK_MS (10) /* typically 1 tick=1 ms) */
122#define EMAC_DEF_MAX_TX_CH (1) /* Max TX channels configured */
123#define EMAC_DEF_MAX_RX_CH (1) /* Max RX channels configured */
124#define EMAC_POLL_WEIGHT (64) /* Default NAPI poll weight */
125
126/* Buffer descriptor parameters */
127#define EMAC_DEF_TX_MAX_SERVICE (32) /* TX max service BD's */
128#define EMAC_DEF_RX_MAX_SERVICE (64) /* should = netdev->weight */
129
130/* EMAC register related defines */
131#define EMAC_ALL_MULTI_REG_VALUE (0xFFFFFFFF)
132#define EMAC_NUM_MULTICAST_BITS (64)
133#define EMAC_TEARDOWN_VALUE (0xFFFFFFFC)
134#define EMAC_TX_CONTROL_TX_ENABLE_VAL (0x1)
135#define EMAC_RX_CONTROL_RX_ENABLE_VAL (0x1)
136#define EMAC_MAC_HOST_ERR_INTMASK_VAL (0x2)
137#define EMAC_RX_UNICAST_CLEAR_ALL (0xFF)
138#define EMAC_INT_MASK_CLEAR (0xFF)
139
140/* RX MBP register bit positions */
141#define EMAC_RXMBP_PASSCRC_MASK BIT(30)
142#define EMAC_RXMBP_QOSEN_MASK BIT(29)
143#define EMAC_RXMBP_NOCHAIN_MASK BIT(28)
144#define EMAC_RXMBP_CMFEN_MASK BIT(24)
145#define EMAC_RXMBP_CSFEN_MASK BIT(23)
146#define EMAC_RXMBP_CEFEN_MASK BIT(22)
147#define EMAC_RXMBP_CAFEN_MASK BIT(21)
148#define EMAC_RXMBP_PROMCH_SHIFT (16)
149#define EMAC_RXMBP_PROMCH_MASK (0x7 << 16)
150#define EMAC_RXMBP_BROADEN_MASK BIT(13)
151#define EMAC_RXMBP_BROADCH_SHIFT (8)
152#define EMAC_RXMBP_BROADCH_MASK (0x7 << 8)
153#define EMAC_RXMBP_MULTIEN_MASK BIT(5)
154#define EMAC_RXMBP_MULTICH_SHIFT (0)
155#define EMAC_RXMBP_MULTICH_MASK (0x7)
156#define EMAC_RXMBP_CHMASK (0x7)
157
158/* EMAC register definitions/bit maps used */
159# define EMAC_MBP_RXPROMISC (0x00200000)
160# define EMAC_MBP_PROMISCCH(ch) (((ch) & 0x7) << 16)
161# define EMAC_MBP_RXBCAST (0x00002000)
162# define EMAC_MBP_BCASTCHAN(ch) (((ch) & 0x7) << 8)
163# define EMAC_MBP_RXMCAST (0x00000020)
164# define EMAC_MBP_MCASTCHAN(ch) ((ch) & 0x7)
165
166/* EMAC mac_control register */
167#define EMAC_MACCONTROL_TXPTYPE (0x200)
168#define EMAC_MACCONTROL_TXPACEEN (0x40)
169#define EMAC_MACCONTROL_MIIEN (0x20)
170#define EMAC_MACCONTROL_GIGABITEN (0x80)
171#define EMAC_MACCONTROL_GIGABITEN_SHIFT (7)
172#define EMAC_MACCONTROL_FULLDUPLEXEN (0x1)
173#define EMAC_MACCONTROL_RMIISPEED_MASK BIT(15)
174
175/* GIGABIT MODE related bits */
176#define EMAC_DM646X_MACCONTORL_GMIIEN BIT(5)
177#define EMAC_DM646X_MACCONTORL_GIG BIT(7)
178#define EMAC_DM646X_MACCONTORL_GIGFORCE BIT(17)
179
180/* EMAC mac_status register */
181#define EMAC_MACSTATUS_TXERRCODE_MASK (0xF00000)
182#define EMAC_MACSTATUS_TXERRCODE_SHIFT (20)
183#define EMAC_MACSTATUS_TXERRCH_MASK (0x7)
184#define EMAC_MACSTATUS_TXERRCH_SHIFT (16)
185#define EMAC_MACSTATUS_RXERRCODE_MASK (0xF000)
186#define EMAC_MACSTATUS_RXERRCODE_SHIFT (12)
187#define EMAC_MACSTATUS_RXERRCH_MASK (0x7)
188#define EMAC_MACSTATUS_RXERRCH_SHIFT (8)
189
190/* EMAC RX register masks */
191#define EMAC_RX_MAX_LEN_MASK (0xFFFF)
192#define EMAC_RX_BUFFER_OFFSET_MASK (0xFFFF)
193
194/* MAC_IN_VECTOR (0x180) register bit fields */
195#define EMAC_DM644X_MAC_IN_VECTOR_HOST_INT (0x20000)
196#define EMAC_DM644X_MAC_IN_VECTOR_STATPEND_INT (0x10000)
197#define EMAC_DM644X_MAC_IN_VECTOR_RX_INT_VEC (0x0100)
198#define EMAC_DM644X_MAC_IN_VECTOR_TX_INT_VEC (0x01)
199
200/** NOTE:: For DM646x the IN_VECTOR has changed */
201#define EMAC_DM646X_MAC_IN_VECTOR_RX_INT_VEC BIT(EMAC_DEF_RX_CH)
202#define EMAC_DM646X_MAC_IN_VECTOR_TX_INT_VEC BIT(16 + EMAC_DEF_TX_CH)
203
204/* CPPI bit positions */
205#define EMAC_CPPI_SOP_BIT BIT(31)
206#define EMAC_CPPI_EOP_BIT BIT(30)
207#define EMAC_CPPI_OWNERSHIP_BIT BIT(29)
208#define EMAC_CPPI_EOQ_BIT BIT(28)
209#define EMAC_CPPI_TEARDOWN_COMPLETE_BIT BIT(27)
210#define EMAC_CPPI_PASS_CRC_BIT BIT(26)
211#define EMAC_RX_BD_BUF_SIZE (0xFFFF)
212#define EMAC_BD_LENGTH_FOR_CACHE (16) /* only CPPI bytes */
213#define EMAC_RX_BD_PKT_LENGTH_MASK (0xFFFF)
214
215/* Max hardware defines */
216#define EMAC_MAX_TXRX_CHANNELS (8) /* Max hardware channels */
217#define EMAC_DEF_MAX_MULTICAST_ADDRESSES (64) /* Max mcast addr's */
218
219/* EMAC Peripheral Device Register Memory Layout structure */
220#define EMAC_TXIDVER 0x0
221#define EMAC_TXCONTROL 0x4
222#define EMAC_TXTEARDOWN 0x8
223#define EMAC_RXIDVER 0x10
224#define EMAC_RXCONTROL 0x14
225#define EMAC_RXTEARDOWN 0x18
226#define EMAC_TXINTSTATRAW 0x80
227#define EMAC_TXINTSTATMASKED 0x84
228#define EMAC_TXINTMASKSET 0x88
229#define EMAC_TXINTMASKCLEAR 0x8C
230#define EMAC_MACINVECTOR 0x90
231
232#define EMAC_DM646X_MACEOIVECTOR 0x94
233
234#define EMAC_RXINTSTATRAW 0xA0
235#define EMAC_RXINTSTATMASKED 0xA4
236#define EMAC_RXINTMASKSET 0xA8
237#define EMAC_RXINTMASKCLEAR 0xAC
238#define EMAC_MACINTSTATRAW 0xB0
239#define EMAC_MACINTSTATMASKED 0xB4
240#define EMAC_MACINTMASKSET 0xB8
241#define EMAC_MACINTMASKCLEAR 0xBC
242
243#define EMAC_RXMBPENABLE 0x100
244#define EMAC_RXUNICASTSET 0x104
245#define EMAC_RXUNICASTCLEAR 0x108
246#define EMAC_RXMAXLEN 0x10C
247#define EMAC_RXBUFFEROFFSET 0x110
248#define EMAC_RXFILTERLOWTHRESH 0x114
249
250#define EMAC_MACCONTROL 0x160
251#define EMAC_MACSTATUS 0x164
252#define EMAC_EMCONTROL 0x168
253#define EMAC_FIFOCONTROL 0x16C
254#define EMAC_MACCONFIG 0x170
255#define EMAC_SOFTRESET 0x174
256#define EMAC_MACSRCADDRLO 0x1D0
257#define EMAC_MACSRCADDRHI 0x1D4
258#define EMAC_MACHASH1 0x1D8
259#define EMAC_MACHASH2 0x1DC
260#define EMAC_MACADDRLO 0x500
261#define EMAC_MACADDRHI 0x504
262#define EMAC_MACINDEX 0x508
263
264/* EMAC HDP and Completion registors */
265#define EMAC_TXHDP(ch) (0x600 + (ch * 4))
266#define EMAC_RXHDP(ch) (0x620 + (ch * 4))
267#define EMAC_TXCP(ch) (0x640 + (ch * 4))
268#define EMAC_RXCP(ch) (0x660 + (ch * 4))
269
270/* EMAC statistics registers */
271#define EMAC_RXGOODFRAMES 0x200
272#define EMAC_RXBCASTFRAMES 0x204
273#define EMAC_RXMCASTFRAMES 0x208
274#define EMAC_RXPAUSEFRAMES 0x20C
275#define EMAC_RXCRCERRORS 0x210
276#define EMAC_RXALIGNCODEERRORS 0x214
277#define EMAC_RXOVERSIZED 0x218
278#define EMAC_RXJABBER 0x21C
279#define EMAC_RXUNDERSIZED 0x220
280#define EMAC_RXFRAGMENTS 0x224
281#define EMAC_RXFILTERED 0x228
282#define EMAC_RXQOSFILTERED 0x22C
283#define EMAC_RXOCTETS 0x230
284#define EMAC_TXGOODFRAMES 0x234
285#define EMAC_TXBCASTFRAMES 0x238
286#define EMAC_TXMCASTFRAMES 0x23C
287#define EMAC_TXPAUSEFRAMES 0x240
288#define EMAC_TXDEFERRED 0x244
289#define EMAC_TXCOLLISION 0x248
290#define EMAC_TXSINGLECOLL 0x24C
291#define EMAC_TXMULTICOLL 0x250
292#define EMAC_TXEXCESSIVECOLL 0x254
293#define EMAC_TXLATECOLL 0x258
294#define EMAC_TXUNDERRUN 0x25C
295#define EMAC_TXCARRIERSENSE 0x260
296#define EMAC_TXOCTETS 0x264
297#define EMAC_NETOCTETS 0x280
298#define EMAC_RXSOFOVERRUNS 0x284
299#define EMAC_RXMOFOVERRUNS 0x288
300#define EMAC_RXDMAOVERRUNS 0x28C
301
302/* EMAC DM644x control registers */
303#define EMAC_CTRL_EWCTL (0x4)
304#define EMAC_CTRL_EWINTTCNT (0x8)
305
306/* EMAC MDIO related */
307/* Mask & Control defines */
308#define MDIO_CONTROL_CLKDIV (0xFF)
309#define MDIO_CONTROL_ENABLE BIT(30)
310#define MDIO_USERACCESS_GO BIT(31)
311#define MDIO_USERACCESS_WRITE BIT(30)
312#define MDIO_USERACCESS_READ (0)
313#define MDIO_USERACCESS_REGADR (0x1F << 21)
314#define MDIO_USERACCESS_PHYADR (0x1F << 16)
315#define MDIO_USERACCESS_DATA (0xFFFF)
316#define MDIO_USERPHYSEL_LINKSEL BIT(7)
317#define MDIO_VER_MODID (0xFFFF << 16)
318#define MDIO_VER_REVMAJ (0xFF << 8)
319#define MDIO_VER_REVMIN (0xFF)
320
321#define MDIO_USERACCESS(inst) (0x80 + (inst * 8))
322#define MDIO_USERPHYSEL(inst) (0x84 + (inst * 8))
323#define MDIO_CONTROL (0x04)
324
325/* EMAC DM646X control module registers */
326#define EMAC_DM646X_CMRXINTEN (0x14)
327#define EMAC_DM646X_CMTXINTEN (0x18)
328
329/* EMAC EOI codes for C0 */
330#define EMAC_DM646X_MAC_EOI_C0_RXEN (0x01)
331#define EMAC_DM646X_MAC_EOI_C0_TXEN (0x02)
332
333/** net_buf_obj: EMAC network bufferdata structure
334 *
335 * EMAC network buffer data structure
336 */
337struct emac_netbufobj {
338 void *buf_token;
339 char *data_ptr;
340 int length;
341};
342
343/** net_pkt_obj: EMAC network packet data structure
344 *
345 * EMAC network packet data structure - supports buffer list (for future)
346 */
347struct emac_netpktobj {
348 void *pkt_token; /* data token may hold tx/rx chan id */
349 struct emac_netbufobj *buf_list; /* array of network buffer objects */
350 int num_bufs;
351 int pkt_length;
352};
353
354/** emac_tx_bd: EMAC TX Buffer descriptor data structure
355 *
356 * EMAC TX Buffer descriptor data structure
357 */
358struct emac_tx_bd {
359 int h_next;
360 int buff_ptr;
361 int off_b_len;
362 int mode; /* SOP, EOP, ownership, EOQ, teardown,Qstarv, length */
363 struct emac_tx_bd __iomem *next;
364 void *buf_token;
365};
366
367/** emac_txch: EMAC TX Channel data structure
368 *
369 * EMAC TX Channel data structure
370 */
371struct emac_txch {
372 /* Config related */
373 u32 num_bd;
374 u32 service_max;
375
376 /* CPPI specific */
377 u32 alloc_size;
378 void __iomem *bd_mem;
379 struct emac_tx_bd __iomem *bd_pool_head;
380 struct emac_tx_bd __iomem *active_queue_head;
381 struct emac_tx_bd __iomem *active_queue_tail;
382 struct emac_tx_bd __iomem *last_hw_bdprocessed;
383 u32 queue_active;
384 u32 teardown_pending;
385 u32 *tx_complete;
386
387 /** statistics */
388 u32 proc_count; /* TX: # of times emac_tx_bdproc is called */
389 u32 mis_queued_packets;
390 u32 queue_reinit;
391 u32 end_of_queue_add;
392 u32 out_of_tx_bd;
393 u32 no_active_pkts; /* IRQ when there were no packets to process */
394 u32 active_queue_count;
395};
396
397/** emac_rx_bd: EMAC RX Buffer descriptor data structure
398 *
399 * EMAC RX Buffer descriptor data structure
400 */
401struct emac_rx_bd {
402 int h_next;
403 int buff_ptr;
404 int off_b_len;
405 int mode;
406 struct emac_rx_bd __iomem *next;
407 void *data_ptr;
408 void *buf_token;
409};
410
411/** emac_rxch: EMAC RX Channel data structure
412 *
413 * EMAC RX Channel data structure
414 */
415struct emac_rxch {
416 /* configuration info */
417 u32 num_bd;
418 u32 service_max;
419 u32 buf_size;
420 char mac_addr[6];
421
422 /** CPPI specific */
423 u32 alloc_size;
424 void __iomem *bd_mem;
425 struct emac_rx_bd __iomem *bd_pool_head;
426 struct emac_rx_bd __iomem *active_queue_head;
427 struct emac_rx_bd __iomem *active_queue_tail;
428 u32 queue_active;
429 u32 teardown_pending;
430
431 /* packet and buffer objects */
432 struct emac_netpktobj pkt_queue;
433 struct emac_netbufobj buf_queue;
434
435 /** statistics */
436 u32 proc_count; /* number of times emac_rx_bdproc is called */
437 u32 processed_bd;
438 u32 recycled_bd;
439 u32 out_of_rx_bd;
440 u32 out_of_rx_buffers;
441 u32 queue_reinit;
442 u32 end_of_queue_add;
443 u32 end_of_queue;
444 u32 mis_queued_packets;
445};
446
447/* emac_priv: EMAC private data structure
448 *
449 * EMAC adapter private data structure
450 */
451struct emac_priv {
452 u32 msg_enable;
453 struct net_device *ndev;
454 struct platform_device *pdev;
455 struct napi_struct napi;
456 char mac_addr[6];
457 spinlock_t tx_lock;
458 spinlock_t rx_lock;
459 void __iomem *remap_addr;
460 u32 emac_base_phys;
461 void __iomem *emac_base;
462 void __iomem *ctrl_base;
463 void __iomem *emac_ctrl_ram;
464 u32 ctrl_ram_size;
465 struct emac_txch *txch[EMAC_DEF_MAX_TX_CH];
466 struct emac_rxch *rxch[EMAC_DEF_MAX_RX_CH];
467 u32 link; /* 1=link on, 0=link off */
468 u32 speed; /* 0=Auto Neg, 1=No PHY, 10,100, 1000 - mbps */
469 u32 duplex; /* Link duplex: 0=Half, 1=Full */
470 u32 rx_buf_size;
471 u32 isr_count;
472 u8 rmii_en;
473 u8 version;
474 struct net_device_stats net_dev_stats;
475 u32 mac_hash1;
476 u32 mac_hash2;
477 u32 multicast_hash_cnt[EMAC_NUM_MULTICAST_BITS];
478 u32 rx_addr_type;
479 /* periodic timer required for MDIO polling */
480 struct timer_list periodic_timer;
481 u32 periodic_ticks;
482 u32 timer_active;
483 u32 phy_mask;
484 /* mii_bus,phy members */
485 struct mii_bus *mii_bus;
486 struct phy_device *phydev;
487 spinlock_t lock;
488};
489
490/* clock frequency for EMAC */
491static struct clk *emac_clk;
492static unsigned long emac_bus_frequency;
493static unsigned long mdio_max_freq;
494
495/* EMAC internal utility function */
496static inline u32 emac_virt_to_phys(void __iomem *addr)
497{
498 return (u32 __force) io_v2p(addr);
499}
500
501/* Cache macros - Packet buffers would be from skb pool which is cached */
502#define EMAC_VIRT_NOCACHE(addr) (addr)
503#define EMAC_CACHE_INVALIDATE(addr, size) \
504 dma_cache_maint((void *)addr, size, DMA_FROM_DEVICE)
505#define EMAC_CACHE_WRITEBACK(addr, size) \
506 dma_cache_maint((void *)addr, size, DMA_TO_DEVICE)
507#define EMAC_CACHE_WRITEBACK_INVALIDATE(addr, size) \
508 dma_cache_maint((void *)addr, size, DMA_BIDIRECTIONAL)
509
510/* DM644x does not have BD's in cached memory - so no cache functions */
511#define BD_CACHE_INVALIDATE(addr, size)
512#define BD_CACHE_WRITEBACK(addr, size)
513#define BD_CACHE_WRITEBACK_INVALIDATE(addr, size)
514
515/* EMAC TX Host Error description strings */
516static char *emac_txhost_errcodes[16] = {
517 "No error", "SOP error", "Ownership bit not set in SOP buffer",
518 "Zero Next Buffer Descriptor Pointer Without EOP",
519 "Zero Buffer Pointer", "Zero Buffer Length", "Packet Length Error",
520 "Reserved", "Reserved", "Reserved", "Reserved", "Reserved",
521 "Reserved", "Reserved", "Reserved", "Reserved"
522};
523
524/* EMAC RX Host Error description strings */
525static char *emac_rxhost_errcodes[16] = {
526 "No error", "Reserved", "Ownership bit not set in input buffer",
527 "Reserved", "Zero Buffer Pointer", "Reserved", "Reserved",
528 "Reserved", "Reserved", "Reserved", "Reserved", "Reserved",
529 "Reserved", "Reserved", "Reserved", "Reserved"
530};
531
532/* Helper macros */
533#define emac_read(reg) ioread32(priv->emac_base + (reg))
534#define emac_write(reg, val) iowrite32(val, priv->emac_base + (reg))
535
536#define emac_ctrl_read(reg) ioread32((priv->ctrl_base + (reg)))
537#define emac_ctrl_write(reg, val) iowrite32(val, (priv->ctrl_base + (reg)))
538
539#define emac_mdio_read(reg) ioread32(bus->priv + (reg))
540#define emac_mdio_write(reg, val) iowrite32(val, (bus->priv + (reg)))
541
542/**
543 * emac_dump_regs: Dump important EMAC registers to debug terminal
544 * @priv: The DaVinci EMAC private adapter structure
545 *
546 * Executes ethtool set cmd & sets phy mode
547 *
548 */
549static void emac_dump_regs(struct emac_priv *priv)
550{
551 struct device *emac_dev = &priv->ndev->dev;
552
553 /* Print important registers in EMAC */
554 dev_info(emac_dev, "EMAC Basic registers\n");
555 dev_info(emac_dev, "EMAC: EWCTL: %08X, EWINTTCNT: %08X\n",
556 emac_ctrl_read(EMAC_CTRL_EWCTL),
557 emac_ctrl_read(EMAC_CTRL_EWINTTCNT));
558 dev_info(emac_dev, "EMAC: TXID: %08X %s, RXID: %08X %s\n",
559 emac_read(EMAC_TXIDVER),
560 ((emac_read(EMAC_TXCONTROL)) ? "enabled" : "disabled"),
561 emac_read(EMAC_RXIDVER),
562 ((emac_read(EMAC_RXCONTROL)) ? "enabled" : "disabled"));
563 dev_info(emac_dev, "EMAC: TXIntRaw:%08X, TxIntMasked: %08X, "\
564 "TxIntMasSet: %08X\n", emac_read(EMAC_TXINTSTATRAW),
565 emac_read(EMAC_TXINTSTATMASKED), emac_read(EMAC_TXINTMASKSET));
566 dev_info(emac_dev, "EMAC: RXIntRaw:%08X, RxIntMasked: %08X, "\
567 "RxIntMasSet: %08X\n", emac_read(EMAC_RXINTSTATRAW),
568 emac_read(EMAC_RXINTSTATMASKED), emac_read(EMAC_RXINTMASKSET));
569 dev_info(emac_dev, "EMAC: MacIntRaw:%08X, MacIntMasked: %08X, "\
570 "MacInVector=%08X\n", emac_read(EMAC_MACINTSTATRAW),
571 emac_read(EMAC_MACINTSTATMASKED), emac_read(EMAC_MACINVECTOR));
572 dev_info(emac_dev, "EMAC: EmuControl:%08X, FifoControl: %08X\n",
573 emac_read(EMAC_EMCONTROL), emac_read(EMAC_FIFOCONTROL));
574 dev_info(emac_dev, "EMAC: MBPEnable:%08X, RXUnicastSet: %08X, "\
575 "RXMaxLen=%08X\n", emac_read(EMAC_RXMBPENABLE),
576 emac_read(EMAC_RXUNICASTSET), emac_read(EMAC_RXMAXLEN));
577 dev_info(emac_dev, "EMAC: MacControl:%08X, MacStatus: %08X, "\
578 "MacConfig=%08X\n", emac_read(EMAC_MACCONTROL),
579 emac_read(EMAC_MACSTATUS), emac_read(EMAC_MACCONFIG));
580 dev_info(emac_dev, "EMAC: TXHDP[0]:%08X, RXHDP[0]: %08X\n",
581 emac_read(EMAC_TXHDP(0)), emac_read(EMAC_RXHDP(0)));
582 dev_info(emac_dev, "EMAC Statistics\n");
583 dev_info(emac_dev, "EMAC: rx_good_frames:%d\n",
584 emac_read(EMAC_RXGOODFRAMES));
585 dev_info(emac_dev, "EMAC: rx_broadcast_frames:%d\n",
586 emac_read(EMAC_RXBCASTFRAMES));
587 dev_info(emac_dev, "EMAC: rx_multicast_frames:%d\n",
588 emac_read(EMAC_RXMCASTFRAMES));
589 dev_info(emac_dev, "EMAC: rx_pause_frames:%d\n",
590 emac_read(EMAC_RXPAUSEFRAMES));
591 dev_info(emac_dev, "EMAC: rx_crcerrors:%d\n",
592 emac_read(EMAC_RXCRCERRORS));
593 dev_info(emac_dev, "EMAC: rx_align_code_errors:%d\n",
594 emac_read(EMAC_RXALIGNCODEERRORS));
595 dev_info(emac_dev, "EMAC: rx_oversized_frames:%d\n",
596 emac_read(EMAC_RXOVERSIZED));
597 dev_info(emac_dev, "EMAC: rx_jabber_frames:%d\n",
598 emac_read(EMAC_RXJABBER));
599 dev_info(emac_dev, "EMAC: rx_undersized_frames:%d\n",
600 emac_read(EMAC_RXUNDERSIZED));
601 dev_info(emac_dev, "EMAC: rx_fragments:%d\n",
602 emac_read(EMAC_RXFRAGMENTS));
603 dev_info(emac_dev, "EMAC: rx_filtered_frames:%d\n",
604 emac_read(EMAC_RXFILTERED));
605 dev_info(emac_dev, "EMAC: rx_qos_filtered_frames:%d\n",
606 emac_read(EMAC_RXQOSFILTERED));
607 dev_info(emac_dev, "EMAC: rx_octets:%d\n",
608 emac_read(EMAC_RXOCTETS));
609 dev_info(emac_dev, "EMAC: tx_goodframes:%d\n",
610 emac_read(EMAC_TXGOODFRAMES));
611 dev_info(emac_dev, "EMAC: tx_bcastframes:%d\n",
612 emac_read(EMAC_TXBCASTFRAMES));
613 dev_info(emac_dev, "EMAC: tx_mcastframes:%d\n",
614 emac_read(EMAC_TXMCASTFRAMES));
615 dev_info(emac_dev, "EMAC: tx_pause_frames:%d\n",
616 emac_read(EMAC_TXPAUSEFRAMES));
617 dev_info(emac_dev, "EMAC: tx_deferred_frames:%d\n",
618 emac_read(EMAC_TXDEFERRED));
619 dev_info(emac_dev, "EMAC: tx_collision_frames:%d\n",
620 emac_read(EMAC_TXCOLLISION));
621 dev_info(emac_dev, "EMAC: tx_single_coll_frames:%d\n",
622 emac_read(EMAC_TXSINGLECOLL));
623 dev_info(emac_dev, "EMAC: tx_mult_coll_frames:%d\n",
624 emac_read(EMAC_TXMULTICOLL));
625 dev_info(emac_dev, "EMAC: tx_excessive_collisions:%d\n",
626 emac_read(EMAC_TXEXCESSIVECOLL));
627 dev_info(emac_dev, "EMAC: tx_late_collisions:%d\n",
628 emac_read(EMAC_TXLATECOLL));
629 dev_info(emac_dev, "EMAC: tx_underrun:%d\n",
630 emac_read(EMAC_TXUNDERRUN));
631 dev_info(emac_dev, "EMAC: tx_carrier_sense_errors:%d\n",
632 emac_read(EMAC_TXCARRIERSENSE));
633 dev_info(emac_dev, "EMAC: tx_octets:%d\n",
634 emac_read(EMAC_TXOCTETS));
635 dev_info(emac_dev, "EMAC: net_octets:%d\n",
636 emac_read(EMAC_NETOCTETS));
637 dev_info(emac_dev, "EMAC: rx_sof_overruns:%d\n",
638 emac_read(EMAC_RXSOFOVERRUNS));
639 dev_info(emac_dev, "EMAC: rx_mof_overruns:%d\n",
640 emac_read(EMAC_RXMOFOVERRUNS));
641 dev_info(emac_dev, "EMAC: rx_dma_overruns:%d\n",
642 emac_read(EMAC_RXDMAOVERRUNS));
643}
644
645/*************************************************************************
646 * EMAC MDIO/Phy Functionality
647 *************************************************************************/
648/**
649 * emac_get_drvinfo: Get EMAC driver information
650 * @ndev: The DaVinci EMAC network adapter
651 * @info: ethtool info structure containing name and version
652 *
653 * Returns EMAC driver information (name and version)
654 *
655 */
656static void emac_get_drvinfo(struct net_device *ndev,
657 struct ethtool_drvinfo *info)
658{
659 strcpy(info->driver, emac_version_string);
660 strcpy(info->version, EMAC_MODULE_VERSION);
661}
662
663/**
664 * emac_get_settings: Get EMAC settings
665 * @ndev: The DaVinci EMAC network adapter
666 * @ecmd: ethtool command
667 *
668 * Executes ethool get command
669 *
670 */
671static int emac_get_settings(struct net_device *ndev,
672 struct ethtool_cmd *ecmd)
673{
674 struct emac_priv *priv = netdev_priv(ndev);
675 if (priv->phy_mask)
676 return phy_ethtool_gset(priv->phydev, ecmd);
677 else
678 return -EOPNOTSUPP;
679
680}
681
682/**
683 * emac_set_settings: Set EMAC settings
684 * @ndev: The DaVinci EMAC network adapter
685 * @ecmd: ethtool command
686 *
687 * Executes ethool set command
688 *
689 */
690static int emac_set_settings(struct net_device *ndev, struct ethtool_cmd *ecmd)
691{
692 struct emac_priv *priv = netdev_priv(ndev);
693 if (priv->phy_mask)
694 return phy_ethtool_sset(priv->phydev, ecmd);
695 else
696 return -EOPNOTSUPP;
697
698}
699
700/**
701 * ethtool_ops: DaVinci EMAC Ethtool structure
702 *
703 * Ethtool support for EMAC adapter
704 *
705 */
706static const struct ethtool_ops ethtool_ops = {
707 .get_drvinfo = emac_get_drvinfo,
708 .get_settings = emac_get_settings,
709 .set_settings = emac_set_settings,
710 .get_link = ethtool_op_get_link,
711};
712
713/**
714 * emac_update_phystatus: Update Phy status
715 * @priv: The DaVinci EMAC private adapter structure
716 *
717 * Updates phy status and takes action for network queue if required
718 * based upon link status
719 *
720 */
721static void emac_update_phystatus(struct emac_priv *priv)
722{
723 u32 mac_control;
724 u32 new_duplex;
725 u32 cur_duplex;
726 struct net_device *ndev = priv->ndev;
727
728 mac_control = emac_read(EMAC_MACCONTROL);
729 cur_duplex = (mac_control & EMAC_MACCONTROL_FULLDUPLEXEN) ?
730 DUPLEX_FULL : DUPLEX_HALF;
731 if (priv->phy_mask)
732 new_duplex = priv->phydev->duplex;
733 else
734 new_duplex = DUPLEX_FULL;
735
736 /* We get called only if link has changed (speed/duplex/status) */
737 if ((priv->link) && (new_duplex != cur_duplex)) {
738 priv->duplex = new_duplex;
739 if (DUPLEX_FULL == priv->duplex)
740 mac_control |= (EMAC_MACCONTROL_FULLDUPLEXEN);
741 else
742 mac_control &= ~(EMAC_MACCONTROL_FULLDUPLEXEN);
743 }
744
745 if (priv->speed == SPEED_1000 && (priv->version == EMAC_VERSION_2)) {
746 mac_control = emac_read(EMAC_MACCONTROL);
747 mac_control |= (EMAC_DM646X_MACCONTORL_GMIIEN |
748 EMAC_DM646X_MACCONTORL_GIG |
749 EMAC_DM646X_MACCONTORL_GIGFORCE);
750 } else {
751 /* Clear the GIG bit and GIGFORCE bit */
752 mac_control &= ~(EMAC_DM646X_MACCONTORL_GIGFORCE |
753 EMAC_DM646X_MACCONTORL_GIG);
754
755 if (priv->rmii_en && (priv->speed == SPEED_100))
756 mac_control |= EMAC_MACCONTROL_RMIISPEED_MASK;
757 else
758 mac_control &= ~EMAC_MACCONTROL_RMIISPEED_MASK;
759 }
760
761 /* Update mac_control if changed */
762 emac_write(EMAC_MACCONTROL, mac_control);
763
764 if (priv->link) {
765 /* link ON */
766 if (!netif_carrier_ok(ndev))
767 netif_carrier_on(ndev);
768 /* reactivate the transmit queue if it is stopped */
769 if (netif_running(ndev) && netif_queue_stopped(ndev))
770 netif_wake_queue(ndev);
771 } else {
772 /* link OFF */
773 if (netif_carrier_ok(ndev))
774 netif_carrier_off(ndev);
775 if (!netif_queue_stopped(ndev))
776 netif_stop_queue(ndev);
777 }
778}
779
780/**
781 * hash_get: Calculate hash value from mac address
782 * @addr: mac address to delete from hash table
783 *
784 * Calculates hash value from mac address
785 *
786 */
787static u32 hash_get(u8 *addr)
788{
789 u32 hash;
790 u8 tmpval;
791 int cnt;
792 hash = 0;
793
794 for (cnt = 0; cnt < 2; cnt++) {
795 tmpval = *addr++;
796 hash ^= (tmpval >> 2) ^ (tmpval << 4);
797 tmpval = *addr++;
798 hash ^= (tmpval >> 4) ^ (tmpval << 2);
799 tmpval = *addr++;
800 hash ^= (tmpval >> 6) ^ (tmpval);
801 }
802
803 return hash & 0x3F;
804}
805
806/**
807 * hash_add: Hash function to add mac addr from hash table
808 * @priv: The DaVinci EMAC private adapter structure
809 * mac_addr: mac address to delete from hash table
810 *
811 * Adds mac address to the internal hash table
812 *
813 */
814static int hash_add(struct emac_priv *priv, u8 *mac_addr)
815{
816 struct device *emac_dev = &priv->ndev->dev;
817 u32 rc = 0;
818 u32 hash_bit;
819 u32 hash_value = hash_get(mac_addr);
820
821 if (hash_value >= EMAC_NUM_MULTICAST_BITS) {
822 if (netif_msg_drv(priv)) {
823 dev_err(emac_dev, "DaVinci EMAC: hash_add(): Invalid "\
824 "Hash %08x, should not be greater than %08x",
825 hash_value, (EMAC_NUM_MULTICAST_BITS - 1));
826 }
827 return -1;
828 }
829
830 /* set the hash bit only if not previously set */
831 if (priv->multicast_hash_cnt[hash_value] == 0) {
832 rc = 1; /* hash value changed */
833 if (hash_value < 32) {
834 hash_bit = BIT(hash_value);
835 priv->mac_hash1 |= hash_bit;
836 } else {
837 hash_bit = BIT((hash_value - 32));
838 priv->mac_hash2 |= hash_bit;
839 }
840 }
841
842 /* incr counter for num of mcast addr's mapped to "this" hash bit */
843 ++priv->multicast_hash_cnt[hash_value];
844
845 return rc;
846}
847
848/**
849 * hash_del: Hash function to delete mac addr from hash table
850 * @priv: The DaVinci EMAC private adapter structure
851 * mac_addr: mac address to delete from hash table
852 *
853 * Removes mac address from the internal hash table
854 *
855 */
856static int hash_del(struct emac_priv *priv, u8 *mac_addr)
857{
858 u32 hash_value;
859 u32 hash_bit;
860
861 hash_value = hash_get(mac_addr);
862 if (priv->multicast_hash_cnt[hash_value] > 0) {
863 /* dec cntr for num of mcast addr's mapped to this hash bit */
864 --priv->multicast_hash_cnt[hash_value];
865 }
866
867 /* if counter still > 0, at least one multicast address refers
868 * to this hash bit. so return 0 */
869 if (priv->multicast_hash_cnt[hash_value] > 0)
870 return 0;
871
872 if (hash_value < 32) {
873 hash_bit = BIT(hash_value);
874 priv->mac_hash1 &= ~hash_bit;
875 } else {
876 hash_bit = BIT((hash_value - 32));
877 priv->mac_hash2 &= ~hash_bit;
878 }
879
880 /* return 1 to indicate change in mac_hash registers reqd */
881 return 1;
882}
883
884/* EMAC multicast operation */
885#define EMAC_MULTICAST_ADD 0
886#define EMAC_MULTICAST_DEL 1
887#define EMAC_ALL_MULTI_SET 2
888#define EMAC_ALL_MULTI_CLR 3
889
890/**
891 * emac_add_mcast: Set multicast address in the EMAC adapter (Internal)
892 * @priv: The DaVinci EMAC private adapter structure
893 * @action: multicast operation to perform
894 * mac_addr: mac address to set
895 *
896 * Set multicast addresses in EMAC adapter - internal function
897 *
898 */
899static void emac_add_mcast(struct emac_priv *priv, u32 action, u8 *mac_addr)
900{
901 struct device *emac_dev = &priv->ndev->dev;
902 int update = -1;
903
904 switch (action) {
905 case EMAC_MULTICAST_ADD:
906 update = hash_add(priv, mac_addr);
907 break;
908 case EMAC_MULTICAST_DEL:
909 update = hash_del(priv, mac_addr);
910 break;
911 case EMAC_ALL_MULTI_SET:
912 update = 1;
913 priv->mac_hash1 = EMAC_ALL_MULTI_REG_VALUE;
914 priv->mac_hash2 = EMAC_ALL_MULTI_REG_VALUE;
915 break;
916 case EMAC_ALL_MULTI_CLR:
917 update = 1;
918 priv->mac_hash1 = 0;
919 priv->mac_hash2 = 0;
920 memset(&(priv->multicast_hash_cnt[0]), 0,
921 sizeof(priv->multicast_hash_cnt[0]) *
922 EMAC_NUM_MULTICAST_BITS);
923 break;
924 default:
925 if (netif_msg_drv(priv))
926 dev_err(emac_dev, "DaVinci EMAC: add_mcast"\
927 ": bad operation %d", action);
928 break;
929 }
930
931 /* write to the hardware only if the register status chances */
932 if (update > 0) {
933 emac_write(EMAC_MACHASH1, priv->mac_hash1);
934 emac_write(EMAC_MACHASH2, priv->mac_hash2);
935 }
936}
937
938/**
939 * emac_dev_mcast_set: Set multicast address in the EMAC adapter
940 * @ndev: The DaVinci EMAC network adapter
941 *
942 * Set multicast addresses in EMAC adapter
943 *
944 */
945static void emac_dev_mcast_set(struct net_device *ndev)
946{
947 u32 mbp_enable;
948 struct emac_priv *priv = netdev_priv(ndev);
949
950 mbp_enable = emac_read(EMAC_RXMBPENABLE);
951 if (ndev->flags & IFF_PROMISC) {
952 mbp_enable &= (~EMAC_MBP_PROMISCCH(EMAC_DEF_PROM_CH));
953 mbp_enable |= (EMAC_MBP_RXPROMISC);
954 } else {
955 mbp_enable = (mbp_enable & ~EMAC_MBP_RXPROMISC);
956 if ((ndev->flags & IFF_ALLMULTI) ||
957 (ndev->mc_count > EMAC_DEF_MAX_MULTICAST_ADDRESSES)) {
958 mbp_enable = (mbp_enable | EMAC_MBP_RXMCAST);
959 emac_add_mcast(priv, EMAC_ALL_MULTI_SET, NULL);
960 }
961 if (ndev->mc_count > 0) {
962 struct dev_mc_list *mc_ptr;
963 mbp_enable = (mbp_enable | EMAC_MBP_RXMCAST);
964 emac_add_mcast(priv, EMAC_ALL_MULTI_CLR, NULL);
965 /* program multicast address list into EMAC hardware */
966 for (mc_ptr = ndev->mc_list; mc_ptr;
967 mc_ptr = mc_ptr->next) {
968 emac_add_mcast(priv, EMAC_MULTICAST_ADD,
969 (u8 *)mc_ptr->dmi_addr);
970 }
971 } else {
972 mbp_enable = (mbp_enable & ~EMAC_MBP_RXMCAST);
973 emac_add_mcast(priv, EMAC_ALL_MULTI_CLR, NULL);
974 }
975 }
976 /* Set mbp config register */
977 emac_write(EMAC_RXMBPENABLE, mbp_enable);
978}
979
980/*************************************************************************
981 * EMAC Hardware manipulation
982 *************************************************************************/
983
984/**
985 * emac_int_disable: Disable EMAC module interrupt (from adapter)
986 * @priv: The DaVinci EMAC private adapter structure
987 *
988 * Disable EMAC interrupt on the adapter
989 *
990 */
991static void emac_int_disable(struct emac_priv *priv)
992{
993 if (priv->version == EMAC_VERSION_2) {
994 unsigned long flags;
995
996 local_irq_save(flags);
997
998 /* Program C0_Int_En to zero to turn off
999 * interrupts to the CPU */
1000 emac_ctrl_write(EMAC_DM646X_CMRXINTEN, 0x0);
1001 emac_ctrl_write(EMAC_DM646X_CMTXINTEN, 0x0);
1002 /* NOTE: Rx Threshold and Misc interrupts are not disabled */
1003
1004 local_irq_restore(flags);
1005
1006 } else {
1007 /* Set DM644x control registers for interrupt control */
1008 emac_ctrl_write(EMAC_CTRL_EWCTL, 0x0);
1009 }
1010}
1011
1012/**
1013 * emac_int_enable: Enable EMAC module interrupt (from adapter)
1014 * @priv: The DaVinci EMAC private adapter structure
1015 *
1016 * Enable EMAC interrupt on the adapter
1017 *
1018 */
1019static void emac_int_enable(struct emac_priv *priv)
1020{
1021 if (priv->version == EMAC_VERSION_2) {
1022 emac_ctrl_write(EMAC_DM646X_CMRXINTEN, 0xff);
1023 emac_ctrl_write(EMAC_DM646X_CMTXINTEN, 0xff);
1024
1025 /* In addition to turning on interrupt Enable, we need
1026 * ack by writing appropriate values to the EOI
1027 * register */
1028
1029 /* NOTE: Rx Threshold and Misc interrupts are not enabled */
1030
1031 /* ack rxen only then a new pulse will be generated */
1032 emac_write(EMAC_DM646X_MACEOIVECTOR,
1033 EMAC_DM646X_MAC_EOI_C0_RXEN);
1034
1035 /* ack txen- only then a new pulse will be generated */
1036 emac_write(EMAC_DM646X_MACEOIVECTOR,
1037 EMAC_DM646X_MAC_EOI_C0_TXEN);
1038
1039 } else {
1040 /* Set DM644x control registers for interrupt control */
1041 emac_ctrl_write(EMAC_CTRL_EWCTL, 0x1);
1042 }
1043}
1044
1045/**
1046 * emac_irq: EMAC interrupt handler
1047 * @irq: interrupt number
1048 * @dev_id: EMAC network adapter data structure ptr
1049 *
1050 * EMAC Interrupt handler - we only schedule NAPI and not process any packets
1051 * here. EVen the interrupt status is checked (TX/RX/Err) in NAPI poll function
1052 *
1053 * Returns interrupt handled condition
1054 */
1055static irqreturn_t emac_irq(int irq, void *dev_id)
1056{
1057 struct net_device *ndev = (struct net_device *)dev_id;
1058 struct emac_priv *priv = netdev_priv(ndev);
1059
1060 ++priv->isr_count;
1061 if (likely(netif_running(priv->ndev))) {
1062 emac_int_disable(priv);
1063 napi_schedule(&priv->napi);
1064 } else {
1065 /* we are closing down, so dont process anything */
1066 }
1067 return IRQ_HANDLED;
1068}
1069
1070/** EMAC on-chip buffer descriptor memory
1071 *
1072 * WARNING: Please note that the on chip memory is used for both TX and RX
1073 * buffer descriptor queues and is equally divided between TX and RX desc's
1074 * If the number of TX or RX descriptors change this memory pointers need
1075 * to be adjusted. If external memory is allocated then these pointers can
1076 * pointer to the memory
1077 *
1078 */
1079#define EMAC_TX_BD_MEM(priv) ((priv)->emac_ctrl_ram)
1080#define EMAC_RX_BD_MEM(priv) ((priv)->emac_ctrl_ram + \
1081 (((priv)->ctrl_ram_size) >> 1))
1082
1083/**
1084 * emac_init_txch: TX channel initialization
1085 * @priv: The DaVinci EMAC private adapter structure
1086 * @ch: RX channel number
1087 *
1088 * Called during device init to setup a TX channel (allocate buffer desc
1089 * create free pool and keep ready for transmission
1090 *
1091 * Returns success(0) or mem alloc failures error code
1092 */
1093static int emac_init_txch(struct emac_priv *priv, u32 ch)
1094{
1095 struct device *emac_dev = &priv->ndev->dev;
1096 u32 cnt, bd_size;
1097 void __iomem *mem;
1098 struct emac_tx_bd __iomem *curr_bd;
1099 struct emac_txch *txch = NULL;
1100
1101 txch = kzalloc(sizeof(struct emac_txch), GFP_KERNEL);
1102 if (NULL == txch) {
1103 dev_err(emac_dev, "DaVinci EMAC: TX Ch mem alloc failed");
1104 return -ENOMEM;
1105 }
1106 priv->txch[ch] = txch;
1107 txch->service_max = EMAC_DEF_TX_MAX_SERVICE;
1108 txch->active_queue_head = NULL;
1109 txch->active_queue_tail = NULL;
1110 txch->queue_active = 0;
1111 txch->teardown_pending = 0;
1112
1113 /* allocate memory for TX CPPI channel on a 4 byte boundry */
1114 txch->tx_complete = kzalloc(txch->service_max * sizeof(u32),
1115 GFP_KERNEL);
1116 if (NULL == txch->tx_complete) {
1117 dev_err(emac_dev, "DaVinci EMAC: Tx service mem alloc failed");
1118 kfree(txch);
1119 return -ENOMEM;
1120 }
1121
1122 /* allocate buffer descriptor pool align every BD on four word
1123 * boundry for future requirements */
1124 bd_size = (sizeof(struct emac_tx_bd) + 0xF) & ~0xF;
1125 txch->num_bd = (priv->ctrl_ram_size >> 1) / bd_size;
1126 txch->alloc_size = (((bd_size * txch->num_bd) + 0xF) & ~0xF);
1127
1128 /* alloc TX BD memory */
1129 txch->bd_mem = EMAC_TX_BD_MEM(priv);
1130 __memzero((void __force *)txch->bd_mem, txch->alloc_size);
1131
1132 /* initialize the BD linked list */
1133 mem = (void __force __iomem *)
1134 (((u32 __force) txch->bd_mem + 0xF) & ~0xF);
1135 txch->bd_pool_head = NULL;
1136 for (cnt = 0; cnt < txch->num_bd; cnt++) {
1137 curr_bd = mem + (cnt * bd_size);
1138 curr_bd->next = txch->bd_pool_head;
1139 txch->bd_pool_head = curr_bd;
1140 }
1141
1142 /* reset statistics counters */
1143 txch->out_of_tx_bd = 0;
1144 txch->no_active_pkts = 0;
1145 txch->active_queue_count = 0;
1146
1147 return 0;
1148}
1149
1150/**
1151 * emac_cleanup_txch: Book-keep function to clean TX channel resources
1152 * @priv: The DaVinci EMAC private adapter structure
1153 * @ch: TX channel number
1154 *
1155 * Called to clean up TX channel resources
1156 *
1157 */
1158static void emac_cleanup_txch(struct emac_priv *priv, u32 ch)
1159{
1160 struct emac_txch *txch = priv->txch[ch];
1161
1162 if (txch) {
1163 if (txch->bd_mem)
1164 txch->bd_mem = NULL;
1165 kfree(txch->tx_complete);
1166 kfree(txch);
1167 priv->txch[ch] = NULL;
1168 }
1169}
1170
1171/**
1172 * emac_net_tx_complete: TX packet completion function
1173 * @priv: The DaVinci EMAC private adapter structure
1174 * @net_data_tokens: packet token - skb pointer
1175 * @num_tokens: number of skb's to free
1176 * @ch: TX channel number
1177 *
1178 * Frees the skb once packet is transmitted
1179 *
1180 */
1181static int emac_net_tx_complete(struct emac_priv *priv,
1182 void **net_data_tokens,
1183 int num_tokens, u32 ch)
1184{
1185 u32 cnt;
1186
1187 if (unlikely(num_tokens && netif_queue_stopped(priv->ndev)))
1188 netif_start_queue(priv->ndev);
1189 for (cnt = 0; cnt < num_tokens; cnt++) {
1190 struct sk_buff *skb = (struct sk_buff *)net_data_tokens[cnt];
1191 if (skb == NULL)
1192 continue;
1193 priv->net_dev_stats.tx_packets++;
1194 priv->net_dev_stats.tx_bytes += skb->len;
1195 dev_kfree_skb_any(skb);
1196 }
1197 return 0;
1198}
1199
1200/**
1201 * emac_txch_teardown: TX channel teardown
1202 * @priv: The DaVinci EMAC private adapter structure
1203 * @ch: TX channel number
1204 *
1205 * Called to teardown TX channel
1206 *
1207 */
1208static void emac_txch_teardown(struct emac_priv *priv, u32 ch)
1209{
1210 struct device *emac_dev = &priv->ndev->dev;
1211 u32 teardown_cnt = 0xFFFFFFF0; /* Some high value */
1212 struct emac_txch *txch = priv->txch[ch];
1213 struct emac_tx_bd __iomem *curr_bd;
1214
1215 while ((emac_read(EMAC_TXCP(ch)) & EMAC_TEARDOWN_VALUE) !=
1216 EMAC_TEARDOWN_VALUE) {
1217 /* wait till tx teardown complete */
1218 cpu_relax(); /* TODO: check if this helps ... */
1219 --teardown_cnt;
1220 if (0 == teardown_cnt) {
1221 dev_err(emac_dev, "EMAC: TX teardown aborted\n");
1222 break;
1223 }
1224 }
1225 emac_write(EMAC_TXCP(ch), EMAC_TEARDOWN_VALUE);
1226
1227 /* process sent packets and return skb's to upper layer */
1228 if (1 == txch->queue_active) {
1229 curr_bd = txch->active_queue_head;
1230 while (curr_bd != NULL) {
1231 emac_net_tx_complete(priv, (void __force *)
1232 &curr_bd->buf_token, 1, ch);
1233 if (curr_bd != txch->active_queue_tail)
1234 curr_bd = curr_bd->next;
1235 else
1236 break;
1237 }
1238 txch->bd_pool_head = txch->active_queue_head;
1239 txch->active_queue_head =
1240 txch->active_queue_tail = NULL;
1241 }
1242}
1243
1244/**
1245 * emac_stop_txch: Stop TX channel operation
1246 * @priv: The DaVinci EMAC private adapter structure
1247 * @ch: TX channel number
1248 *
1249 * Called to stop TX channel operation
1250 *
1251 */
1252static void emac_stop_txch(struct emac_priv *priv, u32 ch)
1253{
1254 struct emac_txch *txch = priv->txch[ch];
1255
1256 if (txch) {
1257 txch->teardown_pending = 1;
1258 emac_write(EMAC_TXTEARDOWN, 0);
1259 emac_txch_teardown(priv, ch);
1260 txch->teardown_pending = 0;
1261 emac_write(EMAC_TXINTMASKCLEAR, BIT(ch));
1262 }
1263}
1264
1265/**
1266 * emac_tx_bdproc: TX buffer descriptor (packet) processing
1267 * @priv: The DaVinci EMAC private adapter structure
1268 * @ch: TX channel number to process buffer descriptors for
1269 * @budget: number of packets allowed to process
1270 * @pending: indication to caller that packets are pending to process
1271 *
1272 * Processes TX buffer descriptors after packets are transmitted - checks
1273 * ownership bit on the TX * descriptor and requeues it to free pool & frees
1274 * the SKB buffer. Only "budget" number of packets are processed and
1275 * indication of pending packets provided to the caller
1276 *
1277 * Returns number of packets processed
1278 */
1279static int emac_tx_bdproc(struct emac_priv *priv, u32 ch, u32 budget)
1280{
1281 struct device *emac_dev = &priv->ndev->dev;
1282 unsigned long flags;
1283 u32 frame_status;
1284 u32 pkts_processed = 0;
1285 u32 tx_complete_cnt = 0;
1286 struct emac_tx_bd __iomem *curr_bd;
1287 struct emac_txch *txch = priv->txch[ch];
1288 u32 *tx_complete_ptr = txch->tx_complete;
1289
1290 if (unlikely(1 == txch->teardown_pending)) {
1291 if (netif_msg_tx_err(priv) && net_ratelimit()) {
1292 dev_err(emac_dev, "DaVinci EMAC:emac_tx_bdproc: "\
1293 "teardown pending\n");
1294 }
1295 return 0; /* dont handle any pkt completions */
1296 }
1297
1298 ++txch->proc_count;
1299 spin_lock_irqsave(&priv->tx_lock, flags);
1300 curr_bd = txch->active_queue_head;
1301 if (NULL == curr_bd) {
1302 emac_write(EMAC_TXCP(ch),
1303 emac_virt_to_phys(txch->last_hw_bdprocessed));
1304 txch->no_active_pkts++;
1305 spin_unlock_irqrestore(&priv->tx_lock, flags);
1306 return 0;
1307 }
1308 BD_CACHE_INVALIDATE(curr_bd, EMAC_BD_LENGTH_FOR_CACHE);
1309 frame_status = curr_bd->mode;
1310 while ((curr_bd) &&
1311 ((frame_status & EMAC_CPPI_OWNERSHIP_BIT) == 0) &&
1312 (pkts_processed < budget)) {
1313 emac_write(EMAC_TXCP(ch), emac_virt_to_phys(curr_bd));
1314 txch->active_queue_head = curr_bd->next;
1315 if (frame_status & EMAC_CPPI_EOQ_BIT) {
1316 if (curr_bd->next) { /* misqueued packet */
1317 emac_write(EMAC_TXHDP(ch), curr_bd->h_next);
1318 ++txch->mis_queued_packets;
1319 } else {
1320 txch->queue_active = 0; /* end of queue */
1321 }
1322 }
1323 *tx_complete_ptr = (u32) curr_bd->buf_token;
1324 ++tx_complete_ptr;
1325 ++tx_complete_cnt;
1326 curr_bd->next = txch->bd_pool_head;
1327 txch->bd_pool_head = curr_bd;
1328 --txch->active_queue_count;
1329 pkts_processed++;
1330 txch->last_hw_bdprocessed = curr_bd;
1331 curr_bd = txch->active_queue_head;
1332 if (curr_bd) {
1333 BD_CACHE_INVALIDATE(curr_bd, EMAC_BD_LENGTH_FOR_CACHE);
1334 frame_status = curr_bd->mode;
1335 }
1336 } /* end of pkt processing loop */
1337
1338 emac_net_tx_complete(priv,
1339 (void *)&txch->tx_complete[0],
1340 tx_complete_cnt, ch);
1341 spin_unlock_irqrestore(&priv->tx_lock, flags);
1342 return pkts_processed;
1343}
1344
1345#define EMAC_ERR_TX_OUT_OF_BD -1
1346
1347/**
1348 * emac_send: EMAC Transmit function (internal)
1349 * @priv: The DaVinci EMAC private adapter structure
1350 * @pkt: packet pointer (contains skb ptr)
1351 * @ch: TX channel number
1352 *
1353 * Called by the transmit function to queue the packet in EMAC hardware queue
1354 *
1355 * Returns success(0) or error code (typically out of desc's)
1356 */
1357static int emac_send(struct emac_priv *priv, struct emac_netpktobj *pkt, u32 ch)
1358{
1359 unsigned long flags;
1360 struct emac_tx_bd __iomem *curr_bd;
1361 struct emac_txch *txch;
1362 struct emac_netbufobj *buf_list;
1363
1364 txch = priv->txch[ch];
1365 buf_list = pkt->buf_list; /* get handle to the buffer array */
1366
1367 /* check packet size and pad if short */
1368 if (pkt->pkt_length < EMAC_DEF_MIN_ETHPKTSIZE) {
1369 buf_list->length += (EMAC_DEF_MIN_ETHPKTSIZE - pkt->pkt_length);
1370 pkt->pkt_length = EMAC_DEF_MIN_ETHPKTSIZE;
1371 }
1372
1373 spin_lock_irqsave(&priv->tx_lock, flags);
1374 curr_bd = txch->bd_pool_head;
1375 if (curr_bd == NULL) {
1376 txch->out_of_tx_bd++;
1377 spin_unlock_irqrestore(&priv->tx_lock, flags);
1378 return EMAC_ERR_TX_OUT_OF_BD;
1379 }
1380
1381 txch->bd_pool_head = curr_bd->next;
1382 curr_bd->buf_token = buf_list->buf_token;
1383 /* FIXME buff_ptr = dma_map_single(... data_ptr ...) */
1384 curr_bd->buff_ptr = virt_to_phys(buf_list->data_ptr);
1385 curr_bd->off_b_len = buf_list->length;
1386 curr_bd->h_next = 0;
1387 curr_bd->next = NULL;
1388 curr_bd->mode = (EMAC_CPPI_SOP_BIT | EMAC_CPPI_OWNERSHIP_BIT |
1389 EMAC_CPPI_EOP_BIT | pkt->pkt_length);
1390
1391 /* flush the packet from cache if write back cache is present */
1392 BD_CACHE_WRITEBACK_INVALIDATE(curr_bd, EMAC_BD_LENGTH_FOR_CACHE);
1393
1394 /* send the packet */
1395 if (txch->active_queue_head == NULL) {
1396 txch->active_queue_head = curr_bd;
1397 txch->active_queue_tail = curr_bd;
1398 if (1 != txch->queue_active) {
1399 emac_write(EMAC_TXHDP(ch),
1400 emac_virt_to_phys(curr_bd));
1401 txch->queue_active = 1;
1402 }
1403 ++txch->queue_reinit;
1404 } else {
1405 register struct emac_tx_bd __iomem *tail_bd;
1406 register u32 frame_status;
1407
1408 tail_bd = txch->active_queue_tail;
1409 tail_bd->next = curr_bd;
1410 txch->active_queue_tail = curr_bd;
1411 tail_bd = EMAC_VIRT_NOCACHE(tail_bd);
1412 tail_bd->h_next = (int)emac_virt_to_phys(curr_bd);
1413 frame_status = tail_bd->mode;
1414 if (frame_status & EMAC_CPPI_EOQ_BIT) {
1415 emac_write(EMAC_TXHDP(ch), emac_virt_to_phys(curr_bd));
1416 frame_status &= ~(EMAC_CPPI_EOQ_BIT);
1417 tail_bd->mode = frame_status;
1418 ++txch->end_of_queue_add;
1419 }
1420 }
1421 txch->active_queue_count++;
1422 spin_unlock_irqrestore(&priv->tx_lock, flags);
1423 return 0;
1424}
1425
1426/**
1427 * emac_dev_xmit: EMAC Transmit function
1428 * @skb: SKB pointer
1429 * @ndev: The DaVinci EMAC network adapter
1430 *
1431 * Called by the system to transmit a packet - we queue the packet in
1432 * EMAC hardware transmit queue
1433 *
1434 * Returns success(NETDEV_TX_OK) or error code (typically out of desc's)
1435 */
1436static int emac_dev_xmit(struct sk_buff *skb, struct net_device *ndev)
1437{
1438 struct device *emac_dev = &ndev->dev;
1439 int ret_code;
1440 struct emac_netbufobj tx_buf; /* buffer obj-only single frame support */
1441 struct emac_netpktobj tx_packet; /* packet object */
1442 struct emac_priv *priv = netdev_priv(ndev);
1443
1444 /* If no link, return */
1445 if (unlikely(!priv->link)) {
1446 if (netif_msg_tx_err(priv) && net_ratelimit())
1447 dev_err(emac_dev, "DaVinci EMAC: No link to transmit");
1448 return NETDEV_TX_BUSY;
1449 }
1450
1451 /* Build the buffer and packet objects - Since only single fragment is
1452 * supported, need not set length and token in both packet & object.
1453 * Doing so for completeness sake & to show that this needs to be done
1454 * in multifragment case
1455 */
1456 tx_packet.buf_list = &tx_buf;
1457 tx_packet.num_bufs = 1; /* only single fragment supported */
1458 tx_packet.pkt_length = skb->len;
1459 tx_packet.pkt_token = (void *)skb;
1460 tx_buf.length = skb->len;
1461 tx_buf.buf_token = (void *)skb;
1462 tx_buf.data_ptr = skb->data;
1463 EMAC_CACHE_WRITEBACK((unsigned long)skb->data, skb->len);
1464 ndev->trans_start = jiffies;
1465 ret_code = emac_send(priv, &tx_packet, EMAC_DEF_TX_CH);
1466 if (unlikely(ret_code != 0)) {
1467 if (ret_code == EMAC_ERR_TX_OUT_OF_BD) {
1468 if (netif_msg_tx_err(priv) && net_ratelimit())
1469 dev_err(emac_dev, "DaVinci EMAC: xmit() fatal"\
1470 " err. Out of TX BD's");
1471 netif_stop_queue(priv->ndev);
1472 }
1473 priv->net_dev_stats.tx_dropped++;
1474 return NETDEV_TX_BUSY;
1475 }
1476
1477 return NETDEV_TX_OK;
1478}
1479
1480/**
1481 * emac_dev_tx_timeout: EMAC Transmit timeout function
1482 * @ndev: The DaVinci EMAC network adapter
1483 *
1484 * Called when system detects that a skb timeout period has expired
1485 * potentially due to a fault in the adapter in not being able to send
1486 * it out on the wire. We teardown the TX channel assuming a hardware
1487 * error and re-initialize the TX channel for hardware operation
1488 *
1489 */
1490static void emac_dev_tx_timeout(struct net_device *ndev)
1491{
1492 struct emac_priv *priv = netdev_priv(ndev);
1493 struct device *emac_dev = &ndev->dev;
1494
1495 if (netif_msg_tx_err(priv))
1496 dev_err(emac_dev, "DaVinci EMAC: xmit timeout, restarting TX");
1497
1498 priv->net_dev_stats.tx_errors++;
1499 emac_int_disable(priv);
1500 emac_stop_txch(priv, EMAC_DEF_TX_CH);
1501 emac_cleanup_txch(priv, EMAC_DEF_TX_CH);
1502 emac_init_txch(priv, EMAC_DEF_TX_CH);
1503 emac_write(EMAC_TXHDP(0), 0);
1504 emac_write(EMAC_TXINTMASKSET, BIT(EMAC_DEF_TX_CH));
1505 emac_int_enable(priv);
1506}
1507
1508/**
1509 * emac_net_alloc_rx_buf: Allocate a skb for RX
1510 * @priv: The DaVinci EMAC private adapter structure
1511 * @buf_size: size of SKB data buffer to allocate
1512 * @data_token: data token returned (skb handle for storing in buffer desc)
1513 * @ch: RX channel number
1514 *
1515 * Called during RX channel setup - allocates skb buffer of required size
1516 * and provides the skb handle and allocated buffer data pointer to caller
1517 *
1518 * Returns skb data pointer or 0 on failure to alloc skb
1519 */
1520static void *emac_net_alloc_rx_buf(struct emac_priv *priv, int buf_size,
1521 void **data_token, u32 ch)
1522{
1523 struct net_device *ndev = priv->ndev;
1524 struct device *emac_dev = &ndev->dev;
1525 struct sk_buff *p_skb;
1526
1527 p_skb = dev_alloc_skb(buf_size);
1528 if (unlikely(NULL == p_skb)) {
1529 if (netif_msg_rx_err(priv) && net_ratelimit())
1530 dev_err(emac_dev, "DaVinci EMAC: failed to alloc skb");
1531 return NULL;
1532 }
1533
1534 /* set device pointer in skb and reserve space for extra bytes */
1535 p_skb->dev = ndev;
1536 skb_reserve(p_skb, NET_IP_ALIGN);
1537 *data_token = (void *) p_skb;
1538 EMAC_CACHE_WRITEBACK_INVALIDATE((unsigned long)p_skb->data, buf_size);
1539 return p_skb->data;
1540}
1541
1542/**
1543 * emac_init_rxch: RX channel initialization
1544 * @priv: The DaVinci EMAC private adapter structure
1545 * @ch: RX channel number
1546 * @param: mac address for RX channel
1547 *
1548 * Called during device init to setup a RX channel (allocate buffers and
1549 * buffer descriptors, create queue and keep ready for reception
1550 *
1551 * Returns success(0) or mem alloc failures error code
1552 */
1553static int emac_init_rxch(struct emac_priv *priv, u32 ch, char *param)
1554{
1555 struct device *emac_dev = &priv->ndev->dev;
1556 u32 cnt, bd_size;
1557 void __iomem *mem;
1558 struct emac_rx_bd __iomem *curr_bd;
1559 struct emac_rxch *rxch = NULL;
1560
1561 rxch = kzalloc(sizeof(struct emac_rxch), GFP_KERNEL);
1562 if (NULL == rxch) {
1563 dev_err(emac_dev, "DaVinci EMAC: RX Ch mem alloc failed");
1564 return -ENOMEM;
1565 }
1566 priv->rxch[ch] = rxch;
1567 rxch->buf_size = priv->rx_buf_size;
1568 rxch->service_max = EMAC_DEF_RX_MAX_SERVICE;
1569 rxch->queue_active = 0;
1570 rxch->teardown_pending = 0;
1571
1572 /* save mac address */
1573 for (cnt = 0; cnt < 6; cnt++)
1574 rxch->mac_addr[cnt] = param[cnt];
1575
1576 /* allocate buffer descriptor pool align every BD on four word
1577 * boundry for future requirements */
1578 bd_size = (sizeof(struct emac_rx_bd) + 0xF) & ~0xF;
1579 rxch->num_bd = (priv->ctrl_ram_size >> 1) / bd_size;
1580 rxch->alloc_size = (((bd_size * rxch->num_bd) + 0xF) & ~0xF);
1581 rxch->bd_mem = EMAC_RX_BD_MEM(priv);
1582 __memzero((void __force *)rxch->bd_mem, rxch->alloc_size);
1583 rxch->pkt_queue.buf_list = &rxch->buf_queue;
1584
1585 /* allocate RX buffer and initialize the BD linked list */
1586 mem = (void __force __iomem *)
1587 (((u32 __force) rxch->bd_mem + 0xF) & ~0xF);
1588 rxch->active_queue_head = NULL;
1589 rxch->active_queue_tail = mem;
1590 for (cnt = 0; cnt < rxch->num_bd; cnt++) {
1591 curr_bd = mem + (cnt * bd_size);
1592 /* for future use the last parameter contains the BD ptr */
1593 curr_bd->data_ptr = emac_net_alloc_rx_buf(priv,
1594 rxch->buf_size,
1595 (void __force **)&curr_bd->buf_token,
1596 EMAC_DEF_RX_CH);
1597 if (curr_bd->data_ptr == NULL) {
1598 dev_err(emac_dev, "DaVinci EMAC: RX buf mem alloc " \
1599 "failed for ch %d\n", ch);
1600 kfree(rxch);
1601 return -ENOMEM;
1602 }
1603
1604 /* populate the hardware descriptor */
1605 curr_bd->h_next = emac_virt_to_phys(rxch->active_queue_head);
1606 /* FIXME buff_ptr = dma_map_single(... data_ptr ...) */
1607 curr_bd->buff_ptr = virt_to_phys(curr_bd->data_ptr);
1608 curr_bd->off_b_len = rxch->buf_size;
1609 curr_bd->mode = EMAC_CPPI_OWNERSHIP_BIT;
1610
1611 /* write back to hardware memory */
1612 BD_CACHE_WRITEBACK_INVALIDATE((u32) curr_bd,
1613 EMAC_BD_LENGTH_FOR_CACHE);
1614 curr_bd->next = rxch->active_queue_head;
1615 rxch->active_queue_head = curr_bd;
1616 }
1617
1618 /* At this point rxCppi->activeQueueHead points to the first
1619 RX BD ready to be given to RX HDP and rxch->active_queue_tail
1620 points to the last RX BD
1621 */
1622 return 0;
1623}
1624
1625/**
1626 * emac_rxch_teardown: RX channel teardown
1627 * @priv: The DaVinci EMAC private adapter structure
1628 * @ch: RX channel number
1629 *
1630 * Called during device stop to teardown RX channel
1631 *
1632 */
1633static void emac_rxch_teardown(struct emac_priv *priv, u32 ch)
1634{
1635 struct device *emac_dev = &priv->ndev->dev;
1636 u32 teardown_cnt = 0xFFFFFFF0; /* Some high value */
1637
1638 while ((emac_read(EMAC_RXCP(ch)) & EMAC_TEARDOWN_VALUE) !=
1639 EMAC_TEARDOWN_VALUE) {
1640 /* wait till tx teardown complete */
1641 cpu_relax(); /* TODO: check if this helps ... */
1642 --teardown_cnt;
1643 if (0 == teardown_cnt) {
1644 dev_err(emac_dev, "EMAC: RX teardown aborted\n");
1645 break;
1646 }
1647 }
1648 emac_write(EMAC_RXCP(ch), EMAC_TEARDOWN_VALUE);
1649}
1650
1651/**
1652 * emac_stop_rxch: Stop RX channel operation
1653 * @priv: The DaVinci EMAC private adapter structure
1654 * @ch: RX channel number
1655 *
1656 * Called during device stop to stop RX channel operation
1657 *
1658 */
1659static void emac_stop_rxch(struct emac_priv *priv, u32 ch)
1660{
1661 struct emac_rxch *rxch = priv->rxch[ch];
1662
1663 if (rxch) {
1664 rxch->teardown_pending = 1;
1665 emac_write(EMAC_RXTEARDOWN, ch);
1666 /* wait for teardown complete */
1667 emac_rxch_teardown(priv, ch);
1668 rxch->teardown_pending = 0;
1669 emac_write(EMAC_RXINTMASKCLEAR, BIT(ch));
1670 }
1671}
1672
1673/**
1674 * emac_cleanup_rxch: Book-keep function to clean RX channel resources
1675 * @priv: The DaVinci EMAC private adapter structure
1676 * @ch: RX channel number
1677 *
1678 * Called during device stop to clean up RX channel resources
1679 *
1680 */
1681static void emac_cleanup_rxch(struct emac_priv *priv, u32 ch)
1682{
1683 struct emac_rxch *rxch = priv->rxch[ch];
1684 struct emac_rx_bd __iomem *curr_bd;
1685
1686 if (rxch) {
1687 /* free the receive buffers previously allocated */
1688 curr_bd = rxch->active_queue_head;
1689 while (curr_bd) {
1690 if (curr_bd->buf_token) {
1691 dev_kfree_skb_any((struct sk_buff *)\
1692 curr_bd->buf_token);
1693 }
1694 curr_bd = curr_bd->next;
1695 }
1696 if (rxch->bd_mem)
1697 rxch->bd_mem = NULL;
1698 kfree(rxch);
1699 priv->rxch[ch] = NULL;
1700 }
1701}
1702
1703/**
1704 * emac_set_type0addr: Set EMAC Type0 mac address
1705 * @priv: The DaVinci EMAC private adapter structure
1706 * @ch: RX channel number
1707 * @mac_addr: MAC address to set in device
1708 *
1709 * Called internally to set Type0 mac address of the adapter (Device)
1710 *
1711 * Returns success (0) or appropriate error code (none as of now)
1712 */
1713static void emac_set_type0addr(struct emac_priv *priv, u32 ch, char *mac_addr)
1714{
1715 u32 val;
1716 val = ((mac_addr[5] << 8) | (mac_addr[4]));
1717 emac_write(EMAC_MACSRCADDRLO, val);
1718
1719 val = ((mac_addr[3] << 24) | (mac_addr[2] << 16) | \
1720 (mac_addr[1] << 8) | (mac_addr[0]));
1721 emac_write(EMAC_MACSRCADDRHI, val);
1722 val = emac_read(EMAC_RXUNICASTSET);
1723 val |= BIT(ch);
1724 emac_write(EMAC_RXUNICASTSET, val);
1725 val = emac_read(EMAC_RXUNICASTCLEAR);
1726 val &= ~BIT(ch);
1727 emac_write(EMAC_RXUNICASTCLEAR, val);
1728}
1729
1730/**
1731 * emac_set_type1addr: Set EMAC Type1 mac address
1732 * @priv: The DaVinci EMAC private adapter structure
1733 * @ch: RX channel number
1734 * @mac_addr: MAC address to set in device
1735 *
1736 * Called internally to set Type1 mac address of the adapter (Device)
1737 *
1738 * Returns success (0) or appropriate error code (none as of now)
1739 */
1740static void emac_set_type1addr(struct emac_priv *priv, u32 ch, char *mac_addr)
1741{
1742 u32 val;
1743 emac_write(EMAC_MACINDEX, ch);
1744 val = ((mac_addr[5] << 8) | mac_addr[4]);
1745 emac_write(EMAC_MACADDRLO, val);
1746 val = ((mac_addr[3] << 24) | (mac_addr[2] << 16) | \
1747 (mac_addr[1] << 8) | (mac_addr[0]));
1748 emac_write(EMAC_MACADDRHI, val);
1749 emac_set_type0addr(priv, ch, mac_addr);
1750}
1751
1752/**
1753 * emac_set_type2addr: Set EMAC Type2 mac address
1754 * @priv: The DaVinci EMAC private adapter structure
1755 * @ch: RX channel number
1756 * @mac_addr: MAC address to set in device
1757 * @index: index into RX address entries
1758 * @match: match parameter for RX address matching logic
1759 *
1760 * Called internally to set Type2 mac address of the adapter (Device)
1761 *
1762 * Returns success (0) or appropriate error code (none as of now)
1763 */
1764static void emac_set_type2addr(struct emac_priv *priv, u32 ch,
1765 char *mac_addr, int index, int match)
1766{
1767 u32 val;
1768 emac_write(EMAC_MACINDEX, index);
1769 val = ((mac_addr[3] << 24) | (mac_addr[2] << 16) | \
1770 (mac_addr[1] << 8) | (mac_addr[0]));
1771 emac_write(EMAC_MACADDRHI, val);
1772 val = ((mac_addr[5] << 8) | mac_addr[4] | ((ch & 0x7) << 16) | \
1773 (match << 19) | BIT(20));
1774 emac_write(EMAC_MACADDRLO, val);
1775 emac_set_type0addr(priv, ch, mac_addr);
1776}
1777
1778/**
1779 * emac_setmac: Set mac address in the adapter (internal function)
1780 * @priv: The DaVinci EMAC private adapter structure
1781 * @ch: RX channel number
1782 * @mac_addr: MAC address to set in device
1783 *
1784 * Called internally to set the mac address of the adapter (Device)
1785 *
1786 * Returns success (0) or appropriate error code (none as of now)
1787 */
1788static void emac_setmac(struct emac_priv *priv, u32 ch, char *mac_addr)
1789{
1790 struct device *emac_dev = &priv->ndev->dev;
1791
1792 if (priv->rx_addr_type == 0) {
1793 emac_set_type0addr(priv, ch, mac_addr);
1794 } else if (priv->rx_addr_type == 1) {
1795 u32 cnt;
1796 for (cnt = 0; cnt < EMAC_MAX_TXRX_CHANNELS; cnt++)
1797 emac_set_type1addr(priv, ch, mac_addr);
1798 } else if (priv->rx_addr_type == 2) {
1799 emac_set_type2addr(priv, ch, mac_addr, ch, 1);
1800 emac_set_type0addr(priv, ch, mac_addr);
1801 } else {
1802 if (netif_msg_drv(priv))
1803 dev_err(emac_dev, "DaVinci EMAC: Wrong addressing\n");
1804 }
1805}
1806
1807/**
1808 * emac_dev_setmac_addr: Set mac address in the adapter
1809 * @ndev: The DaVinci EMAC network adapter
1810 * @addr: MAC address to set in device
1811 *
1812 * Called by the system to set the mac address of the adapter (Device)
1813 *
1814 * Returns success (0) or appropriate error code (none as of now)
1815 */
1816static int emac_dev_setmac_addr(struct net_device *ndev, void *addr)
1817{
1818 struct emac_priv *priv = netdev_priv(ndev);
1819 struct emac_rxch *rxch = priv->rxch[EMAC_DEF_RX_CH];
1820 struct device *emac_dev = &priv->ndev->dev;
1821 struct sockaddr *sa = addr;
1822 DECLARE_MAC_BUF(mac);
1823
1824 /* Store mac addr in priv and rx channel and set it in EMAC hw */
1825 memcpy(priv->mac_addr, sa->sa_data, ndev->addr_len);
1826 memcpy(rxch->mac_addr, sa->sa_data, ndev->addr_len);
1827 memcpy(ndev->dev_addr, sa->sa_data, ndev->addr_len);
1828 emac_setmac(priv, EMAC_DEF_RX_CH, rxch->mac_addr);
1829
1830 if (netif_msg_drv(priv))
1831 dev_notice(emac_dev, "DaVinci EMAC: emac_dev_setmac_addr %s\n",
1832 print_mac(mac, priv->mac_addr));
1833
1834 return 0;
1835}
1836
1837/**
1838 * emac_addbd_to_rx_queue: Recycle RX buffer descriptor
1839 * @priv: The DaVinci EMAC private adapter structure
1840 * @ch: RX channel number to process buffer descriptors for
1841 * @curr_bd: current buffer descriptor
1842 * @buffer: buffer pointer for descriptor
1843 * @buf_token: buffer token (stores skb information)
1844 *
1845 * Prepares the recycled buffer descriptor and addes it to hardware
1846 * receive queue - if queue empty this descriptor becomes the head
1847 * else addes the descriptor to end of queue
1848 *
1849 */
1850static void emac_addbd_to_rx_queue(struct emac_priv *priv, u32 ch,
1851 struct emac_rx_bd __iomem *curr_bd,
1852 char *buffer, void *buf_token)
1853{
1854 struct emac_rxch *rxch = priv->rxch[ch];
1855
1856 /* populate the hardware descriptor */
1857 curr_bd->h_next = 0;
1858 /* FIXME buff_ptr = dma_map_single(... buffer ...) */
1859 curr_bd->buff_ptr = virt_to_phys(buffer);
1860 curr_bd->off_b_len = rxch->buf_size;
1861 curr_bd->mode = EMAC_CPPI_OWNERSHIP_BIT;
1862 curr_bd->next = NULL;
1863 curr_bd->data_ptr = buffer;
1864 curr_bd->buf_token = buf_token;
1865
1866 /* write back */
1867 BD_CACHE_WRITEBACK_INVALIDATE(curr_bd, EMAC_BD_LENGTH_FOR_CACHE);
1868 if (rxch->active_queue_head == NULL) {
1869 rxch->active_queue_head = curr_bd;
1870 rxch->active_queue_tail = curr_bd;
1871 if (0 != rxch->queue_active) {
1872 emac_write(EMAC_RXHDP(ch),
1873 emac_virt_to_phys(rxch->active_queue_head));
1874 rxch->queue_active = 1;
1875 }
1876 } else {
1877 struct emac_rx_bd __iomem *tail_bd;
1878 u32 frame_status;
1879
1880 tail_bd = rxch->active_queue_tail;
1881 rxch->active_queue_tail = curr_bd;
1882 tail_bd->next = curr_bd;
1883 tail_bd = EMAC_VIRT_NOCACHE(tail_bd);
1884 tail_bd->h_next = emac_virt_to_phys(curr_bd);
1885 frame_status = tail_bd->mode;
1886 if (frame_status & EMAC_CPPI_EOQ_BIT) {
1887 emac_write(EMAC_RXHDP(ch),
1888 emac_virt_to_phys(curr_bd));
1889 frame_status &= ~(EMAC_CPPI_EOQ_BIT);
1890 tail_bd->mode = frame_status;
1891 ++rxch->end_of_queue_add;
1892 }
1893 }
1894 ++rxch->recycled_bd;
1895}
1896
1897/**
1898 * emac_net_rx_cb: Prepares packet and sends to upper layer
1899 * @priv: The DaVinci EMAC private adapter structure
1900 * @net_pkt_list: Network packet list (received packets)
1901 *
1902 * Invalidates packet buffer memory and sends the received packet to upper
1903 * layer
1904 *
1905 * Returns success or appropriate error code (none as of now)
1906 */
1907static int emac_net_rx_cb(struct emac_priv *priv,
1908 struct emac_netpktobj *net_pkt_list)
1909{
1910 struct sk_buff *p_skb;
1911 p_skb = (struct sk_buff *)net_pkt_list->pkt_token;
1912 /* set length of packet */
1913 skb_put(p_skb, net_pkt_list->pkt_length);
1914 EMAC_CACHE_INVALIDATE((unsigned long)p_skb->data, p_skb->len);
1915 p_skb->protocol = eth_type_trans(p_skb, priv->ndev);
1916 p_skb->dev->last_rx = jiffies;
1917 netif_receive_skb(p_skb);
1918 priv->net_dev_stats.rx_bytes += net_pkt_list->pkt_length;
1919 priv->net_dev_stats.rx_packets++;
1920 return 0;
1921}
1922
1923/**
1924 * emac_rx_bdproc: RX buffer descriptor (packet) processing
1925 * @priv: The DaVinci EMAC private adapter structure
1926 * @ch: RX channel number to process buffer descriptors for
1927 * @budget: number of packets allowed to process
1928 * @pending: indication to caller that packets are pending to process
1929 *
1930 * Processes RX buffer descriptors - checks ownership bit on the RX buffer
1931 * descriptor, sends the receive packet to upper layer, allocates a new SKB
1932 * and recycles the buffer descriptor (requeues it in hardware RX queue).
1933 * Only "budget" number of packets are processed and indication of pending
1934 * packets provided to the caller.
1935 *
1936 * Returns number of packets processed (and indication of pending packets)
1937 */
1938static int emac_rx_bdproc(struct emac_priv *priv, u32 ch, u32 budget)
1939{
1940 unsigned long flags;
1941 u32 frame_status;
1942 u32 pkts_processed = 0;
1943 char *new_buffer;
1944 struct emac_rx_bd __iomem *curr_bd;
1945 struct emac_rx_bd __iomem *last_bd;
1946 struct emac_netpktobj *curr_pkt, pkt_obj;
1947 struct emac_netbufobj buf_obj;
1948 struct emac_netbufobj *rx_buf_obj;
1949 void *new_buf_token;
1950 struct emac_rxch *rxch = priv->rxch[ch];
1951
1952 if (unlikely(1 == rxch->teardown_pending))
1953 return 0;
1954 ++rxch->proc_count;
1955 spin_lock_irqsave(&priv->rx_lock, flags);
1956 pkt_obj.buf_list = &buf_obj;
1957 curr_pkt = &pkt_obj;
1958 curr_bd = rxch->active_queue_head;
1959 BD_CACHE_INVALIDATE(curr_bd, EMAC_BD_LENGTH_FOR_CACHE);
1960 frame_status = curr_bd->mode;
1961
1962 while ((curr_bd) &&
1963 ((frame_status & EMAC_CPPI_OWNERSHIP_BIT) == 0) &&
1964 (pkts_processed < budget)) {
1965
1966 new_buffer = emac_net_alloc_rx_buf(priv, rxch->buf_size,
1967 &new_buf_token, EMAC_DEF_RX_CH);
1968 if (unlikely(NULL == new_buffer)) {
1969 ++rxch->out_of_rx_buffers;
1970 goto end_emac_rx_bdproc;
1971 }
1972
1973 /* populate received packet data structure */
1974 rx_buf_obj = &curr_pkt->buf_list[0];
1975 rx_buf_obj->data_ptr = (char *)curr_bd->data_ptr;
1976 rx_buf_obj->length = curr_bd->off_b_len & EMAC_RX_BD_BUF_SIZE;
1977 rx_buf_obj->buf_token = curr_bd->buf_token;
1978 curr_pkt->pkt_token = curr_pkt->buf_list->buf_token;
1979 curr_pkt->num_bufs = 1;
1980 curr_pkt->pkt_length =
1981 (frame_status & EMAC_RX_BD_PKT_LENGTH_MASK);
1982 emac_write(EMAC_RXCP(ch), emac_virt_to_phys(curr_bd));
1983 ++rxch->processed_bd;
1984 last_bd = curr_bd;
1985 curr_bd = last_bd->next;
1986 rxch->active_queue_head = curr_bd;
1987
1988 /* check if end of RX queue ? */
1989 if (frame_status & EMAC_CPPI_EOQ_BIT) {
1990 if (curr_bd) {
1991 ++rxch->mis_queued_packets;
1992 emac_write(EMAC_RXHDP(ch),
1993 emac_virt_to_phys(curr_bd));
1994 } else {
1995 ++rxch->end_of_queue;
1996 rxch->queue_active = 0;
1997 }
1998 }
1999
2000 /* recycle BD */
2001 emac_addbd_to_rx_queue(priv, ch, last_bd, new_buffer,
2002 new_buf_token);
2003
2004 /* return the packet to the user - BD ptr passed in
2005 * last parameter for potential *future* use */
2006 spin_unlock_irqrestore(&priv->rx_lock, flags);
2007 emac_net_rx_cb(priv, curr_pkt);
2008 spin_lock_irqsave(&priv->rx_lock, flags);
2009 curr_bd = rxch->active_queue_head;
2010 if (curr_bd) {
2011 BD_CACHE_INVALIDATE(curr_bd, EMAC_BD_LENGTH_FOR_CACHE);
2012 frame_status = curr_bd->mode;
2013 }
2014 ++pkts_processed;
2015 }
2016
2017end_emac_rx_bdproc:
2018 spin_unlock_irqrestore(&priv->rx_lock, flags);
2019 return pkts_processed;
2020}
2021
2022/**
2023 * emac_hw_enable: Enable EMAC hardware for packet transmission/reception
2024 * @priv: The DaVinci EMAC private adapter structure
2025 *
2026 * Enables EMAC hardware for packet processing - enables PHY, enables RX
2027 * for packet reception and enables device interrupts and then NAPI
2028 *
2029 * Returns success (0) or appropriate error code (none right now)
2030 */
2031static int emac_hw_enable(struct emac_priv *priv)
2032{
2033 u32 ch, val, mbp_enable, mac_control;
2034
2035 /* Soft reset */
2036 emac_write(EMAC_SOFTRESET, 1);
2037 while (emac_read(EMAC_SOFTRESET))
2038 cpu_relax();
2039
2040 /* Disable interrupt & Set pacing for more interrupts initially */
2041 emac_int_disable(priv);
2042
2043 /* Full duplex enable bit set when auto negotiation happens */
2044 mac_control =
2045 (((EMAC_DEF_TXPRIO_FIXED) ? (EMAC_MACCONTROL_TXPTYPE) : 0x0) |
2046 ((priv->speed == 1000) ? EMAC_MACCONTROL_GIGABITEN : 0x0) |
2047 ((EMAC_DEF_TXPACING_EN) ? (EMAC_MACCONTROL_TXPACEEN) : 0x0) |
2048 ((priv->duplex == DUPLEX_FULL) ? 0x1 : 0));
2049 emac_write(EMAC_MACCONTROL, mac_control);
2050
2051 mbp_enable =
2052 (((EMAC_DEF_PASS_CRC) ? (EMAC_RXMBP_PASSCRC_MASK) : 0x0) |
2053 ((EMAC_DEF_QOS_EN) ? (EMAC_RXMBP_QOSEN_MASK) : 0x0) |
2054 ((EMAC_DEF_NO_BUFF_CHAIN) ? (EMAC_RXMBP_NOCHAIN_MASK) : 0x0) |
2055 ((EMAC_DEF_MACCTRL_FRAME_EN) ? (EMAC_RXMBP_CMFEN_MASK) : 0x0) |
2056 ((EMAC_DEF_SHORT_FRAME_EN) ? (EMAC_RXMBP_CSFEN_MASK) : 0x0) |
2057 ((EMAC_DEF_ERROR_FRAME_EN) ? (EMAC_RXMBP_CEFEN_MASK) : 0x0) |
2058 ((EMAC_DEF_PROM_EN) ? (EMAC_RXMBP_CAFEN_MASK) : 0x0) |
2059 ((EMAC_DEF_PROM_CH & EMAC_RXMBP_CHMASK) << \
2060 EMAC_RXMBP_PROMCH_SHIFT) |
2061 ((EMAC_DEF_BCAST_EN) ? (EMAC_RXMBP_BROADEN_MASK) : 0x0) |
2062 ((EMAC_DEF_BCAST_CH & EMAC_RXMBP_CHMASK) << \
2063 EMAC_RXMBP_BROADCH_SHIFT) |
2064 ((EMAC_DEF_MCAST_EN) ? (EMAC_RXMBP_MULTIEN_MASK) : 0x0) |
2065 ((EMAC_DEF_MCAST_CH & EMAC_RXMBP_CHMASK) << \
2066 EMAC_RXMBP_MULTICH_SHIFT));
2067 emac_write(EMAC_RXMBPENABLE, mbp_enable);
2068 emac_write(EMAC_RXMAXLEN, (EMAC_DEF_MAX_FRAME_SIZE &
2069 EMAC_RX_MAX_LEN_MASK));
2070 emac_write(EMAC_RXBUFFEROFFSET, (EMAC_DEF_BUFFER_OFFSET &
2071 EMAC_RX_BUFFER_OFFSET_MASK));
2072 emac_write(EMAC_RXFILTERLOWTHRESH, 0);
2073 emac_write(EMAC_RXUNICASTCLEAR, EMAC_RX_UNICAST_CLEAR_ALL);
2074 priv->rx_addr_type = (emac_read(EMAC_MACCONFIG) >> 8) & 0xFF;
2075
2076 val = emac_read(EMAC_TXCONTROL);
2077 val |= EMAC_TX_CONTROL_TX_ENABLE_VAL;
2078 emac_write(EMAC_TXCONTROL, val);
2079 val = emac_read(EMAC_RXCONTROL);
2080 val |= EMAC_RX_CONTROL_RX_ENABLE_VAL;
2081 emac_write(EMAC_RXCONTROL, val);
2082 emac_write(EMAC_MACINTMASKSET, EMAC_MAC_HOST_ERR_INTMASK_VAL);
2083
2084 for (ch = 0; ch < EMAC_DEF_MAX_TX_CH; ch++) {
2085 emac_write(EMAC_TXHDP(ch), 0);
2086 emac_write(EMAC_TXINTMASKSET, BIT(ch));
2087 }
2088 for (ch = 0; ch < EMAC_DEF_MAX_RX_CH; ch++) {
2089 struct emac_rxch *rxch = priv->rxch[ch];
2090 emac_setmac(priv, ch, rxch->mac_addr);
2091 emac_write(EMAC_RXINTMASKSET, BIT(ch));
2092 rxch->queue_active = 1;
2093 emac_write(EMAC_RXHDP(ch),
2094 emac_virt_to_phys(rxch->active_queue_head));
2095 }
2096
2097 /* Enable MII */
2098 val = emac_read(EMAC_MACCONTROL);
2099 val |= (EMAC_MACCONTROL_MIIEN);
2100 emac_write(EMAC_MACCONTROL, val);
2101
2102 /* Enable NAPI and interrupts */
2103 napi_enable(&priv->napi);
2104 emac_int_enable(priv);
2105 return 0;
2106
2107}
2108
2109/**
2110 * emac_poll: EMAC NAPI Poll function
2111 * @ndev: The DaVinci EMAC network adapter
2112 * @budget: Number of receive packets to process (as told by NAPI layer)
2113 *
2114 * NAPI Poll function implemented to process packets as per budget. We check
2115 * the type of interrupt on the device and accordingly call the TX or RX
2116 * packet processing functions. We follow the budget for RX processing and
2117 * also put a cap on number of TX pkts processed through config param. The
2118 * NAPI schedule function is called if more packets pending.
2119 *
2120 * Returns number of packets received (in most cases; else TX pkts - rarely)
2121 */
2122static int emac_poll(struct napi_struct *napi, int budget)
2123{
2124 unsigned int mask;
2125 struct emac_priv *priv = container_of(napi, struct emac_priv, napi);
2126 struct net_device *ndev = priv->ndev;
2127 struct device *emac_dev = &ndev->dev;
2128 u32 status = 0;
2129 u32 num_pkts = 0;
2130
2131 if (!netif_running(ndev))
2132 return 0;
2133
2134 /* Check interrupt vectors and call packet processing */
2135 status = emac_read(EMAC_MACINVECTOR);
2136
2137 mask = EMAC_DM644X_MAC_IN_VECTOR_TX_INT_VEC;
2138
2139 if (priv->version == EMAC_VERSION_2)
2140 mask = EMAC_DM646X_MAC_IN_VECTOR_TX_INT_VEC;
2141
2142 if (status & mask) {
2143 num_pkts = emac_tx_bdproc(priv, EMAC_DEF_TX_CH,
2144 EMAC_DEF_TX_MAX_SERVICE);
2145 } /* TX processing */
2146
2147 if (num_pkts)
2148 return budget;
2149
2150 mask = EMAC_DM644X_MAC_IN_VECTOR_RX_INT_VEC;
2151
2152 if (priv->version == EMAC_VERSION_2)
2153 mask = EMAC_DM646X_MAC_IN_VECTOR_RX_INT_VEC;
2154
2155 if (status & mask) {
2156 num_pkts = emac_rx_bdproc(priv, EMAC_DEF_RX_CH, budget);
2157 } /* RX processing */
2158
2159 if (num_pkts < budget) {
2160 napi_complete(napi);
2161 emac_int_enable(priv);
2162 }
2163
2164 if (unlikely(status & EMAC_DM644X_MAC_IN_VECTOR_HOST_INT)) {
2165 u32 ch, cause;
2166 dev_err(emac_dev, "DaVinci EMAC: Fatal Hardware Error\n");
2167 netif_stop_queue(ndev);
2168 napi_disable(&priv->napi);
2169
2170 status = emac_read(EMAC_MACSTATUS);
2171 cause = ((status & EMAC_MACSTATUS_TXERRCODE_MASK) >>
2172 EMAC_MACSTATUS_TXERRCODE_SHIFT);
2173 if (cause) {
2174 ch = ((status & EMAC_MACSTATUS_TXERRCH_MASK) >>
2175 EMAC_MACSTATUS_TXERRCH_SHIFT);
2176 if (net_ratelimit()) {
2177 dev_err(emac_dev, "TX Host error %s on ch=%d\n",
2178 &emac_txhost_errcodes[cause][0], ch);
2179 }
2180 }
2181 cause = ((status & EMAC_MACSTATUS_RXERRCODE_MASK) >>
2182 EMAC_MACSTATUS_RXERRCODE_SHIFT);
2183 if (cause) {
2184 ch = ((status & EMAC_MACSTATUS_RXERRCH_MASK) >>
2185 EMAC_MACSTATUS_RXERRCH_SHIFT);
2186 if (netif_msg_hw(priv) && net_ratelimit())
2187 dev_err(emac_dev, "RX Host error %s on ch=%d\n",
2188 &emac_rxhost_errcodes[cause][0], ch);
2189 }
2190 } /* Host error processing */
2191
2192 return num_pkts;
2193}
2194
2195#ifdef CONFIG_NET_POLL_CONTROLLER
2196/**
2197 * emac_poll_controller: EMAC Poll controller function
2198 * @ndev: The DaVinci EMAC network adapter
2199 *
2200 * Polled functionality used by netconsole and others in non interrupt mode
2201 *
2202 */
2203void emac_poll_controller(struct net_device *ndev)
2204{
2205 struct emac_priv *priv = netdev_priv(ndev);
2206
2207 emac_int_disable(priv);
2208 emac_irq(ndev->irq, priv);
2209 emac_int_enable(priv);
2210}
2211#endif
2212
2213/* PHY/MII bus related */
2214
2215/* Wait until mdio is ready for next command */
2216#define MDIO_WAIT_FOR_USER_ACCESS\
2217 while ((emac_mdio_read((MDIO_USERACCESS(0))) &\
2218 MDIO_USERACCESS_GO) != 0)
2219
2220static int emac_mii_read(struct mii_bus *bus, int phy_id, int phy_reg)
2221{
2222 unsigned int phy_data = 0;
2223 unsigned int phy_control;
2224
2225 /* Wait until mdio is ready for next command */
2226 MDIO_WAIT_FOR_USER_ACCESS;
2227
2228 phy_control = (MDIO_USERACCESS_GO |
2229 MDIO_USERACCESS_READ |
2230 ((phy_reg << 21) & MDIO_USERACCESS_REGADR) |
2231 ((phy_id << 16) & MDIO_USERACCESS_PHYADR) |
2232 (phy_data & MDIO_USERACCESS_DATA));
2233 emac_mdio_write(MDIO_USERACCESS(0), phy_control);
2234
2235 /* Wait until mdio is ready for next command */
2236 MDIO_WAIT_FOR_USER_ACCESS;
2237
2238 return emac_mdio_read(MDIO_USERACCESS(0)) & MDIO_USERACCESS_DATA;
2239
2240}
2241
2242static int emac_mii_write(struct mii_bus *bus, int phy_id,
2243 int phy_reg, u16 phy_data)
2244{
2245
2246 unsigned int control;
2247
2248 /* until mdio is ready for next command */
2249 MDIO_WAIT_FOR_USER_ACCESS;
2250
2251 control = (MDIO_USERACCESS_GO |
2252 MDIO_USERACCESS_WRITE |
2253 ((phy_reg << 21) & MDIO_USERACCESS_REGADR) |
2254 ((phy_id << 16) & MDIO_USERACCESS_PHYADR) |
2255 (phy_data & MDIO_USERACCESS_DATA));
2256 emac_mdio_write(MDIO_USERACCESS(0), control);
2257
2258 return 0;
2259}
2260
2261static int emac_mii_reset(struct mii_bus *bus)
2262{
2263 unsigned int clk_div;
2264 int mdio_bus_freq = emac_bus_frequency;
2265
2266 if (mdio_max_freq & mdio_bus_freq)
2267 clk_div = ((mdio_bus_freq / mdio_max_freq) - 1);
2268 else
2269 clk_div = 0xFF;
2270
2271 clk_div &= MDIO_CONTROL_CLKDIV;
2272
2273 /* Set enable and clock divider in MDIOControl */
2274 emac_mdio_write(MDIO_CONTROL, (clk_div | MDIO_CONTROL_ENABLE));
2275
2276 return 0;
2277
2278}
2279
2280static int mii_irqs[PHY_MAX_ADDR] = { PHY_POLL, PHY_POLL };
2281
2282/* emac_driver: EMAC MII bus structure */
2283
2284static struct mii_bus *emac_mii;
2285
2286static void emac_adjust_link(struct net_device *ndev)
2287{
2288 struct emac_priv *priv = netdev_priv(ndev);
2289 struct phy_device *phydev = priv->phydev;
2290 unsigned long flags;
2291 int new_state = 0;
2292
2293 spin_lock_irqsave(&priv->lock, flags);
2294
2295 if (phydev->link) {
2296 /* check the mode of operation - full/half duplex */
2297 if (phydev->duplex != priv->duplex) {
2298 new_state = 1;
2299 priv->duplex = phydev->duplex;
2300 }
2301 if (phydev->speed != priv->speed) {
2302 new_state = 1;
2303 priv->speed = phydev->speed;
2304 }
2305 if (!priv->link) {
2306 new_state = 1;
2307 priv->link = 1;
2308 }
2309
2310 } else if (priv->link) {
2311 new_state = 1;
2312 priv->link = 0;
2313 priv->speed = 0;
2314 priv->duplex = ~0;
2315 }
2316 if (new_state) {
2317 emac_update_phystatus(priv);
2318 phy_print_status(priv->phydev);
2319 }
2320
2321 spin_unlock_irqrestore(&priv->lock, flags);
2322}
2323
2324/*************************************************************************
2325 * Linux Driver Model
2326 *************************************************************************/
2327
2328/**
2329 * emac_devioctl: EMAC adapter ioctl
2330 * @ndev: The DaVinci EMAC network adapter
2331 * @ifrq: request parameter
2332 * @cmd: command parameter
2333 *
2334 * EMAC driver ioctl function
2335 *
2336 * Returns success(0) or appropriate error code
2337 */
2338static int emac_devioctl(struct net_device *ndev, struct ifreq *ifrq, int cmd)
2339{
2340 dev_warn(&ndev->dev, "DaVinci EMAC: ioctl not supported\n");
2341
2342 if (!(netif_running(ndev)))
2343 return -EINVAL;
2344
2345 /* TODO: Add phy read and write and private statistics get feature */
2346
2347 return -EOPNOTSUPP;
2348}
2349
2350/**
2351 * emac_dev_open: EMAC device open
2352 * @ndev: The DaVinci EMAC network adapter
2353 *
2354 * Called when system wants to start the interface. We init TX/RX channels
2355 * and enable the hardware for packet reception/transmission and start the
2356 * network queue.
2357 *
2358 * Returns 0 for a successful open, or appropriate error code
2359 */
2360static int emac_dev_open(struct net_device *ndev)
2361{
2362 struct device *emac_dev = &ndev->dev;
2363 u32 rc, cnt, ch;
2364 int phy_addr;
2365 struct resource *res;
2366 int q, m;
2367 int i = 0;
2368 int k = 0;
2369 struct emac_priv *priv = netdev_priv(ndev);
2370
2371 netif_carrier_off(ndev);
2372 for (cnt = 0; cnt <= ETH_ALEN; cnt++)
2373 ndev->dev_addr[cnt] = priv->mac_addr[cnt];
2374
2375 /* Configuration items */
2376 priv->rx_buf_size = EMAC_DEF_MAX_FRAME_SIZE + NET_IP_ALIGN;
2377
2378 /* Clear basic hardware */
2379 for (ch = 0; ch < EMAC_MAX_TXRX_CHANNELS; ch++) {
2380 emac_write(EMAC_TXHDP(ch), 0);
2381 emac_write(EMAC_RXHDP(ch), 0);
2382 emac_write(EMAC_RXHDP(ch), 0);
2383 emac_write(EMAC_RXINTMASKCLEAR, EMAC_INT_MASK_CLEAR);
2384 emac_write(EMAC_TXINTMASKCLEAR, EMAC_INT_MASK_CLEAR);
2385 }
2386 priv->mac_hash1 = 0;
2387 priv->mac_hash2 = 0;
2388 emac_write(EMAC_MACHASH1, 0);
2389 emac_write(EMAC_MACHASH2, 0);
2390
2391 /* multi ch not supported - open 1 TX, 1RX ch by default */
2392 rc = emac_init_txch(priv, EMAC_DEF_TX_CH);
2393 if (0 != rc) {
2394 dev_err(emac_dev, "DaVinci EMAC: emac_init_txch() failed");
2395 return rc;
2396 }
2397 rc = emac_init_rxch(priv, EMAC_DEF_RX_CH, priv->mac_addr);
2398 if (0 != rc) {
2399 dev_err(emac_dev, "DaVinci EMAC: emac_init_rxch() failed");
2400 return rc;
2401 }
2402
2403 /* Request IRQ */
2404
2405 while ((res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, k))) {
2406 for (i = res->start; i <= res->end; i++) {
2407 if (request_irq(i, emac_irq, IRQF_DISABLED,
2408 ndev->name, ndev))
2409 goto rollback;
2410 }
2411 k++;
2412 }
2413
2414 /* Start/Enable EMAC hardware */
2415 emac_hw_enable(priv);
2416
2417 /* find the first phy */
2418 priv->phydev = NULL;
2419 if (priv->phy_mask) {
2420 emac_mii_reset(priv->mii_bus);
2421 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
2422 if (priv->mii_bus->phy_map[phy_addr]) {
2423 priv->phydev = priv->mii_bus->phy_map[phy_addr];
2424 break;
2425 }
2426 }
2427
2428 if (!priv->phydev) {
2429 printk(KERN_ERR "%s: no PHY found\n", ndev->name);
2430 return -1;
2431 }
2432
2433 priv->phydev = phy_connect(ndev, dev_name(&priv->phydev->dev),
2434 &emac_adjust_link, 0, PHY_INTERFACE_MODE_MII);
2435
2436 if (IS_ERR(priv->phydev)) {
2437 printk(KERN_ERR "%s: Could not attach to PHY\n",
2438 ndev->name);
2439 return PTR_ERR(priv->phydev);
2440 }
2441
2442 priv->link = 0;
2443 priv->speed = 0;
2444 priv->duplex = ~0;
2445
2446 printk(KERN_INFO "%s: attached PHY driver [%s] "
2447 "(mii_bus:phy_addr=%s, id=%x)\n", ndev->name,
2448 priv->phydev->drv->name, dev_name(&priv->phydev->dev),
2449 priv->phydev->phy_id);
2450 } else{
2451 /* No PHY , fix the link, speed and duplex settings */
2452 priv->link = 1;
2453 priv->speed = SPEED_100;
2454 priv->duplex = DUPLEX_FULL;
2455 emac_update_phystatus(priv);
2456 }
2457
2458 if (!netif_running(ndev)) /* debug only - to avoid compiler warning */
2459 emac_dump_regs(priv);
2460
2461 if (netif_msg_drv(priv))
2462 dev_notice(emac_dev, "DaVinci EMAC: Opened %s\n", ndev->name);
2463
2464 if (priv->phy_mask)
2465 phy_start(priv->phydev);
2466
2467 return 0;
2468
2469rollback:
2470
2471 dev_err(emac_dev, "DaVinci EMAC: request_irq() failed");
2472
2473 for (q = k; k >= 0; k--) {
2474 for (m = i; m >= res->start; m--)
2475 free_irq(m, ndev);
2476 res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, k-1);
2477 m = res->end;
2478 }
2479 return -EBUSY;
2480}
2481
2482/**
2483 * emac_dev_stop: EMAC device stop
2484 * @ndev: The DaVinci EMAC network adapter
2485 *
2486 * Called when system wants to stop or down the interface. We stop the network
2487 * queue, disable interrupts and cleanup TX/RX channels.
2488 *
2489 * We return the statistics in net_device_stats structure pulled from emac
2490 */
2491static int emac_dev_stop(struct net_device *ndev)
2492{
2493 struct resource *res;
2494 int i = 0;
2495 int irq_num;
2496 struct emac_priv *priv = netdev_priv(ndev);
2497 struct device *emac_dev = &ndev->dev;
2498
2499 /* inform the upper layers. */
2500 netif_stop_queue(ndev);
2501 napi_disable(&priv->napi);
2502
2503 netif_carrier_off(ndev);
2504 emac_int_disable(priv);
2505 emac_stop_txch(priv, EMAC_DEF_TX_CH);
2506 emac_stop_rxch(priv, EMAC_DEF_RX_CH);
2507 emac_cleanup_txch(priv, EMAC_DEF_TX_CH);
2508 emac_cleanup_rxch(priv, EMAC_DEF_RX_CH);
2509 emac_write(EMAC_SOFTRESET, 1);
2510
2511 if (priv->phydev)
2512 phy_disconnect(priv->phydev);
2513
2514 /* Free IRQ */
2515 while ((res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, i))) {
2516 for (irq_num = res->start; irq_num <= res->end; irq_num++)
2517 free_irq(irq_num, priv->ndev);
2518 i++;
2519 }
2520
2521 if (netif_msg_drv(priv))
2522 dev_notice(emac_dev, "DaVinci EMAC: %s stopped\n", ndev->name);
2523
2524 return 0;
2525}
2526
2527/**
2528 * emac_dev_getnetstats: EMAC get statistics function
2529 * @ndev: The DaVinci EMAC network adapter
2530 *
2531 * Called when system wants to get statistics from the device.
2532 *
2533 * We return the statistics in net_device_stats structure pulled from emac
2534 */
2535static struct net_device_stats *emac_dev_getnetstats(struct net_device *ndev)
2536{
2537 struct emac_priv *priv = netdev_priv(ndev);
2538
2539 /* update emac hardware stats and reset the registers*/
2540
2541 priv->net_dev_stats.multicast += emac_read(EMAC_RXMCASTFRAMES);
2542 emac_write(EMAC_RXMCASTFRAMES, EMAC_ALL_MULTI_REG_VALUE);
2543
2544 priv->net_dev_stats.collisions += (emac_read(EMAC_TXCOLLISION) +
2545 emac_read(EMAC_TXSINGLECOLL) +
2546 emac_read(EMAC_TXMULTICOLL));
2547 emac_write(EMAC_TXCOLLISION, EMAC_ALL_MULTI_REG_VALUE);
2548 emac_write(EMAC_TXSINGLECOLL, EMAC_ALL_MULTI_REG_VALUE);
2549 emac_write(EMAC_TXMULTICOLL, EMAC_ALL_MULTI_REG_VALUE);
2550
2551 priv->net_dev_stats.rx_length_errors += (emac_read(EMAC_RXOVERSIZED) +
2552 emac_read(EMAC_RXJABBER) +
2553 emac_read(EMAC_RXUNDERSIZED));
2554 emac_write(EMAC_RXOVERSIZED, EMAC_ALL_MULTI_REG_VALUE);
2555 emac_write(EMAC_RXJABBER, EMAC_ALL_MULTI_REG_VALUE);
2556 emac_write(EMAC_RXUNDERSIZED, EMAC_ALL_MULTI_REG_VALUE);
2557
2558 priv->net_dev_stats.rx_over_errors += (emac_read(EMAC_RXSOFOVERRUNS) +
2559 emac_read(EMAC_RXMOFOVERRUNS));
2560 emac_write(EMAC_RXSOFOVERRUNS, EMAC_ALL_MULTI_REG_VALUE);
2561 emac_write(EMAC_RXMOFOVERRUNS, EMAC_ALL_MULTI_REG_VALUE);
2562
2563 priv->net_dev_stats.rx_fifo_errors += emac_read(EMAC_RXDMAOVERRUNS);
2564 emac_write(EMAC_RXDMAOVERRUNS, EMAC_ALL_MULTI_REG_VALUE);
2565
2566 priv->net_dev_stats.tx_carrier_errors +=
2567 emac_read(EMAC_TXCARRIERSENSE);
2568 emac_write(EMAC_TXCARRIERSENSE, EMAC_ALL_MULTI_REG_VALUE);
2569
2570 priv->net_dev_stats.tx_fifo_errors = emac_read(EMAC_TXUNDERRUN);
2571 emac_write(EMAC_TXUNDERRUN, EMAC_ALL_MULTI_REG_VALUE);
2572
2573 return &priv->net_dev_stats;
2574}
2575
2576static const struct net_device_ops emac_netdev_ops = {
2577 .ndo_open = emac_dev_open,
2578 .ndo_stop = emac_dev_stop,
2579 .ndo_start_xmit = emac_dev_xmit,
2580 .ndo_set_multicast_list = emac_dev_mcast_set,
2581 .ndo_set_mac_address = emac_dev_setmac_addr,
2582 .ndo_do_ioctl = emac_devioctl,
2583 .ndo_tx_timeout = emac_dev_tx_timeout,
2584 .ndo_get_stats = emac_dev_getnetstats,
2585#ifdef CONFIG_NET_POLL_CONTROLLER
2586 .ndo_poll_controller = emac_poll_controller,
2587#endif
2588};
2589
2590/**
2591 * davinci_emac_probe: EMAC device probe
2592 * @pdev: The DaVinci EMAC device that we are removing
2593 *
2594 * Called when probing for emac devicesr. We get details of instances and
2595 * resource information from platform init and register a network device
2596 * and allocate resources necessary for driver to perform
2597 */
2598static int __devinit davinci_emac_probe(struct platform_device *pdev)
2599{
2600 int rc = 0;
2601 struct resource *res;
2602 struct net_device *ndev;
2603 struct emac_priv *priv;
2604 unsigned long size;
2605 struct emac_platform_data *pdata;
2606 struct device *emac_dev;
2607
2608 /* obtain emac clock from kernel */
2609 emac_clk = clk_get(&pdev->dev, NULL);
2610 if (IS_ERR(emac_clk)) {
2611 printk(KERN_ERR "DaVinci EMAC: Failed to get EMAC clock\n");
2612 return -EBUSY;
2613 }
2614 emac_bus_frequency = clk_get_rate(emac_clk);
2615 /* TODO: Probe PHY here if possible */
2616
2617 ndev = alloc_etherdev(sizeof(struct emac_priv));
2618 if (!ndev) {
2619 printk(KERN_ERR "DaVinci EMAC: Error allocating net_device\n");
2620 clk_put(emac_clk);
2621 return -ENOMEM;
2622 }
2623
2624 platform_set_drvdata(pdev, ndev);
2625 priv = netdev_priv(ndev);
2626 priv->pdev = pdev;
2627 priv->ndev = ndev;
2628 priv->msg_enable = netif_msg_init(debug_level, DAVINCI_EMAC_DEBUG);
2629
2630 spin_lock_init(&priv->tx_lock);
2631 spin_lock_init(&priv->rx_lock);
2632 spin_lock_init(&priv->lock);
2633
2634 pdata = pdev->dev.platform_data;
2635 if (!pdata) {
2636 printk(KERN_ERR "DaVinci EMAC: No platfrom data\n");
2637 return -ENODEV;
2638 }
2639
2640 /* MAC addr and PHY mask , RMII enable info from platform_data */
2641 memcpy(priv->mac_addr, pdata->mac_addr, 6);
2642 priv->phy_mask = pdata->phy_mask;
2643 priv->rmii_en = pdata->rmii_en;
2644 priv->version = pdata->version;
2645 emac_dev = &ndev->dev;
2646 /* Get EMAC platform data */
2647 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2648 if (!res) {
2649 dev_err(emac_dev, "DaVinci EMAC: Error getting res\n");
2650 rc = -ENOENT;
2651 goto probe_quit;
2652 }
2653
2654 priv->emac_base_phys = res->start + pdata->ctrl_reg_offset;
2655 size = res->end - res->start + 1;
2656 if (!request_mem_region(res->start, size, ndev->name)) {
2657 dev_err(emac_dev, "DaVinci EMAC: failed request_mem_region() \
2658 for regs\n");
2659 rc = -ENXIO;
2660 goto probe_quit;
2661 }
2662
2663 priv->remap_addr = ioremap(res->start, size);
2664 if (!priv->remap_addr) {
2665 dev_err(emac_dev, "Unable to map IO\n");
2666 rc = -ENOMEM;
2667 release_mem_region(res->start, size);
2668 goto probe_quit;
2669 }
2670 priv->emac_base = priv->remap_addr + pdata->ctrl_reg_offset;
2671 ndev->base_addr = (unsigned long)priv->remap_addr;
2672
2673 priv->ctrl_base = priv->remap_addr + pdata->ctrl_mod_reg_offset;
2674 priv->ctrl_ram_size = pdata->ctrl_ram_size;
2675 priv->emac_ctrl_ram = priv->remap_addr + pdata->ctrl_ram_offset;
2676
2677 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2678 if (!res) {
2679 dev_err(emac_dev, "DaVinci EMAC: Error getting irq res\n");
2680 rc = -ENOENT;
2681 goto no_irq_res;
2682 }
2683 ndev->irq = res->start;
2684
2685 if (!is_valid_ether_addr(priv->mac_addr)) {
2686 DECLARE_MAC_BUF(buf);
2687 /* Use random MAC if none passed */
2688 random_ether_addr(priv->mac_addr);
2689 printk(KERN_WARNING "%s: using random MAC addr: %s\n",
2690 __func__, print_mac(buf, priv->mac_addr));
2691 }
2692
2693 ndev->netdev_ops = &emac_netdev_ops;
2694 SET_ETHTOOL_OPS(ndev, &ethtool_ops);
2695 netif_napi_add(ndev, &priv->napi, emac_poll, EMAC_POLL_WEIGHT);
2696
2697 /* register the network device */
2698 SET_NETDEV_DEV(ndev, &pdev->dev);
2699 rc = register_netdev(ndev);
2700 if (rc) {
2701 dev_err(emac_dev, "DaVinci EMAC: Error in register_netdev\n");
2702 rc = -ENODEV;
2703 goto netdev_reg_err;
2704 }
2705
2706 clk_enable(emac_clk);
2707
2708 /* MII/Phy intialisation, mdio bus registration */
2709 emac_mii = mdiobus_alloc();
2710 if (emac_mii == NULL) {
2711 dev_err(emac_dev, "DaVinci EMAC: Error allocating mii_bus\n");
2712 rc = -ENOMEM;
2713 goto mdio_alloc_err;
2714 }
2715
2716 priv->mii_bus = emac_mii;
2717 emac_mii->name = "emac-mii",
2718 emac_mii->read = emac_mii_read,
2719 emac_mii->write = emac_mii_write,
2720 emac_mii->reset = emac_mii_reset,
2721 emac_mii->irq = mii_irqs,
2722 emac_mii->phy_mask = ~(priv->phy_mask);
2723 emac_mii->parent = &pdev->dev;
2724 emac_mii->priv = priv->remap_addr + pdata->mdio_reg_offset;
2725 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%x", priv->pdev->id);
2726 mdio_max_freq = pdata->mdio_max_freq;
2727 emac_mii->reset(emac_mii);
2728
2729 /* Register the MII bus */
2730 rc = mdiobus_register(emac_mii);
2731 if (rc)
2732 goto mdiobus_quit;
2733
2734 if (netif_msg_probe(priv)) {
2735 dev_notice(emac_dev, "DaVinci EMAC Probe found device "\
2736 "(regs: %p, irq: %d)\n",
2737 (void *)priv->emac_base_phys, ndev->irq);
2738 }
2739 return 0;
2740
2741mdiobus_quit:
2742 mdiobus_free(emac_mii);
2743
2744netdev_reg_err:
2745mdio_alloc_err:
2746no_irq_res:
2747 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2748 release_mem_region(res->start, res->end - res->start + 1);
2749 iounmap(priv->remap_addr);
2750
2751probe_quit:
2752 clk_put(emac_clk);
2753 free_netdev(ndev);
2754 return rc;
2755}
2756
2757/**
2758 * davinci_emac_remove: EMAC device remove
2759 * @pdev: The DaVinci EMAC device that we are removing
2760 *
2761 * Called when removing the device driver. We disable clock usage and release
2762 * the resources taken up by the driver and unregister network device
2763 */
2764static int __devexit davinci_emac_remove(struct platform_device *pdev)
2765{
2766 struct resource *res;
2767 struct net_device *ndev = platform_get_drvdata(pdev);
2768 struct emac_priv *priv = netdev_priv(ndev);
2769
2770 dev_notice(&ndev->dev, "DaVinci EMAC: davinci_emac_remove()\n");
2771
2772 clk_disable(emac_clk);
2773 platform_set_drvdata(pdev, NULL);
2774 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2775 mdiobus_unregister(priv->mii_bus);
2776 mdiobus_free(priv->mii_bus);
2777
2778 release_mem_region(res->start, res->end - res->start + 1);
2779
2780 unregister_netdev(ndev);
2781 free_netdev(ndev);
2782 iounmap(priv->remap_addr);
2783
2784 clk_disable(emac_clk);
2785 clk_put(emac_clk);
2786
2787 return 0;
2788}
2789
2790/**
2791 * davinci_emac_driver: EMAC platform driver structure
2792 *
2793 * We implement only probe and remove functions - suspend/resume and
2794 * others not supported by this module
2795 */
2796static struct platform_driver davinci_emac_driver = {
2797 .driver = {
2798 .name = "davinci_emac",
2799 .owner = THIS_MODULE,
2800 },
2801 .probe = davinci_emac_probe,
2802 .remove = __devexit_p(davinci_emac_remove),
2803};
2804
2805/**
2806 * davinci_emac_init: EMAC driver module init
2807 *
2808 * Called when initializing the driver. We register the driver with
2809 * the platform.
2810 */
2811static int __init davinci_emac_init(void)
2812{
2813 return platform_driver_register(&davinci_emac_driver);
2814}
2815module_init(davinci_emac_init);
2816
2817/**
2818 * davinci_emac_exit: EMAC driver module exit
2819 *
2820 * Called when exiting the driver completely. We unregister the driver with
2821 * the platform and exit
2822 */
2823static void __exit davinci_emac_exit(void)
2824{
2825 platform_driver_unregister(&davinci_emac_driver);
2826}
2827module_exit(davinci_emac_exit);
2828
2829MODULE_LICENSE("GPL");
2830MODULE_AUTHOR("DaVinci EMAC Maintainer: Anant Gole <anantgole@ti.com>");
2831MODULE_AUTHOR("DaVinci EMAC Maintainer: Chaithrika U S <chaithrika@ti.com>");
2832MODULE_DESCRIPTION("DaVinci EMAC Ethernet driver");
diff --git a/drivers/net/de600.c b/drivers/net/de600.c
index de63f1d41d32..c866ca99a068 100644
--- a/drivers/net/de600.c
+++ b/drivers/net/de600.c
@@ -38,14 +38,6 @@ static const char version[] = "de600.c: $Revision: 1.41-2.5 $, Bjorn Ekwall (bj
38/* Add more time here if your adapter won't work OK: */ 38/* Add more time here if your adapter won't work OK: */
39#define DE600_SLOW_DOWN udelay(delay_time) 39#define DE600_SLOW_DOWN udelay(delay_time)
40 40
41/* use 0 for production, 1 for verification, >2 for debug */
42#ifdef DE600_DEBUG
43#define PRINTK(x) if (de600_debug >= 2) printk x
44#else
45#define DE600_DEBUG 0
46#define PRINTK(x) /**/
47#endif
48
49#include <linux/module.h> 41#include <linux/module.h>
50#include <linux/kernel.h> 42#include <linux/kernel.h>
51#include <linux/types.h> 43#include <linux/types.h>
@@ -67,10 +59,6 @@ static const char version[] = "de600.c: $Revision: 1.41-2.5 $, Bjorn Ekwall (bj
67 59
68#include "de600.h" 60#include "de600.h"
69 61
70static unsigned int de600_debug = DE600_DEBUG;
71module_param(de600_debug, int, 0);
72MODULE_PARM_DESC(de600_debug, "DE-600 debug level (0-2)");
73
74static unsigned int check_lost = 1; 62static unsigned int check_lost = 1;
75module_param(check_lost, bool, 0); 63module_param(check_lost, bool, 0);
76MODULE_PARM_DESC(check_lost, "If set then check for unplugged de600"); 64MODULE_PARM_DESC(check_lost, "If set then check for unplugged de600");
@@ -193,7 +181,7 @@ static int de600_start_xmit(struct sk_buff *skb, struct net_device *dev)
193 } 181 }
194 182
195 /* Start real output */ 183 /* Start real output */
196 PRINTK(("de600_start_xmit:len=%d, page %d/%d\n", skb->len, tx_fifo_in, free_tx_pages)); 184 pr_debug("de600_start_xmit:len=%d, page %d/%d\n", skb->len, tx_fifo_in, free_tx_pages);
197 185
198 if ((len = skb->len) < RUNT) 186 if ((len = skb->len) < RUNT)
199 len = RUNT; 187 len = RUNT;
@@ -259,7 +247,7 @@ static irqreturn_t de600_interrupt(int irq, void *dev_id)
259 irq_status = de600_read_status(dev); 247 irq_status = de600_read_status(dev);
260 248
261 do { 249 do {
262 PRINTK(("de600_interrupt (%02X)\n", irq_status)); 250 pr_debug("de600_interrupt (%02X)\n", irq_status);
263 251
264 if (irq_status & RX_GOOD) 252 if (irq_status & RX_GOOD)
265 de600_rx_intr(dev); 253 de600_rx_intr(dev);
@@ -407,8 +395,7 @@ static struct net_device * __init de600_probe(void)
407 395
408 printk(KERN_INFO "%s: D-Link DE-600 pocket adapter", dev->name); 396 printk(KERN_INFO "%s: D-Link DE-600 pocket adapter", dev->name);
409 /* Alpha testers must have the version number to report bugs. */ 397 /* Alpha testers must have the version number to report bugs. */
410 if (de600_debug > 1) 398 pr_debug("%s", version);
411 printk(version);
412 399
413 /* probe for adapter */ 400 /* probe for adapter */
414 err = -ENODEV; 401 err = -ENODEV;
diff --git a/drivers/net/de620.c b/drivers/net/de620.c
index d52f34cc9526..039bc1acadd3 100644
--- a/drivers/net/de620.c
+++ b/drivers/net/de620.c
@@ -48,7 +48,6 @@ static const char version[] =
48 * Compile-time options: (see below for descriptions) 48 * Compile-time options: (see below for descriptions)
49 * -DDE620_IO=0x378 (lpt1) 49 * -DDE620_IO=0x378 (lpt1)
50 * -DDE620_IRQ=7 (lpt1) 50 * -DDE620_IRQ=7 (lpt1)
51 * -DDE602_DEBUG=...
52 * -DSHUTDOWN_WHEN_LOST 51 * -DSHUTDOWN_WHEN_LOST
53 * -DCOUNT_LOOPS 52 * -DCOUNT_LOOPS
54 * -DLOWSPEED 53 * -DLOWSPEED
@@ -98,15 +97,6 @@ static const char version[] =
98#define SHUTDOWN_WHEN_LOST 97#define SHUTDOWN_WHEN_LOST
99 */ 98 */
100 99
101/*
102 * Enable debugging by "-DDE620_DEBUG=3" when compiling,
103 * OR by enabling the following #define
104 *
105 * use 0 for production, 1 for verification, >2 for debug
106 *
107#define DE620_DEBUG 3
108 */
109
110#ifdef LOWSPEED 100#ifdef LOWSPEED
111/* 101/*
112 * Enable this #define if you want to see debugging output that show how long 102 * Enable this #define if you want to see debugging output that show how long
@@ -160,14 +150,6 @@ typedef unsigned char byte;
160#define RUNT 60 /* Too small Ethernet packet */ 150#define RUNT 60 /* Too small Ethernet packet */
161#define GIANT 1514 /* largest legal size packet, no fcs */ 151#define GIANT 1514 /* largest legal size packet, no fcs */
162 152
163#ifdef DE620_DEBUG /* Compile-time configurable */
164#define PRINTK(x) if (de620_debug >= 2) printk x
165#else
166#define DE620_DEBUG 0
167#define PRINTK(x) /**/
168#endif
169
170
171/* 153/*
172 * Force media with insmod: 154 * Force media with insmod:
173 * insmod de620.o bnc=1 155 * insmod de620.o bnc=1
@@ -186,8 +168,6 @@ static int io = DE620_IO;
186static int irq = DE620_IRQ; 168static int irq = DE620_IRQ;
187static int clone = DE620_CLONE; 169static int clone = DE620_CLONE;
188 170
189static unsigned int de620_debug = DE620_DEBUG;
190
191static spinlock_t de620_lock; 171static spinlock_t de620_lock;
192 172
193module_param(bnc, int, 0); 173module_param(bnc, int, 0);
@@ -195,13 +175,11 @@ module_param(utp, int, 0);
195module_param(io, int, 0); 175module_param(io, int, 0);
196module_param(irq, int, 0); 176module_param(irq, int, 0);
197module_param(clone, int, 0); 177module_param(clone, int, 0);
198module_param(de620_debug, int, 0);
199MODULE_PARM_DESC(bnc, "DE-620 set BNC medium (0-1)"); 178MODULE_PARM_DESC(bnc, "DE-620 set BNC medium (0-1)");
200MODULE_PARM_DESC(utp, "DE-620 set UTP medium (0-1)"); 179MODULE_PARM_DESC(utp, "DE-620 set UTP medium (0-1)");
201MODULE_PARM_DESC(io, "DE-620 I/O base address,required"); 180MODULE_PARM_DESC(io, "DE-620 I/O base address,required");
202MODULE_PARM_DESC(irq, "DE-620 IRQ number,required"); 181MODULE_PARM_DESC(irq, "DE-620 IRQ number,required");
203MODULE_PARM_DESC(clone, "Check also for non-D-Link DE-620 clones (0-1)"); 182MODULE_PARM_DESC(clone, "Check also for non-D-Link DE-620 clones (0-1)");
204MODULE_PARM_DESC(de620_debug, "DE-620 debug level (0-2)");
205 183
206/*********************************************** 184/***********************************************
207 * * 185 * *
@@ -533,9 +511,9 @@ static int de620_start_xmit(struct sk_buff *skb, struct net_device *dev)
533 511
534 /* Start real output */ 512 /* Start real output */
535 513
536 spin_lock_irqsave(&de620_lock, flags) 514 spin_lock_irqsave(&de620_lock, flags);
537 PRINTK(("de620_start_xmit: len=%d, bufs 0x%02x\n", 515 pr_debug("de620_start_xmit: len=%d, bufs 0x%02x\n",
538 (int)skb->len, using_txbuf)); 516 (int)skb->len, using_txbuf);
539 517
540 /* select a free tx buffer. if there is one... */ 518 /* select a free tx buffer. if there is one... */
541 switch (using_txbuf) { 519 switch (using_txbuf) {
@@ -585,12 +563,12 @@ de620_interrupt(int irq_in, void *dev_id)
585 /* Read the status register (_not_ the status port) */ 563 /* Read the status register (_not_ the status port) */
586 irq_status = de620_get_register(dev, R_STS); 564 irq_status = de620_get_register(dev, R_STS);
587 565
588 PRINTK(("de620_interrupt (%2.2X)\n", irq_status)); 566 pr_debug("de620_interrupt (%2.2X)\n", irq_status);
589 567
590 if (irq_status & RXGOOD) { 568 if (irq_status & RXGOOD) {
591 do { 569 do {
592 again = de620_rx_intr(dev); 570 again = de620_rx_intr(dev);
593 PRINTK(("again=%d\n", again)); 571 pr_debug("again=%d\n", again);
594 } 572 }
595 while (again && (++bogus_count < 100)); 573 while (again && (++bogus_count < 100));
596 } 574 }
@@ -622,7 +600,7 @@ static int de620_rx_intr(struct net_device *dev)
622 byte pagelink; 600 byte pagelink;
623 byte curr_page; 601 byte curr_page;
624 602
625 PRINTK(("de620_rx_intr: next_rx_page = %d\n", next_rx_page)); 603 pr_debug("de620_rx_intr: next_rx_page = %d\n", next_rx_page);
626 604
627 /* Tell the adapter that we are going to read data, and from where */ 605 /* Tell the adapter that we are going to read data, and from where */
628 de620_send_command(dev, W_CR | RRN); 606 de620_send_command(dev, W_CR | RRN);
@@ -631,8 +609,9 @@ static int de620_rx_intr(struct net_device *dev)
631 609
632 /* Deep breath, and away we goooooo */ 610 /* Deep breath, and away we goooooo */
633 de620_read_block(dev, (byte *)&header_buf, sizeof(struct header_buf)); 611 de620_read_block(dev, (byte *)&header_buf, sizeof(struct header_buf));
634 PRINTK(("page status=0x%02x, nextpage=%d, packetsize=%d\n", 612 pr_debug("page status=0x%02x, nextpage=%d, packetsize=%d\n",
635 header_buf.status, header_buf.Rx_NextPage, header_buf.Rx_ByteCount)); 613 header_buf.status, header_buf.Rx_NextPage,
614 header_buf.Rx_ByteCount);
636 615
637 /* Plausible page header? */ 616 /* Plausible page header? */
638 pagelink = header_buf.Rx_NextPage; 617 pagelink = header_buf.Rx_NextPage;
@@ -683,7 +662,7 @@ static int de620_rx_intr(struct net_device *dev)
683 buffer = skb_put(skb,size); 662 buffer = skb_put(skb,size);
684 /* copy the packet into the buffer */ 663 /* copy the packet into the buffer */
685 de620_read_block(dev, buffer, size); 664 de620_read_block(dev, buffer, size);
686 PRINTK(("Read %d bytes\n", size)); 665 pr_debug("Read %d bytes\n", size);
687 skb->protocol=eth_type_trans(skb,dev); 666 skb->protocol=eth_type_trans(skb,dev);
688 netif_rx(skb); /* deliver it "upstairs" */ 667 netif_rx(skb); /* deliver it "upstairs" */
689 /* count all receives */ 668 /* count all receives */
@@ -696,7 +675,7 @@ static int de620_rx_intr(struct net_device *dev)
696 /* NOTE! We're _not_ checking the 'EMPTY'-flag! This seems better... */ 675 /* NOTE! We're _not_ checking the 'EMPTY'-flag! This seems better... */
697 curr_page = de620_get_register(dev, R_CPR); 676 curr_page = de620_get_register(dev, R_CPR);
698 de620_set_register(dev, W_NPRF, next_rx_page); 677 de620_set_register(dev, W_NPRF, next_rx_page);
699 PRINTK(("next_rx_page=%d CPR=%d\n", next_rx_page, curr_page)); 678 pr_debug("next_rx_page=%d CPR=%d\n", next_rx_page, curr_page);
700 679
701 return (next_rx_page != curr_page); /* That was slightly tricky... */ 680 return (next_rx_page != curr_page); /* That was slightly tricky... */
702} 681}
@@ -830,8 +809,7 @@ struct net_device * __init de620_probe(int unit)
830 netdev_boot_setup_check(dev); 809 netdev_boot_setup_check(dev);
831 } 810 }
832 811
833 if (de620_debug) 812 pr_debug("%s", version);
834 printk(version);
835 813
836 printk(KERN_INFO "D-Link DE-620 pocket adapter"); 814 printk(KERN_INFO "D-Link DE-620 pocket adapter");
837 815
@@ -878,14 +856,13 @@ struct net_device * __init de620_probe(int unit)
878 /* base_addr and irq are already set, see above! */ 856 /* base_addr and irq are already set, see above! */
879 857
880 /* dump eeprom */ 858 /* dump eeprom */
881 if (de620_debug) { 859 pr_debug("\nEEPROM contents:\n"
882 printk("\nEEPROM contents:\n"); 860 "RAM_Size = 0x%02X\n"
883 printk("RAM_Size = 0x%02X\n", nic_data.RAM_Size); 861 "NodeID = %pM\n"
884 printk("NodeID = %pM\n", nic_data.NodeID); 862 "Model = %d\n"
885 printk("Model = %d\n", nic_data.Model); 863 "Media = %d\n"
886 printk("Media = %d\n", nic_data.Media); 864 "SCR = 0x%02x\n", nic_data.RAM_Size, nic_data.NodeID,
887 printk("SCR = 0x%02x\n", nic_data.SCR); 865 nic_data.Model, nic_data.Media, nic_data.SCR);
888 }
889 866
890 err = register_netdev(dev); 867 err = register_netdev(dev);
891 if (err) 868 if (err)
diff --git a/drivers/net/depca.c b/drivers/net/depca.c
index 357f565851ed..9301eb28d9e2 100644
--- a/drivers/net/depca.c
+++ b/drivers/net/depca.c
@@ -810,7 +810,7 @@ static int __init depca_hw_init (struct net_device *dev, struct device *device)
810 810
811 dev->mem_start = 0; 811 dev->mem_start = 0;
812 812
813 device->driver_data = dev; 813 dev_set_drvdata(device, dev);
814 SET_NETDEV_DEV (dev, device); 814 SET_NETDEV_DEV (dev, device);
815 815
816 status = register_netdev(dev); 816 status = register_netdev(dev);
@@ -1614,7 +1614,7 @@ static int __devexit depca_device_remove (struct device *device)
1614 struct depca_private *lp; 1614 struct depca_private *lp;
1615 int bus; 1615 int bus;
1616 1616
1617 dev = device->driver_data; 1617 dev = dev_get_drvdata(device);
1618 lp = netdev_priv(dev); 1618 lp = netdev_priv(dev);
1619 1619
1620 unregister_netdev (dev); 1620 unregister_netdev (dev);
diff --git a/drivers/net/dl2k.c b/drivers/net/dl2k.c
index 4a1b554654eb..895d72143ee0 100644
--- a/drivers/net/dl2k.c
+++ b/drivers/net/dl2k.c
@@ -539,7 +539,7 @@ rio_tx_timeout (struct net_device *dev)
539 dev->name, readl (ioaddr + TxStatus)); 539 dev->name, readl (ioaddr + TxStatus));
540 rio_free_tx(dev, 0); 540 rio_free_tx(dev, 0);
541 dev->if_port = 0; 541 dev->if_port = 0;
542 dev->trans_start = jiffies; 542 dev->trans_start = jiffies; /* prevent tx timeout */
543} 543}
544 544
545 /* allocate and initialize Tx and Rx descriptors */ 545 /* allocate and initialize Tx and Rx descriptors */
@@ -610,7 +610,7 @@ start_xmit (struct sk_buff *skb, struct net_device *dev)
610 610
611 if (np->link_status == 0) { /* Link Down */ 611 if (np->link_status == 0) { /* Link Down */
612 dev_kfree_skb(skb); 612 dev_kfree_skb(skb);
613 return 0; 613 return NETDEV_TX_OK;
614 } 614 }
615 ioaddr = dev->base_addr; 615 ioaddr = dev->base_addr;
616 entry = np->cur_tx % TX_RING_SIZE; 616 entry = np->cur_tx % TX_RING_SIZE;
@@ -665,9 +665,7 @@ start_xmit (struct sk_buff *skb, struct net_device *dev)
665 writel (0, dev->base_addr + TFDListPtr1); 665 writel (0, dev->base_addr + TFDListPtr1);
666 } 666 }
667 667
668 /* NETDEV WATCHDOG timer */ 668 return NETDEV_TX_OK;
669 dev->trans_start = jiffies;
670 return 0;
671} 669}
672 670
673static irqreturn_t 671static irqreturn_t
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c
index d8350860c0f8..e402e91bf188 100644
--- a/drivers/net/dm9000.c
+++ b/drivers/net/dm9000.c
@@ -1170,6 +1170,21 @@ dm9000_stop(struct net_device *ndev)
1170 return 0; 1170 return 0;
1171} 1171}
1172 1172
1173static const struct net_device_ops dm9000_netdev_ops = {
1174 .ndo_open = dm9000_open,
1175 .ndo_stop = dm9000_stop,
1176 .ndo_start_xmit = dm9000_start_xmit,
1177 .ndo_tx_timeout = dm9000_timeout,
1178 .ndo_set_multicast_list = dm9000_hash_table,
1179 .ndo_do_ioctl = dm9000_ioctl,
1180 .ndo_change_mtu = eth_change_mtu,
1181 .ndo_validate_addr = eth_validate_addr,
1182 .ndo_set_mac_address = eth_mac_addr,
1183#ifdef CONFIG_NET_POLL_CONTROLLER
1184 .ndo_poll_controller = dm9000_poll_controller,
1185#endif
1186};
1187
1173#define res_size(_r) (((_r)->end - (_r)->start) + 1) 1188#define res_size(_r) (((_r)->end - (_r)->start) + 1)
1174 1189
1175/* 1190/*
@@ -1339,18 +1354,9 @@ dm9000_probe(struct platform_device *pdev)
1339 /* driver system function */ 1354 /* driver system function */
1340 ether_setup(ndev); 1355 ether_setup(ndev);
1341 1356
1342 ndev->open = &dm9000_open; 1357 ndev->netdev_ops = &dm9000_netdev_ops;
1343 ndev->hard_start_xmit = &dm9000_start_xmit; 1358 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1344 ndev->tx_timeout = &dm9000_timeout; 1359 ndev->ethtool_ops = &dm9000_ethtool_ops;
1345 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1346 ndev->stop = &dm9000_stop;
1347 ndev->set_multicast_list = &dm9000_hash_table;
1348 ndev->ethtool_ops = &dm9000_ethtool_ops;
1349 ndev->do_ioctl = &dm9000_ioctl;
1350
1351#ifdef CONFIG_NET_POLL_CONTROLLER
1352 ndev->poll_controller = &dm9000_poll_controller;
1353#endif
1354 1360
1355 db->msg_enable = NETIF_MSG_LINK; 1361 db->msg_enable = NETIF_MSG_LINK;
1356 db->mii.phy_id_mask = 0x1f; 1362 db->mii.phy_id_mask = 0x1f;
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index fffb006b7d95..05e87a59f1c6 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -498,6 +498,8 @@ int e1000_up(struct e1000_adapter *adapter)
498 498
499 e1000_irq_enable(adapter); 499 e1000_irq_enable(adapter);
500 500
501 netif_wake_queue(adapter->netdev);
502
501 /* fire a link change interrupt to start the watchdog */ 503 /* fire a link change interrupt to start the watchdog */
502 ew32(ICS, E1000_ICS_LSC); 504 ew32(ICS, E1000_ICS_LSC);
503 return 0; 505 return 0;
@@ -1234,15 +1236,14 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
1234 !e1000_check_mng_mode(hw)) 1236 !e1000_check_mng_mode(hw))
1235 e1000_get_hw_control(adapter); 1237 e1000_get_hw_control(adapter);
1236 1238
1237 /* tell the stack to leave us alone until e1000_open() is called */
1238 netif_carrier_off(netdev);
1239 netif_stop_queue(netdev);
1240
1241 strcpy(netdev->name, "eth%d"); 1239 strcpy(netdev->name, "eth%d");
1242 err = register_netdev(netdev); 1240 err = register_netdev(netdev);
1243 if (err) 1241 if (err)
1244 goto err_register; 1242 goto err_register;
1245 1243
1244 /* carrier off reporting is important to ethtool even BEFORE open */
1245 netif_carrier_off(netdev);
1246
1246 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); 1247 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1247 1248
1248 cards_found++; 1249 cards_found++;
@@ -1441,6 +1442,8 @@ static int e1000_open(struct net_device *netdev)
1441 if (test_bit(__E1000_TESTING, &adapter->flags)) 1442 if (test_bit(__E1000_TESTING, &adapter->flags))
1442 return -EBUSY; 1443 return -EBUSY;
1443 1444
1445 netif_carrier_off(netdev);
1446
1444 /* allocate transmit descriptors */ 1447 /* allocate transmit descriptors */
1445 err = e1000_setup_all_tx_resources(adapter); 1448 err = e1000_setup_all_tx_resources(adapter);
1446 if (err) 1449 if (err)
@@ -2327,7 +2330,8 @@ static void e1000_set_rx_mode(struct net_device *netdev)
2327{ 2330{
2328 struct e1000_adapter *adapter = netdev_priv(netdev); 2331 struct e1000_adapter *adapter = netdev_priv(netdev);
2329 struct e1000_hw *hw = &adapter->hw; 2332 struct e1000_hw *hw = &adapter->hw;
2330 struct dev_addr_list *uc_ptr; 2333 struct netdev_hw_addr *ha;
2334 bool use_uc = false;
2331 struct dev_addr_list *mc_ptr; 2335 struct dev_addr_list *mc_ptr;
2332 u32 rctl; 2336 u32 rctl;
2333 u32 hash_value; 2337 u32 hash_value;
@@ -2366,12 +2370,11 @@ static void e1000_set_rx_mode(struct net_device *netdev)
2366 rctl |= E1000_RCTL_VFE; 2370 rctl |= E1000_RCTL_VFE;
2367 } 2371 }
2368 2372
2369 uc_ptr = NULL;
2370 if (netdev->uc_count > rar_entries - 1) { 2373 if (netdev->uc_count > rar_entries - 1) {
2371 rctl |= E1000_RCTL_UPE; 2374 rctl |= E1000_RCTL_UPE;
2372 } else if (!(netdev->flags & IFF_PROMISC)) { 2375 } else if (!(netdev->flags & IFF_PROMISC)) {
2373 rctl &= ~E1000_RCTL_UPE; 2376 rctl &= ~E1000_RCTL_UPE;
2374 uc_ptr = netdev->uc_list; 2377 use_uc = true;
2375 } 2378 }
2376 2379
2377 ew32(RCTL, rctl); 2380 ew32(RCTL, rctl);
@@ -2389,13 +2392,20 @@ static void e1000_set_rx_mode(struct net_device *netdev)
2389 * if there are not 14 addresses, go ahead and clear the filters 2392 * if there are not 14 addresses, go ahead and clear the filters
2390 * -- with 82571 controllers only 0-13 entries are filled here 2393 * -- with 82571 controllers only 0-13 entries are filled here
2391 */ 2394 */
2395 i = 1;
2396 if (use_uc)
2397 list_for_each_entry(ha, &netdev->uc_list, list) {
2398 if (i == rar_entries)
2399 break;
2400 e1000_rar_set(hw, ha->addr, i++);
2401 }
2402
2403 WARN_ON(i == rar_entries);
2404
2392 mc_ptr = netdev->mc_list; 2405 mc_ptr = netdev->mc_list;
2393 2406
2394 for (i = 1; i < rar_entries; i++) { 2407 for (; i < rar_entries; i++) {
2395 if (uc_ptr) { 2408 if (mc_ptr) {
2396 e1000_rar_set(hw, uc_ptr->da_addr, i);
2397 uc_ptr = uc_ptr->next;
2398 } else if (mc_ptr) {
2399 e1000_rar_set(hw, mc_ptr->da_addr, i); 2409 e1000_rar_set(hw, mc_ptr->da_addr, i);
2400 mc_ptr = mc_ptr->next; 2410 mc_ptr = mc_ptr->next;
2401 } else { 2411 } else {
@@ -2405,7 +2415,6 @@ static void e1000_set_rx_mode(struct net_device *netdev)
2405 E1000_WRITE_FLUSH(); 2415 E1000_WRITE_FLUSH();
2406 } 2416 }
2407 } 2417 }
2408 WARN_ON(uc_ptr != NULL);
2409 2418
2410 /* load any remaining addresses into the hash table */ 2419 /* load any remaining addresses into the hash table */
2411 2420
@@ -2590,7 +2599,6 @@ static void e1000_watchdog(unsigned long data)
2590 ew32(TCTL, tctl); 2599 ew32(TCTL, tctl);
2591 2600
2592 netif_carrier_on(netdev); 2601 netif_carrier_on(netdev);
2593 netif_wake_queue(netdev);
2594 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ)); 2602 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2595 adapter->smartspeed = 0; 2603 adapter->smartspeed = 0;
2596 } else { 2604 } else {
@@ -2607,7 +2615,6 @@ static void e1000_watchdog(unsigned long data)
2607 printk(KERN_INFO "e1000: %s NIC Link is Down\n", 2615 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2608 netdev->name); 2616 netdev->name);
2609 netif_carrier_off(netdev); 2617 netif_carrier_off(netdev);
2610 netif_stop_queue(netdev);
2611 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ)); 2618 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2612 2619
2613 /* 80003ES2LAN workaround-- 2620 /* 80003ES2LAN workaround--
@@ -2645,6 +2652,8 @@ static void e1000_watchdog(unsigned long data)
2645 * (Do the reset outside of interrupt context). */ 2652 * (Do the reset outside of interrupt context). */
2646 adapter->tx_timeout_count++; 2653 adapter->tx_timeout_count++;
2647 schedule_work(&adapter->reset_task); 2654 schedule_work(&adapter->reset_task);
2655 /* return immediately since reset is imminent */
2656 return;
2648 } 2657 }
2649 } 2658 }
2650 2659
@@ -3362,7 +3371,6 @@ static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3362 3371
3363 if (count) { 3372 if (count) {
3364 e1000_tx_queue(adapter, tx_ring, tx_flags, count); 3373 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
3365 netdev->trans_start = jiffies;
3366 /* Make sure there is space in the ring for the next send. */ 3374 /* Make sure there is space in the ring for the next send. */
3367 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2); 3375 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3368 3376
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index d8b82296f41e..6cdb703be951 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -253,7 +253,7 @@ enum e1e_registers {
253#define IGP01E1000_PLHR_SS_DOWNGRADE 0x8000 253#define IGP01E1000_PLHR_SS_DOWNGRADE 0x8000
254 254
255#define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002 255#define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002
256#define IGP01E1000_PSSR_MDIX 0x0008 256#define IGP01E1000_PSSR_MDIX 0x0800
257#define IGP01E1000_PSSR_SPEED_MASK 0xC000 257#define IGP01E1000_PSSR_SPEED_MASK 0xC000
258#define IGP01E1000_PSSR_SPEED_1000MBPS 0xC000 258#define IGP01E1000_PSSR_SPEED_1000MBPS 0xC000
259 259
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index ca82f19a7ed1..f012cc62eff3 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -2826,6 +2826,8 @@ int e1000e_up(struct e1000_adapter *adapter)
2826 e1000_configure_msix(adapter); 2826 e1000_configure_msix(adapter);
2827 e1000_irq_enable(adapter); 2827 e1000_irq_enable(adapter);
2828 2828
2829 netif_wake_queue(adapter->netdev);
2830
2829 /* fire a link change interrupt to start the watchdog */ 2831 /* fire a link change interrupt to start the watchdog */
2830 ew32(ICS, E1000_ICS_LSC); 2832 ew32(ICS, E1000_ICS_LSC);
2831 return 0; 2833 return 0;
@@ -2848,7 +2850,7 @@ void e1000e_down(struct e1000_adapter *adapter)
2848 ew32(RCTL, rctl & ~E1000_RCTL_EN); 2850 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2849 /* flush and sleep below */ 2851 /* flush and sleep below */
2850 2852
2851 netif_tx_stop_all_queues(netdev); 2853 netif_stop_queue(netdev);
2852 2854
2853 /* disable transmits in the hardware */ 2855 /* disable transmits in the hardware */
2854 tctl = er32(TCTL); 2856 tctl = er32(TCTL);
@@ -3072,6 +3074,8 @@ static int e1000_open(struct net_device *netdev)
3072 if (test_bit(__E1000_TESTING, &adapter->state)) 3074 if (test_bit(__E1000_TESTING, &adapter->state))
3073 return -EBUSY; 3075 return -EBUSY;
3074 3076
3077 netif_carrier_off(netdev);
3078
3075 /* allocate transmit descriptors */ 3079 /* allocate transmit descriptors */
3076 err = e1000e_setup_tx_resources(adapter); 3080 err = e1000e_setup_tx_resources(adapter);
3077 if (err) 3081 if (err)
@@ -3128,7 +3132,7 @@ static int e1000_open(struct net_device *netdev)
3128 3132
3129 e1000_irq_enable(adapter); 3133 e1000_irq_enable(adapter);
3130 3134
3131 netif_tx_start_all_queues(netdev); 3135 netif_start_queue(netdev);
3132 3136
3133 /* fire a link status change interrupt to start the watchdog */ 3137 /* fire a link status change interrupt to start the watchdog */
3134 ew32(ICS, E1000_ICS_LSC); 3138 ew32(ICS, E1000_ICS_LSC);
@@ -3598,7 +3602,6 @@ static void e1000_watchdog_task(struct work_struct *work)
3598 phy->ops.cfg_on_link_up(hw); 3602 phy->ops.cfg_on_link_up(hw);
3599 3603
3600 netif_carrier_on(netdev); 3604 netif_carrier_on(netdev);
3601 netif_tx_wake_all_queues(netdev);
3602 3605
3603 if (!test_bit(__E1000_DOWN, &adapter->state)) 3606 if (!test_bit(__E1000_DOWN, &adapter->state))
3604 mod_timer(&adapter->phy_info_timer, 3607 mod_timer(&adapter->phy_info_timer,
@@ -3612,7 +3615,6 @@ static void e1000_watchdog_task(struct work_struct *work)
3612 printk(KERN_INFO "e1000e: %s NIC Link is Down\n", 3615 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3613 adapter->netdev->name); 3616 adapter->netdev->name);
3614 netif_carrier_off(netdev); 3617 netif_carrier_off(netdev);
3615 netif_tx_stop_all_queues(netdev);
3616 if (!test_bit(__E1000_DOWN, &adapter->state)) 3618 if (!test_bit(__E1000_DOWN, &adapter->state))
3617 mod_timer(&adapter->phy_info_timer, 3619 mod_timer(&adapter->phy_info_timer,
3618 round_jiffies(jiffies + 2 * HZ)); 3620 round_jiffies(jiffies + 2 * HZ));
@@ -3649,6 +3651,8 @@ link_up:
3649 */ 3651 */
3650 adapter->tx_timeout_count++; 3652 adapter->tx_timeout_count++;
3651 schedule_work(&adapter->reset_task); 3653 schedule_work(&adapter->reset_task);
3654 /* return immediately since reset is imminent */
3655 return;
3652 } 3656 }
3653 } 3657 }
3654 3658
@@ -4145,7 +4149,6 @@ static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
4145 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss); 4149 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
4146 if (count) { 4150 if (count) {
4147 e1000_tx_queue(adapter, tx_flags, count); 4151 e1000_tx_queue(adapter, tx_flags, count);
4148 netdev->trans_start = jiffies;
4149 /* Make sure there is space in the ring for the next send. */ 4152 /* Make sure there is space in the ring for the next send. */
4150 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2); 4153 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4151 4154
@@ -5037,15 +5040,14 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
5037 if (!(adapter->flags & FLAG_HAS_AMT)) 5040 if (!(adapter->flags & FLAG_HAS_AMT))
5038 e1000_get_hw_control(adapter); 5041 e1000_get_hw_control(adapter);
5039 5042
5040 /* tell the stack to leave us alone until e1000_open() is called */
5041 netif_carrier_off(netdev);
5042 netif_tx_stop_all_queues(netdev);
5043
5044 strcpy(netdev->name, "eth%d"); 5043 strcpy(netdev->name, "eth%d");
5045 err = register_netdev(netdev); 5044 err = register_netdev(netdev);
5046 if (err) 5045 if (err)
5047 goto err_register; 5046 goto err_register;
5048 5047
5048 /* carrier off reporting is important to ethtool even BEFORE open */
5049 netif_carrier_off(netdev);
5050
5049 e1000_print_device_info(adapter); 5051 e1000_print_device_info(adapter);
5050 5052
5051 return 0; 5053 return 0;
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c
index b22dab9153f6..147c4b088fb3 100644
--- a/drivers/net/ehea/ehea_main.c
+++ b/drivers/net/ehea/ehea_main.c
@@ -3261,7 +3261,7 @@ static ssize_t ehea_probe_port(struct device *dev,
3261 struct device_attribute *attr, 3261 struct device_attribute *attr,
3262 const char *buf, size_t count) 3262 const char *buf, size_t count)
3263{ 3263{
3264 struct ehea_adapter *adapter = dev->driver_data; 3264 struct ehea_adapter *adapter = dev_get_drvdata(dev);
3265 struct ehea_port *port; 3265 struct ehea_port *port;
3266 struct device_node *eth_dn = NULL; 3266 struct device_node *eth_dn = NULL;
3267 int i; 3267 int i;
@@ -3316,7 +3316,7 @@ static ssize_t ehea_remove_port(struct device *dev,
3316 struct device_attribute *attr, 3316 struct device_attribute *attr,
3317 const char *buf, size_t count) 3317 const char *buf, size_t count)
3318{ 3318{
3319 struct ehea_adapter *adapter = dev->driver_data; 3319 struct ehea_adapter *adapter = dev_get_drvdata(dev);
3320 struct ehea_port *port; 3320 struct ehea_port *port;
3321 int i; 3321 int i;
3322 u32 logical_port_id; 3322 u32 logical_port_id;
@@ -3404,7 +3404,7 @@ static int __devinit ehea_probe_adapter(struct of_device *dev,
3404 3404
3405 adapter->pd = EHEA_PD_ID; 3405 adapter->pd = EHEA_PD_ID;
3406 3406
3407 dev->dev.driver_data = adapter; 3407 dev_set_drvdata(&dev->dev, adapter);
3408 3408
3409 3409
3410 /* initialize adapter and ports */ 3410 /* initialize adapter and ports */
@@ -3468,7 +3468,7 @@ out:
3468 3468
3469static int __devexit ehea_remove(struct of_device *dev) 3469static int __devexit ehea_remove(struct of_device *dev)
3470{ 3470{
3471 struct ehea_adapter *adapter = dev->dev.driver_data; 3471 struct ehea_adapter *adapter = dev_get_drvdata(&dev->dev);
3472 int i; 3472 int i;
3473 3473
3474 for (i = 0; i < EHEA_MAX_PORTS; i++) 3474 for (i = 0; i < EHEA_MAX_PORTS; i++)
diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c
index 9080f07da8fe..8005b602f776 100644
--- a/drivers/net/enic/enic_main.c
+++ b/drivers/net/enic/enic_main.c
@@ -661,8 +661,6 @@ static int enic_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
661 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + 1) 661 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + 1)
662 netif_stop_queue(netdev); 662 netif_stop_queue(netdev);
663 663
664 netdev->trans_start = jiffies;
665
666 spin_unlock_irqrestore(&enic->wq_lock[0], flags); 664 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
667 665
668 return NETDEV_TX_OK; 666 return NETDEV_TX_OK;
diff --git a/drivers/net/eql.c b/drivers/net/eql.c
index 5210bb1027cc..19b7dd983944 100644
--- a/drivers/net/eql.c
+++ b/drivers/net/eql.c
@@ -194,6 +194,7 @@ static void __init eql_setup(struct net_device *dev)
194 194
195 dev->type = ARPHRD_SLIP; 195 dev->type = ARPHRD_SLIP;
196 dev->tx_queue_len = 5; /* Hands them off fast */ 196 dev->tx_queue_len = 5; /* Hands them off fast */
197 dev->priv_flags &= ~IFF_XMIT_DST_RELEASE;
197} 198}
198 199
199static int eql_open(struct net_device *dev) 200static int eql_open(struct net_device *dev)
diff --git a/drivers/net/fec.c b/drivers/net/fec.c
index 682e7f0b5581..28db6919c526 100644
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -86,8 +86,7 @@ static unsigned char fec_mac_default[] = {
86#endif 86#endif
87#endif /* CONFIG_M5272 */ 87#endif /* CONFIG_M5272 */
88 88
89/* Forward declarations of some structures to support different PHYs 89/* Forward declarations of some structures to support different PHYs */
90*/
91 90
92typedef struct { 91typedef struct {
93 uint mii_data; 92 uint mii_data;
@@ -123,8 +122,7 @@ typedef struct {
123#error "FEC: descriptor ring size constants too large" 122#error "FEC: descriptor ring size constants too large"
124#endif 123#endif
125 124
126/* Interrupt events/masks. 125/* Interrupt events/masks. */
127*/
128#define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */ 126#define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
129#define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */ 127#define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
130#define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */ 128#define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
@@ -165,7 +163,7 @@ typedef struct {
165 */ 163 */
166struct fec_enet_private { 164struct fec_enet_private {
167 /* Hardware registers of the FEC device */ 165 /* Hardware registers of the FEC device */
168 volatile fec_t *hwp; 166 void __iomem *hwp;
169 167
170 struct net_device *netdev; 168 struct net_device *netdev;
171 169
@@ -174,16 +172,20 @@ struct fec_enet_private {
174 /* The saved address of a sent-in-place packet/buffer, for skfree(). */ 172 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
175 unsigned char *tx_bounce[TX_RING_SIZE]; 173 unsigned char *tx_bounce[TX_RING_SIZE];
176 struct sk_buff* tx_skbuff[TX_RING_SIZE]; 174 struct sk_buff* tx_skbuff[TX_RING_SIZE];
175 struct sk_buff* rx_skbuff[RX_RING_SIZE];
177 ushort skb_cur; 176 ushort skb_cur;
178 ushort skb_dirty; 177 ushort skb_dirty;
179 178
180 /* CPM dual port RAM relative addresses. 179 /* CPM dual port RAM relative addresses */
181 */
182 dma_addr_t bd_dma; 180 dma_addr_t bd_dma;
183 cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ 181 /* Address of Rx and Tx buffers */
184 cbd_t *tx_bd_base; 182 struct bufdesc *rx_bd_base;
185 cbd_t *cur_rx, *cur_tx; /* The next free ring entry */ 183 struct bufdesc *tx_bd_base;
186 cbd_t *dirty_tx; /* The ring entries to be free()ed. */ 184 /* The next free ring entry */
185 struct bufdesc *cur_rx, *cur_tx;
186 /* The ring entries to be free()ed */
187 struct bufdesc *dirty_tx;
188
187 uint tx_full; 189 uint tx_full;
188 /* hold while accessing the HW like ringbuffer for tx/rx but not MAC */ 190 /* hold while accessing the HW like ringbuffer for tx/rx but not MAC */
189 spinlock_t hw_lock; 191 spinlock_t hw_lock;
@@ -209,17 +211,13 @@ struct fec_enet_private {
209 int full_duplex; 211 int full_duplex;
210}; 212};
211 213
212static int fec_enet_open(struct net_device *dev);
213static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
214static void fec_enet_mii(struct net_device *dev); 214static void fec_enet_mii(struct net_device *dev);
215static irqreturn_t fec_enet_interrupt(int irq, void * dev_id); 215static irqreturn_t fec_enet_interrupt(int irq, void * dev_id);
216static void fec_enet_tx(struct net_device *dev); 216static void fec_enet_tx(struct net_device *dev);
217static void fec_enet_rx(struct net_device *dev); 217static void fec_enet_rx(struct net_device *dev);
218static int fec_enet_close(struct net_device *dev); 218static int fec_enet_close(struct net_device *dev);
219static void set_multicast_list(struct net_device *dev);
220static void fec_restart(struct net_device *dev, int duplex); 219static void fec_restart(struct net_device *dev, int duplex);
221static void fec_stop(struct net_device *dev); 220static void fec_stop(struct net_device *dev);
222static void fec_set_mac_address(struct net_device *dev);
223 221
224 222
225/* MII processing. We keep this as simple as possible. Requests are 223/* MII processing. We keep this as simple as possible. Requests are
@@ -241,19 +239,16 @@ static mii_list_t *mii_tail;
241static int mii_queue(struct net_device *dev, int request, 239static int mii_queue(struct net_device *dev, int request,
242 void (*func)(uint, struct net_device *)); 240 void (*func)(uint, struct net_device *));
243 241
244/* Make MII read/write commands for the FEC. 242/* Make MII read/write commands for the FEC */
245*/
246#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18)) 243#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
247#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \ 244#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \
248 (VAL & 0xffff)) 245 (VAL & 0xffff))
249#define mk_mii_end 0 246#define mk_mii_end 0
250 247
251/* Transmitter timeout. 248/* Transmitter timeout */
252*/ 249#define TX_TIMEOUT (2 * HZ)
253#define TX_TIMEOUT (2*HZ)
254 250
255/* Register definitions for the PHY. 251/* Register definitions for the PHY */
256*/
257 252
258#define MII_REG_CR 0 /* Control Register */ 253#define MII_REG_CR 0 /* Control Register */
259#define MII_REG_SR 1 /* Status Register */ 254#define MII_REG_SR 1 /* Status Register */
@@ -288,15 +283,11 @@ static int mii_queue(struct net_device *dev, int request,
288static int 283static int
289fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) 284fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
290{ 285{
291 struct fec_enet_private *fep; 286 struct fec_enet_private *fep = netdev_priv(dev);
292 volatile fec_t *fecp; 287 struct bufdesc *bdp;
293 volatile cbd_t *bdp;
294 unsigned short status; 288 unsigned short status;
295 unsigned long flags; 289 unsigned long flags;
296 290
297 fep = netdev_priv(dev);
298 fecp = (volatile fec_t*)dev->base_addr;
299
300 if (!fep->link) { 291 if (!fep->link) {
301 /* Link is down or autonegotiation is in progress. */ 292 /* Link is down or autonegotiation is in progress. */
302 return 1; 293 return 1;
@@ -307,7 +298,7 @@ fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
307 bdp = fep->cur_tx; 298 bdp = fep->cur_tx;
308 299
309 status = bdp->cbd_sc; 300 status = bdp->cbd_sc;
310#ifndef final_version 301
311 if (status & BD_ENET_TX_READY) { 302 if (status & BD_ENET_TX_READY) {
312 /* Ooops. All transmit buffers are full. Bail out. 303 /* Ooops. All transmit buffers are full. Bail out.
313 * This should not happen, since dev->tbusy should be set. 304 * This should not happen, since dev->tbusy should be set.
@@ -316,21 +307,18 @@ fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
316 spin_unlock_irqrestore(&fep->hw_lock, flags); 307 spin_unlock_irqrestore(&fep->hw_lock, flags);
317 return 1; 308 return 1;
318 } 309 }
319#endif
320 310
321 /* Clear all of the status flags. 311 /* Clear all of the status flags */
322 */
323 status &= ~BD_ENET_TX_STATS; 312 status &= ~BD_ENET_TX_STATS;
324 313
325 /* Set buffer length and buffer pointer. 314 /* Set buffer length and buffer pointer */
326 */
327 bdp->cbd_bufaddr = __pa(skb->data); 315 bdp->cbd_bufaddr = __pa(skb->data);
328 bdp->cbd_datlen = skb->len; 316 bdp->cbd_datlen = skb->len;
329 317
330 /* 318 /*
331 * On some FEC implementations data must be aligned on 319 * On some FEC implementations data must be aligned on
332 * 4-byte boundaries. Use bounce buffers to copy data 320 * 4-byte boundaries. Use bounce buffers to copy data
333 * and get it aligned. Ugh. 321 * and get it aligned. Ugh.
334 */ 322 */
335 if (bdp->cbd_bufaddr & FEC_ALIGNMENT) { 323 if (bdp->cbd_bufaddr & FEC_ALIGNMENT) {
336 unsigned int index; 324 unsigned int index;
@@ -339,8 +327,7 @@ fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
339 bdp->cbd_bufaddr = __pa(fep->tx_bounce[index]); 327 bdp->cbd_bufaddr = __pa(fep->tx_bounce[index]);
340 } 328 }
341 329
342 /* Save skb pointer. 330 /* Save skb pointer */
343 */
344 fep->tx_skbuff[fep->skb_cur] = skb; 331 fep->tx_skbuff[fep->skb_cur] = skb;
345 332
346 dev->stats.tx_bytes += skb->len; 333 dev->stats.tx_bytes += skb->len;
@@ -349,13 +336,12 @@ fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
349 /* Push the data cache so the CPM does not get stale memory 336 /* Push the data cache so the CPM does not get stale memory
350 * data. 337 * data.
351 */ 338 */
352 dma_sync_single(NULL, bdp->cbd_bufaddr, 339 bdp->cbd_bufaddr = dma_map_single(&dev->dev, skb->data,
353 bdp->cbd_datlen, DMA_TO_DEVICE); 340 FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
354 341
355 /* Send it on its way. Tell FEC it's ready, interrupt when done, 342 /* Send it on its way. Tell FEC it's ready, interrupt when done,
356 * it's the last BD of the frame, and to put the CRC on the end. 343 * it's the last BD of the frame, and to put the CRC on the end.
357 */ 344 */
358
359 status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR 345 status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR
360 | BD_ENET_TX_LAST | BD_ENET_TX_TC); 346 | BD_ENET_TX_LAST | BD_ENET_TX_TC);
361 bdp->cbd_sc = status; 347 bdp->cbd_sc = status;
@@ -363,22 +349,20 @@ fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
363 dev->trans_start = jiffies; 349 dev->trans_start = jiffies;
364 350
365 /* Trigger transmission start */ 351 /* Trigger transmission start */
366 fecp->fec_x_des_active = 0; 352 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
367 353
368 /* If this was the last BD in the ring, start at the beginning again. 354 /* If this was the last BD in the ring, start at the beginning again. */
369 */ 355 if (status & BD_ENET_TX_WRAP)
370 if (status & BD_ENET_TX_WRAP) {
371 bdp = fep->tx_bd_base; 356 bdp = fep->tx_bd_base;
372 } else { 357 else
373 bdp++; 358 bdp++;
374 }
375 359
376 if (bdp == fep->dirty_tx) { 360 if (bdp == fep->dirty_tx) {
377 fep->tx_full = 1; 361 fep->tx_full = 1;
378 netif_stop_queue(dev); 362 netif_stop_queue(dev);
379 } 363 }
380 364
381 fep->cur_tx = (cbd_t *)bdp; 365 fep->cur_tx = bdp;
382 366
383 spin_unlock_irqrestore(&fep->hw_lock, flags); 367 spin_unlock_irqrestore(&fep->hw_lock, flags);
384 368
@@ -390,75 +374,33 @@ fec_timeout(struct net_device *dev)
390{ 374{
391 struct fec_enet_private *fep = netdev_priv(dev); 375 struct fec_enet_private *fep = netdev_priv(dev);
392 376
393 printk("%s: transmit timed out.\n", dev->name);
394 dev->stats.tx_errors++; 377 dev->stats.tx_errors++;
395#ifndef final_version
396 {
397 int i;
398 cbd_t *bdp;
399
400 printk("Ring data dump: cur_tx %lx%s, dirty_tx %lx cur_rx: %lx\n",
401 (unsigned long)fep->cur_tx, fep->tx_full ? " (full)" : "",
402 (unsigned long)fep->dirty_tx,
403 (unsigned long)fep->cur_rx);
404
405 bdp = fep->tx_bd_base;
406 printk(" tx: %u buffers\n", TX_RING_SIZE);
407 for (i = 0 ; i < TX_RING_SIZE; i++) {
408 printk(" %08x: %04x %04x %08x\n",
409 (uint) bdp,
410 bdp->cbd_sc,
411 bdp->cbd_datlen,
412 (int) bdp->cbd_bufaddr);
413 bdp++;
414 }
415 378
416 bdp = fep->rx_bd_base;
417 printk(" rx: %lu buffers\n", (unsigned long) RX_RING_SIZE);
418 for (i = 0 ; i < RX_RING_SIZE; i++) {
419 printk(" %08x: %04x %04x %08x\n",
420 (uint) bdp,
421 bdp->cbd_sc,
422 bdp->cbd_datlen,
423 (int) bdp->cbd_bufaddr);
424 bdp++;
425 }
426 }
427#endif
428 fec_restart(dev, fep->full_duplex); 379 fec_restart(dev, fep->full_duplex);
429 netif_wake_queue(dev); 380 netif_wake_queue(dev);
430} 381}
431 382
432/* The interrupt handler.
433 * This is called from the MPC core interrupt.
434 */
435static irqreturn_t 383static irqreturn_t
436fec_enet_interrupt(int irq, void * dev_id) 384fec_enet_interrupt(int irq, void * dev_id)
437{ 385{
438 struct net_device *dev = dev_id; 386 struct net_device *dev = dev_id;
439 volatile fec_t *fecp; 387 struct fec_enet_private *fep = netdev_priv(dev);
440 uint int_events; 388 uint int_events;
441 irqreturn_t ret = IRQ_NONE; 389 irqreturn_t ret = IRQ_NONE;
442 390
443 fecp = (volatile fec_t*)dev->base_addr;
444
445 /* Get the interrupt events that caused us to be here.
446 */
447 do { 391 do {
448 int_events = fecp->fec_ievent; 392 int_events = readl(fep->hwp + FEC_IEVENT);
449 fecp->fec_ievent = int_events; 393 writel(int_events, fep->hwp + FEC_IEVENT);
450 394
451 /* Handle receive event in its own function.
452 */
453 if (int_events & FEC_ENET_RXF) { 395 if (int_events & FEC_ENET_RXF) {
454 ret = IRQ_HANDLED; 396 ret = IRQ_HANDLED;
455 fec_enet_rx(dev); 397 fec_enet_rx(dev);
456 } 398 }
457 399
458 /* Transmit OK, or non-fatal error. Update the buffer 400 /* Transmit OK, or non-fatal error. Update the buffer
459 descriptors. FEC handles all errors, we just discover 401 * descriptors. FEC handles all errors, we just discover
460 them as part of the transmit process. 402 * them as part of the transmit process.
461 */ 403 */
462 if (int_events & FEC_ENET_TXF) { 404 if (int_events & FEC_ENET_TXF) {
463 ret = IRQ_HANDLED; 405 ret = IRQ_HANDLED;
464 fec_enet_tx(dev); 406 fec_enet_tx(dev);
@@ -479,7 +421,7 @@ static void
479fec_enet_tx(struct net_device *dev) 421fec_enet_tx(struct net_device *dev)
480{ 422{
481 struct fec_enet_private *fep; 423 struct fec_enet_private *fep;
482 volatile cbd_t *bdp; 424 struct bufdesc *bdp;
483 unsigned short status; 425 unsigned short status;
484 struct sk_buff *skb; 426 struct sk_buff *skb;
485 427
@@ -488,7 +430,11 @@ fec_enet_tx(struct net_device *dev)
488 bdp = fep->dirty_tx; 430 bdp = fep->dirty_tx;
489 431
490 while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) { 432 while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
491 if (bdp == fep->cur_tx && fep->tx_full == 0) break; 433 if (bdp == fep->cur_tx && fep->tx_full == 0)
434 break;
435
436 dma_unmap_single(&dev->dev, bdp->cbd_bufaddr, FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
437 bdp->cbd_bufaddr = 0;
492 438
493 skb = fep->tx_skbuff[fep->skb_dirty]; 439 skb = fep->tx_skbuff[fep->skb_dirty];
494 /* Check for errors. */ 440 /* Check for errors. */
@@ -510,31 +456,27 @@ fec_enet_tx(struct net_device *dev)
510 dev->stats.tx_packets++; 456 dev->stats.tx_packets++;
511 } 457 }
512 458
513#ifndef final_version
514 if (status & BD_ENET_TX_READY) 459 if (status & BD_ENET_TX_READY)
515 printk("HEY! Enet xmit interrupt and TX_READY.\n"); 460 printk("HEY! Enet xmit interrupt and TX_READY.\n");
516#endif 461
517 /* Deferred means some collisions occurred during transmit, 462 /* Deferred means some collisions occurred during transmit,
518 * but we eventually sent the packet OK. 463 * but we eventually sent the packet OK.
519 */ 464 */
520 if (status & BD_ENET_TX_DEF) 465 if (status & BD_ENET_TX_DEF)
521 dev->stats.collisions++; 466 dev->stats.collisions++;
522 467
523 /* Free the sk buffer associated with this last transmit. 468 /* Free the sk buffer associated with this last transmit */
524 */
525 dev_kfree_skb_any(skb); 469 dev_kfree_skb_any(skb);
526 fep->tx_skbuff[fep->skb_dirty] = NULL; 470 fep->tx_skbuff[fep->skb_dirty] = NULL;
527 fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK; 471 fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK;
528 472
529 /* Update pointer to next buffer descriptor to be transmitted. 473 /* Update pointer to next buffer descriptor to be transmitted */
530 */
531 if (status & BD_ENET_TX_WRAP) 474 if (status & BD_ENET_TX_WRAP)
532 bdp = fep->tx_bd_base; 475 bdp = fep->tx_bd_base;
533 else 476 else
534 bdp++; 477 bdp++;
535 478
536 /* Since we have freed up a buffer, the ring is no longer 479 /* Since we have freed up a buffer, the ring is no longer full
537 * full.
538 */ 480 */
539 if (fep->tx_full) { 481 if (fep->tx_full) {
540 fep->tx_full = 0; 482 fep->tx_full = 0;
@@ -542,7 +484,7 @@ fec_enet_tx(struct net_device *dev)
542 netif_wake_queue(dev); 484 netif_wake_queue(dev);
543 } 485 }
544 } 486 }
545 fep->dirty_tx = (cbd_t *)bdp; 487 fep->dirty_tx = bdp;
546 spin_unlock_irq(&fep->hw_lock); 488 spin_unlock_irq(&fep->hw_lock);
547} 489}
548 490
@@ -555,9 +497,8 @@ fec_enet_tx(struct net_device *dev)
555static void 497static void
556fec_enet_rx(struct net_device *dev) 498fec_enet_rx(struct net_device *dev)
557{ 499{
558 struct fec_enet_private *fep; 500 struct fec_enet_private *fep = netdev_priv(dev);
559 volatile fec_t *fecp; 501 struct bufdesc *bdp;
560 volatile cbd_t *bdp;
561 unsigned short status; 502 unsigned short status;
562 struct sk_buff *skb; 503 struct sk_buff *skb;
563 ushort pkt_len; 504 ushort pkt_len;
@@ -567,9 +508,6 @@ fec_enet_rx(struct net_device *dev)
567 flush_cache_all(); 508 flush_cache_all();
568#endif 509#endif
569 510
570 fep = netdev_priv(dev);
571 fecp = (volatile fec_t*)dev->base_addr;
572
573 spin_lock_irq(&fep->hw_lock); 511 spin_lock_irq(&fep->hw_lock);
574 512
575 /* First, grab all of the stats for the incoming packet. 513 /* First, grab all of the stats for the incoming packet.
@@ -577,143 +515,121 @@ fec_enet_rx(struct net_device *dev)
577 */ 515 */
578 bdp = fep->cur_rx; 516 bdp = fep->cur_rx;
579 517
580while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) { 518 while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
581 519
582#ifndef final_version 520 /* Since we have allocated space to hold a complete frame,
583 /* Since we have allocated space to hold a complete frame, 521 * the last indicator should be set.
584 * the last indicator should be set. 522 */
585 */ 523 if ((status & BD_ENET_RX_LAST) == 0)
586 if ((status & BD_ENET_RX_LAST) == 0) 524 printk("FEC ENET: rcv is not +last\n");
587 printk("FEC ENET: rcv is not +last\n");
588#endif
589 525
590 if (!fep->opened) 526 if (!fep->opened)
591 goto rx_processing_done; 527 goto rx_processing_done;
592 528
593 /* Check for errors. */ 529 /* Check for errors. */
594 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | 530 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
595 BD_ENET_RX_CR | BD_ENET_RX_OV)) { 531 BD_ENET_RX_CR | BD_ENET_RX_OV)) {
596 dev->stats.rx_errors++; 532 dev->stats.rx_errors++;
597 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) { 533 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
598 /* Frame too long or too short. */ 534 /* Frame too long or too short. */
599 dev->stats.rx_length_errors++; 535 dev->stats.rx_length_errors++;
536 }
537 if (status & BD_ENET_RX_NO) /* Frame alignment */
538 dev->stats.rx_frame_errors++;
539 if (status & BD_ENET_RX_CR) /* CRC Error */
540 dev->stats.rx_crc_errors++;
541 if (status & BD_ENET_RX_OV) /* FIFO overrun */
542 dev->stats.rx_fifo_errors++;
600 } 543 }
601 if (status & BD_ENET_RX_NO) /* Frame alignment */ 544
545 /* Report late collisions as a frame error.
546 * On this error, the BD is closed, but we don't know what we
547 * have in the buffer. So, just drop this frame on the floor.
548 */
549 if (status & BD_ENET_RX_CL) {
550 dev->stats.rx_errors++;
602 dev->stats.rx_frame_errors++; 551 dev->stats.rx_frame_errors++;
603 if (status & BD_ENET_RX_CR) /* CRC Error */ 552 goto rx_processing_done;
604 dev->stats.rx_crc_errors++; 553 }
605 if (status & BD_ENET_RX_OV) /* FIFO overrun */
606 dev->stats.rx_fifo_errors++;
607 }
608 554
609 /* Report late collisions as a frame error. 555 /* Process the incoming frame. */
610 * On this error, the BD is closed, but we don't know what we 556 dev->stats.rx_packets++;
611 * have in the buffer. So, just drop this frame on the floor. 557 pkt_len = bdp->cbd_datlen;
612 */ 558 dev->stats.rx_bytes += pkt_len;
613 if (status & BD_ENET_RX_CL) { 559 data = (__u8*)__va(bdp->cbd_bufaddr);
614 dev->stats.rx_errors++;
615 dev->stats.rx_frame_errors++;
616 goto rx_processing_done;
617 }
618 560
619 /* Process the incoming frame. 561 dma_unmap_single(NULL, bdp->cbd_bufaddr, bdp->cbd_datlen,
620 */ 562 DMA_FROM_DEVICE);
621 dev->stats.rx_packets++;
622 pkt_len = bdp->cbd_datlen;
623 dev->stats.rx_bytes += pkt_len;
624 data = (__u8*)__va(bdp->cbd_bufaddr);
625
626 dma_sync_single(NULL, (unsigned long)__pa(data),
627 pkt_len - 4, DMA_FROM_DEVICE);
628
629 /* This does 16 byte alignment, exactly what we need.
630 * The packet length includes FCS, but we don't want to
631 * include that when passing upstream as it messes up
632 * bridging applications.
633 */
634 skb = dev_alloc_skb(pkt_len-4);
635 563
636 if (skb == NULL) { 564 /* This does 16 byte alignment, exactly what we need.
637 printk("%s: Memory squeeze, dropping packet.\n", dev->name); 565 * The packet length includes FCS, but we don't want to
638 dev->stats.rx_dropped++; 566 * include that when passing upstream as it messes up
639 } else { 567 * bridging applications.
640 skb_put(skb,pkt_len-4); /* Make room */ 568 */
641 skb_copy_to_linear_data(skb, data, pkt_len-4); 569 skb = dev_alloc_skb(pkt_len - 4 + NET_IP_ALIGN);
642 skb->protocol=eth_type_trans(skb,dev);
643 netif_rx(skb);
644 }
645 rx_processing_done:
646 570
647 /* Clear the status flags for this buffer. 571 if (unlikely(!skb)) {
648 */ 572 printk("%s: Memory squeeze, dropping packet.\n",
649 status &= ~BD_ENET_RX_STATS; 573 dev->name);
574 dev->stats.rx_dropped++;
575 } else {
576 skb_reserve(skb, NET_IP_ALIGN);
577 skb_put(skb, pkt_len - 4); /* Make room */
578 skb_copy_to_linear_data(skb, data, pkt_len - 4);
579 skb->protocol = eth_type_trans(skb, dev);
580 netif_rx(skb);
581 }
650 582
651 /* Mark the buffer empty. 583 bdp->cbd_bufaddr = dma_map_single(NULL, data, bdp->cbd_datlen,
652 */ 584 DMA_FROM_DEVICE);
653 status |= BD_ENET_RX_EMPTY; 585rx_processing_done:
654 bdp->cbd_sc = status; 586 /* Clear the status flags for this buffer */
587 status &= ~BD_ENET_RX_STATS;
655 588
656 /* Update BD pointer to next entry. 589 /* Mark the buffer empty */
657 */ 590 status |= BD_ENET_RX_EMPTY;
658 if (status & BD_ENET_RX_WRAP) 591 bdp->cbd_sc = status;
659 bdp = fep->rx_bd_base;
660 else
661 bdp++;
662 592
663#if 1 593 /* Update BD pointer to next entry */
664 /* Doing this here will keep the FEC running while we process 594 if (status & BD_ENET_RX_WRAP)
665 * incoming frames. On a heavily loaded network, we should be 595 bdp = fep->rx_bd_base;
666 * able to keep up at the expense of system resources. 596 else
667 */ 597 bdp++;
668 fecp->fec_r_des_active = 0; 598 /* Doing this here will keep the FEC running while we process
669#endif 599 * incoming frames. On a heavily loaded network, we should be
670 } /* while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) */ 600 * able to keep up at the expense of system resources.
671 fep->cur_rx = (cbd_t *)bdp; 601 */
672 602 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
673#if 0 603 }
674 /* Doing this here will allow us to process all frames in the 604 fep->cur_rx = bdp;
675 * ring before the FEC is allowed to put more there. On a heavily
676 * loaded network, some frames may be lost. Unfortunately, this
677 * increases the interrupt overhead since we can potentially work
678 * our way back to the interrupt return only to come right back
679 * here.
680 */
681 fecp->fec_r_des_active = 0;
682#endif
683 605
684 spin_unlock_irq(&fep->hw_lock); 606 spin_unlock_irq(&fep->hw_lock);
685} 607}
686 608
687
688/* called from interrupt context */ 609/* called from interrupt context */
689static void 610static void
690fec_enet_mii(struct net_device *dev) 611fec_enet_mii(struct net_device *dev)
691{ 612{
692 struct fec_enet_private *fep; 613 struct fec_enet_private *fep;
693 volatile fec_t *ep;
694 mii_list_t *mip; 614 mii_list_t *mip;
695 uint mii_reg;
696 615
697 fep = netdev_priv(dev); 616 fep = netdev_priv(dev);
698 spin_lock_irq(&fep->mii_lock); 617 spin_lock_irq(&fep->mii_lock);
699 618
700 ep = fep->hwp;
701 mii_reg = ep->fec_mii_data;
702
703 if ((mip = mii_head) == NULL) { 619 if ((mip = mii_head) == NULL) {
704 printk("MII and no head!\n"); 620 printk("MII and no head!\n");
705 goto unlock; 621 goto unlock;
706 } 622 }
707 623
708 if (mip->mii_func != NULL) 624 if (mip->mii_func != NULL)
709 (*(mip->mii_func))(mii_reg, dev); 625 (*(mip->mii_func))(readl(fep->hwp + FEC_MII_DATA), dev);
710 626
711 mii_head = mip->mii_next; 627 mii_head = mip->mii_next;
712 mip->mii_next = mii_free; 628 mip->mii_next = mii_free;
713 mii_free = mip; 629 mii_free = mip;
714 630
715 if ((mip = mii_head) != NULL) 631 if ((mip = mii_head) != NULL)
716 ep->fec_mii_data = mip->mii_regval; 632 writel(mip->mii_regval, fep->hwp + FEC_MII_DATA);
717 633
718unlock: 634unlock:
719 spin_unlock_irq(&fep->mii_lock); 635 spin_unlock_irq(&fep->mii_lock);
@@ -727,8 +643,7 @@ mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_devi
727 mii_list_t *mip; 643 mii_list_t *mip;
728 int retval; 644 int retval;
729 645
730 /* Add PHY address to register command. 646 /* Add PHY address to register command */
731 */
732 fep = netdev_priv(dev); 647 fep = netdev_priv(dev);
733 spin_lock_irqsave(&fep->mii_lock, flags); 648 spin_lock_irqsave(&fep->mii_lock, flags);
734 649
@@ -745,7 +660,7 @@ mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_devi
745 mii_tail = mip; 660 mii_tail = mip;
746 } else { 661 } else {
747 mii_head = mii_tail = mip; 662 mii_head = mii_tail = mip;
748 fep->hwp->fec_mii_data = regval; 663 writel(regval, fep->hwp + FEC_MII_DATA);
749 } 664 }
750 } else { 665 } else {
751 retval = 1; 666 retval = 1;
@@ -1246,11 +1161,8 @@ static void __inline__ fec_phy_ack_intr(void)
1246static void __inline__ fec_get_mac(struct net_device *dev) 1161static void __inline__ fec_get_mac(struct net_device *dev)
1247{ 1162{
1248 struct fec_enet_private *fep = netdev_priv(dev); 1163 struct fec_enet_private *fep = netdev_priv(dev);
1249 volatile fec_t *fecp;
1250 unsigned char *iap, tmpaddr[ETH_ALEN]; 1164 unsigned char *iap, tmpaddr[ETH_ALEN];
1251 1165
1252 fecp = fep->hwp;
1253
1254 if (FEC_FLASHMAC) { 1166 if (FEC_FLASHMAC) {
1255 /* 1167 /*
1256 * Get MAC address from FLASH. 1168 * Get MAC address from FLASH.
@@ -1264,8 +1176,8 @@ static void __inline__ fec_get_mac(struct net_device *dev)
1264 (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff)) 1176 (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff))
1265 iap = fec_mac_default; 1177 iap = fec_mac_default;
1266 } else { 1178 } else {
1267 *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low; 1179 *((unsigned long *) &tmpaddr[0]) = readl(fep->hwp + FEC_ADDR_LOW);
1268 *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16); 1180 *((unsigned short *) &tmpaddr[4]) = (readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
1269 iap = &tmpaddr[0]; 1181 iap = &tmpaddr[0];
1270 } 1182 }
1271 1183
@@ -1375,11 +1287,6 @@ static void mii_relink(struct work_struct *work)
1375 fec_restart(dev, duplex); 1287 fec_restart(dev, duplex);
1376 } else 1288 } else
1377 fec_stop(dev); 1289 fec_stop(dev);
1378
1379#if 0
1380 enable_irq(fep->mii_irq);
1381#endif
1382
1383} 1290}
1384 1291
1385/* mii_queue_relink is called in interrupt context from mii_link_interrupt */ 1292/* mii_queue_relink is called in interrupt context from mii_link_interrupt */
@@ -1388,12 +1295,12 @@ static void mii_queue_relink(uint mii_reg, struct net_device *dev)
1388 struct fec_enet_private *fep = netdev_priv(dev); 1295 struct fec_enet_private *fep = netdev_priv(dev);
1389 1296
1390 /* 1297 /*
1391 ** We cannot queue phy_task twice in the workqueue. It 1298 * We cannot queue phy_task twice in the workqueue. It
1392 ** would cause an endless loop in the workqueue. 1299 * would cause an endless loop in the workqueue.
1393 ** Fortunately, if the last mii_relink entry has not yet been 1300 * Fortunately, if the last mii_relink entry has not yet been
1394 ** executed now, it will do the job for the current interrupt, 1301 * executed now, it will do the job for the current interrupt,
1395 ** which is just what we want. 1302 * which is just what we want.
1396 */ 1303 */
1397 if (fep->mii_phy_task_queued) 1304 if (fep->mii_phy_task_queued)
1398 return; 1305 return;
1399 1306
@@ -1424,8 +1331,7 @@ phy_cmd_t const phy_cmd_config[] = {
1424 { mk_mii_end, } 1331 { mk_mii_end, }
1425 }; 1332 };
1426 1333
1427/* Read remainder of PHY ID. 1334/* Read remainder of PHY ID. */
1428*/
1429static void 1335static void
1430mii_discover_phy3(uint mii_reg, struct net_device *dev) 1336mii_discover_phy3(uint mii_reg, struct net_device *dev)
1431{ 1337{
@@ -1457,17 +1363,14 @@ static void
1457mii_discover_phy(uint mii_reg, struct net_device *dev) 1363mii_discover_phy(uint mii_reg, struct net_device *dev)
1458{ 1364{
1459 struct fec_enet_private *fep; 1365 struct fec_enet_private *fep;
1460 volatile fec_t *fecp;
1461 uint phytype; 1366 uint phytype;
1462 1367
1463 fep = netdev_priv(dev); 1368 fep = netdev_priv(dev);
1464 fecp = fep->hwp;
1465 1369
1466 if (fep->phy_addr < 32) { 1370 if (fep->phy_addr < 32) {
1467 if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) { 1371 if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) {
1468 1372
1469 /* Got first part of ID, now get remainder. 1373 /* Got first part of ID, now get remainder */
1470 */
1471 fep->phy_id = phytype << 16; 1374 fep->phy_id = phytype << 16;
1472 mii_queue(dev, mk_mii_read(MII_REG_PHYIR2), 1375 mii_queue(dev, mk_mii_read(MII_REG_PHYIR2),
1473 mii_discover_phy3); 1376 mii_discover_phy3);
@@ -1479,15 +1382,15 @@ mii_discover_phy(uint mii_reg, struct net_device *dev)
1479 } else { 1382 } else {
1480 printk("FEC: No PHY device found.\n"); 1383 printk("FEC: No PHY device found.\n");
1481 /* Disable external MII interface */ 1384 /* Disable external MII interface */
1482 fecp->fec_mii_speed = fep->phy_speed = 0; 1385 writel(0, fep->hwp + FEC_MII_SPEED);
1386 fep->phy_speed = 0;
1483#ifdef HAVE_mii_link_interrupt 1387#ifdef HAVE_mii_link_interrupt
1484 fec_disable_phy_intr(); 1388 fec_disable_phy_intr();
1485#endif 1389#endif
1486 } 1390 }
1487} 1391}
1488 1392
1489/* This interrupt occurs when the PHY detects a link change. 1393/* This interrupt occurs when the PHY detects a link change */
1490*/
1491#ifdef HAVE_mii_link_interrupt 1394#ifdef HAVE_mii_link_interrupt
1492static irqreturn_t 1395static irqreturn_t
1493mii_link_interrupt(int irq, void * dev_id) 1396mii_link_interrupt(int irq, void * dev_id)
@@ -1497,10 +1400,6 @@ mii_link_interrupt(int irq, void * dev_id)
1497 1400
1498 fec_phy_ack_intr(); 1401 fec_phy_ack_intr();
1499 1402
1500#if 0
1501 disable_irq(fep->mii_irq); /* disable now, enable later */
1502#endif
1503
1504 mii_do_cmd(dev, fep->phy->ack_int); 1403 mii_do_cmd(dev, fep->phy->ack_int);
1505 mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */ 1404 mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */
1506 1405
@@ -1508,19 +1407,91 @@ mii_link_interrupt(int irq, void * dev_id)
1508} 1407}
1509#endif 1408#endif
1510 1409
1410static void fec_enet_free_buffers(struct net_device *dev)
1411{
1412 struct fec_enet_private *fep = netdev_priv(dev);
1413 int i;
1414 struct sk_buff *skb;
1415 struct bufdesc *bdp;
1416
1417 bdp = fep->rx_bd_base;
1418 for (i = 0; i < RX_RING_SIZE; i++) {
1419 skb = fep->rx_skbuff[i];
1420
1421 if (bdp->cbd_bufaddr)
1422 dma_unmap_single(&dev->dev, bdp->cbd_bufaddr,
1423 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1424 if (skb)
1425 dev_kfree_skb(skb);
1426 bdp++;
1427 }
1428
1429 bdp = fep->tx_bd_base;
1430 for (i = 0; i < TX_RING_SIZE; i++)
1431 kfree(fep->tx_bounce[i]);
1432}
1433
1434static int fec_enet_alloc_buffers(struct net_device *dev)
1435{
1436 struct fec_enet_private *fep = netdev_priv(dev);
1437 int i;
1438 struct sk_buff *skb;
1439 struct bufdesc *bdp;
1440
1441 bdp = fep->rx_bd_base;
1442 for (i = 0; i < RX_RING_SIZE; i++) {
1443 skb = dev_alloc_skb(FEC_ENET_RX_FRSIZE);
1444 if (!skb) {
1445 fec_enet_free_buffers(dev);
1446 return -ENOMEM;
1447 }
1448 fep->rx_skbuff[i] = skb;
1449
1450 bdp->cbd_bufaddr = dma_map_single(&dev->dev, skb->data,
1451 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1452 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1453 bdp++;
1454 }
1455
1456 /* Set the last buffer to wrap. */
1457 bdp--;
1458 bdp->cbd_sc |= BD_SC_WRAP;
1459
1460 bdp = fep->tx_bd_base;
1461 for (i = 0; i < TX_RING_SIZE; i++) {
1462 fep->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL);
1463
1464 bdp->cbd_sc = 0;
1465 bdp->cbd_bufaddr = 0;
1466 bdp++;
1467 }
1468
1469 /* Set the last buffer to wrap. */
1470 bdp--;
1471 bdp->cbd_sc |= BD_SC_WRAP;
1472
1473 return 0;
1474}
1475
1511static int 1476static int
1512fec_enet_open(struct net_device *dev) 1477fec_enet_open(struct net_device *dev)
1513{ 1478{
1514 struct fec_enet_private *fep = netdev_priv(dev); 1479 struct fec_enet_private *fep = netdev_priv(dev);
1480 int ret;
1515 1481
1516 /* I should reset the ring buffers here, but I don't yet know 1482 /* I should reset the ring buffers here, but I don't yet know
1517 * a simple way to do that. 1483 * a simple way to do that.
1518 */ 1484 */
1519 fec_set_mac_address(dev); 1485
1486 ret = fec_enet_alloc_buffers(dev);
1487 if (ret)
1488 return ret;
1520 1489
1521 fep->sequence_done = 0; 1490 fep->sequence_done = 0;
1522 fep->link = 0; 1491 fep->link = 0;
1523 1492
1493 fec_restart(dev, 1);
1494
1524 if (fep->phy) { 1495 if (fep->phy) {
1525 mii_do_cmd(dev, fep->phy->ack_int); 1496 mii_do_cmd(dev, fep->phy->ack_int);
1526 mii_do_cmd(dev, fep->phy->config); 1497 mii_do_cmd(dev, fep->phy->config);
@@ -1537,21 +1508,17 @@ fec_enet_open(struct net_device *dev)
1537 schedule(); 1508 schedule();
1538 1509
1539 mii_do_cmd(dev, fep->phy->startup); 1510 mii_do_cmd(dev, fep->phy->startup);
1540
1541 /* Set the initial link state to true. A lot of hardware
1542 * based on this device does not implement a PHY interrupt,
1543 * so we are never notified of link change.
1544 */
1545 fep->link = 1;
1546 } else {
1547 fep->link = 1; /* lets just try it and see */
1548 /* no phy, go full duplex, it's most likely a hub chip */
1549 fec_restart(dev, 1);
1550 } 1511 }
1551 1512
1513 /* Set the initial link state to true. A lot of hardware
1514 * based on this device does not implement a PHY interrupt,
1515 * so we are never notified of link change.
1516 */
1517 fep->link = 1;
1518
1552 netif_start_queue(dev); 1519 netif_start_queue(dev);
1553 fep->opened = 1; 1520 fep->opened = 1;
1554 return 0; /* Success */ 1521 return 0;
1555} 1522}
1556 1523
1557static int 1524static int
@@ -1559,12 +1526,13 @@ fec_enet_close(struct net_device *dev)
1559{ 1526{
1560 struct fec_enet_private *fep = netdev_priv(dev); 1527 struct fec_enet_private *fep = netdev_priv(dev);
1561 1528
1562 /* Don't know what to do yet. 1529 /* Don't know what to do yet. */
1563 */
1564 fep->opened = 0; 1530 fep->opened = 0;
1565 netif_stop_queue(dev); 1531 netif_stop_queue(dev);
1566 fec_stop(dev); 1532 fec_stop(dev);
1567 1533
1534 fec_enet_free_buffers(dev);
1535
1568 return 0; 1536 return 0;
1569} 1537}
1570 1538
@@ -1583,87 +1551,102 @@ fec_enet_close(struct net_device *dev)
1583 1551
1584static void set_multicast_list(struct net_device *dev) 1552static void set_multicast_list(struct net_device *dev)
1585{ 1553{
1586 struct fec_enet_private *fep; 1554 struct fec_enet_private *fep = netdev_priv(dev);
1587 volatile fec_t *ep;
1588 struct dev_mc_list *dmi; 1555 struct dev_mc_list *dmi;
1589 unsigned int i, j, bit, data, crc; 1556 unsigned int i, j, bit, data, crc, tmp;
1590 unsigned char hash; 1557 unsigned char hash;
1591 1558
1592 fep = netdev_priv(dev); 1559 if (dev->flags & IFF_PROMISC) {
1593 ep = fep->hwp; 1560 tmp = readl(fep->hwp + FEC_R_CNTRL);
1561 tmp |= 0x8;
1562 writel(tmp, fep->hwp + FEC_R_CNTRL);
1563 return;
1564 }
1594 1565
1595 if (dev->flags&IFF_PROMISC) { 1566 tmp = readl(fep->hwp + FEC_R_CNTRL);
1596 ep->fec_r_cntrl |= 0x0008; 1567 tmp &= ~0x8;
1597 } else { 1568 writel(tmp, fep->hwp + FEC_R_CNTRL);
1569
1570 if (dev->flags & IFF_ALLMULTI) {
1571 /* Catch all multicast addresses, so set the
1572 * filter to all 1's
1573 */
1574 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1575 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1598 1576
1599 ep->fec_r_cntrl &= ~0x0008; 1577 return;
1578 }
1600 1579
1601 if (dev->flags & IFF_ALLMULTI) { 1580 /* Clear filter and add the addresses in hash register
1602 /* Catch all multicast addresses, so set the 1581 */
1603 * filter to all 1's. 1582 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1604 */ 1583 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1605 ep->fec_grp_hash_table_high = 0xffffffff; 1584
1606 ep->fec_grp_hash_table_low = 0xffffffff; 1585 dmi = dev->mc_list;
1607 } else { 1586
1608 /* Clear filter and add the addresses in hash register. 1587 for (j = 0; j < dev->mc_count; j++, dmi = dmi->next) {
1609 */ 1588 /* Only support group multicast for now */
1610 ep->fec_grp_hash_table_high = 0; 1589 if (!(dmi->dmi_addr[0] & 1))
1611 ep->fec_grp_hash_table_low = 0; 1590 continue;
1612 1591
1613 dmi = dev->mc_list; 1592 /* calculate crc32 value of mac address */
1614 1593 crc = 0xffffffff;
1615 for (j = 0; j < dev->mc_count; j++, dmi = dmi->next) 1594
1616 { 1595 for (i = 0; i < dmi->dmi_addrlen; i++) {
1617 /* Only support group multicast for now. 1596 data = dmi->dmi_addr[i];
1618 */ 1597 for (bit = 0; bit < 8; bit++, data >>= 1) {
1619 if (!(dmi->dmi_addr[0] & 1)) 1598 crc = (crc >> 1) ^
1620 continue; 1599 (((crc ^ data) & 1) ? CRC32_POLY : 0);
1621
1622 /* calculate crc32 value of mac address
1623 */
1624 crc = 0xffffffff;
1625
1626 for (i = 0; i < dmi->dmi_addrlen; i++)
1627 {
1628 data = dmi->dmi_addr[i];
1629 for (bit = 0; bit < 8; bit++, data >>= 1)
1630 {
1631 crc = (crc >> 1) ^
1632 (((crc ^ data) & 1) ? CRC32_POLY : 0);
1633 }
1634 }
1635
1636 /* only upper 6 bits (HASH_BITS) are used
1637 which point to specific bit in he hash registers
1638 */
1639 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
1640
1641 if (hash > 31)
1642 ep->fec_grp_hash_table_high |= 1 << (hash - 32);
1643 else
1644 ep->fec_grp_hash_table_low |= 1 << hash;
1645 } 1600 }
1646 } 1601 }
1602
1603 /* only upper 6 bits (HASH_BITS) are used
1604 * which point to specific bit in he hash registers
1605 */
1606 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
1607
1608 if (hash > 31) {
1609 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1610 tmp |= 1 << (hash - 32);
1611 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1612 } else {
1613 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1614 tmp |= 1 << hash;
1615 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1616 }
1647 } 1617 }
1648} 1618}
1649 1619
1650/* Set a MAC change in hardware. 1620/* Set a MAC change in hardware. */
1651 */ 1621static int
1652static void 1622fec_set_mac_address(struct net_device *dev, void *p)
1653fec_set_mac_address(struct net_device *dev)
1654{ 1623{
1655 volatile fec_t *fecp; 1624 struct fec_enet_private *fep = netdev_priv(dev);
1625 struct sockaddr *addr = p;
1656 1626
1657 fecp = ((struct fec_enet_private *)netdev_priv(dev))->hwp; 1627 if (!is_valid_ether_addr(addr->sa_data))
1628 return -EADDRNOTAVAIL;
1658 1629
1659 /* Set station address. */ 1630 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1660 fecp->fec_addr_low = dev->dev_addr[3] | (dev->dev_addr[2] << 8) |
1661 (dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24);
1662 fecp->fec_addr_high = (dev->dev_addr[5] << 16) |
1663 (dev->dev_addr[4] << 24);
1664 1631
1632 writel(dev->dev_addr[3] | (dev->dev_addr[2] << 8) |
1633 (dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24),
1634 fep->hwp + FEC_ADDR_LOW);
1635 writel((dev->dev_addr[5] << 16) | (dev->dev_addr[4] << 24),
1636 fep + FEC_ADDR_HIGH);
1637 return 0;
1665} 1638}
1666 1639
1640static const struct net_device_ops fec_netdev_ops = {
1641 .ndo_open = fec_enet_open,
1642 .ndo_stop = fec_enet_close,
1643 .ndo_start_xmit = fec_enet_start_xmit,
1644 .ndo_set_multicast_list = set_multicast_list,
1645 .ndo_validate_addr = eth_validate_addr,
1646 .ndo_tx_timeout = fec_timeout,
1647 .ndo_set_mac_address = fec_set_mac_address,
1648};
1649
1667 /* 1650 /*
1668 * XXX: We need to clean up on failure exits here. 1651 * XXX: We need to clean up on failure exits here.
1669 * 1652 *
@@ -1672,17 +1655,13 @@ fec_set_mac_address(struct net_device *dev)
1672int __init fec_enet_init(struct net_device *dev, int index) 1655int __init fec_enet_init(struct net_device *dev, int index)
1673{ 1656{
1674 struct fec_enet_private *fep = netdev_priv(dev); 1657 struct fec_enet_private *fep = netdev_priv(dev);
1675 unsigned long mem_addr; 1658 struct bufdesc *cbd_base;
1676 volatile cbd_t *bdp; 1659 int i;
1677 cbd_t *cbd_base;
1678 volatile fec_t *fecp;
1679 int i, j;
1680 1660
1681 /* Allocate memory for buffer descriptors. 1661 /* Allocate memory for buffer descriptors. */
1682 */ 1662 cbd_base = dma_alloc_coherent(NULL, PAGE_SIZE, &fep->bd_dma,
1683 mem_addr = (unsigned long)dma_alloc_coherent(NULL, PAGE_SIZE, 1663 GFP_KERNEL);
1684 &fep->bd_dma, GFP_KERNEL); 1664 if (!cbd_base) {
1685 if (mem_addr == 0) {
1686 printk("FEC: allocate descriptor memory failed?\n"); 1665 printk("FEC: allocate descriptor memory failed?\n");
1687 return -ENOMEM; 1666 return -ENOMEM;
1688 } 1667 }
@@ -1690,146 +1669,47 @@ int __init fec_enet_init(struct net_device *dev, int index)
1690 spin_lock_init(&fep->hw_lock); 1669 spin_lock_init(&fep->hw_lock);
1691 spin_lock_init(&fep->mii_lock); 1670 spin_lock_init(&fep->mii_lock);
1692 1671
1693 /* Create an Ethernet device instance.
1694 */
1695 fecp = (volatile fec_t *)dev->base_addr;
1696
1697 fep->index = index; 1672 fep->index = index;
1698 fep->hwp = fecp; 1673 fep->hwp = (void __iomem *)dev->base_addr;
1699 fep->netdev = dev; 1674 fep->netdev = dev;
1700 1675
1701 /* Whack a reset. We should wait for this.
1702 */
1703 fecp->fec_ecntrl = 1;
1704 udelay(10);
1705
1706 /* Set the Ethernet address */ 1676 /* Set the Ethernet address */
1707#ifdef CONFIG_M5272 1677#ifdef CONFIG_M5272
1708 fec_get_mac(dev); 1678 fec_get_mac(dev);
1709#else 1679#else
1710 { 1680 {
1711 unsigned long l; 1681 unsigned long l;
1712 l = fecp->fec_addr_low; 1682 l = readl(fep->hwp + FEC_ADDR_LOW);
1713 dev->dev_addr[0] = (unsigned char)((l & 0xFF000000) >> 24); 1683 dev->dev_addr[0] = (unsigned char)((l & 0xFF000000) >> 24);
1714 dev->dev_addr[1] = (unsigned char)((l & 0x00FF0000) >> 16); 1684 dev->dev_addr[1] = (unsigned char)((l & 0x00FF0000) >> 16);
1715 dev->dev_addr[2] = (unsigned char)((l & 0x0000FF00) >> 8); 1685 dev->dev_addr[2] = (unsigned char)((l & 0x0000FF00) >> 8);
1716 dev->dev_addr[3] = (unsigned char)((l & 0x000000FF) >> 0); 1686 dev->dev_addr[3] = (unsigned char)((l & 0x000000FF) >> 0);
1717 l = fecp->fec_addr_high; 1687 l = readl(fep->hwp + FEC_ADDR_HIGH);
1718 dev->dev_addr[4] = (unsigned char)((l & 0xFF000000) >> 24); 1688 dev->dev_addr[4] = (unsigned char)((l & 0xFF000000) >> 24);
1719 dev->dev_addr[5] = (unsigned char)((l & 0x00FF0000) >> 16); 1689 dev->dev_addr[5] = (unsigned char)((l & 0x00FF0000) >> 16);
1720 } 1690 }
1721#endif 1691#endif
1722 1692
1723 cbd_base = (cbd_t *)mem_addr; 1693 /* Set receive and transmit descriptor base. */
1724
1725 /* Set receive and transmit descriptor base.
1726 */
1727 fep->rx_bd_base = cbd_base; 1694 fep->rx_bd_base = cbd_base;
1728 fep->tx_bd_base = cbd_base + RX_RING_SIZE; 1695 fep->tx_bd_base = cbd_base + RX_RING_SIZE;
1729 1696
1730 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
1731 fep->cur_rx = fep->rx_bd_base;
1732
1733 fep->skb_cur = fep->skb_dirty = 0;
1734
1735 /* Initialize the receive buffer descriptors.
1736 */
1737 bdp = fep->rx_bd_base;
1738 for (i=0; i<FEC_ENET_RX_PAGES; i++) {
1739
1740 /* Allocate a page.
1741 */
1742 mem_addr = __get_free_page(GFP_KERNEL);
1743 /* XXX: missing check for allocation failure */
1744
1745 /* Initialize the BD for every fragment in the page.
1746 */
1747 for (j=0; j<FEC_ENET_RX_FRPPG; j++) {
1748 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1749 bdp->cbd_bufaddr = __pa(mem_addr);
1750 mem_addr += FEC_ENET_RX_FRSIZE;
1751 bdp++;
1752 }
1753 }
1754
1755 /* Set the last buffer to wrap.
1756 */
1757 bdp--;
1758 bdp->cbd_sc |= BD_SC_WRAP;
1759
1760 /* ...and the same for transmmit.
1761 */
1762 bdp = fep->tx_bd_base;
1763 for (i=0, j=FEC_ENET_TX_FRPPG; i<TX_RING_SIZE; i++) {
1764 if (j >= FEC_ENET_TX_FRPPG) {
1765 mem_addr = __get_free_page(GFP_KERNEL);
1766 j = 1;
1767 } else {
1768 mem_addr += FEC_ENET_TX_FRSIZE;
1769 j++;
1770 }
1771 fep->tx_bounce[i] = (unsigned char *) mem_addr;
1772
1773 /* Initialize the BD for every fragment in the page.
1774 */
1775 bdp->cbd_sc = 0;
1776 bdp->cbd_bufaddr = 0;
1777 bdp++;
1778 }
1779
1780 /* Set the last buffer to wrap.
1781 */
1782 bdp--;
1783 bdp->cbd_sc |= BD_SC_WRAP;
1784
1785 /* Set receive and transmit descriptor base.
1786 */
1787 fecp->fec_r_des_start = fep->bd_dma;
1788 fecp->fec_x_des_start = (unsigned long)fep->bd_dma + sizeof(cbd_t)
1789 * RX_RING_SIZE;
1790
1791#ifdef HAVE_mii_link_interrupt 1697#ifdef HAVE_mii_link_interrupt
1792 fec_request_mii_intr(dev); 1698 fec_request_mii_intr(dev);
1793#endif 1699#endif
1794 1700 /* The FEC Ethernet specific entries in the device structure */
1795 fecp->fec_grp_hash_table_high = 0;
1796 fecp->fec_grp_hash_table_low = 0;
1797 fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;
1798 fecp->fec_ecntrl = 2;
1799 fecp->fec_r_des_active = 0;
1800#ifndef CONFIG_M5272
1801 fecp->fec_hash_table_high = 0;
1802 fecp->fec_hash_table_low = 0;
1803#endif
1804
1805 /* The FEC Ethernet specific entries in the device structure. */
1806 dev->open = fec_enet_open;
1807 dev->hard_start_xmit = fec_enet_start_xmit;
1808 dev->tx_timeout = fec_timeout;
1809 dev->watchdog_timeo = TX_TIMEOUT; 1701 dev->watchdog_timeo = TX_TIMEOUT;
1810 dev->stop = fec_enet_close; 1702 dev->netdev_ops = &fec_netdev_ops;
1811 dev->set_multicast_list = set_multicast_list;
1812 1703
1813 for (i=0; i<NMII-1; i++) 1704 for (i=0; i<NMII-1; i++)
1814 mii_cmds[i].mii_next = &mii_cmds[i+1]; 1705 mii_cmds[i].mii_next = &mii_cmds[i+1];
1815 mii_free = mii_cmds; 1706 mii_free = mii_cmds;
1816 1707
1817 /* setup MII interface */ 1708 /* Set MII speed to 2.5 MHz */
1818 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;
1819 fecp->fec_x_cntrl = 0x00;
1820
1821 /*
1822 * Set MII speed to 2.5 MHz
1823 */
1824 fep->phy_speed = ((((clk_get_rate(fep->clk) / 2 + 4999999) 1709 fep->phy_speed = ((((clk_get_rate(fep->clk) / 2 + 4999999)
1825 / 2500000) / 2) & 0x3F) << 1; 1710 / 2500000) / 2) & 0x3F) << 1;
1826 fecp->fec_mii_speed = fep->phy_speed;
1827 fec_restart(dev, 0); 1711 fec_restart(dev, 0);
1828 1712
1829 /* Clear and enable interrupts */
1830 fecp->fec_ievent = 0xffc00000;
1831 fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII);
1832
1833 /* Queue up command to detect the PHY and initialize the 1713 /* Queue up command to detect the PHY and initialize the
1834 * remainder of the interface. 1714 * remainder of the interface.
1835 */ 1715 */
@@ -1847,145 +1727,118 @@ int __init fec_enet_init(struct net_device *dev, int index)
1847static void 1727static void
1848fec_restart(struct net_device *dev, int duplex) 1728fec_restart(struct net_device *dev, int duplex)
1849{ 1729{
1850 struct fec_enet_private *fep; 1730 struct fec_enet_private *fep = netdev_priv(dev);
1851 volatile cbd_t *bdp; 1731 struct bufdesc *bdp;
1852 volatile fec_t *fecp;
1853 int i; 1732 int i;
1854 1733
1855 fep = netdev_priv(dev); 1734 /* Whack a reset. We should wait for this. */
1856 fecp = fep->hwp; 1735 writel(1, fep->hwp + FEC_ECNTRL);
1857
1858 /* Whack a reset. We should wait for this.
1859 */
1860 fecp->fec_ecntrl = 1;
1861 udelay(10); 1736 udelay(10);
1862 1737
1863 /* Clear any outstanding interrupt. 1738 /* Clear any outstanding interrupt. */
1864 */ 1739 writel(0xffc00000, fep->hwp + FEC_IEVENT);
1865 fecp->fec_ievent = 0xffc00000;
1866 1740
1867 /* Set station address. 1741 /* Reset all multicast. */
1868 */ 1742 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1869 fec_set_mac_address(dev); 1743 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1744#ifndef CONFIG_M5272
1745 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
1746 writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
1747#endif
1870 1748
1871 /* Reset all multicast. 1749 /* Set maximum receive buffer size. */
1872 */ 1750 writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
1873 fecp->fec_grp_hash_table_high = 0;
1874 fecp->fec_grp_hash_table_low = 0;
1875 1751
1876 /* Set maximum receive buffer size. 1752 /* Set receive and transmit descriptor base. */
1877 */ 1753 writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
1878 fecp->fec_r_buff_size = PKT_MAXBLR_SIZE; 1754 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc) * RX_RING_SIZE,
1879 1755 fep->hwp + FEC_X_DES_START);
1880 /* Set receive and transmit descriptor base.
1881 */
1882 fecp->fec_r_des_start = fep->bd_dma;
1883 fecp->fec_x_des_start = (unsigned long)fep->bd_dma + sizeof(cbd_t)
1884 * RX_RING_SIZE;
1885 1756
1886 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base; 1757 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
1887 fep->cur_rx = fep->rx_bd_base; 1758 fep->cur_rx = fep->rx_bd_base;
1888 1759
1889 /* Reset SKB transmit buffers. 1760 /* Reset SKB transmit buffers. */
1890 */
1891 fep->skb_cur = fep->skb_dirty = 0; 1761 fep->skb_cur = fep->skb_dirty = 0;
1892 for (i=0; i<=TX_RING_MOD_MASK; i++) { 1762 for (i = 0; i <= TX_RING_MOD_MASK; i++) {
1893 if (fep->tx_skbuff[i] != NULL) { 1763 if (fep->tx_skbuff[i]) {
1894 dev_kfree_skb_any(fep->tx_skbuff[i]); 1764 dev_kfree_skb_any(fep->tx_skbuff[i]);
1895 fep->tx_skbuff[i] = NULL; 1765 fep->tx_skbuff[i] = NULL;
1896 } 1766 }
1897 } 1767 }
1898 1768
1899 /* Initialize the receive buffer descriptors. 1769 /* Initialize the receive buffer descriptors. */
1900 */
1901 bdp = fep->rx_bd_base; 1770 bdp = fep->rx_bd_base;
1902 for (i=0; i<RX_RING_SIZE; i++) { 1771 for (i = 0; i < RX_RING_SIZE; i++) {
1903 1772
1904 /* Initialize the BD for every fragment in the page. 1773 /* Initialize the BD for every fragment in the page. */
1905 */
1906 bdp->cbd_sc = BD_ENET_RX_EMPTY; 1774 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1907 bdp++; 1775 bdp++;
1908 } 1776 }
1909 1777
1910 /* Set the last buffer to wrap. 1778 /* Set the last buffer to wrap */
1911 */
1912 bdp--; 1779 bdp--;
1913 bdp->cbd_sc |= BD_SC_WRAP; 1780 bdp->cbd_sc |= BD_SC_WRAP;
1914 1781
1915 /* ...and the same for transmmit. 1782 /* ...and the same for transmit */
1916 */
1917 bdp = fep->tx_bd_base; 1783 bdp = fep->tx_bd_base;
1918 for (i=0; i<TX_RING_SIZE; i++) { 1784 for (i = 0; i < TX_RING_SIZE; i++) {
1919 1785
1920 /* Initialize the BD for every fragment in the page. 1786 /* Initialize the BD for every fragment in the page. */
1921 */
1922 bdp->cbd_sc = 0; 1787 bdp->cbd_sc = 0;
1923 bdp->cbd_bufaddr = 0; 1788 bdp->cbd_bufaddr = 0;
1924 bdp++; 1789 bdp++;
1925 } 1790 }
1926 1791
1927 /* Set the last buffer to wrap. 1792 /* Set the last buffer to wrap */
1928 */
1929 bdp--; 1793 bdp--;
1930 bdp->cbd_sc |= BD_SC_WRAP; 1794 bdp->cbd_sc |= BD_SC_WRAP;
1931 1795
1932 /* Enable MII mode. 1796 /* Enable MII mode */
1933 */
1934 if (duplex) { 1797 if (duplex) {
1935 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;/* MII enable */ 1798 /* MII enable / FD enable */
1936 fecp->fec_x_cntrl = 0x04; /* FD enable */ 1799 writel(OPT_FRAME_SIZE | 0x04, fep->hwp + FEC_R_CNTRL);
1800 writel(0x04, fep->hwp + FEC_X_CNTRL);
1937 } else { 1801 } else {
1938 /* MII enable|No Rcv on Xmit */ 1802 /* MII enable / No Rcv on Xmit */
1939 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x06; 1803 writel(OPT_FRAME_SIZE | 0x06, fep->hwp + FEC_R_CNTRL);
1940 fecp->fec_x_cntrl = 0x00; 1804 writel(0x0, fep->hwp + FEC_X_CNTRL);
1941 } 1805 }
1942 fep->full_duplex = duplex; 1806 fep->full_duplex = duplex;
1943 1807
1944 /* Set MII speed. 1808 /* Set MII speed */
1945 */ 1809 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1946 fecp->fec_mii_speed = fep->phy_speed;
1947 1810
1948 /* And last, enable the transmit and receive processing. 1811 /* And last, enable the transmit and receive processing */
1949 */ 1812 writel(2, fep->hwp + FEC_ECNTRL);
1950 fecp->fec_ecntrl = 2; 1813 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
1951 fecp->fec_r_des_active = 0;
1952 1814
1953 /* Enable interrupts we wish to service. 1815 /* Enable interrupts we wish to service */
1954 */ 1816 writel(FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII,
1955 fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII); 1817 fep->hwp + FEC_IMASK);
1956} 1818}
1957 1819
1958static void 1820static void
1959fec_stop(struct net_device *dev) 1821fec_stop(struct net_device *dev)
1960{ 1822{
1961 volatile fec_t *fecp; 1823 struct fec_enet_private *fep = netdev_priv(dev);
1962 struct fec_enet_private *fep;
1963
1964 fep = netdev_priv(dev);
1965 fecp = fep->hwp;
1966 1824
1967 /* 1825 /* We cannot expect a graceful transmit stop without link !!! */
1968 ** We cannot expect a graceful transmit stop without link !!! 1826 if (fep->link) {
1969 */ 1827 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
1970 if (fep->link)
1971 {
1972 fecp->fec_x_cntrl = 0x01; /* Graceful transmit stop */
1973 udelay(10); 1828 udelay(10);
1974 if (!(fecp->fec_ievent & FEC_ENET_GRA)) 1829 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
1975 printk("fec_stop : Graceful transmit stop did not complete !\n"); 1830 printk("fec_stop : Graceful transmit stop did not complete !\n");
1976 } 1831 }
1977 1832
1978 /* Whack a reset. We should wait for this. 1833 /* Whack a reset. We should wait for this. */
1979 */ 1834 writel(1, fep->hwp + FEC_ECNTRL);
1980 fecp->fec_ecntrl = 1;
1981 udelay(10); 1835 udelay(10);
1982 1836
1983 /* Clear outstanding MII command interrupts. 1837 /* Clear outstanding MII command interrupts. */
1984 */ 1838 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT);
1985 fecp->fec_ievent = FEC_ENET_MII;
1986 1839
1987 fecp->fec_imask = FEC_ENET_MII; 1840 writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
1988 fecp->fec_mii_speed = fep->phy_speed; 1841 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1989} 1842}
1990 1843
1991static int __devinit 1844static int __devinit
diff --git a/drivers/net/fec.h b/drivers/net/fec.h
index 76c64c92e190..30b7dd671336 100644
--- a/drivers/net/fec.h
+++ b/drivers/net/fec.h
@@ -20,82 +20,55 @@
20 * registers in the same peripheral device on different models 20 * registers in the same peripheral device on different models
21 * of the ColdFire! 21 * of the ColdFire!
22 */ 22 */
23typedef struct fec { 23#define FEC_IEVENT 0x004 /* Interrupt event reg */
24 unsigned long fec_reserved0; 24#define FEC_IMASK 0x008 /* Interrupt mask reg */
25 unsigned long fec_ievent; /* Interrupt event reg */ 25#define FEC_R_DES_ACTIVE 0x010 /* Receive descriptor reg */
26 unsigned long fec_imask; /* Interrupt mask reg */ 26#define FEC_X_DES_ACTIVE 0x014 /* Transmit descriptor reg */
27 unsigned long fec_reserved1; 27#define FEC_ECNTRL 0x024 /* Ethernet control reg */
28 unsigned long fec_r_des_active; /* Receive descriptor reg */ 28#define FEC_MII_DATA 0x040 /* MII manage frame reg */
29 unsigned long fec_x_des_active; /* Transmit descriptor reg */ 29#define FEC_MII_SPEED 0x044 /* MII speed control reg */
30 unsigned long fec_reserved2[3]; 30#define FEC_MIB_CTRLSTAT 0x064 /* MIB control/status reg */
31 unsigned long fec_ecntrl; /* Ethernet control reg */ 31#define FEC_R_CNTRL 0x084 /* Receive control reg */
32 unsigned long fec_reserved3[6]; 32#define FEC_X_CNTRL 0x0c4 /* Transmit Control reg */
33 unsigned long fec_mii_data; /* MII manage frame reg */ 33#define FEC_ADDR_LOW 0x0e4 /* Low 32bits MAC address */
34 unsigned long fec_mii_speed; /* MII speed control reg */ 34#define FEC_ADDR_HIGH 0x0e8 /* High 16bits MAC address */
35 unsigned long fec_reserved4[7]; 35#define FEC_OPD 0x0ec /* Opcode + Pause duration */
36 unsigned long fec_mib_ctrlstat; /* MIB control/status reg */ 36#define FEC_HASH_TABLE_HIGH 0x118 /* High 32bits hash table */
37 unsigned long fec_reserved5[7]; 37#define FEC_HASH_TABLE_LOW 0x11c /* Low 32bits hash table */
38 unsigned long fec_r_cntrl; /* Receive control reg */ 38#define FEC_GRP_HASH_TABLE_HIGH 0x120 /* High 32bits hash table */
39 unsigned long fec_reserved6[15]; 39#define FEC_GRP_HASH_TABLE_LOW 0x124 /* Low 32bits hash table */
40 unsigned long fec_x_cntrl; /* Transmit Control reg */ 40#define FEC_X_WMRK 0x144 /* FIFO transmit water mark */
41 unsigned long fec_reserved7[7]; 41#define FEC_R_BOUND 0x14c /* FIFO receive bound reg */
42 unsigned long fec_addr_low; /* Low 32bits MAC address */ 42#define FEC_R_FSTART 0x150 /* FIFO receive start reg */
43 unsigned long fec_addr_high; /* High 16bits MAC address */ 43#define FEC_R_DES_START 0x180 /* Receive descriptor ring */
44 unsigned long fec_opd; /* Opcode + Pause duration */ 44#define FEC_X_DES_START 0x184 /* Transmit descriptor ring */
45 unsigned long fec_reserved8[10]; 45#define FEC_R_BUFF_SIZE 0x188 /* Maximum receive buff size */
46 unsigned long fec_hash_table_high; /* High 32bits hash table */
47 unsigned long fec_hash_table_low; /* Low 32bits hash table */
48 unsigned long fec_grp_hash_table_high;/* High 32bits hash table */
49 unsigned long fec_grp_hash_table_low; /* Low 32bits hash table */
50 unsigned long fec_reserved9[7];
51 unsigned long fec_x_wmrk; /* FIFO transmit water mark */
52 unsigned long fec_reserved10;
53 unsigned long fec_r_bound; /* FIFO receive bound reg */
54 unsigned long fec_r_fstart; /* FIFO receive start reg */
55 unsigned long fec_reserved11[11];
56 unsigned long fec_r_des_start; /* Receive descriptor ring */
57 unsigned long fec_x_des_start; /* Transmit descriptor ring */
58 unsigned long fec_r_buff_size; /* Maximum receive buff size */
59} fec_t;
60 46
61#else 47#else
62 48
63/* 49#define FEC_ECNTRL; 0x000 /* Ethernet control reg */
64 * Define device register set address map. 50#define FEC_IEVENT; 0x004 /* Interrupt even reg */
65 */ 51#define FEC_IMASK; 0x008 /* Interrupt mask reg */
66typedef struct fec { 52#define FEC_IVEC; 0x00c /* Interrupt vec status reg */
67 unsigned long fec_ecntrl; /* Ethernet control reg */ 53#define FEC_R_DES_ACTIVE; 0x010 /* Receive descriptor reg */
68 unsigned long fec_ievent; /* Interrupt even reg */ 54#define FEC_X_DES_ACTIVE; 0x01c /* Transmit descriptor reg */
69 unsigned long fec_imask; /* Interrupt mask reg */ 55#define FEC_MII_DATA 0x040 /* MII manage frame reg */
70 unsigned long fec_ivec; /* Interrupt vec status reg */ 56#define FEC_MII_SPEED 0x044 /* MII speed control reg */
71 unsigned long fec_r_des_active; /* Receive descriptor reg */ 57#define FEC_R_BOUND 0x08c /* FIFO receive bound reg */
72 unsigned long fec_x_des_active; /* Transmit descriptor reg */ 58#define FEC_R_FSTART 0x090 /* FIFO receive start reg */
73 unsigned long fec_reserved1[10]; 59#define FEC_X_WMRK 0x0a4 /* FIFO transmit water mark */
74 unsigned long fec_mii_data; /* MII manage frame reg */ 60#define FEC_X_FSTART 0x0ac /* FIFO transmit start reg */
75 unsigned long fec_mii_speed; /* MII speed control reg */ 61#define FEC_R_CNTRL 0x104 /* Receive control reg */
76 unsigned long fec_reserved2[17]; 62#define FEC_MAX_FRM_LEN 0x108 /* Maximum frame length reg */
77 unsigned long fec_r_bound; /* FIFO receive bound reg */ 63#define FEC_X_CNTRL 0x144 /* Transmit Control reg */
78 unsigned long fec_r_fstart; /* FIFO receive start reg */ 64#define FEC_ADDR_LOW 0x3c0 /* Low 32bits MAC address */
79 unsigned long fec_reserved3[4]; 65#define FEC_ADDR_HIGH 0x3c4 /* High 16bits MAC address */
80 unsigned long fec_x_wmrk; /* FIFO transmit water mark */ 66#define FEC_GRP_HASH_TABLE_HIGH 0x3c8 /* High 32bits hash table */
81 unsigned long fec_reserved4; 67#define FEC_GRP_HASH_TABLE_LOW 0x3cc /* Low 32bits hash table */
82 unsigned long fec_x_fstart; /* FIFO transmit start reg */ 68#define FEC_R_DES_START 0x3d0 /* Receive descriptor ring */
83 unsigned long fec_reserved5[21]; 69#define FEC_X_DES_START 0x3d4 /* Transmit descriptor ring */
84 unsigned long fec_r_cntrl; /* Receive control reg */ 70#define FEC_R_BUFF_SIZE 0x3d8 /* Maximum receive buff size */
85 unsigned long fec_max_frm_len; /* Maximum frame length reg */ 71#define FEC_FIFO_RAM 0x400 /* FIFO RAM buffer */
86 unsigned long fec_reserved6[14];
87 unsigned long fec_x_cntrl; /* Transmit Control reg */
88 unsigned long fec_reserved7[158];
89 unsigned long fec_addr_low; /* Low 32bits MAC address */
90 unsigned long fec_addr_high; /* High 16bits MAC address */
91 unsigned long fec_grp_hash_table_high;/* High 32bits hash table */
92 unsigned long fec_grp_hash_table_low; /* Low 32bits hash table */
93 unsigned long fec_r_des_start; /* Receive descriptor ring */
94 unsigned long fec_x_des_start; /* Transmit descriptor ring */
95 unsigned long fec_r_buff_size; /* Maximum receive buff size */
96 unsigned long reserved8[9];
97 unsigned long fec_fifo_ram[112]; /* FIFO RAM buffer */
98} fec_t;
99 72
100#endif /* CONFIG_M5272 */ 73#endif /* CONFIG_M5272 */
101 74
@@ -104,17 +77,17 @@ typedef struct fec {
104 * Define the buffer descriptor structure. 77 * Define the buffer descriptor structure.
105 */ 78 */
106#ifdef CONFIG_ARCH_MXC 79#ifdef CONFIG_ARCH_MXC
107typedef struct bufdesc { 80struct bufdesc {
108 unsigned short cbd_datlen; /* Data length */ 81 unsigned short cbd_datlen; /* Data length */
109 unsigned short cbd_sc; /* Control and status info */ 82 unsigned short cbd_sc; /* Control and status info */
110 unsigned long cbd_bufaddr; /* Buffer address */ 83 unsigned long cbd_bufaddr; /* Buffer address */
111} cbd_t; 84};
112#else 85#else
113typedef struct bufdesc { 86struct bufdesc {
114 unsigned short cbd_sc; /* Control and status info */ 87 unsigned short cbd_sc; /* Control and status info */
115 unsigned short cbd_datlen; /* Data length */ 88 unsigned short cbd_datlen; /* Data length */
116 unsigned long cbd_bufaddr; /* Buffer address */ 89 unsigned long cbd_bufaddr; /* Buffer address */
117} cbd_t; 90};
118#endif 91#endif
119 92
120/* 93/*
diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c
index 8bbe7f617994..7d443405bbe2 100644
--- a/drivers/net/fec_mpc52xx.c
+++ b/drivers/net/fec_mpc52xx.c
@@ -25,6 +25,7 @@
25#include <linux/hardirq.h> 25#include <linux/hardirq.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/of_device.h> 27#include <linux/of_device.h>
28#include <linux/of_mdio.h>
28#include <linux/of_platform.h> 29#include <linux/of_platform.h>
29 30
30#include <linux/netdevice.h> 31#include <linux/netdevice.h>
@@ -43,11 +44,9 @@
43 44
44#define DRIVER_NAME "mpc52xx-fec" 45#define DRIVER_NAME "mpc52xx-fec"
45 46
46#define FEC5200_PHYADDR_NONE (-1)
47#define FEC5200_PHYADDR_7WIRE (-2)
48
49/* Private driver data structure */ 47/* Private driver data structure */
50struct mpc52xx_fec_priv { 48struct mpc52xx_fec_priv {
49 struct net_device *ndev;
51 int duplex; 50 int duplex;
52 int speed; 51 int speed;
53 int r_irq; 52 int r_irq;
@@ -59,10 +58,11 @@ struct mpc52xx_fec_priv {
59 int msg_enable; 58 int msg_enable;
60 59
61 /* MDIO link details */ 60 /* MDIO link details */
62 int phy_addr; 61 unsigned int mdio_speed;
63 unsigned int phy_speed; 62 struct device_node *phy_node;
64 struct phy_device *phydev; 63 struct phy_device *phydev;
65 enum phy_state link; 64 enum phy_state link;
65 int seven_wire_mode;
66}; 66};
67 67
68 68
@@ -211,85 +211,25 @@ static void mpc52xx_fec_adjust_link(struct net_device *dev)
211 phy_print_status(phydev); 211 phy_print_status(phydev);
212} 212}
213 213
214static int mpc52xx_fec_init_phy(struct net_device *dev)
215{
216 struct mpc52xx_fec_priv *priv = netdev_priv(dev);
217 struct phy_device *phydev;
218 char phy_id[BUS_ID_SIZE];
219
220 snprintf(phy_id, sizeof(phy_id), "%x:%02x",
221 (unsigned int)dev->base_addr, priv->phy_addr);
222
223 priv->link = PHY_DOWN;
224 priv->speed = 0;
225 priv->duplex = -1;
226
227 phydev = phy_connect(dev, phy_id, &mpc52xx_fec_adjust_link, 0, PHY_INTERFACE_MODE_MII);
228 if (IS_ERR(phydev)) {
229 dev_err(&dev->dev, "phy_connect failed\n");
230 return PTR_ERR(phydev);
231 }
232 dev_info(&dev->dev, "attached phy %i to driver %s\n",
233 phydev->addr, phydev->drv->name);
234
235 priv->phydev = phydev;
236
237 return 0;
238}
239
240static int mpc52xx_fec_phy_start(struct net_device *dev)
241{
242 struct mpc52xx_fec_priv *priv = netdev_priv(dev);
243 int err;
244
245 if (priv->phy_addr < 0)
246 return 0;
247
248 err = mpc52xx_fec_init_phy(dev);
249 if (err) {
250 dev_err(&dev->dev, "mpc52xx_fec_init_phy failed\n");
251 return err;
252 }
253
254 /* reset phy - this also wakes it from PDOWN */
255 phy_write(priv->phydev, MII_BMCR, BMCR_RESET);
256 phy_start(priv->phydev);
257
258 return 0;
259}
260
261static void mpc52xx_fec_phy_stop(struct net_device *dev)
262{
263 struct mpc52xx_fec_priv *priv = netdev_priv(dev);
264
265 if (!priv->phydev)
266 return;
267
268 phy_disconnect(priv->phydev);
269 /* power down phy */
270 phy_stop(priv->phydev);
271 phy_write(priv->phydev, MII_BMCR, BMCR_PDOWN);
272}
273
274static void mpc52xx_fec_phy_hw_init(struct mpc52xx_fec_priv *priv)
275{
276 struct mpc52xx_fec __iomem *fec = priv->fec;
277
278 if (priv->phydev)
279 return;
280
281 out_be32(&fec->mii_speed, priv->phy_speed);
282}
283
284static int mpc52xx_fec_open(struct net_device *dev) 214static int mpc52xx_fec_open(struct net_device *dev)
285{ 215{
286 struct mpc52xx_fec_priv *priv = netdev_priv(dev); 216 struct mpc52xx_fec_priv *priv = netdev_priv(dev);
287 int err = -EBUSY; 217 int err = -EBUSY;
288 218
219 if (priv->phy_node) {
220 priv->phydev = of_phy_connect(priv->ndev, priv->phy_node,
221 mpc52xx_fec_adjust_link, 0, 0);
222 if (!priv->phydev) {
223 dev_err(&dev->dev, "of_phy_connect failed\n");
224 return -ENODEV;
225 }
226 phy_start(priv->phydev);
227 }
228
289 if (request_irq(dev->irq, &mpc52xx_fec_interrupt, IRQF_SHARED, 229 if (request_irq(dev->irq, &mpc52xx_fec_interrupt, IRQF_SHARED,
290 DRIVER_NAME "_ctrl", dev)) { 230 DRIVER_NAME "_ctrl", dev)) {
291 dev_err(&dev->dev, "ctrl interrupt request failed\n"); 231 dev_err(&dev->dev, "ctrl interrupt request failed\n");
292 goto out; 232 goto free_phy;
293 } 233 }
294 if (request_irq(priv->r_irq, &mpc52xx_fec_rx_interrupt, 0, 234 if (request_irq(priv->r_irq, &mpc52xx_fec_rx_interrupt, 0,
295 DRIVER_NAME "_rx", dev)) { 235 DRIVER_NAME "_rx", dev)) {
@@ -311,10 +251,6 @@ static int mpc52xx_fec_open(struct net_device *dev)
311 goto free_irqs; 251 goto free_irqs;
312 } 252 }
313 253
314 err = mpc52xx_fec_phy_start(dev);
315 if (err)
316 goto free_skbs;
317
318 bcom_enable(priv->rx_dmatsk); 254 bcom_enable(priv->rx_dmatsk);
319 bcom_enable(priv->tx_dmatsk); 255 bcom_enable(priv->tx_dmatsk);
320 256
@@ -324,16 +260,18 @@ static int mpc52xx_fec_open(struct net_device *dev)
324 260
325 return 0; 261 return 0;
326 262
327 free_skbs:
328 mpc52xx_fec_free_rx_buffers(dev, priv->rx_dmatsk);
329
330 free_irqs: 263 free_irqs:
331 free_irq(priv->t_irq, dev); 264 free_irq(priv->t_irq, dev);
332 free_2irqs: 265 free_2irqs:
333 free_irq(priv->r_irq, dev); 266 free_irq(priv->r_irq, dev);
334 free_ctrl_irq: 267 free_ctrl_irq:
335 free_irq(dev->irq, dev); 268 free_irq(dev->irq, dev);
336 out: 269 free_phy:
270 if (priv->phydev) {
271 phy_stop(priv->phydev);
272 phy_disconnect(priv->phydev);
273 priv->phydev = NULL;
274 }
337 275
338 return err; 276 return err;
339} 277}
@@ -352,7 +290,12 @@ static int mpc52xx_fec_close(struct net_device *dev)
352 free_irq(priv->r_irq, dev); 290 free_irq(priv->r_irq, dev);
353 free_irq(priv->t_irq, dev); 291 free_irq(priv->t_irq, dev);
354 292
355 mpc52xx_fec_phy_stop(dev); 293 if (priv->phydev) {
294 /* power down phy */
295 phy_stop(priv->phydev);
296 phy_disconnect(priv->phydev);
297 priv->phydev = NULL;
298 }
356 299
357 return 0; 300 return 0;
358} 301}
@@ -696,7 +639,7 @@ static void mpc52xx_fec_hw_init(struct net_device *dev)
696 /* set phy speed. 639 /* set phy speed.
697 * this can't be done in phy driver, since it needs to be called 640 * this can't be done in phy driver, since it needs to be called
698 * before fec stuff (even on resume) */ 641 * before fec stuff (even on resume) */
699 mpc52xx_fec_phy_hw_init(priv); 642 out_be32(&fec->mii_speed, priv->mdio_speed);
700} 643}
701 644
702/** 645/**
@@ -732,7 +675,7 @@ static void mpc52xx_fec_start(struct net_device *dev)
732 rcntrl = FEC_RX_BUFFER_SIZE << 16; /* max frame length */ 675 rcntrl = FEC_RX_BUFFER_SIZE << 16; /* max frame length */
733 rcntrl |= FEC_RCNTRL_FCE; 676 rcntrl |= FEC_RCNTRL_FCE;
734 677
735 if (priv->phy_addr != FEC5200_PHYADDR_7WIRE) 678 if (!priv->seven_wire_mode)
736 rcntrl |= FEC_RCNTRL_MII_MODE; 679 rcntrl |= FEC_RCNTRL_MII_MODE;
737 680
738 if (priv->duplex == DUPLEX_FULL) 681 if (priv->duplex == DUPLEX_FULL)
@@ -798,8 +741,6 @@ static void mpc52xx_fec_stop(struct net_device *dev)
798 741
799 /* Stop FEC */ 742 /* Stop FEC */
800 out_be32(&fec->ecntrl, in_be32(&fec->ecntrl) & ~FEC_ECNTRL_ETHER_EN); 743 out_be32(&fec->ecntrl, in_be32(&fec->ecntrl) & ~FEC_ECNTRL_ETHER_EN);
801
802 return;
803} 744}
804 745
805/* reset fec and bestcomm tasks */ 746/* reset fec and bestcomm tasks */
@@ -817,9 +758,11 @@ static void mpc52xx_fec_reset(struct net_device *dev)
817 758
818 mpc52xx_fec_hw_init(dev); 759 mpc52xx_fec_hw_init(dev);
819 760
820 phy_stop(priv->phydev); 761 if (priv->phydev) {
821 phy_write(priv->phydev, MII_BMCR, BMCR_RESET); 762 phy_stop(priv->phydev);
822 phy_start(priv->phydev); 763 phy_write(priv->phydev, MII_BMCR, BMCR_RESET);
764 phy_start(priv->phydev);
765 }
823 766
824 bcom_fec_rx_reset(priv->rx_dmatsk); 767 bcom_fec_rx_reset(priv->rx_dmatsk);
825 bcom_fec_tx_reset(priv->tx_dmatsk); 768 bcom_fec_tx_reset(priv->tx_dmatsk);
@@ -919,8 +862,6 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
919 struct net_device *ndev; 862 struct net_device *ndev;
920 struct mpc52xx_fec_priv *priv = NULL; 863 struct mpc52xx_fec_priv *priv = NULL;
921 struct resource mem; 864 struct resource mem;
922 struct device_node *phy_node;
923 const phandle *phy_handle;
924 const u32 *prop; 865 const u32 *prop;
925 int prop_size; 866 int prop_size;
926 867
@@ -933,6 +874,7 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
933 return -ENOMEM; 874 return -ENOMEM;
934 875
935 priv = netdev_priv(ndev); 876 priv = netdev_priv(ndev);
877 priv->ndev = ndev;
936 878
937 /* Reserve FEC control zone */ 879 /* Reserve FEC control zone */
938 rv = of_address_to_resource(op->node, 0, &mem); 880 rv = of_address_to_resource(op->node, 0, &mem);
@@ -956,6 +898,7 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
956 ndev->ethtool_ops = &mpc52xx_fec_ethtool_ops; 898 ndev->ethtool_ops = &mpc52xx_fec_ethtool_ops;
957 ndev->watchdog_timeo = FEC_WATCHDOG_TIMEOUT; 899 ndev->watchdog_timeo = FEC_WATCHDOG_TIMEOUT;
958 ndev->base_addr = mem.start; 900 ndev->base_addr = mem.start;
901 SET_NETDEV_DEV(ndev, &op->dev);
959 902
960 spin_lock_init(&priv->lock); 903 spin_lock_init(&priv->lock);
961 904
@@ -1003,14 +946,9 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
1003 */ 946 */
1004 947
1005 /* Start with safe defaults for link connection */ 948 /* Start with safe defaults for link connection */
1006 priv->phy_addr = FEC5200_PHYADDR_NONE;
1007 priv->speed = 100; 949 priv->speed = 100;
1008 priv->duplex = DUPLEX_HALF; 950 priv->duplex = DUPLEX_HALF;
1009 priv->phy_speed = ((mpc52xx_find_ipb_freq(op->node) >> 20) / 5) << 1; 951 priv->mdio_speed = ((mpc52xx_find_ipb_freq(op->node) >> 20) / 5) << 1;
1010
1011 /* the 7-wire property means don't use MII mode */
1012 if (of_find_property(op->node, "fsl,7-wire-mode", NULL))
1013 priv->phy_addr = FEC5200_PHYADDR_7WIRE;
1014 952
1015 /* The current speed preconfigures the speed of the MII link */ 953 /* The current speed preconfigures the speed of the MII link */
1016 prop = of_get_property(op->node, "current-speed", &prop_size); 954 prop = of_get_property(op->node, "current-speed", &prop_size);
@@ -1019,43 +957,23 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
1019 priv->duplex = prop[1] ? DUPLEX_FULL : DUPLEX_HALF; 957 priv->duplex = prop[1] ? DUPLEX_FULL : DUPLEX_HALF;
1020 } 958 }
1021 959
1022 /* If there is a phy handle, setup link to that phy */ 960 /* If there is a phy handle, then get the PHY node */
1023 phy_handle = of_get_property(op->node, "phy-handle", &prop_size); 961 priv->phy_node = of_parse_phandle(op->node, "phy-handle", 0);
1024 if (phy_handle && (prop_size >= sizeof(phandle))) { 962
1025 phy_node = of_find_node_by_phandle(*phy_handle); 963 /* the 7-wire property means don't use MII mode */
1026 prop = of_get_property(phy_node, "reg", &prop_size); 964 if (of_find_property(op->node, "fsl,7-wire-mode", NULL)) {
1027 if (prop && (prop_size >= sizeof(u32))) 965 priv->seven_wire_mode = 1;
1028 if ((*prop >= 0) && (*prop < PHY_MAX_ADDR)) 966 dev_info(&ndev->dev, "using 7-wire PHY mode\n");
1029 priv->phy_addr = *prop;
1030 of_node_put(phy_node);
1031 } 967 }
1032 968
1033 /* Hardware init */ 969 /* Hardware init */
1034 mpc52xx_fec_hw_init(ndev); 970 mpc52xx_fec_hw_init(ndev);
1035
1036 mpc52xx_fec_reset_stats(ndev); 971 mpc52xx_fec_reset_stats(ndev);
1037 972
1038 SET_NETDEV_DEV(ndev, &op->dev);
1039
1040 /* Register the new network device */
1041 rv = register_netdev(ndev); 973 rv = register_netdev(ndev);
1042 if (rv < 0) 974 if (rv < 0)
1043 goto probe_error; 975 goto probe_error;
1044 976
1045 /* Now report the link setup */
1046 switch (priv->phy_addr) {
1047 case FEC5200_PHYADDR_NONE:
1048 dev_info(&ndev->dev, "Fixed speed MII link: %i%cD\n",
1049 priv->speed, priv->duplex ? 'F' : 'H');
1050 break;
1051 case FEC5200_PHYADDR_7WIRE:
1052 dev_info(&ndev->dev, "using 7-wire PHY mode\n");
1053 break;
1054 default:
1055 dev_info(&ndev->dev, "Using PHY at MDIO address %i\n",
1056 priv->phy_addr);
1057 }
1058
1059 /* We're done ! */ 977 /* We're done ! */
1060 dev_set_drvdata(&op->dev, ndev); 978 dev_set_drvdata(&op->dev, ndev);
1061 979
@@ -1065,6 +983,10 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
1065 /* Error handling - free everything that might be allocated */ 983 /* Error handling - free everything that might be allocated */
1066probe_error: 984probe_error:
1067 985
986 if (priv->phy_node)
987 of_node_put(priv->phy_node);
988 priv->phy_node = NULL;
989
1068 irq_dispose_mapping(ndev->irq); 990 irq_dispose_mapping(ndev->irq);
1069 991
1070 if (priv->rx_dmatsk) 992 if (priv->rx_dmatsk)
@@ -1093,6 +1015,10 @@ mpc52xx_fec_remove(struct of_device *op)
1093 1015
1094 unregister_netdev(ndev); 1016 unregister_netdev(ndev);
1095 1017
1018 if (priv->phy_node)
1019 of_node_put(priv->phy_node);
1020 priv->phy_node = NULL;
1021
1096 irq_dispose_mapping(ndev->irq); 1022 irq_dispose_mapping(ndev->irq);
1097 1023
1098 bcom_fec_rx_release(priv->rx_dmatsk); 1024 bcom_fec_rx_release(priv->rx_dmatsk);
diff --git a/drivers/net/fec_mpc52xx_phy.c b/drivers/net/fec_mpc52xx_phy.c
index dd9bfa42ac34..fec9f245116b 100644
--- a/drivers/net/fec_mpc52xx_phy.c
+++ b/drivers/net/fec_mpc52xx_phy.c
@@ -14,12 +14,14 @@
14#include <linux/netdevice.h> 14#include <linux/netdevice.h>
15#include <linux/phy.h> 15#include <linux/phy.h>
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/of_mdio.h>
17#include <asm/io.h> 18#include <asm/io.h>
18#include <asm/mpc52xx.h> 19#include <asm/mpc52xx.h>
19#include "fec_mpc52xx.h" 20#include "fec_mpc52xx.h"
20 21
21struct mpc52xx_fec_mdio_priv { 22struct mpc52xx_fec_mdio_priv {
22 struct mpc52xx_fec __iomem *regs; 23 struct mpc52xx_fec __iomem *regs;
24 int mdio_irqs[PHY_MAX_ADDR];
23}; 25};
24 26
25static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id, 27static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id,
@@ -27,7 +29,7 @@ static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id,
27{ 29{
28 struct mpc52xx_fec_mdio_priv *priv = bus->priv; 30 struct mpc52xx_fec_mdio_priv *priv = bus->priv;
29 struct mpc52xx_fec __iomem *fec; 31 struct mpc52xx_fec __iomem *fec;
30 int tries = 100; 32 int tries = 3;
31 33
32 value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; 34 value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK;
33 value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; 35 value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK;
@@ -38,7 +40,7 @@ static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id,
38 40
39 /* wait for it to finish, this takes about 23 us on lite5200b */ 41 /* wait for it to finish, this takes about 23 us on lite5200b */
40 while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries) 42 while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries)
41 udelay(5); 43 msleep(1);
42 44
43 if (!tries) 45 if (!tries)
44 return -ETIMEDOUT; 46 return -ETIMEDOUT;
@@ -64,7 +66,6 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of,
64{ 66{
65 struct device *dev = &of->dev; 67 struct device *dev = &of->dev;
66 struct device_node *np = of->node; 68 struct device_node *np = of->node;
67 struct device_node *child = NULL;
68 struct mii_bus *bus; 69 struct mii_bus *bus;
69 struct mpc52xx_fec_mdio_priv *priv; 70 struct mpc52xx_fec_mdio_priv *priv;
70 struct resource res = {}; 71 struct resource res = {};
@@ -85,22 +86,7 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of,
85 bus->write = mpc52xx_fec_mdio_write; 86 bus->write = mpc52xx_fec_mdio_write;
86 87
87 /* setup irqs */ 88 /* setup irqs */
88 bus->irq = kmalloc(sizeof(bus->irq[0]) * PHY_MAX_ADDR, GFP_KERNEL); 89 bus->irq = priv->mdio_irqs;
89 if (bus->irq == NULL) {
90 err = -ENOMEM;
91 goto out_free;
92 }
93 for (i=0; i<PHY_MAX_ADDR; i++)
94 bus->irq[i] = PHY_POLL;
95
96 while ((child = of_get_next_child(np, child)) != NULL) {
97 int irq = irq_of_parse_and_map(child, 0);
98 if (irq != NO_IRQ) {
99 const u32 *id = of_get_property(child, "reg", NULL);
100 if (id)
101 bus->irq[*id] = irq;
102 }
103 }
104 90
105 /* setup registers */ 91 /* setup registers */
106 err = of_address_to_resource(np, 0, &res); 92 err = of_address_to_resource(np, 0, &res);
@@ -122,7 +108,7 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of,
122 out_be32(&priv->regs->mii_speed, 108 out_be32(&priv->regs->mii_speed,
123 ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1); 109 ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1);
124 110
125 err = mdiobus_register(bus); 111 err = of_mdiobus_register(bus, np);
126 if (err) 112 if (err)
127 goto out_unmap; 113 goto out_unmap;
128 114
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 9f6a68fb7b45..1dce5550f553 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -343,6 +343,7 @@ enum {
343#define NVREG_POWERSTATE2_POWERUP_MASK 0x0F15 343#define NVREG_POWERSTATE2_POWERUP_MASK 0x0F15
344#define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001 344#define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001
345#define NVREG_POWERSTATE2_PHY_RESET 0x0004 345#define NVREG_POWERSTATE2_PHY_RESET 0x0004
346#define NVREG_POWERSTATE2_GATE_CLOCKS 0x0F00
346}; 347};
347 348
348/* Big endian: should work, but is untested */ 349/* Big endian: should work, but is untested */
@@ -1023,6 +1024,23 @@ static int using_multi_irqs(struct net_device *dev)
1023 return 1; 1024 return 1;
1024} 1025}
1025 1026
1027static void nv_txrx_gate(struct net_device *dev, bool gate)
1028{
1029 struct fe_priv *np = get_nvpriv(dev);
1030 u8 __iomem *base = get_hwbase(dev);
1031 u32 powerstate;
1032
1033 if (!np->mac_in_use &&
1034 (np->driver_data & DEV_HAS_POWER_CNTRL)) {
1035 powerstate = readl(base + NvRegPowerState2);
1036 if (gate)
1037 powerstate |= NVREG_POWERSTATE2_GATE_CLOCKS;
1038 else
1039 powerstate &= ~NVREG_POWERSTATE2_GATE_CLOCKS;
1040 writel(powerstate, base + NvRegPowerState2);
1041 }
1042}
1043
1026static void nv_enable_irq(struct net_device *dev) 1044static void nv_enable_irq(struct net_device *dev)
1027{ 1045{
1028 struct fe_priv *np = get_nvpriv(dev); 1046 struct fe_priv *np = get_nvpriv(dev);
@@ -3403,12 +3421,14 @@ static void nv_linkchange(struct net_device *dev)
3403 if (!netif_carrier_ok(dev)) { 3421 if (!netif_carrier_ok(dev)) {
3404 netif_carrier_on(dev); 3422 netif_carrier_on(dev);
3405 printk(KERN_INFO "%s: link up.\n", dev->name); 3423 printk(KERN_INFO "%s: link up.\n", dev->name);
3424 nv_txrx_gate(dev, false);
3406 nv_start_rx(dev); 3425 nv_start_rx(dev);
3407 } 3426 }
3408 } else { 3427 } else {
3409 if (netif_carrier_ok(dev)) { 3428 if (netif_carrier_ok(dev)) {
3410 netif_carrier_off(dev); 3429 netif_carrier_off(dev);
3411 printk(KERN_INFO "%s: link down.\n", dev->name); 3430 printk(KERN_INFO "%s: link down.\n", dev->name);
3431 nv_txrx_gate(dev, true);
3412 nv_stop_rx(dev); 3432 nv_stop_rx(dev);
3413 } 3433 }
3414 } 3434 }
@@ -5336,6 +5356,7 @@ static int nv_open(struct net_device *dev)
5336 mii_rw(dev, np->phyaddr, MII_BMCR, 5356 mii_rw(dev, np->phyaddr, MII_BMCR,
5337 mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ) & ~BMCR_PDOWN); 5357 mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ) & ~BMCR_PDOWN);
5338 5358
5359 nv_txrx_gate(dev, false);
5339 /* erase previous misconfiguration */ 5360 /* erase previous misconfiguration */
5340 if (np->driver_data & DEV_HAS_POWER_CNTRL) 5361 if (np->driver_data & DEV_HAS_POWER_CNTRL)
5341 nv_mac_reset(dev); 5362 nv_mac_reset(dev);
@@ -5523,12 +5544,14 @@ static int nv_close(struct net_device *dev)
5523 nv_drain_rxtx(dev); 5544 nv_drain_rxtx(dev);
5524 5545
5525 if (np->wolenabled || !phy_power_down) { 5546 if (np->wolenabled || !phy_power_down) {
5547 nv_txrx_gate(dev, false);
5526 writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags); 5548 writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);
5527 nv_start_rx(dev); 5549 nv_start_rx(dev);
5528 } else { 5550 } else {
5529 /* power down phy */ 5551 /* power down phy */
5530 mii_rw(dev, np->phyaddr, MII_BMCR, 5552 mii_rw(dev, np->phyaddr, MII_BMCR,
5531 mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ)|BMCR_PDOWN); 5553 mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ)|BMCR_PDOWN);
5554 nv_txrx_gate(dev, true);
5532 } 5555 }
5533 5556
5534 /* FIXME: power down nic */ 5557 /* FIXME: power down nic */
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index a9cbc3191a2a..b892c3ad9a74 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -36,6 +36,8 @@
36#include <linux/fs.h> 36#include <linux/fs.h>
37#include <linux/platform_device.h> 37#include <linux/platform_device.h>
38#include <linux/phy.h> 38#include <linux/phy.h>
39#include <linux/of.h>
40#include <linux/of_mdio.h>
39#include <linux/of_platform.h> 41#include <linux/of_platform.h>
40#include <linux/of_gpio.h> 42#include <linux/of_gpio.h>
41 43
@@ -752,9 +754,10 @@ static int fs_init_phy(struct net_device *dev)
752 fep->oldlink = 0; 754 fep->oldlink = 0;
753 fep->oldspeed = 0; 755 fep->oldspeed = 0;
754 fep->oldduplex = -1; 756 fep->oldduplex = -1;
755 if(fep->fpi->bus_id) 757 if(fep->fpi->phy_node)
756 phydev = phy_connect(dev, fep->fpi->bus_id, &fs_adjust_link, 0, 758 phydev = of_phy_connect(dev, fep->fpi->phy_node,
757 PHY_INTERFACE_MODE_MII); 759 &fs_adjust_link, 0,
760 PHY_INTERFACE_MODE_MII);
758 else { 761 else {
759 printk("No phy bus ID specified in BSP code\n"); 762 printk("No phy bus ID specified in BSP code\n");
760 return -EINVAL; 763 return -EINVAL;
@@ -938,81 +941,6 @@ extern void fs_mii_disconnect(struct net_device *dev);
938 941
939/**************************************************************************************/ 942/**************************************************************************************/
940 943
941/* handy pointer to the immap */
942void __iomem *fs_enet_immap = NULL;
943
944static int setup_immap(void)
945{
946#ifdef CONFIG_CPM1
947 fs_enet_immap = ioremap(IMAP_ADDR, 0x4000);
948 WARN_ON(!fs_enet_immap);
949#elif defined(CONFIG_CPM2)
950 fs_enet_immap = cpm2_immr;
951#endif
952
953 return 0;
954}
955
956static void cleanup_immap(void)
957{
958#if defined(CONFIG_CPM1)
959 iounmap(fs_enet_immap);
960#endif
961}
962
963/**************************************************************************************/
964
965static int __devinit find_phy(struct device_node *np,
966 struct fs_platform_info *fpi)
967{
968 struct device_node *phynode, *mdionode;
969 int ret = 0, len, bus_id;
970 const u32 *data;
971
972 data = of_get_property(np, "fixed-link", NULL);
973 if (data) {
974 snprintf(fpi->bus_id, 16, "%x:%02x", 0, *data);
975 return 0;
976 }
977
978 data = of_get_property(np, "phy-handle", &len);
979 if (!data || len != 4)
980 return -EINVAL;
981
982 phynode = of_find_node_by_phandle(*data);
983 if (!phynode)
984 return -EINVAL;
985
986 data = of_get_property(phynode, "reg", &len);
987 if (!data || len != 4) {
988 ret = -EINVAL;
989 goto out_put_phy;
990 }
991
992 mdionode = of_get_parent(phynode);
993 if (!mdionode) {
994 ret = -EINVAL;
995 goto out_put_phy;
996 }
997
998 bus_id = of_get_gpio(mdionode, 0);
999 if (bus_id < 0) {
1000 struct resource res;
1001 ret = of_address_to_resource(mdionode, 0, &res);
1002 if (ret)
1003 goto out_put_mdio;
1004 bus_id = res.start;
1005 }
1006
1007 snprintf(fpi->bus_id, 16, "%x:%02x", bus_id, *data);
1008
1009out_put_mdio:
1010 of_node_put(mdionode);
1011out_put_phy:
1012 of_node_put(phynode);
1013 return ret;
1014}
1015
1016#ifdef CONFIG_FS_ENET_HAS_FEC 944#ifdef CONFIG_FS_ENET_HAS_FEC
1017#define IS_FEC(match) ((match)->data == &fs_fec_ops) 945#define IS_FEC(match) ((match)->data == &fs_fec_ops)
1018#else 946#else
@@ -1062,9 +990,9 @@ static int __devinit fs_enet_probe(struct of_device *ofdev,
1062 fpi->rx_copybreak = 240; 990 fpi->rx_copybreak = 240;
1063 fpi->use_napi = 1; 991 fpi->use_napi = 1;
1064 fpi->napi_weight = 17; 992 fpi->napi_weight = 17;
1065 993 fpi->phy_node = of_parse_phandle(ofdev->node, "phy-handle", 0);
1066 ret = find_phy(ofdev->node, fpi); 994 if ((!fpi->phy_node) && (!of_get_property(ofdev->node, "fixed-link",
1067 if (ret) 995 NULL)))
1068 goto out_free_fpi; 996 goto out_free_fpi;
1069 997
1070 privsize = sizeof(*fep) + 998 privsize = sizeof(*fep) +
@@ -1136,6 +1064,7 @@ out_cleanup_data:
1136out_free_dev: 1064out_free_dev:
1137 free_netdev(ndev); 1065 free_netdev(ndev);
1138 dev_set_drvdata(&ofdev->dev, NULL); 1066 dev_set_drvdata(&ofdev->dev, NULL);
1067 of_node_put(fpi->phy_node);
1139out_free_fpi: 1068out_free_fpi:
1140 kfree(fpi); 1069 kfree(fpi);
1141 return ret; 1070 return ret;
@@ -1151,7 +1080,7 @@ static int fs_enet_remove(struct of_device *ofdev)
1151 fep->ops->free_bd(ndev); 1080 fep->ops->free_bd(ndev);
1152 fep->ops->cleanup_data(ndev); 1081 fep->ops->cleanup_data(ndev);
1153 dev_set_drvdata(fep->dev, NULL); 1082 dev_set_drvdata(fep->dev, NULL);
1154 1083 of_node_put(fep->fpi->phy_node);
1155 free_netdev(ndev); 1084 free_netdev(ndev);
1156 return 0; 1085 return 0;
1157} 1086}
@@ -1191,25 +1120,12 @@ static struct of_platform_driver fs_enet_driver = {
1191 1120
1192static int __init fs_init(void) 1121static int __init fs_init(void)
1193{ 1122{
1194 int r = setup_immap(); 1123 return of_register_platform_driver(&fs_enet_driver);
1195 if (r != 0)
1196 return r;
1197
1198 r = of_register_platform_driver(&fs_enet_driver);
1199 if (r != 0)
1200 goto out;
1201
1202 return 0;
1203
1204out:
1205 cleanup_immap();
1206 return r;
1207} 1124}
1208 1125
1209static void __exit fs_cleanup(void) 1126static void __exit fs_cleanup(void)
1210{ 1127{
1211 of_unregister_platform_driver(&fs_enet_driver); 1128 of_unregister_platform_driver(&fs_enet_driver);
1212 cleanup_immap();
1213} 1129}
1214 1130
1215#ifdef CONFIG_NET_POLL_CONTROLLER 1131#ifdef CONFIG_NET_POLL_CONTROLLER
diff --git a/drivers/net/fs_enet/fs_enet.h b/drivers/net/fs_enet/fs_enet.h
index 85a4bab7f630..ef01e09781a5 100644
--- a/drivers/net/fs_enet/fs_enet.h
+++ b/drivers/net/fs_enet/fs_enet.h
@@ -194,9 +194,4 @@ extern const struct fs_ops fs_scc_ops;
194 194
195/*******************************************************************/ 195/*******************************************************************/
196 196
197/* handy pointer to the immap */
198extern void __iomem *fs_enet_immap;
199
200/*******************************************************************/
201
202#endif 197#endif
diff --git a/drivers/net/fs_enet/mac-fec.c b/drivers/net/fs_enet/mac-fec.c
index 14e575313c89..ca7bcb8ab3a1 100644
--- a/drivers/net/fs_enet/mac-fec.c
+++ b/drivers/net/fs_enet/mac-fec.c
@@ -245,10 +245,6 @@ static void set_multicast_list(struct net_device *dev)
245 245
246static void restart(struct net_device *dev) 246static void restart(struct net_device *dev)
247{ 247{
248#ifdef CONFIG_DUET
249 immap_t *immap = fs_enet_immap;
250 u32 cptr;
251#endif
252 struct fs_enet_private *fep = netdev_priv(dev); 248 struct fs_enet_private *fep = netdev_priv(dev);
253 fec_t __iomem *fecp = fep->fec.fecp; 249 fec_t __iomem *fecp = fep->fec.fecp;
254 const struct fs_platform_info *fpi = fep->fpi; 250 const struct fs_platform_info *fpi = fep->fpi;
@@ -315,36 +311,6 @@ static void restart(struct net_device *dev)
315 FW(fecp, ievent, 0xffc0); 311 FW(fecp, ievent, 0xffc0);
316 FW(fecp, ivec, (virq_to_hw(fep->interrupt) / 2) << 29); 312 FW(fecp, ivec, (virq_to_hw(fep->interrupt) / 2) << 29);
317 313
318 /*
319 * adjust to speed (only for DUET & RMII)
320 */
321#ifdef CONFIG_DUET
322 if (fpi->use_rmii) {
323 cptr = in_be32(&immap->im_cpm.cp_cptr);
324 switch (fs_get_fec_index(fpi->fs_no)) {
325 case 0:
326 cptr |= 0x100;
327 if (fep->speed == 10)
328 cptr |= 0x0000010;
329 else if (fep->speed == 100)
330 cptr &= ~0x0000010;
331 break;
332 case 1:
333 cptr |= 0x80;
334 if (fep->speed == 10)
335 cptr |= 0x0000008;
336 else if (fep->speed == 100)
337 cptr &= ~0x0000008;
338 break;
339 default:
340 BUG(); /* should never happen */
341 break;
342 }
343 out_be32(&immap->im_cpm.cp_cptr, cptr);
344 }
345#endif
346
347
348 FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */ 314 FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
349 /* 315 /*
350 * adjust to duplex mode 316 * adjust to duplex mode
diff --git a/drivers/net/fs_enet/mii-bitbang.c b/drivers/net/fs_enet/mii-bitbang.c
index 49b6645d7e0c..93b481b0e3c7 100644
--- a/drivers/net/fs_enet/mii-bitbang.c
+++ b/drivers/net/fs_enet/mii-bitbang.c
@@ -22,6 +22,7 @@
22#include <linux/mii.h> 22#include <linux/mii.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/mdio-bitbang.h> 24#include <linux/mdio-bitbang.h>
25#include <linux/of_mdio.h>
25#include <linux/of_platform.h> 26#include <linux/of_platform.h>
26 27
27#include "fs_enet.h" 28#include "fs_enet.h"
@@ -149,31 +150,12 @@ static int __devinit fs_mii_bitbang_init(struct mii_bus *bus,
149 return 0; 150 return 0;
150} 151}
151 152
152static void __devinit add_phy(struct mii_bus *bus, struct device_node *np)
153{
154 const u32 *data;
155 int len, id, irq;
156
157 data = of_get_property(np, "reg", &len);
158 if (!data || len != 4)
159 return;
160
161 id = *data;
162 bus->phy_mask &= ~(1 << id);
163
164 irq = of_irq_to_resource(np, 0, NULL);
165 if (irq != NO_IRQ)
166 bus->irq[id] = irq;
167}
168
169static int __devinit fs_enet_mdio_probe(struct of_device *ofdev, 153static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
170 const struct of_device_id *match) 154 const struct of_device_id *match)
171{ 155{
172 struct device_node *np = NULL;
173 struct mii_bus *new_bus; 156 struct mii_bus *new_bus;
174 struct bb_info *bitbang; 157 struct bb_info *bitbang;
175 int ret = -ENOMEM; 158 int ret = -ENOMEM;
176 int i;
177 159
178 bitbang = kzalloc(sizeof(struct bb_info), GFP_KERNEL); 160 bitbang = kzalloc(sizeof(struct bb_info), GFP_KERNEL);
179 if (!bitbang) 161 if (!bitbang)
@@ -196,17 +178,10 @@ static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
196 if (!new_bus->irq) 178 if (!new_bus->irq)
197 goto out_unmap_regs; 179 goto out_unmap_regs;
198 180
199 for (i = 0; i < PHY_MAX_ADDR; i++)
200 new_bus->irq[i] = -1;
201
202 while ((np = of_get_next_child(ofdev->node, np)))
203 if (!strcmp(np->type, "ethernet-phy"))
204 add_phy(new_bus, np);
205
206 new_bus->parent = &ofdev->dev; 181 new_bus->parent = &ofdev->dev;
207 dev_set_drvdata(&ofdev->dev, new_bus); 182 dev_set_drvdata(&ofdev->dev, new_bus);
208 183
209 ret = mdiobus_register(new_bus); 184 ret = of_mdiobus_register(new_bus, ofdev->node);
210 if (ret) 185 if (ret)
211 goto out_free_irqs; 186 goto out_free_irqs;
212 187
diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c
index 28077cc1b949..75a09994d665 100644
--- a/drivers/net/fs_enet/mii-fec.c
+++ b/drivers/net/fs_enet/mii-fec.c
@@ -54,8 +54,7 @@ static int fs_enet_fec_mii_read(struct mii_bus *bus , int phy_id, int location)
54 fec_t __iomem *fecp = fec->fecp; 54 fec_t __iomem *fecp = fec->fecp;
55 int i, ret = -1; 55 int i, ret = -1;
56 56
57 if ((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0) 57 BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
58 BUG();
59 58
60 /* Add PHY address to register command. */ 59 /* Add PHY address to register command. */
61 out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_read(location)); 60 out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_read(location));
@@ -79,8 +78,7 @@ static int fs_enet_fec_mii_write(struct mii_bus *bus, int phy_id, int location,
79 int i; 78 int i;
80 79
81 /* this must never happen */ 80 /* this must never happen */
82 if ((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0) 81 BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
83 BUG();
84 82
85 /* Add PHY address to register command. */ 83 /* Add PHY address to register command. */
86 out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_write(location, val)); 84 out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_write(location, val));
@@ -102,23 +100,6 @@ static int fs_enet_fec_mii_reset(struct mii_bus *bus)
102 return 0; 100 return 0;
103} 101}
104 102
105static void __devinit add_phy(struct mii_bus *bus, struct device_node *np)
106{
107 const u32 *data;
108 int len, id, irq;
109
110 data = of_get_property(np, "reg", &len);
111 if (!data || len != 4)
112 return;
113
114 id = *data;
115 bus->phy_mask &= ~(1 << id);
116
117 irq = of_irq_to_resource(np, 0, NULL);
118 if (irq != NO_IRQ)
119 bus->irq[id] = irq;
120}
121
122static int __devinit fs_enet_mdio_probe(struct of_device *ofdev, 103static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
123 const struct of_device_id *match) 104 const struct of_device_id *match)
124{ 105{
@@ -165,17 +146,10 @@ static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
165 if (!new_bus->irq) 146 if (!new_bus->irq)
166 goto out_unmap_regs; 147 goto out_unmap_regs;
167 148
168 for (i = 0; i < PHY_MAX_ADDR; i++)
169 new_bus->irq[i] = -1;
170
171 while ((np = of_get_next_child(ofdev->node, np)))
172 if (!strcmp(np->type, "ethernet-phy"))
173 add_phy(new_bus, np);
174
175 new_bus->parent = &ofdev->dev; 149 new_bus->parent = &ofdev->dev;
176 dev_set_drvdata(&ofdev->dev, new_bus); 150 dev_set_drvdata(&ofdev->dev, new_bus);
177 151
178 ret = mdiobus_register(new_bus); 152 ret = of_mdiobus_register(new_bus, ofdev->node);
179 if (ret) 153 if (ret)
180 goto out_free_irqs; 154 goto out_free_irqs;
181 155
diff --git a/drivers/net/fsl_pq_mdio.c b/drivers/net/fsl_pq_mdio.c
index aa1eb88c21fc..d12e0e0336f4 100644
--- a/drivers/net/fsl_pq_mdio.c
+++ b/drivers/net/fsl_pq_mdio.c
@@ -34,6 +34,7 @@
34#include <linux/mii.h> 34#include <linux/mii.h>
35#include <linux/phy.h> 35#include <linux/phy.h>
36#include <linux/of.h> 36#include <linux/of.h>
37#include <linux/of_mdio.h>
37#include <linux/of_platform.h> 38#include <linux/of_platform.h>
38 39
39#include <asm/io.h> 40#include <asm/io.h>
@@ -154,44 +155,6 @@ static int fsl_pq_mdio_reset(struct mii_bus *bus)
154 return 0; 155 return 0;
155} 156}
156 157
157/* Allocate an array which provides irq #s for each PHY on the given bus */
158static int *create_irq_map(struct device_node *np)
159{
160 int *irqs;
161 int i;
162 struct device_node *child = NULL;
163
164 irqs = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL);
165
166 if (!irqs)
167 return NULL;
168
169 for (i = 0; i < PHY_MAX_ADDR; i++)
170 irqs[i] = PHY_POLL;
171
172 while ((child = of_get_next_child(np, child)) != NULL) {
173 int irq = irq_of_parse_and_map(child, 0);
174 const u32 *id;
175
176 if (irq == NO_IRQ)
177 continue;
178
179 id = of_get_property(child, "reg", NULL);
180
181 if (!id)
182 continue;
183
184 if (*id < PHY_MAX_ADDR && *id >= 0)
185 irqs[*id] = irq;
186 else
187 printk(KERN_WARNING "%s: "
188 "%d is not a valid PHY address\n",
189 np->full_name, *id);
190 }
191
192 return irqs;
193}
194
195void fsl_pq_mdio_bus_name(char *name, struct device_node *np) 158void fsl_pq_mdio_bus_name(char *name, struct device_node *np)
196{ 159{
197 const u32 *addr; 160 const u32 *addr;
@@ -315,7 +278,7 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
315 278
316 new_bus->priv = (void __force *)regs; 279 new_bus->priv = (void __force *)regs;
317 280
318 new_bus->irq = create_irq_map(np); 281 new_bus->irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL);
319 282
320 if (NULL == new_bus->irq) { 283 if (NULL == new_bus->irq) {
321 err = -ENOMEM; 284 err = -ENOMEM;
@@ -384,15 +347,7 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
384 347
385 out_be32(tbipa, tbiaddr); 348 out_be32(tbipa, tbiaddr);
386 349
387 /* 350 err = of_mdiobus_register(new_bus, np);
388 * The TBIPHY-only buses will find PHYs at every address,
389 * so we mask them all but the TBI
390 */
391 if (of_device_is_compatible(np, "fsl,gianfar-tbi"))
392 new_bus->phy_mask = ~(1 << tbiaddr);
393
394 err = mdiobus_register(new_bus);
395
396 if (err) { 351 if (err) {
397 printk (KERN_ERR "%s: Cannot register as MDIO bus\n", 352 printk (KERN_ERR "%s: Cannot register as MDIO bus\n",
398 new_bus->name); 353 new_bus->name);
@@ -460,10 +415,10 @@ int __init fsl_pq_mdio_init(void)
460{ 415{
461 return of_register_platform_driver(&fsl_pq_mdio_driver); 416 return of_register_platform_driver(&fsl_pq_mdio_driver);
462} 417}
418module_init(fsl_pq_mdio_init);
463 419
464void fsl_pq_mdio_exit(void) 420void fsl_pq_mdio_exit(void)
465{ 421{
466 of_unregister_platform_driver(&fsl_pq_mdio_driver); 422 of_unregister_platform_driver(&fsl_pq_mdio_driver);
467} 423}
468subsys_initcall_sync(fsl_pq_mdio_init);
469module_exit(fsl_pq_mdio_exit); 424module_exit(fsl_pq_mdio_exit);
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index a0519184e54e..4ae1d259fced 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -75,6 +75,7 @@
75#include <linux/if_vlan.h> 75#include <linux/if_vlan.h>
76#include <linux/spinlock.h> 76#include <linux/spinlock.h>
77#include <linux/mm.h> 77#include <linux/mm.h>
78#include <linux/of_mdio.h>
78#include <linux/of_platform.h> 79#include <linux/of_platform.h>
79#include <linux/ip.h> 80#include <linux/ip.h>
80#include <linux/tcp.h> 81#include <linux/tcp.h>
@@ -168,17 +169,13 @@ static inline int gfar_uses_fcb(struct gfar_private *priv)
168 169
169static int gfar_of_init(struct net_device *dev) 170static int gfar_of_init(struct net_device *dev)
170{ 171{
171 struct device_node *phy, *mdio;
172 const unsigned int *id;
173 const char *model; 172 const char *model;
174 const char *ctype; 173 const char *ctype;
175 const void *mac_addr; 174 const void *mac_addr;
176 const phandle *ph;
177 u64 addr, size; 175 u64 addr, size;
178 int err = 0; 176 int err = 0;
179 struct gfar_private *priv = netdev_priv(dev); 177 struct gfar_private *priv = netdev_priv(dev);
180 struct device_node *np = priv->node; 178 struct device_node *np = priv->node;
181 char bus_name[MII_BUS_ID_SIZE];
182 const u32 *stash; 179 const u32 *stash;
183 const u32 *stash_len; 180 const u32 *stash_len;
184 const u32 *stash_idx; 181 const u32 *stash_idx;
@@ -264,8 +261,8 @@ static int gfar_of_init(struct net_device *dev)
264 if (of_get_property(np, "fsl,magic-packet", NULL)) 261 if (of_get_property(np, "fsl,magic-packet", NULL))
265 priv->device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET; 262 priv->device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
266 263
267 ph = of_get_property(np, "phy-handle", NULL); 264 priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
268 if (ph == NULL) { 265 if (!priv->phy_node) {
269 u32 *fixed_link; 266 u32 *fixed_link;
270 267
271 fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL); 268 fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
@@ -273,57 +270,10 @@ static int gfar_of_init(struct net_device *dev)
273 err = -ENODEV; 270 err = -ENODEV;
274 goto err_out; 271 goto err_out;
275 } 272 }
276
277 snprintf(priv->phy_bus_id, sizeof(priv->phy_bus_id),
278 PHY_ID_FMT, "0", fixed_link[0]);
279 } else {
280 phy = of_find_node_by_phandle(*ph);
281
282 if (phy == NULL) {
283 err = -ENODEV;
284 goto err_out;
285 }
286
287 mdio = of_get_parent(phy);
288
289 id = of_get_property(phy, "reg", NULL);
290
291 of_node_put(phy);
292
293 fsl_pq_mdio_bus_name(bus_name, mdio);
294 of_node_put(mdio);
295 snprintf(priv->phy_bus_id, sizeof(priv->phy_bus_id), "%s:%02x",
296 bus_name, *id);
297 } 273 }
298 274
299 /* Find the TBI PHY. If it's not there, we don't support SGMII */ 275 /* Find the TBI PHY. If it's not there, we don't support SGMII */
300 ph = of_get_property(np, "tbi-handle", NULL); 276 priv->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
301 if (ph) {
302 struct device_node *tbi = of_find_node_by_phandle(*ph);
303 struct of_device *ofdev;
304 struct mii_bus *bus;
305
306 if (!tbi)
307 return 0;
308
309 mdio = of_get_parent(tbi);
310 if (!mdio)
311 return 0;
312
313 ofdev = of_find_device_by_node(mdio);
314
315 of_node_put(mdio);
316
317 id = of_get_property(tbi, "reg", NULL);
318 if (!id)
319 return 0;
320
321 of_node_put(tbi);
322
323 bus = dev_get_drvdata(&ofdev->dev);
324
325 priv->tbiphy = bus->phy_map[*id];
326 }
327 277
328 return 0; 278 return 0;
329 279
@@ -529,6 +479,10 @@ static int gfar_probe(struct of_device *ofdev,
529register_fail: 479register_fail:
530 iounmap(priv->regs); 480 iounmap(priv->regs);
531regs_fail: 481regs_fail:
482 if (priv->phy_node)
483 of_node_put(priv->phy_node);
484 if (priv->tbi_node)
485 of_node_put(priv->tbi_node);
532 free_netdev(dev); 486 free_netdev(dev);
533 return err; 487 return err;
534} 488}
@@ -537,6 +491,11 @@ static int gfar_remove(struct of_device *ofdev)
537{ 491{
538 struct gfar_private *priv = dev_get_drvdata(&ofdev->dev); 492 struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
539 493
494 if (priv->phy_node)
495 of_node_put(priv->phy_node);
496 if (priv->tbi_node)
497 of_node_put(priv->tbi_node);
498
540 dev_set_drvdata(&ofdev->dev, NULL); 499 dev_set_drvdata(&ofdev->dev, NULL);
541 500
542 iounmap(priv->regs); 501 iounmap(priv->regs);
@@ -690,7 +649,6 @@ static int init_phy(struct net_device *dev)
690 uint gigabit_support = 649 uint gigabit_support =
691 priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT ? 650 priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT ?
692 SUPPORTED_1000baseT_Full : 0; 651 SUPPORTED_1000baseT_Full : 0;
693 struct phy_device *phydev;
694 phy_interface_t interface; 652 phy_interface_t interface;
695 653
696 priv->oldlink = 0; 654 priv->oldlink = 0;
@@ -699,21 +657,21 @@ static int init_phy(struct net_device *dev)
699 657
700 interface = gfar_get_interface(dev); 658 interface = gfar_get_interface(dev);
701 659
702 phydev = phy_connect(dev, priv->phy_bus_id, &adjust_link, 0, interface); 660 if (priv->phy_node) {
661 priv->phydev = of_phy_connect(dev, priv->phy_node, &adjust_link,
662 0, interface);
663 if (!priv->phydev) {
664 dev_err(&dev->dev, "error: Could not attach to PHY\n");
665 return -ENODEV;
666 }
667 }
703 668
704 if (interface == PHY_INTERFACE_MODE_SGMII) 669 if (interface == PHY_INTERFACE_MODE_SGMII)
705 gfar_configure_serdes(dev); 670 gfar_configure_serdes(dev);
706 671
707 if (IS_ERR(phydev)) {
708 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
709 return PTR_ERR(phydev);
710 }
711
712 /* Remove any features not supported by the controller */ 672 /* Remove any features not supported by the controller */
713 phydev->supported &= (GFAR_SUPPORTED | gigabit_support); 673 priv->phydev->supported &= (GFAR_SUPPORTED | gigabit_support);
714 phydev->advertising = phydev->supported; 674 priv->phydev->advertising = priv->phydev->supported;
715
716 priv->phydev = phydev;
717 675
718 return 0; 676 return 0;
719} 677}
@@ -730,10 +688,17 @@ static int init_phy(struct net_device *dev)
730static void gfar_configure_serdes(struct net_device *dev) 688static void gfar_configure_serdes(struct net_device *dev)
731{ 689{
732 struct gfar_private *priv = netdev_priv(dev); 690 struct gfar_private *priv = netdev_priv(dev);
691 struct phy_device *tbiphy;
733 692
734 if (!priv->tbiphy) { 693 if (!priv->tbi_node) {
735 printk(KERN_WARNING "SGMII mode requires that the device " 694 dev_warn(&dev->dev, "error: SGMII mode requires that the "
736 "tree specify a tbi-handle\n"); 695 "device tree specify a tbi-handle\n");
696 return;
697 }
698
699 tbiphy = of_phy_find_device(priv->tbi_node);
700 if (!tbiphy) {
701 dev_err(&dev->dev, "error: Could not get TBI device\n");
737 return; 702 return;
738 } 703 }
739 704
@@ -743,17 +708,17 @@ static void gfar_configure_serdes(struct net_device *dev)
743 * everything for us? Resetting it takes the link down and requires 708 * everything for us? Resetting it takes the link down and requires
744 * several seconds for it to come back. 709 * several seconds for it to come back.
745 */ 710 */
746 if (phy_read(priv->tbiphy, MII_BMSR) & BMSR_LSTATUS) 711 if (phy_read(tbiphy, MII_BMSR) & BMSR_LSTATUS)
747 return; 712 return;
748 713
749 /* Single clk mode, mii mode off(for serdes communication) */ 714 /* Single clk mode, mii mode off(for serdes communication) */
750 phy_write(priv->tbiphy, MII_TBICON, TBICON_CLK_SELECT); 715 phy_write(tbiphy, MII_TBICON, TBICON_CLK_SELECT);
751 716
752 phy_write(priv->tbiphy, MII_ADVERTISE, 717 phy_write(tbiphy, MII_ADVERTISE,
753 ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE | 718 ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
754 ADVERTISE_1000XPSE_ASYM); 719 ADVERTISE_1000XPSE_ASYM);
755 720
756 phy_write(priv->tbiphy, MII_BMCR, BMCR_ANENABLE | 721 phy_write(tbiphy, MII_BMCR, BMCR_ANENABLE |
757 BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000); 722 BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
758} 723}
759 724
@@ -1242,7 +1207,8 @@ static int gfar_enet_open(struct net_device *dev)
1242static inline struct txfcb *gfar_add_fcb(struct sk_buff *skb) 1207static inline struct txfcb *gfar_add_fcb(struct sk_buff *skb)
1243{ 1208{
1244 struct txfcb *fcb = (struct txfcb *)skb_push(skb, GMAC_FCB_LEN); 1209 struct txfcb *fcb = (struct txfcb *)skb_push(skb, GMAC_FCB_LEN);
1245 cacheable_memzero(fcb, GMAC_FCB_LEN); 1210
1211 memset(fcb, 0, GMAC_FCB_LEN);
1246 1212
1247 return fcb; 1213 return fcb;
1248} 1214}
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
index cf352961ae9b..2cd94338b5d3 100644
--- a/drivers/net/gianfar.h
+++ b/drivers/net/gianfar.h
@@ -779,7 +779,8 @@ struct gfar_private {
779 spinlock_t bflock; 779 spinlock_t bflock;
780 780
781 phy_interface_t interface; 781 phy_interface_t interface;
782 char phy_bus_id[BUS_ID_SIZE]; 782 struct device_node *phy_node;
783 struct device_node *tbi_node;
783 u32 device_flags; 784 u32 device_flags;
784 unsigned char rx_csum_enable:1, 785 unsigned char rx_csum_enable:1,
785 extended_hash:1, 786 extended_hash:1,
@@ -793,7 +794,6 @@ struct gfar_private {
793 794
794 /* PHY stuff */ 795 /* PHY stuff */
795 struct phy_device *phydev; 796 struct phy_device *phydev;
796 struct phy_device *tbiphy;
797 struct mii_bus *mii_bus; 797 struct mii_bus *mii_bus;
798 int oldspeed; 798 int oldspeed;
799 int oldduplex; 799 int oldduplex;
diff --git a/drivers/net/hamachi.c b/drivers/net/hamachi.c
index 310ee035067c..26151fa35df5 100644
--- a/drivers/net/hamachi.c
+++ b/drivers/net/hamachi.c
@@ -1163,7 +1163,7 @@ static void hamachi_tx_timeout(struct net_device *dev)
1163 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing); 1163 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1164 1164
1165 /* Trigger an immediate transmit demand. */ 1165 /* Trigger an immediate transmit demand. */
1166 dev->trans_start = jiffies; 1166 dev->trans_start = jiffies; /* prevent tx timeout */
1167 hmp->stats.tx_errors++; 1167 hmp->stats.tx_errors++;
1168 1168
1169 /* Restart the chip's Tx/Rx processes . */ 1169 /* Restart the chip's Tx/Rx processes . */
@@ -1364,7 +1364,6 @@ static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1364 hmp->tx_full = 1; 1364 hmp->tx_full = 1;
1365 netif_stop_queue(dev); 1365 netif_stop_queue(dev);
1366 } 1366 }
1367 dev->trans_start = jiffies;
1368 1367
1369 if (hamachi_debug > 4) { 1368 if (hamachi_debug > 4) {
1370 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n", 1369 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
diff --git a/drivers/net/hp100.c b/drivers/net/hp100.c
index de3f49f991a3..8feda9fe8297 100644
--- a/drivers/net/hp100.c
+++ b/drivers/net/hp100.c
@@ -2864,7 +2864,7 @@ static int __init hp100_eisa_probe (struct device *gendev)
2864 printk("hp100: %s: EISA adapter found at 0x%x\n", dev->name, 2864 printk("hp100: %s: EISA adapter found at 0x%x\n", dev->name,
2865 dev->base_addr); 2865 dev->base_addr);
2866#endif 2866#endif
2867 gendev->driver_data = dev; 2867 dev_set_drvdata(gendev, dev);
2868 return 0; 2868 return 0;
2869 out1: 2869 out1:
2870 free_netdev(dev); 2870 free_netdev(dev);
@@ -2873,7 +2873,7 @@ static int __init hp100_eisa_probe (struct device *gendev)
2873 2873
2874static int __devexit hp100_eisa_remove (struct device *gendev) 2874static int __devexit hp100_eisa_remove (struct device *gendev)
2875{ 2875{
2876 struct net_device *dev = gendev->driver_data; 2876 struct net_device *dev = dev_get_drvdata(gendev);
2877 cleanup_dev(dev); 2877 cleanup_dev(dev);
2878 return 0; 2878 return 0;
2879} 2879}
diff --git a/drivers/net/hplance.c b/drivers/net/hplance.c
index 2e802634d366..3e3528ade259 100644
--- a/drivers/net/hplance.c
+++ b/drivers/net/hplance.c
@@ -71,6 +71,19 @@ static struct dio_driver hplance_driver = {
71 .remove = __devexit_p(hplance_remove_one), 71 .remove = __devexit_p(hplance_remove_one),
72}; 72};
73 73
74static const struct net_device_ops hplance_netdev_ops = {
75 .ndo_open = hplance_open,
76 .ndo_stop = hplance_close,
77 .ndo_start_xmit = lance_start_xmit,
78 .ndo_set_multicast_list = lance_set_multicast,
79 .ndo_change_mtu = eth_change_mtu,
80 .ndo_validate_addr = eth_validate_addr,
81 .ndo_set_mac_address = eth_mac_addr,
82#ifdef CONFIG_NET_POLL_CONTROLLER
83 .ndo_poll_controller = lance_poll,
84#endif
85};
86
74/* Find all the HP Lance boards and initialise them... */ 87/* Find all the HP Lance boards and initialise them... */
75static int __devinit hplance_init_one(struct dio_dev *d, 88static int __devinit hplance_init_one(struct dio_dev *d,
76 const struct dio_device_id *ent) 89 const struct dio_device_id *ent)
@@ -135,13 +148,7 @@ static void __init hplance_init(struct net_device *dev, struct dio_dev *d)
135 148
136 /* Fill the dev fields */ 149 /* Fill the dev fields */
137 dev->base_addr = va; 150 dev->base_addr = va;
138 dev->open = &hplance_open; 151 dev->netdev_ops = &hplance_netdev_ops;
139 dev->stop = &hplance_close;
140#ifdef CONFIG_NET_POLL_CONTROLLER
141 dev->poll_controller = lance_poll;
142#endif
143 dev->hard_start_xmit = &lance_start_xmit;
144 dev->set_multicast_list = &lance_set_multicast;
145 dev->dma = 0; 152 dev->dma = 0;
146 153
147 for (i=0; i<6; i++) { 154 for (i=0; i<6; i++) {
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c
index 5c6315df86b9..0995c438f286 100644
--- a/drivers/net/ibmveth.c
+++ b/drivers/net/ibmveth.c
@@ -1203,6 +1203,20 @@ static unsigned long ibmveth_get_desired_dma(struct vio_dev *vdev)
1203 return ret; 1203 return ret;
1204} 1204}
1205 1205
1206static const struct net_device_ops ibmveth_netdev_ops = {
1207 .ndo_open = ibmveth_open,
1208 .ndo_stop = ibmveth_close,
1209 .ndo_start_xmit = ibmveth_start_xmit,
1210 .ndo_set_multicast_list = ibmveth_set_multicast_list,
1211 .ndo_do_ioctl = ibmveth_ioctl,
1212 .ndo_change_mtu = ibmveth_change_mtu,
1213 .ndo_validate_addr = eth_validate_addr,
1214 .ndo_set_mac_address = eth_mac_addr,
1215#ifdef CONFIG_NET_POLL_CONTROLLER
1216 .ndo_poll_controller = ibmveth_poll_controller,
1217#endif
1218};
1219
1206static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id) 1220static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id)
1207{ 1221{
1208 int rc, i; 1222 int rc, i;
@@ -1241,7 +1255,7 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_
1241 return -ENOMEM; 1255 return -ENOMEM;
1242 1256
1243 adapter = netdev_priv(netdev); 1257 adapter = netdev_priv(netdev);
1244 dev->dev.driver_data = netdev; 1258 dev_set_drvdata(&dev->dev, netdev);
1245 1259
1246 adapter->vdev = dev; 1260 adapter->vdev = dev;
1247 adapter->netdev = netdev; 1261 adapter->netdev = netdev;
@@ -1265,21 +1279,13 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_
1265 memcpy(&adapter->mac_addr, mac_addr_p, 6); 1279 memcpy(&adapter->mac_addr, mac_addr_p, 6);
1266 1280
1267 netdev->irq = dev->irq; 1281 netdev->irq = dev->irq;
1268 netdev->open = ibmveth_open; 1282 netdev->netdev_ops = &ibmveth_netdev_ops;
1269 netdev->stop = ibmveth_close; 1283 netdev->ethtool_ops = &netdev_ethtool_ops;
1270 netdev->hard_start_xmit = ibmveth_start_xmit;
1271 netdev->set_multicast_list = ibmveth_set_multicast_list;
1272 netdev->do_ioctl = ibmveth_ioctl;
1273 netdev->ethtool_ops = &netdev_ethtool_ops;
1274 netdev->change_mtu = ibmveth_change_mtu;
1275 SET_NETDEV_DEV(netdev, &dev->dev); 1284 SET_NETDEV_DEV(netdev, &dev->dev);
1276#ifdef CONFIG_NET_POLL_CONTROLLER
1277 netdev->poll_controller = ibmveth_poll_controller;
1278#endif
1279 netdev->features |= NETIF_F_LLTX; 1285 netdev->features |= NETIF_F_LLTX;
1280 spin_lock_init(&adapter->stats_lock); 1286 spin_lock_init(&adapter->stats_lock);
1281 1287
1282 memcpy(&netdev->dev_addr, &adapter->mac_addr, netdev->addr_len); 1288 memcpy(netdev->dev_addr, &adapter->mac_addr, netdev->addr_len);
1283 1289
1284 for(i = 0; i<IbmVethNumBufferPools; i++) { 1290 for(i = 0; i<IbmVethNumBufferPools; i++) {
1285 struct kobject *kobj = &adapter->rx_buff_pool[i].kobj; 1291 struct kobject *kobj = &adapter->rx_buff_pool[i].kobj;
@@ -1335,7 +1341,7 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_
1335 1341
1336static int __devexit ibmveth_remove(struct vio_dev *dev) 1342static int __devexit ibmveth_remove(struct vio_dev *dev)
1337{ 1343{
1338 struct net_device *netdev = dev->dev.driver_data; 1344 struct net_device *netdev = dev_get_drvdata(&dev->dev);
1339 struct ibmveth_adapter *adapter = netdev_priv(netdev); 1345 struct ibmveth_adapter *adapter = netdev_priv(netdev);
1340 int i; 1346 int i;
1341 1347
@@ -1368,8 +1374,8 @@ static void ibmveth_proc_unregister_driver(void)
1368static int ibmveth_show(struct seq_file *seq, void *v) 1374static int ibmveth_show(struct seq_file *seq, void *v)
1369{ 1375{
1370 struct ibmveth_adapter *adapter = seq->private; 1376 struct ibmveth_adapter *adapter = seq->private;
1371 char *current_mac = ((char*) &adapter->netdev->dev_addr); 1377 char *current_mac = (char *) adapter->netdev->dev_addr;
1372 char *firmware_mac = ((char*) &adapter->mac_addr) ; 1378 char *firmware_mac = (char *) &adapter->mac_addr;
1373 1379
1374 seq_printf(seq, "%s %s\n\n", ibmveth_driver_string, ibmveth_driver_version); 1380 seq_printf(seq, "%s %s\n\n", ibmveth_driver_string, ibmveth_driver_version);
1375 1381
@@ -1468,8 +1474,8 @@ const char * buf, size_t count)
1468 struct ibmveth_buff_pool *pool = container_of(kobj, 1474 struct ibmveth_buff_pool *pool = container_of(kobj,
1469 struct ibmveth_buff_pool, 1475 struct ibmveth_buff_pool,
1470 kobj); 1476 kobj);
1471 struct net_device *netdev = 1477 struct net_device *netdev = dev_get_drvdata(
1472 container_of(kobj->parent, struct device, kobj)->driver_data; 1478 container_of(kobj->parent, struct device, kobj));
1473 struct ibmveth_adapter *adapter = netdev_priv(netdev); 1479 struct ibmveth_adapter *adapter = netdev_priv(netdev);
1474 long value = simple_strtol(buf, NULL, 10); 1480 long value = simple_strtol(buf, NULL, 10);
1475 long rc; 1481 long rc;
diff --git a/drivers/net/ifb.c b/drivers/net/ifb.c
index 60a263001933..96713ef06298 100644
--- a/drivers/net/ifb.c
+++ b/drivers/net/ifb.c
@@ -156,6 +156,7 @@ static void ifb_setup(struct net_device *dev)
156 156
157 dev->flags |= IFF_NOARP; 157 dev->flags |= IFF_NOARP;
158 dev->flags &= ~IFF_MULTICAST; 158 dev->flags &= ~IFF_MULTICAST;
159 dev->priv_flags &= ~IFF_XMIT_DST_RELEASE;
159 random_ether_addr(dev->dev_addr); 160 random_ether_addr(dev->dev_addr);
160} 161}
161 162
diff --git a/drivers/net/igb/e1000_82575.h b/drivers/net/igb/e1000_82575.h
index eaf977050368..0f16abab2565 100644
--- a/drivers/net/igb/e1000_82575.h
+++ b/drivers/net/igb/e1000_82575.h
@@ -130,6 +130,7 @@ struct e1000_adv_tx_context_desc {
130#define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */ 130#define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */
131#define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */ 131#define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */
132#define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */ 132#define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */
133#define E1000_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 packet TYPE of SCTP */
133/* IPSec Encrypt Enable for ESP */ 134/* IPSec Encrypt Enable for ESP */
134#define E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */ 135#define E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */
135#define E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */ 136#define E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */
diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h
index ad2d319d0f8b..3bda3db73f1f 100644
--- a/drivers/net/igb/e1000_defines.h
+++ b/drivers/net/igb/e1000_defines.h
@@ -289,8 +289,9 @@
289#define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400 289#define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400
290 290
291/* Receive Checksum Control */ 291/* Receive Checksum Control */
292#define E1000_RXCSUM_IPOFL 0x00000100 /* IPv4 checksum offload */
292#define E1000_RXCSUM_TUOFL 0x00000200 /* TCP / UDP checksum offload */ 293#define E1000_RXCSUM_TUOFL 0x00000200 /* TCP / UDP checksum offload */
293#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */ 294#define E1000_RXCSUM_CRCOFL 0x00000800 /* CRC32 offload enable */
294#define E1000_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */ 295#define E1000_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */
295 296
296/* Header split receive */ 297/* Header split receive */
diff --git a/drivers/net/igb/e1000_mbx.c b/drivers/net/igb/e1000_mbx.c
index 840782fb5736..ed9058eca45c 100644
--- a/drivers/net/igb/e1000_mbx.c
+++ b/drivers/net/igb/e1000_mbx.c
@@ -140,13 +140,13 @@ static s32 igb_poll_for_msg(struct e1000_hw *hw, u16 mbx_id)
140 struct e1000_mbx_info *mbx = &hw->mbx; 140 struct e1000_mbx_info *mbx = &hw->mbx;
141 int countdown = mbx->timeout; 141 int countdown = mbx->timeout;
142 142
143 if (!mbx->ops.check_for_msg) 143 if (!countdown || !mbx->ops.check_for_msg)
144 goto out; 144 goto out;
145 145
146 while (mbx->ops.check_for_msg(hw, mbx_id)) { 146 while (mbx->ops.check_for_msg(hw, mbx_id)) {
147 countdown--;
147 if (!countdown) 148 if (!countdown)
148 break; 149 break;
149 countdown--;
150 udelay(mbx->usec_delay); 150 udelay(mbx->usec_delay);
151 } 151 }
152out: 152out:
@@ -165,13 +165,13 @@ static s32 igb_poll_for_ack(struct e1000_hw *hw, u16 mbx_id)
165 struct e1000_mbx_info *mbx = &hw->mbx; 165 struct e1000_mbx_info *mbx = &hw->mbx;
166 int countdown = mbx->timeout; 166 int countdown = mbx->timeout;
167 167
168 if (!mbx->ops.check_for_ack) 168 if (!countdown || !mbx->ops.check_for_ack)
169 goto out; 169 goto out;
170 170
171 while (mbx->ops.check_for_ack(hw, mbx_id)) { 171 while (mbx->ops.check_for_ack(hw, mbx_id)) {
172 countdown--;
172 if (!countdown) 173 if (!countdown)
173 break; 174 break;
174 countdown--;
175 udelay(mbx->usec_delay); 175 udelay(mbx->usec_delay);
176 } 176 }
177out: 177out:
diff --git a/drivers/net/igb/e1000_phy.h b/drivers/net/igb/e1000_phy.h
index 3228a862031f..ebe4b616db8a 100644
--- a/drivers/net/igb/e1000_phy.h
+++ b/drivers/net/igb/e1000_phy.h
@@ -80,7 +80,7 @@ s32 igb_phy_init_script_igp3(struct e1000_hw *hw);
80#define IGP02E1000_PM_D3_LPLU 0x0004 /* For all other states */ 80#define IGP02E1000_PM_D3_LPLU 0x0004 /* For all other states */
81#define IGP01E1000_PLHR_SS_DOWNGRADE 0x8000 81#define IGP01E1000_PLHR_SS_DOWNGRADE 0x8000
82#define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002 82#define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002
83#define IGP01E1000_PSSR_MDIX 0x0008 83#define IGP01E1000_PSSR_MDIX 0x0800
84#define IGP01E1000_PSSR_SPEED_MASK 0xC000 84#define IGP01E1000_PSSR_SPEED_MASK 0xC000
85#define IGP01E1000_PSSR_SPEED_1000MBPS 0xC000 85#define IGP01E1000_PSSR_SPEED_1000MBPS 0xC000
86#define IGP02E1000_PHY_CHANNEL_NUM 4 86#define IGP02E1000_PHY_CHANNEL_NUM 4
diff --git a/drivers/net/igb/e1000_regs.h b/drivers/net/igb/e1000_regs.h
index 0bd7728fe469..6e5924511e40 100644
--- a/drivers/net/igb/e1000_regs.h
+++ b/drivers/net/igb/e1000_regs.h
@@ -142,6 +142,7 @@ enum {
142#define E1000_SYNQF(_n) (0x055FC + (4 * (_n))) /* SYN Packet Queue Fltr */ 142#define E1000_SYNQF(_n) (0x055FC + (4 * (_n))) /* SYN Packet Queue Fltr */
143#define E1000_ETQF(_n) (0x05CB0 + (4 * (_n))) /* EType Queue Fltr */ 143#define E1000_ETQF(_n) (0x05CB0 + (4 * (_n))) /* EType Queue Fltr */
144 144
145#define E1000_RQDPC(_n) (0x0C030 + ((_n) * 0x40))
145/* Split and Replication RX Control - RW */ 146/* Split and Replication RX Control - RW */
146/* 147/*
147 * Convenience macros 148 * Convenience macros
diff --git a/drivers/net/igb/igb.h b/drivers/net/igb/igb.h
index 4e8464b9df2e..b2c98dea9eed 100644
--- a/drivers/net/igb/igb.h
+++ b/drivers/net/igb/igb.h
@@ -137,11 +137,17 @@ struct igb_buffer {
137 }; 137 };
138}; 138};
139 139
140struct igb_queue_stats { 140struct igb_tx_queue_stats {
141 u64 packets; 141 u64 packets;
142 u64 bytes; 142 u64 bytes;
143}; 143};
144 144
145struct igb_rx_queue_stats {
146 u64 packets;
147 u64 bytes;
148 u64 drops;
149};
150
145struct igb_ring { 151struct igb_ring {
146 struct igb_adapter *adapter; /* backlink */ 152 struct igb_adapter *adapter; /* backlink */
147 void *desc; /* descriptor ring memory */ 153 void *desc; /* descriptor ring memory */
@@ -167,12 +173,13 @@ struct igb_ring {
167 union { 173 union {
168 /* TX */ 174 /* TX */
169 struct { 175 struct {
170 struct igb_queue_stats tx_stats; 176 struct igb_tx_queue_stats tx_stats;
171 bool detect_tx_hung; 177 bool detect_tx_hung;
172 }; 178 };
173 /* RX */ 179 /* RX */
174 struct { 180 struct {
175 struct igb_queue_stats rx_stats; 181 struct igb_rx_queue_stats rx_stats;
182 u64 rx_queue_drops;
176 struct napi_struct napi; 183 struct napi_struct napi;
177 int set_itr; 184 int set_itr;
178 struct igb_ring *buddy; 185 struct igb_ring *buddy;
@@ -238,7 +245,6 @@ struct igb_adapter {
238 u64 hw_csum_err; 245 u64 hw_csum_err;
239 u64 hw_csum_good; 246 u64 hw_csum_good;
240 u32 alloc_rx_buff_failed; 247 u32 alloc_rx_buff_failed;
241 bool rx_csum;
242 u32 gorc; 248 u32 gorc;
243 u64 gorc_old; 249 u64 gorc_old;
244 u16 rx_ps_hdr_size; 250 u16 rx_ps_hdr_size;
@@ -286,6 +292,7 @@ struct igb_adapter {
286#define IGB_FLAG_DCA_ENABLED (1 << 1) 292#define IGB_FLAG_DCA_ENABLED (1 << 1)
287#define IGB_FLAG_QUAD_PORT_A (1 << 2) 293#define IGB_FLAG_QUAD_PORT_A (1 << 2)
288#define IGB_FLAG_NEED_CTX_IDX (1 << 3) 294#define IGB_FLAG_NEED_CTX_IDX (1 << 3)
295#define IGB_FLAG_RX_CSUM_DISABLED (1 << 4)
289 296
290enum e1000_state_t { 297enum e1000_state_t {
291 __IGB_TESTING, 298 __IGB_TESTING,
diff --git a/drivers/net/igb/igb_ethtool.c b/drivers/net/igb/igb_ethtool.c
index 27eae49e79c2..9598ac09f4b8 100644
--- a/drivers/net/igb/igb_ethtool.c
+++ b/drivers/net/igb/igb_ethtool.c
@@ -64,6 +64,7 @@ static const struct igb_stats igb_gstrings_stats[] = {
64 { "rx_crc_errors", IGB_STAT(stats.crcerrs) }, 64 { "rx_crc_errors", IGB_STAT(stats.crcerrs) },
65 { "rx_frame_errors", IGB_STAT(net_stats.rx_frame_errors) }, 65 { "rx_frame_errors", IGB_STAT(net_stats.rx_frame_errors) },
66 { "rx_no_buffer_count", IGB_STAT(stats.rnbc) }, 66 { "rx_no_buffer_count", IGB_STAT(stats.rnbc) },
67 { "rx_queue_drop_packet_count", IGB_STAT(net_stats.rx_fifo_errors) },
67 { "rx_missed_errors", IGB_STAT(stats.mpc) }, 68 { "rx_missed_errors", IGB_STAT(stats.mpc) },
68 { "tx_aborted_errors", IGB_STAT(stats.ecol) }, 69 { "tx_aborted_errors", IGB_STAT(stats.ecol) },
69 { "tx_carrier_errors", IGB_STAT(stats.tncrs) }, 70 { "tx_carrier_errors", IGB_STAT(stats.tncrs) },
@@ -96,9 +97,10 @@ static const struct igb_stats igb_gstrings_stats[] = {
96}; 97};
97 98
98#define IGB_QUEUE_STATS_LEN \ 99#define IGB_QUEUE_STATS_LEN \
99 ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues + \ 100 (((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues)* \
100 ((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues) * \ 101 (sizeof(struct igb_rx_queue_stats) / sizeof(u64))) + \
101 (sizeof(struct igb_queue_stats) / sizeof(u64))) 102 ((((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues) * \
103 (sizeof(struct igb_tx_queue_stats) / sizeof(u64))))
102#define IGB_GLOBAL_STATS_LEN \ 104#define IGB_GLOBAL_STATS_LEN \
103 sizeof(igb_gstrings_stats) / sizeof(struct igb_stats) 105 sizeof(igb_gstrings_stats) / sizeof(struct igb_stats)
104#define IGB_STATS_LEN (IGB_GLOBAL_STATS_LEN + IGB_QUEUE_STATS_LEN) 106#define IGB_STATS_LEN (IGB_GLOBAL_STATS_LEN + IGB_QUEUE_STATS_LEN)
@@ -275,13 +277,17 @@ static int igb_set_pauseparam(struct net_device *netdev,
275static u32 igb_get_rx_csum(struct net_device *netdev) 277static u32 igb_get_rx_csum(struct net_device *netdev)
276{ 278{
277 struct igb_adapter *adapter = netdev_priv(netdev); 279 struct igb_adapter *adapter = netdev_priv(netdev);
278 return adapter->rx_csum; 280 return !(adapter->flags & IGB_FLAG_RX_CSUM_DISABLED);
279} 281}
280 282
281static int igb_set_rx_csum(struct net_device *netdev, u32 data) 283static int igb_set_rx_csum(struct net_device *netdev, u32 data)
282{ 284{
283 struct igb_adapter *adapter = netdev_priv(netdev); 285 struct igb_adapter *adapter = netdev_priv(netdev);
284 adapter->rx_csum = data; 286
287 if (data)
288 adapter->flags &= ~IGB_FLAG_RX_CSUM_DISABLED;
289 else
290 adapter->flags |= IGB_FLAG_RX_CSUM_DISABLED;
285 291
286 return 0; 292 return 0;
287} 293}
@@ -293,10 +299,16 @@ static u32 igb_get_tx_csum(struct net_device *netdev)
293 299
294static int igb_set_tx_csum(struct net_device *netdev, u32 data) 300static int igb_set_tx_csum(struct net_device *netdev, u32 data)
295{ 301{
296 if (data) 302 struct igb_adapter *adapter = netdev_priv(netdev);
303
304 if (data) {
297 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); 305 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
298 else 306 if (adapter->hw.mac.type == e1000_82576)
299 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); 307 netdev->features |= NETIF_F_SCTP_CSUM;
308 } else {
309 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
310 NETIF_F_SCTP_CSUM);
311 }
300 312
301 return 0; 313 return 0;
302} 314}
@@ -1950,7 +1962,8 @@ static void igb_get_ethtool_stats(struct net_device *netdev,
1950{ 1962{
1951 struct igb_adapter *adapter = netdev_priv(netdev); 1963 struct igb_adapter *adapter = netdev_priv(netdev);
1952 u64 *queue_stat; 1964 u64 *queue_stat;
1953 int stat_count = sizeof(struct igb_queue_stats) / sizeof(u64); 1965 int stat_count_tx = sizeof(struct igb_tx_queue_stats) / sizeof(u64);
1966 int stat_count_rx = sizeof(struct igb_rx_queue_stats) / sizeof(u64);
1954 int j; 1967 int j;
1955 int i; 1968 int i;
1956 1969
@@ -1963,14 +1976,14 @@ static void igb_get_ethtool_stats(struct net_device *netdev,
1963 for (j = 0; j < adapter->num_tx_queues; j++) { 1976 for (j = 0; j < adapter->num_tx_queues; j++) {
1964 int k; 1977 int k;
1965 queue_stat = (u64 *)&adapter->tx_ring[j].tx_stats; 1978 queue_stat = (u64 *)&adapter->tx_ring[j].tx_stats;
1966 for (k = 0; k < stat_count; k++) 1979 for (k = 0; k < stat_count_tx; k++)
1967 data[i + k] = queue_stat[k]; 1980 data[i + k] = queue_stat[k];
1968 i += k; 1981 i += k;
1969 } 1982 }
1970 for (j = 0; j < adapter->num_rx_queues; j++) { 1983 for (j = 0; j < adapter->num_rx_queues; j++) {
1971 int k; 1984 int k;
1972 queue_stat = (u64 *)&adapter->rx_ring[j].rx_stats; 1985 queue_stat = (u64 *)&adapter->rx_ring[j].rx_stats;
1973 for (k = 0; k < stat_count; k++) 1986 for (k = 0; k < stat_count_rx; k++)
1974 data[i + k] = queue_stat[k]; 1987 data[i + k] = queue_stat[k];
1975 i += k; 1988 i += k;
1976 } 1989 }
@@ -2004,6 +2017,8 @@ static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2004 p += ETH_GSTRING_LEN; 2017 p += ETH_GSTRING_LEN;
2005 sprintf(p, "rx_queue_%u_bytes", i); 2018 sprintf(p, "rx_queue_%u_bytes", i);
2006 p += ETH_GSTRING_LEN; 2019 p += ETH_GSTRING_LEN;
2020 sprintf(p, "rx_queue_%u_drops", i);
2021 p += ETH_GSTRING_LEN;
2007 } 2022 }
2008/* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */ 2023/* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2009 break; 2024 break;
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index e25343588fc7..958b2879da48 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -942,6 +942,8 @@ int igb_up(struct igb_adapter *adapter)
942 rd32(E1000_ICR); 942 rd32(E1000_ICR);
943 igb_irq_enable(adapter); 943 igb_irq_enable(adapter);
944 944
945 netif_tx_start_all_queues(adapter->netdev);
946
945 /* Fire a link change interrupt to start the watchdog. */ 947 /* Fire a link change interrupt to start the watchdog. */
946 wr32(E1000_ICS, E1000_ICS_LSC); 948 wr32(E1000_ICS, E1000_ICS_LSC);
947 return 0; 949 return 0;
@@ -994,6 +996,11 @@ void igb_down(struct igb_adapter *adapter)
994 igb_reset(adapter); 996 igb_reset(adapter);
995 igb_clean_all_tx_rings(adapter); 997 igb_clean_all_tx_rings(adapter);
996 igb_clean_all_rx_rings(adapter); 998 igb_clean_all_rx_rings(adapter);
999#ifdef CONFIG_IGB_DCA
1000
1001 /* since we reset the hardware DCA settings were cleared */
1002 igb_setup_dca(adapter);
1003#endif
997} 1004}
998 1005
999void igb_reinit_locked(struct igb_adapter *adapter) 1006void igb_reinit_locked(struct igb_adapter *adapter)
@@ -1343,6 +1350,9 @@ static int __devinit igb_probe(struct pci_dev *pdev,
1343 if (pci_using_dac) 1350 if (pci_using_dac)
1344 netdev->features |= NETIF_F_HIGHDMA; 1351 netdev->features |= NETIF_F_HIGHDMA;
1345 1352
1353 if (adapter->hw.mac.type == e1000_82576)
1354 netdev->features |= NETIF_F_SCTP_CSUM;
1355
1346 adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw); 1356 adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1347 1357
1348 /* before reading the NVM, reset the controller to put the device in a 1358 /* before reading the NVM, reset the controller to put the device in a
@@ -1390,8 +1400,6 @@ static int __devinit igb_probe(struct pci_dev *pdev,
1390 1400
1391 igb_validate_mdi_setting(hw); 1401 igb_validate_mdi_setting(hw);
1392 1402
1393 adapter->rx_csum = 1;
1394
1395 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM, 1403 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1396 * enable the ACPI Magic Packet filter 1404 * enable the ACPI Magic Packet filter
1397 */ 1405 */
@@ -1442,22 +1450,18 @@ static int __devinit igb_probe(struct pci_dev *pdev,
1442 * driver. */ 1450 * driver. */
1443 igb_get_hw_control(adapter); 1451 igb_get_hw_control(adapter);
1444 1452
1445 /* tell the stack to leave us alone until igb_open() is called */
1446 netif_carrier_off(netdev);
1447 netif_tx_stop_all_queues(netdev);
1448
1449 strcpy(netdev->name, "eth%d"); 1453 strcpy(netdev->name, "eth%d");
1450 err = register_netdev(netdev); 1454 err = register_netdev(netdev);
1451 if (err) 1455 if (err)
1452 goto err_register; 1456 goto err_register;
1453 1457
1458 /* carrier off reporting is important to ethtool even BEFORE open */
1459 netif_carrier_off(netdev);
1460
1454#ifdef CONFIG_IGB_DCA 1461#ifdef CONFIG_IGB_DCA
1455 if (dca_add_requester(&pdev->dev) == 0) { 1462 if (dca_add_requester(&pdev->dev) == 0) {
1456 adapter->flags |= IGB_FLAG_DCA_ENABLED; 1463 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1457 dev_info(&pdev->dev, "DCA enabled\n"); 1464 dev_info(&pdev->dev, "DCA enabled\n");
1458 /* Always use CB2 mode, difference is masked
1459 * in the CB driver. */
1460 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
1461 igb_setup_dca(adapter); 1465 igb_setup_dca(adapter);
1462 } 1466 }
1463#endif 1467#endif
@@ -1699,6 +1703,8 @@ static int igb_open(struct net_device *netdev)
1699 if (test_bit(__IGB_TESTING, &adapter->state)) 1703 if (test_bit(__IGB_TESTING, &adapter->state))
1700 return -EBUSY; 1704 return -EBUSY;
1701 1705
1706 netif_carrier_off(netdev);
1707
1702 /* allocate transmit descriptors */ 1708 /* allocate transmit descriptors */
1703 err = igb_setup_all_tx_resources(adapter); 1709 err = igb_setup_all_tx_resources(adapter);
1704 if (err) 1710 if (err)
@@ -2231,29 +2237,24 @@ static void igb_configure_rx(struct igb_adapter *adapter)
2231 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX | 2237 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
2232 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX); 2238 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
2233 2239
2234
2235 wr32(E1000_MRQC, mrqc); 2240 wr32(E1000_MRQC, mrqc);
2236 2241 } else if (adapter->vfs_allocated_count) {
2237 /* Multiqueue and raw packet checksumming are mutually
2238 * exclusive. Note that this not the same as TCP/IP
2239 * checksumming, which works fine. */
2240 rxcsum = rd32(E1000_RXCSUM);
2241 rxcsum |= E1000_RXCSUM_PCSD;
2242 wr32(E1000_RXCSUM, rxcsum);
2243 } else {
2244 /* Enable multi-queue for sr-iov */ 2242 /* Enable multi-queue for sr-iov */
2245 if (adapter->vfs_allocated_count) 2243 wr32(E1000_MRQC, E1000_MRQC_ENABLE_VMDQ);
2246 wr32(E1000_MRQC, E1000_MRQC_ENABLE_VMDQ);
2247 /* Enable Receive Checksum Offload for TCP and UDP */
2248 rxcsum = rd32(E1000_RXCSUM);
2249 if (adapter->rx_csum)
2250 rxcsum |= E1000_RXCSUM_TUOFL | E1000_RXCSUM_IPPCSE;
2251 else
2252 rxcsum &= ~(E1000_RXCSUM_TUOFL | E1000_RXCSUM_IPPCSE);
2253
2254 wr32(E1000_RXCSUM, rxcsum);
2255 } 2244 }
2256 2245
2246 /* Enable Receive Checksum Offload for TCP and UDP */
2247 rxcsum = rd32(E1000_RXCSUM);
2248 /* Disable raw packet checksumming */
2249 rxcsum |= E1000_RXCSUM_PCSD;
2250
2251 if (adapter->hw.mac.type == e1000_82576)
2252 /* Enable Receive Checksum Offload for SCTP */
2253 rxcsum |= E1000_RXCSUM_CRCOFL;
2254
2255 /* Don't need to set TUOFL or IPOFL, they default to 1 */
2256 wr32(E1000_RXCSUM, rxcsum);
2257
2257 /* Set the default pool for the PF's first queue */ 2258 /* Set the default pool for the PF's first queue */
2258 igb_configure_vt_default_pool(adapter); 2259 igb_configure_vt_default_pool(adapter);
2259 2260
@@ -2661,7 +2662,6 @@ static void igb_watchdog_task(struct work_struct *work)
2661 } 2662 }
2662 2663
2663 netif_carrier_on(netdev); 2664 netif_carrier_on(netdev);
2664 netif_tx_wake_all_queues(netdev);
2665 2665
2666 igb_ping_all_vfs(adapter); 2666 igb_ping_all_vfs(adapter);
2667 2667
@@ -2678,7 +2678,6 @@ static void igb_watchdog_task(struct work_struct *work)
2678 printk(KERN_INFO "igb: %s NIC Link is Down\n", 2678 printk(KERN_INFO "igb: %s NIC Link is Down\n",
2679 netdev->name); 2679 netdev->name);
2680 netif_carrier_off(netdev); 2680 netif_carrier_off(netdev);
2681 netif_tx_stop_all_queues(netdev);
2682 2681
2683 igb_ping_all_vfs(adapter); 2682 igb_ping_all_vfs(adapter);
2684 2683
@@ -2712,6 +2711,8 @@ link_up:
2712 * (Do the reset outside of interrupt context). */ 2711 * (Do the reset outside of interrupt context). */
2713 adapter->tx_timeout_count++; 2712 adapter->tx_timeout_count++;
2714 schedule_work(&adapter->reset_task); 2713 schedule_work(&adapter->reset_task);
2714 /* return immediately since reset is imminent */
2715 return;
2715 } 2716 }
2716 } 2717 }
2717 2718
@@ -2895,13 +2896,13 @@ static void igb_set_itr(struct igb_adapter *adapter)
2895 switch (current_itr) { 2896 switch (current_itr) {
2896 /* counts and packets in update_itr are dependent on these numbers */ 2897 /* counts and packets in update_itr are dependent on these numbers */
2897 case lowest_latency: 2898 case lowest_latency:
2898 new_itr = 70000; 2899 new_itr = 56; /* aka 70,000 ints/sec */
2899 break; 2900 break;
2900 case low_latency: 2901 case low_latency:
2901 new_itr = 20000; /* aka hwitr = ~200 */ 2902 new_itr = 196; /* aka 20,000 ints/sec */
2902 break; 2903 break;
2903 case bulk_latency: 2904 case bulk_latency:
2904 new_itr = 4000; 2905 new_itr = 980; /* aka 4,000 ints/sec */
2905 break; 2906 break;
2906 default: 2907 default:
2907 break; 2908 break;
@@ -2920,7 +2921,8 @@ set_itr_now:
2920 * by adding intermediate steps when interrupt rate is 2921 * by adding intermediate steps when interrupt rate is
2921 * increasing */ 2922 * increasing */
2922 new_itr = new_itr > adapter->itr ? 2923 new_itr = new_itr > adapter->itr ?
2923 min(adapter->itr + (new_itr >> 2), new_itr) : 2924 max((new_itr * adapter->itr) /
2925 (new_itr + (adapter->itr >> 2)), new_itr) :
2924 new_itr; 2926 new_itr;
2925 /* Don't write the value here; it resets the adapter's 2927 /* Don't write the value here; it resets the adapter's
2926 * internal timer, and causes us to delay far longer than 2928 * internal timer, and causes us to delay far longer than
@@ -2929,7 +2931,7 @@ set_itr_now:
2929 * ends up being correct. 2931 * ends up being correct.
2930 */ 2932 */
2931 adapter->itr = new_itr; 2933 adapter->itr = new_itr;
2932 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256); 2934 adapter->rx_ring->itr_val = new_itr;
2933 adapter->rx_ring->set_itr = 1; 2935 adapter->rx_ring->set_itr = 1;
2934 } 2936 }
2935 2937
@@ -3068,11 +3070,15 @@ static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
3068 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4; 3070 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
3069 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 3071 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3070 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP; 3072 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
3073 else if (ip_hdr(skb)->protocol == IPPROTO_SCTP)
3074 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
3071 break; 3075 break;
3072 case cpu_to_be16(ETH_P_IPV6): 3076 case cpu_to_be16(ETH_P_IPV6):
3073 /* XXX what about other V6 headers?? */ 3077 /* XXX what about other V6 headers?? */
3074 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 3078 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3075 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP; 3079 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
3080 else if (ipv6_hdr(skb)->nexthdr == IPPROTO_SCTP)
3081 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
3076 break; 3082 break;
3077 default: 3083 default:
3078 if (unlikely(net_ratelimit())) 3084 if (unlikely(net_ratelimit()))
@@ -3338,7 +3344,6 @@ static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
3338 if (count) { 3344 if (count) {
3339 igb_tx_queue_adv(adapter, tx_ring, tx_flags, count, 3345 igb_tx_queue_adv(adapter, tx_ring, tx_flags, count,
3340 skb->len, hdr_len); 3346 skb->len, hdr_len);
3341 netdev->trans_start = jiffies;
3342 /* Make sure there is space in the ring for the next send. */ 3347 /* Make sure there is space in the ring for the next send. */
3343 igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4); 3348 igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3344 } else { 3349 } else {
@@ -3582,8 +3587,35 @@ void igb_update_stats(struct igb_adapter *adapter)
3582 3587
3583 /* Rx Errors */ 3588 /* Rx Errors */
3584 3589
3590 if (hw->mac.type != e1000_82575) {
3591 u32 rqdpc_tmp;
3592 u64 rqdpc_total = 0;
3593 int i;
3594 /* Read out drops stats per RX queue. Notice RQDPC (Receive
3595 * Queue Drop Packet Count) stats only gets incremented, if
3596 * the DROP_EN but it set (in the SRRCTL register for that
3597 * queue). If DROP_EN bit is NOT set, then the some what
3598 * equivalent count is stored in RNBC (not per queue basis).
3599 * Also note the drop count is due to lack of available
3600 * descriptors.
3601 */
3602 for (i = 0; i < adapter->num_rx_queues; i++) {
3603 rqdpc_tmp = rd32(E1000_RQDPC(i)) & 0xFFF;
3604 adapter->rx_ring[i].rx_stats.drops += rqdpc_tmp;
3605 rqdpc_total += adapter->rx_ring[i].rx_stats.drops;
3606 }
3607 adapter->net_stats.rx_fifo_errors = rqdpc_total;
3608 }
3609
3610 /* Note RNBC (Receive No Buffers Count) is an not an exact
3611 * drop count as the hardware FIFO might save the day. Thats
3612 * one of the reason for saving it in rx_fifo_errors, as its
3613 * potentially not a true drop.
3614 */
3615 adapter->net_stats.rx_fifo_errors += adapter->stats.rnbc;
3616
3585 /* RLEC on some newer hardware can be incorrect so build 3617 /* RLEC on some newer hardware can be incorrect so build
3586 * our own version based on RUC and ROC */ 3618 * our own version based on RUC and ROC */
3587 adapter->net_stats.rx_errors = adapter->stats.rxerrc + 3619 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3588 adapter->stats.crcerrs + adapter->stats.algnerrc + 3620 adapter->stats.crcerrs + adapter->stats.algnerrc +
3589 adapter->stats.ruc + adapter->stats.roc + 3621 adapter->stats.ruc + adapter->stats.roc +
@@ -3767,11 +3799,15 @@ static void igb_update_tx_dca(struct igb_ring *tx_ring)
3767 3799
3768static void igb_setup_dca(struct igb_adapter *adapter) 3800static void igb_setup_dca(struct igb_adapter *adapter)
3769{ 3801{
3802 struct e1000_hw *hw = &adapter->hw;
3770 int i; 3803 int i;
3771 3804
3772 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED)) 3805 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3773 return; 3806 return;
3774 3807
3808 /* Always use CB2 mode, difference is masked in the CB driver. */
3809 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
3810
3775 for (i = 0; i < adapter->num_tx_queues; i++) { 3811 for (i = 0; i < adapter->num_tx_queues; i++) {
3776 adapter->tx_ring[i].cpu = -1; 3812 adapter->tx_ring[i].cpu = -1;
3777 igb_update_tx_dca(&adapter->tx_ring[i]); 3813 igb_update_tx_dca(&adapter->tx_ring[i]);
@@ -4434,20 +4470,12 @@ static void igb_receive_skb(struct igb_ring *ring, u8 status,
4434 bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP)); 4470 bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
4435 4471
4436 skb_record_rx_queue(skb, ring->queue_index); 4472 skb_record_rx_queue(skb, ring->queue_index);
4437 if (skb->ip_summed == CHECKSUM_UNNECESSARY) { 4473 if (vlan_extracted)
4438 if (vlan_extracted) 4474 vlan_gro_receive(&ring->napi, adapter->vlgrp,
4439 vlan_gro_receive(&ring->napi, adapter->vlgrp, 4475 le16_to_cpu(rx_desc->wb.upper.vlan),
4440 le16_to_cpu(rx_desc->wb.upper.vlan), 4476 skb);
4441 skb); 4477 else
4442 else 4478 napi_gro_receive(&ring->napi, skb);
4443 napi_gro_receive(&ring->napi, skb);
4444 } else {
4445 if (vlan_extracted)
4446 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4447 le16_to_cpu(rx_desc->wb.upper.vlan));
4448 else
4449 netif_receive_skb(skb);
4450 }
4451} 4479}
4452 4480
4453static inline void igb_rx_checksum_adv(struct igb_adapter *adapter, 4481static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
@@ -4456,19 +4484,28 @@ static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
4456 skb->ip_summed = CHECKSUM_NONE; 4484 skb->ip_summed = CHECKSUM_NONE;
4457 4485
4458 /* Ignore Checksum bit is set or checksum is disabled through ethtool */ 4486 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
4459 if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum) 4487 if ((status_err & E1000_RXD_STAT_IXSM) ||
4488 (adapter->flags & IGB_FLAG_RX_CSUM_DISABLED))
4460 return; 4489 return;
4461 /* TCP/UDP checksum error bit is set */ 4490 /* TCP/UDP checksum error bit is set */
4462 if (status_err & 4491 if (status_err &
4463 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) { 4492 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
4493 /*
4494 * work around errata with sctp packets where the TCPE aka
4495 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
4496 * packets, (aka let the stack check the crc32c)
4497 */
4498 if (!((adapter->hw.mac.type == e1000_82576) &&
4499 (skb->len == 60)))
4500 adapter->hw_csum_err++;
4464 /* let the stack verify checksum errors */ 4501 /* let the stack verify checksum errors */
4465 adapter->hw_csum_err++;
4466 return; 4502 return;
4467 } 4503 }
4468 /* It must be a TCP or UDP packet with a valid checksum */ 4504 /* It must be a TCP or UDP packet with a valid checksum */
4469 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)) 4505 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
4470 skb->ip_summed = CHECKSUM_UNNECESSARY; 4506 skb->ip_summed = CHECKSUM_UNNECESSARY;
4471 4507
4508 dev_dbg(&adapter->pdev->dev, "cksum success: bits %08X\n", status_err);
4472 adapter->hw_csum_good++; 4509 adapter->hw_csum_good++;
4473} 4510}
4474 4511
diff --git a/drivers/net/igbvf/ethtool.c b/drivers/net/igbvf/ethtool.c
index 1dcaa6905312..ee17a097d1ca 100644
--- a/drivers/net/igbvf/ethtool.c
+++ b/drivers/net/igbvf/ethtool.c
@@ -133,6 +133,24 @@ static int igbvf_set_pauseparam(struct net_device *netdev,
133 return -EOPNOTSUPP; 133 return -EOPNOTSUPP;
134} 134}
135 135
136static u32 igbvf_get_rx_csum(struct net_device *netdev)
137{
138 struct igbvf_adapter *adapter = netdev_priv(netdev);
139 return !(adapter->flags & IGBVF_FLAG_RX_CSUM_DISABLED);
140}
141
142static int igbvf_set_rx_csum(struct net_device *netdev, u32 data)
143{
144 struct igbvf_adapter *adapter = netdev_priv(netdev);
145
146 if (data)
147 adapter->flags &= ~IGBVF_FLAG_RX_CSUM_DISABLED;
148 else
149 adapter->flags |= IGBVF_FLAG_RX_CSUM_DISABLED;
150
151 return 0;
152}
153
136static u32 igbvf_get_tx_csum(struct net_device *netdev) 154static u32 igbvf_get_tx_csum(struct net_device *netdev)
137{ 155{
138 return ((netdev->features & NETIF_F_IP_CSUM) != 0); 156 return ((netdev->features & NETIF_F_IP_CSUM) != 0);
@@ -150,8 +168,6 @@ static int igbvf_set_tx_csum(struct net_device *netdev, u32 data)
150static int igbvf_set_tso(struct net_device *netdev, u32 data) 168static int igbvf_set_tso(struct net_device *netdev, u32 data)
151{ 169{
152 struct igbvf_adapter *adapter = netdev_priv(netdev); 170 struct igbvf_adapter *adapter = netdev_priv(netdev);
153 int i;
154 struct net_device *v_netdev;
155 171
156 if (data) { 172 if (data) {
157 netdev->features |= NETIF_F_TSO; 173 netdev->features |= NETIF_F_TSO;
@@ -159,24 +175,10 @@ static int igbvf_set_tso(struct net_device *netdev, u32 data)
159 } else { 175 } else {
160 netdev->features &= ~NETIF_F_TSO; 176 netdev->features &= ~NETIF_F_TSO;
161 netdev->features &= ~NETIF_F_TSO6; 177 netdev->features &= ~NETIF_F_TSO6;
162 /* disable TSO on all VLANs if they're present */
163 if (!adapter->vlgrp)
164 goto tso_out;
165 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
166 v_netdev = vlan_group_get_device(adapter->vlgrp, i);
167 if (!v_netdev)
168 continue;
169
170 v_netdev->features &= ~NETIF_F_TSO;
171 v_netdev->features &= ~NETIF_F_TSO6;
172 vlan_group_set_device(adapter->vlgrp, i, v_netdev);
173 }
174 } 178 }
175 179
176tso_out:
177 dev_info(&adapter->pdev->dev, "TSO is %s\n", 180 dev_info(&adapter->pdev->dev, "TSO is %s\n",
178 data ? "Enabled" : "Disabled"); 181 data ? "Enabled" : "Disabled");
179 adapter->flags |= FLAG_TSO_FORCE;
180 return 0; 182 return 0;
181} 183}
182 184
@@ -517,6 +519,8 @@ static const struct ethtool_ops igbvf_ethtool_ops = {
517 .set_ringparam = igbvf_set_ringparam, 519 .set_ringparam = igbvf_set_ringparam,
518 .get_pauseparam = igbvf_get_pauseparam, 520 .get_pauseparam = igbvf_get_pauseparam,
519 .set_pauseparam = igbvf_set_pauseparam, 521 .set_pauseparam = igbvf_set_pauseparam,
522 .get_rx_csum = igbvf_get_rx_csum,
523 .set_rx_csum = igbvf_set_rx_csum,
520 .get_tx_csum = igbvf_get_tx_csum, 524 .get_tx_csum = igbvf_get_tx_csum,
521 .set_tx_csum = igbvf_set_tx_csum, 525 .set_tx_csum = igbvf_set_tx_csum,
522 .get_sg = ethtool_op_get_sg, 526 .get_sg = ethtool_op_get_sg,
diff --git a/drivers/net/igbvf/igbvf.h b/drivers/net/igbvf/igbvf.h
index 4bff35e46871..2ad6cd756539 100644
--- a/drivers/net/igbvf/igbvf.h
+++ b/drivers/net/igbvf/igbvf.h
@@ -286,11 +286,7 @@ struct igbvf_info {
286}; 286};
287 287
288/* hardware capability, feature, and workaround flags */ 288/* hardware capability, feature, and workaround flags */
289#define FLAG_HAS_HW_VLAN_FILTER (1 << 0) 289#define IGBVF_FLAG_RX_CSUM_DISABLED (1 << 0)
290#define FLAG_HAS_JUMBO_FRAMES (1 << 1)
291#define FLAG_MSI_ENABLED (1 << 2)
292#define FLAG_RX_CSUM_ENABLED (1 << 3)
293#define FLAG_TSO_FORCE (1 << 4)
294 290
295#define IGBVF_RX_DESC_ADV(R, i) \ 291#define IGBVF_RX_DESC_ADV(R, i) \
296 (&((((R).desc))[i].rx_desc)) 292 (&((((R).desc))[i].rx_desc))
diff --git a/drivers/net/igbvf/netdev.c b/drivers/net/igbvf/netdev.c
index b774666ad3cf..5f7ba1a4990b 100644
--- a/drivers/net/igbvf/netdev.c
+++ b/drivers/net/igbvf/netdev.c
@@ -58,8 +58,7 @@ static void igbvf_reset_interrupt_capability(struct igbvf_adapter *);
58 58
59static struct igbvf_info igbvf_vf_info = { 59static struct igbvf_info igbvf_vf_info = {
60 .mac = e1000_vfadapt, 60 .mac = e1000_vfadapt,
61 .flags = FLAG_HAS_JUMBO_FRAMES 61 .flags = 0,
62 | FLAG_RX_CSUM_ENABLED,
63 .pba = 10, 62 .pba = 10,
64 .init_ops = e1000_init_function_pointers_vf, 63 .init_ops = e1000_init_function_pointers_vf,
65}; 64};
@@ -107,8 +106,10 @@ static inline void igbvf_rx_checksum_adv(struct igbvf_adapter *adapter,
107 skb->ip_summed = CHECKSUM_NONE; 106 skb->ip_summed = CHECKSUM_NONE;
108 107
109 /* Ignore Checksum bit is set or checksum is disabled through ethtool */ 108 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
110 if ((status_err & E1000_RXD_STAT_IXSM)) 109 if ((status_err & E1000_RXD_STAT_IXSM) ||
110 (adapter->flags & IGBVF_FLAG_RX_CSUM_DISABLED))
111 return; 111 return;
112
112 /* TCP/UDP checksum error bit is set */ 113 /* TCP/UDP checksum error bit is set */
113 if (status_err & 114 if (status_err &
114 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) { 115 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
@@ -116,6 +117,7 @@ static inline void igbvf_rx_checksum_adv(struct igbvf_adapter *adapter,
116 adapter->hw_csum_err++; 117 adapter->hw_csum_err++;
117 return; 118 return;
118 } 119 }
120
119 /* It must be a TCP or UDP packet with a valid checksum */ 121 /* It must be a TCP or UDP packet with a valid checksum */
120 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)) 122 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
121 skb->ip_summed = CHECKSUM_UNNECESSARY; 123 skb->ip_summed = CHECKSUM_UNNECESSARY;
@@ -2268,7 +2270,6 @@ static int igbvf_xmit_frame_ring_adv(struct sk_buff *skb,
2268 if (count) { 2270 if (count) {
2269 igbvf_tx_queue_adv(adapter, tx_ring, tx_flags, count, 2271 igbvf_tx_queue_adv(adapter, tx_ring, tx_flags, count,
2270 skb->len, hdr_len); 2272 skb->len, hdr_len);
2271 netdev->trans_start = jiffies;
2272 /* Make sure there is space in the ring for the next send. */ 2273 /* Make sure there is space in the ring for the next send. */
2273 igbvf_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 4); 2274 igbvf_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 4);
2274 } else { 2275 } else {
@@ -2351,15 +2352,6 @@ static int igbvf_change_mtu(struct net_device *netdev, int new_mtu)
2351 return -EINVAL; 2352 return -EINVAL;
2352 } 2353 }
2353 2354
2354 /* Jumbo frame size limits */
2355 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) {
2356 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
2357 dev_err(&adapter->pdev->dev,
2358 "Jumbo Frames not supported.\n");
2359 return -EINVAL;
2360 }
2361 }
2362
2363#define MAX_STD_JUMBO_FRAME_SIZE 9234 2355#define MAX_STD_JUMBO_FRAME_SIZE 9234
2364 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { 2356 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2365 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n"); 2357 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
diff --git a/drivers/net/irda/au1k_ir.c b/drivers/net/irda/au1k_ir.c
index 941164076a2b..269153eedd26 100644
--- a/drivers/net/irda/au1k_ir.c
+++ b/drivers/net/irda/au1k_ir.c
@@ -23,6 +23,7 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/errno.h> 24#include <linux/errno.h>
25#include <linux/netdevice.h> 25#include <linux/netdevice.h>
26#include <linux/etherdevice.h>
26#include <linux/slab.h> 27#include <linux/slab.h>
27#include <linux/rtnetlink.h> 28#include <linux/rtnetlink.h>
28#include <linux/interrupt.h> 29#include <linux/interrupt.h>
@@ -198,6 +199,17 @@ static int au1k_irda_init_iobuf(iobuff_t *io, int size)
198 return io->head ? 0 : -ENOMEM; 199 return io->head ? 0 : -ENOMEM;
199} 200}
200 201
202static const struct net_device_ops au1k_irda_netdev_ops = {
203 .ndo_open = au1k_irda_start,
204 .ndo_stop = au1k_irda_stop,
205 .ndo_start_xmit = au1k_irda_hard_xmit,
206 .ndo_tx_timeout = au1k_tx_timeout,
207 .ndo_do_ioctl = au1k_irda_ioctl,
208 .ndo_change_mtu = eth_change_mtu,
209 .ndo_validate_addr = eth_validate_addr,
210 .ndo_set_mac_address = eth_mac_addr,
211};
212
201static int au1k_irda_net_init(struct net_device *dev) 213static int au1k_irda_net_init(struct net_device *dev)
202{ 214{
203 struct au1k_private *aup = netdev_priv(dev); 215 struct au1k_private *aup = netdev_priv(dev);
@@ -209,11 +221,7 @@ static int au1k_irda_net_init(struct net_device *dev)
209 if (err) 221 if (err)
210 goto out1; 222 goto out1;
211 223
212 dev->open = au1k_irda_start; 224 dev->netdev_ops = &au1k_irda_netdev_ops;
213 dev->hard_start_xmit = au1k_irda_hard_xmit;
214 dev->stop = au1k_irda_stop;
215 dev->do_ioctl = au1k_irda_ioctl;
216 dev->tx_timeout = au1k_tx_timeout;
217 225
218 irda_init_max_qos_capabilies(&aup->qos); 226 irda_init_max_qos_capabilies(&aup->qos);
219 227
diff --git a/drivers/net/irda/irda-usb.c b/drivers/net/irda/irda-usb.c
index 006ba23110db..394b2b17075e 100644
--- a/drivers/net/irda/irda-usb.c
+++ b/drivers/net/irda/irda-usb.c
@@ -1859,6 +1859,42 @@ static void irda_usb_disconnect(struct usb_interface *intf)
1859 IRDA_DEBUG(0, "%s(), USB IrDA Disconnected\n", __func__); 1859 IRDA_DEBUG(0, "%s(), USB IrDA Disconnected\n", __func__);
1860} 1860}
1861 1861
1862#ifdef CONFIG_PM
1863/* USB suspend, so power off the transmitter/receiver */
1864static int irda_usb_suspend(struct usb_interface *intf, pm_message_t message)
1865{
1866 struct irda_usb_cb *self = usb_get_intfdata(intf);
1867 int i;
1868
1869 netif_device_detach(self->netdev);
1870
1871 if (self->tx_urb != NULL)
1872 usb_kill_urb(self->tx_urb);
1873 if (self->speed_urb != NULL)
1874 usb_kill_urb(self->speed_urb);
1875 for (i = 0; i < self->max_rx_urb; i++) {
1876 if (self->rx_urb[i] != NULL)
1877 usb_kill_urb(self->rx_urb[i]);
1878 }
1879 return 0;
1880}
1881
1882/* Coming out of suspend, so reset hardware */
1883static int irda_usb_resume(struct usb_interface *intf)
1884{
1885 struct irda_usb_cb *self = usb_get_intfdata(intf);
1886 int i;
1887
1888 for (i = 0; i < self->max_rx_urb; i++) {
1889 if (self->rx_urb[i] != NULL)
1890 usb_submit_urb(self->rx_urb[i], GFP_KERNEL);
1891 }
1892
1893 netif_device_attach(self->netdev);
1894 return 0;
1895}
1896#endif
1897
1862/*------------------------------------------------------------------*/ 1898/*------------------------------------------------------------------*/
1863/* 1899/*
1864 * USB device callbacks 1900 * USB device callbacks
@@ -1868,6 +1904,10 @@ static struct usb_driver irda_driver = {
1868 .probe = irda_usb_probe, 1904 .probe = irda_usb_probe,
1869 .disconnect = irda_usb_disconnect, 1905 .disconnect = irda_usb_disconnect,
1870 .id_table = dongles, 1906 .id_table = dongles,
1907#ifdef CONFIG_PM
1908 .suspend = irda_usb_suspend,
1909 .resume = irda_usb_resume,
1910#endif
1871}; 1911};
1872 1912
1873/************************* MODULE CALLBACKS *************************/ 1913/************************* MODULE CALLBACKS *************************/
diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c
index e775338b525f..3376a4f39e0a 100644
--- a/drivers/net/irda/pxaficp_ir.c
+++ b/drivers/net/irda/pxaficp_ir.c
@@ -14,6 +14,7 @@
14 */ 14 */
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/netdevice.h> 16#include <linux/netdevice.h>
17#include <linux/etherdevice.h>
17#include <linux/platform_device.h> 18#include <linux/platform_device.h>
18#include <linux/clk.h> 19#include <linux/clk.h>
19 20
@@ -797,6 +798,16 @@ static int pxa_irda_init_iobuf(iobuff_t *io, int size)
797 return io->head ? 0 : -ENOMEM; 798 return io->head ? 0 : -ENOMEM;
798} 799}
799 800
801static const struct net_device_ops pxa_irda_netdev_ops = {
802 .ndo_open = pxa_irda_start,
803 .ndo_stop = pxa_irda_stop,
804 .ndo_start_xmit = pxa_irda_hard_xmit,
805 .ndo_do_ioctl = pxa_irda_ioctl,
806 .ndo_change_mtu = eth_change_mtu,
807 .ndo_validate_addr = eth_validate_addr,
808 .ndo_set_mac_address = eth_mac_addr,
809};
810
800static int pxa_irda_probe(struct platform_device *pdev) 811static int pxa_irda_probe(struct platform_device *pdev)
801{ 812{
802 struct net_device *dev; 813 struct net_device *dev;
@@ -845,10 +856,7 @@ static int pxa_irda_probe(struct platform_device *pdev)
845 if (err) 856 if (err)
846 goto err_startup; 857 goto err_startup;
847 858
848 dev->hard_start_xmit = pxa_irda_hard_xmit; 859 dev->netdev_ops = &pxa_irda_netdev_ops;
849 dev->open = pxa_irda_start;
850 dev->stop = pxa_irda_stop;
851 dev->do_ioctl = pxa_irda_ioctl;
852 860
853 irda_init_max_qos_capabilies(&si->qos); 861 irda_init_max_qos_capabilies(&si->qos);
854 862
diff --git a/drivers/net/irda/sa1100_ir.c b/drivers/net/irda/sa1100_ir.c
index 7a2b003954ca..2aeb2e6aec1b 100644
--- a/drivers/net/irda/sa1100_ir.c
+++ b/drivers/net/irda/sa1100_ir.c
@@ -24,6 +24,7 @@
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/errno.h> 25#include <linux/errno.h>
26#include <linux/netdevice.h> 26#include <linux/netdevice.h>
27#include <linux/etherdevice.h>
27#include <linux/slab.h> 28#include <linux/slab.h>
28#include <linux/rtnetlink.h> 29#include <linux/rtnetlink.h>
29#include <linux/interrupt.h> 30#include <linux/interrupt.h>
@@ -875,6 +876,16 @@ static int sa1100_irda_init_iobuf(iobuff_t *io, int size)
875 return io->head ? 0 : -ENOMEM; 876 return io->head ? 0 : -ENOMEM;
876} 877}
877 878
879static const struct net_device_ops sa1100_irda_netdev_ops = {
880 .ndo_open = sa1100_irda_start,
881 .ndo_stop = sa1100_irda_stop,
882 .ndo_start_xmit = sa1100_irda_hard_xmit,
883 .ndo_do_ioctl = sa1100_irda_ioctl,
884 .ndo_change_mtu = eth_change_mtu,
885 .ndo_validate_addr = eth_validate_addr,
886 .ndo_set_mac_address = eth_mac_addr,
887};
888
878static int sa1100_irda_probe(struct platform_device *pdev) 889static int sa1100_irda_probe(struct platform_device *pdev)
879{ 890{
880 struct net_device *dev; 891 struct net_device *dev;
@@ -913,11 +924,8 @@ static int sa1100_irda_probe(struct platform_device *pdev)
913 if (err) 924 if (err)
914 goto err_mem_5; 925 goto err_mem_5;
915 926
916 dev->hard_start_xmit = sa1100_irda_hard_xmit; 927 dev->netdev_ops = &sa1100_irda_netdev_ops;
917 dev->open = sa1100_irda_start; 928 dev->irq = IRQ_Ser2ICP;
918 dev->stop = sa1100_irda_stop;
919 dev->do_ioctl = sa1100_irda_ioctl;
920 dev->irq = IRQ_Ser2ICP;
921 929
922 irda_init_max_qos_capabilies(&si->qos); 930 irda_init_max_qos_capabilies(&si->qos);
923 931
diff --git a/drivers/net/iseries_veth.c b/drivers/net/iseries_veth.c
index cb793c2bade2..e44215cb1882 100644
--- a/drivers/net/iseries_veth.c
+++ b/drivers/net/iseries_veth.c
@@ -1021,6 +1021,16 @@ static const struct ethtool_ops ops = {
1021 .get_link = veth_get_link, 1021 .get_link = veth_get_link,
1022}; 1022};
1023 1023
1024static const struct net_device_ops veth_netdev_ops = {
1025 .ndo_open = veth_open,
1026 .ndo_stop = veth_close,
1027 .ndo_start_xmit = veth_start_xmit,
1028 .ndo_change_mtu = veth_change_mtu,
1029 .ndo_set_multicast_list = veth_set_multicast_list,
1030 .ndo_set_mac_address = NULL,
1031 .ndo_validate_addr = eth_validate_addr,
1032};
1033
1024static struct net_device *veth_probe_one(int vlan, 1034static struct net_device *veth_probe_one(int vlan,
1025 struct vio_dev *vio_dev) 1035 struct vio_dev *vio_dev)
1026{ 1036{
@@ -1067,12 +1077,7 @@ static struct net_device *veth_probe_one(int vlan,
1067 1077
1068 memcpy(&port->mac_addr, mac_addr, ETH_ALEN); 1078 memcpy(&port->mac_addr, mac_addr, ETH_ALEN);
1069 1079
1070 dev->open = veth_open; 1080 dev->netdev_ops = &veth_netdev_ops;
1071 dev->hard_start_xmit = veth_start_xmit;
1072 dev->stop = veth_close;
1073 dev->change_mtu = veth_change_mtu;
1074 dev->set_mac_address = NULL;
1075 dev->set_multicast_list = veth_set_multicast_list;
1076 SET_ETHTOOL_OPS(dev, &ops); 1081 SET_ETHTOOL_OPS(dev, &ops);
1077 1082
1078 SET_NETDEV_DEV(dev, vdev); 1083 SET_NETDEV_DEV(dev, vdev);
diff --git a/drivers/net/ixgb/ixgb_hw.c b/drivers/net/ixgb/ixgb_hw.c
index 11dcda0f453e..ff67a84e6802 100644
--- a/drivers/net/ixgb/ixgb_hw.c
+++ b/drivers/net/ixgb/ixgb_hw.c
@@ -192,7 +192,7 @@ ixgb_identify_xpak_vendor(struct ixgb_hw *hw)
192 vendor_name[i] = ixgb_read_phy_reg(hw, 192 vendor_name[i] = ixgb_read_phy_reg(hw,
193 MDIO_PMA_PMD_XPAK_VENDOR_NAME 193 MDIO_PMA_PMD_XPAK_VENDOR_NAME
194 + i, IXGB_PHY_ADDRESS, 194 + i, IXGB_PHY_ADDRESS,
195 MDIO_PMA_PMD_DID); 195 MDIO_MMD_PMAPMD);
196 } 196 }
197 197
198 /* Determine the actual vendor */ 198 /* Determine the actual vendor */
@@ -1225,15 +1225,15 @@ ixgb_optics_reset(struct ixgb_hw *hw)
1225 u16 mdio_reg; 1225 u16 mdio_reg;
1226 1226
1227 ixgb_write_phy_reg(hw, 1227 ixgb_write_phy_reg(hw,
1228 MDIO_PMA_PMD_CR1, 1228 MDIO_CTRL1,
1229 IXGB_PHY_ADDRESS, 1229 IXGB_PHY_ADDRESS,
1230 MDIO_PMA_PMD_DID, 1230 MDIO_MMD_PMAPMD,
1231 MDIO_PMA_PMD_CR1_RESET); 1231 MDIO_CTRL1_RESET);
1232 1232
1233 mdio_reg = ixgb_read_phy_reg( hw, 1233 mdio_reg = ixgb_read_phy_reg(hw,
1234 MDIO_PMA_PMD_CR1, 1234 MDIO_CTRL1,
1235 IXGB_PHY_ADDRESS, 1235 IXGB_PHY_ADDRESS,
1236 MDIO_PMA_PMD_DID); 1236 MDIO_MMD_PMAPMD);
1237 } 1237 }
1238 1238
1239 return; 1239 return;
diff --git a/drivers/net/ixgb/ixgb_hw.h b/drivers/net/ixgb/ixgb_hw.h
index 831fe0c58b2b..af6ca3aab5ad 100644
--- a/drivers/net/ixgb/ixgb_hw.h
+++ b/drivers/net/ixgb/ixgb_hw.h
@@ -29,6 +29,8 @@
29#ifndef _IXGB_HW_H_ 29#ifndef _IXGB_HW_H_
30#define _IXGB_HW_H_ 30#define _IXGB_HW_H_
31 31
32#include <linux/mdio.h>
33
32#include "ixgb_osdep.h" 34#include "ixgb_osdep.h"
33 35
34/* Enums */ 36/* Enums */
@@ -507,18 +509,6 @@ typedef enum {
507/* Definitions for the optics devices on the MDIO bus. */ 509/* Definitions for the optics devices on the MDIO bus. */
508#define IXGB_PHY_ADDRESS 0x0 /* Single PHY, multiple "Devices" */ 510#define IXGB_PHY_ADDRESS 0x0 /* Single PHY, multiple "Devices" */
509 511
510/* Standard five-bit Device IDs. See IEEE 802.3ae, clause 45 */
511#define MDIO_PMA_PMD_DID 0x01
512#define MDIO_WIS_DID 0x02
513#define MDIO_PCS_DID 0x03
514#define MDIO_XGXS_DID 0x04
515
516/* Standard PMA/PMD registers and bit definitions. */
517/* Note: This is a very limited set of definitions, */
518/* only implemented features are defined. */
519#define MDIO_PMA_PMD_CR1 0x0000
520#define MDIO_PMA_PMD_CR1_RESET 0x8000
521
522#define MDIO_PMA_PMD_XPAK_VENDOR_NAME 0x803A /* XPAK/XENPAK devices only */ 512#define MDIO_PMA_PMD_XPAK_VENDOR_NAME 0x803A /* XPAK/XENPAK devices only */
523 513
524/* Vendor-specific MDIO registers */ 514/* Vendor-specific MDIO registers */
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c
index 4a0826b8f6f2..6eb7f37a113b 100644
--- a/drivers/net/ixgb/ixgb_main.c
+++ b/drivers/net/ixgb/ixgb_main.c
@@ -266,6 +266,8 @@ ixgb_up(struct ixgb_adapter *adapter)
266 napi_enable(&adapter->napi); 266 napi_enable(&adapter->napi);
267 ixgb_irq_enable(adapter); 267 ixgb_irq_enable(adapter);
268 268
269 netif_wake_queue(netdev);
270
269 mod_timer(&adapter->watchdog_timer, jiffies); 271 mod_timer(&adapter->watchdog_timer, jiffies);
270 272
271 return 0; 273 return 0;
@@ -471,10 +473,8 @@ ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
471 if (err) 473 if (err)
472 goto err_register; 474 goto err_register;
473 475
474 /* we're going to reset, so assume we have no link for now */ 476 /* carrier off reporting is important to ethtool even BEFORE open */
475
476 netif_carrier_off(netdev); 477 netif_carrier_off(netdev);
477 netif_stop_queue(netdev);
478 478
479 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n"); 479 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
480 ixgb_check_options(adapter); 480 ixgb_check_options(adapter);
@@ -592,6 +592,8 @@ ixgb_open(struct net_device *netdev)
592 if (err) 592 if (err)
593 goto err_setup_tx; 593 goto err_setup_tx;
594 594
595 netif_carrier_off(netdev);
596
595 /* allocate receive descriptors */ 597 /* allocate receive descriptors */
596 598
597 err = ixgb_setup_rx_resources(adapter); 599 err = ixgb_setup_rx_resources(adapter);
@@ -602,6 +604,8 @@ ixgb_open(struct net_device *netdev)
602 if (err) 604 if (err)
603 goto err_up; 605 goto err_up;
604 606
607 netif_start_queue(netdev);
608
605 return 0; 609 return 0;
606 610
607err_up: 611err_up:
@@ -1116,7 +1120,6 @@ ixgb_watchdog(unsigned long data)
1116 adapter->link_speed = 10000; 1120 adapter->link_speed = 10000;
1117 adapter->link_duplex = FULL_DUPLEX; 1121 adapter->link_duplex = FULL_DUPLEX;
1118 netif_carrier_on(netdev); 1122 netif_carrier_on(netdev);
1119 netif_wake_queue(netdev);
1120 } 1123 }
1121 } else { 1124 } else {
1122 if (netif_carrier_ok(netdev)) { 1125 if (netif_carrier_ok(netdev)) {
@@ -1125,8 +1128,6 @@ ixgb_watchdog(unsigned long data)
1125 printk(KERN_INFO "ixgb: %s NIC Link is Down\n", 1128 printk(KERN_INFO "ixgb: %s NIC Link is Down\n",
1126 netdev->name); 1129 netdev->name);
1127 netif_carrier_off(netdev); 1130 netif_carrier_off(netdev);
1128 netif_stop_queue(netdev);
1129
1130 } 1131 }
1131 } 1132 }
1132 1133
@@ -1139,6 +1140,8 @@ ixgb_watchdog(unsigned long data)
1139 * to get done, so reset controller to flush Tx. 1140 * to get done, so reset controller to flush Tx.
1140 * (Do the reset outside of interrupt context). */ 1141 * (Do the reset outside of interrupt context). */
1141 schedule_work(&adapter->tx_timeout_task); 1142 schedule_work(&adapter->tx_timeout_task);
1143 /* return immediately since reset is imminent */
1144 return;
1142 } 1145 }
1143 } 1146 }
1144 1147
@@ -1485,7 +1488,6 @@ ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1485 1488
1486 if (count) { 1489 if (count) {
1487 ixgb_tx_queue(adapter, count, vlan_id, tx_flags); 1490 ixgb_tx_queue(adapter, count, vlan_id, tx_flags);
1488 netdev->trans_start = jiffies;
1489 /* Make sure there is space in the ring for the next send. */ 1491 /* Make sure there is space in the ring for the next send. */
1490 ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED); 1492 ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
1491 1493
diff --git a/drivers/net/ixgb/ixgb_osdep.h b/drivers/net/ixgb/ixgb_osdep.h
index d92e72bd627a..371a6be4d965 100644
--- a/drivers/net/ixgb/ixgb_osdep.h
+++ b/drivers/net/ixgb/ixgb_osdep.h
@@ -40,7 +40,7 @@
40#include <linux/sched.h> 40#include <linux/sched.h>
41 41
42#undef ASSERT 42#undef ASSERT
43#define ASSERT(x) if (!(x)) BUG() 43#define ASSERT(x) BUG_ON(!(x))
44#define MSGOUT(S, A, B) printk(KERN_DEBUG S "\n", A, B) 44#define MSGOUT(S, A, B) printk(KERN_DEBUG S "\n", A, B)
45 45
46#ifdef DBG 46#ifdef DBG
diff --git a/drivers/net/ixgbe/Makefile b/drivers/net/ixgbe/Makefile
index b3f8208ec7be..21b41f42b61c 100644
--- a/drivers/net/ixgbe/Makefile
+++ b/drivers/net/ixgbe/Makefile
@@ -37,3 +37,5 @@ ixgbe-objs := ixgbe_main.o ixgbe_common.o ixgbe_ethtool.o \
37 37
38ixgbe-$(CONFIG_IXGBE_DCB) += ixgbe_dcb.o ixgbe_dcb_82598.o \ 38ixgbe-$(CONFIG_IXGBE_DCB) += ixgbe_dcb.o ixgbe_dcb_82598.o \
39 ixgbe_dcb_82599.o ixgbe_dcb_nl.o 39 ixgbe_dcb_82599.o ixgbe_dcb_nl.o
40
41ixgbe-$(CONFIG_FCOE:m=y) += ixgbe_fcoe.o
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h
index c26433d14605..05a24055ac2f 100644
--- a/drivers/net/ixgbe/ixgbe.h
+++ b/drivers/net/ixgbe/ixgbe.h
@@ -36,6 +36,10 @@
36#include "ixgbe_type.h" 36#include "ixgbe_type.h"
37#include "ixgbe_common.h" 37#include "ixgbe_common.h"
38#include "ixgbe_dcb.h" 38#include "ixgbe_dcb.h"
39#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
40#define IXGBE_FCOE
41#include "ixgbe_fcoe.h"
42#endif /* CONFIG_FCOE or CONFIG_FCOE_MODULE */
39#ifdef CONFIG_IXGBE_DCA 43#ifdef CONFIG_IXGBE_DCA
40#include <linux/dca.h> 44#include <linux/dca.h>
41#endif 45#endif
@@ -71,6 +75,8 @@
71#define IXGBE_RXBUFFER_128 128 /* Used for packet split */ 75#define IXGBE_RXBUFFER_128 128 /* Used for packet split */
72#define IXGBE_RXBUFFER_256 256 /* Used for packet split */ 76#define IXGBE_RXBUFFER_256 256 /* Used for packet split */
73#define IXGBE_RXBUFFER_2048 2048 77#define IXGBE_RXBUFFER_2048 2048
78#define IXGBE_RXBUFFER_4096 4096
79#define IXGBE_RXBUFFER_8192 8192
74#define IXGBE_MAX_RXBUFFER 16384 /* largest size for a single descriptor */ 80#define IXGBE_MAX_RXBUFFER 16384 /* largest size for a single descriptor */
75 81
76#define IXGBE_RX_HDR_SIZE IXGBE_RXBUFFER_256 82#define IXGBE_RX_HDR_SIZE IXGBE_RXBUFFER_256
@@ -84,6 +90,8 @@
84#define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1) 90#define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1)
85#define IXGBE_TX_FLAGS_TSO (u32)(1 << 2) 91#define IXGBE_TX_FLAGS_TSO (u32)(1 << 2)
86#define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3) 92#define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3)
93#define IXGBE_TX_FLAGS_FCOE (u32)(1 << 4)
94#define IXGBE_TX_FLAGS_FSO (u32)(1 << 5)
87#define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000 95#define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
88#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000 96#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
89#define IXGBE_TX_FLAGS_VLAN_SHIFT 16 97#define IXGBE_TX_FLAGS_VLAN_SHIFT 16
@@ -147,6 +155,7 @@ struct ixgbe_ring {
147 155
148 u16 work_limit; /* max work per interrupt */ 156 u16 work_limit; /* max work per interrupt */
149 u16 rx_buf_len; 157 u16 rx_buf_len;
158 u64 rsc_count; /* stat for coalesced packets */
150}; 159};
151 160
152enum ixgbe_ring_f_enum { 161enum ixgbe_ring_f_enum {
@@ -154,6 +163,9 @@ enum ixgbe_ring_f_enum {
154 RING_F_DCB, 163 RING_F_DCB,
155 RING_F_VMDQ, 164 RING_F_VMDQ,
156 RING_F_RSS, 165 RING_F_RSS,
166#ifdef IXGBE_FCOE
167 RING_F_FCOE,
168#endif /* IXGBE_FCOE */
157 169
158 RING_F_ARRAY_SIZE /* must be last in enum set */ 170 RING_F_ARRAY_SIZE /* must be last in enum set */
159}; 171};
@@ -161,6 +173,9 @@ enum ixgbe_ring_f_enum {
161#define IXGBE_MAX_DCB_INDICES 8 173#define IXGBE_MAX_DCB_INDICES 8
162#define IXGBE_MAX_RSS_INDICES 16 174#define IXGBE_MAX_RSS_INDICES 16
163#define IXGBE_MAX_VMDQ_INDICES 16 175#define IXGBE_MAX_VMDQ_INDICES 16
176#ifdef IXGBE_FCOE
177#define IXGBE_MAX_FCOE_INDICES 8
178#endif /* IXGBE_FCOE */
164struct ixgbe_ring_feature { 179struct ixgbe_ring_feature {
165 int indices; 180 int indices;
166 int mask; 181 int mask;
@@ -186,6 +201,7 @@ struct ixgbe_q_vector {
186 u8 tx_itr; 201 u8 tx_itr;
187 u8 rx_itr; 202 u8 rx_itr;
188 u32 eitr; 203 u32 eitr;
204 u32 v_idx; /* vector index in list */
189}; 205};
190 206
191/* Helper macros to switch between ints/sec and what the register uses. 207/* Helper macros to switch between ints/sec and what the register uses.
@@ -208,6 +224,10 @@ struct ixgbe_q_vector {
208 (&(((struct ixgbe_adv_tx_context_desc *)((R).desc))[i])) 224 (&(((struct ixgbe_adv_tx_context_desc *)((R).desc))[i]))
209 225
210#define IXGBE_MAX_JUMBO_FRAME_SIZE 16128 226#define IXGBE_MAX_JUMBO_FRAME_SIZE 16128
227#ifdef IXGBE_FCOE
228/* Use 3K as the baby jumbo frame size for FCoE */
229#define IXGBE_FCOE_JUMBO_FRAME_SIZE 3072
230#endif /* IXGBE_FCOE */
211 231
212#define OTHER_VECTOR 1 232#define OTHER_VECTOR 1
213#define NON_Q_VECTORS (OTHER_VECTOR) 233#define NON_Q_VECTORS (OTHER_VECTOR)
@@ -229,11 +249,12 @@ struct ixgbe_adapter {
229 struct vlan_group *vlgrp; 249 struct vlan_group *vlgrp;
230 u16 bd_number; 250 u16 bd_number;
231 struct work_struct reset_task; 251 struct work_struct reset_task;
232 struct ixgbe_q_vector q_vector[MAX_MSIX_Q_VECTORS]; 252 struct ixgbe_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
233 char name[MAX_MSIX_COUNT][IFNAMSIZ + 9]; 253 char name[MAX_MSIX_COUNT][IFNAMSIZ + 9];
234 struct ixgbe_dcb_config dcb_cfg; 254 struct ixgbe_dcb_config dcb_cfg;
235 struct ixgbe_dcb_config temp_dcb_cfg; 255 struct ixgbe_dcb_config temp_dcb_cfg;
236 u8 dcb_set_bitmap; 256 u8 dcb_set_bitmap;
257 enum ixgbe_fc_mode last_lfc_mode;
237 258
238 /* Interrupt Throttle Rate */ 259 /* Interrupt Throttle Rate */
239 u32 itr_setting; 260 u32 itr_setting;
@@ -294,6 +315,9 @@ struct ixgbe_adapter {
294#define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1 << 23) 315#define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1 << 23)
295#define IXGBE_FLAG_IN_SFP_LINK_TASK (u32)(1 << 24) 316#define IXGBE_FLAG_IN_SFP_LINK_TASK (u32)(1 << 24)
296#define IXGBE_FLAG_IN_SFP_MOD_TASK (u32)(1 << 25) 317#define IXGBE_FLAG_IN_SFP_MOD_TASK (u32)(1 << 25)
318#define IXGBE_FLAG_RSC_CAPABLE (u32)(1 << 26)
319#define IXGBE_FLAG_RSC_ENABLED (u32)(1 << 27)
320#define IXGBE_FLAG_FCOE_ENABLED (u32)(1 << 29)
297 321
298/* default to trying for four seconds */ 322/* default to trying for four seconds */
299#define IXGBE_TRY_LINK_TIMEOUT (4 * HZ) 323#define IXGBE_TRY_LINK_TIMEOUT (4 * HZ)
@@ -325,6 +349,10 @@ struct ixgbe_adapter {
325 struct timer_list sfp_timer; 349 struct timer_list sfp_timer;
326 struct work_struct multispeed_fiber_task; 350 struct work_struct multispeed_fiber_task;
327 struct work_struct sfp_config_module_task; 351 struct work_struct sfp_config_module_task;
352#ifdef IXGBE_FCOE
353 struct ixgbe_fcoe fcoe;
354#endif /* IXGBE_FCOE */
355 u64 rsc_count;
328 u32 wol; 356 u32 wol;
329 u16 eeprom_version; 357 u16 eeprom_version;
330}; 358};
@@ -363,10 +391,21 @@ extern int ixgbe_setup_tx_resources(struct ixgbe_adapter *, struct ixgbe_ring *)
363extern void ixgbe_free_rx_resources(struct ixgbe_adapter *, struct ixgbe_ring *); 391extern void ixgbe_free_rx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
364extern void ixgbe_free_tx_resources(struct ixgbe_adapter *, struct ixgbe_ring *); 392extern void ixgbe_free_tx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
365extern void ixgbe_update_stats(struct ixgbe_adapter *adapter); 393extern void ixgbe_update_stats(struct ixgbe_adapter *adapter);
366extern void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter);
367extern int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter); 394extern int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter);
368void ixgbe_napi_add_all(struct ixgbe_adapter *adapter); 395extern void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter);
369void ixgbe_napi_del_all(struct ixgbe_adapter *adapter);
370extern void ixgbe_write_eitr(struct ixgbe_adapter *, int, u32); 396extern void ixgbe_write_eitr(struct ixgbe_adapter *, int, u32);
397#ifdef IXGBE_FCOE
398extern void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter);
399extern int ixgbe_fso(struct ixgbe_adapter *adapter,
400 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
401 u32 tx_flags, u8 *hdr_len);
402extern void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter);
403extern int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
404 union ixgbe_adv_rx_desc *rx_desc,
405 struct sk_buff *skb);
406extern int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
407 struct scatterlist *sgl, unsigned int sgc);
408extern int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid);
409#endif /* IXGBE_FCOE */
371 410
372#endif /* _IXGBE_H_ */ 411#endif /* _IXGBE_H_ */
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c
index 4791238c3f6e..88e8350aa786 100644
--- a/drivers/net/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ixgbe/ixgbe_82598.c
@@ -75,18 +75,49 @@ static u16 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw)
75static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw) 75static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
76{ 76{
77 struct ixgbe_mac_info *mac = &hw->mac; 77 struct ixgbe_mac_info *mac = &hw->mac;
78
79 /* Call PHY identify routine to get the phy type */
80 ixgbe_identify_phy_generic(hw);
81
82 mac->mcft_size = IXGBE_82598_MC_TBL_SIZE;
83 mac->vft_size = IXGBE_82598_VFT_TBL_SIZE;
84 mac->num_rar_entries = IXGBE_82598_RAR_ENTRIES;
85 mac->max_rx_queues = IXGBE_82598_MAX_RX_QUEUES;
86 mac->max_tx_queues = IXGBE_82598_MAX_TX_QUEUES;
87 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_82598(hw);
88
89 return 0;
90}
91
92/**
93 * ixgbe_init_phy_ops_82598 - PHY/SFP specific init
94 * @hw: pointer to hardware structure
95 *
96 * Initialize any function pointers that were not able to be
97 * set during get_invariants because the PHY/SFP type was
98 * not known. Perform the SFP init if necessary.
99 *
100 **/
101s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw)
102{
103 struct ixgbe_mac_info *mac = &hw->mac;
78 struct ixgbe_phy_info *phy = &hw->phy; 104 struct ixgbe_phy_info *phy = &hw->phy;
79 s32 ret_val = 0; 105 s32 ret_val = 0;
80 u16 list_offset, data_offset; 106 u16 list_offset, data_offset;
81 107
82 /* Set the bus information prior to PHY identification */ 108 /* Identify the PHY */
83 mac->ops.get_bus_info(hw); 109 phy->ops.identify(hw);
84 110
85 /* Call PHY identify routine to get the phy type */ 111 /* Overwrite the link function pointers if copper PHY */
86 ixgbe_identify_phy_generic(hw); 112 if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {
113 mac->ops.setup_link = &ixgbe_setup_copper_link_82598;
114 mac->ops.setup_link_speed =
115 &ixgbe_setup_copper_link_speed_82598;
116 mac->ops.get_link_capabilities =
117 &ixgbe_get_copper_link_capabilities_82598;
118 }
87 119
88 /* PHY Init */ 120 switch (hw->phy.type) {
89 switch (phy->type) {
90 case ixgbe_phy_tn: 121 case ixgbe_phy_tn:
91 phy->ops.check_link = &ixgbe_check_phy_link_tnx; 122 phy->ops.check_link = &ixgbe_check_phy_link_tnx;
92 phy->ops.get_firmware_version = 123 phy->ops.get_firmware_version =
@@ -106,8 +137,8 @@ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
106 137
107 /* Check to see if SFP+ module is supported */ 138 /* Check to see if SFP+ module is supported */
108 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, 139 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw,
109 &list_offset, 140 &list_offset,
110 &data_offset); 141 &data_offset);
111 if (ret_val != 0) { 142 if (ret_val != 0) {
112 ret_val = IXGBE_ERR_SFP_NOT_SUPPORTED; 143 ret_val = IXGBE_ERR_SFP_NOT_SUPPORTED;
113 goto out; 144 goto out;
@@ -117,21 +148,6 @@ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
117 break; 148 break;
118 } 149 }
119 150
120 if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {
121 mac->ops.setup_link = &ixgbe_setup_copper_link_82598;
122 mac->ops.setup_link_speed =
123 &ixgbe_setup_copper_link_speed_82598;
124 mac->ops.get_link_capabilities =
125 &ixgbe_get_copper_link_capabilities_82598;
126 }
127
128 mac->mcft_size = IXGBE_82598_MC_TBL_SIZE;
129 mac->vft_size = IXGBE_82598_VFT_TBL_SIZE;
130 mac->num_rar_entries = IXGBE_82598_RAR_ENTRIES;
131 mac->max_rx_queues = IXGBE_82598_MAX_RX_QUEUES;
132 mac->max_tx_queues = IXGBE_82598_MAX_TX_QUEUES;
133 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_82598(hw);
134
135out: 151out:
136 return ret_val; 152 return ret_val;
137} 153}
@@ -149,12 +165,19 @@ static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
149 bool *autoneg) 165 bool *autoneg)
150{ 166{
151 s32 status = 0; 167 s32 status = 0;
168 u32 autoc = 0;
152 169
153 /* 170 /*
154 * Determine link capabilities based on the stored value of AUTOC, 171 * Determine link capabilities based on the stored value of AUTOC,
155 * which represents EEPROM defaults. 172 * which represents EEPROM defaults. If AUTOC value has not been
173 * stored, use the current register value.
156 */ 174 */
157 switch (hw->mac.orig_autoc & IXGBE_AUTOC_LMS_MASK) { 175 if (hw->mac.orig_link_settings_stored)
176 autoc = hw->mac.orig_autoc;
177 else
178 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
179
180 switch (autoc & IXGBE_AUTOC_LMS_MASK) {
158 case IXGBE_AUTOC_LMS_1G_LINK_NO_AN: 181 case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
159 *speed = IXGBE_LINK_SPEED_1GB_FULL; 182 *speed = IXGBE_LINK_SPEED_1GB_FULL;
160 *autoneg = false; 183 *autoneg = false;
@@ -173,9 +196,9 @@ static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
173 case IXGBE_AUTOC_LMS_KX4_AN: 196 case IXGBE_AUTOC_LMS_KX4_AN:
174 case IXGBE_AUTOC_LMS_KX4_AN_1G_AN: 197 case IXGBE_AUTOC_LMS_KX4_AN_1G_AN:
175 *speed = IXGBE_LINK_SPEED_UNKNOWN; 198 *speed = IXGBE_LINK_SPEED_UNKNOWN;
176 if (hw->mac.orig_autoc & IXGBE_AUTOC_KX4_SUPP) 199 if (autoc & IXGBE_AUTOC_KX4_SUPP)
177 *speed |= IXGBE_LINK_SPEED_10GB_FULL; 200 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
178 if (hw->mac.orig_autoc & IXGBE_AUTOC_KX_SUPP) 201 if (autoc & IXGBE_AUTOC_KX_SUPP)
179 *speed |= IXGBE_LINK_SPEED_1GB_FULL; 202 *speed |= IXGBE_LINK_SPEED_1GB_FULL;
180 *autoneg = true; 203 *autoneg = true;
181 break; 204 break;
@@ -206,14 +229,13 @@ static s32 ixgbe_get_copper_link_capabilities_82598(struct ixgbe_hw *hw,
206 *speed = 0; 229 *speed = 0;
207 *autoneg = true; 230 *autoneg = true;
208 231
209 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY, 232 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD,
210 IXGBE_MDIO_PMA_PMD_DEV_TYPE,
211 &speed_ability); 233 &speed_ability);
212 234
213 if (status == 0) { 235 if (status == 0) {
214 if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G) 236 if (speed_ability & MDIO_SPEED_10G)
215 *speed |= IXGBE_LINK_SPEED_10GB_FULL; 237 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
216 if (speed_ability & IXGBE_MDIO_PHY_SPEED_1G) 238 if (speed_ability & MDIO_PMA_SPEED_1000)
217 *speed |= IXGBE_LINK_SPEED_1GB_FULL; 239 *speed |= IXGBE_LINK_SPEED_1GB_FULL;
218 } 240 }
219 241
@@ -322,6 +344,7 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num)
322 } 344 }
323 345
324 /* Enable 802.3x based flow control settings. */ 346 /* Enable 802.3x based flow control settings. */
347 fctrl_reg |= IXGBE_FCTRL_DPF;
325 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg); 348 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg);
326 IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg); 349 IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg);
327 350
@@ -340,7 +363,7 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num)
340 } 363 }
341 364
342 /* Configure pause time (2 TCs per register) */ 365 /* Configure pause time (2 TCs per register) */
343 reg = IXGBE_READ_REG(hw, IXGBE_FCTTV(packetbuf_num)); 366 reg = IXGBE_READ_REG(hw, IXGBE_FCTTV(packetbuf_num / 2));
344 if ((packetbuf_num & 1) == 0) 367 if ((packetbuf_num & 1) == 0)
345 reg = (reg & 0xFFFF0000) | hw->fc.pause_time; 368 reg = (reg & 0xFFFF0000) | hw->fc.pause_time;
346 else 369 else
@@ -380,9 +403,11 @@ static s32 ixgbe_setup_fc_82598(struct ixgbe_hw *hw, s32 packetbuf_num)
380 * because it causes the controller to just blast out fc packets. 403 * because it causes the controller to just blast out fc packets.
381 */ 404 */
382 if (!hw->fc.low_water || !hw->fc.high_water || !hw->fc.pause_time) { 405 if (!hw->fc.low_water || !hw->fc.high_water || !hw->fc.pause_time) {
383 hw_dbg(hw, "Invalid water mark configuration\n"); 406 if (hw->fc.requested_mode != ixgbe_fc_none) {
384 ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; 407 hw_dbg(hw, "Invalid water mark configuration\n");
385 goto out; 408 ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;
409 goto out;
410 }
386 } 411 }
387 412
388 /* 413 /*
@@ -500,9 +525,9 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
500 * clear indicates active; set indicates inactive. 525 * clear indicates active; set indicates inactive.
501 */ 526 */
502 if (hw->phy.type == ixgbe_phy_nl) { 527 if (hw->phy.type == ixgbe_phy_nl) {
503 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg); 528 hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg);
504 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg); 529 hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg);
505 hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV, 530 hw->phy.ops.read_reg(hw, 0xC00C, MDIO_MMD_PMAPMD,
506 &adapt_comp_reg); 531 &adapt_comp_reg);
507 if (link_up_wait_to_complete) { 532 if (link_up_wait_to_complete) {
508 for (i = 0; i < IXGBE_LINK_UP_TIME; i++) { 533 for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
@@ -515,10 +540,10 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
515 } 540 }
516 msleep(100); 541 msleep(100);
517 hw->phy.ops.read_reg(hw, 0xC79F, 542 hw->phy.ops.read_reg(hw, 0xC79F,
518 IXGBE_TWINAX_DEV, 543 MDIO_MMD_PMAPMD,
519 &link_reg); 544 &link_reg);
520 hw->phy.ops.read_reg(hw, 0xC00C, 545 hw->phy.ops.read_reg(hw, 0xC00C,
521 IXGBE_TWINAX_DEV, 546 MDIO_MMD_PMAPMD,
522 &adapt_comp_reg); 547 &adapt_comp_reg);
523 } 548 }
524 } else { 549 } else {
@@ -673,6 +698,7 @@ static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw,
673static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw) 698static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
674{ 699{
675 s32 status = 0; 700 s32 status = 0;
701 s32 phy_status = 0;
676 u32 ctrl; 702 u32 ctrl;
677 u32 gheccr; 703 u32 gheccr;
678 u32 i; 704 u32 i;
@@ -716,14 +742,27 @@ static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
716 } 742 }
717 743
718 /* Reset PHY */ 744 /* Reset PHY */
719 if (hw->phy.reset_disable == false) 745 if (hw->phy.reset_disable == false) {
746 /* PHY ops must be identified and initialized prior to reset */
747
748 /* Init PHY and function pointers, perform SFP setup */
749 phy_status = hw->phy.ops.init(hw);
750 if (phy_status == IXGBE_ERR_SFP_NOT_SUPPORTED)
751 goto reset_hw_out;
752 else if (phy_status == IXGBE_ERR_SFP_NOT_PRESENT)
753 goto no_phy_reset;
754
755
720 hw->phy.ops.reset(hw); 756 hw->phy.ops.reset(hw);
757 }
721 758
759no_phy_reset:
722 /* 760 /*
723 * Prevent the PCI-E bus from from hanging by disabling PCI-E master 761 * Prevent the PCI-E bus from from hanging by disabling PCI-E master
724 * access and verify no pending requests before reset 762 * access and verify no pending requests before reset
725 */ 763 */
726 if (ixgbe_disable_pcie_master(hw) != 0) { 764 status = ixgbe_disable_pcie_master(hw);
765 if (status != 0) {
727 status = IXGBE_ERR_MASTER_REQUESTS_PENDING; 766 status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
728 hw_dbg(hw, "PCI-E Master disable polling has failed.\n"); 767 hw_dbg(hw, "PCI-E Master disable polling has failed.\n");
729 } 768 }
@@ -767,9 +806,19 @@ static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
767 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, hw->mac.orig_autoc); 806 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, hw->mac.orig_autoc);
768 } 807 }
769 808
809 /*
810 * Store MAC address from RAR0, clear receive address registers, and
811 * clear the multicast table
812 */
813 hw->mac.ops.init_rx_addrs(hw);
814
770 /* Store the permanent mac address */ 815 /* Store the permanent mac address */
771 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); 816 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);
772 817
818reset_hw_out:
819 if (phy_status)
820 status = phy_status;
821
773 return status; 822 return status;
774} 823}
775 824
@@ -954,14 +1003,14 @@ static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
954 sfp_addr = (sfp_addr | IXGBE_I2C_EEPROM_READ_MASK); 1003 sfp_addr = (sfp_addr | IXGBE_I2C_EEPROM_READ_MASK);
955 hw->phy.ops.write_reg(hw, 1004 hw->phy.ops.write_reg(hw,
956 IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR, 1005 IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR,
957 IXGBE_MDIO_PMA_PMD_DEV_TYPE, 1006 MDIO_MMD_PMAPMD,
958 sfp_addr); 1007 sfp_addr);
959 1008
960 /* Poll status */ 1009 /* Poll status */
961 for (i = 0; i < 100; i++) { 1010 for (i = 0; i < 100; i++) {
962 hw->phy.ops.read_reg(hw, 1011 hw->phy.ops.read_reg(hw,
963 IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT, 1012 IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT,
964 IXGBE_MDIO_PMA_PMD_DEV_TYPE, 1013 MDIO_MMD_PMAPMD,
965 &sfp_stat); 1014 &sfp_stat);
966 sfp_stat = sfp_stat & IXGBE_I2C_EEPROM_STATUS_MASK; 1015 sfp_stat = sfp_stat & IXGBE_I2C_EEPROM_STATUS_MASK;
967 if (sfp_stat != IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS) 1016 if (sfp_stat != IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS)
@@ -977,7 +1026,7 @@ static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
977 1026
978 /* Read data */ 1027 /* Read data */
979 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA, 1028 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA,
980 IXGBE_MDIO_PMA_PMD_DEV_TYPE, &sfp_data); 1029 MDIO_MMD_PMAPMD, &sfp_data);
981 1030
982 *eeprom_data = (u8)(sfp_data >> 8); 1031 *eeprom_data = (u8)(sfp_data >> 8);
983 } else { 1032 } else {
@@ -998,35 +1047,56 @@ out:
998static u32 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw) 1047static u32 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw)
999{ 1048{
1000 u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; 1049 u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1050 u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
1051 u32 pma_pmd_10g = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK;
1052 u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
1053 u16 ext_ability = 0;
1054
1055 hw->phy.ops.identify(hw);
1056
1057 /* Copper PHY must be checked before AUTOC LMS to determine correct
1058 * physical layer because 10GBase-T PHYs use LMS = KX4/KX */
1059 if (hw->phy.type == ixgbe_phy_tn ||
1060 hw->phy.type == ixgbe_phy_cu_unknown) {
1061 hw->phy.ops.read_reg(hw, MDIO_PMA_EXTABLE, MDIO_MMD_PMAPMD,
1062 &ext_ability);
1063 if (ext_ability & MDIO_PMA_EXTABLE_10GBT)
1064 physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_T;
1065 if (ext_ability & MDIO_PMA_EXTABLE_1000BT)
1066 physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T;
1067 if (ext_ability & MDIO_PMA_EXTABLE_100BTX)
1068 physical_layer |= IXGBE_PHYSICAL_LAYER_100BASE_TX;
1069 goto out;
1070 }
1001 1071
1002 switch (hw->device_id) { 1072 switch (autoc & IXGBE_AUTOC_LMS_MASK) {
1003 case IXGBE_DEV_ID_82598: 1073 case IXGBE_AUTOC_LMS_1G_AN:
1004 /* Default device ID is mezzanine card KX/KX4 */ 1074 case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
1005 physical_layer = (IXGBE_PHYSICAL_LAYER_10GBASE_KX4 | 1075 if (pma_pmd_1g == IXGBE_AUTOC_1G_KX)
1006 IXGBE_PHYSICAL_LAYER_1000BASE_KX); 1076 physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_KX;
1007 break; 1077 else
1008 case IXGBE_DEV_ID_82598_BX: 1078 physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_BX;
1009 physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_BX;
1010 case IXGBE_DEV_ID_82598EB_CX4:
1011 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
1012 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_CX4;
1013 break;
1014 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
1015 physical_layer = IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU;
1016 break; 1079 break;
1017 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 1080 case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
1018 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 1081 if (pma_pmd_10g == IXGBE_AUTOC_10G_CX4)
1019 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 1082 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_CX4;
1020 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR; 1083 else if (pma_pmd_10g == IXGBE_AUTOC_10G_KX4)
1084 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_KX4;
1085 else /* XAUI */
1086 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1021 break; 1087 break;
1022 case IXGBE_DEV_ID_82598EB_XF_LR: 1088 case IXGBE_AUTOC_LMS_KX4_AN:
1023 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR; 1089 case IXGBE_AUTOC_LMS_KX4_AN_1G_AN:
1090 if (autoc & IXGBE_AUTOC_KX_SUPP)
1091 physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_KX;
1092 if (autoc & IXGBE_AUTOC_KX4_SUPP)
1093 physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_KX4;
1024 break; 1094 break;
1025 case IXGBE_DEV_ID_82598AT: 1095 default:
1026 physical_layer = (IXGBE_PHYSICAL_LAYER_10GBASE_T |
1027 IXGBE_PHYSICAL_LAYER_1000BASE_T);
1028 break; 1096 break;
1029 case IXGBE_DEV_ID_82598EB_SFP_LOM: 1097 }
1098
1099 if (hw->phy.type == ixgbe_phy_nl) {
1030 hw->phy.ops.identify_sfp(hw); 1100 hw->phy.ops.identify_sfp(hw);
1031 1101
1032 switch (hw->phy.sfp_type) { 1102 switch (hw->phy.sfp_type) {
@@ -1043,13 +1113,25 @@ static u32 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw)
1043 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; 1113 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1044 break; 1114 break;
1045 } 1115 }
1046 break; 1116 }
1047 1117
1118 switch (hw->device_id) {
1119 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
1120 physical_layer = IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU;
1121 break;
1122 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
1123 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
1124 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
1125 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR;
1126 break;
1127 case IXGBE_DEV_ID_82598EB_XF_LR:
1128 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR;
1129 break;
1048 default: 1130 default:
1049 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1050 break; 1131 break;
1051 } 1132 }
1052 1133
1134out:
1053 return physical_layer; 1135 return physical_layer;
1054} 1136}
1055 1137
@@ -1099,6 +1181,7 @@ static struct ixgbe_eeprom_operations eeprom_ops_82598 = {
1099static struct ixgbe_phy_operations phy_ops_82598 = { 1181static struct ixgbe_phy_operations phy_ops_82598 = {
1100 .identify = &ixgbe_identify_phy_generic, 1182 .identify = &ixgbe_identify_phy_generic,
1101 .identify_sfp = &ixgbe_identify_sfp_module_generic, 1183 .identify_sfp = &ixgbe_identify_sfp_module_generic,
1184 .init = &ixgbe_init_phy_ops_82598,
1102 .reset = &ixgbe_reset_phy_generic, 1185 .reset = &ixgbe_reset_phy_generic,
1103 .read_reg = &ixgbe_read_phy_reg_generic, 1186 .read_reg = &ixgbe_read_phy_reg_generic,
1104 .write_reg = &ixgbe_write_phy_reg_generic, 1187 .write_reg = &ixgbe_write_phy_reg_generic,
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c
index 29771fbaa42d..5d2783081a94 100644
--- a/drivers/net/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ixgbe/ixgbe_82599.c
@@ -100,12 +100,22 @@ s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)
100 100
101 if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) { 101 if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) {
102 ixgbe_init_mac_link_ops_82599(hw); 102 ixgbe_init_mac_link_ops_82599(hw);
103
104 hw->phy.ops.reset = NULL;
105
103 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, 106 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset,
104 &data_offset); 107 &data_offset);
105 108
106 if (ret_val != 0) 109 if (ret_val != 0)
107 goto setup_sfp_out; 110 goto setup_sfp_out;
108 111
112 /* PHY config will finish before releasing the semaphore */
113 ret_val = ixgbe_acquire_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);
114 if (ret_val != 0) {
115 ret_val = IXGBE_ERR_SWFW_SYNC;
116 goto setup_sfp_out;
117 }
118
109 hw->eeprom.ops.read(hw, ++data_offset, &data_value); 119 hw->eeprom.ops.read(hw, ++data_offset, &data_value);
110 while (data_value != 0xffff) { 120 while (data_value != 0xffff) {
111 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, data_value); 121 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, data_value);
@@ -116,6 +126,11 @@ s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)
116 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, 0x00000102); 126 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, 0x00000102);
117 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, 0x00000b1d); 127 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, 0x00000b1d);
118 IXGBE_WRITE_FLUSH(hw); 128 IXGBE_WRITE_FLUSH(hw);
129
130 /* Release the semaphore */
131 ixgbe_release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);
132 /* Delay obtaining semaphore again to allow FW access */
133 msleep(hw->eeprom.semaphore_delay);
119 } 134 }
120 135
121setup_sfp_out: 136setup_sfp_out:
@@ -146,51 +161,60 @@ u32 ixgbe_get_pcie_msix_count_82599(struct ixgbe_hw *hw)
146static s32 ixgbe_get_invariants_82599(struct ixgbe_hw *hw) 161static s32 ixgbe_get_invariants_82599(struct ixgbe_hw *hw)
147{ 162{
148 struct ixgbe_mac_info *mac = &hw->mac; 163 struct ixgbe_mac_info *mac = &hw->mac;
149 struct ixgbe_phy_info *phy = &hw->phy;
150 s32 ret_val;
151 164
152 /* Set the bus information prior to PHY identification */ 165 ixgbe_init_mac_link_ops_82599(hw);
153 mac->ops.get_bus_info(hw);
154 166
155 /* Call PHY identify routine to get the Cu or SFI phy type */ 167 mac->mcft_size = IXGBE_82599_MC_TBL_SIZE;
156 ret_val = phy->ops.identify(hw); 168 mac->vft_size = IXGBE_82599_VFT_TBL_SIZE;
169 mac->num_rar_entries = IXGBE_82599_RAR_ENTRIES;
170 mac->max_rx_queues = IXGBE_82599_MAX_RX_QUEUES;
171 mac->max_tx_queues = IXGBE_82599_MAX_TX_QUEUES;
172 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_82599(hw);
173
174 return 0;
175}
157 176
158 if (ret_val == IXGBE_ERR_SFP_NOT_SUPPORTED) 177/**
159 goto get_invariants_out; 178 * ixgbe_init_phy_ops_82599 - PHY/SFP specific init
179 * @hw: pointer to hardware structure
180 *
181 * Initialize any function pointers that were not able to be
182 * set during get_invariants because the PHY/SFP type was
183 * not known. Perform the SFP init if necessary.
184 *
185 **/
186s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw)
187{
188 struct ixgbe_mac_info *mac = &hw->mac;
189 struct ixgbe_phy_info *phy = &hw->phy;
190 s32 ret_val = 0;
160 191
161 ixgbe_init_mac_link_ops_82599(hw); 192 /* Identify the PHY or SFP module */
193 ret_val = phy->ops.identify(hw);
162 194
163 /* Setup SFP module if there is one present. */ 195 /* Setup function pointers based on detected SFP module and speeds */
164 ret_val = mac->ops.setup_sfp(hw); 196 ixgbe_init_mac_link_ops_82599(hw);
165 197
166 /* If copper media, overwrite with copper function pointers */ 198 /* If copper media, overwrite with copper function pointers */
167 if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) { 199 if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {
168 mac->ops.setup_link = &ixgbe_setup_copper_link_82599; 200 mac->ops.setup_link = &ixgbe_setup_copper_link_82599;
169 mac->ops.setup_link_speed = 201 mac->ops.setup_link_speed =
170 &ixgbe_setup_copper_link_speed_82599; 202 &ixgbe_setup_copper_link_speed_82599;
171 mac->ops.get_link_capabilities = 203 mac->ops.get_link_capabilities =
172 &ixgbe_get_copper_link_capabilities_82599; 204 &ixgbe_get_copper_link_capabilities_82599;
173 } 205 }
174 206
175 /* PHY Init */ 207 /* Set necessary function pointers based on phy type */
176 switch (hw->phy.type) { 208 switch (hw->phy.type) {
177 case ixgbe_phy_tn: 209 case ixgbe_phy_tn:
178 phy->ops.check_link = &ixgbe_check_phy_link_tnx; 210 phy->ops.check_link = &ixgbe_check_phy_link_tnx;
179 phy->ops.get_firmware_version = 211 phy->ops.get_firmware_version =
180 &ixgbe_get_phy_firmware_version_tnx; 212 &ixgbe_get_phy_firmware_version_tnx;
181 break; 213 break;
182 default: 214 default:
183 break; 215 break;
184 } 216 }
185 217
186 mac->mcft_size = IXGBE_82599_MC_TBL_SIZE;
187 mac->vft_size = IXGBE_82599_VFT_TBL_SIZE;
188 mac->num_rar_entries = IXGBE_82599_RAR_ENTRIES;
189 mac->max_rx_queues = IXGBE_82599_MAX_RX_QUEUES;
190 mac->max_tx_queues = IXGBE_82599_MAX_TX_QUEUES;
191 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_82599(hw);
192
193get_invariants_out:
194 return ret_val; 218 return ret_val;
195} 219}
196 220
@@ -207,8 +231,19 @@ s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
207 bool *negotiation) 231 bool *negotiation)
208{ 232{
209 s32 status = 0; 233 s32 status = 0;
234 u32 autoc = 0;
210 235
211 switch (hw->mac.orig_autoc & IXGBE_AUTOC_LMS_MASK) { 236 /*
237 * Determine link capabilities based on the stored value of AUTOC,
238 * which represents EEPROM defaults. If AUTOC value has not been
239 * stored, use the current register value.
240 */
241 if (hw->mac.orig_link_settings_stored)
242 autoc = hw->mac.orig_autoc;
243 else
244 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
245
246 switch (autoc & IXGBE_AUTOC_LMS_MASK) {
212 case IXGBE_AUTOC_LMS_1G_LINK_NO_AN: 247 case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
213 *speed = IXGBE_LINK_SPEED_1GB_FULL; 248 *speed = IXGBE_LINK_SPEED_1GB_FULL;
214 *negotiation = false; 249 *negotiation = false;
@@ -232,22 +267,22 @@ s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
232 case IXGBE_AUTOC_LMS_KX4_KX_KR: 267 case IXGBE_AUTOC_LMS_KX4_KX_KR:
233 case IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN: 268 case IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN:
234 *speed = IXGBE_LINK_SPEED_UNKNOWN; 269 *speed = IXGBE_LINK_SPEED_UNKNOWN;
235 if (hw->mac.orig_autoc & IXGBE_AUTOC_KR_SUPP) 270 if (autoc & IXGBE_AUTOC_KR_SUPP)
236 *speed |= IXGBE_LINK_SPEED_10GB_FULL; 271 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
237 if (hw->mac.orig_autoc & IXGBE_AUTOC_KX4_SUPP) 272 if (autoc & IXGBE_AUTOC_KX4_SUPP)
238 *speed |= IXGBE_LINK_SPEED_10GB_FULL; 273 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
239 if (hw->mac.orig_autoc & IXGBE_AUTOC_KX_SUPP) 274 if (autoc & IXGBE_AUTOC_KX_SUPP)
240 *speed |= IXGBE_LINK_SPEED_1GB_FULL; 275 *speed |= IXGBE_LINK_SPEED_1GB_FULL;
241 *negotiation = true; 276 *negotiation = true;
242 break; 277 break;
243 278
244 case IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII: 279 case IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII:
245 *speed = IXGBE_LINK_SPEED_100_FULL; 280 *speed = IXGBE_LINK_SPEED_100_FULL;
246 if (hw->mac.orig_autoc & IXGBE_AUTOC_KR_SUPP) 281 if (autoc & IXGBE_AUTOC_KR_SUPP)
247 *speed |= IXGBE_LINK_SPEED_10GB_FULL; 282 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
248 if (hw->mac.orig_autoc & IXGBE_AUTOC_KX4_SUPP) 283 if (autoc & IXGBE_AUTOC_KX4_SUPP)
249 *speed |= IXGBE_LINK_SPEED_10GB_FULL; 284 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
250 if (hw->mac.orig_autoc & IXGBE_AUTOC_KX_SUPP) 285 if (autoc & IXGBE_AUTOC_KX_SUPP)
251 *speed |= IXGBE_LINK_SPEED_1GB_FULL; 286 *speed |= IXGBE_LINK_SPEED_1GB_FULL;
252 *negotiation = true; 287 *negotiation = true;
253 break; 288 break;
@@ -291,14 +326,13 @@ static s32 ixgbe_get_copper_link_capabilities_82599(struct ixgbe_hw *hw,
291 *speed = 0; 326 *speed = 0;
292 *autoneg = true; 327 *autoneg = true;
293 328
294 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY, 329 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD,
295 IXGBE_MDIO_PMA_PMD_DEV_TYPE,
296 &speed_ability); 330 &speed_ability);
297 331
298 if (status == 0) { 332 if (status == 0) {
299 if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G) 333 if (speed_ability & MDIO_SPEED_10G)
300 *speed |= IXGBE_LINK_SPEED_10GB_FULL; 334 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
301 if (speed_ability & IXGBE_MDIO_PHY_SPEED_1G) 335 if (speed_ability & MDIO_PMA_SPEED_1000)
302 *speed |= IXGBE_LINK_SPEED_1GB_FULL; 336 *speed |= IXGBE_LINK_SPEED_1GB_FULL;
303 } 337 }
304 338
@@ -323,8 +357,8 @@ enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw)
323 } 357 }
324 358
325 switch (hw->device_id) { 359 switch (hw->device_id) {
326 case IXGBE_DEV_ID_82599:
327 case IXGBE_DEV_ID_82599_KX4: 360 case IXGBE_DEV_ID_82599_KX4:
361 case IXGBE_DEV_ID_82599_XAUI_LOM:
328 /* Default device ID is mezzanine card KX/KX4 */ 362 /* Default device ID is mezzanine card KX/KX4 */
329 media_type = ixgbe_media_type_backplane; 363 media_type = ixgbe_media_type_backplane;
330 break; 364 break;
@@ -558,6 +592,7 @@ s32 ixgbe_setup_mac_link_speed_82599(struct ixgbe_hw *hw,
558 s32 status = 0; 592 s32 status = 0;
559 u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); 593 u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
560 u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2); 594 u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
595 u32 orig_autoc = 0;
561 u32 link_mode = autoc & IXGBE_AUTOC_LMS_MASK; 596 u32 link_mode = autoc & IXGBE_AUTOC_LMS_MASK;
562 u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK; 597 u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
563 u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK; 598 u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
@@ -569,6 +604,13 @@ s32 ixgbe_setup_mac_link_speed_82599(struct ixgbe_hw *hw,
569 hw->mac.ops.get_link_capabilities(hw, &link_capabilities, &autoneg); 604 hw->mac.ops.get_link_capabilities(hw, &link_capabilities, &autoneg);
570 speed &= link_capabilities; 605 speed &= link_capabilities;
571 606
607 /* Use stored value (EEPROM defaults) of AUTOC to find KR/KX4 support*/
608 if (hw->mac.orig_link_settings_stored)
609 orig_autoc = hw->mac.orig_autoc;
610 else
611 orig_autoc = autoc;
612
613
572 if (speed == IXGBE_LINK_SPEED_UNKNOWN) { 614 if (speed == IXGBE_LINK_SPEED_UNKNOWN) {
573 status = IXGBE_ERR_LINK_SETUP; 615 status = IXGBE_ERR_LINK_SETUP;
574 } else if (link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR || 616 } else if (link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR ||
@@ -577,9 +619,9 @@ s32 ixgbe_setup_mac_link_speed_82599(struct ixgbe_hw *hw,
577 /* Set KX4/KX/KR support according to speed requested */ 619 /* Set KX4/KX/KR support according to speed requested */
578 autoc &= ~(IXGBE_AUTOC_KX4_KX_SUPP_MASK | IXGBE_AUTOC_KR_SUPP); 620 autoc &= ~(IXGBE_AUTOC_KX4_KX_SUPP_MASK | IXGBE_AUTOC_KR_SUPP);
579 if (speed & IXGBE_LINK_SPEED_10GB_FULL) 621 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
580 if (hw->mac.orig_autoc & IXGBE_AUTOC_KX4_SUPP) 622 if (orig_autoc & IXGBE_AUTOC_KX4_SUPP)
581 autoc |= IXGBE_AUTOC_KX4_SUPP; 623 autoc |= IXGBE_AUTOC_KX4_SUPP;
582 if (hw->mac.orig_autoc & IXGBE_AUTOC_KR_SUPP) 624 if (orig_autoc & IXGBE_AUTOC_KR_SUPP)
583 autoc |= IXGBE_AUTOC_KR_SUPP; 625 autoc |= IXGBE_AUTOC_KR_SUPP;
584 if (speed & IXGBE_LINK_SPEED_1GB_FULL) 626 if (speed & IXGBE_LINK_SPEED_1GB_FULL)
585 autoc |= IXGBE_AUTOC_KX_SUPP; 627 autoc |= IXGBE_AUTOC_KX_SUPP;
@@ -705,14 +747,30 @@ s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
705 /* Call adapter stop to disable tx/rx and clear interrupts */ 747 /* Call adapter stop to disable tx/rx and clear interrupts */
706 hw->mac.ops.stop_adapter(hw); 748 hw->mac.ops.stop_adapter(hw);
707 749
750 /* PHY ops must be identified and initialized prior to reset */
751
752 /* Init PHY and function pointers, perform SFP setup */
753 status = hw->phy.ops.init(hw);
754
755 if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
756 goto reset_hw_out;
757
758 /* Setup SFP module if there is one present. */
759 if (hw->phy.sfp_setup_needed) {
760 status = hw->mac.ops.setup_sfp(hw);
761 hw->phy.sfp_setup_needed = false;
762 }
763
708 /* Reset PHY */ 764 /* Reset PHY */
709 hw->phy.ops.reset(hw); 765 if (hw->phy.reset_disable == false && hw->phy.ops.reset != NULL)
766 hw->phy.ops.reset(hw);
710 767
711 /* 768 /*
712 * Prevent the PCI-E bus from from hanging by disabling PCI-E master 769 * Prevent the PCI-E bus from from hanging by disabling PCI-E master
713 * access and verify no pending requests before reset 770 * access and verify no pending requests before reset
714 */ 771 */
715 if (ixgbe_disable_pcie_master(hw) != 0) { 772 status = ixgbe_disable_pcie_master(hw);
773 if (status != 0) {
716 status = IXGBE_ERR_MASTER_REQUESTS_PENDING; 774 status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
717 hw_dbg(hw, "PCI-E Master disable polling has failed.\n"); 775 hw_dbg(hw, "PCI-E Master disable polling has failed.\n");
718 } 776 }
@@ -770,9 +828,30 @@ s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
770 } 828 }
771 } 829 }
772 830
831 /*
832 * Store MAC address from RAR0, clear receive address registers, and
833 * clear the multicast table. Also reset num_rar_entries to 128,
834 * since we modify this value when programming the SAN MAC address.
835 */
836 hw->mac.num_rar_entries = 128;
837 hw->mac.ops.init_rx_addrs(hw);
838
773 /* Store the permanent mac address */ 839 /* Store the permanent mac address */
774 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); 840 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);
775 841
842 /* Store the permanent SAN mac address */
843 hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);
844
845 /* Add the SAN MAC address to the RAR only if it's a valid address */
846 if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) {
847 hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1,
848 hw->mac.san_addr, 0, IXGBE_RAH_AV);
849
850 /* Reserve the last RAR for the SAN MAC address */
851 hw->mac.num_rar_entries--;
852 }
853
854reset_hw_out:
776 return status; 855 return status;
777} 856}
778 857
@@ -1093,53 +1172,100 @@ s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw)
1093u32 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw) 1172u32 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw)
1094{ 1173{
1095 u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; 1174 u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1175 u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
1176 u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
1177 u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
1178 u32 pma_pmd_10g_parallel = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK;
1179 u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
1180 u16 ext_ability = 0;
1096 u8 comp_codes_10g = 0; 1181 u8 comp_codes_10g = 0;
1097 1182
1098 switch (hw->device_id) { 1183 hw->phy.ops.identify(hw);
1099 case IXGBE_DEV_ID_82599: 1184
1100 case IXGBE_DEV_ID_82599_KX4: 1185 if (hw->phy.type == ixgbe_phy_tn ||
1101 /* Default device ID is mezzanine card KX/KX4 */ 1186 hw->phy.type == ixgbe_phy_cu_unknown) {
1102 physical_layer = (IXGBE_PHYSICAL_LAYER_10GBASE_KX4 | 1187 hw->phy.ops.read_reg(hw, MDIO_PMA_EXTABLE, MDIO_MMD_PMAPMD,
1103 IXGBE_PHYSICAL_LAYER_1000BASE_KX); 1188 &ext_ability);
1189 if (ext_ability & MDIO_PMA_EXTABLE_10GBT)
1190 physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_T;
1191 if (ext_ability & MDIO_PMA_EXTABLE_1000BT)
1192 physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T;
1193 if (ext_ability & MDIO_PMA_EXTABLE_100BTX)
1194 physical_layer |= IXGBE_PHYSICAL_LAYER_100BASE_TX;
1195 goto out;
1196 }
1197
1198 switch (autoc & IXGBE_AUTOC_LMS_MASK) {
1199 case IXGBE_AUTOC_LMS_1G_AN:
1200 case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
1201 if (pma_pmd_1g == IXGBE_AUTOC_1G_KX_BX) {
1202 physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_KX |
1203 IXGBE_PHYSICAL_LAYER_1000BASE_BX;
1204 goto out;
1205 } else
1206 /* SFI mode so read SFP module */
1207 goto sfp_check;
1104 break; 1208 break;
1105 case IXGBE_DEV_ID_82599_SFP: 1209 case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
1106 hw->phy.ops.identify_sfp(hw); 1210 if (pma_pmd_10g_parallel == IXGBE_AUTOC_10G_CX4)
1211 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_CX4;
1212 else if (pma_pmd_10g_parallel == IXGBE_AUTOC_10G_KX4)
1213 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_KX4;
1214 else if (pma_pmd_10g_parallel == IXGBE_AUTOC_10G_XAUI)
1215 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_XAUI;
1216 goto out;
1217 break;
1218 case IXGBE_AUTOC_LMS_10G_SERIAL:
1219 if (pma_pmd_10g_serial == IXGBE_AUTOC2_10G_KR) {
1220 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_KR;
1221 goto out;
1222 } else if (pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI)
1223 goto sfp_check;
1224 break;
1225 case IXGBE_AUTOC_LMS_KX4_KX_KR:
1226 case IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN:
1227 if (autoc & IXGBE_AUTOC_KX_SUPP)
1228 physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_KX;
1229 if (autoc & IXGBE_AUTOC_KX4_SUPP)
1230 physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_KX4;
1231 if (autoc & IXGBE_AUTOC_KR_SUPP)
1232 physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_KR;
1233 goto out;
1234 break;
1235 default:
1236 goto out;
1237 break;
1238 }
1107 1239
1108 switch (hw->phy.sfp_type) { 1240sfp_check:
1109 case ixgbe_sfp_type_da_cu: 1241 /* SFP check must be done last since DA modules are sometimes used to
1110 case ixgbe_sfp_type_da_cu_core0: 1242 * test KR mode - we need to id KR mode correctly before SFP module.
1111 case ixgbe_sfp_type_da_cu_core1: 1243 * Call identify_sfp because the pluggable module may have changed */
1112 physical_layer = IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU; 1244 hw->phy.ops.identify_sfp(hw);
1113 break; 1245 if (hw->phy.sfp_type == ixgbe_sfp_type_not_present)
1114 case ixgbe_sfp_type_sr: 1246 goto out;
1247
1248 switch (hw->phy.type) {
1249 case ixgbe_phy_tw_tyco:
1250 case ixgbe_phy_tw_unknown:
1251 physical_layer = IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU;
1252 break;
1253 case ixgbe_phy_sfp_avago:
1254 case ixgbe_phy_sfp_ftl:
1255 case ixgbe_phy_sfp_intel:
1256 case ixgbe_phy_sfp_unknown:
1257 hw->phy.ops.read_i2c_eeprom(hw,
1258 IXGBE_SFF_10GBE_COMP_CODES, &comp_codes_10g);
1259 if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)
1115 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR; 1260 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR;
1116 break; 1261 else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE)
1117 case ixgbe_sfp_type_lr:
1118 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR; 1262 physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR;
1119 break;
1120 case ixgbe_sfp_type_srlr_core0:
1121 case ixgbe_sfp_type_srlr_core1:
1122 hw->phy.ops.read_i2c_eeprom(hw,
1123 IXGBE_SFF_10GBE_COMP_CODES,
1124 &comp_codes_10g);
1125 if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)
1126 physical_layer =
1127 IXGBE_PHYSICAL_LAYER_10GBASE_SR;
1128 else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE)
1129 physical_layer =
1130 IXGBE_PHYSICAL_LAYER_10GBASE_LR;
1131 else
1132 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1133 default:
1134 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1135 break;
1136 }
1137 break; 1263 break;
1138 default: 1264 default:
1139 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
1140 break; 1265 break;
1141 } 1266 }
1142 1267
1268out:
1143 return physical_layer; 1269 return physical_layer;
1144} 1270}
1145 1271
@@ -1187,6 +1313,90 @@ s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval)
1187 return 0; 1313 return 0;
1188} 1314}
1189 1315
1316/**
1317 * ixgbe_get_device_caps_82599 - Get additional device capabilities
1318 * @hw: pointer to hardware structure
1319 * @device_caps: the EEPROM word with the extra device capabilities
1320 *
1321 * This function will read the EEPROM location for the device capabilities,
1322 * and return the word through device_caps.
1323 **/
1324s32 ixgbe_get_device_caps_82599(struct ixgbe_hw *hw, u16 *device_caps)
1325{
1326 hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps);
1327
1328 return 0;
1329}
1330
1331/**
1332 * ixgbe_get_san_mac_addr_offset_82599 - SAN MAC address offset for 82599
1333 * @hw: pointer to hardware structure
1334 * @san_mac_offset: SAN MAC address offset
1335 *
1336 * This function will read the EEPROM location for the SAN MAC address
1337 * pointer, and returns the value at that location. This is used in both
1338 * get and set mac_addr routines.
1339 **/
1340s32 ixgbe_get_san_mac_addr_offset_82599(struct ixgbe_hw *hw,
1341 u16 *san_mac_offset)
1342{
1343 /*
1344 * First read the EEPROM pointer to see if the MAC addresses are
1345 * available.
1346 */
1347 hw->eeprom.ops.read(hw, IXGBE_SAN_MAC_ADDR_PTR, san_mac_offset);
1348
1349 return 0;
1350}
1351
1352/**
1353 * ixgbe_get_san_mac_addr_82599 - SAN MAC address retrieval for 82599
1354 * @hw: pointer to hardware structure
1355 * @san_mac_addr: SAN MAC address
1356 *
1357 * Reads the SAN MAC address from the EEPROM, if it's available. This is
1358 * per-port, so set_lan_id() must be called before reading the addresses.
1359 * set_lan_id() is called by identify_sfp(), but this cannot be relied
1360 * upon for non-SFP connections, so we must call it here.
1361 **/
1362s32 ixgbe_get_san_mac_addr_82599(struct ixgbe_hw *hw, u8 *san_mac_addr)
1363{
1364 u16 san_mac_data, san_mac_offset;
1365 u8 i;
1366
1367 /*
1368 * First read the EEPROM pointer to see if the MAC addresses are
1369 * available. If they're not, no point in calling set_lan_id() here.
1370 */
1371 ixgbe_get_san_mac_addr_offset_82599(hw, &san_mac_offset);
1372
1373 if ((san_mac_offset == 0) || (san_mac_offset == 0xFFFF)) {
1374 /*
1375 * No addresses available in this EEPROM. It's not an
1376 * error though, so just wipe the local address and return.
1377 */
1378 for (i = 0; i < 6; i++)
1379 san_mac_addr[i] = 0xFF;
1380
1381 goto san_mac_addr_out;
1382 }
1383
1384 /* make sure we know which port we need to program */
1385 hw->mac.ops.set_lan_id(hw);
1386 /* apply the port offset to the address offset */
1387 (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) :
1388 (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT0_OFFSET);
1389 for (i = 0; i < 3; i++) {
1390 hw->eeprom.ops.read(hw, san_mac_offset, &san_mac_data);
1391 san_mac_addr[i * 2] = (u8)(san_mac_data);
1392 san_mac_addr[i * 2 + 1] = (u8)(san_mac_data >> 8);
1393 san_mac_offset++;
1394 }
1395
1396san_mac_addr_out:
1397 return 0;
1398}
1399
1190static struct ixgbe_mac_operations mac_ops_82599 = { 1400static struct ixgbe_mac_operations mac_ops_82599 = {
1191 .init_hw = &ixgbe_init_hw_generic, 1401 .init_hw = &ixgbe_init_hw_generic,
1192 .reset_hw = &ixgbe_reset_hw_82599, 1402 .reset_hw = &ixgbe_reset_hw_82599,
@@ -1196,6 +1406,8 @@ static struct ixgbe_mac_operations mac_ops_82599 = {
1196 .get_supported_physical_layer = &ixgbe_get_supported_physical_layer_82599, 1406 .get_supported_physical_layer = &ixgbe_get_supported_physical_layer_82599,
1197 .enable_rx_dma = &ixgbe_enable_rx_dma_82599, 1407 .enable_rx_dma = &ixgbe_enable_rx_dma_82599,
1198 .get_mac_addr = &ixgbe_get_mac_addr_generic, 1408 .get_mac_addr = &ixgbe_get_mac_addr_generic,
1409 .get_san_mac_addr = &ixgbe_get_san_mac_addr_82599,
1410 .get_device_caps = &ixgbe_get_device_caps_82599,
1199 .stop_adapter = &ixgbe_stop_adapter_generic, 1411 .stop_adapter = &ixgbe_stop_adapter_generic,
1200 .get_bus_info = &ixgbe_get_bus_info_generic, 1412 .get_bus_info = &ixgbe_get_bus_info_generic,
1201 .set_lan_id = &ixgbe_set_lan_id_multi_port_pcie, 1413 .set_lan_id = &ixgbe_set_lan_id_multi_port_pcie,
@@ -1236,6 +1448,7 @@ static struct ixgbe_eeprom_operations eeprom_ops_82599 = {
1236static struct ixgbe_phy_operations phy_ops_82599 = { 1448static struct ixgbe_phy_operations phy_ops_82599 = {
1237 .identify = &ixgbe_identify_phy_82599, 1449 .identify = &ixgbe_identify_phy_82599,
1238 .identify_sfp = &ixgbe_identify_sfp_module_generic, 1450 .identify_sfp = &ixgbe_identify_sfp_module_generic,
1451 .init = &ixgbe_init_phy_ops_82599,
1239 .reset = &ixgbe_reset_phy_generic, 1452 .reset = &ixgbe_reset_phy_generic,
1240 .read_reg = &ixgbe_read_phy_reg_generic, 1453 .read_reg = &ixgbe_read_phy_reg_generic,
1241 .write_reg = &ixgbe_write_phy_reg_generic, 1454 .write_reg = &ixgbe_write_phy_reg_generic,
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c
index 186a65069b33..6f79409270a7 100644
--- a/drivers/net/ixgbe/ixgbe_common.c
+++ b/drivers/net/ixgbe/ixgbe_common.c
@@ -28,6 +28,8 @@
28#include <linux/pci.h> 28#include <linux/pci.h>
29#include <linux/delay.h> 29#include <linux/delay.h>
30#include <linux/sched.h> 30#include <linux/sched.h>
31#include <linux/list.h>
32#include <linux/netdevice.h>
31 33
32#include "ixgbe.h" 34#include "ixgbe.h"
33#include "ixgbe_common.h" 35#include "ixgbe_common.h"
@@ -71,12 +73,6 @@ s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw)
71 /* Identify the PHY */ 73 /* Identify the PHY */
72 hw->phy.ops.identify(hw); 74 hw->phy.ops.identify(hw);
73 75
74 /*
75 * Store MAC address from RAR0, clear receive address registers, and
76 * clear the multicast table
77 */
78 hw->mac.ops.init_rx_addrs(hw);
79
80 /* Clear the VLAN filter table */ 76 /* Clear the VLAN filter table */
81 hw->mac.ops.clear_vfta(hw); 77 hw->mac.ops.clear_vfta(hw);
82 78
@@ -1362,15 +1358,14 @@ static void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
1362 * Drivers using secondary unicast addresses must set user_set_promisc when 1358 * Drivers using secondary unicast addresses must set user_set_promisc when
1363 * manually putting the device into promiscuous mode. 1359 * manually putting the device into promiscuous mode.
1364 **/ 1360 **/
1365s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, 1361s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw,
1366 u32 addr_count, ixgbe_mc_addr_itr next) 1362 struct list_head *uc_list)
1367{ 1363{
1368 u8 *addr;
1369 u32 i; 1364 u32 i;
1370 u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc; 1365 u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc;
1371 u32 uc_addr_in_use; 1366 u32 uc_addr_in_use;
1372 u32 fctrl; 1367 u32 fctrl;
1373 u32 vmdq; 1368 struct netdev_hw_addr *ha;
1374 1369
1375 /* 1370 /*
1376 * Clear accounting of old secondary address list, 1371 * Clear accounting of old secondary address list,
@@ -1388,10 +1383,9 @@ s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,
1388 } 1383 }
1389 1384
1390 /* Add the new addresses */ 1385 /* Add the new addresses */
1391 for (i = 0; i < addr_count; i++) { 1386 list_for_each_entry(ha, uc_list, list) {
1392 hw_dbg(hw, " Adding the secondary addresses:\n"); 1387 hw_dbg(hw, " Adding the secondary addresses:\n");
1393 addr = next(hw, &addr_list, &vmdq); 1388 ixgbe_add_uc_addr(hw, ha->addr, 0);
1394 ixgbe_add_uc_addr(hw, addr, vmdq);
1395 } 1389 }
1396 1390
1397 if (hw->addr_ctrl.overflow_promisc) { 1391 if (hw->addr_ctrl.overflow_promisc) {
@@ -1595,6 +1589,13 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
1595 u32 mflcn_reg; 1589 u32 mflcn_reg;
1596 u32 fccfg_reg; 1590 u32 fccfg_reg;
1597 u32 reg; 1591 u32 reg;
1592 u32 rx_pba_size;
1593
1594#ifdef CONFIG_DCB
1595 if (hw->fc.requested_mode == ixgbe_fc_pfc)
1596 goto out;
1597
1598#endif /* CONFIG_DCB */
1598 1599
1599 mflcn_reg = IXGBE_READ_REG(hw, IXGBE_MFLCN); 1600 mflcn_reg = IXGBE_READ_REG(hw, IXGBE_MFLCN);
1600 mflcn_reg &= ~(IXGBE_MFLCN_RFCE | IXGBE_MFLCN_RPFCE); 1601 mflcn_reg &= ~(IXGBE_MFLCN_RFCE | IXGBE_MFLCN_RPFCE);
@@ -1653,24 +1654,45 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
1653 } 1654 }
1654 1655
1655 /* Enable 802.3x based flow control settings. */ 1656 /* Enable 802.3x based flow control settings. */
1657 mflcn_reg |= IXGBE_MFLCN_DPF;
1656 IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn_reg); 1658 IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn_reg);
1657 IXGBE_WRITE_REG(hw, IXGBE_FCCFG, fccfg_reg); 1659 IXGBE_WRITE_REG(hw, IXGBE_FCCFG, fccfg_reg);
1658 1660
1659 /* Set up and enable Rx high/low water mark thresholds, enable XON. */ 1661 reg = IXGBE_READ_REG(hw, IXGBE_MTQC);
1660 if (hw->fc.current_mode & ixgbe_fc_tx_pause) { 1662 /* Thresholds are different for link flow control when in DCB mode */
1661 if (hw->fc.send_xon) 1663 if (reg & IXGBE_MTQC_RT_ENA) {
1662 IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(packetbuf_num), 1664 /* Always disable XON for LFC when in DCB mode */
1663 (hw->fc.low_water | IXGBE_FCRTL_XONE)); 1665 IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(packetbuf_num), 0);
1664 else 1666
1665 IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(packetbuf_num), 1667 rx_pba_size = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(packetbuf_num));
1666 hw->fc.low_water); 1668 reg = (rx_pba_size >> 2) & 0xFFE0;
1669 if (hw->fc.current_mode & ixgbe_fc_tx_pause)
1670 reg |= IXGBE_FCRTH_FCEN;
1671 IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(packetbuf_num), reg);
1672 } else {
1673 /*
1674 * Set up and enable Rx high/low water mark thresholds,
1675 * enable XON.
1676 */
1677 if (hw->fc.current_mode & ixgbe_fc_tx_pause) {
1678 if (hw->fc.send_xon) {
1679 IXGBE_WRITE_REG(hw,
1680 IXGBE_FCRTL_82599(packetbuf_num),
1681 (hw->fc.low_water |
1682 IXGBE_FCRTL_XONE));
1683 } else {
1684 IXGBE_WRITE_REG(hw,
1685 IXGBE_FCRTL_82599(packetbuf_num),
1686 hw->fc.low_water);
1687 }
1667 1688
1668 IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(packetbuf_num), 1689 IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(packetbuf_num),
1669 (hw->fc.high_water | IXGBE_FCRTH_FCEN)); 1690 (hw->fc.high_water | IXGBE_FCRTH_FCEN));
1691 }
1670 } 1692 }
1671 1693
1672 /* Configure pause time (2 TCs per register) */ 1694 /* Configure pause time (2 TCs per register) */
1673 reg = IXGBE_READ_REG(hw, IXGBE_FCTTV(packetbuf_num)); 1695 reg = IXGBE_READ_REG(hw, IXGBE_FCTTV(packetbuf_num / 2));
1674 if ((packetbuf_num & 1) == 0) 1696 if ((packetbuf_num & 1) == 0)
1675 reg = (reg & 0xFFFF0000) | hw->fc.pause_time; 1697 reg = (reg & 0xFFFF0000) | hw->fc.pause_time;
1676 else 1698 else
@@ -1859,9 +1881,11 @@ s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw, s32 packetbuf_num)
1859 * because it causes the controller to just blast out fc packets. 1881 * because it causes the controller to just blast out fc packets.
1860 */ 1882 */
1861 if (!hw->fc.low_water || !hw->fc.high_water || !hw->fc.pause_time) { 1883 if (!hw->fc.low_water || !hw->fc.high_water || !hw->fc.pause_time) {
1862 hw_dbg(hw, "Invalid water mark configuration\n"); 1884 if (hw->fc.requested_mode != ixgbe_fc_none) {
1863 ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; 1885 hw_dbg(hw, "Invalid water mark configuration\n");
1864 goto out; 1886 ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;
1887 goto out;
1888 }
1865 } 1889 }
1866 1890
1867 /* 1891 /*
diff --git a/drivers/net/ixgbe/ixgbe_common.h b/drivers/net/ixgbe/ixgbe_common.h
index dd260890ad0a..b2a4b2c99c40 100644
--- a/drivers/net/ixgbe/ixgbe_common.h
+++ b/drivers/net/ixgbe/ixgbe_common.h
@@ -59,8 +59,8 @@ s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
59s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list, 59s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,
60 u32 mc_addr_count, 60 u32 mc_addr_count,
61 ixgbe_mc_addr_itr func); 61 ixgbe_mc_addr_itr func);
62s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, 62s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw,
63 u32 addr_count, ixgbe_mc_addr_itr func); 63 struct list_head *uc_list);
64s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); 64s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
65s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); 65s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
66s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); 66s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82598.c b/drivers/net/ixgbe/ixgbe_dcb_82598.c
index 62206273d888..f30263898ebc 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_82598.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_82598.c
@@ -294,6 +294,9 @@ s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw,
294 u32 reg, rx_pba_size; 294 u32 reg, rx_pba_size;
295 u8 i; 295 u8 i;
296 296
297 if (!dcb_config->pfc_mode_enable)
298 goto out;
299
297 /* Enable Transmit Priority Flow Control */ 300 /* Enable Transmit Priority Flow Control */
298 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); 301 reg = IXGBE_READ_REG(hw, IXGBE_RMCS);
299 reg &= ~IXGBE_RMCS_TFCE_802_3X; 302 reg &= ~IXGBE_RMCS_TFCE_802_3X;
@@ -341,6 +344,7 @@ s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw,
341 /* Configure flow control refresh threshold value */ 344 /* Configure flow control refresh threshold value */
342 IXGBE_WRITE_REG(hw, IXGBE_FCRTV, 0x3400); 345 IXGBE_WRITE_REG(hw, IXGBE_FCRTV, 0x3400);
343 346
347out:
344 return 0; 348 return 0;
345} 349}
346 350
diff --git a/drivers/net/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ixgbe/ixgbe_dcb_nl.c
index bd0a0c276952..d56890f5c9d5 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_nl.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_nl.c
@@ -28,15 +28,22 @@
28 28
29#include "ixgbe.h" 29#include "ixgbe.h"
30#include <linux/dcbnl.h> 30#include <linux/dcbnl.h>
31#include "ixgbe_dcb_82598.h"
32#include "ixgbe_dcb_82599.h"
31 33
32/* Callbacks for DCB netlink in the kernel */ 34/* Callbacks for DCB netlink in the kernel */
33#define BIT_DCB_MODE 0x01 35#define BIT_DCB_MODE 0x01
34#define BIT_PFC 0x02 36#define BIT_PFC 0x02
35#define BIT_PG_RX 0x04 37#define BIT_PG_RX 0x04
36#define BIT_PG_TX 0x08 38#define BIT_PG_TX 0x08
37#define BIT_BCN 0x10 39#define BIT_RESETLINK 0x40
38#define BIT_LINKSPEED 0x80 40#define BIT_LINKSPEED 0x80
39 41
42/* Responses for the DCB_C_SET_ALL command */
43#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
44#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
45#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
46
40int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg, 47int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
41 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max) 48 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
42{ 49{
@@ -124,15 +131,12 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
124 131
125 if (netif_running(netdev)) 132 if (netif_running(netdev))
126 netdev->netdev_ops->ndo_stop(netdev); 133 netdev->netdev_ops->ndo_stop(netdev);
127 ixgbe_reset_interrupt_capability(adapter); 134 ixgbe_clear_interrupt_scheme(adapter);
128 ixgbe_napi_del_all(adapter);
129 INIT_LIST_HEAD(&netdev->napi_list);
130 kfree(adapter->tx_ring);
131 kfree(adapter->rx_ring);
132 adapter->tx_ring = NULL;
133 adapter->rx_ring = NULL;
134 135
135 adapter->hw.fc.requested_mode = ixgbe_fc_pfc; 136 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
137 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
138 adapter->hw.fc.requested_mode = ixgbe_fc_none;
139 }
136 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; 140 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
137 adapter->flags |= IXGBE_FLAG_DCB_ENABLED; 141 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
138 ixgbe_init_interrupt_scheme(adapter); 142 ixgbe_init_interrupt_scheme(adapter);
@@ -141,17 +145,13 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
141 } else { 145 } else {
142 /* Turn off DCB */ 146 /* Turn off DCB */
143 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { 147 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
144 adapter->hw.fc.requested_mode = ixgbe_fc_default;
145 if (netif_running(netdev)) 148 if (netif_running(netdev))
146 netdev->netdev_ops->ndo_stop(netdev); 149 netdev->netdev_ops->ndo_stop(netdev);
147 ixgbe_reset_interrupt_capability(adapter); 150 ixgbe_clear_interrupt_scheme(adapter);
148 ixgbe_napi_del_all(adapter);
149 INIT_LIST_HEAD(&netdev->napi_list);
150 kfree(adapter->tx_ring);
151 kfree(adapter->rx_ring);
152 adapter->tx_ring = NULL;
153 adapter->rx_ring = NULL;
154 151
152 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
153 adapter->temp_dcb_cfg.pfc_mode_enable = false;
154 adapter->dcb_cfg.pfc_mode_enable = false;
155 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 155 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
156 adapter->flags |= IXGBE_FLAG_RSS_ENABLED; 156 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
157 ixgbe_init_interrupt_scheme(adapter); 157 ixgbe_init_interrupt_scheme(adapter);
@@ -167,10 +167,15 @@ static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
167 u8 *perm_addr) 167 u8 *perm_addr)
168{ 168{
169 struct ixgbe_adapter *adapter = netdev_priv(netdev); 169 struct ixgbe_adapter *adapter = netdev_priv(netdev);
170 int i; 170 int i, j;
171 171
172 for (i = 0; i < netdev->addr_len; i++) 172 for (i = 0; i < netdev->addr_len; i++)
173 perm_addr[i] = adapter->hw.mac.perm_addr[i]; 173 perm_addr[i] = adapter->hw.mac.perm_addr[i];
174
175 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
176 for (j = 0; j < netdev->addr_len; j++, i++)
177 perm_addr[i] = adapter->hw.mac.san_addr[j];
178 }
174} 179}
175 180
176static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc, 181static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
@@ -197,8 +202,10 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
197 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent != 202 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
198 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) || 203 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
199 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap != 204 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
200 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) 205 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) {
201 adapter->dcb_set_bitmap |= BIT_PG_TX; 206 adapter->dcb_set_bitmap |= BIT_PG_TX;
207 adapter->dcb_set_bitmap |= BIT_RESETLINK;
208 }
202} 209}
203 210
204static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, 211static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
@@ -209,8 +216,10 @@ static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
209 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct; 216 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
210 217
211 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] != 218 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
212 adapter->dcb_cfg.bw_percentage[0][bwg_id]) 219 adapter->dcb_cfg.bw_percentage[0][bwg_id]) {
213 adapter->dcb_set_bitmap |= BIT_PG_RX; 220 adapter->dcb_set_bitmap |= BIT_PG_RX;
221 adapter->dcb_set_bitmap |= BIT_RESETLINK;
222 }
214} 223}
215 224
216static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc, 225static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
@@ -237,8 +246,10 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
237 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent != 246 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
238 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) || 247 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
239 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap != 248 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
240 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) 249 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) {
241 adapter->dcb_set_bitmap |= BIT_PG_RX; 250 adapter->dcb_set_bitmap |= BIT_PG_RX;
251 adapter->dcb_set_bitmap |= BIT_RESETLINK;
252 }
242} 253}
243 254
244static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, 255static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
@@ -249,8 +260,10 @@ static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
249 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct; 260 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
250 261
251 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] != 262 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
252 adapter->dcb_cfg.bw_percentage[1][bwg_id]) 263 adapter->dcb_cfg.bw_percentage[1][bwg_id]) {
253 adapter->dcb_set_bitmap |= BIT_PG_RX; 264 adapter->dcb_set_bitmap |= BIT_PG_RX;
265 adapter->dcb_set_bitmap |= BIT_RESETLINK;
266 }
254} 267}
255 268
256static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc, 269static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
@@ -319,28 +332,60 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
319 struct ixgbe_adapter *adapter = netdev_priv(netdev); 332 struct ixgbe_adapter *adapter = netdev_priv(netdev);
320 int ret; 333 int ret;
321 334
322 adapter->dcb_set_bitmap &= ~BIT_BCN; /* no set for BCN */
323 if (!adapter->dcb_set_bitmap) 335 if (!adapter->dcb_set_bitmap)
324 return 1; 336 return DCB_NO_HW_CHG;
325 337
326 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) 338 /*
327 msleep(1); 339 * Only take down the adapter if the configuration change
340 * requires a reset.
341 */
342 if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
343 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
344 msleep(1);
328 345
329 if (netif_running(netdev)) 346 if (netif_running(netdev))
330 ixgbe_down(adapter); 347 ixgbe_down(adapter);
348 }
331 349
332 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg, 350 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
333 adapter->ring_feature[RING_F_DCB].indices); 351 adapter->ring_feature[RING_F_DCB].indices);
334 if (ret) { 352 if (ret) {
335 clear_bit(__IXGBE_RESETTING, &adapter->state); 353 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
336 return ret; 354 clear_bit(__IXGBE_RESETTING, &adapter->state);
355 return DCB_NO_HW_CHG;
356 }
357
358 if (adapter->dcb_cfg.pfc_mode_enable) {
359 if ((adapter->hw.mac.type != ixgbe_mac_82598EB) &&
360 (adapter->hw.fc.current_mode != ixgbe_fc_pfc))
361 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
362 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
363 } else {
364 if (adapter->hw.mac.type != ixgbe_mac_82598EB)
365 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
366 else
367 adapter->hw.fc.requested_mode = ixgbe_fc_none;
337 } 368 }
338 369
339 if (netif_running(netdev)) 370 if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
340 ixgbe_up(adapter); 371 if (netif_running(netdev))
372 ixgbe_up(adapter);
373 ret = DCB_HW_CHG_RST;
374 } else if (adapter->dcb_set_bitmap & BIT_PFC) {
375 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
376 ixgbe_dcb_config_pfc_82598(&adapter->hw,
377 &adapter->dcb_cfg);
378 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
379 ixgbe_dcb_config_pfc_82599(&adapter->hw,
380 &adapter->dcb_cfg);
381 ret = DCB_HW_CHG;
382 }
383 if (adapter->dcb_cfg.pfc_mode_enable)
384 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
341 385
386 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
387 clear_bit(__IXGBE_RESETTING, &adapter->state);
342 adapter->dcb_set_bitmap = 0x00; 388 adapter->dcb_set_bitmap = 0x00;
343 clear_bit(__IXGBE_RESETTING, &adapter->state);
344 return ret; 389 return ret;
345} 390}
346 391
@@ -416,11 +461,17 @@ static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
416{ 461{
417 struct ixgbe_adapter *adapter = netdev_priv(netdev); 462 struct ixgbe_adapter *adapter = netdev_priv(netdev);
418 463
419 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED); 464 return adapter->dcb_cfg.pfc_mode_enable;
420} 465}
421 466
422static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state) 467static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
423{ 468{
469 struct ixgbe_adapter *adapter = netdev_priv(netdev);
470
471 adapter->temp_dcb_cfg.pfc_mode_enable = state;
472 if (adapter->temp_dcb_cfg.pfc_mode_enable !=
473 adapter->dcb_cfg.pfc_mode_enable)
474 adapter->dcb_set_bitmap |= BIT_PFC;
424 return; 475 return;
425} 476}
426 477
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c
index f0a20facc650..35255b8e90b7 100644
--- a/drivers/net/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ixgbe/ixgbe_ethtool.c
@@ -67,6 +67,7 @@ static struct ixgbe_stats ixgbe_gstrings_stats[] = {
67 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)}, 67 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
68 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)}, 68 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
69 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)}, 69 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
70 {"hw_rsc_count", IXGBE_STAT(rsc_count)},
70 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)}, 71 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
71 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)}, 72 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
72 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)}, 73 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
@@ -90,6 +91,14 @@ static struct ixgbe_stats ixgbe_gstrings_stats[] = {
90 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)}, 91 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
91 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)}, 92 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
92 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)}, 93 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
94#ifdef IXGBE_FCOE
95 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
96 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
97 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
98 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
99 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
100 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
101#endif /* IXGBE_FCOE */
93}; 102};
94 103
95#define IXGBE_QUEUE_STATS_LEN \ 104#define IXGBE_QUEUE_STATS_LEN \
@@ -245,6 +254,13 @@ static void ixgbe_get_pauseparam(struct net_device *netdev,
245 else 254 else
246 pause->autoneg = 1; 255 pause->autoneg = 1;
247 256
257#ifdef CONFIG_DCB
258 if (hw->fc.current_mode == ixgbe_fc_pfc) {
259 pause->rx_pause = 0;
260 pause->tx_pause = 0;
261 }
262
263#endif
248 if (hw->fc.current_mode == ixgbe_fc_rx_pause) { 264 if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
249 pause->rx_pause = 1; 265 pause->rx_pause = 1;
250 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) { 266 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
@@ -261,6 +277,13 @@ static int ixgbe_set_pauseparam(struct net_device *netdev,
261 struct ixgbe_adapter *adapter = netdev_priv(netdev); 277 struct ixgbe_adapter *adapter = netdev_priv(netdev);
262 struct ixgbe_hw *hw = &adapter->hw; 278 struct ixgbe_hw *hw = &adapter->hw;
263 279
280#ifdef CONFIG_DCB
281 if (adapter->dcb_cfg.pfc_mode_enable ||
282 ((hw->mac.type == ixgbe_mac_82598EB) &&
283 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
284 return -EINVAL;
285
286#endif
264 if (pause->autoneg != AUTONEG_ENABLE) 287 if (pause->autoneg != AUTONEG_ENABLE)
265 hw->fc.disable_fc_autoneg = true; 288 hw->fc.disable_fc_autoneg = true;
266 else 289 else
@@ -277,6 +300,9 @@ static int ixgbe_set_pauseparam(struct net_device *netdev,
277 else 300 else
278 return -EINVAL; 301 return -EINVAL;
279 302
303#ifdef CONFIG_DCB
304 adapter->last_lfc_mode = hw->fc.requested_mode;
305#endif
280 hw->mac.ops.setup_fc(hw, 0); 306 hw->mac.ops.setup_fc(hw, 0);
281 307
282 return 0; 308 return 0;
@@ -311,10 +337,17 @@ static u32 ixgbe_get_tx_csum(struct net_device *netdev)
311 337
312static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data) 338static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
313{ 339{
314 if (data) 340 struct ixgbe_adapter *adapter = netdev_priv(netdev);
341
342 if (data) {
315 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); 343 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
316 else 344 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
345 netdev->features |= NETIF_F_SCTP_CSUM;
346 } else {
317 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); 347 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
348 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
349 netdev->features &= ~NETIF_F_SCTP_CSUM;
350 }
318 351
319 return 0; 352 return 0;
320} 353}
@@ -1106,7 +1139,7 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
1106 } 1139 }
1107 1140
1108 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) { 1141 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
1109 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i]; 1142 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
1110 if (q_vector->txr_count && !q_vector->rxr_count) 1143 if (q_vector->txr_count && !q_vector->rxr_count)
1111 /* tx vector gets half the rate */ 1144 /* tx vector gets half the rate */
1112 q_vector->eitr = (adapter->eitr_param >> 1); 1145 q_vector->eitr = (adapter->eitr_param >> 1);
@@ -1120,6 +1153,27 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
1120 return 0; 1153 return 0;
1121} 1154}
1122 1155
1156static int ixgbe_set_flags(struct net_device *netdev, u32 data)
1157{
1158 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1159
1160 ethtool_op_set_flags(netdev, data);
1161
1162 if (!(adapter->flags & IXGBE_FLAG_RSC_CAPABLE))
1163 return 0;
1164
1165 /* if state changes we need to update adapter->flags and reset */
1166 if ((!!(data & ETH_FLAG_LRO)) !=
1167 (!!(adapter->flags & IXGBE_FLAG_RSC_ENABLED))) {
1168 adapter->flags ^= IXGBE_FLAG_RSC_ENABLED;
1169 if (netif_running(netdev))
1170 ixgbe_reinit_locked(adapter);
1171 else
1172 ixgbe_reset(adapter);
1173 }
1174 return 0;
1175
1176}
1123 1177
1124static const struct ethtool_ops ixgbe_ethtool_ops = { 1178static const struct ethtool_ops ixgbe_ethtool_ops = {
1125 .get_settings = ixgbe_get_settings, 1179 .get_settings = ixgbe_get_settings,
@@ -1154,7 +1208,7 @@ static const struct ethtool_ops ixgbe_ethtool_ops = {
1154 .get_coalesce = ixgbe_get_coalesce, 1208 .get_coalesce = ixgbe_get_coalesce,
1155 .set_coalesce = ixgbe_set_coalesce, 1209 .set_coalesce = ixgbe_set_coalesce,
1156 .get_flags = ethtool_op_get_flags, 1210 .get_flags = ethtool_op_get_flags,
1157 .set_flags = ethtool_op_set_flags, 1211 .set_flags = ixgbe_set_flags,
1158}; 1212};
1159 1213
1160void ixgbe_set_ethtool_ops(struct net_device *netdev) 1214void ixgbe_set_ethtool_ops(struct net_device *netdev)
diff --git a/drivers/net/ixgbe/ixgbe_fcoe.c b/drivers/net/ixgbe/ixgbe_fcoe.c
new file mode 100644
index 000000000000..d5939de8ba28
--- /dev/null
+++ b/drivers/net/ixgbe/ixgbe_fcoe.c
@@ -0,0 +1,552 @@
1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29#include "ixgbe.h"
30#include <linux/if_ether.h>
31#include <scsi/scsi_cmnd.h>
32#include <scsi/scsi_device.h>
33#include <scsi/fc/fc_fs.h>
34#include <scsi/fc/fc_fcoe.h>
35#include <scsi/libfc.h>
36#include <scsi/libfcoe.h>
37
38/**
39 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
40 * @rx_desc: advanced rx descriptor
41 *
42 * Returns : true if it is FCoE pkt
43 */
44static inline bool ixgbe_rx_is_fcoe(union ixgbe_adv_rx_desc *rx_desc)
45{
46 u16 p;
47
48 p = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info);
49 if (p & IXGBE_RXDADV_PKTTYPE_ETQF) {
50 p &= IXGBE_RXDADV_PKTTYPE_ETQF_MASK;
51 p >>= IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT;
52 return p == IXGBE_ETQF_FILTER_FCOE;
53 }
54 return false;
55}
56
57/**
58 * ixgbe_fcoe_clear_ddp - clear the given ddp context
59 * @ddp - ptr to the ixgbe_fcoe_ddp
60 *
61 * Returns : none
62 *
63 */
64static inline void ixgbe_fcoe_clear_ddp(struct ixgbe_fcoe_ddp *ddp)
65{
66 ddp->len = 0;
67 ddp->err = 0;
68 ddp->udl = NULL;
69 ddp->udp = 0UL;
70 ddp->sgl = NULL;
71 ddp->sgc = 0;
72}
73
74/**
75 * ixgbe_fcoe_ddp_put - free the ddp context for a given xid
76 * @netdev: the corresponding net_device
77 * @xid: the xid that corresponding ddp will be freed
78 *
79 * This is the implementation of net_device_ops.ndo_fcoe_ddp_done
80 * and it is expected to be called by ULD, i.e., FCP layer of libfc
81 * to release the corresponding ddp context when the I/O is done.
82 *
83 * Returns : data length already ddp-ed in bytes
84 */
85int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid)
86{
87 int len = 0;
88 struct ixgbe_fcoe *fcoe;
89 struct ixgbe_adapter *adapter;
90 struct ixgbe_fcoe_ddp *ddp;
91
92 if (!netdev)
93 goto out_ddp_put;
94
95 if (xid >= IXGBE_FCOE_DDP_MAX)
96 goto out_ddp_put;
97
98 adapter = netdev_priv(netdev);
99 fcoe = &adapter->fcoe;
100 ddp = &fcoe->ddp[xid];
101 if (!ddp->udl)
102 goto out_ddp_put;
103
104 len = ddp->len;
105 /* if there an error, force to invalidate ddp context */
106 if (ddp->err) {
107 spin_lock_bh(&fcoe->lock);
108 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLT, 0);
109 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLTRW,
110 (xid | IXGBE_FCFLTRW_WE));
111 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCBUFF, 0);
112 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
113 (xid | IXGBE_FCDMARW_WE));
114 spin_unlock_bh(&fcoe->lock);
115 }
116 if (ddp->sgl)
117 pci_unmap_sg(adapter->pdev, ddp->sgl, ddp->sgc,
118 DMA_FROM_DEVICE);
119 pci_pool_free(fcoe->pool, ddp->udl, ddp->udp);
120 ixgbe_fcoe_clear_ddp(ddp);
121
122out_ddp_put:
123 return len;
124}
125
126/**
127 * ixgbe_fcoe_ddp_get - called to set up ddp context
128 * @netdev: the corresponding net_device
129 * @xid: the exchange id requesting ddp
130 * @sgl: the scatter-gather list for this request
131 * @sgc: the number of scatter-gather items
132 *
133 * This is the implementation of net_device_ops.ndo_fcoe_ddp_setup
134 * and is expected to be called from ULD, e.g., FCP layer of libfc
135 * to set up ddp for the corresponding xid of the given sglist for
136 * the corresponding I/O.
137 *
138 * Returns : 1 for success and 0 for no ddp
139 */
140int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
141 struct scatterlist *sgl, unsigned int sgc)
142{
143 struct ixgbe_adapter *adapter;
144 struct ixgbe_hw *hw;
145 struct ixgbe_fcoe *fcoe;
146 struct ixgbe_fcoe_ddp *ddp;
147 struct scatterlist *sg;
148 unsigned int i, j, dmacount;
149 unsigned int len;
150 static const unsigned int bufflen = 4096;
151 unsigned int firstoff = 0;
152 unsigned int lastsize;
153 unsigned int thisoff = 0;
154 unsigned int thislen = 0;
155 u32 fcbuff, fcdmarw, fcfltrw;
156 dma_addr_t addr;
157
158 if (!netdev || !sgl)
159 return 0;
160
161 adapter = netdev_priv(netdev);
162 if (xid >= IXGBE_FCOE_DDP_MAX) {
163 DPRINTK(DRV, WARNING, "xid=0x%x out-of-range\n", xid);
164 return 0;
165 }
166
167 fcoe = &adapter->fcoe;
168 if (!fcoe->pool) {
169 DPRINTK(DRV, WARNING, "xid=0x%x no ddp pool for fcoe\n", xid);
170 return 0;
171 }
172
173 ddp = &fcoe->ddp[xid];
174 if (ddp->sgl) {
175 DPRINTK(DRV, ERR, "xid 0x%x w/ non-null sgl=%p nents=%d\n",
176 xid, ddp->sgl, ddp->sgc);
177 return 0;
178 }
179 ixgbe_fcoe_clear_ddp(ddp);
180
181 /* setup dma from scsi command sgl */
182 dmacount = pci_map_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
183 if (dmacount == 0) {
184 DPRINTK(DRV, ERR, "xid 0x%x DMA map error\n", xid);
185 return 0;
186 }
187
188 /* alloc the udl from our ddp pool */
189 ddp->udl = pci_pool_alloc(fcoe->pool, GFP_KERNEL, &ddp->udp);
190 if (!ddp->udl) {
191 DPRINTK(DRV, ERR, "failed allocated ddp context\n");
192 goto out_noddp_unmap;
193 }
194 ddp->sgl = sgl;
195 ddp->sgc = sgc;
196
197 j = 0;
198 for_each_sg(sgl, sg, dmacount, i) {
199 addr = sg_dma_address(sg);
200 len = sg_dma_len(sg);
201 while (len) {
202 /* get the offset of length of current buffer */
203 thisoff = addr & ((dma_addr_t)bufflen - 1);
204 thislen = min((bufflen - thisoff), len);
205 /*
206 * all but the 1st buffer (j == 0)
207 * must be aligned on bufflen
208 */
209 if ((j != 0) && (thisoff))
210 goto out_noddp_free;
211 /*
212 * all but the last buffer
213 * ((i == (dmacount - 1)) && (thislen == len))
214 * must end at bufflen
215 */
216 if (((i != (dmacount - 1)) || (thislen != len))
217 && ((thislen + thisoff) != bufflen))
218 goto out_noddp_free;
219
220 ddp->udl[j] = (u64)(addr - thisoff);
221 /* only the first buffer may have none-zero offset */
222 if (j == 0)
223 firstoff = thisoff;
224 len -= thislen;
225 addr += thislen;
226 j++;
227 /* max number of buffers allowed in one DDP context */
228 if (j > IXGBE_BUFFCNT_MAX) {
229 DPRINTK(DRV, ERR, "xid=%x:%d,%d,%d:addr=%llx "
230 "not enough descriptors\n",
231 xid, i, j, dmacount, (u64)addr);
232 goto out_noddp_free;
233 }
234 }
235 }
236 /* only the last buffer may have non-full bufflen */
237 lastsize = thisoff + thislen;
238
239 fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT);
240 fcbuff |= (j << IXGBE_FCBUFF_BUFFCNT_SHIFT);
241 fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT);
242 fcbuff |= (IXGBE_FCBUFF_VALID);
243
244 fcdmarw = xid;
245 fcdmarw |= IXGBE_FCDMARW_WE;
246 fcdmarw |= (lastsize << IXGBE_FCDMARW_LASTSIZE_SHIFT);
247
248 fcfltrw = xid;
249 fcfltrw |= IXGBE_FCFLTRW_WE;
250
251 /* program DMA context */
252 hw = &adapter->hw;
253 spin_lock_bh(&fcoe->lock);
254 IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_32BIT_MASK);
255 IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
256 IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
257 IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
258 /* program filter context */
259 IXGBE_WRITE_REG(hw, IXGBE_FCPARAM, 0);
260 IXGBE_WRITE_REG(hw, IXGBE_FCFLT, IXGBE_FCFLT_VALID);
261 IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, fcfltrw);
262 spin_unlock_bh(&fcoe->lock);
263
264 return 1;
265
266out_noddp_free:
267 pci_pool_free(fcoe->pool, ddp->udl, ddp->udp);
268 ixgbe_fcoe_clear_ddp(ddp);
269
270out_noddp_unmap:
271 pci_unmap_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
272 return 0;
273}
274
275/**
276 * ixgbe_fcoe_ddp - check ddp status and mark it done
277 * @adapter: ixgbe adapter
278 * @rx_desc: advanced rx descriptor
279 * @skb: the skb holding the received data
280 *
281 * This checks ddp status.
282 *
283 * Returns : 0 for success and skb will not be delivered to ULD
284 */
285int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
286 union ixgbe_adv_rx_desc *rx_desc,
287 struct sk_buff *skb)
288{
289 u16 xid;
290 u32 sterr, fceofe, fcerr, fcstat;
291 int rc = -EINVAL;
292 struct ixgbe_fcoe *fcoe;
293 struct ixgbe_fcoe_ddp *ddp;
294 struct fc_frame_header *fh;
295
296 if (!ixgbe_rx_is_fcoe(rx_desc))
297 goto ddp_out;
298
299 skb->ip_summed = CHECKSUM_UNNECESSARY;
300 sterr = le32_to_cpu(rx_desc->wb.upper.status_error);
301 fcerr = (sterr & IXGBE_RXDADV_ERR_FCERR);
302 fceofe = (sterr & IXGBE_RXDADV_ERR_FCEOFE);
303 if (fcerr == IXGBE_FCERR_BADCRC)
304 skb->ip_summed = CHECKSUM_NONE;
305
306 skb_reset_network_header(skb);
307 skb_set_transport_header(skb, skb_network_offset(skb) +
308 sizeof(struct fcoe_hdr));
309 fh = (struct fc_frame_header *)skb_transport_header(skb);
310 xid = be16_to_cpu(fh->fh_ox_id);
311 if (xid >= IXGBE_FCOE_DDP_MAX)
312 goto ddp_out;
313
314 fcoe = &adapter->fcoe;
315 ddp = &fcoe->ddp[xid];
316 if (!ddp->udl)
317 goto ddp_out;
318
319 ddp->err = (fcerr | fceofe);
320 if (ddp->err)
321 goto ddp_out;
322
323 fcstat = (sterr & IXGBE_RXDADV_STAT_FCSTAT);
324 if (fcstat) {
325 /* update length of DDPed data */
326 ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
327 /* unmap the sg list when FCP_RSP is received */
328 if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_FCPRSP) {
329 pci_unmap_sg(adapter->pdev, ddp->sgl,
330 ddp->sgc, DMA_FROM_DEVICE);
331 ddp->sgl = NULL;
332 ddp->sgc = 0;
333 }
334 /* return 0 to bypass going to ULD for DDPed data */
335 if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_DDP)
336 rc = 0;
337 }
338
339ddp_out:
340 return rc;
341}
342
343/**
344 * ixgbe_fso - ixgbe FCoE Sequence Offload (FSO)
345 * @adapter: ixgbe adapter
346 * @tx_ring: tx desc ring
347 * @skb: associated skb
348 * @tx_flags: tx flags
349 * @hdr_len: hdr_len to be returned
350 *
351 * This sets up large send offload for FCoE
352 *
353 * Returns : 0 indicates no FSO, > 0 for FSO, < 0 for error
354 */
355int ixgbe_fso(struct ixgbe_adapter *adapter,
356 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
357 u32 tx_flags, u8 *hdr_len)
358{
359 u8 sof, eof;
360 u32 vlan_macip_lens;
361 u32 fcoe_sof_eof;
362 u32 type_tucmd;
363 u32 mss_l4len_idx;
364 int mss = 0;
365 unsigned int i;
366 struct ixgbe_tx_buffer *tx_buffer_info;
367 struct ixgbe_adv_tx_context_desc *context_desc;
368 struct fc_frame_header *fh;
369
370 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_type != SKB_GSO_FCOE)) {
371 DPRINTK(DRV, ERR, "Wrong gso type %d:expecting SKB_GSO_FCOE\n",
372 skb_shinfo(skb)->gso_type);
373 return -EINVAL;
374 }
375
376 /* resets the header to point fcoe/fc */
377 skb_set_network_header(skb, skb->mac_len);
378 skb_set_transport_header(skb, skb->mac_len +
379 sizeof(struct fcoe_hdr));
380
381 /* sets up SOF and ORIS */
382 fcoe_sof_eof = 0;
383 sof = ((struct fcoe_hdr *)skb_network_header(skb))->fcoe_sof;
384 switch (sof) {
385 case FC_SOF_I2:
386 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIS;
387 break;
388 case FC_SOF_I3:
389 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
390 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIS;
391 break;
392 case FC_SOF_N2:
393 break;
394 case FC_SOF_N3:
395 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
396 break;
397 default:
398 DPRINTK(DRV, WARNING, "unknown sof = 0x%x\n", sof);
399 return -EINVAL;
400 }
401
402 /* the first byte of the last dword is EOF */
403 skb_copy_bits(skb, skb->len - 4, &eof, 1);
404 /* sets up EOF and ORIE */
405 switch (eof) {
406 case FC_EOF_N:
407 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
408 break;
409 case FC_EOF_T:
410 /* lso needs ORIE */
411 if (skb_is_gso(skb)) {
412 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
413 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIE;
414 } else {
415 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_T;
416 }
417 break;
418 case FC_EOF_NI:
419 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_NI;
420 break;
421 case FC_EOF_A:
422 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A;
423 break;
424 default:
425 DPRINTK(DRV, WARNING, "unknown eof = 0x%x\n", eof);
426 return -EINVAL;
427 }
428
429 /* sets up PARINC indicating data offset */
430 fh = (struct fc_frame_header *)skb_transport_header(skb);
431 if (fh->fh_f_ctl[2] & FC_FC_REL_OFF)
432 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_PARINC;
433
434 /* hdr_len includes fc_hdr if FCoE lso is enabled */
435 *hdr_len = sizeof(struct fcoe_crc_eof);
436 if (skb_is_gso(skb))
437 *hdr_len += (skb_transport_offset(skb) +
438 sizeof(struct fc_frame_header));
439 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
440 vlan_macip_lens = (skb_transport_offset(skb) +
441 sizeof(struct fc_frame_header));
442 vlan_macip_lens |= ((skb_transport_offset(skb) - 4)
443 << IXGBE_ADVTXD_MACLEN_SHIFT);
444 vlan_macip_lens |= (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
445
446 /* type_tycmd and mss: set TUCMD.FCoE to enable offload */
447 type_tucmd = IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT |
448 IXGBE_ADVTXT_TUCMD_FCOE;
449 if (skb_is_gso(skb))
450 mss = skb_shinfo(skb)->gso_size;
451 /* mss_l4len_id: use 1 for FSO as TSO, no need for L4LEN */
452 mss_l4len_idx = (mss << IXGBE_ADVTXD_MSS_SHIFT) |
453 (1 << IXGBE_ADVTXD_IDX_SHIFT);
454
455 /* write context desc */
456 i = tx_ring->next_to_use;
457 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
458 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
459 context_desc->seqnum_seed = cpu_to_le32(fcoe_sof_eof);
460 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
461 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
462
463 tx_buffer_info = &tx_ring->tx_buffer_info[i];
464 tx_buffer_info->time_stamp = jiffies;
465 tx_buffer_info->next_to_watch = i;
466
467 i++;
468 if (i == tx_ring->count)
469 i = 0;
470 tx_ring->next_to_use = i;
471
472 return skb_is_gso(skb);
473}
474
475/**
476 * ixgbe_configure_fcoe - configures registers for fcoe at start
477 * @adapter: ptr to ixgbe adapter
478 *
479 * This sets up FCoE related registers
480 *
481 * Returns : none
482 */
483void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
484{
485 int i, fcoe_q, fcoe_i;
486 struct ixgbe_hw *hw = &adapter->hw;
487 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
488 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
489
490 /* create the pool for ddp if not created yet */
491 if (!fcoe->pool) {
492 /* allocate ddp pool */
493 fcoe->pool = pci_pool_create("ixgbe_fcoe_ddp",
494 adapter->pdev, IXGBE_FCPTR_MAX,
495 IXGBE_FCPTR_ALIGN, PAGE_SIZE);
496 if (!fcoe->pool)
497 DPRINTK(DRV, ERR,
498 "failed to allocated FCoE DDP pool\n");
499
500 spin_lock_init(&fcoe->lock);
501 }
502
503 /* Enable L2 eth type filter for FCoE */
504 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE),
505 (ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN));
506 if (adapter->ring_feature[RING_F_FCOE].indices) {
507 /* Use multiple rx queues for FCoE by redirection table */
508 for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
509 fcoe_i = f->mask + i % f->indices;
510 fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
511 fcoe_q = adapter->rx_ring[fcoe_i].reg_idx;
512 IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
513 }
514 IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
515 IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);
516 } else {
517 /* Use single rx queue for FCoE */
518 fcoe_i = f->mask;
519 fcoe_q = adapter->rx_ring[fcoe_i].reg_idx;
520 IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, 0);
521 IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE),
522 IXGBE_ETQS_QUEUE_EN |
523 (fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
524 }
525
526 IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL,
527 IXGBE_FCRXCTRL_FCOELLI |
528 IXGBE_FCRXCTRL_FCCRCBO |
529 (FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));
530}
531
532/**
533 * ixgbe_cleanup_fcoe - release all fcoe ddp context resources
534 * @adapter : ixgbe adapter
535 *
536 * Cleans up outstanding ddp context resources
537 *
538 * Returns : none
539 */
540void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter)
541{
542 int i;
543 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
544
545 /* release ddp resource */
546 if (fcoe->pool) {
547 for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++)
548 ixgbe_fcoe_ddp_put(adapter->netdev, i);
549 pci_pool_destroy(fcoe->pool);
550 fcoe->pool = NULL;
551 }
552}
diff --git a/drivers/net/ixgbe/ixgbe_fcoe.h b/drivers/net/ixgbe/ixgbe_fcoe.h
new file mode 100644
index 000000000000..b7f9b63aa49f
--- /dev/null
+++ b/drivers/net/ixgbe/ixgbe_fcoe.h
@@ -0,0 +1,66 @@
1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#ifndef _IXGBE_FCOE_H
29#define _IXGBE_FCOE_H
30
31#include <scsi/fc/fc_fcoe.h>
32
33/* shift bits within STAT fo FCSTAT */
34#define IXGBE_RXDADV_FCSTAT_SHIFT 4
35
36/* ddp user buffer */
37#define IXGBE_BUFFCNT_MAX 256 /* 8 bits bufcnt */
38#define IXGBE_FCPTR_ALIGN 16
39#define IXGBE_FCPTR_MAX (IXGBE_BUFFCNT_MAX * sizeof(dma_addr_t))
40#define IXGBE_FCBUFF_4KB 0x0
41#define IXGBE_FCBUFF_8KB 0x1
42#define IXGBE_FCBUFF_16KB 0x2
43#define IXGBE_FCBUFF_64KB 0x3
44#define IXGBE_FCBUFF_MAX 65536 /* 64KB max */
45#define IXGBE_FCBUFF_MIN 4096 /* 4KB min */
46#define IXGBE_FCOE_DDP_MAX 512 /* 9 bits xid */
47
48/* fcerr */
49#define IXGBE_FCERR_BADCRC 0x00100000
50
51struct ixgbe_fcoe_ddp {
52 int len;
53 u32 err;
54 unsigned int sgc;
55 struct scatterlist *sgl;
56 dma_addr_t udp;
57 u64 *udl;
58};
59
60struct ixgbe_fcoe {
61 spinlock_t lock;
62 struct pci_pool *pool;
63 struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX];
64};
65
66#endif /* _IXGBE_FCOE_H */
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 07e778d3e5d2..de70a2df9aeb 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -39,6 +39,7 @@
39#include <net/ip6_checksum.h> 39#include <net/ip6_checksum.h>
40#include <linux/ethtool.h> 40#include <linux/ethtool.h>
41#include <linux/if_vlan.h> 41#include <linux/if_vlan.h>
42#include <scsi/fc/fc_fcoe.h>
42 43
43#include "ixgbe.h" 44#include "ixgbe.h"
44#include "ixgbe_common.h" 45#include "ixgbe_common.h"
@@ -47,7 +48,7 @@ char ixgbe_driver_name[] = "ixgbe";
47static const char ixgbe_driver_string[] = 48static const char ixgbe_driver_string[] =
48 "Intel(R) 10 Gigabit PCI Express Network Driver"; 49 "Intel(R) 10 Gigabit PCI Express Network Driver";
49 50
50#define DRV_VERSION "2.0.8-k2" 51#define DRV_VERSION "2.0.24-k2"
51const char ixgbe_driver_version[] = DRV_VERSION; 52const char ixgbe_driver_version[] = DRV_VERSION;
52static char ixgbe_copyright[] = "Copyright (c) 1999-2009 Intel Corporation."; 53static char ixgbe_copyright[] = "Copyright (c) 1999-2009 Intel Corporation.";
53 54
@@ -89,6 +90,8 @@ static struct pci_device_id ixgbe_pci_tbl[] = {
89 board_82598 }, 90 board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), 91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4),
91 board_82599 }, 92 board_82599 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM),
94 board_82599 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), 95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP),
93 board_82599 }, 96 board_82599 },
94 97
@@ -326,8 +329,18 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
326 } 329 }
327 330
328 /* re-arm the interrupt */ 331 /* re-arm the interrupt */
329 if (count >= tx_ring->work_limit) 332 if (count >= tx_ring->work_limit) {
330 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx); 333 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
334 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
335 tx_ring->v_idx);
336 else if (tx_ring->v_idx & 0xFFFFFFFF)
337 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0),
338 tx_ring->v_idx);
339 else
340 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1),
341 (tx_ring->v_idx >> 32));
342 }
343
331 344
332 tx_ring->total_bytes += total_bytes; 345 tx_ring->total_bytes += total_bytes;
333 tx_ring->total_packets += total_packets; 346 tx_ring->total_packets += total_packets;
@@ -398,6 +411,9 @@ static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
398 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED)) 411 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
399 return; 412 return;
400 413
414 /* always use CB2 mode, difference is masked in the CB driver */
415 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
416
401 for (i = 0; i < adapter->num_tx_queues; i++) { 417 for (i = 0; i < adapter->num_tx_queues; i++) {
402 adapter->tx_ring[i].cpu = -1; 418 adapter->tx_ring[i].cpu = -1;
403 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]); 419 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
@@ -419,9 +435,6 @@ static int __ixgbe_notify_dca(struct device *dev, void *data)
419 /* if we're already enabled, don't do it again */ 435 /* if we're already enabled, don't do it again */
420 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) 436 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
421 break; 437 break;
422 /* Always use CB2 mode, difference is masked
423 * in the CB driver. */
424 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
425 if (dca_add_requester(dev) == 0) { 438 if (dca_add_requester(dev) == 0) {
426 adapter->flags |= IXGBE_FLAG_DCA_ENABLED; 439 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
427 ixgbe_setup_dca(adapter); 440 ixgbe_setup_dca(adapter);
@@ -451,6 +464,7 @@ static int __ixgbe_notify_dca(struct device *dev, void *data)
451 **/ 464 **/
452static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector, 465static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
453 struct sk_buff *skb, u8 status, 466 struct sk_buff *skb, u8 status,
467 struct ixgbe_ring *ring,
454 union ixgbe_adv_rx_desc *rx_desc) 468 union ixgbe_adv_rx_desc *rx_desc)
455{ 469{
456 struct ixgbe_adapter *adapter = q_vector->adapter; 470 struct ixgbe_adapter *adapter = q_vector->adapter;
@@ -458,24 +472,17 @@ static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
458 bool is_vlan = (status & IXGBE_RXD_STAT_VP); 472 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
459 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan); 473 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
460 474
461 skb_record_rx_queue(skb, q_vector - &adapter->q_vector[0]); 475 skb_record_rx_queue(skb, ring->queue_index);
462 if (skb->ip_summed == CHECKSUM_UNNECESSARY) { 476 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
463 if (adapter->vlgrp && is_vlan && (tag != 0)) 477 if (adapter->vlgrp && is_vlan && (tag != 0))
464 vlan_gro_receive(napi, adapter->vlgrp, tag, skb); 478 vlan_gro_receive(napi, adapter->vlgrp, tag, skb);
465 else 479 else
466 napi_gro_receive(napi, skb); 480 napi_gro_receive(napi, skb);
467 } else { 481 } else {
468 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) { 482 if (adapter->vlgrp && is_vlan && (tag != 0))
469 if (adapter->vlgrp && is_vlan && (tag != 0)) 483 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
470 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag); 484 else
471 else 485 netif_rx(skb);
472 netif_receive_skb(skb);
473 } else {
474 if (adapter->vlgrp && is_vlan && (tag != 0))
475 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
476 else
477 netif_rx(skb);
478 }
479 } 486 }
480} 487}
481 488
@@ -622,6 +629,40 @@ static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
622 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info; 629 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
623} 630}
624 631
632static inline u32 ixgbe_get_rsc_count(union ixgbe_adv_rx_desc *rx_desc)
633{
634 return (le32_to_cpu(rx_desc->wb.lower.lo_dword.data) &
635 IXGBE_RXDADV_RSCCNT_MASK) >>
636 IXGBE_RXDADV_RSCCNT_SHIFT;
637}
638
639/**
640 * ixgbe_transform_rsc_queue - change rsc queue into a full packet
641 * @skb: pointer to the last skb in the rsc queue
642 *
643 * This function changes a queue full of hw rsc buffers into a completed
644 * packet. It uses the ->prev pointers to find the first packet and then
645 * turns it into the frag list owner.
646 **/
647static inline struct sk_buff *ixgbe_transform_rsc_queue(struct sk_buff *skb)
648{
649 unsigned int frag_list_size = 0;
650
651 while (skb->prev) {
652 struct sk_buff *prev = skb->prev;
653 frag_list_size += skb->len;
654 skb->prev = NULL;
655 skb = prev;
656 }
657
658 skb_shinfo(skb)->frag_list = skb->next;
659 skb->next = NULL;
660 skb->len += frag_list_size;
661 skb->data_len += frag_list_size;
662 skb->truesize += frag_list_size;
663 return skb;
664}
665
625static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector, 666static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
626 struct ixgbe_ring *rx_ring, 667 struct ixgbe_ring *rx_ring,
627 int *work_done, int work_to_do) 668 int *work_done, int work_to_do)
@@ -631,7 +672,7 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
631 union ixgbe_adv_rx_desc *rx_desc, *next_rxd; 672 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
632 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer; 673 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
633 struct sk_buff *skb; 674 struct sk_buff *skb;
634 unsigned int i; 675 unsigned int i, rsc_count = 0;
635 u32 len, staterr; 676 u32 len, staterr;
636 u16 hdr_info; 677 u16 hdr_info;
637 bool cleaned = false; 678 bool cleaned = false;
@@ -697,20 +738,38 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
697 i++; 738 i++;
698 if (i == rx_ring->count) 739 if (i == rx_ring->count)
699 i = 0; 740 i = 0;
700 next_buffer = &rx_ring->rx_buffer_info[i];
701 741
702 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i); 742 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
703 prefetch(next_rxd); 743 prefetch(next_rxd);
704
705 cleaned_count++; 744 cleaned_count++;
745
746 if (adapter->flags & IXGBE_FLAG_RSC_CAPABLE)
747 rsc_count = ixgbe_get_rsc_count(rx_desc);
748
749 if (rsc_count) {
750 u32 nextp = (staterr & IXGBE_RXDADV_NEXTP_MASK) >>
751 IXGBE_RXDADV_NEXTP_SHIFT;
752 next_buffer = &rx_ring->rx_buffer_info[nextp];
753 rx_ring->rsc_count += (rsc_count - 1);
754 } else {
755 next_buffer = &rx_ring->rx_buffer_info[i];
756 }
757
706 if (staterr & IXGBE_RXD_STAT_EOP) { 758 if (staterr & IXGBE_RXD_STAT_EOP) {
759 if (skb->prev)
760 skb = ixgbe_transform_rsc_queue(skb);
707 rx_ring->stats.packets++; 761 rx_ring->stats.packets++;
708 rx_ring->stats.bytes += skb->len; 762 rx_ring->stats.bytes += skb->len;
709 } else { 763 } else {
710 rx_buffer_info->skb = next_buffer->skb; 764 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
711 rx_buffer_info->dma = next_buffer->dma; 765 rx_buffer_info->skb = next_buffer->skb;
712 next_buffer->skb = skb; 766 rx_buffer_info->dma = next_buffer->dma;
713 next_buffer->dma = 0; 767 next_buffer->skb = skb;
768 next_buffer->dma = 0;
769 } else {
770 skb->next = next_buffer->skb;
771 skb->next->prev = skb;
772 }
714 adapter->non_eop_descs++; 773 adapter->non_eop_descs++;
715 goto next_desc; 774 goto next_desc;
716 } 775 }
@@ -727,7 +786,13 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
727 total_rx_packets++; 786 total_rx_packets++;
728 787
729 skb->protocol = eth_type_trans(skb, adapter->netdev); 788 skb->protocol = eth_type_trans(skb, adapter->netdev);
730 ixgbe_receive_skb(q_vector, skb, staterr, rx_desc); 789#ifdef IXGBE_FCOE
790 /* if ddp, not passing to ULD unless for FCP_RSP or error */
791 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
792 if (!ixgbe_fcoe_ddp(adapter, rx_desc, skb))
793 goto next_desc;
794#endif /* IXGBE_FCOE */
795 ixgbe_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
731 796
732next_desc: 797next_desc:
733 rx_desc->wb.upper.status_error = 0; 798 rx_desc->wb.upper.status_error = 0;
@@ -740,7 +805,7 @@ next_desc:
740 805
741 /* use prefetched values */ 806 /* use prefetched values */
742 rx_desc = next_rxd; 807 rx_desc = next_rxd;
743 rx_buffer_info = next_buffer; 808 rx_buffer_info = &rx_ring->rx_buffer_info[i];
744 809
745 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 810 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
746 } 811 }
@@ -780,7 +845,7 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
780 * corresponding register. 845 * corresponding register.
781 */ 846 */
782 for (v_idx = 0; v_idx < q_vectors; v_idx++) { 847 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
783 q_vector = &adapter->q_vector[v_idx]; 848 q_vector = adapter->q_vector[v_idx];
784 /* XXX for_each_bit(...) */ 849 /* XXX for_each_bit(...) */
785 r_idx = find_first_bit(q_vector->rxr_idx, 850 r_idx = find_first_bit(q_vector->rxr_idx,
786 adapter->num_rx_queues); 851 adapter->num_rx_queues);
@@ -929,8 +994,7 @@ static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
929 struct ixgbe_adapter *adapter = q_vector->adapter; 994 struct ixgbe_adapter *adapter = q_vector->adapter;
930 u32 new_itr; 995 u32 new_itr;
931 u8 current_itr, ret_itr; 996 u8 current_itr, ret_itr;
932 int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) / 997 int i, r_idx, v_idx = q_vector->v_idx;
933 sizeof(struct ixgbe_q_vector);
934 struct ixgbe_ring *rx_ring, *tx_ring; 998 struct ixgbe_ring *rx_ring, *tx_ring;
935 999
936 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); 1000 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
@@ -1121,7 +1185,13 @@ static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
1121 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 1185 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1122 rx_ring = &(adapter->rx_ring[r_idx]); 1186 rx_ring = &(adapter->rx_ring[r_idx]);
1123 /* disable interrupts on this vector only */ 1187 /* disable interrupts on this vector only */
1124 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx); 1188 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
1189 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1190 else if (rx_ring->v_idx & 0xFFFFFFFF)
1191 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), rx_ring->v_idx);
1192 else
1193 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1),
1194 (rx_ring->v_idx >> 32));
1125 napi_schedule(&q_vector->napi); 1195 napi_schedule(&q_vector->napi);
1126 1196
1127 return IRQ_HANDLED; 1197 return IRQ_HANDLED;
@@ -1135,6 +1205,23 @@ static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1135 return IRQ_HANDLED; 1205 return IRQ_HANDLED;
1136} 1206}
1137 1207
1208static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
1209 u64 qmask)
1210{
1211 u32 mask;
1212
1213 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1214 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
1215 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1216 } else {
1217 mask = (qmask & 0xFFFFFFFF);
1218 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(0), mask);
1219 mask = (qmask >> 32);
1220 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(1), mask);
1221 }
1222 /* skip the flush */
1223}
1224
1138/** 1225/**
1139 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine 1226 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1140 * @napi: napi struct with our devices info in it 1227 * @napi: napi struct with our devices info in it
@@ -1167,7 +1254,7 @@ static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1167 if (adapter->itr_setting & 1) 1254 if (adapter->itr_setting & 1)
1168 ixgbe_set_itr_msix(q_vector); 1255 ixgbe_set_itr_msix(q_vector);
1169 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 1256 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1170 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx); 1257 ixgbe_irq_enable_queues(adapter, rx_ring->v_idx);
1171 } 1258 }
1172 1259
1173 return work_done; 1260 return work_done;
@@ -1189,7 +1276,7 @@ static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1189 struct ixgbe_ring *rx_ring = NULL; 1276 struct ixgbe_ring *rx_ring = NULL;
1190 int work_done = 0, i; 1277 int work_done = 0, i;
1191 long r_idx; 1278 long r_idx;
1192 u16 enable_mask = 0; 1279 u64 enable_mask = 0;
1193 1280
1194 /* attempt to distribute budget to each queue fairly, but don't allow 1281 /* attempt to distribute budget to each queue fairly, but don't allow
1195 * the budget to go below 1 because we'll exit polling */ 1282 * the budget to go below 1 because we'll exit polling */
@@ -1216,7 +1303,7 @@ static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1216 if (adapter->itr_setting & 1) 1303 if (adapter->itr_setting & 1)
1217 ixgbe_set_itr_msix(q_vector); 1304 ixgbe_set_itr_msix(q_vector);
1218 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 1305 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1219 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask); 1306 ixgbe_irq_enable_queues(adapter, enable_mask);
1220 return 0; 1307 return 0;
1221 } 1308 }
1222 1309
@@ -1225,19 +1312,21 @@ static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1225static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx, 1312static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1226 int r_idx) 1313 int r_idx)
1227{ 1314{
1228 a->q_vector[v_idx].adapter = a; 1315 struct ixgbe_q_vector *q_vector = a->q_vector[v_idx];
1229 set_bit(r_idx, a->q_vector[v_idx].rxr_idx); 1316
1230 a->q_vector[v_idx].rxr_count++; 1317 set_bit(r_idx, q_vector->rxr_idx);
1231 a->rx_ring[r_idx].v_idx = 1 << v_idx; 1318 q_vector->rxr_count++;
1319 a->rx_ring[r_idx].v_idx = (u64)1 << v_idx;
1232} 1320}
1233 1321
1234static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx, 1322static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1235 int r_idx) 1323 int t_idx)
1236{ 1324{
1237 a->q_vector[v_idx].adapter = a; 1325 struct ixgbe_q_vector *q_vector = a->q_vector[v_idx];
1238 set_bit(r_idx, a->q_vector[v_idx].txr_idx); 1326
1239 a->q_vector[v_idx].txr_count++; 1327 set_bit(t_idx, q_vector->txr_idx);
1240 a->tx_ring[r_idx].v_idx = 1 << v_idx; 1328 q_vector->txr_count++;
1329 a->tx_ring[t_idx].v_idx = (u64)1 << v_idx;
1241} 1330}
1242 1331
1243/** 1332/**
@@ -1333,7 +1422,7 @@ static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1333 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \ 1422 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1334 &ixgbe_msix_clean_many) 1423 &ixgbe_msix_clean_many)
1335 for (vector = 0; vector < q_vectors; vector++) { 1424 for (vector = 0; vector < q_vectors; vector++) {
1336 handler = SET_HANDLER(&adapter->q_vector[vector]); 1425 handler = SET_HANDLER(adapter->q_vector[vector]);
1337 1426
1338 if(handler == &ixgbe_msix_clean_rx) { 1427 if(handler == &ixgbe_msix_clean_rx) {
1339 sprintf(adapter->name[vector], "%s-%s-%d", 1428 sprintf(adapter->name[vector], "%s-%s-%d",
@@ -1349,7 +1438,7 @@ static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1349 1438
1350 err = request_irq(adapter->msix_entries[vector].vector, 1439 err = request_irq(adapter->msix_entries[vector].vector,
1351 handler, 0, adapter->name[vector], 1440 handler, 0, adapter->name[vector],
1352 &(adapter->q_vector[vector])); 1441 adapter->q_vector[vector]);
1353 if (err) { 1442 if (err) {
1354 DPRINTK(PROBE, ERR, 1443 DPRINTK(PROBE, ERR,
1355 "request_irq failed for MSIX interrupt " 1444 "request_irq failed for MSIX interrupt "
@@ -1372,7 +1461,7 @@ static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1372free_queue_irqs: 1461free_queue_irqs:
1373 for (i = vector - 1; i >= 0; i--) 1462 for (i = vector - 1; i >= 0; i--)
1374 free_irq(adapter->msix_entries[--vector].vector, 1463 free_irq(adapter->msix_entries[--vector].vector,
1375 &(adapter->q_vector[i])); 1464 adapter->q_vector[i]);
1376 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; 1465 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1377 pci_disable_msix(adapter->pdev); 1466 pci_disable_msix(adapter->pdev);
1378 kfree(adapter->msix_entries); 1467 kfree(adapter->msix_entries);
@@ -1383,7 +1472,7 @@ out:
1383 1472
1384static void ixgbe_set_itr(struct ixgbe_adapter *adapter) 1473static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1385{ 1474{
1386 struct ixgbe_q_vector *q_vector = adapter->q_vector; 1475 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
1387 u8 current_itr; 1476 u8 current_itr;
1388 u32 new_itr = q_vector->eitr; 1477 u32 new_itr = q_vector->eitr;
1389 struct ixgbe_ring *rx_ring = &adapter->rx_ring[0]; 1478 struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
@@ -1436,7 +1525,8 @@ static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1436static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter) 1525static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1437{ 1526{
1438 u32 mask; 1527 u32 mask;
1439 mask = IXGBE_EIMS_ENABLE_MASK; 1528
1529 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1440 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) 1530 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1441 mask |= IXGBE_EIMS_GPI_SDP1; 1531 mask |= IXGBE_EIMS_GPI_SDP1;
1442 if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 1532 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
@@ -1446,14 +1536,7 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1446 } 1536 }
1447 1537
1448 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); 1538 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1449 if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 1539 ixgbe_irq_enable_queues(adapter, ~0);
1450 /* enable the rest of the queue vectors */
1451 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(1),
1452 (IXGBE_EIMS_RTX_QUEUE << 16));
1453 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(2),
1454 ((IXGBE_EIMS_RTX_QUEUE << 16) |
1455 IXGBE_EIMS_RTX_QUEUE));
1456 }
1457 IXGBE_WRITE_FLUSH(&adapter->hw); 1540 IXGBE_WRITE_FLUSH(&adapter->hw);
1458} 1541}
1459 1542
@@ -1467,6 +1550,7 @@ static irqreturn_t ixgbe_intr(int irq, void *data)
1467 struct net_device *netdev = data; 1550 struct net_device *netdev = data;
1468 struct ixgbe_adapter *adapter = netdev_priv(netdev); 1551 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1469 struct ixgbe_hw *hw = &adapter->hw; 1552 struct ixgbe_hw *hw = &adapter->hw;
1553 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
1470 u32 eicr; 1554 u32 eicr;
1471 1555
1472 /* 1556 /*
@@ -1494,13 +1578,13 @@ static irqreturn_t ixgbe_intr(int irq, void *data)
1494 1578
1495 ixgbe_check_fan_failure(adapter, eicr); 1579 ixgbe_check_fan_failure(adapter, eicr);
1496 1580
1497 if (napi_schedule_prep(&adapter->q_vector[0].napi)) { 1581 if (napi_schedule_prep(&(q_vector->napi))) {
1498 adapter->tx_ring[0].total_packets = 0; 1582 adapter->tx_ring[0].total_packets = 0;
1499 adapter->tx_ring[0].total_bytes = 0; 1583 adapter->tx_ring[0].total_bytes = 0;
1500 adapter->rx_ring[0].total_packets = 0; 1584 adapter->rx_ring[0].total_packets = 0;
1501 adapter->rx_ring[0].total_bytes = 0; 1585 adapter->rx_ring[0].total_bytes = 0;
1502 /* would disable interrupts here but EIAM disabled it */ 1586 /* would disable interrupts here but EIAM disabled it */
1503 __napi_schedule(&adapter->q_vector[0].napi); 1587 __napi_schedule(&(q_vector->napi));
1504 } 1588 }
1505 1589
1506 return IRQ_HANDLED; 1590 return IRQ_HANDLED;
@@ -1511,7 +1595,7 @@ static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1511 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1595 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1512 1596
1513 for (i = 0; i < q_vectors; i++) { 1597 for (i = 0; i < q_vectors; i++) {
1514 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i]; 1598 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
1515 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES); 1599 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1516 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES); 1600 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1517 q_vector->rxr_count = 0; 1601 q_vector->rxr_count = 0;
@@ -1562,7 +1646,7 @@ static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1562 i--; 1646 i--;
1563 for (; i >= 0; i--) { 1647 for (; i >= 0; i--) {
1564 free_irq(adapter->msix_entries[i].vector, 1648 free_irq(adapter->msix_entries[i].vector,
1565 &(adapter->q_vector[i])); 1649 adapter->q_vector[i]);
1566 } 1650 }
1567 1651
1568 ixgbe_reset_q_vectors(adapter); 1652 ixgbe_reset_q_vectors(adapter);
@@ -1577,10 +1661,12 @@ static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1577 **/ 1661 **/
1578static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter) 1662static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1579{ 1663{
1580 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); 1664 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1581 if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 1665 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1666 } else {
1667 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
1668 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
1582 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); 1669 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
1583 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(2), ~0);
1584 } 1670 }
1585 IXGBE_WRITE_FLUSH(&adapter->hw); 1671 IXGBE_WRITE_FLUSH(&adapter->hw);
1586 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 1672 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
@@ -1592,18 +1678,6 @@ static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1592 } 1678 }
1593} 1679}
1594 1680
1595static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter)
1596{
1597 u32 mask = IXGBE_EIMS_RTX_QUEUE;
1598 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1599 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1600 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(1), mask << 16);
1601 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(2),
1602 (mask << 16 | mask));
1603 }
1604 /* skip the flush */
1605}
1606
1607/** 1681/**
1608 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts 1682 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1609 * 1683 *
@@ -1673,11 +1747,34 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1673 u32 srrctl; 1747 u32 srrctl;
1674 int queue0 = 0; 1748 int queue0 = 0;
1675 unsigned long mask; 1749 unsigned long mask;
1750 struct ixgbe_ring_feature *feature = adapter->ring_feature;
1676 1751
1677 if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 1752 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1678 queue0 = index; 1753 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1754 int dcb_i = feature[RING_F_DCB].indices;
1755 if (dcb_i == 8)
1756 queue0 = index >> 4;
1757 else if (dcb_i == 4)
1758 queue0 = index >> 5;
1759 else
1760 dev_err(&adapter->pdev->dev, "Invalid DCB "
1761 "configuration\n");
1762#ifdef IXGBE_FCOE
1763 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
1764 struct ixgbe_ring_feature *f;
1765
1766 rx_ring = &adapter->rx_ring[queue0];
1767 f = &adapter->ring_feature[RING_F_FCOE];
1768 if ((queue0 == 0) && (index > rx_ring->reg_idx))
1769 queue0 = f->mask + index -
1770 rx_ring->reg_idx - 1;
1771 }
1772#endif /* IXGBE_FCOE */
1773 } else {
1774 queue0 = index;
1775 }
1679 } else { 1776 } else {
1680 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask; 1777 mask = (unsigned long) feature[RING_F_RSS].mask;
1681 queue0 = index & mask; 1778 queue0 = index & mask;
1682 index = index & mask; 1779 index = index & mask;
1683 } 1780 }
@@ -1689,33 +1786,55 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1689 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 1786 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1690 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; 1787 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1691 1788
1789 srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1790 IXGBE_SRRCTL_BSIZEHDR_MASK;
1791
1692 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 1792 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1693 u16 bufsz = IXGBE_RXBUFFER_2048; 1793#if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
1694 /* grow the amount we can receive on large page machines */ 1794 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1695 if (bufsz < (PAGE_SIZE / 2)) 1795#else
1696 bufsz = (PAGE_SIZE / 2); 1796 srrctl |= (PAGE_SIZE / 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1697 /* cap the bufsz at our largest descriptor size */ 1797#endif
1698 bufsz = min((u16)IXGBE_MAX_RXBUFFER, bufsz);
1699
1700 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1701 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; 1798 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1702 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1703 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1704 IXGBE_SRRCTL_BSIZEHDR_MASK);
1705 } else { 1799 } else {
1800 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
1801 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1706 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 1802 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1707
1708 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1709 srrctl |= IXGBE_RXBUFFER_2048 >>
1710 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1711 else
1712 srrctl |= rx_ring->rx_buf_len >>
1713 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1714 } 1803 }
1715 1804
1716 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl); 1805 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1717} 1806}
1718 1807
1808static u32 ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
1809{
1810 u32 mrqc = 0;
1811 int mask;
1812
1813 if (!(adapter->hw.mac.type == ixgbe_mac_82599EB))
1814 return mrqc;
1815
1816 mask = adapter->flags & (IXGBE_FLAG_RSS_ENABLED
1817#ifdef CONFIG_IXGBE_DCB
1818 | IXGBE_FLAG_DCB_ENABLED
1819#endif
1820 );
1821
1822 switch (mask) {
1823 case (IXGBE_FLAG_RSS_ENABLED):
1824 mrqc = IXGBE_MRQC_RSSEN;
1825 break;
1826#ifdef CONFIG_IXGBE_DCB
1827 case (IXGBE_FLAG_DCB_ENABLED):
1828 mrqc = IXGBE_MRQC_RT8TCEN;
1829 break;
1830#endif /* CONFIG_IXGBE_DCB */
1831 default:
1832 break;
1833 }
1834
1835 return mrqc;
1836}
1837
1719/** 1838/**
1720 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset 1839 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1721 * @adapter: board private structure 1840 * @adapter: board private structure
@@ -1736,11 +1855,17 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1736 u32 fctrl, hlreg0; 1855 u32 fctrl, hlreg0;
1737 u32 reta = 0, mrqc = 0; 1856 u32 reta = 0, mrqc = 0;
1738 u32 rdrxctl; 1857 u32 rdrxctl;
1858 u32 rscctrl;
1739 int rx_buf_len; 1859 int rx_buf_len;
1740 1860
1741 /* Decide whether to use packet split mode or not */ 1861 /* Decide whether to use packet split mode or not */
1742 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED; 1862 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1743 1863
1864#ifdef IXGBE_FCOE
1865 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
1866 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1867#endif /* IXGBE_FCOE */
1868
1744 /* Set the RX buffer length according to the mode */ 1869 /* Set the RX buffer length according to the mode */
1745 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 1870 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1746 rx_buf_len = IXGBE_RX_HDR_SIZE; 1871 rx_buf_len = IXGBE_RX_HDR_SIZE;
@@ -1749,11 +1874,13 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1749 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 1874 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1750 IXGBE_PSRTYPE_UDPHDR | 1875 IXGBE_PSRTYPE_UDPHDR |
1751 IXGBE_PSRTYPE_IPV4HDR | 1876 IXGBE_PSRTYPE_IPV4HDR |
1752 IXGBE_PSRTYPE_IPV6HDR; 1877 IXGBE_PSRTYPE_IPV6HDR |
1878 IXGBE_PSRTYPE_L2HDR;
1753 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 1879 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
1754 } 1880 }
1755 } else { 1881 } else {
1756 if (netdev->mtu <= ETH_DATA_LEN) 1882 if (!(adapter->flags & IXGBE_FLAG_RSC_ENABLED) &&
1883 (netdev->mtu <= ETH_DATA_LEN))
1757 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE; 1884 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1758 else 1885 else
1759 rx_buf_len = ALIGN(max_frame, 1024); 1886 rx_buf_len = ALIGN(max_frame, 1024);
@@ -1770,6 +1897,10 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1770 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN; 1897 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1771 else 1898 else
1772 hlreg0 |= IXGBE_HLREG0_JUMBOEN; 1899 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1900#ifdef IXGBE_FCOE
1901 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
1902 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1903#endif
1773 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); 1904 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1774 1905
1775 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc); 1906 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
@@ -1777,8 +1908,10 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1777 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 1908 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1778 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN); 1909 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1779 1910
1780 /* Setup the HW Rx Head and Tail Descriptor Pointers and 1911 /*
1781 * the Base and Length of the Rx Descriptor Ring */ 1912 * Setup the HW Rx Head and Tail Descriptor Pointers and
1913 * the Base and Length of the Rx Descriptor Ring
1914 */
1782 for (i = 0; i < adapter->num_rx_queues; i++) { 1915 for (i = 0; i < adapter->num_rx_queues; i++) {
1783 rdba = adapter->rx_ring[i].dma; 1916 rdba = adapter->rx_ring[i].dma;
1784 j = adapter->rx_ring[i].reg_idx; 1917 j = adapter->rx_ring[i].reg_idx;
@@ -1791,6 +1924,17 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1791 adapter->rx_ring[i].tail = IXGBE_RDT(j); 1924 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1792 adapter->rx_ring[i].rx_buf_len = rx_buf_len; 1925 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1793 1926
1927#ifdef IXGBE_FCOE
1928 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
1929 struct ixgbe_ring_feature *f;
1930 f = &adapter->ring_feature[RING_F_FCOE];
1931 if ((rx_buf_len < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
1932 (i >= f->mask) && (i < f->mask + f->indices))
1933 adapter->rx_ring[i].rx_buf_len =
1934 IXGBE_FCOE_JUMBO_FRAME_SIZE;
1935 }
1936
1937#endif /* IXGBE_FCOE */
1794 ixgbe_configure_srrctl(adapter, j); 1938 ixgbe_configure_srrctl(adapter, j);
1795 } 1939 }
1796 1940
@@ -1811,23 +1955,8 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1811 } 1955 }
1812 1956
1813 /* Program MRQC for the distribution of queues */ 1957 /* Program MRQC for the distribution of queues */
1814 if (hw->mac.type == ixgbe_mac_82599EB) { 1958 mrqc = ixgbe_setup_mrqc(adapter);
1815 int mask = adapter->flags & (
1816 IXGBE_FLAG_RSS_ENABLED
1817 | IXGBE_FLAG_DCB_ENABLED
1818 );
1819 1959
1820 switch (mask) {
1821 case (IXGBE_FLAG_RSS_ENABLED):
1822 mrqc = IXGBE_MRQC_RSSEN;
1823 break;
1824 case (IXGBE_FLAG_DCB_ENABLED):
1825 mrqc = IXGBE_MRQC_RT8TCEN;
1826 break;
1827 default:
1828 break;
1829 }
1830 }
1831 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { 1960 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1832 /* Fill out redirection table */ 1961 /* Fill out redirection table */
1833 for (i = 0, j = 0; i < 128; i++, j++) { 1962 for (i = 0, j = 0; i < 128; i++, j++) {
@@ -1875,8 +2004,45 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1875 if (hw->mac.type == ixgbe_mac_82599EB) { 2004 if (hw->mac.type == ixgbe_mac_82599EB) {
1876 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 2005 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1877 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP; 2006 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
2007 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
1878 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl); 2008 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1879 } 2009 }
2010
2011 if (adapter->flags & IXGBE_FLAG_RSC_ENABLED) {
2012 /* Enable 82599 HW-RSC */
2013 for (i = 0; i < adapter->num_rx_queues; i++) {
2014 j = adapter->rx_ring[i].reg_idx;
2015 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(j));
2016 rscctrl |= IXGBE_RSCCTL_RSCEN;
2017 /*
2018 * we must limit the number of descriptors so that the
2019 * total size of max desc * buf_len is not greater
2020 * than 65535
2021 */
2022 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
2023#if (MAX_SKB_FRAGS > 16)
2024 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2025#elif (MAX_SKB_FRAGS > 8)
2026 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2027#elif (MAX_SKB_FRAGS > 4)
2028 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2029#else
2030 rscctrl |= IXGBE_RSCCTL_MAXDESC_1;
2031#endif
2032 } else {
2033 if (rx_buf_len < IXGBE_RXBUFFER_4096)
2034 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2035 else if (rx_buf_len < IXGBE_RXBUFFER_8192)
2036 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2037 else
2038 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2039 }
2040 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(j), rscctrl);
2041 }
2042 /* Disable RSC for ACK packets */
2043 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
2044 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
2045 }
1880} 2046}
1881 2047
1882static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2048static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
@@ -2015,11 +2181,7 @@ static void ixgbe_set_rx_mode(struct net_device *netdev)
2015 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); 2181 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2016 2182
2017 /* reprogram secondary unicast list */ 2183 /* reprogram secondary unicast list */
2018 addr_count = netdev->uc_count; 2184 hw->mac.ops.update_uc_addr_list(hw, &netdev->uc_list);
2019 if (addr_count)
2020 addr_list = netdev->uc_list->dmi_addr;
2021 hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
2022 ixgbe_addr_list_itr);
2023 2185
2024 /* reprogram multicast list */ 2186 /* reprogram multicast list */
2025 addr_count = netdev->mc_count; 2187 addr_count = netdev->mc_count;
@@ -2041,7 +2203,7 @@ static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
2041 2203
2042 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 2204 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2043 struct napi_struct *napi; 2205 struct napi_struct *napi;
2044 q_vector = &adapter->q_vector[q_idx]; 2206 q_vector = adapter->q_vector[q_idx];
2045 if (!q_vector->rxr_count) 2207 if (!q_vector->rxr_count)
2046 continue; 2208 continue;
2047 napi = &q_vector->napi; 2209 napi = &q_vector->napi;
@@ -2064,7 +2226,7 @@ static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
2064 q_vectors = 1; 2226 q_vectors = 1;
2065 2227
2066 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 2228 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2067 q_vector = &adapter->q_vector[q_idx]; 2229 q_vector = adapter->q_vector[q_idx];
2068 if (!q_vector->rxr_count) 2230 if (!q_vector->rxr_count)
2069 continue; 2231 continue;
2070 napi_disable(&q_vector->napi); 2232 napi_disable(&q_vector->napi);
@@ -2140,6 +2302,11 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter)
2140 netif_set_gso_max_size(netdev, 65536); 2302 netif_set_gso_max_size(netdev, 65536);
2141#endif 2303#endif
2142 2304
2305#ifdef IXGBE_FCOE
2306 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
2307 ixgbe_configure_fcoe(adapter);
2308
2309#endif /* IXGBE_FCOE */
2143 ixgbe_configure_tx(adapter); 2310 ixgbe_configure_tx(adapter);
2144 ixgbe_configure_rx(adapter); 2311 ixgbe_configure_rx(adapter);
2145 for (i = 0; i < adapter->num_rx_queues; i++) 2312 for (i = 0; i < adapter->num_rx_queues; i++)
@@ -2294,6 +2461,13 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
2294 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); 2461 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2295 } 2462 }
2296 2463
2464#ifdef IXGBE_FCOE
2465 /* adjust max frame to be able to do baby jumbo for FCoE */
2466 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
2467 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
2468 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
2469
2470#endif /* IXGBE_FCOE */
2297 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); 2471 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
2298 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) { 2472 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2299 mhadd &= ~IXGBE_MHADD_MFS_MASK; 2473 mhadd &= ~IXGBE_MHADD_MFS_MASK;
@@ -2357,6 +2531,17 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
2357 ixgbe_irq_enable(adapter); 2531 ixgbe_irq_enable(adapter);
2358 2532
2359 /* 2533 /*
2534 * If this adapter has a fan, check to see if we had a failure
2535 * before we enabled the interrupt.
2536 */
2537 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2538 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
2539 if (esdp & IXGBE_ESDP_SDP1)
2540 DPRINTK(DRV, CRIT,
2541 "Fan has stopped, replace the adapter\n");
2542 }
2543
2544 /*
2360 * For hot-pluggable SFP+ devices, a new SFP+ module may have 2545 * For hot-pluggable SFP+ devices, a new SFP+ module may have
2361 * arrived before interrupts were enabled. We need to kick off 2546 * arrived before interrupts were enabled. We need to kick off
2362 * the SFP+ module setup first, then try to bring up link. 2547 * the SFP+ module setup first, then try to bring up link.
@@ -2404,15 +2589,16 @@ int ixgbe_up(struct ixgbe_adapter *adapter)
2404 /* hardware has been reset, we need to reload some things */ 2589 /* hardware has been reset, we need to reload some things */
2405 ixgbe_configure(adapter); 2590 ixgbe_configure(adapter);
2406 2591
2407 ixgbe_napi_add_all(adapter);
2408
2409 return ixgbe_up_complete(adapter); 2592 return ixgbe_up_complete(adapter);
2410} 2593}
2411 2594
2412void ixgbe_reset(struct ixgbe_adapter *adapter) 2595void ixgbe_reset(struct ixgbe_adapter *adapter)
2413{ 2596{
2414 struct ixgbe_hw *hw = &adapter->hw; 2597 struct ixgbe_hw *hw = &adapter->hw;
2415 if (hw->mac.ops.init_hw(hw)) 2598 int err;
2599
2600 err = hw->mac.ops.init_hw(hw);
2601 if (err && (err != IXGBE_ERR_SFP_NOT_PRESENT))
2416 dev_err(&adapter->pdev->dev, "Hardware Error\n"); 2602 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2417 2603
2418 /* reprogram the RAR[0] in case user changed it. */ 2604 /* reprogram the RAR[0] in case user changed it. */
@@ -2445,8 +2631,13 @@ static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2445 rx_buffer_info->dma = 0; 2631 rx_buffer_info->dma = 0;
2446 } 2632 }
2447 if (rx_buffer_info->skb) { 2633 if (rx_buffer_info->skb) {
2448 dev_kfree_skb(rx_buffer_info->skb); 2634 struct sk_buff *skb = rx_buffer_info->skb;
2449 rx_buffer_info->skb = NULL; 2635 rx_buffer_info->skb = NULL;
2636 do {
2637 struct sk_buff *this = skb;
2638 skb = skb->prev;
2639 dev_kfree_skb(this);
2640 } while (skb);
2450 } 2641 }
2451 if (!rx_buffer_info->page) 2642 if (!rx_buffer_info->page)
2452 continue; 2643 continue;
@@ -2575,13 +2766,6 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
2575 2766
2576 netif_carrier_off(netdev); 2767 netif_carrier_off(netdev);
2577 2768
2578#ifdef CONFIG_IXGBE_DCA
2579 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2580 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2581 dca_remove_requester(&adapter->pdev->dev);
2582 }
2583
2584#endif
2585 if (!pci_channel_offline(adapter->pdev)) 2769 if (!pci_channel_offline(adapter->pdev))
2586 ixgbe_reset(adapter); 2770 ixgbe_reset(adapter);
2587 ixgbe_clean_all_tx_rings(adapter); 2771 ixgbe_clean_all_tx_rings(adapter);
@@ -2589,13 +2773,7 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
2589 2773
2590#ifdef CONFIG_IXGBE_DCA 2774#ifdef CONFIG_IXGBE_DCA
2591 /* since we reset the hardware DCA settings were cleared */ 2775 /* since we reset the hardware DCA settings were cleared */
2592 if (dca_add_requester(&adapter->pdev->dev) == 0) { 2776 ixgbe_setup_dca(adapter);
2593 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2594 /* always use CB2 mode, difference is masked
2595 * in the CB driver */
2596 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2597 ixgbe_setup_dca(adapter);
2598 }
2599#endif 2777#endif
2600} 2778}
2601 2779
@@ -2632,7 +2810,7 @@ static int ixgbe_poll(struct napi_struct *napi, int budget)
2632 if (adapter->itr_setting & 1) 2810 if (adapter->itr_setting & 1)
2633 ixgbe_set_itr(adapter); 2811 ixgbe_set_itr(adapter);
2634 if (!test_bit(__IXGBE_DOWN, &adapter->state)) 2812 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2635 ixgbe_irq_enable_queues(adapter); 2813 ixgbe_irq_enable_queues(adapter, IXGBE_EIMS_RTX_QUEUE);
2636 } 2814 }
2637 return work_done; 2815 return work_done;
2638} 2816}
@@ -2668,17 +2846,15 @@ static void ixgbe_reset_task(struct work_struct *work)
2668static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter) 2846static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
2669{ 2847{
2670 bool ret = false; 2848 bool ret = false;
2849 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_DCB];
2671 2850
2672 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { 2851 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
2673 adapter->ring_feature[RING_F_DCB].mask = 0x7 << 3; 2852 return ret;
2674 adapter->num_rx_queues = 2853
2675 adapter->ring_feature[RING_F_DCB].indices; 2854 f->mask = 0x7 << 3;
2676 adapter->num_tx_queues = 2855 adapter->num_rx_queues = f->indices;
2677 adapter->ring_feature[RING_F_DCB].indices; 2856 adapter->num_tx_queues = f->indices;
2678 ret = true; 2857 ret = true;
2679 } else {
2680 ret = false;
2681 }
2682 2858
2683 return ret; 2859 return ret;
2684} 2860}
@@ -2695,13 +2871,12 @@ static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
2695static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter) 2871static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
2696{ 2872{
2697 bool ret = false; 2873 bool ret = false;
2874 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_RSS];
2698 2875
2699 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { 2876 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2700 adapter->ring_feature[RING_F_RSS].mask = 0xF; 2877 f->mask = 0xF;
2701 adapter->num_rx_queues = 2878 adapter->num_rx_queues = f->indices;
2702 adapter->ring_feature[RING_F_RSS].indices; 2879 adapter->num_tx_queues = f->indices;
2703 adapter->num_tx_queues =
2704 adapter->ring_feature[RING_F_RSS].indices;
2705 ret = true; 2880 ret = true;
2706 } else { 2881 } else {
2707 ret = false; 2882 ret = false;
@@ -2710,6 +2885,47 @@ static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
2710 return ret; 2885 return ret;
2711} 2886}
2712 2887
2888#ifdef IXGBE_FCOE
2889/**
2890 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
2891 * @adapter: board private structure to initialize
2892 *
2893 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
2894 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
2895 * rx queues out of the max number of rx queues, instead, it is used as the
2896 * index of the first rx queue used by FCoE.
2897 *
2898 **/
2899static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter)
2900{
2901 bool ret = false;
2902 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
2903
2904 f->indices = min((int)num_online_cpus(), f->indices);
2905 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
2906#ifdef CONFIG_IXGBE_DCB
2907 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2908 DPRINTK(PROBE, INFO, "FCOE enabled with DCB \n");
2909 ixgbe_set_dcb_queues(adapter);
2910 }
2911#endif
2912 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2913 DPRINTK(PROBE, INFO, "FCOE enabled with RSS \n");
2914 ixgbe_set_rss_queues(adapter);
2915 }
2916 /* adding FCoE rx rings to the end */
2917 f->mask = adapter->num_rx_queues;
2918 adapter->num_rx_queues += f->indices;
2919 if (adapter->num_tx_queues == 0)
2920 adapter->num_tx_queues = f->indices;
2921
2922 ret = true;
2923 }
2924
2925 return ret;
2926}
2927
2928#endif /* IXGBE_FCOE */
2713/* 2929/*
2714 * ixgbe_set_num_queues: Allocate queues for device, feature dependant 2930 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
2715 * @adapter: board private structure to initialize 2931 * @adapter: board private structure to initialize
@@ -2723,6 +2939,11 @@ static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
2723 **/ 2939 **/
2724static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter) 2940static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2725{ 2941{
2942#ifdef IXGBE_FCOE
2943 if (ixgbe_set_fcoe_queues(adapter))
2944 goto done;
2945
2946#endif /* IXGBE_FCOE */
2726#ifdef CONFIG_IXGBE_DCB 2947#ifdef CONFIG_IXGBE_DCB
2727 if (ixgbe_set_dcb_queues(adapter)) 2948 if (ixgbe_set_dcb_queues(adapter))
2728 goto done; 2949 goto done;
@@ -2778,9 +2999,6 @@ static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2778 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; 2999 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2779 kfree(adapter->msix_entries); 3000 kfree(adapter->msix_entries);
2780 adapter->msix_entries = NULL; 3001 adapter->msix_entries = NULL;
2781 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2782 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2783 ixgbe_set_num_queues(adapter);
2784 } else { 3002 } else {
2785 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */ 3003 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2786 /* 3004 /*
@@ -2901,6 +3119,39 @@ static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
2901} 3119}
2902#endif 3120#endif
2903 3121
3122#ifdef IXGBE_FCOE
3123/**
3124 * ixgbe_cache_ring_fcoe - Descriptor ring to register mapping for the FCoE
3125 * @adapter: board private structure to initialize
3126 *
3127 * Cache the descriptor ring offsets for FCoE mode to the assigned rings.
3128 *
3129 */
3130static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter *adapter)
3131{
3132 int i, fcoe_i = 0;
3133 bool ret = false;
3134 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
3135
3136 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
3137#ifdef CONFIG_IXGBE_DCB
3138 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3139 ixgbe_cache_ring_dcb(adapter);
3140 fcoe_i = adapter->rx_ring[0].reg_idx + 1;
3141 }
3142#endif /* CONFIG_IXGBE_DCB */
3143 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
3144 ixgbe_cache_ring_rss(adapter);
3145 fcoe_i = f->mask;
3146 }
3147 for (i = 0; i < f->indices; i++, fcoe_i++)
3148 adapter->rx_ring[f->mask + i].reg_idx = fcoe_i;
3149 ret = true;
3150 }
3151 return ret;
3152}
3153
3154#endif /* IXGBE_FCOE */
2904/** 3155/**
2905 * ixgbe_cache_ring_register - Descriptor ring to register mapping 3156 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2906 * @adapter: board private structure to initialize 3157 * @adapter: board private structure to initialize
@@ -2918,6 +3169,11 @@ static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2918 adapter->rx_ring[0].reg_idx = 0; 3169 adapter->rx_ring[0].reg_idx = 0;
2919 adapter->tx_ring[0].reg_idx = 0; 3170 adapter->tx_ring[0].reg_idx = 0;
2920 3171
3172#ifdef IXGBE_FCOE
3173 if (ixgbe_cache_ring_fcoe(adapter))
3174 return;
3175
3176#endif /* IXGBE_FCOE */
2921#ifdef CONFIG_IXGBE_DCB 3177#ifdef CONFIG_IXGBE_DCB
2922 if (ixgbe_cache_ring_dcb(adapter)) 3178 if (ixgbe_cache_ring_dcb(adapter))
2923 return; 3179 return;
@@ -3004,31 +3260,20 @@ static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
3004 * mean we disable MSI-X capabilities of the adapter. */ 3260 * mean we disable MSI-X capabilities of the adapter. */
3005 adapter->msix_entries = kcalloc(v_budget, 3261 adapter->msix_entries = kcalloc(v_budget,
3006 sizeof(struct msix_entry), GFP_KERNEL); 3262 sizeof(struct msix_entry), GFP_KERNEL);
3007 if (!adapter->msix_entries) { 3263 if (adapter->msix_entries) {
3008 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 3264 for (vector = 0; vector < v_budget; vector++)
3009 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; 3265 adapter->msix_entries[vector].entry = vector;
3010 ixgbe_set_num_queues(adapter);
3011 kfree(adapter->tx_ring);
3012 kfree(adapter->rx_ring);
3013 err = ixgbe_alloc_queues(adapter);
3014 if (err) {
3015 DPRINTK(PROBE, ERR, "Unable to allocate memory "
3016 "for queues\n");
3017 goto out;
3018 }
3019 3266
3020 goto try_msi; 3267 ixgbe_acquire_msix_vectors(adapter, v_budget);
3021 }
3022
3023 for (vector = 0; vector < v_budget; vector++)
3024 adapter->msix_entries[vector].entry = vector;
3025 3268
3026 ixgbe_acquire_msix_vectors(adapter, v_budget); 3269 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3270 goto out;
3271 }
3027 3272
3028 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) 3273 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
3029 goto out; 3274 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
3275 ixgbe_set_num_queues(adapter);
3030 3276
3031try_msi:
3032 err = pci_enable_msi(adapter->pdev); 3277 err = pci_enable_msi(adapter->pdev);
3033 if (!err) { 3278 if (!err) {
3034 adapter->flags |= IXGBE_FLAG_MSI_ENABLED; 3279 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
@@ -3043,6 +3288,87 @@ out:
3043 return err; 3288 return err;
3044} 3289}
3045 3290
3291/**
3292 * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors
3293 * @adapter: board private structure to initialize
3294 *
3295 * We allocate one q_vector per queue interrupt. If allocation fails we
3296 * return -ENOMEM.
3297 **/
3298static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter)
3299{
3300 int q_idx, num_q_vectors;
3301 struct ixgbe_q_vector *q_vector;
3302 int napi_vectors;
3303 int (*poll)(struct napi_struct *, int);
3304
3305 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3306 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3307 napi_vectors = adapter->num_rx_queues;
3308 poll = &ixgbe_clean_rxonly;
3309 } else {
3310 num_q_vectors = 1;
3311 napi_vectors = 1;
3312 poll = &ixgbe_poll;
3313 }
3314
3315 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
3316 q_vector = kzalloc(sizeof(struct ixgbe_q_vector), GFP_KERNEL);
3317 if (!q_vector)
3318 goto err_out;
3319 q_vector->adapter = adapter;
3320 q_vector->v_idx = q_idx;
3321 q_vector->eitr = adapter->eitr_param;
3322 if (q_idx < napi_vectors)
3323 netif_napi_add(adapter->netdev, &q_vector->napi,
3324 (*poll), 64);
3325 adapter->q_vector[q_idx] = q_vector;
3326 }
3327
3328 return 0;
3329
3330err_out:
3331 while (q_idx) {
3332 q_idx--;
3333 q_vector = adapter->q_vector[q_idx];
3334 netif_napi_del(&q_vector->napi);
3335 kfree(q_vector);
3336 adapter->q_vector[q_idx] = NULL;
3337 }
3338 return -ENOMEM;
3339}
3340
3341/**
3342 * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors
3343 * @adapter: board private structure to initialize
3344 *
3345 * This function frees the memory allocated to the q_vectors. In addition if
3346 * NAPI is enabled it will delete any references to the NAPI struct prior
3347 * to freeing the q_vector.
3348 **/
3349static void ixgbe_free_q_vectors(struct ixgbe_adapter *adapter)
3350{
3351 int q_idx, num_q_vectors;
3352 int napi_vectors;
3353
3354 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3355 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3356 napi_vectors = adapter->num_rx_queues;
3357 } else {
3358 num_q_vectors = 1;
3359 napi_vectors = 1;
3360 }
3361
3362 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
3363 struct ixgbe_q_vector *q_vector = adapter->q_vector[q_idx];
3364
3365 adapter->q_vector[q_idx] = NULL;
3366 if (q_idx < napi_vectors)
3367 netif_napi_del(&q_vector->napi);
3368 kfree(q_vector);
3369 }
3370}
3371
3046void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter) 3372void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
3047{ 3373{
3048 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 3374 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
@@ -3074,18 +3400,25 @@ int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
3074 /* Number of supported queues */ 3400 /* Number of supported queues */
3075 ixgbe_set_num_queues(adapter); 3401 ixgbe_set_num_queues(adapter);
3076 3402
3077 err = ixgbe_alloc_queues(adapter);
3078 if (err) {
3079 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
3080 goto err_alloc_queues;
3081 }
3082
3083 err = ixgbe_set_interrupt_capability(adapter); 3403 err = ixgbe_set_interrupt_capability(adapter);
3084 if (err) { 3404 if (err) {
3085 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n"); 3405 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
3086 goto err_set_interrupt; 3406 goto err_set_interrupt;
3087 } 3407 }
3088 3408
3409 err = ixgbe_alloc_q_vectors(adapter);
3410 if (err) {
3411 DPRINTK(PROBE, ERR, "Unable to allocate memory for queue "
3412 "vectors\n");
3413 goto err_alloc_q_vectors;
3414 }
3415
3416 err = ixgbe_alloc_queues(adapter);
3417 if (err) {
3418 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
3419 goto err_alloc_queues;
3420 }
3421
3089 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, " 3422 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
3090 "Tx Queue count = %u\n", 3423 "Tx Queue count = %u\n",
3091 (adapter->num_rx_queues > 1) ? "Enabled" : 3424 (adapter->num_rx_queues > 1) ? "Enabled" :
@@ -3095,11 +3428,30 @@ int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
3095 3428
3096 return 0; 3429 return 0;
3097 3430
3431err_alloc_queues:
3432 ixgbe_free_q_vectors(adapter);
3433err_alloc_q_vectors:
3434 ixgbe_reset_interrupt_capability(adapter);
3098err_set_interrupt: 3435err_set_interrupt:
3436 return err;
3437}
3438
3439/**
3440 * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings
3441 * @adapter: board private structure to clear interrupt scheme on
3442 *
3443 * We go through and clear interrupt specific resources and reset the structure
3444 * to pre-load conditions
3445 **/
3446void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter)
3447{
3099 kfree(adapter->tx_ring); 3448 kfree(adapter->tx_ring);
3100 kfree(adapter->rx_ring); 3449 kfree(adapter->rx_ring);
3101err_alloc_queues: 3450 adapter->tx_ring = NULL;
3102 return err; 3451 adapter->rx_ring = NULL;
3452
3453 ixgbe_free_q_vectors(adapter);
3454 ixgbe_reset_interrupt_capability(adapter);
3103} 3455}
3104 3456
3105/** 3457/**
@@ -3185,10 +3537,19 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
3185 adapter->ring_feature[RING_F_RSS].indices = rss; 3537 adapter->ring_feature[RING_F_RSS].indices = rss;
3186 adapter->flags |= IXGBE_FLAG_RSS_ENABLED; 3538 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
3187 adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES; 3539 adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
3188 if (hw->mac.type == ixgbe_mac_82598EB) 3540 if (hw->mac.type == ixgbe_mac_82598EB) {
3541 if (hw->device_id == IXGBE_DEV_ID_82598AT)
3542 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
3189 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598; 3543 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
3190 else if (hw->mac.type == ixgbe_mac_82599EB) 3544 } else if (hw->mac.type == ixgbe_mac_82599EB) {
3191 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599; 3545 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
3546 adapter->flags |= IXGBE_FLAG_RSC_CAPABLE;
3547 adapter->flags |= IXGBE_FLAG_RSC_ENABLED;
3548#ifdef IXGBE_FCOE
3549 adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
3550 adapter->ring_feature[RING_F_FCOE].indices = IXGBE_FCRETA_SIZE;
3551#endif /* IXGBE_FCOE */
3552 }
3192 3553
3193#ifdef CONFIG_IXGBE_DCB 3554#ifdef CONFIG_IXGBE_DCB
3194 /* Configure DCB traffic classes */ 3555 /* Configure DCB traffic classes */
@@ -3203,6 +3564,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
3203 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100; 3564 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
3204 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100; 3565 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
3205 adapter->dcb_cfg.rx_pba_cfg = pba_equal; 3566 adapter->dcb_cfg.rx_pba_cfg = pba_equal;
3567 adapter->dcb_cfg.pfc_mode_enable = false;
3206 adapter->dcb_cfg.round_robin_enable = false; 3568 adapter->dcb_cfg.round_robin_enable = false;
3207 adapter->dcb_set_bitmap = 0x00; 3569 adapter->dcb_set_bitmap = 0x00;
3208 ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg, 3570 ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
@@ -3213,6 +3575,9 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
3213 /* default flow control settings */ 3575 /* default flow control settings */
3214 hw->fc.requested_mode = ixgbe_fc_full; 3576 hw->fc.requested_mode = ixgbe_fc_full;
3215 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */ 3577 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
3578#ifdef CONFIG_DCB
3579 adapter->last_lfc_mode = hw->fc.current_mode;
3580#endif
3216 hw->fc.high_water = IXGBE_DEFAULT_FCRTH; 3581 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
3217 hw->fc.low_water = IXGBE_DEFAULT_FCRTL; 3582 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
3218 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE; 3583 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
@@ -3503,6 +3868,8 @@ static int ixgbe_open(struct net_device *netdev)
3503 if (test_bit(__IXGBE_TESTING, &adapter->state)) 3868 if (test_bit(__IXGBE_TESTING, &adapter->state))
3504 return -EBUSY; 3869 return -EBUSY;
3505 3870
3871 netif_carrier_off(netdev);
3872
3506 /* allocate transmit descriptors */ 3873 /* allocate transmit descriptors */
3507 err = ixgbe_setup_all_tx_resources(adapter); 3874 err = ixgbe_setup_all_tx_resources(adapter);
3508 if (err) 3875 if (err)
@@ -3515,8 +3882,6 @@ static int ixgbe_open(struct net_device *netdev)
3515 3882
3516 ixgbe_configure(adapter); 3883 ixgbe_configure(adapter);
3517 3884
3518 ixgbe_napi_add_all(adapter);
3519
3520 err = ixgbe_request_irq(adapter); 3885 err = ixgbe_request_irq(adapter);
3521 if (err) 3886 if (err)
3522 goto err_req_irq; 3887 goto err_req_irq;
@@ -3568,55 +3933,6 @@ static int ixgbe_close(struct net_device *netdev)
3568 return 0; 3933 return 0;
3569} 3934}
3570 3935
3571/**
3572 * ixgbe_napi_add_all - prep napi structs for use
3573 * @adapter: private struct
3574 *
3575 * helper function to napi_add each possible q_vector->napi
3576 */
3577void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3578{
3579 int q_idx, q_vectors;
3580 struct net_device *netdev = adapter->netdev;
3581 int (*poll)(struct napi_struct *, int);
3582
3583 /* check if we already have our netdev->napi_list populated */
3584 if (&netdev->napi_list != netdev->napi_list.next)
3585 return;
3586
3587 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3588 poll = &ixgbe_clean_rxonly;
3589 /* Only enable as many vectors as we have rx queues. */
3590 q_vectors = adapter->num_rx_queues;
3591 } else {
3592 poll = &ixgbe_poll;
3593 /* only one q_vector for legacy modes */
3594 q_vectors = 1;
3595 }
3596
3597 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3598 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3599 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3600 }
3601}
3602
3603void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
3604{
3605 int q_idx;
3606 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3607
3608 /* legacy and MSI only use one vector */
3609 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3610 q_vectors = 1;
3611
3612 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3613 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3614 if (!q_vector->rxr_count)
3615 continue;
3616 netif_napi_del(&q_vector->napi);
3617 }
3618}
3619
3620#ifdef CONFIG_PM 3936#ifdef CONFIG_PM
3621static int ixgbe_resume(struct pci_dev *pdev) 3937static int ixgbe_resume(struct pci_dev *pdev)
3622{ 3938{
@@ -3626,7 +3942,8 @@ static int ixgbe_resume(struct pci_dev *pdev)
3626 3942
3627 pci_set_power_state(pdev, PCI_D0); 3943 pci_set_power_state(pdev, PCI_D0);
3628 pci_restore_state(pdev); 3944 pci_restore_state(pdev);
3629 err = pci_enable_device(pdev); 3945
3946 err = pci_enable_device_mem(pdev);
3630 if (err) { 3947 if (err) {
3631 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " 3948 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3632 "suspend\n"); 3949 "suspend\n");
@@ -3634,8 +3951,7 @@ static int ixgbe_resume(struct pci_dev *pdev)
3634 } 3951 }
3635 pci_set_master(pdev); 3952 pci_set_master(pdev);
3636 3953
3637 pci_enable_wake(pdev, PCI_D3hot, 0); 3954 pci_wake_from_d3(pdev, false);
3638 pci_enable_wake(pdev, PCI_D3cold, 0);
3639 3955
3640 err = ixgbe_init_interrupt_scheme(adapter); 3956 err = ixgbe_init_interrupt_scheme(adapter);
3641 if (err) { 3957 if (err) {
@@ -3679,11 +3995,7 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
3679 ixgbe_free_all_tx_resources(adapter); 3995 ixgbe_free_all_tx_resources(adapter);
3680 ixgbe_free_all_rx_resources(adapter); 3996 ixgbe_free_all_rx_resources(adapter);
3681 } 3997 }
3682 ixgbe_reset_interrupt_capability(adapter); 3998 ixgbe_clear_interrupt_scheme(adapter);
3683 ixgbe_napi_del_all(adapter);
3684 INIT_LIST_HEAD(&netdev->napi_list);
3685 kfree(adapter->tx_ring);
3686 kfree(adapter->rx_ring);
3687 3999
3688#ifdef CONFIG_PM 4000#ifdef CONFIG_PM
3689 retval = pci_save_state(pdev); 4001 retval = pci_save_state(pdev);
@@ -3711,13 +4023,10 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
3711 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 4023 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
3712 } 4024 }
3713 4025
3714 if (wufc && hw->mac.type == ixgbe_mac_82599EB) { 4026 if (wufc && hw->mac.type == ixgbe_mac_82599EB)
3715 pci_enable_wake(pdev, PCI_D3hot, 1); 4027 pci_wake_from_d3(pdev, true);
3716 pci_enable_wake(pdev, PCI_D3cold, 1); 4028 else
3717 } else { 4029 pci_wake_from_d3(pdev, false);
3718 pci_enable_wake(pdev, PCI_D3hot, 0);
3719 pci_enable_wake(pdev, PCI_D3cold, 0);
3720 }
3721 4030
3722 *enable_wake = !!wufc; 4031 *enable_wake = !!wufc;
3723 4032
@@ -3772,9 +4081,13 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3772 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot; 4081 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3773 4082
3774 if (hw->mac.type == ixgbe_mac_82599EB) { 4083 if (hw->mac.type == ixgbe_mac_82599EB) {
4084 u64 rsc_count = 0;
3775 for (i = 0; i < 16; i++) 4085 for (i = 0; i < 16; i++)
3776 adapter->hw_rx_no_dma_resources += 4086 adapter->hw_rx_no_dma_resources +=
3777 IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); 4087 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
4088 for (i = 0; i < adapter->num_rx_queues; i++)
4089 rsc_count += adapter->rx_ring[i].rsc_count;
4090 adapter->rsc_count = rsc_count;
3778 } 4091 }
3779 4092
3780 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 4093 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
@@ -3821,6 +4134,14 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3821 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */ 4134 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
3822 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); 4135 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
3823 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); 4136 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
4137#ifdef IXGBE_FCOE
4138 adapter->stats.fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
4139 adapter->stats.fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
4140 adapter->stats.fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
4141 adapter->stats.fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
4142 adapter->stats.fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
4143 adapter->stats.fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
4144#endif /* IXGBE_FCOE */
3824 } else { 4145 } else {
3825 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); 4146 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3826 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); 4147 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
@@ -3896,7 +4217,7 @@ static void ixgbe_watchdog(unsigned long data)
3896 int i; 4217 int i;
3897 4218
3898 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) 4219 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++)
3899 eics |= (1 << i); 4220 eics |= ((u64)1 << i);
3900 4221
3901 /* Cause software interrupt to ensure rx rings are cleaned */ 4222 /* Cause software interrupt to ensure rx rings are cleaned */
3902 switch (hw->mac.type) { 4223 switch (hw->mac.type) {
@@ -3916,16 +4237,9 @@ static void ixgbe_watchdog(unsigned long data)
3916 break; 4237 break;
3917 case ixgbe_mac_82599EB: 4238 case ixgbe_mac_82599EB:
3918 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 4239 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3919 /* 4240 IXGBE_WRITE_REG(hw, IXGBE_EICS_EX(0),
3920 * EICS(0..15) first 0-15 q vectors 4241 (u32)(eics & 0xFFFFFFFF));
3921 * EICS[1] (16..31) q vectors 16-31
3922 * EICS[2] (0..31) q vectors 32-63
3923 */
3924 IXGBE_WRITE_REG(hw, IXGBE_EICS,
3925 (u32)(eics & 0xFFFF));
3926 IXGBE_WRITE_REG(hw, IXGBE_EICS_EX(1), 4242 IXGBE_WRITE_REG(hw, IXGBE_EICS_EX(1),
3927 (u32)(eics & 0xFFFF0000));
3928 IXGBE_WRITE_REG(hw, IXGBE_EICS_EX(2),
3929 (u32)(eics >> 32)); 4243 (u32)(eics >> 32));
3930 } else { 4244 } else {
3931 /* 4245 /*
@@ -4011,16 +4325,32 @@ static void ixgbe_watchdog_task(struct work_struct *work)
4011 struct ixgbe_hw *hw = &adapter->hw; 4325 struct ixgbe_hw *hw = &adapter->hw;
4012 u32 link_speed = adapter->link_speed; 4326 u32 link_speed = adapter->link_speed;
4013 bool link_up = adapter->link_up; 4327 bool link_up = adapter->link_up;
4328 int i;
4329 struct ixgbe_ring *tx_ring;
4330 int some_tx_pending = 0;
4014 4331
4015 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK; 4332 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
4016 4333
4017 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) { 4334 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
4018 hw->mac.ops.check_link(hw, &link_speed, &link_up, false); 4335 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
4336 if (link_up) {
4337#ifdef CONFIG_DCB
4338 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
4339 for (i = 0; i < MAX_TRAFFIC_CLASS; i++)
4340 hw->mac.ops.setup_fc(hw, i);
4341 } else {
4342 hw->mac.ops.setup_fc(hw, 0);
4343 }
4344#else
4345 hw->mac.ops.setup_fc(hw, 0);
4346#endif
4347 }
4348
4019 if (link_up || 4349 if (link_up ||
4020 time_after(jiffies, (adapter->link_check_timeout + 4350 time_after(jiffies, (adapter->link_check_timeout +
4021 IXGBE_TRY_LINK_TIMEOUT))) { 4351 IXGBE_TRY_LINK_TIMEOUT))) {
4022 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
4023 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE; 4352 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4353 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
4024 } 4354 }
4025 adapter->link_up = link_up; 4355 adapter->link_up = link_up;
4026 adapter->link_speed = link_speed; 4356 adapter->link_speed = link_speed;
@@ -4068,6 +4398,25 @@ static void ixgbe_watchdog_task(struct work_struct *work)
4068 } 4398 }
4069 } 4399 }
4070 4400
4401 if (!netif_carrier_ok(netdev)) {
4402 for (i = 0; i < adapter->num_tx_queues; i++) {
4403 tx_ring = &adapter->tx_ring[i];
4404 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
4405 some_tx_pending = 1;
4406 break;
4407 }
4408 }
4409
4410 if (some_tx_pending) {
4411 /* We've lost link, so the controller stops DMA,
4412 * but we've got queued Tx work that's never going
4413 * to get done, so reset controller to flush Tx.
4414 * (Do the reset outside of interrupt context).
4415 */
4416 schedule_work(&adapter->reset_task);
4417 }
4418 }
4419
4071 ixgbe_update_stats(adapter); 4420 ixgbe_update_stats(adapter);
4072 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK; 4421 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
4073} 4422}
@@ -4196,12 +4545,18 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
4196 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 4545 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4197 type_tucmd_mlhl |= 4546 type_tucmd_mlhl |=
4198 IXGBE_ADVTXD_TUCMD_L4T_TCP; 4547 IXGBE_ADVTXD_TUCMD_L4T_TCP;
4548 else if (ip_hdr(skb)->protocol == IPPROTO_SCTP)
4549 type_tucmd_mlhl |=
4550 IXGBE_ADVTXD_TUCMD_L4T_SCTP;
4199 break; 4551 break;
4200 case cpu_to_be16(ETH_P_IPV6): 4552 case cpu_to_be16(ETH_P_IPV6):
4201 /* XXX what about other V6 headers?? */ 4553 /* XXX what about other V6 headers?? */
4202 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 4554 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4203 type_tucmd_mlhl |= 4555 type_tucmd_mlhl |=
4204 IXGBE_ADVTXD_TUCMD_L4T_TCP; 4556 IXGBE_ADVTXD_TUCMD_L4T_TCP;
4557 else if (ipv6_hdr(skb)->nexthdr == IPPROTO_SCTP)
4558 type_tucmd_mlhl |=
4559 IXGBE_ADVTXD_TUCMD_L4T_SCTP;
4205 break; 4560 break;
4206 default: 4561 default:
4207 if (unlikely(net_ratelimit())) { 4562 if (unlikely(net_ratelimit())) {
@@ -4234,10 +4589,12 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
4234 4589
4235static int ixgbe_tx_map(struct ixgbe_adapter *adapter, 4590static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
4236 struct ixgbe_ring *tx_ring, 4591 struct ixgbe_ring *tx_ring,
4237 struct sk_buff *skb, unsigned int first) 4592 struct sk_buff *skb, u32 tx_flags,
4593 unsigned int first)
4238{ 4594{
4239 struct ixgbe_tx_buffer *tx_buffer_info; 4595 struct ixgbe_tx_buffer *tx_buffer_info;
4240 unsigned int len = skb_headlen(skb); 4596 unsigned int len;
4597 unsigned int total = skb->len;
4241 unsigned int offset = 0, size, count = 0, i; 4598 unsigned int offset = 0, size, count = 0, i;
4242 unsigned int nr_frags = skb_shinfo(skb)->nr_frags; 4599 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
4243 unsigned int f; 4600 unsigned int f;
@@ -4252,6 +4609,11 @@ static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
4252 4609
4253 map = skb_shinfo(skb)->dma_maps; 4610 map = skb_shinfo(skb)->dma_maps;
4254 4611
4612 if (tx_flags & IXGBE_TX_FLAGS_FCOE)
4613 /* excluding fcoe_crc_eof for FCoE */
4614 total -= sizeof(struct fcoe_crc_eof);
4615
4616 len = min(skb_headlen(skb), total);
4255 while (len) { 4617 while (len) {
4256 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 4618 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4257 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD); 4619 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
@@ -4262,6 +4624,7 @@ static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
4262 tx_buffer_info->next_to_watch = i; 4624 tx_buffer_info->next_to_watch = i;
4263 4625
4264 len -= size; 4626 len -= size;
4627 total -= size;
4265 offset += size; 4628 offset += size;
4266 count++; 4629 count++;
4267 4630
@@ -4276,7 +4639,7 @@ static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
4276 struct skb_frag_struct *frag; 4639 struct skb_frag_struct *frag;
4277 4640
4278 frag = &skb_shinfo(skb)->frags[f]; 4641 frag = &skb_shinfo(skb)->frags[f];
4279 len = frag->size; 4642 len = min((unsigned int)frag->size, total);
4280 offset = 0; 4643 offset = 0;
4281 4644
4282 while (len) { 4645 while (len) {
@@ -4293,9 +4656,12 @@ static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
4293 tx_buffer_info->next_to_watch = i; 4656 tx_buffer_info->next_to_watch = i;
4294 4657
4295 len -= size; 4658 len -= size;
4659 total -= size;
4296 offset += size; 4660 offset += size;
4297 count++; 4661 count++;
4298 } 4662 }
4663 if (total == 0)
4664 break;
4299 } 4665 }
4300 4666
4301 tx_ring->tx_buffer_info[i].skb = skb; 4667 tx_ring->tx_buffer_info[i].skb = skb;
@@ -4337,6 +4703,13 @@ static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
4337 olinfo_status |= IXGBE_TXD_POPTS_TXSM << 4703 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
4338 IXGBE_ADVTXD_POPTS_SHIFT; 4704 IXGBE_ADVTXD_POPTS_SHIFT;
4339 4705
4706 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
4707 olinfo_status |= IXGBE_ADVTXD_CC;
4708 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
4709 if (tx_flags & IXGBE_TX_FLAGS_FSO)
4710 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
4711 }
4712
4340 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT); 4713 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
4341 4714
4342 i = tx_ring->next_to_use; 4715 i = tx_ring->next_to_use;
@@ -4433,10 +4806,16 @@ static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
4433 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT; 4806 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
4434 tx_flags |= IXGBE_TX_FLAGS_VLAN; 4807 tx_flags |= IXGBE_TX_FLAGS_VLAN;
4435 } 4808 }
4436 /* three things can cause us to need a context descriptor */ 4809
4810 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4811 (skb->protocol == htons(ETH_P_FCOE)))
4812 tx_flags |= IXGBE_TX_FLAGS_FCOE;
4813
4814 /* four things can cause us to need a context descriptor */
4437 if (skb_is_gso(skb) || 4815 if (skb_is_gso(skb) ||
4438 (skb->ip_summed == CHECKSUM_PARTIAL) || 4816 (skb->ip_summed == CHECKSUM_PARTIAL) ||
4439 (tx_flags & IXGBE_TX_FLAGS_VLAN)) 4817 (tx_flags & IXGBE_TX_FLAGS_VLAN) ||
4818 (tx_flags & IXGBE_TX_FLAGS_FCOE))
4440 count++; 4819 count++;
4441 4820
4442 count += TXD_USE_COUNT(skb_headlen(skb)); 4821 count += TXD_USE_COUNT(skb_headlen(skb));
@@ -4448,27 +4827,38 @@ static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
4448 return NETDEV_TX_BUSY; 4827 return NETDEV_TX_BUSY;
4449 } 4828 }
4450 4829
4451 if (skb->protocol == htons(ETH_P_IP))
4452 tx_flags |= IXGBE_TX_FLAGS_IPV4;
4453 first = tx_ring->next_to_use; 4830 first = tx_ring->next_to_use;
4454 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len); 4831 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
4455 if (tso < 0) { 4832#ifdef IXGBE_FCOE
4456 dev_kfree_skb_any(skb); 4833 /* setup tx offload for FCoE */
4457 return NETDEV_TX_OK; 4834 tso = ixgbe_fso(adapter, tx_ring, skb, tx_flags, &hdr_len);
4458 } 4835 if (tso < 0) {
4459 4836 dev_kfree_skb_any(skb);
4460 if (tso) 4837 return NETDEV_TX_OK;
4461 tx_flags |= IXGBE_TX_FLAGS_TSO; 4838 }
4462 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) && 4839 if (tso)
4463 (skb->ip_summed == CHECKSUM_PARTIAL)) 4840 tx_flags |= IXGBE_TX_FLAGS_FSO;
4464 tx_flags |= IXGBE_TX_FLAGS_CSUM; 4841#endif /* IXGBE_FCOE */
4842 } else {
4843 if (skb->protocol == htons(ETH_P_IP))
4844 tx_flags |= IXGBE_TX_FLAGS_IPV4;
4845 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
4846 if (tso < 0) {
4847 dev_kfree_skb_any(skb);
4848 return NETDEV_TX_OK;
4849 }
4465 4850
4466 count = ixgbe_tx_map(adapter, tx_ring, skb, first); 4851 if (tso)
4852 tx_flags |= IXGBE_TX_FLAGS_TSO;
4853 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
4854 (skb->ip_summed == CHECKSUM_PARTIAL))
4855 tx_flags |= IXGBE_TX_FLAGS_CSUM;
4856 }
4467 4857
4858 count = ixgbe_tx_map(adapter, tx_ring, skb, tx_flags, first);
4468 if (count) { 4859 if (count) {
4469 ixgbe_tx_queue(adapter, tx_ring, tx_flags, count, skb->len, 4860 ixgbe_tx_queue(adapter, tx_ring, tx_flags, count, skb->len,
4470 hdr_len); 4861 hdr_len);
4471 netdev->trans_start = jiffies;
4472 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED); 4862 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
4473 4863
4474 } else { 4864 } else {
@@ -4519,6 +4909,82 @@ static int ixgbe_set_mac(struct net_device *netdev, void *p)
4519 return 0; 4909 return 0;
4520} 4910}
4521 4911
4912static int
4913ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
4914{
4915 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4916 struct ixgbe_hw *hw = &adapter->hw;
4917 u16 value;
4918 int rc;
4919
4920 if (prtad != hw->phy.mdio.prtad)
4921 return -EINVAL;
4922 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
4923 if (!rc)
4924 rc = value;
4925 return rc;
4926}
4927
4928static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
4929 u16 addr, u16 value)
4930{
4931 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4932 struct ixgbe_hw *hw = &adapter->hw;
4933
4934 if (prtad != hw->phy.mdio.prtad)
4935 return -EINVAL;
4936 return hw->phy.ops.write_reg(hw, addr, devad, value);
4937}
4938
4939static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
4940{
4941 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4942
4943 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
4944}
4945
4946/**
4947 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
4948 * netdev->dev_addr_list
4949 * @netdev: network interface device structure
4950 *
4951 * Returns non-zero on failure
4952 **/
4953static int ixgbe_add_sanmac_netdev(struct net_device *dev)
4954{
4955 int err = 0;
4956 struct ixgbe_adapter *adapter = netdev_priv(dev);
4957 struct ixgbe_mac_info *mac = &adapter->hw.mac;
4958
4959 if (is_valid_ether_addr(mac->san_addr)) {
4960 rtnl_lock();
4961 err = dev_addr_add(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
4962 rtnl_unlock();
4963 }
4964 return err;
4965}
4966
4967/**
4968 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
4969 * netdev->dev_addr_list
4970 * @netdev: network interface device structure
4971 *
4972 * Returns non-zero on failure
4973 **/
4974static int ixgbe_del_sanmac_netdev(struct net_device *dev)
4975{
4976 int err = 0;
4977 struct ixgbe_adapter *adapter = netdev_priv(dev);
4978 struct ixgbe_mac_info *mac = &adapter->hw.mac;
4979
4980 if (is_valid_ether_addr(mac->san_addr)) {
4981 rtnl_lock();
4982 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
4983 rtnl_unlock();
4984 }
4985 return err;
4986}
4987
4522#ifdef CONFIG_NET_POLL_CONTROLLER 4988#ifdef CONFIG_NET_POLL_CONTROLLER
4523/* 4989/*
4524 * Polling 'interrupt' - used by things like netconsole to send skbs 4990 * Polling 'interrupt' - used by things like netconsole to send skbs
@@ -4552,9 +5018,14 @@ static const struct net_device_ops ixgbe_netdev_ops = {
4552 .ndo_vlan_rx_register = ixgbe_vlan_rx_register, 5018 .ndo_vlan_rx_register = ixgbe_vlan_rx_register,
4553 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid, 5019 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
4554 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid, 5020 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
5021 .ndo_do_ioctl = ixgbe_ioctl,
4555#ifdef CONFIG_NET_POLL_CONTROLLER 5022#ifdef CONFIG_NET_POLL_CONTROLLER
4556 .ndo_poll_controller = ixgbe_netpoll, 5023 .ndo_poll_controller = ixgbe_netpoll,
4557#endif 5024#endif
5025#ifdef IXGBE_FCOE
5026 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
5027 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
5028#endif /* IXGBE_FCOE */
4558}; 5029};
4559 5030
4560/** 5031/**
@@ -4577,9 +5048,12 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
4577 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data]; 5048 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
4578 static int cards_found; 5049 static int cards_found;
4579 int i, err, pci_using_dac; 5050 int i, err, pci_using_dac;
5051#ifdef IXGBE_FCOE
5052 u16 device_caps;
5053#endif
4580 u32 part_num, eec; 5054 u32 part_num, eec;
4581 5055
4582 err = pci_enable_device(pdev); 5056 err = pci_enable_device_mem(pdev);
4583 if (err) 5057 if (err)
4584 return err; 5058 return err;
4585 5059
@@ -4599,9 +5073,11 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
4599 pci_using_dac = 0; 5073 pci_using_dac = 0;
4600 } 5074 }
4601 5075
4602 err = pci_request_regions(pdev, ixgbe_driver_name); 5076 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
5077 IORESOURCE_MEM), ixgbe_driver_name);
4603 if (err) { 5078 if (err) {
4604 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err); 5079 dev_err(&pdev->dev,
5080 "pci_request_selected_regions failed 0x%x\n", err);
4605 goto err_pci_reg; 5081 goto err_pci_reg;
4606 } 5082 }
4607 5083
@@ -4665,6 +5141,13 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
4665 /* PHY */ 5141 /* PHY */
4666 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops)); 5142 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
4667 hw->phy.sfp_type = ixgbe_sfp_type_unknown; 5143 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
5144 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
5145 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
5146 hw->phy.mdio.mmds = 0;
5147 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
5148 hw->phy.mdio.dev = netdev;
5149 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
5150 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
4668 5151
4669 /* set up this timer and work struct before calling get_invariants 5152 /* set up this timer and work struct before calling get_invariants
4670 * which might start the timer 5153 * which might start the timer
@@ -4682,29 +5165,42 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
4682 INIT_WORK(&adapter->sfp_config_module_task, 5165 INIT_WORK(&adapter->sfp_config_module_task,
4683 ixgbe_sfp_config_module_task); 5166 ixgbe_sfp_config_module_task);
4684 5167
4685 err = ii->get_invariants(hw); 5168 ii->get_invariants(hw);
4686 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
4687 /* start a kernel thread to watch for a module to arrive */
4688 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4689 mod_timer(&adapter->sfp_timer,
4690 round_jiffies(jiffies + (2 * HZ)));
4691 err = 0;
4692 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4693 DPRINTK(PROBE, ERR, "failed to load because an "
4694 "unsupported SFP+ module type was detected.\n");
4695 goto err_hw_init;
4696 } else if (err) {
4697 goto err_hw_init;
4698 }
4699 5169
4700 /* setup the private structure */ 5170 /* setup the private structure */
4701 err = ixgbe_sw_init(adapter); 5171 err = ixgbe_sw_init(adapter);
4702 if (err) 5172 if (err)
4703 goto err_sw_init; 5173 goto err_sw_init;
4704 5174
5175 /*
5176 * If there is a fan on this device and it has failed log the
5177 * failure.
5178 */
5179 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5180 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5181 if (esdp & IXGBE_ESDP_SDP1)
5182 DPRINTK(PROBE, CRIT,
5183 "Fan has stopped, replace the adapter\n");
5184 }
5185
4705 /* reset_hw fills in the perm_addr as well */ 5186 /* reset_hw fills in the perm_addr as well */
4706 err = hw->mac.ops.reset_hw(hw); 5187 err = hw->mac.ops.reset_hw(hw);
4707 if (err) { 5188 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
5189 hw->mac.type == ixgbe_mac_82598EB) {
5190 /*
5191 * Start a kernel thread to watch for a module to arrive.
5192 * Only do this for 82598, since 82599 will generate
5193 * interrupts on module arrival.
5194 */
5195 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
5196 mod_timer(&adapter->sfp_timer,
5197 round_jiffies(jiffies + (2 * HZ)));
5198 err = 0;
5199 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
5200 dev_err(&adapter->pdev->dev, "failed to load because an "
5201 "unsupported SFP+ module type was detected.\n");
5202 goto err_sw_init;
5203 } else if (err) {
4708 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err); 5204 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
4709 goto err_sw_init; 5205 goto err_sw_init;
4710 } 5206 }
@@ -4720,6 +5216,9 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
4720 netdev->features |= NETIF_F_TSO6; 5216 netdev->features |= NETIF_F_TSO6;
4721 netdev->features |= NETIF_F_GRO; 5217 netdev->features |= NETIF_F_GRO;
4722 5218
5219 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
5220 netdev->features |= NETIF_F_SCTP_CSUM;
5221
4723 netdev->vlan_features |= NETIF_F_TSO; 5222 netdev->vlan_features |= NETIF_F_TSO;
4724 netdev->vlan_features |= NETIF_F_TSO6; 5223 netdev->vlan_features |= NETIF_F_TSO6;
4725 netdev->vlan_features |= NETIF_F_IP_CSUM; 5224 netdev->vlan_features |= NETIF_F_IP_CSUM;
@@ -4732,9 +5231,26 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
4732 netdev->dcbnl_ops = &dcbnl_ops; 5231 netdev->dcbnl_ops = &dcbnl_ops;
4733#endif 5232#endif
4734 5233
5234#ifdef IXGBE_FCOE
5235 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
5236 if (hw->mac.ops.get_device_caps) {
5237 hw->mac.ops.get_device_caps(hw, &device_caps);
5238 if (!(device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)) {
5239 netdev->features |= NETIF_F_FCOE_CRC;
5240 netdev->features |= NETIF_F_FSO;
5241 netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
5242 } else {
5243 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5244 }
5245 }
5246 }
5247#endif /* IXGBE_FCOE */
4735 if (pci_using_dac) 5248 if (pci_using_dac)
4736 netdev->features |= NETIF_F_HIGHDMA; 5249 netdev->features |= NETIF_F_HIGHDMA;
4737 5250
5251 if (adapter->flags & IXGBE_FLAG_RSC_ENABLED)
5252 netdev->features |= NETIF_F_LRO;
5253
4738 /* make sure the EEPROM is good */ 5254 /* make sure the EEPROM is good */
4739 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) { 5255 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
4740 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n"); 5256 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
@@ -4774,6 +5290,9 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
4774 device_init_wakeup(&adapter->pdev->dev, true); 5290 device_init_wakeup(&adapter->pdev->dev, true);
4775 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 5291 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
4776 5292
5293 /* pick up the PCI bus settings for reporting later */
5294 hw->mac.ops.get_bus_info(hw);
5295
4777 /* print bus type/speed/width info */ 5296 /* print bus type/speed/width info */
4778 dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n", 5297 dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
4779 ((hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0Gb/s": 5298 ((hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0Gb/s":
@@ -4807,22 +5326,22 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
4807 /* reset the hardware with the new settings */ 5326 /* reset the hardware with the new settings */
4808 hw->mac.ops.start_hw(hw); 5327 hw->mac.ops.start_hw(hw);
4809 5328
4810 netif_carrier_off(netdev);
4811
4812 strcpy(netdev->name, "eth%d"); 5329 strcpy(netdev->name, "eth%d");
4813 err = register_netdev(netdev); 5330 err = register_netdev(netdev);
4814 if (err) 5331 if (err)
4815 goto err_register; 5332 goto err_register;
4816 5333
5334 /* carrier off reporting is important to ethtool even BEFORE open */
5335 netif_carrier_off(netdev);
5336
4817#ifdef CONFIG_IXGBE_DCA 5337#ifdef CONFIG_IXGBE_DCA
4818 if (dca_add_requester(&pdev->dev) == 0) { 5338 if (dca_add_requester(&pdev->dev) == 0) {
4819 adapter->flags |= IXGBE_FLAG_DCA_ENABLED; 5339 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
4820 /* always use CB2 mode, difference is masked
4821 * in the CB driver */
4822 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
4823 ixgbe_setup_dca(adapter); 5340 ixgbe_setup_dca(adapter);
4824 } 5341 }
4825#endif 5342#endif
5343 /* add san mac addr to netdev */
5344 ixgbe_add_sanmac_netdev(netdev);
4826 5345
4827 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n"); 5346 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
4828 cards_found++; 5347 cards_found++;
@@ -4830,9 +5349,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
4830 5349
4831err_register: 5350err_register:
4832 ixgbe_release_hw_control(adapter); 5351 ixgbe_release_hw_control(adapter);
4833err_hw_init: 5352 ixgbe_clear_interrupt_scheme(adapter);
4834err_sw_init: 5353err_sw_init:
4835 ixgbe_reset_interrupt_capability(adapter);
4836err_eeprom: 5354err_eeprom:
4837 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state); 5355 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4838 del_timer_sync(&adapter->sfp_timer); 5356 del_timer_sync(&adapter->sfp_timer);
@@ -4843,7 +5361,8 @@ err_eeprom:
4843err_ioremap: 5361err_ioremap:
4844 free_netdev(netdev); 5362 free_netdev(netdev);
4845err_alloc_etherdev: 5363err_alloc_etherdev:
4846 pci_release_regions(pdev); 5364 pci_release_selected_regions(pdev, pci_select_bars(pdev,
5365 IORESOURCE_MEM));
4847err_pci_reg: 5366err_pci_reg:
4848err_dma: 5367err_dma:
4849 pci_disable_device(pdev); 5368 pci_disable_device(pdev);
@@ -4887,19 +5406,27 @@ static void __devexit ixgbe_remove(struct pci_dev *pdev)
4887 } 5406 }
4888 5407
4889#endif 5408#endif
5409#ifdef IXGBE_FCOE
5410 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
5411 ixgbe_cleanup_fcoe(adapter);
5412
5413#endif /* IXGBE_FCOE */
5414
5415 /* remove the added san mac */
5416 ixgbe_del_sanmac_netdev(netdev);
5417
4890 if (netdev->reg_state == NETREG_REGISTERED) 5418 if (netdev->reg_state == NETREG_REGISTERED)
4891 unregister_netdev(netdev); 5419 unregister_netdev(netdev);
4892 5420
4893 ixgbe_reset_interrupt_capability(adapter); 5421 ixgbe_clear_interrupt_scheme(adapter);
4894 5422
4895 ixgbe_release_hw_control(adapter); 5423 ixgbe_release_hw_control(adapter);
4896 5424
4897 iounmap(adapter->hw.hw_addr); 5425 iounmap(adapter->hw.hw_addr);
4898 pci_release_regions(pdev); 5426 pci_release_selected_regions(pdev, pci_select_bars(pdev,
5427 IORESOURCE_MEM));
4899 5428
4900 DPRINTK(PROBE, INFO, "complete\n"); 5429 DPRINTK(PROBE, INFO, "complete\n");
4901 kfree(adapter->tx_ring);
4902 kfree(adapter->rx_ring);
4903 5430
4904 free_netdev(netdev); 5431 free_netdev(netdev);
4905 5432
@@ -4927,6 +5454,9 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4927 5454
4928 netif_device_detach(netdev); 5455 netif_device_detach(netdev);
4929 5456
5457 if (state == pci_channel_io_perm_failure)
5458 return PCI_ERS_RESULT_DISCONNECT;
5459
4930 if (netif_running(netdev)) 5460 if (netif_running(netdev))
4931 ixgbe_down(adapter); 5461 ixgbe_down(adapter);
4932 pci_disable_device(pdev); 5462 pci_disable_device(pdev);
@@ -4948,7 +5478,7 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4948 pci_ers_result_t result; 5478 pci_ers_result_t result;
4949 int err; 5479 int err;
4950 5480
4951 if (pci_enable_device(pdev)) { 5481 if (pci_enable_device_mem(pdev)) {
4952 DPRINTK(PROBE, ERR, 5482 DPRINTK(PROBE, ERR,
4953 "Cannot re-enable PCI device after reset.\n"); 5483 "Cannot re-enable PCI device after reset.\n");
4954 result = PCI_ERS_RESULT_DISCONNECT; 5484 result = PCI_ERS_RESULT_DISCONNECT;
@@ -4956,8 +5486,7 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4956 pci_set_master(pdev); 5486 pci_set_master(pdev);
4957 pci_restore_state(pdev); 5487 pci_restore_state(pdev);
4958 5488
4959 pci_enable_wake(pdev, PCI_D3hot, 0); 5489 pci_wake_from_d3(pdev, false);
4960 pci_enable_wake(pdev, PCI_D3cold, 0);
4961 5490
4962 ixgbe_reset(adapter); 5491 ixgbe_reset(adapter);
4963 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); 5492 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
diff --git a/drivers/net/ixgbe/ixgbe_phy.c b/drivers/net/ixgbe/ixgbe_phy.c
index 14e9606aa3b3..e43d6248d7d4 100644
--- a/drivers/net/ixgbe/ixgbe_phy.c
+++ b/drivers/net/ixgbe/ixgbe_phy.c
@@ -44,7 +44,6 @@ static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
44static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data); 44static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
45static bool ixgbe_get_i2c_data(u32 *i2cctl); 45static bool ixgbe_get_i2c_data(u32 *i2cctl);
46static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw); 46static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw);
47static bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr);
48static enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id); 47static enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id);
49static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw); 48static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
50 49
@@ -61,8 +60,7 @@ s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)
61 60
62 if (hw->phy.type == ixgbe_phy_unknown) { 61 if (hw->phy.type == ixgbe_phy_unknown) {
63 for (phy_addr = 0; phy_addr < IXGBE_MAX_PHY_ADDR; phy_addr++) { 62 for (phy_addr = 0; phy_addr < IXGBE_MAX_PHY_ADDR; phy_addr++) {
64 if (ixgbe_validate_phy_addr(hw, phy_addr)) { 63 if (mdio45_probe(&hw->phy.mdio, phy_addr) == 0) {
65 hw->phy.addr = phy_addr;
66 ixgbe_get_phy_id(hw); 64 ixgbe_get_phy_id(hw);
67 hw->phy.type = 65 hw->phy.type =
68 ixgbe_get_phy_type_from_id(hw->phy.id); 66 ixgbe_get_phy_type_from_id(hw->phy.id);
@@ -78,26 +76,6 @@ s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)
78} 76}
79 77
80/** 78/**
81 * ixgbe_validate_phy_addr - Determines phy address is valid
82 * @hw: pointer to hardware structure
83 *
84 **/
85static bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr)
86{
87 u16 phy_id = 0;
88 bool valid = false;
89
90 hw->phy.addr = phy_addr;
91 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,
92 IXGBE_MDIO_PMA_PMD_DEV_TYPE, &phy_id);
93
94 if (phy_id != 0xFFFF && phy_id != 0x0)
95 valid = true;
96
97 return valid;
98}
99
100/**
101 * ixgbe_get_phy_id - Get the phy type 79 * ixgbe_get_phy_id - Get the phy type
102 * @hw: pointer to hardware structure 80 * @hw: pointer to hardware structure
103 * 81 *
@@ -108,14 +86,12 @@ static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw)
108 u16 phy_id_high = 0; 86 u16 phy_id_high = 0;
109 u16 phy_id_low = 0; 87 u16 phy_id_low = 0;
110 88
111 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, 89 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD,
112 IXGBE_MDIO_PMA_PMD_DEV_TYPE,
113 &phy_id_high); 90 &phy_id_high);
114 91
115 if (status == 0) { 92 if (status == 0) {
116 hw->phy.id = (u32)(phy_id_high << 16); 93 hw->phy.id = (u32)(phy_id_high << 16);
117 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW, 94 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD,
118 IXGBE_MDIO_PMA_PMD_DEV_TYPE,
119 &phy_id_low); 95 &phy_id_low);
120 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK); 96 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK);
121 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK); 97 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK);
@@ -160,9 +136,8 @@ s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw)
160 * Perform soft PHY reset to the PHY_XS. 136 * Perform soft PHY reset to the PHY_XS.
161 * This will cause a soft reset to the PHY 137 * This will cause a soft reset to the PHY
162 */ 138 */
163 return hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, 139 return hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS,
164 IXGBE_MDIO_PHY_XS_DEV_TYPE, 140 MDIO_CTRL1_RESET);
165 IXGBE_MDIO_PHY_XS_RESET);
166} 141}
167 142
168/** 143/**
@@ -192,7 +167,7 @@ s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
192 /* Setup and write the address cycle command */ 167 /* Setup and write the address cycle command */
193 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | 168 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
194 (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) | 169 (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) |
195 (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | 170 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) |
196 (IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND)); 171 (IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND));
197 172
198 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); 173 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
@@ -223,7 +198,8 @@ s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
223 */ 198 */
224 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | 199 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
225 (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) | 200 (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) |
226 (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | 201 (hw->phy.mdio.prtad <<
202 IXGBE_MSCA_PHY_ADDR_SHIFT) |
227 (IXGBE_MSCA_READ | IXGBE_MSCA_MDI_COMMAND)); 203 (IXGBE_MSCA_READ | IXGBE_MSCA_MDI_COMMAND));
228 204
229 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); 205 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
@@ -292,7 +268,7 @@ s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
292 /* Setup and write the address cycle command */ 268 /* Setup and write the address cycle command */
293 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | 269 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
294 (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) | 270 (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) |
295 (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | 271 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) |
296 (IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND)); 272 (IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND));
297 273
298 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); 274 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
@@ -323,7 +299,8 @@ s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
323 */ 299 */
324 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | 300 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) |
325 (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) | 301 (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) |
326 (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | 302 (hw->phy.mdio.prtad <<
303 IXGBE_MSCA_PHY_ADDR_SHIFT) |
327 (IXGBE_MSCA_WRITE | IXGBE_MSCA_MDI_COMMAND)); 304 (IXGBE_MSCA_WRITE | IXGBE_MSCA_MDI_COMMAND));
328 305
329 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); 306 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);
@@ -365,7 +342,7 @@ s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)
365 s32 status = IXGBE_NOT_IMPLEMENTED; 342 s32 status = IXGBE_NOT_IMPLEMENTED;
366 u32 time_out; 343 u32 time_out;
367 u32 max_time_out = 10; 344 u32 max_time_out = 10;
368 u16 autoneg_reg = IXGBE_MII_AUTONEG_REG; 345 u16 autoneg_reg;
369 346
370 /* 347 /*
371 * Set advertisement settings in PHY based on autoneg_advertised 348 * Set advertisement settings in PHY based on autoneg_advertised
@@ -373,36 +350,31 @@ s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)
373 * tnx devices cannot be "forced" to a autoneg 10G and fail. But can 350 * tnx devices cannot be "forced" to a autoneg 10G and fail. But can
374 * for a 1G. 351 * for a 1G.
375 */ 352 */
376 hw->phy.ops.read_reg(hw, IXGBE_MII_SPEED_SELECTION_REG, 353 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, MDIO_MMD_AN, &autoneg_reg);
377 IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &autoneg_reg);
378 354
379 if (hw->phy.autoneg_advertised == IXGBE_LINK_SPEED_1GB_FULL) 355 if (hw->phy.autoneg_advertised == IXGBE_LINK_SPEED_1GB_FULL)
380 autoneg_reg &= 0xEFFF; /* 0 in bit 12 is 1G operation */ 356 autoneg_reg &= ~MDIO_AN_10GBT_CTRL_ADV10G;
381 else 357 else
382 autoneg_reg |= 0x1000; /* 1 in bit 12 is 10G/1G operation */ 358 autoneg_reg |= MDIO_AN_10GBT_CTRL_ADV10G;
383 359
384 hw->phy.ops.write_reg(hw, IXGBE_MII_SPEED_SELECTION_REG, 360 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, MDIO_MMD_AN, autoneg_reg);
385 IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_reg);
386 361
387 /* Restart PHY autonegotiation and wait for completion */ 362 /* Restart PHY autonegotiation and wait for completion */
388 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL, 363 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_AN, &autoneg_reg);
389 IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &autoneg_reg);
390 364
391 autoneg_reg |= IXGBE_MII_RESTART; 365 autoneg_reg |= MDIO_AN_CTRL1_RESTART;
392 366
393 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL, 367 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_AN, autoneg_reg);
394 IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_reg);
395 368
396 /* Wait for autonegotiation to finish */ 369 /* Wait for autonegotiation to finish */
397 for (time_out = 0; time_out < max_time_out; time_out++) { 370 for (time_out = 0; time_out < max_time_out; time_out++) {
398 udelay(10); 371 udelay(10);
399 /* Restart PHY autonegotiation and wait for completion */ 372 /* Restart PHY autonegotiation and wait for completion */
400 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS, 373 status = hw->phy.ops.read_reg(hw, MDIO_STAT1, MDIO_MMD_AN,
401 IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
402 &autoneg_reg); 374 &autoneg_reg);
403 375
404 autoneg_reg &= IXGBE_MII_AUTONEG_COMPLETE; 376 autoneg_reg &= MDIO_AN_STAT1_COMPLETE;
405 if (autoneg_reg == IXGBE_MII_AUTONEG_COMPLETE) { 377 if (autoneg_reg == MDIO_AN_STAT1_COMPLETE) {
406 status = 0; 378 status = 0;
407 break; 379 break;
408 } 380 }
@@ -457,23 +429,21 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
457 s32 ret_val = 0; 429 s32 ret_val = 0;
458 u32 i; 430 u32 i;
459 431
460 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, 432 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, &phy_data);
461 IXGBE_MDIO_PHY_XS_DEV_TYPE, &phy_data);
462 433
463 /* reset the PHY and poll for completion */ 434 /* reset the PHY and poll for completion */
464 hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, 435 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS,
465 IXGBE_MDIO_PHY_XS_DEV_TYPE, 436 (phy_data | MDIO_CTRL1_RESET));
466 (phy_data | IXGBE_MDIO_PHY_XS_RESET));
467 437
468 for (i = 0; i < 100; i++) { 438 for (i = 0; i < 100; i++) {
469 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, 439 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS,
470 IXGBE_MDIO_PHY_XS_DEV_TYPE, &phy_data); 440 &phy_data);
471 if ((phy_data & IXGBE_MDIO_PHY_XS_RESET) == 0) 441 if ((phy_data & MDIO_CTRL1_RESET) == 0)
472 break; 442 break;
473 msleep(10); 443 msleep(10);
474 } 444 }
475 445
476 if ((phy_data & IXGBE_MDIO_PHY_XS_RESET) != 0) { 446 if ((phy_data & MDIO_CTRL1_RESET) != 0) {
477 hw_dbg(hw, "PHY reset did not complete.\n"); 447 hw_dbg(hw, "PHY reset did not complete.\n");
478 ret_val = IXGBE_ERR_PHY; 448 ret_val = IXGBE_ERR_PHY;
479 goto out; 449 goto out;
@@ -509,7 +479,7 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
509 for (i = 0; i < edata; i++) { 479 for (i = 0; i < edata; i++) {
510 hw->eeprom.ops.read(hw, data_offset, &eword); 480 hw->eeprom.ops.read(hw, data_offset, &eword);
511 hw->phy.ops.write_reg(hw, phy_offset, 481 hw->phy.ops.write_reg(hw, phy_offset,
512 IXGBE_TWINAX_DEV, eword); 482 MDIO_MMD_PMAPMD, eword);
513 hw_dbg(hw, "Wrote %4.4x to %4.4x\n", eword, 483 hw_dbg(hw, "Wrote %4.4x to %4.4x\n", eword,
514 phy_offset); 484 phy_offset);
515 data_offset++; 485 data_offset++;
@@ -552,18 +522,30 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
552{ 522{
553 s32 status = IXGBE_ERR_PHY_ADDR_INVALID; 523 s32 status = IXGBE_ERR_PHY_ADDR_INVALID;
554 u32 vendor_oui = 0; 524 u32 vendor_oui = 0;
525 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type;
555 u8 identifier = 0; 526 u8 identifier = 0;
556 u8 comp_codes_1g = 0; 527 u8 comp_codes_1g = 0;
557 u8 comp_codes_10g = 0; 528 u8 comp_codes_10g = 0;
558 u8 oui_bytes[3] = {0, 0, 0}; 529 u8 oui_bytes[3] = {0, 0, 0};
559 u8 transmission_media = 0; 530 u8 cable_tech = 0;
560 u16 enforce_sfp = 0; 531 u16 enforce_sfp = 0;
561 532
533 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) {
534 hw->phy.sfp_type = ixgbe_sfp_type_not_present;
535 status = IXGBE_ERR_SFP_NOT_PRESENT;
536 goto out;
537 }
538
562 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER, 539 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER,
563 &identifier); 540 &identifier);
564 541
565 if (status == IXGBE_ERR_SFP_NOT_PRESENT) { 542 if (status == IXGBE_ERR_SFP_NOT_PRESENT || status == IXGBE_ERR_I2C) {
543 status = IXGBE_ERR_SFP_NOT_PRESENT;
566 hw->phy.sfp_type = ixgbe_sfp_type_not_present; 544 hw->phy.sfp_type = ixgbe_sfp_type_not_present;
545 if (hw->phy.type != ixgbe_phy_nl) {
546 hw->phy.id = 0;
547 hw->phy.type = ixgbe_phy_unknown;
548 }
567 goto out; 549 goto out;
568 } 550 }
569 551
@@ -572,8 +554,8 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
572 &comp_codes_1g); 554 &comp_codes_1g);
573 hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_10GBE_COMP_CODES, 555 hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_10GBE_COMP_CODES,
574 &comp_codes_10g); 556 &comp_codes_10g);
575 hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_TRANSMISSION_MEDIA, 557 hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_CABLE_TECHNOLOGY,
576 &transmission_media); 558 &cable_tech);
577 559
578 /* ID Module 560 /* ID Module
579 * ========= 561 * =========
@@ -586,7 +568,7 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
586 * 6 SFP_SR/LR_CORE1 - 82599-specific 568 * 6 SFP_SR/LR_CORE1 - 82599-specific
587 */ 569 */
588 if (hw->mac.type == ixgbe_mac_82598EB) { 570 if (hw->mac.type == ixgbe_mac_82598EB) {
589 if (transmission_media & IXGBE_SFF_TWIN_AX_CAPABLE) 571 if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE)
590 hw->phy.sfp_type = ixgbe_sfp_type_da_cu; 572 hw->phy.sfp_type = ixgbe_sfp_type_da_cu;
591 else if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE) 573 else if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)
592 hw->phy.sfp_type = ixgbe_sfp_type_sr; 574 hw->phy.sfp_type = ixgbe_sfp_type_sr;
@@ -595,7 +577,7 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
595 else 577 else
596 hw->phy.sfp_type = ixgbe_sfp_type_unknown; 578 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
597 } else if (hw->mac.type == ixgbe_mac_82599EB) { 579 } else if (hw->mac.type == ixgbe_mac_82599EB) {
598 if (transmission_media & IXGBE_SFF_TWIN_AX_CAPABLE) 580 if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE)
599 if (hw->bus.lan_id == 0) 581 if (hw->bus.lan_id == 0)
600 hw->phy.sfp_type = 582 hw->phy.sfp_type =
601 ixgbe_sfp_type_da_cu_core0; 583 ixgbe_sfp_type_da_cu_core0;
@@ -620,8 +602,18 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
620 hw->phy.sfp_type = ixgbe_sfp_type_unknown; 602 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
621 } 603 }
622 604
605 if (hw->phy.sfp_type != stored_sfp_type)
606 hw->phy.sfp_setup_needed = true;
607
608 /* Determine if the SFP+ PHY is dual speed or not. */
609 if (((comp_codes_1g & IXGBE_SFF_1GBASESX_CAPABLE) &&
610 (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)) ||
611 ((comp_codes_1g & IXGBE_SFF_1GBASELX_CAPABLE) &&
612 (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE)))
613 hw->phy.multispeed_fiber = true;
614
623 /* Determine PHY vendor */ 615 /* Determine PHY vendor */
624 if (hw->phy.type == ixgbe_phy_unknown) { 616 if (hw->phy.type != ixgbe_phy_nl) {
625 hw->phy.id = identifier; 617 hw->phy.id = identifier;
626 hw->phy.ops.read_i2c_eeprom(hw, 618 hw->phy.ops.read_i2c_eeprom(hw,
627 IXGBE_SFF_VENDOR_OUI_BYTE0, 619 IXGBE_SFF_VENDOR_OUI_BYTE0,
@@ -640,8 +632,7 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
640 632
641 switch (vendor_oui) { 633 switch (vendor_oui) {
642 case IXGBE_SFF_VENDOR_OUI_TYCO: 634 case IXGBE_SFF_VENDOR_OUI_TYCO:
643 if (transmission_media & 635 if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE)
644 IXGBE_SFF_TWIN_AX_CAPABLE)
645 hw->phy.type = ixgbe_phy_tw_tyco; 636 hw->phy.type = ixgbe_phy_tw_tyco;
646 break; 637 break;
647 case IXGBE_SFF_VENDOR_OUI_FTL: 638 case IXGBE_SFF_VENDOR_OUI_FTL:
@@ -654,31 +645,42 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
654 hw->phy.type = ixgbe_phy_sfp_intel; 645 hw->phy.type = ixgbe_phy_sfp_intel;
655 break; 646 break;
656 default: 647 default:
657 if (transmission_media & 648 if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE)
658 IXGBE_SFF_TWIN_AX_CAPABLE)
659 hw->phy.type = ixgbe_phy_tw_unknown; 649 hw->phy.type = ixgbe_phy_tw_unknown;
660 else 650 else
661 hw->phy.type = ixgbe_phy_sfp_unknown; 651 hw->phy.type = ixgbe_phy_sfp_unknown;
662 break; 652 break;
663 } 653 }
664 } 654 }
665 if (hw->mac.type == ixgbe_mac_82598EB || 655
666 (hw->phy.sfp_type != ixgbe_sfp_type_sr && 656 /* All passive DA cables are supported */
667 hw->phy.sfp_type != ixgbe_sfp_type_lr && 657 if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE) {
668 hw->phy.sfp_type != ixgbe_sfp_type_srlr_core0 && 658 status = 0;
669 hw->phy.sfp_type != ixgbe_sfp_type_srlr_core1)) { 659 goto out;
660 }
661
662 /* 1G SFP modules are not supported */
663 if (comp_codes_10g == 0) {
664 hw->phy.type = ixgbe_phy_sfp_unsupported;
665 status = IXGBE_ERR_SFP_NOT_SUPPORTED;
666 goto out;
667 }
668
669 /* Anything else 82598-based is supported */
670 if (hw->mac.type == ixgbe_mac_82598EB) {
670 status = 0; 671 status = 0;
671 goto out; 672 goto out;
672 } 673 }
673 674
674 hw->eeprom.ops.read(hw, IXGBE_PHY_ENFORCE_INTEL_SFP_OFFSET, 675 /* This is guaranteed to be 82599, no need to check for NULL */
675 &enforce_sfp); 676 hw->mac.ops.get_device_caps(hw, &enforce_sfp);
676 if (!(enforce_sfp & IXGBE_PHY_ALLOW_ANY_SFP)) { 677 if (!(enforce_sfp & IXGBE_DEVICE_CAPS_ALLOW_ANY_SFP)) {
677 /* Make sure we're a supported PHY type */ 678 /* Make sure we're a supported PHY type */
678 if (hw->phy.type == ixgbe_phy_sfp_intel) { 679 if (hw->phy.type == ixgbe_phy_sfp_intel) {
679 status = 0; 680 status = 0;
680 } else { 681 } else {
681 hw_dbg(hw, "SFP+ module not supported\n"); 682 hw_dbg(hw, "SFP+ module not supported\n");
683 hw->phy.type = ixgbe_phy_sfp_unsupported;
682 status = IXGBE_ERR_SFP_NOT_SUPPORTED; 684 status = IXGBE_ERR_SFP_NOT_SUPPORTED;
683 } 685 }
684 } else { 686 } else {
@@ -1279,7 +1281,7 @@ s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
1279 udelay(10); 1281 udelay(10);
1280 status = hw->phy.ops.read_reg(hw, 1282 status = hw->phy.ops.read_reg(hw,
1281 IXGBE_MDIO_VENDOR_SPECIFIC_1_STATUS, 1283 IXGBE_MDIO_VENDOR_SPECIFIC_1_STATUS,
1282 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, 1284 MDIO_MMD_VEND1,
1283 &phy_data); 1285 &phy_data);
1284 phy_link = phy_data & 1286 phy_link = phy_data &
1285 IXGBE_MDIO_VENDOR_SPECIFIC_1_LINK_STATUS; 1287 IXGBE_MDIO_VENDOR_SPECIFIC_1_LINK_STATUS;
@@ -1307,8 +1309,7 @@ s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw,
1307{ 1309{
1308 s32 status = 0; 1310 s32 status = 0;
1309 1311
1310 status = hw->phy.ops.read_reg(hw, TNX_FW_REV, 1312 status = hw->phy.ops.read_reg(hw, TNX_FW_REV, MDIO_MMD_VEND1,
1311 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,
1312 firmware_version); 1313 firmware_version);
1313 1314
1314 return status; 1315 return status;
diff --git a/drivers/net/ixgbe/ixgbe_phy.h b/drivers/net/ixgbe/ixgbe_phy.h
index cc5f1b3287e1..9b700f5bf1ed 100644
--- a/drivers/net/ixgbe/ixgbe_phy.h
+++ b/drivers/net/ixgbe/ixgbe_phy.h
@@ -39,11 +39,12 @@
39#define IXGBE_SFF_VENDOR_OUI_BYTE2 0x27 39#define IXGBE_SFF_VENDOR_OUI_BYTE2 0x27
40#define IXGBE_SFF_1GBE_COMP_CODES 0x6 40#define IXGBE_SFF_1GBE_COMP_CODES 0x6
41#define IXGBE_SFF_10GBE_COMP_CODES 0x3 41#define IXGBE_SFF_10GBE_COMP_CODES 0x3
42#define IXGBE_SFF_TRANSMISSION_MEDIA 0x9 42#define IXGBE_SFF_CABLE_TECHNOLOGY 0x8
43 43
44/* Bitmasks */ 44/* Bitmasks */
45#define IXGBE_SFF_TWIN_AX_CAPABLE 0x80 45#define IXGBE_SFF_DA_PASSIVE_CABLE 0x4
46#define IXGBE_SFF_1GBASESX_CAPABLE 0x1 46#define IXGBE_SFF_1GBASESX_CAPABLE 0x1
47#define IXGBE_SFF_1GBASELX_CAPABLE 0x2
47#define IXGBE_SFF_10GBASESR_CAPABLE 0x10 48#define IXGBE_SFF_10GBASESR_CAPABLE 0x10
48#define IXGBE_SFF_10GBASELR_CAPABLE 0x20 49#define IXGBE_SFF_10GBASELR_CAPABLE 0x20
49#define IXGBE_I2C_EEPROM_READ_MASK 0x100 50#define IXGBE_I2C_EEPROM_READ_MASK 0x100
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index 030ff0a9ea67..a8a8243d8fdb 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -29,6 +29,8 @@
29#define _IXGBE_TYPE_H_ 29#define _IXGBE_TYPE_H_
30 30
31#include <linux/types.h> 31#include <linux/types.h>
32#include <linux/mdio.h>
33#include <linux/list.h>
32 34
33/* Vendor ID */ 35/* Vendor ID */
34#define IXGBE_INTEL_VENDOR_ID 0x8086 36#define IXGBE_INTEL_VENDOR_ID 0x8086
@@ -45,9 +47,9 @@
45#define IXGBE_DEV_ID_82598_DA_DUAL_PORT 0x10F1 47#define IXGBE_DEV_ID_82598_DA_DUAL_PORT 0x10F1
46#define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM 0x10E1 48#define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM 0x10E1
47#define IXGBE_DEV_ID_82598EB_XF_LR 0x10F4 49#define IXGBE_DEV_ID_82598EB_XF_LR 0x10F4
48#define IXGBE_DEV_ID_82599 0x10D8
49#define IXGBE_DEV_ID_82599_KX4 0x10F7 50#define IXGBE_DEV_ID_82599_KX4 0x10F7
50#define IXGBE_DEV_ID_82599_SFP 0x10FB 51#define IXGBE_DEV_ID_82599_SFP 0x10FB
52#define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC
51 53
52/* General Registers */ 54/* General Registers */
53#define IXGBE_CTRL 0x00000 55#define IXGBE_CTRL 0x00000
@@ -443,6 +445,21 @@
443 445
444#define IXGBE_SECTXCTRL_STORE_FORWARD_ENABLE 0x4 446#define IXGBE_SECTXCTRL_STORE_FORWARD_ENABLE 0x4
445 447
448/* HW RSC registers */
449#define IXGBE_RSCCTL(_i) (((_i) < 64) ? (0x0102C + ((_i) * 0x40)) : \
450 (0x0D02C + ((_i - 64) * 0x40)))
451#define IXGBE_RSCDBU 0x03028
452#define IXGBE_RSCCTL_RSCEN 0x01
453#define IXGBE_RSCCTL_MAXDESC_1 0x00
454#define IXGBE_RSCCTL_MAXDESC_4 0x04
455#define IXGBE_RSCCTL_MAXDESC_8 0x08
456#define IXGBE_RSCCTL_MAXDESC_16 0x0C
457#define IXGBE_RXDADV_RSCCNT_SHIFT 17
458#define IXGBE_GPIE_RSC_DELAY_SHIFT 11
459#define IXGBE_RXDADV_RSCCNT_MASK 0x001E0000
460#define IXGBE_RSCDBU_RSCACKDIS 0x00000080
461#define IXGBE_RDRXCTL_RSCFRSTSIZE 0x003E0000
462
446/* DCB registers */ 463/* DCB registers */
447#define IXGBE_RTRPCS 0x02430 464#define IXGBE_RTRPCS 0x02430
448#define IXGBE_RTTDCS 0x04900 465#define IXGBE_RTTDCS 0x04900
@@ -462,6 +479,63 @@
462#define IXGBE_RTTDTECC_NO_BCN 0x00000100 479#define IXGBE_RTTDTECC_NO_BCN 0x00000100
463#define IXGBE_RTTBCNRC 0x04984 480#define IXGBE_RTTBCNRC 0x04984
464 481
482/* FCoE registers */
483#define IXGBE_FCPTRL 0x02410 /* FC User Desc. PTR Low */
484#define IXGBE_FCPTRH 0x02414 /* FC USer Desc. PTR High */
485#define IXGBE_FCBUFF 0x02418 /* FC Buffer Control */
486#define IXGBE_FCDMARW 0x02420 /* FC Receive DMA RW */
487#define IXGBE_FCINVST0 0x03FC0 /* FC Invalid DMA Context Status Reg 0 */
488#define IXGBE_FCINVST(_i) (IXGBE_FCINVST0 + ((_i) * 4))
489#define IXGBE_FCBUFF_VALID (1 << 0) /* DMA Context Valid */
490#define IXGBE_FCBUFF_BUFFSIZE (3 << 3) /* User Buffer Size */
491#define IXGBE_FCBUFF_WRCONTX (1 << 7) /* 0: Initiator, 1: Target */
492#define IXGBE_FCBUFF_BUFFCNT 0x0000ff00 /* Number of User Buffers */
493#define IXGBE_FCBUFF_OFFSET 0xffff0000 /* User Buffer Offset */
494#define IXGBE_FCBUFF_BUFFSIZE_SHIFT 3
495#define IXGBE_FCBUFF_BUFFCNT_SHIFT 8
496#define IXGBE_FCBUFF_OFFSET_SHIFT 16
497#define IXGBE_FCDMARW_WE (1 << 14) /* Write enable */
498#define IXGBE_FCDMARW_RE (1 << 15) /* Read enable */
499#define IXGBE_FCDMARW_FCOESEL 0x000001ff /* FC X_ID: 11 bits */
500#define IXGBE_FCDMARW_LASTSIZE 0xffff0000 /* Last User Buffer Size */
501#define IXGBE_FCDMARW_LASTSIZE_SHIFT 16
502
503/* FCoE SOF/EOF */
504#define IXGBE_TEOFF 0x04A94 /* Tx FC EOF */
505#define IXGBE_TSOFF 0x04A98 /* Tx FC SOF */
506#define IXGBE_REOFF 0x05158 /* Rx FC EOF */
507#define IXGBE_RSOFF 0x051F8 /* Rx FC SOF */
508/* FCoE Filter Context Registers */
509#define IXGBE_FCFLT 0x05108 /* FC FLT Context */
510#define IXGBE_FCFLTRW 0x05110 /* FC Filter RW Control */
511#define IXGBE_FCPARAM 0x051d8 /* FC Offset Parameter */
512#define IXGBE_FCFLT_VALID (1 << 0) /* Filter Context Valid */
513#define IXGBE_FCFLT_FIRST (1 << 1) /* Filter First */
514#define IXGBE_FCFLT_SEQID 0x00ff0000 /* Sequence ID */
515#define IXGBE_FCFLT_SEQCNT 0xff000000 /* Sequence Count */
516#define IXGBE_FCFLTRW_RVALDT (1 << 13) /* Fast Re-Validation */
517#define IXGBE_FCFLTRW_WE (1 << 14) /* Write Enable */
518#define IXGBE_FCFLTRW_RE (1 << 15) /* Read Enable */
519/* FCoE Receive Control */
520#define IXGBE_FCRXCTRL 0x05100 /* FC Receive Control */
521#define IXGBE_FCRXCTRL_FCOELLI (1 << 0) /* Low latency interrupt */
522#define IXGBE_FCRXCTRL_SAVBAD (1 << 1) /* Save Bad Frames */
523#define IXGBE_FCRXCTRL_FRSTRDH (1 << 2) /* EN 1st Read Header */
524#define IXGBE_FCRXCTRL_LASTSEQH (1 << 3) /* EN Last Header in Seq */
525#define IXGBE_FCRXCTRL_ALLH (1 << 4) /* EN All Headers */
526#define IXGBE_FCRXCTRL_FRSTSEQH (1 << 5) /* EN 1st Seq. Header */
527#define IXGBE_FCRXCTRL_ICRC (1 << 6) /* Ignore Bad FC CRC */
528#define IXGBE_FCRXCTRL_FCCRCBO (1 << 7) /* FC CRC Byte Ordering */
529#define IXGBE_FCRXCTRL_FCOEVER 0x00000f00 /* FCoE Version: 4 bits */
530#define IXGBE_FCRXCTRL_FCOEVER_SHIFT 8
531/* FCoE Redirection */
532#define IXGBE_FCRECTL 0x0ED00 /* FC Redirection Control */
533#define IXGBE_FCRETA0 0x0ED10 /* FC Redirection Table 0 */
534#define IXGBE_FCRETA(_i) (IXGBE_FCRETA0 + ((_i) * 4)) /* FCoE Redir */
535#define IXGBE_FCRECTL_ENA 0x1 /* FCoE Redir Table Enable */
536#define IXGBE_FCRETA_SIZE 8 /* Max entries in FCRETA */
537#define IXGBE_FCRETA_ENTRY_MASK 0x0000007f /* 7 bits for the queue index */
538
465/* Stats registers */ 539/* Stats registers */
466#define IXGBE_CRCERRS 0x04000 540#define IXGBE_CRCERRS 0x04000
467#define IXGBE_ILLERRC 0x04004 541#define IXGBE_ILLERRC 0x04004
@@ -533,6 +607,13 @@
533#define IXGBE_QPRDC(_i) (0x01430 + ((_i) * 0x40)) /* 16 of these */ 607#define IXGBE_QPRDC(_i) (0x01430 + ((_i) * 0x40)) /* 16 of these */
534#define IXGBE_QBTC_L(_i) (0x08700 + ((_i) * 0x8)) /* 16 of these */ 608#define IXGBE_QBTC_L(_i) (0x08700 + ((_i) * 0x8)) /* 16 of these */
535#define IXGBE_QBTC_H(_i) (0x08704 + ((_i) * 0x8)) /* 16 of these */ 609#define IXGBE_QBTC_H(_i) (0x08704 + ((_i) * 0x8)) /* 16 of these */
610#define IXGBE_FCCRC 0x05118 /* Count of Good Eth CRC w/ Bad FC CRC */
611#define IXGBE_FCOERPDC 0x0241C /* FCoE Rx Packets Dropped Count */
612#define IXGBE_FCLAST 0x02424 /* FCoE Last Error Count */
613#define IXGBE_FCOEPRC 0x02428 /* Number of FCoE Packets Received */
614#define IXGBE_FCOEDWRC 0x0242C /* Number of FCoE DWords Received */
615#define IXGBE_FCOEPTC 0x08784 /* Number of FCoE Packets Transmitted */
616#define IXGBE_FCOEDWTC 0x08788 /* Number of FCoE DWords Transmitted */
536 617
537/* Management */ 618/* Management */
538#define IXGBE_MAVTV(_i) (0x05010 + ((_i) * 4)) /* 8 of these (0-7) */ 619#define IXGBE_MAVTV(_i) (0x05010 + ((_i) * 4)) /* 8 of these (0-7) */
@@ -833,13 +914,7 @@
833/* Omer bit masks */ 914/* Omer bit masks */
834#define IXGBE_CORECTL_WRITE_CMD 0x00010000 915#define IXGBE_CORECTL_WRITE_CMD 0x00010000
835 916
836/* Device Type definitions for new protocol MDIO commands */ 917/* MDIO definitions */
837#define IXGBE_MDIO_PMA_PMD_DEV_TYPE 0x1
838#define IXGBE_MDIO_PCS_DEV_TYPE 0x3
839#define IXGBE_MDIO_PHY_XS_DEV_TYPE 0x4
840#define IXGBE_MDIO_AUTO_NEG_DEV_TYPE 0x7
841#define IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE 0x1E /* Device 30 */
842#define IXGBE_TWINAX_DEV 1
843 918
844#define IXGBE_MDIO_COMMAND_TIMEOUT 100 /* PHY Timeout for 1 GB mode */ 919#define IXGBE_MDIO_COMMAND_TIMEOUT 100 /* PHY Timeout for 1 GB mode */
845 920
@@ -850,31 +925,10 @@
850#define IXGBE_MDIO_VENDOR_SPECIFIC_1_10G_SPEED 0x0018 925#define IXGBE_MDIO_VENDOR_SPECIFIC_1_10G_SPEED 0x0018
851#define IXGBE_MDIO_VENDOR_SPECIFIC_1_1G_SPEED 0x0010 926#define IXGBE_MDIO_VENDOR_SPECIFIC_1_1G_SPEED 0x0010
852 927
853#define IXGBE_MDIO_AUTO_NEG_CONTROL 0x0 /* AUTO_NEG Control Reg */
854#define IXGBE_MDIO_AUTO_NEG_STATUS 0x1 /* AUTO_NEG Status Reg */
855#define IXGBE_MDIO_PHY_XS_CONTROL 0x0 /* PHY_XS Control Reg */
856#define IXGBE_MDIO_PHY_XS_RESET 0x8000 /* PHY_XS Reset */
857#define IXGBE_MDIO_PHY_ID_HIGH 0x2 /* PHY ID High Reg*/
858#define IXGBE_MDIO_PHY_ID_LOW 0x3 /* PHY ID Low Reg*/
859#define IXGBE_MDIO_PHY_SPEED_ABILITY 0x4 /* Speed Ability Reg */
860#define IXGBE_MDIO_PHY_SPEED_10G 0x0001 /* 10G capable */
861#define IXGBE_MDIO_PHY_SPEED_1G 0x0010 /* 1G capable */
862#define IXGBE_MDIO_PHY_EXT_ABILITY 0xB /* Ext Ability Reg */
863#define IXGBE_MDIO_PHY_10GBASET_ABILITY 0x0004 /* 10GBaseT capable */
864#define IXGBE_MDIO_PHY_1000BASET_ABILITY 0x0020 /* 1000BaseT capable */
865
866#define IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR 0xC30A /* PHY_XS SDA/SCL Addr Reg */ 928#define IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR 0xC30A /* PHY_XS SDA/SCL Addr Reg */
867#define IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA 0xC30B /* PHY_XS SDA/SCL Data Reg */ 929#define IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA 0xC30B /* PHY_XS SDA/SCL Data Reg */
868#define IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT 0xC30C /* PHY_XS SDA/SCL Status Reg */ 930#define IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT 0xC30C /* PHY_XS SDA/SCL Status Reg */
869 931
870/* MII clause 22/28 definitions */
871#define IXGBE_MDIO_PHY_LOW_POWER_MODE 0x0800
872
873#define IXGBE_MII_SPEED_SELECTION_REG 0x10
874#define IXGBE_MII_RESTART 0x200
875#define IXGBE_MII_AUTONEG_COMPLETE 0x20
876#define IXGBE_MII_AUTONEG_REG 0x0
877
878#define IXGBE_PHY_REVISION_MASK 0xFFFFFFF0 932#define IXGBE_PHY_REVISION_MASK 0xFFFFFFF0
879#define IXGBE_MAX_PHY_ADDR 32 933#define IXGBE_MAX_PHY_ADDR 32
880 934
@@ -898,8 +952,6 @@
898#define IXGBE_CONTROL_NL 0x000F 952#define IXGBE_CONTROL_NL 0x000F
899#define IXGBE_CONTROL_EOL_NL 0x0FFF 953#define IXGBE_CONTROL_EOL_NL 0x0FFF
900#define IXGBE_CONTROL_SOL_NL 0x0000 954#define IXGBE_CONTROL_SOL_NL 0x0000
901#define IXGBE_PHY_ENFORCE_INTEL_SFP_OFFSET 0x002C
902#define IXGBE_PHY_ALLOW_ANY_SFP 0x1
903 955
904/* General purpose Interrupt Enable */ 956/* General purpose Interrupt Enable */
905#define IXGBE_SDP0_GPIEN 0x00000001 /* SDP0 */ 957#define IXGBE_SDP0_GPIEN 0x00000001 /* SDP0 */
@@ -958,6 +1010,8 @@
958#define IXGBE_VT_CTL_DIS_DEFPL 0x20000000 /* disable default pool */ 1010#define IXGBE_VT_CTL_DIS_DEFPL 0x20000000 /* disable default pool */
959#define IXGBE_VT_CTL_REPLEN 0x40000000 /* replication enabled */ 1011#define IXGBE_VT_CTL_REPLEN 0x40000000 /* replication enabled */
960#define IXGBE_VT_CTL_VT_ENABLE 0x00000001 /* Enable VT Mode */ 1012#define IXGBE_VT_CTL_VT_ENABLE 0x00000001 /* Enable VT Mode */
1013#define IXGBE_VT_CTL_POOL_SHIFT 7
1014#define IXGBE_VT_CTL_POOL_MASK (0x3F << IXGBE_VT_CTL_POOL_SHIFT)
961 1015
962/* VMOLR bitmasks */ 1016/* VMOLR bitmasks */
963#define IXGBE_VMOLR_AUPE 0x01000000 /* accept untagged packets */ 1017#define IXGBE_VMOLR_AUPE 0x01000000 /* accept untagged packets */
@@ -1148,6 +1202,7 @@
1148 1202
1149/* Interrupt Vector Allocation Registers */ 1203/* Interrupt Vector Allocation Registers */
1150#define IXGBE_IVAR_REG_NUM 25 1204#define IXGBE_IVAR_REG_NUM 25
1205#define IXGBE_IVAR_REG_NUM_82599 64
1151#define IXGBE_IVAR_TXRX_ENTRY 96 1206#define IXGBE_IVAR_TXRX_ENTRY 96
1152#define IXGBE_IVAR_RX_ENTRY 64 1207#define IXGBE_IVAR_RX_ENTRY 64
1153#define IXGBE_IVAR_RX_QUEUE(_i) (0 + (_i)) 1208#define IXGBE_IVAR_RX_QUEUE(_i) (0 + (_i))
@@ -1163,6 +1218,7 @@
1163 1218
1164/* ETYPE Queue Filter/Select Bit Masks */ 1219/* ETYPE Queue Filter/Select Bit Masks */
1165#define IXGBE_MAX_ETQF_FILTERS 8 1220#define IXGBE_MAX_ETQF_FILTERS 8
1221#define IXGBE_ETQF_FCOE 0x08000000 /* bit 27 */
1166#define IXGBE_ETQF_BCN 0x10000000 /* bit 28 */ 1222#define IXGBE_ETQF_BCN 0x10000000 /* bit 28 */
1167#define IXGBE_ETQF_1588 0x40000000 /* bit 30 */ 1223#define IXGBE_ETQF_1588 0x40000000 /* bit 30 */
1168#define IXGBE_ETQF_FILTER_EN 0x80000000 /* bit 31 */ 1224#define IXGBE_ETQF_FILTER_EN 0x80000000 /* bit 31 */
@@ -1185,6 +1241,7 @@
1185 */ 1241 */
1186#define IXGBE_ETQF_FILTER_EAPOL 0 1242#define IXGBE_ETQF_FILTER_EAPOL 0
1187#define IXGBE_ETQF_FILTER_BCN 1 1243#define IXGBE_ETQF_FILTER_BCN 1
1244#define IXGBE_ETQF_FILTER_FCOE 2
1188#define IXGBE_ETQF_FILTER_1588 3 1245#define IXGBE_ETQF_FILTER_1588 3
1189/* VLAN Control Bit Masks */ 1246/* VLAN Control Bit Masks */
1190#define IXGBE_VLNCTRL_VET 0x0000FFFF /* bits 0-15 */ 1247#define IXGBE_VLNCTRL_VET 0x0000FFFF /* bits 0-15 */
@@ -1382,6 +1439,8 @@
1382#define IXGBE_FW_PTR 0x0F 1439#define IXGBE_FW_PTR 0x0F
1383#define IXGBE_PBANUM0_PTR 0x15 1440#define IXGBE_PBANUM0_PTR 0x15
1384#define IXGBE_PBANUM1_PTR 0x16 1441#define IXGBE_PBANUM1_PTR 0x16
1442#define IXGBE_DEVICE_CAPS 0x2C
1443#define IXGBE_SAN_MAC_ADDR_PTR 0x28
1385#define IXGBE_PCIE_MSIX_82599_CAPS 0x72 1444#define IXGBE_PCIE_MSIX_82599_CAPS 0x72
1386#define IXGBE_PCIE_MSIX_82598_CAPS 0x62 1445#define IXGBE_PCIE_MSIX_82598_CAPS 0x62
1387 1446
@@ -1425,6 +1484,11 @@
1425#define IXGBE_EERD_ATTEMPTS 100000 1484#define IXGBE_EERD_ATTEMPTS 100000
1426#endif 1485#endif
1427 1486
1487#define IXGBE_SAN_MAC_ADDR_PORT0_OFFSET 0x0
1488#define IXGBE_SAN_MAC_ADDR_PORT1_OFFSET 0x3
1489#define IXGBE_DEVICE_CAPS_ALLOW_ANY_SFP 0x1
1490#define IXGBE_DEVICE_CAPS_FCOE_OFFLOADS 0x2
1491
1428/* PCI Bus Info */ 1492/* PCI Bus Info */
1429#define IXGBE_PCI_LINK_STATUS 0xB2 1493#define IXGBE_PCI_LINK_STATUS 0xB2
1430#define IXGBE_PCI_LINK_WIDTH 0x3F0 1494#define IXGBE_PCI_LINK_WIDTH 0x3F0
@@ -1553,7 +1617,8 @@
1553#define IXGBE_MTQC_RT_ENA 0x1 /* DCB Enable */ 1617#define IXGBE_MTQC_RT_ENA 0x1 /* DCB Enable */
1554#define IXGBE_MTQC_VT_ENA 0x2 /* VMDQ2 Enable */ 1618#define IXGBE_MTQC_VT_ENA 0x2 /* VMDQ2 Enable */
1555#define IXGBE_MTQC_64Q_1PB 0x0 /* 64 queues 1 pack buffer */ 1619#define IXGBE_MTQC_64Q_1PB 0x0 /* 64 queues 1 pack buffer */
1556#define IXGBE_MTQC_64VF 0x8 /* 2 TX Queues per pool w/64VF's */ 1620#define IXGBE_MTQC_32VF 0x8 /* 4 TX Queues per pool w/32VF's */
1621#define IXGBE_MTQC_64VF 0x4 /* 2 TX Queues per pool w/64VF's */
1557#define IXGBE_MTQC_8TC_8TQ 0xC /* 8 TC if RT_ENA or 8 TQ if VT_ENA */ 1622#define IXGBE_MTQC_8TC_8TQ 0xC /* 8 TC if RT_ENA or 8 TQ if VT_ENA */
1558 1623
1559/* Receive Descriptor bit definitions */ 1624/* Receive Descriptor bit definitions */
@@ -1585,6 +1650,8 @@
1585#define IXGBE_RXD_ERR_IPE 0x80 /* IP Checksum Error */ 1650#define IXGBE_RXD_ERR_IPE 0x80 /* IP Checksum Error */
1586#define IXGBE_RXDADV_ERR_MASK 0xfff00000 /* RDESC.ERRORS mask */ 1651#define IXGBE_RXDADV_ERR_MASK 0xfff00000 /* RDESC.ERRORS mask */
1587#define IXGBE_RXDADV_ERR_SHIFT 20 /* RDESC.ERRORS shift */ 1652#define IXGBE_RXDADV_ERR_SHIFT 20 /* RDESC.ERRORS shift */
1653#define IXGBE_RXDADV_ERR_FCEOFE 0x80000000 /* FCoEFe/IPE */
1654#define IXGBE_RXDADV_ERR_FCERR 0x00700000 /* FCERR/FDIRERR */
1588#define IXGBE_RXDADV_ERR_HBO 0x00800000 /*Header Buffer Overflow */ 1655#define IXGBE_RXDADV_ERR_HBO 0x00800000 /*Header Buffer Overflow */
1589#define IXGBE_RXDADV_ERR_CE 0x01000000 /* CRC Error */ 1656#define IXGBE_RXDADV_ERR_CE 0x01000000 /* CRC Error */
1590#define IXGBE_RXDADV_ERR_LE 0x02000000 /* Length Error */ 1657#define IXGBE_RXDADV_ERR_LE 0x02000000 /* Length Error */
@@ -1604,12 +1671,19 @@
1604#define IXGBE_RXDADV_STAT_FLM IXGBE_RXD_STAT_FLM /* FDir Match */ 1671#define IXGBE_RXDADV_STAT_FLM IXGBE_RXD_STAT_FLM /* FDir Match */
1605#define IXGBE_RXDADV_STAT_VP IXGBE_RXD_STAT_VP /* IEEE VLAN Pkt */ 1672#define IXGBE_RXDADV_STAT_VP IXGBE_RXD_STAT_VP /* IEEE VLAN Pkt */
1606#define IXGBE_RXDADV_STAT_MASK 0x000fffff /* Stat/NEXTP: bit 0-19 */ 1673#define IXGBE_RXDADV_STAT_MASK 0x000fffff /* Stat/NEXTP: bit 0-19 */
1674#define IXGBE_RXDADV_STAT_FCEOFS 0x00000040 /* FCoE EOF/SOF Stat */
1675#define IXGBE_RXDADV_STAT_FCSTAT 0x00000030 /* FCoE Pkt Stat */
1676#define IXGBE_RXDADV_STAT_FCSTAT_NOMTCH 0x00000000 /* 00: No Ctxt Match */
1677#define IXGBE_RXDADV_STAT_FCSTAT_NODDP 0x00000010 /* 01: Ctxt w/o DDP */
1678#define IXGBE_RXDADV_STAT_FCSTAT_FCPRSP 0x00000020 /* 10: Recv. FCP_RSP */
1679#define IXGBE_RXDADV_STAT_FCSTAT_DDP 0x00000030 /* 11: Ctxt w/ DDP */
1607 1680
1608/* PSRTYPE bit definitions */ 1681/* PSRTYPE bit definitions */
1609#define IXGBE_PSRTYPE_TCPHDR 0x00000010 1682#define IXGBE_PSRTYPE_TCPHDR 0x00000010
1610#define IXGBE_PSRTYPE_UDPHDR 0x00000020 1683#define IXGBE_PSRTYPE_UDPHDR 0x00000020
1611#define IXGBE_PSRTYPE_IPV4HDR 0x00000100 1684#define IXGBE_PSRTYPE_IPV4HDR 0x00000100
1612#define IXGBE_PSRTYPE_IPV6HDR 0x00000200 1685#define IXGBE_PSRTYPE_IPV6HDR 0x00000200
1686#define IXGBE_PSRTYPE_L2HDR 0x00001000
1613 1687
1614/* SRRCTL bit definitions */ 1688/* SRRCTL bit definitions */
1615#define IXGBE_SRRCTL_BSIZEPKT_SHIFT 10 /* so many KBs */ 1689#define IXGBE_SRRCTL_BSIZEPKT_SHIFT 10 /* so many KBs */
@@ -1836,6 +1910,16 @@ struct ixgbe_adv_tx_context_desc {
1836#define IXGBE_ADVTXD_POPTS_IPSEC 0x00000400 /* IPSec offload request */ 1910#define IXGBE_ADVTXD_POPTS_IPSEC 0x00000400 /* IPSec offload request */
1837#define IXGBE_ADVTXD_TUCMD_IPSEC_TYPE_ESP 0x00002000 /* IPSec Type ESP */ 1911#define IXGBE_ADVTXD_TUCMD_IPSEC_TYPE_ESP 0x00002000 /* IPSec Type ESP */
1838#define IXGBE_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN 0x00004000/* ESP Encrypt Enable */ 1912#define IXGBE_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN 0x00004000/* ESP Encrypt Enable */
1913#define IXGBE_ADVTXT_TUCMD_FCOE 0x00008000 /* FCoE Frame Type */
1914#define IXGBE_ADVTXD_FCOEF_EOF_MASK (0x3 << 10) /* FC EOF index */
1915#define IXGBE_ADVTXD_FCOEF_SOF ((1 << 2) << 10) /* FC SOF index */
1916#define IXGBE_ADVTXD_FCOEF_PARINC ((1 << 3) << 10) /* Rel_Off in F_CTL */
1917#define IXGBE_ADVTXD_FCOEF_ORIE ((1 << 4) << 10) /* Orientation: End */
1918#define IXGBE_ADVTXD_FCOEF_ORIS ((1 << 5) << 10) /* Orientation: Start */
1919#define IXGBE_ADVTXD_FCOEF_EOF_N (0x0 << 10) /* 00: EOFn */
1920#define IXGBE_ADVTXD_FCOEF_EOF_T (0x1 << 10) /* 01: EOFt */
1921#define IXGBE_ADVTXD_FCOEF_EOF_NI (0x2 << 10) /* 10: EOFni */
1922#define IXGBE_ADVTXD_FCOEF_EOF_A (0x3 << 10) /* 11: EOFa */
1839#define IXGBE_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */ 1923#define IXGBE_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */
1840#define IXGBE_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */ 1924#define IXGBE_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */
1841 1925
@@ -1861,7 +1945,7 @@ typedef u32 ixgbe_physical_layer;
1861#define IXGBE_PHYSICAL_LAYER_UNKNOWN 0 1945#define IXGBE_PHYSICAL_LAYER_UNKNOWN 0
1862#define IXGBE_PHYSICAL_LAYER_10GBASE_T 0x0001 1946#define IXGBE_PHYSICAL_LAYER_10GBASE_T 0x0001
1863#define IXGBE_PHYSICAL_LAYER_1000BASE_T 0x0002 1947#define IXGBE_PHYSICAL_LAYER_1000BASE_T 0x0002
1864#define IXGBE_PHYSICAL_LAYER_100BASE_T 0x0004 1948#define IXGBE_PHYSICAL_LAYER_100BASE_TX 0x0004
1865#define IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU 0x0008 1949#define IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU 0x0008
1866#define IXGBE_PHYSICAL_LAYER_10GBASE_LR 0x0010 1950#define IXGBE_PHYSICAL_LAYER_10GBASE_LR 0x0010
1867#define IXGBE_PHYSICAL_LAYER_10GBASE_LRM 0x0020 1951#define IXGBE_PHYSICAL_LAYER_10GBASE_LRM 0x0020
@@ -1870,6 +1954,8 @@ typedef u32 ixgbe_physical_layer;
1870#define IXGBE_PHYSICAL_LAYER_10GBASE_CX4 0x0100 1954#define IXGBE_PHYSICAL_LAYER_10GBASE_CX4 0x0100
1871#define IXGBE_PHYSICAL_LAYER_1000BASE_KX 0x0200 1955#define IXGBE_PHYSICAL_LAYER_1000BASE_KX 0x0200
1872#define IXGBE_PHYSICAL_LAYER_1000BASE_BX 0x0400 1956#define IXGBE_PHYSICAL_LAYER_1000BASE_BX 0x0400
1957#define IXGBE_PHYSICAL_LAYER_10GBASE_KR 0x0800
1958#define IXGBE_PHYSICAL_LAYER_10GBASE_XAUI 0x1000
1873 1959
1874enum ixgbe_eeprom_type { 1960enum ixgbe_eeprom_type {
1875 ixgbe_eeprom_uninitialized = 0, 1961 ixgbe_eeprom_uninitialized = 0,
@@ -1897,6 +1983,7 @@ enum ixgbe_phy_type {
1897 ixgbe_phy_sfp_ftl, 1983 ixgbe_phy_sfp_ftl,
1898 ixgbe_phy_sfp_unknown, 1984 ixgbe_phy_sfp_unknown,
1899 ixgbe_phy_sfp_intel, 1985 ixgbe_phy_sfp_intel,
1986 ixgbe_phy_sfp_unsupported,
1900 ixgbe_phy_generic 1987 ixgbe_phy_generic
1901}; 1988};
1902 1989
@@ -2075,6 +2162,12 @@ struct ixgbe_hw_stats {
2075 u64 fdirfstat_fremove; 2162 u64 fdirfstat_fremove;
2076 u64 fdirmatch; 2163 u64 fdirmatch;
2077 u64 fdirmiss; 2164 u64 fdirmiss;
2165 u64 fccrc;
2166 u64 fcoerpdc;
2167 u64 fcoeprc;
2168 u64 fcoeptc;
2169 u64 fcoedwrc;
2170 u64 fcoedwtc;
2078}; 2171};
2079 2172
2080/* forward declaration */ 2173/* forward declaration */
@@ -2101,6 +2194,8 @@ struct ixgbe_mac_operations {
2101 enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *); 2194 enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *);
2102 u32 (*get_supported_physical_layer)(struct ixgbe_hw *); 2195 u32 (*get_supported_physical_layer)(struct ixgbe_hw *);
2103 s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *); 2196 s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *);
2197 s32 (*get_san_mac_addr)(struct ixgbe_hw *, u8 *);
2198 s32 (*get_device_caps)(struct ixgbe_hw *, u16 *);
2104 s32 (*stop_adapter)(struct ixgbe_hw *); 2199 s32 (*stop_adapter)(struct ixgbe_hw *);
2105 s32 (*get_bus_info)(struct ixgbe_hw *); 2200 s32 (*get_bus_info)(struct ixgbe_hw *);
2106 void (*set_lan_id)(struct ixgbe_hw *); 2201 void (*set_lan_id)(struct ixgbe_hw *);
@@ -2129,8 +2224,7 @@ struct ixgbe_mac_operations {
2129 s32 (*set_vmdq)(struct ixgbe_hw *, u32, u32); 2224 s32 (*set_vmdq)(struct ixgbe_hw *, u32, u32);
2130 s32 (*clear_vmdq)(struct ixgbe_hw *, u32, u32); 2225 s32 (*clear_vmdq)(struct ixgbe_hw *, u32, u32);
2131 s32 (*init_rx_addrs)(struct ixgbe_hw *); 2226 s32 (*init_rx_addrs)(struct ixgbe_hw *);
2132 s32 (*update_uc_addr_list)(struct ixgbe_hw *, u8 *, u32, 2227 s32 (*update_uc_addr_list)(struct ixgbe_hw *, struct list_head *);
2133 ixgbe_mc_addr_itr);
2134 s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32, 2228 s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32,
2135 ixgbe_mc_addr_itr); 2229 ixgbe_mc_addr_itr);
2136 s32 (*enable_mc)(struct ixgbe_hw *); 2230 s32 (*enable_mc)(struct ixgbe_hw *);
@@ -2146,6 +2240,7 @@ struct ixgbe_mac_operations {
2146struct ixgbe_phy_operations { 2240struct ixgbe_phy_operations {
2147 s32 (*identify)(struct ixgbe_hw *); 2241 s32 (*identify)(struct ixgbe_hw *);
2148 s32 (*identify_sfp)(struct ixgbe_hw *); 2242 s32 (*identify_sfp)(struct ixgbe_hw *);
2243 s32 (*init)(struct ixgbe_hw *);
2149 s32 (*reset)(struct ixgbe_hw *); 2244 s32 (*reset)(struct ixgbe_hw *);
2150 s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *); 2245 s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *);
2151 s32 (*write_reg)(struct ixgbe_hw *, u32, u32, u16); 2246 s32 (*write_reg)(struct ixgbe_hw *, u32, u32, u16);
@@ -2173,6 +2268,7 @@ struct ixgbe_mac_info {
2173 enum ixgbe_mac_type type; 2268 enum ixgbe_mac_type type;
2174 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; 2269 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
2175 u8 perm_addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; 2270 u8 perm_addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
2271 u8 san_addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
2176 s32 mc_filter_type; 2272 s32 mc_filter_type;
2177 u32 mcft_size; 2273 u32 mcft_size;
2178 u32 vft_size; 2274 u32 vft_size;
@@ -2189,10 +2285,11 @@ struct ixgbe_mac_info {
2189 2285
2190struct ixgbe_phy_info { 2286struct ixgbe_phy_info {
2191 struct ixgbe_phy_operations ops; 2287 struct ixgbe_phy_operations ops;
2288 struct mdio_if_info mdio;
2192 enum ixgbe_phy_type type; 2289 enum ixgbe_phy_type type;
2193 u32 addr;
2194 u32 id; 2290 u32 id;
2195 enum ixgbe_sfp_type sfp_type; 2291 enum ixgbe_sfp_type sfp_type;
2292 bool sfp_setup_needed;
2196 u32 revision; 2293 u32 revision;
2197 enum ixgbe_media_type media_type; 2294 enum ixgbe_media_type media_type;
2198 bool reset_disable; 2295 bool reset_disable;
diff --git a/drivers/net/ixp2000/ixpdev.c b/drivers/net/ixp2000/ixpdev.c
index d3bf2f017cc2..2a0174b62e96 100644
--- a/drivers/net/ixp2000/ixpdev.c
+++ b/drivers/net/ixp2000/ixpdev.c
@@ -270,6 +270,18 @@ static int ixpdev_close(struct net_device *dev)
270 return 0; 270 return 0;
271} 271}
272 272
273static const struct net_device_ops ixpdev_netdev_ops = {
274 .ndo_open = ixpdev_open,
275 .ndo_stop = ixpdev_close,
276 .ndo_start_xmit = ixpdev_xmit,
277 .ndo_change_mtu = eth_change_mtu,
278 .ndo_validate_addr = eth_validate_addr,
279 .ndo_set_mac_address = eth_mac_addr,
280#ifdef CONFIG_NET_POLL_CONTROLLER
281 .ndo_poll_controller = ixpdev_poll_controller,
282#endif
283};
284
273struct net_device *ixpdev_alloc(int channel, int sizeof_priv) 285struct net_device *ixpdev_alloc(int channel, int sizeof_priv)
274{ 286{
275 struct net_device *dev; 287 struct net_device *dev;
@@ -279,12 +291,7 @@ struct net_device *ixpdev_alloc(int channel, int sizeof_priv)
279 if (dev == NULL) 291 if (dev == NULL)
280 return NULL; 292 return NULL;
281 293
282 dev->hard_start_xmit = ixpdev_xmit; 294 dev->netdev_ops = &ixpdev_netdev_ops;
283 dev->open = ixpdev_open;
284 dev->stop = ixpdev_close;
285#ifdef CONFIG_NET_POLL_CONTROLLER
286 dev->poll_controller = ixpdev_poll_controller;
287#endif
288 295
289 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM; 296 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
290 297
diff --git a/drivers/net/jazzsonic.c b/drivers/net/jazzsonic.c
index 14248cfc3dfd..d12106b47bf2 100644
--- a/drivers/net/jazzsonic.c
+++ b/drivers/net/jazzsonic.c
@@ -96,6 +96,18 @@ static int jazzsonic_close(struct net_device* dev)
96 return err; 96 return err;
97} 97}
98 98
99static const struct net_device_ops sonic_netdev_ops = {
100 .ndo_open = jazzsonic_open,
101 .ndo_stop = jazzsonic_close,
102 .ndo_start_xmit = sonic_send_packet,
103 .ndo_get_stats = sonic_get_stats,
104 .ndo_set_multicast_list = sonic_multicast_list,
105 .ndo_tx_timeout = sonic_tx_timeout,
106 .ndo_change_mtu = eth_change_mtu,
107 .ndo_validate_addr = eth_validate_addr,
108 .ndo_set_mac_address = eth_mac_addr,
109};
110
99static int __init sonic_probe1(struct net_device *dev) 111static int __init sonic_probe1(struct net_device *dev)
100{ 112{
101 static unsigned version_printed; 113 static unsigned version_printed;
@@ -179,12 +191,7 @@ static int __init sonic_probe1(struct net_device *dev)
179 lp->rra_laddr = lp->rda_laddr + (SIZEOF_SONIC_RD * SONIC_NUM_RDS 191 lp->rra_laddr = lp->rda_laddr + (SIZEOF_SONIC_RD * SONIC_NUM_RDS
180 * SONIC_BUS_SCALE(lp->dma_bitmode)); 192 * SONIC_BUS_SCALE(lp->dma_bitmode));
181 193
182 dev->open = jazzsonic_open; 194 dev->netdev_ops = &sonic_netdev_ops;
183 dev->stop = jazzsonic_close;
184 dev->hard_start_xmit = sonic_send_packet;
185 dev->get_stats = sonic_get_stats;
186 dev->set_multicast_list = &sonic_multicast_list;
187 dev->tx_timeout = sonic_tx_timeout;
188 dev->watchdog_timeo = TX_TIMEOUT; 195 dev->watchdog_timeo = TX_TIMEOUT;
189 196
190 /* 197 /*
diff --git a/drivers/net/jme.c b/drivers/net/jme.c
index 621a7c0c46ba..1e3c63d67b91 100644
--- a/drivers/net/jme.c
+++ b/drivers/net/jme.c
@@ -1939,7 +1939,6 @@ jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1939 TXCS_SELECT_QUEUE0 | 1939 TXCS_SELECT_QUEUE0 |
1940 TXCS_QUEUE0S | 1940 TXCS_QUEUE0S |
1941 TXCS_ENABLE); 1941 TXCS_ENABLE);
1942 netdev->trans_start = jiffies;
1943 1942
1944 tx_dbg(jme, "xmit: %d+%d@%lu\n", idx, 1943 tx_dbg(jme, "xmit: %d+%d@%lu\n", idx,
1945 skb_shinfo(skb)->nr_frags + 2, 1944 skb_shinfo(skb)->nr_frags + 2,
diff --git a/drivers/net/korina.c b/drivers/net/korina.c
index 38d6649a29c4..b4cf602c32b0 100644
--- a/drivers/net/korina.c
+++ b/drivers/net/korina.c
@@ -133,6 +133,7 @@ struct korina_private {
133 int dma_halt_cnt; 133 int dma_halt_cnt;
134 int dma_run_cnt; 134 int dma_run_cnt;
135 struct napi_struct napi; 135 struct napi_struct napi;
136 struct timer_list media_check_timer;
136 struct mii_if_info mii_if; 137 struct mii_if_info mii_if;
137 struct net_device *dev; 138 struct net_device *dev;
138 int phy_addr; 139 int phy_addr;
@@ -664,6 +665,15 @@ static void korina_check_media(struct net_device *dev, unsigned int init_media)
664 &lp->eth_regs->ethmac2); 665 &lp->eth_regs->ethmac2);
665} 666}
666 667
668static void korina_poll_media(unsigned long data)
669{
670 struct net_device *dev = (struct net_device *) data;
671 struct korina_private *lp = netdev_priv(dev);
672
673 korina_check_media(dev, 0);
674 mod_timer(&lp->media_check_timer, jiffies + HZ);
675}
676
667static void korina_set_carrier(struct mii_if_info *mii) 677static void korina_set_carrier(struct mii_if_info *mii)
668{ 678{
669 if (mii->force_media) { 679 if (mii->force_media) {
@@ -1034,6 +1044,7 @@ static int korina_open(struct net_device *dev)
1034 dev->name, lp->und_irq); 1044 dev->name, lp->und_irq);
1035 goto err_free_ovr_irq; 1045 goto err_free_ovr_irq;
1036 } 1046 }
1047 mod_timer(&lp->media_check_timer, jiffies + 1);
1037out: 1048out:
1038 return ret; 1049 return ret;
1039 1050
@@ -1053,6 +1064,8 @@ static int korina_close(struct net_device *dev)
1053 struct korina_private *lp = netdev_priv(dev); 1064 struct korina_private *lp = netdev_priv(dev);
1054 u32 tmp; 1065 u32 tmp;
1055 1066
1067 del_timer(&lp->media_check_timer);
1068
1056 /* Disable interrupts */ 1069 /* Disable interrupts */
1057 disable_irq(lp->rx_irq); 1070 disable_irq(lp->rx_irq);
1058 disable_irq(lp->tx_irq); 1071 disable_irq(lp->tx_irq);
@@ -1081,6 +1094,21 @@ static int korina_close(struct net_device *dev)
1081 return 0; 1094 return 0;
1082} 1095}
1083 1096
1097static const struct net_device_ops korina_netdev_ops = {
1098 .ndo_open = korina_open,
1099 .ndo_stop = korina_close,
1100 .ndo_start_xmit = korina_send_packet,
1101 .ndo_set_multicast_list = korina_multicast_list,
1102 .ndo_tx_timeout = korina_tx_timeout,
1103 .ndo_do_ioctl = korina_ioctl,
1104 .ndo_change_mtu = eth_change_mtu,
1105 .ndo_validate_addr = eth_validate_addr,
1106 .ndo_set_mac_address = eth_mac_addr,
1107#ifdef CONFIG_NET_POLL_CONTROLLER
1108 .ndo_poll_controller = korina_poll_controller,
1109#endif
1110};
1111
1084static int korina_probe(struct platform_device *pdev) 1112static int korina_probe(struct platform_device *pdev)
1085{ 1113{
1086 struct korina_device *bif = platform_get_drvdata(pdev); 1114 struct korina_device *bif = platform_get_drvdata(pdev);
@@ -1149,17 +1177,9 @@ static int korina_probe(struct platform_device *pdev)
1149 dev->irq = lp->rx_irq; 1177 dev->irq = lp->rx_irq;
1150 lp->dev = dev; 1178 lp->dev = dev;
1151 1179
1152 dev->open = korina_open; 1180 dev->netdev_ops = &korina_netdev_ops;
1153 dev->stop = korina_close;
1154 dev->hard_start_xmit = korina_send_packet;
1155 dev->set_multicast_list = &korina_multicast_list;
1156 dev->ethtool_ops = &netdev_ethtool_ops; 1181 dev->ethtool_ops = &netdev_ethtool_ops;
1157 dev->tx_timeout = korina_tx_timeout;
1158 dev->watchdog_timeo = TX_TIMEOUT; 1182 dev->watchdog_timeo = TX_TIMEOUT;
1159 dev->do_ioctl = &korina_ioctl;
1160#ifdef CONFIG_NET_POLL_CONTROLLER
1161 dev->poll_controller = korina_poll_controller;
1162#endif
1163 netif_napi_add(dev, &lp->napi, korina_poll, 64); 1183 netif_napi_add(dev, &lp->napi, korina_poll, 64);
1164 1184
1165 lp->phy_addr = (((lp->rx_irq == 0x2c? 1:0) << 8) | 0x05); 1185 lp->phy_addr = (((lp->rx_irq == 0x2c? 1:0) << 8) | 0x05);
@@ -1176,6 +1196,7 @@ static int korina_probe(struct platform_device *pdev)
1176 ": cannot register net device %d\n", rc); 1196 ": cannot register net device %d\n", rc);
1177 goto probe_err_register; 1197 goto probe_err_register;
1178 } 1198 }
1199 setup_timer(&lp->media_check_timer, korina_poll_media, (unsigned long) dev);
1179out: 1200out:
1180 return rc; 1201 return rc;
1181 1202
diff --git a/drivers/net/lasi_82596.c b/drivers/net/lasi_82596.c
index efbae4b8398e..a0c578585a50 100644
--- a/drivers/net/lasi_82596.c
+++ b/drivers/net/lasi_82596.c
@@ -161,12 +161,12 @@ lan_init_chip(struct parisc_device *dev)
161 161
162 if (!dev->irq) { 162 if (!dev->irq) {
163 printk(KERN_ERR "%s: IRQ not found for i82596 at 0x%lx\n", 163 printk(KERN_ERR "%s: IRQ not found for i82596 at 0x%lx\n",
164 __FILE__, dev->hpa.start); 164 __FILE__, (unsigned long)dev->hpa.start);
165 return -ENODEV; 165 return -ENODEV;
166 } 166 }
167 167
168 printk(KERN_INFO "Found i82596 at 0x%lx, IRQ %d\n", dev->hpa.start, 168 printk(KERN_INFO "Found i82596 at 0x%lx, IRQ %d\n",
169 dev->irq); 169 (unsigned long)dev->hpa.start, dev->irq);
170 170
171 netdevice = alloc_etherdev(sizeof(struct i596_private)); 171 netdevice = alloc_etherdev(sizeof(struct i596_private));
172 if (!netdevice) 172 if (!netdevice)
diff --git a/drivers/net/lib82596.c b/drivers/net/lib82596.c
index 7415f517491d..070fa4500871 100644
--- a/drivers/net/lib82596.c
+++ b/drivers/net/lib82596.c
@@ -1036,6 +1036,19 @@ static void print_eth(unsigned char *add, char *str)
1036 printk(KERN_DEBUG "i596 0x%p, %pM --> %pM %02X%02X, %s\n", 1036 printk(KERN_DEBUG "i596 0x%p, %pM --> %pM %02X%02X, %s\n",
1037 add, add + 6, add, add[12], add[13], str); 1037 add, add + 6, add, add[12], add[13], str);
1038} 1038}
1039static const struct net_device_ops i596_netdev_ops = {
1040 .ndo_open = i596_open,
1041 .ndo_stop = i596_close,
1042 .ndo_start_xmit = i596_start_xmit,
1043 .ndo_set_multicast_list = set_multicast_list,
1044 .ndo_tx_timeout = i596_tx_timeout,
1045 .ndo_change_mtu = eth_change_mtu,
1046 .ndo_validate_addr = eth_validate_addr,
1047 .ndo_set_mac_address = eth_mac_addr,
1048#ifdef CONFIG_NET_POLL_CONTROLLER
1049 .ndo_poll_controller = i596_poll_controller,
1050#endif
1051};
1039 1052
1040static int __devinit i82596_probe(struct net_device *dev) 1053static int __devinit i82596_probe(struct net_device *dev)
1041{ 1054{
@@ -1062,16 +1075,8 @@ static int __devinit i82596_probe(struct net_device *dev)
1062 return -ENOMEM; 1075 return -ENOMEM;
1063 } 1076 }
1064 1077
1065 /* The 82596-specific entries in the device structure. */ 1078 dev->netdev_ops = &i596_netdev_ops;
1066 dev->open = i596_open;
1067 dev->stop = i596_close;
1068 dev->hard_start_xmit = i596_start_xmit;
1069 dev->set_multicast_list = set_multicast_list;
1070 dev->tx_timeout = i596_tx_timeout;
1071 dev->watchdog_timeo = TX_TIMEOUT; 1079 dev->watchdog_timeo = TX_TIMEOUT;
1072#ifdef CONFIG_NET_POLL_CONTROLLER
1073 dev->poll_controller = i596_poll_controller;
1074#endif
1075 1080
1076 memset(dma, 0, sizeof(struct i596_dma)); 1081 memset(dma, 0, sizeof(struct i596_dma));
1077 lp->dma = dma; 1082 lp->dma = dma;
diff --git a/drivers/net/ll_temac.h b/drivers/net/ll_temac.h
new file mode 100644
index 000000000000..1af66a1e6911
--- /dev/null
+++ b/drivers/net/ll_temac.h
@@ -0,0 +1,374 @@
1
2#ifndef XILINX_LL_TEMAC_H
3#define XILINX_LL_TEMAC_H
4
5#include <linux/netdevice.h>
6#include <linux/of.h>
7#include <linux/spinlock.h>
8#include <asm/dcr.h>
9#include <asm/dcr-regs.h>
10
11/* packet size info */
12#define XTE_HDR_SIZE 14 /* size of Ethernet header */
13#define XTE_TRL_SIZE 4 /* size of Ethernet trailer (FCS) */
14#define XTE_JUMBO_MTU 9000
15#define XTE_MAX_JUMBO_FRAME_SIZE (XTE_JUMBO_MTU + XTE_HDR_SIZE + XTE_TRL_SIZE)
16
17/* Configuration options */
18
19/* Accept all incoming packets.
20 * This option defaults to disabled (cleared) */
21#define XTE_OPTION_PROMISC (1 << 0)
22/* Jumbo frame support for Tx & Rx.
23 * This option defaults to disabled (cleared) */
24#define XTE_OPTION_JUMBO (1 << 1)
25/* VLAN Rx & Tx frame support.
26 * This option defaults to disabled (cleared) */
27#define XTE_OPTION_VLAN (1 << 2)
28/* Enable recognition of flow control frames on Rx
29 * This option defaults to enabled (set) */
30#define XTE_OPTION_FLOW_CONTROL (1 << 4)
31/* Strip FCS and PAD from incoming frames.
32 * Note: PAD from VLAN frames is not stripped.
33 * This option defaults to disabled (set) */
34#define XTE_OPTION_FCS_STRIP (1 << 5)
35/* Generate FCS field and add PAD automatically for outgoing frames.
36 * This option defaults to enabled (set) */
37#define XTE_OPTION_FCS_INSERT (1 << 6)
38/* Enable Length/Type error checking for incoming frames. When this option is
39set, the MAC will filter frames that have a mismatched type/length field
40and if XTE_OPTION_REPORT_RXERR is set, the user is notified when these
41types of frames are encountered. When this option is cleared, the MAC will
42allow these types of frames to be received.
43This option defaults to enabled (set) */
44#define XTE_OPTION_LENTYPE_ERR (1 << 7)
45/* Enable the transmitter.
46 * This option defaults to enabled (set) */
47#define XTE_OPTION_TXEN (1 << 11)
48/* Enable the receiver
49* This option defaults to enabled (set) */
50#define XTE_OPTION_RXEN (1 << 12)
51
52/* Default options set when device is initialized or reset */
53#define XTE_OPTION_DEFAULTS \
54 (XTE_OPTION_TXEN | \
55 XTE_OPTION_FLOW_CONTROL | \
56 XTE_OPTION_RXEN)
57
58/* XPS_LL_TEMAC SDMA registers definition */
59
60#define TX_NXTDESC_PTR 0x00 /* r */
61#define TX_CURBUF_ADDR 0x01 /* r */
62#define TX_CURBUF_LENGTH 0x02 /* r */
63#define TX_CURDESC_PTR 0x03 /* rw */
64#define TX_TAILDESC_PTR 0x04 /* rw */
65#define TX_CHNL_CTRL 0x05 /* rw */
66/*
67 0:7 24:31 IRQTimeout
68 8:15 16:23 IRQCount
69 16:20 11:15 Reserved
70 21 10 0
71 22 9 UseIntOnEnd
72 23 8 LdIRQCnt
73 24 7 IRQEn
74 25:28 3:6 Reserved
75 29 2 IrqErrEn
76 30 1 IrqDlyEn
77 31 0 IrqCoalEn
78*/
79#define CHNL_CTRL_IRQ_IOE (1 << 9)
80#define CHNL_CTRL_IRQ_EN (1 << 7)
81#define CHNL_CTRL_IRQ_ERR_EN (1 << 2)
82#define CHNL_CTRL_IRQ_DLY_EN (1 << 1)
83#define CHNL_CTRL_IRQ_COAL_EN (1 << 0)
84#define TX_IRQ_REG 0x06 /* rw */
85/*
86 0:7 24:31 DltTmrValue
87 8:15 16:23 ClscCntrValue
88 16:17 14:15 Reserved
89 18:21 10:13 ClscCnt
90 22:23 8:9 DlyCnt
91 24:28 3::7 Reserved
92 29 2 ErrIrq
93 30 1 DlyIrq
94 31 0 CoalIrq
95 */
96#define TX_CHNL_STS 0x07 /* r */
97/*
98 0:9 22:31 Reserved
99 10 21 TailPErr
100 11 20 CmpErr
101 12 19 AddrErr
102 13 18 NxtPErr
103 14 17 CurPErr
104 15 16 BsyWr
105 16:23 8:15 Reserved
106 24 7 Error
107 25 6 IOE
108 26 5 SOE
109 27 4 Cmplt
110 28 3 SOP
111 29 2 EOP
112 30 1 EngBusy
113 31 0 Reserved
114*/
115
116#define RX_NXTDESC_PTR 0x08 /* r */
117#define RX_CURBUF_ADDR 0x09 /* r */
118#define RX_CURBUF_LENGTH 0x0a /* r */
119#define RX_CURDESC_PTR 0x0b /* rw */
120#define RX_TAILDESC_PTR 0x0c /* rw */
121#define RX_CHNL_CTRL 0x0d /* rw */
122/*
123 0:7 24:31 IRQTimeout
124 8:15 16:23 IRQCount
125 16:20 11:15 Reserved
126 21 10 0
127 22 9 UseIntOnEnd
128 23 8 LdIRQCnt
129 24 7 IRQEn
130 25:28 3:6 Reserved
131 29 2 IrqErrEn
132 30 1 IrqDlyEn
133 31 0 IrqCoalEn
134 */
135#define RX_IRQ_REG 0x0e /* rw */
136#define IRQ_COAL (1 << 0)
137#define IRQ_DLY (1 << 1)
138#define IRQ_ERR (1 << 2)
139#define IRQ_DMAERR (1 << 7) /* this is not documented ??? */
140/*
141 0:7 24:31 DltTmrValue
142 8:15 16:23 ClscCntrValue
143 16:17 14:15 Reserved
144 18:21 10:13 ClscCnt
145 22:23 8:9 DlyCnt
146 24:28 3::7 Reserved
147*/
148#define RX_CHNL_STS 0x0f /* r */
149#define CHNL_STS_ENGBUSY (1 << 1)
150#define CHNL_STS_EOP (1 << 2)
151#define CHNL_STS_SOP (1 << 3)
152#define CHNL_STS_CMPLT (1 << 4)
153#define CHNL_STS_SOE (1 << 5)
154#define CHNL_STS_IOE (1 << 6)
155#define CHNL_STS_ERR (1 << 7)
156
157#define CHNL_STS_BSYWR (1 << 16)
158#define CHNL_STS_CURPERR (1 << 17)
159#define CHNL_STS_NXTPERR (1 << 18)
160#define CHNL_STS_ADDRERR (1 << 19)
161#define CHNL_STS_CMPERR (1 << 20)
162#define CHNL_STS_TAILERR (1 << 21)
163/*
164 0:9 22:31 Reserved
165 10 21 TailPErr
166 11 20 CmpErr
167 12 19 AddrErr
168 13 18 NxtPErr
169 14 17 CurPErr
170 15 16 BsyWr
171 16:23 8:15 Reserved
172 24 7 Error
173 25 6 IOE
174 26 5 SOE
175 27 4 Cmplt
176 28 3 SOP
177 29 2 EOP
178 30 1 EngBusy
179 31 0 Reserved
180*/
181
182#define DMA_CONTROL_REG 0x10 /* rw */
183#define DMA_CONTROL_RST (1 << 0)
184#define DMA_TAIL_ENABLE (1 << 2)
185
186/* XPS_LL_TEMAC direct registers definition */
187
188#define XTE_RAF0_OFFSET 0x00
189#define RAF0_RST (1 << 0)
190#define RAF0_MCSTREJ (1 << 1)
191#define RAF0_BCSTREJ (1 << 2)
192#define XTE_TPF0_OFFSET 0x04
193#define XTE_IFGP0_OFFSET 0x08
194#define XTE_ISR0_OFFSET 0x0c
195#define ISR0_HARDACSCMPLT (1 << 0)
196#define ISR0_AUTONEG (1 << 1)
197#define ISR0_RXCMPLT (1 << 2)
198#define ISR0_RXREJ (1 << 3)
199#define ISR0_RXFIFOOVR (1 << 4)
200#define ISR0_TXCMPLT (1 << 5)
201#define ISR0_RXDCMLCK (1 << 6)
202
203#define XTE_IPR0_OFFSET 0x10
204#define XTE_IER0_OFFSET 0x14
205
206#define XTE_MSW0_OFFSET 0x20
207#define XTE_LSW0_OFFSET 0x24
208#define XTE_CTL0_OFFSET 0x28
209#define XTE_RDY0_OFFSET 0x2c
210
211#define XTE_RSE_MIIM_RR_MASK 0x0002
212#define XTE_RSE_MIIM_WR_MASK 0x0004
213#define XTE_RSE_CFG_RR_MASK 0x0020
214#define XTE_RSE_CFG_WR_MASK 0x0040
215#define XTE_RDY0_HARD_ACS_RDY_MASK (0x10000)
216
217/* XPS_LL_TEMAC indirect registers offset definition */
218
219#define XTE_RXC0_OFFSET 0x00000200 /* Rx configuration word 0 */
220#define XTE_RXC1_OFFSET 0x00000240 /* Rx configuration word 1 */
221#define XTE_RXC1_RXRST_MASK (1 << 31) /* Receiver reset */
222#define XTE_RXC1_RXJMBO_MASK (1 << 30) /* Jumbo frame enable */
223#define XTE_RXC1_RXFCS_MASK (1 << 29) /* FCS not stripped */
224#define XTE_RXC1_RXEN_MASK (1 << 28) /* Receiver enable */
225#define XTE_RXC1_RXVLAN_MASK (1 << 27) /* VLAN enable */
226#define XTE_RXC1_RXHD_MASK (1 << 26) /* Half duplex */
227#define XTE_RXC1_RXLT_MASK (1 << 25) /* Length/type check disable */
228
229#define XTE_TXC_OFFSET 0x00000280 /* Tx configuration */
230#define XTE_TXC_TXRST_MASK (1 << 31) /* Transmitter reset */
231#define XTE_TXC_TXJMBO_MASK (1 << 30) /* Jumbo frame enable */
232#define XTE_TXC_TXFCS_MASK (1 << 29) /* Generate FCS */
233#define XTE_TXC_TXEN_MASK (1 << 28) /* Transmitter enable */
234#define XTE_TXC_TXVLAN_MASK (1 << 27) /* VLAN enable */
235#define XTE_TXC_TXHD_MASK (1 << 26) /* Half duplex */
236
237#define XTE_FCC_OFFSET 0x000002C0 /* Flow control config */
238#define XTE_FCC_RXFLO_MASK (1 << 29) /* Rx flow control enable */
239#define XTE_FCC_TXFLO_MASK (1 << 30) /* Tx flow control enable */
240
241#define XTE_EMCFG_OFFSET 0x00000300 /* EMAC configuration */
242#define XTE_EMCFG_LINKSPD_MASK 0xC0000000 /* Link speed */
243#define XTE_EMCFG_HOSTEN_MASK (1 << 26) /* Host interface enable */
244#define XTE_EMCFG_LINKSPD_10 0x00000000 /* 10 Mbit LINKSPD_MASK */
245#define XTE_EMCFG_LINKSPD_100 (1 << 30) /* 100 Mbit LINKSPD_MASK */
246#define XTE_EMCFG_LINKSPD_1000 (1 << 31) /* 1000 Mbit LINKSPD_MASK */
247
248#define XTE_GMIC_OFFSET 0x00000320 /* RGMII/SGMII config */
249#define XTE_MC_OFFSET 0x00000340 /* MDIO configuration */
250#define XTE_UAW0_OFFSET 0x00000380 /* Unicast address word 0 */
251#define XTE_UAW1_OFFSET 0x00000384 /* Unicast address word 1 */
252
253#define XTE_MAW0_OFFSET 0x00000388 /* Multicast addr word 0 */
254#define XTE_MAW1_OFFSET 0x0000038C /* Multicast addr word 1 */
255#define XTE_AFM_OFFSET 0x00000390 /* Promiscuous mode */
256#define XTE_AFM_EPPRM_MASK (1 << 31) /* Promiscuous mode enable */
257
258/* Interrupt Request status */
259#define XTE_TIS_OFFSET 0x000003A0
260#define TIS_FRIS (1 << 0)
261#define TIS_MRIS (1 << 1)
262#define TIS_MWIS (1 << 2)
263#define TIS_ARIS (1 << 3)
264#define TIS_AWIS (1 << 4)
265#define TIS_CRIS (1 << 5)
266#define TIS_CWIS (1 << 6)
267
268#define XTE_TIE_OFFSET 0x000003A4 /* Interrupt enable */
269
270/** MII Mamagement Control register (MGTCR) */
271#define XTE_MGTDR_OFFSET 0x000003B0 /* MII data */
272#define XTE_MIIMAI_OFFSET 0x000003B4 /* MII control */
273
274#define CNTLREG_WRITE_ENABLE_MASK 0x8000
275#define CNTLREG_EMAC1SEL_MASK 0x0400
276#define CNTLREG_ADDRESSCODE_MASK 0x03ff
277
278/* CDMAC descriptor status bit definitions */
279
280#define STS_CTRL_APP0_ERR (1 << 31)
281#define STS_CTRL_APP0_IRQONEND (1 << 30)
282/* undoccumented */
283#define STS_CTRL_APP0_STOPONEND (1 << 29)
284#define STS_CTRL_APP0_CMPLT (1 << 28)
285#define STS_CTRL_APP0_SOP (1 << 27)
286#define STS_CTRL_APP0_EOP (1 << 26)
287#define STS_CTRL_APP0_ENGBUSY (1 << 25)
288/* undocumented */
289#define STS_CTRL_APP0_ENGRST (1 << 24)
290
291#define TX_CONTROL_CALC_CSUM_MASK 1
292
293#define XTE_ALIGN 32
294#define BUFFER_ALIGN(adr) ((XTE_ALIGN - ((u32) adr)) % XTE_ALIGN)
295
296#define MULTICAST_CAM_TABLE_NUM 4
297
298/* TX/RX CURDESC_PTR points to first descriptor */
299/* TX/RX TAILDESC_PTR points to last descriptor in linked list */
300
301/**
302 * struct cdmac_bd - LocalLink buffer descriptor format
303 *
304 * app0 bits:
305 * 0 Error
306 * 1 IrqOnEnd generate an interrupt at completion of DMA op
307 * 2 reserved
308 * 3 completed Current descriptor completed
309 * 4 SOP TX - marks first desc/ RX marks first desct
310 * 5 EOP TX marks last desc/RX marks last desc
311 * 6 EngBusy DMA is processing
312 * 7 reserved
313 * 8:31 application specific
314 */
315struct cdmac_bd {
316 u32 next; /* Physical address of next buffer descriptor */
317 u32 phys;
318 u32 len;
319 u32 app0;
320 u32 app1; /* TX start << 16 | insert */
321 u32 app2; /* TX csum */
322 u32 app3;
323 u32 app4; /* skb for TX length for RX */
324};
325
326struct temac_local {
327 struct net_device *ndev;
328 struct device *dev;
329
330 /* Connection to PHY device */
331 struct phy_device *phy_dev; /* Pointer to PHY device */
332 struct device_node *phy_node;
333
334 /* MDIO bus data */
335 struct mii_bus *mii_bus; /* MII bus reference */
336 int mdio_irqs[PHY_MAX_ADDR]; /* IRQs table for MDIO bus */
337
338 /* IO registers and IRQs */
339 void __iomem *regs;
340 dcr_host_t sdma_dcrs;
341 int tx_irq;
342 int rx_irq;
343 int emac_num;
344
345 struct sk_buff **rx_skb;
346 spinlock_t rx_lock;
347 struct mutex indirect_mutex;
348 u32 options; /* Current options word */
349 int last_link;
350
351 /* Buffer descriptors */
352 struct cdmac_bd *tx_bd_v;
353 dma_addr_t tx_bd_p;
354 struct cdmac_bd *rx_bd_v;
355 dma_addr_t rx_bd_p;
356 int tx_bd_ci;
357 int tx_bd_next;
358 int tx_bd_tail;
359 int rx_bd_ci;
360};
361
362/* xilinx_temac.c */
363u32 temac_ior(struct temac_local *lp, int offset);
364void temac_iow(struct temac_local *lp, int offset, u32 value);
365int temac_indirect_busywait(struct temac_local *lp);
366u32 temac_indirect_in32(struct temac_local *lp, int reg);
367void temac_indirect_out32(struct temac_local *lp, int reg, u32 value);
368
369
370/* xilinx_temac_mdio.c */
371int temac_mdio_setup(struct temac_local *lp, struct device_node *np);
372void temac_mdio_teardown(struct temac_local *lp);
373
374#endif /* XILINX_LL_TEMAC_H */
diff --git a/drivers/net/ll_temac_main.c b/drivers/net/ll_temac_main.c
new file mode 100644
index 000000000000..96e7248876c1
--- /dev/null
+++ b/drivers/net/ll_temac_main.c
@@ -0,0 +1,969 @@
1/*
2 * Driver for Xilinx TEMAC Ethernet device
3 *
4 * Copyright (c) 2008 Nissin Systems Co., Ltd., Yoshio Kashiwagi
5 * Copyright (c) 2005-2008 DLA Systems, David H. Lynch Jr. <dhlii@dlasys.net>
6 * Copyright (c) 2008-2009 Secret Lab Technologies Ltd.
7 *
8 * This is a driver for the Xilinx ll_temac ipcore which is often used
9 * in the Virtex and Spartan series of chips.
10 *
11 * Notes:
12 * - The ll_temac hardware uses indirect access for many of the TEMAC
13 * registers, include the MDIO bus. However, indirect access to MDIO
14 * registers take considerably more clock cycles than to TEMAC registers.
15 * MDIO accesses are long, so threads doing them should probably sleep
16 * rather than busywait. However, since only one indirect access can be
17 * in progress at any given time, that means that *all* indirect accesses
18 * could end up sleeping (to wait for an MDIO access to complete).
19 * Fortunately none of the indirect accesses are on the 'hot' path for tx
20 * or rx, so this should be okay.
21 *
22 * TODO:
23 * - Fix driver to work on more than just Virtex5. Right now the driver
24 * assumes that the locallink DMA registers are accessed via DCR
25 * instructions.
26 * - Factor out locallink DMA code into separate driver
27 * - Fix multicast assignment.
28 * - Fix support for hardware checksumming.
29 * - Testing. Lots and lots of testing.
30 *
31 */
32
33#include <linux/delay.h>
34#include <linux/etherdevice.h>
35#include <linux/init.h>
36#include <linux/mii.h>
37#include <linux/module.h>
38#include <linux/mutex.h>
39#include <linux/netdevice.h>
40#include <linux/of.h>
41#include <linux/of_device.h>
42#include <linux/of_mdio.h>
43#include <linux/of_platform.h>
44#include <linux/skbuff.h>
45#include <linux/spinlock.h>
46#include <linux/tcp.h> /* needed for sizeof(tcphdr) */
47#include <linux/udp.h> /* needed for sizeof(udphdr) */
48#include <linux/phy.h>
49#include <linux/in.h>
50#include <linux/io.h>
51#include <linux/ip.h>
52
53#include "ll_temac.h"
54
55#define TX_BD_NUM 64
56#define RX_BD_NUM 128
57
58/* ---------------------------------------------------------------------
59 * Low level register access functions
60 */
61
62u32 temac_ior(struct temac_local *lp, int offset)
63{
64 return in_be32((u32 *)(lp->regs + offset));
65}
66
67void temac_iow(struct temac_local *lp, int offset, u32 value)
68{
69 out_be32((u32 *) (lp->regs + offset), value);
70}
71
72int temac_indirect_busywait(struct temac_local *lp)
73{
74 long end = jiffies + 2;
75
76 while (!(temac_ior(lp, XTE_RDY0_OFFSET) & XTE_RDY0_HARD_ACS_RDY_MASK)) {
77 if (end - jiffies <= 0) {
78 WARN_ON(1);
79 return -ETIMEDOUT;
80 }
81 msleep(1);
82 }
83 return 0;
84}
85
86/**
87 * temac_indirect_in32
88 *
89 * lp->indirect_mutex must be held when calling this function
90 */
91u32 temac_indirect_in32(struct temac_local *lp, int reg)
92{
93 u32 val;
94
95 if (temac_indirect_busywait(lp))
96 return -ETIMEDOUT;
97 temac_iow(lp, XTE_CTL0_OFFSET, reg);
98 if (temac_indirect_busywait(lp))
99 return -ETIMEDOUT;
100 val = temac_ior(lp, XTE_LSW0_OFFSET);
101
102 return val;
103}
104
105/**
106 * temac_indirect_out32
107 *
108 * lp->indirect_mutex must be held when calling this function
109 */
110void temac_indirect_out32(struct temac_local *lp, int reg, u32 value)
111{
112 if (temac_indirect_busywait(lp))
113 return;
114 temac_iow(lp, XTE_LSW0_OFFSET, value);
115 temac_iow(lp, XTE_CTL0_OFFSET, CNTLREG_WRITE_ENABLE_MASK | reg);
116}
117
118static u32 temac_dma_in32(struct temac_local *lp, int reg)
119{
120 return dcr_read(lp->sdma_dcrs, reg);
121}
122
123static void temac_dma_out32(struct temac_local *lp, int reg, u32 value)
124{
125 dcr_write(lp->sdma_dcrs, reg, value);
126}
127
128/**
129 * temac_dma_bd_init - Setup buffer descriptor rings
130 */
131static int temac_dma_bd_init(struct net_device *ndev)
132{
133 struct temac_local *lp = netdev_priv(ndev);
134 struct sk_buff *skb;
135 int i;
136
137 lp->rx_skb = kzalloc(sizeof(struct sk_buff)*RX_BD_NUM, GFP_KERNEL);
138 /* allocate the tx and rx ring buffer descriptors. */
139 /* returns a virtual addres and a physical address. */
140 lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent,
141 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
142 &lp->tx_bd_p, GFP_KERNEL);
143 lp->rx_bd_v = dma_alloc_coherent(ndev->dev.parent,
144 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
145 &lp->rx_bd_p, GFP_KERNEL);
146
147 memset(lp->tx_bd_v, 0, sizeof(*lp->tx_bd_v) * TX_BD_NUM);
148 for (i = 0; i < TX_BD_NUM; i++) {
149 lp->tx_bd_v[i].next = lp->tx_bd_p +
150 sizeof(*lp->tx_bd_v) * ((i + 1) % TX_BD_NUM);
151 }
152
153 memset(lp->rx_bd_v, 0, sizeof(*lp->rx_bd_v) * RX_BD_NUM);
154 for (i = 0; i < RX_BD_NUM; i++) {
155 lp->rx_bd_v[i].next = lp->rx_bd_p +
156 sizeof(*lp->rx_bd_v) * ((i + 1) % RX_BD_NUM);
157
158 skb = alloc_skb(XTE_MAX_JUMBO_FRAME_SIZE
159 + XTE_ALIGN, GFP_ATOMIC);
160 if (skb == 0) {
161 dev_err(&ndev->dev, "alloc_skb error %d\n", i);
162 return -1;
163 }
164 lp->rx_skb[i] = skb;
165 skb_reserve(skb, BUFFER_ALIGN(skb->data));
166 /* returns physical address of skb->data */
167 lp->rx_bd_v[i].phys = dma_map_single(ndev->dev.parent,
168 skb->data,
169 XTE_MAX_JUMBO_FRAME_SIZE,
170 DMA_FROM_DEVICE);
171 lp->rx_bd_v[i].len = XTE_MAX_JUMBO_FRAME_SIZE;
172 lp->rx_bd_v[i].app0 = STS_CTRL_APP0_IRQONEND;
173 }
174
175 temac_dma_out32(lp, TX_CHNL_CTRL, 0x10220400 |
176 CHNL_CTRL_IRQ_EN |
177 CHNL_CTRL_IRQ_DLY_EN |
178 CHNL_CTRL_IRQ_COAL_EN);
179 /* 0x10220483 */
180 /* 0x00100483 */
181 temac_dma_out32(lp, RX_CHNL_CTRL, 0xff010000 |
182 CHNL_CTRL_IRQ_EN |
183 CHNL_CTRL_IRQ_DLY_EN |
184 CHNL_CTRL_IRQ_COAL_EN |
185 CHNL_CTRL_IRQ_IOE);
186 /* 0xff010283 */
187
188 temac_dma_out32(lp, RX_CURDESC_PTR, lp->rx_bd_p);
189 temac_dma_out32(lp, RX_TAILDESC_PTR,
190 lp->rx_bd_p + (sizeof(*lp->rx_bd_v) * (RX_BD_NUM - 1)));
191 temac_dma_out32(lp, TX_CURDESC_PTR, lp->tx_bd_p);
192
193 return 0;
194}
195
196/* ---------------------------------------------------------------------
197 * net_device_ops
198 */
199
200static int temac_set_mac_address(struct net_device *ndev, void *address)
201{
202 struct temac_local *lp = netdev_priv(ndev);
203
204 if (address)
205 memcpy(ndev->dev_addr, address, ETH_ALEN);
206
207 if (!is_valid_ether_addr(ndev->dev_addr))
208 random_ether_addr(ndev->dev_addr);
209
210 /* set up unicast MAC address filter set its mac address */
211 mutex_lock(&lp->indirect_mutex);
212 temac_indirect_out32(lp, XTE_UAW0_OFFSET,
213 (ndev->dev_addr[0]) |
214 (ndev->dev_addr[1] << 8) |
215 (ndev->dev_addr[2] << 16) |
216 (ndev->dev_addr[3] << 24));
217 /* There are reserved bits in EUAW1
218 * so don't affect them Set MAC bits [47:32] in EUAW1 */
219 temac_indirect_out32(lp, XTE_UAW1_OFFSET,
220 (ndev->dev_addr[4] & 0x000000ff) |
221 (ndev->dev_addr[5] << 8));
222 mutex_unlock(&lp->indirect_mutex);
223
224 return 0;
225}
226
227static void temac_set_multicast_list(struct net_device *ndev)
228{
229 struct temac_local *lp = netdev_priv(ndev);
230 u32 multi_addr_msw, multi_addr_lsw, val;
231 int i;
232
233 mutex_lock(&lp->indirect_mutex);
234 if (ndev->flags & (IFF_ALLMULTI | IFF_PROMISC)
235 || ndev->mc_count > MULTICAST_CAM_TABLE_NUM) {
236 /*
237 * We must make the kernel realise we had to move
238 * into promisc mode or we start all out war on
239 * the cable. If it was a promisc request the
240 * flag is already set. If not we assert it.
241 */
242 ndev->flags |= IFF_PROMISC;
243 temac_indirect_out32(lp, XTE_AFM_OFFSET, XTE_AFM_EPPRM_MASK);
244 dev_info(&ndev->dev, "Promiscuous mode enabled.\n");
245 } else if (ndev->mc_count) {
246 struct dev_mc_list *mclist = ndev->mc_list;
247 for (i = 0; mclist && i < ndev->mc_count; i++) {
248
249 if (i >= MULTICAST_CAM_TABLE_NUM)
250 break;
251 multi_addr_msw = ((mclist->dmi_addr[3] << 24) |
252 (mclist->dmi_addr[2] << 16) |
253 (mclist->dmi_addr[1] << 8) |
254 (mclist->dmi_addr[0]));
255 temac_indirect_out32(lp, XTE_MAW0_OFFSET,
256 multi_addr_msw);
257 multi_addr_lsw = ((mclist->dmi_addr[5] << 8) |
258 (mclist->dmi_addr[4]) | (i << 16));
259 temac_indirect_out32(lp, XTE_MAW1_OFFSET,
260 multi_addr_lsw);
261 mclist = mclist->next;
262 }
263 } else {
264 val = temac_indirect_in32(lp, XTE_AFM_OFFSET);
265 temac_indirect_out32(lp, XTE_AFM_OFFSET,
266 val & ~XTE_AFM_EPPRM_MASK);
267 temac_indirect_out32(lp, XTE_MAW0_OFFSET, 0);
268 temac_indirect_out32(lp, XTE_MAW1_OFFSET, 0);
269 dev_info(&ndev->dev, "Promiscuous mode disabled.\n");
270 }
271 mutex_unlock(&lp->indirect_mutex);
272}
273
274struct temac_option {
275 int flg;
276 u32 opt;
277 u32 reg;
278 u32 m_or;
279 u32 m_and;
280} temac_options[] = {
281 /* Turn on jumbo packet support for both Rx and Tx */
282 {
283 .opt = XTE_OPTION_JUMBO,
284 .reg = XTE_TXC_OFFSET,
285 .m_or = XTE_TXC_TXJMBO_MASK,
286 },
287 {
288 .opt = XTE_OPTION_JUMBO,
289 .reg = XTE_RXC1_OFFSET,
290 .m_or =XTE_RXC1_RXJMBO_MASK,
291 },
292 /* Turn on VLAN packet support for both Rx and Tx */
293 {
294 .opt = XTE_OPTION_VLAN,
295 .reg = XTE_TXC_OFFSET,
296 .m_or =XTE_TXC_TXVLAN_MASK,
297 },
298 {
299 .opt = XTE_OPTION_VLAN,
300 .reg = XTE_RXC1_OFFSET,
301 .m_or =XTE_RXC1_RXVLAN_MASK,
302 },
303 /* Turn on FCS stripping on receive packets */
304 {
305 .opt = XTE_OPTION_FCS_STRIP,
306 .reg = XTE_RXC1_OFFSET,
307 .m_or =XTE_RXC1_RXFCS_MASK,
308 },
309 /* Turn on FCS insertion on transmit packets */
310 {
311 .opt = XTE_OPTION_FCS_INSERT,
312 .reg = XTE_TXC_OFFSET,
313 .m_or =XTE_TXC_TXFCS_MASK,
314 },
315 /* Turn on length/type field checking on receive packets */
316 {
317 .opt = XTE_OPTION_LENTYPE_ERR,
318 .reg = XTE_RXC1_OFFSET,
319 .m_or =XTE_RXC1_RXLT_MASK,
320 },
321 /* Turn on flow control */
322 {
323 .opt = XTE_OPTION_FLOW_CONTROL,
324 .reg = XTE_FCC_OFFSET,
325 .m_or =XTE_FCC_RXFLO_MASK,
326 },
327 /* Turn on flow control */
328 {
329 .opt = XTE_OPTION_FLOW_CONTROL,
330 .reg = XTE_FCC_OFFSET,
331 .m_or =XTE_FCC_TXFLO_MASK,
332 },
333 /* Turn on promiscuous frame filtering (all frames are received ) */
334 {
335 .opt = XTE_OPTION_PROMISC,
336 .reg = XTE_AFM_OFFSET,
337 .m_or =XTE_AFM_EPPRM_MASK,
338 },
339 /* Enable transmitter if not already enabled */
340 {
341 .opt = XTE_OPTION_TXEN,
342 .reg = XTE_TXC_OFFSET,
343 .m_or =XTE_TXC_TXEN_MASK,
344 },
345 /* Enable receiver? */
346 {
347 .opt = XTE_OPTION_RXEN,
348 .reg = XTE_RXC1_OFFSET,
349 .m_or =XTE_RXC1_RXEN_MASK,
350 },
351 {}
352};
353
354/**
355 * temac_setoptions
356 */
357static u32 temac_setoptions(struct net_device *ndev, u32 options)
358{
359 struct temac_local *lp = netdev_priv(ndev);
360 struct temac_option *tp = &temac_options[0];
361 int reg;
362
363 mutex_lock(&lp->indirect_mutex);
364 while (tp->opt) {
365 reg = temac_indirect_in32(lp, tp->reg) & ~tp->m_or;
366 if (options & tp->opt)
367 reg |= tp->m_or;
368 temac_indirect_out32(lp, tp->reg, reg);
369 tp++;
370 }
371 lp->options |= options;
372 mutex_unlock(&lp->indirect_mutex);
373
374 return (0);
375}
376
377/* Initilize temac */
378static void temac_device_reset(struct net_device *ndev)
379{
380 struct temac_local *lp = netdev_priv(ndev);
381 u32 timeout;
382 u32 val;
383
384 /* Perform a software reset */
385
386 /* 0x300 host enable bit ? */
387 /* reset PHY through control register ?:1 */
388
389 dev_dbg(&ndev->dev, "%s()\n", __func__);
390
391 mutex_lock(&lp->indirect_mutex);
392 /* Reset the receiver and wait for it to finish reset */
393 temac_indirect_out32(lp, XTE_RXC1_OFFSET, XTE_RXC1_RXRST_MASK);
394 timeout = 1000;
395 while (temac_indirect_in32(lp, XTE_RXC1_OFFSET) & XTE_RXC1_RXRST_MASK) {
396 udelay(1);
397 if (--timeout == 0) {
398 dev_err(&ndev->dev,
399 "temac_device_reset RX reset timeout!!\n");
400 break;
401 }
402 }
403
404 /* Reset the transmitter and wait for it to finish reset */
405 temac_indirect_out32(lp, XTE_TXC_OFFSET, XTE_TXC_TXRST_MASK);
406 timeout = 1000;
407 while (temac_indirect_in32(lp, XTE_TXC_OFFSET) & XTE_TXC_TXRST_MASK) {
408 udelay(1);
409 if (--timeout == 0) {
410 dev_err(&ndev->dev,
411 "temac_device_reset TX reset timeout!!\n");
412 break;
413 }
414 }
415
416 /* Disable the receiver */
417 val = temac_indirect_in32(lp, XTE_RXC1_OFFSET);
418 temac_indirect_out32(lp, XTE_RXC1_OFFSET, val & ~XTE_RXC1_RXEN_MASK);
419
420 /* Reset Local Link (DMA) */
421 temac_dma_out32(lp, DMA_CONTROL_REG, DMA_CONTROL_RST);
422 timeout = 1000;
423 while (temac_dma_in32(lp, DMA_CONTROL_REG) & DMA_CONTROL_RST) {
424 udelay(1);
425 if (--timeout == 0) {
426 dev_err(&ndev->dev,
427 "temac_device_reset DMA reset timeout!!\n");
428 break;
429 }
430 }
431 temac_dma_out32(lp, DMA_CONTROL_REG, DMA_TAIL_ENABLE);
432
433 temac_dma_bd_init(ndev);
434
435 temac_indirect_out32(lp, XTE_RXC0_OFFSET, 0);
436 temac_indirect_out32(lp, XTE_RXC1_OFFSET, 0);
437 temac_indirect_out32(lp, XTE_TXC_OFFSET, 0);
438 temac_indirect_out32(lp, XTE_FCC_OFFSET, XTE_FCC_RXFLO_MASK);
439
440 mutex_unlock(&lp->indirect_mutex);
441
442 /* Sync default options with HW
443 * but leave receiver and transmitter disabled. */
444 temac_setoptions(ndev,
445 lp->options & ~(XTE_OPTION_TXEN | XTE_OPTION_RXEN));
446
447 temac_set_mac_address(ndev, NULL);
448
449 /* Set address filter table */
450 temac_set_multicast_list(ndev);
451 if (temac_setoptions(ndev, lp->options))
452 dev_err(&ndev->dev, "Error setting TEMAC options\n");
453
454 /* Init Driver variable */
455 ndev->trans_start = 0;
456}
457
458void temac_adjust_link(struct net_device *ndev)
459{
460 struct temac_local *lp = netdev_priv(ndev);
461 struct phy_device *phy = lp->phy_dev;
462 u32 mii_speed;
463 int link_state;
464
465 /* hash together the state values to decide if something has changed */
466 link_state = phy->speed | (phy->duplex << 1) | phy->link;
467
468 mutex_lock(&lp->indirect_mutex);
469 if (lp->last_link != link_state) {
470 mii_speed = temac_indirect_in32(lp, XTE_EMCFG_OFFSET);
471 mii_speed &= ~XTE_EMCFG_LINKSPD_MASK;
472
473 switch (phy->speed) {
474 case SPEED_1000: mii_speed |= XTE_EMCFG_LINKSPD_1000; break;
475 case SPEED_100: mii_speed |= XTE_EMCFG_LINKSPD_100; break;
476 case SPEED_10: mii_speed |= XTE_EMCFG_LINKSPD_10; break;
477 }
478
479 /* Write new speed setting out to TEMAC */
480 temac_indirect_out32(lp, XTE_EMCFG_OFFSET, mii_speed);
481 lp->last_link = link_state;
482 phy_print_status(phy);
483 }
484 mutex_unlock(&lp->indirect_mutex);
485}
486
487static void temac_start_xmit_done(struct net_device *ndev)
488{
489 struct temac_local *lp = netdev_priv(ndev);
490 struct cdmac_bd *cur_p;
491 unsigned int stat = 0;
492
493 cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
494 stat = cur_p->app0;
495
496 while (stat & STS_CTRL_APP0_CMPLT) {
497 dma_unmap_single(ndev->dev.parent, cur_p->phys, cur_p->len,
498 DMA_TO_DEVICE);
499 if (cur_p->app4)
500 dev_kfree_skb_irq((struct sk_buff *)cur_p->app4);
501 cur_p->app0 = 0;
502
503 ndev->stats.tx_packets++;
504 ndev->stats.tx_bytes += cur_p->len;
505
506 lp->tx_bd_ci++;
507 if (lp->tx_bd_ci >= TX_BD_NUM)
508 lp->tx_bd_ci = 0;
509
510 cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
511 stat = cur_p->app0;
512 }
513
514 netif_wake_queue(ndev);
515}
516
517static int temac_start_xmit(struct sk_buff *skb, struct net_device *ndev)
518{
519 struct temac_local *lp = netdev_priv(ndev);
520 struct cdmac_bd *cur_p;
521 dma_addr_t start_p, tail_p;
522 int ii;
523 unsigned long num_frag;
524 skb_frag_t *frag;
525
526 num_frag = skb_shinfo(skb)->nr_frags;
527 frag = &skb_shinfo(skb)->frags[0];
528 start_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
529 cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
530
531 if (cur_p->app0 & STS_CTRL_APP0_CMPLT) {
532 if (!netif_queue_stopped(ndev)) {
533 netif_stop_queue(ndev);
534 return NETDEV_TX_BUSY;
535 }
536 return NETDEV_TX_BUSY;
537 }
538
539 cur_p->app0 = 0;
540 if (skb->ip_summed == CHECKSUM_PARTIAL) {
541 const struct iphdr *ip = ip_hdr(skb);
542 int length = 0, start = 0, insert = 0;
543
544 switch (ip->protocol) {
545 case IPPROTO_TCP:
546 start = sizeof(struct iphdr) + ETH_HLEN;
547 insert = sizeof(struct iphdr) + ETH_HLEN + 16;
548 length = ip->tot_len - sizeof(struct iphdr);
549 break;
550 case IPPROTO_UDP:
551 start = sizeof(struct iphdr) + ETH_HLEN;
552 insert = sizeof(struct iphdr) + ETH_HLEN + 6;
553 length = ip->tot_len - sizeof(struct iphdr);
554 break;
555 default:
556 break;
557 }
558 cur_p->app1 = ((start << 16) | insert);
559 cur_p->app2 = csum_tcpudp_magic(ip->saddr, ip->daddr,
560 length, ip->protocol, 0);
561 skb->data[insert] = 0;
562 skb->data[insert + 1] = 0;
563 }
564 cur_p->app0 |= STS_CTRL_APP0_SOP;
565 cur_p->len = skb_headlen(skb);
566 cur_p->phys = dma_map_single(ndev->dev.parent, skb->data, skb->len,
567 DMA_TO_DEVICE);
568 cur_p->app4 = (unsigned long)skb;
569
570 for (ii = 0; ii < num_frag; ii++) {
571 lp->tx_bd_tail++;
572 if (lp->tx_bd_tail >= TX_BD_NUM)
573 lp->tx_bd_tail = 0;
574
575 cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
576 cur_p->phys = dma_map_single(ndev->dev.parent,
577 (void *)page_address(frag->page) +
578 frag->page_offset,
579 frag->size, DMA_TO_DEVICE);
580 cur_p->len = frag->size;
581 cur_p->app0 = 0;
582 frag++;
583 }
584 cur_p->app0 |= STS_CTRL_APP0_EOP;
585
586 tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
587 lp->tx_bd_tail++;
588 if (lp->tx_bd_tail >= TX_BD_NUM)
589 lp->tx_bd_tail = 0;
590
591 /* Kick off the transfer */
592 temac_dma_out32(lp, TX_TAILDESC_PTR, tail_p); /* DMA start */
593
594 return 0;
595}
596
597
598static void ll_temac_recv(struct net_device *ndev)
599{
600 struct temac_local *lp = netdev_priv(ndev);
601 struct sk_buff *skb, *new_skb;
602 unsigned int bdstat;
603 struct cdmac_bd *cur_p;
604 dma_addr_t tail_p;
605 int length;
606 unsigned long skb_vaddr;
607 unsigned long flags;
608
609 spin_lock_irqsave(&lp->rx_lock, flags);
610
611 tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci;
612 cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
613
614 bdstat = cur_p->app0;
615 while ((bdstat & STS_CTRL_APP0_CMPLT)) {
616
617 skb = lp->rx_skb[lp->rx_bd_ci];
618 length = cur_p->app4;
619
620 skb_vaddr = virt_to_bus(skb->data);
621 dma_unmap_single(ndev->dev.parent, skb_vaddr, length,
622 DMA_FROM_DEVICE);
623
624 skb_put(skb, length);
625 skb->dev = ndev;
626 skb->protocol = eth_type_trans(skb, ndev);
627 skb->ip_summed = CHECKSUM_NONE;
628
629 netif_rx(skb);
630
631 ndev->stats.rx_packets++;
632 ndev->stats.rx_bytes += length;
633
634 new_skb = alloc_skb(XTE_MAX_JUMBO_FRAME_SIZE + XTE_ALIGN,
635 GFP_ATOMIC);
636 if (new_skb == 0) {
637 dev_err(&ndev->dev, "no memory for new sk_buff\n");
638 spin_unlock_irqrestore(&lp->rx_lock, flags);
639 return;
640 }
641
642 skb_reserve(new_skb, BUFFER_ALIGN(new_skb->data));
643
644 cur_p->app0 = STS_CTRL_APP0_IRQONEND;
645 cur_p->phys = dma_map_single(ndev->dev.parent, new_skb->data,
646 XTE_MAX_JUMBO_FRAME_SIZE,
647 DMA_FROM_DEVICE);
648 cur_p->len = XTE_MAX_JUMBO_FRAME_SIZE;
649 lp->rx_skb[lp->rx_bd_ci] = new_skb;
650
651 lp->rx_bd_ci++;
652 if (lp->rx_bd_ci >= RX_BD_NUM)
653 lp->rx_bd_ci = 0;
654
655 cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
656 bdstat = cur_p->app0;
657 }
658 temac_dma_out32(lp, RX_TAILDESC_PTR, tail_p);
659
660 spin_unlock_irqrestore(&lp->rx_lock, flags);
661}
662
663static irqreturn_t ll_temac_tx_irq(int irq, void *_ndev)
664{
665 struct net_device *ndev = _ndev;
666 struct temac_local *lp = netdev_priv(ndev);
667 unsigned int status;
668
669 status = temac_dma_in32(lp, TX_IRQ_REG);
670 temac_dma_out32(lp, TX_IRQ_REG, status);
671
672 if (status & (IRQ_COAL | IRQ_DLY))
673 temac_start_xmit_done(lp->ndev);
674 if (status & 0x080)
675 dev_err(&ndev->dev, "DMA error 0x%x\n", status);
676
677 return IRQ_HANDLED;
678}
679
680static irqreturn_t ll_temac_rx_irq(int irq, void *_ndev)
681{
682 struct net_device *ndev = _ndev;
683 struct temac_local *lp = netdev_priv(ndev);
684 unsigned int status;
685
686 /* Read and clear the status registers */
687 status = temac_dma_in32(lp, RX_IRQ_REG);
688 temac_dma_out32(lp, RX_IRQ_REG, status);
689
690 if (status & (IRQ_COAL | IRQ_DLY))
691 ll_temac_recv(lp->ndev);
692
693 return IRQ_HANDLED;
694}
695
696static int temac_open(struct net_device *ndev)
697{
698 struct temac_local *lp = netdev_priv(ndev);
699 int rc;
700
701 dev_dbg(&ndev->dev, "temac_open()\n");
702
703 if (lp->phy_node) {
704 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
705 temac_adjust_link, 0, 0);
706 if (!lp->phy_dev) {
707 dev_err(lp->dev, "of_phy_connect() failed\n");
708 return -ENODEV;
709 }
710
711 phy_start(lp->phy_dev);
712 }
713
714 rc = request_irq(lp->tx_irq, ll_temac_tx_irq, 0, ndev->name, ndev);
715 if (rc)
716 goto err_tx_irq;
717 rc = request_irq(lp->rx_irq, ll_temac_rx_irq, 0, ndev->name, ndev);
718 if (rc)
719 goto err_rx_irq;
720
721 temac_device_reset(ndev);
722 return 0;
723
724 err_rx_irq:
725 free_irq(lp->tx_irq, ndev);
726 err_tx_irq:
727 if (lp->phy_dev)
728 phy_disconnect(lp->phy_dev);
729 lp->phy_dev = NULL;
730 dev_err(lp->dev, "request_irq() failed\n");
731 return rc;
732}
733
734static int temac_stop(struct net_device *ndev)
735{
736 struct temac_local *lp = netdev_priv(ndev);
737
738 dev_dbg(&ndev->dev, "temac_close()\n");
739
740 free_irq(lp->tx_irq, ndev);
741 free_irq(lp->rx_irq, ndev);
742
743 if (lp->phy_dev)
744 phy_disconnect(lp->phy_dev);
745 lp->phy_dev = NULL;
746
747 return 0;
748}
749
750#ifdef CONFIG_NET_POLL_CONTROLLER
751static void
752temac_poll_controller(struct net_device *ndev)
753{
754 struct temac_local *lp = netdev_priv(ndev);
755
756 disable_irq(lp->tx_irq);
757 disable_irq(lp->rx_irq);
758
759 ll_temac_rx_irq(lp->tx_irq, lp);
760 ll_temac_tx_irq(lp->rx_irq, lp);
761
762 enable_irq(lp->tx_irq);
763 enable_irq(lp->rx_irq);
764}
765#endif
766
767static const struct net_device_ops temac_netdev_ops = {
768 .ndo_open = temac_open,
769 .ndo_stop = temac_stop,
770 .ndo_start_xmit = temac_start_xmit,
771 .ndo_set_mac_address = temac_set_mac_address,
772 //.ndo_set_multicast_list = temac_set_multicast_list,
773#ifdef CONFIG_NET_POLL_CONTROLLER
774 .ndo_poll_controller = temac_poll_controller,
775#endif
776};
777
778/* ---------------------------------------------------------------------
779 * SYSFS device attributes
780 */
781static ssize_t temac_show_llink_regs(struct device *dev,
782 struct device_attribute *attr, char *buf)
783{
784 struct net_device *ndev = dev_get_drvdata(dev);
785 struct temac_local *lp = netdev_priv(ndev);
786 int i, len = 0;
787
788 for (i = 0; i < 0x11; i++)
789 len += sprintf(buf + len, "%.8x%s", temac_dma_in32(lp, i),
790 (i % 8) == 7 ? "\n" : " ");
791 len += sprintf(buf + len, "\n");
792
793 return len;
794}
795
796static DEVICE_ATTR(llink_regs, 0440, temac_show_llink_regs, NULL);
797
798static struct attribute *temac_device_attrs[] = {
799 &dev_attr_llink_regs.attr,
800 NULL,
801};
802
803static const struct attribute_group temac_attr_group = {
804 .attrs = temac_device_attrs,
805};
806
807static int __init
808temac_of_probe(struct of_device *op, const struct of_device_id *match)
809{
810 struct device_node *np;
811 struct temac_local *lp;
812 struct net_device *ndev;
813 const void *addr;
814 int size, rc = 0;
815 unsigned int dcrs;
816
817 /* Init network device structure */
818 ndev = alloc_etherdev(sizeof(*lp));
819 if (!ndev) {
820 dev_err(&op->dev, "could not allocate device.\n");
821 return -ENOMEM;
822 }
823 ether_setup(ndev);
824 dev_set_drvdata(&op->dev, ndev);
825 SET_NETDEV_DEV(ndev, &op->dev);
826 ndev->flags &= ~IFF_MULTICAST; /* clear multicast */
827 ndev->features = NETIF_F_SG | NETIF_F_FRAGLIST;
828 ndev->netdev_ops = &temac_netdev_ops;
829#if 0
830 ndev->features |= NETIF_F_IP_CSUM; /* Can checksum TCP/UDP over IPv4. */
831 ndev->features |= NETIF_F_HW_CSUM; /* Can checksum all the packets. */
832 ndev->features |= NETIF_F_IPV6_CSUM; /* Can checksum IPV6 TCP/UDP */
833 ndev->features |= NETIF_F_HIGHDMA; /* Can DMA to high memory. */
834 ndev->features |= NETIF_F_HW_VLAN_TX; /* Transmit VLAN hw accel */
835 ndev->features |= NETIF_F_HW_VLAN_RX; /* Receive VLAN hw acceleration */
836 ndev->features |= NETIF_F_HW_VLAN_FILTER; /* Receive VLAN filtering */
837 ndev->features |= NETIF_F_VLAN_CHALLENGED; /* cannot handle VLAN pkts */
838 ndev->features |= NETIF_F_GSO; /* Enable software GSO. */
839 ndev->features |= NETIF_F_MULTI_QUEUE; /* Has multiple TX/RX queues */
840 ndev->features |= NETIF_F_LRO; /* large receive offload */
841#endif
842
843 /* setup temac private info structure */
844 lp = netdev_priv(ndev);
845 lp->ndev = ndev;
846 lp->dev = &op->dev;
847 lp->options = XTE_OPTION_DEFAULTS;
848 spin_lock_init(&lp->rx_lock);
849 mutex_init(&lp->indirect_mutex);
850
851 /* map device registers */
852 lp->regs = of_iomap(op->node, 0);
853 if (!lp->regs) {
854 dev_err(&op->dev, "could not map temac regs.\n");
855 goto nodev;
856 }
857
858 /* Find the DMA node, map the DMA registers, and decode the DMA IRQs */
859 np = of_parse_phandle(op->node, "llink-connected", 0);
860 if (!np) {
861 dev_err(&op->dev, "could not find DMA node\n");
862 goto nodev;
863 }
864
865 dcrs = dcr_resource_start(np, 0);
866 if (dcrs == 0) {
867 dev_err(&op->dev, "could not get DMA register address\n");
868 goto nodev;;
869 }
870 lp->sdma_dcrs = dcr_map(np, dcrs, dcr_resource_len(np, 0));
871 dev_dbg(&op->dev, "DCR base: %x\n", dcrs);
872
873 lp->rx_irq = irq_of_parse_and_map(np, 0);
874 lp->tx_irq = irq_of_parse_and_map(np, 1);
875 if (!lp->rx_irq || !lp->tx_irq) {
876 dev_err(&op->dev, "could not determine irqs\n");
877 rc = -ENOMEM;
878 goto nodev;
879 }
880
881 of_node_put(np); /* Finished with the DMA node; drop the reference */
882
883 /* Retrieve the MAC address */
884 addr = of_get_property(op->node, "local-mac-address", &size);
885 if ((!addr) || (size != 6)) {
886 dev_err(&op->dev, "could not find MAC address\n");
887 rc = -ENODEV;
888 goto nodev;
889 }
890 temac_set_mac_address(ndev, (void *)addr);
891
892 rc = temac_mdio_setup(lp, op->node);
893 if (rc)
894 dev_warn(&op->dev, "error registering MDIO bus\n");
895
896 lp->phy_node = of_parse_phandle(op->node, "phy-handle", 0);
897 if (lp->phy_node)
898 dev_dbg(lp->dev, "using PHY node %s (%p)\n", np->full_name, np);
899
900 /* Add the device attributes */
901 rc = sysfs_create_group(&lp->dev->kobj, &temac_attr_group);
902 if (rc) {
903 dev_err(lp->dev, "Error creating sysfs files\n");
904 goto nodev;
905 }
906
907 rc = register_netdev(lp->ndev);
908 if (rc) {
909 dev_err(lp->dev, "register_netdev() error (%i)\n", rc);
910 goto err_register_ndev;
911 }
912
913 return 0;
914
915 err_register_ndev:
916 sysfs_remove_group(&lp->dev->kobj, &temac_attr_group);
917 nodev:
918 free_netdev(ndev);
919 ndev = NULL;
920 return rc;
921}
922
923static int __devexit temac_of_remove(struct of_device *op)
924{
925 struct net_device *ndev = dev_get_drvdata(&op->dev);
926 struct temac_local *lp = netdev_priv(ndev);
927
928 temac_mdio_teardown(lp);
929 unregister_netdev(ndev);
930 sysfs_remove_group(&lp->dev->kobj, &temac_attr_group);
931 if (lp->phy_node)
932 of_node_put(lp->phy_node);
933 lp->phy_node = NULL;
934 dev_set_drvdata(&op->dev, NULL);
935 free_netdev(ndev);
936 return 0;
937}
938
939static struct of_device_id temac_of_match[] __devinitdata = {
940 { .compatible = "xlnx,xps-ll-temac-1.01.b", },
941 {},
942};
943MODULE_DEVICE_TABLE(of, temac_of_match);
944
945static struct of_platform_driver temac_of_driver = {
946 .match_table = temac_of_match,
947 .probe = temac_of_probe,
948 .remove = __devexit_p(temac_of_remove),
949 .driver = {
950 .owner = THIS_MODULE,
951 .name = "xilinx_temac",
952 },
953};
954
955static int __init temac_init(void)
956{
957 return of_register_platform_driver(&temac_of_driver);
958}
959module_init(temac_init);
960
961static void __exit temac_exit(void)
962{
963 of_unregister_platform_driver(&temac_of_driver);
964}
965module_exit(temac_exit);
966
967MODULE_DESCRIPTION("Xilinx LL_TEMAC Ethernet driver");
968MODULE_AUTHOR("Yoshio Kashiwagi");
969MODULE_LICENSE("GPL");
diff --git a/drivers/net/ll_temac_mdio.c b/drivers/net/ll_temac_mdio.c
new file mode 100644
index 000000000000..da0e462308d5
--- /dev/null
+++ b/drivers/net/ll_temac_mdio.c
@@ -0,0 +1,120 @@
1/*
2 * MDIO bus driver for the Xilinx TEMAC device
3 *
4 * Copyright (c) 2009 Secret Lab Technologies, Ltd.
5 */
6
7#include <linux/io.h>
8#include <linux/netdevice.h>
9#include <linux/mutex.h>
10#include <linux/phy.h>
11#include <linux/of.h>
12#include <linux/of_device.h>
13#include <linux/of_mdio.h>
14
15#include "ll_temac.h"
16
17/* ---------------------------------------------------------------------
18 * MDIO Bus functions
19 */
20static int temac_mdio_read(struct mii_bus *bus, int phy_id, int reg)
21{
22 struct temac_local *lp = bus->priv;
23 u32 rc;
24
25 /* Write the PHY address to the MIIM Access Initiator register.
26 * When the transfer completes, the PHY register value will appear
27 * in the LSW0 register */
28 mutex_lock(&lp->indirect_mutex);
29 temac_iow(lp, XTE_LSW0_OFFSET, (phy_id << 5) | reg);
30 rc = temac_indirect_in32(lp, XTE_MIIMAI_OFFSET);
31 mutex_unlock(&lp->indirect_mutex);
32
33 dev_dbg(lp->dev, "temac_mdio_read(phy_id=%i, reg=%x) == %x\n",
34 phy_id, reg, rc);
35
36 return rc;
37}
38
39static int temac_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 val)
40{
41 struct temac_local *lp = bus->priv;
42
43 dev_dbg(lp->dev, "temac_mdio_write(phy_id=%i, reg=%x, val=%x)\n",
44 phy_id, reg, val);
45
46 /* First write the desired value into the write data register
47 * and then write the address into the access initiator register
48 */
49 mutex_lock(&lp->indirect_mutex);
50 temac_indirect_out32(lp, XTE_MGTDR_OFFSET, val);
51 temac_indirect_out32(lp, XTE_MIIMAI_OFFSET, (phy_id << 5) | reg);
52 mutex_unlock(&lp->indirect_mutex);
53
54 return 0;
55}
56
57int temac_mdio_setup(struct temac_local *lp, struct device_node *np)
58{
59 struct mii_bus *bus;
60 const u32 *bus_hz;
61 int clk_div;
62 int rc, size;
63 struct resource res;
64
65 /* Calculate a reasonable divisor for the clock rate */
66 clk_div = 0x3f; /* worst-case default setting */
67 bus_hz = of_get_property(np, "clock-frequency", &size);
68 if (bus_hz && size >= sizeof(*bus_hz)) {
69 clk_div = (*bus_hz) / (2500 * 1000 * 2) - 1;
70 if (clk_div < 1)
71 clk_div = 1;
72 if (clk_div > 0x3f)
73 clk_div = 0x3f;
74 }
75
76 /* Enable the MDIO bus by asserting the enable bit and writing
77 * in the clock config */
78 mutex_lock(&lp->indirect_mutex);
79 temac_indirect_out32(lp, XTE_MC_OFFSET, 1 << 6 | clk_div);
80 mutex_unlock(&lp->indirect_mutex);
81
82 bus = mdiobus_alloc();
83 if (!bus)
84 return -ENOMEM;
85
86 of_address_to_resource(np, 0, &res);
87 snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
88 (unsigned long long)res.start);
89 bus->priv = lp;
90 bus->name = "Xilinx TEMAC MDIO";
91 bus->read = temac_mdio_read;
92 bus->write = temac_mdio_write;
93 bus->parent = lp->dev;
94 bus->irq = lp->mdio_irqs; /* preallocated IRQ table */
95
96 lp->mii_bus = bus;
97
98 rc = of_mdiobus_register(bus, np);
99 if (rc)
100 goto err_register;
101
102 mutex_lock(&lp->indirect_mutex);
103 dev_dbg(lp->dev, "MDIO bus registered; MC:%x\n",
104 temac_indirect_in32(lp, XTE_MC_OFFSET));
105 mutex_unlock(&lp->indirect_mutex);
106 return 0;
107
108 err_register:
109 mdiobus_free(bus);
110 return rc;
111}
112
113void temac_mdio_teardown(struct temac_local *lp)
114{
115 mdiobus_unregister(lp->mii_bus);
116 kfree(lp->mii_bus->irq);
117 mdiobus_free(lp->mii_bus);
118 lp->mii_bus = NULL;
119}
120
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c
index b7d438a367f3..da472c687481 100644
--- a/drivers/net/loopback.c
+++ b/drivers/net/loopback.c
@@ -62,6 +62,7 @@
62struct pcpu_lstats { 62struct pcpu_lstats {
63 unsigned long packets; 63 unsigned long packets;
64 unsigned long bytes; 64 unsigned long bytes;
65 unsigned long drops;
65}; 66};
66 67
67/* 68/*
@@ -71,18 +72,22 @@ struct pcpu_lstats {
71static int loopback_xmit(struct sk_buff *skb, struct net_device *dev) 72static int loopback_xmit(struct sk_buff *skb, struct net_device *dev)
72{ 73{
73 struct pcpu_lstats *pcpu_lstats, *lb_stats; 74 struct pcpu_lstats *pcpu_lstats, *lb_stats;
75 int len;
74 76
75 skb_orphan(skb); 77 skb_orphan(skb);
76 78
77 skb->protocol = eth_type_trans(skb,dev); 79 skb->protocol = eth_type_trans(skb, dev);
78 80
79 /* it's OK to use per_cpu_ptr() because BHs are off */ 81 /* it's OK to use per_cpu_ptr() because BHs are off */
80 pcpu_lstats = dev->ml_priv; 82 pcpu_lstats = dev->ml_priv;
81 lb_stats = per_cpu_ptr(pcpu_lstats, smp_processor_id()); 83 lb_stats = per_cpu_ptr(pcpu_lstats, smp_processor_id());
82 lb_stats->bytes += skb->len;
83 lb_stats->packets++;
84 84
85 netif_rx(skb); 85 len = skb->len;
86 if (likely(netif_rx(skb) == NET_RX_SUCCESS)) {
87 lb_stats->bytes += len;
88 lb_stats->packets++;
89 } else
90 lb_stats->drops++;
86 91
87 return 0; 92 return 0;
88} 93}
@@ -93,6 +98,7 @@ static struct net_device_stats *loopback_get_stats(struct net_device *dev)
93 struct net_device_stats *stats = &dev->stats; 98 struct net_device_stats *stats = &dev->stats;
94 unsigned long bytes = 0; 99 unsigned long bytes = 0;
95 unsigned long packets = 0; 100 unsigned long packets = 0;
101 unsigned long drops = 0;
96 int i; 102 int i;
97 103
98 pcpu_lstats = dev->ml_priv; 104 pcpu_lstats = dev->ml_priv;
@@ -102,11 +108,14 @@ static struct net_device_stats *loopback_get_stats(struct net_device *dev)
102 lb_stats = per_cpu_ptr(pcpu_lstats, i); 108 lb_stats = per_cpu_ptr(pcpu_lstats, i);
103 bytes += lb_stats->bytes; 109 bytes += lb_stats->bytes;
104 packets += lb_stats->packets; 110 packets += lb_stats->packets;
111 drops += lb_stats->drops;
105 } 112 }
106 stats->rx_packets = packets; 113 stats->rx_packets = packets;
107 stats->tx_packets = packets; 114 stats->tx_packets = packets;
108 stats->rx_bytes = bytes; 115 stats->rx_dropped = drops;
109 stats->tx_bytes = bytes; 116 stats->rx_errors = drops;
117 stats->rx_bytes = bytes;
118 stats->tx_bytes = bytes;
110 return stats; 119 return stats;
111} 120}
112 121
@@ -161,6 +170,7 @@ static void loopback_setup(struct net_device *dev)
161 dev->tx_queue_len = 0; 170 dev->tx_queue_len = 0;
162 dev->type = ARPHRD_LOOPBACK; /* 0x0001*/ 171 dev->type = ARPHRD_LOOPBACK; /* 0x0001*/
163 dev->flags = IFF_LOOPBACK; 172 dev->flags = IFF_LOOPBACK;
173 dev->priv_flags &= ~IFF_XMIT_DST_RELEASE;
164 dev->features = NETIF_F_SG | NETIF_F_FRAGLIST 174 dev->features = NETIF_F_SG | NETIF_F_FRAGLIST
165 | NETIF_F_TSO 175 | NETIF_F_TSO
166 | NETIF_F_NO_CSUM 176 | NETIF_F_NO_CSUM
diff --git a/drivers/net/mac8390.c b/drivers/net/mac8390.c
index 22e74a0e0361..f8fa0c3f0f64 100644
--- a/drivers/net/mac8390.c
+++ b/drivers/net/mac8390.c
@@ -620,19 +620,12 @@ static int __init mac8390_initdev(struct net_device * dev, struct nubus_dev * nd
620 620
621 /* Good, done, now spit out some messages */ 621 /* Good, done, now spit out some messages */
622 printk(KERN_INFO "%s: %s in slot %X (type %s)\n", 622 printk(KERN_INFO "%s: %s in slot %X (type %s)\n",
623 dev->name, ndev->board->name, ndev->board->slot, cardname[type]); 623 dev->name, ndev->board->name, ndev->board->slot, cardname[type]);
624 printk(KERN_INFO "MAC "); 624 printk(KERN_INFO
625 { 625 "MAC %pM IRQ %d, %d KB shared memory at %#lx, %d-bit access.\n",
626 int i; 626 dev->dev_addr, dev->irq,
627 for (i = 0; i < 6; i++) { 627 (unsigned int)(dev->mem_end - dev->mem_start) >> 10,
628 printk("%2.2x", dev->dev_addr[i]); 628 dev->mem_start, access_bitmode ? 32 : 16);
629 if (i < 5)
630 printk(":");
631 }
632 }
633 printk(" IRQ %d, %d KB shared memory at %#lx, %d-bit access.\n",
634 dev->irq, (int)((dev->mem_end - dev->mem_start)/0x1000) * 4,
635 dev->mem_start, access_bitmode?32:16);
636 return 0; 629 return 0;
637} 630}
638 631
diff --git a/drivers/net/mac89x0.c b/drivers/net/mac89x0.c
index 384e072de2e7..e24175a39460 100644
--- a/drivers/net/mac89x0.c
+++ b/drivers/net/mac89x0.c
@@ -73,8 +73,6 @@ static char *version =
73 or override something. */ 73 or override something. */
74#include <linux/module.h> 74#include <linux/module.h>
75 75
76#define PRINTK(x) printk x
77
78/* 76/*
79 Sources: 77 Sources:
80 78
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index e82aee41d77e..722265920da8 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -599,6 +599,21 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
599 return IRQ_HANDLED; 599 return IRQ_HANDLED;
600} 600}
601 601
602#ifdef CONFIG_NET_POLL_CONTROLLER
603/*
604 * Polling receive - used by netconsole and other diagnostic tools
605 * to allow network i/o with interrupts disabled.
606 */
607static void macb_poll_controller(struct net_device *dev)
608{
609 unsigned long flags;
610
611 local_irq_save(flags);
612 macb_interrupt(dev->irq, dev);
613 local_irq_restore(flags);
614}
615#endif
616
602static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) 617static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
603{ 618{
604 struct macb *bp = netdev_priv(dev); 619 struct macb *bp = netdev_priv(dev);
@@ -1094,6 +1109,9 @@ static const struct net_device_ops macb_netdev_ops = {
1094 .ndo_validate_addr = eth_validate_addr, 1109 .ndo_validate_addr = eth_validate_addr,
1095 .ndo_change_mtu = eth_change_mtu, 1110 .ndo_change_mtu = eth_change_mtu,
1096 .ndo_set_mac_address = eth_mac_addr, 1111 .ndo_set_mac_address = eth_mac_addr,
1112#ifdef CONFIG_NET_POLL_CONTROLLER
1113 .ndo_poll_controller = macb_poll_controller,
1114#endif
1097}; 1115};
1098 1116
1099static int __init macb_probe(struct platform_device *pdev) 1117static int __init macb_probe(struct platform_device *pdev)
diff --git a/drivers/net/mace.c b/drivers/net/mace.c
index feebbd92aff2..1ad740bc8878 100644
--- a/drivers/net/mace.c
+++ b/drivers/net/mace.c
@@ -94,6 +94,16 @@ static void __mace_set_address(struct net_device *dev, void *addr);
94 */ 94 */
95static unsigned char *dummy_buf; 95static unsigned char *dummy_buf;
96 96
97static const struct net_device_ops mace_netdev_ops = {
98 .ndo_open = mace_open,
99 .ndo_stop = mace_close,
100 .ndo_start_xmit = mace_xmit_start,
101 .ndo_set_multicast_list = mace_set_multicast,
102 .ndo_set_mac_address = mace_set_address,
103 .ndo_change_mtu = eth_change_mtu,
104 .ndo_validate_addr = eth_validate_addr,
105};
106
97static int __devinit mace_probe(struct macio_dev *mdev, const struct of_device_id *match) 107static int __devinit mace_probe(struct macio_dev *mdev, const struct of_device_id *match)
98{ 108{
99 struct device_node *mace = macio_get_of_node(mdev); 109 struct device_node *mace = macio_get_of_node(mdev);
@@ -207,11 +217,7 @@ static int __devinit mace_probe(struct macio_dev *mdev, const struct of_device_i
207 } 217 }
208 } 218 }
209 219
210 dev->open = mace_open; 220 dev->netdev_ops = &mace_netdev_ops;
211 dev->stop = mace_close;
212 dev->hard_start_xmit = mace_xmit_start;
213 dev->set_multicast_list = mace_set_multicast;
214 dev->set_mac_address = mace_set_address;
215 221
216 /* 222 /*
217 * Most of what is below could be moved to mace_open() 223 * Most of what is below could be moved to mace_open()
diff --git a/drivers/net/macmace.c b/drivers/net/macmace.c
index 274e99bb63ac..44f3c2896f20 100644
--- a/drivers/net/macmace.c
+++ b/drivers/net/macmace.c
@@ -180,6 +180,17 @@ static void mace_dma_off(struct net_device *dev)
180 psc_write_word(PSC_ENETWR_CMD + PSC_SET1, 0x1100); 180 psc_write_word(PSC_ENETWR_CMD + PSC_SET1, 0x1100);
181} 181}
182 182
183static const struct net_device_ops mace_netdev_ops = {
184 .ndo_open = mace_open,
185 .ndo_stop = mace_close,
186 .ndo_start_xmit = mace_xmit_start,
187 .ndo_tx_timeout = mace_tx_timeout,
188 .ndo_set_multicast_list = mace_set_multicast,
189 .ndo_set_mac_address = mace_set_address,
190 .ndo_change_mtu = eth_change_mtu,
191 .ndo_validate_addr = eth_validate_addr,
192};
193
183/* 194/*
184 * Not really much of a probe. The hardware table tells us if this 195 * Not really much of a probe. The hardware table tells us if this
185 * model of Macintrash has a MACE (AV macintoshes) 196 * model of Macintrash has a MACE (AV macintoshes)
@@ -240,13 +251,8 @@ static int __devinit mace_probe(struct platform_device *pdev)
240 return -ENODEV; 251 return -ENODEV;
241 } 252 }
242 253
243 dev->open = mace_open; 254 dev->netdev_ops = &mace_netdev_ops;
244 dev->stop = mace_close;
245 dev->hard_start_xmit = mace_xmit_start;
246 dev->tx_timeout = mace_tx_timeout;
247 dev->watchdog_timeo = TX_TIMEOUT; 255 dev->watchdog_timeo = TX_TIMEOUT;
248 dev->set_multicast_list = mace_set_multicast;
249 dev->set_mac_address = mace_set_address;
250 256
251 printk(KERN_INFO "%s: 68K MACE, hardware address %pM\n", 257 printk(KERN_INFO "%s: 68K MACE, hardware address %pM\n",
252 dev->name, dev->dev_addr); 258 dev->name, dev->dev_addr);
diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c
index 214a8cf2b708..021d9941c292 100644
--- a/drivers/net/macvlan.c
+++ b/drivers/net/macvlan.c
@@ -232,7 +232,7 @@ static int macvlan_open(struct net_device *dev)
232 if (macvlan_addr_busy(vlan->port, dev->dev_addr)) 232 if (macvlan_addr_busy(vlan->port, dev->dev_addr))
233 goto out; 233 goto out;
234 234
235 err = dev_unicast_add(lowerdev, dev->dev_addr, ETH_ALEN); 235 err = dev_unicast_add(lowerdev, dev->dev_addr);
236 if (err < 0) 236 if (err < 0)
237 goto out; 237 goto out;
238 if (dev->flags & IFF_ALLMULTI) { 238 if (dev->flags & IFF_ALLMULTI) {
@@ -244,7 +244,7 @@ static int macvlan_open(struct net_device *dev)
244 return 0; 244 return 0;
245 245
246del_unicast: 246del_unicast:
247 dev_unicast_delete(lowerdev, dev->dev_addr, ETH_ALEN); 247 dev_unicast_delete(lowerdev, dev->dev_addr);
248out: 248out:
249 return err; 249 return err;
250} 250}
@@ -258,7 +258,7 @@ static int macvlan_stop(struct net_device *dev)
258 if (dev->flags & IFF_ALLMULTI) 258 if (dev->flags & IFF_ALLMULTI)
259 dev_set_allmulti(lowerdev, -1); 259 dev_set_allmulti(lowerdev, -1);
260 260
261 dev_unicast_delete(lowerdev, dev->dev_addr, ETH_ALEN); 261 dev_unicast_delete(lowerdev, dev->dev_addr);
262 262
263 macvlan_hash_del(vlan); 263 macvlan_hash_del(vlan);
264 return 0; 264 return 0;
@@ -282,10 +282,11 @@ static int macvlan_set_mac_address(struct net_device *dev, void *p)
282 if (macvlan_addr_busy(vlan->port, addr->sa_data)) 282 if (macvlan_addr_busy(vlan->port, addr->sa_data))
283 return -EBUSY; 283 return -EBUSY;
284 284
285 if ((err = dev_unicast_add(lowerdev, addr->sa_data, ETH_ALEN))) 285 err = dev_unicast_add(lowerdev, addr->sa_data);
286 if (err)
286 return err; 287 return err;
287 288
288 dev_unicast_delete(lowerdev, dev->dev_addr, ETH_ALEN); 289 dev_unicast_delete(lowerdev, dev->dev_addr);
289 290
290 macvlan_hash_change_addr(vlan, addr->sa_data); 291 macvlan_hash_change_addr(vlan, addr->sa_data);
291 } 292 }
@@ -374,36 +375,20 @@ static void macvlan_ethtool_get_drvinfo(struct net_device *dev,
374static u32 macvlan_ethtool_get_rx_csum(struct net_device *dev) 375static u32 macvlan_ethtool_get_rx_csum(struct net_device *dev)
375{ 376{
376 const struct macvlan_dev *vlan = netdev_priv(dev); 377 const struct macvlan_dev *vlan = netdev_priv(dev);
377 struct net_device *lowerdev = vlan->lowerdev; 378 return dev_ethtool_get_rx_csum(vlan->lowerdev);
378
379 if (lowerdev->ethtool_ops == NULL ||
380 lowerdev->ethtool_ops->get_rx_csum == NULL)
381 return 0;
382 return lowerdev->ethtool_ops->get_rx_csum(lowerdev);
383} 379}
384 380
385static int macvlan_ethtool_get_settings(struct net_device *dev, 381static int macvlan_ethtool_get_settings(struct net_device *dev,
386 struct ethtool_cmd *cmd) 382 struct ethtool_cmd *cmd)
387{ 383{
388 const struct macvlan_dev *vlan = netdev_priv(dev); 384 const struct macvlan_dev *vlan = netdev_priv(dev);
389 struct net_device *lowerdev = vlan->lowerdev; 385 return dev_ethtool_get_settings(vlan->lowerdev, cmd);
390
391 if (!lowerdev->ethtool_ops ||
392 !lowerdev->ethtool_ops->get_settings)
393 return -EOPNOTSUPP;
394
395 return lowerdev->ethtool_ops->get_settings(lowerdev, cmd);
396} 386}
397 387
398static u32 macvlan_ethtool_get_flags(struct net_device *dev) 388static u32 macvlan_ethtool_get_flags(struct net_device *dev)
399{ 389{
400 const struct macvlan_dev *vlan = netdev_priv(dev); 390 const struct macvlan_dev *vlan = netdev_priv(dev);
401 struct net_device *lowerdev = vlan->lowerdev; 391 return dev_ethtool_get_flags(vlan->lowerdev);
402
403 if (!lowerdev->ethtool_ops ||
404 !lowerdev->ethtool_ops->get_flags)
405 return 0;
406 return lowerdev->ethtool_ops->get_flags(lowerdev);
407} 392}
408 393
409static const struct ethtool_ops macvlan_ethtool_ops = { 394static const struct ethtool_ops macvlan_ethtool_ops = {
@@ -430,6 +415,7 @@ static void macvlan_setup(struct net_device *dev)
430{ 415{
431 ether_setup(dev); 416 ether_setup(dev);
432 417
418 dev->priv_flags &= ~IFF_XMIT_DST_RELEASE;
433 dev->netdev_ops = &macvlan_netdev_ops; 419 dev->netdev_ops = &macvlan_netdev_ops;
434 dev->destructor = free_netdev; 420 dev->destructor = free_netdev;
435 dev->header_ops = &macvlan_hard_header_ops, 421 dev->header_ops = &macvlan_hard_header_ops,
diff --git a/drivers/net/mdio.c b/drivers/net/mdio.c
new file mode 100644
index 000000000000..66483035f683
--- /dev/null
+++ b/drivers/net/mdio.c
@@ -0,0 +1,414 @@
1/*
2 * mdio.c: Generic support for MDIO-compatible transceivers
3 * Copyright 2006-2009 Solarflare Communications Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#include <linux/kernel.h>
11#include <linux/capability.h>
12#include <linux/errno.h>
13#include <linux/ethtool.h>
14#include <linux/mdio.h>
15#include <linux/module.h>
16
17/**
18 * mdio45_probe - probe for an MDIO (clause 45) device
19 * @mdio: MDIO interface
20 * @prtad: Expected PHY address
21 *
22 * This sets @prtad and @mmds in the MDIO interface if successful.
23 * Returns 0 on success, negative on error.
24 */
25int mdio45_probe(struct mdio_if_info *mdio, int prtad)
26{
27 int mmd, stat2, devs1, devs2;
28
29 /* Assume PHY must have at least one of PMA/PMD, WIS, PCS, PHY
30 * XS or DTE XS; give up if none is present. */
31 for (mmd = 1; mmd <= 5; mmd++) {
32 /* Is this MMD present? */
33 stat2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_STAT2);
34 if (stat2 < 0 ||
35 (stat2 & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL)
36 continue;
37
38 /* It should tell us about all the other MMDs */
39 devs1 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS1);
40 devs2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS2);
41 if (devs1 < 0 || devs2 < 0)
42 continue;
43
44 mdio->prtad = prtad;
45 mdio->mmds = devs1 | (devs2 << 16);
46 return 0;
47 }
48
49 return -ENODEV;
50}
51EXPORT_SYMBOL(mdio45_probe);
52
53/**
54 * mdio_set_flag - set or clear flag in an MDIO register
55 * @mdio: MDIO interface
56 * @prtad: PHY address
57 * @devad: MMD address
58 * @addr: Register address
59 * @mask: Mask for flag (single bit set)
60 * @sense: New value of flag
61 *
62 * This debounces changes: it does not write the register if the flag
63 * already has the proper value. Returns 0 on success, negative on error.
64 */
65int mdio_set_flag(const struct mdio_if_info *mdio,
66 int prtad, int devad, u16 addr, int mask,
67 bool sense)
68{
69 int old_val = mdio->mdio_read(mdio->dev, prtad, devad, addr);
70 int new_val;
71
72 if (old_val < 0)
73 return old_val;
74 if (sense)
75 new_val = old_val | mask;
76 else
77 new_val = old_val & ~mask;
78 if (old_val == new_val)
79 return 0;
80 return mdio->mdio_write(mdio->dev, prtad, devad, addr, new_val);
81}
82EXPORT_SYMBOL(mdio_set_flag);
83
84/**
85 * mdio_link_ok - is link status up/OK
86 * @mdio: MDIO interface
87 * @mmd_mask: Mask for MMDs to check
88 *
89 * Returns 1 if the PHY reports link status up/OK, 0 otherwise.
90 * @mmd_mask is normally @mdio->mmds, but if loopback is enabled
91 * the MMDs being bypassed should be excluded from the mask.
92 */
93int mdio45_links_ok(const struct mdio_if_info *mdio, u32 mmd_mask)
94{
95 int devad, reg;
96
97 if (!mmd_mask) {
98 /* Use absence of XGMII faults in lieu of link state */
99 reg = mdio->mdio_read(mdio->dev, mdio->prtad,
100 MDIO_MMD_PHYXS, MDIO_STAT2);
101 return reg >= 0 && !(reg & MDIO_STAT2_RXFAULT);
102 }
103
104 for (devad = 0; mmd_mask; devad++) {
105 if (mmd_mask & (1 << devad)) {
106 mmd_mask &= ~(1 << devad);
107
108 /* Read twice because link state is latched and a
109 * read moves the current state into the register */
110 mdio->mdio_read(mdio->dev, mdio->prtad,
111 devad, MDIO_STAT1);
112 reg = mdio->mdio_read(mdio->dev, mdio->prtad,
113 devad, MDIO_STAT1);
114 if (reg < 0 || !(reg & MDIO_STAT1_LSTATUS))
115 return false;
116 }
117 }
118
119 return true;
120}
121EXPORT_SYMBOL(mdio45_links_ok);
122
123/**
124 * mdio45_nway_restart - restart auto-negotiation for this interface
125 * @mdio: MDIO interface
126 *
127 * Returns 0 on success, negative on error.
128 */
129int mdio45_nway_restart(const struct mdio_if_info *mdio)
130{
131 if (!(mdio->mmds & MDIO_DEVS_AN))
132 return -EOPNOTSUPP;
133
134 mdio_set_flag(mdio, mdio->prtad, MDIO_MMD_AN, MDIO_CTRL1,
135 MDIO_AN_CTRL1_RESTART, true);
136 return 0;
137}
138EXPORT_SYMBOL(mdio45_nway_restart);
139
140static u32 mdio45_get_an(const struct mdio_if_info *mdio, u16 addr)
141{
142 u32 result = 0;
143 int reg;
144
145 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_AN, addr);
146 if (reg & ADVERTISE_10HALF)
147 result |= ADVERTISED_10baseT_Half;
148 if (reg & ADVERTISE_10FULL)
149 result |= ADVERTISED_10baseT_Full;
150 if (reg & ADVERTISE_100HALF)
151 result |= ADVERTISED_100baseT_Half;
152 if (reg & ADVERTISE_100FULL)
153 result |= ADVERTISED_100baseT_Full;
154 return result;
155}
156
157/**
158 * mdio45_ethtool_gset_npage - get settings for ETHTOOL_GSET
159 * @mdio: MDIO interface
160 * @ecmd: Ethtool request structure
161 * @npage_adv: Modes currently advertised on next pages
162 * @npage_lpa: Modes advertised by link partner on next pages
163 *
164 * Since the CSRs for auto-negotiation using next pages are not fully
165 * standardised, this function does not attempt to decode them. The
166 * caller must pass them in.
167 */
168void mdio45_ethtool_gset_npage(const struct mdio_if_info *mdio,
169 struct ethtool_cmd *ecmd,
170 u32 npage_adv, u32 npage_lpa)
171{
172 int reg;
173
174 ecmd->transceiver = XCVR_INTERNAL;
175 ecmd->phy_address = mdio->prtad;
176 ecmd->mdio_support =
177 mdio->mode_support & (MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22);
178
179 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
180 MDIO_CTRL2);
181 switch (reg & MDIO_PMA_CTRL2_TYPE) {
182 case MDIO_PMA_CTRL2_10GBT:
183 case MDIO_PMA_CTRL2_1000BT:
184 case MDIO_PMA_CTRL2_100BTX:
185 case MDIO_PMA_CTRL2_10BT:
186 ecmd->port = PORT_TP;
187 ecmd->supported = SUPPORTED_TP;
188 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
189 MDIO_SPEED);
190 if (reg & MDIO_SPEED_10G)
191 ecmd->supported |= SUPPORTED_10000baseT_Full;
192 if (reg & MDIO_PMA_SPEED_1000)
193 ecmd->supported |= (SUPPORTED_1000baseT_Full |
194 SUPPORTED_1000baseT_Half);
195 if (reg & MDIO_PMA_SPEED_100)
196 ecmd->supported |= (SUPPORTED_100baseT_Full |
197 SUPPORTED_100baseT_Half);
198 if (reg & MDIO_PMA_SPEED_10)
199 ecmd->supported |= (SUPPORTED_10baseT_Full |
200 SUPPORTED_10baseT_Half);
201 ecmd->advertising = ADVERTISED_TP;
202 break;
203
204 case MDIO_PMA_CTRL2_10GBCX4:
205 ecmd->port = PORT_OTHER;
206 ecmd->supported = 0;
207 ecmd->advertising = 0;
208 break;
209
210 case MDIO_PMA_CTRL2_10GBKX4:
211 case MDIO_PMA_CTRL2_10GBKR:
212 case MDIO_PMA_CTRL2_1000BKX:
213 ecmd->port = PORT_OTHER;
214 ecmd->supported = SUPPORTED_Backplane;
215 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
216 MDIO_PMA_EXTABLE);
217 if (reg & MDIO_PMA_EXTABLE_10GBKX4)
218 ecmd->supported |= SUPPORTED_10000baseKX4_Full;
219 if (reg & MDIO_PMA_EXTABLE_10GBKR)
220 ecmd->supported |= SUPPORTED_10000baseKR_Full;
221 if (reg & MDIO_PMA_EXTABLE_1000BKX)
222 ecmd->supported |= SUPPORTED_1000baseKX_Full;
223 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
224 MDIO_PMA_10GBR_FECABLE);
225 if (reg & MDIO_PMA_10GBR_FECABLE_ABLE)
226 ecmd->supported |= SUPPORTED_10000baseR_FEC;
227 ecmd->advertising = ADVERTISED_Backplane;
228 break;
229
230 /* All the other defined modes are flavours of optical */
231 default:
232 ecmd->port = PORT_FIBRE;
233 ecmd->supported = SUPPORTED_FIBRE;
234 ecmd->advertising = ADVERTISED_FIBRE;
235 break;
236 }
237
238 if (mdio->mmds & MDIO_DEVS_AN) {
239 ecmd->supported |= SUPPORTED_Autoneg;
240 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_AN,
241 MDIO_CTRL1);
242 if (reg & MDIO_AN_CTRL1_ENABLE) {
243 ecmd->autoneg = AUTONEG_ENABLE;
244 ecmd->advertising |=
245 ADVERTISED_Autoneg |
246 mdio45_get_an(mdio, MDIO_AN_ADVERTISE) |
247 npage_adv;
248 } else {
249 ecmd->autoneg = AUTONEG_DISABLE;
250 }
251 } else {
252 ecmd->autoneg = AUTONEG_DISABLE;
253 }
254
255 if (ecmd->autoneg) {
256 u32 modes = 0;
257 int an_stat = mdio->mdio_read(mdio->dev, mdio->prtad,
258 MDIO_MMD_AN, MDIO_STAT1);
259
260 /* If AN is complete and successful, report best common
261 * mode, otherwise report best advertised mode. */
262 if (an_stat & MDIO_AN_STAT1_COMPLETE) {
263 ecmd->lp_advertising =
264 mdio45_get_an(mdio, MDIO_AN_LPA) | npage_lpa;
265 if (an_stat & MDIO_AN_STAT1_LPABLE)
266 ecmd->lp_advertising |= ADVERTISED_Autoneg;
267 modes = ecmd->advertising & ecmd->lp_advertising;
268 }
269 if ((modes & ~ADVERTISED_Autoneg) == 0)
270 modes = ecmd->advertising;
271
272 if (modes & (ADVERTISED_10000baseT_Full |
273 ADVERTISED_10000baseKX4_Full |
274 ADVERTISED_10000baseKR_Full)) {
275 ecmd->speed = SPEED_10000;
276 ecmd->duplex = DUPLEX_FULL;
277 } else if (modes & (ADVERTISED_1000baseT_Full |
278 ADVERTISED_1000baseT_Half |
279 ADVERTISED_1000baseKX_Full)) {
280 ecmd->speed = SPEED_1000;
281 ecmd->duplex = !(modes & ADVERTISED_1000baseT_Half);
282 } else if (modes & (ADVERTISED_100baseT_Full |
283 ADVERTISED_100baseT_Half)) {
284 ecmd->speed = SPEED_100;
285 ecmd->duplex = !!(modes & ADVERTISED_100baseT_Full);
286 } else {
287 ecmd->speed = SPEED_10;
288 ecmd->duplex = !!(modes & ADVERTISED_10baseT_Full);
289 }
290 } else {
291 /* Report forced settings */
292 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
293 MDIO_CTRL1);
294 ecmd->speed = (((reg & MDIO_PMA_CTRL1_SPEED1000) ? 100 : 1) *
295 ((reg & MDIO_PMA_CTRL1_SPEED100) ? 100 : 10));
296 ecmd->duplex = (reg & MDIO_CTRL1_FULLDPLX ||
297 ecmd->speed == SPEED_10000);
298 }
299}
300EXPORT_SYMBOL(mdio45_ethtool_gset_npage);
301
302/**
303 * mdio45_ethtool_spauseparam_an - set auto-negotiated pause parameters
304 * @mdio: MDIO interface
305 * @ecmd: Ethtool request structure
306 *
307 * This function assumes that the PHY has an auto-negotiation MMD. It
308 * will enable and disable advertising of flow control as appropriate.
309 */
310void mdio45_ethtool_spauseparam_an(const struct mdio_if_info *mdio,
311 const struct ethtool_pauseparam *ecmd)
312{
313 int adv, old_adv;
314
315 WARN_ON(!(mdio->mmds & MDIO_DEVS_AN));
316
317 old_adv = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_AN,
318 MDIO_AN_ADVERTISE);
319 adv = old_adv & ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
320 if (ecmd->autoneg)
321 adv |= mii_advertise_flowctrl(
322 (ecmd->rx_pause ? FLOW_CTRL_RX : 0) |
323 (ecmd->tx_pause ? FLOW_CTRL_TX : 0));
324 if (adv != old_adv) {
325 mdio->mdio_write(mdio->dev, mdio->prtad, MDIO_MMD_AN,
326 MDIO_AN_ADVERTISE, adv);
327 mdio45_nway_restart(mdio);
328 }
329}
330EXPORT_SYMBOL(mdio45_ethtool_spauseparam_an);
331
332/**
333 * mdio_mii_ioctl - MII ioctl interface for MDIO (clause 22 or 45) PHYs
334 * @mdio: MDIO interface
335 * @mii_data: MII ioctl data structure
336 * @cmd: MII ioctl command
337 *
338 * Returns 0 on success, negative on error.
339 */
340int mdio_mii_ioctl(const struct mdio_if_info *mdio,
341 struct mii_ioctl_data *mii_data, int cmd)
342{
343 int prtad, devad;
344 u16 addr = mii_data->reg_num;
345
346 /* Validate/convert cmd to one of SIOC{G,S}MIIREG */
347 switch (cmd) {
348 case SIOCGMIIPHY:
349 if (mdio->prtad == MDIO_PRTAD_NONE)
350 return -EOPNOTSUPP;
351 mii_data->phy_id = mdio->prtad;
352 cmd = SIOCGMIIREG;
353 break;
354 case SIOCGMIIREG:
355 break;
356 case SIOCSMIIREG:
357 if (!capable(CAP_NET_ADMIN))
358 return -EPERM;
359 break;
360 default:
361 return -EOPNOTSUPP;
362 }
363
364 /* Validate/convert phy_id */
365 if ((mdio->mode_support & MDIO_SUPPORTS_C45) &&
366 mdio_phy_id_is_c45(mii_data->phy_id)) {
367 prtad = mdio_phy_id_prtad(mii_data->phy_id);
368 devad = mdio_phy_id_devad(mii_data->phy_id);
369 } else if ((mdio->mode_support & MDIO_SUPPORTS_C22) &&
370 mii_data->phy_id < 0x20) {
371 prtad = mii_data->phy_id;
372 devad = MDIO_DEVAD_NONE;
373 addr &= 0x1f;
374 } else if ((mdio->mode_support & MDIO_EMULATE_C22) &&
375 mdio->prtad != MDIO_PRTAD_NONE &&
376 mii_data->phy_id == mdio->prtad) {
377 /* Remap commonly-used MII registers. */
378 prtad = mdio->prtad;
379 switch (addr) {
380 case MII_BMCR:
381 case MII_BMSR:
382 case MII_PHYSID1:
383 case MII_PHYSID2:
384 devad = __ffs(mdio->mmds);
385 break;
386 case MII_ADVERTISE:
387 case MII_LPA:
388 if (!(mdio->mmds & MDIO_DEVS_AN))
389 return -EINVAL;
390 devad = MDIO_MMD_AN;
391 if (addr == MII_ADVERTISE)
392 addr = MDIO_AN_ADVERTISE;
393 else
394 addr = MDIO_AN_LPA;
395 break;
396 default:
397 return -EINVAL;
398 }
399 } else {
400 return -EINVAL;
401 }
402
403 if (cmd == SIOCGMIIREG) {
404 int rc = mdio->mdio_read(mdio->dev, prtad, devad, addr);
405 if (rc < 0)
406 return rc;
407 mii_data->val_out = rc;
408 return 0;
409 } else {
410 return mdio->mdio_write(mdio->dev, prtad, devad, addr,
411 mii_data->val_in);
412 }
413}
414EXPORT_SYMBOL(mdio_mii_ioctl);
diff --git a/drivers/net/meth.c b/drivers/net/meth.c
index dbd3436912b8..5d04d94f2a21 100644
--- a/drivers/net/meth.c
+++ b/drivers/net/meth.c
@@ -770,9 +770,17 @@ static int meth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
770 } 770 }
771} 771}
772 772
773/* 773static const struct net_device_ops meth_netdev_ops = {
774 * Return statistics to the caller 774 .ndo_open = meth_open,
775 */ 775 .ndo_stop = meth_release,
776 .ndo_start_xmit = meth_tx,
777 .ndo_do_ioctl = meth_ioctl,
778 .ndo_tx_timeout = meth_tx_timeout,
779 .ndo_change_mtu = eth_change_mtu,
780 .ndo_validate_addr = eth_validate_addr,
781 .ndo_set_mac_address = eth_mac_addr,
782};
783
776/* 784/*
777 * The init function. 785 * The init function.
778 */ 786 */
@@ -786,16 +794,10 @@ static int __init meth_probe(struct platform_device *pdev)
786 if (!dev) 794 if (!dev)
787 return -ENOMEM; 795 return -ENOMEM;
788 796
789 dev->open = meth_open; 797 dev->netdev_ops = &meth_netdev_ops;
790 dev->stop = meth_release; 798 dev->watchdog_timeo = timeout;
791 dev->hard_start_xmit = meth_tx; 799 dev->irq = MACE_ETHERNET_IRQ;
792 dev->do_ioctl = meth_ioctl; 800 dev->base_addr = (unsigned long)&mace->eth;
793#ifdef HAVE_TX_TIMEOUT
794 dev->tx_timeout = meth_tx_timeout;
795 dev->watchdog_timeo = timeout;
796#endif
797 dev->irq = MACE_ETHERNET_IRQ;
798 dev->base_addr = (unsigned long)&mace->eth;
799 memcpy(dev->dev_addr, o2meth_eaddr, 6); 801 memcpy(dev->dev_addr, o2meth_eaddr, 6);
800 802
801 priv = netdev_priv(dev); 803 priv = netdev_priv(dev);
diff --git a/drivers/net/mii.c b/drivers/net/mii.c
index 92056051f269..d81a5d22a3a9 100644
--- a/drivers/net/mii.c
+++ b/drivers/net/mii.c
@@ -31,7 +31,27 @@
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/netdevice.h> 32#include <linux/netdevice.h>
33#include <linux/ethtool.h> 33#include <linux/ethtool.h>
34#include <linux/mii.h> 34#include <linux/mdio.h>
35
36static u32 mii_get_an(struct mii_if_info *mii, u16 addr)
37{
38 u32 result = 0;
39 int advert;
40
41 advert = mii->mdio_read(mii->dev, mii->phy_id, addr);
42 if (advert & LPA_LPACK)
43 result |= ADVERTISED_Autoneg;
44 if (advert & ADVERTISE_10HALF)
45 result |= ADVERTISED_10baseT_Half;
46 if (advert & ADVERTISE_10FULL)
47 result |= ADVERTISED_10baseT_Full;
48 if (advert & ADVERTISE_100HALF)
49 result |= ADVERTISED_100baseT_Half;
50 if (advert & ADVERTISE_100FULL)
51 result |= ADVERTISED_100baseT_Full;
52
53 return result;
54}
35 55
36/** 56/**
37 * mii_ethtool_gset - get settings that are specified in @ecmd 57 * mii_ethtool_gset - get settings that are specified in @ecmd
@@ -43,8 +63,8 @@
43int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd) 63int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd)
44{ 64{
45 struct net_device *dev = mii->dev; 65 struct net_device *dev = mii->dev;
46 u32 advert, bmcr, lpa, nego; 66 u16 bmcr, bmsr, ctrl1000 = 0, stat1000 = 0;
47 u32 advert2 = 0, bmcr2 = 0, lpa2 = 0; 67 u32 nego;
48 68
49 ecmd->supported = 69 ecmd->supported =
50 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | 70 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
@@ -62,50 +82,51 @@ int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd)
62 82
63 /* this isn't fully supported at higher layers */ 83 /* this isn't fully supported at higher layers */
64 ecmd->phy_address = mii->phy_id; 84 ecmd->phy_address = mii->phy_id;
85 ecmd->mdio_support = MDIO_SUPPORTS_C22;
65 86
66 ecmd->advertising = ADVERTISED_TP | ADVERTISED_MII; 87 ecmd->advertising = ADVERTISED_TP | ADVERTISED_MII;
67 advert = mii->mdio_read(dev, mii->phy_id, MII_ADVERTISE);
68 if (mii->supports_gmii)
69 advert2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
70
71 if (advert & ADVERTISE_10HALF)
72 ecmd->advertising |= ADVERTISED_10baseT_Half;
73 if (advert & ADVERTISE_10FULL)
74 ecmd->advertising |= ADVERTISED_10baseT_Full;
75 if (advert & ADVERTISE_100HALF)
76 ecmd->advertising |= ADVERTISED_100baseT_Half;
77 if (advert & ADVERTISE_100FULL)
78 ecmd->advertising |= ADVERTISED_100baseT_Full;
79 if (advert2 & ADVERTISE_1000HALF)
80 ecmd->advertising |= ADVERTISED_1000baseT_Half;
81 if (advert2 & ADVERTISE_1000FULL)
82 ecmd->advertising |= ADVERTISED_1000baseT_Full;
83 88
84 bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR); 89 bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR);
85 lpa = mii->mdio_read(dev, mii->phy_id, MII_LPA); 90 bmsr = mii->mdio_read(dev, mii->phy_id, MII_BMSR);
86 if (mii->supports_gmii) { 91 if (mii->supports_gmii) {
87 bmcr2 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000); 92 ctrl1000 = mii->mdio_read(dev, mii->phy_id, MII_CTRL1000);
88 lpa2 = mii->mdio_read(dev, mii->phy_id, MII_STAT1000); 93 stat1000 = mii->mdio_read(dev, mii->phy_id, MII_STAT1000);
89 } 94 }
90 if (bmcr & BMCR_ANENABLE) { 95 if (bmcr & BMCR_ANENABLE) {
91 ecmd->advertising |= ADVERTISED_Autoneg; 96 ecmd->advertising |= ADVERTISED_Autoneg;
92 ecmd->autoneg = AUTONEG_ENABLE; 97 ecmd->autoneg = AUTONEG_ENABLE;
93 98
94 nego = mii_nway_result(advert & lpa); 99 ecmd->advertising |= mii_get_an(mii, MII_ADVERTISE);
95 if ((bmcr2 & (ADVERTISE_1000HALF | ADVERTISE_1000FULL)) & 100 if (ctrl1000 & ADVERTISE_1000HALF)
96 (lpa2 >> 2)) 101 ecmd->advertising |= ADVERTISED_1000baseT_Half;
102 if (ctrl1000 & ADVERTISE_1000FULL)
103 ecmd->advertising |= ADVERTISED_1000baseT_Full;
104
105 if (bmsr & BMSR_ANEGCOMPLETE) {
106 ecmd->lp_advertising = mii_get_an(mii, MII_LPA);
107 if (stat1000 & LPA_1000HALF)
108 ecmd->lp_advertising |=
109 ADVERTISED_1000baseT_Half;
110 if (stat1000 & LPA_1000FULL)
111 ecmd->lp_advertising |=
112 ADVERTISED_1000baseT_Full;
113 } else {
114 ecmd->lp_advertising = 0;
115 }
116
117 nego = ecmd->advertising & ecmd->lp_advertising;
118
119 if (nego & (ADVERTISED_1000baseT_Full |
120 ADVERTISED_1000baseT_Half)) {
97 ecmd->speed = SPEED_1000; 121 ecmd->speed = SPEED_1000;
98 else if (nego == LPA_100FULL || nego == LPA_100HALF) 122 ecmd->duplex = !!(nego & ADVERTISED_1000baseT_Full);
123 } else if (nego & (ADVERTISED_100baseT_Full |
124 ADVERTISED_100baseT_Half)) {
99 ecmd->speed = SPEED_100; 125 ecmd->speed = SPEED_100;
100 else 126 ecmd->duplex = !!(nego & ADVERTISED_100baseT_Full);
101 ecmd->speed = SPEED_10;
102 if ((lpa2 & LPA_1000FULL) || nego == LPA_100FULL ||
103 nego == LPA_10FULL) {
104 ecmd->duplex = DUPLEX_FULL;
105 mii->full_duplex = 1;
106 } else { 127 } else {
107 ecmd->duplex = DUPLEX_HALF; 128 ecmd->speed = SPEED_10;
108 mii->full_duplex = 0; 129 ecmd->duplex = !!(nego & ADVERTISED_10baseT_Full);
109 } 130 }
110 } else { 131 } else {
111 ecmd->autoneg = AUTONEG_DISABLE; 132 ecmd->autoneg = AUTONEG_DISABLE;
@@ -116,6 +137,8 @@ int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd)
116 ecmd->duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF; 137 ecmd->duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
117 } 138 }
118 139
140 mii->full_duplex = ecmd->duplex;
141
119 /* ignore maxtxpkt, maxrxpkt for now */ 142 /* ignore maxtxpkt, maxrxpkt for now */
120 143
121 return 0; 144 return 0;
diff --git a/drivers/net/mipsnet.c b/drivers/net/mipsnet.c
index 664835b822fb..b3b9a147d09a 100644
--- a/drivers/net/mipsnet.c
+++ b/drivers/net/mipsnet.c
@@ -237,6 +237,16 @@ static void mipsnet_set_mclist(struct net_device *dev)
237{ 237{
238} 238}
239 239
240static const struct net_device_ops mipsnet_netdev_ops = {
241 .ndo_open = mipsnet_open,
242 .ndo_stop = mipsnet_close,
243 .ndo_start_xmit = mipsnet_xmit,
244 .ndo_set_multicast_list = mipsnet_set_mclist,
245 .ndo_change_mtu = eth_change_mtu,
246 .ndo_validate_addr = eth_validate_addr,
247 .ndo_set_mac_address = eth_mac_addr,
248};
249
240static int __init mipsnet_probe(struct platform_device *dev) 250static int __init mipsnet_probe(struct platform_device *dev)
241{ 251{
242 struct net_device *netdev; 252 struct net_device *netdev;
@@ -250,10 +260,7 @@ static int __init mipsnet_probe(struct platform_device *dev)
250 260
251 platform_set_drvdata(dev, netdev); 261 platform_set_drvdata(dev, netdev);
252 262
253 netdev->open = mipsnet_open; 263 netdev->netdev_ops = &mipsnet_netdev_ops;
254 netdev->stop = mipsnet_close;
255 netdev->hard_start_xmit = mipsnet_xmit;
256 netdev->set_multicast_list = mipsnet_set_mclist;
257 264
258 /* 265 /*
259 * TODO: probe for these or load them from PARAM 266 * TODO: probe for these or load them from PARAM
diff --git a/drivers/net/mlx4/Makefile b/drivers/net/mlx4/Makefile
index 21040a0d81fe..1fd068e1d930 100644
--- a/drivers/net/mlx4/Makefile
+++ b/drivers/net/mlx4/Makefile
@@ -5,5 +5,5 @@ mlx4_core-y := alloc.o catas.o cmd.o cq.o eq.o fw.o icm.o intf.o main.o mcg.o \
5 5
6obj-$(CONFIG_MLX4_EN) += mlx4_en.o 6obj-$(CONFIG_MLX4_EN) += mlx4_en.o
7 7
8mlx4_en-y := en_main.o en_tx.o en_rx.o en_params.o en_port.o en_cq.o \ 8mlx4_en-y := en_main.o en_tx.o en_rx.o en_ethtool.o en_port.o en_cq.o \
9 en_resources.o en_netdev.o 9 en_resources.o en_netdev.o
diff --git a/drivers/net/mlx4/en_cq.c b/drivers/net/mlx4/en_cq.c
index a276125b709b..21786ad4455e 100644
--- a/drivers/net/mlx4/en_cq.c
+++ b/drivers/net/mlx4/en_cq.c
@@ -89,6 +89,9 @@ int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
89 *cq->mcq.arm_db = 0; 89 *cq->mcq.arm_db = 0;
90 memset(cq->buf, 0, cq->buf_size); 90 memset(cq->buf, 0, cq->buf_size);
91 91
92 if (!cq->is_tx)
93 cq->size = priv->rx_ring[cq->ring].actual_size;
94
92 err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt, &mdev->priv_uar, 95 err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt, &mdev->priv_uar,
93 cq->wqres.db.dma, &cq->mcq, cq->vector, cq->is_tx); 96 cq->wqres.db.dma, &cq->mcq, cq->vector, cq->is_tx);
94 if (err) 97 if (err)
diff --git a/drivers/net/mlx4/en_params.c b/drivers/net/mlx4/en_ethtool.c
index c1bd040b9e05..091f99052c91 100644
--- a/drivers/net/mlx4/en_params.c
+++ b/drivers/net/mlx4/en_ethtool.c
@@ -38,64 +38,6 @@
38#include "mlx4_en.h" 38#include "mlx4_en.h"
39#include "en_port.h" 39#include "en_port.h"
40 40
41#define MLX4_EN_PARM_INT(X, def_val, desc) \
42 static unsigned int X = def_val;\
43 module_param(X , uint, 0444); \
44 MODULE_PARM_DESC(X, desc);
45
46
47/*
48 * Device scope module parameters
49 */
50
51
52/* Use a XOR rathern than Toeplitz hash function for RSS */
53MLX4_EN_PARM_INT(rss_xor, 0, "Use XOR hash function for RSS");
54
55/* RSS hash type mask - default to <saddr, daddr, sport, dport> */
56MLX4_EN_PARM_INT(rss_mask, 0xf, "RSS hash type bitmask");
57
58/* Number of LRO sessions per Rx ring (rounded up to a power of two) */
59MLX4_EN_PARM_INT(num_lro, MLX4_EN_MAX_LRO_DESCRIPTORS,
60 "Number of LRO sessions per ring or disabled (0)");
61
62/* Priority pausing */
63MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
64 " Per priority bit mask");
65MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
66 " Per priority bit mask");
67
68int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
69{
70 struct mlx4_en_profile *params = &mdev->profile;
71 int i;
72
73 params->rss_xor = (rss_xor != 0);
74 params->rss_mask = rss_mask & 0x1f;
75 params->num_lro = min_t(int, num_lro , MLX4_EN_MAX_LRO_DESCRIPTORS);
76 for (i = 1; i <= MLX4_MAX_PORTS; i++) {
77 params->prof[i].rx_pause = 1;
78 params->prof[i].rx_ppp = pfcrx;
79 params->prof[i].tx_pause = 1;
80 params->prof[i].tx_ppp = pfctx;
81 params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE;
82 params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE;
83 }
84 if (pfcrx || pfctx) {
85 params->prof[1].tx_ring_num = MLX4_EN_TX_RING_NUM;
86 params->prof[2].tx_ring_num = MLX4_EN_TX_RING_NUM;
87 } else {
88 params->prof[1].tx_ring_num = 1;
89 params->prof[2].tx_ring_num = 1;
90 }
91
92 return 0;
93}
94
95
96/*
97 * Ethtool support
98 */
99 41
100static void mlx4_en_update_lro_stats(struct mlx4_en_priv *priv) 42static void mlx4_en_update_lro_stats(struct mlx4_en_priv *priv)
101{ 43{
@@ -326,8 +268,7 @@ static int mlx4_en_set_coalesce(struct net_device *dev,
326 268
327 priv->rx_frames = (coal->rx_max_coalesced_frames == 269 priv->rx_frames = (coal->rx_max_coalesced_frames ==
328 MLX4_EN_AUTO_CONF) ? 270 MLX4_EN_AUTO_CONF) ?
329 MLX4_EN_RX_COAL_TARGET / 271 MLX4_EN_RX_COAL_TARGET :
330 priv->dev->mtu + 1 :
331 coal->rx_max_coalesced_frames; 272 coal->rx_max_coalesced_frames;
332 priv->rx_usecs = (coal->rx_coalesce_usecs == 273 priv->rx_usecs = (coal->rx_coalesce_usecs ==
333 MLX4_EN_AUTO_CONF) ? 274 MLX4_EN_AUTO_CONF) ?
@@ -371,7 +312,7 @@ static int mlx4_en_set_pauseparam(struct net_device *dev,
371 priv->prof->rx_pause, 312 priv->prof->rx_pause,
372 priv->prof->rx_ppp); 313 priv->prof->rx_ppp);
373 if (err) 314 if (err)
374 mlx4_err(mdev, "Failed setting pause params to\n"); 315 en_err(priv, "Failed setting pause params\n");
375 316
376 return err; 317 return err;
377} 318}
@@ -421,13 +362,13 @@ static int mlx4_en_set_ringparam(struct net_device *dev,
421 362
422 err = mlx4_en_alloc_resources(priv); 363 err = mlx4_en_alloc_resources(priv);
423 if (err) { 364 if (err) {
424 mlx4_err(mdev, "Failed reallocating port resources\n"); 365 en_err(priv, "Failed reallocating port resources\n");
425 goto out; 366 goto out;
426 } 367 }
427 if (port_up) { 368 if (port_up) {
428 err = mlx4_en_start_port(dev); 369 err = mlx4_en_start_port(dev);
429 if (err) 370 if (err)
430 mlx4_err(mdev, "Failed starting port\n"); 371 en_err(priv, "Failed starting port\n");
431 } 372 }
432 373
433out: 374out:
diff --git a/drivers/net/mlx4/en_main.c b/drivers/net/mlx4/en_main.c
index 510633fd57f6..9ed4a158f895 100644
--- a/drivers/net/mlx4/en_main.c
+++ b/drivers/net/mlx4/en_main.c
@@ -51,6 +51,55 @@ static const char mlx4_en_version[] =
51 DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v" 51 DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v"
52 DRV_VERSION " (" DRV_RELDATE ")\n"; 52 DRV_VERSION " (" DRV_RELDATE ")\n";
53 53
54#define MLX4_EN_PARM_INT(X, def_val, desc) \
55 static unsigned int X = def_val;\
56 module_param(X , uint, 0444); \
57 MODULE_PARM_DESC(X, desc);
58
59
60/*
61 * Device scope module parameters
62 */
63
64
65/* Use a XOR rathern than Toeplitz hash function for RSS */
66MLX4_EN_PARM_INT(rss_xor, 0, "Use XOR hash function for RSS");
67
68/* RSS hash type mask - default to <saddr, daddr, sport, dport> */
69MLX4_EN_PARM_INT(rss_mask, 0xf, "RSS hash type bitmask");
70
71/* Number of LRO sessions per Rx ring (rounded up to a power of two) */
72MLX4_EN_PARM_INT(num_lro, MLX4_EN_MAX_LRO_DESCRIPTORS,
73 "Number of LRO sessions per ring or disabled (0)");
74
75/* Priority pausing */
76MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
77 " Per priority bit mask");
78MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
79 " Per priority bit mask");
80
81static int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
82{
83 struct mlx4_en_profile *params = &mdev->profile;
84 int i;
85
86 params->rss_xor = (rss_xor != 0);
87 params->rss_mask = rss_mask & 0x1f;
88 params->num_lro = min_t(int, num_lro , MLX4_EN_MAX_LRO_DESCRIPTORS);
89 for (i = 1; i <= MLX4_MAX_PORTS; i++) {
90 params->prof[i].rx_pause = 1;
91 params->prof[i].rx_ppp = pfcrx;
92 params->prof[i].tx_pause = 1;
93 params->prof[i].tx_ppp = pfctx;
94 params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE;
95 params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE;
96 params->prof[i].tx_ring_num = MLX4_EN_NUM_TX_RINGS +
97 (!!pfcrx) * MLX4_EN_NUM_PPP_RINGS;
98 }
99
100 return 0;
101}
102
54static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, 103static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr,
55 enum mlx4_dev_event event, int port) 104 enum mlx4_dev_event event, int port)
56{ 105{
@@ -194,28 +243,11 @@ static void *mlx4_en_add(struct mlx4_dev *dev)
194 /* Create a netdev for each port */ 243 /* Create a netdev for each port */
195 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { 244 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
196 mlx4_info(mdev, "Activating port:%d\n", i); 245 mlx4_info(mdev, "Activating port:%d\n", i);
197 if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i])) { 246 if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i]))
198 mdev->pndev[i] = NULL; 247 mdev->pndev[i] = NULL;
199 goto err_free_netdev;
200 }
201 } 248 }
202 return mdev; 249 return mdev;
203 250
204
205err_free_netdev:
206 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
207 if (mdev->pndev[i])
208 mlx4_en_destroy_netdev(mdev->pndev[i]);
209 }
210
211 mutex_lock(&mdev->state_lock);
212 mdev->device_up = false;
213 mutex_unlock(&mdev->state_lock);
214 flush_workqueue(mdev->workqueue);
215
216 /* Stop event queue before we drop down to release shared SW state */
217 destroy_workqueue(mdev->workqueue);
218
219err_mr: 251err_mr:
220 mlx4_mr_free(dev, &mdev->mr); 252 mlx4_mr_free(dev, &mdev->mr);
221err_uar: 253err_uar:
diff --git a/drivers/net/mlx4/en_netdev.c b/drivers/net/mlx4/en_netdev.c
index 7bcc49de1637..0a7e78ade63f 100644
--- a/drivers/net/mlx4/en_netdev.c
+++ b/drivers/net/mlx4/en_netdev.c
@@ -51,14 +51,14 @@ static void mlx4_en_vlan_rx_register(struct net_device *dev, struct vlan_group *
51 struct mlx4_en_dev *mdev = priv->mdev; 51 struct mlx4_en_dev *mdev = priv->mdev;
52 int err; 52 int err;
53 53
54 mlx4_dbg(HW, priv, "Registering VLAN group:%p\n", grp); 54 en_dbg(HW, priv, "Registering VLAN group:%p\n", grp);
55 priv->vlgrp = grp; 55 priv->vlgrp = grp;
56 56
57 mutex_lock(&mdev->state_lock); 57 mutex_lock(&mdev->state_lock);
58 if (mdev->device_up && priv->port_up) { 58 if (mdev->device_up && priv->port_up) {
59 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, grp); 59 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, grp);
60 if (err) 60 if (err)
61 mlx4_err(mdev, "Failed configuring VLAN filter\n"); 61 en_err(priv, "Failed configuring VLAN filter\n");
62 } 62 }
63 mutex_unlock(&mdev->state_lock); 63 mutex_unlock(&mdev->state_lock);
64} 64}
@@ -72,15 +72,15 @@ static void mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
72 if (!priv->vlgrp) 72 if (!priv->vlgrp)
73 return; 73 return;
74 74
75 mlx4_dbg(HW, priv, "adding VLAN:%d (vlgrp entry:%p)\n", 75 en_dbg(HW, priv, "adding VLAN:%d (vlgrp entry:%p)\n",
76 vid, vlan_group_get_device(priv->vlgrp, vid)); 76 vid, vlan_group_get_device(priv->vlgrp, vid));
77 77
78 /* Add VID to port VLAN filter */ 78 /* Add VID to port VLAN filter */
79 mutex_lock(&mdev->state_lock); 79 mutex_lock(&mdev->state_lock);
80 if (mdev->device_up && priv->port_up) { 80 if (mdev->device_up && priv->port_up) {
81 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp); 81 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp);
82 if (err) 82 if (err)
83 mlx4_err(mdev, "Failed configuring VLAN filter\n"); 83 en_err(priv, "Failed configuring VLAN filter\n");
84 } 84 }
85 mutex_unlock(&mdev->state_lock); 85 mutex_unlock(&mdev->state_lock);
86} 86}
@@ -94,9 +94,8 @@ static void mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
94 if (!priv->vlgrp) 94 if (!priv->vlgrp)
95 return; 95 return;
96 96
97 mlx4_dbg(HW, priv, "Killing VID:%d (vlgrp:%p vlgrp " 97 en_dbg(HW, priv, "Killing VID:%d (vlgrp:%p vlgrp entry:%p)\n",
98 "entry:%p)\n", vid, priv->vlgrp, 98 vid, priv->vlgrp, vlan_group_get_device(priv->vlgrp, vid));
99 vlan_group_get_device(priv->vlgrp, vid));
100 vlan_group_set_device(priv->vlgrp, vid, NULL); 99 vlan_group_set_device(priv->vlgrp, vid, NULL);
101 100
102 /* Remove VID from port VLAN filter */ 101 /* Remove VID from port VLAN filter */
@@ -104,7 +103,7 @@ static void mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
104 if (mdev->device_up && priv->port_up) { 103 if (mdev->device_up && priv->port_up) {
105 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp); 104 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp);
106 if (err) 105 if (err)
107 mlx4_err(mdev, "Failed configuring VLAN filter\n"); 106 en_err(priv, "Failed configuring VLAN filter\n");
108 } 107 }
109 mutex_unlock(&mdev->state_lock); 108 mutex_unlock(&mdev->state_lock);
110} 109}
@@ -150,9 +149,10 @@ static void mlx4_en_do_set_mac(struct work_struct *work)
150 err = mlx4_register_mac(mdev->dev, priv->port, 149 err = mlx4_register_mac(mdev->dev, priv->port,
151 priv->mac, &priv->mac_index); 150 priv->mac, &priv->mac_index);
152 if (err) 151 if (err)
153 mlx4_err(mdev, "Failed changing HW MAC address\n"); 152 en_err(priv, "Failed changing HW MAC address\n");
154 } else 153 } else
155 mlx4_dbg(HW, priv, "Port is down, exiting...\n"); 154 en_dbg(HW, priv, "Port is down while "
155 "registering mac, exiting...\n");
156 156
157 mutex_unlock(&mdev->state_lock); 157 mutex_unlock(&mdev->state_lock);
158} 158}
@@ -174,7 +174,6 @@ static void mlx4_en_clear_list(struct net_device *dev)
174static void mlx4_en_cache_mclist(struct net_device *dev) 174static void mlx4_en_cache_mclist(struct net_device *dev)
175{ 175{
176 struct mlx4_en_priv *priv = netdev_priv(dev); 176 struct mlx4_en_priv *priv = netdev_priv(dev);
177 struct mlx4_en_dev *mdev = priv->mdev;
178 struct dev_mc_list *mclist; 177 struct dev_mc_list *mclist;
179 struct dev_mc_list *tmp; 178 struct dev_mc_list *tmp;
180 struct dev_mc_list *plist = NULL; 179 struct dev_mc_list *plist = NULL;
@@ -182,7 +181,7 @@ static void mlx4_en_cache_mclist(struct net_device *dev)
182 for (mclist = dev->mc_list; mclist; mclist = mclist->next) { 181 for (mclist = dev->mc_list; mclist; mclist = mclist->next) {
183 tmp = kmalloc(sizeof(struct dev_mc_list), GFP_ATOMIC); 182 tmp = kmalloc(sizeof(struct dev_mc_list), GFP_ATOMIC);
184 if (!tmp) { 183 if (!tmp) {
185 mlx4_err(mdev, "failed to allocate multicast list\n"); 184 en_err(priv, "failed to allocate multicast list\n");
186 mlx4_en_clear_list(dev); 185 mlx4_en_clear_list(dev);
187 return; 186 return;
188 } 187 }
@@ -219,13 +218,13 @@ static void mlx4_en_do_set_multicast(struct work_struct *work)
219 218
220 mutex_lock(&mdev->state_lock); 219 mutex_lock(&mdev->state_lock);
221 if (!mdev->device_up) { 220 if (!mdev->device_up) {
222 mlx4_dbg(HW, priv, "Card is not up, ignoring " 221 en_dbg(HW, priv, "Card is not up, "
223 "multicast change.\n"); 222 "ignoring multicast change.\n");
224 goto out; 223 goto out;
225 } 224 }
226 if (!priv->port_up) { 225 if (!priv->port_up) {
227 mlx4_dbg(HW, priv, "Port is down, ignoring " 226 en_dbg(HW, priv, "Port is down, "
228 "multicast change.\n"); 227 "ignoring multicast change.\n");
229 goto out; 228 goto out;
230 } 229 }
231 230
@@ -236,29 +235,27 @@ static void mlx4_en_do_set_multicast(struct work_struct *work)
236 if (dev->flags & IFF_PROMISC) { 235 if (dev->flags & IFF_PROMISC) {
237 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { 236 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
238 if (netif_msg_rx_status(priv)) 237 if (netif_msg_rx_status(priv))
239 mlx4_warn(mdev, "Port:%d entering promiscuous mode\n", 238 en_warn(priv, "Entering promiscuous mode\n");
240 priv->port);
241 priv->flags |= MLX4_EN_FLAG_PROMISC; 239 priv->flags |= MLX4_EN_FLAG_PROMISC;
242 240
243 /* Enable promiscouos mode */ 241 /* Enable promiscouos mode */
244 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, 242 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port,
245 priv->base_qpn, 1); 243 priv->base_qpn, 1);
246 if (err) 244 if (err)
247 mlx4_err(mdev, "Failed enabling " 245 en_err(priv, "Failed enabling "
248 "promiscous mode\n"); 246 "promiscous mode\n");
249 247
250 /* Disable port multicast filter (unconditionally) */ 248 /* Disable port multicast filter (unconditionally) */
251 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 249 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
252 0, MLX4_MCAST_DISABLE); 250 0, MLX4_MCAST_DISABLE);
253 if (err) 251 if (err)
254 mlx4_err(mdev, "Failed disabling " 252 en_err(priv, "Failed disabling "
255 "multicast filter\n"); 253 "multicast filter\n");
256 254
257 /* Disable port VLAN filter */ 255 /* Disable port VLAN filter */
258 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, NULL); 256 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, NULL);
259 if (err) 257 if (err)
260 mlx4_err(mdev, "Failed disabling " 258 en_err(priv, "Failed disabling VLAN filter\n");
261 "VLAN filter\n");
262 } 259 }
263 goto out; 260 goto out;
264 } 261 }
@@ -269,20 +266,19 @@ static void mlx4_en_do_set_multicast(struct work_struct *work)
269 266
270 if (priv->flags & MLX4_EN_FLAG_PROMISC) { 267 if (priv->flags & MLX4_EN_FLAG_PROMISC) {
271 if (netif_msg_rx_status(priv)) 268 if (netif_msg_rx_status(priv))
272 mlx4_warn(mdev, "Port:%d leaving promiscuous mode\n", 269 en_warn(priv, "Leaving promiscuous mode\n");
273 priv->port);
274 priv->flags &= ~MLX4_EN_FLAG_PROMISC; 270 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
275 271
276 /* Disable promiscouos mode */ 272 /* Disable promiscouos mode */
277 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, 273 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port,
278 priv->base_qpn, 0); 274 priv->base_qpn, 0);
279 if (err) 275 if (err)
280 mlx4_err(mdev, "Failed disabling promiscous mode\n"); 276 en_err(priv, "Failed disabling promiscous mode\n");
281 277
282 /* Enable port VLAN filter */ 278 /* Enable port VLAN filter */
283 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp); 279 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp);
284 if (err) 280 if (err)
285 mlx4_err(mdev, "Failed enabling VLAN filter\n"); 281 en_err(priv, "Failed enabling VLAN filter\n");
286 } 282 }
287 283
288 /* Enable/disable the multicast filter according to IFF_ALLMULTI */ 284 /* Enable/disable the multicast filter according to IFF_ALLMULTI */
@@ -290,12 +286,12 @@ static void mlx4_en_do_set_multicast(struct work_struct *work)
290 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 286 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
291 0, MLX4_MCAST_DISABLE); 287 0, MLX4_MCAST_DISABLE);
292 if (err) 288 if (err)
293 mlx4_err(mdev, "Failed disabling multicast filter\n"); 289 en_err(priv, "Failed disabling multicast filter\n");
294 } else { 290 } else {
295 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 291 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
296 0, MLX4_MCAST_DISABLE); 292 0, MLX4_MCAST_DISABLE);
297 if (err) 293 if (err)
298 mlx4_err(mdev, "Failed disabling multicast filter\n"); 294 en_err(priv, "Failed disabling multicast filter\n");
299 295
300 /* Flush mcast filter and init it with broadcast address */ 296 /* Flush mcast filter and init it with broadcast address */
301 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, 297 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
@@ -314,7 +310,7 @@ static void mlx4_en_do_set_multicast(struct work_struct *work)
314 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 310 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
315 0, MLX4_MCAST_ENABLE); 311 0, MLX4_MCAST_ENABLE);
316 if (err) 312 if (err)
317 mlx4_err(mdev, "Failed enabling multicast filter\n"); 313 en_err(priv, "Failed enabling multicast filter\n");
318 314
319 mlx4_en_clear_list(dev); 315 mlx4_en_clear_list(dev);
320 } 316 }
@@ -346,10 +342,10 @@ static void mlx4_en_tx_timeout(struct net_device *dev)
346 struct mlx4_en_dev *mdev = priv->mdev; 342 struct mlx4_en_dev *mdev = priv->mdev;
347 343
348 if (netif_msg_timer(priv)) 344 if (netif_msg_timer(priv))
349 mlx4_warn(mdev, "Tx timeout called on port:%d\n", priv->port); 345 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
350 346
351 priv->port_stats.tx_timeout++; 347 priv->port_stats.tx_timeout++;
352 mlx4_dbg(DRV, priv, "Scheduling watchdog\n"); 348 en_dbg(DRV, priv, "Scheduling watchdog\n");
353 queue_work(mdev->workqueue, &priv->watchdog_task); 349 queue_work(mdev->workqueue, &priv->watchdog_task);
354} 350}
355 351
@@ -376,10 +372,10 @@ static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
376 * satisfy our coelsing target. 372 * satisfy our coelsing target.
377 * - moder_time is set to a fixed value. 373 * - moder_time is set to a fixed value.
378 */ 374 */
379 priv->rx_frames = MLX4_EN_RX_COAL_TARGET / priv->dev->mtu + 1; 375 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
380 priv->rx_usecs = MLX4_EN_RX_COAL_TIME; 376 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
381 mlx4_dbg(INTR, priv, "Default coalesing params for mtu:%d - " 377 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - "
382 "rx_frames:%d rx_usecs:%d\n", 378 "rx_frames:%d rx_usecs:%d\n",
383 priv->dev->mtu, priv->rx_frames, priv->rx_usecs); 379 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
384 380
385 /* Setup cq moderation params */ 381 /* Setup cq moderation params */
@@ -412,7 +408,6 @@ static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
412static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) 408static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
413{ 409{
414 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); 410 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
415 struct mlx4_en_dev *mdev = priv->mdev;
416 struct mlx4_en_cq *cq; 411 struct mlx4_en_cq *cq;
417 unsigned long packets; 412 unsigned long packets;
418 unsigned long rate; 413 unsigned long rate;
@@ -472,11 +467,11 @@ static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
472 moder_time = priv->rx_usecs; 467 moder_time = priv->rx_usecs;
473 } 468 }
474 469
475 mlx4_dbg(INTR, priv, "tx rate:%lu rx_rate:%lu\n", 470 en_dbg(INTR, priv, "tx rate:%lu rx_rate:%lu\n",
476 tx_pkt_diff * HZ / period, rx_pkt_diff * HZ / period); 471 tx_pkt_diff * HZ / period, rx_pkt_diff * HZ / period);
477 472
478 mlx4_dbg(INTR, priv, "Rx moder_time changed from:%d to %d period:%lu " 473 en_dbg(INTR, priv, "Rx moder_time changed from:%d to %d period:%lu "
479 "[jiff] packets:%lu avg_pkt_size:%lu rate:%lu [p/s])\n", 474 "[jiff] packets:%lu avg_pkt_size:%lu rate:%lu [p/s])\n",
480 priv->last_moder_time, moder_time, period, packets, 475 priv->last_moder_time, moder_time, period, packets,
481 avg_pkt_size, rate); 476 avg_pkt_size, rate);
482 477
@@ -487,8 +482,7 @@ static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
487 cq->moder_time = moder_time; 482 cq->moder_time = moder_time;
488 err = mlx4_en_set_cq_moder(priv, cq); 483 err = mlx4_en_set_cq_moder(priv, cq);
489 if (err) { 484 if (err) {
490 mlx4_err(mdev, "Failed modifying moderation for cq:%d " 485 en_err(priv, "Failed modifying moderation for cq:%d\n", i);
491 "on port:%d\n", i, priv->port);
492 break; 486 break;
493 } 487 }
494 } 488 }
@@ -511,8 +505,7 @@ static void mlx4_en_do_get_stats(struct work_struct *work)
511 505
512 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); 506 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
513 if (err) 507 if (err)
514 mlx4_dbg(HW, priv, "Could not update stats for " 508 en_dbg(HW, priv, "Could not update stats \n");
515 "port:%d\n", priv->port);
516 509
517 mutex_lock(&mdev->state_lock); 510 mutex_lock(&mdev->state_lock);
518 if (mdev->device_up) { 511 if (mdev->device_up) {
@@ -536,12 +529,10 @@ static void mlx4_en_linkstate(struct work_struct *work)
536 * report to system log */ 529 * report to system log */
537 if (priv->last_link_state != linkstate) { 530 if (priv->last_link_state != linkstate) {
538 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { 531 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
539 if (netif_msg_link(priv)) 532 en_dbg(LINK, priv, "Link Down\n");
540 mlx4_info(mdev, "Port %d - link down\n", priv->port);
541 netif_carrier_off(priv->dev); 533 netif_carrier_off(priv->dev);
542 } else { 534 } else {
543 if (netif_msg_link(priv)) 535 en_dbg(LINK, priv, "Link Up\n");
544 mlx4_info(mdev, "Port %d - link up\n", priv->port);
545 netif_carrier_on(priv->dev); 536 netif_carrier_on(priv->dev);
546 } 537 }
547 } 538 }
@@ -556,58 +547,53 @@ int mlx4_en_start_port(struct net_device *dev)
556 struct mlx4_en_dev *mdev = priv->mdev; 547 struct mlx4_en_dev *mdev = priv->mdev;
557 struct mlx4_en_cq *cq; 548 struct mlx4_en_cq *cq;
558 struct mlx4_en_tx_ring *tx_ring; 549 struct mlx4_en_tx_ring *tx_ring;
559 struct mlx4_en_rx_ring *rx_ring;
560 int rx_index = 0; 550 int rx_index = 0;
561 int tx_index = 0; 551 int tx_index = 0;
562 u16 stride;
563 int err = 0; 552 int err = 0;
564 int i; 553 int i;
565 int j; 554 int j;
566 555
567 if (priv->port_up) { 556 if (priv->port_up) {
568 mlx4_dbg(DRV, priv, "start port called while port already up\n"); 557 en_dbg(DRV, priv, "start port called while port already up\n");
569 return 0; 558 return 0;
570 } 559 }
571 560
572 /* Calculate Rx buf size */ 561 /* Calculate Rx buf size */
573 dev->mtu = min(dev->mtu, priv->max_mtu); 562 dev->mtu = min(dev->mtu, priv->max_mtu);
574 mlx4_en_calc_rx_buf(dev); 563 mlx4_en_calc_rx_buf(dev);
575 mlx4_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); 564 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
576 stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 565
577 DS_SIZE * priv->num_frags);
578 /* Configure rx cq's and rings */ 566 /* Configure rx cq's and rings */
567 err = mlx4_en_activate_rx_rings(priv);
568 if (err) {
569 en_err(priv, "Failed to activate RX rings\n");
570 return err;
571 }
579 for (i = 0; i < priv->rx_ring_num; i++) { 572 for (i = 0; i < priv->rx_ring_num; i++) {
580 cq = &priv->rx_cq[i]; 573 cq = &priv->rx_cq[i];
581 rx_ring = &priv->rx_ring[i];
582 574
583 err = mlx4_en_activate_cq(priv, cq); 575 err = mlx4_en_activate_cq(priv, cq);
584 if (err) { 576 if (err) {
585 mlx4_err(mdev, "Failed activating Rx CQ\n"); 577 en_err(priv, "Failed activating Rx CQ\n");
586 goto cq_err; 578 goto cq_err;
587 } 579 }
588 for (j = 0; j < cq->size; j++) 580 for (j = 0; j < cq->size; j++)
589 cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK; 581 cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
590 err = mlx4_en_set_cq_moder(priv, cq); 582 err = mlx4_en_set_cq_moder(priv, cq);
591 if (err) { 583 if (err) {
592 mlx4_err(mdev, "Failed setting cq moderation parameters"); 584 en_err(priv, "Failed setting cq moderation parameters");
593 mlx4_en_deactivate_cq(priv, cq); 585 mlx4_en_deactivate_cq(priv, cq);
594 goto cq_err; 586 goto cq_err;
595 } 587 }
596 mlx4_en_arm_cq(priv, cq); 588 mlx4_en_arm_cq(priv, cq);
597 589 priv->rx_ring[i].cqn = cq->mcq.cqn;
598 ++rx_index; 590 ++rx_index;
599 } 591 }
600 592
601 err = mlx4_en_activate_rx_rings(priv);
602 if (err) {
603 mlx4_err(mdev, "Failed to activate RX rings\n");
604 goto cq_err;
605 }
606
607 err = mlx4_en_config_rss_steer(priv); 593 err = mlx4_en_config_rss_steer(priv);
608 if (err) { 594 if (err) {
609 mlx4_err(mdev, "Failed configuring rss steering\n"); 595 en_err(priv, "Failed configuring rss steering\n");
610 goto rx_err; 596 goto cq_err;
611 } 597 }
612 598
613 /* Configure tx cq's and rings */ 599 /* Configure tx cq's and rings */
@@ -616,16 +602,16 @@ int mlx4_en_start_port(struct net_device *dev)
616 cq = &priv->tx_cq[i]; 602 cq = &priv->tx_cq[i];
617 err = mlx4_en_activate_cq(priv, cq); 603 err = mlx4_en_activate_cq(priv, cq);
618 if (err) { 604 if (err) {
619 mlx4_err(mdev, "Failed allocating Tx CQ\n"); 605 en_err(priv, "Failed allocating Tx CQ\n");
620 goto tx_err; 606 goto tx_err;
621 } 607 }
622 err = mlx4_en_set_cq_moder(priv, cq); 608 err = mlx4_en_set_cq_moder(priv, cq);
623 if (err) { 609 if (err) {
624 mlx4_err(mdev, "Failed setting cq moderation parameters"); 610 en_err(priv, "Failed setting cq moderation parameters");
625 mlx4_en_deactivate_cq(priv, cq); 611 mlx4_en_deactivate_cq(priv, cq);
626 goto tx_err; 612 goto tx_err;
627 } 613 }
628 mlx4_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i); 614 en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
629 cq->buf->wqe_index = cpu_to_be16(0xffff); 615 cq->buf->wqe_index = cpu_to_be16(0xffff);
630 616
631 /* Configure ring */ 617 /* Configure ring */
@@ -633,7 +619,7 @@ int mlx4_en_start_port(struct net_device *dev)
633 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn, 619 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
634 priv->rx_ring[0].srq.srqn); 620 priv->rx_ring[0].srq.srqn);
635 if (err) { 621 if (err) {
636 mlx4_err(mdev, "Failed allocating Tx ring\n"); 622 en_err(priv, "Failed allocating Tx ring\n");
637 mlx4_en_deactivate_cq(priv, cq); 623 mlx4_en_deactivate_cq(priv, cq);
638 goto tx_err; 624 goto tx_err;
639 } 625 }
@@ -651,30 +637,30 @@ int mlx4_en_start_port(struct net_device *dev)
651 priv->prof->rx_pause, 637 priv->prof->rx_pause,
652 priv->prof->rx_ppp); 638 priv->prof->rx_ppp);
653 if (err) { 639 if (err) {
654 mlx4_err(mdev, "Failed setting port general configurations" 640 en_err(priv, "Failed setting port general configurations "
655 " for port %d, with error %d\n", priv->port, err); 641 "for port %d, with error %d\n", priv->port, err);
656 goto tx_err; 642 goto tx_err;
657 } 643 }
658 /* Set default qp number */ 644 /* Set default qp number */
659 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); 645 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
660 if (err) { 646 if (err) {
661 mlx4_err(mdev, "Failed setting default qp numbers\n"); 647 en_err(priv, "Failed setting default qp numbers\n");
662 goto tx_err; 648 goto tx_err;
663 } 649 }
664 /* Set port mac number */ 650 /* Set port mac number */
665 mlx4_dbg(DRV, priv, "Setting mac for port %d\n", priv->port); 651 en_dbg(DRV, priv, "Setting mac for port %d\n", priv->port);
666 err = mlx4_register_mac(mdev->dev, priv->port, 652 err = mlx4_register_mac(mdev->dev, priv->port,
667 priv->mac, &priv->mac_index); 653 priv->mac, &priv->mac_index);
668 if (err) { 654 if (err) {
669 mlx4_err(mdev, "Failed setting port mac\n"); 655 en_err(priv, "Failed setting port mac\n");
670 goto tx_err; 656 goto tx_err;
671 } 657 }
672 658
673 /* Init port */ 659 /* Init port */
674 mlx4_dbg(HW, priv, "Initializing port\n"); 660 en_dbg(HW, priv, "Initializing port\n");
675 err = mlx4_INIT_PORT(mdev->dev, priv->port); 661 err = mlx4_INIT_PORT(mdev->dev, priv->port);
676 if (err) { 662 if (err) {
677 mlx4_err(mdev, "Failed Initializing port\n"); 663 en_err(priv, "Failed Initializing port\n");
678 goto mac_err; 664 goto mac_err;
679 } 665 }
680 666
@@ -694,12 +680,11 @@ tx_err:
694 } 680 }
695 681
696 mlx4_en_release_rss_steer(priv); 682 mlx4_en_release_rss_steer(priv);
697rx_err:
698 for (i = 0; i < priv->rx_ring_num; i++)
699 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
700cq_err: 683cq_err:
701 while (rx_index--) 684 while (rx_index--)
702 mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]); 685 mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
686 for (i = 0; i < priv->rx_ring_num; i++)
687 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
703 688
704 return err; /* need to close devices */ 689 return err; /* need to close devices */
705} 690}
@@ -712,8 +697,7 @@ void mlx4_en_stop_port(struct net_device *dev)
712 int i; 697 int i;
713 698
714 if (!priv->port_up) { 699 if (!priv->port_up) {
715 mlx4_dbg(DRV, priv, "stop port (%d) called while port already down\n", 700 en_dbg(DRV, priv, "stop port called while port already down\n");
716 priv->port);
717 return; 701 return;
718 } 702 }
719 netif_stop_queue(dev); 703 netif_stop_queue(dev);
@@ -758,13 +742,13 @@ static void mlx4_en_restart(struct work_struct *work)
758 struct mlx4_en_dev *mdev = priv->mdev; 742 struct mlx4_en_dev *mdev = priv->mdev;
759 struct net_device *dev = priv->dev; 743 struct net_device *dev = priv->dev;
760 744
761 mlx4_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); 745 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
762 746
763 mutex_lock(&mdev->state_lock); 747 mutex_lock(&mdev->state_lock);
764 if (priv->port_up) { 748 if (priv->port_up) {
765 mlx4_en_stop_port(dev); 749 mlx4_en_stop_port(dev);
766 if (mlx4_en_start_port(dev)) 750 if (mlx4_en_start_port(dev))
767 mlx4_err(mdev, "Failed restarting port %d\n", priv->port); 751 en_err(priv, "Failed restarting port %d\n", priv->port);
768 } 752 }
769 mutex_unlock(&mdev->state_lock); 753 mutex_unlock(&mdev->state_lock);
770} 754}
@@ -780,14 +764,14 @@ static int mlx4_en_open(struct net_device *dev)
780 mutex_lock(&mdev->state_lock); 764 mutex_lock(&mdev->state_lock);
781 765
782 if (!mdev->device_up) { 766 if (!mdev->device_up) {
783 mlx4_err(mdev, "Cannot open - device down/disabled\n"); 767 en_err(priv, "Cannot open - device down/disabled\n");
784 err = -EBUSY; 768 err = -EBUSY;
785 goto out; 769 goto out;
786 } 770 }
787 771
788 /* Reset HW statistics and performance counters */ 772 /* Reset HW statistics and performance counters */
789 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) 773 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
790 mlx4_dbg(HW, priv, "Failed dumping statistics\n"); 774 en_dbg(HW, priv, "Failed dumping statistics\n");
791 775
792 memset(&priv->stats, 0, sizeof(priv->stats)); 776 memset(&priv->stats, 0, sizeof(priv->stats));
793 memset(&priv->pstats, 0, sizeof(priv->pstats)); 777 memset(&priv->pstats, 0, sizeof(priv->pstats));
@@ -804,7 +788,7 @@ static int mlx4_en_open(struct net_device *dev)
804 mlx4_en_set_default_moderation(priv); 788 mlx4_en_set_default_moderation(priv);
805 err = mlx4_en_start_port(dev); 789 err = mlx4_en_start_port(dev);
806 if (err) 790 if (err)
807 mlx4_err(mdev, "Failed starting port:%d\n", priv->port); 791 en_err(priv, "Failed starting port:%d\n", priv->port);
808 792
809out: 793out:
810 mutex_unlock(&mdev->state_lock); 794 mutex_unlock(&mdev->state_lock);
@@ -817,8 +801,7 @@ static int mlx4_en_close(struct net_device *dev)
817 struct mlx4_en_priv *priv = netdev_priv(dev); 801 struct mlx4_en_priv *priv = netdev_priv(dev);
818 struct mlx4_en_dev *mdev = priv->mdev; 802 struct mlx4_en_dev *mdev = priv->mdev;
819 803
820 if (netif_msg_ifdown(priv)) 804 en_dbg(IFDOWN, priv, "Close port called\n");
821 mlx4_info(mdev, "Close called for port:%d\n", priv->port);
822 805
823 mutex_lock(&mdev->state_lock); 806 mutex_lock(&mdev->state_lock);
824 807
@@ -850,7 +833,6 @@ void mlx4_en_free_resources(struct mlx4_en_priv *priv)
850 833
851int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) 834int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
852{ 835{
853 struct mlx4_en_dev *mdev = priv->mdev;
854 struct mlx4_en_port_profile *prof = priv->prof; 836 struct mlx4_en_port_profile *prof = priv->prof;
855 int i; 837 int i;
856 838
@@ -879,7 +861,7 @@ int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
879 return 0; 861 return 0;
880 862
881err: 863err:
882 mlx4_err(mdev, "Failed to allocate NIC resources\n"); 864 en_err(priv, "Failed to allocate NIC resources\n");
883 return -ENOMEM; 865 return -ENOMEM;
884} 866}
885 867
@@ -889,7 +871,7 @@ void mlx4_en_destroy_netdev(struct net_device *dev)
889 struct mlx4_en_priv *priv = netdev_priv(dev); 871 struct mlx4_en_priv *priv = netdev_priv(dev);
890 struct mlx4_en_dev *mdev = priv->mdev; 872 struct mlx4_en_dev *mdev = priv->mdev;
891 873
892 mlx4_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); 874 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
893 875
894 /* Unregister device - this will close the port if it was up */ 876 /* Unregister device - this will close the port if it was up */
895 if (priv->registered) 877 if (priv->registered)
@@ -918,11 +900,11 @@ static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
918 struct mlx4_en_dev *mdev = priv->mdev; 900 struct mlx4_en_dev *mdev = priv->mdev;
919 int err = 0; 901 int err = 0;
920 902
921 mlx4_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", 903 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
922 dev->mtu, new_mtu); 904 dev->mtu, new_mtu);
923 905
924 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) { 906 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
925 mlx4_err(mdev, "Bad MTU size:%d.\n", new_mtu); 907 en_err(priv, "Bad MTU size:%d.\n", new_mtu);
926 return -EPERM; 908 return -EPERM;
927 } 909 }
928 dev->mtu = new_mtu; 910 dev->mtu = new_mtu;
@@ -932,13 +914,13 @@ static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
932 if (!mdev->device_up) { 914 if (!mdev->device_up) {
933 /* NIC is probably restarting - let watchdog task reset 915 /* NIC is probably restarting - let watchdog task reset
934 * the port */ 916 * the port */
935 mlx4_dbg(DRV, priv, "Change MTU called with card down!?\n"); 917 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
936 } else { 918 } else {
937 mlx4_en_stop_port(dev); 919 mlx4_en_stop_port(dev);
938 mlx4_en_set_default_moderation(priv); 920 mlx4_en_set_default_moderation(priv);
939 err = mlx4_en_start_port(dev); 921 err = mlx4_en_start_port(dev);
940 if (err) { 922 if (err) {
941 mlx4_err(mdev, "Failed restarting port:%d\n", 923 en_err(priv, "Failed restarting port:%d\n",
942 priv->port); 924 priv->port);
943 queue_work(mdev->workqueue, &priv->watchdog_task); 925 queue_work(mdev->workqueue, &priv->watchdog_task);
944 } 926 }
@@ -952,6 +934,7 @@ static const struct net_device_ops mlx4_netdev_ops = {
952 .ndo_open = mlx4_en_open, 934 .ndo_open = mlx4_en_open,
953 .ndo_stop = mlx4_en_close, 935 .ndo_stop = mlx4_en_close,
954 .ndo_start_xmit = mlx4_en_xmit, 936 .ndo_start_xmit = mlx4_en_xmit,
937 .ndo_select_queue = mlx4_en_select_queue,
955 .ndo_get_stats = mlx4_en_get_stats, 938 .ndo_get_stats = mlx4_en_get_stats,
956 .ndo_set_multicast_list = mlx4_en_set_multicast, 939 .ndo_set_multicast_list = mlx4_en_set_multicast,
957 .ndo_set_mac_address = mlx4_en_set_mac, 940 .ndo_set_mac_address = mlx4_en_set_mac,
@@ -974,7 +957,7 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
974 int i; 957 int i;
975 int err; 958 int err;
976 959
977 dev = alloc_etherdev(sizeof(struct mlx4_en_priv)); 960 dev = alloc_etherdev_mq(sizeof(struct mlx4_en_priv), prof->tx_ring_num);
978 if (dev == NULL) { 961 if (dev == NULL) {
979 mlx4_err(mdev, "Net device allocation failed\n"); 962 mlx4_err(mdev, "Net device allocation failed\n");
980 return -ENOMEM; 963 return -ENOMEM;
@@ -1012,7 +995,7 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
1012 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; 995 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
1013 priv->mac = mdev->dev->caps.def_mac[priv->port]; 996 priv->mac = mdev->dev->caps.def_mac[priv->port];
1014 if (ILLEGAL_MAC(priv->mac)) { 997 if (ILLEGAL_MAC(priv->mac)) {
1015 mlx4_err(mdev, "Port: %d, invalid mac burned: 0x%llx, quiting\n", 998 en_err(priv, "Port: %d, invalid mac burned: 0x%llx, quiting\n",
1016 priv->port, priv->mac); 999 priv->port, priv->mac);
1017 err = -EINVAL; 1000 err = -EINVAL;
1018 goto out; 1001 goto out;
@@ -1031,19 +1014,17 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
1031 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, 1014 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
1032 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE); 1015 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
1033 if (err) { 1016 if (err) {
1034 mlx4_err(mdev, "Failed to allocate page for rx qps\n"); 1017 en_err(priv, "Failed to allocate page for rx qps\n");
1035 goto out; 1018 goto out;
1036 } 1019 }
1037 priv->allocated = 1; 1020 priv->allocated = 1;
1038 1021
1039 /* Populate Tx priority mappings */
1040 mlx4_en_set_prio_map(priv, priv->tx_prio_map, prof->tx_ring_num);
1041
1042 /* 1022 /*
1043 * Initialize netdev entry points 1023 * Initialize netdev entry points
1044 */ 1024 */
1045 dev->netdev_ops = &mlx4_netdev_ops; 1025 dev->netdev_ops = &mlx4_netdev_ops;
1046 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; 1026 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
1027 dev->real_num_tx_queues = MLX4_EN_NUM_TX_RINGS;
1047 1028
1048 SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops); 1029 SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
1049 1030
@@ -1057,7 +1038,9 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
1057 * Set driver features 1038 * Set driver features
1058 */ 1039 */
1059 dev->features |= NETIF_F_SG; 1040 dev->features |= NETIF_F_SG;
1041 dev->vlan_features |= NETIF_F_SG;
1060 dev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 1042 dev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1043 dev->vlan_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1061 dev->features |= NETIF_F_HIGHDMA; 1044 dev->features |= NETIF_F_HIGHDMA;
1062 dev->features |= NETIF_F_HW_VLAN_TX | 1045 dev->features |= NETIF_F_HW_VLAN_TX |
1063 NETIF_F_HW_VLAN_RX | 1046 NETIF_F_HW_VLAN_RX |
@@ -1067,6 +1050,8 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
1067 if (mdev->LSO_support) { 1050 if (mdev->LSO_support) {
1068 dev->features |= NETIF_F_TSO; 1051 dev->features |= NETIF_F_TSO;
1069 dev->features |= NETIF_F_TSO6; 1052 dev->features |= NETIF_F_TSO6;
1053 dev->vlan_features |= NETIF_F_TSO;
1054 dev->vlan_features |= NETIF_F_TSO6;
1070 } 1055 }
1071 1056
1072 mdev->pndev[port] = dev; 1057 mdev->pndev[port] = dev;
@@ -1074,9 +1059,13 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
1074 netif_carrier_off(dev); 1059 netif_carrier_off(dev);
1075 err = register_netdev(dev); 1060 err = register_netdev(dev);
1076 if (err) { 1061 if (err) {
1077 mlx4_err(mdev, "Netdev registration failed\n"); 1062 en_err(priv, "Netdev registration failed for port %d\n", port);
1078 goto out; 1063 goto out;
1079 } 1064 }
1065
1066 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
1067 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
1068
1080 priv->registered = 1; 1069 priv->registered = 1;
1081 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 1070 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1082 return 0; 1071 return 0;
diff --git a/drivers/net/mlx4/en_rx.c b/drivers/net/mlx4/en_rx.c
index 9ee873e872b3..5a14899c1e25 100644
--- a/drivers/net/mlx4/en_rx.c
+++ b/drivers/net/mlx4/en_rx.c
@@ -114,8 +114,8 @@ static int mlx4_en_init_allocator(struct mlx4_en_priv *priv,
114 goto out; 114 goto out;
115 115
116 page_alloc->offset = priv->frag_info[i].frag_align; 116 page_alloc->offset = priv->frag_info[i].frag_align;
117 mlx4_dbg(DRV, priv, "Initialized allocator:%d with page:%p\n", 117 en_dbg(DRV, priv, "Initialized allocator:%d with page:%p\n",
118 i, page_alloc->page); 118 i, page_alloc->page);
119 } 119 }
120 return 0; 120 return 0;
121 121
@@ -136,8 +136,8 @@ static void mlx4_en_destroy_allocator(struct mlx4_en_priv *priv,
136 136
137 for (i = 0; i < priv->num_frags; i++) { 137 for (i = 0; i < priv->num_frags; i++) {
138 page_alloc = &ring->page_alloc[i]; 138 page_alloc = &ring->page_alloc[i];
139 mlx4_dbg(DRV, priv, "Freeing allocator:%d count:%d\n", 139 en_dbg(DRV, priv, "Freeing allocator:%d count:%d\n",
140 i, page_count(page_alloc->page)); 140 i, page_count(page_alloc->page));
141 141
142 put_page(page_alloc->page); 142 put_page(page_alloc->page);
143 page_alloc->page = NULL; 143 page_alloc->page = NULL;
@@ -202,12 +202,34 @@ static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring)
202 *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff); 202 *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff);
203} 203}
204 204
205static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv) 205static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv,
206 struct mlx4_en_rx_ring *ring,
207 int index)
206{ 208{
207 struct mlx4_en_dev *mdev = priv->mdev; 209 struct mlx4_en_dev *mdev = priv->mdev;
210 struct skb_frag_struct *skb_frags;
211 struct mlx4_en_rx_desc *rx_desc = ring->buf + (index << ring->log_stride);
212 dma_addr_t dma;
213 int nr;
214
215 skb_frags = ring->rx_info + (index << priv->log_rx_info);
216 for (nr = 0; nr < priv->num_frags; nr++) {
217 en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
218 dma = be64_to_cpu(rx_desc->data[nr].addr);
219
220 en_dbg(DRV, priv, "Unmaping buffer at dma:0x%llx\n", (u64) dma);
221 pci_unmap_single(mdev->pdev, dma, skb_frags[nr].size,
222 PCI_DMA_FROMDEVICE);
223 put_page(skb_frags[nr].page);
224 }
225}
226
227static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
228{
208 struct mlx4_en_rx_ring *ring; 229 struct mlx4_en_rx_ring *ring;
209 int ring_ind; 230 int ring_ind;
210 int buf_ind; 231 int buf_ind;
232 int new_size;
211 233
212 for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) { 234 for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) {
213 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) { 235 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
@@ -216,22 +238,34 @@ static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
216 if (mlx4_en_prepare_rx_desc(priv, ring, 238 if (mlx4_en_prepare_rx_desc(priv, ring,
217 ring->actual_size)) { 239 ring->actual_size)) {
218 if (ring->actual_size < MLX4_EN_MIN_RX_SIZE) { 240 if (ring->actual_size < MLX4_EN_MIN_RX_SIZE) {
219 mlx4_err(mdev, "Failed to allocate " 241 en_err(priv, "Failed to allocate "
220 "enough rx buffers\n"); 242 "enough rx buffers\n");
221 return -ENOMEM; 243 return -ENOMEM;
222 } else { 244 } else {
223 if (netif_msg_rx_err(priv)) 245 new_size = rounddown_pow_of_two(ring->actual_size);
224 mlx4_warn(mdev, 246 en_warn(priv, "Only %d buffers allocated "
225 "Only %d buffers allocated\n", 247 "reducing ring size to %d",
226 ring->actual_size); 248 ring->actual_size, new_size);
227 goto out; 249 goto reduce_rings;
228 } 250 }
229 } 251 }
230 ring->actual_size++; 252 ring->actual_size++;
231 ring->prod++; 253 ring->prod++;
232 } 254 }
233 } 255 }
234out: 256 return 0;
257
258reduce_rings:
259 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
260 ring = &priv->rx_ring[ring_ind];
261 while (ring->actual_size > new_size) {
262 ring->actual_size--;
263 ring->prod--;
264 mlx4_en_free_rx_desc(priv, ring, ring->actual_size);
265 }
266 ring->size_mask = ring->actual_size - 1;
267 }
268
235 return 0; 269 return 0;
236} 270}
237 271
@@ -247,15 +281,14 @@ static int mlx4_en_fill_rx_buf(struct net_device *dev,
247 ring->size_mask); 281 ring->size_mask);
248 if (err) { 282 if (err) {
249 if (netif_msg_rx_err(priv)) 283 if (netif_msg_rx_err(priv))
250 mlx4_warn(priv->mdev, 284 en_warn(priv, "Failed preparing rx descriptor\n");
251 "Failed preparing rx descriptor\n");
252 priv->port_stats.rx_alloc_failed++; 285 priv->port_stats.rx_alloc_failed++;
253 break; 286 break;
254 } 287 }
255 ++num; 288 ++num;
256 ++ring->prod; 289 ++ring->prod;
257 } 290 }
258 if ((u32) (ring->prod - ring->cons) == ring->size) 291 if ((u32) (ring->prod - ring->cons) == ring->actual_size)
259 ring->full = 1; 292 ring->full = 1;
260 293
261 return num; 294 return num;
@@ -264,33 +297,17 @@ static int mlx4_en_fill_rx_buf(struct net_device *dev,
264static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv, 297static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv,
265 struct mlx4_en_rx_ring *ring) 298 struct mlx4_en_rx_ring *ring)
266{ 299{
267 struct mlx4_en_dev *mdev = priv->mdev;
268 struct skb_frag_struct *skb_frags;
269 struct mlx4_en_rx_desc *rx_desc;
270 dma_addr_t dma;
271 int index; 300 int index;
272 int nr;
273 301
274 mlx4_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n", 302 en_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n",
275 ring->cons, ring->prod); 303 ring->cons, ring->prod);
276 304
277 /* Unmap and free Rx buffers */ 305 /* Unmap and free Rx buffers */
278 BUG_ON((u32) (ring->prod - ring->cons) > ring->size); 306 BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size);
279 while (ring->cons != ring->prod) { 307 while (ring->cons != ring->prod) {
280 index = ring->cons & ring->size_mask; 308 index = ring->cons & ring->size_mask;
281 rx_desc = ring->buf + (index << ring->log_stride); 309 en_dbg(DRV, priv, "Processing descriptor:%d\n", index);
282 skb_frags = ring->rx_info + (index << priv->log_rx_info); 310 mlx4_en_free_rx_desc(priv, ring, index);
283 mlx4_dbg(DRV, priv, "Processing descriptor:%d\n", index);
284
285 for (nr = 0; nr < priv->num_frags; nr++) {
286 mlx4_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
287 dma = be64_to_cpu(rx_desc->data[nr].addr);
288
289 mlx4_dbg(DRV, priv, "Unmaping buffer at dma:0x%llx\n", (u64) dma);
290 pci_unmap_single(mdev->pdev, dma, skb_frags[nr].size,
291 PCI_DMA_FROMDEVICE);
292 put_page(skb_frags[nr].page);
293 }
294 ++ring->cons; 311 ++ring->cons;
295 } 312 }
296} 313}
@@ -354,10 +371,10 @@ int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
354 sizeof(struct skb_frag_struct)); 371 sizeof(struct skb_frag_struct));
355 ring->rx_info = vmalloc(tmp); 372 ring->rx_info = vmalloc(tmp);
356 if (!ring->rx_info) { 373 if (!ring->rx_info) {
357 mlx4_err(mdev, "Failed allocating rx_info ring\n"); 374 en_err(priv, "Failed allocating rx_info ring\n");
358 return -ENOMEM; 375 return -ENOMEM;
359 } 376 }
360 mlx4_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d\n", 377 en_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d\n",
361 ring->rx_info, tmp); 378 ring->rx_info, tmp);
362 379
363 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, 380 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres,
@@ -367,7 +384,7 @@ int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
367 384
368 err = mlx4_en_map_buffer(&ring->wqres.buf); 385 err = mlx4_en_map_buffer(&ring->wqres.buf);
369 if (err) { 386 if (err) {
370 mlx4_err(mdev, "Failed to map RX buffer\n"); 387 en_err(priv, "Failed to map RX buffer\n");
371 goto err_hwq; 388 goto err_hwq;
372 } 389 }
373 ring->buf = ring->wqres.buf.direct.buf; 390 ring->buf = ring->wqres.buf.direct.buf;
@@ -385,7 +402,7 @@ int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
385 sizeof(struct net_lro_desc), 402 sizeof(struct net_lro_desc),
386 GFP_KERNEL); 403 GFP_KERNEL);
387 if (!ring->lro.lro_arr) { 404 if (!ring->lro.lro_arr) {
388 mlx4_err(mdev, "Failed to allocate lro array\n"); 405 en_err(priv, "Failed to allocate lro array\n");
389 goto err_map; 406 goto err_map;
390 } 407 }
391 ring->lro.get_frag_header = mlx4_en_get_frag_header; 408 ring->lro.get_frag_header = mlx4_en_get_frag_header;
@@ -436,7 +453,7 @@ int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
436 /* Initialize page allocators */ 453 /* Initialize page allocators */
437 err = mlx4_en_init_allocator(priv, ring); 454 err = mlx4_en_init_allocator(priv, ring);
438 if (err) { 455 if (err) {
439 mlx4_err(mdev, "Failed initializing ring allocator\n"); 456 en_err(priv, "Failed initializing ring allocator\n");
440 ring_ind--; 457 ring_ind--;
441 goto err_allocator; 458 goto err_allocator;
442 } 459 }
@@ -454,7 +471,7 @@ int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
454 mlx4_en_update_rx_prod_db(ring); 471 mlx4_en_update_rx_prod_db(ring);
455 472
456 /* Configure SRQ representing the ring */ 473 /* Configure SRQ representing the ring */
457 ring->srq.max = ring->size; 474 ring->srq.max = ring->actual_size;
458 ring->srq.max_gs = max_gs; 475 ring->srq.max_gs = max_gs;
459 ring->srq.wqe_shift = ilog2(ring->stride); 476 ring->srq.wqe_shift = ilog2(ring->stride);
460 477
@@ -467,7 +484,7 @@ int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
467 err = mlx4_srq_alloc(mdev->dev, mdev->priv_pdn, &ring->wqres.mtt, 484 err = mlx4_srq_alloc(mdev->dev, mdev->priv_pdn, &ring->wqres.mtt,
468 ring->wqres.db.dma, &ring->srq); 485 ring->wqres.db.dma, &ring->srq);
469 if (err){ 486 if (err){
470 mlx4_err(mdev, "Failed to allocate srq\n"); 487 en_err(priv, "Failed to allocate srq\n");
471 ring_ind--; 488 ring_ind--;
472 goto err_srq; 489 goto err_srq;
473 } 490 }
@@ -582,7 +599,7 @@ static struct sk_buff *mlx4_en_rx_skb(struct mlx4_en_priv *priv,
582 599
583 skb = dev_alloc_skb(SMALL_PACKET_SIZE + NET_IP_ALIGN); 600 skb = dev_alloc_skb(SMALL_PACKET_SIZE + NET_IP_ALIGN);
584 if (!skb) { 601 if (!skb) {
585 mlx4_dbg(RX_ERR, priv, "Failed allocating skb\n"); 602 en_dbg(RX_ERR, priv, "Failed allocating skb\n");
586 return NULL; 603 return NULL;
587 } 604 }
588 skb->dev = priv->dev; 605 skb->dev = priv->dev;
@@ -661,7 +678,6 @@ static void mlx4_en_copy_desc(struct mlx4_en_priv *priv,
661int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget) 678int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
662{ 679{
663 struct mlx4_en_priv *priv = netdev_priv(dev); 680 struct mlx4_en_priv *priv = netdev_priv(dev);
664 struct mlx4_en_dev *mdev = priv->mdev;
665 struct mlx4_cqe *cqe; 681 struct mlx4_cqe *cqe;
666 struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring]; 682 struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring];
667 struct skb_frag_struct *skb_frags; 683 struct skb_frag_struct *skb_frags;
@@ -698,14 +714,14 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
698 /* Drop packet on bad receive or bad checksum */ 714 /* Drop packet on bad receive or bad checksum */
699 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) == 715 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
700 MLX4_CQE_OPCODE_ERROR)) { 716 MLX4_CQE_OPCODE_ERROR)) {
701 mlx4_err(mdev, "CQE completed in error - vendor " 717 en_err(priv, "CQE completed in error - vendor "
702 "syndrom:%d syndrom:%d\n", 718 "syndrom:%d syndrom:%d\n",
703 ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome, 719 ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome,
704 ((struct mlx4_err_cqe *) cqe)->syndrome); 720 ((struct mlx4_err_cqe *) cqe)->syndrome);
705 goto next; 721 goto next;
706 } 722 }
707 if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) { 723 if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) {
708 mlx4_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n"); 724 en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n");
709 goto next; 725 goto next;
710 } 726 }
711 727
@@ -855,7 +871,7 @@ static int mlx4_en_last_alloc_offset(struct mlx4_en_priv *priv, u16 stride, u16
855 u16 res = MLX4_EN_ALLOC_SIZE % stride; 871 u16 res = MLX4_EN_ALLOC_SIZE % stride;
856 u16 offset = MLX4_EN_ALLOC_SIZE - stride - res + align; 872 u16 offset = MLX4_EN_ALLOC_SIZE - stride - res + align;
857 873
858 mlx4_dbg(DRV, priv, "Calculated last offset for stride:%d align:%d " 874 en_dbg(DRV, priv, "Calculated last offset for stride:%d align:%d "
859 "res:%d offset:%d\n", stride, align, res, offset); 875 "res:%d offset:%d\n", stride, align, res, offset);
860 return offset; 876 return offset;
861} 877}
@@ -900,10 +916,10 @@ void mlx4_en_calc_rx_buf(struct net_device *dev)
900 priv->rx_skb_size = eff_mtu; 916 priv->rx_skb_size = eff_mtu;
901 priv->log_rx_info = ROUNDUP_LOG2(i * sizeof(struct skb_frag_struct)); 917 priv->log_rx_info = ROUNDUP_LOG2(i * sizeof(struct skb_frag_struct));
902 918
903 mlx4_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d " 919 en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d "
904 "num_frags:%d):\n", eff_mtu, priv->num_frags); 920 "num_frags:%d):\n", eff_mtu, priv->num_frags);
905 for (i = 0; i < priv->num_frags; i++) { 921 for (i = 0; i < priv->num_frags; i++) {
906 mlx4_dbg(DRV, priv, " frag:%d - size:%d prefix:%d align:%d " 922 en_dbg(DRV, priv, " frag:%d - size:%d prefix:%d align:%d "
907 "stride:%d last_offset:%d\n", i, 923 "stride:%d last_offset:%d\n", i,
908 priv->frag_info[i].frag_size, 924 priv->frag_info[i].frag_size,
909 priv->frag_info[i].frag_prefix_size, 925 priv->frag_info[i].frag_prefix_size,
@@ -923,12 +939,12 @@ void mlx4_en_set_default_rss_map(struct mlx4_en_priv *priv,
923 int i; 939 int i;
924 940
925 rss_map->size = roundup_pow_of_two(num_entries); 941 rss_map->size = roundup_pow_of_two(num_entries);
926 mlx4_dbg(DRV, priv, "Setting default RSS map of %d entires\n", 942 en_dbg(DRV, priv, "Setting default RSS map of %d entires\n",
927 rss_map->size); 943 rss_map->size);
928 944
929 for (i = 0; i < rss_map->size; i++) { 945 for (i = 0; i < rss_map->size; i++) {
930 rss_map->map[i] = i % num_rings; 946 rss_map->map[i] = i % num_rings;
931 mlx4_dbg(DRV, priv, "Entry %d ---> ring %d\n", i, rss_map->map[i]); 947 en_dbg(DRV, priv, "Entry %d ---> ring %d\n", i, rss_map->map[i]);
932 } 948 }
933} 949}
934 950
@@ -943,13 +959,13 @@ static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv,
943 959
944 context = kmalloc(sizeof *context , GFP_KERNEL); 960 context = kmalloc(sizeof *context , GFP_KERNEL);
945 if (!context) { 961 if (!context) {
946 mlx4_err(mdev, "Failed to allocate qp context\n"); 962 en_err(priv, "Failed to allocate qp context\n");
947 return -ENOMEM; 963 return -ENOMEM;
948 } 964 }
949 965
950 err = mlx4_qp_alloc(mdev->dev, qpn, qp); 966 err = mlx4_qp_alloc(mdev->dev, qpn, qp);
951 if (err) { 967 if (err) {
952 mlx4_err(mdev, "Failed to allocate qp #%d\n", qpn); 968 en_err(priv, "Failed to allocate qp #%x\n", qpn);
953 goto out; 969 goto out;
954 } 970 }
955 qp->event = mlx4_en_sqp_event; 971 qp->event = mlx4_en_sqp_event;
@@ -981,12 +997,11 @@ int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
981 int err = 0; 997 int err = 0;
982 int good_qps = 0; 998 int good_qps = 0;
983 999
984 mlx4_dbg(DRV, priv, "Configuring rss steering for port %u\n", priv->port); 1000 en_dbg(DRV, priv, "Configuring rss steering\n");
985 err = mlx4_qp_reserve_range(mdev->dev, rss_map->size, 1001 err = mlx4_qp_reserve_range(mdev->dev, rss_map->size,
986 rss_map->size, &rss_map->base_qpn); 1002 rss_map->size, &rss_map->base_qpn);
987 if (err) { 1003 if (err) {
988 mlx4_err(mdev, "Failed reserving %d qps for port %u\n", 1004 en_err(priv, "Failed reserving %d qps\n", rss_map->size);
989 rss_map->size, priv->port);
990 return err; 1005 return err;
991 } 1006 }
992 1007
@@ -1006,13 +1021,13 @@ int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
1006 /* Configure RSS indirection qp */ 1021 /* Configure RSS indirection qp */
1007 err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &priv->base_qpn); 1022 err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &priv->base_qpn);
1008 if (err) { 1023 if (err) {
1009 mlx4_err(mdev, "Failed to reserve range for RSS " 1024 en_err(priv, "Failed to reserve range for RSS "
1010 "indirection qp\n"); 1025 "indirection qp\n");
1011 goto rss_err; 1026 goto rss_err;
1012 } 1027 }
1013 err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp); 1028 err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp);
1014 if (err) { 1029 if (err) {
1015 mlx4_err(mdev, "Failed to allocate RSS indirection QP\n"); 1030 en_err(priv, "Failed to allocate RSS indirection QP\n");
1016 goto reserve_err; 1031 goto reserve_err;
1017 } 1032 }
1018 rss_map->indir_qp.event = mlx4_en_sqp_event; 1033 rss_map->indir_qp.event = mlx4_en_sqp_event;
diff --git a/drivers/net/mlx4/en_tx.c b/drivers/net/mlx4/en_tx.c
index e5c98a98ad37..5dc7466ad035 100644
--- a/drivers/net/mlx4/en_tx.c
+++ b/drivers/net/mlx4/en_tx.c
@@ -68,15 +68,15 @@ int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
68 tmp = size * sizeof(struct mlx4_en_tx_info); 68 tmp = size * sizeof(struct mlx4_en_tx_info);
69 ring->tx_info = vmalloc(tmp); 69 ring->tx_info = vmalloc(tmp);
70 if (!ring->tx_info) { 70 if (!ring->tx_info) {
71 mlx4_err(mdev, "Failed allocating tx_info ring\n"); 71 en_err(priv, "Failed allocating tx_info ring\n");
72 return -ENOMEM; 72 return -ENOMEM;
73 } 73 }
74 mlx4_dbg(DRV, priv, "Allocated tx_info ring at addr:%p size:%d\n", 74 en_dbg(DRV, priv, "Allocated tx_info ring at addr:%p size:%d\n",
75 ring->tx_info, tmp); 75 ring->tx_info, tmp);
76 76
77 ring->bounce_buf = kmalloc(MAX_DESC_SIZE, GFP_KERNEL); 77 ring->bounce_buf = kmalloc(MAX_DESC_SIZE, GFP_KERNEL);
78 if (!ring->bounce_buf) { 78 if (!ring->bounce_buf) {
79 mlx4_err(mdev, "Failed allocating bounce buffer\n"); 79 en_err(priv, "Failed allocating bounce buffer\n");
80 err = -ENOMEM; 80 err = -ENOMEM;
81 goto err_tx; 81 goto err_tx;
82 } 82 }
@@ -85,31 +85,31 @@ int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
85 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size, 85 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size,
86 2 * PAGE_SIZE); 86 2 * PAGE_SIZE);
87 if (err) { 87 if (err) {
88 mlx4_err(mdev, "Failed allocating hwq resources\n"); 88 en_err(priv, "Failed allocating hwq resources\n");
89 goto err_bounce; 89 goto err_bounce;
90 } 90 }
91 91
92 err = mlx4_en_map_buffer(&ring->wqres.buf); 92 err = mlx4_en_map_buffer(&ring->wqres.buf);
93 if (err) { 93 if (err) {
94 mlx4_err(mdev, "Failed to map TX buffer\n"); 94 en_err(priv, "Failed to map TX buffer\n");
95 goto err_hwq_res; 95 goto err_hwq_res;
96 } 96 }
97 97
98 ring->buf = ring->wqres.buf.direct.buf; 98 ring->buf = ring->wqres.buf.direct.buf;
99 99
100 mlx4_dbg(DRV, priv, "Allocated TX ring (addr:%p) - buf:%p size:%d " 100 en_dbg(DRV, priv, "Allocated TX ring (addr:%p) - buf:%p size:%d "
101 "buf_size:%d dma:%llx\n", ring, ring->buf, ring->size, 101 "buf_size:%d dma:%llx\n", ring, ring->buf, ring->size,
102 ring->buf_size, (unsigned long long) ring->wqres.buf.direct.map); 102 ring->buf_size, (unsigned long long) ring->wqres.buf.direct.map);
103 103
104 err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &ring->qpn); 104 err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &ring->qpn);
105 if (err) { 105 if (err) {
106 mlx4_err(mdev, "Failed reserving qp for tx ring.\n"); 106 en_err(priv, "Failed reserving qp for tx ring.\n");
107 goto err_map; 107 goto err_map;
108 } 108 }
109 109
110 err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp); 110 err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp);
111 if (err) { 111 if (err) {
112 mlx4_err(mdev, "Failed allocating qp %d\n", ring->qpn); 112 en_err(priv, "Failed allocating qp %d\n", ring->qpn);
113 goto err_reserve; 113 goto err_reserve;
114 } 114 }
115 ring->qp.event = mlx4_en_sqp_event; 115 ring->qp.event = mlx4_en_sqp_event;
@@ -135,7 +135,7 @@ void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
135 struct mlx4_en_tx_ring *ring) 135 struct mlx4_en_tx_ring *ring)
136{ 136{
137 struct mlx4_en_dev *mdev = priv->mdev; 137 struct mlx4_en_dev *mdev = priv->mdev;
138 mlx4_dbg(DRV, priv, "Destroying tx ring, qpn: %d\n", ring->qpn); 138 en_dbg(DRV, priv, "Destroying tx ring, qpn: %d\n", ring->qpn);
139 139
140 mlx4_qp_remove(mdev->dev, &ring->qp); 140 mlx4_qp_remove(mdev->dev, &ring->qp);
141 mlx4_qp_free(mdev->dev, &ring->qp); 141 mlx4_qp_free(mdev->dev, &ring->qp);
@@ -274,12 +274,12 @@ int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring)
274 274
275 /* Skip last polled descriptor */ 275 /* Skip last polled descriptor */
276 ring->cons += ring->last_nr_txbb; 276 ring->cons += ring->last_nr_txbb;
277 mlx4_dbg(DRV, priv, "Freeing Tx buf - cons:0x%x prod:0x%x\n", 277 en_dbg(DRV, priv, "Freeing Tx buf - cons:0x%x prod:0x%x\n",
278 ring->cons, ring->prod); 278 ring->cons, ring->prod);
279 279
280 if ((u32) (ring->prod - ring->cons) > ring->size) { 280 if ((u32) (ring->prod - ring->cons) > ring->size) {
281 if (netif_msg_tx_err(priv)) 281 if (netif_msg_tx_err(priv))
282 mlx4_warn(priv->mdev, "Tx consumer passed producer!\n"); 282 en_warn(priv, "Tx consumer passed producer!\n");
283 return 0; 283 return 0;
284 } 284 }
285 285
@@ -292,39 +292,11 @@ int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring)
292 } 292 }
293 293
294 if (cnt) 294 if (cnt)
295 mlx4_dbg(DRV, priv, "Freed %d uncompleted tx descriptors\n", cnt); 295 en_dbg(DRV, priv, "Freed %d uncompleted tx descriptors\n", cnt);
296 296
297 return cnt; 297 return cnt;
298} 298}
299 299
300void mlx4_en_set_prio_map(struct mlx4_en_priv *priv, u16 *prio_map, u32 ring_num)
301{
302 int block = 8 / ring_num;
303 int extra = 8 - (block * ring_num);
304 int num = 0;
305 u16 ring = 1;
306 int prio;
307
308 if (ring_num == 1) {
309 for (prio = 0; prio < 8; prio++)
310 prio_map[prio] = 0;
311 return;
312 }
313
314 for (prio = 0; prio < 8; prio++) {
315 if (extra && (num == block + 1)) {
316 ring++;
317 num = 0;
318 extra--;
319 } else if (!extra && (num == block)) {
320 ring++;
321 num = 0;
322 }
323 prio_map[prio] = ring;
324 mlx4_dbg(DRV, priv, " prio:%d --> ring:%d\n", prio, ring);
325 num++;
326 }
327}
328 300
329static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq) 301static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)
330{ 302{
@@ -386,18 +358,8 @@ static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)
386 if (unlikely(ring->blocked)) { 358 if (unlikely(ring->blocked)) {
387 if ((u32) (ring->prod - ring->cons) <= 359 if ((u32) (ring->prod - ring->cons) <=
388 ring->size - HEADROOM - MAX_DESC_TXBBS) { 360 ring->size - HEADROOM - MAX_DESC_TXBBS) {
389
390 /* TODO: support multiqueue netdevs. Currently, we block
391 * when *any* ring is full. Note that:
392 * - 2 Tx rings can unblock at the same time and call
393 * netif_wake_queue(), which is OK since this
394 * operation is idempotent.
395 * - We might wake the queue just after another ring
396 * stopped it. This is no big deal because the next
397 * transmission on that ring would stop the queue.
398 */
399 ring->blocked = 0; 361 ring->blocked = 0;
400 netif_wake_queue(dev); 362 netif_tx_wake_queue(netdev_get_tx_queue(dev, cq->ring));
401 priv->port_stats.wake_queue++; 363 priv->port_stats.wake_queue++;
402 } 364 }
403 } 365 }
@@ -539,7 +501,6 @@ static int get_real_size(struct sk_buff *skb, struct net_device *dev,
539 int *lso_header_size) 501 int *lso_header_size)
540{ 502{
541 struct mlx4_en_priv *priv = netdev_priv(dev); 503 struct mlx4_en_priv *priv = netdev_priv(dev);
542 struct mlx4_en_dev *mdev = priv->mdev;
543 int real_size; 504 int real_size;
544 505
545 if (skb_is_gso(skb)) { 506 if (skb_is_gso(skb)) {
@@ -553,14 +514,14 @@ static int get_real_size(struct sk_buff *skb, struct net_device *dev,
553 real_size += DS_SIZE; 514 real_size += DS_SIZE;
554 else { 515 else {
555 if (netif_msg_tx_err(priv)) 516 if (netif_msg_tx_err(priv))
556 mlx4_warn(mdev, "Non-linear headers\n"); 517 en_warn(priv, "Non-linear headers\n");
557 dev_kfree_skb_any(skb); 518 dev_kfree_skb_any(skb);
558 return 0; 519 return 0;
559 } 520 }
560 } 521 }
561 if (unlikely(*lso_header_size > MAX_LSO_HDR_SIZE)) { 522 if (unlikely(*lso_header_size > MAX_LSO_HDR_SIZE)) {
562 if (netif_msg_tx_err(priv)) 523 if (netif_msg_tx_err(priv))
563 mlx4_warn(mdev, "LSO header size too big\n"); 524 en_warn(priv, "LSO header size too big\n");
564 dev_kfree_skb_any(skb); 525 dev_kfree_skb_any(skb);
565 return 0; 526 return 0;
566 } 527 }
@@ -617,21 +578,20 @@ static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *sk
617 tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f; 578 tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f;
618} 579}
619 580
620static int get_vlan_info(struct mlx4_en_priv *priv, struct sk_buff *skb, 581u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb)
621 u16 *vlan_tag)
622{ 582{
623 int tx_ind; 583 struct mlx4_en_priv *priv = netdev_priv(dev);
584 u16 vlan_tag = 0;
624 585
625 /* Obtain VLAN information if present */ 586 /* If we support per priority flow control and the packet contains
626 if (priv->vlgrp && vlan_tx_tag_present(skb)) { 587 * a vlan tag, send the packet to the TX ring assigned to that priority
627 *vlan_tag = vlan_tx_tag_get(skb); 588 */
628 /* Set the Tx ring to use according to vlan priority */ 589 if (priv->prof->rx_ppp && priv->vlgrp && vlan_tx_tag_present(skb)) {
629 tx_ind = priv->tx_prio_map[*vlan_tag >> 13]; 590 vlan_tag = vlan_tx_tag_get(skb);
630 } else { 591 return MLX4_EN_NUM_TX_RINGS + (vlan_tag >> 13);
631 *vlan_tag = 0;
632 tx_ind = 0;
633 } 592 }
634 return tx_ind; 593
594 return skb_tx_hash(dev, skb);
635} 595}
636 596
637int mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev) 597int mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
@@ -651,7 +611,7 @@ int mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
651 dma_addr_t dma; 611 dma_addr_t dma;
652 u32 index; 612 u32 index;
653 __be32 op_own; 613 __be32 op_own;
654 u16 vlan_tag; 614 u16 vlan_tag = 0;
655 int i; 615 int i;
656 int lso_header_size; 616 int lso_header_size;
657 void *fragptr; 617 void *fragptr;
@@ -669,20 +629,21 @@ int mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
669 nr_txbb = desc_size / TXBB_SIZE; 629 nr_txbb = desc_size / TXBB_SIZE;
670 if (unlikely(nr_txbb > MAX_DESC_TXBBS)) { 630 if (unlikely(nr_txbb > MAX_DESC_TXBBS)) {
671 if (netif_msg_tx_err(priv)) 631 if (netif_msg_tx_err(priv))
672 mlx4_warn(mdev, "Oversized header or SG list\n"); 632 en_warn(priv, "Oversized header or SG list\n");
673 dev_kfree_skb_any(skb); 633 dev_kfree_skb_any(skb);
674 return NETDEV_TX_OK; 634 return NETDEV_TX_OK;
675 } 635 }
676 636
677 tx_ind = get_vlan_info(priv, skb, &vlan_tag); 637 tx_ind = skb->queue_mapping;
678 ring = &priv->tx_ring[tx_ind]; 638 ring = &priv->tx_ring[tx_ind];
639 if (priv->vlgrp && vlan_tx_tag_present(skb))
640 vlan_tag = vlan_tx_tag_get(skb);
679 641
680 /* Check available TXBBs And 2K spare for prefetch */ 642 /* Check available TXBBs And 2K spare for prefetch */
681 if (unlikely(((int)(ring->prod - ring->cons)) > 643 if (unlikely(((int)(ring->prod - ring->cons)) >
682 ring->size - HEADROOM - MAX_DESC_TXBBS)) { 644 ring->size - HEADROOM - MAX_DESC_TXBBS)) {
683 /* every full Tx ring stops queue. 645 /* every full Tx ring stops queue */
684 * TODO: implement multi-queue support (per-queue stop) */ 646 netif_tx_stop_queue(netdev_get_tx_queue(dev, tx_ind));
685 netif_stop_queue(dev);
686 ring->blocked = 1; 647 ring->blocked = 1;
687 priv->port_stats.queue_stopped++; 648 priv->port_stats.queue_stopped++;
688 649
@@ -695,7 +656,7 @@ int mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
695 /* Now that we know what Tx ring to use */ 656 /* Now that we know what Tx ring to use */
696 if (unlikely(!priv->port_up)) { 657 if (unlikely(!priv->port_up)) {
697 if (netif_msg_tx_err(priv)) 658 if (netif_msg_tx_err(priv))
698 mlx4_warn(mdev, "xmit: port down!\n"); 659 en_warn(priv, "xmit: port down!\n");
699 dev_kfree_skb_any(skb); 660 dev_kfree_skb_any(skb);
700 return NETDEV_TX_OK; 661 return NETDEV_TX_OK;
701 } 662 }
@@ -819,7 +780,6 @@ int mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
819 /* Ring doorbell! */ 780 /* Ring doorbell! */
820 wmb(); 781 wmb();
821 writel(ring->doorbell_qpn, mdev->uar_map + MLX4_SEND_DOORBELL); 782 writel(ring->doorbell_qpn, mdev->uar_map + MLX4_SEND_DOORBELL);
822 dev->trans_start = jiffies;
823 783
824 /* Poll CQ here */ 784 /* Poll CQ here */
825 mlx4_en_xmit_poll(priv, tx_ind); 785 mlx4_en_xmit_poll(priv, tx_ind);
diff --git a/drivers/net/mlx4/mlx4_en.h b/drivers/net/mlx4/mlx4_en.h
index ef840abbcd39..d43a9e4c2aea 100644
--- a/drivers/net/mlx4/mlx4_en.h
+++ b/drivers/net/mlx4/mlx4_en.h
@@ -49,26 +49,42 @@
49#include "en_port.h" 49#include "en_port.h"
50 50
51#define DRV_NAME "mlx4_en" 51#define DRV_NAME "mlx4_en"
52#define DRV_VERSION "1.4.0" 52#define DRV_VERSION "1.4.1.1"
53#define DRV_RELDATE "Sep 2008" 53#define DRV_RELDATE "June 2009"
54 54
55 55
56#define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN) 56#define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN)
57 57
58#define mlx4_dbg(mlevel, priv, format, arg...) \ 58#define en_print(level, priv, format, arg...) \
59 if (NETIF_MSG_##mlevel & priv->msg_enable) \ 59 { \
60 printk(KERN_DEBUG "%s %s: " format , DRV_NAME ,\ 60 if ((priv)->registered) \
61 (dev_name(&priv->mdev->pdev->dev)) , ## arg) 61 printk(level "%s: %s: " format, DRV_NAME, \
62 (priv->dev)->name, ## arg); \
63 else \
64 printk(level "%s: %s: Port %d: " format, \
65 DRV_NAME, dev_name(&priv->mdev->pdev->dev), \
66 (priv)->port, ## arg); \
67 }
68
69#define en_dbg(mlevel, priv, format, arg...) \
70 { \
71 if (NETIF_MSG_##mlevel & priv->msg_enable) \
72 en_print(KERN_DEBUG, priv, format, ## arg) \
73 }
74#define en_warn(priv, format, arg...) \
75 en_print(KERN_WARNING, priv, format, ## arg)
76#define en_err(priv, format, arg...) \
77 en_print(KERN_ERR, priv, format, ## arg)
62 78
63#define mlx4_err(mdev, format, arg...) \ 79#define mlx4_err(mdev, format, arg...) \
64 printk(KERN_ERR "%s %s: " format , DRV_NAME ,\ 80 printk(KERN_ERR "%s %s: " format , DRV_NAME ,\
65 (dev_name(&mdev->pdev->dev)) , ## arg) 81 dev_name(&mdev->pdev->dev) , ## arg)
66#define mlx4_info(mdev, format, arg...) \ 82#define mlx4_info(mdev, format, arg...) \
67 printk(KERN_INFO "%s %s: " format , DRV_NAME ,\ 83 printk(KERN_INFO "%s %s: " format , DRV_NAME ,\
68 (dev_name(&mdev->pdev->dev)) , ## arg) 84 dev_name(&mdev->pdev->dev) , ## arg)
69#define mlx4_warn(mdev, format, arg...) \ 85#define mlx4_warn(mdev, format, arg...) \
70 printk(KERN_WARNING "%s %s: " format , DRV_NAME ,\ 86 printk(KERN_WARNING "%s %s: " format , DRV_NAME ,\
71 (dev_name(&mdev->pdev->dev)) , ## arg) 87 dev_name(&mdev->pdev->dev) , ## arg)
72 88
73/* 89/*
74 * Device constants 90 * Device constants
@@ -123,12 +139,14 @@ enum {
123#define MLX4_EN_MIN_RX_SIZE (MLX4_EN_ALLOC_SIZE / SMP_CACHE_BYTES) 139#define MLX4_EN_MIN_RX_SIZE (MLX4_EN_ALLOC_SIZE / SMP_CACHE_BYTES)
124#define MLX4_EN_MIN_TX_SIZE (4096 / TXBB_SIZE) 140#define MLX4_EN_MIN_TX_SIZE (4096 / TXBB_SIZE)
125 141
126#define MLX4_EN_TX_RING_NUM 9 142#define MLX4_EN_SMALL_PKT_SIZE 64
127#define MLX4_EN_DEF_TX_RING_SIZE 1024 143#define MLX4_EN_NUM_TX_RINGS 8
144#define MLX4_EN_NUM_PPP_RINGS 8
145#define MLX4_EN_DEF_TX_RING_SIZE 512
128#define MLX4_EN_DEF_RX_RING_SIZE 1024 146#define MLX4_EN_DEF_RX_RING_SIZE 1024
129 147
130/* Target number of bytes to coalesce with interrupt moderation */ 148/* Target number of packets to coalesce with interrupt moderation */
131#define MLX4_EN_RX_COAL_TARGET 0x20000 149#define MLX4_EN_RX_COAL_TARGET 44
132#define MLX4_EN_RX_COAL_TIME 0x10 150#define MLX4_EN_RX_COAL_TIME 0x10
133 151
134#define MLX4_EN_TX_COAL_PKTS 5 152#define MLX4_EN_TX_COAL_PKTS 5
@@ -462,7 +480,6 @@ struct mlx4_en_priv {
462 int base_qpn; 480 int base_qpn;
463 481
464 struct mlx4_en_rss_map rss_map; 482 struct mlx4_en_rss_map rss_map;
465 u16 tx_prio_map[8];
466 u32 flags; 483 u32 flags;
467#define MLX4_EN_FLAG_PROMISC 0x1 484#define MLX4_EN_FLAG_PROMISC 0x1
468 u32 tx_ring_num; 485 u32 tx_ring_num;
@@ -500,8 +517,6 @@ void mlx4_en_stop_port(struct net_device *dev);
500void mlx4_en_free_resources(struct mlx4_en_priv *priv); 517void mlx4_en_free_resources(struct mlx4_en_priv *priv);
501int mlx4_en_alloc_resources(struct mlx4_en_priv *priv); 518int mlx4_en_alloc_resources(struct mlx4_en_priv *priv);
502 519
503int mlx4_en_get_profile(struct mlx4_en_dev *mdev);
504
505int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq, 520int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
506 int entries, int ring, enum cq_type mode); 521 int entries, int ring, enum cq_type mode);
507void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); 522void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
@@ -512,6 +527,7 @@ int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
512 527
513void mlx4_en_poll_tx_cq(unsigned long data); 528void mlx4_en_poll_tx_cq(unsigned long data);
514void mlx4_en_tx_irq(struct mlx4_cq *mcq); 529void mlx4_en_tx_irq(struct mlx4_cq *mcq);
530u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb);
515int mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev); 531int mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev);
516 532
517int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring, 533int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring,
@@ -546,7 +562,6 @@ void mlx4_en_calc_rx_buf(struct net_device *dev);
546void mlx4_en_set_default_rss_map(struct mlx4_en_priv *priv, 562void mlx4_en_set_default_rss_map(struct mlx4_en_priv *priv,
547 struct mlx4_en_rss_map *rss_map, 563 struct mlx4_en_rss_map *rss_map,
548 int num_entries, int num_rings); 564 int num_entries, int num_rings);
549void mlx4_en_set_prio_map(struct mlx4_en_priv *priv, u16 *prio_map, u32 ring_num);
550int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv); 565int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv);
551void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv); 566void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv);
552int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring); 567int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring);
diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c
index 0caf74cae8bc..0a467785f065 100644
--- a/drivers/net/mlx4/mr.c
+++ b/drivers/net/mlx4/mr.c
@@ -402,7 +402,8 @@ static int mlx4_write_mtt_chunk(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
402 for (i = 0; i < npages; ++i) 402 for (i = 0; i < npages; ++i)
403 mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT); 403 mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT);
404 404
405 dma_sync_single(&dev->pdev->dev, dma_handle, npages * sizeof (u64), DMA_TO_DEVICE); 405 dma_sync_single_for_cpu(&dev->pdev->dev, dma_handle,
406 npages * sizeof (u64), DMA_TO_DEVICE);
406 407
407 return 0; 408 return 0;
408} 409}
@@ -549,8 +550,8 @@ int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list
549 for (i = 0; i < npages; ++i) 550 for (i = 0; i < npages; ++i)
550 fmr->mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT); 551 fmr->mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT);
551 552
552 dma_sync_single(&dev->pdev->dev, fmr->dma_handle, 553 dma_sync_single_for_cpu(&dev->pdev->dev, fmr->dma_handle,
553 npages * sizeof(u64), DMA_TO_DEVICE); 554 npages * sizeof(u64), DMA_TO_DEVICE);
554 555
555 fmr->mpt->key = cpu_to_be32(key); 556 fmr->mpt->key = cpu_to_be32(key);
556 fmr->mpt->lkey = cpu_to_be32(key); 557 fmr->mpt->lkey = cpu_to_be32(key);
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 6bb5af35eda6..b4e18a58cb1b 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -55,6 +55,7 @@
55#include <linux/types.h> 55#include <linux/types.h>
56#include <linux/inet_lro.h> 56#include <linux/inet_lro.h>
57#include <asm/system.h> 57#include <asm/system.h>
58#include <linux/list.h>
58 59
59static char mv643xx_eth_driver_name[] = "mv643xx_eth"; 60static char mv643xx_eth_driver_name[] = "mv643xx_eth";
60static char mv643xx_eth_driver_version[] = "1.4"; 61static char mv643xx_eth_driver_version[] = "1.4";
@@ -88,7 +89,24 @@ static char mv643xx_eth_driver_version[] = "1.4";
88#define MAC_ADDR_LOW 0x0014 89#define MAC_ADDR_LOW 0x0014
89#define MAC_ADDR_HIGH 0x0018 90#define MAC_ADDR_HIGH 0x0018
90#define SDMA_CONFIG 0x001c 91#define SDMA_CONFIG 0x001c
92#define TX_BURST_SIZE_16_64BIT 0x01000000
93#define TX_BURST_SIZE_4_64BIT 0x00800000
94#define BLM_TX_NO_SWAP 0x00000020
95#define BLM_RX_NO_SWAP 0x00000010
96#define RX_BURST_SIZE_16_64BIT 0x00000008
97#define RX_BURST_SIZE_4_64BIT 0x00000004
91#define PORT_SERIAL_CONTROL 0x003c 98#define PORT_SERIAL_CONTROL 0x003c
99#define SET_MII_SPEED_TO_100 0x01000000
100#define SET_GMII_SPEED_TO_1000 0x00800000
101#define SET_FULL_DUPLEX_MODE 0x00200000
102#define MAX_RX_PACKET_9700BYTE 0x000a0000
103#define DISABLE_AUTO_NEG_SPEED_GMII 0x00002000
104#define DO_NOT_FORCE_LINK_FAIL 0x00000400
105#define SERIAL_PORT_CONTROL_RESERVED 0x00000200
106#define DISABLE_AUTO_NEG_FOR_FLOW_CTRL 0x00000008
107#define DISABLE_AUTO_NEG_FOR_DUPLEX 0x00000004
108#define FORCE_LINK_PASS 0x00000002
109#define SERIAL_PORT_ENABLE 0x00000001
92#define PORT_STATUS 0x0044 110#define PORT_STATUS 0x0044
93#define TX_FIFO_EMPTY 0x00000400 111#define TX_FIFO_EMPTY 0x00000400
94#define TX_IN_PROGRESS 0x00000080 112#define TX_IN_PROGRESS 0x00000080
@@ -106,7 +124,9 @@ static char mv643xx_eth_driver_version[] = "1.4";
106#define TX_BW_BURST 0x005c 124#define TX_BW_BURST 0x005c
107#define INT_CAUSE 0x0060 125#define INT_CAUSE 0x0060
108#define INT_TX_END 0x07f80000 126#define INT_TX_END 0x07f80000
127#define INT_TX_END_0 0x00080000
109#define INT_RX 0x000003fc 128#define INT_RX 0x000003fc
129#define INT_RX_0 0x00000004
110#define INT_EXT 0x00000002 130#define INT_EXT 0x00000002
111#define INT_CAUSE_EXT 0x0064 131#define INT_CAUSE_EXT 0x0064
112#define INT_EXT_LINK_PHY 0x00110000 132#define INT_EXT_LINK_PHY 0x00110000
@@ -135,15 +155,8 @@ static char mv643xx_eth_driver_version[] = "1.4";
135 155
136 156
137/* 157/*
138 * SDMA configuration register. 158 * SDMA configuration register default value.
139 */ 159 */
140#define RX_BURST_SIZE_4_64BIT (2 << 1)
141#define RX_BURST_SIZE_16_64BIT (4 << 1)
142#define BLM_RX_NO_SWAP (1 << 4)
143#define BLM_TX_NO_SWAP (1 << 5)
144#define TX_BURST_SIZE_4_64BIT (2 << 22)
145#define TX_BURST_SIZE_16_64BIT (4 << 22)
146
147#if defined(__BIG_ENDIAN) 160#if defined(__BIG_ENDIAN)
148#define PORT_SDMA_CONFIG_DEFAULT_VALUE \ 161#define PORT_SDMA_CONFIG_DEFAULT_VALUE \
149 (RX_BURST_SIZE_4_64BIT | \ 162 (RX_BURST_SIZE_4_64BIT | \
@@ -160,22 +173,11 @@ static char mv643xx_eth_driver_version[] = "1.4";
160 173
161 174
162/* 175/*
163 * Port serial control register. 176 * Misc definitions.
164 */ 177 */
165#define SET_MII_SPEED_TO_100 (1 << 24) 178#define DEFAULT_RX_QUEUE_SIZE 128
166#define SET_GMII_SPEED_TO_1000 (1 << 23) 179#define DEFAULT_TX_QUEUE_SIZE 256
167#define SET_FULL_DUPLEX_MODE (1 << 21) 180#define SKB_DMA_REALIGN ((PAGE_SIZE - NET_SKB_PAD) % SMP_CACHE_BYTES)
168#define MAX_RX_PACKET_9700BYTE (5 << 17)
169#define DISABLE_AUTO_NEG_SPEED_GMII (1 << 13)
170#define DO_NOT_FORCE_LINK_FAIL (1 << 10)
171#define SERIAL_PORT_CONTROL_RESERVED (1 << 9)
172#define DISABLE_AUTO_NEG_FOR_FLOW_CTRL (1 << 3)
173#define DISABLE_AUTO_NEG_FOR_DUPLEX (1 << 2)
174#define FORCE_LINK_PASS (1 << 1)
175#define SERIAL_PORT_ENABLE (1 << 0)
176
177#define DEFAULT_RX_QUEUE_SIZE 128
178#define DEFAULT_TX_QUEUE_SIZE 256
179 181
180 182
181/* 183/*
@@ -393,6 +395,7 @@ struct mv643xx_eth_private {
393 struct work_struct tx_timeout_task; 395 struct work_struct tx_timeout_task;
394 396
395 struct napi_struct napi; 397 struct napi_struct napi;
398 u32 int_mask;
396 u8 oom; 399 u8 oom;
397 u8 work_link; 400 u8 work_link;
398 u8 work_tx; 401 u8 work_tx;
@@ -651,23 +654,20 @@ static int rxq_refill(struct rx_queue *rxq, int budget)
651 refilled = 0; 654 refilled = 0;
652 while (refilled < budget && rxq->rx_desc_count < rxq->rx_ring_size) { 655 while (refilled < budget && rxq->rx_desc_count < rxq->rx_ring_size) {
653 struct sk_buff *skb; 656 struct sk_buff *skb;
654 int unaligned;
655 int rx; 657 int rx;
656 struct rx_desc *rx_desc; 658 struct rx_desc *rx_desc;
657 659
658 skb = __skb_dequeue(&mp->rx_recycle); 660 skb = __skb_dequeue(&mp->rx_recycle);
659 if (skb == NULL) 661 if (skb == NULL)
660 skb = dev_alloc_skb(mp->skb_size + 662 skb = dev_alloc_skb(mp->skb_size);
661 dma_get_cache_alignment() - 1);
662 663
663 if (skb == NULL) { 664 if (skb == NULL) {
664 mp->oom = 1; 665 mp->oom = 1;
665 goto oom; 666 goto oom;
666 } 667 }
667 668
668 unaligned = (u32)skb->data & (dma_get_cache_alignment() - 1); 669 if (SKB_DMA_REALIGN)
669 if (unaligned) 670 skb_reserve(skb, SKB_DMA_REALIGN);
670 skb_reserve(skb, dma_get_cache_alignment() - unaligned);
671 671
672 refilled++; 672 refilled++;
673 rxq->rx_desc_count++; 673 rxq->rx_desc_count++;
@@ -969,8 +969,7 @@ static int txq_reclaim(struct tx_queue *txq, int budget, int force)
969 if (skb != NULL) { 969 if (skb != NULL) {
970 if (skb_queue_len(&mp->rx_recycle) < 970 if (skb_queue_len(&mp->rx_recycle) <
971 mp->rx_ring_size && 971 mp->rx_ring_size &&
972 skb_recycle_check(skb, mp->skb_size + 972 skb_recycle_check(skb, mp->skb_size))
973 dma_get_cache_alignment() - 1))
974 __skb_queue_head(&mp->rx_recycle, skb); 973 __skb_queue_head(&mp->rx_recycle, skb);
975 else 974 else
976 dev_kfree_skb(skb); 975 dev_kfree_skb(skb);
@@ -1723,20 +1722,20 @@ static void uc_addr_set(struct mv643xx_eth_private *mp, unsigned char *addr)
1723 1722
1724static u32 uc_addr_filter_mask(struct net_device *dev) 1723static u32 uc_addr_filter_mask(struct net_device *dev)
1725{ 1724{
1726 struct dev_addr_list *uc_ptr; 1725 struct netdev_hw_addr *ha;
1727 u32 nibbles; 1726 u32 nibbles;
1728 1727
1729 if (dev->flags & IFF_PROMISC) 1728 if (dev->flags & IFF_PROMISC)
1730 return 0; 1729 return 0;
1731 1730
1732 nibbles = 1 << (dev->dev_addr[5] & 0x0f); 1731 nibbles = 1 << (dev->dev_addr[5] & 0x0f);
1733 for (uc_ptr = dev->uc_list; uc_ptr != NULL; uc_ptr = uc_ptr->next) { 1732 list_for_each_entry(ha, &dev->uc_list, list) {
1734 if (memcmp(dev->dev_addr, uc_ptr->da_addr, 5)) 1733 if (memcmp(dev->dev_addr, ha->addr, 5))
1735 return 0; 1734 return 0;
1736 if ((dev->dev_addr[5] ^ uc_ptr->da_addr[5]) & 0xf0) 1735 if ((dev->dev_addr[5] ^ ha->addr[5]) & 0xf0)
1737 return 0; 1736 return 0;
1738 1737
1739 nibbles |= 1 << (uc_ptr->da_addr[5] & 0x0f); 1738 nibbles |= 1 << (ha->addr[5] & 0x0f);
1740 } 1739 }
1741 1740
1742 return nibbles; 1741 return nibbles;
@@ -1810,7 +1809,6 @@ static void mv643xx_eth_program_multicast_filter(struct net_device *dev)
1810 if (dev->flags & (IFF_PROMISC | IFF_ALLMULTI)) { 1809 if (dev->flags & (IFF_PROMISC | IFF_ALLMULTI)) {
1811 int port_num; 1810 int port_num;
1812 u32 accept; 1811 u32 accept;
1813 int i;
1814 1812
1815oom: 1813oom:
1816 port_num = mp->port_num; 1814 port_num = mp->port_num;
@@ -2067,15 +2065,16 @@ static int mv643xx_eth_collect_events(struct mv643xx_eth_private *mp)
2067 u32 int_cause; 2065 u32 int_cause;
2068 u32 int_cause_ext; 2066 u32 int_cause_ext;
2069 2067
2070 int_cause = rdlp(mp, INT_CAUSE) & (INT_TX_END | INT_RX | INT_EXT); 2068 int_cause = rdlp(mp, INT_CAUSE) & mp->int_mask;
2071 if (int_cause == 0) 2069 if (int_cause == 0)
2072 return 0; 2070 return 0;
2073 2071
2074 int_cause_ext = 0; 2072 int_cause_ext = 0;
2075 if (int_cause & INT_EXT) 2073 if (int_cause & INT_EXT) {
2074 int_cause &= ~INT_EXT;
2076 int_cause_ext = rdlp(mp, INT_CAUSE_EXT); 2075 int_cause_ext = rdlp(mp, INT_CAUSE_EXT);
2076 }
2077 2077
2078 int_cause &= INT_TX_END | INT_RX;
2079 if (int_cause) { 2078 if (int_cause) {
2080 wrlp(mp, INT_CAUSE, ~int_cause); 2079 wrlp(mp, INT_CAUSE, ~int_cause);
2081 mp->work_tx_end |= ((int_cause & INT_TX_END) >> 19) & 2080 mp->work_tx_end |= ((int_cause & INT_TX_END) >> 19) &
@@ -2182,6 +2181,7 @@ static int mv643xx_eth_poll(struct napi_struct *napi, int budget)
2182 if (mp->work_link) { 2181 if (mp->work_link) {
2183 mp->work_link = 0; 2182 mp->work_link = 0;
2184 handle_link_event(mp); 2183 handle_link_event(mp);
2184 work_done++;
2185 continue; 2185 continue;
2186 } 2186 }
2187 2187
@@ -2220,7 +2220,7 @@ static int mv643xx_eth_poll(struct napi_struct *napi, int budget)
2220 if (mp->oom) 2220 if (mp->oom)
2221 mod_timer(&mp->rx_oom, jiffies + (HZ / 10)); 2221 mod_timer(&mp->rx_oom, jiffies + (HZ / 10));
2222 napi_complete(napi); 2222 napi_complete(napi);
2223 wrlp(mp, INT_MASK, INT_TX_END | INT_RX | INT_EXT); 2223 wrlp(mp, INT_MASK, mp->int_mask);
2224 } 2224 }
2225 2225
2226 return work_done; 2226 return work_done;
@@ -2341,6 +2341,14 @@ static void mv643xx_eth_recalc_skb_size(struct mv643xx_eth_private *mp)
2341 * size field are ignored by the hardware. 2341 * size field are ignored by the hardware.
2342 */ 2342 */
2343 mp->skb_size = (skb_size + 7) & ~7; 2343 mp->skb_size = (skb_size + 7) & ~7;
2344
2345 /*
2346 * If NET_SKB_PAD is smaller than a cache line,
2347 * netdev_alloc_skb() will cause skb->data to be misaligned
2348 * to a cache line boundary. If this is the case, include
2349 * some extra space to allow re-aligning the data area.
2350 */
2351 mp->skb_size += SKB_DMA_REALIGN;
2344} 2352}
2345 2353
2346static int mv643xx_eth_open(struct net_device *dev) 2354static int mv643xx_eth_open(struct net_device *dev)
@@ -2366,6 +2374,8 @@ static int mv643xx_eth_open(struct net_device *dev)
2366 2374
2367 skb_queue_head_init(&mp->rx_recycle); 2375 skb_queue_head_init(&mp->rx_recycle);
2368 2376
2377 mp->int_mask = INT_EXT;
2378
2369 for (i = 0; i < mp->rxq_count; i++) { 2379 for (i = 0; i < mp->rxq_count; i++) {
2370 err = rxq_init(mp, i); 2380 err = rxq_init(mp, i);
2371 if (err) { 2381 if (err) {
@@ -2375,6 +2385,7 @@ static int mv643xx_eth_open(struct net_device *dev)
2375 } 2385 }
2376 2386
2377 rxq_refill(mp->rxq + i, INT_MAX); 2387 rxq_refill(mp->rxq + i, INT_MAX);
2388 mp->int_mask |= INT_RX_0 << i;
2378 } 2389 }
2379 2390
2380 if (mp->oom) { 2391 if (mp->oom) {
@@ -2389,12 +2400,13 @@ static int mv643xx_eth_open(struct net_device *dev)
2389 txq_deinit(mp->txq + i); 2400 txq_deinit(mp->txq + i);
2390 goto out_free; 2401 goto out_free;
2391 } 2402 }
2403 mp->int_mask |= INT_TX_END_0 << i;
2392 } 2404 }
2393 2405
2394 port_start(mp); 2406 port_start(mp);
2395 2407
2396 wrlp(mp, INT_MASK_EXT, INT_EXT_LINK_PHY | INT_EXT_TX); 2408 wrlp(mp, INT_MASK_EXT, INT_EXT_LINK_PHY | INT_EXT_TX);
2397 wrlp(mp, INT_MASK, INT_TX_END | INT_RX | INT_EXT); 2409 wrlp(mp, INT_MASK, mp->int_mask);
2398 2410
2399 return 0; 2411 return 0;
2400 2412
@@ -2538,7 +2550,7 @@ static void mv643xx_eth_netpoll(struct net_device *dev)
2538 2550
2539 mv643xx_eth_irq(dev->irq, dev); 2551 mv643xx_eth_irq(dev->irq, dev);
2540 2552
2541 wrlp(mp, INT_MASK, INT_TX_END | INT_RX | INT_EXT); 2553 wrlp(mp, INT_MASK, mp->int_mask);
2542} 2554}
2543#endif 2555#endif
2544 2556
diff --git a/drivers/net/mvme147.c b/drivers/net/mvme147.c
index 435e5a847c43..93c709d63e2f 100644
--- a/drivers/net/mvme147.c
+++ b/drivers/net/mvme147.c
@@ -57,6 +57,17 @@ typedef void (*writerap_t)(void *, unsigned short);
57typedef void (*writerdp_t)(void *, unsigned short); 57typedef void (*writerdp_t)(void *, unsigned short);
58typedef unsigned short (*readrdp_t)(void *); 58typedef unsigned short (*readrdp_t)(void *);
59 59
60static const struct net_device_ops lance_netdev_ops = {
61 .ndo_open = m147lance_open,
62 .ndo_stop = m147lance_close,
63 .ndo_start_xmit = lance_start_xmit,
64 .ndo_set_multicast_list = lance_set_multicast,
65 .ndo_tx_timeout = lance_tx_timeout,
66 .ndo_change_mtu = eth_change_mtu,
67 .ndo_validate_addr = eth_validate_addr,
68 .ndo_set_mac_address = eth_mac_addr,
69};
70
60/* Initialise the one and only on-board 7990 */ 71/* Initialise the one and only on-board 7990 */
61struct net_device * __init mvme147lance_probe(int unit) 72struct net_device * __init mvme147lance_probe(int unit)
62{ 73{
@@ -81,11 +92,7 @@ struct net_device * __init mvme147lance_probe(int unit)
81 92
82 /* Fill the dev fields */ 93 /* Fill the dev fields */
83 dev->base_addr = (unsigned long)MVME147_LANCE_BASE; 94 dev->base_addr = (unsigned long)MVME147_LANCE_BASE;
84 dev->open = &m147lance_open; 95 dev->netdev_ops = &lance_netdev_ops;
85 dev->stop = &m147lance_close;
86 dev->hard_start_xmit = &lance_start_xmit;
87 dev->set_multicast_list = &lance_set_multicast;
88 dev->tx_timeout = &lance_tx_timeout;
89 dev->dma = 0; 96 dev->dma = 0;
90 97
91 addr=(u_long *)ETHERNET_ADDRESS; 98 addr=(u_long *)ETHERNET_ADDRESS;
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index f2c4a665e93f..c9a30d3a66fb 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -75,7 +75,7 @@
75#include "myri10ge_mcp.h" 75#include "myri10ge_mcp.h"
76#include "myri10ge_mcp_gen_header.h" 76#include "myri10ge_mcp_gen_header.h"
77 77
78#define MYRI10GE_VERSION_STR "1.4.4-1.401" 78#define MYRI10GE_VERSION_STR "1.5.0-1.418"
79 79
80MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); 80MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
81MODULE_AUTHOR("Maintainer: help@myri.com"); 81MODULE_AUTHOR("Maintainer: help@myri.com");
@@ -255,6 +255,7 @@ struct myri10ge_priv {
255 u32 read_write_dma; 255 u32 read_write_dma;
256 u32 link_changes; 256 u32 link_changes;
257 u32 msg_enable; 257 u32 msg_enable;
258 unsigned int board_number;
258}; 259};
259 260
260static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat"; 261static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat";
@@ -266,6 +267,13 @@ static char *myri10ge_fw_name = NULL;
266module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR); 267module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR);
267MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name"); 268MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name");
268 269
270#define MYRI10GE_MAX_BOARDS 8
271static char *myri10ge_fw_names[MYRI10GE_MAX_BOARDS] =
272 {[0 ... (MYRI10GE_MAX_BOARDS - 1)] = NULL };
273module_param_array_named(myri10ge_fw_names, myri10ge_fw_names, charp, NULL,
274 0444);
275MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image names per board");
276
269static int myri10ge_ecrc_enable = 1; 277static int myri10ge_ecrc_enable = 1;
270module_param(myri10ge_ecrc_enable, int, S_IRUGO); 278module_param(myri10ge_ecrc_enable, int, S_IRUGO);
271MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E"); 279MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E");
@@ -319,10 +327,6 @@ static int myri10ge_debug = -1; /* defaults above */
319module_param(myri10ge_debug, int, 0); 327module_param(myri10ge_debug, int, 0);
320MODULE_PARM_DESC(myri10ge_debug, "Debug level (0=none,...,16=all)"); 328MODULE_PARM_DESC(myri10ge_debug, "Debug level (0=none,...,16=all)");
321 329
322static int myri10ge_lro = 1;
323module_param(myri10ge_lro, int, S_IRUGO);
324MODULE_PARM_DESC(myri10ge_lro, "Enable large receive offload");
325
326static int myri10ge_lro_max_pkts = MYRI10GE_LRO_MAX_PKTS; 330static int myri10ge_lro_max_pkts = MYRI10GE_LRO_MAX_PKTS;
327module_param(myri10ge_lro_max_pkts, int, S_IRUGO); 331module_param(myri10ge_lro_max_pkts, int, S_IRUGO);
328MODULE_PARM_DESC(myri10ge_lro_max_pkts, 332MODULE_PARM_DESC(myri10ge_lro_max_pkts,
@@ -361,6 +365,8 @@ static inline void put_be32(__be32 val, __be32 __iomem * p)
361 __raw_writel((__force __u32) val, (__force void __iomem *)p); 365 __raw_writel((__force __u32) val, (__force void __iomem *)p);
362} 366}
363 367
368static struct net_device_stats *myri10ge_get_stats(struct net_device *dev);
369
364static int 370static int
365myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd, 371myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd,
366 struct myri10ge_cmd *data, int atomic) 372 struct myri10ge_cmd *data, int atomic)
@@ -1290,7 +1296,7 @@ myri10ge_rx_done(struct myri10ge_slice_state *ss, struct myri10ge_rx_buf *rx,
1290 remainder -= MYRI10GE_ALLOC_SIZE; 1296 remainder -= MYRI10GE_ALLOC_SIZE;
1291 } 1297 }
1292 1298
1293 if (mgp->csum_flag && myri10ge_lro) { 1299 if (dev->features & NETIF_F_LRO) {
1294 rx_frags[0].page_offset += MXGEFW_PAD; 1300 rx_frags[0].page_offset += MXGEFW_PAD;
1295 rx_frags[0].size -= MXGEFW_PAD; 1301 rx_frags[0].size -= MXGEFW_PAD;
1296 len -= MXGEFW_PAD; 1302 len -= MXGEFW_PAD;
@@ -1412,6 +1418,7 @@ myri10ge_clean_rx_done(struct myri10ge_slice_state *ss, int budget)
1412{ 1418{
1413 struct myri10ge_rx_done *rx_done = &ss->rx_done; 1419 struct myri10ge_rx_done *rx_done = &ss->rx_done;
1414 struct myri10ge_priv *mgp = ss->mgp; 1420 struct myri10ge_priv *mgp = ss->mgp;
1421 struct net_device *netdev = mgp->dev;
1415 unsigned long rx_bytes = 0; 1422 unsigned long rx_bytes = 0;
1416 unsigned long rx_packets = 0; 1423 unsigned long rx_packets = 0;
1417 unsigned long rx_ok; 1424 unsigned long rx_ok;
@@ -1445,7 +1452,7 @@ myri10ge_clean_rx_done(struct myri10ge_slice_state *ss, int budget)
1445 ss->stats.rx_packets += rx_packets; 1452 ss->stats.rx_packets += rx_packets;
1446 ss->stats.rx_bytes += rx_bytes; 1453 ss->stats.rx_bytes += rx_bytes;
1447 1454
1448 if (myri10ge_lro) 1455 if (netdev->features & NETIF_F_LRO)
1449 lro_flush_all(&rx_done->lro_mgr); 1456 lro_flush_all(&rx_done->lro_mgr);
1450 1457
1451 /* restock receive rings if needed */ 1458 /* restock receive rings if needed */
@@ -1686,7 +1693,7 @@ myri10ge_get_ringparam(struct net_device *netdev,
1686 ring->rx_mini_max_pending = mgp->ss[0].rx_small.mask + 1; 1693 ring->rx_mini_max_pending = mgp->ss[0].rx_small.mask + 1;
1687 ring->rx_max_pending = mgp->ss[0].rx_big.mask + 1; 1694 ring->rx_max_pending = mgp->ss[0].rx_big.mask + 1;
1688 ring->rx_jumbo_max_pending = 0; 1695 ring->rx_jumbo_max_pending = 0;
1689 ring->tx_max_pending = mgp->ss[0].rx_small.mask + 1; 1696 ring->tx_max_pending = mgp->ss[0].tx.mask + 1;
1690 ring->rx_mini_pending = ring->rx_mini_max_pending; 1697 ring->rx_mini_pending = ring->rx_mini_max_pending;
1691 ring->rx_pending = ring->rx_max_pending; 1698 ring->rx_pending = ring->rx_max_pending;
1692 ring->rx_jumbo_pending = ring->rx_jumbo_max_pending; 1699 ring->rx_jumbo_pending = ring->rx_jumbo_max_pending;
@@ -1706,12 +1713,17 @@ static u32 myri10ge_get_rx_csum(struct net_device *netdev)
1706static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled) 1713static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled)
1707{ 1714{
1708 struct myri10ge_priv *mgp = netdev_priv(netdev); 1715 struct myri10ge_priv *mgp = netdev_priv(netdev);
1716 int err = 0;
1709 1717
1710 if (csum_enabled) 1718 if (csum_enabled)
1711 mgp->csum_flag = MXGEFW_FLAGS_CKSUM; 1719 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
1712 else 1720 else {
1721 u32 flags = ethtool_op_get_flags(netdev);
1722 err = ethtool_op_set_flags(netdev, (flags & ~ETH_FLAG_LRO));
1713 mgp->csum_flag = 0; 1723 mgp->csum_flag = 0;
1714 return 0; 1724
1725 }
1726 return err;
1715} 1727}
1716 1728
1717static int myri10ge_set_tso(struct net_device *netdev, u32 tso_enabled) 1729static int myri10ge_set_tso(struct net_device *netdev, u32 tso_enabled)
@@ -1803,6 +1815,8 @@ myri10ge_get_ethtool_stats(struct net_device *netdev,
1803 int slice; 1815 int slice;
1804 int i; 1816 int i;
1805 1817
1818 /* force stats update */
1819 (void)myri10ge_get_stats(netdev);
1806 for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++) 1820 for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++)
1807 data[i] = ((unsigned long *)&mgp->stats)[i]; 1821 data[i] = ((unsigned long *)&mgp->stats)[i];
1808 1822
@@ -1892,7 +1906,9 @@ static const struct ethtool_ops myri10ge_ethtool_ops = {
1892 .get_sset_count = myri10ge_get_sset_count, 1906 .get_sset_count = myri10ge_get_sset_count,
1893 .get_ethtool_stats = myri10ge_get_ethtool_stats, 1907 .get_ethtool_stats = myri10ge_get_ethtool_stats,
1894 .set_msglevel = myri10ge_set_msglevel, 1908 .set_msglevel = myri10ge_set_msglevel,
1895 .get_msglevel = myri10ge_get_msglevel 1909 .get_msglevel = myri10ge_get_msglevel,
1910 .get_flags = ethtool_op_get_flags,
1911 .set_flags = ethtool_op_set_flags
1896}; 1912};
1897 1913
1898static int myri10ge_allocate_rings(struct myri10ge_slice_state *ss) 1914static int myri10ge_allocate_rings(struct myri10ge_slice_state *ss)
@@ -2876,7 +2892,6 @@ again:
2876 tx->stop_queue++; 2892 tx->stop_queue++;
2877 netif_tx_stop_queue(netdev_queue); 2893 netif_tx_stop_queue(netdev_queue);
2878 } 2894 }
2879 dev->trans_start = jiffies;
2880 return 0; 2895 return 0;
2881 2896
2882abort_linearize: 2897abort_linearize:
@@ -2969,6 +2984,7 @@ static struct net_device_stats *myri10ge_get_stats(struct net_device *dev)
2969 struct net_device_stats *stats = &mgp->stats; 2984 struct net_device_stats *stats = &mgp->stats;
2970 int i; 2985 int i;
2971 2986
2987 spin_lock(&mgp->stats_lock);
2972 memset(stats, 0, sizeof(*stats)); 2988 memset(stats, 0, sizeof(*stats));
2973 for (i = 0; i < mgp->num_slices; i++) { 2989 for (i = 0; i < mgp->num_slices; i++) {
2974 slice_stats = &mgp->ss[i].stats; 2990 slice_stats = &mgp->ss[i].stats;
@@ -2979,6 +2995,7 @@ static struct net_device_stats *myri10ge_get_stats(struct net_device *dev)
2979 stats->rx_dropped += slice_stats->rx_dropped; 2995 stats->rx_dropped += slice_stats->rx_dropped;
2980 stats->tx_dropped += slice_stats->tx_dropped; 2996 stats->tx_dropped += slice_stats->tx_dropped;
2981 } 2997 }
2998 spin_unlock(&mgp->stats_lock);
2982 return stats; 2999 return stats;
2983} 3000}
2984 3001
@@ -3253,6 +3270,8 @@ abort:
3253 3270
3254static void myri10ge_select_firmware(struct myri10ge_priv *mgp) 3271static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
3255{ 3272{
3273 int overridden = 0;
3274
3256 if (myri10ge_force_firmware == 0) { 3275 if (myri10ge_force_firmware == 0) {
3257 int link_width, exp_cap; 3276 int link_width, exp_cap;
3258 u16 lnk; 3277 u16 lnk;
@@ -3286,10 +3305,18 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
3286 } 3305 }
3287 } 3306 }
3288 if (myri10ge_fw_name != NULL) { 3307 if (myri10ge_fw_name != NULL) {
3289 dev_info(&mgp->pdev->dev, "overriding firmware to %s\n", 3308 overridden = 1;
3290 myri10ge_fw_name);
3291 mgp->fw_name = myri10ge_fw_name; 3309 mgp->fw_name = myri10ge_fw_name;
3292 } 3310 }
3311 if (mgp->board_number < MYRI10GE_MAX_BOARDS &&
3312 myri10ge_fw_names[mgp->board_number] != NULL &&
3313 strlen(myri10ge_fw_names[mgp->board_number])) {
3314 mgp->fw_name = myri10ge_fw_names[mgp->board_number];
3315 overridden = 1;
3316 }
3317 if (overridden)
3318 dev_info(&mgp->pdev->dev, "overriding firmware to %s\n",
3319 mgp->fw_name);
3293} 3320}
3294 3321
3295#ifdef CONFIG_PM 3322#ifdef CONFIG_PM
@@ -3754,6 +3781,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3754 int status = -ENXIO; 3781 int status = -ENXIO;
3755 int dac_enabled; 3782 int dac_enabled;
3756 unsigned hdr_offset, ss_offset; 3783 unsigned hdr_offset, ss_offset;
3784 static int board_number;
3757 3785
3758 netdev = alloc_etherdev_mq(sizeof(*mgp), MYRI10GE_MAX_SLICES); 3786 netdev = alloc_etherdev_mq(sizeof(*mgp), MYRI10GE_MAX_SLICES);
3759 if (netdev == NULL) { 3787 if (netdev == NULL) {
@@ -3770,6 +3798,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3770 mgp->pause = myri10ge_flow_control; 3798 mgp->pause = myri10ge_flow_control;
3771 mgp->intr_coal_delay = myri10ge_intr_coal_delay; 3799 mgp->intr_coal_delay = myri10ge_intr_coal_delay;
3772 mgp->msg_enable = netif_msg_init(myri10ge_debug, MYRI10GE_MSG_DEFAULT); 3800 mgp->msg_enable = netif_msg_init(myri10ge_debug, MYRI10GE_MSG_DEFAULT);
3801 mgp->board_number = board_number;
3773 init_waitqueue_head(&mgp->down_wq); 3802 init_waitqueue_head(&mgp->down_wq);
3774 3803
3775 if (pci_enable_device(pdev)) { 3804 if (pci_enable_device(pdev)) {
@@ -3884,6 +3913,13 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3884 3913
3885 if (dac_enabled) 3914 if (dac_enabled)
3886 netdev->features |= NETIF_F_HIGHDMA; 3915 netdev->features |= NETIF_F_HIGHDMA;
3916 netdev->features |= NETIF_F_LRO;
3917
3918 netdev->vlan_features |= mgp->features;
3919 if (mgp->fw_ver_tiny < 37)
3920 netdev->vlan_features &= ~NETIF_F_TSO6;
3921 if (mgp->fw_ver_tiny < 32)
3922 netdev->vlan_features &= ~NETIF_F_TSO;
3887 3923
3888 /* make sure we can get an irq, and that MSI can be 3924 /* make sure we can get an irq, and that MSI can be
3889 * setup (if available). Also ensure netdev->irq 3925 * setup (if available). Also ensure netdev->irq
@@ -3902,6 +3938,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3902 setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer, 3938 setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer,
3903 (unsigned long)mgp); 3939 (unsigned long)mgp);
3904 3940
3941 spin_lock_init(&mgp->stats_lock);
3905 SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops); 3942 SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops);
3906 INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog); 3943 INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog);
3907 status = register_netdev(netdev); 3944 status = register_netdev(netdev);
@@ -3919,6 +3956,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3919 netdev->irq, mgp->tx_boundary, mgp->fw_name, 3956 netdev->irq, mgp->tx_boundary, mgp->fw_name,
3920 (mgp->wc_enabled ? "Enabled" : "Disabled")); 3957 (mgp->wc_enabled ? "Enabled" : "Disabled"));
3921 3958
3959 board_number++;
3922 return 0; 3960 return 0;
3923 3961
3924abort_with_state: 3962abort_with_state:
@@ -4008,6 +4046,8 @@ static struct pci_device_id myri10ge_pci_tbl[] = {
4008 {0}, 4046 {0},
4009}; 4047};
4010 4048
4049MODULE_DEVICE_TABLE(pci, myri10ge_pci_tbl);
4050
4011static struct pci_driver myri10ge_driver = { 4051static struct pci_driver myri10ge_driver = {
4012 .name = "myri10ge", 4052 .name = "myri10ge",
4013 .probe = myri10ge_probe, 4053 .probe = myri10ge_probe,
diff --git a/drivers/net/ne2k-pci.c b/drivers/net/ne2k-pci.c
index 7d83896b8c26..3fcebb70151c 100644
--- a/drivers/net/ne2k-pci.c
+++ b/drivers/net/ne2k-pci.c
@@ -374,7 +374,7 @@ static int __devinit ne2k_pci_init_one (struct pci_dev *pdev,
374 dev->ethtool_ops = &ne2k_pci_ethtool_ops; 374 dev->ethtool_ops = &ne2k_pci_ethtool_ops;
375 NS8390_init(dev, 0); 375 NS8390_init(dev, 0);
376 376
377 memcpy(dev->dev_addr, SA_prom, 6); 377 memcpy(dev->dev_addr, SA_prom, dev->addr_len);
378 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); 378 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
379 379
380 i = register_netdev(dev); 380 i = register_netdev(dev);
diff --git a/drivers/net/ne3210.c b/drivers/net/ne3210.c
index 6a843f7350ab..a00bbfb9aed0 100644
--- a/drivers/net/ne3210.c
+++ b/drivers/net/ne3210.c
@@ -104,7 +104,7 @@ static int __init ne3210_eisa_probe (struct device *device)
104 } 104 }
105 105
106 SET_NETDEV_DEV(dev, device); 106 SET_NETDEV_DEV(dev, device);
107 device->driver_data = dev; 107 dev_set_drvdata(device, dev);
108 ioaddr = edev->base_addr; 108 ioaddr = edev->base_addr;
109 109
110 if (!request_region(ioaddr, NE3210_IO_EXTENT, DRV_NAME)) { 110 if (!request_region(ioaddr, NE3210_IO_EXTENT, DRV_NAME)) {
@@ -225,7 +225,7 @@ static int __init ne3210_eisa_probe (struct device *device)
225 225
226static int __devexit ne3210_eisa_remove (struct device *device) 226static int __devexit ne3210_eisa_remove (struct device *device)
227{ 227{
228 struct net_device *dev = device->driver_data; 228 struct net_device *dev = dev_get_drvdata(device);
229 unsigned long ioaddr = to_eisa_device (device)->base_addr; 229 unsigned long ioaddr = to_eisa_device (device)->base_addr;
230 230
231 unregister_netdev (dev); 231 unregister_netdev (dev);
diff --git a/drivers/net/netx-eth.c b/drivers/net/netx-eth.c
index 1861d5bbd96b..946366dcc992 100644
--- a/drivers/net/netx-eth.c
+++ b/drivers/net/netx-eth.c
@@ -301,6 +301,17 @@ netx_eth_phy_write(struct net_device *ndev, int phy_id, int reg, int value)
301 while (readl(NETX_MIIMU) & MIIMU_SNRDY); 301 while (readl(NETX_MIIMU) & MIIMU_SNRDY);
302} 302}
303 303
304static const struct net_device_ops netx_eth_netdev_ops = {
305 .ndo_open = netx_eth_open,
306 .ndo_stop = netx_eth_close,
307 .ndo_start_xmit = netx_eth_hard_start_xmit,
308 .ndo_tx_timeout = netx_eth_timeout,
309 .ndo_set_multicast_list = netx_eth_set_multicast_list,
310 .ndo_change_mtu = eth_change_mtu,
311 .ndo_validate_addr = eth_validate_addr,
312 .ndo_set_mac_address = eth_mac_addr,
313};
314
304static int netx_eth_enable(struct net_device *ndev) 315static int netx_eth_enable(struct net_device *ndev)
305{ 316{
306 struct netx_eth_priv *priv = netdev_priv(ndev); 317 struct netx_eth_priv *priv = netdev_priv(ndev);
@@ -309,12 +320,8 @@ static int netx_eth_enable(struct net_device *ndev)
309 320
310 ether_setup(ndev); 321 ether_setup(ndev);
311 322
312 ndev->open = netx_eth_open; 323 ndev->netdev_ops = &netx_eth_netdev_ops;
313 ndev->stop = netx_eth_close;
314 ndev->hard_start_xmit = netx_eth_hard_start_xmit;
315 ndev->tx_timeout = netx_eth_timeout;
316 ndev->watchdog_timeo = msecs_to_jiffies(5000); 324 ndev->watchdog_timeo = msecs_to_jiffies(5000);
317 ndev->set_multicast_list = netx_eth_set_multicast_list;
318 325
319 priv->msg_enable = NETIF_MSG_LINK; 326 priv->msg_enable = NETIF_MSG_LINK;
320 priv->mii.phy_id_mask = 0x1f; 327 priv->mii.phy_id_mask = 0x1f;
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h
index c40815169f35..ab11c2b3f0fe 100644
--- a/drivers/net/netxen/netxen_nic.h
+++ b/drivers/net/netxen/netxen_nic.h
@@ -34,10 +34,6 @@
34#include <linux/module.h> 34#include <linux/module.h>
35#include <linux/kernel.h> 35#include <linux/kernel.h>
36#include <linux/types.h> 36#include <linux/types.h>
37#include <linux/compiler.h>
38#include <linux/slab.h>
39#include <linux/delay.h>
40#include <linux/init.h>
41#include <linux/ioport.h> 37#include <linux/ioport.h>
42#include <linux/pci.h> 38#include <linux/pci.h>
43#include <linux/netdevice.h> 39#include <linux/netdevice.h>
@@ -46,21 +42,16 @@
46#include <linux/in.h> 42#include <linux/in.h>
47#include <linux/tcp.h> 43#include <linux/tcp.h>
48#include <linux/skbuff.h> 44#include <linux/skbuff.h>
45#include <linux/firmware.h>
49 46
50#include <linux/ethtool.h> 47#include <linux/ethtool.h>
51#include <linux/mii.h> 48#include <linux/mii.h>
52#include <linux/interrupt.h>
53#include <linux/timer.h> 49#include <linux/timer.h>
54 50
55#include <linux/mm.h>
56#include <linux/mman.h>
57#include <linux/vmalloc.h> 51#include <linux/vmalloc.h>
58 52
59#include <asm/system.h>
60#include <asm/io.h> 53#include <asm/io.h>
61#include <asm/byteorder.h> 54#include <asm/byteorder.h>
62#include <asm/uaccess.h>
63#include <asm/pgtable.h>
64 55
65#include "netxen_nic_hw.h" 56#include "netxen_nic_hw.h"
66 57
@@ -84,10 +75,10 @@
84 (sizeof(struct netxen_rx_buffer) * rds_ring->num_desc) 75 (sizeof(struct netxen_rx_buffer) * rds_ring->num_desc)
85#define STATUS_DESC_RINGSIZE(sds_ring) \ 76#define STATUS_DESC_RINGSIZE(sds_ring) \
86 (sizeof(struct status_desc) * (sds_ring)->num_desc) 77 (sizeof(struct status_desc) * (sds_ring)->num_desc)
87#define TX_BUFF_RINGSIZE(adapter) \ 78#define TX_BUFF_RINGSIZE(tx_ring) \
88 (sizeof(struct netxen_cmd_buffer) * adapter->num_txd) 79 (sizeof(struct netxen_cmd_buffer) * tx_ring->num_desc)
89#define TX_DESC_RINGSIZE(adapter) \ 80#define TX_DESC_RINGSIZE(tx_ring) \
90 (sizeof(struct cmd_desc_type0) * adapter->num_txd) 81 (sizeof(struct cmd_desc_type0) * tx_ring->num_desc)
91 82
92#define find_diff_among(a,b,range) ((a)<(b)?((b)-(a)):((b)+(range)-(a))) 83#define find_diff_among(a,b,range) ((a)<(b)?((b)-(a)):((b)+(range)-(a)))
93 84
@@ -118,6 +109,7 @@
118#define NX_P3_A2 0x30 109#define NX_P3_A2 0x30
119#define NX_P3_B0 0x40 110#define NX_P3_B0 0x40
120#define NX_P3_B1 0x41 111#define NX_P3_B1 0x41
112#define NX_P3_B2 0x42
121 113
122#define NX_IS_REVISION_P2(REVISION) (REVISION <= NX_P2_C1) 114#define NX_IS_REVISION_P2(REVISION) (REVISION <= NX_P2_C1)
123#define NX_IS_REVISION_P3(REVISION) (REVISION >= NX_P3_A0) 115#define NX_IS_REVISION_P3(REVISION) (REVISION >= NX_P3_A0)
@@ -203,18 +195,10 @@
203#define MAX_RCV_DESCRIPTORS_10G 4096 195#define MAX_RCV_DESCRIPTORS_10G 4096
204#define MAX_JUMBO_RCV_DESCRIPTORS 1024 196#define MAX_JUMBO_RCV_DESCRIPTORS 1024
205#define MAX_LRO_RCV_DESCRIPTORS 8 197#define MAX_LRO_RCV_DESCRIPTORS 8
206#define MAX_RCVSTATUS_DESCRIPTORS MAX_RCV_DESCRIPTORS
207#define MAX_JUMBO_RCV_DESC MAX_JUMBO_RCV_DESCRIPTORS
208#define MAX_RCV_DESC MAX_RCV_DESCRIPTORS
209#define MAX_RCVSTATUS_DESC MAX_RCV_DESCRIPTORS
210#define MAX_EPG_DESCRIPTORS (MAX_CMD_DESCRIPTORS * 8)
211#define NUM_RCV_DESC (MAX_RCV_DESC + MAX_JUMBO_RCV_DESCRIPTORS + \
212 MAX_LRO_RCV_DESCRIPTORS)
213#define MIN_TX_COUNT 4096
214#define MIN_RX_COUNT 4096
215#define NETXEN_CTX_SIGNATURE 0xdee0 198#define NETXEN_CTX_SIGNATURE 0xdee0
199#define NETXEN_CTX_SIGNATURE_V2 0x0002dee0
200#define NETXEN_CTX_RESET 0xbad0
216#define NETXEN_RCV_PRODUCER(ringid) (ringid) 201#define NETXEN_RCV_PRODUCER(ringid) (ringid)
217#define MAX_FRAME_SIZE 0x10000 /* 64K MAX size for LSO */
218 202
219#define PHAN_PEG_RCV_INITIALIZED 0xff01 203#define PHAN_PEG_RCV_INITIALIZED 0xff01
220#define PHAN_PEG_RCV_START_INITIALIZE 0xff00 204#define PHAN_PEG_RCV_START_INITIALIZE 0xff00
@@ -253,12 +237,19 @@ typedef u32 netxen_ctx_msg;
253#define netxen_set_msg_opcode(config_word, val) \ 237#define netxen_set_msg_opcode(config_word, val) \
254 ((config_word) &= ~(0xf<<28), (config_word) |= (val & 0xf) << 28) 238 ((config_word) &= ~(0xf<<28), (config_word) |= (val & 0xf) << 28)
255 239
256struct netxen_rcv_context { 240struct netxen_rcv_ring {
257 __le64 rcv_ring_addr; 241 __le64 addr;
258 __le32 rcv_ring_size; 242 __le32 size;
259 __le32 rsrvd; 243 __le32 rsrvd;
260}; 244};
261 245
246struct netxen_sts_ring {
247 __le64 addr;
248 __le32 size;
249 __le16 msi_index;
250 __le16 rsvd;
251} ;
252
262struct netxen_ring_ctx { 253struct netxen_ring_ctx {
263 254
264 /* one command ring */ 255 /* one command ring */
@@ -268,13 +259,18 @@ struct netxen_ring_ctx {
268 __le32 rsrvd; 259 __le32 rsrvd;
269 260
270 /* three receive rings */ 261 /* three receive rings */
271 struct netxen_rcv_context rcv_ctx[3]; 262 struct netxen_rcv_ring rcv_rings[NUM_RCV_DESC_RINGS];
272 263
273 /* one status ring */
274 __le64 sts_ring_addr; 264 __le64 sts_ring_addr;
275 __le32 sts_ring_size; 265 __le32 sts_ring_size;
276 266
277 __le32 ctx_id; 267 __le32 ctx_id;
268
269 __le64 rsrvd_2[3];
270 __le32 sts_ring_count;
271 __le32 rsrvd_3;
272 struct netxen_sts_ring sts_rings[NUM_STS_DESC_RINGS];
273
278} __attribute__ ((aligned(64))); 274} __attribute__ ((aligned(64)));
279 275
280/* 276/*
@@ -373,6 +369,7 @@ struct rcv_desc {
373/* opcode field in status_desc */ 369/* opcode field in status_desc */
374#define NETXEN_NIC_RXPKT_DESC 0x04 370#define NETXEN_NIC_RXPKT_DESC 0x04
375#define NETXEN_OLD_RXPKT_DESC 0x3f 371#define NETXEN_OLD_RXPKT_DESC 0x3f
372#define NETXEN_NIC_RESPONSE_DESC 0x05
376 373
377/* for status field in status_desc */ 374/* for status field in status_desc */
378#define STATUS_NEED_CKSUM (1) 375#define STATUS_NEED_CKSUM (1)
@@ -382,13 +379,11 @@ struct rcv_desc {
382#define STATUS_OWNER_HOST (0x1ULL << 56) 379#define STATUS_OWNER_HOST (0x1ULL << 56)
383#define STATUS_OWNER_PHANTOM (0x2ULL << 56) 380#define STATUS_OWNER_PHANTOM (0x2ULL << 56)
384 381
385/* Note: sizeof(status_desc) should always be a mutliple of 2 */ 382/* Status descriptor:
386 383 0-3 port, 4-7 status, 8-11 type, 12-27 total_length
387#define netxen_get_sts_desc_lro_cnt(status_desc) \ 384 28-43 reference_handle, 44-47 protocol, 48-52 pkt_offset
388 ((status_desc)->lro & 0x7F) 385 53-55 desc_cnt, 56-57 owner, 58-63 opcode
389#define netxen_get_sts_desc_lro_last_frag(status_desc) \ 386 */
390 (((status_desc)->lro & 0x80) >> 7)
391
392#define netxen_get_sts_port(sts_data) \ 387#define netxen_get_sts_port(sts_data) \
393 ((sts_data) & 0x0F) 388 ((sts_data) & 0x0F)
394#define netxen_get_sts_status(sts_data) \ 389#define netxen_get_sts_status(sts_data) \
@@ -403,41 +398,15 @@ struct rcv_desc {
403 (((sts_data) >> 44) & 0x0F) 398 (((sts_data) >> 44) & 0x0F)
404#define netxen_get_sts_pkt_offset(sts_data) \ 399#define netxen_get_sts_pkt_offset(sts_data) \
405 (((sts_data) >> 48) & 0x1F) 400 (((sts_data) >> 48) & 0x1F)
401#define netxen_get_sts_desc_cnt(sts_data) \
402 (((sts_data) >> 53) & 0x7)
406#define netxen_get_sts_opcode(sts_data) \ 403#define netxen_get_sts_opcode(sts_data) \
407 (((sts_data) >> 58) & 0x03F) 404 (((sts_data) >> 58) & 0x03F)
408 405
409struct status_desc { 406struct status_desc {
410 /* Bit pattern: 0-3 port, 4-7 status, 8-11 type, 12-27 total_length 407 __le64 status_desc_data[2];
411 28-43 reference_handle, 44-47 protocol, 48-52 pkt_offset
412 53-55 desc_cnt, 56-57 owner, 58-63 opcode
413 */
414 __le64 status_desc_data;
415 union {
416 struct {
417 __le32 hash_value;
418 u8 hash_type;
419 u8 msg_type;
420 u8 unused;
421 union {
422 /* Bit pattern: 0-6 lro_count indicates frag
423 * sequence, 7 last_frag indicates last frag
424 */
425 u8 lro;
426
427 /* chained buffers */
428 u8 nr_frags;
429 };
430 };
431 struct {
432 __le16 frag_handles[4];
433 };
434 };
435} __attribute__ ((aligned(16))); 408} __attribute__ ((aligned(16)));
436 409
437enum {
438 NETXEN_RCV_PEG_0 = 0,
439 NETXEN_RCV_PEG_1
440};
441/* The version of the main data structure */ 410/* The version of the main data structure */
442#define NETXEN_BDINFO_VERSION 1 411#define NETXEN_BDINFO_VERSION 1
443 412
@@ -447,85 +416,35 @@ enum {
447/* Max number of Gig ports on a Phantom board */ 416/* Max number of Gig ports on a Phantom board */
448#define NETXEN_MAX_PORTS 4 417#define NETXEN_MAX_PORTS 4
449 418
450typedef enum { 419#define NETXEN_BRDTYPE_P1_BD 0x0000
451 NETXEN_BRDTYPE_P1_BD = 0x0000, 420#define NETXEN_BRDTYPE_P1_SB 0x0001
452 NETXEN_BRDTYPE_P1_SB = 0x0001, 421#define NETXEN_BRDTYPE_P1_SMAX 0x0002
453 NETXEN_BRDTYPE_P1_SMAX = 0x0002, 422#define NETXEN_BRDTYPE_P1_SOCK 0x0003
454 NETXEN_BRDTYPE_P1_SOCK = 0x0003, 423
455 424#define NETXEN_BRDTYPE_P2_SOCK_31 0x0008
456 NETXEN_BRDTYPE_P2_SOCK_31 = 0x0008, 425#define NETXEN_BRDTYPE_P2_SOCK_35 0x0009
457 NETXEN_BRDTYPE_P2_SOCK_35 = 0x0009, 426#define NETXEN_BRDTYPE_P2_SB35_4G 0x000a
458 NETXEN_BRDTYPE_P2_SB35_4G = 0x000a, 427#define NETXEN_BRDTYPE_P2_SB31_10G 0x000b
459 NETXEN_BRDTYPE_P2_SB31_10G = 0x000b, 428#define NETXEN_BRDTYPE_P2_SB31_2G 0x000c
460 NETXEN_BRDTYPE_P2_SB31_2G = 0x000c, 429
461 430#define NETXEN_BRDTYPE_P2_SB31_10G_IMEZ 0x000d
462 NETXEN_BRDTYPE_P2_SB31_10G_IMEZ = 0x000d, 431#define NETXEN_BRDTYPE_P2_SB31_10G_HMEZ 0x000e
463 NETXEN_BRDTYPE_P2_SB31_10G_HMEZ = 0x000e, 432#define NETXEN_BRDTYPE_P2_SB31_10G_CX4 0x000f
464 NETXEN_BRDTYPE_P2_SB31_10G_CX4 = 0x000f, 433
465 434#define NETXEN_BRDTYPE_P3_REF_QG 0x0021
466 NETXEN_BRDTYPE_P3_REF_QG = 0x0021, 435#define NETXEN_BRDTYPE_P3_HMEZ 0x0022
467 NETXEN_BRDTYPE_P3_HMEZ = 0x0022, 436#define NETXEN_BRDTYPE_P3_10G_CX4_LP 0x0023
468 NETXEN_BRDTYPE_P3_10G_CX4_LP = 0x0023, 437#define NETXEN_BRDTYPE_P3_4_GB 0x0024
469 NETXEN_BRDTYPE_P3_4_GB = 0x0024, 438#define NETXEN_BRDTYPE_P3_IMEZ 0x0025
470 NETXEN_BRDTYPE_P3_IMEZ = 0x0025, 439#define NETXEN_BRDTYPE_P3_10G_SFP_PLUS 0x0026
471 NETXEN_BRDTYPE_P3_10G_SFP_PLUS = 0x0026, 440#define NETXEN_BRDTYPE_P3_10000_BASE_T 0x0027
472 NETXEN_BRDTYPE_P3_10000_BASE_T = 0x0027, 441#define NETXEN_BRDTYPE_P3_XG_LOM 0x0028
473 NETXEN_BRDTYPE_P3_XG_LOM = 0x0028, 442#define NETXEN_BRDTYPE_P3_4_GB_MM 0x0029
474 NETXEN_BRDTYPE_P3_4_GB_MM = 0x0029, 443#define NETXEN_BRDTYPE_P3_10G_SFP_CT 0x002a
475 NETXEN_BRDTYPE_P3_10G_SFP_CT = 0x002a, 444#define NETXEN_BRDTYPE_P3_10G_SFP_QT 0x002b
476 NETXEN_BRDTYPE_P3_10G_SFP_QT = 0x002b, 445#define NETXEN_BRDTYPE_P3_10G_CX4 0x0031
477 NETXEN_BRDTYPE_P3_10G_CX4 = 0x0031, 446#define NETXEN_BRDTYPE_P3_10G_XFP 0x0032
478 NETXEN_BRDTYPE_P3_10G_XFP = 0x0032, 447#define NETXEN_BRDTYPE_P3_10G_TP 0x0080
479 NETXEN_BRDTYPE_P3_10G_TP = 0x0080
480
481} netxen_brdtype_t;
482
483typedef enum {
484 NETXEN_BRDMFG_INVENTEC = 1
485} netxen_brdmfg;
486
487typedef enum {
488 MEM_ORG_128Mbx4 = 0x0, /* DDR1 only */
489 MEM_ORG_128Mbx8 = 0x1, /* DDR1 only */
490 MEM_ORG_128Mbx16 = 0x2, /* DDR1 only */
491 MEM_ORG_256Mbx4 = 0x3,
492 MEM_ORG_256Mbx8 = 0x4,
493 MEM_ORG_256Mbx16 = 0x5,
494 MEM_ORG_512Mbx4 = 0x6,
495 MEM_ORG_512Mbx8 = 0x7,
496 MEM_ORG_512Mbx16 = 0x8,
497 MEM_ORG_1Gbx4 = 0x9,
498 MEM_ORG_1Gbx8 = 0xa,
499 MEM_ORG_1Gbx16 = 0xb,
500 MEM_ORG_2Gbx4 = 0xc,
501 MEM_ORG_2Gbx8 = 0xd,
502 MEM_ORG_2Gbx16 = 0xe,
503 MEM_ORG_128Mbx32 = 0x10002, /* GDDR only */
504 MEM_ORG_256Mbx32 = 0x10005 /* GDDR only */
505} netxen_mn_mem_org_t;
506
507typedef enum {
508 MEM_ORG_512Kx36 = 0x0,
509 MEM_ORG_1Mx36 = 0x1,
510 MEM_ORG_2Mx36 = 0x2
511} netxen_sn_mem_org_t;
512
513typedef enum {
514 MEM_DEPTH_4MB = 0x1,
515 MEM_DEPTH_8MB = 0x2,
516 MEM_DEPTH_16MB = 0x3,
517 MEM_DEPTH_32MB = 0x4,
518 MEM_DEPTH_64MB = 0x5,
519 MEM_DEPTH_128MB = 0x6,
520 MEM_DEPTH_256MB = 0x7,
521 MEM_DEPTH_512MB = 0x8,
522 MEM_DEPTH_1GB = 0x9,
523 MEM_DEPTH_2GB = 0xa,
524 MEM_DEPTH_4GB = 0xb,
525 MEM_DEPTH_8GB = 0xc,
526 MEM_DEPTH_16GB = 0xd,
527 MEM_DEPTH_32GB = 0xe
528} netxen_mem_depth_t;
529 448
530struct netxen_board_info { 449struct netxen_board_info {
531 u32 header_version; 450 u32 header_version;
@@ -676,17 +595,15 @@ struct netxen_new_user_info {
676#define PRIMARY_IMAGE_BAD 0xffffffff 595#define PRIMARY_IMAGE_BAD 0xffffffff
677 596
678/* Flash memory map */ 597/* Flash memory map */
679typedef enum { 598#define NETXEN_CRBINIT_START 0 /* crbinit section */
680 NETXEN_CRBINIT_START = 0, /* Crbinit section */ 599#define NETXEN_BRDCFG_START 0x4000 /* board config */
681 NETXEN_BRDCFG_START = 0x4000, /* board config */ 600#define NETXEN_INITCODE_START 0x6000 /* pegtune code */
682 NETXEN_INITCODE_START = 0x6000, /* pegtune code */ 601#define NETXEN_BOOTLD_START 0x10000 /* bootld */
683 NETXEN_BOOTLD_START = 0x10000, /* bootld */ 602#define NETXEN_IMAGE_START 0x43000 /* compressed image */
684 NETXEN_IMAGE_START = 0x43000, /* compressed image */ 603#define NETXEN_SECONDARY_START 0x200000 /* backup images */
685 NETXEN_SECONDARY_START = 0x200000, /* backup images */ 604#define NETXEN_PXE_START 0x3E0000 /* PXE boot rom */
686 NETXEN_PXE_START = 0x3E0000, /* user defined region */ 605#define NETXEN_USER_START 0x3E8000 /* Firmare info */
687 NETXEN_USER_START = 0x3E8000, /* User defined region for new boards */ 606#define NETXEN_FIXED_START 0x3F0000 /* backup of crbinit */
688 NETXEN_FIXED_START = 0x3F0000 /* backup of crbinit */
689} netxen_flash_map_t;
690 607
691#define NX_FW_VERSION_OFFSET (NETXEN_USER_START+0x408) 608#define NX_FW_VERSION_OFFSET (NETXEN_USER_START+0x408)
692#define NX_FW_SIZE_OFFSET (NETXEN_USER_START+0x40c) 609#define NX_FW_SIZE_OFFSET (NETXEN_USER_START+0x40c)
@@ -708,21 +625,8 @@ typedef enum {
708#define NETXEN_FLASH_SECONDARY_SIZE (NETXEN_USER_START-NETXEN_SECONDARY_START) 625#define NETXEN_FLASH_SECONDARY_SIZE (NETXEN_USER_START-NETXEN_SECONDARY_START)
709#define NETXEN_NUM_PRIMARY_SECTORS (0x20) 626#define NETXEN_NUM_PRIMARY_SECTORS (0x20)
710#define NETXEN_NUM_CONFIG_SECTORS (1) 627#define NETXEN_NUM_CONFIG_SECTORS (1)
711#define PFX "NetXen: "
712extern char netxen_nic_driver_name[]; 628extern char netxen_nic_driver_name[];
713 629
714/* Note: Make sure to not call this before adapter->port is valid */
715#if !defined(NETXEN_DEBUG)
716#define DPRINTK(klevel, fmt, args...) do { \
717 } while (0)
718#else
719#define DPRINTK(klevel, fmt, args...) do { \
720 printk(KERN_##klevel PFX "%s: %s: " fmt, __func__,\
721 (adapter != NULL && adapter->netdev != NULL) ? \
722 adapter->netdev->name : NULL, \
723 ## args); } while(0)
724#endif
725
726/* Number of status descriptors to handle per interrupt */ 630/* Number of status descriptors to handle per interrupt */
727#define MAX_STATUS_HANDLE (64) 631#define MAX_STATUS_HANDLE (64)
728 632
@@ -732,7 +636,7 @@ extern char netxen_nic_driver_name[];
732 */ 636 */
733struct netxen_skb_frag { 637struct netxen_skb_frag {
734 u64 dma; 638 u64 dma;
735 ulong length; 639 u64 length;
736}; 640};
737 641
738#define _netxen_set_bits(config_word, start, bits, val) {\ 642#define _netxen_set_bits(config_word, start, bits, val) {\
@@ -793,34 +697,24 @@ struct netxen_hardware_context {
793 697
794 u8 cut_through; 698 u8 cut_through;
795 u8 revision_id; 699 u8 revision_id;
700 u8 pci_func;
701 u8 linkup;
796 u16 port_type; 702 u16 port_type;
797 int board_type; 703 u16 board_type;
798 u32 linkup;
799 /* Address of cmd ring in Phantom */
800 struct cmd_desc_type0 *cmd_desc_head;
801 dma_addr_t cmd_desc_phys_addr;
802 struct netxen_adapter *adapter;
803 int pci_func;
804}; 704};
805 705
806#define MINIMUM_ETHERNET_FRAME_SIZE 64 /* With FCS */ 706#define MINIMUM_ETHERNET_FRAME_SIZE 64 /* With FCS */
807#define ETHERNET_FCS_SIZE 4 707#define ETHERNET_FCS_SIZE 4
808 708
809struct netxen_adapter_stats { 709struct netxen_adapter_stats {
810 u64 rcvdbadskb;
811 u64 xmitcalled; 710 u64 xmitcalled;
812 u64 xmitedframes;
813 u64 xmitfinished; 711 u64 xmitfinished;
814 u64 badskblen;
815 u64 nocmddescriptor;
816 u64 polled;
817 u64 rxdropped; 712 u64 rxdropped;
818 u64 txdropped; 713 u64 txdropped;
819 u64 csummed; 714 u64 csummed;
820 u64 no_rcv; 715 u64 no_rcv;
821 u64 rxbytes; 716 u64 rxbytes;
822 u64 txbytes; 717 u64 txbytes;
823 u64 ints;
824}; 718};
825 719
826/* 720/*
@@ -852,14 +746,25 @@ struct nx_host_sds_ring {
852 struct napi_struct napi; 746 struct napi_struct napi;
853 struct list_head free_list[NUM_RCV_DESC_RINGS]; 747 struct list_head free_list[NUM_RCV_DESC_RINGS];
854 748
855 u16 clean_tx;
856 u16 post_rxd;
857 int irq; 749 int irq;
858 750
859 dma_addr_t phys_addr; 751 dma_addr_t phys_addr;
860 char name[IFNAMSIZ+4]; 752 char name[IFNAMSIZ+4];
861}; 753};
862 754
755struct nx_host_tx_ring {
756 u32 producer;
757 __le32 *hw_consumer;
758 u32 sw_consumer;
759 u32 crb_cmd_producer;
760 u32 crb_cmd_consumer;
761 u32 num_desc;
762
763 struct netxen_cmd_buffer *cmd_buf_arr;
764 struct cmd_desc_type0 *desc_head;
765 dma_addr_t phys_addr;
766};
767
863/* 768/*
864 * Receive context. There is one such structure per instance of the 769 * Receive context. There is one such structure per instance of the
865 * receive processing. Any state information that is relevant to 770 * receive processing. Any state information that is relevant to
@@ -871,8 +776,11 @@ struct netxen_recv_context {
871 u16 context_id; 776 u16 context_id;
872 u16 virt_port; 777 u16 virt_port;
873 778
874 struct nx_host_rds_ring rds_rings[NUM_RCV_DESC_RINGS]; 779 struct nx_host_rds_ring *rds_rings;
875 struct nx_host_sds_ring sds_rings[NUM_STS_DESC_RINGS]; 780 struct nx_host_sds_ring *sds_rings;
781
782 struct netxen_ring_ctx *hwctx;
783 dma_addr_t phys_addr;
876}; 784};
877 785
878/* New HW context creation */ 786/* New HW context creation */
@@ -1111,8 +1019,8 @@ typedef struct {
1111#define NETXEN_MAC_DEL 2 1019#define NETXEN_MAC_DEL 2
1112 1020
1113typedef struct nx_mac_list_s { 1021typedef struct nx_mac_list_s {
1114 struct nx_mac_list_s *next; 1022 struct list_head list;
1115 uint8_t mac_addr[MAX_ADDR_LEN]; 1023 uint8_t mac_addr[ETH_ALEN+2];
1116} nx_mac_list_t; 1024} nx_mac_list_t;
1117 1025
1118/* 1026/*
@@ -1154,31 +1062,118 @@ typedef struct {
1154 1062
1155#define NX_MAC_EVENT 0x1 1063#define NX_MAC_EVENT 0x1
1156 1064
1157enum { 1065/*
1158 NX_NIC_H2C_OPCODE_START = 0, 1066 * Driver --> Firmware
1159 NX_NIC_H2C_OPCODE_CONFIG_RSS, 1067 */
1160 NX_NIC_H2C_OPCODE_CONFIG_RSS_TBL, 1068#define NX_NIC_H2C_OPCODE_START 0
1161 NX_NIC_H2C_OPCODE_CONFIG_INTR_COALESCE, 1069#define NX_NIC_H2C_OPCODE_CONFIG_RSS 1
1162 NX_NIC_H2C_OPCODE_CONFIG_LED, 1070#define NX_NIC_H2C_OPCODE_CONFIG_RSS_TBL 2
1163 NX_NIC_H2C_OPCODE_CONFIG_PROMISCUOUS, 1071#define NX_NIC_H2C_OPCODE_CONFIG_INTR_COALESCE 3
1164 NX_NIC_H2C_OPCODE_CONFIG_L2_MAC, 1072#define NX_NIC_H2C_OPCODE_CONFIG_LED 4
1165 NX_NIC_H2C_OPCODE_LRO_REQUEST, 1073#define NX_NIC_H2C_OPCODE_CONFIG_PROMISCUOUS 5
1166 NX_NIC_H2C_OPCODE_GET_SNMP_STATS, 1074#define NX_NIC_H2C_OPCODE_CONFIG_L2_MAC 6
1167 NX_NIC_H2C_OPCODE_PROXY_START_REQUEST, 1075#define NX_NIC_H2C_OPCODE_LRO_REQUEST 7
1168 NX_NIC_H2C_OPCODE_PROXY_STOP_REQUEST, 1076#define NX_NIC_H2C_OPCODE_GET_SNMP_STATS 8
1169 NX_NIC_H2C_OPCODE_PROXY_SET_MTU, 1077#define NX_NIC_H2C_OPCODE_PROXY_START_REQUEST 9
1170 NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE, 1078#define NX_NIC_H2C_OPCODE_PROXY_STOP_REQUEST 10
1171 NX_H2P_OPCODE_GET_FINGER_PRINT_REQUEST, 1079#define NX_NIC_H2C_OPCODE_PROXY_SET_MTU 11
1172 NX_H2P_OPCODE_INSTALL_LICENSE_REQUEST, 1080#define NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE 12
1173 NX_H2P_OPCODE_GET_LICENSE_CAPABILITY_REQUEST, 1081#define NX_NIC_H2C_OPCODE_GET_FINGER_PRINT_REQUEST 13
1174 NX_NIC_H2C_OPCODE_GET_NET_STATS, 1082#define NX_NIC_H2C_OPCODE_INSTALL_LICENSE_REQUEST 14
1175 NX_NIC_H2C_OPCODE_LAST 1083#define NX_NIC_H2C_OPCODE_GET_LICENSE_CAPABILITY_REQUEST 15
1176}; 1084#define NX_NIC_H2C_OPCODE_GET_NET_STATS 16
1085#define NX_NIC_H2C_OPCODE_PROXY_UPDATE_P2V 17
1086#define NX_NIC_H2C_OPCODE_CONFIG_IPADDR 18
1087#define NX_NIC_H2C_OPCODE_CONFIG_LOOPBACK 19
1088#define NX_NIC_H2C_OPCODE_PROXY_STOP_DONE 20
1089#define NX_NIC_H2C_OPCODE_GET_LINKEVENT 21
1090#define NX_NIC_C2C_OPCODE 22
1091#define NX_NIC_H2C_OPCODE_LAST 23
1092
1093/*
1094 * Firmware --> Driver
1095 */
1096
1097#define NX_NIC_C2H_OPCODE_START 128
1098#define NX_NIC_C2H_OPCODE_CONFIG_RSS_RESPONSE 129
1099#define NX_NIC_C2H_OPCODE_CONFIG_RSS_TBL_RESPONSE 130
1100#define NX_NIC_C2H_OPCODE_CONFIG_MAC_RESPONSE 131
1101#define NX_NIC_C2H_OPCODE_CONFIG_PROMISCUOUS_RESPONSE 132
1102#define NX_NIC_C2H_OPCODE_CONFIG_L2_MAC_RESPONSE 133
1103#define NX_NIC_C2H_OPCODE_LRO_DELETE_RESPONSE 134
1104#define NX_NIC_C2H_OPCODE_LRO_ADD_FAILURE_RESPONSE 135
1105#define NX_NIC_C2H_OPCODE_GET_SNMP_STATS 136
1106#define NX_NIC_C2H_OPCODE_GET_FINGER_PRINT_REPLY 137
1107#define NX_NIC_C2H_OPCODE_INSTALL_LICENSE_REPLY 138
1108#define NX_NIC_C2H_OPCODE_GET_LICENSE_CAPABILITIES_REPLY 139
1109#define NX_NIC_C2H_OPCODE_GET_NET_STATS_RESPONSE 140
1110#define NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE 141
1111#define NX_NIC_C2H_OPCODE_LAST 142
1177 1112
1178#define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */ 1113#define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */
1179#define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */ 1114#define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */
1180#define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */ 1115#define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
1181 1116
1117#define NX_FW_CAPABILITY_LINK_NOTIFICATION (1 << 5)
1118#define NX_FW_CAPABILITY_SWITCHING (1 << 6)
1119
1120/* module types */
1121#define LINKEVENT_MODULE_NOT_PRESENT 1
1122#define LINKEVENT_MODULE_OPTICAL_UNKNOWN 2
1123#define LINKEVENT_MODULE_OPTICAL_SRLR 3
1124#define LINKEVENT_MODULE_OPTICAL_LRM 4
1125#define LINKEVENT_MODULE_OPTICAL_SFP_1G 5
1126#define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE 6
1127#define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN 7
1128#define LINKEVENT_MODULE_TWINAX 8
1129
1130#define LINKSPEED_10GBPS 10000
1131#define LINKSPEED_1GBPS 1000
1132#define LINKSPEED_100MBPS 100
1133#define LINKSPEED_10MBPS 10
1134
1135#define LINKSPEED_ENCODED_10MBPS 0
1136#define LINKSPEED_ENCODED_100MBPS 1
1137#define LINKSPEED_ENCODED_1GBPS 2
1138
1139#define LINKEVENT_AUTONEG_DISABLED 0
1140#define LINKEVENT_AUTONEG_ENABLED 1
1141
1142#define LINKEVENT_HALF_DUPLEX 0
1143#define LINKEVENT_FULL_DUPLEX 1
1144
1145#define LINKEVENT_LINKSPEED_MBPS 0
1146#define LINKEVENT_LINKSPEED_ENCODED 1
1147
1148/* firmware response header:
1149 * 63:58 - message type
1150 * 57:56 - owner
1151 * 55:53 - desc count
1152 * 52:48 - reserved
1153 * 47:40 - completion id
1154 * 39:32 - opcode
1155 * 31:16 - error code
1156 * 15:00 - reserved
1157 */
1158#define netxen_get_nic_msgtype(msg_hdr) \
1159 ((msg_hdr >> 58) & 0x3F)
1160#define netxen_get_nic_msg_compid(msg_hdr) \
1161 ((msg_hdr >> 40) & 0xFF)
1162#define netxen_get_nic_msg_opcode(msg_hdr) \
1163 ((msg_hdr >> 32) & 0xFF)
1164#define netxen_get_nic_msg_errcode(msg_hdr) \
1165 ((msg_hdr >> 16) & 0xFFFF)
1166
1167typedef struct {
1168 union {
1169 struct {
1170 u64 hdr;
1171 u64 body[7];
1172 };
1173 u64 words[8];
1174 };
1175} nx_fw_msg_t;
1176
1182typedef struct { 1177typedef struct {
1183 __le64 qhdr; 1178 __le64 qhdr;
1184 __le64 req_hdr; 1179 __le64 req_hdr;
@@ -1218,99 +1213,96 @@ struct netxen_adapter {
1218 1213
1219 struct net_device *netdev; 1214 struct net_device *netdev;
1220 struct pci_dev *pdev; 1215 struct pci_dev *pdev;
1221 int pci_using_dac; 1216 struct list_head mac_list;
1222 struct net_device_stats net_stats;
1223 int mtu;
1224 int portnum;
1225 u8 physical_port;
1226 u16 tx_context_id;
1227
1228 uint8_t mc_enabled;
1229 uint8_t max_mc_count;
1230 nx_mac_list_t *mac_list;
1231
1232 struct netxen_legacy_intr_set legacy_intr;
1233
1234 struct work_struct watchdog_task;
1235 struct timer_list watchdog_timer;
1236 struct work_struct tx_timeout_task;
1237 1217
1238 u32 curr_window; 1218 u32 curr_window;
1239 u32 crb_win; 1219 u32 crb_win;
1240 rwlock_t adapter_lock; 1220 rwlock_t adapter_lock;
1241 1221
1242 u32 cmd_producer;
1243 __le32 *cmd_consumer;
1244 u32 last_cmd_consumer;
1245 u32 crb_addr_cmd_producer;
1246 u32 crb_addr_cmd_consumer;
1247 spinlock_t tx_clean_lock; 1222 spinlock_t tx_clean_lock;
1248 1223
1249 u32 num_txd; 1224 u16 num_txd;
1250 u32 num_rxd; 1225 u16 num_rxd;
1251 u32 num_jumbo_rxd; 1226 u16 num_jumbo_rxd;
1252 u32 num_lro_rxd; 1227 u16 num_lro_rxd;
1228
1229 u8 max_rds_rings;
1230 u8 max_sds_rings;
1231 u8 driver_mismatch;
1232 u8 msix_supported;
1233 u8 rx_csum;
1234 u8 pci_using_dac;
1235 u8 portnum;
1236 u8 physical_port;
1237
1238 u8 mc_enabled;
1239 u8 max_mc_count;
1240 u8 rss_supported;
1241 u8 resv2;
1242 u32 resv3;
1243
1244 u8 has_link_events;
1245 u8 resv1;
1246 u16 tx_context_id;
1247 u16 mtu;
1248 u16 is_up;
1253 1249
1254 int max_rds_rings; 1250 u16 link_speed;
1255 int max_sds_rings; 1251 u16 link_duplex;
1252 u16 link_autoneg;
1253 u16 module_type;
1256 1254
1255 u32 capabilities;
1257 u32 flags; 1256 u32 flags;
1258 u32 irq; 1257 u32 irq;
1259 int driver_mismatch;
1260 u32 temp; 1258 u32 temp;
1261 1259
1262 u32 fw_major; 1260 u32 msi_tgt_status;
1263 u32 fw_version; 1261 u32 resv4;
1264
1265 int msix_supported;
1266 struct msix_entry msix_entries[MSIX_ENTRIES_PER_ADAPTER];
1267 1262
1268 struct netxen_adapter_stats stats; 1263 struct netxen_adapter_stats stats;
1269 1264
1270 u16 link_speed;
1271 u16 link_duplex;
1272 u16 state;
1273 u16 link_autoneg;
1274 int rx_csum;
1275
1276 struct netxen_cmd_buffer *cmd_buf_arr; /* Command buffers for xmit */
1277
1278 /*
1279 * Receive instances. These can be either one per port,
1280 * or one per peg, etc.
1281 */
1282 struct netxen_recv_context recv_ctx; 1265 struct netxen_recv_context recv_ctx;
1266 struct nx_host_tx_ring *tx_ring;
1283 1267
1284 int is_up;
1285 struct netxen_dummy_dma dummy_dma;
1286 nx_nic_intr_coalesce_t coal;
1287
1288 /* Context interface shared between card and host */
1289 struct netxen_ring_ctx *ctx_desc;
1290 dma_addr_t ctx_desc_phys_addr;
1291 int intr_scheme;
1292 int msi_mode;
1293 int (*enable_phy_interrupts) (struct netxen_adapter *); 1268 int (*enable_phy_interrupts) (struct netxen_adapter *);
1294 int (*disable_phy_interrupts) (struct netxen_adapter *); 1269 int (*disable_phy_interrupts) (struct netxen_adapter *);
1295 int (*macaddr_set) (struct netxen_adapter *, netxen_ethernet_macaddr_t); 1270 int (*macaddr_set) (struct netxen_adapter *, u8 *);
1296 int (*set_mtu) (struct netxen_adapter *, int); 1271 int (*set_mtu) (struct netxen_adapter *, int);
1297 int (*set_promisc) (struct netxen_adapter *, u32); 1272 int (*set_promisc) (struct netxen_adapter *, u32);
1273 void (*set_multi) (struct net_device *);
1298 int (*phy_read) (struct netxen_adapter *, long reg, u32 *); 1274 int (*phy_read) (struct netxen_adapter *, long reg, u32 *);
1299 int (*phy_write) (struct netxen_adapter *, long reg, u32 val); 1275 int (*phy_write) (struct netxen_adapter *, long reg, u32 val);
1300 int (*init_port) (struct netxen_adapter *, int); 1276 int (*init_port) (struct netxen_adapter *, int);
1301 int (*stop_port) (struct netxen_adapter *); 1277 int (*stop_port) (struct netxen_adapter *);
1302 1278
1303 int (*hw_read_wx)(struct netxen_adapter *, ulong, void *, int); 1279 u32 (*hw_read_wx)(struct netxen_adapter *, ulong);
1304 int (*hw_write_wx)(struct netxen_adapter *, ulong, void *, int); 1280 int (*hw_write_wx)(struct netxen_adapter *, ulong, u32);
1305 int (*pci_mem_read)(struct netxen_adapter *, u64, void *, int); 1281 int (*pci_mem_read)(struct netxen_adapter *, u64, void *, int);
1306 int (*pci_mem_write)(struct netxen_adapter *, u64, void *, int); 1282 int (*pci_mem_write)(struct netxen_adapter *, u64, void *, int);
1307 int (*pci_write_immediate)(struct netxen_adapter *, u64, u32); 1283 int (*pci_write_immediate)(struct netxen_adapter *, u64, u32);
1308 u32 (*pci_read_immediate)(struct netxen_adapter *, u64); 1284 u32 (*pci_read_immediate)(struct netxen_adapter *, u64);
1309 void (*pci_write_normalize)(struct netxen_adapter *, u64, u32);
1310 u32 (*pci_read_normalize)(struct netxen_adapter *, u64);
1311 unsigned long (*pci_set_window)(struct netxen_adapter *, 1285 unsigned long (*pci_set_window)(struct netxen_adapter *,
1312 unsigned long long); 1286 unsigned long long);
1313}; /* netxen_adapter structure */ 1287
1288 struct netxen_legacy_intr_set legacy_intr;
1289
1290 struct msix_entry msix_entries[MSIX_ENTRIES_PER_ADAPTER];
1291
1292 struct netxen_dummy_dma dummy_dma;
1293
1294 struct work_struct watchdog_task;
1295 struct timer_list watchdog_timer;
1296 struct work_struct tx_timeout_task;
1297
1298 struct net_device_stats net_stats;
1299
1300 nx_nic_intr_coalesce_t coal;
1301
1302 u32 fw_major;
1303 u32 fw_version;
1304 const struct firmware *fw;
1305};
1314 1306
1315/* 1307/*
1316 * NetXen dma watchdog control structure 1308 * NetXen dma watchdog control structure
@@ -1330,46 +1322,6 @@ struct netxen_adapter {
1330#define netxen_get_dma_watchdog_disabled(config_word) \ 1322#define netxen_get_dma_watchdog_disabled(config_word) \
1331 (((config_word) >> 1) & 0x1) 1323 (((config_word) >> 1) & 0x1)
1332 1324
1333/* Max number of xmit producer threads that can run simultaneously */
1334#define MAX_XMIT_PRODUCERS 16
1335
1336#define PCI_OFFSET_FIRST_RANGE(adapter, off) \
1337 ((adapter)->ahw.pci_base0 + (off))
1338#define PCI_OFFSET_SECOND_RANGE(adapter, off) \
1339 ((adapter)->ahw.pci_base1 + (off) - SECOND_PAGE_GROUP_START)
1340#define PCI_OFFSET_THIRD_RANGE(adapter, off) \
1341 ((adapter)->ahw.pci_base2 + (off) - THIRD_PAGE_GROUP_START)
1342
1343static inline void __iomem *pci_base_offset(struct netxen_adapter *adapter,
1344 unsigned long off)
1345{
1346 if ((off < FIRST_PAGE_GROUP_END) && (off >= FIRST_PAGE_GROUP_START)) {
1347 return (adapter->ahw.pci_base0 + off);
1348 } else if ((off < SECOND_PAGE_GROUP_END) &&
1349 (off >= SECOND_PAGE_GROUP_START)) {
1350 return (adapter->ahw.pci_base1 + off - SECOND_PAGE_GROUP_START);
1351 } else if ((off < THIRD_PAGE_GROUP_END) &&
1352 (off >= THIRD_PAGE_GROUP_START)) {
1353 return (adapter->ahw.pci_base2 + off - THIRD_PAGE_GROUP_START);
1354 }
1355 return NULL;
1356}
1357
1358static inline void __iomem *pci_base(struct netxen_adapter *adapter,
1359 unsigned long off)
1360{
1361 if ((off < FIRST_PAGE_GROUP_END) && (off >= FIRST_PAGE_GROUP_START)) {
1362 return adapter->ahw.pci_base0;
1363 } else if ((off < SECOND_PAGE_GROUP_END) &&
1364 (off >= SECOND_PAGE_GROUP_START)) {
1365 return adapter->ahw.pci_base1;
1366 } else if ((off < THIRD_PAGE_GROUP_END) &&
1367 (off >= THIRD_PAGE_GROUP_START)) {
1368 return adapter->ahw.pci_base2;
1369 }
1370 return NULL;
1371}
1372
1373int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter); 1325int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter);
1374int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter *adapter); 1326int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter *adapter);
1375int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter); 1327int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter);
@@ -1382,21 +1334,22 @@ int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter,
1382/* Functions available from netxen_nic_hw.c */ 1334/* Functions available from netxen_nic_hw.c */
1383int netxen_nic_set_mtu_xgb(struct netxen_adapter *adapter, int new_mtu); 1335int netxen_nic_set_mtu_xgb(struct netxen_adapter *adapter, int new_mtu);
1384int netxen_nic_set_mtu_gb(struct netxen_adapter *adapter, int new_mtu); 1336int netxen_nic_set_mtu_gb(struct netxen_adapter *adapter, int new_mtu);
1385void netxen_nic_reg_write(struct netxen_adapter *adapter, u64 off, u32 val); 1337
1386int netxen_nic_reg_read(struct netxen_adapter *adapter, u64 off); 1338int netxen_p2_nic_set_mac_addr(struct netxen_adapter *adapter, u8 *addr);
1387void netxen_nic_write_w0(struct netxen_adapter *adapter, u32 index, u32 value); 1339int netxen_p3_nic_set_mac_addr(struct netxen_adapter *adapter, u8 *addr);
1388void netxen_nic_read_w0(struct netxen_adapter *adapter, u32 index, u32 *value); 1340
1389void netxen_nic_write_w1(struct netxen_adapter *adapter, u32 index, u32 value); 1341#define NXRD32(adapter, off) \
1390void netxen_nic_read_w1(struct netxen_adapter *adapter, u32 index, u32 *value); 1342 (adapter->hw_read_wx(adapter, off))
1343#define NXWR32(adapter, off, val) \
1344 (adapter->hw_write_wx(adapter, off, val))
1391 1345
1392int netxen_nic_get_board_info(struct netxen_adapter *adapter); 1346int netxen_nic_get_board_info(struct netxen_adapter *adapter);
1393void netxen_nic_get_firmware_info(struct netxen_adapter *adapter); 1347void netxen_nic_get_firmware_info(struct netxen_adapter *adapter);
1394int netxen_nic_wol_supported(struct netxen_adapter *adapter); 1348int netxen_nic_wol_supported(struct netxen_adapter *adapter);
1395 1349
1396int netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter, 1350u32 netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter, ulong off);
1397 ulong off, void *data, int len);
1398int netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter, 1351int netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter,
1399 ulong off, void *data, int len); 1352 ulong off, u32 data);
1400int netxen_nic_pci_mem_read_128M(struct netxen_adapter *adapter, 1353int netxen_nic_pci_mem_read_128M(struct netxen_adapter *adapter,
1401 u64 off, void *data, int size); 1354 u64 off, void *data, int size);
1402int netxen_nic_pci_mem_write_128M(struct netxen_adapter *adapter, 1355int netxen_nic_pci_mem_write_128M(struct netxen_adapter *adapter,
@@ -1412,16 +1365,13 @@ unsigned long netxen_nic_pci_set_window_128M(struct netxen_adapter *adapter,
1412void netxen_nic_pci_change_crbwindow_128M(struct netxen_adapter *adapter, 1365void netxen_nic_pci_change_crbwindow_128M(struct netxen_adapter *adapter,
1413 u32 wndw); 1366 u32 wndw);
1414 1367
1415int netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter, 1368u32 netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter, ulong off);
1416 ulong off, void *data, int len);
1417int netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter, 1369int netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter,
1418 ulong off, void *data, int len); 1370 ulong off, u32 data);
1419int netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter, 1371int netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter,
1420 u64 off, void *data, int size); 1372 u64 off, void *data, int size);
1421int netxen_nic_pci_mem_write_2M(struct netxen_adapter *adapter, 1373int netxen_nic_pci_mem_write_2M(struct netxen_adapter *adapter,
1422 u64 off, void *data, int size); 1374 u64 off, void *data, int size);
1423void netxen_crb_writelit_adapter(struct netxen_adapter *adapter,
1424 unsigned long off, int data);
1425int netxen_nic_pci_write_immediate_2M(struct netxen_adapter *adapter, 1375int netxen_nic_pci_write_immediate_2M(struct netxen_adapter *adapter,
1426 u64 off, u32 data); 1376 u64 off, u32 data);
1427u32 netxen_nic_pci_read_immediate_2M(struct netxen_adapter *adapter, u64 off); 1377u32 netxen_nic_pci_read_immediate_2M(struct netxen_adapter *adapter, u64 off);
@@ -1435,8 +1385,9 @@ unsigned long netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter,
1435void netxen_free_adapter_offload(struct netxen_adapter *adapter); 1385void netxen_free_adapter_offload(struct netxen_adapter *adapter);
1436int netxen_initialize_adapter_offload(struct netxen_adapter *adapter); 1386int netxen_initialize_adapter_offload(struct netxen_adapter *adapter);
1437int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val); 1387int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val);
1438int netxen_receive_peg_ready(struct netxen_adapter *adapter);
1439int netxen_load_firmware(struct netxen_adapter *adapter); 1388int netxen_load_firmware(struct netxen_adapter *adapter);
1389void netxen_request_firmware(struct netxen_adapter *adapter);
1390void netxen_release_firmware(struct netxen_adapter *adapter);
1440int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose); 1391int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose);
1441 1392
1442int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp); 1393int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp);
@@ -1475,6 +1426,8 @@ void netxen_p3_free_mac_list(struct netxen_adapter *adapter);
1475int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32); 1426int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32);
1476int netxen_config_intr_coalesce(struct netxen_adapter *adapter); 1427int netxen_config_intr_coalesce(struct netxen_adapter *adapter);
1477int netxen_config_rss(struct netxen_adapter *adapter, int enable); 1428int netxen_config_rss(struct netxen_adapter *adapter, int enable);
1429int netxen_linkevent_request(struct netxen_adapter *adapter, int enable);
1430void netxen_advert_link_change(struct netxen_adapter *adapter, int linkup);
1478 1431
1479int nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu); 1432int nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu);
1480int netxen_nic_change_mtu(struct net_device *netdev, int new_mtu); 1433int netxen_nic_change_mtu(struct net_device *netdev, int new_mtu);
@@ -1483,7 +1436,7 @@ int netxen_nic_set_mac(struct net_device *netdev, void *p);
1483struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev); 1436struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev);
1484 1437
1485void netxen_nic_update_cmd_producer(struct netxen_adapter *adapter, 1438void netxen_nic_update_cmd_producer(struct netxen_adapter *adapter,
1486 uint32_t crb_producer); 1439 struct nx_host_tx_ring *tx_ring, uint32_t crb_producer);
1487 1440
1488/* 1441/*
1489 * NetXen Board information 1442 * NetXen Board information
@@ -1491,7 +1444,7 @@ void netxen_nic_update_cmd_producer(struct netxen_adapter *adapter,
1491 1444
1492#define NETXEN_MAX_SHORT_NAME 32 1445#define NETXEN_MAX_SHORT_NAME 32
1493struct netxen_brdinfo { 1446struct netxen_brdinfo {
1494 netxen_brdtype_t brdtype; /* type of board */ 1447 int brdtype; /* type of board */
1495 long ports; /* max no of physical ports */ 1448 long ports; /* max no of physical ports */
1496 char short_name[NETXEN_MAX_SHORT_NAME]; 1449 char short_name[NETXEN_MAX_SHORT_NAME];
1497}; 1450};
@@ -1541,17 +1494,15 @@ dma_watchdog_shutdown_request(struct netxen_adapter *adapter)
1541 u32 ctrl; 1494 u32 ctrl;
1542 1495
1543 /* check if already inactive */ 1496 /* check if already inactive */
1544 if (adapter->hw_read_wx(adapter, 1497 ctrl = adapter->hw_read_wx(adapter,
1545 NETXEN_CAM_RAM(NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL), &ctrl, 4)) 1498 NETXEN_CAM_RAM(NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL));
1546 printk(KERN_ERR "failed to read dma watchdog status\n");
1547 1499
1548 if (netxen_get_dma_watchdog_enabled(ctrl) == 0) 1500 if (netxen_get_dma_watchdog_enabled(ctrl) == 0)
1549 return 1; 1501 return 1;
1550 1502
1551 /* Send the disable request */ 1503 /* Send the disable request */
1552 netxen_set_dma_watchdog_disable_req(ctrl); 1504 netxen_set_dma_watchdog_disable_req(ctrl);
1553 netxen_crb_writelit_adapter(adapter, 1505 NXWR32(adapter, NETXEN_CAM_RAM(NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL), ctrl);
1554 NETXEN_CAM_RAM(NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL), ctrl);
1555 1506
1556 return 0; 1507 return 0;
1557} 1508}
@@ -1561,9 +1512,8 @@ dma_watchdog_shutdown_poll_result(struct netxen_adapter *adapter)
1561{ 1512{
1562 u32 ctrl; 1513 u32 ctrl;
1563 1514
1564 if (adapter->hw_read_wx(adapter, 1515 ctrl = adapter->hw_read_wx(adapter,
1565 NETXEN_CAM_RAM(NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL), &ctrl, 4)) 1516 NETXEN_CAM_RAM(NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL));
1566 printk(KERN_ERR "failed to read dma watchdog status\n");
1567 1517
1568 return (netxen_get_dma_watchdog_enabled(ctrl) == 0); 1518 return (netxen_get_dma_watchdog_enabled(ctrl) == 0);
1569} 1519}
@@ -1573,9 +1523,8 @@ dma_watchdog_wakeup(struct netxen_adapter *adapter)
1573{ 1523{
1574 u32 ctrl; 1524 u32 ctrl;
1575 1525
1576 if (adapter->hw_read_wx(adapter, 1526 ctrl = adapter->hw_read_wx(adapter,
1577 NETXEN_CAM_RAM(NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL), &ctrl, 4)) 1527 NETXEN_CAM_RAM(NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL));
1578 printk(KERN_ERR "failed to read dma watchdog status\n");
1579 1528
1580 if (netxen_get_dma_watchdog_enabled(ctrl)) 1529 if (netxen_get_dma_watchdog_enabled(ctrl))
1581 return 1; 1530 return 1;
@@ -1583,8 +1532,7 @@ dma_watchdog_wakeup(struct netxen_adapter *adapter)
1583 /* send the wakeup request */ 1532 /* send the wakeup request */
1584 netxen_set_dma_watchdog_enable_req(ctrl); 1533 netxen_set_dma_watchdog_enable_req(ctrl);
1585 1534
1586 netxen_crb_writelit_adapter(adapter, 1535 NXWR32(adapter, NETXEN_CAM_RAM(NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL), ctrl);
1587 NETXEN_CAM_RAM(NETXEN_CAM_RAM_DMA_WATCHDOG_CTRL), ctrl);
1588 1536
1589 return 0; 1537 return 0;
1590} 1538}
diff --git a/drivers/net/netxen/netxen_nic_ctx.c b/drivers/net/netxen/netxen_nic_ctx.c
index 9234473bc08a..4754f5cffad0 100644
--- a/drivers/net/netxen/netxen_nic_ctx.c
+++ b/drivers/net/netxen/netxen_nic_ctx.c
@@ -41,8 +41,7 @@ netxen_api_lock(struct netxen_adapter *adapter)
41 41
42 for (;;) { 42 for (;;) {
43 /* Acquire PCIE HW semaphore5 */ 43 /* Acquire PCIE HW semaphore5 */
44 netxen_nic_read_w0(adapter, 44 done = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM5_LOCK));
45 NETXEN_PCIE_REG(PCIE_SEM5_LOCK), &done);
46 45
47 if (done == 1) 46 if (done == 1)
48 break; 47 break;
@@ -56,7 +55,7 @@ netxen_api_lock(struct netxen_adapter *adapter)
56 } 55 }
57 56
58#if 0 57#if 0
59 netxen_nic_write_w1(adapter, 58 NXWR32(adapter,
60 NETXEN_API_LOCK_ID, NX_OS_API_LOCK_DRIVER); 59 NETXEN_API_LOCK_ID, NX_OS_API_LOCK_DRIVER);
61#endif 60#endif
62 return 0; 61 return 0;
@@ -65,11 +64,8 @@ netxen_api_lock(struct netxen_adapter *adapter)
65static int 64static int
66netxen_api_unlock(struct netxen_adapter *adapter) 65netxen_api_unlock(struct netxen_adapter *adapter)
67{ 66{
68 u32 val;
69
70 /* Release PCIE HW semaphore5 */ 67 /* Release PCIE HW semaphore5 */
71 netxen_nic_read_w0(adapter, 68 NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM5_UNLOCK));
72 NETXEN_PCIE_REG(PCIE_SEM5_UNLOCK), &val);
73 return 0; 69 return 0;
74} 70}
75 71
@@ -86,7 +82,7 @@ netxen_poll_rsp(struct netxen_adapter *adapter)
86 if (++timeout > NX_OS_CRB_RETRY_COUNT) 82 if (++timeout > NX_OS_CRB_RETRY_COUNT)
87 return NX_CDRP_RSP_TIMEOUT; 83 return NX_CDRP_RSP_TIMEOUT;
88 84
89 netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, &rsp); 85 rsp = NXRD32(adapter, NX_CDRP_CRB_OFFSET);
90 } while (!NX_CDRP_IS_RSP(rsp)); 86 } while (!NX_CDRP_IS_RSP(rsp));
91 87
92 return rsp; 88 return rsp;
@@ -106,16 +102,15 @@ netxen_issue_cmd(struct netxen_adapter *adapter,
106 if (netxen_api_lock(adapter)) 102 if (netxen_api_lock(adapter))
107 return NX_RCODE_TIMEOUT; 103 return NX_RCODE_TIMEOUT;
108 104
109 netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, signature); 105 NXWR32(adapter, NX_SIGN_CRB_OFFSET, signature);
110 106
111 netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, arg1); 107 NXWR32(adapter, NX_ARG1_CRB_OFFSET, arg1);
112 108
113 netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, arg2); 109 NXWR32(adapter, NX_ARG2_CRB_OFFSET, arg2);
114 110
115 netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, arg3); 111 NXWR32(adapter, NX_ARG3_CRB_OFFSET, arg3);
116 112
117 netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET, 113 NXWR32(adapter, NX_CDRP_CRB_OFFSET, NX_CDRP_FORM_CMD(cmd));
118 NX_CDRP_FORM_CMD(cmd));
119 114
120 rsp = netxen_poll_rsp(adapter); 115 rsp = netxen_poll_rsp(adapter);
121 116
@@ -125,7 +120,7 @@ netxen_issue_cmd(struct netxen_adapter *adapter,
125 120
126 rcode = NX_RCODE_TIMEOUT; 121 rcode = NX_RCODE_TIMEOUT;
127 } else if (rsp == NX_CDRP_RSP_FAIL) { 122 } else if (rsp == NX_CDRP_RSP_FAIL) {
128 netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode); 123 rcode = NXRD32(adapter, NX_ARG1_CRB_OFFSET);
129 124
130 printk(KERN_ERR "%s: failed card response code:0x%x\n", 125 printk(KERN_ERR "%s: failed card response code:0x%x\n",
131 netxen_nic_driver_name, rcode); 126 netxen_nic_driver_name, rcode);
@@ -328,6 +323,8 @@ nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
328 int err = 0; 323 int err = 0;
329 u64 offset, phys_addr; 324 u64 offset, phys_addr;
330 dma_addr_t rq_phys_addr, rsp_phys_addr; 325 dma_addr_t rq_phys_addr, rsp_phys_addr;
326 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
327 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
331 328
332 rq_size = SIZEOF_HOSTRQ_TX(nx_hostrq_tx_ctx_t); 329 rq_size = SIZEOF_HOSTRQ_TX(nx_hostrq_tx_ctx_t);
333 rq_addr = pci_alloc_consistent(adapter->pdev, 330 rq_addr = pci_alloc_consistent(adapter->pdev,
@@ -362,15 +359,13 @@ nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
362 359
363 prq->dummy_dma_addr = cpu_to_le64(adapter->dummy_dma.phys_addr); 360 prq->dummy_dma_addr = cpu_to_le64(adapter->dummy_dma.phys_addr);
364 361
365 offset = adapter->ctx_desc_phys_addr+sizeof(struct netxen_ring_ctx); 362 offset = recv_ctx->phys_addr + sizeof(struct netxen_ring_ctx);
366 prq->cmd_cons_dma_addr = cpu_to_le64(offset); 363 prq->cmd_cons_dma_addr = cpu_to_le64(offset);
367 364
368 prq_cds = &prq->cds_ring; 365 prq_cds = &prq->cds_ring;
369 366
370 prq_cds->host_phys_addr = 367 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
371 cpu_to_le64(adapter->ahw.cmd_desc_phys_addr); 368 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
372
373 prq_cds->ring_size = cpu_to_le32(adapter->num_txd);
374 369
375 phys_addr = rq_phys_addr; 370 phys_addr = rq_phys_addr;
376 err = netxen_issue_cmd(adapter, 371 err = netxen_issue_cmd(adapter,
@@ -383,8 +378,7 @@ nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
383 378
384 if (err == NX_RCODE_SUCCESS) { 379 if (err == NX_RCODE_SUCCESS) {
385 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb); 380 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
386 adapter->crb_addr_cmd_producer = 381 tx_ring->crb_cmd_producer = NETXEN_NIC_REG(temp - 0x200);
387 NETXEN_NIC_REG(temp - 0x200);
388#if 0 382#if 0
389 adapter->tx_state = 383 adapter->tx_state =
390 le32_to_cpu(prsp->host_ctx_state); 384 le32_to_cpu(prsp->host_ctx_state);
@@ -448,7 +442,19 @@ static struct netxen_recv_crb recv_crb_registers[] = {
448 NETXEN_NIC_REG(0x120) 442 NETXEN_NIC_REG(0x120)
449 }, 443 },
450 /* crb_sts_consumer: */ 444 /* crb_sts_consumer: */
451 NETXEN_NIC_REG(0x138), 445 {
446 NETXEN_NIC_REG(0x138),
447 NETXEN_NIC_REG_2(0x000),
448 NETXEN_NIC_REG_2(0x004),
449 NETXEN_NIC_REG_2(0x008),
450 },
451 /* sw_int_mask */
452 {
453 CRB_SW_INT_MASK_0,
454 NETXEN_NIC_REG_2(0x044),
455 NETXEN_NIC_REG_2(0x048),
456 NETXEN_NIC_REG_2(0x04c),
457 },
452 }, 458 },
453 /* Instance 1 */ 459 /* Instance 1 */
454 { 460 {
@@ -461,7 +467,19 @@ static struct netxen_recv_crb recv_crb_registers[] = {
461 NETXEN_NIC_REG(0x164) 467 NETXEN_NIC_REG(0x164)
462 }, 468 },
463 /* crb_sts_consumer: */ 469 /* crb_sts_consumer: */
464 NETXEN_NIC_REG(0x17c), 470 {
471 NETXEN_NIC_REG(0x17c),
472 NETXEN_NIC_REG_2(0x020),
473 NETXEN_NIC_REG_2(0x024),
474 NETXEN_NIC_REG_2(0x028),
475 },
476 /* sw_int_mask */
477 {
478 CRB_SW_INT_MASK_1,
479 NETXEN_NIC_REG_2(0x064),
480 NETXEN_NIC_REG_2(0x068),
481 NETXEN_NIC_REG_2(0x06c),
482 },
465 }, 483 },
466 /* Instance 2 */ 484 /* Instance 2 */
467 { 485 {
@@ -474,7 +492,19 @@ static struct netxen_recv_crb recv_crb_registers[] = {
474 NETXEN_NIC_REG(0x208) 492 NETXEN_NIC_REG(0x208)
475 }, 493 },
476 /* crb_sts_consumer: */ 494 /* crb_sts_consumer: */
477 NETXEN_NIC_REG(0x220), 495 {
496 NETXEN_NIC_REG(0x220),
497 NETXEN_NIC_REG_2(0x03c),
498 NETXEN_NIC_REG_2(0x03c),
499 NETXEN_NIC_REG_2(0x03c),
500 },
501 /* sw_int_mask */
502 {
503 CRB_SW_INT_MASK_2,
504 NETXEN_NIC_REG_2(0x03c),
505 NETXEN_NIC_REG_2(0x03c),
506 NETXEN_NIC_REG_2(0x03c),
507 },
478 }, 508 },
479 /* Instance 3 */ 509 /* Instance 3 */
480 { 510 {
@@ -487,7 +517,19 @@ static struct netxen_recv_crb recv_crb_registers[] = {
487 NETXEN_NIC_REG(0x24c) 517 NETXEN_NIC_REG(0x24c)
488 }, 518 },
489 /* crb_sts_consumer: */ 519 /* crb_sts_consumer: */
490 NETXEN_NIC_REG(0x264), 520 {
521 NETXEN_NIC_REG(0x264),
522 NETXEN_NIC_REG_2(0x03c),
523 NETXEN_NIC_REG_2(0x03c),
524 NETXEN_NIC_REG_2(0x03c),
525 },
526 /* sw_int_mask */
527 {
528 CRB_SW_INT_MASK_3,
529 NETXEN_NIC_REG_2(0x03c),
530 NETXEN_NIC_REG_2(0x03c),
531 NETXEN_NIC_REG_2(0x03c),
532 },
491 }, 533 },
492}; 534};
493 535
@@ -497,84 +539,91 @@ netxen_init_old_ctx(struct netxen_adapter *adapter)
497 struct netxen_recv_context *recv_ctx; 539 struct netxen_recv_context *recv_ctx;
498 struct nx_host_rds_ring *rds_ring; 540 struct nx_host_rds_ring *rds_ring;
499 struct nx_host_sds_ring *sds_ring; 541 struct nx_host_sds_ring *sds_ring;
542 struct nx_host_tx_ring *tx_ring;
500 int ring; 543 int ring;
501 int func_id = adapter->portnum; 544 int port = adapter->portnum;
502 545 struct netxen_ring_ctx *hwctx;
503 adapter->ctx_desc->cmd_ring_addr = 546 u32 signature;
504 cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);
505 adapter->ctx_desc->cmd_ring_size =
506 cpu_to_le32(adapter->num_txd);
507 547
548 tx_ring = adapter->tx_ring;
508 recv_ctx = &adapter->recv_ctx; 549 recv_ctx = &adapter->recv_ctx;
550 hwctx = recv_ctx->hwctx;
551
552 hwctx->cmd_ring_addr = cpu_to_le64(tx_ring->phys_addr);
553 hwctx->cmd_ring_size = cpu_to_le32(tx_ring->num_desc);
554
509 555
510 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 556 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
511 rds_ring = &recv_ctx->rds_rings[ring]; 557 rds_ring = &recv_ctx->rds_rings[ring];
512 558
513 adapter->ctx_desc->rcv_ctx[ring].rcv_ring_addr = 559 hwctx->rcv_rings[ring].addr =
514 cpu_to_le64(rds_ring->phys_addr); 560 cpu_to_le64(rds_ring->phys_addr);
515 adapter->ctx_desc->rcv_ctx[ring].rcv_ring_size = 561 hwctx->rcv_rings[ring].size =
516 cpu_to_le32(rds_ring->num_desc); 562 cpu_to_le32(rds_ring->num_desc);
517 } 563 }
518 sds_ring = &recv_ctx->sds_rings[0]; 564
519 adapter->ctx_desc->sts_ring_addr = cpu_to_le64(sds_ring->phys_addr); 565 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
520 adapter->ctx_desc->sts_ring_size = cpu_to_le32(sds_ring->num_desc); 566 sds_ring = &recv_ctx->sds_rings[ring];
521 567
522 adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_LO(func_id), 568 if (ring == 0) {
523 lower32(adapter->ctx_desc_phys_addr)); 569 hwctx->sts_ring_addr = cpu_to_le64(sds_ring->phys_addr);
524 adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_HI(func_id), 570 hwctx->sts_ring_size = cpu_to_le32(sds_ring->num_desc);
525 upper32(adapter->ctx_desc_phys_addr)); 571 }
526 adapter->pci_write_normalize(adapter, CRB_CTX_SIGNATURE_REG(func_id), 572 hwctx->sts_rings[ring].addr = cpu_to_le64(sds_ring->phys_addr);
527 NETXEN_CTX_SIGNATURE | func_id); 573 hwctx->sts_rings[ring].size = cpu_to_le32(sds_ring->num_desc);
574 hwctx->sts_rings[ring].msi_index = cpu_to_le16(ring);
575 }
576 hwctx->sts_ring_count = cpu_to_le32(adapter->max_sds_rings);
577
578 signature = (adapter->max_sds_rings > 1) ?
579 NETXEN_CTX_SIGNATURE_V2 : NETXEN_CTX_SIGNATURE;
580
581 NXWR32(adapter, CRB_CTX_ADDR_REG_LO(port),
582 lower32(recv_ctx->phys_addr));
583 NXWR32(adapter, CRB_CTX_ADDR_REG_HI(port),
584 upper32(recv_ctx->phys_addr));
585 NXWR32(adapter, CRB_CTX_SIGNATURE_REG(port),
586 signature | port);
528 return 0; 587 return 0;
529} 588}
530 589
531static uint32_t sw_int_mask[4] = {
532 CRB_SW_INT_MASK_0, CRB_SW_INT_MASK_1,
533 CRB_SW_INT_MASK_2, CRB_SW_INT_MASK_3
534};
535
536int netxen_alloc_hw_resources(struct netxen_adapter *adapter) 590int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
537{ 591{
538 struct netxen_hardware_context *hw = &adapter->ahw;
539 u32 state = 0;
540 void *addr; 592 void *addr;
541 int err = 0; 593 int err = 0;
542 int ring; 594 int ring;
543 struct netxen_recv_context *recv_ctx; 595 struct netxen_recv_context *recv_ctx;
544 struct nx_host_rds_ring *rds_ring; 596 struct nx_host_rds_ring *rds_ring;
545 struct nx_host_sds_ring *sds_ring; 597 struct nx_host_sds_ring *sds_ring;
598 struct nx_host_tx_ring *tx_ring;
546 599
547 struct pci_dev *pdev = adapter->pdev; 600 struct pci_dev *pdev = adapter->pdev;
548 struct net_device *netdev = adapter->netdev; 601 struct net_device *netdev = adapter->netdev;
602 int port = adapter->portnum;
549 603
550 err = netxen_receive_peg_ready(adapter); 604 recv_ctx = &adapter->recv_ctx;
551 if (err) { 605 tx_ring = adapter->tx_ring;
552 printk(KERN_ERR "Rcv Peg initialization not complete:%x.\n",
553 state);
554 return err;
555 }
556 606
557 addr = pci_alloc_consistent(pdev, 607 addr = pci_alloc_consistent(pdev,
558 sizeof(struct netxen_ring_ctx) + sizeof(uint32_t), 608 sizeof(struct netxen_ring_ctx) + sizeof(uint32_t),
559 &adapter->ctx_desc_phys_addr); 609 &recv_ctx->phys_addr);
560
561 if (addr == NULL) { 610 if (addr == NULL) {
562 dev_err(&pdev->dev, "failed to allocate hw context\n"); 611 dev_err(&pdev->dev, "failed to allocate hw context\n");
563 return -ENOMEM; 612 return -ENOMEM;
564 } 613 }
614
565 memset(addr, 0, sizeof(struct netxen_ring_ctx)); 615 memset(addr, 0, sizeof(struct netxen_ring_ctx));
566 adapter->ctx_desc = (struct netxen_ring_ctx *)addr; 616 recv_ctx->hwctx = (struct netxen_ring_ctx *)addr;
567 adapter->ctx_desc->ctx_id = cpu_to_le32(adapter->portnum); 617 recv_ctx->hwctx->ctx_id = cpu_to_le32(port);
568 adapter->ctx_desc->cmd_consumer_offset = 618 recv_ctx->hwctx->cmd_consumer_offset =
569 cpu_to_le64(adapter->ctx_desc_phys_addr + 619 cpu_to_le64(recv_ctx->phys_addr +
570 sizeof(struct netxen_ring_ctx)); 620 sizeof(struct netxen_ring_ctx));
571 adapter->cmd_consumer = 621 tx_ring->hw_consumer =
572 (__le32 *)(((char *)addr) + sizeof(struct netxen_ring_ctx)); 622 (__le32 *)(((char *)addr) + sizeof(struct netxen_ring_ctx));
573 623
574 /* cmd desc ring */ 624 /* cmd desc ring */
575 addr = pci_alloc_consistent(pdev, 625 addr = pci_alloc_consistent(pdev, TX_DESC_RINGSIZE(tx_ring),
576 TX_DESC_RINGSIZE(adapter), 626 &tx_ring->phys_addr);
577 &hw->cmd_desc_phys_addr);
578 627
579 if (addr == NULL) { 628 if (addr == NULL) {
580 dev_err(&pdev->dev, "%s: failed to allocate tx desc ring\n", 629 dev_err(&pdev->dev, "%s: failed to allocate tx desc ring\n",
@@ -582,9 +631,7 @@ int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
582 return -ENOMEM; 631 return -ENOMEM;
583 } 632 }
584 633
585 hw->cmd_desc_head = (struct cmd_desc_type0 *)addr; 634 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
586
587 recv_ctx = &adapter->recv_ctx;
588 635
589 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 636 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
590 rds_ring = &recv_ctx->rds_rings[ring]; 637 rds_ring = &recv_ctx->rds_rings[ring];
@@ -602,8 +649,7 @@ int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
602 649
603 if (adapter->fw_major < 4) 650 if (adapter->fw_major < 4)
604 rds_ring->crb_rcv_producer = 651 rds_ring->crb_rcv_producer =
605 recv_crb_registers[adapter->portnum]. 652 recv_crb_registers[port].crb_rcv_producer[ring];
606 crb_rcv_producer[ring];
607 } 653 }
608 654
609 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 655 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
@@ -620,13 +666,16 @@ int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
620 goto err_out_free; 666 goto err_out_free;
621 } 667 }
622 sds_ring->desc_head = (struct status_desc *)addr; 668 sds_ring->desc_head = (struct status_desc *)addr;
669
670 sds_ring->crb_sts_consumer =
671 recv_crb_registers[port].crb_sts_consumer[ring];
672
673 sds_ring->crb_intr_mask =
674 recv_crb_registers[port].sw_int_mask[ring];
623 } 675 }
624 676
625 677
626 if (adapter->fw_major >= 4) { 678 if (adapter->fw_major >= 4) {
627 adapter->intr_scheme = INTR_SCHEME_PERPORT;
628 adapter->msi_mode = MSI_MODE_MULTIFUNC;
629
630 err = nx_fw_cmd_create_rx_ctx(adapter); 679 err = nx_fw_cmd_create_rx_ctx(adapter);
631 if (err) 680 if (err)
632 goto err_out_free; 681 goto err_out_free;
@@ -634,23 +683,11 @@ int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
634 if (err) 683 if (err)
635 goto err_out_free; 684 goto err_out_free;
636 } else { 685 } else {
637 sds_ring = &recv_ctx->sds_rings[0];
638 sds_ring->crb_sts_consumer =
639 recv_crb_registers[adapter->portnum].crb_sts_consumer;
640
641 adapter->intr_scheme = adapter->pci_read_normalize(adapter,
642 CRB_NIC_CAPABILITIES_FW);
643 adapter->msi_mode = adapter->pci_read_normalize(adapter,
644 CRB_NIC_MSI_MODE_FW);
645 recv_ctx->sds_rings[0].crb_intr_mask =
646 sw_int_mask[adapter->portnum];
647
648 err = netxen_init_old_ctx(adapter); 686 err = netxen_init_old_ctx(adapter);
649 if (err) { 687 if (err) {
650 netxen_free_hw_resources(adapter); 688 netxen_free_hw_resources(adapter);
651 return err; 689 return err;
652 } 690 }
653
654 } 691 }
655 692
656 return 0; 693 return 0;
@@ -665,32 +702,40 @@ void netxen_free_hw_resources(struct netxen_adapter *adapter)
665 struct netxen_recv_context *recv_ctx; 702 struct netxen_recv_context *recv_ctx;
666 struct nx_host_rds_ring *rds_ring; 703 struct nx_host_rds_ring *rds_ring;
667 struct nx_host_sds_ring *sds_ring; 704 struct nx_host_sds_ring *sds_ring;
705 struct nx_host_tx_ring *tx_ring;
668 int ring; 706 int ring;
669 707
708 int port = adapter->portnum;
709
670 if (adapter->fw_major >= 4) { 710 if (adapter->fw_major >= 4) {
671 nx_fw_cmd_destroy_tx_ctx(adapter); 711 nx_fw_cmd_destroy_tx_ctx(adapter);
672 nx_fw_cmd_destroy_rx_ctx(adapter); 712 nx_fw_cmd_destroy_rx_ctx(adapter);
713 } else {
714 netxen_api_lock(adapter);
715 NXWR32(adapter, CRB_CTX_SIGNATURE_REG(port),
716 NETXEN_CTX_RESET | port);
717 netxen_api_unlock(adapter);
673 } 718 }
674 719
675 if (adapter->ctx_desc != NULL) { 720 recv_ctx = &adapter->recv_ctx;
721
722 if (recv_ctx->hwctx != NULL) {
676 pci_free_consistent(adapter->pdev, 723 pci_free_consistent(adapter->pdev,
677 sizeof(struct netxen_ring_ctx) + 724 sizeof(struct netxen_ring_ctx) +
678 sizeof(uint32_t), 725 sizeof(uint32_t),
679 adapter->ctx_desc, 726 recv_ctx->hwctx,
680 adapter->ctx_desc_phys_addr); 727 recv_ctx->phys_addr);
681 adapter->ctx_desc = NULL; 728 recv_ctx->hwctx = NULL;
682 } 729 }
683 730
684 if (adapter->ahw.cmd_desc_head != NULL) { 731 tx_ring = adapter->tx_ring;
732 if (tx_ring->desc_head != NULL) {
685 pci_free_consistent(adapter->pdev, 733 pci_free_consistent(adapter->pdev,
686 sizeof(struct cmd_desc_type0) * 734 TX_DESC_RINGSIZE(tx_ring),
687 adapter->num_txd, 735 tx_ring->desc_head, tx_ring->phys_addr);
688 adapter->ahw.cmd_desc_head, 736 tx_ring->desc_head = NULL;
689 adapter->ahw.cmd_desc_phys_addr);
690 adapter->ahw.cmd_desc_head = NULL;
691 } 737 }
692 738
693 recv_ctx = &adapter->recv_ctx;
694 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 739 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
695 rds_ring = &recv_ctx->rds_rings[ring]; 740 rds_ring = &recv_ctx->rds_rings[ring];
696 741
diff --git a/drivers/net/netxen/netxen_nic_ethtool.c b/drivers/net/netxen/netxen_nic_ethtool.c
index a677ff895184..e16ea46c24b8 100644
--- a/drivers/net/netxen/netxen_nic_ethtool.c
+++ b/drivers/net/netxen/netxen_nic_ethtool.c
@@ -30,7 +30,6 @@
30 30
31#include <linux/types.h> 31#include <linux/types.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <asm/uaccess.h>
34#include <linux/pci.h> 33#include <linux/pci.h>
35#include <asm/io.h> 34#include <asm/io.h>
36#include <linux/netdevice.h> 35#include <linux/netdevice.h>
@@ -53,13 +52,9 @@ struct netxen_nic_stats {
53#define NETXEN_NIC_INVALID_DATA 0xDEADBEEF 52#define NETXEN_NIC_INVALID_DATA 0xDEADBEEF
54 53
55static const struct netxen_nic_stats netxen_nic_gstrings_stats[] = { 54static const struct netxen_nic_stats netxen_nic_gstrings_stats[] = {
56 {"rcvd_bad_skb", NETXEN_NIC_STAT(stats.rcvdbadskb)},
57 {"xmit_called", NETXEN_NIC_STAT(stats.xmitcalled)}, 55 {"xmit_called", NETXEN_NIC_STAT(stats.xmitcalled)},
58 {"xmited_frames", NETXEN_NIC_STAT(stats.xmitedframes)},
59 {"xmit_finished", NETXEN_NIC_STAT(stats.xmitfinished)}, 56 {"xmit_finished", NETXEN_NIC_STAT(stats.xmitfinished)},
60 {"bad_skb_len", NETXEN_NIC_STAT(stats.badskblen)}, 57 {"rx_dropped", NETXEN_NIC_STAT(stats.rxdropped)},
61 {"no_cmd_desc", NETXEN_NIC_STAT(stats.nocmddescriptor)},
62 {"polled", NETXEN_NIC_STAT(stats.polled)},
63 {"tx_dropped", NETXEN_NIC_STAT(stats.txdropped)}, 58 {"tx_dropped", NETXEN_NIC_STAT(stats.txdropped)},
64 {"csummed", NETXEN_NIC_STAT(stats.csummed)}, 59 {"csummed", NETXEN_NIC_STAT(stats.csummed)},
65 {"no_rcv", NETXEN_NIC_STAT(stats.no_rcv)}, 60 {"no_rcv", NETXEN_NIC_STAT(stats.no_rcv)},
@@ -97,12 +92,9 @@ netxen_nic_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
97 strncpy(drvinfo->driver, netxen_nic_driver_name, 32); 92 strncpy(drvinfo->driver, netxen_nic_driver_name, 32);
98 strncpy(drvinfo->version, NETXEN_NIC_LINUX_VERSIONID, 32); 93 strncpy(drvinfo->version, NETXEN_NIC_LINUX_VERSIONID, 32);
99 write_lock_irqsave(&adapter->adapter_lock, flags); 94 write_lock_irqsave(&adapter->adapter_lock, flags);
100 fw_major = adapter->pci_read_normalize(adapter, 95 fw_major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
101 NETXEN_FW_VERSION_MAJOR); 96 fw_minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
102 fw_minor = adapter->pci_read_normalize(adapter, 97 fw_build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
103 NETXEN_FW_VERSION_MINOR);
104 fw_build = adapter->pci_read_normalize(adapter,
105 NETXEN_FW_VERSION_SUB);
106 write_unlock_irqrestore(&adapter->adapter_lock, flags); 98 write_unlock_irqrestore(&adapter->adapter_lock, flags);
107 sprintf(drvinfo->fw_version, "%d.%d.%d", fw_major, fw_minor, fw_build); 99 sprintf(drvinfo->fw_version, "%d.%d.%d", fw_major, fw_minor, fw_build);
108 100
@@ -115,6 +107,7 @@ static int
115netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) 107netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
116{ 108{
117 struct netxen_adapter *adapter = netdev_priv(dev); 109 struct netxen_adapter *adapter = netdev_priv(dev);
110 int check_sfp_module = 0;
118 111
119 /* read which mode */ 112 /* read which mode */
120 if (adapter->ahw.port_type == NETXEN_NIC_GBE) { 113 if (adapter->ahw.port_type == NETXEN_NIC_GBE) {
@@ -139,7 +132,7 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
139 } else if (adapter->ahw.port_type == NETXEN_NIC_XGBE) { 132 } else if (adapter->ahw.port_type == NETXEN_NIC_XGBE) {
140 u32 val; 133 u32 val;
141 134
142 adapter->hw_read_wx(adapter, NETXEN_PORT_MODE_ADDR, &val, 4); 135 val = NXRD32(adapter, NETXEN_PORT_MODE_ADDR);
143 if (val == NETXEN_PORT_MODE_802_3_AP) { 136 if (val == NETXEN_PORT_MODE_802_3_AP) {
144 ecmd->supported = SUPPORTED_1000baseT_Full; 137 ecmd->supported = SUPPORTED_1000baseT_Full;
145 ecmd->advertising = ADVERTISED_1000baseT_Full; 138 ecmd->advertising = ADVERTISED_1000baseT_Full;
@@ -148,13 +141,19 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
148 ecmd->advertising = ADVERTISED_10000baseT_Full; 141 ecmd->advertising = ADVERTISED_10000baseT_Full;
149 } 142 }
150 143
144 if (netif_running(dev) && adapter->has_link_events) {
145 ecmd->speed = adapter->link_speed;
146 ecmd->autoneg = adapter->link_autoneg;
147 ecmd->duplex = adapter->link_duplex;
148 goto skip;
149 }
150
151 ecmd->port = PORT_TP; 151 ecmd->port = PORT_TP;
152 152
153 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 153 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
154 u16 pcifn = adapter->ahw.pci_func; 154 u16 pcifn = adapter->ahw.pci_func;
155 155
156 adapter->hw_read_wx(adapter, 156 val = NXRD32(adapter, P3_LINK_SPEED_REG(pcifn));
157 P3_LINK_SPEED_REG(pcifn), &val, 4);
158 ecmd->speed = P3_LINK_SPEED_MHZ * 157 ecmd->speed = P3_LINK_SPEED_MHZ *
159 P3_LINK_SPEED_VAL(pcifn, val); 158 P3_LINK_SPEED_VAL(pcifn, val);
160 } else 159 } else
@@ -165,10 +164,11 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
165 } else 164 } else
166 return -EIO; 165 return -EIO;
167 166
167skip:
168 ecmd->phy_address = adapter->physical_port; 168 ecmd->phy_address = adapter->physical_port;
169 ecmd->transceiver = XCVR_EXTERNAL; 169 ecmd->transceiver = XCVR_EXTERNAL;
170 170
171 switch ((netxen_brdtype_t)adapter->ahw.board_type) { 171 switch (adapter->ahw.board_type) {
172 case NETXEN_BRDTYPE_P2_SB35_4G: 172 case NETXEN_BRDTYPE_P2_SB35_4G:
173 case NETXEN_BRDTYPE_P2_SB31_2G: 173 case NETXEN_BRDTYPE_P2_SB31_2G:
174 case NETXEN_BRDTYPE_P3_REF_QG: 174 case NETXEN_BRDTYPE_P3_REF_QG:
@@ -195,7 +195,7 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
195 case NETXEN_BRDTYPE_P3_HMEZ: 195 case NETXEN_BRDTYPE_P3_HMEZ:
196 ecmd->supported |= SUPPORTED_MII; 196 ecmd->supported |= SUPPORTED_MII;
197 ecmd->advertising |= ADVERTISED_MII; 197 ecmd->advertising |= ADVERTISED_MII;
198 ecmd->port = PORT_FIBRE; 198 ecmd->port = PORT_MII;
199 ecmd->autoneg = AUTONEG_DISABLE; 199 ecmd->autoneg = AUTONEG_DISABLE;
200 break; 200 break;
201 case NETXEN_BRDTYPE_P3_10G_SFP_PLUS: 201 case NETXEN_BRDTYPE_P3_10G_SFP_PLUS:
@@ -203,6 +203,8 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
203 case NETXEN_BRDTYPE_P3_10G_SFP_QT: 203 case NETXEN_BRDTYPE_P3_10G_SFP_QT:
204 ecmd->advertising |= ADVERTISED_TP; 204 ecmd->advertising |= ADVERTISED_TP;
205 ecmd->supported |= SUPPORTED_TP; 205 ecmd->supported |= SUPPORTED_TP;
206 check_sfp_module = netif_running(dev) &&
207 adapter->has_link_events;
206 case NETXEN_BRDTYPE_P2_SB31_10G: 208 case NETXEN_BRDTYPE_P2_SB31_10G:
207 case NETXEN_BRDTYPE_P3_10G_XFP: 209 case NETXEN_BRDTYPE_P3_10G_XFP:
208 ecmd->supported |= SUPPORTED_FIBRE; 210 ecmd->supported |= SUPPORTED_FIBRE;
@@ -217,6 +219,8 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
217 ecmd->advertising |= 219 ecmd->advertising |=
218 (ADVERTISED_FIBRE | ADVERTISED_TP); 220 (ADVERTISED_FIBRE | ADVERTISED_TP);
219 ecmd->port = PORT_FIBRE; 221 ecmd->port = PORT_FIBRE;
222 check_sfp_module = netif_running(dev) &&
223 adapter->has_link_events;
220 } else { 224 } else {
221 ecmd->autoneg = AUTONEG_ENABLE; 225 ecmd->autoneg = AUTONEG_ENABLE;
222 ecmd->supported |= (SUPPORTED_TP |SUPPORTED_Autoneg); 226 ecmd->supported |= (SUPPORTED_TP |SUPPORTED_Autoneg);
@@ -227,10 +231,28 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
227 break; 231 break;
228 default: 232 default:
229 printk(KERN_ERR "netxen-nic: Unsupported board model %d\n", 233 printk(KERN_ERR "netxen-nic: Unsupported board model %d\n",
230 (netxen_brdtype_t)adapter->ahw.board_type); 234 adapter->ahw.board_type);
231 return -EIO; 235 return -EIO;
232 } 236 }
233 237
238 if (check_sfp_module) {
239 switch (adapter->module_type) {
240 case LINKEVENT_MODULE_OPTICAL_UNKNOWN:
241 case LINKEVENT_MODULE_OPTICAL_SRLR:
242 case LINKEVENT_MODULE_OPTICAL_LRM:
243 case LINKEVENT_MODULE_OPTICAL_SFP_1G:
244 ecmd->port = PORT_FIBRE;
245 break;
246 case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE:
247 case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN:
248 case LINKEVENT_MODULE_TWINAX:
249 ecmd->port = PORT_TP;
250 break;
251 default:
252 ecmd->port = -1;
253 }
254 }
255
234 return 0; 256 return 0;
235} 257}
236 258
@@ -398,12 +420,11 @@ netxen_nic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
398 regs->version = (1 << 24) | (adapter->ahw.revision_id << 16) | 420 regs->version = (1 << 24) | (adapter->ahw.revision_id << 16) |
399 (adapter->pdev)->device; 421 (adapter->pdev)->device;
400 /* which mode */ 422 /* which mode */
401 adapter->hw_read_wx(adapter, NETXEN_NIU_MODE, &regs_buff[0], 4); 423 regs_buff[0] = NXRD32(adapter, NETXEN_NIU_MODE);
402 mode = regs_buff[0]; 424 mode = regs_buff[0];
403 425
404 /* Common registers to all the modes */ 426 /* Common registers to all the modes */
405 adapter->hw_read_wx(adapter, 427 regs_buff[2] = NXRD32(adapter, NETXEN_NIU_STRAP_VALUE_SAVE_HIGHER);
406 NETXEN_NIU_STRAP_VALUE_SAVE_HIGHER, &regs_buff[2], 4);
407 /* GB/XGB Mode */ 428 /* GB/XGB Mode */
408 mode = (mode / 2) - 1; 429 mode = (mode / 2) - 1;
409 window = 0; 430 window = 0;
@@ -414,9 +435,8 @@ netxen_nic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
414 window = adapter->physical_port * 435 window = adapter->physical_port *
415 NETXEN_NIC_PORT_WINDOW; 436 NETXEN_NIC_PORT_WINDOW;
416 437
417 adapter->hw_read_wx(adapter, 438 regs_buff[i] = NXRD32(adapter,
418 niu_registers[mode].reg[i - 3] + window, 439 niu_registers[mode].reg[i - 3] + window);
419 &regs_buff[i], 4);
420 } 440 }
421 441
422 } 442 }
@@ -440,7 +460,7 @@ static u32 netxen_nic_test_link(struct net_device *dev)
440 return !val; 460 return !val;
441 } 461 }
442 } else if (adapter->ahw.port_type == NETXEN_NIC_XGBE) { 462 } else if (adapter->ahw.port_type == NETXEN_NIC_XGBE) {
443 val = adapter->pci_read_normalize(adapter, CRB_XG_STATE); 463 val = NXRD32(adapter, CRB_XG_STATE);
444 return (val == XG_LINK_UP) ? 0 : 1; 464 return (val == XG_LINK_UP) ? 0 : 1;
445 } 465 }
446 return -EIO; 466 return -EIO;
@@ -504,10 +524,9 @@ netxen_nic_get_pauseparam(struct net_device *dev,
504 if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS)) 524 if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS))
505 return; 525 return;
506 /* get flow control settings */ 526 /* get flow control settings */
507 netxen_nic_read_w0(adapter,NETXEN_NIU_GB_MAC_CONFIG_0(port), 527 val = NXRD32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port));
508 &val);
509 pause->rx_pause = netxen_gb_get_rx_flowctl(val); 528 pause->rx_pause = netxen_gb_get_rx_flowctl(val);
510 netxen_nic_read_w0(adapter, NETXEN_NIU_GB_PAUSE_CTL, &val); 529 val = NXRD32(adapter, NETXEN_NIU_GB_PAUSE_CTL);
511 switch (port) { 530 switch (port) {
512 case 0: 531 case 0:
513 pause->tx_pause = !(netxen_gb_get_gb0_mask(val)); 532 pause->tx_pause = !(netxen_gb_get_gb0_mask(val));
@@ -527,7 +546,7 @@ netxen_nic_get_pauseparam(struct net_device *dev,
527 if ((port < 0) || (port > NETXEN_NIU_MAX_XG_PORTS)) 546 if ((port < 0) || (port > NETXEN_NIU_MAX_XG_PORTS))
528 return; 547 return;
529 pause->rx_pause = 1; 548 pause->rx_pause = 1;
530 netxen_nic_read_w0(adapter, NETXEN_NIU_XG_PAUSE_CTL, &val); 549 val = NXRD32(adapter, NETXEN_NIU_XG_PAUSE_CTL);
531 if (port == 0) 550 if (port == 0)
532 pause->tx_pause = !(netxen_xg_get_xg0_mask(val)); 551 pause->tx_pause = !(netxen_xg_get_xg0_mask(val));
533 else 552 else
@@ -550,18 +569,17 @@ netxen_nic_set_pauseparam(struct net_device *dev,
550 if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS)) 569 if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS))
551 return -EIO; 570 return -EIO;
552 /* set flow control */ 571 /* set flow control */
553 netxen_nic_read_w0(adapter, 572 val = NXRD32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port));
554 NETXEN_NIU_GB_MAC_CONFIG_0(port), &val);
555 573
556 if (pause->rx_pause) 574 if (pause->rx_pause)
557 netxen_gb_rx_flowctl(val); 575 netxen_gb_rx_flowctl(val);
558 else 576 else
559 netxen_gb_unset_rx_flowctl(val); 577 netxen_gb_unset_rx_flowctl(val);
560 578
561 netxen_nic_write_w0(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 579 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
562 val); 580 val);
563 /* set autoneg */ 581 /* set autoneg */
564 netxen_nic_read_w0(adapter, NETXEN_NIU_GB_PAUSE_CTL, &val); 582 val = NXRD32(adapter, NETXEN_NIU_GB_PAUSE_CTL);
565 switch (port) { 583 switch (port) {
566 case 0: 584 case 0:
567 if (pause->tx_pause) 585 if (pause->tx_pause)
@@ -589,11 +607,11 @@ netxen_nic_set_pauseparam(struct net_device *dev,
589 netxen_gb_set_gb3_mask(val); 607 netxen_gb_set_gb3_mask(val);
590 break; 608 break;
591 } 609 }
592 netxen_nic_write_w0(adapter, NETXEN_NIU_GB_PAUSE_CTL, val); 610 NXWR32(adapter, NETXEN_NIU_GB_PAUSE_CTL, val);
593 } else if (adapter->ahw.port_type == NETXEN_NIC_XGBE) { 611 } else if (adapter->ahw.port_type == NETXEN_NIC_XGBE) {
594 if ((port < 0) || (port > NETXEN_NIU_MAX_XG_PORTS)) 612 if ((port < 0) || (port > NETXEN_NIU_MAX_XG_PORTS))
595 return -EIO; 613 return -EIO;
596 netxen_nic_read_w0(adapter, NETXEN_NIU_XG_PAUSE_CTL, &val); 614 val = NXRD32(adapter, NETXEN_NIU_XG_PAUSE_CTL);
597 if (port == 0) { 615 if (port == 0) {
598 if (pause->tx_pause) 616 if (pause->tx_pause)
599 netxen_xg_unset_xg0_mask(val); 617 netxen_xg_unset_xg0_mask(val);
@@ -605,7 +623,7 @@ netxen_nic_set_pauseparam(struct net_device *dev,
605 else 623 else
606 netxen_xg_set_xg1_mask(val); 624 netxen_xg_set_xg1_mask(val);
607 } 625 }
608 netxen_nic_write_w0(adapter, NETXEN_NIU_XG_PAUSE_CTL, val); 626 NXWR32(adapter, NETXEN_NIU_XG_PAUSE_CTL, val);
609 } else { 627 } else {
610 printk(KERN_ERR "%s: Unknown board type: %x\n", 628 printk(KERN_ERR "%s: Unknown board type: %x\n",
611 netxen_nic_driver_name, 629 netxen_nic_driver_name,
@@ -619,14 +637,14 @@ static int netxen_nic_reg_test(struct net_device *dev)
619 struct netxen_adapter *adapter = netdev_priv(dev); 637 struct netxen_adapter *adapter = netdev_priv(dev);
620 u32 data_read, data_written; 638 u32 data_read, data_written;
621 639
622 netxen_nic_read_w0(adapter, NETXEN_PCIX_PH_REG(0), &data_read); 640 data_read = NXRD32(adapter, NETXEN_PCIX_PH_REG(0));
623 if ((data_read & 0xffff) != PHAN_VENDOR_ID) 641 if ((data_read & 0xffff) != PHAN_VENDOR_ID)
624 return 1; 642 return 1;
625 643
626 data_written = (u32)0xa5a5a5a5; 644 data_written = (u32)0xa5a5a5a5;
627 645
628 netxen_nic_reg_write(adapter, CRB_SCRATCHPAD_TEST, data_written); 646 NXWR32(adapter, CRB_SCRATCHPAD_TEST, data_written);
629 data_read = adapter->pci_read_normalize(adapter, CRB_SCRATCHPAD_TEST); 647 data_read = NXRD32(adapter, CRB_SCRATCHPAD_TEST);
630 if (data_written != data_read) 648 if (data_written != data_read)
631 return 1; 649 return 1;
632 650
@@ -743,11 +761,11 @@ netxen_nic_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
743 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 761 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
744 return; 762 return;
745 763
746 wol_cfg = netxen_nic_reg_read(adapter, NETXEN_WOL_CONFIG_NV); 764 wol_cfg = NXRD32(adapter, NETXEN_WOL_CONFIG_NV);
747 if (wol_cfg & (1UL << adapter->portnum)) 765 if (wol_cfg & (1UL << adapter->portnum))
748 wol->supported |= WAKE_MAGIC; 766 wol->supported |= WAKE_MAGIC;
749 767
750 wol_cfg = netxen_nic_reg_read(adapter, NETXEN_WOL_CONFIG); 768 wol_cfg = NXRD32(adapter, NETXEN_WOL_CONFIG);
751 if (wol_cfg & (1UL << adapter->portnum)) 769 if (wol_cfg & (1UL << adapter->portnum))
752 wol->wolopts |= WAKE_MAGIC; 770 wol->wolopts |= WAKE_MAGIC;
753} 771}
@@ -764,16 +782,16 @@ netxen_nic_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
764 if (wol->wolopts & ~WAKE_MAGIC) 782 if (wol->wolopts & ~WAKE_MAGIC)
765 return -EOPNOTSUPP; 783 return -EOPNOTSUPP;
766 784
767 wol_cfg = netxen_nic_reg_read(adapter, NETXEN_WOL_CONFIG_NV); 785 wol_cfg = NXRD32(adapter, NETXEN_WOL_CONFIG_NV);
768 if (!(wol_cfg & (1 << adapter->portnum))) 786 if (!(wol_cfg & (1 << adapter->portnum)))
769 return -EOPNOTSUPP; 787 return -EOPNOTSUPP;
770 788
771 wol_cfg = netxen_nic_reg_read(adapter, NETXEN_WOL_CONFIG); 789 wol_cfg = NXRD32(adapter, NETXEN_WOL_CONFIG);
772 if (wol->wolopts & WAKE_MAGIC) 790 if (wol->wolopts & WAKE_MAGIC)
773 wol_cfg |= 1UL << adapter->portnum; 791 wol_cfg |= 1UL << adapter->portnum;
774 else 792 else
775 wol_cfg &= ~(1UL << adapter->portnum); 793 wol_cfg &= ~(1UL << adapter->portnum);
776 netxen_nic_reg_write(adapter, NETXEN_WOL_CONFIG, wol_cfg); 794 NXWR32(adapter, NETXEN_WOL_CONFIG, wol_cfg);
777 795
778 return 0; 796 return 0;
779} 797}
diff --git a/drivers/net/netxen/netxen_nic_hdr.h b/drivers/net/netxen/netxen_nic_hdr.h
index 016c62129c76..7f0ddbfa7b28 100644
--- a/drivers/net/netxen/netxen_nic_hdr.h
+++ b/drivers/net/netxen/netxen_nic_hdr.h
@@ -31,16 +31,8 @@
31#ifndef __NETXEN_NIC_HDR_H_ 31#ifndef __NETXEN_NIC_HDR_H_
32#define __NETXEN_NIC_HDR_H_ 32#define __NETXEN_NIC_HDR_H_
33 33
34#include <linux/module.h>
35#include <linux/kernel.h> 34#include <linux/kernel.h>
36#include <linux/spinlock.h>
37#include <asm/irq.h>
38#include <linux/init.h>
39#include <linux/errno.h>
40#include <linux/pci.h>
41#include <linux/types.h> 35#include <linux/types.h>
42#include <asm/uaccess.h>
43#include <asm/string.h> /* for memset */
44 36
45/* 37/*
46 * The basic unit of access when reading/writing control registers. 38 * The basic unit of access when reading/writing control registers.
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index 5026811c04ce..42ffb825ebf1 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -32,7 +32,6 @@
32#include "netxen_nic_hw.h" 32#include "netxen_nic_hw.h"
33#include "netxen_nic_phan_reg.h" 33#include "netxen_nic_phan_reg.h"
34 34
35#include <linux/firmware.h>
36#include <net/ip.h> 35#include <net/ip.h>
37 36
38#define MASK(n) ((1ULL<<(n))-1) 37#define MASK(n) ((1ULL<<(n))-1)
@@ -48,8 +47,49 @@
48#define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000)) 47#define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
49#define CRB_INDIRECT_2M (0x1e0000UL) 48#define CRB_INDIRECT_2M (0x1e0000UL)
50 49
50#ifndef readq
51static inline u64 readq(void __iomem *addr)
52{
53 return readl(addr) | (((u64) readl(addr + 4)) << 32LL);
54}
55#endif
56
57#ifndef writeq
58static inline void writeq(u64 val, void __iomem *addr)
59{
60 writel(((u32) (val)), (addr));
61 writel(((u32) (val >> 32)), (addr + 4));
62}
63#endif
64
65#define ADDR_IN_RANGE(addr, low, high) \
66 (((addr) < (high)) && ((addr) >= (low)))
67
68#define PCI_OFFSET_FIRST_RANGE(adapter, off) \
69 ((adapter)->ahw.pci_base0 + (off))
70#define PCI_OFFSET_SECOND_RANGE(adapter, off) \
71 ((adapter)->ahw.pci_base1 + (off) - SECOND_PAGE_GROUP_START)
72#define PCI_OFFSET_THIRD_RANGE(adapter, off) \
73 ((adapter)->ahw.pci_base2 + (off) - THIRD_PAGE_GROUP_START)
74
75static void __iomem *pci_base_offset(struct netxen_adapter *adapter,
76 unsigned long off)
77{
78 if (ADDR_IN_RANGE(off, FIRST_PAGE_GROUP_START, FIRST_PAGE_GROUP_END))
79 return PCI_OFFSET_FIRST_RANGE(adapter, off);
80
81 if (ADDR_IN_RANGE(off, SECOND_PAGE_GROUP_START, SECOND_PAGE_GROUP_END))
82 return PCI_OFFSET_SECOND_RANGE(adapter, off);
83
84 if (ADDR_IN_RANGE(off, THIRD_PAGE_GROUP_START, THIRD_PAGE_GROUP_END))
85 return PCI_OFFSET_THIRD_RANGE(adapter, off);
86
87 return NULL;
88}
89
51#define CRB_WIN_LOCK_TIMEOUT 100000000 90#define CRB_WIN_LOCK_TIMEOUT 100000000
52static crb_128M_2M_block_map_t crb_128M_2M_map[64] = { 91static crb_128M_2M_block_map_t
92crb_128M_2M_map[64] __cacheline_aligned_in_smp = {
53 {{{0, 0, 0, 0} } }, /* 0: PCI */ 93 {{{0, 0, 0, 0} } }, /* 0: PCI */
54 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */ 94 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
55 {1, 0x0110000, 0x0120000, 0x130000}, 95 {1, 0x0110000, 0x0120000, 0x130000},
@@ -279,39 +319,8 @@ static unsigned crb_hub_agt[64] =
279 319
280/* PCI Windowing for DDR regions. */ 320/* PCI Windowing for DDR regions. */
281 321
282#define ADDR_IN_RANGE(addr, low, high) \
283 (((addr) <= (high)) && ((addr) >= (low)))
284
285#define NETXEN_WINDOW_ONE 0x2000000 /*CRB Window: bit 25 of CRB address */ 322#define NETXEN_WINDOW_ONE 0x2000000 /*CRB Window: bit 25 of CRB address */
286 323
287#define NETXEN_NIC_ZERO_PAUSE_ADDR 0ULL
288#define NETXEN_NIC_UNIT_PAUSE_ADDR 0x200ULL
289#define NETXEN_NIC_EPG_PAUSE_ADDR1 0x2200010000c28001ULL
290#define NETXEN_NIC_EPG_PAUSE_ADDR2 0x0100088866554433ULL
291
292#define NETXEN_NIC_WINDOW_MARGIN 0x100000
293
294int netxen_nic_set_mac(struct net_device *netdev, void *p)
295{
296 struct netxen_adapter *adapter = netdev_priv(netdev);
297 struct sockaddr *addr = p;
298
299 if (netif_running(netdev))
300 return -EBUSY;
301
302 if (!is_valid_ether_addr(addr->sa_data))
303 return -EADDRNOTAVAIL;
304
305 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
306
307 /* For P3, MAC addr is not set in NIU */
308 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
309 if (adapter->macaddr_set)
310 adapter->macaddr_set(adapter, addr->sa_data);
311
312 return 0;
313}
314
315#define NETXEN_UNICAST_ADDR(port, index) \ 324#define NETXEN_UNICAST_ADDR(port, index) \
316 (NETXEN_UNICAST_ADDR_BASE+(port*32)+(index*8)) 325 (NETXEN_UNICAST_ADDR_BASE+(port*32)+(index*8))
317#define NETXEN_MCAST_ADDR(port, index) \ 326#define NETXEN_MCAST_ADDR(port, index) \
@@ -331,22 +340,20 @@ netxen_nic_enable_mcast_filter(struct netxen_adapter *adapter)
331 if (adapter->mc_enabled) 340 if (adapter->mc_enabled)
332 return 0; 341 return 0;
333 342
334 adapter->hw_read_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4); 343 val = NXRD32(adapter, NETXEN_MAC_ADDR_CNTL_REG);
335 val |= (1UL << (28+port)); 344 val |= (1UL << (28+port));
336 adapter->hw_write_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4); 345 NXWR32(adapter, NETXEN_MAC_ADDR_CNTL_REG, val);
337 346
338 /* add broadcast addr to filter */ 347 /* add broadcast addr to filter */
339 val = 0xffffff; 348 val = 0xffffff;
340 netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 0), val); 349 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 0), val);
341 netxen_crb_writelit_adapter(adapter, 350 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 0)+4, val);
342 NETXEN_UNICAST_ADDR(port, 0)+4, val);
343 351
344 /* add station addr to filter */ 352 /* add station addr to filter */
345 val = MAC_HI(addr); 353 val = MAC_HI(addr);
346 netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 1), val); 354 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 1), val);
347 val = MAC_LO(addr); 355 val = MAC_LO(addr);
348 netxen_crb_writelit_adapter(adapter, 356 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 1)+4, val);
349 NETXEN_UNICAST_ADDR(port, 1)+4, val);
350 357
351 adapter->mc_enabled = 1; 358 adapter->mc_enabled = 1;
352 return 0; 359 return 0;
@@ -362,18 +369,17 @@ netxen_nic_disable_mcast_filter(struct netxen_adapter *adapter)
362 if (!adapter->mc_enabled) 369 if (!adapter->mc_enabled)
363 return 0; 370 return 0;
364 371
365 adapter->hw_read_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4); 372 val = NXRD32(adapter, NETXEN_MAC_ADDR_CNTL_REG);
366 val &= ~(1UL << (28+port)); 373 val &= ~(1UL << (28+port));
367 adapter->hw_write_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4); 374 NXWR32(adapter, NETXEN_MAC_ADDR_CNTL_REG, val);
368 375
369 val = MAC_HI(addr); 376 val = MAC_HI(addr);
370 netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 0), val); 377 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 0), val);
371 val = MAC_LO(addr); 378 val = MAC_LO(addr);
372 netxen_crb_writelit_adapter(adapter, 379 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 0)+4, val);
373 NETXEN_UNICAST_ADDR(port, 0)+4, val);
374 380
375 netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 1), 0); 381 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 1), 0);
376 netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 1)+4, 0); 382 NXWR32(adapter, NETXEN_UNICAST_ADDR(port, 1)+4, 0);
377 383
378 adapter->mc_enabled = 0; 384 adapter->mc_enabled = 0;
379 return 0; 385 return 0;
@@ -389,10 +395,8 @@ netxen_nic_set_mcast_addr(struct netxen_adapter *adapter,
389 lo = MAC_LO(addr); 395 lo = MAC_LO(addr);
390 hi = MAC_HI(addr); 396 hi = MAC_HI(addr);
391 397
392 netxen_crb_writelit_adapter(adapter, 398 NXWR32(adapter, NETXEN_MCAST_ADDR(port, index), hi);
393 NETXEN_MCAST_ADDR(port, index), hi); 399 NXWR32(adapter, NETXEN_MCAST_ADDR(port, index)+4, lo);
394 netxen_crb_writelit_adapter(adapter,
395 NETXEN_MCAST_ADDR(port, index)+4, lo);
396 400
397 return 0; 401 return 0;
398} 402}
@@ -445,100 +449,58 @@ void netxen_p2_nic_set_multi(struct net_device *netdev)
445 netxen_nic_set_mcast_addr(adapter, index, null_addr); 449 netxen_nic_set_mcast_addr(adapter, index, null_addr);
446} 450}
447 451
448static int nx_p3_nic_add_mac(struct netxen_adapter *adapter,
449 u8 *addr, nx_mac_list_t **add_list, nx_mac_list_t **del_list)
450{
451 nx_mac_list_t *cur, *prev;
452
453 /* if in del_list, move it to adapter->mac_list */
454 for (cur = *del_list, prev = NULL; cur;) {
455 if (memcmp(addr, cur->mac_addr, ETH_ALEN) == 0) {
456 if (prev == NULL)
457 *del_list = cur->next;
458 else
459 prev->next = cur->next;
460 cur->next = adapter->mac_list;
461 adapter->mac_list = cur;
462 return 0;
463 }
464 prev = cur;
465 cur = cur->next;
466 }
467
468 /* make sure to add each mac address only once */
469 for (cur = adapter->mac_list; cur; cur = cur->next) {
470 if (memcmp(addr, cur->mac_addr, ETH_ALEN) == 0)
471 return 0;
472 }
473 /* not in del_list, create new entry and add to add_list */
474 cur = kmalloc(sizeof(*cur), in_atomic()? GFP_ATOMIC : GFP_KERNEL);
475 if (cur == NULL) {
476 printk(KERN_ERR "%s: cannot allocate memory. MAC filtering may"
477 "not work properly from now.\n", __func__);
478 return -1;
479 }
480
481 memcpy(cur->mac_addr, addr, ETH_ALEN);
482 cur->next = *add_list;
483 *add_list = cur;
484 return 0;
485}
486
487static int 452static int
488netxen_send_cmd_descs(struct netxen_adapter *adapter, 453netxen_send_cmd_descs(struct netxen_adapter *adapter,
489 struct cmd_desc_type0 *cmd_desc_arr, int nr_elements) 454 struct cmd_desc_type0 *cmd_desc_arr, int nr_desc)
490{ 455{
491 uint32_t i, producer; 456 u32 i, producer, consumer;
492 struct netxen_cmd_buffer *pbuf; 457 struct netxen_cmd_buffer *pbuf;
493 struct cmd_desc_type0 *cmd_desc; 458 struct cmd_desc_type0 *cmd_desc;
494 459 struct nx_host_tx_ring *tx_ring;
495 if (nr_elements > MAX_PENDING_DESC_BLOCK_SIZE || nr_elements == 0) {
496 printk(KERN_WARNING "%s: Too many command descriptors in a "
497 "request\n", __func__);
498 return -EINVAL;
499 }
500 460
501 i = 0; 461 i = 0;
502 462
463 tx_ring = adapter->tx_ring;
503 netif_tx_lock_bh(adapter->netdev); 464 netif_tx_lock_bh(adapter->netdev);
504 465
505 producer = adapter->cmd_producer; 466 producer = tx_ring->producer;
467 consumer = tx_ring->sw_consumer;
468
469 if (nr_desc >= find_diff_among(producer, consumer, tx_ring->num_desc)) {
470 netif_tx_unlock_bh(adapter->netdev);
471 return -EBUSY;
472 }
473
506 do { 474 do {
507 cmd_desc = &cmd_desc_arr[i]; 475 cmd_desc = &cmd_desc_arr[i];
508 476
509 pbuf = &adapter->cmd_buf_arr[producer]; 477 pbuf = &tx_ring->cmd_buf_arr[producer];
510 pbuf->skb = NULL; 478 pbuf->skb = NULL;
511 pbuf->frag_count = 0; 479 pbuf->frag_count = 0;
512 480
513 /* adapter->ahw.cmd_desc_head[producer] = *cmd_desc; */ 481 memcpy(&tx_ring->desc_head[producer],
514 memcpy(&adapter->ahw.cmd_desc_head[producer],
515 &cmd_desc_arr[i], sizeof(struct cmd_desc_type0)); 482 &cmd_desc_arr[i], sizeof(struct cmd_desc_type0));
516 483
517 producer = get_next_index(producer, 484 producer = get_next_index(producer, tx_ring->num_desc);
518 adapter->num_txd);
519 i++; 485 i++;
520 486
521 } while (i != nr_elements); 487 } while (i != nr_desc);
522
523 adapter->cmd_producer = producer;
524 488
525 /* write producer index to start the xmit */ 489 tx_ring->producer = producer;
526 490
527 netxen_nic_update_cmd_producer(adapter, adapter->cmd_producer); 491 netxen_nic_update_cmd_producer(adapter, tx_ring, producer);
528 492
529 netif_tx_unlock_bh(adapter->netdev); 493 netif_tx_unlock_bh(adapter->netdev);
530 494
531 return 0; 495 return 0;
532} 496}
533 497
534static int nx_p3_sre_macaddr_change(struct net_device *dev, 498static int
535 u8 *addr, unsigned op) 499nx_p3_sre_macaddr_change(struct netxen_adapter *adapter, u8 *addr, unsigned op)
536{ 500{
537 struct netxen_adapter *adapter = netdev_priv(dev);
538 nx_nic_req_t req; 501 nx_nic_req_t req;
539 nx_mac_req_t *mac_req; 502 nx_mac_req_t *mac_req;
540 u64 word; 503 u64 word;
541 int rv;
542 504
543 memset(&req, 0, sizeof(nx_nic_req_t)); 505 memset(&req, 0, sizeof(nx_nic_req_t));
544 req.qhdr = cpu_to_le64(NX_NIC_REQUEST << 23); 506 req.qhdr = cpu_to_le64(NX_NIC_REQUEST << 23);
@@ -550,28 +512,51 @@ static int nx_p3_sre_macaddr_change(struct net_device *dev,
550 mac_req->op = op; 512 mac_req->op = op;
551 memcpy(mac_req->mac_addr, addr, 6); 513 memcpy(mac_req->mac_addr, addr, 6);
552 514
553 rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1); 515 return netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
554 if (rv != 0) { 516}
555 printk(KERN_ERR "ERROR. Could not send mac update\n"); 517
556 return rv; 518static int nx_p3_nic_add_mac(struct netxen_adapter *adapter,
519 u8 *addr, struct list_head *del_list)
520{
521 struct list_head *head;
522 nx_mac_list_t *cur;
523
524 /* look up if already exists */
525 list_for_each(head, del_list) {
526 cur = list_entry(head, nx_mac_list_t, list);
527
528 if (memcmp(addr, cur->mac_addr, ETH_ALEN) == 0) {
529 list_move_tail(head, &adapter->mac_list);
530 return 0;
531 }
557 } 532 }
558 533
559 return 0; 534 cur = kzalloc(sizeof(nx_mac_list_t), GFP_ATOMIC);
535 if (cur == NULL) {
536 printk(KERN_ERR "%s: failed to add mac address filter\n",
537 adapter->netdev->name);
538 return -ENOMEM;
539 }
540 memcpy(cur->mac_addr, addr, ETH_ALEN);
541 list_add_tail(&cur->list, &adapter->mac_list);
542 return nx_p3_sre_macaddr_change(adapter,
543 cur->mac_addr, NETXEN_MAC_ADD);
560} 544}
561 545
562void netxen_p3_nic_set_multi(struct net_device *netdev) 546void netxen_p3_nic_set_multi(struct net_device *netdev)
563{ 547{
564 struct netxen_adapter *adapter = netdev_priv(netdev); 548 struct netxen_adapter *adapter = netdev_priv(netdev);
565 nx_mac_list_t *cur, *next, *del_list, *add_list = NULL;
566 struct dev_mc_list *mc_ptr; 549 struct dev_mc_list *mc_ptr;
567 u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 550 u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
568 u32 mode = VPORT_MISS_MODE_DROP; 551 u32 mode = VPORT_MISS_MODE_DROP;
552 LIST_HEAD(del_list);
553 struct list_head *head;
554 nx_mac_list_t *cur;
569 555
570 del_list = adapter->mac_list; 556 list_splice_tail_init(&adapter->mac_list, &del_list);
571 adapter->mac_list = NULL;
572 557
573 nx_p3_nic_add_mac(adapter, netdev->dev_addr, &add_list, &del_list); 558 nx_p3_nic_add_mac(adapter, netdev->dev_addr, &del_list);
574 nx_p3_nic_add_mac(adapter, bcast_addr, &add_list, &del_list); 559 nx_p3_nic_add_mac(adapter, bcast_addr, &del_list);
575 560
576 if (netdev->flags & IFF_PROMISC) { 561 if (netdev->flags & IFF_PROMISC) {
577 mode = VPORT_MISS_MODE_ACCEPT_ALL; 562 mode = VPORT_MISS_MODE_ACCEPT_ALL;
@@ -587,25 +572,20 @@ void netxen_p3_nic_set_multi(struct net_device *netdev)
587 if (netdev->mc_count > 0) { 572 if (netdev->mc_count > 0) {
588 for (mc_ptr = netdev->mc_list; mc_ptr; 573 for (mc_ptr = netdev->mc_list; mc_ptr;
589 mc_ptr = mc_ptr->next) { 574 mc_ptr = mc_ptr->next) {
590 nx_p3_nic_add_mac(adapter, mc_ptr->dmi_addr, 575 nx_p3_nic_add_mac(adapter, mc_ptr->dmi_addr, &del_list);
591 &add_list, &del_list);
592 } 576 }
593 } 577 }
594 578
595send_fw_cmd: 579send_fw_cmd:
596 adapter->set_promisc(adapter, mode); 580 adapter->set_promisc(adapter, mode);
597 for (cur = del_list; cur;) { 581 head = &del_list;
598 nx_p3_sre_macaddr_change(netdev, cur->mac_addr, NETXEN_MAC_DEL); 582 while (!list_empty(head)) {
599 next = cur->next; 583 cur = list_entry(head->next, nx_mac_list_t, list);
584
585 nx_p3_sre_macaddr_change(adapter,
586 cur->mac_addr, NETXEN_MAC_DEL);
587 list_del(&cur->list);
600 kfree(cur); 588 kfree(cur);
601 cur = next;
602 }
603 for (cur = add_list; cur;) {
604 nx_p3_sre_macaddr_change(netdev, cur->mac_addr, NETXEN_MAC_ADD);
605 next = cur->next;
606 cur->next = adapter->mac_list;
607 adapter->mac_list = cur;
608 cur = next;
609 } 589 }
610} 590}
611 591
@@ -630,17 +610,25 @@ int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32 mode)
630 610
631void netxen_p3_free_mac_list(struct netxen_adapter *adapter) 611void netxen_p3_free_mac_list(struct netxen_adapter *adapter)
632{ 612{
633 nx_mac_list_t *cur, *next; 613 nx_mac_list_t *cur;
634 614 struct list_head *head = &adapter->mac_list;
635 cur = adapter->mac_list; 615
636 616 while (!list_empty(head)) {
637 while (cur) { 617 cur = list_entry(head->next, nx_mac_list_t, list);
638 next = cur->next; 618 nx_p3_sre_macaddr_change(adapter,
619 cur->mac_addr, NETXEN_MAC_DEL);
620 list_del(&cur->list);
639 kfree(cur); 621 kfree(cur);
640 cur = next;
641 } 622 }
642} 623}
643 624
625int netxen_p3_nic_set_mac_addr(struct netxen_adapter *adapter, u8 *addr)
626{
627 /* assuming caller has already copied new addr to netdev */
628 netxen_p3_nic_set_multi(adapter->netdev);
629 return 0;
630}
631
644#define NETXEN_CONFIG_INTR_COALESCE 3 632#define NETXEN_CONFIG_INTR_COALESCE 3
645 633
646/* 634/*
@@ -717,6 +705,28 @@ int netxen_config_rss(struct netxen_adapter *adapter, int enable)
717 return rv; 705 return rv;
718} 706}
719 707
708int netxen_linkevent_request(struct netxen_adapter *adapter, int enable)
709{
710 nx_nic_req_t req;
711 u64 word;
712 int rv;
713
714 memset(&req, 0, sizeof(nx_nic_req_t));
715 req.qhdr = cpu_to_le64(NX_HOST_REQUEST << 23);
716
717 word = NX_NIC_H2C_OPCODE_GET_LINKEVENT | ((u64)adapter->portnum << 16);
718 req.req_hdr = cpu_to_le64(word);
719 req.words[0] = cpu_to_le64(enable | (enable << 8));
720
721 rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
722 if (rv != 0) {
723 printk(KERN_ERR "%s: could not configure link notification\n",
724 adapter->netdev->name);
725 }
726
727 return rv;
728}
729
720/* 730/*
721 * netxen_nic_change_mtu - Change the Maximum Transfer Unit 731 * netxen_nic_change_mtu - Change the Maximum Transfer Unit
722 * @returns 0 on success, negative on failure 732 * @returns 0 on success, negative on failure
@@ -812,8 +822,8 @@ int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac)
812 crbaddr = CRB_MAC_BLOCK_START + 822 crbaddr = CRB_MAC_BLOCK_START +
813 (4 * ((pci_func/2) * 3)) + (4 * (pci_func & 1)); 823 (4 * ((pci_func/2) * 3)) + (4 * (pci_func & 1));
814 824
815 adapter->hw_read_wx(adapter, crbaddr, &mac_lo, 4); 825 mac_lo = NXRD32(adapter, crbaddr);
816 adapter->hw_read_wx(adapter, crbaddr+4, &mac_hi, 4); 826 mac_hi = NXRD32(adapter, crbaddr+4);
817 827
818 if (pci_func & 1) 828 if (pci_func & 1)
819 *mac = le64_to_cpu((mac_lo >> 16) | ((u64)mac_hi << 16)); 829 *mac = le64_to_cpu((mac_lo >> 16) | ((u64)mac_hi << 16));
@@ -831,8 +841,7 @@ static int crb_win_lock(struct netxen_adapter *adapter)
831 841
832 while (!done) { 842 while (!done) {
833 /* acquire semaphore3 from PCI HW block */ 843 /* acquire semaphore3 from PCI HW block */
834 adapter->hw_read_wx(adapter, 844 done = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM7_LOCK));
835 NETXEN_PCIE_REG(PCIE_SEM7_LOCK), &done, 4);
836 if (done == 1) 845 if (done == 1)
837 break; 846 break;
838 if (timeout >= CRB_WIN_LOCK_TIMEOUT) 847 if (timeout >= CRB_WIN_LOCK_TIMEOUT)
@@ -840,8 +849,7 @@ static int crb_win_lock(struct netxen_adapter *adapter)
840 timeout++; 849 timeout++;
841 udelay(1); 850 udelay(1);
842 } 851 }
843 netxen_crb_writelit_adapter(adapter, 852 NXWR32(adapter, NETXEN_CRB_WIN_LOCK_ID, adapter->portnum);
844 NETXEN_CRB_WIN_LOCK_ID, adapter->portnum);
845 return 0; 853 return 0;
846} 854}
847 855
@@ -849,8 +857,7 @@ static void crb_win_unlock(struct netxen_adapter *adapter)
849{ 857{
850 int val; 858 int val;
851 859
852 adapter->hw_read_wx(adapter, 860 val = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM7_UNLOCK));
853 NETXEN_PCIE_REG(PCIE_SEM7_UNLOCK), &val, 4);
854} 861}
855 862
856/* 863/*
@@ -907,17 +914,15 @@ netxen_nic_pci_change_crbwindow_128M(struct netxen_adapter *adapter, u32 wndw)
907 * In: 'off' is offset from base in 128M pci map 914 * In: 'off' is offset from base in 128M pci map
908 */ 915 */
909static int 916static int
910netxen_nic_pci_get_crb_addr_2M(struct netxen_adapter *adapter, 917netxen_nic_pci_get_crb_addr_2M(struct netxen_adapter *adapter, ulong *off)
911 ulong *off, int len)
912{ 918{
913 unsigned long end = *off + len;
914 crb_128M_2M_sub_block_map_t *m; 919 crb_128M_2M_sub_block_map_t *m;
915 920
916 921
917 if (*off >= NETXEN_CRB_MAX) 922 if (*off >= NETXEN_CRB_MAX)
918 return -1; 923 return -1;
919 924
920 if (*off >= NETXEN_PCI_CAMQM && (end <= NETXEN_PCI_CAMQM_2M_END)) { 925 if (*off >= NETXEN_PCI_CAMQM && (*off < NETXEN_PCI_CAMQM_2M_END)) {
921 *off = (*off - NETXEN_PCI_CAMQM) + NETXEN_PCI_CAMQM_2M_BASE + 926 *off = (*off - NETXEN_PCI_CAMQM) + NETXEN_PCI_CAMQM_2M_BASE +
922 (ulong)adapter->ahw.pci_base0; 927 (ulong)adapter->ahw.pci_base0;
923 return 0; 928 return 0;
@@ -927,14 +932,13 @@ netxen_nic_pci_get_crb_addr_2M(struct netxen_adapter *adapter,
927 return -1; 932 return -1;
928 933
929 *off -= NETXEN_PCI_CRBSPACE; 934 *off -= NETXEN_PCI_CRBSPACE;
930 end = *off + len;
931 935
932 /* 936 /*
933 * Try direct map 937 * Try direct map
934 */ 938 */
935 m = &crb_128M_2M_map[CRB_BLK(*off)].sub_block[CRB_SUBBLK(*off)]; 939 m = &crb_128M_2M_map[CRB_BLK(*off)].sub_block[CRB_SUBBLK(*off)];
936 940
937 if (m->valid && (m->start_128M <= *off) && (m->end_128M >= end)) { 941 if (m->valid && (m->start_128M <= *off) && (m->end_128M > *off)) {
938 *off = *off + m->start_2M - m->start_128M + 942 *off = *off + m->start_2M - m->start_128M +
939 (ulong)adapter->ahw.pci_base0; 943 (ulong)adapter->ahw.pci_base0;
940 return 0; 944 return 0;
@@ -972,214 +976,11 @@ netxen_nic_pci_set_crbwindow_2M(struct netxen_adapter *adapter, ulong *off)
972 (ulong)adapter->ahw.pci_base0; 976 (ulong)adapter->ahw.pci_base0;
973} 977}
974 978
975static int
976netxen_do_load_firmware(struct netxen_adapter *adapter, const char *fwname,
977 const struct firmware *fw)
978{
979 u64 *ptr64;
980 u32 i, flashaddr, size;
981 struct pci_dev *pdev = adapter->pdev;
982
983 if (fw)
984 dev_info(&pdev->dev, "loading firmware from file %s\n", fwname);
985 else
986 dev_info(&pdev->dev, "loading firmware from flash\n");
987
988 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
989 adapter->pci_write_normalize(adapter,
990 NETXEN_ROMUSB_GLB_CAS_RST, 1);
991
992 if (fw) {
993 __le64 data;
994
995 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
996
997 ptr64 = (u64 *)&fw->data[NETXEN_BOOTLD_START];
998 flashaddr = NETXEN_BOOTLD_START;
999
1000 for (i = 0; i < size; i++) {
1001 data = cpu_to_le64(ptr64[i]);
1002 adapter->pci_mem_write(adapter, flashaddr, &data, 8);
1003 flashaddr += 8;
1004 }
1005
1006 size = *(u32 *)&fw->data[NX_FW_SIZE_OFFSET];
1007 size = (__force u32)cpu_to_le32(size) / 8;
1008
1009 ptr64 = (u64 *)&fw->data[NETXEN_IMAGE_START];
1010 flashaddr = NETXEN_IMAGE_START;
1011
1012 for (i = 0; i < size; i++) {
1013 data = cpu_to_le64(ptr64[i]);
1014
1015 if (adapter->pci_mem_write(adapter,
1016 flashaddr, &data, 8))
1017 return -EIO;
1018
1019 flashaddr += 8;
1020 }
1021 } else {
1022 u32 data;
1023
1024 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 4;
1025 flashaddr = NETXEN_BOOTLD_START;
1026
1027 for (i = 0; i < size; i++) {
1028 if (netxen_rom_fast_read(adapter,
1029 flashaddr, (int *)&data) != 0)
1030 return -EIO;
1031
1032 if (adapter->pci_mem_write(adapter,
1033 flashaddr, &data, 4))
1034 return -EIO;
1035
1036 flashaddr += 4;
1037 }
1038 }
1039 msleep(1);
1040
1041 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
1042 adapter->pci_write_normalize(adapter,
1043 NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
1044 else {
1045 adapter->pci_write_normalize(adapter,
1046 NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
1047 adapter->pci_write_normalize(adapter,
1048 NETXEN_ROMUSB_GLB_CAS_RST, 0);
1049 }
1050
1051 return 0;
1052}
1053
1054static int
1055netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname,
1056 const struct firmware *fw)
1057{
1058 __le32 val;
1059 u32 major, minor, build, ver, min_ver, bios;
1060 struct pci_dev *pdev = adapter->pdev;
1061
1062 if (fw->size < NX_FW_MIN_SIZE)
1063 return -EINVAL;
1064
1065 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
1066 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
1067 return -EINVAL;
1068
1069 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
1070 major = (__force u32)val & 0xff;
1071 minor = ((__force u32)val >> 8) & 0xff;
1072 build = (__force u32)val >> 16;
1073
1074 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
1075 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
1076 else
1077 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
1078
1079 ver = NETXEN_VERSION_CODE(major, minor, build);
1080
1081 if ((major > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
1082 dev_err(&pdev->dev,
1083 "%s: firmware version %d.%d.%d unsupported\n",
1084 fwname, major, minor, build);
1085 return -EINVAL;
1086 }
1087
1088 val = cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
1089 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
1090 if ((__force u32)val != bios) {
1091 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1092 fwname);
1093 return -EINVAL;
1094 }
1095
1096 /* check if flashed firmware is newer */
1097 if (netxen_rom_fast_read(adapter,
1098 NX_FW_VERSION_OFFSET, (int *)&val))
1099 return -EIO;
1100 major = (__force u32)val & 0xff;
1101 minor = ((__force u32)val >> 8) & 0xff;
1102 build = (__force u32)val >> 16;
1103 if (NETXEN_VERSION_CODE(major, minor, build) > ver)
1104 return -EINVAL;
1105
1106 netxen_nic_reg_write(adapter, NETXEN_CAM_RAM(0x1fc),
1107 NETXEN_BDINFO_MAGIC);
1108 return 0;
1109}
1110
1111static char *fw_name[] = { "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin" };
1112
1113int netxen_load_firmware(struct netxen_adapter *adapter)
1114{
1115 u32 capability, flashed_ver;
1116 const struct firmware *fw;
1117 int fw_type;
1118 struct pci_dev *pdev = adapter->pdev;
1119 int rc = 0;
1120
1121 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1122 fw_type = NX_P2_MN_ROMIMAGE;
1123 goto request_fw;
1124 } else {
1125 fw_type = NX_P3_CT_ROMIMAGE;
1126 goto request_fw;
1127 }
1128
1129request_mn:
1130 capability = 0;
1131
1132 netxen_rom_fast_read(adapter,
1133 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
1134 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
1135 adapter->hw_read_wx(adapter,
1136 NX_PEG_TUNE_CAPABILITY, &capability, 4);
1137 if (capability & NX_PEG_TUNE_MN_PRESENT) {
1138 fw_type = NX_P3_MN_ROMIMAGE;
1139 goto request_fw;
1140 }
1141 }
1142
1143request_fw:
1144 rc = request_firmware(&fw, fw_name[fw_type], &pdev->dev);
1145 if (rc != 0) {
1146 if (fw_type == NX_P3_CT_ROMIMAGE) {
1147 msleep(1);
1148 goto request_mn;
1149 }
1150
1151 fw = NULL;
1152 goto load_fw;
1153 }
1154
1155 rc = netxen_validate_firmware(adapter, fw_name[fw_type], fw);
1156 if (rc != 0) {
1157 release_firmware(fw);
1158
1159 if (fw_type == NX_P3_CT_ROMIMAGE) {
1160 msleep(1);
1161 goto request_mn;
1162 }
1163
1164 fw = NULL;
1165 }
1166
1167load_fw:
1168 rc = netxen_do_load_firmware(adapter, fw_name[fw_type], fw);
1169
1170 if (fw)
1171 release_firmware(fw);
1172 return rc;
1173}
1174
1175int 979int
1176netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter, 980netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter, ulong off, u32 data)
1177 ulong off, void *data, int len)
1178{ 981{
1179 void __iomem *addr; 982 void __iomem *addr;
1180 983
1181 BUG_ON(len != 4);
1182
1183 if (ADDR_IN_WINDOW1(off)) { 984 if (ADDR_IN_WINDOW1(off)) {
1184 addr = NETXEN_CRB_NORMALIZE(adapter, off); 985 addr = NETXEN_CRB_NORMALIZE(adapter, off);
1185 } else { /* Window 0 */ 986 } else { /* Window 0 */
@@ -1192,7 +993,7 @@ netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter,
1192 return 1; 993 return 1;
1193 } 994 }
1194 995
1195 writel(*(u32 *) data, addr); 996 writel(data, addr);
1196 997
1197 if (!ADDR_IN_WINDOW1(off)) 998 if (!ADDR_IN_WINDOW1(off))
1198 netxen_nic_pci_change_crbwindow_128M(adapter, 1); 999 netxen_nic_pci_change_crbwindow_128M(adapter, 1);
@@ -1200,13 +1001,11 @@ netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter,
1200 return 0; 1001 return 0;
1201} 1002}
1202 1003
1203int 1004u32
1204netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter, 1005netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter, ulong off)
1205 ulong off, void *data, int len)
1206{ 1006{
1207 void __iomem *addr; 1007 void __iomem *addr;
1208 1008 u32 data;
1209 BUG_ON(len != 4);
1210 1009
1211 if (ADDR_IN_WINDOW1(off)) { /* Window 1 */ 1010 if (ADDR_IN_WINDOW1(off)) { /* Window 1 */
1212 addr = NETXEN_CRB_NORMALIZE(adapter, off); 1011 addr = NETXEN_CRB_NORMALIZE(adapter, off);
@@ -1220,24 +1019,21 @@ netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter,
1220 return 1; 1019 return 1;
1221 } 1020 }
1222 1021
1223 *(u32 *)data = readl(addr); 1022 data = readl(addr);
1224 1023
1225 if (!ADDR_IN_WINDOW1(off)) 1024 if (!ADDR_IN_WINDOW1(off))
1226 netxen_nic_pci_change_crbwindow_128M(adapter, 1); 1025 netxen_nic_pci_change_crbwindow_128M(adapter, 1);
1227 1026
1228 return 0; 1027 return data;
1229} 1028}
1230 1029
1231int 1030int
1232netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter, 1031netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter, ulong off, u32 data)
1233 ulong off, void *data, int len)
1234{ 1032{
1235 unsigned long flags = 0; 1033 unsigned long flags = 0;
1236 int rv; 1034 int rv;
1237 1035
1238 BUG_ON(len != 4); 1036 rv = netxen_nic_pci_get_crb_addr_2M(adapter, &off);
1239
1240 rv = netxen_nic_pci_get_crb_addr_2M(adapter, &off, len);
1241 1037
1242 if (rv == -1) { 1038 if (rv == -1) {
1243 printk(KERN_ERR "%s: invalid offset: 0x%016lx\n", 1039 printk(KERN_ERR "%s: invalid offset: 0x%016lx\n",
@@ -1250,26 +1046,24 @@ netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter,
1250 write_lock_irqsave(&adapter->adapter_lock, flags); 1046 write_lock_irqsave(&adapter->adapter_lock, flags);
1251 crb_win_lock(adapter); 1047 crb_win_lock(adapter);
1252 netxen_nic_pci_set_crbwindow_2M(adapter, &off); 1048 netxen_nic_pci_set_crbwindow_2M(adapter, &off);
1253 writel(*(uint32_t *)data, (void __iomem *)off); 1049 writel(data, (void __iomem *)off);
1254 crb_win_unlock(adapter); 1050 crb_win_unlock(adapter);
1255 write_unlock_irqrestore(&adapter->adapter_lock, flags); 1051 write_unlock_irqrestore(&adapter->adapter_lock, flags);
1256 } else 1052 } else
1257 writel(*(uint32_t *)data, (void __iomem *)off); 1053 writel(data, (void __iomem *)off);
1258 1054
1259 1055
1260 return 0; 1056 return 0;
1261} 1057}
1262 1058
1263int 1059u32
1264netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter, 1060netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter, ulong off)
1265 ulong off, void *data, int len)
1266{ 1061{
1267 unsigned long flags = 0; 1062 unsigned long flags = 0;
1268 int rv; 1063 int rv;
1064 u32 data;
1269 1065
1270 BUG_ON(len != 4); 1066 rv = netxen_nic_pci_get_crb_addr_2M(adapter, &off);
1271
1272 rv = netxen_nic_pci_get_crb_addr_2M(adapter, &off, len);
1273 1067
1274 if (rv == -1) { 1068 if (rv == -1) {
1275 printk(KERN_ERR "%s: invalid offset: 0x%016lx\n", 1069 printk(KERN_ERR "%s: invalid offset: 0x%016lx\n",
@@ -1282,47 +1076,13 @@ netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter,
1282 write_lock_irqsave(&adapter->adapter_lock, flags); 1076 write_lock_irqsave(&adapter->adapter_lock, flags);
1283 crb_win_lock(adapter); 1077 crb_win_lock(adapter);
1284 netxen_nic_pci_set_crbwindow_2M(adapter, &off); 1078 netxen_nic_pci_set_crbwindow_2M(adapter, &off);
1285 *(uint32_t *)data = readl((void __iomem *)off); 1079 data = readl((void __iomem *)off);
1286 crb_win_unlock(adapter); 1080 crb_win_unlock(adapter);
1287 write_unlock_irqrestore(&adapter->adapter_lock, flags); 1081 write_unlock_irqrestore(&adapter->adapter_lock, flags);
1288 } else 1082 } else
1289 *(uint32_t *)data = readl((void __iomem *)off); 1083 data = readl((void __iomem *)off);
1290
1291 return 0;
1292}
1293 1084
1294void netxen_nic_reg_write(struct netxen_adapter *adapter, u64 off, u32 val) 1085 return data;
1295{
1296 adapter->hw_write_wx(adapter, off, &val, 4);
1297}
1298
1299int netxen_nic_reg_read(struct netxen_adapter *adapter, u64 off)
1300{
1301 int val;
1302 adapter->hw_read_wx(adapter, off, &val, 4);
1303 return val;
1304}
1305
1306/* Change the window to 0, write and change back to window 1. */
1307void netxen_nic_write_w0(struct netxen_adapter *adapter, u32 index, u32 value)
1308{
1309 adapter->hw_write_wx(adapter, index, &value, 4);
1310}
1311
1312/* Change the window to 0, read and change back to window 1. */
1313void netxen_nic_read_w0(struct netxen_adapter *adapter, u32 index, u32 *value)
1314{
1315 adapter->hw_read_wx(adapter, index, value, 4);
1316}
1317
1318void netxen_nic_write_w1(struct netxen_adapter *adapter, u32 index, u32 value)
1319{
1320 adapter->hw_write_wx(adapter, index, &value, 4);
1321}
1322
1323void netxen_nic_read_w1(struct netxen_adapter *adapter, u32 index, u32 *value)
1324{
1325 adapter->hw_read_wx(adapter, index, value, 4);
1326} 1086}
1327 1087
1328/* 1088/*
@@ -1425,17 +1185,6 @@ u32 netxen_nic_pci_read_immediate_128M(struct netxen_adapter *adapter, u64 off)
1425 return readl((void __iomem *)(pci_base_offset(adapter, off))); 1185 return readl((void __iomem *)(pci_base_offset(adapter, off)));
1426} 1186}
1427 1187
1428void netxen_nic_pci_write_normalize_128M(struct netxen_adapter *adapter,
1429 u64 off, u32 data)
1430{
1431 writel(data, NETXEN_CRB_NORMALIZE(adapter, off));
1432}
1433
1434u32 netxen_nic_pci_read_normalize_128M(struct netxen_adapter *adapter, u64 off)
1435{
1436 return readl(NETXEN_CRB_NORMALIZE(adapter, off));
1437}
1438
1439unsigned long 1188unsigned long
1440netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter, 1189netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter,
1441 unsigned long long addr) 1190 unsigned long long addr)
@@ -1447,12 +1196,10 @@ netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter,
1447 /* DDR network side */ 1196 /* DDR network side */
1448 window = MN_WIN(addr); 1197 window = MN_WIN(addr);
1449 adapter->ahw.ddr_mn_window = window; 1198 adapter->ahw.ddr_mn_window = window;
1450 adapter->hw_write_wx(adapter, 1199 NXWR32(adapter, adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE,
1451 adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE, 1200 window);
1452 &window, 4); 1201 win_read = NXRD32(adapter,
1453 adapter->hw_read_wx(adapter, 1202 adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE);
1454 adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE,
1455 &win_read, 4);
1456 if ((win_read << 17) != window) { 1203 if ((win_read << 17) != window) {
1457 printk(KERN_INFO "Written MNwin (0x%x) != " 1204 printk(KERN_INFO "Written MNwin (0x%x) != "
1458 "Read MNwin (0x%x)\n", window, win_read); 1205 "Read MNwin (0x%x)\n", window, win_read);
@@ -1467,12 +1214,10 @@ netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter,
1467 1214
1468 window = OCM_WIN(addr); 1215 window = OCM_WIN(addr);
1469 adapter->ahw.ddr_mn_window = window; 1216 adapter->ahw.ddr_mn_window = window;
1470 adapter->hw_write_wx(adapter, 1217 NXWR32(adapter, adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE,
1471 adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE, 1218 window);
1472 &window, 4); 1219 win_read = NXRD32(adapter,
1473 adapter->hw_read_wx(adapter, 1220 adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE);
1474 adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE,
1475 &win_read, 4);
1476 if ((win_read >> 7) != window) { 1221 if ((win_read >> 7) != window) {
1477 printk(KERN_INFO "%s: Written OCMwin (0x%x) != " 1222 printk(KERN_INFO "%s: Written OCMwin (0x%x) != "
1478 "Read OCMwin (0x%x)\n", 1223 "Read OCMwin (0x%x)\n",
@@ -1485,12 +1230,10 @@ netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter,
1485 /* QDR network side */ 1230 /* QDR network side */
1486 window = MS_WIN(addr); 1231 window = MS_WIN(addr);
1487 adapter->ahw.qdr_sn_window = window; 1232 adapter->ahw.qdr_sn_window = window;
1488 adapter->hw_write_wx(adapter, 1233 NXWR32(adapter, adapter->ahw.ms_win_crb | NETXEN_PCI_CRBSPACE,
1489 adapter->ahw.ms_win_crb | NETXEN_PCI_CRBSPACE, 1234 window);
1490 &window, 4); 1235 win_read = NXRD32(adapter,
1491 adapter->hw_read_wx(adapter, 1236 adapter->ahw.ms_win_crb | NETXEN_PCI_CRBSPACE);
1492 adapter->ahw.ms_win_crb | NETXEN_PCI_CRBSPACE,
1493 &win_read, 4);
1494 if (win_read != window) { 1237 if (win_read != window) {
1495 printk(KERN_INFO "%s: Written MSwin (0x%x) != " 1238 printk(KERN_INFO "%s: Written MSwin (0x%x) != "
1496 "Read MSwin (0x%x)\n", 1239 "Read MSwin (0x%x)\n",
@@ -1936,27 +1679,20 @@ netxen_nic_pci_mem_write_2M(struct netxen_adapter *adapter,
1936 1679
1937 for (i = 0; i < loop; i++) { 1680 for (i = 0; i < loop; i++) {
1938 temp = off8 + (i << 3); 1681 temp = off8 + (i << 3);
1939 adapter->hw_write_wx(adapter, 1682 NXWR32(adapter, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);
1940 mem_crb+MIU_TEST_AGT_ADDR_LO, &temp, 4);
1941 temp = 0; 1683 temp = 0;
1942 adapter->hw_write_wx(adapter, 1684 NXWR32(adapter, mem_crb+MIU_TEST_AGT_ADDR_HI, temp);
1943 mem_crb+MIU_TEST_AGT_ADDR_HI, &temp, 4);
1944 temp = word[i] & 0xffffffff; 1685 temp = word[i] & 0xffffffff;
1945 adapter->hw_write_wx(adapter, 1686 NXWR32(adapter, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp);
1946 mem_crb+MIU_TEST_AGT_WRDATA_LO, &temp, 4);
1947 temp = (word[i] >> 32) & 0xffffffff; 1687 temp = (word[i] >> 32) & 0xffffffff;
1948 adapter->hw_write_wx(adapter, 1688 NXWR32(adapter, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp);
1949 mem_crb+MIU_TEST_AGT_WRDATA_HI, &temp, 4);
1950 temp = MIU_TA_CTL_ENABLE | MIU_TA_CTL_WRITE; 1689 temp = MIU_TA_CTL_ENABLE | MIU_TA_CTL_WRITE;
1951 adapter->hw_write_wx(adapter, 1690 NXWR32(adapter, mem_crb+MIU_TEST_AGT_CTRL, temp);
1952 mem_crb+MIU_TEST_AGT_CTRL, &temp, 4);
1953 temp = MIU_TA_CTL_START | MIU_TA_CTL_ENABLE | MIU_TA_CTL_WRITE; 1691 temp = MIU_TA_CTL_START | MIU_TA_CTL_ENABLE | MIU_TA_CTL_WRITE;
1954 adapter->hw_write_wx(adapter, 1692 NXWR32(adapter, mem_crb+MIU_TEST_AGT_CTRL, temp);
1955 mem_crb+MIU_TEST_AGT_CTRL, &temp, 4);
1956 1693
1957 for (j = 0; j < MAX_CTL_CHECK; j++) { 1694 for (j = 0; j < MAX_CTL_CHECK; j++) {
1958 adapter->hw_read_wx(adapter, 1695 temp = NXRD32(adapter, mem_crb + MIU_TEST_AGT_CTRL);
1959 mem_crb + MIU_TEST_AGT_CTRL, &temp, 4);
1960 if ((temp & MIU_TA_CTL_BUSY) == 0) 1696 if ((temp & MIU_TA_CTL_BUSY) == 0)
1961 break; 1697 break;
1962 } 1698 }
@@ -2013,21 +1749,16 @@ netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter,
2013 1749
2014 for (i = 0; i < loop; i++) { 1750 for (i = 0; i < loop; i++) {
2015 temp = off8 + (i << 3); 1751 temp = off8 + (i << 3);
2016 adapter->hw_write_wx(adapter, 1752 NXWR32(adapter, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);
2017 mem_crb + MIU_TEST_AGT_ADDR_LO, &temp, 4);
2018 temp = 0; 1753 temp = 0;
2019 adapter->hw_write_wx(adapter, 1754 NXWR32(adapter, mem_crb + MIU_TEST_AGT_ADDR_HI, temp);
2020 mem_crb + MIU_TEST_AGT_ADDR_HI, &temp, 4);
2021 temp = MIU_TA_CTL_ENABLE; 1755 temp = MIU_TA_CTL_ENABLE;
2022 adapter->hw_write_wx(adapter, 1756 NXWR32(adapter, mem_crb + MIU_TEST_AGT_CTRL, temp);
2023 mem_crb + MIU_TEST_AGT_CTRL, &temp, 4);
2024 temp = MIU_TA_CTL_START | MIU_TA_CTL_ENABLE; 1757 temp = MIU_TA_CTL_START | MIU_TA_CTL_ENABLE;
2025 adapter->hw_write_wx(adapter, 1758 NXWR32(adapter, mem_crb + MIU_TEST_AGT_CTRL, temp);
2026 mem_crb + MIU_TEST_AGT_CTRL, &temp, 4);
2027 1759
2028 for (j = 0; j < MAX_CTL_CHECK; j++) { 1760 for (j = 0; j < MAX_CTL_CHECK; j++) {
2029 adapter->hw_read_wx(adapter, 1761 temp = NXRD32(adapter, mem_crb + MIU_TEST_AGT_CTRL);
2030 mem_crb + MIU_TEST_AGT_CTRL, &temp, 4);
2031 if ((temp & MIU_TA_CTL_BUSY) == 0) 1762 if ((temp & MIU_TA_CTL_BUSY) == 0)
2032 break; 1763 break;
2033 } 1764 }
@@ -2042,8 +1773,8 @@ netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter,
2042 start = off0[i] >> 2; 1773 start = off0[i] >> 2;
2043 end = (off0[i] + sz[i] - 1) >> 2; 1774 end = (off0[i] + sz[i] - 1) >> 2;
2044 for (k = start; k <= end; k++) { 1775 for (k = start; k <= end; k++) {
2045 adapter->hw_read_wx(adapter, 1776 temp = NXRD32(adapter,
2046 mem_crb + MIU_TEST_AGT_RDDATA(k), &temp, 4); 1777 mem_crb + MIU_TEST_AGT_RDDATA(k));
2047 word[i] |= ((uint64_t)temp << (32 * k)); 1778 word[i] |= ((uint64_t)temp << (32 * k));
2048 } 1779 }
2049 } 1780 }
@@ -2086,29 +1817,14 @@ netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter,
2086int netxen_nic_pci_write_immediate_2M(struct netxen_adapter *adapter, 1817int netxen_nic_pci_write_immediate_2M(struct netxen_adapter *adapter,
2087 u64 off, u32 data) 1818 u64 off, u32 data)
2088{ 1819{
2089 adapter->hw_write_wx(adapter, off, &data, 4); 1820 NXWR32(adapter, off, data);
2090 1821
2091 return 0; 1822 return 0;
2092} 1823}
2093 1824
2094u32 netxen_nic_pci_read_immediate_2M(struct netxen_adapter *adapter, u64 off) 1825u32 netxen_nic_pci_read_immediate_2M(struct netxen_adapter *adapter, u64 off)
2095{ 1826{
2096 u32 temp; 1827 return NXRD32(adapter, off);
2097 adapter->hw_read_wx(adapter, off, &temp, 4);
2098 return temp;
2099}
2100
2101void netxen_nic_pci_write_normalize_2M(struct netxen_adapter *adapter,
2102 u64 off, u32 data)
2103{
2104 adapter->hw_write_wx(adapter, off, &data, 4);
2105}
2106
2107u32 netxen_nic_pci_read_normalize_2M(struct netxen_adapter *adapter, u64 off)
2108{
2109 u32 temp;
2110 adapter->hw_read_wx(adapter, off, &temp, 4);
2111 return temp;
2112} 1828}
2113 1829
2114int netxen_nic_get_board_info(struct netxen_adapter *adapter) 1830int netxen_nic_get_board_info(struct netxen_adapter *adapter)
@@ -2142,13 +1858,12 @@ int netxen_nic_get_board_info(struct netxen_adapter *adapter)
2142 adapter->ahw.board_type = board_type; 1858 adapter->ahw.board_type = board_type;
2143 1859
2144 if (board_type == NETXEN_BRDTYPE_P3_4_GB_MM) { 1860 if (board_type == NETXEN_BRDTYPE_P3_4_GB_MM) {
2145 u32 gpio = netxen_nic_reg_read(adapter, 1861 u32 gpio = NXRD32(adapter, NETXEN_ROMUSB_GLB_PAD_GPIO_I);
2146 NETXEN_ROMUSB_GLB_PAD_GPIO_I);
2147 if ((gpio & 0x8000) == 0) 1862 if ((gpio & 0x8000) == 0)
2148 board_type = NETXEN_BRDTYPE_P3_10G_TP; 1863 board_type = NETXEN_BRDTYPE_P3_10G_TP;
2149 } 1864 }
2150 1865
2151 switch ((netxen_brdtype_t)board_type) { 1866 switch (board_type) {
2152 case NETXEN_BRDTYPE_P2_SB35_4G: 1867 case NETXEN_BRDTYPE_P2_SB35_4G:
2153 adapter->ahw.port_type = NETXEN_NIC_GBE; 1868 adapter->ahw.port_type = NETXEN_NIC_GBE;
2154 break; 1869 break;
@@ -2195,8 +1910,7 @@ int netxen_nic_get_board_info(struct netxen_adapter *adapter)
2195int netxen_nic_set_mtu_gb(struct netxen_adapter *adapter, int new_mtu) 1910int netxen_nic_set_mtu_gb(struct netxen_adapter *adapter, int new_mtu)
2196{ 1911{
2197 new_mtu += MTU_FUDGE_FACTOR; 1912 new_mtu += MTU_FUDGE_FACTOR;
2198 netxen_nic_write_w0(adapter, 1913 NXWR32(adapter, NETXEN_NIU_GB_MAX_FRAME_SIZE(adapter->physical_port),
2199 NETXEN_NIU_GB_MAX_FRAME_SIZE(adapter->physical_port),
2200 new_mtu); 1914 new_mtu);
2201 return 0; 1915 return 0;
2202} 1916}
@@ -2205,21 +1919,12 @@ int netxen_nic_set_mtu_xgb(struct netxen_adapter *adapter, int new_mtu)
2205{ 1919{
2206 new_mtu += MTU_FUDGE_FACTOR; 1920 new_mtu += MTU_FUDGE_FACTOR;
2207 if (adapter->physical_port == 0) 1921 if (adapter->physical_port == 0)
2208 netxen_nic_write_w0(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE, 1922 NXWR32(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE, new_mtu);
2209 new_mtu);
2210 else 1923 else
2211 netxen_nic_write_w0(adapter, NETXEN_NIU_XG1_MAX_FRAME_SIZE, 1924 NXWR32(adapter, NETXEN_NIU_XG1_MAX_FRAME_SIZE, new_mtu);
2212 new_mtu);
2213 return 0; 1925 return 0;
2214} 1926}
2215 1927
2216void
2217netxen_crb_writelit_adapter(struct netxen_adapter *adapter,
2218 unsigned long off, int data)
2219{
2220 adapter->hw_write_wx(adapter, off, &data, 4);
2221}
2222
2223void netxen_nic_set_link_parameters(struct netxen_adapter *adapter) 1928void netxen_nic_set_link_parameters(struct netxen_adapter *adapter)
2224{ 1929{
2225 __u32 status; 1930 __u32 status;
@@ -2234,8 +1939,7 @@ void netxen_nic_set_link_parameters(struct netxen_adapter *adapter)
2234 } 1939 }
2235 1940
2236 if (adapter->ahw.port_type == NETXEN_NIC_GBE) { 1941 if (adapter->ahw.port_type == NETXEN_NIC_GBE) {
2237 adapter->hw_read_wx(adapter, 1942 port_mode = NXRD32(adapter, NETXEN_PORT_MODE_ADDR);
2238 NETXEN_PORT_MODE_ADDR, &port_mode, 4);
2239 if (port_mode == NETXEN_PORT_MODE_802_3_AP) { 1943 if (port_mode == NETXEN_PORT_MODE_802_3_AP) {
2240 adapter->link_speed = SPEED_1000; 1944 adapter->link_speed = SPEED_1000;
2241 adapter->link_duplex = DUPLEX_FULL; 1945 adapter->link_duplex = DUPLEX_FULL;
@@ -2312,9 +2016,9 @@ void netxen_nic_get_firmware_info(struct netxen_adapter *adapter)
2312 addr += sizeof(u32); 2016 addr += sizeof(u32);
2313 } 2017 }
2314 2018
2315 adapter->hw_read_wx(adapter, NETXEN_FW_VERSION_MAJOR, &fw_major, 4); 2019 fw_major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
2316 adapter->hw_read_wx(adapter, NETXEN_FW_VERSION_MINOR, &fw_minor, 4); 2020 fw_minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
2317 adapter->hw_read_wx(adapter, NETXEN_FW_VERSION_SUB, &fw_build, 4); 2021 fw_build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
2318 2022
2319 adapter->fw_major = fw_major; 2023 adapter->fw_major = fw_major;
2320 adapter->fw_version = NETXEN_VERSION_CODE(fw_major, fw_minor, fw_build); 2024 adapter->fw_version = NETXEN_VERSION_CODE(fw_major, fw_minor, fw_build);
@@ -2337,8 +2041,7 @@ void netxen_nic_get_firmware_info(struct netxen_adapter *adapter)
2337 fw_major, fw_minor, fw_build); 2041 fw_major, fw_minor, fw_build);
2338 2042
2339 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 2043 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
2340 adapter->hw_read_wx(adapter, 2044 i = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
2341 NETXEN_MIU_MN_CONTROL, &i, 4);
2342 adapter->ahw.cut_through = (i & 0x4) ? 1 : 0; 2045 adapter->ahw.cut_through = (i & 0x4) ? 1 : 0;
2343 dev_info(&pdev->dev, "firmware running in %s mode\n", 2046 dev_info(&pdev->dev, "firmware running in %s mode\n",
2344 adapter->ahw.cut_through ? "cut-through" : "legacy"); 2047 adapter->ahw.cut_through ? "cut-through" : "legacy");
@@ -2353,9 +2056,9 @@ netxen_nic_wol_supported(struct netxen_adapter *adapter)
2353 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 2056 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
2354 return 0; 2057 return 0;
2355 2058
2356 wol_cfg = netxen_nic_reg_read(adapter, NETXEN_WOL_CONFIG_NV); 2059 wol_cfg = NXRD32(adapter, NETXEN_WOL_CONFIG_NV);
2357 if (wol_cfg & (1UL << adapter->portnum)) { 2060 if (wol_cfg & (1UL << adapter->portnum)) {
2358 wol_cfg = netxen_nic_reg_read(adapter, NETXEN_WOL_CONFIG); 2061 wol_cfg = NXRD32(adapter, NETXEN_WOL_CONFIG);
2359 if (wol_cfg & (1 << adapter->portnum)) 2062 if (wol_cfg & (1 << adapter->portnum))
2360 return 1; 2063 return 1;
2361 } 2064 }
diff --git a/drivers/net/netxen/netxen_nic_hw.h b/drivers/net/netxen/netxen_nic_hw.h
index 04b47a7993cd..d4e833339781 100644
--- a/drivers/net/netxen/netxen_nic_hw.h
+++ b/drivers/net/netxen/netxen_nic_hw.h
@@ -36,35 +36,13 @@
36/* Hardware memory size of 128 meg */ 36/* Hardware memory size of 128 meg */
37#define NETXEN_MEMADDR_MAX (128 * 1024 * 1024) 37#define NETXEN_MEMADDR_MAX (128 * 1024 * 1024)
38 38
39#ifndef readq
40static inline u64 readq(void __iomem * addr)
41{
42 return readl(addr) | (((u64) readl(addr + 4)) << 32LL);
43}
44#endif
45
46#ifndef writeq
47static inline void writeq(u64 val, void __iomem * addr)
48{
49 writel(((u32) (val)), (addr));
50 writel(((u32) (val >> 32)), (addr + 4));
51}
52#endif
53
54struct netxen_adapter; 39struct netxen_adapter;
55 40
56#define NETXEN_PCI_MAPSIZE_BYTES (NETXEN_PCI_MAPSIZE << 20) 41#define NETXEN_PCI_MAPSIZE_BYTES (NETXEN_PCI_MAPSIZE << 20)
57 42
58struct netxen_port;
59void netxen_nic_set_link_parameters(struct netxen_adapter *adapter); 43void netxen_nic_set_link_parameters(struct netxen_adapter *adapter);
60 44
61typedef u8 netxen_ethernet_macaddr_t[6];
62
63/* Nibble or Byte mode for phy interface (GbE mode only) */ 45/* Nibble or Byte mode for phy interface (GbE mode only) */
64typedef enum {
65 NETXEN_NIU_10_100_MB = 0,
66 NETXEN_NIU_1000_MB
67} netxen_niu_gbe_ifmode_t;
68 46
69#define _netxen_crb_get_bit(var, bit) ((var >> bit) & 0x1) 47#define _netxen_crb_get_bit(var, bit) ((var >> bit) & 0x1)
70 48
@@ -222,30 +200,28 @@ typedef enum {
222/* 200/*
223 * PHY-Specific MII control/status registers. 201 * PHY-Specific MII control/status registers.
224 */ 202 */
225typedef enum { 203#define NETXEN_NIU_GB_MII_MGMT_ADDR_CONTROL 0
226 NETXEN_NIU_GB_MII_MGMT_ADDR_CONTROL = 0, 204#define NETXEN_NIU_GB_MII_MGMT_ADDR_STATUS 1
227 NETXEN_NIU_GB_MII_MGMT_ADDR_STATUS = 1, 205#define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_0 2
228 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_0 = 2, 206#define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_1 3
229 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_1 = 3, 207#define NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG 4
230 NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG = 4, 208#define NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART 5
231 NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART = 5, 209#define NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG_MORE 6
232 NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG_MORE = 6, 210#define NETXEN_NIU_GB_MII_MGMT_ADDR_NEXTPAGE_XMIT 7
233 NETXEN_NIU_GB_MII_MGMT_ADDR_NEXTPAGE_XMIT = 7, 211#define NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART_NEXTPAGE 8
234 NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART_NEXTPAGE = 8, 212#define NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_CONTROL 9
235 NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_CONTROL = 9, 213#define NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_STATUS 10
236 NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_STATUS = 10, 214#define NETXEN_NIU_GB_MII_MGMT_ADDR_EXTENDED_STATUS 15
237 NETXEN_NIU_GB_MII_MGMT_ADDR_EXTENDED_STATUS = 15, 215#define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL 16
238 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL = 16, 216#define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS 17
239 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS = 17, 217#define NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE 18
240 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE = 18, 218#define NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS 19
241 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS = 19, 219#define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE 20
242 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE = 20, 220#define NETXEN_NIU_GB_MII_MGMT_ADDR_RECV_ERROR_COUNT 21
243 NETXEN_NIU_GB_MII_MGMT_ADDR_RECV_ERROR_COUNT = 21, 221#define NETXEN_NIU_GB_MII_MGMT_ADDR_LED_CONTROL 24
244 NETXEN_NIU_GB_MII_MGMT_ADDR_LED_CONTROL = 24, 222#define NETXEN_NIU_GB_MII_MGMT_ADDR_LED_OVERRIDE 25
245 NETXEN_NIU_GB_MII_MGMT_ADDR_LED_OVERRIDE = 25, 223#define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE_YET 26
246 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE_YET = 26, 224#define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS_MORE 27
247 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS_MORE = 27
248} netxen_niu_phy_register_t;
249 225
250/* 226/*
251 * PHY-Specific Status Register (reg 17). 227 * PHY-Specific Status Register (reg 17).
@@ -417,14 +393,6 @@ int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
417int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter, 393int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
418 u32 mode); 394 u32 mode);
419 395
420/* set the MAC address for a given MAC */
421int netxen_niu_macaddr_set(struct netxen_adapter *adapter,
422 netxen_ethernet_macaddr_t addr);
423
424/* XG version */
425int netxen_niu_xg_macaddr_set(struct netxen_adapter *adapter,
426 netxen_ethernet_macaddr_t addr);
427
428/* Generic enable for GbE ports. Will detect the speed of the link. */ 396/* Generic enable for GbE ports. Will detect the speed of the link. */
429int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port); 397int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port);
430 398
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c
index 0759c35f16ac..4a51c31330da 100644
--- a/drivers/net/netxen/netxen_nic_init.c
+++ b/drivers/net/netxen/netxen_nic_init.c
@@ -108,42 +108,6 @@ static void crb_addr_transform_setup(void)
108 crb_addr_transform(I2C0); 108 crb_addr_transform(I2C0);
109} 109}
110 110
111int netxen_init_firmware(struct netxen_adapter *adapter)
112{
113 u32 state = 0, loops = 0, err = 0;
114
115 /* Window 1 call */
116 state = adapter->pci_read_normalize(adapter, CRB_CMDPEG_STATE);
117
118 if (state == PHAN_INITIALIZE_ACK)
119 return 0;
120
121 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
122 msleep(1);
123 /* Window 1 call */
124 state = adapter->pci_read_normalize(adapter, CRB_CMDPEG_STATE);
125
126 loops++;
127 }
128 if (loops >= 2000) {
129 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
130 state);
131 err = -EIO;
132 return err;
133 }
134 /* Window 1 call */
135 adapter->pci_write_normalize(adapter,
136 CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
137 adapter->pci_write_normalize(adapter,
138 CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
139 adapter->pci_write_normalize(adapter,
140 CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
141 adapter->pci_write_normalize(adapter,
142 CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
143
144 return err;
145}
146
147void netxen_release_rx_buffers(struct netxen_adapter *adapter) 111void netxen_release_rx_buffers(struct netxen_adapter *adapter)
148{ 112{
149 struct netxen_recv_context *recv_ctx; 113 struct netxen_recv_context *recv_ctx;
@@ -173,9 +137,10 @@ void netxen_release_tx_buffers(struct netxen_adapter *adapter)
173 struct netxen_cmd_buffer *cmd_buf; 137 struct netxen_cmd_buffer *cmd_buf;
174 struct netxen_skb_frag *buffrag; 138 struct netxen_skb_frag *buffrag;
175 int i, j; 139 int i, j;
140 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
176 141
177 cmd_buf = adapter->cmd_buf_arr; 142 cmd_buf = tx_ring->cmd_buf_arr;
178 for (i = 0; i < adapter->num_txd; i++) { 143 for (i = 0; i < tx_ring->num_desc; i++) {
179 buffrag = cmd_buf->frag_array; 144 buffrag = cmd_buf->frag_array;
180 if (buffrag->dma) { 145 if (buffrag->dma) {
181 pci_unmap_single(adapter->pdev, buffrag->dma, 146 pci_unmap_single(adapter->pdev, buffrag->dma,
@@ -203,9 +168,14 @@ void netxen_free_sw_resources(struct netxen_adapter *adapter)
203{ 168{
204 struct netxen_recv_context *recv_ctx; 169 struct netxen_recv_context *recv_ctx;
205 struct nx_host_rds_ring *rds_ring; 170 struct nx_host_rds_ring *rds_ring;
171 struct nx_host_tx_ring *tx_ring;
206 int ring; 172 int ring;
207 173
208 recv_ctx = &adapter->recv_ctx; 174 recv_ctx = &adapter->recv_ctx;
175
176 if (recv_ctx->rds_rings == NULL)
177 goto skip_rds;
178
209 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 179 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
210 rds_ring = &recv_ctx->rds_rings[ring]; 180 rds_ring = &recv_ctx->rds_rings[ring];
211 if (rds_ring->rx_buf_arr) { 181 if (rds_ring->rx_buf_arr) {
@@ -213,10 +183,15 @@ void netxen_free_sw_resources(struct netxen_adapter *adapter)
213 rds_ring->rx_buf_arr = NULL; 183 rds_ring->rx_buf_arr = NULL;
214 } 184 }
215 } 185 }
186 kfree(recv_ctx->rds_rings);
216 187
217 if (adapter->cmd_buf_arr) 188skip_rds:
218 vfree(adapter->cmd_buf_arr); 189 if (adapter->tx_ring == NULL)
219 return; 190 return;
191
192 tx_ring = adapter->tx_ring;
193 if (tx_ring->cmd_buf_arr)
194 vfree(tx_ring->cmd_buf_arr);
220} 195}
221 196
222int netxen_alloc_sw_resources(struct netxen_adapter *adapter) 197int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
@@ -224,23 +199,45 @@ int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
224 struct netxen_recv_context *recv_ctx; 199 struct netxen_recv_context *recv_ctx;
225 struct nx_host_rds_ring *rds_ring; 200 struct nx_host_rds_ring *rds_ring;
226 struct nx_host_sds_ring *sds_ring; 201 struct nx_host_sds_ring *sds_ring;
202 struct nx_host_tx_ring *tx_ring;
227 struct netxen_rx_buffer *rx_buf; 203 struct netxen_rx_buffer *rx_buf;
228 int ring, i, num_rx_bufs; 204 int ring, i, size;
229 205
230 struct netxen_cmd_buffer *cmd_buf_arr; 206 struct netxen_cmd_buffer *cmd_buf_arr;
231 struct net_device *netdev = adapter->netdev; 207 struct net_device *netdev = adapter->netdev;
208 struct pci_dev *pdev = adapter->pdev;
232 209
233 cmd_buf_arr = 210 size = sizeof(struct nx_host_tx_ring);
234 (struct netxen_cmd_buffer *)vmalloc(TX_BUFF_RINGSIZE(adapter)); 211 tx_ring = kzalloc(size, GFP_KERNEL);
212 if (tx_ring == NULL) {
213 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
214 netdev->name);
215 return -ENOMEM;
216 }
217 adapter->tx_ring = tx_ring;
218
219 tx_ring->num_desc = adapter->num_txd;
220
221 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
235 if (cmd_buf_arr == NULL) { 222 if (cmd_buf_arr == NULL) {
236 printk(KERN_ERR "%s: Failed to allocate cmd buffer ring\n", 223 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
237 netdev->name); 224 netdev->name);
238 return -ENOMEM; 225 return -ENOMEM;
239 } 226 }
240 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(adapter)); 227 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
241 adapter->cmd_buf_arr = cmd_buf_arr; 228 tx_ring->cmd_buf_arr = cmd_buf_arr;
242 229
243 recv_ctx = &adapter->recv_ctx; 230 recv_ctx = &adapter->recv_ctx;
231
232 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
233 rds_ring = kzalloc(size, GFP_KERNEL);
234 if (rds_ring == NULL) {
235 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
236 netdev->name);
237 return -ENOMEM;
238 }
239 recv_ctx->rds_rings = rds_ring;
240
244 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 241 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
245 rds_ring = &recv_ctx->rds_rings[ring]; 242 rds_ring = &recv_ctx->rds_rings[ring];
246 switch (ring) { 243 switch (ring) {
@@ -292,9 +289,8 @@ int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
292 * Now go through all of them, set reference handles 289 * Now go through all of them, set reference handles
293 * and put them in the queues. 290 * and put them in the queues.
294 */ 291 */
295 num_rx_bufs = rds_ring->num_desc;
296 rx_buf = rds_ring->rx_buf_arr; 292 rx_buf = rds_ring->rx_buf_arr;
297 for (i = 0; i < num_rx_bufs; i++) { 293 for (i = 0; i < rds_ring->num_desc; i++) {
298 list_add_tail(&rx_buf->list, 294 list_add_tail(&rx_buf->list,
299 &rds_ring->free_list); 295 &rds_ring->free_list);
300 rx_buf->ref_handle = i; 296 rx_buf->ref_handle = i;
@@ -307,8 +303,6 @@ int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
307 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 303 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
308 sds_ring = &recv_ctx->sds_rings[ring]; 304 sds_ring = &recv_ctx->sds_rings[ring];
309 sds_ring->irq = adapter->msix_entries[ring].vector; 305 sds_ring->irq = adapter->msix_entries[ring].vector;
310 sds_ring->clean_tx = (ring == 0);
311 sds_ring->post_rxd = (ring == 0);
312 sds_ring->adapter = adapter; 306 sds_ring->adapter = adapter;
313 sds_ring->num_desc = adapter->num_rxd; 307 sds_ring->num_desc = adapter->num_rxd;
314 308
@@ -325,13 +319,15 @@ err_out:
325 319
326void netxen_initialize_adapter_ops(struct netxen_adapter *adapter) 320void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
327{ 321{
322 adapter->macaddr_set = netxen_p2_nic_set_mac_addr;
323 adapter->set_multi = netxen_p2_nic_set_multi;
324
328 switch (adapter->ahw.port_type) { 325 switch (adapter->ahw.port_type) {
329 case NETXEN_NIC_GBE: 326 case NETXEN_NIC_GBE:
330 adapter->enable_phy_interrupts = 327 adapter->enable_phy_interrupts =
331 netxen_niu_gbe_enable_phy_interrupts; 328 netxen_niu_gbe_enable_phy_interrupts;
332 adapter->disable_phy_interrupts = 329 adapter->disable_phy_interrupts =
333 netxen_niu_gbe_disable_phy_interrupts; 330 netxen_niu_gbe_disable_phy_interrupts;
334 adapter->macaddr_set = netxen_niu_macaddr_set;
335 adapter->set_mtu = netxen_nic_set_mtu_gb; 331 adapter->set_mtu = netxen_nic_set_mtu_gb;
336 adapter->set_promisc = netxen_niu_set_promiscuous_mode; 332 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
337 adapter->phy_read = netxen_niu_gbe_phy_read; 333 adapter->phy_read = netxen_niu_gbe_phy_read;
@@ -345,7 +341,6 @@ void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
345 netxen_niu_xgbe_enable_phy_interrupts; 341 netxen_niu_xgbe_enable_phy_interrupts;
346 adapter->disable_phy_interrupts = 342 adapter->disable_phy_interrupts =
347 netxen_niu_xgbe_disable_phy_interrupts; 343 netxen_niu_xgbe_disable_phy_interrupts;
348 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
349 adapter->set_mtu = netxen_nic_set_mtu_xgb; 344 adapter->set_mtu = netxen_nic_set_mtu_xgb;
350 adapter->init_port = netxen_niu_xg_init_port; 345 adapter->init_port = netxen_niu_xg_init_port;
351 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode; 346 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
@@ -359,6 +354,8 @@ void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
359 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 354 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
360 adapter->set_mtu = nx_fw_cmd_set_mtu; 355 adapter->set_mtu = nx_fw_cmd_set_mtu;
361 adapter->set_promisc = netxen_p3_nic_set_promisc; 356 adapter->set_promisc = netxen_p3_nic_set_promisc;
357 adapter->macaddr_set = netxen_p3_nic_set_mac_addr;
358 adapter->set_multi = netxen_p3_nic_set_multi;
362 } 359 }
363} 360}
364 361
@@ -400,8 +397,7 @@ static int rom_lock(struct netxen_adapter *adapter)
400 397
401 while (!done) { 398 while (!done) {
402 /* acquire semaphore2 from PCI HW block */ 399 /* acquire semaphore2 from PCI HW block */
403 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK), 400 done = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK));
404 &done);
405 if (done == 1) 401 if (done == 1)
406 break; 402 break;
407 if (timeout >= rom_lock_timeout) 403 if (timeout >= rom_lock_timeout)
@@ -418,7 +414,7 @@ static int rom_lock(struct netxen_adapter *adapter)
418 cpu_relax(); /*This a nop instr on i386 */ 414 cpu_relax(); /*This a nop instr on i386 */
419 } 415 }
420 } 416 }
421 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER); 417 NXWR32(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
422 return 0; 418 return 0;
423} 419}
424 420
@@ -430,7 +426,7 @@ static int netxen_wait_rom_done(struct netxen_adapter *adapter)
430 cond_resched(); 426 cond_resched();
431 427
432 while (done == 0) { 428 while (done == 0) {
433 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS); 429 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
434 done &= 2; 430 done &= 2;
435 timeout++; 431 timeout++;
436 if (timeout >= rom_max_timeout) { 432 if (timeout >= rom_max_timeout) {
@@ -443,30 +439,28 @@ static int netxen_wait_rom_done(struct netxen_adapter *adapter)
443 439
444static void netxen_rom_unlock(struct netxen_adapter *adapter) 440static void netxen_rom_unlock(struct netxen_adapter *adapter)
445{ 441{
446 u32 val;
447
448 /* release semaphore2 */ 442 /* release semaphore2 */
449 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val); 443 NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK));
450 444
451} 445}
452 446
453static int do_rom_fast_read(struct netxen_adapter *adapter, 447static int do_rom_fast_read(struct netxen_adapter *adapter,
454 int addr, int *valp) 448 int addr, int *valp)
455{ 449{
456 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); 450 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
457 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 451 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
458 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); 452 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
459 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); 453 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
460 if (netxen_wait_rom_done(adapter)) { 454 if (netxen_wait_rom_done(adapter)) {
461 printk("Error waiting for rom done\n"); 455 printk("Error waiting for rom done\n");
462 return -EIO; 456 return -EIO;
463 } 457 }
464 /* reset abyte_cnt and dummy_byte_cnt */ 458 /* reset abyte_cnt and dummy_byte_cnt */
465 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); 459 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
466 udelay(10); 460 udelay(10);
467 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 461 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
468 462
469 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA); 463 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
470 return 0; 464 return 0;
471} 465}
472 466
@@ -530,8 +524,7 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
530 524
531 /* resetall */ 525 /* resetall */
532 rom_lock(adapter); 526 rom_lock(adapter);
533 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 527 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
534 0xffffffff);
535 netxen_rom_unlock(adapter); 528 netxen_rom_unlock(adapter);
536 529
537 if (verbose) { 530 if (verbose) {
@@ -655,7 +648,7 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
655 } 648 }
656 } 649 }
657 650
658 adapter->hw_write_wx(adapter, off, &buf[i].data, 4); 651 NXWR32(adapter, off, buf[i].data);
659 652
660 msleep(init_delay); 653 msleep(init_delay);
661 } 654 }
@@ -665,36 +658,230 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
665 658
666 /* unreset_net_cache */ 659 /* unreset_net_cache */
667 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 660 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
668 adapter->hw_read_wx(adapter, 661 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
669 NETXEN_ROMUSB_GLB_SW_RESET, &val, 4); 662 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
670 netxen_crb_writelit_adapter(adapter,
671 NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
672 } 663 }
673 664
674 /* p2dn replyCount */ 665 /* p2dn replyCount */
675 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e); 666 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
676 /* disable_peg_cache 0 */ 667 /* disable_peg_cache 0 */
677 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8); 668 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
678 /* disable_peg_cache 1 */ 669 /* disable_peg_cache 1 */
679 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8); 670 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
680 671
681 /* peg_clr_all */ 672 /* peg_clr_all */
682 673
683 /* peg_clr 0 */ 674 /* peg_clr 0 */
684 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0); 675 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
685 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0); 676 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
686 /* peg_clr 1 */ 677 /* peg_clr 1 */
687 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0); 678 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
688 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0); 679 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
689 /* peg_clr 2 */ 680 /* peg_clr 2 */
690 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0); 681 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
691 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0); 682 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
692 /* peg_clr 3 */ 683 /* peg_clr 3 */
693 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0); 684 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
694 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0); 685 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
686 return 0;
687}
688
689int
690netxen_load_firmware(struct netxen_adapter *adapter)
691{
692 u64 *ptr64;
693 u32 i, flashaddr, size;
694 const struct firmware *fw = adapter->fw;
695
696 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
697 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
698
699 if (fw) {
700 __le64 data;
701
702 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
703
704 ptr64 = (u64 *)&fw->data[NETXEN_BOOTLD_START];
705 flashaddr = NETXEN_BOOTLD_START;
706
707 for (i = 0; i < size; i++) {
708 data = cpu_to_le64(ptr64[i]);
709 adapter->pci_mem_write(adapter, flashaddr, &data, 8);
710 flashaddr += 8;
711 }
712
713 size = *(u32 *)&fw->data[NX_FW_SIZE_OFFSET];
714 size = (__force u32)cpu_to_le32(size) / 8;
715
716 ptr64 = (u64 *)&fw->data[NETXEN_IMAGE_START];
717 flashaddr = NETXEN_IMAGE_START;
718
719 for (i = 0; i < size; i++) {
720 data = cpu_to_le64(ptr64[i]);
721
722 if (adapter->pci_mem_write(adapter,
723 flashaddr, &data, 8))
724 return -EIO;
725
726 flashaddr += 8;
727 }
728 } else {
729 u32 data;
730
731 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 4;
732 flashaddr = NETXEN_BOOTLD_START;
733
734 for (i = 0; i < size; i++) {
735 if (netxen_rom_fast_read(adapter,
736 flashaddr, (int *)&data) != 0)
737 return -EIO;
738
739 if (adapter->pci_mem_write(adapter,
740 flashaddr, &data, 4))
741 return -EIO;
742
743 flashaddr += 4;
744 }
745 }
746 msleep(1);
747
748 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
749 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
750 else {
751 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
752 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
753 }
754
755 return 0;
756}
757
758static int
759netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname)
760{
761 __le32 val;
762 u32 major, minor, build, ver, min_ver, bios;
763 struct pci_dev *pdev = adapter->pdev;
764 const struct firmware *fw = adapter->fw;
765
766 if (fw->size < NX_FW_MIN_SIZE)
767 return -EINVAL;
768
769 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
770 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
771 return -EINVAL;
772
773 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
774 major = (__force u32)val & 0xff;
775 minor = ((__force u32)val >> 8) & 0xff;
776 build = (__force u32)val >> 16;
777
778 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
779 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
780 else
781 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
782
783 ver = NETXEN_VERSION_CODE(major, minor, build);
784
785 if ((major > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
786 dev_err(&pdev->dev,
787 "%s: firmware version %d.%d.%d unsupported\n",
788 fwname, major, minor, build);
789 return -EINVAL;
790 }
791
792 val = cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
793 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
794 if ((__force u32)val != bios) {
795 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
796 fwname);
797 return -EINVAL;
798 }
799
800 /* check if flashed firmware is newer */
801 if (netxen_rom_fast_read(adapter,
802 NX_FW_VERSION_OFFSET, (int *)&val))
803 return -EIO;
804 major = (__force u32)val & 0xff;
805 minor = ((__force u32)val >> 8) & 0xff;
806 build = (__force u32)val >> 16;
807 if (NETXEN_VERSION_CODE(major, minor, build) > ver)
808 return -EINVAL;
809
810 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
695 return 0; 811 return 0;
696} 812}
697 813
814static char *fw_name[] = { "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin" };
815
816void netxen_request_firmware(struct netxen_adapter *adapter)
817{
818 u32 capability, flashed_ver;
819 int fw_type;
820 struct pci_dev *pdev = adapter->pdev;
821 int rc = 0;
822
823 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
824 fw_type = NX_P2_MN_ROMIMAGE;
825 goto request_fw;
826 } else {
827 fw_type = NX_P3_CT_ROMIMAGE;
828 goto request_fw;
829 }
830
831request_mn:
832 capability = 0;
833
834 netxen_rom_fast_read(adapter,
835 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
836 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
837 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
838 if (capability & NX_PEG_TUNE_MN_PRESENT) {
839 fw_type = NX_P3_MN_ROMIMAGE;
840 goto request_fw;
841 }
842 }
843
844request_fw:
845 rc = request_firmware(&adapter->fw, fw_name[fw_type], &pdev->dev);
846 if (rc != 0) {
847 if (fw_type == NX_P3_CT_ROMIMAGE) {
848 msleep(1);
849 goto request_mn;
850 }
851
852 adapter->fw = NULL;
853 goto done;
854 }
855
856 rc = netxen_validate_firmware(adapter, fw_name[fw_type]);
857 if (rc != 0) {
858 release_firmware(adapter->fw);
859
860 if (fw_type == NX_P3_CT_ROMIMAGE) {
861 msleep(1);
862 goto request_mn;
863 }
864
865 adapter->fw = NULL;
866 goto done;
867 }
868
869done:
870 if (adapter->fw)
871 dev_info(&pdev->dev, "loading firmware from file %s\n",
872 fw_name[fw_type]);
873 else
874 dev_info(&pdev->dev, "loading firmware from flash\n");
875}
876
877
878void
879netxen_release_firmware(struct netxen_adapter *adapter)
880{
881 if (adapter->fw)
882 release_firmware(adapter->fw);
883}
884
698int netxen_initialize_adapter_offload(struct netxen_adapter *adapter) 885int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
699{ 886{
700 uint64_t addr; 887 uint64_t addr;
@@ -715,12 +902,12 @@ int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
715 hi = (addr >> 32) & 0xffffffff; 902 hi = (addr >> 32) & 0xffffffff;
716 lo = addr & 0xffffffff; 903 lo = addr & 0xffffffff;
717 904
718 adapter->pci_write_normalize(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi); 905 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
719 adapter->pci_write_normalize(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo); 906 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
720 907
721 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 908 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
722 uint32_t temp = 0; 909 uint32_t temp = 0;
723 adapter->hw_write_wx(adapter, CRB_HOST_DUMMY_BUF, &temp, 4); 910 NXWR32(adapter, CRB_HOST_DUMMY_BUF, temp);
724 } 911 }
725 912
726 return 0; 913 return 0;
@@ -762,8 +949,7 @@ int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
762 949
763 if (!pegtune_val) { 950 if (!pegtune_val) {
764 do { 951 do {
765 val = adapter->pci_read_normalize(adapter, 952 val = NXRD32(adapter, CRB_CMDPEG_STATE);
766 CRB_CMDPEG_STATE);
767 953
768 if (val == PHAN_INITIALIZE_COMPLETE || 954 if (val == PHAN_INITIALIZE_COMPLETE ||
769 val == PHAN_INITIALIZE_ACK) 955 val == PHAN_INITIALIZE_ACK)
@@ -774,7 +960,7 @@ int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
774 } while (--retries); 960 } while (--retries);
775 961
776 if (!retries) { 962 if (!retries) {
777 pegtune_val = adapter->pci_read_normalize(adapter, 963 pegtune_val = NXRD32(adapter,
778 NETXEN_ROMUSB_GLB_PEGTUNE_DONE); 964 NETXEN_ROMUSB_GLB_PEGTUNE_DONE);
779 printk(KERN_WARNING "netxen_phantom_init: init failed, " 965 printk(KERN_WARNING "netxen_phantom_init: init failed, "
780 "pegtune_val=%x\n", pegtune_val); 966 "pegtune_val=%x\n", pegtune_val);
@@ -785,13 +971,14 @@ int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
785 return 0; 971 return 0;
786} 972}
787 973
788int netxen_receive_peg_ready(struct netxen_adapter *adapter) 974static int
975netxen_receive_peg_ready(struct netxen_adapter *adapter)
789{ 976{
790 u32 val = 0; 977 u32 val = 0;
791 int retries = 2000; 978 int retries = 2000;
792 979
793 do { 980 do {
794 val = adapter->pci_read_normalize(adapter, CRB_RCVPEG_STATE); 981 val = NXRD32(adapter, CRB_RCVPEG_STATE);
795 982
796 if (val == PHAN_PEG_RCV_INITIALIZED) 983 if (val == PHAN_PEG_RCV_INITIALIZED)
797 return 0; 984 return 0;
@@ -809,6 +996,93 @@ int netxen_receive_peg_ready(struct netxen_adapter *adapter)
809 return 0; 996 return 0;
810} 997}
811 998
999int netxen_init_firmware(struct netxen_adapter *adapter)
1000{
1001 int err;
1002
1003 err = netxen_receive_peg_ready(adapter);
1004 if (err)
1005 return err;
1006
1007 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1008 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1009 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1010 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1011
1012 if (adapter->fw_version >= NETXEN_VERSION_CODE(4, 0, 222)) {
1013 adapter->capabilities = NXRD32(adapter, CRB_FW_CAPABILITIES_1);
1014 }
1015
1016 return err;
1017}
1018
1019static void
1020netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1021{
1022 u32 cable_OUI;
1023 u16 cable_len;
1024 u16 link_speed;
1025 u8 link_status, module, duplex, autoneg;
1026 struct net_device *netdev = adapter->netdev;
1027
1028 adapter->has_link_events = 1;
1029
1030 cable_OUI = msg->body[1] & 0xffffffff;
1031 cable_len = (msg->body[1] >> 32) & 0xffff;
1032 link_speed = (msg->body[1] >> 48) & 0xffff;
1033
1034 link_status = msg->body[2] & 0xff;
1035 duplex = (msg->body[2] >> 16) & 0xff;
1036 autoneg = (msg->body[2] >> 24) & 0xff;
1037
1038 module = (msg->body[2] >> 8) & 0xff;
1039 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1040 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1041 netdev->name, cable_OUI, cable_len);
1042 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1043 printk(KERN_INFO "%s: unsupported cable length %d\n",
1044 netdev->name, cable_len);
1045 }
1046
1047 netxen_advert_link_change(adapter, link_status);
1048
1049 /* update link parameters */
1050 if (duplex == LINKEVENT_FULL_DUPLEX)
1051 adapter->link_duplex = DUPLEX_FULL;
1052 else
1053 adapter->link_duplex = DUPLEX_HALF;
1054 adapter->module_type = module;
1055 adapter->link_autoneg = autoneg;
1056 adapter->link_speed = link_speed;
1057}
1058
1059static void
1060netxen_handle_fw_message(int desc_cnt, int index,
1061 struct nx_host_sds_ring *sds_ring)
1062{
1063 nx_fw_msg_t msg;
1064 struct status_desc *desc;
1065 int i = 0, opcode;
1066
1067 while (desc_cnt > 0 && i < 8) {
1068 desc = &sds_ring->desc_head[index];
1069 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1070 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1071
1072 index = get_next_index(index, sds_ring->num_desc);
1073 desc_cnt--;
1074 }
1075
1076 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1077 switch (opcode) {
1078 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1079 netxen_handle_linkevent(sds_ring->adapter, &msg);
1080 break;
1081 default:
1082 break;
1083 }
1084}
1085
812static int 1086static int
813netxen_alloc_rx_skb(struct netxen_adapter *adapter, 1087netxen_alloc_rx_skb(struct netxen_adapter *adapter,
814 struct nx_host_rds_ring *rds_ring, 1088 struct nx_host_rds_ring *rds_ring,
@@ -874,7 +1148,8 @@ no_skb:
874 1148
875static struct netxen_rx_buffer * 1149static struct netxen_rx_buffer *
876netxen_process_rcv(struct netxen_adapter *adapter, 1150netxen_process_rcv(struct netxen_adapter *adapter,
877 int ring, int index, int length, int cksum, int pkt_offset) 1151 int ring, int index, int length, int cksum, int pkt_offset,
1152 struct nx_host_sds_ring *sds_ring)
878{ 1153{
879 struct net_device *netdev = adapter->netdev; 1154 struct net_device *netdev = adapter->netdev;
880 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1155 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
@@ -902,7 +1177,7 @@ netxen_process_rcv(struct netxen_adapter *adapter,
902 1177
903 skb->protocol = eth_type_trans(skb, netdev); 1178 skb->protocol = eth_type_trans(skb, netdev);
904 1179
905 netif_receive_skb(skb); 1180 napi_gro_receive(&sds_ring->napi, skb);
906 1181
907 adapter->stats.no_rcv++; 1182 adapter->stats.no_rcv++;
908 adapter->stats.rxbytes += length; 1183 adapter->stats.rxbytes += length;
@@ -927,35 +1202,53 @@ netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
927 1202
928 int count = 0; 1203 int count = 0;
929 u64 sts_data; 1204 u64 sts_data;
930 int opcode, ring, index, length, cksum, pkt_offset; 1205 int opcode, ring, index, length, cksum, pkt_offset, desc_cnt;
931 1206
932 while (count < max) { 1207 while (count < max) {
933 desc = &sds_ring->desc_head[consumer]; 1208 desc = &sds_ring->desc_head[consumer];
934 sts_data = le64_to_cpu(desc->status_desc_data); 1209 sts_data = le64_to_cpu(desc->status_desc_data[0]);
935 1210
936 if (!(sts_data & STATUS_OWNER_HOST)) 1211 if (!(sts_data & STATUS_OWNER_HOST))
937 break; 1212 break;
938 1213
1214 desc_cnt = netxen_get_sts_desc_cnt(sts_data);
939 ring = netxen_get_sts_type(sts_data); 1215 ring = netxen_get_sts_type(sts_data);
1216
940 if (ring > RCV_RING_JUMBO) 1217 if (ring > RCV_RING_JUMBO)
941 continue; 1218 goto skip;
942 1219
943 opcode = netxen_get_sts_opcode(sts_data); 1220 opcode = netxen_get_sts_opcode(sts_data);
944 1221
1222 switch (opcode) {
1223 case NETXEN_NIC_RXPKT_DESC:
1224 case NETXEN_OLD_RXPKT_DESC:
1225 break;
1226 case NETXEN_NIC_RESPONSE_DESC:
1227 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1228 default:
1229 goto skip;
1230 }
1231
1232 WARN_ON(desc_cnt > 1);
1233
945 index = netxen_get_sts_refhandle(sts_data); 1234 index = netxen_get_sts_refhandle(sts_data);
946 length = netxen_get_sts_totallength(sts_data); 1235 length = netxen_get_sts_totallength(sts_data);
947 cksum = netxen_get_sts_status(sts_data); 1236 cksum = netxen_get_sts_status(sts_data);
948 pkt_offset = netxen_get_sts_pkt_offset(sts_data); 1237 pkt_offset = netxen_get_sts_pkt_offset(sts_data);
949 1238
950 rxbuf = netxen_process_rcv(adapter, ring, index, 1239 rxbuf = netxen_process_rcv(adapter, ring, index,
951 length, cksum, pkt_offset); 1240 length, cksum, pkt_offset, sds_ring);
952 1241
953 if (rxbuf) 1242 if (rxbuf)
954 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]); 1243 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
955 1244
956 desc->status_desc_data = cpu_to_le64(STATUS_OWNER_PHANTOM); 1245skip:
957 1246 for (; desc_cnt > 0; desc_cnt--) {
958 consumer = get_next_index(consumer, sds_ring->num_desc); 1247 desc = &sds_ring->desc_head[consumer];
1248 desc->status_desc_data[0] =
1249 cpu_to_le64(STATUS_OWNER_PHANTOM);
1250 consumer = get_next_index(consumer, sds_ring->num_desc);
1251 }
959 count++; 1252 count++;
960 } 1253 }
961 1254
@@ -980,8 +1273,7 @@ netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
980 1273
981 if (count) { 1274 if (count) {
982 sds_ring->consumer = consumer; 1275 sds_ring->consumer = consumer;
983 adapter->pci_write_normalize(adapter, 1276 NXWR32(adapter, sds_ring->crb_sts_consumer, consumer);
984 sds_ring->crb_sts_consumer, consumer);
985 } 1277 }
986 1278
987 return count; 1279 return count;
@@ -990,23 +1282,24 @@ netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
990/* Process Command status ring */ 1282/* Process Command status ring */
991int netxen_process_cmd_ring(struct netxen_adapter *adapter) 1283int netxen_process_cmd_ring(struct netxen_adapter *adapter)
992{ 1284{
993 u32 last_consumer, consumer; 1285 u32 sw_consumer, hw_consumer;
994 int count = 0, i; 1286 int count = 0, i;
995 struct netxen_cmd_buffer *buffer; 1287 struct netxen_cmd_buffer *buffer;
996 struct pci_dev *pdev = adapter->pdev; 1288 struct pci_dev *pdev = adapter->pdev;
997 struct net_device *netdev = adapter->netdev; 1289 struct net_device *netdev = adapter->netdev;
998 struct netxen_skb_frag *frag; 1290 struct netxen_skb_frag *frag;
999 int done = 0; 1291 int done = 0;
1292 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1000 1293
1001 if (!spin_trylock(&adapter->tx_clean_lock)) 1294 if (!spin_trylock(&adapter->tx_clean_lock))
1002 return 1; 1295 return 1;
1003 1296
1004 last_consumer = adapter->last_cmd_consumer; 1297 sw_consumer = tx_ring->sw_consumer;
1005 barrier(); /* cmd_consumer can change underneath */ 1298 barrier(); /* hw_consumer can change underneath */
1006 consumer = le32_to_cpu(*(adapter->cmd_consumer)); 1299 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1007 1300
1008 while (last_consumer != consumer) { 1301 while (sw_consumer != hw_consumer) {
1009 buffer = &adapter->cmd_buf_arr[last_consumer]; 1302 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1010 if (buffer->skb) { 1303 if (buffer->skb) {
1011 frag = &buffer->frag_array[0]; 1304 frag = &buffer->frag_array[0];
1012 pci_unmap_single(pdev, frag->dma, frag->length, 1305 pci_unmap_single(pdev, frag->dma, frag->length,
@@ -1024,16 +1317,16 @@ int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1024 buffer->skb = NULL; 1317 buffer->skb = NULL;
1025 } 1318 }
1026 1319
1027 last_consumer = get_next_index(last_consumer, 1320 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1028 adapter->num_txd);
1029 if (++count >= MAX_STATUS_HANDLE) 1321 if (++count >= MAX_STATUS_HANDLE)
1030 break; 1322 break;
1031 } 1323 }
1032 1324
1033 if (count) { 1325 tx_ring->sw_consumer = sw_consumer;
1034 adapter->last_cmd_consumer = last_consumer; 1326
1327 if (count && netif_running(netdev)) {
1035 smp_mb(); 1328 smp_mb();
1036 if (netif_queue_stopped(netdev) && netif_running(netdev)) { 1329 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) {
1037 netif_tx_lock(netdev); 1330 netif_tx_lock(netdev);
1038 netif_wake_queue(netdev); 1331 netif_wake_queue(netdev);
1039 smp_mb(); 1332 smp_mb();
@@ -1053,9 +1346,9 @@ int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1053 * There is still a possible race condition and the host could miss an 1346 * There is still a possible race condition and the host could miss an
1054 * interrupt. The card has to take care of this. 1347 * interrupt. The card has to take care of this.
1055 */ 1348 */
1056 barrier(); /* cmd_consumer can change underneath */ 1349 barrier(); /* hw_consumer can change underneath */
1057 consumer = le32_to_cpu(*(adapter->cmd_consumer)); 1350 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1058 done = (last_consumer == consumer); 1351 done = (sw_consumer == hw_consumer);
1059 spin_unlock(&adapter->tx_clean_lock); 1352 spin_unlock(&adapter->tx_clean_lock);
1060 1353
1061 return (done); 1354 return (done);
@@ -1099,8 +1392,7 @@ netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1099 1392
1100 if (count) { 1393 if (count) {
1101 rds_ring->producer = producer; 1394 rds_ring->producer = producer;
1102 adapter->pci_write_normalize(adapter, 1395 NXWR32(adapter, rds_ring->crb_rcv_producer,
1103 rds_ring->crb_rcv_producer,
1104 (producer-1) & (rds_ring->num_desc-1)); 1396 (producer-1) & (rds_ring->num_desc-1));
1105 1397
1106 if (adapter->fw_major < 4) { 1398 if (adapter->fw_major < 4) {
@@ -1160,10 +1452,8 @@ netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1160 1452
1161 if (count) { 1453 if (count) {
1162 rds_ring->producer = producer; 1454 rds_ring->producer = producer;
1163 adapter->pci_write_normalize(adapter, 1455 NXWR32(adapter, rds_ring->crb_rcv_producer,
1164 rds_ring->crb_rcv_producer,
1165 (producer - 1) & (rds_ring->num_desc - 1)); 1456 (producer - 1) & (rds_ring->num_desc - 1));
1166 wmb();
1167 } 1457 }
1168 spin_unlock(&rds_ring->lock); 1458 spin_unlock(&rds_ring->lock);
1169} 1459}
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c
index aef77289bd34..98737ef72936 100644
--- a/drivers/net/netxen/netxen_nic_main.c
+++ b/drivers/net/netxen/netxen_nic_main.c
@@ -29,7 +29,7 @@
29 */ 29 */
30 30
31#include <linux/vmalloc.h> 31#include <linux/vmalloc.h>
32#include <linux/highmem.h> 32#include <linux/interrupt.h>
33#include "netxen_nic_hw.h" 33#include "netxen_nic_hw.h"
34 34
35#include "netxen_nic.h" 35#include "netxen_nic.h"
@@ -107,10 +107,9 @@ static uint32_t crb_cmd_producer[4] = {
107 107
108void 108void
109netxen_nic_update_cmd_producer(struct netxen_adapter *adapter, 109netxen_nic_update_cmd_producer(struct netxen_adapter *adapter,
110 uint32_t crb_producer) 110 struct nx_host_tx_ring *tx_ring, u32 producer)
111{ 111{
112 adapter->pci_write_normalize(adapter, 112 NXWR32(adapter, tx_ring->crb_cmd_producer, producer);
113 adapter->crb_addr_cmd_producer, crb_producer);
114} 113}
115 114
116static uint32_t crb_cmd_consumer[4] = { 115static uint32_t crb_cmd_consumer[4] = {
@@ -120,10 +119,9 @@ static uint32_t crb_cmd_consumer[4] = {
120 119
121static inline void 120static inline void
122netxen_nic_update_cmd_consumer(struct netxen_adapter *adapter, 121netxen_nic_update_cmd_consumer(struct netxen_adapter *adapter,
123 u32 crb_consumer) 122 struct nx_host_tx_ring *tx_ring, u32 consumer)
124{ 123{
125 adapter->pci_write_normalize(adapter, 124 NXWR32(adapter, tx_ring->crb_cmd_consumer, consumer);
126 adapter->crb_addr_cmd_consumer, crb_consumer);
127} 125}
128 126
129static uint32_t msi_tgt_status[8] = { 127static uint32_t msi_tgt_status[8] = {
@@ -139,37 +137,54 @@ static inline void netxen_nic_disable_int(struct nx_host_sds_ring *sds_ring)
139{ 137{
140 struct netxen_adapter *adapter = sds_ring->adapter; 138 struct netxen_adapter *adapter = sds_ring->adapter;
141 139
142 adapter->pci_write_normalize(adapter, sds_ring->crb_intr_mask, 0); 140 NXWR32(adapter, sds_ring->crb_intr_mask, 0);
143} 141}
144 142
145static inline void netxen_nic_enable_int(struct nx_host_sds_ring *sds_ring) 143static inline void netxen_nic_enable_int(struct nx_host_sds_ring *sds_ring)
146{ 144{
147 struct netxen_adapter *adapter = sds_ring->adapter; 145 struct netxen_adapter *adapter = sds_ring->adapter;
148 146
149 adapter->pci_write_normalize(adapter, sds_ring->crb_intr_mask, 0x1); 147 NXWR32(adapter, sds_ring->crb_intr_mask, 0x1);
150 148
151 if (!NETXEN_IS_MSI_FAMILY(adapter)) 149 if (!NETXEN_IS_MSI_FAMILY(adapter))
152 adapter->pci_write_immediate(adapter, 150 adapter->pci_write_immediate(adapter,
153 adapter->legacy_intr.tgt_mask_reg, 0xfbff); 151 adapter->legacy_intr.tgt_mask_reg, 0xfbff);
154} 152}
155 153
154static int
155netxen_alloc_sds_rings(struct netxen_recv_context *recv_ctx, int count)
156{
157 int size = sizeof(struct nx_host_sds_ring) * count;
158
159 recv_ctx->sds_rings = kzalloc(size, GFP_KERNEL);
160
161 return (recv_ctx->sds_rings == NULL);
162}
163
156static void 164static void
165netxen_free_sds_rings(struct netxen_recv_context *recv_ctx)
166{
167 if (recv_ctx->sds_rings != NULL)
168 kfree(recv_ctx->sds_rings);
169}
170
171static int
157netxen_napi_add(struct netxen_adapter *adapter, struct net_device *netdev) 172netxen_napi_add(struct netxen_adapter *adapter, struct net_device *netdev)
158{ 173{
159 int ring; 174 int ring;
160 struct nx_host_sds_ring *sds_ring; 175 struct nx_host_sds_ring *sds_ring;
161 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 176 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
162 177
163 if (adapter->flags & NETXEN_NIC_MSIX_ENABLED) 178 if (netxen_alloc_sds_rings(recv_ctx, adapter->max_sds_rings))
164 adapter->max_sds_rings = (num_online_cpus() >= 4) ? 4 : 2; 179 return 1;
165 else
166 adapter->max_sds_rings = 1;
167 180
168 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 181 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
169 sds_ring = &recv_ctx->sds_rings[ring]; 182 sds_ring = &recv_ctx->sds_rings[ring];
170 netif_napi_add(netdev, &sds_ring->napi, 183 netif_napi_add(netdev, &sds_ring->napi,
171 netxen_nic_poll, NETXEN_NETDEV_WEIGHT); 184 netxen_nic_poll, NETXEN_NETDEV_WEIGHT);
172 } 185 }
186
187 return 0;
173} 188}
174 189
175static void 190static void
@@ -195,8 +210,9 @@ netxen_napi_disable(struct netxen_adapter *adapter)
195 210
196 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 211 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
197 sds_ring = &recv_ctx->sds_rings[ring]; 212 sds_ring = &recv_ctx->sds_rings[ring];
198 netxen_nic_disable_int(sds_ring);
199 napi_disable(&sds_ring->napi); 213 napi_disable(&sds_ring->napi);
214 netxen_nic_disable_int(sds_ring);
215 synchronize_irq(sds_ring->irq);
200 } 216 }
201} 217}
202 218
@@ -240,7 +256,7 @@ nx_update_dma_mask(struct netxen_adapter *adapter)
240 256
241 change = 0; 257 change = 0;
242 258
243 shift = netxen_nic_reg_read(adapter, CRB_DMA_SHIFT); 259 shift = NXRD32(adapter, CRB_DMA_SHIFT);
244 if (shift >= 32) 260 if (shift >= 32)
245 return 0; 261 return 0;
246 262
@@ -268,10 +284,21 @@ static void netxen_check_options(struct netxen_adapter *adapter)
268 else if (adapter->ahw.port_type == NETXEN_NIC_GBE) 284 else if (adapter->ahw.port_type == NETXEN_NIC_GBE)
269 adapter->num_rxd = MAX_RCV_DESCRIPTORS_1G; 285 adapter->num_rxd = MAX_RCV_DESCRIPTORS_1G;
270 286
271 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 287 adapter->msix_supported = 0;
288 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
272 adapter->msix_supported = !!use_msi_x; 289 adapter->msix_supported = !!use_msi_x;
273 else 290 adapter->rss_supported = !!use_msi_x;
274 adapter->msix_supported = 0; 291 } else if (adapter->fw_version >= NETXEN_VERSION_CODE(3, 4, 336)) {
292 switch (adapter->ahw.board_type) {
293 case NETXEN_BRDTYPE_P2_SB31_10G:
294 case NETXEN_BRDTYPE_P2_SB31_10G_CX4:
295 adapter->msix_supported = !!use_msi_x;
296 adapter->rss_supported = !!use_msi_x;
297 break;
298 default:
299 break;
300 }
301 }
275 302
276 adapter->num_txd = MAX_CMD_DESCRIPTORS_HOST; 303 adapter->num_txd = MAX_CMD_DESCRIPTORS_HOST;
277 adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS; 304 adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS;
@@ -287,43 +314,34 @@ netxen_check_hw_init(struct netxen_adapter *adapter, int first_boot)
287 314
288 if (first_boot == 0x55555555) { 315 if (first_boot == 0x55555555) {
289 /* This is the first boot after power up */ 316 /* This is the first boot after power up */
290 adapter->pci_write_normalize(adapter, 317 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
291 NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
292 318
293 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 319 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
294 return 0; 320 return 0;
295 321
296 /* PCI bus master workaround */ 322 /* PCI bus master workaround */
297 adapter->hw_read_wx(adapter, 323 first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4));
298 NETXEN_PCIE_REG(0x4), &first_boot, 4);
299 if (!(first_boot & 0x4)) { 324 if (!(first_boot & 0x4)) {
300 first_boot |= 0x4; 325 first_boot |= 0x4;
301 adapter->hw_write_wx(adapter, 326 NXWR32(adapter, NETXEN_PCIE_REG(0x4), first_boot);
302 NETXEN_PCIE_REG(0x4), &first_boot, 4); 327 first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4));
303 adapter->hw_read_wx(adapter,
304 NETXEN_PCIE_REG(0x4), &first_boot, 4);
305 } 328 }
306 329
307 /* This is the first boot after power up */ 330 /* This is the first boot after power up */
308 adapter->hw_read_wx(adapter, 331 first_boot = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
309 NETXEN_ROMUSB_GLB_SW_RESET, &first_boot, 4);
310 if (first_boot != 0x80000f) { 332 if (first_boot != 0x80000f) {
311 /* clear the register for future unloads/loads */ 333 /* clear the register for future unloads/loads */
312 adapter->pci_write_normalize(adapter, 334 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), 0);
313 NETXEN_CAM_RAM(0x1fc), 0);
314 return -EIO; 335 return -EIO;
315 } 336 }
316 337
317 /* Start P2 boot loader */ 338 /* Start P2 boot loader */
318 val = adapter->pci_read_normalize(adapter, 339 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE);
319 NETXEN_ROMUSB_GLB_PEGTUNE_DONE); 340 NXWR32(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE, val | 0x1);
320 adapter->pci_write_normalize(adapter,
321 NETXEN_ROMUSB_GLB_PEGTUNE_DONE, val | 0x1);
322 timeout = 0; 341 timeout = 0;
323 do { 342 do {
324 msleep(1); 343 msleep(1);
325 val = adapter->pci_read_normalize(adapter, 344 val = NXRD32(adapter, NETXEN_CAM_RAM(0x1fc));
326 NETXEN_CAM_RAM(0x1fc));
327 345
328 if (++timeout > 5000) 346 if (++timeout > 5000)
329 return -EIO; 347 return -EIO;
@@ -342,24 +360,19 @@ static void netxen_set_port_mode(struct netxen_adapter *adapter)
342 (val == NETXEN_BRDTYPE_P3_XG_LOM)) { 360 (val == NETXEN_BRDTYPE_P3_XG_LOM)) {
343 if (port_mode == NETXEN_PORT_MODE_802_3_AP) { 361 if (port_mode == NETXEN_PORT_MODE_802_3_AP) {
344 data = NETXEN_PORT_MODE_802_3_AP; 362 data = NETXEN_PORT_MODE_802_3_AP;
345 adapter->hw_write_wx(adapter, 363 NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data);
346 NETXEN_PORT_MODE_ADDR, &data, 4);
347 } else if (port_mode == NETXEN_PORT_MODE_XG) { 364 } else if (port_mode == NETXEN_PORT_MODE_XG) {
348 data = NETXEN_PORT_MODE_XG; 365 data = NETXEN_PORT_MODE_XG;
349 adapter->hw_write_wx(adapter, 366 NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data);
350 NETXEN_PORT_MODE_ADDR, &data, 4);
351 } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_1G) { 367 } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_1G) {
352 data = NETXEN_PORT_MODE_AUTO_NEG_1G; 368 data = NETXEN_PORT_MODE_AUTO_NEG_1G;
353 adapter->hw_write_wx(adapter, 369 NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data);
354 NETXEN_PORT_MODE_ADDR, &data, 4);
355 } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_XG) { 370 } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_XG) {
356 data = NETXEN_PORT_MODE_AUTO_NEG_XG; 371 data = NETXEN_PORT_MODE_AUTO_NEG_XG;
357 adapter->hw_write_wx(adapter, 372 NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data);
358 NETXEN_PORT_MODE_ADDR, &data, 4);
359 } else { 373 } else {
360 data = NETXEN_PORT_MODE_AUTO_NEG; 374 data = NETXEN_PORT_MODE_AUTO_NEG;
361 adapter->hw_write_wx(adapter, 375 NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data);
362 NETXEN_PORT_MODE_ADDR, &data, 4);
363 } 376 }
364 377
365 if ((wol_port_mode != NETXEN_PORT_MODE_802_3_AP) && 378 if ((wol_port_mode != NETXEN_PORT_MODE_802_3_AP) &&
@@ -368,8 +381,7 @@ static void netxen_set_port_mode(struct netxen_adapter *adapter)
368 (wol_port_mode != NETXEN_PORT_MODE_AUTO_NEG_XG)) { 381 (wol_port_mode != NETXEN_PORT_MODE_AUTO_NEG_XG)) {
369 wol_port_mode = NETXEN_PORT_MODE_AUTO_NEG; 382 wol_port_mode = NETXEN_PORT_MODE_AUTO_NEG;
370 } 383 }
371 adapter->hw_write_wx(adapter, NETXEN_WOL_PORT_MODE, 384 NXWR32(adapter, NETXEN_WOL_PORT_MODE, wol_port_mode);
372 &wol_port_mode, 4);
373 } 385 }
374} 386}
375 387
@@ -389,11 +401,11 @@ static void netxen_set_msix_bit(struct pci_dev *pdev, int enable)
389 } 401 }
390} 402}
391 403
392static void netxen_init_msix_entries(struct netxen_adapter *adapter) 404static void netxen_init_msix_entries(struct netxen_adapter *adapter, int count)
393{ 405{
394 int i; 406 int i;
395 407
396 for (i = 0; i < MSIX_ENTRIES_PER_ADAPTER; i++) 408 for (i = 0; i < count; i++)
397 adapter->msix_entries[i].entry = i; 409 adapter->msix_entries[i].entry = i;
398} 410}
399 411
@@ -424,20 +436,38 @@ netxen_read_mac_addr(struct netxen_adapter *adapter)
424 436
425 if (!is_valid_ether_addr(netdev->perm_addr)) 437 if (!is_valid_ether_addr(netdev->perm_addr))
426 dev_warn(&pdev->dev, "Bad MAC address %pM.\n", netdev->dev_addr); 438 dev_warn(&pdev->dev, "Bad MAC address %pM.\n", netdev->dev_addr);
427 else
428 adapter->macaddr_set(adapter, netdev->dev_addr);
429 439
430 return 0; 440 return 0;
431} 441}
432 442
443int netxen_nic_set_mac(struct net_device *netdev, void *p)
444{
445 struct netxen_adapter *adapter = netdev_priv(netdev);
446 struct sockaddr *addr = p;
447
448 if (!is_valid_ether_addr(addr->sa_data))
449 return -EINVAL;
450
451 if (netif_running(netdev)) {
452 netif_device_detach(netdev);
453 netxen_napi_disable(adapter);
454 }
455
456 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
457 adapter->macaddr_set(adapter, addr->sa_data);
458
459 if (netif_running(netdev)) {
460 netif_device_attach(netdev);
461 netxen_napi_enable(adapter);
462 }
463 return 0;
464}
465
433static void netxen_set_multicast_list(struct net_device *dev) 466static void netxen_set_multicast_list(struct net_device *dev)
434{ 467{
435 struct netxen_adapter *adapter = netdev_priv(dev); 468 struct netxen_adapter *adapter = netdev_priv(dev);
436 469
437 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 470 adapter->set_multi(dev);
438 netxen_p3_nic_set_multi(dev);
439 else
440 netxen_p2_nic_set_multi(dev);
441} 471}
442 472
443static const struct net_device_ops netxen_netdev_ops = { 473static const struct net_device_ops netxen_netdev_ops = {
@@ -460,10 +490,17 @@ netxen_setup_intr(struct netxen_adapter *adapter)
460{ 490{
461 struct netxen_legacy_intr_set *legacy_intrp; 491 struct netxen_legacy_intr_set *legacy_intrp;
462 struct pci_dev *pdev = adapter->pdev; 492 struct pci_dev *pdev = adapter->pdev;
493 int err, num_msix;
494
495 if (adapter->rss_supported) {
496 num_msix = (num_online_cpus() >= MSIX_ENTRIES_PER_ADAPTER) ?
497 MSIX_ENTRIES_PER_ADAPTER : 2;
498 } else
499 num_msix = 1;
500
501 adapter->max_sds_rings = 1;
463 502
464 adapter->flags &= ~(NETXEN_NIC_MSI_ENABLED | NETXEN_NIC_MSIX_ENABLED); 503 adapter->flags &= ~(NETXEN_NIC_MSI_ENABLED | NETXEN_NIC_MSIX_ENABLED);
465 adapter->intr_scheme = -1;
466 adapter->msi_mode = -1;
467 504
468 if (adapter->ahw.revision_id >= NX_P3_B0) 505 if (adapter->ahw.revision_id >= NX_P3_B0)
469 legacy_intrp = &legacy_intr[adapter->ahw.pci_func]; 506 legacy_intrp = &legacy_intr[adapter->ahw.pci_func];
@@ -478,24 +515,36 @@ netxen_setup_intr(struct netxen_adapter *adapter)
478 515
479 if (adapter->msix_supported) { 516 if (adapter->msix_supported) {
480 517
481 netxen_init_msix_entries(adapter); 518 netxen_init_msix_entries(adapter, num_msix);
482 if (pci_enable_msix(pdev, adapter->msix_entries, 519 err = pci_enable_msix(pdev, adapter->msix_entries, num_msix);
483 MSIX_ENTRIES_PER_ADAPTER)) 520 if (err == 0) {
484 goto request_msi; 521 adapter->flags |= NETXEN_NIC_MSIX_ENABLED;
522 netxen_set_msix_bit(pdev, 1);
485 523
486 adapter->flags |= NETXEN_NIC_MSIX_ENABLED; 524 if (adapter->rss_supported)
487 netxen_set_msix_bit(pdev, 1); 525 adapter->max_sds_rings = num_msix;
488 dev_info(&pdev->dev, "using msi-x interrupts\n");
489 526
490 } else { 527 dev_info(&pdev->dev, "using msi-x interrupts\n");
491request_msi: 528 return;
492 if (use_msi && !pci_enable_msi(pdev)) { 529 }
493 adapter->flags |= NETXEN_NIC_MSI_ENABLED; 530
494 dev_info(&pdev->dev, "using msi interrupts\n"); 531 if (err > 0)
495 } else 532 pci_disable_msix(pdev);
496 dev_info(&pdev->dev, "using legacy interrupts\n"); 533
534 /* fall through for msi */
535 }
536
537 if (use_msi && !pci_enable_msi(pdev)) {
538 adapter->flags |= NETXEN_NIC_MSI_ENABLED;
539 adapter->msi_tgt_status =
540 msi_tgt_status[adapter->ahw.pci_func];
541 dev_info(&pdev->dev, "using msi interrupts\n");
497 adapter->msix_entries[0].vector = pdev->irq; 542 adapter->msix_entries[0].vector = pdev->irq;
543 return;
498 } 544 }
545
546 dev_info(&pdev->dev, "using legacy interrupts\n");
547 adapter->msix_entries[0].vector = pdev->irq;
499} 548}
500 549
501static void 550static void
@@ -552,8 +601,6 @@ netxen_setup_pci_map(struct netxen_adapter *adapter)
552 adapter->hw_read_wx = netxen_nic_hw_read_wx_128M; 601 adapter->hw_read_wx = netxen_nic_hw_read_wx_128M;
553 adapter->pci_read_immediate = netxen_nic_pci_read_immediate_128M; 602 adapter->pci_read_immediate = netxen_nic_pci_read_immediate_128M;
554 adapter->pci_write_immediate = netxen_nic_pci_write_immediate_128M; 603 adapter->pci_write_immediate = netxen_nic_pci_write_immediate_128M;
555 adapter->pci_read_normalize = netxen_nic_pci_read_normalize_128M;
556 adapter->pci_write_normalize = netxen_nic_pci_write_normalize_128M;
557 adapter->pci_set_window = netxen_nic_pci_set_window_128M; 604 adapter->pci_set_window = netxen_nic_pci_set_window_128M;
558 adapter->pci_mem_read = netxen_nic_pci_mem_read_128M; 605 adapter->pci_mem_read = netxen_nic_pci_mem_read_128M;
559 adapter->pci_mem_write = netxen_nic_pci_mem_write_128M; 606 adapter->pci_mem_write = netxen_nic_pci_mem_write_128M;
@@ -575,9 +622,6 @@ netxen_setup_pci_map(struct netxen_adapter *adapter)
575 adapter->pci_read_immediate = netxen_nic_pci_read_immediate_2M; 622 adapter->pci_read_immediate = netxen_nic_pci_read_immediate_2M;
576 adapter->pci_write_immediate = 623 adapter->pci_write_immediate =
577 netxen_nic_pci_write_immediate_2M; 624 netxen_nic_pci_write_immediate_2M;
578 adapter->pci_read_normalize = netxen_nic_pci_read_normalize_2M;
579 adapter->pci_write_normalize =
580 netxen_nic_pci_write_normalize_2M;
581 adapter->pci_set_window = netxen_nic_pci_set_window_2M; 625 adapter->pci_set_window = netxen_nic_pci_set_window_2M;
582 adapter->pci_mem_read = netxen_nic_pci_mem_read_2M; 626 adapter->pci_mem_read = netxen_nic_pci_mem_read_2M;
583 adapter->pci_mem_write = netxen_nic_pci_mem_write_2M; 627 adapter->pci_mem_write = netxen_nic_pci_mem_write_2M;
@@ -643,25 +687,22 @@ err_out:
643} 687}
644 688
645static int 689static int
646netxen_start_firmware(struct netxen_adapter *adapter) 690netxen_start_firmware(struct netxen_adapter *adapter, int request_fw)
647{ 691{
648 int val, err, first_boot; 692 int val, err, first_boot;
649 struct pci_dev *pdev = adapter->pdev; 693 struct pci_dev *pdev = adapter->pdev;
650 694
651 int first_driver = 0; 695 int first_driver = 0;
652 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 696
653 if (adapter->ahw.pci_func == 0) 697 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
654 first_driver = 1; 698 first_driver = (adapter->portnum == 0);
655 } else { 699 else
656 if (adapter->portnum == 0) 700 first_driver = (adapter->ahw.pci_func == 0);
657 first_driver = 1;
658 }
659 701
660 if (!first_driver) 702 if (!first_driver)
661 return 0; 703 return 0;
662 704
663 first_boot = adapter->pci_read_normalize(adapter, 705 first_boot = NXRD32(adapter, NETXEN_CAM_RAM(0x1fc));
664 NETXEN_CAM_RAM(0x1fc));
665 706
666 err = netxen_check_hw_init(adapter, first_boot); 707 err = netxen_check_hw_init(adapter, first_boot);
667 if (err) { 708 if (err) {
@@ -669,14 +710,16 @@ netxen_start_firmware(struct netxen_adapter *adapter)
669 return err; 710 return err;
670 } 711 }
671 712
713 if (request_fw)
714 netxen_request_firmware(adapter);
715
672 if (first_boot != 0x55555555) { 716 if (first_boot != 0x55555555) {
673 adapter->pci_write_normalize(adapter, 717 NXWR32(adapter, CRB_CMDPEG_STATE, 0);
674 CRB_CMDPEG_STATE, 0);
675 netxen_pinit_from_rom(adapter, 0); 718 netxen_pinit_from_rom(adapter, 0);
676 msleep(1); 719 msleep(1);
677 } 720 }
678 721
679 netxen_nic_reg_write(adapter, CRB_DMA_SHIFT, 0x55555555); 722 NXWR32(adapter, CRB_DMA_SHIFT, 0x55555555);
680 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 723 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
681 netxen_set_port_mode(adapter); 724 netxen_set_port_mode(adapter);
682 725
@@ -688,8 +731,7 @@ netxen_start_firmware(struct netxen_adapter *adapter)
688 val = 0x7654; 731 val = 0x7654;
689 if (adapter->ahw.port_type == NETXEN_NIC_XGBE) 732 if (adapter->ahw.port_type == NETXEN_NIC_XGBE)
690 val |= 0x0f000000; 733 val |= 0x0f000000;
691 netxen_crb_writelit_adapter(adapter, 734 NXWR32(adapter, NETXEN_MAC_ADDR_CNTL_REG, val);
692 NETXEN_MAC_ADDR_CNTL_REG, val);
693 735
694 } 736 }
695 737
@@ -703,7 +745,7 @@ netxen_start_firmware(struct netxen_adapter *adapter)
703 val = (_NETXEN_NIC_LINUX_MAJOR << 16) 745 val = (_NETXEN_NIC_LINUX_MAJOR << 16)
704 | ((_NETXEN_NIC_LINUX_MINOR << 8)) 746 | ((_NETXEN_NIC_LINUX_MINOR << 8))
705 | (_NETXEN_NIC_LINUX_SUBVERSION); 747 | (_NETXEN_NIC_LINUX_SUBVERSION);
706 adapter->pci_write_normalize(adapter, CRB_DRIVER_VERSION, val); 748 NXWR32(adapter, CRB_DRIVER_VERSION, val);
707 749
708 /* Handshake with the card before we register the devices. */ 750 /* Handshake with the card before we register the devices. */
709 err = netxen_phantom_init(adapter, NETXEN_NIC_PEG_TUNE); 751 err = netxen_phantom_init(adapter, NETXEN_NIC_PEG_TUNE);
@@ -726,15 +768,6 @@ netxen_nic_request_irq(struct netxen_adapter *adapter)
726 struct net_device *netdev = adapter->netdev; 768 struct net_device *netdev = adapter->netdev;
727 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 769 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
728 770
729 if ((adapter->msi_mode != MSI_MODE_MULTIFUNC) ||
730 (adapter->intr_scheme != INTR_SCHEME_PERPORT)) {
731 printk(KERN_ERR "%s: Firmware interrupt scheme is "
732 "incompatible with driver\n",
733 netdev->name);
734 adapter->driver_mismatch = 1;
735 return -EINVAL;
736 }
737
738 if (adapter->flags & NETXEN_NIC_MSIX_ENABLED) 771 if (adapter->flags & NETXEN_NIC_MSIX_ENABLED)
739 handler = netxen_msix_intr; 772 handler = netxen_msix_intr;
740 else if (adapter->flags & NETXEN_NIC_MSI_ENABLED) 773 else if (adapter->flags & NETXEN_NIC_MSI_ENABLED)
@@ -747,7 +780,7 @@ netxen_nic_request_irq(struct netxen_adapter *adapter)
747 780
748 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 781 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
749 sds_ring = &recv_ctx->sds_rings[ring]; 782 sds_ring = &recv_ctx->sds_rings[ring];
750 sprintf(sds_ring->name, "%16s[%d]", netdev->name, ring); 783 sprintf(sds_ring->name, "%s[%d]", netdev->name, ring);
751 err = request_irq(sds_ring->irq, handler, 784 err = request_irq(sds_ring->irq, handler,
752 flags, sds_ring->name, sds_ring); 785 flags, sds_ring->name, sds_ring);
753 if (err) 786 if (err)
@@ -782,22 +815,26 @@ netxen_nic_up(struct netxen_adapter *adapter, struct net_device *netdev)
782 netxen_nic_driver_name, adapter->portnum); 815 netxen_nic_driver_name, adapter->portnum);
783 return err; 816 return err;
784 } 817 }
785 adapter->macaddr_set(adapter, netdev->dev_addr); 818 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
786 819 adapter->macaddr_set(adapter, netdev->dev_addr);
787 netxen_nic_set_link_parameters(adapter);
788 820
789 netxen_set_multicast_list(netdev); 821 adapter->set_multi(netdev);
790 if (adapter->set_mtu) 822 adapter->set_mtu(adapter, netdev->mtu);
791 adapter->set_mtu(adapter, netdev->mtu);
792 823
793 adapter->ahw.linkup = 0; 824 adapter->ahw.linkup = 0;
794 mod_timer(&adapter->watchdog_timer, jiffies);
795 825
796 netxen_napi_enable(adapter); 826 netxen_napi_enable(adapter);
797 827
798 if (adapter->max_sds_rings > 1) 828 if (adapter->max_sds_rings > 1)
799 netxen_config_rss(adapter, 1); 829 netxen_config_rss(adapter, 1);
800 830
831 if (adapter->capabilities & NX_FW_CAPABILITY_LINK_NOTIFICATION)
832 netxen_linkevent_request(adapter, 1);
833 else
834 netxen_nic_set_link_parameters(adapter);
835
836 mod_timer(&adapter->watchdog_timer, jiffies);
837
801 return 0; 838 return 0;
802} 839}
803 840
@@ -806,11 +843,15 @@ netxen_nic_down(struct netxen_adapter *adapter, struct net_device *netdev)
806{ 843{
807 netif_carrier_off(netdev); 844 netif_carrier_off(netdev);
808 netif_stop_queue(netdev); 845 netif_stop_queue(netdev);
809 netxen_napi_disable(adapter);
810 846
811 if (adapter->stop_port) 847 if (adapter->stop_port)
812 adapter->stop_port(adapter); 848 adapter->stop_port(adapter);
813 849
850 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
851 netxen_p3_free_mac_list(adapter);
852
853 netxen_napi_disable(adapter);
854
814 netxen_release_tx_buffers(adapter); 855 netxen_release_tx_buffers(adapter);
815 856
816 FLUSH_SCHEDULED_WORK(); 857 FLUSH_SCHEDULED_WORK();
@@ -825,6 +866,7 @@ netxen_nic_attach(struct netxen_adapter *adapter)
825 struct pci_dev *pdev = adapter->pdev; 866 struct pci_dev *pdev = adapter->pdev;
826 int err, ring; 867 int err, ring;
827 struct nx_host_rds_ring *rds_ring; 868 struct nx_host_rds_ring *rds_ring;
869 struct nx_host_tx_ring *tx_ring;
828 870
829 err = netxen_init_firmware(adapter); 871 err = netxen_init_firmware(adapter);
830 if (err != 0) { 872 if (err != 0) {
@@ -854,13 +896,12 @@ netxen_nic_attach(struct netxen_adapter *adapter)
854 } 896 }
855 897
856 if (adapter->fw_major < 4) { 898 if (adapter->fw_major < 4) {
857 adapter->crb_addr_cmd_producer = 899 tx_ring = adapter->tx_ring;
858 crb_cmd_producer[adapter->portnum]; 900 tx_ring->crb_cmd_producer = crb_cmd_producer[adapter->portnum];
859 adapter->crb_addr_cmd_consumer = 901 tx_ring->crb_cmd_consumer = crb_cmd_consumer[adapter->portnum];
860 crb_cmd_consumer[adapter->portnum];
861 902
862 netxen_nic_update_cmd_producer(adapter, 0); 903 netxen_nic_update_cmd_producer(adapter, tx_ring, 0);
863 netxen_nic_update_cmd_consumer(adapter, 0); 904 netxen_nic_update_cmd_consumer(adapter, tx_ring, 0);
864 } 905 }
865 906
866 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 907 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
@@ -889,10 +930,9 @@ err_out_free_sw:
889static void 930static void
890netxen_nic_detach(struct netxen_adapter *adapter) 931netxen_nic_detach(struct netxen_adapter *adapter)
891{ 932{
892 netxen_nic_free_irq(adapter);
893
894 netxen_release_rx_buffers(adapter); 933 netxen_release_rx_buffers(adapter);
895 netxen_free_hw_resources(adapter); 934 netxen_free_hw_resources(adapter);
935 netxen_nic_free_irq(adapter);
896 netxen_free_sw_resources(adapter); 936 netxen_free_sw_resources(adapter);
897 937
898 adapter->is_up = 0; 938 adapter->is_up = 0;
@@ -957,6 +997,7 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
957 997
958 rwlock_init(&adapter->adapter_lock); 998 rwlock_init(&adapter->adapter_lock);
959 spin_lock_init(&adapter->tx_clean_lock); 999 spin_lock_init(&adapter->tx_clean_lock);
1000 INIT_LIST_HEAD(&adapter->mac_list);
960 1001
961 err = netxen_setup_pci_map(adapter); 1002 err = netxen_setup_pci_map(adapter);
962 if (err) 1003 if (err)
@@ -979,6 +1020,7 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
979 SET_ETHTOOL_OPS(netdev, &netxen_nic_ethtool_ops); 1020 SET_ETHTOOL_OPS(netdev, &netxen_nic_ethtool_ops);
980 1021
981 netdev->features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO); 1022 netdev->features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO);
1023 netdev->features |= (NETIF_F_GRO);
982 netdev->vlan_features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO); 1024 netdev->vlan_features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO);
983 1025
984 if (NX_IS_REVISION_P3(revision_id)) { 1026 if (NX_IS_REVISION_P3(revision_id)) {
@@ -1011,7 +1053,7 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1011 break; 1053 break;
1012 } 1054 }
1013 1055
1014 err = netxen_start_firmware(adapter); 1056 err = netxen_start_firmware(adapter, 1);
1015 if (err) 1057 if (err)
1016 goto err_out_iounmap; 1058 goto err_out_iounmap;
1017 1059
@@ -1024,8 +1066,7 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1024 */ 1066 */
1025 adapter->physical_port = adapter->portnum; 1067 adapter->physical_port = adapter->portnum;
1026 if (adapter->fw_major < 4) { 1068 if (adapter->fw_major < 4) {
1027 i = adapter->pci_read_normalize(adapter, 1069 i = NXRD32(adapter, CRB_V2P(adapter->portnum));
1028 CRB_V2P(adapter->portnum));
1029 if (i != 0x55555555) 1070 if (i != 0x55555555)
1030 adapter->physical_port = i; 1071 adapter->physical_port = i;
1031 } 1072 }
@@ -1036,10 +1077,7 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1036 1077
1037 netdev->irq = adapter->msix_entries[0].vector; 1078 netdev->irq = adapter->msix_entries[0].vector;
1038 1079
1039 netxen_napi_add(adapter, netdev); 1080 if (netxen_napi_add(adapter, netdev))
1040
1041 err = netxen_receive_peg_ready(adapter);
1042 if (err)
1043 goto err_out_disable_msi; 1081 goto err_out_disable_msi;
1044 1082
1045 init_timer(&adapter->watchdog_timer); 1083 init_timer(&adapter->watchdog_timer);
@@ -1113,18 +1151,18 @@ static void __devexit netxen_nic_remove(struct pci_dev *pdev)
1113 1151
1114 if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) { 1152 if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) {
1115 netxen_nic_detach(adapter); 1153 netxen_nic_detach(adapter);
1116
1117 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
1118 netxen_p3_free_mac_list(adapter);
1119 } 1154 }
1120 1155
1121 if (adapter->portnum == 0) 1156 if (adapter->portnum == 0)
1122 netxen_free_adapter_offload(adapter); 1157 netxen_free_adapter_offload(adapter);
1123 1158
1124 netxen_teardown_intr(adapter); 1159 netxen_teardown_intr(adapter);
1160 netxen_free_sds_rings(&adapter->recv_ctx);
1125 1161
1126 netxen_cleanup_pci_map(adapter); 1162 netxen_cleanup_pci_map(adapter);
1127 1163
1164 netxen_release_firmware(adapter);
1165
1128 pci_release_regions(pdev); 1166 pci_release_regions(pdev);
1129 pci_disable_device(pdev); 1167 pci_disable_device(pdev);
1130 pci_set_drvdata(pdev, NULL); 1168 pci_set_drvdata(pdev, NULL);
@@ -1176,7 +1214,7 @@ netxen_nic_resume(struct pci_dev *pdev)
1176 1214
1177 adapter->curr_window = 255; 1215 adapter->curr_window = 255;
1178 1216
1179 err = netxen_start_firmware(adapter); 1217 err = netxen_start_firmware(adapter, 0);
1180 if (err) { 1218 if (err) {
1181 dev_err(&pdev->dev, "failed to start firmware\n"); 1219 dev_err(&pdev->dev, "failed to start firmware\n");
1182 return err; 1220 return err;
@@ -1315,7 +1353,7 @@ static int
1315netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 1353netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1316{ 1354{
1317 struct netxen_adapter *adapter = netdev_priv(netdev); 1355 struct netxen_adapter *adapter = netdev_priv(netdev);
1318 struct netxen_hardware_context *hw = &adapter->ahw; 1356 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1319 unsigned int first_seg_len = skb->len - skb->data_len; 1357 unsigned int first_seg_len = skb->len - skb->data_len;
1320 struct netxen_cmd_buffer *pbuf; 1358 struct netxen_cmd_buffer *pbuf;
1321 struct netxen_skb_frag *buffrag; 1359 struct netxen_skb_frag *buffrag;
@@ -1326,28 +1364,26 @@ netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1326 1364
1327 u32 producer, consumer; 1365 u32 producer, consumer;
1328 int frag_count, no_of_desc; 1366 int frag_count, no_of_desc;
1329 u32 num_txd = adapter->num_txd; 1367 u32 num_txd = tx_ring->num_desc;
1330 bool is_tso = false; 1368 bool is_tso = false;
1331 1369
1332 frag_count = skb_shinfo(skb)->nr_frags + 1; 1370 frag_count = skb_shinfo(skb)->nr_frags + 1;
1333 1371
1334 /* There 4 fragments per descriptor */ 1372 /* 4 fragments per cmd des */
1335 no_of_desc = (frag_count + 3) >> 2; 1373 no_of_desc = (frag_count + 3) >> 2;
1336 1374
1337 producer = adapter->cmd_producer; 1375 producer = tx_ring->producer;
1338 smp_mb(); 1376 smp_mb();
1339 consumer = adapter->last_cmd_consumer; 1377 consumer = tx_ring->sw_consumer;
1340 if ((no_of_desc+2) > find_diff_among(producer, consumer, num_txd)) { 1378 if ((no_of_desc+2) >= find_diff_among(producer, consumer, num_txd)) {
1341 netif_stop_queue(netdev); 1379 netif_stop_queue(netdev);
1342 smp_mb(); 1380 smp_mb();
1343 return NETDEV_TX_BUSY; 1381 return NETDEV_TX_BUSY;
1344 } 1382 }
1345 1383
1346 /* Copy the descriptors into the hardware */ 1384 hwdesc = &tx_ring->desc_head[producer];
1347 hwdesc = &hw->cmd_desc_head[producer];
1348 netxen_clear_cmddesc((u64 *)hwdesc); 1385 netxen_clear_cmddesc((u64 *)hwdesc);
1349 /* Take skb->data itself */ 1386 pbuf = &tx_ring->cmd_buf_arr[producer];
1350 pbuf = &adapter->cmd_buf_arr[producer];
1351 1387
1352 is_tso = netxen_tso_check(netdev, hwdesc, skb); 1388 is_tso = netxen_tso_check(netdev, hwdesc, skb);
1353 1389
@@ -1376,9 +1412,9 @@ netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1376 if ((i & 0x3) == 0) { 1412 if ((i & 0x3) == 0) {
1377 k = 0; 1413 k = 0;
1378 producer = get_next_index(producer, num_txd); 1414 producer = get_next_index(producer, num_txd);
1379 hwdesc = &hw->cmd_desc_head[producer]; 1415 hwdesc = &tx_ring->desc_head[producer];
1380 netxen_clear_cmddesc((u64 *)hwdesc); 1416 netxen_clear_cmddesc((u64 *)hwdesc);
1381 pbuf = &adapter->cmd_buf_arr[producer]; 1417 pbuf = &tx_ring->cmd_buf_arr[producer];
1382 pbuf->skb = NULL; 1418 pbuf->skb = NULL;
1383 } 1419 }
1384 frag = &skb_shinfo(skb)->frags[i - 1]; 1420 frag = &skb_shinfo(skb)->frags[i - 1];
@@ -1430,8 +1466,8 @@ netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1430 more_hdr = 0; 1466 more_hdr = 0;
1431 } 1467 }
1432 /* copy the MAC/IP/TCP headers to the cmd descriptor list */ 1468 /* copy the MAC/IP/TCP headers to the cmd descriptor list */
1433 hwdesc = &hw->cmd_desc_head[producer]; 1469 hwdesc = &tx_ring->desc_head[producer];
1434 pbuf = &adapter->cmd_buf_arr[producer]; 1470 pbuf = &tx_ring->cmd_buf_arr[producer];
1435 pbuf->skb = NULL; 1471 pbuf->skb = NULL;
1436 1472
1437 /* copy the first 64 bytes */ 1473 /* copy the first 64 bytes */
@@ -1440,8 +1476,8 @@ netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1440 producer = get_next_index(producer, num_txd); 1476 producer = get_next_index(producer, num_txd);
1441 1477
1442 if (more_hdr) { 1478 if (more_hdr) {
1443 hwdesc = &hw->cmd_desc_head[producer]; 1479 hwdesc = &tx_ring->desc_head[producer];
1444 pbuf = &adapter->cmd_buf_arr[producer]; 1480 pbuf = &tx_ring->cmd_buf_arr[producer];
1445 pbuf->skb = NULL; 1481 pbuf->skb = NULL;
1446 /* copy the next 64 bytes - should be enough except 1482 /* copy the next 64 bytes - should be enough except
1447 * for pathological case 1483 * for pathological case
@@ -1454,13 +1490,12 @@ netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1454 } 1490 }
1455 } 1491 }
1456 1492
1457 adapter->cmd_producer = producer; 1493 tx_ring->producer = producer;
1458 adapter->stats.txbytes += skb->len; 1494 adapter->stats.txbytes += skb->len;
1459 1495
1460 netxen_nic_update_cmd_producer(adapter, adapter->cmd_producer); 1496 netxen_nic_update_cmd_producer(adapter, tx_ring, producer);
1461 1497
1462 adapter->stats.xmitcalled++; 1498 adapter->stats.xmitcalled++;
1463 netdev->trans_start = jiffies;
1464 1499
1465 return NETDEV_TX_OK; 1500 return NETDEV_TX_OK;
1466 1501
@@ -1476,7 +1511,7 @@ static int netxen_nic_check_temp(struct netxen_adapter *adapter)
1476 uint32_t temp, temp_state, temp_val; 1511 uint32_t temp, temp_state, temp_val;
1477 int rv = 0; 1512 int rv = 0;
1478 1513
1479 temp = adapter->pci_read_normalize(adapter, CRB_TEMP_STATE); 1514 temp = NXRD32(adapter, CRB_TEMP_STATE);
1480 1515
1481 temp_state = nx_get_temp_state(temp); 1516 temp_state = nx_get_temp_state(temp);
1482 temp_val = nx_get_temp_val(temp); 1517 temp_val = nx_get_temp_val(temp);
@@ -1510,26 +1545,9 @@ static int netxen_nic_check_temp(struct netxen_adapter *adapter)
1510 return rv; 1545 return rv;
1511} 1546}
1512 1547
1513static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter) 1548void netxen_advert_link_change(struct netxen_adapter *adapter, int linkup)
1514{ 1549{
1515 struct net_device *netdev = adapter->netdev; 1550 struct net_device *netdev = adapter->netdev;
1516 u32 val, port, linkup;
1517
1518 port = adapter->physical_port;
1519
1520 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
1521 val = adapter->pci_read_normalize(adapter, CRB_XG_STATE_P3);
1522 val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
1523 linkup = (val == XG_LINK_UP_P3);
1524 } else {
1525 val = adapter->pci_read_normalize(adapter, CRB_XG_STATE);
1526 if (adapter->ahw.port_type == NETXEN_NIC_GBE)
1527 linkup = (val >> port) & 1;
1528 else {
1529 val = (val >> port*8) & 0xff;
1530 linkup = (val == XG_LINK_UP);
1531 }
1532 }
1533 1551
1534 if (adapter->ahw.linkup && !linkup) { 1552 if (adapter->ahw.linkup && !linkup) {
1535 printk(KERN_INFO "%s: %s NIC Link is down\n", 1553 printk(KERN_INFO "%s: %s NIC Link is down\n",
@@ -1540,7 +1558,9 @@ static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter)
1540 netif_stop_queue(netdev); 1558 netif_stop_queue(netdev);
1541 } 1559 }
1542 1560
1543 netxen_nic_set_link_parameters(adapter); 1561 if (!adapter->has_link_events)
1562 netxen_nic_set_link_parameters(adapter);
1563
1544 } else if (!adapter->ahw.linkup && linkup) { 1564 } else if (!adapter->ahw.linkup && linkup) {
1545 printk(KERN_INFO "%s: %s NIC Link is up\n", 1565 printk(KERN_INFO "%s: %s NIC Link is up\n",
1546 netxen_nic_driver_name, netdev->name); 1566 netxen_nic_driver_name, netdev->name);
@@ -1550,8 +1570,32 @@ static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter)
1550 netif_wake_queue(netdev); 1570 netif_wake_queue(netdev);
1551 } 1571 }
1552 1572
1553 netxen_nic_set_link_parameters(adapter); 1573 if (!adapter->has_link_events)
1574 netxen_nic_set_link_parameters(adapter);
1575 }
1576}
1577
1578static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter)
1579{
1580 u32 val, port, linkup;
1581
1582 port = adapter->physical_port;
1583
1584 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
1585 val = NXRD32(adapter, CRB_XG_STATE_P3);
1586 val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
1587 linkup = (val == XG_LINK_UP_P3);
1588 } else {
1589 val = NXRD32(adapter, CRB_XG_STATE);
1590 if (adapter->ahw.port_type == NETXEN_NIC_GBE)
1591 linkup = (val >> port) & 1;
1592 else {
1593 val = (val >> port*8) & 0xff;
1594 linkup = (val == XG_LINK_UP);
1595 }
1554 } 1596 }
1597
1598 netxen_advert_link_change(adapter, linkup);
1555} 1599}
1556 1600
1557static void netxen_watchdog(unsigned long v) 1601static void netxen_watchdog(unsigned long v)
@@ -1569,7 +1613,8 @@ void netxen_watchdog_task(struct work_struct *work)
1569 if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter)) 1613 if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
1570 return; 1614 return;
1571 1615
1572 netxen_nic_handle_phy_intr(adapter); 1616 if (!adapter->has_link_events)
1617 netxen_nic_handle_phy_intr(adapter);
1573 1618
1574 if (netif_running(adapter->netdev)) 1619 if (netif_running(adapter->netdev))
1575 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); 1620 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
@@ -1598,10 +1643,6 @@ static void netxen_tx_timeout_task(struct work_struct *work)
1598 netif_wake_queue(adapter->netdev); 1643 netif_wake_queue(adapter->netdev);
1599} 1644}
1600 1645
1601/*
1602 * netxen_nic_get_stats - Get System Network Statistics
1603 * @netdev: network interface device structure
1604 */
1605struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev) 1646struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev)
1606{ 1647{
1607 struct netxen_adapter *adapter = netdev_priv(netdev); 1648 struct netxen_adapter *adapter = netdev_priv(netdev);
@@ -1609,22 +1650,11 @@ struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev)
1609 1650
1610 memset(stats, 0, sizeof(*stats)); 1651 memset(stats, 0, sizeof(*stats));
1611 1652
1612 /* total packets received */
1613 stats->rx_packets = adapter->stats.no_rcv; 1653 stats->rx_packets = adapter->stats.no_rcv;
1614 /* total packets transmitted */ 1654 stats->tx_packets = adapter->stats.xmitfinished;
1615 stats->tx_packets = adapter->stats.xmitedframes +
1616 adapter->stats.xmitfinished;
1617 /* total bytes received */
1618 stats->rx_bytes = adapter->stats.rxbytes; 1655 stats->rx_bytes = adapter->stats.rxbytes;
1619 /* total bytes transmitted */
1620 stats->tx_bytes = adapter->stats.txbytes; 1656 stats->tx_bytes = adapter->stats.txbytes;
1621 /* bad packets received */
1622 stats->rx_errors = adapter->stats.rcvdbadskb;
1623 /* packet transmit problems */
1624 stats->tx_errors = adapter->stats.nocmddescriptor;
1625 /* no space in linux buffers */
1626 stats->rx_dropped = adapter->stats.rxdropped; 1657 stats->rx_dropped = adapter->stats.rxdropped;
1627 /* no space available in linux */
1628 stats->tx_dropped = adapter->stats.txdropped; 1658 stats->tx_dropped = adapter->stats.txdropped;
1629 1659
1630 return stats; 1660 return stats;
@@ -1651,15 +1681,14 @@ static irqreturn_t netxen_intr(int irq, void *data)
1651 } else { 1681 } else {
1652 unsigned long our_int = 0; 1682 unsigned long our_int = 0;
1653 1683
1654 our_int = adapter->pci_read_normalize(adapter, CRB_INT_VECTOR); 1684 our_int = NXRD32(adapter, CRB_INT_VECTOR);
1655 1685
1656 /* not our interrupt */ 1686 /* not our interrupt */
1657 if (!test_and_clear_bit((7 + adapter->portnum), &our_int)) 1687 if (!test_and_clear_bit((7 + adapter->portnum), &our_int))
1658 return IRQ_NONE; 1688 return IRQ_NONE;
1659 1689
1660 /* claim interrupt */ 1690 /* claim interrupt */
1661 adapter->pci_write_normalize(adapter, 1691 NXWR32(adapter, CRB_INT_VECTOR, (our_int & 0xffffffff));
1662 CRB_INT_VECTOR, (our_int & 0xffffffff));
1663 } 1692 }
1664 1693
1665 /* clear interrupt */ 1694 /* clear interrupt */
@@ -1685,7 +1714,7 @@ static irqreturn_t netxen_msi_intr(int irq, void *data)
1685 1714
1686 /* clear interrupt */ 1715 /* clear interrupt */
1687 adapter->pci_write_immediate(adapter, 1716 adapter->pci_write_immediate(adapter,
1688 msi_tgt_status[adapter->ahw.pci_func], 0xffffffff); 1717 adapter->msi_tgt_status, 0xffffffff);
1689 1718
1690 napi_schedule(&sds_ring->napi); 1719 napi_schedule(&sds_ring->napi);
1691 return IRQ_HANDLED; 1720 return IRQ_HANDLED;
diff --git a/drivers/net/netxen/netxen_nic_niu.c b/drivers/net/netxen/netxen_nic_niu.c
index d85203203d4d..5941c79be723 100644
--- a/drivers/net/netxen/netxen_nic_niu.c
+++ b/drivers/net/netxen/netxen_nic_niu.c
@@ -43,8 +43,7 @@ static int phy_lock(struct netxen_adapter *adapter)
43 int done = 0, timeout = 0; 43 int done = 0, timeout = 0;
44 44
45 while (!done) { 45 while (!done) {
46 done = netxen_nic_reg_read(adapter, 46 done = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM3_LOCK));
47 NETXEN_PCIE_REG(PCIE_SEM3_LOCK));
48 if (done == 1) 47 if (done == 1)
49 break; 48 break;
50 if (timeout >= phy_lock_timeout) { 49 if (timeout >= phy_lock_timeout) {
@@ -59,8 +58,7 @@ static int phy_lock(struct netxen_adapter *adapter)
59 } 58 }
60 } 59 }
61 60
62 netxen_crb_writelit_adapter(adapter, 61 NXWR32(adapter, NETXEN_PHY_LOCK_ID, PHY_LOCK_DRIVER);
63 NETXEN_PHY_LOCK_ID, PHY_LOCK_DRIVER);
64 return 0; 62 return 0;
65} 63}
66 64
@@ -105,9 +103,7 @@ int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
105 * so it cannot be in reset 103 * so it cannot be in reset
106 */ 104 */
107 105
108 if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), 106 mac_cfg0 = NXRD32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0));
109 &mac_cfg0, 4))
110 return -EIO;
111 if (netxen_gb_get_soft_reset(mac_cfg0)) { 107 if (netxen_gb_get_soft_reset(mac_cfg0)) {
112 __u32 temp; 108 __u32 temp;
113 temp = 0; 109 temp = 0;
@@ -115,9 +111,7 @@ int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
115 netxen_gb_rx_reset_pb(temp); 111 netxen_gb_rx_reset_pb(temp);
116 netxen_gb_tx_reset_mac(temp); 112 netxen_gb_tx_reset_mac(temp);
117 netxen_gb_rx_reset_mac(temp); 113 netxen_gb_rx_reset_mac(temp);
118 if (adapter->hw_write_wx(adapter, 114 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), temp))
119 NETXEN_NIU_GB_MAC_CONFIG_0(0),
120 &temp, 4))
121 return -EIO; 115 return -EIO;
122 restore = 1; 116 restore = 1;
123 } 117 }
@@ -125,43 +119,32 @@ int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
125 address = 0; 119 address = 0;
126 netxen_gb_mii_mgmt_reg_addr(address, reg); 120 netxen_gb_mii_mgmt_reg_addr(address, reg);
127 netxen_gb_mii_mgmt_phy_addr(address, phy); 121 netxen_gb_mii_mgmt_phy_addr(address, phy);
128 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0), 122 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0), address))
129 &address, 4))
130 return -EIO; 123 return -EIO;
131 command = 0; /* turn off any prior activity */ 124 command = 0; /* turn off any prior activity */
132 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), 125 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
133 &command, 4))
134 return -EIO; 126 return -EIO;
135 /* send read command */ 127 /* send read command */
136 netxen_gb_mii_mgmt_set_read_cycle(command); 128 netxen_gb_mii_mgmt_set_read_cycle(command);
137 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), 129 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
138 &command, 4))
139 return -EIO; 130 return -EIO;
140 131
141 status = 0; 132 status = 0;
142 do { 133 do {
143 if (adapter->hw_read_wx(adapter, 134 status = NXRD32(adapter, NETXEN_NIU_GB_MII_MGMT_INDICATE(0));
144 NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
145 &status, 4))
146 return -EIO;
147 timeout++; 135 timeout++;
148 } while ((netxen_get_gb_mii_mgmt_busy(status) 136 } while ((netxen_get_gb_mii_mgmt_busy(status)
149 || netxen_get_gb_mii_mgmt_notvalid(status)) 137 || netxen_get_gb_mii_mgmt_notvalid(status))
150 && (timeout++ < NETXEN_NIU_PHY_WAITMAX)); 138 && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
151 139
152 if (timeout < NETXEN_NIU_PHY_WAITMAX) { 140 if (timeout < NETXEN_NIU_PHY_WAITMAX) {
153 if (adapter->hw_read_wx(adapter, 141 *readval = NXRD32(adapter, NETXEN_NIU_GB_MII_MGMT_STATUS(0));
154 NETXEN_NIU_GB_MII_MGMT_STATUS(0),
155 readval, 4))
156 return -EIO;
157 result = 0; 142 result = 0;
158 } else 143 } else
159 result = -1; 144 result = -1;
160 145
161 if (restore) 146 if (restore)
162 if (adapter->hw_write_wx(adapter, 147 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), mac_cfg0))
163 NETXEN_NIU_GB_MAC_CONFIG_0(0),
164 &mac_cfg0, 4))
165 return -EIO; 148 return -EIO;
166 phy_unlock(adapter); 149 phy_unlock(adapter);
167 return result; 150 return result;
@@ -197,9 +180,7 @@ int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
197 * cannot be in reset 180 * cannot be in reset
198 */ 181 */
199 182
200 if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), 183 mac_cfg0 = NXRD32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0));
201 &mac_cfg0, 4))
202 return -EIO;
203 if (netxen_gb_get_soft_reset(mac_cfg0)) { 184 if (netxen_gb_get_soft_reset(mac_cfg0)) {
204 __u32 temp; 185 __u32 temp;
205 temp = 0; 186 temp = 0;
@@ -208,35 +189,27 @@ int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
208 netxen_gb_tx_reset_mac(temp); 189 netxen_gb_tx_reset_mac(temp);
209 netxen_gb_rx_reset_mac(temp); 190 netxen_gb_rx_reset_mac(temp);
210 191
211 if (adapter->hw_write_wx(adapter, 192 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), temp))
212 NETXEN_NIU_GB_MAC_CONFIG_0(0),
213 &temp, 4))
214 return -EIO; 193 return -EIO;
215 restore = 1; 194 restore = 1;
216 } 195 }
217 196
218 command = 0; /* turn off any prior activity */ 197 command = 0; /* turn off any prior activity */
219 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), 198 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
220 &command, 4))
221 return -EIO; 199 return -EIO;
222 200
223 address = 0; 201 address = 0;
224 netxen_gb_mii_mgmt_reg_addr(address, reg); 202 netxen_gb_mii_mgmt_reg_addr(address, reg);
225 netxen_gb_mii_mgmt_phy_addr(address, phy); 203 netxen_gb_mii_mgmt_phy_addr(address, phy);
226 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0), 204 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0), address))
227 &address, 4))
228 return -EIO; 205 return -EIO;
229 206
230 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_CTRL(0), 207 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_CTRL(0), val))
231 &val, 4))
232 return -EIO; 208 return -EIO;
233 209
234 status = 0; 210 status = 0;
235 do { 211 do {
236 if (adapter->hw_read_wx(adapter, 212 status = NXRD32(adapter, NETXEN_NIU_GB_MII_MGMT_INDICATE(0));
237 NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
238 &status, 4))
239 return -EIO;
240 timeout++; 213 timeout++;
241 } while ((netxen_get_gb_mii_mgmt_busy(status)) 214 } while ((netxen_get_gb_mii_mgmt_busy(status))
242 && (timeout++ < NETXEN_NIU_PHY_WAITMAX)); 215 && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
@@ -248,9 +221,7 @@ int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
248 221
249 /* restore the state of port 0 MAC in case we tampered with it */ 222 /* restore the state of port 0 MAC in case we tampered with it */
250 if (restore) 223 if (restore)
251 if (adapter->hw_write_wx(adapter, 224 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), mac_cfg0))
252 NETXEN_NIU_GB_MAC_CONFIG_0(0),
253 &mac_cfg0, 4))
254 return -EIO; 225 return -EIO;
255 226
256 return result; 227 return result;
@@ -258,7 +229,7 @@ int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
258 229
259int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter) 230int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter)
260{ 231{
261 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x3f); 232 NXWR32(adapter, NETXEN_NIU_INT_MASK, 0x3f);
262 return 0; 233 return 0;
263} 234}
264 235
@@ -281,7 +252,7 @@ int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter *adapter)
281 252
282int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter) 253int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter)
283{ 254{
284 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x7f); 255 NXWR32(adapter, NETXEN_NIU_INT_MASK, 0x7f);
285 return 0; 256 return 0;
286} 257}
287 258
@@ -315,36 +286,27 @@ static int netxen_niu_gbe_clear_phy_interrupts(struct netxen_adapter *adapter)
315static void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter, 286static void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter,
316 int port, long enable) 287 int port, long enable)
317{ 288{
318 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2); 289 NXWR32(adapter, NETXEN_NIU_MODE, 0x2);
319 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 290 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x80000000);
320 0x80000000); 291 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x0000f0025);
321 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 292 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port), 0xf1ff);
322 0x0000f0025); 293 NXWR32(adapter, NETXEN_NIU_GB0_GMII_MODE + (port << 3), 0);
323 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port), 294 NXWR32(adapter, NETXEN_NIU_GB0_MII_MODE + (port << 3), 1);
324 0xf1ff); 295 NXWR32(adapter, (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
325 netxen_crb_writelit_adapter(adapter, 296 NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
326 NETXEN_NIU_GB0_GMII_MODE + (port << 3), 0);
327 netxen_crb_writelit_adapter(adapter,
328 NETXEN_NIU_GB0_MII_MODE + (port << 3), 1);
329 netxen_crb_writelit_adapter(adapter,
330 (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
331 netxen_crb_writelit_adapter(adapter,
332 NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
333 297
334 if (enable) { 298 if (enable) {
335 /* 299 /*
336 * Do NOT enable flow control until a suitable solution for 300 * Do NOT enable flow control until a suitable solution for
337 * shutting down pause frames is found. 301 * shutting down pause frames is found.
338 */ 302 */
339 netxen_crb_writelit_adapter(adapter, 303 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x5);
340 NETXEN_NIU_GB_MAC_CONFIG_0(port),
341 0x5);
342 } 304 }
343 305
344 if (netxen_niu_gbe_enable_phy_interrupts(adapter)) 306 if (netxen_niu_gbe_enable_phy_interrupts(adapter))
345 printk(KERN_ERR PFX "ERROR enabling PHY interrupts\n"); 307 printk(KERN_ERR "ERROR enabling PHY interrupts\n");
346 if (netxen_niu_gbe_clear_phy_interrupts(adapter)) 308 if (netxen_niu_gbe_clear_phy_interrupts(adapter))
347 printk(KERN_ERR PFX "ERROR clearing PHY interrupts\n"); 309 printk(KERN_ERR "ERROR clearing PHY interrupts\n");
348} 310}
349 311
350/* 312/*
@@ -353,36 +315,27 @@ static void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter,
353static void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter *adapter, 315static void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter *adapter,
354 int port, long enable) 316 int port, long enable)
355{ 317{
356 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2); 318 NXWR32(adapter, NETXEN_NIU_MODE, 0x2);
357 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 319 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x80000000);
358 0x80000000); 320 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x0000f0025);
359 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 321 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port), 0xf2ff);
360 0x0000f0025); 322 NXWR32(adapter, NETXEN_NIU_GB0_MII_MODE + (port << 3), 0);
361 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port), 323 NXWR32(adapter, NETXEN_NIU_GB0_GMII_MODE + (port << 3), 1);
362 0xf2ff); 324 NXWR32(adapter, (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
363 netxen_crb_writelit_adapter(adapter, 325 NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
364 NETXEN_NIU_GB0_MII_MODE + (port << 3), 0);
365 netxen_crb_writelit_adapter(adapter,
366 NETXEN_NIU_GB0_GMII_MODE + (port << 3), 1);
367 netxen_crb_writelit_adapter(adapter,
368 (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
369 netxen_crb_writelit_adapter(adapter,
370 NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
371 326
372 if (enable) { 327 if (enable) {
373 /* 328 /*
374 * Do NOT enable flow control until a suitable solution for 329 * Do NOT enable flow control until a suitable solution for
375 * shutting down pause frames is found. 330 * shutting down pause frames is found.
376 */ 331 */
377 netxen_crb_writelit_adapter(adapter, 332 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x5);
378 NETXEN_NIU_GB_MAC_CONFIG_0(port),
379 0x5);
380 } 333 }
381 334
382 if (netxen_niu_gbe_enable_phy_interrupts(adapter)) 335 if (netxen_niu_gbe_enable_phy_interrupts(adapter))
383 printk(KERN_ERR PFX "ERROR enabling PHY interrupts\n"); 336 printk(KERN_ERR "ERROR enabling PHY interrupts\n");
384 if (netxen_niu_gbe_clear_phy_interrupts(adapter)) 337 if (netxen_niu_gbe_clear_phy_interrupts(adapter))
385 printk(KERN_ERR PFX "ERROR clearing PHY interrupts\n"); 338 printk(KERN_ERR "ERROR clearing PHY interrupts\n");
386} 339}
387 340
388int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port) 341int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port)
@@ -416,25 +369,20 @@ int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port)
416 * plugged in. 369 * plugged in.
417 */ 370 */
418 371
419 netxen_crb_writelit_adapter(adapter, 372 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
420 NETXEN_NIU_GB_MAC_CONFIG_0
421 (port),
422 NETXEN_GB_MAC_SOFT_RESET); 373 NETXEN_GB_MAC_SOFT_RESET);
423 netxen_crb_writelit_adapter(adapter, 374 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
424 NETXEN_NIU_GB_MAC_CONFIG_0 375 NETXEN_GB_MAC_RESET_PROT_BLK |
425 (port), 376 NETXEN_GB_MAC_ENABLE_TX_RX |
426 NETXEN_GB_MAC_RESET_PROT_BLK 377 NETXEN_GB_MAC_PAUSED_FRMS);
427 | NETXEN_GB_MAC_ENABLE_TX_RX
428 |
429 NETXEN_GB_MAC_PAUSED_FRMS);
430 if (netxen_niu_gbe_clear_phy_interrupts(adapter)) 378 if (netxen_niu_gbe_clear_phy_interrupts(adapter))
431 printk(KERN_ERR PFX 379 printk(KERN_ERR
432 "ERROR clearing PHY interrupts\n"); 380 "ERROR clearing PHY interrupts\n");
433 if (netxen_niu_gbe_enable_phy_interrupts(adapter)) 381 if (netxen_niu_gbe_enable_phy_interrupts(adapter))
434 printk(KERN_ERR PFX 382 printk(KERN_ERR
435 "ERROR enabling PHY interrupts\n"); 383 "ERROR enabling PHY interrupts\n");
436 if (netxen_niu_gbe_clear_phy_interrupts(adapter)) 384 if (netxen_niu_gbe_clear_phy_interrupts(adapter))
437 printk(KERN_ERR PFX 385 printk(KERN_ERR
438 "ERROR clearing PHY interrupts\n"); 386 "ERROR clearing PHY interrupts\n");
439 result = -1; 387 result = -1;
440 } 388 }
@@ -447,88 +395,10 @@ int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port)
447int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port) 395int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
448{ 396{
449 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 397 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
450 netxen_crb_writelit_adapter(adapter, 398 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_1+(0x10000*port), 0x1447);
451 NETXEN_NIU_XGE_CONFIG_1+(0x10000*port), 0x1447); 399 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_0+(0x10000*port), 0x5);
452 netxen_crb_writelit_adapter(adapter,
453 NETXEN_NIU_XGE_CONFIG_0+(0x10000*port), 0x5);
454 }
455
456 return 0;
457}
458
459/*
460 * Return the current station MAC address.
461 * Note that the passed-in value must already be in network byte order.
462 */
463static int netxen_niu_macaddr_get(struct netxen_adapter *adapter,
464 netxen_ethernet_macaddr_t * addr)
465{
466 u32 stationhigh;
467 u32 stationlow;
468 int phy = adapter->physical_port;
469 u8 val[8];
470
471 if (addr == NULL)
472 return -EINVAL;
473 if ((phy < 0) || (phy > 3))
474 return -EINVAL;
475
476 if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_0(phy),
477 &stationhigh, 4))
478 return -EIO;
479 if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_1(phy),
480 &stationlow, 4))
481 return -EIO;
482 ((__le32 *)val)[1] = cpu_to_le32(stationhigh);
483 ((__le32 *)val)[0] = cpu_to_le32(stationlow);
484
485 memcpy(addr, val + 2, 6);
486
487 return 0;
488}
489
490/*
491 * Set the station MAC address.
492 * Note that the passed-in value must already be in network byte order.
493 */
494int netxen_niu_macaddr_set(struct netxen_adapter *adapter,
495 netxen_ethernet_macaddr_t addr)
496{
497 u8 temp[4];
498 u32 val;
499 int phy = adapter->physical_port;
500 unsigned char mac_addr[6];
501 int i;
502
503 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
504 return 0;
505
506 for (i = 0; i < 10; i++) {
507 temp[0] = temp[1] = 0;
508 memcpy(temp + 2, addr, 2);
509 val = le32_to_cpu(*(__le32 *)temp);
510 if (adapter->hw_write_wx(adapter,
511 NETXEN_NIU_GB_STATION_ADDR_1(phy), &val, 4))
512 return -EIO;
513
514 memcpy(temp, ((u8 *) addr) + 2, sizeof(__le32));
515 val = le32_to_cpu(*(__le32 *)temp);
516 if (adapter->hw_write_wx(adapter,
517 NETXEN_NIU_GB_STATION_ADDR_0(phy), &val, 4))
518 return -2;
519
520 netxen_niu_macaddr_get(adapter,
521 (netxen_ethernet_macaddr_t *) mac_addr);
522 if (memcmp(mac_addr, addr, 6) == 0)
523 break;
524 } 400 }
525 401
526 if (i == 10) {
527 printk(KERN_ERR "%s: cannot set Mac addr for %s\n",
528 netxen_nic_driver_name, adapter->netdev->name);
529 printk(KERN_ERR "MAC address set: %pM.\n", addr);
530 printk(KERN_ERR "MAC address get: %pM.\n", mac_addr);
531 }
532 return 0; 402 return 0;
533} 403}
534 404
@@ -545,8 +415,7 @@ int netxen_niu_disable_gbe_port(struct netxen_adapter *adapter)
545 return -EINVAL; 415 return -EINVAL;
546 mac_cfg0 = 0; 416 mac_cfg0 = 0;
547 netxen_gb_soft_reset(mac_cfg0); 417 netxen_gb_soft_reset(mac_cfg0);
548 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 418 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), mac_cfg0))
549 &mac_cfg0, 4))
550 return -EIO; 419 return -EIO;
551 return 0; 420 return 0;
552} 421}
@@ -564,8 +433,8 @@ int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
564 return -EINVAL; 433 return -EINVAL;
565 434
566 mac_cfg = 0; 435 mac_cfg = 0;
567 if (adapter->hw_write_wx(adapter, 436 if (NXWR32(adapter,
568 NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), &mac_cfg, 4)) 437 NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), mac_cfg))
569 return -EIO; 438 return -EIO;
570 return 0; 439 return 0;
571} 440}
@@ -581,9 +450,7 @@ int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
581 return -EINVAL; 450 return -EINVAL;
582 451
583 /* save previous contents */ 452 /* save previous contents */
584 if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR, 453 reg = NXRD32(adapter, NETXEN_NIU_GB_DROP_WRONGADDR);
585 &reg, 4))
586 return -EIO;
587 if (mode == NETXEN_NIU_PROMISC_MODE) { 454 if (mode == NETXEN_NIU_PROMISC_MODE) {
588 switch (port) { 455 switch (port) {
589 case 0: 456 case 0:
@@ -619,67 +486,11 @@ int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
619 return -EIO; 486 return -EIO;
620 } 487 }
621 } 488 }
622 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR, 489 if (NXWR32(adapter, NETXEN_NIU_GB_DROP_WRONGADDR, reg))
623 &reg, 4))
624 return -EIO; 490 return -EIO;
625 return 0; 491 return 0;
626} 492}
627 493
628/*
629 * Set the MAC address for an XG port
630 * Note that the passed-in value must already be in network byte order.
631 */
632int netxen_niu_xg_macaddr_set(struct netxen_adapter *adapter,
633 netxen_ethernet_macaddr_t addr)
634{
635 int phy = adapter->physical_port;
636 u8 temp[4];
637 u32 val;
638
639 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
640 return 0;
641
642 if ((phy < 0) || (phy > NETXEN_NIU_MAX_XG_PORTS))
643 return -EIO;
644
645 temp[0] = temp[1] = 0;
646 switch (phy) {
647 case 0:
648 memcpy(temp + 2, addr, 2);
649 val = le32_to_cpu(*(__le32 *)temp);
650 if (adapter->hw_write_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_1,
651 &val, 4))
652 return -EIO;
653
654 memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
655 val = le32_to_cpu(*(__le32 *)temp);
656 if (adapter->hw_write_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_HI,
657 &val, 4))
658 return -EIO;
659 break;
660
661 case 1:
662 memcpy(temp + 2, addr, 2);
663 val = le32_to_cpu(*(__le32 *)temp);
664 if (adapter->hw_write_wx(adapter, NETXEN_NIU_XG1_STATION_ADDR_0_1,
665 &val, 4))
666 return -EIO;
667
668 memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
669 val = le32_to_cpu(*(__le32 *)temp);
670 if (adapter->hw_write_wx(adapter, NETXEN_NIU_XG1_STATION_ADDR_0_HI,
671 &val, 4))
672 return -EIO;
673 break;
674
675 default:
676 printk(KERN_ERR "Unknown port %d\n", phy);
677 break;
678 }
679
680 return 0;
681}
682
683int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter, 494int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
684 u32 mode) 495 u32 mode)
685{ 496{
@@ -689,9 +500,7 @@ int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
689 if (port > NETXEN_NIU_MAX_XG_PORTS) 500 if (port > NETXEN_NIU_MAX_XG_PORTS)
690 return -EINVAL; 501 return -EINVAL;
691 502
692 if (adapter->hw_read_wx(adapter, 503 reg = NXRD32(adapter, NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port));
693 NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), &reg, 4))
694 return -EIO;
695 if (mode == NETXEN_NIU_PROMISC_MODE) 504 if (mode == NETXEN_NIU_PROMISC_MODE)
696 reg = (reg | 0x2000UL); 505 reg = (reg | 0x2000UL);
697 else 506 else
@@ -702,8 +511,40 @@ int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
702 else 511 else
703 reg = (reg & ~0x1000UL); 512 reg = (reg & ~0x1000UL);
704 513
705 netxen_crb_writelit_adapter(adapter, 514 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
706 NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg); 515
516 return 0;
517}
518
519int netxen_p2_nic_set_mac_addr(struct netxen_adapter *adapter, u8 *addr)
520{
521 u32 mac_hi, mac_lo;
522 u32 reg_hi, reg_lo;
523
524 u8 phy = adapter->physical_port;
525 u8 phy_count = (adapter->ahw.port_type == NETXEN_NIC_XGBE) ?
526 NETXEN_NIU_MAX_XG_PORTS : NETXEN_NIU_MAX_GBE_PORTS;
527
528 if (phy >= phy_count)
529 return -EINVAL;
530
531 mac_lo = ((u32)addr[0] << 16) | ((u32)addr[1] << 24);
532 mac_hi = addr[2] | ((u32)addr[3] << 8) |
533 ((u32)addr[4] << 16) | ((u32)addr[5] << 24);
534
535 if (adapter->ahw.port_type == NETXEN_NIC_XGBE) {
536 reg_lo = NETXEN_NIU_XGE_STATION_ADDR_0_1 + (0x10000 * phy);
537 reg_hi = NETXEN_NIU_XGE_STATION_ADDR_0_HI + (0x10000 * phy);
538 } else {
539 reg_lo = NETXEN_NIU_GB_STATION_ADDR_1(phy);
540 reg_hi = NETXEN_NIU_GB_STATION_ADDR_0(phy);
541 }
542
543 /* write twice to flush */
544 if (NXWR32(adapter, reg_lo, mac_lo) || NXWR32(adapter, reg_hi, mac_hi))
545 return -EIO;
546 if (NXWR32(adapter, reg_lo, mac_lo) || NXWR32(adapter, reg_hi, mac_hi))
547 return -EIO;
707 548
708 return 0; 549 return 0;
709} 550}
diff --git a/drivers/net/netxen/netxen_nic_phan_reg.h b/drivers/net/netxen/netxen_nic_phan_reg.h
index 50183335e43a..b73a62ca74f8 100644
--- a/drivers/net/netxen/netxen_nic_phan_reg.h
+++ b/drivers/net/netxen/netxen_nic_phan_reg.h
@@ -36,23 +36,25 @@
36 */ 36 */
37#define NIC_CRB_BASE NETXEN_CAM_RAM(0x200) 37#define NIC_CRB_BASE NETXEN_CAM_RAM(0x200)
38#define NETXEN_NIC_REG(X) (NIC_CRB_BASE+(X)) 38#define NETXEN_NIC_REG(X) (NIC_CRB_BASE+(X))
39#define NIC_CRB_BASE_2 NETXEN_CAM_RAM(0x700)
40#define NETXEN_NIC_REG_2(X) (NIC_CRB_BASE_2+(X))
39 41
40#define CRB_PHAN_CNTRL_LO_OFFSET NETXEN_NIC_REG(0x00) 42#define CRB_PHAN_CNTRL_LO_OFFSET NETXEN_NIC_REG(0x00)
41#define CRB_PHAN_CNTRL_HI_OFFSET NETXEN_NIC_REG(0x04) 43#define CRB_PHAN_CNTRL_HI_OFFSET NETXEN_NIC_REG(0x04)
42#define CRB_CMD_PRODUCER_OFFSET NETXEN_NIC_REG(0x08) 44#define CRB_CMD_PRODUCER_OFFSET NETXEN_NIC_REG(0x08)
43#define CRB_CMD_CONSUMER_OFFSET NETXEN_NIC_REG(0x0c) 45#define CRB_CMD_CONSUMER_OFFSET NETXEN_NIC_REG(0x0c)
44#define CRB_PAUSE_ADDR_LO NETXEN_NIC_REG(0x10) /* C0 EPG BUG */ 46#define CRB_PAUSE_ADDR_LO NETXEN_NIC_REG(0x10)
45#define CRB_PAUSE_ADDR_HI NETXEN_NIC_REG(0x14) 47#define CRB_PAUSE_ADDR_HI NETXEN_NIC_REG(0x14)
46#define NX_CDRP_CRB_OFFSET NETXEN_NIC_REG(0x18) 48#define NX_CDRP_CRB_OFFSET NETXEN_NIC_REG(0x18)
47#define NX_ARG1_CRB_OFFSET NETXEN_NIC_REG(0x1c) 49#define NX_ARG1_CRB_OFFSET NETXEN_NIC_REG(0x1c)
48#define NX_ARG2_CRB_OFFSET NETXEN_NIC_REG(0x20) 50#define NX_ARG2_CRB_OFFSET NETXEN_NIC_REG(0x20)
49#define NX_ARG3_CRB_OFFSET NETXEN_NIC_REG(0x24) 51#define NX_ARG3_CRB_OFFSET NETXEN_NIC_REG(0x24)
50#define NX_SIGN_CRB_OFFSET NETXEN_NIC_REG(0x28) 52#define NX_SIGN_CRB_OFFSET NETXEN_NIC_REG(0x28)
51#define CRB_CMD_INTR_LOOP NETXEN_NIC_REG(0x20) /* 4 regs for perf */ 53#define CRB_CMD_INTR_LOOP NETXEN_NIC_REG(0x20)
52#define CRB_CMD_DMA_LOOP NETXEN_NIC_REG(0x24) 54#define CRB_CMD_DMA_LOOP NETXEN_NIC_REG(0x24)
53#define CRB_RCV_INTR_LOOP NETXEN_NIC_REG(0x28) 55#define CRB_RCV_INTR_LOOP NETXEN_NIC_REG(0x28)
54#define CRB_RCV_DMA_LOOP NETXEN_NIC_REG(0x2c) 56#define CRB_RCV_DMA_LOOP NETXEN_NIC_REG(0x2c)
55#define CRB_ENABLE_TX_INTR NETXEN_NIC_REG(0x30) /* phantom init status */ 57#define CRB_ENABLE_TX_INTR NETXEN_NIC_REG(0x30)
56#define CRB_MMAP_ADDR_3 NETXEN_NIC_REG(0x34) 58#define CRB_MMAP_ADDR_3 NETXEN_NIC_REG(0x34)
57#define CRB_CMDPEG_CMDRING NETXEN_NIC_REG(0x38) 59#define CRB_CMDPEG_CMDRING NETXEN_NIC_REG(0x38)
58#define CRB_HOST_DUMMY_BUF_ADDR_HI NETXEN_NIC_REG(0x3c) 60#define CRB_HOST_DUMMY_BUF_ADDR_HI NETXEN_NIC_REG(0x3c)
@@ -65,7 +67,7 @@
65#define CRB_MMAP_SIZE_1 NETXEN_NIC_REG(0x58) 67#define CRB_MMAP_SIZE_1 NETXEN_NIC_REG(0x58)
66#define CRB_MMAP_SIZE_2 NETXEN_NIC_REG(0x5c) 68#define CRB_MMAP_SIZE_2 NETXEN_NIC_REG(0x5c)
67#define CRB_MMAP_SIZE_3 NETXEN_NIC_REG(0x60) 69#define CRB_MMAP_SIZE_3 NETXEN_NIC_REG(0x60)
68#define CRB_GLOBAL_INT_COAL NETXEN_NIC_REG(0x64) /* interrupt coalescing */ 70#define CRB_GLOBAL_INT_COAL NETXEN_NIC_REG(0x64)
69#define CRB_INT_COAL_MODE NETXEN_NIC_REG(0x68) 71#define CRB_INT_COAL_MODE NETXEN_NIC_REG(0x68)
70#define CRB_MAX_RCV_BUFS NETXEN_NIC_REG(0x6c) 72#define CRB_MAX_RCV_BUFS NETXEN_NIC_REG(0x6c)
71#define CRB_TX_INT_THRESHOLD NETXEN_NIC_REG(0x70) 73#define CRB_TX_INT_THRESHOLD NETXEN_NIC_REG(0x70)
@@ -83,13 +85,13 @@
83#define CRB_AGENT_TX_TYPE NETXEN_NIC_REG(0xa0) 85#define CRB_AGENT_TX_TYPE NETXEN_NIC_REG(0xa0)
84#define CRB_AGENT_TX_ADDR NETXEN_NIC_REG(0xa4) 86#define CRB_AGENT_TX_ADDR NETXEN_NIC_REG(0xa4)
85#define CRB_AGENT_TX_MSS NETXEN_NIC_REG(0xa8) 87#define CRB_AGENT_TX_MSS NETXEN_NIC_REG(0xa8)
86#define CRB_TX_STATE NETXEN_NIC_REG(0xac) /* Debug -performance */ 88#define CRB_TX_STATE NETXEN_NIC_REG(0xac)
87#define CRB_TX_COUNT NETXEN_NIC_REG(0xb0) 89#define CRB_TX_COUNT NETXEN_NIC_REG(0xb0)
88#define CRB_RX_STATE NETXEN_NIC_REG(0xb4) 90#define CRB_RX_STATE NETXEN_NIC_REG(0xb4)
89#define CRB_RX_PERF_DEBUG_1 NETXEN_NIC_REG(0xb8) 91#define CRB_RX_PERF_DEBUG_1 NETXEN_NIC_REG(0xb8)
90#define CRB_RX_LRO_CONTROL NETXEN_NIC_REG(0xbc) /* LRO On/OFF */ 92#define CRB_RX_LRO_CONTROL NETXEN_NIC_REG(0xbc)
91#define CRB_RX_LRO_START_NUM NETXEN_NIC_REG(0xc0) 93#define CRB_RX_LRO_START_NUM NETXEN_NIC_REG(0xc0)
92#define CRB_MPORT_MODE NETXEN_NIC_REG(0xc4) /* Multiport Mode */ 94#define CRB_MPORT_MODE NETXEN_NIC_REG(0xc4)
93#define CRB_CMD_RING_SIZE NETXEN_NIC_REG(0xc8) 95#define CRB_CMD_RING_SIZE NETXEN_NIC_REG(0xc8)
94#define CRB_DMA_SHIFT NETXEN_NIC_REG(0xcc) 96#define CRB_DMA_SHIFT NETXEN_NIC_REG(0xcc)
95#define CRB_INT_VECTOR NETXEN_NIC_REG(0xd4) 97#define CRB_INT_VECTOR NETXEN_NIC_REG(0xd4)
@@ -109,8 +111,6 @@
109#define CRB_CMD_CONSUMER_OFFSET_1 NETXEN_NIC_REG(0x1b0) 111#define CRB_CMD_CONSUMER_OFFSET_1 NETXEN_NIC_REG(0x1b0)
110#define CRB_CMD_PRODUCER_OFFSET_2 NETXEN_NIC_REG(0x1b8) 112#define CRB_CMD_PRODUCER_OFFSET_2 NETXEN_NIC_REG(0x1b8)
111#define CRB_CMD_CONSUMER_OFFSET_2 NETXEN_NIC_REG(0x1bc) 113#define CRB_CMD_CONSUMER_OFFSET_2 NETXEN_NIC_REG(0x1bc)
112
113// 1c0 to 1cc used for signature reg
114#define CRB_CMD_PRODUCER_OFFSET_3 NETXEN_NIC_REG(0x1d0) 114#define CRB_CMD_PRODUCER_OFFSET_3 NETXEN_NIC_REG(0x1d0)
115#define CRB_CMD_CONSUMER_OFFSET_3 NETXEN_NIC_REG(0x1d4) 115#define CRB_CMD_CONSUMER_OFFSET_3 NETXEN_NIC_REG(0x1d4)
116#define CRB_TEMP_STATE NETXEN_NIC_REG(0x1b4) 116#define CRB_TEMP_STATE NETXEN_NIC_REG(0x1b4)
@@ -120,13 +120,13 @@
120#define CRB_V2P_2 NETXEN_NIC_REG(0x298) 120#define CRB_V2P_2 NETXEN_NIC_REG(0x298)
121#define CRB_V2P_3 NETXEN_NIC_REG(0x29c) 121#define CRB_V2P_3 NETXEN_NIC_REG(0x29c)
122#define CRB_V2P(port) (CRB_V2P_0+((port)*4)) 122#define CRB_V2P(port) (CRB_V2P_0+((port)*4))
123#define CRB_DRIVER_VERSION NETXEN_NIC_REG(0x2a0) 123#define CRB_DRIVER_VERSION NETXEN_NIC_REG(0x2a0)
124/* sw int status/mask registers */
125#define CRB_SW_INT_MASK_0 NETXEN_NIC_REG(0x1d8) 124#define CRB_SW_INT_MASK_0 NETXEN_NIC_REG(0x1d8)
126#define CRB_SW_INT_MASK_1 NETXEN_NIC_REG(0x1e0) 125#define CRB_SW_INT_MASK_1 NETXEN_NIC_REG(0x1e0)
127#define CRB_SW_INT_MASK_2 NETXEN_NIC_REG(0x1e4) 126#define CRB_SW_INT_MASK_2 NETXEN_NIC_REG(0x1e4)
128#define CRB_SW_INT_MASK_3 NETXEN_NIC_REG(0x1e8) 127#define CRB_SW_INT_MASK_3 NETXEN_NIC_REG(0x1e8)
129 128
129#define CRB_FW_CAPABILITIES_1 NETXEN_CAM_RAM(0x128)
130#define CRB_MAC_BLOCK_START NETXEN_CAM_RAM(0x1c0) 130#define CRB_MAC_BLOCK_START NETXEN_CAM_RAM(0x1c0)
131 131
132/* 132/*
@@ -136,7 +136,7 @@
136#define CRB_NIC_CAPABILITIES_HOST NETXEN_NIC_REG(0x1a8) 136#define CRB_NIC_CAPABILITIES_HOST NETXEN_NIC_REG(0x1a8)
137#define CRB_NIC_CAPABILITIES_FW NETXEN_NIC_REG(0x1dc) 137#define CRB_NIC_CAPABILITIES_FW NETXEN_NIC_REG(0x1dc)
138#define CRB_NIC_MSI_MODE_HOST NETXEN_NIC_REG(0x270) 138#define CRB_NIC_MSI_MODE_HOST NETXEN_NIC_REG(0x270)
139#define CRB_NIC_MSI_MODE_FW NETXEN_NIC_REG(0x274) 139#define CRB_NIC_MSI_MODE_FW NETXEN_NIC_REG(0x274)
140 140
141#define INTR_SCHEME_PERPORT 0x1 141#define INTR_SCHEME_PERPORT 0x1
142#define MSI_MODE_MULTIFUNC 0x1 142#define MSI_MODE_MULTIFUNC 0x1
@@ -162,7 +162,8 @@
162 162
163struct netxen_recv_crb { 163struct netxen_recv_crb {
164 u32 crb_rcv_producer[NUM_RCV_DESC_RINGS]; 164 u32 crb_rcv_producer[NUM_RCV_DESC_RINGS];
165 u32 crb_sts_consumer; 165 u32 crb_sts_consumer[NUM_STS_DESC_RINGS];
166 u32 sw_int_mask[NUM_STS_DESC_RINGS];
166}; 167};
167 168
168/* 169/*
diff --git a/drivers/net/niu.c b/drivers/net/niu.c
index 2b1745328cf7..fa61a12c5e15 100644
--- a/drivers/net/niu.c
+++ b/drivers/net/niu.c
@@ -22,6 +22,7 @@
22#include <linux/log2.h> 22#include <linux/log2.h>
23#include <linux/jiffies.h> 23#include <linux/jiffies.h>
24#include <linux/crc32.h> 24#include <linux/crc32.h>
25#include <linux/list.h>
25 26
26#include <linux/io.h> 27#include <linux/io.h>
27 28
@@ -1317,7 +1318,7 @@ static int bcm8704_reset(struct niu *np)
1317 1318
1318 err = mdio_read(np, np->phy_addr, 1319 err = mdio_read(np, np->phy_addr,
1319 BCM8704_PHYXS_DEV_ADDR, MII_BMCR); 1320 BCM8704_PHYXS_DEV_ADDR, MII_BMCR);
1320 if (err < 0) 1321 if (err < 0 || err == 0xffff)
1321 return err; 1322 return err;
1322 err |= BMCR_RESET; 1323 err |= BMCR_RESET;
1323 err = mdio_write(np, np->phy_addr, BCM8704_PHYXS_DEV_ADDR, 1324 err = mdio_write(np, np->phy_addr, BCM8704_PHYXS_DEV_ADDR,
@@ -2042,7 +2043,7 @@ static int link_status_10g_bcm8706(struct niu *np, int *link_up_p)
2042 2043
2043 err = mdio_read(np, np->phy_addr, BCM8704_PMA_PMD_DEV_ADDR, 2044 err = mdio_read(np, np->phy_addr, BCM8704_PMA_PMD_DEV_ADDR,
2044 BCM8704_PMD_RCV_SIGDET); 2045 BCM8704_PMD_RCV_SIGDET);
2045 if (err < 0) 2046 if (err < 0 || err == 0xffff)
2046 goto out; 2047 goto out;
2047 if (!(err & PMD_RCV_SIGDET_GLOBAL)) { 2048 if (!(err & PMD_RCV_SIGDET_GLOBAL)) {
2048 err = 0; 2049 err = 0;
@@ -2083,8 +2084,6 @@ static int link_status_10g_bcm8706(struct niu *np, int *link_up_p)
2083 2084
2084out: 2085out:
2085 *link_up_p = link_up; 2086 *link_up_p = link_up;
2086 if (np->flags & NIU_FLAGS_HOTPLUG_PHY)
2087 err = 0;
2088 return err; 2087 return err;
2089} 2088}
2090 2089
@@ -2220,10 +2219,17 @@ static int link_status_10g_hotplug(struct niu *np, int *link_up_p)
2220 if (phy_present != phy_present_prev) { 2219 if (phy_present != phy_present_prev) {
2221 /* state change */ 2220 /* state change */
2222 if (phy_present) { 2221 if (phy_present) {
2222 /* A NEM was just plugged in */
2223 np->flags |= NIU_FLAGS_HOTPLUG_PHY_PRESENT; 2223 np->flags |= NIU_FLAGS_HOTPLUG_PHY_PRESENT;
2224 if (np->phy_ops->xcvr_init) 2224 if (np->phy_ops->xcvr_init)
2225 err = np->phy_ops->xcvr_init(np); 2225 err = np->phy_ops->xcvr_init(np);
2226 if (err) { 2226 if (err) {
2227 err = mdio_read(np, np->phy_addr,
2228 BCM8704_PHYXS_DEV_ADDR, MII_BMCR);
2229 if (err == 0xffff) {
2230 /* No mdio, back-to-back XAUI */
2231 goto out;
2232 }
2227 /* debounce */ 2233 /* debounce */
2228 np->flags &= ~NIU_FLAGS_HOTPLUG_PHY_PRESENT; 2234 np->flags &= ~NIU_FLAGS_HOTPLUG_PHY_PRESENT;
2229 } 2235 }
@@ -2234,13 +2240,21 @@ static int link_status_10g_hotplug(struct niu *np, int *link_up_p)
2234 np->dev->name); 2240 np->dev->name);
2235 } 2241 }
2236 } 2242 }
2237 if (np->flags & NIU_FLAGS_HOTPLUG_PHY_PRESENT) 2243out:
2244 if (np->flags & NIU_FLAGS_HOTPLUG_PHY_PRESENT) {
2238 err = link_status_10g_bcm8706(np, link_up_p); 2245 err = link_status_10g_bcm8706(np, link_up_p);
2246 if (err == 0xffff) {
2247 /* No mdio, back-to-back XAUI: it is C10NEM */
2248 *link_up_p = 1;
2249 np->link_config.active_speed = SPEED_10000;
2250 np->link_config.active_duplex = DUPLEX_FULL;
2251 }
2252 }
2239 } 2253 }
2240 2254
2241 spin_unlock_irqrestore(&np->lock, flags); 2255 spin_unlock_irqrestore(&np->lock, flags);
2242 2256
2243 return err; 2257 return 0;
2244} 2258}
2245 2259
2246static int niu_link_status(struct niu *np, int *link_up_p) 2260static int niu_link_status(struct niu *np, int *link_up_p)
@@ -2312,6 +2326,12 @@ static const struct niu_phy_ops phy_ops_10g_fiber_hotplug = {
2312 .link_status = link_status_10g_hotplug, 2326 .link_status = link_status_10g_hotplug,
2313}; 2327};
2314 2328
2329static const struct niu_phy_ops phy_ops_niu_10g_hotplug = {
2330 .serdes_init = serdes_init_niu_10g_fiber,
2331 .xcvr_init = xcvr_init_10g_bcm8706,
2332 .link_status = link_status_10g_hotplug,
2333};
2334
2315static const struct niu_phy_ops phy_ops_10g_copper = { 2335static const struct niu_phy_ops phy_ops_10g_copper = {
2316 .serdes_init = serdes_init_10g, 2336 .serdes_init = serdes_init_10g,
2317 .link_status = link_status_10g, /* XXX */ 2337 .link_status = link_status_10g, /* XXX */
@@ -2358,6 +2378,11 @@ static const struct niu_phy_template phy_template_10g_fiber_hotplug = {
2358 .phy_addr_base = 8, 2378 .phy_addr_base = 8,
2359}; 2379};
2360 2380
2381static const struct niu_phy_template phy_template_niu_10g_hotplug = {
2382 .ops = &phy_ops_niu_10g_hotplug,
2383 .phy_addr_base = 8,
2384};
2385
2361static const struct niu_phy_template phy_template_10g_copper = { 2386static const struct niu_phy_template phy_template_10g_copper = {
2362 .ops = &phy_ops_10g_copper, 2387 .ops = &phy_ops_10g_copper,
2363 .phy_addr_base = 10, 2388 .phy_addr_base = 10,
@@ -2542,8 +2567,16 @@ static int niu_determine_phy_disposition(struct niu *np)
2542 case NIU_FLAGS_10G | NIU_FLAGS_FIBER: 2567 case NIU_FLAGS_10G | NIU_FLAGS_FIBER:
2543 /* 10G Fiber */ 2568 /* 10G Fiber */
2544 default: 2569 default:
2545 tp = &phy_template_niu_10g_fiber; 2570 if (np->flags & NIU_FLAGS_HOTPLUG_PHY) {
2546 phy_addr_off += np->port; 2571 tp = &phy_template_niu_10g_hotplug;
2572 if (np->port == 0)
2573 phy_addr_off = 8;
2574 if (np->port == 1)
2575 phy_addr_off = 12;
2576 } else {
2577 tp = &phy_template_niu_10g_fiber;
2578 phy_addr_off += np->port;
2579 }
2547 break; 2580 break;
2548 } 2581 }
2549 } else { 2582 } else {
@@ -2630,11 +2663,11 @@ static int niu_init_link(struct niu *np)
2630 msleep(200); 2663 msleep(200);
2631 } 2664 }
2632 err = niu_serdes_init(np); 2665 err = niu_serdes_init(np);
2633 if (err) 2666 if (err && !(np->flags & NIU_FLAGS_HOTPLUG_PHY))
2634 return err; 2667 return err;
2635 msleep(200); 2668 msleep(200);
2636 err = niu_xcvr_init(np); 2669 err = niu_xcvr_init(np);
2637 if (!err) 2670 if (!err || (np->flags & NIU_FLAGS_HOTPLUG_PHY))
2638 niu_link_status(np, &ignore); 2671 niu_link_status(np, &ignore);
2639 return 0; 2672 return 0;
2640} 2673}
@@ -6330,6 +6363,7 @@ static void niu_set_rx_mode(struct net_device *dev)
6330 struct niu *np = netdev_priv(dev); 6363 struct niu *np = netdev_priv(dev);
6331 int i, alt_cnt, err; 6364 int i, alt_cnt, err;
6332 struct dev_addr_list *addr; 6365 struct dev_addr_list *addr;
6366 struct netdev_hw_addr *ha;
6333 unsigned long flags; 6367 unsigned long flags;
6334 u16 hash[16] = { 0, }; 6368 u16 hash[16] = { 0, };
6335 6369
@@ -6351,9 +6385,8 @@ static void niu_set_rx_mode(struct net_device *dev)
6351 if (alt_cnt) { 6385 if (alt_cnt) {
6352 int index = 0; 6386 int index = 0;
6353 6387
6354 for (addr = dev->uc_list; addr; addr = addr->next) { 6388 list_for_each_entry(ha, &dev->uc_list, list) {
6355 err = niu_set_alt_mac(np, index, 6389 err = niu_set_alt_mac(np, index, ha->addr);
6356 addr->da_addr);
6357 if (err) 6390 if (err)
6358 printk(KERN_WARNING PFX "%s: Error %d " 6391 printk(KERN_WARNING PFX "%s: Error %d "
6359 "adding alt mac %d\n", 6392 "adding alt mac %d\n",
@@ -6745,8 +6778,6 @@ static int niu_start_xmit(struct sk_buff *skb, struct net_device *dev)
6745 netif_tx_wake_queue(txq); 6778 netif_tx_wake_queue(txq);
6746 } 6779 }
6747 6780
6748 dev->trans_start = jiffies;
6749
6750out: 6781out:
6751 return NETDEV_TX_OK; 6782 return NETDEV_TX_OK;
6752 6783
@@ -9346,6 +9377,11 @@ static int __devinit niu_get_of_props(struct niu *np)
9346 if (model) 9377 if (model)
9347 strcpy(np->vpd.model, model); 9378 strcpy(np->vpd.model, model);
9348 9379
9380 if (of_find_property(dp, "hot-swappable-phy", &prop_len)) {
9381 np->flags |= (NIU_FLAGS_10G | NIU_FLAGS_FIBER |
9382 NIU_FLAGS_HOTPLUG_PHY);
9383 }
9384
9349 return 0; 9385 return 0;
9350#else 9386#else
9351 return -EINVAL; 9387 return -EINVAL;
diff --git a/drivers/net/ns83820.c b/drivers/net/ns83820.c
index d531614a90b5..940962ae8f23 100644
--- a/drivers/net/ns83820.c
+++ b/drivers/net/ns83820.c
@@ -1204,9 +1204,7 @@ again:
1204 if (stopped && (dev->tx_done_idx != tx_done_idx) && start_tx_okay(dev)) 1204 if (stopped && (dev->tx_done_idx != tx_done_idx) && start_tx_okay(dev))
1205 netif_start_queue(ndev); 1205 netif_start_queue(ndev);
1206 1206
1207 /* set the transmit start time to catch transmit timeouts */ 1207 return NETDEV_TX_OK;
1208 ndev->trans_start = jiffies;
1209 return 0;
1210} 1208}
1211 1209
1212static void ns83820_update_stats(struct ns83820 *dev) 1210static void ns83820_update_stats(struct ns83820 *dev)
@@ -1626,7 +1624,7 @@ static void ns83820_tx_watch(unsigned long data)
1626 ); 1624 );
1627#endif 1625#endif
1628 1626
1629 if (time_after(jiffies, ndev->trans_start + 1*HZ) && 1627 if (time_after(jiffies, dev_trans_start(ndev) + 1*HZ) &&
1630 dev->tx_done_idx != dev->tx_free_idx) { 1628 dev->tx_done_idx != dev->tx_free_idx) {
1631 printk(KERN_DEBUG "%s: ns83820_tx_watch: %u %u %d\n", 1629 printk(KERN_DEBUG "%s: ns83820_tx_watch: %u %u %d\n",
1632 ndev->name, 1630 ndev->name,
diff --git a/drivers/net/pasemi_mac.c b/drivers/net/pasemi_mac.c
index 5eeb5a87b738..c254a7f5b9f5 100644
--- a/drivers/net/pasemi_mac.c
+++ b/drivers/net/pasemi_mac.c
@@ -24,6 +24,7 @@
24#include <linux/dmaengine.h> 24#include <linux/dmaengine.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/netdevice.h> 26#include <linux/netdevice.h>
27#include <linux/of_mdio.h>
27#include <linux/etherdevice.h> 28#include <linux/etherdevice.h>
28#include <asm/dma-mapping.h> 29#include <asm/dma-mapping.h>
29#include <linux/in.h> 30#include <linux/in.h>
@@ -1086,34 +1087,17 @@ static int pasemi_mac_phy_init(struct net_device *dev)
1086 struct pasemi_mac *mac = netdev_priv(dev); 1087 struct pasemi_mac *mac = netdev_priv(dev);
1087 struct device_node *dn, *phy_dn; 1088 struct device_node *dn, *phy_dn;
1088 struct phy_device *phydev; 1089 struct phy_device *phydev;
1089 unsigned int phy_id;
1090 const phandle *ph;
1091 const unsigned int *prop;
1092 struct resource r;
1093 int ret;
1094 1090
1095 dn = pci_device_to_OF_node(mac->pdev); 1091 dn = pci_device_to_OF_node(mac->pdev);
1096 ph = of_get_property(dn, "phy-handle", NULL); 1092 phy_dn = of_parse_phandle(dn, "phy-handle", 0);
1097 if (!ph)
1098 return -ENODEV;
1099 phy_dn = of_find_node_by_phandle(*ph);
1100
1101 prop = of_get_property(phy_dn, "reg", NULL);
1102 ret = of_address_to_resource(phy_dn->parent, 0, &r);
1103 if (ret)
1104 goto err;
1105
1106 phy_id = *prop;
1107 snprintf(mac->phy_id, sizeof(mac->phy_id), "%x:%02x",
1108 (int)r.start, phy_id);
1109
1110 of_node_put(phy_dn); 1093 of_node_put(phy_dn);
1111 1094
1112 mac->link = 0; 1095 mac->link = 0;
1113 mac->speed = 0; 1096 mac->speed = 0;
1114 mac->duplex = -1; 1097 mac->duplex = -1;
1115 1098
1116 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII); 1099 phydev = of_phy_connect(dev, phy_dn, &pasemi_adjust_link, 0,
1100 PHY_INTERFACE_MODE_SGMII);
1117 1101
1118 if (IS_ERR(phydev)) { 1102 if (IS_ERR(phydev)) {
1119 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name); 1103 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
@@ -1123,10 +1107,6 @@ static int pasemi_mac_phy_init(struct net_device *dev)
1123 mac->phydev = phydev; 1107 mac->phydev = phydev;
1124 1108
1125 return 0; 1109 return 0;
1126
1127err:
1128 of_node_put(phy_dn);
1129 return -ENODEV;
1130} 1110}
1131 1111
1132 1112
@@ -1735,12 +1715,25 @@ out:
1735 return ret; 1715 return ret;
1736} 1716}
1737 1717
1718static const struct net_device_ops pasemi_netdev_ops = {
1719 .ndo_open = pasemi_mac_open,
1720 .ndo_stop = pasemi_mac_close,
1721 .ndo_start_xmit = pasemi_mac_start_tx,
1722 .ndo_set_multicast_list = pasemi_mac_set_rx_mode,
1723 .ndo_set_mac_address = pasemi_mac_set_mac_addr,
1724 .ndo_change_mtu = pasemi_mac_change_mtu,
1725 .ndo_validate_addr = eth_validate_addr,
1726#ifdef CONFIG_NET_POLL_CONTROLLER
1727 .ndo_poll_controller = pasemi_mac_netpoll,
1728#endif
1729};
1730
1738static int __devinit 1731static int __devinit
1739pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1732pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1740{ 1733{
1741 struct net_device *dev; 1734 struct net_device *dev;
1742 struct pasemi_mac *mac; 1735 struct pasemi_mac *mac;
1743 int err; 1736 int err, ret;
1744 1737
1745 err = pci_enable_device(pdev); 1738 err = pci_enable_device(pdev);
1746 if (err) 1739 if (err)
@@ -1798,12 +1791,13 @@ pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1798 } 1791 }
1799 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr)); 1792 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1800 1793
1801 mac->dma_if = mac_to_intf(mac); 1794 ret = mac_to_intf(mac);
1802 if (mac->dma_if < 0) { 1795 if (ret < 0) {
1803 dev_err(&mac->pdev->dev, "Can't map DMA interface\n"); 1796 dev_err(&mac->pdev->dev, "Can't map DMA interface\n");
1804 err = -ENODEV; 1797 err = -ENODEV;
1805 goto out; 1798 goto out;
1806 } 1799 }
1800 mac->dma_if = ret;
1807 1801
1808 switch (pdev->device) { 1802 switch (pdev->device) {
1809 case 0xa005: 1803 case 0xa005:
@@ -1817,19 +1811,11 @@ pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1817 goto out; 1811 goto out;
1818 } 1812 }
1819 1813
1820 dev->open = pasemi_mac_open; 1814 dev->netdev_ops = &pasemi_netdev_ops;
1821 dev->stop = pasemi_mac_close;
1822 dev->hard_start_xmit = pasemi_mac_start_tx;
1823 dev->set_multicast_list = pasemi_mac_set_rx_mode;
1824 dev->set_mac_address = pasemi_mac_set_mac_addr;
1825 dev->mtu = PE_DEF_MTU; 1815 dev->mtu = PE_DEF_MTU;
1826 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */ 1816 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1827 mac->bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128; 1817 mac->bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1828#ifdef CONFIG_NET_POLL_CONTROLLER
1829 dev->poll_controller = pasemi_mac_netpoll;
1830#endif
1831 1818
1832 dev->change_mtu = pasemi_mac_change_mtu;
1833 dev->ethtool_ops = &pasemi_mac_ethtool_ops; 1819 dev->ethtool_ops = &pasemi_mac_ethtool_ops;
1834 1820
1835 if (err) 1821 if (err)
diff --git a/drivers/net/pasemi_mac.h b/drivers/net/pasemi_mac.h
index 1a115ec60b53..e2f4efa8ad46 100644
--- a/drivers/net/pasemi_mac.h
+++ b/drivers/net/pasemi_mac.h
@@ -100,7 +100,6 @@ struct pasemi_mac {
100 int duplex; 100 int duplex;
101 101
102 unsigned int msg_enable; 102 unsigned int msg_enable;
103 char phy_id[BUS_ID_SIZE];
104}; 103};
105 104
106/* Software status descriptor (ring_info) */ 105/* Software status descriptor (ring_info) */
diff --git a/drivers/net/pci-skeleton.c b/drivers/net/pci-skeleton.c
index c95fd72c3bb9..8c1f6988f398 100644
--- a/drivers/net/pci-skeleton.c
+++ b/drivers/net/pci-skeleton.c
@@ -728,6 +728,17 @@ err_out:
728 return rc; 728 return rc;
729} 729}
730 730
731static const struct net_device_ops netdrv_netdev_ops = {
732 .ndo_open = netdrv_open,
733 .ndo_stop = netdrv_close,
734 .ndo_start_xmit = netdrv_start_xmit,
735 .ndo_set_multicast_list = netdrv_set_rx_mode,
736 .ndo_do_ioctl = netdrv_ioctl,
737 .ndo_tx_timeout = netdrv_tx_timeout,
738 .ndo_change_mtu = eth_change_mtu,
739 .ndo_validate_addr = eth_validate_addr,
740 .ndo_set_mac_address = eth_mac_addr,
741};
731 742
732static int __devinit netdrv_init_one (struct pci_dev *pdev, 743static int __devinit netdrv_init_one (struct pci_dev *pdev,
733 const struct pci_device_id *ent) 744 const struct pci_device_id *ent)
@@ -769,13 +780,7 @@ static int __devinit netdrv_init_one (struct pci_dev *pdev,
769 ((u16 *) (dev->dev_addr))[i] = 780 ((u16 *) (dev->dev_addr))[i] =
770 le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len)); 781 le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len));
771 782
772 /* The Rtl8139-specific entries in the device structure. */ 783 dev->netdev_ops = &netdrv_netdev_ops;
773 dev->open = netdrv_open;
774 dev->hard_start_xmit = netdrv_start_xmit;
775 dev->stop = netdrv_close;
776 dev->set_multicast_list = netdrv_set_rx_mode;
777 dev->do_ioctl = netdrv_ioctl;
778 dev->tx_timeout = netdrv_tx_timeout;
779 dev->watchdog_timeo = TX_TIMEOUT; 784 dev->watchdog_timeo = TX_TIMEOUT;
780 785
781 dev->irq = pdev->irq; 786 dev->irq = pdev->irq;
diff --git a/drivers/net/pcmcia/3c574_cs.c b/drivers/net/pcmcia/3c574_cs.c
index 8f3872b8985d..f35c609ba020 100644
--- a/drivers/net/pcmcia/3c574_cs.c
+++ b/drivers/net/pcmcia/3c574_cs.c
@@ -1195,7 +1195,7 @@ static int el3_close(struct net_device *dev)
1195 1195
1196static struct pcmcia_device_id tc574_ids[] = { 1196static struct pcmcia_device_id tc574_ids[] = {
1197 PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0574), 1197 PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0574),
1198 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0101, 0x0556, "3CCFEM556.cis"), 1198 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0101, 0x0556, "cis/3CCFEM556.cis"),
1199 PCMCIA_DEVICE_NULL, 1199 PCMCIA_DEVICE_NULL,
1200}; 1200};
1201MODULE_DEVICE_TABLE(pcmcia, tc574_ids); 1201MODULE_DEVICE_TABLE(pcmcia, tc574_ids);
diff --git a/drivers/net/pcmcia/3c589_cs.c b/drivers/net/pcmcia/3c589_cs.c
index cdf661a6092c..ec7cf5ac4f05 100644
--- a/drivers/net/pcmcia/3c589_cs.c
+++ b/drivers/net/pcmcia/3c589_cs.c
@@ -967,8 +967,8 @@ static struct pcmcia_device_id tc589_ids[] = {
967 PCMCIA_MFC_DEVICE_PROD_ID1(0, "Motorola MARQUIS", 0xf03e4e77), 967 PCMCIA_MFC_DEVICE_PROD_ID1(0, "Motorola MARQUIS", 0xf03e4e77),
968 PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0589), 968 PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0589),
969 PCMCIA_DEVICE_PROD_ID12("Farallon", "ENet", 0x58d93fc4, 0x992c2202), 969 PCMCIA_DEVICE_PROD_ID12("Farallon", "ENet", 0x58d93fc4, 0x992c2202),
970 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0101, 0x0035, "3CXEM556.cis"), 970 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0101, 0x0035, "cis/3CXEM556.cis"),
971 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0101, 0x003d, "3CXEM556.cis"), 971 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0101, 0x003d, "cis/3CXEM556.cis"),
972 PCMCIA_DEVICE_NULL, 972 PCMCIA_DEVICE_NULL,
973}; 973};
974MODULE_DEVICE_TABLE(pcmcia, tc589_ids); 974MODULE_DEVICE_TABLE(pcmcia, tc589_ids);
diff --git a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c
index 80124fac65fa..1c35e1d637a0 100644
--- a/drivers/net/pcnet32.c
+++ b/drivers/net/pcnet32.c
@@ -1227,7 +1227,6 @@ static void pcnet32_rx_entry(struct net_device *dev,
1227 dev->stats.rx_dropped++; 1227 dev->stats.rx_dropped++;
1228 return; 1228 return;
1229 } 1229 }
1230 skb->dev = dev;
1231 if (!rx_in_place) { 1230 if (!rx_in_place) {
1232 skb_reserve(skb, NET_IP_ALIGN); 1231 skb_reserve(skb, NET_IP_ALIGN);
1233 skb_put(skb, pkt_len); /* Make room */ 1232 skb_put(skb, pkt_len); /* Make room */
@@ -1406,7 +1405,7 @@ static int pcnet32_poll(struct napi_struct *napi, int budget)
1406 1405
1407 /* Set interrupt enable. */ 1406 /* Set interrupt enable. */
1408 lp->a.write_csr(ioaddr, CSR0, CSR0_INTEN); 1407 lp->a.write_csr(ioaddr, CSR0, CSR0_INTEN);
1409 mmiowb(); 1408
1410 spin_unlock_irqrestore(&lp->lock, flags); 1409 spin_unlock_irqrestore(&lp->lock, flags);
1411 } 1410 }
1412 return work_done; 1411 return work_done;
@@ -2598,7 +2597,7 @@ pcnet32_interrupt(int irq, void *dev_id)
2598 val = lp->a.read_csr(ioaddr, CSR3); 2597 val = lp->a.read_csr(ioaddr, CSR3);
2599 val |= 0x5f00; 2598 val |= 0x5f00;
2600 lp->a.write_csr(ioaddr, CSR3, val); 2599 lp->a.write_csr(ioaddr, CSR3, val);
2601 mmiowb(); 2600
2602 __napi_schedule(&lp->napi); 2601 __napi_schedule(&lp->napi);
2603 break; 2602 break;
2604 } 2603 }
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
index b754020cbe75..bd4e8d72dc08 100644
--- a/drivers/net/phy/mdio_bus.c
+++ b/drivers/net/phy/mdio_bus.c
@@ -113,7 +113,6 @@ int mdiobus_register(struct mii_bus *bus)
113 bus->reset(bus); 113 bus->reset(bus);
114 114
115 for (i = 0; i < PHY_MAX_ADDR; i++) { 115 for (i = 0; i < PHY_MAX_ADDR; i++) {
116 bus->phy_map[i] = NULL;
117 if ((bus->phy_mask & (1 << i)) == 0) { 116 if ((bus->phy_mask & (1 << i)) == 0) {
118 struct phy_device *phydev; 117 struct phy_device *phydev;
119 118
@@ -150,6 +149,7 @@ void mdiobus_unregister(struct mii_bus *bus)
150 for (i = 0; i < PHY_MAX_ADDR; i++) { 149 for (i = 0; i < PHY_MAX_ADDR; i++) {
151 if (bus->phy_map[i]) 150 if (bus->phy_map[i])
152 device_unregister(&bus->phy_map[i]->dev); 151 device_unregister(&bus->phy_map[i]->dev);
152 bus->phy_map[i] = NULL;
153 } 153 }
154} 154}
155EXPORT_SYMBOL(mdiobus_unregister); 155EXPORT_SYMBOL(mdiobus_unregister);
@@ -188,35 +188,12 @@ struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr)
188 if (IS_ERR(phydev) || phydev == NULL) 188 if (IS_ERR(phydev) || phydev == NULL)
189 return phydev; 189 return phydev;
190 190
191 /* There's a PHY at this address 191 err = phy_device_register(phydev);
192 * We need to set:
193 * 1) IRQ
194 * 2) bus_id
195 * 3) parent
196 * 4) bus
197 * 5) mii_bus
198 * And, we need to register it */
199
200 phydev->irq = bus->irq != NULL ? bus->irq[addr] : PHY_POLL;
201
202 phydev->dev.parent = bus->parent;
203 phydev->dev.bus = &mdio_bus_type;
204 dev_set_name(&phydev->dev, PHY_ID_FMT, bus->id, addr);
205
206 phydev->bus = bus;
207
208 /* Run all of the fixups for this PHY */
209 phy_scan_fixups(phydev);
210
211 err = device_register(&phydev->dev);
212 if (err) { 192 if (err) {
213 printk(KERN_ERR "phy %d failed to register\n", addr);
214 phy_device_free(phydev); 193 phy_device_free(phydev);
215 phydev = NULL; 194 return NULL;
216 } 195 }
217 196
218 bus->phy_map[addr] = phydev;
219
220 return phydev; 197 return phydev;
221} 198}
222EXPORT_SYMBOL(mdiobus_scan); 199EXPORT_SYMBOL(mdiobus_scan);
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index 0a06e4fd37d9..a2ece89622d6 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -39,20 +39,21 @@ MODULE_DESCRIPTION("PHY library");
39MODULE_AUTHOR("Andy Fleming"); 39MODULE_AUTHOR("Andy Fleming");
40MODULE_LICENSE("GPL"); 40MODULE_LICENSE("GPL");
41 41
42static struct phy_driver genphy_driver;
43extern int mdio_bus_init(void);
44extern void mdio_bus_exit(void);
45
46void phy_device_free(struct phy_device *phydev) 42void phy_device_free(struct phy_device *phydev)
47{ 43{
48 kfree(phydev); 44 kfree(phydev);
49} 45}
46EXPORT_SYMBOL(phy_device_free);
50 47
51static void phy_device_release(struct device *dev) 48static void phy_device_release(struct device *dev)
52{ 49{
53 phy_device_free(to_phy_device(dev)); 50 phy_device_free(to_phy_device(dev));
54} 51}
55 52
53static struct phy_driver genphy_driver;
54extern int mdio_bus_init(void);
55extern void mdio_bus_exit(void);
56
56static LIST_HEAD(phy_fixup_list); 57static LIST_HEAD(phy_fixup_list);
57static DEFINE_MUTEX(phy_fixup_lock); 58static DEFINE_MUTEX(phy_fixup_lock);
58 59
@@ -166,6 +167,10 @@ struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id)
166 dev->addr = addr; 167 dev->addr = addr;
167 dev->phy_id = phy_id; 168 dev->phy_id = phy_id;
168 dev->bus = bus; 169 dev->bus = bus;
170 dev->dev.parent = bus->parent;
171 dev->dev.bus = &mdio_bus_type;
172 dev->irq = bus->irq != NULL ? bus->irq[addr] : PHY_POLL;
173 dev_set_name(&dev->dev, PHY_ID_FMT, bus->id, addr);
169 174
170 dev->state = PHY_DOWN; 175 dev->state = PHY_DOWN;
171 176
@@ -235,6 +240,38 @@ struct phy_device * get_phy_device(struct mii_bus *bus, int addr)
235 240
236 return dev; 241 return dev;
237} 242}
243EXPORT_SYMBOL(get_phy_device);
244
245/**
246 * phy_device_register - Register the phy device on the MDIO bus
247 * @phy_device: phy_device structure to be added to the MDIO bus
248 */
249int phy_device_register(struct phy_device *phydev)
250{
251 int err;
252
253 /* Don't register a phy if one is already registered at this
254 * address */
255 if (phydev->bus->phy_map[phydev->addr])
256 return -EINVAL;
257 phydev->bus->phy_map[phydev->addr] = phydev;
258
259 /* Run all of the fixups for this PHY */
260 phy_scan_fixups(phydev);
261
262 err = device_register(&phydev->dev);
263 if (err) {
264 pr_err("phy %d failed to register\n", phydev->addr);
265 goto out;
266 }
267
268 return 0;
269
270 out:
271 phydev->bus->phy_map[phydev->addr] = NULL;
272 return err;
273}
274EXPORT_SYMBOL(phy_device_register);
238 275
239/** 276/**
240 * phy_prepare_link - prepares the PHY layer to monitor link status 277 * phy_prepare_link - prepares the PHY layer to monitor link status
@@ -255,6 +292,33 @@ void phy_prepare_link(struct phy_device *phydev,
255} 292}
256 293
257/** 294/**
295 * phy_connect_direct - connect an ethernet device to a specific phy_device
296 * @dev: the network device to connect
297 * @phydev: the pointer to the phy device
298 * @handler: callback function for state change notifications
299 * @flags: PHY device's dev_flags
300 * @interface: PHY device's interface
301 */
302int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
303 void (*handler)(struct net_device *), u32 flags,
304 phy_interface_t interface)
305{
306 int rc;
307
308 rc = phy_attach_direct(dev, phydev, flags, interface);
309 if (rc)
310 return rc;
311
312 phy_prepare_link(phydev, handler);
313 phy_start_machine(phydev, NULL);
314 if (phydev->irq > 0)
315 phy_start_interrupts(phydev);
316
317 return 0;
318}
319EXPORT_SYMBOL(phy_connect_direct);
320
321/**
258 * phy_connect - connect an ethernet device to a PHY device 322 * phy_connect - connect an ethernet device to a PHY device
259 * @dev: the network device to connect 323 * @dev: the network device to connect
260 * @bus_id: the id string of the PHY device to connect 324 * @bus_id: the id string of the PHY device to connect
@@ -275,18 +339,21 @@ struct phy_device * phy_connect(struct net_device *dev, const char *bus_id,
275 phy_interface_t interface) 339 phy_interface_t interface)
276{ 340{
277 struct phy_device *phydev; 341 struct phy_device *phydev;
342 struct device *d;
343 int rc;
278 344
279 phydev = phy_attach(dev, bus_id, flags, interface); 345 /* Search the list of PHY devices on the mdio bus for the
280 346 * PHY with the requested name */
281 if (IS_ERR(phydev)) 347 d = bus_find_device_by_name(&mdio_bus_type, NULL, bus_id);
282 return phydev; 348 if (!d) {
283 349 pr_err("PHY %s not found\n", bus_id);
284 phy_prepare_link(phydev, handler); 350 return ERR_PTR(-ENODEV);
285 351 }
286 phy_start_machine(phydev, NULL); 352 phydev = to_phy_device(d);
287 353
288 if (phydev->irq > 0) 354 rc = phy_connect_direct(dev, phydev, handler, flags, interface);
289 phy_start_interrupts(phydev); 355 if (rc)
356 return ERR_PTR(rc);
290 357
291 return phydev; 358 return phydev;
292} 359}
@@ -310,9 +377,9 @@ void phy_disconnect(struct phy_device *phydev)
310EXPORT_SYMBOL(phy_disconnect); 377EXPORT_SYMBOL(phy_disconnect);
311 378
312/** 379/**
313 * phy_attach - attach a network device to a particular PHY device 380 * phy_attach_direct - attach a network device to a given PHY device pointer
314 * @dev: network device to attach 381 * @dev: network device to attach
315 * @bus_id: PHY device to attach 382 * @phydev: Pointer to phy_device to attach
316 * @flags: PHY device's dev_flags 383 * @flags: PHY device's dev_flags
317 * @interface: PHY device's interface 384 * @interface: PHY device's interface
318 * 385 *
@@ -323,22 +390,10 @@ EXPORT_SYMBOL(phy_disconnect);
323 * the attaching device, and given a callback for link status 390 * the attaching device, and given a callback for link status
324 * change. The phy_device is returned to the attaching driver. 391 * change. The phy_device is returned to the attaching driver.
325 */ 392 */
326struct phy_device *phy_attach(struct net_device *dev, 393int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
327 const char *bus_id, u32 flags, phy_interface_t interface) 394 u32 flags, phy_interface_t interface)
328{ 395{
329 struct bus_type *bus = &mdio_bus_type; 396 struct device *d = &phydev->dev;
330 struct phy_device *phydev;
331 struct device *d;
332
333 /* Search the list of PHY devices on the mdio bus for the
334 * PHY with the requested name */
335 d = bus_find_device_by_name(bus, NULL, bus_id);
336 if (d) {
337 phydev = to_phy_device(d);
338 } else {
339 printk(KERN_ERR "%s not found\n", bus_id);
340 return ERR_PTR(-ENODEV);
341 }
342 397
343 /* Assume that if there is no driver, that it doesn't 398 /* Assume that if there is no driver, that it doesn't
344 * exist, and we should use the genphy driver. */ 399 * exist, and we should use the genphy driver. */
@@ -351,13 +406,12 @@ struct phy_device *phy_attach(struct net_device *dev,
351 err = device_bind_driver(d); 406 err = device_bind_driver(d);
352 407
353 if (err) 408 if (err)
354 return ERR_PTR(err); 409 return err;
355 } 410 }
356 411
357 if (phydev->attached_dev) { 412 if (phydev->attached_dev) {
358 printk(KERN_ERR "%s: %s already attached\n", 413 dev_err(&dev->dev, "PHY already attached\n");
359 dev->name, bus_id); 414 return -EBUSY;
360 return ERR_PTR(-EBUSY);
361 } 415 }
362 416
363 phydev->attached_dev = dev; 417 phydev->attached_dev = dev;
@@ -375,14 +429,49 @@ struct phy_device *phy_attach(struct net_device *dev,
375 err = phy_scan_fixups(phydev); 429 err = phy_scan_fixups(phydev);
376 430
377 if (err < 0) 431 if (err < 0)
378 return ERR_PTR(err); 432 return err;
379 433
380 err = phydev->drv->config_init(phydev); 434 err = phydev->drv->config_init(phydev);
381 435
382 if (err < 0) 436 if (err < 0)
383 return ERR_PTR(err); 437 return err;
384 } 438 }
385 439
440 return 0;
441}
442EXPORT_SYMBOL(phy_attach_direct);
443
444/**
445 * phy_attach - attach a network device to a particular PHY device
446 * @dev: network device to attach
447 * @bus_id: Bus ID of PHY device to attach
448 * @flags: PHY device's dev_flags
449 * @interface: PHY device's interface
450 *
451 * Description: Same as phy_attach_direct() except that a PHY bus_id
452 * string is passed instead of a pointer to a struct phy_device.
453 */
454struct phy_device *phy_attach(struct net_device *dev,
455 const char *bus_id, u32 flags, phy_interface_t interface)
456{
457 struct bus_type *bus = &mdio_bus_type;
458 struct phy_device *phydev;
459 struct device *d;
460 int rc;
461
462 /* Search the list of PHY devices on the mdio bus for the
463 * PHY with the requested name */
464 d = bus_find_device_by_name(bus, NULL, bus_id);
465 if (!d) {
466 pr_err("PHY %s not found\n", bus_id);
467 return ERR_PTR(-ENODEV);
468 }
469 phydev = to_phy_device(d);
470
471 rc = phy_attach_direct(dev, phydev, flags, interface);
472 if (rc)
473 return ERR_PTR(rc);
474
386 return phydev; 475 return phydev;
387} 476}
388EXPORT_SYMBOL(phy_attach); 477EXPORT_SYMBOL(phy_attach);
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index 8ee91421db12..639d11bc444e 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -1054,6 +1054,7 @@ static void ppp_setup(struct net_device *dev)
1054 dev->type = ARPHRD_PPP; 1054 dev->type = ARPHRD_PPP;
1055 dev->flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST; 1055 dev->flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST;
1056 dev->features |= NETIF_F_NETNS_LOCAL; 1056 dev->features |= NETIF_F_NETNS_LOCAL;
1057 dev->priv_flags &= ~IFF_XMIT_DST_RELEASE;
1057} 1058}
1058 1059
1059/* 1060/*
diff --git a/drivers/net/pppol2tp.c b/drivers/net/pppol2tp.c
index 5b07dd8e5c04..5981debcde5e 100644
--- a/drivers/net/pppol2tp.c
+++ b/drivers/net/pppol2tp.c
@@ -1238,8 +1238,7 @@ static void pppol2tp_tunnel_closeall(struct pppol2tp_tunnel *tunnel)
1238 struct pppol2tp_session *session; 1238 struct pppol2tp_session *session;
1239 struct sock *sk; 1239 struct sock *sk;
1240 1240
1241 if (tunnel == NULL) 1241 BUG_ON(tunnel == NULL);
1242 BUG();
1243 1242
1244 PRINTK(tunnel->debug, PPPOL2TP_MSG_CONTROL, KERN_INFO, 1243 PRINTK(tunnel->debug, PPPOL2TP_MSG_CONTROL, KERN_INFO,
1245 "%s: closing all sessions...\n", tunnel->name); 1244 "%s: closing all sessions...\n", tunnel->name);
diff --git a/drivers/net/qla3xxx.c b/drivers/net/qla3xxx.c
index cadc32c94c1e..8a823ecc99a9 100644
--- a/drivers/net/qla3xxx.c
+++ b/drivers/net/qla3xxx.c
@@ -2617,7 +2617,6 @@ static int ql3xxx_send(struct sk_buff *skb, struct net_device *ndev)
2617 &port_regs->CommonRegs.reqQProducerIndex, 2617 &port_regs->CommonRegs.reqQProducerIndex,
2618 qdev->req_producer_index); 2618 qdev->req_producer_index);
2619 2619
2620 ndev->trans_start = jiffies;
2621 if (netif_msg_tx_queued(qdev)) 2620 if (netif_msg_tx_queued(qdev))
2622 printk(KERN_DEBUG PFX "%s: tx queued, slot %d, len %d\n", 2621 printk(KERN_DEBUG PFX "%s: tx queued, slot %d, len %d\n",
2623 ndev->name, qdev->req_producer_index, skb->len); 2622 ndev->name, qdev->req_producer_index, skb->len);
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index c92ced247947..0b0778d9919c 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -2108,7 +2108,6 @@ static int qlge_send(struct sk_buff *skb, struct net_device *ndev)
2108 wmb(); 2108 wmb();
2109 2109
2110 ql_write_db_reg(tx_ring->prod_idx, tx_ring->prod_idx_db_reg); 2110 ql_write_db_reg(tx_ring->prod_idx, tx_ring->prod_idx_db_reg);
2111 ndev->trans_start = jiffies;
2112 QPRINTK(qdev, TX_QUEUED, DEBUG, "tx queued, slot %d, len %d\n", 2111 QPRINTK(qdev, TX_QUEUED, DEBUG, "tx queued, slot %d, len %d\n",
2113 tx_ring->prod_idx, skb->len); 2112 tx_ring->prod_idx, skb->len);
2114 2113
diff --git a/drivers/net/r6040.c b/drivers/net/r6040.c
index 6f97b47d74a6..ed63d23a6452 100644
--- a/drivers/net/r6040.c
+++ b/drivers/net/r6040.c
@@ -49,8 +49,8 @@
49#include <asm/processor.h> 49#include <asm/processor.h>
50 50
51#define DRV_NAME "r6040" 51#define DRV_NAME "r6040"
52#define DRV_VERSION "0.22" 52#define DRV_VERSION "0.23"
53#define DRV_RELDATE "25Mar2009" 53#define DRV_RELDATE "05May2009"
54 54
55/* PHY CHIP Address */ 55/* PHY CHIP Address */
56#define PHY1_ADDR 1 /* For MAC1 */ 56#define PHY1_ADDR 1 /* For MAC1 */
@@ -401,6 +401,9 @@ static void r6040_init_mac_regs(struct net_device *dev)
401 * we may got called by r6040_tx_timeout which has left 401 * we may got called by r6040_tx_timeout which has left
402 * some unsent tx buffers */ 402 * some unsent tx buffers */
403 iowrite16(0x01, ioaddr + MTPR); 403 iowrite16(0x01, ioaddr + MTPR);
404
405 /* Check media */
406 mii_check_media(&lp->mii_if, 1, 1);
404} 407}
405 408
406static void r6040_tx_timeout(struct net_device *dev) 409static void r6040_tx_timeout(struct net_device *dev)
@@ -528,6 +531,8 @@ static int r6040_phy_mode_chk(struct net_device *dev)
528 phy_dat = 0x0000; 531 phy_dat = 0x0000;
529 } 532 }
530 533
534 mii_check_media(&lp->mii_if, 0, 1);
535
531 return phy_dat; 536 return phy_dat;
532}; 537};
533 538
@@ -742,6 +747,14 @@ static int r6040_up(struct net_device *dev)
742 struct r6040_private *lp = netdev_priv(dev); 747 struct r6040_private *lp = netdev_priv(dev);
743 void __iomem *ioaddr = lp->base; 748 void __iomem *ioaddr = lp->base;
744 int ret; 749 int ret;
750 u16 val;
751
752 /* Check presence of a second PHY */
753 val = r6040_phy_read(ioaddr, lp->phy_addr, 2);
754 if (val == 0xFFFF) {
755 printk(KERN_ERR DRV_NAME " no second PHY attached\n");
756 return -EIO;
757 }
745 758
746 /* Initialise and alloc RX/TX buffers */ 759 /* Initialise and alloc RX/TX buffers */
747 r6040_init_txbufs(dev); 760 r6040_init_txbufs(dev);
@@ -802,7 +815,6 @@ static void r6040_timer(unsigned long data)
802 lp->phy_mode = phy_mode; 815 lp->phy_mode = phy_mode;
803 lp->mcr0 = (lp->mcr0 & 0x7fff) | phy_mode; 816 lp->mcr0 = (lp->mcr0 & 0x7fff) | phy_mode;
804 iowrite16(lp->mcr0, ioaddr); 817 iowrite16(lp->mcr0, ioaddr);
805 printk(KERN_INFO "Link Change %x \n", ioread16(ioaddr));
806 } 818 }
807 819
808 /* Timer active again */ 820 /* Timer active again */
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 8247a945a1d9..e94316b7868b 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -94,6 +94,7 @@ static const int multicast_filter_limit = 32;
94#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) 94#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
95 95
96enum mac_version { 96enum mac_version {
97 RTL_GIGA_MAC_NONE = 0x00,
97 RTL_GIGA_MAC_VER_01 = 0x01, // 8169 98 RTL_GIGA_MAC_VER_01 = 0x01, // 8169
98 RTL_GIGA_MAC_VER_02 = 0x02, // 8169S 99 RTL_GIGA_MAC_VER_02 = 0x02, // 8169S
99 RTL_GIGA_MAC_VER_03 = 0x03, // 8110S 100 RTL_GIGA_MAC_VER_03 = 0x03, // 8110S
@@ -479,7 +480,6 @@ struct rtl8169_private {
479 u16 intr_event; 480 u16 intr_event;
480 u16 napi_event; 481 u16 napi_event;
481 u16 intr_mask; 482 u16 intr_mask;
482 int phy_auto_nego_reg;
483 int phy_1000_ctrl_reg; 483 int phy_1000_ctrl_reg;
484#ifdef CONFIG_R8169_VLAN 484#ifdef CONFIG_R8169_VLAN
485 struct vlan_group *vlgrp; 485 struct vlan_group *vlgrp;
@@ -844,76 +844,81 @@ static int rtl8169_set_speed_xmii(struct net_device *dev,
844{ 844{
845 struct rtl8169_private *tp = netdev_priv(dev); 845 struct rtl8169_private *tp = netdev_priv(dev);
846 void __iomem *ioaddr = tp->mmio_addr; 846 void __iomem *ioaddr = tp->mmio_addr;
847 int auto_nego, giga_ctrl; 847 int giga_ctrl, bmcr;
848
849 auto_nego = mdio_read(ioaddr, MII_ADVERTISE);
850 auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
851 ADVERTISE_100HALF | ADVERTISE_100FULL);
852 giga_ctrl = mdio_read(ioaddr, MII_CTRL1000);
853 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
854 848
855 if (autoneg == AUTONEG_ENABLE) { 849 if (autoneg == AUTONEG_ENABLE) {
850 int auto_nego;
851
852 auto_nego = mdio_read(ioaddr, MII_ADVERTISE);
856 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL | 853 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
857 ADVERTISE_100HALF | ADVERTISE_100FULL); 854 ADVERTISE_100HALF | ADVERTISE_100FULL);
858 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; 855 auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
859 } else {
860 if (speed == SPEED_10)
861 auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL;
862 else if (speed == SPEED_100)
863 auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL;
864 else if (speed == SPEED_1000)
865 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
866
867 if (duplex == DUPLEX_HALF)
868 auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
869
870 if (duplex == DUPLEX_FULL)
871 auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
872 856
873 /* This tweak comes straight from Realtek's driver. */ 857 giga_ctrl = mdio_read(ioaddr, MII_CTRL1000);
874 if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) && 858 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
875 ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
876 (tp->mac_version == RTL_GIGA_MAC_VER_16))) {
877 auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA;
878 }
879 }
880 859
881 /* The 8100e/8101e/8102e do Fast Ethernet only. */ 860 /* The 8100e/8101e/8102e do Fast Ethernet only. */
882 if ((tp->mac_version == RTL_GIGA_MAC_VER_07) || 861 if ((tp->mac_version != RTL_GIGA_MAC_VER_07) &&
883 (tp->mac_version == RTL_GIGA_MAC_VER_08) || 862 (tp->mac_version != RTL_GIGA_MAC_VER_08) &&
884 (tp->mac_version == RTL_GIGA_MAC_VER_09) || 863 (tp->mac_version != RTL_GIGA_MAC_VER_09) &&
885 (tp->mac_version == RTL_GIGA_MAC_VER_10) || 864 (tp->mac_version != RTL_GIGA_MAC_VER_10) &&
886 (tp->mac_version == RTL_GIGA_MAC_VER_13) || 865 (tp->mac_version != RTL_GIGA_MAC_VER_13) &&
887 (tp->mac_version == RTL_GIGA_MAC_VER_14) || 866 (tp->mac_version != RTL_GIGA_MAC_VER_14) &&
888 (tp->mac_version == RTL_GIGA_MAC_VER_15) || 867 (tp->mac_version != RTL_GIGA_MAC_VER_15) &&
889 (tp->mac_version == RTL_GIGA_MAC_VER_16)) { 868 (tp->mac_version != RTL_GIGA_MAC_VER_16)) {
890 if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) && 869 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
891 netif_msg_link(tp)) { 870 } else if (netif_msg_link(tp)) {
892 printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n", 871 printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n",
893 dev->name); 872 dev->name);
894 } 873 }
895 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
896 }
897 874
898 auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; 875 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
876
877 if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
878 (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
879 (tp->mac_version >= RTL_GIGA_MAC_VER_17)) {
880 /*
881 * Wake up the PHY.
882 * Vendor specific (0x1f) and reserved (0x0e) MII
883 * registers.
884 */
885 mdio_write(ioaddr, 0x1f, 0x0000);
886 mdio_write(ioaddr, 0x0e, 0x0000);
887 }
888
889 mdio_write(ioaddr, MII_ADVERTISE, auto_nego);
890 mdio_write(ioaddr, MII_CTRL1000, giga_ctrl);
891 } else {
892 giga_ctrl = 0;
893
894 if (speed == SPEED_10)
895 bmcr = 0;
896 else if (speed == SPEED_100)
897 bmcr = BMCR_SPEED100;
898 else
899 return -EINVAL;
900
901 if (duplex == DUPLEX_FULL)
902 bmcr |= BMCR_FULLDPLX;
899 903
900 if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
901 (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
902 (tp->mac_version >= RTL_GIGA_MAC_VER_17)) {
903 /*
904 * Wake up the PHY.
905 * Vendor specific (0x1f) and reserved (0x0e) MII registers.
906 */
907 mdio_write(ioaddr, 0x1f, 0x0000); 904 mdio_write(ioaddr, 0x1f, 0x0000);
908 mdio_write(ioaddr, 0x0e, 0x0000);
909 } 905 }
910 906
911 tp->phy_auto_nego_reg = auto_nego;
912 tp->phy_1000_ctrl_reg = giga_ctrl; 907 tp->phy_1000_ctrl_reg = giga_ctrl;
913 908
914 mdio_write(ioaddr, MII_ADVERTISE, auto_nego); 909 mdio_write(ioaddr, MII_BMCR, bmcr);
915 mdio_write(ioaddr, MII_CTRL1000, giga_ctrl); 910
916 mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); 911 if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
912 (tp->mac_version == RTL_GIGA_MAC_VER_03)) {
913 if ((speed == SPEED_100) && (autoneg != AUTONEG_ENABLE)) {
914 mdio_write(ioaddr, 0x17, 0x2138);
915 mdio_write(ioaddr, 0x0e, 0x0260);
916 } else {
917 mdio_write(ioaddr, 0x17, 0x2108);
918 mdio_write(ioaddr, 0x0e, 0x0000);
919 }
920 }
921
917 return 0; 922 return 0;
918} 923}
919 924
@@ -1296,7 +1301,8 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
1296 { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02 }, 1301 { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02 },
1297 { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01 }, 1302 { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01 },
1298 1303
1299 { 0x00000000, 0x00000000, RTL_GIGA_MAC_VER_01 } /* Catch-all */ 1304 /* Catch-all */
1305 { 0x00000000, 0x00000000, RTL_GIGA_MAC_NONE }
1300 }, *p = mac_info; 1306 }, *p = mac_info;
1301 u32 reg; 1307 u32 reg;
1302 1308
@@ -1304,12 +1310,6 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
1304 while ((reg & p->mask) != p->val) 1310 while ((reg & p->mask) != p->val)
1305 p++; 1311 p++;
1306 tp->mac_version = p->mac_version; 1312 tp->mac_version = p->mac_version;
1307
1308 if (p->mask == 0x00000000) {
1309 struct pci_dev *pdev = tp->pci_dev;
1310
1311 dev_info(&pdev->dev, "unknown MAC (%08x)\n", reg);
1312 }
1313} 1313}
1314 1314
1315static void rtl8169_print_mac_version(struct rtl8169_private *tp) 1315static void rtl8169_print_mac_version(struct rtl8169_private *tp)
@@ -1885,6 +1885,7 @@ static const struct rtl_cfg_info {
1885 u16 intr_event; 1885 u16 intr_event;
1886 u16 napi_event; 1886 u16 napi_event;
1887 unsigned features; 1887 unsigned features;
1888 u8 default_ver;
1888} rtl_cfg_infos [] = { 1889} rtl_cfg_infos [] = {
1889 [RTL_CFG_0] = { 1890 [RTL_CFG_0] = {
1890 .hw_start = rtl_hw_start_8169, 1891 .hw_start = rtl_hw_start_8169,
@@ -1893,7 +1894,8 @@ static const struct rtl_cfg_info {
1893 .intr_event = SYSErr | LinkChg | RxOverflow | 1894 .intr_event = SYSErr | LinkChg | RxOverflow |
1894 RxFIFOOver | TxErr | TxOK | RxOK | RxErr, 1895 RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
1895 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, 1896 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
1896 .features = RTL_FEATURE_GMII 1897 .features = RTL_FEATURE_GMII,
1898 .default_ver = RTL_GIGA_MAC_VER_01,
1897 }, 1899 },
1898 [RTL_CFG_1] = { 1900 [RTL_CFG_1] = {
1899 .hw_start = rtl_hw_start_8168, 1901 .hw_start = rtl_hw_start_8168,
@@ -1902,7 +1904,8 @@ static const struct rtl_cfg_info {
1902 .intr_event = SYSErr | LinkChg | RxOverflow | 1904 .intr_event = SYSErr | LinkChg | RxOverflow |
1903 TxErr | TxOK | RxOK | RxErr, 1905 TxErr | TxOK | RxOK | RxErr,
1904 .napi_event = TxErr | TxOK | RxOK | RxOverflow, 1906 .napi_event = TxErr | TxOK | RxOK | RxOverflow,
1905 .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI 1907 .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI,
1908 .default_ver = RTL_GIGA_MAC_VER_11,
1906 }, 1909 },
1907 [RTL_CFG_2] = { 1910 [RTL_CFG_2] = {
1908 .hw_start = rtl_hw_start_8101, 1911 .hw_start = rtl_hw_start_8101,
@@ -1911,7 +1914,8 @@ static const struct rtl_cfg_info {
1911 .intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout | 1914 .intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout |
1912 RxFIFOOver | TxErr | TxOK | RxOK | RxErr, 1915 RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
1913 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, 1916 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
1914 .features = RTL_FEATURE_MSI 1917 .features = RTL_FEATURE_MSI,
1918 .default_ver = RTL_GIGA_MAC_VER_13,
1915 } 1919 }
1916}; 1920};
1917 1921
@@ -2092,6 +2096,15 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2092 /* Identify chip attached to board */ 2096 /* Identify chip attached to board */
2093 rtl8169_get_mac_version(tp, ioaddr); 2097 rtl8169_get_mac_version(tp, ioaddr);
2094 2098
2099 /* Use appropriate default if unknown */
2100 if (tp->mac_version == RTL_GIGA_MAC_NONE) {
2101 if (netif_msg_probe(tp)) {
2102 dev_notice(&pdev->dev,
2103 "unknown MAC, using family default\n");
2104 }
2105 tp->mac_version = cfg->default_ver;
2106 }
2107
2095 rtl8169_print_mac_version(tp); 2108 rtl8169_print_mac_version(tp);
2096 2109
2097 for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) { 2110 for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) {
@@ -2099,13 +2112,9 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2099 break; 2112 break;
2100 } 2113 }
2101 if (i == ARRAY_SIZE(rtl_chip_info)) { 2114 if (i == ARRAY_SIZE(rtl_chip_info)) {
2102 /* Unknown chip: assume array element #0, original RTL-8169 */ 2115 dev_err(&pdev->dev,
2103 if (netif_msg_probe(tp)) { 2116 "driver bug, MAC version not found in rtl_chip_info\n");
2104 dev_printk(KERN_DEBUG, &pdev->dev, 2117 goto err_out_msi_5;
2105 "unknown chip version, assuming %s\n",
2106 rtl_chip_info[0].name);
2107 }
2108 i = 0;
2109 } 2118 }
2110 tp->chipset = i; 2119 tp->chipset = i;
2111 2120
@@ -3270,8 +3279,6 @@ static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
3270 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); 3279 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
3271 txd->opts1 = cpu_to_le32(status); 3280 txd->opts1 = cpu_to_le32(status);
3272 3281
3273 dev->trans_start = jiffies;
3274
3275 tp->cur_tx += frags + 1; 3282 tp->cur_tx += frags + 1;
3276 3283
3277 smp_wmb(); 3284 smp_wmb();
@@ -3803,16 +3810,13 @@ static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
3803 return &dev->stats; 3810 return &dev->stats;
3804} 3811}
3805 3812
3806#ifdef CONFIG_PM 3813static void rtl8169_net_suspend(struct net_device *dev)
3807
3808static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
3809{ 3814{
3810 struct net_device *dev = pci_get_drvdata(pdev);
3811 struct rtl8169_private *tp = netdev_priv(dev); 3815 struct rtl8169_private *tp = netdev_priv(dev);
3812 void __iomem *ioaddr = tp->mmio_addr; 3816 void __iomem *ioaddr = tp->mmio_addr;
3813 3817
3814 if (!netif_running(dev)) 3818 if (!netif_running(dev))
3815 goto out_pci_suspend; 3819 return;
3816 3820
3817 netif_device_detach(dev); 3821 netif_device_detach(dev);
3818 netif_stop_queue(dev); 3822 netif_stop_queue(dev);
@@ -3824,24 +3828,25 @@ static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
3824 rtl8169_rx_missed(dev, ioaddr); 3828 rtl8169_rx_missed(dev, ioaddr);
3825 3829
3826 spin_unlock_irq(&tp->lock); 3830 spin_unlock_irq(&tp->lock);
3831}
3827 3832
3828out_pci_suspend: 3833#ifdef CONFIG_PM
3829 pci_save_state(pdev); 3834
3830 pci_enable_wake(pdev, pci_choose_state(pdev, state), 3835static int rtl8169_suspend(struct device *device)
3831 (tp->features & RTL_FEATURE_WOL) ? 1 : 0); 3836{
3832 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 3837 struct pci_dev *pdev = to_pci_dev(device);
3838 struct net_device *dev = pci_get_drvdata(pdev);
3839
3840 rtl8169_net_suspend(dev);
3833 3841
3834 return 0; 3842 return 0;
3835} 3843}
3836 3844
3837static int rtl8169_resume(struct pci_dev *pdev) 3845static int rtl8169_resume(struct device *device)
3838{ 3846{
3847 struct pci_dev *pdev = to_pci_dev(device);
3839 struct net_device *dev = pci_get_drvdata(pdev); 3848 struct net_device *dev = pci_get_drvdata(pdev);
3840 3849
3841 pci_set_power_state(pdev, PCI_D0);
3842 pci_restore_state(pdev);
3843 pci_enable_wake(pdev, PCI_D0, 0);
3844
3845 if (!netif_running(dev)) 3850 if (!netif_running(dev))
3846 goto out; 3851 goto out;
3847 3852
@@ -3852,23 +3857,42 @@ out:
3852 return 0; 3857 return 0;
3853} 3858}
3854 3859
3860static struct dev_pm_ops rtl8169_pm_ops = {
3861 .suspend = rtl8169_suspend,
3862 .resume = rtl8169_resume,
3863 .freeze = rtl8169_suspend,
3864 .thaw = rtl8169_resume,
3865 .poweroff = rtl8169_suspend,
3866 .restore = rtl8169_resume,
3867};
3868
3869#define RTL8169_PM_OPS (&rtl8169_pm_ops)
3870
3871#else /* !CONFIG_PM */
3872
3873#define RTL8169_PM_OPS NULL
3874
3875#endif /* !CONFIG_PM */
3876
3855static void rtl_shutdown(struct pci_dev *pdev) 3877static void rtl_shutdown(struct pci_dev *pdev)
3856{ 3878{
3857 rtl8169_suspend(pdev, PMSG_SUSPEND); 3879 struct net_device *dev = pci_get_drvdata(pdev);
3858} 3880
3881 rtl8169_net_suspend(dev);
3859 3882
3860#endif /* CONFIG_PM */ 3883 if (system_state == SYSTEM_POWER_OFF) {
3884 pci_wake_from_d3(pdev, true);
3885 pci_set_power_state(pdev, PCI_D3hot);
3886 }
3887}
3861 3888
3862static struct pci_driver rtl8169_pci_driver = { 3889static struct pci_driver rtl8169_pci_driver = {
3863 .name = MODULENAME, 3890 .name = MODULENAME,
3864 .id_table = rtl8169_pci_tbl, 3891 .id_table = rtl8169_pci_tbl,
3865 .probe = rtl8169_init_one, 3892 .probe = rtl8169_init_one,
3866 .remove = __devexit_p(rtl8169_remove_one), 3893 .remove = __devexit_p(rtl8169_remove_one),
3867#ifdef CONFIG_PM
3868 .suspend = rtl8169_suspend,
3869 .resume = rtl8169_resume,
3870 .shutdown = rtl_shutdown, 3894 .shutdown = rtl_shutdown,
3871#endif 3895 .driver.pm = RTL8169_PM_OPS,
3872}; 3896};
3873 3897
3874static int __init rtl8169_init_module(void) 3898static int __init rtl8169_init_module(void)
diff --git a/drivers/net/rionet.c b/drivers/net/rionet.c
index ec59e29807a6..8702e7acdee6 100644
--- a/drivers/net/rionet.c
+++ b/drivers/net/rionet.c
@@ -428,6 +428,15 @@ static const struct ethtool_ops rionet_ethtool_ops = {
428 .get_link = ethtool_op_get_link, 428 .get_link = ethtool_op_get_link,
429}; 429};
430 430
431static const struct net_device_ops rionet_netdev_ops = {
432 .ndo_open = rionet_open,
433 .ndo_stop = rionet_close,
434 .ndo_start_xmit = rionet_start_xmit,
435 .ndo_change_mtu = eth_change_mtu,
436 .ndo_validate_addr = eth_validate_addr,
437 .ndo_set_mac_address = eth_mac_addr,
438};
439
431static int rionet_setup_netdev(struct rio_mport *mport) 440static int rionet_setup_netdev(struct rio_mport *mport)
432{ 441{
433 int rc = 0; 442 int rc = 0;
@@ -466,10 +475,7 @@ static int rionet_setup_netdev(struct rio_mport *mport)
466 ndev->dev_addr[4] = device_id >> 8; 475 ndev->dev_addr[4] = device_id >> 8;
467 ndev->dev_addr[5] = device_id & 0xff; 476 ndev->dev_addr[5] = device_id & 0xff;
468 477
469 /* Fill in the driver function table */ 478 ndev->netdev_ops = &rionet_netdev_ops;
470 ndev->open = &rionet_open;
471 ndev->hard_start_xmit = &rionet_start_xmit;
472 ndev->stop = &rionet_close;
473 ndev->mtu = RIO_MAX_MSG_SIZE - 14; 479 ndev->mtu = RIO_MAX_MSG_SIZE - 14;
474 ndev->features = NETIF_F_LLTX; 480 ndev->features = NETIF_F_LLTX;
475 SET_ETHTOOL_OPS(ndev, &rionet_ethtool_ops); 481 SET_ETHTOOL_OPS(ndev, &rionet_ethtool_ops);
diff --git a/drivers/net/s2io-regs.h b/drivers/net/s2io-regs.h
index f8274f8941ea..416669fd68c6 100644
--- a/drivers/net/s2io-regs.h
+++ b/drivers/net/s2io-regs.h
@@ -271,11 +271,6 @@ struct XENA_dev_config {
271 u64 mdio_control; 271 u64 mdio_control;
272#define MDIO_MMD_INDX_ADDR(val) vBIT(val, 0, 16) 272#define MDIO_MMD_INDX_ADDR(val) vBIT(val, 0, 16)
273#define MDIO_MMD_DEV_ADDR(val) vBIT(val, 19, 5) 273#define MDIO_MMD_DEV_ADDR(val) vBIT(val, 19, 5)
274#define MDIO_MMD_PMA_DEV_ADDR 0x1
275#define MDIO_MMD_PMD_DEV_ADDR 0x1
276#define MDIO_MMD_WIS_DEV_ADDR 0x2
277#define MDIO_MMD_PCS_DEV_ADDR 0x3
278#define MDIO_MMD_PHYXS_DEV_ADDR 0x4
279#define MDIO_MMS_PRT_ADDR(val) vBIT(val, 27, 5) 274#define MDIO_MMS_PRT_ADDR(val) vBIT(val, 27, 5)
280#define MDIO_CTRL_START_TRANS(val) vBIT(val, 56, 4) 275#define MDIO_CTRL_START_TRANS(val) vBIT(val, 56, 4)
281#define MDIO_OP(val) vBIT(val, 60, 2) 276#define MDIO_OP(val) vBIT(val, 60, 2)
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index 1a4979f27fb5..2bc73ede4312 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -63,6 +63,7 @@
63#include <linux/kernel.h> 63#include <linux/kernel.h>
64#include <linux/netdevice.h> 64#include <linux/netdevice.h>
65#include <linux/etherdevice.h> 65#include <linux/etherdevice.h>
66#include <linux/mdio.h>
66#include <linux/skbuff.h> 67#include <linux/skbuff.h>
67#include <linux/init.h> 68#include <linux/init.h>
68#include <linux/delay.h> 69#include <linux/delay.h>
@@ -3328,9 +3329,9 @@ static void s2io_updt_xpak_counter(struct net_device *dev)
3328 struct stat_block *stat_info = sp->mac_control.stats_info; 3329 struct stat_block *stat_info = sp->mac_control.stats_info;
3329 3330
3330 /* Check the communication with the MDIO slave */ 3331 /* Check the communication with the MDIO slave */
3331 addr = 0x0000; 3332 addr = MDIO_CTRL1;
3332 val64 = 0x0; 3333 val64 = 0x0;
3333 val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev); 3334 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
3334 if((val64 == 0xFFFF) || (val64 == 0x0000)) 3335 if((val64 == 0xFFFF) || (val64 == 0x0000))
3335 { 3336 {
3336 DBG_PRINT(ERR_DBG, "ERR: MDIO slave access failed - " 3337 DBG_PRINT(ERR_DBG, "ERR: MDIO slave access failed - "
@@ -3338,24 +3339,24 @@ static void s2io_updt_xpak_counter(struct net_device *dev)
3338 return; 3339 return;
3339 } 3340 }
3340 3341
3341 /* Check for the expecte value of 2040 at PMA address 0x0000 */ 3342 /* Check for the expected value of control reg 1 */
3342 if(val64 != 0x2040) 3343 if(val64 != MDIO_CTRL1_SPEED10G)
3343 { 3344 {
3344 DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - "); 3345 DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - ");
3345 DBG_PRINT(ERR_DBG, "Returned: %llx- Expected: 0x2040\n", 3346 DBG_PRINT(ERR_DBG, "Returned: %llx- Expected: 0x%x\n",
3346 (unsigned long long)val64); 3347 (unsigned long long)val64, MDIO_CTRL1_SPEED10G);
3347 return; 3348 return;
3348 } 3349 }
3349 3350
3350 /* Loading the DOM register to MDIO register */ 3351 /* Loading the DOM register to MDIO register */
3351 addr = 0xA100; 3352 addr = 0xA100;
3352 s2io_mdio_write(MDIO_MMD_PMA_DEV_ADDR, addr, val16, dev); 3353 s2io_mdio_write(MDIO_MMD_PMAPMD, addr, val16, dev);
3353 val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev); 3354 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
3354 3355
3355 /* Reading the Alarm flags */ 3356 /* Reading the Alarm flags */
3356 addr = 0xA070; 3357 addr = 0xA070;
3357 val64 = 0x0; 3358 val64 = 0x0;
3358 val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev); 3359 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
3359 3360
3360 flag = CHECKBIT(val64, 0x7); 3361 flag = CHECKBIT(val64, 0x7);
3361 type = 1; 3362 type = 1;
@@ -3387,7 +3388,7 @@ static void s2io_updt_xpak_counter(struct net_device *dev)
3387 /* Reading the Warning flags */ 3388 /* Reading the Warning flags */
3388 addr = 0xA074; 3389 addr = 0xA074;
3389 val64 = 0x0; 3390 val64 = 0x0;
3390 val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev); 3391 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
3391 3392
3392 if(CHECKBIT(val64, 0x7)) 3393 if(CHECKBIT(val64, 0x7))
3393 stat_info->xpak_stat.warn_transceiver_temp_high++; 3394 stat_info->xpak_stat.warn_transceiver_temp_high++;
@@ -4298,7 +4299,6 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
4298 s2io_stop_tx_queue(sp, fifo->fifo_no); 4299 s2io_stop_tx_queue(sp, fifo->fifo_no);
4299 } 4300 }
4300 mac_control->stats_info->sw_stat.mem_allocated += skb->truesize; 4301 mac_control->stats_info->sw_stat.mem_allocated += skb->truesize;
4301 dev->trans_start = jiffies;
4302 spin_unlock_irqrestore(&fifo->tx_lock, flags); 4302 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4303 4303
4304 if (sp->config.intr_type == MSI_X) 4304 if (sp->config.intr_type == MSI_X)
diff --git a/drivers/net/sb1250-mac.c b/drivers/net/sb1250-mac.c
index ce7551e17ba7..7a4b9fbddbaf 100644
--- a/drivers/net/sb1250-mac.c
+++ b/drivers/net/sb1250-mac.c
@@ -2271,6 +2271,21 @@ static int sb1250_change_mtu(struct net_device *_dev, int new_mtu)
2271 return 0; 2271 return 0;
2272} 2272}
2273 2273
2274static const struct net_device_ops sbmac_netdev_ops = {
2275 .ndo_open = sbmac_open,
2276 .ndo_stop = sbmac_close,
2277 .ndo_start_xmit = sbmac_start_tx,
2278 .ndo_set_multicast_list = sbmac_set_rx_mode,
2279 .ndo_tx_timeout = sbmac_tx_timeout,
2280 .ndo_do_ioctl = sbmac_mii_ioctl,
2281 .ndo_change_mtu = sb1250_change_mtu,
2282 .ndo_validate_addr = eth_validate_addr,
2283 .ndo_set_mac_address = eth_mac_addr,
2284#ifdef CONFIG_NET_POLL_CONTROLLER
2285 .ndo_poll_controller = sbmac_netpoll,
2286#endif
2287};
2288
2274/********************************************************************** 2289/**********************************************************************
2275 * SBMAC_INIT(dev) 2290 * SBMAC_INIT(dev)
2276 * 2291 *
@@ -2285,7 +2300,7 @@ static int sb1250_change_mtu(struct net_device *_dev, int new_mtu)
2285 2300
2286static int sbmac_init(struct platform_device *pldev, long long base) 2301static int sbmac_init(struct platform_device *pldev, long long base)
2287{ 2302{
2288 struct net_device *dev = pldev->dev.driver_data; 2303 struct net_device *dev = dev_get_drvdata(&pldev->dev);
2289 int idx = pldev->id; 2304 int idx = pldev->id;
2290 struct sbmac_softc *sc = netdev_priv(dev); 2305 struct sbmac_softc *sc = netdev_priv(dev);
2291 unsigned char *eaddr; 2306 unsigned char *eaddr;
@@ -2327,21 +2342,11 @@ static int sbmac_init(struct platform_device *pldev, long long base)
2327 2342
2328 spin_lock_init(&(sc->sbm_lock)); 2343 spin_lock_init(&(sc->sbm_lock));
2329 2344
2330 dev->open = sbmac_open; 2345 dev->netdev_ops = &sbmac_netdev_ops;
2331 dev->hard_start_xmit = sbmac_start_tx; 2346 dev->watchdog_timeo = TX_TIMEOUT;
2332 dev->stop = sbmac_close;
2333 dev->set_multicast_list = sbmac_set_rx_mode;
2334 dev->do_ioctl = sbmac_mii_ioctl;
2335 dev->tx_timeout = sbmac_tx_timeout;
2336 dev->watchdog_timeo = TX_TIMEOUT;
2337 2347
2338 netif_napi_add(dev, &sc->napi, sbmac_poll, 16); 2348 netif_napi_add(dev, &sc->napi, sbmac_poll, 16);
2339 2349
2340 dev->change_mtu = sb1250_change_mtu;
2341#ifdef CONFIG_NET_POLL_CONTROLLER
2342 dev->poll_controller = sbmac_netpoll;
2343#endif
2344
2345 dev->irq = UNIT_INT(idx); 2350 dev->irq = UNIT_INT(idx);
2346 2351
2347 /* This is needed for PASS2 for Rx H/W checksum feature */ 2352 /* This is needed for PASS2 for Rx H/W checksum feature */
@@ -2726,7 +2731,7 @@ static int __init sbmac_probe(struct platform_device *pldev)
2726 goto out_unmap; 2731 goto out_unmap;
2727 } 2732 }
2728 2733
2729 pldev->dev.driver_data = dev; 2734 dev_set_drvdata(&pldev->dev, dev);
2730 SET_NETDEV_DEV(dev, &pldev->dev); 2735 SET_NETDEV_DEV(dev, &pldev->dev);
2731 2736
2732 sc = netdev_priv(dev); 2737 sc = netdev_priv(dev);
@@ -2751,7 +2756,7 @@ out_out:
2751 2756
2752static int __exit sbmac_remove(struct platform_device *pldev) 2757static int __exit sbmac_remove(struct platform_device *pldev)
2753{ 2758{
2754 struct net_device *dev = pldev->dev.driver_data; 2759 struct net_device *dev = dev_get_drvdata(&pldev->dev);
2755 struct sbmac_softc *sc = netdev_priv(dev); 2760 struct sbmac_softc *sc = netdev_priv(dev);
2756 2761
2757 unregister_netdev(dev); 2762 unregister_netdev(dev);
diff --git a/drivers/net/sfc/Kconfig b/drivers/net/sfc/Kconfig
index 12a82966b577..260aafaac235 100644
--- a/drivers/net/sfc/Kconfig
+++ b/drivers/net/sfc/Kconfig
@@ -1,7 +1,7 @@
1config SFC 1config SFC
2 tristate "Solarflare Solarstorm SFC4000 support" 2 tristate "Solarflare Solarstorm SFC4000 support"
3 depends on PCI && INET 3 depends on PCI && INET
4 select MII 4 select MDIO
5 select CRC32 5 select CRC32
6 select I2C 6 select I2C
7 select I2C_ALGOBIT 7 select I2C_ALGOBIT
diff --git a/drivers/net/sfc/boards.c b/drivers/net/sfc/boards.c
index 5182ac5a1034..4a4c74c891b7 100644
--- a/drivers/net/sfc/boards.c
+++ b/drivers/net/sfc/boards.c
@@ -172,7 +172,6 @@ static const u8 sfe4002_lm87_regs[] = {
172static struct i2c_board_info sfe4002_hwmon_info = { 172static struct i2c_board_info sfe4002_hwmon_info = {
173 I2C_BOARD_INFO("lm87", 0x2e), 173 I2C_BOARD_INFO("lm87", 0x2e),
174 .platform_data = &sfe4002_lm87_channel, 174 .platform_data = &sfe4002_lm87_channel,
175 .irq = -1,
176}; 175};
177 176
178/****************************************************************************/ 177/****************************************************************************/
@@ -247,7 +246,6 @@ static const u8 sfn4112f_lm87_regs[] = {
247static struct i2c_board_info sfn4112f_hwmon_info = { 246static struct i2c_board_info sfn4112f_hwmon_info = {
248 I2C_BOARD_INFO("lm87", 0x2e), 247 I2C_BOARD_INFO("lm87", 0x2e),
249 .platform_data = &sfn4112f_lm87_channel, 248 .platform_data = &sfn4112f_lm87_channel,
250 .irq = -1,
251}; 249};
252 250
253#define SFN4112F_ACT_LED 0 251#define SFN4112F_ACT_LED 0
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c
index 7269a426051c..343e8da1fa30 100644
--- a/drivers/net/sfc/efx.c
+++ b/drivers/net/sfc/efx.c
@@ -50,16 +50,6 @@ static struct workqueue_struct *reset_workqueue;
50 *************************************************************************/ 50 *************************************************************************/
51 51
52/* 52/*
53 * Enable large receive offload (LRO) aka soft segment reassembly (SSR)
54 *
55 * This sets the default for new devices. It can be controlled later
56 * using ethtool.
57 */
58static int lro = true;
59module_param(lro, int, 0644);
60MODULE_PARM_DESC(lro, "Large receive offload acceleration");
61
62/*
63 * Use separate channels for TX and RX events 53 * Use separate channels for TX and RX events
64 * 54 *
65 * Set this to 1 to use separate channels for TX and RX. It allows us 55 * Set this to 1 to use separate channels for TX and RX. It allows us
@@ -894,9 +884,9 @@ static int efx_wanted_rx_queues(void)
894 int count; 884 int count;
895 int cpu; 885 int cpu;
896 886
897 if (!alloc_cpumask_var(&core_mask, GFP_KERNEL)) { 887 if (unlikely(!alloc_cpumask_var(&core_mask, GFP_KERNEL))) {
898 printk(KERN_WARNING 888 printk(KERN_WARNING
899 "efx.c: allocation failure, irq balancing hobbled\n"); 889 "sfc: RSS disabled due to allocation failure\n");
900 return 1; 890 return 1;
901 } 891 }
902 892
@@ -1300,10 +1290,16 @@ out_requeue:
1300static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd) 1290static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1301{ 1291{
1302 struct efx_nic *efx = netdev_priv(net_dev); 1292 struct efx_nic *efx = netdev_priv(net_dev);
1293 struct mii_ioctl_data *data = if_mii(ifr);
1303 1294
1304 EFX_ASSERT_RESET_SERIALISED(efx); 1295 EFX_ASSERT_RESET_SERIALISED(efx);
1305 1296
1306 return generic_mii_ioctl(&efx->mii, if_mii(ifr), cmd, NULL); 1297 /* Convert phy_id from older PRTAD/DEVAD format */
1298 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1299 (data->phy_id & 0xfc00) == 0x0400)
1300 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1301
1302 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1307} 1303}
1308 1304
1309/************************************************************************** 1305/**************************************************************************
@@ -1945,7 +1941,7 @@ static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1945 mutex_init(&efx->mac_lock); 1941 mutex_init(&efx->mac_lock);
1946 efx->mac_op = &efx_dummy_mac_operations; 1942 efx->mac_op = &efx_dummy_mac_operations;
1947 efx->phy_op = &efx_dummy_phy_operations; 1943 efx->phy_op = &efx_dummy_phy_operations;
1948 efx->mii.dev = net_dev; 1944 efx->mdio.dev = net_dev;
1949 INIT_WORK(&efx->phy_work, efx_phy_work); 1945 INIT_WORK(&efx->phy_work, efx_phy_work);
1950 INIT_WORK(&efx->mac_work, efx_mac_work); 1946 INIT_WORK(&efx->mac_work, efx_mac_work);
1951 atomic_set(&efx->netif_stop_count, 1); 1947 atomic_set(&efx->netif_stop_count, 1);
@@ -2161,9 +2157,8 @@ static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2161 if (!net_dev) 2157 if (!net_dev)
2162 return -ENOMEM; 2158 return -ENOMEM;
2163 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG | 2159 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2164 NETIF_F_HIGHDMA | NETIF_F_TSO); 2160 NETIF_F_HIGHDMA | NETIF_F_TSO |
2165 if (lro) 2161 NETIF_F_GRO);
2166 net_dev->features |= NETIF_F_GRO;
2167 /* Mask for features that also apply to VLAN devices */ 2162 /* Mask for features that also apply to VLAN devices */
2168 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG | 2163 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2169 NETIF_F_HIGHDMA | NETIF_F_TSO); 2164 NETIF_F_HIGHDMA | NETIF_F_TSO);
diff --git a/drivers/net/sfc/ethtool.c b/drivers/net/sfc/ethtool.c
index 64309f4e8b19..997ea2a3d53f 100644
--- a/drivers/net/sfc/ethtool.c
+++ b/drivers/net/sfc/ethtool.c
@@ -10,6 +10,7 @@
10 10
11#include <linux/netdevice.h> 11#include <linux/netdevice.h>
12#include <linux/ethtool.h> 12#include <linux/ethtool.h>
13#include <linux/mdio.h>
13#include <linux/rtnetlink.h> 14#include <linux/rtnetlink.h>
14#include "net_driver.h" 15#include "net_driver.h"
15#include "workarounds.h" 16#include "workarounds.h"
@@ -345,8 +346,8 @@ static int efx_ethtool_fill_self_tests(struct efx_nic *efx,
345 unsigned int n = 0, i; 346 unsigned int n = 0, i;
346 enum efx_loopback_mode mode; 347 enum efx_loopback_mode mode;
347 348
348 efx_fill_test(n++, strings, data, &tests->mii, 349 efx_fill_test(n++, strings, data, &tests->mdio,
349 "core", 0, "mii", NULL); 350 "core", 0, "mdio", NULL);
350 efx_fill_test(n++, strings, data, &tests->nvram, 351 efx_fill_test(n++, strings, data, &tests->nvram,
351 "core", 0, "nvram", NULL); 352 "core", 0, "nvram", NULL);
352 efx_fill_test(n++, strings, data, &tests->interrupt, 353 efx_fill_test(n++, strings, data, &tests->interrupt,
@@ -529,14 +530,7 @@ static int efx_ethtool_nway_reset(struct net_device *net_dev)
529{ 530{
530 struct efx_nic *efx = netdev_priv(net_dev); 531 struct efx_nic *efx = netdev_priv(net_dev);
531 532
532 if (efx->phy_op->mmds & DEV_PRESENT_BIT(MDIO_MMD_AN)) { 533 return mdio45_nway_restart(&efx->mdio);
533 mdio_clause45_set_flag(efx, efx->mii.phy_id, MDIO_MMD_AN,
534 MDIO_MMDREG_CTRL1,
535 __ffs(BMCR_ANRESTART), true);
536 return 0;
537 }
538
539 return -EOPNOTSUPP;
540} 534}
541 535
542static u32 efx_ethtool_get_link(struct net_device *net_dev) 536static u32 efx_ethtool_get_link(struct net_device *net_dev)
@@ -689,7 +683,7 @@ static int efx_ethtool_set_pauseparam(struct net_device *net_dev,
689 return -EINVAL; 683 return -EINVAL;
690 } 684 }
691 685
692 if (!(efx->phy_op->mmds & DEV_PRESENT_BIT(MDIO_MMD_AN)) && 686 if (!(efx->phy_op->mmds & MDIO_DEVS_AN) &&
693 (wanted_fc & EFX_FC_AUTO)) { 687 (wanted_fc & EFX_FC_AUTO)) {
694 EFX_LOG(efx, "PHY does not support flow control " 688 EFX_LOG(efx, "PHY does not support flow control "
695 "autonegotiation\n"); 689 "autonegotiation\n");
@@ -717,7 +711,8 @@ static int efx_ethtool_set_pauseparam(struct net_device *net_dev,
717 mutex_lock(&efx->mac_lock); 711 mutex_lock(&efx->mac_lock);
718 712
719 efx->wanted_fc = wanted_fc; 713 efx->wanted_fc = wanted_fc;
720 mdio_clause45_set_pause(efx); 714 if (efx->phy_op->mmds & MDIO_DEVS_AN)
715 mdio45_ethtool_spauseparam_an(&efx->mdio, pause);
721 __efx_reconfigure_port(efx); 716 __efx_reconfigure_port(efx);
722 717
723 mutex_unlock(&efx->mac_lock); 718 mutex_unlock(&efx->mac_lock);
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c
index 466a8abb0053..c049364aec46 100644
--- a/drivers/net/sfc/falcon.c
+++ b/drivers/net/sfc/falcon.c
@@ -2063,26 +2063,6 @@ int falcon_dma_stats(struct efx_nic *efx, unsigned int done_offset)
2063 ************************************************************************** 2063 **************************************************************************
2064 */ 2064 */
2065 2065
2066/* Use the top bit of the MII PHY id to indicate the PHY type
2067 * (1G/10G), with the remaining bits as the actual PHY id.
2068 *
2069 * This allows us to avoid leaking information from the mii_if_info
2070 * structure into other data structures.
2071 */
2072#define FALCON_PHY_ID_ID_WIDTH EFX_WIDTH(MD_PRT_DEV_ADR)
2073#define FALCON_PHY_ID_ID_MASK ((1 << FALCON_PHY_ID_ID_WIDTH) - 1)
2074#define FALCON_PHY_ID_WIDTH (FALCON_PHY_ID_ID_WIDTH + 1)
2075#define FALCON_PHY_ID_MASK ((1 << FALCON_PHY_ID_WIDTH) - 1)
2076#define FALCON_PHY_ID_10G (1 << (FALCON_PHY_ID_WIDTH - 1))
2077
2078
2079/* Packing the clause 45 port and device fields into a single value */
2080#define MD_PRT_ADR_COMP_LBN (MD_PRT_ADR_LBN - MD_DEV_ADR_LBN)
2081#define MD_PRT_ADR_COMP_WIDTH MD_PRT_ADR_WIDTH
2082#define MD_DEV_ADR_COMP_LBN 0
2083#define MD_DEV_ADR_COMP_WIDTH MD_DEV_ADR_WIDTH
2084
2085
2086/* Wait for GMII access to complete */ 2066/* Wait for GMII access to complete */
2087static int falcon_gmii_wait(struct efx_nic *efx) 2067static int falcon_gmii_wait(struct efx_nic *efx)
2088{ 2068{
@@ -2108,49 +2088,29 @@ static int falcon_gmii_wait(struct efx_nic *efx)
2108 return -ETIMEDOUT; 2088 return -ETIMEDOUT;
2109} 2089}
2110 2090
2111/* Writes a GMII register of a PHY connected to Falcon using MDIO. */ 2091/* Write an MDIO register of a PHY connected to Falcon. */
2112static void falcon_mdio_write(struct net_device *net_dev, int phy_id, 2092static int falcon_mdio_write(struct net_device *net_dev,
2113 int addr, int value) 2093 int prtad, int devad, u16 addr, u16 value)
2114{ 2094{
2115 struct efx_nic *efx = netdev_priv(net_dev); 2095 struct efx_nic *efx = netdev_priv(net_dev);
2116 unsigned int phy_id2 = phy_id & FALCON_PHY_ID_ID_MASK;
2117 efx_oword_t reg; 2096 efx_oword_t reg;
2097 int rc;
2118 2098
2119 /* The 'generic' prt/dev packing in mdio_10g.h is conveniently 2099 EFX_REGDUMP(efx, "writing MDIO %d register %d.%d with 0x%04x\n",
2120 * chosen so that the only current user, Falcon, can take the 2100 prtad, devad, addr, value);
2121 * packed value and use them directly.
2122 * Fail to build if this assumption is broken.
2123 */
2124 BUILD_BUG_ON(FALCON_PHY_ID_10G != MDIO45_XPRT_ID_IS10G);
2125 BUILD_BUG_ON(FALCON_PHY_ID_ID_WIDTH != MDIO45_PRT_DEV_WIDTH);
2126 BUILD_BUG_ON(MD_PRT_ADR_COMP_LBN != MDIO45_PRT_ID_COMP_LBN);
2127 BUILD_BUG_ON(MD_DEV_ADR_COMP_LBN != MDIO45_DEV_ID_COMP_LBN);
2128
2129 if (phy_id2 == PHY_ADDR_INVALID)
2130 return;
2131
2132 /* See falcon_mdio_read for an explanation. */
2133 if (!(phy_id & FALCON_PHY_ID_10G)) {
2134 int mmd = ffs(efx->phy_op->mmds) - 1;
2135 EFX_TRACE(efx, "Fixing erroneous clause22 write\n");
2136 phy_id2 = mdio_clause45_pack(phy_id2, mmd)
2137 & FALCON_PHY_ID_ID_MASK;
2138 }
2139
2140 EFX_REGDUMP(efx, "writing GMII %d register %02x with %04x\n", phy_id,
2141 addr, value);
2142 2101
2143 spin_lock_bh(&efx->phy_lock); 2102 spin_lock_bh(&efx->phy_lock);
2144 2103
2145 /* Check MII not currently being accessed */ 2104 /* Check MDIO not currently being accessed */
2146 if (falcon_gmii_wait(efx) != 0) 2105 rc = falcon_gmii_wait(efx);
2106 if (rc)
2147 goto out; 2107 goto out;
2148 2108
2149 /* Write the address/ID register */ 2109 /* Write the address/ID register */
2150 EFX_POPULATE_OWORD_1(reg, MD_PHY_ADR, addr); 2110 EFX_POPULATE_OWORD_1(reg, MD_PHY_ADR, addr);
2151 falcon_write(efx, &reg, MD_PHY_ADR_REG_KER); 2111 falcon_write(efx, &reg, MD_PHY_ADR_REG_KER);
2152 2112
2153 EFX_POPULATE_OWORD_1(reg, MD_PRT_DEV_ADR, phy_id2); 2113 EFX_POPULATE_OWORD_2(reg, MD_PRT_ADR, prtad, MD_DEV_ADR, devad);
2154 falcon_write(efx, &reg, MD_ID_REG_KER); 2114 falcon_write(efx, &reg, MD_ID_REG_KER);
2155 2115
2156 /* Write data */ 2116 /* Write data */
@@ -2163,7 +2123,8 @@ static void falcon_mdio_write(struct net_device *net_dev, int phy_id,
2163 falcon_write(efx, &reg, MD_CS_REG_KER); 2123 falcon_write(efx, &reg, MD_CS_REG_KER);
2164 2124
2165 /* Wait for data to be written */ 2125 /* Wait for data to be written */
2166 if (falcon_gmii_wait(efx) != 0) { 2126 rc = falcon_gmii_wait(efx);
2127 if (rc) {
2167 /* Abort the write operation */ 2128 /* Abort the write operation */
2168 EFX_POPULATE_OWORD_2(reg, 2129 EFX_POPULATE_OWORD_2(reg,
2169 MD_WRC, 0, 2130 MD_WRC, 0,
@@ -2174,45 +2135,28 @@ static void falcon_mdio_write(struct net_device *net_dev, int phy_id,
2174 2135
2175 out: 2136 out:
2176 spin_unlock_bh(&efx->phy_lock); 2137 spin_unlock_bh(&efx->phy_lock);
2138 return rc;
2177} 2139}
2178 2140
2179/* Reads a GMII register from a PHY connected to Falcon. If no value 2141/* Read an MDIO register of a PHY connected to Falcon. */
2180 * could be read, -1 will be returned. */ 2142static int falcon_mdio_read(struct net_device *net_dev,
2181static int falcon_mdio_read(struct net_device *net_dev, int phy_id, int addr) 2143 int prtad, int devad, u16 addr)
2182{ 2144{
2183 struct efx_nic *efx = netdev_priv(net_dev); 2145 struct efx_nic *efx = netdev_priv(net_dev);
2184 unsigned int phy_addr = phy_id & FALCON_PHY_ID_ID_MASK;
2185 efx_oword_t reg; 2146 efx_oword_t reg;
2186 int value = -1; 2147 int rc;
2187
2188 if (phy_addr == PHY_ADDR_INVALID)
2189 return -1;
2190
2191 /* Our PHY code knows whether it needs to talk clause 22(1G) or 45(10G)
2192 * but the generic Linux code does not make any distinction or have
2193 * any state for this.
2194 * We spot the case where someone tried to talk 22 to a 45 PHY and
2195 * redirect the request to the lowest numbered MMD as a clause45
2196 * request. This is enough to allow simple queries like id and link
2197 * state to succeed. TODO: We may need to do more in future.
2198 */
2199 if (!(phy_id & FALCON_PHY_ID_10G)) {
2200 int mmd = ffs(efx->phy_op->mmds) - 1;
2201 EFX_TRACE(efx, "Fixing erroneous clause22 read\n");
2202 phy_addr = mdio_clause45_pack(phy_addr, mmd)
2203 & FALCON_PHY_ID_ID_MASK;
2204 }
2205 2148
2206 spin_lock_bh(&efx->phy_lock); 2149 spin_lock_bh(&efx->phy_lock);
2207 2150
2208 /* Check MII not currently being accessed */ 2151 /* Check MDIO not currently being accessed */
2209 if (falcon_gmii_wait(efx) != 0) 2152 rc = falcon_gmii_wait(efx);
2153 if (rc)
2210 goto out; 2154 goto out;
2211 2155
2212 EFX_POPULATE_OWORD_1(reg, MD_PHY_ADR, addr); 2156 EFX_POPULATE_OWORD_1(reg, MD_PHY_ADR, addr);
2213 falcon_write(efx, &reg, MD_PHY_ADR_REG_KER); 2157 falcon_write(efx, &reg, MD_PHY_ADR_REG_KER);
2214 2158
2215 EFX_POPULATE_OWORD_1(reg, MD_PRT_DEV_ADR, phy_addr); 2159 EFX_POPULATE_OWORD_2(reg, MD_PRT_ADR, prtad, MD_DEV_ADR, devad);
2216 falcon_write(efx, &reg, MD_ID_REG_KER); 2160 falcon_write(efx, &reg, MD_ID_REG_KER);
2217 2161
2218 /* Request data to be read */ 2162 /* Request data to be read */
@@ -2220,12 +2164,12 @@ static int falcon_mdio_read(struct net_device *net_dev, int phy_id, int addr)
2220 falcon_write(efx, &reg, MD_CS_REG_KER); 2164 falcon_write(efx, &reg, MD_CS_REG_KER);
2221 2165
2222 /* Wait for data to become available */ 2166 /* Wait for data to become available */
2223 value = falcon_gmii_wait(efx); 2167 rc = falcon_gmii_wait(efx);
2224 if (value == 0) { 2168 if (rc == 0) {
2225 falcon_read(efx, &reg, MD_RXD_REG_KER); 2169 falcon_read(efx, &reg, MD_RXD_REG_KER);
2226 value = EFX_OWORD_FIELD(reg, MD_RXD); 2170 rc = EFX_OWORD_FIELD(reg, MD_RXD);
2227 EFX_REGDUMP(efx, "read from GMII %d register %02x, got %04x\n", 2171 EFX_REGDUMP(efx, "read from MDIO %d register %d.%d, got %04x\n",
2228 phy_id, addr, value); 2172 prtad, devad, addr, rc);
2229 } else { 2173 } else {
2230 /* Abort the read operation */ 2174 /* Abort the read operation */
2231 EFX_POPULATE_OWORD_2(reg, 2175 EFX_POPULATE_OWORD_2(reg,
@@ -2233,22 +2177,13 @@ static int falcon_mdio_read(struct net_device *net_dev, int phy_id, int addr)
2233 MD_GC, 1); 2177 MD_GC, 1);
2234 falcon_write(efx, &reg, MD_CS_REG_KER); 2178 falcon_write(efx, &reg, MD_CS_REG_KER);
2235 2179
2236 EFX_LOG(efx, "read from GMII 0x%x register %02x, got " 2180 EFX_LOG(efx, "read from MDIO %d register %d.%d, got error %d\n",
2237 "error %d\n", phy_id, addr, value); 2181 prtad, devad, addr, rc);
2238 } 2182 }
2239 2183
2240 out: 2184 out:
2241 spin_unlock_bh(&efx->phy_lock); 2185 spin_unlock_bh(&efx->phy_lock);
2242 2186 return rc;
2243 return value;
2244}
2245
2246static void falcon_init_mdio(struct mii_if_info *gmii)
2247{
2248 gmii->mdio_read = falcon_mdio_read;
2249 gmii->mdio_write = falcon_mdio_write;
2250 gmii->phy_id_mask = FALCON_PHY_ID_MASK;
2251 gmii->reg_num_mask = ((1 << EFX_WIDTH(MD_PHY_ADR)) - 1);
2252} 2187}
2253 2188
2254static int falcon_probe_phy(struct efx_nic *efx) 2189static int falcon_probe_phy(struct efx_nic *efx)
@@ -2342,9 +2277,11 @@ int falcon_probe_port(struct efx_nic *efx)
2342 if (rc) 2277 if (rc)
2343 return rc; 2278 return rc;
2344 2279
2345 /* Set up GMII structure for PHY */ 2280 /* Set up MDIO structure for PHY */
2346 efx->mii.supports_gmii = true; 2281 efx->mdio.mmds = efx->phy_op->mmds;
2347 falcon_init_mdio(&efx->mii); 2282 efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
2283 efx->mdio.mdio_read = falcon_mdio_read;
2284 efx->mdio.mdio_write = falcon_mdio_write;
2348 2285
2349 /* Hardware flow ctrl. FalconA RX FIFO too small for pause generation */ 2286 /* Hardware flow ctrl. FalconA RX FIFO too small for pause generation */
2350 if (falcon_rev(efx) >= FALCON_REV_B0) 2287 if (falcon_rev(efx) >= FALCON_REV_B0)
@@ -2761,7 +2698,7 @@ static int falcon_probe_nvconfig(struct efx_nic *efx)
2761 if (rc == -EINVAL) { 2698 if (rc == -EINVAL) {
2762 EFX_ERR(efx, "NVRAM is invalid therefore using defaults\n"); 2699 EFX_ERR(efx, "NVRAM is invalid therefore using defaults\n");
2763 efx->phy_type = PHY_TYPE_NONE; 2700 efx->phy_type = PHY_TYPE_NONE;
2764 efx->mii.phy_id = PHY_ADDR_INVALID; 2701 efx->mdio.prtad = MDIO_PRTAD_NONE;
2765 board_rev = 0; 2702 board_rev = 0;
2766 rc = 0; 2703 rc = 0;
2767 } else if (rc) { 2704 } else if (rc) {
@@ -2771,7 +2708,7 @@ static int falcon_probe_nvconfig(struct efx_nic *efx)
2771 struct falcon_nvconfig_board_v3 *v3 = &nvconfig->board_v3; 2708 struct falcon_nvconfig_board_v3 *v3 = &nvconfig->board_v3;
2772 2709
2773 efx->phy_type = v2->port0_phy_type; 2710 efx->phy_type = v2->port0_phy_type;
2774 efx->mii.phy_id = v2->port0_phy_addr; 2711 efx->mdio.prtad = v2->port0_phy_addr;
2775 board_rev = le16_to_cpu(v2->board_revision); 2712 board_rev = le16_to_cpu(v2->board_revision);
2776 2713
2777 if (le16_to_cpu(nvconfig->board_struct_ver) >= 3) { 2714 if (le16_to_cpu(nvconfig->board_struct_ver) >= 3) {
@@ -2793,7 +2730,7 @@ static int falcon_probe_nvconfig(struct efx_nic *efx)
2793 /* Read the MAC addresses */ 2730 /* Read the MAC addresses */
2794 memcpy(efx->mac_address, nvconfig->mac_address[0], ETH_ALEN); 2731 memcpy(efx->mac_address, nvconfig->mac_address[0], ETH_ALEN);
2795 2732
2796 EFX_LOG(efx, "PHY is %d phy_id %d\n", efx->phy_type, efx->mii.phy_id); 2733 EFX_LOG(efx, "PHY is %d phy_id %d\n", efx->phy_type, efx->mdio.prtad);
2797 2734
2798 efx_set_board_info(efx, board_rev); 2735 efx_set_board_info(efx, board_rev);
2799 2736
diff --git a/drivers/net/sfc/falcon_hwdefs.h b/drivers/net/sfc/falcon_hwdefs.h
index bda8d5bb72e4..375e2a5961ec 100644
--- a/drivers/net/sfc/falcon_hwdefs.h
+++ b/drivers/net/sfc/falcon_hwdefs.h
@@ -456,9 +456,6 @@
456#define MD_PRT_ADR_WIDTH 5 456#define MD_PRT_ADR_WIDTH 5
457#define MD_DEV_ADR_LBN 6 457#define MD_DEV_ADR_LBN 6
458#define MD_DEV_ADR_WIDTH 5 458#define MD_DEV_ADR_WIDTH 5
459/* Used for writing both at once */
460#define MD_PRT_DEV_ADR_LBN 6
461#define MD_PRT_DEV_ADR_WIDTH 10
462 459
463/* PHY management status & mask register (DWORD read only) */ 460/* PHY management status & mask register (DWORD read only) */
464#define MD_STAT_REG_KER 0xc50 461#define MD_STAT_REG_KER 0xc50
diff --git a/drivers/net/sfc/falcon_xmac.c b/drivers/net/sfc/falcon_xmac.c
index 5a03713685ac..2b3269c03263 100644
--- a/drivers/net/sfc/falcon_xmac.c
+++ b/drivers/net/sfc/falcon_xmac.c
@@ -133,7 +133,7 @@ bool falcon_xaui_link_ok(struct efx_nic *efx)
133 /* If the link is up, then check the phy side of the xaui link */ 133 /* If the link is up, then check the phy side of the xaui link */
134 if (efx->link_up && link_ok) 134 if (efx->link_up && link_ok)
135 if (efx->phy_op->mmds & (1 << MDIO_MMD_PHYXS)) 135 if (efx->phy_op->mmds & (1 << MDIO_MMD_PHYXS))
136 link_ok = mdio_clause45_phyxgxs_lane_sync(efx); 136 link_ok = efx_mdio_phyxgxs_lane_sync(efx);
137 137
138 return link_ok; 138 return link_ok;
139} 139}
diff --git a/drivers/net/sfc/mdio_10g.c b/drivers/net/sfc/mdio_10g.c
index 9f5ec3eb3418..6c33459f9ea9 100644
--- a/drivers/net/sfc/mdio_10g.c
+++ b/drivers/net/sfc/mdio_10g.c
@@ -17,7 +17,7 @@
17#include "boards.h" 17#include "boards.h"
18#include "workarounds.h" 18#include "workarounds.h"
19 19
20unsigned mdio_id_oui(u32 id) 20unsigned efx_mdio_id_oui(u32 id)
21{ 21{
22 unsigned oui = 0; 22 unsigned oui = 0;
23 int i; 23 int i;
@@ -32,52 +32,45 @@ unsigned mdio_id_oui(u32 id)
32 return oui; 32 return oui;
33} 33}
34 34
35int mdio_clause45_reset_mmd(struct efx_nic *port, int mmd, 35int efx_mdio_reset_mmd(struct efx_nic *port, int mmd,
36 int spins, int spintime) 36 int spins, int spintime)
37{ 37{
38 u32 ctrl; 38 u32 ctrl;
39 int phy_id = port->mii.phy_id;
40 39
41 /* Catch callers passing values in the wrong units (or just silly) */ 40 /* Catch callers passing values in the wrong units (or just silly) */
42 EFX_BUG_ON_PARANOID(spins * spintime >= 5000); 41 EFX_BUG_ON_PARANOID(spins * spintime >= 5000);
43 42
44 mdio_clause45_write(port, phy_id, mmd, MDIO_MMDREG_CTRL1, 43 efx_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET);
45 (1 << MDIO_MMDREG_CTRL1_RESET_LBN));
46 /* Wait for the reset bit to clear. */ 44 /* Wait for the reset bit to clear. */
47 do { 45 do {
48 msleep(spintime); 46 msleep(spintime);
49 ctrl = mdio_clause45_read(port, phy_id, mmd, MDIO_MMDREG_CTRL1); 47 ctrl = efx_mdio_read(port, mmd, MDIO_CTRL1);
50 spins--; 48 spins--;
51 49
52 } while (spins && (ctrl & (1 << MDIO_MMDREG_CTRL1_RESET_LBN))); 50 } while (spins && (ctrl & MDIO_CTRL1_RESET));
53 51
54 return spins ? spins : -ETIMEDOUT; 52 return spins ? spins : -ETIMEDOUT;
55} 53}
56 54
57static int mdio_clause45_check_mmd(struct efx_nic *efx, int mmd, 55static int efx_mdio_check_mmd(struct efx_nic *efx, int mmd, int fault_fatal)
58 int fault_fatal)
59{ 56{
60 int status; 57 int status;
61 int phy_id = efx->mii.phy_id;
62 58
63 if (LOOPBACK_INTERNAL(efx)) 59 if (LOOPBACK_INTERNAL(efx))
64 return 0; 60 return 0;
65 61
66 if (mmd != MDIO_MMD_AN) { 62 if (mmd != MDIO_MMD_AN) {
67 /* Read MMD STATUS2 to check it is responding. */ 63 /* Read MMD STATUS2 to check it is responding. */
68 status = mdio_clause45_read(efx, phy_id, mmd, 64 status = efx_mdio_read(efx, mmd, MDIO_STAT2);
69 MDIO_MMDREG_STAT2); 65 if ((status & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL) {
70 if (((status >> MDIO_MMDREG_STAT2_PRESENT_LBN) &
71 ((1 << MDIO_MMDREG_STAT2_PRESENT_WIDTH) - 1)) !=
72 MDIO_MMDREG_STAT2_PRESENT_VAL) {
73 EFX_ERR(efx, "PHY MMD %d not responding.\n", mmd); 66 EFX_ERR(efx, "PHY MMD %d not responding.\n", mmd);
74 return -EIO; 67 return -EIO;
75 } 68 }
76 } 69 }
77 70
78 /* Read MMD STATUS 1 to check for fault. */ 71 /* Read MMD STATUS 1 to check for fault. */
79 status = mdio_clause45_read(efx, phy_id, mmd, MDIO_MMDREG_STAT1); 72 status = efx_mdio_read(efx, mmd, MDIO_STAT1);
80 if ((status & (1 << MDIO_MMDREG_STAT1_FAULT_LBN)) != 0) { 73 if (status & MDIO_STAT1_FAULT) {
81 if (fault_fatal) { 74 if (fault_fatal) {
82 EFX_ERR(efx, "PHY MMD %d reporting fatal" 75 EFX_ERR(efx, "PHY MMD %d reporting fatal"
83 " fault: status %x\n", mmd, status); 76 " fault: status %x\n", mmd, status);
@@ -94,8 +87,7 @@ static int mdio_clause45_check_mmd(struct efx_nic *efx, int mmd,
94#define MDIO45_RESET_TIME 1000 /* ms */ 87#define MDIO45_RESET_TIME 1000 /* ms */
95#define MDIO45_RESET_ITERS 100 88#define MDIO45_RESET_ITERS 100
96 89
97int mdio_clause45_wait_reset_mmds(struct efx_nic *efx, 90int efx_mdio_wait_reset_mmds(struct efx_nic *efx, unsigned int mmd_mask)
98 unsigned int mmd_mask)
99{ 91{
100 const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS; 92 const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS;
101 int tries = MDIO45_RESET_ITERS; 93 int tries = MDIO45_RESET_ITERS;
@@ -109,16 +101,13 @@ int mdio_clause45_wait_reset_mmds(struct efx_nic *efx,
109 in_reset = 0; 101 in_reset = 0;
110 while (mask) { 102 while (mask) {
111 if (mask & 1) { 103 if (mask & 1) {
112 stat = mdio_clause45_read(efx, 104 stat = efx_mdio_read(efx, mmd, MDIO_CTRL1);
113 efx->mii.phy_id,
114 mmd,
115 MDIO_MMDREG_CTRL1);
116 if (stat < 0) { 105 if (stat < 0) {
117 EFX_ERR(efx, "failed to read status of" 106 EFX_ERR(efx, "failed to read status of"
118 " MMD %d\n", mmd); 107 " MMD %d\n", mmd);
119 return -EIO; 108 return -EIO;
120 } 109 }
121 if (stat & (1 << MDIO_MMDREG_CTRL1_RESET_LBN)) 110 if (stat & MDIO_CTRL1_RESET)
122 in_reset |= (1 << mmd); 111 in_reset |= (1 << mmd);
123 } 112 }
124 mask = mask >> 1; 113 mask = mask >> 1;
@@ -137,28 +126,26 @@ int mdio_clause45_wait_reset_mmds(struct efx_nic *efx,
137 return rc; 126 return rc;
138} 127}
139 128
140int mdio_clause45_check_mmds(struct efx_nic *efx, 129int efx_mdio_check_mmds(struct efx_nic *efx,
141 unsigned int mmd_mask, unsigned int fatal_mask) 130 unsigned int mmd_mask, unsigned int fatal_mask)
142{ 131{
143 int mmd = 0, probe_mmd, devs0, devs1; 132 int mmd = 0, probe_mmd, devs1, devs2;
144 u32 devices; 133 u32 devices;
145 134
146 /* Historically we have probed the PHYXS to find out what devices are 135 /* Historically we have probed the PHYXS to find out what devices are
147 * present,but that doesn't work so well if the PHYXS isn't expected 136 * present,but that doesn't work so well if the PHYXS isn't expected
148 * to exist, if so just find the first item in the list supplied. */ 137 * to exist, if so just find the first item in the list supplied. */
149 probe_mmd = (mmd_mask & MDIO_MMDREG_DEVS_PHYXS) ? MDIO_MMD_PHYXS : 138 probe_mmd = (mmd_mask & MDIO_DEVS_PHYXS) ? MDIO_MMD_PHYXS :
150 __ffs(mmd_mask); 139 __ffs(mmd_mask);
151 140
152 /* Check all the expected MMDs are present */ 141 /* Check all the expected MMDs are present */
153 devs0 = mdio_clause45_read(efx, efx->mii.phy_id, 142 devs1 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS1);
154 probe_mmd, MDIO_MMDREG_DEVS0); 143 devs2 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS2);
155 devs1 = mdio_clause45_read(efx, efx->mii.phy_id, 144 if (devs1 < 0 || devs2 < 0) {
156 probe_mmd, MDIO_MMDREG_DEVS1);
157 if (devs0 < 0 || devs1 < 0) {
158 EFX_ERR(efx, "failed to read devices present\n"); 145 EFX_ERR(efx, "failed to read devices present\n");
159 return -EIO; 146 return -EIO;
160 } 147 }
161 devices = devs0 | (devs1 << 16); 148 devices = devs1 | (devs2 << 16);
162 if ((devices & mmd_mask) != mmd_mask) { 149 if ((devices & mmd_mask) != mmd_mask) {
163 EFX_ERR(efx, "required MMDs not present: got %x, " 150 EFX_ERR(efx, "required MMDs not present: got %x, "
164 "wanted %x\n", devices, mmd_mask); 151 "wanted %x\n", devices, mmd_mask);
@@ -170,7 +157,7 @@ int mdio_clause45_check_mmds(struct efx_nic *efx,
170 while (mmd_mask) { 157 while (mmd_mask) {
171 if (mmd_mask & 1) { 158 if (mmd_mask & 1) {
172 int fault_fatal = fatal_mask & 1; 159 int fault_fatal = fatal_mask & 1;
173 if (mdio_clause45_check_mmd(efx, mmd, fault_fatal)) 160 if (efx_mdio_check_mmd(efx, mmd, fault_fatal))
174 return -EIO; 161 return -EIO;
175 } 162 }
176 mmd_mask = mmd_mask >> 1; 163 mmd_mask = mmd_mask >> 1;
@@ -181,13 +168,8 @@ int mdio_clause45_check_mmds(struct efx_nic *efx,
181 return 0; 168 return 0;
182} 169}
183 170
184bool mdio_clause45_links_ok(struct efx_nic *efx, unsigned int mmd_mask) 171bool efx_mdio_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
185{ 172{
186 int phy_id = efx->mii.phy_id;
187 u32 reg;
188 bool ok = true;
189 int mmd = 0;
190
191 /* If the port is in loopback, then we should only consider a subset 173 /* If the port is in loopback, then we should only consider a subset
192 * of mmd's */ 174 * of mmd's */
193 if (LOOPBACK_INTERNAL(efx)) 175 if (LOOPBACK_INTERNAL(efx))
@@ -197,241 +179,75 @@ bool mdio_clause45_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
197 else if (efx_phy_mode_disabled(efx->phy_mode)) 179 else if (efx_phy_mode_disabled(efx->phy_mode))
198 return false; 180 return false;
199 else if (efx->loopback_mode == LOOPBACK_PHYXS) 181 else if (efx->loopback_mode == LOOPBACK_PHYXS)
200 mmd_mask &= ~(MDIO_MMDREG_DEVS_PHYXS | 182 mmd_mask &= ~(MDIO_DEVS_PHYXS |
201 MDIO_MMDREG_DEVS_PCS | 183 MDIO_DEVS_PCS |
202 MDIO_MMDREG_DEVS_PMAPMD | 184 MDIO_DEVS_PMAPMD |
203 MDIO_MMDREG_DEVS_AN); 185 MDIO_DEVS_AN);
204 else if (efx->loopback_mode == LOOPBACK_PCS) 186 else if (efx->loopback_mode == LOOPBACK_PCS)
205 mmd_mask &= ~(MDIO_MMDREG_DEVS_PCS | 187 mmd_mask &= ~(MDIO_DEVS_PCS |
206 MDIO_MMDREG_DEVS_PMAPMD | 188 MDIO_DEVS_PMAPMD |
207 MDIO_MMDREG_DEVS_AN); 189 MDIO_DEVS_AN);
208 else if (efx->loopback_mode == LOOPBACK_PMAPMD) 190 else if (efx->loopback_mode == LOOPBACK_PMAPMD)
209 mmd_mask &= ~(MDIO_MMDREG_DEVS_PMAPMD | 191 mmd_mask &= ~(MDIO_DEVS_PMAPMD |
210 MDIO_MMDREG_DEVS_AN); 192 MDIO_DEVS_AN);
211
212 if (!mmd_mask) {
213 /* Use presence of XGMII faults in leui of link state */
214 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PHYXS,
215 MDIO_PHYXS_STATUS2);
216 return !(reg & (1 << MDIO_PHYXS_STATUS2_RX_FAULT_LBN));
217 }
218 193
219 while (mmd_mask) { 194 return mdio45_links_ok(&efx->mdio, mmd_mask);
220 if (mmd_mask & 1) {
221 /* Double reads because link state is latched, and a
222 * read moves the current state into the register */
223 reg = mdio_clause45_read(efx, phy_id,
224 mmd, MDIO_MMDREG_STAT1);
225 reg = mdio_clause45_read(efx, phy_id,
226 mmd, MDIO_MMDREG_STAT1);
227 ok = ok && (reg & (1 << MDIO_MMDREG_STAT1_LINK_LBN));
228 }
229 mmd_mask = (mmd_mask >> 1);
230 mmd++;
231 }
232 return ok;
233} 195}
234 196
235void mdio_clause45_transmit_disable(struct efx_nic *efx) 197void efx_mdio_transmit_disable(struct efx_nic *efx)
236{ 198{
237 mdio_clause45_set_flag(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, 199 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
238 MDIO_MMDREG_TXDIS, MDIO_MMDREG_TXDIS_GLOBAL_LBN, 200 MDIO_PMA_TXDIS, MDIO_PMD_TXDIS_GLOBAL,
239 efx->phy_mode & PHY_MODE_TX_DISABLED); 201 efx->phy_mode & PHY_MODE_TX_DISABLED);
240} 202}
241 203
242void mdio_clause45_phy_reconfigure(struct efx_nic *efx) 204void efx_mdio_phy_reconfigure(struct efx_nic *efx)
243{ 205{
244 int phy_id = efx->mii.phy_id; 206 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
245 207 MDIO_CTRL1, MDIO_PMA_CTRL1_LOOPBACK,
246 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_PMAPMD, 208 efx->loopback_mode == LOOPBACK_PMAPMD);
247 MDIO_MMDREG_CTRL1, MDIO_PMAPMD_CTRL1_LBACK_LBN, 209 efx_mdio_set_flag(efx, MDIO_MMD_PCS,
248 efx->loopback_mode == LOOPBACK_PMAPMD); 210 MDIO_CTRL1, MDIO_PCS_CTRL1_LOOPBACK,
249 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_PCS, 211 efx->loopback_mode == LOOPBACK_PCS);
250 MDIO_MMDREG_CTRL1, MDIO_MMDREG_CTRL1_LBACK_LBN, 212 efx_mdio_set_flag(efx, MDIO_MMD_PHYXS,
251 efx->loopback_mode == LOOPBACK_PCS); 213 MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK,
252 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_PHYXS, 214 efx->loopback_mode == LOOPBACK_NETWORK);
253 MDIO_MMDREG_CTRL1, MDIO_MMDREG_CTRL1_LBACK_LBN,
254 efx->loopback_mode == LOOPBACK_NETWORK);
255} 215}
256 216
257static void mdio_clause45_set_mmd_lpower(struct efx_nic *efx, 217static void efx_mdio_set_mmd_lpower(struct efx_nic *efx,
258 int lpower, int mmd) 218 int lpower, int mmd)
259{ 219{
260 int phy = efx->mii.phy_id; 220 int stat = efx_mdio_read(efx, mmd, MDIO_STAT1);
261 int stat = mdio_clause45_read(efx, phy, mmd, MDIO_MMDREG_STAT1);
262 221
263 EFX_TRACE(efx, "Setting low power mode for MMD %d to %d\n", 222 EFX_TRACE(efx, "Setting low power mode for MMD %d to %d\n",
264 mmd, lpower); 223 mmd, lpower);
265 224
266 if (stat & (1 << MDIO_MMDREG_STAT1_LPABLE_LBN)) { 225 if (stat & MDIO_STAT1_LPOWERABLE) {
267 mdio_clause45_set_flag(efx, phy, mmd, MDIO_MMDREG_CTRL1, 226 efx_mdio_set_flag(efx, mmd, MDIO_CTRL1,
268 MDIO_MMDREG_CTRL1_LPOWER_LBN, lpower); 227 MDIO_CTRL1_LPOWER, lpower);
269 } 228 }
270} 229}
271 230
272void mdio_clause45_set_mmds_lpower(struct efx_nic *efx, 231void efx_mdio_set_mmds_lpower(struct efx_nic *efx,
273 int low_power, unsigned int mmd_mask) 232 int low_power, unsigned int mmd_mask)
274{ 233{
275 int mmd = 0; 234 int mmd = 0;
276 mmd_mask &= ~MDIO_MMDREG_DEVS_AN; 235 mmd_mask &= ~MDIO_DEVS_AN;
277 while (mmd_mask) { 236 while (mmd_mask) {
278 if (mmd_mask & 1) 237 if (mmd_mask & 1)
279 mdio_clause45_set_mmd_lpower(efx, low_power, mmd); 238 efx_mdio_set_mmd_lpower(efx, low_power, mmd);
280 mmd_mask = (mmd_mask >> 1); 239 mmd_mask = (mmd_mask >> 1);
281 mmd++; 240 mmd++;
282 } 241 }
283} 242}
284 243
285static u32 mdio_clause45_get_an(struct efx_nic *efx, u16 addr)
286{
287 int phy_id = efx->mii.phy_id;
288 u32 result = 0;
289 int reg;
290
291 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN, addr);
292 if (reg & ADVERTISE_10HALF)
293 result |= ADVERTISED_10baseT_Half;
294 if (reg & ADVERTISE_10FULL)
295 result |= ADVERTISED_10baseT_Full;
296 if (reg & ADVERTISE_100HALF)
297 result |= ADVERTISED_100baseT_Half;
298 if (reg & ADVERTISE_100FULL)
299 result |= ADVERTISED_100baseT_Full;
300 return result;
301}
302
303/**
304 * mdio_clause45_get_settings - Read (some of) the PHY settings over MDIO.
305 * @efx: Efx NIC
306 * @ecmd: Buffer for settings
307 *
308 * On return the 'port', 'speed', 'supported' and 'advertising' fields of
309 * ecmd have been filled out.
310 */
311void mdio_clause45_get_settings(struct efx_nic *efx,
312 struct ethtool_cmd *ecmd)
313{
314 mdio_clause45_get_settings_ext(efx, ecmd, 0, 0);
315}
316
317/**
318 * mdio_clause45_get_settings_ext - Read (some of) the PHY settings over MDIO.
319 * @efx: Efx NIC
320 * @ecmd: Buffer for settings
321 * @xnp: Advertised Extended Next Page state
322 * @xnp_lpa: Link Partner's advertised XNP state
323 *
324 * On return the 'port', 'speed', 'supported' and 'advertising' fields of
325 * ecmd have been filled out.
326 */
327void mdio_clause45_get_settings_ext(struct efx_nic *efx,
328 struct ethtool_cmd *ecmd,
329 u32 npage_adv, u32 npage_lpa)
330{
331 int phy_id = efx->mii.phy_id;
332 int reg;
333
334 ecmd->transceiver = XCVR_INTERNAL;
335 ecmd->phy_address = phy_id;
336
337 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
338 MDIO_MMDREG_CTRL2);
339 switch (reg & MDIO_PMAPMD_CTRL2_TYPE_MASK) {
340 case MDIO_PMAPMD_CTRL2_10G_BT:
341 case MDIO_PMAPMD_CTRL2_1G_BT:
342 case MDIO_PMAPMD_CTRL2_100_BT:
343 case MDIO_PMAPMD_CTRL2_10_BT:
344 ecmd->port = PORT_TP;
345 ecmd->supported = SUPPORTED_TP;
346 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
347 MDIO_MMDREG_SPEED);
348 if (reg & (1 << MDIO_MMDREG_SPEED_10G_LBN))
349 ecmd->supported |= SUPPORTED_10000baseT_Full;
350 if (reg & (1 << MDIO_MMDREG_SPEED_1000M_LBN))
351 ecmd->supported |= (SUPPORTED_1000baseT_Full |
352 SUPPORTED_1000baseT_Half);
353 if (reg & (1 << MDIO_MMDREG_SPEED_100M_LBN))
354 ecmd->supported |= (SUPPORTED_100baseT_Full |
355 SUPPORTED_100baseT_Half);
356 if (reg & (1 << MDIO_MMDREG_SPEED_10M_LBN))
357 ecmd->supported |= (SUPPORTED_10baseT_Full |
358 SUPPORTED_10baseT_Half);
359 ecmd->advertising = ADVERTISED_TP;
360 break;
361
362 /* We represent CX4 as fibre in the absence of anything better */
363 case MDIO_PMAPMD_CTRL2_10G_CX4:
364 /* All the other defined modes are flavours of optical */
365 default:
366 ecmd->port = PORT_FIBRE;
367 ecmd->supported = SUPPORTED_FIBRE;
368 ecmd->advertising = ADVERTISED_FIBRE;
369 break;
370 }
371
372 if (efx->phy_op->mmds & DEV_PRESENT_BIT(MDIO_MMD_AN)) {
373 ecmd->supported |= SUPPORTED_Autoneg;
374 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN,
375 MDIO_MMDREG_CTRL1);
376 if (reg & BMCR_ANENABLE) {
377 ecmd->autoneg = AUTONEG_ENABLE;
378 ecmd->advertising |=
379 ADVERTISED_Autoneg |
380 mdio_clause45_get_an(efx, MDIO_AN_ADVERTISE) |
381 npage_adv;
382 } else
383 ecmd->autoneg = AUTONEG_DISABLE;
384 } else
385 ecmd->autoneg = AUTONEG_DISABLE;
386
387 if (ecmd->autoneg) {
388 /* If AN is complete, report best common mode,
389 * otherwise report best advertised mode. */
390 u32 modes = 0;
391 if (mdio_clause45_read(efx, phy_id, MDIO_MMD_AN,
392 MDIO_MMDREG_STAT1) &
393 (1 << MDIO_AN_STATUS_AN_DONE_LBN))
394 modes = (ecmd->advertising &
395 (mdio_clause45_get_an(efx, MDIO_AN_LPA) |
396 npage_lpa));
397 if (modes == 0)
398 modes = ecmd->advertising;
399
400 if (modes & ADVERTISED_10000baseT_Full) {
401 ecmd->speed = SPEED_10000;
402 ecmd->duplex = DUPLEX_FULL;
403 } else if (modes & (ADVERTISED_1000baseT_Full |
404 ADVERTISED_1000baseT_Half)) {
405 ecmd->speed = SPEED_1000;
406 ecmd->duplex = !!(modes & ADVERTISED_1000baseT_Full);
407 } else if (modes & (ADVERTISED_100baseT_Full |
408 ADVERTISED_100baseT_Half)) {
409 ecmd->speed = SPEED_100;
410 ecmd->duplex = !!(modes & ADVERTISED_100baseT_Full);
411 } else {
412 ecmd->speed = SPEED_10;
413 ecmd->duplex = !!(modes & ADVERTISED_10baseT_Full);
414 }
415 } else {
416 /* Report forced settings */
417 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
418 MDIO_MMDREG_CTRL1);
419 ecmd->speed = (((reg & BMCR_SPEED1000) ? 100 : 1) *
420 ((reg & BMCR_SPEED100) ? 100 : 10));
421 ecmd->duplex = (reg & BMCR_FULLDPLX ||
422 ecmd->speed == SPEED_10000);
423 }
424}
425
426/** 244/**
427 * mdio_clause45_set_settings - Set (some of) the PHY settings over MDIO. 245 * efx_mdio_set_settings - Set (some of) the PHY settings over MDIO.
428 * @efx: Efx NIC 246 * @efx: Efx NIC
429 * @ecmd: New settings 247 * @ecmd: New settings
430 */ 248 */
431int mdio_clause45_set_settings(struct efx_nic *efx, 249int efx_mdio_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
432 struct ethtool_cmd *ecmd)
433{ 250{
434 int phy_id = efx->mii.phy_id;
435 struct ethtool_cmd prev; 251 struct ethtool_cmd prev;
436 u32 required; 252 u32 required;
437 int reg; 253 int reg;
@@ -488,95 +304,48 @@ int mdio_clause45_set_settings(struct efx_nic *efx,
488 else if (ecmd->advertising & (ADVERTISED_1000baseT_Half | 304 else if (ecmd->advertising & (ADVERTISED_1000baseT_Half |
489 ADVERTISED_1000baseT_Full)) 305 ADVERTISED_1000baseT_Full))
490 reg |= ADVERTISE_NPAGE; 306 reg |= ADVERTISE_NPAGE;
491 reg |= efx_fc_advertise(efx->wanted_fc); 307 reg |= mii_advertise_flowctrl(efx->wanted_fc);
492 mdio_clause45_write(efx, phy_id, MDIO_MMD_AN, 308 efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);
493 MDIO_AN_ADVERTISE, reg);
494 309
495 /* Set up the (extended) next page if necessary */ 310 /* Set up the (extended) next page if necessary */
496 if (efx->phy_op->set_npage_adv) 311 if (efx->phy_op->set_npage_adv)
497 efx->phy_op->set_npage_adv(efx, ecmd->advertising); 312 efx->phy_op->set_npage_adv(efx, ecmd->advertising);
498 313
499 /* Enable and restart AN */ 314 /* Enable and restart AN */
500 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN, 315 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1);
501 MDIO_MMDREG_CTRL1); 316 reg |= MDIO_AN_CTRL1_ENABLE;
502 reg |= BMCR_ANENABLE;
503 if (!(EFX_WORKAROUND_15195(efx) && 317 if (!(EFX_WORKAROUND_15195(efx) &&
504 LOOPBACK_MASK(efx) & efx->phy_op->loopbacks)) 318 LOOPBACK_MASK(efx) & efx->phy_op->loopbacks))
505 reg |= BMCR_ANRESTART; 319 reg |= MDIO_AN_CTRL1_RESTART;
506 if (xnp) 320 if (xnp)
507 reg |= 1 << MDIO_AN_CTRL_XNP_LBN; 321 reg |= MDIO_AN_CTRL1_XNP;
508 else 322 else
509 reg &= ~(1 << MDIO_AN_CTRL_XNP_LBN); 323 reg &= ~MDIO_AN_CTRL1_XNP;
510 mdio_clause45_write(efx, phy_id, MDIO_MMD_AN, 324 efx_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg);
511 MDIO_MMDREG_CTRL1, reg);
512 } else { 325 } else {
513 /* Disable AN */ 326 /* Disable AN */
514 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_AN, 327 efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_CTRL1,
515 MDIO_MMDREG_CTRL1, 328 MDIO_AN_CTRL1_ENABLE, false);
516 __ffs(BMCR_ANENABLE), false);
517 329
518 /* Set the basic control bits */ 330 /* Set the basic control bits */
519 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD, 331 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1);
520 MDIO_MMDREG_CTRL1); 332 reg &= ~(MDIO_CTRL1_SPEEDSEL | MDIO_CTRL1_FULLDPLX);
521 reg &= ~(BMCR_SPEED1000 | BMCR_SPEED100 | BMCR_FULLDPLX |
522 0x003c);
523 if (ecmd->speed == SPEED_100) 333 if (ecmd->speed == SPEED_100)
524 reg |= BMCR_SPEED100; 334 reg |= MDIO_PMA_CTRL1_SPEED100;
525 if (ecmd->duplex) 335 if (ecmd->duplex)
526 reg |= BMCR_FULLDPLX; 336 reg |= MDIO_CTRL1_FULLDPLX;
527 mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD, 337 efx_mdio_write(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1, reg);
528 MDIO_MMDREG_CTRL1, reg);
529 } 338 }
530 339
531 return 0; 340 return 0;
532} 341}
533 342
534void mdio_clause45_set_pause(struct efx_nic *efx) 343enum efx_fc_type efx_mdio_get_pause(struct efx_nic *efx)
535{
536 int phy_id = efx->mii.phy_id;
537 int reg;
538
539 if (efx->phy_op->mmds & DEV_PRESENT_BIT(MDIO_MMD_AN)) {
540 /* Set pause capability advertising */
541 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN,
542 MDIO_AN_ADVERTISE);
543 reg &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
544 reg |= efx_fc_advertise(efx->wanted_fc);
545 mdio_clause45_write(efx, phy_id, MDIO_MMD_AN,
546 MDIO_AN_ADVERTISE, reg);
547
548 /* Restart auto-negotiation */
549 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN,
550 MDIO_MMDREG_CTRL1);
551 if (reg & BMCR_ANENABLE) {
552 reg |= BMCR_ANRESTART;
553 mdio_clause45_write(efx, phy_id, MDIO_MMD_AN,
554 MDIO_MMDREG_CTRL1, reg);
555 }
556 }
557}
558
559enum efx_fc_type mdio_clause45_get_pause(struct efx_nic *efx)
560{ 344{
561 int phy_id = efx->mii.phy_id;
562 int lpa; 345 int lpa;
563 346
564 if (!(efx->phy_op->mmds & DEV_PRESENT_BIT(MDIO_MMD_AN))) 347 if (!(efx->phy_op->mmds & MDIO_DEVS_AN))
565 return efx->wanted_fc; 348 return efx->wanted_fc;
566 lpa = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN, MDIO_AN_LPA); 349 lpa = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA);
567 return efx_fc_resolve(efx->wanted_fc, lpa); 350 return efx_fc_resolve(efx->wanted_fc, lpa);
568} 351}
569
570void mdio_clause45_set_flag(struct efx_nic *efx, u8 prt, u8 dev,
571 u16 addr, int bit, bool sense)
572{
573 int old_val = mdio_clause45_read(efx, prt, dev, addr);
574 int new_val;
575
576 if (sense)
577 new_val = old_val | (1 << bit);
578 else
579 new_val = old_val & ~(1 << bit);
580 if (old_val != new_val)
581 mdio_clause45_write(efx, prt, dev, addr, new_val);
582}
diff --git a/drivers/net/sfc/mdio_10g.h b/drivers/net/sfc/mdio_10g.h
index 7014d2279c20..6b14421a7444 100644
--- a/drivers/net/sfc/mdio_10g.h
+++ b/drivers/net/sfc/mdio_10g.h
@@ -10,247 +10,53 @@
10#ifndef EFX_MDIO_10G_H 10#ifndef EFX_MDIO_10G_H
11#define EFX_MDIO_10G_H 11#define EFX_MDIO_10G_H
12 12
13#include <linux/mdio.h>
14
13/* 15/*
14 * Definitions needed for doing 10G MDIO as specified in clause 45 16 * Helper functions for doing 10G MDIO as specified in IEEE 802.3 clause 45.
15 * MDIO, which do not appear in Linux yet. Also some helper functions.
16 */ 17 */
17 18
18#include "efx.h" 19#include "efx.h"
19#include "boards.h" 20#include "boards.h"
20 21
21/* Numbering of the MDIO Manageable Devices (MMDs) */ 22static inline unsigned efx_mdio_id_rev(u32 id) { return id & 0xf; }
22/* Physical Medium Attachment/ Physical Medium Dependent sublayer */ 23static inline unsigned efx_mdio_id_model(u32 id) { return (id >> 4) & 0x3f; }
23#define MDIO_MMD_PMAPMD (1) 24extern unsigned efx_mdio_id_oui(u32 id);
24/* WAN Interface Sublayer */
25#define MDIO_MMD_WIS (2)
26/* Physical Coding Sublayer */
27#define MDIO_MMD_PCS (3)
28/* PHY Extender Sublayer */
29#define MDIO_MMD_PHYXS (4)
30/* Extender Sublayer */
31#define MDIO_MMD_DTEXS (5)
32/* Transmission convergence */
33#define MDIO_MMD_TC (6)
34/* Auto negotiation */
35#define MDIO_MMD_AN (7)
36/* Clause 22 extension */
37#define MDIO_MMD_C22EXT 29
38
39/* Generic register locations */
40#define MDIO_MMDREG_CTRL1 (0)
41#define MDIO_MMDREG_STAT1 (1)
42#define MDIO_MMDREG_IDHI (2)
43#define MDIO_MMDREG_IDLOW (3)
44#define MDIO_MMDREG_SPEED (4)
45#define MDIO_MMDREG_DEVS0 (5)
46#define MDIO_MMDREG_DEVS1 (6)
47#define MDIO_MMDREG_CTRL2 (7)
48#define MDIO_MMDREG_STAT2 (8)
49#define MDIO_MMDREG_TXDIS (9)
50
51/* Bits in MMDREG_CTRL1 */
52/* Reset */
53#define MDIO_MMDREG_CTRL1_RESET_LBN (15)
54#define MDIO_MMDREG_CTRL1_RESET_WIDTH (1)
55/* Loopback */
56/* Loopback bit for WIS, PCS, PHYSX and DTEXS */
57#define MDIO_MMDREG_CTRL1_LBACK_LBN (14)
58#define MDIO_MMDREG_CTRL1_LBACK_WIDTH (1)
59/* Low power */
60#define MDIO_MMDREG_CTRL1_LPOWER_LBN (11)
61#define MDIO_MMDREG_CTRL1_LPOWER_WIDTH (1)
62
63/* Bits in MMDREG_STAT1 */
64#define MDIO_MMDREG_STAT1_FAULT_LBN (7)
65#define MDIO_MMDREG_STAT1_FAULT_WIDTH (1)
66/* Link state */
67#define MDIO_MMDREG_STAT1_LINK_LBN (2)
68#define MDIO_MMDREG_STAT1_LINK_WIDTH (1)
69/* Low power ability */
70#define MDIO_MMDREG_STAT1_LPABLE_LBN (1)
71#define MDIO_MMDREG_STAT1_LPABLE_WIDTH (1)
72
73/* Bits in combined ID regs */
74static inline unsigned mdio_id_rev(u32 id) { return id & 0xf; }
75static inline unsigned mdio_id_model(u32 id) { return (id >> 4) & 0x3f; }
76extern unsigned mdio_id_oui(u32 id);
77
78/* Bits in MMDREG_DEVS0/1. Someone thoughtfully layed things out
79 * so the 'bit present' bit number of an MMD is the number of
80 * that MMD */
81#define DEV_PRESENT_BIT(_b) (1 << _b)
82
83#define MDIO_MMDREG_DEVS_PHYXS DEV_PRESENT_BIT(MDIO_MMD_PHYXS)
84#define MDIO_MMDREG_DEVS_PCS DEV_PRESENT_BIT(MDIO_MMD_PCS)
85#define MDIO_MMDREG_DEVS_PMAPMD DEV_PRESENT_BIT(MDIO_MMD_PMAPMD)
86#define MDIO_MMDREG_DEVS_AN DEV_PRESENT_BIT(MDIO_MMD_AN)
87#define MDIO_MMDREG_DEVS_C22EXT DEV_PRESENT_BIT(MDIO_MMD_C22EXT)
88
89/* Bits in MMDREG_SPEED */
90#define MDIO_MMDREG_SPEED_10G_LBN 0
91#define MDIO_MMDREG_SPEED_10G_WIDTH 1
92#define MDIO_MMDREG_SPEED_1000M_LBN 4
93#define MDIO_MMDREG_SPEED_1000M_WIDTH 1
94#define MDIO_MMDREG_SPEED_100M_LBN 5
95#define MDIO_MMDREG_SPEED_100M_WIDTH 1
96#define MDIO_MMDREG_SPEED_10M_LBN 6
97#define MDIO_MMDREG_SPEED_10M_WIDTH 1
98
99/* Bits in MMDREG_STAT2 */
100#define MDIO_MMDREG_STAT2_PRESENT_VAL (2)
101#define MDIO_MMDREG_STAT2_PRESENT_LBN (14)
102#define MDIO_MMDREG_STAT2_PRESENT_WIDTH (2)
103
104/* Bits in MMDREG_TXDIS */
105#define MDIO_MMDREG_TXDIS_GLOBAL_LBN (0)
106#define MDIO_MMDREG_TXDIS_GLOBAL_WIDTH (1)
107
108/* MMD-specific bits, ordered by MMD, then register */
109#define MDIO_PMAPMD_CTRL1_LBACK_LBN (0)
110#define MDIO_PMAPMD_CTRL1_LBACK_WIDTH (1)
111
112/* PMA type (4 bits) */
113#define MDIO_PMAPMD_CTRL2_10G_CX4 (0x0)
114#define MDIO_PMAPMD_CTRL2_10G_EW (0x1)
115#define MDIO_PMAPMD_CTRL2_10G_LW (0x2)
116#define MDIO_PMAPMD_CTRL2_10G_SW (0x3)
117#define MDIO_PMAPMD_CTRL2_10G_LX4 (0x4)
118#define MDIO_PMAPMD_CTRL2_10G_ER (0x5)
119#define MDIO_PMAPMD_CTRL2_10G_LR (0x6)
120#define MDIO_PMAPMD_CTRL2_10G_SR (0x7)
121/* Reserved */
122#define MDIO_PMAPMD_CTRL2_10G_BT (0x9)
123/* Reserved */
124/* Reserved */
125#define MDIO_PMAPMD_CTRL2_1G_BT (0xc)
126/* Reserved */
127#define MDIO_PMAPMD_CTRL2_100_BT (0xe)
128#define MDIO_PMAPMD_CTRL2_10_BT (0xf)
129#define MDIO_PMAPMD_CTRL2_TYPE_MASK (0xf)
130
131/* PMA 10GBT registers */
132#define MDIO_PMAPMD_10GBT_TXPWR (131)
133#define MDIO_PMAPMD_10GBT_TXPWR_SHORT_LBN (0)
134#define MDIO_PMAPMD_10GBT_TXPWR_SHORT_WIDTH (1)
135
136/* PHY XGXS Status 2 */
137#define MDIO_PHYXS_STATUS2 (8)
138#define MDIO_PHYXS_STATUS2_RX_FAULT_LBN 10
139
140/* PHY XGXS lane state */
141#define MDIO_PHYXS_LANE_STATE (0x18)
142#define MDIO_PHYXS_LANE_ALIGNED_LBN (12)
143
144/* AN registers */
145#define MDIO_AN_CTRL_XNP_LBN 13
146#define MDIO_AN_STATUS (1)
147#define MDIO_AN_STATUS_XNP_LBN (7)
148#define MDIO_AN_STATUS_PAGE_LBN (6)
149#define MDIO_AN_STATUS_AN_DONE_LBN (5)
150#define MDIO_AN_STATUS_LP_AN_CAP_LBN (0)
151
152#define MDIO_AN_ADVERTISE 16
153#define MDIO_AN_ADVERTISE_XNP_LBN 12
154#define MDIO_AN_LPA 19
155#define MDIO_AN_XNP 22
156#define MDIO_AN_LPA_XNP 25
157
158#define MDIO_AN_10GBT_CTRL 32
159#define MDIO_AN_10GBT_CTRL_ADV_10G_LBN 12
160#define MDIO_AN_10GBT_STATUS (33)
161#define MDIO_AN_10GBT_STATUS_MS_FLT_LBN (15) /* MASTER/SLAVE config fault */
162#define MDIO_AN_10GBT_STATUS_MS_LBN (14) /* MASTER/SLAVE config */
163#define MDIO_AN_10GBT_STATUS_LOC_OK_LBN (13) /* Local OK */
164#define MDIO_AN_10GBT_STATUS_REM_OK_LBN (12) /* Remote OK */
165#define MDIO_AN_10GBT_STATUS_LP_10G_LBN (11) /* Link partner is 10GBT capable */
166#define MDIO_AN_10GBT_STATUS_LP_LTA_LBN (10) /* LP loop timing ability */
167#define MDIO_AN_10GBT_STATUS_LP_TRR_LBN (9) /* LP Training Reset Request */
168
169 25
170/* Packing of the prt and dev arguments of clause 45 style MDIO into a 26static inline int efx_mdio_read(struct efx_nic *efx, int devad, int addr)
171 * single int so they can be passed into the mdio_read/write functions
172 * that currently exist. Note that as Falcon is the only current user,
173 * the packed form is chosen to match what Falcon needs to write into
174 * a register. This is checked at compile-time so do not change it. If
175 * your target chip needs things layed out differently you will need
176 * to unpack the arguments in your chip-specific mdio functions.
177 */
178 /* These are defined by the standard. */
179#define MDIO45_PRT_ID_WIDTH (5)
180#define MDIO45_DEV_ID_WIDTH (5)
181
182/* The prt ID is just packed in immediately to the left of the dev ID */
183#define MDIO45_PRT_DEV_WIDTH (MDIO45_PRT_ID_WIDTH + MDIO45_DEV_ID_WIDTH)
184
185#define MDIO45_PRT_ID_MASK ((1 << MDIO45_PRT_DEV_WIDTH) - 1)
186/* This is the prt + dev extended by 1 bit to hold the 'is clause 45' flag. */
187#define MDIO45_XPRT_ID_WIDTH (MDIO45_PRT_DEV_WIDTH + 1)
188#define MDIO45_XPRT_ID_MASK ((1 << MDIO45_XPRT_ID_WIDTH) - 1)
189#define MDIO45_XPRT_ID_IS10G (1 << (MDIO45_XPRT_ID_WIDTH - 1))
190
191
192#define MDIO45_PRT_ID_COMP_LBN MDIO45_DEV_ID_WIDTH
193#define MDIO45_PRT_ID_COMP_WIDTH MDIO45_PRT_ID_WIDTH
194#define MDIO45_DEV_ID_COMP_LBN 0
195#define MDIO45_DEV_ID_COMP_WIDTH MDIO45_DEV_ID_WIDTH
196
197/* Compose port and device into a phy_id */
198static inline int mdio_clause45_pack(u8 prt, u8 dev)
199{
200 efx_dword_t phy_id;
201 EFX_POPULATE_DWORD_2(phy_id, MDIO45_PRT_ID_COMP, prt,
202 MDIO45_DEV_ID_COMP, dev);
203 return MDIO45_XPRT_ID_IS10G | EFX_DWORD_VAL(phy_id);
204}
205
206static inline void mdio_clause45_unpack(u32 val, u8 *prt, u8 *dev)
207{ 27{
208 efx_dword_t phy_id; 28 return efx->mdio.mdio_read(efx->net_dev, efx->mdio.prtad, devad, addr);
209 EFX_POPULATE_DWORD_1(phy_id, EFX_DWORD_0, val);
210 *prt = EFX_DWORD_FIELD(phy_id, MDIO45_PRT_ID_COMP);
211 *dev = EFX_DWORD_FIELD(phy_id, MDIO45_DEV_ID_COMP);
212} 29}
213 30
214static inline int mdio_clause45_read(struct efx_nic *efx, 31static inline void
215 u8 prt, u8 dev, u16 addr) 32efx_mdio_write(struct efx_nic *efx, int devad, int addr, int value)
216{ 33{
217 return efx->mii.mdio_read(efx->net_dev, 34 efx->mdio.mdio_write(efx->net_dev, efx->mdio.prtad, devad, addr, value);
218 mdio_clause45_pack(prt, dev), addr);
219} 35}
220 36
221static inline void mdio_clause45_write(struct efx_nic *efx, 37static inline u32 efx_mdio_read_id(struct efx_nic *efx, int mmd)
222 u8 prt, u8 dev, u16 addr, int value)
223{ 38{
224 efx->mii.mdio_write(efx->net_dev, 39 u16 id_low = efx_mdio_read(efx, mmd, MDIO_DEVID2);
225 mdio_clause45_pack(prt, dev), addr, value); 40 u16 id_hi = efx_mdio_read(efx, mmd, MDIO_DEVID1);
226}
227
228
229static inline u32 mdio_clause45_read_id(struct efx_nic *efx, int mmd)
230{
231 int phy_id = efx->mii.phy_id;
232 u16 id_low = mdio_clause45_read(efx, phy_id, mmd, MDIO_MMDREG_IDLOW);
233 u16 id_hi = mdio_clause45_read(efx, phy_id, mmd, MDIO_MMDREG_IDHI);
234 return (id_hi << 16) | (id_low); 41 return (id_hi << 16) | (id_low);
235} 42}
236 43
237static inline bool mdio_clause45_phyxgxs_lane_sync(struct efx_nic *efx) 44static inline bool efx_mdio_phyxgxs_lane_sync(struct efx_nic *efx)
238{ 45{
239 int i, lane_status; 46 int i, lane_status;
240 bool sync; 47 bool sync;
241 48
242 for (i = 0; i < 2; ++i) 49 for (i = 0; i < 2; ++i)
243 lane_status = mdio_clause45_read(efx, efx->mii.phy_id, 50 lane_status = efx_mdio_read(efx, MDIO_MMD_PHYXS,
244 MDIO_MMD_PHYXS, 51 MDIO_PHYXS_LNSTAT);
245 MDIO_PHYXS_LANE_STATE);
246 52
247 sync = !!(lane_status & (1 << MDIO_PHYXS_LANE_ALIGNED_LBN)); 53 sync = !!(lane_status & MDIO_PHYXS_LNSTAT_ALIGN);
248 if (!sync) 54 if (!sync)
249 EFX_LOG(efx, "XGXS lane status: %x\n", lane_status); 55 EFX_LOG(efx, "XGXS lane status: %x\n", lane_status);
250 return sync; 56 return sync;
251} 57}
252 58
253extern const char *mdio_clause45_mmd_name(int mmd); 59extern const char *efx_mdio_mmd_name(int mmd);
254 60
255/* 61/*
256 * Reset a specific MMD and wait for reset to clear. 62 * Reset a specific MMD and wait for reset to clear.
@@ -258,54 +64,44 @@ extern const char *mdio_clause45_mmd_name(int mmd);
258 * 64 *
259 * This function will sleep 65 * This function will sleep
260 */ 66 */
261extern int mdio_clause45_reset_mmd(struct efx_nic *efx, int mmd, 67extern int efx_mdio_reset_mmd(struct efx_nic *efx, int mmd,
262 int spins, int spintime); 68 int spins, int spintime);
263 69
264/* As mdio_clause45_check_mmd but for multiple MMDs */ 70/* As efx_mdio_check_mmd but for multiple MMDs */
265int mdio_clause45_check_mmds(struct efx_nic *efx, 71int efx_mdio_check_mmds(struct efx_nic *efx,
266 unsigned int mmd_mask, unsigned int fatal_mask); 72 unsigned int mmd_mask, unsigned int fatal_mask);
267 73
268/* Check the link status of specified mmds in bit mask */ 74/* Check the link status of specified mmds in bit mask */
269extern bool mdio_clause45_links_ok(struct efx_nic *efx, 75extern bool efx_mdio_links_ok(struct efx_nic *efx, unsigned int mmd_mask);
270 unsigned int mmd_mask);
271 76
272/* Generic transmit disable support though PMAPMD */ 77/* Generic transmit disable support though PMAPMD */
273extern void mdio_clause45_transmit_disable(struct efx_nic *efx); 78extern void efx_mdio_transmit_disable(struct efx_nic *efx);
274 79
275/* Generic part of reconfigure: set/clear loopback bits */ 80/* Generic part of reconfigure: set/clear loopback bits */
276extern void mdio_clause45_phy_reconfigure(struct efx_nic *efx); 81extern void efx_mdio_phy_reconfigure(struct efx_nic *efx);
277 82
278/* Set the power state of the specified MMDs */ 83/* Set the power state of the specified MMDs */
279extern void mdio_clause45_set_mmds_lpower(struct efx_nic *efx, 84extern void efx_mdio_set_mmds_lpower(struct efx_nic *efx,
280 int low_power, unsigned int mmd_mask); 85 int low_power, unsigned int mmd_mask);
281
282/* Read (some of) the PHY settings over MDIO */
283extern void mdio_clause45_get_settings(struct efx_nic *efx,
284 struct ethtool_cmd *ecmd);
285
286/* Read (some of) the PHY settings over MDIO */
287extern void
288mdio_clause45_get_settings_ext(struct efx_nic *efx, struct ethtool_cmd *ecmd,
289 u32 xnp, u32 xnp_lpa);
290 86
291/* Set (some of) the PHY settings over MDIO */ 87/* Set (some of) the PHY settings over MDIO */
292extern int mdio_clause45_set_settings(struct efx_nic *efx, 88extern int efx_mdio_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd);
293 struct ethtool_cmd *ecmd);
294
295/* Set pause parameters to be advertised through AN (if available) */
296extern void mdio_clause45_set_pause(struct efx_nic *efx);
297 89
298/* Get pause parameters from AN if available (otherwise return 90/* Get pause parameters from AN if available (otherwise return
299 * requested pause parameters) 91 * requested pause parameters)
300 */ 92 */
301enum efx_fc_type mdio_clause45_get_pause(struct efx_nic *efx); 93enum efx_fc_type efx_mdio_get_pause(struct efx_nic *efx);
302 94
303/* Wait for specified MMDs to exit reset within a timeout */ 95/* Wait for specified MMDs to exit reset within a timeout */
304extern int mdio_clause45_wait_reset_mmds(struct efx_nic *efx, 96extern int efx_mdio_wait_reset_mmds(struct efx_nic *efx,
305 unsigned int mmd_mask); 97 unsigned int mmd_mask);
306 98
307/* Set or clear flag, debouncing */ 99/* Set or clear flag, debouncing */
308extern void mdio_clause45_set_flag(struct efx_nic *efx, u8 prt, u8 dev, 100static inline void
309 u16 addr, int bit, bool sense); 101efx_mdio_set_flag(struct efx_nic *efx, int devad, int addr,
102 int mask, bool state)
103{
104 mdio_set_flag(&efx->mdio, efx->mdio.prtad, devad, addr, mask, state);
105}
310 106
311#endif /* EFX_MDIO_10G_H */ 107#endif /* EFX_MDIO_10G_H */
diff --git a/drivers/net/sfc/net_driver.h b/drivers/net/sfc/net_driver.h
index e169e5dcd1e6..5eabede9ac18 100644
--- a/drivers/net/sfc/net_driver.h
+++ b/drivers/net/sfc/net_driver.h
@@ -19,7 +19,7 @@
19#include <linux/ethtool.h> 19#include <linux/ethtool.h>
20#include <linux/if_vlan.h> 20#include <linux/if_vlan.h>
21#include <linux/timer.h> 21#include <linux/timer.h>
22#include <linux/mii.h> 22#include <linux/mdio.h>
23#include <linux/list.h> 23#include <linux/list.h>
24#include <linux/pci.h> 24#include <linux/pci.h>
25#include <linux/device.h> 25#include <linux/device.h>
@@ -458,8 +458,6 @@ enum phy_type {
458 PHY_TYPE_MAX /* Insert any new items before this */ 458 PHY_TYPE_MAX /* Insert any new items before this */
459}; 459};
460 460
461#define PHY_ADDR_INVALID 0xff
462
463#define EFX_IS10G(efx) ((efx)->link_speed == 10000) 461#define EFX_IS10G(efx) ((efx)->link_speed == 10000)
464 462
465enum nic_state { 463enum nic_state {
@@ -497,8 +495,8 @@ struct efx_nic;
497 495
498/* Pseudo bit-mask flow control field */ 496/* Pseudo bit-mask flow control field */
499enum efx_fc_type { 497enum efx_fc_type {
500 EFX_FC_RX = 1, 498 EFX_FC_RX = FLOW_CTRL_RX,
501 EFX_FC_TX = 2, 499 EFX_FC_TX = FLOW_CTRL_TX,
502 EFX_FC_AUTO = 4, 500 EFX_FC_AUTO = 4,
503}; 501};
504 502
@@ -508,33 +506,15 @@ enum efx_mac_type {
508 EFX_XMAC = 2, 506 EFX_XMAC = 2,
509}; 507};
510 508
511static inline unsigned int efx_fc_advertise(enum efx_fc_type wanted_fc)
512{
513 unsigned int adv = 0;
514 if (wanted_fc & EFX_FC_RX)
515 adv = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
516 if (wanted_fc & EFX_FC_TX)
517 adv ^= ADVERTISE_PAUSE_ASYM;
518 return adv;
519}
520
521static inline enum efx_fc_type efx_fc_resolve(enum efx_fc_type wanted_fc, 509static inline enum efx_fc_type efx_fc_resolve(enum efx_fc_type wanted_fc,
522 unsigned int lpa) 510 unsigned int lpa)
523{ 511{
524 unsigned int adv = efx_fc_advertise(wanted_fc); 512 BUILD_BUG_ON(EFX_FC_AUTO & (EFX_FC_RX | EFX_FC_TX));
525 513
526 if (!(wanted_fc & EFX_FC_AUTO)) 514 if (!(wanted_fc & EFX_FC_AUTO))
527 return wanted_fc; 515 return wanted_fc;
528 516
529 if (adv & lpa & ADVERTISE_PAUSE_CAP) 517 return mii_resolve_flowctrl_fdx(mii_advertise_flowctrl(wanted_fc), lpa);
530 return EFX_FC_RX | EFX_FC_TX;
531 if (adv & lpa & ADVERTISE_PAUSE_ASYM) {
532 if (adv & ADVERTISE_PAUSE_CAP)
533 return EFX_FC_RX;
534 if (lpa & ADVERTISE_PAUSE_CAP)
535 return EFX_FC_TX;
536 }
537 return 0;
538} 518}
539 519
540/** 520/**
@@ -758,7 +738,7 @@ union efx_multicast_hash {
758 * @phy_lock: PHY access lock 738 * @phy_lock: PHY access lock
759 * @phy_op: PHY interface 739 * @phy_op: PHY interface
760 * @phy_data: PHY private data (including PHY-specific stats) 740 * @phy_data: PHY private data (including PHY-specific stats)
761 * @mii: PHY interface 741 * @mdio: PHY MDIO interface
762 * @phy_mode: PHY operating mode. Serialised by @mac_lock. 742 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
763 * @mac_up: MAC link state 743 * @mac_up: MAC link state
764 * @link_up: Link status 744 * @link_up: Link status
@@ -845,7 +825,7 @@ struct efx_nic {
845 struct work_struct phy_work; 825 struct work_struct phy_work;
846 struct efx_phy_operations *phy_op; 826 struct efx_phy_operations *phy_op;
847 void *phy_data; 827 void *phy_data;
848 struct mii_if_info mii; 828 struct mdio_if_info mdio;
849 enum efx_phy_mode phy_mode; 829 enum efx_phy_mode phy_mode;
850 830
851 bool mac_up; 831 bool mac_up;
diff --git a/drivers/net/sfc/rx.c b/drivers/net/sfc/rx.c
index 66d7fe3db3e6..01f9432c31ef 100644
--- a/drivers/net/sfc/rx.c
+++ b/drivers/net/sfc/rx.c
@@ -450,17 +450,27 @@ static void efx_rx_packet_lro(struct efx_channel *channel,
450 450
451 /* Pass the skb/page into the LRO engine */ 451 /* Pass the skb/page into the LRO engine */
452 if (rx_buf->page) { 452 if (rx_buf->page) {
453 struct napi_gro_fraginfo info; 453 struct sk_buff *skb = napi_get_frags(napi);
454 454
455 info.frags[0].page = rx_buf->page; 455 if (!skb) {
456 info.frags[0].page_offset = efx_rx_buf_offset(rx_buf); 456 put_page(rx_buf->page);
457 info.frags[0].size = rx_buf->len; 457 goto out;
458 info.nr_frags = 1; 458 }
459 info.ip_summed = CHECKSUM_UNNECESSARY; 459
460 info.len = rx_buf->len; 460 skb_shinfo(skb)->frags[0].page = rx_buf->page;
461 skb_shinfo(skb)->frags[0].page_offset =
462 efx_rx_buf_offset(rx_buf);
463 skb_shinfo(skb)->frags[0].size = rx_buf->len;
464 skb_shinfo(skb)->nr_frags = 1;
465
466 skb->len = rx_buf->len;
467 skb->data_len = rx_buf->len;
468 skb->truesize += rx_buf->len;
469 skb->ip_summed = CHECKSUM_UNNECESSARY;
461 470
462 napi_gro_frags(napi, &info); 471 napi_gro_frags(napi);
463 472
473out:
464 EFX_BUG_ON_PARANOID(rx_buf->skb); 474 EFX_BUG_ON_PARANOID(rx_buf->skb);
465 rx_buf->page = NULL; 475 rx_buf->page = NULL;
466 } else { 476 } else {
diff --git a/drivers/net/sfc/selftest.c b/drivers/net/sfc/selftest.c
index 0a598084c513..b67ccca3fc1a 100644
--- a/drivers/net/sfc/selftest.c
+++ b/drivers/net/sfc/selftest.c
@@ -80,39 +80,38 @@ struct efx_loopback_state {
80 * 80 *
81 **************************************************************************/ 81 **************************************************************************/
82 82
83static int efx_test_mii(struct efx_nic *efx, struct efx_self_tests *tests) 83static int efx_test_mdio(struct efx_nic *efx, struct efx_self_tests *tests)
84{ 84{
85 int rc = 0; 85 int rc = 0;
86 int devad = __ffs(efx->mdio.mmds);
86 u16 physid1, physid2; 87 u16 physid1, physid2;
87 struct mii_if_info *mii = &efx->mii;
88 struct net_device *net_dev = efx->net_dev;
89 88
90 if (efx->phy_type == PHY_TYPE_NONE) 89 if (efx->phy_type == PHY_TYPE_NONE)
91 return 0; 90 return 0;
92 91
93 mutex_lock(&efx->mac_lock); 92 mutex_lock(&efx->mac_lock);
94 tests->mii = -1; 93 tests->mdio = -1;
95 94
96 physid1 = mii->mdio_read(net_dev, mii->phy_id, MII_PHYSID1); 95 physid1 = efx_mdio_read(efx, devad, MDIO_DEVID1);
97 physid2 = mii->mdio_read(net_dev, mii->phy_id, MII_PHYSID2); 96 physid2 = efx_mdio_read(efx, devad, MDIO_DEVID2);
98 97
99 if ((physid1 == 0x0000) || (physid1 == 0xffff) || 98 if ((physid1 == 0x0000) || (physid1 == 0xffff) ||
100 (physid2 == 0x0000) || (physid2 == 0xffff)) { 99 (physid2 == 0x0000) || (physid2 == 0xffff)) {
101 EFX_ERR(efx, "no MII PHY present with ID %d\n", 100 EFX_ERR(efx, "no MDIO PHY present with ID %d\n",
102 mii->phy_id); 101 efx->mdio.prtad);
103 rc = -EINVAL; 102 rc = -EINVAL;
104 goto out; 103 goto out;
105 } 104 }
106 105
107 if (EFX_IS10G(efx)) { 106 if (EFX_IS10G(efx)) {
108 rc = mdio_clause45_check_mmds(efx, efx->phy_op->mmds, 0); 107 rc = efx_mdio_check_mmds(efx, efx->phy_op->mmds, 0);
109 if (rc) 108 if (rc)
110 goto out; 109 goto out;
111 } 110 }
112 111
113out: 112out:
114 mutex_unlock(&efx->mac_lock); 113 mutex_unlock(&efx->mac_lock);
115 tests->mii = rc ? -1 : 1; 114 tests->mdio = rc ? -1 : 1;
116 return rc; 115 return rc;
117} 116}
118 117
@@ -439,6 +438,7 @@ static int efx_begin_loopback(struct efx_tx_queue *tx_queue)
439 kfree_skb(skb); 438 kfree_skb(skb);
440 return -EPIPE; 439 return -EPIPE;
441 } 440 }
441 efx->net_dev->trans_start = jiffies;
442 } 442 }
443 443
444 return 0; 444 return 0;
@@ -673,7 +673,7 @@ int efx_selftest(struct efx_nic *efx, struct efx_self_tests *tests,
673 /* Online (i.e. non-disruptive) testing 673 /* Online (i.e. non-disruptive) testing
674 * This checks interrupt generation, event delivery and PHY presence. */ 674 * This checks interrupt generation, event delivery and PHY presence. */
675 675
676 rc = efx_test_mii(efx, tests); 676 rc = efx_test_mdio(efx, tests);
677 if (rc && !rc_test) 677 if (rc && !rc_test)
678 rc_test = rc; 678 rc_test = rc;
679 679
diff --git a/drivers/net/sfc/selftest.h b/drivers/net/sfc/selftest.h
index 39451cf938cf..f6feee04c96b 100644
--- a/drivers/net/sfc/selftest.h
+++ b/drivers/net/sfc/selftest.h
@@ -32,7 +32,7 @@ struct efx_loopback_self_tests {
32 */ 32 */
33struct efx_self_tests { 33struct efx_self_tests {
34 /* online tests */ 34 /* online tests */
35 int mii; 35 int mdio;
36 int nvram; 36 int nvram;
37 int interrupt; 37 int interrupt;
38 int eventq_dma[EFX_MAX_CHANNELS]; 38 int eventq_dma[EFX_MAX_CHANNELS];
diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c
index 4eac5da81e5a..cee00ad49b57 100644
--- a/drivers/net/sfc/sfe4001.c
+++ b/drivers/net/sfc/sfe4001.c
@@ -296,7 +296,6 @@ static int sfe4001_check_hw(struct efx_nic *efx)
296 296
297static struct i2c_board_info sfe4001_hwmon_info = { 297static struct i2c_board_info sfe4001_hwmon_info = {
298 I2C_BOARD_INFO("max6647", 0x4e), 298 I2C_BOARD_INFO("max6647", 0x4e),
299 .irq = -1,
300}; 299};
301 300
302/* This board uses an I2C expander to provider power to the PHY, which needs to 301/* This board uses an I2C expander to provider power to the PHY, which needs to
@@ -389,12 +388,10 @@ static void sfn4111t_fini(struct efx_nic *efx)
389 388
390static struct i2c_board_info sfn4111t_a0_hwmon_info = { 389static struct i2c_board_info sfn4111t_a0_hwmon_info = {
391 I2C_BOARD_INFO("max6647", 0x4e), 390 I2C_BOARD_INFO("max6647", 0x4e),
392 .irq = -1,
393}; 391};
394 392
395static struct i2c_board_info sfn4111t_r5_hwmon_info = { 393static struct i2c_board_info sfn4111t_r5_hwmon_info = {
396 I2C_BOARD_INFO("max6646", 0x4d), 394 I2C_BOARD_INFO("max6646", 0x4d),
397 .irq = -1,
398}; 395};
399 396
400int sfn4111t_init(struct efx_nic *efx) 397int sfn4111t_init(struct efx_nic *efx)
diff --git a/drivers/net/sfc/tenxpress.c b/drivers/net/sfc/tenxpress.c
index e61dc4d4741c..db723c58f6f1 100644
--- a/drivers/net/sfc/tenxpress.c
+++ b/drivers/net/sfc/tenxpress.c
@@ -23,10 +23,10 @@
23 * clause 22 extension MMD, but since it doesn't have all the generic 23 * clause 22 extension MMD, but since it doesn't have all the generic
24 * MMD registers it is pointless to include it here. 24 * MMD registers it is pointless to include it here.
25 */ 25 */
26#define TENXPRESS_REQUIRED_DEVS (MDIO_MMDREG_DEVS_PMAPMD | \ 26#define TENXPRESS_REQUIRED_DEVS (MDIO_DEVS_PMAPMD | \
27 MDIO_MMDREG_DEVS_PCS | \ 27 MDIO_DEVS_PCS | \
28 MDIO_MMDREG_DEVS_PHYXS | \ 28 MDIO_DEVS_PHYXS | \
29 MDIO_MMDREG_DEVS_AN) 29 MDIO_DEVS_AN)
30 30
31#define SFX7101_LOOPBACKS ((1 << LOOPBACK_PHYXS) | \ 31#define SFX7101_LOOPBACKS ((1 << LOOPBACK_PHYXS) | \
32 (1 << LOOPBACK_PCS) | \ 32 (1 << LOOPBACK_PCS) | \
@@ -44,18 +44,6 @@
44 */ 44 */
45#define MAX_BAD_LP_TRIES (5) 45#define MAX_BAD_LP_TRIES (5)
46 46
47/* LASI Control */
48#define PMA_PMD_LASI_CTRL 36866
49#define PMA_PMD_LASI_STATUS 36869
50#define PMA_PMD_LS_ALARM_LBN 0
51#define PMA_PMD_LS_ALARM_WIDTH 1
52#define PMA_PMD_TX_ALARM_LBN 1
53#define PMA_PMD_TX_ALARM_WIDTH 1
54#define PMA_PMD_RX_ALARM_LBN 2
55#define PMA_PMD_RX_ALARM_WIDTH 1
56#define PMA_PMD_AN_ALARM_LBN 3
57#define PMA_PMD_AN_ALARM_WIDTH 1
58
59/* Extended control register */ 47/* Extended control register */
60#define PMA_PMD_XCONTROL_REG 49152 48#define PMA_PMD_XCONTROL_REG 49152
61#define PMA_PMD_EXT_GMII_EN_LBN 1 49#define PMA_PMD_EXT_GMII_EN_LBN 1
@@ -153,10 +141,6 @@
153#define LOOPBACK_NEAR_LBN (8) 141#define LOOPBACK_NEAR_LBN (8)
154#define LOOPBACK_NEAR_WIDTH (1) 142#define LOOPBACK_NEAR_WIDTH (1)
155 143
156#define PCS_10GBASET_STAT1 32
157#define PCS_10GBASET_BLKLK_LBN 0
158#define PCS_10GBASET_BLKLK_WIDTH 1
159
160/* Boot status register */ 144/* Boot status register */
161#define PCS_BOOT_STATUS_REG 53248 145#define PCS_BOOT_STATUS_REG 53248
162#define PCS_BOOT_FATAL_ERROR_LBN 0 146#define PCS_BOOT_FATAL_ERROR_LBN 0
@@ -206,10 +190,8 @@ static ssize_t show_phy_short_reach(struct device *dev,
206 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 190 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
207 int reg; 191 int reg;
208 192
209 reg = mdio_clause45_read(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, 193 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR);
210 MDIO_PMAPMD_10GBT_TXPWR); 194 return sprintf(buf, "%d\n", !!(reg & MDIO_PMA_10GBT_TXPWR_SHORT));
211 return sprintf(buf, "%d\n",
212 !!(reg & (1 << MDIO_PMAPMD_10GBT_TXPWR_SHORT_LBN)));
213} 195}
214 196
215static ssize_t set_phy_short_reach(struct device *dev, 197static ssize_t set_phy_short_reach(struct device *dev,
@@ -219,10 +201,9 @@ static ssize_t set_phy_short_reach(struct device *dev,
219 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 201 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
220 202
221 rtnl_lock(); 203 rtnl_lock();
222 mdio_clause45_set_flag(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, 204 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR,
223 MDIO_PMAPMD_10GBT_TXPWR, 205 MDIO_PMA_10GBT_TXPWR_SHORT,
224 MDIO_PMAPMD_10GBT_TXPWR_SHORT_LBN, 206 count != 0 && *buf != '0');
225 count != 0 && *buf != '0');
226 efx_reconfigure_port(efx); 207 efx_reconfigure_port(efx);
227 rtnl_unlock(); 208 rtnl_unlock();
228 209
@@ -238,9 +219,8 @@ int sft9001_wait_boot(struct efx_nic *efx)
238 int boot_stat; 219 int boot_stat;
239 220
240 for (;;) { 221 for (;;) {
241 boot_stat = mdio_clause45_read(efx, efx->mii.phy_id, 222 boot_stat = efx_mdio_read(efx, MDIO_MMD_PCS,
242 MDIO_MMD_PCS, 223 PCS_BOOT_STATUS_REG);
243 PCS_BOOT_STATUS_REG);
244 if (boot_stat >= 0) { 224 if (boot_stat >= 0) {
245 EFX_LOG(efx, "PHY boot status = %#x\n", boot_stat); 225 EFX_LOG(efx, "PHY boot status = %#x\n", boot_stat);
246 switch (boot_stat & 226 switch (boot_stat &
@@ -286,38 +266,32 @@ int sft9001_wait_boot(struct efx_nic *efx)
286 266
287static int tenxpress_init(struct efx_nic *efx) 267static int tenxpress_init(struct efx_nic *efx)
288{ 268{
289 int phy_id = efx->mii.phy_id;
290 int reg; 269 int reg;
291 270
292 if (efx->phy_type == PHY_TYPE_SFX7101) { 271 if (efx->phy_type == PHY_TYPE_SFX7101) {
293 /* Enable 312.5 MHz clock */ 272 /* Enable 312.5 MHz clock */
294 mdio_clause45_write(efx, phy_id, 273 efx_mdio_write(efx, MDIO_MMD_PCS, PCS_TEST_SELECT_REG,
295 MDIO_MMD_PCS, PCS_TEST_SELECT_REG, 274 1 << CLK312_EN_LBN);
296 1 << CLK312_EN_LBN);
297 } else { 275 } else {
298 /* Enable 312.5 MHz clock and GMII */ 276 /* Enable 312.5 MHz clock and GMII */
299 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD, 277 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG);
300 PMA_PMD_XCONTROL_REG);
301 reg |= ((1 << PMA_PMD_EXT_GMII_EN_LBN) | 278 reg |= ((1 << PMA_PMD_EXT_GMII_EN_LBN) |
302 (1 << PMA_PMD_EXT_CLK_OUT_LBN) | 279 (1 << PMA_PMD_EXT_CLK_OUT_LBN) |
303 (1 << PMA_PMD_EXT_CLK312_LBN) | 280 (1 << PMA_PMD_EXT_CLK312_LBN) |
304 (1 << PMA_PMD_EXT_ROBUST_LBN)); 281 (1 << PMA_PMD_EXT_ROBUST_LBN));
305 282
306 mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD, 283 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
307 PMA_PMD_XCONTROL_REG, reg); 284 efx_mdio_set_flag(efx, MDIO_MMD_C22EXT,
308 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_C22EXT, 285 GPHY_XCONTROL_REG, 1 << GPHY_ISOLATE_LBN,
309 GPHY_XCONTROL_REG, GPHY_ISOLATE_LBN, 286 false);
310 false);
311 } 287 }
312 288
313 /* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */ 289 /* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */
314 if (efx->phy_type == PHY_TYPE_SFX7101) { 290 if (efx->phy_type == PHY_TYPE_SFX7101) {
315 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_PMAPMD, 291 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_CTRL_REG,
316 PMA_PMD_LED_CTRL_REG, 292 1 << PMA_PMA_LED_ACTIVITY_LBN, true);
317 PMA_PMA_LED_ACTIVITY_LBN, 293 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG,
318 true); 294 PMA_PMD_LED_DEFAULT);
319 mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD,
320 PMA_PMD_LED_OVERR_REG, PMA_PMD_LED_DEFAULT);
321 } 295 }
322 296
323 return 0; 297 return 0;
@@ -337,22 +311,19 @@ static int tenxpress_phy_init(struct efx_nic *efx)
337 if (!(efx->phy_mode & PHY_MODE_SPECIAL)) { 311 if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
338 if (efx->phy_type == PHY_TYPE_SFT9001A) { 312 if (efx->phy_type == PHY_TYPE_SFT9001A) {
339 int reg; 313 int reg;
340 reg = mdio_clause45_read(efx, efx->mii.phy_id, 314 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
341 MDIO_MMD_PMAPMD, 315 PMA_PMD_XCONTROL_REG);
342 PMA_PMD_XCONTROL_REG);
343 reg |= (1 << PMA_PMD_EXT_SSR_LBN); 316 reg |= (1 << PMA_PMD_EXT_SSR_LBN);
344 mdio_clause45_write(efx, efx->mii.phy_id, 317 efx_mdio_write(efx, MDIO_MMD_PMAPMD,
345 MDIO_MMD_PMAPMD, 318 PMA_PMD_XCONTROL_REG, reg);
346 PMA_PMD_XCONTROL_REG, reg);
347 mdelay(200); 319 mdelay(200);
348 } 320 }
349 321
350 rc = mdio_clause45_wait_reset_mmds(efx, 322 rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS);
351 TENXPRESS_REQUIRED_DEVS);
352 if (rc < 0) 323 if (rc < 0)
353 goto fail; 324 goto fail;
354 325
355 rc = mdio_clause45_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0); 326 rc = efx_mdio_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0);
356 if (rc < 0) 327 if (rc < 0)
357 goto fail; 328 goto fail;
358 } 329 }
@@ -360,7 +331,6 @@ static int tenxpress_phy_init(struct efx_nic *efx)
360 rc = tenxpress_init(efx); 331 rc = tenxpress_init(efx);
361 if (rc < 0) 332 if (rc < 0)
362 goto fail; 333 goto fail;
363 mdio_clause45_set_pause(efx);
364 334
365 if (efx->phy_type == PHY_TYPE_SFT9001B) { 335 if (efx->phy_type == PHY_TYPE_SFT9001B) {
366 rc = device_create_file(&efx->pci_dev->dev, 336 rc = device_create_file(&efx->pci_dev->dev,
@@ -395,17 +365,14 @@ static int tenxpress_special_reset(struct efx_nic *efx)
395 efx_stats_disable(efx); 365 efx_stats_disable(efx);
396 366
397 /* Initiate reset */ 367 /* Initiate reset */
398 reg = mdio_clause45_read(efx, efx->mii.phy_id, 368 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG);
399 MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG);
400 reg |= (1 << PMA_PMD_EXT_SSR_LBN); 369 reg |= (1 << PMA_PMD_EXT_SSR_LBN);
401 mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, 370 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
402 PMA_PMD_XCONTROL_REG, reg);
403 371
404 mdelay(200); 372 mdelay(200);
405 373
406 /* Wait for the blocks to come out of reset */ 374 /* Wait for the blocks to come out of reset */
407 rc = mdio_clause45_wait_reset_mmds(efx, 375 rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS);
408 TENXPRESS_REQUIRED_DEVS);
409 if (rc < 0) 376 if (rc < 0)
410 goto out; 377 goto out;
411 378
@@ -424,7 +391,6 @@ out:
424static void sfx7101_check_bad_lp(struct efx_nic *efx, bool link_ok) 391static void sfx7101_check_bad_lp(struct efx_nic *efx, bool link_ok)
425{ 392{
426 struct tenxpress_phy_data *pd = efx->phy_data; 393 struct tenxpress_phy_data *pd = efx->phy_data;
427 int phy_id = efx->mii.phy_id;
428 bool bad_lp; 394 bool bad_lp;
429 int reg; 395 int reg;
430 396
@@ -432,11 +398,10 @@ static void sfx7101_check_bad_lp(struct efx_nic *efx, bool link_ok)
432 bad_lp = false; 398 bad_lp = false;
433 } else { 399 } else {
434 /* Check that AN has started but not completed. */ 400 /* Check that AN has started but not completed. */
435 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN, 401 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_STAT1);
436 MDIO_AN_STATUS); 402 if (!(reg & MDIO_AN_STAT1_LPABLE))
437 if (!(reg & (1 << MDIO_AN_STATUS_LP_AN_CAP_LBN)))
438 return; /* LP status is unknown */ 403 return; /* LP status is unknown */
439 bad_lp = !(reg & (1 << MDIO_AN_STATUS_AN_DONE_LBN)); 404 bad_lp = !(reg & MDIO_AN_STAT1_COMPLETE);
440 if (bad_lp) 405 if (bad_lp)
441 pd->bad_lp_tries++; 406 pd->bad_lp_tries++;
442 } 407 }
@@ -448,8 +413,8 @@ static void sfx7101_check_bad_lp(struct efx_nic *efx, bool link_ok)
448 /* Use the RX (red) LED as an error indicator once we've seen AN 413 /* Use the RX (red) LED as an error indicator once we've seen AN
449 * failure several times in a row, and also log a message. */ 414 * failure several times in a row, and also log a message. */
450 if (!bad_lp || pd->bad_lp_tries == MAX_BAD_LP_TRIES) { 415 if (!bad_lp || pd->bad_lp_tries == MAX_BAD_LP_TRIES) {
451 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD, 416 reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
452 PMA_PMD_LED_OVERR_REG); 417 PMA_PMD_LED_OVERR_REG);
453 reg &= ~(PMA_PMD_LED_MASK << PMA_PMD_LED_RX_LBN); 418 reg &= ~(PMA_PMD_LED_MASK << PMA_PMD_LED_RX_LBN);
454 if (!bad_lp) { 419 if (!bad_lp) {
455 reg |= PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN; 420 reg |= PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN;
@@ -460,23 +425,22 @@ static void sfx7101_check_bad_lp(struct efx_nic *efx, bool link_ok)
460 " supports 10GBASE-T ONLY, so no link can" 425 " supports 10GBASE-T ONLY, so no link can"
461 " be established\n"); 426 " be established\n");
462 } 427 }
463 mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD, 428 efx_mdio_write(efx, MDIO_MMD_PMAPMD,
464 PMA_PMD_LED_OVERR_REG, reg); 429 PMA_PMD_LED_OVERR_REG, reg);
465 pd->bad_lp_tries = bad_lp; 430 pd->bad_lp_tries = bad_lp;
466 } 431 }
467} 432}
468 433
469static bool sfx7101_link_ok(struct efx_nic *efx) 434static bool sfx7101_link_ok(struct efx_nic *efx)
470{ 435{
471 return mdio_clause45_links_ok(efx, 436 return efx_mdio_links_ok(efx,
472 MDIO_MMDREG_DEVS_PMAPMD | 437 MDIO_DEVS_PMAPMD |
473 MDIO_MMDREG_DEVS_PCS | 438 MDIO_DEVS_PCS |
474 MDIO_MMDREG_DEVS_PHYXS); 439 MDIO_DEVS_PHYXS);
475} 440}
476 441
477static bool sft9001_link_ok(struct efx_nic *efx, struct ethtool_cmd *ecmd) 442static bool sft9001_link_ok(struct efx_nic *efx, struct ethtool_cmd *ecmd)
478{ 443{
479 int phy_id = efx->mii.phy_id;
480 u32 reg; 444 u32 reg;
481 445
482 if (efx_phy_mode_disabled(efx->phy_mode)) 446 if (efx_phy_mode_disabled(efx->phy_mode))
@@ -484,50 +448,43 @@ static bool sft9001_link_ok(struct efx_nic *efx, struct ethtool_cmd *ecmd)
484 else if (efx->loopback_mode == LOOPBACK_GPHY) 448 else if (efx->loopback_mode == LOOPBACK_GPHY)
485 return true; 449 return true;
486 else if (efx->loopback_mode) 450 else if (efx->loopback_mode)
487 return mdio_clause45_links_ok(efx, 451 return efx_mdio_links_ok(efx,
488 MDIO_MMDREG_DEVS_PMAPMD | 452 MDIO_DEVS_PMAPMD |
489 MDIO_MMDREG_DEVS_PHYXS); 453 MDIO_DEVS_PHYXS);
490 454
491 /* We must use the same definition of link state as LASI, 455 /* We must use the same definition of link state as LASI,
492 * otherwise we can miss a link state transition 456 * otherwise we can miss a link state transition
493 */ 457 */
494 if (ecmd->speed == 10000) { 458 if (ecmd->speed == 10000) {
495 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PCS, 459 reg = efx_mdio_read(efx, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT1);
496 PCS_10GBASET_STAT1); 460 return reg & MDIO_PCS_10GBRT_STAT1_BLKLK;
497 return reg & (1 << PCS_10GBASET_BLKLK_LBN);
498 } else { 461 } else {
499 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_C22EXT, 462 reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_STATUS_REG);
500 C22EXT_STATUS_REG);
501 return reg & (1 << C22EXT_STATUS_LINK_LBN); 463 return reg & (1 << C22EXT_STATUS_LINK_LBN);
502 } 464 }
503} 465}
504 466
505static void tenxpress_ext_loopback(struct efx_nic *efx) 467static void tenxpress_ext_loopback(struct efx_nic *efx)
506{ 468{
507 int phy_id = efx->mii.phy_id; 469 efx_mdio_set_flag(efx, MDIO_MMD_PHYXS, PHYXS_TEST1,
508 470 1 << LOOPBACK_NEAR_LBN,
509 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_PHYXS, 471 efx->loopback_mode == LOOPBACK_PHYXS);
510 PHYXS_TEST1, LOOPBACK_NEAR_LBN,
511 efx->loopback_mode == LOOPBACK_PHYXS);
512 if (efx->phy_type != PHY_TYPE_SFX7101) 472 if (efx->phy_type != PHY_TYPE_SFX7101)
513 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_C22EXT, 473 efx_mdio_set_flag(efx, MDIO_MMD_C22EXT, GPHY_XCONTROL_REG,
514 GPHY_XCONTROL_REG, 474 1 << GPHY_LOOPBACK_NEAR_LBN,
515 GPHY_LOOPBACK_NEAR_LBN, 475 efx->loopback_mode == LOOPBACK_GPHY);
516 efx->loopback_mode == LOOPBACK_GPHY);
517} 476}
518 477
519static void tenxpress_low_power(struct efx_nic *efx) 478static void tenxpress_low_power(struct efx_nic *efx)
520{ 479{
521 int phy_id = efx->mii.phy_id;
522
523 if (efx->phy_type == PHY_TYPE_SFX7101) 480 if (efx->phy_type == PHY_TYPE_SFX7101)
524 mdio_clause45_set_mmds_lpower( 481 efx_mdio_set_mmds_lpower(
525 efx, !!(efx->phy_mode & PHY_MODE_LOW_POWER), 482 efx, !!(efx->phy_mode & PHY_MODE_LOW_POWER),
526 TENXPRESS_REQUIRED_DEVS); 483 TENXPRESS_REQUIRED_DEVS);
527 else 484 else
528 mdio_clause45_set_flag( 485 efx_mdio_set_flag(
529 efx, phy_id, MDIO_MMD_PMAPMD, 486 efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG,
530 PMA_PMD_XCONTROL_REG, PMA_PMD_EXT_LPOWER_LBN, 487 1 << PMA_PMD_EXT_LPOWER_LBN,
531 !!(efx->phy_mode & PHY_MODE_LOW_POWER)); 488 !!(efx->phy_mode & PHY_MODE_LOW_POWER));
532} 489}
533 490
@@ -568,8 +525,8 @@ static void tenxpress_phy_reconfigure(struct efx_nic *efx)
568 WARN_ON(rc); 525 WARN_ON(rc);
569 } 526 }
570 527
571 mdio_clause45_transmit_disable(efx); 528 efx_mdio_transmit_disable(efx);
572 mdio_clause45_phy_reconfigure(efx); 529 efx_mdio_phy_reconfigure(efx);
573 tenxpress_ext_loopback(efx); 530 tenxpress_ext_loopback(efx);
574 531
575 phy_data->loopback_mode = efx->loopback_mode; 532 phy_data->loopback_mode = efx->loopback_mode;
@@ -585,7 +542,7 @@ static void tenxpress_phy_reconfigure(struct efx_nic *efx)
585 efx->link_fd = ecmd.duplex == DUPLEX_FULL; 542 efx->link_fd = ecmd.duplex == DUPLEX_FULL;
586 efx->link_up = sft9001_link_ok(efx, &ecmd); 543 efx->link_up = sft9001_link_ok(efx, &ecmd);
587 } 544 }
588 efx->link_fc = mdio_clause45_get_pause(efx); 545 efx->link_fc = efx_mdio_get_pause(efx);
589} 546}
590 547
591/* Poll PHY for interrupt */ 548/* Poll PHY for interrupt */
@@ -599,7 +556,7 @@ static void tenxpress_phy_poll(struct efx_nic *efx)
599 if (link_ok != efx->link_up) { 556 if (link_ok != efx->link_up) {
600 change = true; 557 change = true;
601 } else { 558 } else {
602 unsigned int link_fc = mdio_clause45_get_pause(efx); 559 unsigned int link_fc = efx_mdio_get_pause(efx);
603 if (link_fc != efx->link_fc) 560 if (link_fc != efx->link_fc)
604 change = true; 561 change = true;
605 } 562 }
@@ -609,10 +566,9 @@ static void tenxpress_phy_poll(struct efx_nic *efx)
609 if (link_ok != efx->link_up) 566 if (link_ok != efx->link_up)
610 change = true; 567 change = true;
611 } else { 568 } else {
612 u32 status = mdio_clause45_read(efx, efx->mii.phy_id, 569 int status = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
613 MDIO_MMD_PMAPMD, 570 MDIO_PMA_LASI_STAT);
614 PMA_PMD_LASI_STATUS); 571 if (status & MDIO_PMA_LASI_LSALARM)
615 if (status & (1 << PMA_PMD_LS_ALARM_LBN))
616 change = true; 572 change = true;
617 } 573 }
618 574
@@ -634,8 +590,7 @@ static void tenxpress_phy_fini(struct efx_nic *efx)
634 if (efx->phy_type == PHY_TYPE_SFX7101) { 590 if (efx->phy_type == PHY_TYPE_SFX7101) {
635 /* Power down the LNPGA */ 591 /* Power down the LNPGA */
636 reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN); 592 reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN);
637 mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, 593 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
638 PMA_PMD_XCONTROL_REG, reg);
639 594
640 /* Waiting here ensures that the board fini, which can turn 595 /* Waiting here ensures that the board fini, which can turn
641 * off the power to the PHY, won't get run until the LNPGA 596 * off the power to the PHY, won't get run until the LNPGA
@@ -661,8 +616,7 @@ void tenxpress_phy_blink(struct efx_nic *efx, bool blink)
661 else 616 else
662 reg = PMA_PMD_LED_DEFAULT; 617 reg = PMA_PMD_LED_DEFAULT;
663 618
664 mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, 619 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG, reg);
665 PMA_PMD_LED_OVERR_REG, reg);
666} 620}
667 621
668static const char *const sfx7101_test_names[] = { 622static const char *const sfx7101_test_names[] = {
@@ -698,7 +652,6 @@ static const char *const sft9001_test_names[] = {
698static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags) 652static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags)
699{ 653{
700 struct ethtool_cmd ecmd; 654 struct ethtool_cmd ecmd;
701 int phy_id = efx->mii.phy_id;
702 int rc = 0, rc2, i, ctrl_reg, res_reg; 655 int rc = 0, rc2, i, ctrl_reg, res_reg;
703 656
704 if (flags & ETH_TEST_FL_OFFLINE) 657 if (flags & ETH_TEST_FL_OFFLINE)
@@ -717,11 +670,10 @@ static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags)
717 * must reset the PHY to resume normal service. */ 670 * must reset the PHY to resume normal service. */
718 ctrl_reg |= (1 << CDIAG_CTRL_BRK_LINK_LBN); 671 ctrl_reg |= (1 << CDIAG_CTRL_BRK_LINK_LBN);
719 } 672 }
720 mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD, 673 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_CTRL_REG,
721 PMA_PMD_CDIAG_CTRL_REG, ctrl_reg); 674 ctrl_reg);
722 i = 0; 675 i = 0;
723 while (mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD, 676 while (efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_CTRL_REG) &
724 PMA_PMD_CDIAG_CTRL_REG) &
725 (1 << CDIAG_CTRL_IN_PROG_LBN)) { 677 (1 << CDIAG_CTRL_IN_PROG_LBN)) {
726 if (++i == 50) { 678 if (++i == 50) {
727 rc = -ETIMEDOUT; 679 rc = -ETIMEDOUT;
@@ -729,15 +681,13 @@ static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags)
729 } 681 }
730 msleep(100); 682 msleep(100);
731 } 683 }
732 res_reg = mdio_clause45_read(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, 684 res_reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_RES_REG);
733 PMA_PMD_CDIAG_RES_REG);
734 for (i = 0; i < 4; i++) { 685 for (i = 0; i < 4; i++) {
735 int pair_res = 686 int pair_res =
736 (res_reg >> (CDIAG_RES_A_LBN - i * CDIAG_RES_WIDTH)) 687 (res_reg >> (CDIAG_RES_A_LBN - i * CDIAG_RES_WIDTH))
737 & ((1 << CDIAG_RES_WIDTH) - 1); 688 & ((1 << CDIAG_RES_WIDTH) - 1);
738 int len_reg = mdio_clause45_read(efx, efx->mii.phy_id, 689 int len_reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
739 MDIO_MMD_PMAPMD, 690 PMA_PMD_CDIAG_LEN_REG + i);
740 PMA_PMD_CDIAG_LEN_REG + i);
741 if (pair_res == CDIAG_RES_OK) 691 if (pair_res == CDIAG_RES_OK)
742 results[1 + i] = 1; 692 results[1 + i] = 1;
743 else if (pair_res == CDIAG_RES_INVALID) 693 else if (pair_res == CDIAG_RES_INVALID)
@@ -769,32 +719,27 @@ out:
769static void 719static void
770tenxpress_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) 720tenxpress_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
771{ 721{
772 int phy_id = efx->mii.phy_id;
773 u32 adv = 0, lpa = 0; 722 u32 adv = 0, lpa = 0;
774 int reg; 723 int reg;
775 724
776 if (efx->phy_type != PHY_TYPE_SFX7101) { 725 if (efx->phy_type != PHY_TYPE_SFX7101) {
777 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_C22EXT, 726 reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_CTRL);
778 C22EXT_MSTSLV_CTRL);
779 if (reg & (1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN)) 727 if (reg & (1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN))
780 adv |= ADVERTISED_1000baseT_Full; 728 adv |= ADVERTISED_1000baseT_Full;
781 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_C22EXT, 729 reg = efx_mdio_read(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_STATUS);
782 C22EXT_MSTSLV_STATUS);
783 if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN)) 730 if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN))
784 lpa |= ADVERTISED_1000baseT_Half; 731 lpa |= ADVERTISED_1000baseT_Half;
785 if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN)) 732 if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN))
786 lpa |= ADVERTISED_1000baseT_Full; 733 lpa |= ADVERTISED_1000baseT_Full;
787 } 734 }
788 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN, 735 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL);
789 MDIO_AN_10GBT_CTRL); 736 if (reg & MDIO_AN_10GBT_CTRL_ADV10G)
790 if (reg & (1 << MDIO_AN_10GBT_CTRL_ADV_10G_LBN))
791 adv |= ADVERTISED_10000baseT_Full; 737 adv |= ADVERTISED_10000baseT_Full;
792 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN, 738 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);
793 MDIO_AN_10GBT_STATUS); 739 if (reg & MDIO_AN_10GBT_STAT_LP10G)
794 if (reg & (1 << MDIO_AN_10GBT_STATUS_LP_10G_LBN))
795 lpa |= ADVERTISED_10000baseT_Full; 740 lpa |= ADVERTISED_10000baseT_Full;
796 741
797 mdio_clause45_get_settings_ext(efx, ecmd, adv, lpa); 742 mdio45_ethtool_gset_npage(&efx->mdio, ecmd, adv, lpa);
798 743
799 if (efx->phy_type != PHY_TYPE_SFX7101) 744 if (efx->phy_type != PHY_TYPE_SFX7101)
800 ecmd->supported |= (SUPPORTED_100baseT_Full | 745 ecmd->supported |= (SUPPORTED_100baseT_Full |
@@ -813,29 +758,24 @@ static int tenxpress_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
813 if (!ecmd->autoneg) 758 if (!ecmd->autoneg)
814 return -EINVAL; 759 return -EINVAL;
815 760
816 return mdio_clause45_set_settings(efx, ecmd); 761 return efx_mdio_set_settings(efx, ecmd);
817} 762}
818 763
819static void sfx7101_set_npage_adv(struct efx_nic *efx, u32 advertising) 764static void sfx7101_set_npage_adv(struct efx_nic *efx, u32 advertising)
820{ 765{
821 mdio_clause45_set_flag(efx, efx->mii.phy_id, MDIO_MMD_AN, 766 efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
822 MDIO_AN_10GBT_CTRL, 767 MDIO_AN_10GBT_CTRL_ADV10G,
823 MDIO_AN_10GBT_CTRL_ADV_10G_LBN, 768 advertising & ADVERTISED_10000baseT_Full);
824 advertising & ADVERTISED_10000baseT_Full);
825} 769}
826 770
827static void sft9001_set_npage_adv(struct efx_nic *efx, u32 advertising) 771static void sft9001_set_npage_adv(struct efx_nic *efx, u32 advertising)
828{ 772{
829 int phy_id = efx->mii.phy_id; 773 efx_mdio_set_flag(efx, MDIO_MMD_C22EXT, C22EXT_MSTSLV_CTRL,
830 774 1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN,
831 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_C22EXT, 775 advertising & ADVERTISED_1000baseT_Full);
832 C22EXT_MSTSLV_CTRL, 776 efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
833 C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN, 777 MDIO_AN_10GBT_CTRL_ADV10G,
834 advertising & ADVERTISED_1000baseT_Full); 778 advertising & ADVERTISED_10000baseT_Full);
835 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_AN,
836 MDIO_AN_10GBT_CTRL,
837 MDIO_AN_10GBT_CTRL_ADV_10G_LBN,
838 advertising & ADVERTISED_10000baseT_Full);
839} 779}
840 780
841struct efx_phy_operations falcon_sfx7101_phy_ops = { 781struct efx_phy_operations falcon_sfx7101_phy_ops = {
diff --git a/drivers/net/sfc/tx.c b/drivers/net/sfc/tx.c
index d6681edb7014..14a14788566c 100644
--- a/drivers/net/sfc/tx.c
+++ b/drivers/net/sfc/tx.c
@@ -360,13 +360,6 @@ inline int efx_xmit(struct efx_nic *efx,
360 360
361 /* Map fragments for DMA and add to TX queue */ 361 /* Map fragments for DMA and add to TX queue */
362 rc = efx_enqueue_skb(tx_queue, skb); 362 rc = efx_enqueue_skb(tx_queue, skb);
363 if (unlikely(rc != NETDEV_TX_OK))
364 goto out;
365
366 /* Update last TX timer */
367 efx->net_dev->trans_start = jiffies;
368
369 out:
370 return rc; 363 return rc;
371} 364}
372 365
diff --git a/drivers/net/sfc/xenpack.h b/drivers/net/sfc/xenpack.h
deleted file mode 100644
index b0d1f225b70a..000000000000
--- a/drivers/net/sfc/xenpack.h
+++ /dev/null
@@ -1,62 +0,0 @@
1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2006 Solarflare Communications Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#ifndef EFX_XENPACK_H
11#define EFX_XENPACK_H
12
13/* Exported functions from Xenpack standard PHY control */
14
15#include "mdio_10g.h"
16
17/****************************************************************************/
18/* XENPACK MDIO register extensions */
19#define MDIO_XP_LASI_RX_CTRL (0x9000)
20#define MDIO_XP_LASI_TX_CTRL (0x9001)
21#define MDIO_XP_LASI_CTRL (0x9002)
22#define MDIO_XP_LASI_RX_STAT (0x9003)
23#define MDIO_XP_LASI_TX_STAT (0x9004)
24#define MDIO_XP_LASI_STAT (0x9005)
25
26/* Control/Status bits */
27#define XP_LASI_LS_ALARM (1 << 0)
28#define XP_LASI_TX_ALARM (1 << 1)
29#define XP_LASI_RX_ALARM (1 << 2)
30/* These two are Quake vendor extensions to the standard XENPACK defines */
31#define XP_LASI_LS_INTB (1 << 3)
32#define XP_LASI_TEST (1 << 7)
33
34/* Enable LASI interrupts for PHY */
35static inline void xenpack_enable_lasi_irqs(struct efx_nic *efx)
36{
37 int reg;
38 int phy_id = efx->mii.phy_id;
39 /* Read to clear LASI status register */
40 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
41 MDIO_XP_LASI_STAT);
42
43 mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD,
44 MDIO_XP_LASI_CTRL, XP_LASI_LS_ALARM);
45}
46
47/* Read the LASI interrupt status to clear the interrupt. */
48static inline int xenpack_clear_lasi_irqs(struct efx_nic *efx)
49{
50 /* Read to clear link status alarm */
51 return mdio_clause45_read(efx, efx->mii.phy_id,
52 MDIO_MMD_PMAPMD, MDIO_XP_LASI_STAT);
53}
54
55/* Turn off LASI interrupts */
56static inline void xenpack_disable_lasi_irqs(struct efx_nic *efx)
57{
58 mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
59 MDIO_XP_LASI_CTRL, 0);
60}
61
62#endif /* EFX_XENPACK_H */
diff --git a/drivers/net/sfc/xfp_phy.c b/drivers/net/sfc/xfp_phy.c
index bb1ef77d5f56..bb2e6afd0829 100644
--- a/drivers/net/sfc/xfp_phy.c
+++ b/drivers/net/sfc/xfp_phy.c
@@ -15,13 +15,12 @@
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include "efx.h" 16#include "efx.h"
17#include "mdio_10g.h" 17#include "mdio_10g.h"
18#include "xenpack.h"
19#include "phy.h" 18#include "phy.h"
20#include "falcon.h" 19#include "falcon.h"
21 20
22#define XFP_REQUIRED_DEVS (MDIO_MMDREG_DEVS_PCS | \ 21#define XFP_REQUIRED_DEVS (MDIO_DEVS_PCS | \
23 MDIO_MMDREG_DEVS_PMAPMD | \ 22 MDIO_DEVS_PMAPMD | \
24 MDIO_MMDREG_DEVS_PHYXS) 23 MDIO_DEVS_PHYXS)
25 24
26#define XFP_LOOPBACKS ((1 << LOOPBACK_PCS) | \ 25#define XFP_LOOPBACKS ((1 << LOOPBACK_PCS) | \
27 (1 << LOOPBACK_PMAPMD) | \ 26 (1 << LOOPBACK_PMAPMD) | \
@@ -49,8 +48,7 @@
49void xfp_set_led(struct efx_nic *p, int led, int mode) 48void xfp_set_led(struct efx_nic *p, int led, int mode)
50{ 49{
51 int addr = MDIO_QUAKE_LED0_REG + led; 50 int addr = MDIO_QUAKE_LED0_REG + led;
52 mdio_clause45_write(p, p->mii.phy_id, MDIO_MMD_PMAPMD, addr, 51 efx_mdio_write(p, MDIO_MMD_PMAPMD, addr, mode);
53 mode);
54} 52}
55 53
56struct xfp_phy_data { 54struct xfp_phy_data {
@@ -63,14 +61,12 @@ struct xfp_phy_data {
63static int qt2025c_wait_reset(struct efx_nic *efx) 61static int qt2025c_wait_reset(struct efx_nic *efx)
64{ 62{
65 unsigned long timeout = jiffies + 10 * HZ; 63 unsigned long timeout = jiffies + 10 * HZ;
66 int phy_id = efx->mii.phy_id;
67 int reg, old_counter = 0; 64 int reg, old_counter = 0;
68 65
69 /* Wait for firmware heartbeat to start */ 66 /* Wait for firmware heartbeat to start */
70 for (;;) { 67 for (;;) {
71 int counter; 68 int counter;
72 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PCS, 69 reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_FW_HEARTBEAT_REG);
73 PCS_FW_HEARTBEAT_REG);
74 if (reg < 0) 70 if (reg < 0)
75 return reg; 71 return reg;
76 counter = ((reg >> PCS_FW_HEARTB_LBN) & 72 counter = ((reg >> PCS_FW_HEARTB_LBN) &
@@ -86,8 +82,7 @@ static int qt2025c_wait_reset(struct efx_nic *efx)
86 82
87 /* Wait for firmware status to look good */ 83 /* Wait for firmware status to look good */
88 for (;;) { 84 for (;;) {
89 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PCS, 85 reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_UC8051_STATUS_REG);
90 PCS_UC8051_STATUS_REG);
91 if (reg < 0) 86 if (reg < 0)
92 return reg; 87 return reg;
93 if ((reg & 88 if ((reg &
@@ -109,9 +104,9 @@ static int xfp_reset_phy(struct efx_nic *efx)
109{ 104{
110 int rc; 105 int rc;
111 106
112 rc = mdio_clause45_reset_mmd(efx, MDIO_MMD_PHYXS, 107 rc = efx_mdio_reset_mmd(efx, MDIO_MMD_PHYXS,
113 XFP_MAX_RESET_TIME / XFP_RESET_WAIT, 108 XFP_MAX_RESET_TIME / XFP_RESET_WAIT,
114 XFP_RESET_WAIT); 109 XFP_RESET_WAIT);
115 if (rc < 0) 110 if (rc < 0)
116 goto fail; 111 goto fail;
117 112
@@ -126,8 +121,7 @@ static int xfp_reset_phy(struct efx_nic *efx)
126 121
127 /* Check that all the MMDs we expect are present and responding. We 122 /* Check that all the MMDs we expect are present and responding. We
128 * expect faults on some if the link is down, but not on the PHY XS */ 123 * expect faults on some if the link is down, but not on the PHY XS */
129 rc = mdio_clause45_check_mmds(efx, XFP_REQUIRED_DEVS, 124 rc = efx_mdio_check_mmds(efx, XFP_REQUIRED_DEVS, MDIO_DEVS_PHYXS);
130 MDIO_MMDREG_DEVS_PHYXS);
131 if (rc < 0) 125 if (rc < 0)
132 goto fail; 126 goto fail;
133 127
@@ -143,7 +137,7 @@ static int xfp_reset_phy(struct efx_nic *efx)
143static int xfp_phy_init(struct efx_nic *efx) 137static int xfp_phy_init(struct efx_nic *efx)
144{ 138{
145 struct xfp_phy_data *phy_data; 139 struct xfp_phy_data *phy_data;
146 u32 devid = mdio_clause45_read_id(efx, MDIO_MMD_PHYXS); 140 u32 devid = efx_mdio_read_id(efx, MDIO_MMD_PHYXS);
147 int rc; 141 int rc;
148 142
149 phy_data = kzalloc(sizeof(struct xfp_phy_data), GFP_KERNEL); 143 phy_data = kzalloc(sizeof(struct xfp_phy_data), GFP_KERNEL);
@@ -152,8 +146,8 @@ static int xfp_phy_init(struct efx_nic *efx)
152 efx->phy_data = phy_data; 146 efx->phy_data = phy_data;
153 147
154 EFX_INFO(efx, "PHY ID reg %x (OUI %06x model %02x revision %x)\n", 148 EFX_INFO(efx, "PHY ID reg %x (OUI %06x model %02x revision %x)\n",
155 devid, mdio_id_oui(devid), mdio_id_model(devid), 149 devid, efx_mdio_id_oui(devid), efx_mdio_id_model(devid),
156 mdio_id_rev(devid)); 150 efx_mdio_id_rev(devid));
157 151
158 phy_data->phy_mode = efx->phy_mode; 152 phy_data->phy_mode = efx->phy_mode;
159 153
@@ -174,12 +168,13 @@ static int xfp_phy_init(struct efx_nic *efx)
174 168
175static void xfp_phy_clear_interrupt(struct efx_nic *efx) 169static void xfp_phy_clear_interrupt(struct efx_nic *efx)
176{ 170{
177 xenpack_clear_lasi_irqs(efx); 171 /* Read to clear link status alarm */
172 efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT);
178} 173}
179 174
180static int xfp_link_ok(struct efx_nic *efx) 175static int xfp_link_ok(struct efx_nic *efx)
181{ 176{
182 return mdio_clause45_links_ok(efx, XFP_REQUIRED_DEVS); 177 return efx_mdio_links_ok(efx, XFP_REQUIRED_DEVS);
183} 178}
184 179
185static void xfp_phy_poll(struct efx_nic *efx) 180static void xfp_phy_poll(struct efx_nic *efx)
@@ -200,9 +195,9 @@ static void xfp_phy_reconfigure(struct efx_nic *efx)
200 * or optical transceivers, varying somewhat between 195 * or optical transceivers, varying somewhat between
201 * firmware versions. Only 'static mode' appears to 196 * firmware versions. Only 'static mode' appears to
202 * cover everything. */ 197 * cover everything. */
203 mdio_clause45_set_flag( 198 mdio_set_flag(
204 efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, 199 &efx->mdio, efx->mdio.prtad, MDIO_MMD_PMAPMD,
205 PMA_PMD_FTX_CTRL2_REG, PMA_PMD_FTX_STATIC_LBN, 200 PMA_PMD_FTX_CTRL2_REG, 1 << PMA_PMD_FTX_STATIC_LBN,
206 efx->phy_mode & PHY_MODE_TX_DISABLED || 201 efx->phy_mode & PHY_MODE_TX_DISABLED ||
207 efx->phy_mode & PHY_MODE_LOW_POWER || 202 efx->phy_mode & PHY_MODE_LOW_POWER ||
208 efx->loopback_mode == LOOPBACK_PCS || 203 efx->loopback_mode == LOOPBACK_PCS ||
@@ -213,10 +208,10 @@ static void xfp_phy_reconfigure(struct efx_nic *efx)
213 (phy_data->phy_mode & PHY_MODE_TX_DISABLED)) 208 (phy_data->phy_mode & PHY_MODE_TX_DISABLED))
214 xfp_reset_phy(efx); 209 xfp_reset_phy(efx);
215 210
216 mdio_clause45_transmit_disable(efx); 211 efx_mdio_transmit_disable(efx);
217 } 212 }
218 213
219 mdio_clause45_phy_reconfigure(efx); 214 efx_mdio_phy_reconfigure(efx);
220 215
221 phy_data->phy_mode = efx->phy_mode; 216 phy_data->phy_mode = efx->phy_mode;
222 efx->link_up = xfp_link_ok(efx); 217 efx->link_up = xfp_link_ok(efx);
@@ -225,6 +220,10 @@ static void xfp_phy_reconfigure(struct efx_nic *efx)
225 efx->link_fc = efx->wanted_fc; 220 efx->link_fc = efx->wanted_fc;
226} 221}
227 222
223static void xfp_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
224{
225 mdio45_ethtool_gset(&efx->mdio, ecmd);
226}
228 227
229static void xfp_phy_fini(struct efx_nic *efx) 228static void xfp_phy_fini(struct efx_nic *efx)
230{ 229{
@@ -243,8 +242,8 @@ struct efx_phy_operations falcon_xfp_phy_ops = {
243 .poll = xfp_phy_poll, 242 .poll = xfp_phy_poll,
244 .fini = xfp_phy_fini, 243 .fini = xfp_phy_fini,
245 .clear_interrupt = xfp_phy_clear_interrupt, 244 .clear_interrupt = xfp_phy_clear_interrupt,
246 .get_settings = mdio_clause45_get_settings, 245 .get_settings = xfp_phy_get_settings,
247 .set_settings = mdio_clause45_set_settings, 246 .set_settings = efx_mdio_set_settings,
248 .mmds = XFP_REQUIRED_DEVS, 247 .mmds = XFP_REQUIRED_DEVS,
249 .loopbacks = XFP_LOOPBACKS, 248 .loopbacks = XFP_LOOPBACKS,
250}; 249};
diff --git a/drivers/net/sgiseeq.c b/drivers/net/sgiseeq.c
index 97d68560067d..5fb88ca6dd7f 100644
--- a/drivers/net/sgiseeq.c
+++ b/drivers/net/sgiseeq.c
@@ -709,6 +709,17 @@ static inline void setup_rx_ring(struct net_device *dev,
709 dma_sync_desc_dev(dev, &buf[i]); 709 dma_sync_desc_dev(dev, &buf[i]);
710} 710}
711 711
712static const struct net_device_ops sgiseeq_netdev_ops = {
713 .ndo_open = sgiseeq_open,
714 .ndo_stop = sgiseeq_close,
715 .ndo_start_xmit = sgiseeq_start_xmit,
716 .ndo_tx_timeout = timeout,
717 .ndo_set_multicast_list = sgiseeq_set_multicast,
718 .ndo_set_mac_address = sgiseeq_set_mac_address,
719 .ndo_change_mtu = eth_change_mtu,
720 .ndo_validate_addr = eth_validate_addr,
721};
722
712static int __init sgiseeq_probe(struct platform_device *pdev) 723static int __init sgiseeq_probe(struct platform_device *pdev)
713{ 724{
714 struct sgiseeq_platform_data *pd = pdev->dev.platform_data; 725 struct sgiseeq_platform_data *pd = pdev->dev.platform_data;
@@ -775,13 +786,8 @@ static int __init sgiseeq_probe(struct platform_device *pdev)
775 SEEQ_CTRL_SFLAG | SEEQ_CTRL_ESHORT | 786 SEEQ_CTRL_SFLAG | SEEQ_CTRL_ESHORT |
776 SEEQ_CTRL_ENCARR; 787 SEEQ_CTRL_ENCARR;
777 788
778 dev->open = sgiseeq_open; 789 dev->netdev_ops = &sgiseeq_netdev_ops;
779 dev->stop = sgiseeq_close;
780 dev->hard_start_xmit = sgiseeq_start_xmit;
781 dev->tx_timeout = timeout;
782 dev->watchdog_timeo = (200 * HZ) / 1000; 790 dev->watchdog_timeo = (200 * HZ) / 1000;
783 dev->set_multicast_list = sgiseeq_set_multicast;
784 dev->set_mac_address = sgiseeq_set_mac_address;
785 dev->irq = irq; 791 dev->irq = irq;
786 792
787 if (register_netdev(dev)) { 793 if (register_netdev(dev)) {
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 3ab28bb00c12..0709b7512467 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -2,7 +2,7 @@
2 * SuperH Ethernet device driver 2 * SuperH Ethernet device driver
3 * 3 *
4 * Copyright (C) 2006-2008 Nobuhiro Iwamatsu 4 * Copyright (C) 2006-2008 Nobuhiro Iwamatsu
5 * Copyright (C) 2008 Renesas Solutions Corp. 5 * Copyright (C) 2008-2009 Renesas Solutions Corp.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License, 8 * under the terms and conditions of the GNU General Public License,
@@ -33,6 +33,226 @@
33 33
34#include "sh_eth.h" 34#include "sh_eth.h"
35 35
36/* There is CPU dependent code */
37#if defined(CONFIG_CPU_SUBTYPE_SH7724)
38#define SH_ETH_RESET_DEFAULT 1
39static void sh_eth_set_duplex(struct net_device *ndev)
40{
41 struct sh_eth_private *mdp = netdev_priv(ndev);
42 u32 ioaddr = ndev->base_addr;
43
44 if (mdp->duplex) /* Full */
45 ctrl_outl(ctrl_inl(ioaddr + ECMR) | ECMR_DM, ioaddr + ECMR);
46 else /* Half */
47 ctrl_outl(ctrl_inl(ioaddr + ECMR) & ~ECMR_DM, ioaddr + ECMR);
48}
49
50static void sh_eth_set_rate(struct net_device *ndev)
51{
52 struct sh_eth_private *mdp = netdev_priv(ndev);
53 u32 ioaddr = ndev->base_addr;
54
55 switch (mdp->speed) {
56 case 10: /* 10BASE */
57 ctrl_outl(ctrl_inl(ioaddr + ECMR) & ~ECMR_RTM, ioaddr + ECMR);
58 break;
59 case 100:/* 100BASE */
60 ctrl_outl(ctrl_inl(ioaddr + ECMR) | ECMR_RTM, ioaddr + ECMR);
61 break;
62 default:
63 break;
64 }
65}
66
67/* SH7724 */
68static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
69 .set_duplex = sh_eth_set_duplex,
70 .set_rate = sh_eth_set_rate,
71
72 .ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
73 .ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
74 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x01ff009f,
75
76 .tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
77 .eesr_err_check = EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE |
78 EESR_RFRMER | EESR_TFE | EESR_TDE | EESR_ECI,
79 .tx_error_check = EESR_TWB | EESR_TABT | EESR_TDE | EESR_TFE,
80
81 .apr = 1,
82 .mpr = 1,
83 .tpauser = 1,
84 .hw_swap = 1,
85};
86
87#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
88#define SH_ETH_HAS_TSU 1
89static void sh_eth_chip_reset(struct net_device *ndev)
90{
91 /* reset device */
92 ctrl_outl(ARSTR_ARSTR, ARSTR);
93 mdelay(1);
94}
95
96static void sh_eth_reset(struct net_device *ndev)
97{
98 u32 ioaddr = ndev->base_addr;
99 int cnt = 100;
100
101 ctrl_outl(EDSR_ENALL, ioaddr + EDSR);
102 ctrl_outl(ctrl_inl(ioaddr + EDMR) | EDMR_SRST, ioaddr + EDMR);
103 while (cnt > 0) {
104 if (!(ctrl_inl(ioaddr + EDMR) & 0x3))
105 break;
106 mdelay(1);
107 cnt--;
108 }
109 if (cnt < 0)
110 printk(KERN_ERR "Device reset fail\n");
111
112 /* Table Init */
113 ctrl_outl(0x0, ioaddr + TDLAR);
114 ctrl_outl(0x0, ioaddr + TDFAR);
115 ctrl_outl(0x0, ioaddr + TDFXR);
116 ctrl_outl(0x0, ioaddr + TDFFR);
117 ctrl_outl(0x0, ioaddr + RDLAR);
118 ctrl_outl(0x0, ioaddr + RDFAR);
119 ctrl_outl(0x0, ioaddr + RDFXR);
120 ctrl_outl(0x0, ioaddr + RDFFR);
121}
122
123static void sh_eth_set_duplex(struct net_device *ndev)
124{
125 struct sh_eth_private *mdp = netdev_priv(ndev);
126 u32 ioaddr = ndev->base_addr;
127
128 if (mdp->duplex) /* Full */
129 ctrl_outl(ctrl_inl(ioaddr + ECMR) | ECMR_DM, ioaddr + ECMR);
130 else /* Half */
131 ctrl_outl(ctrl_inl(ioaddr + ECMR) & ~ECMR_DM, ioaddr + ECMR);
132}
133
134static void sh_eth_set_rate(struct net_device *ndev)
135{
136 struct sh_eth_private *mdp = netdev_priv(ndev);
137 u32 ioaddr = ndev->base_addr;
138
139 switch (mdp->speed) {
140 case 10: /* 10BASE */
141 ctrl_outl(GECMR_10, ioaddr + GECMR);
142 break;
143 case 100:/* 100BASE */
144 ctrl_outl(GECMR_100, ioaddr + GECMR);
145 break;
146 case 1000: /* 1000BASE */
147 ctrl_outl(GECMR_1000, ioaddr + GECMR);
148 break;
149 default:
150 break;
151 }
152}
153
154/* sh7763 */
155static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
156 .chip_reset = sh_eth_chip_reset,
157 .set_duplex = sh_eth_set_duplex,
158 .set_rate = sh_eth_set_rate,
159
160 .ecsr_value = ECSR_ICD | ECSR_MPD,
161 .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
162 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
163
164 .tx_check = EESR_TC1 | EESR_FTC,
165 .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | \
166 EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE | \
167 EESR_ECI,
168 .tx_error_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_TDE | \
169 EESR_TFE,
170
171 .apr = 1,
172 .mpr = 1,
173 .tpauser = 1,
174 .bculr = 1,
175 .hw_swap = 1,
176 .rpadir = 1,
177 .no_trimd = 1,
178 .no_ade = 1,
179};
180
181#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
182#define SH_ETH_RESET_DEFAULT 1
183static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
184 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
185
186 .apr = 1,
187 .mpr = 1,
188 .tpauser = 1,
189 .hw_swap = 1,
190};
191#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
192#define SH_ETH_RESET_DEFAULT 1
193#define SH_ETH_HAS_TSU 1
194static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
195 .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
196};
197#endif
198
199static void sh_eth_set_default_cpu_data(struct sh_eth_cpu_data *cd)
200{
201 if (!cd->ecsr_value)
202 cd->ecsr_value = DEFAULT_ECSR_INIT;
203
204 if (!cd->ecsipr_value)
205 cd->ecsipr_value = DEFAULT_ECSIPR_INIT;
206
207 if (!cd->fcftr_value)
208 cd->fcftr_value = DEFAULT_FIFO_F_D_RFF | \
209 DEFAULT_FIFO_F_D_RFD;
210
211 if (!cd->fdr_value)
212 cd->fdr_value = DEFAULT_FDR_INIT;
213
214 if (!cd->rmcr_value)
215 cd->rmcr_value = DEFAULT_RMCR_VALUE;
216
217 if (!cd->tx_check)
218 cd->tx_check = DEFAULT_TX_CHECK;
219
220 if (!cd->eesr_err_check)
221 cd->eesr_err_check = DEFAULT_EESR_ERR_CHECK;
222
223 if (!cd->tx_error_check)
224 cd->tx_error_check = DEFAULT_TX_ERROR_CHECK;
225}
226
227#if defined(SH_ETH_RESET_DEFAULT)
228/* Chip Reset */
229static void sh_eth_reset(struct net_device *ndev)
230{
231 u32 ioaddr = ndev->base_addr;
232
233 ctrl_outl(ctrl_inl(ioaddr + EDMR) | EDMR_SRST, ioaddr + EDMR);
234 mdelay(3);
235 ctrl_outl(ctrl_inl(ioaddr + EDMR) & ~EDMR_SRST, ioaddr + EDMR);
236}
237#endif
238
239#if defined(CONFIG_CPU_SH4)
240static void sh_eth_set_receive_align(struct sk_buff *skb)
241{
242 int reserve;
243
244 reserve = SH4_SKB_RX_ALIGN - ((u32)skb->data & (SH4_SKB_RX_ALIGN - 1));
245 if (reserve)
246 skb_reserve(skb, reserve);
247}
248#else
249static void sh_eth_set_receive_align(struct sk_buff *skb)
250{
251 skb_reserve(skb, SH2_SH3_SKB_RX_ALIGN);
252}
253#endif
254
255
36/* CPU <-> EDMAC endian convert */ 256/* CPU <-> EDMAC endian convert */
37static inline __u32 cpu_to_edmac(struct sh_eth_private *mdp, u32 x) 257static inline __u32 cpu_to_edmac(struct sh_eth_private *mdp, u32 x)
38{ 258{
@@ -165,41 +385,6 @@ static struct mdiobb_ops bb_ops = {
165 .get_mdio_data = sh_get_mdio, 385 .get_mdio_data = sh_get_mdio,
166}; 386};
167 387
168/* Chip Reset */
169static void sh_eth_reset(struct net_device *ndev)
170{
171 u32 ioaddr = ndev->base_addr;
172
173#if defined(CONFIG_CPU_SUBTYPE_SH7763)
174 int cnt = 100;
175
176 ctrl_outl(EDSR_ENALL, ioaddr + EDSR);
177 ctrl_outl(ctrl_inl(ioaddr + EDMR) | EDMR_SRST, ioaddr + EDMR);
178 while (cnt > 0) {
179 if (!(ctrl_inl(ioaddr + EDMR) & 0x3))
180 break;
181 mdelay(1);
182 cnt--;
183 }
184 if (cnt < 0)
185 printk(KERN_ERR "Device reset fail\n");
186
187 /* Table Init */
188 ctrl_outl(0x0, ioaddr + TDLAR);
189 ctrl_outl(0x0, ioaddr + TDFAR);
190 ctrl_outl(0x0, ioaddr + TDFXR);
191 ctrl_outl(0x0, ioaddr + TDFFR);
192 ctrl_outl(0x0, ioaddr + RDLAR);
193 ctrl_outl(0x0, ioaddr + RDFAR);
194 ctrl_outl(0x0, ioaddr + RDFXR);
195 ctrl_outl(0x0, ioaddr + RDFFR);
196#else
197 ctrl_outl(ctrl_inl(ioaddr + EDMR) | EDMR_SRST, ioaddr + EDMR);
198 mdelay(3);
199 ctrl_outl(ctrl_inl(ioaddr + EDMR) & ~EDMR_SRST, ioaddr + EDMR);
200#endif
201}
202
203/* free skb and descriptor buffer */ 388/* free skb and descriptor buffer */
204static void sh_eth_ring_free(struct net_device *ndev) 389static void sh_eth_ring_free(struct net_device *ndev)
205{ 390{
@@ -228,7 +413,7 @@ static void sh_eth_ring_free(struct net_device *ndev)
228/* format skb and descriptor buffer */ 413/* format skb and descriptor buffer */
229static void sh_eth_ring_format(struct net_device *ndev) 414static void sh_eth_ring_format(struct net_device *ndev)
230{ 415{
231 u32 ioaddr = ndev->base_addr, reserve = 0; 416 u32 ioaddr = ndev->base_addr;
232 struct sh_eth_private *mdp = netdev_priv(ndev); 417 struct sh_eth_private *mdp = netdev_priv(ndev);
233 int i; 418 int i;
234 struct sk_buff *skb; 419 struct sk_buff *skb;
@@ -250,37 +435,27 @@ static void sh_eth_ring_format(struct net_device *ndev)
250 mdp->rx_skbuff[i] = skb; 435 mdp->rx_skbuff[i] = skb;
251 if (skb == NULL) 436 if (skb == NULL)
252 break; 437 break;
438 dma_map_single(&ndev->dev, skb->tail, mdp->rx_buf_sz,
439 DMA_FROM_DEVICE);
253 skb->dev = ndev; /* Mark as being used by this device. */ 440 skb->dev = ndev; /* Mark as being used by this device. */
254#if defined(CONFIG_CPU_SUBTYPE_SH7763) 441 sh_eth_set_receive_align(skb);
255 reserve = SH7763_SKB_ALIGN 442
256 - ((uint32_t)skb->data & (SH7763_SKB_ALIGN-1));
257 if (reserve)
258 skb_reserve(skb, reserve);
259#else
260 skb_reserve(skb, RX_OFFSET);
261#endif
262 /* RX descriptor */ 443 /* RX descriptor */
263 rxdesc = &mdp->rx_ring[i]; 444 rxdesc = &mdp->rx_ring[i];
264 rxdesc->addr = (u32)skb->data & ~0x3UL; 445 rxdesc->addr = virt_to_phys(PTR_ALIGN(skb->data, 4));
265 rxdesc->status = cpu_to_edmac(mdp, RD_RACT | RD_RFP); 446 rxdesc->status = cpu_to_edmac(mdp, RD_RACT | RD_RFP);
266 447
267 /* The size of the buffer is 16 byte boundary. */ 448 /* The size of the buffer is 16 byte boundary. */
268 rxdesc->buffer_length = (mdp->rx_buf_sz + 16) & ~0x0F; 449 rxdesc->buffer_length = ALIGN(mdp->rx_buf_sz, 16);
269 /* Rx descriptor address set */ 450 /* Rx descriptor address set */
270 if (i == 0) { 451 if (i == 0) {
271 ctrl_outl((u32)rxdesc, ioaddr + RDLAR); 452 ctrl_outl(mdp->rx_desc_dma, ioaddr + RDLAR);
272#if defined(CONFIG_CPU_SUBTYPE_SH7763) 453#if defined(CONFIG_CPU_SUBTYPE_SH7763)
273 ctrl_outl((u32)rxdesc, ioaddr + RDFAR); 454 ctrl_outl(mdp->rx_desc_dma, ioaddr + RDFAR);
274#endif 455#endif
275 } 456 }
276 } 457 }
277 458
278 /* Rx descriptor address set */
279#if defined(CONFIG_CPU_SUBTYPE_SH7763)
280 ctrl_outl((u32)rxdesc, ioaddr + RDFXR);
281 ctrl_outl(0x1, ioaddr + RDFFR);
282#endif
283
284 mdp->dirty_rx = (u32) (i - RX_RING_SIZE); 459 mdp->dirty_rx = (u32) (i - RX_RING_SIZE);
285 460
286 /* Mark the last entry as wrapping the ring. */ 461 /* Mark the last entry as wrapping the ring. */
@@ -296,19 +471,13 @@ static void sh_eth_ring_format(struct net_device *ndev)
296 txdesc->buffer_length = 0; 471 txdesc->buffer_length = 0;
297 if (i == 0) { 472 if (i == 0) {
298 /* Tx descriptor address set */ 473 /* Tx descriptor address set */
299 ctrl_outl((u32)txdesc, ioaddr + TDLAR); 474 ctrl_outl(mdp->tx_desc_dma, ioaddr + TDLAR);
300#if defined(CONFIG_CPU_SUBTYPE_SH7763) 475#if defined(CONFIG_CPU_SUBTYPE_SH7763)
301 ctrl_outl((u32)txdesc, ioaddr + TDFAR); 476 ctrl_outl(mdp->tx_desc_dma, ioaddr + TDFAR);
302#endif 477#endif
303 } 478 }
304 } 479 }
305 480
306 /* Tx descriptor address set */
307#if defined(CONFIG_CPU_SUBTYPE_SH7763)
308 ctrl_outl((u32)txdesc, ioaddr + TDFXR);
309 ctrl_outl(0x1, ioaddr + TDFFR);
310#endif
311
312 txdesc->status |= cpu_to_edmac(mdp, TD_TDLE); 481 txdesc->status |= cpu_to_edmac(mdp, TD_TDLE);
313} 482}
314 483
@@ -331,7 +500,7 @@ static int sh_eth_ring_init(struct net_device *ndev)
331 mdp->rx_skbuff = kmalloc(sizeof(*mdp->rx_skbuff) * RX_RING_SIZE, 500 mdp->rx_skbuff = kmalloc(sizeof(*mdp->rx_skbuff) * RX_RING_SIZE,
332 GFP_KERNEL); 501 GFP_KERNEL);
333 if (!mdp->rx_skbuff) { 502 if (!mdp->rx_skbuff) {
334 printk(KERN_ERR "%s: Cannot allocate Rx skb\n", ndev->name); 503 dev_err(&ndev->dev, "Cannot allocate Rx skb\n");
335 ret = -ENOMEM; 504 ret = -ENOMEM;
336 return ret; 505 return ret;
337 } 506 }
@@ -339,7 +508,7 @@ static int sh_eth_ring_init(struct net_device *ndev)
339 mdp->tx_skbuff = kmalloc(sizeof(*mdp->tx_skbuff) * TX_RING_SIZE, 508 mdp->tx_skbuff = kmalloc(sizeof(*mdp->tx_skbuff) * TX_RING_SIZE,
340 GFP_KERNEL); 509 GFP_KERNEL);
341 if (!mdp->tx_skbuff) { 510 if (!mdp->tx_skbuff) {
342 printk(KERN_ERR "%s: Cannot allocate Tx skb\n", ndev->name); 511 dev_err(&ndev->dev, "Cannot allocate Tx skb\n");
343 ret = -ENOMEM; 512 ret = -ENOMEM;
344 goto skb_ring_free; 513 goto skb_ring_free;
345 } 514 }
@@ -350,8 +519,8 @@ static int sh_eth_ring_init(struct net_device *ndev)
350 GFP_KERNEL); 519 GFP_KERNEL);
351 520
352 if (!mdp->rx_ring) { 521 if (!mdp->rx_ring) {
353 printk(KERN_ERR "%s: Cannot allocate Rx Ring (size %d bytes)\n", 522 dev_err(&ndev->dev, "Cannot allocate Rx Ring (size %d bytes)\n",
354 ndev->name, rx_ringsize); 523 rx_ringsize);
355 ret = -ENOMEM; 524 ret = -ENOMEM;
356 goto desc_ring_free; 525 goto desc_ring_free;
357 } 526 }
@@ -363,8 +532,8 @@ static int sh_eth_ring_init(struct net_device *ndev)
363 mdp->tx_ring = dma_alloc_coherent(NULL, tx_ringsize, &mdp->tx_desc_dma, 532 mdp->tx_ring = dma_alloc_coherent(NULL, tx_ringsize, &mdp->tx_desc_dma,
364 GFP_KERNEL); 533 GFP_KERNEL);
365 if (!mdp->tx_ring) { 534 if (!mdp->tx_ring) {
366 printk(KERN_ERR "%s: Cannot allocate Tx Ring (size %d bytes)\n", 535 dev_err(&ndev->dev, "Cannot allocate Tx Ring (size %d bytes)\n",
367 ndev->name, tx_ringsize); 536 tx_ringsize);
368 ret = -ENOMEM; 537 ret = -ENOMEM;
369 goto desc_ring_free; 538 goto desc_ring_free;
370 } 539 }
@@ -394,44 +563,43 @@ static int sh_eth_dev_init(struct net_device *ndev)
394 563
395 /* Descriptor format */ 564 /* Descriptor format */
396 sh_eth_ring_format(ndev); 565 sh_eth_ring_format(ndev);
397 ctrl_outl(RPADIR_INIT, ioaddr + RPADIR); 566 if (mdp->cd->rpadir)
567 ctrl_outl(mdp->cd->rpadir_value, ioaddr + RPADIR);
398 568
399 /* all sh_eth int mask */ 569 /* all sh_eth int mask */
400 ctrl_outl(0, ioaddr + EESIPR); 570 ctrl_outl(0, ioaddr + EESIPR);
401 571
402#if defined(CONFIG_CPU_SUBTYPE_SH7763) 572#if defined(__LITTLE_ENDIAN__)
403 ctrl_outl(EDMR_EL, ioaddr + EDMR); 573 if (mdp->cd->hw_swap)
404#else 574 ctrl_outl(EDMR_EL, ioaddr + EDMR);
405 ctrl_outl(0, ioaddr + EDMR); /* Endian change */ 575 else
406#endif 576#endif
577 ctrl_outl(0, ioaddr + EDMR);
407 578
408 /* FIFO size set */ 579 /* FIFO size set */
409 ctrl_outl((FIFO_SIZE_T | FIFO_SIZE_R), ioaddr + FDR); 580 ctrl_outl(mdp->cd->fdr_value, ioaddr + FDR);
410 ctrl_outl(0, ioaddr + TFTR); 581 ctrl_outl(0, ioaddr + TFTR);
411 582
412 /* Frame recv control */ 583 /* Frame recv control */
413 ctrl_outl(0, ioaddr + RMCR); 584 ctrl_outl(mdp->cd->rmcr_value, ioaddr + RMCR);
414 585
415 rx_int_var = mdp->rx_int_var = DESC_I_RINT8 | DESC_I_RINT5; 586 rx_int_var = mdp->rx_int_var = DESC_I_RINT8 | DESC_I_RINT5;
416 tx_int_var = mdp->tx_int_var = DESC_I_TINT2; 587 tx_int_var = mdp->tx_int_var = DESC_I_TINT2;
417 ctrl_outl(rx_int_var | tx_int_var, ioaddr + TRSCER); 588 ctrl_outl(rx_int_var | tx_int_var, ioaddr + TRSCER);
418 589
419#if defined(CONFIG_CPU_SUBTYPE_SH7763) 590 if (mdp->cd->bculr)
420 /* Burst sycle set */ 591 ctrl_outl(0x800, ioaddr + BCULR); /* Burst sycle set */
421 ctrl_outl(0x800, ioaddr + BCULR);
422#endif
423 592
424 ctrl_outl((FIFO_F_D_RFF | FIFO_F_D_RFD), ioaddr + FCFTR); 593 ctrl_outl(mdp->cd->fcftr_value, ioaddr + FCFTR);
425 594
426#if !defined(CONFIG_CPU_SUBTYPE_SH7763) 595 if (!mdp->cd->no_trimd)
427 ctrl_outl(0, ioaddr + TRIMD); 596 ctrl_outl(0, ioaddr + TRIMD);
428#endif
429 597
430 /* Recv frame limit set register */ 598 /* Recv frame limit set register */
431 ctrl_outl(RFLR_VALUE, ioaddr + RFLR); 599 ctrl_outl(RFLR_VALUE, ioaddr + RFLR);
432 600
433 ctrl_outl(ctrl_inl(ioaddr + EESR), ioaddr + EESR); 601 ctrl_outl(ctrl_inl(ioaddr + EESR), ioaddr + EESR);
434 ctrl_outl((DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff), ioaddr + EESIPR); 602 ctrl_outl(mdp->cd->eesipr_value, ioaddr + EESIPR);
435 603
436 /* PAUSE Prohibition */ 604 /* PAUSE Prohibition */
437 val = (ctrl_inl(ioaddr + ECMR) & ECMR_DM) | 605 val = (ctrl_inl(ioaddr + ECMR) & ECMR_DM) |
@@ -439,24 +607,25 @@ static int sh_eth_dev_init(struct net_device *ndev)
439 607
440 ctrl_outl(val, ioaddr + ECMR); 608 ctrl_outl(val, ioaddr + ECMR);
441 609
610 if (mdp->cd->set_rate)
611 mdp->cd->set_rate(ndev);
612
442 /* E-MAC Status Register clear */ 613 /* E-MAC Status Register clear */
443 ctrl_outl(ECSR_INIT, ioaddr + ECSR); 614 ctrl_outl(mdp->cd->ecsr_value, ioaddr + ECSR);
444 615
445 /* E-MAC Interrupt Enable register */ 616 /* E-MAC Interrupt Enable register */
446 ctrl_outl(ECSIPR_INIT, ioaddr + ECSIPR); 617 ctrl_outl(mdp->cd->ecsipr_value, ioaddr + ECSIPR);
447 618
448 /* Set MAC address */ 619 /* Set MAC address */
449 update_mac_address(ndev); 620 update_mac_address(ndev);
450 621
451 /* mask reset */ 622 /* mask reset */
452#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7763) 623 if (mdp->cd->apr)
453 ctrl_outl(APR_AP, ioaddr + APR); 624 ctrl_outl(APR_AP, ioaddr + APR);
454 ctrl_outl(MPR_MP, ioaddr + MPR); 625 if (mdp->cd->mpr)
455 ctrl_outl(TPAUSER_UNLIMITED, ioaddr + TPAUSER); 626 ctrl_outl(MPR_MP, ioaddr + MPR);
456#endif 627 if (mdp->cd->tpauser)
457#if defined(CONFIG_CPU_SUBTYPE_SH7710) 628 ctrl_outl(TPAUSER_UNLIMITED, ioaddr + TPAUSER);
458 ctrl_outl(BCFR_UNLIMITED, ioaddr + BCFR);
459#endif
460 629
461 /* Setting the Rx mode will start the Rx process. */ 630 /* Setting the Rx mode will start the Rx process. */
462 ctrl_outl(EDRRR_R, ioaddr + EDRRR); 631 ctrl_outl(EDRRR_R, ioaddr + EDRRR);
@@ -505,7 +674,7 @@ static int sh_eth_rx(struct net_device *ndev)
505 int boguscnt = (mdp->dirty_rx + RX_RING_SIZE) - mdp->cur_rx; 674 int boguscnt = (mdp->dirty_rx + RX_RING_SIZE) - mdp->cur_rx;
506 struct sk_buff *skb; 675 struct sk_buff *skb;
507 u16 pkt_len = 0; 676 u16 pkt_len = 0;
508 u32 desc_status, reserve = 0; 677 u32 desc_status;
509 678
510 rxdesc = &mdp->rx_ring[entry]; 679 rxdesc = &mdp->rx_ring[entry];
511 while (!(rxdesc->status & cpu_to_edmac(mdp, RD_RACT))) { 680 while (!(rxdesc->status & cpu_to_edmac(mdp, RD_RACT))) {
@@ -534,7 +703,10 @@ static int sh_eth_rx(struct net_device *ndev)
534 if (desc_status & RD_RFS10) 703 if (desc_status & RD_RFS10)
535 mdp->stats.rx_over_errors++; 704 mdp->stats.rx_over_errors++;
536 } else { 705 } else {
537 swaps((char *)(rxdesc->addr & ~0x3), pkt_len + 2); 706 if (!mdp->cd->hw_swap)
707 sh_eth_soft_swap(
708 phys_to_virt(ALIGN(rxdesc->addr, 4)),
709 pkt_len + 2);
538 skb = mdp->rx_skbuff[entry]; 710 skb = mdp->rx_skbuff[entry];
539 mdp->rx_skbuff[entry] = NULL; 711 mdp->rx_skbuff[entry] = NULL;
540 skb_put(skb, pkt_len); 712 skb_put(skb, pkt_len);
@@ -545,6 +717,7 @@ static int sh_eth_rx(struct net_device *ndev)
545 } 717 }
546 rxdesc->status |= cpu_to_edmac(mdp, RD_RACT); 718 rxdesc->status |= cpu_to_edmac(mdp, RD_RACT);
547 entry = (++mdp->cur_rx) % RX_RING_SIZE; 719 entry = (++mdp->cur_rx) % RX_RING_SIZE;
720 rxdesc = &mdp->rx_ring[entry];
548 } 721 }
549 722
550 /* Refill the Rx ring buffers. */ 723 /* Refill the Rx ring buffers. */
@@ -552,24 +725,20 @@ static int sh_eth_rx(struct net_device *ndev)
552 entry = mdp->dirty_rx % RX_RING_SIZE; 725 entry = mdp->dirty_rx % RX_RING_SIZE;
553 rxdesc = &mdp->rx_ring[entry]; 726 rxdesc = &mdp->rx_ring[entry];
554 /* The size of the buffer is 16 byte boundary. */ 727 /* The size of the buffer is 16 byte boundary. */
555 rxdesc->buffer_length = (mdp->rx_buf_sz + 16) & ~0x0F; 728 rxdesc->buffer_length = ALIGN(mdp->rx_buf_sz, 16);
556 729
557 if (mdp->rx_skbuff[entry] == NULL) { 730 if (mdp->rx_skbuff[entry] == NULL) {
558 skb = dev_alloc_skb(mdp->rx_buf_sz); 731 skb = dev_alloc_skb(mdp->rx_buf_sz);
559 mdp->rx_skbuff[entry] = skb; 732 mdp->rx_skbuff[entry] = skb;
560 if (skb == NULL) 733 if (skb == NULL)
561 break; /* Better luck next round. */ 734 break; /* Better luck next round. */
735 dma_map_single(&ndev->dev, skb->tail, mdp->rx_buf_sz,
736 DMA_FROM_DEVICE);
562 skb->dev = ndev; 737 skb->dev = ndev;
563#if defined(CONFIG_CPU_SUBTYPE_SH7763) 738 sh_eth_set_receive_align(skb);
564 reserve = SH7763_SKB_ALIGN 739
565 - ((uint32_t)skb->data & (SH7763_SKB_ALIGN-1));
566 if (reserve)
567 skb_reserve(skb, reserve);
568#else
569 skb_reserve(skb, RX_OFFSET);
570#endif
571 skb->ip_summed = CHECKSUM_NONE; 740 skb->ip_summed = CHECKSUM_NONE;
572 rxdesc->addr = (u32)skb->data & ~0x3UL; 741 rxdesc->addr = virt_to_phys(PTR_ALIGN(skb->data, 4));
573 } 742 }
574 if (entry >= RX_RING_SIZE - 1) 743 if (entry >= RX_RING_SIZE - 1)
575 rxdesc->status |= 744 rxdesc->status |=
@@ -593,6 +762,8 @@ static void sh_eth_error(struct net_device *ndev, int intr_status)
593 struct sh_eth_private *mdp = netdev_priv(ndev); 762 struct sh_eth_private *mdp = netdev_priv(ndev);
594 u32 ioaddr = ndev->base_addr; 763 u32 ioaddr = ndev->base_addr;
595 u32 felic_stat; 764 u32 felic_stat;
765 u32 link_stat;
766 u32 mask;
596 767
597 if (intr_status & EESR_ECI) { 768 if (intr_status & EESR_ECI) {
598 felic_stat = ctrl_inl(ioaddr + ECSR); 769 felic_stat = ctrl_inl(ioaddr + ECSR);
@@ -601,7 +772,14 @@ static void sh_eth_error(struct net_device *ndev, int intr_status)
601 mdp->stats.tx_carrier_errors++; 772 mdp->stats.tx_carrier_errors++;
602 if (felic_stat & ECSR_LCHNG) { 773 if (felic_stat & ECSR_LCHNG) {
603 /* Link Changed */ 774 /* Link Changed */
604 u32 link_stat = (ctrl_inl(ioaddr + PSR)); 775 if (mdp->cd->no_psr) {
776 if (mdp->link == PHY_DOWN)
777 link_stat = 0;
778 else
779 link_stat = PHY_ST_LINK;
780 } else {
781 link_stat = (ctrl_inl(ioaddr + PSR));
782 }
605 if (!(link_stat & PHY_ST_LINK)) { 783 if (!(link_stat & PHY_ST_LINK)) {
606 /* Link Down : disable tx and rx */ 784 /* Link Down : disable tx and rx */
607 ctrl_outl(ctrl_inl(ioaddr + ECMR) & 785 ctrl_outl(ctrl_inl(ioaddr + ECMR) &
@@ -633,17 +811,15 @@ static void sh_eth_error(struct net_device *ndev, int intr_status)
633 if (intr_status & EESR_RFRMER) { 811 if (intr_status & EESR_RFRMER) {
634 /* Receive Frame Overflow int */ 812 /* Receive Frame Overflow int */
635 mdp->stats.rx_frame_errors++; 813 mdp->stats.rx_frame_errors++;
636 printk(KERN_ERR "Receive Frame Overflow\n"); 814 dev_err(&ndev->dev, "Receive Frame Overflow\n");
637 } 815 }
638 } 816 }
639#if !defined(CONFIG_CPU_SUBTYPE_SH7763) 817
640 if (intr_status & EESR_ADE) { 818 if (!mdp->cd->no_ade) {
641 if (intr_status & EESR_TDE) { 819 if (intr_status & EESR_ADE && intr_status & EESR_TDE &&
642 if (intr_status & EESR_TFE) 820 intr_status & EESR_TFE)
643 mdp->stats.tx_fifo_errors++; 821 mdp->stats.tx_fifo_errors++;
644 }
645 } 822 }
646#endif
647 823
648 if (intr_status & EESR_RDE) { 824 if (intr_status & EESR_RDE) {
649 /* Receive Descriptor Empty int */ 825 /* Receive Descriptor Empty int */
@@ -651,24 +827,24 @@ static void sh_eth_error(struct net_device *ndev, int intr_status)
651 827
652 if (ctrl_inl(ioaddr + EDRRR) ^ EDRRR_R) 828 if (ctrl_inl(ioaddr + EDRRR) ^ EDRRR_R)
653 ctrl_outl(EDRRR_R, ioaddr + EDRRR); 829 ctrl_outl(EDRRR_R, ioaddr + EDRRR);
654 printk(KERN_ERR "Receive Descriptor Empty\n"); 830 dev_err(&ndev->dev, "Receive Descriptor Empty\n");
655 } 831 }
656 if (intr_status & EESR_RFE) { 832 if (intr_status & EESR_RFE) {
657 /* Receive FIFO Overflow int */ 833 /* Receive FIFO Overflow int */
658 mdp->stats.rx_fifo_errors++; 834 mdp->stats.rx_fifo_errors++;
659 printk(KERN_ERR "Receive FIFO Overflow\n"); 835 dev_err(&ndev->dev, "Receive FIFO Overflow\n");
660 } 836 }
661 if (intr_status & (EESR_TWB | EESR_TABT | 837
662#if !defined(CONFIG_CPU_SUBTYPE_SH7763) 838 mask = EESR_TWB | EESR_TABT | EESR_ADE | EESR_TDE | EESR_TFE;
663 EESR_ADE | 839 if (mdp->cd->no_ade)
664#endif 840 mask &= ~EESR_ADE;
665 EESR_TDE | EESR_TFE)) { 841 if (intr_status & mask) {
666 /* Tx error */ 842 /* Tx error */
667 u32 edtrr = ctrl_inl(ndev->base_addr + EDTRR); 843 u32 edtrr = ctrl_inl(ndev->base_addr + EDTRR);
668 /* dmesg */ 844 /* dmesg */
669 printk(KERN_ERR "%s:TX error. status=%8.8x cur_tx=%8.8x ", 845 dev_err(&ndev->dev, "TX error. status=%8.8x cur_tx=%8.8x ",
670 ndev->name, intr_status, mdp->cur_tx); 846 intr_status, mdp->cur_tx);
671 printk(KERN_ERR "dirty_tx=%8.8x state=%8.8x EDTRR=%8.8x.\n", 847 dev_err(&ndev->dev, "dirty_tx=%8.8x state=%8.8x EDTRR=%8.8x.\n",
672 mdp->dirty_tx, (u32) ndev->state, edtrr); 848 mdp->dirty_tx, (u32) ndev->state, edtrr);
673 /* dirty buffer free */ 849 /* dirty buffer free */
674 sh_eth_txfree(ndev); 850 sh_eth_txfree(ndev);
@@ -687,6 +863,7 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev)
687{ 863{
688 struct net_device *ndev = netdev; 864 struct net_device *ndev = netdev;
689 struct sh_eth_private *mdp = netdev_priv(ndev); 865 struct sh_eth_private *mdp = netdev_priv(ndev);
866 struct sh_eth_cpu_data *cd = mdp->cd;
690 irqreturn_t ret = IRQ_NONE; 867 irqreturn_t ret = IRQ_NONE;
691 u32 ioaddr, boguscnt = RX_RING_SIZE; 868 u32 ioaddr, boguscnt = RX_RING_SIZE;
692 u32 intr_status = 0; 869 u32 intr_status = 0;
@@ -699,7 +876,7 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev)
699 /* Clear interrupt */ 876 /* Clear interrupt */
700 if (intr_status & (EESR_FRC | EESR_RMAF | EESR_RRF | 877 if (intr_status & (EESR_FRC | EESR_RMAF | EESR_RRF |
701 EESR_RTLF | EESR_RTSF | EESR_PRE | EESR_CERF | 878 EESR_RTLF | EESR_RTSF | EESR_PRE | EESR_CERF |
702 TX_CHECK | EESR_ERR_CHECK)) { 879 cd->tx_check | cd->eesr_err_check)) {
703 ctrl_outl(intr_status, ioaddr + EESR); 880 ctrl_outl(intr_status, ioaddr + EESR);
704 ret = IRQ_HANDLED; 881 ret = IRQ_HANDLED;
705 } else 882 } else
@@ -716,12 +893,12 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev)
716 } 893 }
717 894
718 /* Tx Check */ 895 /* Tx Check */
719 if (intr_status & TX_CHECK) { 896 if (intr_status & cd->tx_check) {
720 sh_eth_txfree(ndev); 897 sh_eth_txfree(ndev);
721 netif_wake_queue(ndev); 898 netif_wake_queue(ndev);
722 } 899 }
723 900
724 if (intr_status & EESR_ERR_CHECK) 901 if (intr_status & cd->eesr_err_check)
725 sh_eth_error(ndev, intr_status); 902 sh_eth_error(ndev, intr_status);
726 903
727 if (--boguscnt < 0) { 904 if (--boguscnt < 0) {
@@ -756,32 +933,15 @@ static void sh_eth_adjust_link(struct net_device *ndev)
756 if (phydev->duplex != mdp->duplex) { 933 if (phydev->duplex != mdp->duplex) {
757 new_state = 1; 934 new_state = 1;
758 mdp->duplex = phydev->duplex; 935 mdp->duplex = phydev->duplex;
759#if defined(CONFIG_CPU_SUBTYPE_SH7763) 936 if (mdp->cd->set_duplex)
760 if (mdp->duplex) { /* FULL */ 937 mdp->cd->set_duplex(ndev);
761 ctrl_outl(ctrl_inl(ioaddr + ECMR) | ECMR_DM,
762 ioaddr + ECMR);
763 } else { /* Half */
764 ctrl_outl(ctrl_inl(ioaddr + ECMR) & ~ECMR_DM,
765 ioaddr + ECMR);
766 }
767#endif
768 } 938 }
769 939
770 if (phydev->speed != mdp->speed) { 940 if (phydev->speed != mdp->speed) {
771 new_state = 1; 941 new_state = 1;
772 mdp->speed = phydev->speed; 942 mdp->speed = phydev->speed;
773#if defined(CONFIG_CPU_SUBTYPE_SH7763) 943 if (mdp->cd->set_rate)
774 switch (mdp->speed) { 944 mdp->cd->set_rate(ndev);
775 case 10: /* 10BASE */
776 ctrl_outl(GECMR_10, ioaddr + GECMR); break;
777 case 100:/* 100BASE */
778 ctrl_outl(GECMR_100, ioaddr + GECMR); break;
779 case 1000: /* 1000BASE */
780 ctrl_outl(GECMR_1000, ioaddr + GECMR); break;
781 default:
782 break;
783 }
784#endif
785 } 945 }
786 if (mdp->link == PHY_DOWN) { 946 if (mdp->link == PHY_DOWN) {
787 ctrl_outl((ctrl_inl(ioaddr + ECMR) & ~ECMR_TXF) 947 ctrl_outl((ctrl_inl(ioaddr + ECMR) & ~ECMR_TXF)
@@ -804,7 +964,7 @@ static void sh_eth_adjust_link(struct net_device *ndev)
804static int sh_eth_phy_init(struct net_device *ndev) 964static int sh_eth_phy_init(struct net_device *ndev)
805{ 965{
806 struct sh_eth_private *mdp = netdev_priv(ndev); 966 struct sh_eth_private *mdp = netdev_priv(ndev);
807 char phy_id[BUS_ID_SIZE]; 967 char phy_id[MII_BUS_ID_SIZE + 3];
808 struct phy_device *phydev = NULL; 968 struct phy_device *phydev = NULL;
809 969
810 snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, 970 snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
@@ -821,8 +981,9 @@ static int sh_eth_phy_init(struct net_device *ndev)
821 dev_err(&ndev->dev, "phy_connect failed\n"); 981 dev_err(&ndev->dev, "phy_connect failed\n");
822 return PTR_ERR(phydev); 982 return PTR_ERR(phydev);
823 } 983 }
984
824 dev_info(&ndev->dev, "attached phy %i to driver %s\n", 985 dev_info(&ndev->dev, "attached phy %i to driver %s\n",
825 phydev->addr, phydev->drv->name); 986 phydev->addr, phydev->drv->name);
826 987
827 mdp->phydev = phydev; 988 mdp->phydev = phydev;
828 989
@@ -860,7 +1021,7 @@ static int sh_eth_open(struct net_device *ndev)
860#endif 1021#endif
861 ndev->name, ndev); 1022 ndev->name, ndev);
862 if (ret) { 1023 if (ret) {
863 printk(KERN_ERR "Can not assign IRQ number to %s\n", CARDNAME); 1024 dev_err(&ndev->dev, "Can not assign IRQ number\n");
864 return ret; 1025 return ret;
865 } 1026 }
866 1027
@@ -955,9 +1116,11 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev)
955 entry = mdp->cur_tx % TX_RING_SIZE; 1116 entry = mdp->cur_tx % TX_RING_SIZE;
956 mdp->tx_skbuff[entry] = skb; 1117 mdp->tx_skbuff[entry] = skb;
957 txdesc = &mdp->tx_ring[entry]; 1118 txdesc = &mdp->tx_ring[entry];
958 txdesc->addr = (u32)(skb->data); 1119 txdesc->addr = virt_to_phys(skb->data);
959 /* soft swap. */ 1120 /* soft swap. */
960 swaps((char *)(txdesc->addr & ~0x3), skb->len + 2); 1121 if (!mdp->cd->hw_swap)
1122 sh_eth_soft_swap(phys_to_virt(ALIGN(txdesc->addr, 4)),
1123 skb->len + 2);
961 /* write back */ 1124 /* write back */
962 __flush_purge_region(skb->data, skb->len); 1125 __flush_purge_region(skb->data, skb->len);
963 if (skb->len < ETHERSMALL) 1126 if (skb->len < ETHERSMALL)
@@ -1059,7 +1222,7 @@ static int sh_eth_do_ioctl(struct net_device *ndev, struct ifreq *rq,
1059 return phy_mii_ioctl(phydev, if_mii(rq), cmd); 1222 return phy_mii_ioctl(phydev, if_mii(rq), cmd);
1060} 1223}
1061 1224
1062 1225#if defined(SH_ETH_HAS_TSU)
1063/* Multicast reception directions set */ 1226/* Multicast reception directions set */
1064static void sh_eth_set_multicast_list(struct net_device *ndev) 1227static void sh_eth_set_multicast_list(struct net_device *ndev)
1065{ 1228{
@@ -1104,6 +1267,7 @@ static void sh_eth_tsu_init(u32 ioaddr)
1104 ctrl_outl(0, ioaddr + TSU_POST3); /* Disable CAM entry [16-23] */ 1267 ctrl_outl(0, ioaddr + TSU_POST3); /* Disable CAM entry [16-23] */
1105 ctrl_outl(0, ioaddr + TSU_POST4); /* Disable CAM entry [24-31] */ 1268 ctrl_outl(0, ioaddr + TSU_POST4); /* Disable CAM entry [24-31] */
1106} 1269}
1270#endif /* SH_ETH_HAS_TSU */
1107 1271
1108/* MDIO bus release function */ 1272/* MDIO bus release function */
1109static int sh_mdio_release(struct net_device *ndev) 1273static int sh_mdio_release(struct net_device *ndev)
@@ -1193,7 +1357,9 @@ static const struct net_device_ops sh_eth_netdev_ops = {
1193 .ndo_stop = sh_eth_close, 1357 .ndo_stop = sh_eth_close,
1194 .ndo_start_xmit = sh_eth_start_xmit, 1358 .ndo_start_xmit = sh_eth_start_xmit,
1195 .ndo_get_stats = sh_eth_get_stats, 1359 .ndo_get_stats = sh_eth_get_stats,
1360#if defined(SH_ETH_HAS_TSU)
1196 .ndo_set_multicast_list = sh_eth_set_multicast_list, 1361 .ndo_set_multicast_list = sh_eth_set_multicast_list,
1362#endif
1197 .ndo_tx_timeout = sh_eth_tx_timeout, 1363 .ndo_tx_timeout = sh_eth_tx_timeout,
1198 .ndo_do_ioctl = sh_eth_do_ioctl, 1364 .ndo_do_ioctl = sh_eth_do_ioctl,
1199 .ndo_validate_addr = eth_validate_addr, 1365 .ndo_validate_addr = eth_validate_addr,
@@ -1219,7 +1385,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
1219 1385
1220 ndev = alloc_etherdev(sizeof(struct sh_eth_private)); 1386 ndev = alloc_etherdev(sizeof(struct sh_eth_private));
1221 if (!ndev) { 1387 if (!ndev) {
1222 printk(KERN_ERR "%s: could not allocate device.\n", CARDNAME); 1388 dev_err(&pdev->dev, "Could not allocate device.\n");
1223 ret = -ENOMEM; 1389 ret = -ENOMEM;
1224 goto out; 1390 goto out;
1225 } 1391 }
@@ -1252,6 +1418,10 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
1252 /* EDMAC endian */ 1418 /* EDMAC endian */
1253 mdp->edmac_endian = pd->edmac_endian; 1419 mdp->edmac_endian = pd->edmac_endian;
1254 1420
1421 /* set cpu data */
1422 mdp->cd = &sh_eth_my_cpu_data;
1423 sh_eth_set_default_cpu_data(mdp->cd);
1424
1255 /* set function */ 1425 /* set function */
1256 ndev->netdev_ops = &sh_eth_netdev_ops; 1426 ndev->netdev_ops = &sh_eth_netdev_ops;
1257 ndev->watchdog_timeo = TX_TIMEOUT; 1427 ndev->watchdog_timeo = TX_TIMEOUT;
@@ -1264,13 +1434,10 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
1264 1434
1265 /* First device only init */ 1435 /* First device only init */
1266 if (!devno) { 1436 if (!devno) {
1267#if defined(ARSTR) 1437 if (mdp->cd->chip_reset)
1268 /* reset device */ 1438 mdp->cd->chip_reset(ndev);
1269 ctrl_outl(ARSTR_ARSTR, ARSTR);
1270 mdelay(1);
1271#endif
1272 1439
1273#if defined(SH_TSU_ADDR) 1440#if defined(SH_ETH_HAS_TSU)
1274 /* TSU init (Init only)*/ 1441 /* TSU init (Init only)*/
1275 sh_eth_tsu_init(SH_TSU_ADDR); 1442 sh_eth_tsu_init(SH_TSU_ADDR);
1276#endif 1443#endif
@@ -1287,8 +1454,8 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
1287 goto out_unregister; 1454 goto out_unregister;
1288 1455
1289 /* pritnt device infomation */ 1456 /* pritnt device infomation */
1290 printk(KERN_INFO "%s: %s at 0x%x, ", 1457 pr_info("Base address at 0x%x, ",
1291 ndev->name, CARDNAME, (u32) ndev->base_addr); 1458 (u32)ndev->base_addr);
1292 1459
1293 for (i = 0; i < 5; i++) 1460 for (i = 0; i < 5; i++)
1294 printk("%02X:", ndev->dev_addr[i]); 1461 printk("%02X:", ndev->dev_addr[i]);
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 1537e13e623d..9afe5b4c855d 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -2,7 +2,7 @@
2 * SuperH Ethernet device driver 2 * SuperH Ethernet device driver
3 * 3 *
4 * Copyright (C) 2006-2008 Nobuhiro Iwamatsu 4 * Copyright (C) 2006-2008 Nobuhiro Iwamatsu
5 * Copyright (C) 2008 Renesas Solutions Corp. 5 * Copyright (C) 2008-2009 Renesas Solutions Corp.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License, 8 * under the terms and conditions of the GNU General Public License,
@@ -39,12 +39,12 @@
39#define ETHERSMALL 60 39#define ETHERSMALL 60
40#define PKT_BUF_SZ 1538 40#define PKT_BUF_SZ 1538
41 41
42#ifdef CONFIG_CPU_SUBTYPE_SH7763 42#if defined(CONFIG_CPU_SUBTYPE_SH7763)
43/* This CPU register maps is very difference by other SH4 CPU */
43 44
44#define SH7763_SKB_ALIGN 32
45/* Chip Base Address */ 45/* Chip Base Address */
46# define SH_TSU_ADDR 0xFEE01800 46# define SH_TSU_ADDR 0xFEE01800
47# define ARSTR SH_TSU_ADDR 47# define ARSTR SH_TSU_ADDR
48 48
49/* Chip Registers */ 49/* Chip Registers */
50/* E-DMAC */ 50/* E-DMAC */
@@ -143,8 +143,60 @@
143# define FWNLCR1 0xB0 143# define FWNLCR1 0xB0
144# define FWALCR1 0x40 144# define FWALCR1 0x40
145 145
146#else /* CONFIG_CPU_SUBTYPE_SH7763 */ 146#elif defined(CONFIG_CPU_SH4) /* #if defined(CONFIG_CPU_SUBTYPE_SH7763) */
147# define RX_OFFSET 2 /* skb offset */ 147/* EtherC */
148#define ECMR 0x100
149#define RFLR 0x108
150#define ECSR 0x110
151#define ECSIPR 0x118
152#define PIR 0x120
153#define PSR 0x128
154#define RDMLR 0x140
155#define IPGR 0x150
156#define APR 0x154
157#define MPR 0x158
158#define TPAUSER 0x164
159#define RFCF 0x160
160#define TPAUSECR 0x168
161#define BCFRR 0x16c
162#define MAHR 0x1c0
163#define MALR 0x1c8
164#define TROCR 0x1d0
165#define CDCR 0x1d4
166#define LCCR 0x1d8
167#define CNDCR 0x1dc
168#define CEFCR 0x1e4
169#define FRECR 0x1e8
170#define TSFRCR 0x1ec
171#define TLFRCR 0x1f0
172#define RFCR 0x1f4
173#define MAFCR 0x1f8
174#define RTRATE 0x1fc
175
176/* E-DMAC */
177#define EDMR 0x000
178#define EDTRR 0x008
179#define EDRRR 0x010
180#define TDLAR 0x018
181#define RDLAR 0x020
182#define EESR 0x028
183#define EESIPR 0x030
184#define TRSCER 0x038
185#define RMFCR 0x040
186#define TFTR 0x048
187#define FDR 0x050
188#define RMCR 0x058
189#define TFUCR 0x064
190#define RFOCR 0x068
191#define FCFTR 0x070
192#define RPADIR 0x078
193#define TRIMD 0x07c
194#define RBWAR 0x0c8
195#define RDFAR 0x0cc
196#define TBRAR 0x0d4
197#define TDFAR 0x0d8
198#else /* #elif defined(CONFIG_CPU_SH4) */
199/* This section is SH3 or SH2 */
148#ifndef CONFIG_CPU_SUBTYPE_SH7619 200#ifndef CONFIG_CPU_SUBTYPE_SH7619
149/* Chip base address */ 201/* Chip base address */
150# define SH_TSU_ADDR 0xA7000804 202# define SH_TSU_ADDR 0xA7000804
@@ -243,6 +295,30 @@
243 295
244#endif /* CONFIG_CPU_SUBTYPE_SH7763 */ 296#endif /* CONFIG_CPU_SUBTYPE_SH7763 */
245 297
298/* There are avoid compile error... */
299#if !defined(BCULR)
300#define BCULR 0x0fc
301#endif
302#if !defined(TRIMD)
303#define TRIMD 0x0fc
304#endif
305#if !defined(APR)
306#define APR 0x0fc
307#endif
308#if !defined(MPR)
309#define MPR 0x0fc
310#endif
311#if !defined(TPAUSER)
312#define TPAUSER 0x0fc
313#endif
314
315/* Driver's parameters */
316#if defined(CONFIG_CPU_SH4)
317#define SH4_SKB_RX_ALIGN 32
318#else
319#define SH2_SH3_SKB_RX_ALIGN 2
320#endif
321
246/* 322/*
247 * Register's bits 323 * Register's bits
248 */ 324 */
@@ -261,11 +337,10 @@ enum GECMR_BIT {
261 337
262/* EDMR */ 338/* EDMR */
263enum DMAC_M_BIT { 339enum DMAC_M_BIT {
340 EDMR_EL = 0x40, /* Litte endian */
264 EDMR_DL1 = 0x20, EDMR_DL0 = 0x10, 341 EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,
265#ifdef CONFIG_CPU_SUBTYPE_SH7763 342#ifdef CONFIG_CPU_SUBTYPE_SH7763
266 EDMR_SRST = 0x03, 343 EDMR_SRST = 0x03,
267 EMDR_DESC_R = 0x30, /* Descriptor reserve size */
268 EDMR_EL = 0x40, /* Litte endian */
269#else /* CONFIG_CPU_SUBTYPE_SH7763 */ 344#else /* CONFIG_CPU_SUBTYPE_SH7763 */
270 EDMR_SRST = 0x01, 345 EDMR_SRST = 0x01,
271#endif 346#endif
@@ -307,47 +382,43 @@ enum PHY_STATUS_BIT { PHY_ST_LINK = 0x01, };
307 382
308/* EESR */ 383/* EESR */
309enum EESR_BIT { 384enum EESR_BIT {
310#ifndef CONFIG_CPU_SUBTYPE_SH7763 385 EESR_TWB1 = 0x80000000,
311 EESR_TWB = 0x40000000, 386 EESR_TWB = 0x40000000, /* same as TWB0 */
312#else 387 EESR_TC1 = 0x20000000,
313 EESR_TWB = 0xC0000000, 388 EESR_TUC = 0x10000000,
314 EESR_TC1 = 0x20000000, 389 EESR_ROC = 0x08000000,
315 EESR_TUC = 0x10000000, 390 EESR_TABT = 0x04000000,
316 EESR_ROC = 0x80000000, 391 EESR_RABT = 0x02000000,
317#endif 392 EESR_RFRMER = 0x01000000, /* same as RFCOF */
318 EESR_TABT = 0x04000000, 393 EESR_ADE = 0x00800000,
319 EESR_RABT = 0x02000000, EESR_RFRMER = 0x01000000, 394 EESR_ECI = 0x00400000,
320#ifndef CONFIG_CPU_SUBTYPE_SH7763 395 EESR_FTC = 0x00200000, /* same as TC or TC0 */
321 EESR_ADE = 0x00800000, 396 EESR_TDE = 0x00100000,
322#endif 397 EESR_TFE = 0x00080000, /* same as TFUF */
323 EESR_ECI = 0x00400000, 398 EESR_FRC = 0x00040000, /* same as FR */
324 EESR_FTC = 0x00200000, EESR_TDE = 0x00100000, 399 EESR_RDE = 0x00020000,
325 EESR_TFE = 0x00080000, EESR_FRC = 0x00040000, 400 EESR_RFE = 0x00010000,
326 EESR_RDE = 0x00020000, EESR_RFE = 0x00010000, 401 EESR_CND = 0x00000800,
327#ifndef CONFIG_CPU_SUBTYPE_SH7763 402 EESR_DLC = 0x00000400,
328 EESR_CND = 0x00000800, 403 EESR_CD = 0x00000200,
329#endif 404 EESR_RTO = 0x00000100,
330 EESR_DLC = 0x00000400, 405 EESR_RMAF = 0x00000080,
331 EESR_CD = 0x00000200, EESR_RTO = 0x00000100, 406 EESR_CEEF = 0x00000040,
332 EESR_RMAF = 0x00000080, EESR_CEEF = 0x00000040, 407 EESR_CELF = 0x00000020,
333 EESR_CELF = 0x00000020, EESR_RRF = 0x00000010, 408 EESR_RRF = 0x00000010,
334 EESR_RTLF = 0x00000008, EESR_RTSF = 0x00000004, 409 EESR_RTLF = 0x00000008,
335 EESR_PRE = 0x00000002, EESR_CERF = 0x00000001, 410 EESR_RTSF = 0x00000004,
336}; 411 EESR_PRE = 0x00000002,
337 412 EESR_CERF = 0x00000001,
338 413};
339#ifdef CONFIG_CPU_SUBTYPE_SH7763 414
340# define TX_CHECK (EESR_TC1 | EESR_FTC) 415#define DEFAULT_TX_CHECK (EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | \
341# define EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE \ 416 EESR_RTO)
342 | EESR_RFRMER | EESR_TFE | EESR_TDE | EESR_ECI) 417#define DEFAULT_EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | \
343# define TX_ERROR_CEHCK (EESR_TWB | EESR_TABT | EESR_TDE | EESR_TFE) 418 EESR_RDE | EESR_RFRMER | EESR_ADE | \
344 419 EESR_TFE | EESR_TDE | EESR_ECI)
345#else 420#define DEFAULT_TX_ERROR_CHECK (EESR_TWB | EESR_TABT | EESR_ADE | EESR_TDE | \
346# define TX_CHECK (EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO) 421 EESR_TFE)
347# define EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE \
348 | EESR_RFRMER | EESR_ADE | EESR_TFE | EESR_TDE | EESR_ECI)
349# define TX_ERROR_CEHCK (EESR_TWB | EESR_TABT | EESR_ADE | EESR_TDE | EESR_TFE)
350#endif
351 422
352/* EESIPR */ 423/* EESIPR */
353enum DMAC_IM_BIT { 424enum DMAC_IM_BIT {
@@ -386,12 +457,8 @@ enum FCFTR_BIT {
386 FCFTR_RFF0 = 0x00010000, FCFTR_RFD2 = 0x00000004, 457 FCFTR_RFF0 = 0x00010000, FCFTR_RFD2 = 0x00000004,
387 FCFTR_RFD1 = 0x00000002, FCFTR_RFD0 = 0x00000001, 458 FCFTR_RFD1 = 0x00000002, FCFTR_RFD0 = 0x00000001,
388}; 459};
389#define FIFO_F_D_RFF (FCFTR_RFF2|FCFTR_RFF1|FCFTR_RFF0) 460#define DEFAULT_FIFO_F_D_RFF (FCFTR_RFF2 | FCFTR_RFF1 | FCFTR_RFF0)
390#ifndef CONFIG_CPU_SUBTYPE_SH7619 461#define DEFAULT_FIFO_F_D_RFD (FCFTR_RFD2 | FCFTR_RFD1 | FCFTR_RFD0)
391#define FIFO_F_D_RFD (FCFTR_RFD2|FCFTR_RFD1|FCFTR_RFD0)
392#else
393#define FIFO_F_D_RFD (FCFTR_RFD0)
394#endif
395 462
396/* Transfer descriptor bit */ 463/* Transfer descriptor bit */
397enum TD_STS_BIT { 464enum TD_STS_BIT {
@@ -404,60 +471,38 @@ enum TD_STS_BIT {
404#define TD_TFP (TD_TFP1|TD_TFP0) 471#define TD_TFP (TD_TFP1|TD_TFP0)
405 472
406/* RMCR */ 473/* RMCR */
407enum RECV_RST_BIT { RMCR_RST = 0x01, }; 474#define DEFAULT_RMCR_VALUE 0x00000000
475
408/* ECMR */ 476/* ECMR */
409enum FELIC_MODE_BIT { 477enum FELIC_MODE_BIT {
410#ifdef CONFIG_CPU_SUBTYPE_SH7763
411 ECMR_TRCCM = 0x04000000, ECMR_RCSC = 0x00800000, 478 ECMR_TRCCM = 0x04000000, ECMR_RCSC = 0x00800000,
412 ECMR_DPAD = 0x00200000, ECMR_RZPF = 0x00100000, 479 ECMR_DPAD = 0x00200000, ECMR_RZPF = 0x00100000,
413#endif
414 ECMR_ZPF = 0x00080000, ECMR_PFR = 0x00040000, ECMR_RXF = 0x00020000, 480 ECMR_ZPF = 0x00080000, ECMR_PFR = 0x00040000, ECMR_RXF = 0x00020000,
415 ECMR_TXF = 0x00010000, ECMR_MCT = 0x00002000, ECMR_PRCEF = 0x00001000, 481 ECMR_TXF = 0x00010000, ECMR_MCT = 0x00002000, ECMR_PRCEF = 0x00001000,
416 ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020, 482 ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020,
417 ECMR_ILB = 0x00000008, ECMR_ELB = 0x00000004, ECMR_DM = 0x00000002, 483 ECMR_RTM = 0x00000010, ECMR_ILB = 0x00000008, ECMR_ELB = 0x00000004,
418 ECMR_PRM = 0x00000001, 484 ECMR_DM = 0x00000002, ECMR_PRM = 0x00000001,
419}; 485};
420 486
421#ifdef CONFIG_CPU_SUBTYPE_SH7763
422#define ECMR_CHG_DM (ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF |\
423 ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT)
424#elif CONFIG_CPU_SUBTYPE_SH7619
425#define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF)
426#else
427#define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT)
428#endif
429
430/* ECSR */ 487/* ECSR */
431enum ECSR_STATUS_BIT { 488enum ECSR_STATUS_BIT {
432#ifndef CONFIG_CPU_SUBTYPE_SH7763
433 ECSR_BRCRX = 0x20, ECSR_PSRTO = 0x10, 489 ECSR_BRCRX = 0x20, ECSR_PSRTO = 0x10,
434#endif
435 ECSR_LCHNG = 0x04, 490 ECSR_LCHNG = 0x04,
436 ECSR_MPD = 0x02, ECSR_ICD = 0x01, 491 ECSR_MPD = 0x02, ECSR_ICD = 0x01,
437}; 492};
438 493
439#ifdef CONFIG_CPU_SUBTYPE_SH7763 494#define DEFAULT_ECSR_INIT (ECSR_BRCRX | ECSR_PSRTO | ECSR_LCHNG | \
440# define ECSR_INIT (ECSR_ICD | ECSIPR_MPDIP) 495 ECSR_ICD | ECSIPR_MPDIP)
441#else
442# define ECSR_INIT (ECSR_BRCRX | ECSR_PSRTO | \
443 ECSR_LCHNG | ECSR_ICD | ECSIPR_MPDIP)
444#endif
445 496
446/* ECSIPR */ 497/* ECSIPR */
447enum ECSIPR_STATUS_MASK_BIT { 498enum ECSIPR_STATUS_MASK_BIT {
448#ifndef CONFIG_CPU_SUBTYPE_SH7763
449 ECSIPR_BRCRXIP = 0x20, ECSIPR_PSRTOIP = 0x10, 499 ECSIPR_BRCRXIP = 0x20, ECSIPR_PSRTOIP = 0x10,
450#endif
451 ECSIPR_LCHNGIP = 0x04, 500 ECSIPR_LCHNGIP = 0x04,
452 ECSIPR_MPDIP = 0x02, ECSIPR_ICDIP = 0x01, 501 ECSIPR_MPDIP = 0x02, ECSIPR_ICDIP = 0x01,
453}; 502};
454 503
455#ifdef CONFIG_CPU_SUBTYPE_SH7763 504#define DEFAULT_ECSIPR_INIT (ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | \
456# define ECSIPR_INIT (ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP) 505 ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP)
457#else
458# define ECSIPR_INIT (ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | \
459 ECSIPR_ICDIP | ECSIPR_MPDIP)
460#endif
461 506
462/* APR */ 507/* APR */
463enum APR_BIT { 508enum APR_BIT {
@@ -483,23 +528,12 @@ enum RPADIR_BIT {
483 RPADIR_PADR = 0x0003f, 528 RPADIR_PADR = 0x0003f,
484}; 529};
485 530
486#if defined(CONFIG_CPU_SUBTYPE_SH7763)
487# define RPADIR_INIT (0x00)
488#else
489# define RPADIR_INIT (RPADIR_PADS1)
490#endif
491
492/* RFLR */ 531/* RFLR */
493#define RFLR_VALUE 0x1000 532#define RFLR_VALUE 0x1000
494 533
495/* FDR */ 534/* FDR */
496enum FIFO_SIZE_BIT { 535#define DEFAULT_FDR_INIT 0x00000707
497#ifndef CONFIG_CPU_SUBTYPE_SH7619 536
498 FIFO_SIZE_T = 0x00000700, FIFO_SIZE_R = 0x00000007,
499#else
500 FIFO_SIZE_T = 0x00000100, FIFO_SIZE_R = 0x00000001,
501#endif
502};
503enum phy_offsets { 537enum phy_offsets {
504 PHY_CTRL = 0, PHY_STAT = 1, PHY_IDT1 = 2, PHY_IDT2 = 3, 538 PHY_CTRL = 0, PHY_STAT = 1, PHY_IDT1 = 2, PHY_IDT2 = 3,
505 PHY_ANA = 4, PHY_ANL = 5, PHY_ANE = 6, 539 PHY_ANA = 4, PHY_ANL = 5, PHY_ANE = 6,
@@ -633,7 +667,43 @@ struct sh_eth_rxdesc {
633 u32 pad0; /* padding data */ 667 u32 pad0; /* padding data */
634} __attribute__((aligned(2), packed)); 668} __attribute__((aligned(2), packed));
635 669
670/* This structure is used by each CPU dependency handling. */
671struct sh_eth_cpu_data {
672 /* optional functions */
673 void (*chip_reset)(struct net_device *ndev);
674 void (*set_duplex)(struct net_device *ndev);
675 void (*set_rate)(struct net_device *ndev);
676
677 /* mandatory initialize value */
678 unsigned long eesipr_value;
679
680 /* optional initialize value */
681 unsigned long ecsr_value;
682 unsigned long ecsipr_value;
683 unsigned long fdr_value;
684 unsigned long fcftr_value;
685 unsigned long rpadir_value;
686 unsigned long rmcr_value;
687
688 /* interrupt checking mask */
689 unsigned long tx_check;
690 unsigned long eesr_err_check;
691 unsigned long tx_error_check;
692
693 /* hardware features */
694 unsigned no_psr:1; /* EtherC DO NOT have PSR */
695 unsigned apr:1; /* EtherC have APR */
696 unsigned mpr:1; /* EtherC have MPR */
697 unsigned tpauser:1; /* EtherC have TPAUSER */
698 unsigned bculr:1; /* EtherC have BCULR */
699 unsigned hw_swap:1; /* E-DMAC have DE bit in EDMR */
700 unsigned rpadir:1; /* E-DMAC have RPADIR */
701 unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */
702 unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */
703};
704
636struct sh_eth_private { 705struct sh_eth_private {
706 struct sh_eth_cpu_data *cd;
637 dma_addr_t rx_desc_dma; 707 dma_addr_t rx_desc_dma;
638 dma_addr_t tx_desc_dma; 708 dma_addr_t tx_desc_dma;
639 struct sh_eth_rxdesc *rx_ring; 709 struct sh_eth_rxdesc *rx_ring;
@@ -661,11 +731,7 @@ struct sh_eth_private {
661 struct net_device_stats tsu_stats; /* TSU forward status */ 731 struct net_device_stats tsu_stats; /* TSU forward status */
662}; 732};
663 733
664#ifdef CONFIG_CPU_SUBTYPE_SH7763 734static inline void sh_eth_soft_swap(char *src, int len)
665/* SH7763 has endian control register */
666#define swaps(x, y)
667#else
668static void swaps(char *src, int len)
669{ 735{
670#ifdef __LITTLE_ENDIAN__ 736#ifdef __LITTLE_ENDIAN__
671 u32 *p = (u32 *)src; 737 u32 *p = (u32 *)src;
@@ -676,5 +742,5 @@ static void swaps(char *src, int len)
676 *p = swab32(*p); 742 *p = swab32(*p);
677#endif 743#endif
678} 744}
679#endif /* CONFIG_CPU_SUBTYPE_SH7763 */ 745
680#endif 746#endif /* #ifndef __SH_ETH_H__ */
diff --git a/drivers/net/sis190.c b/drivers/net/sis190.c
index 55ccd51d247e..13b8ca41d571 100644
--- a/drivers/net/sis190.c
+++ b/drivers/net/sis190.c
@@ -1204,8 +1204,6 @@ static int sis190_start_xmit(struct sk_buff *skb, struct net_device *dev)
1204 1204
1205 SIS_W32(TxControl, 0x1a00 | CmdReset | CmdTxEnb); 1205 SIS_W32(TxControl, 0x1a00 | CmdReset | CmdTxEnb);
1206 1206
1207 dev->trans_start = jiffies;
1208
1209 dirty_tx = tp->dirty_tx; 1207 dirty_tx = tp->dirty_tx;
1210 if ((tp->cur_tx - NUM_TX_DESC) == dirty_tx) { 1208 if ((tp->cur_tx - NUM_TX_DESC) == dirty_tx) {
1211 netif_stop_queue(dev); 1209 netif_stop_queue(dev);
diff --git a/drivers/net/skfp/skfddi.c b/drivers/net/skfp/skfddi.c
index e14aec0a7333..19d343c42a21 100644
--- a/drivers/net/skfp/skfddi.c
+++ b/drivers/net/skfp/skfddi.c
@@ -159,12 +159,6 @@ MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
159 159
160static int num_boards; /* total number of adapters configured */ 160static int num_boards; /* total number of adapters configured */
161 161
162#ifdef DRIVERDEBUG
163#define PRINTK(s, args...) printk(s, ## args)
164#else
165#define PRINTK(s, args...)
166#endif // DRIVERDEBUG
167
168static const struct net_device_ops skfp_netdev_ops = { 162static const struct net_device_ops skfp_netdev_ops = {
169 .ndo_open = skfp_open, 163 .ndo_open = skfp_open,
170 .ndo_stop = skfp_close, 164 .ndo_stop = skfp_close,
@@ -213,7 +207,7 @@ static int skfp_init_one(struct pci_dev *pdev,
213 void __iomem *mem; 207 void __iomem *mem;
214 int err; 208 int err;
215 209
216 PRINTK(KERN_INFO "entering skfp_init_one\n"); 210 pr_debug(KERN_INFO "entering skfp_init_one\n");
217 211
218 if (num_boards == 0) 212 if (num_boards == 0)
219 printk("%s\n", boot_msg); 213 printk("%s\n", boot_msg);
@@ -389,7 +383,7 @@ static int skfp_driver_init(struct net_device *dev)
389 skfddi_priv *bp = &smc->os; 383 skfddi_priv *bp = &smc->os;
390 int err = -EIO; 384 int err = -EIO;
391 385
392 PRINTK(KERN_INFO "entering skfp_driver_init\n"); 386 pr_debug(KERN_INFO "entering skfp_driver_init\n");
393 387
394 // set the io address in private structures 388 // set the io address in private structures
395 bp->base_addr = dev->base_addr; 389 bp->base_addr = dev->base_addr;
@@ -409,7 +403,7 @@ static int skfp_driver_init(struct net_device *dev)
409 403
410 // Determine the required size of the 'shared' memory area. 404 // Determine the required size of the 'shared' memory area.
411 bp->SharedMemSize = mac_drv_check_space(); 405 bp->SharedMemSize = mac_drv_check_space();
412 PRINTK(KERN_INFO "Memory for HWM: %ld\n", bp->SharedMemSize); 406 pr_debug(KERN_INFO "Memory for HWM: %ld\n", bp->SharedMemSize);
413 if (bp->SharedMemSize > 0) { 407 if (bp->SharedMemSize > 0) {
414 bp->SharedMemSize += 16; // for descriptor alignment 408 bp->SharedMemSize += 16; // for descriptor alignment
415 409
@@ -433,13 +427,13 @@ static int skfp_driver_init(struct net_device *dev)
433 427
434 card_stop(smc); // Reset adapter. 428 card_stop(smc); // Reset adapter.
435 429
436 PRINTK(KERN_INFO "mac_drv_init()..\n"); 430 pr_debug(KERN_INFO "mac_drv_init()..\n");
437 if (mac_drv_init(smc) != 0) { 431 if (mac_drv_init(smc) != 0) {
438 PRINTK(KERN_INFO "mac_drv_init() failed.\n"); 432 pr_debug(KERN_INFO "mac_drv_init() failed.\n");
439 goto fail; 433 goto fail;
440 } 434 }
441 read_address(smc, NULL); 435 read_address(smc, NULL);
442 PRINTK(KERN_INFO "HW-Addr: %02x %02x %02x %02x %02x %02x\n", 436 pr_debug(KERN_INFO "HW-Addr: %02x %02x %02x %02x %02x %02x\n",
443 smc->hw.fddi_canon_addr.a[0], 437 smc->hw.fddi_canon_addr.a[0],
444 smc->hw.fddi_canon_addr.a[1], 438 smc->hw.fddi_canon_addr.a[1],
445 smc->hw.fddi_canon_addr.a[2], 439 smc->hw.fddi_canon_addr.a[2],
@@ -495,7 +489,7 @@ static int skfp_open(struct net_device *dev)
495 struct s_smc *smc = netdev_priv(dev); 489 struct s_smc *smc = netdev_priv(dev);
496 int err; 490 int err;
497 491
498 PRINTK(KERN_INFO "entering skfp_open\n"); 492 pr_debug(KERN_INFO "entering skfp_open\n");
499 /* Register IRQ - support shared interrupts by passing device ptr */ 493 /* Register IRQ - support shared interrupts by passing device ptr */
500 err = request_irq(dev->irq, skfp_interrupt, IRQF_SHARED, 494 err = request_irq(dev->irq, skfp_interrupt, IRQF_SHARED,
501 dev->name, dev); 495 dev->name, dev);
@@ -868,12 +862,12 @@ static void skfp_ctl_set_multicast_list_wo_lock(struct net_device *dev)
868 /* Enable promiscuous mode, if necessary */ 862 /* Enable promiscuous mode, if necessary */
869 if (dev->flags & IFF_PROMISC) { 863 if (dev->flags & IFF_PROMISC) {
870 mac_drv_rx_mode(smc, RX_ENABLE_PROMISC); 864 mac_drv_rx_mode(smc, RX_ENABLE_PROMISC);
871 PRINTK(KERN_INFO "PROMISCUOUS MODE ENABLED\n"); 865 pr_debug(KERN_INFO "PROMISCUOUS MODE ENABLED\n");
872 } 866 }
873 /* Else, update multicast address table */ 867 /* Else, update multicast address table */
874 else { 868 else {
875 mac_drv_rx_mode(smc, RX_DISABLE_PROMISC); 869 mac_drv_rx_mode(smc, RX_DISABLE_PROMISC);
876 PRINTK(KERN_INFO "PROMISCUOUS MODE DISABLED\n"); 870 pr_debug(KERN_INFO "PROMISCUOUS MODE DISABLED\n");
877 871
878 // Reset all MC addresses 872 // Reset all MC addresses
879 mac_clear_multicast(smc); 873 mac_clear_multicast(smc);
@@ -881,7 +875,7 @@ static void skfp_ctl_set_multicast_list_wo_lock(struct net_device *dev)
881 875
882 if (dev->flags & IFF_ALLMULTI) { 876 if (dev->flags & IFF_ALLMULTI) {
883 mac_drv_rx_mode(smc, RX_ENABLE_ALLMULTI); 877 mac_drv_rx_mode(smc, RX_ENABLE_ALLMULTI);
884 PRINTK(KERN_INFO "ENABLE ALL MC ADDRESSES\n"); 878 pr_debug(KERN_INFO "ENABLE ALL MC ADDRESSES\n");
885 } else if (dev->mc_count > 0) { 879 } else if (dev->mc_count > 0) {
886 if (dev->mc_count <= FPMAX_MULTICAST) { 880 if (dev->mc_count <= FPMAX_MULTICAST) {
887 /* use exact filtering */ 881 /* use exact filtering */
@@ -894,12 +888,12 @@ static void skfp_ctl_set_multicast_list_wo_lock(struct net_device *dev)
894 (struct fddi_addr *)dmi->dmi_addr, 888 (struct fddi_addr *)dmi->dmi_addr,
895 1); 889 1);
896 890
897 PRINTK(KERN_INFO "ENABLE MC ADDRESS:"); 891 pr_debug(KERN_INFO "ENABLE MC ADDRESS:");
898 PRINTK(" %02x %02x %02x ", 892 pr_debug(" %02x %02x %02x ",
899 dmi->dmi_addr[0], 893 dmi->dmi_addr[0],
900 dmi->dmi_addr[1], 894 dmi->dmi_addr[1],
901 dmi->dmi_addr[2]); 895 dmi->dmi_addr[2]);
902 PRINTK("%02x %02x %02x\n", 896 pr_debug("%02x %02x %02x\n",
903 dmi->dmi_addr[3], 897 dmi->dmi_addr[3],
904 dmi->dmi_addr[4], 898 dmi->dmi_addr[4],
905 dmi->dmi_addr[5]); 899 dmi->dmi_addr[5]);
@@ -909,11 +903,11 @@ static void skfp_ctl_set_multicast_list_wo_lock(struct net_device *dev)
909 } else { // more MC addresses than HW supports 903 } else { // more MC addresses than HW supports
910 904
911 mac_drv_rx_mode(smc, RX_ENABLE_ALLMULTI); 905 mac_drv_rx_mode(smc, RX_ENABLE_ALLMULTI);
912 PRINTK(KERN_INFO "ENABLE ALL MC ADDRESSES\n"); 906 pr_debug(KERN_INFO "ENABLE ALL MC ADDRESSES\n");
913 } 907 }
914 } else { // no MC addresses 908 } else { // no MC addresses
915 909
916 PRINTK(KERN_INFO "DISABLE ALL MC ADDRESSES\n"); 910 pr_debug(KERN_INFO "DISABLE ALL MC ADDRESSES\n");
917 } 911 }
918 912
919 /* Update adapter filters */ 913 /* Update adapter filters */
@@ -1067,7 +1061,7 @@ static int skfp_send_pkt(struct sk_buff *skb, struct net_device *dev)
1067 struct s_smc *smc = netdev_priv(dev); 1061 struct s_smc *smc = netdev_priv(dev);
1068 skfddi_priv *bp = &smc->os; 1062 skfddi_priv *bp = &smc->os;
1069 1063
1070 PRINTK(KERN_INFO "skfp_send_pkt\n"); 1064 pr_debug(KERN_INFO "skfp_send_pkt\n");
1071 1065
1072 /* 1066 /*
1073 * Verify that incoming transmit request is OK 1067 * Verify that incoming transmit request is OK
@@ -1137,13 +1131,13 @@ static void send_queued_packets(struct s_smc *smc)
1137 1131
1138 int frame_status; // HWM tx frame status. 1132 int frame_status; // HWM tx frame status.
1139 1133
1140 PRINTK(KERN_INFO "send queued packets\n"); 1134 pr_debug(KERN_INFO "send queued packets\n");
1141 for (;;) { 1135 for (;;) {
1142 // send first buffer from queue 1136 // send first buffer from queue
1143 skb = skb_dequeue(&bp->SendSkbQueue); 1137 skb = skb_dequeue(&bp->SendSkbQueue);
1144 1138
1145 if (!skb) { 1139 if (!skb) {
1146 PRINTK(KERN_INFO "queue empty\n"); 1140 pr_debug(KERN_INFO "queue empty\n");
1147 return; 1141 return;
1148 } // queue empty ! 1142 } // queue empty !
1149 1143
@@ -1174,11 +1168,11 @@ static void send_queued_packets(struct s_smc *smc)
1174 1168
1175 if ((frame_status & RING_DOWN) != 0) { 1169 if ((frame_status & RING_DOWN) != 0) {
1176 // Ring is down. 1170 // Ring is down.
1177 PRINTK("Tx attempt while ring down.\n"); 1171 pr_debug("Tx attempt while ring down.\n");
1178 } else if ((frame_status & OUT_OF_TXD) != 0) { 1172 } else if ((frame_status & OUT_OF_TXD) != 0) {
1179 PRINTK("%s: out of TXDs.\n", bp->dev->name); 1173 pr_debug("%s: out of TXDs.\n", bp->dev->name);
1180 } else { 1174 } else {
1181 PRINTK("%s: out of transmit resources", 1175 pr_debug("%s: out of transmit resources",
1182 bp->dev->name); 1176 bp->dev->name);
1183 } 1177 }
1184 1178
@@ -1255,7 +1249,7 @@ static void CheckSourceAddress(unsigned char *frame, unsigned char *hw_addr)
1255static void ResetAdapter(struct s_smc *smc) 1249static void ResetAdapter(struct s_smc *smc)
1256{ 1250{
1257 1251
1258 PRINTK(KERN_INFO "[fddi: ResetAdapter]\n"); 1252 pr_debug(KERN_INFO "[fddi: ResetAdapter]\n");
1259 1253
1260 // Stop the adapter. 1254 // Stop the adapter.
1261 1255
@@ -1301,7 +1295,7 @@ void llc_restart_tx(struct s_smc *smc)
1301{ 1295{
1302 skfddi_priv *bp = &smc->os; 1296 skfddi_priv *bp = &smc->os;
1303 1297
1304 PRINTK(KERN_INFO "[llc_restart_tx]\n"); 1298 pr_debug(KERN_INFO "[llc_restart_tx]\n");
1305 1299
1306 // Try to send queued packets 1300 // Try to send queued packets
1307 spin_unlock(&bp->DriverLock); 1301 spin_unlock(&bp->DriverLock);
@@ -1331,7 +1325,7 @@ void *mac_drv_get_space(struct s_smc *smc, unsigned int size)
1331{ 1325{
1332 void *virt; 1326 void *virt;
1333 1327
1334 PRINTK(KERN_INFO "mac_drv_get_space (%d bytes), ", size); 1328 pr_debug(KERN_INFO "mac_drv_get_space (%d bytes), ", size);
1335 virt = (void *) (smc->os.SharedMemAddr + smc->os.SharedMemHeap); 1329 virt = (void *) (smc->os.SharedMemAddr + smc->os.SharedMemHeap);
1336 1330
1337 if ((smc->os.SharedMemHeap + size) > smc->os.SharedMemSize) { 1331 if ((smc->os.SharedMemHeap + size) > smc->os.SharedMemSize) {
@@ -1340,9 +1334,9 @@ void *mac_drv_get_space(struct s_smc *smc, unsigned int size)
1340 } 1334 }
1341 smc->os.SharedMemHeap += size; // Move heap pointer. 1335 smc->os.SharedMemHeap += size; // Move heap pointer.
1342 1336
1343 PRINTK(KERN_INFO "mac_drv_get_space end\n"); 1337 pr_debug(KERN_INFO "mac_drv_get_space end\n");
1344 PRINTK(KERN_INFO "virt addr: %lx\n", (ulong) virt); 1338 pr_debug(KERN_INFO "virt addr: %lx\n", (ulong) virt);
1345 PRINTK(KERN_INFO "bus addr: %lx\n", (ulong) 1339 pr_debug(KERN_INFO "bus addr: %lx\n", (ulong)
1346 (smc->os.SharedMemDMA + 1340 (smc->os.SharedMemDMA +
1347 ((char *) virt - (char *)smc->os.SharedMemAddr))); 1341 ((char *) virt - (char *)smc->os.SharedMemAddr)));
1348 return (virt); 1342 return (virt);
@@ -1372,7 +1366,7 @@ void *mac_drv_get_desc_mem(struct s_smc *smc, unsigned int size)
1372 1366
1373 char *virt; 1367 char *virt;
1374 1368
1375 PRINTK(KERN_INFO "mac_drv_get_desc_mem\n"); 1369 pr_debug(KERN_INFO "mac_drv_get_desc_mem\n");
1376 1370
1377 // Descriptor memory must be aligned on 16-byte boundary. 1371 // Descriptor memory must be aligned on 16-byte boundary.
1378 1372
@@ -1381,8 +1375,8 @@ void *mac_drv_get_desc_mem(struct s_smc *smc, unsigned int size)
1381 size = (u_int) (16 - (((unsigned long) virt) & 15UL)); 1375 size = (u_int) (16 - (((unsigned long) virt) & 15UL));
1382 size = size % 16; 1376 size = size % 16;
1383 1377
1384 PRINTK("Allocate %u bytes alignment gap ", size); 1378 pr_debug("Allocate %u bytes alignment gap ", size);
1385 PRINTK("for descriptor memory.\n"); 1379 pr_debug("for descriptor memory.\n");
1386 1380
1387 if (!mac_drv_get_space(smc, size)) { 1381 if (!mac_drv_get_space(smc, size)) {
1388 printk("fddi: Unable to align descriptor memory.\n"); 1382 printk("fddi: Unable to align descriptor memory.\n");
@@ -1516,11 +1510,11 @@ void mac_drv_tx_complete(struct s_smc *smc, volatile struct s_smt_fp_txd *txd)
1516{ 1510{
1517 struct sk_buff *skb; 1511 struct sk_buff *skb;
1518 1512
1519 PRINTK(KERN_INFO "entering mac_drv_tx_complete\n"); 1513 pr_debug(KERN_INFO "entering mac_drv_tx_complete\n");
1520 // Check if this TxD points to a skb 1514 // Check if this TxD points to a skb
1521 1515
1522 if (!(skb = txd->txd_os.skb)) { 1516 if (!(skb = txd->txd_os.skb)) {
1523 PRINTK("TXD with no skb assigned.\n"); 1517 pr_debug("TXD with no skb assigned.\n");
1524 return; 1518 return;
1525 } 1519 }
1526 txd->txd_os.skb = NULL; 1520 txd->txd_os.skb = NULL;
@@ -1536,7 +1530,7 @@ void mac_drv_tx_complete(struct s_smc *smc, volatile struct s_smt_fp_txd *txd)
1536 // free the skb 1530 // free the skb
1537 dev_kfree_skb_irq(skb); 1531 dev_kfree_skb_irq(skb);
1538 1532
1539 PRINTK(KERN_INFO "leaving mac_drv_tx_complete\n"); 1533 pr_debug(KERN_INFO "leaving mac_drv_tx_complete\n");
1540} // mac_drv_tx_complete 1534} // mac_drv_tx_complete
1541 1535
1542 1536
@@ -1603,7 +1597,7 @@ void mac_drv_rx_complete(struct s_smc *smc, volatile struct s_smt_fp_rxd *rxd,
1603 unsigned short ri; 1597 unsigned short ri;
1604 u_int RifLength; 1598 u_int RifLength;
1605 1599
1606 PRINTK(KERN_INFO "entering mac_drv_rx_complete (len=%d)\n", len); 1600 pr_debug(KERN_INFO "entering mac_drv_rx_complete (len=%d)\n", len);
1607 if (frag_count != 1) { // This is not allowed to happen. 1601 if (frag_count != 1) { // This is not allowed to happen.
1608 1602
1609 printk("fddi: Multi-fragment receive!\n"); 1603 printk("fddi: Multi-fragment receive!\n");
@@ -1612,7 +1606,7 @@ void mac_drv_rx_complete(struct s_smc *smc, volatile struct s_smt_fp_rxd *rxd,
1612 } 1606 }
1613 skb = rxd->rxd_os.skb; 1607 skb = rxd->rxd_os.skb;
1614 if (!skb) { 1608 if (!skb) {
1615 PRINTK(KERN_INFO "No skb in rxd\n"); 1609 pr_debug(KERN_INFO "No skb in rxd\n");
1616 smc->os.MacStat.gen.rx_errors++; 1610 smc->os.MacStat.gen.rx_errors++;
1617 goto RequeueRxd; 1611 goto RequeueRxd;
1618 } 1612 }
@@ -1642,7 +1636,7 @@ void mac_drv_rx_complete(struct s_smc *smc, volatile struct s_smt_fp_rxd *rxd,
1642 else { 1636 else {
1643 int n; 1637 int n;
1644// goos: RIF removal has still to be tested 1638// goos: RIF removal has still to be tested
1645 PRINTK(KERN_INFO "RIF found\n"); 1639 pr_debug(KERN_INFO "RIF found\n");
1646 // Get RIF length from Routing Control (RC) field. 1640 // Get RIF length from Routing Control (RC) field.
1647 cp = virt + FDDI_MAC_HDR_LEN; // Point behind MAC header. 1641 cp = virt + FDDI_MAC_HDR_LEN; // Point behind MAC header.
1648 1642
@@ -1687,7 +1681,7 @@ void mac_drv_rx_complete(struct s_smc *smc, volatile struct s_smt_fp_rxd *rxd,
1687 return; 1681 return;
1688 1682
1689 RequeueRxd: 1683 RequeueRxd:
1690 PRINTK(KERN_INFO "Rx: re-queue RXD.\n"); 1684 pr_debug(KERN_INFO "Rx: re-queue RXD.\n");
1691 mac_drv_requeue_rxd(smc, rxd, frag_count); 1685 mac_drv_requeue_rxd(smc, rxd, frag_count);
1692 smc->os.MacStat.gen.rx_errors++; // Count receive packets 1686 smc->os.MacStat.gen.rx_errors++; // Count receive packets
1693 // not indicated. 1687 // not indicated.
@@ -1736,7 +1730,7 @@ void mac_drv_requeue_rxd(struct s_smc *smc, volatile struct s_smt_fp_rxd *rxd,
1736 skb = src_rxd->rxd_os.skb; 1730 skb = src_rxd->rxd_os.skb;
1737 if (skb == NULL) { // this should not happen 1731 if (skb == NULL) { // this should not happen
1738 1732
1739 PRINTK("Requeue with no skb in rxd!\n"); 1733 pr_debug("Requeue with no skb in rxd!\n");
1740 skb = alloc_skb(MaxFrameSize + 3, GFP_ATOMIC); 1734 skb = alloc_skb(MaxFrameSize + 3, GFP_ATOMIC);
1741 if (skb) { 1735 if (skb) {
1742 // we got a skb 1736 // we got a skb
@@ -1751,7 +1745,7 @@ void mac_drv_requeue_rxd(struct s_smc *smc, volatile struct s_smt_fp_rxd *rxd,
1751 rxd->rxd_os.dma_addr = b_addr; 1745 rxd->rxd_os.dma_addr = b_addr;
1752 } else { 1746 } else {
1753 // no skb available, use local buffer 1747 // no skb available, use local buffer
1754 PRINTK("Queueing invalid buffer!\n"); 1748 pr_debug("Queueing invalid buffer!\n");
1755 rxd->rxd_os.skb = NULL; 1749 rxd->rxd_os.skb = NULL;
1756 v_addr = smc->os.LocalRxBuffer; 1750 v_addr = smc->os.LocalRxBuffer;
1757 b_addr = smc->os.LocalRxBufferDMA; 1751 b_addr = smc->os.LocalRxBufferDMA;
@@ -1798,7 +1792,7 @@ void mac_drv_fill_rxd(struct s_smc *smc)
1798 struct sk_buff *skb; 1792 struct sk_buff *skb;
1799 volatile struct s_smt_fp_rxd *rxd; 1793 volatile struct s_smt_fp_rxd *rxd;
1800 1794
1801 PRINTK(KERN_INFO "entering mac_drv_fill_rxd\n"); 1795 pr_debug(KERN_INFO "entering mac_drv_fill_rxd\n");
1802 1796
1803 // Walk through the list of free receive buffers, passing receive 1797 // Walk through the list of free receive buffers, passing receive
1804 // buffers to the HWM as long as RXDs are available. 1798 // buffers to the HWM as long as RXDs are available.
@@ -1806,7 +1800,7 @@ void mac_drv_fill_rxd(struct s_smc *smc)
1806 MaxFrameSize = smc->os.MaxFrameSize; 1800 MaxFrameSize = smc->os.MaxFrameSize;
1807 // Check if there is any RXD left. 1801 // Check if there is any RXD left.
1808 while (HWM_GET_RX_FREE(smc) > 0) { 1802 while (HWM_GET_RX_FREE(smc) > 0) {
1809 PRINTK(KERN_INFO ".\n"); 1803 pr_debug(KERN_INFO ".\n");
1810 1804
1811 rxd = HWM_GET_CURR_RXD(smc); 1805 rxd = HWM_GET_CURR_RXD(smc);
1812 skb = alloc_skb(MaxFrameSize + 3, GFP_ATOMIC); 1806 skb = alloc_skb(MaxFrameSize + 3, GFP_ATOMIC);
@@ -1826,7 +1820,7 @@ void mac_drv_fill_rxd(struct s_smc *smc)
1826 // keep the receiver running in hope of better times. 1820 // keep the receiver running in hope of better times.
1827 // Multiple descriptors may point to this local buffer, 1821 // Multiple descriptors may point to this local buffer,
1828 // so data in it must be considered invalid. 1822 // so data in it must be considered invalid.
1829 PRINTK("Queueing invalid buffer!\n"); 1823 pr_debug("Queueing invalid buffer!\n");
1830 v_addr = smc->os.LocalRxBuffer; 1824 v_addr = smc->os.LocalRxBuffer;
1831 b_addr = smc->os.LocalRxBufferDMA; 1825 b_addr = smc->os.LocalRxBufferDMA;
1832 } 1826 }
@@ -1837,7 +1831,7 @@ void mac_drv_fill_rxd(struct s_smc *smc)
1837 hwm_rx_frag(smc, v_addr, b_addr, MaxFrameSize, 1831 hwm_rx_frag(smc, v_addr, b_addr, MaxFrameSize,
1838 FIRST_FRAG | LAST_FRAG); 1832 FIRST_FRAG | LAST_FRAG);
1839 } 1833 }
1840 PRINTK(KERN_INFO "leaving mac_drv_fill_rxd\n"); 1834 pr_debug(KERN_INFO "leaving mac_drv_fill_rxd\n");
1841} // mac_drv_fill_rxd 1835} // mac_drv_fill_rxd
1842 1836
1843 1837
@@ -1863,7 +1857,7 @@ void mac_drv_clear_rxd(struct s_smc *smc, volatile struct s_smt_fp_rxd *rxd,
1863 1857
1864 struct sk_buff *skb; 1858 struct sk_buff *skb;
1865 1859
1866 PRINTK("entering mac_drv_clear_rxd\n"); 1860 pr_debug("entering mac_drv_clear_rxd\n");
1867 1861
1868 if (frag_count != 1) // This is not allowed to happen. 1862 if (frag_count != 1) // This is not allowed to happen.
1869 1863
@@ -1919,19 +1913,19 @@ int mac_drv_rx_init(struct s_smc *smc, int len, int fc,
1919{ 1913{
1920 struct sk_buff *skb; 1914 struct sk_buff *skb;
1921 1915
1922 PRINTK("entering mac_drv_rx_init(len=%d)\n", len); 1916 pr_debug("entering mac_drv_rx_init(len=%d)\n", len);
1923 1917
1924 // "Received" a SMT or NSA frame of the local SMT. 1918 // "Received" a SMT or NSA frame of the local SMT.
1925 1919
1926 if (len != la_len || len < FDDI_MAC_HDR_LEN || !look_ahead) { 1920 if (len != la_len || len < FDDI_MAC_HDR_LEN || !look_ahead) {
1927 PRINTK("fddi: Discard invalid local SMT frame\n"); 1921 pr_debug("fddi: Discard invalid local SMT frame\n");
1928 PRINTK(" len=%d, la_len=%d, (ULONG) look_ahead=%08lXh.\n", 1922 pr_debug(" len=%d, la_len=%d, (ULONG) look_ahead=%08lXh.\n",
1929 len, la_len, (unsigned long) look_ahead); 1923 len, la_len, (unsigned long) look_ahead);
1930 return (0); 1924 return (0);
1931 } 1925 }
1932 skb = alloc_skb(len + 3, GFP_ATOMIC); 1926 skb = alloc_skb(len + 3, GFP_ATOMIC);
1933 if (!skb) { 1927 if (!skb) {
1934 PRINTK("fddi: Local SMT: skb memory exhausted.\n"); 1928 pr_debug("fddi: Local SMT: skb memory exhausted.\n");
1935 return (0); 1929 return (0);
1936 } 1930 }
1937 skb_reserve(skb, 3); 1931 skb_reserve(skb, 3);
@@ -1981,40 +1975,40 @@ void smt_timer_poll(struct s_smc *smc)
1981 ************************/ 1975 ************************/
1982void ring_status_indication(struct s_smc *smc, u_long status) 1976void ring_status_indication(struct s_smc *smc, u_long status)
1983{ 1977{
1984 PRINTK("ring_status_indication( "); 1978 pr_debug("ring_status_indication( ");
1985 if (status & RS_RES15) 1979 if (status & RS_RES15)
1986 PRINTK("RS_RES15 "); 1980 pr_debug("RS_RES15 ");
1987 if (status & RS_HARDERROR) 1981 if (status & RS_HARDERROR)
1988 PRINTK("RS_HARDERROR "); 1982 pr_debug("RS_HARDERROR ");
1989 if (status & RS_SOFTERROR) 1983 if (status & RS_SOFTERROR)
1990 PRINTK("RS_SOFTERROR "); 1984 pr_debug("RS_SOFTERROR ");
1991 if (status & RS_BEACON) 1985 if (status & RS_BEACON)
1992 PRINTK("RS_BEACON "); 1986 pr_debug("RS_BEACON ");
1993 if (status & RS_PATHTEST) 1987 if (status & RS_PATHTEST)
1994 PRINTK("RS_PATHTEST "); 1988 pr_debug("RS_PATHTEST ");
1995 if (status & RS_SELFTEST) 1989 if (status & RS_SELFTEST)
1996 PRINTK("RS_SELFTEST "); 1990 pr_debug("RS_SELFTEST ");
1997 if (status & RS_RES9) 1991 if (status & RS_RES9)
1998 PRINTK("RS_RES9 "); 1992 pr_debug("RS_RES9 ");
1999 if (status & RS_DISCONNECT) 1993 if (status & RS_DISCONNECT)
2000 PRINTK("RS_DISCONNECT "); 1994 pr_debug("RS_DISCONNECT ");
2001 if (status & RS_RES7) 1995 if (status & RS_RES7)
2002 PRINTK("RS_RES7 "); 1996 pr_debug("RS_RES7 ");
2003 if (status & RS_DUPADDR) 1997 if (status & RS_DUPADDR)
2004 PRINTK("RS_DUPADDR "); 1998 pr_debug("RS_DUPADDR ");
2005 if (status & RS_NORINGOP) 1999 if (status & RS_NORINGOP)
2006 PRINTK("RS_NORINGOP "); 2000 pr_debug("RS_NORINGOP ");
2007 if (status & RS_VERSION) 2001 if (status & RS_VERSION)
2008 PRINTK("RS_VERSION "); 2002 pr_debug("RS_VERSION ");
2009 if (status & RS_STUCKBYPASSS) 2003 if (status & RS_STUCKBYPASSS)
2010 PRINTK("RS_STUCKBYPASSS "); 2004 pr_debug("RS_STUCKBYPASSS ");
2011 if (status & RS_EVENT) 2005 if (status & RS_EVENT)
2012 PRINTK("RS_EVENT "); 2006 pr_debug("RS_EVENT ");
2013 if (status & RS_RINGOPCHANGE) 2007 if (status & RS_RINGOPCHANGE)
2014 PRINTK("RS_RINGOPCHANGE "); 2008 pr_debug("RS_RINGOPCHANGE ");
2015 if (status & RS_RES0) 2009 if (status & RS_RES0)
2016 PRINTK("RS_RES0 "); 2010 pr_debug("RS_RES0 ");
2017 PRINTK("]\n"); 2011 pr_debug("]\n");
2018} // ring_status_indication 2012} // ring_status_indication
2019 2013
2020 2014
@@ -2057,17 +2051,17 @@ void smt_stat_counter(struct s_smc *smc, int stat)
2057{ 2051{
2058// BOOLEAN RingIsUp ; 2052// BOOLEAN RingIsUp ;
2059 2053
2060 PRINTK(KERN_INFO "smt_stat_counter\n"); 2054 pr_debug(KERN_INFO "smt_stat_counter\n");
2061 switch (stat) { 2055 switch (stat) {
2062 case 0: 2056 case 0:
2063 PRINTK(KERN_INFO "Ring operational change.\n"); 2057 pr_debug(KERN_INFO "Ring operational change.\n");
2064 break; 2058 break;
2065 case 1: 2059 case 1:
2066 PRINTK(KERN_INFO "Receive fifo overflow.\n"); 2060 pr_debug(KERN_INFO "Receive fifo overflow.\n");
2067 smc->os.MacStat.gen.rx_errors++; 2061 smc->os.MacStat.gen.rx_errors++;
2068 break; 2062 break;
2069 default: 2063 default:
2070 PRINTK(KERN_INFO "Unknown status (%d).\n", stat); 2064 pr_debug(KERN_INFO "Unknown status (%d).\n", stat);
2071 break; 2065 break;
2072 } 2066 }
2073} // smt_stat_counter 2067} // smt_stat_counter
@@ -2123,10 +2117,10 @@ void cfm_state_change(struct s_smc *smc, int c_state)
2123 s = "SC11_C_WRAP_S"; 2117 s = "SC11_C_WRAP_S";
2124 break; 2118 break;
2125 default: 2119 default:
2126 PRINTK(KERN_INFO "cfm_state_change: unknown %d\n", c_state); 2120 pr_debug(KERN_INFO "cfm_state_change: unknown %d\n", c_state);
2127 return; 2121 return;
2128 } 2122 }
2129 PRINTK(KERN_INFO "cfm_state_change: %s\n", s); 2123 pr_debug(KERN_INFO "cfm_state_change: %s\n", s);
2130#endif // DRIVERDEBUG 2124#endif // DRIVERDEBUG
2131} // cfm_state_change 2125} // cfm_state_change
2132 2126
@@ -2181,7 +2175,7 @@ void ecm_state_change(struct s_smc *smc, int e_state)
2181 s = "unknown"; 2175 s = "unknown";
2182 break; 2176 break;
2183 } 2177 }
2184 PRINTK(KERN_INFO "ecm_state_change: %s\n", s); 2178 pr_debug(KERN_INFO "ecm_state_change: %s\n", s);
2185#endif //DRIVERDEBUG 2179#endif //DRIVERDEBUG
2186} // ecm_state_change 2180} // ecm_state_change
2187 2181
@@ -2236,7 +2230,7 @@ void rmt_state_change(struct s_smc *smc, int r_state)
2236 s = "unknown"; 2230 s = "unknown";
2237 break; 2231 break;
2238 } 2232 }
2239 PRINTK(KERN_INFO "[rmt_state_change: %s]\n", s); 2233 pr_debug(KERN_INFO "[rmt_state_change: %s]\n", s);
2240#endif // DRIVERDEBUG 2234#endif // DRIVERDEBUG
2241} // rmt_state_change 2235} // rmt_state_change
2242 2236
@@ -2256,7 +2250,7 @@ void rmt_state_change(struct s_smc *smc, int r_state)
2256 ************************/ 2250 ************************/
2257void drv_reset_indication(struct s_smc *smc) 2251void drv_reset_indication(struct s_smc *smc)
2258{ 2252{
2259 PRINTK(KERN_INFO "entering drv_reset_indication\n"); 2253 pr_debug(KERN_INFO "entering drv_reset_indication\n");
2260 2254
2261 smc->os.ResetRequested = TRUE; // Set flag. 2255 smc->os.ResetRequested = TRUE; // Set flag.
2262 2256
diff --git a/drivers/net/skge.c b/drivers/net/skge.c
index c11cdd08ec57..60d502eef4fc 100644
--- a/drivers/net/skge.c
+++ b/drivers/net/skge.c
@@ -2837,8 +2837,6 @@ static int skge_xmit_frame(struct sk_buff *skb, struct net_device *dev)
2837 netif_stop_queue(dev); 2837 netif_stop_queue(dev);
2838 } 2838 }
2839 2839
2840 dev->trans_start = jiffies;
2841
2842 return NETDEV_TX_OK; 2840 return NETDEV_TX_OK;
2843} 2841}
2844 2842
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index a2ff9cb1e7ac..6b5946fe8ae2 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -1690,7 +1690,6 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1690 1690
1691 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod); 1691 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
1692 1692
1693 dev->trans_start = jiffies;
1694 return NETDEV_TX_OK; 1693 return NETDEV_TX_OK;
1695 1694
1696mapping_unwind: 1695mapping_unwind:
diff --git a/drivers/net/smc-mca.c b/drivers/net/smc-mca.c
index 8d36d40649ef..c791ef76c1d6 100644
--- a/drivers/net/smc-mca.c
+++ b/drivers/net/smc-mca.c
@@ -370,7 +370,7 @@ static int __init ultramca_probe(struct device *gen_dev)
370 370
371 outb(reg4, ioaddr + 4); 371 outb(reg4, ioaddr + 4);
372 372
373 gen_dev->driver_data = dev; 373 dev_set_drvdata(gen_dev, dev);
374 374
375 /* The 8390 isn't at the base address, so fake the offset 375 /* The 8390 isn't at the base address, so fake the offset
376 */ 376 */
@@ -531,7 +531,7 @@ static int ultramca_close_card(struct net_device *dev)
531static int ultramca_remove(struct device *gen_dev) 531static int ultramca_remove(struct device *gen_dev)
532{ 532{
533 struct mca_device *mca_dev = to_mca_device(gen_dev); 533 struct mca_device *mca_dev = to_mca_device(gen_dev);
534 struct net_device *dev = (struct net_device *)gen_dev->driver_data; 534 struct net_device *dev = dev_get_drvdata(gen_dev);
535 535
536 if (dev) { 536 if (dev) {
537 /* NB: ultra_close_card() does free_irq */ 537 /* NB: ultra_close_card() does free_irq */
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 293610334a77..bc4976ac8712 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -1774,6 +1774,20 @@ static int __devinit smc911x_findirq(struct net_device *dev)
1774 return probe_irq_off(cookie); 1774 return probe_irq_off(cookie);
1775} 1775}
1776 1776
1777static const struct net_device_ops smc911x_netdev_ops = {
1778 .ndo_open = smc911x_open,
1779 .ndo_stop = smc911x_close,
1780 .ndo_start_xmit = smc911x_hard_start_xmit,
1781 .ndo_tx_timeout = smc911x_timeout,
1782 .ndo_set_multicast_list = smc911x_set_multicast_list,
1783 .ndo_change_mtu = eth_change_mtu,
1784 .ndo_validate_addr = eth_validate_addr,
1785 .ndo_set_mac_address = eth_mac_addr,
1786#ifdef CONFIG_NET_POLL_CONTROLLER
1787 .ndo_poll_controller = smc911x_poll_controller,
1788#endif
1789};
1790
1777/* 1791/*
1778 * Function: smc911x_probe(unsigned long ioaddr) 1792 * Function: smc911x_probe(unsigned long ioaddr)
1779 * 1793 *
@@ -1940,16 +1954,9 @@ static int __devinit smc911x_probe(struct net_device *dev)
1940 /* Fill in the fields of the device structure with ethernet values. */ 1954 /* Fill in the fields of the device structure with ethernet values. */
1941 ether_setup(dev); 1955 ether_setup(dev);
1942 1956
1943 dev->open = smc911x_open; 1957 dev->netdev_ops = &smc911x_netdev_ops;
1944 dev->stop = smc911x_close;
1945 dev->hard_start_xmit = smc911x_hard_start_xmit;
1946 dev->tx_timeout = smc911x_timeout;
1947 dev->watchdog_timeo = msecs_to_jiffies(watchdog); 1958 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1948 dev->set_multicast_list = smc911x_set_multicast_list;
1949 dev->ethtool_ops = &smc911x_ethtool_ops; 1959 dev->ethtool_ops = &smc911x_ethtool_ops;
1950#ifdef CONFIG_NET_POLL_CONTROLLER
1951 dev->poll_controller = smc911x_poll_controller;
1952#endif
1953 1960
1954 INIT_WORK(&lp->phy_configure, smc911x_phy_configure); 1961 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
1955 lp->mii.phy_id_mask = 0x1f; 1962 lp->mii.phy_id_mask = 0x1f;
diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c
index eb7db032a780..3cff84078a9e 100644
--- a/drivers/net/smsc911x.c
+++ b/drivers/net/smsc911x.c
@@ -47,6 +47,7 @@
47#include <linux/bitops.h> 47#include <linux/bitops.h>
48#include <linux/irq.h> 48#include <linux/irq.h>
49#include <linux/io.h> 49#include <linux/io.h>
50#include <linux/swab.h>
50#include <linux/phy.h> 51#include <linux/phy.h>
51#include <linux/smsc911x.h> 52#include <linux/smsc911x.h>
52#include "smsc911x.h" 53#include "smsc911x.h"
@@ -175,6 +176,12 @@ static inline void
175smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf, 176smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
176 unsigned int wordcount) 177 unsigned int wordcount)
177{ 178{
179 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
180 while (wordcount--)
181 smsc911x_reg_write(pdata, TX_DATA_FIFO, swab32(*buf++));
182 return;
183 }
184
178 if (pdata->config.flags & SMSC911X_USE_32BIT) { 185 if (pdata->config.flags & SMSC911X_USE_32BIT) {
179 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount); 186 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
180 return; 187 return;
@@ -194,6 +201,12 @@ static inline void
194smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf, 201smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
195 unsigned int wordcount) 202 unsigned int wordcount)
196{ 203{
204 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
205 while (wordcount--)
206 *buf++ = swab32(smsc911x_reg_read(pdata, RX_DATA_FIFO));
207 return;
208 }
209
197 if (pdata->config.flags & SMSC911X_USE_32BIT) { 210 if (pdata->config.flags & SMSC911X_USE_32BIT) {
198 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount); 211 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
199 return; 212 return;
@@ -1963,7 +1976,7 @@ static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
1963 retval = -ENODEV; 1976 retval = -ENODEV;
1964 goto out_0; 1977 goto out_0;
1965 } 1978 }
1966 res_size = res->end - res->start; 1979 res_size = res->end - res->start + 1;
1967 1980
1968 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1981 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1969 if (!irq_res) { 1982 if (!irq_res) {
@@ -2096,12 +2109,58 @@ out_0:
2096 return retval; 2109 return retval;
2097} 2110}
2098 2111
2112#ifdef CONFIG_PM
2113/* This implementation assumes the devices remains powered on its VDDVARIO
2114 * pins during suspend. */
2115
2116static int smsc911x_suspend(struct platform_device *pdev, pm_message_t state)
2117{
2118 struct net_device *dev = platform_get_drvdata(pdev);
2119 struct smsc911x_data *pdata = netdev_priv(dev);
2120
2121 /* enable wake on LAN, energy detection and the external PME
2122 * signal. */
2123 smsc911x_reg_write(pdata, PMT_CTRL,
2124 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2125 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2126
2127 return 0;
2128}
2129
2130static int smsc911x_resume(struct platform_device *pdev)
2131{
2132 struct net_device *dev = platform_get_drvdata(pdev);
2133 struct smsc911x_data *pdata = netdev_priv(dev);
2134 unsigned int to = 100;
2135
2136 /* Note 3.11 from the datasheet:
2137 * "When the LAN9220 is in a power saving state, a write of any
2138 * data to the BYTE_TEST register will wake-up the device."
2139 */
2140 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2141
2142 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2143 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2144 * if it failed. */
2145 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2146 udelay(1000);
2147
2148 return (to == 0) ? -EIO : 0;
2149}
2150
2151#else
2152#define smsc911x_suspend NULL
2153#define smsc911x_resume NULL
2154#endif
2155
2099static struct platform_driver smsc911x_driver = { 2156static struct platform_driver smsc911x_driver = {
2100 .probe = smsc911x_drv_probe, 2157 .probe = smsc911x_drv_probe,
2101 .remove = smsc911x_drv_remove, 2158 .remove = smsc911x_drv_remove,
2102 .driver = { 2159 .driver = {
2103 .name = SMSC_CHIPNAME, 2160 .name = SMSC_CHIPNAME,
2104 }, 2161 },
2162 .suspend = smsc911x_suspend,
2163 .resume = smsc911x_resume,
2105}; 2164};
2106 2165
2107/* Entry point for loading the module */ 2166/* Entry point for loading the module */
diff --git a/drivers/net/sun3lance.c b/drivers/net/sun3lance.c
index e5beb299cbd0..9bd9dadb8534 100644
--- a/drivers/net/sun3lance.c
+++ b/drivers/net/sun3lance.c
@@ -294,6 +294,16 @@ out:
294 return ERR_PTR(err); 294 return ERR_PTR(err);
295} 295}
296 296
297static const struct net_device_ops lance_netdev_ops = {
298 .ndo_open = lance_open,
299 .ndo_stop = lance_close,
300 .ndo_start_xmit = lance_start_xmit,
301 .ndo_set_multicast_list = set_multicast_list,
302 .ndo_set_mac_address = NULL,
303 .ndo_change_mtu = eth_change_mtu,
304 .ndo_validate_addr = eth_validate_addr,
305};
306
297static int __init lance_probe( struct net_device *dev) 307static int __init lance_probe( struct net_device *dev)
298{ 308{
299 unsigned long ioaddr; 309 unsigned long ioaddr;
@@ -397,12 +407,7 @@ static int __init lance_probe( struct net_device *dev)
397 if (did_version++ == 0) 407 if (did_version++ == 0)
398 printk( version ); 408 printk( version );
399 409
400 /* The LANCE-specific entries in the device structure. */ 410 dev->netdev_ops = &lance_netdev_ops;
401 dev->open = &lance_open;
402 dev->hard_start_xmit = &lance_start_xmit;
403 dev->stop = &lance_close;
404 dev->set_multicast_list = &set_multicast_list;
405 dev->set_mac_address = NULL;
406// KLUDGE -- REMOVE ME 411// KLUDGE -- REMOVE ME
407 set_bit(__LINK_STATE_PRESENT, &dev->state); 412 set_bit(__LINK_STATE_PRESENT, &dev->state);
408 413
diff --git a/drivers/net/sundance.c b/drivers/net/sundance.c
index c399b1955c1e..545f81b34ad7 100644
--- a/drivers/net/sundance.c
+++ b/drivers/net/sundance.c
@@ -369,7 +369,6 @@ struct netdev_private {
369 struct sk_buff* tx_skbuff[TX_RING_SIZE]; 369 struct sk_buff* tx_skbuff[TX_RING_SIZE];
370 dma_addr_t tx_ring_dma; 370 dma_addr_t tx_ring_dma;
371 dma_addr_t rx_ring_dma; 371 dma_addr_t rx_ring_dma;
372 struct net_device_stats stats;
373 struct timer_list timer; /* Media monitoring timer. */ 372 struct timer_list timer; /* Media monitoring timer. */
374 /* Frequently used values: keep some adjacent for cache effect. */ 373 /* Frequently used values: keep some adjacent for cache effect. */
375 spinlock_t lock; 374 spinlock_t lock;
@@ -975,7 +974,7 @@ static void tx_timeout(struct net_device *dev)
975 dev->if_port = 0; 974 dev->if_port = 0;
976 975
977 dev->trans_start = jiffies; 976 dev->trans_start = jiffies;
978 np->stats.tx_errors++; 977 dev->stats.tx_errors++;
979 if (np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 4) { 978 if (np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 4) {
980 netif_wake_queue(dev); 979 netif_wake_queue(dev);
981 } 980 }
@@ -1123,7 +1122,7 @@ reset_tx (struct net_device *dev)
1123 else 1122 else
1124 dev_kfree_skb (skb); 1123 dev_kfree_skb (skb);
1125 np->tx_skbuff[i] = NULL; 1124 np->tx_skbuff[i] = NULL;
1126 np->stats.tx_dropped++; 1125 dev->stats.tx_dropped++;
1127 } 1126 }
1128 } 1127 }
1129 np->cur_tx = np->dirty_tx = 0; 1128 np->cur_tx = np->dirty_tx = 0;
@@ -1181,15 +1180,15 @@ static irqreturn_t intr_handler(int irq, void *dev_instance)
1181 if (netif_msg_tx_err(np)) 1180 if (netif_msg_tx_err(np))
1182 printk("%s: Transmit error status %4.4x.\n", 1181 printk("%s: Transmit error status %4.4x.\n",
1183 dev->name, tx_status); 1182 dev->name, tx_status);
1184 np->stats.tx_errors++; 1183 dev->stats.tx_errors++;
1185 if (tx_status & 0x10) 1184 if (tx_status & 0x10)
1186 np->stats.tx_fifo_errors++; 1185 dev->stats.tx_fifo_errors++;
1187 if (tx_status & 0x08) 1186 if (tx_status & 0x08)
1188 np->stats.collisions++; 1187 dev->stats.collisions++;
1189 if (tx_status & 0x04) 1188 if (tx_status & 0x04)
1190 np->stats.tx_fifo_errors++; 1189 dev->stats.tx_fifo_errors++;
1191 if (tx_status & 0x02) 1190 if (tx_status & 0x02)
1192 np->stats.tx_window_errors++; 1191 dev->stats.tx_window_errors++;
1193 1192
1194 /* 1193 /*
1195 ** This reset has been verified on 1194 ** This reset has been verified on
@@ -1313,11 +1312,15 @@ static void rx_poll(unsigned long data)
1313 if (netif_msg_rx_err(np)) 1312 if (netif_msg_rx_err(np))
1314 printk(KERN_DEBUG " netdev_rx() Rx error was %8.8x.\n", 1313 printk(KERN_DEBUG " netdev_rx() Rx error was %8.8x.\n",
1315 frame_status); 1314 frame_status);
1316 np->stats.rx_errors++; 1315 dev->stats.rx_errors++;
1317 if (frame_status & 0x00100000) np->stats.rx_length_errors++; 1316 if (frame_status & 0x00100000)
1318 if (frame_status & 0x00010000) np->stats.rx_fifo_errors++; 1317 dev->stats.rx_length_errors++;
1319 if (frame_status & 0x00060000) np->stats.rx_frame_errors++; 1318 if (frame_status & 0x00010000)
1320 if (frame_status & 0x00080000) np->stats.rx_crc_errors++; 1319 dev->stats.rx_fifo_errors++;
1320 if (frame_status & 0x00060000)
1321 dev->stats.rx_frame_errors++;
1322 if (frame_status & 0x00080000)
1323 dev->stats.rx_crc_errors++;
1321 if (frame_status & 0x00100000) { 1324 if (frame_status & 0x00100000) {
1322 printk(KERN_WARNING "%s: Oversized Ethernet frame," 1325 printk(KERN_WARNING "%s: Oversized Ethernet frame,"
1323 " status %8.8x.\n", 1326 " status %8.8x.\n",
@@ -1485,22 +1488,22 @@ static struct net_device_stats *get_stats(struct net_device *dev)
1485 the vulnerability window is very small and statistics are 1488 the vulnerability window is very small and statistics are
1486 non-critical. */ 1489 non-critical. */
1487 /* The chip only need report frame silently dropped. */ 1490 /* The chip only need report frame silently dropped. */
1488 np->stats.rx_missed_errors += ioread8(ioaddr + RxMissed); 1491 dev->stats.rx_missed_errors += ioread8(ioaddr + RxMissed);
1489 np->stats.tx_packets += ioread16(ioaddr + TxFramesOK); 1492 dev->stats.tx_packets += ioread16(ioaddr + TxFramesOK);
1490 np->stats.rx_packets += ioread16(ioaddr + RxFramesOK); 1493 dev->stats.rx_packets += ioread16(ioaddr + RxFramesOK);
1491 np->stats.collisions += ioread8(ioaddr + StatsLateColl); 1494 dev->stats.collisions += ioread8(ioaddr + StatsLateColl);
1492 np->stats.collisions += ioread8(ioaddr + StatsMultiColl); 1495 dev->stats.collisions += ioread8(ioaddr + StatsMultiColl);
1493 np->stats.collisions += ioread8(ioaddr + StatsOneColl); 1496 dev->stats.collisions += ioread8(ioaddr + StatsOneColl);
1494 np->stats.tx_carrier_errors += ioread8(ioaddr + StatsCarrierError); 1497 dev->stats.tx_carrier_errors += ioread8(ioaddr + StatsCarrierError);
1495 ioread8(ioaddr + StatsTxDefer); 1498 ioread8(ioaddr + StatsTxDefer);
1496 for (i = StatsTxDefer; i <= StatsMcastRx; i++) 1499 for (i = StatsTxDefer; i <= StatsMcastRx; i++)
1497 ioread8(ioaddr + i); 1500 ioread8(ioaddr + i);
1498 np->stats.tx_bytes += ioread16(ioaddr + TxOctetsLow); 1501 dev->stats.tx_bytes += ioread16(ioaddr + TxOctetsLow);
1499 np->stats.tx_bytes += ioread16(ioaddr + TxOctetsHigh) << 16; 1502 dev->stats.tx_bytes += ioread16(ioaddr + TxOctetsHigh) << 16;
1500 np->stats.rx_bytes += ioread16(ioaddr + RxOctetsLow); 1503 dev->stats.rx_bytes += ioread16(ioaddr + RxOctetsLow);
1501 np->stats.rx_bytes += ioread16(ioaddr + RxOctetsHigh) << 16; 1504 dev->stats.rx_bytes += ioread16(ioaddr + RxOctetsHigh) << 16;
1502 1505
1503 return &np->stats; 1506 return &dev->stats;
1504} 1507}
1505 1508
1506static void set_rx_mode(struct net_device *dev) 1509static void set_rx_mode(struct net_device *dev)
diff --git a/drivers/net/tc35815.c b/drivers/net/tc35815.c
index 0ce2db6ce2bf..d737f6b8f876 100644
--- a/drivers/net/tc35815.c
+++ b/drivers/net/tc35815.c
@@ -688,14 +688,11 @@ static void tc_handle_link_change(struct net_device *dev)
688 688
689 if (status_change && netif_msg_link(lp)) { 689 if (status_change && netif_msg_link(lp)) {
690 phy_print_status(phydev); 690 phy_print_status(phydev);
691#ifdef DEBUG 691 pr_debug("%s: MII BMCR %04x BMSR %04x LPA %04x\n",
692 printk(KERN_DEBUG 692 dev->name,
693 "%s: MII BMCR %04x BMSR %04x LPA %04x\n", 693 phy_read(phydev, MII_BMCR),
694 dev->name, 694 phy_read(phydev, MII_BMSR),
695 phy_read(phydev, MII_BMCR), 695 phy_read(phydev, MII_LPA));
696 phy_read(phydev, MII_BMSR),
697 phy_read(phydev, MII_LPA));
698#endif
699 } 696 }
700} 697}
701 698
diff --git a/drivers/net/tehuti.c b/drivers/net/tehuti.c
index 7f4a9683ba1e..093807a182f2 100644
--- a/drivers/net/tehuti.c
+++ b/drivers/net/tehuti.c
@@ -1718,8 +1718,9 @@ static int bdx_tx_transmit(struct sk_buff *skb, struct net_device *ndev)
1718 WRITE_REG(priv, f->m.reg_WPTR, f->m.wptr & TXF_WPTR_WR_PTR); 1718 WRITE_REG(priv, f->m.reg_WPTR, f->m.wptr & TXF_WPTR_WR_PTR);
1719 1719
1720#endif 1720#endif
1721 ndev->trans_start = jiffies; 1721#ifdef BDX_LLTX
1722 1722 ndev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
1723#endif
1723 priv->net_stats.tx_packets++; 1724 priv->net_stats.tx_packets++;
1724 priv->net_stats.tx_bytes += skb->len; 1725 priv->net_stats.tx_bytes += skb->len;
1725 1726
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 201be425643a..a39b534fb43e 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -68,8 +68,8 @@
68 68
69#define DRV_MODULE_NAME "tg3" 69#define DRV_MODULE_NAME "tg3"
70#define PFX DRV_MODULE_NAME ": " 70#define PFX DRV_MODULE_NAME ": "
71#define DRV_MODULE_VERSION "3.98" 71#define DRV_MODULE_VERSION "3.99"
72#define DRV_MODULE_RELDATE "February 25, 2009" 72#define DRV_MODULE_RELDATE "April 20, 2009"
73 73
74#define TG3_DEF_MAC_MODE 0 74#define TG3_DEF_MAC_MODE 0
75#define TG3_DEF_RX_MODE 0 75#define TG3_DEF_RX_MODE 0
@@ -1950,7 +1950,8 @@ static void tg3_frob_aux_power(struct tg3 *tp)
1950 GRC_LCLCTRL_GPIO_OUTPUT0 | 1950 GRC_LCLCTRL_GPIO_OUTPUT0 |
1951 GRC_LCLCTRL_GPIO_OUTPUT1), 1951 GRC_LCLCTRL_GPIO_OUTPUT1),
1952 100); 1952 100);
1953 } else if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761) { 1953 } else if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761 ||
1954 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761S) {
1954 /* The 5761 non-e device swaps GPIO 0 and GPIO 2. */ 1955 /* The 5761 non-e device swaps GPIO 0 and GPIO 2. */
1955 u32 grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 | 1956 u32 grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 |
1956 GRC_LCLCTRL_GPIO_OE1 | 1957 GRC_LCLCTRL_GPIO_OE1 |
@@ -2455,8 +2456,6 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
2455 } 2456 }
2456 } 2457 }
2457 2458
2458 __tg3_set_mac_addr(tp, 0);
2459
2460 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { 2459 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
2461 u32 val; 2460 u32 val;
2462 2461
@@ -4656,6 +4655,7 @@ static int tg3_poll(struct napi_struct *napi, int budget)
4656 * so we must read it before checking for more work. 4655 * so we must read it before checking for more work.
4657 */ 4656 */
4658 tp->last_tag = sblk->status_tag; 4657 tp->last_tag = sblk->status_tag;
4658 tp->last_irq_tag = tp->last_tag;
4659 rmb(); 4659 rmb();
4660 } else 4660 } else
4661 sblk->status &= ~SD_STATUS_UPDATED; 4661 sblk->status &= ~SD_STATUS_UPDATED;
@@ -4811,7 +4811,7 @@ static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id)
4811 * Reading the PCI State register will confirm whether the 4811 * Reading the PCI State register will confirm whether the
4812 * interrupt is ours and will flush the status block. 4812 * interrupt is ours and will flush the status block.
4813 */ 4813 */
4814 if (unlikely(sblk->status_tag == tp->last_tag)) { 4814 if (unlikely(sblk->status_tag == tp->last_irq_tag)) {
4815 if ((tp->tg3_flags & TG3_FLAG_CHIP_RESETTING) || 4815 if ((tp->tg3_flags & TG3_FLAG_CHIP_RESETTING) ||
4816 (tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) { 4816 (tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) {
4817 handled = 0; 4817 handled = 0;
@@ -4831,18 +4831,22 @@ static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id)
4831 * excessive spurious interrupts can be worse in some cases. 4831 * excessive spurious interrupts can be worse in some cases.
4832 */ 4832 */
4833 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); 4833 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001);
4834
4835 /*
4836 * In a shared interrupt configuration, sometimes other devices'
4837 * interrupts will scream. We record the current status tag here
4838 * so that the above check can report that the screaming interrupts
4839 * are unhandled. Eventually they will be silenced.
4840 */
4841 tp->last_irq_tag = sblk->status_tag;
4842
4834 if (tg3_irq_sync(tp)) 4843 if (tg3_irq_sync(tp))
4835 goto out; 4844 goto out;
4836 if (napi_schedule_prep(&tp->napi)) { 4845
4837 prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); 4846 prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]);
4838 /* Update last_tag to mark that this status has been 4847
4839 * seen. Because interrupt may be shared, we may be 4848 napi_schedule(&tp->napi);
4840 * racing with tg3_poll(), so only update last_tag 4849
4841 * if tg3_poll() is not scheduled.
4842 */
4843 tp->last_tag = sblk->status_tag;
4844 __napi_schedule(&tp->napi);
4845 }
4846out: 4850out:
4847 return IRQ_RETVAL(handled); 4851 return IRQ_RETVAL(handled);
4848} 4852}
@@ -5190,9 +5194,7 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev)
5190 } 5194 }
5191 5195
5192out_unlock: 5196out_unlock:
5193 mmiowb(); 5197 mmiowb();
5194
5195 dev->trans_start = jiffies;
5196 5198
5197 return NETDEV_TX_OK; 5199 return NETDEV_TX_OK;
5198} 5200}
@@ -5403,9 +5405,7 @@ static int tg3_start_xmit_dma_bug(struct sk_buff *skb, struct net_device *dev)
5403 } 5405 }
5404 5406
5405out_unlock: 5407out_unlock:
5406 mmiowb(); 5408 mmiowb();
5407
5408 dev->trans_start = jiffies;
5409 5409
5410 return NETDEV_TX_OK; 5410 return NETDEV_TX_OK;
5411} 5411}
@@ -6156,6 +6156,7 @@ static int tg3_chip_reset(struct tg3 *tp)
6156 tp->hw_status->status_tag = 0; 6156 tp->hw_status->status_tag = 0;
6157 } 6157 }
6158 tp->last_tag = 0; 6158 tp->last_tag = 0;
6159 tp->last_irq_tag = 0;
6159 smp_mb(); 6160 smp_mb();
6160 synchronize_irq(tp->pdev->irq); 6161 synchronize_irq(tp->pdev->irq);
6161 6162
@@ -6350,6 +6351,8 @@ static int tg3_halt(struct tg3 *tp, int kind, int silent)
6350 tg3_abort_hw(tp, silent); 6351 tg3_abort_hw(tp, silent);
6351 err = tg3_chip_reset(tp); 6352 err = tg3_chip_reset(tp);
6352 6353
6354 __tg3_set_mac_addr(tp, 0);
6355
6353 tg3_write_sig_legacy(tp, kind); 6356 tg3_write_sig_legacy(tp, kind);
6354 tg3_write_sig_post_reset(tp, kind); 6357 tg3_write_sig_post_reset(tp, kind);
6355 6358
@@ -6711,6 +6714,13 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6711 tw32(TG3_CPMU_HST_ACC, val); 6714 tw32(TG3_CPMU_HST_ACC, val);
6712 } 6715 }
6713 6716
6717 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) {
6718 val = tr32(PCIE_PWR_MGMT_THRESH) & ~PCIE_PWR_MGMT_L1_THRESH_MSK;
6719 val |= PCIE_PWR_MGMT_EXT_ASPM_TMR_EN |
6720 PCIE_PWR_MGMT_L1_THRESH_4MS;
6721 tw32(PCIE_PWR_MGMT_THRESH, val);
6722 }
6723
6714 /* This works around an issue with Athlon chipsets on 6724 /* This works around an issue with Athlon chipsets on
6715 * B3 tigon3 silicon. This bit has no effect on any 6725 * B3 tigon3 silicon. This bit has no effect on any
6716 * other revision. But do not set this on PCI Express 6726 * other revision. But do not set this on PCI Express
@@ -7138,7 +7148,6 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
7138 udelay(100); 7148 udelay(100);
7139 7149
7140 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0); 7150 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0);
7141 tp->last_tag = 0;
7142 7151
7143 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) { 7152 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) {
7144 tw32_f(DMAC_MODE, DMAC_MODE_ENABLE); 7153 tw32_f(DMAC_MODE, DMAC_MODE_ENABLE);
@@ -8539,6 +8548,9 @@ static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
8539 u32 i, offset, len, b_offset, b_count; 8548 u32 i, offset, len, b_offset, b_count;
8540 __be32 val; 8549 __be32 val;
8541 8550
8551 if (tp->tg3_flags3 & TG3_FLG3_NO_NVRAM)
8552 return -EINVAL;
8553
8542 if (tp->link_config.phy_is_low_power) 8554 if (tp->link_config.phy_is_low_power)
8543 return -EAGAIN; 8555 return -EAGAIN;
8544 8556
@@ -8604,7 +8616,8 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
8604 if (tp->link_config.phy_is_low_power) 8616 if (tp->link_config.phy_is_low_power)
8605 return -EAGAIN; 8617 return -EAGAIN;
8606 8618
8607 if (eeprom->magic != TG3_EEPROM_MAGIC) 8619 if ((tp->tg3_flags3 & TG3_FLG3_NO_NVRAM) ||
8620 eeprom->magic != TG3_EEPROM_MAGIC)
8608 return -EINVAL; 8621 return -EINVAL;
8609 8622
8610 offset = eeprom->offset; 8623 offset = eeprom->offset;
@@ -9201,6 +9214,9 @@ static int tg3_test_nvram(struct tg3 *tp)
9201 __be32 *buf; 9214 __be32 *buf;
9202 int i, j, k, err = 0, size; 9215 int i, j, k, err = 0, size;
9203 9216
9217 if (tp->tg3_flags3 & TG3_FLG3_NO_NVRAM)
9218 return 0;
9219
9204 if (tg3_nvram_read(tp, 0, &magic) != 0) 9220 if (tg3_nvram_read(tp, 0, &magic) != 0)
9205 return -EIO; 9221 return -EIO;
9206 9222
@@ -10183,7 +10199,8 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp)
10183{ 10199{
10184 u32 val; 10200 u32 val;
10185 10201
10186 if (tg3_nvram_read(tp, 0, &val) != 0) 10202 if ((tp->tg3_flags3 & TG3_FLG3_NO_NVRAM) ||
10203 tg3_nvram_read(tp, 0, &val) != 0)
10187 return; 10204 return;
10188 10205
10189 /* Selfboot format */ 10206 /* Selfboot format */
@@ -10565,6 +10582,7 @@ static void __devinit tg3_get_57780_nvram_info(struct tg3 *tp)
10565 } 10582 }
10566 break; 10583 break;
10567 default: 10584 default:
10585 tp->tg3_flags3 |= TG3_FLG3_NO_NVRAM;
10568 return; 10586 return;
10569 } 10587 }
10570 10588
@@ -11365,7 +11383,8 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
11365 unsigned int i; 11383 unsigned int i;
11366 u32 magic; 11384 u32 magic;
11367 11385
11368 if (tg3_nvram_read(tp, 0x0, &magic)) 11386 if ((tp->tg3_flags3 & TG3_FLG3_NO_NVRAM) ||
11387 tg3_nvram_read(tp, 0x0, &magic))
11369 goto out_not_found; 11388 goto out_not_found;
11370 11389
11371 if (magic == TG3_EEPROM_MAGIC) { 11390 if (magic == TG3_EEPROM_MAGIC) {
@@ -11457,6 +11476,15 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
11457out_not_found: 11476out_not_found:
11458 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) 11477 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
11459 strcpy(tp->board_part_number, "BCM95906"); 11478 strcpy(tp->board_part_number, "BCM95906");
11479 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 &&
11480 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57780)
11481 strcpy(tp->board_part_number, "BCM57780");
11482 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 &&
11483 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57760)
11484 strcpy(tp->board_part_number, "BCM57760");
11485 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 &&
11486 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57790)
11487 strcpy(tp->board_part_number, "BCM57790");
11460 else 11488 else
11461 strcpy(tp->board_part_number, "none"); 11489 strcpy(tp->board_part_number, "none");
11462} 11490}
@@ -11667,6 +11695,14 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp)
11667{ 11695{
11668 u32 val; 11696 u32 val;
11669 11697
11698 if (tp->tg3_flags3 & TG3_FLG3_NO_NVRAM) {
11699 tp->fw_ver[0] = 's';
11700 tp->fw_ver[1] = 'b';
11701 tp->fw_ver[2] = '\0';
11702
11703 return;
11704 }
11705
11670 if (tg3_nvram_read(tp, 0, &val)) 11706 if (tg3_nvram_read(tp, 0, &val))
11671 return; 11707 return;
11672 11708
@@ -11952,7 +11988,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
11952 tp->tg3_flags2 &= ~TG3_FLG2_HW_TSO_2; 11988 tp->tg3_flags2 &= ~TG3_FLG2_HW_TSO_2;
11953 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || 11989 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
11954 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || 11990 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
11955 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) 11991 tp->pci_chip_rev_id == CHIPREV_ID_57780_A0 ||
11992 tp->pci_chip_rev_id == CHIPREV_ID_57780_A1)
11956 tp->tg3_flags3 |= TG3_FLG3_CLKREQ_BUG; 11993 tp->tg3_flags3 |= TG3_FLG3_CLKREQ_BUG;
11957 } 11994 }
11958 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) { 11995 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) {
@@ -12144,7 +12181,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
12144 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) 12181 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780)
12145 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL; 12182 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL;
12146 12183
12147 if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761) { 12184 if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761 ||
12185 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761S) {
12148 /* Turn off the debug UART. */ 12186 /* Turn off the debug UART. */
12149 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL; 12187 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL;
12150 if (tp->tg3_flags2 & TG3_FLG2_IS_NIC) 12188 if (tp->tg3_flags2 & TG3_FLG2_IS_NIC)
@@ -12454,7 +12492,8 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
12454 } 12492 }
12455 if (!addr_ok) { 12493 if (!addr_ok) {
12456 /* Next, try NVRAM. */ 12494 /* Next, try NVRAM. */
12457 if (!tg3_nvram_read_be32(tp, mac_offset + 0, &hi) && 12495 if (!(tp->tg3_flags3 & TG3_FLG3_NO_NVRAM) &&
12496 !tg3_nvram_read_be32(tp, mac_offset + 0, &hi) &&
12458 !tg3_nvram_read_be32(tp, mac_offset + 4, &lo)) { 12497 !tg3_nvram_read_be32(tp, mac_offset + 4, &lo)) {
12459 memcpy(&dev->dev_addr[0], ((char *)&hi) + 2, 2); 12498 memcpy(&dev->dev_addr[0], ((char *)&hi) + 2, 2);
12460 memcpy(&dev->dev_addr[2], (char *)&lo, sizeof(lo)); 12499 memcpy(&dev->dev_addr[2], (char *)&lo, sizeof(lo));
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index cb4c62abdd21..b3347c41a1a3 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -95,6 +95,8 @@
95#define CHIPREV_ID_5752_A1 0x6001 95#define CHIPREV_ID_5752_A1 0x6001
96#define CHIPREV_ID_5714_A2 0x9002 96#define CHIPREV_ID_5714_A2 0x9002
97#define CHIPREV_ID_5906_A1 0xc001 97#define CHIPREV_ID_5906_A1 0xc001
98#define CHIPREV_ID_57780_A0 0x57780000
99#define CHIPREV_ID_57780_A1 0x57780001
98#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) 100#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
99#define ASIC_REV_5700 0x07 101#define ASIC_REV_5700 0x07
100#define ASIC_REV_5701 0x00 102#define ASIC_REV_5701 0x00
@@ -1697,6 +1699,8 @@
1697 1699
1698#define PCIE_PWR_MGMT_THRESH 0x00007d28 1700#define PCIE_PWR_MGMT_THRESH 0x00007d28
1699#define PCIE_PWR_MGMT_L1_THRESH_MSK 0x0000ff00 1701#define PCIE_PWR_MGMT_L1_THRESH_MSK 0x0000ff00
1702#define PCIE_PWR_MGMT_L1_THRESH_4MS 0x0000ff00
1703#define PCIE_PWR_MGMT_EXT_ASPM_TMR_EN 0x01000000
1700 1704
1701 1705
1702/* OTP bit definitions */ 1706/* OTP bit definitions */
@@ -2501,6 +2505,7 @@ struct tg3 {
2501 struct tg3_hw_status *hw_status; 2505 struct tg3_hw_status *hw_status;
2502 dma_addr_t status_mapping; 2506 dma_addr_t status_mapping;
2503 u32 last_tag; 2507 u32 last_tag;
2508 u32 last_irq_tag;
2504 2509
2505 u32 msg_enable; 2510 u32 msg_enable;
2506 2511
@@ -2635,6 +2640,7 @@ struct tg3 {
2635#define TG3_FLG3_CLKREQ_BUG 0x00000800 2640#define TG3_FLG3_CLKREQ_BUG 0x00000800
2636#define TG3_FLG3_PHY_ENABLE_APD 0x00001000 2641#define TG3_FLG3_PHY_ENABLE_APD 0x00001000
2637#define TG3_FLG3_5755_PLUS 0x00002000 2642#define TG3_FLG3_5755_PLUS 0x00002000
2643#define TG3_FLG3_NO_NVRAM 0x00004000
2638 2644
2639 struct timer_list timer; 2645 struct timer_list timer;
2640 u16 timer_counter; 2646 u16 timer_counter;
diff --git a/drivers/net/tulip/de4x5.c b/drivers/net/tulip/de4x5.c
index f9491bd787d1..32256179a205 100644
--- a/drivers/net/tulip/de4x5.c
+++ b/drivers/net/tulip/de4x5.c
@@ -1099,7 +1099,7 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev)
1099 struct pci_dev *pdev = NULL; 1099 struct pci_dev *pdev = NULL;
1100 int i, status=0; 1100 int i, status=0;
1101 1101
1102 gendev->driver_data = dev; 1102 dev_set_drvdata(gendev, dev);
1103 1103
1104 /* Ensure we're not sleeping */ 1104 /* Ensure we're not sleeping */
1105 if (lp->bus == EISA) { 1105 if (lp->bus == EISA) {
@@ -2094,7 +2094,7 @@ static int __devexit de4x5_eisa_remove (struct device *device)
2094 struct net_device *dev; 2094 struct net_device *dev;
2095 u_long iobase; 2095 u_long iobase;
2096 2096
2097 dev = device->driver_data; 2097 dev = dev_get_drvdata(device);
2098 iobase = dev->base_addr; 2098 iobase = dev->base_addr;
2099 2099
2100 unregister_netdev (dev); 2100 unregister_netdev (dev);
@@ -2338,7 +2338,7 @@ static void __devexit de4x5_pci_remove (struct pci_dev *pdev)
2338 struct net_device *dev; 2338 struct net_device *dev;
2339 u_long iobase; 2339 u_long iobase;
2340 2340
2341 dev = pdev->dev.driver_data; 2341 dev = dev_get_drvdata(&pdev->dev);
2342 iobase = dev->base_addr; 2342 iobase = dev->base_addr;
2343 2343
2344 unregister_netdev (dev); 2344 unregister_netdev (dev);
diff --git a/drivers/net/tulip/winbond-840.c b/drivers/net/tulip/winbond-840.c
index 264e61404f34..842b1a2c40d4 100644
--- a/drivers/net/tulip/winbond-840.c
+++ b/drivers/net/tulip/winbond-840.c
@@ -1601,8 +1601,7 @@ static int w840_suspend (struct pci_dev *pdev, pm_message_t state)
1601 1601
1602 /* no more hardware accesses behind this line. */ 1602 /* no more hardware accesses behind this line. */
1603 1603
1604 BUG_ON(np->csr6); 1604 BUG_ON(np->csr6 || ioread32(ioaddr + IntrEnable));
1605 if (ioread32(ioaddr + IntrEnable)) BUG();
1606 1605
1607 /* pci_power_off(pdev, -1); */ 1606 /* pci_power_off(pdev, -1); */
1608 1607
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 735bf41c654a..4cda69b6b28c 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -540,31 +540,34 @@ static inline struct sk_buff *tun_alloc_skb(struct tun_struct *tun,
540 540
541/* Get packet from user space buffer */ 541/* Get packet from user space buffer */
542static __inline__ ssize_t tun_get_user(struct tun_struct *tun, 542static __inline__ ssize_t tun_get_user(struct tun_struct *tun,
543 struct iovec *iv, size_t count, 543 const struct iovec *iv, size_t count,
544 int noblock) 544 int noblock)
545{ 545{
546 struct tun_pi pi = { 0, cpu_to_be16(ETH_P_IP) }; 546 struct tun_pi pi = { 0, cpu_to_be16(ETH_P_IP) };
547 struct sk_buff *skb; 547 struct sk_buff *skb;
548 size_t len = count, align = 0; 548 size_t len = count, align = 0;
549 struct virtio_net_hdr gso = { 0 }; 549 struct virtio_net_hdr gso = { 0 };
550 int offset = 0;
550 551
551 if (!(tun->flags & TUN_NO_PI)) { 552 if (!(tun->flags & TUN_NO_PI)) {
552 if ((len -= sizeof(pi)) > count) 553 if ((len -= sizeof(pi)) > count)
553 return -EINVAL; 554 return -EINVAL;
554 555
555 if(memcpy_fromiovec((void *)&pi, iv, sizeof(pi))) 556 if (memcpy_fromiovecend((void *)&pi, iv, 0, sizeof(pi)))
556 return -EFAULT; 557 return -EFAULT;
558 offset += sizeof(pi);
557 } 559 }
558 560
559 if (tun->flags & TUN_VNET_HDR) { 561 if (tun->flags & TUN_VNET_HDR) {
560 if ((len -= sizeof(gso)) > count) 562 if ((len -= sizeof(gso)) > count)
561 return -EINVAL; 563 return -EINVAL;
562 564
563 if (memcpy_fromiovec((void *)&gso, iv, sizeof(gso))) 565 if (memcpy_fromiovecend((void *)&gso, iv, offset, sizeof(gso)))
564 return -EFAULT; 566 return -EFAULT;
565 567
566 if (gso.hdr_len > len) 568 if (gso.hdr_len > len)
567 return -EINVAL; 569 return -EINVAL;
570 offset += sizeof(pi);
568 } 571 }
569 572
570 if ((tun->flags & TUN_TYPE_MASK) == TUN_TAP_DEV) { 573 if ((tun->flags & TUN_TYPE_MASK) == TUN_TAP_DEV) {
@@ -581,7 +584,7 @@ static __inline__ ssize_t tun_get_user(struct tun_struct *tun,
581 return PTR_ERR(skb); 584 return PTR_ERR(skb);
582 } 585 }
583 586
584 if (skb_copy_datagram_from_iovec(skb, 0, iv, len)) { 587 if (skb_copy_datagram_from_iovec(skb, 0, iv, offset, len)) {
585 tun->dev->stats.rx_dropped++; 588 tun->dev->stats.rx_dropped++;
586 kfree_skb(skb); 589 kfree_skb(skb);
587 return -EFAULT; 590 return -EFAULT;
@@ -673,7 +676,7 @@ static ssize_t tun_chr_aio_write(struct kiocb *iocb, const struct iovec *iv,
673 676
674 DBG(KERN_INFO "%s: tun_chr_write %ld\n", tun->dev->name, count); 677 DBG(KERN_INFO "%s: tun_chr_write %ld\n", tun->dev->name, count);
675 678
676 result = tun_get_user(tun, (struct iovec *)iv, iov_length(iv, count), 679 result = tun_get_user(tun, iv, iov_length(iv, count),
677 file->f_flags & O_NONBLOCK); 680 file->f_flags & O_NONBLOCK);
678 681
679 tun_put(tun); 682 tun_put(tun);
@@ -683,7 +686,7 @@ static ssize_t tun_chr_aio_write(struct kiocb *iocb, const struct iovec *iv,
683/* Put packet to the user space buffer */ 686/* Put packet to the user space buffer */
684static __inline__ ssize_t tun_put_user(struct tun_struct *tun, 687static __inline__ ssize_t tun_put_user(struct tun_struct *tun,
685 struct sk_buff *skb, 688 struct sk_buff *skb,
686 struct iovec *iv, int len) 689 const struct iovec *iv, int len)
687{ 690{
688 struct tun_pi pi = { 0, skb->protocol }; 691 struct tun_pi pi = { 0, skb->protocol };
689 ssize_t total = 0; 692 ssize_t total = 0;
@@ -697,7 +700,7 @@ static __inline__ ssize_t tun_put_user(struct tun_struct *tun,
697 pi.flags |= TUN_PKT_STRIP; 700 pi.flags |= TUN_PKT_STRIP;
698 } 701 }
699 702
700 if (memcpy_toiovec(iv, (void *) &pi, sizeof(pi))) 703 if (memcpy_toiovecend(iv, (void *) &pi, 0, sizeof(pi)))
701 return -EFAULT; 704 return -EFAULT;
702 total += sizeof(pi); 705 total += sizeof(pi);
703 } 706 }
@@ -730,14 +733,15 @@ static __inline__ ssize_t tun_put_user(struct tun_struct *tun,
730 gso.csum_offset = skb->csum_offset; 733 gso.csum_offset = skb->csum_offset;
731 } /* else everything is zero */ 734 } /* else everything is zero */
732 735
733 if (unlikely(memcpy_toiovec(iv, (void *)&gso, sizeof(gso)))) 736 if (unlikely(memcpy_toiovecend(iv, (void *)&gso, total,
737 sizeof(gso))))
734 return -EFAULT; 738 return -EFAULT;
735 total += sizeof(gso); 739 total += sizeof(gso);
736 } 740 }
737 741
738 len = min_t(int, skb->len, len); 742 len = min_t(int, skb->len, len);
739 743
740 skb_copy_datagram_iovec(skb, 0, iv, len); 744 skb_copy_datagram_const_iovec(skb, 0, iv, total, len);
741 total += len; 745 total += len;
742 746
743 tun->dev->stats.tx_packets++; 747 tun->dev->stats.tx_packets++;
@@ -792,7 +796,7 @@ static ssize_t tun_chr_aio_read(struct kiocb *iocb, const struct iovec *iv,
792 } 796 }
793 netif_wake_queue(tun->dev); 797 netif_wake_queue(tun->dev);
794 798
795 ret = tun_put_user(tun, skb, (struct iovec *) iv, len); 799 ret = tun_put_user(tun, skb, iv, len);
796 kfree_skb(skb); 800 kfree_skb(skb);
797 break; 801 break;
798 } 802 }
@@ -861,6 +865,52 @@ static struct proto tun_proto = {
861 .obj_size = sizeof(struct tun_sock), 865 .obj_size = sizeof(struct tun_sock),
862}; 866};
863 867
868static int tun_flags(struct tun_struct *tun)
869{
870 int flags = 0;
871
872 if (tun->flags & TUN_TUN_DEV)
873 flags |= IFF_TUN;
874 else
875 flags |= IFF_TAP;
876
877 if (tun->flags & TUN_NO_PI)
878 flags |= IFF_NO_PI;
879
880 if (tun->flags & TUN_ONE_QUEUE)
881 flags |= IFF_ONE_QUEUE;
882
883 if (tun->flags & TUN_VNET_HDR)
884 flags |= IFF_VNET_HDR;
885
886 return flags;
887}
888
889static ssize_t tun_show_flags(struct device *dev, struct device_attribute *attr,
890 char *buf)
891{
892 struct tun_struct *tun = netdev_priv(to_net_dev(dev));
893 return sprintf(buf, "0x%x\n", tun_flags(tun));
894}
895
896static ssize_t tun_show_owner(struct device *dev, struct device_attribute *attr,
897 char *buf)
898{
899 struct tun_struct *tun = netdev_priv(to_net_dev(dev));
900 return sprintf(buf, "%d\n", tun->owner);
901}
902
903static ssize_t tun_show_group(struct device *dev, struct device_attribute *attr,
904 char *buf)
905{
906 struct tun_struct *tun = netdev_priv(to_net_dev(dev));
907 return sprintf(buf, "%d\n", tun->group);
908}
909
910static DEVICE_ATTR(tun_flags, 0444, tun_show_flags, NULL);
911static DEVICE_ATTR(owner, 0444, tun_show_owner, NULL);
912static DEVICE_ATTR(group, 0444, tun_show_group, NULL);
913
864static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr) 914static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr)
865{ 915{
866 struct sock *sk; 916 struct sock *sk;
@@ -870,6 +920,8 @@ static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr)
870 920
871 dev = __dev_get_by_name(net, ifr->ifr_name); 921 dev = __dev_get_by_name(net, ifr->ifr_name);
872 if (dev) { 922 if (dev) {
923 if (ifr->ifr_flags & IFF_TUN_EXCL)
924 return -EBUSY;
873 if ((ifr->ifr_flags & IFF_TUN) && dev->netdev_ops == &tun_netdev_ops) 925 if ((ifr->ifr_flags & IFF_TUN) && dev->netdev_ops == &tun_netdev_ops)
874 tun = netdev_priv(dev); 926 tun = netdev_priv(dev);
875 else if ((ifr->ifr_flags & IFF_TAP) && dev->netdev_ops == &tap_netdev_ops) 927 else if ((ifr->ifr_flags & IFF_TAP) && dev->netdev_ops == &tap_netdev_ops)
@@ -944,6 +996,11 @@ static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr)
944 if (err < 0) 996 if (err < 0)
945 goto err_free_sk; 997 goto err_free_sk;
946 998
999 if (device_create_file(&tun->dev->dev, &dev_attr_tun_flags) ||
1000 device_create_file(&tun->dev->dev, &dev_attr_owner) ||
1001 device_create_file(&tun->dev->dev, &dev_attr_group))
1002 printk(KERN_ERR "Failed to create tun sysfs files\n");
1003
947 sk->sk_destruct = tun_sock_destruct; 1004 sk->sk_destruct = tun_sock_destruct;
948 1005
949 err = tun_attach(tun, file); 1006 err = tun_attach(tun, file);
@@ -996,21 +1053,7 @@ static int tun_get_iff(struct net *net, struct file *file, struct ifreq *ifr)
996 1053
997 strcpy(ifr->ifr_name, tun->dev->name); 1054 strcpy(ifr->ifr_name, tun->dev->name);
998 1055
999 ifr->ifr_flags = 0; 1056 ifr->ifr_flags = tun_flags(tun);
1000
1001 if (ifr->ifr_flags & TUN_TUN_DEV)
1002 ifr->ifr_flags |= IFF_TUN;
1003 else
1004 ifr->ifr_flags |= IFF_TAP;
1005
1006 if (tun->flags & TUN_NO_PI)
1007 ifr->ifr_flags |= IFF_NO_PI;
1008
1009 if (tun->flags & TUN_ONE_QUEUE)
1010 ifr->ifr_flags |= IFF_ONE_QUEUE;
1011
1012 if (tun->flags & TUN_VNET_HDR)
1013 ifr->ifr_flags |= IFF_VNET_HDR;
1014 1057
1015 tun_put(tun); 1058 tun_put(tun);
1016 return 0; 1059 return 0;
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 44f8392da117..0cf22c4f123b 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -27,6 +27,7 @@
27#include <linux/mii.h> 27#include <linux/mii.h>
28#include <linux/phy.h> 28#include <linux/phy.h>
29#include <linux/workqueue.h> 29#include <linux/workqueue.h>
30#include <linux/of_mdio.h>
30#include <linux/of_platform.h> 31#include <linux/of_platform.h>
31 32
32#include <asm/uaccess.h> 33#include <asm/uaccess.h>
@@ -1543,12 +1544,14 @@ static int init_phy(struct net_device *dev)
1543 priv->oldspeed = 0; 1544 priv->oldspeed = 0;
1544 priv->oldduplex = -1; 1545 priv->oldduplex = -1;
1545 1546
1546 phydev = phy_connect(dev, ug_info->phy_bus_id, &adjust_link, 0, 1547 if (!ug_info->phy_node)
1547 priv->phy_interface); 1548 return 0;
1548 1549
1549 if (IS_ERR(phydev)) { 1550 phydev = of_phy_connect(dev, ug_info->phy_node, &adjust_link, 0,
1551 priv->phy_interface);
1552 if (!phydev) {
1550 printk("%s: Could not attach to PHY\n", dev->name); 1553 printk("%s: Could not attach to PHY\n", dev->name);
1551 return PTR_ERR(phydev); 1554 return -ENODEV;
1552 } 1555 }
1553 1556
1554 phydev->supported &= (ADVERTISED_10baseT_Half | 1557 phydev->supported &= (ADVERTISED_10baseT_Half |
@@ -3217,7 +3220,7 @@ static int ucc_geth_tx(struct net_device *dev, u8 txQ)
3217 dev->stats.tx_packets++; 3220 dev->stats.tx_packets++;
3218 3221
3219 /* Free the sk buffer associated with this TxBD */ 3222 /* Free the sk buffer associated with this TxBD */
3220 dev_kfree_skb_irq(ugeth-> 3223 dev_kfree_skb(ugeth->
3221 tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]]); 3224 tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]]);
3222 ugeth->tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]] = NULL; 3225 ugeth->tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]] = NULL;
3223 ugeth->skb_dirtytx[txQ] = 3226 ugeth->skb_dirtytx[txQ] =
@@ -3251,9 +3254,15 @@ static int ucc_geth_poll(struct napi_struct *napi, int budget)
3251 for (i = 0; i < ug_info->numQueuesRx; i++) 3254 for (i = 0; i < ug_info->numQueuesRx; i++)
3252 howmany += ucc_geth_rx(ugeth, i, budget - howmany); 3255 howmany += ucc_geth_rx(ugeth, i, budget - howmany);
3253 3256
3257 /* Tx event processing */
3258 spin_lock(&ugeth->lock);
3259 for (i = 0; i < ug_info->numQueuesTx; i++)
3260 ucc_geth_tx(ugeth->ndev, i);
3261 spin_unlock(&ugeth->lock);
3262
3254 if (howmany < budget) { 3263 if (howmany < budget) {
3255 napi_complete(napi); 3264 napi_complete(napi);
3256 setbits32(ugeth->uccf->p_uccm, UCCE_RX_EVENTS); 3265 setbits32(ugeth->uccf->p_uccm, UCCE_RX_EVENTS | UCCE_TX_EVENTS);
3257 } 3266 }
3258 3267
3259 return howmany; 3268 return howmany;
@@ -3267,8 +3276,6 @@ static irqreturn_t ucc_geth_irq_handler(int irq, void *info)
3267 struct ucc_geth_info *ug_info; 3276 struct ucc_geth_info *ug_info;
3268 register u32 ucce; 3277 register u32 ucce;
3269 register u32 uccm; 3278 register u32 uccm;
3270 register u32 tx_mask;
3271 u8 i;
3272 3279
3273 ugeth_vdbg("%s: IN", __func__); 3280 ugeth_vdbg("%s: IN", __func__);
3274 3281
@@ -3282,27 +3289,14 @@ static irqreturn_t ucc_geth_irq_handler(int irq, void *info)
3282 out_be32(uccf->p_ucce, ucce); 3289 out_be32(uccf->p_ucce, ucce);
3283 3290
3284 /* check for receive events that require processing */ 3291 /* check for receive events that require processing */
3285 if (ucce & UCCE_RX_EVENTS) { 3292 if (ucce & (UCCE_RX_EVENTS | UCCE_TX_EVENTS)) {
3286 if (napi_schedule_prep(&ugeth->napi)) { 3293 if (napi_schedule_prep(&ugeth->napi)) {
3287 uccm &= ~UCCE_RX_EVENTS; 3294 uccm &= ~(UCCE_RX_EVENTS | UCCE_TX_EVENTS);
3288 out_be32(uccf->p_uccm, uccm); 3295 out_be32(uccf->p_uccm, uccm);
3289 __napi_schedule(&ugeth->napi); 3296 __napi_schedule(&ugeth->napi);
3290 } 3297 }
3291 } 3298 }
3292 3299
3293 /* Tx event processing */
3294 if (ucce & UCCE_TX_EVENTS) {
3295 spin_lock(&ugeth->lock);
3296 tx_mask = UCC_GETH_UCCE_TXB0;
3297 for (i = 0; i < ug_info->numQueuesTx; i++) {
3298 if (ucce & tx_mask)
3299 ucc_geth_tx(dev, i);
3300 ucce &= ~tx_mask;
3301 tx_mask <<= 1;
3302 }
3303 spin_unlock(&ugeth->lock);
3304 }
3305
3306 /* Errors and other events */ 3300 /* Errors and other events */
3307 if (ucce & UCCE_OTHER) { 3301 if (ucce & UCCE_OTHER) {
3308 if (ucce & UCC_GETH_UCCE_BSY) 3302 if (ucce & UCC_GETH_UCCE_BSY)
@@ -3331,6 +3325,37 @@ static void ucc_netpoll(struct net_device *dev)
3331} 3325}
3332#endif /* CONFIG_NET_POLL_CONTROLLER */ 3326#endif /* CONFIG_NET_POLL_CONTROLLER */
3333 3327
3328static int ucc_geth_set_mac_addr(struct net_device *dev, void *p)
3329{
3330 struct ucc_geth_private *ugeth = netdev_priv(dev);
3331 struct sockaddr *addr = p;
3332
3333 if (!is_valid_ether_addr(addr->sa_data))
3334 return -EADDRNOTAVAIL;
3335
3336 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
3337
3338 /*
3339 * If device is not running, we will set mac addr register
3340 * when opening the device.
3341 */
3342 if (!netif_running(dev))
3343 return 0;
3344
3345 spin_lock_irq(&ugeth->lock);
3346 init_mac_station_addr_regs(dev->dev_addr[0],
3347 dev->dev_addr[1],
3348 dev->dev_addr[2],
3349 dev->dev_addr[3],
3350 dev->dev_addr[4],
3351 dev->dev_addr[5],
3352 &ugeth->ug_regs->macstnaddr1,
3353 &ugeth->ug_regs->macstnaddr2);
3354 spin_unlock_irq(&ugeth->lock);
3355
3356 return 0;
3357}
3358
3334/* Called when something needs to use the ethernet device */ 3359/* Called when something needs to use the ethernet device */
3335/* Returns 0 for success. */ 3360/* Returns 0 for success. */
3336static int ucc_geth_open(struct net_device *dev) 3361static int ucc_geth_open(struct net_device *dev)
@@ -3507,7 +3532,7 @@ static const struct net_device_ops ucc_geth_netdev_ops = {
3507 .ndo_stop = ucc_geth_close, 3532 .ndo_stop = ucc_geth_close,
3508 .ndo_start_xmit = ucc_geth_start_xmit, 3533 .ndo_start_xmit = ucc_geth_start_xmit,
3509 .ndo_validate_addr = eth_validate_addr, 3534 .ndo_validate_addr = eth_validate_addr,
3510 .ndo_set_mac_address = eth_mac_addr, 3535 .ndo_set_mac_address = ucc_geth_set_mac_addr,
3511 .ndo_change_mtu = eth_change_mtu, 3536 .ndo_change_mtu = eth_change_mtu,
3512 .ndo_set_multicast_list = ucc_geth_set_multi, 3537 .ndo_set_multicast_list = ucc_geth_set_multi,
3513 .ndo_tx_timeout = ucc_geth_timeout, 3538 .ndo_tx_timeout = ucc_geth_timeout,
@@ -3520,14 +3545,12 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
3520{ 3545{
3521 struct device *device = &ofdev->dev; 3546 struct device *device = &ofdev->dev;
3522 struct device_node *np = ofdev->node; 3547 struct device_node *np = ofdev->node;
3523 struct device_node *mdio;
3524 struct net_device *dev = NULL; 3548 struct net_device *dev = NULL;
3525 struct ucc_geth_private *ugeth = NULL; 3549 struct ucc_geth_private *ugeth = NULL;
3526 struct ucc_geth_info *ug_info; 3550 struct ucc_geth_info *ug_info;
3527 struct resource res; 3551 struct resource res;
3528 struct device_node *phy; 3552 struct device_node *phy;
3529 int err, ucc_num, max_speed = 0; 3553 int err, ucc_num, max_speed = 0;
3530 const phandle *ph;
3531 const u32 *fixed_link; 3554 const u32 *fixed_link;
3532 const unsigned int *prop; 3555 const unsigned int *prop;
3533 const char *sprop; 3556 const char *sprop;
@@ -3627,40 +3650,13 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
3627 ug_info->uf_info.irq = irq_of_parse_and_map(np, 0); 3650 ug_info->uf_info.irq = irq_of_parse_and_map(np, 0);
3628 fixed_link = of_get_property(np, "fixed-link", NULL); 3651 fixed_link = of_get_property(np, "fixed-link", NULL);
3629 if (fixed_link) { 3652 if (fixed_link) {
3630 snprintf(ug_info->phy_bus_id, sizeof(ug_info->phy_bus_id),
3631 PHY_ID_FMT, "0", fixed_link[0]);
3632 phy = NULL; 3653 phy = NULL;
3633 } else { 3654 } else {
3634 char bus_name[MII_BUS_ID_SIZE]; 3655 phy = of_parse_phandle(np, "phy-handle", 0);
3635
3636 ph = of_get_property(np, "phy-handle", NULL);
3637 phy = of_find_node_by_phandle(*ph);
3638
3639 if (phy == NULL) 3656 if (phy == NULL)
3640 return -ENODEV; 3657 return -ENODEV;
3641
3642 /* set the PHY address */
3643 prop = of_get_property(phy, "reg", NULL);
3644 if (prop == NULL)
3645 return -1;
3646
3647 /* Set the bus id */
3648 mdio = of_get_parent(phy);
3649
3650 if (mdio == NULL)
3651 return -ENODEV;
3652
3653 err = of_address_to_resource(mdio, 0, &res);
3654
3655 if (err) {
3656 of_node_put(mdio);
3657 return err;
3658 }
3659 fsl_pq_mdio_bus_name(bus_name, mdio);
3660 of_node_put(mdio);
3661 snprintf(ug_info->phy_bus_id, sizeof(ug_info->phy_bus_id),
3662 "%s:%02x", bus_name, *prop);
3663 } 3658 }
3659 ug_info->phy_node = phy;
3664 3660
3665 /* get the phy interface type, or default to MII */ 3661 /* get the phy interface type, or default to MII */
3666 prop = of_get_property(np, "phy-connection-type", NULL); 3662 prop = of_get_property(np, "phy-connection-type", NULL);
@@ -3735,7 +3731,7 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
3735 dev->netdev_ops = &ucc_geth_netdev_ops; 3731 dev->netdev_ops = &ucc_geth_netdev_ops;
3736 dev->watchdog_timeo = TX_TIMEOUT; 3732 dev->watchdog_timeo = TX_TIMEOUT;
3737 INIT_WORK(&ugeth->timeout_work, ucc_geth_timeout_work); 3733 INIT_WORK(&ugeth->timeout_work, ucc_geth_timeout_work);
3738 netif_napi_add(dev, &ugeth->napi, ucc_geth_poll, UCC_GETH_DEV_WEIGHT); 3734 netif_napi_add(dev, &ugeth->napi, ucc_geth_poll, 64);
3739 dev->mtu = 1500; 3735 dev->mtu = 1500;
3740 3736
3741 ugeth->msg_enable = netif_msg_init(debug.msg_enable, UGETH_MSG_DEFAULT); 3737 ugeth->msg_enable = netif_msg_init(debug.msg_enable, UGETH_MSG_DEFAULT);
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 2f8ee7c87efe..dca628a922ba 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -852,7 +852,6 @@ struct ucc_geth_hardware_statistics {
852/* Driver definitions */ 852/* Driver definitions */
853#define TX_BD_RING_LEN 0x10 853#define TX_BD_RING_LEN 0x10
854#define RX_BD_RING_LEN 0x10 854#define RX_BD_RING_LEN 0x10
855#define UCC_GETH_DEV_WEIGHT TX_BD_RING_LEN
856 855
857#define TX_RING_MOD_MASK(size) (size-1) 856#define TX_RING_MOD_MASK(size) (size-1)
858#define RX_RING_MOD_MASK(size) (size-1) 857#define RX_RING_MOD_MASK(size) (size-1)
@@ -1100,7 +1099,7 @@ struct ucc_geth_info {
1100 u32 eventRegMask; 1099 u32 eventRegMask;
1101 u16 pausePeriod; 1100 u16 pausePeriod;
1102 u16 extensionField; 1101 u16 extensionField;
1103 char phy_bus_id[BUS_ID_SIZE]; 1102 struct device_node *phy_node;
1104 u8 weightfactor[NUM_TX_QUEUES]; 1103 u8 weightfactor[NUM_TX_QUEUES];
1105 u8 interruptcoalescingmaxvalue[NUM_RX_QUEUES]; 1104 u8 interruptcoalescingmaxvalue[NUM_RX_QUEUES];
1106 u8 l2qt[UCC_GETH_VLAN_PRIORITY_MAX]; 1105 u8 l2qt[UCC_GETH_VLAN_PRIORITY_MAX];
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig
index dfc6cf765fbd..3717569828bf 100644
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -359,4 +359,12 @@ config USB_HSO
359 To compile this driver as a module, choose M here: the 359 To compile this driver as a module, choose M here: the
360 module will be called hso. 360 module will be called hso.
361 361
362config USB_NET_INT51X1
363 tristate "Intellon PLC based usb adapter"
364 depends on USB_USBNET
365 help
366 Choose this option if you're using a 14Mb USB-based PLC
367 (Powerline Communications) solution with an Intellon
368 INT51x1/INT5200 chip, like the "devolo dLan duo".
369
362endmenu 370endmenu
diff --git a/drivers/net/usb/Makefile b/drivers/net/usb/Makefile
index c8aef62cf2b7..b870b0b1cbe0 100644
--- a/drivers/net/usb/Makefile
+++ b/drivers/net/usb/Makefile
@@ -20,4 +20,5 @@ obj-$(CONFIG_USB_NET_CDC_SUBSET) += cdc_subset.o
20obj-$(CONFIG_USB_NET_ZAURUS) += zaurus.o 20obj-$(CONFIG_USB_NET_ZAURUS) += zaurus.o
21obj-$(CONFIG_USB_NET_MCS7830) += mcs7830.o 21obj-$(CONFIG_USB_NET_MCS7830) += mcs7830.o
22obj-$(CONFIG_USB_USBNET) += usbnet.o 22obj-$(CONFIG_USB_USBNET) += usbnet.o
23obj-$(CONFIG_USB_NET_INT51X1) += int51x1.o
23 24
diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c
index 55e8ecc3a9e5..01fd528306ec 100644
--- a/drivers/net/usb/cdc_ether.c
+++ b/drivers/net/usb/cdc_ether.c
@@ -25,7 +25,6 @@
25#include <linux/init.h> 25#include <linux/init.h>
26#include <linux/netdevice.h> 26#include <linux/netdevice.h>
27#include <linux/etherdevice.h> 27#include <linux/etherdevice.h>
28#include <linux/ctype.h>
29#include <linux/ethtool.h> 28#include <linux/ethtool.h>
30#include <linux/workqueue.h> 29#include <linux/workqueue.h>
31#include <linux/mii.h> 30#include <linux/mii.h>
@@ -389,36 +388,6 @@ static void cdc_status(struct usbnet *dev, struct urb *urb)
389 } 388 }
390} 389}
391 390
392static u8 nibble(unsigned char c)
393{
394 if (likely(isdigit(c)))
395 return c - '0';
396 c = toupper(c);
397 if (likely(isxdigit(c)))
398 return 10 + c - 'A';
399 return 0;
400}
401
402static inline int
403get_ethernet_addr(struct usbnet *dev, struct usb_cdc_ether_desc *e)
404{
405 int tmp, i;
406 unsigned char buf [13];
407
408 tmp = usb_string(dev->udev, e->iMACAddress, buf, sizeof buf);
409 if (tmp != 12) {
410 dev_dbg(&dev->udev->dev,
411 "bad MAC string %d fetch, %d\n", e->iMACAddress, tmp);
412 if (tmp >= 0)
413 tmp = -EINVAL;
414 return tmp;
415 }
416 for (i = tmp = 0; i < 6; i++, tmp += 2)
417 dev->net->dev_addr [i] =
418 (nibble(buf [tmp]) << 4) + nibble(buf [tmp + 1]);
419 return 0;
420}
421
422static int cdc_bind(struct usbnet *dev, struct usb_interface *intf) 391static int cdc_bind(struct usbnet *dev, struct usb_interface *intf)
423{ 392{
424 int status; 393 int status;
@@ -428,7 +397,7 @@ static int cdc_bind(struct usbnet *dev, struct usb_interface *intf)
428 if (status < 0) 397 if (status < 0)
429 return status; 398 return status;
430 399
431 status = get_ethernet_addr(dev, info->ether); 400 status = usbnet_get_ethernet_addr(dev, info->ether->iMACAddress);
432 if (status < 0) { 401 if (status < 0) {
433 usb_set_intfdata(info->data, NULL); 402 usb_set_intfdata(info->data, NULL);
434 usb_driver_release_interface(driver_of(intf), info->data); 403 usb_driver_release_interface(driver_of(intf), info->data);
diff --git a/drivers/net/usb/dm9601.c b/drivers/net/usb/dm9601.c
index 6fc4f82b0beb..7ae82446b93a 100644
--- a/drivers/net/usb/dm9601.c
+++ b/drivers/net/usb/dm9601.c
@@ -497,10 +497,10 @@ static int dm9601_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
497 int len; 497 int len;
498 498
499 /* format: 499 /* format:
500 b0: rx status 500 b1: rx status
501 b1: packet length (incl crc) low 501 b2: packet length (incl crc) low
502 b2: packet length (incl crc) high 502 b3: packet length (incl crc) high
503 b3..n-4: packet data 503 b4..n-4: packet data
504 bn-3..bn: ethernet crc 504 bn-3..bn: ethernet crc
505 */ 505 */
506 506
@@ -533,8 +533,8 @@ static struct sk_buff *dm9601_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
533 int len; 533 int len;
534 534
535 /* format: 535 /* format:
536 b0: packet length low 536 b1: packet length low
537 b1: packet length high 537 b2: packet length high
538 b3..n: packet data 538 b3..n: packet data
539 */ 539 */
540 540
diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c
index f84b78d94c40..837135f0390a 100644
--- a/drivers/net/usb/hso.c
+++ b/drivers/net/usb/hso.c
@@ -482,7 +482,7 @@ static ssize_t hso_sysfs_show_porttype(struct device *dev,
482 struct device_attribute *attr, 482 struct device_attribute *attr,
483 char *buf) 483 char *buf)
484{ 484{
485 struct hso_device *hso_dev = dev->driver_data; 485 struct hso_device *hso_dev = dev_get_drvdata(dev);
486 char *port_name; 486 char *port_name;
487 487
488 if (!hso_dev) 488 if (!hso_dev)
@@ -2313,7 +2313,7 @@ static int hso_serial_common_create(struct hso_serial *serial, int num_urbs,
2313 serial->parent->dev = tty_register_device(tty_drv, minor, 2313 serial->parent->dev = tty_register_device(tty_drv, minor,
2314 &serial->parent->interface->dev); 2314 &serial->parent->interface->dev);
2315 dev = serial->parent->dev; 2315 dev = serial->parent->dev;
2316 dev->driver_data = serial->parent; 2316 dev_set_drvdata(dev, serial->parent);
2317 i = device_create_file(dev, &dev_attr_hsotype); 2317 i = device_create_file(dev, &dev_attr_hsotype);
2318 2318
2319 /* fill in specific data for later use */ 2319 /* fill in specific data for later use */
@@ -2484,7 +2484,7 @@ static int add_net_device(struct hso_device *hso_dev)
2484static int hso_radio_toggle(void *data, enum rfkill_state state) 2484static int hso_radio_toggle(void *data, enum rfkill_state state)
2485{ 2485{
2486 struct hso_device *hso_dev = data; 2486 struct hso_device *hso_dev = data;
2487 int enabled = (state == RFKILL_STATE_ON); 2487 int enabled = (state == RFKILL_STATE_UNBLOCKED);
2488 int rv; 2488 int rv;
2489 2489
2490 mutex_lock(&hso_dev->mutex); 2490 mutex_lock(&hso_dev->mutex);
@@ -2522,7 +2522,7 @@ static void hso_create_rfkill(struct hso_device *hso_dev,
2522 snprintf(rfkn, 20, "hso-%d", 2522 snprintf(rfkn, 20, "hso-%d",
2523 interface->altsetting->desc.bInterfaceNumber); 2523 interface->altsetting->desc.bInterfaceNumber);
2524 hso_net->rfkill->name = rfkn; 2524 hso_net->rfkill->name = rfkn;
2525 hso_net->rfkill->state = RFKILL_STATE_ON; 2525 hso_net->rfkill->state = RFKILL_STATE_UNBLOCKED;
2526 hso_net->rfkill->data = hso_dev; 2526 hso_net->rfkill->data = hso_dev;
2527 hso_net->rfkill->toggle_radio = hso_radio_toggle; 2527 hso_net->rfkill->toggle_radio = hso_radio_toggle;
2528 if (rfkill_register(hso_net->rfkill) < 0) { 2528 if (rfkill_register(hso_net->rfkill) < 0) {
diff --git a/drivers/net/usb/int51x1.c b/drivers/net/usb/int51x1.c
new file mode 100644
index 000000000000..55cf7081de10
--- /dev/null
+++ b/drivers/net/usb/int51x1.c
@@ -0,0 +1,253 @@
1/*
2 * Copyright (c) 2009 Peter Holik
3 *
4 * Intellon usb PLC (Powerline Communications) usb net driver
5 *
6 * http://www.tandel.be/downloads/INT51X1_Datasheet.pdf
7 *
8 * Based on the work of Jan 'RedBully' Seiffert
9 */
10
11/*
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or.
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <linux/module.h>
28#include <linux/ctype.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
31#include <linux/ethtool.h>
32#include <linux/mii.h>
33#include <linux/usb.h>
34#include <linux/usb/usbnet.h>
35
36#define INT51X1_VENDOR_ID 0x09e1
37#define INT51X1_PRODUCT_ID 0x5121
38
39#define INT51X1_HEADER_SIZE 2 /* 2 byte header */
40
41#define PACKET_TYPE_PROMISCUOUS (1 << 0)
42#define PACKET_TYPE_ALL_MULTICAST (1 << 1) /* no filter */
43#define PACKET_TYPE_DIRECTED (1 << 2)
44#define PACKET_TYPE_BROADCAST (1 << 3)
45#define PACKET_TYPE_MULTICAST (1 << 4) /* filtered */
46
47#define SET_ETHERNET_PACKET_FILTER 0x43
48
49static int int51x1_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
50{
51 int len;
52
53 if (!(pskb_may_pull(skb, INT51X1_HEADER_SIZE))) {
54 deverr(dev, "unexpected tiny rx frame");
55 return 0;
56 }
57
58 len = le16_to_cpu(*(__le16 *)&skb->data[skb->len - 2]);
59
60 skb_trim(skb, len);
61
62 return 1;
63}
64
65static struct sk_buff *int51x1_tx_fixup(struct usbnet *dev,
66 struct sk_buff *skb, gfp_t flags)
67{
68 int pack_len = skb->len;
69 int pack_with_header_len = pack_len + INT51X1_HEADER_SIZE;
70 int headroom = skb_headroom(skb);
71 int tailroom = skb_tailroom(skb);
72 int need_tail = 0;
73 __le16 *len;
74
75 /* if packet and our header is smaler than 64 pad to 64 (+ ZLP) */
76 if ((pack_with_header_len) < dev->maxpacket)
77 need_tail = dev->maxpacket - pack_with_header_len + 1;
78 /*
79 * usbnet would send a ZLP if packetlength mod urbsize == 0 for us,
80 * but we need to know ourself, because this would add to the length
81 * we send down to the device...
82 */
83 else if (!(pack_with_header_len % dev->maxpacket))
84 need_tail = 1;
85
86 if (!skb_cloned(skb) &&
87 (headroom + tailroom >= need_tail + INT51X1_HEADER_SIZE)) {
88 if (headroom < INT51X1_HEADER_SIZE || tailroom < need_tail) {
89 skb->data = memmove(skb->head + INT51X1_HEADER_SIZE,
90 skb->data, skb->len);
91 skb_set_tail_pointer(skb, skb->len);
92 }
93 } else {
94 struct sk_buff *skb2;
95
96 skb2 = skb_copy_expand(skb,
97 INT51X1_HEADER_SIZE,
98 need_tail,
99 flags);
100 dev_kfree_skb_any(skb);
101 if (!skb2)
102 return NULL;
103 skb = skb2;
104 }
105
106 pack_len += need_tail;
107 pack_len &= 0x07ff;
108
109 len = (__le16 *) __skb_push(skb, INT51X1_HEADER_SIZE);
110 *len = cpu_to_le16(pack_len);
111
112 if(need_tail)
113 memset(__skb_put(skb, need_tail), 0, need_tail);
114
115 return skb;
116}
117
118static void int51x1_async_cmd_callback(struct urb *urb)
119{
120 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
121 int status = urb->status;
122
123 if (status < 0)
124 dev_warn(&urb->dev->dev, "async callback failed with %d\n", status);
125
126 kfree(req);
127 usb_free_urb(urb);
128}
129
130static void int51x1_set_multicast(struct net_device *netdev)
131{
132 struct usb_ctrlrequest *req;
133 int status;
134 struct urb *urb;
135 struct usbnet *dev = netdev_priv(netdev);
136 u16 filter = PACKET_TYPE_DIRECTED | PACKET_TYPE_BROADCAST;
137
138 if (netdev->flags & IFF_PROMISC) {
139 /* do not expect to see traffic of other PLCs */
140 filter |= PACKET_TYPE_PROMISCUOUS;
141 devinfo(dev, "promiscuous mode enabled");
142 } else if (netdev->mc_count ||
143 (netdev->flags & IFF_ALLMULTI)) {
144 filter |= PACKET_TYPE_ALL_MULTICAST;
145 devdbg(dev, "receive all multicast enabled");
146 } else {
147 /* ~PROMISCUOUS, ~MULTICAST */
148 devdbg(dev, "receive own packets only");
149 }
150
151 urb = usb_alloc_urb(0, GFP_ATOMIC);
152 if (!urb) {
153 devwarn(dev, "Error allocating URB");
154 return;
155 }
156
157 req = kmalloc(sizeof(*req), GFP_ATOMIC);
158 if (!req) {
159 devwarn(dev, "Error allocating control msg");
160 goto out;
161 }
162
163 req->bRequestType = USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE;
164 req->bRequest = SET_ETHERNET_PACKET_FILTER;
165 req->wValue = cpu_to_le16(filter);
166 req->wIndex = 0;
167 req->wLength = 0;
168
169 usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
170 (void *)req, NULL, 0,
171 int51x1_async_cmd_callback,
172 (void *)req);
173
174 status = usb_submit_urb(urb, GFP_ATOMIC);
175 if (status < 0) {
176 devwarn(dev, "Error submitting control msg, sts=%d", status);
177 goto out1;
178 }
179 return;
180out1:
181 kfree(req);
182out:
183 usb_free_urb(urb);
184}
185
186static const struct net_device_ops int51x1_netdev_ops = {
187 .ndo_open = usbnet_open,
188 .ndo_stop = usbnet_stop,
189 .ndo_start_xmit = usbnet_start_xmit,
190 .ndo_tx_timeout = usbnet_tx_timeout,
191 .ndo_change_mtu = usbnet_change_mtu,
192 .ndo_set_mac_address = eth_mac_addr,
193 .ndo_validate_addr = eth_validate_addr,
194 .ndo_set_multicast_list = int51x1_set_multicast,
195};
196
197static int int51x1_bind(struct usbnet *dev, struct usb_interface *intf)
198{
199 int status = usbnet_get_ethernet_addr(dev, 3);
200
201 if (status)
202 return status;
203
204 dev->net->hard_header_len += INT51X1_HEADER_SIZE;
205 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
206 dev->net->netdev_ops = &int51x1_netdev_ops;
207
208 return usbnet_get_endpoints(dev, intf);
209}
210
211static const struct driver_info int51x1_info = {
212 .description = "Intellon usb powerline adapter",
213 .bind = int51x1_bind,
214 .rx_fixup = int51x1_rx_fixup,
215 .tx_fixup = int51x1_tx_fixup,
216 .in = 1,
217 .out = 2,
218 .flags = FLAG_ETHER,
219};
220
221static const struct usb_device_id products[] = {
222 {
223 USB_DEVICE(INT51X1_VENDOR_ID, INT51X1_PRODUCT_ID),
224 .driver_info = (unsigned long) &int51x1_info,
225 },
226 {},
227};
228MODULE_DEVICE_TABLE(usb, products);
229
230static struct usb_driver int51x1_driver = {
231 .name = "int51x1",
232 .id_table = products,
233 .probe = usbnet_probe,
234 .disconnect = usbnet_disconnect,
235 .suspend = usbnet_suspend,
236 .resume = usbnet_resume,
237};
238
239static int __init int51x1_init(void)
240{
241 return usb_register(&int51x1_driver);
242}
243module_init(int51x1_init);
244
245static void __exit int51x1_exit(void)
246{
247 usb_deregister(&int51x1_driver);
248}
249module_exit(int51x1_exit);
250
251MODULE_AUTHOR("Peter Holik");
252MODULE_DESCRIPTION("Intellon usb powerline adapter");
253MODULE_LICENSE("GPL");
diff --git a/drivers/net/usb/kaweth.c b/drivers/net/usb/kaweth.c
index 3d0d0b0b37c5..e01314789718 100644
--- a/drivers/net/usb/kaweth.c
+++ b/drivers/net/usb/kaweth.c
@@ -31,7 +31,6 @@
31 ****************************************************************/ 31 ****************************************************************/
32 32
33/* TODO: 33/* TODO:
34 * Fix in_interrupt() problem
35 * Develop test procedures for USB net interfaces 34 * Develop test procedures for USB net interfaces
36 * Run test procedures 35 * Run test procedures
37 * Fix bugs from previous two steps 36 * Fix bugs from previous two steps
@@ -606,14 +605,30 @@ static void kaweth_usb_receive(struct urb *urb)
606 605
607 struct sk_buff *skb; 606 struct sk_buff *skb;
608 607
609 if(unlikely(status == -ECONNRESET || status == -ESHUTDOWN)) 608 if (unlikely(status == -EPIPE)) {
610 /* we are killed - set a flag and wake the disconnect handler */ 609 kaweth->stats.rx_errors++;
611 {
612 kaweth->end = 1; 610 kaweth->end = 1;
613 wake_up(&kaweth->term_wait); 611 wake_up(&kaweth->term_wait);
612 dbg("Status was -EPIPE.");
614 return; 613 return;
615 } 614 }
616 615 if (unlikely(status == -ECONNRESET || status == -ESHUTDOWN)) {
616 /* we are killed - set a flag and wake the disconnect handler */
617 kaweth->end = 1;
618 wake_up(&kaweth->term_wait);
619 dbg("Status was -ECONNRESET or -ESHUTDOWN.");
620 return;
621 }
622 if (unlikely(status == -EPROTO || status == -ETIME ||
623 status == -EILSEQ)) {
624 kaweth->stats.rx_errors++;
625 dbg("Status was -EPROTO, -ETIME, or -EILSEQ.");
626 return;
627 }
628 if (unlikely(status == -EOVERFLOW)) {
629 kaweth->stats.rx_errors++;
630 dbg("Status was -EOVERFLOW.");
631 }
617 spin_lock(&kaweth->device_lock); 632 spin_lock(&kaweth->device_lock);
618 if (IS_BLOCKED(kaweth->status)) { 633 if (IS_BLOCKED(kaweth->status)) {
619 spin_unlock(&kaweth->device_lock); 634 spin_unlock(&kaweth->device_lock);
@@ -883,13 +898,16 @@ static void kaweth_set_rx_mode(struct net_device *net)
883 ****************************************************************/ 898 ****************************************************************/
884static void kaweth_async_set_rx_mode(struct kaweth_device *kaweth) 899static void kaweth_async_set_rx_mode(struct kaweth_device *kaweth)
885{ 900{
901 int result;
886 __u16 packet_filter_bitmap = kaweth->packet_filter_bitmap; 902 __u16 packet_filter_bitmap = kaweth->packet_filter_bitmap;
903
887 kaweth->packet_filter_bitmap = 0; 904 kaweth->packet_filter_bitmap = 0;
888 if (packet_filter_bitmap == 0) 905 if (packet_filter_bitmap == 0)
889 return; 906 return;
890 907
891 { 908 if (in_interrupt())
892 int result; 909 return;
910
893 result = kaweth_control(kaweth, 911 result = kaweth_control(kaweth,
894 usb_sndctrlpipe(kaweth->dev, 0), 912 usb_sndctrlpipe(kaweth->dev, 0),
895 KAWETH_COMMAND_SET_PACKET_FILTER, 913 KAWETH_COMMAND_SET_PACKET_FILTER,
@@ -906,7 +924,6 @@ static void kaweth_async_set_rx_mode(struct kaweth_device *kaweth)
906 else { 924 else {
907 dbg("Set Rx mode to %d", packet_filter_bitmap); 925 dbg("Set Rx mode to %d", packet_filter_bitmap);
908 } 926 }
909 }
910} 927}
911 928
912/**************************************************************** 929/****************************************************************
diff --git a/drivers/net/usb/rtl8150.c b/drivers/net/usb/rtl8150.c
index f9fb454ffa8b..fcc6fa0905d1 100644
--- a/drivers/net/usb/rtl8150.c
+++ b/drivers/net/usb/rtl8150.c
@@ -221,7 +221,8 @@ static void ctrl_callback(struct urb *urb)
221 case -ENOENT: 221 case -ENOENT:
222 break; 222 break;
223 default: 223 default:
224 dev_warn(&urb->dev->dev, "ctrl urb status %d\n", status); 224 if (printk_ratelimit())
225 dev_warn(&urb->dev->dev, "ctrl urb status %d\n", status);
225 } 226 }
226 dev = urb->context; 227 dev = urb->context;
227 clear_bit(RX_REG_SET, &dev->flags); 228 clear_bit(RX_REG_SET, &dev->flags);
@@ -442,10 +443,12 @@ static void read_bulk_callback(struct urb *urb)
442 case -ENOENT: 443 case -ENOENT:
443 return; /* the urb is in unlink state */ 444 return; /* the urb is in unlink state */
444 case -ETIME: 445 case -ETIME:
445 dev_warn(&urb->dev->dev, "may be reset is needed?..\n"); 446 if (printk_ratelimit())
447 dev_warn(&urb->dev->dev, "may be reset is needed?..\n");
446 goto goon; 448 goto goon;
447 default: 449 default:
448 dev_warn(&urb->dev->dev, "Rx status %d\n", status); 450 if (printk_ratelimit())
451 dev_warn(&urb->dev->dev, "Rx status %d\n", status);
449 goto goon; 452 goto goon;
450 } 453 }
451 454
diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c
index 5a7283372b53..89a91f8c22de 100644
--- a/drivers/net/usb/smsc95xx.c
+++ b/drivers/net/usb/smsc95xx.c
@@ -1134,7 +1134,7 @@ static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1134 if (skb->len == size) { 1134 if (skb->len == size) {
1135 if (pdata->use_rx_csum) 1135 if (pdata->use_rx_csum)
1136 smsc95xx_rx_csum_offload(skb); 1136 smsc95xx_rx_csum_offload(skb);
1137 1137 skb_trim(skb, skb->len - 4); /* remove fcs */
1138 skb->truesize = size + sizeof(struct sk_buff); 1138 skb->truesize = size + sizeof(struct sk_buff);
1139 1139
1140 return 1; 1140 return 1;
@@ -1152,7 +1152,7 @@ static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1152 1152
1153 if (pdata->use_rx_csum) 1153 if (pdata->use_rx_csum)
1154 smsc95xx_rx_csum_offload(ax_skb); 1154 smsc95xx_rx_csum_offload(ax_skb);
1155 1155 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1156 ax_skb->truesize = size + sizeof(struct sk_buff); 1156 ax_skb->truesize = size + sizeof(struct sk_buff);
1157 1157
1158 usbnet_skb_return(dev, ax_skb); 1158 usbnet_skb_return(dev, ax_skb);
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index f3a2fce6166c..c94de6243140 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -37,6 +37,7 @@
37#include <linux/init.h> 37#include <linux/init.h>
38#include <linux/netdevice.h> 38#include <linux/netdevice.h>
39#include <linux/etherdevice.h> 39#include <linux/etherdevice.h>
40#include <linux/ctype.h>
40#include <linux/ethtool.h> 41#include <linux/ethtool.h>
41#include <linux/workqueue.h> 42#include <linux/workqueue.h>
42#include <linux/mii.h> 43#include <linux/mii.h>
@@ -156,6 +157,36 @@ int usbnet_get_endpoints(struct usbnet *dev, struct usb_interface *intf)
156} 157}
157EXPORT_SYMBOL_GPL(usbnet_get_endpoints); 158EXPORT_SYMBOL_GPL(usbnet_get_endpoints);
158 159
160static u8 nibble(unsigned char c)
161{
162 if (likely(isdigit(c)))
163 return c - '0';
164 c = toupper(c);
165 if (likely(isxdigit(c)))
166 return 10 + c - 'A';
167 return 0;
168}
169
170int usbnet_get_ethernet_addr(struct usbnet *dev, int iMACAddress)
171{
172 int tmp, i;
173 unsigned char buf [13];
174
175 tmp = usb_string(dev->udev, iMACAddress, buf, sizeof buf);
176 if (tmp != 12) {
177 dev_dbg(&dev->udev->dev,
178 "bad MAC string %d fetch, %d\n", iMACAddress, tmp);
179 if (tmp >= 0)
180 tmp = -EINVAL;
181 return tmp;
182 }
183 for (i = tmp = 0; i < 6; i++, tmp += 2)
184 dev->net->dev_addr [i] =
185 (nibble(buf [tmp]) << 4) + nibble(buf [tmp + 1]);
186 return 0;
187}
188EXPORT_SYMBOL_GPL(usbnet_get_ethernet_addr);
189
159static void intr_complete (struct urb *urb); 190static void intr_complete (struct urb *urb);
160 191
161static int init_status (struct usbnet *dev, struct usb_interface *intf) 192static int init_status (struct usbnet *dev, struct usb_interface *intf)
@@ -1185,12 +1216,6 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)
1185#endif 1216#endif
1186 1217
1187 net->netdev_ops = &usbnet_netdev_ops; 1218 net->netdev_ops = &usbnet_netdev_ops;
1188#ifdef CONFIG_COMPAT_NET_DEV_OPS
1189 net->hard_start_xmit = usbnet_start_xmit;
1190 net->open = usbnet_open;
1191 net->stop = usbnet_stop;
1192 net->tx_timeout = usbnet_tx_timeout;
1193#endif
1194 net->watchdog_timeo = TX_TIMEOUT_JIFFIES; 1219 net->watchdog_timeo = TX_TIMEOUT_JIFFIES;
1195 net->ethtool_ops = &usbnet_ethtool_ops; 1220 net->ethtool_ops = &usbnet_ethtool_ops;
1196 1221
diff --git a/drivers/net/veth.c b/drivers/net/veth.c
index 8e56fcf0a0e3..87197dd9c788 100644
--- a/drivers/net/veth.c
+++ b/drivers/net/veth.c
@@ -176,8 +176,6 @@ static int veth_xmit(struct sk_buff *skb, struct net_device *dev)
176 if (dev->features & NETIF_F_NO_CSUM) 176 if (dev->features & NETIF_F_NO_CSUM)
177 skb->ip_summed = rcv_priv->ip_summed; 177 skb->ip_summed = rcv_priv->ip_summed;
178 178
179 dst_release(skb->dst);
180 skb->dst = NULL;
181 skb->mark = 0; 179 skb->mark = 0;
182 secpath_reset(skb); 180 secpath_reset(skb);
183 nf_reset(skb); 181 nf_reset(skb);
diff --git a/drivers/net/via-rhine.c b/drivers/net/via-rhine.c
index 45daba726b66..d3489a3c4c03 100644
--- a/drivers/net/via-rhine.c
+++ b/drivers/net/via-rhine.c
@@ -388,7 +388,6 @@ struct rhine_private {
388 long pioaddr; 388 long pioaddr;
389 struct net_device *dev; 389 struct net_device *dev;
390 struct napi_struct napi; 390 struct napi_struct napi;
391 struct net_device_stats stats;
392 spinlock_t lock; 391 spinlock_t lock;
393 392
394 /* Frequently used values: keep some adjacent for cache effect. */ 393 /* Frequently used values: keep some adjacent for cache effect. */
@@ -1209,7 +1208,7 @@ static void rhine_tx_timeout(struct net_device *dev)
1209 enable_irq(rp->pdev->irq); 1208 enable_irq(rp->pdev->irq);
1210 1209
1211 dev->trans_start = jiffies; 1210 dev->trans_start = jiffies;
1212 rp->stats.tx_errors++; 1211 dev->stats.tx_errors++;
1213 netif_wake_queue(dev); 1212 netif_wake_queue(dev);
1214} 1213}
1215 1214
@@ -1237,7 +1236,7 @@ static int rhine_start_tx(struct sk_buff *skb, struct net_device *dev)
1237 /* packet too long, drop it */ 1236 /* packet too long, drop it */
1238 dev_kfree_skb(skb); 1237 dev_kfree_skb(skb);
1239 rp->tx_skbuff[entry] = NULL; 1238 rp->tx_skbuff[entry] = NULL;
1240 rp->stats.tx_dropped++; 1239 dev->stats.tx_dropped++;
1241 return 0; 1240 return 0;
1242 } 1241 }
1243 1242
@@ -1378,29 +1377,33 @@ static void rhine_tx(struct net_device *dev)
1378 printk(KERN_DEBUG "%s: Transmit error, " 1377 printk(KERN_DEBUG "%s: Transmit error, "
1379 "Tx status %8.8x.\n", 1378 "Tx status %8.8x.\n",
1380 dev->name, txstatus); 1379 dev->name, txstatus);
1381 rp->stats.tx_errors++; 1380 dev->stats.tx_errors++;
1382 if (txstatus & 0x0400) rp->stats.tx_carrier_errors++; 1381 if (txstatus & 0x0400)
1383 if (txstatus & 0x0200) rp->stats.tx_window_errors++; 1382 dev->stats.tx_carrier_errors++;
1384 if (txstatus & 0x0100) rp->stats.tx_aborted_errors++; 1383 if (txstatus & 0x0200)
1385 if (txstatus & 0x0080) rp->stats.tx_heartbeat_errors++; 1384 dev->stats.tx_window_errors++;
1385 if (txstatus & 0x0100)
1386 dev->stats.tx_aborted_errors++;
1387 if (txstatus & 0x0080)
1388 dev->stats.tx_heartbeat_errors++;
1386 if (((rp->quirks & rqRhineI) && txstatus & 0x0002) || 1389 if (((rp->quirks & rqRhineI) && txstatus & 0x0002) ||
1387 (txstatus & 0x0800) || (txstatus & 0x1000)) { 1390 (txstatus & 0x0800) || (txstatus & 0x1000)) {
1388 rp->stats.tx_fifo_errors++; 1391 dev->stats.tx_fifo_errors++;
1389 rp->tx_ring[entry].tx_status = cpu_to_le32(DescOwn); 1392 rp->tx_ring[entry].tx_status = cpu_to_le32(DescOwn);
1390 break; /* Keep the skb - we try again */ 1393 break; /* Keep the skb - we try again */
1391 } 1394 }
1392 /* Transmitter restarted in 'abnormal' handler. */ 1395 /* Transmitter restarted in 'abnormal' handler. */
1393 } else { 1396 } else {
1394 if (rp->quirks & rqRhineI) 1397 if (rp->quirks & rqRhineI)
1395 rp->stats.collisions += (txstatus >> 3) & 0x0F; 1398 dev->stats.collisions += (txstatus >> 3) & 0x0F;
1396 else 1399 else
1397 rp->stats.collisions += txstatus & 0x0F; 1400 dev->stats.collisions += txstatus & 0x0F;
1398 if (debug > 6) 1401 if (debug > 6)
1399 printk(KERN_DEBUG "collisions: %1.1x:%1.1x\n", 1402 printk(KERN_DEBUG "collisions: %1.1x:%1.1x\n",
1400 (txstatus >> 3) & 0xF, 1403 (txstatus >> 3) & 0xF,
1401 txstatus & 0xF); 1404 txstatus & 0xF);
1402 rp->stats.tx_bytes += rp->tx_skbuff[entry]->len; 1405 dev->stats.tx_bytes += rp->tx_skbuff[entry]->len;
1403 rp->stats.tx_packets++; 1406 dev->stats.tx_packets++;
1404 } 1407 }
1405 /* Free the original skb. */ 1408 /* Free the original skb. */
1406 if (rp->tx_skbuff_dma[entry]) { 1409 if (rp->tx_skbuff_dma[entry]) {
@@ -1455,21 +1458,24 @@ static int rhine_rx(struct net_device *dev, int limit)
1455 printk(KERN_WARNING "%s: Oversized Ethernet " 1458 printk(KERN_WARNING "%s: Oversized Ethernet "
1456 "frame %p vs %p.\n", dev->name, 1459 "frame %p vs %p.\n", dev->name,
1457 rp->rx_head_desc, &rp->rx_ring[entry]); 1460 rp->rx_head_desc, &rp->rx_ring[entry]);
1458 rp->stats.rx_length_errors++; 1461 dev->stats.rx_length_errors++;
1459 } else if (desc_status & RxErr) { 1462 } else if (desc_status & RxErr) {
1460 /* There was a error. */ 1463 /* There was a error. */
1461 if (debug > 2) 1464 if (debug > 2)
1462 printk(KERN_DEBUG "rhine_rx() Rx " 1465 printk(KERN_DEBUG "rhine_rx() Rx "
1463 "error was %8.8x.\n", 1466 "error was %8.8x.\n",
1464 desc_status); 1467 desc_status);
1465 rp->stats.rx_errors++; 1468 dev->stats.rx_errors++;
1466 if (desc_status & 0x0030) rp->stats.rx_length_errors++; 1469 if (desc_status & 0x0030)
1467 if (desc_status & 0x0048) rp->stats.rx_fifo_errors++; 1470 dev->stats.rx_length_errors++;
1468 if (desc_status & 0x0004) rp->stats.rx_frame_errors++; 1471 if (desc_status & 0x0048)
1472 dev->stats.rx_fifo_errors++;
1473 if (desc_status & 0x0004)
1474 dev->stats.rx_frame_errors++;
1469 if (desc_status & 0x0002) { 1475 if (desc_status & 0x0002) {
1470 /* this can also be updated outside the interrupt handler */ 1476 /* this can also be updated outside the interrupt handler */
1471 spin_lock(&rp->lock); 1477 spin_lock(&rp->lock);
1472 rp->stats.rx_crc_errors++; 1478 dev->stats.rx_crc_errors++;
1473 spin_unlock(&rp->lock); 1479 spin_unlock(&rp->lock);
1474 } 1480 }
1475 } 1481 }
@@ -1513,8 +1519,8 @@ static int rhine_rx(struct net_device *dev, int limit)
1513 } 1519 }
1514 skb->protocol = eth_type_trans(skb, dev); 1520 skb->protocol = eth_type_trans(skb, dev);
1515 netif_receive_skb(skb); 1521 netif_receive_skb(skb);
1516 rp->stats.rx_bytes += pkt_len; 1522 dev->stats.rx_bytes += pkt_len;
1517 rp->stats.rx_packets++; 1523 dev->stats.rx_packets++;
1518 } 1524 }
1519 entry = (++rp->cur_rx) % RX_RING_SIZE; 1525 entry = (++rp->cur_rx) % RX_RING_SIZE;
1520 rp->rx_head_desc = &rp->rx_ring[entry]; 1526 rp->rx_head_desc = &rp->rx_ring[entry];
@@ -1599,8 +1605,8 @@ static void rhine_error(struct net_device *dev, int intr_status)
1599 if (intr_status & IntrLinkChange) 1605 if (intr_status & IntrLinkChange)
1600 rhine_check_media(dev, 0); 1606 rhine_check_media(dev, 0);
1601 if (intr_status & IntrStatsMax) { 1607 if (intr_status & IntrStatsMax) {
1602 rp->stats.rx_crc_errors += ioread16(ioaddr + RxCRCErrs); 1608 dev->stats.rx_crc_errors += ioread16(ioaddr + RxCRCErrs);
1603 rp->stats.rx_missed_errors += ioread16(ioaddr + RxMissed); 1609 dev->stats.rx_missed_errors += ioread16(ioaddr + RxMissed);
1604 clear_tally_counters(ioaddr); 1610 clear_tally_counters(ioaddr);
1605 } 1611 }
1606 if (intr_status & IntrTxAborted) { 1612 if (intr_status & IntrTxAborted) {
@@ -1654,12 +1660,12 @@ static struct net_device_stats *rhine_get_stats(struct net_device *dev)
1654 unsigned long flags; 1660 unsigned long flags;
1655 1661
1656 spin_lock_irqsave(&rp->lock, flags); 1662 spin_lock_irqsave(&rp->lock, flags);
1657 rp->stats.rx_crc_errors += ioread16(ioaddr + RxCRCErrs); 1663 dev->stats.rx_crc_errors += ioread16(ioaddr + RxCRCErrs);
1658 rp->stats.rx_missed_errors += ioread16(ioaddr + RxMissed); 1664 dev->stats.rx_missed_errors += ioread16(ioaddr + RxMissed);
1659 clear_tally_counters(ioaddr); 1665 clear_tally_counters(ioaddr);
1660 spin_unlock_irqrestore(&rp->lock, flags); 1666 spin_unlock_irqrestore(&rp->lock, flags);
1661 1667
1662 return &rp->stats; 1668 return &dev->stats;
1663} 1669}
1664 1670
1665static void rhine_set_rx_mode(struct net_device *dev) 1671static void rhine_set_rx_mode(struct net_device *dev)
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
index 754a4b182c1d..e2a7725e567e 100644
--- a/drivers/net/via-velocity.c
+++ b/drivers/net/via-velocity.c
@@ -1385,7 +1385,7 @@ static void velocity_free_td_ring(struct velocity_info *vptr)
1385 1385
1386static int velocity_rx_srv(struct velocity_info *vptr, int status) 1386static int velocity_rx_srv(struct velocity_info *vptr, int status)
1387{ 1387{
1388 struct net_device_stats *stats = &vptr->stats; 1388 struct net_device_stats *stats = &vptr->dev->stats;
1389 int rd_curr = vptr->rx.curr; 1389 int rd_curr = vptr->rx.curr;
1390 int works = 0; 1390 int works = 0;
1391 1391
@@ -1519,7 +1519,7 @@ static inline void velocity_iph_realign(struct velocity_info *vptr,
1519static int velocity_receive_frame(struct velocity_info *vptr, int idx) 1519static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1520{ 1520{
1521 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int); 1521 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1522 struct net_device_stats *stats = &vptr->stats; 1522 struct net_device_stats *stats = &vptr->dev->stats;
1523 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]); 1523 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1524 struct rx_desc *rd = &(vptr->rx.ring[idx]); 1524 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1525 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff; 1525 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
@@ -1532,7 +1532,7 @@ static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1532 } 1532 }
1533 1533
1534 if (rd->rdesc0.RSR & RSR_MAR) 1534 if (rd->rdesc0.RSR & RSR_MAR)
1535 vptr->stats.multicast++; 1535 stats->multicast++;
1536 1536
1537 skb = rd_info->skb; 1537 skb = rd_info->skb;
1538 1538
@@ -1634,7 +1634,7 @@ static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1634 int idx; 1634 int idx;
1635 int works = 0; 1635 int works = 0;
1636 struct velocity_td_info *tdinfo; 1636 struct velocity_td_info *tdinfo;
1637 struct net_device_stats *stats = &vptr->stats; 1637 struct net_device_stats *stats = &vptr->dev->stats;
1638 1638
1639 for (qnum = 0; qnum < vptr->tx.numq; qnum++) { 1639 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1640 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0; 1640 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
@@ -2324,22 +2324,22 @@ static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2324 2324
2325 /* If the hardware is down, don't touch MII */ 2325 /* If the hardware is down, don't touch MII */
2326 if(!netif_running(dev)) 2326 if(!netif_running(dev))
2327 return &vptr->stats; 2327 return &dev->stats;
2328 2328
2329 spin_lock_irq(&vptr->lock); 2329 spin_lock_irq(&vptr->lock);
2330 velocity_update_hw_mibs(vptr); 2330 velocity_update_hw_mibs(vptr);
2331 spin_unlock_irq(&vptr->lock); 2331 spin_unlock_irq(&vptr->lock);
2332 2332
2333 vptr->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts]; 2333 dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2334 vptr->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts]; 2334 dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2335 vptr->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors]; 2335 dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2336 2336
2337// unsigned long rx_dropped; /* no space in linux buffers */ 2337// unsigned long rx_dropped; /* no space in linux buffers */
2338 vptr->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions]; 2338 dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2339 /* detailed rx_errors: */ 2339 /* detailed rx_errors: */
2340// unsigned long rx_length_errors; 2340// unsigned long rx_length_errors;
2341// unsigned long rx_over_errors; /* receiver ring buff overflow */ 2341// unsigned long rx_over_errors; /* receiver ring buff overflow */
2342 vptr->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE]; 2342 dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2343// unsigned long rx_frame_errors; /* recv'd frame alignment error */ 2343// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2344// unsigned long rx_fifo_errors; /* recv'r fifo overrun */ 2344// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2345// unsigned long rx_missed_errors; /* receiver missed packet */ 2345// unsigned long rx_missed_errors; /* receiver missed packet */
@@ -2347,7 +2347,7 @@ static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2347 /* detailed tx_errors */ 2347 /* detailed tx_errors */
2348// unsigned long tx_fifo_errors; 2348// unsigned long tx_fifo_errors;
2349 2349
2350 return &vptr->stats; 2350 return &dev->stats;
2351} 2351}
2352 2352
2353 2353
diff --git a/drivers/net/via-velocity.h b/drivers/net/via-velocity.h
index ea43e1832afb..4cd3f6c97379 100644
--- a/drivers/net/via-velocity.h
+++ b/drivers/net/via-velocity.h
@@ -1503,7 +1503,6 @@ struct velocity_info {
1503 1503
1504 struct pci_dev *pdev; 1504 struct pci_dev *pdev;
1505 struct net_device *dev; 1505 struct net_device *dev;
1506 struct net_device_stats stats;
1507 1506
1508 struct vlan_group *vlgrp; 1507 struct vlan_group *vlgrp;
1509 u8 ip_addr[4]; 1508 u8 ip_addr[4];
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index 4d1d47953fc6..0c9ca67f66e6 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -622,12 +622,9 @@ static bool virtnet_send_command(struct virtnet_info *vi, u8 class, u8 cmd,
622 unsigned int tmp; 622 unsigned int tmp;
623 int i; 623 int i;
624 624
625 if (!virtio_has_feature(vi->vdev, VIRTIO_NET_F_CTRL_VQ)) { 625 /* Caller should know better */
626 BUG(); /* Caller should know better */ 626 BUG_ON(!virtio_has_feature(vi->vdev, VIRTIO_NET_F_CTRL_VQ) ||
627 return false; 627 (out + in > VIRTNET_SEND_COMMAND_SG_MAX));
628 }
629
630 BUG_ON(out + in > VIRTNET_SEND_COMMAND_SG_MAX);
631 628
632 out++; /* Add header */ 629 out++; /* Add header */
633 in++; /* Add return status */ 630 in++; /* Add return status */
@@ -642,8 +639,7 @@ static bool virtnet_send_command(struct virtnet_info *vi, u8 class, u8 cmd,
642 sg_set_buf(&sg[i + 1], sg_virt(s), s->length); 639 sg_set_buf(&sg[i + 1], sg_virt(s), s->length);
643 sg_set_buf(&sg[out + in - 1], &status, sizeof(status)); 640 sg_set_buf(&sg[out + in - 1], &status, sizeof(status));
644 641
645 if (vi->cvq->vq_ops->add_buf(vi->cvq, sg, out, in, vi) != 0) 642 BUG_ON(vi->cvq->vq_ops->add_buf(vi->cvq, sg, out, in, vi));
646 BUG();
647 643
648 vi->cvq->vq_ops->kick(vi->cvq); 644 vi->cvq->vq_ops->kick(vi->cvq);
649 645
@@ -684,6 +680,7 @@ static void virtnet_set_rx_mode(struct net_device *dev)
684 u8 promisc, allmulti; 680 u8 promisc, allmulti;
685 struct virtio_net_ctrl_mac *mac_data; 681 struct virtio_net_ctrl_mac *mac_data;
686 struct dev_addr_list *addr; 682 struct dev_addr_list *addr;
683 struct netdev_hw_addr *ha;
687 void *buf; 684 void *buf;
688 int i; 685 int i;
689 686
@@ -722,9 +719,9 @@ static void virtnet_set_rx_mode(struct net_device *dev)
722 719
723 /* Store the unicast list and count in the front of the buffer */ 720 /* Store the unicast list and count in the front of the buffer */
724 mac_data->entries = dev->uc_count; 721 mac_data->entries = dev->uc_count;
725 addr = dev->uc_list; 722 i = 0;
726 for (i = 0; i < dev->uc_count; i++, addr = addr->next) 723 list_for_each_entry(ha, &dev->uc_list, list)
727 memcpy(&mac_data->macs[i][0], addr->da_addr, ETH_ALEN); 724 memcpy(&mac_data->macs[i++][0], ha->addr, ETH_ALEN);
728 725
729 sg_set_buf(&sg[0], mac_data, 726 sg_set_buf(&sg[0], mac_data,
730 sizeof(mac_data->entries) + (dev->uc_count * ETH_ALEN)); 727 sizeof(mac_data->entries) + (dev->uc_count * ETH_ALEN));
diff --git a/drivers/net/vxge/vxge-main.c b/drivers/net/vxge/vxge-main.c
index b7f08f3e524b..6c838b3e063a 100644
--- a/drivers/net/vxge/vxge-main.c
+++ b/drivers/net/vxge/vxge-main.c
@@ -677,7 +677,7 @@ vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
677 return VXGE_HW_OK; 677 return VXGE_HW_OK;
678} 678}
679 679
680/* select a vpath to trasmit the packet */ 680/* select a vpath to transmit the packet */
681static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb, 681static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb,
682 int *do_lock) 682 int *do_lock)
683{ 683{
@@ -992,7 +992,9 @@ vxge_xmit(struct sk_buff *skb, struct net_device *dev)
992 VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN); 992 VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
993 993
994 vxge_hw_fifo_txdl_post(fifo_hw, dtr); 994 vxge_hw_fifo_txdl_post(fifo_hw, dtr);
995 dev->trans_start = jiffies; 995#ifdef NETIF_F_LLTX
996 dev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
997#endif
996 spin_unlock_irqrestore(&fifo->tx_lock, flags); 998 spin_unlock_irqrestore(&fifo->tx_lock, flags);
997 999
998 VXGE_COMPLETE_VPATH_TX(fifo); 1000 VXGE_COMPLETE_VPATH_TX(fifo);
diff --git a/drivers/net/vxge/vxge-traffic.c b/drivers/net/vxge/vxge-traffic.c
index c2eeac4125f3..370f55cbbad7 100644
--- a/drivers/net/vxge/vxge-traffic.c
+++ b/drivers/net/vxge/vxge-traffic.c
@@ -1923,7 +1923,7 @@ enum vxge_hw_status __vxge_hw_vpath_alarm_process(
1923 if (vpath == NULL) { 1923 if (vpath == NULL) {
1924 alarm_event = VXGE_HW_SET_LEVEL(VXGE_HW_EVENT_UNKNOWN, 1924 alarm_event = VXGE_HW_SET_LEVEL(VXGE_HW_EVENT_UNKNOWN,
1925 alarm_event); 1925 alarm_event);
1926 goto out; 1926 goto out2;
1927 } 1927 }
1928 1928
1929 hldev = vpath->hldev; 1929 hldev = vpath->hldev;
@@ -2161,7 +2161,7 @@ enum vxge_hw_status __vxge_hw_vpath_alarm_process(
2161 } 2161 }
2162out: 2162out:
2163 hldev->stats.sw_dev_err_stats.vpath_alarms++; 2163 hldev->stats.sw_dev_err_stats.vpath_alarms++;
2164 2164out2:
2165 if ((alarm_event == VXGE_HW_EVENT_ALARM_CLEARED) || 2165 if ((alarm_event == VXGE_HW_EVENT_ALARM_CLEARED) ||
2166 (alarm_event == VXGE_HW_EVENT_UNKNOWN)) 2166 (alarm_event == VXGE_HW_EVENT_UNKNOWN))
2167 return VXGE_HW_OK; 2167 return VXGE_HW_OK;
diff --git a/drivers/net/wan/hdlc_fr.c b/drivers/net/wan/hdlc_fr.c
index 800530101093..bfa0161a02d3 100644
--- a/drivers/net/wan/hdlc_fr.c
+++ b/drivers/net/wan/hdlc_fr.c
@@ -1054,6 +1054,7 @@ static void pvc_setup(struct net_device *dev)
1054 dev->flags = IFF_POINTOPOINT; 1054 dev->flags = IFF_POINTOPOINT;
1055 dev->hard_header_len = 10; 1055 dev->hard_header_len = 10;
1056 dev->addr_len = 2; 1056 dev->addr_len = 2;
1057 dev->priv_flags &= ~IFF_XMIT_DST_RELEASE;
1057} 1058}
1058 1059
1059static const struct net_device_ops pvc_ops = { 1060static const struct net_device_ops pvc_ops = {
diff --git a/drivers/net/wan/ixp4xx_hss.c b/drivers/net/wan/ixp4xx_hss.c
index 765a7f5d6aa4..08b1a284b690 100644
--- a/drivers/net/wan/ixp4xx_hss.c
+++ b/drivers/net/wan/ixp4xx_hss.c
@@ -731,8 +731,8 @@ static int hss_hdlc_poll(struct napi_struct *napi, int budget)
731 dma_unmap_single(&dev->dev, desc->data, 731 dma_unmap_single(&dev->dev, desc->data,
732 RX_SIZE, DMA_FROM_DEVICE); 732 RX_SIZE, DMA_FROM_DEVICE);
733#else 733#else
734 dma_sync_single(&dev->dev, desc->data, 734 dma_sync_single_for_cpu(&dev->dev, desc->data,
735 RX_SIZE, DMA_FROM_DEVICE); 735 RX_SIZE, DMA_FROM_DEVICE);
736 memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n], 736 memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n],
737 ALIGN(desc->pkt_len, 4) / 4); 737 ALIGN(desc->pkt_len, 4) / 4);
738#endif 738#endif
diff --git a/drivers/net/wan/pc300_drv.c b/drivers/net/wan/pc300_drv.c
index c23fde0c0344..79dabc557bd3 100644
--- a/drivers/net/wan/pc300_drv.c
+++ b/drivers/net/wan/pc300_drv.c
@@ -225,6 +225,7 @@ static char rcsid[] =
225#include <linux/skbuff.h> 225#include <linux/skbuff.h>
226#include <linux/if_arp.h> 226#include <linux/if_arp.h>
227#include <linux/netdevice.h> 227#include <linux/netdevice.h>
228#include <linux/etherdevice.h>
228#include <linux/spinlock.h> 229#include <linux/spinlock.h>
229#include <linux/if.h> 230#include <linux/if.h>
230#include <net/arp.h> 231#include <net/arp.h>
@@ -3246,6 +3247,16 @@ static inline void show_version(void)
3246 rcsvers, rcsdate, __DATE__, __TIME__); 3247 rcsvers, rcsdate, __DATE__, __TIME__);
3247} /* show_version */ 3248} /* show_version */
3248 3249
3250static const struct net_device_ops cpc_netdev_ops = {
3251 .ndo_open = cpc_open,
3252 .ndo_stop = cpc_close,
3253 .ndo_tx_timeout = cpc_tx_timeout,
3254 .ndo_set_mac_address = NULL,
3255 .ndo_change_mtu = cpc_change_mtu,
3256 .ndo_do_ioctl = cpc_ioctl,
3257 .ndo_validate_addr = eth_validate_addr,
3258};
3259
3249static void cpc_init_card(pc300_t * card) 3260static void cpc_init_card(pc300_t * card)
3250{ 3261{
3251 int i, devcount = 0; 3262 int i, devcount = 0;
@@ -3357,18 +3368,11 @@ static void cpc_init_card(pc300_t * card)
3357 dev->mem_start = card->hw.ramphys; 3368 dev->mem_start = card->hw.ramphys;
3358 dev->mem_end = card->hw.ramphys + card->hw.ramsize - 1; 3369 dev->mem_end = card->hw.ramphys + card->hw.ramsize - 1;
3359 dev->irq = card->hw.irq; 3370 dev->irq = card->hw.irq;
3360 dev->init = NULL;
3361 dev->tx_queue_len = PC300_TX_QUEUE_LEN; 3371 dev->tx_queue_len = PC300_TX_QUEUE_LEN;
3362 dev->mtu = PC300_DEF_MTU; 3372 dev->mtu = PC300_DEF_MTU;
3363 3373
3364 dev->open = cpc_open; 3374 dev->netdev_ops = &cpc_netdev_ops;
3365 dev->stop = cpc_close;
3366 dev->tx_timeout = cpc_tx_timeout;
3367 dev->watchdog_timeo = PC300_TX_TIMEOUT; 3375 dev->watchdog_timeo = PC300_TX_TIMEOUT;
3368 dev->set_multicast_list = NULL;
3369 dev->set_mac_address = NULL;
3370 dev->change_mtu = cpc_change_mtu;
3371 dev->do_ioctl = cpc_ioctl;
3372 3376
3373 if (register_hdlc_device(dev) == 0) { 3377 if (register_hdlc_device(dev) == 0) {
3374 printk("%s: Cyclades-PC300/", dev->name); 3378 printk("%s: Cyclades-PC300/", dev->name);
diff --git a/drivers/net/wimax/i2400m/control.c b/drivers/net/wimax/i2400m/control.c
index b3cadb626fe0..bd193ae2178b 100644
--- a/drivers/net/wimax/i2400m/control.c
+++ b/drivers/net/wimax/i2400m/control.c
@@ -292,8 +292,6 @@ void i2400m_report_tlv_system_state(struct i2400m *i2400m,
292 292
293 d_fnstart(3, dev, "(i2400m %p ss %p [%u])\n", i2400m, ss, i2400m_state); 293 d_fnstart(3, dev, "(i2400m %p ss %p [%u])\n", i2400m, ss, i2400m_state);
294 294
295 if (unlikely(i2400m->ready == 0)) /* act if up */
296 goto out;
297 if (i2400m->state != i2400m_state) { 295 if (i2400m->state != i2400m_state) {
298 i2400m->state = i2400m_state; 296 i2400m->state = i2400m_state;
299 wake_up_all(&i2400m->state_wq); 297 wake_up_all(&i2400m->state_wq);
@@ -341,7 +339,6 @@ void i2400m_report_tlv_system_state(struct i2400m *i2400m,
341 i2400m->bus_reset(i2400m, I2400M_RT_WARM); 339 i2400m->bus_reset(i2400m, I2400M_RT_WARM);
342 break; 340 break;
343 }; 341 };
344out:
345 d_fnend(3, dev, "(i2400m %p ss %p [%u]) = void\n", 342 d_fnend(3, dev, "(i2400m %p ss %p [%u]) = void\n",
346 i2400m, ss, i2400m_state); 343 i2400m, ss, i2400m_state);
347} 344}
@@ -372,8 +369,6 @@ void i2400m_report_tlv_media_status(struct i2400m *i2400m,
372 369
373 d_fnstart(3, dev, "(i2400m %p ms %p [%u])\n", i2400m, ms, status); 370 d_fnstart(3, dev, "(i2400m %p ms %p [%u])\n", i2400m, ms, status);
374 371
375 if (unlikely(i2400m->ready == 0)) /* act if up */
376 goto out;
377 switch (status) { 372 switch (status) {
378 case I2400M_MEDIA_STATUS_LINK_UP: 373 case I2400M_MEDIA_STATUS_LINK_UP:
379 netif_carrier_on(net_dev); 374 netif_carrier_on(net_dev);
@@ -393,14 +388,59 @@ void i2400m_report_tlv_media_status(struct i2400m *i2400m,
393 dev_err(dev, "HW BUG? unknown media status %u\n", 388 dev_err(dev, "HW BUG? unknown media status %u\n",
394 status); 389 status);
395 }; 390 };
396out:
397 d_fnend(3, dev, "(i2400m %p ms %p [%u]) = void\n", 391 d_fnend(3, dev, "(i2400m %p ms %p [%u]) = void\n",
398 i2400m, ms, status); 392 i2400m, ms, status);
399} 393}
400 394
401 395
402/* 396/*
403 * Parse a 'state report' and extract carrier on/off information 397 * Process a TLV from a 'state report'
398 *
399 * @i2400m: device descriptor
400 * @tlv: pointer to the TLV header; it has been already validated for
401 * consistent size.
402 * @tag: for error messages
403 *
404 * Act on the TLVs from a 'state report'.
405 */
406static
407void i2400m_report_state_parse_tlv(struct i2400m *i2400m,
408 const struct i2400m_tlv_hdr *tlv,
409 const char *tag)
410{
411 struct device *dev = i2400m_dev(i2400m);
412 const struct i2400m_tlv_media_status *ms;
413 const struct i2400m_tlv_system_state *ss;
414 const struct i2400m_tlv_rf_switches_status *rfss;
415
416 if (0 == i2400m_tlv_match(tlv, I2400M_TLV_SYSTEM_STATE, sizeof(*ss))) {
417 ss = container_of(tlv, typeof(*ss), hdr);
418 d_printf(2, dev, "%s: system state TLV "
419 "found (0x%04x), state 0x%08x\n",
420 tag, I2400M_TLV_SYSTEM_STATE,
421 le32_to_cpu(ss->state));
422 i2400m_report_tlv_system_state(i2400m, ss);
423 }
424 if (0 == i2400m_tlv_match(tlv, I2400M_TLV_RF_STATUS, sizeof(*rfss))) {
425 rfss = container_of(tlv, typeof(*rfss), hdr);
426 d_printf(2, dev, "%s: RF status TLV "
427 "found (0x%04x), sw 0x%02x hw 0x%02x\n",
428 tag, I2400M_TLV_RF_STATUS,
429 le32_to_cpu(rfss->sw_rf_switch),
430 le32_to_cpu(rfss->hw_rf_switch));
431 i2400m_report_tlv_rf_switches_status(i2400m, rfss);
432 }
433 if (0 == i2400m_tlv_match(tlv, I2400M_TLV_MEDIA_STATUS, sizeof(*ms))) {
434 ms = container_of(tlv, typeof(*ms), hdr);
435 d_printf(2, dev, "%s: Media Status TLV: %u\n",
436 tag, le32_to_cpu(ms->media_status));
437 i2400m_report_tlv_media_status(i2400m, ms);
438 }
439}
440
441
442/*
443 * Parse a 'state report' and extract information
404 * 444 *
405 * @i2400m: device descriptor 445 * @i2400m: device descriptor
406 * @l3l4_hdr: pointer to message; it has been already validated for 446 * @l3l4_hdr: pointer to message; it has been already validated for
@@ -409,13 +449,7 @@ out:
409 * declaration is assumed to be congruent with @size (as in 449 * declaration is assumed to be congruent with @size (as in
410 * sizeof(*l3l4_hdr) + l3l4_hdr->length == size) 450 * sizeof(*l3l4_hdr) + l3l4_hdr->length == size)
411 * 451 *
412 * Extract from the report state the system state TLV and infer from 452 * Walk over the TLVs in a report state and act on them.
413 * there if we have a carrier or not. Update our local state and tell
414 * netdev.
415 *
416 * When setting the carrier, it's fine to set OFF twice (for example),
417 * as netif_carrier_off() will not generate two OFF events (just on
418 * the transitions).
419 */ 453 */
420static 454static
421void i2400m_report_state_hook(struct i2400m *i2400m, 455void i2400m_report_state_hook(struct i2400m *i2400m,
@@ -424,9 +458,6 @@ void i2400m_report_state_hook(struct i2400m *i2400m,
424{ 458{
425 struct device *dev = i2400m_dev(i2400m); 459 struct device *dev = i2400m_dev(i2400m);
426 const struct i2400m_tlv_hdr *tlv; 460 const struct i2400m_tlv_hdr *tlv;
427 const struct i2400m_tlv_system_state *ss;
428 const struct i2400m_tlv_rf_switches_status *rfss;
429 const struct i2400m_tlv_media_status *ms;
430 size_t tlv_size = le16_to_cpu(l3l4_hdr->length); 461 size_t tlv_size = le16_to_cpu(l3l4_hdr->length);
431 462
432 d_fnstart(4, dev, "(i2400m %p, l3l4_hdr %p, size %zu, %s)\n", 463 d_fnstart(4, dev, "(i2400m %p, l3l4_hdr %p, size %zu, %s)\n",
@@ -434,34 +465,8 @@ void i2400m_report_state_hook(struct i2400m *i2400m,
434 tlv = NULL; 465 tlv = NULL;
435 466
436 while ((tlv = i2400m_tlv_buffer_walk(i2400m, &l3l4_hdr->pl, 467 while ((tlv = i2400m_tlv_buffer_walk(i2400m, &l3l4_hdr->pl,
437 tlv_size, tlv))) { 468 tlv_size, tlv)))
438 if (0 == i2400m_tlv_match(tlv, I2400M_TLV_SYSTEM_STATE, 469 i2400m_report_state_parse_tlv(i2400m, tlv, tag);
439 sizeof(*ss))) {
440 ss = container_of(tlv, typeof(*ss), hdr);
441 d_printf(2, dev, "%s: system state TLV "
442 "found (0x%04x), state 0x%08x\n",
443 tag, I2400M_TLV_SYSTEM_STATE,
444 le32_to_cpu(ss->state));
445 i2400m_report_tlv_system_state(i2400m, ss);
446 }
447 if (0 == i2400m_tlv_match(tlv, I2400M_TLV_RF_STATUS,
448 sizeof(*rfss))) {
449 rfss = container_of(tlv, typeof(*rfss), hdr);
450 d_printf(2, dev, "%s: RF status TLV "
451 "found (0x%04x), sw 0x%02x hw 0x%02x\n",
452 tag, I2400M_TLV_RF_STATUS,
453 le32_to_cpu(rfss->sw_rf_switch),
454 le32_to_cpu(rfss->hw_rf_switch));
455 i2400m_report_tlv_rf_switches_status(i2400m, rfss);
456 }
457 if (0 == i2400m_tlv_match(tlv, I2400M_TLV_MEDIA_STATUS,
458 sizeof(*ms))) {
459 ms = container_of(tlv, typeof(*ms), hdr);
460 d_printf(2, dev, "%s: Media Status TLV: %u\n",
461 tag, le32_to_cpu(ms->media_status));
462 i2400m_report_tlv_media_status(i2400m, ms);
463 }
464 }
465 d_fnend(4, dev, "(i2400m %p, l3l4_hdr %p, size %zu, %s) = void\n", 470 d_fnend(4, dev, "(i2400m %p, l3l4_hdr %p, size %zu, %s) = void\n",
466 i2400m, l3l4_hdr, size, tag); 471 i2400m, l3l4_hdr, size, tag);
467} 472}
@@ -721,6 +726,8 @@ struct sk_buff *i2400m_msg_to_dev(struct i2400m *i2400m,
721 ack_timeout = HZ; 726 ack_timeout = HZ;
722 }; 727 };
723 728
729 if (unlikely(i2400m->trace_msg_from_user))
730 wimax_msg(&i2400m->wimax_dev, "echo", buf, buf_len, GFP_KERNEL);
724 /* The RX path in rx.c will put any response for this message 731 /* The RX path in rx.c will put any response for this message
725 * in i2400m->ack_skb and wake us up. If we cancel the wait, 732 * in i2400m->ack_skb and wake us up. If we cancel the wait,
726 * we need to change the value of i2400m->ack_skb to something 733 * we need to change the value of i2400m->ack_skb to something
@@ -755,6 +762,9 @@ struct sk_buff *i2400m_msg_to_dev(struct i2400m *i2400m,
755 ack_l3l4_hdr = wimax_msg_data_len(ack_skb, &ack_len); 762 ack_l3l4_hdr = wimax_msg_data_len(ack_skb, &ack_len);
756 763
757 /* Check the ack and deliver it if it is ok */ 764 /* Check the ack and deliver it if it is ok */
765 if (unlikely(i2400m->trace_msg_from_user))
766 wimax_msg(&i2400m->wimax_dev, "echo",
767 ack_l3l4_hdr, ack_len, GFP_KERNEL);
758 result = i2400m_msg_size_check(i2400m, ack_l3l4_hdr, ack_len); 768 result = i2400m_msg_size_check(i2400m, ack_l3l4_hdr, ack_len);
759 if (result < 0) { 769 if (result < 0) {
760 dev_err(dev, "HW BUG? reply to message 0x%04x: %d\n", 770 dev_err(dev, "HW BUG? reply to message 0x%04x: %d\n",
diff --git a/drivers/net/wimax/i2400m/driver.c b/drivers/net/wimax/i2400m/driver.c
index 07a54bad237b..ef16c573bb22 100644
--- a/drivers/net/wimax/i2400m/driver.c
+++ b/drivers/net/wimax/i2400m/driver.c
@@ -62,6 +62,7 @@
62 * unregister_netdev() 62 * unregister_netdev()
63 */ 63 */
64#include "i2400m.h" 64#include "i2400m.h"
65#include <linux/etherdevice.h>
65#include <linux/wimax/i2400m.h> 66#include <linux/wimax/i2400m.h>
66#include <linux/module.h> 67#include <linux/module.h>
67#include <linux/moduleparam.h> 68#include <linux/moduleparam.h>
@@ -234,9 +235,6 @@ int i2400m_op_msg_from_user(struct wimax_dev *wimax_dev,
234 result = PTR_ERR(ack_skb); 235 result = PTR_ERR(ack_skb);
235 if (IS_ERR(ack_skb)) 236 if (IS_ERR(ack_skb))
236 goto error_msg_to_dev; 237 goto error_msg_to_dev;
237 if (unlikely(i2400m->trace_msg_from_user))
238 wimax_msg(&i2400m->wimax_dev, "trace",
239 msg_buf, msg_len, GFP_KERNEL);
240 result = wimax_msg_send(&i2400m->wimax_dev, ack_skb); 238 result = wimax_msg_send(&i2400m->wimax_dev, ack_skb);
241error_msg_to_dev: 239error_msg_to_dev:
242 d_fnend(4, dev, "(wimax_dev %p [i2400m %p] msg_buf %p msg_len %zu " 240 d_fnend(4, dev, "(wimax_dev %p [i2400m %p] msg_buf %p msg_len %zu "
@@ -650,6 +648,7 @@ int i2400m_setup(struct i2400m *i2400m, enum i2400m_bri bm_flags)
650 result = i2400m_read_mac_addr(i2400m); 648 result = i2400m_read_mac_addr(i2400m);
651 if (result < 0) 649 if (result < 0)
652 goto error_read_mac_addr; 650 goto error_read_mac_addr;
651 random_ether_addr(i2400m->src_mac_addr);
653 652
654 result = register_netdev(net_dev); /* Okey dokey, bring it up */ 653 result = register_netdev(net_dev); /* Okey dokey, bring it up */
655 if (result < 0) { 654 if (result < 0) {
diff --git a/drivers/net/wimax/i2400m/i2400m.h b/drivers/net/wimax/i2400m/i2400m.h
index 3ae2df38b59a..434ba310c2fe 100644
--- a/drivers/net/wimax/i2400m/i2400m.h
+++ b/drivers/net/wimax/i2400m/i2400m.h
@@ -323,6 +323,10 @@ struct i2400m_roq;
323 * delivered. Then the driver can release them to the host. See 323 * delivered. Then the driver can release them to the host. See
324 * drivers/net/i2400m/rx.c for details. 324 * drivers/net/i2400m/rx.c for details.
325 * 325 *
326 * @src_mac_addr: MAC address used to make ethernet packets be coming
327 * from. This is generated at i2400m_setup() time and used during
328 * the life cycle of the instance. See i2400m_fake_eth_header().
329 *
326 * @init_mutex: Mutex used for serializing the device bringup 330 * @init_mutex: Mutex used for serializing the device bringup
327 * sequence; this way if the device reboots in the middle, we 331 * sequence; this way if the device reboots in the middle, we
328 * don't try to do a bringup again while we are tearing down the 332 * don't try to do a bringup again while we are tearing down the
@@ -421,6 +425,7 @@ struct i2400m {
421 unsigned rx_pl_num, rx_pl_max, rx_pl_min, 425 unsigned rx_pl_num, rx_pl_max, rx_pl_min,
422 rx_num, rx_size_acc, rx_size_min, rx_size_max; 426 rx_num, rx_size_acc, rx_size_min, rx_size_max;
423 struct i2400m_roq *rx_roq; /* not under rx_lock! */ 427 struct i2400m_roq *rx_roq; /* not under rx_lock! */
428 u8 src_mac_addr[ETH_HLEN];
424 429
425 struct mutex msg_mutex; /* serialize command execution */ 430 struct mutex msg_mutex; /* serialize command execution */
426 struct completion msg_completion; 431 struct completion msg_completion;
diff --git a/drivers/net/wimax/i2400m/netdev.c b/drivers/net/wimax/i2400m/netdev.c
index 6b1fe7a81f25..9653f478b382 100644
--- a/drivers/net/wimax/i2400m/netdev.c
+++ b/drivers/net/wimax/i2400m/netdev.c
@@ -404,10 +404,12 @@ static
404void i2400m_rx_fake_eth_header(struct net_device *net_dev, 404void i2400m_rx_fake_eth_header(struct net_device *net_dev,
405 void *_eth_hdr, __be16 protocol) 405 void *_eth_hdr, __be16 protocol)
406{ 406{
407 struct i2400m *i2400m = net_dev_to_i2400m(net_dev);
407 struct ethhdr *eth_hdr = _eth_hdr; 408 struct ethhdr *eth_hdr = _eth_hdr;
408 409
409 memcpy(eth_hdr->h_dest, net_dev->dev_addr, sizeof(eth_hdr->h_dest)); 410 memcpy(eth_hdr->h_dest, net_dev->dev_addr, sizeof(eth_hdr->h_dest));
410 memset(eth_hdr->h_source, 0, sizeof(eth_hdr->h_dest)); 411 memcpy(eth_hdr->h_source, i2400m->src_mac_addr,
412 sizeof(eth_hdr->h_source));
411 eth_hdr->h_proto = protocol; 413 eth_hdr->h_proto = protocol;
412} 414}
413 415
diff --git a/drivers/net/wimax/i2400m/rx.c b/drivers/net/wimax/i2400m/rx.c
index f9fc38902322..7643850a6fb8 100644
--- a/drivers/net/wimax/i2400m/rx.c
+++ b/drivers/net/wimax/i2400m/rx.c
@@ -177,7 +177,8 @@ void i2400m_report_hook_work(struct work_struct *ws)
177 struct i2400m_work *iw = 177 struct i2400m_work *iw =
178 container_of(ws, struct i2400m_work, ws); 178 container_of(ws, struct i2400m_work, ws);
179 struct i2400m_report_hook_args *args = (void *) iw->pl; 179 struct i2400m_report_hook_args *args = (void *) iw->pl;
180 i2400m_report_hook(iw->i2400m, args->l3l4_hdr, args->size); 180 if (iw->i2400m->ready)
181 i2400m_report_hook(iw->i2400m, args->l3l4_hdr, args->size);
181 kfree_skb(args->skb_rx); 182 kfree_skb(args->skb_rx);
182 i2400m_put(iw->i2400m); 183 i2400m_put(iw->i2400m);
183 kfree(iw); 184 kfree(iw);
@@ -309,6 +310,9 @@ void i2400m_rx_ctl(struct i2400m *i2400m, struct sk_buff *skb_rx,
309 skb_get(skb_rx); 310 skb_get(skb_rx);
310 i2400m_queue_work(i2400m, i2400m_report_hook_work, 311 i2400m_queue_work(i2400m, i2400m_report_hook_work,
311 GFP_KERNEL, &args, sizeof(args)); 312 GFP_KERNEL, &args, sizeof(args));
313 if (unlikely(i2400m->trace_msg_from_user))
314 wimax_msg(&i2400m->wimax_dev, "echo",
315 l3l4_hdr, size, GFP_KERNEL);
312 result = wimax_msg(&i2400m->wimax_dev, NULL, l3l4_hdr, size, 316 result = wimax_msg(&i2400m->wimax_dev, NULL, l3l4_hdr, size,
313 GFP_KERNEL); 317 GFP_KERNEL);
314 if (result < 0) 318 if (result < 0)
diff --git a/drivers/net/wimax/i2400m/sdio.c b/drivers/net/wimax/i2400m/sdio.c
index 5ac5e76701cd..777c981676fc 100644
--- a/drivers/net/wimax/i2400m/sdio.c
+++ b/drivers/net/wimax/i2400m/sdio.c
@@ -409,19 +409,19 @@ int i2400ms_probe(struct sdio_func *func,
409 i2400m->bus_fw_names = i2400ms_bus_fw_names; 409 i2400m->bus_fw_names = i2400ms_bus_fw_names;
410 i2400m->bus_bm_mac_addr_impaired = 1; 410 i2400m->bus_bm_mac_addr_impaired = 1;
411 411
412 result = i2400ms_enable_function(i2400ms->func);
413 if (result < 0) {
414 dev_err(dev, "Cannot enable SDIO function: %d\n", result);
415 goto error_func_enable;
416 }
417
418 sdio_claim_host(func); 412 sdio_claim_host(func);
419 result = sdio_set_block_size(func, I2400MS_BLK_SIZE); 413 result = sdio_set_block_size(func, I2400MS_BLK_SIZE);
414 sdio_release_host(func);
420 if (result < 0) { 415 if (result < 0) {
421 dev_err(dev, "Failed to set block size: %d\n", result); 416 dev_err(dev, "Failed to set block size: %d\n", result);
422 goto error_set_blk_size; 417 goto error_set_blk_size;
423 } 418 }
424 sdio_release_host(func); 419
420 result = i2400ms_enable_function(i2400ms->func);
421 if (result < 0) {
422 dev_err(dev, "Cannot enable SDIO function: %d\n", result);
423 goto error_func_enable;
424 }
425 425
426 result = i2400m_setup(i2400m, I2400M_BRI_NO_REBOOT); 426 result = i2400m_setup(i2400m, I2400M_BRI_NO_REBOOT);
427 if (result < 0) { 427 if (result < 0) {
@@ -440,12 +440,12 @@ int i2400ms_probe(struct sdio_func *func,
440error_debugfs_add: 440error_debugfs_add:
441 i2400m_release(i2400m); 441 i2400m_release(i2400m);
442error_setup: 442error_setup:
443 sdio_set_drvdata(func, NULL);
444 sdio_claim_host(func); 443 sdio_claim_host(func);
445error_set_blk_size:
446 sdio_disable_func(func); 444 sdio_disable_func(func);
447 sdio_release_host(func); 445 sdio_release_host(func);
448error_func_enable: 446error_func_enable:
447error_set_blk_size:
448 sdio_set_drvdata(func, NULL);
449 free_netdev(net_dev); 449 free_netdev(net_dev);
450error_alloc_netdev: 450error_alloc_netdev:
451 return result; 451 return result;
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index 3d94e7dfea69..867324163ca2 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -146,10 +146,10 @@ config LIBERTAS_CS
146 A driver for Marvell Libertas 8385 CompactFlash devices. 146 A driver for Marvell Libertas 8385 CompactFlash devices.
147 147
148config LIBERTAS_SDIO 148config LIBERTAS_SDIO
149 tristate "Marvell Libertas 8385 and 8686 SDIO 802.11b/g cards" 149 tristate "Marvell Libertas 8385/8686/8688 SDIO 802.11b/g cards"
150 depends on LIBERTAS && MMC 150 depends on LIBERTAS && MMC
151 ---help--- 151 ---help---
152 A driver for Marvell Libertas 8385 and 8686 SDIO devices. 152 A driver for Marvell Libertas 8385/8686/8688 SDIO devices.
153 153
154config LIBERTAS_SPI 154config LIBERTAS_SPI
155 tristate "Marvell Libertas 8686 SPI 802.11b/g cards" 155 tristate "Marvell Libertas 8686 SPI 802.11b/g cards"
@@ -337,6 +337,7 @@ config USB_NET_RNDIS_WLAN
337 select USB_NET_CDCETHER 337 select USB_NET_CDCETHER
338 select USB_NET_RNDIS_HOST 338 select USB_NET_RNDIS_HOST
339 select WIRELESS_EXT 339 select WIRELESS_EXT
340 select CFG80211
340 ---help--- 341 ---help---
341 This is a driver for wireless RNDIS devices. 342 This is a driver for wireless RNDIS devices.
342 These are USB based adapters found in devices such as: 343 These are USB based adapters found in devices such as:
@@ -434,6 +435,13 @@ config RTL8187
434 435
435 Thanks to Realtek for their support! 436 Thanks to Realtek for their support!
436 437
438# If possible, automatically enable LEDs for RTL8187.
439
440config RTL8187_LEDS
441 bool
442 depends on RTL8187 && MAC80211_LEDS && (LEDS_CLASS = y || LEDS_CLASS = RTL8187)
443 default y
444
437config ADM8211 445config ADM8211
438 tristate "ADMtek ADM8211 support" 446 tristate "ADMtek ADM8211 support"
439 depends on MAC80211 && PCI && WLAN_80211 && EXPERIMENTAL 447 depends on MAC80211 && PCI && WLAN_80211 && EXPERIMENTAL
@@ -484,9 +492,7 @@ config MWL8K
484 will be called mwl8k. If unsure, say N. 492 will be called mwl8k. If unsure, say N.
485 493
486source "drivers/net/wireless/p54/Kconfig" 494source "drivers/net/wireless/p54/Kconfig"
487source "drivers/net/wireless/ath5k/Kconfig" 495source "drivers/net/wireless/ath/Kconfig"
488source "drivers/net/wireless/ath9k/Kconfig"
489source "drivers/net/wireless/ar9170/Kconfig"
490source "drivers/net/wireless/ipw2x00/Kconfig" 496source "drivers/net/wireless/ipw2x00/Kconfig"
491source "drivers/net/wireless/iwlwifi/Kconfig" 497source "drivers/net/wireless/iwlwifi/Kconfig"
492source "drivers/net/wireless/hostap/Kconfig" 498source "drivers/net/wireless/hostap/Kconfig"
@@ -495,5 +501,7 @@ source "drivers/net/wireless/b43legacy/Kconfig"
495source "drivers/net/wireless/zd1211rw/Kconfig" 501source "drivers/net/wireless/zd1211rw/Kconfig"
496source "drivers/net/wireless/rt2x00/Kconfig" 502source "drivers/net/wireless/rt2x00/Kconfig"
497source "drivers/net/wireless/orinoco/Kconfig" 503source "drivers/net/wireless/orinoco/Kconfig"
504source "drivers/net/wireless/wl12xx/Kconfig"
505source "drivers/net/wireless/iwmc3200wifi/Kconfig"
498 506
499endmenu 507endmenu
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index 50e7fba7f0ea..7a4647e78fd3 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -55,8 +55,10 @@ obj-$(CONFIG_RT2X00) += rt2x00/
55 55
56obj-$(CONFIG_P54_COMMON) += p54/ 56obj-$(CONFIG_P54_COMMON) += p54/
57 57
58obj-$(CONFIG_ATH5K) += ath5k/ 58obj-$(CONFIG_ATH_COMMON) += ath/
59obj-$(CONFIG_ATH9K) += ath9k/
60obj-$(CONFIG_AR9170_USB) += ar9170/
61 59
62obj-$(CONFIG_MAC80211_HWSIM) += mac80211_hwsim.o 60obj-$(CONFIG_MAC80211_HWSIM) += mac80211_hwsim.o
61
62obj-$(CONFIG_WL12XX) += wl12xx/
63
64obj-$(CONFIG_IWM) += iwmc3200wifi/
diff --git a/drivers/net/wireless/adm8211.c b/drivers/net/wireless/adm8211.c
index f71821795018..2b9e379994a1 100644
--- a/drivers/net/wireless/adm8211.c
+++ b/drivers/net/wireless/adm8211.c
@@ -1311,18 +1311,20 @@ static int adm8211_config(struct ieee80211_hw *dev, u32 changed)
1311 return 0; 1311 return 0;
1312} 1312}
1313 1313
1314static int adm8211_config_interface(struct ieee80211_hw *dev, 1314static void adm8211_bss_info_changed(struct ieee80211_hw *dev,
1315 struct ieee80211_vif *vif, 1315 struct ieee80211_vif *vif,
1316 struct ieee80211_if_conf *conf) 1316 struct ieee80211_bss_conf *conf,
1317 u32 changes)
1317{ 1318{
1318 struct adm8211_priv *priv = dev->priv; 1319 struct adm8211_priv *priv = dev->priv;
1319 1320
1321 if (!(changes & BSS_CHANGED_BSSID))
1322 return;
1323
1320 if (memcmp(conf->bssid, priv->bssid, ETH_ALEN)) { 1324 if (memcmp(conf->bssid, priv->bssid, ETH_ALEN)) {
1321 adm8211_set_bssid(dev, conf->bssid); 1325 adm8211_set_bssid(dev, conf->bssid);
1322 memcpy(priv->bssid, conf->bssid, ETH_ALEN); 1326 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1323 } 1327 }
1324
1325 return 0;
1326} 1328}
1327 1329
1328static void adm8211_configure_filter(struct ieee80211_hw *dev, 1330static void adm8211_configure_filter(struct ieee80211_hw *dev,
@@ -1753,7 +1755,7 @@ static const struct ieee80211_ops adm8211_ops = {
1753 .add_interface = adm8211_add_interface, 1755 .add_interface = adm8211_add_interface,
1754 .remove_interface = adm8211_remove_interface, 1756 .remove_interface = adm8211_remove_interface,
1755 .config = adm8211_config, 1757 .config = adm8211_config,
1756 .config_interface = adm8211_config_interface, 1758 .bss_info_changed = adm8211_bss_info_changed,
1757 .configure_filter = adm8211_configure_filter, 1759 .configure_filter = adm8211_configure_filter,
1758 .get_stats = adm8211_get_stats, 1760 .get_stats = adm8211_get_stats,
1759 .get_tx_stats = adm8211_get_tx_stats, 1761 .get_tx_stats = adm8211_get_tx_stats,
diff --git a/drivers/net/wireless/at76c50x-usb.c b/drivers/net/wireless/at76c50x-usb.c
index 8d93ca4651b9..4efbdbe6d6bf 100644
--- a/drivers/net/wireless/at76c50x-usb.c
+++ b/drivers/net/wireless/at76c50x-usb.c
@@ -1965,13 +1965,18 @@ static int at76_config(struct ieee80211_hw *hw, u32 changed)
1965 return 0; 1965 return 0;
1966} 1966}
1967 1967
1968static int at76_config_interface(struct ieee80211_hw *hw, 1968static void at76_bss_info_changed(struct ieee80211_hw *hw,
1969 struct ieee80211_vif *vif, 1969 struct ieee80211_vif *vif,
1970 struct ieee80211_if_conf *conf) 1970 struct ieee80211_bss_conf *conf,
1971 u32 changed)
1971{ 1972{
1972 struct at76_priv *priv = hw->priv; 1973 struct at76_priv *priv = hw->priv;
1973 1974
1974 at76_dbg(DBG_MAC80211, "%s():", __func__); 1975 at76_dbg(DBG_MAC80211, "%s():", __func__);
1976
1977 if (!(changed & BSS_CHANGED_BSSID))
1978 return;
1979
1975 at76_dbg_dump(DBG_MAC80211, conf->bssid, ETH_ALEN, "bssid:"); 1980 at76_dbg_dump(DBG_MAC80211, conf->bssid, ETH_ALEN, "bssid:");
1976 1981
1977 mutex_lock(&priv->mtx); 1982 mutex_lock(&priv->mtx);
@@ -1983,8 +1988,6 @@ static int at76_config_interface(struct ieee80211_hw *hw,
1983 at76_join(priv); 1988 at76_join(priv);
1984 1989
1985 mutex_unlock(&priv->mtx); 1990 mutex_unlock(&priv->mtx);
1986
1987 return 0;
1988} 1991}
1989 1992
1990/* must be atomic */ 1993/* must be atomic */
@@ -2076,7 +2079,7 @@ static const struct ieee80211_ops at76_ops = {
2076 .add_interface = at76_add_interface, 2079 .add_interface = at76_add_interface,
2077 .remove_interface = at76_remove_interface, 2080 .remove_interface = at76_remove_interface,
2078 .config = at76_config, 2081 .config = at76_config,
2079 .config_interface = at76_config_interface, 2082 .bss_info_changed = at76_bss_info_changed,
2080 .configure_filter = at76_configure_filter, 2083 .configure_filter = at76_configure_filter,
2081 .start = at76_mac80211_start, 2084 .start = at76_mac80211_start,
2082 .stop = at76_mac80211_stop, 2085 .stop = at76_mac80211_stop,
@@ -2250,6 +2253,7 @@ static int at76_init_new_device(struct at76_priv *priv,
2250 2253
2251 /* mac80211 initialisation */ 2254 /* mac80211 initialisation */
2252 priv->hw->wiphy->max_scan_ssids = 1; 2255 priv->hw->wiphy->max_scan_ssids = 1;
2256 priv->hw->wiphy->max_scan_ie_len = 0;
2253 priv->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); 2257 priv->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
2254 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &at76_supported_band; 2258 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &at76_supported_band;
2255 priv->hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | 2259 priv->hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
@@ -2311,8 +2315,7 @@ static void at76_delete_device(struct at76_priv *priv)
2311 2315
2312 del_timer_sync(&ledtrig_tx_timer); 2316 del_timer_sync(&ledtrig_tx_timer);
2313 2317
2314 if (priv->rx_skb) 2318 kfree_skb(priv->rx_skb);
2315 kfree_skb(priv->rx_skb);
2316 2319
2317 usb_put_dev(priv->udev); 2320 usb_put_dev(priv->udev);
2318 2321
diff --git a/drivers/net/wireless/ath/Kconfig b/drivers/net/wireless/ath/Kconfig
new file mode 100644
index 000000000000..d26e7b485315
--- /dev/null
+++ b/drivers/net/wireless/ath/Kconfig
@@ -0,0 +1,8 @@
1config ATH_COMMON
2 tristate "Atheros Wireless Cards"
3 depends on ATH5K || ATH9K || AR9170_USB
4
5source "drivers/net/wireless/ath/ath5k/Kconfig"
6source "drivers/net/wireless/ath/ath9k/Kconfig"
7source "drivers/net/wireless/ath/ar9170/Kconfig"
8
diff --git a/drivers/net/wireless/ath/Makefile b/drivers/net/wireless/ath/Makefile
new file mode 100644
index 000000000000..4bb0132ada37
--- /dev/null
+++ b/drivers/net/wireless/ath/Makefile
@@ -0,0 +1,6 @@
1obj-$(CONFIG_ATH5K) += ath5k/
2obj-$(CONFIG_ATH9K) += ath9k/
3obj-$(CONFIG_AR9170_USB) += ar9170/
4
5obj-$(CONFIG_ATH_COMMON) += ath.o
6ath-objs := main.o regd.o
diff --git a/drivers/net/wireless/ar9170/Kconfig b/drivers/net/wireless/ath/ar9170/Kconfig
index de4281fda129..b99e3263ee6d 100644
--- a/drivers/net/wireless/ar9170/Kconfig
+++ b/drivers/net/wireless/ath/ar9170/Kconfig
@@ -2,6 +2,7 @@ config AR9170_USB
2 tristate "Atheros AR9170 802.11n USB support" 2 tristate "Atheros AR9170 802.11n USB support"
3 depends on USB && MAC80211 && WLAN_80211 && EXPERIMENTAL 3 depends on USB && MAC80211 && WLAN_80211 && EXPERIMENTAL
4 select FW_LOADER 4 select FW_LOADER
5 select ATH_COMMON
5 help 6 help
6 This is a driver for the Atheros "otus" 802.11n USB devices. 7 This is a driver for the Atheros "otus" 802.11n USB devices.
7 8
diff --git a/drivers/net/wireless/ar9170/Makefile b/drivers/net/wireless/ath/ar9170/Makefile
index 8d91c7ee3215..8d91c7ee3215 100644
--- a/drivers/net/wireless/ar9170/Makefile
+++ b/drivers/net/wireless/ath/ar9170/Makefile
diff --git a/drivers/net/wireless/ar9170/ar9170.h b/drivers/net/wireless/ath/ar9170/ar9170.h
index f4fb2e94aea0..17bd3eaf3e03 100644
--- a/drivers/net/wireless/ar9170/ar9170.h
+++ b/drivers/net/wireless/ath/ar9170/ar9170.h
@@ -40,7 +40,7 @@
40 40
41#include <linux/completion.h> 41#include <linux/completion.h>
42#include <linux/spinlock.h> 42#include <linux/spinlock.h>
43#include <net/wireless.h> 43#include <net/cfg80211.h>
44#include <net/mac80211.h> 44#include <net/mac80211.h>
45#ifdef CONFIG_AR9170_LEDS 45#ifdef CONFIG_AR9170_LEDS
46#include <linux/leds.h> 46#include <linux/leds.h>
@@ -48,6 +48,8 @@
48#include "eeprom.h" 48#include "eeprom.h"
49#include "hw.h" 49#include "hw.h"
50 50
51#include "../regd.h"
52
51#define PAYLOAD_MAX (AR9170_MAX_CMD_LEN/4 - 1) 53#define PAYLOAD_MAX (AR9170_MAX_CMD_LEN/4 - 1)
52 54
53enum ar9170_bw { 55enum ar9170_bw {
@@ -58,6 +60,21 @@ enum ar9170_bw {
58 __AR9170_NUM_BW, 60 __AR9170_NUM_BW,
59}; 61};
60 62
63static inline enum ar9170_bw nl80211_to_ar9170(enum nl80211_channel_type type)
64{
65 switch (type) {
66 case NL80211_CHAN_NO_HT:
67 case NL80211_CHAN_HT20:
68 return AR9170_BW_20;
69 case NL80211_CHAN_HT40MINUS:
70 return AR9170_BW_40_BELOW;
71 case NL80211_CHAN_HT40PLUS:
72 return AR9170_BW_40_ABOVE;
73 default:
74 BUG();
75 }
76}
77
61enum ar9170_rf_init_mode { 78enum ar9170_rf_init_mode {
62 AR9170_RFI_NONE, 79 AR9170_RFI_NONE,
63 AR9170_RFI_WARM, 80 AR9170_RFI_WARM,
@@ -87,10 +104,16 @@ enum ar9170_device_state {
87 AR9170_ASSOCIATED, 104 AR9170_ASSOCIATED,
88}; 105};
89 106
107struct ar9170_rxstream_mpdu_merge {
108 struct ar9170_rx_head plcp;
109 bool has_plcp;
110};
111
90struct ar9170 { 112struct ar9170 {
91 struct ieee80211_hw *hw; 113 struct ieee80211_hw *hw;
92 struct mutex mutex; 114 struct mutex mutex;
93 enum ar9170_device_state state; 115 enum ar9170_device_state state;
116 unsigned long bad_hw_nagger;
94 117
95 int (*open)(struct ar9170 *); 118 int (*open)(struct ar9170 *);
96 void (*stop)(struct ar9170 *); 119 void (*stop)(struct ar9170 *);
@@ -118,6 +141,7 @@ struct ar9170 {
118 u64 cur_mc_hash, want_mc_hash; 141 u64 cur_mc_hash, want_mc_hash;
119 u32 cur_filter, want_filter; 142 u32 cur_filter, want_filter;
120 unsigned int filter_changed; 143 unsigned int filter_changed;
144 unsigned int filter_state;
121 bool sniffer_enabled; 145 bool sniffer_enabled;
122 146
123 /* PHY */ 147 /* PHY */
@@ -151,11 +175,17 @@ struct ar9170 {
151 175
152 /* EEPROM */ 176 /* EEPROM */
153 struct ar9170_eeprom eeprom; 177 struct ar9170_eeprom eeprom;
178 struct ath_regulatory regulatory;
154 179
155 /* global tx status for unregistered Stations. */ 180 /* global tx status for unregistered Stations. */
156 struct sk_buff_head global_tx_status; 181 struct sk_buff_head global_tx_status;
157 struct sk_buff_head global_tx_status_waste; 182 struct sk_buff_head global_tx_status_waste;
158 struct delayed_work tx_status_janitor; 183 struct delayed_work tx_status_janitor;
184
185 /* rxstream mpdu merge */
186 struct ar9170_rxstream_mpdu_merge rx_mpdu;
187 struct sk_buff *rx_failover;
188 int rx_failover_missing;
159}; 189};
160 190
161struct ar9170_sta_info { 191struct ar9170_sta_info {
diff --git a/drivers/net/wireless/ar9170/cmd.c b/drivers/net/wireless/ath/ar9170/cmd.c
index f57a6200167b..f57a6200167b 100644
--- a/drivers/net/wireless/ar9170/cmd.c
+++ b/drivers/net/wireless/ath/ar9170/cmd.c
diff --git a/drivers/net/wireless/ar9170/cmd.h b/drivers/net/wireless/ath/ar9170/cmd.h
index a4f0e50e52b4..a4f0e50e52b4 100644
--- a/drivers/net/wireless/ar9170/cmd.h
+++ b/drivers/net/wireless/ath/ar9170/cmd.h
diff --git a/drivers/net/wireless/ar9170/eeprom.h b/drivers/net/wireless/ath/ar9170/eeprom.h
index d2c8cc83f1dd..d2c8cc83f1dd 100644
--- a/drivers/net/wireless/ar9170/eeprom.h
+++ b/drivers/net/wireless/ath/ar9170/eeprom.h
diff --git a/drivers/net/wireless/ar9170/hw.h b/drivers/net/wireless/ath/ar9170/hw.h
index 53e250a4278f..3293e0fb24fb 100644
--- a/drivers/net/wireless/ar9170/hw.h
+++ b/drivers/net/wireless/ath/ar9170/hw.h
@@ -207,6 +207,8 @@ enum ar9170_cmd {
207#define AR9170_MAC_REG_AC1_AC0_TXOP (AR9170_MAC_REG_BASE + 0xB44) 207#define AR9170_MAC_REG_AC1_AC0_TXOP (AR9170_MAC_REG_BASE + 0xB44)
208#define AR9170_MAC_REG_AC3_AC2_TXOP (AR9170_MAC_REG_BASE + 0xB48) 208#define AR9170_MAC_REG_AC3_AC2_TXOP (AR9170_MAC_REG_BASE + 0xB48)
209 209
210#define AR9170_MAC_REG_AMPDU_SET (AR9170_MAC_REG_BASE + 0xba0)
211
210#define AR9170_MAC_REG_ACK_TABLE (AR9170_MAC_REG_BASE + 0xC00) 212#define AR9170_MAC_REG_ACK_TABLE (AR9170_MAC_REG_BASE + 0xC00)
211#define AR9170_MAC_REG_AMPDU_RX_THRESH (AR9170_MAC_REG_BASE + 0xC50) 213#define AR9170_MAC_REG_AMPDU_RX_THRESH (AR9170_MAC_REG_BASE + 0xC50)
212 214
@@ -312,7 +314,7 @@ struct ar9170_rx_head {
312 u8 plcp[12]; 314 u8 plcp[12];
313} __packed; 315} __packed;
314 316
315struct ar9170_rx_tail { 317struct ar9170_rx_phystatus {
316 union { 318 union {
317 struct { 319 struct {
318 u8 rssi_ant0, rssi_ant1, rssi_ant2, 320 u8 rssi_ant0, rssi_ant1, rssi_ant2,
@@ -324,6 +326,9 @@ struct ar9170_rx_tail {
324 326
325 u8 evm_stream0[6], evm_stream1[6]; 327 u8 evm_stream0[6], evm_stream1[6];
326 u8 phy_err; 328 u8 phy_err;
329} __packed;
330
331struct ar9170_rx_macstatus {
327 u8 SAidx, DAidx; 332 u8 SAidx, DAidx;
328 u8 error; 333 u8 error;
329 u8 status; 334 u8 status;
@@ -339,7 +344,7 @@ struct ar9170_rx_tail {
339 344
340#define AR9170_RX_ENC_SOFTWARE 0x8 345#define AR9170_RX_ENC_SOFTWARE 0x8
341 346
342static inline u8 ar9170_get_decrypt_type(struct ar9170_rx_tail *t) 347static inline u8 ar9170_get_decrypt_type(struct ar9170_rx_macstatus *t)
343{ 348{
344 return (t->SAidx & 0xc0) >> 4 | 349 return (t->SAidx & 0xc0) >> 4 |
345 (t->DAidx & 0xc0) >> 6; 350 (t->DAidx & 0xc0) >> 6;
@@ -357,10 +362,9 @@ static inline u8 ar9170_get_decrypt_type(struct ar9170_rx_tail *t)
357 362
358#define AR9170_RX_STATUS_MPDU_MASK 0x30 363#define AR9170_RX_STATUS_MPDU_MASK 0x30
359#define AR9170_RX_STATUS_MPDU_SINGLE 0x00 364#define AR9170_RX_STATUS_MPDU_SINGLE 0x00
360#define AR9170_RX_STATUS_MPDU_FIRST 0x10 365#define AR9170_RX_STATUS_MPDU_FIRST 0x20
361#define AR9170_RX_STATUS_MPDU_MIDDLE 0x20 366#define AR9170_RX_STATUS_MPDU_MIDDLE 0x30
362#define AR9170_RX_STATUS_MPDU_LAST 0x30 367#define AR9170_RX_STATUS_MPDU_LAST 0x10
363
364 368
365#define AR9170_RX_ERROR_RXTO 0x01 369#define AR9170_RX_ERROR_RXTO 0x01
366#define AR9170_RX_ERROR_OVERRUN 0x02 370#define AR9170_RX_ERROR_OVERRUN 0x02
@@ -369,6 +373,7 @@ static inline u8 ar9170_get_decrypt_type(struct ar9170_rx_tail *t)
369#define AR9170_RX_ERROR_WRONG_RA 0x10 373#define AR9170_RX_ERROR_WRONG_RA 0x10
370#define AR9170_RX_ERROR_PLCP 0x20 374#define AR9170_RX_ERROR_PLCP 0x20
371#define AR9170_RX_ERROR_MMIC 0x40 375#define AR9170_RX_ERROR_MMIC 0x40
376#define AR9170_RX_ERROR_FATAL 0x80
372 377
373struct ar9170_cmd_tx_status { 378struct ar9170_cmd_tx_status {
374 __le16 unkn; 379 __le16 unkn;
diff --git a/drivers/net/wireless/ar9170/led.c b/drivers/net/wireless/ath/ar9170/led.c
index 341cead7f606..341cead7f606 100644
--- a/drivers/net/wireless/ar9170/led.c
+++ b/drivers/net/wireless/ath/ar9170/led.c
diff --git a/drivers/net/wireless/ar9170/mac.c b/drivers/net/wireless/ath/ar9170/mac.c
index c8fa3073169f..43aeb69685d3 100644
--- a/drivers/net/wireless/ar9170/mac.c
+++ b/drivers/net/wireless/ath/ar9170/mac.c
@@ -72,6 +72,24 @@ int ar9170_set_qos(struct ar9170 *ar)
72 return ar9170_regwrite_result(); 72 return ar9170_regwrite_result();
73} 73}
74 74
75static int ar9170_set_ampdu_density(struct ar9170 *ar, u8 mpdudensity)
76{
77 u32 val;
78
79 /* don't allow AMPDU density > 8us */
80 if (mpdudensity > 6)
81 return -EINVAL;
82
83 /* Watch out! Otus uses slightly different density values. */
84 val = 0x140a00 | (mpdudensity ? (mpdudensity + 1) : 0);
85
86 ar9170_regwrite_begin(ar);
87 ar9170_regwrite(AR9170_MAC_REG_AMPDU_SET, val);
88 ar9170_regwrite_finish();
89
90 return ar9170_regwrite_result();
91}
92
75int ar9170_init_mac(struct ar9170 *ar) 93int ar9170_init_mac(struct ar9170 *ar)
76{ 94{
77 ar9170_regwrite_begin(ar); 95 ar9170_regwrite_begin(ar);
@@ -265,9 +283,9 @@ int ar9170_set_operating_mode(struct ar9170 *ar)
265 case NL80211_IFTYPE_ADHOC: 283 case NL80211_IFTYPE_ADHOC:
266 pm_mode |= AR9170_MAC_REG_POWERMGT_IBSS; 284 pm_mode |= AR9170_MAC_REG_POWERMGT_IBSS;
267 break; 285 break;
268/* case NL80211_IFTYPE_AP: 286 case NL80211_IFTYPE_AP:
269 pm_mode |= AR9170_MAC_REG_POWERMGT_AP; 287 pm_mode |= AR9170_MAC_REG_POWERMGT_AP;
270 break;*/ 288 break;
271 case NL80211_IFTYPE_WDS: 289 case NL80211_IFTYPE_WDS:
272 pm_mode |= AR9170_MAC_REG_POWERMGT_AP_WDS; 290 pm_mode |= AR9170_MAC_REG_POWERMGT_AP_WDS;
273 break; 291 break;
@@ -296,6 +314,11 @@ int ar9170_set_operating_mode(struct ar9170 *ar)
296 if (err) 314 if (err)
297 return err; 315 return err;
298 316
317 /* set AMPDU density to 8us. */
318 err = ar9170_set_ampdu_density(ar, 6);
319 if (err)
320 return err;
321
299 ar9170_regwrite_begin(ar); 322 ar9170_regwrite_begin(ar);
300 323
301 ar9170_regwrite(AR9170_MAC_REG_POWERMANAGEMENT, pm_mode); 324 ar9170_regwrite(AR9170_MAC_REG_POWERMANAGEMENT, pm_mode);
@@ -316,9 +339,9 @@ int ar9170_set_beacon_timers(struct ar9170 *ar)
316 u32 v = 0; 339 u32 v = 0;
317 u32 pretbtt = 0; 340 u32 pretbtt = 0;
318 341
319 v |= ar->hw->conf.beacon_int;
320
321 if (ar->vif) { 342 if (ar->vif) {
343 v |= ar->vif->bss_conf.beacon_int;
344
322 switch (ar->vif->type) { 345 switch (ar->vif->type) {
323 case NL80211_IFTYPE_MESH_POINT: 346 case NL80211_IFTYPE_MESH_POINT:
324 case NL80211_IFTYPE_ADHOC: 347 case NL80211_IFTYPE_ADHOC:
@@ -326,7 +349,7 @@ int ar9170_set_beacon_timers(struct ar9170 *ar)
326 break; 349 break;
327 case NL80211_IFTYPE_AP: 350 case NL80211_IFTYPE_AP:
328 v |= BIT(24); 351 v |= BIT(24);
329 pretbtt = (ar->hw->conf.beacon_int - 6) << 16; 352 pretbtt = (ar->vif->bss_conf.beacon_int - 6) << 16;
330 break; 353 break;
331 default: 354 default:
332 break; 355 break;
diff --git a/drivers/net/wireless/ar9170/main.c b/drivers/net/wireless/ath/ar9170/main.c
index 5996ff9f7f47..99df9ddae9cb 100644
--- a/drivers/net/wireless/ar9170/main.c
+++ b/drivers/net/wireless/ath/ar9170/main.c
@@ -142,11 +142,36 @@ static struct ieee80211_channel ar9170_5ghz_chantable[] = {
142}; 142};
143#undef CHAN 143#undef CHAN
144 144
145#define AR9170_HT_CAP \
146{ \
147 .ht_supported = true, \
148 .cap = IEEE80211_HT_CAP_MAX_AMSDU | \
149 IEEE80211_HT_CAP_SM_PS | \
150 IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \
151 IEEE80211_HT_CAP_SGI_40 | \
152 IEEE80211_HT_CAP_DSSSCCK40 | \
153 IEEE80211_HT_CAP_SM_PS, \
154 .ampdu_factor = 3, \
155 .ampdu_density = 6, \
156 .mcs = { \
157 .rx_mask = { 0xFF, 0xFF, 0, 0, 0, 0, 0, 0, 0, 0, }, \
158 }, \
159}
160
145static struct ieee80211_supported_band ar9170_band_2GHz = { 161static struct ieee80211_supported_band ar9170_band_2GHz = {
146 .channels = ar9170_2ghz_chantable, 162 .channels = ar9170_2ghz_chantable,
147 .n_channels = ARRAY_SIZE(ar9170_2ghz_chantable), 163 .n_channels = ARRAY_SIZE(ar9170_2ghz_chantable),
148 .bitrates = ar9170_g_ratetable, 164 .bitrates = ar9170_g_ratetable,
149 .n_bitrates = ar9170_g_ratetable_size, 165 .n_bitrates = ar9170_g_ratetable_size,
166 .ht_cap = AR9170_HT_CAP,
167};
168
169static struct ieee80211_supported_band ar9170_band_5GHz = {
170 .channels = ar9170_5ghz_chantable,
171 .n_channels = ARRAY_SIZE(ar9170_5ghz_chantable),
172 .bitrates = ar9170_a_ratetable,
173 .n_bitrates = ar9170_a_ratetable_size,
174 .ht_cap = AR9170_HT_CAP,
150}; 175};
151 176
152#ifdef AR9170_QUEUE_DEBUG 177#ifdef AR9170_QUEUE_DEBUG
@@ -190,13 +215,6 @@ static void ar9170_dump_station_tx_status_queue(struct ar9170 *ar,
190} 215}
191#endif /* AR9170_QUEUE_DEBUG */ 216#endif /* AR9170_QUEUE_DEBUG */
192 217
193static struct ieee80211_supported_band ar9170_band_5GHz = {
194 .channels = ar9170_5ghz_chantable,
195 .n_channels = ARRAY_SIZE(ar9170_5ghz_chantable),
196 .bitrates = ar9170_a_ratetable,
197 .n_bitrates = ar9170_a_ratetable_size,
198};
199
200void ar9170_handle_tx_status(struct ar9170 *ar, struct sk_buff *skb, 218void ar9170_handle_tx_status(struct ar9170 *ar, struct sk_buff *skb,
201 bool valid_status, u16 tx_status) 219 bool valid_status, u16 tx_status)
202{ 220{
@@ -436,214 +454,430 @@ static void ar9170_handle_command_response(struct ar9170 *ar,
436 } 454 }
437} 455}
438 456
439/* 457static void ar9170_rx_reset_rx_mpdu(struct ar9170 *ar)
440 * If the frame alignment is right (or the kernel has
441 * CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS), and there
442 * is only a single MPDU in the USB frame, then we can
443 * submit to mac80211 the SKB directly. However, since
444 * there may be multiple packets in one SKB in stream
445 * mode, and we need to observe the proper ordering,
446 * this is non-trivial.
447 */
448static void ar9170_handle_mpdu(struct ar9170 *ar, u8 *buf, int len)
449{ 458{
450 struct sk_buff *skb; 459 memset(&ar->rx_mpdu.plcp, 0, sizeof(struct ar9170_rx_head));
451 struct ar9170_rx_head *head = (void *)buf; 460 ar->rx_mpdu.has_plcp = false;
452 struct ar9170_rx_tail *tail; 461}
453 struct ieee80211_rx_status status;
454 int mpdu_len, i;
455 u8 error, antennas = 0, decrypt;
456 __le16 fc;
457 int reserved;
458 462
459 if (unlikely(!IS_STARTED(ar))) 463static int ar9170_nag_limiter(struct ar9170 *ar)
460 return ; 464{
465 bool print_message;
466
467 /*
468 * we expect all sorts of errors in promiscuous mode.
469 * don't bother with it, it's OK!
470 */
471 if (ar->sniffer_enabled)
472 return false;
473
474 /*
475 * only go for frequent errors! The hardware tends to
476 * do some stupid thing once in a while under load, in
477 * noisy environments or just for fun!
478 */
479 if (time_before(jiffies, ar->bad_hw_nagger) && net_ratelimit())
480 print_message = true;
481 else
482 print_message = false;
483
484 /* reset threshold for "once in a while" */
485 ar->bad_hw_nagger = jiffies + HZ / 4;
486 return print_message;
487}
488
489static int ar9170_rx_mac_status(struct ar9170 *ar,
490 struct ar9170_rx_head *head,
491 struct ar9170_rx_macstatus *mac,
492 struct ieee80211_rx_status *status)
493{
494 u8 error, decrypt;
461 495
462 /* Received MPDU */
463 mpdu_len = len;
464 mpdu_len -= sizeof(struct ar9170_rx_head);
465 mpdu_len -= sizeof(struct ar9170_rx_tail);
466 BUILD_BUG_ON(sizeof(struct ar9170_rx_head) != 12); 496 BUILD_BUG_ON(sizeof(struct ar9170_rx_head) != 12);
467 BUILD_BUG_ON(sizeof(struct ar9170_rx_tail) != 24); 497 BUILD_BUG_ON(sizeof(struct ar9170_rx_macstatus) != 4);
468 498
469 if (mpdu_len <= FCS_LEN) 499 error = mac->error;
470 return; 500 if (error & AR9170_RX_ERROR_MMIC) {
501 status->flag |= RX_FLAG_MMIC_ERROR;
502 error &= ~AR9170_RX_ERROR_MMIC;
503 }
471 504
472 tail = (void *)(buf + sizeof(struct ar9170_rx_head) + mpdu_len); 505 if (error & AR9170_RX_ERROR_PLCP) {
506 status->flag |= RX_FLAG_FAILED_PLCP_CRC;
507 error &= ~AR9170_RX_ERROR_PLCP;
473 508
474 for (i = 0; i < 3; i++) 509 if (!(ar->filter_state & FIF_PLCPFAIL))
475 if (tail->rssi[i] != 0x80) 510 return -EINVAL;
476 antennas |= BIT(i); 511 }
477 512
478 /* post-process RSSI */ 513 if (error & AR9170_RX_ERROR_FCS) {
479 for (i = 0; i < 7; i++) 514 status->flag |= RX_FLAG_FAILED_FCS_CRC;
480 if (tail->rssi[i] & 0x80) 515 error &= ~AR9170_RX_ERROR_FCS;
481 tail->rssi[i] = ((tail->rssi[i] & 0x7f) + 1) & 0x7f;
482 516
483 memset(&status, 0, sizeof(status)); 517 if (!(ar->filter_state & FIF_FCSFAIL))
518 return -EINVAL;
519 }
520
521 decrypt = ar9170_get_decrypt_type(mac);
522 if (!(decrypt & AR9170_RX_ENC_SOFTWARE) &&
523 decrypt != AR9170_ENC_ALG_NONE)
524 status->flag |= RX_FLAG_DECRYPTED;
525
526 /* ignore wrong RA errors */
527 error &= ~AR9170_RX_ERROR_WRONG_RA;
528
529 if (error & AR9170_RX_ERROR_DECRYPT) {
530 error &= ~AR9170_RX_ERROR_DECRYPT;
531 /*
532 * Rx decryption is done in place,
533 * the original data is lost anyway.
534 */
535
536 return -EINVAL;
537 }
484 538
485 status.band = ar->channel->band; 539 /* drop any other error frames */
486 status.freq = ar->channel->center_freq; 540 if (unlikely(error)) {
487 status.signal = ar->noise[0] + tail->rssi_combined; 541 /* TODO: update netdevice's RX dropped/errors statistics */
488 status.noise = ar->noise[0]; 542
489 status.antenna = antennas; 543 if (ar9170_nag_limiter(ar))
544 printk(KERN_DEBUG "%s: received frame with "
545 "suspicious error code (%#x).\n",
546 wiphy_name(ar->hw->wiphy), error);
547
548 return -EINVAL;
549 }
490 550
491 switch (tail->status & AR9170_RX_STATUS_MODULATION_MASK) { 551 status->band = ar->channel->band;
552 status->freq = ar->channel->center_freq;
553
554 switch (mac->status & AR9170_RX_STATUS_MODULATION_MASK) {
492 case AR9170_RX_STATUS_MODULATION_CCK: 555 case AR9170_RX_STATUS_MODULATION_CCK:
493 if (tail->status & AR9170_RX_STATUS_SHORT_PREAMBLE) 556 if (mac->status & AR9170_RX_STATUS_SHORT_PREAMBLE)
494 status.flag |= RX_FLAG_SHORTPRE; 557 status->flag |= RX_FLAG_SHORTPRE;
495 switch (head->plcp[0]) { 558 switch (head->plcp[0]) {
496 case 0x0a: 559 case 0x0a:
497 status.rate_idx = 0; 560 status->rate_idx = 0;
498 break; 561 break;
499 case 0x14: 562 case 0x14:
500 status.rate_idx = 1; 563 status->rate_idx = 1;
501 break; 564 break;
502 case 0x37: 565 case 0x37:
503 status.rate_idx = 2; 566 status->rate_idx = 2;
504 break; 567 break;
505 case 0x6e: 568 case 0x6e:
506 status.rate_idx = 3; 569 status->rate_idx = 3;
507 break; 570 break;
508 default: 571 default:
509 if ((!ar->sniffer_enabled) && (net_ratelimit())) 572 if (ar9170_nag_limiter(ar))
510 printk(KERN_ERR "%s: invalid plcp cck rate " 573 printk(KERN_ERR "%s: invalid plcp cck rate "
511 "(%x).\n", wiphy_name(ar->hw->wiphy), 574 "(%x).\n", wiphy_name(ar->hw->wiphy),
512 head->plcp[0]); 575 head->plcp[0]);
513 return; 576 return -EINVAL;
514 } 577 }
515 break; 578 break;
579
516 case AR9170_RX_STATUS_MODULATION_OFDM: 580 case AR9170_RX_STATUS_MODULATION_OFDM:
517 switch (head->plcp[0] & 0xF) { 581 switch (head->plcp[0] & 0xf) {
518 case 0xB: 582 case 0xb:
519 status.rate_idx = 0; 583 status->rate_idx = 0;
520 break; 584 break;
521 case 0xF: 585 case 0xf:
522 status.rate_idx = 1; 586 status->rate_idx = 1;
523 break; 587 break;
524 case 0xA: 588 case 0xa:
525 status.rate_idx = 2; 589 status->rate_idx = 2;
526 break; 590 break;
527 case 0xE: 591 case 0xe:
528 status.rate_idx = 3; 592 status->rate_idx = 3;
529 break; 593 break;
530 case 0x9: 594 case 0x9:
531 status.rate_idx = 4; 595 status->rate_idx = 4;
532 break; 596 break;
533 case 0xD: 597 case 0xd:
534 status.rate_idx = 5; 598 status->rate_idx = 5;
535 break; 599 break;
536 case 0x8: 600 case 0x8:
537 status.rate_idx = 6; 601 status->rate_idx = 6;
538 break; 602 break;
539 case 0xC: 603 case 0xc:
540 status.rate_idx = 7; 604 status->rate_idx = 7;
541 break; 605 break;
542 default: 606 default:
543 if ((!ar->sniffer_enabled) && (net_ratelimit())) 607 if (ar9170_nag_limiter(ar))
544 printk(KERN_ERR "%s: invalid plcp ofdm rate " 608 printk(KERN_ERR "%s: invalid plcp ofdm rate "
545 "(%x).\n", wiphy_name(ar->hw->wiphy), 609 "(%x).\n", wiphy_name(ar->hw->wiphy),
546 head->plcp[0]); 610 head->plcp[0]);
547 return; 611 return -EINVAL;
548 } 612 }
549 if (status.band == IEEE80211_BAND_2GHZ) 613 if (status->band == IEEE80211_BAND_2GHZ)
550 status.rate_idx += 4; 614 status->rate_idx += 4;
551 break; 615 break;
616
552 case AR9170_RX_STATUS_MODULATION_HT: 617 case AR9170_RX_STATUS_MODULATION_HT:
618 if (head->plcp[3] & 0x80)
619 status->flag |= RX_FLAG_40MHZ;
620 if (head->plcp[6] & 0x80)
621 status->flag |= RX_FLAG_SHORT_GI;
622
623 status->rate_idx = clamp(0, 75, head->plcp[6] & 0x7f);
624 status->flag |= RX_FLAG_HT;
625 break;
626
553 case AR9170_RX_STATUS_MODULATION_DUPOFDM: 627 case AR9170_RX_STATUS_MODULATION_DUPOFDM:
554 /* XXX */ 628 /* XXX */
555 629 if (ar9170_nag_limiter(ar))
556 if (net_ratelimit())
557 printk(KERN_ERR "%s: invalid modulation\n", 630 printk(KERN_ERR "%s: invalid modulation\n",
558 wiphy_name(ar->hw->wiphy)); 631 wiphy_name(ar->hw->wiphy));
559 return; 632 return -EINVAL;
560 } 633 }
561 634
562 error = tail->error; 635 return 0;
636}
563 637
564 if (error & AR9170_RX_ERROR_MMIC) { 638static void ar9170_rx_phy_status(struct ar9170 *ar,
565 status.flag |= RX_FLAG_MMIC_ERROR; 639 struct ar9170_rx_phystatus *phy,
566 error &= ~AR9170_RX_ERROR_MMIC; 640 struct ieee80211_rx_status *status)
567 } 641{
642 int i;
568 643
569 if (error & AR9170_RX_ERROR_PLCP) { 644 BUILD_BUG_ON(sizeof(struct ar9170_rx_phystatus) != 20);
570 status.flag |= RX_FLAG_FAILED_PLCP_CRC; 645
571 error &= ~AR9170_RX_ERROR_PLCP; 646 for (i = 0; i < 3; i++)
647 if (phy->rssi[i] != 0x80)
648 status->antenna |= BIT(i);
649
650 /* post-process RSSI */
651 for (i = 0; i < 7; i++)
652 if (phy->rssi[i] & 0x80)
653 phy->rssi[i] = ((phy->rssi[i] & 0x7f) + 1) & 0x7f;
654
655 /* TODO: we could do something with phy_errors */
656 status->signal = ar->noise[0] + phy->rssi_combined;
657 status->noise = ar->noise[0];
658}
659
660static struct sk_buff *ar9170_rx_copy_data(u8 *buf, int len)
661{
662 struct sk_buff *skb;
663 int reserved = 0;
664 struct ieee80211_hdr *hdr = (void *) buf;
665
666 if (ieee80211_is_data_qos(hdr->frame_control)) {
667 u8 *qc = ieee80211_get_qos_ctl(hdr);
668 reserved += NET_IP_ALIGN;
669
670 if (*qc & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT)
671 reserved += NET_IP_ALIGN;
572 } 672 }
573 673
574 if (error & AR9170_RX_ERROR_FCS) { 674 if (ieee80211_has_a4(hdr->frame_control))
575 status.flag |= RX_FLAG_FAILED_FCS_CRC; 675 reserved += NET_IP_ALIGN;
576 error &= ~AR9170_RX_ERROR_FCS; 676
677 reserved = 32 + (reserved & NET_IP_ALIGN);
678
679 skb = dev_alloc_skb(len + reserved);
680 if (likely(skb)) {
681 skb_reserve(skb, reserved);
682 memcpy(skb_put(skb, len), buf, len);
577 } 683 }
578 684
579 decrypt = ar9170_get_decrypt_type(tail); 685 return skb;
580 if (!(decrypt & AR9170_RX_ENC_SOFTWARE) && 686}
581 decrypt != AR9170_ENC_ALG_NONE)
582 status.flag |= RX_FLAG_DECRYPTED;
583 687
584 /* ignore wrong RA errors */ 688/*
585 error &= ~AR9170_RX_ERROR_WRONG_RA; 689 * If the frame alignment is right (or the kernel has
690 * CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS), and there
691 * is only a single MPDU in the USB frame, then we could
692 * submit to mac80211 the SKB directly. However, since
693 * there may be multiple packets in one SKB in stream
694 * mode, and we need to observe the proper ordering,
695 * this is non-trivial.
696 */
586 697
587 if (error & AR9170_RX_ERROR_DECRYPT) { 698static void ar9170_handle_mpdu(struct ar9170 *ar, u8 *buf, int len)
588 error &= ~AR9170_RX_ERROR_DECRYPT; 699{
700 struct ar9170_rx_head *head;
701 struct ar9170_rx_macstatus *mac;
702 struct ar9170_rx_phystatus *phy = NULL;
703 struct ieee80211_rx_status status;
704 struct sk_buff *skb;
705 int mpdu_len;
706
707 if (unlikely(!IS_STARTED(ar) || len < (sizeof(*mac))))
708 return ;
709
710 /* Received MPDU */
711 mpdu_len = len - sizeof(*mac);
712
713 mac = (void *)(buf + mpdu_len);
714 if (unlikely(mac->error & AR9170_RX_ERROR_FATAL)) {
715 /* this frame is too damaged and can't be used - drop it */
589 716
590 /*
591 * Rx decryption is done in place,
592 * the original data is lost anyway.
593 */
594 return ; 717 return ;
595 } 718 }
596 719
597 /* drop any other error frames */ 720 switch (mac->status & AR9170_RX_STATUS_MPDU_MASK) {
598 if ((error) && (net_ratelimit())) { 721 case AR9170_RX_STATUS_MPDU_FIRST:
599 printk(KERN_DEBUG "%s: errors: %#x\n", 722 /* first mpdu packet has the plcp header */
600 wiphy_name(ar->hw->wiphy), error); 723 if (likely(mpdu_len >= sizeof(struct ar9170_rx_head))) {
601 return; 724 head = (void *) buf;
725 memcpy(&ar->rx_mpdu.plcp, (void *) buf,
726 sizeof(struct ar9170_rx_head));
727
728 mpdu_len -= sizeof(struct ar9170_rx_head);
729 buf += sizeof(struct ar9170_rx_head);
730 ar->rx_mpdu.has_plcp = true;
731 } else {
732 if (ar9170_nag_limiter(ar))
733 printk(KERN_ERR "%s: plcp info is clipped.\n",
734 wiphy_name(ar->hw->wiphy));
735 return ;
736 }
737 break;
738
739 case AR9170_RX_STATUS_MPDU_LAST:
740 /* last mpdu has a extra tail with phy status information */
741
742 if (likely(mpdu_len >= sizeof(struct ar9170_rx_phystatus))) {
743 mpdu_len -= sizeof(struct ar9170_rx_phystatus);
744 phy = (void *)(buf + mpdu_len);
745 } else {
746 if (ar9170_nag_limiter(ar))
747 printk(KERN_ERR "%s: frame tail is clipped.\n",
748 wiphy_name(ar->hw->wiphy));
749 return ;
750 }
751
752 case AR9170_RX_STATUS_MPDU_MIDDLE:
753 /* middle mpdus are just data */
754 if (unlikely(!ar->rx_mpdu.has_plcp)) {
755 if (!ar9170_nag_limiter(ar))
756 return ;
757
758 printk(KERN_ERR "%s: rx stream did not start "
759 "with a first_mpdu frame tag.\n",
760 wiphy_name(ar->hw->wiphy));
761
762 return ;
763 }
764
765 head = &ar->rx_mpdu.plcp;
766 break;
767
768 case AR9170_RX_STATUS_MPDU_SINGLE:
769 /* single mpdu - has plcp (head) and phy status (tail) */
770 head = (void *) buf;
771
772 mpdu_len -= sizeof(struct ar9170_rx_head);
773 mpdu_len -= sizeof(struct ar9170_rx_phystatus);
774
775 buf += sizeof(struct ar9170_rx_head);
776 phy = (void *)(buf + mpdu_len);
777 break;
778
779 default:
780 BUG_ON(1);
781 break;
602 } 782 }
603 783
604 buf += sizeof(struct ar9170_rx_head); 784 if (unlikely(mpdu_len < FCS_LEN))
605 fc = *(__le16 *)buf; 785 return ;
606 786
607 if (ieee80211_is_data_qos(fc) ^ ieee80211_has_a4(fc)) 787 memset(&status, 0, sizeof(status));
608 reserved = 32 + 2; 788 if (unlikely(ar9170_rx_mac_status(ar, head, mac, &status)))
609 else 789 return ;
610 reserved = 32;
611 790
612 skb = dev_alloc_skb(mpdu_len + reserved); 791 if (phy)
613 if (!skb) 792 ar9170_rx_phy_status(ar, phy, &status);
614 return;
615 793
616 skb_reserve(skb, reserved); 794 skb = ar9170_rx_copy_data(buf, mpdu_len);
617 memcpy(skb_put(skb, mpdu_len), buf, mpdu_len); 795 if (likely(skb))
618 ieee80211_rx_irqsafe(ar->hw, skb, &status); 796 ieee80211_rx_irqsafe(ar->hw, skb, &status);
619} 797}
620 798
621void ar9170_rx(struct ar9170 *ar, struct sk_buff *skb) 799void ar9170_rx(struct ar9170 *ar, struct sk_buff *skb)
622{ 800{
623 unsigned int i, tlen, resplen; 801 unsigned int i, tlen, resplen, wlen = 0, clen = 0;
624 u8 *tbuf, *respbuf; 802 u8 *tbuf, *respbuf;
625 803
626 tbuf = skb->data; 804 tbuf = skb->data;
627 tlen = skb->len; 805 tlen = skb->len;
628 806
629 while (tlen >= 4) { 807 while (tlen >= 4) {
630 int clen = tbuf[1] << 8 | tbuf[0]; 808 clen = tbuf[1] << 8 | tbuf[0];
631 int wlen = (clen + 3) & ~3; 809 wlen = ALIGN(clen, 4);
632 810
633 /* 811 /* check if this is stream has a valid tag.*/
634 * parse stream (if any)
635 */
636 if (tbuf[2] != 0 || tbuf[3] != 0x4e) { 812 if (tbuf[2] != 0 || tbuf[3] != 0x4e) {
637 printk(KERN_ERR "%s: missing tag!\n", 813 /*
638 wiphy_name(ar->hw->wiphy)); 814 * TODO: handle the highly unlikely event that the
815 * corrupted stream has the TAG at the right position.
816 */
817
818 /* check if the frame can be repaired. */
819 if (!ar->rx_failover_missing) {
820 /* this is no "short read". */
821 if (ar9170_nag_limiter(ar)) {
822 printk(KERN_ERR "%s: missing tag!\n",
823 wiphy_name(ar->hw->wiphy));
824 goto err_telluser;
825 } else
826 goto err_silent;
827 }
828
829 if (ar->rx_failover_missing > tlen) {
830 if (ar9170_nag_limiter(ar)) {
831 printk(KERN_ERR "%s: possible multi "
832 "stream corruption!\n",
833 wiphy_name(ar->hw->wiphy));
834 goto err_telluser;
835 } else
836 goto err_silent;
837 }
838
839 memcpy(skb_put(ar->rx_failover, tlen), tbuf, tlen);
840 ar->rx_failover_missing -= tlen;
841
842 if (ar->rx_failover_missing <= 0) {
843 /*
844 * nested ar9170_rx call!
845 * termination is guranteed, even when the
846 * combined frame also have a element with
847 * a bad tag.
848 */
849
850 ar->rx_failover_missing = 0;
851 ar9170_rx(ar, ar->rx_failover);
852
853 skb_reset_tail_pointer(ar->rx_failover);
854 skb_trim(ar->rx_failover, 0);
855 }
856
639 return ; 857 return ;
640 } 858 }
859
860 /* check if stream is clipped */
641 if (wlen > tlen - 4) { 861 if (wlen > tlen - 4) {
642 printk(KERN_ERR "%s: invalid RX (%d, %d, %d)\n", 862 if (ar->rx_failover_missing) {
643 wiphy_name(ar->hw->wiphy), clen, wlen, tlen); 863 /* TODO: handle double stream corruption. */
644 print_hex_dump(KERN_DEBUG, "data: ", 864 if (ar9170_nag_limiter(ar)) {
645 DUMP_PREFIX_OFFSET, 865 printk(KERN_ERR "%s: double rx stream "
646 16, 1, tbuf, tlen, true); 866 "corruption!\n",
867 wiphy_name(ar->hw->wiphy));
868 goto err_telluser;
869 } else
870 goto err_silent;
871 }
872
873 /*
874 * save incomplete data set.
875 * the firmware will resend the missing bits when
876 * the rx - descriptor comes round again.
877 */
878
879 memcpy(skb_put(ar->rx_failover, tlen), tbuf, tlen);
880 ar->rx_failover_missing = clen - tlen;
647 return ; 881 return ;
648 } 882 }
649 resplen = clen; 883 resplen = clen;
@@ -668,12 +902,44 @@ void ar9170_rx(struct ar9170 *ar, struct sk_buff *skb)
668 if (i == 12) 902 if (i == 12)
669 ar9170_handle_command_response(ar, respbuf, resplen); 903 ar9170_handle_command_response(ar, respbuf, resplen);
670 else 904 else
671 ar9170_handle_mpdu(ar, respbuf, resplen); 905 ar9170_handle_mpdu(ar, respbuf, clen);
672 } 906 }
673 907
674 if (tlen) 908 if (tlen) {
675 printk(KERN_ERR "%s: buffer remains!\n", 909 if (net_ratelimit())
676 wiphy_name(ar->hw->wiphy)); 910 printk(KERN_ERR "%s: %d bytes of unprocessed "
911 "data left in rx stream!\n",
912 wiphy_name(ar->hw->wiphy), tlen);
913
914 goto err_telluser;
915 }
916
917 return ;
918
919err_telluser:
920 printk(KERN_ERR "%s: damaged RX stream data [want:%d, "
921 "data:%d, rx:%d, pending:%d ]\n",
922 wiphy_name(ar->hw->wiphy), clen, wlen, tlen,
923 ar->rx_failover_missing);
924
925 if (ar->rx_failover_missing)
926 print_hex_dump_bytes("rxbuf:", DUMP_PREFIX_OFFSET,
927 ar->rx_failover->data,
928 ar->rx_failover->len);
929
930 print_hex_dump_bytes("stream:", DUMP_PREFIX_OFFSET,
931 skb->data, skb->len);
932
933 printk(KERN_ERR "%s: please check your hardware and cables, if "
934 "you see this message frequently.\n",
935 wiphy_name(ar->hw->wiphy));
936
937err_silent:
938 if (ar->rx_failover_missing) {
939 skb_reset_tail_pointer(ar->rx_failover);
940 skb_trim(ar->rx_failover, 0);
941 ar->rx_failover_missing = 0;
942 }
677} 943}
678 944
679#define AR9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \ 945#define AR9170_FILL_QUEUE(queue, ai_fs, cwmin, cwmax, _txop) \
@@ -703,6 +969,8 @@ static int ar9170_op_start(struct ieee80211_hw *hw)
703 AR9170_FILL_QUEUE(ar->edcf[3], 2, 3, 7, 47); /* VOICE */ 969 AR9170_FILL_QUEUE(ar->edcf[3], 2, 3, 7, 47); /* VOICE */
704 AR9170_FILL_QUEUE(ar->edcf[4], 2, 3, 7, 0); /* SPECIAL */ 970 AR9170_FILL_QUEUE(ar->edcf[4], 2, 3, 7, 0); /* SPECIAL */
705 971
972 ar->bad_hw_nagger = jiffies;
973
706 err = ar->open(ar); 974 err = ar->open(ar);
707 if (err) 975 if (err)
708 goto out; 976 goto out;
@@ -742,8 +1010,9 @@ static void ar9170_op_stop(struct ieee80211_hw *hw)
742 if (IS_STARTED(ar)) 1010 if (IS_STARTED(ar))
743 ar->state = AR9170_IDLE; 1011 ar->state = AR9170_IDLE;
744 1012
745 mutex_lock(&ar->mutex); 1013 flush_workqueue(ar->hw->workqueue);
746 1014
1015 mutex_lock(&ar->mutex);
747 cancel_delayed_work_sync(&ar->tx_status_janitor); 1016 cancel_delayed_work_sync(&ar->tx_status_janitor);
748 cancel_work_sync(&ar->filter_config_work); 1017 cancel_work_sync(&ar->filter_config_work);
749 cancel_work_sync(&ar->beacon_work); 1018 cancel_work_sync(&ar->beacon_work);
@@ -1068,7 +1337,7 @@ static int ar9170_op_config(struct ieee80211_hw *hw, u32 changed)
1068 goto out; 1337 goto out;
1069 } 1338 }
1070 1339
1071 if (changed & IEEE80211_CONF_CHANGE_BEACON_INTERVAL) { 1340 if (changed & BSS_CHANGED_BEACON_INT) {
1072 err = ar9170_set_beacon_timers(ar); 1341 err = ar9170_set_beacon_timers(ar);
1073 if (err) 1342 if (err)
1074 goto out; 1343 goto out;
@@ -1076,7 +1345,8 @@ static int ar9170_op_config(struct ieee80211_hw *hw, u32 changed)
1076 1345
1077 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 1346 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1078 err = ar9170_set_channel(ar, hw->conf.channel, 1347 err = ar9170_set_channel(ar, hw->conf.channel,
1079 AR9170_RFI_NONE, AR9170_BW_20); 1348 AR9170_RFI_NONE,
1349 nl80211_to_ar9170(hw->conf.channel_type));
1080 if (err) 1350 if (err)
1081 goto out; 1351 goto out;
1082 /* adjust slot time for 5 GHz */ 1352 /* adjust slot time for 5 GHz */
@@ -1090,43 +1360,16 @@ out:
1090 return err; 1360 return err;
1091} 1361}
1092 1362
1093static int ar9170_op_config_interface(struct ieee80211_hw *hw,
1094 struct ieee80211_vif *vif,
1095 struct ieee80211_if_conf *conf)
1096{
1097 struct ar9170 *ar = hw->priv;
1098 int err = 0;
1099
1100 mutex_lock(&ar->mutex);
1101
1102 if (conf->changed & IEEE80211_IFCC_BSSID) {
1103 memcpy(ar->bssid, conf->bssid, ETH_ALEN);
1104 err = ar9170_set_operating_mode(ar);
1105 }
1106
1107 if (conf->changed & IEEE80211_IFCC_BEACON) {
1108 err = ar9170_update_beacon(ar);
1109
1110 if (err)
1111 goto out;
1112 err = ar9170_set_beacon_timers(ar);
1113 }
1114
1115out:
1116 mutex_unlock(&ar->mutex);
1117 return err;
1118}
1119
1120static void ar9170_set_filters(struct work_struct *work) 1363static void ar9170_set_filters(struct work_struct *work)
1121{ 1364{
1122 struct ar9170 *ar = container_of(work, struct ar9170, 1365 struct ar9170 *ar = container_of(work, struct ar9170,
1123 filter_config_work); 1366 filter_config_work);
1124 int err; 1367 int err;
1125 1368
1126 mutex_lock(&ar->mutex);
1127 if (unlikely(!IS_STARTED(ar))) 1369 if (unlikely(!IS_STARTED(ar)))
1128 goto unlock; 1370 return ;
1129 1371
1372 mutex_lock(&ar->mutex);
1130 if (ar->filter_changed & AR9170_FILTER_CHANGED_PROMISC) { 1373 if (ar->filter_changed & AR9170_FILTER_CHANGED_PROMISC) {
1131 err = ar9170_set_operating_mode(ar); 1374 err = ar9170_set_operating_mode(ar);
1132 if (err) 1375 if (err)
@@ -1155,8 +1398,8 @@ static void ar9170_op_configure_filter(struct ieee80211_hw *hw,
1155 1398
1156 /* mask supported flags */ 1399 /* mask supported flags */
1157 *new_flags &= FIF_ALLMULTI | FIF_CONTROL | FIF_BCN_PRBRESP_PROMISC | 1400 *new_flags &= FIF_ALLMULTI | FIF_CONTROL | FIF_BCN_PRBRESP_PROMISC |
1158 FIF_PROMISC_IN_BSS; 1401 FIF_PROMISC_IN_BSS | FIF_FCSFAIL | FIF_PLCPFAIL;
1159 1402 ar->filter_state = *new_flags;
1160 /* 1403 /*
1161 * We can support more by setting the sniffer bit and 1404 * We can support more by setting the sniffer bit and
1162 * then checking the error flags, later. 1405 * then checking the error flags, later.
@@ -1218,6 +1461,17 @@ static void ar9170_op_bss_info_changed(struct ieee80211_hw *hw,
1218 1461
1219 mutex_lock(&ar->mutex); 1462 mutex_lock(&ar->mutex);
1220 1463
1464 if (changed & BSS_CHANGED_BSSID) {
1465 memcpy(ar->bssid, bss_conf->bssid, ETH_ALEN);
1466 err = ar9170_set_operating_mode(ar);
1467 }
1468
1469 if (changed & (BSS_CHANGED_BEACON | BSS_CHANGED_BEACON_ENABLED)) {
1470 err = ar9170_update_beacon(ar);
1471 if (!err)
1472 ar9170_set_beacon_timers(ar);
1473 }
1474
1221 ar9170_regwrite_begin(ar); 1475 ar9170_regwrite_begin(ar);
1222 1476
1223 if (changed & BSS_CHANGED_ASSOC) { 1477 if (changed & BSS_CHANGED_ASSOC) {
@@ -1229,6 +1483,9 @@ static void ar9170_op_bss_info_changed(struct ieee80211_hw *hw,
1229#endif /* CONFIG_AR9170_LEDS */ 1483#endif /* CONFIG_AR9170_LEDS */
1230 } 1484 }
1231 1485
1486 if (changed & BSS_CHANGED_BEACON_INT)
1487 err = ar9170_set_beacon_timers(ar);
1488
1232 if (changed & BSS_CHANGED_HT) { 1489 if (changed & BSS_CHANGED_HT) {
1233 /* TODO */ 1490 /* TODO */
1234 err = 0; 1491 err = 0;
@@ -1298,7 +1555,7 @@ static int ar9170_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1298 1555
1299 switch (key->alg) { 1556 switch (key->alg) {
1300 case ALG_WEP: 1557 case ALG_WEP:
1301 if (key->keylen == LEN_WEP40) 1558 if (key->keylen == WLAN_KEY_LEN_WEP40)
1302 ktype = AR9170_ENC_ALG_WEP64; 1559 ktype = AR9170_ENC_ALG_WEP64;
1303 else 1560 else
1304 ktype = AR9170_ENC_ALG_WEP128; 1561 ktype = AR9170_ENC_ALG_WEP128;
@@ -1498,6 +1755,24 @@ static int ar9170_conf_tx(struct ieee80211_hw *hw, u16 queue,
1498 return ret; 1755 return ret;
1499} 1756}
1500 1757
1758static int ar9170_ampdu_action(struct ieee80211_hw *hw,
1759 enum ieee80211_ampdu_mlme_action action,
1760 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
1761{
1762 switch (action) {
1763 case IEEE80211_AMPDU_RX_START:
1764 case IEEE80211_AMPDU_RX_STOP:
1765 /*
1766 * Something goes wrong -- RX locks up
1767 * after a while of receiving aggregated
1768 * frames -- not enabling for now.
1769 */
1770 return -EOPNOTSUPP;
1771 default:
1772 return -EOPNOTSUPP;
1773 }
1774}
1775
1501static const struct ieee80211_ops ar9170_ops = { 1776static const struct ieee80211_ops ar9170_ops = {
1502 .start = ar9170_op_start, 1777 .start = ar9170_op_start,
1503 .stop = ar9170_op_stop, 1778 .stop = ar9170_op_stop,
@@ -1505,7 +1780,6 @@ static const struct ieee80211_ops ar9170_ops = {
1505 .add_interface = ar9170_op_add_interface, 1780 .add_interface = ar9170_op_add_interface,
1506 .remove_interface = ar9170_op_remove_interface, 1781 .remove_interface = ar9170_op_remove_interface,
1507 .config = ar9170_op_config, 1782 .config = ar9170_op_config,
1508 .config_interface = ar9170_op_config_interface,
1509 .configure_filter = ar9170_op_configure_filter, 1783 .configure_filter = ar9170_op_configure_filter,
1510 .conf_tx = ar9170_conf_tx, 1784 .conf_tx = ar9170_conf_tx,
1511 .bss_info_changed = ar9170_op_bss_info_changed, 1785 .bss_info_changed = ar9170_op_bss_info_changed,
@@ -1514,26 +1788,40 @@ static const struct ieee80211_ops ar9170_ops = {
1514 .sta_notify = ar9170_sta_notify, 1788 .sta_notify = ar9170_sta_notify,
1515 .get_stats = ar9170_get_stats, 1789 .get_stats = ar9170_get_stats,
1516 .get_tx_stats = ar9170_get_tx_stats, 1790 .get_tx_stats = ar9170_get_tx_stats,
1791 .ampdu_action = ar9170_ampdu_action,
1517}; 1792};
1518 1793
1519void *ar9170_alloc(size_t priv_size) 1794void *ar9170_alloc(size_t priv_size)
1520{ 1795{
1521 struct ieee80211_hw *hw; 1796 struct ieee80211_hw *hw;
1522 struct ar9170 *ar; 1797 struct ar9170 *ar;
1798 struct sk_buff *skb;
1523 int i; 1799 int i;
1524 1800
1801 /*
1802 * this buffer is used for rx stream reconstruction.
1803 * Under heavy load this device (or the transport layer?)
1804 * tends to split the streams into seperate rx descriptors.
1805 */
1806
1807 skb = __dev_alloc_skb(AR9170_MAX_RX_BUFFER_SIZE, GFP_KERNEL);
1808 if (!skb)
1809 goto err_nomem;
1810
1525 hw = ieee80211_alloc_hw(priv_size, &ar9170_ops); 1811 hw = ieee80211_alloc_hw(priv_size, &ar9170_ops);
1526 if (!hw) 1812 if (!hw)
1527 return ERR_PTR(-ENOMEM); 1813 goto err_nomem;
1528 1814
1529 ar = hw->priv; 1815 ar = hw->priv;
1530 ar->hw = hw; 1816 ar->hw = hw;
1817 ar->rx_failover = skb;
1531 1818
1532 mutex_init(&ar->mutex); 1819 mutex_init(&ar->mutex);
1533 spin_lock_init(&ar->cmdlock); 1820 spin_lock_init(&ar->cmdlock);
1534 spin_lock_init(&ar->tx_stats_lock); 1821 spin_lock_init(&ar->tx_stats_lock);
1535 skb_queue_head_init(&ar->global_tx_status); 1822 skb_queue_head_init(&ar->global_tx_status);
1536 skb_queue_head_init(&ar->global_tx_status_waste); 1823 skb_queue_head_init(&ar->global_tx_status_waste);
1824 ar9170_rx_reset_rx_mpdu(ar);
1537 INIT_WORK(&ar->filter_config_work, ar9170_set_filters); 1825 INIT_WORK(&ar->filter_config_work, ar9170_set_filters);
1538 INIT_WORK(&ar->beacon_work, ar9170_new_beacon); 1826 INIT_WORK(&ar->beacon_work, ar9170_new_beacon);
1539 INIT_DELAYED_WORK(&ar->tx_status_janitor, ar9170_tx_status_janitor); 1827 INIT_DELAYED_WORK(&ar->tx_status_janitor, ar9170_tx_status_janitor);
@@ -1561,6 +1849,10 @@ void *ar9170_alloc(size_t priv_size)
1561 ar->noise[i] = -95; /* ATH_DEFAULT_NOISE_FLOOR */ 1849 ar->noise[i] = -95; /* ATH_DEFAULT_NOISE_FLOOR */
1562 1850
1563 return ar; 1851 return ar;
1852
1853err_nomem:
1854 kfree_skb(skb);
1855 return ERR_PTR(-ENOMEM);
1564} 1856}
1565 1857
1566static int ar9170_read_eeprom(struct ar9170 *ar) 1858static int ar9170_read_eeprom(struct ar9170 *ar)
@@ -1619,12 +1911,24 @@ static int ar9170_read_eeprom(struct ar9170 *ar)
1619 else 1911 else
1620 ar->hw->channel_change_time = 80 * 1000; 1912 ar->hw->channel_change_time = 80 * 1000;
1621 1913
1914 ar->regulatory.current_rd = le16_to_cpu(ar->eeprom.reg_domain[0]);
1915 ar->regulatory.current_rd_ext = le16_to_cpu(ar->eeprom.reg_domain[1]);
1916
1622 /* second part of wiphy init */ 1917 /* second part of wiphy init */
1623 SET_IEEE80211_PERM_ADDR(ar->hw, addr); 1918 SET_IEEE80211_PERM_ADDR(ar->hw, addr);
1624 1919
1625 return bands ? 0 : -EINVAL; 1920 return bands ? 0 : -EINVAL;
1626} 1921}
1627 1922
1923static int ar9170_reg_notifier(struct wiphy *wiphy,
1924 struct regulatory_request *request)
1925{
1926 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
1927 struct ar9170 *ar = hw->priv;
1928
1929 return ath_reg_notifier_apply(wiphy, request, &ar->regulatory);
1930}
1931
1628int ar9170_register(struct ar9170 *ar, struct device *pdev) 1932int ar9170_register(struct ar9170 *ar, struct device *pdev)
1629{ 1933{
1630 int err; 1934 int err;
@@ -1634,10 +1938,18 @@ int ar9170_register(struct ar9170 *ar, struct device *pdev)
1634 if (err) 1938 if (err)
1635 goto err_out; 1939 goto err_out;
1636 1940
1941 err = ath_regd_init(&ar->regulatory, ar->hw->wiphy,
1942 ar9170_reg_notifier);
1943 if (err)
1944 goto err_out;
1945
1637 err = ieee80211_register_hw(ar->hw); 1946 err = ieee80211_register_hw(ar->hw);
1638 if (err) 1947 if (err)
1639 goto err_out; 1948 goto err_out;
1640 1949
1950 if (!ath_is_world_regd(&ar->regulatory))
1951 regulatory_hint(ar->hw->wiphy, ar->regulatory.alpha2);
1952
1641 err = ar9170_init_leds(ar); 1953 err = ar9170_init_leds(ar);
1642 if (err) 1954 if (err)
1643 goto err_unreg; 1955 goto err_unreg;
@@ -1666,6 +1978,7 @@ void ar9170_unregister(struct ar9170 *ar)
1666 ar9170_unregister_leds(ar); 1978 ar9170_unregister_leds(ar);
1667#endif /* CONFIG_AR9170_LEDS */ 1979#endif /* CONFIG_AR9170_LEDS */
1668 1980
1981 kfree_skb(ar->rx_failover);
1669 ieee80211_unregister_hw(ar->hw); 1982 ieee80211_unregister_hw(ar->hw);
1670 mutex_destroy(&ar->mutex); 1983 mutex_destroy(&ar->mutex);
1671} 1984}
diff --git a/drivers/net/wireless/ar9170/phy.c b/drivers/net/wireless/ath/ar9170/phy.c
index 6ce20754b8e7..6ce20754b8e7 100644
--- a/drivers/net/wireless/ar9170/phy.c
+++ b/drivers/net/wireless/ath/ar9170/phy.c
diff --git a/drivers/net/wireless/ar9170/usb.c b/drivers/net/wireless/ath/ar9170/usb.c
index fddda477095c..d7c13c0177ca 100644
--- a/drivers/net/wireless/ar9170/usb.c
+++ b/drivers/net/wireless/ath/ar9170/usb.c
@@ -350,7 +350,7 @@ static int ar9170_usb_exec_cmd(struct ar9170 *ar, enum ar9170_cmd cmd,
350 goto err_unbuf; 350 goto err_unbuf;
351 } 351 }
352 352
353 if (outlen >= 0 && aru->readlen != outlen) { 353 if (aru->readlen != outlen) {
354 err = -EMSGSIZE; 354 err = -EMSGSIZE;
355 goto err_unbuf; 355 goto err_unbuf;
356 } 356 }
@@ -689,6 +689,9 @@ static int ar9170_usb_probe(struct usb_interface *intf,
689 aru->common.exec_cmd = ar9170_usb_exec_cmd; 689 aru->common.exec_cmd = ar9170_usb_exec_cmd;
690 aru->common.callback_cmd = ar9170_usb_callback_cmd; 690 aru->common.callback_cmd = ar9170_usb_callback_cmd;
691 691
692#ifdef CONFIG_PM
693 udev->reset_resume = 1;
694#endif
692 err = ar9170_usb_reset(aru); 695 err = ar9170_usb_reset(aru);
693 if (err) 696 if (err)
694 goto err_freehw; 697 goto err_freehw;
@@ -805,6 +808,7 @@ static struct usb_driver ar9170_driver = {
805#ifdef CONFIG_PM 808#ifdef CONFIG_PM
806 .suspend = ar9170_suspend, 809 .suspend = ar9170_suspend,
807 .resume = ar9170_resume, 810 .resume = ar9170_resume,
811 .reset_resume = ar9170_resume,
808#endif /* CONFIG_PM */ 812#endif /* CONFIG_PM */
809}; 813};
810 814
diff --git a/drivers/net/wireless/ar9170/usb.h b/drivers/net/wireless/ath/ar9170/usb.h
index f5852924cd64..ac42586495d8 100644
--- a/drivers/net/wireless/ar9170/usb.h
+++ b/drivers/net/wireless/ath/ar9170/usb.h
@@ -43,7 +43,7 @@
43#include <linux/completion.h> 43#include <linux/completion.h>
44#include <linux/spinlock.h> 44#include <linux/spinlock.h>
45#include <linux/leds.h> 45#include <linux/leds.h>
46#include <net/wireless.h> 46#include <net/cfg80211.h>
47#include <net/mac80211.h> 47#include <net/mac80211.h>
48#include <linux/firmware.h> 48#include <linux/firmware.h>
49#include "eeprom.h" 49#include "eeprom.h"
diff --git a/drivers/net/wireless/ath5k/Kconfig b/drivers/net/wireless/ath/ath5k/Kconfig
index 75383a5df992..509b6f94f73b 100644
--- a/drivers/net/wireless/ath5k/Kconfig
+++ b/drivers/net/wireless/ath/ath5k/Kconfig
@@ -1,6 +1,7 @@
1config ATH5K 1config ATH5K
2 tristate "Atheros 5xxx wireless cards support" 2 tristate "Atheros 5xxx wireless cards support"
3 depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL 3 depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL
4 select ATH_COMMON
4 select MAC80211_LEDS 5 select MAC80211_LEDS
5 select LEDS_CLASS 6 select LEDS_CLASS
6 select NEW_LEDS 7 select NEW_LEDS
diff --git a/drivers/net/wireless/ath5k/Makefile b/drivers/net/wireless/ath/ath5k/Makefile
index 84a74c5248e5..84a74c5248e5 100644
--- a/drivers/net/wireless/ath5k/Makefile
+++ b/drivers/net/wireless/ath/ath5k/Makefile
diff --git a/drivers/net/wireless/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h
index 0b616e72fe05..813718210338 100644
--- a/drivers/net/wireless/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
@@ -27,6 +27,8 @@
27#include <linux/types.h> 27#include <linux/types.h>
28#include <net/mac80211.h> 28#include <net/mac80211.h>
29 29
30#include "../regd.h"
31
30/* RX/TX descriptor hw structs 32/* RX/TX descriptor hw structs
31 * TODO: Driver part should only see sw structs */ 33 * TODO: Driver part should only see sw structs */
32#include "desc.h" 34#include "desc.h"
@@ -207,7 +209,6 @@
207#define AR5K_TUNE_MAX_TXPOWER 63 209#define AR5K_TUNE_MAX_TXPOWER 63
208#define AR5K_TUNE_DEFAULT_TXPOWER 25 210#define AR5K_TUNE_DEFAULT_TXPOWER 25
209#define AR5K_TUNE_TPC_TXPOWER false 211#define AR5K_TUNE_TPC_TXPOWER false
210#define AR5K_TUNE_ANT_DIVERSITY true
211#define AR5K_TUNE_HWTXTRIES 4 212#define AR5K_TUNE_HWTXTRIES 4
212 213
213#define AR5K_INIT_CARR_SENSE_EN 1 214#define AR5K_INIT_CARR_SENSE_EN 1
@@ -418,6 +419,17 @@ enum ath5k_driver_mode {
418 AR5K_MODE_MAX = 5 419 AR5K_MODE_MAX = 5
419}; 420};
420 421
422enum ath5k_ant_mode {
423 AR5K_ANTMODE_DEFAULT = 0, /* default antenna setup */
424 AR5K_ANTMODE_FIXED_A = 1, /* only antenna A is present */
425 AR5K_ANTMODE_FIXED_B = 2, /* only antenna B is present */
426 AR5K_ANTMODE_SINGLE_AP = 3, /* sta locked on a single ap */
427 AR5K_ANTMODE_SECTOR_AP = 4, /* AP with tx antenna set on tx desc */
428 AR5K_ANTMODE_SECTOR_STA = 5, /* STA with tx antenna set on tx desc */
429 AR5K_ANTMODE_DEBUG = 6, /* Debug mode -A -> Rx, B-> Tx- */
430 AR5K_ANTMODE_MAX,
431};
432
421 433
422/****************\ 434/****************\
423 TX DEFINITIONS 435 TX DEFINITIONS
@@ -1039,8 +1051,6 @@ struct ath5k_hw {
1039 bool ah_5ghz; 1051 bool ah_5ghz;
1040 bool ah_2ghz; 1052 bool ah_2ghz;
1041 1053
1042#define ah_regdomain ah_capabilities.cap_regdomain.reg_current
1043#define ah_regdomain_hw ah_capabilities.cap_regdomain.reg_hw
1044#define ah_modes ah_capabilities.cap_mode 1054#define ah_modes ah_capabilities.cap_mode
1045#define ah_ee_version ah_capabilities.cap_eeprom.ee_version 1055#define ah_ee_version ah_capabilities.cap_eeprom.ee_version
1046 1056
@@ -1051,8 +1061,11 @@ struct ath5k_hw {
1051 bool ah_software_retry; 1061 bool ah_software_retry;
1052 u32 ah_limit_tx_retries; 1062 u32 ah_limit_tx_retries;
1053 1063
1054 u32 ah_antenna[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX]; 1064 /* Antenna Control */
1055 bool ah_ant_diversity; 1065 u32 ah_ant_ctl[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX];
1066 u8 ah_ant_mode;
1067 u8 ah_tx_ant;
1068 u8 ah_def_ant;
1056 1069
1057 u8 ah_sta_id[ETH_ALEN]; 1070 u8 ah_sta_id[ETH_ALEN];
1058 1071
@@ -1065,6 +1078,7 @@ struct ath5k_hw {
1065 u32 ah_gpio[AR5K_MAX_GPIO]; 1078 u32 ah_gpio[AR5K_MAX_GPIO];
1066 int ah_gpio_npins; 1079 int ah_gpio_npins;
1067 1080
1081 struct ath_regulatory ah_regulatory;
1068 struct ath5k_capabilities ah_capabilities; 1082 struct ath5k_capabilities ah_capabilities;
1069 1083
1070 struct ath5k_txq_info ah_txq[AR5K_NUM_TX_QUEUES]; 1084 struct ath5k_txq_info ah_txq[AR5K_NUM_TX_QUEUES];
@@ -1099,11 +1113,12 @@ struct ath5k_hw {
1099 /* Values in 0.25dB units */ 1113 /* Values in 0.25dB units */
1100 s16 txp_min_pwr; 1114 s16 txp_min_pwr;
1101 s16 txp_max_pwr; 1115 s16 txp_max_pwr;
1116 /* Values in 0.5dB units */
1102 s16 txp_offset; 1117 s16 txp_offset;
1103 s16 txp_ofdm; 1118 s16 txp_ofdm;
1104 /* Values in dB units */
1105 s16 txp_cck_ofdm_pwr_delta;
1106 s16 txp_cck_ofdm_gainf_delta; 1119 s16 txp_cck_ofdm_gainf_delta;
1120 /* Value in dB units */
1121 s16 txp_cck_ofdm_pwr_delta;
1107 } ah_txpower; 1122 } ah_txpower;
1108 1123
1109 struct { 1124 struct {
@@ -1263,14 +1278,21 @@ extern int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *chann
1263/* PHY calibration */ 1278/* PHY calibration */
1264extern int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, struct ieee80211_channel *channel); 1279extern int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, struct ieee80211_channel *channel);
1265extern int ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq); 1280extern int ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq);
1281/* Spur mitigation */
1282bool ath5k_hw_chan_has_spur_noise(struct ath5k_hw *ah,
1283 struct ieee80211_channel *channel);
1284void ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah,
1285 struct ieee80211_channel *channel);
1266/* Misc PHY functions */ 1286/* Misc PHY functions */
1267extern u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan); 1287extern u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan);
1268extern void ath5k_hw_set_def_antenna(struct ath5k_hw *ah, unsigned int ant);
1269extern unsigned int ath5k_hw_get_def_antenna(struct ath5k_hw *ah);
1270extern int ath5k_hw_phy_disable(struct ath5k_hw *ah); 1288extern int ath5k_hw_phy_disable(struct ath5k_hw *ah);
1289/* Antenna control */
1290extern void ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode);
1291extern void ath5k_hw_set_def_antenna(struct ath5k_hw *ah, u8 ant);
1292extern unsigned int ath5k_hw_get_def_antenna(struct ath5k_hw *ah);
1271/* TX power setup */ 1293/* TX power setup */
1272extern int ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel, u8 ee_mode, u8 txpower); 1294extern int ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel, u8 ee_mode, u8 txpower);
1273extern int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 ee_mode, u8 txpower); 1295extern int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower);
1274 1296
1275/* 1297/*
1276 * Functions used internaly 1298 * Functions used internaly
diff --git a/drivers/net/wireless/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c
index 70d376c63aac..c41ef58393e7 100644
--- a/drivers/net/wireless/ath5k/attach.c
+++ b/drivers/net/wireless/ath/ath5k/attach.c
@@ -133,7 +133,6 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version)
133 ah->ah_cw_min = AR5K_TUNE_CWMIN; 133 ah->ah_cw_min = AR5K_TUNE_CWMIN;
134 ah->ah_limit_tx_retries = AR5K_INIT_TX_RETRY; 134 ah->ah_limit_tx_retries = AR5K_INIT_TX_RETRY;
135 ah->ah_software_retry = false; 135 ah->ah_software_retry = false;
136 ah->ah_ant_diversity = AR5K_TUNE_ANT_DIVERSITY;
137 136
138 /* 137 /*
139 * Set the mac version based on the pci id 138 * Set the mac version based on the pci id
diff --git a/drivers/net/wireless/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 32df27a9c7a2..fb5193764afa 100644
--- a/drivers/net/wireless/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -61,9 +61,13 @@
61 61
62static int ath5k_calinterval = 10; /* Calibrate PHY every 10 secs (TODO: Fixme) */ 62static int ath5k_calinterval = 10; /* Calibrate PHY every 10 secs (TODO: Fixme) */
63static int modparam_nohwcrypt; 63static int modparam_nohwcrypt;
64module_param_named(nohwcrypt, modparam_nohwcrypt, int, 0444); 64module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
65MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); 65MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
66 66
67static int modparam_all_channels;
68module_param_named(all_channels, modparam_all_channels, bool, S_IRUGO);
69MODULE_PARM_DESC(all_channels, "Expose all channels the device can use.");
70
67 71
68/******************\ 72/******************\
69* Internal defines * 73* Internal defines *
@@ -223,9 +227,6 @@ static int ath5k_add_interface(struct ieee80211_hw *hw,
223static void ath5k_remove_interface(struct ieee80211_hw *hw, 227static void ath5k_remove_interface(struct ieee80211_hw *hw,
224 struct ieee80211_if_init_conf *conf); 228 struct ieee80211_if_init_conf *conf);
225static int ath5k_config(struct ieee80211_hw *hw, u32 changed); 229static int ath5k_config(struct ieee80211_hw *hw, u32 changed);
226static int ath5k_config_interface(struct ieee80211_hw *hw,
227 struct ieee80211_vif *vif,
228 struct ieee80211_if_conf *conf);
229static void ath5k_configure_filter(struct ieee80211_hw *hw, 230static void ath5k_configure_filter(struct ieee80211_hw *hw,
230 unsigned int changed_flags, 231 unsigned int changed_flags,
231 unsigned int *new_flags, 232 unsigned int *new_flags,
@@ -241,8 +242,8 @@ static int ath5k_get_tx_stats(struct ieee80211_hw *hw,
241static u64 ath5k_get_tsf(struct ieee80211_hw *hw); 242static u64 ath5k_get_tsf(struct ieee80211_hw *hw);
242static void ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf); 243static void ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf);
243static void ath5k_reset_tsf(struct ieee80211_hw *hw); 244static void ath5k_reset_tsf(struct ieee80211_hw *hw);
244static int ath5k_beacon_update(struct ath5k_softc *sc, 245static int ath5k_beacon_update(struct ieee80211_hw *hw,
245 struct sk_buff *skb); 246 struct ieee80211_vif *vif);
246static void ath5k_bss_info_changed(struct ieee80211_hw *hw, 247static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
247 struct ieee80211_vif *vif, 248 struct ieee80211_vif *vif,
248 struct ieee80211_bss_conf *bss_conf, 249 struct ieee80211_bss_conf *bss_conf,
@@ -255,7 +256,6 @@ static const struct ieee80211_ops ath5k_hw_ops = {
255 .add_interface = ath5k_add_interface, 256 .add_interface = ath5k_add_interface,
256 .remove_interface = ath5k_remove_interface, 257 .remove_interface = ath5k_remove_interface,
257 .config = ath5k_config, 258 .config = ath5k_config,
258 .config_interface = ath5k_config_interface,
259 .configure_filter = ath5k_configure_filter, 259 .configure_filter = ath5k_configure_filter,
260 .set_key = ath5k_set_key, 260 .set_key = ath5k_set_key,
261 .get_stats = ath5k_get_stats, 261 .get_stats = ath5k_get_stats,
@@ -516,6 +516,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
516 IEEE80211_HW_NOISE_DBM; 516 IEEE80211_HW_NOISE_DBM;
517 517
518 hw->wiphy->interface_modes = 518 hw->wiphy->interface_modes =
519 BIT(NL80211_IFTYPE_AP) |
519 BIT(NL80211_IFTYPE_STATION) | 520 BIT(NL80211_IFTYPE_STATION) |
520 BIT(NL80211_IFTYPE_ADHOC) | 521 BIT(NL80211_IFTYPE_ADHOC) |
521 BIT(NL80211_IFTYPE_MESH_POINT); 522 BIT(NL80211_IFTYPE_MESH_POINT);
@@ -705,6 +706,15 @@ err_no_irq:
705* Driver Initialization * 706* Driver Initialization *
706\***********************/ 707\***********************/
707 708
709static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)
710{
711 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
712 struct ath5k_softc *sc = hw->priv;
713 struct ath_regulatory *reg = &sc->ah->ah_regulatory;
714
715 return ath_reg_notifier_apply(wiphy, request, reg);
716}
717
708static int 718static int
709ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw) 719ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
710{ 720{
@@ -793,12 +803,23 @@ ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
793 memset(sc->bssidmask, 0xff, ETH_ALEN); 803 memset(sc->bssidmask, 0xff, ETH_ALEN);
794 ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask); 804 ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask);
795 805
806 ah->ah_regulatory.current_rd =
807 ah->ah_capabilities.cap_eeprom.ee_regdomain;
808 ret = ath_regd_init(&ah->ah_regulatory, hw->wiphy, ath5k_reg_notifier);
809 if (ret) {
810 ATH5K_ERR(sc, "can't initialize regulatory system\n");
811 goto err_queues;
812 }
813
796 ret = ieee80211_register_hw(hw); 814 ret = ieee80211_register_hw(hw);
797 if (ret) { 815 if (ret) {
798 ATH5K_ERR(sc, "can't register ieee80211 hw\n"); 816 ATH5K_ERR(sc, "can't register ieee80211 hw\n");
799 goto err_queues; 817 goto err_queues;
800 } 818 }
801 819
820 if (!ath_is_world_regd(&sc->ah->ah_regulatory))
821 regulatory_hint(hw->wiphy, sc->ah->ah_regulatory.alpha2);
822
802 ath5k_init_leds(sc); 823 ath5k_init_leds(sc);
803 824
804 return 0; 825 return 0;
@@ -862,6 +883,20 @@ ath5k_ieee2mhz(short chan)
862 return 2212 + chan * 20; 883 return 2212 + chan * 20;
863} 884}
864 885
886/*
887 * Returns true for the channel numbers used without all_channels modparam.
888 */
889static bool ath5k_is_standard_channel(short chan)
890{
891 return ((chan <= 14) ||
892 /* UNII 1,2 */
893 ((chan & 3) == 0 && chan >= 36 && chan <= 64) ||
894 /* midband */
895 ((chan & 3) == 0 && chan >= 100 && chan <= 140) ||
896 /* UNII-3 */
897 ((chan & 3) == 1 && chan >= 149 && chan <= 165));
898}
899
865static unsigned int 900static unsigned int
866ath5k_copy_channels(struct ath5k_hw *ah, 901ath5k_copy_channels(struct ath5k_hw *ah,
867 struct ieee80211_channel *channels, 902 struct ieee80211_channel *channels,
@@ -899,6 +934,9 @@ ath5k_copy_channels(struct ath5k_hw *ah,
899 if (!ath5k_channel_ok(ah, freq, chfreq)) 934 if (!ath5k_channel_ok(ah, freq, chfreq))
900 continue; 935 continue;
901 936
937 if (!modparam_all_channels && !ath5k_is_standard_channel(ch))
938 continue;
939
902 /* Write channel info and increment counter */ 940 /* Write channel info and increment counter */
903 channels[count].center_freq = freq; 941 channels[count].center_freq = freq;
904 channels[count].band = (chfreq == CHANNEL_2GHZ) ? 942 channels[count].band = (chfreq == CHANNEL_2GHZ) ?
@@ -1238,7 +1276,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1238 ieee80211_get_hdrlen_from_skb(skb), AR5K_PKT_TYPE_NORMAL, 1276 ieee80211_get_hdrlen_from_skb(skb), AR5K_PKT_TYPE_NORMAL,
1239 (sc->power_level * 2), 1277 (sc->power_level * 2),
1240 hw_rate, 1278 hw_rate,
1241 info->control.rates[0].count, keyidx, 0, flags, 1279 info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags,
1242 cts_rate, duration); 1280 cts_rate, duration);
1243 if (ret) 1281 if (ret)
1244 goto err_unmap; 1282 goto err_unmap;
@@ -1574,9 +1612,8 @@ ath5k_rx_start(struct ath5k_softc *sc)
1574 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "cachelsz %u rxbufsize %u\n", 1612 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "cachelsz %u rxbufsize %u\n",
1575 sc->cachelsz, sc->rxbufsize); 1613 sc->cachelsz, sc->rxbufsize);
1576 1614
1577 sc->rxlink = NULL;
1578
1579 spin_lock_bh(&sc->rxbuflock); 1615 spin_lock_bh(&sc->rxbuflock);
1616 sc->rxlink = NULL;
1580 list_for_each_entry(bf, &sc->rxbuf, list) { 1617 list_for_each_entry(bf, &sc->rxbuf, list) {
1581 ret = ath5k_rxbuf_setup(sc, bf); 1618 ret = ath5k_rxbuf_setup(sc, bf);
1582 if (ret != 0) { 1619 if (ret != 0) {
@@ -1585,9 +1622,9 @@ ath5k_rx_start(struct ath5k_softc *sc)
1585 } 1622 }
1586 } 1623 }
1587 bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list); 1624 bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list);
1625 ath5k_hw_set_rxdp(ah, bf->daddr);
1588 spin_unlock_bh(&sc->rxbuflock); 1626 spin_unlock_bh(&sc->rxbuflock);
1589 1627
1590 ath5k_hw_set_rxdp(ah, bf->daddr);
1591 ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */ 1628 ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */
1592 ath5k_mode_setup(sc); /* set filters, etc. */ 1629 ath5k_mode_setup(sc); /* set filters, etc. */
1593 ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */ 1630 ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */
@@ -1699,35 +1736,6 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1699 } 1736 }
1700} 1737}
1701 1738
1702static void ath5k_tasklet_beacon(unsigned long data)
1703{
1704 struct ath5k_softc *sc = (struct ath5k_softc *) data;
1705
1706 /*
1707 * Software beacon alert--time to send a beacon.
1708 *
1709 * In IBSS mode we use this interrupt just to
1710 * keep track of the next TBTT (target beacon
1711 * transmission time) in order to detect wether
1712 * automatic TSF updates happened.
1713 */
1714 if (sc->opmode == NL80211_IFTYPE_ADHOC) {
1715 /* XXX: only if VEOL suppported */
1716 u64 tsf = ath5k_hw_get_tsf64(sc->ah);
1717 sc->nexttbtt += sc->bintval;
1718 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
1719 "SWBA nexttbtt: %x hw_tu: %x "
1720 "TSF: %llx\n",
1721 sc->nexttbtt,
1722 TSF_TO_TU(tsf),
1723 (unsigned long long) tsf);
1724 } else {
1725 spin_lock(&sc->block);
1726 ath5k_beacon_send(sc);
1727 spin_unlock(&sc->block);
1728 }
1729}
1730
1731static void 1739static void
1732ath5k_tasklet_rx(unsigned long data) 1740ath5k_tasklet_rx(unsigned long data)
1733{ 1741{
@@ -1736,7 +1744,7 @@ ath5k_tasklet_rx(unsigned long data)
1736 struct sk_buff *skb, *next_skb; 1744 struct sk_buff *skb, *next_skb;
1737 dma_addr_t next_skb_addr; 1745 dma_addr_t next_skb_addr;
1738 struct ath5k_softc *sc = (void *)data; 1746 struct ath5k_softc *sc = (void *)data;
1739 struct ath5k_buf *bf, *bf_last; 1747 struct ath5k_buf *bf;
1740 struct ath5k_desc *ds; 1748 struct ath5k_desc *ds;
1741 int ret; 1749 int ret;
1742 int hdrlen; 1750 int hdrlen;
@@ -1747,7 +1755,6 @@ ath5k_tasklet_rx(unsigned long data)
1747 ATH5K_WARN(sc, "empty rx buf pool\n"); 1755 ATH5K_WARN(sc, "empty rx buf pool\n");
1748 goto unlock; 1756 goto unlock;
1749 } 1757 }
1750 bf_last = list_entry(sc->rxbuf.prev, struct ath5k_buf, list);
1751 do { 1758 do {
1752 rxs.flag = 0; 1759 rxs.flag = 0;
1753 1760
@@ -1756,24 +1763,9 @@ ath5k_tasklet_rx(unsigned long data)
1756 skb = bf->skb; 1763 skb = bf->skb;
1757 ds = bf->desc; 1764 ds = bf->desc;
1758 1765
1759 /* 1766 /* bail if HW is still using self-linked descriptor */
1760 * last buffer must not be freed to ensure proper hardware 1767 if (ath5k_hw_get_rxdp(sc->ah) == bf->daddr)
1761 * function. When the hardware finishes also a packet next to 1768 break;
1762 * it, we are sure, it doesn't use it anymore and we can go on.
1763 */
1764 if (bf_last == bf)
1765 bf->flags |= 1;
1766 if (bf->flags) {
1767 struct ath5k_buf *bf_next = list_entry(bf->list.next,
1768 struct ath5k_buf, list);
1769 ret = sc->ah->ah_proc_rx_desc(sc->ah, bf_next->desc,
1770 &rs);
1771 if (ret)
1772 break;
1773 bf->flags &= ~1;
1774 /* skip the overwritten one (even status is martian) */
1775 goto next;
1776 }
1777 1769
1778 ret = sc->ah->ah_proc_rx_desc(sc->ah, ds, &rs); 1770 ret = sc->ah->ah_proc_rx_desc(sc->ah, ds, &rs);
1779 if (unlikely(ret == -EINPROGRESS)) 1771 if (unlikely(ret == -EINPROGRESS))
@@ -2014,7 +2006,8 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
2014 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 2006 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2015 struct ath5k_hw *ah = sc->ah; 2007 struct ath5k_hw *ah = sc->ah;
2016 struct ath5k_desc *ds; 2008 struct ath5k_desc *ds;
2017 int ret, antenna = 0; 2009 int ret = 0;
2010 u8 antenna;
2018 u32 flags; 2011 u32 flags;
2019 2012
2020 bf->skbaddr = pci_map_single(sc->pdev, skb->data, skb->len, 2013 bf->skbaddr = pci_map_single(sc->pdev, skb->data, skb->len,
@@ -2028,23 +2021,35 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
2028 } 2021 }
2029 2022
2030 ds = bf->desc; 2023 ds = bf->desc;
2024 antenna = ah->ah_tx_ant;
2031 2025
2032 flags = AR5K_TXDESC_NOACK; 2026 flags = AR5K_TXDESC_NOACK;
2033 if (sc->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) { 2027 if (sc->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) {
2034 ds->ds_link = bf->daddr; /* self-linked */ 2028 ds->ds_link = bf->daddr; /* self-linked */
2035 flags |= AR5K_TXDESC_VEOL; 2029 flags |= AR5K_TXDESC_VEOL;
2036 /* 2030 } else
2037 * Let hardware handle antenna switching if txantenna is not set
2038 */
2039 } else {
2040 ds->ds_link = 0; 2031 ds->ds_link = 0;
2041 /* 2032
2042 * Switch antenna every 4 beacons if txantenna is not set 2033 /*
2043 * XXX assumes two antennas 2034 * If we use multiple antennas on AP and use
2044 */ 2035 * the Sectored AP scenario, switch antenna every
2045 if (antenna == 0) 2036 * 4 beacons to make sure everybody hears our AP.
2046 antenna = sc->bsent & 4 ? 2 : 1; 2037 * When a client tries to associate, hw will keep
2047 } 2038 * track of the tx antenna to be used for this client
2039 * automaticaly, based on ACKed packets.
2040 *
2041 * Note: AP still listens and transmits RTS on the
2042 * default antenna which is supposed to be an omni.
2043 *
2044 * Note2: On sectored scenarios it's possible to have
2045 * multiple antennas (1omni -the default- and 14 sectors)
2046 * so if we choose to actually support this mode we need
2047 * to allow user to set how many antennas we have and tweak
2048 * the code below to send beacons on all of them.
2049 */
2050 if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP)
2051 antenna = sc->bsent & 4 ? 2 : 1;
2052
2048 2053
2049 /* FIXME: If we are in g mode and rate is a CCK rate 2054 /* FIXME: If we are in g mode and rate is a CCK rate
2050 * subtract ah->ah_txpower.txp_cck_ofdm_pwr_delta 2055 * subtract ah->ah_txpower.txp_cck_ofdm_pwr_delta
@@ -2097,7 +2102,7 @@ ath5k_beacon_send(struct ath5k_softc *sc)
2097 sc->bmisscount++; 2102 sc->bmisscount++;
2098 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 2103 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
2099 "missed %u consecutive beacons\n", sc->bmisscount); 2104 "missed %u consecutive beacons\n", sc->bmisscount);
2100 if (sc->bmisscount > 3) { /* NB: 3 is a guess */ 2105 if (sc->bmisscount > 10) { /* NB: 10 is a guess */
2101 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 2106 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
2102 "stuck beacon time (%u missed)\n", 2107 "stuck beacon time (%u missed)\n",
2103 sc->bmisscount); 2108 sc->bmisscount);
@@ -2118,10 +2123,14 @@ ath5k_beacon_send(struct ath5k_softc *sc)
2118 * are still pending on the queue. 2123 * are still pending on the queue.
2119 */ 2124 */
2120 if (unlikely(ath5k_hw_stop_tx_dma(ah, sc->bhalq))) { 2125 if (unlikely(ath5k_hw_stop_tx_dma(ah, sc->bhalq))) {
2121 ATH5K_WARN(sc, "beacon queue %u didn't stop?\n", sc->bhalq); 2126 ATH5K_WARN(sc, "beacon queue %u didn't start/stop ?\n", sc->bhalq);
2122 /* NB: hw still stops DMA, so proceed */ 2127 /* NB: hw still stops DMA, so proceed */
2123 } 2128 }
2124 2129
2130 /* refresh the beacon for AP mode */
2131 if (sc->opmode == NL80211_IFTYPE_AP)
2132 ath5k_beacon_update(sc->hw, sc->vif);
2133
2125 ath5k_hw_set_txdp(ah, sc->bhalq, bf->daddr); 2134 ath5k_hw_set_txdp(ah, sc->bhalq, bf->daddr);
2126 ath5k_hw_start_tx_dma(ah, sc->bhalq); 2135 ath5k_hw_start_tx_dma(ah, sc->bhalq);
2127 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n", 2136 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n",
@@ -2278,6 +2287,35 @@ ath5k_beacon_config(struct ath5k_softc *sc)
2278 ath5k_hw_set_imr(ah, sc->imask); 2287 ath5k_hw_set_imr(ah, sc->imask);
2279} 2288}
2280 2289
2290static void ath5k_tasklet_beacon(unsigned long data)
2291{
2292 struct ath5k_softc *sc = (struct ath5k_softc *) data;
2293
2294 /*
2295 * Software beacon alert--time to send a beacon.
2296 *
2297 * In IBSS mode we use this interrupt just to
2298 * keep track of the next TBTT (target beacon
2299 * transmission time) in order to detect wether
2300 * automatic TSF updates happened.
2301 */
2302 if (sc->opmode == NL80211_IFTYPE_ADHOC) {
2303 /* XXX: only if VEOL suppported */
2304 u64 tsf = ath5k_hw_get_tsf64(sc->ah);
2305 sc->nexttbtt += sc->bintval;
2306 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
2307 "SWBA nexttbtt: %x hw_tu: %x "
2308 "TSF: %llx\n",
2309 sc->nexttbtt,
2310 TSF_TO_TU(tsf),
2311 (unsigned long long) tsf);
2312 } else {
2313 spin_lock(&sc->block);
2314 ath5k_beacon_send(sc);
2315 spin_unlock(&sc->block);
2316 }
2317}
2318
2281 2319
2282/********************\ 2320/********************\
2283* Interrupt handling * 2321* Interrupt handling *
@@ -2452,7 +2490,7 @@ ath5k_intr(int irq, void *dev_id)
2452 tasklet_schedule(&sc->restq); 2490 tasklet_schedule(&sc->restq);
2453 } else { 2491 } else {
2454 if (status & AR5K_INT_SWBA) { 2492 if (status & AR5K_INT_SWBA) {
2455 tasklet_schedule(&sc->beacontq); 2493 tasklet_hi_schedule(&sc->beacontq);
2456 } 2494 }
2457 if (status & AR5K_INT_RXEOL) { 2495 if (status & AR5K_INT_RXEOL) {
2458 /* 2496 /*
@@ -2482,7 +2520,7 @@ ath5k_intr(int irq, void *dev_id)
2482 ath5k_hw_update_mib_counters(ah, &sc->ll_stats); 2520 ath5k_hw_update_mib_counters(ah, &sc->ll_stats);
2483 } 2521 }
2484 } 2522 }
2485 } while (ath5k_hw_is_intr_pending(ah) && counter-- > 0); 2523 } while (ath5k_hw_is_intr_pending(ah) && --counter > 0);
2486 2524
2487 if (unlikely(!counter)) 2525 if (unlikely(!counter))
2488 ATH5K_WARN(sc, "too many interrupts, giving up for now\n"); 2526 ATH5K_WARN(sc, "too many interrupts, giving up for now\n");
@@ -2731,56 +2769,47 @@ static int
2731ath5k_config(struct ieee80211_hw *hw, u32 changed) 2769ath5k_config(struct ieee80211_hw *hw, u32 changed)
2732{ 2770{
2733 struct ath5k_softc *sc = hw->priv; 2771 struct ath5k_softc *sc = hw->priv;
2772 struct ath5k_hw *ah = sc->ah;
2734 struct ieee80211_conf *conf = &hw->conf; 2773 struct ieee80211_conf *conf = &hw->conf;
2735 int ret; 2774 int ret = 0;
2736 2775
2737 mutex_lock(&sc->lock); 2776 mutex_lock(&sc->lock);
2738 2777
2739 sc->bintval = conf->beacon_int; 2778 sc->bintval = conf->beacon_int;
2740 sc->power_level = conf->power_level;
2741 2779
2742 ret = ath5k_chan_set(sc, conf->channel); 2780 ret = ath5k_chan_set(sc, conf->channel);
2781 if (ret < 0)
2782 return ret;
2743 2783
2744 mutex_unlock(&sc->lock); 2784 if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
2745 return ret; 2785 (sc->power_level != conf->power_level)) {
2746} 2786 sc->power_level = conf->power_level;
2747 2787
2748static int 2788 /* Half dB steps */
2749ath5k_config_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2789 ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2));
2750 struct ieee80211_if_conf *conf)
2751{
2752 struct ath5k_softc *sc = hw->priv;
2753 struct ath5k_hw *ah = sc->ah;
2754 int ret = 0;
2755
2756 mutex_lock(&sc->lock);
2757 if (sc->vif != vif) {
2758 ret = -EIO;
2759 goto unlock;
2760 }
2761 if (conf->changed & IEEE80211_IFCC_BSSID && conf->bssid) {
2762 /* Cache for later use during resets */
2763 memcpy(ah->ah_bssid, conf->bssid, ETH_ALEN);
2764 /* XXX: assoc id is set to 0 for now, mac80211 doesn't have
2765 * a clean way of letting us retrieve this yet. */
2766 ath5k_hw_set_associd(ah, ah->ah_bssid, 0);
2767 mmiowb();
2768 }
2769 if (conf->changed & IEEE80211_IFCC_BEACON &&
2770 (vif->type == NL80211_IFTYPE_ADHOC ||
2771 vif->type == NL80211_IFTYPE_MESH_POINT ||
2772 vif->type == NL80211_IFTYPE_AP)) {
2773 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2774 if (!beacon) {
2775 ret = -ENOMEM;
2776 goto unlock;
2777 }
2778 ath5k_beacon_update(sc, beacon);
2779 } 2790 }
2780 2791
2781unlock: 2792 /* TODO:
2793 * 1) Move this on config_interface and handle each case
2794 * separately eg. when we have only one STA vif, use
2795 * AR5K_ANTMODE_SINGLE_AP
2796 *
2797 * 2) Allow the user to change antenna mode eg. when only
2798 * one antenna is present
2799 *
2800 * 3) Allow the user to set default/tx antenna when possible
2801 *
2802 * 4) Default mode should handle 90% of the cases, together
2803 * with fixed a/b and single AP modes we should be able to
2804 * handle 99%. Sectored modes are extreme cases and i still
2805 * haven't found a usage for them. If we decide to support them,
2806 * then we must allow the user to set how many tx antennas we
2807 * have available
2808 */
2809 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_DEFAULT);
2810
2782 mutex_unlock(&sc->lock); 2811 mutex_unlock(&sc->lock);
2783 return ret; 2812 return 0;
2784} 2813}
2785 2814
2786#define SUPPORTED_FIF_FLAGS \ 2815#define SUPPORTED_FIF_FLAGS \
@@ -3020,28 +3049,55 @@ ath5k_reset_tsf(struct ieee80211_hw *hw)
3020 ath5k_hw_reset_tsf(sc->ah); 3049 ath5k_hw_reset_tsf(sc->ah);
3021} 3050}
3022 3051
3052/*
3053 * Updates the beacon that is sent by ath5k_beacon_send. For adhoc,
3054 * this is called only once at config_bss time, for AP we do it every
3055 * SWBA interrupt so that the TIM will reflect buffered frames.
3056 *
3057 * Called with the beacon lock.
3058 */
3023static int 3059static int
3024ath5k_beacon_update(struct ath5k_softc *sc, struct sk_buff *skb) 3060ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
3025{ 3061{
3026 unsigned long flags;
3027 int ret; 3062 int ret;
3063 struct ath5k_softc *sc = hw->priv;
3064 struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
3065
3066 if (!skb) {
3067 ret = -ENOMEM;
3068 goto out;
3069 }
3028 3070
3029 ath5k_debug_dump_skb(sc, skb, "BC ", 1); 3071 ath5k_debug_dump_skb(sc, skb, "BC ", 1);
3030 3072
3031 spin_lock_irqsave(&sc->block, flags);
3032 ath5k_txbuf_free(sc, sc->bbuf); 3073 ath5k_txbuf_free(sc, sc->bbuf);
3033 sc->bbuf->skb = skb; 3074 sc->bbuf->skb = skb;
3034 ret = ath5k_beacon_setup(sc, sc->bbuf); 3075 ret = ath5k_beacon_setup(sc, sc->bbuf);
3035 if (ret) 3076 if (ret)
3036 sc->bbuf->skb = NULL; 3077 sc->bbuf->skb = NULL;
3078out:
3079 return ret;
3080}
3081
3082/*
3083 * Update the beacon and reconfigure the beacon queues.
3084 */
3085static void
3086ath5k_beacon_reconfig(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
3087{
3088 int ret;
3089 unsigned long flags;
3090 struct ath5k_softc *sc = hw->priv;
3091
3092 spin_lock_irqsave(&sc->block, flags);
3093 ret = ath5k_beacon_update(hw, vif);
3037 spin_unlock_irqrestore(&sc->block, flags); 3094 spin_unlock_irqrestore(&sc->block, flags);
3038 if (!ret) { 3095 if (ret == 0) {
3039 ath5k_beacon_config(sc); 3096 ath5k_beacon_config(sc);
3040 mmiowb(); 3097 mmiowb();
3041 } 3098 }
3042
3043 return ret;
3044} 3099}
3100
3045static void 3101static void
3046set_beacon_filter(struct ieee80211_hw *hw, bool enable) 3102set_beacon_filter(struct ieee80211_hw *hw, bool enable)
3047{ 3103{
@@ -3063,11 +3119,37 @@ static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
3063 u32 changes) 3119 u32 changes)
3064{ 3120{
3065 struct ath5k_softc *sc = hw->priv; 3121 struct ath5k_softc *sc = hw->priv;
3122 struct ath5k_hw *ah = sc->ah;
3123
3124 mutex_lock(&sc->lock);
3125 if (WARN_ON(sc->vif != vif))
3126 goto unlock;
3127
3128 if (changes & BSS_CHANGED_BSSID) {
3129 /* Cache for later use during resets */
3130 memcpy(ah->ah_bssid, bss_conf->bssid, ETH_ALEN);
3131 /* XXX: assoc id is set to 0 for now, mac80211 doesn't have
3132 * a clean way of letting us retrieve this yet. */
3133 ath5k_hw_set_associd(ah, ah->ah_bssid, 0);
3134 mmiowb();
3135 }
3136
3137 if (changes & BSS_CHANGED_BEACON_INT)
3138 sc->bintval = bss_conf->beacon_int;
3139
3066 if (changes & BSS_CHANGED_ASSOC) { 3140 if (changes & BSS_CHANGED_ASSOC) {
3067 mutex_lock(&sc->lock);
3068 sc->assoc = bss_conf->assoc; 3141 sc->assoc = bss_conf->assoc;
3069 if (sc->opmode == NL80211_IFTYPE_STATION) 3142 if (sc->opmode == NL80211_IFTYPE_STATION)
3070 set_beacon_filter(hw, sc->assoc); 3143 set_beacon_filter(hw, sc->assoc);
3071 mutex_unlock(&sc->lock);
3072 } 3144 }
3145
3146 if (changes & BSS_CHANGED_BEACON &&
3147 (vif->type == NL80211_IFTYPE_ADHOC ||
3148 vif->type == NL80211_IFTYPE_MESH_POINT ||
3149 vif->type == NL80211_IFTYPE_AP)) {
3150 ath5k_beacon_reconfig(hw, vif);
3151 }
3152
3153 unlock:
3154 mutex_unlock(&sc->lock);
3073} 3155}
diff --git a/drivers/net/wireless/ath5k/base.h b/drivers/net/wireless/ath/ath5k/base.h
index 822956114cd7..852b2c189fd8 100644
--- a/drivers/net/wireless/ath5k/base.h
+++ b/drivers/net/wireless/ath/ath5k/base.h
@@ -56,7 +56,6 @@
56 56
57struct ath5k_buf { 57struct ath5k_buf {
58 struct list_head list; 58 struct list_head list;
59 unsigned int flags; /* rx descriptor flags */
60 struct ath5k_desc *desc; /* virtual addr of desc */ 59 struct ath5k_desc *desc; /* virtual addr of desc */
61 dma_addr_t daddr; /* physical addr of desc */ 60 dma_addr_t daddr; /* physical addr of desc */
62 struct sk_buff *skb; /* skbuff for buf */ 61 struct sk_buff *skb; /* skbuff for buf */
diff --git a/drivers/net/wireless/ath5k/caps.c b/drivers/net/wireless/ath/ath5k/caps.c
index 367a6c7d3cc7..367a6c7d3cc7 100644
--- a/drivers/net/wireless/ath5k/caps.c
+++ b/drivers/net/wireless/ath/ath5k/caps.c
diff --git a/drivers/net/wireless/ath5k/debug.c b/drivers/net/wireless/ath/ath5k/debug.c
index 4904a07e4b59..4904a07e4b59 100644
--- a/drivers/net/wireless/ath5k/debug.c
+++ b/drivers/net/wireless/ath/ath5k/debug.c
diff --git a/drivers/net/wireless/ath5k/debug.h b/drivers/net/wireless/ath/ath5k/debug.h
index 66f69f04e55e..66f69f04e55e 100644
--- a/drivers/net/wireless/ath5k/debug.h
+++ b/drivers/net/wireless/ath/ath5k/debug.h
diff --git a/drivers/net/wireless/ath5k/desc.c b/drivers/net/wireless/ath/ath5k/desc.c
index dc30a2b70a6b..dc30a2b70a6b 100644
--- a/drivers/net/wireless/ath5k/desc.c
+++ b/drivers/net/wireless/ath/ath5k/desc.c
diff --git a/drivers/net/wireless/ath5k/desc.h b/drivers/net/wireless/ath/ath5k/desc.h
index 56158c804e3e..56158c804e3e 100644
--- a/drivers/net/wireless/ath5k/desc.h
+++ b/drivers/net/wireless/ath/ath5k/desc.h
diff --git a/drivers/net/wireless/ath5k/dma.c b/drivers/net/wireless/ath/ath5k/dma.c
index b65b4feb2d28..941b51130a6f 100644
--- a/drivers/net/wireless/ath5k/dma.c
+++ b/drivers/net/wireless/ath/ath5k/dma.c
@@ -80,8 +80,6 @@ int ath5k_hw_stop_rx_dma(struct ath5k_hw *ah)
80 * ath5k_hw_get_rxdp - Get RX Descriptor's address 80 * ath5k_hw_get_rxdp - Get RX Descriptor's address
81 * 81 *
82 * @ah: The &struct ath5k_hw 82 * @ah: The &struct ath5k_hw
83 *
84 * XXX: Is RXDP read and clear ?
85 */ 83 */
86u32 ath5k_hw_get_rxdp(struct ath5k_hw *ah) 84u32 ath5k_hw_get_rxdp(struct ath5k_hw *ah)
87{ 85{
diff --git a/drivers/net/wireless/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c
index c0fb3b09ba45..c56b494d417a 100644
--- a/drivers/net/wireless/ath5k/eeprom.c
+++ b/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -156,6 +156,17 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
156 ee->ee_db[AR5K_EEPROM_MODE_11G][0] = (val >> 3) & 0x7; 156 ee->ee_db[AR5K_EEPROM_MODE_11G][0] = (val >> 3) & 0x7;
157 } 157 }
158 158
159 AR5K_EEPROM_READ(AR5K_EEPROM_IS_HB63, val);
160
161 if ((ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4)) && val)
162 ee->ee_is_hb63 = true;
163 else
164 ee->ee_is_hb63 = false;
165
166 AR5K_EEPROM_READ(AR5K_EEPROM_RFKILL, val);
167 ee->ee_rfkill_pin = (u8) AR5K_REG_MS(val, AR5K_EEPROM_RFKILL_GPIO_SEL);
168 ee->ee_rfkill_pol = val & AR5K_EEPROM_RFKILL_POLARITY ? true : false;
169
159 return 0; 170 return 0;
160} 171}
161 172
@@ -197,16 +208,16 @@ static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset,
197 ee->ee_ant_control[mode][i++] = (val >> 6) & 0x3f; 208 ee->ee_ant_control[mode][i++] = (val >> 6) & 0x3f;
198 ee->ee_ant_control[mode][i++] = val & 0x3f; 209 ee->ee_ant_control[mode][i++] = val & 0x3f;
199 210
200 /* Get antenna modes */ 211 /* Get antenna switch tables */
201 ah->ah_antenna[mode][0] = 212 ah->ah_ant_ctl[mode][AR5K_ANT_CTL] =
202 (ee->ee_ant_control[mode][0] << 4); 213 (ee->ee_ant_control[mode][0] << 4);
203 ah->ah_antenna[mode][AR5K_ANT_FIXED_A] = 214 ah->ah_ant_ctl[mode][AR5K_ANT_SWTABLE_A] =
204 ee->ee_ant_control[mode][1] | 215 ee->ee_ant_control[mode][1] |
205 (ee->ee_ant_control[mode][2] << 6) | 216 (ee->ee_ant_control[mode][2] << 6) |
206 (ee->ee_ant_control[mode][3] << 12) | 217 (ee->ee_ant_control[mode][3] << 12) |
207 (ee->ee_ant_control[mode][4] << 18) | 218 (ee->ee_ant_control[mode][4] << 18) |
208 (ee->ee_ant_control[mode][5] << 24); 219 (ee->ee_ant_control[mode][5] << 24);
209 ah->ah_antenna[mode][AR5K_ANT_FIXED_B] = 220 ah->ah_ant_ctl[mode][AR5K_ANT_SWTABLE_B] =
210 ee->ee_ant_control[mode][6] | 221 ee->ee_ant_control[mode][6] |
211 (ee->ee_ant_control[mode][7] << 6) | 222 (ee->ee_ant_control[mode][7] << 6) |
212 (ee->ee_ant_control[mode][8] << 12) | 223 (ee->ee_ant_control[mode][8] << 12) |
@@ -640,9 +651,9 @@ ath5k_eeprom_init_11bg_2413(struct ath5k_hw *ah, unsigned int mode, int offset)
640static inline void 651static inline void
641ath5k_get_pcdac_intercepts(struct ath5k_hw *ah, u8 min, u8 max, u8 *vp) 652ath5k_get_pcdac_intercepts(struct ath5k_hw *ah, u8 min, u8 max, u8 *vp)
642{ 653{
643 const static u16 intercepts3[] = 654 static const u16 intercepts3[] =
644 { 0, 5, 10, 20, 30, 50, 70, 85, 90, 95, 100 }; 655 { 0, 5, 10, 20, 30, 50, 70, 85, 90, 95, 100 };
645 const static u16 intercepts3_2[] = 656 static const u16 intercepts3_2[] =
646 { 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100 }; 657 { 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100 };
647 const u16 *ip; 658 const u16 *ip;
648 int i; 659 int i;
@@ -1694,9 +1705,40 @@ ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah)
1694 return 0; 1705 return 0;
1695} 1706}
1696 1707
1708static int
1709ath5k_eeprom_read_spur_chans(struct ath5k_hw *ah)
1710{
1711 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
1712 u32 offset;
1713 u16 val;
1714 int ret = 0, i;
1715
1716 offset = AR5K_EEPROM_CTL(ee->ee_version) +
1717 AR5K_EEPROM_N_CTLS(ee->ee_version);
1718
1719 if (ee->ee_version < AR5K_EEPROM_VERSION_5_3) {
1720 /* No spur info for 5GHz */
1721 ee->ee_spur_chans[0][0] = AR5K_EEPROM_NO_SPUR;
1722 /* 2 channels for 2GHz (2464/2420) */
1723 ee->ee_spur_chans[0][1] = AR5K_EEPROM_5413_SPUR_CHAN_1;
1724 ee->ee_spur_chans[1][1] = AR5K_EEPROM_5413_SPUR_CHAN_2;
1725 ee->ee_spur_chans[2][1] = AR5K_EEPROM_NO_SPUR;
1726 } else if (ee->ee_version >= AR5K_EEPROM_VERSION_5_3) {
1727 for (i = 0; i < AR5K_EEPROM_N_SPUR_CHANS; i++) {
1728 AR5K_EEPROM_READ(offset, val);
1729 ee->ee_spur_chans[i][0] = val;
1730 AR5K_EEPROM_READ(offset + AR5K_EEPROM_N_SPUR_CHANS,
1731 val);
1732 ee->ee_spur_chans[i][1] = val;
1733 offset++;
1734 }
1735 }
1736
1737 return ret;
1738}
1697 1739
1698/* 1740/*
1699 * Initialize eeprom power tables 1741 * Initialize eeprom data structure
1700 */ 1742 */
1701int 1743int
1702ath5k_eeprom_init(struct ath5k_hw *ah) 1744ath5k_eeprom_init(struct ath5k_hw *ah)
@@ -1719,6 +1761,10 @@ ath5k_eeprom_init(struct ath5k_hw *ah)
1719 if (err < 0) 1761 if (err < 0)
1720 return err; 1762 return err;
1721 1763
1764 err = ath5k_eeprom_read_spur_chans(ah);
1765 if (err < 0)
1766 return err;
1767
1722 return 0; 1768 return 0;
1723} 1769}
1724 1770
@@ -1754,16 +1800,3 @@ int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
1754 1800
1755 return 0; 1801 return 0;
1756} 1802}
1757
1758bool ath5k_eeprom_is_hb63(struct ath5k_hw *ah)
1759{
1760 u16 data;
1761
1762 ath5k_hw_eeprom_read(ah, AR5K_EEPROM_IS_HB63, &data);
1763
1764 if ((ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4)) && data)
1765 return true;
1766 else
1767 return false;
1768}
1769
diff --git a/drivers/net/wireless/ath5k/eeprom.h b/drivers/net/wireless/ath/ath5k/eeprom.h
index b0c0606dea0b..64be73a5edae 100644
--- a/drivers/net/wireless/ath5k/eeprom.h
+++ b/drivers/net/wireless/ath/ath5k/eeprom.h
@@ -26,6 +26,13 @@
26#define AR5K_EEPROM_MAGIC_5210 0x0000145a /* 5210 */ 26#define AR5K_EEPROM_MAGIC_5210 0x0000145a /* 5210 */
27 27
28#define AR5K_EEPROM_IS_HB63 0x000b /* Talon detect */ 28#define AR5K_EEPROM_IS_HB63 0x000b /* Talon detect */
29
30#define AR5K_EEPROM_RFKILL 0x0f
31#define AR5K_EEPROM_RFKILL_GPIO_SEL 0x0000001c
32#define AR5K_EEPROM_RFKILL_GPIO_SEL_S 2
33#define AR5K_EEPROM_RFKILL_POLARITY 0x00000002
34#define AR5K_EEPROM_RFKILL_POLARITY_S 1
35
29#define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */ 36#define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */
30#define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */ 37#define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */
31#define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */ 38#define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */
@@ -66,11 +73,6 @@
66#define AR5K_EEPROM_HDR_RFKILL(_v) (((_v) >> 14) & 0x1) /* Device has RFKill support */ 73#define AR5K_EEPROM_HDR_RFKILL(_v) (((_v) >> 14) & 0x1) /* Device has RFKill support */
67#define AR5K_EEPROM_HDR_T_5GHZ_DIS(_v) (((_v) >> 15) & 0x1) /* Disable turbo for 5Ghz */ 74#define AR5K_EEPROM_HDR_T_5GHZ_DIS(_v) (((_v) >> 15) & 0x1) /* Disable turbo for 5Ghz */
68 75
69#define AR5K_EEPROM_RFKILL_GPIO_SEL 0x0000001c
70#define AR5K_EEPROM_RFKILL_GPIO_SEL_S 2
71#define AR5K_EEPROM_RFKILL_POLARITY 0x00000002
72#define AR5K_EEPROM_RFKILL_POLARITY_S 1
73
74/* Newer EEPROMs are using a different offset */ 76/* Newer EEPROMs are using a different offset */
75#define AR5K_EEPROM_OFF(_v, _v3_0, _v3_3) \ 77#define AR5K_EEPROM_OFF(_v, _v3_0, _v3_3) \
76 (((_v) >= AR5K_EEPROM_VERSION_3_3) ? _v3_3 : _v3_0) 78 (((_v) >= AR5K_EEPROM_VERSION_3_3) ? _v3_3 : _v3_0)
@@ -211,6 +213,23 @@
211#define AR5K_EEPROM_I_GAIN 10 213#define AR5K_EEPROM_I_GAIN 10
212#define AR5K_EEPROM_CCK_OFDM_DELTA 15 214#define AR5K_EEPROM_CCK_OFDM_DELTA 15
213#define AR5K_EEPROM_N_IQ_CAL 2 215#define AR5K_EEPROM_N_IQ_CAL 2
216/* 5GHz/2GHz */
217enum ath5k_eeprom_freq_bands{
218 AR5K_EEPROM_BAND_5GHZ = 0,
219 AR5K_EEPROM_BAND_2GHZ = 1,
220 AR5K_EEPROM_N_FREQ_BANDS,
221};
222/* Spur chans per freq band */
223#define AR5K_EEPROM_N_SPUR_CHANS 5
224/* fbin value for chan 2464 x2 */
225#define AR5K_EEPROM_5413_SPUR_CHAN_1 1640
226/* fbin value for chan 2420 x2 */
227#define AR5K_EEPROM_5413_SPUR_CHAN_2 1200
228#define AR5K_EEPROM_SPUR_CHAN_MASK 0x3FFF
229#define AR5K_EEPROM_NO_SPUR 0x8000
230#define AR5K_SPUR_CHAN_WIDTH 87
231#define AR5K_SPUR_SYMBOL_WIDTH_BASE_100Hz 3125
232#define AR5K_SPUR_SYMBOL_WIDTH_TURBO_100Hz 6250
214 233
215#define AR5K_EEPROM_READ(_o, _v) do { \ 234#define AR5K_EEPROM_READ(_o, _v) do { \
216 ret = ath5k_hw_eeprom_read(ah, (_o), &(_v)); \ 235 ret = ath5k_hw_eeprom_read(ah, (_o), &(_v)); \
@@ -221,11 +240,11 @@
221#define AR5K_EEPROM_READ_HDR(_o, _v) \ 240#define AR5K_EEPROM_READ_HDR(_o, _v) \
222 AR5K_EEPROM_READ(_o, ah->ah_capabilities.cap_eeprom._v); \ 241 AR5K_EEPROM_READ(_o, ah->ah_capabilities.cap_eeprom._v); \
223 242
224enum ath5k_ant_setting { 243enum ath5k_ant_table {
225 AR5K_ANT_VARIABLE = 0, /* variable by programming */ 244 AR5K_ANT_CTL = 0, /* Idle switch table settings */
226 AR5K_ANT_FIXED_A = 1, /* fixed to 11a frequencies */ 245 AR5K_ANT_SWTABLE_A = 1, /* Switch table for antenna A */
227 AR5K_ANT_FIXED_B = 2, /* fixed to 11b frequencies */ 246 AR5K_ANT_SWTABLE_B = 2, /* Switch table for antenna B */
228 AR5K_ANT_MAX = 3, 247 AR5K_ANT_MAX,
229}; 248};
230 249
231enum ath5k_ctl_mode { 250enum ath5k_ctl_mode {
@@ -369,6 +388,9 @@ struct ath5k_eeprom_info {
369 u16 ee_version; 388 u16 ee_version;
370 u16 ee_header; 389 u16 ee_header;
371 u16 ee_ant_gain; 390 u16 ee_ant_gain;
391 u8 ee_rfkill_pin;
392 bool ee_rfkill_pol;
393 bool ee_is_hb63;
372 u16 ee_misc0; 394 u16 ee_misc0;
373 u16 ee_misc1; 395 u16 ee_misc1;
374 u16 ee_misc2; 396 u16 ee_misc2;
@@ -436,6 +458,10 @@ struct ath5k_eeprom_info {
436 s8 ee_pga_desired_size_turbo[AR5K_EEPROM_N_MODES]; 458 s8 ee_pga_desired_size_turbo[AR5K_EEPROM_N_MODES];
437 s8 ee_pd_gain_overlap; 459 s8 ee_pd_gain_overlap;
438 460
461 /* Spur mitigation data (fbin values for spur channels) */
462 u16 ee_spur_chans[AR5K_EEPROM_N_SPUR_CHANS][AR5K_EEPROM_N_FREQ_BANDS];
463
464 /* Antenna raw switch tables */
439 u32 ee_antenna[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX]; 465 u32 ee_antenna[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX];
440}; 466};
441 467
diff --git a/drivers/net/wireless/ath5k/gpio.c b/drivers/net/wireless/ath/ath5k/gpio.c
index 64a27e73d02e..64a27e73d02e 100644
--- a/drivers/net/wireless/ath5k/gpio.c
+++ b/drivers/net/wireless/ath/ath5k/gpio.c
diff --git a/drivers/net/wireless/ath5k/initvals.c b/drivers/net/wireless/ath/ath5k/initvals.c
index 61fb621ed20d..18eb5190ce4b 100644
--- a/drivers/net/wireless/ath5k/initvals.c
+++ b/drivers/net/wireless/ath/ath5k/initvals.c
@@ -537,8 +537,6 @@ static const struct ath5k_ini ar5212_ini_common_start[] = {
537 { AR5K_DCU_TX_FILTER_1(15), 0x00000000 }, 537 { AR5K_DCU_TX_FILTER_1(15), 0x00000000 },
538 { AR5K_DCU_TX_FILTER_CLR, 0x00000000 }, 538 { AR5K_DCU_TX_FILTER_CLR, 0x00000000 },
539 { AR5K_DCU_TX_FILTER_SET, 0x00000000 }, 539 { AR5K_DCU_TX_FILTER_SET, 0x00000000 },
540 { AR5K_DCU_TX_FILTER_CLR, 0x00000000 },
541 { AR5K_DCU_TX_FILTER_SET, 0x00000000 },
542 { AR5K_STA_ID1, 0x00000000 }, 540 { AR5K_STA_ID1, 0x00000000 },
543 { AR5K_BSS_ID0, 0x00000000 }, 541 { AR5K_BSS_ID0, 0x00000000 },
544 { AR5K_BSS_ID1, 0x00000000 }, 542 { AR5K_BSS_ID1, 0x00000000 },
@@ -669,7 +667,7 @@ static const struct ath5k_ini ar5212_ini_common_start[] = {
669 /*{ AR5K_PHY(650), 0x000001b5 },*/ 667 /*{ AR5K_PHY(650), 0x000001b5 },*/
670 { AR5K_PHY(651), 0x00000000 }, 668 { AR5K_PHY(651), 0x00000000 },
671 { AR5K_PHY_TXPOWER_RATE3, 0x20202020 }, 669 { AR5K_PHY_TXPOWER_RATE3, 0x20202020 },
672 { AR5K_PHY_TXPOWER_RATE2, 0x20202020 }, 670 { AR5K_PHY_TXPOWER_RATE4, 0x20202020 },
673 /*{ AR5K_PHY(655), 0x13c889af },*/ 671 /*{ AR5K_PHY(655), 0x13c889af },*/
674 { AR5K_PHY(656), 0x38490a20 }, 672 { AR5K_PHY(656), 0x38490a20 },
675 { AR5K_PHY(657), 0x00007bb6 }, 673 { AR5K_PHY(657), 0x00007bb6 },
@@ -718,7 +716,7 @@ static const struct ath5k_ini_mode ar5212_ini_mode_start[] = {
718 { AR5K_PHY_SETTLING, 716 { AR5K_PHY_SETTLING,
719 { 0x1372161c, 0x13721c25, 0x13721722, 0x137216a2, 0x13721c25 } }, 717 { 0x1372161c, 0x13721c25, 0x13721722, 0x137216a2, 0x13721c25 } },
720 { AR5K_PHY_AGCCTL, 718 { AR5K_PHY_AGCCTL,
721 { 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d18, 0x00009d18 } }, 719 { 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d18, 0x00009d10 } },
722 { AR5K_PHY_NF, 720 { AR5K_PHY_NF,
723 { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } }, 721 { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } },
724 { AR5K_PHY_WEAK_OFDM_HIGH_THR, 722 { AR5K_PHY_WEAK_OFDM_HIGH_THR,
@@ -799,7 +797,7 @@ static const struct ath5k_ini_mode rf5112_ini_mode_end[] = {
799 { AR5K_PHY_DESIRED_SIZE, 797 { AR5K_PHY_DESIRED_SIZE,
800 { 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } }, 798 { 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } },
801 { AR5K_PHY_SIG, 799 { AR5K_PHY_SIG,
802 { 0x7e800d2e, 0x7e800d2e, 0x7ee80d2e, 0x7ee80d2e, 0x7ee80d2e } }, 800 { 0x7e800d2e, 0x7e800d2e, 0x7ee80d2e, 0x7ee80d2e, 0x7e800d2e } },
803 { AR5K_PHY_AGCCOARSE, 801 { AR5K_PHY_AGCCOARSE,
804 { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e } }, 802 { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e } },
805 { AR5K_PHY_WEAK_OFDM_LOW_THR, 803 { AR5K_PHY_WEAK_OFDM_LOW_THR,
diff --git a/drivers/net/wireless/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c
index 19555fb79c9b..876725f08b6c 100644
--- a/drivers/net/wireless/ath5k/led.c
+++ b/drivers/net/wireless/ath/ath5k/led.c
@@ -53,8 +53,6 @@
53 53
54/* Devices we match on for LED config info (typically laptops) */ 54/* Devices we match on for LED config info (typically laptops) */
55static const struct pci_device_id ath5k_led_devices[] = { 55static const struct pci_device_id ath5k_led_devices[] = {
56 /* IBM-specific AR5212 */
57 { PCI_VDEVICE(ATHEROS, PCI_DEVICE_ID_ATHEROS_AR5212_IBM), ATH_LED(0, 0) },
58 /* AR5211 */ 56 /* AR5211 */
59 { PCI_VDEVICE(ATHEROS, PCI_DEVICE_ID_ATHEROS_AR5211), ATH_LED(0, 0) }, 57 { PCI_VDEVICE(ATHEROS, PCI_DEVICE_ID_ATHEROS_AR5211), ATH_LED(0, 0) },
60 /* HP Compaq nc6xx, nc4000, nx6000 */ 58 /* HP Compaq nc6xx, nc4000, nx6000 */
@@ -67,6 +65,12 @@ static const struct pci_device_id ath5k_led_devices[] = {
67 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0428), ATH_LED(3, 0) }, 65 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0428), ATH_LED(3, 0) },
68 /* Acer Extensa 5620z (nekoreeve@gmail.com) */ 66 /* Acer Extensa 5620z (nekoreeve@gmail.com) */
69 { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0105), ATH_LED(3, 0) }, 67 { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0105), ATH_LED(3, 0) },
68 /* Fukato Datacask Jupiter 1014a (mrb74@gmx.at) */
69 { ATH_SDEVICE(PCI_VENDOR_ID_AZWAVE, 0x1026), ATH_LED(3, 0) },
70 /* IBM ThinkPad AR5BXB6 (legovini@spiro.fisica.unipd.it) */
71 { ATH_SDEVICE(PCI_VENDOR_ID_IBM, 0x058a), ATH_LED(1, 0) },
72 /* IBM-specific AR5212 (all others) */
73 { PCI_VDEVICE(ATHEROS, PCI_DEVICE_ID_ATHEROS_AR5212_IBM), ATH_LED(0, 0) },
70 { } 74 { }
71}; 75};
72 76
@@ -78,7 +82,7 @@ void ath5k_led_enable(struct ath5k_softc *sc)
78 } 82 }
79} 83}
80 84
81void ath5k_led_on(struct ath5k_softc *sc) 85static void ath5k_led_on(struct ath5k_softc *sc)
82{ 86{
83 if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) 87 if (!test_bit(ATH_STAT_LEDSOFT, sc->status))
84 return; 88 return;
diff --git a/drivers/net/wireless/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c
index 55122f1e1986..ec35503f6a40 100644
--- a/drivers/net/wireless/ath5k/pcu.c
+++ b/drivers/net/wireless/ath/ath5k/pcu.c
@@ -736,8 +736,8 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
736 /* When in AP mode zero timer0 to start TSF */ 736 /* When in AP mode zero timer0 to start TSF */
737 if (ah->ah_op_mode == NL80211_IFTYPE_AP) 737 if (ah->ah_op_mode == NL80211_IFTYPE_AP)
738 ath5k_hw_reg_write(ah, 0, AR5K_TIMER0); 738 ath5k_hw_reg_write(ah, 0, AR5K_TIMER0);
739 else 739
740 ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0); 740 ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0);
741 ath5k_hw_reg_write(ah, timer1, AR5K_TIMER1); 741 ath5k_hw_reg_write(ah, timer1, AR5K_TIMER1);
742 ath5k_hw_reg_write(ah, timer2, AR5K_TIMER2); 742 ath5k_hw_reg_write(ah, timer2, AR5K_TIMER2);
743 ath5k_hw_reg_write(ah, timer3, AR5K_TIMER3); 743 ath5k_hw_reg_write(ah, timer3, AR5K_TIMER3);
@@ -1003,7 +1003,7 @@ int ath5k_hw_reset_key(struct ath5k_hw *ah, u16 entry)
1003 * Note2: Windows driver (ndiswrapper) sets this to 1003 * Note2: Windows driver (ndiswrapper) sets this to
1004 * 0x00000714 instead of 0x00000007 1004 * 0x00000714 instead of 0x00000007
1005 */ 1005 */
1006 if (ah->ah_version > AR5K_AR5211) { 1006 if (ah->ah_version >= AR5K_AR5211) {
1007 ath5k_hw_reg_write(ah, AR5K_KEYTABLE_TYPE_NULL, 1007 ath5k_hw_reg_write(ah, AR5K_KEYTABLE_TYPE_NULL,
1008 AR5K_KEYTABLE_TYPE(entry)); 1008 AR5K_KEYTABLE_TYPE(entry));
1009 1009
@@ -1038,9 +1038,9 @@ int ath5k_keycache_type(const struct ieee80211_key_conf *key)
1038 case ALG_CCMP: 1038 case ALG_CCMP:
1039 return AR5K_KEYTABLE_TYPE_CCM; 1039 return AR5K_KEYTABLE_TYPE_CCM;
1040 case ALG_WEP: 1040 case ALG_WEP:
1041 if (key->keylen == LEN_WEP40) 1041 if (key->keylen == WLAN_KEY_LEN_WEP40)
1042 return AR5K_KEYTABLE_TYPE_40; 1042 return AR5K_KEYTABLE_TYPE_40;
1043 else if (key->keylen == LEN_WEP104) 1043 else if (key->keylen == WLAN_KEY_LEN_WEP104)
1044 return AR5K_KEYTABLE_TYPE_104; 1044 return AR5K_KEYTABLE_TYPE_104;
1045 return -EINVAL; 1045 return -EINVAL;
1046 default: 1046 default:
diff --git a/drivers/net/wireless/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index b48b29dca3d2..a876ca8d69ef 100644
--- a/drivers/net/wireless/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -168,9 +168,6 @@ int ath5k_hw_rfgain_opt_init(struct ath5k_hw *ah)
168 * tx power and a Peak to Average Power Detector (PAPD) will try 168 * tx power and a Peak to Average Power Detector (PAPD) will try
169 * to measure the gain. 169 * to measure the gain.
170 * 170 *
171 * TODO: Use propper tx power setting for the probe packet so
172 * that we don't observe a serious power drop on the receiver
173 *
174 * XXX: How about forcing a tx packet (bypassing PCU arbitrator etc) 171 * XXX: How about forcing a tx packet (bypassing PCU arbitrator etc)
175 * just after we enable the probe so that we don't mess with 172 * just after we enable the probe so that we don't mess with
176 * standard traffic ? Maybe it's time to use sw interrupts and 173 * standard traffic ? Maybe it's time to use sw interrupts and
@@ -186,7 +183,7 @@ static void ath5k_hw_request_rfgain_probe(struct ath5k_hw *ah)
186 183
187 /* Send the packet with 2dB below max power as 184 /* Send the packet with 2dB below max power as
188 * patent doc suggest */ 185 * patent doc suggest */
189 ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txpower.txp_max_pwr - 4, 186 ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txpower.txp_ofdm - 4,
190 AR5K_PHY_PAPD_PROBE_TXPOWER) | 187 AR5K_PHY_PAPD_PROBE_TXPOWER) |
191 AR5K_PHY_PAPD_PROBE_TX_NEXT, AR5K_PHY_PAPD_PROBE); 188 AR5K_PHY_PAPD_PROBE_TX_NEXT, AR5K_PHY_PAPD_PROBE);
192 189
@@ -1356,6 +1353,257 @@ int ath5k_hw_phy_calibrate(struct ath5k_hw *ah,
1356 return ret; 1353 return ret;
1357} 1354}
1358 1355
1356/***************************\
1357* Spur mitigation functions *
1358\***************************/
1359
1360bool ath5k_hw_chan_has_spur_noise(struct ath5k_hw *ah,
1361 struct ieee80211_channel *channel)
1362{
1363 u8 refclk_freq;
1364
1365 if ((ah->ah_radio == AR5K_RF5112) ||
1366 (ah->ah_radio == AR5K_RF5413) ||
1367 (ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4)))
1368 refclk_freq = 40;
1369 else
1370 refclk_freq = 32;
1371
1372 if ((channel->center_freq % refclk_freq != 0) &&
1373 ((channel->center_freq % refclk_freq < 10) ||
1374 (channel->center_freq % refclk_freq > 22)))
1375 return true;
1376 else
1377 return false;
1378}
1379
1380void
1381ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah,
1382 struct ieee80211_channel *channel)
1383{
1384 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
1385 u32 mag_mask[4] = {0, 0, 0, 0};
1386 u32 pilot_mask[2] = {0, 0};
1387 /* Note: fbin values are scaled up by 2 */
1388 u16 spur_chan_fbin, chan_fbin, symbol_width, spur_detection_window;
1389 s32 spur_delta_phase, spur_freq_sigma_delta;
1390 s32 spur_offset, num_symbols_x16;
1391 u8 num_symbol_offsets, i, freq_band;
1392
1393 /* Convert current frequency to fbin value (the same way channels
1394 * are stored on EEPROM, check out ath5k_eeprom_bin2freq) and scale
1395 * up by 2 so we can compare it later */
1396 if (channel->hw_value & CHANNEL_2GHZ) {
1397 chan_fbin = (channel->center_freq - 2300) * 10;
1398 freq_band = AR5K_EEPROM_BAND_2GHZ;
1399 } else {
1400 chan_fbin = (channel->center_freq - 4900) * 10;
1401 freq_band = AR5K_EEPROM_BAND_5GHZ;
1402 }
1403
1404 /* Check if any spur_chan_fbin from EEPROM is
1405 * within our current channel's spur detection range */
1406 spur_chan_fbin = AR5K_EEPROM_NO_SPUR;
1407 spur_detection_window = AR5K_SPUR_CHAN_WIDTH;
1408 /* XXX: Half/Quarter channels ?*/
1409 if (channel->hw_value & CHANNEL_TURBO)
1410 spur_detection_window *= 2;
1411
1412 for (i = 0; i < AR5K_EEPROM_N_SPUR_CHANS; i++) {
1413 spur_chan_fbin = ee->ee_spur_chans[i][freq_band];
1414
1415 /* Note: mask cleans AR5K_EEPROM_NO_SPUR flag
1416 * so it's zero if we got nothing from EEPROM */
1417 if (spur_chan_fbin == AR5K_EEPROM_NO_SPUR) {
1418 spur_chan_fbin &= AR5K_EEPROM_SPUR_CHAN_MASK;
1419 break;
1420 }
1421
1422 if ((chan_fbin - spur_detection_window <=
1423 (spur_chan_fbin & AR5K_EEPROM_SPUR_CHAN_MASK)) &&
1424 (chan_fbin + spur_detection_window >=
1425 (spur_chan_fbin & AR5K_EEPROM_SPUR_CHAN_MASK))) {
1426 spur_chan_fbin &= AR5K_EEPROM_SPUR_CHAN_MASK;
1427 break;
1428 }
1429 }
1430
1431 /* We need to enable spur filter for this channel */
1432 if (spur_chan_fbin) {
1433 spur_offset = spur_chan_fbin - chan_fbin;
1434 /*
1435 * Calculate deltas:
1436 * spur_freq_sigma_delta -> spur_offset / sample_freq << 21
1437 * spur_delta_phase -> spur_offset / chip_freq << 11
1438 * Note: Both values have 100KHz resolution
1439 */
1440 /* XXX: Half/Quarter rate channels ? */
1441 switch (channel->hw_value) {
1442 case CHANNEL_A:
1443 /* Both sample_freq and chip_freq are 40MHz */
1444 spur_delta_phase = (spur_offset << 17) / 25;
1445 spur_freq_sigma_delta = (spur_delta_phase >> 10);
1446 symbol_width = AR5K_SPUR_SYMBOL_WIDTH_BASE_100Hz;
1447 break;
1448 case CHANNEL_G:
1449 /* sample_freq -> 40MHz chip_freq -> 44MHz
1450 * (for b compatibility) */
1451 spur_freq_sigma_delta = (spur_offset << 8) / 55;
1452 spur_delta_phase = (spur_offset << 17) / 25;
1453 symbol_width = AR5K_SPUR_SYMBOL_WIDTH_BASE_100Hz;
1454 break;
1455 case CHANNEL_T:
1456 case CHANNEL_TG:
1457 /* Both sample_freq and chip_freq are 80MHz */
1458 spur_delta_phase = (spur_offset << 16) / 25;
1459 spur_freq_sigma_delta = (spur_delta_phase >> 10);
1460 symbol_width = AR5K_SPUR_SYMBOL_WIDTH_TURBO_100Hz;
1461 break;
1462 default:
1463 return;
1464 }
1465
1466 /* Calculate pilot and magnitude masks */
1467
1468 /* Scale up spur_offset by 1000 to switch to 100HZ resolution
1469 * and divide by symbol_width to find how many symbols we have
1470 * Note: number of symbols is scaled up by 16 */
1471 num_symbols_x16 = ((spur_offset * 1000) << 4) / symbol_width;
1472
1473 /* Spur is on a symbol if num_symbols_x16 % 16 is zero */
1474 if (!(num_symbols_x16 & 0xF))
1475 /* _X_ */
1476 num_symbol_offsets = 3;
1477 else
1478 /* _xx_ */
1479 num_symbol_offsets = 4;
1480
1481 for (i = 0; i < num_symbol_offsets; i++) {
1482
1483 /* Calculate pilot mask */
1484 s32 curr_sym_off =
1485 (num_symbols_x16 / 16) + i + 25;
1486
1487 /* Pilot magnitude mask seems to be a way to
1488 * declare the boundaries for our detection
1489 * window or something, it's 2 for the middle
1490 * value(s) where the symbol is expected to be
1491 * and 1 on the boundary values */
1492 u8 plt_mag_map =
1493 (i == 0 || i == (num_symbol_offsets - 1))
1494 ? 1 : 2;
1495
1496 if (curr_sym_off >= 0 && curr_sym_off <= 32) {
1497 if (curr_sym_off <= 25)
1498 pilot_mask[0] |= 1 << curr_sym_off;
1499 else if (curr_sym_off >= 27)
1500 pilot_mask[0] |= 1 << (curr_sym_off - 1);
1501 } else if (curr_sym_off >= 33 && curr_sym_off <= 52)
1502 pilot_mask[1] |= 1 << (curr_sym_off - 33);
1503
1504 /* Calculate magnitude mask (for viterbi decoder) */
1505 if (curr_sym_off >= -1 && curr_sym_off <= 14)
1506 mag_mask[0] |=
1507 plt_mag_map << (curr_sym_off + 1) * 2;
1508 else if (curr_sym_off >= 15 && curr_sym_off <= 30)
1509 mag_mask[1] |=
1510 plt_mag_map << (curr_sym_off - 15) * 2;
1511 else if (curr_sym_off >= 31 && curr_sym_off <= 46)
1512 mag_mask[2] |=
1513 plt_mag_map << (curr_sym_off - 31) * 2;
1514 else if (curr_sym_off >= 46 && curr_sym_off <= 53)
1515 mag_mask[3] |=
1516 plt_mag_map << (curr_sym_off - 47) * 2;
1517
1518 }
1519
1520 /* Write settings on hw to enable spur filter */
1521 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_BIN_MASK_CTL,
1522 AR5K_PHY_BIN_MASK_CTL_RATE, 0xff);
1523 /* XXX: Self correlator also ? */
1524 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ,
1525 AR5K_PHY_IQ_PILOT_MASK_EN |
1526 AR5K_PHY_IQ_CHAN_MASK_EN |
1527 AR5K_PHY_IQ_SPUR_FILT_EN);
1528
1529 /* Set delta phase and freq sigma delta */
1530 ath5k_hw_reg_write(ah,
1531 AR5K_REG_SM(spur_delta_phase,
1532 AR5K_PHY_TIMING_11_SPUR_DELTA_PHASE) |
1533 AR5K_REG_SM(spur_freq_sigma_delta,
1534 AR5K_PHY_TIMING_11_SPUR_FREQ_SD) |
1535 AR5K_PHY_TIMING_11_USE_SPUR_IN_AGC,
1536 AR5K_PHY_TIMING_11);
1537
1538 /* Write pilot masks */
1539 ath5k_hw_reg_write(ah, pilot_mask[0], AR5K_PHY_TIMING_7);
1540 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TIMING_8,
1541 AR5K_PHY_TIMING_8_PILOT_MASK_2,
1542 pilot_mask[1]);
1543
1544 ath5k_hw_reg_write(ah, pilot_mask[0], AR5K_PHY_TIMING_9);
1545 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TIMING_10,
1546 AR5K_PHY_TIMING_10_PILOT_MASK_2,
1547 pilot_mask[1]);
1548
1549 /* Write magnitude masks */
1550 ath5k_hw_reg_write(ah, mag_mask[0], AR5K_PHY_BIN_MASK_1);
1551 ath5k_hw_reg_write(ah, mag_mask[1], AR5K_PHY_BIN_MASK_2);
1552 ath5k_hw_reg_write(ah, mag_mask[2], AR5K_PHY_BIN_MASK_3);
1553 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_BIN_MASK_CTL,
1554 AR5K_PHY_BIN_MASK_CTL_MASK_4,
1555 mag_mask[3]);
1556
1557 ath5k_hw_reg_write(ah, mag_mask[0], AR5K_PHY_BIN_MASK2_1);
1558 ath5k_hw_reg_write(ah, mag_mask[1], AR5K_PHY_BIN_MASK2_2);
1559 ath5k_hw_reg_write(ah, mag_mask[2], AR5K_PHY_BIN_MASK2_3);
1560 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_BIN_MASK2_4,
1561 AR5K_PHY_BIN_MASK2_4_MASK_4,
1562 mag_mask[3]);
1563
1564 } else if (ath5k_hw_reg_read(ah, AR5K_PHY_IQ) &
1565 AR5K_PHY_IQ_SPUR_FILT_EN) {
1566 /* Clean up spur mitigation settings and disable fliter */
1567 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_BIN_MASK_CTL,
1568 AR5K_PHY_BIN_MASK_CTL_RATE, 0);
1569 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_IQ,
1570 AR5K_PHY_IQ_PILOT_MASK_EN |
1571 AR5K_PHY_IQ_CHAN_MASK_EN |
1572 AR5K_PHY_IQ_SPUR_FILT_EN);
1573 ath5k_hw_reg_write(ah, 0, AR5K_PHY_TIMING_11);
1574
1575 /* Clear pilot masks */
1576 ath5k_hw_reg_write(ah, 0, AR5K_PHY_TIMING_7);
1577 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TIMING_8,
1578 AR5K_PHY_TIMING_8_PILOT_MASK_2,
1579 0);
1580
1581 ath5k_hw_reg_write(ah, 0, AR5K_PHY_TIMING_9);
1582 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TIMING_10,
1583 AR5K_PHY_TIMING_10_PILOT_MASK_2,
1584 0);
1585
1586 /* Clear magnitude masks */
1587 ath5k_hw_reg_write(ah, 0, AR5K_PHY_BIN_MASK_1);
1588 ath5k_hw_reg_write(ah, 0, AR5K_PHY_BIN_MASK_2);
1589 ath5k_hw_reg_write(ah, 0, AR5K_PHY_BIN_MASK_3);
1590 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_BIN_MASK_CTL,
1591 AR5K_PHY_BIN_MASK_CTL_MASK_4,
1592 0);
1593
1594 ath5k_hw_reg_write(ah, 0, AR5K_PHY_BIN_MASK2_1);
1595 ath5k_hw_reg_write(ah, 0, AR5K_PHY_BIN_MASK2_2);
1596 ath5k_hw_reg_write(ah, 0, AR5K_PHY_BIN_MASK2_3);
1597 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_BIN_MASK2_4,
1598 AR5K_PHY_BIN_MASK2_4_MASK_4,
1599 0);
1600 }
1601}
1602
1603/********************\
1604 Misc PHY functions
1605\********************/
1606
1359int ath5k_hw_phy_disable(struct ath5k_hw *ah) 1607int ath5k_hw_phy_disable(struct ath5k_hw *ah)
1360{ 1608{
1361 ATH5K_TRACE(ah->ah_sc); 1609 ATH5K_TRACE(ah->ah_sc);
@@ -1365,10 +1613,6 @@ int ath5k_hw_phy_disable(struct ath5k_hw *ah)
1365 return 0; 1613 return 0;
1366} 1614}
1367 1615
1368/********************\
1369 Misc PHY functions
1370\********************/
1371
1372/* 1616/*
1373 * Get the PHY Chip revision 1617 * Get the PHY Chip revision
1374 */ 1618 */
@@ -1417,25 +1661,189 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan)
1417 return ret; 1661 return ret;
1418} 1662}
1419 1663
1664/*****************\
1665* Antenna control *
1666\*****************/
1667
1420void /*TODO:Boundary check*/ 1668void /*TODO:Boundary check*/
1421ath5k_hw_set_def_antenna(struct ath5k_hw *ah, unsigned int ant) 1669ath5k_hw_set_def_antenna(struct ath5k_hw *ah, u8 ant)
1422{ 1670{
1423 ATH5K_TRACE(ah->ah_sc); 1671 ATH5K_TRACE(ah->ah_sc);
1424 /*Just a try M.F.*/ 1672
1425 if (ah->ah_version != AR5K_AR5210) 1673 if (ah->ah_version != AR5K_AR5210)
1426 ath5k_hw_reg_write(ah, ant, AR5K_DEFAULT_ANTENNA); 1674 ath5k_hw_reg_write(ah, ant & 0x7, AR5K_DEFAULT_ANTENNA);
1427} 1675}
1428 1676
1429unsigned int ath5k_hw_get_def_antenna(struct ath5k_hw *ah) 1677unsigned int ath5k_hw_get_def_antenna(struct ath5k_hw *ah)
1430{ 1678{
1431 ATH5K_TRACE(ah->ah_sc); 1679 ATH5K_TRACE(ah->ah_sc);
1432 /*Just a try M.F.*/ 1680
1433 if (ah->ah_version != AR5K_AR5210) 1681 if (ah->ah_version != AR5K_AR5210)
1434 return ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA); 1682 return ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA) & 0x7;
1435 1683
1436 return false; /*XXX: What do we return for 5210 ?*/ 1684 return false; /*XXX: What do we return for 5210 ?*/
1437} 1685}
1438 1686
1687/*
1688 * Enable/disable fast rx antenna diversity
1689 */
1690static void
1691ath5k_hw_set_fast_div(struct ath5k_hw *ah, u8 ee_mode, bool enable)
1692{
1693 switch (ee_mode) {
1694 case AR5K_EEPROM_MODE_11G:
1695 /* XXX: This is set to
1696 * disabled on initvals !!! */
1697 case AR5K_EEPROM_MODE_11A:
1698 if (enable)
1699 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_AGCCTL,
1700 AR5K_PHY_AGCCTL_OFDM_DIV_DIS);
1701 else
1702 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
1703 AR5K_PHY_AGCCTL_OFDM_DIV_DIS);
1704 break;
1705 case AR5K_EEPROM_MODE_11B:
1706 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
1707 AR5K_PHY_AGCCTL_OFDM_DIV_DIS);
1708 break;
1709 default:
1710 return;
1711 }
1712
1713 if (enable) {
1714 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART,
1715 AR5K_PHY_RESTART_DIV_GC, 0xc);
1716
1717 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV,
1718 AR5K_PHY_FAST_ANT_DIV_EN);
1719 } else {
1720 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART,
1721 AR5K_PHY_RESTART_DIV_GC, 0x8);
1722
1723 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV,
1724 AR5K_PHY_FAST_ANT_DIV_EN);
1725 }
1726}
1727
1728/*
1729 * Set antenna operating mode
1730 */
1731void
1732ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode)
1733{
1734 struct ieee80211_channel *channel = &ah->ah_current_channel;
1735 bool use_def_for_tx, update_def_on_tx, use_def_for_rts, fast_div;
1736 bool use_def_for_sg;
1737 u8 def_ant, tx_ant, ee_mode;
1738 u32 sta_id1 = 0;
1739
1740 def_ant = ah->ah_def_ant;
1741
1742 ATH5K_TRACE(ah->ah_sc);
1743
1744 switch (channel->hw_value & CHANNEL_MODES) {
1745 case CHANNEL_A:
1746 case CHANNEL_T:
1747 case CHANNEL_XR:
1748 ee_mode = AR5K_EEPROM_MODE_11A;
1749 break;
1750 case CHANNEL_G:
1751 case CHANNEL_TG:
1752 ee_mode = AR5K_EEPROM_MODE_11G;
1753 break;
1754 case CHANNEL_B:
1755 ee_mode = AR5K_EEPROM_MODE_11B;
1756 break;
1757 default:
1758 ATH5K_ERR(ah->ah_sc,
1759 "invalid channel: %d\n", channel->center_freq);
1760 return;
1761 }
1762
1763 switch (ant_mode) {
1764 case AR5K_ANTMODE_DEFAULT:
1765 tx_ant = 0;
1766 use_def_for_tx = false;
1767 update_def_on_tx = false;
1768 use_def_for_rts = false;
1769 use_def_for_sg = false;
1770 fast_div = true;
1771 break;
1772 case AR5K_ANTMODE_FIXED_A:
1773 def_ant = 1;
1774 tx_ant = 0;
1775 use_def_for_tx = true;
1776 update_def_on_tx = false;
1777 use_def_for_rts = true;
1778 use_def_for_sg = true;
1779 fast_div = false;
1780 break;
1781 case AR5K_ANTMODE_FIXED_B:
1782 def_ant = 2;
1783 tx_ant = 0;
1784 use_def_for_tx = true;
1785 update_def_on_tx = false;
1786 use_def_for_rts = true;
1787 use_def_for_sg = true;
1788 fast_div = false;
1789 break;
1790 case AR5K_ANTMODE_SINGLE_AP:
1791 def_ant = 1; /* updated on tx */
1792 tx_ant = 0;
1793 use_def_for_tx = true;
1794 update_def_on_tx = true;
1795 use_def_for_rts = true;
1796 use_def_for_sg = true;
1797 fast_div = true;
1798 break;
1799 case AR5K_ANTMODE_SECTOR_AP:
1800 tx_ant = 1; /* variable */
1801 use_def_for_tx = false;
1802 update_def_on_tx = false;
1803 use_def_for_rts = true;
1804 use_def_for_sg = false;
1805 fast_div = false;
1806 break;
1807 case AR5K_ANTMODE_SECTOR_STA:
1808 tx_ant = 1; /* variable */
1809 use_def_for_tx = true;
1810 update_def_on_tx = false;
1811 use_def_for_rts = true;
1812 use_def_for_sg = false;
1813 fast_div = true;
1814 break;
1815 case AR5K_ANTMODE_DEBUG:
1816 def_ant = 1;
1817 tx_ant = 2;
1818 use_def_for_tx = false;
1819 update_def_on_tx = false;
1820 use_def_for_rts = false;
1821 use_def_for_sg = false;
1822 fast_div = false;
1823 break;
1824 default:
1825 return;
1826 }
1827
1828 ah->ah_tx_ant = tx_ant;
1829 ah->ah_ant_mode = ant_mode;
1830
1831 sta_id1 |= use_def_for_tx ? AR5K_STA_ID1_DEFAULT_ANTENNA : 0;
1832 sta_id1 |= update_def_on_tx ? AR5K_STA_ID1_DESC_ANTENNA : 0;
1833 sta_id1 |= use_def_for_rts ? AR5K_STA_ID1_RTS_DEF_ANTENNA : 0;
1834 sta_id1 |= use_def_for_sg ? AR5K_STA_ID1_SELFGEN_DEF_ANT : 0;
1835
1836 AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, AR5K_STA_ID1_ANTENNA_SETTINGS);
1837
1838 if (sta_id1)
1839 AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, sta_id1);
1840
1841 /* Note: set diversity before default antenna
1842 * because it won't work correctly */
1843 ath5k_hw_set_fast_div(ah, ee_mode, fast_div);
1844 ath5k_hw_set_def_antenna(ah, def_ant);
1845}
1846
1439 1847
1440/****************\ 1848/****************\
1441* TX power setup * 1849* TX power setup *
@@ -1489,6 +1897,9 @@ ath5k_get_linear_pcdac_min(const u8 *stepL, const u8 *stepR,
1489 s16 min_pwrL, min_pwrR; 1897 s16 min_pwrL, min_pwrR;
1490 s16 pwr_i; 1898 s16 pwr_i;
1491 1899
1900 if (WARN_ON(stepL[0] == stepL[1] || stepR[0] == stepR[1]))
1901 return 0;
1902
1492 if (pwrL[0] == pwrL[1]) 1903 if (pwrL[0] == pwrL[1])
1493 min_pwrL = pwrL[0]; 1904 min_pwrL = pwrL[0];
1494 else { 1905 else {
@@ -1750,8 +2161,6 @@ done:
1750 * Get the max edge power for this channel if 2161 * Get the max edge power for this channel if
1751 * we have such data from EEPROM's Conformance Test 2162 * we have such data from EEPROM's Conformance Test
1752 * Limits (CTL), and limit max power if needed. 2163 * Limits (CTL), and limit max power if needed.
1753 *
1754 * FIXME: Only works for world regulatory domains
1755 */ 2164 */
1756static void 2165static void
1757ath5k_get_max_ctl_power(struct ath5k_hw *ah, 2166ath5k_get_max_ctl_power(struct ath5k_hw *ah,
@@ -1767,26 +2176,23 @@ ath5k_get_max_ctl_power(struct ath5k_hw *ah,
1767 u8 ctl_idx = 0xFF; 2176 u8 ctl_idx = 0xFF;
1768 u32 target = channel->center_freq; 2177 u32 target = channel->center_freq;
1769 2178
1770 /* Find out a CTL for our mode that's not mapped 2179 ctl_mode = ath_regd_get_band_ctl(&ah->ah_regulatory, channel->band);
1771 * on a specific reg domain. 2180
1772 *
1773 * TODO: Map our current reg domain to one of the 3 available
1774 * reg domain ids so that we can support more CTLs. */
1775 switch (channel->hw_value & CHANNEL_MODES) { 2181 switch (channel->hw_value & CHANNEL_MODES) {
1776 case CHANNEL_A: 2182 case CHANNEL_A:
1777 ctl_mode = AR5K_CTL_11A | AR5K_CTL_NO_REGDOMAIN; 2183 ctl_mode |= AR5K_CTL_11A;
1778 break; 2184 break;
1779 case CHANNEL_G: 2185 case CHANNEL_G:
1780 ctl_mode = AR5K_CTL_11G | AR5K_CTL_NO_REGDOMAIN; 2186 ctl_mode |= AR5K_CTL_11G;
1781 break; 2187 break;
1782 case CHANNEL_B: 2188 case CHANNEL_B:
1783 ctl_mode = AR5K_CTL_11B | AR5K_CTL_NO_REGDOMAIN; 2189 ctl_mode |= AR5K_CTL_11B;
1784 break; 2190 break;
1785 case CHANNEL_T: 2191 case CHANNEL_T:
1786 ctl_mode = AR5K_CTL_TURBO | AR5K_CTL_NO_REGDOMAIN; 2192 ctl_mode |= AR5K_CTL_TURBO;
1787 break; 2193 break;
1788 case CHANNEL_TG: 2194 case CHANNEL_TG:
1789 ctl_mode = AR5K_CTL_TURBOG | AR5K_CTL_NO_REGDOMAIN; 2195 ctl_mode |= AR5K_CTL_TURBOG;
1790 break; 2196 break;
1791 case CHANNEL_XR: 2197 case CHANNEL_XR:
1792 /* Fall through */ 2198 /* Fall through */
@@ -2482,8 +2888,19 @@ ath5k_setup_rate_powertable(struct ath5k_hw *ah, u16 max_pwr,
2482 for (i = 8; i <= 15; i++) 2888 for (i = 8; i <= 15; i++)
2483 rates[i] -= ah->ah_txpower.txp_cck_ofdm_gainf_delta; 2889 rates[i] -= ah->ah_txpower.txp_cck_ofdm_gainf_delta;
2484 2890
2485 ah->ah_txpower.txp_min_pwr = rates[7]; 2891 /* Now that we have all rates setup use table offset to
2486 ah->ah_txpower.txp_max_pwr = rates[0]; 2892 * match the power range set by user with the power indices
2893 * on PCDAC/PDADC table */
2894 for (i = 0; i < 16; i++) {
2895 rates[i] += ah->ah_txpower.txp_offset;
2896 /* Don't get out of bounds */
2897 if (rates[i] > 63)
2898 rates[i] = 63;
2899 }
2900
2901 /* Min/max in 0.25dB units */
2902 ah->ah_txpower.txp_min_pwr = 2 * rates[7];
2903 ah->ah_txpower.txp_max_pwr = 2 * rates[0];
2487 ah->ah_txpower.txp_ofdm = rates[7]; 2904 ah->ah_txpower.txp_ofdm = rates[7];
2488} 2905}
2489 2906
@@ -2591,16 +3008,37 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel,
2591 return 0; 3008 return 0;
2592} 3009}
2593 3010
2594int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 mode, u8 txpower) 3011int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower)
2595{ 3012{
2596 /*Just a try M.F.*/ 3013 /*Just a try M.F.*/
2597 struct ieee80211_channel *channel = &ah->ah_current_channel; 3014 struct ieee80211_channel *channel = &ah->ah_current_channel;
3015 u8 ee_mode;
2598 3016
2599 ATH5K_TRACE(ah->ah_sc); 3017 ATH5K_TRACE(ah->ah_sc);
3018
3019 switch (channel->hw_value & CHANNEL_MODES) {
3020 case CHANNEL_A:
3021 case CHANNEL_T:
3022 case CHANNEL_XR:
3023 ee_mode = AR5K_EEPROM_MODE_11A;
3024 break;
3025 case CHANNEL_G:
3026 case CHANNEL_TG:
3027 ee_mode = AR5K_EEPROM_MODE_11G;
3028 break;
3029 case CHANNEL_B:
3030 ee_mode = AR5K_EEPROM_MODE_11B;
3031 break;
3032 default:
3033 ATH5K_ERR(ah->ah_sc,
3034 "invalid channel: %d\n", channel->center_freq);
3035 return -EINVAL;
3036 }
3037
2600 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_TXPOWER, 3038 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_TXPOWER,
2601 "changing txpower to %d\n", txpower); 3039 "changing txpower to %d\n", txpower);
2602 3040
2603 return ath5k_hw_txpower(ah, channel, mode, txpower); 3041 return ath5k_hw_txpower(ah, channel, ee_mode, txpower);
2604} 3042}
2605 3043
2606#undef _ATH5K_PHY 3044#undef _ATH5K_PHY
diff --git a/drivers/net/wireless/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c
index 5094c394a4b2..73407b3f53ef 100644
--- a/drivers/net/wireless/ath5k/qcu.c
+++ b/drivers/net/wireless/ath/ath5k/qcu.c
@@ -160,7 +160,8 @@ u32 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue)
160 if (ah->ah_version == AR5K_AR5210) 160 if (ah->ah_version == AR5K_AR5210)
161 return false; 161 return false;
162 162
163 pending = (AR5K_QUEUE_STATUS(queue) & AR5K_QCU_STS_FRMPENDCNT); 163 pending = ath5k_hw_reg_read(ah, AR5K_QUEUE_STATUS(queue));
164 pending &= AR5K_QCU_STS_FRMPENDCNT;
164 165
165 /* It's possible to have no frames pending even if TXE 166 /* It's possible to have no frames pending even if TXE
166 * is set. To indicate that q has not stopped return 167 * is set. To indicate that q has not stopped return
@@ -401,14 +402,16 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
401 AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue), 402 AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue),
402 (AR5K_DCU_MISC_ARBLOCK_CTL_GLOBAL << 403 (AR5K_DCU_MISC_ARBLOCK_CTL_GLOBAL <<
403 AR5K_DCU_MISC_ARBLOCK_CTL_S) | 404 AR5K_DCU_MISC_ARBLOCK_CTL_S) |
405 AR5K_DCU_MISC_ARBLOCK_IGNORE |
404 AR5K_DCU_MISC_POST_FR_BKOFF_DIS | 406 AR5K_DCU_MISC_POST_FR_BKOFF_DIS |
405 AR5K_DCU_MISC_BCN_ENABLE); 407 AR5K_DCU_MISC_BCN_ENABLE);
406 break; 408 break;
407 409
408 case AR5K_TX_QUEUE_CAB: 410 case AR5K_TX_QUEUE_CAB:
409 AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue), 411 AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
410 AR5K_QCU_MISC_FRSHED_DBA_GT | 412 AR5K_QCU_MISC_FRSHED_BCN_SENT_GT |
411 AR5K_QCU_MISC_CBREXP_DIS | 413 AR5K_QCU_MISC_CBREXP_DIS |
414 AR5K_QCU_MISC_RDY_VEOL_POLICY |
412 AR5K_QCU_MISC_CBREXP_BCN_DIS); 415 AR5K_QCU_MISC_CBREXP_BCN_DIS);
413 416
414 ath5k_hw_reg_write(ah, ((AR5K_TUNE_BEACON_INTERVAL - 417 ath5k_hw_reg_write(ah, ((AR5K_TUNE_BEACON_INTERVAL -
diff --git a/drivers/net/wireless/ath5k/reg.h b/drivers/net/wireless/ath/ath5k/reg.h
index 7070d1543cdc..6809b54a2ad7 100644
--- a/drivers/net/wireless/ath5k/reg.h
+++ b/drivers/net/wireless/ath/ath5k/reg.h
@@ -1148,6 +1148,11 @@
1148#define AR5K_STA_ID1_CBCIV_ENDIAN 0x40000000 /* ??? */ 1148#define AR5K_STA_ID1_CBCIV_ENDIAN 0x40000000 /* ??? */
1149#define AR5K_STA_ID1_KEYSRCH_MCAST 0x80000000 /* Do key cache search for mcast frames */ 1149#define AR5K_STA_ID1_KEYSRCH_MCAST 0x80000000 /* Do key cache search for mcast frames */
1150 1150
1151#define AR5K_STA_ID1_ANTENNA_SETTINGS (AR5K_STA_ID1_DEFAULT_ANTENNA | \
1152 AR5K_STA_ID1_DESC_ANTENNA | \
1153 AR5K_STA_ID1_RTS_DEF_ANTENNA | \
1154 AR5K_STA_ID1_SELFGEN_DEF_ANT)
1155
1151/* 1156/*
1152 * First BSSID register (MAC address, lower 32bits) 1157 * First BSSID register (MAC address, lower 32bits)
1153 */ 1158 */
@@ -2028,7 +2033,9 @@
2028#define AR5K_PHY_AGCCTL 0x9860 /* Register address */ 2033#define AR5K_PHY_AGCCTL 0x9860 /* Register address */
2029#define AR5K_PHY_AGCCTL_CAL 0x00000001 /* Enable PHY calibration */ 2034#define AR5K_PHY_AGCCTL_CAL 0x00000001 /* Enable PHY calibration */
2030#define AR5K_PHY_AGCCTL_NF 0x00000002 /* Enable Noise Floor calibration */ 2035#define AR5K_PHY_AGCCTL_NF 0x00000002 /* Enable Noise Floor calibration */
2036#define AR5K_PHY_AGCCTL_OFDM_DIV_DIS 0x00000008 /* Disable antenna diversity on OFDM modes */
2031#define AR5K_PHY_AGCCTL_NF_EN 0x00008000 /* Enable nf calibration to happen (?) */ 2037#define AR5K_PHY_AGCCTL_NF_EN 0x00008000 /* Enable nf calibration to happen (?) */
2038#define AR5K_PHY_AGCTL_FLTR_CAL 0x00010000 /* Allow filter calibration (?) */
2032#define AR5K_PHY_AGCCTL_NF_NOUPDATE 0x00020000 /* Don't update nf automaticaly */ 2039#define AR5K_PHY_AGCCTL_NF_NOUPDATE 0x00020000 /* Don't update nf automaticaly */
2033 2040
2034/* 2041/*
@@ -2528,7 +2535,7 @@
2528 * PHY CCK Cross-correlator Barker RSSI threshold register [5212+] 2535 * PHY CCK Cross-correlator Barker RSSI threshold register [5212+]
2529 */ 2536 */
2530#define AR5K_PHY_CCK_CROSSCORR 0xa208 2537#define AR5K_PHY_CCK_CROSSCORR 0xa208
2531#define AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR 0x0000000f 2538#define AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR 0x0000003f
2532#define AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR_S 0 2539#define AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR_S 0
2533 2540
2534/* Same address is used for antenna diversity activation */ 2541/* Same address is used for antenna diversity activation */
diff --git a/drivers/net/wireless/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c
index 5f72c111c2e8..66067733ddd3 100644
--- a/drivers/net/wireless/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -54,9 +54,8 @@ static inline int ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah,
54 u32 coef_scaled, coef_exp, coef_man, 54 u32 coef_scaled, coef_exp, coef_man,
55 ds_coef_exp, ds_coef_man, clock; 55 ds_coef_exp, ds_coef_man, clock;
56 56
57 if (!(ah->ah_version == AR5K_AR5212) || 57 BUG_ON(!(ah->ah_version == AR5K_AR5212) ||
58 !(channel->hw_value & CHANNEL_OFDM)) 58 !(channel->hw_value & CHANNEL_OFDM));
59 BUG();
60 59
61 /* Get coefficient 60 /* Get coefficient
62 * ALGO: coef = (5 * clock * carrier_freq) / 2) 61 * ALGO: coef = (5 * clock * carrier_freq) / 2)
@@ -508,7 +507,7 @@ static void ath5k_hw_set_sleep_clock(struct ath5k_hw *ah, bool enable)
508 507
509 if (ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4)) 508 if (ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4))
510 scal = AR5K_PHY_SCAL_32MHZ_2417; 509 scal = AR5K_PHY_SCAL_32MHZ_2417;
511 else if (ath5k_eeprom_is_hb63(ah)) 510 else if (ee->ee_is_hb63)
512 scal = AR5K_PHY_SCAL_32MHZ_HB63; 511 scal = AR5K_PHY_SCAL_32MHZ_HB63;
513 else 512 else
514 scal = AR5K_PHY_SCAL_32MHZ; 513 scal = AR5K_PHY_SCAL_32MHZ;
@@ -537,26 +536,6 @@ static void ath5k_hw_set_sleep_clock(struct ath5k_hw *ah, bool enable)
537 return; 536 return;
538} 537}
539 538
540static bool ath5k_hw_chan_has_spur_noise(struct ath5k_hw *ah,
541 struct ieee80211_channel *channel)
542{
543 u8 refclk_freq;
544
545 if ((ah->ah_radio == AR5K_RF5112) ||
546 (ah->ah_radio == AR5K_RF5413) ||
547 (ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4)))
548 refclk_freq = 40;
549 else
550 refclk_freq = 32;
551
552 if ((channel->center_freq % refclk_freq != 0) &&
553 ((channel->center_freq % refclk_freq < 10) ||
554 (channel->center_freq % refclk_freq > 22)))
555 return true;
556 else
557 return false;
558}
559
560/* TODO: Half/Quarter rate */ 539/* TODO: Half/Quarter rate */
561static void ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah, 540static void ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah,
562 struct ieee80211_channel *channel) 541 struct ieee80211_channel *channel)
@@ -599,9 +578,10 @@ static void ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah,
599 /* Set DAC/ADC delays */ 578 /* Set DAC/ADC delays */
600 if (ah->ah_version == AR5K_AR5212) { 579 if (ah->ah_version == AR5K_AR5212) {
601 u32 scal; 580 u32 scal;
581 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
602 if (ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4)) 582 if (ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4))
603 scal = AR5K_PHY_SCAL_32MHZ_2417; 583 scal = AR5K_PHY_SCAL_32MHZ_2417;
604 else if (ath5k_eeprom_is_hb63(ah)) 584 else if (ee->ee_is_hb63)
605 scal = AR5K_PHY_SCAL_32MHZ_HB63; 585 scal = AR5K_PHY_SCAL_32MHZ_HB63;
606 else 586 else
607 scal = AR5K_PHY_SCAL_32MHZ; 587 scal = AR5K_PHY_SCAL_32MHZ;
@@ -698,13 +678,13 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah,
698 /* Set antenna idle switch table */ 678 /* Set antenna idle switch table */
699 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_ANT_CTL, 679 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_ANT_CTL,
700 AR5K_PHY_ANT_CTL_SWTABLE_IDLE, 680 AR5K_PHY_ANT_CTL_SWTABLE_IDLE,
701 (ah->ah_antenna[ee_mode][0] | 681 (ah->ah_ant_ctl[ee_mode][0] |
702 AR5K_PHY_ANT_CTL_TXRX_EN)); 682 AR5K_PHY_ANT_CTL_TXRX_EN));
703 683
704 /* Set antenna switch table */ 684 /* Set antenna switch tables */
705 ath5k_hw_reg_write(ah, ah->ah_antenna[ee_mode][ant[0]], 685 ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant[0]],
706 AR5K_PHY_ANT_SWITCH_TABLE_0); 686 AR5K_PHY_ANT_SWITCH_TABLE_0);
707 ath5k_hw_reg_write(ah, ah->ah_antenna[ee_mode][ant[1]], 687 ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant[1]],
708 AR5K_PHY_ANT_SWITCH_TABLE_1); 688 AR5K_PHY_ANT_SWITCH_TABLE_1);
709 689
710 /* Noise floor threshold */ 690 /* Noise floor threshold */
@@ -998,10 +978,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
998 ath5k_hw_tweak_initval_settings(ah, channel); 978 ath5k_hw_tweak_initval_settings(ah, channel);
999 979
1000 /* 980 /*
1001 * Set TX power (FIXME) 981 * Set TX power
1002 */ 982 */
1003 ret = ath5k_hw_txpower(ah, channel, ee_mode, 983 ret = ath5k_hw_txpower(ah, channel, ee_mode,
1004 AR5K_TUNE_DEFAULT_TXPOWER); 984 ah->ah_txpower.txp_max_pwr / 2);
1005 if (ret) 985 if (ret)
1006 return ret; 986 return ret;
1007 987
@@ -1024,9 +1004,22 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1024 /* Write OFDM timings on 5212*/ 1004 /* Write OFDM timings on 5212*/
1025 if (ah->ah_version == AR5K_AR5212 && 1005 if (ah->ah_version == AR5K_AR5212 &&
1026 channel->hw_value & CHANNEL_OFDM) { 1006 channel->hw_value & CHANNEL_OFDM) {
1007 struct ath5k_eeprom_info *ee =
1008 &ah->ah_capabilities.cap_eeprom;
1009
1027 ret = ath5k_hw_write_ofdm_timings(ah, channel); 1010 ret = ath5k_hw_write_ofdm_timings(ah, channel);
1028 if (ret) 1011 if (ret)
1029 return ret; 1012 return ret;
1013
1014 /* Note: According to docs we can have a newer
1015 * EEPROM on old hardware, so we need to verify
1016 * that our hardware is new enough to have spur
1017 * mitigation registers (delta phase etc) */
1018 if (ah->ah_mac_srev >= AR5K_SREV_AR5424 ||
1019 (ah->ah_mac_srev >= AR5K_SREV_AR5424 &&
1020 ee->ee_version >= AR5K_EEPROM_VERSION_5_3))
1021 ath5k_hw_set_spur_mitigation_filter(ah,
1022 channel);
1030 } 1023 }
1031 1024
1032 /*Enable/disable 802.11b mode on 5111 1025 /*Enable/disable 802.11b mode on 5111
@@ -1042,17 +1035,15 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1042 1035
1043 /* 1036 /*
1044 * In case a fixed antenna was set as default 1037 * In case a fixed antenna was set as default
1045 * write the same settings on both AR5K_PHY_ANT_SWITCH_TABLE 1038 * use the same switch table twice.
1046 * registers.
1047 */ 1039 */
1048 if (s_ant != 0) { 1040 if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_A)
1049 if (s_ant == AR5K_ANT_FIXED_A) /* 1 - Main */ 1041 ant[0] = ant[1] = AR5K_ANT_SWTABLE_A;
1050 ant[0] = ant[1] = AR5K_ANT_FIXED_A; 1042 else if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_B)
1051 else /* 2 - Aux */ 1043 ant[0] = ant[1] = AR5K_ANT_SWTABLE_B;
1052 ant[0] = ant[1] = AR5K_ANT_FIXED_B; 1044 else {
1053 } else { 1045 ant[0] = AR5K_ANT_SWTABLE_A;
1054 ant[0] = AR5K_ANT_FIXED_A; 1046 ant[1] = AR5K_ANT_SWTABLE_B;
1055 ant[1] = AR5K_ANT_FIXED_B;
1056 } 1047 }
1057 1048
1058 /* Commit values from EEPROM */ 1049 /* Commit values from EEPROM */
@@ -1260,6 +1251,8 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1260 */ 1251 */
1261 ath5k_hw_noise_floor_calibration(ah, channel->center_freq); 1252 ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
1262 1253
1254 /* Restore antenna mode */
1255 ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode);
1263 1256
1264 /* 1257 /*
1265 * Configure QCUs/DCUs 1258 * Configure QCUs/DCUs
diff --git a/drivers/net/wireless/ath5k/rfbuffer.h b/drivers/net/wireless/ath/ath5k/rfbuffer.h
index e50baff66175..e50baff66175 100644
--- a/drivers/net/wireless/ath5k/rfbuffer.h
+++ b/drivers/net/wireless/ath/ath5k/rfbuffer.h
diff --git a/drivers/net/wireless/ath5k/rfgain.h b/drivers/net/wireless/ath/ath5k/rfgain.h
index 1354d8c392c8..1354d8c392c8 100644
--- a/drivers/net/wireless/ath5k/rfgain.h
+++ b/drivers/net/wireless/ath/ath5k/rfgain.h
diff --git a/drivers/net/wireless/ath9k/Kconfig b/drivers/net/wireless/ath/ath9k/Kconfig
index 90a8dd873786..0ed1ac312aa6 100644
--- a/drivers/net/wireless/ath9k/Kconfig
+++ b/drivers/net/wireless/ath/ath9k/Kconfig
@@ -2,6 +2,7 @@ config ATH9K
2 tristate "Atheros 802.11n wireless cards support" 2 tristate "Atheros 802.11n wireless cards support"
3 depends on PCI && MAC80211 && WLAN_80211 3 depends on PCI && MAC80211 && WLAN_80211
4 depends on RFKILL || RFKILL=n 4 depends on RFKILL || RFKILL=n
5 select ATH_COMMON
5 select MAC80211_LEDS 6 select MAC80211_LEDS
6 select LEDS_CLASS 7 select LEDS_CLASS
7 select NEW_LEDS 8 select NEW_LEDS
diff --git a/drivers/net/wireless/ath9k/Makefile b/drivers/net/wireless/ath/ath9k/Makefile
index 1a4d4eab6fe8..783bc39eb2ff 100644
--- a/drivers/net/wireless/ath9k/Makefile
+++ b/drivers/net/wireless/ath/ath9k/Makefile
@@ -4,7 +4,6 @@ ath9k-y += hw.o \
4 calib.o \ 4 calib.o \
5 ani.o \ 5 ani.o \
6 phy.o \ 6 phy.o \
7 regd.o \
8 beacon.o \ 7 beacon.o \
9 main.o \ 8 main.o \
10 recv.o \ 9 recv.o \
diff --git a/drivers/net/wireless/ath9k/ahb.c b/drivers/net/wireless/ath/ath9k/ahb.c
index 0e65c51ba176..0e65c51ba176 100644
--- a/drivers/net/wireless/ath9k/ahb.c
+++ b/drivers/net/wireless/ath/ath9k/ahb.c
diff --git a/drivers/net/wireless/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c
index 6c5e887d50d7..1aeafb511ddd 100644
--- a/drivers/net/wireless/ath9k/ani.c
+++ b/drivers/net/wireless/ath/ath9k/ani.c
@@ -569,8 +569,7 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah,
569 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 569 DPRINTF(ah->ah_sc, ATH_DBG_ANI,
570 "phyCnt1 0x%x, resetting " 570 "phyCnt1 0x%x, resetting "
571 "counter value to 0x%x\n", 571 "counter value to 0x%x\n",
572 phyCnt1, 572 phyCnt1, aniState->ofdmPhyErrBase);
573 aniState->ofdmPhyErrBase);
574 REG_WRITE(ah, AR_PHY_ERR_1, 573 REG_WRITE(ah, AR_PHY_ERR_1,
575 aniState->ofdmPhyErrBase); 574 aniState->ofdmPhyErrBase);
576 REG_WRITE(ah, AR_PHY_ERR_MASK_1, 575 REG_WRITE(ah, AR_PHY_ERR_MASK_1,
@@ -580,8 +579,7 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah,
580 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 579 DPRINTF(ah->ah_sc, ATH_DBG_ANI,
581 "phyCnt2 0x%x, resetting " 580 "phyCnt2 0x%x, resetting "
582 "counter value to 0x%x\n", 581 "counter value to 0x%x\n",
583 phyCnt2, 582 phyCnt2, aniState->cckPhyErrBase);
584 aniState->cckPhyErrBase);
585 REG_WRITE(ah, AR_PHY_ERR_2, 583 REG_WRITE(ah, AR_PHY_ERR_2,
586 aniState->cckPhyErrBase); 584 aniState->cckPhyErrBase);
587 REG_WRITE(ah, AR_PHY_ERR_MASK_2, 585 REG_WRITE(ah, AR_PHY_ERR_MASK_2,
@@ -667,7 +665,7 @@ u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah,
667 u32 cc = REG_READ(ah, AR_CCCNT); 665 u32 cc = REG_READ(ah, AR_CCCNT);
668 666
669 if (cycles == 0 || cycles > cc) { 667 if (cycles == 0 || cycles > cc) {
670 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, 668 DPRINTF(ah->ah_sc, ATH_DBG_ANI,
671 "cycle counter wrap. ExtBusy = 0\n"); 669 "cycle counter wrap. ExtBusy = 0\n");
672 good = 0; 670 good = 0;
673 } else { 671 } else {
diff --git a/drivers/net/wireless/ath9k/ani.h b/drivers/net/wireless/ath/ath9k/ani.h
index 08b4e7ed5ff0..08b4e7ed5ff0 100644
--- a/drivers/net/wireless/ath9k/ani.h
+++ b/drivers/net/wireless/ath/ath9k/ani.h
diff --git a/drivers/net/wireless/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 2689a08a2844..796a3adffea0 100644
--- a/drivers/net/wireless/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -53,11 +53,7 @@ struct ath_node;
53 53
54#define A_MAX(a, b) ((a) > (b) ? (a) : (b)) 54#define A_MAX(a, b) ((a) > (b) ? (a) : (b))
55 55
56#define ASSERT(exp) do { \ 56#define ASSERT(exp) BUG_ON(!(exp))
57 if (unlikely(!(exp))) { \
58 BUG(); \
59 } \
60 } while (0)
61 57
62#define TSF_TO_TU(_h,_l) \ 58#define TSF_TO_TU(_h,_l) \
63 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) 59 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
@@ -70,7 +66,6 @@ struct ath_config {
70 u32 ath_aggr_prot; 66 u32 ath_aggr_prot;
71 u16 txpowlimit; 67 u16 txpowlimit;
72 u8 cabqReadytime; 68 u8 cabqReadytime;
73 u8 swBeaconProcess;
74}; 69};
75 70
76/*************************/ 71/*************************/
@@ -78,13 +73,17 @@ struct ath_config {
78/*************************/ 73/*************************/
79 74
80#define ATH_TXBUF_RESET(_bf) do { \ 75#define ATH_TXBUF_RESET(_bf) do { \
81 (_bf)->bf_status = 0; \ 76 (_bf)->bf_stale = false; \
82 (_bf)->bf_lastbf = NULL; \ 77 (_bf)->bf_lastbf = NULL; \
83 (_bf)->bf_next = NULL; \ 78 (_bf)->bf_next = NULL; \
84 memset(&((_bf)->bf_state), 0, \ 79 memset(&((_bf)->bf_state), 0, \
85 sizeof(struct ath_buf_state)); \ 80 sizeof(struct ath_buf_state)); \
86 } while (0) 81 } while (0)
87 82
83#define ATH_RXBUF_RESET(_bf) do { \
84 (_bf)->bf_stale = false; \
85 } while (0)
86
88/** 87/**
89 * enum buffer_type - Buffer type flags 88 * enum buffer_type - Buffer type flags
90 * 89 *
@@ -110,7 +109,7 @@ struct ath_buf_state {
110 int bfs_seqno; 109 int bfs_seqno;
111 int bfs_tidno; 110 int bfs_tidno;
112 int bfs_retries; 111 int bfs_retries;
113 u32 bf_type; 112 u8 bf_type;
114 u32 bfs_keyix; 113 u32 bfs_keyix;
115 enum ath9k_key_type bfs_keytype; 114 enum ath9k_key_type bfs_keytype;
116}; 115};
@@ -134,26 +133,21 @@ struct ath_buf {
134 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or 133 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
135 an aggregate) */ 134 an aggregate) */
136 struct ath_buf *bf_next; /* next subframe in the aggregate */ 135 struct ath_buf *bf_next; /* next subframe in the aggregate */
137 void *bf_mpdu; /* enclosing frame structure */ 136 struct sk_buff *bf_mpdu; /* enclosing frame structure */
138 struct ath_desc *bf_desc; /* virtual addr of desc */ 137 struct ath_desc *bf_desc; /* virtual addr of desc */
139 dma_addr_t bf_daddr; /* physical addr of desc */ 138 dma_addr_t bf_daddr; /* physical addr of desc */
140 dma_addr_t bf_buf_addr; /* physical addr of data buffer */ 139 dma_addr_t bf_buf_addr; /* physical addr of data buffer */
141 u32 bf_status; 140 bool bf_stale;
142 u16 bf_flags; 141 u16 bf_flags;
143 struct ath_buf_state bf_state; 142 struct ath_buf_state bf_state;
144 dma_addr_t bf_dmacontext; 143 dma_addr_t bf_dmacontext;
145}; 144};
146 145
147#define ATH_RXBUF_RESET(_bf) ((_bf)->bf_status = 0)
148#define ATH_BUFSTATUS_STALE 0x00000002
149
150struct ath_descdma { 146struct ath_descdma {
151 const char *dd_name;
152 struct ath_desc *dd_desc; 147 struct ath_desc *dd_desc;
153 dma_addr_t dd_desc_paddr; 148 dma_addr_t dd_desc_paddr;
154 u32 dd_desc_len; 149 u32 dd_desc_len;
155 struct ath_buf *dd_bufptr; 150 struct ath_buf *dd_bufptr;
156 dma_addr_t dd_dmacontext;
157}; 151};
158 152
159int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, 153int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
@@ -299,26 +293,6 @@ struct ath_tx_control {
299#define ATH_TX_XRETRY 0x02 293#define ATH_TX_XRETRY 0x02
300#define ATH_TX_BAR 0x04 294#define ATH_TX_BAR 0x04
301 295
302/* All RSSI values are noise floor adjusted */
303struct ath_tx_stat {
304 int rssi;
305 int rssictl[ATH_MAX_ANTENNA];
306 int rssiextn[ATH_MAX_ANTENNA];
307 int rateieee;
308 int rateKbps;
309 int ratecode;
310 int flags;
311 u32 airtime; /* time on air per final tx rate */
312};
313
314struct aggr_rifs_param {
315 int param_max_frames;
316 int param_max_len;
317 int param_rl;
318 int param_al;
319 struct ath_rc_series *param_rcs;
320};
321
322struct ath_node { 296struct ath_node {
323 struct ath_softc *an_sc; 297 struct ath_softc *an_sc;
324 struct ath_atx_tid tid[WME_NUM_TID]; 298 struct ath_atx_tid tid[WME_NUM_TID];
@@ -366,7 +340,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
366void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); 340void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
367void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); 341void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
368int ath_tx_init(struct ath_softc *sc, int nbufs); 342int ath_tx_init(struct ath_softc *sc, int nbufs);
369int ath_tx_cleanup(struct ath_softc *sc); 343void ath_tx_cleanup(struct ath_softc *sc);
370struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb); 344struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb);
371int ath_txq_update(struct ath_softc *sc, int qnum, 345int ath_txq_update(struct ath_softc *sc, int qnum,
372 struct ath9k_tx_queue_info *q); 346 struct ath9k_tx_queue_info *q);
@@ -529,19 +503,22 @@ struct ath_rfkill {
529#define SC_OP_BEACONS BIT(1) 503#define SC_OP_BEACONS BIT(1)
530#define SC_OP_RXAGGR BIT(2) 504#define SC_OP_RXAGGR BIT(2)
531#define SC_OP_TXAGGR BIT(3) 505#define SC_OP_TXAGGR BIT(3)
532#define SC_OP_CHAINMASK_UPDATE BIT(4) 506#define SC_OP_FULL_RESET BIT(4)
533#define SC_OP_FULL_RESET BIT(5) 507#define SC_OP_PREAMBLE_SHORT BIT(5)
534#define SC_OP_PREAMBLE_SHORT BIT(6) 508#define SC_OP_PROTECT_ENABLE BIT(6)
535#define SC_OP_PROTECT_ENABLE BIT(7) 509#define SC_OP_RXFLUSH BIT(7)
536#define SC_OP_RXFLUSH BIT(8) 510#define SC_OP_LED_ASSOCIATED BIT(8)
537#define SC_OP_LED_ASSOCIATED BIT(9) 511#define SC_OP_RFKILL_REGISTERED BIT(9)
538#define SC_OP_RFKILL_REGISTERED BIT(10) 512#define SC_OP_RFKILL_SW_BLOCKED BIT(10)
539#define SC_OP_RFKILL_SW_BLOCKED BIT(11) 513#define SC_OP_RFKILL_HW_BLOCKED BIT(11)
540#define SC_OP_RFKILL_HW_BLOCKED BIT(12) 514#define SC_OP_WAIT_FOR_BEACON BIT(12)
541#define SC_OP_WAIT_FOR_BEACON BIT(13) 515#define SC_OP_LED_ON BIT(13)
542#define SC_OP_LED_ON BIT(14) 516#define SC_OP_SCANNING BIT(14)
543#define SC_OP_SCANNING BIT(15) 517#define SC_OP_TSF_RESET BIT(15)
544#define SC_OP_TSF_RESET BIT(16) 518#define SC_OP_WAIT_FOR_CAB BIT(16)
519#define SC_OP_WAIT_FOR_PSPOLL_DATA BIT(17)
520#define SC_OP_WAIT_FOR_TX_ACK BIT(18)
521#define SC_OP_BEACON_SYNC BIT(19)
545 522
546struct ath_bus_ops { 523struct ath_bus_ops {
547 void (*read_cachesize)(struct ath_softc *sc, int *csz); 524 void (*read_cachesize)(struct ath_softc *sc, int *csz);
@@ -603,8 +580,8 @@ struct ath_softc {
603 struct ath_tx tx; 580 struct ath_tx tx;
604 struct ath_beacon beacon; 581 struct ath_beacon beacon;
605 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX]; 582 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
606 struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX]; 583 const struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX];
607 struct ath_rate_table *cur_rate_table; 584 const struct ath_rate_table *cur_rate_table;
608 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 585 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
609 586
610 struct ath_led radio_led; 587 struct ath_led radio_led;
@@ -617,6 +594,8 @@ struct ath_softc {
617 int led_on_cnt; 594 int led_on_cnt;
618 int led_off_cnt; 595 int led_off_cnt;
619 596
597 int beacon_interval;
598
620 struct ath_rfkill rf_kill; 599 struct ath_rfkill rf_kill;
621 struct ath_ani ani; 600 struct ath_ani ani;
622 struct ath9k_node_stats nodestats; 601 struct ath9k_node_stats nodestats;
@@ -624,6 +603,7 @@ struct ath_softc {
624 struct ath9k_debug debug; 603 struct ath9k_debug debug;
625#endif 604#endif
626 struct ath_bus_ops *bus_ops; 605 struct ath_bus_ops *bus_ops;
606 struct ath_beacon_config cur_beacon_conf;
627}; 607};
628 608
629struct ath_wiphy { 609struct ath_wiphy {
@@ -701,7 +681,9 @@ static inline void ath9k_ps_restore(struct ath_softc *sc)
701{ 681{
702 if (atomic_dec_and_test(&sc->ps_usecount)) 682 if (atomic_dec_and_test(&sc->ps_usecount))
703 if ((sc->hw->conf.flags & IEEE80211_CONF_PS) && 683 if ((sc->hw->conf.flags & IEEE80211_CONF_PS) &&
704 !(sc->sc_flags & SC_OP_WAIT_FOR_BEACON)) 684 !(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
685 SC_OP_WAIT_FOR_PSPOLL_DATA |
686 SC_OP_WAIT_FOR_TX_ACK)))
705 ath9k_hw_setpower(sc->sc_ah, 687 ath9k_hw_setpower(sc->sc_ah,
706 sc->sc_ah->restore_mode); 688 sc->sc_ah->restore_mode);
707} 689}
@@ -722,36 +704,7 @@ void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
722bool ath9k_wiphy_scanning(struct ath_softc *sc); 704bool ath9k_wiphy_scanning(struct ath_softc *sc);
723void ath9k_wiphy_work(struct work_struct *work); 705void ath9k_wiphy_work(struct work_struct *work);
724 706
725/* 707void ath9k_iowrite32(struct ath_hw *ah, u32 reg_offset, u32 val);
726 * Read and write, they both share the same lock. We do this to serialize 708unsigned int ath9k_ioread32(struct ath_hw *ah, u32 reg_offset);
727 * reads and writes on Atheros 802.11n PCI devices only. This is required
728 * as the FIFO on these devices can only accept sanely 2 requests. After
729 * that the device goes bananas. Serializing the reads/writes prevents this
730 * from happening.
731 */
732
733static inline void ath9k_iowrite32(struct ath_hw *ah, u32 reg_offset, u32 val)
734{
735 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
736 unsigned long flags;
737 spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
738 iowrite32(val, ah->ah_sc->mem + reg_offset);
739 spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
740 } else
741 iowrite32(val, ah->ah_sc->mem + reg_offset);
742}
743
744static inline unsigned int ath9k_ioread32(struct ath_hw *ah, u32 reg_offset)
745{
746 u32 val;
747 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
748 unsigned long flags;
749 spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
750 val = ioread32(ah->ah_sc->mem + reg_offset);
751 spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
752 } else
753 val = ioread32(ah->ah_sc->mem + reg_offset);
754 return val;
755}
756 709
757#endif /* ATH9K_H */ 710#endif /* ATH9K_H */
diff --git a/drivers/net/wireless/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c
index ec995730632d..a21b21339fbc 100644
--- a/drivers/net/wireless/ath9k/beacon.c
+++ b/drivers/net/wireless/ath/ath9k/beacon.c
@@ -43,7 +43,7 @@ static int ath_beaconq_config(struct ath_softc *sc)
43 43
44 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) { 44 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
45 DPRINTF(sc, ATH_DBG_FATAL, 45 DPRINTF(sc, ATH_DBG_FATAL,
46 "unable to update h/w beacon queue parameters\n"); 46 "Unable to update h/w beacon queue parameters\n");
47 return 0; 47 return 0;
48 } else { 48 } else {
49 ath9k_hw_resettxqueue(ah, sc->beacon.beaconq); 49 ath9k_hw_resettxqueue(ah, sc->beacon.beaconq);
@@ -59,11 +59,11 @@ static int ath_beaconq_config(struct ath_softc *sc)
59static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp, 59static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp,
60 struct ath_buf *bf) 60 struct ath_buf *bf)
61{ 61{
62 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; 62 struct sk_buff *skb = bf->bf_mpdu;
63 struct ath_hw *ah = sc->sc_ah; 63 struct ath_hw *ah = sc->sc_ah;
64 struct ath_desc *ds; 64 struct ath_desc *ds;
65 struct ath9k_11n_rate_series series[4]; 65 struct ath9k_11n_rate_series series[4];
66 struct ath_rate_table *rt; 66 const struct ath_rate_table *rt;
67 int flags, antenna, ctsrate = 0, ctsduration = 0; 67 int flags, antenna, ctsrate = 0, ctsduration = 0;
68 u8 rate; 68 u8 rate;
69 69
@@ -132,16 +132,13 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
132 avp = (void *)vif->drv_priv; 132 avp = (void *)vif->drv_priv;
133 cabq = sc->beacon.cabq; 133 cabq = sc->beacon.cabq;
134 134
135 if (avp->av_bcbuf == NULL) { 135 if (avp->av_bcbuf == NULL)
136 DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
137 avp, avp->av_bcbuf);
138 return NULL; 136 return NULL;
139 }
140 137
141 /* Release the old beacon first */ 138 /* Release the old beacon first */
142 139
143 bf = avp->av_bcbuf; 140 bf = avp->av_bcbuf;
144 skb = (struct sk_buff *)bf->bf_mpdu; 141 skb = bf->bf_mpdu;
145 if (skb) { 142 if (skb) {
146 dma_unmap_single(sc->dev, bf->bf_dmacontext, 143 dma_unmap_single(sc->dev, bf->bf_dmacontext,
147 skb->len, DMA_TO_DEVICE); 144 skb->len, DMA_TO_DEVICE);
@@ -229,7 +226,7 @@ static void ath_beacon_start_adhoc(struct ath_softc *sc,
229 return; 226 return;
230 227
231 bf = avp->av_bcbuf; 228 bf = avp->av_bcbuf;
232 skb = (struct sk_buff *) bf->bf_mpdu; 229 skb = bf->bf_mpdu;
233 230
234 ath_beacon_setup(sc, avp, bf); 231 ath_beacon_setup(sc, avp, bf);
235 232
@@ -302,7 +299,7 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
302 /* release the previous beacon frame, if it already exists. */ 299 /* release the previous beacon frame, if it already exists. */
303 bf = avp->av_bcbuf; 300 bf = avp->av_bcbuf;
304 if (bf->bf_mpdu != NULL) { 301 if (bf->bf_mpdu != NULL) {
305 skb = (struct sk_buff *)bf->bf_mpdu; 302 skb = bf->bf_mpdu;
306 dma_unmap_single(sc->dev, bf->bf_dmacontext, 303 dma_unmap_single(sc->dev, bf->bf_dmacontext,
307 skb->len, DMA_TO_DEVICE); 304 skb->len, DMA_TO_DEVICE);
308 dev_kfree_skb_any(skb); 305 dev_kfree_skb_any(skb);
@@ -323,8 +320,7 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
323 u64 tsfadjust; 320 u64 tsfadjust;
324 int intval; 321 int intval;
325 322
326 intval = sc->hw->conf.beacon_int ? 323 intval = sc->beacon_interval ? : ATH_DEFAULT_BINTVAL;
327 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
328 324
329 /* 325 /*
330 * Calculate the TSF offset for this beacon slot, i.e., the 326 * Calculate the TSF offset for this beacon slot, i.e., the
@@ -374,7 +370,7 @@ void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp)
374 370
375 bf = avp->av_bcbuf; 371 bf = avp->av_bcbuf;
376 if (bf->bf_mpdu != NULL) { 372 if (bf->bf_mpdu != NULL) {
377 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; 373 struct sk_buff *skb = bf->bf_mpdu;
378 dma_unmap_single(sc->dev, bf->bf_dmacontext, 374 dma_unmap_single(sc->dev, bf->bf_dmacontext,
379 skb->len, DMA_TO_DEVICE); 375 skb->len, DMA_TO_DEVICE);
380 dev_kfree_skb_any(skb); 376 dev_kfree_skb_any(skb);
@@ -434,8 +430,7 @@ void ath_beacon_tasklet(unsigned long data)
434 * on the tsf to safeguard against missing an swba. 430 * on the tsf to safeguard against missing an swba.
435 */ 431 */
436 432
437 intval = sc->hw->conf.beacon_int ? 433 intval = sc->beacon_interval ? : ATH_DEFAULT_BINTVAL;
438 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
439 434
440 tsf = ath9k_hw_gettsf64(ah); 435 tsf = ath9k_hw_gettsf64(ah);
441 tsftu = TSF_TO_TU(tsf>>32, tsf); 436 tsftu = TSF_TO_TU(tsf>>32, tsf);
@@ -512,8 +507,7 @@ void ath_beacon_tasklet(unsigned long data)
512 * slot. Slots that are not occupied will generate nothing. 507 * slot. Slots that are not occupied will generate nothing.
513 */ 508 */
514static void ath_beacon_config_ap(struct ath_softc *sc, 509static void ath_beacon_config_ap(struct ath_softc *sc,
515 struct ath_beacon_config *conf, 510 struct ath_beacon_config *conf)
516 struct ath_vif *avp)
517{ 511{
518 u32 nexttbtt, intval; 512 u32 nexttbtt, intval;
519 513
@@ -558,14 +552,14 @@ static void ath_beacon_config_ap(struct ath_softc *sc,
558 * we've associated with. 552 * we've associated with.
559 */ 553 */
560static void ath_beacon_config_sta(struct ath_softc *sc, 554static void ath_beacon_config_sta(struct ath_softc *sc,
561 struct ath_beacon_config *conf, 555 struct ath_beacon_config *conf)
562 struct ath_vif *avp)
563{ 556{
564 struct ath9k_beacon_state bs; 557 struct ath9k_beacon_state bs;
565 int dtimperiod, dtimcount, sleepduration; 558 int dtimperiod, dtimcount, sleepduration;
566 int cfpperiod, cfpcount; 559 int cfpperiod, cfpcount;
567 u32 nexttbtt = 0, intval, tsftu; 560 u32 nexttbtt = 0, intval, tsftu;
568 u64 tsf; 561 u64 tsf;
562 int num_beacons, offset, dtim_dec_count, cfp_dec_count;
569 563
570 memset(&bs, 0, sizeof(bs)); 564 memset(&bs, 0, sizeof(bs));
571 intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; 565 intval = conf->beacon_interval & ATH9K_BEACON_PERIOD;
@@ -593,14 +587,27 @@ static void ath_beacon_config_sta(struct ath_softc *sc,
593 */ 587 */
594 tsf = ath9k_hw_gettsf64(sc->sc_ah); 588 tsf = ath9k_hw_gettsf64(sc->sc_ah);
595 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE; 589 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
596 do { 590
591 num_beacons = tsftu / intval + 1;
592 offset = tsftu % intval;
593 nexttbtt = tsftu - offset;
594 if (offset)
597 nexttbtt += intval; 595 nexttbtt += intval;
598 if (--dtimcount < 0) { 596
599 dtimcount = dtimperiod - 1; 597 /* DTIM Beacon every dtimperiod Beacon */
600 if (--cfpcount < 0) 598 dtim_dec_count = num_beacons % dtimperiod;
601 cfpcount = cfpperiod - 1; 599 /* CFP every cfpperiod DTIM Beacon */
602 } 600 cfp_dec_count = (num_beacons / dtimperiod) % cfpperiod;
603 } while (nexttbtt < tsftu); 601 if (dtim_dec_count)
602 cfp_dec_count++;
603
604 dtimcount -= dtim_dec_count;
605 if (dtimcount < 0)
606 dtimcount += dtimperiod;
607
608 cfpcount -= cfp_dec_count;
609 if (cfpcount < 0)
610 cfpcount += cfpperiod;
604 611
605 bs.bs_intval = intval; 612 bs.bs_intval = intval;
606 bs.bs_nexttbtt = nexttbtt; 613 bs.bs_nexttbtt = nexttbtt;
@@ -659,7 +666,6 @@ static void ath_beacon_config_sta(struct ath_softc *sc,
659 666
660static void ath_beacon_config_adhoc(struct ath_softc *sc, 667static void ath_beacon_config_adhoc(struct ath_softc *sc,
661 struct ath_beacon_config *conf, 668 struct ath_beacon_config *conf,
662 struct ath_vif *avp,
663 struct ieee80211_vif *vif) 669 struct ieee80211_vif *vif)
664{ 670{
665 u64 tsf; 671 u64 tsf;
@@ -703,44 +709,50 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,
703 sc->beacon.bmisscnt = 0; 709 sc->beacon.bmisscnt = 0;
704 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); 710 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
705 711
706 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL) 712 /* FIXME: Handle properly when vif is NULL */
713 if (vif && sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)
707 ath_beacon_start_adhoc(sc, vif); 714 ath_beacon_start_adhoc(sc, vif);
708} 715}
709 716
710void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif) 717void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
711{ 718{
712 struct ath_beacon_config conf; 719 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
720 enum nl80211_iftype iftype;
713 721
714 /* Setup the beacon configuration parameters */ 722 /* Setup the beacon configuration parameters */
715 723
716 memset(&conf, 0, sizeof(struct ath_beacon_config));
717 conf.beacon_interval = sc->hw->conf.beacon_int ?
718 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
719 conf.listen_interval = 1;
720 conf.dtim_period = conf.beacon_interval;
721 conf.dtim_count = 1;
722 conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval;
723
724 if (vif) { 724 if (vif) {
725 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv; 725 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
726 726
727 switch(avp->av_opmode) { 727 iftype = vif->type;
728 case NL80211_IFTYPE_AP:
729 ath_beacon_config_ap(sc, &conf, avp);
730 break;
731 case NL80211_IFTYPE_ADHOC:
732 case NL80211_IFTYPE_MESH_POINT:
733 ath_beacon_config_adhoc(sc, &conf, avp, vif);
734 break;
735 case NL80211_IFTYPE_STATION:
736 ath_beacon_config_sta(sc, &conf, avp);
737 break;
738 default:
739 DPRINTF(sc, ATH_DBG_CONFIG,
740 "Unsupported beaconing mode\n");
741 return;
742 }
743 728
744 sc->sc_flags |= SC_OP_BEACONS; 729 cur_conf->beacon_interval = bss_conf->beacon_int;
730 cur_conf->dtim_period = bss_conf->dtim_period;
731 cur_conf->listen_interval = 1;
732 cur_conf->dtim_count = 1;
733 cur_conf->bmiss_timeout =
734 ATH_DEFAULT_BMISS_LIMIT * cur_conf->beacon_interval;
735 } else {
736 iftype = sc->sc_ah->opmode;
745 } 737 }
738
739
740 switch (iftype) {
741 case NL80211_IFTYPE_AP:
742 ath_beacon_config_ap(sc, cur_conf);
743 break;
744 case NL80211_IFTYPE_ADHOC:
745 case NL80211_IFTYPE_MESH_POINT:
746 ath_beacon_config_adhoc(sc, cur_conf, vif);
747 break;
748 case NL80211_IFTYPE_STATION:
749 ath_beacon_config_sta(sc, cur_conf);
750 break;
751 default:
752 DPRINTF(sc, ATH_DBG_CONFIG,
753 "Unsupported beaconing mode\n");
754 return;
755 }
756
757 sc->sc_flags |= SC_OP_BEACONS;
746} 758}
diff --git a/drivers/net/wireless/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index e2d62e97131c..a32d7e7fecbe 100644
--- a/drivers/net/wireless/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -186,7 +186,7 @@ static bool getNoiseFloorThresh(struct ath_hw *ah,
186} 186}
187 187
188static void ath9k_hw_setup_calibration(struct ath_hw *ah, 188static void ath9k_hw_setup_calibration(struct ath_hw *ah,
189 struct hal_cal_list *currCal) 189 struct ath9k_cal_list *currCal)
190{ 190{
191 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0), 191 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
192 AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX, 192 AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX,
@@ -220,7 +220,7 @@ static void ath9k_hw_setup_calibration(struct ath_hw *ah,
220} 220}
221 221
222static void ath9k_hw_reset_calibration(struct ath_hw *ah, 222static void ath9k_hw_reset_calibration(struct ath_hw *ah,
223 struct hal_cal_list *currCal) 223 struct ath9k_cal_list *currCal)
224{ 224{
225 int i; 225 int i;
226 226
@@ -238,13 +238,12 @@ static void ath9k_hw_reset_calibration(struct ath_hw *ah,
238 ah->cal_samples = 0; 238 ah->cal_samples = 0;
239} 239}
240 240
241static void ath9k_hw_per_calibration(struct ath_hw *ah, 241static bool ath9k_hw_per_calibration(struct ath_hw *ah,
242 struct ath9k_channel *ichan, 242 struct ath9k_channel *ichan,
243 u8 rxchainmask, 243 u8 rxchainmask,
244 struct hal_cal_list *currCal, 244 struct ath9k_cal_list *currCal)
245 bool *isCalDone)
246{ 245{
247 *isCalDone = false; 246 bool iscaldone = false;
248 247
249 if (currCal->calState == CAL_RUNNING) { 248 if (currCal->calState == CAL_RUNNING) {
250 if (!(REG_READ(ah, AR_PHY_TIMING_CTRL4(0)) & 249 if (!(REG_READ(ah, AR_PHY_TIMING_CTRL4(0)) &
@@ -263,7 +262,7 @@ static void ath9k_hw_per_calibration(struct ath_hw *ah,
263 currCal->calData->calPostProc(ah, numChains); 262 currCal->calData->calPostProc(ah, numChains);
264 ichan->CalValid |= currCal->calData->calType; 263 ichan->CalValid |= currCal->calData->calType;
265 currCal->calState = CAL_DONE; 264 currCal->calState = CAL_DONE;
266 *isCalDone = true; 265 iscaldone = true;
267 } else { 266 } else {
268 ath9k_hw_setup_calibration(ah, currCal); 267 ath9k_hw_setup_calibration(ah, currCal);
269 } 268 }
@@ -271,11 +270,13 @@ static void ath9k_hw_per_calibration(struct ath_hw *ah,
271 } else if (!(ichan->CalValid & currCal->calData->calType)) { 270 } else if (!(ichan->CalValid & currCal->calData->calType)) {
272 ath9k_hw_reset_calibration(ah, currCal); 271 ath9k_hw_reset_calibration(ah, currCal);
273 } 272 }
273
274 return iscaldone;
274} 275}
275 276
276/* Assumes you are talking about the currently configured channel */ 277/* Assumes you are talking about the currently configured channel */
277static bool ath9k_hw_iscal_supported(struct ath_hw *ah, 278static bool ath9k_hw_iscal_supported(struct ath_hw *ah,
278 enum hal_cal_types calType) 279 enum ath9k_cal_types calType)
279{ 280{
280 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf; 281 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf;
281 282
@@ -284,8 +285,8 @@ static bool ath9k_hw_iscal_supported(struct ath_hw *ah,
284 return true; 285 return true;
285 case ADC_GAIN_CAL: 286 case ADC_GAIN_CAL:
286 case ADC_DC_CAL: 287 case ADC_DC_CAL:
287 if (conf->channel->band == IEEE80211_BAND_5GHZ && 288 if (!(conf->channel->band == IEEE80211_BAND_2GHZ &&
288 conf_is_ht20(conf)) 289 conf_is_ht20(conf)))
289 return true; 290 return true;
290 break; 291 break;
291 } 292 }
@@ -498,7 +499,7 @@ static void ath9k_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains)
498{ 499{
499 u32 iOddMeasOffset, iEvenMeasOffset, val, i; 500 u32 iOddMeasOffset, iEvenMeasOffset, val, i;
500 int32_t qOddMeasOffset, qEvenMeasOffset, qDcMismatch, iDcMismatch; 501 int32_t qOddMeasOffset, qEvenMeasOffset, qDcMismatch, iDcMismatch;
501 const struct hal_percal_data *calData = 502 const struct ath9k_percal_data *calData =
502 ah->cal_list_curr->calData; 503 ah->cal_list_curr->calData;
503 u32 numSamples = 504 u32 numSamples =
504 (1 << (calData->calCountMax + 5)) * calData->calNumSamples; 505 (1 << (calData->calCountMax + 5)) * calData->calNumSamples;
@@ -555,7 +556,7 @@ static void ath9k_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains)
555bool ath9k_hw_reset_calvalid(struct ath_hw *ah) 556bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
556{ 557{
557 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf; 558 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf;
558 struct hal_cal_list *currCal = ah->cal_list_curr; 559 struct ath9k_cal_list *currCal = ah->cal_list_curr;
559 560
560 if (!ah->curchan) 561 if (!ah->curchan)
561 return true; 562 return true;
@@ -841,30 +842,28 @@ static inline void ath9k_hw_9285_pa_cal(struct ath_hw *ah)
841} 842}
842 843
843bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan, 844bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
844 u8 rxchainmask, bool longcal, 845 u8 rxchainmask, bool longcal)
845 bool *isCalDone)
846{ 846{
847 struct hal_cal_list *currCal = ah->cal_list_curr; 847 bool iscaldone = true;
848 848 struct ath9k_cal_list *currCal = ah->cal_list_curr;
849 *isCalDone = true;
850 849
851 if (currCal && 850 if (currCal &&
852 (currCal->calState == CAL_RUNNING || 851 (currCal->calState == CAL_RUNNING ||
853 currCal->calState == CAL_WAITING)) { 852 currCal->calState == CAL_WAITING)) {
854 ath9k_hw_per_calibration(ah, chan, rxchainmask, currCal, 853 iscaldone = ath9k_hw_per_calibration(ah, chan,
855 isCalDone); 854 rxchainmask, currCal);
856 if (*isCalDone) { 855 if (iscaldone) {
857 ah->cal_list_curr = currCal = currCal->calNext; 856 ah->cal_list_curr = currCal = currCal->calNext;
858 857
859 if (currCal->calState == CAL_WAITING) { 858 if (currCal->calState == CAL_WAITING) {
860 *isCalDone = false; 859 iscaldone = false;
861 ath9k_hw_reset_calibration(ah, currCal); 860 ath9k_hw_reset_calibration(ah, currCal);
862 } 861 }
863 } 862 }
864 } 863 }
865 864
866 if (longcal) { 865 if (longcal) {
867 if (AR_SREV_9285(ah) && AR_SREV_9285_11_OR_LATER(ah)) 866 if (AR_SREV_9285_11_OR_LATER(ah))
868 ath9k_hw_9285_pa_cal(ah); 867 ath9k_hw_9285_pa_cal(ah);
869 868
870 if (OLC_FOR_AR9280_20_LATER) 869 if (OLC_FOR_AR9280_20_LATER)
@@ -872,18 +871,15 @@ bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
872 ath9k_hw_getnf(ah, chan); 871 ath9k_hw_getnf(ah, chan);
873 ath9k_hw_loadnf(ah, ah->curchan); 872 ath9k_hw_loadnf(ah, ah->curchan);
874 ath9k_hw_start_nfcal(ah); 873 ath9k_hw_start_nfcal(ah);
875
876 if (chan->channelFlags & CHANNEL_CW_INT)
877 chan->channelFlags &= ~CHANNEL_CW_INT;
878 } 874 }
879 875
880 return true; 876 return iscaldone;
881} 877}
882 878
883static bool ar9285_clc(struct ath_hw *ah, struct ath9k_channel *chan) 879static bool ar9285_clc(struct ath_hw *ah, struct ath9k_channel *chan)
884{ 880{
885 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); 881 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
886 if (chan->channelFlags & CHANNEL_HT20) { 882 if (IS_CHAN_HT20(chan)) {
887 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE); 883 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE);
888 REG_SET_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN); 884 REG_SET_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN);
889 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, 885 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
@@ -919,83 +915,66 @@ static bool ar9285_clc(struct ath_hw *ah, struct ath9k_channel *chan)
919 return true; 915 return true;
920} 916}
921 917
922bool ath9k_hw_init_cal(struct ath_hw *ah, 918bool ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
923 struct ath9k_channel *chan)
924{ 919{
925 if (AR_SREV_9285(ah) && AR_SREV_9285_12_OR_LATER(ah)) { 920 if (AR_SREV_9285_12_OR_LATER(ah)) {
926 if (!ar9285_clc(ah, chan)) 921 if (!ar9285_clc(ah, chan))
927 return false; 922 return false;
928 } else if (AR_SREV_9280_10_OR_LATER(ah)) { 923 } else {
929 REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC); 924 if (AR_SREV_9280_10_OR_LATER(ah)) {
930 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); 925 REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
931 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); 926 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL);
927 }
932 928
933 /* Kick off the cal */ 929 /* Calibrate the AGC */
934 REG_WRITE(ah, AR_PHY_AGC_CONTROL, 930 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
935 REG_READ(ah, AR_PHY_AGC_CONTROL) | 931 REG_READ(ah, AR_PHY_AGC_CONTROL) |
936 AR_PHY_AGC_CONTROL_CAL); 932 AR_PHY_AGC_CONTROL_CAL);
937 933
938 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, 934 /* Poll for offset calibration complete */
939 AR_PHY_AGC_CONTROL_CAL, 0, 935 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
940 AH_WAIT_TIMEOUT)) { 936 0, AH_WAIT_TIMEOUT)) {
941 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 937 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
942 "offset calibration failed to complete in 1ms; " 938 "offset calibration failed to complete in 1ms; "
943 "noisy environment?\n"); 939 "noisy environment?\n");
944 return false; 940 return false;
945 } 941 }
946 942
947 REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC); 943 if (AR_SREV_9280_10_OR_LATER(ah)) {
948 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); 944 REG_SET_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
949 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); 945 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL);
950 } 946 }
951
952 /* Calibrate the AGC */
953 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
954 REG_READ(ah, AR_PHY_AGC_CONTROL) |
955 AR_PHY_AGC_CONTROL_CAL);
956
957 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
958 0, AH_WAIT_TIMEOUT)) {
959 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
960 "offset calibration failed to complete in 1ms; "
961 "noisy environment?\n");
962 return false;
963 }
964
965 if (AR_SREV_9280_10_OR_LATER(ah)) {
966 REG_SET_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
967 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL);
968 } 947 }
969 948
970 /* Do PA Calibration */ 949 /* Do PA Calibration */
971 if (AR_SREV_9285(ah) && AR_SREV_9285_11_OR_LATER(ah)) 950 if (AR_SREV_9285_11_OR_LATER(ah))
972 ath9k_hw_9285_pa_cal(ah); 951 ath9k_hw_9285_pa_cal(ah);
973 952
974 /* Do NF Calibration */ 953 /* Do NF Calibration after DC offset and other calibrations */
975 REG_WRITE(ah, AR_PHY_AGC_CONTROL, 954 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
976 REG_READ(ah, AR_PHY_AGC_CONTROL) | 955 REG_READ(ah, AR_PHY_AGC_CONTROL) | AR_PHY_AGC_CONTROL_NF);
977 AR_PHY_AGC_CONTROL_NF);
978 956
979 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL; 957 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
980 958
959 /* Enable IQ, ADC Gain and ADC DC offset CALs */
981 if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah)) { 960 if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah)) {
982 if (ath9k_hw_iscal_supported(ah, ADC_GAIN_CAL)) { 961 if (ath9k_hw_iscal_supported(ah, ADC_GAIN_CAL)) {
983 INIT_CAL(&ah->adcgain_caldata); 962 INIT_CAL(&ah->adcgain_caldata);
984 INSERT_CAL(ah, &ah->adcgain_caldata); 963 INSERT_CAL(ah, &ah->adcgain_caldata);
985 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 964 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
986 "enabling ADC Gain Calibration.\n"); 965 "enabling ADC Gain Calibration.\n");
987 } 966 }
988 if (ath9k_hw_iscal_supported(ah, ADC_DC_CAL)) { 967 if (ath9k_hw_iscal_supported(ah, ADC_DC_CAL)) {
989 INIT_CAL(&ah->adcdc_caldata); 968 INIT_CAL(&ah->adcdc_caldata);
990 INSERT_CAL(ah, &ah->adcdc_caldata); 969 INSERT_CAL(ah, &ah->adcdc_caldata);
991 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 970 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
992 "enabling ADC DC Calibration.\n"); 971 "enabling ADC DC Calibration.\n");
993 } 972 }
994 if (ath9k_hw_iscal_supported(ah, IQ_MISMATCH_CAL)) { 973 if (ath9k_hw_iscal_supported(ah, IQ_MISMATCH_CAL)) {
995 INIT_CAL(&ah->iq_caldata); 974 INIT_CAL(&ah->iq_caldata);
996 INSERT_CAL(ah, &ah->iq_caldata); 975 INSERT_CAL(ah, &ah->iq_caldata);
997 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 976 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
998 "enabling IQ Calibration.\n"); 977 "enabling IQ Calibration.\n");
999 } 978 }
1000 979
1001 ah->cal_list_curr = ah->cal_list; 980 ah->cal_list_curr = ah->cal_list;
@@ -1009,49 +988,49 @@ bool ath9k_hw_init_cal(struct ath_hw *ah,
1009 return true; 988 return true;
1010} 989}
1011 990
1012const struct hal_percal_data iq_cal_multi_sample = { 991const struct ath9k_percal_data iq_cal_multi_sample = {
1013 IQ_MISMATCH_CAL, 992 IQ_MISMATCH_CAL,
1014 MAX_CAL_SAMPLES, 993 MAX_CAL_SAMPLES,
1015 PER_MIN_LOG_COUNT, 994 PER_MIN_LOG_COUNT,
1016 ath9k_hw_iqcal_collect, 995 ath9k_hw_iqcal_collect,
1017 ath9k_hw_iqcalibrate 996 ath9k_hw_iqcalibrate
1018}; 997};
1019const struct hal_percal_data iq_cal_single_sample = { 998const struct ath9k_percal_data iq_cal_single_sample = {
1020 IQ_MISMATCH_CAL, 999 IQ_MISMATCH_CAL,
1021 MIN_CAL_SAMPLES, 1000 MIN_CAL_SAMPLES,
1022 PER_MAX_LOG_COUNT, 1001 PER_MAX_LOG_COUNT,
1023 ath9k_hw_iqcal_collect, 1002 ath9k_hw_iqcal_collect,
1024 ath9k_hw_iqcalibrate 1003 ath9k_hw_iqcalibrate
1025}; 1004};
1026const struct hal_percal_data adc_gain_cal_multi_sample = { 1005const struct ath9k_percal_data adc_gain_cal_multi_sample = {
1027 ADC_GAIN_CAL, 1006 ADC_GAIN_CAL,
1028 MAX_CAL_SAMPLES, 1007 MAX_CAL_SAMPLES,
1029 PER_MIN_LOG_COUNT, 1008 PER_MIN_LOG_COUNT,
1030 ath9k_hw_adc_gaincal_collect, 1009 ath9k_hw_adc_gaincal_collect,
1031 ath9k_hw_adc_gaincal_calibrate 1010 ath9k_hw_adc_gaincal_calibrate
1032}; 1011};
1033const struct hal_percal_data adc_gain_cal_single_sample = { 1012const struct ath9k_percal_data adc_gain_cal_single_sample = {
1034 ADC_GAIN_CAL, 1013 ADC_GAIN_CAL,
1035 MIN_CAL_SAMPLES, 1014 MIN_CAL_SAMPLES,
1036 PER_MAX_LOG_COUNT, 1015 PER_MAX_LOG_COUNT,
1037 ath9k_hw_adc_gaincal_collect, 1016 ath9k_hw_adc_gaincal_collect,
1038 ath9k_hw_adc_gaincal_calibrate 1017 ath9k_hw_adc_gaincal_calibrate
1039}; 1018};
1040const struct hal_percal_data adc_dc_cal_multi_sample = { 1019const struct ath9k_percal_data adc_dc_cal_multi_sample = {
1041 ADC_DC_CAL, 1020 ADC_DC_CAL,
1042 MAX_CAL_SAMPLES, 1021 MAX_CAL_SAMPLES,
1043 PER_MIN_LOG_COUNT, 1022 PER_MIN_LOG_COUNT,
1044 ath9k_hw_adc_dccal_collect, 1023 ath9k_hw_adc_dccal_collect,
1045 ath9k_hw_adc_dccal_calibrate 1024 ath9k_hw_adc_dccal_calibrate
1046}; 1025};
1047const struct hal_percal_data adc_dc_cal_single_sample = { 1026const struct ath9k_percal_data adc_dc_cal_single_sample = {
1048 ADC_DC_CAL, 1027 ADC_DC_CAL,
1049 MIN_CAL_SAMPLES, 1028 MIN_CAL_SAMPLES,
1050 PER_MAX_LOG_COUNT, 1029 PER_MAX_LOG_COUNT,
1051 ath9k_hw_adc_dccal_collect, 1030 ath9k_hw_adc_dccal_collect,
1052 ath9k_hw_adc_dccal_calibrate 1031 ath9k_hw_adc_dccal_calibrate
1053}; 1032};
1054const struct hal_percal_data adc_init_dc_cal = { 1033const struct ath9k_percal_data adc_init_dc_cal = {
1055 ADC_DC_INIT_CAL, 1034 ADC_DC_INIT_CAL,
1056 MIN_CAL_SAMPLES, 1035 MIN_CAL_SAMPLES,
1057 INIT_LOG_COUNT, 1036 INIT_LOG_COUNT,
diff --git a/drivers/net/wireless/ath9k/calib.h b/drivers/net/wireless/ath/ath9k/calib.h
index 1c74bd50700d..fe5367f14148 100644
--- a/drivers/net/wireless/ath9k/calib.h
+++ b/drivers/net/wireless/ath/ath9k/calib.h
@@ -17,13 +17,13 @@
17#ifndef CALIB_H 17#ifndef CALIB_H
18#define CALIB_H 18#define CALIB_H
19 19
20extern const struct hal_percal_data iq_cal_multi_sample; 20extern const struct ath9k_percal_data iq_cal_multi_sample;
21extern const struct hal_percal_data iq_cal_single_sample; 21extern const struct ath9k_percal_data iq_cal_single_sample;
22extern const struct hal_percal_data adc_gain_cal_multi_sample; 22extern const struct ath9k_percal_data adc_gain_cal_multi_sample;
23extern const struct hal_percal_data adc_gain_cal_single_sample; 23extern const struct ath9k_percal_data adc_gain_cal_single_sample;
24extern const struct hal_percal_data adc_dc_cal_multi_sample; 24extern const struct ath9k_percal_data adc_dc_cal_multi_sample;
25extern const struct hal_percal_data adc_dc_cal_single_sample; 25extern const struct ath9k_percal_data adc_dc_cal_single_sample;
26extern const struct hal_percal_data adc_init_dc_cal; 26extern const struct ath9k_percal_data adc_init_dc_cal;
27 27
28#define AR_PHY_CCA_MAX_GOOD_VALUE -85 28#define AR_PHY_CCA_MAX_GOOD_VALUE -85
29#define AR_PHY_CCA_MAX_HIGH_VALUE -62 29#define AR_PHY_CCA_MAX_HIGH_VALUE -62
@@ -67,14 +67,14 @@ struct ar5416IniArray {
67 } \ 67 } \
68 } while (0) 68 } while (0)
69 69
70enum hal_cal_types { 70enum ath9k_cal_types {
71 ADC_DC_INIT_CAL = 0x1, 71 ADC_DC_INIT_CAL = 0x1,
72 ADC_GAIN_CAL = 0x2, 72 ADC_GAIN_CAL = 0x2,
73 ADC_DC_CAL = 0x4, 73 ADC_DC_CAL = 0x4,
74 IQ_MISMATCH_CAL = 0x8 74 IQ_MISMATCH_CAL = 0x8
75}; 75};
76 76
77enum hal_cal_state { 77enum ath9k_cal_state {
78 CAL_INACTIVE, 78 CAL_INACTIVE,
79 CAL_WAITING, 79 CAL_WAITING,
80 CAL_RUNNING, 80 CAL_RUNNING,
@@ -87,18 +87,18 @@ enum hal_cal_state {
87#define PER_MIN_LOG_COUNT 2 87#define PER_MIN_LOG_COUNT 2
88#define PER_MAX_LOG_COUNT 10 88#define PER_MAX_LOG_COUNT 10
89 89
90struct hal_percal_data { 90struct ath9k_percal_data {
91 enum hal_cal_types calType; 91 enum ath9k_cal_types calType;
92 u32 calNumSamples; 92 u32 calNumSamples;
93 u32 calCountMax; 93 u32 calCountMax;
94 void (*calCollect) (struct ath_hw *); 94 void (*calCollect) (struct ath_hw *);
95 void (*calPostProc) (struct ath_hw *, u8); 95 void (*calPostProc) (struct ath_hw *, u8);
96}; 96};
97 97
98struct hal_cal_list { 98struct ath9k_cal_list {
99 const struct hal_percal_data *calData; 99 const struct ath9k_percal_data *calData;
100 enum hal_cal_state calState; 100 enum ath9k_cal_state calState;
101 struct hal_cal_list *calNext; 101 struct ath9k_cal_list *calNext;
102}; 102};
103 103
104struct ath9k_nfcal_hist { 104struct ath9k_nfcal_hist {
@@ -116,8 +116,7 @@ int16_t ath9k_hw_getnf(struct ath_hw *ah,
116void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah); 116void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah);
117s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan); 117s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan);
118bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan, 118bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
119 u8 rxchainmask, bool longcal, 119 u8 rxchainmask, bool longcal);
120 bool *isCalDone);
121bool ath9k_hw_init_cal(struct ath_hw *ah, 120bool ath9k_hw_init_cal(struct ath_hw *ah,
122 struct ath9k_channel *chan); 121 struct ath9k_channel *chan);
123 122
diff --git a/drivers/net/wireless/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c
index fdf9528fa49b..97df20cbf528 100644
--- a/drivers/net/wireless/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -498,6 +498,9 @@ int ath9k_init_debug(struct ath_softc *sc)
498{ 498{
499 sc->debug.debug_mask = ath9k_debug; 499 sc->debug.debug_mask = ath9k_debug;
500 500
501 if (!ath9k_debugfs_root)
502 return -ENOENT;
503
501 sc->debug.debugfs_phy = debugfs_create_dir(wiphy_name(sc->hw->wiphy), 504 sc->debug.debugfs_phy = debugfs_create_dir(wiphy_name(sc->hw->wiphy),
502 ath9k_debugfs_root); 505 ath9k_debugfs_root);
503 if (!sc->debug.debugfs_phy) 506 if (!sc->debug.debugfs_phy)
diff --git a/drivers/net/wireless/ath9k/debug.h b/drivers/net/wireless/ath/ath9k/debug.h
index 7b0e5419d2bc..db845cf960c9 100644
--- a/drivers/net/wireless/ath9k/debug.h
+++ b/drivers/net/wireless/ath/ath9k/debug.h
@@ -19,20 +19,17 @@
19 19
20enum ATH_DEBUG { 20enum ATH_DEBUG {
21 ATH_DBG_RESET = 0x00000001, 21 ATH_DBG_RESET = 0x00000001,
22 ATH_DBG_REG_IO = 0x00000002, 22 ATH_DBG_QUEUE = 0x00000002,
23 ATH_DBG_QUEUE = 0x00000004, 23 ATH_DBG_EEPROM = 0x00000004,
24 ATH_DBG_EEPROM = 0x00000008, 24 ATH_DBG_CALIBRATE = 0x00000008,
25 ATH_DBG_CALIBRATE = 0x00000010, 25 ATH_DBG_INTERRUPT = 0x00000010,
26 ATH_DBG_CHANNEL = 0x00000020, 26 ATH_DBG_REGULATORY = 0x00000020,
27 ATH_DBG_INTERRUPT = 0x00000040, 27 ATH_DBG_ANI = 0x00000040,
28 ATH_DBG_REGULATORY = 0x00000080, 28 ATH_DBG_XMIT = 0x00000080,
29 ATH_DBG_ANI = 0x00000100, 29 ATH_DBG_BEACON = 0x00000100,
30 ATH_DBG_POWER_MGMT = 0x00000200, 30 ATH_DBG_CONFIG = 0x00000200,
31 ATH_DBG_XMIT = 0x00000400, 31 ATH_DBG_FATAL = 0x00000400,
32 ATH_DBG_BEACON = 0x00001000, 32 ATH_DBG_PS = 0x00000800,
33 ATH_DBG_CONFIG = 0x00002000,
34 ATH_DBG_KEYCACHE = 0x00004000,
35 ATH_DBG_FATAL = 0x00008000,
36 ATH_DBG_ANY = 0xffffffff 33 ATH_DBG_ANY = 0xffffffff
37}; 34};
38 35
diff --git a/drivers/net/wireless/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c
index ffc36b0361c7..a2fda702b620 100644
--- a/drivers/net/wireless/ath9k/eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
@@ -694,7 +694,7 @@ static void ath9k_hw_get_4k_gain_boundaries_pdadcs(struct ath_hw *ah,
694#undef TMP_VAL_VPD_TABLE 694#undef TMP_VAL_VPD_TABLE
695} 695}
696 696
697static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah, 697static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
698 struct ath9k_channel *chan, 698 struct ath9k_channel *chan,
699 int16_t *pTxPowerIndexOffset) 699 int16_t *pTxPowerIndexOffset)
700{ 700{
@@ -783,11 +783,11 @@ static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
783 ((pdadcValues[4 * j + 3] & 0xFF) << 24); 783 ((pdadcValues[4 * j + 3] & 0xFF) << 24);
784 REG_WRITE(ah, regOffset, reg32); 784 REG_WRITE(ah, regOffset, reg32);
785 785
786 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, 786 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
787 "PDADC (%d,%4x): %4.4x %8.8x\n", 787 "PDADC (%d,%4x): %4.4x %8.8x\n",
788 i, regChainOffset, regOffset, 788 i, regChainOffset, regOffset,
789 reg32); 789 reg32);
790 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, 790 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
791 "PDADC: Chain %d | " 791 "PDADC: Chain %d | "
792 "PDADC %3d Value %3d | " 792 "PDADC %3d Value %3d | "
793 "PDADC %3d Value %3d | " 793 "PDADC %3d Value %3d | "
@@ -805,11 +805,9 @@ static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
805 } 805 }
806 806
807 *pTxPowerIndexOffset = 0; 807 *pTxPowerIndexOffset = 0;
808
809 return true;
810} 808}
811 809
812static bool ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah, 810static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
813 struct ath9k_channel *chan, 811 struct ath9k_channel *chan,
814 int16_t *ratesArray, 812 int16_t *ratesArray,
815 u16 cfgCtl, 813 u16 cfgCtl,
@@ -910,7 +908,7 @@ static bool ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
910 ah->eep_ops->get_eeprom_rev(ah) <= 2) 908 ah->eep_ops->get_eeprom_rev(ah) <= 2)
911 twiceMaxEdgePower = AR5416_MAX_RATE_POWER; 909 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
912 910
913 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 911 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
914 "LOOP-Mode ctlMode %d < %d, isHt40CtlMode %d, " 912 "LOOP-Mode ctlMode %d < %d, isHt40CtlMode %d, "
915 "EXT_ADDITIVE %d\n", 913 "EXT_ADDITIVE %d\n",
916 ctlMode, numCtlModes, isHt40CtlMode, 914 ctlMode, numCtlModes, isHt40CtlMode,
@@ -918,7 +916,7 @@ static bool ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
918 916
919 for (i = 0; (i < AR5416_NUM_CTLS) && 917 for (i = 0; (i < AR5416_NUM_CTLS) &&
920 pEepData->ctlIndex[i]; i++) { 918 pEepData->ctlIndex[i]; i++) {
921 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 919 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
922 " LOOP-Ctlidx %d: cfgCtl 0x%2.2x " 920 " LOOP-Ctlidx %d: cfgCtl 0x%2.2x "
923 "pCtlMode 0x%2.2x ctlIndex 0x%2.2x " 921 "pCtlMode 0x%2.2x ctlIndex 0x%2.2x "
924 "chan %d\n", 922 "chan %d\n",
@@ -941,7 +939,7 @@ static bool ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
941 IS_CHAN_2GHZ(chan), 939 IS_CHAN_2GHZ(chan),
942 AR5416_EEP4K_NUM_BAND_EDGES); 940 AR5416_EEP4K_NUM_BAND_EDGES);
943 941
944 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 942 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
945 " MATCH-EE_IDX %d: ch %d is2 %d " 943 " MATCH-EE_IDX %d: ch %d is2 %d "
946 "2xMinEdge %d chainmask %d chains %d\n", 944 "2xMinEdge %d chainmask %d chains %d\n",
947 i, freq, IS_CHAN_2GHZ(chan), 945 i, freq, IS_CHAN_2GHZ(chan),
@@ -961,7 +959,7 @@ static bool ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
961 959
962 minCtlPower = (u8)min(twiceMaxEdgePower, scaledPower); 960 minCtlPower = (u8)min(twiceMaxEdgePower, scaledPower);
963 961
964 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 962 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
965 " SEL-Min ctlMode %d pCtlMode %d " 963 " SEL-Min ctlMode %d pCtlMode %d "
966 "2xMaxEdge %d sP %d minCtlPwr %d\n", 964 "2xMaxEdge %d sP %d minCtlPwr %d\n",
967 ctlMode, pCtlMode[ctlMode], twiceMaxEdgePower, 965 ctlMode, pCtlMode[ctlMode], twiceMaxEdgePower,
@@ -1041,10 +1039,9 @@ static bool ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
1041 ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0]; 1039 ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0];
1042 ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0]; 1040 ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0];
1043 } 1041 }
1044 return true;
1045} 1042}
1046 1043
1047static int ath9k_hw_4k_set_txpower(struct ath_hw *ah, 1044static void ath9k_hw_4k_set_txpower(struct ath_hw *ah,
1048 struct ath9k_channel *chan, 1045 struct ath9k_channel *chan,
1049 u16 cfgCtl, 1046 u16 cfgCtl,
1050 u8 twiceAntennaReduction, 1047 u8 twiceAntennaReduction,
@@ -1065,22 +1062,13 @@ static int ath9k_hw_4k_set_txpower(struct ath_hw *ah,
1065 ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; 1062 ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
1066 } 1063 }
1067 1064
1068 if (!ath9k_hw_set_4k_power_per_rate_table(ah, chan, 1065 ath9k_hw_set_4k_power_per_rate_table(ah, chan,
1069 &ratesArray[0], cfgCtl, 1066 &ratesArray[0], cfgCtl,
1070 twiceAntennaReduction, 1067 twiceAntennaReduction,
1071 twiceMaxRegulatoryPower, 1068 twiceMaxRegulatoryPower,
1072 powerLimit)) { 1069 powerLimit);
1073 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
1074 "ath9k_hw_set_txpower: unable to set "
1075 "tx power per rate table\n");
1076 return -EIO;
1077 }
1078 1070
1079 if (!ath9k_hw_set_4k_power_cal_table(ah, chan, &txPowerIndexOffset)) { 1071 ath9k_hw_set_4k_power_cal_table(ah, chan, &txPowerIndexOffset);
1080 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
1081 "ath9k_hw_set_txpower: unable to set power table\n");
1082 return -EIO;
1083 }
1084 1072
1085 for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { 1073 for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
1086 ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); 1074 ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
@@ -1168,7 +1156,6 @@ static int ath9k_hw_4k_set_txpower(struct ath_hw *ah,
1168 else 1156 else
1169 ah->regulatory.max_power_level = ratesArray[i]; 1157 ah->regulatory.max_power_level = ratesArray[i];
1170 1158
1171 return 0;
1172} 1159}
1173 1160
1174static void ath9k_hw_4k_set_addac(struct ath_hw *ah, 1161static void ath9k_hw_4k_set_addac(struct ath_hw *ah,
@@ -2103,7 +2090,7 @@ static void ath9k_hw_get_def_gain_boundaries_pdadcs(struct ath_hw *ah,
2103 return; 2090 return;
2104} 2091}
2105 2092
2106static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, 2093static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
2107 struct ath9k_channel *chan, 2094 struct ath9k_channel *chan,
2108 int16_t *pTxPowerIndexOffset) 2095 int16_t *pTxPowerIndexOffset)
2109{ 2096{
@@ -2234,11 +2221,11 @@ static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
2234 ((pdadcValues[4 * j + 3] & 0xFF) << 24); 2221 ((pdadcValues[4 * j + 3] & 0xFF) << 24);
2235 REG_WRITE(ah, regOffset, reg32); 2222 REG_WRITE(ah, regOffset, reg32);
2236 2223
2237 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, 2224 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
2238 "PDADC (%d,%4x): %4.4x %8.8x\n", 2225 "PDADC (%d,%4x): %4.4x %8.8x\n",
2239 i, regChainOffset, regOffset, 2226 i, regChainOffset, regOffset,
2240 reg32); 2227 reg32);
2241 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, 2228 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
2242 "PDADC: Chain %d | PDADC %3d " 2229 "PDADC: Chain %d | PDADC %3d "
2243 "Value %3d | PDADC %3d Value %3d | " 2230 "Value %3d | PDADC %3d Value %3d | "
2244 "PDADC %3d Value %3d | PDADC %3d " 2231 "PDADC %3d Value %3d | PDADC %3d "
@@ -2255,13 +2242,11 @@ static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
2255 } 2242 }
2256 2243
2257 *pTxPowerIndexOffset = 0; 2244 *pTxPowerIndexOffset = 0;
2258
2259 return true;
2260#undef SM_PD_GAIN 2245#undef SM_PD_GAIN
2261#undef SM_PDGAIN_B 2246#undef SM_PDGAIN_B
2262} 2247}
2263 2248
2264static bool ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah, 2249static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
2265 struct ath9k_channel *chan, 2250 struct ath9k_channel *chan,
2266 int16_t *ratesArray, 2251 int16_t *ratesArray,
2267 u16 cfgCtl, 2252 u16 cfgCtl,
@@ -2415,14 +2400,14 @@ static bool ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
2415 ah->eep_ops->get_eeprom_rev(ah) <= 2) 2400 ah->eep_ops->get_eeprom_rev(ah) <= 2)
2416 twiceMaxEdgePower = AR5416_MAX_RATE_POWER; 2401 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
2417 2402
2418 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 2403 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
2419 "LOOP-Mode ctlMode %d < %d, isHt40CtlMode %d, " 2404 "LOOP-Mode ctlMode %d < %d, isHt40CtlMode %d, "
2420 "EXT_ADDITIVE %d\n", 2405 "EXT_ADDITIVE %d\n",
2421 ctlMode, numCtlModes, isHt40CtlMode, 2406 ctlMode, numCtlModes, isHt40CtlMode,
2422 (pCtlMode[ctlMode] & EXT_ADDITIVE)); 2407 (pCtlMode[ctlMode] & EXT_ADDITIVE));
2423 2408
2424 for (i = 0; (i < AR5416_NUM_CTLS) && pEepData->ctlIndex[i]; i++) { 2409 for (i = 0; (i < AR5416_NUM_CTLS) && pEepData->ctlIndex[i]; i++) {
2425 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 2410 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
2426 " LOOP-Ctlidx %d: cfgCtl 0x%2.2x " 2411 " LOOP-Ctlidx %d: cfgCtl 0x%2.2x "
2427 "pCtlMode 0x%2.2x ctlIndex 0x%2.2x " 2412 "pCtlMode 0x%2.2x ctlIndex 0x%2.2x "
2428 "chan %d\n", 2413 "chan %d\n",
@@ -2441,7 +2426,7 @@ static bool ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
2441 rep->ctlEdges[ar5416_get_ntxchains(tx_chainmask) - 1], 2426 rep->ctlEdges[ar5416_get_ntxchains(tx_chainmask) - 1],
2442 IS_CHAN_2GHZ(chan), AR5416_NUM_BAND_EDGES); 2427 IS_CHAN_2GHZ(chan), AR5416_NUM_BAND_EDGES);
2443 2428
2444 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 2429 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
2445 " MATCH-EE_IDX %d: ch %d is2 %d " 2430 " MATCH-EE_IDX %d: ch %d is2 %d "
2446 "2xMinEdge %d chainmask %d chains %d\n", 2431 "2xMinEdge %d chainmask %d chains %d\n",
2447 i, freq, IS_CHAN_2GHZ(chan), 2432 i, freq, IS_CHAN_2GHZ(chan),
@@ -2460,7 +2445,7 @@ static bool ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
2460 2445
2461 minCtlPower = min(twiceMaxEdgePower, scaledPower); 2446 minCtlPower = min(twiceMaxEdgePower, scaledPower);
2462 2447
2463 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 2448 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
2464 " SEL-Min ctlMode %d pCtlMode %d " 2449 " SEL-Min ctlMode %d pCtlMode %d "
2465 "2xMaxEdge %d sP %d minCtlPwr %d\n", 2450 "2xMaxEdge %d sP %d minCtlPwr %d\n",
2466 ctlMode, pCtlMode[ctlMode], twiceMaxEdgePower, 2451 ctlMode, pCtlMode[ctlMode], twiceMaxEdgePower,
@@ -2549,10 +2534,9 @@ static bool ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
2549 targetPowerCckExt.tPow2x[0]; 2534 targetPowerCckExt.tPow2x[0];
2550 } 2535 }
2551 } 2536 }
2552 return true;
2553} 2537}
2554 2538
2555static int ath9k_hw_def_set_txpower(struct ath_hw *ah, 2539static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
2556 struct ath9k_channel *chan, 2540 struct ath9k_channel *chan,
2557 u16 cfgCtl, 2541 u16 cfgCtl,
2558 u8 twiceAntennaReduction, 2542 u8 twiceAntennaReduction,
@@ -2575,22 +2559,13 @@ static int ath9k_hw_def_set_txpower(struct ath_hw *ah,
2575 ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; 2559 ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
2576 } 2560 }
2577 2561
2578 if (!ath9k_hw_set_def_power_per_rate_table(ah, chan, 2562 ath9k_hw_set_def_power_per_rate_table(ah, chan,
2579 &ratesArray[0], cfgCtl, 2563 &ratesArray[0], cfgCtl,
2580 twiceAntennaReduction, 2564 twiceAntennaReduction,
2581 twiceMaxRegulatoryPower, 2565 twiceMaxRegulatoryPower,
2582 powerLimit)) { 2566 powerLimit);
2583 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
2584 "ath9k_hw_set_txpower: unable to set "
2585 "tx power per rate table\n");
2586 return -EIO;
2587 }
2588 2567
2589 if (!ath9k_hw_set_def_power_cal_table(ah, chan, &txPowerIndexOffset)) { 2568 ath9k_hw_set_def_power_cal_table(ah, chan, &txPowerIndexOffset);
2590 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
2591 "ath9k_hw_set_txpower: unable to set power table\n");
2592 return -EIO;
2593 }
2594 2569
2595 for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { 2570 for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
2596 ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); 2571 ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
@@ -2717,8 +2692,6 @@ static int ath9k_hw_def_set_txpower(struct ath_hw *ah,
2717 "Invalid chainmask configuration\n"); 2692 "Invalid chainmask configuration\n");
2718 break; 2693 break;
2719 } 2694 }
2720
2721 return 0;
2722} 2695}
2723 2696
2724static u8 ath9k_hw_def_get_num_ant_config(struct ath_hw *ah, 2697static u8 ath9k_hw_def_get_num_ant_config(struct ath_hw *ah,
diff --git a/drivers/net/wireless/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h
index 25b68c881ff1..67b8bd12941a 100644
--- a/drivers/net/wireless/ath9k/eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
@@ -17,6 +17,8 @@
17#ifndef EEPROM_H 17#ifndef EEPROM_H
18#define EEPROM_H 18#define EEPROM_H
19 19
20#include <net/cfg80211.h>
21
20#define AH_USE_EEPROM 0x1 22#define AH_USE_EEPROM 0x1
21 23
22#ifdef __BIG_ENDIAN 24#ifdef __BIG_ENDIAN
@@ -492,7 +494,7 @@ struct eeprom_ops {
492 struct ath9k_channel *chan); 494 struct ath9k_channel *chan);
493 void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan); 495 void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan);
494 void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan); 496 void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan);
495 int (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan, 497 void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan,
496 u16 cfgCtl, u8 twiceAntennaReduction, 498 u16 cfgCtl, u8 twiceAntennaReduction,
497 u8 twiceMaxRegulatoryPower, u8 powerLimit); 499 u8 twiceMaxRegulatoryPower, u8 powerLimit);
498 u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz); 500 u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz);
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index b15eaf8417ff..1579c9407ed5 100644
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -84,6 +84,38 @@ static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs)
84 return ath9k_hw_mac_clks(ah, usecs); 84 return ath9k_hw_mac_clks(ah, usecs);
85} 85}
86 86
87/*
88 * Read and write, they both share the same lock. We do this to serialize
89 * reads and writes on Atheros 802.11n PCI devices only. This is required
90 * as the FIFO on these devices can only accept sanely 2 requests. After
91 * that the device goes bananas. Serializing the reads/writes prevents this
92 * from happening.
93 */
94
95void ath9k_iowrite32(struct ath_hw *ah, u32 reg_offset, u32 val)
96{
97 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
98 unsigned long flags;
99 spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
100 iowrite32(val, ah->ah_sc->mem + reg_offset);
101 spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
102 } else
103 iowrite32(val, ah->ah_sc->mem + reg_offset);
104}
105
106unsigned int ath9k_ioread32(struct ath_hw *ah, u32 reg_offset)
107{
108 u32 val;
109 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
110 unsigned long flags;
111 spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
112 val = ioread32(ah->ah_sc->mem + reg_offset);
113 spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
114 } else
115 val = ioread32(ah->ah_sc->mem + reg_offset);
116 return val;
117}
118
87bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout) 119bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
88{ 120{
89 int i; 121 int i;
@@ -97,7 +129,7 @@ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
97 udelay(AH_TIME_QUANTUM); 129 udelay(AH_TIME_QUANTUM);
98 } 130 }
99 131
100 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, 132 DPRINTF(ah->ah_sc, ATH_DBG_ANY,
101 "timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n", 133 "timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
102 timeout, reg, REG_READ(ah, reg), mask, val); 134 timeout, reg, REG_READ(ah, reg), mask, val);
103 135
@@ -136,7 +168,7 @@ bool ath9k_get_channel_edges(struct ath_hw *ah,
136} 168}
137 169
138u16 ath9k_hw_computetxtime(struct ath_hw *ah, 170u16 ath9k_hw_computetxtime(struct ath_hw *ah,
139 struct ath_rate_table *rates, 171 const struct ath_rate_table *rates,
140 u32 frameLen, u16 rateix, 172 u32 frameLen, u16 rateix,
141 bool shortPreamble) 173 bool shortPreamble)
142{ 174{
@@ -181,7 +213,7 @@ u16 ath9k_hw_computetxtime(struct ath_hw *ah,
181 } 213 }
182 break; 214 break;
183 default: 215 default:
184 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, 216 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
185 "Unknown phy %u (rate ix %u)\n", 217 "Unknown phy %u (rate ix %u)\n",
186 rates->info[rateix].phy, rateix); 218 rates->info[rateix].phy, rateix);
187 txTime = 0; 219 txTime = 0;
@@ -306,7 +338,7 @@ static bool ath9k_hw_chip_test(struct ath_hw *ah)
306 REG_WRITE(ah, addr, wrData); 338 REG_WRITE(ah, addr, wrData);
307 rdData = REG_READ(ah, addr); 339 rdData = REG_READ(ah, addr);
308 if (rdData != wrData) { 340 if (rdData != wrData) {
309 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, 341 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
310 "address test failed " 342 "address test failed "
311 "addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", 343 "addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
312 addr, wrData, rdData); 344 addr, wrData, rdData);
@@ -318,7 +350,7 @@ static bool ath9k_hw_chip_test(struct ath_hw *ah)
318 REG_WRITE(ah, addr, wrData); 350 REG_WRITE(ah, addr, wrData);
319 rdData = REG_READ(ah, addr); 351 rdData = REG_READ(ah, addr);
320 if (wrData != rdData) { 352 if (wrData != rdData) {
321 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, 353 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
322 "address test failed " 354 "address test failed "
323 "addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", 355 "addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
324 addr, wrData, rdData); 356 addr, wrData, rdData);
@@ -363,10 +395,7 @@ static void ath9k_hw_set_defaults(struct ath_hw *ah)
363 ah->config.ack_6mb = 0x0; 395 ah->config.ack_6mb = 0x0;
364 ah->config.cwm_ignore_extcca = 0; 396 ah->config.cwm_ignore_extcca = 0;
365 ah->config.pcie_powersave_enable = 0; 397 ah->config.pcie_powersave_enable = 0;
366 ah->config.pcie_l1skp_enable = 0;
367 ah->config.pcie_clock_req = 0; 398 ah->config.pcie_clock_req = 0;
368 ah->config.pcie_power_reset = 0x100;
369 ah->config.pcie_restore = 0;
370 ah->config.pcie_waen = 0; 399 ah->config.pcie_waen = 0;
371 ah->config.analog_shiftreg = 1; 400 ah->config.analog_shiftreg = 1;
372 ah->config.ht_enable = 1; 401 ah->config.ht_enable = 1;
@@ -375,13 +404,6 @@ static void ath9k_hw_set_defaults(struct ath_hw *ah)
375 ah->config.cck_trig_high = 200; 404 ah->config.cck_trig_high = 200;
376 ah->config.cck_trig_low = 100; 405 ah->config.cck_trig_low = 100;
377 ah->config.enable_ani = 1; 406 ah->config.enable_ani = 1;
378 ah->config.noise_immunity_level = 4;
379 ah->config.ofdm_weaksignal_det = 1;
380 ah->config.cck_weaksignal_thr = 0;
381 ah->config.spur_immunity_level = 2;
382 ah->config.firstep_level = 0;
383 ah->config.rssi_thr_high = 40;
384 ah->config.rssi_thr_low = 7;
385 ah->config.diversity_control = 0; 407 ah->config.diversity_control = 0;
386 ah->config.antenna_switch_swap = 0; 408 ah->config.antenna_switch_swap = 0;
387 409
@@ -390,7 +412,7 @@ static void ath9k_hw_set_defaults(struct ath_hw *ah)
390 ah->config.spurchans[i][1] = AR_NO_SPUR; 412 ah->config.spurchans[i][1] = AR_NO_SPUR;
391 } 413 }
392 414
393 ah->config.intr_mitigation = 1; 415 ah->config.intr_mitigation = true;
394 416
395 /* 417 /*
396 * We need this for PCI devices only (Cardbus, PCI, miniPCI) 418 * We need this for PCI devices only (Cardbus, PCI, miniPCI)
@@ -463,8 +485,8 @@ static int ath9k_hw_rfattach(struct ath_hw *ah)
463 485
464 rfStatus = ath9k_hw_init_rf(ah, &ecode); 486 rfStatus = ath9k_hw_init_rf(ah, &ecode);
465 if (!rfStatus) { 487 if (!rfStatus) {
466 DPRINTF(ah->ah_sc, ATH_DBG_RESET, 488 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
467 "RF setup failed, status %u\n", ecode); 489 "RF setup failed, status: %u\n", ecode);
468 return ecode; 490 return ecode;
469 } 491 }
470 492
@@ -488,10 +510,9 @@ static int ath9k_hw_rf_claim(struct ath_hw *ah)
488 case AR_RAD2122_SREV_MAJOR: 510 case AR_RAD2122_SREV_MAJOR:
489 break; 511 break;
490 default: 512 default:
491 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, 513 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
492 "5G Radio Chip Rev 0x%02X is not " 514 "Radio Chip Rev 0x%02X not supported\n",
493 "supported by this driver\n", 515 val & AR_RADIO_SREV_MAJOR);
494 ah->hw_version.analog5GhzRev);
495 return -EOPNOTSUPP; 516 return -EOPNOTSUPP;
496 } 517 }
497 518
@@ -513,12 +534,8 @@ static int ath9k_hw_init_macaddr(struct ath_hw *ah)
513 ah->macaddr[2 * i] = eeval >> 8; 534 ah->macaddr[2 * i] = eeval >> 8;
514 ah->macaddr[2 * i + 1] = eeval & 0xff; 535 ah->macaddr[2 * i + 1] = eeval & 0xff;
515 } 536 }
516 if (sum == 0 || sum == 0xffff * 3) { 537 if (sum == 0 || sum == 0xffff * 3)
517 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
518 "mac address read failed: %pM\n",
519 ah->macaddr);
520 return -EADDRNOTAVAIL; 538 return -EADDRNOTAVAIL;
521 }
522 539
523 return 0; 540 return 0;
524} 541}
@@ -575,11 +592,8 @@ static int ath9k_hw_post_attach(struct ath_hw *ah)
575{ 592{
576 int ecode; 593 int ecode;
577 594
578 if (!ath9k_hw_chip_test(ah)) { 595 if (!ath9k_hw_chip_test(ah))
579 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
580 "hardware self-test failed\n");
581 return -ENODEV; 596 return -ENODEV;
582 }
583 597
584 ecode = ath9k_hw_rf_claim(ah); 598 ecode = ath9k_hw_rf_claim(ah);
585 if (ecode != 0) 599 if (ecode != 0)
@@ -617,17 +631,14 @@ static struct ath_hw *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
617 631
618 ath9k_hw_set_defaults(ah); 632 ath9k_hw_set_defaults(ah);
619 633
620 if (ah->config.intr_mitigation != 0)
621 ah->intr_mitigation = true;
622
623 if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) { 634 if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
624 DPRINTF(sc, ATH_DBG_RESET, "Couldn't reset chip\n"); 635 DPRINTF(sc, ATH_DBG_FATAL, "Couldn't reset chip\n");
625 ecode = -EIO; 636 ecode = -EIO;
626 goto bad; 637 goto bad;
627 } 638 }
628 639
629 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) { 640 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) {
630 DPRINTF(sc, ATH_DBG_RESET, "Couldn't wakeup chip\n"); 641 DPRINTF(sc, ATH_DBG_FATAL, "Couldn't wakeup chip\n");
631 ecode = -EIO; 642 ecode = -EIO;
632 goto bad; 643 goto bad;
633 } 644 }
@@ -650,7 +661,7 @@ static struct ath_hw *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
650 (ah->hw_version.macVersion != AR_SREV_VERSION_5416_PCIE) && 661 (ah->hw_version.macVersion != AR_SREV_VERSION_5416_PCIE) &&
651 (ah->hw_version.macVersion != AR_SREV_VERSION_9160) && 662 (ah->hw_version.macVersion != AR_SREV_VERSION_9160) &&
652 (!AR_SREV_9100(ah)) && (!AR_SREV_9280(ah)) && (!AR_SREV_9285(ah))) { 663 (!AR_SREV_9100(ah)) && (!AR_SREV_9280(ah)) && (!AR_SREV_9285(ah))) {
653 DPRINTF(sc, ATH_DBG_RESET, 664 DPRINTF(sc, ATH_DBG_FATAL,
654 "Mac Chip Rev 0x%02x.%x is not supported by " 665 "Mac Chip Rev 0x%02x.%x is not supported by "
655 "this driver\n", ah->hw_version.macVersion, 666 "this driver\n", ah->hw_version.macVersion,
656 ah->hw_version.macRev); 667 ah->hw_version.macRev);
@@ -690,10 +701,6 @@ static struct ath_hw *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
690 if (AR_SREV_9280_10_OR_LATER(ah)) 701 if (AR_SREV_9280_10_OR_LATER(ah))
691 ah->ani_function &= ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL; 702 ah->ani_function &= ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL;
692 703
693 DPRINTF(sc, ATH_DBG_RESET,
694 "This Mac Chip Rev 0x%02x.%x is \n",
695 ah->hw_version.macVersion, ah->hw_version.macRev);
696
697 if (AR_SREV_9285_12_OR_LATER(ah)) { 704 if (AR_SREV_9285_12_OR_LATER(ah)) {
698 705
699 INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2, 706 INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2,
@@ -859,11 +866,7 @@ static struct ath_hw *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
859 if (AR_SREV_9280_20(ah)) 866 if (AR_SREV_9280_20(ah))
860 ath9k_hw_init_txgain_ini(ah); 867 ath9k_hw_init_txgain_ini(ah);
861 868
862 if (!ath9k_hw_fill_cap_info(ah)) { 869 ath9k_hw_fill_cap_info(ah);
863 DPRINTF(sc, ATH_DBG_RESET, "failed ath9k_hw_fill_cap_info\n");
864 ecode = -EINVAL;
865 goto bad;
866 }
867 870
868 if ((ah->hw_version.devid == AR9280_DEVID_PCI) && 871 if ((ah->hw_version.devid == AR9280_DEVID_PCI) &&
869 test_bit(ATH9K_MODE_11A, ah->caps.wireless_modes)) { 872 test_bit(ATH9K_MODE_11A, ah->caps.wireless_modes)) {
@@ -885,8 +888,8 @@ static struct ath_hw *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
885 888
886 ecode = ath9k_hw_init_macaddr(ah); 889 ecode = ath9k_hw_init_macaddr(ah);
887 if (ecode != 0) { 890 if (ecode != 0) {
888 DPRINTF(sc, ATH_DBG_RESET, 891 DPRINTF(sc, ATH_DBG_FATAL,
889 "failed initializing mac address\n"); 892 "Failed to initialize MAC address\n");
890 goto bad; 893 goto bad;
891 } 894 }
892 895
@@ -1054,7 +1057,7 @@ static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
1054 AR_IMR_RXORN | 1057 AR_IMR_RXORN |
1055 AR_IMR_BCNMISC; 1058 AR_IMR_BCNMISC;
1056 1059
1057 if (ah->intr_mitigation) 1060 if (ah->config.intr_mitigation)
1058 ah->mask_reg |= AR_IMR_RXINTM | AR_IMR_RXMINTR; 1061 ah->mask_reg |= AR_IMR_RXINTM | AR_IMR_RXMINTR;
1059 else 1062 else
1060 ah->mask_reg |= AR_IMR_RXOK; 1063 ah->mask_reg |= AR_IMR_RXOK;
@@ -1203,23 +1206,23 @@ static u32 ath9k_hw_def_ini_fixup(struct ath_hw *ah,
1203 switch (ah->hw_version.devid) { 1206 switch (ah->hw_version.devid) {
1204 case AR9280_DEVID_PCI: 1207 case AR9280_DEVID_PCI:
1205 if (reg == 0x7894) { 1208 if (reg == 0x7894) {
1206 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 1209 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
1207 "ini VAL: %x EEPROM: %x\n", value, 1210 "ini VAL: %x EEPROM: %x\n", value,
1208 (pBase->version & 0xff)); 1211 (pBase->version & 0xff));
1209 1212
1210 if ((pBase->version & 0xff) > 0x0a) { 1213 if ((pBase->version & 0xff) > 0x0a) {
1211 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 1214 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
1212 "PWDCLKIND: %d\n", 1215 "PWDCLKIND: %d\n",
1213 pBase->pwdclkind); 1216 pBase->pwdclkind);
1214 value &= ~AR_AN_TOP2_PWDCLKIND; 1217 value &= ~AR_AN_TOP2_PWDCLKIND;
1215 value |= AR_AN_TOP2_PWDCLKIND & 1218 value |= AR_AN_TOP2_PWDCLKIND &
1216 (pBase->pwdclkind << AR_AN_TOP2_PWDCLKIND_S); 1219 (pBase->pwdclkind << AR_AN_TOP2_PWDCLKIND_S);
1217 } else { 1220 } else {
1218 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 1221 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
1219 "PWDCLKIND Earlier Rev\n"); 1222 "PWDCLKIND Earlier Rev\n");
1220 } 1223 }
1221 1224
1222 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 1225 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
1223 "final ini VAL: %x\n", value); 1226 "final ini VAL: %x\n", value);
1224 } 1227 }
1225 break; 1228 break;
@@ -1249,6 +1252,21 @@ static void ath9k_olc_init(struct ath_hw *ah)
1249 ah->PDADCdelta = 0; 1252 ah->PDADCdelta = 0;
1250} 1253}
1251 1254
1255static u32 ath9k_regd_get_ctl(struct ath_regulatory *reg,
1256 struct ath9k_channel *chan)
1257{
1258 u32 ctl = ath_regd_get_band_ctl(reg, chan->chan->band);
1259
1260 if (IS_CHAN_B(chan))
1261 ctl |= CTL_11B;
1262 else if (IS_CHAN_G(chan))
1263 ctl |= CTL_11G;
1264 else
1265 ctl |= CTL_11A;
1266
1267 return ctl;
1268}
1269
1252static int ath9k_hw_process_ini(struct ath_hw *ah, 1270static int ath9k_hw_process_ini(struct ath_hw *ah,
1253 struct ath9k_channel *chan, 1271 struct ath9k_channel *chan,
1254 enum ath9k_ht_macmode macmode) 1272 enum ath9k_ht_macmode macmode)
@@ -1256,7 +1274,6 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
1256 int i, regWrites = 0; 1274 int i, regWrites = 0;
1257 struct ieee80211_channel *channel = chan->chan; 1275 struct ieee80211_channel *channel = chan->chan;
1258 u32 modesIndex, freqIndex; 1276 u32 modesIndex, freqIndex;
1259 int status;
1260 1277
1261 switch (chan->chanmode) { 1278 switch (chan->chanmode) {
1262 case CHANNEL_A: 1279 case CHANNEL_A:
@@ -1327,8 +1344,7 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
1327 if (AR_SREV_9280(ah)) 1344 if (AR_SREV_9280(ah))
1328 REG_WRITE_ARRAY(&ah->iniModesRxGain, modesIndex, regWrites); 1345 REG_WRITE_ARRAY(&ah->iniModesRxGain, modesIndex, regWrites);
1329 1346
1330 if (AR_SREV_9280(ah) || (AR_SREV_9285(ah) && 1347 if (AR_SREV_9280(ah) || AR_SREV_9285_12_OR_LATER(ah))
1331 AR_SREV_9285_12_OR_LATER(ah)))
1332 REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites); 1348 REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites);
1333 1349
1334 for (i = 0; i < ah->iniCommon.ia_rows; i++) { 1350 for (i = 0; i < ah->iniCommon.ia_rows; i++) {
@@ -1359,20 +1375,15 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
1359 if (OLC_FOR_AR9280_20_LATER) 1375 if (OLC_FOR_AR9280_20_LATER)
1360 ath9k_olc_init(ah); 1376 ath9k_olc_init(ah);
1361 1377
1362 status = ah->eep_ops->set_txpower(ah, chan, 1378 ah->eep_ops->set_txpower(ah, chan,
1363 ath9k_regd_get_ctl(ah, chan), 1379 ath9k_regd_get_ctl(&ah->regulatory, chan),
1364 channel->max_antenna_gain * 2, 1380 channel->max_antenna_gain * 2,
1365 channel->max_power * 2, 1381 channel->max_power * 2,
1366 min((u32) MAX_RATE_POWER, 1382 min((u32) MAX_RATE_POWER,
1367 (u32) ah->regulatory.power_limit)); 1383 (u32) ah->regulatory.power_limit));
1368 if (status != 0) {
1369 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
1370 "error init'ing transmit power\n");
1371 return -EIO;
1372 }
1373 1384
1374 if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) { 1385 if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
1375 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, 1386 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
1376 "ar5416SetRfRegs failed\n"); 1387 "ar5416SetRfRegs failed\n");
1377 return -EIO; 1388 return -EIO;
1378 } 1389 }
@@ -1600,11 +1611,9 @@ static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type)
1600 switch (type) { 1611 switch (type) {
1601 case ATH9K_RESET_POWER_ON: 1612 case ATH9K_RESET_POWER_ON:
1602 return ath9k_hw_set_reset_power_on(ah); 1613 return ath9k_hw_set_reset_power_on(ah);
1603 break;
1604 case ATH9K_RESET_WARM: 1614 case ATH9K_RESET_WARM:
1605 case ATH9K_RESET_COLD: 1615 case ATH9K_RESET_COLD:
1606 return ath9k_hw_set_reset(ah, type); 1616 return ath9k_hw_set_reset(ah, type);
1607 break;
1608 default: 1617 default:
1609 return false; 1618 return false;
1610 } 1619 }
@@ -1678,7 +1687,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
1678 REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN); 1687 REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN);
1679 if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN, 1688 if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN,
1680 AR_PHY_RFBUS_GRANT_EN, AH_WAIT_TIMEOUT)) { 1689 AR_PHY_RFBUS_GRANT_EN, AH_WAIT_TIMEOUT)) {
1681 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, 1690 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
1682 "Could not kill baseband RX\n"); 1691 "Could not kill baseband RX\n");
1683 return false; 1692 return false;
1684 } 1693 }
@@ -1686,29 +1695,21 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
1686 ath9k_hw_set_regs(ah, chan, macmode); 1695 ath9k_hw_set_regs(ah, chan, macmode);
1687 1696
1688 if (AR_SREV_9280_10_OR_LATER(ah)) { 1697 if (AR_SREV_9280_10_OR_LATER(ah)) {
1689 if (!(ath9k_hw_ar9280_set_channel(ah, chan))) { 1698 ath9k_hw_ar9280_set_channel(ah, chan);
1690 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
1691 "failed to set channel\n");
1692 return false;
1693 }
1694 } else { 1699 } else {
1695 if (!(ath9k_hw_set_channel(ah, chan))) { 1700 if (!(ath9k_hw_set_channel(ah, chan))) {
1696 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, 1701 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
1697 "failed to set channel\n"); 1702 "Failed to set channel\n");
1698 return false; 1703 return false;
1699 } 1704 }
1700 } 1705 }
1701 1706
1702 if (ah->eep_ops->set_txpower(ah, chan, 1707 ah->eep_ops->set_txpower(ah, chan,
1703 ath9k_regd_get_ctl(ah, chan), 1708 ath9k_regd_get_ctl(&ah->regulatory, chan),
1704 channel->max_antenna_gain * 2, 1709 channel->max_antenna_gain * 2,
1705 channel->max_power * 2, 1710 channel->max_power * 2,
1706 min((u32) MAX_RATE_POWER, 1711 min((u32) MAX_RATE_POWER,
1707 (u32) ah->regulatory.power_limit)) != 0) { 1712 (u32) ah->regulatory.power_limit));
1708 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
1709 "error init'ing transmit power\n");
1710 return false;
1711 }
1712 1713
1713 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; 1714 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
1714 if (IS_CHAN_B(chan)) 1715 if (IS_CHAN_B(chan))
@@ -2199,14 +2200,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2199 ah->txchainmask = sc->tx_chainmask; 2200 ah->txchainmask = sc->tx_chainmask;
2200 ah->rxchainmask = sc->rx_chainmask; 2201 ah->rxchainmask = sc->rx_chainmask;
2201 2202
2202 if (AR_SREV_9285(ah)) {
2203 ah->txchainmask &= 0x1;
2204 ah->rxchainmask &= 0x1;
2205 } else if (AR_SREV_9280(ah)) {
2206 ah->txchainmask &= 0x3;
2207 ah->rxchainmask &= 0x3;
2208 }
2209
2210 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) 2203 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
2211 return -EIO; 2204 return -EIO;
2212 2205
@@ -2242,7 +2235,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2242 ath9k_hw_mark_phy_inactive(ah); 2235 ath9k_hw_mark_phy_inactive(ah);
2243 2236
2244 if (!ath9k_hw_chip_reset(ah, chan)) { 2237 if (!ath9k_hw_chip_reset(ah, chan)) {
2245 DPRINTF(ah->ah_sc, ATH_DBG_RESET, "chip reset failed\n"); 2238 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, "Chip reset failed\n");
2246 return -EINVAL; 2239 return -EINVAL;
2247 } 2240 }
2248 2241
@@ -2304,13 +2297,11 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2304 2297
2305 REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR); 2298 REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
2306 2299
2307 if (AR_SREV_9280_10_OR_LATER(ah)) { 2300 if (AR_SREV_9280_10_OR_LATER(ah))
2308 if (!(ath9k_hw_ar9280_set_channel(ah, chan))) 2301 ath9k_hw_ar9280_set_channel(ah, chan);
2309 return -EIO; 2302 else
2310 } else {
2311 if (!(ath9k_hw_set_channel(ah, chan))) 2303 if (!(ath9k_hw_set_channel(ah, chan)))
2312 return -EIO; 2304 return -EIO;
2313 }
2314 2305
2315 for (i = 0; i < AR_NUM_DCU; i++) 2306 for (i = 0; i < AR_NUM_DCU; i++)
2316 REG_WRITE(ah, AR_DQCUMASK(i), 1 << i); 2307 REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);
@@ -2335,8 +2326,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2335 2326
2336 REG_WRITE(ah, AR_OBS, 8); 2327 REG_WRITE(ah, AR_OBS, 8);
2337 2328
2338 if (ah->intr_mitigation) { 2329 if (ah->config.intr_mitigation) {
2339
2340 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500); 2330 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500);
2341 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000); 2331 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000);
2342 } 2332 }
@@ -2385,8 +2375,8 @@ bool ath9k_hw_keyreset(struct ath_hw *ah, u16 entry)
2385 u32 keyType; 2375 u32 keyType;
2386 2376
2387 if (entry >= ah->caps.keycache_size) { 2377 if (entry >= ah->caps.keycache_size) {
2388 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE, 2378 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
2389 "entry %u out of range\n", entry); 2379 "keychache entry %u out of range\n", entry);
2390 return false; 2380 return false;
2391 } 2381 }
2392 2382
@@ -2422,8 +2412,8 @@ bool ath9k_hw_keysetmac(struct ath_hw *ah, u16 entry, const u8 *mac)
2422 u32 macHi, macLo; 2412 u32 macHi, macLo;
2423 2413
2424 if (entry >= ah->caps.keycache_size) { 2414 if (entry >= ah->caps.keycache_size) {
2425 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE, 2415 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
2426 "entry %u out of range\n", entry); 2416 "keychache entry %u out of range\n", entry);
2427 return false; 2417 return false;
2428 } 2418 }
2429 2419
@@ -2454,8 +2444,8 @@ bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
2454 u32 keyType; 2444 u32 keyType;
2455 2445
2456 if (entry >= pCap->keycache_size) { 2446 if (entry >= pCap->keycache_size) {
2457 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE, 2447 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
2458 "entry %u out of range\n", entry); 2448 "keycache entry %u out of range\n", entry);
2459 return false; 2449 return false;
2460 } 2450 }
2461 2451
@@ -2465,7 +2455,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
2465 break; 2455 break;
2466 case ATH9K_CIPHER_AES_CCM: 2456 case ATH9K_CIPHER_AES_CCM:
2467 if (!(pCap->hw_caps & ATH9K_HW_CAP_CIPHER_AESCCM)) { 2457 if (!(pCap->hw_caps & ATH9K_HW_CAP_CIPHER_AESCCM)) {
2468 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE, 2458 DPRINTF(ah->ah_sc, ATH_DBG_ANY,
2469 "AES-CCM not supported by mac rev 0x%x\n", 2459 "AES-CCM not supported by mac rev 0x%x\n",
2470 ah->hw_version.macRev); 2460 ah->hw_version.macRev);
2471 return false; 2461 return false;
@@ -2476,20 +2466,20 @@ bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
2476 keyType = AR_KEYTABLE_TYPE_TKIP; 2466 keyType = AR_KEYTABLE_TYPE_TKIP;
2477 if (ATH9K_IS_MIC_ENABLED(ah) 2467 if (ATH9K_IS_MIC_ENABLED(ah)
2478 && entry + 64 >= pCap->keycache_size) { 2468 && entry + 64 >= pCap->keycache_size) {
2479 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE, 2469 DPRINTF(ah->ah_sc, ATH_DBG_ANY,
2480 "entry %u inappropriate for TKIP\n", entry); 2470 "entry %u inappropriate for TKIP\n", entry);
2481 return false; 2471 return false;
2482 } 2472 }
2483 break; 2473 break;
2484 case ATH9K_CIPHER_WEP: 2474 case ATH9K_CIPHER_WEP:
2485 if (k->kv_len < LEN_WEP40) { 2475 if (k->kv_len < WLAN_KEY_LEN_WEP40) {
2486 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE, 2476 DPRINTF(ah->ah_sc, ATH_DBG_ANY,
2487 "WEP key length %u too small\n", k->kv_len); 2477 "WEP key length %u too small\n", k->kv_len);
2488 return false; 2478 return false;
2489 } 2479 }
2490 if (k->kv_len <= LEN_WEP40) 2480 if (k->kv_len <= WLAN_KEY_LEN_WEP40)
2491 keyType = AR_KEYTABLE_TYPE_40; 2481 keyType = AR_KEYTABLE_TYPE_40;
2492 else if (k->kv_len <= LEN_WEP104) 2482 else if (k->kv_len <= WLAN_KEY_LEN_WEP104)
2493 keyType = AR_KEYTABLE_TYPE_104; 2483 keyType = AR_KEYTABLE_TYPE_104;
2494 else 2484 else
2495 keyType = AR_KEYTABLE_TYPE_128; 2485 keyType = AR_KEYTABLE_TYPE_128;
@@ -2498,7 +2488,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
2498 keyType = AR_KEYTABLE_TYPE_CLR; 2488 keyType = AR_KEYTABLE_TYPE_CLR;
2499 break; 2489 break;
2500 default: 2490 default:
2501 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE, 2491 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
2502 "cipher %u not supported\n", k->kv_type); 2492 "cipher %u not supported\n", k->kv_type);
2503 return false; 2493 return false;
2504 } 2494 }
@@ -2508,7 +2498,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
2508 key2 = get_unaligned_le32(k->kv_val + 6); 2498 key2 = get_unaligned_le32(k->kv_val + 6);
2509 key3 = get_unaligned_le16(k->kv_val + 10); 2499 key3 = get_unaligned_le16(k->kv_val + 10);
2510 key4 = get_unaligned_le32(k->kv_val + 12); 2500 key4 = get_unaligned_le32(k->kv_val + 12);
2511 if (k->kv_len <= LEN_WEP104) 2501 if (k->kv_len <= WLAN_KEY_LEN_WEP104)
2512 key4 &= 0xff; 2502 key4 &= 0xff;
2513 2503
2514 /* 2504 /*
@@ -2716,7 +2706,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
2716 AR_RTC_FORCE_WAKE_EN); 2706 AR_RTC_FORCE_WAKE_EN);
2717 } 2707 }
2718 if (i == 0) { 2708 if (i == 0) {
2719 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 2709 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
2720 "Failed to wakeup in %uus\n", POWER_UP_TIME / 20); 2710 "Failed to wakeup in %uus\n", POWER_UP_TIME / 20);
2721 return false; 2711 return false;
2722 } 2712 }
@@ -2737,9 +2727,8 @@ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
2737 "UNDEFINED" 2727 "UNDEFINED"
2738 }; 2728 };
2739 2729
2740 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, "%s -> %s (%s)\n", 2730 DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s -> %s\n",
2741 modes[ah->power_mode], modes[mode], 2731 modes[ah->power_mode], modes[mode]);
2742 setChip ? "set chip " : "");
2743 2732
2744 switch (mode) { 2733 switch (mode) {
2745 case ATH9K_PM_AWAKE: 2734 case ATH9K_PM_AWAKE:
@@ -2753,7 +2742,7 @@ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
2753 ath9k_set_power_network_sleep(ah, setChip); 2742 ath9k_set_power_network_sleep(ah, setChip);
2754 break; 2743 break;
2755 default: 2744 default:
2756 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 2745 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
2757 "Unknown power mode %u\n", mode); 2746 "Unknown power mode %u\n", mode);
2758 return false; 2747 return false;
2759 } 2748 }
@@ -2943,7 +2932,7 @@ bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
2943 2932
2944 *masked = isr & ATH9K_INT_COMMON; 2933 *masked = isr & ATH9K_INT_COMMON;
2945 2934
2946 if (ah->intr_mitigation) { 2935 if (ah->config.intr_mitigation) {
2947 if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM)) 2936 if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM))
2948 *masked |= ATH9K_INT_RX; 2937 *masked |= ATH9K_INT_RX;
2949 } 2938 }
@@ -3000,6 +2989,7 @@ bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
3000 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 2989 DPRINTF(ah->ah_sc, ATH_DBG_ANY,
3001 "received PCI PERR interrupt\n"); 2990 "received PCI PERR interrupt\n");
3002 } 2991 }
2992 *masked |= ATH9K_INT_FATAL;
3003 } 2993 }
3004 if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) { 2994 if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) {
3005 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, 2995 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
@@ -3061,7 +3051,7 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
3061 } 3051 }
3062 if (ints & ATH9K_INT_RX) { 3052 if (ints & ATH9K_INT_RX) {
3063 mask |= AR_IMR_RXERR; 3053 mask |= AR_IMR_RXERR;
3064 if (ah->intr_mitigation) 3054 if (ah->config.intr_mitigation)
3065 mask |= AR_IMR_RXMINTR | AR_IMR_RXINTM; 3055 mask |= AR_IMR_RXMINTR | AR_IMR_RXINTM;
3066 else 3056 else
3067 mask |= AR_IMR_RXOK | AR_IMR_RXDESC; 3057 mask |= AR_IMR_RXOK | AR_IMR_RXDESC;
@@ -3259,7 +3249,7 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
3259/* HW Capabilities */ 3249/* HW Capabilities */
3260/*******************/ 3250/*******************/
3261 3251
3262bool ath9k_hw_fill_cap_info(struct ath_hw *ah) 3252void ath9k_hw_fill_cap_info(struct ath_hw *ah)
3263{ 3253{
3264 struct ath9k_hw_capabilities *pCap = &ah->caps; 3254 struct ath9k_hw_capabilities *pCap = &ah->caps;
3265 u16 capField = 0, eeval; 3255 u16 capField = 0, eeval;
@@ -3343,8 +3333,6 @@ bool ath9k_hw_fill_cap_info(struct ath_hw *ah)
3343 pCap->hw_caps |= ATH9K_HW_CAP_MIC_TKIP; 3333 pCap->hw_caps |= ATH9K_HW_CAP_MIC_TKIP;
3344 pCap->hw_caps |= ATH9K_HW_CAP_MIC_AESCCM; 3334 pCap->hw_caps |= ATH9K_HW_CAP_MIC_AESCCM;
3345 3335
3346 pCap->hw_caps |= ATH9K_HW_CAP_CHAN_SPREAD;
3347
3348 if (ah->config.ht_enable) 3336 if (ah->config.ht_enable)
3349 pCap->hw_caps |= ATH9K_HW_CAP_HT; 3337 pCap->hw_caps |= ATH9K_HW_CAP_HT;
3350 else 3338 else
@@ -3368,7 +3356,6 @@ bool ath9k_hw_fill_cap_info(struct ath_hw *ah)
3368 pCap->keycache_size = AR_KEYTABLE_SIZE; 3356 pCap->keycache_size = AR_KEYTABLE_SIZE;
3369 3357
3370 pCap->hw_caps |= ATH9K_HW_CAP_FASTCC; 3358 pCap->hw_caps |= ATH9K_HW_CAP_FASTCC;
3371 pCap->num_mr_retries = 4;
3372 pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD; 3359 pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD;
3373 3360
3374 if (AR_SREV_9285_10_OR_LATER(ah)) 3361 if (AR_SREV_9285_10_OR_LATER(ah))
@@ -3378,14 +3365,6 @@ bool ath9k_hw_fill_cap_info(struct ath_hw *ah)
3378 else 3365 else
3379 pCap->num_gpio_pins = AR_NUM_GPIO; 3366 pCap->num_gpio_pins = AR_NUM_GPIO;
3380 3367
3381 if (AR_SREV_9280_10_OR_LATER(ah)) {
3382 pCap->hw_caps |= ATH9K_HW_CAP_WOW;
3383 pCap->hw_caps |= ATH9K_HW_CAP_WOW_MATCHPATTERN_EXACT;
3384 } else {
3385 pCap->hw_caps &= ~ATH9K_HW_CAP_WOW;
3386 pCap->hw_caps &= ~ATH9K_HW_CAP_WOW_MATCHPATTERN_EXACT;
3387 }
3388
3389 if (AR_SREV_9160_10_OR_LATER(ah) || AR_SREV_9100(ah)) { 3368 if (AR_SREV_9160_10_OR_LATER(ah) || AR_SREV_9100(ah)) {
3390 pCap->hw_caps |= ATH9K_HW_CAP_CST; 3369 pCap->hw_caps |= ATH9K_HW_CAP_CST;
3391 pCap->rts_aggr_limit = ATH_AMPDU_LIMIT_MAX; 3370 pCap->rts_aggr_limit = ATH_AMPDU_LIMIT_MAX;
@@ -3411,7 +3390,8 @@ bool ath9k_hw_fill_cap_info(struct ath_hw *ah)
3411 (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE) || 3390 (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE) ||
3412 (ah->hw_version.macVersion == AR_SREV_VERSION_9160) || 3391 (ah->hw_version.macVersion == AR_SREV_VERSION_9160) ||
3413 (ah->hw_version.macVersion == AR_SREV_VERSION_9100) || 3392 (ah->hw_version.macVersion == AR_SREV_VERSION_9100) ||
3414 (ah->hw_version.macVersion == AR_SREV_VERSION_9280)) 3393 (ah->hw_version.macVersion == AR_SREV_VERSION_9280) ||
3394 (ah->hw_version.macVersion == AR_SREV_VERSION_9285))
3415 pCap->hw_caps &= ~ATH9K_HW_CAP_AUTOSLEEP; 3395 pCap->hw_caps &= ~ATH9K_HW_CAP_AUTOSLEEP;
3416 else 3396 else
3417 pCap->hw_caps |= ATH9K_HW_CAP_AUTOSLEEP; 3397 pCap->hw_caps |= ATH9K_HW_CAP_AUTOSLEEP;
@@ -3445,8 +3425,6 @@ bool ath9k_hw_fill_cap_info(struct ath_hw *ah)
3445 ah->btactive_gpio = 6; 3425 ah->btactive_gpio = 6;
3446 ah->wlanactive_gpio = 5; 3426 ah->wlanactive_gpio = 5;
3447 } 3427 }
3448
3449 return true;
3450} 3428}
3451 3429
3452bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type, 3430bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
@@ -3754,22 +3732,19 @@ bool ath9k_hw_disable(struct ath_hw *ah)
3754 return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD); 3732 return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD);
3755} 3733}
3756 3734
3757bool ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit) 3735void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit)
3758{ 3736{
3759 struct ath9k_channel *chan = ah->curchan; 3737 struct ath9k_channel *chan = ah->curchan;
3760 struct ieee80211_channel *channel = chan->chan; 3738 struct ieee80211_channel *channel = chan->chan;
3761 3739
3762 ah->regulatory.power_limit = min(limit, (u32) MAX_RATE_POWER); 3740 ah->regulatory.power_limit = min(limit, (u32) MAX_RATE_POWER);
3763 3741
3764 if (ah->eep_ops->set_txpower(ah, chan, 3742 ah->eep_ops->set_txpower(ah, chan,
3765 ath9k_regd_get_ctl(ah, chan), 3743 ath9k_regd_get_ctl(&ah->regulatory, chan),
3766 channel->max_antenna_gain * 2, 3744 channel->max_antenna_gain * 2,
3767 channel->max_power * 2, 3745 channel->max_power * 2,
3768 min((u32) MAX_RATE_POWER, 3746 min((u32) MAX_RATE_POWER,
3769 (u32) ah->regulatory.power_limit)) != 0) 3747 (u32) ah->regulatory.power_limit));
3770 return false;
3771
3772 return true;
3773} 3748}
3774 3749
3775void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac) 3750void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac)
diff --git a/drivers/net/wireless/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 0b594e0ee260..dd8508ef6e05 100644
--- a/drivers/net/wireless/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -25,10 +25,11 @@
25#include "ani.h" 25#include "ani.h"
26#include "eeprom.h" 26#include "eeprom.h"
27#include "calib.h" 27#include "calib.h"
28#include "regd.h"
29#include "reg.h" 28#include "reg.h"
30#include "phy.h" 29#include "phy.h"
31 30
31#include "../regd.h"
32
32#define ATHEROS_VENDOR_ID 0x168c 33#define ATHEROS_VENDOR_ID 0x168c
33#define AR5416_DEVID_PCI 0x0023 34#define AR5416_DEVID_PCI 0x0023
34#define AR5416_DEVID_PCIE 0x0024 35#define AR5416_DEVID_PCIE 0x0024
@@ -124,29 +125,24 @@ enum wireless_mode {
124}; 125};
125 126
126enum ath9k_hw_caps { 127enum ath9k_hw_caps {
127 ATH9K_HW_CAP_CHAN_SPREAD = BIT(0), 128 ATH9K_HW_CAP_MIC_AESCCM = BIT(0),
128 ATH9K_HW_CAP_MIC_AESCCM = BIT(1), 129 ATH9K_HW_CAP_MIC_CKIP = BIT(1),
129 ATH9K_HW_CAP_MIC_CKIP = BIT(2), 130 ATH9K_HW_CAP_MIC_TKIP = BIT(2),
130 ATH9K_HW_CAP_MIC_TKIP = BIT(3), 131 ATH9K_HW_CAP_CIPHER_AESCCM = BIT(3),
131 ATH9K_HW_CAP_CIPHER_AESCCM = BIT(4), 132 ATH9K_HW_CAP_CIPHER_CKIP = BIT(4),
132 ATH9K_HW_CAP_CIPHER_CKIP = BIT(5), 133 ATH9K_HW_CAP_CIPHER_TKIP = BIT(5),
133 ATH9K_HW_CAP_CIPHER_TKIP = BIT(6), 134 ATH9K_HW_CAP_VEOL = BIT(6),
134 ATH9K_HW_CAP_VEOL = BIT(7), 135 ATH9K_HW_CAP_BSSIDMASK = BIT(7),
135 ATH9K_HW_CAP_BSSIDMASK = BIT(8), 136 ATH9K_HW_CAP_MCAST_KEYSEARCH = BIT(8),
136 ATH9K_HW_CAP_MCAST_KEYSEARCH = BIT(9), 137 ATH9K_HW_CAP_HT = BIT(9),
137 ATH9K_HW_CAP_CHAN_HALFRATE = BIT(10), 138 ATH9K_HW_CAP_GTT = BIT(10),
138 ATH9K_HW_CAP_CHAN_QUARTERRATE = BIT(11), 139 ATH9K_HW_CAP_FASTCC = BIT(11),
139 ATH9K_HW_CAP_HT = BIT(12), 140 ATH9K_HW_CAP_RFSILENT = BIT(12),
140 ATH9K_HW_CAP_GTT = BIT(13), 141 ATH9K_HW_CAP_CST = BIT(13),
141 ATH9K_HW_CAP_FASTCC = BIT(14), 142 ATH9K_HW_CAP_ENHANCEDPM = BIT(14),
142 ATH9K_HW_CAP_RFSILENT = BIT(15), 143 ATH9K_HW_CAP_AUTOSLEEP = BIT(15),
143 ATH9K_HW_CAP_WOW = BIT(16), 144 ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(16),
144 ATH9K_HW_CAP_CST = BIT(17), 145 ATH9K_HW_CAP_BT_COEX = BIT(17)
145 ATH9K_HW_CAP_ENHANCEDPM = BIT(18),
146 ATH9K_HW_CAP_AUTOSLEEP = BIT(19),
147 ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(20),
148 ATH9K_HW_CAP_WOW_MATCHPATTERN_EXACT = BIT(21),
149 ATH9K_HW_CAP_BT_COEX = BIT(22)
150}; 146};
151 147
152enum ath9k_capability_type { 148enum ath9k_capability_type {
@@ -166,7 +162,6 @@ struct ath9k_hw_capabilities {
166 u16 keycache_size; 162 u16 keycache_size;
167 u16 low_5ghz_chan, high_5ghz_chan; 163 u16 low_5ghz_chan, high_5ghz_chan;
168 u16 low_2ghz_chan, high_2ghz_chan; 164 u16 low_2ghz_chan, high_2ghz_chan;
169 u16 num_mr_retries;
170 u16 rts_aggr_limit; 165 u16 rts_aggr_limit;
171 u8 tx_chainmask; 166 u8 tx_chainmask;
172 u8 rx_chainmask; 167 u8 rx_chainmask;
@@ -184,11 +179,8 @@ struct ath9k_ops_config {
184 int ack_6mb; 179 int ack_6mb;
185 int cwm_ignore_extcca; 180 int cwm_ignore_extcca;
186 u8 pcie_powersave_enable; 181 u8 pcie_powersave_enable;
187 u8 pcie_l1skp_enable;
188 u8 pcie_clock_req; 182 u8 pcie_clock_req;
189 u32 pcie_waen; 183 u32 pcie_waen;
190 int pcie_power_reset;
191 u8 pcie_restore;
192 u8 analog_shiftreg; 184 u8 analog_shiftreg;
193 u8 ht_enable; 185 u8 ht_enable;
194 u32 ofdm_trig_low; 186 u32 ofdm_trig_low;
@@ -196,17 +188,10 @@ struct ath9k_ops_config {
196 u32 cck_trig_high; 188 u32 cck_trig_high;
197 u32 cck_trig_low; 189 u32 cck_trig_low;
198 u32 enable_ani; 190 u32 enable_ani;
199 u8 noise_immunity_level;
200 u32 ofdm_weaksignal_det;
201 u32 cck_weaksignal_thr;
202 u8 spur_immunity_level;
203 u8 firstep_level;
204 int8_t rssi_thr_high;
205 int8_t rssi_thr_low;
206 u16 diversity_control; 191 u16 diversity_control;
207 u16 antenna_switch_swap; 192 u16 antenna_switch_swap;
208 int serialize_regmode; 193 int serialize_regmode;
209 int intr_mitigation; 194 bool intr_mitigation;
210#define SPUR_DISABLE 0 195#define SPUR_DISABLE 0
211#define SPUR_ENABLE_IOCTL 1 196#define SPUR_ENABLE_IOCTL 1
212#define SPUR_ENABLE_EEPROM 2 197#define SPUR_ENABLE_EEPROM 2
@@ -281,13 +266,6 @@ enum ath9k_int {
281#define CHANNEL_HT40PLUS 0x20000 266#define CHANNEL_HT40PLUS 0x20000
282#define CHANNEL_HT40MINUS 0x40000 267#define CHANNEL_HT40MINUS 0x40000
283 268
284#define CHANNEL_INTERFERENCE 0x01
285#define CHANNEL_DFS 0x02
286#define CHANNEL_4MS_LIMIT 0x04
287#define CHANNEL_DFS_CLEAR 0x08
288#define CHANNEL_DISALLOW_ADHOC 0x10
289#define CHANNEL_PER_11D_ADHOC 0x20
290
291#define CHANNEL_A (CHANNEL_5GHZ|CHANNEL_OFDM) 269#define CHANNEL_A (CHANNEL_5GHZ|CHANNEL_OFDM)
292#define CHANNEL_B (CHANNEL_2GHZ|CHANNEL_CCK) 270#define CHANNEL_B (CHANNEL_2GHZ|CHANNEL_CCK)
293#define CHANNEL_G (CHANNEL_2GHZ|CHANNEL_OFDM) 271#define CHANNEL_G (CHANNEL_2GHZ|CHANNEL_OFDM)
@@ -318,10 +296,6 @@ struct ath9k_channel {
318 int16_t rawNoiseFloor; 296 int16_t rawNoiseFloor;
319}; 297};
320 298
321#define IS_CHAN_A(_c) ((((_c)->channelFlags & CHANNEL_A) == CHANNEL_A) || \
322 (((_c)->channelFlags & CHANNEL_A_HT20) == CHANNEL_A_HT20) || \
323 (((_c)->channelFlags & CHANNEL_A_HT40PLUS) == CHANNEL_A_HT40PLUS) || \
324 (((_c)->channelFlags & CHANNEL_A_HT40MINUS) == CHANNEL_A_HT40MINUS))
325#define IS_CHAN_G(_c) ((((_c)->channelFlags & (CHANNEL_G)) == CHANNEL_G) || \ 299#define IS_CHAN_G(_c) ((((_c)->channelFlags & (CHANNEL_G)) == CHANNEL_G) || \
326 (((_c)->channelFlags & CHANNEL_G_HT20) == CHANNEL_G_HT20) || \ 300 (((_c)->channelFlags & CHANNEL_G_HT20) == CHANNEL_G_HT20) || \
327 (((_c)->channelFlags & CHANNEL_G_HT40PLUS) == CHANNEL_G_HT40PLUS) || \ 301 (((_c)->channelFlags & CHANNEL_G_HT40PLUS) == CHANNEL_G_HT40PLUS) || \
@@ -329,7 +303,6 @@ struct ath9k_channel {
329#define IS_CHAN_OFDM(_c) (((_c)->channelFlags & CHANNEL_OFDM) != 0) 303#define IS_CHAN_OFDM(_c) (((_c)->channelFlags & CHANNEL_OFDM) != 0)
330#define IS_CHAN_5GHZ(_c) (((_c)->channelFlags & CHANNEL_5GHZ) != 0) 304#define IS_CHAN_5GHZ(_c) (((_c)->channelFlags & CHANNEL_5GHZ) != 0)
331#define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0) 305#define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0)
332#define IS_CHAN_PASSIVE(_c) (((_c)->channelFlags & CHANNEL_PASSIVE) != 0)
333#define IS_CHAN_HALF_RATE(_c) (((_c)->channelFlags & CHANNEL_HALF) != 0) 306#define IS_CHAN_HALF_RATE(_c) (((_c)->channelFlags & CHANNEL_HALF) != 0)
334#define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0) 307#define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0)
335#define IS_CHAN_A_5MHZ_SPACED(_c) \ 308#define IS_CHAN_A_5MHZ_SPACED(_c) \
@@ -420,7 +393,7 @@ struct ath_hw {
420 struct ath9k_hw_version hw_version; 393 struct ath9k_hw_version hw_version;
421 struct ath9k_ops_config config; 394 struct ath9k_ops_config config;
422 struct ath9k_hw_capabilities caps; 395 struct ath9k_hw_capabilities caps;
423 struct ath9k_regulatory regulatory; 396 struct ath_regulatory regulatory;
424 struct ath9k_channel channels[38]; 397 struct ath9k_channel channels[38];
425 struct ath9k_channel *curchan; 398 struct ath9k_channel *curchan;
426 399
@@ -463,14 +436,14 @@ struct ath_hw {
463 enum ath9k_ant_setting diversity_control; 436 enum ath9k_ant_setting diversity_control;
464 437
465 /* Calibration */ 438 /* Calibration */
466 enum hal_cal_types supp_cals; 439 enum ath9k_cal_types supp_cals;
467 struct hal_cal_list iq_caldata; 440 struct ath9k_cal_list iq_caldata;
468 struct hal_cal_list adcgain_caldata; 441 struct ath9k_cal_list adcgain_caldata;
469 struct hal_cal_list adcdc_calinitdata; 442 struct ath9k_cal_list adcdc_calinitdata;
470 struct hal_cal_list adcdc_caldata; 443 struct ath9k_cal_list adcdc_caldata;
471 struct hal_cal_list *cal_list; 444 struct ath9k_cal_list *cal_list;
472 struct hal_cal_list *cal_list_last; 445 struct ath9k_cal_list *cal_list_last;
473 struct hal_cal_list *cal_list_curr; 446 struct ath9k_cal_list *cal_list_curr;
474#define totalPowerMeasI meas0.unsign 447#define totalPowerMeasI meas0.unsign
475#define totalPowerMeasQ meas1.unsign 448#define totalPowerMeasQ meas1.unsign
476#define totalIqCorrMeas meas2.sign 449#define totalIqCorrMeas meas2.sign
@@ -540,7 +513,6 @@ struct ath_hw {
540 enum ath9k_ani_cmd ani_function; 513 enum ath9k_ani_cmd ani_function;
541 514
542 u32 intr_txqs; 515 u32 intr_txqs;
543 bool intr_mitigation;
544 enum ath9k_ht_extprotspacing extprotspacing; 516 enum ath9k_ht_extprotspacing extprotspacing;
545 u8 txchainmask; 517 u8 txchainmask;
546 u8 rxchainmask; 518 u8 rxchainmask;
@@ -573,7 +545,7 @@ struct ath_hw *ath9k_hw_attach(u16 devid, struct ath_softc *sc, int *error);
573void ath9k_hw_rfdetach(struct ath_hw *ah); 545void ath9k_hw_rfdetach(struct ath_hw *ah);
574int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, 546int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
575 bool bChannelChange); 547 bool bChannelChange);
576bool ath9k_hw_fill_cap_info(struct ath_hw *ah); 548void ath9k_hw_fill_cap_info(struct ath_hw *ah);
577bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type, 549bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
578 u32 capability, u32 *result); 550 u32 capability, u32 *result);
579bool ath9k_hw_setcapability(struct ath_hw *ah, enum ath9k_capability_type type, 551bool ath9k_hw_setcapability(struct ath_hw *ah, enum ath9k_capability_type type,
@@ -608,7 +580,8 @@ bool ath9k_hw_setantennaswitch(struct ath_hw *ah,
608bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout); 580bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
609u32 ath9k_hw_reverse_bits(u32 val, u32 n); 581u32 ath9k_hw_reverse_bits(u32 val, u32 n);
610bool ath9k_get_channel_edges(struct ath_hw *ah, u16 flags, u16 *low, u16 *high); 582bool ath9k_get_channel_edges(struct ath_hw *ah, u16 flags, u16 *low, u16 *high);
611u16 ath9k_hw_computetxtime(struct ath_hw *ah, struct ath_rate_table *rates, 583u16 ath9k_hw_computetxtime(struct ath_hw *ah,
584 const struct ath_rate_table *rates,
612 u32 frameLen, u16 rateix, bool shortPreamble); 585 u32 frameLen, u16 rateix, bool shortPreamble);
613void ath9k_hw_get_channel_centers(struct ath_hw *ah, 586void ath9k_hw_get_channel_centers(struct ath_hw *ah,
614 struct ath9k_channel *chan, 587 struct ath9k_channel *chan,
@@ -617,7 +590,7 @@ u32 ath9k_hw_getrxfilter(struct ath_hw *ah);
617void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits); 590void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits);
618bool ath9k_hw_phy_disable(struct ath_hw *ah); 591bool ath9k_hw_phy_disable(struct ath_hw *ah);
619bool ath9k_hw_disable(struct ath_hw *ah); 592bool ath9k_hw_disable(struct ath_hw *ah);
620bool ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit); 593void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit);
621void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac); 594void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac);
622void ath9k_hw_setopmode(struct ath_hw *ah); 595void ath9k_hw_setopmode(struct ath_hw *ah);
623void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1); 596void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1);
diff --git a/drivers/net/wireless/ath9k/initvals.h b/drivers/net/wireless/ath/ath9k/initvals.h
index e2f0a34b79a1..e2f0a34b79a1 100644
--- a/drivers/net/wireless/ath9k/initvals.h
+++ b/drivers/net/wireless/ath/ath9k/initvals.h
diff --git a/drivers/net/wireless/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
index e0a6dee45839..8ae4ec21667b 100644
--- a/drivers/net/wireless/ath9k/mac.c
+++ b/drivers/net/wireless/ath/ath9k/mac.c
@@ -49,7 +49,7 @@ bool ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp)
49 49
50bool ath9k_hw_txstart(struct ath_hw *ah, u32 q) 50bool ath9k_hw_txstart(struct ath_hw *ah, u32 q)
51{ 51{
52 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "queue %u\n", q); 52 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Enable TXE on queue: %u\n", q);
53 53
54 REG_WRITE(ah, AR_Q_TXE, 1 << q); 54 REG_WRITE(ah, AR_Q_TXE, 1 << q);
55 55
@@ -110,13 +110,15 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
110 u32 wait_time = ATH9K_TX_STOP_DMA_TIMEOUT / ATH9K_TIME_QUANTUM; 110 u32 wait_time = ATH9K_TX_STOP_DMA_TIMEOUT / ATH9K_TIME_QUANTUM;
111 111
112 if (q >= pCap->total_queues) { 112 if (q >= pCap->total_queues) {
113 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "invalid queue num %u\n", q); 113 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Stopping TX DMA, "
114 "invalid queue: %u\n", q);
114 return false; 115 return false;
115 } 116 }
116 117
117 qi = &ah->txq[q]; 118 qi = &ah->txq[q];
118 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 119 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
119 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "inactive queue\n"); 120 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Stopping TX DMA, "
121 "inactive queue: %u\n", q);
120 return false; 122 return false;
121 } 123 }
122 124
@@ -146,7 +148,7 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
146 break; 148 break;
147 149
148 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, 150 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
149 "TSF have moved while trying to set " 151 "TSF has moved while trying to set "
150 "quiet time TSF: 0x%08x\n", tsfLow); 152 "quiet time TSF: 0x%08x\n", tsfLow);
151 } 153 }
152 154
@@ -158,8 +160,8 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
158 wait = wait_time; 160 wait = wait_time;
159 while (ath9k_hw_numtxpending(ah, q)) { 161 while (ath9k_hw_numtxpending(ah, q)) {
160 if ((--wait) == 0) { 162 if ((--wait) == 0) {
161 DPRINTF(ah->ah_sc, ATH_DBG_XMIT, 163 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
162 "Failed to stop Tx DMA in 100 " 164 "Failed to stop TX DMA in 100 "
163 "msec after killing last frame\n"); 165 "msec after killing last frame\n");
164 break; 166 break;
165 } 167 }
@@ -454,17 +456,19 @@ bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q,
454 struct ath9k_tx_queue_info *qi; 456 struct ath9k_tx_queue_info *qi;
455 457
456 if (q >= pCap->total_queues) { 458 if (q >= pCap->total_queues) {
457 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "invalid queue num %u\n", q); 459 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Set TXQ properties, "
460 "invalid queue: %u\n", q);
458 return false; 461 return false;
459 } 462 }
460 463
461 qi = &ah->txq[q]; 464 qi = &ah->txq[q];
462 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 465 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
463 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "inactive queue\n"); 466 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Set TXQ properties, "
467 "inactive queue: %u\n", q);
464 return false; 468 return false;
465 } 469 }
466 470
467 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "queue %p\n", qi); 471 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Set queue properties for: %u\n", q);
468 472
469 qi->tqi_ver = qinfo->tqi_ver; 473 qi->tqi_ver = qinfo->tqi_ver;
470 qi->tqi_subtype = qinfo->tqi_subtype; 474 qi->tqi_subtype = qinfo->tqi_subtype;
@@ -521,13 +525,15 @@ bool ath9k_hw_get_txq_props(struct ath_hw *ah, int q,
521 struct ath9k_tx_queue_info *qi; 525 struct ath9k_tx_queue_info *qi;
522 526
523 if (q >= pCap->total_queues) { 527 if (q >= pCap->total_queues) {
524 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "invalid queue num %u\n", q); 528 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Get TXQ properties, "
529 "invalid queue: %u\n", q);
525 return false; 530 return false;
526 } 531 }
527 532
528 qi = &ah->txq[q]; 533 qi = &ah->txq[q];
529 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 534 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
530 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "inactive queue\n"); 535 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Get TXQ properties, "
536 "inactive queue: %u\n", q);
531 return false; 537 return false;
532 } 538 }
533 539
@@ -575,22 +581,23 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type,
575 ATH9K_TX_QUEUE_INACTIVE) 581 ATH9K_TX_QUEUE_INACTIVE)
576 break; 582 break;
577 if (q == pCap->total_queues) { 583 if (q == pCap->total_queues) {
578 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, 584 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
579 "no available tx queue\n"); 585 "No available TX queue\n");
580 return -1; 586 return -1;
581 } 587 }
582 break; 588 break;
583 default: 589 default:
584 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "bad tx queue type %u\n", type); 590 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, "Invalid TX queue type: %u\n",
591 type);
585 return -1; 592 return -1;
586 } 593 }
587 594
588 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "queue %u\n", q); 595 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Setup TX queue: %u\n", q);
589 596
590 qi = &ah->txq[q]; 597 qi = &ah->txq[q];
591 if (qi->tqi_type != ATH9K_TX_QUEUE_INACTIVE) { 598 if (qi->tqi_type != ATH9K_TX_QUEUE_INACTIVE) {
592 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, 599 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
593 "tx queue %u already active\n", q); 600 "TX queue: %u already active\n", q);
594 return -1; 601 return -1;
595 } 602 }
596 memset(qi, 0, sizeof(struct ath9k_tx_queue_info)); 603 memset(qi, 0, sizeof(struct ath9k_tx_queue_info));
@@ -620,16 +627,18 @@ bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q)
620 struct ath9k_tx_queue_info *qi; 627 struct ath9k_tx_queue_info *qi;
621 628
622 if (q >= pCap->total_queues) { 629 if (q >= pCap->total_queues) {
623 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "invalid queue num %u\n", q); 630 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Release TXQ, "
631 "invalid queue: %u\n", q);
624 return false; 632 return false;
625 } 633 }
626 qi = &ah->txq[q]; 634 qi = &ah->txq[q];
627 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 635 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
628 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "inactive queue %u\n", q); 636 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Release TXQ, "
637 "inactive queue: %u\n", q);
629 return false; 638 return false;
630 } 639 }
631 640
632 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "release queue %u\n", q); 641 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Release TX queue: %u\n", q);
633 642
634 qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE; 643 qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE;
635 ah->txok_interrupt_mask &= ~(1 << q); 644 ah->txok_interrupt_mask &= ~(1 << q);
@@ -650,17 +659,19 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
650 u32 cwMin, chanCwMin, value; 659 u32 cwMin, chanCwMin, value;
651 660
652 if (q >= pCap->total_queues) { 661 if (q >= pCap->total_queues) {
653 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "invalid queue num %u\n", q); 662 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Reset TXQ, "
663 "invalid queue: %u\n", q);
654 return false; 664 return false;
655 } 665 }
656 666
657 qi = &ah->txq[q]; 667 qi = &ah->txq[q];
658 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 668 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
659 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "inactive queue %u\n", q); 669 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Reset TXQ, "
670 "inactive queue: %u\n", q);
660 return true; 671 return true;
661 } 672 }
662 673
663 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "reset queue %u\n", q); 674 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Reset TX queue: %u\n", q);
664 675
665 if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) { 676 if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) {
666 if (chan && IS_CHAN_B(chan)) 677 if (chan && IS_CHAN_B(chan))
@@ -894,7 +905,7 @@ bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set)
894 905
895 reg = REG_READ(ah, AR_OBS_BUS_1); 906 reg = REG_READ(ah, AR_OBS_BUS_1);
896 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 907 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
897 "rx failed to go idle in 10 ms RXSM=0x%x\n", reg); 908 "RX failed to go idle in 10 ms RXSM=0x%x\n", reg);
898 909
899 return false; 910 return false;
900 } 911 }
@@ -949,8 +960,8 @@ bool ath9k_hw_stopdmarecv(struct ath_hw *ah)
949 } 960 }
950 961
951 if (i == 0) { 962 if (i == 0) {
952 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, 963 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
953 "dma failed to stop in %d ms " 964 "DMA failed to stop in %d ms "
954 "AR_CR=0x%08x AR_DIAG_SW=0x%08x\n", 965 "AR_CR=0x%08x AR_DIAG_SW=0x%08x\n",
955 AH_RX_STOP_DMA_TIMEOUT / 1000, 966 AH_RX_STOP_DMA_TIMEOUT / 1000,
956 REG_READ(ah, AR_CR), 967 REG_READ(ah, AR_CR),
diff --git a/drivers/net/wireless/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h
index 1176bce8b76c..1176bce8b76c 100644
--- a/drivers/net/wireless/ath9k/mac.h
+++ b/drivers/net/wireless/ath/ath9k/mac.h
diff --git a/drivers/net/wireless/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index 13d4e6756c99..61da08a1648c 100644
--- a/drivers/net/wireless/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -35,14 +35,14 @@ MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
35#define CHAN2G(_freq, _idx) { \ 35#define CHAN2G(_freq, _idx) { \
36 .center_freq = (_freq), \ 36 .center_freq = (_freq), \
37 .hw_value = (_idx), \ 37 .hw_value = (_idx), \
38 .max_power = 30, \ 38 .max_power = 20, \
39} 39}
40 40
41#define CHAN5G(_freq, _idx) { \ 41#define CHAN5G(_freq, _idx) { \
42 .band = IEEE80211_BAND_5GHZ, \ 42 .band = IEEE80211_BAND_5GHZ, \
43 .center_freq = (_freq), \ 43 .center_freq = (_freq), \
44 .hw_value = (_idx), \ 44 .hw_value = (_idx), \
45 .max_power = 30, \ 45 .max_power = 20, \
46} 46}
47 47
48/* Some 2 GHz radios are actually tunable on 2312-2732 48/* Some 2 GHz radios are actually tunable on 2312-2732
@@ -189,7 +189,7 @@ static u8 parse_mpdudensity(u8 mpdudensity)
189 189
190static void ath_setup_rates(struct ath_softc *sc, enum ieee80211_band band) 190static void ath_setup_rates(struct ath_softc *sc, enum ieee80211_band band)
191{ 191{
192 struct ath_rate_table *rate_table = NULL; 192 const struct ath_rate_table *rate_table = NULL;
193 struct ieee80211_supported_band *sband; 193 struct ieee80211_supported_band *sband;
194 struct ieee80211_rate *rate; 194 struct ieee80211_rate *rate;
195 int i, maxrates; 195 int i, maxrates;
@@ -280,14 +280,13 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
280 if (r) { 280 if (r) {
281 DPRINTF(sc, ATH_DBG_FATAL, 281 DPRINTF(sc, ATH_DBG_FATAL,
282 "Unable to reset channel (%u Mhz) " 282 "Unable to reset channel (%u Mhz) "
283 "reset status %u\n", 283 "reset status %d\n",
284 channel->center_freq, r); 284 channel->center_freq, r);
285 spin_unlock_bh(&sc->sc_resetlock); 285 spin_unlock_bh(&sc->sc_resetlock);
286 return r; 286 return r;
287 } 287 }
288 spin_unlock_bh(&sc->sc_resetlock); 288 spin_unlock_bh(&sc->sc_resetlock);
289 289
290 sc->sc_flags &= ~SC_OP_CHAINMASK_UPDATE;
291 sc->sc_flags &= ~SC_OP_FULL_RESET; 290 sc->sc_flags &= ~SC_OP_FULL_RESET;
292 291
293 if (ath_startrecv(sc) != 0) { 292 if (ath_startrecv(sc) != 0) {
@@ -330,6 +329,12 @@ static void ath_ani_calibrate(unsigned long data)
330 if (sc->sc_flags & SC_OP_SCANNING) 329 if (sc->sc_flags & SC_OP_SCANNING)
331 goto set_timer; 330 goto set_timer;
332 331
332 /* Only calibrate if awake */
333 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
334 goto set_timer;
335
336 ath9k_ps_wakeup(sc);
337
333 /* Long calibration runs independently of short calibration. */ 338 /* Long calibration runs independently of short calibration. */
334 if ((timestamp - sc->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) { 339 if ((timestamp - sc->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
335 longcal = true; 340 longcal = true;
@@ -368,31 +373,21 @@ static void ath_ani_calibrate(unsigned long data)
368 373
369 /* Perform calibration if necessary */ 374 /* Perform calibration if necessary */
370 if (longcal || shortcal) { 375 if (longcal || shortcal) {
371 bool iscaldone = false; 376 sc->ani.caldone = ath9k_hw_calibrate(ah, ah->curchan,
372 377 sc->rx_chainmask, longcal);
373 if (ath9k_hw_calibrate(ah, ah->curchan, 378
374 sc->rx_chainmask, longcal, 379 if (longcal)
375 &iscaldone)) { 380 sc->ani.noise_floor = ath9k_hw_getchan_noise(ah,
376 if (longcal) 381 ah->curchan);
377 sc->ani.noise_floor = 382
378 ath9k_hw_getchan_noise(ah, 383 DPRINTF(sc, ATH_DBG_ANI," calibrate chan %u/%x nf: %d\n",
379 ah->curchan); 384 ah->curchan->channel, ah->curchan->channelFlags,
380 385 sc->ani.noise_floor);
381 DPRINTF(sc, ATH_DBG_ANI,
382 "calibrate chan %u/%x nf: %d\n",
383 ah->curchan->channel,
384 ah->curchan->channelFlags,
385 sc->ani.noise_floor);
386 } else {
387 DPRINTF(sc, ATH_DBG_ANY,
388 "calibrate chan %u/%x failed\n",
389 ah->curchan->channel,
390 ah->curchan->channelFlags);
391 }
392 sc->ani.caldone = iscaldone;
393 } 386 }
394 } 387 }
395 388
389 ath9k_ps_restore(sc);
390
396set_timer: 391set_timer:
397 /* 392 /*
398 * Set timer interval based on previous results. 393 * Set timer interval based on previous results.
@@ -408,6 +403,18 @@ set_timer:
408 mod_timer(&sc->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); 403 mod_timer(&sc->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
409} 404}
410 405
406static void ath_start_ani(struct ath_softc *sc)
407{
408 unsigned long timestamp = jiffies_to_msecs(jiffies);
409
410 sc->ani.longcal_timer = timestamp;
411 sc->ani.shortcal_timer = timestamp;
412 sc->ani.checkani_timer = timestamp;
413
414 mod_timer(&sc->ani.timer,
415 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
416}
417
411/* 418/*
412 * Update tx/rx chainmask. For legacy association, 419 * Update tx/rx chainmask. For legacy association,
413 * hard code chainmask to 1x1, for 11n association, use 420 * hard code chainmask to 1x1, for 11n association, use
@@ -416,7 +423,6 @@ set_timer:
416 */ 423 */
417void ath_update_chainmask(struct ath_softc *sc, int is_ht) 424void ath_update_chainmask(struct ath_softc *sc, int is_ht)
418{ 425{
419 sc->sc_flags |= SC_OP_CHAINMASK_UPDATE;
420 if (is_ht || 426 if (is_ht ||
421 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BT_COEX)) { 427 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BT_COEX)) {
422 sc->tx_chainmask = sc->sc_ah->caps.tx_chainmask; 428 sc->tx_chainmask = sc->sc_ah->caps.tx_chainmask;
@@ -436,12 +442,12 @@ static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
436 442
437 an = (struct ath_node *)sta->drv_priv; 443 an = (struct ath_node *)sta->drv_priv;
438 444
439 if (sc->sc_flags & SC_OP_TXAGGR) 445 if (sc->sc_flags & SC_OP_TXAGGR) {
440 ath_tx_node_init(sc, an); 446 ath_tx_node_init(sc, an);
441 447 an->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
442 an->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR + 448 sta->ht_cap.ampdu_factor);
443 sta->ht_cap.ampdu_factor); 449 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
444 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density); 450 }
445} 451}
446 452
447static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta) 453static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
@@ -457,133 +463,130 @@ static void ath9k_tasklet(unsigned long data)
457 struct ath_softc *sc = (struct ath_softc *)data; 463 struct ath_softc *sc = (struct ath_softc *)data;
458 u32 status = sc->intrstatus; 464 u32 status = sc->intrstatus;
459 465
466 ath9k_ps_wakeup(sc);
467
460 if (status & ATH9K_INT_FATAL) { 468 if (status & ATH9K_INT_FATAL) {
461 /* need a chip reset */
462 ath_reset(sc, false); 469 ath_reset(sc, false);
470 ath9k_ps_restore(sc);
463 return; 471 return;
464 } else { 472 }
465 473
466 if (status & 474 if (status & (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) {
467 (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) { 475 spin_lock_bh(&sc->rx.rxflushlock);
468 spin_lock_bh(&sc->rx.rxflushlock); 476 ath_rx_tasklet(sc, 0);
469 ath_rx_tasklet(sc, 0); 477 spin_unlock_bh(&sc->rx.rxflushlock);
470 spin_unlock_bh(&sc->rx.rxflushlock); 478 }
471 } 479
472 /* XXX: optimize this */ 480 if (status & ATH9K_INT_TX)
473 if (status & ATH9K_INT_TX) 481 ath_tx_tasklet(sc);
474 ath_tx_tasklet(sc); 482
483 if ((status & ATH9K_INT_TSFOOR) &&
484 (sc->hw->conf.flags & IEEE80211_CONF_PS)) {
485 /*
486 * TSF sync does not look correct; remain awake to sync with
487 * the next Beacon.
488 */
489 DPRINTF(sc, ATH_DBG_PS, "TSFOOR - Sync with next Beacon\n");
490 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON | SC_OP_BEACON_SYNC;
475 } 491 }
476 492
477 /* re-enable hardware interrupt */ 493 /* re-enable hardware interrupt */
478 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); 494 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
495 ath9k_ps_restore(sc);
479} 496}
480 497
481irqreturn_t ath_isr(int irq, void *dev) 498irqreturn_t ath_isr(int irq, void *dev)
482{ 499{
500#define SCHED_INTR ( \
501 ATH9K_INT_FATAL | \
502 ATH9K_INT_RXORN | \
503 ATH9K_INT_RXEOL | \
504 ATH9K_INT_RX | \
505 ATH9K_INT_TX | \
506 ATH9K_INT_BMISS | \
507 ATH9K_INT_CST | \
508 ATH9K_INT_TSFOOR)
509
483 struct ath_softc *sc = dev; 510 struct ath_softc *sc = dev;
484 struct ath_hw *ah = sc->sc_ah; 511 struct ath_hw *ah = sc->sc_ah;
485 enum ath9k_int status; 512 enum ath9k_int status;
486 bool sched = false; 513 bool sched = false;
487 514
488 do { 515 /*
489 if (sc->sc_flags & SC_OP_INVALID) { 516 * The hardware is not ready/present, don't
490 /* 517 * touch anything. Note this can happen early
491 * The hardware is not ready/present, don't 518 * on if the IRQ is shared.
492 * touch anything. Note this can happen early 519 */
493 * on if the IRQ is shared. 520 if (sc->sc_flags & SC_OP_INVALID)
494 */ 521 return IRQ_NONE;
495 return IRQ_NONE;
496 }
497 if (!ath9k_hw_intrpend(ah)) { /* shared irq, not for us */
498 return IRQ_NONE;
499 }
500 522
501 /*
502 * Figure out the reason(s) for the interrupt. Note
503 * that the hal returns a pseudo-ISR that may include
504 * bits we haven't explicitly enabled so we mask the
505 * value to insure we only process bits we requested.
506 */
507 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
508 523
509 status &= sc->imask; /* discard unasked-for bits */ 524 /* shared irq, not for us */
510 525
511 /* 526 if (!ath9k_hw_intrpend(ah))
512 * If there are no status bits set, then this interrupt was not 527 return IRQ_NONE;
513 * for me (should have been caught above).
514 */
515 if (!status)
516 return IRQ_NONE;
517 528
518 sc->intrstatus = status; 529 /*
519 ath9k_ps_wakeup(sc); 530 * Figure out the reason(s) for the interrupt. Note
531 * that the hal returns a pseudo-ISR that may include
532 * bits we haven't explicitly enabled so we mask the
533 * value to insure we only process bits we requested.
534 */
535 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
536 status &= sc->imask; /* discard unasked-for bits */
520 537
521 if (status & ATH9K_INT_FATAL) { 538 /*
522 /* need a chip reset */ 539 * If there are no status bits set, then this interrupt was not
523 sched = true; 540 * for me (should have been caught above).
524 } else if (status & ATH9K_INT_RXORN) { 541 */
525 /* need a chip reset */ 542 if (!status)
526 sched = true; 543 return IRQ_NONE;
527 } else {
528 if (status & ATH9K_INT_SWBA) {
529 /* schedule a tasklet for beacon handling */
530 tasklet_schedule(&sc->bcon_tasklet);
531 }
532 if (status & ATH9K_INT_RXEOL) {
533 /*
534 * NB: the hardware should re-read the link when
535 * RXE bit is written, but it doesn't work
536 * at least on older hardware revs.
537 */
538 sched = true;
539 }
540 544
541 if (status & ATH9K_INT_TXURN) 545 /* Cache the status */
542 /* bump tx trigger level */ 546 sc->intrstatus = status;
543 ath9k_hw_updatetxtriglevel(ah, true); 547
544 /* XXX: optimize this */ 548 if (status & SCHED_INTR)
545 if (status & ATH9K_INT_RX) 549 sched = true;
546 sched = true; 550
547 if (status & ATH9K_INT_TX) 551 /*
548 sched = true; 552 * If a FATAL or RXORN interrupt is received, we have to reset the
549 if (status & ATH9K_INT_BMISS) 553 * chip immediately.
550 sched = true; 554 */
551 /* carrier sense timeout */ 555 if (status & (ATH9K_INT_FATAL | ATH9K_INT_RXORN))
552 if (status & ATH9K_INT_CST) 556 goto chip_reset;
553 sched = true; 557
554 if (status & ATH9K_INT_MIB) { 558 if (status & ATH9K_INT_SWBA)
555 /* 559 tasklet_schedule(&sc->bcon_tasklet);
556 * Disable interrupts until we service the MIB 560
557 * interrupt; otherwise it will continue to 561 if (status & ATH9K_INT_TXURN)
558 * fire. 562 ath9k_hw_updatetxtriglevel(ah, true);
559 */ 563
560 ath9k_hw_set_interrupts(ah, 0); 564 if (status & ATH9K_INT_MIB) {
561 /* 565 /*
562 * Let the hal handle the event. We assume 566 * Disable interrupts until we service the MIB
563 * it will clear whatever condition caused 567 * interrupt; otherwise it will continue to
564 * the interrupt. 568 * fire.
565 */ 569 */
566 ath9k_hw_procmibevent(ah, &sc->nodestats); 570 ath9k_hw_set_interrupts(ah, 0);
567 ath9k_hw_set_interrupts(ah, sc->imask); 571 /*
568 } 572 * Let the hal handle the event. We assume
569 if (status & ATH9K_INT_TIM_TIMER) { 573 * it will clear whatever condition caused
570 if (!(ah->caps.hw_caps & 574 * the interrupt.
571 ATH9K_HW_CAP_AUTOSLEEP)) { 575 */
572 /* Clear RxAbort bit so that we can 576 ath9k_hw_procmibevent(ah, &sc->nodestats);
573 * receive frames */ 577 ath9k_hw_set_interrupts(ah, sc->imask);
574 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE); 578 }
575 ath9k_hw_setrxabort(ah, 0); 579
576 sched = true; 580 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
577 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON; 581 if (status & ATH9K_INT_TIM_TIMER) {
578 } 582 /* Clear RxAbort bit so that we can
579 } 583 * receive frames */
580 if (status & ATH9K_INT_TSFOOR) { 584 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
581 /* FIXME: Handle this interrupt for power save */ 585 ath9k_hw_setrxabort(sc->sc_ah, 0);
582 sched = true; 586 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON;
583 }
584 } 587 }
585 ath9k_ps_restore(sc); 588
586 } while (0); 589chip_reset:
587 590
588 ath_debug_stat_interrupt(sc, status); 591 ath_debug_stat_interrupt(sc, status);
589 592
@@ -594,6 +597,8 @@ irqreturn_t ath_isr(int irq, void *dev)
594 } 597 }
595 598
596 return IRQ_HANDLED; 599 return IRQ_HANDLED;
600
601#undef SCHED_INTR
597} 602}
598 603
599static u32 ath_get_extchanmode(struct ath_softc *sc, 604static u32 ath_get_extchanmode(struct ath_softc *sc,
@@ -676,7 +681,7 @@ static int ath_setkey_tkip(struct ath_softc *sc, u16 keyix, const u8 *key,
676 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic)); 681 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
677 if (!ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, NULL)) { 682 if (!ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, NULL)) {
678 /* TX MIC entry failed. No need to proceed further */ 683 /* TX MIC entry failed. No need to proceed further */
679 DPRINTF(sc, ATH_DBG_KEYCACHE, 684 DPRINTF(sc, ATH_DBG_FATAL,
680 "Setting TX MIC Key Failed\n"); 685 "Setting TX MIC Key Failed\n");
681 return 0; 686 return 0;
682 } 687 }
@@ -909,6 +914,13 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc,
909 if (avp->av_opmode == NL80211_IFTYPE_STATION) { 914 if (avp->av_opmode == NL80211_IFTYPE_STATION) {
910 sc->curaid = bss_conf->aid; 915 sc->curaid = bss_conf->aid;
911 ath9k_hw_write_associd(sc); 916 ath9k_hw_write_associd(sc);
917
918 /*
919 * Request a re-configuration of Beacon related timers
920 * on the receipt of the first Beacon frame (i.e.,
921 * after time sync with the AP).
922 */
923 sc->sc_flags |= SC_OP_BEACON_SYNC;
912 } 924 }
913 925
914 /* Configure the beacon */ 926 /* Configure the beacon */
@@ -920,11 +932,9 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc,
920 sc->nodestats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER; 932 sc->nodestats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
921 sc->nodestats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER; 933 sc->nodestats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
922 934
923 /* Start ANI */ 935 ath_start_ani(sc);
924 mod_timer(&sc->ani.timer,
925 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
926 } else { 936 } else {
927 DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info DISSOC\n"); 937 DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
928 sc->curaid = 0; 938 sc->curaid = 0;
929 } 939 }
930} 940}
@@ -1098,14 +1108,14 @@ void ath_radio_enable(struct ath_softc *sc)
1098 int r; 1108 int r;
1099 1109
1100 ath9k_ps_wakeup(sc); 1110 ath9k_ps_wakeup(sc);
1101 spin_lock_bh(&sc->sc_resetlock); 1111 ath9k_hw_configpcipowersave(ah, 0);
1102 1112
1113 spin_lock_bh(&sc->sc_resetlock);
1103 r = ath9k_hw_reset(ah, ah->curchan, false); 1114 r = ath9k_hw_reset(ah, ah->curchan, false);
1104
1105 if (r) { 1115 if (r) {
1106 DPRINTF(sc, ATH_DBG_FATAL, 1116 DPRINTF(sc, ATH_DBG_FATAL,
1107 "Unable to reset channel %u (%uMhz) ", 1117 "Unable to reset channel %u (%uMhz) ",
1108 "reset status %u\n", 1118 "reset status %d\n",
1109 channel->center_freq, r); 1119 channel->center_freq, r);
1110 } 1120 }
1111 spin_unlock_bh(&sc->sc_resetlock); 1121 spin_unlock_bh(&sc->sc_resetlock);
@@ -1157,12 +1167,13 @@ void ath_radio_disable(struct ath_softc *sc)
1157 if (r) { 1167 if (r) {
1158 DPRINTF(sc, ATH_DBG_FATAL, 1168 DPRINTF(sc, ATH_DBG_FATAL,
1159 "Unable to reset channel %u (%uMhz) " 1169 "Unable to reset channel %u (%uMhz) "
1160 "reset status %u\n", 1170 "reset status %d\n",
1161 channel->center_freq, r); 1171 channel->center_freq, r);
1162 } 1172 }
1163 spin_unlock_bh(&sc->sc_resetlock); 1173 spin_unlock_bh(&sc->sc_resetlock);
1164 1174
1165 ath9k_hw_phy_disable(ah); 1175 ath9k_hw_phy_disable(ah);
1176 ath9k_hw_configpcipowersave(ah, 1);
1166 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP); 1177 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
1167 ath9k_ps_restore(sc); 1178 ath9k_ps_restore(sc);
1168} 1179}
@@ -1267,7 +1278,6 @@ static int ath_init_sw_rfkill(struct ath_softc *sc)
1267 sc->rf_kill.rfkill->data = sc; 1278 sc->rf_kill.rfkill->data = sc;
1268 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio; 1279 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
1269 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED; 1280 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
1270 sc->rf_kill.rfkill->user_claim_unsupported = 1;
1271 1281
1272 return 0; 1282 return 0;
1273} 1283}
@@ -1362,6 +1372,17 @@ void ath_detach(struct ath_softc *sc)
1362 ath9k_ps_restore(sc); 1372 ath9k_ps_restore(sc);
1363} 1373}
1364 1374
1375static int ath9k_reg_notifier(struct wiphy *wiphy,
1376 struct regulatory_request *request)
1377{
1378 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
1379 struct ath_wiphy *aphy = hw->priv;
1380 struct ath_softc *sc = aphy->sc;
1381 struct ath_regulatory *reg = &sc->sc_ah->regulatory;
1382
1383 return ath_reg_notifier_apply(wiphy, request, reg);
1384}
1385
1365static int ath_init(u16 devid, struct ath_softc *sc) 1386static int ath_init(u16 devid, struct ath_softc *sc)
1366{ 1387{
1367 struct ath_hw *ah = NULL; 1388 struct ath_hw *ah = NULL;
@@ -1403,7 +1424,7 @@ static int ath_init(u16 devid, struct ath_softc *sc)
1403 /* Get the hardware key cache size. */ 1424 /* Get the hardware key cache size. */
1404 sc->keymax = ah->caps.keycache_size; 1425 sc->keymax = ah->caps.keycache_size;
1405 if (sc->keymax > ATH_KEYMAX) { 1426 if (sc->keymax > ATH_KEYMAX) {
1406 DPRINTF(sc, ATH_DBG_KEYCACHE, 1427 DPRINTF(sc, ATH_DBG_ANY,
1407 "Warning, using only %u entries in %u key cache\n", 1428 "Warning, using only %u entries in %u key cache\n",
1408 ATH_KEYMAX, sc->keymax); 1429 ATH_KEYMAX, sc->keymax);
1409 sc->keymax = ATH_KEYMAX; 1430 sc->keymax = ATH_KEYMAX;
@@ -1416,7 +1437,7 @@ static int ath_init(u16 devid, struct ath_softc *sc)
1416 for (i = 0; i < sc->keymax; i++) 1437 for (i = 0; i < sc->keymax; i++)
1417 ath9k_hw_keyreset(ah, (u16) i); 1438 ath9k_hw_keyreset(ah, (u16) i);
1418 1439
1419 if (ath9k_regd_init(sc->sc_ah)) 1440 if (error)
1420 goto bad; 1441 goto bad;
1421 1442
1422 /* default to MONITOR mode */ 1443 /* default to MONITOR mode */
@@ -1545,9 +1566,6 @@ static int ath_init(u16 devid, struct ath_softc *sc)
1545 sc->beacon.bslot_aphy[i] = NULL; 1566 sc->beacon.bslot_aphy[i] = NULL;
1546 } 1567 }
1547 1568
1548 /* save MISC configurations */
1549 sc->config.swBeaconProcess = 1;
1550
1551 /* setup channels and rates */ 1569 /* setup channels and rates */
1552 1570
1553 sc->sbands[IEEE80211_BAND_2GHZ].channels = ath9k_2ghz_chantable; 1571 sc->sbands[IEEE80211_BAND_2GHZ].channels = ath9k_2ghz_chantable;
@@ -1602,9 +1620,6 @@ void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
1602 BIT(NL80211_IFTYPE_ADHOC) | 1620 BIT(NL80211_IFTYPE_ADHOC) |
1603 BIT(NL80211_IFTYPE_MESH_POINT); 1621 BIT(NL80211_IFTYPE_MESH_POINT);
1604 1622
1605 hw->wiphy->reg_notifier = ath9k_reg_notifier;
1606 hw->wiphy->strict_regulatory = true;
1607
1608 hw->queues = 4; 1623 hw->queues = 4;
1609 hw->max_rates = 4; 1624 hw->max_rates = 4;
1610 hw->channel_change_time = 5000; 1625 hw->channel_change_time = 5000;
@@ -1625,8 +1640,8 @@ void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
1625int ath_attach(u16 devid, struct ath_softc *sc) 1640int ath_attach(u16 devid, struct ath_softc *sc)
1626{ 1641{
1627 struct ieee80211_hw *hw = sc->hw; 1642 struct ieee80211_hw *hw = sc->hw;
1628 const struct ieee80211_regdomain *regd;
1629 int error = 0, i; 1643 int error = 0, i;
1644 struct ath_regulatory *reg;
1630 1645
1631 DPRINTF(sc, ATH_DBG_CONFIG, "Attach ATH hw\n"); 1646 DPRINTF(sc, ATH_DBG_CONFIG, "Attach ATH hw\n");
1632 1647
@@ -1640,6 +1655,13 @@ int ath_attach(u16 devid, struct ath_softc *sc)
1640 1655
1641 ath_set_hw_capab(sc, hw); 1656 ath_set_hw_capab(sc, hw);
1642 1657
1658 error = ath_regd_init(&sc->sc_ah->regulatory, sc->hw->wiphy,
1659 ath9k_reg_notifier);
1660 if (error)
1661 return error;
1662
1663 reg = &sc->sc_ah->regulatory;
1664
1643 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { 1665 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
1644 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap); 1666 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
1645 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) 1667 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
@@ -1666,31 +1688,14 @@ int ath_attach(u16 devid, struct ath_softc *sc)
1666 goto error_attach; 1688 goto error_attach;
1667#endif 1689#endif
1668 1690
1669 if (ath9k_is_world_regd(sc->sc_ah)) {
1670 /* Anything applied here (prior to wiphy registration) gets
1671 * saved on the wiphy orig_* parameters */
1672 regd = ath9k_world_regdomain(sc->sc_ah);
1673 hw->wiphy->custom_regulatory = true;
1674 hw->wiphy->strict_regulatory = false;
1675 } else {
1676 /* This gets applied in the case of the absense of CRDA,
1677 * it's our own custom world regulatory domain, similar to
1678 * cfg80211's but we enable passive scanning */
1679 regd = ath9k_default_world_regdomain();
1680 }
1681 wiphy_apply_custom_regulatory(hw->wiphy, regd);
1682 ath9k_reg_apply_radar_flags(hw->wiphy);
1683 ath9k_reg_apply_world_flags(hw->wiphy, NL80211_REGDOM_SET_BY_DRIVER);
1684
1685 INIT_WORK(&sc->chan_work, ath9k_wiphy_chan_work); 1691 INIT_WORK(&sc->chan_work, ath9k_wiphy_chan_work);
1686 INIT_DELAYED_WORK(&sc->wiphy_work, ath9k_wiphy_work); 1692 INIT_DELAYED_WORK(&sc->wiphy_work, ath9k_wiphy_work);
1687 sc->wiphy_scheduler_int = msecs_to_jiffies(500); 1693 sc->wiphy_scheduler_int = msecs_to_jiffies(500);
1688 1694
1689 error = ieee80211_register_hw(hw); 1695 error = ieee80211_register_hw(hw);
1690 1696
1691 if (!ath9k_is_world_regd(sc->sc_ah)) { 1697 if (!ath_is_world_regd(reg)) {
1692 error = regulatory_hint(hw->wiphy, 1698 error = regulatory_hint(hw->wiphy, reg->alpha2);
1693 sc->sc_ah->regulatory.alpha2);
1694 if (error) 1699 if (error)
1695 goto error_attach; 1700 goto error_attach;
1696 } 1701 }
@@ -1728,7 +1733,7 @@ int ath_reset(struct ath_softc *sc, bool retry_tx)
1728 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false); 1733 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
1729 if (r) 1734 if (r)
1730 DPRINTF(sc, ATH_DBG_FATAL, 1735 DPRINTF(sc, ATH_DBG_FATAL,
1731 "Unable to reset hardware; reset status %u\n", r); 1736 "Unable to reset hardware; reset status %d\n", r);
1732 spin_unlock_bh(&sc->sc_resetlock); 1737 spin_unlock_bh(&sc->sc_resetlock);
1733 1738
1734 if (ath_startrecv(sc) != 0) 1739 if (ath_startrecv(sc) != 0)
@@ -1792,7 +1797,6 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
1792 goto fail; 1797 goto fail;
1793 } 1798 }
1794 1799
1795 dd->dd_name = name;
1796 dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc; 1800 dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc;
1797 1801
1798 /* 1802 /*
@@ -1822,7 +1826,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
1822 } 1826 }
1823 ds = dd->dd_desc; 1827 ds = dd->dd_desc;
1824 DPRINTF(sc, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n", 1828 DPRINTF(sc, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
1825 dd->dd_name, ds, (u32) dd->dd_desc_len, 1829 name, ds, (u32) dd->dd_desc_len,
1826 ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len); 1830 ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
1827 1831
1828 /* allocate buffers */ 1832 /* allocate buffers */
@@ -2021,7 +2025,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
2021 r = ath9k_hw_reset(sc->sc_ah, init_channel, false); 2025 r = ath9k_hw_reset(sc->sc_ah, init_channel, false);
2022 if (r) { 2026 if (r) {
2023 DPRINTF(sc, ATH_DBG_FATAL, 2027 DPRINTF(sc, ATH_DBG_FATAL,
2024 "Unable to reset hardware; reset status %u " 2028 "Unable to reset hardware; reset status %d "
2025 "(freq %u MHz)\n", r, 2029 "(freq %u MHz)\n", r,
2026 curchan->center_freq); 2030 curchan->center_freq);
2027 spin_unlock_bh(&sc->sc_resetlock); 2031 spin_unlock_bh(&sc->sc_resetlock);
@@ -2043,8 +2047,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
2043 * here except setup the interrupt mask. 2047 * here except setup the interrupt mask.
2044 */ 2048 */
2045 if (ath_startrecv(sc) != 0) { 2049 if (ath_startrecv(sc) != 0) {
2046 DPRINTF(sc, ATH_DBG_FATAL, 2050 DPRINTF(sc, ATH_DBG_FATAL, "Unable to start recv logic\n");
2047 "Unable to start recv logic\n");
2048 r = -EIO; 2051 r = -EIO;
2049 goto mutex_unlock; 2052 goto mutex_unlock;
2050 } 2053 }
@@ -2095,6 +2098,46 @@ static int ath9k_tx(struct ieee80211_hw *hw,
2095 goto exit; 2098 goto exit;
2096 } 2099 }
2097 2100
2101 if (sc->hw->conf.flags & IEEE80211_CONF_PS) {
2102 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2103 /*
2104 * mac80211 does not set PM field for normal data frames, so we
2105 * need to update that based on the current PS mode.
2106 */
2107 if (ieee80211_is_data(hdr->frame_control) &&
2108 !ieee80211_is_nullfunc(hdr->frame_control) &&
2109 !ieee80211_has_pm(hdr->frame_control)) {
2110 DPRINTF(sc, ATH_DBG_PS, "Add PM=1 for a TX frame "
2111 "while in PS mode\n");
2112 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
2113 }
2114 }
2115
2116 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
2117 /*
2118 * We are using PS-Poll and mac80211 can request TX while in
2119 * power save mode. Need to wake up hardware for the TX to be
2120 * completed and if needed, also for RX of buffered frames.
2121 */
2122 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2123 ath9k_ps_wakeup(sc);
2124 ath9k_hw_setrxabort(sc->sc_ah, 0);
2125 if (ieee80211_is_pspoll(hdr->frame_control)) {
2126 DPRINTF(sc, ATH_DBG_PS, "Sending PS-Poll to pick a "
2127 "buffered frame\n");
2128 sc->sc_flags |= SC_OP_WAIT_FOR_PSPOLL_DATA;
2129 } else {
2130 DPRINTF(sc, ATH_DBG_PS, "Wake up to complete TX\n");
2131 sc->sc_flags |= SC_OP_WAIT_FOR_TX_ACK;
2132 }
2133 /*
2134 * The actual restore operation will happen only after
2135 * the sc_flags bit is cleared. We are just dropping
2136 * the ps_usecount here.
2137 */
2138 ath9k_ps_restore(sc);
2139 }
2140
2098 memset(&txctl, 0, sizeof(struct ath_tx_control)); 2141 memset(&txctl, 0, sizeof(struct ath_tx_control));
2099 2142
2100 /* 2143 /*
@@ -2257,25 +2300,10 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
2257 sc->imask |= ATH9K_INT_TSFOOR; 2300 sc->imask |= ATH9K_INT_TSFOOR;
2258 } 2301 }
2259 2302
2260 /*
2261 * Some hardware processes the TIM IE and fires an
2262 * interrupt when the TIM bit is set. For hardware
2263 * that does, if not overridden by configuration,
2264 * enable the TIM interrupt when operating as station.
2265 */
2266 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_ENHANCEDPM) &&
2267 (conf->type == NL80211_IFTYPE_STATION) &&
2268 !sc->config.swBeaconProcess)
2269 sc->imask |= ATH9K_INT_TIM;
2270
2271 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); 2303 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
2272 2304
2273 if (conf->type == NL80211_IFTYPE_AP) { 2305 if (conf->type == NL80211_IFTYPE_AP)
2274 /* TODO: is this a suitable place to start ANI for AP mode? */ 2306 ath_start_ani(sc);
2275 /* Start ANI */
2276 mod_timer(&sc->ani.timer,
2277 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
2278 }
2279 2307
2280out: 2308out:
2281 mutex_unlock(&sc->mutex); 2309 mutex_unlock(&sc->mutex);
@@ -2326,26 +2354,36 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
2326 struct ath_wiphy *aphy = hw->priv; 2354 struct ath_wiphy *aphy = hw->priv;
2327 struct ath_softc *sc = aphy->sc; 2355 struct ath_softc *sc = aphy->sc;
2328 struct ieee80211_conf *conf = &hw->conf; 2356 struct ieee80211_conf *conf = &hw->conf;
2357 struct ath_hw *ah = sc->sc_ah;
2329 2358
2330 mutex_lock(&sc->mutex); 2359 mutex_lock(&sc->mutex);
2331 2360
2332 if (changed & IEEE80211_CONF_CHANGE_PS) { 2361 if (changed & IEEE80211_CONF_CHANGE_PS) {
2333 if (conf->flags & IEEE80211_CONF_PS) { 2362 if (conf->flags & IEEE80211_CONF_PS) {
2334 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) { 2363 if (!(ah->caps.hw_caps &
2335 sc->imask |= ATH9K_INT_TIM_TIMER; 2364 ATH9K_HW_CAP_AUTOSLEEP)) {
2336 ath9k_hw_set_interrupts(sc->sc_ah, 2365 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
2337 sc->imask); 2366 sc->imask |= ATH9K_INT_TIM_TIMER;
2367 ath9k_hw_set_interrupts(sc->sc_ah,
2368 sc->imask);
2369 }
2370 ath9k_hw_setrxabort(sc->sc_ah, 1);
2338 } 2371 }
2339 ath9k_hw_setrxabort(sc->sc_ah, 1);
2340 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP); 2372 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
2341 } else { 2373 } else {
2342 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); 2374 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
2343 ath9k_hw_setrxabort(sc->sc_ah, 0); 2375 if (!(ah->caps.hw_caps &
2344 sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON; 2376 ATH9K_HW_CAP_AUTOSLEEP)) {
2345 if (sc->imask & ATH9K_INT_TIM_TIMER) { 2377 ath9k_hw_setrxabort(sc->sc_ah, 0);
2346 sc->imask &= ~ATH9K_INT_TIM_TIMER; 2378 sc->sc_flags &= ~(SC_OP_WAIT_FOR_BEACON |
2347 ath9k_hw_set_interrupts(sc->sc_ah, 2379 SC_OP_WAIT_FOR_CAB |
2348 sc->imask); 2380 SC_OP_WAIT_FOR_PSPOLL_DATA |
2381 SC_OP_WAIT_FOR_TX_ACK);
2382 if (sc->imask & ATH9K_INT_TIM_TIMER) {
2383 sc->imask &= ~ATH9K_INT_TIM_TIMER;
2384 ath9k_hw_set_interrupts(sc->sc_ah,
2385 sc->imask);
2386 }
2349 } 2387 }
2350 } 2388 }
2351 } 2389 }
@@ -2387,114 +2425,6 @@ skip_chan_change:
2387 if (changed & IEEE80211_CONF_CHANGE_POWER) 2425 if (changed & IEEE80211_CONF_CHANGE_POWER)
2388 sc->config.txpowlimit = 2 * conf->power_level; 2426 sc->config.txpowlimit = 2 * conf->power_level;
2389 2427
2390 /*
2391 * The HW TSF has to be reset when the beacon interval changes.
2392 * We set the flag here, and ath_beacon_config_ap() would take this
2393 * into account when it gets called through the subsequent
2394 * config_interface() call - with IFCC_BEACON in the changed field.
2395 */
2396
2397 if (changed & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
2398 sc->sc_flags |= SC_OP_TSF_RESET;
2399
2400 mutex_unlock(&sc->mutex);
2401
2402 return 0;
2403}
2404
2405static int ath9k_config_interface(struct ieee80211_hw *hw,
2406 struct ieee80211_vif *vif,
2407 struct ieee80211_if_conf *conf)
2408{
2409 struct ath_wiphy *aphy = hw->priv;
2410 struct ath_softc *sc = aphy->sc;
2411 struct ath_hw *ah = sc->sc_ah;
2412 struct ath_vif *avp = (void *)vif->drv_priv;
2413 u32 rfilt = 0;
2414 int error, i;
2415
2416 mutex_lock(&sc->mutex);
2417
2418 /* TODO: Need to decide which hw opmode to use for multi-interface
2419 * cases */
2420 if (vif->type == NL80211_IFTYPE_AP &&
2421 ah->opmode != NL80211_IFTYPE_AP) {
2422 ah->opmode = NL80211_IFTYPE_STATION;
2423 ath9k_hw_setopmode(ah);
2424 memcpy(sc->curbssid, sc->sc_ah->macaddr, ETH_ALEN);
2425 sc->curaid = 0;
2426 ath9k_hw_write_associd(sc);
2427 /* Request full reset to get hw opmode changed properly */
2428 sc->sc_flags |= SC_OP_FULL_RESET;
2429 }
2430
2431 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
2432 !is_zero_ether_addr(conf->bssid)) {
2433 switch (vif->type) {
2434 case NL80211_IFTYPE_STATION:
2435 case NL80211_IFTYPE_ADHOC:
2436 case NL80211_IFTYPE_MESH_POINT:
2437 /* Set BSSID */
2438 memcpy(sc->curbssid, conf->bssid, ETH_ALEN);
2439 memcpy(avp->bssid, conf->bssid, ETH_ALEN);
2440 sc->curaid = 0;
2441 ath9k_hw_write_associd(sc);
2442
2443 /* Set aggregation protection mode parameters */
2444 sc->config.ath_aggr_prot = 0;
2445
2446 DPRINTF(sc, ATH_DBG_CONFIG,
2447 "RX filter 0x%x bssid %pM aid 0x%x\n",
2448 rfilt, sc->curbssid, sc->curaid);
2449
2450 /* need to reconfigure the beacon */
2451 sc->sc_flags &= ~SC_OP_BEACONS ;
2452
2453 break;
2454 default:
2455 break;
2456 }
2457 }
2458
2459 if ((vif->type == NL80211_IFTYPE_ADHOC) ||
2460 (vif->type == NL80211_IFTYPE_AP) ||
2461 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
2462 if ((conf->changed & IEEE80211_IFCC_BEACON) ||
2463 (conf->changed & IEEE80211_IFCC_BEACON_ENABLED &&
2464 conf->enable_beacon)) {
2465 /*
2466 * Allocate and setup the beacon frame.
2467 *
2468 * Stop any previous beacon DMA. This may be
2469 * necessary, for example, when an ibss merge
2470 * causes reconfiguration; we may be called
2471 * with beacon transmission active.
2472 */
2473 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2474
2475 error = ath_beacon_alloc(aphy, vif);
2476 if (error != 0) {
2477 mutex_unlock(&sc->mutex);
2478 return error;
2479 }
2480
2481 ath_beacon_config(sc, vif);
2482 }
2483 }
2484
2485 /* Check for WLAN_CAPABILITY_PRIVACY ? */
2486 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
2487 for (i = 0; i < IEEE80211_WEP_NKID; i++)
2488 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
2489 ath9k_hw_keysetmac(sc->sc_ah,
2490 (u16)i,
2491 sc->curbssid);
2492 }
2493
2494 /* Only legacy IBSS for now */
2495 if (vif->type == NL80211_IFTYPE_ADHOC)
2496 ath_update_chainmask(sc, 0);
2497
2498 mutex_unlock(&sc->mutex); 2428 mutex_unlock(&sc->mutex);
2499 2429
2500 return 0; 2430 return 0;
@@ -2523,8 +2453,10 @@ static void ath9k_configure_filter(struct ieee80211_hw *hw,
2523 *total_flags &= SUPPORTED_FILTERS; 2453 *total_flags &= SUPPORTED_FILTERS;
2524 2454
2525 sc->rx.rxfilter = *total_flags; 2455 sc->rx.rxfilter = *total_flags;
2456 ath9k_ps_wakeup(sc);
2526 rfilt = ath_calcrxfilter(sc); 2457 rfilt = ath_calcrxfilter(sc);
2527 ath9k_hw_setrxfilter(sc->sc_ah, rfilt); 2458 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
2459 ath9k_ps_restore(sc);
2528 2460
2529 DPRINTF(sc, ATH_DBG_CONFIG, "Set HW RX filter: 0x%x\n", sc->rx.rxfilter); 2461 DPRINTF(sc, ATH_DBG_CONFIG, "Set HW RX filter: 0x%x\n", sc->rx.rxfilter);
2530} 2462}
@@ -2562,6 +2494,8 @@ static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
2562 2494
2563 mutex_lock(&sc->mutex); 2495 mutex_lock(&sc->mutex);
2564 2496
2497 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
2498
2565 qi.tqi_aifs = params->aifs; 2499 qi.tqi_aifs = params->aifs;
2566 qi.tqi_cwmin = params->cw_min; 2500 qi.tqi_cwmin = params->cw_min;
2567 qi.tqi_cwmax = params->cw_max; 2501 qi.tqi_cwmax = params->cw_max;
@@ -2598,7 +2532,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
2598 2532
2599 mutex_lock(&sc->mutex); 2533 mutex_lock(&sc->mutex);
2600 ath9k_ps_wakeup(sc); 2534 ath9k_ps_wakeup(sc);
2601 DPRINTF(sc, ATH_DBG_KEYCACHE, "Set HW Key\n"); 2535 DPRINTF(sc, ATH_DBG_CONFIG, "Set HW Key\n");
2602 2536
2603 switch (cmd) { 2537 switch (cmd) {
2604 case SET_KEY: 2538 case SET_KEY:
@@ -2634,9 +2568,92 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2634{ 2568{
2635 struct ath_wiphy *aphy = hw->priv; 2569 struct ath_wiphy *aphy = hw->priv;
2636 struct ath_softc *sc = aphy->sc; 2570 struct ath_softc *sc = aphy->sc;
2571 struct ath_hw *ah = sc->sc_ah;
2572 struct ath_vif *avp = (void *)vif->drv_priv;
2573 u32 rfilt = 0;
2574 int error, i;
2637 2575
2638 mutex_lock(&sc->mutex); 2576 mutex_lock(&sc->mutex);
2639 2577
2578 /*
2579 * TODO: Need to decide which hw opmode to use for
2580 * multi-interface cases
2581 * XXX: This belongs into add_interface!
2582 */
2583 if (vif->type == NL80211_IFTYPE_AP &&
2584 ah->opmode != NL80211_IFTYPE_AP) {
2585 ah->opmode = NL80211_IFTYPE_STATION;
2586 ath9k_hw_setopmode(ah);
2587 memcpy(sc->curbssid, sc->sc_ah->macaddr, ETH_ALEN);
2588 sc->curaid = 0;
2589 ath9k_hw_write_associd(sc);
2590 /* Request full reset to get hw opmode changed properly */
2591 sc->sc_flags |= SC_OP_FULL_RESET;
2592 }
2593
2594 if ((changed & BSS_CHANGED_BSSID) &&
2595 !is_zero_ether_addr(bss_conf->bssid)) {
2596 switch (vif->type) {
2597 case NL80211_IFTYPE_STATION:
2598 case NL80211_IFTYPE_ADHOC:
2599 case NL80211_IFTYPE_MESH_POINT:
2600 /* Set BSSID */
2601 memcpy(sc->curbssid, bss_conf->bssid, ETH_ALEN);
2602 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
2603 sc->curaid = 0;
2604 ath9k_hw_write_associd(sc);
2605
2606 /* Set aggregation protection mode parameters */
2607 sc->config.ath_aggr_prot = 0;
2608
2609 DPRINTF(sc, ATH_DBG_CONFIG,
2610 "RX filter 0x%x bssid %pM aid 0x%x\n",
2611 rfilt, sc->curbssid, sc->curaid);
2612
2613 /* need to reconfigure the beacon */
2614 sc->sc_flags &= ~SC_OP_BEACONS ;
2615
2616 break;
2617 default:
2618 break;
2619 }
2620 }
2621
2622 if ((vif->type == NL80211_IFTYPE_ADHOC) ||
2623 (vif->type == NL80211_IFTYPE_AP) ||
2624 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
2625 if ((changed & BSS_CHANGED_BEACON) ||
2626 (changed & BSS_CHANGED_BEACON_ENABLED &&
2627 bss_conf->enable_beacon)) {
2628 /*
2629 * Allocate and setup the beacon frame.
2630 *
2631 * Stop any previous beacon DMA. This may be
2632 * necessary, for example, when an ibss merge
2633 * causes reconfiguration; we may be called
2634 * with beacon transmission active.
2635 */
2636 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2637
2638 error = ath_beacon_alloc(aphy, vif);
2639 if (!error)
2640 ath_beacon_config(sc, vif);
2641 }
2642 }
2643
2644 /* Check for WLAN_CAPABILITY_PRIVACY ? */
2645 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
2646 for (i = 0; i < IEEE80211_WEP_NKID; i++)
2647 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
2648 ath9k_hw_keysetmac(sc->sc_ah,
2649 (u16)i,
2650 sc->curbssid);
2651 }
2652
2653 /* Only legacy IBSS for now */
2654 if (vif->type == NL80211_IFTYPE_ADHOC)
2655 ath_update_chainmask(sc, 0);
2656
2640 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 2657 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2641 DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n", 2658 DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2642 bss_conf->use_short_preamble); 2659 bss_conf->use_short_preamble);
@@ -2662,6 +2679,18 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2662 ath9k_bss_assoc_info(sc, vif, bss_conf); 2679 ath9k_bss_assoc_info(sc, vif, bss_conf);
2663 } 2680 }
2664 2681
2682 /*
2683 * The HW TSF has to be reset when the beacon interval changes.
2684 * We set the flag here, and ath_beacon_config_ap() would take this
2685 * into account when it gets called through the subsequent
2686 * config_interface() call - with IFCC_BEACON in the changed field.
2687 */
2688
2689 if (changed & BSS_CHANGED_BEACON_INT) {
2690 sc->sc_flags |= SC_OP_TSF_RESET;
2691 sc->beacon_interval = bss_conf->beacon_int;
2692 }
2693
2665 mutex_unlock(&sc->mutex); 2694 mutex_unlock(&sc->mutex);
2666} 2695}
2667 2696
@@ -2771,6 +2800,7 @@ static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2771 mutex_lock(&sc->mutex); 2800 mutex_lock(&sc->mutex);
2772 aphy->state = ATH_WIPHY_ACTIVE; 2801 aphy->state = ATH_WIPHY_ACTIVE;
2773 sc->sc_flags &= ~SC_OP_SCANNING; 2802 sc->sc_flags &= ~SC_OP_SCANNING;
2803 sc->sc_flags |= SC_OP_FULL_RESET;
2774 mutex_unlock(&sc->mutex); 2804 mutex_unlock(&sc->mutex);
2775} 2805}
2776 2806
@@ -2781,7 +2811,6 @@ struct ieee80211_ops ath9k_ops = {
2781 .add_interface = ath9k_add_interface, 2811 .add_interface = ath9k_add_interface,
2782 .remove_interface = ath9k_remove_interface, 2812 .remove_interface = ath9k_remove_interface,
2783 .config = ath9k_config, 2813 .config = ath9k_config,
2784 .config_interface = ath9k_config_interface,
2785 .configure_filter = ath9k_configure_filter, 2814 .configure_filter = ath9k_configure_filter,
2786 .sta_notify = ath9k_sta_notify, 2815 .sta_notify = ath9k_sta_notify,
2787 .conf_tx = ath9k_conf_tx, 2816 .conf_tx = ath9k_conf_tx,
diff --git a/drivers/net/wireless/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 168411d322a2..168411d322a2 100644
--- a/drivers/net/wireless/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
diff --git a/drivers/net/wireless/ath9k/phy.c b/drivers/net/wireless/ath/ath9k/phy.c
index 8bcba906929a..aaa941561c36 100644
--- a/drivers/net/wireless/ath9k/phy.c
+++ b/drivers/net/wireless/ath/ath9k/phy.c
@@ -46,7 +46,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
46 channelSel = ((freq - 704) * 2 - 3040) / 10; 46 channelSel = ((freq - 704) * 2 - 3040) / 10;
47 bModeSynth = 1; 47 bModeSynth = 1;
48 } else { 48 } else {
49 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, 49 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
50 "Invalid channel %u MHz\n", freq); 50 "Invalid channel %u MHz\n", freq);
51 return false; 51 return false;
52 } 52 }
@@ -79,7 +79,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
79 channelSel = ath9k_hw_reverse_bits((freq - 4800) / 5, 8); 79 channelSel = ath9k_hw_reverse_bits((freq - 4800) / 5, 8);
80 aModeRefSel = ath9k_hw_reverse_bits(1, 2); 80 aModeRefSel = ath9k_hw_reverse_bits(1, 2);
81 } else { 81 } else {
82 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, 82 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
83 "Invalid channel %u MHz\n", freq); 83 "Invalid channel %u MHz\n", freq);
84 return false; 84 return false;
85 } 85 }
@@ -96,9 +96,8 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
96 return true; 96 return true;
97} 97}
98 98
99bool 99void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
100ath9k_hw_ar9280_set_channel(struct ath_hw *ah, 100 struct ath9k_channel *chan)
101 struct ath9k_channel *chan)
102{ 101{
103 u16 bMode, fracMode, aModeRefSel = 0; 102 u16 bMode, fracMode, aModeRefSel = 0;
104 u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; 103 u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
@@ -169,8 +168,6 @@ ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
169 168
170 ah->curchan = chan; 169 ah->curchan = chan;
171 ah->curchan_rad_index = -1; 170 ah->curchan_rad_index = -1;
172
173 return true;
174} 171}
175 172
176static void 173static void
diff --git a/drivers/net/wireless/ath9k/phy.h b/drivers/net/wireless/ath/ath9k/phy.h
index 0f7f8e0c9c95..c70f530642f6 100644
--- a/drivers/net/wireless/ath9k/phy.h
+++ b/drivers/net/wireless/ath/ath9k/phy.h
@@ -17,7 +17,7 @@
17#ifndef PHY_H 17#ifndef PHY_H
18#define PHY_H 18#define PHY_H
19 19
20bool ath9k_hw_ar9280_set_channel(struct ath_hw *ah, 20void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
21 struct ath9k_channel 21 struct ath9k_channel
22 *chan); 22 *chan);
23bool ath9k_hw_set_channel(struct ath_hw *ah, 23bool ath9k_hw_set_channel(struct ath_hw *ah,
@@ -556,9 +556,6 @@ bool ath9k_hw_init_rf(struct ath_hw *ah,
556 int r; \ 556 int r; \
557 for (r = 0; r < ((iniarray)->ia_rows); r++) { \ 557 for (r = 0; r < ((iniarray)->ia_rows); r++) { \
558 REG_WRITE(ah, INI_RA((iniarray), r, 0), (regData)[r]); \ 558 REG_WRITE(ah, INI_RA((iniarray), r, 0), (regData)[r]); \
559 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, \
560 "RF 0x%x V 0x%x\n", \
561 INI_RA((iniarray), r, 0), (regData)[r]); \
562 DO_DELAY(regWr); \ 559 DO_DELAY(regWr); \
563 } \ 560 } \
564 } while (0) 561 } while (0)
diff --git a/drivers/net/wireless/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c
index 824ccbb8b7b8..ba06e78b2f50 100644
--- a/drivers/net/wireless/ath9k/rc.c
+++ b/drivers/net/wireless/ath/ath9k/rc.c
@@ -17,7 +17,7 @@
17 17
18#include "ath9k.h" 18#include "ath9k.h"
19 19
20static struct ath_rate_table ar5416_11na_ratetable = { 20static const struct ath_rate_table ar5416_11na_ratetable = {
21 42, 21 42,
22 { 22 {
23 { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */ 23 { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
@@ -155,7 +155,7 @@ static struct ath_rate_table ar5416_11na_ratetable = {
155/* 4ms frame limit not used for NG mode. The values filled 155/* 4ms frame limit not used for NG mode. The values filled
156 * for HT are the 64K max aggregate limit */ 156 * for HT are the 64K max aggregate limit */
157 157
158static struct ath_rate_table ar5416_11ng_ratetable = { 158static const struct ath_rate_table ar5416_11ng_ratetable = {
159 46, 159 46,
160 { 160 {
161 { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */ 161 { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */
@@ -302,7 +302,7 @@ static struct ath_rate_table ar5416_11ng_ratetable = {
302 WLAN_RC_HT_FLAG, /* Phy rates allowed initially */ 302 WLAN_RC_HT_FLAG, /* Phy rates allowed initially */
303}; 303};
304 304
305static struct ath_rate_table ar5416_11a_ratetable = { 305static const struct ath_rate_table ar5416_11a_ratetable = {
306 8, 306 8,
307 { 307 {
308 { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */ 308 { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
@@ -335,7 +335,7 @@ static struct ath_rate_table ar5416_11a_ratetable = {
335 0, /* Phy rates allowed initially */ 335 0, /* Phy rates allowed initially */
336}; 336};
337 337
338static struct ath_rate_table ar5416_11g_ratetable = { 338static const struct ath_rate_table ar5416_11g_ratetable = {
339 12, 339 12,
340 { 340 {
341 { VALID, VALID, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */ 341 { VALID, VALID, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */
@@ -380,7 +380,7 @@ static struct ath_rate_table ar5416_11g_ratetable = {
380 0, /* Phy rates allowed initially */ 380 0, /* Phy rates allowed initially */
381}; 381};
382 382
383static struct ath_rate_table ar5416_11b_ratetable = { 383static const struct ath_rate_table ar5416_11b_ratetable = {
384 4, 384 4,
385 { 385 {
386 { VALID, VALID, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */ 386 { VALID, VALID, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */
@@ -420,7 +420,7 @@ static inline int8_t median(int8_t a, int8_t b, int8_t c)
420 } 420 }
421} 421}
422 422
423static void ath_rc_sort_validrates(struct ath_rate_table *rate_table, 423static void ath_rc_sort_validrates(const struct ath_rate_table *rate_table,
424 struct ath_rate_priv *ath_rc_priv) 424 struct ath_rate_priv *ath_rc_priv)
425{ 425{
426 u8 i, j, idx, idx_next; 426 u8 i, j, idx, idx_next;
@@ -461,10 +461,11 @@ static inline int ath_rc_isvalid_txmask(struct ath_rate_priv *ath_rc_priv,
461 return ath_rc_priv->valid_rate_index[index]; 461 return ath_rc_priv->valid_rate_index[index];
462} 462}
463 463
464static inline int ath_rc_get_nextvalid_txrate(struct ath_rate_table *rate_table, 464static inline
465 struct ath_rate_priv *ath_rc_priv, 465int ath_rc_get_nextvalid_txrate(const struct ath_rate_table *rate_table,
466 u8 cur_valid_txrate, 466 struct ath_rate_priv *ath_rc_priv,
467 u8 *next_idx) 467 u8 cur_valid_txrate,
468 u8 *next_idx)
468{ 469{
469 u8 i; 470 u8 i;
470 471
@@ -500,7 +501,7 @@ static int ath_rc_valid_phyrate(u32 phy, u32 capflag, int ignore_cw)
500} 501}
501 502
502static inline int 503static inline int
503ath_rc_get_nextlowervalid_txrate(struct ath_rate_table *rate_table, 504ath_rc_get_nextlowervalid_txrate(const struct ath_rate_table *rate_table,
504 struct ath_rate_priv *ath_rc_priv, 505 struct ath_rate_priv *ath_rc_priv,
505 u8 cur_valid_txrate, u8 *next_idx) 506 u8 cur_valid_txrate, u8 *next_idx)
506{ 507{
@@ -517,14 +518,14 @@ ath_rc_get_nextlowervalid_txrate(struct ath_rate_table *rate_table,
517} 518}
518 519
519static u8 ath_rc_init_validrates(struct ath_rate_priv *ath_rc_priv, 520static u8 ath_rc_init_validrates(struct ath_rate_priv *ath_rc_priv,
520 struct ath_rate_table *rate_table, 521 const struct ath_rate_table *rate_table,
521 u32 capflag) 522 u32 capflag)
522{ 523{
523 u8 i, hi = 0; 524 u8 i, hi = 0;
524 u32 valid; 525 u32 valid;
525 526
526 for (i = 0; i < rate_table->rate_cnt; i++) { 527 for (i = 0; i < rate_table->rate_cnt; i++) {
527 valid = (ath_rc_priv->single_stream ? 528 valid = (!(ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG) ?
528 rate_table->info[i].valid_single_stream : 529 rate_table->info[i].valid_single_stream :
529 rate_table->info[i].valid); 530 rate_table->info[i].valid);
530 if (valid == 1) { 531 if (valid == 1) {
@@ -547,7 +548,7 @@ static u8 ath_rc_init_validrates(struct ath_rate_priv *ath_rc_priv,
547} 548}
548 549
549static u8 ath_rc_setvalid_rates(struct ath_rate_priv *ath_rc_priv, 550static u8 ath_rc_setvalid_rates(struct ath_rate_priv *ath_rc_priv,
550 struct ath_rate_table *rate_table, 551 const struct ath_rate_table *rate_table,
551 struct ath_rateset *rateset, 552 struct ath_rateset *rateset,
552 u32 capflag) 553 u32 capflag)
553{ 554{
@@ -557,9 +558,9 @@ static u8 ath_rc_setvalid_rates(struct ath_rate_priv *ath_rc_priv,
557 for (i = 0; i < rateset->rs_nrates; i++) { 558 for (i = 0; i < rateset->rs_nrates; i++) {
558 for (j = 0; j < rate_table->rate_cnt; j++) { 559 for (j = 0; j < rate_table->rate_cnt; j++) {
559 u32 phy = rate_table->info[j].phy; 560 u32 phy = rate_table->info[j].phy;
560 u32 valid = (ath_rc_priv->single_stream ? 561 u32 valid = (!(ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG) ?
561 rate_table->info[j].valid_single_stream : 562 rate_table->info[j].valid_single_stream :
562 rate_table->info[j].valid); 563 rate_table->info[j].valid);
563 u8 rate = rateset->rs_rates[i]; 564 u8 rate = rateset->rs_rates[i];
564 u8 dot11rate = rate_table->info[j].dot11rate; 565 u8 dot11rate = rate_table->info[j].dot11rate;
565 566
@@ -592,7 +593,7 @@ static u8 ath_rc_setvalid_rates(struct ath_rate_priv *ath_rc_priv,
592} 593}
593 594
594static u8 ath_rc_setvalid_htrates(struct ath_rate_priv *ath_rc_priv, 595static u8 ath_rc_setvalid_htrates(struct ath_rate_priv *ath_rc_priv,
595 struct ath_rate_table *rate_table, 596 const struct ath_rate_table *rate_table,
596 u8 *mcs_set, u32 capflag) 597 u8 *mcs_set, u32 capflag)
597{ 598{
598 struct ath_rateset *rateset = (struct ath_rateset *)mcs_set; 599 struct ath_rateset *rateset = (struct ath_rateset *)mcs_set;
@@ -603,7 +604,7 @@ static u8 ath_rc_setvalid_htrates(struct ath_rate_priv *ath_rc_priv,
603 for (i = 0; i < rateset->rs_nrates; i++) { 604 for (i = 0; i < rateset->rs_nrates; i++) {
604 for (j = 0; j < rate_table->rate_cnt; j++) { 605 for (j = 0; j < rate_table->rate_cnt; j++) {
605 u32 phy = rate_table->info[j].phy; 606 u32 phy = rate_table->info[j].phy;
606 u32 valid = (ath_rc_priv->single_stream ? 607 u32 valid = (!(ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG) ?
607 rate_table->info[j].valid_single_stream : 608 rate_table->info[j].valid_single_stream :
608 rate_table->info[j].valid); 609 rate_table->info[j].valid);
609 u8 rate = rateset->rs_rates[i]; 610 u8 rate = rateset->rs_rates[i];
@@ -630,7 +631,7 @@ static u8 ath_rc_setvalid_htrates(struct ath_rate_priv *ath_rc_priv,
630 631
631static u8 ath_rc_ratefind_ht(struct ath_softc *sc, 632static u8 ath_rc_ratefind_ht(struct ath_softc *sc,
632 struct ath_rate_priv *ath_rc_priv, 633 struct ath_rate_priv *ath_rc_priv,
633 struct ath_rate_table *rate_table, 634 const struct ath_rate_table *rate_table,
634 int *is_probing) 635 int *is_probing)
635{ 636{
636 u32 dt, best_thruput, this_thruput, now_msec; 637 u32 dt, best_thruput, this_thruput, now_msec;
@@ -740,14 +741,15 @@ static u8 ath_rc_ratefind_ht(struct ath_softc *sc,
740 if (rate > (ath_rc_priv->rate_table_size - 1)) 741 if (rate > (ath_rc_priv->rate_table_size - 1))
741 rate = ath_rc_priv->rate_table_size - 1; 742 rate = ath_rc_priv->rate_table_size - 1;
742 743
743 ASSERT((rate_table->info[rate].valid && !ath_rc_priv->single_stream) || 744 ASSERT((rate_table->info[rate].valid &&
745 (ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG)) ||
744 (rate_table->info[rate].valid_single_stream && 746 (rate_table->info[rate].valid_single_stream &&
745 ath_rc_priv->single_stream)); 747 !(ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG)));
746 748
747 return rate; 749 return rate;
748} 750}
749 751
750static void ath_rc_rate_set_series(struct ath_rate_table *rate_table, 752static void ath_rc_rate_set_series(const struct ath_rate_table *rate_table,
751 struct ieee80211_tx_rate *rate, 753 struct ieee80211_tx_rate *rate,
752 struct ieee80211_tx_rate_control *txrc, 754 struct ieee80211_tx_rate_control *txrc,
753 u8 tries, u8 rix, int rtsctsenable) 755 u8 tries, u8 rix, int rtsctsenable)
@@ -768,7 +770,7 @@ static void ath_rc_rate_set_series(struct ath_rate_table *rate_table,
768} 770}
769 771
770static void ath_rc_rate_set_rtscts(struct ath_softc *sc, 772static void ath_rc_rate_set_rtscts(struct ath_softc *sc,
771 struct ath_rate_table *rate_table, 773 const struct ath_rate_table *rate_table,
772 struct ieee80211_tx_info *tx_info) 774 struct ieee80211_tx_info *tx_info)
773{ 775{
774 struct ieee80211_tx_rate *rates = tx_info->control.rates; 776 struct ieee80211_tx_rate *rates = tx_info->control.rates;
@@ -806,12 +808,12 @@ static void ath_rc_rate_set_rtscts(struct ath_softc *sc,
806 808
807static u8 ath_rc_rate_getidx(struct ath_softc *sc, 809static u8 ath_rc_rate_getidx(struct ath_softc *sc,
808 struct ath_rate_priv *ath_rc_priv, 810 struct ath_rate_priv *ath_rc_priv,
809 struct ath_rate_table *rate_table, 811 const struct ath_rate_table *rate_table,
810 u8 rix, u16 stepdown, 812 u8 rix, u16 stepdown,
811 u16 min_rate) 813 u16 min_rate)
812{ 814{
813 u32 j; 815 u32 j;
814 u8 nextindex; 816 u8 nextindex = 0;
815 817
816 if (min_rate) { 818 if (min_rate) {
817 for (j = RATE_TABLE_SIZE; j > 0; j--) { 819 for (j = RATE_TABLE_SIZE; j > 0; j--) {
@@ -837,7 +839,7 @@ static void ath_rc_ratefind(struct ath_softc *sc,
837 struct ath_rate_priv *ath_rc_priv, 839 struct ath_rate_priv *ath_rc_priv,
838 struct ieee80211_tx_rate_control *txrc) 840 struct ieee80211_tx_rate_control *txrc)
839{ 841{
840 struct ath_rate_table *rate_table; 842 const struct ath_rate_table *rate_table;
841 struct sk_buff *skb = txrc->skb; 843 struct sk_buff *skb = txrc->skb;
842 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 844 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
843 struct ieee80211_tx_rate *rates = tx_info->control.rates; 845 struct ieee80211_tx_rate *rates = tx_info->control.rates;
@@ -936,7 +938,7 @@ static void ath_rc_ratefind(struct ath_softc *sc,
936} 938}
937 939
938static bool ath_rc_update_per(struct ath_softc *sc, 940static bool ath_rc_update_per(struct ath_softc *sc,
939 struct ath_rate_table *rate_table, 941 const struct ath_rate_table *rate_table,
940 struct ath_rate_priv *ath_rc_priv, 942 struct ath_rate_priv *ath_rc_priv,
941 struct ath_tx_info_priv *tx_info_priv, 943 struct ath_tx_info_priv *tx_info_priv,
942 int tx_rate, int xretries, int retries, 944 int tx_rate, int xretries, int retries,
@@ -1141,7 +1143,7 @@ static void ath_rc_update_ht(struct ath_softc *sc,
1141 int rate; 1143 int rate;
1142 u8 last_per; 1144 u8 last_per;
1143 bool state_change = false; 1145 bool state_change = false;
1144 struct ath_rate_table *rate_table = sc->cur_rate_table; 1146 const struct ath_rate_table *rate_table = sc->cur_rate_table;
1145 int size = ath_rc_priv->rate_table_size; 1147 int size = ath_rc_priv->rate_table_size;
1146 1148
1147 if ((tx_rate < 0) || (tx_rate > rate_table->rate_cnt)) 1149 if ((tx_rate < 0) || (tx_rate > rate_table->rate_cnt))
@@ -1275,7 +1277,7 @@ static void ath_rc_update_ht(struct ath_softc *sc,
1275#undef CHK_RSSI 1277#undef CHK_RSSI
1276} 1278}
1277 1279
1278static int ath_rc_get_rateindex(struct ath_rate_table *rate_table, 1280static int ath_rc_get_rateindex(const struct ath_rate_table *rate_table,
1279 struct ieee80211_tx_rate *rate) 1281 struct ieee80211_tx_rate *rate)
1280{ 1282{
1281 int rix; 1283 int rix;
@@ -1299,7 +1301,7 @@ static void ath_rc_tx_status(struct ath_softc *sc,
1299 int final_ts_idx, int xretries, int long_retry) 1301 int final_ts_idx, int xretries, int long_retry)
1300{ 1302{
1301 struct ath_tx_info_priv *tx_info_priv = ATH_TX_INFO_PRIV(tx_info); 1303 struct ath_tx_info_priv *tx_info_priv = ATH_TX_INFO_PRIV(tx_info);
1302 struct ath_rate_table *rate_table; 1304 const struct ath_rate_table *rate_table;
1303 struct ieee80211_tx_rate *rates = tx_info->status.rates; 1305 struct ieee80211_tx_rate *rates = tx_info->status.rates;
1304 u8 flags; 1306 u8 flags;
1305 u32 i = 0, rix; 1307 u32 i = 0, rix;
@@ -1320,7 +1322,7 @@ static void ath_rc_tx_status(struct ath_softc *sc,
1320 * 40 to 20 => don't update */ 1322 * 40 to 20 => don't update */
1321 1323
1322 if ((flags & IEEE80211_TX_RC_40_MHZ_WIDTH) && 1324 if ((flags & IEEE80211_TX_RC_40_MHZ_WIDTH) &&
1323 (ath_rc_priv->rc_phy_mode != WLAN_RC_40_FLAG)) 1325 !(ath_rc_priv->ht_cap & WLAN_RC_40_FLAG))
1324 return; 1326 return;
1325 1327
1326 rix = ath_rc_get_rateindex(rate_table, &rates[i]); 1328 rix = ath_rc_get_rateindex(rate_table, &rates[i]);
@@ -1345,18 +1347,19 @@ static void ath_rc_tx_status(struct ath_softc *sc,
1345 1347
1346 /* If HT40 and we have switched mode from 40 to 20 => don't update */ 1348 /* If HT40 and we have switched mode from 40 to 20 => don't update */
1347 if ((flags & IEEE80211_TX_RC_40_MHZ_WIDTH) && 1349 if ((flags & IEEE80211_TX_RC_40_MHZ_WIDTH) &&
1348 (ath_rc_priv->rc_phy_mode != WLAN_RC_40_FLAG)) { 1350 !(ath_rc_priv->ht_cap & WLAN_RC_40_FLAG))
1349 return; 1351 return;
1350 }
1351 1352
1352 rix = ath_rc_get_rateindex(rate_table, &rates[i]); 1353 rix = ath_rc_get_rateindex(rate_table, &rates[i]);
1353 ath_rc_update_ht(sc, ath_rc_priv, tx_info_priv, rix, 1354 ath_rc_update_ht(sc, ath_rc_priv, tx_info_priv, rix,
1354 xretries, long_retry); 1355 xretries, long_retry);
1355} 1356}
1356 1357
1357static struct ath_rate_table *ath_choose_rate_table(struct ath_softc *sc, 1358static const
1358 enum ieee80211_band band, 1359struct ath_rate_table *ath_choose_rate_table(struct ath_softc *sc,
1359 bool is_ht, bool is_cw_40) 1360 enum ieee80211_band band,
1361 bool is_ht,
1362 bool is_cw_40)
1360{ 1363{
1361 int mode = 0; 1364 int mode = 0;
1362 1365
@@ -1390,7 +1393,7 @@ static void ath_rc_init(struct ath_softc *sc,
1390 struct ath_rate_priv *ath_rc_priv, 1393 struct ath_rate_priv *ath_rc_priv,
1391 struct ieee80211_supported_band *sband, 1394 struct ieee80211_supported_band *sband,
1392 struct ieee80211_sta *sta, 1395 struct ieee80211_sta *sta,
1393 struct ath_rate_table *rate_table) 1396 const struct ath_rate_table *rate_table)
1394{ 1397{
1395 struct ath_rateset *rateset = &ath_rc_priv->neg_rates; 1398 struct ath_rateset *rateset = &ath_rc_priv->neg_rates;
1396 u8 *ht_mcs = (u8 *)&ath_rc_priv->neg_ht_rates; 1399 u8 *ht_mcs = (u8 *)&ath_rc_priv->neg_ht_rates;
@@ -1420,10 +1423,6 @@ static void ath_rc_init(struct ath_softc *sc,
1420 ath_rc_priv->valid_phy_rateidx[i][j] = 0; 1423 ath_rc_priv->valid_phy_rateidx[i][j] = 0;
1421 ath_rc_priv->valid_phy_ratecnt[i] = 0; 1424 ath_rc_priv->valid_phy_ratecnt[i] = 0;
1422 } 1425 }
1423 ath_rc_priv->rc_phy_mode = ath_rc_priv->ht_cap & WLAN_RC_40_FLAG;
1424
1425 /* Set stream capability */
1426 ath_rc_priv->single_stream = (ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG) ? 0 : 1;
1427 1426
1428 if (!rateset->rs_nrates) { 1427 if (!rateset->rs_nrates) {
1429 /* No working rate, just initialize valid rates */ 1428 /* No working rate, just initialize valid rates */
@@ -1572,12 +1571,13 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta,
1572 struct ath_rate_priv *ath_rc_priv = priv_sta; 1571 struct ath_rate_priv *ath_rc_priv = priv_sta;
1573 __le16 fc = hdr->frame_control; 1572 __le16 fc = hdr->frame_control;
1574 1573
1575 /* lowest rate for management and multicast/broadcast frames */ 1574 /* lowest rate for management and NO_ACK frames */
1576 if (!ieee80211_is_data(fc) || is_multicast_ether_addr(hdr->addr1) || 1575 if (!ieee80211_is_data(fc) ||
1577 !sta) { 1576 tx_info->flags & IEEE80211_TX_CTL_NO_ACK || !sta) {
1578 tx_info->control.rates[0].idx = rate_lowest_index(sband, sta); 1577 tx_info->control.rates[0].idx = rate_lowest_index(sband, sta);
1579 tx_info->control.rates[0].count = 1578 tx_info->control.rates[0].count =
1580 is_multicast_ether_addr(hdr->addr1) ? 1 : ATH_MGT_TXMAXTRY; 1579 (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) ?
1580 1 : ATH_MGT_TXMAXTRY;
1581 return; 1581 return;
1582 } 1582 }
1583 1583
@@ -1590,7 +1590,7 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband,
1590{ 1590{
1591 struct ath_softc *sc = priv; 1591 struct ath_softc *sc = priv;
1592 struct ath_rate_priv *ath_rc_priv = priv_sta; 1592 struct ath_rate_priv *ath_rc_priv = priv_sta;
1593 struct ath_rate_table *rate_table = NULL; 1593 const struct ath_rate_table *rate_table = NULL;
1594 bool is_cw40, is_sgi40; 1594 bool is_cw40, is_sgi40;
1595 int i, j = 0; 1595 int i, j = 0;
1596 1596
@@ -1639,7 +1639,7 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,
1639{ 1639{
1640 struct ath_softc *sc = priv; 1640 struct ath_softc *sc = priv;
1641 struct ath_rate_priv *ath_rc_priv = priv_sta; 1641 struct ath_rate_priv *ath_rc_priv = priv_sta;
1642 struct ath_rate_table *rate_table = NULL; 1642 const struct ath_rate_table *rate_table = NULL;
1643 bool oper_cw40 = false, oper_sgi40; 1643 bool oper_cw40 = false, oper_sgi40;
1644 bool local_cw40 = (ath_rc_priv->ht_cap & WLAN_RC_40_FLAG) ? 1644 bool local_cw40 = (ath_rc_priv->ht_cap & WLAN_RC_40_FLAG) ?
1645 true : false; 1645 true : false;
diff --git a/drivers/net/wireless/ath9k/rc.h b/drivers/net/wireless/ath/ath9k/rc.h
index 199a3ce57d64..e3abd76103fd 100644
--- a/drivers/net/wireless/ath9k/rc.h
+++ b/drivers/net/wireless/ath/ath9k/rc.h
@@ -24,7 +24,6 @@ struct ath_softc;
24#define ATH_RATE_MAX 30 24#define ATH_RATE_MAX 30
25#define RATE_TABLE_SIZE 64 25#define RATE_TABLE_SIZE 64
26#define MAX_TX_RATE_PHY 48 26#define MAX_TX_RATE_PHY 48
27#define WLAN_CTRL_FRAME_SIZE (2+2+6+4)
28 27
29/* VALID_ALL - valid for 20/40/Legacy, 28/* VALID_ALL - valid for 20/40/Legacy,
30 * VALID - Legacy only, 29 * VALID - Legacy only,
@@ -158,7 +157,6 @@ struct ath_rateset {
158 * @probe_interval: interval for ratectrl to probe for other rates 157 * @probe_interval: interval for ratectrl to probe for other rates
159 * @prev_data_rix: rate idx of last data frame 158 * @prev_data_rix: rate idx of last data frame
160 * @ht_cap: HT capabilities 159 * @ht_cap: HT capabilities
161 * @single_stream: When TRUE, only single TX stream possible
162 * @neg_rates: Negotatied rates 160 * @neg_rates: Negotatied rates
163 * @neg_ht_rates: Negotiated HT rates 161 * @neg_ht_rates: Negotiated HT rates
164 */ 162 */
@@ -176,10 +174,8 @@ struct ath_rate_priv {
176 u8 max_valid_rate; 174 u8 max_valid_rate;
177 u8 valid_rate_index[RATE_TABLE_SIZE]; 175 u8 valid_rate_index[RATE_TABLE_SIZE];
178 u8 ht_cap; 176 u8 ht_cap;
179 u8 single_stream;
180 u8 valid_phy_ratecnt[WLAN_RC_PHY_MAX]; 177 u8 valid_phy_ratecnt[WLAN_RC_PHY_MAX];
181 u8 valid_phy_rateidx[WLAN_RC_PHY_MAX][RATE_TABLE_SIZE]; 178 u8 valid_phy_rateidx[WLAN_RC_PHY_MAX][RATE_TABLE_SIZE];
182 u8 rc_phy_mode;
183 u8 rate_max_phy; 179 u8 rate_max_phy;
184 u32 rssi_time; 180 u32 rssi_time;
185 u32 rssi_down_time; 181 u32 rssi_down_time;
diff --git a/drivers/net/wireless/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c
index dd1f30156740..5014a19b0f75 100644
--- a/drivers/net/wireless/ath9k/recv.c
+++ b/drivers/net/wireless/ath/ath9k/recv.c
@@ -283,54 +283,51 @@ int ath_rx_init(struct ath_softc *sc, int nbufs)
283 struct ath_buf *bf; 283 struct ath_buf *bf;
284 int error = 0; 284 int error = 0;
285 285
286 do { 286 spin_lock_init(&sc->rx.rxflushlock);
287 spin_lock_init(&sc->rx.rxflushlock); 287 sc->sc_flags &= ~SC_OP_RXFLUSH;
288 sc->sc_flags &= ~SC_OP_RXFLUSH; 288 spin_lock_init(&sc->rx.rxbuflock);
289 spin_lock_init(&sc->rx.rxbuflock);
290
291 sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
292 min(sc->cachelsz,
293 (u16)64));
294 289
295 DPRINTF(sc, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n", 290 sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
296 sc->cachelsz, sc->rx.bufsize); 291 min(sc->cachelsz, (u16)64));
297 292
298 /* Initialize rx descriptors */ 293 DPRINTF(sc, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
294 sc->cachelsz, sc->rx.bufsize);
299 295
300 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf, 296 /* Initialize rx descriptors */
301 "rx", nbufs, 1);
302 if (error != 0) {
303 DPRINTF(sc, ATH_DBG_FATAL,
304 "failed to allocate rx descriptors: %d\n", error);
305 break;
306 }
307 297
308 list_for_each_entry(bf, &sc->rx.rxbuf, list) { 298 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
309 skb = ath_rxbuf_alloc(sc, sc->rx.bufsize, GFP_KERNEL); 299 "rx", nbufs, 1);
310 if (skb == NULL) { 300 if (error != 0) {
311 error = -ENOMEM; 301 DPRINTF(sc, ATH_DBG_FATAL,
312 break; 302 "failed to allocate rx descriptors: %d\n", error);
313 } 303 goto err;
304 }
314 305
315 bf->bf_mpdu = skb; 306 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
316 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, 307 skb = ath_rxbuf_alloc(sc, sc->rx.bufsize, GFP_KERNEL);
317 sc->rx.bufsize, 308 if (skb == NULL) {
318 DMA_FROM_DEVICE); 309 error = -ENOMEM;
319 if (unlikely(dma_mapping_error(sc->dev, 310 goto err;
320 bf->bf_buf_addr))) {
321 dev_kfree_skb_any(skb);
322 bf->bf_mpdu = NULL;
323 DPRINTF(sc, ATH_DBG_CONFIG,
324 "dma_mapping_error() on RX init\n");
325 error = -ENOMEM;
326 break;
327 }
328 bf->bf_dmacontext = bf->bf_buf_addr;
329 } 311 }
330 sc->rx.rxlink = NULL;
331 312
332 } while (0); 313 bf->bf_mpdu = skb;
314 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
315 sc->rx.bufsize,
316 DMA_FROM_DEVICE);
317 if (unlikely(dma_mapping_error(sc->dev,
318 bf->bf_buf_addr))) {
319 dev_kfree_skb_any(skb);
320 bf->bf_mpdu = NULL;
321 DPRINTF(sc, ATH_DBG_FATAL,
322 "dma_mapping_error() on RX init\n");
323 error = -ENOMEM;
324 goto err;
325 }
326 bf->bf_dmacontext = bf->bf_buf_addr;
327 }
328 sc->rx.rxlink = NULL;
333 329
330err:
334 if (error) 331 if (error)
335 ath_rx_cleanup(sc); 332 ath_rx_cleanup(sc);
336 333
@@ -345,10 +342,8 @@ void ath_rx_cleanup(struct ath_softc *sc)
345 list_for_each_entry(bf, &sc->rx.rxbuf, list) { 342 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
346 skb = bf->bf_mpdu; 343 skb = bf->bf_mpdu;
347 if (skb) { 344 if (skb) {
348 dma_unmap_single(sc->dev, 345 dma_unmap_single(sc->dev, bf->bf_buf_addr,
349 bf->bf_buf_addr, 346 sc->rx.bufsize, DMA_FROM_DEVICE);
350 sc->rx.bufsize,
351 DMA_FROM_DEVICE);
352 dev_kfree_skb(skb); 347 dev_kfree_skb(skb);
353 } 348 }
354 } 349 }
@@ -478,6 +473,159 @@ void ath_flushrecv(struct ath_softc *sc)
478 spin_unlock_bh(&sc->rx.rxflushlock); 473 spin_unlock_bh(&sc->rx.rxflushlock);
479} 474}
480 475
476static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
477{
478 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
479 struct ieee80211_mgmt *mgmt;
480 u8 *pos, *end, id, elen;
481 struct ieee80211_tim_ie *tim;
482
483 mgmt = (struct ieee80211_mgmt *)skb->data;
484 pos = mgmt->u.beacon.variable;
485 end = skb->data + skb->len;
486
487 while (pos + 2 < end) {
488 id = *pos++;
489 elen = *pos++;
490 if (pos + elen > end)
491 break;
492
493 if (id == WLAN_EID_TIM) {
494 if (elen < sizeof(*tim))
495 break;
496 tim = (struct ieee80211_tim_ie *) pos;
497 if (tim->dtim_count != 0)
498 break;
499 return tim->bitmap_ctrl & 0x01;
500 }
501
502 pos += elen;
503 }
504
505 return false;
506}
507
508static void ath_rx_ps_back_to_sleep(struct ath_softc *sc)
509{
510 sc->sc_flags &= ~(SC_OP_WAIT_FOR_BEACON | SC_OP_WAIT_FOR_CAB);
511}
512
513static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
514{
515 struct ieee80211_mgmt *mgmt;
516
517 if (skb->len < 24 + 8 + 2 + 2)
518 return;
519
520 mgmt = (struct ieee80211_mgmt *)skb->data;
521 if (memcmp(sc->curbssid, mgmt->bssid, ETH_ALEN) != 0)
522 return; /* not from our current AP */
523
524 if (sc->sc_flags & SC_OP_BEACON_SYNC) {
525 sc->sc_flags &= ~SC_OP_BEACON_SYNC;
526 DPRINTF(sc, ATH_DBG_PS, "Reconfigure Beacon timers based on "
527 "timestamp from the AP\n");
528 ath_beacon_config(sc, NULL);
529 }
530
531 if (!(sc->hw->conf.flags & IEEE80211_CONF_PS)) {
532 /* We are not in PS mode anymore; remain awake */
533 DPRINTF(sc, ATH_DBG_PS, "Not in PS mode anymore, remain "
534 "awake\n");
535 sc->sc_flags &= ~(SC_OP_WAIT_FOR_BEACON | SC_OP_WAIT_FOR_CAB);
536 return;
537 }
538
539 if (ath_beacon_dtim_pending_cab(skb)) {
540 /*
541 * Remain awake waiting for buffered broadcast/multicast
542 * frames.
543 */
544 DPRINTF(sc, ATH_DBG_PS, "Received DTIM beacon indicating "
545 "buffered broadcast/multicast frame(s)\n");
546 sc->sc_flags |= SC_OP_WAIT_FOR_CAB;
547 return;
548 }
549
550 if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
551 /*
552 * This can happen if a broadcast frame is dropped or the AP
553 * fails to send a frame indicating that all CAB frames have
554 * been delivered.
555 */
556 DPRINTF(sc, ATH_DBG_PS, "PS wait for CAB frames timed out\n");
557 }
558
559 /* No more broadcast/multicast frames to be received at this point. */
560 ath_rx_ps_back_to_sleep(sc);
561}
562
563static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
564{
565 struct ieee80211_hdr *hdr;
566
567 hdr = (struct ieee80211_hdr *)skb->data;
568
569 /* Process Beacon and CAB receive in PS state */
570 if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
571 ieee80211_is_beacon(hdr->frame_control))
572 ath_rx_ps_beacon(sc, skb);
573 else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
574 (ieee80211_is_data(hdr->frame_control) ||
575 ieee80211_is_action(hdr->frame_control)) &&
576 is_multicast_ether_addr(hdr->addr1) &&
577 !ieee80211_has_moredata(hdr->frame_control)) {
578 DPRINTF(sc, ATH_DBG_PS, "All PS CAB frames received, back to "
579 "sleep\n");
580 /*
581 * No more broadcast/multicast frames to be received at this
582 * point.
583 */
584 ath_rx_ps_back_to_sleep(sc);
585 } else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
586 !is_multicast_ether_addr(hdr->addr1) &&
587 !ieee80211_has_morefrags(hdr->frame_control)) {
588 sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
589 DPRINTF(sc, ATH_DBG_PS, "Going back to sleep after having "
590 "received PS-Poll data (0x%x)\n",
591 sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
592 SC_OP_WAIT_FOR_CAB |
593 SC_OP_WAIT_FOR_PSPOLL_DATA |
594 SC_OP_WAIT_FOR_TX_ACK));
595 }
596}
597
598static void ath_rx_send_to_mac80211(struct ath_softc *sc, struct sk_buff *skb,
599 struct ieee80211_rx_status *rx_status)
600{
601 struct ieee80211_hdr *hdr;
602
603 hdr = (struct ieee80211_hdr *)skb->data;
604
605 /* Send the frame to mac80211 */
606 if (is_multicast_ether_addr(hdr->addr1)) {
607 int i;
608 /*
609 * Deliver broadcast/multicast frames to all suitable
610 * virtual wiphys.
611 */
612 /* TODO: filter based on channel configuration */
613 for (i = 0; i < sc->num_sec_wiphy; i++) {
614 struct ath_wiphy *aphy = sc->sec_wiphy[i];
615 struct sk_buff *nskb;
616 if (aphy == NULL)
617 continue;
618 nskb = skb_copy(skb, GFP_ATOMIC);
619 if (nskb)
620 __ieee80211_rx(aphy->hw, nskb, rx_status);
621 }
622 __ieee80211_rx(sc->hw, skb, rx_status);
623 } else {
624 /* Deliver unicast frames based on receiver address */
625 __ieee80211_rx(ath_get_virt_hw(sc, hdr), skb, rx_status);
626 }
627}
628
481int ath_rx_tasklet(struct ath_softc *sc, int flush) 629int ath_rx_tasklet(struct ath_softc *sc, int flush)
482{ 630{
483#define PA2DESC(_sc, _pa) \ 631#define PA2DESC(_sc, _pa) \
@@ -627,7 +775,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
627 775
628 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) { 776 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
629 rx_status.flag |= RX_FLAG_DECRYPTED; 777 rx_status.flag |= RX_FLAG_DECRYPTED;
630 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED) 778 } else if (ieee80211_has_protected(fc)
631 && !decrypt_error && skb->len >= hdrlen + 4) { 779 && !decrypt_error && skb->len >= hdrlen + 4) {
632 keyix = skb->data[hdrlen + 3] >> 6; 780 keyix = skb->data[hdrlen + 3] >> 6;
633 781
@@ -636,36 +784,11 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
636 } 784 }
637 if (ah->sw_mgmt_crypto && 785 if (ah->sw_mgmt_crypto &&
638 (rx_status.flag & RX_FLAG_DECRYPTED) && 786 (rx_status.flag & RX_FLAG_DECRYPTED) &&
639 ieee80211_is_mgmt(hdr->frame_control)) { 787 ieee80211_is_mgmt(fc)) {
640 /* Use software decrypt for management frames. */ 788 /* Use software decrypt for management frames. */
641 rx_status.flag &= ~RX_FLAG_DECRYPTED; 789 rx_status.flag &= ~RX_FLAG_DECRYPTED;
642 } 790 }
643 791
644 /* Send the frame to mac80211 */
645 if (hdr->addr1[5] & 0x01) {
646 int i;
647 /*
648 * Deliver broadcast/multicast frames to all suitable
649 * virtual wiphys.
650 */
651 /* TODO: filter based on channel configuration */
652 for (i = 0; i < sc->num_sec_wiphy; i++) {
653 struct ath_wiphy *aphy = sc->sec_wiphy[i];
654 struct sk_buff *nskb;
655 if (aphy == NULL)
656 continue;
657 nskb = skb_copy(skb, GFP_ATOMIC);
658 if (nskb)
659 __ieee80211_rx(aphy->hw, nskb,
660 &rx_status);
661 }
662 __ieee80211_rx(sc->hw, skb, &rx_status);
663 } else {
664 /* Deliver unicast frames based on receiver address */
665 __ieee80211_rx(ath_get_virt_hw(sc, hdr), skb,
666 &rx_status);
667 }
668
669 /* We will now give hardware our shiny new allocated skb */ 792 /* We will now give hardware our shiny new allocated skb */
670 bf->bf_mpdu = requeue_skb; 793 bf->bf_mpdu = requeue_skb;
671 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data, 794 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
@@ -675,8 +798,9 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
675 bf->bf_buf_addr))) { 798 bf->bf_buf_addr))) {
676 dev_kfree_skb_any(requeue_skb); 799 dev_kfree_skb_any(requeue_skb);
677 bf->bf_mpdu = NULL; 800 bf->bf_mpdu = NULL;
678 DPRINTF(sc, ATH_DBG_CONFIG, 801 DPRINTF(sc, ATH_DBG_FATAL,
679 "dma_mapping_error() on RX\n"); 802 "dma_mapping_error() on RX\n");
803 ath_rx_send_to_mac80211(sc, skb, &rx_status);
680 break; 804 break;
681 } 805 }
682 bf->bf_dmacontext = bf->bf_buf_addr; 806 bf->bf_dmacontext = bf->bf_buf_addr;
@@ -692,11 +816,12 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
692 sc->rx.rxotherant = 0; 816 sc->rx.rxotherant = 0;
693 } 817 }
694 818
695 if (ieee80211_is_beacon(fc) && 819 if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
696 (sc->sc_flags & SC_OP_WAIT_FOR_BEACON)) { 820 SC_OP_WAIT_FOR_PSPOLL_DATA)))
697 sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON; 821 ath_rx_ps(sc, skb);
698 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP); 822
699 } 823 ath_rx_send_to_mac80211(sc, skb, &rx_status);
824
700requeue: 825requeue:
701 list_move_tail(&bf->list, &sc->rx.rxbuf); 826 list_move_tail(&bf->list, &sc->rx.rxbuf);
702 ath_rx_buf_link(sc, bf); 827 ath_rx_buf_link(sc, bf);
diff --git a/drivers/net/wireless/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 52605246679f..52605246679f 100644
--- a/drivers/net/wireless/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
diff --git a/drivers/net/wireless/ath9k/virtual.c b/drivers/net/wireless/ath/ath9k/virtual.c
index 1ff429b027d7..1ff429b027d7 100644
--- a/drivers/net/wireless/ath9k/virtual.c
+++ b/drivers/net/wireless/ath/ath9k/virtual.c
diff --git a/drivers/net/wireless/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 689bdbf78808..a8def4fa449c 100644
--- a/drivers/net/wireless/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -283,7 +283,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
283 int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; 283 int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0;
284 bool rc_update = true; 284 bool rc_update = true;
285 285
286 skb = (struct sk_buff *)bf->bf_mpdu; 286 skb = bf->bf_mpdu;
287 hdr = (struct ieee80211_hdr *)skb->data; 287 hdr = (struct ieee80211_hdr *)skb->data;
288 288
289 rcu_read_lock(); 289 rcu_read_lock();
@@ -380,8 +380,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
380 ath_tx_complete_buf(sc, bf, &bf_head, !txfail, sendbar); 380 ath_tx_complete_buf(sc, bf, &bf_head, !txfail, sendbar);
381 } else { 381 } else {
382 /* retry the un-acked ones */ 382 /* retry the un-acked ones */
383 if (bf->bf_next == NULL && 383 if (bf->bf_next == NULL && bf_last->bf_stale) {
384 bf_last->bf_status & ATH_BUFSTATUS_STALE) {
385 struct ath_buf *tbf; 384 struct ath_buf *tbf;
386 385
387 tbf = ath_clone_txbuf(sc, bf_last); 386 tbf = ath_clone_txbuf(sc, bf_last);
@@ -435,7 +434,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
435static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf, 434static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
436 struct ath_atx_tid *tid) 435 struct ath_atx_tid *tid)
437{ 436{
438 struct ath_rate_table *rate_table = sc->cur_rate_table; 437 const struct ath_rate_table *rate_table = sc->cur_rate_table;
439 struct sk_buff *skb; 438 struct sk_buff *skb;
440 struct ieee80211_tx_info *tx_info; 439 struct ieee80211_tx_info *tx_info;
441 struct ieee80211_tx_rate *rates; 440 struct ieee80211_tx_rate *rates;
@@ -444,7 +443,7 @@ static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
444 u16 aggr_limit, legacy = 0, maxampdu; 443 u16 aggr_limit, legacy = 0, maxampdu;
445 int i; 444 int i;
446 445
447 skb = (struct sk_buff *)bf->bf_mpdu; 446 skb = bf->bf_mpdu;
448 tx_info = IEEE80211_SKB_CB(skb); 447 tx_info = IEEE80211_SKB_CB(skb);
449 rates = tx_info->control.rates; 448 rates = tx_info->control.rates;
450 tx_info_priv = (struct ath_tx_info_priv *)tx_info->rate_driver_data[0]; 449 tx_info_priv = (struct ath_tx_info_priv *)tx_info->rate_driver_data[0];
@@ -498,7 +497,7 @@ static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
498static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid, 497static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid,
499 struct ath_buf *bf, u16 frmlen) 498 struct ath_buf *bf, u16 frmlen)
500{ 499{
501 struct ath_rate_table *rt = sc->cur_rate_table; 500 const struct ath_rate_table *rt = sc->cur_rate_table;
502 struct sk_buff *skb = bf->bf_mpdu; 501 struct sk_buff *skb = bf->bf_mpdu;
503 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 502 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
504 u32 nsymbits, nsymbols, mpdudensity; 503 u32 nsymbits, nsymbols, mpdudensity;
@@ -972,7 +971,7 @@ int ath_cabq_update(struct ath_softc *sc)
972 else if (sc->config.cabqReadytime > ATH9K_READY_TIME_HI_BOUND) 971 else if (sc->config.cabqReadytime > ATH9K_READY_TIME_HI_BOUND)
973 sc->config.cabqReadytime = ATH9K_READY_TIME_HI_BOUND; 972 sc->config.cabqReadytime = ATH9K_READY_TIME_HI_BOUND;
974 973
975 qi.tqi_readyTime = (sc->hw->conf.beacon_int * 974 qi.tqi_readyTime = (sc->beacon_interval *
976 sc->config.cabqReadytime) / 100; 975 sc->config.cabqReadytime) / 100;
977 ath_txq_update(sc, qnum, &qi); 976 ath_txq_update(sc, qnum, &qi);
978 977
@@ -1004,7 +1003,7 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
1004 1003
1005 bf = list_first_entry(&txq->axq_q, struct ath_buf, list); 1004 bf = list_first_entry(&txq->axq_q, struct ath_buf, list);
1006 1005
1007 if (bf->bf_status & ATH_BUFSTATUS_STALE) { 1006 if (bf->bf_stale) {
1008 list_del(&bf->list); 1007 list_del(&bf->list);
1009 spin_unlock_bh(&txq->axq_lock); 1008 spin_unlock_bh(&txq->axq_lock);
1010 1009
@@ -1071,7 +1070,7 @@ void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
1071 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, true); 1070 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, true);
1072 if (r) 1071 if (r)
1073 DPRINTF(sc, ATH_DBG_FATAL, 1072 DPRINTF(sc, ATH_DBG_FATAL,
1074 "Unable to reset hardware; reset status %u\n", 1073 "Unable to reset hardware; reset status %d\n",
1075 r); 1074 r);
1076 spin_unlock_bh(&sc->sc_resetlock); 1075 spin_unlock_bh(&sc->sc_resetlock);
1077 } 1076 }
@@ -1408,7 +1407,7 @@ static int setup_tx_flags(struct ath_softc *sc, struct sk_buff *skb,
1408static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf, 1407static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf,
1409 int width, int half_gi, bool shortPreamble) 1408 int width, int half_gi, bool shortPreamble)
1410{ 1409{
1411 struct ath_rate_table *rate_table = sc->cur_rate_table; 1410 const struct ath_rate_table *rate_table = sc->cur_rate_table;
1412 u32 nbits, nsymbits, duration, nsymbols; 1411 u32 nbits, nsymbits, duration, nsymbols;
1413 u8 rc; 1412 u8 rc;
1414 int streams, pktlen; 1413 int streams, pktlen;
@@ -1440,7 +1439,7 @@ static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf,
1440 1439
1441static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) 1440static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
1442{ 1441{
1443 struct ath_rate_table *rt = sc->cur_rate_table; 1442 const struct ath_rate_table *rt = sc->cur_rate_table;
1444 struct ath9k_11n_rate_series series[4]; 1443 struct ath9k_11n_rate_series series[4];
1445 struct sk_buff *skb; 1444 struct sk_buff *skb;
1446 struct ieee80211_tx_info *tx_info; 1445 struct ieee80211_tx_info *tx_info;
@@ -1452,7 +1451,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
1452 1451
1453 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4); 1452 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
1454 1453
1455 skb = (struct sk_buff *)bf->bf_mpdu; 1454 skb = bf->bf_mpdu;
1456 tx_info = IEEE80211_SKB_CB(skb); 1455 tx_info = IEEE80211_SKB_CB(skb);
1457 rates = tx_info->control.rates; 1456 rates = tx_info->control.rates;
1458 hdr = (struct ieee80211_hdr *)skb->data; 1457 hdr = (struct ieee80211_hdr *)skb->data;
@@ -1573,8 +1572,9 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
1573 skb->len, DMA_TO_DEVICE); 1572 skb->len, DMA_TO_DEVICE);
1574 if (unlikely(dma_mapping_error(sc->dev, bf->bf_dmacontext))) { 1573 if (unlikely(dma_mapping_error(sc->dev, bf->bf_dmacontext))) {
1575 bf->bf_mpdu = NULL; 1574 bf->bf_mpdu = NULL;
1576 DPRINTF(sc, ATH_DBG_CONFIG, 1575 kfree(tx_info_priv);
1577 "dma_mapping_error() on TX\n"); 1576 tx_info->rate_driver_data[0] = NULL;
1577 DPRINTF(sc, ATH_DBG_FATAL, "dma_mapping_error() on TX\n");
1578 return -ENOMEM; 1578 return -ENOMEM;
1579 } 1579 }
1580 1580
@@ -1586,7 +1586,7 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
1586static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf, 1586static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf,
1587 struct ath_tx_control *txctl) 1587 struct ath_tx_control *txctl)
1588{ 1588{
1589 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; 1589 struct sk_buff *skb = bf->bf_mpdu;
1590 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1590 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1591 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1591 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1592 struct ath_node *an = NULL; 1592 struct ath_node *an = NULL;
@@ -1790,6 +1790,16 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1790 skb_pull(skb, padsize); 1790 skb_pull(skb, padsize);
1791 } 1791 }
1792 1792
1793 if (sc->sc_flags & SC_OP_WAIT_FOR_TX_ACK) {
1794 sc->sc_flags &= ~SC_OP_WAIT_FOR_TX_ACK;
1795 DPRINTF(sc, ATH_DBG_PS, "Going back to sleep after having "
1796 "received TX status (0x%x)\n",
1797 sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
1798 SC_OP_WAIT_FOR_CAB |
1799 SC_OP_WAIT_FOR_PSPOLL_DATA |
1800 SC_OP_WAIT_FOR_TX_ACK));
1801 }
1802
1793 if (frame_type == ATH9K_NOT_INTERNAL) 1803 if (frame_type == ATH9K_NOT_INTERNAL)
1794 ieee80211_tx_status(hw, skb); 1804 ieee80211_tx_status(hw, skb);
1795 else 1805 else
@@ -1860,7 +1870,7 @@ static int ath_tx_num_badfrms(struct ath_softc *sc, struct ath_buf *bf,
1860static void ath_tx_rc_status(struct ath_buf *bf, struct ath_desc *ds, 1870static void ath_tx_rc_status(struct ath_buf *bf, struct ath_desc *ds,
1861 int nbad, int txok, bool update_rc) 1871 int nbad, int txok, bool update_rc)
1862{ 1872{
1863 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; 1873 struct sk_buff *skb = bf->bf_mpdu;
1864 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1874 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1865 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1875 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1866 struct ath_tx_info_priv *tx_info_priv = ATH_TX_INFO_PRIV(tx_info); 1876 struct ath_tx_info_priv *tx_info_priv = ATH_TX_INFO_PRIV(tx_info);
@@ -1941,7 +1951,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
1941 * it with the STALE flag. 1951 * it with the STALE flag.
1942 */ 1952 */
1943 bf_held = NULL; 1953 bf_held = NULL;
1944 if (bf->bf_status & ATH_BUFSTATUS_STALE) { 1954 if (bf->bf_stale) {
1945 bf_held = bf; 1955 bf_held = bf;
1946 if (list_is_last(&bf_held->list, &txq->axq_q)) { 1956 if (list_is_last(&bf_held->list, &txq->axq_q)) {
1947 txq->axq_link = NULL; 1957 txq->axq_link = NULL;
@@ -1982,7 +1992,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
1982 * however leave the last descriptor back as the holding 1992 * however leave the last descriptor back as the holding
1983 * descriptor for hw. 1993 * descriptor for hw.
1984 */ 1994 */
1985 lastbf->bf_status |= ATH_BUFSTATUS_STALE; 1995 lastbf->bf_stale = true;
1986 INIT_LIST_HEAD(&bf_head); 1996 INIT_LIST_HEAD(&bf_head);
1987 if (!list_is_singular(&lastbf->list)) 1997 if (!list_is_singular(&lastbf->list))
1988 list_cut_position(&bf_head, 1998 list_cut_position(&bf_head,
@@ -2048,44 +2058,38 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
2048{ 2058{
2049 int error = 0; 2059 int error = 0;
2050 2060
2051 do { 2061 spin_lock_init(&sc->tx.txbuflock);
2052 spin_lock_init(&sc->tx.txbuflock);
2053 2062
2054 error = ath_descdma_setup(sc, &sc->tx.txdma, &sc->tx.txbuf, 2063 error = ath_descdma_setup(sc, &sc->tx.txdma, &sc->tx.txbuf,
2055 "tx", nbufs, 1); 2064 "tx", nbufs, 1);
2056 if (error != 0) { 2065 if (error != 0) {
2057 DPRINTF(sc, ATH_DBG_FATAL, 2066 DPRINTF(sc, ATH_DBG_FATAL,
2058 "Failed to allocate tx descriptors: %d\n", 2067 "Failed to allocate tx descriptors: %d\n", error);
2059 error); 2068 goto err;
2060 break; 2069 }
2061 }
2062
2063 error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf,
2064 "beacon", ATH_BCBUF, 1);
2065 if (error != 0) {
2066 DPRINTF(sc, ATH_DBG_FATAL,
2067 "Failed to allocate beacon descriptors: %d\n",
2068 error);
2069 break;
2070 }
2071 2070
2072 } while (0); 2071 error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf,
2072 "beacon", ATH_BCBUF, 1);
2073 if (error != 0) {
2074 DPRINTF(sc, ATH_DBG_FATAL,
2075 "Failed to allocate beacon descriptors: %d\n", error);
2076 goto err;
2077 }
2073 2078
2079err:
2074 if (error != 0) 2080 if (error != 0)
2075 ath_tx_cleanup(sc); 2081 ath_tx_cleanup(sc);
2076 2082
2077 return error; 2083 return error;
2078} 2084}
2079 2085
2080int ath_tx_cleanup(struct ath_softc *sc) 2086void ath_tx_cleanup(struct ath_softc *sc)
2081{ 2087{
2082 if (sc->beacon.bdma.dd_desc_len != 0) 2088 if (sc->beacon.bdma.dd_desc_len != 0)
2083 ath_descdma_cleanup(sc, &sc->beacon.bdma, &sc->beacon.bbuf); 2089 ath_descdma_cleanup(sc, &sc->beacon.bdma, &sc->beacon.bbuf);
2084 2090
2085 if (sc->tx.txdma.dd_desc_len != 0) 2091 if (sc->tx.txdma.dd_desc_len != 0)
2086 ath_descdma_cleanup(sc, &sc->tx.txdma, &sc->tx.txbuf); 2092 ath_descdma_cleanup(sc, &sc->tx.txdma, &sc->tx.txbuf);
2087
2088 return 0;
2089} 2093}
2090 2094
2091void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an) 2095void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
diff --git a/drivers/net/wireless/ath/main.c b/drivers/net/wireless/ath/main.c
new file mode 100644
index 000000000000..9949b11cb151
--- /dev/null
+++ b/drivers/net/wireless/ath/main.c
@@ -0,0 +1,22 @@
1/*
2 * Copyright (c) 2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include <linux/kernel.h>
18#include <linux/module.h>
19
20MODULE_AUTHOR("Atheros Communications");
21MODULE_DESCRIPTION("Shared library for Atheros wireless LAN cards.");
22MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/ath9k/regd.c b/drivers/net/wireless/ath/regd.c
index 4ca625102291..7a89f9fac7d4 100644
--- a/drivers/net/wireless/ath9k/regd.c
+++ b/drivers/net/wireless/ath/regd.c
@@ -16,7 +16,9 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include "ath9k.h" 19#include <net/cfg80211.h>
20#include <net/mac80211.h>
21#include "regd.h"
20#include "regd_common.h" 22#include "regd_common.h"
21 23
22/* 24/*
@@ -55,7 +57,7 @@
55 57
56/* Can be used for: 58/* Can be used for:
57 * 0x60, 0x61, 0x62 */ 59 * 0x60, 0x61, 0x62 */
58static const struct ieee80211_regdomain ath9k_world_regdom_60_61_62 = { 60static const struct ieee80211_regdomain ath_world_regdom_60_61_62 = {
59 .n_reg_rules = 5, 61 .n_reg_rules = 5,
60 .alpha2 = "99", 62 .alpha2 = "99",
61 .reg_rules = { 63 .reg_rules = {
@@ -65,7 +67,7 @@ static const struct ieee80211_regdomain ath9k_world_regdom_60_61_62 = {
65}; 67};
66 68
67/* Can be used by 0x63 and 0x65 */ 69/* Can be used by 0x63 and 0x65 */
68static const struct ieee80211_regdomain ath9k_world_regdom_63_65 = { 70static const struct ieee80211_regdomain ath_world_regdom_63_65 = {
69 .n_reg_rules = 4, 71 .n_reg_rules = 4,
70 .alpha2 = "99", 72 .alpha2 = "99",
71 .reg_rules = { 73 .reg_rules = {
@@ -76,7 +78,7 @@ static const struct ieee80211_regdomain ath9k_world_regdom_63_65 = {
76}; 78};
77 79
78/* Can be used by 0x64 only */ 80/* Can be used by 0x64 only */
79static const struct ieee80211_regdomain ath9k_world_regdom_64 = { 81static const struct ieee80211_regdomain ath_world_regdom_64 = {
80 .n_reg_rules = 3, 82 .n_reg_rules = 3,
81 .alpha2 = "99", 83 .alpha2 = "99",
82 .reg_rules = { 84 .reg_rules = {
@@ -86,7 +88,7 @@ static const struct ieee80211_regdomain ath9k_world_regdom_64 = {
86}; 88};
87 89
88/* Can be used by 0x66 and 0x69 */ 90/* Can be used by 0x66 and 0x69 */
89static const struct ieee80211_regdomain ath9k_world_regdom_66_69 = { 91static const struct ieee80211_regdomain ath_world_regdom_66_69 = {
90 .n_reg_rules = 3, 92 .n_reg_rules = 3,
91 .alpha2 = "99", 93 .alpha2 = "99",
92 .reg_rules = { 94 .reg_rules = {
@@ -96,7 +98,7 @@ static const struct ieee80211_regdomain ath9k_world_regdom_66_69 = {
96}; 98};
97 99
98/* Can be used by 0x67, 0x6A and 0x68 */ 100/* Can be used by 0x67, 0x6A and 0x68 */
99static const struct ieee80211_regdomain ath9k_world_regdom_67_68_6A = { 101static const struct ieee80211_regdomain ath_world_regdom_67_68_6A = {
100 .n_reg_rules = 4, 102 .n_reg_rules = 4,
101 .alpha2 = "99", 103 .alpha2 = "99",
102 .reg_rules = { 104 .reg_rules = {
@@ -112,49 +114,51 @@ static inline bool is_wwr_sku(u16 regd)
112 (regd == WORLD); 114 (regd == WORLD);
113} 115}
114 116
115static u16 ath9k_regd_get_eepromRD(struct ath_hw *ah) 117static u16 ath_regd_get_eepromRD(struct ath_regulatory *reg)
116{ 118{
117 return ah->regulatory.current_rd & ~WORLDWIDE_ROAMING_FLAG; 119 return reg->current_rd & ~WORLDWIDE_ROAMING_FLAG;
118} 120}
119 121
120bool ath9k_is_world_regd(struct ath_hw *ah) 122bool ath_is_world_regd(struct ath_regulatory *reg)
121{ 123{
122 return is_wwr_sku(ath9k_regd_get_eepromRD(ah)); 124 return is_wwr_sku(ath_regd_get_eepromRD(reg));
123} 125}
126EXPORT_SYMBOL(ath_is_world_regd);
124 127
125const struct ieee80211_regdomain *ath9k_default_world_regdomain(void) 128static const struct ieee80211_regdomain *ath_default_world_regdomain(void)
126{ 129{
127 /* this is the most restrictive */ 130 /* this is the most restrictive */
128 return &ath9k_world_regdom_64; 131 return &ath_world_regdom_64;
129} 132}
130 133
131const struct ieee80211_regdomain *ath9k_world_regdomain(struct ath_hw *ah) 134static const struct
135ieee80211_regdomain *ath_world_regdomain(struct ath_regulatory *reg)
132{ 136{
133 switch (ah->regulatory.regpair->regDmnEnum) { 137 switch (reg->regpair->regDmnEnum) {
134 case 0x60: 138 case 0x60:
135 case 0x61: 139 case 0x61:
136 case 0x62: 140 case 0x62:
137 return &ath9k_world_regdom_60_61_62; 141 return &ath_world_regdom_60_61_62;
138 case 0x63: 142 case 0x63:
139 case 0x65: 143 case 0x65:
140 return &ath9k_world_regdom_63_65; 144 return &ath_world_regdom_63_65;
141 case 0x64: 145 case 0x64:
142 return &ath9k_world_regdom_64; 146 return &ath_world_regdom_64;
143 case 0x66: 147 case 0x66:
144 case 0x69: 148 case 0x69:
145 return &ath9k_world_regdom_66_69; 149 return &ath_world_regdom_66_69;
146 case 0x67: 150 case 0x67:
147 case 0x68: 151 case 0x68:
148 case 0x6A: 152 case 0x6A:
149 return &ath9k_world_regdom_67_68_6A; 153 return &ath_world_regdom_67_68_6A;
150 default: 154 default:
151 WARN_ON(1); 155 WARN_ON(1);
152 return ath9k_default_world_regdomain(); 156 return ath_default_world_regdomain();
153 } 157 }
154} 158}
155 159
156/* Frequency is one where radar detection is required */ 160/* Frequency is one where radar detection is required */
157static bool ath9k_is_radar_freq(u16 center_freq) 161static bool ath_is_radar_freq(u16 center_freq)
158{ 162{
159 return (center_freq >= 5260 && center_freq <= 5700); 163 return (center_freq >= 5260 && center_freq <= 5700);
160} 164}
@@ -168,9 +172,9 @@ static bool ath9k_is_radar_freq(u16 center_freq)
168 * received a beacon on a channel we can enable active scan and 172 * received a beacon on a channel we can enable active scan and
169 * adhoc (or beaconing). 173 * adhoc (or beaconing).
170 */ 174 */
171static void ath9k_reg_apply_beaconing_flags( 175static void
172 struct wiphy *wiphy, 176ath_reg_apply_beaconing_flags(struct wiphy *wiphy,
173 enum nl80211_reg_initiator initiator) 177 enum nl80211_reg_initiator initiator)
174{ 178{
175 enum ieee80211_band band; 179 enum ieee80211_band band;
176 struct ieee80211_supported_band *sband; 180 struct ieee80211_supported_band *sband;
@@ -191,13 +195,15 @@ static void ath9k_reg_apply_beaconing_flags(
191 195
192 ch = &sband->channels[i]; 196 ch = &sband->channels[i];
193 197
194 if (ath9k_is_radar_freq(ch->center_freq) || 198 if (ath_is_radar_freq(ch->center_freq) ||
195 (ch->flags & IEEE80211_CHAN_RADAR)) 199 (ch->flags & IEEE80211_CHAN_RADAR))
196 continue; 200 continue;
197 201
198 if (initiator == NL80211_REGDOM_SET_BY_COUNTRY_IE) { 202 if (initiator == NL80211_REGDOM_SET_BY_COUNTRY_IE) {
199 r = freq_reg_info(wiphy, ch->center_freq, 203 r = freq_reg_info(wiphy,
200 &bandwidth, &reg_rule); 204 ch->center_freq,
205 bandwidth,
206 &reg_rule);
201 if (r) 207 if (r)
202 continue; 208 continue;
203 /* 209 /*
@@ -227,9 +233,9 @@ static void ath9k_reg_apply_beaconing_flags(
227} 233}
228 234
229/* Allows active scan scan on Ch 12 and 13 */ 235/* Allows active scan scan on Ch 12 and 13 */
230static void ath9k_reg_apply_active_scan_flags( 236static void
231 struct wiphy *wiphy, 237ath_reg_apply_active_scan_flags(struct wiphy *wiphy,
232 enum nl80211_reg_initiator initiator) 238 enum nl80211_reg_initiator initiator)
233{ 239{
234 struct ieee80211_supported_band *sband; 240 struct ieee80211_supported_band *sband;
235 struct ieee80211_channel *ch; 241 struct ieee80211_channel *ch;
@@ -261,7 +267,7 @@ static void ath9k_reg_apply_active_scan_flags(
261 */ 267 */
262 268
263 ch = &sband->channels[11]; /* CH 12 */ 269 ch = &sband->channels[11]; /* CH 12 */
264 r = freq_reg_info(wiphy, ch->center_freq, &bandwidth, &reg_rule); 270 r = freq_reg_info(wiphy, ch->center_freq, bandwidth, &reg_rule);
265 if (!r) { 271 if (!r) {
266 if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN)) 272 if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
267 if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN) 273 if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
@@ -269,7 +275,7 @@ static void ath9k_reg_apply_active_scan_flags(
269 } 275 }
270 276
271 ch = &sband->channels[12]; /* CH 13 */ 277 ch = &sband->channels[12]; /* CH 13 */
272 r = freq_reg_info(wiphy, ch->center_freq, &bandwidth, &reg_rule); 278 r = freq_reg_info(wiphy, ch->center_freq, bandwidth, &reg_rule);
273 if (!r) { 279 if (!r) {
274 if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN)) 280 if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
275 if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN) 281 if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
@@ -278,7 +284,7 @@ static void ath9k_reg_apply_active_scan_flags(
278} 284}
279 285
280/* Always apply Radar/DFS rules on freq range 5260 MHz - 5700 MHz */ 286/* Always apply Radar/DFS rules on freq range 5260 MHz - 5700 MHz */
281void ath9k_reg_apply_radar_flags(struct wiphy *wiphy) 287static void ath_reg_apply_radar_flags(struct wiphy *wiphy)
282{ 288{
283 struct ieee80211_supported_band *sband; 289 struct ieee80211_supported_band *sband;
284 struct ieee80211_channel *ch; 290 struct ieee80211_channel *ch;
@@ -291,7 +297,7 @@ void ath9k_reg_apply_radar_flags(struct wiphy *wiphy)
291 297
292 for (i = 0; i < sband->n_channels; i++) { 298 for (i = 0; i < sband->n_channels; i++) {
293 ch = &sband->channels[i]; 299 ch = &sband->channels[i];
294 if (!ath9k_is_radar_freq(ch->center_freq)) 300 if (!ath_is_radar_freq(ch->center_freq))
295 continue; 301 continue;
296 /* We always enable radar detection/DFS on this 302 /* We always enable radar detection/DFS on this
297 * frequency range. Additionally we also apply on 303 * frequency range. Additionally we also apply on
@@ -310,37 +316,31 @@ void ath9k_reg_apply_radar_flags(struct wiphy *wiphy)
310 } 316 }
311} 317}
312 318
313void ath9k_reg_apply_world_flags(struct wiphy *wiphy, 319static void ath_reg_apply_world_flags(struct wiphy *wiphy,
314 enum nl80211_reg_initiator initiator) 320 enum nl80211_reg_initiator initiator,
321 struct ath_regulatory *reg)
315{ 322{
316 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 323 switch (reg->regpair->regDmnEnum) {
317 struct ath_wiphy *aphy = hw->priv;
318 struct ath_softc *sc = aphy->sc;
319 struct ath_hw *ah = sc->sc_ah;
320
321 switch (ah->regulatory.regpair->regDmnEnum) {
322 case 0x60: 324 case 0x60:
323 case 0x63: 325 case 0x63:
324 case 0x66: 326 case 0x66:
325 case 0x67: 327 case 0x67:
326 ath9k_reg_apply_beaconing_flags(wiphy, initiator); 328 ath_reg_apply_beaconing_flags(wiphy, initiator);
327 break; 329 break;
328 case 0x68: 330 case 0x68:
329 ath9k_reg_apply_beaconing_flags(wiphy, initiator); 331 ath_reg_apply_beaconing_flags(wiphy, initiator);
330 ath9k_reg_apply_active_scan_flags(wiphy, initiator); 332 ath_reg_apply_active_scan_flags(wiphy, initiator);
331 break; 333 break;
332 } 334 }
333 return; 335 return;
334} 336}
335 337
336int ath9k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request) 338int ath_reg_notifier_apply(struct wiphy *wiphy,
339 struct regulatory_request *request,
340 struct ath_regulatory *reg)
337{ 341{
338 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
339 struct ath_wiphy *aphy = hw->priv;
340 struct ath_softc *sc = aphy->sc;
341
342 /* We always apply this */ 342 /* We always apply this */
343 ath9k_reg_apply_radar_flags(wiphy); 343 ath_reg_apply_radar_flags(wiphy);
344 344
345 switch (request->initiator) { 345 switch (request->initiator) {
346 case NL80211_REGDOM_SET_BY_DRIVER: 346 case NL80211_REGDOM_SET_BY_DRIVER:
@@ -348,17 +348,19 @@ int ath9k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)
348 case NL80211_REGDOM_SET_BY_USER: 348 case NL80211_REGDOM_SET_BY_USER:
349 break; 349 break;
350 case NL80211_REGDOM_SET_BY_COUNTRY_IE: 350 case NL80211_REGDOM_SET_BY_COUNTRY_IE:
351 if (ath9k_is_world_regd(sc->sc_ah)) 351 if (ath_is_world_regd(reg))
352 ath9k_reg_apply_world_flags(wiphy, request->initiator); 352 ath_reg_apply_world_flags(wiphy, request->initiator,
353 reg);
353 break; 354 break;
354 } 355 }
355 356
356 return 0; 357 return 0;
357} 358}
359EXPORT_SYMBOL(ath_reg_notifier_apply);
358 360
359bool ath9k_regd_is_eeprom_valid(struct ath_hw *ah) 361static bool ath_regd_is_eeprom_valid(struct ath_regulatory *reg)
360{ 362{
361 u16 rd = ath9k_regd_get_eepromRD(ah); 363 u16 rd = ath_regd_get_eepromRD(reg);
362 int i; 364 int i;
363 365
364 if (rd & COUNTRY_ERD_FLAG) { 366 if (rd & COUNTRY_ERD_FLAG) {
@@ -373,14 +375,14 @@ bool ath9k_regd_is_eeprom_valid(struct ath_hw *ah)
373 if (regDomainPairs[i].regDmnEnum == rd) 375 if (regDomainPairs[i].regDmnEnum == rd)
374 return true; 376 return true;
375 } 377 }
376 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 378 printk(KERN_DEBUG
377 "invalid regulatory domain/country code 0x%x\n", rd); 379 "ath: invalid regulatory domain/country code 0x%x\n", rd);
378 return false; 380 return false;
379} 381}
380 382
381/* EEPROM country code to regpair mapping */ 383/* EEPROM country code to regpair mapping */
382static struct country_code_to_enum_rd* 384static struct country_code_to_enum_rd*
383ath9k_regd_find_country(u16 countryCode) 385ath_regd_find_country(u16 countryCode)
384{ 386{
385 int i; 387 int i;
386 388
@@ -393,7 +395,7 @@ ath9k_regd_find_country(u16 countryCode)
393 395
394/* EEPROM rd code to regpair mapping */ 396/* EEPROM rd code to regpair mapping */
395static struct country_code_to_enum_rd* 397static struct country_code_to_enum_rd*
396ath9k_regd_find_country_by_rd(int regdmn) 398ath_regd_find_country_by_rd(int regdmn)
397{ 399{
398 int i; 400 int i;
399 401
@@ -405,13 +407,13 @@ ath9k_regd_find_country_by_rd(int regdmn)
405} 407}
406 408
407/* Returns the map of the EEPROM set RD to a country code */ 409/* Returns the map of the EEPROM set RD to a country code */
408static u16 ath9k_regd_get_default_country(u16 rd) 410static u16 ath_regd_get_default_country(u16 rd)
409{ 411{
410 if (rd & COUNTRY_ERD_FLAG) { 412 if (rd & COUNTRY_ERD_FLAG) {
411 struct country_code_to_enum_rd *country = NULL; 413 struct country_code_to_enum_rd *country = NULL;
412 u16 cc = rd & ~COUNTRY_ERD_FLAG; 414 u16 cc = rd & ~COUNTRY_ERD_FLAG;
413 415
414 country = ath9k_regd_find_country(cc); 416 country = ath_regd_find_country(cc);
415 if (country != NULL) 417 if (country != NULL)
416 return cc; 418 return cc;
417 } 419 }
@@ -420,7 +422,7 @@ static u16 ath9k_regd_get_default_country(u16 rd)
420} 422}
421 423
422static struct reg_dmn_pair_mapping* 424static struct reg_dmn_pair_mapping*
423ath9k_get_regpair(int regdmn) 425ath_get_regpair(int regdmn)
424{ 426{
425 int i; 427 int i;
426 428
@@ -433,87 +435,120 @@ ath9k_get_regpair(int regdmn)
433 return NULL; 435 return NULL;
434} 436}
435 437
436int ath9k_regd_init(struct ath_hw *ah) 438static int
439ath_regd_init_wiphy(struct ath_regulatory *reg,
440 struct wiphy *wiphy,
441 int (*reg_notifier)(struct wiphy *wiphy,
442 struct regulatory_request *request))
443{
444 const struct ieee80211_regdomain *regd;
445
446 wiphy->reg_notifier = reg_notifier;
447 wiphy->strict_regulatory = true;
448
449 if (ath_is_world_regd(reg)) {
450 /*
451 * Anything applied here (prior to wiphy registration) gets
452 * saved on the wiphy orig_* parameters
453 */
454 regd = ath_world_regdomain(reg);
455 wiphy->custom_regulatory = true;
456 wiphy->strict_regulatory = false;
457 } else {
458 /*
459 * This gets applied in the case of the absense of CRDA,
460 * it's our own custom world regulatory domain, similar to
461 * cfg80211's but we enable passive scanning.
462 */
463 regd = ath_default_world_regdomain();
464 }
465 wiphy_apply_custom_regulatory(wiphy, regd);
466 ath_reg_apply_radar_flags(wiphy);
467 ath_reg_apply_world_flags(wiphy, NL80211_REGDOM_SET_BY_DRIVER, reg);
468 return 0;
469}
470
471int
472ath_regd_init(struct ath_regulatory *reg,
473 struct wiphy *wiphy,
474 int (*reg_notifier)(struct wiphy *wiphy,
475 struct regulatory_request *request))
437{ 476{
438 struct country_code_to_enum_rd *country = NULL; 477 struct country_code_to_enum_rd *country = NULL;
439 u16 regdmn; 478 u16 regdmn;
440 479
441 if (!ath9k_regd_is_eeprom_valid(ah)) { 480 if (!ath_regd_is_eeprom_valid(reg)) {
442 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 481 printk(KERN_ERR "ath: Invalid EEPROM contents\n");
443 "Invalid EEPROM contents\n");
444 return -EINVAL; 482 return -EINVAL;
445 } 483 }
446 484
447 regdmn = ath9k_regd_get_eepromRD(ah); 485 regdmn = ath_regd_get_eepromRD(reg);
448 ah->regulatory.country_code = ath9k_regd_get_default_country(regdmn); 486 reg->country_code = ath_regd_get_default_country(regdmn);
449 487
450 if (ah->regulatory.country_code == CTRY_DEFAULT && 488 if (reg->country_code == CTRY_DEFAULT &&
451 regdmn == CTRY_DEFAULT) 489 regdmn == CTRY_DEFAULT)
452 ah->regulatory.country_code = CTRY_UNITED_STATES; 490 reg->country_code = CTRY_UNITED_STATES;
453 491
454 if (ah->regulatory.country_code == CTRY_DEFAULT) { 492 if (reg->country_code == CTRY_DEFAULT) {
455 country = NULL; 493 country = NULL;
456 } else { 494 } else {
457 country = ath9k_regd_find_country(ah->regulatory.country_code); 495 country = ath_regd_find_country(reg->country_code);
458 if (country == NULL) { 496 if (country == NULL) {
459 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 497 printk(KERN_DEBUG
460 "Country is NULL!!!!, cc= %d\n", 498 "ath: Country is NULL!!!!, cc= %d\n",
461 ah->regulatory.country_code); 499 reg->country_code);
462 return -EINVAL; 500 return -EINVAL;
463 } else 501 } else
464 regdmn = country->regDmnEnum; 502 regdmn = country->regDmnEnum;
465 } 503 }
466 504
467 ah->regulatory.regpair = ath9k_get_regpair(regdmn); 505 reg->regpair = ath_get_regpair(regdmn);
468 506
469 if (!ah->regulatory.regpair) { 507 if (!reg->regpair) {
470 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 508 printk(KERN_DEBUG "ath: "
471 "No regulatory domain pair found, cannot continue\n"); 509 "No regulatory domain pair found, cannot continue\n");
472 return -EINVAL; 510 return -EINVAL;
473 } 511 }
474 512
475 if (!country) 513 if (!country)
476 country = ath9k_regd_find_country_by_rd(regdmn); 514 country = ath_regd_find_country_by_rd(regdmn);
477 515
478 if (country) { 516 if (country) {
479 ah->regulatory.alpha2[0] = country->isoName[0]; 517 reg->alpha2[0] = country->isoName[0];
480 ah->regulatory.alpha2[1] = country->isoName[1]; 518 reg->alpha2[1] = country->isoName[1];
481 } else { 519 } else {
482 ah->regulatory.alpha2[0] = '0'; 520 reg->alpha2[0] = '0';
483 ah->regulatory.alpha2[1] = '0'; 521 reg->alpha2[1] = '0';
484 } 522 }
485 523
486 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 524 printk(KERN_DEBUG "ath: Country alpha2 being used: %c%c\n",
487 "Country alpha2 being used: %c%c\n" 525 reg->alpha2[0], reg->alpha2[1]);
488 "Regulatory.Regpair detected: 0x%0x\n", 526 printk(KERN_DEBUG "ath: Regpair detected: 0x%0x\n",
489 ah->regulatory.alpha2[0], ah->regulatory.alpha2[1], 527 reg->regpair->regDmnEnum);
490 ah->regulatory.regpair->regDmnEnum);
491 528
529 ath_regd_init_wiphy(reg, wiphy, reg_notifier);
492 return 0; 530 return 0;
493} 531}
532EXPORT_SYMBOL(ath_regd_init);
494 533
495u32 ath9k_regd_get_ctl(struct ath_hw *ah, struct ath9k_channel *chan) 534u32 ath_regd_get_band_ctl(struct ath_regulatory *reg,
535 enum ieee80211_band band)
496{ 536{
497 u32 ctl = NO_CTL; 537 if (!reg->regpair ||
498 538 (reg->country_code == CTRY_DEFAULT &&
499 if (!ah->regulatory.regpair || 539 is_wwr_sku(ath_regd_get_eepromRD(reg)))) {
500 (ah->regulatory.country_code == CTRY_DEFAULT && 540 return SD_NO_CTL;
501 is_wwr_sku(ath9k_regd_get_eepromRD(ah)))) {
502 if (IS_CHAN_B(chan))
503 ctl = SD_NO_CTL | CTL_11B;
504 else if (IS_CHAN_G(chan))
505 ctl = SD_NO_CTL | CTL_11G;
506 else
507 ctl = SD_NO_CTL | CTL_11A;
508 return ctl;
509 } 541 }
510 542
511 if (IS_CHAN_B(chan)) 543 switch (band) {
512 ctl = ah->regulatory.regpair->reg_2ghz_ctl | CTL_11B; 544 case IEEE80211_BAND_2GHZ:
513 else if (IS_CHAN_G(chan)) 545 return reg->regpair->reg_2ghz_ctl;
514 ctl = ah->regulatory.regpair->reg_2ghz_ctl | CTL_11G; 546 case IEEE80211_BAND_5GHZ:
515 else 547 return reg->regpair->reg_5ghz_ctl;
516 ctl = ah->regulatory.regpair->reg_5ghz_ctl | CTL_11A; 548 default:
549 return NO_CTL;
550 }
517 551
518 return ctl; 552 return NO_CTL;
519} 553}
554EXPORT_SYMBOL(ath_regd_get_band_ctl);
diff --git a/drivers/net/wireless/ath9k/regd.h b/drivers/net/wireless/ath/regd.h
index 9f5fbd4eea7a..07291ccb23f2 100644
--- a/drivers/net/wireless/ath9k/regd.h
+++ b/drivers/net/wireless/ath/regd.h
@@ -17,6 +17,25 @@
17#ifndef REGD_H 17#ifndef REGD_H
18#define REGD_H 18#define REGD_H
19 19
20#include <linux/nl80211.h>
21
22#include <net/cfg80211.h>
23
24#define NO_CTL 0xff
25#define SD_NO_CTL 0xE0
26#define NO_CTL 0xff
27#define CTL_MODE_M 7
28#define CTL_11A 0
29#define CTL_11B 1
30#define CTL_11G 2
31#define CTL_2GHT20 5
32#define CTL_5GHT20 6
33#define CTL_2GHT40 7
34#define CTL_5GHT40 8
35
36#define CTRY_DEBUG 0x1ff
37#define CTRY_DEFAULT 0
38
20#define COUNTRY_ERD_FLAG 0x8000 39#define COUNTRY_ERD_FLAG 0x8000
21#define WORLDWIDE_ROAMING_FLAG 0x4000 40#define WORLDWIDE_ROAMING_FLAG 0x4000
22 41
@@ -40,7 +59,7 @@ struct country_code_to_enum_rd {
40 const char *isoName; 59 const char *isoName;
41}; 60};
42 61
43struct ath9k_regulatory { 62struct ath_regulatory {
44 char alpha2[2]; 63 char alpha2[2];
45 u16 country_code; 64 u16 country_code;
46 u16 max_power_level; 65 u16 max_power_level;
@@ -233,15 +252,14 @@ enum CountryCode {
233 CTRY_BELGIUM2 = 5002 252 CTRY_BELGIUM2 = 5002
234}; 253};
235 254
236bool ath9k_is_world_regd(struct ath_hw *ah); 255bool ath_is_world_regd(struct ath_regulatory *reg);
237const struct ieee80211_regdomain *ath9k_world_regdomain(struct ath_hw *ah); 256int ath_regd_init(struct ath_regulatory *reg, struct wiphy *wiphy,
238const struct ieee80211_regdomain *ath9k_default_world_regdomain(void); 257 int (*reg_notifier)(struct wiphy *wiphy,
239void ath9k_reg_apply_world_flags(struct wiphy *wiphy, 258 struct regulatory_request *request));
240 enum nl80211_reg_initiator initiator); 259u32 ath_regd_get_band_ctl(struct ath_regulatory *reg,
241void ath9k_reg_apply_radar_flags(struct wiphy *wiphy); 260 enum ieee80211_band band);
242int ath9k_regd_init(struct ath_hw *ah); 261int ath_reg_notifier_apply(struct wiphy *wiphy,
243bool ath9k_regd_is_eeprom_valid(struct ath_hw *ah); 262 struct regulatory_request *request,
244u32 ath9k_regd_get_ctl(struct ath_hw *ah, struct ath9k_channel *chan); 263 struct ath_regulatory *reg);
245int ath9k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request);
246 264
247#endif 265#endif
diff --git a/drivers/net/wireless/ath9k/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index 4d0e298cd1c7..4d0e298cd1c7 100644
--- a/drivers/net/wireless/ath9k/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
diff --git a/drivers/net/wireless/atmel_cs.c b/drivers/net/wireless/atmel_cs.c
index 77406245dc7b..ddaa859c3491 100644
--- a/drivers/net/wireless/atmel_cs.c
+++ b/drivers/net/wireless/atmel_cs.c
@@ -279,7 +279,7 @@ static int atmel_config(struct pcmcia_device *link)
279 struct pcmcia_device_id *did; 279 struct pcmcia_device_id *did;
280 280
281 dev = link->priv; 281 dev = link->priv;
282 did = handle_to_dev(link).driver_data; 282 did = dev_get_drvdata(&handle_to_dev(link));
283 283
284 DEBUG(0, "atmel_config(0x%p)\n", link); 284 DEBUG(0, "atmel_config(0x%p)\n", link);
285 285
diff --git a/drivers/net/wireless/b43/Kconfig b/drivers/net/wireless/b43/Kconfig
index aab71a70ba78..21572e40b79d 100644
--- a/drivers/net/wireless/b43/Kconfig
+++ b/drivers/net/wireless/b43/Kconfig
@@ -3,7 +3,6 @@ config B43
3 depends on SSB_POSSIBLE && MAC80211 && WLAN_80211 && HAS_DMA 3 depends on SSB_POSSIBLE && MAC80211 && WLAN_80211 && HAS_DMA
4 select SSB 4 select SSB
5 select FW_LOADER 5 select FW_LOADER
6 select HW_RANDOM
7 ---help--- 6 ---help---
8 b43 is a driver for the Broadcom 43xx series wireless devices. 7 b43 is a driver for the Broadcom 43xx series wireless devices.
9 8
@@ -106,6 +105,13 @@ config B43_RFKILL
106 depends on B43 && (RFKILL = y || RFKILL = B43) && RFKILL_INPUT && (INPUT_POLLDEV = y || INPUT_POLLDEV = B43) 105 depends on B43 && (RFKILL = y || RFKILL = B43) && RFKILL_INPUT && (INPUT_POLLDEV = y || INPUT_POLLDEV = B43)
107 default y 106 default y
108 107
108# This config option automatically enables b43 HW-RNG support,
109# if the HW-RNG core is enabled.
110config B43_HWRNG
111 bool
112 depends on B43 && (HW_RANDOM = y || HW_RANDOM = B43)
113 default y
114
109config B43_DEBUG 115config B43_DEBUG
110 bool "Broadcom 43xx debugging" 116 bool "Broadcom 43xx debugging"
111 depends on B43 117 depends on B43
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index beaf18d6e8a7..4e8ad841c3c5 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -625,9 +625,11 @@ struct b43_wl {
625 /* Stats about the wireless interface */ 625 /* Stats about the wireless interface */
626 struct ieee80211_low_level_stats ieee_stats; 626 struct ieee80211_low_level_stats ieee_stats;
627 627
628#ifdef CONFIG_B43_HWRNG
628 struct hwrng rng; 629 struct hwrng rng;
629 u8 rng_initialized; 630 bool rng_initialized;
630 char rng_name[30 + 1]; 631 char rng_name[30 + 1];
632#endif /* CONFIG_B43_HWRNG */
631 633
632 /* The RF-kill button */ 634 /* The RF-kill button */
633 struct b43_rfkill rfkill; 635 struct b43_rfkill rfkill;
@@ -776,8 +778,8 @@ struct b43_wldev {
776 /* Reason code of the last interrupt. */ 778 /* Reason code of the last interrupt. */
777 u32 irq_reason; 779 u32 irq_reason;
778 u32 dma_reason[6]; 780 u32 dma_reason[6];
779 /* saved irq enable/disable state bitfield. */ 781 /* The currently active generic-interrupt mask. */
780 u32 irq_savedstate; 782 u32 irq_mask;
781 /* Link Quality calculation context. */ 783 /* Link Quality calculation context. */
782 struct b43_noise_calculation noisecalc; 784 struct b43_noise_calculation noisecalc;
783 /* if > 0 MAC is suspended. if == 0 MAC is enabled. */ 785 /* if > 0 MAC is suspended. if == 0 MAC is enabled. */
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 79b685e300c7..cb4a8712946a 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -673,32 +673,6 @@ static void b43_short_slot_timing_disable(struct b43_wldev *dev)
673 b43_set_slot_time(dev, 20); 673 b43_set_slot_time(dev, 20);
674} 674}
675 675
676/* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
677 * Returns the _previously_ enabled IRQ mask.
678 */
679static inline u32 b43_interrupt_enable(struct b43_wldev *dev, u32 mask)
680{
681 u32 old_mask;
682
683 old_mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
684 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, old_mask | mask);
685
686 return old_mask;
687}
688
689/* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
690 * Returns the _previously_ enabled IRQ mask.
691 */
692static inline u32 b43_interrupt_disable(struct b43_wldev *dev, u32 mask)
693{
694 u32 old_mask;
695
696 old_mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
697 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
698
699 return old_mask;
700}
701
702/* Synchronize IRQ top- and bottom-half. 676/* Synchronize IRQ top- and bottom-half.
703 * IRQs must be masked before calling this. 677 * IRQs must be masked before calling this.
704 * This must not be called with the irq_lock held. 678 * This must not be called with the irq_lock held.
@@ -1593,7 +1567,7 @@ static void handle_irq_beacon(struct b43_wldev *dev)
1593 /* This is the bottom half of the asynchronous beacon update. */ 1567 /* This is the bottom half of the asynchronous beacon update. */
1594 1568
1595 /* Ignore interrupt in the future. */ 1569 /* Ignore interrupt in the future. */
1596 dev->irq_savedstate &= ~B43_IRQ_BEACON; 1570 dev->irq_mask &= ~B43_IRQ_BEACON;
1597 1571
1598 cmd = b43_read32(dev, B43_MMIO_MACCMD); 1572 cmd = b43_read32(dev, B43_MMIO_MACCMD);
1599 beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID); 1573 beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
@@ -1602,7 +1576,7 @@ static void handle_irq_beacon(struct b43_wldev *dev)
1602 /* Schedule interrupt manually, if busy. */ 1576 /* Schedule interrupt manually, if busy. */
1603 if (beacon0_valid && beacon1_valid) { 1577 if (beacon0_valid && beacon1_valid) {
1604 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON); 1578 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON);
1605 dev->irq_savedstate |= B43_IRQ_BEACON; 1579 dev->irq_mask |= B43_IRQ_BEACON;
1606 return; 1580 return;
1607 } 1581 }
1608 1582
@@ -1641,11 +1615,9 @@ static void b43_beacon_update_trigger_work(struct work_struct *work)
1641 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) { 1615 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
1642 spin_lock_irq(&wl->irq_lock); 1616 spin_lock_irq(&wl->irq_lock);
1643 /* update beacon right away or defer to irq */ 1617 /* update beacon right away or defer to irq */
1644 dev->irq_savedstate = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
1645 handle_irq_beacon(dev); 1618 handle_irq_beacon(dev);
1646 /* The handler might have updated the IRQ mask. */ 1619 /* The handler might have updated the IRQ mask. */
1647 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 1620 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1648 dev->irq_savedstate);
1649 mmiowb(); 1621 mmiowb();
1650 spin_unlock_irq(&wl->irq_lock); 1622 spin_unlock_irq(&wl->irq_lock);
1651 } 1623 }
@@ -1879,7 +1851,7 @@ static void b43_interrupt_tasklet(struct b43_wldev *dev)
1879 if (reason & B43_IRQ_TX_OK) 1851 if (reason & B43_IRQ_TX_OK)
1880 handle_irq_transmit_status(dev); 1852 handle_irq_transmit_status(dev);
1881 1853
1882 b43_interrupt_enable(dev, dev->irq_savedstate); 1854 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1883 mmiowb(); 1855 mmiowb();
1884 spin_unlock_irqrestore(&dev->wl->irq_lock, flags); 1856 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1885} 1857}
@@ -1893,7 +1865,9 @@ static void b43_interrupt_ack(struct b43_wldev *dev, u32 reason)
1893 b43_write32(dev, B43_MMIO_DMA2_REASON, dev->dma_reason[2]); 1865 b43_write32(dev, B43_MMIO_DMA2_REASON, dev->dma_reason[2]);
1894 b43_write32(dev, B43_MMIO_DMA3_REASON, dev->dma_reason[3]); 1866 b43_write32(dev, B43_MMIO_DMA3_REASON, dev->dma_reason[3]);
1895 b43_write32(dev, B43_MMIO_DMA4_REASON, dev->dma_reason[4]); 1867 b43_write32(dev, B43_MMIO_DMA4_REASON, dev->dma_reason[4]);
1868/* Unused ring
1896 b43_write32(dev, B43_MMIO_DMA5_REASON, dev->dma_reason[5]); 1869 b43_write32(dev, B43_MMIO_DMA5_REASON, dev->dma_reason[5]);
1870*/
1897} 1871}
1898 1872
1899/* Interrupt handler top-half */ 1873/* Interrupt handler top-half */
@@ -1903,18 +1877,19 @@ static irqreturn_t b43_interrupt_handler(int irq, void *dev_id)
1903 struct b43_wldev *dev = dev_id; 1877 struct b43_wldev *dev = dev_id;
1904 u32 reason; 1878 u32 reason;
1905 1879
1906 if (!dev) 1880 B43_WARN_ON(!dev);
1907 return IRQ_NONE;
1908 1881
1909 spin_lock(&dev->wl->irq_lock); 1882 spin_lock(&dev->wl->irq_lock);
1910 1883
1911 if (b43_status(dev) < B43_STAT_STARTED) 1884 if (unlikely(b43_status(dev) < B43_STAT_STARTED)) {
1885 /* This can only happen on shared IRQ lines. */
1912 goto out; 1886 goto out;
1887 }
1913 reason = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); 1888 reason = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
1914 if (reason == 0xffffffff) /* shared IRQ */ 1889 if (reason == 0xffffffff) /* shared IRQ */
1915 goto out; 1890 goto out;
1916 ret = IRQ_HANDLED; 1891 ret = IRQ_HANDLED;
1917 reason &= b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); 1892 reason &= dev->irq_mask;
1918 if (!reason) 1893 if (!reason)
1919 goto out; 1894 goto out;
1920 1895
@@ -1928,16 +1903,18 @@ static irqreturn_t b43_interrupt_handler(int irq, void *dev_id)
1928 & 0x0001DC00; 1903 & 0x0001DC00;
1929 dev->dma_reason[4] = b43_read32(dev, B43_MMIO_DMA4_REASON) 1904 dev->dma_reason[4] = b43_read32(dev, B43_MMIO_DMA4_REASON)
1930 & 0x0000DC00; 1905 & 0x0000DC00;
1906/* Unused ring
1931 dev->dma_reason[5] = b43_read32(dev, B43_MMIO_DMA5_REASON) 1907 dev->dma_reason[5] = b43_read32(dev, B43_MMIO_DMA5_REASON)
1932 & 0x0000DC00; 1908 & 0x0000DC00;
1909*/
1933 1910
1934 b43_interrupt_ack(dev, reason); 1911 b43_interrupt_ack(dev, reason);
1935 /* disable all IRQs. They are enabled again in the bottom half. */ 1912 /* disable all IRQs. They are enabled again in the bottom half. */
1936 dev->irq_savedstate = b43_interrupt_disable(dev, B43_IRQ_ALL); 1913 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
1937 /* save the reason code and call our bottom half. */ 1914 /* save the reason code and call our bottom half. */
1938 dev->irq_reason = reason; 1915 dev->irq_reason = reason;
1939 tasklet_schedule(&dev->isr_tasklet); 1916 tasklet_schedule(&dev->isr_tasklet);
1940 out: 1917out:
1941 mmiowb(); 1918 mmiowb();
1942 spin_unlock(&dev->wl->irq_lock); 1919 spin_unlock(&dev->wl->irq_lock);
1943 1920
@@ -2980,6 +2957,7 @@ static void b43_security_init(struct b43_wldev *dev)
2980 b43_clear_keys(dev); 2957 b43_clear_keys(dev);
2981} 2958}
2982 2959
2960#ifdef CONFIG_B43_HWRNG
2983static int b43_rng_read(struct hwrng *rng, u32 *data) 2961static int b43_rng_read(struct hwrng *rng, u32 *data)
2984{ 2962{
2985 struct b43_wl *wl = (struct b43_wl *)rng->priv; 2963 struct b43_wl *wl = (struct b43_wl *)rng->priv;
@@ -2995,17 +2973,21 @@ static int b43_rng_read(struct hwrng *rng, u32 *data)
2995 2973
2996 return (sizeof(u16)); 2974 return (sizeof(u16));
2997} 2975}
2976#endif /* CONFIG_B43_HWRNG */
2998 2977
2999static void b43_rng_exit(struct b43_wl *wl) 2978static void b43_rng_exit(struct b43_wl *wl)
3000{ 2979{
2980#ifdef CONFIG_B43_HWRNG
3001 if (wl->rng_initialized) 2981 if (wl->rng_initialized)
3002 hwrng_unregister(&wl->rng); 2982 hwrng_unregister(&wl->rng);
2983#endif /* CONFIG_B43_HWRNG */
3003} 2984}
3004 2985
3005static int b43_rng_init(struct b43_wl *wl) 2986static int b43_rng_init(struct b43_wl *wl)
3006{ 2987{
3007 int err; 2988 int err = 0;
3008 2989
2990#ifdef CONFIG_B43_HWRNG
3009 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name), 2991 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
3010 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy)); 2992 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
3011 wl->rng.name = wl->rng_name; 2993 wl->rng.name = wl->rng_name;
@@ -3018,6 +3000,7 @@ static int b43_rng_init(struct b43_wl *wl)
3018 b43err(wl, "Failed to register the random " 3000 b43err(wl, "Failed to register the random "
3019 "number generator (%d)\n", err); 3001 "number generator (%d)\n", err);
3020 } 3002 }
3003#endif /* CONFIG_B43_HWRNG */
3021 3004
3022 return err; 3005 return err;
3023} 3006}
@@ -3485,11 +3468,6 @@ static int b43_op_config(struct ieee80211_hw *hw, u32 changed)
3485 if (phy->ops->set_rx_antenna) 3468 if (phy->ops->set_rx_antenna)
3486 phy->ops->set_rx_antenna(dev, antenna); 3469 phy->ops->set_rx_antenna(dev, antenna);
3487 3470
3488 /* Update templates for AP/mesh mode. */
3489 if (b43_is_mode(wl, NL80211_IFTYPE_AP) ||
3490 b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT))
3491 b43_set_beacon_int(dev, conf->beacon_int);
3492
3493 if (!!conf->radio_enabled != phy->radio_on) { 3471 if (!!conf->radio_enabled != phy->radio_on) {
3494 if (conf->radio_enabled) { 3472 if (conf->radio_enabled) {
3495 b43_software_rfkill(dev, RFKILL_STATE_UNBLOCKED); 3473 b43_software_rfkill(dev, RFKILL_STATE_UNBLOCKED);
@@ -3565,14 +3543,45 @@ static void b43_op_bss_info_changed(struct ieee80211_hw *hw,
3565{ 3543{
3566 struct b43_wl *wl = hw_to_b43_wl(hw); 3544 struct b43_wl *wl = hw_to_b43_wl(hw);
3567 struct b43_wldev *dev; 3545 struct b43_wldev *dev;
3546 unsigned long flags;
3568 3547
3569 mutex_lock(&wl->mutex); 3548 mutex_lock(&wl->mutex);
3570 3549
3571 dev = wl->current_dev; 3550 dev = wl->current_dev;
3572 if (!dev || b43_status(dev) < B43_STAT_STARTED) 3551 if (!dev || b43_status(dev) < B43_STAT_STARTED)
3573 goto out_unlock_mutex; 3552 goto out_unlock_mutex;
3553
3554 B43_WARN_ON(wl->vif != vif);
3555
3556 spin_lock_irqsave(&wl->irq_lock, flags);
3557 if (changed & BSS_CHANGED_BSSID) {
3558 if (conf->bssid)
3559 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
3560 else
3561 memset(wl->bssid, 0, ETH_ALEN);
3562 }
3563
3564 if (b43_status(dev) >= B43_STAT_INITIALIZED) {
3565 if (changed & BSS_CHANGED_BEACON &&
3566 (b43_is_mode(wl, NL80211_IFTYPE_AP) ||
3567 b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT) ||
3568 b43_is_mode(wl, NL80211_IFTYPE_ADHOC)))
3569 b43_update_templates(wl);
3570
3571 if (changed & BSS_CHANGED_BSSID)
3572 b43_write_mac_bssid_templates(dev);
3573 }
3574 spin_unlock_irqrestore(&wl->irq_lock, flags);
3575
3574 b43_mac_suspend(dev); 3576 b43_mac_suspend(dev);
3575 3577
3578 /* Update templates for AP/mesh mode. */
3579 if (changed & BSS_CHANGED_BEACON_INT &&
3580 (b43_is_mode(wl, NL80211_IFTYPE_AP) ||
3581 b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT) ||
3582 b43_is_mode(wl, NL80211_IFTYPE_ADHOC)))
3583 b43_set_beacon_int(dev, conf->beacon_int);
3584
3576 if (changed & BSS_CHANGED_BASIC_RATES) 3585 if (changed & BSS_CHANGED_BASIC_RATES)
3577 b43_update_basic_rates(dev, conf->basic_rates); 3586 b43_update_basic_rates(dev, conf->basic_rates);
3578 3587
@@ -3586,8 +3595,6 @@ static void b43_op_bss_info_changed(struct ieee80211_hw *hw,
3586 b43_mac_enable(dev); 3595 b43_mac_enable(dev);
3587out_unlock_mutex: 3596out_unlock_mutex:
3588 mutex_unlock(&wl->mutex); 3597 mutex_unlock(&wl->mutex);
3589
3590 return;
3591} 3598}
3592 3599
3593static int b43_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 3600static int b43_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
@@ -3630,7 +3637,7 @@ static int b43_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3630 err = -EINVAL; 3637 err = -EINVAL;
3631 switch (key->alg) { 3638 switch (key->alg) {
3632 case ALG_WEP: 3639 case ALG_WEP:
3633 if (key->keylen == LEN_WEP40) 3640 if (key->keylen == WLAN_KEY_LEN_WEP40)
3634 algorithm = B43_SEC_ALGO_WEP40; 3641 algorithm = B43_SEC_ALGO_WEP40;
3635 else 3642 else
3636 algorithm = B43_SEC_ALGO_WEP104; 3643 algorithm = B43_SEC_ALGO_WEP104;
@@ -3745,41 +3752,6 @@ static void b43_op_configure_filter(struct ieee80211_hw *hw,
3745 spin_unlock_irqrestore(&wl->irq_lock, flags); 3752 spin_unlock_irqrestore(&wl->irq_lock, flags);
3746} 3753}
3747 3754
3748static int b43_op_config_interface(struct ieee80211_hw *hw,
3749 struct ieee80211_vif *vif,
3750 struct ieee80211_if_conf *conf)
3751{
3752 struct b43_wl *wl = hw_to_b43_wl(hw);
3753 struct b43_wldev *dev = wl->current_dev;
3754 unsigned long flags;
3755
3756 if (!dev)
3757 return -ENODEV;
3758 mutex_lock(&wl->mutex);
3759 spin_lock_irqsave(&wl->irq_lock, flags);
3760 B43_WARN_ON(wl->vif != vif);
3761 if (conf->bssid)
3762 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
3763 else
3764 memset(wl->bssid, 0, ETH_ALEN);
3765 if (b43_status(dev) >= B43_STAT_INITIALIZED) {
3766 if (b43_is_mode(wl, NL80211_IFTYPE_AP) ||
3767 b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT)) {
3768 B43_WARN_ON(vif->type != wl->if_type);
3769 if (conf->changed & IEEE80211_IFCC_BEACON)
3770 b43_update_templates(wl);
3771 } else if (b43_is_mode(wl, NL80211_IFTYPE_ADHOC)) {
3772 if (conf->changed & IEEE80211_IFCC_BEACON)
3773 b43_update_templates(wl);
3774 }
3775 b43_write_mac_bssid_templates(dev);
3776 }
3777 spin_unlock_irqrestore(&wl->irq_lock, flags);
3778 mutex_unlock(&wl->mutex);
3779
3780 return 0;
3781}
3782
3783/* Locking: wl->mutex */ 3755/* Locking: wl->mutex */
3784static void b43_wireless_core_stop(struct b43_wldev *dev) 3756static void b43_wireless_core_stop(struct b43_wldev *dev)
3785{ 3757{
@@ -3793,7 +3765,7 @@ static void b43_wireless_core_stop(struct b43_wldev *dev)
3793 * setting the status to INITIALIZED, as the interrupt handler 3765 * setting the status to INITIALIZED, as the interrupt handler
3794 * won't care about IRQs then. */ 3766 * won't care about IRQs then. */
3795 spin_lock_irqsave(&wl->irq_lock, flags); 3767 spin_lock_irqsave(&wl->irq_lock, flags);
3796 dev->irq_savedstate = b43_interrupt_disable(dev, B43_IRQ_ALL); 3768 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
3797 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* flush */ 3769 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* flush */
3798 spin_unlock_irqrestore(&wl->irq_lock, flags); 3770 spin_unlock_irqrestore(&wl->irq_lock, flags);
3799 b43_synchronize_irq(dev); 3771 b43_synchronize_irq(dev);
@@ -3834,7 +3806,7 @@ static int b43_wireless_core_start(struct b43_wldev *dev)
3834 3806
3835 /* Start data flow (TX/RX). */ 3807 /* Start data flow (TX/RX). */
3836 b43_mac_enable(dev); 3808 b43_mac_enable(dev);
3837 b43_interrupt_enable(dev, dev->irq_savedstate); 3809 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
3838 3810
3839 /* Start maintainance work */ 3811 /* Start maintainance work */
3840 b43_periodic_tasks_setup(dev); 3812 b43_periodic_tasks_setup(dev);
@@ -3997,9 +3969,9 @@ static void setup_struct_wldev_for_init(struct b43_wldev *dev)
3997 /* IRQ related flags */ 3969 /* IRQ related flags */
3998 dev->irq_reason = 0; 3970 dev->irq_reason = 0;
3999 memset(dev->dma_reason, 0, sizeof(dev->dma_reason)); 3971 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
4000 dev->irq_savedstate = B43_IRQ_MASKTEMPLATE; 3972 dev->irq_mask = B43_IRQ_MASKTEMPLATE;
4001 if (b43_modparam_verbose < B43_VERBOSITY_DEBUG) 3973 if (b43_modparam_verbose < B43_VERBOSITY_DEBUG)
4002 dev->irq_savedstate &= ~B43_IRQ_PHY_TXERR; 3974 dev->irq_mask &= ~B43_IRQ_PHY_TXERR;
4003 3975
4004 dev->mac_suspended = 1; 3976 dev->mac_suspended = 1;
4005 3977
@@ -4449,7 +4421,6 @@ static const struct ieee80211_ops b43_hw_ops = {
4449 .remove_interface = b43_op_remove_interface, 4421 .remove_interface = b43_op_remove_interface,
4450 .config = b43_op_config, 4422 .config = b43_op_config,
4451 .bss_info_changed = b43_op_bss_info_changed, 4423 .bss_info_changed = b43_op_bss_info_changed,
4452 .config_interface = b43_op_config_interface,
4453 .configure_filter = b43_op_configure_filter, 4424 .configure_filter = b43_op_configure_filter,
4454 .set_key = b43_op_set_key, 4425 .set_key = b43_op_set_key,
4455 .get_stats = b43_op_get_stats, 4426 .get_stats = b43_op_get_stats,
diff --git a/drivers/net/wireless/b43/rfkill.c b/drivers/net/wireless/b43/rfkill.c
index afad42358693..9e1d00bc24d3 100644
--- a/drivers/net/wireless/b43/rfkill.c
+++ b/drivers/net/wireless/b43/rfkill.c
@@ -139,7 +139,6 @@ void b43_rfkill_init(struct b43_wldev *dev)
139 rfk->rfkill->state = RFKILL_STATE_UNBLOCKED; 139 rfk->rfkill->state = RFKILL_STATE_UNBLOCKED;
140 rfk->rfkill->data = dev; 140 rfk->rfkill->data = dev;
141 rfk->rfkill->toggle_radio = b43_rfkill_soft_toggle; 141 rfk->rfkill->toggle_radio = b43_rfkill_soft_toggle;
142 rfk->rfkill->user_claim_unsupported = 1;
143 142
144 rfk->poll_dev = input_allocate_polled_device(); 143 rfk->poll_dev = input_allocate_polled_device();
145 if (!rfk->poll_dev) { 144 if (!rfk->poll_dev) {
diff --git a/drivers/net/wireless/b43legacy/Kconfig b/drivers/net/wireless/b43legacy/Kconfig
index aef2298d37ac..d4f628a74bbd 100644
--- a/drivers/net/wireless/b43legacy/Kconfig
+++ b/drivers/net/wireless/b43legacy/Kconfig
@@ -3,7 +3,6 @@ config B43LEGACY
3 depends on SSB_POSSIBLE && MAC80211 && WLAN_80211 && HAS_DMA 3 depends on SSB_POSSIBLE && MAC80211 && WLAN_80211 && HAS_DMA
4 select SSB 4 select SSB
5 select FW_LOADER 5 select FW_LOADER
6 select HW_RANDOM
7 ---help--- 6 ---help---
8 b43legacy is a driver for 802.11b devices from Broadcom (BCM4301 and 7 b43legacy is a driver for 802.11b devices from Broadcom (BCM4301 and
9 BCM4303) and early model 802.11g chips (BCM4306 Ver. 2) used in the 8 BCM4303) and early model 802.11g chips (BCM4306 Ver. 2) used in the
@@ -51,6 +50,13 @@ config B43LEGACY_RFKILL
51 depends on B43LEGACY && (RFKILL = y || RFKILL = B43LEGACY) && RFKILL_INPUT && (INPUT_POLLDEV = y || INPUT_POLLDEV = B43LEGACY) 50 depends on B43LEGACY && (RFKILL = y || RFKILL = B43LEGACY) && RFKILL_INPUT && (INPUT_POLLDEV = y || INPUT_POLLDEV = B43LEGACY)
52 default y 51 default y
53 52
53# This config option automatically enables b43 HW-RNG support,
54# if the HW-RNG core is enabled.
55config B43LEGACY_HWRNG
56 bool
57 depends on B43LEGACY && (HW_RANDOM = y || HW_RANDOM = B43LEGACY)
58 default y
59
54config B43LEGACY_DEBUG 60config B43LEGACY_DEBUG
55 bool "Broadcom 43xx-legacy debugging" 61 bool "Broadcom 43xx-legacy debugging"
56 depends on B43LEGACY 62 depends on B43LEGACY
diff --git a/drivers/net/wireless/b43legacy/b43legacy.h b/drivers/net/wireless/b43legacy/b43legacy.h
index 97b0e06dfe21..19a4b0bc0d87 100644
--- a/drivers/net/wireless/b43legacy/b43legacy.h
+++ b/drivers/net/wireless/b43legacy/b43legacy.h
@@ -59,7 +59,8 @@
59#define B43legacy_MMIO_XMITSTAT_1 0x174 59#define B43legacy_MMIO_XMITSTAT_1 0x174
60#define B43legacy_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */ 60#define B43legacy_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */
61#define B43legacy_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */ 61#define B43legacy_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */
62 62#define B43legacy_MMIO_TSF_CFP_REP 0x188
63#define B43legacy_MMIO_TSF_CFP_START 0x18C
63/* 32-bit DMA */ 64/* 32-bit DMA */
64#define B43legacy_MMIO_DMA32_BASE0 0x200 65#define B43legacy_MMIO_DMA32_BASE0 0x200
65#define B43legacy_MMIO_DMA32_BASE1 0x220 66#define B43legacy_MMIO_DMA32_BASE1 0x220
@@ -258,7 +259,6 @@
258 259
259#define B43legacy_IRQ_ALL 0xFFFFFFFF 260#define B43legacy_IRQ_ALL 0xFFFFFFFF
260#define B43legacy_IRQ_MASKTEMPLATE (B43legacy_IRQ_MAC_SUSPENDED | \ 261#define B43legacy_IRQ_MASKTEMPLATE (B43legacy_IRQ_MAC_SUSPENDED | \
261 B43legacy_IRQ_BEACON | \
262 B43legacy_IRQ_TBTT_INDI | \ 262 B43legacy_IRQ_TBTT_INDI | \
263 B43legacy_IRQ_ATIM_END | \ 263 B43legacy_IRQ_ATIM_END | \
264 B43legacy_IRQ_PMQ | \ 264 B43legacy_IRQ_PMQ | \
@@ -596,9 +596,11 @@ struct b43legacy_wl {
596 /* Stats about the wireless interface */ 596 /* Stats about the wireless interface */
597 struct ieee80211_low_level_stats ieee_stats; 597 struct ieee80211_low_level_stats ieee_stats;
598 598
599#ifdef CONFIG_B43LEGACY_HWRNG
599 struct hwrng rng; 600 struct hwrng rng;
600 u8 rng_initialized; 601 u8 rng_initialized;
601 char rng_name[30 + 1]; 602 char rng_name[30 + 1];
603#endif
602 604
603 /* The RF-kill button */ 605 /* The RF-kill button */
604 struct b43legacy_rfkill rfkill; 606 struct b43legacy_rfkill rfkill;
@@ -614,6 +616,8 @@ struct b43legacy_wl {
614 struct sk_buff *current_beacon; 616 struct sk_buff *current_beacon;
615 bool beacon0_uploaded; 617 bool beacon0_uploaded;
616 bool beacon1_uploaded; 618 bool beacon1_uploaded;
619 bool beacon_templates_virgin; /* Never wrote the templates? */
620 struct work_struct beacon_update_trigger;
617}; 621};
618 622
619/* Pointers to the firmware data and meta information about it. */ 623/* Pointers to the firmware data and meta information about it. */
@@ -690,8 +694,8 @@ struct b43legacy_wldev {
690 /* Reason code of the last interrupt. */ 694 /* Reason code of the last interrupt. */
691 u32 irq_reason; 695 u32 irq_reason;
692 u32 dma_reason[6]; 696 u32 dma_reason[6];
693 /* saved irq enable/disable state bitfield. */ 697 /* The currently active generic-interrupt mask. */
694 u32 irq_savedstate; 698 u32 irq_mask;
695 /* Link Quality calculation context. */ 699 /* Link Quality calculation context. */
696 struct b43legacy_noise_calculation noisecalc; 700 struct b43legacy_noise_calculation noisecalc;
697 /* if > 0 MAC is suspended. if == 0 MAC is enabled. */ 701 /* if > 0 MAC is suspended. if == 0 MAC is enabled. */
diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c
index 879edc786713..f6f3fbf0a2f4 100644
--- a/drivers/net/wireless/b43legacy/main.c
+++ b/drivers/net/wireless/b43legacy/main.c
@@ -583,35 +583,6 @@ static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
583 b43legacy_set_slot_time(dev, 20); 583 b43legacy_set_slot_time(dev, 20);
584} 584}
585 585
586/* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
587 * Returns the _previously_ enabled IRQ mask.
588 */
589static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
590 u32 mask)
591{
592 u32 old_mask;
593
594 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
595 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
596 mask);
597
598 return old_mask;
599}
600
601/* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
602 * Returns the _previously_ enabled IRQ mask.
603 */
604static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
605 u32 mask)
606{
607 u32 old_mask;
608
609 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
610 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
611
612 return old_mask;
613}
614
615/* Synchronize IRQ top- and bottom-half. 586/* Synchronize IRQ top- and bottom-half.
616 * IRQs must be masked before calling this. 587 * IRQs must be masked before calling this.
617 * This must not be called with the irq_lock held. 588 * This must not be called with the irq_lock held.
@@ -955,23 +926,54 @@ static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
955 size + sizeof(struct b43legacy_plcp_hdr6)); 926 size + sizeof(struct b43legacy_plcp_hdr6));
956} 927}
957 928
929/* Convert a b43legacy antenna number value to the PHY TX control value. */
930static u16 b43legacy_antenna_to_phyctl(int antenna)
931{
932 switch (antenna) {
933 case B43legacy_ANTENNA0:
934 return B43legacy_TX4_PHY_ANT0;
935 case B43legacy_ANTENNA1:
936 return B43legacy_TX4_PHY_ANT1;
937 }
938 return B43legacy_TX4_PHY_ANTLAST;
939}
940
958static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev, 941static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
959 u16 ram_offset, 942 u16 ram_offset,
960 u16 shm_size_offset, u8 rate) 943 u16 shm_size_offset)
961{ 944{
962 945
963 unsigned int i, len, variable_len; 946 unsigned int i, len, variable_len;
964 const struct ieee80211_mgmt *bcn; 947 const struct ieee80211_mgmt *bcn;
965 const u8 *ie; 948 const u8 *ie;
966 bool tim_found = 0; 949 bool tim_found = 0;
950 unsigned int rate;
951 u16 ctl;
952 int antenna;
953 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
967 954
968 bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data); 955 bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
969 len = min((size_t)dev->wl->current_beacon->len, 956 len = min((size_t)dev->wl->current_beacon->len,
970 0x200 - sizeof(struct b43legacy_plcp_hdr6)); 957 0x200 - sizeof(struct b43legacy_plcp_hdr6));
958 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
971 959
972 b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset, 960 b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
973 shm_size_offset, rate); 961 shm_size_offset, rate);
974 962
963 /* Write the PHY TX control parameters. */
964 antenna = B43legacy_ANTENNA_DEFAULT;
965 antenna = b43legacy_antenna_to_phyctl(antenna);
966 ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
967 B43legacy_SHM_SH_BEACPHYCTL);
968 /* We can't send beacons with short preamble. Would get PHY errors. */
969 ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
970 ctl &= ~B43legacy_TX4_PHY_ANT;
971 ctl &= ~B43legacy_TX4_PHY_ENC;
972 ctl |= antenna;
973 ctl |= B43legacy_TX4_PHY_ENC_CCK;
974 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
975 B43legacy_SHM_SH_BEACPHYCTL, ctl);
976
975 /* Find the position of the TIM and the DTIM_period value 977 /* Find the position of the TIM and the DTIM_period value
976 * and write them to SHM. */ 978 * and write them to SHM. */
977 ie = bcn->u.beacon.variable; 979 ie = bcn->u.beacon.variable;
@@ -1013,7 +1015,8 @@ static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
1013 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the " 1015 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1014 "beacon template packet. AP or IBSS operation " 1016 "beacon template packet. AP or IBSS operation "
1015 "may be broken.\n"); 1017 "may be broken.\n");
1016 } 1018 } else
1019 b43legacydbg(dev->wl, "Updated beacon template\n");
1017} 1020}
1018 1021
1019static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev, 1022static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
@@ -1025,7 +1028,7 @@ static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1025 __le16 dur; 1028 __le16 dur;
1026 1029
1027 plcp.data = 0; 1030 plcp.data = 0;
1028 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->bitrate); 1031 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1029 dur = ieee80211_generic_frame_duration(dev->wl->hw, 1032 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1030 dev->wl->vif, 1033 dev->wl->vif,
1031 size, 1034 size,
@@ -1129,10 +1132,103 @@ static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1129 0x200 - sizeof(struct b43legacy_plcp_hdr6)); 1132 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1130 b43legacy_write_template_common(dev, probe_resp_data, 1133 b43legacy_write_template_common(dev, probe_resp_data,
1131 size, ram_offset, 1134 size, ram_offset,
1132 shm_size_offset, rate->bitrate); 1135 shm_size_offset, rate->hw_value);
1133 kfree(probe_resp_data); 1136 kfree(probe_resp_data);
1134} 1137}
1135 1138
1139static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1140{
1141 struct b43legacy_wl *wl = dev->wl;
1142
1143 if (wl->beacon0_uploaded)
1144 return;
1145 b43legacy_write_beacon_template(dev, 0x68, 0x18);
1146 /* FIXME: Probe resp upload doesn't really belong here,
1147 * but we don't use that feature anyway. */
1148 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1149 &__b43legacy_ratetable[3]);
1150 wl->beacon0_uploaded = 1;
1151}
1152
1153static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1154{
1155 struct b43legacy_wl *wl = dev->wl;
1156
1157 if (wl->beacon1_uploaded)
1158 return;
1159 b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1160 wl->beacon1_uploaded = 1;
1161}
1162
1163static void handle_irq_beacon(struct b43legacy_wldev *dev)
1164{
1165 struct b43legacy_wl *wl = dev->wl;
1166 u32 cmd, beacon0_valid, beacon1_valid;
1167
1168 if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1169 return;
1170
1171 /* This is the bottom half of the asynchronous beacon update. */
1172
1173 /* Ignore interrupt in the future. */
1174 dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1175
1176 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1177 beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1178 beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1179
1180 /* Schedule interrupt manually, if busy. */
1181 if (beacon0_valid && beacon1_valid) {
1182 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1183 dev->irq_mask |= B43legacy_IRQ_BEACON;
1184 return;
1185 }
1186
1187 if (unlikely(wl->beacon_templates_virgin)) {
1188 /* We never uploaded a beacon before.
1189 * Upload both templates now, but only mark one valid. */
1190 wl->beacon_templates_virgin = 0;
1191 b43legacy_upload_beacon0(dev);
1192 b43legacy_upload_beacon1(dev);
1193 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1194 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1195 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1196 } else {
1197 if (!beacon0_valid) {
1198 b43legacy_upload_beacon0(dev);
1199 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1200 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1201 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1202 } else if (!beacon1_valid) {
1203 b43legacy_upload_beacon1(dev);
1204 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1205 cmd |= B43legacy_MACCMD_BEACON1_VALID;
1206 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1207 }
1208 }
1209}
1210
1211static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1212{
1213 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1214 beacon_update_trigger);
1215 struct b43legacy_wldev *dev;
1216
1217 mutex_lock(&wl->mutex);
1218 dev = wl->current_dev;
1219 if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1220 spin_lock_irq(&wl->irq_lock);
1221 /* Update beacon right away or defer to IRQ. */
1222 handle_irq_beacon(dev);
1223 /* The handler might have updated the IRQ mask. */
1224 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1225 dev->irq_mask);
1226 mmiowb();
1227 spin_unlock_irq(&wl->irq_lock);
1228 }
1229 mutex_unlock(&wl->mutex);
1230}
1231
1136/* Asynchronously update the packet templates in template RAM. 1232/* Asynchronously update the packet templates in template RAM.
1137 * Locking: Requires wl->irq_lock to be locked. */ 1233 * Locking: Requires wl->irq_lock to be locked. */
1138static void b43legacy_update_templates(struct b43legacy_wl *wl) 1234static void b43legacy_update_templates(struct b43legacy_wl *wl)
@@ -1156,54 +1252,24 @@ static void b43legacy_update_templates(struct b43legacy_wl *wl)
1156 wl->current_beacon = beacon; 1252 wl->current_beacon = beacon;
1157 wl->beacon0_uploaded = 0; 1253 wl->beacon0_uploaded = 0;
1158 wl->beacon1_uploaded = 0; 1254 wl->beacon1_uploaded = 0;
1255 queue_work(wl->hw->workqueue, &wl->beacon_update_trigger);
1159} 1256}
1160 1257
1161static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev, 1258static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1162 u16 beacon_int) 1259 u16 beacon_int)
1163{ 1260{
1164 b43legacy_time_lock(dev); 1261 b43legacy_time_lock(dev);
1165 if (dev->dev->id.revision >= 3) 1262 if (dev->dev->id.revision >= 3) {
1166 b43legacy_write32(dev, 0x188, (beacon_int << 16)); 1263 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1167 else { 1264 (beacon_int << 16));
1265 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1266 (beacon_int << 10));
1267 } else {
1168 b43legacy_write16(dev, 0x606, (beacon_int >> 6)); 1268 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1169 b43legacy_write16(dev, 0x610, beacon_int); 1269 b43legacy_write16(dev, 0x610, beacon_int);
1170 } 1270 }
1171 b43legacy_time_unlock(dev); 1271 b43legacy_time_unlock(dev);
1172} 1272 b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1173
1174static void handle_irq_beacon(struct b43legacy_wldev *dev)
1175{
1176 struct b43legacy_wl *wl = dev->wl;
1177 u32 cmd;
1178
1179 if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1180 return;
1181
1182 /* This is the bottom half of the asynchronous beacon update. */
1183
1184 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1185 if (!(cmd & B43legacy_MACCMD_BEACON0_VALID)) {
1186 if (!wl->beacon0_uploaded) {
1187 b43legacy_write_beacon_template(dev, 0x68,
1188 B43legacy_SHM_SH_BTL0,
1189 B43legacy_CCK_RATE_1MB);
1190 b43legacy_write_probe_resp_template(dev, 0x268,
1191 B43legacy_SHM_SH_PRTLEN,
1192 &__b43legacy_ratetable[3]);
1193 wl->beacon0_uploaded = 1;
1194 }
1195 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1196 }
1197 if (!(cmd & B43legacy_MACCMD_BEACON1_VALID)) {
1198 if (!wl->beacon1_uploaded) {
1199 b43legacy_write_beacon_template(dev, 0x468,
1200 B43legacy_SHM_SH_BTL1,
1201 B43legacy_CCK_RATE_1MB);
1202 wl->beacon1_uploaded = 1;
1203 }
1204 cmd |= B43legacy_MACCMD_BEACON1_VALID;
1205 }
1206 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1207} 1273}
1208 1274
1209static void handle_irq_ucode_debug(struct b43legacy_wldev *dev) 1275static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
@@ -1302,7 +1368,7 @@ static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1302 if (reason & B43legacy_IRQ_TX_OK) 1368 if (reason & B43legacy_IRQ_TX_OK)
1303 handle_irq_transmit_status(dev); 1369 handle_irq_transmit_status(dev);
1304 1370
1305 b43legacy_interrupt_enable(dev, dev->irq_savedstate); 1371 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1306 mmiowb(); 1372 mmiowb();
1307 spin_unlock_irqrestore(&dev->wl->irq_lock, flags); 1373 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1308} 1374}
@@ -1354,18 +1420,18 @@ static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1354 struct b43legacy_wldev *dev = dev_id; 1420 struct b43legacy_wldev *dev = dev_id;
1355 u32 reason; 1421 u32 reason;
1356 1422
1357 if (!dev) 1423 B43legacy_WARN_ON(!dev);
1358 return IRQ_NONE;
1359 1424
1360 spin_lock(&dev->wl->irq_lock); 1425 spin_lock(&dev->wl->irq_lock);
1361 1426
1362 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) 1427 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1428 /* This can only happen on shared IRQ lines. */
1363 goto out; 1429 goto out;
1364 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1430 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1365 if (reason == 0xffffffff) /* shared IRQ */ 1431 if (reason == 0xffffffff) /* shared IRQ */
1366 goto out; 1432 goto out;
1367 ret = IRQ_HANDLED; 1433 ret = IRQ_HANDLED;
1368 reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); 1434 reason &= dev->irq_mask;
1369 if (!reason) 1435 if (!reason)
1370 goto out; 1436 goto out;
1371 1437
@@ -1389,10 +1455,9 @@ static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1389 & 0x0000DC00; 1455 & 0x0000DC00;
1390 1456
1391 b43legacy_interrupt_ack(dev, reason); 1457 b43legacy_interrupt_ack(dev, reason);
1392 /* disable all IRQs. They are enabled again in the bottom half. */ 1458 /* Disable all IRQs. They are enabled again in the bottom half. */
1393 dev->irq_savedstate = b43legacy_interrupt_disable(dev, 1459 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1394 B43legacy_IRQ_ALL); 1460 /* Save the reason code and call our bottom half. */
1395 /* save the reason code and call our bottom half. */
1396 dev->irq_reason = reason; 1461 dev->irq_reason = reason;
1397 tasklet_schedule(&dev->isr_tasklet); 1462 tasklet_schedule(&dev->isr_tasklet);
1398out: 1463out:
@@ -1852,7 +1917,8 @@ void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1852 1917
1853 /* Re-enable IRQs. */ 1918 /* Re-enable IRQs. */
1854 spin_lock_irq(&dev->wl->irq_lock); 1919 spin_lock_irq(&dev->wl->irq_lock);
1855 b43legacy_interrupt_enable(dev, dev->irq_savedstate); 1920 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1921 dev->irq_mask);
1856 spin_unlock_irq(&dev->wl->irq_lock); 1922 spin_unlock_irq(&dev->wl->irq_lock);
1857 } 1923 }
1858} 1924}
@@ -1871,10 +1937,9 @@ void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1871 /* Mask IRQs before suspending MAC. Otherwise 1937 /* Mask IRQs before suspending MAC. Otherwise
1872 * the MAC stays busy and won't suspend. */ 1938 * the MAC stays busy and won't suspend. */
1873 spin_lock_irq(&dev->wl->irq_lock); 1939 spin_lock_irq(&dev->wl->irq_lock);
1874 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL); 1940 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1875 spin_unlock_irq(&dev->wl->irq_lock); 1941 spin_unlock_irq(&dev->wl->irq_lock);
1876 b43legacy_synchronize_irq(dev); 1942 b43legacy_synchronize_irq(dev);
1877 dev->irq_savedstate = tmp;
1878 1943
1879 b43legacy_power_saving_ctl_bits(dev, -1, 1); 1944 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1880 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, 1945 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
@@ -2297,6 +2362,7 @@ static void b43legacy_security_init(struct b43legacy_wldev *dev)
2297 dev->max_nr_keys - 8); 2362 dev->max_nr_keys - 8);
2298} 2363}
2299 2364
2365#ifdef CONFIG_B43LEGACY_HWRNG
2300static int b43legacy_rng_read(struct hwrng *rng, u32 *data) 2366static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2301{ 2367{
2302 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv; 2368 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
@@ -2312,17 +2378,21 @@ static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2312 2378
2313 return (sizeof(u16)); 2379 return (sizeof(u16));
2314} 2380}
2381#endif
2315 2382
2316static void b43legacy_rng_exit(struct b43legacy_wl *wl) 2383static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2317{ 2384{
2385#ifdef CONFIG_B43LEGACY_HWRNG
2318 if (wl->rng_initialized) 2386 if (wl->rng_initialized)
2319 hwrng_unregister(&wl->rng); 2387 hwrng_unregister(&wl->rng);
2388#endif
2320} 2389}
2321 2390
2322static int b43legacy_rng_init(struct b43legacy_wl *wl) 2391static int b43legacy_rng_init(struct b43legacy_wl *wl)
2323{ 2392{
2324 int err; 2393 int err = 0;
2325 2394
2395#ifdef CONFIG_B43LEGACY_HWRNG
2326 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name), 2396 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2327 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy)); 2397 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2328 wl->rng.name = wl->rng_name; 2398 wl->rng.name = wl->rng_name;
@@ -2336,6 +2406,7 @@ static int b43legacy_rng_init(struct b43legacy_wl *wl)
2336 "number generator (%d)\n", err); 2406 "number generator (%d)\n", err);
2337 } 2407 }
2338 2408
2409#endif
2339 return err; 2410 return err;
2340} 2411}
2341 2412
@@ -2557,7 +2628,6 @@ static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2557 int antenna_tx; 2628 int antenna_tx;
2558 int antenna_rx; 2629 int antenna_rx;
2559 int err = 0; 2630 int err = 0;
2560 u32 savedirqs;
2561 2631
2562 antenna_tx = B43legacy_ANTENNA_DEFAULT; 2632 antenna_tx = B43legacy_ANTENNA_DEFAULT;
2563 antenna_rx = B43legacy_ANTENNA_DEFAULT; 2633 antenna_rx = B43legacy_ANTENNA_DEFAULT;
@@ -2597,7 +2667,7 @@ static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2597 spin_unlock_irqrestore(&wl->irq_lock, flags); 2667 spin_unlock_irqrestore(&wl->irq_lock, flags);
2598 goto out_unlock_mutex; 2668 goto out_unlock_mutex;
2599 } 2669 }
2600 savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL); 2670 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2601 spin_unlock_irqrestore(&wl->irq_lock, flags); 2671 spin_unlock_irqrestore(&wl->irq_lock, flags);
2602 b43legacy_synchronize_irq(dev); 2672 b43legacy_synchronize_irq(dev);
2603 2673
@@ -2619,11 +2689,6 @@ static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2619 /* Antennas for RX and management frame TX. */ 2689 /* Antennas for RX and management frame TX. */
2620 b43legacy_mgmtframe_txantenna(dev, antenna_tx); 2690 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2621 2691
2622 /* Update templates for AP mode. */
2623 if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2624 b43legacy_set_beacon_int(dev, conf->beacon_int);
2625
2626
2627 if (!!conf->radio_enabled != phy->radio_on) { 2692 if (!!conf->radio_enabled != phy->radio_on) {
2628 if (conf->radio_enabled) { 2693 if (conf->radio_enabled) {
2629 b43legacy_radio_turn_on(dev); 2694 b43legacy_radio_turn_on(dev);
@@ -2641,7 +2706,7 @@ static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2641 } 2706 }
2642 2707
2643 spin_lock_irqsave(&wl->irq_lock, flags); 2708 spin_lock_irqsave(&wl->irq_lock, flags);
2644 b43legacy_interrupt_enable(dev, savedirqs); 2709 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2645 mmiowb(); 2710 mmiowb();
2646 spin_unlock_irqrestore(&wl->irq_lock, flags); 2711 spin_unlock_irqrestore(&wl->irq_lock, flags);
2647out_unlock_mutex: 2712out_unlock_mutex:
@@ -2704,9 +2769,9 @@ static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2704 struct b43legacy_wldev *dev; 2769 struct b43legacy_wldev *dev;
2705 struct b43legacy_phy *phy; 2770 struct b43legacy_phy *phy;
2706 unsigned long flags; 2771 unsigned long flags;
2707 u32 savedirqs;
2708 2772
2709 mutex_lock(&wl->mutex); 2773 mutex_lock(&wl->mutex);
2774 B43legacy_WARN_ON(wl->vif != vif);
2710 2775
2711 dev = wl->current_dev; 2776 dev = wl->current_dev;
2712 phy = &dev->phy; 2777 phy = &dev->phy;
@@ -2719,12 +2784,35 @@ static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2719 spin_unlock_irqrestore(&wl->irq_lock, flags); 2784 spin_unlock_irqrestore(&wl->irq_lock, flags);
2720 goto out_unlock_mutex; 2785 goto out_unlock_mutex;
2721 } 2786 }
2722 savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL); 2787 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2788
2789 if (changed & BSS_CHANGED_BSSID) {
2790 b43legacy_synchronize_irq(dev);
2791
2792 if (conf->bssid)
2793 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2794 else
2795 memset(wl->bssid, 0, ETH_ALEN);
2796 }
2797
2798 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2799 if (changed & BSS_CHANGED_BEACON &&
2800 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2801 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2802 b43legacy_update_templates(wl);
2803
2804 if (changed & BSS_CHANGED_BSSID)
2805 b43legacy_write_mac_bssid_templates(dev);
2806 }
2723 spin_unlock_irqrestore(&wl->irq_lock, flags); 2807 spin_unlock_irqrestore(&wl->irq_lock, flags);
2724 b43legacy_synchronize_irq(dev);
2725 2808
2726 b43legacy_mac_suspend(dev); 2809 b43legacy_mac_suspend(dev);
2727 2810
2811 if (changed & BSS_CHANGED_BEACON_INT &&
2812 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2813 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2814 b43legacy_set_beacon_int(dev, conf->beacon_int);
2815
2728 if (changed & BSS_CHANGED_BASIC_RATES) 2816 if (changed & BSS_CHANGED_BASIC_RATES)
2729 b43legacy_update_basic_rates(dev, conf->basic_rates); 2817 b43legacy_update_basic_rates(dev, conf->basic_rates);
2730 2818
@@ -2738,14 +2826,12 @@ static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2738 b43legacy_mac_enable(dev); 2826 b43legacy_mac_enable(dev);
2739 2827
2740 spin_lock_irqsave(&wl->irq_lock, flags); 2828 spin_lock_irqsave(&wl->irq_lock, flags);
2741 b43legacy_interrupt_enable(dev, savedirqs); 2829 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2742 /* XXX: why? */ 2830 /* XXX: why? */
2743 mmiowb(); 2831 mmiowb();
2744 spin_unlock_irqrestore(&wl->irq_lock, flags); 2832 spin_unlock_irqrestore(&wl->irq_lock, flags);
2745 out_unlock_mutex: 2833 out_unlock_mutex:
2746 mutex_unlock(&wl->mutex); 2834 mutex_unlock(&wl->mutex);
2747
2748 return;
2749} 2835}
2750 2836
2751static void b43legacy_op_configure_filter(struct ieee80211_hw *hw, 2837static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
@@ -2787,40 +2873,6 @@ static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2787 spin_unlock_irqrestore(&wl->irq_lock, flags); 2873 spin_unlock_irqrestore(&wl->irq_lock, flags);
2788} 2874}
2789 2875
2790static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2791 struct ieee80211_vif *vif,
2792 struct ieee80211_if_conf *conf)
2793{
2794 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2795 struct b43legacy_wldev *dev = wl->current_dev;
2796 unsigned long flags;
2797
2798 if (!dev)
2799 return -ENODEV;
2800 mutex_lock(&wl->mutex);
2801 spin_lock_irqsave(&wl->irq_lock, flags);
2802 B43legacy_WARN_ON(wl->vif != vif);
2803 if (conf->bssid)
2804 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2805 else
2806 memset(wl->bssid, 0, ETH_ALEN);
2807 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2808 if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP)) {
2809 B43legacy_WARN_ON(vif->type != NL80211_IFTYPE_AP);
2810 if (conf->changed & IEEE80211_IFCC_BEACON)
2811 b43legacy_update_templates(wl);
2812 } else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)) {
2813 if (conf->changed & IEEE80211_IFCC_BEACON)
2814 b43legacy_update_templates(wl);
2815 }
2816 b43legacy_write_mac_bssid_templates(dev);
2817 }
2818 spin_unlock_irqrestore(&wl->irq_lock, flags);
2819 mutex_unlock(&wl->mutex);
2820
2821 return 0;
2822}
2823
2824/* Locking: wl->mutex */ 2876/* Locking: wl->mutex */
2825static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev) 2877static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2826{ 2878{
@@ -2834,8 +2886,7 @@ static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2834 * setting the status to INITIALIZED, as the interrupt handler 2886 * setting the status to INITIALIZED, as the interrupt handler
2835 * won't care about IRQs then. */ 2887 * won't care about IRQs then. */
2836 spin_lock_irqsave(&wl->irq_lock, flags); 2888 spin_lock_irqsave(&wl->irq_lock, flags);
2837 dev->irq_savedstate = b43legacy_interrupt_disable(dev, 2889 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2838 B43legacy_IRQ_ALL);
2839 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */ 2890 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2840 spin_unlock_irqrestore(&wl->irq_lock, flags); 2891 spin_unlock_irqrestore(&wl->irq_lock, flags);
2841 b43legacy_synchronize_irq(dev); 2892 b43legacy_synchronize_irq(dev);
@@ -2875,7 +2926,7 @@ static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2875 2926
2876 /* Start data flow (TX/RX) */ 2927 /* Start data flow (TX/RX) */
2877 b43legacy_mac_enable(dev); 2928 b43legacy_mac_enable(dev);
2878 b43legacy_interrupt_enable(dev, dev->irq_savedstate); 2929 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2879 2930
2880 /* Start maintenance work */ 2931 /* Start maintenance work */
2881 b43legacy_periodic_tasks_setup(dev); 2932 b43legacy_periodic_tasks_setup(dev);
@@ -3038,7 +3089,7 @@ static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3038 /* IRQ related flags */ 3089 /* IRQ related flags */
3039 dev->irq_reason = 0; 3090 dev->irq_reason = 0;
3040 memset(dev->dma_reason, 0, sizeof(dev->dma_reason)); 3091 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3041 dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE; 3092 dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3042 3093
3043 dev->mac_suspended = 1; 3094 dev->mac_suspended = 1;
3044 3095
@@ -3392,6 +3443,9 @@ static int b43legacy_op_start(struct ieee80211_hw *hw)
3392 memset(wl->bssid, 0, ETH_ALEN); 3443 memset(wl->bssid, 0, ETH_ALEN);
3393 memset(wl->mac_addr, 0, ETH_ALEN); 3444 memset(wl->mac_addr, 0, ETH_ALEN);
3394 wl->filter_flags = 0; 3445 wl->filter_flags = 0;
3446 wl->beacon0_uploaded = 0;
3447 wl->beacon1_uploaded = 0;
3448 wl->beacon_templates_virgin = 1;
3395 3449
3396 mutex_lock(&wl->mutex); 3450 mutex_lock(&wl->mutex);
3397 3451
@@ -3429,6 +3483,7 @@ static void b43legacy_op_stop(struct ieee80211_hw *hw)
3429 struct b43legacy_wldev *dev = wl->current_dev; 3483 struct b43legacy_wldev *dev = wl->current_dev;
3430 3484
3431 b43legacy_rfkill_exit(dev); 3485 b43legacy_rfkill_exit(dev);
3486 cancel_work_sync(&(wl->beacon_update_trigger));
3432 3487
3433 mutex_lock(&wl->mutex); 3488 mutex_lock(&wl->mutex);
3434 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED) 3489 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
@@ -3457,7 +3512,6 @@ static const struct ieee80211_ops b43legacy_hw_ops = {
3457 .remove_interface = b43legacy_op_remove_interface, 3512 .remove_interface = b43legacy_op_remove_interface,
3458 .config = b43legacy_op_dev_config, 3513 .config = b43legacy_op_dev_config,
3459 .bss_info_changed = b43legacy_op_bss_info_changed, 3514 .bss_info_changed = b43legacy_op_bss_info_changed,
3460 .config_interface = b43legacy_op_config_interface,
3461 .configure_filter = b43legacy_op_configure_filter, 3515 .configure_filter = b43legacy_op_configure_filter,
3462 .get_stats = b43legacy_op_get_stats, 3516 .get_stats = b43legacy_op_get_stats,
3463 .get_tx_stats = b43legacy_op_get_tx_stats, 3517 .get_tx_stats = b43legacy_op_get_tx_stats,
@@ -3760,6 +3814,7 @@ static int b43legacy_wireless_init(struct ssb_device *dev)
3760 spin_lock_init(&wl->leds_lock); 3814 spin_lock_init(&wl->leds_lock);
3761 mutex_init(&wl->mutex); 3815 mutex_init(&wl->mutex);
3762 INIT_LIST_HEAD(&wl->devlist); 3816 INIT_LIST_HEAD(&wl->devlist);
3817 INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3763 3818
3764 ssb_set_devtypedata(dev, wl); 3819 ssb_set_devtypedata(dev, wl);
3765 b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id); 3820 b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
diff --git a/drivers/net/wireless/b43legacy/pio.c b/drivers/net/wireless/b43legacy/pio.c
index 746d5361bba0..51866c9a2769 100644
--- a/drivers/net/wireless/b43legacy/pio.c
+++ b/drivers/net/wireless/b43legacy/pio.c
@@ -443,7 +443,7 @@ int b43legacy_pio_init(struct b43legacy_wldev *dev)
443 pio->queue3 = queue; 443 pio->queue3 = queue;
444 444
445 if (dev->dev->id.revision < 3) 445 if (dev->dev->id.revision < 3)
446 dev->irq_savedstate |= B43legacy_IRQ_PIO_WORKAROUND; 446 dev->irq_mask |= B43legacy_IRQ_PIO_WORKAROUND;
447 447
448 b43legacydbg(dev->wl, "PIO initialized\n"); 448 b43legacydbg(dev->wl, "PIO initialized\n");
449 err = 0; 449 err = 0;
diff --git a/drivers/net/wireless/b43legacy/rfkill.c b/drivers/net/wireless/b43legacy/rfkill.c
index b32bf6a94f19..4b0c7d27a51f 100644
--- a/drivers/net/wireless/b43legacy/rfkill.c
+++ b/drivers/net/wireless/b43legacy/rfkill.c
@@ -142,7 +142,6 @@ void b43legacy_rfkill_init(struct b43legacy_wldev *dev)
142 rfk->rfkill->state = RFKILL_STATE_UNBLOCKED; 142 rfk->rfkill->state = RFKILL_STATE_UNBLOCKED;
143 rfk->rfkill->data = dev; 143 rfk->rfkill->data = dev;
144 rfk->rfkill->toggle_radio = b43legacy_rfkill_soft_toggle; 144 rfk->rfkill->toggle_radio = b43legacy_rfkill_soft_toggle;
145 rfk->rfkill->user_claim_unsupported = 1;
146 145
147 rfk->poll_dev = input_allocate_polled_device(); 146 rfk->poll_dev = input_allocate_polled_device();
148 if (!rfk->poll_dev) { 147 if (!rfk->poll_dev) {
diff --git a/drivers/net/wireless/b43legacy/xmit.c b/drivers/net/wireless/b43legacy/xmit.c
index 12fca99f7578..b8e39dd06e99 100644
--- a/drivers/net/wireless/b43legacy/xmit.c
+++ b/drivers/net/wireless/b43legacy/xmit.c
@@ -274,7 +274,7 @@ static int generate_txhdr_fw3(struct b43legacy_wldev *dev,
274 274
275 /* PHY TX Control word */ 275 /* PHY TX Control word */
276 if (rate_ofdm) 276 if (rate_ofdm)
277 phy_ctl |= B43legacy_TX4_PHY_OFDM; 277 phy_ctl |= B43legacy_TX4_PHY_ENC_OFDM;
278 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 278 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
279 phy_ctl |= B43legacy_TX4_PHY_SHORTPRMBL; 279 phy_ctl |= B43legacy_TX4_PHY_SHORTPRMBL;
280 switch (info->antenna_sel_tx) { 280 switch (info->antenna_sel_tx) {
diff --git a/drivers/net/wireless/b43legacy/xmit.h b/drivers/net/wireless/b43legacy/xmit.h
index 62e09d02788f..91633087a20b 100644
--- a/drivers/net/wireless/b43legacy/xmit.h
+++ b/drivers/net/wireless/b43legacy/xmit.h
@@ -67,7 +67,9 @@ struct b43legacy_txhdr_fw3 {
67#define B43legacy_TX4_EFT_RTSFBOFDM 0x0010 /* RTS/CTS fallback rate type */ 67#define B43legacy_TX4_EFT_RTSFBOFDM 0x0010 /* RTS/CTS fallback rate type */
68 68
69/* PHY TX control word */ 69/* PHY TX control word */
70#define B43legacy_TX4_PHY_OFDM 0x0001 /* Data frame rate type */ 70#define B43legacy_TX4_PHY_ENC 0x0003 /* Data frame encoding */
71#define B43legacy_TX4_PHY_ENC_CCK 0x0000 /* CCK */
72#define B43legacy_TX4_PHY_ENC_OFDM 0x0001 /* Data frame rate type */
71#define B43legacy_TX4_PHY_SHORTPRMBL 0x0010 /* Use short preamble */ 73#define B43legacy_TX4_PHY_SHORTPRMBL 0x0010 /* Use short preamble */
72#define B43legacy_TX4_PHY_ANT 0x03C0 /* Antenna selection */ 74#define B43legacy_TX4_PHY_ANT 0x03C0 /* Antenna selection */
73#define B43legacy_TX4_PHY_ANT0 0x0000 /* Use antenna 0 */ 75#define B43legacy_TX4_PHY_ANT0 0x0000 /* Use antenna 0 */
diff --git a/drivers/net/wireless/hostap/hostap_hw.c b/drivers/net/wireless/hostap/hostap_hw.c
index 3dad1cf8f241..ff9b5c882184 100644
--- a/drivers/net/wireless/hostap/hostap_hw.c
+++ b/drivers/net/wireless/hostap/hostap_hw.c
@@ -1423,7 +1423,7 @@ static int prism2_hw_init2(struct net_device *dev, int initial)
1423 prism2_check_sta_fw_version(local); 1423 prism2_check_sta_fw_version(local);
1424 1424
1425 if (hfa384x_get_rid(dev, HFA384X_RID_CNFOWNMACADDR, 1425 if (hfa384x_get_rid(dev, HFA384X_RID_CNFOWNMACADDR,
1426 &dev->dev_addr, 6, 1) < 0) { 1426 dev->dev_addr, 6, 1) < 0) {
1427 printk("%s: could not get own MAC address\n", 1427 printk("%s: could not get own MAC address\n",
1428 dev->name); 1428 dev->name);
1429 } 1429 }
diff --git a/drivers/net/wireless/hostap/hostap_plx.c b/drivers/net/wireless/hostap/hostap_plx.c
index cbf15d703201..0e5d51086a44 100644
--- a/drivers/net/wireless/hostap/hostap_plx.c
+++ b/drivers/net/wireless/hostap/hostap_plx.c
@@ -435,7 +435,7 @@ static int prism2_plx_probe(struct pci_dev *pdev,
435 unsigned long pccard_attr_mem; 435 unsigned long pccard_attr_mem;
436 unsigned int pccard_attr_len; 436 unsigned int pccard_attr_len;
437 void __iomem *attr_mem = NULL; 437 void __iomem *attr_mem = NULL;
438 unsigned int cor_offset, cor_index; 438 unsigned int cor_offset = 0, cor_index = 0;
439 u32 reg; 439 u32 reg;
440 local_info_t *local = NULL; 440 local_info_t *local = NULL;
441 struct net_device *dev = NULL; 441 struct net_device *dev = NULL;
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c
index 97e5647ff050..742432388ca3 100644
--- a/drivers/net/wireless/ipw2x00/ipw2100.c
+++ b/drivers/net/wireless/ipw2x00/ipw2100.c
@@ -3488,7 +3488,7 @@ static DEVICE_ATTR(pci, S_IRUGO, show_pci, NULL);
3488static ssize_t show_cfg(struct device *d, struct device_attribute *attr, 3488static ssize_t show_cfg(struct device *d, struct device_attribute *attr,
3489 char *buf) 3489 char *buf)
3490{ 3490{
3491 struct ipw2100_priv *p = d->driver_data; 3491 struct ipw2100_priv *p = dev_get_drvdata(d);
3492 return sprintf(buf, "0x%08x\n", (int)p->config); 3492 return sprintf(buf, "0x%08x\n", (int)p->config);
3493} 3493}
3494 3494
@@ -3497,7 +3497,7 @@ static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL);
3497static ssize_t show_status(struct device *d, struct device_attribute *attr, 3497static ssize_t show_status(struct device *d, struct device_attribute *attr,
3498 char *buf) 3498 char *buf)
3499{ 3499{
3500 struct ipw2100_priv *p = d->driver_data; 3500 struct ipw2100_priv *p = dev_get_drvdata(d);
3501 return sprintf(buf, "0x%08x\n", (int)p->status); 3501 return sprintf(buf, "0x%08x\n", (int)p->status);
3502} 3502}
3503 3503
@@ -3506,7 +3506,7 @@ static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3506static ssize_t show_capability(struct device *d, struct device_attribute *attr, 3506static ssize_t show_capability(struct device *d, struct device_attribute *attr,
3507 char *buf) 3507 char *buf)
3508{ 3508{
3509 struct ipw2100_priv *p = d->driver_data; 3509 struct ipw2100_priv *p = dev_get_drvdata(d);
3510 return sprintf(buf, "0x%08x\n", (int)p->capability); 3510 return sprintf(buf, "0x%08x\n", (int)p->capability);
3511} 3511}
3512 3512
@@ -4224,7 +4224,7 @@ static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr,
4224 1 - SW based RF kill active (sysfs) 4224 1 - SW based RF kill active (sysfs)
4225 2 - HW based RF kill active 4225 2 - HW based RF kill active
4226 3 - Both HW and SW baed RF kill active */ 4226 3 - Both HW and SW baed RF kill active */
4227 struct ipw2100_priv *priv = (struct ipw2100_priv *)d->driver_data; 4227 struct ipw2100_priv *priv = dev_get_drvdata(d);
4228 int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) | 4228 int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) |
4229 (rf_kill_active(priv) ? 0x2 : 0x0); 4229 (rf_kill_active(priv) ? 0x2 : 0x0);
4230 return sprintf(buf, "%i\n", val); 4230 return sprintf(buf, "%i\n", val);
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c
index bd4dbcfe1bbe..c3b3dfe43d1a 100644
--- a/drivers/net/wireless/ipw2x00/ipw2200.c
+++ b/drivers/net/wireless/ipw2x00/ipw2200.c
@@ -1527,7 +1527,7 @@ static DEVICE_ATTR(led, S_IWUSR | S_IRUGO, show_led, store_led);
1527static ssize_t show_status(struct device *d, 1527static ssize_t show_status(struct device *d,
1528 struct device_attribute *attr, char *buf) 1528 struct device_attribute *attr, char *buf)
1529{ 1529{
1530 struct ipw_priv *p = d->driver_data; 1530 struct ipw_priv *p = dev_get_drvdata(d);
1531 return sprintf(buf, "0x%08x\n", (int)p->status); 1531 return sprintf(buf, "0x%08x\n", (int)p->status);
1532} 1532}
1533 1533
@@ -1536,7 +1536,7 @@ static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
1536static ssize_t show_cfg(struct device *d, struct device_attribute *attr, 1536static ssize_t show_cfg(struct device *d, struct device_attribute *attr,
1537 char *buf) 1537 char *buf)
1538{ 1538{
1539 struct ipw_priv *p = d->driver_data; 1539 struct ipw_priv *p = dev_get_drvdata(d);
1540 return sprintf(buf, "0x%08x\n", (int)p->config); 1540 return sprintf(buf, "0x%08x\n", (int)p->config);
1541} 1541}
1542 1542
@@ -1545,7 +1545,7 @@ static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL);
1545static ssize_t show_nic_type(struct device *d, 1545static ssize_t show_nic_type(struct device *d,
1546 struct device_attribute *attr, char *buf) 1546 struct device_attribute *attr, char *buf)
1547{ 1547{
1548 struct ipw_priv *priv = d->driver_data; 1548 struct ipw_priv *priv = dev_get_drvdata(d);
1549 return sprintf(buf, "TYPE: %d\n", priv->nic_type); 1549 return sprintf(buf, "TYPE: %d\n", priv->nic_type);
1550} 1550}
1551 1551
@@ -1555,7 +1555,7 @@ static ssize_t show_ucode_version(struct device *d,
1555 struct device_attribute *attr, char *buf) 1555 struct device_attribute *attr, char *buf)
1556{ 1556{
1557 u32 len = sizeof(u32), tmp = 0; 1557 u32 len = sizeof(u32), tmp = 0;
1558 struct ipw_priv *p = d->driver_data; 1558 struct ipw_priv *p = dev_get_drvdata(d);
1559 1559
1560 if (ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len)) 1560 if (ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len))
1561 return 0; 1561 return 0;
@@ -1569,7 +1569,7 @@ static ssize_t show_rtc(struct device *d, struct device_attribute *attr,
1569 char *buf) 1569 char *buf)
1570{ 1570{
1571 u32 len = sizeof(u32), tmp = 0; 1571 u32 len = sizeof(u32), tmp = 0;
1572 struct ipw_priv *p = d->driver_data; 1572 struct ipw_priv *p = dev_get_drvdata(d);
1573 1573
1574 if (ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len)) 1574 if (ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len))
1575 return 0; 1575 return 0;
@@ -1586,14 +1586,15 @@ static DEVICE_ATTR(rtc, S_IWUSR | S_IRUGO, show_rtc, NULL);
1586static ssize_t show_eeprom_delay(struct device *d, 1586static ssize_t show_eeprom_delay(struct device *d,
1587 struct device_attribute *attr, char *buf) 1587 struct device_attribute *attr, char *buf)
1588{ 1588{
1589 int n = ((struct ipw_priv *)d->driver_data)->eeprom_delay; 1589 struct ipw_priv *p = dev_get_drvdata(d);
1590 int n = p->eeprom_delay;
1590 return sprintf(buf, "%i\n", n); 1591 return sprintf(buf, "%i\n", n);
1591} 1592}
1592static ssize_t store_eeprom_delay(struct device *d, 1593static ssize_t store_eeprom_delay(struct device *d,
1593 struct device_attribute *attr, 1594 struct device_attribute *attr,
1594 const char *buf, size_t count) 1595 const char *buf, size_t count)
1595{ 1596{
1596 struct ipw_priv *p = d->driver_data; 1597 struct ipw_priv *p = dev_get_drvdata(d);
1597 sscanf(buf, "%i", &p->eeprom_delay); 1598 sscanf(buf, "%i", &p->eeprom_delay);
1598 return strnlen(buf, count); 1599 return strnlen(buf, count);
1599} 1600}
@@ -1605,7 +1606,7 @@ static ssize_t show_command_event_reg(struct device *d,
1605 struct device_attribute *attr, char *buf) 1606 struct device_attribute *attr, char *buf)
1606{ 1607{
1607 u32 reg = 0; 1608 u32 reg = 0;
1608 struct ipw_priv *p = d->driver_data; 1609 struct ipw_priv *p = dev_get_drvdata(d);
1609 1610
1610 reg = ipw_read_reg32(p, IPW_INTERNAL_CMD_EVENT); 1611 reg = ipw_read_reg32(p, IPW_INTERNAL_CMD_EVENT);
1611 return sprintf(buf, "0x%08x\n", reg); 1612 return sprintf(buf, "0x%08x\n", reg);
@@ -1615,7 +1616,7 @@ static ssize_t store_command_event_reg(struct device *d,
1615 const char *buf, size_t count) 1616 const char *buf, size_t count)
1616{ 1617{
1617 u32 reg; 1618 u32 reg;
1618 struct ipw_priv *p = d->driver_data; 1619 struct ipw_priv *p = dev_get_drvdata(d);
1619 1620
1620 sscanf(buf, "%x", &reg); 1621 sscanf(buf, "%x", &reg);
1621 ipw_write_reg32(p, IPW_INTERNAL_CMD_EVENT, reg); 1622 ipw_write_reg32(p, IPW_INTERNAL_CMD_EVENT, reg);
@@ -1629,7 +1630,7 @@ static ssize_t show_mem_gpio_reg(struct device *d,
1629 struct device_attribute *attr, char *buf) 1630 struct device_attribute *attr, char *buf)
1630{ 1631{
1631 u32 reg = 0; 1632 u32 reg = 0;
1632 struct ipw_priv *p = d->driver_data; 1633 struct ipw_priv *p = dev_get_drvdata(d);
1633 1634
1634 reg = ipw_read_reg32(p, 0x301100); 1635 reg = ipw_read_reg32(p, 0x301100);
1635 return sprintf(buf, "0x%08x\n", reg); 1636 return sprintf(buf, "0x%08x\n", reg);
@@ -1639,7 +1640,7 @@ static ssize_t store_mem_gpio_reg(struct device *d,
1639 const char *buf, size_t count) 1640 const char *buf, size_t count)
1640{ 1641{
1641 u32 reg; 1642 u32 reg;
1642 struct ipw_priv *p = d->driver_data; 1643 struct ipw_priv *p = dev_get_drvdata(d);
1643 1644
1644 sscanf(buf, "%x", &reg); 1645 sscanf(buf, "%x", &reg);
1645 ipw_write_reg32(p, 0x301100, reg); 1646 ipw_write_reg32(p, 0x301100, reg);
@@ -1653,7 +1654,7 @@ static ssize_t show_indirect_dword(struct device *d,
1653 struct device_attribute *attr, char *buf) 1654 struct device_attribute *attr, char *buf)
1654{ 1655{
1655 u32 reg = 0; 1656 u32 reg = 0;
1656 struct ipw_priv *priv = d->driver_data; 1657 struct ipw_priv *priv = dev_get_drvdata(d);
1657 1658
1658 if (priv->status & STATUS_INDIRECT_DWORD) 1659 if (priv->status & STATUS_INDIRECT_DWORD)
1659 reg = ipw_read_reg32(priv, priv->indirect_dword); 1660 reg = ipw_read_reg32(priv, priv->indirect_dword);
@@ -1666,7 +1667,7 @@ static ssize_t store_indirect_dword(struct device *d,
1666 struct device_attribute *attr, 1667 struct device_attribute *attr,
1667 const char *buf, size_t count) 1668 const char *buf, size_t count)
1668{ 1669{
1669 struct ipw_priv *priv = d->driver_data; 1670 struct ipw_priv *priv = dev_get_drvdata(d);
1670 1671
1671 sscanf(buf, "%x", &priv->indirect_dword); 1672 sscanf(buf, "%x", &priv->indirect_dword);
1672 priv->status |= STATUS_INDIRECT_DWORD; 1673 priv->status |= STATUS_INDIRECT_DWORD;
@@ -1680,7 +1681,7 @@ static ssize_t show_indirect_byte(struct device *d,
1680 struct device_attribute *attr, char *buf) 1681 struct device_attribute *attr, char *buf)
1681{ 1682{
1682 u8 reg = 0; 1683 u8 reg = 0;
1683 struct ipw_priv *priv = d->driver_data; 1684 struct ipw_priv *priv = dev_get_drvdata(d);
1684 1685
1685 if (priv->status & STATUS_INDIRECT_BYTE) 1686 if (priv->status & STATUS_INDIRECT_BYTE)
1686 reg = ipw_read_reg8(priv, priv->indirect_byte); 1687 reg = ipw_read_reg8(priv, priv->indirect_byte);
@@ -1693,7 +1694,7 @@ static ssize_t store_indirect_byte(struct device *d,
1693 struct device_attribute *attr, 1694 struct device_attribute *attr,
1694 const char *buf, size_t count) 1695 const char *buf, size_t count)
1695{ 1696{
1696 struct ipw_priv *priv = d->driver_data; 1697 struct ipw_priv *priv = dev_get_drvdata(d);
1697 1698
1698 sscanf(buf, "%x", &priv->indirect_byte); 1699 sscanf(buf, "%x", &priv->indirect_byte);
1699 priv->status |= STATUS_INDIRECT_BYTE; 1700 priv->status |= STATUS_INDIRECT_BYTE;
@@ -1707,7 +1708,7 @@ static ssize_t show_direct_dword(struct device *d,
1707 struct device_attribute *attr, char *buf) 1708 struct device_attribute *attr, char *buf)
1708{ 1709{
1709 u32 reg = 0; 1710 u32 reg = 0;
1710 struct ipw_priv *priv = d->driver_data; 1711 struct ipw_priv *priv = dev_get_drvdata(d);
1711 1712
1712 if (priv->status & STATUS_DIRECT_DWORD) 1713 if (priv->status & STATUS_DIRECT_DWORD)
1713 reg = ipw_read32(priv, priv->direct_dword); 1714 reg = ipw_read32(priv, priv->direct_dword);
@@ -1720,7 +1721,7 @@ static ssize_t store_direct_dword(struct device *d,
1720 struct device_attribute *attr, 1721 struct device_attribute *attr,
1721 const char *buf, size_t count) 1722 const char *buf, size_t count)
1722{ 1723{
1723 struct ipw_priv *priv = d->driver_data; 1724 struct ipw_priv *priv = dev_get_drvdata(d);
1724 1725
1725 sscanf(buf, "%x", &priv->direct_dword); 1726 sscanf(buf, "%x", &priv->direct_dword);
1726 priv->status |= STATUS_DIRECT_DWORD; 1727 priv->status |= STATUS_DIRECT_DWORD;
@@ -1747,7 +1748,7 @@ static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr,
1747 1 - SW based RF kill active (sysfs) 1748 1 - SW based RF kill active (sysfs)
1748 2 - HW based RF kill active 1749 2 - HW based RF kill active
1749 3 - Both HW and SW baed RF kill active */ 1750 3 - Both HW and SW baed RF kill active */
1750 struct ipw_priv *priv = d->driver_data; 1751 struct ipw_priv *priv = dev_get_drvdata(d);
1751 int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) | 1752 int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) |
1752 (rf_kill_active(priv) ? 0x2 : 0x0); 1753 (rf_kill_active(priv) ? 0x2 : 0x0);
1753 return sprintf(buf, "%i\n", val); 1754 return sprintf(buf, "%i\n", val);
@@ -1791,7 +1792,7 @@ static int ipw_radio_kill_sw(struct ipw_priv *priv, int disable_radio)
1791static ssize_t store_rf_kill(struct device *d, struct device_attribute *attr, 1792static ssize_t store_rf_kill(struct device *d, struct device_attribute *attr,
1792 const char *buf, size_t count) 1793 const char *buf, size_t count)
1793{ 1794{
1794 struct ipw_priv *priv = d->driver_data; 1795 struct ipw_priv *priv = dev_get_drvdata(d);
1795 1796
1796 ipw_radio_kill_sw(priv, buf[0] == '1'); 1797 ipw_radio_kill_sw(priv, buf[0] == '1');
1797 1798
@@ -1803,7 +1804,7 @@ static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
1803static ssize_t show_speed_scan(struct device *d, struct device_attribute *attr, 1804static ssize_t show_speed_scan(struct device *d, struct device_attribute *attr,
1804 char *buf) 1805 char *buf)
1805{ 1806{
1806 struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; 1807 struct ipw_priv *priv = dev_get_drvdata(d);
1807 int pos = 0, len = 0; 1808 int pos = 0, len = 0;
1808 if (priv->config & CFG_SPEED_SCAN) { 1809 if (priv->config & CFG_SPEED_SCAN) {
1809 while (priv->speed_scan[pos] != 0) 1810 while (priv->speed_scan[pos] != 0)
@@ -1818,7 +1819,7 @@ static ssize_t show_speed_scan(struct device *d, struct device_attribute *attr,
1818static ssize_t store_speed_scan(struct device *d, struct device_attribute *attr, 1819static ssize_t store_speed_scan(struct device *d, struct device_attribute *attr,
1819 const char *buf, size_t count) 1820 const char *buf, size_t count)
1820{ 1821{
1821 struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; 1822 struct ipw_priv *priv = dev_get_drvdata(d);
1822 int channel, pos = 0; 1823 int channel, pos = 0;
1823 const char *p = buf; 1824 const char *p = buf;
1824 1825
@@ -1857,14 +1858,14 @@ static DEVICE_ATTR(speed_scan, S_IWUSR | S_IRUGO, show_speed_scan,
1857static ssize_t show_net_stats(struct device *d, struct device_attribute *attr, 1858static ssize_t show_net_stats(struct device *d, struct device_attribute *attr,
1858 char *buf) 1859 char *buf)
1859{ 1860{
1860 struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; 1861 struct ipw_priv *priv = dev_get_drvdata(d);
1861 return sprintf(buf, "%c\n", (priv->config & CFG_NET_STATS) ? '1' : '0'); 1862 return sprintf(buf, "%c\n", (priv->config & CFG_NET_STATS) ? '1' : '0');
1862} 1863}
1863 1864
1864static ssize_t store_net_stats(struct device *d, struct device_attribute *attr, 1865static ssize_t store_net_stats(struct device *d, struct device_attribute *attr,
1865 const char *buf, size_t count) 1866 const char *buf, size_t count)
1866{ 1867{
1867 struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; 1868 struct ipw_priv *priv = dev_get_drvdata(d);
1868 if (buf[0] == '1') 1869 if (buf[0] == '1')
1869 priv->config |= CFG_NET_STATS; 1870 priv->config |= CFG_NET_STATS;
1870 else 1871 else
@@ -3176,11 +3177,8 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 * data, size_t len)
3176 /* Start the Dma */ 3177 /* Start the Dma */
3177 rc = ipw_fw_dma_enable(priv); 3178 rc = ipw_fw_dma_enable(priv);
3178 3179
3179 if (priv->sram_desc.last_cb_index > 0) { 3180 /* the DMA is already ready this would be a bug. */
3180 /* the DMA is already ready this would be a bug. */ 3181 BUG_ON(priv->sram_desc.last_cb_index > 0);
3181 BUG();
3182 goto out;
3183 }
3184 3182
3185 do { 3183 do {
3186 chunk = (struct fw_chunk *)(data + offset); 3184 chunk = (struct fw_chunk *)(data + offset);
diff --git a/drivers/net/wireless/ipw2x00/libipw_module.c b/drivers/net/wireless/ipw2x00/libipw_module.c
index 92a26922e792..8ce6e961c5da 100644
--- a/drivers/net/wireless/ipw2x00/libipw_module.c
+++ b/drivers/net/wireless/ipw2x00/libipw_module.c
@@ -154,10 +154,6 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
154 goto failed; 154 goto failed;
155 } 155 }
156 ieee = netdev_priv(dev); 156 ieee = netdev_priv(dev);
157#ifdef CONFIG_COMPAT_NET_DEV_OPS
158 dev->hard_start_xmit = ieee80211_xmit;
159 dev->change_mtu = ieee80211_change_mtu;
160#endif
161 157
162 ieee->dev = dev; 158 ieee->dev = dev;
163 159
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-led.c b/drivers/net/wireless/iwlwifi/iwl-3945-led.c
index ac22f59be9ef..bd7e520d98c2 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945-led.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-led.c
@@ -44,6 +44,15 @@
44#include "iwl-core.h" 44#include "iwl-core.h"
45#include "iwl-dev.h" 45#include "iwl-dev.h"
46 46
47#ifdef CONFIG_IWLWIFI_DEBUG
48static const char *led_type_str[] = {
49 __stringify(IWL_LED_TRG_TX),
50 __stringify(IWL_LED_TRG_RX),
51 __stringify(IWL_LED_TRG_ASSOC),
52 __stringify(IWL_LED_TRG_RADIO),
53 NULL
54};
55#endif /* CONFIG_IWLWIFI_DEBUG */
47 56
48static const struct { 57static const struct {
49 u16 brightness; 58 u16 brightness;
@@ -61,7 +70,7 @@ static const struct {
61 {10, 110, 110}, 70 {10, 110, 110},
62 {5, 130, 130}, 71 {5, 130, 130},
63 {0, 167, 167}, 72 {0, 167, 167},
64 /*SOLID_ON*/ 73 /* SOLID_ON */
65 {-1, IWL_LED_SOLID, 0} 74 {-1, IWL_LED_SOLID, 0}
66}; 75};
67 76
@@ -143,6 +152,30 @@ static int iwl3945_led_off(struct iwl_priv *priv, int led_id)
143} 152}
144 153
145/* 154/*
155 * Set led on in case of association
156 * */
157static int iwl3945_led_associate(struct iwl_priv *priv, int led_id)
158{
159 IWL_DEBUG_LED(priv, "Associated\n");
160
161 priv->allow_blinking = 1;
162 return iwl3945_led_on(priv, led_id);
163}
164/* Set Led off in case of disassociation */
165static int iwl3945_led_disassociate(struct iwl_priv *priv, int led_id)
166{
167 IWL_DEBUG_LED(priv, "Disassociated\n");
168
169 priv->allow_blinking = 0;
170 if (iwl_is_rfkill(priv))
171 iwl3945_led_off(priv, led_id);
172 else
173 iwl3945_led_on(priv, led_id);
174
175 return 0;
176}
177
178/*
146 * brightness call back function for Tx/Rx LED 179 * brightness call back function for Tx/Rx LED
147 */ 180 */
148static int iwl3945_led_associated(struct iwl_priv *priv, int led_id) 181static int iwl3945_led_associated(struct iwl_priv *priv, int led_id)
@@ -165,26 +198,21 @@ static void iwl3945_led_brightness_set(struct led_classdev *led_cdev,
165 enum led_brightness brightness) 198 enum led_brightness brightness)
166{ 199{
167 struct iwl_led *led = container_of(led_cdev, 200 struct iwl_led *led = container_of(led_cdev,
168 struct iwl_led, led_dev); 201 struct iwl_led, led_dev);
169 struct iwl_priv *priv = led->priv; 202 struct iwl_priv *priv = led->priv;
170 203
171 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 204 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
172 return; 205 return;
173 206
207 IWL_DEBUG_LED(priv, "Led type = %s brightness = %d\n",
208 led_type_str[led->type], brightness);
209
174 switch (brightness) { 210 switch (brightness) {
175 case LED_FULL: 211 case LED_FULL:
176 if (led->type == IWL_LED_TRG_ASSOC) {
177 priv->allow_blinking = 1;
178 IWL_DEBUG_LED(priv, "MAC is associated\n");
179 }
180 if (led->led_on) 212 if (led->led_on)
181 led->led_on(priv, IWL_LED_LINK); 213 led->led_on(priv, IWL_LED_LINK);
182 break; 214 break;
183 case LED_OFF: 215 case LED_OFF:
184 if (led->type == IWL_LED_TRG_ASSOC) {
185 priv->allow_blinking = 0;
186 IWL_DEBUG_LED(priv, "MAC is disassociated\n");
187 }
188 if (led->led_off) 216 if (led->led_off)
189 led->led_off(priv, IWL_LED_LINK); 217 led->led_off(priv, IWL_LED_LINK);
190 break; 218 break;
@@ -197,8 +225,6 @@ static void iwl3945_led_brightness_set(struct led_classdev *led_cdev,
197 } 225 }
198} 226}
199 227
200
201
202/* 228/*
203 * Register led class with the system 229 * Register led class with the system
204 */ 230 */
@@ -237,12 +263,12 @@ static int iwl3945_led_register_led(struct iwl_priv *priv,
237static inline u8 get_blink_rate(struct iwl_priv *priv) 263static inline u8 get_blink_rate(struct iwl_priv *priv)
238{ 264{
239 int index; 265 int index;
240 u64 current_tpt = priv->rxtxpackets; 266 s64 tpt = priv->rxtxpackets;
241 s64 tpt = current_tpt - priv->led_tpt;
242 267
243 if (tpt < 0) 268 if (tpt < 0)
244 tpt = -tpt; 269 tpt = -tpt;
245 priv->led_tpt = current_tpt; 270
271 IWL_DEBUG_LED(priv, "tpt %lld \n", (long long)tpt);
246 272
247 if (!priv->allow_blinking) 273 if (!priv->allow_blinking)
248 index = IWL_MAX_BLINK_TBL; 274 index = IWL_MAX_BLINK_TBL;
@@ -250,13 +276,9 @@ static inline u8 get_blink_rate(struct iwl_priv *priv)
250 for (index = 0; index < IWL_MAX_BLINK_TBL; index++) 276 for (index = 0; index < IWL_MAX_BLINK_TBL; index++)
251 if (tpt > (blink_tbl[index].brightness * IWL_1MB_RATE)) 277 if (tpt > (blink_tbl[index].brightness * IWL_1MB_RATE))
252 break; 278 break;
253 return index;
254}
255 279
256static inline int is_rf_kill(struct iwl_priv *priv) 280 IWL_DEBUG_LED(priv, "LED BLINK IDX=%d\n", index);
257{ 281 return index;
258 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
259 test_bit(STATUS_RF_KILL_SW, &priv->status);
260} 282}
261 283
262/* 284/*
@@ -272,7 +294,7 @@ void iwl3945_led_background(struct iwl_priv *priv)
272 priv->last_blink_time = 0; 294 priv->last_blink_time = 0;
273 return; 295 return;
274 } 296 }
275 if (is_rf_kill(priv)) { 297 if (iwl_is_rfkill(priv)) {
276 priv->last_blink_time = 0; 298 priv->last_blink_time = 0;
277 return; 299 return;
278 } 300 }
@@ -341,8 +363,8 @@ int iwl3945_led_register(struct iwl_priv *priv)
341 IWL_LED_TRG_ASSOC, 0, trigger); 363 IWL_LED_TRG_ASSOC, 0, trigger);
342 364
343 /* for assoc always turn led on */ 365 /* for assoc always turn led on */
344 priv->led[IWL_LED_TRG_ASSOC].led_on = iwl3945_led_on; 366 priv->led[IWL_LED_TRG_ASSOC].led_on = iwl3945_led_associate;
345 priv->led[IWL_LED_TRG_ASSOC].led_off = iwl3945_led_on; 367 priv->led[IWL_LED_TRG_ASSOC].led_off = iwl3945_led_disassociate;
346 priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL; 368 priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL;
347 369
348 if (ret) 370 if (ret)
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-rs.c b/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
index af6b9d444778..814afaf6d10b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
@@ -683,11 +683,10 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta,
683 if (sta) 683 if (sta)
684 rate_mask = sta->supp_rates[sband->band]; 684 rate_mask = sta->supp_rates[sband->band];
685 685
686 /* Send management frames and broadcast/multicast data using lowest 686 /* Send management frames and NO_ACK data using lowest rate. */
687 * rate. */
688 fc = le16_to_cpu(hdr->frame_control); 687 fc = le16_to_cpu(hdr->frame_control);
689 if ((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA || 688 if ((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA ||
690 is_multicast_ether_addr(hdr->addr1) || 689 info->flags & IEEE80211_TX_CTL_NO_ACK ||
691 !sta || !priv_sta) { 690 !sta || !priv_sta) {
692 IWL_DEBUG_RATE(priv, "leave: No STA priv data to update!\n"); 691 IWL_DEBUG_RATE(priv, "leave: No STA priv data to update!\n");
693 if (!rate_mask) 692 if (!rate_mask)
@@ -696,6 +695,8 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta,
696 else 695 else
697 info->control.rates[0].idx = 696 info->control.rates[0].idx =
698 rate_lowest_index(sband, sta); 697 rate_lowest_index(sband, sta);
698 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
699 info->control.rates[0].count = 1;
699 return; 700 return;
700 } 701 }
701 702
@@ -719,7 +720,7 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta,
719 IWL_DEBUG_RATE(priv, "LQ: ADD station %pm\n", 720 IWL_DEBUG_RATE(priv, "LQ: ADD station %pm\n",
720 hdr->addr1); 721 hdr->addr1);
721 sta_id = iwl3945_add_station(priv, 722 sta_id = iwl3945_add_station(priv,
722 hdr->addr1, 0, CMD_ASYNC); 723 hdr->addr1, 0, CMD_ASYNC, NULL);
723 } 724 }
724 if (sta_id != IWL_INVALID_STATION) 725 if (sta_id != IWL_INVALID_STATION)
725 rs_sta->ibss_sta_added = 1; 726 rs_sta->ibss_sta_added = 1;
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c
index 527525cc0919..fd65e1c3e055 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.c
@@ -98,7 +98,6 @@ const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT_3945] = {
98 * ... and set IWL_EVT_DISABLE to 1. */ 98 * ... and set IWL_EVT_DISABLE to 1. */
99void iwl3945_disable_events(struct iwl_priv *priv) 99void iwl3945_disable_events(struct iwl_priv *priv)
100{ 100{
101 int ret;
102 int i; 101 int i;
103 u32 base; /* SRAM address of event log header */ 102 u32 base; /* SRAM address of event log header */
104 u32 disable_ptr; /* SRAM address of event-disable bitmap array */ 103 u32 disable_ptr; /* SRAM address of event-disable bitmap array */
@@ -159,26 +158,17 @@ void iwl3945_disable_events(struct iwl_priv *priv)
159 return; 158 return;
160 } 159 }
161 160
162 ret = iwl_grab_nic_access(priv);
163 if (ret) {
164 IWL_WARN(priv, "Can not read from adapter at this time.\n");
165 return;
166 }
167
168 disable_ptr = iwl_read_targ_mem(priv, base + (4 * sizeof(u32))); 161 disable_ptr = iwl_read_targ_mem(priv, base + (4 * sizeof(u32)));
169 array_size = iwl_read_targ_mem(priv, base + (5 * sizeof(u32))); 162 array_size = iwl_read_targ_mem(priv, base + (5 * sizeof(u32)));
170 iwl_release_nic_access(priv);
171 163
172 if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) { 164 if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
173 IWL_DEBUG_INFO(priv, "Disabling selected uCode log events at 0x%x\n", 165 IWL_DEBUG_INFO(priv, "Disabling selected uCode log events at 0x%x\n",
174 disable_ptr); 166 disable_ptr);
175 ret = iwl_grab_nic_access(priv);
176 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++) 167 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
177 iwl_write_targ_mem(priv, 168 iwl_write_targ_mem(priv,
178 disable_ptr + (i * sizeof(u32)), 169 disable_ptr + (i * sizeof(u32)),
179 evt_disable[i]); 170 evt_disable[i]);
180 171
181 iwl_release_nic_access(priv);
182 } else { 172 } else {
183 IWL_DEBUG_INFO(priv, "Selected uCode log events may be disabled\n"); 173 IWL_DEBUG_INFO(priv, "Selected uCode log events may be disabled\n");
184 IWL_DEBUG_INFO(priv, " by writing \"1\"s into disable bitmap\n"); 174 IWL_DEBUG_INFO(priv, " by writing \"1\"s into disable bitmap\n");
@@ -908,55 +898,30 @@ u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
908 898
909static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) 899static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
910{ 900{
911 int ret;
912 unsigned long flags;
913
914 spin_lock_irqsave(&priv->lock, flags);
915 ret = iwl_grab_nic_access(priv);
916 if (ret) {
917 spin_unlock_irqrestore(&priv->lock, flags);
918 return ret;
919 }
920
921 if (src == IWL_PWR_SRC_VAUX) { 901 if (src == IWL_PWR_SRC_VAUX) {
922 if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) { 902 if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) {
923 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 903 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
924 APMG_PS_CTRL_VAL_PWR_SRC_VAUX, 904 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
925 ~APMG_PS_CTRL_MSK_PWR_SRC); 905 ~APMG_PS_CTRL_MSK_PWR_SRC);
926 iwl_release_nic_access(priv);
927 906
928 iwl_poll_bit(priv, CSR_GPIO_IN, 907 iwl_poll_bit(priv, CSR_GPIO_IN,
929 CSR_GPIO_IN_VAL_VAUX_PWR_SRC, 908 CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
930 CSR_GPIO_IN_BIT_AUX_POWER, 5000); 909 CSR_GPIO_IN_BIT_AUX_POWER, 5000);
931 } else {
932 iwl_release_nic_access(priv);
933 } 910 }
934 } else { 911 } else {
935 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 912 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
936 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, 913 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
937 ~APMG_PS_CTRL_MSK_PWR_SRC); 914 ~APMG_PS_CTRL_MSK_PWR_SRC);
938 915
939 iwl_release_nic_access(priv);
940 iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC, 916 iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
941 CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */ 917 CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
942 } 918 }
943 spin_unlock_irqrestore(&priv->lock, flags);
944 919
945 return ret; 920 return 0;
946} 921}
947 922
948static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq) 923static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
949{ 924{
950 int rc;
951 unsigned long flags;
952
953 spin_lock_irqsave(&priv->lock, flags);
954 rc = iwl_grab_nic_access(priv);
955 if (rc) {
956 spin_unlock_irqrestore(&priv->lock, flags);
957 return rc;
958 }
959
960 iwl_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->dma_addr); 925 iwl_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->dma_addr);
961 iwl_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma); 926 iwl_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma);
962 iwl_write_direct32(priv, FH39_RCSR_WPTR(0), 0); 927 iwl_write_direct32(priv, FH39_RCSR_WPTR(0), 0);
@@ -973,23 +938,11 @@ static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
973 /* fake read to flush all prev I/O */ 938 /* fake read to flush all prev I/O */
974 iwl_read_direct32(priv, FH39_RSSR_CTRL); 939 iwl_read_direct32(priv, FH39_RSSR_CTRL);
975 940
976 iwl_release_nic_access(priv);
977 spin_unlock_irqrestore(&priv->lock, flags);
978
979 return 0; 941 return 0;
980} 942}
981 943
982static int iwl3945_tx_reset(struct iwl_priv *priv) 944static int iwl3945_tx_reset(struct iwl_priv *priv)
983{ 945{
984 int rc;
985 unsigned long flags;
986
987 spin_lock_irqsave(&priv->lock, flags);
988 rc = iwl_grab_nic_access(priv);
989 if (rc) {
990 spin_unlock_irqrestore(&priv->lock, flags);
991 return rc;
992 }
993 946
994 /* bypass mode */ 947 /* bypass mode */
995 iwl_write_prph(priv, ALM_SCD_MODE_REG, 0x2); 948 iwl_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
@@ -1017,8 +970,6 @@ static int iwl3945_tx_reset(struct iwl_priv *priv)
1017 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH | 970 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1018 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH); 971 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1019 972
1020 iwl_release_nic_access(priv);
1021 spin_unlock_irqrestore(&priv->lock, flags);
1022 973
1023 return 0; 974 return 0;
1024} 975}
@@ -1061,7 +1012,7 @@ static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
1061 1012
1062static int iwl3945_apm_init(struct iwl_priv *priv) 1013static int iwl3945_apm_init(struct iwl_priv *priv)
1063{ 1014{
1064 int ret = 0; 1015 int ret;
1065 1016
1066 iwl_power_initialize(priv); 1017 iwl_power_initialize(priv);
1067 1018
@@ -1083,10 +1034,6 @@ static int iwl3945_apm_init(struct iwl_priv *priv)
1083 goto out; 1034 goto out;
1084 } 1035 }
1085 1036
1086 ret = iwl_grab_nic_access(priv);
1087 if (ret)
1088 goto out;
1089
1090 /* enable DMA */ 1037 /* enable DMA */
1091 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT | 1038 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
1092 APMG_CLK_VAL_BSM_CLK_RQT); 1039 APMG_CLK_VAL_BSM_CLK_RQT);
@@ -1097,7 +1044,6 @@ static int iwl3945_apm_init(struct iwl_priv *priv)
1097 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 1044 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1098 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 1045 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1099 1046
1100 iwl_release_nic_access(priv);
1101out: 1047out:
1102 return ret; 1048 return ret;
1103} 1049}
@@ -1110,6 +1056,11 @@ static void iwl3945_nic_config(struct iwl_priv *priv)
1110 1056
1111 spin_lock_irqsave(&priv->lock, flags); 1057 spin_lock_irqsave(&priv->lock, flags);
1112 1058
1059 /* Determine HW type */
1060 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1061
1062 IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
1063
1113 if (rev_id & PCI_CFG_REV_ID_BIT_RTP) 1064 if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1114 IWL_DEBUG_INFO(priv, "RTP type \n"); 1065 IWL_DEBUG_INFO(priv, "RTP type \n");
1115 else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) { 1066 else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
@@ -1163,7 +1114,6 @@ static void iwl3945_nic_config(struct iwl_priv *priv)
1163 1114
1164int iwl3945_hw_nic_init(struct iwl_priv *priv) 1115int iwl3945_hw_nic_init(struct iwl_priv *priv)
1165{ 1116{
1166 u8 rev_id;
1167 int rc; 1117 int rc;
1168 unsigned long flags; 1118 unsigned long flags;
1169 struct iwl_rx_queue *rxq = &priv->rxq; 1119 struct iwl_rx_queue *rxq = &priv->rxq;
@@ -1172,12 +1122,6 @@ int iwl3945_hw_nic_init(struct iwl_priv *priv)
1172 priv->cfg->ops->lib->apm_ops.init(priv); 1122 priv->cfg->ops->lib->apm_ops.init(priv);
1173 spin_unlock_irqrestore(&priv->lock, flags); 1123 spin_unlock_irqrestore(&priv->lock, flags);
1174 1124
1175 /* Determine HW type */
1176 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1177 if (rc)
1178 return rc;
1179 IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
1180
1181 rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN); 1125 rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
1182 if (rc) 1126 if (rc)
1183 return rc; 1127 return rc;
@@ -1198,22 +1142,13 @@ int iwl3945_hw_nic_init(struct iwl_priv *priv)
1198 1142
1199 iwl3945_rx_init(priv, rxq); 1143 iwl3945_rx_init(priv, rxq);
1200 1144
1201 spin_lock_irqsave(&priv->lock, flags);
1202 1145
1203 /* Look at using this instead: 1146 /* Look at using this instead:
1204 rxq->need_update = 1; 1147 rxq->need_update = 1;
1205 iwl_rx_queue_update_write_ptr(priv, rxq); 1148 iwl_rx_queue_update_write_ptr(priv, rxq);
1206 */ 1149 */
1207 1150
1208 rc = iwl_grab_nic_access(priv);
1209 if (rc) {
1210 spin_unlock_irqrestore(&priv->lock, flags);
1211 return rc;
1212 }
1213 iwl_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7); 1151 iwl_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7);
1214 iwl_release_nic_access(priv);
1215
1216 spin_unlock_irqrestore(&priv->lock, flags);
1217 1152
1218 rc = iwl3945_txq_ctx_reset(priv); 1153 rc = iwl3945_txq_ctx_reset(priv);
1219 if (rc) 1154 if (rc)
@@ -1245,14 +1180,6 @@ void iwl3945_hw_txq_ctx_free(struct iwl_priv *priv)
1245void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv) 1180void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
1246{ 1181{
1247 int txq_id; 1182 int txq_id;
1248 unsigned long flags;
1249
1250 spin_lock_irqsave(&priv->lock, flags);
1251 if (iwl_grab_nic_access(priv)) {
1252 spin_unlock_irqrestore(&priv->lock, flags);
1253 iwl3945_hw_txq_ctx_free(priv);
1254 return;
1255 }
1256 1183
1257 /* stop SCD */ 1184 /* stop SCD */
1258 iwl_write_prph(priv, ALM_SCD_MODE_REG, 0); 1185 iwl_write_prph(priv, ALM_SCD_MODE_REG, 0);
@@ -1265,9 +1192,6 @@ void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
1265 1000); 1192 1000);
1266 } 1193 }
1267 1194
1268 iwl_release_nic_access(priv);
1269 spin_unlock_irqrestore(&priv->lock, flags);
1270
1271 iwl3945_hw_txq_ctx_free(priv); 1195 iwl3945_hw_txq_ctx_free(priv);
1272} 1196}
1273 1197
@@ -1312,12 +1236,8 @@ static void iwl3945_apm_stop(struct iwl_priv *priv)
1312 1236
1313static int iwl3945_apm_reset(struct iwl_priv *priv) 1237static int iwl3945_apm_reset(struct iwl_priv *priv)
1314{ 1238{
1315 int rc;
1316 unsigned long flags;
1317
1318 iwl3945_apm_stop_master(priv); 1239 iwl3945_apm_stop_master(priv);
1319 1240
1320 spin_lock_irqsave(&priv->lock, flags);
1321 1241
1322 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); 1242 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1323 udelay(10); 1243 udelay(10);
@@ -1327,36 +1247,31 @@ static int iwl3945_apm_reset(struct iwl_priv *priv)
1327 iwl_poll_direct_bit(priv, CSR_GP_CNTRL, 1247 iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
1328 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); 1248 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1329 1249
1330 rc = iwl_grab_nic_access(priv); 1250 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
1331 if (!rc) { 1251 APMG_CLK_VAL_BSM_CLK_RQT);
1332 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
1333 APMG_CLK_VAL_BSM_CLK_RQT);
1334 1252
1335 iwl_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0); 1253 iwl_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1336 iwl_write_prph(priv, APMG_RTC_INT_STT_REG, 1254 iwl_write_prph(priv, APMG_RTC_INT_STT_REG,
1337 0xFFFFFFFF); 1255 0xFFFFFFFF);
1338 1256
1339 /* enable DMA */ 1257 /* enable DMA */
1340 iwl_write_prph(priv, APMG_CLK_EN_REG, 1258 iwl_write_prph(priv, APMG_CLK_EN_REG,
1341 APMG_CLK_VAL_DMA_CLK_RQT | 1259 APMG_CLK_VAL_DMA_CLK_RQT |
1342 APMG_CLK_VAL_BSM_CLK_RQT); 1260 APMG_CLK_VAL_BSM_CLK_RQT);
1343 udelay(10); 1261 udelay(10);
1344 1262
1345 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, 1263 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
1346 APMG_PS_CTRL_VAL_RESET_REQ); 1264 APMG_PS_CTRL_VAL_RESET_REQ);
1347 udelay(5); 1265 udelay(5);
1348 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, 1266 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1349 APMG_PS_CTRL_VAL_RESET_REQ); 1267 APMG_PS_CTRL_VAL_RESET_REQ);
1350 iwl_release_nic_access(priv);
1351 }
1352 1268
1353 /* Clear the 'host command active' bit... */ 1269 /* Clear the 'host command active' bit... */
1354 clear_bit(STATUS_HCMD_ACTIVE, &priv->status); 1270 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1355 1271
1356 wake_up_interruptible(&priv->wait_command_queue); 1272 wake_up_interruptible(&priv->wait_command_queue);
1357 spin_unlock_irqrestore(&priv->lock, flags);
1358 1273
1359 return rc; 1274 return 0;
1360} 1275}
1361 1276
1362/** 1277/**
@@ -1964,6 +1879,194 @@ int iwl3945_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1964 return 0; 1879 return 0;
1965} 1880}
1966 1881
1882static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
1883{
1884 int rc = 0;
1885 struct iwl_rx_packet *res = NULL;
1886 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1887 struct iwl_host_cmd cmd = {
1888 .id = REPLY_RXON_ASSOC,
1889 .len = sizeof(rxon_assoc),
1890 .meta.flags = CMD_WANT_SKB,
1891 .data = &rxon_assoc,
1892 };
1893 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1894 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1895
1896 if ((rxon1->flags == rxon2->flags) &&
1897 (rxon1->filter_flags == rxon2->filter_flags) &&
1898 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1899 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1900 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
1901 return 0;
1902 }
1903
1904 rxon_assoc.flags = priv->staging_rxon.flags;
1905 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1906 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1907 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1908 rxon_assoc.reserved = 0;
1909
1910 rc = iwl_send_cmd_sync(priv, &cmd);
1911 if (rc)
1912 return rc;
1913
1914 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1915 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1916 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
1917 rc = -EIO;
1918 }
1919
1920 priv->alloc_rxb_skb--;
1921 dev_kfree_skb_any(cmd.meta.u.skb);
1922
1923 return rc;
1924}
1925
1926/**
1927 * iwl3945_commit_rxon - commit staging_rxon to hardware
1928 *
1929 * The RXON command in staging_rxon is committed to the hardware and
1930 * the active_rxon structure is updated with the new data. This
1931 * function correctly transitions out of the RXON_ASSOC_MSK state if
1932 * a HW tune is required based on the RXON structure changes.
1933 */
1934static int iwl3945_commit_rxon(struct iwl_priv *priv)
1935{
1936 /* cast away the const for active_rxon in this function */
1937 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1938 struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
1939 int rc = 0;
1940 bool new_assoc =
1941 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
1942
1943 if (!iwl_is_alive(priv))
1944 return -1;
1945
1946 /* always get timestamp with Rx frame */
1947 staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
1948
1949 /* select antenna */
1950 staging_rxon->flags &=
1951 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1952 staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
1953
1954 rc = iwl_check_rxon_cmd(priv);
1955 if (rc) {
1956 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
1957 return -EINVAL;
1958 }
1959
1960 /* If we don't need to send a full RXON, we can use
1961 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1962 * and other flags for the current radio configuration. */
1963 if (!iwl_full_rxon_required(priv)) {
1964 rc = iwl_send_rxon_assoc(priv);
1965 if (rc) {
1966 IWL_ERR(priv, "Error setting RXON_ASSOC "
1967 "configuration (%d).\n", rc);
1968 return rc;
1969 }
1970
1971 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1972
1973 return 0;
1974 }
1975
1976 /* If we are currently associated and the new config requires
1977 * an RXON_ASSOC and the new config wants the associated mask enabled,
1978 * we must clear the associated from the active configuration
1979 * before we apply the new config */
1980 if (iwl_is_associated(priv) && new_assoc) {
1981 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
1982 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1983
1984 /*
1985 * reserved4 and 5 could have been filled by the iwlcore code.
1986 * Let's clear them before pushing to the 3945.
1987 */
1988 active_rxon->reserved4 = 0;
1989 active_rxon->reserved5 = 0;
1990 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
1991 sizeof(struct iwl3945_rxon_cmd),
1992 &priv->active_rxon);
1993
1994 /* If the mask clearing failed then we set
1995 * active_rxon back to what it was previously */
1996 if (rc) {
1997 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1998 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
1999 "configuration (%d).\n", rc);
2000 return rc;
2001 }
2002 }
2003
2004 IWL_DEBUG_INFO(priv, "Sending RXON\n"
2005 "* with%s RXON_FILTER_ASSOC_MSK\n"
2006 "* channel = %d\n"
2007 "* bssid = %pM\n",
2008 (new_assoc ? "" : "out"),
2009 le16_to_cpu(staging_rxon->channel),
2010 staging_rxon->bssid_addr);
2011
2012 /*
2013 * reserved4 and 5 could have been filled by the iwlcore code.
2014 * Let's clear them before pushing to the 3945.
2015 */
2016 staging_rxon->reserved4 = 0;
2017 staging_rxon->reserved5 = 0;
2018
2019 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
2020
2021 /* Apply the new configuration */
2022 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
2023 sizeof(struct iwl3945_rxon_cmd),
2024 staging_rxon);
2025 if (rc) {
2026 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
2027 return rc;
2028 }
2029
2030 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
2031
2032 priv->cfg->ops->smgmt->clear_station_table(priv);
2033
2034 /* If we issue a new RXON command which required a tune then we must
2035 * send a new TXPOWER command or we won't be able to Tx any frames */
2036 rc = priv->cfg->ops->lib->send_tx_power(priv);
2037 if (rc) {
2038 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
2039 return rc;
2040 }
2041
2042 /* Add the broadcast address so we can send broadcast frames */
2043 if (priv->cfg->ops->smgmt->add_station(priv, iwl_bcast_addr, 0, 0, NULL) ==
2044 IWL_INVALID_STATION) {
2045 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
2046 return -EIO;
2047 }
2048
2049 /* If we have set the ASSOC_MSK and we are in BSS mode then
2050 * add the IWL_AP_ID to the station rate table */
2051 if (iwl_is_associated(priv) &&
2052 (priv->iw_mode == NL80211_IFTYPE_STATION))
2053 if (priv->cfg->ops->smgmt->add_station(priv,
2054 priv->active_rxon.bssid_addr, 1, 0, NULL)
2055 == IWL_INVALID_STATION) {
2056 IWL_ERR(priv, "Error adding AP address for transmit\n");
2057 return -EIO;
2058 }
2059
2060 /* Init the hardware's rate fallback order based on the band */
2061 rc = iwl3945_init_hw_rate_table(priv);
2062 if (rc) {
2063 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
2064 return -EIO;
2065 }
2066
2067 return 0;
2068}
2069
1967/* will add 3945 channel switch cmd handling later */ 2070/* will add 3945 channel switch cmd handling later */
1968int iwl3945_hw_channel_switch(struct iwl_priv *priv, u16 channel) 2071int iwl3945_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1969{ 2072{
@@ -2314,14 +2417,6 @@ int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
2314int iwl3945_hw_rxq_stop(struct iwl_priv *priv) 2417int iwl3945_hw_rxq_stop(struct iwl_priv *priv)
2315{ 2418{
2316 int rc; 2419 int rc;
2317 unsigned long flags;
2318
2319 spin_lock_irqsave(&priv->lock, flags);
2320 rc = iwl_grab_nic_access(priv);
2321 if (rc) {
2322 spin_unlock_irqrestore(&priv->lock, flags);
2323 return rc;
2324 }
2325 2420
2326 iwl_write_direct32(priv, FH39_RCSR_CONFIG(0), 0); 2421 iwl_write_direct32(priv, FH39_RCSR_CONFIG(0), 0);
2327 rc = iwl_poll_direct_bit(priv, FH39_RSSR_STATUS, 2422 rc = iwl_poll_direct_bit(priv, FH39_RSSR_STATUS,
@@ -2329,28 +2424,17 @@ int iwl3945_hw_rxq_stop(struct iwl_priv *priv)
2329 if (rc < 0) 2424 if (rc < 0)
2330 IWL_ERR(priv, "Can't stop Rx DMA.\n"); 2425 IWL_ERR(priv, "Can't stop Rx DMA.\n");
2331 2426
2332 iwl_release_nic_access(priv);
2333 spin_unlock_irqrestore(&priv->lock, flags);
2334
2335 return 0; 2427 return 0;
2336} 2428}
2337 2429
2338int iwl3945_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq) 2430int iwl3945_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2339{ 2431{
2340 int rc;
2341 unsigned long flags;
2342 int txq_id = txq->q.id; 2432 int txq_id = txq->q.id;
2343 2433
2344 struct iwl3945_shared *shared_data = priv->shared_virt; 2434 struct iwl3945_shared *shared_data = priv->shared_virt;
2345 2435
2346 shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr); 2436 shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2347 2437
2348 spin_lock_irqsave(&priv->lock, flags);
2349 rc = iwl_grab_nic_access(priv);
2350 if (rc) {
2351 spin_unlock_irqrestore(&priv->lock, flags);
2352 return rc;
2353 }
2354 iwl_write_direct32(priv, FH39_CBCC_CTRL(txq_id), 0); 2438 iwl_write_direct32(priv, FH39_CBCC_CTRL(txq_id), 0);
2355 iwl_write_direct32(priv, FH39_CBCC_BASE(txq_id), 0); 2439 iwl_write_direct32(priv, FH39_CBCC_BASE(txq_id), 0);
2356 2440
@@ -2360,11 +2444,9 @@ int iwl3945_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2360 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD | 2444 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2361 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL | 2445 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2362 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE); 2446 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2363 iwl_release_nic_access(priv);
2364 2447
2365 /* fake read to flush all prev. writes */ 2448 /* fake read to flush all prev. writes */
2366 iwl_read32(priv, FH39_TSSR_CBB_BASE); 2449 iwl_read32(priv, FH39_TSSR_CBB_BASE);
2367 spin_unlock_irqrestore(&priv->lock, flags);
2368 2450
2369 return 0; 2451 return 0;
2370} 2452}
@@ -2672,10 +2754,6 @@ static int iwl3945_load_bsm(struct iwl_priv *priv)
2672 inst_len = priv->ucode_init.len; 2754 inst_len = priv->ucode_init.len;
2673 data_len = priv->ucode_init_data.len; 2755 data_len = priv->ucode_init_data.len;
2674 2756
2675 rc = iwl_grab_nic_access(priv);
2676 if (rc)
2677 return rc;
2678
2679 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); 2757 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2680 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); 2758 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2681 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); 2759 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
@@ -2689,10 +2767,8 @@ static int iwl3945_load_bsm(struct iwl_priv *priv)
2689 le32_to_cpu(*image)); 2767 le32_to_cpu(*image));
2690 2768
2691 rc = iwl3945_verify_bsm(priv); 2769 rc = iwl3945_verify_bsm(priv);
2692 if (rc) { 2770 if (rc)
2693 iwl_release_nic_access(priv);
2694 return rc; 2771 return rc;
2695 }
2696 2772
2697 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ 2773 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2698 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); 2774 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
@@ -2724,11 +2800,14 @@ static int iwl3945_load_bsm(struct iwl_priv *priv)
2724 iwl_write_prph(priv, BSM_WR_CTRL_REG, 2800 iwl_write_prph(priv, BSM_WR_CTRL_REG,
2725 BSM_WR_CTRL_REG_BIT_START_EN); 2801 BSM_WR_CTRL_REG_BIT_START_EN);
2726 2802
2727 iwl_release_nic_access(priv);
2728
2729 return 0; 2803 return 0;
2730} 2804}
2731 2805
2806static struct iwl_hcmd_ops iwl3945_hcmd = {
2807 .rxon_assoc = iwl3945_send_rxon_assoc,
2808 .commit_rxon = iwl3945_commit_rxon,
2809};
2810
2732static struct iwl_lib_ops iwl3945_lib = { 2811static struct iwl_lib_ops iwl3945_lib = {
2733 .txq_attach_buf_to_tfd = iwl3945_hw_txq_attach_buf_to_tfd, 2812 .txq_attach_buf_to_tfd = iwl3945_hw_txq_attach_buf_to_tfd,
2734 .txq_free_tfd = iwl3945_hw_txq_free_tfd, 2813 .txq_free_tfd = iwl3945_hw_txq_free_tfd,
@@ -2758,6 +2837,18 @@ static struct iwl_lib_ops iwl3945_lib = {
2758 }, 2837 },
2759 .send_tx_power = iwl3945_send_tx_power, 2838 .send_tx_power = iwl3945_send_tx_power,
2760 .is_valid_rtc_data_addr = iwl3945_hw_valid_rtc_data_addr, 2839 .is_valid_rtc_data_addr = iwl3945_hw_valid_rtc_data_addr,
2840 .post_associate = iwl3945_post_associate,
2841 .isr = iwl_isr_legacy,
2842 .config_ap = iwl3945_config_ap,
2843};
2844
2845static struct iwl_station_mgmt_ops iwl3945_station_mgmt = {
2846 .add_station = iwl3945_add_station,
2847#if 0
2848 .remove_station = iwl3945_remove_station,
2849#endif
2850 .find_station = iwl3945_hw_find_station,
2851 .clear_station_table = iwl3945_clear_stations_table,
2761}; 2852};
2762 2853
2763static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = { 2854static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = {
@@ -2767,7 +2858,9 @@ static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = {
2767 2858
2768static struct iwl_ops iwl3945_ops = { 2859static struct iwl_ops iwl3945_ops = {
2769 .lib = &iwl3945_lib, 2860 .lib = &iwl3945_lib,
2861 .hcmd = &iwl3945_hcmd,
2770 .utils = &iwl3945_hcmd_utils, 2862 .utils = &iwl3945_hcmd_utils,
2863 .smgmt = &iwl3945_station_mgmt,
2771}; 2864};
2772 2865
2773static struct iwl_cfg iwl3945_bg_cfg = { 2866static struct iwl_cfg iwl3945_bg_cfg = {
@@ -2779,7 +2872,8 @@ static struct iwl_cfg iwl3945_bg_cfg = {
2779 .eeprom_size = IWL3945_EEPROM_IMG_SIZE, 2872 .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2780 .eeprom_ver = EEPROM_3945_EEPROM_VERSION, 2873 .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2781 .ops = &iwl3945_ops, 2874 .ops = &iwl3945_ops,
2782 .mod_params = &iwl3945_mod_params 2875 .mod_params = &iwl3945_mod_params,
2876 .use_isr_legacy = true
2783}; 2877};
2784 2878
2785static struct iwl_cfg iwl3945_abg_cfg = { 2879static struct iwl_cfg iwl3945_abg_cfg = {
@@ -2791,7 +2885,8 @@ static struct iwl_cfg iwl3945_abg_cfg = {
2791 .eeprom_size = IWL3945_EEPROM_IMG_SIZE, 2885 .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2792 .eeprom_ver = EEPROM_3945_EEPROM_VERSION, 2886 .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2793 .ops = &iwl3945_ops, 2887 .ops = &iwl3945_ops,
2794 .mod_params = &iwl3945_mod_params 2888 .mod_params = &iwl3945_mod_params,
2889 .use_isr_legacy = true
2795}; 2890};
2796 2891
2797struct pci_device_id iwl3945_hw_card_ids[] = { 2892struct pci_device_id iwl3945_hw_card_ids[] = {
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.h b/drivers/net/wireless/iwlwifi/iwl-3945.h
index 55188844657b..da87528f355f 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.h
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.h
@@ -162,7 +162,6 @@ struct iwl3945_frame {
162#define STATUS_TEMPERATURE 8 162#define STATUS_TEMPERATURE 8
163#define STATUS_GEO_CONFIGURED 9 163#define STATUS_GEO_CONFIGURED 9
164#define STATUS_EXIT_PENDING 10 164#define STATUS_EXIT_PENDING 10
165#define STATUS_IN_SUSPEND 11
166#define STATUS_STATISTICS 12 165#define STATUS_STATISTICS 12
167#define STATUS_SCANNING 13 166#define STATUS_SCANNING 13
168#define STATUS_SCAN_ABORTING 14 167#define STATUS_SCAN_ABORTING 14
@@ -207,7 +206,8 @@ struct iwl3945_addsta_cmd;
207extern int iwl3945_send_add_station(struct iwl_priv *priv, 206extern int iwl3945_send_add_station(struct iwl_priv *priv,
208 struct iwl3945_addsta_cmd *sta, u8 flags); 207 struct iwl3945_addsta_cmd *sta, u8 flags);
209extern u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *bssid, 208extern u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *bssid,
210 int is_ap, u8 flags); 209 int is_ap, u8 flags, struct ieee80211_sta_ht_cap *ht_info);
210extern void iwl3945_clear_stations_table(struct iwl_priv *priv);
211extern int iwl3945_power_init_handle(struct iwl_priv *priv); 211extern int iwl3945_power_init_handle(struct iwl_priv *priv);
212extern int iwl3945_eeprom_init(struct iwl_priv *priv); 212extern int iwl3945_eeprom_init(struct iwl_priv *priv);
213extern int iwl3945_calc_db_from_ratio(int sig_ratio); 213extern int iwl3945_calc_db_from_ratio(int sig_ratio);
@@ -278,6 +278,8 @@ extern void iwl3945_hw_rx_statistics(struct iwl_priv *priv,
278 struct iwl_rx_mem_buffer *rxb); 278 struct iwl_rx_mem_buffer *rxb);
279extern void iwl3945_disable_events(struct iwl_priv *priv); 279extern void iwl3945_disable_events(struct iwl_priv *priv);
280extern int iwl4965_get_temperature(const struct iwl_priv *priv); 280extern int iwl4965_get_temperature(const struct iwl_priv *priv);
281extern void iwl3945_post_associate(struct iwl_priv *priv);
282extern void iwl3945_config_ap(struct iwl_priv *priv);
281 283
282/** 284/**
283 * iwl3945_hw_find_station - Find station id for a given BSSID 285 * iwl3945_hw_find_station - Find station id for a given BSSID
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c
index 847a6220c5e6..a0b29411a4b3 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965.c
+++ b/drivers/net/wireless/iwlwifi/iwl-4965.c
@@ -163,10 +163,6 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
163 inst_len = priv->ucode_init.len; 163 inst_len = priv->ucode_init.len;
164 data_len = priv->ucode_init_data.len; 164 data_len = priv->ucode_init_data.len;
165 165
166 ret = iwl_grab_nic_access(priv);
167 if (ret)
168 return ret;
169
170 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); 166 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
171 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); 167 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
172 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); 168 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
@@ -179,10 +175,8 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
179 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image)); 175 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
180 176
181 ret = iwl4965_verify_bsm(priv); 177 ret = iwl4965_verify_bsm(priv);
182 if (ret) { 178 if (ret)
183 iwl_release_nic_access(priv);
184 return ret; 179 return ret;
185 }
186 180
187 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ 181 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
188 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); 182 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
@@ -211,7 +205,6 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
211 * (e.g. when powering back up after power-save shutdown) */ 205 * (e.g. when powering back up after power-save shutdown) */
212 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); 206 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
213 207
214 iwl_release_nic_access(priv);
215 208
216 return 0; 209 return 0;
217} 210}
@@ -229,20 +222,12 @@ static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
229{ 222{
230 dma_addr_t pinst; 223 dma_addr_t pinst;
231 dma_addr_t pdata; 224 dma_addr_t pdata;
232 unsigned long flags;
233 int ret = 0; 225 int ret = 0;
234 226
235 /* bits 35:4 for 4965 */ 227 /* bits 35:4 for 4965 */
236 pinst = priv->ucode_code.p_addr >> 4; 228 pinst = priv->ucode_code.p_addr >> 4;
237 pdata = priv->ucode_data_backup.p_addr >> 4; 229 pdata = priv->ucode_data_backup.p_addr >> 4;
238 230
239 spin_lock_irqsave(&priv->lock, flags);
240 ret = iwl_grab_nic_access(priv);
241 if (ret) {
242 spin_unlock_irqrestore(&priv->lock, flags);
243 return ret;
244 }
245
246 /* Tell bootstrap uCode where to find image to load */ 231 /* Tell bootstrap uCode where to find image to load */
247 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); 232 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
248 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); 233 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
@@ -253,10 +238,6 @@ static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
253 * that all new ptr/size info is in place */ 238 * that all new ptr/size info is in place */
254 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, 239 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
255 priv->ucode_code.len | BSM_DRAM_INST_LOAD); 240 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
256 iwl_release_nic_access(priv);
257
258 spin_unlock_irqrestore(&priv->lock, flags);
259
260 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n"); 241 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
261 242
262 return ret; 243 return ret;
@@ -312,10 +293,12 @@ restart:
312 queue_work(priv->workqueue, &priv->restart); 293 queue_work(priv->workqueue, &priv->restart);
313} 294}
314 295
315static int is_fat_channel(__le32 rxon_flags) 296static bool is_fat_channel(__le32 rxon_flags)
316{ 297{
317 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) || 298 int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
318 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK); 299 >> RXON_FLG_CHANNEL_MODE_POS;
300 return ((chan_mod == CHANNEL_MODE_PURE_40) ||
301 (chan_mod == CHANNEL_MODE_MIXED));
319} 302}
320 303
321/* 304/*
@@ -358,10 +341,6 @@ static int iwl4965_apm_init(struct iwl_priv *priv)
358 goto out; 341 goto out;
359 } 342 }
360 343
361 ret = iwl_grab_nic_access(priv);
362 if (ret)
363 goto out;
364
365 /* enable DMA */ 344 /* enable DMA */
366 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT | 345 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
367 APMG_CLK_VAL_BSM_CLK_RQT); 346 APMG_CLK_VAL_BSM_CLK_RQT);
@@ -372,7 +351,6 @@ static int iwl4965_apm_init(struct iwl_priv *priv)
372 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 351 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
373 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 352 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
374 353
375 iwl_release_nic_access(priv);
376out: 354out:
377 return ret; 355 return ret;
378} 356}
@@ -454,11 +432,9 @@ static void iwl4965_apm_stop(struct iwl_priv *priv)
454static int iwl4965_apm_reset(struct iwl_priv *priv) 432static int iwl4965_apm_reset(struct iwl_priv *priv)
455{ 433{
456 int ret = 0; 434 int ret = 0;
457 unsigned long flags;
458 435
459 iwl4965_apm_stop_master(priv); 436 iwl4965_apm_stop_master(priv);
460 437
461 spin_lock_irqsave(&priv->lock, flags);
462 438
463 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); 439 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
464 440
@@ -475,9 +451,6 @@ static int iwl4965_apm_reset(struct iwl_priv *priv)
475 451
476 udelay(10); 452 udelay(10);
477 453
478 ret = iwl_grab_nic_access(priv);
479 if (ret)
480 goto out;
481 /* Enable DMA and BSM Clock */ 454 /* Enable DMA and BSM Clock */
482 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT | 455 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
483 APMG_CLK_VAL_BSM_CLK_RQT); 456 APMG_CLK_VAL_BSM_CLK_RQT);
@@ -488,14 +461,10 @@ static int iwl4965_apm_reset(struct iwl_priv *priv)
488 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 461 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
489 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 462 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
490 463
491 iwl_release_nic_access(priv);
492
493 clear_bit(STATUS_HCMD_ACTIVE, &priv->status); 464 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
494 wake_up_interruptible(&priv->wait_command_queue); 465 wake_up_interruptible(&priv->wait_command_queue);
495 466
496out: 467out:
497 spin_unlock_irqrestore(&priv->lock, flags);
498
499 return ret; 468 return ret;
500} 469}
501 470
@@ -681,18 +650,11 @@ static int iwl4965_alive_notify(struct iwl_priv *priv)
681{ 650{
682 u32 a; 651 u32 a;
683 unsigned long flags; 652 unsigned long flags;
684 int ret;
685 int i, chan; 653 int i, chan;
686 u32 reg_val; 654 u32 reg_val;
687 655
688 spin_lock_irqsave(&priv->lock, flags); 656 spin_lock_irqsave(&priv->lock, flags);
689 657
690 ret = iwl_grab_nic_access(priv);
691 if (ret) {
692 spin_unlock_irqrestore(&priv->lock, flags);
693 return ret;
694 }
695
696 /* Clear 4965's internal Tx Scheduler data base */ 658 /* Clear 4965's internal Tx Scheduler data base */
697 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR); 659 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
698 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET; 660 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
@@ -759,10 +721,9 @@ static int iwl4965_alive_notify(struct iwl_priv *priv)
759 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0); 721 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
760 } 722 }
761 723
762 iwl_release_nic_access(priv);
763 spin_unlock_irqrestore(&priv->lock, flags); 724 spin_unlock_irqrestore(&priv->lock, flags);
764 725
765 return ret; 726 return 0;
766} 727}
767 728
768static struct iwl_sensitivity_ranges iwl4965_sensitivity = { 729static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
@@ -788,6 +749,12 @@ static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
788 .nrg_th_ofdm = 100, 749 .nrg_th_ofdm = 100,
789}; 750};
790 751
752static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
753{
754 /* want Kelvin */
755 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
756}
757
791/** 758/**
792 * iwl4965_hw_set_hw_params 759 * iwl4965_hw_set_hw_params
793 * 760 *
@@ -822,7 +789,8 @@ static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
822 priv->hw_params.rx_chains_num = 2; 789 priv->hw_params.rx_chains_num = 2;
823 priv->hw_params.valid_tx_ant = ANT_A | ANT_B; 790 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
824 priv->hw_params.valid_rx_ant = ANT_A | ANT_B; 791 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
825 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD); 792 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
793 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
826 794
827 priv->hw_params.sens = &iwl4965_sensitivity; 795 priv->hw_params.sens = &iwl4965_sensitivity;
828 796
@@ -1524,7 +1492,7 @@ static int iwl4965_send_tx_power(struct iwl_priv *priv)
1524 struct iwl4965_txpowertable_cmd cmd = { 0 }; 1492 struct iwl4965_txpowertable_cmd cmd = { 0 };
1525 int ret; 1493 int ret;
1526 u8 band = 0; 1494 u8 band = 0;
1527 u8 is_fat = 0; 1495 bool is_fat = false;
1528 u8 ctrl_chan_high = 0; 1496 u8 ctrl_chan_high = 0;
1529 1497
1530 if (test_bit(STATUS_SCANNING, &priv->status)) { 1498 if (test_bit(STATUS_SCANNING, &priv->status)) {
@@ -1602,7 +1570,7 @@ static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1602{ 1570{
1603 int rc; 1571 int rc;
1604 u8 band = 0; 1572 u8 band = 0;
1605 u8 is_fat = 0; 1573 bool is_fat = false;
1606 u8 ctrl_chan_high = 0; 1574 u8 ctrl_chan_high = 0;
1607 struct iwl4965_channel_switch_cmd cmd = { 0 }; 1575 struct iwl4965_channel_switch_cmd cmd = { 0 };
1608 const struct iwl_channel_info *ch_info; 1576 const struct iwl_channel_info *ch_info;
@@ -1833,8 +1801,6 @@ static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1833static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, 1801static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1834 u16 ssn_idx, u8 tx_fifo) 1802 u16 ssn_idx, u8 tx_fifo)
1835{ 1803{
1836 int ret = 0;
1837
1838 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || 1804 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1839 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) { 1805 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1840 IWL_WARN(priv, 1806 IWL_WARN(priv,
@@ -1844,10 +1810,6 @@ static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1844 return -EINVAL; 1810 return -EINVAL;
1845 } 1811 }
1846 1812
1847 ret = iwl_grab_nic_access(priv);
1848 if (ret)
1849 return ret;
1850
1851 iwl4965_tx_queue_stop_scheduler(priv, txq_id); 1813 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1852 1814
1853 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); 1815 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
@@ -1861,8 +1823,6 @@ static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1861 iwl_txq_ctx_deactivate(priv, txq_id); 1823 iwl_txq_ctx_deactivate(priv, txq_id);
1862 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0); 1824 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1863 1825
1864 iwl_release_nic_access(priv);
1865
1866 return 0; 1826 return 0;
1867} 1827}
1868 1828
@@ -1904,7 +1864,6 @@ static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1904 int tx_fifo, int sta_id, int tid, u16 ssn_idx) 1864 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1905{ 1865{
1906 unsigned long flags; 1866 unsigned long flags;
1907 int ret;
1908 u16 ra_tid; 1867 u16 ra_tid;
1909 1868
1910 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || 1869 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
@@ -1922,11 +1881,6 @@ static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1922 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid); 1881 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1923 1882
1924 spin_lock_irqsave(&priv->lock, flags); 1883 spin_lock_irqsave(&priv->lock, flags);
1925 ret = iwl_grab_nic_access(priv);
1926 if (ret) {
1927 spin_unlock_irqrestore(&priv->lock, flags);
1928 return ret;
1929 }
1930 1884
1931 /* Stop this Tx queue before configuring it */ 1885 /* Stop this Tx queue before configuring it */
1932 iwl4965_tx_queue_stop_scheduler(priv, txq_id); 1886 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
@@ -1959,7 +1913,6 @@ static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1959 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */ 1913 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1960 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1); 1914 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1961 1915
1962 iwl_release_nic_access(priv);
1963 spin_unlock_irqrestore(&priv->lock, flags); 1916 spin_unlock_irqrestore(&priv->lock, flags);
1964 1917
1965 return 0; 1918 return 0;
@@ -2268,9 +2221,17 @@ static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2268 cancel_work_sync(&priv->txpower_work); 2221 cancel_work_sync(&priv->txpower_work);
2269} 2222}
2270 2223
2224static struct iwl_station_mgmt_ops iwl4965_station_mgmt = {
2225 .add_station = iwl_add_station_flags,
2226 .remove_station = iwl_remove_station,
2227 .find_station = iwl_find_station,
2228 .clear_station_table = iwl_clear_stations_table,
2229};
2271 2230
2272static struct iwl_hcmd_ops iwl4965_hcmd = { 2231static struct iwl_hcmd_ops iwl4965_hcmd = {
2273 .rxon_assoc = iwl4965_send_rxon_assoc, 2232 .rxon_assoc = iwl4965_send_rxon_assoc,
2233 .commit_rxon = iwl_commit_rxon,
2234 .set_rxon_chain = iwl_set_rxon_chain,
2274}; 2235};
2275 2236
2276static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = { 2237static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
@@ -2323,13 +2284,20 @@ static struct iwl_lib_ops iwl4965_lib = {
2323 }, 2284 },
2324 .send_tx_power = iwl4965_send_tx_power, 2285 .send_tx_power = iwl4965_send_tx_power,
2325 .update_chain_flags = iwl_update_chain_flags, 2286 .update_chain_flags = iwl_update_chain_flags,
2326 .temperature = iwl4965_temperature_calib, 2287 .post_associate = iwl_post_associate,
2288 .config_ap = iwl_config_ap,
2289 .isr = iwl_isr_legacy,
2290 .temp_ops = {
2291 .temperature = iwl4965_temperature_calib,
2292 .set_ct_kill = iwl4965_set_ct_threshold,
2293 },
2327}; 2294};
2328 2295
2329static struct iwl_ops iwl4965_ops = { 2296static struct iwl_ops iwl4965_ops = {
2330 .lib = &iwl4965_lib, 2297 .lib = &iwl4965_lib,
2331 .hcmd = &iwl4965_hcmd, 2298 .hcmd = &iwl4965_hcmd,
2332 .utils = &iwl4965_hcmd_utils, 2299 .utils = &iwl4965_hcmd_utils,
2300 .smgmt = &iwl4965_station_mgmt,
2333}; 2301};
2334 2302
2335struct iwl_cfg iwl4965_agn_cfg = { 2303struct iwl_cfg iwl4965_agn_cfg = {
@@ -2343,6 +2311,7 @@ struct iwl_cfg iwl4965_agn_cfg = {
2343 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION, 2311 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2344 .ops = &iwl4965_ops, 2312 .ops = &iwl4965_ops,
2345 .mod_params = &iwl4965_mod_params, 2313 .mod_params = &iwl4965_mod_params,
2314 .use_isr_legacy = true
2346}; 2315};
2347 2316
2348/* Module firmware */ 2317/* Module firmware */
@@ -2350,8 +2319,6 @@ MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2350 2319
2351module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444); 2320module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2352MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); 2321MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2353module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2354MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2355module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444); 2322module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2356MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])"); 2323MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2357module_param_named(debug, iwl4965_mod_params.debug, uint, 0444); 2324module_param_named(debug, iwl4965_mod_params.debug, uint, 0444);
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
index 15cac70e36e2..4ef6804a455a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
+++ b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
@@ -87,6 +87,18 @@
87#define IWL50_NUM_AMPDU_QUEUES 10 87#define IWL50_NUM_AMPDU_QUEUES 10
88#define IWL50_FIRST_AMPDU_QUEUE 10 88#define IWL50_FIRST_AMPDU_QUEUE 10
89 89
90/* 5150 only */
91#define IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF (-5)
92
93static inline s32 iwl_temp_calib_to_offset(struct iwl_priv *priv)
94{
95 u16 *temp_calib = (u16 *)iwl_eeprom_query_addr(priv,
96 EEPROM_5000_TEMPERATURE);
97 /* offset = temperature - voltage / coef */
98 s32 offset = (s32)(temp_calib[0] - temp_calib[1] / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF);
99 return offset;
100}
101
90/* Fixed (non-configurable) rx data from phy */ 102/* Fixed (non-configurable) rx data from phy */
91 103
92/** 104/**
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index 9452461ce864..ab29aab6b2d5 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -124,10 +124,6 @@ static int iwl5000_apm_init(struct iwl_priv *priv)
124 return ret; 124 return ret;
125 } 125 }
126 126
127 ret = iwl_grab_nic_access(priv);
128 if (ret)
129 return ret;
130
131 /* enable DMA */ 127 /* enable DMA */
132 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT); 128 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
133 129
@@ -137,8 +133,6 @@ static int iwl5000_apm_init(struct iwl_priv *priv)
137 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 133 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
138 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 134 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
139 135
140 iwl_release_nic_access(priv);
141
142 return ret; 136 return ret;
143} 137}
144 138
@@ -165,12 +159,9 @@ static void iwl5000_apm_stop(struct iwl_priv *priv)
165static int iwl5000_apm_reset(struct iwl_priv *priv) 159static int iwl5000_apm_reset(struct iwl_priv *priv)
166{ 160{
167 int ret = 0; 161 int ret = 0;
168 unsigned long flags;
169 162
170 iwl5000_apm_stop_master(priv); 163 iwl5000_apm_stop_master(priv);
171 164
172 spin_lock_irqsave(&priv->lock, flags);
173
174 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); 165 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
175 166
176 udelay(10); 167 udelay(10);
@@ -193,10 +184,6 @@ static int iwl5000_apm_reset(struct iwl_priv *priv)
193 goto out; 184 goto out;
194 } 185 }
195 186
196 ret = iwl_grab_nic_access(priv);
197 if (ret)
198 goto out;
199
200 /* enable DMA */ 187 /* enable DMA */
201 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT); 188 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
202 189
@@ -205,11 +192,7 @@ static int iwl5000_apm_reset(struct iwl_priv *priv)
205 /* disable L1-Active */ 192 /* disable L1-Active */
206 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 193 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
207 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 194 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
208
209 iwl_release_nic_access(priv);
210
211out: 195out:
212 spin_unlock_irqrestore(&priv->lock, flags);
213 196
214 return ret; 197 return ret;
215} 198}
@@ -252,11 +235,9 @@ static void iwl5000_nic_config(struct iwl_priv *priv)
252 * (PCIe power is lost before PERST# is asserted), 235 * (PCIe power is lost before PERST# is asserted),
253 * causing ME FW to lose ownership and not being able to obtain it back. 236 * causing ME FW to lose ownership and not being able to obtain it back.
254 */ 237 */
255 iwl_grab_nic_access(priv);
256 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 238 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
257 APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, 239 APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
258 ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); 240 ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
259 iwl_release_nic_access(priv);
260 241
261 spin_unlock_irqrestore(&priv->lock, flags); 242 spin_unlock_irqrestore(&priv->lock, flags);
262} 243}
@@ -434,15 +415,19 @@ static const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
434 return &priv->eeprom[address]; 415 return &priv->eeprom[address];
435} 416}
436 417
437static s32 iwl5150_get_ct_threshold(struct iwl_priv *priv) 418static void iwl5150_set_ct_threshold(struct iwl_priv *priv)
438{ 419{
439 const s32 volt2temp_coef = -5; 420 const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF;
440 u16 *temp_calib = (u16 *)iwl_eeprom_query_addr(priv, 421 s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD) -
441 EEPROM_5000_TEMPERATURE); 422 iwl_temp_calib_to_offset(priv);
442 /* offset = temperate - voltage / coef */ 423
443 s32 offset = temp_calib[0] - temp_calib[1] / volt2temp_coef; 424 priv->hw_params.ct_kill_threshold = threshold * volt2temp_coef;
444 s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD) - offset; 425}
445 return threshold * volt2temp_coef; 426
427static void iwl5000_set_ct_threshold(struct iwl_priv *priv)
428{
429 /* want Celsius */
430 priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;
446} 431}
447 432
448/* 433/*
@@ -533,19 +518,9 @@ static int iwl5000_load_section(struct iwl_priv *priv,
533 struct fw_desc *image, 518 struct fw_desc *image,
534 u32 dst_addr) 519 u32 dst_addr)
535{ 520{
536 int ret = 0;
537 unsigned long flags;
538
539 dma_addr_t phy_addr = image->p_addr; 521 dma_addr_t phy_addr = image->p_addr;
540 u32 byte_cnt = image->len; 522 u32 byte_cnt = image->len;
541 523
542 spin_lock_irqsave(&priv->lock, flags);
543 ret = iwl_grab_nic_access(priv);
544 if (ret) {
545 spin_unlock_irqrestore(&priv->lock, flags);
546 return ret;
547 }
548
549 iwl_write_direct32(priv, 524 iwl_write_direct32(priv,
550 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL), 525 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
551 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE); 526 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
@@ -574,8 +549,6 @@ static int iwl5000_load_section(struct iwl_priv *priv,
574 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE | 549 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE |
575 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD); 550 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
576 551
577 iwl_release_nic_access(priv);
578 spin_unlock_irqrestore(&priv->lock, flags);
579 return 0; 552 return 0;
580} 553}
581 554
@@ -678,7 +651,7 @@ static void iwl5000_init_alive_start(struct iwl_priv *priv)
678 goto restart; 651 goto restart;
679 } 652 }
680 653
681 iwl_clear_stations_table(priv); 654 priv->cfg->ops->smgmt->clear_station_table(priv);
682 ret = priv->cfg->ops->lib->alive_notify(priv); 655 ret = priv->cfg->ops->lib->alive_notify(priv);
683 if (ret) { 656 if (ret) {
684 IWL_WARN(priv, 657 IWL_WARN(priv,
@@ -736,18 +709,11 @@ static int iwl5000_alive_notify(struct iwl_priv *priv)
736{ 709{
737 u32 a; 710 u32 a;
738 unsigned long flags; 711 unsigned long flags;
739 int ret;
740 int i, chan; 712 int i, chan;
741 u32 reg_val; 713 u32 reg_val;
742 714
743 spin_lock_irqsave(&priv->lock, flags); 715 spin_lock_irqsave(&priv->lock, flags);
744 716
745 ret = iwl_grab_nic_access(priv);
746 if (ret) {
747 spin_unlock_irqrestore(&priv->lock, flags);
748 return ret;
749 }
750
751 priv->scd_base_addr = iwl_read_prph(priv, IWL50_SCD_SRAM_BASE_ADDR); 717 priv->scd_base_addr = iwl_read_prph(priv, IWL50_SCD_SRAM_BASE_ADDR);
752 a = priv->scd_base_addr + IWL50_SCD_CONTEXT_DATA_OFFSET; 718 a = priv->scd_base_addr + IWL50_SCD_CONTEXT_DATA_OFFSET;
753 for (; a < priv->scd_base_addr + IWL50_SCD_TX_STTS_BITMAP_OFFSET; 719 for (; a < priv->scd_base_addr + IWL50_SCD_TX_STTS_BITMAP_OFFSET;
@@ -815,7 +781,6 @@ static int iwl5000_alive_notify(struct iwl_priv *priv)
815 iwl_txq_ctx_activate(priv, 8); 781 iwl_txq_ctx_activate(priv, 8);
816 iwl_txq_ctx_activate(priv, 9); 782 iwl_txq_ctx_activate(priv, 9);
817 783
818 iwl_release_nic_access(priv);
819 spin_unlock_irqrestore(&priv->lock, flags); 784 spin_unlock_irqrestore(&priv->lock, flags);
820 785
821 786
@@ -868,17 +833,8 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
868 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant; 833 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
869 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant; 834 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
870 835
871 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { 836 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
872 case CSR_HW_REV_TYPE_5150: 837 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
873 /* 5150 wants in Kelvin */
874 priv->hw_params.ct_kill_threshold =
875 iwl5150_get_ct_threshold(priv);
876 break;
877 default:
878 /* all others want Celsius */
879 priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;
880 break;
881 }
882 838
883 /* Set initial calibration set */ 839 /* Set initial calibration set */
884 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { 840 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
@@ -900,7 +856,6 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
900 break; 856 break;
901 } 857 }
902 858
903
904 return 0; 859 return 0;
905} 860}
906 861
@@ -1006,7 +961,6 @@ static int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1006 int tx_fifo, int sta_id, int tid, u16 ssn_idx) 961 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1007{ 962{
1008 unsigned long flags; 963 unsigned long flags;
1009 int ret;
1010 u16 ra_tid; 964 u16 ra_tid;
1011 965
1012 if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) || 966 if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) ||
@@ -1024,11 +978,6 @@ static int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1024 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid); 978 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1025 979
1026 spin_lock_irqsave(&priv->lock, flags); 980 spin_lock_irqsave(&priv->lock, flags);
1027 ret = iwl_grab_nic_access(priv);
1028 if (ret) {
1029 spin_unlock_irqrestore(&priv->lock, flags);
1030 return ret;
1031 }
1032 981
1033 /* Stop this Tx queue before configuring it */ 982 /* Stop this Tx queue before configuring it */
1034 iwl5000_tx_queue_stop_scheduler(priv, txq_id); 983 iwl5000_tx_queue_stop_scheduler(priv, txq_id);
@@ -1064,7 +1013,6 @@ static int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1064 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */ 1013 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1065 iwl5000_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1); 1014 iwl5000_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1066 1015
1067 iwl_release_nic_access(priv);
1068 spin_unlock_irqrestore(&priv->lock, flags); 1016 spin_unlock_irqrestore(&priv->lock, flags);
1069 1017
1070 return 0; 1018 return 0;
@@ -1073,8 +1021,6 @@ static int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1073static int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, 1021static int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1074 u16 ssn_idx, u8 tx_fifo) 1022 u16 ssn_idx, u8 tx_fifo)
1075{ 1023{
1076 int ret;
1077
1078 if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) || 1024 if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) ||
1079 (IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES <= txq_id)) { 1025 (IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES <= txq_id)) {
1080 IWL_ERR(priv, 1026 IWL_ERR(priv,
@@ -1084,10 +1030,6 @@ static int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1084 return -EINVAL; 1030 return -EINVAL;
1085 } 1031 }
1086 1032
1087 ret = iwl_grab_nic_access(priv);
1088 if (ret)
1089 return ret;
1090
1091 iwl5000_tx_queue_stop_scheduler(priv, txq_id); 1033 iwl5000_tx_queue_stop_scheduler(priv, txq_id);
1092 1034
1093 iwl_clear_bits_prph(priv, IWL50_SCD_AGGR_SEL, (1 << txq_id)); 1035 iwl_clear_bits_prph(priv, IWL50_SCD_AGGR_SEL, (1 << txq_id));
@@ -1101,8 +1043,6 @@ static int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1101 iwl_txq_ctx_deactivate(priv, txq_id); 1043 iwl_txq_ctx_deactivate(priv, txq_id);
1102 iwl5000_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0); 1044 iwl5000_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1103 1045
1104 iwl_release_nic_access(priv);
1105
1106 return 0; 1046 return 0;
1107} 1047}
1108 1048
@@ -1434,6 +1374,17 @@ static void iwl5000_temperature(struct iwl_priv *priv)
1434 priv->temperature = le32_to_cpu(priv->statistics.general.temperature); 1374 priv->temperature = le32_to_cpu(priv->statistics.general.temperature);
1435} 1375}
1436 1376
1377static void iwl5150_temperature(struct iwl_priv *priv)
1378{
1379 u32 vt = 0;
1380 s32 offset = iwl_temp_calib_to_offset(priv);
1381
1382 vt = le32_to_cpu(priv->statistics.general.temperature);
1383 vt = vt / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF + offset;
1384 /* now vt hold the temperature in Kelvin */
1385 priv->temperature = KELVIN_TO_CELSIUS(vt);
1386}
1387
1437/* Calc max signal level (dBm) among 3 possible receivers */ 1388/* Calc max signal level (dBm) among 3 possible receivers */
1438int iwl5000_calc_rssi(struct iwl_priv *priv, 1389int iwl5000_calc_rssi(struct iwl_priv *priv,
1439 struct iwl_rx_phy_res *rx_resp) 1390 struct iwl_rx_phy_res *rx_resp)
@@ -1472,8 +1423,17 @@ int iwl5000_calc_rssi(struct iwl_priv *priv,
1472 return max_rssi - agc - IWL49_RSSI_OFFSET; 1423 return max_rssi - agc - IWL49_RSSI_OFFSET;
1473} 1424}
1474 1425
1426struct iwl_station_mgmt_ops iwl5000_station_mgmt = {
1427 .add_station = iwl_add_station_flags,
1428 .remove_station = iwl_remove_station,
1429 .find_station = iwl_find_station,
1430 .clear_station_table = iwl_clear_stations_table,
1431};
1432
1475struct iwl_hcmd_ops iwl5000_hcmd = { 1433struct iwl_hcmd_ops iwl5000_hcmd = {
1476 .rxon_assoc = iwl5000_send_rxon_assoc, 1434 .rxon_assoc = iwl5000_send_rxon_assoc,
1435 .commit_rxon = iwl_commit_rxon,
1436 .set_rxon_chain = iwl_set_rxon_chain,
1477}; 1437};
1478 1438
1479struct iwl_hcmd_utils_ops iwl5000_hcmd_utils = { 1439struct iwl_hcmd_utils_ops iwl5000_hcmd_utils = {
@@ -1502,7 +1462,6 @@ struct iwl_lib_ops iwl5000_lib = {
1502 .init_alive_start = iwl5000_init_alive_start, 1462 .init_alive_start = iwl5000_init_alive_start,
1503 .alive_notify = iwl5000_alive_notify, 1463 .alive_notify = iwl5000_alive_notify,
1504 .send_tx_power = iwl5000_send_tx_power, 1464 .send_tx_power = iwl5000_send_tx_power,
1505 .temperature = iwl5000_temperature,
1506 .update_chain_flags = iwl_update_chain_flags, 1465 .update_chain_flags = iwl_update_chain_flags,
1507 .apm_ops = { 1466 .apm_ops = {
1508 .init = iwl5000_apm_init, 1467 .init = iwl5000_apm_init,
@@ -1527,12 +1486,77 @@ struct iwl_lib_ops iwl5000_lib = {
1527 .calib_version = iwl5000_eeprom_calib_version, 1486 .calib_version = iwl5000_eeprom_calib_version,
1528 .query_addr = iwl5000_eeprom_query_addr, 1487 .query_addr = iwl5000_eeprom_query_addr,
1529 }, 1488 },
1489 .post_associate = iwl_post_associate,
1490 .isr = iwl_isr_ict,
1491 .config_ap = iwl_config_ap,
1492 .temp_ops = {
1493 .temperature = iwl5000_temperature,
1494 .set_ct_kill = iwl5000_set_ct_threshold,
1495 },
1496};
1497
1498static struct iwl_lib_ops iwl5150_lib = {
1499 .set_hw_params = iwl5000_hw_set_hw_params,
1500 .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl,
1501 .txq_inval_byte_cnt_tbl = iwl5000_txq_inval_byte_cnt_tbl,
1502 .txq_set_sched = iwl5000_txq_set_sched,
1503 .txq_agg_enable = iwl5000_txq_agg_enable,
1504 .txq_agg_disable = iwl5000_txq_agg_disable,
1505 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
1506 .txq_free_tfd = iwl_hw_txq_free_tfd,
1507 .txq_init = iwl_hw_tx_queue_init,
1508 .rx_handler_setup = iwl5000_rx_handler_setup,
1509 .setup_deferred_work = iwl5000_setup_deferred_work,
1510 .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
1511 .load_ucode = iwl5000_load_ucode,
1512 .init_alive_start = iwl5000_init_alive_start,
1513 .alive_notify = iwl5000_alive_notify,
1514 .send_tx_power = iwl5000_send_tx_power,
1515 .update_chain_flags = iwl_update_chain_flags,
1516 .apm_ops = {
1517 .init = iwl5000_apm_init,
1518 .reset = iwl5000_apm_reset,
1519 .stop = iwl5000_apm_stop,
1520 .config = iwl5000_nic_config,
1521 .set_pwr_src = iwl_set_pwr_src,
1522 },
1523 .eeprom_ops = {
1524 .regulatory_bands = {
1525 EEPROM_5000_REG_BAND_1_CHANNELS,
1526 EEPROM_5000_REG_BAND_2_CHANNELS,
1527 EEPROM_5000_REG_BAND_3_CHANNELS,
1528 EEPROM_5000_REG_BAND_4_CHANNELS,
1529 EEPROM_5000_REG_BAND_5_CHANNELS,
1530 EEPROM_5000_REG_BAND_24_FAT_CHANNELS,
1531 EEPROM_5000_REG_BAND_52_FAT_CHANNELS
1532 },
1533 .verify_signature = iwlcore_eeprom_verify_signature,
1534 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
1535 .release_semaphore = iwlcore_eeprom_release_semaphore,
1536 .calib_version = iwl5000_eeprom_calib_version,
1537 .query_addr = iwl5000_eeprom_query_addr,
1538 },
1539 .post_associate = iwl_post_associate,
1540 .isr = iwl_isr_ict,
1541 .config_ap = iwl_config_ap,
1542 .temp_ops = {
1543 .temperature = iwl5150_temperature,
1544 .set_ct_kill = iwl5150_set_ct_threshold,
1545 },
1530}; 1546};
1531 1547
1532struct iwl_ops iwl5000_ops = { 1548struct iwl_ops iwl5000_ops = {
1533 .lib = &iwl5000_lib, 1549 .lib = &iwl5000_lib,
1534 .hcmd = &iwl5000_hcmd, 1550 .hcmd = &iwl5000_hcmd,
1535 .utils = &iwl5000_hcmd_utils, 1551 .utils = &iwl5000_hcmd_utils,
1552 .smgmt = &iwl5000_station_mgmt,
1553};
1554
1555static struct iwl_ops iwl5150_ops = {
1556 .lib = &iwl5150_lib,
1557 .hcmd = &iwl5000_hcmd,
1558 .utils = &iwl5000_hcmd_utils,
1559 .smgmt = &iwl5000_station_mgmt,
1536}; 1560};
1537 1561
1538struct iwl_mod_params iwl50_mod_params = { 1562struct iwl_mod_params iwl50_mod_params = {
@@ -1630,7 +1654,7 @@ struct iwl_cfg iwl5150_agn_cfg = {
1630 .ucode_api_max = IWL5150_UCODE_API_MAX, 1654 .ucode_api_max = IWL5150_UCODE_API_MAX,
1631 .ucode_api_min = IWL5150_UCODE_API_MIN, 1655 .ucode_api_min = IWL5150_UCODE_API_MIN,
1632 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, 1656 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
1633 .ops = &iwl5000_ops, 1657 .ops = &iwl5150_ops,
1634 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, 1658 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
1635 .eeprom_ver = EEPROM_5050_EEPROM_VERSION, 1659 .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
1636 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, 1660 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
@@ -1643,9 +1667,6 @@ struct iwl_cfg iwl5150_agn_cfg = {
1643MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX)); 1667MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));
1644MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX)); 1668MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX));
1645 1669
1646module_param_named(disable50, iwl50_mod_params.disable, int, 0444);
1647MODULE_PARM_DESC(disable50,
1648 "manually disable the 50XX radio (default 0 [radio on])");
1649module_param_named(swcrypto50, iwl50_mod_params.sw_crypto, bool, 0444); 1670module_param_named(swcrypto50, iwl50_mod_params.sw_crypto, bool, 0444);
1650MODULE_PARM_DESC(swcrypto50, 1671MODULE_PARM_DESC(swcrypto50,
1651 "using software crypto engine (default 0 [hardware])\n"); 1672 "using software crypto engine (default 0 [hardware])\n");
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c
index bd438d8acf55..7236382aeaa6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c
@@ -72,6 +72,7 @@ static struct iwl_ops iwl6000_ops = {
72 .lib = &iwl5000_lib, 72 .lib = &iwl5000_lib,
73 .hcmd = &iwl5000_hcmd, 73 .hcmd = &iwl5000_hcmd,
74 .utils = &iwl6000_hcmd_utils, 74 .utils = &iwl6000_hcmd_utils,
75 .smgmt = &iwl5000_station_mgmt,
75}; 76};
76 77
77struct iwl_cfg iwl6000_2ag_cfg = { 78struct iwl_cfg iwl6000_2ag_cfg = {
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
index cab7842a73aa..23a58b00f180 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -52,7 +52,7 @@
52/* max allowed rate miss before sync LQ cmd */ 52/* max allowed rate miss before sync LQ cmd */
53#define IWL_MISSED_RATE_MAX 15 53#define IWL_MISSED_RATE_MAX 15
54/* max time to accum history 2 seconds */ 54/* max time to accum history 2 seconds */
55#define IWL_RATE_SCALE_FLUSH_INTVL (2*HZ) 55#define IWL_RATE_SCALE_FLUSH_INTVL (3*HZ)
56 56
57static u8 rs_ht_to_legacy[] = { 57static u8 rs_ht_to_legacy[] = {
58 IWL_RATE_6M_INDEX, IWL_RATE_6M_INDEX, 58 IWL_RATE_6M_INDEX, IWL_RATE_6M_INDEX,
@@ -100,6 +100,7 @@ struct iwl_scale_tbl_info {
100 u8 is_fat; /* 1 = 40 MHz channel width */ 100 u8 is_fat; /* 1 = 40 MHz channel width */
101 u8 is_dup; /* 1 = duplicated data streams */ 101 u8 is_dup; /* 1 = duplicated data streams */
102 u8 action; /* change modulation; IWL_[LEGACY/SISO/MIMO]_SWITCH_* */ 102 u8 action; /* change modulation; IWL_[LEGACY/SISO/MIMO]_SWITCH_* */
103 u8 max_search; /* maximun number of tables we can search */
103 s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */ 104 s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */
104 u32 current_rate; /* rate_n_flags, uCode API format */ 105 u32 current_rate; /* rate_n_flags, uCode API format */
105 struct iwl_rate_scale_data win[IWL_RATE_COUNT]; /* rate histories */ 106 struct iwl_rate_scale_data win[IWL_RATE_COUNT]; /* rate histories */
@@ -135,7 +136,7 @@ struct iwl_lq_sta {
135 u32 table_count; 136 u32 table_count;
136 u32 total_failed; /* total failed frames, any/all rates */ 137 u32 total_failed; /* total failed frames, any/all rates */
137 u32 total_success; /* total successful frames, any/all rates */ 138 u32 total_success; /* total successful frames, any/all rates */
138 u32 flush_timer; /* time staying in mode before new search */ 139 u64 flush_timer; /* time staying in mode before new search */
139 140
140 u8 action_counter; /* # mode-switch actions tried */ 141 u8 action_counter; /* # mode-switch actions tried */
141 u8 is_green; 142 u8 is_green;
@@ -160,6 +161,7 @@ struct iwl_lq_sta {
160#ifdef CONFIG_MAC80211_DEBUGFS 161#ifdef CONFIG_MAC80211_DEBUGFS
161 struct dentry *rs_sta_dbgfs_scale_table_file; 162 struct dentry *rs_sta_dbgfs_scale_table_file;
162 struct dentry *rs_sta_dbgfs_stats_table_file; 163 struct dentry *rs_sta_dbgfs_stats_table_file;
164 struct dentry *rs_sta_dbgfs_rate_scale_data_file;
163 struct dentry *rs_sta_dbgfs_tx_agg_tid_en_file; 165 struct dentry *rs_sta_dbgfs_tx_agg_tid_en_file;
164 u32 dbg_fixed_rate; 166 u32 dbg_fixed_rate;
165#endif 167#endif
@@ -167,10 +169,12 @@ struct iwl_lq_sta {
167 169
168 /* used to be in sta_info */ 170 /* used to be in sta_info */
169 int last_txrate_idx; 171 int last_txrate_idx;
172 /* last tx rate_n_flags */
173 u32 last_rate_n_flags;
170}; 174};
171 175
172static void rs_rate_scale_perform(struct iwl_priv *priv, 176static void rs_rate_scale_perform(struct iwl_priv *priv,
173 struct ieee80211_hdr *hdr, 177 struct sk_buff *skb,
174 struct ieee80211_sta *sta, 178 struct ieee80211_sta *sta,
175 struct iwl_lq_sta *lq_sta); 179 struct iwl_lq_sta *lq_sta);
176static void rs_fill_link_cmd(const struct iwl_priv *priv, 180static void rs_fill_link_cmd(const struct iwl_priv *priv,
@@ -191,7 +195,7 @@ static void rs_dbgfs_set_mcs(struct iwl_lq_sta *lq_sta,
191 * 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54, 60 MBits 195 * 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54, 60 MBits
192 * "G" is the only table that supports CCK (the first 4 rates). 196 * "G" is the only table that supports CCK (the first 4 rates).
193 */ 197 */
194/*FIXME:RS:need to separate tables for MIMO2/MIMO3*/ 198
195static s32 expected_tpt_A[IWL_RATE_COUNT] = { 199static s32 expected_tpt_A[IWL_RATE_COUNT] = {
196 0, 0, 0, 0, 40, 57, 72, 98, 121, 154, 177, 186, 186 200 0, 0, 0, 0, 40, 57, 72, 98, 121, 154, 177, 186, 186
197}; 201};
@@ -208,11 +212,11 @@ static s32 expected_tpt_siso20MHzSGI[IWL_RATE_COUNT] = {
208 0, 0, 0, 0, 46, 46, 82, 110, 132, 168, 192, 202, 211 212 0, 0, 0, 0, 46, 46, 82, 110, 132, 168, 192, 202, 211
209}; 213};
210 214
211static s32 expected_tpt_mimo20MHz[IWL_RATE_COUNT] = { 215static s32 expected_tpt_mimo2_20MHz[IWL_RATE_COUNT] = {
212 0, 0, 0, 0, 74, 74, 123, 155, 179, 214, 236, 244, 251 216 0, 0, 0, 0, 74, 74, 123, 155, 179, 214, 236, 244, 251
213}; 217};
214 218
215static s32 expected_tpt_mimo20MHzSGI[IWL_RATE_COUNT] = { 219static s32 expected_tpt_mimo2_20MHzSGI[IWL_RATE_COUNT] = {
216 0, 0, 0, 0, 81, 81, 131, 164, 188, 222, 243, 251, 257 220 0, 0, 0, 0, 81, 81, 131, 164, 188, 222, 243, 251, 257
217}; 221};
218 222
@@ -224,14 +228,50 @@ static s32 expected_tpt_siso40MHzSGI[IWL_RATE_COUNT] = {
224 0, 0, 0, 0, 83, 83, 135, 169, 193, 229, 250, 257, 264 228 0, 0, 0, 0, 83, 83, 135, 169, 193, 229, 250, 257, 264
225}; 229};
226 230
227static s32 expected_tpt_mimo40MHz[IWL_RATE_COUNT] = { 231static s32 expected_tpt_mimo2_40MHz[IWL_RATE_COUNT] = {
228 0, 0, 0, 0, 123, 123, 182, 214, 235, 264, 279, 285, 289 232 0, 0, 0, 0, 123, 123, 182, 214, 235, 264, 279, 285, 289
229}; 233};
230 234
231static s32 expected_tpt_mimo40MHzSGI[IWL_RATE_COUNT] = { 235static s32 expected_tpt_mimo2_40MHzSGI[IWL_RATE_COUNT] = {
232 0, 0, 0, 0, 131, 131, 191, 222, 242, 270, 284, 289, 293 236 0, 0, 0, 0, 131, 131, 191, 222, 242, 270, 284, 289, 293
233}; 237};
234 238
239/* Expected throughput metric MIMO3 */
240static s32 expected_tpt_mimo3_20MHz[IWL_RATE_COUNT] = {
241 0, 0, 0, 0, 99, 99, 153, 186, 208, 239, 256, 263, 268
242};
243
244static s32 expected_tpt_mimo3_20MHzSGI[IWL_RATE_COUNT] = {
245 0, 0, 0, 0, 106, 106, 162, 194, 215, 246, 262, 268, 273
246};
247
248static s32 expected_tpt_mimo3_40MHz[IWL_RATE_COUNT] = {
249 0, 0, 0, 0, 152, 152, 211, 239, 255, 279, 290, 294, 297
250};
251
252static s32 expected_tpt_mimo3_40MHzSGI[IWL_RATE_COUNT] = {
253 0, 0, 0, 0, 160, 160, 219, 245, 261, 284, 294, 297, 300
254};
255
256/* mbps, mcs */
257const static struct iwl_rate_mcs_info iwl_rate_mcs[IWL_RATE_COUNT] = {
258 {"1", ""},
259 {"2", ""},
260 {"5.5", ""},
261 {"11", ""},
262 {"6", "BPSK 1/2"},
263 {"9", "BPSK 1/2"},
264 {"12", "QPSK 1/2"},
265 {"18", "QPSK 3/4"},
266 {"24", "16QAM 1/2"},
267 {"36", "16QAM 3/4"},
268 {"48", "64QAM 2/3"},
269 {"54", "64QAM 3/4"},
270 {"60", "64QAM 5/6"}
271};
272
273#define MCS_INDEX_PER_STREAM (8)
274
235static inline u8 rs_extract_rate(u32 rate_n_flags) 275static inline u8 rs_extract_rate(u32 rate_n_flags)
236{ 276{
237 return (u8)(rate_n_flags & 0xFF); 277 return (u8)(rate_n_flags & 0xFF);
@@ -543,6 +583,7 @@ static int rs_get_tbl_info_from_mcs(const u32 rate_n_flags,
543 tbl->is_dup = 0; 583 tbl->is_dup = 0;
544 tbl->ant_type = (ant_msk >> RATE_MCS_ANT_POS); 584 tbl->ant_type = (ant_msk >> RATE_MCS_ANT_POS);
545 tbl->lq_type = LQ_NONE; 585 tbl->lq_type = LQ_NONE;
586 tbl->max_search = IWL_MAX_SEARCH;
546 587
547 /* legacy rate format */ 588 /* legacy rate format */
548 if (!(rate_n_flags & RATE_MCS_HT_MSK)) { 589 if (!(rate_n_flags & RATE_MCS_HT_MSK)) {
@@ -576,8 +617,10 @@ static int rs_get_tbl_info_from_mcs(const u32 rate_n_flags,
576 tbl->lq_type = LQ_MIMO2; 617 tbl->lq_type = LQ_MIMO2;
577 /* MIMO3 */ 618 /* MIMO3 */
578 } else { 619 } else {
579 if (num_of_ant == 3) 620 if (num_of_ant == 3) {
621 tbl->max_search = IWL_MAX_11N_MIMO3_SEARCH;
580 tbl->lq_type = LQ_MIMO3; 622 tbl->lq_type = LQ_MIMO3;
623 }
581 } 624 }
582 } 625 }
583 return 0; 626 return 0;
@@ -611,19 +654,19 @@ static int rs_toggle_antenna(u32 valid_ant, u32 *rate_n_flags,
611 return 1; 654 return 1;
612} 655}
613 656
614/* FIXME:RS: in 4965 we don't use greenfield at all */ 657/* in 4965 we don't use greenfield at all */
615/* FIXME:RS: don't use greenfield for now in TX */ 658static inline u8 rs_use_green(struct iwl_priv *priv,
616#if 0 659 struct ieee80211_conf *conf)
617static inline u8 rs_use_green(struct iwl_priv *priv, struct ieee80211_conf *conf)
618{ 660{
619 return (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) && 661 u8 is_green;
620 priv->current_ht_config.is_green_field && 662
621 !priv->current_ht_config.non_GF_STA_present; 663 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)
622} 664 is_green = 0;
623#endif 665 else
624static inline u8 rs_use_green(struct iwl_priv *priv, struct ieee80211_conf *conf) 666 is_green = (conf_is_ht(conf) &&
625{ 667 priv->current_ht_config.is_green_field &&
626 return 0; 668 !priv->current_ht_config.non_GF_STA_present);
669 return is_green;
627} 670}
628 671
629/** 672/**
@@ -735,6 +778,7 @@ static u32 rs_get_lower_rate(struct iwl_lq_sta *lq_sta,
735 778
736 tbl->is_fat = 0; 779 tbl->is_fat = 0;
737 tbl->is_SGI = 0; 780 tbl->is_SGI = 0;
781 tbl->max_search = IWL_MAX_SEARCH;
738 } 782 }
739 783
740 rate_mask = rs_get_supported_rates(lq_sta, NULL, tbl->lq_type); 784 rate_mask = rs_get_supported_rates(lq_sta, NULL, tbl->lq_type);
@@ -793,7 +837,7 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband,
793 IWL_DEBUG_RATE_LIMIT(priv, "get frame ack response, update rate scale window\n"); 837 IWL_DEBUG_RATE_LIMIT(priv, "get frame ack response, update rate scale window\n");
794 838
795 if (!ieee80211_is_data(hdr->frame_control) || 839 if (!ieee80211_is_data(hdr->frame_control) ||
796 is_multicast_ether_addr(hdr->addr1)) 840 info->flags & IEEE80211_TX_CTL_NO_ACK)
797 return; 841 return;
798 842
799 /* This packet was aggregated but doesn't carry rate scale info */ 843 /* This packet was aggregated but doesn't carry rate scale info */
@@ -902,6 +946,7 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband,
902 * else look up the rate that was, finally, successful. 946 * else look up the rate that was, finally, successful.
903 */ 947 */
904 tx_rate = le32_to_cpu(table->rs_table[index].rate_n_flags); 948 tx_rate = le32_to_cpu(table->rs_table[index].rate_n_flags);
949 lq_sta->last_rate_n_flags = tx_rate;
905 rs_get_tbl_info_from_mcs(tx_rate, priv->band, &tbl_type, &rs_index); 950 rs_get_tbl_info_from_mcs(tx_rate, priv->band, &tbl_type, &rs_index);
906 951
907 /* Update frame history window with "success" if Tx got ACKed ... */ 952 /* Update frame history window with "success" if Tx got ACKed ... */
@@ -958,7 +1003,7 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband,
958 1003
959 /* See if there's a better rate or modulation mode to try. */ 1004 /* See if there's a better rate or modulation mode to try. */
960 if (sta && sta->supp_rates[sband->band]) 1005 if (sta && sta->supp_rates[sband->band])
961 rs_rate_scale_perform(priv, hdr, sta, lq_sta); 1006 rs_rate_scale_perform(priv, skb, sta, lq_sta);
962out: 1007out:
963 return; 1008 return;
964} 1009}
@@ -988,6 +1033,8 @@ static void rs_set_stay_in_table(struct iwl_priv *priv, u8 is_legacy,
988 lq_sta->table_count = 0; 1033 lq_sta->table_count = 0;
989 lq_sta->total_failed = 0; 1034 lq_sta->total_failed = 0;
990 lq_sta->total_success = 0; 1035 lq_sta->total_success = 0;
1036 lq_sta->flush_timer = jiffies;
1037 lq_sta->action_counter = 0;
991} 1038}
992 1039
993/* 1040/*
@@ -1011,17 +1058,26 @@ static void rs_set_expected_tpt_table(struct iwl_lq_sta *lq_sta,
1011 tbl->expected_tpt = expected_tpt_siso20MHzSGI; 1058 tbl->expected_tpt = expected_tpt_siso20MHzSGI;
1012 else 1059 else
1013 tbl->expected_tpt = expected_tpt_siso20MHz; 1060 tbl->expected_tpt = expected_tpt_siso20MHz;
1014 1061 } else if (is_mimo2(tbl->lq_type)) {
1015 } else if (is_mimo(tbl->lq_type)) { /* FIXME:need to separate mimo2/3 */
1016 if (tbl->is_fat && !lq_sta->is_dup) 1062 if (tbl->is_fat && !lq_sta->is_dup)
1017 if (tbl->is_SGI) 1063 if (tbl->is_SGI)
1018 tbl->expected_tpt = expected_tpt_mimo40MHzSGI; 1064 tbl->expected_tpt = expected_tpt_mimo2_40MHzSGI;
1019 else 1065 else
1020 tbl->expected_tpt = expected_tpt_mimo40MHz; 1066 tbl->expected_tpt = expected_tpt_mimo2_40MHz;
1021 else if (tbl->is_SGI) 1067 else if (tbl->is_SGI)
1022 tbl->expected_tpt = expected_tpt_mimo20MHzSGI; 1068 tbl->expected_tpt = expected_tpt_mimo2_20MHzSGI;
1023 else 1069 else
1024 tbl->expected_tpt = expected_tpt_mimo20MHz; 1070 tbl->expected_tpt = expected_tpt_mimo2_20MHz;
1071 } else if (is_mimo3(tbl->lq_type)) {
1072 if (tbl->is_fat && !lq_sta->is_dup)
1073 if (tbl->is_SGI)
1074 tbl->expected_tpt = expected_tpt_mimo3_40MHzSGI;
1075 else
1076 tbl->expected_tpt = expected_tpt_mimo3_40MHz;
1077 else if (tbl->is_SGI)
1078 tbl->expected_tpt = expected_tpt_mimo3_20MHzSGI;
1079 else
1080 tbl->expected_tpt = expected_tpt_mimo3_20MHz;
1025 } else 1081 } else
1026 tbl->expected_tpt = expected_tpt_G; 1082 tbl->expected_tpt = expected_tpt_G;
1027} 1083}
@@ -1130,7 +1186,7 @@ static s32 rs_get_best_rate(struct iwl_priv *priv,
1130} 1186}
1131 1187
1132/* 1188/*
1133 * Set up search table for MIMO 1189 * Set up search table for MIMO2
1134 */ 1190 */
1135static int rs_switch_to_mimo2(struct iwl_priv *priv, 1191static int rs_switch_to_mimo2(struct iwl_priv *priv,
1136 struct iwl_lq_sta *lq_sta, 1192 struct iwl_lq_sta *lq_sta,
@@ -1158,10 +1214,10 @@ static int rs_switch_to_mimo2(struct iwl_priv *priv,
1158 tbl->lq_type = LQ_MIMO2; 1214 tbl->lq_type = LQ_MIMO2;
1159 tbl->is_dup = lq_sta->is_dup; 1215 tbl->is_dup = lq_sta->is_dup;
1160 tbl->action = 0; 1216 tbl->action = 0;
1217 tbl->max_search = IWL_MAX_SEARCH;
1161 rate_mask = lq_sta->active_mimo2_rate; 1218 rate_mask = lq_sta->active_mimo2_rate;
1162 1219
1163 if (priv->current_ht_config.supported_chan_width 1220 if (iwl_is_fat_tx_allowed(priv, &sta->ht_cap))
1164 == IWL_CHANNEL_WIDTH_40MHZ)
1165 tbl->is_fat = 1; 1221 tbl->is_fat = 1;
1166 else 1222 else
1167 tbl->is_fat = 0; 1223 tbl->is_fat = 0;
@@ -1183,7 +1239,73 @@ static int rs_switch_to_mimo2(struct iwl_priv *priv,
1183 rate = rs_get_best_rate(priv, lq_sta, tbl, rate_mask, index); 1239 rate = rs_get_best_rate(priv, lq_sta, tbl, rate_mask, index);
1184 1240
1185 IWL_DEBUG_RATE(priv, "LQ: MIMO2 best rate %d mask %X\n", rate, rate_mask); 1241 IWL_DEBUG_RATE(priv, "LQ: MIMO2 best rate %d mask %X\n", rate, rate_mask);
1242 if ((rate == IWL_RATE_INVALID) || !((1 << rate) & rate_mask)) {
1243 IWL_DEBUG_RATE(priv, "Can't switch with index %d rate mask %x\n",
1244 rate, rate_mask);
1245 return -1;
1246 }
1247 tbl->current_rate = rate_n_flags_from_tbl(priv, tbl, rate, is_green);
1248
1249 IWL_DEBUG_RATE(priv, "LQ: Switch to new mcs %X index is green %X\n",
1250 tbl->current_rate, is_green);
1251 return 0;
1252}
1253
1254/*
1255 * Set up search table for MIMO3
1256 */
1257static int rs_switch_to_mimo3(struct iwl_priv *priv,
1258 struct iwl_lq_sta *lq_sta,
1259 struct ieee80211_conf *conf,
1260 struct ieee80211_sta *sta,
1261 struct iwl_scale_tbl_info *tbl, int index)
1262{
1263 u16 rate_mask;
1264 s32 rate;
1265 s8 is_green = lq_sta->is_green;
1266
1267 if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported)
1268 return -1;
1269
1270 if (((sta->ht_cap.cap & IEEE80211_HT_CAP_SM_PS) >> 2)
1271 == WLAN_HT_CAP_SM_PS_STATIC)
1272 return -1;
1273
1274 /* Need both Tx chains/antennas to support MIMO */
1275 if (priv->hw_params.tx_chains_num < 3)
1276 return -1;
1277
1278 IWL_DEBUG_RATE(priv, "LQ: try to switch to MIMO3\n");
1279
1280 tbl->lq_type = LQ_MIMO3;
1281 tbl->is_dup = lq_sta->is_dup;
1282 tbl->action = 0;
1283 tbl->max_search = IWL_MAX_11N_MIMO3_SEARCH;
1284 rate_mask = lq_sta->active_mimo3_rate;
1285
1286 if (iwl_is_fat_tx_allowed(priv, &sta->ht_cap))
1287 tbl->is_fat = 1;
1288 else
1289 tbl->is_fat = 0;
1186 1290
1291 /* FIXME: - don't toggle SGI here
1292 if (tbl->is_fat) {
1293 if (priv->current_ht_config.sgf & HT_SHORT_GI_40MHZ_ONLY)
1294 tbl->is_SGI = 1;
1295 else
1296 tbl->is_SGI = 0;
1297 } else if (priv->current_ht_config.sgf & HT_SHORT_GI_20MHZ_ONLY)
1298 tbl->is_SGI = 1;
1299 else
1300 tbl->is_SGI = 0;
1301 */
1302
1303 rs_set_expected_tpt_table(lq_sta, tbl);
1304
1305 rate = rs_get_best_rate(priv, lq_sta, tbl, rate_mask, index);
1306
1307 IWL_DEBUG_RATE(priv, "LQ: MIMO3 best rate %d mask %X\n",
1308 rate, rate_mask);
1187 if ((rate == IWL_RATE_INVALID) || !((1 << rate) & rate_mask)) { 1309 if ((rate == IWL_RATE_INVALID) || !((1 << rate) & rate_mask)) {
1188 IWL_DEBUG_RATE(priv, "Can't switch with index %d rate mask %x\n", 1310 IWL_DEBUG_RATE(priv, "Can't switch with index %d rate mask %x\n",
1189 rate, rate_mask); 1311 rate, rate_mask);
@@ -1217,10 +1339,10 @@ static int rs_switch_to_siso(struct iwl_priv *priv,
1217 tbl->is_dup = lq_sta->is_dup; 1339 tbl->is_dup = lq_sta->is_dup;
1218 tbl->lq_type = LQ_SISO; 1340 tbl->lq_type = LQ_SISO;
1219 tbl->action = 0; 1341 tbl->action = 0;
1342 tbl->max_search = IWL_MAX_SEARCH;
1220 rate_mask = lq_sta->active_siso_rate; 1343 rate_mask = lq_sta->active_siso_rate;
1221 1344
1222 if (priv->current_ht_config.supported_chan_width 1345 if (iwl_is_fat_tx_allowed(priv, &sta->ht_cap))
1223 == IWL_CHANNEL_WIDTH_40MHZ)
1224 tbl->is_fat = 1; 1346 tbl->is_fat = 1;
1225 else 1347 else
1226 tbl->is_fat = 0; 1348 tbl->is_fat = 0;
@@ -1274,15 +1396,15 @@ static int rs_move_legacy_other(struct iwl_priv *priv,
1274 u8 valid_tx_ant = priv->hw_params.valid_tx_ant; 1396 u8 valid_tx_ant = priv->hw_params.valid_tx_ant;
1275 u8 tx_chains_num = priv->hw_params.tx_chains_num; 1397 u8 tx_chains_num = priv->hw_params.tx_chains_num;
1276 int ret = 0; 1398 int ret = 0;
1399 u8 update_search_tbl_counter = 0;
1277 1400
1278 for (; ;) { 1401 for (; ;) {
1402 lq_sta->action_counter++;
1279 switch (tbl->action) { 1403 switch (tbl->action) {
1280 case IWL_LEGACY_SWITCH_ANTENNA1: 1404 case IWL_LEGACY_SWITCH_ANTENNA1:
1281 case IWL_LEGACY_SWITCH_ANTENNA2: 1405 case IWL_LEGACY_SWITCH_ANTENNA2:
1282 IWL_DEBUG_RATE(priv, "LQ: Legacy toggle Antenna\n"); 1406 IWL_DEBUG_RATE(priv, "LQ: Legacy toggle Antenna\n");
1283 1407
1284 lq_sta->action_counter++;
1285
1286 if ((tbl->action == IWL_LEGACY_SWITCH_ANTENNA1 && 1408 if ((tbl->action == IWL_LEGACY_SWITCH_ANTENNA1 &&
1287 tx_chains_num <= 1) || 1409 tx_chains_num <= 1) ||
1288 (tbl->action == IWL_LEGACY_SWITCH_ANTENNA2 && 1410 (tbl->action == IWL_LEGACY_SWITCH_ANTENNA2 &&
@@ -1298,6 +1420,7 @@ static int rs_move_legacy_other(struct iwl_priv *priv,
1298 1420
1299 if (rs_toggle_antenna(valid_tx_ant, 1421 if (rs_toggle_antenna(valid_tx_ant,
1300 &search_tbl->current_rate, search_tbl)) { 1422 &search_tbl->current_rate, search_tbl)) {
1423 update_search_tbl_counter = 1;
1301 rs_set_expected_tpt_table(lq_sta, search_tbl); 1424 rs_set_expected_tpt_table(lq_sta, search_tbl);
1302 goto out; 1425 goto out;
1303 } 1426 }
@@ -1342,9 +1465,29 @@ static int rs_move_legacy_other(struct iwl_priv *priv,
1342 goto out; 1465 goto out;
1343 } 1466 }
1344 break; 1467 break;
1468
1469 case IWL_LEGACY_SWITCH_MIMO3_ABC:
1470 IWL_DEBUG_RATE(priv, "LQ: Legacy switch to MIMO3\n");
1471
1472 /* Set up search table to try MIMO3 */
1473 memcpy(search_tbl, tbl, sz);
1474 search_tbl->is_SGI = 0;
1475
1476 search_tbl->ant_type = ANT_ABC;
1477
1478 if (!rs_is_valid_ant(valid_tx_ant, search_tbl->ant_type))
1479 break;
1480
1481 ret = rs_switch_to_mimo3(priv, lq_sta, conf, sta,
1482 search_tbl, index);
1483 if (!ret) {
1484 lq_sta->action_counter = 0;
1485 goto out;
1486 }
1487 break;
1345 } 1488 }
1346 tbl->action++; 1489 tbl->action++;
1347 if (tbl->action > IWL_LEGACY_SWITCH_MIMO2_BC) 1490 if (tbl->action > IWL_LEGACY_SWITCH_MIMO3_ABC)
1348 tbl->action = IWL_LEGACY_SWITCH_ANTENNA1; 1491 tbl->action = IWL_LEGACY_SWITCH_ANTENNA1;
1349 1492
1350 if (tbl->action == start_action) 1493 if (tbl->action == start_action)
@@ -1357,8 +1500,10 @@ static int rs_move_legacy_other(struct iwl_priv *priv,
1357out: 1500out:
1358 lq_sta->search_better_tbl = 1; 1501 lq_sta->search_better_tbl = 1;
1359 tbl->action++; 1502 tbl->action++;
1360 if (tbl->action > IWL_LEGACY_SWITCH_MIMO2_BC) 1503 if (tbl->action > IWL_LEGACY_SWITCH_MIMO3_ABC)
1361 tbl->action = IWL_LEGACY_SWITCH_ANTENNA1; 1504 tbl->action = IWL_LEGACY_SWITCH_ANTENNA1;
1505 if (update_search_tbl_counter)
1506 search_tbl->action = tbl->action;
1362 return 0; 1507 return 0;
1363 1508
1364} 1509}
@@ -1381,6 +1526,7 @@ static int rs_move_siso_to_other(struct iwl_priv *priv,
1381 u8 start_action = tbl->action; 1526 u8 start_action = tbl->action;
1382 u8 valid_tx_ant = priv->hw_params.valid_tx_ant; 1527 u8 valid_tx_ant = priv->hw_params.valid_tx_ant;
1383 u8 tx_chains_num = priv->hw_params.tx_chains_num; 1528 u8 tx_chains_num = priv->hw_params.tx_chains_num;
1529 u8 update_search_tbl_counter = 0;
1384 int ret; 1530 int ret;
1385 1531
1386 for (;;) { 1532 for (;;) {
@@ -1401,8 +1547,10 @@ static int rs_move_siso_to_other(struct iwl_priv *priv,
1401 1547
1402 memcpy(search_tbl, tbl, sz); 1548 memcpy(search_tbl, tbl, sz);
1403 if (rs_toggle_antenna(valid_tx_ant, 1549 if (rs_toggle_antenna(valid_tx_ant,
1404 &search_tbl->current_rate, search_tbl)) 1550 &search_tbl->current_rate, search_tbl)) {
1551 update_search_tbl_counter = 1;
1405 goto out; 1552 goto out;
1553 }
1406 break; 1554 break;
1407 case IWL_SISO_SWITCH_MIMO2_AB: 1555 case IWL_SISO_SWITCH_MIMO2_AB:
1408 case IWL_SISO_SWITCH_MIMO2_AC: 1556 case IWL_SISO_SWITCH_MIMO2_AC:
@@ -1456,10 +1604,25 @@ static int rs_move_siso_to_other(struct iwl_priv *priv,
1456 search_tbl->current_rate = 1604 search_tbl->current_rate =
1457 rate_n_flags_from_tbl(priv, search_tbl, 1605 rate_n_flags_from_tbl(priv, search_tbl,
1458 index, is_green); 1606 index, is_green);
1607 update_search_tbl_counter = 1;
1459 goto out; 1608 goto out;
1609 case IWL_SISO_SWITCH_MIMO3_ABC:
1610 IWL_DEBUG_RATE(priv, "LQ: SISO switch to MIMO3\n");
1611 memcpy(search_tbl, tbl, sz);
1612 search_tbl->is_SGI = 0;
1613 search_tbl->ant_type = ANT_ABC;
1614
1615 if (!rs_is_valid_ant(valid_tx_ant, search_tbl->ant_type))
1616 break;
1617
1618 ret = rs_switch_to_mimo3(priv, lq_sta, conf, sta,
1619 search_tbl, index);
1620 if (!ret)
1621 goto out;
1622 break;
1460 } 1623 }
1461 tbl->action++; 1624 tbl->action++;
1462 if (tbl->action > IWL_SISO_SWITCH_GI) 1625 if (tbl->action > IWL_LEGACY_SWITCH_MIMO3_ABC)
1463 tbl->action = IWL_SISO_SWITCH_ANTENNA1; 1626 tbl->action = IWL_SISO_SWITCH_ANTENNA1;
1464 1627
1465 if (tbl->action == start_action) 1628 if (tbl->action == start_action)
@@ -1471,15 +1634,18 @@ static int rs_move_siso_to_other(struct iwl_priv *priv,
1471 out: 1634 out:
1472 lq_sta->search_better_tbl = 1; 1635 lq_sta->search_better_tbl = 1;
1473 tbl->action++; 1636 tbl->action++;
1474 if (tbl->action > IWL_SISO_SWITCH_GI) 1637 if (tbl->action > IWL_SISO_SWITCH_MIMO3_ABC)
1475 tbl->action = IWL_SISO_SWITCH_ANTENNA1; 1638 tbl->action = IWL_SISO_SWITCH_ANTENNA1;
1639 if (update_search_tbl_counter)
1640 search_tbl->action = tbl->action;
1641
1476 return 0; 1642 return 0;
1477} 1643}
1478 1644
1479/* 1645/*
1480 * Try to switch to new modulation mode from MIMO 1646 * Try to switch to new modulation mode from MIMO2
1481 */ 1647 */
1482static int rs_move_mimo_to_other(struct iwl_priv *priv, 1648static int rs_move_mimo2_to_other(struct iwl_priv *priv,
1483 struct iwl_lq_sta *lq_sta, 1649 struct iwl_lq_sta *lq_sta,
1484 struct ieee80211_conf *conf, 1650 struct ieee80211_conf *conf,
1485 struct ieee80211_sta *sta, int index) 1651 struct ieee80211_sta *sta, int index)
@@ -1494,6 +1660,7 @@ static int rs_move_mimo_to_other(struct iwl_priv *priv,
1494 u8 start_action = tbl->action; 1660 u8 start_action = tbl->action;
1495 u8 valid_tx_ant = priv->hw_params.valid_tx_ant; 1661 u8 valid_tx_ant = priv->hw_params.valid_tx_ant;
1496 u8 tx_chains_num = priv->hw_params.tx_chains_num; 1662 u8 tx_chains_num = priv->hw_params.tx_chains_num;
1663 u8 update_search_tbl_counter = 0;
1497 int ret; 1664 int ret;
1498 1665
1499 for (;;) { 1666 for (;;) {
@@ -1501,7 +1668,7 @@ static int rs_move_mimo_to_other(struct iwl_priv *priv,
1501 switch (tbl->action) { 1668 switch (tbl->action) {
1502 case IWL_MIMO2_SWITCH_ANTENNA1: 1669 case IWL_MIMO2_SWITCH_ANTENNA1:
1503 case IWL_MIMO2_SWITCH_ANTENNA2: 1670 case IWL_MIMO2_SWITCH_ANTENNA2:
1504 IWL_DEBUG_RATE(priv, "LQ: MIMO toggle Antennas\n"); 1671 IWL_DEBUG_RATE(priv, "LQ: MIMO2 toggle Antennas\n");
1505 1672
1506 if (tx_chains_num <= 2) 1673 if (tx_chains_num <= 2)
1507 break; 1674 break;
@@ -1511,8 +1678,10 @@ static int rs_move_mimo_to_other(struct iwl_priv *priv,
1511 1678
1512 memcpy(search_tbl, tbl, sz); 1679 memcpy(search_tbl, tbl, sz);
1513 if (rs_toggle_antenna(valid_tx_ant, 1680 if (rs_toggle_antenna(valid_tx_ant,
1514 &search_tbl->current_rate, search_tbl)) 1681 &search_tbl->current_rate, search_tbl)) {
1682 update_search_tbl_counter = 1;
1515 goto out; 1683 goto out;
1684 }
1516 break; 1685 break;
1517 case IWL_MIMO2_SWITCH_SISO_A: 1686 case IWL_MIMO2_SWITCH_SISO_A:
1518 case IWL_MIMO2_SWITCH_SISO_B: 1687 case IWL_MIMO2_SWITCH_SISO_B:
@@ -1549,9 +1718,9 @@ static int rs_move_mimo_to_other(struct iwl_priv *priv,
1549 HT_SHORT_GI_40MHZ)) 1718 HT_SHORT_GI_40MHZ))
1550 break; 1719 break;
1551 1720
1552 IWL_DEBUG_RATE(priv, "LQ: MIMO toggle SGI/NGI\n"); 1721 IWL_DEBUG_RATE(priv, "LQ: MIMO2 toggle SGI/NGI\n");
1553 1722
1554 /* Set up new search table for MIMO */ 1723 /* Set up new search table for MIMO2 */
1555 memcpy(search_tbl, tbl, sz); 1724 memcpy(search_tbl, tbl, sz);
1556 search_tbl->is_SGI = !tbl->is_SGI; 1725 search_tbl->is_SGI = !tbl->is_SGI;
1557 rs_set_expected_tpt_table(lq_sta, search_tbl); 1726 rs_set_expected_tpt_table(lq_sta, search_tbl);
@@ -1569,11 +1738,27 @@ static int rs_move_mimo_to_other(struct iwl_priv *priv,
1569 search_tbl->current_rate = 1738 search_tbl->current_rate =
1570 rate_n_flags_from_tbl(priv, search_tbl, 1739 rate_n_flags_from_tbl(priv, search_tbl,
1571 index, is_green); 1740 index, is_green);
1741 update_search_tbl_counter = 1;
1572 goto out; 1742 goto out;
1573 1743
1744 case IWL_MIMO2_SWITCH_MIMO3_ABC:
1745 IWL_DEBUG_RATE(priv, "LQ: MIMO2 switch to MIMO3\n");
1746 memcpy(search_tbl, tbl, sz);
1747 search_tbl->is_SGI = 0;
1748 search_tbl->ant_type = ANT_ABC;
1749
1750 if (!rs_is_valid_ant(valid_tx_ant, search_tbl->ant_type))
1751 break;
1752
1753 ret = rs_switch_to_mimo3(priv, lq_sta, conf, sta,
1754 search_tbl, index);
1755 if (!ret)
1756 goto out;
1757
1758 break;
1574 } 1759 }
1575 tbl->action++; 1760 tbl->action++;
1576 if (tbl->action > IWL_MIMO2_SWITCH_GI) 1761 if (tbl->action > IWL_MIMO2_SWITCH_MIMO3_ABC)
1577 tbl->action = IWL_MIMO2_SWITCH_ANTENNA1; 1762 tbl->action = IWL_MIMO2_SWITCH_ANTENNA1;
1578 1763
1579 if (tbl->action == start_action) 1764 if (tbl->action == start_action)
@@ -1584,8 +1769,153 @@ static int rs_move_mimo_to_other(struct iwl_priv *priv,
1584 out: 1769 out:
1585 lq_sta->search_better_tbl = 1; 1770 lq_sta->search_better_tbl = 1;
1586 tbl->action++; 1771 tbl->action++;
1587 if (tbl->action > IWL_MIMO2_SWITCH_GI) 1772 if (tbl->action > IWL_MIMO2_SWITCH_MIMO3_ABC)
1588 tbl->action = IWL_MIMO2_SWITCH_ANTENNA1; 1773 tbl->action = IWL_MIMO2_SWITCH_ANTENNA1;
1774 if (update_search_tbl_counter)
1775 search_tbl->action = tbl->action;
1776
1777 return 0;
1778
1779}
1780
1781/*
1782 * Try to switch to new modulation mode from MIMO3
1783 */
1784static int rs_move_mimo3_to_other(struct iwl_priv *priv,
1785 struct iwl_lq_sta *lq_sta,
1786 struct ieee80211_conf *conf,
1787 struct ieee80211_sta *sta, int index)
1788{
1789 s8 is_green = lq_sta->is_green;
1790 struct iwl_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]);
1791 struct iwl_scale_tbl_info *search_tbl =
1792 &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]);
1793 struct iwl_rate_scale_data *window = &(tbl->win[index]);
1794 u32 sz = (sizeof(struct iwl_scale_tbl_info) -
1795 (sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT));
1796 u8 start_action = tbl->action;
1797 u8 valid_tx_ant = priv->hw_params.valid_tx_ant;
1798 u8 tx_chains_num = priv->hw_params.tx_chains_num;
1799 int ret;
1800 u8 update_search_tbl_counter = 0;
1801
1802 for (;;) {
1803 lq_sta->action_counter++;
1804 switch (tbl->action) {
1805 case IWL_MIMO3_SWITCH_ANTENNA1:
1806 case IWL_MIMO3_SWITCH_ANTENNA2:
1807 IWL_DEBUG_RATE(priv, "LQ: MIMO3 toggle Antennas\n");
1808
1809 if (tx_chains_num <= 3)
1810 break;
1811
1812 if (window->success_ratio >= IWL_RS_GOOD_RATIO)
1813 break;
1814
1815 memcpy(search_tbl, tbl, sz);
1816 if (rs_toggle_antenna(valid_tx_ant,
1817 &search_tbl->current_rate, search_tbl))
1818 goto out;
1819 break;
1820 case IWL_MIMO3_SWITCH_SISO_A:
1821 case IWL_MIMO3_SWITCH_SISO_B:
1822 case IWL_MIMO3_SWITCH_SISO_C:
1823 IWL_DEBUG_RATE(priv, "LQ: MIMO3 switch to SISO\n");
1824
1825 /* Set up new search table for SISO */
1826 memcpy(search_tbl, tbl, sz);
1827
1828 if (tbl->action == IWL_MIMO3_SWITCH_SISO_A)
1829 search_tbl->ant_type = ANT_A;
1830 else if (tbl->action == IWL_MIMO3_SWITCH_SISO_B)
1831 search_tbl->ant_type = ANT_B;
1832 else
1833 search_tbl->ant_type = ANT_C;
1834
1835 if (!rs_is_valid_ant(valid_tx_ant, search_tbl->ant_type))
1836 break;
1837
1838 ret = rs_switch_to_siso(priv, lq_sta, conf, sta,
1839 search_tbl, index);
1840 if (!ret)
1841 goto out;
1842
1843 break;
1844
1845 case IWL_MIMO3_SWITCH_MIMO2_AB:
1846 case IWL_MIMO3_SWITCH_MIMO2_AC:
1847 case IWL_MIMO3_SWITCH_MIMO2_BC:
1848 IWL_DEBUG_RATE(priv, "LQ: MIMO3 switch to MIMO2\n");
1849
1850 memcpy(search_tbl, tbl, sz);
1851 search_tbl->is_SGI = 0;
1852 if (tbl->action == IWL_MIMO3_SWITCH_MIMO2_AB)
1853 search_tbl->ant_type = ANT_AB;
1854 else if (tbl->action == IWL_MIMO3_SWITCH_MIMO2_AC)
1855 search_tbl->ant_type = ANT_AC;
1856 else
1857 search_tbl->ant_type = ANT_BC;
1858
1859 if (!rs_is_valid_ant(valid_tx_ant, search_tbl->ant_type))
1860 break;
1861
1862 ret = rs_switch_to_mimo2(priv, lq_sta, conf, sta,
1863 search_tbl, index);
1864 if (!ret)
1865 goto out;
1866
1867 break;
1868
1869 case IWL_MIMO3_SWITCH_GI:
1870 if (!tbl->is_fat &&
1871 !(priv->current_ht_config.sgf &
1872 HT_SHORT_GI_20MHZ))
1873 break;
1874 if (tbl->is_fat &&
1875 !(priv->current_ht_config.sgf &
1876 HT_SHORT_GI_40MHZ))
1877 break;
1878
1879 IWL_DEBUG_RATE(priv, "LQ: MIMO3 toggle SGI/NGI\n");
1880
1881 /* Set up new search table for MIMO */
1882 memcpy(search_tbl, tbl, sz);
1883 search_tbl->is_SGI = !tbl->is_SGI;
1884 rs_set_expected_tpt_table(lq_sta, search_tbl);
1885 /*
1886 * If active table already uses the fastest possible
1887 * modulation (dual stream with short guard interval),
1888 * and it's working well, there's no need to look
1889 * for a better type of modulation!
1890 */
1891 if (tbl->is_SGI) {
1892 s32 tpt = lq_sta->last_tpt / 100;
1893 if (tpt >= search_tbl->expected_tpt[index])
1894 break;
1895 }
1896 search_tbl->current_rate =
1897 rate_n_flags_from_tbl(priv, search_tbl,
1898 index, is_green);
1899 update_search_tbl_counter = 1;
1900 goto out;
1901 }
1902 tbl->action++;
1903 if (tbl->action > IWL_MIMO3_SWITCH_GI)
1904 tbl->action = IWL_MIMO3_SWITCH_ANTENNA1;
1905
1906 if (tbl->action == start_action)
1907 break;
1908 }
1909 search_tbl->lq_type = LQ_NONE;
1910 return 0;
1911 out:
1912 lq_sta->search_better_tbl = 1;
1913 tbl->action++;
1914 if (tbl->action > IWL_MIMO3_SWITCH_GI)
1915 tbl->action = IWL_MIMO3_SWITCH_ANTENNA1;
1916 if (update_search_tbl_counter)
1917 search_tbl->action = tbl->action;
1918
1589 return 0; 1919 return 0;
1590 1920
1591} 1921}
@@ -1616,8 +1946,8 @@ static void rs_stay_in_table(struct iwl_lq_sta *lq_sta)
1616 /* Elapsed time using current modulation mode */ 1946 /* Elapsed time using current modulation mode */
1617 if (lq_sta->flush_timer) 1947 if (lq_sta->flush_timer)
1618 flush_interval_passed = 1948 flush_interval_passed =
1619 time_after(jiffies, 1949 time_after(jiffies,
1620 (unsigned long)(lq_sta->flush_timer + 1950 (unsigned long)(lq_sta->flush_timer +
1621 IWL_RATE_SCALE_FLUSH_INTVL)); 1951 IWL_RATE_SCALE_FLUSH_INTVL));
1622 1952
1623 /* 1953 /*
@@ -1676,12 +2006,14 @@ static void rs_stay_in_table(struct iwl_lq_sta *lq_sta)
1676 * Do rate scaling and search for new modulation mode. 2006 * Do rate scaling and search for new modulation mode.
1677 */ 2007 */
1678static void rs_rate_scale_perform(struct iwl_priv *priv, 2008static void rs_rate_scale_perform(struct iwl_priv *priv,
1679 struct ieee80211_hdr *hdr, 2009 struct sk_buff *skb,
1680 struct ieee80211_sta *sta, 2010 struct ieee80211_sta *sta,
1681 struct iwl_lq_sta *lq_sta) 2011 struct iwl_lq_sta *lq_sta)
1682{ 2012{
1683 struct ieee80211_hw *hw = priv->hw; 2013 struct ieee80211_hw *hw = priv->hw;
1684 struct ieee80211_conf *conf = &hw->conf; 2014 struct ieee80211_conf *conf = &hw->conf;
2015 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2016 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1685 int low = IWL_RATE_INVALID; 2017 int low = IWL_RATE_INVALID;
1686 int high = IWL_RATE_INVALID; 2018 int high = IWL_RATE_INVALID;
1687 int index; 2019 int index;
@@ -1707,11 +2039,10 @@ static void rs_rate_scale_perform(struct iwl_priv *priv,
1707 2039
1708 IWL_DEBUG_RATE(priv, "rate scale calculate new rate for skb\n"); 2040 IWL_DEBUG_RATE(priv, "rate scale calculate new rate for skb\n");
1709 2041
1710 /* Send management frames and broadcast/multicast data using 2042 /* Send management frames and NO_ACK data using lowest rate. */
1711 * lowest rate. */
1712 /* TODO: this could probably be improved.. */ 2043 /* TODO: this could probably be improved.. */
1713 if (!ieee80211_is_data(hdr->frame_control) || 2044 if (!ieee80211_is_data(hdr->frame_control) ||
1714 is_multicast_ether_addr(hdr->addr1)) 2045 info->flags & IEEE80211_TX_CTL_NO_ACK)
1715 return; 2046 return;
1716 2047
1717 if (!sta || !lq_sta) 2048 if (!sta || !lq_sta)
@@ -1732,6 +2063,10 @@ static void rs_rate_scale_perform(struct iwl_priv *priv,
1732 active_tbl = 1 - lq_sta->active_tbl; 2063 active_tbl = 1 - lq_sta->active_tbl;
1733 2064
1734 tbl = &(lq_sta->lq_info[active_tbl]); 2065 tbl = &(lq_sta->lq_info[active_tbl]);
2066 if (is_legacy(tbl->lq_type))
2067 lq_sta->is_green = 0;
2068 else
2069 lq_sta->is_green = rs_use_green(priv, conf);
1735 is_green = lq_sta->is_green; 2070 is_green = lq_sta->is_green;
1736 2071
1737 /* current tx rate */ 2072 /* current tx rate */
@@ -1951,6 +2286,7 @@ static void rs_rate_scale_perform(struct iwl_priv *priv,
1951 update_lq = 1; 2286 update_lq = 1;
1952 index = low; 2287 index = low;
1953 } 2288 }
2289
1954 break; 2290 break;
1955 case 1: 2291 case 1:
1956 /* Increase starting rate, update uCode's rate table */ 2292 /* Increase starting rate, update uCode's rate table */
@@ -1997,8 +2333,10 @@ lq_update:
1997 rs_move_legacy_other(priv, lq_sta, conf, sta, index); 2333 rs_move_legacy_other(priv, lq_sta, conf, sta, index);
1998 else if (is_siso(tbl->lq_type)) 2334 else if (is_siso(tbl->lq_type))
1999 rs_move_siso_to_other(priv, lq_sta, conf, sta, index); 2335 rs_move_siso_to_other(priv, lq_sta, conf, sta, index);
2336 else if (is_mimo2(tbl->lq_type))
2337 rs_move_mimo2_to_other(priv, lq_sta, conf, sta, index);
2000 else 2338 else
2001 rs_move_mimo_to_other(priv, lq_sta, conf, sta, index); 2339 rs_move_mimo3_to_other(priv, lq_sta, conf, sta, index);
2002 2340
2003 /* If new "search" mode was selected, set up in uCode table */ 2341 /* If new "search" mode was selected, set up in uCode table */
2004 if (lq_sta->search_better_tbl) { 2342 if (lq_sta->search_better_tbl) {
@@ -2014,8 +2352,11 @@ lq_update:
2014 tbl->current_rate, index); 2352 tbl->current_rate, index);
2015 rs_fill_link_cmd(priv, lq_sta, tbl->current_rate); 2353 rs_fill_link_cmd(priv, lq_sta, tbl->current_rate);
2016 iwl_send_lq_cmd(priv, &lq_sta->lq, CMD_ASYNC); 2354 iwl_send_lq_cmd(priv, &lq_sta->lq, CMD_ASYNC);
2017 } 2355 } else
2356 done_search = 1;
2357 }
2018 2358
2359 if (done_search && !lq_sta->stay_in_tbl) {
2019 /* If the "active" (non-search) mode was legacy, 2360 /* If the "active" (non-search) mode was legacy,
2020 * and we've tried switching antennas, 2361 * and we've tried switching antennas,
2021 * but we haven't been able to try HT modes (not available), 2362 * but we haven't been able to try HT modes (not available),
@@ -2023,8 +2364,7 @@ lq_update:
2023 * before next round of mode comparisons. */ 2364 * before next round of mode comparisons. */
2024 tbl1 = &(lq_sta->lq_info[lq_sta->active_tbl]); 2365 tbl1 = &(lq_sta->lq_info[lq_sta->active_tbl]);
2025 if (is_legacy(tbl1->lq_type) && !conf_is_ht(conf) && 2366 if (is_legacy(tbl1->lq_type) && !conf_is_ht(conf) &&
2026 lq_sta->action_counter >= 1) { 2367 lq_sta->action_counter > tbl1->max_search) {
2027 lq_sta->action_counter = 0;
2028 IWL_DEBUG_RATE(priv, "LQ: STAY in legacy table\n"); 2368 IWL_DEBUG_RATE(priv, "LQ: STAY in legacy table\n");
2029 rs_set_stay_in_table(priv, 1, lq_sta); 2369 rs_set_stay_in_table(priv, 1, lq_sta);
2030 } 2370 }
@@ -2033,7 +2373,7 @@ lq_update:
2033 * have been tried and compared, stay in this best modulation 2373 * have been tried and compared, stay in this best modulation
2034 * mode for a while before next round of mode comparisons. */ 2374 * mode for a while before next round of mode comparisons. */
2035 if (lq_sta->enable_counter && 2375 if (lq_sta->enable_counter &&
2036 (lq_sta->action_counter >= IWL_ACTION_LIMIT)) { 2376 (lq_sta->action_counter >= tbl1->max_search)) {
2037 if ((lq_sta->last_tpt > IWL_AGG_TPT_THREHOLD) && 2377 if ((lq_sta->last_tpt > IWL_AGG_TPT_THREHOLD) &&
2038 (lq_sta->tx_agg_tid_en & (1 << tid)) && 2378 (lq_sta->tx_agg_tid_en & (1 << tid)) &&
2039 (tid != MAX_TID_COUNT)) { 2379 (tid != MAX_TID_COUNT)) {
@@ -2047,20 +2387,8 @@ lq_update:
2047 lq_sta, sta); 2387 lq_sta, sta);
2048 } 2388 }
2049 } 2389 }
2050 lq_sta->action_counter = 0;
2051 rs_set_stay_in_table(priv, 0, lq_sta); 2390 rs_set_stay_in_table(priv, 0, lq_sta);
2052 } 2391 }
2053
2054 /*
2055 * Else, don't search for a new modulation mode.
2056 * Put new timestamp in stay-in-modulation-mode flush timer if:
2057 * 1) Not changing rates right now
2058 * 2) Not just finishing up a search
2059 * 3) flush timer is empty
2060 */
2061 } else {
2062 if ((!update_lq) && (!done_search) && (!lq_sta->flush_timer))
2063 lq_sta->flush_timer = jiffies;
2064 } 2392 }
2065 2393
2066out: 2394out:
@@ -2156,16 +2484,17 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, void *priv_sta,
2156 if (sta) 2484 if (sta)
2157 mask_bit = sta->supp_rates[sband->band]; 2485 mask_bit = sta->supp_rates[sband->band];
2158 2486
2159 /* Send management frames and broadcast/multicast data using lowest 2487 /* Send management frames and NO_ACK data using lowest rate. */
2160 * rate. */
2161 if (!ieee80211_is_data(hdr->frame_control) || 2488 if (!ieee80211_is_data(hdr->frame_control) ||
2162 is_multicast_ether_addr(hdr->addr1) || !sta || !lq_sta) { 2489 info->flags & IEEE80211_TX_CTL_NO_ACK || !sta || !lq_sta) {
2163 if (!mask_bit) 2490 if (!mask_bit)
2164 info->control.rates[0].idx = 2491 info->control.rates[0].idx =
2165 rate_lowest_index(sband, NULL); 2492 rate_lowest_index(sband, NULL);
2166 else 2493 else
2167 info->control.rates[0].idx = 2494 info->control.rates[0].idx =
2168 rate_lowest_index(sband, sta); 2495 rate_lowest_index(sband, sta);
2496 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
2497 info->control.rates[0].count = 1;
2169 return; 2498 return;
2170 } 2499 }
2171 2500
@@ -2173,13 +2502,15 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, void *priv_sta,
2173 2502
2174 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) && 2503 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
2175 !lq_sta->ibss_sta_added) { 2504 !lq_sta->ibss_sta_added) {
2176 u8 sta_id = iwl_find_station(priv, hdr->addr1); 2505 u8 sta_id = priv->cfg->ops->smgmt->find_station(priv,
2506 hdr->addr1);
2177 2507
2178 if (sta_id == IWL_INVALID_STATION) { 2508 if (sta_id == IWL_INVALID_STATION) {
2179 IWL_DEBUG_RATE(priv, "LQ: ADD station %pM\n", 2509 IWL_DEBUG_RATE(priv, "LQ: ADD station %pM\n",
2180 hdr->addr1); 2510 hdr->addr1);
2181 sta_id = iwl_add_station_flags(priv, hdr->addr1, 2511 sta_id = priv->cfg->ops->smgmt->add_station(priv,
2182 0, CMD_ASYNC, NULL); 2512 hdr->addr1, 0,
2513 CMD_ASYNC, NULL);
2183 } 2514 }
2184 if ((sta_id != IWL_INVALID_STATION)) { 2515 if ((sta_id != IWL_INVALID_STATION)) {
2185 lq_sta->lq.sta_id = sta_id; 2516 lq_sta->lq.sta_id = sta_id;
@@ -2189,12 +2520,33 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, void *priv_sta,
2189 } 2520 }
2190 } 2521 }
2191 2522
2192 if (rate_idx < 0 || rate_idx > IWL_RATE_COUNT) 2523 if (lq_sta->last_rate_n_flags & RATE_MCS_HT_MSK) {
2193 rate_idx = rate_lowest_index(sband, sta);
2194 else if (sband->band == IEEE80211_BAND_5GHZ)
2195 rate_idx -= IWL_FIRST_OFDM_RATE; 2524 rate_idx -= IWL_FIRST_OFDM_RATE;
2196 2525 /* 6M and 9M shared same MCS index */
2526 rate_idx = (rate_idx > 0) ? (rate_idx - 1) : 0;
2527 if (rs_extract_rate(lq_sta->last_rate_n_flags) >=
2528 IWL_RATE_MIMO3_6M_PLCP)
2529 rate_idx = rate_idx + (2 * MCS_INDEX_PER_STREAM);
2530 else if (rs_extract_rate(lq_sta->last_rate_n_flags) >=
2531 IWL_RATE_MIMO2_6M_PLCP)
2532 rate_idx = rate_idx + MCS_INDEX_PER_STREAM;
2533 info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
2534 if (lq_sta->last_rate_n_flags & RATE_MCS_SGI_MSK)
2535 info->control.rates[0].flags |= IEEE80211_TX_RC_SHORT_GI;
2536 if (lq_sta->last_rate_n_flags & RATE_MCS_DUP_MSK)
2537 info->control.rates[0].flags |= IEEE80211_TX_RC_DUP_DATA;
2538 if (lq_sta->last_rate_n_flags & RATE_MCS_FAT_MSK)
2539 info->control.rates[0].flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
2540 if (lq_sta->last_rate_n_flags & RATE_MCS_GF_MSK)
2541 info->control.rates[0].flags |= IEEE80211_TX_RC_GREEN_FIELD;
2542 } else {
2543 if (rate_idx < 0 || rate_idx > IWL_RATE_COUNT)
2544 rate_idx = rate_lowest_index(sband, sta);
2545 else if (sband->band == IEEE80211_BAND_5GHZ)
2546 rate_idx -= IWL_FIRST_OFDM_RATE;
2547 }
2197 info->control.rates[0].idx = rate_idx; 2548 info->control.rates[0].idx = rate_idx;
2549
2198} 2550}
2199 2551
2200static void *rs_alloc_sta(void *priv_rate, struct ieee80211_sta *sta, 2552static void *rs_alloc_sta(void *priv_rate, struct ieee80211_sta *sta,
@@ -2246,15 +2598,17 @@ static void rs_rate_init(void *priv_r, struct ieee80211_supported_band *sband,
2246 2598
2247 lq_sta->ibss_sta_added = 0; 2599 lq_sta->ibss_sta_added = 0;
2248 if (priv->iw_mode == NL80211_IFTYPE_AP) { 2600 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2249 u8 sta_id = iwl_find_station(priv, sta->addr); 2601 u8 sta_id = priv->cfg->ops->smgmt->find_station(priv,
2602 sta->addr);
2250 2603
2251 /* for IBSS the call are from tasklet */ 2604 /* for IBSS the call are from tasklet */
2252 IWL_DEBUG_RATE(priv, "LQ: ADD station %pM\n", sta->addr); 2605 IWL_DEBUG_RATE(priv, "LQ: ADD station %pM\n", sta->addr);
2253 2606
2254 if (sta_id == IWL_INVALID_STATION) { 2607 if (sta_id == IWL_INVALID_STATION) {
2255 IWL_DEBUG_RATE(priv, "LQ: ADD station %pM\n", sta->addr); 2608 IWL_DEBUG_RATE(priv, "LQ: ADD station %pM\n", sta->addr);
2256 sta_id = iwl_add_station_flags(priv, sta->addr, 2609 sta_id = priv->cfg->ops->smgmt->add_station(priv,
2257 0, CMD_ASYNC, NULL); 2610 sta->addr, 0,
2611 CMD_ASYNC, NULL);
2258 } 2612 }
2259 if ((sta_id != IWL_INVALID_STATION)) { 2613 if ((sta_id != IWL_INVALID_STATION)) {
2260 lq_sta->lq.sta_id = sta_id; 2614 lq_sta->lq.sta_id = sta_id;
@@ -2539,6 +2893,7 @@ static ssize_t rs_sta_dbgfs_scale_table_read(struct file *file,
2539 char *buff; 2893 char *buff;
2540 int desc = 0; 2894 int desc = 0;
2541 int i = 0; 2895 int i = 0;
2896 int index = 0;
2542 ssize_t ret; 2897 ssize_t ret;
2543 2898
2544 struct iwl_lq_sta *lq_sta = file->private_data; 2899 struct iwl_lq_sta *lq_sta = file->private_data;
@@ -2568,8 +2923,11 @@ static ssize_t rs_sta_dbgfs_scale_table_read(struct file *file,
2568 ((is_mimo2(tbl->lq_type)) ? "MIMO2" : "MIMO3")); 2923 ((is_mimo2(tbl->lq_type)) ? "MIMO2" : "MIMO3"));
2569 desc += sprintf(buff+desc, " %s", 2924 desc += sprintf(buff+desc, " %s",
2570 (tbl->is_fat) ? "40MHz" : "20MHz"); 2925 (tbl->is_fat) ? "40MHz" : "20MHz");
2571 desc += sprintf(buff+desc, " %s\n", (tbl->is_SGI) ? "SGI" : ""); 2926 desc += sprintf(buff+desc, " %s %s\n", (tbl->is_SGI) ? "SGI" : "",
2927 (lq_sta->is_green) ? "GF enabled" : "");
2572 } 2928 }
2929 desc += sprintf(buff+desc, "last tx rate=0x%X\n",
2930 lq_sta->last_rate_n_flags);
2573 desc += sprintf(buff+desc, "general:" 2931 desc += sprintf(buff+desc, "general:"
2574 "flags=0x%X mimo-d=%d s-ant0x%x d-ant=0x%x\n", 2932 "flags=0x%X mimo-d=%d s-ant0x%x d-ant=0x%x\n",
2575 lq_sta->lq.general_params.flags, 2933 lq_sta->lq.general_params.flags,
@@ -2590,10 +2948,19 @@ static ssize_t rs_sta_dbgfs_scale_table_read(struct file *file,
2590 lq_sta->lq.general_params.start_rate_index[2], 2948 lq_sta->lq.general_params.start_rate_index[2],
2591 lq_sta->lq.general_params.start_rate_index[3]); 2949 lq_sta->lq.general_params.start_rate_index[3]);
2592 2950
2593 2951 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
2594 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) 2952 index = iwl_hwrate_to_plcp_idx(
2595 desc += sprintf(buff+desc, " rate[%d] 0x%X\n", 2953 le32_to_cpu(lq_sta->lq.rs_table[i].rate_n_flags));
2596 i, le32_to_cpu(lq_sta->lq.rs_table[i].rate_n_flags)); 2954 if (is_legacy(tbl->lq_type)) {
2955 desc += sprintf(buff+desc, " rate[%d] 0x%X %smbps\n",
2956 i, le32_to_cpu(lq_sta->lq.rs_table[i].rate_n_flags),
2957 iwl_rate_mcs[index].mbps);
2958 } else {
2959 desc += sprintf(buff+desc, " rate[%d] 0x%X %smbps (%s)\n",
2960 i, le32_to_cpu(lq_sta->lq.rs_table[i].rate_n_flags),
2961 iwl_rate_mcs[index].mbps, iwl_rate_mcs[index].mcs);
2962 }
2963 }
2597 2964
2598 ret = simple_read_from_buffer(user_buf, count, ppos, buff, desc); 2965 ret = simple_read_from_buffer(user_buf, count, ppos, buff, desc);
2599 kfree(buff); 2966 kfree(buff);
@@ -2620,13 +2987,14 @@ static ssize_t rs_sta_dbgfs_stats_table_read(struct file *file,
2620 return -ENOMEM; 2987 return -ENOMEM;
2621 2988
2622 for (i = 0; i < LQ_SIZE; i++) { 2989 for (i = 0; i < LQ_SIZE; i++) {
2623 desc += sprintf(buff+desc, "%s type=%d SGI=%d FAT=%d DUP=%d\n" 2990 desc += sprintf(buff+desc, "%s type=%d SGI=%d FAT=%d DUP=%d GF=%d\n"
2624 "rate=0x%X\n", 2991 "rate=0x%X\n",
2625 lq_sta->active_tbl == i ? "*" : "x", 2992 lq_sta->active_tbl == i ? "*" : "x",
2626 lq_sta->lq_info[i].lq_type, 2993 lq_sta->lq_info[i].lq_type,
2627 lq_sta->lq_info[i].is_SGI, 2994 lq_sta->lq_info[i].is_SGI,
2628 lq_sta->lq_info[i].is_fat, 2995 lq_sta->lq_info[i].is_fat,
2629 lq_sta->lq_info[i].is_dup, 2996 lq_sta->lq_info[i].is_dup,
2997 lq_sta->is_green,
2630 lq_sta->lq_info[i].current_rate); 2998 lq_sta->lq_info[i].current_rate);
2631 for (j = 0; j < IWL_RATE_COUNT; j++) { 2999 for (j = 0; j < IWL_RATE_COUNT; j++) {
2632 desc += sprintf(buff+desc, 3000 desc += sprintf(buff+desc,
@@ -2646,6 +3014,43 @@ static const struct file_operations rs_sta_dbgfs_stats_table_ops = {
2646 .open = open_file_generic, 3014 .open = open_file_generic,
2647}; 3015};
2648 3016
3017static ssize_t rs_sta_dbgfs_rate_scale_data_read(struct file *file,
3018 char __user *user_buf, size_t count, loff_t *ppos)
3019{
3020 char buff[120];
3021 int desc = 0;
3022 ssize_t ret;
3023
3024 struct iwl_lq_sta *lq_sta = file->private_data;
3025 struct iwl_priv *priv;
3026 struct iwl_scale_tbl_info *tbl = &lq_sta->lq_info[lq_sta->active_tbl];
3027
3028 priv = lq_sta->drv;
3029
3030 if (is_Ht(tbl->lq_type))
3031 desc += sprintf(buff+desc,
3032 "Bit Rate= %d Mb/s\n",
3033 tbl->expected_tpt[lq_sta->last_txrate_idx]);
3034 else
3035 desc += sprintf(buff+desc,
3036 "Bit Rate= %d Mb/s\n",
3037 iwl_rates[lq_sta->last_txrate_idx].ieee >> 1);
3038 desc += sprintf(buff+desc,
3039 "Signal Level= %d dBm\tNoise Level= %d dBm\n",
3040 priv->last_rx_rssi, priv->last_rx_noise);
3041 desc += sprintf(buff+desc,
3042 "Tsf= 0x%llx\tBeacon time= 0x%08X\n",
3043 priv->last_tsf, priv->last_beacon_time);
3044
3045 ret = simple_read_from_buffer(user_buf, count, ppos, buff, desc);
3046 return ret;
3047}
3048
3049static const struct file_operations rs_sta_dbgfs_rate_scale_data_ops = {
3050 .read = rs_sta_dbgfs_rate_scale_data_read,
3051 .open = open_file_generic,
3052};
3053
2649static void rs_add_debugfs(void *priv, void *priv_sta, 3054static void rs_add_debugfs(void *priv, void *priv_sta,
2650 struct dentry *dir) 3055 struct dentry *dir)
2651{ 3056{
@@ -2656,6 +3061,9 @@ static void rs_add_debugfs(void *priv, void *priv_sta,
2656 lq_sta->rs_sta_dbgfs_stats_table_file = 3061 lq_sta->rs_sta_dbgfs_stats_table_file =
2657 debugfs_create_file("rate_stats_table", 0600, dir, 3062 debugfs_create_file("rate_stats_table", 0600, dir,
2658 lq_sta, &rs_sta_dbgfs_stats_table_ops); 3063 lq_sta, &rs_sta_dbgfs_stats_table_ops);
3064 lq_sta->rs_sta_dbgfs_rate_scale_data_file =
3065 debugfs_create_file("rate_scale_data", 0600, dir,
3066 lq_sta, &rs_sta_dbgfs_rate_scale_data_ops);
2659 lq_sta->rs_sta_dbgfs_tx_agg_tid_en_file = 3067 lq_sta->rs_sta_dbgfs_tx_agg_tid_en_file =
2660 debugfs_create_u8("tx_agg_tid_enable", 0600, dir, 3068 debugfs_create_u8("tx_agg_tid_enable", 0600, dir,
2661 &lq_sta->tx_agg_tid_en); 3069 &lq_sta->tx_agg_tid_en);
@@ -2667,6 +3075,7 @@ static void rs_remove_debugfs(void *priv, void *priv_sta)
2667 struct iwl_lq_sta *lq_sta = priv_sta; 3075 struct iwl_lq_sta *lq_sta = priv_sta;
2668 debugfs_remove(lq_sta->rs_sta_dbgfs_scale_table_file); 3076 debugfs_remove(lq_sta->rs_sta_dbgfs_scale_table_file);
2669 debugfs_remove(lq_sta->rs_sta_dbgfs_stats_table_file); 3077 debugfs_remove(lq_sta->rs_sta_dbgfs_stats_table_file);
3078 debugfs_remove(lq_sta->rs_sta_dbgfs_rate_scale_data_file);
2670 debugfs_remove(lq_sta->rs_sta_dbgfs_tx_agg_tid_en_file); 3079 debugfs_remove(lq_sta->rs_sta_dbgfs_tx_agg_tid_en_file);
2671} 3080}
2672#endif 3081#endif
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.h b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h
index ab59acc405d9..25050bf315a2 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.h
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h
@@ -241,6 +241,7 @@ enum {
241#define IWL_LEGACY_SWITCH_MIMO2_AB 3 241#define IWL_LEGACY_SWITCH_MIMO2_AB 3
242#define IWL_LEGACY_SWITCH_MIMO2_AC 4 242#define IWL_LEGACY_SWITCH_MIMO2_AC 4
243#define IWL_LEGACY_SWITCH_MIMO2_BC 5 243#define IWL_LEGACY_SWITCH_MIMO2_BC 5
244#define IWL_LEGACY_SWITCH_MIMO3_ABC 6
244 245
245/* possible actions when in siso mode */ 246/* possible actions when in siso mode */
246#define IWL_SISO_SWITCH_ANTENNA1 0 247#define IWL_SISO_SWITCH_ANTENNA1 0
@@ -249,6 +250,8 @@ enum {
249#define IWL_SISO_SWITCH_MIMO2_AC 3 250#define IWL_SISO_SWITCH_MIMO2_AC 3
250#define IWL_SISO_SWITCH_MIMO2_BC 4 251#define IWL_SISO_SWITCH_MIMO2_BC 4
251#define IWL_SISO_SWITCH_GI 5 252#define IWL_SISO_SWITCH_GI 5
253#define IWL_SISO_SWITCH_MIMO3_ABC 6
254
252 255
253/* possible actions when in mimo mode */ 256/* possible actions when in mimo mode */
254#define IWL_MIMO2_SWITCH_ANTENNA1 0 257#define IWL_MIMO2_SWITCH_ANTENNA1 0
@@ -257,6 +260,23 @@ enum {
257#define IWL_MIMO2_SWITCH_SISO_B 3 260#define IWL_MIMO2_SWITCH_SISO_B 3
258#define IWL_MIMO2_SWITCH_SISO_C 4 261#define IWL_MIMO2_SWITCH_SISO_C 4
259#define IWL_MIMO2_SWITCH_GI 5 262#define IWL_MIMO2_SWITCH_GI 5
263#define IWL_MIMO2_SWITCH_MIMO3_ABC 6
264
265
266/* possible actions when in mimo3 mode */
267#define IWL_MIMO3_SWITCH_ANTENNA1 0
268#define IWL_MIMO3_SWITCH_ANTENNA2 1
269#define IWL_MIMO3_SWITCH_SISO_A 2
270#define IWL_MIMO3_SWITCH_SISO_B 3
271#define IWL_MIMO3_SWITCH_SISO_C 4
272#define IWL_MIMO3_SWITCH_MIMO2_AB 5
273#define IWL_MIMO3_SWITCH_MIMO2_AC 6
274#define IWL_MIMO3_SWITCH_MIMO2_BC 7
275#define IWL_MIMO3_SWITCH_GI 8
276
277
278#define IWL_MAX_11N_MIMO3_SEARCH IWL_MIMO3_SWITCH_GI
279#define IWL_MAX_SEARCH IWL_MIMO2_SWITCH_MIMO3_ABC
260 280
261/*FIXME:RS:add possible actions for MIMO3*/ 281/*FIXME:RS:add possible actions for MIMO3*/
262 282
@@ -307,6 +327,13 @@ enum iwl_table_type {
307#define ANT_BC (ANT_B | ANT_C) 327#define ANT_BC (ANT_B | ANT_C)
308#define ANT_ABC (ANT_AB | ANT_C) 328#define ANT_ABC (ANT_AB | ANT_C)
309 329
330#define IWL_MAX_MCS_DISPLAY_SIZE 12
331
332struct iwl_rate_mcs_info {
333 char mbps[IWL_MAX_MCS_DISPLAY_SIZE];
334 char mcs[IWL_MAX_MCS_DISPLAY_SIZE];
335};
336
310static inline u8 num_of_ant(u8 mask) 337static inline u8 num_of_ant(u8 mask)
311{ 338{
312 return !!((mask) & ANT_A) + 339 return !!((mask) & ANT_A) +
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index f46ba2475776..0a5507cbeb3f 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -102,7 +102,7 @@ MODULE_ALIAS("iwl4965");
102 * function correctly transitions out of the RXON_ASSOC_MSK state if 102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes. 103 * a HW tune is required based on the RXON structure changes.
104 */ 104 */
105static int iwl_commit_rxon(struct iwl_priv *priv) 105int iwl_commit_rxon(struct iwl_priv *priv)
106{ 106{
107 /* cast away the const for active_rxon in this function */ 107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon; 108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
@@ -188,10 +188,9 @@ static int iwl_commit_rxon(struct iwl_priv *priv)
188 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); 188 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
189 } 189 }
190 190
191 iwl_clear_stations_table(priv); 191 priv->cfg->ops->smgmt->clear_station_table(priv);
192 192
193 if (!priv->error_recovering) 193 priv->start_calib = 0;
194 priv->start_calib = 0;
195 194
196 /* Add the broadcast address so we can send broadcast frames */ 195 /* Add the broadcast address so we can send broadcast frames */
197 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == 196 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
@@ -246,8 +245,9 @@ static int iwl_commit_rxon(struct iwl_priv *priv)
246void iwl_update_chain_flags(struct iwl_priv *priv) 245void iwl_update_chain_flags(struct iwl_priv *priv)
247{ 246{
248 247
249 iwl_set_rxon_chain(priv); 248 if (priv->cfg->ops->hcmd->set_rxon_chain)
250 iwl_commit_rxon(priv); 249 priv->cfg->ops->hcmd->set_rxon_chain(priv);
250 iwlcore_commit_rxon(priv);
251} 251}
252 252
253static void iwl_clear_free_frames(struct iwl_priv *priv) 253static void iwl_clear_free_frames(struct iwl_priv *priv)
@@ -503,24 +503,12 @@ int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
503int iwl_hw_tx_queue_init(struct iwl_priv *priv, 503int iwl_hw_tx_queue_init(struct iwl_priv *priv,
504 struct iwl_tx_queue *txq) 504 struct iwl_tx_queue *txq)
505{ 505{
506 int ret;
507 unsigned long flags;
508 int txq_id = txq->q.id; 506 int txq_id = txq->q.id;
509 507
510 spin_lock_irqsave(&priv->lock, flags);
511 ret = iwl_grab_nic_access(priv);
512 if (ret) {
513 spin_unlock_irqrestore(&priv->lock, flags);
514 return ret;
515 }
516
517 /* Circular buffer (TFD queue in DRAM) physical base address */ 508 /* Circular buffer (TFD queue in DRAM) physical base address */
518 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id), 509 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
519 txq->q.dma_addr >> 8); 510 txq->q.dma_addr >> 8);
520 511
521 iwl_release_nic_access(priv);
522 spin_unlock_irqrestore(&priv->lock, flags);
523
524 return 0; 512 return 0;
525} 513}
526 514
@@ -531,76 +519,6 @@ int iwl_hw_tx_queue_init(struct iwl_priv *priv,
531 * 519 *
532 ******************************************************************************/ 520 ******************************************************************************/
533 521
534static void iwl_ht_conf(struct iwl_priv *priv,
535 struct ieee80211_bss_conf *bss_conf)
536{
537 struct ieee80211_sta_ht_cap *ht_conf;
538 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
539 struct ieee80211_sta *sta;
540
541 IWL_DEBUG_MAC80211(priv, "enter: \n");
542
543 if (!iwl_conf->is_ht)
544 return;
545
546
547 /*
548 * It is totally wrong to base global information on something
549 * that is valid only when associated, alas, this driver works
550 * that way and I don't know how to fix it.
551 */
552
553 rcu_read_lock();
554 sta = ieee80211_find_sta(priv->hw, priv->bssid);
555 if (!sta) {
556 rcu_read_unlock();
557 return;
558 }
559 ht_conf = &sta->ht_cap;
560
561 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
562 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
563 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
564 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
565
566 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
567 iwl_conf->max_amsdu_size =
568 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
569
570 iwl_conf->supported_chan_width =
571 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
572
573 /*
574 * XXX: The HT configuration needs to be moved into iwl_mac_config()
575 * to be done there correctly.
576 */
577
578 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
579 if (conf_is_ht40_minus(&priv->hw->conf))
580 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
581 else if (conf_is_ht40_plus(&priv->hw->conf))
582 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
583
584 /* If no above or below channel supplied disable FAT channel */
585 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
586 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
587 iwl_conf->supported_chan_width = 0;
588
589 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
590
591 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
592
593 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
594 iwl_conf->ht_protection =
595 bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
596 iwl_conf->non_GF_STA_present =
597 !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
598
599 rcu_read_unlock();
600
601 IWL_DEBUG_MAC80211(priv, "leave\n");
602}
603
604#define MAX_UCODE_BEACON_INTERVAL 4096 522#define MAX_UCODE_BEACON_INTERVAL 4096
605 523
606static u16 iwl_adjust_beacon_interval(u16 beacon_val) 524static u16 iwl_adjust_beacon_interval(u16 beacon_val)
@@ -636,7 +554,8 @@ static void iwl_setup_rxon_timing(struct iwl_priv *priv)
636 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int); 554 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
637 priv->rxon_timing.atim_window = 0; 555 priv->rxon_timing.atim_window = 0;
638 } else { 556 } else {
639 beacon_int = iwl_adjust_beacon_interval(conf->beacon_int); 557 beacon_int = iwl_adjust_beacon_interval(
558 priv->vif->bss_conf.beacon_int);
640 559
641 /* TODO: we need to get atim_window from upper stack 560 /* TODO: we need to get atim_window from upper stack
642 * for now we set to 0 */ 561 * for now we set to 0 */
@@ -657,23 +576,6 @@ static void iwl_setup_rxon_timing(struct iwl_priv *priv)
657 le16_to_cpu(priv->rxon_timing.atim_window)); 576 le16_to_cpu(priv->rxon_timing.atim_window));
658} 577}
659 578
660static int iwl_set_mode(struct iwl_priv *priv, int mode)
661{
662 iwl_connection_init_rx_config(priv, mode);
663 iwl_set_rxon_chain(priv);
664 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
665
666 iwl_clear_stations_table(priv);
667
668 /* dont commit rxon if rf-kill is on*/
669 if (!iwl_is_ready_rf(priv))
670 return -EAGAIN;
671
672 iwl_commit_rxon(priv);
673
674 return 0;
675}
676
677/****************************************************************************** 579/******************************************************************************
678 * 580 *
679 * Generic RX handler implementations 581 * Generic RX handler implementations
@@ -795,6 +697,7 @@ static void iwl_rx_card_state_notif(struct iwl_priv *priv,
795 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 697 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
796 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); 698 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
797 unsigned long status = priv->status; 699 unsigned long status = priv->status;
700 unsigned long reg_flags;
798 701
799 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n", 702 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
800 (flags & HW_CARD_DISABLED) ? "Kill" : "On", 703 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
@@ -806,32 +709,25 @@ static void iwl_rx_card_state_notif(struct iwl_priv *priv,
806 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, 709 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
807 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 710 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
808 711
809 if (!iwl_grab_nic_access(priv)) { 712 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
810 iwl_write_direct32( 713 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
811 priv, HBUS_TARG_MBX_C,
812 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
813
814 iwl_release_nic_access(priv);
815 }
816 714
817 if (!(flags & RXON_CARD_DISABLED)) { 715 if (!(flags & RXON_CARD_DISABLED)) {
818 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, 716 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
819 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 717 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
820 if (!iwl_grab_nic_access(priv)) { 718 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
821 iwl_write_direct32(
822 priv, HBUS_TARG_MBX_C,
823 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); 719 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
824 720
825 iwl_release_nic_access(priv);
826 }
827 } 721 }
828 722
829 if (flags & RF_CARD_DISABLED) { 723 if (flags & RF_CARD_DISABLED) {
830 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, 724 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
831 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); 725 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
832 iwl_read32(priv, CSR_UCODE_DRV_GP1); 726 iwl_read32(priv, CSR_UCODE_DRV_GP1);
727 spin_lock_irqsave(&priv->reg_lock, reg_flags);
833 if (!iwl_grab_nic_access(priv)) 728 if (!iwl_grab_nic_access(priv))
834 iwl_release_nic_access(priv); 729 iwl_release_nic_access(priv);
730 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
835 } 731 }
836 } 732 }
837 733
@@ -860,14 +756,6 @@ static void iwl_rx_card_state_notif(struct iwl_priv *priv,
860 756
861int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) 757int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
862{ 758{
863 int ret;
864 unsigned long flags;
865
866 spin_lock_irqsave(&priv->lock, flags);
867 ret = iwl_grab_nic_access(priv);
868 if (ret)
869 goto err;
870
871 if (src == IWL_PWR_SRC_VAUX) { 759 if (src == IWL_PWR_SRC_VAUX) {
872 if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) 760 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
873 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 761 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
@@ -879,10 +767,7 @@ int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
879 ~APMG_PS_CTRL_MSK_PWR_SRC); 767 ~APMG_PS_CTRL_MSK_PWR_SRC);
880 } 768 }
881 769
882 iwl_release_nic_access(priv); 770 return 0;
883err:
884 spin_unlock_irqrestore(&priv->lock, flags);
885 return ret;
886} 771}
887 772
888/** 773/**
@@ -946,6 +831,7 @@ void iwl_rx_handle(struct iwl_priv *priv)
946 unsigned long flags; 831 unsigned long flags;
947 u8 fill_rx = 0; 832 u8 fill_rx = 0;
948 u32 count = 8; 833 u32 count = 8;
834 int total_empty;
949 835
950 /* uCode's read index (stored in shared DRAM) indicates the last Rx 836 /* uCode's read index (stored in shared DRAM) indicates the last Rx
951 * buffer that the driver may process (last buffer filled by ucode). */ 837 * buffer that the driver may process (last buffer filled by ucode). */
@@ -956,7 +842,12 @@ void iwl_rx_handle(struct iwl_priv *priv)
956 if (i == r) 842 if (i == r)
957 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i); 843 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
958 844
959 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) 845 /* calculate total frames need to be restock after handling RX */
846 total_empty = r - priv->rxq.write_actual;
847 if (total_empty < 0)
848 total_empty += RX_QUEUE_SIZE;
849
850 if (total_empty > (RX_QUEUE_SIZE / 2))
960 fill_rx = 1; 851 fill_rx = 1;
961 852
962 while (i != r) { 853 while (i != r) {
@@ -995,6 +886,7 @@ void iwl_rx_handle(struct iwl_priv *priv)
995 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, 886 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
996 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 887 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
997 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); 888 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
889 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
998 } else { 890 } else {
999 /* No handling needed */ 891 /* No handling needed */
1000 IWL_DEBUG_RX(priv, 892 IWL_DEBUG_RX(priv,
@@ -1032,7 +924,7 @@ void iwl_rx_handle(struct iwl_priv *priv)
1032 count++; 924 count++;
1033 if (count >= 8) { 925 if (count >= 8) {
1034 priv->rxq.read = i; 926 priv->rxq.read = i;
1035 iwl_rx_queue_restock(priv); 927 iwl_rx_replenish_now(priv);
1036 count = 0; 928 count = 0;
1037 } 929 }
1038 } 930 }
@@ -1040,7 +932,10 @@ void iwl_rx_handle(struct iwl_priv *priv)
1040 932
1041 /* Backtrack one entry */ 933 /* Backtrack one entry */
1042 priv->rxq.read = i; 934 priv->rxq.read = i;
1043 iwl_rx_queue_restock(priv); 935 if (fill_rx)
936 iwl_rx_replenish_now(priv);
937 else
938 iwl_rx_queue_restock(priv);
1044} 939}
1045 940
1046/* call this function to flush any scheduled tasklet */ 941/* call this function to flush any scheduled tasklet */
@@ -1051,24 +946,7 @@ static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1051 tasklet_kill(&priv->irq_tasklet); 946 tasklet_kill(&priv->irq_tasklet);
1052} 947}
1053 948
1054static void iwl_error_recovery(struct iwl_priv *priv) 949static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1055{
1056 unsigned long flags;
1057
1058 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1059 sizeof(priv->staging_rxon));
1060 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1061 iwl_commit_rxon(priv);
1062
1063 iwl_rxon_add_station(priv, priv->bssid, 1);
1064
1065 spin_lock_irqsave(&priv->lock, flags);
1066 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1067 priv->error_recovering = 0;
1068 spin_unlock_irqrestore(&priv->lock, flags);
1069}
1070
1071static void iwl_irq_tasklet(struct iwl_priv *priv)
1072{ 950{
1073 u32 inta, handled = 0; 951 u32 inta, handled = 0;
1074 u32 inta_fh; 952 u32 inta_fh;
@@ -1116,6 +994,7 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1116 /* Tell the device to stop sending interrupts */ 994 /* Tell the device to stop sending interrupts */
1117 iwl_disable_interrupts(priv); 995 iwl_disable_interrupts(priv);
1118 996
997 priv->isr_stats.hw++;
1119 iwl_irq_handle_error(priv); 998 iwl_irq_handle_error(priv);
1120 999
1121 handled |= CSR_INT_BIT_HW_ERR; 1000 handled |= CSR_INT_BIT_HW_ERR;
@@ -1128,13 +1007,17 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1128#ifdef CONFIG_IWLWIFI_DEBUG 1007#ifdef CONFIG_IWLWIFI_DEBUG
1129 if (priv->debug_level & (IWL_DL_ISR)) { 1008 if (priv->debug_level & (IWL_DL_ISR)) {
1130 /* NIC fires this, but we don't use it, redundant with WAKEUP */ 1009 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1131 if (inta & CSR_INT_BIT_SCD) 1010 if (inta & CSR_INT_BIT_SCD) {
1132 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit " 1011 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1133 "the frame/frames.\n"); 1012 "the frame/frames.\n");
1013 priv->isr_stats.sch++;
1014 }
1134 1015
1135 /* Alive notification via Rx interrupt will do the real work */ 1016 /* Alive notification via Rx interrupt will do the real work */
1136 if (inta & CSR_INT_BIT_ALIVE) 1017 if (inta & CSR_INT_BIT_ALIVE) {
1137 IWL_DEBUG_ISR(priv, "Alive interrupt\n"); 1018 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1019 priv->isr_stats.alive++;
1020 }
1138 } 1021 }
1139#endif 1022#endif
1140 /* Safely ignore these bits for debug checks below */ 1023 /* Safely ignore these bits for debug checks below */
@@ -1150,6 +1033,8 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1150 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n", 1033 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1151 hw_rf_kill ? "disable radio" : "enable radio"); 1034 hw_rf_kill ? "disable radio" : "enable radio");
1152 1035
1036 priv->isr_stats.rfkill++;
1037
1153 /* driver only loads ucode once setting the interface up. 1038 /* driver only loads ucode once setting the interface up.
1154 * the driver allows loading the ucode even if the radio 1039 * the driver allows loading the ucode even if the radio
1155 * is killed. Hence update the killswitch state here. The 1040 * is killed. Hence update the killswitch state here. The
@@ -1169,6 +1054,7 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1169 /* Chip got too hot and stopped itself */ 1054 /* Chip got too hot and stopped itself */
1170 if (inta & CSR_INT_BIT_CT_KILL) { 1055 if (inta & CSR_INT_BIT_CT_KILL) {
1171 IWL_ERR(priv, "Microcode CT kill error detected.\n"); 1056 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1057 priv->isr_stats.ctkill++;
1172 handled |= CSR_INT_BIT_CT_KILL; 1058 handled |= CSR_INT_BIT_CT_KILL;
1173 } 1059 }
1174 1060
@@ -1176,6 +1062,8 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1176 if (inta & CSR_INT_BIT_SW_ERR) { 1062 if (inta & CSR_INT_BIT_SW_ERR) {
1177 IWL_ERR(priv, "Microcode SW error detected. " 1063 IWL_ERR(priv, "Microcode SW error detected. "
1178 " Restarting 0x%X.\n", inta); 1064 " Restarting 0x%X.\n", inta);
1065 priv->isr_stats.sw++;
1066 priv->isr_stats.sw_err = inta;
1179 iwl_irq_handle_error(priv); 1067 iwl_irq_handle_error(priv);
1180 handled |= CSR_INT_BIT_SW_ERR; 1068 handled |= CSR_INT_BIT_SW_ERR;
1181 } 1069 }
@@ -1191,6 +1079,8 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1191 iwl_txq_update_write_ptr(priv, &priv->txq[4]); 1079 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1192 iwl_txq_update_write_ptr(priv, &priv->txq[5]); 1080 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1193 1081
1082 priv->isr_stats.wakeup++;
1083
1194 handled |= CSR_INT_BIT_WAKEUP; 1084 handled |= CSR_INT_BIT_WAKEUP;
1195 } 1085 }
1196 1086
@@ -1199,23 +1089,27 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1199 * notifications from uCode come through here*/ 1089 * notifications from uCode come through here*/
1200 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { 1090 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1201 iwl_rx_handle(priv); 1091 iwl_rx_handle(priv);
1092 priv->isr_stats.rx++;
1202 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); 1093 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1203 } 1094 }
1204 1095
1205 if (inta & CSR_INT_BIT_FH_TX) { 1096 if (inta & CSR_INT_BIT_FH_TX) {
1206 IWL_DEBUG_ISR(priv, "Tx interrupt\n"); 1097 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1098 priv->isr_stats.tx++;
1207 handled |= CSR_INT_BIT_FH_TX; 1099 handled |= CSR_INT_BIT_FH_TX;
1208 /* FH finished to write, send event */ 1100 /* FH finished to write, send event */
1209 priv->ucode_write_complete = 1; 1101 priv->ucode_write_complete = 1;
1210 wake_up_interruptible(&priv->wait_command_queue); 1102 wake_up_interruptible(&priv->wait_command_queue);
1211 } 1103 }
1212 1104
1213 if (inta & ~handled) 1105 if (inta & ~handled) {
1214 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled); 1106 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1107 priv->isr_stats.unhandled++;
1108 }
1215 1109
1216 if (inta & ~CSR_INI_SET_MASK) { 1110 if (inta & ~(priv->inta_mask)) {
1217 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n", 1111 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1218 inta & ~CSR_INI_SET_MASK); 1112 inta & ~priv->inta_mask);
1219 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh); 1113 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1220 } 1114 }
1221 1115
@@ -1236,6 +1130,200 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1236 spin_unlock_irqrestore(&priv->lock, flags); 1130 spin_unlock_irqrestore(&priv->lock, flags);
1237} 1131}
1238 1132
1133/* tasklet for iwlagn interrupt */
1134static void iwl_irq_tasklet(struct iwl_priv *priv)
1135{
1136 u32 inta = 0;
1137 u32 handled = 0;
1138 unsigned long flags;
1139#ifdef CONFIG_IWLWIFI_DEBUG
1140 u32 inta_mask;
1141#endif
1142
1143 spin_lock_irqsave(&priv->lock, flags);
1144
1145 /* Ack/clear/reset pending uCode interrupts.
1146 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1147 */
1148 iwl_write32(priv, CSR_INT, priv->inta);
1149
1150 inta = priv->inta;
1151
1152#ifdef CONFIG_IWLWIFI_DEBUG
1153 if (priv->debug_level & IWL_DL_ISR) {
1154 /* just for debug */
1155 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1156 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1157 inta, inta_mask);
1158 }
1159#endif
1160 /* saved interrupt in inta variable now we can reset priv->inta */
1161 priv->inta = 0;
1162
1163 /* Now service all interrupt bits discovered above. */
1164 if (inta & CSR_INT_BIT_HW_ERR) {
1165 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
1166
1167 /* Tell the device to stop sending interrupts */
1168 iwl_disable_interrupts(priv);
1169
1170 priv->isr_stats.hw++;
1171 iwl_irq_handle_error(priv);
1172
1173 handled |= CSR_INT_BIT_HW_ERR;
1174
1175 spin_unlock_irqrestore(&priv->lock, flags);
1176
1177 return;
1178 }
1179
1180#ifdef CONFIG_IWLWIFI_DEBUG
1181 if (priv->debug_level & (IWL_DL_ISR)) {
1182 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1183 if (inta & CSR_INT_BIT_SCD) {
1184 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1185 "the frame/frames.\n");
1186 priv->isr_stats.sch++;
1187 }
1188
1189 /* Alive notification via Rx interrupt will do the real work */
1190 if (inta & CSR_INT_BIT_ALIVE) {
1191 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1192 priv->isr_stats.alive++;
1193 }
1194 }
1195#endif
1196 /* Safely ignore these bits for debug checks below */
1197 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1198
1199 /* HW RF KILL switch toggled */
1200 if (inta & CSR_INT_BIT_RF_KILL) {
1201 int hw_rf_kill = 0;
1202 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1203 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1204 hw_rf_kill = 1;
1205
1206 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1207 hw_rf_kill ? "disable radio" : "enable radio");
1208
1209 priv->isr_stats.rfkill++;
1210
1211 /* driver only loads ucode once setting the interface up.
1212 * the driver allows loading the ucode even if the radio
1213 * is killed. Hence update the killswitch state here. The
1214 * rfkill handler will care about restarting if needed.
1215 */
1216 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1217 if (hw_rf_kill)
1218 set_bit(STATUS_RF_KILL_HW, &priv->status);
1219 else
1220 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1221 queue_work(priv->workqueue, &priv->rf_kill);
1222 }
1223
1224 handled |= CSR_INT_BIT_RF_KILL;
1225 }
1226
1227 /* Chip got too hot and stopped itself */
1228 if (inta & CSR_INT_BIT_CT_KILL) {
1229 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1230 priv->isr_stats.ctkill++;
1231 handled |= CSR_INT_BIT_CT_KILL;
1232 }
1233
1234 /* Error detected by uCode */
1235 if (inta & CSR_INT_BIT_SW_ERR) {
1236 IWL_ERR(priv, "Microcode SW error detected. "
1237 " Restarting 0x%X.\n", inta);
1238 priv->isr_stats.sw++;
1239 priv->isr_stats.sw_err = inta;
1240 iwl_irq_handle_error(priv);
1241 handled |= CSR_INT_BIT_SW_ERR;
1242 }
1243
1244 /* uCode wakes up after power-down sleep */
1245 if (inta & CSR_INT_BIT_WAKEUP) {
1246 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1247 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1248 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1249 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1250 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1251 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1252 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1253 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1254
1255 priv->isr_stats.wakeup++;
1256
1257 handled |= CSR_INT_BIT_WAKEUP;
1258 }
1259
1260 /* All uCode command responses, including Tx command responses,
1261 * Rx "responses" (frame-received notification), and other
1262 * notifications from uCode come through here*/
1263 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1264 CSR_INT_BIT_RX_PERIODIC)) {
1265 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1266 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1267 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1268 iwl_write32(priv, CSR_FH_INT_STATUS,
1269 CSR49_FH_INT_RX_MASK);
1270 }
1271 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1272 handled |= CSR_INT_BIT_RX_PERIODIC;
1273 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1274 }
1275 /* Sending RX interrupt require many steps to be done in the
1276 * the device:
1277 * 1- write interrupt to current index in ICT table.
1278 * 2- dma RX frame.
1279 * 3- update RX shared data to indicate last write index.
1280 * 4- send interrupt.
1281 * This could lead to RX race, driver could receive RX interrupt
1282 * but the shared data changes does not reflect this.
1283 * this could lead to RX race, RX periodic will solve this race
1284 */
1285 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1286 CSR_INT_PERIODIC_DIS);
1287 iwl_rx_handle(priv);
1288 /* Only set RX periodic if real RX is received. */
1289 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1290 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1291 CSR_INT_PERIODIC_ENA);
1292
1293 priv->isr_stats.rx++;
1294 }
1295
1296 if (inta & CSR_INT_BIT_FH_TX) {
1297 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1298 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1299 priv->isr_stats.tx++;
1300 handled |= CSR_INT_BIT_FH_TX;
1301 /* FH finished to write, send event */
1302 priv->ucode_write_complete = 1;
1303 wake_up_interruptible(&priv->wait_command_queue);
1304 }
1305
1306 if (inta & ~handled) {
1307 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1308 priv->isr_stats.unhandled++;
1309 }
1310
1311 if (inta & ~(priv->inta_mask)) {
1312 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1313 inta & ~priv->inta_mask);
1314 }
1315
1316
1317 /* Re-enable all interrupts */
1318 /* only Re-enable if diabled by irq */
1319 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1320 iwl_enable_interrupts(priv);
1321
1322 spin_unlock_irqrestore(&priv->lock, flags);
1323
1324}
1325
1326
1239/****************************************************************************** 1327/******************************************************************************
1240 * 1328 *
1241 * uCode download functions 1329 * uCode download functions
@@ -1501,10 +1589,6 @@ static int iwl_read_ucode(struct iwl_priv *priv)
1501 return ret; 1589 return ret;
1502} 1590}
1503 1591
1504/* temporary */
1505static int iwl_mac_beacon_update(struct ieee80211_hw *hw,
1506 struct sk_buff *skb);
1507
1508/** 1592/**
1509 * iwl_alive_start - called after REPLY_ALIVE notification received 1593 * iwl_alive_start - called after REPLY_ALIVE notification received
1510 * from protocol/runtime uCode (initialization uCode's 1594 * from protocol/runtime uCode (initialization uCode's
@@ -1533,7 +1617,7 @@ static void iwl_alive_start(struct iwl_priv *priv)
1533 goto restart; 1617 goto restart;
1534 } 1618 }
1535 1619
1536 iwl_clear_stations_table(priv); 1620 priv->cfg->ops->smgmt->clear_station_table(priv);
1537 ret = priv->cfg->ops->lib->alive_notify(priv); 1621 ret = priv->cfg->ops->lib->alive_notify(priv);
1538 if (ret) { 1622 if (ret) {
1539 IWL_WARN(priv, 1623 IWL_WARN(priv,
@@ -1561,7 +1645,10 @@ static void iwl_alive_start(struct iwl_priv *priv)
1561 } else { 1645 } else {
1562 /* Initialize our rx_config data */ 1646 /* Initialize our rx_config data */
1563 iwl_connection_init_rx_config(priv, priv->iw_mode); 1647 iwl_connection_init_rx_config(priv, priv->iw_mode);
1564 iwl_set_rxon_chain(priv); 1648
1649 if (priv->cfg->ops->hcmd->set_rxon_chain)
1650 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1651
1565 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); 1652 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1566 } 1653 }
1567 1654
@@ -1571,7 +1658,7 @@ static void iwl_alive_start(struct iwl_priv *priv)
1571 iwl_reset_run_time_calib(priv); 1658 iwl_reset_run_time_calib(priv);
1572 1659
1573 /* Configure the adapter for unassociated operation */ 1660 /* Configure the adapter for unassociated operation */
1574 iwl_commit_rxon(priv); 1661 iwlcore_commit_rxon(priv);
1575 1662
1576 /* At this point, the NIC is initialized and operational */ 1663 /* At this point, the NIC is initialized and operational */
1577 iwl_rf_kill_ct_config(priv); 1664 iwl_rf_kill_ct_config(priv);
@@ -1582,9 +1669,6 @@ static void iwl_alive_start(struct iwl_priv *priv)
1582 set_bit(STATUS_READY, &priv->status); 1669 set_bit(STATUS_READY, &priv->status);
1583 wake_up_interruptible(&priv->wait_command_queue); 1670 wake_up_interruptible(&priv->wait_command_queue);
1584 1671
1585 if (priv->error_recovering)
1586 iwl_error_recovery(priv);
1587
1588 iwl_power_update_mode(priv, 1); 1672 iwl_power_update_mode(priv, 1);
1589 1673
1590 /* reassociate for ADHOC mode */ 1674 /* reassociate for ADHOC mode */
@@ -1619,7 +1703,7 @@ static void __iwl_down(struct iwl_priv *priv)
1619 1703
1620 iwl_leds_unregister(priv); 1704 iwl_leds_unregister(priv);
1621 1705
1622 iwl_clear_stations_table(priv); 1706 priv->cfg->ops->smgmt->clear_station_table(priv);
1623 1707
1624 /* Unblock any waiting calls */ 1708 /* Unblock any waiting calls */
1625 wake_up_interruptible_all(&priv->wait_command_queue); 1709 wake_up_interruptible_all(&priv->wait_command_queue);
@@ -1642,7 +1726,7 @@ static void __iwl_down(struct iwl_priv *priv)
1642 ieee80211_stop_queues(priv->hw); 1726 ieee80211_stop_queues(priv->hw);
1643 1727
1644 /* If we have not previously called iwl_init() then 1728 /* If we have not previously called iwl_init() then
1645 * clear all bits but the RF Kill and SUSPEND bits and return */ 1729 * clear all bits but the RF Kill bits and return */
1646 if (!iwl_is_init(priv)) { 1730 if (!iwl_is_init(priv)) {
1647 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << 1731 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1648 STATUS_RF_KILL_HW | 1732 STATUS_RF_KILL_HW |
@@ -1650,28 +1734,26 @@ static void __iwl_down(struct iwl_priv *priv)
1650 STATUS_RF_KILL_SW | 1734 STATUS_RF_KILL_SW |
1651 test_bit(STATUS_GEO_CONFIGURED, &priv->status) << 1735 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1652 STATUS_GEO_CONFIGURED | 1736 STATUS_GEO_CONFIGURED |
1653 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
1654 STATUS_IN_SUSPEND |
1655 test_bit(STATUS_EXIT_PENDING, &priv->status) << 1737 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1656 STATUS_EXIT_PENDING; 1738 STATUS_EXIT_PENDING;
1657 goto exit; 1739 goto exit;
1658 } 1740 }
1659 1741
1660 /* ...otherwise clear out all the status bits but the RF Kill and 1742 /* ...otherwise clear out all the status bits but the RF Kill
1661 * SUSPEND bits and continue taking the NIC down. */ 1743 * bits and continue taking the NIC down. */
1662 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << 1744 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1663 STATUS_RF_KILL_HW | 1745 STATUS_RF_KILL_HW |
1664 test_bit(STATUS_RF_KILL_SW, &priv->status) << 1746 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1665 STATUS_RF_KILL_SW | 1747 STATUS_RF_KILL_SW |
1666 test_bit(STATUS_GEO_CONFIGURED, &priv->status) << 1748 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1667 STATUS_GEO_CONFIGURED | 1749 STATUS_GEO_CONFIGURED |
1668 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
1669 STATUS_IN_SUSPEND |
1670 test_bit(STATUS_FW_ERROR, &priv->status) << 1750 test_bit(STATUS_FW_ERROR, &priv->status) <<
1671 STATUS_FW_ERROR | 1751 STATUS_FW_ERROR |
1672 test_bit(STATUS_EXIT_PENDING, &priv->status) << 1752 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1673 STATUS_EXIT_PENDING; 1753 STATUS_EXIT_PENDING;
1674 1754
1755 /* device going down, Stop using ICT table */
1756 iwl_disable_ict(priv);
1675 spin_lock_irqsave(&priv->lock, flags); 1757 spin_lock_irqsave(&priv->lock, flags);
1676 iwl_clear_bit(priv, CSR_GP_CNTRL, 1758 iwl_clear_bit(priv, CSR_GP_CNTRL,
1677 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 1759 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
@@ -1680,18 +1762,13 @@ static void __iwl_down(struct iwl_priv *priv)
1680 iwl_txq_ctx_stop(priv); 1762 iwl_txq_ctx_stop(priv);
1681 iwl_rxq_stop(priv); 1763 iwl_rxq_stop(priv);
1682 1764
1683 spin_lock_irqsave(&priv->lock, flags); 1765 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1684 if (!iwl_grab_nic_access(priv)) { 1766 APMG_CLK_VAL_DMA_CLK_RQT);
1685 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1686 APMG_CLK_VAL_DMA_CLK_RQT);
1687 iwl_release_nic_access(priv);
1688 }
1689 spin_unlock_irqrestore(&priv->lock, flags);
1690 1767
1691 udelay(5); 1768 udelay(5);
1692 1769
1693 /* FIXME: apm_ops.suspend(priv) */ 1770 /* FIXME: apm_ops.suspend(priv) */
1694 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status)) 1771 if (exit_pending)
1695 priv->cfg->ops->lib->apm_ops.stop(priv); 1772 priv->cfg->ops->lib->apm_ops.stop(priv);
1696 else 1773 else
1697 priv->cfg->ops->lib->apm_ops.reset(priv); 1774 priv->cfg->ops->lib->apm_ops.reset(priv);
@@ -1715,6 +1792,49 @@ static void iwl_down(struct iwl_priv *priv)
1715 iwl_cancel_deferred_work(priv); 1792 iwl_cancel_deferred_work(priv);
1716} 1793}
1717 1794
1795#define HW_READY_TIMEOUT (50)
1796
1797static int iwl_set_hw_ready(struct iwl_priv *priv)
1798{
1799 int ret = 0;
1800
1801 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1802 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1803
1804 /* See if we got it */
1805 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1806 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1807 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1808 HW_READY_TIMEOUT);
1809 if (ret != -ETIMEDOUT)
1810 priv->hw_ready = true;
1811 else
1812 priv->hw_ready = false;
1813
1814 IWL_DEBUG_INFO(priv, "hardware %s\n",
1815 (priv->hw_ready == 1) ? "ready" : "not ready");
1816 return ret;
1817}
1818
1819static int iwl_prepare_card_hw(struct iwl_priv *priv)
1820{
1821 int ret = 0;
1822
1823 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1824
1825 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1826 CSR_HW_IF_CONFIG_REG_PREPARE);
1827
1828 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1829 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1830 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1831
1832 if (ret != -ETIMEDOUT)
1833 iwl_set_hw_ready(priv);
1834
1835 return ret;
1836}
1837
1718#define MAX_HW_RESTARTS 5 1838#define MAX_HW_RESTARTS 5
1719 1839
1720static int __iwl_up(struct iwl_priv *priv) 1840static int __iwl_up(struct iwl_priv *priv)
@@ -1732,6 +1852,13 @@ static int __iwl_up(struct iwl_priv *priv)
1732 return -EIO; 1852 return -EIO;
1733 } 1853 }
1734 1854
1855 iwl_prepare_card_hw(priv);
1856
1857 if (!priv->hw_ready) {
1858 IWL_WARN(priv, "Exit HW not ready\n");
1859 return -EIO;
1860 }
1861
1735 /* If platform's RF_KILL switch is NOT set to KILL */ 1862 /* If platform's RF_KILL switch is NOT set to KILL */
1736 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 1863 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1737 clear_bit(STATUS_RF_KILL_HW, &priv->status); 1864 clear_bit(STATUS_RF_KILL_HW, &priv->status);
@@ -1760,6 +1887,8 @@ static int __iwl_up(struct iwl_priv *priv)
1760 1887
1761 /* clear (again), then enable host interrupts */ 1888 /* clear (again), then enable host interrupts */
1762 iwl_write32(priv, CSR_INT, 0xFFFFFFFF); 1889 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1890 /* enable dram interrupt */
1891 iwl_reset_ict(priv);
1763 iwl_enable_interrupts(priv); 1892 iwl_enable_interrupts(priv);
1764 1893
1765 /* really make sure rfkill handshake bits are cleared */ 1894 /* really make sure rfkill handshake bits are cleared */
@@ -1774,7 +1903,7 @@ static int __iwl_up(struct iwl_priv *priv)
1774 1903
1775 for (i = 0; i < MAX_HW_RESTARTS; i++) { 1904 for (i = 0; i < MAX_HW_RESTARTS; i++) {
1776 1905
1777 iwl_clear_stations_table(priv); 1906 priv->cfg->ops->smgmt->clear_station_table(priv);
1778 1907
1779 /* load bootstrap state machine, 1908 /* load bootstrap state machine,
1780 * load bootstrap program into processor's memory, 1909 * load bootstrap program into processor's memory,
@@ -1787,9 +1916,6 @@ static int __iwl_up(struct iwl_priv *priv)
1787 continue; 1916 continue;
1788 } 1917 }
1789 1918
1790 /* Clear out the uCode error bit if it is set */
1791 clear_bit(STATUS_FW_ERROR, &priv->status);
1792
1793 /* start card; "initialize" will load runtime ucode */ 1919 /* start card; "initialize" will load runtime ucode */
1794 iwl_nic_start(priv); 1920 iwl_nic_start(priv);
1795 1921
@@ -1884,8 +2010,17 @@ static void iwl_bg_restart(struct work_struct *data)
1884 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 2010 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1885 return; 2011 return;
1886 2012
1887 iwl_down(priv); 2013 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
1888 queue_work(priv->workqueue, &priv->up); 2014 mutex_lock(&priv->mutex);
2015 priv->vif = NULL;
2016 priv->is_open = 0;
2017 mutex_unlock(&priv->mutex);
2018 iwl_down(priv);
2019 ieee80211_restart_hw(priv->hw);
2020 } else {
2021 iwl_down(priv);
2022 queue_work(priv->workqueue, &priv->up);
2023 }
1889} 2024}
1890 2025
1891static void iwl_bg_rx_replenish(struct work_struct *data) 2026static void iwl_bg_rx_replenish(struct work_struct *data)
@@ -1903,7 +2038,7 @@ static void iwl_bg_rx_replenish(struct work_struct *data)
1903 2038
1904#define IWL_DELAY_NEXT_SCAN (HZ*2) 2039#define IWL_DELAY_NEXT_SCAN (HZ*2)
1905 2040
1906static void iwl_post_associate(struct iwl_priv *priv) 2041void iwl_post_associate(struct iwl_priv *priv)
1907{ 2042{
1908 struct ieee80211_conf *conf = NULL; 2043 struct ieee80211_conf *conf = NULL;
1909 int ret = 0; 2044 int ret = 0;
@@ -1925,13 +2060,12 @@ static void iwl_post_associate(struct iwl_priv *priv)
1925 if (!priv->vif || !priv->is_open) 2060 if (!priv->vif || !priv->is_open)
1926 return; 2061 return;
1927 2062
1928 iwl_power_cancel_timeout(priv);
1929 iwl_scan_cancel_timeout(priv, 200); 2063 iwl_scan_cancel_timeout(priv, 200);
1930 2064
1931 conf = ieee80211_get_hw_conf(priv->hw); 2065 conf = ieee80211_get_hw_conf(priv->hw);
1932 2066
1933 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2067 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1934 iwl_commit_rxon(priv); 2068 iwlcore_commit_rxon(priv);
1935 2069
1936 iwl_setup_rxon_timing(priv); 2070 iwl_setup_rxon_timing(priv);
1937 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, 2071 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
@@ -1944,7 +2078,9 @@ static void iwl_post_associate(struct iwl_priv *priv)
1944 2078
1945 iwl_set_rxon_ht(priv, &priv->current_ht_config); 2079 iwl_set_rxon_ht(priv, &priv->current_ht_config);
1946 2080
1947 iwl_set_rxon_chain(priv); 2081 if (priv->cfg->ops->hcmd->set_rxon_chain)
2082 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2083
1948 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); 2084 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
1949 2085
1950 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n", 2086 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
@@ -1966,7 +2102,7 @@ static void iwl_post_associate(struct iwl_priv *priv)
1966 2102
1967 } 2103 }
1968 2104
1969 iwl_commit_rxon(priv); 2105 iwlcore_commit_rxon(priv);
1970 2106
1971 switch (priv->iw_mode) { 2107 switch (priv->iw_mode) {
1972 case NL80211_IFTYPE_STATION: 2108 case NL80211_IFTYPE_STATION:
@@ -1999,7 +2135,7 @@ static void iwl_post_associate(struct iwl_priv *priv)
1999 * If chain noise has already been run, then we need to enable 2135 * If chain noise has already been run, then we need to enable
2000 * power management here */ 2136 * power management here */
2001 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE) 2137 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2002 iwl_power_enable_management(priv); 2138 iwl_power_update_mode(priv, 0);
2003 2139
2004 /* Enable Rx differential gain and sensitivity calibrations */ 2140 /* Enable Rx differential gain and sensitivity calibrations */
2005 iwl_chain_noise_reset(priv); 2141 iwl_chain_noise_reset(priv);
@@ -2052,9 +2188,6 @@ static int iwl_mac_start(struct ieee80211_hw *hw)
2052 2188
2053 IWL_DEBUG_INFO(priv, "Start UP work done.\n"); 2189 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2054 2190
2055 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2056 return 0;
2057
2058 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from 2191 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2059 * mac80211 will not be run successfully. */ 2192 * mac80211 will not be run successfully. */
2060 ret = wait_event_interruptible_timeout(priv->wait_command_queue, 2193 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
@@ -2080,10 +2213,8 @@ static void iwl_mac_stop(struct ieee80211_hw *hw)
2080 2213
2081 IWL_DEBUG_MAC80211(priv, "enter\n"); 2214 IWL_DEBUG_MAC80211(priv, "enter\n");
2082 2215
2083 if (!priv->is_open) { 2216 if (!priv->is_open)
2084 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
2085 return; 2217 return;
2086 }
2087 2218
2088 priv->is_open = 0; 2219 priv->is_open = 0;
2089 2220
@@ -2123,175 +2254,7 @@ static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2123 return NETDEV_TX_OK; 2254 return NETDEV_TX_OK;
2124} 2255}
2125 2256
2126static int iwl_mac_add_interface(struct ieee80211_hw *hw, 2257void iwl_config_ap(struct iwl_priv *priv)
2127 struct ieee80211_if_init_conf *conf)
2128{
2129 struct iwl_priv *priv = hw->priv;
2130 unsigned long flags;
2131
2132 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2133
2134 if (priv->vif) {
2135 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2136 return -EOPNOTSUPP;
2137 }
2138
2139 spin_lock_irqsave(&priv->lock, flags);
2140 priv->vif = conf->vif;
2141 priv->iw_mode = conf->type;
2142
2143 spin_unlock_irqrestore(&priv->lock, flags);
2144
2145 mutex_lock(&priv->mutex);
2146
2147 if (conf->mac_addr) {
2148 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2149 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2150 }
2151
2152 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2153 /* we are not ready, will run again when ready */
2154 set_bit(STATUS_MODE_PENDING, &priv->status);
2155
2156 mutex_unlock(&priv->mutex);
2157
2158 IWL_DEBUG_MAC80211(priv, "leave\n");
2159 return 0;
2160}
2161
2162/**
2163 * iwl_mac_config - mac80211 config callback
2164 *
2165 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2166 * be set inappropriately and the driver currently sets the hardware up to
2167 * use it whenever needed.
2168 */
2169static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2170{
2171 struct iwl_priv *priv = hw->priv;
2172 const struct iwl_channel_info *ch_info;
2173 struct ieee80211_conf *conf = &hw->conf;
2174 unsigned long flags = 0;
2175 int ret = 0;
2176 u16 ch;
2177 int scan_active = 0;
2178
2179 mutex_lock(&priv->mutex);
2180 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2181 conf->channel->hw_value, changed);
2182
2183 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2184 test_bit(STATUS_SCANNING, &priv->status))) {
2185 scan_active = 1;
2186 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2187 }
2188
2189
2190 /* during scanning mac80211 will delay channel setting until
2191 * scan finish with changed = 0
2192 */
2193 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2194 if (scan_active)
2195 goto set_ch_out;
2196
2197 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2198 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2199 if (!is_channel_valid(ch_info)) {
2200 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2201 ret = -EINVAL;
2202 goto set_ch_out;
2203 }
2204
2205 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2206 !is_channel_ibss(ch_info)) {
2207 IWL_ERR(priv, "channel %d in band %d not "
2208 "IBSS channel\n",
2209 conf->channel->hw_value, conf->channel->band);
2210 ret = -EINVAL;
2211 goto set_ch_out;
2212 }
2213
2214 priv->current_ht_config.is_ht = conf_is_ht(conf);
2215
2216 spin_lock_irqsave(&priv->lock, flags);
2217
2218
2219 /* if we are switching from ht to 2.4 clear flags
2220 * from any ht related info since 2.4 does not
2221 * support ht */
2222 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2223 priv->staging_rxon.flags = 0;
2224
2225 iwl_set_rxon_channel(priv, conf->channel);
2226
2227 iwl_set_flags_for_band(priv, conf->channel->band);
2228 spin_unlock_irqrestore(&priv->lock, flags);
2229 set_ch_out:
2230 /* The list of supported rates and rate mask can be different
2231 * for each band; since the band may have changed, reset
2232 * the rate mask to what mac80211 lists */
2233 iwl_set_rate(priv);
2234 }
2235
2236 if (changed & IEEE80211_CONF_CHANGE_PS) {
2237 if (conf->flags & IEEE80211_CONF_PS)
2238 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2239 else
2240 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2241 if (ret)
2242 IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
2243
2244 }
2245
2246 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2247 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2248 priv->tx_power_user_lmt, conf->power_level);
2249
2250 iwl_set_tx_power(priv, conf->power_level, false);
2251 }
2252
2253 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2254 iwl_set_rxon_chain(priv);
2255
2256 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
2257 if (conf->radio_enabled &&
2258 iwl_radio_kill_sw_enable_radio(priv)) {
2259 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
2260 "waiting for uCode\n");
2261 goto out;
2262 }
2263
2264 if (!conf->radio_enabled)
2265 iwl_radio_kill_sw_disable_radio(priv);
2266 }
2267
2268 if (!conf->radio_enabled) {
2269 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
2270 goto out;
2271 }
2272
2273 if (!iwl_is_ready(priv)) {
2274 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2275 goto out;
2276 }
2277
2278 if (scan_active)
2279 goto out;
2280
2281 if (memcmp(&priv->active_rxon,
2282 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2283 iwl_commit_rxon(priv);
2284 else
2285 IWL_DEBUG_INFO(priv, "No re-sending same RXON configuration.\n");
2286
2287
2288out:
2289 IWL_DEBUG_MAC80211(priv, "leave\n");
2290 mutex_unlock(&priv->mutex);
2291 return ret;
2292}
2293
2294static void iwl_config_ap(struct iwl_priv *priv)
2295{ 2258{
2296 int ret = 0; 2259 int ret = 0;
2297 unsigned long flags; 2260 unsigned long flags;
@@ -2304,7 +2267,7 @@ static void iwl_config_ap(struct iwl_priv *priv)
2304 2267
2305 /* RXON - unassoc (to set timing command) */ 2268 /* RXON - unassoc (to set timing command) */
2306 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2269 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2307 iwl_commit_rxon(priv); 2270 iwlcore_commit_rxon(priv);
2308 2271
2309 /* RXON Timing */ 2272 /* RXON Timing */
2310 iwl_setup_rxon_timing(priv); 2273 iwl_setup_rxon_timing(priv);
@@ -2314,7 +2277,8 @@ static void iwl_config_ap(struct iwl_priv *priv)
2314 IWL_WARN(priv, "REPLY_RXON_TIMING failed - " 2277 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2315 "Attempting to continue.\n"); 2278 "Attempting to continue.\n");
2316 2279
2317 iwl_set_rxon_chain(priv); 2280 if (priv->cfg->ops->hcmd->set_rxon_chain)
2281 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2318 2282
2319 /* FIXME: what should be the assoc_id for AP? */ 2283 /* FIXME: what should be the assoc_id for AP? */
2320 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); 2284 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
@@ -2340,7 +2304,7 @@ static void iwl_config_ap(struct iwl_priv *priv)
2340 } 2304 }
2341 /* restore RXON assoc */ 2305 /* restore RXON assoc */
2342 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; 2306 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2343 iwl_commit_rxon(priv); 2307 iwlcore_commit_rxon(priv);
2344 spin_lock_irqsave(&priv->lock, flags); 2308 spin_lock_irqsave(&priv->lock, flags);
2345 iwl_activate_qos(priv, 1); 2309 iwl_activate_qos(priv, 1);
2346 spin_unlock_irqrestore(&priv->lock, flags); 2310 spin_unlock_irqrestore(&priv->lock, flags);
@@ -2353,194 +2317,6 @@ static void iwl_config_ap(struct iwl_priv *priv)
2353 * clear sta table, add BCAST sta... */ 2317 * clear sta table, add BCAST sta... */
2354} 2318}
2355 2319
2356
2357static int iwl_mac_config_interface(struct ieee80211_hw *hw,
2358 struct ieee80211_vif *vif,
2359 struct ieee80211_if_conf *conf)
2360{
2361 struct iwl_priv *priv = hw->priv;
2362 int rc;
2363
2364 if (conf == NULL)
2365 return -EIO;
2366
2367 if (priv->vif != vif) {
2368 IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
2369 return 0;
2370 }
2371
2372 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2373 conf->changed & IEEE80211_IFCC_BEACON) {
2374 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2375 if (!beacon)
2376 return -ENOMEM;
2377 mutex_lock(&priv->mutex);
2378 rc = iwl_mac_beacon_update(hw, beacon);
2379 mutex_unlock(&priv->mutex);
2380 if (rc)
2381 return rc;
2382 }
2383
2384 if (!iwl_is_alive(priv))
2385 return -EAGAIN;
2386
2387 mutex_lock(&priv->mutex);
2388
2389 if (conf->bssid)
2390 IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
2391
2392/*
2393 * very dubious code was here; the probe filtering flag is never set:
2394 *
2395 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2396 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
2397 */
2398
2399 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2400 if (!conf->bssid) {
2401 conf->bssid = priv->mac_addr;
2402 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
2403 IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
2404 conf->bssid);
2405 }
2406 if (priv->ibss_beacon)
2407 dev_kfree_skb(priv->ibss_beacon);
2408
2409 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2410 }
2411
2412 if (iwl_is_rfkill(priv))
2413 goto done;
2414
2415 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2416 !is_multicast_ether_addr(conf->bssid)) {
2417 /* If there is currently a HW scan going on in the background
2418 * then we need to cancel it else the RXON below will fail. */
2419 if (iwl_scan_cancel_timeout(priv, 100)) {
2420 IWL_WARN(priv, "Aborted scan still in progress "
2421 "after 100ms\n");
2422 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2423 mutex_unlock(&priv->mutex);
2424 return -EAGAIN;
2425 }
2426 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2427
2428 /* TODO: Audit driver for usage of these members and see
2429 * if mac80211 deprecates them (priv->bssid looks like it
2430 * shouldn't be there, but I haven't scanned the IBSS code
2431 * to verify) - jpk */
2432 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2433
2434 if (priv->iw_mode == NL80211_IFTYPE_AP)
2435 iwl_config_ap(priv);
2436 else {
2437 rc = iwl_commit_rxon(priv);
2438 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
2439 iwl_rxon_add_station(
2440 priv, priv->active_rxon.bssid_addr, 1);
2441 }
2442
2443 } else {
2444 iwl_scan_cancel_timeout(priv, 100);
2445 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2446 iwl_commit_rxon(priv);
2447 }
2448
2449 done:
2450 IWL_DEBUG_MAC80211(priv, "leave\n");
2451 mutex_unlock(&priv->mutex);
2452
2453 return 0;
2454}
2455
2456static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2457 struct ieee80211_if_init_conf *conf)
2458{
2459 struct iwl_priv *priv = hw->priv;
2460
2461 IWL_DEBUG_MAC80211(priv, "enter\n");
2462
2463 mutex_lock(&priv->mutex);
2464
2465 if (iwl_is_ready_rf(priv)) {
2466 iwl_scan_cancel_timeout(priv, 100);
2467 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2468 iwl_commit_rxon(priv);
2469 }
2470 if (priv->vif == conf->vif) {
2471 priv->vif = NULL;
2472 memset(priv->bssid, 0, ETH_ALEN);
2473 }
2474 mutex_unlock(&priv->mutex);
2475
2476 IWL_DEBUG_MAC80211(priv, "leave\n");
2477
2478}
2479
2480#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2481static void iwl_bss_info_changed(struct ieee80211_hw *hw,
2482 struct ieee80211_vif *vif,
2483 struct ieee80211_bss_conf *bss_conf,
2484 u32 changes)
2485{
2486 struct iwl_priv *priv = hw->priv;
2487
2488 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2489
2490 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2491 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2492 bss_conf->use_short_preamble);
2493 if (bss_conf->use_short_preamble)
2494 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2495 else
2496 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2497 }
2498
2499 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2500 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2501 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2502 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2503 else
2504 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2505 }
2506
2507 if (changes & BSS_CHANGED_HT) {
2508 iwl_ht_conf(priv, bss_conf);
2509 iwl_set_rxon_chain(priv);
2510 }
2511
2512 if (changes & BSS_CHANGED_ASSOC) {
2513 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2514 /* This should never happen as this function should
2515 * never be called from interrupt context. */
2516 if (WARN_ON_ONCE(in_interrupt()))
2517 return;
2518 if (bss_conf->assoc) {
2519 priv->assoc_id = bss_conf->aid;
2520 priv->beacon_int = bss_conf->beacon_int;
2521 priv->power_data.dtim_period = bss_conf->dtim_period;
2522 priv->timestamp = bss_conf->timestamp;
2523 priv->assoc_capability = bss_conf->assoc_capability;
2524
2525 /* we have just associated, don't start scan too early
2526 * leave time for EAPOL exchange to complete
2527 */
2528 priv->next_scan_jiffies = jiffies +
2529 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2530 mutex_lock(&priv->mutex);
2531 iwl_post_associate(priv);
2532 mutex_unlock(&priv->mutex);
2533 } else {
2534 priv->assoc_id = 0;
2535 IWL_DEBUG_MAC80211(priv, "DISASSOC %d\n", bss_conf->assoc);
2536 }
2537 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2538 IWL_DEBUG_MAC80211(priv, "Associated Changes %d\n", changes);
2539 iwl_send_rxon_assoc(priv);
2540 }
2541
2542}
2543
2544static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw, 2320static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2545 struct ieee80211_key_conf *keyconf, const u8 *addr, 2321 struct ieee80211_key_conf *keyconf, const u8 *addr,
2546 u32 iv32, u16 *phase1key) 2322 u32 iv32, u16 *phase1key)
@@ -2572,7 +2348,7 @@ static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2572 return -EOPNOTSUPP; 2348 return -EOPNOTSUPP;
2573 } 2349 }
2574 addr = sta ? sta->addr : iwl_bcast_addr; 2350 addr = sta ? sta->addr : iwl_bcast_addr;
2575 sta_id = iwl_find_station(priv, addr); 2351 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
2576 if (sta_id == IWL_INVALID_STATION) { 2352 if (sta_id == IWL_INVALID_STATION) {
2577 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n", 2353 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2578 addr); 2354 addr);
@@ -2623,49 +2399,6 @@ static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2623 return ret; 2399 return ret;
2624} 2400}
2625 2401
2626static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2627 const struct ieee80211_tx_queue_params *params)
2628{
2629 struct iwl_priv *priv = hw->priv;
2630 unsigned long flags;
2631 int q;
2632
2633 IWL_DEBUG_MAC80211(priv, "enter\n");
2634
2635 if (!iwl_is_ready_rf(priv)) {
2636 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2637 return -EIO;
2638 }
2639
2640 if (queue >= AC_NUM) {
2641 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2642 return 0;
2643 }
2644
2645 q = AC_NUM - 1 - queue;
2646
2647 spin_lock_irqsave(&priv->lock, flags);
2648
2649 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2650 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2651 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2652 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2653 cpu_to_le16((params->txop * 32));
2654
2655 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2656 priv->qos_data.qos_active = 1;
2657
2658 if (priv->iw_mode == NL80211_IFTYPE_AP)
2659 iwl_activate_qos(priv, 1);
2660 else if (priv->assoc_id && iwl_is_associated(priv))
2661 iwl_activate_qos(priv, 0);
2662
2663 spin_unlock_irqrestore(&priv->lock, flags);
2664
2665 IWL_DEBUG_MAC80211(priv, "leave\n");
2666 return 0;
2667}
2668
2669static int iwl_mac_ampdu_action(struct ieee80211_hw *hw, 2402static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2670 enum ieee80211_ampdu_mlme_action action, 2403 enum ieee80211_ampdu_mlme_action action,
2671 struct ieee80211_sta *sta, u16 tid, u16 *ssn) 2404 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
@@ -2708,41 +2441,6 @@ static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2708 return 0; 2441 return 0;
2709} 2442}
2710 2443
2711static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2712 struct ieee80211_tx_queue_stats *stats)
2713{
2714 struct iwl_priv *priv = hw->priv;
2715 int i, avail;
2716 struct iwl_tx_queue *txq;
2717 struct iwl_queue *q;
2718 unsigned long flags;
2719
2720 IWL_DEBUG_MAC80211(priv, "enter\n");
2721
2722 if (!iwl_is_ready_rf(priv)) {
2723 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2724 return -EIO;
2725 }
2726
2727 spin_lock_irqsave(&priv->lock, flags);
2728
2729 for (i = 0; i < AC_NUM; i++) {
2730 txq = &priv->txq[i];
2731 q = &txq->q;
2732 avail = iwl_queue_space(q);
2733
2734 stats[i].len = q->n_window - avail;
2735 stats[i].limit = q->n_window - q->high_mark;
2736 stats[i].count = q->n_window;
2737
2738 }
2739 spin_unlock_irqrestore(&priv->lock, flags);
2740
2741 IWL_DEBUG_MAC80211(priv, "leave\n");
2742
2743 return 0;
2744}
2745
2746static int iwl_mac_get_stats(struct ieee80211_hw *hw, 2444static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2747 struct ieee80211_low_level_stats *stats) 2445 struct ieee80211_low_level_stats *stats)
2748{ 2446{
@@ -2755,120 +2453,6 @@ static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2755 return 0; 2453 return 0;
2756} 2454}
2757 2455
2758static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2759{
2760 struct iwl_priv *priv = hw->priv;
2761 unsigned long flags;
2762
2763 mutex_lock(&priv->mutex);
2764 IWL_DEBUG_MAC80211(priv, "enter\n");
2765
2766 spin_lock_irqsave(&priv->lock, flags);
2767 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2768 spin_unlock_irqrestore(&priv->lock, flags);
2769
2770 iwl_reset_qos(priv);
2771
2772 spin_lock_irqsave(&priv->lock, flags);
2773 priv->assoc_id = 0;
2774 priv->assoc_capability = 0;
2775 priv->assoc_station_added = 0;
2776
2777 /* new association get rid of ibss beacon skb */
2778 if (priv->ibss_beacon)
2779 dev_kfree_skb(priv->ibss_beacon);
2780
2781 priv->ibss_beacon = NULL;
2782
2783 priv->beacon_int = priv->hw->conf.beacon_int;
2784 priv->timestamp = 0;
2785 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2786 priv->beacon_int = 0;
2787
2788 spin_unlock_irqrestore(&priv->lock, flags);
2789
2790 if (!iwl_is_ready_rf(priv)) {
2791 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2792 mutex_unlock(&priv->mutex);
2793 return;
2794 }
2795
2796 /* we are restarting association process
2797 * clear RXON_FILTER_ASSOC_MSK bit
2798 */
2799 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2800 iwl_scan_cancel_timeout(priv, 100);
2801 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2802 iwl_commit_rxon(priv);
2803 }
2804
2805 iwl_power_update_mode(priv, 0);
2806
2807 /* Per mac80211.h: This is only used in IBSS mode... */
2808 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2809
2810 /* switch to CAM during association period.
2811 * the ucode will block any association/authentication
2812 * frome during assiciation period if it can not hear
2813 * the AP because of PM. the timer enable PM back is
2814 * association do not complete
2815 */
2816 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
2817 IEEE80211_CHAN_RADAR))
2818 iwl_power_disable_management(priv, 3000);
2819
2820 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2821 mutex_unlock(&priv->mutex);
2822 return;
2823 }
2824
2825 iwl_set_rate(priv);
2826
2827 mutex_unlock(&priv->mutex);
2828
2829 IWL_DEBUG_MAC80211(priv, "leave\n");
2830}
2831
2832static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2833{
2834 struct iwl_priv *priv = hw->priv;
2835 unsigned long flags;
2836 __le64 timestamp;
2837
2838 IWL_DEBUG_MAC80211(priv, "enter\n");
2839
2840 if (!iwl_is_ready_rf(priv)) {
2841 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2842 return -EIO;
2843 }
2844
2845 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2846 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2847 return -EIO;
2848 }
2849
2850 spin_lock_irqsave(&priv->lock, flags);
2851
2852 if (priv->ibss_beacon)
2853 dev_kfree_skb(priv->ibss_beacon);
2854
2855 priv->ibss_beacon = skb;
2856
2857 priv->assoc_id = 0;
2858 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2859 priv->timestamp = le64_to_cpu(timestamp);
2860
2861 IWL_DEBUG_MAC80211(priv, "leave\n");
2862 spin_unlock_irqrestore(&priv->lock, flags);
2863
2864 iwl_reset_qos(priv);
2865
2866 iwl_post_associate(priv);
2867
2868
2869 return 0;
2870}
2871
2872/***************************************************************************** 2456/*****************************************************************************
2873 * 2457 *
2874 * sysfs attributes 2458 * sysfs attributes
@@ -2888,7 +2472,7 @@ static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2888static ssize_t show_debug_level(struct device *d, 2472static ssize_t show_debug_level(struct device *d,
2889 struct device_attribute *attr, char *buf) 2473 struct device_attribute *attr, char *buf)
2890{ 2474{
2891 struct iwl_priv *priv = d->driver_data; 2475 struct iwl_priv *priv = dev_get_drvdata(d);
2892 2476
2893 return sprintf(buf, "0x%08X\n", priv->debug_level); 2477 return sprintf(buf, "0x%08X\n", priv->debug_level);
2894} 2478}
@@ -2896,7 +2480,7 @@ static ssize_t store_debug_level(struct device *d,
2896 struct device_attribute *attr, 2480 struct device_attribute *attr,
2897 const char *buf, size_t count) 2481 const char *buf, size_t count)
2898{ 2482{
2899 struct iwl_priv *priv = d->driver_data; 2483 struct iwl_priv *priv = dev_get_drvdata(d);
2900 unsigned long val; 2484 unsigned long val;
2901 int ret; 2485 int ret;
2902 2486
@@ -2919,7 +2503,7 @@ static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2919static ssize_t show_version(struct device *d, 2503static ssize_t show_version(struct device *d,
2920 struct device_attribute *attr, char *buf) 2504 struct device_attribute *attr, char *buf)
2921{ 2505{
2922 struct iwl_priv *priv = d->driver_data; 2506 struct iwl_priv *priv = dev_get_drvdata(d);
2923 struct iwl_alive_resp *palive = &priv->card_alive; 2507 struct iwl_alive_resp *palive = &priv->card_alive;
2924 ssize_t pos = 0; 2508 ssize_t pos = 0;
2925 u16 eeprom_ver; 2509 u16 eeprom_ver;
@@ -2936,8 +2520,10 @@ static ssize_t show_version(struct device *d,
2936 2520
2937 if (priv->eeprom) { 2521 if (priv->eeprom) {
2938 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION); 2522 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
2939 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n", 2523 pos += sprintf(buf + pos, "NVM Type: %s, version: 0x%x\n",
2940 eeprom_ver); 2524 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
2525 ? "OTP" : "EEPROM", eeprom_ver);
2526
2941 } else { 2527 } else {
2942 pos += sprintf(buf + pos, "EEPROM not initialzed\n"); 2528 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
2943 } 2529 }
@@ -2950,7 +2536,7 @@ static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
2950static ssize_t show_temperature(struct device *d, 2536static ssize_t show_temperature(struct device *d,
2951 struct device_attribute *attr, char *buf) 2537 struct device_attribute *attr, char *buf)
2952{ 2538{
2953 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 2539 struct iwl_priv *priv = dev_get_drvdata(d);
2954 2540
2955 if (!iwl_is_alive(priv)) 2541 if (!iwl_is_alive(priv))
2956 return -EAGAIN; 2542 return -EAGAIN;
@@ -2963,7 +2549,7 @@ static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2963static ssize_t show_tx_power(struct device *d, 2549static ssize_t show_tx_power(struct device *d,
2964 struct device_attribute *attr, char *buf) 2550 struct device_attribute *attr, char *buf)
2965{ 2551{
2966 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 2552 struct iwl_priv *priv = dev_get_drvdata(d);
2967 2553
2968 if (!iwl_is_ready_rf(priv)) 2554 if (!iwl_is_ready_rf(priv))
2969 return sprintf(buf, "off\n"); 2555 return sprintf(buf, "off\n");
@@ -2975,7 +2561,7 @@ static ssize_t store_tx_power(struct device *d,
2975 struct device_attribute *attr, 2561 struct device_attribute *attr,
2976 const char *buf, size_t count) 2562 const char *buf, size_t count)
2977{ 2563{
2978 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 2564 struct iwl_priv *priv = dev_get_drvdata(d);
2979 unsigned long val; 2565 unsigned long val;
2980 int ret; 2566 int ret;
2981 2567
@@ -2993,7 +2579,7 @@ static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2993static ssize_t show_flags(struct device *d, 2579static ssize_t show_flags(struct device *d,
2994 struct device_attribute *attr, char *buf) 2580 struct device_attribute *attr, char *buf)
2995{ 2581{
2996 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 2582 struct iwl_priv *priv = dev_get_drvdata(d);
2997 2583
2998 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); 2584 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2999} 2585}
@@ -3002,7 +2588,7 @@ static ssize_t store_flags(struct device *d,
3002 struct device_attribute *attr, 2588 struct device_attribute *attr,
3003 const char *buf, size_t count) 2589 const char *buf, size_t count)
3004{ 2590{
3005 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 2591 struct iwl_priv *priv = dev_get_drvdata(d);
3006 unsigned long val; 2592 unsigned long val;
3007 u32 flags; 2593 u32 flags;
3008 int ret = strict_strtoul(buf, 0, &val); 2594 int ret = strict_strtoul(buf, 0, &val);
@@ -3018,7 +2604,7 @@ static ssize_t store_flags(struct device *d,
3018 else { 2604 else {
3019 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags); 2605 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
3020 priv->staging_rxon.flags = cpu_to_le32(flags); 2606 priv->staging_rxon.flags = cpu_to_le32(flags);
3021 iwl_commit_rxon(priv); 2607 iwlcore_commit_rxon(priv);
3022 } 2608 }
3023 } 2609 }
3024 mutex_unlock(&priv->mutex); 2610 mutex_unlock(&priv->mutex);
@@ -3031,7 +2617,7 @@ static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3031static ssize_t show_filter_flags(struct device *d, 2617static ssize_t show_filter_flags(struct device *d,
3032 struct device_attribute *attr, char *buf) 2618 struct device_attribute *attr, char *buf)
3033{ 2619{
3034 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 2620 struct iwl_priv *priv = dev_get_drvdata(d);
3035 2621
3036 return sprintf(buf, "0x%04X\n", 2622 return sprintf(buf, "0x%04X\n",
3037 le32_to_cpu(priv->active_rxon.filter_flags)); 2623 le32_to_cpu(priv->active_rxon.filter_flags));
@@ -3041,7 +2627,7 @@ static ssize_t store_filter_flags(struct device *d,
3041 struct device_attribute *attr, 2627 struct device_attribute *attr,
3042 const char *buf, size_t count) 2628 const char *buf, size_t count)
3043{ 2629{
3044 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 2630 struct iwl_priv *priv = dev_get_drvdata(d);
3045 unsigned long val; 2631 unsigned long val;
3046 u32 filter_flags; 2632 u32 filter_flags;
3047 int ret = strict_strtoul(buf, 0, &val); 2633 int ret = strict_strtoul(buf, 0, &val);
@@ -3059,7 +2645,7 @@ static ssize_t store_filter_flags(struct device *d,
3059 "0x%04X\n", filter_flags); 2645 "0x%04X\n", filter_flags);
3060 priv->staging_rxon.filter_flags = 2646 priv->staging_rxon.filter_flags =
3061 cpu_to_le32(filter_flags); 2647 cpu_to_le32(filter_flags);
3062 iwl_commit_rxon(priv); 2648 iwlcore_commit_rxon(priv);
3063 } 2649 }
3064 } 2650 }
3065 mutex_unlock(&priv->mutex); 2651 mutex_unlock(&priv->mutex);
@@ -3102,32 +2688,37 @@ static ssize_t show_power_level(struct device *d,
3102{ 2688{
3103 struct iwl_priv *priv = dev_get_drvdata(d); 2689 struct iwl_priv *priv = dev_get_drvdata(d);
3104 int mode = priv->power_data.user_power_setting; 2690 int mode = priv->power_data.user_power_setting;
3105 int system = priv->power_data.system_power_setting;
3106 int level = priv->power_data.power_mode; 2691 int level = priv->power_data.power_mode;
3107 char *p = buf; 2692 char *p = buf;
3108 2693
3109 switch (system) { 2694 p += sprintf(p, "INDEX:%d\t", level);
3110 case IWL_POWER_SYS_AUTO: 2695 p += sprintf(p, "USER:%d\n", mode);
3111 p += sprintf(p, "SYSTEM:auto");
3112 break;
3113 case IWL_POWER_SYS_AC:
3114 p += sprintf(p, "SYSTEM:ac");
3115 break;
3116 case IWL_POWER_SYS_BATTERY:
3117 p += sprintf(p, "SYSTEM:battery");
3118 break;
3119 }
3120
3121 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
3122 "fixed" : "auto");
3123 p += sprintf(p, "\tINDEX:%d", level);
3124 p += sprintf(p, "\n");
3125 return p - buf + 1; 2696 return p - buf + 1;
3126} 2697}
3127 2698
3128static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, 2699static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3129 store_power_level); 2700 store_power_level);
3130 2701
2702static ssize_t show_qos(struct device *d,
2703 struct device_attribute *attr, char *buf)
2704{
2705 struct iwl_priv *priv = dev_get_drvdata(d);
2706 char *p = buf;
2707 int q;
2708
2709 for (q = 0; q < AC_NUM; q++) {
2710 p += sprintf(p, "\tcw_min\tcw_max\taifsn\ttxop\n");
2711 p += sprintf(p, "AC[%d]\t%u\t%u\t%u\t%u\n", q,
2712 priv->qos_data.def_qos_parm.ac[q].cw_min,
2713 priv->qos_data.def_qos_parm.ac[q].cw_max,
2714 priv->qos_data.def_qos_parm.ac[q].aifsn,
2715 priv->qos_data.def_qos_parm.ac[q].edca_txop);
2716 }
2717
2718 return p - buf + 1;
2719}
2720
2721static DEVICE_ATTR(qos, S_IRUGO, show_qos, NULL);
3131 2722
3132static ssize_t show_statistics(struct device *d, 2723static ssize_t show_statistics(struct device *d,
3133 struct device_attribute *attr, char *buf) 2724 struct device_attribute *attr, char *buf)
@@ -3190,7 +2781,6 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
3190 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start); 2781 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3191 2782
3192 iwl_setup_scan_deferred_work(priv); 2783 iwl_setup_scan_deferred_work(priv);
3193 iwl_setup_power_deferred_work(priv);
3194 2784
3195 if (priv->cfg->ops->lib->setup_deferred_work) 2785 if (priv->cfg->ops->lib->setup_deferred_work)
3196 priv->cfg->ops->lib->setup_deferred_work(priv); 2786 priv->cfg->ops->lib->setup_deferred_work(priv);
@@ -3199,8 +2789,12 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
3199 priv->statistics_periodic.data = (unsigned long)priv; 2789 priv->statistics_periodic.data = (unsigned long)priv;
3200 priv->statistics_periodic.function = iwl_bg_statistics_periodic; 2790 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3201 2791
3202 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) 2792 if (!priv->cfg->use_isr_legacy)
3203 iwl_irq_tasklet, (unsigned long)priv); 2793 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2794 iwl_irq_tasklet, (unsigned long)priv);
2795 else
2796 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2797 iwl_irq_tasklet_legacy, (unsigned long)priv);
3204} 2798}
3205 2799
3206static void iwl_cancel_deferred_work(struct iwl_priv *priv) 2800static void iwl_cancel_deferred_work(struct iwl_priv *priv)
@@ -3210,7 +2804,6 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3210 2804
3211 cancel_delayed_work_sync(&priv->init_alive_start); 2805 cancel_delayed_work_sync(&priv->init_alive_start);
3212 cancel_delayed_work(&priv->scan_check); 2806 cancel_delayed_work(&priv->scan_check);
3213 cancel_delayed_work_sync(&priv->set_power_save);
3214 cancel_delayed_work(&priv->alive_start); 2807 cancel_delayed_work(&priv->alive_start);
3215 cancel_work_sync(&priv->beacon_update); 2808 cancel_work_sync(&priv->beacon_update);
3216 del_timer_sync(&priv->statistics_periodic); 2809 del_timer_sync(&priv->statistics_periodic);
@@ -3227,7 +2820,7 @@ static struct attribute *iwl_sysfs_entries[] = {
3227 &dev_attr_debug_level.attr, 2820 &dev_attr_debug_level.attr,
3228#endif 2821#endif
3229 &dev_attr_version.attr, 2822 &dev_attr_version.attr,
3230 2823 &dev_attr_qos.attr,
3231 NULL 2824 NULL
3232}; 2825};
3233 2826
@@ -3243,7 +2836,6 @@ static struct ieee80211_ops iwl_hw_ops = {
3243 .add_interface = iwl_mac_add_interface, 2836 .add_interface = iwl_mac_add_interface,
3244 .remove_interface = iwl_mac_remove_interface, 2837 .remove_interface = iwl_mac_remove_interface,
3245 .config = iwl_mac_config, 2838 .config = iwl_mac_config,
3246 .config_interface = iwl_mac_config_interface,
3247 .configure_filter = iwl_configure_filter, 2839 .configure_filter = iwl_configure_filter,
3248 .set_key = iwl_mac_set_key, 2840 .set_key = iwl_mac_set_key,
3249 .update_tkip_key = iwl_mac_update_tkip_key, 2841 .update_tkip_key = iwl_mac_update_tkip_key,
@@ -3291,6 +2883,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3291 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n"); 2883 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3292 priv->cfg = cfg; 2884 priv->cfg = cfg;
3293 priv->pci_dev = pdev; 2885 priv->pci_dev = pdev;
2886 priv->inta_mask = CSR_INI_SET_MASK;
3294 2887
3295#ifdef CONFIG_IWLWIFI_DEBUG 2888#ifdef CONFIG_IWLWIFI_DEBUG
3296 priv->debug_level = priv->cfg->mod_params->debug; 2889 priv->debug_level = priv->cfg->mod_params->debug;
@@ -3341,6 +2934,10 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3341 (unsigned long long) pci_resource_len(pdev, 0)); 2934 (unsigned long long) pci_resource_len(pdev, 0));
3342 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base); 2935 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3343 2936
2937 /* this spin lock will be used in apm_ops.init and EEPROM access
2938 * we should init now
2939 */
2940 spin_lock_init(&priv->reg_lock);
3344 iwl_hw_detect(priv); 2941 iwl_hw_detect(priv);
3345 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n", 2942 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3346 priv->cfg->name, priv->hw_rev); 2943 priv->cfg->name, priv->hw_rev);
@@ -3349,6 +2946,12 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3349 * PCI Tx retries from interfering with C3 CPU state */ 2946 * PCI Tx retries from interfering with C3 CPU state */
3350 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); 2947 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3351 2948
2949 iwl_prepare_card_hw(priv);
2950 if (!priv->hw_ready) {
2951 IWL_WARN(priv, "Failed, HW not ready\n");
2952 goto out_iounmap;
2953 }
2954
3352 /* amp init */ 2955 /* amp init */
3353 err = priv->cfg->ops->lib->apm_ops.init(priv); 2956 err = priv->cfg->ops->lib->apm_ops.init(priv);
3354 if (err < 0) { 2957 if (err < 0) {
@@ -3390,18 +2993,8 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3390 goto out_free_eeprom; 2993 goto out_free_eeprom;
3391 /* At this point both hw and priv are initialized. */ 2994 /* At this point both hw and priv are initialized. */
3392 2995
3393 /**********************************
3394 * 7. Initialize module parameters
3395 **********************************/
3396
3397 /* Disable radio (SW RF KILL) via parameter when loading driver */
3398 if (priv->cfg->mod_params->disable) {
3399 set_bit(STATUS_RF_KILL_SW, &priv->status);
3400 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
3401 }
3402
3403 /******************** 2996 /********************
3404 * 8. Setup services 2997 * 7. Setup services
3405 ********************/ 2998 ********************/
3406 spin_lock_irqsave(&priv->lock, flags); 2999 spin_lock_irqsave(&priv->lock, flags);
3407 iwl_disable_interrupts(priv); 3000 iwl_disable_interrupts(priv);
@@ -3409,8 +3002,9 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3409 3002
3410 pci_enable_msi(priv->pci_dev); 3003 pci_enable_msi(priv->pci_dev);
3411 3004
3412 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED, 3005 iwl_alloc_isr_ict(priv);
3413 DRV_NAME, priv); 3006 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3007 IRQF_SHARED, DRV_NAME, priv);
3414 if (err) { 3008 if (err) {
3415 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); 3009 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3416 goto out_disable_msi; 3010 goto out_disable_msi;
@@ -3425,7 +3019,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3425 iwl_setup_rx_handlers(priv); 3019 iwl_setup_rx_handlers(priv);
3426 3020
3427 /********************************** 3021 /**********************************
3428 * 9. Setup and register mac80211 3022 * 8. Setup and register mac80211
3429 **********************************/ 3023 **********************************/
3430 3024
3431 /* enable interrupts if needed: hw bug w/a */ 3025 /* enable interrupts if needed: hw bug w/a */
@@ -3443,7 +3037,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3443 3037
3444 err = iwl_dbgfs_register(priv, DRV_NAME); 3038 err = iwl_dbgfs_register(priv, DRV_NAME);
3445 if (err) 3039 if (err)
3446 IWL_ERR(priv, "failed to create debugfs files\n"); 3040 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3447 3041
3448 /* If platform's RF_KILL switch is NOT set to KILL */ 3042 /* If platform's RF_KILL switch is NOT set to KILL */
3449 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 3043 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
@@ -3467,6 +3061,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3467 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group); 3061 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3468 out_free_irq: 3062 out_free_irq:
3469 free_irq(priv->pci_dev->irq, priv); 3063 free_irq(priv->pci_dev->irq, priv);
3064 iwl_free_isr_ict(priv);
3470 out_disable_msi: 3065 out_disable_msi:
3471 pci_disable_msi(priv->pci_dev); 3066 pci_disable_msi(priv->pci_dev);
3472 iwl_uninit_drv(priv); 3067 iwl_uninit_drv(priv);
@@ -3526,7 +3121,7 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3526 iwl_rx_queue_free(priv, &priv->rxq); 3121 iwl_rx_queue_free(priv, &priv->rxq);
3527 iwl_hw_txq_ctx_free(priv); 3122 iwl_hw_txq_ctx_free(priv);
3528 3123
3529 iwl_clear_stations_table(priv); 3124 priv->cfg->ops->smgmt->clear_station_table(priv);
3530 iwl_eeprom_free(priv); 3125 iwl_eeprom_free(priv);
3531 3126
3532 3127
@@ -3548,51 +3143,14 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3548 3143
3549 iwl_uninit_drv(priv); 3144 iwl_uninit_drv(priv);
3550 3145
3146 iwl_free_isr_ict(priv);
3147
3551 if (priv->ibss_beacon) 3148 if (priv->ibss_beacon)
3552 dev_kfree_skb(priv->ibss_beacon); 3149 dev_kfree_skb(priv->ibss_beacon);
3553 3150
3554 ieee80211_free_hw(priv->hw); 3151 ieee80211_free_hw(priv->hw);
3555} 3152}
3556 3153
3557#ifdef CONFIG_PM
3558
3559static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3560{
3561 struct iwl_priv *priv = pci_get_drvdata(pdev);
3562
3563 if (priv->is_open) {
3564 set_bit(STATUS_IN_SUSPEND, &priv->status);
3565 iwl_mac_stop(priv->hw);
3566 priv->is_open = 1;
3567 }
3568
3569 pci_save_state(pdev);
3570 pci_disable_device(pdev);
3571 pci_set_power_state(pdev, PCI_D3hot);
3572
3573 return 0;
3574}
3575
3576static int iwl_pci_resume(struct pci_dev *pdev)
3577{
3578 struct iwl_priv *priv = pci_get_drvdata(pdev);
3579 int ret;
3580
3581 pci_set_power_state(pdev, PCI_D0);
3582 ret = pci_enable_device(pdev);
3583 if (ret)
3584 return ret;
3585 pci_restore_state(pdev);
3586 iwl_enable_interrupts(priv);
3587
3588 if (priv->is_open)
3589 iwl_mac_start(priv->hw);
3590
3591 clear_bit(STATUS_IN_SUSPEND, &priv->status);
3592 return 0;
3593}
3594
3595#endif /* CONFIG_PM */
3596 3154
3597/***************************************************************************** 3155/*****************************************************************************
3598 * 3156 *
diff --git a/drivers/net/wireless/iwlwifi/iwl-calib.c b/drivers/net/wireless/iwlwifi/iwl-calib.c
index 735f3f19928c..a5d63672ad39 100644
--- a/drivers/net/wireless/iwlwifi/iwl-calib.c
+++ b/drivers/net/wireless/iwlwifi/iwl-calib.c
@@ -857,7 +857,7 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv,
857 priv->cfg->ops->lib->update_chain_flags(priv); 857 priv->cfg->ops->lib->update_chain_flags(priv);
858 858
859 data->state = IWL_CHAIN_NOISE_DONE; 859 data->state = IWL_CHAIN_NOISE_DONE;
860 iwl_power_enable_management(priv); 860 iwl_power_update_mode(priv, 0);
861} 861}
862EXPORT_SYMBOL(iwl_chain_noise_calibration); 862EXPORT_SYMBOL(iwl_chain_noise_calibration);
863 863
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h
index 29d40746da6a..e581dc323f0a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-commands.h
+++ b/drivers/net/wireless/iwlwifi/iwl-commands.h
@@ -614,8 +614,18 @@ enum {
614 614
615#define RXON_FLG_CHANNEL_MODE_POS (25) 615#define RXON_FLG_CHANNEL_MODE_POS (25)
616#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25) 616#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
617#define RXON_FLG_CHANNEL_MODE_PURE_40_MSK cpu_to_le32(0x1 << 25) 617
618#define RXON_FLG_CHANNEL_MODE_MIXED_MSK cpu_to_le32(0x2 << 25) 618/* channel mode */
619enum {
620 CHANNEL_MODE_LEGACY = 0,
621 CHANNEL_MODE_PURE_40 = 1,
622 CHANNEL_MODE_MIXED = 2,
623 CHANNEL_MODE_RESERVED = 3,
624};
625#define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
626#define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
627#define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
628
619/* CTS to self (if spec allows) flag */ 629/* CTS to self (if spec allows) flag */
620#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30) 630#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
621 631
@@ -2469,11 +2479,12 @@ struct iwl_ssid_ie {
2469 u8 ssid[32]; 2479 u8 ssid[32];
2470} __attribute__ ((packed)); 2480} __attribute__ ((packed));
2471 2481
2472#define PROBE_OPTION_MAX_API1 0x4 2482#define PROBE_OPTION_MAX_3945 4
2473#define PROBE_OPTION_MAX 0x14 2483#define PROBE_OPTION_MAX 20
2474#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) 2484#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
2475#define IWL_GOOD_CRC_TH cpu_to_le16(1) 2485#define IWL_GOOD_CRC_TH cpu_to_le16(1)
2476#define IWL_MAX_SCAN_SIZE 1024 2486#define IWL_MAX_SCAN_SIZE 1024
2487#define IWL_MAX_PROBE_REQUEST 200
2477 2488
2478/* 2489/*
2479 * REPLY_SCAN_CMD = 0x80 (command) 2490 * REPLY_SCAN_CMD = 0x80 (command)
@@ -2552,7 +2563,7 @@ struct iwl3945_scan_cmd {
2552 struct iwl3945_tx_cmd tx_cmd; 2563 struct iwl3945_tx_cmd tx_cmd;
2553 2564
2554 /* For directed active scans (set to all-0s otherwise) */ 2565 /* For directed active scans (set to all-0s otherwise) */
2555 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX_API1]; 2566 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX_3945];
2556 2567
2557 /* 2568 /*
2558 * Probe request frame, followed by channel list. 2569 * Probe request frame, followed by channel list.
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index c54fb93e9d72..e93ddb74457e 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -39,6 +39,7 @@
39#include "iwl-rfkill.h" 39#include "iwl-rfkill.h"
40#include "iwl-power.h" 40#include "iwl-power.h"
41#include "iwl-sta.h" 41#include "iwl-sta.h"
42#include "iwl-helpers.h"
42 43
43 44
44MODULE_DESCRIPTION("iwl core"); 45MODULE_DESCRIPTION("iwl core");
@@ -59,6 +60,8 @@ MODULE_LICENSE("GPL");
59 IWL_RATE_##pp##M_INDEX, \ 60 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX } 61 IWL_RATE_##np##M_INDEX }
61 62
63static irqreturn_t iwl_isr(int irq, void *data);
64
62/* 65/*
63 * Parameter order: 66 * Parameter order:
64 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate 67 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
@@ -273,6 +276,14 @@ void iwl_activate_qos(struct iwl_priv *priv, u8 force)
273} 276}
274EXPORT_SYMBOL(iwl_activate_qos); 277EXPORT_SYMBOL(iwl_activate_qos);
275 278
279/*
280 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
281 * (802.11b) (802.11a/g)
282 * AC_BK 15 1023 7 0 0
283 * AC_BE 15 1023 3 0 0
284 * AC_VI 7 15 2 6.016ms 3.008ms
285 * AC_VO 3 7 2 3.264ms 1.504ms
286 */
276void iwl_reset_qos(struct iwl_priv *priv) 287void iwl_reset_qos(struct iwl_priv *priv)
277{ 288{
278 u16 cw_min = 15; 289 u16 cw_min = 15;
@@ -304,6 +315,7 @@ void iwl_reset_qos(struct iwl_priv *priv)
304 if (priv->qos_data.qos_active) 315 if (priv->qos_data.qos_active)
305 aifs = 3; 316 aifs = 3;
306 317
318 /* AC_BE */
307 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min); 319 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
308 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max); 320 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
309 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs; 321 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
@@ -311,6 +323,7 @@ void iwl_reset_qos(struct iwl_priv *priv)
311 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0; 323 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
312 324
313 if (priv->qos_data.qos_active) { 325 if (priv->qos_data.qos_active) {
326 /* AC_BK */
314 i = 1; 327 i = 1;
315 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min); 328 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
316 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max); 329 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
@@ -318,11 +331,12 @@ void iwl_reset_qos(struct iwl_priv *priv)
318 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0; 331 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
319 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; 332 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
320 333
334 /* AC_VI */
321 i = 2; 335 i = 2;
322 priv->qos_data.def_qos_parm.ac[i].cw_min = 336 priv->qos_data.def_qos_parm.ac[i].cw_min =
323 cpu_to_le16((cw_min + 1) / 2 - 1); 337 cpu_to_le16((cw_min + 1) / 2 - 1);
324 priv->qos_data.def_qos_parm.ac[i].cw_max = 338 priv->qos_data.def_qos_parm.ac[i].cw_max =
325 cpu_to_le16(cw_max); 339 cpu_to_le16(cw_min);
326 priv->qos_data.def_qos_parm.ac[i].aifsn = 2; 340 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
327 if (is_legacy) 341 if (is_legacy)
328 priv->qos_data.def_qos_parm.ac[i].edca_txop = 342 priv->qos_data.def_qos_parm.ac[i].edca_txop =
@@ -332,11 +346,12 @@ void iwl_reset_qos(struct iwl_priv *priv)
332 cpu_to_le16(3008); 346 cpu_to_le16(3008);
333 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; 347 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
334 348
349 /* AC_VO */
335 i = 3; 350 i = 3;
336 priv->qos_data.def_qos_parm.ac[i].cw_min = 351 priv->qos_data.def_qos_parm.ac[i].cw_min =
337 cpu_to_le16((cw_min + 1) / 4 - 1); 352 cpu_to_le16((cw_min + 1) / 4 - 1);
338 priv->qos_data.def_qos_parm.ac[i].cw_max = 353 priv->qos_data.def_qos_parm.ac[i].cw_max =
339 cpu_to_le16((cw_max + 1) / 2 - 1); 354 cpu_to_le16((cw_min + 1) / 2 - 1);
340 priv->qos_data.def_qos_parm.ac[i].aifsn = 2; 355 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
341 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; 356 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
342 if (is_legacy) 357 if (is_legacy)
@@ -591,10 +606,10 @@ static u8 iwl_is_channel_extension(struct iwl_priv *priv,
591 606
592 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) 607 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
593 return !(ch_info->fat_extension_channel & 608 return !(ch_info->fat_extension_channel &
594 IEEE80211_CHAN_NO_FAT_ABOVE); 609 IEEE80211_CHAN_NO_HT40PLUS);
595 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) 610 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
596 return !(ch_info->fat_extension_channel & 611 return !(ch_info->fat_extension_channel &
597 IEEE80211_CHAN_NO_FAT_BELOW); 612 IEEE80211_CHAN_NO_HT40MINUS);
598 613
599 return 0; 614 return 0;
600} 615}
@@ -605,19 +620,23 @@ u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
605 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config; 620 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
606 621
607 if ((!iwl_ht_conf->is_ht) || 622 if ((!iwl_ht_conf->is_ht) ||
608 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) || 623 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
609 (iwl_ht_conf->extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE))
610 return 0; 624 return 0;
611 625
626 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
627 * the bit will not set if it is pure 40MHz case
628 */
612 if (sta_ht_inf) { 629 if (sta_ht_inf) {
613 if ((!sta_ht_inf->ht_supported) || 630 if (!sta_ht_inf->ht_supported)
614 (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)))
615 return 0; 631 return 0;
616 } 632 }
617 633
618 return iwl_is_channel_extension(priv, priv->band, 634 if (iwl_ht_conf->ht_protection & IEEE80211_HT_OP_MODE_PROTECTION_20MHZ)
619 le16_to_cpu(priv->staging_rxon.channel), 635 return 1;
620 iwl_ht_conf->extension_chan_offset); 636 else
637 return iwl_is_channel_extension(priv, priv->band,
638 le16_to_cpu(priv->staging_rxon.channel),
639 iwl_ht_conf->extension_chan_offset);
621} 640}
622EXPORT_SYMBOL(iwl_is_fat_tx_allowed); 641EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
623 642
@@ -735,6 +754,8 @@ int iwl_full_rxon_required(struct iwl_priv *priv)
735 priv->active_rxon.ofdm_ht_single_stream_basic_rates) || 754 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
736 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != 755 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
737 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || 756 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
757 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
758 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
738 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) 759 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
739 return 1; 760 return 1;
740 761
@@ -785,43 +806,53 @@ EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
785void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info) 806void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
786{ 807{
787 struct iwl_rxon_cmd *rxon = &priv->staging_rxon; 808 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
788 u32 val;
789 809
790 if (!ht_info->is_ht) { 810 if (!ht_info->is_ht) {
791 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | 811 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
792 RXON_FLG_CHANNEL_MODE_PURE_40_MSK |
793 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | 812 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
794 RXON_FLG_FAT_PROT_MSK | 813 RXON_FLG_FAT_PROT_MSK |
795 RXON_FLG_HT_PROT_MSK); 814 RXON_FLG_HT_PROT_MSK);
796 return; 815 return;
797 } 816 }
798 817
799 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */ 818 /* FIXME: if the definition of ht_protection changed, the "translation"
800 if (iwl_is_fat_tx_allowed(priv, NULL)) 819 * will be needed for rxon->flags
801 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK; 820 */
802 else 821 rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
803 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | 822
804 RXON_FLG_CHANNEL_MODE_PURE_40_MSK); 823 /* Set up channel bandwidth:
805 824 * 20 MHz only, 20/40 mixed or pure 40 if fat ok */
806 /* Note: control channel is opposite of extension channel */ 825 /* clear the HT channel mode before set the mode */
807 switch (ht_info->extension_chan_offset) { 826 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
808 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: 827 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
809 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); 828 if (iwl_is_fat_tx_allowed(priv, NULL)) {
810 break; 829 /* pure 40 fat */
811 case IEEE80211_HT_PARAM_CHA_SEC_BELOW: 830 if (rxon->flags & RXON_FLG_FAT_PROT_MSK)
812 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; 831 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
813 break; 832 else {
814 case IEEE80211_HT_PARAM_CHA_SEC_NONE: 833 /* Note: control channel is opposite of extension channel */
815 default: 834 switch (ht_info->extension_chan_offset) {
816 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK; 835 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
817 break; 836 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
837 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
838 break;
839 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
840 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
841 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
842 break;
843 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
844 default:
845 /* channel location only valid if in Mixed mode */
846 IWL_ERR(priv, "invalid extension channel offset\n");
847 break;
848 }
849 }
850 } else {
851 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
818 } 852 }
819 853
820 val = ht_info->ht_protection; 854 if (priv->cfg->ops->hcmd->set_rxon_chain)
821 855 priv->cfg->ops->hcmd->set_rxon_chain(priv);
822 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
823
824 iwl_set_rxon_chain(priv);
825 856
826 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X " 857 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
827 "rxon flags 0x%X operation mode :0x%X " 858 "rxon flags 0x%X operation mode :0x%X "
@@ -901,10 +932,11 @@ static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
901 * never called for monitor mode. The only way mac80211 informs us about 932 * never called for monitor mode. The only way mac80211 informs us about
902 * monitor mode is through configuring filters (call to configure_filter). 933 * monitor mode is through configuring filters (call to configure_filter).
903 */ 934 */
904static bool iwl_is_monitor_mode(struct iwl_priv *priv) 935bool iwl_is_monitor_mode(struct iwl_priv *priv)
905{ 936{
906 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK); 937 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
907} 938}
939EXPORT_SYMBOL(iwl_is_monitor_mode);
908 940
909/** 941/**
910 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image 942 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
@@ -956,10 +988,10 @@ void iwl_set_rxon_chain(struct iwl_priv *priv)
956 if (iwl_is_monitor_mode(priv) && 988 if (iwl_is_monitor_mode(priv) &&
957 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) && 989 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
958 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) { 990 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
959 rx_chain = 0x07 << RXON_RX_CHAIN_VALID_POS; 991 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
960 rx_chain |= 0x06 << RXON_RX_CHAIN_FORCE_SEL_POS; 992 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
961 rx_chain |= 0x07 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS; 993 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
962 rx_chain |= 0x01 << RXON_RX_CHAIN_DRIVER_FORCE_POS; 994 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
963 } 995 }
964 996
965 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain); 997 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
@@ -1068,11 +1100,6 @@ void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1068 RXON_FILTER_ACCEPT_GRP_MSK; 1100 RXON_FILTER_ACCEPT_GRP_MSK;
1069 break; 1101 break;
1070 1102
1071 case NL80211_IFTYPE_MONITOR:
1072 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1073 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1074 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1075 break;
1076 default: 1103 default:
1077 IWL_ERR(priv, "Unsupported interface type %d\n", mode); 1104 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1078 break; 1105 break;
@@ -1111,16 +1138,18 @@ void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1111 priv->staging_rxon.cck_basic_rates = 1138 priv->staging_rxon.cck_basic_rates =
1112 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; 1139 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1113 1140
1114 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | 1141 /* clear both MIX and PURE40 mode flag */
1115 RXON_FLG_CHANNEL_MODE_PURE_40_MSK); 1142 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1143 RXON_FLG_CHANNEL_MODE_PURE_40);
1116 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); 1144 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1117 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); 1145 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1118 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; 1146 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1119 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; 1147 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1148 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1120} 1149}
1121EXPORT_SYMBOL(iwl_connection_init_rx_config); 1150EXPORT_SYMBOL(iwl_connection_init_rx_config);
1122 1151
1123void iwl_set_rate(struct iwl_priv *priv) 1152static void iwl_set_rate(struct iwl_priv *priv)
1124{ 1153{
1125 const struct ieee80211_supported_band *hw = NULL; 1154 const struct ieee80211_supported_band *hw = NULL;
1126 struct ieee80211_rate *rate; 1155 struct ieee80211_rate *rate;
@@ -1166,7 +1195,6 @@ void iwl_set_rate(struct iwl_priv *priv)
1166 priv->staging_rxon.ofdm_basic_rates = 1195 priv->staging_rxon.ofdm_basic_rates =
1167 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; 1196 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1168} 1197}
1169EXPORT_SYMBOL(iwl_set_rate);
1170 1198
1171void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) 1199void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1172{ 1200{
@@ -1230,11 +1258,6 @@ void iwl_irq_handle_error(struct iwl_priv *priv)
1230 IWL_DEBUG(priv, IWL_DL_FW_ERRORS, 1258 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1231 "Restarting adapter due to uCode error.\n"); 1259 "Restarting adapter due to uCode error.\n");
1232 1260
1233 if (iwl_is_associated(priv)) {
1234 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1235 sizeof(priv->recovery_rxon));
1236 priv->error_recovering = 1;
1237 }
1238 if (priv->cfg->mod_params->restart_fw) 1261 if (priv->cfg->mod_params->restart_fw)
1239 queue_work(priv->workqueue, &priv->restart); 1262 queue_work(priv->workqueue, &priv->restart);
1240 } 1263 }
@@ -1298,19 +1321,20 @@ int iwl_setup_mac(struct iwl_priv *priv)
1298 hw->flags = IEEE80211_HW_SIGNAL_DBM | 1321 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1299 IEEE80211_HW_NOISE_DBM | 1322 IEEE80211_HW_NOISE_DBM |
1300 IEEE80211_HW_AMPDU_AGGREGATION | 1323 IEEE80211_HW_AMPDU_AGGREGATION |
1301 IEEE80211_HW_SPECTRUM_MGMT | 1324 IEEE80211_HW_SPECTRUM_MGMT;
1302 IEEE80211_HW_SUPPORTS_PS;
1303 hw->wiphy->interface_modes = 1325 hw->wiphy->interface_modes =
1304 BIT(NL80211_IFTYPE_STATION) | 1326 BIT(NL80211_IFTYPE_STATION) |
1305 BIT(NL80211_IFTYPE_ADHOC); 1327 BIT(NL80211_IFTYPE_ADHOC);
1306 1328
1307 hw->wiphy->custom_regulatory = true; 1329 hw->wiphy->custom_regulatory = true;
1308 hw->wiphy->max_scan_ssids = 1; 1330
1331 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1332 /* we create the 802.11 header and a zero-length SSID element */
1333 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
1309 1334
1310 /* Default value; 4 EDCA QOS priorities */ 1335 /* Default value; 4 EDCA QOS priorities */
1311 hw->queues = 4; 1336 hw->queues = 4;
1312 1337
1313 hw->conf.beacon_int = 100;
1314 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL; 1338 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
1315 1339
1316 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) 1340 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
@@ -1357,7 +1381,6 @@ int iwl_init_drv(struct iwl_priv *priv)
1357 priv->ibss_beacon = NULL; 1381 priv->ibss_beacon = NULL;
1358 1382
1359 spin_lock_init(&priv->lock); 1383 spin_lock_init(&priv->lock);
1360 spin_lock_init(&priv->power_data.lock);
1361 spin_lock_init(&priv->sta_lock); 1384 spin_lock_init(&priv->sta_lock);
1362 spin_lock_init(&priv->hcmd_lock); 1385 spin_lock_init(&priv->hcmd_lock);
1363 1386
@@ -1366,7 +1389,7 @@ int iwl_init_drv(struct iwl_priv *priv)
1366 mutex_init(&priv->mutex); 1389 mutex_init(&priv->mutex);
1367 1390
1368 /* Clear the driver's (not device's) station table */ 1391 /* Clear the driver's (not device's) station table */
1369 iwl_clear_stations_table(priv); 1392 priv->cfg->ops->smgmt->clear_station_table(priv);
1370 1393
1371 priv->data_retry_limit = -1; 1394 priv->data_retry_limit = -1;
1372 priv->ieee_channels = NULL; 1395 priv->ieee_channels = NULL;
@@ -1378,7 +1401,9 @@ int iwl_init_drv(struct iwl_priv *priv)
1378 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED; 1401 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
1379 1402
1380 /* Choose which receivers/antennas to use */ 1403 /* Choose which receivers/antennas to use */
1381 iwl_set_rxon_chain(priv); 1404 if (priv->cfg->ops->hcmd->set_rxon_chain)
1405 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1406
1382 iwl_init_scan_params(priv); 1407 iwl_init_scan_params(priv);
1383 1408
1384 iwl_reset_qos(priv); 1409 iwl_reset_qos(priv);
@@ -1475,11 +1500,272 @@ void iwl_enable_interrupts(struct iwl_priv *priv)
1475{ 1500{
1476 IWL_DEBUG_ISR(priv, "Enabling interrupts\n"); 1501 IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
1477 set_bit(STATUS_INT_ENABLED, &priv->status); 1502 set_bit(STATUS_INT_ENABLED, &priv->status);
1478 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); 1503 iwl_write32(priv, CSR_INT_MASK, priv->inta_mask);
1479} 1504}
1480EXPORT_SYMBOL(iwl_enable_interrupts); 1505EXPORT_SYMBOL(iwl_enable_interrupts);
1481 1506
1482irqreturn_t iwl_isr(int irq, void *data) 1507
1508#define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1509
1510/* Free dram table */
1511void iwl_free_isr_ict(struct iwl_priv *priv)
1512{
1513 if (priv->ict_tbl_vir) {
1514 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1515 PAGE_SIZE, priv->ict_tbl_vir,
1516 priv->ict_tbl_dma);
1517 priv->ict_tbl_vir = NULL;
1518 }
1519}
1520EXPORT_SYMBOL(iwl_free_isr_ict);
1521
1522
1523/* allocate dram shared table it is a PAGE_SIZE aligned
1524 * also reset all data related to ICT table interrupt.
1525 */
1526int iwl_alloc_isr_ict(struct iwl_priv *priv)
1527{
1528
1529 if (priv->cfg->use_isr_legacy)
1530 return 0;
1531 /* allocate shrared data table */
1532 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1533 ICT_COUNT) + PAGE_SIZE,
1534 &priv->ict_tbl_dma);
1535 if (!priv->ict_tbl_vir)
1536 return -ENOMEM;
1537
1538 /* align table to PAGE_SIZE boundry */
1539 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1540
1541 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1542 (unsigned long long)priv->ict_tbl_dma,
1543 (unsigned long long)priv->aligned_ict_tbl_dma,
1544 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1545
1546 priv->ict_tbl = priv->ict_tbl_vir +
1547 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1548
1549 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1550 priv->ict_tbl, priv->ict_tbl_vir,
1551 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1552
1553 /* reset table and index to all 0 */
1554 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1555 priv->ict_index = 0;
1556
1557 /* add periodic RX interrupt */
1558 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1559 return 0;
1560}
1561EXPORT_SYMBOL(iwl_alloc_isr_ict);
1562
1563/* Device is going up inform it about using ICT interrupt table,
1564 * also we need to tell the driver to start using ICT interrupt.
1565 */
1566int iwl_reset_ict(struct iwl_priv *priv)
1567{
1568 u32 val;
1569 unsigned long flags;
1570
1571 if (!priv->ict_tbl_vir)
1572 return 0;
1573
1574 spin_lock_irqsave(&priv->lock, flags);
1575 iwl_disable_interrupts(priv);
1576
1577 memset(&priv->ict_tbl[0],0, sizeof(u32) * ICT_COUNT);
1578
1579 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1580
1581 val |= CSR_DRAM_INT_TBL_ENABLE;
1582 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1583
1584 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1585 "aligned dma address %Lx\n",
1586 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1587
1588 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1589 priv->use_ict = true;
1590 priv->ict_index = 0;
1591 iwl_write32(priv, CSR_INT, priv->inta_mask);
1592 iwl_enable_interrupts(priv);
1593 spin_unlock_irqrestore(&priv->lock, flags);
1594
1595 return 0;
1596}
1597EXPORT_SYMBOL(iwl_reset_ict);
1598
1599/* Device is going down disable ict interrupt usage */
1600void iwl_disable_ict(struct iwl_priv *priv)
1601{
1602 unsigned long flags;
1603
1604 spin_lock_irqsave(&priv->lock, flags);
1605 priv->use_ict = false;
1606 spin_unlock_irqrestore(&priv->lock, flags);
1607}
1608EXPORT_SYMBOL(iwl_disable_ict);
1609
1610/* interrupt handler using ict table, with this interrupt driver will
1611 * stop using INTA register to get device's interrupt, reading this register
1612 * is expensive, device will write interrupts in ICT dram table, increment
1613 * index then will fire interrupt to driver, driver will OR all ICT table
1614 * entries from current index up to table entry with 0 value. the result is
1615 * the interrupt we need to service, driver will set the entries back to 0 and
1616 * set index.
1617 */
1618irqreturn_t iwl_isr_ict(int irq, void *data)
1619{
1620 struct iwl_priv *priv = data;
1621 u32 inta, inta_mask;
1622 u32 val = 0;
1623
1624 if (!priv)
1625 return IRQ_NONE;
1626
1627 /* dram interrupt table not set yet,
1628 * use legacy interrupt.
1629 */
1630 if (!priv->use_ict)
1631 return iwl_isr(irq, data);
1632
1633 spin_lock(&priv->lock);
1634
1635 /* Disable (but don't clear!) interrupts here to avoid
1636 * back-to-back ISRs and sporadic interrupts from our NIC.
1637 * If we have something to service, the tasklet will re-enable ints.
1638 * If we *don't* have something, we'll re-enable before leaving here.
1639 */
1640 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1641 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1642
1643
1644 /* Ignore interrupt if there's nothing in NIC to service.
1645 * This may be due to IRQ shared with another device,
1646 * or due to sporadic interrupts thrown from our NIC. */
1647 if (!priv->ict_tbl[priv->ict_index]) {
1648 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1649 goto none;
1650 }
1651
1652 /* read all entries that not 0 start with ict_index */
1653 while (priv->ict_tbl[priv->ict_index]) {
1654
1655 val |= priv->ict_tbl[priv->ict_index];
1656 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1657 priv->ict_index,
1658 priv->ict_tbl[priv->ict_index]);
1659 priv->ict_tbl[priv->ict_index] = 0;
1660 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1661 ICT_COUNT);
1662
1663 }
1664
1665 /* We should not get this value, just ignore it. */
1666 if (val == 0xffffffff)
1667 val = 0;
1668
1669 inta = (0xff & val) | ((0xff00 & val) << 16);
1670 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1671 inta, inta_mask, val);
1672
1673 inta &= priv->inta_mask;
1674 priv->inta |= inta;
1675
1676 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1677 if (likely(inta))
1678 tasklet_schedule(&priv->irq_tasklet);
1679 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1680 /* Allow interrupt if was disabled by this handler and
1681 * no tasklet was schedules, We should not enable interrupt,
1682 * tasklet will enable it.
1683 */
1684 iwl_enable_interrupts(priv);
1685 }
1686
1687 spin_unlock(&priv->lock);
1688 return IRQ_HANDLED;
1689
1690 none:
1691 /* re-enable interrupts here since we don't have anything to service.
1692 * only Re-enable if disabled by irq.
1693 */
1694 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1695 iwl_enable_interrupts(priv);
1696
1697 spin_unlock(&priv->lock);
1698 return IRQ_NONE;
1699}
1700EXPORT_SYMBOL(iwl_isr_ict);
1701
1702
1703static irqreturn_t iwl_isr(int irq, void *data)
1704{
1705 struct iwl_priv *priv = data;
1706 u32 inta, inta_mask;
1707 u32 inta_fh;
1708
1709 if (!priv)
1710 return IRQ_NONE;
1711
1712 spin_lock(&priv->lock);
1713
1714 /* Disable (but don't clear!) interrupts here to avoid
1715 * back-to-back ISRs and sporadic interrupts from our NIC.
1716 * If we have something to service, the tasklet will re-enable ints.
1717 * If we *don't* have something, we'll re-enable before leaving here. */
1718 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1719 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1720
1721 /* Discover which interrupts are active/pending */
1722 inta = iwl_read32(priv, CSR_INT);
1723
1724 /* Ignore interrupt if there's nothing in NIC to service.
1725 * This may be due to IRQ shared with another device,
1726 * or due to sporadic interrupts thrown from our NIC. */
1727 if (!inta) {
1728 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1729 goto none;
1730 }
1731
1732 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1733 /* Hardware disappeared. It might have already raised
1734 * an interrupt */
1735 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1736 goto unplugged;
1737 }
1738
1739#ifdef CONFIG_IWLWIFI_DEBUG
1740 if (priv->debug_level & (IWL_DL_ISR)) {
1741 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1742 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1743 "fh 0x%08x\n", inta, inta_mask, inta_fh);
1744 }
1745#endif
1746
1747 priv->inta |= inta;
1748 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1749 if (likely(inta))
1750 tasklet_schedule(&priv->irq_tasklet);
1751 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1752 iwl_enable_interrupts(priv);
1753
1754 unplugged:
1755 spin_unlock(&priv->lock);
1756 return IRQ_HANDLED;
1757
1758 none:
1759 /* re-enable interrupts here since we don't have anything to service. */
1760 /* only Re-enable if diabled by irq and no schedules tasklet. */
1761 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1762 iwl_enable_interrupts(priv);
1763
1764 spin_unlock(&priv->lock);
1765 return IRQ_NONE;
1766}
1767
1768irqreturn_t iwl_isr_legacy(int irq, void *data)
1483{ 1769{
1484 struct iwl_priv *priv = data; 1770 struct iwl_priv *priv = data;
1485 u32 inta, inta_mask; 1771 u32 inta, inta_mask;
@@ -1536,7 +1822,7 @@ irqreturn_t iwl_isr(int irq, void *data)
1536 spin_unlock(&priv->lock); 1822 spin_unlock(&priv->lock);
1537 return IRQ_NONE; 1823 return IRQ_NONE;
1538} 1824}
1539EXPORT_SYMBOL(iwl_isr); 1825EXPORT_SYMBOL(iwl_isr_legacy);
1540 1826
1541int iwl_send_bt_config(struct iwl_priv *priv) 1827int iwl_send_bt_config(struct iwl_priv *priv)
1542{ 1828{
@@ -1580,10 +1866,6 @@ static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
1580 1866
1581 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); 1867 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1582 1868
1583 ret = iwl_grab_nic_access(priv);
1584 if (ret)
1585 return ret;
1586
1587 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { 1869 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1588 /* read data comes through single port, auto-incr addr */ 1870 /* read data comes through single port, auto-incr addr */
1589 /* NOTE: Use the debugless read so we don't flood kernel log 1871 /* NOTE: Use the debugless read so we don't flood kernel log
@@ -1599,8 +1881,6 @@ static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
1599 } 1881 }
1600 } 1882 }
1601 1883
1602 iwl_release_nic_access(priv);
1603
1604 return ret; 1884 return ret;
1605} 1885}
1606 1886
@@ -1618,10 +1898,6 @@ static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1618 1898
1619 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); 1899 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1620 1900
1621 ret = iwl_grab_nic_access(priv);
1622 if (ret)
1623 return ret;
1624
1625 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, 1901 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1626 IWL49_RTC_INST_LOWER_BOUND); 1902 IWL49_RTC_INST_LOWER_BOUND);
1627 1903
@@ -1642,8 +1918,6 @@ static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1642 } 1918 }
1643 } 1919 }
1644 1920
1645 iwl_release_nic_access(priv);
1646
1647 if (!errcnt) 1921 if (!errcnt)
1648 IWL_DEBUG_INFO(priv, 1922 IWL_DEBUG_INFO(priv,
1649 "ucode image in INSTRUCTION memory is good\n"); 1923 "ucode image in INSTRUCTION memory is good\n");
@@ -1752,7 +2026,6 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
1752 u32 data2, line; 2026 u32 data2, line;
1753 u32 desc, time, count, base, data1; 2027 u32 desc, time, count, base, data1;
1754 u32 blink1, blink2, ilink1, ilink2; 2028 u32 blink1, blink2, ilink1, ilink2;
1755 int ret;
1756 2029
1757 if (priv->ucode_type == UCODE_INIT) 2030 if (priv->ucode_type == UCODE_INIT)
1758 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr); 2031 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
@@ -1764,12 +2037,6 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
1764 return; 2037 return;
1765 } 2038 }
1766 2039
1767 ret = iwl_grab_nic_access(priv);
1768 if (ret) {
1769 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1770 return;
1771 }
1772
1773 count = iwl_read_targ_mem(priv, base); 2040 count = iwl_read_targ_mem(priv, base);
1774 2041
1775 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { 2042 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
@@ -1796,7 +2063,6 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
1796 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2, 2063 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1797 ilink1, ilink2); 2064 ilink1, ilink2);
1798 2065
1799 iwl_release_nic_access(priv);
1800} 2066}
1801EXPORT_SYMBOL(iwl_dump_nic_error_log); 2067EXPORT_SYMBOL(iwl_dump_nic_error_log);
1802 2068
@@ -1805,7 +2071,6 @@ EXPORT_SYMBOL(iwl_dump_nic_error_log);
1805/** 2071/**
1806 * iwl_print_event_log - Dump error event log to syslog 2072 * iwl_print_event_log - Dump error event log to syslog
1807 * 2073 *
1808 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
1809 */ 2074 */
1810static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx, 2075static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1811 u32 num_events, u32 mode) 2076 u32 num_events, u32 mode)
@@ -1851,7 +2116,6 @@ static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1851 2116
1852void iwl_dump_nic_event_log(struct iwl_priv *priv) 2117void iwl_dump_nic_event_log(struct iwl_priv *priv)
1853{ 2118{
1854 int ret;
1855 u32 base; /* SRAM byte address of event log header */ 2119 u32 base; /* SRAM byte address of event log header */
1856 u32 capacity; /* event log capacity in # entries */ 2120 u32 capacity; /* event log capacity in # entries */
1857 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ 2121 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
@@ -1869,12 +2133,6 @@ void iwl_dump_nic_event_log(struct iwl_priv *priv)
1869 return; 2133 return;
1870 } 2134 }
1871 2135
1872 ret = iwl_grab_nic_access(priv);
1873 if (ret) {
1874 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1875 return;
1876 }
1877
1878 /* event log header */ 2136 /* event log header */
1879 capacity = iwl_read_targ_mem(priv, base); 2137 capacity = iwl_read_targ_mem(priv, base);
1880 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); 2138 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
@@ -1886,7 +2144,6 @@ void iwl_dump_nic_event_log(struct iwl_priv *priv)
1886 /* bail out if nothing in log */ 2144 /* bail out if nothing in log */
1887 if (size == 0) { 2145 if (size == 0) {
1888 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n"); 2146 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1889 iwl_release_nic_access(priv);
1890 return; 2147 return;
1891 } 2148 }
1892 2149
@@ -1901,7 +2158,6 @@ void iwl_dump_nic_event_log(struct iwl_priv *priv)
1901 /* (then/else) start at top of log */ 2158 /* (then/else) start at top of log */
1902 iwl_print_event_log(priv, 0, next_entry, mode); 2159 iwl_print_event_log(priv, 0, next_entry, mode);
1903 2160
1904 iwl_release_nic_access(priv);
1905} 2161}
1906EXPORT_SYMBOL(iwl_dump_nic_event_log); 2162EXPORT_SYMBOL(iwl_dump_nic_event_log);
1907 2163
@@ -2008,11 +2264,11 @@ int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv)
2008 /* wake up ucode */ 2264 /* wake up ucode */
2009 msleep(10); 2265 msleep(10);
2010 2266
2011 spin_lock_irqsave(&priv->lock, flags);
2012 iwl_read32(priv, CSR_UCODE_DRV_GP1); 2267 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2268 spin_lock_irqsave(&priv->reg_lock, flags);
2013 if (!iwl_grab_nic_access(priv)) 2269 if (!iwl_grab_nic_access(priv))
2014 iwl_release_nic_access(priv); 2270 iwl_release_nic_access(priv);
2015 spin_unlock_irqrestore(&priv->lock, flags); 2271 spin_unlock_irqrestore(&priv->reg_lock, flags);
2016 2272
2017 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { 2273 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2018 IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - " 2274 IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
@@ -2054,7 +2310,7 @@ void iwl_bg_rf_kill(struct work_struct *work)
2054 "HW and/or SW RF Kill no longer active, restarting " 2310 "HW and/or SW RF Kill no longer active, restarting "
2055 "device\n"); 2311 "device\n");
2056 if (!test_bit(STATUS_EXIT_PENDING, &priv->status) && 2312 if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
2057 test_bit(STATUS_ALIVE, &priv->status)) 2313 priv->is_open)
2058 queue_work(priv->workqueue, &priv->restart); 2314 queue_work(priv->workqueue, &priv->restart);
2059 } else { 2315 } else {
2060 /* make sure mac80211 stop sending Tx frame */ 2316 /* make sure mac80211 stop sending Tx frame */
@@ -2112,3 +2368,666 @@ void iwl_rx_reply_error(struct iwl_priv *priv,
2112} 2368}
2113EXPORT_SYMBOL(iwl_rx_reply_error); 2369EXPORT_SYMBOL(iwl_rx_reply_error);
2114 2370
2371void iwl_clear_isr_stats(struct iwl_priv *priv)
2372{
2373 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2374}
2375EXPORT_SYMBOL(iwl_clear_isr_stats);
2376
2377int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2378 const struct ieee80211_tx_queue_params *params)
2379{
2380 struct iwl_priv *priv = hw->priv;
2381 unsigned long flags;
2382 int q;
2383
2384 IWL_DEBUG_MAC80211(priv, "enter\n");
2385
2386 if (!iwl_is_ready_rf(priv)) {
2387 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2388 return -EIO;
2389 }
2390
2391 if (queue >= AC_NUM) {
2392 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2393 return 0;
2394 }
2395
2396 q = AC_NUM - 1 - queue;
2397
2398 spin_lock_irqsave(&priv->lock, flags);
2399
2400 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2401 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2402 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2403 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2404 cpu_to_le16((params->txop * 32));
2405
2406 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2407 priv->qos_data.qos_active = 1;
2408
2409 if (priv->iw_mode == NL80211_IFTYPE_AP)
2410 iwl_activate_qos(priv, 1);
2411 else if (priv->assoc_id && iwl_is_associated(priv))
2412 iwl_activate_qos(priv, 0);
2413
2414 spin_unlock_irqrestore(&priv->lock, flags);
2415
2416 IWL_DEBUG_MAC80211(priv, "leave\n");
2417 return 0;
2418}
2419EXPORT_SYMBOL(iwl_mac_conf_tx);
2420
2421static void iwl_ht_conf(struct iwl_priv *priv,
2422 struct ieee80211_bss_conf *bss_conf)
2423{
2424 struct ieee80211_sta_ht_cap *ht_conf;
2425 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2426 struct ieee80211_sta *sta;
2427
2428 IWL_DEBUG_MAC80211(priv, "enter: \n");
2429
2430 if (!iwl_conf->is_ht)
2431 return;
2432
2433
2434 /*
2435 * It is totally wrong to base global information on something
2436 * that is valid only when associated, alas, this driver works
2437 * that way and I don't know how to fix it.
2438 */
2439
2440 rcu_read_lock();
2441 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2442 if (!sta) {
2443 rcu_read_unlock();
2444 return;
2445 }
2446 ht_conf = &sta->ht_cap;
2447
2448 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
2449 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
2450 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
2451 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
2452
2453 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
2454 iwl_conf->max_amsdu_size =
2455 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
2456
2457 iwl_conf->supported_chan_width =
2458 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
2459
2460 /*
2461 * XXX: The HT configuration needs to be moved into iwl_mac_config()
2462 * to be done there correctly.
2463 */
2464
2465 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
2466 if (conf_is_ht40_minus(&priv->hw->conf))
2467 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2468 else if (conf_is_ht40_plus(&priv->hw->conf))
2469 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2470
2471 /* If no above or below channel supplied disable FAT channel */
2472 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
2473 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
2474 iwl_conf->supported_chan_width = 0;
2475
2476 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2477
2478 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2479
2480 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
2481 iwl_conf->ht_protection =
2482 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2483 iwl_conf->non_GF_STA_present =
2484 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2485
2486 rcu_read_unlock();
2487
2488 IWL_DEBUG_MAC80211(priv, "leave\n");
2489}
2490
2491#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2492void iwl_bss_info_changed(struct ieee80211_hw *hw,
2493 struct ieee80211_vif *vif,
2494 struct ieee80211_bss_conf *bss_conf,
2495 u32 changes)
2496{
2497 struct iwl_priv *priv = hw->priv;
2498 int ret;
2499
2500 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2501
2502 if (!iwl_is_alive(priv))
2503 return;
2504
2505 mutex_lock(&priv->mutex);
2506
2507 if (changes & BSS_CHANGED_BEACON &&
2508 priv->iw_mode == NL80211_IFTYPE_AP) {
2509 dev_kfree_skb(priv->ibss_beacon);
2510 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2511 }
2512
2513 if ((changes & BSS_CHANGED_BSSID) && !iwl_is_rfkill(priv)) {
2514 /* If there is currently a HW scan going on in the background
2515 * then we need to cancel it else the RXON below will fail. */
2516 if (iwl_scan_cancel_timeout(priv, 100)) {
2517 IWL_WARN(priv, "Aborted scan still in progress "
2518 "after 100ms\n");
2519 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2520 mutex_unlock(&priv->mutex);
2521 return;
2522 }
2523 memcpy(priv->staging_rxon.bssid_addr,
2524 bss_conf->bssid, ETH_ALEN);
2525
2526 /* TODO: Audit driver for usage of these members and see
2527 * if mac80211 deprecates them (priv->bssid looks like it
2528 * shouldn't be there, but I haven't scanned the IBSS code
2529 * to verify) - jpk */
2530 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2531
2532 if (priv->iw_mode == NL80211_IFTYPE_AP)
2533 iwlcore_config_ap(priv);
2534 else {
2535 int rc = iwlcore_commit_rxon(priv);
2536 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
2537 iwl_rxon_add_station(
2538 priv, priv->active_rxon.bssid_addr, 1);
2539 }
2540 } else if (!iwl_is_rfkill(priv)) {
2541 iwl_scan_cancel_timeout(priv, 100);
2542 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2543 iwlcore_commit_rxon(priv);
2544 }
2545
2546 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2547 changes & BSS_CHANGED_BEACON) {
2548 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2549
2550 if (beacon)
2551 iwl_mac_beacon_update(hw, beacon);
2552 }
2553
2554 mutex_unlock(&priv->mutex);
2555
2556 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2557 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2558 bss_conf->use_short_preamble);
2559 if (bss_conf->use_short_preamble)
2560 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2561 else
2562 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2563 }
2564
2565 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2566 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2567 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2568 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2569 else
2570 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2571 }
2572
2573 if (changes & BSS_CHANGED_HT) {
2574 iwl_ht_conf(priv, bss_conf);
2575
2576 if (priv->cfg->ops->hcmd->set_rxon_chain)
2577 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2578 }
2579
2580 if (changes & BSS_CHANGED_ASSOC) {
2581 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2582 /* This should never happen as this function should
2583 * never be called from interrupt context. */
2584 if (WARN_ON_ONCE(in_interrupt()))
2585 return;
2586 if (bss_conf->assoc) {
2587 priv->assoc_id = bss_conf->aid;
2588 priv->beacon_int = bss_conf->beacon_int;
2589 priv->power_data.dtim_period = bss_conf->dtim_period;
2590 priv->timestamp = bss_conf->timestamp;
2591 priv->assoc_capability = bss_conf->assoc_capability;
2592
2593 /* we have just associated, don't start scan too early
2594 * leave time for EAPOL exchange to complete
2595 */
2596 priv->next_scan_jiffies = jiffies +
2597 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2598 mutex_lock(&priv->mutex);
2599 priv->cfg->ops->lib->post_associate(priv);
2600 mutex_unlock(&priv->mutex);
2601 } else {
2602 priv->assoc_id = 0;
2603 IWL_DEBUG_MAC80211(priv, "DISASSOC %d\n", bss_conf->assoc);
2604 }
2605 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2606 IWL_DEBUG_MAC80211(priv, "Associated Changes %d\n", changes);
2607 ret = iwl_send_rxon_assoc(priv);
2608 if (!ret)
2609 /* Sync active_rxon with latest change. */
2610 memcpy((void *)&priv->active_rxon,
2611 &priv->staging_rxon,
2612 sizeof(struct iwl_rxon_cmd));
2613 }
2614 IWL_DEBUG_MAC80211(priv, "leave\n");
2615}
2616EXPORT_SYMBOL(iwl_bss_info_changed);
2617
2618int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2619{
2620 struct iwl_priv *priv = hw->priv;
2621 unsigned long flags;
2622 __le64 timestamp;
2623
2624 IWL_DEBUG_MAC80211(priv, "enter\n");
2625
2626 if (!iwl_is_ready_rf(priv)) {
2627 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2628 return -EIO;
2629 }
2630
2631 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2632 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2633 return -EIO;
2634 }
2635
2636 spin_lock_irqsave(&priv->lock, flags);
2637
2638 if (priv->ibss_beacon)
2639 dev_kfree_skb(priv->ibss_beacon);
2640
2641 priv->ibss_beacon = skb;
2642
2643 priv->assoc_id = 0;
2644 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2645 priv->timestamp = le64_to_cpu(timestamp);
2646
2647 IWL_DEBUG_MAC80211(priv, "leave\n");
2648 spin_unlock_irqrestore(&priv->lock, flags);
2649
2650 iwl_reset_qos(priv);
2651
2652 priv->cfg->ops->lib->post_associate(priv);
2653
2654
2655 return 0;
2656}
2657EXPORT_SYMBOL(iwl_mac_beacon_update);
2658
2659int iwl_set_mode(struct iwl_priv *priv, int mode)
2660{
2661 if (mode == NL80211_IFTYPE_ADHOC) {
2662 const struct iwl_channel_info *ch_info;
2663
2664 ch_info = iwl_get_channel_info(priv,
2665 priv->band,
2666 le16_to_cpu(priv->staging_rxon.channel));
2667
2668 if (!ch_info || !is_channel_ibss(ch_info)) {
2669 IWL_ERR(priv, "channel %d not IBSS channel\n",
2670 le16_to_cpu(priv->staging_rxon.channel));
2671 return -EINVAL;
2672 }
2673 }
2674
2675 iwl_connection_init_rx_config(priv, mode);
2676
2677 if (priv->cfg->ops->hcmd->set_rxon_chain)
2678 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2679
2680 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2681
2682 priv->cfg->ops->smgmt->clear_station_table(priv);
2683
2684 /* dont commit rxon if rf-kill is on*/
2685 if (!iwl_is_ready_rf(priv))
2686 return -EAGAIN;
2687
2688 cancel_delayed_work(&priv->scan_check);
2689 if (iwl_scan_cancel_timeout(priv, 100)) {
2690 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2691 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2692 return -EAGAIN;
2693 }
2694
2695 iwlcore_commit_rxon(priv);
2696
2697 return 0;
2698}
2699EXPORT_SYMBOL(iwl_set_mode);
2700
2701int iwl_mac_add_interface(struct ieee80211_hw *hw,
2702 struct ieee80211_if_init_conf *conf)
2703{
2704 struct iwl_priv *priv = hw->priv;
2705 unsigned long flags;
2706
2707 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2708
2709 if (priv->vif) {
2710 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2711 return -EOPNOTSUPP;
2712 }
2713
2714 spin_lock_irqsave(&priv->lock, flags);
2715 priv->vif = conf->vif;
2716 priv->iw_mode = conf->type;
2717
2718 spin_unlock_irqrestore(&priv->lock, flags);
2719
2720 mutex_lock(&priv->mutex);
2721
2722 if (conf->mac_addr) {
2723 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2724 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2725 }
2726
2727 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2728 /* we are not ready, will run again when ready */
2729 set_bit(STATUS_MODE_PENDING, &priv->status);
2730
2731 mutex_unlock(&priv->mutex);
2732
2733 IWL_DEBUG_MAC80211(priv, "leave\n");
2734 return 0;
2735}
2736EXPORT_SYMBOL(iwl_mac_add_interface);
2737
2738void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2739 struct ieee80211_if_init_conf *conf)
2740{
2741 struct iwl_priv *priv = hw->priv;
2742
2743 IWL_DEBUG_MAC80211(priv, "enter\n");
2744
2745 mutex_lock(&priv->mutex);
2746
2747 if (iwl_is_ready_rf(priv)) {
2748 iwl_scan_cancel_timeout(priv, 100);
2749 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2750 iwlcore_commit_rxon(priv);
2751 }
2752 if (priv->vif == conf->vif) {
2753 priv->vif = NULL;
2754 memset(priv->bssid, 0, ETH_ALEN);
2755 }
2756 mutex_unlock(&priv->mutex);
2757
2758 IWL_DEBUG_MAC80211(priv, "leave\n");
2759
2760}
2761EXPORT_SYMBOL(iwl_mac_remove_interface);
2762
2763/**
2764 * iwl_mac_config - mac80211 config callback
2765 *
2766 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2767 * be set inappropriately and the driver currently sets the hardware up to
2768 * use it whenever needed.
2769 */
2770int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2771{
2772 struct iwl_priv *priv = hw->priv;
2773 const struct iwl_channel_info *ch_info;
2774 struct ieee80211_conf *conf = &hw->conf;
2775 unsigned long flags = 0;
2776 int ret = 0;
2777 u16 ch;
2778 int scan_active = 0;
2779
2780 mutex_lock(&priv->mutex);
2781
2782 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2783 conf->channel->hw_value, changed);
2784
2785 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2786 test_bit(STATUS_SCANNING, &priv->status))) {
2787 scan_active = 1;
2788 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2789 }
2790
2791
2792 /* during scanning mac80211 will delay channel setting until
2793 * scan finish with changed = 0
2794 */
2795 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2796 if (scan_active)
2797 goto set_ch_out;
2798
2799 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2800 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2801 if (!is_channel_valid(ch_info)) {
2802 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2803 ret = -EINVAL;
2804 goto set_ch_out;
2805 }
2806
2807 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2808 !is_channel_ibss(ch_info)) {
2809 IWL_ERR(priv, "channel %d in band %d not "
2810 "IBSS channel\n",
2811 conf->channel->hw_value, conf->channel->band);
2812 ret = -EINVAL;
2813 goto set_ch_out;
2814 }
2815
2816 priv->current_ht_config.is_ht = conf_is_ht(conf);
2817
2818 spin_lock_irqsave(&priv->lock, flags);
2819
2820
2821 /* if we are switching from ht to 2.4 clear flags
2822 * from any ht related info since 2.4 does not
2823 * support ht */
2824 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2825 priv->staging_rxon.flags = 0;
2826
2827 iwl_set_rxon_channel(priv, conf->channel);
2828
2829 iwl_set_flags_for_band(priv, conf->channel->band);
2830 spin_unlock_irqrestore(&priv->lock, flags);
2831 set_ch_out:
2832 /* The list of supported rates and rate mask can be different
2833 * for each band; since the band may have changed, reset
2834 * the rate mask to what mac80211 lists */
2835 iwl_set_rate(priv);
2836 }
2837
2838 if (changed & IEEE80211_CONF_CHANGE_PS &&
2839 priv->iw_mode == NL80211_IFTYPE_STATION) {
2840 priv->power_data.power_disabled =
2841 !(conf->flags & IEEE80211_CONF_PS);
2842 ret = iwl_power_update_mode(priv, 0);
2843 if (ret)
2844 IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
2845 }
2846
2847 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2848 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2849 priv->tx_power_user_lmt, conf->power_level);
2850
2851 iwl_set_tx_power(priv, conf->power_level, false);
2852 }
2853
2854 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2855 if (priv->cfg->ops->hcmd->set_rxon_chain)
2856 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2857
2858 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
2859 if (conf->radio_enabled &&
2860 iwl_radio_kill_sw_enable_radio(priv)) {
2861 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
2862 "waiting for uCode\n");
2863 goto out;
2864 }
2865
2866 if (!conf->radio_enabled)
2867 iwl_radio_kill_sw_disable_radio(priv);
2868 }
2869
2870 if (!conf->radio_enabled) {
2871 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
2872 goto out;
2873 }
2874
2875 if (!iwl_is_ready(priv)) {
2876 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2877 goto out;
2878 }
2879
2880 if (scan_active)
2881 goto out;
2882
2883 if (memcmp(&priv->active_rxon,
2884 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2885 iwlcore_commit_rxon(priv);
2886 else
2887 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2888
2889
2890out:
2891 IWL_DEBUG_MAC80211(priv, "leave\n");
2892 mutex_unlock(&priv->mutex);
2893 return ret;
2894}
2895EXPORT_SYMBOL(iwl_mac_config);
2896
2897int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2898 struct ieee80211_tx_queue_stats *stats)
2899{
2900 struct iwl_priv *priv = hw->priv;
2901 int i, avail;
2902 struct iwl_tx_queue *txq;
2903 struct iwl_queue *q;
2904 unsigned long flags;
2905
2906 IWL_DEBUG_MAC80211(priv, "enter\n");
2907
2908 if (!iwl_is_ready_rf(priv)) {
2909 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2910 return -EIO;
2911 }
2912
2913 spin_lock_irqsave(&priv->lock, flags);
2914
2915 for (i = 0; i < AC_NUM; i++) {
2916 txq = &priv->txq[i];
2917 q = &txq->q;
2918 avail = iwl_queue_space(q);
2919
2920 stats[i].len = q->n_window - avail;
2921 stats[i].limit = q->n_window - q->high_mark;
2922 stats[i].count = q->n_window;
2923
2924 }
2925 spin_unlock_irqrestore(&priv->lock, flags);
2926
2927 IWL_DEBUG_MAC80211(priv, "leave\n");
2928
2929 return 0;
2930}
2931EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2932
2933void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2934{
2935 struct iwl_priv *priv = hw->priv;
2936 unsigned long flags;
2937
2938 mutex_lock(&priv->mutex);
2939 IWL_DEBUG_MAC80211(priv, "enter\n");
2940
2941 spin_lock_irqsave(&priv->lock, flags);
2942 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2943 spin_unlock_irqrestore(&priv->lock, flags);
2944
2945 iwl_reset_qos(priv);
2946
2947 spin_lock_irqsave(&priv->lock, flags);
2948 priv->assoc_id = 0;
2949 priv->assoc_capability = 0;
2950 priv->assoc_station_added = 0;
2951
2952 /* new association get rid of ibss beacon skb */
2953 if (priv->ibss_beacon)
2954 dev_kfree_skb(priv->ibss_beacon);
2955
2956 priv->ibss_beacon = NULL;
2957
2958 priv->beacon_int = priv->vif->bss_conf.beacon_int;
2959 priv->timestamp = 0;
2960 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2961 priv->beacon_int = 0;
2962
2963 spin_unlock_irqrestore(&priv->lock, flags);
2964
2965 if (!iwl_is_ready_rf(priv)) {
2966 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2967 mutex_unlock(&priv->mutex);
2968 return;
2969 }
2970
2971 /* we are restarting association process
2972 * clear RXON_FILTER_ASSOC_MSK bit
2973 */
2974 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2975 iwl_scan_cancel_timeout(priv, 100);
2976 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2977 iwlcore_commit_rxon(priv);
2978 }
2979
2980 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2981 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2982 mutex_unlock(&priv->mutex);
2983 return;
2984 }
2985
2986 iwl_set_rate(priv);
2987
2988 mutex_unlock(&priv->mutex);
2989
2990 IWL_DEBUG_MAC80211(priv, "leave\n");
2991}
2992EXPORT_SYMBOL(iwl_mac_reset_tsf);
2993
2994#ifdef CONFIG_PM
2995
2996int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2997{
2998 struct iwl_priv *priv = pci_get_drvdata(pdev);
2999
3000 /*
3001 * This function is called when system goes into suspend state
3002 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3003 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3004 * it will not call apm_ops.stop() to stop the DMA operation.
3005 * Calling apm_ops.stop here to make sure we stop the DMA.
3006 */
3007 priv->cfg->ops->lib->apm_ops.stop(priv);
3008
3009 pci_save_state(pdev);
3010 pci_disable_device(pdev);
3011 pci_set_power_state(pdev, PCI_D3hot);
3012
3013 return 0;
3014}
3015EXPORT_SYMBOL(iwl_pci_suspend);
3016
3017int iwl_pci_resume(struct pci_dev *pdev)
3018{
3019 struct iwl_priv *priv = pci_get_drvdata(pdev);
3020 int ret;
3021
3022 pci_set_power_state(pdev, PCI_D0);
3023 ret = pci_enable_device(pdev);
3024 if (ret)
3025 return ret;
3026 pci_restore_state(pdev);
3027 iwl_enable_interrupts(priv);
3028
3029 return 0;
3030}
3031EXPORT_SYMBOL(iwl_pci_resume);
3032
3033#endif /* CONFIG_PM */
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index a8eac8c3c1fa..87df1b767941 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -83,9 +83,21 @@ struct iwl_cmd;
83#define IWL_SKU_A 0x2 83#define IWL_SKU_A 0x2
84#define IWL_SKU_N 0x8 84#define IWL_SKU_N 0x8
85 85
86struct iwl_station_mgmt_ops {
87 u8 (*add_station)(struct iwl_priv *priv, const u8 *addr,
88 int is_ap, u8 flags, struct ieee80211_sta_ht_cap *ht_info);
89 int (*remove_station)(struct iwl_priv *priv, const u8 *addr,
90 int is_ap);
91 u8 (*find_station)(struct iwl_priv *priv, const u8 *addr);
92 void (*clear_station_table)(struct iwl_priv *priv);
93};
94
86struct iwl_hcmd_ops { 95struct iwl_hcmd_ops {
87 int (*rxon_assoc)(struct iwl_priv *priv); 96 int (*rxon_assoc)(struct iwl_priv *priv);
97 int (*commit_rxon)(struct iwl_priv *priv);
98 void (*set_rxon_chain)(struct iwl_priv *priv);
88}; 99};
100
89struct iwl_hcmd_utils_ops { 101struct iwl_hcmd_utils_ops {
90 u16 (*get_hcmd_size)(u8 cmd_id, u16 len); 102 u16 (*get_hcmd_size)(u8 cmd_id, u16 len);
91 u16 (*build_addsta_hcmd)(const struct iwl_addsta_cmd *cmd, u8 *data); 103 u16 (*build_addsta_hcmd)(const struct iwl_addsta_cmd *cmd, u8 *data);
@@ -100,6 +112,19 @@ struct iwl_hcmd_utils_ops {
100 struct iwl_rx_phy_res *rx_resp); 112 struct iwl_rx_phy_res *rx_resp);
101}; 113};
102 114
115struct iwl_apm_ops {
116 int (*init)(struct iwl_priv *priv);
117 int (*reset)(struct iwl_priv *priv);
118 void (*stop)(struct iwl_priv *priv);
119 void (*config)(struct iwl_priv *priv);
120 int (*set_pwr_src)(struct iwl_priv *priv, enum iwl_pwr_src src);
121};
122
123struct iwl_temp_ops {
124 void (*temperature)(struct iwl_priv *priv);
125 void (*set_ct_kill)(struct iwl_priv *priv);
126};
127
103struct iwl_lib_ops { 128struct iwl_lib_ops {
104 /* set hw dependent parameters */ 129 /* set hw dependent parameters */
105 int (*set_hw_params)(struct iwl_priv *priv); 130 int (*set_hw_params)(struct iwl_priv *priv);
@@ -137,30 +162,31 @@ struct iwl_lib_ops {
137 int (*is_valid_rtc_data_addr)(u32 addr); 162 int (*is_valid_rtc_data_addr)(u32 addr);
138 /* 1st ucode load */ 163 /* 1st ucode load */
139 int (*load_ucode)(struct iwl_priv *priv); 164 int (*load_ucode)(struct iwl_priv *priv);
140 /* power management */ 165 /* power management */
141 struct { 166 struct iwl_apm_ops apm_ops;
142 int (*init)(struct iwl_priv *priv); 167
143 int (*reset)(struct iwl_priv *priv);
144 void (*stop)(struct iwl_priv *priv);
145 void (*config)(struct iwl_priv *priv);
146 int (*set_pwr_src)(struct iwl_priv *priv, enum iwl_pwr_src src);
147 } apm_ops;
148 /* power */ 168 /* power */
149 int (*send_tx_power) (struct iwl_priv *priv); 169 int (*send_tx_power) (struct iwl_priv *priv);
150 void (*update_chain_flags)(struct iwl_priv *priv); 170 void (*update_chain_flags)(struct iwl_priv *priv);
151 void (*temperature) (struct iwl_priv *priv); 171 void (*post_associate) (struct iwl_priv *priv);
172 void (*config_ap) (struct iwl_priv *priv);
173 irqreturn_t (*isr) (int irq, void *data);
174
152 /* eeprom operations (as defined in iwl-eeprom.h) */ 175 /* eeprom operations (as defined in iwl-eeprom.h) */
153 struct iwl_eeprom_ops eeprom_ops; 176 struct iwl_eeprom_ops eeprom_ops;
177
178 /* temperature */
179 struct iwl_temp_ops temp_ops;
154}; 180};
155 181
156struct iwl_ops { 182struct iwl_ops {
157 const struct iwl_lib_ops *lib; 183 const struct iwl_lib_ops *lib;
158 const struct iwl_hcmd_ops *hcmd; 184 const struct iwl_hcmd_ops *hcmd;
159 const struct iwl_hcmd_utils_ops *utils; 185 const struct iwl_hcmd_utils_ops *utils;
186 const struct iwl_station_mgmt_ops *smgmt;
160}; 187};
161 188
162struct iwl_mod_params { 189struct iwl_mod_params {
163 int disable; /* def: 0 = enable radio */
164 int sw_crypto; /* def: 0 = using hardware encryption */ 190 int sw_crypto; /* def: 0 = using hardware encryption */
165 u32 debug; /* def: 0 = minimal debug log messages */ 191 u32 debug; /* def: 0 = minimal debug log messages */
166 int disable_hw_scan; /* def: 0 = use h/w scan */ 192 int disable_hw_scan; /* def: 0 = use h/w scan */
@@ -214,6 +240,7 @@ struct iwl_cfg {
214 u8 valid_tx_ant; 240 u8 valid_tx_ant;
215 u8 valid_rx_ant; 241 u8 valid_rx_ant;
216 bool need_pll_cfg; 242 bool need_pll_cfg;
243 bool use_isr_legacy;
217}; 244};
218 245
219/*************************** 246/***************************
@@ -225,6 +252,8 @@ struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
225void iwl_hw_detect(struct iwl_priv *priv); 252void iwl_hw_detect(struct iwl_priv *priv);
226void iwl_reset_qos(struct iwl_priv *priv); 253void iwl_reset_qos(struct iwl_priv *priv);
227void iwl_activate_qos(struct iwl_priv *priv, u8 force); 254void iwl_activate_qos(struct iwl_priv *priv, u8 force);
255int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
256 const struct ieee80211_tx_queue_params *params);
228void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt); 257void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt);
229int iwl_check_rxon_cmd(struct iwl_priv *priv); 258int iwl_check_rxon_cmd(struct iwl_priv *priv);
230int iwl_full_rxon_required(struct iwl_priv *priv); 259int iwl_full_rxon_required(struct iwl_priv *priv);
@@ -249,6 +278,24 @@ int iwl_setup_mac(struct iwl_priv *priv);
249int iwl_set_hw_params(struct iwl_priv *priv); 278int iwl_set_hw_params(struct iwl_priv *priv);
250int iwl_init_drv(struct iwl_priv *priv); 279int iwl_init_drv(struct iwl_priv *priv);
251void iwl_uninit_drv(struct iwl_priv *priv); 280void iwl_uninit_drv(struct iwl_priv *priv);
281bool iwl_is_monitor_mode(struct iwl_priv *priv);
282void iwl_post_associate(struct iwl_priv *priv);
283void iwl_bss_info_changed(struct ieee80211_hw *hw,
284 struct ieee80211_vif *vif,
285 struct ieee80211_bss_conf *bss_conf,
286 u32 changes);
287int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb);
288int iwl_commit_rxon(struct iwl_priv *priv);
289int iwl_set_mode(struct iwl_priv *priv, int mode);
290int iwl_mac_add_interface(struct ieee80211_hw *hw,
291 struct ieee80211_if_init_conf *conf);
292void iwl_mac_remove_interface(struct ieee80211_hw *hw,
293 struct ieee80211_if_init_conf *conf);
294int iwl_mac_config(struct ieee80211_hw *hw, u32 changed);
295void iwl_config_ap(struct iwl_priv *priv);
296int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
297 struct ieee80211_tx_queue_stats *stats);
298void iwl_mac_reset_tsf(struct ieee80211_hw *hw);
252 299
253/***************************************************** 300/*****************************************************
254 * RX handlers. 301 * RX handlers.
@@ -271,10 +318,11 @@ int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv,
271 struct iwl_rx_queue *q); 318 struct iwl_rx_queue *q);
272void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq); 319void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq);
273void iwl_rx_replenish(struct iwl_priv *priv); 320void iwl_rx_replenish(struct iwl_priv *priv);
321void iwl_rx_replenish_now(struct iwl_priv *priv);
274int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq); 322int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq);
275int iwl_rx_queue_restock(struct iwl_priv *priv); 323int iwl_rx_queue_restock(struct iwl_priv *priv);
276int iwl_rx_queue_space(const struct iwl_rx_queue *q); 324int iwl_rx_queue_space(const struct iwl_rx_queue *q);
277void iwl_rx_allocate(struct iwl_priv *priv); 325void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority);
278void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb); 326void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
279int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index); 327int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index);
280/* Handlers */ 328/* Handlers */
@@ -328,8 +376,6 @@ int iwl_hwrate_to_plcp_idx(u32 rate_n_flags);
328 376
329u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv); 377u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv);
330 378
331void iwl_set_rate(struct iwl_priv *priv);
332
333u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant_idx); 379u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant_idx);
334 380
335static inline u32 iwl_ant_idx_to_flags(u8 ant_idx) 381static inline u32 iwl_ant_idx_to_flags(u8 ant_idx)
@@ -358,8 +404,8 @@ int iwl_scan_cancel(struct iwl_priv *priv);
358int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms); 404int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms);
359int iwl_scan_initiate(struct iwl_priv *priv); 405int iwl_scan_initiate(struct iwl_priv *priv);
360int iwl_mac_hw_scan(struct ieee80211_hw *hw, struct cfg80211_scan_request *req); 406int iwl_mac_hw_scan(struct ieee80211_hw *hw, struct cfg80211_scan_request *req);
361u16 iwl_fill_probe_req(struct iwl_priv *priv, enum ieee80211_band band, 407u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame,
362 struct ieee80211_mgmt *frame, int left); 408 const u8 *ie, int ie_len, int left);
363void iwl_setup_rx_scan_handlers(struct iwl_priv *priv); 409void iwl_setup_rx_scan_handlers(struct iwl_priv *priv);
364u16 iwl_get_active_dwell_time(struct iwl_priv *priv, 410u16 iwl_get_active_dwell_time(struct iwl_priv *priv,
365 enum ieee80211_band band, 411 enum ieee80211_band band,
@@ -423,7 +469,13 @@ int iwl_send_card_state(struct iwl_priv *priv, u32 flags,
423 *****************************************************/ 469 *****************************************************/
424void iwl_disable_interrupts(struct iwl_priv *priv); 470void iwl_disable_interrupts(struct iwl_priv *priv);
425void iwl_enable_interrupts(struct iwl_priv *priv); 471void iwl_enable_interrupts(struct iwl_priv *priv);
426irqreturn_t iwl_isr(int irq, void *data); 472irqreturn_t iwl_isr_legacy(int irq, void *data);
473int iwl_reset_ict(struct iwl_priv *priv);
474void iwl_disable_ict(struct iwl_priv *priv);
475int iwl_alloc_isr_ict(struct iwl_priv *priv);
476void iwl_free_isr_ict(struct iwl_priv *priv);
477irqreturn_t iwl_isr_ict(int irq, void *data);
478
427static inline u16 iwl_pcie_link_ctl(struct iwl_priv *priv) 479static inline u16 iwl_pcie_link_ctl(struct iwl_priv *priv)
428{ 480{
429 int pos; 481 int pos;
@@ -432,12 +484,17 @@ static inline u16 iwl_pcie_link_ctl(struct iwl_priv *priv)
432 pci_read_config_word(priv->pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl); 484 pci_read_config_word(priv->pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
433 return pci_lnk_ctl; 485 return pci_lnk_ctl;
434} 486}
487#ifdef CONFIG_PM
488int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state);
489int iwl_pci_resume(struct pci_dev *pdev);
490#endif /* CONFIG_PM */
435 491
436/***************************************************** 492/*****************************************************
437* Error Handling Debugging 493* Error Handling Debugging
438******************************************************/ 494******************************************************/
439void iwl_dump_nic_error_log(struct iwl_priv *priv); 495void iwl_dump_nic_error_log(struct iwl_priv *priv);
440void iwl_dump_nic_event_log(struct iwl_priv *priv); 496void iwl_dump_nic_event_log(struct iwl_priv *priv);
497void iwl_clear_isr_stats(struct iwl_priv *priv);
441 498
442/***************************************************** 499/*****************************************************
443* GEOS 500* GEOS
@@ -458,7 +515,6 @@ void iwlcore_free_geos(struct iwl_priv *priv);
458#define STATUS_TEMPERATURE 8 515#define STATUS_TEMPERATURE 8
459#define STATUS_GEO_CONFIGURED 9 516#define STATUS_GEO_CONFIGURED 9
460#define STATUS_EXIT_PENDING 10 517#define STATUS_EXIT_PENDING 10
461#define STATUS_IN_SUSPEND 11
462#define STATUS_STATISTICS 12 518#define STATUS_STATISTICS 12
463#define STATUS_SCANNING 13 519#define STATUS_SCANNING 13
464#define STATUS_SCAN_ABORTING 14 520#define STATUS_SCAN_ABORTING 14
@@ -528,7 +584,14 @@ static inline int iwl_send_rxon_assoc(struct iwl_priv *priv)
528{ 584{
529 return priv->cfg->ops->hcmd->rxon_assoc(priv); 585 return priv->cfg->ops->hcmd->rxon_assoc(priv);
530} 586}
531 587static inline int iwlcore_commit_rxon(struct iwl_priv *priv)
588{
589 return priv->cfg->ops->hcmd->commit_rxon(priv);
590}
591static inline void iwlcore_config_ap(struct iwl_priv *priv)
592{
593 priv->cfg->ops->lib->config_ap(priv);
594}
532static inline const struct ieee80211_supported_band *iwl_get_hw_mode( 595static inline const struct ieee80211_supported_band *iwl_get_hw_mode(
533 struct iwl_priv *priv, enum ieee80211_band band) 596 struct iwl_priv *priv, enum ieee80211_band band)
534{ 597{
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h
index 6e983149b83b..f03dae1b2f36 100644
--- a/drivers/net/wireless/iwlwifi/iwl-csr.h
+++ b/drivers/net/wireless/iwlwifi/iwl-csr.h
@@ -89,6 +89,7 @@
89/* EEPROM reads */ 89/* EEPROM reads */
90#define CSR_EEPROM_REG (CSR_BASE+0x02c) 90#define CSR_EEPROM_REG (CSR_BASE+0x02c)
91#define CSR_EEPROM_GP (CSR_BASE+0x030) 91#define CSR_EEPROM_GP (CSR_BASE+0x030)
92#define CSR_OTP_GP_REG (CSR_BASE+0x034)
92#define CSR_GIO_REG (CSR_BASE+0x03C) 93#define CSR_GIO_REG (CSR_BASE+0x03C)
93#define CSR_GP_UCODE (CSR_BASE+0x044) 94#define CSR_GP_UCODE (CSR_BASE+0x044)
94#define CSR_UCODE_DRV_GP1 (CSR_BASE+0x054) 95#define CSR_UCODE_DRV_GP1 (CSR_BASE+0x054)
@@ -96,8 +97,10 @@
96#define CSR_UCODE_DRV_GP1_CLR (CSR_BASE+0x05c) 97#define CSR_UCODE_DRV_GP1_CLR (CSR_BASE+0x05c)
97#define CSR_UCODE_DRV_GP2 (CSR_BASE+0x060) 98#define CSR_UCODE_DRV_GP2 (CSR_BASE+0x060)
98#define CSR_LED_REG (CSR_BASE+0x094) 99#define CSR_LED_REG (CSR_BASE+0x094)
100#define CSR_DRAM_INT_TBL_REG (CSR_BASE+0x0A0)
99#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100) 101#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100)
100 102
103#define CSR_INT_PERIODIC_REG (CSR_BASE+0x005)
101/* Analog phase-lock-loop configuration */ 104/* Analog phase-lock-loop configuration */
102#define CSR_ANA_PLL_CFG (CSR_BASE+0x20c) 105#define CSR_ANA_PLL_CFG (CSR_BASE+0x20c)
103/* 106/*
@@ -123,16 +126,18 @@
123 126
124#define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A (0x00080000) 127#define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A (0x00080000)
125#define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000) 128#define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000)
126#define CSR_HW_IF_CONFIG_REG_BIT_PCI_OWN_SEM (0x00400000) 129#define CSR_HW_IF_CONFIG_REG_BIT_NIC_READY (0x00400000)
127#define CSR_HW_IF_CONFIG_REG_BIT_ME_OWN (0x02000000) 130#define CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE (0x02000000)
128#define CSR_HW_IF_CONFIG_REG_BIT_WAKE_ME (0x08000000) 131#define CSR_HW_IF_CONFIG_REG_PREPARE (0x08000000)
129 132
133#define CSR_INT_PERIODIC_DIS (0x00)
134#define CSR_INT_PERIODIC_ENA (0xFF)
130 135
131/* interrupt flags in INTA, set by uCode or hardware (e.g. dma), 136/* interrupt flags in INTA, set by uCode or hardware (e.g. dma),
132 * acknowledged (reset) by host writing "1" to flagged bits. */ 137 * acknowledged (reset) by host writing "1" to flagged bits. */
133#define CSR_INT_BIT_FH_RX (1 << 31) /* Rx DMA, cmd responses, FH_INT[17:16] */ 138#define CSR_INT_BIT_FH_RX (1 << 31) /* Rx DMA, cmd responses, FH_INT[17:16] */
134#define CSR_INT_BIT_HW_ERR (1 << 29) /* DMA hardware error FH_INT[31] */ 139#define CSR_INT_BIT_HW_ERR (1 << 29) /* DMA hardware error FH_INT[31] */
135#define CSR_INT_BIT_DNLD (1 << 28) /* uCode Download */ 140#define CSR_INT_BIT_RX_PERIODIC (1 << 28) /* Rx periodic */
136#define CSR_INT_BIT_FH_TX (1 << 27) /* Tx DMA FH_INT[1:0] */ 141#define CSR_INT_BIT_FH_TX (1 << 27) /* Tx DMA FH_INT[1:0] */
137#define CSR_INT_BIT_SCD (1 << 26) /* TXQ pointer advanced */ 142#define CSR_INT_BIT_SCD (1 << 26) /* TXQ pointer advanced */
138#define CSR_INT_BIT_SW_ERR (1 << 25) /* uCode error */ 143#define CSR_INT_BIT_SW_ERR (1 << 25) /* uCode error */
@@ -226,6 +231,10 @@
226#define CSR_EEPROM_GP_VALID_MSK (0x00000007) 231#define CSR_EEPROM_GP_VALID_MSK (0x00000007)
227#define CSR_EEPROM_GP_BAD_SIGNATURE (0x00000000) 232#define CSR_EEPROM_GP_BAD_SIGNATURE (0x00000000)
228#define CSR_EEPROM_GP_IF_OWNER_MSK (0x00000180) 233#define CSR_EEPROM_GP_IF_OWNER_MSK (0x00000180)
234#define CSR_OTP_GP_REG_DEVICE_SELECT (0x00010000) /* 0 - EEPROM, 1 - OTP */
235#define CSR_OTP_GP_REG_OTP_ACCESS_MODE (0x00020000) /* 0 - absolute, 1 - relative */
236#define CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK (0x00100000) /* bit 20 */
237#define CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK (0x00200000) /* bit 21 */
229 238
230/* CSR GIO */ 239/* CSR GIO */
231#define CSR_GIO_REG_VAL_L0S_ENABLED (0x00000002) 240#define CSR_GIO_REG_VAL_L0S_ENABLED (0x00000002)
@@ -251,6 +260,11 @@
251 260
252/* HPET MEM debug */ 261/* HPET MEM debug */
253#define CSR_DBG_HPET_MEM_REG_VAL (0xFFFF0000) 262#define CSR_DBG_HPET_MEM_REG_VAL (0xFFFF0000)
263
264/* DRAM INT TABLE */
265#define CSR_DRAM_INT_TBL_ENABLE (1 << 31)
266#define CSR_DRAM_INIT_TBL_WRAP_CHECK (1 << 27)
267
254/*=== HBUS (Host-side Bus) ===*/ 268/*=== HBUS (Host-side Bus) ===*/
255#define HBUS_BASE (0x400) 269#define HBUS_BASE (0x400)
256/* 270/*
diff --git a/drivers/net/wireless/iwlwifi/iwl-debug.h b/drivers/net/wireless/iwlwifi/iwl-debug.h
index 65d1a7f2db9e..2cf014f523be 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debug.h
+++ b/drivers/net/wireless/iwlwifi/iwl-debug.h
@@ -68,13 +68,14 @@ struct iwl_debugfs {
68 struct dentry *dir_rf; 68 struct dentry *dir_rf;
69 struct dir_data_files { 69 struct dir_data_files {
70 struct dentry *file_sram; 70 struct dentry *file_sram;
71 struct dentry *file_eeprom; 71 struct dentry *file_nvm;
72 struct dentry *file_stations; 72 struct dentry *file_stations;
73 struct dentry *file_rx_statistics; 73 struct dentry *file_rx_statistics;
74 struct dentry *file_tx_statistics; 74 struct dentry *file_tx_statistics;
75 struct dentry *file_log_event; 75 struct dentry *file_log_event;
76 struct dentry *file_channels; 76 struct dentry *file_channels;
77 struct dentry *file_status; 77 struct dentry *file_status;
78 struct dentry *file_interrupt;
78 } dbgfs_data_files; 79 } dbgfs_data_files;
79 struct dir_rf_files { 80 struct dir_rf_files {
80 struct dentry *file_disable_sensitivity; 81 struct dentry *file_disable_sensitivity;
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
index 64eb585f1578..af70229144b3 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
@@ -172,7 +172,6 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
172 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 172 struct iwl_priv *priv = (struct iwl_priv *)file->private_data;
173 const size_t bufsz = sizeof(buf); 173 const size_t bufsz = sizeof(buf);
174 174
175 iwl_grab_nic_access(priv);
176 for (i = priv->dbgfs->sram_len; i > 0; i -= 4) { 175 for (i = priv->dbgfs->sram_len; i > 0; i -= 4) {
177 val = iwl_read_targ_mem(priv, priv->dbgfs->sram_offset + \ 176 val = iwl_read_targ_mem(priv, priv->dbgfs->sram_offset + \
178 priv->dbgfs->sram_len - i); 177 priv->dbgfs->sram_len - i);
@@ -192,7 +191,6 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
192 pos += scnprintf(buf + pos, bufsz - pos, "0x%08x ", val); 191 pos += scnprintf(buf + pos, bufsz - pos, "0x%08x ", val);
193 } 192 }
194 pos += scnprintf(buf + pos, bufsz - pos, "\n"); 193 pos += scnprintf(buf + pos, bufsz - pos, "\n");
195 iwl_release_nic_access(priv);
196 194
197 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 195 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
198 return ret; 196 return ret;
@@ -292,7 +290,7 @@ static ssize_t iwl_dbgfs_stations_read(struct file *file, char __user *user_buf,
292 return ret; 290 return ret;
293} 291}
294 292
295static ssize_t iwl_dbgfs_eeprom_read(struct file *file, 293static ssize_t iwl_dbgfs_nvm_read(struct file *file,
296 char __user *user_buf, 294 char __user *user_buf,
297 size_t count, 295 size_t count,
298 loff_t *ppos) 296 loff_t *ppos)
@@ -306,7 +304,7 @@ static ssize_t iwl_dbgfs_eeprom_read(struct file *file,
306 buf_size = 4 * eeprom_len + 256; 304 buf_size = 4 * eeprom_len + 256;
307 305
308 if (eeprom_len % 16) { 306 if (eeprom_len % 16) {
309 IWL_ERR(priv, "EEPROM size is not multiple of 16.\n"); 307 IWL_ERR(priv, "NVM size is not multiple of 16.\n");
310 return -ENODATA; 308 return -ENODATA;
311 } 309 }
312 310
@@ -318,6 +316,13 @@ static ssize_t iwl_dbgfs_eeprom_read(struct file *file,
318 } 316 }
319 317
320 ptr = priv->eeprom; 318 ptr = priv->eeprom;
319 if (!ptr) {
320 IWL_ERR(priv, "Invalid EEPROM/OTP memory\n");
321 return -ENOMEM;
322 }
323 pos += scnprintf(buf + pos, buf_size - pos, "NVM Type: %s\n",
324 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
325 ? "OTP" : "EEPROM");
321 for (ofs = 0 ; ofs < eeprom_len ; ofs += 16) { 326 for (ofs = 0 ; ofs < eeprom_len ; ofs += 16) {
322 pos += scnprintf(buf + pos, buf_size - pos, "0x%.4x ", ofs); 327 pos += scnprintf(buf + pos, buf_size - pos, "0x%.4x ", ofs);
323 hex_dump_to_buffer(ptr + ofs, 16 , 16, 2, buf + pos, 328 hex_dump_to_buffer(ptr + ofs, 16 , 16, 2, buf + pos,
@@ -375,51 +380,53 @@ static ssize_t iwl_dbgfs_channels_read(struct file *file, char __user *user_buf,
375 } 380 }
376 381
377 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ); 382 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
378 channels = supp_band->channels; 383 if (supp_band) {
379 384 channels = supp_band->channels;
380 pos += scnprintf(buf + pos, bufsz - pos,
381 "Displaying %d channels in 2.4GHz band 802.11bg):\n",
382 supp_band->n_channels);
383 385
384 for (i = 0; i < supp_band->n_channels; i++)
385 pos += scnprintf(buf + pos, bufsz - pos, 386 pos += scnprintf(buf + pos, bufsz - pos,
386 "%d: %ddBm: BSS%s%s, %s.\n", 387 "Displaying %d channels in 2.4GHz band 802.11bg):\n",
387 ieee80211_frequency_to_channel( 388 supp_band->n_channels);
388 channels[i].center_freq),
389 channels[i].max_power,
390 channels[i].flags & IEEE80211_CHAN_RADAR ?
391 " (IEEE 802.11h required)" : "",
392 (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
393 || (channels[i].flags &
394 IEEE80211_CHAN_RADAR)) ? "" :
395 ", IBSS",
396 channels[i].flags &
397 IEEE80211_CHAN_PASSIVE_SCAN ?
398 "passive only" : "active/passive");
399 389
390 for (i = 0; i < supp_band->n_channels; i++)
391 pos += scnprintf(buf + pos, bufsz - pos,
392 "%d: %ddBm: BSS%s%s, %s.\n",
393 ieee80211_frequency_to_channel(
394 channels[i].center_freq),
395 channels[i].max_power,
396 channels[i].flags & IEEE80211_CHAN_RADAR ?
397 " (IEEE 802.11h required)" : "",
398 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
399 || (channels[i].flags &
400 IEEE80211_CHAN_RADAR)) ? "" :
401 ", IBSS",
402 channels[i].flags &
403 IEEE80211_CHAN_PASSIVE_SCAN ?
404 "passive only" : "active/passive");
405 }
400 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ); 406 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
401 channels = supp_band->channels; 407 if (supp_band) {
402 408 channels = supp_band->channels;
403 pos += scnprintf(buf + pos, bufsz - pos,
404 "Displaying %d channels in 5.2GHz band (802.11a)\n",
405 supp_band->n_channels);
406 409
407 for (i = 0; i < supp_band->n_channels; i++)
408 pos += scnprintf(buf + pos, bufsz - pos, 410 pos += scnprintf(buf + pos, bufsz - pos,
409 "%d: %ddBm: BSS%s%s, %s.\n", 411 "Displaying %d channels in 5.2GHz band (802.11a)\n",
410 ieee80211_frequency_to_channel( 412 supp_band->n_channels);
411 channels[i].center_freq),
412 channels[i].max_power,
413 channels[i].flags & IEEE80211_CHAN_RADAR ?
414 " (IEEE 802.11h required)" : "",
415 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
416 || (channels[i].flags &
417 IEEE80211_CHAN_RADAR)) ? "" :
418 ", IBSS",
419 channels[i].flags &
420 IEEE80211_CHAN_PASSIVE_SCAN ?
421 "passive only" : "active/passive");
422 413
414 for (i = 0; i < supp_band->n_channels; i++)
415 pos += scnprintf(buf + pos, bufsz - pos,
416 "%d: %ddBm: BSS%s%s, %s.\n",
417 ieee80211_frequency_to_channel(
418 channels[i].center_freq),
419 channels[i].max_power,
420 channels[i].flags & IEEE80211_CHAN_RADAR ?
421 " (IEEE 802.11h required)" : "",
422 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
423 || (channels[i].flags &
424 IEEE80211_CHAN_RADAR)) ? "" :
425 ", IBSS",
426 channels[i].flags &
427 IEEE80211_CHAN_PASSIVE_SCAN ?
428 "passive only" : "active/passive");
429 }
423 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 430 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
424 kfree(buf); 431 kfree(buf);
425 return ret; 432 return ret;
@@ -456,8 +463,6 @@ static ssize_t iwl_dbgfs_status_read(struct file *file,
456 test_bit(STATUS_GEO_CONFIGURED, &priv->status)); 463 test_bit(STATUS_GEO_CONFIGURED, &priv->status));
457 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_EXIT_PENDING:\t %d\n", 464 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_EXIT_PENDING:\t %d\n",
458 test_bit(STATUS_EXIT_PENDING, &priv->status)); 465 test_bit(STATUS_EXIT_PENDING, &priv->status));
459 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_IN_SUSPEND:\t %d\n",
460 test_bit(STATUS_IN_SUSPEND, &priv->status));
461 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_STATISTICS:\t %d\n", 466 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_STATISTICS:\t %d\n",
462 test_bit(STATUS_STATISTICS, &priv->status)); 467 test_bit(STATUS_STATISTICS, &priv->status));
463 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_SCANNING:\t %d\n", 468 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_SCANNING:\t %d\n",
@@ -475,14 +480,104 @@ static ssize_t iwl_dbgfs_status_read(struct file *file,
475 return simple_read_from_buffer(user_buf, count, ppos, buf, pos); 480 return simple_read_from_buffer(user_buf, count, ppos, buf, pos);
476} 481}
477 482
483static ssize_t iwl_dbgfs_interrupt_read(struct file *file,
484 char __user *user_buf,
485 size_t count, loff_t *ppos) {
486
487 struct iwl_priv *priv = (struct iwl_priv *)file->private_data;
488 int pos = 0;
489 int cnt = 0;
490 char *buf;
491 int bufsz = 24 * 64; /* 24 items * 64 char per item */
492 ssize_t ret;
493
494 buf = kzalloc(bufsz, GFP_KERNEL);
495 if (!buf) {
496 IWL_ERR(priv, "Can not allocate Buffer\n");
497 return -ENOMEM;
498 }
499
500 pos += scnprintf(buf + pos, bufsz - pos,
501 "Interrupt Statistics Report:\n");
502
503 pos += scnprintf(buf + pos, bufsz - pos, "HW Error:\t\t\t %u\n",
504 priv->isr_stats.hw);
505 pos += scnprintf(buf + pos, bufsz - pos, "SW Error:\t\t\t %u\n",
506 priv->isr_stats.sw);
507 if (priv->isr_stats.sw > 0) {
508 pos += scnprintf(buf + pos, bufsz - pos,
509 "\tLast Restarting Code: 0x%X\n",
510 priv->isr_stats.sw_err);
511 }
512#ifdef CONFIG_IWLWIFI_DEBUG
513 pos += scnprintf(buf + pos, bufsz - pos, "Frame transmitted:\t\t %u\n",
514 priv->isr_stats.sch);
515 pos += scnprintf(buf + pos, bufsz - pos, "Alive interrupt:\t\t %u\n",
516 priv->isr_stats.alive);
517#endif
518 pos += scnprintf(buf + pos, bufsz - pos,
519 "HW RF KILL switch toggled:\t %u\n",
520 priv->isr_stats.rfkill);
521
522 pos += scnprintf(buf + pos, bufsz - pos, "CT KILL:\t\t\t %u\n",
523 priv->isr_stats.ctkill);
524
525 pos += scnprintf(buf + pos, bufsz - pos, "Wakeup Interrupt:\t\t %u\n",
526 priv->isr_stats.wakeup);
527
528 pos += scnprintf(buf + pos, bufsz - pos,
529 "Rx command responses:\t\t %u\n",
530 priv->isr_stats.rx);
531 for (cnt = 0; cnt < REPLY_MAX; cnt++) {
532 if (priv->isr_stats.rx_handlers[cnt] > 0)
533 pos += scnprintf(buf + pos, bufsz - pos,
534 "\tRx handler[%36s]:\t\t %u\n",
535 get_cmd_string(cnt),
536 priv->isr_stats.rx_handlers[cnt]);
537 }
538
539 pos += scnprintf(buf + pos, bufsz - pos, "Tx/FH interrupt:\t\t %u\n",
540 priv->isr_stats.tx);
541
542 pos += scnprintf(buf + pos, bufsz - pos, "Unexpected INTA:\t\t %u\n",
543 priv->isr_stats.unhandled);
544
545 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
546 kfree(buf);
547 return ret;
548}
549
550static ssize_t iwl_dbgfs_interrupt_write(struct file *file,
551 const char __user *user_buf,
552 size_t count, loff_t *ppos)
553{
554 struct iwl_priv *priv = file->private_data;
555 char buf[8];
556 int buf_size;
557 u32 reset_flag;
558
559 memset(buf, 0, sizeof(buf));
560 buf_size = min(count, sizeof(buf) - 1);
561 if (copy_from_user(buf, user_buf, buf_size))
562 return -EFAULT;
563 if (sscanf(buf, "%x", &reset_flag) != 1)
564 return -EFAULT;
565 if (reset_flag == 0)
566 iwl_clear_isr_stats(priv);
567
568 return count;
569}
570
571
478DEBUGFS_READ_WRITE_FILE_OPS(sram); 572DEBUGFS_READ_WRITE_FILE_OPS(sram);
479DEBUGFS_WRITE_FILE_OPS(log_event); 573DEBUGFS_WRITE_FILE_OPS(log_event);
480DEBUGFS_READ_FILE_OPS(eeprom); 574DEBUGFS_READ_FILE_OPS(nvm);
481DEBUGFS_READ_FILE_OPS(stations); 575DEBUGFS_READ_FILE_OPS(stations);
482DEBUGFS_READ_FILE_OPS(rx_statistics); 576DEBUGFS_READ_FILE_OPS(rx_statistics);
483DEBUGFS_READ_FILE_OPS(tx_statistics); 577DEBUGFS_READ_FILE_OPS(tx_statistics);
484DEBUGFS_READ_FILE_OPS(channels); 578DEBUGFS_READ_FILE_OPS(channels);
485DEBUGFS_READ_FILE_OPS(status); 579DEBUGFS_READ_FILE_OPS(status);
580DEBUGFS_READ_WRITE_FILE_OPS(interrupt);
486 581
487/* 582/*
488 * Create the debugfs files and directories 583 * Create the debugfs files and directories
@@ -510,7 +605,7 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
510 605
511 DEBUGFS_ADD_DIR(data, dbgfs->dir_drv); 606 DEBUGFS_ADD_DIR(data, dbgfs->dir_drv);
512 DEBUGFS_ADD_DIR(rf, dbgfs->dir_drv); 607 DEBUGFS_ADD_DIR(rf, dbgfs->dir_drv);
513 DEBUGFS_ADD_FILE(eeprom, data); 608 DEBUGFS_ADD_FILE(nvm, data);
514 DEBUGFS_ADD_FILE(sram, data); 609 DEBUGFS_ADD_FILE(sram, data);
515 DEBUGFS_ADD_FILE(log_event, data); 610 DEBUGFS_ADD_FILE(log_event, data);
516 DEBUGFS_ADD_FILE(stations, data); 611 DEBUGFS_ADD_FILE(stations, data);
@@ -518,6 +613,7 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
518 DEBUGFS_ADD_FILE(tx_statistics, data); 613 DEBUGFS_ADD_FILE(tx_statistics, data);
519 DEBUGFS_ADD_FILE(channels, data); 614 DEBUGFS_ADD_FILE(channels, data);
520 DEBUGFS_ADD_FILE(status, data); 615 DEBUGFS_ADD_FILE(status, data);
616 DEBUGFS_ADD_FILE(interrupt, data);
521 DEBUGFS_ADD_BOOL(disable_sensitivity, rf, &priv->disable_sens_cal); 617 DEBUGFS_ADD_BOOL(disable_sensitivity, rf, &priv->disable_sens_cal);
522 DEBUGFS_ADD_BOOL(disable_chain_noise, rf, 618 DEBUGFS_ADD_BOOL(disable_chain_noise, rf,
523 &priv->disable_chain_noise_cal); 619 &priv->disable_chain_noise_cal);
@@ -540,7 +636,7 @@ void iwl_dbgfs_unregister(struct iwl_priv *priv)
540 if (!priv->dbgfs) 636 if (!priv->dbgfs)
541 return; 637 return;
542 638
543 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_eeprom); 639 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_nvm);
544 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_rx_statistics); 640 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_rx_statistics);
545 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_tx_statistics); 641 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_tx_statistics);
546 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_sram); 642 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_sram);
@@ -548,6 +644,7 @@ void iwl_dbgfs_unregister(struct iwl_priv *priv)
548 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_stations); 644 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_stations);
549 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_channels); 645 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_channels);
550 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_status); 646 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_status);
647 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_interrupt);
551 DEBUGFS_REMOVE(priv->dbgfs->dir_data); 648 DEBUGFS_REMOVE(priv->dbgfs->dir_data);
552 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_rf_files.file_disable_sensitivity); 649 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_rf_files.file_disable_sensitivity);
553 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_rf_files.file_disable_chain_noise); 650 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_rf_files.file_disable_chain_noise);
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h
index cf7f0db58fcf..2dafc26fb6a8 100644
--- a/drivers/net/wireless/iwlwifi/iwl-dev.h
+++ b/drivers/net/wireless/iwlwifi/iwl-dev.h
@@ -70,6 +70,7 @@ extern struct iwl_ops iwl5000_ops;
70extern struct iwl_lib_ops iwl5000_lib; 70extern struct iwl_lib_ops iwl5000_lib;
71extern struct iwl_hcmd_ops iwl5000_hcmd; 71extern struct iwl_hcmd_ops iwl5000_hcmd;
72extern struct iwl_hcmd_utils_ops iwl5000_hcmd_utils; 72extern struct iwl_hcmd_utils_ops iwl5000_hcmd_utils;
73extern struct iwl_station_mgmt_ops iwl5000_station_mgmt;
73 74
74/* shared functions from iwl-5000.c */ 75/* shared functions from iwl-5000.c */
75extern u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len); 76extern u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len);
@@ -381,6 +382,7 @@ struct iwl_rx_queue {
381 u32 read; 382 u32 read;
382 u32 write; 383 u32 write;
383 u32 free_count; 384 u32 free_count;
385 u32 write_actual;
384 struct list_head rx_free; 386 struct list_head rx_free;
385 struct list_head rx_used; 387 struct list_head rx_used;
386 int need_update; 388 int need_update;
@@ -498,22 +500,13 @@ struct iwl_qos_info {
498#define STA_PS_STATUS_WAKE 0 500#define STA_PS_STATUS_WAKE 0
499#define STA_PS_STATUS_SLEEP 1 501#define STA_PS_STATUS_SLEEP 1
500 502
501struct iwl3945_tid_data {
502 u16 seq_number;
503};
504
505struct iwl3945_hw_key {
506 enum ieee80211_key_alg alg;
507 int keylen;
508 u8 key[32];
509};
510 503
511struct iwl3945_station_entry { 504struct iwl3945_station_entry {
512 struct iwl3945_addsta_cmd sta; 505 struct iwl3945_addsta_cmd sta;
513 struct iwl3945_tid_data tid[MAX_TID_COUNT]; 506 struct iwl_tid_data tid[MAX_TID_COUNT];
514 u8 used; 507 u8 used;
515 u8 ps_status; 508 u8 ps_status;
516 struct iwl3945_hw_key keyinfo; 509 struct iwl_hw_key keyinfo;
517}; 510};
518 511
519struct iwl_station_entry { 512struct iwl_station_entry {
@@ -822,6 +815,26 @@ enum {
822 MEASUREMENT_ACTIVE = (1 << 1), 815 MEASUREMENT_ACTIVE = (1 << 1),
823}; 816};
824 817
818enum iwl_nvm_type {
819 NVM_DEVICE_TYPE_EEPROM = 0,
820 NVM_DEVICE_TYPE_OTP,
821};
822
823/* interrupt statistics */
824struct isr_statistics {
825 u32 hw;
826 u32 sw;
827 u32 sw_err;
828 u32 sch;
829 u32 alive;
830 u32 rfkill;
831 u32 ctkill;
832 u32 wakeup;
833 u32 rx;
834 u32 rx_handlers[REPLY_MAX];
835 u32 tx;
836 u32 unhandled;
837};
825 838
826#define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */ 839#define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */
827 840
@@ -877,15 +890,14 @@ struct iwl_priv {
877 unsigned long scan_start_tsf; 890 unsigned long scan_start_tsf;
878 void *scan; 891 void *scan;
879 int scan_bands; 892 int scan_bands;
880 int one_direct_scan; 893 struct cfg80211_scan_request *scan_request;
881 u8 direct_ssid_len;
882 u8 direct_ssid[IW_ESSID_MAX_SIZE];
883 u8 scan_tx_ant[IEEE80211_NUM_BANDS]; 894 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
884 u8 mgmt_tx_ant; 895 u8 mgmt_tx_ant;
885 896
886 /* spinlock */ 897 /* spinlock */
887 spinlock_t lock; /* protect general shared data */ 898 spinlock_t lock; /* protect general shared data */
888 spinlock_t hcmd_lock; /* protect hcmd */ 899 spinlock_t hcmd_lock; /* protect hcmd */
900 spinlock_t reg_lock; /* protect hw register access */
889 struct mutex mutex; 901 struct mutex mutex;
890 902
891 /* basic pci-network driver stuff */ 903 /* basic pci-network driver stuff */
@@ -919,7 +931,6 @@ struct iwl_priv {
919 const struct iwl_rxon_cmd active_rxon; 931 const struct iwl_rxon_cmd active_rxon;
920 struct iwl_rxon_cmd staging_rxon; 932 struct iwl_rxon_cmd staging_rxon;
921 933
922 int error_recovering;
923 struct iwl_rxon_cmd recovery_rxon; 934 struct iwl_rxon_cmd recovery_rxon;
924 935
925 /* 1st responses from initialize and runtime uCode images. 936 /* 1st responses from initialize and runtime uCode images.
@@ -978,6 +989,9 @@ struct iwl_priv {
978 u64 bytes; 989 u64 bytes;
979 } tx_stats[3], rx_stats[3]; 990 } tx_stats[3], rx_stats[3];
980 991
992 /* counts interrupts */
993 struct isr_statistics isr_stats;
994
981 struct iwl_power_mgr power_data; 995 struct iwl_power_mgr power_data;
982 996
983 struct iwl_notif_statistics statistics; 997 struct iwl_notif_statistics statistics;
@@ -1017,6 +1031,7 @@ struct iwl_priv {
1017 1031
1018 /* eeprom */ 1032 /* eeprom */
1019 u8 *eeprom; 1033 u8 *eeprom;
1034 int nvm_device_type;
1020 struct iwl_eeprom_calib_info *calib_info; 1035 struct iwl_eeprom_calib_info *calib_info;
1021 1036
1022 enum nl80211_iftype iw_mode; 1037 enum nl80211_iftype iw_mode;
@@ -1034,7 +1049,16 @@ struct iwl_priv {
1034 /*End*/ 1049 /*End*/
1035 struct iwl_hw_params hw_params; 1050 struct iwl_hw_params hw_params;
1036 1051
1052 /* INT ICT Table */
1053 u32 *ict_tbl;
1054 dma_addr_t ict_tbl_dma;
1055 dma_addr_t aligned_ict_tbl_dma;
1056 int ict_index;
1057 void *ict_tbl_vir;
1058 u32 inta;
1059 bool use_ict;
1037 1060
1061 u32 inta_mask;
1038 /* Current association information needed to configure the 1062 /* Current association information needed to configure the
1039 * hardware */ 1063 * hardware */
1040 u16 assoc_id; 1064 u16 assoc_id;
@@ -1059,7 +1083,6 @@ struct iwl_priv {
1059 1083
1060 struct tasklet_struct irq_tasklet; 1084 struct tasklet_struct irq_tasklet;
1061 1085
1062 struct delayed_work set_power_save;
1063 struct delayed_work init_alive_start; 1086 struct delayed_work init_alive_start;
1064 struct delayed_work alive_start; 1087 struct delayed_work alive_start;
1065 struct delayed_work scan_check; 1088 struct delayed_work scan_check;
@@ -1090,7 +1113,7 @@ struct iwl_priv {
1090 u32 disable_tx_power_cal; 1113 u32 disable_tx_power_cal;
1091 struct work_struct run_time_calib_work; 1114 struct work_struct run_time_calib_work;
1092 struct timer_list statistics_periodic; 1115 struct timer_list statistics_periodic;
1093 1116 bool hw_ready;
1094 /*For 3945*/ 1117 /*For 3945*/
1095#define IWL_DEFAULT_TX_POWER 0x0F 1118#define IWL_DEFAULT_TX_POWER 0x0F
1096 1119
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index 75517d05df08..cefa501e5971 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -152,6 +152,32 @@ int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
152} 152}
153EXPORT_SYMBOL(iwlcore_eeprom_verify_signature); 153EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
154 154
155static int iwlcore_get_nvm_type(struct iwl_priv *priv)
156{
157 u32 otpgp;
158 int nvm_type;
159
160 /* OTP only valid for CP/PP and after */
161 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
162 case CSR_HW_REV_TYPE_3945:
163 case CSR_HW_REV_TYPE_4965:
164 case CSR_HW_REV_TYPE_5300:
165 case CSR_HW_REV_TYPE_5350:
166 case CSR_HW_REV_TYPE_5100:
167 case CSR_HW_REV_TYPE_5150:
168 nvm_type = NVM_DEVICE_TYPE_EEPROM;
169 break;
170 default:
171 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
172 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
173 nvm_type = NVM_DEVICE_TYPE_OTP;
174 else
175 nvm_type = NVM_DEVICE_TYPE_EEPROM;
176 break;
177 }
178 return nvm_type;
179}
180
155/* 181/*
156 * The device's EEPROM semaphore prevents conflicts between driver and uCode 182 * The device's EEPROM semaphore prevents conflicts between driver and uCode
157 * when accessing the EEPROM; each access is a series of pulses to/from the 183 * when accessing the EEPROM; each access is a series of pulses to/from the
@@ -198,6 +224,33 @@ const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
198} 224}
199EXPORT_SYMBOL(iwlcore_eeprom_query_addr); 225EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
200 226
227static int iwl_init_otp_access(struct iwl_priv *priv)
228{
229 int ret;
230
231 /* Enable 40MHz radio clock */
232 _iwl_write32(priv, CSR_GP_CNTRL,
233 _iwl_read32(priv, CSR_GP_CNTRL) |
234 CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
235
236 /* wait for clock to be ready */
237 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
238 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
239 25000);
240 if (ret < 0)
241 IWL_ERR(priv, "Time out access OTP\n");
242 else {
243 if (!ret) {
244 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
245 APMG_PS_CTRL_VAL_RESET_REQ);
246 udelay(5);
247 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
248 APMG_PS_CTRL_VAL_RESET_REQ);
249 }
250 }
251 return ret;
252}
253
201/** 254/**
202 * iwl_eeprom_init - read EEPROM contents 255 * iwl_eeprom_init - read EEPROM contents
203 * 256 *
@@ -209,11 +262,18 @@ int iwl_eeprom_init(struct iwl_priv *priv)
209{ 262{
210 u16 *e; 263 u16 *e;
211 u32 gp = iwl_read32(priv, CSR_EEPROM_GP); 264 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
212 int sz = priv->cfg->eeprom_size; 265 int sz;
213 int ret; 266 int ret;
214 u16 addr; 267 u16 addr;
268 u32 otpgp;
269
270 priv->nvm_device_type = iwlcore_get_nvm_type(priv);
215 271
216 /* allocate eeprom */ 272 /* allocate eeprom */
273 if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
274 priv->cfg->eeprom_size =
275 OTP_BLOCK_SIZE * OTP_LOWER_BLOCKS_TOTAL;
276 sz = priv->cfg->eeprom_size;
217 priv->eeprom = kzalloc(sz, GFP_KERNEL); 277 priv->eeprom = kzalloc(sz, GFP_KERNEL);
218 if (!priv->eeprom) { 278 if (!priv->eeprom) {
219 ret = -ENOMEM; 279 ret = -ENOMEM;
@@ -235,30 +295,77 @@ int iwl_eeprom_init(struct iwl_priv *priv)
235 ret = -ENOENT; 295 ret = -ENOENT;
236 goto err; 296 goto err;
237 } 297 }
238 298 if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
239 /* eeprom is an array of 16bit values */ 299 ret = iwl_init_otp_access(priv);
240 for (addr = 0; addr < sz; addr += sizeof(u16)) { 300 if (ret) {
241 u32 r; 301 IWL_ERR(priv, "Failed to initialize OTP access.\n");
242 302 ret = -ENOENT;
243 _iwl_write32(priv, CSR_EEPROM_REG, 303 goto err;
244 CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); 304 }
245 305 _iwl_write32(priv, CSR_EEPROM_GP,
246 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG, 306 iwl_read32(priv, CSR_EEPROM_GP) &
247 CSR_EEPROM_REG_READ_VALID_MSK, 307 ~CSR_EEPROM_GP_IF_OWNER_MSK);
248 IWL_EEPROM_ACCESS_TIMEOUT); 308 /* clear */
249 if (ret < 0) { 309 _iwl_write32(priv, CSR_OTP_GP_REG,
250 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr); 310 iwl_read32(priv, CSR_OTP_GP_REG) |
251 goto done; 311 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
312 CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
313
314 for (addr = 0; addr < sz; addr += sizeof(u16)) {
315 u32 r;
316
317 _iwl_write32(priv, CSR_EEPROM_REG,
318 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
319
320 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
321 CSR_EEPROM_REG_READ_VALID_MSK,
322 IWL_EEPROM_ACCESS_TIMEOUT);
323 if (ret < 0) {
324 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
325 goto done;
326 }
327 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
328 /* check for ECC errors: */
329 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
330 if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
331 /* stop in this case */
332 IWL_ERR(priv, "Uncorrectable OTP ECC error, Abort OTP read\n");
333 goto done;
334 }
335 if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
336 /* continue in this case */
337 _iwl_write32(priv, CSR_OTP_GP_REG,
338 iwl_read32(priv, CSR_OTP_GP_REG) |
339 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
340 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
341 }
342 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
343 }
344 } else {
345 /* eeprom is an array of 16bit values */
346 for (addr = 0; addr < sz; addr += sizeof(u16)) {
347 u32 r;
348
349 _iwl_write32(priv, CSR_EEPROM_REG,
350 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
351
352 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
353 CSR_EEPROM_REG_READ_VALID_MSK,
354 IWL_EEPROM_ACCESS_TIMEOUT);
355 if (ret < 0) {
356 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
357 goto done;
358 }
359 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
360 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
252 } 361 }
253 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
254 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
255 } 362 }
256 ret = 0; 363 ret = 0;
257done: 364done:
258 priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv); 365 priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
259err: 366err:
260 if (ret) 367 if (ret)
261 kfree(priv->eeprom); 368 iwl_eeprom_free(priv);
262alloc_err: 369alloc_err:
263 return ret; 370 return ret;
264} 371}
@@ -285,7 +392,7 @@ int iwl_eeprom_check_version(struct iwl_priv *priv)
285 392
286 return 0; 393 return 0;
287err: 394err:
288 IWL_ERR(priv, "Unsupported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n", 395 IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
289 eeprom_ver, priv->cfg->eeprom_ver, 396 eeprom_ver, priv->cfg->eeprom_ver,
290 calib_ver, priv->cfg->eeprom_calib_ver); 397 calib_ver, priv->cfg->eeprom_calib_ver);
291 return -EINVAL; 398 return -EINVAL;
@@ -301,6 +408,8 @@ EXPORT_SYMBOL(iwl_eeprom_query_addr);
301 408
302u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset) 409u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
303{ 410{
411 if (!priv->eeprom)
412 return 0;
304 return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8); 413 return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
305} 414}
306EXPORT_SYMBOL(iwl_eeprom_query16); 415EXPORT_SYMBOL(iwl_eeprom_query16);
@@ -481,8 +590,8 @@ int iwl_init_channel_map(struct iwl_priv *priv)
481 /* First write that fat is not enabled, and then enable 590 /* First write that fat is not enabled, and then enable
482 * one by one */ 591 * one by one */
483 ch_info->fat_extension_channel = 592 ch_info->fat_extension_channel =
484 (IEEE80211_CHAN_NO_FAT_ABOVE | 593 (IEEE80211_CHAN_NO_HT40PLUS |
485 IEEE80211_CHAN_NO_FAT_BELOW); 594 IEEE80211_CHAN_NO_HT40MINUS);
486 595
487 if (!(is_channel_valid(ch_info))) { 596 if (!(is_channel_valid(ch_info))) {
488 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - " 597 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
@@ -561,7 +670,7 @@ int iwl_init_channel_map(struct iwl_priv *priv)
561 fat_extension_chan = 0; 670 fat_extension_chan = 0;
562 else 671 else
563 fat_extension_chan = 672 fat_extension_chan =
564 IEEE80211_CHAN_NO_FAT_BELOW; 673 IEEE80211_CHAN_NO_HT40MINUS;
565 674
566 /* Set up driver's info for lower half */ 675 /* Set up driver's info for lower half */
567 iwl_set_fat_chan_info(priv, ieeeband, 676 iwl_set_fat_chan_info(priv, ieeeband,
@@ -573,7 +682,7 @@ int iwl_init_channel_map(struct iwl_priv *priv)
573 iwl_set_fat_chan_info(priv, ieeeband, 682 iwl_set_fat_chan_info(priv, ieeeband,
574 (eeprom_ch_index[ch] + 4), 683 (eeprom_ch_index[ch] + 4),
575 &(eeprom_ch_info[ch]), 684 &(eeprom_ch_info[ch]),
576 IEEE80211_CHAN_NO_FAT_ABOVE); 685 IEEE80211_CHAN_NO_HT40PLUS);
577 } 686 }
578 } 687 }
579 688
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
index 3479153d96ca..195b4ef12c27 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
@@ -179,6 +179,10 @@ struct iwl_eeprom_channel {
179#define EEPROM_5050_TX_POWER_VERSION (4) 179#define EEPROM_5050_TX_POWER_VERSION (4)
180#define EEPROM_5050_EEPROM_VERSION (0x21E) 180#define EEPROM_5050_EEPROM_VERSION (0x21E)
181 181
182/* OTP */
183#define OTP_LOWER_BLOCKS_TOTAL (3)
184#define OTP_BLOCK_SIZE (0x400)
185
182/* 2.4 GHz */ 186/* 2.4 GHz */
183extern const u8 iwl_eeprom_band_1[14]; 187extern const u8 iwl_eeprom_band_1[14];
184 188
diff --git a/drivers/net/wireless/iwlwifi/iwl-io.h b/drivers/net/wireless/iwlwifi/iwl-io.h
index 083ea1ffbe87..d30cb0275d19 100644
--- a/drivers/net/wireless/iwlwifi/iwl-io.h
+++ b/drivers/net/wireless/iwlwifi/iwl-io.h
@@ -131,9 +131,23 @@ static inline void __iwl_set_bit(const char *f, u32 l,
131 IWL_DEBUG_IO(priv, "set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val); 131 IWL_DEBUG_IO(priv, "set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
132 _iwl_write32(priv, reg, val); 132 _iwl_write32(priv, reg, val);
133} 133}
134#define iwl_set_bit(p, r, m) __iwl_set_bit(__FILE__, __LINE__, p, r, m) 134static inline void iwl_set_bit(struct iwl_priv *p, u32 r, u32 m)
135{
136 unsigned long reg_flags;
137
138 spin_lock_irqsave(&p->reg_lock, reg_flags);
139 __iwl_set_bit(__FILE__, __LINE__, p, r, m);
140 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
141}
135#else 142#else
136#define iwl_set_bit(p, r, m) _iwl_set_bit(p, r, m) 143static inline void iwl_set_bit(struct iwl_priv *p, u32 r, u32 m)
144{
145 unsigned long reg_flags;
146
147 spin_lock_irqsave(&p->reg_lock, reg_flags);
148 _iwl_set_bit(p, r, m);
149 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
150}
137#endif 151#endif
138 152
139static inline void _iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask) 153static inline void _iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask)
@@ -148,19 +162,30 @@ static inline void __iwl_clear_bit(const char *f, u32 l,
148 IWL_DEBUG_IO(priv, "clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val); 162 IWL_DEBUG_IO(priv, "clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
149 _iwl_write32(priv, reg, val); 163 _iwl_write32(priv, reg, val);
150} 164}
151#define iwl_clear_bit(p, r, m) __iwl_clear_bit(__FILE__, __LINE__, p, r, m) 165static inline void iwl_clear_bit(struct iwl_priv *p, u32 r, u32 m)
166{
167 unsigned long reg_flags;
168
169 spin_lock_irqsave(&p->reg_lock, reg_flags);
170 __iwl_clear_bit(__FILE__, __LINE__, p, r, m);
171 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
172}
152#else 173#else
153#define iwl_clear_bit(p, r, m) _iwl_clear_bit(p, r, m) 174static inline void iwl_clear_bit(struct iwl_priv *p, u32 r, u32 m)
175{
176 unsigned long reg_flags;
177
178 spin_lock_irqsave(&p->reg_lock, reg_flags);
179 _iwl_clear_bit(p, r, m);
180 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
181}
154#endif 182#endif
155 183
156static inline int _iwl_grab_nic_access(struct iwl_priv *priv) 184static inline int _iwl_grab_nic_access(struct iwl_priv *priv)
157{ 185{
158 int ret; 186 int ret;
159 u32 val; 187 u32 val;
160#ifdef CONFIG_IWLWIFI_DEBUG 188
161 if (atomic_read(&priv->restrict_refcnt))
162 return 0;
163#endif
164 /* this bit wakes up the NIC */ 189 /* this bit wakes up the NIC */
165 _iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 190 _iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
166 ret = _iwl_poll_bit(priv, CSR_GP_CNTRL, 191 ret = _iwl_poll_bit(priv, CSR_GP_CNTRL,
@@ -170,12 +195,10 @@ static inline int _iwl_grab_nic_access(struct iwl_priv *priv)
170 if (ret < 0) { 195 if (ret < 0) {
171 val = _iwl_read32(priv, CSR_GP_CNTRL); 196 val = _iwl_read32(priv, CSR_GP_CNTRL);
172 IWL_ERR(priv, "MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val); 197 IWL_ERR(priv, "MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val);
198 _iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
173 return -EIO; 199 return -EIO;
174 } 200 }
175 201
176#ifdef CONFIG_IWLWIFI_DEBUG
177 atomic_inc(&priv->restrict_refcnt);
178#endif
179 return 0; 202 return 0;
180} 203}
181 204
@@ -183,9 +206,6 @@ static inline int _iwl_grab_nic_access(struct iwl_priv *priv)
183static inline int __iwl_grab_nic_access(const char *f, u32 l, 206static inline int __iwl_grab_nic_access(const char *f, u32 l,
184 struct iwl_priv *priv) 207 struct iwl_priv *priv)
185{ 208{
186 if (atomic_read(&priv->restrict_refcnt))
187 IWL_ERR(priv, "Grabbing access while already held %s %d.\n", f, l);
188
189 IWL_DEBUG_IO(priv, "grabbing nic access - %s %d\n", f, l); 209 IWL_DEBUG_IO(priv, "grabbing nic access - %s %d\n", f, l);
190 return _iwl_grab_nic_access(priv); 210 return _iwl_grab_nic_access(priv);
191} 211}
@@ -198,18 +218,13 @@ static inline int __iwl_grab_nic_access(const char *f, u32 l,
198 218
199static inline void _iwl_release_nic_access(struct iwl_priv *priv) 219static inline void _iwl_release_nic_access(struct iwl_priv *priv)
200{ 220{
201#ifdef CONFIG_IWLWIFI_DEBUG 221 _iwl_clear_bit(priv, CSR_GP_CNTRL,
202 if (atomic_dec_and_test(&priv->restrict_refcnt)) 222 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
203#endif
204 _iwl_clear_bit(priv, CSR_GP_CNTRL,
205 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
206} 223}
207#ifdef CONFIG_IWLWIFI_DEBUG 224#ifdef CONFIG_IWLWIFI_DEBUG
208static inline void __iwl_release_nic_access(const char *f, u32 l, 225static inline void __iwl_release_nic_access(const char *f, u32 l,
209 struct iwl_priv *priv) 226 struct iwl_priv *priv)
210{ 227{
211 if (atomic_read(&priv->restrict_refcnt) <= 0)
212 IWL_ERR(priv, "Release unheld nic access at line %s %d.\n", f, l);
213 228
214 IWL_DEBUG_IO(priv, "releasing nic access - %s %d\n", f, l); 229 IWL_DEBUG_IO(priv, "releasing nic access - %s %d\n", f, l);
215 _iwl_release_nic_access(priv); 230 _iwl_release_nic_access(priv);
@@ -230,16 +245,37 @@ static inline u32 __iwl_read_direct32(const char *f, u32 l,
230 struct iwl_priv *priv, u32 reg) 245 struct iwl_priv *priv, u32 reg)
231{ 246{
232 u32 value = _iwl_read_direct32(priv, reg); 247 u32 value = _iwl_read_direct32(priv, reg);
233 if (!atomic_read(&priv->restrict_refcnt))
234 IWL_ERR(priv, "Nic access not held from %s %d\n", f, l);
235 IWL_DEBUG_IO(priv, "read_direct32(0x%4X) = 0x%08x - %s %d \n", reg, value, 248 IWL_DEBUG_IO(priv, "read_direct32(0x%4X) = 0x%08x - %s %d \n", reg, value,
236 f, l); 249 f, l);
237 return value; 250 return value;
238} 251}
239#define iwl_read_direct32(priv, reg) \ 252static inline u32 iwl_read_direct32(struct iwl_priv *priv, u32 reg)
240 __iwl_read_direct32(__FILE__, __LINE__, priv, reg) 253{
254 u32 value;
255 unsigned long reg_flags;
256
257 spin_lock_irqsave(&priv->reg_lock, reg_flags);
258 iwl_grab_nic_access(priv);
259 value = __iwl_read_direct32(__FILE__, __LINE__, priv, reg);
260 iwl_release_nic_access(priv);
261 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
262 return value;
263}
264
241#else 265#else
242#define iwl_read_direct32 _iwl_read_direct32 266static inline u32 iwl_read_direct32(struct iwl_priv *priv, u32 reg)
267{
268 u32 value;
269 unsigned long reg_flags;
270
271 spin_lock_irqsave(&priv->reg_lock, reg_flags);
272 iwl_grab_nic_access(priv);
273 value = _iwl_read_direct32(priv, reg);
274 iwl_release_nic_access(priv);
275 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
276 return value;
277
278}
243#endif 279#endif
244 280
245static inline void _iwl_write_direct32(struct iwl_priv *priv, 281static inline void _iwl_write_direct32(struct iwl_priv *priv,
@@ -247,19 +283,17 @@ static inline void _iwl_write_direct32(struct iwl_priv *priv,
247{ 283{
248 _iwl_write32(priv, reg, value); 284 _iwl_write32(priv, reg, value);
249} 285}
250#ifdef CONFIG_IWLWIFI_DEBUG 286static inline void iwl_write_direct32(struct iwl_priv *priv, u32 reg, u32 value)
251static void __iwl_write_direct32(const char *f , u32 line,
252 struct iwl_priv *priv, u32 reg, u32 value)
253{ 287{
254 if (!atomic_read(&priv->restrict_refcnt)) 288 unsigned long reg_flags;
255 IWL_ERR(priv, "Nic access not held from %s line %d\n", f, line); 289
256 _iwl_write_direct32(priv, reg, value); 290 spin_lock_irqsave(&priv->reg_lock, reg_flags);
291 if (!iwl_grab_nic_access(priv)) {
292 _iwl_write_direct32(priv, reg, value);
293 iwl_release_nic_access(priv);
294 }
295 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
257} 296}
258#define iwl_write_direct32(priv, reg, value) \
259 __iwl_write_direct32(__func__, __LINE__, priv, reg, value)
260#else
261#define iwl_write_direct32 _iwl_write_direct32
262#endif
263 297
264static inline void iwl_write_reg_buf(struct iwl_priv *priv, 298static inline void iwl_write_reg_buf(struct iwl_priv *priv,
265 u32 reg, u32 len, u32 *values) 299 u32 reg, u32 len, u32 *values)
@@ -268,14 +302,23 @@ static inline void iwl_write_reg_buf(struct iwl_priv *priv,
268 302
269 if ((priv != NULL) && (values != NULL)) { 303 if ((priv != NULL) && (values != NULL)) {
270 for (; 0 < len; len -= count, reg += count, values++) 304 for (; 0 < len; len -= count, reg += count, values++)
271 _iwl_write_direct32(priv, reg, *values); 305 iwl_write_direct32(priv, reg, *values);
272 } 306 }
273} 307}
274 308
275static inline int _iwl_poll_direct_bit(struct iwl_priv *priv, u32 addr, 309static inline int _iwl_poll_direct_bit(struct iwl_priv *priv, u32 addr,
276 u32 mask, int timeout) 310 u32 mask, int timeout)
277{ 311{
278 return _iwl_poll_bit(priv, addr, mask, mask, timeout); 312 int t = 0;
313
314 do {
315 if ((iwl_read_direct32(priv, addr) & mask) == mask)
316 return t;
317 udelay(IWL_POLL_INTERVAL);
318 t += IWL_POLL_INTERVAL;
319 } while (t < timeout);
320
321 return -ETIMEDOUT;
279} 322}
280 323
281#ifdef CONFIG_IWLWIFI_DEBUG 324#ifdef CONFIG_IWLWIFI_DEBUG
@@ -305,20 +348,18 @@ static inline u32 _iwl_read_prph(struct iwl_priv *priv, u32 reg)
305 rmb(); 348 rmb();
306 return _iwl_read_direct32(priv, HBUS_TARG_PRPH_RDAT); 349 return _iwl_read_direct32(priv, HBUS_TARG_PRPH_RDAT);
307} 350}
308#ifdef CONFIG_IWLWIFI_DEBUG 351static inline u32 iwl_read_prph(struct iwl_priv *priv, u32 reg)
309static inline u32 __iwl_read_prph(const char *f, u32 line,
310 struct iwl_priv *priv, u32 reg)
311{ 352{
312 if (!atomic_read(&priv->restrict_refcnt)) 353 unsigned long reg_flags;
313 IWL_ERR(priv, "Nic access not held from %s line %d\n", f, line); 354 u32 val;
314 return _iwl_read_prph(priv, reg);
315}
316 355
317#define iwl_read_prph(priv, reg) \ 356 spin_lock_irqsave(&priv->reg_lock, reg_flags);
318 __iwl_read_prph(__func__, __LINE__, priv, reg) 357 iwl_grab_nic_access(priv);
319#else 358 val = _iwl_read_prph(priv, reg);
320#define iwl_read_prph _iwl_read_prph 359 iwl_release_nic_access(priv);
321#endif 360 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
361 return val;
362}
322 363
323static inline void _iwl_write_prph(struct iwl_priv *priv, 364static inline void _iwl_write_prph(struct iwl_priv *priv,
324 u32 addr, u32 val) 365 u32 addr, u32 val)
@@ -328,83 +369,107 @@ static inline void _iwl_write_prph(struct iwl_priv *priv,
328 wmb(); 369 wmb();
329 _iwl_write_direct32(priv, HBUS_TARG_PRPH_WDAT, val); 370 _iwl_write_direct32(priv, HBUS_TARG_PRPH_WDAT, val);
330} 371}
331#ifdef CONFIG_IWLWIFI_DEBUG 372
332static inline void __iwl_write_prph(const char *f, u32 line, 373static inline void iwl_write_prph(struct iwl_priv *priv, u32 addr, u32 val)
333 struct iwl_priv *priv, u32 addr, u32 val)
334{ 374{
335 if (!atomic_read(&priv->restrict_refcnt)) 375 unsigned long reg_flags;
336 IWL_ERR(priv, "Nic access not held from %s line %d\n", f, line);
337 _iwl_write_prph(priv, addr, val);
338}
339 376
340#define iwl_write_prph(priv, addr, val) \ 377 spin_lock_irqsave(&priv->reg_lock, reg_flags);
341 __iwl_write_prph(__func__, __LINE__, priv, addr, val); 378 if (!iwl_grab_nic_access(priv)) {
342#else 379 _iwl_write_prph(priv, addr, val);
343#define iwl_write_prph _iwl_write_prph 380 iwl_release_nic_access(priv);
344#endif 381 }
382 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
383}
345 384
346#define _iwl_set_bits_prph(priv, reg, mask) \ 385#define _iwl_set_bits_prph(priv, reg, mask) \
347 _iwl_write_prph(priv, reg, (_iwl_read_prph(priv, reg) | mask)) 386 _iwl_write_prph(priv, reg, (_iwl_read_prph(priv, reg) | mask))
348#ifdef CONFIG_IWLWIFI_DEBUG 387
349static inline void __iwl_set_bits_prph(const char *f, u32 line, 388static inline void iwl_set_bits_prph(struct iwl_priv *priv, u32 reg, u32 mask)
350 struct iwl_priv *priv,
351 u32 reg, u32 mask)
352{ 389{
353 if (!atomic_read(&priv->restrict_refcnt)) 390 unsigned long reg_flags;
354 IWL_ERR(priv, "Nic access not held from %s line %d\n", f, line);
355 391
392 spin_lock_irqsave(&priv->reg_lock, reg_flags);
393 iwl_grab_nic_access(priv);
356 _iwl_set_bits_prph(priv, reg, mask); 394 _iwl_set_bits_prph(priv, reg, mask);
395 iwl_release_nic_access(priv);
396 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
357} 397}
358#define iwl_set_bits_prph(priv, reg, mask) \
359 __iwl_set_bits_prph(__func__, __LINE__, priv, reg, mask)
360#else
361#define iwl_set_bits_prph _iwl_set_bits_prph
362#endif
363 398
364#define _iwl_set_bits_mask_prph(priv, reg, bits, mask) \ 399#define _iwl_set_bits_mask_prph(priv, reg, bits, mask) \
365 _iwl_write_prph(priv, reg, ((_iwl_read_prph(priv, reg) & mask) | bits)) 400 _iwl_write_prph(priv, reg, ((_iwl_read_prph(priv, reg) & mask) | bits))
366 401
367#ifdef CONFIG_IWLWIFI_DEBUG 402static inline void iwl_set_bits_mask_prph(struct iwl_priv *priv, u32 reg,
368static inline void __iwl_set_bits_mask_prph(const char *f, u32 line, 403 u32 bits, u32 mask)
369 struct iwl_priv *priv, u32 reg, u32 bits, u32 mask)
370{ 404{
371 if (!atomic_read(&priv->restrict_refcnt)) 405 unsigned long reg_flags;
372 IWL_ERR(priv, "Nic access not held from %s line %d\n", f, line); 406
407 spin_lock_irqsave(&priv->reg_lock, reg_flags);
408 iwl_grab_nic_access(priv);
373 _iwl_set_bits_mask_prph(priv, reg, bits, mask); 409 _iwl_set_bits_mask_prph(priv, reg, bits, mask);
410 iwl_release_nic_access(priv);
411 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
374} 412}
375#define iwl_set_bits_mask_prph(priv, reg, bits, mask) \
376 __iwl_set_bits_mask_prph(__func__, __LINE__, priv, reg, bits, mask)
377#else
378#define iwl_set_bits_mask_prph _iwl_set_bits_mask_prph
379#endif
380 413
381static inline void iwl_clear_bits_prph(struct iwl_priv 414static inline void iwl_clear_bits_prph(struct iwl_priv
382 *priv, u32 reg, u32 mask) 415 *priv, u32 reg, u32 mask)
383{ 416{
384 u32 val = _iwl_read_prph(priv, reg); 417 unsigned long reg_flags;
418 u32 val;
419
420 spin_lock_irqsave(&priv->reg_lock, reg_flags);
421 iwl_grab_nic_access(priv);
422 val = _iwl_read_prph(priv, reg);
385 _iwl_write_prph(priv, reg, (val & ~mask)); 423 _iwl_write_prph(priv, reg, (val & ~mask));
424 iwl_release_nic_access(priv);
425 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
386} 426}
387 427
388static inline u32 iwl_read_targ_mem(struct iwl_priv *priv, u32 addr) 428static inline u32 iwl_read_targ_mem(struct iwl_priv *priv, u32 addr)
389{ 429{
390 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, addr); 430 unsigned long reg_flags;
431 u32 value;
432
433 spin_lock_irqsave(&priv->reg_lock, reg_flags);
434 iwl_grab_nic_access(priv);
435
436 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, addr);
391 rmb(); 437 rmb();
392 return iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 438 value = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
439
440 iwl_release_nic_access(priv);
441 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
442 return value;
393} 443}
394 444
395static inline void iwl_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val) 445static inline void iwl_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val)
396{ 446{
397 iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr); 447 unsigned long reg_flags;
398 wmb(); 448
399 iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, val); 449 spin_lock_irqsave(&priv->reg_lock, reg_flags);
450 if (!iwl_grab_nic_access(priv)) {
451 _iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr);
452 wmb();
453 _iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, val);
454 iwl_release_nic_access(priv);
455 }
456 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
400} 457}
401 458
402static inline void iwl_write_targ_mem_buf(struct iwl_priv *priv, u32 addr, 459static inline void iwl_write_targ_mem_buf(struct iwl_priv *priv, u32 addr,
403 u32 len, u32 *values) 460 u32 len, u32 *values)
404{ 461{
405 iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr); 462 unsigned long reg_flags;
406 wmb(); 463
407 for (; 0 < len; len -= sizeof(u32), values++) 464 spin_lock_irqsave(&priv->reg_lock, reg_flags);
408 iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, *values); 465 if (!iwl_grab_nic_access(priv)) {
466 _iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr);
467 wmb();
468 for (; 0 < len; len -= sizeof(u32), values++)
469 _iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, *values);
470
471 iwl_release_nic_access(priv);
472 }
473 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
409} 474}
410#endif 475#endif
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.c b/drivers/net/wireless/iwlwifi/iwl-power.c
index 47c894530eb5..f2ea3f05f6e1 100644
--- a/drivers/net/wireless/iwlwifi/iwl-power.c
+++ b/drivers/net/wireless/iwlwifi/iwl-power.c
@@ -41,38 +41,33 @@
41#include "iwl-power.h" 41#include "iwl-power.h"
42 42
43/* 43/*
44 * Setting power level allow the card to go to sleep when not busy 44 * Setting power level allow the card to go to sleep when not busy.
45 * there are three factor that decide the power level to go to, they
46 * are list here with its priority
47 * 1- critical_power_setting this will be set according to card temperature.
48 * 2- system_power_setting this will be set by system PM manager.
49 * 3- user_power_setting this will be set by user either by writing to sys or
50 * mac80211
51 * 45 *
52 * if system_power_setting and user_power_setting is set to auto 46 * The power level is set to INDEX_1 (the least deep state) by
53 * the power level will be decided according to association status and battery 47 * default, and will, in the future, be the deepest state unless
54 * status. 48 * otherwise required by pm_qos network latency requirements.
55 * 49 *
50 * Using INDEX_1 without pm_qos is ok because mac80211 will disable
51 * PS when even checking every beacon for the TIM bit would exceed
52 * the required latency.
56 */ 53 */
57 54
58#define MSEC_TO_USEC 1024
59#define IWL_POWER_RANGE_0_MAX (2) 55#define IWL_POWER_RANGE_0_MAX (2)
60#define IWL_POWER_RANGE_1_MAX (10) 56#define IWL_POWER_RANGE_1_MAX (10)
61 57
62 58
63 59#define NOSLP cpu_to_le16(0), 0, 0
64#define IWL_POWER_ON_BATTERY IWL_POWER_INDEX_5 60#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
65#define IWL_POWER_ON_AC_DISASSOC IWL_POWER_MODE_CAM 61#define TU_TO_USEC 1024
66#define IWL_POWER_ON_AC_ASSOC IWL_POWER_MODE_CAM 62#define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
67 63#define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
68 64 cpu_to_le32(X1), \
69#define IWL_CT_KILL_TEMPERATURE 110 65 cpu_to_le32(X2), \
70#define IWL_MIN_POWER_TEMPERATURE 100 66 cpu_to_le32(X3), \
71#define IWL_REDUCED_POWER_TEMPERATURE 95 67 cpu_to_le32(X4)}
72
73/* default power management (not Tx power) table values */ 68/* default power management (not Tx power) table values */
74/* for TIM 0-10 */ 69/* for DTIM period 0 through IWL_POWER_RANGE_0_MAX */
75static struct iwl_power_vec_entry range_0[IWL_POWER_MAX] = { 70static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
76 {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, 71 {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
77 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0}, 72 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
78 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0}, 73 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
@@ -82,8 +77,8 @@ static struct iwl_power_vec_entry range_0[IWL_POWER_MAX] = {
82}; 77};
83 78
84 79
85/* for TIM = 3-10 */ 80/* for DTIM period IWL_POWER_RANGE_0_MAX + 1 through IWL_POWER_RANGE_1_MAX */
86static struct iwl_power_vec_entry range_1[IWL_POWER_MAX] = { 81static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
87 {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, 82 {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
88 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0}, 83 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
89 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0}, 84 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
@@ -92,8 +87,8 @@ static struct iwl_power_vec_entry range_1[IWL_POWER_MAX] = {
92 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 7, 10, 10)}, 2} 87 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 7, 10, 10)}, 2}
93}; 88};
94 89
95/* for TIM > 11 */ 90/* for DTIM period > IWL_POWER_RANGE_1_MAX */
96static struct iwl_power_vec_entry range_2[IWL_POWER_MAX] = { 91static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
97 {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, 92 {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
98 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0}, 93 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
99 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0}, 94 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
@@ -106,39 +101,15 @@ static struct iwl_power_vec_entry range_2[IWL_POWER_MAX] = {
106/* set card power command */ 101/* set card power command */
107static int iwl_set_power(struct iwl_priv *priv, void *cmd) 102static int iwl_set_power(struct iwl_priv *priv, void *cmd)
108{ 103{
109 return iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD, 104 return iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
110 sizeof(struct iwl_powertable_cmd), 105 sizeof(struct iwl_powertable_cmd), cmd);
111 cmd, NULL);
112}
113/* decide the right power level according to association status
114 * and battery status
115 */
116static u16 iwl_get_auto_power_mode(struct iwl_priv *priv)
117{
118 u16 mode;
119
120 switch (priv->power_data.user_power_setting) {
121 case IWL_POWER_AUTO:
122 /* if running on battery */
123 if (priv->power_data.is_battery_active)
124 mode = IWL_POWER_ON_BATTERY;
125 else if (iwl_is_associated(priv))
126 mode = IWL_POWER_ON_AC_ASSOC;
127 else
128 mode = IWL_POWER_ON_AC_DISASSOC;
129 break;
130 default:
131 mode = priv->power_data.user_power_setting;
132 break;
133 }
134 return mode;
135} 106}
136 107
137/* initialize to default */ 108/* initialize to default */
138static void iwl_power_init_handle(struct iwl_priv *priv) 109static void iwl_power_init_handle(struct iwl_priv *priv)
139{ 110{
140 struct iwl_power_mgr *pow_data; 111 struct iwl_power_mgr *pow_data;
141 int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX; 112 int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_NUM;
142 struct iwl_powertable_cmd *cmd; 113 struct iwl_powertable_cmd *cmd;
143 int i; 114 int i;
144 u16 lctl; 115 u16 lctl;
@@ -157,7 +128,7 @@ static void iwl_power_init_handle(struct iwl_priv *priv)
157 128
158 IWL_DEBUG_POWER(priv, "adjust power command flags\n"); 129 IWL_DEBUG_POWER(priv, "adjust power command flags\n");
159 130
160 for (i = 0; i < IWL_POWER_MAX; i++) { 131 for (i = 0; i < IWL_POWER_NUM; i++) {
161 cmd = &pow_data->pwr_range_0[i].cmd; 132 cmd = &pow_data->pwr_range_0[i].cmd;
162 133
163 if (lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN) 134 if (lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN)
@@ -247,33 +218,12 @@ int iwl_power_update_mode(struct iwl_priv *priv, bool force)
247 update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE || 218 update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
248 priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE; 219 priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
249 220
250 /* If on battery, set to 3, 221 final_mode = priv->power_data.user_power_setting;
251 * if plugged into AC power, set to CAM ("continuously aware mode"),
252 * else user level */
253
254 switch (setting->system_power_setting) {
255 case IWL_POWER_SYS_AUTO:
256 final_mode = iwl_get_auto_power_mode(priv);
257 break;
258 case IWL_POWER_SYS_BATTERY:
259 final_mode = IWL_POWER_INDEX_3;
260 break;
261 case IWL_POWER_SYS_AC:
262 final_mode = IWL_POWER_MODE_CAM;
263 break;
264 default:
265 final_mode = IWL_POWER_INDEX_3;
266 WARN_ON(1);
267 }
268
269 if (setting->critical_power_setting > final_mode)
270 final_mode = setting->critical_power_setting;
271 222
272 /* driver only support CAM for non STA network */ 223 if (setting->power_disabled)
273 if (priv->iw_mode != NL80211_IFTYPE_STATION)
274 final_mode = IWL_POWER_MODE_CAM; 224 final_mode = IWL_POWER_MODE_CAM;
275 225
276 if (iwl_is_ready_rf(priv) && !setting->power_disabled && 226 if (iwl_is_ready_rf(priv) &&
277 ((setting->power_mode != final_mode) || force)) { 227 ((setting->power_mode != final_mode) || force)) {
278 struct iwl_powertable_cmd cmd; 228 struct iwl_powertable_cmd cmd;
279 229
@@ -290,8 +240,6 @@ int iwl_power_update_mode(struct iwl_priv *priv, bool force)
290 240
291 if (final_mode == IWL_POWER_MODE_CAM) 241 if (final_mode == IWL_POWER_MODE_CAM)
292 clear_bit(STATUS_POWER_PMI, &priv->status); 242 clear_bit(STATUS_POWER_PMI, &priv->status);
293 else
294 set_bit(STATUS_POWER_PMI, &priv->status);
295 243
296 if (priv->cfg->ops->lib->update_chain_flags && update_chains) 244 if (priv->cfg->ops->lib->update_chain_flags && update_chains)
297 priv->cfg->ops->lib->update_chain_flags(priv); 245 priv->cfg->ops->lib->update_chain_flags(priv);
@@ -307,51 +255,10 @@ int iwl_power_update_mode(struct iwl_priv *priv, bool force)
307} 255}
308EXPORT_SYMBOL(iwl_power_update_mode); 256EXPORT_SYMBOL(iwl_power_update_mode);
309 257
310/* Allow other iwl code to disable/enable power management active
311 * this will be useful for rate scale to disable PM during heavy
312 * Tx/Rx activities
313 */
314int iwl_power_disable_management(struct iwl_priv *priv, u32 ms)
315{
316 u16 prev_mode;
317 int ret = 0;
318
319 if (priv->power_data.power_disabled)
320 return -EBUSY;
321
322 prev_mode = priv->power_data.user_power_setting;
323 priv->power_data.user_power_setting = IWL_POWER_MODE_CAM;
324 ret = iwl_power_update_mode(priv, 0);
325 priv->power_data.power_disabled = 1;
326 priv->power_data.user_power_setting = prev_mode;
327 cancel_delayed_work(&priv->set_power_save);
328 if (ms)
329 queue_delayed_work(priv->workqueue, &priv->set_power_save,
330 msecs_to_jiffies(ms));
331
332
333 return ret;
334}
335EXPORT_SYMBOL(iwl_power_disable_management);
336
337/* Allow other iwl code to disable/enable power management active
338 * this will be useful for rate scale to disable PM during high
339 * volume activities
340 */
341int iwl_power_enable_management(struct iwl_priv *priv)
342{
343 int ret = 0;
344
345 priv->power_data.power_disabled = 0;
346 ret = iwl_power_update_mode(priv, 0);
347 return ret;
348}
349EXPORT_SYMBOL(iwl_power_enable_management);
350
351/* set user_power_setting */ 258/* set user_power_setting */
352int iwl_power_set_user_mode(struct iwl_priv *priv, u16 mode) 259int iwl_power_set_user_mode(struct iwl_priv *priv, u16 mode)
353{ 260{
354 if (mode > IWL_POWER_MAX) 261 if (mode >= IWL_POWER_NUM)
355 return -EINVAL; 262 return -EINVAL;
356 263
357 priv->power_data.user_power_setting = mode; 264 priv->power_data.user_power_setting = mode;
@@ -360,86 +267,12 @@ int iwl_power_set_user_mode(struct iwl_priv *priv, u16 mode)
360} 267}
361EXPORT_SYMBOL(iwl_power_set_user_mode); 268EXPORT_SYMBOL(iwl_power_set_user_mode);
362 269
363/* set system_power_setting. This should be set by over all
364 * PM application.
365 */
366int iwl_power_set_system_mode(struct iwl_priv *priv, u16 mode)
367{
368 if (mode < IWL_POWER_SYS_MAX)
369 priv->power_data.system_power_setting = mode;
370 else
371 return -EINVAL;
372 return iwl_power_update_mode(priv, 0);
373}
374EXPORT_SYMBOL(iwl_power_set_system_mode);
375
376/* initialize to default */ 270/* initialize to default */
377void iwl_power_initialize(struct iwl_priv *priv) 271void iwl_power_initialize(struct iwl_priv *priv)
378{ 272{
379 iwl_power_init_handle(priv); 273 iwl_power_init_handle(priv);
380 priv->power_data.user_power_setting = IWL_POWER_AUTO; 274 priv->power_data.user_power_setting = IWL_POWER_INDEX_1;
381 priv->power_data.system_power_setting = IWL_POWER_SYS_AUTO; 275 /* default to disabled until mac80211 says otherwise */
382 priv->power_data.power_disabled = 0; 276 priv->power_data.power_disabled = 1;
383 priv->power_data.is_battery_active = 0;
384 priv->power_data.critical_power_setting = 0;
385} 277}
386EXPORT_SYMBOL(iwl_power_initialize); 278EXPORT_SYMBOL(iwl_power_initialize);
387
388/* set critical_power_setting according to temperature value */
389int iwl_power_temperature_change(struct iwl_priv *priv)
390{
391 int ret = 0;
392 s32 temperature = KELVIN_TO_CELSIUS(priv->last_temperature);
393 u16 new_critical = priv->power_data.critical_power_setting;
394
395 if (temperature > IWL_CT_KILL_TEMPERATURE)
396 return 0;
397 else if (temperature > IWL_MIN_POWER_TEMPERATURE)
398 new_critical = IWL_POWER_INDEX_5;
399 else if (temperature > IWL_REDUCED_POWER_TEMPERATURE)
400 new_critical = IWL_POWER_INDEX_3;
401 else
402 new_critical = IWL_POWER_MODE_CAM;
403
404 if (new_critical != priv->power_data.critical_power_setting)
405 priv->power_data.critical_power_setting = new_critical;
406
407 if (priv->power_data.critical_power_setting >
408 priv->power_data.power_mode)
409 ret = iwl_power_update_mode(priv, 0);
410
411 return ret;
412}
413EXPORT_SYMBOL(iwl_power_temperature_change);
414
415static void iwl_bg_set_power_save(struct work_struct *work)
416{
417 struct iwl_priv *priv = container_of(work,
418 struct iwl_priv, set_power_save.work);
419 IWL_DEBUG_POWER(priv, "update power\n");
420
421 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
422 return;
423
424 mutex_lock(&priv->mutex);
425
426 /* on starting association we disable power management
427 * until association, if association failed then this
428 * timer will expire and enable PM again.
429 */
430 if (!iwl_is_associated(priv))
431 iwl_power_enable_management(priv);
432
433 mutex_unlock(&priv->mutex);
434}
435void iwl_setup_power_deferred_work(struct iwl_priv *priv)
436{
437 INIT_DELAYED_WORK(&priv->set_power_save, iwl_bg_set_power_save);
438}
439EXPORT_SYMBOL(iwl_setup_power_deferred_work);
440
441void iwl_power_cancel_timeout(struct iwl_priv *priv)
442{
443 cancel_delayed_work(&priv->set_power_save);
444}
445EXPORT_SYMBOL(iwl_power_cancel_timeout);
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.h b/drivers/net/wireless/iwlwifi/iwl-power.h
index 18963392121e..37ba3bb7a25a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-power.h
+++ b/drivers/net/wireless/iwlwifi/iwl-power.h
@@ -40,56 +40,29 @@ enum {
40 IWL_POWER_INDEX_3, 40 IWL_POWER_INDEX_3,
41 IWL_POWER_INDEX_4, 41 IWL_POWER_INDEX_4,
42 IWL_POWER_INDEX_5, 42 IWL_POWER_INDEX_5,
43 IWL_POWER_AUTO, 43 IWL_POWER_NUM
44 IWL_POWER_MAX = IWL_POWER_AUTO,
45}; 44};
46 45
47enum {
48 IWL_POWER_SYS_AUTO,
49 IWL_POWER_SYS_AC,
50 IWL_POWER_SYS_BATTERY,
51 IWL_POWER_SYS_MAX,
52};
53
54
55/* Power management (not Tx power) structures */ 46/* Power management (not Tx power) structures */
56 47
57#define NOSLP cpu_to_le16(0), 0, 0
58#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
59#define SLP_TOUT(T) cpu_to_le32((T) * MSEC_TO_USEC)
60#define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
61 cpu_to_le32(X1), \
62 cpu_to_le32(X2), \
63 cpu_to_le32(X3), \
64 cpu_to_le32(X4)}
65struct iwl_power_vec_entry { 48struct iwl_power_vec_entry {
66 struct iwl_powertable_cmd cmd; 49 struct iwl_powertable_cmd cmd;
67 u8 no_dtim; 50 u8 no_dtim;
68}; 51};
69 52
70struct iwl_power_mgr { 53struct iwl_power_mgr {
71 spinlock_t lock; 54 struct iwl_power_vec_entry pwr_range_0[IWL_POWER_NUM];
72 struct iwl_power_vec_entry pwr_range_0[IWL_POWER_MAX]; 55 struct iwl_power_vec_entry pwr_range_1[IWL_POWER_NUM];
73 struct iwl_power_vec_entry pwr_range_1[IWL_POWER_MAX]; 56 struct iwl_power_vec_entry pwr_range_2[IWL_POWER_NUM];
74 struct iwl_power_vec_entry pwr_range_2[IWL_POWER_MAX];
75 u32 dtim_period; 57 u32 dtim_period;
76 /* final power level that used to calculate final power command */ 58 /* final power level that used to calculate final power command */
77 u8 power_mode; 59 u8 power_mode;
78 u8 user_power_setting; /* set by user through mac80211 or sysfs */ 60 u8 user_power_setting; /* set by user through sysfs */
79 u8 system_power_setting; /* set by kernel system tools */ 61 u8 power_disabled; /* set by mac80211's CONF_PS */
80 u8 critical_power_setting; /* set if driver over heated */
81 u8 is_battery_active; /* DC/AC power */
82 u8 power_disabled; /* flag to disable using power saving level */
83}; 62};
84 63
85void iwl_setup_power_deferred_work(struct iwl_priv *priv);
86void iwl_power_cancel_timeout(struct iwl_priv *priv);
87int iwl_power_update_mode(struct iwl_priv *priv, bool force); 64int iwl_power_update_mode(struct iwl_priv *priv, bool force);
88int iwl_power_disable_management(struct iwl_priv *priv, u32 ms);
89int iwl_power_enable_management(struct iwl_priv *priv);
90int iwl_power_set_user_mode(struct iwl_priv *priv, u16 mode); 65int iwl_power_set_user_mode(struct iwl_priv *priv, u16 mode);
91int iwl_power_set_system_mode(struct iwl_priv *priv, u16 mode);
92void iwl_power_initialize(struct iwl_priv *priv); 66void iwl_power_initialize(struct iwl_priv *priv);
93int iwl_power_temperature_change(struct iwl_priv *priv);
94 67
95#endif /* __iwl_power_setting_h__ */ 68#endif /* __iwl_power_setting_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-rfkill.c b/drivers/net/wireless/iwlwifi/iwl-rfkill.c
index 2ad9faf1508a..65605ad44e4b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-rfkill.c
+++ b/drivers/net/wireless/iwlwifi/iwl-rfkill.c
@@ -91,7 +91,6 @@ int iwl_rfkill_init(struct iwl_priv *priv)
91 priv->rfkill->data = priv; 91 priv->rfkill->data = priv;
92 priv->rfkill->state = RFKILL_STATE_UNBLOCKED; 92 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
93 priv->rfkill->toggle_radio = iwl_rfkill_soft_rf_kill; 93 priv->rfkill->toggle_radio = iwl_rfkill_soft_rf_kill;
94 priv->rfkill->user_claim_unsupported = 1;
95 94
96 priv->rfkill->dev.class->suspend = NULL; 95 priv->rfkill->dev.class->suspend = NULL;
97 priv->rfkill->dev.class->resume = NULL; 96 priv->rfkill->dev.class->resume = NULL;
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c
index 8f65908f66f1..2b8d40b37a1c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-rx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-rx.c
@@ -145,18 +145,14 @@ int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
145 goto exit_unlock; 145 goto exit_unlock;
146 } 146 }
147 147
148 ret = iwl_grab_nic_access(priv); 148 q->write_actual = (q->write & ~0x7);
149 if (ret) 149 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
150 goto exit_unlock;
151
152 /* Device expects a multiple of 8 */
153 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write & ~0x7);
154 iwl_release_nic_access(priv);
155 150
156 /* Else device is assumed to be awake */ 151 /* Else device is assumed to be awake */
157 } else { 152 } else {
158 /* Device expects a multiple of 8 */ 153 /* Device expects a multiple of 8 */
159 iwl_write32(priv, rx_wrt_ptr_reg, q->write & ~0x7); 154 q->write_actual = (q->write & ~0x7);
155 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
160 } 156 }
161 157
162 q->need_update = 0; 158 q->need_update = 0;
@@ -218,7 +214,7 @@ int iwl_rx_queue_restock(struct iwl_priv *priv)
218 214
219 /* If we've added more space for the firmware to place data, tell it. 215 /* If we've added more space for the firmware to place data, tell it.
220 * Increment device's write pointer in multiples of 8. */ 216 * Increment device's write pointer in multiples of 8. */
221 if (write != (rxq->write & ~0x7)) { 217 if (rxq->write_actual != (rxq->write & ~0x7)) {
222 spin_lock_irqsave(&rxq->lock, flags); 218 spin_lock_irqsave(&rxq->lock, flags);
223 rxq->need_update = 1; 219 rxq->need_update = 1;
224 spin_unlock_irqrestore(&rxq->lock, flags); 220 spin_unlock_irqrestore(&rxq->lock, flags);
@@ -238,7 +234,7 @@ EXPORT_SYMBOL(iwl_rx_queue_restock);
238 * Also restock the Rx queue via iwl_rx_queue_restock. 234 * Also restock the Rx queue via iwl_rx_queue_restock.
239 * This is called as a scheduled work item (except for during initialization) 235 * This is called as a scheduled work item (except for during initialization)
240 */ 236 */
241void iwl_rx_allocate(struct iwl_priv *priv) 237void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
242{ 238{
243 struct iwl_rx_queue *rxq = &priv->rxq; 239 struct iwl_rx_queue *rxq = &priv->rxq;
244 struct list_head *element; 240 struct list_head *element;
@@ -260,7 +256,8 @@ void iwl_rx_allocate(struct iwl_priv *priv)
260 256
261 /* Alloc a new receive buffer */ 257 /* Alloc a new receive buffer */
262 rxb->skb = alloc_skb(priv->hw_params.rx_buf_size + 256, 258 rxb->skb = alloc_skb(priv->hw_params.rx_buf_size + 256,
263 GFP_KERNEL); 259 priority);
260
264 if (!rxb->skb) { 261 if (!rxb->skb) {
265 IWL_CRIT(priv, "Can not allocate SKB buffers\n"); 262 IWL_CRIT(priv, "Can not allocate SKB buffers\n");
266 /* We don't reschedule replenish work here -- we will 263 /* We don't reschedule replenish work here -- we will
@@ -295,7 +292,7 @@ void iwl_rx_replenish(struct iwl_priv *priv)
295{ 292{
296 unsigned long flags; 293 unsigned long flags;
297 294
298 iwl_rx_allocate(priv); 295 iwl_rx_allocate(priv, GFP_KERNEL);
299 296
300 spin_lock_irqsave(&priv->lock, flags); 297 spin_lock_irqsave(&priv->lock, flags);
301 iwl_rx_queue_restock(priv); 298 iwl_rx_queue_restock(priv);
@@ -303,6 +300,14 @@ void iwl_rx_replenish(struct iwl_priv *priv)
303} 300}
304EXPORT_SYMBOL(iwl_rx_replenish); 301EXPORT_SYMBOL(iwl_rx_replenish);
305 302
303void iwl_rx_replenish_now(struct iwl_priv *priv)
304{
305 iwl_rx_allocate(priv, GFP_ATOMIC);
306
307 iwl_rx_queue_restock(priv);
308}
309EXPORT_SYMBOL(iwl_rx_replenish_now);
310
306 311
307/* Assumes that the skb field of the buffers in 'pool' is kept accurate. 312/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
308 * If an SKB has been detached, the POOL needs to have its SKB set to NULL 313 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
@@ -358,6 +363,7 @@ int iwl_rx_queue_alloc(struct iwl_priv *priv)
358 /* Set us so that we have processed and used all buffers, but have 363 /* Set us so that we have processed and used all buffers, but have
359 * not restocked the Rx queue with fresh buffers */ 364 * not restocked the Rx queue with fresh buffers */
360 rxq->read = rxq->write = 0; 365 rxq->read = rxq->write = 0;
366 rxq->write_actual = 0;
361 rxq->free_count = 0; 367 rxq->free_count = 0;
362 rxq->need_update = 0; 368 rxq->need_update = 0;
363 return 0; 369 return 0;
@@ -396,6 +402,7 @@ void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
396 /* Set us so that we have processed and used all buffers, but have 402 /* Set us so that we have processed and used all buffers, but have
397 * not restocked the Rx queue with fresh buffers */ 403 * not restocked the Rx queue with fresh buffers */
398 rxq->read = rxq->write = 0; 404 rxq->read = rxq->write = 0;
405 rxq->write_actual = 0;
399 rxq->free_count = 0; 406 rxq->free_count = 0;
400 spin_unlock_irqrestore(&rxq->lock, flags); 407 spin_unlock_irqrestore(&rxq->lock, flags);
401} 408}
@@ -403,18 +410,12 @@ EXPORT_SYMBOL(iwl_rx_queue_reset);
403 410
404int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq) 411int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
405{ 412{
406 int ret;
407 unsigned long flags;
408 u32 rb_size; 413 u32 rb_size;
409 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */ 414 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
410 const u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT why this stalls RX */ 415 u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
411 416
412 spin_lock_irqsave(&priv->lock, flags); 417 if (!priv->cfg->use_isr_legacy)
413 ret = iwl_grab_nic_access(priv); 418 rb_timeout = RX_RB_TIMEOUT;
414 if (ret) {
415 spin_unlock_irqrestore(&priv->lock, flags);
416 return ret;
417 }
418 419
419 if (priv->cfg->mod_params->amsdu_size_8K) 420 if (priv->cfg->mod_params->amsdu_size_8K)
420 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K; 421 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
@@ -452,35 +453,19 @@ int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
452 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)| 453 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
453 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS)); 454 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
454 455
455 iwl_release_nic_access(priv);
456
457 iwl_write32(priv, CSR_INT_COALESCING, 0x40); 456 iwl_write32(priv, CSR_INT_COALESCING, 0x40);
458 457
459 spin_unlock_irqrestore(&priv->lock, flags);
460
461 return 0; 458 return 0;
462} 459}
463 460
464int iwl_rxq_stop(struct iwl_priv *priv) 461int iwl_rxq_stop(struct iwl_priv *priv)
465{ 462{
466 int ret;
467 unsigned long flags;
468
469 spin_lock_irqsave(&priv->lock, flags);
470 ret = iwl_grab_nic_access(priv);
471 if (unlikely(ret)) {
472 spin_unlock_irqrestore(&priv->lock, flags);
473 return ret;
474 }
475 463
476 /* stop Rx DMA */ 464 /* stop Rx DMA */
477 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); 465 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
478 iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG, 466 iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
479 FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000); 467 FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
480 468
481 iwl_release_nic_access(priv);
482 spin_unlock_irqrestore(&priv->lock, flags);
483
484 return 0; 469 return 0;
485} 470}
486EXPORT_SYMBOL(iwl_rxq_stop); 471EXPORT_SYMBOL(iwl_rxq_stop);
@@ -582,8 +567,8 @@ void iwl_rx_statistics(struct iwl_priv *priv,
582 567
583 iwl_leds_background(priv); 568 iwl_leds_background(priv);
584 569
585 if (priv->cfg->ops->lib->temperature && change) 570 if (priv->cfg->ops->lib->temp_ops.temperature && change)
586 priv->cfg->ops->lib->temperature(priv); 571 priv->cfg->ops->lib->temp_ops.temperature(priv);
587} 572}
588EXPORT_SYMBOL(iwl_rx_statistics); 573EXPORT_SYMBOL(iwl_rx_statistics);
589 574
@@ -1102,13 +1087,6 @@ void iwl_rx_reply_rx(struct iwl_priv *priv,
1102 if (rx_start->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK) 1087 if (rx_start->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1103 rx_status.flag |= RX_FLAG_SHORTPRE; 1088 rx_status.flag |= RX_FLAG_SHORTPRE;
1104 1089
1105 /* Take shortcut when only in monitor mode */
1106 if (priv->iw_mode == NL80211_IFTYPE_MONITOR) {
1107 iwl_pass_packet_to_mac80211(priv, include_phy,
1108 rxb, &rx_status);
1109 return;
1110 }
1111
1112 network_packet = iwl_is_network_packet(priv, header); 1090 network_packet = iwl_is_network_packet(priv, header);
1113 if (network_packet) { 1091 if (network_packet) {
1114 priv->last_rx_rssi = rx_status.signal; 1092 priv->last_rx_rssi = rx_status.signal;
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c
index 6330b91e37ce..e26875dbe859 100644
--- a/drivers/net/wireless/iwlwifi/iwl-scan.c
+++ b/drivers/net/wireless/iwlwifi/iwl-scan.c
@@ -445,13 +445,6 @@ int iwl_mac_hw_scan(struct ieee80211_hw *hw,
445 unsigned long flags; 445 unsigned long flags;
446 struct iwl_priv *priv = hw->priv; 446 struct iwl_priv *priv = hw->priv;
447 int ret; 447 int ret;
448 u8 *ssid = NULL;
449 size_t ssid_len = 0;
450
451 if (req->n_ssids) {
452 ssid = req->ssids[0].ssid;
453 ssid_len = req->ssids[0].ssid_len;
454 }
455 448
456 IWL_DEBUG_MAC80211(priv, "enter\n"); 449 IWL_DEBUG_MAC80211(priv, "enter\n");
457 450
@@ -485,13 +478,7 @@ int iwl_mac_hw_scan(struct ieee80211_hw *hw,
485 goto out_unlock; 478 goto out_unlock;
486 } 479 }
487 480
488 if (ssid_len) { 481 priv->scan_request = req;
489 priv->one_direct_scan = 1;
490 priv->direct_ssid_len = ssid_len;
491 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
492 } else {
493 priv->one_direct_scan = 0;
494 }
495 482
496 ret = iwl_scan_initiate(priv); 483 ret = iwl_scan_initiate(priv);
497 484
@@ -530,73 +517,14 @@ void iwl_bg_scan_check(struct work_struct *data)
530EXPORT_SYMBOL(iwl_bg_scan_check); 517EXPORT_SYMBOL(iwl_bg_scan_check);
531 518
532/** 519/**
533 * iwl_supported_rate_to_ie - fill in the supported rate in IE field
534 *
535 * return : set the bit for each supported rate insert in ie
536 */
537static u16 iwl_supported_rate_to_ie(u8 *ie, u16 supported_rate,
538 u16 basic_rate, int *left)
539{
540 u16 ret_rates = 0, bit;
541 int i;
542 u8 *cnt = ie;
543 u8 *rates = ie + 1;
544
545 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
546 if (bit & supported_rate) {
547 ret_rates |= bit;
548 rates[*cnt] = iwl_rates[i].ieee |
549 ((bit & basic_rate) ? 0x80 : 0x00);
550 (*cnt)++;
551 (*left)--;
552 if ((*left <= 0) ||
553 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
554 break;
555 }
556 }
557
558 return ret_rates;
559}
560
561
562static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband,
563 u8 *pos, int *left)
564{
565 struct ieee80211_ht_cap *ht_cap;
566
567 if (!sband || !sband->ht_cap.ht_supported)
568 return;
569
570 if (*left < sizeof(struct ieee80211_ht_cap))
571 return;
572
573 *pos++ = sizeof(struct ieee80211_ht_cap);
574 ht_cap = (struct ieee80211_ht_cap *) pos;
575
576 ht_cap->cap_info = cpu_to_le16(sband->ht_cap.cap);
577 memcpy(&ht_cap->mcs, &sband->ht_cap.mcs, 16);
578 ht_cap->ampdu_params_info =
579 (sband->ht_cap.ampdu_factor & IEEE80211_HT_AMPDU_PARM_FACTOR) |
580 ((sband->ht_cap.ampdu_density << 2) &
581 IEEE80211_HT_AMPDU_PARM_DENSITY);
582 *left -= sizeof(struct ieee80211_ht_cap);
583}
584
585/**
586 * iwl_fill_probe_req - fill in all required fields and IE for probe request 520 * iwl_fill_probe_req - fill in all required fields and IE for probe request
587 */ 521 */
588 522
589u16 iwl_fill_probe_req(struct iwl_priv *priv, 523u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame,
590 enum ieee80211_band band, 524 const u8 *ies, int ie_len, int left)
591 struct ieee80211_mgmt *frame,
592 int left)
593{ 525{
594 int len = 0; 526 int len = 0;
595 u8 *pos = NULL; 527 u8 *pos = NULL;
596 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
597 const struct ieee80211_supported_band *sband =
598 iwl_get_hw_mode(priv, band);
599
600 528
601 /* Make sure there is enough space for the probe request, 529 /* Make sure there is enough space for the probe request,
602 * two mandatory IEs and the data */ 530 * two mandatory IEs and the data */
@@ -624,62 +552,12 @@ u16 iwl_fill_probe_req(struct iwl_priv *priv,
624 552
625 len += 2; 553 len += 2;
626 554
627 /* fill in supported rate */ 555 if (WARN_ON(left < ie_len))
628 left -= 2; 556 return len;
629 if (left < 0)
630 return 0;
631
632 *pos++ = WLAN_EID_SUPP_RATES;
633 *pos = 0;
634
635 /* exclude 60M rate */
636 active_rates = priv->rates_mask;
637 active_rates &= ~IWL_RATE_60M_MASK;
638
639 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
640
641 cck_rates = IWL_CCK_RATES_MASK & active_rates;
642 ret_rates = iwl_supported_rate_to_ie(pos, cck_rates,
643 active_rate_basic, &left);
644 active_rates &= ~ret_rates;
645
646 ret_rates = iwl_supported_rate_to_ie(pos, active_rates,
647 active_rate_basic, &left);
648 active_rates &= ~ret_rates;
649
650 len += 2 + *pos;
651 pos += (*pos) + 1;
652 557
653 if (active_rates == 0) 558 memcpy(pos, ies, ie_len);
654 goto fill_end; 559 len += ie_len;
655 560 left -= ie_len;
656 /* fill in supported extended rate */
657 /* ...next IE... */
658 left -= 2;
659 if (left < 0)
660 return 0;
661 /* ... fill it in... */
662 *pos++ = WLAN_EID_EXT_SUPP_RATES;
663 *pos = 0;
664 iwl_supported_rate_to_ie(pos, active_rates, active_rate_basic, &left);
665 if (*pos > 0) {
666 len += 2 + *pos;
667 pos += (*pos) + 1;
668 } else {
669 pos--;
670 }
671
672 fill_end:
673
674 left -= 2;
675 if (left < 0)
676 return 0;
677
678 *pos++ = WLAN_EID_HT_CAPABILITY;
679 *pos = 0;
680 iwl_ht_cap_to_ie(sband, pos, &left);
681 if (*pos > 0)
682 len += 2 + *pos;
683 561
684 return (u16)len; 562 return (u16)len;
685} 563}
@@ -699,11 +577,13 @@ static void iwl_bg_request_scan(struct work_struct *data)
699 int ret = 0; 577 int ret = 0;
700 u32 rate_flags = 0; 578 u32 rate_flags = 0;
701 u16 cmd_len; 579 u16 cmd_len;
580 u16 rx_chain = 0;
702 enum ieee80211_band band; 581 enum ieee80211_band band;
703 u8 n_probes = 2; 582 u8 n_probes = 0;
704 u8 rx_chain = priv->hw_params.valid_rx_ant; 583 u8 rx_ant = priv->hw_params.valid_rx_ant;
705 u8 rate; 584 u8 rate;
706 DECLARE_SSID_BUF(ssid); 585 bool is_active = false;
586 int chan_mod;
707 587
708 conf = ieee80211_get_hw_conf(priv->hw); 588 conf = ieee80211_get_hw_conf(priv->hw);
709 589
@@ -795,19 +675,25 @@ static void iwl_bg_request_scan(struct work_struct *data)
795 scan_suspend_time, interval); 675 scan_suspend_time, interval);
796 } 676 }
797 677
798 /* We should add the ability for user to lock to PASSIVE ONLY */ 678 if (priv->scan_request->n_ssids) {
799 if (priv->one_direct_scan) { 679 int i, p = 0;
800 IWL_DEBUG_SCAN(priv, "Start direct scan for '%s'\n", 680 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
801 print_ssid(ssid, priv->direct_ssid, 681 for (i = 0; i < priv->scan_request->n_ssids; i++) {
802 priv->direct_ssid_len)); 682 /* always does wildcard anyway */
803 scan->direct_scan[0].id = WLAN_EID_SSID; 683 if (!priv->scan_request->ssids[i].ssid_len)
804 scan->direct_scan[0].len = priv->direct_ssid_len; 684 continue;
805 memcpy(scan->direct_scan[0].ssid, 685 scan->direct_scan[p].id = WLAN_EID_SSID;
806 priv->direct_ssid, priv->direct_ssid_len); 686 scan->direct_scan[p].len =
807 n_probes++; 687 priv->scan_request->ssids[i].ssid_len;
808 } else { 688 memcpy(scan->direct_scan[p].ssid,
809 IWL_DEBUG_SCAN(priv, "Start indirect scan.\n"); 689 priv->scan_request->ssids[i].ssid,
810 } 690 priv->scan_request->ssids[i].ssid_len);
691 n_probes++;
692 p++;
693 }
694 is_active = true;
695 } else
696 IWL_DEBUG_SCAN(priv, "Start passive scan.\n");
811 697
812 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; 698 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
813 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id; 699 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
@@ -817,7 +703,9 @@ static void iwl_bg_request_scan(struct work_struct *data)
817 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) { 703 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
818 band = IEEE80211_BAND_2GHZ; 704 band = IEEE80211_BAND_2GHZ;
819 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; 705 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
820 if (priv->active_rxon.flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) { 706 chan_mod = le32_to_cpu(priv->active_rxon.flags & RXON_FLG_CHANNEL_MODE_MSK)
707 >> RXON_FLG_CHANNEL_MODE_POS;
708 if (chan_mod == CHANNEL_MODE_PURE_40) {
821 rate = IWL_RATE_6M_PLCP; 709 rate = IWL_RATE_6M_PLCP;
822 } else { 710 } else {
823 rate = IWL_RATE_1M_PLCP; 711 rate = IWL_RATE_1M_PLCP;
@@ -827,13 +715,18 @@ static void iwl_bg_request_scan(struct work_struct *data)
827 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) { 715 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
828 band = IEEE80211_BAND_5GHZ; 716 band = IEEE80211_BAND_5GHZ;
829 rate = IWL_RATE_6M_PLCP; 717 rate = IWL_RATE_6M_PLCP;
830 scan->good_CRC_th = IWL_GOOD_CRC_TH; 718 /*
719 * If active scaning is requested but a certain channel
720 * is marked passive, we can do active scanning if we
721 * detect transmissions.
722 */
723 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
831 724
832 /* Force use of chains B and C (0x6) for scan Rx for 4965 725 /* Force use of chains B and C (0x6) for scan Rx for 4965
833 * Avoid A (0x1) because of its off-channel reception on A-band. 726 * Avoid A (0x1) because of its off-channel reception on A-band.
834 */ 727 */
835 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965) 728 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)
836 rx_chain = 0x6; 729 rx_ant = ANT_BC;
837 } else { 730 } else {
838 IWL_WARN(priv, "Invalid scan band count\n"); 731 IWL_WARN(priv, "Invalid scan band count\n");
839 goto done; 732 goto done;
@@ -845,26 +738,27 @@ static void iwl_bg_request_scan(struct work_struct *data)
845 scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags); 738 scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags);
846 739
847 /* MIMO is not used here, but value is required */ 740 /* MIMO is not used here, but value is required */
848 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK | 741 rx_chain |= ANT_ABC << RXON_RX_CHAIN_VALID_POS;
849 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) | 742 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
850 (rx_chain << RXON_RX_CHAIN_FORCE_SEL_POS) | 743 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
851 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS)); 744 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
852 745 scan->rx_chain = cpu_to_le16(rx_chain);
853 cmd_len = iwl_fill_probe_req(priv, band, 746 cmd_len = iwl_fill_probe_req(priv,
854 (struct ieee80211_mgmt *)scan->data, 747 (struct ieee80211_mgmt *)scan->data,
855 IWL_MAX_SCAN_SIZE - sizeof(*scan)); 748 priv->scan_request->ie,
749 priv->scan_request->ie_len,
750 IWL_MAX_SCAN_SIZE - sizeof(*scan));
856 751
857 scan->tx_cmd.len = cpu_to_le16(cmd_len); 752 scan->tx_cmd.len = cpu_to_le16(cmd_len);
858 753
859 if (priv->iw_mode == NL80211_IFTYPE_MONITOR) 754 if (iwl_is_monitor_mode(priv))
860 scan->filter_flags = RXON_FILTER_PROMISC_MSK; 755 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
861 756
862 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK | 757 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
863 RXON_FILTER_BCON_AWARE_MSK); 758 RXON_FILTER_BCON_AWARE_MSK);
864 759
865 scan->channel_count = 760 scan->channel_count =
866 iwl_get_channels_for_scan(priv, band, 1, /* active */ 761 iwl_get_channels_for_scan(priv, band, is_active, n_probes,
867 n_probes,
868 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); 762 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
869 763
870 if (scan->channel_count == 0) { 764 if (scan->channel_count == 0) {
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c
index 44ab03a12e40..0eb939c40ac1 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.c
@@ -75,7 +75,7 @@ int iwl_get_ra_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
75 return IWL_AP_ID; 75 return IWL_AP_ID;
76 } else { 76 } else {
77 u8 *da = ieee80211_get_DA(hdr); 77 u8 *da = ieee80211_get_DA(hdr);
78 return iwl_find_station(priv, da); 78 return priv->cfg->ops->smgmt->find_station(priv, da);
79 } 79 }
80} 80}
81EXPORT_SYMBOL(iwl_get_ra_sta_id); 81EXPORT_SYMBOL(iwl_get_ra_sta_id);
@@ -300,7 +300,7 @@ EXPORT_SYMBOL(iwl_add_station_flags);
300static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, const char *addr) 300static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, const char *addr)
301{ 301{
302 unsigned long flags; 302 unsigned long flags;
303 u8 sta_id = iwl_find_station(priv, addr); 303 u8 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
304 304
305 BUG_ON(sta_id == IWL_INVALID_STATION); 305 BUG_ON(sta_id == IWL_INVALID_STATION);
306 306
@@ -490,7 +490,7 @@ void iwl_clear_stations_table(struct iwl_priv *priv)
490 /* keep track of static keys */ 490 /* keep track of static keys */
491 for (i = 0; i < WEP_KEYS_MAX ; i++) { 491 for (i = 0; i < WEP_KEYS_MAX ; i++) {
492 if (priv->wep_keys[i].key_size) 492 if (priv->wep_keys[i].key_size)
493 test_and_set_bit(i, &priv->ucode_key_table); 493 set_bit(i, &priv->ucode_key_table);
494 } 494 }
495 495
496 spin_unlock_irqrestore(&priv->sta_lock, flags); 496 spin_unlock_irqrestore(&priv->sta_lock, flags);
@@ -767,7 +767,7 @@ void iwl_update_tkip_key(struct iwl_priv *priv,
767 unsigned long flags; 767 unsigned long flags;
768 int i; 768 int i;
769 769
770 sta_id = iwl_find_station(priv, addr); 770 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
771 if (sta_id == IWL_INVALID_STATION) { 771 if (sta_id == IWL_INVALID_STATION) {
772 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n", 772 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
773 addr); 773 addr);
@@ -1020,7 +1020,7 @@ int iwl_rxon_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
1020 rcu_read_unlock(); 1020 rcu_read_unlock();
1021 } 1021 }
1022 1022
1023 sta_id = iwl_add_station_flags(priv, addr, is_ap, 1023 sta_id = priv->cfg->ops->smgmt->add_station(priv, addr, is_ap,
1024 0, cur_ht_config); 1024 0, cur_ht_config);
1025 1025
1026 /* Set up default rate scaling table in device's station table */ 1026 /* Set up default rate scaling table in device's station table */
@@ -1054,7 +1054,7 @@ int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
1054 1054
1055 /* If we are an AP, then find the station, or use BCAST */ 1055 /* If we are an AP, then find the station, or use BCAST */
1056 case NL80211_IFTYPE_AP: 1056 case NL80211_IFTYPE_AP:
1057 sta_id = iwl_find_station(priv, hdr->addr1); 1057 sta_id = priv->cfg->ops->smgmt->find_station(priv, hdr->addr1);
1058 if (sta_id != IWL_INVALID_STATION) 1058 if (sta_id != IWL_INVALID_STATION)
1059 return sta_id; 1059 return sta_id;
1060 return priv->hw_params.bcast_sta_id; 1060 return priv->hw_params.bcast_sta_id;
@@ -1062,12 +1062,12 @@ int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
1062 /* If this frame is going out to an IBSS network, find the station, 1062 /* If this frame is going out to an IBSS network, find the station,
1063 * or create a new station table entry */ 1063 * or create a new station table entry */
1064 case NL80211_IFTYPE_ADHOC: 1064 case NL80211_IFTYPE_ADHOC:
1065 sta_id = iwl_find_station(priv, hdr->addr1); 1065 sta_id = priv->cfg->ops->smgmt->find_station(priv, hdr->addr1);
1066 if (sta_id != IWL_INVALID_STATION) 1066 if (sta_id != IWL_INVALID_STATION)
1067 return sta_id; 1067 return sta_id;
1068 1068
1069 /* Create new station table entry */ 1069 /* Create new station table entry */
1070 sta_id = iwl_add_station_flags(priv, hdr->addr1, 1070 sta_id = priv->cfg->ops->smgmt->add_station(priv, hdr->addr1,
1071 0, CMD_ASYNC, NULL); 1071 0, CMD_ASYNC, NULL);
1072 1072
1073 if (sta_id != IWL_INVALID_STATION) 1073 if (sta_id != IWL_INVALID_STATION)
@@ -1079,11 +1079,6 @@ int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
1079 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr)); 1079 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
1080 return priv->hw_params.bcast_sta_id; 1080 return priv->hw_params.bcast_sta_id;
1081 1081
1082 /* If we are in monitor mode, use BCAST. This is required for
1083 * packet injection. */
1084 case NL80211_IFTYPE_MONITOR:
1085 return priv->hw_params.bcast_sta_id;
1086
1087 default: 1082 default:
1088 IWL_WARN(priv, "Unknown mode of operation: %d\n", 1083 IWL_WARN(priv, "Unknown mode of operation: %d\n",
1089 priv->iw_mode); 1084 priv->iw_mode);
@@ -1116,7 +1111,7 @@ int iwl_sta_rx_agg_start(struct iwl_priv *priv,
1116 unsigned long flags; 1111 unsigned long flags;
1117 int sta_id; 1112 int sta_id;
1118 1113
1119 sta_id = iwl_find_station(priv, addr); 1114 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
1120 if (sta_id == IWL_INVALID_STATION) 1115 if (sta_id == IWL_INVALID_STATION)
1121 return -ENXIO; 1116 return -ENXIO;
1122 1117
@@ -1138,7 +1133,7 @@ int iwl_sta_rx_agg_stop(struct iwl_priv *priv, const u8 *addr, int tid)
1138 unsigned long flags; 1133 unsigned long flags;
1139 int sta_id; 1134 int sta_id;
1140 1135
1141 sta_id = iwl_find_station(priv, addr); 1136 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
1142 if (sta_id == IWL_INVALID_STATION) { 1137 if (sta_id == IWL_INVALID_STATION) {
1143 IWL_ERR(priv, "Invalid station for AGG tid %d\n", tid); 1138 IWL_ERR(priv, "Invalid station for AGG tid %d\n", tid);
1144 return -ENXIO; 1139 return -ENXIO;
@@ -1173,7 +1168,7 @@ static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
1173void iwl_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr) 1168void iwl_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
1174{ 1169{
1175 /* FIXME: need locking over ps_status ??? */ 1170 /* FIXME: need locking over ps_status ??? */
1176 u8 sta_id = iwl_find_station(priv, addr); 1171 u8 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
1177 1172
1178 if (sta_id != IWL_INVALID_STATION) { 1173 if (sta_id != IWL_INVALID_STATION) {
1179 u8 sta_awake = priv->stations[sta_id]. 1174 u8 sta_awake = priv->stations[sta_id].
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c
index 71d5b8a1a73e..85ae7a62109c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-tx.c
@@ -102,13 +102,8 @@ int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq)
102 return ret; 102 return ret;
103 } 103 }
104 104
105 /* restore this queue's parameters in nic hardware. */
106 ret = iwl_grab_nic_access(priv);
107 if (ret)
108 return ret;
109 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 105 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
110 txq->q.write_ptr | (txq_id << 8)); 106 txq->q.write_ptr | (txq_id << 8));
111 iwl_release_nic_access(priv);
112 107
113 /* else not in power-save mode, uCode will never sleep when we're 108 /* else not in power-save mode, uCode will never sleep when we're
114 * trying to tx (during RFKILL, we're not trying to tx). */ 109 * trying to tx (during RFKILL, we're not trying to tx). */
@@ -429,11 +424,6 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv)
429 goto error_kw; 424 goto error_kw;
430 } 425 }
431 spin_lock_irqsave(&priv->lock, flags); 426 spin_lock_irqsave(&priv->lock, flags);
432 ret = iwl_grab_nic_access(priv);
433 if (unlikely(ret)) {
434 spin_unlock_irqrestore(&priv->lock, flags);
435 goto error_reset;
436 }
437 427
438 /* Turn off all Tx DMA fifos */ 428 /* Turn off all Tx DMA fifos */
439 priv->cfg->ops->lib->txq_set_sched(priv, 0); 429 priv->cfg->ops->lib->txq_set_sched(priv, 0);
@@ -441,7 +431,6 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv)
441 /* Tell NIC where to find the "keep warm" buffer */ 431 /* Tell NIC where to find the "keep warm" buffer */
442 iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4); 432 iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4);
443 433
444 iwl_release_nic_access(priv);
445 spin_unlock_irqrestore(&priv->lock, flags); 434 spin_unlock_irqrestore(&priv->lock, flags);
446 435
447 /* Alloc and init all Tx queues, including the command queue (#4) */ 436 /* Alloc and init all Tx queues, including the command queue (#4) */
@@ -460,7 +449,6 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv)
460 449
461 error: 450 error:
462 iwl_hw_txq_ctx_free(priv); 451 iwl_hw_txq_ctx_free(priv);
463 error_reset:
464 iwl_free_dma_ptr(priv, &priv->kw); 452 iwl_free_dma_ptr(priv, &priv->kw);
465 error_kw: 453 error_kw:
466 iwl_free_dma_ptr(priv, &priv->scd_bc_tbls); 454 iwl_free_dma_ptr(priv, &priv->scd_bc_tbls);
@@ -478,10 +466,6 @@ void iwl_txq_ctx_stop(struct iwl_priv *priv)
478 466
479 /* Turn off all Tx DMA fifos */ 467 /* Turn off all Tx DMA fifos */
480 spin_lock_irqsave(&priv->lock, flags); 468 spin_lock_irqsave(&priv->lock, flags);
481 if (iwl_grab_nic_access(priv)) {
482 spin_unlock_irqrestore(&priv->lock, flags);
483 return;
484 }
485 469
486 priv->cfg->ops->lib->txq_set_sched(priv, 0); 470 priv->cfg->ops->lib->txq_set_sched(priv, 0);
487 471
@@ -492,7 +476,6 @@ void iwl_txq_ctx_stop(struct iwl_priv *priv)
492 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch), 476 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
493 1000); 477 1000);
494 } 478 }
495 iwl_release_nic_access(priv);
496 spin_unlock_irqrestore(&priv->lock, flags); 479 spin_unlock_irqrestore(&priv->lock, flags);
497 480
498 /* Deallocate memory for all Tx queues */ 481 /* Deallocate memory for all Tx queues */
@@ -728,7 +711,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
728 711
729 /* drop all data frame if we are not associated */ 712 /* drop all data frame if we are not associated */
730 if (ieee80211_is_data(fc) && 713 if (ieee80211_is_data(fc) &&
731 (priv->iw_mode != NL80211_IFTYPE_MONITOR || 714 (!iwl_is_monitor_mode(priv) ||
732 !(info->flags & IEEE80211_TX_CTL_INJECTED)) && /* packet injection */ 715 !(info->flags & IEEE80211_TX_CTL_INJECTED)) && /* packet injection */
733 (!iwl_is_associated(priv) || 716 (!iwl_is_associated(priv) ||
734 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id) || 717 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id) ||
@@ -1183,8 +1166,10 @@ int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn)
1183 __func__, ra, tid); 1166 __func__, ra, tid);
1184 1167
1185 sta_id = iwl_find_station(priv, ra); 1168 sta_id = iwl_find_station(priv, ra);
1186 if (sta_id == IWL_INVALID_STATION) 1169 if (sta_id == IWL_INVALID_STATION) {
1170 IWL_ERR(priv, "Start AGG on invalid station\n");
1187 return -ENXIO; 1171 return -ENXIO;
1172 }
1188 1173
1189 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) { 1174 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
1190 IWL_ERR(priv, "Start AGG when state is not IWL_AGG_OFF !\n"); 1175 IWL_ERR(priv, "Start AGG when state is not IWL_AGG_OFF !\n");
@@ -1192,8 +1177,10 @@ int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn)
1192 } 1177 }
1193 1178
1194 txq_id = iwl_txq_ctx_activate_free(priv); 1179 txq_id = iwl_txq_ctx_activate_free(priv);
1195 if (txq_id == -1) 1180 if (txq_id == -1) {
1181 IWL_ERR(priv, "No free aggregation queue available\n");
1196 return -ENXIO; 1182 return -ENXIO;
1183 }
1197 1184
1198 spin_lock_irqsave(&priv->sta_lock, flags); 1185 spin_lock_irqsave(&priv->sta_lock, flags);
1199 tid_data = &priv->stations[sta_id].tid[tid]; 1186 tid_data = &priv->stations[sta_id].tid[tid];
@@ -1207,7 +1194,7 @@ int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn)
1207 return ret; 1194 return ret;
1208 1195
1209 if (tid_data->tfds_in_queue == 0) { 1196 if (tid_data->tfds_in_queue == 0) {
1210 IWL_ERR(priv, "HW queue is empty\n"); 1197 IWL_DEBUG_HT(priv, "HW queue is empty\n");
1211 tid_data->agg.state = IWL_AGG_ON; 1198 tid_data->agg.state = IWL_AGG_ON;
1212 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, ra, tid); 1199 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, ra, tid);
1213 } else { 1200 } else {
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index ff4d0e41d7c4..5c10b87d0336 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -149,7 +149,7 @@ out:
149 * 149 *
150 * NOTE: This does not clear or otherwise alter the device's station table. 150 * NOTE: This does not clear or otherwise alter the device's station table.
151 */ 151 */
152static void iwl3945_clear_stations_table(struct iwl_priv *priv) 152void iwl3945_clear_stations_table(struct iwl_priv *priv)
153{ 153{
154 unsigned long flags; 154 unsigned long flags;
155 155
@@ -164,7 +164,7 @@ static void iwl3945_clear_stations_table(struct iwl_priv *priv)
164/** 164/**
165 * iwl3945_add_station - Add station to station tables in driver and device 165 * iwl3945_add_station - Add station to station tables in driver and device
166 */ 166 */
167u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags) 167u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags, struct ieee80211_sta_ht_cap *ht_info)
168{ 168{
169 int i; 169 int i;
170 int index = IWL_INVALID_STATION; 170 int index = IWL_INVALID_STATION;
@@ -233,50 +233,6 @@ u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flag
233 233
234} 234}
235 235
236static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
237{
238 int rc = 0;
239 struct iwl_rx_packet *res = NULL;
240 struct iwl3945_rxon_assoc_cmd rxon_assoc;
241 struct iwl_host_cmd cmd = {
242 .id = REPLY_RXON_ASSOC,
243 .len = sizeof(rxon_assoc),
244 .meta.flags = CMD_WANT_SKB,
245 .data = &rxon_assoc,
246 };
247 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
248 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
249
250 if ((rxon1->flags == rxon2->flags) &&
251 (rxon1->filter_flags == rxon2->filter_flags) &&
252 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
253 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
254 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
255 return 0;
256 }
257
258 rxon_assoc.flags = priv->staging_rxon.flags;
259 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
260 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
261 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
262 rxon_assoc.reserved = 0;
263
264 rc = iwl_send_cmd_sync(priv, &cmd);
265 if (rc)
266 return rc;
267
268 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
269 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
270 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
271 rc = -EIO;
272 }
273
274 priv->alloc_rxb_skb--;
275 dev_kfree_skb_any(cmd.meta.u.skb);
276
277 return rc;
278}
279
280/** 236/**
281 * iwl3945_get_antenna_flags - Get antenna flags for RXON command 237 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
282 * @priv: eeprom and antenna fields are used to determine antenna flags 238 * @priv: eeprom and antenna fields are used to determine antenna flags
@@ -314,150 +270,6 @@ __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
314 return 0; /* "diversity" is default if error */ 270 return 0; /* "diversity" is default if error */
315} 271}
316 272
317/**
318 * iwl3945_commit_rxon - commit staging_rxon to hardware
319 *
320 * The RXON command in staging_rxon is committed to the hardware and
321 * the active_rxon structure is updated with the new data. This
322 * function correctly transitions out of the RXON_ASSOC_MSK state if
323 * a HW tune is required based on the RXON structure changes.
324 */
325static int iwl3945_commit_rxon(struct iwl_priv *priv)
326{
327 /* cast away the const for active_rxon in this function */
328 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
329 struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
330 int rc = 0;
331 bool new_assoc =
332 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
333
334 if (!iwl_is_alive(priv))
335 return -1;
336
337 /* always get timestamp with Rx frame */
338 staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
339
340 /* select antenna */
341 staging_rxon->flags &=
342 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
343 staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
344
345 rc = iwl_check_rxon_cmd(priv);
346 if (rc) {
347 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
348 return -EINVAL;
349 }
350
351 /* If we don't need to send a full RXON, we can use
352 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
353 * and other flags for the current radio configuration. */
354 if (!iwl_full_rxon_required(priv)) {
355 rc = iwl3945_send_rxon_assoc(priv);
356 if (rc) {
357 IWL_ERR(priv, "Error setting RXON_ASSOC "
358 "configuration (%d).\n", rc);
359 return rc;
360 }
361
362 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
363
364 return 0;
365 }
366
367 /* If we are currently associated and the new config requires
368 * an RXON_ASSOC and the new config wants the associated mask enabled,
369 * we must clear the associated from the active configuration
370 * before we apply the new config */
371 if (iwl_is_associated(priv) && new_assoc) {
372 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
373 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
374
375 /*
376 * reserved4 and 5 could have been filled by the iwlcore code.
377 * Let's clear them before pushing to the 3945.
378 */
379 active_rxon->reserved4 = 0;
380 active_rxon->reserved5 = 0;
381 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
382 sizeof(struct iwl3945_rxon_cmd),
383 &priv->active_rxon);
384
385 /* If the mask clearing failed then we set
386 * active_rxon back to what it was previously */
387 if (rc) {
388 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
389 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
390 "configuration (%d).\n", rc);
391 return rc;
392 }
393 }
394
395 IWL_DEBUG_INFO(priv, "Sending RXON\n"
396 "* with%s RXON_FILTER_ASSOC_MSK\n"
397 "* channel = %d\n"
398 "* bssid = %pM\n",
399 (new_assoc ? "" : "out"),
400 le16_to_cpu(staging_rxon->channel),
401 staging_rxon->bssid_addr);
402
403 /*
404 * reserved4 and 5 could have been filled by the iwlcore code.
405 * Let's clear them before pushing to the 3945.
406 */
407 staging_rxon->reserved4 = 0;
408 staging_rxon->reserved5 = 0;
409
410 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
411
412 /* Apply the new configuration */
413 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
414 sizeof(struct iwl3945_rxon_cmd),
415 staging_rxon);
416 if (rc) {
417 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
418 return rc;
419 }
420
421 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
422
423 iwl3945_clear_stations_table(priv);
424
425 /* If we issue a new RXON command which required a tune then we must
426 * send a new TXPOWER command or we won't be able to Tx any frames */
427 rc = priv->cfg->ops->lib->send_tx_power(priv);
428 if (rc) {
429 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
430 return rc;
431 }
432
433 /* Add the broadcast address so we can send broadcast frames */
434 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
435 IWL_INVALID_STATION) {
436 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
437 return -EIO;
438 }
439
440 /* If we have set the ASSOC_MSK and we are in BSS mode then
441 * add the IWL_AP_ID to the station rate table */
442 if (iwl_is_associated(priv) &&
443 (priv->iw_mode == NL80211_IFTYPE_STATION))
444 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr,
445 1, 0)
446 == IWL_INVALID_STATION) {
447 IWL_ERR(priv, "Error adding AP address for transmit\n");
448 return -EIO;
449 }
450
451 /* Init the hardware's rate fallback order based on the band */
452 rc = iwl3945_init_hw_rate_table(priv);
453 if (rc) {
454 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
455 return -EIO;
456 }
457
458 return 0;
459}
460
461static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv, 273static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
462 struct ieee80211_key_conf *keyconf, 274 struct ieee80211_key_conf *keyconf,
463 u8 sta_id) 275 u8 sta_id)
@@ -528,7 +340,7 @@ static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
528 unsigned long flags; 340 unsigned long flags;
529 341
530 spin_lock_irqsave(&priv->sta_lock, flags); 342 spin_lock_irqsave(&priv->sta_lock, flags);
531 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key)); 343 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
532 memset(&priv->stations_39[sta_id].sta.key, 0, 344 memset(&priv->stations_39[sta_id].sta.key, 0,
533 sizeof(struct iwl4965_keyinfo)); 345 sizeof(struct iwl4965_keyinfo));
534 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; 346 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
@@ -739,7 +551,8 @@ static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
739 priv->rxon_timing.atim_window = 0; 551 priv->rxon_timing.atim_window = 0;
740 } else { 552 } else {
741 priv->rxon_timing.beacon_interval = 553 priv->rxon_timing.beacon_interval =
742 iwl3945_adjust_beacon_interval(conf->beacon_int); 554 iwl3945_adjust_beacon_interval(
555 priv->vif->bss_conf.beacon_int);
743 /* TODO: we need to get atim_window from upper stack 556 /* TODO: we need to get atim_window from upper stack
744 * for now we set to 0 */ 557 * for now we set to 0 */
745 priv->rxon_timing.atim_window = 0; 558 priv->rxon_timing.atim_window = 0;
@@ -758,35 +571,6 @@ static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
758 le16_to_cpu(priv->rxon_timing.atim_window)); 571 le16_to_cpu(priv->rxon_timing.atim_window));
759} 572}
760 573
761static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
762{
763 if (mode == NL80211_IFTYPE_ADHOC) {
764 const struct iwl_channel_info *ch_info;
765
766 ch_info = iwl_get_channel_info(priv,
767 priv->band,
768 le16_to_cpu(priv->staging_rxon.channel));
769
770 if (!ch_info || !is_channel_ibss(ch_info)) {
771 IWL_ERR(priv, "channel %d not IBSS channel\n",
772 le16_to_cpu(priv->staging_rxon.channel));
773 return -EINVAL;
774 }
775 }
776
777 iwl_connection_init_rx_config(priv, mode);
778
779 iwl3945_clear_stations_table(priv);
780
781 /* don't commit rxon if rf-kill is on*/
782 if (!iwl_is_ready_rf(priv))
783 return -EAGAIN;
784
785 iwl3945_commit_rxon(priv);
786
787 return 0;
788}
789
790static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv, 574static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
791 struct ieee80211_tx_info *info, 575 struct ieee80211_tx_info *info,
792 struct iwl_cmd *cmd, 576 struct iwl_cmd *cmd,
@@ -794,8 +578,7 @@ static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
794 int sta_id) 578 int sta_id)
795{ 579{
796 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload; 580 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
797 struct iwl3945_hw_key *keyinfo = 581 struct iwl_hw_key *keyinfo = &priv->stations_39[sta_id].keyinfo;
798 &priv->stations_39[sta_id].keyinfo;
799 582
800 switch (keyinfo->alg) { 583 switch (keyinfo->alg) {
801 case ALG_CCMP: 584 case ALG_CCMP:
@@ -893,64 +676,6 @@ static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
893 tx->next_frame_len = 0; 676 tx->next_frame_len = 0;
894} 677}
895 678
896/**
897 * iwl3945_get_sta_id - Find station's index within station table
898 */
899static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
900{
901 int sta_id;
902 u16 fc = le16_to_cpu(hdr->frame_control);
903
904 /* If this frame is broadcast or management, use broadcast station id */
905 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
906 is_multicast_ether_addr(hdr->addr1))
907 return priv->hw_params.bcast_sta_id;
908
909 switch (priv->iw_mode) {
910
911 /* If we are a client station in a BSS network, use the special
912 * AP station entry (that's the only station we communicate with) */
913 case NL80211_IFTYPE_STATION:
914 return IWL_AP_ID;
915
916 /* If we are an AP, then find the station, or use BCAST */
917 case NL80211_IFTYPE_AP:
918 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
919 if (sta_id != IWL_INVALID_STATION)
920 return sta_id;
921 return priv->hw_params.bcast_sta_id;
922
923 /* If this frame is going out to an IBSS network, find the station,
924 * or create a new station table entry */
925 case NL80211_IFTYPE_ADHOC: {
926 /* Create new station table entry */
927 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
928 if (sta_id != IWL_INVALID_STATION)
929 return sta_id;
930
931 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
932
933 if (sta_id != IWL_INVALID_STATION)
934 return sta_id;
935
936 IWL_DEBUG_DROP(priv, "Station %pM not in station map. "
937 "Defaulting to broadcast...\n",
938 hdr->addr1);
939 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
940 return priv->hw_params.bcast_sta_id;
941 }
942 /* If we are in monitor mode, use BCAST. This is required for
943 * packet injection. */
944 case NL80211_IFTYPE_MONITOR:
945 return priv->hw_params.bcast_sta_id;
946
947 default:
948 IWL_WARN(priv, "Unknown mode of operation: %d\n",
949 priv->iw_mode);
950 return priv->hw_params.bcast_sta_id;
951 }
952}
953
954/* 679/*
955 * start REPLY_TX command process 680 * start REPLY_TX command process
956 */ 681 */
@@ -1004,7 +729,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
1004 729
1005 /* drop all data frame if we are not associated */ 730 /* drop all data frame if we are not associated */
1006 if (ieee80211_is_data(fc) && 731 if (ieee80211_is_data(fc) &&
1007 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */ 732 (!iwl_is_monitor_mode(priv)) && /* packet injection */
1008 (!iwl_is_associated(priv) || 733 (!iwl_is_associated(priv) ||
1009 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) { 734 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
1010 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n"); 735 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
@@ -1016,7 +741,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
1016 hdr_len = ieee80211_hdrlen(fc); 741 hdr_len = ieee80211_hdrlen(fc);
1017 742
1018 /* Find (or create) index into station table for destination station */ 743 /* Find (or create) index into station table for destination station */
1019 sta_id = iwl3945_get_sta_id(priv, hdr); 744 sta_id = iwl_get_sta_id(priv, hdr);
1020 if (sta_id == IWL_INVALID_STATION) { 745 if (sta_id == IWL_INVALID_STATION) {
1021 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n", 746 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
1022 hdr->addr1); 747 hdr->addr1);
@@ -1618,15 +1343,24 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv)
1618 struct list_head *element; 1343 struct list_head *element;
1619 struct iwl_rx_mem_buffer *rxb; 1344 struct iwl_rx_mem_buffer *rxb;
1620 unsigned long flags; 1345 unsigned long flags;
1621 spin_lock_irqsave(&rxq->lock, flags); 1346
1622 while (!list_empty(&rxq->rx_used)) { 1347 while (1) {
1348 spin_lock_irqsave(&rxq->lock, flags);
1349
1350 if (list_empty(&rxq->rx_used)) {
1351 spin_unlock_irqrestore(&rxq->lock, flags);
1352 return;
1353 }
1354
1623 element = rxq->rx_used.next; 1355 element = rxq->rx_used.next;
1624 rxb = list_entry(element, struct iwl_rx_mem_buffer, list); 1356 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1357 list_del(element);
1358 spin_unlock_irqrestore(&rxq->lock, flags);
1625 1359
1626 /* Alloc a new receive buffer */ 1360 /* Alloc a new receive buffer */
1627 rxb->skb = 1361 rxb->skb =
1628 alloc_skb(priv->hw_params.rx_buf_size, 1362 alloc_skb(priv->hw_params.rx_buf_size,
1629 __GFP_NOWARN | GFP_ATOMIC); 1363 GFP_KERNEL);
1630 if (!rxb->skb) { 1364 if (!rxb->skb) {
1631 if (net_ratelimit()) 1365 if (net_ratelimit())
1632 IWL_CRIT(priv, ": Can not allocate SKB buffers\n"); 1366 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
@@ -1644,18 +1378,18 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv)
1644 */ 1378 */
1645 skb_reserve(rxb->skb, 4); 1379 skb_reserve(rxb->skb, 4);
1646 1380
1647 priv->alloc_rxb_skb++;
1648 list_del(element);
1649
1650 /* Get physical address of RB/SKB */ 1381 /* Get physical address of RB/SKB */
1651 rxb->real_dma_addr = pci_map_single(priv->pci_dev, 1382 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1652 rxb->skb->data, 1383 rxb->skb->data,
1653 priv->hw_params.rx_buf_size, 1384 priv->hw_params.rx_buf_size,
1654 PCI_DMA_FROMDEVICE); 1385 PCI_DMA_FROMDEVICE);
1386
1387 spin_lock_irqsave(&rxq->lock, flags);
1655 list_add_tail(&rxb->list, &rxq->rx_free); 1388 list_add_tail(&rxb->list, &rxq->rx_free);
1389 priv->alloc_rxb_skb++;
1656 rxq->free_count++; 1390 rxq->free_count++;
1391 spin_unlock_irqrestore(&rxq->lock, flags);
1657 } 1392 }
1658 spin_unlock_irqrestore(&rxq->lock, flags);
1659} 1393}
1660 1394
1661void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq) 1395void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
@@ -1688,18 +1422,6 @@ void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1688 spin_unlock_irqrestore(&rxq->lock, flags); 1422 spin_unlock_irqrestore(&rxq->lock, flags);
1689} 1423}
1690 1424
1691/*
1692 * this should be called while priv->lock is locked
1693 */
1694static void __iwl3945_rx_replenish(void *data)
1695{
1696 struct iwl_priv *priv = data;
1697
1698 iwl3945_rx_allocate(priv);
1699 iwl3945_rx_queue_restock(priv);
1700}
1701
1702
1703void iwl3945_rx_replenish(void *data) 1425void iwl3945_rx_replenish(void *data)
1704{ 1426{
1705 struct iwl_priv *priv = data; 1427 struct iwl_priv *priv = data;
@@ -1879,6 +1601,7 @@ static void iwl3945_rx_handle(struct iwl_priv *priv)
1879 "r = %d, i = %d, %s, 0x%02x\n", r, i, 1601 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1880 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1602 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1881 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); 1603 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1604 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1882 } else { 1605 } else {
1883 /* No handling needed */ 1606 /* No handling needed */
1884 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR, 1607 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
@@ -1916,7 +1639,7 @@ static void iwl3945_rx_handle(struct iwl_priv *priv)
1916 count++; 1639 count++;
1917 if (count >= 8) { 1640 if (count >= 8) {
1918 priv->rxq.read = i; 1641 priv->rxq.read = i;
1919 __iwl3945_rx_replenish(priv); 1642 iwl3945_rx_queue_restock(priv);
1920 count = 0; 1643 count = 0;
1921 } 1644 }
1922 } 1645 }
@@ -1963,7 +1686,6 @@ static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1963 u32 i; 1686 u32 i;
1964 u32 desc, time, count, base, data1; 1687 u32 desc, time, count, base, data1;
1965 u32 blink1, blink2, ilink1, ilink2; 1688 u32 blink1, blink2, ilink1, ilink2;
1966 int rc;
1967 1689
1968 base = le32_to_cpu(priv->card_alive.error_event_table_ptr); 1690 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1969 1691
@@ -1972,11 +1694,6 @@ static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1972 return; 1694 return;
1973 } 1695 }
1974 1696
1975 rc = iwl_grab_nic_access(priv);
1976 if (rc) {
1977 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1978 return;
1979 }
1980 1697
1981 count = iwl_read_targ_mem(priv, base); 1698 count = iwl_read_targ_mem(priv, base);
1982 1699
@@ -2011,8 +1728,6 @@ static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
2011 ilink1, ilink2, data1); 1728 ilink1, ilink2, data1);
2012 } 1729 }
2013 1730
2014 iwl_release_nic_access(priv);
2015
2016} 1731}
2017 1732
2018#define EVENT_START_OFFSET (6 * sizeof(u32)) 1733#define EVENT_START_OFFSET (6 * sizeof(u32))
@@ -2020,7 +1735,6 @@ static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
2020/** 1735/**
2021 * iwl3945_print_event_log - Dump error event log to syslog 1736 * iwl3945_print_event_log - Dump error event log to syslog
2022 * 1737 *
2023 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
2024 */ 1738 */
2025static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx, 1739static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
2026 u32 num_events, u32 mode) 1740 u32 num_events, u32 mode)
@@ -2063,7 +1777,6 @@ static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
2063 1777
2064static void iwl3945_dump_nic_event_log(struct iwl_priv *priv) 1778static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
2065{ 1779{
2066 int rc;
2067 u32 base; /* SRAM byte address of event log header */ 1780 u32 base; /* SRAM byte address of event log header */
2068 u32 capacity; /* event log capacity in # entries */ 1781 u32 capacity; /* event log capacity in # entries */
2069 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ 1782 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
@@ -2077,12 +1790,6 @@ static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
2077 return; 1790 return;
2078 } 1791 }
2079 1792
2080 rc = iwl_grab_nic_access(priv);
2081 if (rc) {
2082 IWL_WARN(priv, "Can not read from adapter at this time.\n");
2083 return;
2084 }
2085
2086 /* event log header */ 1793 /* event log header */
2087 capacity = iwl_read_targ_mem(priv, base); 1794 capacity = iwl_read_targ_mem(priv, base);
2088 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); 1795 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
@@ -2094,7 +1801,6 @@ static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
2094 /* bail out if nothing in log */ 1801 /* bail out if nothing in log */
2095 if (size == 0) { 1802 if (size == 0) {
2096 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n"); 1803 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2097 iwl_release_nic_access(priv);
2098 return; 1804 return;
2099 } 1805 }
2100 1806
@@ -2110,24 +1816,6 @@ static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
2110 /* (then/else) start at top of log */ 1816 /* (then/else) start at top of log */
2111 iwl3945_print_event_log(priv, 0, next_entry, mode); 1817 iwl3945_print_event_log(priv, 0, next_entry, mode);
2112 1818
2113 iwl_release_nic_access(priv);
2114}
2115
2116static void iwl3945_error_recovery(struct iwl_priv *priv)
2117{
2118 unsigned long flags;
2119
2120 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
2121 sizeof(priv->staging_rxon));
2122 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2123 iwl3945_commit_rxon(priv);
2124
2125 iwl3945_add_station(priv, priv->bssid, 1, 0);
2126
2127 spin_lock_irqsave(&priv->lock, flags);
2128 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
2129 priv->error_recovering = 0;
2130 spin_unlock_irqrestore(&priv->lock, flags);
2131} 1819}
2132 1820
2133static void iwl3945_irq_tasklet(struct iwl_priv *priv) 1821static void iwl3945_irq_tasklet(struct iwl_priv *priv)
@@ -2178,6 +1866,7 @@ static void iwl3945_irq_tasklet(struct iwl_priv *priv)
2178 /* Tell the device to stop sending interrupts */ 1866 /* Tell the device to stop sending interrupts */
2179 iwl_disable_interrupts(priv); 1867 iwl_disable_interrupts(priv);
2180 1868
1869 priv->isr_stats.hw++;
2181 iwl_irq_handle_error(priv); 1870 iwl_irq_handle_error(priv);
2182 1871
2183 handled |= CSR_INT_BIT_HW_ERR; 1872 handled |= CSR_INT_BIT_HW_ERR;
@@ -2190,13 +1879,17 @@ static void iwl3945_irq_tasklet(struct iwl_priv *priv)
2190#ifdef CONFIG_IWLWIFI_DEBUG 1879#ifdef CONFIG_IWLWIFI_DEBUG
2191 if (priv->debug_level & (IWL_DL_ISR)) { 1880 if (priv->debug_level & (IWL_DL_ISR)) {
2192 /* NIC fires this, but we don't use it, redundant with WAKEUP */ 1881 /* NIC fires this, but we don't use it, redundant with WAKEUP */
2193 if (inta & CSR_INT_BIT_SCD) 1882 if (inta & CSR_INT_BIT_SCD) {
2194 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit " 1883 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
2195 "the frame/frames.\n"); 1884 "the frame/frames.\n");
1885 priv->isr_stats.sch++;
1886 }
2196 1887
2197 /* Alive notification via Rx interrupt will do the real work */ 1888 /* Alive notification via Rx interrupt will do the real work */
2198 if (inta & CSR_INT_BIT_ALIVE) 1889 if (inta & CSR_INT_BIT_ALIVE) {
2199 IWL_DEBUG_ISR(priv, "Alive interrupt\n"); 1890 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1891 priv->isr_stats.alive++;
1892 }
2200 } 1893 }
2201#endif 1894#endif
2202 /* Safely ignore these bits for debug checks below */ 1895 /* Safely ignore these bits for debug checks below */
@@ -2206,6 +1899,8 @@ static void iwl3945_irq_tasklet(struct iwl_priv *priv)
2206 if (inta & CSR_INT_BIT_SW_ERR) { 1899 if (inta & CSR_INT_BIT_SW_ERR) {
2207 IWL_ERR(priv, "Microcode SW error detected. " 1900 IWL_ERR(priv, "Microcode SW error detected. "
2208 "Restarting 0x%X.\n", inta); 1901 "Restarting 0x%X.\n", inta);
1902 priv->isr_stats.sw++;
1903 priv->isr_stats.sw_err = inta;
2209 iwl_irq_handle_error(priv); 1904 iwl_irq_handle_error(priv);
2210 handled |= CSR_INT_BIT_SW_ERR; 1905 handled |= CSR_INT_BIT_SW_ERR;
2211 } 1906 }
@@ -2221,6 +1916,7 @@ static void iwl3945_irq_tasklet(struct iwl_priv *priv)
2221 iwl_txq_update_write_ptr(priv, &priv->txq[4]); 1916 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
2222 iwl_txq_update_write_ptr(priv, &priv->txq[5]); 1917 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
2223 1918
1919 priv->isr_stats.wakeup++;
2224 handled |= CSR_INT_BIT_WAKEUP; 1920 handled |= CSR_INT_BIT_WAKEUP;
2225 } 1921 }
2226 1922
@@ -2229,27 +1925,28 @@ static void iwl3945_irq_tasklet(struct iwl_priv *priv)
2229 * notifications from uCode come through here*/ 1925 * notifications from uCode come through here*/
2230 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { 1926 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
2231 iwl3945_rx_handle(priv); 1927 iwl3945_rx_handle(priv);
1928 priv->isr_stats.rx++;
2232 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); 1929 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
2233 } 1930 }
2234 1931
2235 if (inta & CSR_INT_BIT_FH_TX) { 1932 if (inta & CSR_INT_BIT_FH_TX) {
2236 IWL_DEBUG_ISR(priv, "Tx interrupt\n"); 1933 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1934 priv->isr_stats.tx++;
2237 1935
2238 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6)); 1936 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
2239 if (!iwl_grab_nic_access(priv)) { 1937 iwl_write_direct32(priv, FH39_TCSR_CREDIT
2240 iwl_write_direct32(priv, FH39_TCSR_CREDIT 1938 (FH39_SRVC_CHNL), 0x0);
2241 (FH39_SRVC_CHNL), 0x0);
2242 iwl_release_nic_access(priv);
2243 }
2244 handled |= CSR_INT_BIT_FH_TX; 1939 handled |= CSR_INT_BIT_FH_TX;
2245 } 1940 }
2246 1941
2247 if (inta & ~handled) 1942 if (inta & ~handled) {
2248 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled); 1943 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1944 priv->isr_stats.unhandled++;
1945 }
2249 1946
2250 if (inta & ~CSR_INI_SET_MASK) { 1947 if (inta & ~priv->inta_mask) {
2251 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n", 1948 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
2252 inta & ~CSR_INI_SET_MASK); 1949 inta & ~priv->inta_mask);
2253 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh); 1950 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
2254 } 1951 }
2255 1952
@@ -2413,10 +2110,6 @@ static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 le
2413 2110
2414 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); 2111 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2415 2112
2416 rc = iwl_grab_nic_access(priv);
2417 if (rc)
2418 return rc;
2419
2420 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, 2113 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2421 IWL39_RTC_INST_LOWER_BOUND); 2114 IWL39_RTC_INST_LOWER_BOUND);
2422 2115
@@ -2437,7 +2130,6 @@ static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 le
2437 } 2130 }
2438 } 2131 }
2439 2132
2440 iwl_release_nic_access(priv);
2441 2133
2442 if (!errcnt) 2134 if (!errcnt)
2443 IWL_DEBUG_INFO(priv, 2135 IWL_DEBUG_INFO(priv,
@@ -2461,10 +2153,6 @@ static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
2461 2153
2462 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); 2154 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2463 2155
2464 rc = iwl_grab_nic_access(priv);
2465 if (rc)
2466 return rc;
2467
2468 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { 2156 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2469 /* read data comes through single port, auto-incr addr */ 2157 /* read data comes through single port, auto-incr addr */
2470 /* NOTE: Use the debugless read so we don't flood kernel log 2158 /* NOTE: Use the debugless read so we don't flood kernel log
@@ -2485,8 +2173,6 @@ static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
2485 } 2173 }
2486 } 2174 }
2487 2175
2488 iwl_release_nic_access(priv);
2489
2490 return rc; 2176 return rc;
2491} 2177}
2492 2178
@@ -2810,20 +2496,11 @@ static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2810{ 2496{
2811 dma_addr_t pinst; 2497 dma_addr_t pinst;
2812 dma_addr_t pdata; 2498 dma_addr_t pdata;
2813 int rc = 0;
2814 unsigned long flags;
2815 2499
2816 /* bits 31:0 for 3945 */ 2500 /* bits 31:0 for 3945 */
2817 pinst = priv->ucode_code.p_addr; 2501 pinst = priv->ucode_code.p_addr;
2818 pdata = priv->ucode_data_backup.p_addr; 2502 pdata = priv->ucode_data_backup.p_addr;
2819 2503
2820 spin_lock_irqsave(&priv->lock, flags);
2821 rc = iwl_grab_nic_access(priv);
2822 if (rc) {
2823 spin_unlock_irqrestore(&priv->lock, flags);
2824 return rc;
2825 }
2826
2827 /* Tell bootstrap uCode where to find image to load */ 2504 /* Tell bootstrap uCode where to find image to load */
2828 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); 2505 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2829 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); 2506 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
@@ -2835,13 +2512,9 @@ static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2835 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, 2512 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2836 priv->ucode_code.len | BSM_DRAM_INST_LOAD); 2513 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2837 2514
2838 iwl_release_nic_access(priv);
2839
2840 spin_unlock_irqrestore(&priv->lock, flags);
2841
2842 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n"); 2515 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2843 2516
2844 return rc; 2517 return 0;
2845} 2518}
2846 2519
2847/** 2520/**
@@ -2887,11 +2560,6 @@ static void iwl3945_init_alive_start(struct iwl_priv *priv)
2887 queue_work(priv->workqueue, &priv->restart); 2560 queue_work(priv->workqueue, &priv->restart);
2888} 2561}
2889 2562
2890
2891/* temporary */
2892static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
2893 struct sk_buff *skb);
2894
2895/** 2563/**
2896 * iwl3945_alive_start - called after REPLY_ALIVE notification received 2564 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2897 * from protocol/runtime uCode (initialization uCode's 2565 * from protocol/runtime uCode (initialization uCode's
@@ -2899,7 +2567,6 @@ static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
2899 */ 2567 */
2900static void iwl3945_alive_start(struct iwl_priv *priv) 2568static void iwl3945_alive_start(struct iwl_priv *priv)
2901{ 2569{
2902 int rc = 0;
2903 int thermal_spin = 0; 2570 int thermal_spin = 0;
2904 u32 rfkill; 2571 u32 rfkill;
2905 2572
@@ -2922,17 +2589,10 @@ static void iwl3945_alive_start(struct iwl_priv *priv)
2922 goto restart; 2589 goto restart;
2923 } 2590 }
2924 2591
2925 iwl3945_clear_stations_table(priv); 2592 priv->cfg->ops->smgmt->clear_station_table(priv);
2926
2927 rc = iwl_grab_nic_access(priv);
2928 if (rc) {
2929 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
2930 return;
2931 }
2932 2593
2933 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG); 2594 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2934 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill); 2595 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2935 iwl_release_nic_access(priv);
2936 2596
2937 if (rfkill & 0x1) { 2597 if (rfkill & 0x1) {
2938 clear_bit(STATUS_RF_KILL_HW, &priv->status); 2598 clear_bit(STATUS_RF_KILL_HW, &priv->status);
@@ -2952,9 +2612,6 @@ static void iwl3945_alive_start(struct iwl_priv *priv)
2952 /* After the ALIVE response, we can send commands to 3945 uCode */ 2612 /* After the ALIVE response, we can send commands to 3945 uCode */
2953 set_bit(STATUS_ALIVE, &priv->status); 2613 set_bit(STATUS_ALIVE, &priv->status);
2954 2614
2955 /* Clear out the uCode error bit if it is set */
2956 clear_bit(STATUS_FW_ERROR, &priv->status);
2957
2958 if (iwl_is_rfkill(priv)) 2615 if (iwl_is_rfkill(priv))
2959 return; 2616 return;
2960 2617
@@ -2981,7 +2638,7 @@ static void iwl3945_alive_start(struct iwl_priv *priv)
2981 iwl_send_bt_config(priv); 2638 iwl_send_bt_config(priv);
2982 2639
2983 /* Configure the adapter for unassociated operation */ 2640 /* Configure the adapter for unassociated operation */
2984 iwl3945_commit_rxon(priv); 2641 iwlcore_commit_rxon(priv);
2985 2642
2986 iwl3945_reg_txpower_periodic(priv); 2643 iwl3945_reg_txpower_periodic(priv);
2987 2644
@@ -2991,17 +2648,17 @@ static void iwl3945_alive_start(struct iwl_priv *priv)
2991 set_bit(STATUS_READY, &priv->status); 2648 set_bit(STATUS_READY, &priv->status);
2992 wake_up_interruptible(&priv->wait_command_queue); 2649 wake_up_interruptible(&priv->wait_command_queue);
2993 2650
2994 if (priv->error_recovering)
2995 iwl3945_error_recovery(priv);
2996
2997 /* reassociate for ADHOC mode */ 2651 /* reassociate for ADHOC mode */
2998 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) { 2652 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2999 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw, 2653 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
3000 priv->vif); 2654 priv->vif);
3001 if (beacon) 2655 if (beacon)
3002 iwl3945_mac_beacon_update(priv->hw, beacon); 2656 iwl_mac_beacon_update(priv->hw, beacon);
3003 } 2657 }
3004 2658
2659 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2660 iwl_set_mode(priv, priv->iw_mode);
2661
3005 return; 2662 return;
3006 2663
3007 restart: 2664 restart:
@@ -3024,7 +2681,7 @@ static void __iwl3945_down(struct iwl_priv *priv)
3024 set_bit(STATUS_EXIT_PENDING, &priv->status); 2681 set_bit(STATUS_EXIT_PENDING, &priv->status);
3025 2682
3026 iwl3945_led_unregister(priv); 2683 iwl3945_led_unregister(priv);
3027 iwl3945_clear_stations_table(priv); 2684 priv->cfg->ops->smgmt->clear_station_table(priv);
3028 2685
3029 /* Unblock any waiting calls */ 2686 /* Unblock any waiting calls */
3030 wake_up_interruptible_all(&priv->wait_command_queue); 2687 wake_up_interruptible_all(&priv->wait_command_queue);
@@ -3047,7 +2704,7 @@ static void __iwl3945_down(struct iwl_priv *priv)
3047 ieee80211_stop_queues(priv->hw); 2704 ieee80211_stop_queues(priv->hw);
3048 2705
3049 /* If we have not previously called iwl3945_init() then 2706 /* If we have not previously called iwl3945_init() then
3050 * clear all bits but the RF Kill and SUSPEND bits and return */ 2707 * clear all bits but the RF Kill bits and return */
3051 if (!iwl_is_init(priv)) { 2708 if (!iwl_is_init(priv)) {
3052 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << 2709 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3053 STATUS_RF_KILL_HW | 2710 STATUS_RF_KILL_HW |
@@ -3055,23 +2712,19 @@ static void __iwl3945_down(struct iwl_priv *priv)
3055 STATUS_RF_KILL_SW | 2712 STATUS_RF_KILL_SW |
3056 test_bit(STATUS_GEO_CONFIGURED, &priv->status) << 2713 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3057 STATUS_GEO_CONFIGURED | 2714 STATUS_GEO_CONFIGURED |
3058 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
3059 STATUS_IN_SUSPEND |
3060 test_bit(STATUS_EXIT_PENDING, &priv->status) << 2715 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3061 STATUS_EXIT_PENDING; 2716 STATUS_EXIT_PENDING;
3062 goto exit; 2717 goto exit;
3063 } 2718 }
3064 2719
3065 /* ...otherwise clear out all the status bits but the RF Kill and 2720 /* ...otherwise clear out all the status bits but the RF Kill
3066 * SUSPEND bits and continue taking the NIC down. */ 2721 * bits and continue taking the NIC down. */
3067 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << 2722 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3068 STATUS_RF_KILL_HW | 2723 STATUS_RF_KILL_HW |
3069 test_bit(STATUS_RF_KILL_SW, &priv->status) << 2724 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3070 STATUS_RF_KILL_SW | 2725 STATUS_RF_KILL_SW |
3071 test_bit(STATUS_GEO_CONFIGURED, &priv->status) << 2726 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3072 STATUS_GEO_CONFIGURED | 2727 STATUS_GEO_CONFIGURED |
3073 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
3074 STATUS_IN_SUSPEND |
3075 test_bit(STATUS_FW_ERROR, &priv->status) << 2728 test_bit(STATUS_FW_ERROR, &priv->status) <<
3076 STATUS_FW_ERROR | 2729 STATUS_FW_ERROR |
3077 test_bit(STATUS_EXIT_PENDING, &priv->status) << 2730 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
@@ -3085,17 +2738,12 @@ static void __iwl3945_down(struct iwl_priv *priv)
3085 iwl3945_hw_txq_ctx_stop(priv); 2738 iwl3945_hw_txq_ctx_stop(priv);
3086 iwl3945_hw_rxq_stop(priv); 2739 iwl3945_hw_rxq_stop(priv);
3087 2740
3088 spin_lock_irqsave(&priv->lock, flags); 2741 iwl_write_prph(priv, APMG_CLK_DIS_REG,
3089 if (!iwl_grab_nic_access(priv)) { 2742 APMG_CLK_VAL_DMA_CLK_RQT);
3090 iwl_write_prph(priv, APMG_CLK_DIS_REG,
3091 APMG_CLK_VAL_DMA_CLK_RQT);
3092 iwl_release_nic_access(priv);
3093 }
3094 spin_unlock_irqrestore(&priv->lock, flags);
3095 2743
3096 udelay(5); 2744 udelay(5);
3097 2745
3098 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status)) 2746 if (exit_pending)
3099 priv->cfg->ops->lib->apm_ops.stop(priv); 2747 priv->cfg->ops->lib->apm_ops.stop(priv);
3100 else 2748 else
3101 priv->cfg->ops->lib->apm_ops.reset(priv); 2749 priv->cfg->ops->lib->apm_ops.reset(priv);
@@ -3148,10 +2796,8 @@ static int __iwl3945_up(struct iwl_priv *priv)
3148 clear_bit(STATUS_RF_KILL_HW, &priv->status); 2796 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3149 else { 2797 else {
3150 set_bit(STATUS_RF_KILL_HW, &priv->status); 2798 set_bit(STATUS_RF_KILL_HW, &priv->status);
3151 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) { 2799 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
3152 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n"); 2800 return -ENODEV;
3153 return -ENODEV;
3154 }
3155 } 2801 }
3156 2802
3157 iwl_write32(priv, CSR_INT, 0xFFFFFFFF); 2803 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
@@ -3187,7 +2833,7 @@ static int __iwl3945_up(struct iwl_priv *priv)
3187 2833
3188 for (i = 0; i < MAX_HW_RESTARTS; i++) { 2834 for (i = 0; i < MAX_HW_RESTARTS; i++) {
3189 2835
3190 iwl3945_clear_stations_table(priv); 2836 priv->cfg->ops->smgmt->clear_station_table(priv);
3191 2837
3192 /* load bootstrap state machine, 2838 /* load bootstrap state machine,
3193 * load bootstrap program into processor's memory, 2839 * load bootstrap program into processor's memory,
@@ -3283,9 +2929,9 @@ static void iwl3945_bg_request_scan(struct work_struct *data)
3283 int rc = 0; 2929 int rc = 0;
3284 struct iwl3945_scan_cmd *scan; 2930 struct iwl3945_scan_cmd *scan;
3285 struct ieee80211_conf *conf = NULL; 2931 struct ieee80211_conf *conf = NULL;
3286 u8 n_probes = 2; 2932 u8 n_probes = 0;
3287 enum ieee80211_band band; 2933 enum ieee80211_band band;
3288 DECLARE_SSID_BUF(ssid); 2934 bool is_active = false;
3289 2935
3290 conf = ieee80211_get_hw_conf(priv->hw); 2936 conf = ieee80211_get_hw_conf(priv->hw);
3291 2937
@@ -3386,18 +3032,25 @@ static void iwl3945_bg_request_scan(struct work_struct *data)
3386 scan_suspend_time, interval); 3032 scan_suspend_time, interval);
3387 } 3033 }
3388 3034
3389 /* We should add the ability for user to lock to PASSIVE ONLY */ 3035 if (priv->scan_request->n_ssids) {
3390 if (priv->one_direct_scan) { 3036 int i, p = 0;
3391 IWL_DEBUG_SCAN(priv, "Kicking off one direct scan for '%s'\n", 3037 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
3392 print_ssid(ssid, priv->direct_ssid, 3038 for (i = 0; i < priv->scan_request->n_ssids; i++) {
3393 priv->direct_ssid_len)); 3039 /* always does wildcard anyway */
3394 scan->direct_scan[0].id = WLAN_EID_SSID; 3040 if (!priv->scan_request->ssids[i].ssid_len)
3395 scan->direct_scan[0].len = priv->direct_ssid_len; 3041 continue;
3396 memcpy(scan->direct_scan[0].ssid, 3042 scan->direct_scan[p].id = WLAN_EID_SSID;
3397 priv->direct_ssid, priv->direct_ssid_len); 3043 scan->direct_scan[p].len =
3398 n_probes++; 3044 priv->scan_request->ssids[i].ssid_len;
3045 memcpy(scan->direct_scan[p].ssid,
3046 priv->scan_request->ssids[i].ssid,
3047 priv->scan_request->ssids[i].ssid_len);
3048 n_probes++;
3049 p++;
3050 }
3051 is_active = true;
3399 } else 3052 } else
3400 IWL_DEBUG_SCAN(priv, "Kicking off one indirect scan.\n"); 3053 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
3401 3054
3402 /* We don't build a direct scan probe request; the uCode will do 3055 /* We don't build a direct scan probe request; the uCode will do
3403 * that based on the direct_mask added to each channel entry */ 3056 * that based on the direct_mask added to each channel entry */
@@ -3414,7 +3067,12 @@ static void iwl3945_bg_request_scan(struct work_struct *data)
3414 band = IEEE80211_BAND_2GHZ; 3067 band = IEEE80211_BAND_2GHZ;
3415 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) { 3068 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
3416 scan->tx_cmd.rate = IWL_RATE_6M_PLCP; 3069 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
3417 scan->good_CRC_th = IWL_GOOD_CRC_TH; 3070 /*
3071 * If active scaning is requested but a certain channel
3072 * is marked passive, we can do active scanning if we
3073 * detect transmissions.
3074 */
3075 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
3418 band = IEEE80211_BAND_5GHZ; 3076 band = IEEE80211_BAND_5GHZ;
3419 } else { 3077 } else {
3420 IWL_WARN(priv, "Invalid scan band count\n"); 3078 IWL_WARN(priv, "Invalid scan band count\n");
@@ -3422,19 +3080,20 @@ static void iwl3945_bg_request_scan(struct work_struct *data)
3422 } 3080 }
3423 3081
3424 scan->tx_cmd.len = cpu_to_le16( 3082 scan->tx_cmd.len = cpu_to_le16(
3425 iwl_fill_probe_req(priv, band, 3083 iwl_fill_probe_req(priv,
3426 (struct ieee80211_mgmt *)scan->data, 3084 (struct ieee80211_mgmt *)scan->data,
3427 IWL_MAX_SCAN_SIZE - sizeof(*scan))); 3085 priv->scan_request->ie,
3086 priv->scan_request->ie_len,
3087 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
3428 3088
3429 /* select Rx antennas */ 3089 /* select Rx antennas */
3430 scan->flags |= iwl3945_get_antenna_flags(priv); 3090 scan->flags |= iwl3945_get_antenna_flags(priv);
3431 3091
3432 if (priv->iw_mode == NL80211_IFTYPE_MONITOR) 3092 if (iwl_is_monitor_mode(priv))
3433 scan->filter_flags = RXON_FILTER_PROMISC_MSK; 3093 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
3434 3094
3435 scan->channel_count = 3095 scan->channel_count =
3436 iwl3945_get_channels_for_scan(priv, band, 1, /* active */ 3096 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
3437 n_probes,
3438 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); 3097 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
3439 3098
3440 if (scan->channel_count == 0) { 3099 if (scan->channel_count == 0) {
@@ -3492,8 +3151,17 @@ static void iwl3945_bg_restart(struct work_struct *data)
3492 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 3151 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3493 return; 3152 return;
3494 3153
3495 iwl3945_down(priv); 3154 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3496 queue_work(priv->workqueue, &priv->up); 3155 mutex_lock(&priv->mutex);
3156 priv->vif = NULL;
3157 priv->is_open = 0;
3158 mutex_unlock(&priv->mutex);
3159 iwl3945_down(priv);
3160 ieee80211_restart_hw(priv->hw);
3161 } else {
3162 iwl3945_down(priv);
3163 queue_work(priv->workqueue, &priv->up);
3164 }
3497} 3165}
3498 3166
3499static void iwl3945_bg_rx_replenish(struct work_struct *data) 3167static void iwl3945_bg_rx_replenish(struct work_struct *data)
@@ -3511,7 +3179,7 @@ static void iwl3945_bg_rx_replenish(struct work_struct *data)
3511 3179
3512#define IWL_DELAY_NEXT_SCAN (HZ*2) 3180#define IWL_DELAY_NEXT_SCAN (HZ*2)
3513 3181
3514static void iwl3945_post_associate(struct iwl_priv *priv) 3182void iwl3945_post_associate(struct iwl_priv *priv)
3515{ 3183{
3516 int rc = 0; 3184 int rc = 0;
3517 struct ieee80211_conf *conf = NULL; 3185 struct ieee80211_conf *conf = NULL;
@@ -3536,7 +3204,7 @@ static void iwl3945_post_associate(struct iwl_priv *priv)
3536 conf = ieee80211_get_hw_conf(priv->hw); 3204 conf = ieee80211_get_hw_conf(priv->hw);
3537 3205
3538 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 3206 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3539 iwl3945_commit_rxon(priv); 3207 iwlcore_commit_rxon(priv);
3540 3208
3541 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd)); 3209 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3542 iwl3945_setup_rxon_timing(priv); 3210 iwl3945_setup_rxon_timing(priv);
@@ -3569,7 +3237,7 @@ static void iwl3945_post_associate(struct iwl_priv *priv)
3569 3237
3570 } 3238 }
3571 3239
3572 iwl3945_commit_rxon(priv); 3240 iwlcore_commit_rxon(priv);
3573 3241
3574 switch (priv->iw_mode) { 3242 switch (priv->iw_mode) {
3575 case NL80211_IFTYPE_STATION: 3243 case NL80211_IFTYPE_STATION:
@@ -3579,7 +3247,7 @@ static void iwl3945_post_associate(struct iwl_priv *priv)
3579 case NL80211_IFTYPE_ADHOC: 3247 case NL80211_IFTYPE_ADHOC:
3580 3248
3581 priv->assoc_id = 1; 3249 priv->assoc_id = 1;
3582 iwl3945_add_station(priv, priv->bssid, 0, 0); 3250 priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 0, 0, NULL);
3583 iwl3945_sync_sta(priv, IWL_STA_ID, 3251 iwl3945_sync_sta(priv, IWL_STA_ID,
3584 (priv->band == IEEE80211_BAND_5GHZ) ? 3252 (priv->band == IEEE80211_BAND_5GHZ) ?
3585 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP, 3253 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
@@ -3601,8 +3269,6 @@ static void iwl3945_post_associate(struct iwl_priv *priv)
3601 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; 3269 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
3602} 3270}
3603 3271
3604static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
3605
3606/***************************************************************************** 3272/*****************************************************************************
3607 * 3273 *
3608 * mac80211 entry point functions 3274 * mac80211 entry point functions
@@ -3645,9 +3311,6 @@ static int iwl3945_mac_start(struct ieee80211_hw *hw)
3645 3311
3646 IWL_DEBUG_INFO(priv, "Start UP work.\n"); 3312 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3647 3313
3648 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
3649 return 0;
3650
3651 /* Wait for START_ALIVE from ucode. Otherwise callbacks from 3314 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3652 * mac80211 will not be run successfully. */ 3315 * mac80211 will not be run successfully. */
3653 ret = wait_event_interruptible_timeout(priv->wait_command_queue, 3316 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
@@ -3726,144 +3389,7 @@ static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3726 return NETDEV_TX_OK; 3389 return NETDEV_TX_OK;
3727} 3390}
3728 3391
3729static int iwl3945_mac_add_interface(struct ieee80211_hw *hw, 3392void iwl3945_config_ap(struct iwl_priv *priv)
3730 struct ieee80211_if_init_conf *conf)
3731{
3732 struct iwl_priv *priv = hw->priv;
3733 unsigned long flags;
3734
3735 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
3736
3737 if (priv->vif) {
3738 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
3739 return -EOPNOTSUPP;
3740 }
3741
3742 spin_lock_irqsave(&priv->lock, flags);
3743 priv->vif = conf->vif;
3744 priv->iw_mode = conf->type;
3745
3746 spin_unlock_irqrestore(&priv->lock, flags);
3747
3748 mutex_lock(&priv->mutex);
3749
3750 if (conf->mac_addr) {
3751 IWL_DEBUG_MAC80211(priv, "Set: %pM\n", conf->mac_addr);
3752 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
3753 }
3754
3755 if (iwl_is_ready(priv))
3756 iwl3945_set_mode(priv, conf->type);
3757
3758 mutex_unlock(&priv->mutex);
3759
3760 IWL_DEBUG_MAC80211(priv, "leave\n");
3761 return 0;
3762}
3763
3764/**
3765 * iwl3945_mac_config - mac80211 config callback
3766 *
3767 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
3768 * be set inappropriately and the driver currently sets the hardware up to
3769 * use it whenever needed.
3770 */
3771static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
3772{
3773 struct iwl_priv *priv = hw->priv;
3774 const struct iwl_channel_info *ch_info;
3775 struct ieee80211_conf *conf = &hw->conf;
3776 unsigned long flags;
3777 int ret = 0;
3778
3779 mutex_lock(&priv->mutex);
3780 IWL_DEBUG_MAC80211(priv, "enter to channel %d\n",
3781 conf->channel->hw_value);
3782
3783 if (!iwl_is_ready(priv)) {
3784 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
3785 ret = -EIO;
3786 goto out;
3787 }
3788
3789 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
3790 test_bit(STATUS_SCANNING, &priv->status))) {
3791 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
3792 set_bit(STATUS_CONF_PENDING, &priv->status);
3793 mutex_unlock(&priv->mutex);
3794 return 0;
3795 }
3796
3797 spin_lock_irqsave(&priv->lock, flags);
3798
3799 ch_info = iwl_get_channel_info(priv, conf->channel->band,
3800 conf->channel->hw_value);
3801 if (!is_channel_valid(ch_info)) {
3802 IWL_DEBUG_SCAN(priv,
3803 "Channel %d [%d] is INVALID for this band.\n",
3804 conf->channel->hw_value, conf->channel->band);
3805 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
3806 spin_unlock_irqrestore(&priv->lock, flags);
3807 ret = -EINVAL;
3808 goto out;
3809 }
3810
3811 iwl_set_rxon_channel(priv, conf->channel);
3812
3813 iwl_set_flags_for_band(priv, conf->channel->band);
3814
3815 /* The list of supported rates and rate mask can be different
3816 * for each phymode; since the phymode may have changed, reset
3817 * the rate mask to what mac80211 lists */
3818 iwl_set_rate(priv);
3819
3820 spin_unlock_irqrestore(&priv->lock, flags);
3821
3822#ifdef IEEE80211_CONF_CHANNEL_SWITCH
3823 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
3824 iwl3945_hw_channel_switch(priv, conf->channel);
3825 goto out;
3826 }
3827#endif
3828
3829 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
3830 if (conf->radio_enabled &&
3831 iwl_radio_kill_sw_enable_radio(priv)) {
3832 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
3833 "waiting for uCode\n");
3834 goto out;
3835 }
3836
3837 if (!conf->radio_enabled) {
3838 iwl_radio_kill_sw_disable_radio(priv);
3839 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
3840 goto out;
3841 }
3842 }
3843
3844 if (iwl_is_rfkill(priv)) {
3845 IWL_DEBUG_MAC80211(priv, "leave - RF kill\n");
3846 ret = -EIO;
3847 goto out;
3848 }
3849
3850 iwl_set_rate(priv);
3851
3852 if (memcmp(&priv->active_rxon,
3853 &priv->staging_rxon, sizeof(priv->staging_rxon)))
3854 iwl3945_commit_rxon(priv);
3855 else
3856 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration\n");
3857
3858 IWL_DEBUG_MAC80211(priv, "leave\n");
3859
3860out:
3861 clear_bit(STATUS_CONF_PENDING, &priv->status);
3862 mutex_unlock(&priv->mutex);
3863 return ret;
3864}
3865
3866static void iwl3945_config_ap(struct iwl_priv *priv)
3867{ 3393{
3868 int rc = 0; 3394 int rc = 0;
3869 3395
@@ -3875,7 +3401,7 @@ static void iwl3945_config_ap(struct iwl_priv *priv)
3875 3401
3876 /* RXON - unassoc (to set timing command) */ 3402 /* RXON - unassoc (to set timing command) */
3877 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 3403 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3878 iwl3945_commit_rxon(priv); 3404 iwlcore_commit_rxon(priv);
3879 3405
3880 /* RXON Timing */ 3406 /* RXON Timing */
3881 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd)); 3407 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
@@ -3911,8 +3437,8 @@ static void iwl3945_config_ap(struct iwl_priv *priv)
3911 } 3437 }
3912 /* restore RXON assoc */ 3438 /* restore RXON assoc */
3913 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; 3439 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3914 iwl3945_commit_rxon(priv); 3440 iwlcore_commit_rxon(priv);
3915 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0); 3441 priv->cfg->ops->smgmt->add_station(priv, iwl_bcast_addr, 0, 0, NULL);
3916 } 3442 }
3917 iwl3945_send_beacon_cmd(priv); 3443 iwl3945_send_beacon_cmd(priv);
3918 3444
@@ -3921,189 +3447,6 @@ static void iwl3945_config_ap(struct iwl_priv *priv)
3921 * clear sta table, add BCAST sta... */ 3447 * clear sta table, add BCAST sta... */
3922} 3448}
3923 3449
3924static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
3925 struct ieee80211_vif *vif,
3926 struct ieee80211_if_conf *conf)
3927{
3928 struct iwl_priv *priv = hw->priv;
3929 int rc;
3930
3931 if (conf == NULL)
3932 return -EIO;
3933
3934 if (priv->vif != vif) {
3935 IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
3936 return 0;
3937 }
3938
3939 /* handle this temporarily here */
3940 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
3941 conf->changed & IEEE80211_IFCC_BEACON) {
3942 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
3943 if (!beacon)
3944 return -ENOMEM;
3945 mutex_lock(&priv->mutex);
3946 rc = iwl3945_mac_beacon_update(hw, beacon);
3947 mutex_unlock(&priv->mutex);
3948 if (rc)
3949 return rc;
3950 }
3951
3952 if (!iwl_is_alive(priv))
3953 return -EAGAIN;
3954
3955 mutex_lock(&priv->mutex);
3956
3957 if (conf->bssid)
3958 IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
3959
3960/*
3961 * very dubious code was here; the probe filtering flag is never set:
3962 *
3963 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
3964 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
3965 */
3966
3967 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3968 if (!conf->bssid) {
3969 conf->bssid = priv->mac_addr;
3970 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
3971 IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
3972 conf->bssid);
3973 }
3974 if (priv->ibss_beacon)
3975 dev_kfree_skb(priv->ibss_beacon);
3976
3977 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
3978 }
3979
3980 if (iwl_is_rfkill(priv))
3981 goto done;
3982
3983 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
3984 !is_multicast_ether_addr(conf->bssid)) {
3985 /* If there is currently a HW scan going on in the background
3986 * then we need to cancel it else the RXON below will fail. */
3987 if (iwl_scan_cancel_timeout(priv, 100)) {
3988 IWL_WARN(priv, "Aborted scan still in progress "
3989 "after 100ms\n");
3990 IWL_DEBUG_MAC80211(priv, "leaving:scan abort failed\n");
3991 mutex_unlock(&priv->mutex);
3992 return -EAGAIN;
3993 }
3994 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
3995
3996 /* TODO: Audit driver for usage of these members and see
3997 * if mac80211 deprecates them (priv->bssid looks like it
3998 * shouldn't be there, but I haven't scanned the IBSS code
3999 * to verify) - jpk */
4000 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
4001
4002 if (priv->iw_mode == NL80211_IFTYPE_AP)
4003 iwl3945_config_ap(priv);
4004 else {
4005 rc = iwl3945_commit_rxon(priv);
4006 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4007 iwl3945_add_station(priv,
4008 priv->active_rxon.bssid_addr, 1, 0);
4009 }
4010
4011 } else {
4012 iwl_scan_cancel_timeout(priv, 100);
4013 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4014 iwl3945_commit_rxon(priv);
4015 }
4016
4017 done:
4018 IWL_DEBUG_MAC80211(priv, "leave\n");
4019 mutex_unlock(&priv->mutex);
4020
4021 return 0;
4022}
4023
4024static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
4025 struct ieee80211_if_init_conf *conf)
4026{
4027 struct iwl_priv *priv = hw->priv;
4028
4029 IWL_DEBUG_MAC80211(priv, "enter\n");
4030
4031 mutex_lock(&priv->mutex);
4032
4033 if (iwl_is_ready_rf(priv)) {
4034 iwl_scan_cancel_timeout(priv, 100);
4035 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4036 iwl3945_commit_rxon(priv);
4037 }
4038 if (priv->vif == conf->vif) {
4039 priv->vif = NULL;
4040 memset(priv->bssid, 0, ETH_ALEN);
4041 }
4042 mutex_unlock(&priv->mutex);
4043
4044 IWL_DEBUG_MAC80211(priv, "leave\n");
4045}
4046
4047#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
4048
4049static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
4050 struct ieee80211_vif *vif,
4051 struct ieee80211_bss_conf *bss_conf,
4052 u32 changes)
4053{
4054 struct iwl_priv *priv = hw->priv;
4055
4056 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
4057
4058 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
4059 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
4060 bss_conf->use_short_preamble);
4061 if (bss_conf->use_short_preamble)
4062 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
4063 else
4064 priv->staging_rxon.flags &=
4065 ~RXON_FLG_SHORT_PREAMBLE_MSK;
4066 }
4067
4068 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
4069 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n",
4070 bss_conf->use_cts_prot);
4071 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
4072 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
4073 else
4074 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
4075 }
4076
4077 if (changes & BSS_CHANGED_ASSOC) {
4078 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
4079 /* This should never happen as this function should
4080 * never be called from interrupt context. */
4081 if (WARN_ON_ONCE(in_interrupt()))
4082 return;
4083 if (bss_conf->assoc) {
4084 priv->assoc_id = bss_conf->aid;
4085 priv->beacon_int = bss_conf->beacon_int;
4086 priv->timestamp = bss_conf->timestamp;
4087 priv->assoc_capability = bss_conf->assoc_capability;
4088 priv->power_data.dtim_period = bss_conf->dtim_period;
4089 priv->next_scan_jiffies = jiffies +
4090 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
4091 mutex_lock(&priv->mutex);
4092 iwl3945_post_associate(priv);
4093 mutex_unlock(&priv->mutex);
4094 } else {
4095 priv->assoc_id = 0;
4096 IWL_DEBUG_MAC80211(priv,
4097 "DISASSOC %d\n", bss_conf->assoc);
4098 }
4099 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
4100 IWL_DEBUG_MAC80211(priv,
4101 "Associated Changes %d\n", changes);
4102 iwl3945_send_rxon_assoc(priv);
4103 }
4104
4105}
4106
4107static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 3450static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
4108 struct ieee80211_vif *vif, 3451 struct ieee80211_vif *vif,
4109 struct ieee80211_sta *sta, 3452 struct ieee80211_sta *sta,
@@ -4126,7 +3469,7 @@ static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
4126 static_key = !iwl_is_associated(priv); 3469 static_key = !iwl_is_associated(priv);
4127 3470
4128 if (!static_key) { 3471 if (!static_key) {
4129 sta_id = iwl3945_hw_find_station(priv, addr); 3472 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
4130 if (sta_id == IWL_INVALID_STATION) { 3473 if (sta_id == IWL_INVALID_STATION) {
4131 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n", 3474 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
4132 addr); 3475 addr);
@@ -4162,185 +3505,6 @@ static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
4162 return ret; 3505 return ret;
4163} 3506}
4164 3507
4165static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
4166 const struct ieee80211_tx_queue_params *params)
4167{
4168 struct iwl_priv *priv = hw->priv;
4169 unsigned long flags;
4170 int q;
4171
4172 IWL_DEBUG_MAC80211(priv, "enter\n");
4173
4174 if (!iwl_is_ready_rf(priv)) {
4175 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
4176 return -EIO;
4177 }
4178
4179 if (queue >= AC_NUM) {
4180 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
4181 return 0;
4182 }
4183
4184 q = AC_NUM - 1 - queue;
4185
4186 spin_lock_irqsave(&priv->lock, flags);
4187
4188 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
4189 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
4190 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4191 priv->qos_data.def_qos_parm.ac[q].edca_txop =
4192 cpu_to_le16((params->txop * 32));
4193
4194 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
4195 priv->qos_data.qos_active = 1;
4196
4197 spin_unlock_irqrestore(&priv->lock, flags);
4198
4199 mutex_lock(&priv->mutex);
4200 if (priv->iw_mode == NL80211_IFTYPE_AP)
4201 iwl_activate_qos(priv, 1);
4202 else if (priv->assoc_id && iwl_is_associated(priv))
4203 iwl_activate_qos(priv, 0);
4204
4205 mutex_unlock(&priv->mutex);
4206
4207 IWL_DEBUG_MAC80211(priv, "leave\n");
4208 return 0;
4209}
4210
4211static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
4212 struct ieee80211_tx_queue_stats *stats)
4213{
4214 struct iwl_priv *priv = hw->priv;
4215 int i, avail;
4216 struct iwl_tx_queue *txq;
4217 struct iwl_queue *q;
4218 unsigned long flags;
4219
4220 IWL_DEBUG_MAC80211(priv, "enter\n");
4221
4222 if (!iwl_is_ready_rf(priv)) {
4223 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
4224 return -EIO;
4225 }
4226
4227 spin_lock_irqsave(&priv->lock, flags);
4228
4229 for (i = 0; i < AC_NUM; i++) {
4230 txq = &priv->txq[i];
4231 q = &txq->q;
4232 avail = iwl_queue_space(q);
4233
4234 stats[i].len = q->n_window - avail;
4235 stats[i].limit = q->n_window - q->high_mark;
4236 stats[i].count = q->n_window;
4237
4238 }
4239 spin_unlock_irqrestore(&priv->lock, flags);
4240
4241 IWL_DEBUG_MAC80211(priv, "leave\n");
4242
4243 return 0;
4244}
4245
4246static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
4247{
4248 struct iwl_priv *priv = hw->priv;
4249 unsigned long flags;
4250
4251 mutex_lock(&priv->mutex);
4252 IWL_DEBUG_MAC80211(priv, "enter\n");
4253
4254 iwl_reset_qos(priv);
4255
4256 spin_lock_irqsave(&priv->lock, flags);
4257 priv->assoc_id = 0;
4258 priv->assoc_capability = 0;
4259
4260 /* new association get rid of ibss beacon skb */
4261 if (priv->ibss_beacon)
4262 dev_kfree_skb(priv->ibss_beacon);
4263
4264 priv->ibss_beacon = NULL;
4265
4266 priv->beacon_int = priv->hw->conf.beacon_int;
4267 priv->timestamp = 0;
4268 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
4269 priv->beacon_int = 0;
4270
4271 spin_unlock_irqrestore(&priv->lock, flags);
4272
4273 if (!iwl_is_ready_rf(priv)) {
4274 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
4275 mutex_unlock(&priv->mutex);
4276 return;
4277 }
4278
4279 /* we are restarting association process
4280 * clear RXON_FILTER_ASSOC_MSK bit
4281 */
4282 if (priv->iw_mode != NL80211_IFTYPE_AP) {
4283 iwl_scan_cancel_timeout(priv, 100);
4284 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4285 iwl3945_commit_rxon(priv);
4286 }
4287
4288 /* Per mac80211.h: This is only used in IBSS mode... */
4289 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
4290
4291 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
4292 mutex_unlock(&priv->mutex);
4293 return;
4294 }
4295
4296 iwl_set_rate(priv);
4297
4298 mutex_unlock(&priv->mutex);
4299
4300 IWL_DEBUG_MAC80211(priv, "leave\n");
4301
4302}
4303
4304static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
4305{
4306 struct iwl_priv *priv = hw->priv;
4307 unsigned long flags;
4308 __le64 timestamp;
4309
4310 IWL_DEBUG_MAC80211(priv, "enter\n");
4311
4312 if (!iwl_is_ready_rf(priv)) {
4313 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
4314 return -EIO;
4315 }
4316
4317 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
4318 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
4319 return -EIO;
4320 }
4321
4322 spin_lock_irqsave(&priv->lock, flags);
4323
4324 if (priv->ibss_beacon)
4325 dev_kfree_skb(priv->ibss_beacon);
4326
4327 priv->ibss_beacon = skb;
4328
4329 priv->assoc_id = 0;
4330 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
4331 priv->timestamp = le64_to_cpu(timestamp);
4332
4333 IWL_DEBUG_MAC80211(priv, "leave\n");
4334 spin_unlock_irqrestore(&priv->lock, flags);
4335
4336 iwl_reset_qos(priv);
4337
4338 iwl3945_post_associate(priv);
4339
4340
4341 return 0;
4342}
4343
4344/***************************************************************************** 3508/*****************************************************************************
4345 * 3509 *
4346 * sysfs attributes 3510 * sysfs attributes
@@ -4359,7 +3523,7 @@ static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *sk
4359static ssize_t show_debug_level(struct device *d, 3523static ssize_t show_debug_level(struct device *d,
4360 struct device_attribute *attr, char *buf) 3524 struct device_attribute *attr, char *buf)
4361{ 3525{
4362 struct iwl_priv *priv = d->driver_data; 3526 struct iwl_priv *priv = dev_get_drvdata(d);
4363 3527
4364 return sprintf(buf, "0x%08X\n", priv->debug_level); 3528 return sprintf(buf, "0x%08X\n", priv->debug_level);
4365} 3529}
@@ -4367,7 +3531,7 @@ static ssize_t store_debug_level(struct device *d,
4367 struct device_attribute *attr, 3531 struct device_attribute *attr,
4368 const char *buf, size_t count) 3532 const char *buf, size_t count)
4369{ 3533{
4370 struct iwl_priv *priv = d->driver_data; 3534 struct iwl_priv *priv = dev_get_drvdata(d);
4371 unsigned long val; 3535 unsigned long val;
4372 int ret; 3536 int ret;
4373 3537
@@ -4388,7 +3552,7 @@ static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
4388static ssize_t show_temperature(struct device *d, 3552static ssize_t show_temperature(struct device *d,
4389 struct device_attribute *attr, char *buf) 3553 struct device_attribute *attr, char *buf)
4390{ 3554{
4391 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 3555 struct iwl_priv *priv = dev_get_drvdata(d);
4392 3556
4393 if (!iwl_is_alive(priv)) 3557 if (!iwl_is_alive(priv))
4394 return -EAGAIN; 3558 return -EAGAIN;
@@ -4401,7 +3565,7 @@ static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
4401static ssize_t show_tx_power(struct device *d, 3565static ssize_t show_tx_power(struct device *d,
4402 struct device_attribute *attr, char *buf) 3566 struct device_attribute *attr, char *buf)
4403{ 3567{
4404 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 3568 struct iwl_priv *priv = dev_get_drvdata(d);
4405 return sprintf(buf, "%d\n", priv->tx_power_user_lmt); 3569 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
4406} 3570}
4407 3571
@@ -4409,7 +3573,7 @@ static ssize_t store_tx_power(struct device *d,
4409 struct device_attribute *attr, 3573 struct device_attribute *attr,
4410 const char *buf, size_t count) 3574 const char *buf, size_t count)
4411{ 3575{
4412 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 3576 struct iwl_priv *priv = dev_get_drvdata(d);
4413 char *p = (char *)buf; 3577 char *p = (char *)buf;
4414 u32 val; 3578 u32 val;
4415 3579
@@ -4427,7 +3591,7 @@ static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
4427static ssize_t show_flags(struct device *d, 3591static ssize_t show_flags(struct device *d,
4428 struct device_attribute *attr, char *buf) 3592 struct device_attribute *attr, char *buf)
4429{ 3593{
4430 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 3594 struct iwl_priv *priv = dev_get_drvdata(d);
4431 3595
4432 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); 3596 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
4433} 3597}
@@ -4436,7 +3600,7 @@ static ssize_t store_flags(struct device *d,
4436 struct device_attribute *attr, 3600 struct device_attribute *attr,
4437 const char *buf, size_t count) 3601 const char *buf, size_t count)
4438{ 3602{
4439 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 3603 struct iwl_priv *priv = dev_get_drvdata(d);
4440 u32 flags = simple_strtoul(buf, NULL, 0); 3604 u32 flags = simple_strtoul(buf, NULL, 0);
4441 3605
4442 mutex_lock(&priv->mutex); 3606 mutex_lock(&priv->mutex);
@@ -4448,7 +3612,7 @@ static ssize_t store_flags(struct device *d,
4448 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n", 3612 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
4449 flags); 3613 flags);
4450 priv->staging_rxon.flags = cpu_to_le32(flags); 3614 priv->staging_rxon.flags = cpu_to_le32(flags);
4451 iwl3945_commit_rxon(priv); 3615 iwlcore_commit_rxon(priv);
4452 } 3616 }
4453 } 3617 }
4454 mutex_unlock(&priv->mutex); 3618 mutex_unlock(&priv->mutex);
@@ -4461,7 +3625,7 @@ static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
4461static ssize_t show_filter_flags(struct device *d, 3625static ssize_t show_filter_flags(struct device *d,
4462 struct device_attribute *attr, char *buf) 3626 struct device_attribute *attr, char *buf)
4463{ 3627{
4464 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 3628 struct iwl_priv *priv = dev_get_drvdata(d);
4465 3629
4466 return sprintf(buf, "0x%04X\n", 3630 return sprintf(buf, "0x%04X\n",
4467 le32_to_cpu(priv->active_rxon.filter_flags)); 3631 le32_to_cpu(priv->active_rxon.filter_flags));
@@ -4471,7 +3635,7 @@ static ssize_t store_filter_flags(struct device *d,
4471 struct device_attribute *attr, 3635 struct device_attribute *attr,
4472 const char *buf, size_t count) 3636 const char *buf, size_t count)
4473{ 3637{
4474 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 3638 struct iwl_priv *priv = dev_get_drvdata(d);
4475 u32 filter_flags = simple_strtoul(buf, NULL, 0); 3639 u32 filter_flags = simple_strtoul(buf, NULL, 0);
4476 3640
4477 mutex_lock(&priv->mutex); 3641 mutex_lock(&priv->mutex);
@@ -4484,7 +3648,7 @@ static ssize_t store_filter_flags(struct device *d,
4484 "0x%04X\n", filter_flags); 3648 "0x%04X\n", filter_flags);
4485 priv->staging_rxon.filter_flags = 3649 priv->staging_rxon.filter_flags =
4486 cpu_to_le32(filter_flags); 3650 cpu_to_le32(filter_flags);
4487 iwl3945_commit_rxon(priv); 3651 iwlcore_commit_rxon(priv);
4488 } 3652 }
4489 } 3653 }
4490 mutex_unlock(&priv->mutex); 3654 mutex_unlock(&priv->mutex);
@@ -4624,26 +3788,11 @@ static ssize_t show_power_level(struct device *d,
4624{ 3788{
4625 struct iwl_priv *priv = dev_get_drvdata(d); 3789 struct iwl_priv *priv = dev_get_drvdata(d);
4626 int mode = priv->power_data.user_power_setting; 3790 int mode = priv->power_data.user_power_setting;
4627 int system = priv->power_data.system_power_setting;
4628 int level = priv->power_data.power_mode; 3791 int level = priv->power_data.power_mode;
4629 char *p = buf; 3792 char *p = buf;
4630 3793
4631 switch (system) { 3794 p += sprintf(p, "INDEX:%d\t", level);
4632 case IWL_POWER_SYS_AUTO: 3795 p += sprintf(p, "USER:%d\n", mode);
4633 p += sprintf(p, "SYSTEM:auto");
4634 break;
4635 case IWL_POWER_SYS_AC:
4636 p += sprintf(p, "SYSTEM:ac");
4637 break;
4638 case IWL_POWER_SYS_BATTERY:
4639 p += sprintf(p, "SYSTEM:battery");
4640 break;
4641 }
4642
4643 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
4644 "fixed" : "auto");
4645 p += sprintf(p, "\tINDEX:%d", level);
4646 p += sprintf(p, "\n");
4647 return p - buf + 1; 3796 return p - buf + 1;
4648} 3797}
4649 3798
@@ -4756,7 +3905,7 @@ static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
4756static ssize_t show_status(struct device *d, 3905static ssize_t show_status(struct device *d,
4757 struct device_attribute *attr, char *buf) 3906 struct device_attribute *attr, char *buf)
4758{ 3907{
4759 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; 3908 struct iwl_priv *priv = dev_get_drvdata(d);
4760 if (!iwl_is_alive(priv)) 3909 if (!iwl_is_alive(priv))
4761 return -EAGAIN; 3910 return -EAGAIN;
4762 return sprintf(buf, "0x%08x\n", (int)priv->status); 3911 return sprintf(buf, "0x%08x\n", (int)priv->status);
@@ -4768,10 +3917,11 @@ static ssize_t dump_error_log(struct device *d,
4768 struct device_attribute *attr, 3917 struct device_attribute *attr,
4769 const char *buf, size_t count) 3918 const char *buf, size_t count)
4770{ 3919{
3920 struct iwl_priv *priv = dev_get_drvdata(d);
4771 char *p = (char *)buf; 3921 char *p = (char *)buf;
4772 3922
4773 if (p[0] == '1') 3923 if (p[0] == '1')
4774 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data); 3924 iwl3945_dump_nic_error_log(priv);
4775 3925
4776 return strnlen(buf, count); 3926 return strnlen(buf, count);
4777} 3927}
@@ -4782,10 +3932,11 @@ static ssize_t dump_event_log(struct device *d,
4782 struct device_attribute *attr, 3932 struct device_attribute *attr,
4783 const char *buf, size_t count) 3933 const char *buf, size_t count)
4784{ 3934{
3935 struct iwl_priv *priv = dev_get_drvdata(d);
4785 char *p = (char *)buf; 3936 char *p = (char *)buf;
4786 3937
4787 if (p[0] == '1') 3938 if (p[0] == '1')
4788 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data); 3939 iwl3945_dump_nic_event_log(priv);
4789 3940
4790 return strnlen(buf, count); 3941 return strnlen(buf, count);
4791} 3942}
@@ -4864,16 +4015,15 @@ static struct ieee80211_ops iwl3945_hw_ops = {
4864 .tx = iwl3945_mac_tx, 4015 .tx = iwl3945_mac_tx,
4865 .start = iwl3945_mac_start, 4016 .start = iwl3945_mac_start,
4866 .stop = iwl3945_mac_stop, 4017 .stop = iwl3945_mac_stop,
4867 .add_interface = iwl3945_mac_add_interface, 4018 .add_interface = iwl_mac_add_interface,
4868 .remove_interface = iwl3945_mac_remove_interface, 4019 .remove_interface = iwl_mac_remove_interface,
4869 .config = iwl3945_mac_config, 4020 .config = iwl_mac_config,
4870 .config_interface = iwl3945_mac_config_interface,
4871 .configure_filter = iwl_configure_filter, 4021 .configure_filter = iwl_configure_filter,
4872 .set_key = iwl3945_mac_set_key, 4022 .set_key = iwl3945_mac_set_key,
4873 .get_tx_stats = iwl3945_mac_get_tx_stats, 4023 .get_tx_stats = iwl_mac_get_tx_stats,
4874 .conf_tx = iwl3945_mac_conf_tx, 4024 .conf_tx = iwl_mac_conf_tx,
4875 .reset_tsf = iwl3945_mac_reset_tsf, 4025 .reset_tsf = iwl_mac_reset_tsf,
4876 .bss_info_changed = iwl3945_bss_info_changed, 4026 .bss_info_changed = iwl_bss_info_changed,
4877 .hw_scan = iwl_mac_hw_scan 4027 .hw_scan = iwl_mac_hw_scan
4878}; 4028};
4879 4029
@@ -4886,7 +4036,6 @@ static int iwl3945_init_drv(struct iwl_priv *priv)
4886 priv->ibss_beacon = NULL; 4036 priv->ibss_beacon = NULL;
4887 4037
4888 spin_lock_init(&priv->lock); 4038 spin_lock_init(&priv->lock);
4889 spin_lock_init(&priv->power_data.lock);
4890 spin_lock_init(&priv->sta_lock); 4039 spin_lock_init(&priv->sta_lock);
4891 spin_lock_init(&priv->hcmd_lock); 4040 spin_lock_init(&priv->hcmd_lock);
4892 4041
@@ -4895,7 +4044,7 @@ static int iwl3945_init_drv(struct iwl_priv *priv)
4895 mutex_init(&priv->mutex); 4044 mutex_init(&priv->mutex);
4896 4045
4897 /* Clear the driver's (not device's) station table */ 4046 /* Clear the driver's (not device's) station table */
4898 iwl3945_clear_stations_table(priv); 4047 priv->cfg->ops->smgmt->clear_station_table(priv);
4899 4048
4900 priv->data_retry_limit = -1; 4049 priv->data_retry_limit = -1;
4901 priv->ieee_channels = NULL; 4050 priv->ieee_channels = NULL;
@@ -4966,13 +4115,13 @@ static int iwl3945_setup_mac(struct iwl_priv *priv)
4966 4115
4967 hw->wiphy->custom_regulatory = true; 4116 hw->wiphy->custom_regulatory = true;
4968 4117
4969 hw->wiphy->max_scan_ssids = 1; /* WILL FIX */ 4118 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
4119 /* we create the 802.11 header and a zero-length SSID element */
4120 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
4970 4121
4971 /* Default value; 4 EDCA QOS priorities */ 4122 /* Default value; 4 EDCA QOS priorities */
4972 hw->queues = 4; 4123 hw->queues = 4;
4973 4124
4974 hw->conf.beacon_int = 100;
4975
4976 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) 4125 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4977 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 4126 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4978 &priv->bands[IEEE80211_BAND_2GHZ]; 4127 &priv->bands[IEEE80211_BAND_2GHZ];
@@ -5037,6 +4186,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
5037 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n"); 4186 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
5038 priv->cfg = cfg; 4187 priv->cfg = cfg;
5039 priv->pci_dev = pdev; 4188 priv->pci_dev = pdev;
4189 priv->inta_mask = CSR_INI_SET_MASK;
5040 4190
5041#ifdef CONFIG_IWLWIFI_DEBUG 4191#ifdef CONFIG_IWLWIFI_DEBUG
5042 priv->debug_level = iwl3945_mod_params.debug; 4192 priv->debug_level = iwl3945_mod_params.debug;
@@ -5083,6 +4233,11 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
5083 * PCI Tx retries from interfering with C3 CPU state */ 4233 * PCI Tx retries from interfering with C3 CPU state */
5084 pci_write_config_byte(pdev, 0x41, 0x00); 4234 pci_write_config_byte(pdev, 0x41, 0x00);
5085 4235
4236 /* this spin lock will be used in apm_ops.init and EEPROM access
4237 * we should init now
4238 */
4239 spin_lock_init(&priv->reg_lock);
4240
5086 /* amp init */ 4241 /* amp init */
5087 err = priv->cfg->ops->lib->apm_ops.init(priv); 4242 err = priv->cfg->ops->lib->apm_ops.init(priv);
5088 if (err < 0) { 4243 if (err < 0) {
@@ -5128,20 +4283,8 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
5128 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n", 4283 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
5129 priv->cfg->name); 4284 priv->cfg->name);
5130 4285
5131 /***********************************
5132 * 7. Initialize Module Parameters
5133 * **********************************/
5134
5135 /* Initialize module parameter values here */
5136 /* Disable radio (SW RF KILL) via parameter when loading driver */
5137 if (iwl3945_mod_params.disable) {
5138 set_bit(STATUS_RF_KILL_SW, &priv->status);
5139 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
5140 }
5141
5142
5143 /*********************** 4286 /***********************
5144 * 8. Setup Services 4287 * 7. Setup Services
5145 * ********************/ 4288 * ********************/
5146 4289
5147 spin_lock_irqsave(&priv->lock, flags); 4290 spin_lock_irqsave(&priv->lock, flags);
@@ -5150,8 +4293,8 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
5150 4293
5151 pci_enable_msi(priv->pci_dev); 4294 pci_enable_msi(priv->pci_dev);
5152 4295
5153 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED, 4296 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
5154 DRV_NAME, priv); 4297 IRQF_SHARED, DRV_NAME, priv);
5155 if (err) { 4298 if (err) {
5156 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); 4299 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
5157 goto out_disable_msi; 4300 goto out_disable_msi;
@@ -5169,7 +4312,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
5169 iwl3945_setup_rx_handlers(priv); 4312 iwl3945_setup_rx_handlers(priv);
5170 4313
5171 /********************************* 4314 /*********************************
5172 * 9. Setup and Register mac80211 4315 * 8. Setup and Register mac80211
5173 * *******************************/ 4316 * *******************************/
5174 4317
5175 iwl_enable_interrupts(priv); 4318 iwl_enable_interrupts(priv);
@@ -5178,6 +4321,10 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
5178 if (err) 4321 if (err)
5179 goto out_remove_sysfs; 4322 goto out_remove_sysfs;
5180 4323
4324 err = iwl_dbgfs_register(priv, DRV_NAME);
4325 if (err)
4326 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4327
5181 err = iwl_rfkill_init(priv); 4328 err = iwl_rfkill_init(priv);
5182 if (err) 4329 if (err)
5183 IWL_ERR(priv, "Unable to initialize RFKILL system. " 4330 IWL_ERR(priv, "Unable to initialize RFKILL system. "
@@ -5228,6 +4375,8 @@ static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
5228 4375
5229 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n"); 4376 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
5230 4377
4378 iwl_dbgfs_unregister(priv);
4379
5231 set_bit(STATUS_EXIT_PENDING, &priv->status); 4380 set_bit(STATUS_EXIT_PENDING, &priv->status);
5232 4381
5233 if (priv->mac80211_registered) { 4382 if (priv->mac80211_registered) {
@@ -5258,7 +4407,7 @@ static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
5258 iwl3945_hw_txq_ctx_free(priv); 4407 iwl3945_hw_txq_ctx_free(priv);
5259 4408
5260 iwl3945_unset_hw_params(priv); 4409 iwl3945_unset_hw_params(priv);
5261 iwl3945_clear_stations_table(priv); 4410 priv->cfg->ops->smgmt->clear_station_table(priv);
5262 4411
5263 /*netif_stop_queue(dev); */ 4412 /*netif_stop_queue(dev); */
5264 flush_workqueue(priv->workqueue); 4413 flush_workqueue(priv->workqueue);
@@ -5286,43 +4435,6 @@ static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
5286 ieee80211_free_hw(priv->hw); 4435 ieee80211_free_hw(priv->hw);
5287} 4436}
5288 4437
5289#ifdef CONFIG_PM
5290
5291static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
5292{
5293 struct iwl_priv *priv = pci_get_drvdata(pdev);
5294
5295 if (priv->is_open) {
5296 set_bit(STATUS_IN_SUSPEND, &priv->status);
5297 iwl3945_mac_stop(priv->hw);
5298 priv->is_open = 1;
5299 }
5300 pci_save_state(pdev);
5301 pci_disable_device(pdev);
5302 pci_set_power_state(pdev, PCI_D3hot);
5303
5304 return 0;
5305}
5306
5307static int iwl3945_pci_resume(struct pci_dev *pdev)
5308{
5309 struct iwl_priv *priv = pci_get_drvdata(pdev);
5310 int ret;
5311
5312 pci_set_power_state(pdev, PCI_D0);
5313 ret = pci_enable_device(pdev);
5314 if (ret)
5315 return ret;
5316 pci_restore_state(pdev);
5317
5318 if (priv->is_open)
5319 iwl3945_mac_start(priv->hw);
5320
5321 clear_bit(STATUS_IN_SUSPEND, &priv->status);
5322 return 0;
5323}
5324
5325#endif /* CONFIG_PM */
5326 4438
5327/***************************************************************************** 4439/*****************************************************************************
5328 * 4440 *
@@ -5336,8 +4448,8 @@ static struct pci_driver iwl3945_driver = {
5336 .probe = iwl3945_pci_probe, 4448 .probe = iwl3945_pci_probe,
5337 .remove = __devexit_p(iwl3945_pci_remove), 4449 .remove = __devexit_p(iwl3945_pci_remove),
5338#ifdef CONFIG_PM 4450#ifdef CONFIG_PM
5339 .suspend = iwl3945_pci_suspend, 4451 .suspend = iwl_pci_suspend,
5340 .resume = iwl3945_pci_resume, 4452 .resume = iwl_pci_resume,
5341#endif 4453#endif
5342}; 4454};
5343 4455
@@ -5378,8 +4490,6 @@ MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
5378 4490
5379module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444); 4491module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
5380MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); 4492MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
5381module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
5382MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
5383module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444); 4493module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
5384MODULE_PARM_DESC(swcrypto, 4494MODULE_PARM_DESC(swcrypto,
5385 "using software crypto (default 1 [software])\n"); 4495 "using software crypto (default 1 [software])\n");
diff --git a/drivers/net/wireless/iwmc3200wifi/Kconfig b/drivers/net/wireless/iwmc3200wifi/Kconfig
new file mode 100644
index 000000000000..41bd4b2b5411
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/Kconfig
@@ -0,0 +1,24 @@
1config IWM
2 tristate "Intel Wireless Multicomm 3200 WiFi driver"
3 depends on MMC && WLAN_80211 && EXPERIMENTAL
4 select WIRELESS_EXT
5 select CFG80211
6 select FW_LOADER
7 select RFKILL
8
9config IWM_DEBUG
10 bool "Enable full debugging output in iwmc3200wifi"
11 depends on IWM && DEBUG_FS
12 ---help---
13 This option will enable debug tracing and setting for iwm
14
15 You can set the debug level and module through debugfs. By
16 default all modules are set to the IWL_DL_ERR level.
17 To see the list of debug modules and levels, see iwm/debug.h
18
19 For example, if you want the full MLME debug output:
20 echo 0xff > /debug/iwm/phyN/debug/mlme
21
22 Or, if you want the full debug, for all modules:
23 echo 0xff > /debug/iwm/phyN/debug/level
24 echo 0xff > /debug/iwm/phyN/debug/modules
diff --git a/drivers/net/wireless/iwmc3200wifi/Makefile b/drivers/net/wireless/iwmc3200wifi/Makefile
new file mode 100644
index 000000000000..7cb415e5c11b
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/Makefile
@@ -0,0 +1,5 @@
1obj-$(CONFIG_IWM) := iwmc3200wifi.o
2iwmc3200wifi-objs += main.o netdev.o rx.o tx.o sdio.o hal.o fw.o
3iwmc3200wifi-objs += commands.o wext.o cfg80211.o eeprom.o rfkill.o
4
5iwmc3200wifi-$(CONFIG_IWM_DEBUG) += debugfs.o
diff --git a/drivers/net/wireless/iwmc3200wifi/bus.h b/drivers/net/wireless/iwmc3200wifi/bus.h
new file mode 100644
index 000000000000..836663eec257
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/bus.h
@@ -0,0 +1,57 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
5 * Samuel Ortiz <samuel.ortiz@intel.com>
6 * Zhu Yi <yi.zhu@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 */
23
24#ifndef __IWM_BUS_H__
25#define __IWM_BUS_H__
26
27#include "iwm.h"
28
29struct iwm_if_ops {
30 int (*enable)(struct iwm_priv *iwm);
31 int (*disable)(struct iwm_priv *iwm);
32 int (*send_chunk)(struct iwm_priv *iwm, u8* buf, int count);
33
34 int (*debugfs_init)(struct iwm_priv *iwm, struct dentry *parent_dir);
35 void (*debugfs_exit)(struct iwm_priv *iwm);
36
37 const char *umac_name;
38 const char *calib_lmac_name;
39 const char *lmac_name;
40};
41
42static inline int iwm_bus_send_chunk(struct iwm_priv *iwm, u8 *buf, int count)
43{
44 return iwm->bus_ops->send_chunk(iwm, buf, count);
45}
46
47static inline int iwm_bus_enable(struct iwm_priv *iwm)
48{
49 return iwm->bus_ops->enable(iwm);
50}
51
52static inline int iwm_bus_disable(struct iwm_priv *iwm)
53{
54 return iwm->bus_ops->disable(iwm);
55}
56
57#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/cfg80211.c b/drivers/net/wireless/iwmc3200wifi/cfg80211.c
new file mode 100644
index 000000000000..3256ad2c96ce
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/cfg80211.c
@@ -0,0 +1,409 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
5 * Samuel Ortiz <samuel.ortiz@intel.com>
6 * Zhu Yi <yi.zhu@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 */
23
24#include <linux/kernel.h>
25#include <linux/netdevice.h>
26#include <linux/wireless.h>
27#include <linux/ieee80211.h>
28#include <net/cfg80211.h>
29
30#include "iwm.h"
31#include "commands.h"
32#include "cfg80211.h"
33#include "debug.h"
34
35#define RATETAB_ENT(_rate, _rateid, _flags) \
36 { \
37 .bitrate = (_rate), \
38 .hw_value = (_rateid), \
39 .flags = (_flags), \
40 }
41
42#define CHAN2G(_channel, _freq, _flags) { \
43 .band = IEEE80211_BAND_2GHZ, \
44 .center_freq = (_freq), \
45 .hw_value = (_channel), \
46 .flags = (_flags), \
47 .max_antenna_gain = 0, \
48 .max_power = 30, \
49}
50
51#define CHAN5G(_channel, _flags) { \
52 .band = IEEE80211_BAND_5GHZ, \
53 .center_freq = 5000 + (5 * (_channel)), \
54 .hw_value = (_channel), \
55 .flags = (_flags), \
56 .max_antenna_gain = 0, \
57 .max_power = 30, \
58}
59
60static struct ieee80211_rate iwm_rates[] = {
61 RATETAB_ENT(10, 0x1, 0),
62 RATETAB_ENT(20, 0x2, 0),
63 RATETAB_ENT(55, 0x4, 0),
64 RATETAB_ENT(110, 0x8, 0),
65 RATETAB_ENT(60, 0x10, 0),
66 RATETAB_ENT(90, 0x20, 0),
67 RATETAB_ENT(120, 0x40, 0),
68 RATETAB_ENT(180, 0x80, 0),
69 RATETAB_ENT(240, 0x100, 0),
70 RATETAB_ENT(360, 0x200, 0),
71 RATETAB_ENT(480, 0x400, 0),
72 RATETAB_ENT(540, 0x800, 0),
73};
74
75#define iwm_a_rates (iwm_rates + 4)
76#define iwm_a_rates_size 8
77#define iwm_g_rates (iwm_rates + 0)
78#define iwm_g_rates_size 12
79
80static struct ieee80211_channel iwm_2ghz_channels[] = {
81 CHAN2G(1, 2412, 0),
82 CHAN2G(2, 2417, 0),
83 CHAN2G(3, 2422, 0),
84 CHAN2G(4, 2427, 0),
85 CHAN2G(5, 2432, 0),
86 CHAN2G(6, 2437, 0),
87 CHAN2G(7, 2442, 0),
88 CHAN2G(8, 2447, 0),
89 CHAN2G(9, 2452, 0),
90 CHAN2G(10, 2457, 0),
91 CHAN2G(11, 2462, 0),
92 CHAN2G(12, 2467, 0),
93 CHAN2G(13, 2472, 0),
94 CHAN2G(14, 2484, 0),
95};
96
97static struct ieee80211_channel iwm_5ghz_a_channels[] = {
98 CHAN5G(34, 0), CHAN5G(36, 0),
99 CHAN5G(38, 0), CHAN5G(40, 0),
100 CHAN5G(42, 0), CHAN5G(44, 0),
101 CHAN5G(46, 0), CHAN5G(48, 0),
102 CHAN5G(52, 0), CHAN5G(56, 0),
103 CHAN5G(60, 0), CHAN5G(64, 0),
104 CHAN5G(100, 0), CHAN5G(104, 0),
105 CHAN5G(108, 0), CHAN5G(112, 0),
106 CHAN5G(116, 0), CHAN5G(120, 0),
107 CHAN5G(124, 0), CHAN5G(128, 0),
108 CHAN5G(132, 0), CHAN5G(136, 0),
109 CHAN5G(140, 0), CHAN5G(149, 0),
110 CHAN5G(153, 0), CHAN5G(157, 0),
111 CHAN5G(161, 0), CHAN5G(165, 0),
112 CHAN5G(184, 0), CHAN5G(188, 0),
113 CHAN5G(192, 0), CHAN5G(196, 0),
114 CHAN5G(200, 0), CHAN5G(204, 0),
115 CHAN5G(208, 0), CHAN5G(212, 0),
116 CHAN5G(216, 0),
117};
118
119static struct ieee80211_supported_band iwm_band_2ghz = {
120 .channels = iwm_2ghz_channels,
121 .n_channels = ARRAY_SIZE(iwm_2ghz_channels),
122 .bitrates = iwm_g_rates,
123 .n_bitrates = iwm_g_rates_size,
124};
125
126static struct ieee80211_supported_band iwm_band_5ghz = {
127 .channels = iwm_5ghz_a_channels,
128 .n_channels = ARRAY_SIZE(iwm_5ghz_a_channels),
129 .bitrates = iwm_a_rates,
130 .n_bitrates = iwm_a_rates_size,
131};
132
133int iwm_cfg80211_inform_bss(struct iwm_priv *iwm)
134{
135 struct wiphy *wiphy = iwm_to_wiphy(iwm);
136 struct iwm_bss_info *bss, *next;
137 struct iwm_umac_notif_bss_info *umac_bss;
138 struct ieee80211_mgmt *mgmt;
139 struct ieee80211_channel *channel;
140 struct ieee80211_supported_band *band;
141 s32 signal;
142 int freq;
143
144 list_for_each_entry_safe(bss, next, &iwm->bss_list, node) {
145 umac_bss = bss->bss;
146 mgmt = (struct ieee80211_mgmt *)(umac_bss->frame_buf);
147
148 if (umac_bss->band == UMAC_BAND_2GHZ)
149 band = wiphy->bands[IEEE80211_BAND_2GHZ];
150 else if (umac_bss->band == UMAC_BAND_5GHZ)
151 band = wiphy->bands[IEEE80211_BAND_5GHZ];
152 else {
153 IWM_ERR(iwm, "Invalid band: %d\n", umac_bss->band);
154 return -EINVAL;
155 }
156
157 freq = ieee80211_channel_to_frequency(umac_bss->channel);
158 channel = ieee80211_get_channel(wiphy, freq);
159 signal = umac_bss->rssi * 100;
160
161 if (!cfg80211_inform_bss_frame(wiphy, channel, mgmt,
162 le16_to_cpu(umac_bss->frame_len),
163 signal, GFP_KERNEL))
164 return -EINVAL;
165 }
166
167 return 0;
168}
169
170static int iwm_cfg80211_change_iface(struct wiphy *wiphy, int ifindex,
171 enum nl80211_iftype type, u32 *flags,
172 struct vif_params *params)
173{
174 struct net_device *ndev;
175 struct wireless_dev *wdev;
176 struct iwm_priv *iwm;
177 u32 old_mode;
178
179 /* we're under RTNL */
180 ndev = __dev_get_by_index(&init_net, ifindex);
181 if (!ndev)
182 return -ENODEV;
183
184 wdev = ndev->ieee80211_ptr;
185 iwm = ndev_to_iwm(ndev);
186 old_mode = iwm->conf.mode;
187
188 switch (type) {
189 case NL80211_IFTYPE_STATION:
190 iwm->conf.mode = UMAC_MODE_BSS;
191 break;
192 case NL80211_IFTYPE_ADHOC:
193 iwm->conf.mode = UMAC_MODE_IBSS;
194 break;
195 default:
196 return -EOPNOTSUPP;
197 }
198
199 wdev->iftype = type;
200
201 if ((old_mode == iwm->conf.mode) || !iwm->umac_profile)
202 return 0;
203
204 iwm->umac_profile->mode = cpu_to_le32(iwm->conf.mode);
205
206 if (iwm->umac_profile_active) {
207 int ret = iwm_invalidate_mlme_profile(iwm);
208 if (ret < 0)
209 IWM_ERR(iwm, "Couldn't invalidate profile\n");
210 }
211
212 return 0;
213}
214
215static int iwm_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
216 struct cfg80211_scan_request *request)
217{
218 struct iwm_priv *iwm = ndev_to_iwm(ndev);
219 int ret;
220
221 if (!test_bit(IWM_STATUS_READY, &iwm->status)) {
222 IWM_ERR(iwm, "Scan while device is not ready\n");
223 return -EIO;
224 }
225
226 if (test_bit(IWM_STATUS_SCANNING, &iwm->status)) {
227 IWM_ERR(iwm, "Scanning already\n");
228 return -EAGAIN;
229 }
230
231 if (test_bit(IWM_STATUS_SCAN_ABORTING, &iwm->status)) {
232 IWM_ERR(iwm, "Scanning being aborted\n");
233 return -EAGAIN;
234 }
235
236 set_bit(IWM_STATUS_SCANNING, &iwm->status);
237
238 ret = iwm_scan_ssids(iwm, request->ssids, request->n_ssids);
239 if (ret) {
240 clear_bit(IWM_STATUS_SCANNING, &iwm->status);
241 return ret;
242 }
243
244 iwm->scan_request = request;
245 return 0;
246}
247
248static int iwm_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed)
249{
250 struct iwm_priv *iwm = wiphy_to_iwm(wiphy);
251
252 if (changed & WIPHY_PARAM_RTS_THRESHOLD &&
253 (iwm->conf.rts_threshold != wiphy->rts_threshold)) {
254 int ret;
255
256 iwm->conf.rts_threshold = wiphy->rts_threshold;
257
258 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
259 CFG_RTS_THRESHOLD,
260 iwm->conf.rts_threshold);
261 if (ret < 0)
262 return ret;
263 }
264
265 if (changed & WIPHY_PARAM_FRAG_THRESHOLD &&
266 (iwm->conf.frag_threshold != wiphy->frag_threshold)) {
267 int ret;
268
269 iwm->conf.frag_threshold = wiphy->frag_threshold;
270
271 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
272 CFG_FRAG_THRESHOLD,
273 iwm->conf.frag_threshold);
274 if (ret < 0)
275 return ret;
276 }
277
278 return 0;
279}
280
281static int iwm_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev,
282 struct cfg80211_ibss_params *params)
283{
284 struct iwm_priv *iwm = wiphy_to_iwm(wiphy);
285 struct ieee80211_channel *chan = params->channel;
286 struct cfg80211_bss *bss;
287
288 if (!test_bit(IWM_STATUS_READY, &iwm->status))
289 return -EIO;
290
291 /* UMAC doesn't support creating IBSS network with specified bssid.
292 * This should be removed after we have join only mode supported. */
293 if (params->bssid)
294 return -EOPNOTSUPP;
295
296 bss = cfg80211_get_ibss(iwm_to_wiphy(iwm), NULL,
297 params->ssid, params->ssid_len);
298 if (!bss) {
299 iwm_scan_one_ssid(iwm, params->ssid, params->ssid_len);
300 schedule_timeout_interruptible(2 * HZ);
301 bss = cfg80211_get_ibss(iwm_to_wiphy(iwm), NULL,
302 params->ssid, params->ssid_len);
303 }
304 /* IBSS join only mode is not supported by UMAC ATM */
305 if (bss) {
306 cfg80211_put_bss(bss);
307 return -EOPNOTSUPP;
308 }
309
310 iwm->channel = ieee80211_frequency_to_channel(chan->center_freq);
311 iwm->umac_profile->ibss.band = chan->band;
312 iwm->umac_profile->ibss.channel = iwm->channel;
313 iwm->umac_profile->ssid.ssid_len = params->ssid_len;
314 memcpy(iwm->umac_profile->ssid.ssid, params->ssid, params->ssid_len);
315
316 if (params->bssid)
317 memcpy(&iwm->umac_profile->bssid[0], params->bssid, ETH_ALEN);
318
319 return iwm_send_mlme_profile(iwm);
320}
321
322static int iwm_cfg80211_leave_ibss(struct wiphy *wiphy, struct net_device *dev)
323{
324 struct iwm_priv *iwm = wiphy_to_iwm(wiphy);
325
326 if (iwm->umac_profile_active)
327 return iwm_invalidate_mlme_profile(iwm);
328
329 return 0;
330}
331
332static struct cfg80211_ops iwm_cfg80211_ops = {
333 .change_virtual_intf = iwm_cfg80211_change_iface,
334 .scan = iwm_cfg80211_scan,
335 .set_wiphy_params = iwm_cfg80211_set_wiphy_params,
336 .join_ibss = iwm_cfg80211_join_ibss,
337 .leave_ibss = iwm_cfg80211_leave_ibss,
338};
339
340struct wireless_dev *iwm_wdev_alloc(int sizeof_bus, struct device *dev)
341{
342 int ret = 0;
343 struct wireless_dev *wdev;
344
345 /*
346 * We're trying to have the following memory
347 * layout:
348 *
349 * +-------------------------+
350 * | struct wiphy |
351 * +-------------------------+
352 * | struct iwm_priv |
353 * +-------------------------+
354 * | bus private data |
355 * | (e.g. iwm_priv_sdio) |
356 * +-------------------------+
357 *
358 */
359
360 wdev = kzalloc(sizeof(struct wireless_dev), GFP_KERNEL);
361 if (!wdev) {
362 dev_err(dev, "Couldn't allocate wireless device\n");
363 return ERR_PTR(-ENOMEM);
364 }
365
366 wdev->wiphy = wiphy_new(&iwm_cfg80211_ops,
367 sizeof(struct iwm_priv) + sizeof_bus);
368 if (!wdev->wiphy) {
369 dev_err(dev, "Couldn't allocate wiphy device\n");
370 ret = -ENOMEM;
371 goto out_err_new;
372 }
373
374 set_wiphy_dev(wdev->wiphy, dev);
375 wdev->wiphy->max_scan_ssids = UMAC_WIFI_IF_PROBE_OPTION_MAX;
376 wdev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
377 BIT(NL80211_IFTYPE_ADHOC);
378 wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = &iwm_band_2ghz;
379 wdev->wiphy->bands[IEEE80211_BAND_5GHZ] = &iwm_band_5ghz;
380 wdev->wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
381
382 ret = wiphy_register(wdev->wiphy);
383 if (ret < 0) {
384 dev_err(dev, "Couldn't register wiphy device\n");
385 goto out_err_register;
386 }
387
388 return wdev;
389
390 out_err_register:
391 wiphy_free(wdev->wiphy);
392
393 out_err_new:
394 kfree(wdev);
395
396 return ERR_PTR(ret);
397}
398
399void iwm_wdev_free(struct iwm_priv *iwm)
400{
401 struct wireless_dev *wdev = iwm_to_wdev(iwm);
402
403 if (!wdev)
404 return;
405
406 wiphy_unregister(wdev->wiphy);
407 wiphy_free(wdev->wiphy);
408 kfree(wdev);
409}
diff --git a/drivers/net/wireless/iwmc3200wifi/cfg80211.h b/drivers/net/wireless/iwmc3200wifi/cfg80211.h
new file mode 100644
index 000000000000..56a34145acbf
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/cfg80211.h
@@ -0,0 +1,31 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
5 * Samuel Ortiz <samuel.ortiz@intel.com>
6 * Zhu Yi <yi.zhu@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 */
23
24#ifndef __IWM_CFG80211_H__
25#define __IWM_CFG80211_H__
26
27int iwm_cfg80211_inform_bss(struct iwm_priv *iwm);
28struct wireless_dev *iwm_wdev_alloc(int sizeof_bus, struct device *dev);
29void iwm_wdev_free(struct iwm_priv *iwm);
30
31#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/commands.c b/drivers/net/wireless/iwmc3200wifi/commands.c
new file mode 100644
index 000000000000..834a7f544e5d
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/commands.c
@@ -0,0 +1,920 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#include <linux/kernel.h>
40#include <linux/wireless.h>
41#include <linux/etherdevice.h>
42#include <linux/ieee80211.h>
43
44#include "iwm.h"
45#include "bus.h"
46#include "hal.h"
47#include "umac.h"
48#include "commands.h"
49#include "debug.h"
50
51static int iwm_send_lmac_ptrough_cmd(struct iwm_priv *iwm,
52 u8 lmac_cmd_id,
53 const void *lmac_payload,
54 u16 lmac_payload_size,
55 u8 resp)
56{
57 struct iwm_udma_wifi_cmd udma_cmd = UDMA_LMAC_INIT;
58 struct iwm_umac_cmd umac_cmd;
59 struct iwm_lmac_cmd lmac_cmd;
60
61 lmac_cmd.id = lmac_cmd_id;
62
63 umac_cmd.id = UMAC_CMD_OPCODE_WIFI_PASS_THROUGH;
64 umac_cmd.resp = resp;
65
66 return iwm_hal_send_host_cmd(iwm, &udma_cmd, &umac_cmd, &lmac_cmd,
67 lmac_payload, lmac_payload_size);
68}
69
70int iwm_send_wifi_if_cmd(struct iwm_priv *iwm, void *payload, u16 payload_size,
71 bool resp)
72{
73 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT;
74 struct iwm_umac_cmd umac_cmd;
75
76 umac_cmd.id = UMAC_CMD_OPCODE_WIFI_IF_WRAPPER;
77 umac_cmd.resp = resp;
78
79 return iwm_hal_send_umac_cmd(iwm, &udma_cmd, &umac_cmd,
80 payload, payload_size);
81}
82
83static struct coex_event iwm_sta_xor_prio_tbl[COEX_EVENTS_NUM] =
84{
85 {4, 3, 0, COEX_UNASSOC_IDLE_FLAGS},
86 {4, 3, 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
87 {4, 3, 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
88 {4, 3, 0, COEX_CALIBRATION_FLAGS},
89 {4, 3, 0, COEX_PERIODIC_CALIBRATION_FLAGS},
90 {4, 3, 0, COEX_CONNECTION_ESTAB_FLAGS},
91 {4, 3, 0, COEX_ASSOCIATED_IDLE_FLAGS},
92 {4, 3, 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
93 {4, 3, 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
94 {4, 3, 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
95 {6, 3, 0, COEX_XOR_RF_ON_FLAGS},
96 {4, 3, 0, COEX_RF_OFF_FLAGS},
97 {6, 6, 0, COEX_STAND_ALONE_DEBUG_FLAGS},
98 {4, 3, 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
99 {4, 3, 0, COEX_RSRVD1_FLAGS},
100 {4, 3, 0, COEX_RSRVD2_FLAGS}
101};
102
103static struct coex_event iwm_sta_cm_prio_tbl[COEX_EVENTS_NUM] =
104{
105 {1, 1, 0, COEX_UNASSOC_IDLE_FLAGS},
106 {4, 3, 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
107 {3, 3, 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
108 {5, 5, 0, COEX_CALIBRATION_FLAGS},
109 {4, 4, 0, COEX_PERIODIC_CALIBRATION_FLAGS},
110 {5, 4, 0, COEX_CONNECTION_ESTAB_FLAGS},
111 {4, 4, 0, COEX_ASSOCIATED_IDLE_FLAGS},
112 {4, 4, 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
113 {4, 4, 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
114 {4, 4, 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
115 {1, 1, 0, COEX_RF_ON_FLAGS},
116 {1, 1, 0, COEX_RF_OFF_FLAGS},
117 {6, 6, 0, COEX_STAND_ALONE_DEBUG_FLAGS},
118 {5, 4, 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
119 {1, 1, 0, COEX_RSRVD1_FLAGS},
120 {1, 1, 0, COEX_RSRVD2_FLAGS}
121};
122
123int iwm_send_prio_table(struct iwm_priv *iwm)
124{
125 struct iwm_coex_prio_table_cmd coex_table_cmd;
126 u32 coex_enabled, mode_enabled;
127
128 memset(&coex_table_cmd, 0, sizeof(struct iwm_coex_prio_table_cmd));
129
130 coex_table_cmd.flags = COEX_FLAGS_STA_TABLE_VALID_MSK;
131
132 switch (iwm->conf.coexist_mode) {
133 case COEX_MODE_XOR:
134 case COEX_MODE_CM:
135 coex_enabled = 1;
136 break;
137 default:
138 coex_enabled = 0;
139 break;
140 }
141
142 switch (iwm->conf.mode) {
143 case UMAC_MODE_BSS:
144 case UMAC_MODE_IBSS:
145 mode_enabled = 1;
146 break;
147 default:
148 mode_enabled = 0;
149 break;
150 }
151
152 if (coex_enabled && mode_enabled) {
153 coex_table_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK |
154 COEX_FLAGS_ASSOC_WAKEUP_UMASK_MSK |
155 COEX_FLAGS_UNASSOC_WAKEUP_UMASK_MSK;
156
157 switch (iwm->conf.coexist_mode) {
158 case COEX_MODE_XOR:
159 memcpy(coex_table_cmd.sta_prio, iwm_sta_xor_prio_tbl,
160 sizeof(iwm_sta_xor_prio_tbl));
161 break;
162 case COEX_MODE_CM:
163 memcpy(coex_table_cmd.sta_prio, iwm_sta_cm_prio_tbl,
164 sizeof(iwm_sta_cm_prio_tbl));
165 break;
166 default:
167 IWM_ERR(iwm, "Invalid coex_mode 0x%x\n",
168 iwm->conf.coexist_mode);
169 break;
170 }
171 } else
172 IWM_WARN(iwm, "coexistense disabled\n");
173
174 return iwm_send_lmac_ptrough_cmd(iwm, COEX_PRIORITY_TABLE_CMD,
175 &coex_table_cmd,
176 sizeof(struct iwm_coex_prio_table_cmd), 1);
177}
178
179int iwm_send_init_calib_cfg(struct iwm_priv *iwm, u8 calib_requested)
180{
181 struct iwm_lmac_cal_cfg_cmd cal_cfg_cmd;
182
183 memset(&cal_cfg_cmd, 0, sizeof(struct iwm_lmac_cal_cfg_cmd));
184
185 cal_cfg_cmd.ucode_cfg.init.enable = cpu_to_le32(calib_requested);
186 cal_cfg_cmd.ucode_cfg.init.start = cpu_to_le32(calib_requested);
187 cal_cfg_cmd.ucode_cfg.init.send_res = cpu_to_le32(calib_requested);
188 cal_cfg_cmd.ucode_cfg.flags =
189 cpu_to_le32(CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_AFTER_MSK);
190
191 return iwm_send_lmac_ptrough_cmd(iwm, CALIBRATION_CFG_CMD, &cal_cfg_cmd,
192 sizeof(struct iwm_lmac_cal_cfg_cmd), 1);
193}
194
195int iwm_send_periodic_calib_cfg(struct iwm_priv *iwm, u8 calib_requested)
196{
197 struct iwm_lmac_cal_cfg_cmd cal_cfg_cmd;
198
199 memset(&cal_cfg_cmd, 0, sizeof(struct iwm_lmac_cal_cfg_cmd));
200
201 cal_cfg_cmd.ucode_cfg.periodic.enable = cpu_to_le32(calib_requested);
202 cal_cfg_cmd.ucode_cfg.periodic.start = cpu_to_le32(calib_requested);
203
204 return iwm_send_lmac_ptrough_cmd(iwm, CALIBRATION_CFG_CMD, &cal_cfg_cmd,
205 sizeof(struct iwm_lmac_cal_cfg_cmd), 0);
206}
207
208int iwm_store_rxiq_calib_result(struct iwm_priv *iwm)
209{
210 struct iwm_calib_rxiq *rxiq;
211 u8 *eeprom_rxiq = iwm_eeprom_access(iwm, IWM_EEPROM_CALIB_RXIQ);
212 int grplen = sizeof(struct iwm_calib_rxiq_group);
213
214 rxiq = kzalloc(sizeof(struct iwm_calib_rxiq), GFP_KERNEL);
215 if (!rxiq) {
216 IWM_ERR(iwm, "Couldn't alloc memory for RX IQ\n");
217 return -ENOMEM;
218 }
219
220 eeprom_rxiq = iwm_eeprom_access(iwm, IWM_EEPROM_CALIB_RXIQ);
221 if (IS_ERR(eeprom_rxiq)) {
222 IWM_ERR(iwm, "Couldn't access EEPROM RX IQ entry\n");
223 return PTR_ERR(eeprom_rxiq);
224 }
225
226 iwm->calib_res[SHILOH_PHY_CALIBRATE_RX_IQ_CMD].buf = (u8 *)rxiq;
227 iwm->calib_res[SHILOH_PHY_CALIBRATE_RX_IQ_CMD].size = sizeof(*rxiq);
228
229 rxiq->hdr.opcode = SHILOH_PHY_CALIBRATE_RX_IQ_CMD;
230 rxiq->hdr.first_grp = 0;
231 rxiq->hdr.grp_num = 1;
232 rxiq->hdr.all_data_valid = 1;
233
234 memcpy(&rxiq->group[0], eeprom_rxiq, 4 * grplen);
235 memcpy(&rxiq->group[4], eeprom_rxiq + 6 * grplen, grplen);
236
237 return 0;
238}
239
240int iwm_send_calib_results(struct iwm_priv *iwm)
241{
242 int i, ret = 0;
243
244 for (i = PHY_CALIBRATE_OPCODES_NUM; i < CALIBRATION_CMD_NUM; i++) {
245 if (test_bit(i - PHY_CALIBRATE_OPCODES_NUM,
246 &iwm->calib_done_map)) {
247 IWM_DBG_CMD(iwm, DBG,
248 "Send calibration %d result\n", i);
249 ret |= iwm_send_lmac_ptrough_cmd(iwm,
250 REPLY_PHY_CALIBRATION_CMD,
251 iwm->calib_res[i].buf,
252 iwm->calib_res[i].size, 0);
253
254 kfree(iwm->calib_res[i].buf);
255 iwm->calib_res[i].buf = NULL;
256 iwm->calib_res[i].size = 0;
257 }
258 }
259
260 return ret;
261}
262
263int iwm_send_umac_reset(struct iwm_priv *iwm, __le32 reset_flags, bool resp)
264{
265 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT;
266 struct iwm_umac_cmd umac_cmd;
267 struct iwm_umac_cmd_reset reset;
268
269 reset.flags = reset_flags;
270
271 umac_cmd.id = UMAC_CMD_OPCODE_RESET;
272 umac_cmd.resp = resp;
273
274 return iwm_hal_send_umac_cmd(iwm, &udma_cmd, &umac_cmd, &reset,
275 sizeof(struct iwm_umac_cmd_reset));
276}
277
278int iwm_umac_set_config_fix(struct iwm_priv *iwm, u16 tbl, u16 key, u32 value)
279{
280 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT;
281 struct iwm_umac_cmd umac_cmd;
282 struct iwm_umac_cmd_set_param_fix param;
283
284 if ((tbl != UMAC_PARAM_TBL_CFG_FIX) &&
285 (tbl != UMAC_PARAM_TBL_FA_CFG_FIX))
286 return -EINVAL;
287
288 umac_cmd.id = UMAC_CMD_OPCODE_SET_PARAM_FIX;
289 umac_cmd.resp = 0;
290
291 param.tbl = cpu_to_le16(tbl);
292 param.key = cpu_to_le16(key);
293 param.value = cpu_to_le32(value);
294
295 return iwm_hal_send_umac_cmd(iwm, &udma_cmd, &umac_cmd, &param,
296 sizeof(struct iwm_umac_cmd_set_param_fix));
297}
298
299int iwm_umac_set_config_var(struct iwm_priv *iwm, u16 key,
300 void *payload, u16 payload_size)
301{
302 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT;
303 struct iwm_umac_cmd umac_cmd;
304 struct iwm_umac_cmd_set_param_var *param_hdr;
305 u8 *param;
306 int ret;
307
308 param = kzalloc(payload_size +
309 sizeof(struct iwm_umac_cmd_set_param_var), GFP_KERNEL);
310 if (!param) {
311 IWM_ERR(iwm, "Couldn't allocate param\n");
312 return -ENOMEM;
313 }
314
315 param_hdr = (struct iwm_umac_cmd_set_param_var *)param;
316
317 umac_cmd.id = UMAC_CMD_OPCODE_SET_PARAM_VAR;
318 umac_cmd.resp = 0;
319
320 param_hdr->tbl = cpu_to_le16(UMAC_PARAM_TBL_CFG_VAR);
321 param_hdr->key = cpu_to_le16(key);
322 param_hdr->len = cpu_to_le16(payload_size);
323 memcpy(param + sizeof(struct iwm_umac_cmd_set_param_var),
324 payload, payload_size);
325
326 ret = iwm_hal_send_umac_cmd(iwm, &udma_cmd, &umac_cmd, param,
327 sizeof(struct iwm_umac_cmd_set_param_var) +
328 payload_size);
329 kfree(param);
330
331 return ret;
332}
333
334int iwm_send_umac_config(struct iwm_priv *iwm,
335 __le32 reset_flags)
336{
337 int ret;
338
339 /* Use UMAC default values */
340 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
341 CFG_POWER_INDEX, iwm->conf.power_index);
342 if (ret < 0)
343 return ret;
344
345 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX,
346 CFG_FRAG_THRESHOLD,
347 iwm->conf.frag_threshold);
348 if (ret < 0)
349 return ret;
350
351 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
352 CFG_RTS_THRESHOLD,
353 iwm->conf.rts_threshold);
354 if (ret < 0)
355 return ret;
356
357 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
358 CFG_CTS_TO_SELF, iwm->conf.cts_to_self);
359 if (ret < 0)
360 return ret;
361
362 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
363 CFG_COEX_MODE, iwm->conf.coexist_mode);
364 if (ret < 0)
365 return ret;
366
367 /*
368 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
369 CFG_ASSOCIATION_TIMEOUT,
370 iwm->conf.assoc_timeout);
371 if (ret < 0)
372 return ret;
373
374 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
375 CFG_ROAM_TIMEOUT,
376 iwm->conf.roam_timeout);
377 if (ret < 0)
378 return ret;
379
380 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
381 CFG_WIRELESS_MODE,
382 WIRELESS_MODE_11A | WIRELESS_MODE_11G);
383 if (ret < 0)
384 return ret;
385 */
386
387 ret = iwm_umac_set_config_var(iwm, CFG_NET_ADDR,
388 iwm_to_ndev(iwm)->dev_addr, ETH_ALEN);
389 if (ret < 0)
390 return ret;
391
392 /* UMAC PM static configurations */
393 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
394 CFG_PM_LEGACY_RX_TIMEOUT, 0x12C);
395 if (ret < 0)
396 return ret;
397
398 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
399 CFG_PM_LEGACY_TX_TIMEOUT, 0x15E);
400 if (ret < 0)
401 return ret;
402
403 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
404 CFG_PM_CTRL_FLAGS, 0x30001);
405 if (ret < 0)
406 return ret;
407
408 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
409 CFG_PM_KEEP_ALIVE_IN_BEACONS, 0x80);
410 if (ret < 0)
411 return ret;
412
413 /* reset UMAC */
414 ret = iwm_send_umac_reset(iwm, reset_flags, 1);
415 if (ret < 0)
416 return ret;
417
418 ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_RESET, IWM_SRC_UMAC,
419 WAIT_NOTIF_TIMEOUT);
420 if (ret) {
421 IWM_ERR(iwm, "Wait for UMAC RESET timeout\n");
422 return ret;
423 }
424
425 return ret;
426}
427
428int iwm_send_packet(struct iwm_priv *iwm, struct sk_buff *skb, int pool_id)
429{
430 struct iwm_udma_wifi_cmd udma_cmd;
431 struct iwm_umac_cmd umac_cmd;
432 struct iwm_tx_info *tx_info = skb_to_tx_info(skb);
433
434 udma_cmd.eop = 1; /* always set eop for non-concatenated Tx */
435 udma_cmd.credit_group = pool_id;
436 udma_cmd.ra_tid = tx_info->sta << 4 | tx_info->tid;
437 udma_cmd.lmac_offset = 0;
438
439 umac_cmd.id = REPLY_TX;
440 umac_cmd.color = tx_info->color;
441 umac_cmd.resp = 0;
442
443 return iwm_hal_send_umac_cmd(iwm, &udma_cmd, &umac_cmd,
444 skb->data, skb->len);
445}
446
447static int iwm_target_read(struct iwm_priv *iwm, __le32 address,
448 u8 *response, u32 resp_size)
449{
450 struct iwm_udma_nonwifi_cmd target_cmd;
451 struct iwm_nonwifi_cmd *cmd;
452 u16 seq_num;
453 int ret = 0;
454
455 target_cmd.opcode = UMAC_HDI_OUT_OPCODE_READ;
456 target_cmd.addr = address;
457 target_cmd.op1_sz = cpu_to_le32(resp_size);
458 target_cmd.op2 = 0;
459 target_cmd.handle_by_hw = 0;
460 target_cmd.resp = 1;
461 target_cmd.eop = 1;
462
463 ret = iwm_hal_send_target_cmd(iwm, &target_cmd, NULL);
464 if (ret < 0)
465 IWM_ERR(iwm, "Couldn't send READ command\n");
466
467 /* When succeding, the send_target routine returns the seq number */
468 seq_num = ret;
469
470 ret = wait_event_interruptible_timeout(iwm->nonwifi_queue,
471 (cmd = iwm_get_pending_nonwifi_cmd(iwm, seq_num,
472 UMAC_HDI_OUT_OPCODE_READ)) != NULL,
473 2 * HZ);
474
475 if (!ret) {
476 IWM_ERR(iwm, "Didn't receive a target READ answer\n");
477 return ret;
478 }
479
480 memcpy(response, cmd->buf.hdr + sizeof(struct iwm_udma_in_hdr),
481 resp_size);
482
483 kfree(cmd);
484
485 return ret;
486}
487
488int iwm_read_mac(struct iwm_priv *iwm, u8 *mac)
489{
490 int ret;
491 u8 mac_align[ALIGN(ETH_ALEN, 8)];
492
493 ret = iwm_target_read(iwm, cpu_to_le32(WICO_MAC_ADDRESS_ADDR),
494 mac_align, sizeof(mac_align));
495 if (ret < 0)
496 return ret;
497
498 if (is_valid_ether_addr(mac_align))
499 memcpy(mac, mac_align, ETH_ALEN);
500 else {
501 IWM_ERR(iwm, "Invalid EEPROM MAC\n");
502 memcpy(mac, iwm->conf.mac_addr, ETH_ALEN);
503 get_random_bytes(&mac[3], 3);
504 }
505
506 return 0;
507}
508
509int iwm_set_tx_key(struct iwm_priv *iwm, u8 key_idx)
510{
511 struct iwm_umac_tx_key_id tx_key_id;
512
513 if (!iwm->default_key || !iwm->default_key->in_use)
514 return -EINVAL;
515
516 tx_key_id.hdr.oid = UMAC_WIFI_IF_CMD_GLOBAL_TX_KEY_ID;
517 tx_key_id.hdr.buf_size = cpu_to_le16(sizeof(struct iwm_umac_tx_key_id) -
518 sizeof(struct iwm_umac_wifi_if));
519
520 tx_key_id.key_idx = key_idx;
521
522 return iwm_send_wifi_if_cmd(iwm, &tx_key_id, sizeof(tx_key_id), 1);
523}
524
525static int iwm_check_profile(struct iwm_priv *iwm)
526{
527 if (!iwm->umac_profile_active)
528 return -EAGAIN;
529
530 if (iwm->umac_profile->sec.ucast_cipher != UMAC_CIPHER_TYPE_WEP_40 &&
531 iwm->umac_profile->sec.ucast_cipher != UMAC_CIPHER_TYPE_WEP_104 &&
532 iwm->umac_profile->sec.ucast_cipher != UMAC_CIPHER_TYPE_TKIP &&
533 iwm->umac_profile->sec.ucast_cipher != UMAC_CIPHER_TYPE_CCMP) {
534 IWM_ERR(iwm, "Wrong unicast cipher: 0x%x\n",
535 iwm->umac_profile->sec.ucast_cipher);
536 return -EAGAIN;
537 }
538
539 if (iwm->umac_profile->sec.mcast_cipher != UMAC_CIPHER_TYPE_WEP_40 &&
540 iwm->umac_profile->sec.mcast_cipher != UMAC_CIPHER_TYPE_WEP_104 &&
541 iwm->umac_profile->sec.mcast_cipher != UMAC_CIPHER_TYPE_TKIP &&
542 iwm->umac_profile->sec.mcast_cipher != UMAC_CIPHER_TYPE_CCMP) {
543 IWM_ERR(iwm, "Wrong multicast cipher: 0x%x\n",
544 iwm->umac_profile->sec.mcast_cipher);
545 return -EAGAIN;
546 }
547
548 if ((iwm->umac_profile->sec.ucast_cipher == UMAC_CIPHER_TYPE_WEP_40 ||
549 iwm->umac_profile->sec.ucast_cipher == UMAC_CIPHER_TYPE_WEP_104) &&
550 (iwm->umac_profile->sec.ucast_cipher !=
551 iwm->umac_profile->sec.mcast_cipher)) {
552 IWM_ERR(iwm, "Unicast and multicast ciphers differ for WEP\n");
553 }
554
555 return 0;
556}
557
558int iwm_set_key(struct iwm_priv *iwm, bool remove, bool set_tx_key,
559 struct iwm_key *key)
560{
561 int ret;
562 u8 cmd[64], *sta_addr, *key_data, key_len;
563 s8 key_idx;
564 u16 cmd_size = 0;
565 struct iwm_umac_key_hdr *key_hdr = &key->hdr;
566 struct iwm_umac_key_wep40 *wep40 = (struct iwm_umac_key_wep40 *)cmd;
567 struct iwm_umac_key_wep104 *wep104 = (struct iwm_umac_key_wep104 *)cmd;
568 struct iwm_umac_key_tkip *tkip = (struct iwm_umac_key_tkip *)cmd;
569 struct iwm_umac_key_ccmp *ccmp = (struct iwm_umac_key_ccmp *)cmd;
570
571 if (set_tx_key)
572 iwm->default_key = key;
573
574 /*
575 * We check if our current profile is valid.
576 * If not, we dont push the key, we just cache them,
577 * so that with the next siwsessid call, the keys
578 * will be actually pushed.
579 */
580 if (!remove) {
581 ret = iwm_check_profile(iwm);
582 if (ret < 0)
583 return ret;
584 }
585
586 sta_addr = key->hdr.mac;
587 key_data = key->key;
588 key_len = key->key_len;
589 key_idx = key->hdr.key_idx;
590
591 if (!remove) {
592 IWM_DBG_WEXT(iwm, DBG, "key_idx:%d set tx key:%d\n",
593 key_idx, set_tx_key);
594 IWM_DBG_WEXT(iwm, DBG, "key_len:%d\n", key_len);
595 IWM_DBG_WEXT(iwm, DBG, "MAC:%pM, idx:%d, multicast:%d\n",
596 key_hdr->mac, key_hdr->key_idx, key_hdr->multicast);
597
598 IWM_DBG_WEXT(iwm, DBG, "profile: mcast:0x%x, ucast:0x%x\n",
599 iwm->umac_profile->sec.mcast_cipher,
600 iwm->umac_profile->sec.ucast_cipher);
601 IWM_DBG_WEXT(iwm, DBG, "profile: auth_type:0x%x, flags:0x%x\n",
602 iwm->umac_profile->sec.auth_type,
603 iwm->umac_profile->sec.flags);
604
605 switch (key->alg) {
606 case UMAC_CIPHER_TYPE_WEP_40:
607 wep40->hdr.oid = UMAC_WIFI_IF_CMD_ADD_WEP40_KEY;
608 wep40->hdr.buf_size =
609 cpu_to_le16(sizeof(struct iwm_umac_key_wep40) -
610 sizeof(struct iwm_umac_wifi_if));
611
612 memcpy(&wep40->key_hdr, key_hdr,
613 sizeof(struct iwm_umac_key_hdr));
614 memcpy(wep40->key, key_data, key_len);
615 wep40->static_key = 1;
616
617 cmd_size = sizeof(struct iwm_umac_key_wep40);
618 break;
619
620 case UMAC_CIPHER_TYPE_WEP_104:
621 wep104->hdr.oid = UMAC_WIFI_IF_CMD_ADD_WEP104_KEY;
622 wep104->hdr.buf_size =
623 cpu_to_le16(sizeof(struct iwm_umac_key_wep104) -
624 sizeof(struct iwm_umac_wifi_if));
625
626 memcpy(&wep104->key_hdr, key_hdr,
627 sizeof(struct iwm_umac_key_hdr));
628 memcpy(wep104->key, key_data, key_len);
629 wep104->static_key = 1;
630
631 cmd_size = sizeof(struct iwm_umac_key_wep104);
632 break;
633
634 case UMAC_CIPHER_TYPE_CCMP:
635 key_hdr->key_idx++;
636 ccmp->hdr.oid = UMAC_WIFI_IF_CMD_ADD_CCMP_KEY;
637 ccmp->hdr.buf_size =
638 cpu_to_le16(sizeof(struct iwm_umac_key_ccmp) -
639 sizeof(struct iwm_umac_wifi_if));
640
641 memcpy(&ccmp->key_hdr, key_hdr,
642 sizeof(struct iwm_umac_key_hdr));
643
644 memcpy(ccmp->key, key_data, key_len);
645
646 if (key->flags & IW_ENCODE_EXT_RX_SEQ_VALID)
647 memcpy(ccmp->iv_count, key->rx_seq, 6);
648
649 cmd_size = sizeof(struct iwm_umac_key_ccmp);
650 break;
651
652 case UMAC_CIPHER_TYPE_TKIP:
653 key_hdr->key_idx++;
654 tkip->hdr.oid = UMAC_WIFI_IF_CMD_ADD_TKIP_KEY;
655 tkip->hdr.buf_size =
656 cpu_to_le16(sizeof(struct iwm_umac_key_tkip) -
657 sizeof(struct iwm_umac_wifi_if));
658
659 memcpy(&tkip->key_hdr, key_hdr,
660 sizeof(struct iwm_umac_key_hdr));
661
662 memcpy(tkip->tkip_key, key_data, IWM_TKIP_KEY_SIZE);
663 memcpy(tkip->mic_tx_key, key_data + IWM_TKIP_KEY_SIZE,
664 IWM_TKIP_MIC_SIZE);
665 memcpy(tkip->mic_rx_key,
666 key_data + IWM_TKIP_KEY_SIZE + IWM_TKIP_MIC_SIZE,
667 IWM_TKIP_MIC_SIZE);
668
669 if (key->flags & IW_ENCODE_EXT_RX_SEQ_VALID)
670 memcpy(ccmp->iv_count, key->rx_seq, 6);
671
672 cmd_size = sizeof(struct iwm_umac_key_tkip);
673 break;
674
675 default:
676 return -ENOTSUPP;
677 }
678
679 if ((key->alg == UMAC_CIPHER_TYPE_CCMP) ||
680 (key->alg == UMAC_CIPHER_TYPE_TKIP))
681 /*
682 * UGLY_UGLY_UGLY
683 * Copied HACK from the MWG driver.
684 * Without it, the key is set before the second
685 * EAPOL frame is sent, and the latter is thus
686 * encrypted.
687 */
688 schedule_timeout_interruptible(usecs_to_jiffies(300));
689
690 ret = iwm_send_wifi_if_cmd(iwm, cmd, cmd_size, 1);
691 if (ret < 0)
692 goto err;
693
694 /*
695 * We need a default key only if it is set and
696 * if we're doing WEP.
697 */
698 if (iwm->default_key == key &&
699 ((key->alg == UMAC_CIPHER_TYPE_WEP_40) ||
700 (key->alg == UMAC_CIPHER_TYPE_WEP_104))) {
701 ret = iwm_set_tx_key(iwm, key_idx);
702 if (ret < 0)
703 goto err;
704 }
705 } else {
706 struct iwm_umac_key_remove key_remove;
707
708 key_remove.hdr.oid = UMAC_WIFI_IF_CMD_REMOVE_KEY;
709 key_remove.hdr.buf_size =
710 cpu_to_le16(sizeof(struct iwm_umac_key_remove) -
711 sizeof(struct iwm_umac_wifi_if));
712 memcpy(&key_remove.key_hdr, key_hdr,
713 sizeof(struct iwm_umac_key_hdr));
714
715 ret = iwm_send_wifi_if_cmd(iwm, &key_remove,
716 sizeof(struct iwm_umac_key_remove),
717 1);
718 if (ret < 0)
719 return ret;
720
721 iwm->keys[key_idx].in_use = 0;
722 }
723
724 return 0;
725
726 err:
727 kfree(key);
728 return ret;
729}
730
731
732int iwm_send_mlme_profile(struct iwm_priv *iwm)
733{
734 int ret, i;
735 struct iwm_umac_profile profile;
736
737 memcpy(&profile, iwm->umac_profile, sizeof(profile));
738
739 profile.hdr.oid = UMAC_WIFI_IF_CMD_SET_PROFILE;
740 profile.hdr.buf_size = cpu_to_le16(sizeof(struct iwm_umac_profile) -
741 sizeof(struct iwm_umac_wifi_if));
742
743 ret = iwm_send_wifi_if_cmd(iwm, &profile, sizeof(profile), 1);
744 if (ret < 0) {
745 IWM_ERR(iwm, "Send profile command failed\n");
746 return ret;
747 }
748
749 /* Wait for the profile to be active */
750 ret = wait_event_interruptible_timeout(iwm->mlme_queue,
751 iwm->umac_profile_active == 1,
752 3 * HZ);
753 if (!ret)
754 return -EBUSY;
755
756
757 for (i = 0; i < IWM_NUM_KEYS; i++)
758 if (iwm->keys[i].in_use) {
759 int default_key = 0;
760 struct iwm_key *key = &iwm->keys[i];
761
762 if (key == iwm->default_key)
763 default_key = 1;
764
765 /* Wait for the profile before sending the keys */
766 wait_event_interruptible_timeout(iwm->mlme_queue,
767 (test_bit(IWM_STATUS_ASSOCIATING, &iwm->status) ||
768 test_bit(IWM_STATUS_ASSOCIATED, &iwm->status)),
769 3 * HZ);
770
771 ret = iwm_set_key(iwm, 0, default_key, key);
772 if (ret < 0)
773 return ret;
774 }
775
776 return 0;
777}
778
779int iwm_invalidate_mlme_profile(struct iwm_priv *iwm)
780{
781 int ret;
782 struct iwm_umac_invalidate_profile invalid;
783
784 invalid.hdr.oid = UMAC_WIFI_IF_CMD_INVALIDATE_PROFILE;
785 invalid.hdr.buf_size =
786 cpu_to_le16(sizeof(struct iwm_umac_invalidate_profile) -
787 sizeof(struct iwm_umac_wifi_if));
788
789 invalid.reason = WLAN_REASON_UNSPECIFIED;
790
791 ret = iwm_send_wifi_if_cmd(iwm, &invalid, sizeof(invalid), 1);
792 if (ret < 0)
793 return ret;
794
795 ret = wait_event_interruptible_timeout(iwm->mlme_queue,
796 (iwm->umac_profile_active == 0),
797 2 * HZ);
798 if (!ret)
799 return -EBUSY;
800
801 return 0;
802}
803
804int iwm_send_umac_stats_req(struct iwm_priv *iwm, u32 flags)
805{
806 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT;
807 struct iwm_umac_cmd umac_cmd;
808 struct iwm_umac_cmd_stats_req stats_req;
809
810 stats_req.flags = cpu_to_le32(flags);
811
812 umac_cmd.id = UMAC_CMD_OPCODE_STATISTIC_REQUEST;
813 umac_cmd.resp = 0;
814
815 return iwm_hal_send_umac_cmd(iwm, &udma_cmd, &umac_cmd, &stats_req,
816 sizeof(struct iwm_umac_cmd_stats_req));
817}
818
819int iwm_send_umac_channel_list(struct iwm_priv *iwm)
820{
821 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT;
822 struct iwm_umac_cmd umac_cmd;
823 struct iwm_umac_cmd_get_channel_list *ch_list;
824 int size = sizeof(struct iwm_umac_cmd_get_channel_list) +
825 sizeof(struct iwm_umac_channel_info) * 4;
826 int ret;
827
828 ch_list = kzalloc(size, GFP_KERNEL);
829 if (!ch_list) {
830 IWM_ERR(iwm, "Couldn't allocate channel list cmd\n");
831 return -ENOMEM;
832 }
833
834 ch_list->ch[0].band = UMAC_BAND_2GHZ;
835 ch_list->ch[0].type = UMAC_CHANNEL_WIDTH_20MHZ;
836 ch_list->ch[0].flags = UMAC_CHANNEL_FLAG_VALID;
837
838 ch_list->ch[1].band = UMAC_BAND_5GHZ;
839 ch_list->ch[1].type = UMAC_CHANNEL_WIDTH_20MHZ;
840 ch_list->ch[1].flags = UMAC_CHANNEL_FLAG_VALID;
841
842 ch_list->ch[2].band = UMAC_BAND_2GHZ;
843 ch_list->ch[2].type = UMAC_CHANNEL_WIDTH_20MHZ;
844 ch_list->ch[2].flags = UMAC_CHANNEL_FLAG_VALID | UMAC_CHANNEL_FLAG_IBSS;
845
846 ch_list->ch[3].band = UMAC_BAND_5GHZ;
847 ch_list->ch[3].type = UMAC_CHANNEL_WIDTH_20MHZ;
848 ch_list->ch[3].flags = UMAC_CHANNEL_FLAG_VALID | UMAC_CHANNEL_FLAG_IBSS;
849
850 ch_list->count = cpu_to_le16(4);
851
852 umac_cmd.id = UMAC_CMD_OPCODE_GET_CHAN_INFO_LIST;
853 umac_cmd.resp = 1;
854
855 ret = iwm_hal_send_umac_cmd(iwm, &udma_cmd, &umac_cmd, ch_list, size);
856
857 kfree(ch_list);
858
859 return ret;
860}
861
862int iwm_scan_ssids(struct iwm_priv *iwm, struct cfg80211_ssid *ssids,
863 int ssid_num)
864{
865 struct iwm_umac_cmd_scan_request req;
866 int i, ret;
867
868 memset(&req, 0, sizeof(struct iwm_umac_cmd_scan_request));
869
870 req.hdr.oid = UMAC_WIFI_IF_CMD_SCAN_REQUEST;
871 req.hdr.buf_size = cpu_to_le16(sizeof(struct iwm_umac_cmd_scan_request)
872 - sizeof(struct iwm_umac_wifi_if));
873 req.type = UMAC_WIFI_IF_SCAN_TYPE_USER;
874 req.timeout = 2;
875 req.seq_num = iwm->scan_id;
876 req.ssid_num = min(ssid_num, UMAC_WIFI_IF_PROBE_OPTION_MAX);
877
878 for (i = 0; i < req.ssid_num; i++) {
879 memcpy(req.ssids[i].ssid, ssids[i].ssid, ssids[i].ssid_len);
880 req.ssids[i].ssid_len = ssids[i].ssid_len;
881 }
882
883 ret = iwm_send_wifi_if_cmd(iwm, &req, sizeof(req), 0);
884 if (ret < 0) {
885 IWM_ERR(iwm, "Couldn't send scan request\n");
886 return ret;
887 }
888
889 iwm->scan_id = iwm->scan_id++ % IWM_SCAN_ID_MAX;
890
891 return 0;
892}
893
894int iwm_scan_one_ssid(struct iwm_priv *iwm, u8 *ssid, int ssid_len)
895{
896 struct cfg80211_ssid one_ssid;
897
898 if (test_and_set_bit(IWM_STATUS_SCANNING, &iwm->status))
899 return 0;
900
901 one_ssid.ssid_len = min(ssid_len, IEEE80211_MAX_SSID_LEN);
902 memcpy(&one_ssid.ssid, ssid, one_ssid.ssid_len);
903
904 return iwm_scan_ssids(iwm, &one_ssid, 1);
905}
906
907int iwm_target_reset(struct iwm_priv *iwm)
908{
909 struct iwm_udma_nonwifi_cmd target_cmd;
910
911 target_cmd.opcode = UMAC_HDI_OUT_OPCODE_REBOOT;
912 target_cmd.addr = 0;
913 target_cmd.op1_sz = 0;
914 target_cmd.op2 = 0;
915 target_cmd.handle_by_hw = 0;
916 target_cmd.resp = 0;
917 target_cmd.eop = 1;
918
919 return iwm_hal_send_target_cmd(iwm, &target_cmd, NULL);
920}
diff --git a/drivers/net/wireless/iwmc3200wifi/commands.h b/drivers/net/wireless/iwmc3200wifi/commands.h
new file mode 100644
index 000000000000..36b13a130595
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/commands.h
@@ -0,0 +1,419 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#ifndef __IWM_COMMANDS_H__
40#define __IWM_COMMANDS_H__
41
42#include <linux/ieee80211.h>
43
44#define IWM_BARKER_REBOOT_NOTIFICATION 0xF
45#define IWM_ACK_BARKER_NOTIFICATION 0x10
46
47/* UMAC commands */
48#define UMAC_RST_CTRL_FLG_LARC_CLK_EN 0x0001
49#define UMAC_RST_CTRL_FLG_LARC_RESET 0x0002
50#define UMAC_RST_CTRL_FLG_FUNC_RESET 0x0004
51#define UMAC_RST_CTRL_FLG_DEV_RESET 0x0008
52#define UMAC_RST_CTRL_FLG_WIFI_CORE_EN 0x0010
53#define UMAC_RST_CTRL_FLG_WIFI_LINK_EN 0x0040
54#define UMAC_RST_CTRL_FLG_WIFI_MLME_EN 0x0080
55#define UMAC_RST_CTRL_FLG_NVM_RELOAD 0x0100
56
57struct iwm_umac_cmd_reset {
58 __le32 flags;
59} __attribute__ ((packed));
60
61#define UMAC_PARAM_TBL_ORD_FIX 0x0
62#define UMAC_PARAM_TBL_ORD_VAR 0x1
63#define UMAC_PARAM_TBL_CFG_FIX 0x2
64#define UMAC_PARAM_TBL_CFG_VAR 0x3
65#define UMAC_PARAM_TBL_BSS_TRK 0x4
66#define UMAC_PARAM_TBL_FA_CFG_FIX 0x5
67#define UMAC_PARAM_TBL_STA 0x6
68#define UMAC_PARAM_TBL_CHN 0x7
69#define UMAC_PARAM_TBL_STATISTICS 0x8
70
71/* fast access table */
72enum {
73 CFG_FRAG_THRESHOLD = 0,
74 CFG_FRAME_RETRY_LIMIT,
75 CFG_OS_QUEUE_UTIL_TH,
76 CFG_RX_FILTER,
77 /* <-- LAST --> */
78 FAST_ACCESS_CFG_TBL_FIX_LAST
79};
80
81/* fixed size table */
82enum {
83 CFG_POWER_INDEX = 0,
84 CFG_PM_LEGACY_RX_TIMEOUT,
85 CFG_PM_LEGACY_TX_TIMEOUT,
86 CFG_PM_CTRL_FLAGS,
87 CFG_PM_KEEP_ALIVE_IN_BEACONS,
88 CFG_BT_ON_THRESHOLD,
89 CFG_RTS_THRESHOLD,
90 CFG_CTS_TO_SELF,
91 CFG_COEX_MODE,
92 CFG_WIRELESS_MODE,
93 CFG_ASSOCIATION_TIMEOUT,
94 CFG_ROAM_TIMEOUT,
95 CFG_CAPABILITY_SUPPORTED_RATES,
96 CFG_SCAN_ALLOWED_UNASSOC_FLAGS,
97 CFG_SCAN_ALLOWED_MAIN_ASSOC_FLAGS,
98 CFG_SCAN_ALLOWED_PAN_ASSOC_FLAGS,
99 CFG_SCAN_INTERNAL_PERIODIC_ENABLED,
100 CFG_SCAN_IMM_INTERNAL_PERIODIC_SCAN_ON_INIT,
101 CFG_SCAN_DEFAULT_PERIODIC_FREQ_SEC,
102 CFG_SCAN_NUM_PASSIVE_CHAN_PER_PARTIAL_SCAN,
103 CFG_TLC_SUPPORTED_TX_HT_RATES,
104 CFG_TLC_SUPPORTED_TX_RATES,
105 CFG_TLC_VALID_ANTENNA,
106 CFG_TLC_SPATIAL_STREAM_SUPPORTED,
107 CFG_TLC_RETRY_PER_RATE,
108 CFG_TLC_RETRY_PER_HT_RATE,
109 CFG_TLC_FIXED_RATE,
110 CFG_TLC_FIXED_RATE_FLAGS,
111 CFG_TLC_CONTROL_FLAGS,
112 CFG_TLC_SR_MIN_FAIL,
113 CFG_TLC_SR_MIN_PASS,
114 CFG_TLC_HT_STAY_IN_COL_PASS_THRESH,
115 CFG_TLC_HT_STAY_IN_COL_FAIL_THRESH,
116 CFG_TLC_LEGACY_STAY_IN_COL_PASS_THRESH,
117 CFG_TLC_LEGACY_STAY_IN_COL_FAIL_THRESH,
118 CFG_TLC_HT_FLUSH_STATS_PACKETS,
119 CFG_TLC_LEGACY_FLUSH_STATS_PACKETS,
120 CFG_TLC_LEGACY_FLUSH_STATS_MS,
121 CFG_TLC_HT_FLUSH_STATS_MS,
122 CFG_TLC_STAY_IN_COL_TIME_OUT,
123 CFG_TLC_AGG_SHORT_LIM,
124 CFG_TLC_AGG_LONG_LIM,
125 CFG_TLC_HT_SR_NO_DECREASE,
126 CFG_TLC_LEGACY_SR_NO_DECREASE,
127 CFG_TLC_SR_FORCE_DECREASE,
128 CFG_TLC_SR_ALLOW_INCREASE,
129 CFG_TLC_AGG_SET_LONG,
130 CFG_TLC_AUTO_AGGREGATION,
131 CFG_TLC_AGG_THRESHOLD,
132 CFG_TLC_TID_LOAD_THRESHOLD,
133 CFG_TLC_BLOCK_ACK_TIMEOUT,
134 CFG_TLC_NO_BA_COUNTED_AS_ONE,
135 CFG_TLC_NUM_BA_STREAMS_ALLOWED,
136 CFG_TLC_NUM_BA_STREAMS_PRESENT,
137 CFG_TLC_RENEW_ADDBA_DELAY,
138 CFG_TLC_NUM_OF_MULTISEC_TO_COUN_LOAD,
139 CFG_TLC_IS_STABLE_IN_HT,
140 CFG_RLC_CHAIN_CTRL,
141 CFG_TRK_TABLE_OP_MODE,
142 CFG_TRK_TABLE_RSSI_THRESHOLD,
143 CFG_TX_PWR_TARGET, /* Used By xVT */
144 CFG_TX_PWR_LIMIT_USR,
145 CFG_TX_PWR_LIMIT_BSS, /* 11d limit */
146 CFG_TX_PWR_LIMIT_BSS_CONSTRAINT, /* 11h constraint */
147 CFG_TX_PWR_MODE,
148 CFG_MLME_DBG_NOTIF_BLOCK,
149 CFG_BT_OFF_BECONS_INTERVALS,
150 CFG_BT_FRAG_DURATION,
151
152 /* <-- LAST --> */
153 CFG_TBL_FIX_LAST
154};
155
156/* variable size table */
157enum {
158 CFG_NET_ADDR = 0,
159 CFG_PROFILE,
160 /* <-- LAST --> */
161 CFG_TBL_VAR_LAST
162};
163
164struct iwm_umac_cmd_set_param_fix {
165 __le16 tbl;
166 __le16 key;
167 __le32 value;
168} __attribute__ ((packed));
169
170struct iwm_umac_cmd_set_param_var {
171 __le16 tbl;
172 __le16 key;
173 __le16 len;
174 __le16 reserved;
175} __attribute__ ((packed));
176
177struct iwm_umac_cmd_get_param {
178 __le16 tbl;
179 __le16 key;
180} __attribute__ ((packed));
181
182struct iwm_umac_cmd_get_param_resp {
183 __le16 tbl;
184 __le16 key;
185 __le16 len;
186 __le16 reserved;
187} __attribute__ ((packed));
188
189struct iwm_umac_cmd_eeprom_proxy_hdr {
190 __le32 type;
191 __le32 offset;
192 __le32 len;
193} __attribute__ ((packed));
194
195struct iwm_umac_cmd_eeprom_proxy {
196 struct iwm_umac_cmd_eeprom_proxy_hdr hdr;
197 u8 buf[0];
198} __attribute__ ((packed));
199
200#define IWM_UMAC_CMD_EEPROM_TYPE_READ 0x1
201#define IWM_UMAC_CMD_EEPROM_TYPE_WRITE 0x2
202
203#define UMAC_CHANNEL_FLAG_VALID BIT(0)
204#define UMAC_CHANNEL_FLAG_IBSS BIT(1)
205#define UMAC_CHANNEL_FLAG_ACTIVE BIT(3)
206#define UMAC_CHANNEL_FLAG_RADAR BIT(4)
207#define UMAC_CHANNEL_FLAG_DFS BIT(7)
208
209struct iwm_umac_channel_info {
210 u8 band;
211 u8 type;
212 u8 reserved;
213 u8 flags;
214 __le32 channels_mask;
215} __attribute__ ((packed));
216
217struct iwm_umac_cmd_get_channel_list {
218 __le16 count;
219 __le16 reserved;
220 struct iwm_umac_channel_info ch[0];
221} __attribute__ ((packed));
222
223
224/* UMAC WiFi interface commands */
225
226/* Coexistence mode */
227#define COEX_MODE_SA 0x1
228#define COEX_MODE_XOR 0x2
229#define COEX_MODE_CM 0x3
230#define COEX_MODE_MAX 0x4
231
232/* Wireless mode */
233#define WIRELESS_MODE_11A 0x1
234#define WIRELESS_MODE_11G 0x2
235
236#define UMAC_PROFILE_EX_IE_REQUIRED 0x1
237#define UMAC_PROFILE_QOS_ALLOWED 0x2
238
239/* Scanning */
240#define UMAC_WIFI_IF_PROBE_OPTION_MAX 10
241
242#define UMAC_WIFI_IF_SCAN_TYPE_USER 0x0
243#define UMAC_WIFI_IF_SCAN_TYPE_UMAC_RESERVED 0x1
244#define UMAC_WIFI_IF_SCAN_TYPE_HOST_PERIODIC 0x2
245#define UMAC_WIFI_IF_SCAN_TYPE_MAX 0x3
246
247struct iwm_umac_ssid {
248 u8 ssid_len;
249 u8 ssid[IEEE80211_MAX_SSID_LEN];
250 u8 reserved[3];
251} __attribute__ ((packed));
252
253struct iwm_umac_cmd_scan_request {
254 struct iwm_umac_wifi_if hdr;
255 __le32 type; /* UMAC_WIFI_IF_SCAN_TYPE_* */
256 u8 ssid_num;
257 u8 seq_num;
258 u8 timeout; /* In seconds */
259 u8 reserved;
260 struct iwm_umac_ssid ssids[UMAC_WIFI_IF_PROBE_OPTION_MAX];
261} __attribute__ ((packed));
262
263#define UMAC_CIPHER_TYPE_NONE 0xFF
264#define UMAC_CIPHER_TYPE_USE_GROUPCAST 0x00
265#define UMAC_CIPHER_TYPE_WEP_40 0x01
266#define UMAC_CIPHER_TYPE_WEP_104 0x02
267#define UMAC_CIPHER_TYPE_TKIP 0x04
268#define UMAC_CIPHER_TYPE_CCMP 0x08
269
270/* Supported authentication types - bitmap */
271#define UMAC_AUTH_TYPE_OPEN 0x00
272#define UMAC_AUTH_TYPE_LEGACY_PSK 0x01
273#define UMAC_AUTH_TYPE_8021X 0x02
274#define UMAC_AUTH_TYPE_RSNA_PSK 0x04
275
276/* iwm_umac_security.flag is WPA supported -- bits[0:0] */
277#define UMAC_SEC_FLG_WPA_ON_POS 0
278#define UMAC_SEC_FLG_WPA_ON_SEED 1
279#define UMAC_SEC_FLG_WPA_ON_MSK (UMAC_SEC_FLG_WPA_ON_SEED << \
280 UMAC_SEC_FLG_WPA_ON_POS)
281
282/* iwm_umac_security.flag is WPA2 supported -- bits [1:1] */
283#define UMAC_SEC_FLG_RSNA_ON_POS 1
284#define UMAC_SEC_FLG_RSNA_ON_SEED 1
285#define UMAC_SEC_FLG_RSNA_ON_MSK (UMAC_SEC_FLG_RSNA_ON_SEED << \
286 UMAC_SEC_FLG_RSNA_ON_POS)
287
288/* iwm_umac_security.flag is WSC mode on -- bits [2:2] */
289#define UMAC_SEC_FLG_WSC_ON_POS 2
290#define UMAC_SEC_FLG_WSC_ON_SEED 1
291
292/* Legacy profile can use only WEP40 and WEP104 for encryption and
293 * OPEN or PSK for authentication */
294#define UMAC_SEC_FLG_LEGACY_PROFILE 0
295
296struct iwm_umac_security {
297 u8 auth_type;
298 u8 ucast_cipher;
299 u8 mcast_cipher;
300 u8 flags;
301} __attribute__ ((packed));
302
303struct iwm_umac_ibss {
304 u8 beacon_interval; /* in millisecond */
305 u8 atim; /* in millisecond */
306 s8 join_only;
307 u8 band;
308 u8 channel;
309 u8 reserved[3];
310} __attribute__ ((packed));
311
312#define UMAC_MODE_BSS 0
313#define UMAC_MODE_IBSS 1
314
315#define UMAC_BSSID_MAX 4
316
317struct iwm_umac_profile {
318 struct iwm_umac_wifi_if hdr;
319 __le32 mode;
320 struct iwm_umac_ssid ssid;
321 u8 bssid[UMAC_BSSID_MAX][ETH_ALEN];
322 struct iwm_umac_security sec;
323 struct iwm_umac_ibss ibss;
324 __le32 channel_2ghz;
325 __le32 channel_5ghz;
326 __le16 flags;
327 u8 wireless_mode;
328 u8 bss_num;
329} __attribute__ ((packed));
330
331struct iwm_umac_invalidate_profile {
332 struct iwm_umac_wifi_if hdr;
333 u8 reason;
334 u8 reserved[3];
335} __attribute__ ((packed));
336
337/* Encryption key commands */
338struct iwm_umac_key_wep40 {
339 struct iwm_umac_wifi_if hdr;
340 struct iwm_umac_key_hdr key_hdr;
341 u8 key[WLAN_KEY_LEN_WEP40];
342 u8 static_key;
343 u8 reserved[2];
344} __attribute__ ((packed));
345
346struct iwm_umac_key_wep104 {
347 struct iwm_umac_wifi_if hdr;
348 struct iwm_umac_key_hdr key_hdr;
349 u8 key[WLAN_KEY_LEN_WEP104];
350 u8 static_key;
351 u8 reserved[2];
352} __attribute__ ((packed));
353
354#define IWM_TKIP_KEY_SIZE 16
355#define IWM_TKIP_MIC_SIZE 8
356struct iwm_umac_key_tkip {
357 struct iwm_umac_wifi_if hdr;
358 struct iwm_umac_key_hdr key_hdr;
359 u8 iv_count[6];
360 u8 reserved[2];
361 u8 tkip_key[IWM_TKIP_KEY_SIZE];
362 u8 mic_rx_key[IWM_TKIP_MIC_SIZE];
363 u8 mic_tx_key[IWM_TKIP_MIC_SIZE];
364} __attribute__ ((packed));
365
366struct iwm_umac_key_ccmp {
367 struct iwm_umac_wifi_if hdr;
368 struct iwm_umac_key_hdr key_hdr;
369 u8 iv_count[6];
370 u8 reserved[2];
371 u8 key[WLAN_KEY_LEN_CCMP];
372} __attribute__ ((packed));
373
374struct iwm_umac_key_remove {
375 struct iwm_umac_wifi_if hdr;
376 struct iwm_umac_key_hdr key_hdr;
377} __attribute__ ((packed));
378
379struct iwm_umac_tx_key_id {
380 struct iwm_umac_wifi_if hdr;
381 u8 key_idx;
382 u8 reserved[3];
383} __attribute__ ((packed));
384
385struct iwm_umac_cmd_stats_req {
386 __le32 flags;
387} __attribute__ ((packed));
388
389/* LMAC commands */
390int iwm_read_mac(struct iwm_priv *iwm, u8 *mac);
391int iwm_send_prio_table(struct iwm_priv *iwm);
392int iwm_send_init_calib_cfg(struct iwm_priv *iwm, u8 calib_requested);
393int iwm_send_periodic_calib_cfg(struct iwm_priv *iwm, u8 calib_requested);
394int iwm_send_calib_results(struct iwm_priv *iwm);
395int iwm_store_rxiq_calib_result(struct iwm_priv *iwm);
396
397/* UMAC commands */
398int iwm_send_wifi_if_cmd(struct iwm_priv *iwm, void *payload, u16 payload_size,
399 bool resp);
400int iwm_send_umac_reset(struct iwm_priv *iwm, __le32 reset_flags, bool resp);
401int iwm_umac_set_config_fix(struct iwm_priv *iwm, u16 tbl, u16 key, u32 value);
402int iwm_umac_set_config_var(struct iwm_priv *iwm, u16 key,
403 void *payload, u16 payload_size);
404int iwm_send_umac_config(struct iwm_priv *iwm, __le32 reset_flags);
405int iwm_send_mlme_profile(struct iwm_priv *iwm);
406int iwm_invalidate_mlme_profile(struct iwm_priv *iwm);
407int iwm_send_packet(struct iwm_priv *iwm, struct sk_buff *skb, int pool_id);
408int iwm_set_tx_key(struct iwm_priv *iwm, u8 key_idx);
409int iwm_set_key(struct iwm_priv *iwm, bool remove, bool set_tx_key,
410 struct iwm_key *key);
411int iwm_send_umac_stats_req(struct iwm_priv *iwm, u32 flags);
412int iwm_send_umac_channel_list(struct iwm_priv *iwm);
413int iwm_scan_ssids(struct iwm_priv *iwm, struct cfg80211_ssid *ssids,
414 int ssid_num);
415int iwm_scan_one_ssid(struct iwm_priv *iwm, u8 *ssid, int ssid_len);
416
417/* UDMA commands */
418int iwm_target_reset(struct iwm_priv *iwm);
419#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/debug.h b/drivers/net/wireless/iwmc3200wifi/debug.h
new file mode 100644
index 000000000000..8fbb42d9c21f
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/debug.h
@@ -0,0 +1,124 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
5 * Samuel Ortiz <samuel.ortiz@intel.com>
6 * Zhu Yi <yi.zhu@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 */
23
24#ifndef __IWM_DEBUG_H__
25#define __IWM_DEBUG_H__
26
27#define IWM_ERR(p, f, a...) dev_err(iwm_to_dev(p), f, ## a)
28#define IWM_WARN(p, f, a...) dev_warn(iwm_to_dev(p), f, ## a)
29#define IWM_INFO(p, f, a...) dev_info(iwm_to_dev(p), f, ## a)
30#define IWM_CRIT(p, f, a...) dev_crit(iwm_to_dev(p), f, ## a)
31
32#ifdef CONFIG_IWM_DEBUG
33
34#define IWM_DEBUG_MODULE(i, level, module, f, a...) \
35do { \
36 if (unlikely(i->dbg.dbg_module[IWM_DM_##module] >= (IWM_DL_##level)))\
37 dev_printk(KERN_INFO, (iwm_to_dev(i)), \
38 "%s " f, __func__ , ## a); \
39} while (0)
40
41#define IWM_HEXDUMP(i, level, module, pref, buf, len) \
42do { \
43 if (unlikely(i->dbg.dbg_module[IWM_DM_##module] >= (IWM_DL_##level)))\
44 print_hex_dump(KERN_INFO, pref, DUMP_PREFIX_OFFSET, \
45 16, 1, buf, len, 1); \
46} while (0)
47
48#else
49
50#define IWM_DEBUG_MODULE(i, level, module, f, a...)
51#define IWM_HEXDUMP(i, level, module, pref, buf, len)
52
53#endif /* CONFIG_IWM_DEBUG */
54
55/* Debug modules */
56enum iwm_debug_module_id {
57 IWM_DM_BOOT = 0,
58 IWM_DM_FW,
59 IWM_DM_SDIO,
60 IWM_DM_NTF,
61 IWM_DM_RX,
62 IWM_DM_TX,
63 IWM_DM_MLME,
64 IWM_DM_CMD,
65 IWM_DM_WEXT,
66 __IWM_DM_NR,
67};
68#define IWM_DM_DEFAULT 0
69
70#define IWM_DBG_BOOT(i, l, f, a...) IWM_DEBUG_MODULE(i, l, BOOT, f, ## a)
71#define IWM_DBG_FW(i, l, f, a...) IWM_DEBUG_MODULE(i, l, FW, f, ## a)
72#define IWM_DBG_SDIO(i, l, f, a...) IWM_DEBUG_MODULE(i, l, SDIO, f, ## a)
73#define IWM_DBG_NTF(i, l, f, a...) IWM_DEBUG_MODULE(i, l, NTF, f, ## a)
74#define IWM_DBG_RX(i, l, f, a...) IWM_DEBUG_MODULE(i, l, RX, f, ## a)
75#define IWM_DBG_TX(i, l, f, a...) IWM_DEBUG_MODULE(i, l, TX, f, ## a)
76#define IWM_DBG_MLME(i, l, f, a...) IWM_DEBUG_MODULE(i, l, MLME, f, ## a)
77#define IWM_DBG_CMD(i, l, f, a...) IWM_DEBUG_MODULE(i, l, CMD, f, ## a)
78#define IWM_DBG_WEXT(i, l, f, a...) IWM_DEBUG_MODULE(i, l, WEXT, f, ## a)
79
80/* Debug levels */
81enum iwm_debug_level {
82 IWM_DL_NONE = 0,
83 IWM_DL_ERR,
84 IWM_DL_WARN,
85 IWM_DL_INFO,
86 IWM_DL_DBG,
87};
88#define IWM_DL_DEFAULT IWM_DL_ERR
89
90struct iwm_debugfs {
91 struct iwm_priv *iwm;
92 struct dentry *rootdir;
93 struct dentry *devdir;
94 struct dentry *dbgdir;
95 struct dentry *txdir;
96 struct dentry *rxdir;
97 struct dentry *busdir;
98
99 u32 dbg_level;
100 struct dentry *dbg_level_dentry;
101
102 unsigned long dbg_modules;
103 struct dentry *dbg_modules_dentry;
104
105 u8 dbg_module[__IWM_DM_NR];
106 struct dentry *dbg_module_dentries[__IWM_DM_NR];
107
108 struct dentry *txq_dentry;
109 struct dentry *tx_credit_dentry;
110 struct dentry *rx_ticket_dentry;
111};
112
113#ifdef CONFIG_IWM_DEBUG
114int iwm_debugfs_init(struct iwm_priv *iwm);
115void iwm_debugfs_exit(struct iwm_priv *iwm);
116#else
117static inline int iwm_debugfs_init(struct iwm_priv *iwm)
118{
119 return 0;
120}
121static inline void iwm_debugfs_exit(struct iwm_priv *iwm) {}
122#endif
123
124#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/debugfs.c b/drivers/net/wireless/iwmc3200wifi/debugfs.c
new file mode 100644
index 000000000000..0fa7b9150d58
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/debugfs.c
@@ -0,0 +1,453 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
5 * Samuel Ortiz <samuel.ortiz@intel.com>
6 * Zhu Yi <yi.zhu@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 */
23
24#include <linux/kernel.h>
25#include <linux/bitops.h>
26#include <linux/debugfs.h>
27
28#include "iwm.h"
29#include "bus.h"
30#include "rx.h"
31#include "debug.h"
32
33static struct {
34 u8 id;
35 char *name;
36} iwm_debug_module[__IWM_DM_NR] = {
37 {IWM_DM_BOOT, "boot"},
38 {IWM_DM_FW, "fw"},
39 {IWM_DM_SDIO, "sdio"},
40 {IWM_DM_NTF, "ntf"},
41 {IWM_DM_RX, "rx"},
42 {IWM_DM_TX, "tx"},
43 {IWM_DM_MLME, "mlme"},
44 {IWM_DM_CMD, "cmd"},
45 {IWM_DM_WEXT, "wext"},
46};
47
48#define add_dbg_module(dbg, name, id, initlevel) \
49do { \
50 struct dentry *d; \
51 dbg.dbg_module[id] = (initlevel); \
52 d = debugfs_create_x8(name, 0600, dbg.dbgdir, \
53 &(dbg.dbg_module[id])); \
54 if (!IS_ERR(d)) \
55 dbg.dbg_module_dentries[id] = d; \
56} while (0)
57
58static int iwm_debugfs_u32_read(void *data, u64 *val)
59{
60 struct iwm_priv *iwm = data;
61
62 *val = iwm->dbg.dbg_level;
63 return 0;
64}
65
66static int iwm_debugfs_dbg_level_write(void *data, u64 val)
67{
68 struct iwm_priv *iwm = data;
69 int i;
70
71 iwm->dbg.dbg_level = val;
72
73 for (i = 0; i < __IWM_DM_NR; i++)
74 iwm->dbg.dbg_module[i] = val;
75
76 return 0;
77}
78DEFINE_SIMPLE_ATTRIBUTE(fops_iwm_dbg_level,
79 iwm_debugfs_u32_read, iwm_debugfs_dbg_level_write,
80 "%llu\n");
81
82static int iwm_debugfs_dbg_modules_write(void *data, u64 val)
83{
84 struct iwm_priv *iwm = data;
85 int i, bit;
86
87 iwm->dbg.dbg_modules = val;
88
89 for (i = 0; i < __IWM_DM_NR; i++)
90 iwm->dbg.dbg_module[i] = 0;
91
92 for_each_bit(bit, &iwm->dbg.dbg_modules, __IWM_DM_NR)
93 iwm->dbg.dbg_module[bit] = iwm->dbg.dbg_level;
94
95 return 0;
96}
97DEFINE_SIMPLE_ATTRIBUTE(fops_iwm_dbg_modules,
98 iwm_debugfs_u32_read, iwm_debugfs_dbg_modules_write,
99 "%llu\n");
100
101static int iwm_txrx_open(struct inode *inode, struct file *filp)
102{
103 filp->private_data = inode->i_private;
104 return 0;
105}
106
107
108static ssize_t iwm_debugfs_txq_read(struct file *filp, char __user *buffer,
109 size_t count, loff_t *ppos)
110{
111 struct iwm_priv *iwm = filp->private_data;
112 char *buf;
113 int i, buf_len = 4096;
114 size_t len = 0;
115 ssize_t ret;
116
117 if (*ppos != 0)
118 return 0;
119 if (count < sizeof(buf))
120 return -ENOSPC;
121
122 buf = kzalloc(buf_len, GFP_KERNEL);
123 if (!buf)
124 return -ENOMEM;
125
126 for (i = 0; i < IWM_TX_QUEUES; i++) {
127 struct iwm_tx_queue *txq = &iwm->txq[i];
128 struct sk_buff *skb;
129 int j;
130 unsigned long flags;
131
132 spin_lock_irqsave(&txq->queue.lock, flags);
133
134 skb = (struct sk_buff *)&txq->queue;
135
136 len += snprintf(buf + len, buf_len - len, "TXQ #%d\n", i);
137 len += snprintf(buf + len, buf_len - len, "\tStopped: %d\n",
138 __netif_subqueue_stopped(iwm_to_ndev(iwm),
139 txq->id));
140 len += snprintf(buf + len, buf_len - len, "\tConcat count:%d\n",
141 txq->concat_count);
142 len += snprintf(buf + len, buf_len - len, "\tQueue len: %d\n",
143 skb_queue_len(&txq->queue));
144 for (j = 0; j < skb_queue_len(&txq->queue); j++) {
145 struct iwm_tx_info *tx_info;
146
147 skb = skb->next;
148 tx_info = skb_to_tx_info(skb);
149
150 len += snprintf(buf + len, buf_len - len,
151 "\tSKB #%d\n", j);
152 len += snprintf(buf + len, buf_len - len,
153 "\t\tsta: %d\n", tx_info->sta);
154 len += snprintf(buf + len, buf_len - len,
155 "\t\tcolor: %d\n", tx_info->color);
156 len += snprintf(buf + len, buf_len - len,
157 "\t\ttid: %d\n", tx_info->tid);
158 }
159
160 spin_unlock_irqrestore(&txq->queue.lock, flags);
161 }
162
163 ret = simple_read_from_buffer(buffer, len, ppos, buf, buf_len);
164 kfree(buf);
165
166 return ret;
167}
168
169static ssize_t iwm_debugfs_tx_credit_read(struct file *filp,
170 char __user *buffer,
171 size_t count, loff_t *ppos)
172{
173 struct iwm_priv *iwm = filp->private_data;
174 struct iwm_tx_credit *credit = &iwm->tx_credit;
175 char *buf;
176 int i, buf_len = 4096;
177 size_t len = 0;
178 ssize_t ret;
179
180 if (*ppos != 0)
181 return 0;
182 if (count < sizeof(buf))
183 return -ENOSPC;
184
185 buf = kzalloc(buf_len, GFP_KERNEL);
186 if (!buf)
187 return -ENOMEM;
188
189 len += snprintf(buf + len, buf_len - len,
190 "NR pools: %d\n", credit->pool_nr);
191 len += snprintf(buf + len, buf_len - len,
192 "pools map: 0x%lx\n", credit->full_pools_map);
193
194 len += snprintf(buf + len, buf_len - len, "\n### POOLS ###\n");
195 for (i = 0; i < IWM_MACS_OUT_GROUPS; i++) {
196 len += snprintf(buf + len, buf_len - len,
197 "pools entry #%d\n", i);
198 len += snprintf(buf + len, buf_len - len,
199 "\tid: %d\n",
200 credit->pools[i].id);
201 len += snprintf(buf + len, buf_len - len,
202 "\tsid: %d\n",
203 credit->pools[i].sid);
204 len += snprintf(buf + len, buf_len - len,
205 "\tmin_pages: %d\n",
206 credit->pools[i].min_pages);
207 len += snprintf(buf + len, buf_len - len,
208 "\tmax_pages: %d\n",
209 credit->pools[i].max_pages);
210 len += snprintf(buf + len, buf_len - len,
211 "\talloc_pages: %d\n",
212 credit->pools[i].alloc_pages);
213 len += snprintf(buf + len, buf_len - len,
214 "\tfreed_pages: %d\n",
215 credit->pools[i].total_freed_pages);
216 }
217
218 len += snprintf(buf + len, buf_len - len, "\n### SPOOLS ###\n");
219 for (i = 0; i < IWM_MACS_OUT_SGROUPS; i++) {
220 len += snprintf(buf + len, buf_len - len,
221 "spools entry #%d\n", i);
222 len += snprintf(buf + len, buf_len - len,
223 "\tid: %d\n",
224 credit->spools[i].id);
225 len += snprintf(buf + len, buf_len - len,
226 "\tmax_pages: %d\n",
227 credit->spools[i].max_pages);
228 len += snprintf(buf + len, buf_len - len,
229 "\talloc_pages: %d\n",
230 credit->spools[i].alloc_pages);
231
232 }
233
234 ret = simple_read_from_buffer(buffer, len, ppos, buf, buf_len);
235 kfree(buf);
236
237 return ret;
238}
239
240static ssize_t iwm_debugfs_rx_ticket_read(struct file *filp,
241 char __user *buffer,
242 size_t count, loff_t *ppos)
243{
244 struct iwm_priv *iwm = filp->private_data;
245 struct iwm_rx_ticket_node *ticket, *next;
246 char *buf;
247 int buf_len = 4096, i;
248 size_t len = 0;
249 ssize_t ret;
250
251 if (*ppos != 0)
252 return 0;
253 if (count < sizeof(buf))
254 return -ENOSPC;
255
256 buf = kzalloc(buf_len, GFP_KERNEL);
257 if (!buf)
258 return -ENOMEM;
259
260 list_for_each_entry_safe(ticket, next, &iwm->rx_tickets, node) {
261 len += snprintf(buf + len, buf_len - len, "Ticket #%d\n",
262 ticket->ticket->id);
263 len += snprintf(buf + len, buf_len - len, "\taction: 0x%x\n",
264 ticket->ticket->action);
265 len += snprintf(buf + len, buf_len - len, "\tflags: 0x%x\n",
266 ticket->ticket->flags);
267 }
268
269 for (i = 0; i < IWM_RX_ID_HASH; i++) {
270 struct iwm_rx_packet *packet, *nxt;
271 struct list_head *pkt_list = &iwm->rx_packets[i];
272 if (!list_empty(pkt_list)) {
273 len += snprintf(buf + len, buf_len - len,
274 "Packet hash #%d\n", i);
275 list_for_each_entry_safe(packet, nxt, pkt_list, node) {
276 len += snprintf(buf + len, buf_len - len,
277 "\tPacket id: %d\n",
278 packet->id);
279 len += snprintf(buf + len, buf_len - len,
280 "\tPacket length: %lu\n",
281 packet->pkt_size);
282 }
283 }
284 }
285
286 ret = simple_read_from_buffer(buffer, len, ppos, buf, buf_len);
287 kfree(buf);
288
289 return ret;
290}
291
292
293static const struct file_operations iwm_debugfs_txq_fops = {
294 .owner = THIS_MODULE,
295 .open = iwm_txrx_open,
296 .read = iwm_debugfs_txq_read,
297};
298
299static const struct file_operations iwm_debugfs_tx_credit_fops = {
300 .owner = THIS_MODULE,
301 .open = iwm_txrx_open,
302 .read = iwm_debugfs_tx_credit_read,
303};
304
305static const struct file_operations iwm_debugfs_rx_ticket_fops = {
306 .owner = THIS_MODULE,
307 .open = iwm_txrx_open,
308 .read = iwm_debugfs_rx_ticket_read,
309};
310
311int iwm_debugfs_init(struct iwm_priv *iwm)
312{
313 int i, result;
314 char devdir[16];
315
316 iwm->dbg.rootdir = debugfs_create_dir(KBUILD_MODNAME, NULL);
317 result = PTR_ERR(iwm->dbg.rootdir);
318 if (!result || IS_ERR(iwm->dbg.rootdir)) {
319 if (result == -ENODEV) {
320 IWM_ERR(iwm, "DebugFS (CONFIG_DEBUG_FS) not "
321 "enabled in kernel config\n");
322 result = 0; /* No debugfs support */
323 }
324 IWM_ERR(iwm, "Couldn't create rootdir: %d\n", result);
325 goto error;
326 }
327
328 snprintf(devdir, sizeof(devdir), "%s", wiphy_name(iwm_to_wiphy(iwm)));
329
330 iwm->dbg.devdir = debugfs_create_dir(devdir, iwm->dbg.rootdir);
331 result = PTR_ERR(iwm->dbg.devdir);
332 if (IS_ERR(iwm->dbg.devdir) && (result != -ENODEV)) {
333 IWM_ERR(iwm, "Couldn't create devdir: %d\n", result);
334 goto error;
335 }
336
337 iwm->dbg.dbgdir = debugfs_create_dir("debug", iwm->dbg.devdir);
338 result = PTR_ERR(iwm->dbg.dbgdir);
339 if (IS_ERR(iwm->dbg.dbgdir) && (result != -ENODEV)) {
340 IWM_ERR(iwm, "Couldn't create dbgdir: %d\n", result);
341 goto error;
342 }
343
344 iwm->dbg.rxdir = debugfs_create_dir("rx", iwm->dbg.devdir);
345 result = PTR_ERR(iwm->dbg.rxdir);
346 if (IS_ERR(iwm->dbg.rxdir) && (result != -ENODEV)) {
347 IWM_ERR(iwm, "Couldn't create rx dir: %d\n", result);
348 goto error;
349 }
350
351 iwm->dbg.txdir = debugfs_create_dir("tx", iwm->dbg.devdir);
352 result = PTR_ERR(iwm->dbg.txdir);
353 if (IS_ERR(iwm->dbg.txdir) && (result != -ENODEV)) {
354 IWM_ERR(iwm, "Couldn't create tx dir: %d\n", result);
355 goto error;
356 }
357
358 iwm->dbg.busdir = debugfs_create_dir("bus", iwm->dbg.devdir);
359 result = PTR_ERR(iwm->dbg.busdir);
360 if (IS_ERR(iwm->dbg.busdir) && (result != -ENODEV)) {
361 IWM_ERR(iwm, "Couldn't create bus dir: %d\n", result);
362 goto error;
363 }
364
365 if (iwm->bus_ops->debugfs_init) {
366 result = iwm->bus_ops->debugfs_init(iwm, iwm->dbg.busdir);
367 if (result < 0) {
368 IWM_ERR(iwm, "Couldn't create bus entry: %d\n", result);
369 goto error;
370 }
371 }
372
373
374 iwm->dbg.dbg_level = IWM_DL_NONE;
375 iwm->dbg.dbg_level_dentry =
376 debugfs_create_file("level", 0200, iwm->dbg.dbgdir, iwm,
377 &fops_iwm_dbg_level);
378 result = PTR_ERR(iwm->dbg.dbg_level_dentry);
379 if (IS_ERR(iwm->dbg.dbg_level_dentry) && (result != -ENODEV)) {
380 IWM_ERR(iwm, "Couldn't create dbg_level: %d\n", result);
381 goto error;
382 }
383
384
385 iwm->dbg.dbg_modules = IWM_DM_DEFAULT;
386 iwm->dbg.dbg_modules_dentry =
387 debugfs_create_file("modules", 0200, iwm->dbg.dbgdir, iwm,
388 &fops_iwm_dbg_modules);
389 result = PTR_ERR(iwm->dbg.dbg_modules_dentry);
390 if (IS_ERR(iwm->dbg.dbg_modules_dentry) && (result != -ENODEV)) {
391 IWM_ERR(iwm, "Couldn't create dbg_modules: %d\n", result);
392 goto error;
393 }
394
395 for (i = 0; i < __IWM_DM_NR; i++)
396 add_dbg_module(iwm->dbg, iwm_debug_module[i].name,
397 iwm_debug_module[i].id, IWM_DL_DEFAULT);
398
399 iwm->dbg.txq_dentry = debugfs_create_file("queues", 0200,
400 iwm->dbg.txdir, iwm,
401 &iwm_debugfs_txq_fops);
402 result = PTR_ERR(iwm->dbg.txq_dentry);
403 if (IS_ERR(iwm->dbg.txq_dentry) && (result != -ENODEV)) {
404 IWM_ERR(iwm, "Couldn't create tx queue: %d\n", result);
405 goto error;
406 }
407
408 iwm->dbg.tx_credit_dentry = debugfs_create_file("credits", 0200,
409 iwm->dbg.txdir, iwm,
410 &iwm_debugfs_tx_credit_fops);
411 result = PTR_ERR(iwm->dbg.tx_credit_dentry);
412 if (IS_ERR(iwm->dbg.tx_credit_dentry) && (result != -ENODEV)) {
413 IWM_ERR(iwm, "Couldn't create tx credit: %d\n", result);
414 goto error;
415 }
416
417 iwm->dbg.rx_ticket_dentry = debugfs_create_file("tickets", 0200,
418 iwm->dbg.rxdir, iwm,
419 &iwm_debugfs_rx_ticket_fops);
420 result = PTR_ERR(iwm->dbg.rx_ticket_dentry);
421 if (IS_ERR(iwm->dbg.rx_ticket_dentry) && (result != -ENODEV)) {
422 IWM_ERR(iwm, "Couldn't create rx ticket: %d\n", result);
423 goto error;
424 }
425
426 return 0;
427
428 error:
429 return result;
430}
431
432void iwm_debugfs_exit(struct iwm_priv *iwm)
433{
434 int i;
435
436 for (i = 0; i < __IWM_DM_NR; i++)
437 debugfs_remove(iwm->dbg.dbg_module_dentries[i]);
438
439 debugfs_remove(iwm->dbg.dbg_modules_dentry);
440 debugfs_remove(iwm->dbg.dbg_level_dentry);
441 debugfs_remove(iwm->dbg.txq_dentry);
442 debugfs_remove(iwm->dbg.tx_credit_dentry);
443 debugfs_remove(iwm->dbg.rx_ticket_dentry);
444 if (iwm->bus_ops->debugfs_exit)
445 iwm->bus_ops->debugfs_exit(iwm);
446
447 debugfs_remove(iwm->dbg.busdir);
448 debugfs_remove(iwm->dbg.dbgdir);
449 debugfs_remove(iwm->dbg.txdir);
450 debugfs_remove(iwm->dbg.rxdir);
451 debugfs_remove(iwm->dbg.devdir);
452 debugfs_remove(iwm->dbg.rootdir);
453}
diff --git a/drivers/net/wireless/iwmc3200wifi/eeprom.c b/drivers/net/wireless/iwmc3200wifi/eeprom.c
new file mode 100644
index 000000000000..0f34b84fd2eb
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/eeprom.c
@@ -0,0 +1,187 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#include <linux/kernel.h>
40
41#include "iwm.h"
42#include "umac.h"
43#include "commands.h"
44#include "eeprom.h"
45
46static struct iwm_eeprom_entry eeprom_map[] = {
47 [IWM_EEPROM_SIG] =
48 {"Signature", IWM_EEPROM_SIG_OFF, IWM_EEPROM_SIG_LEN},
49
50 [IWM_EEPROM_VERSION] =
51 {"Version", IWM_EEPROM_VERSION_OFF, IWM_EEPROM_VERSION_LEN},
52
53 [IWM_EEPROM_OEM_HW_VERSION] =
54 {"OEM HW version", IWM_EEPROM_OEM_HW_VERSION_OFF,
55 IWM_EEPROM_OEM_HW_VERSION_LEN},
56
57 [IWM_EEPROM_MAC_VERSION] =
58 {"MAC version", IWM_EEPROM_MAC_VERSION_OFF, IWM_EEPROM_MAC_VERSION_LEN},
59
60 [IWM_EEPROM_CARD_ID] =
61 {"Card ID", IWM_EEPROM_CARD_ID_OFF, IWM_EEPROM_CARD_ID_LEN},
62
63 [IWM_EEPROM_RADIO_CONF] =
64 {"Radio config", IWM_EEPROM_RADIO_CONF_OFF, IWM_EEPROM_RADIO_CONF_LEN},
65
66 [IWM_EEPROM_SKU_CAP] =
67 {"SKU capabilities", IWM_EEPROM_SKU_CAP_OFF, IWM_EEPROM_SKU_CAP_LEN},
68
69 [IWM_EEPROM_CALIB_RXIQ_OFFSET] =
70 {"RX IQ offset", IWM_EEPROM_CALIB_RXIQ_OFF, IWM_EEPROM_INDIRECT_LEN},
71
72 [IWM_EEPROM_CALIB_RXIQ] =
73 {"Calib RX IQ", 0, IWM_EEPROM_CALIB_RXIQ_LEN},
74};
75
76
77static int iwm_eeprom_read(struct iwm_priv *iwm, u8 eeprom_id)
78{
79 int ret;
80 u32 entry_size, chunk_size, data_offset = 0, addr_offset = 0;
81 u32 addr;
82 struct iwm_udma_wifi_cmd udma_cmd;
83 struct iwm_umac_cmd umac_cmd;
84 struct iwm_umac_cmd_eeprom_proxy eeprom_cmd;
85
86 if (eeprom_id > (IWM_EEPROM_LAST - 1))
87 return -EINVAL;
88
89 entry_size = eeprom_map[eeprom_id].length;
90
91 if (eeprom_id >= IWM_EEPROM_INDIRECT_DATA) {
92 /* indirect data */
93 u32 off_id = eeprom_id - IWM_EEPROM_INDIRECT_DATA +
94 IWM_EEPROM_INDIRECT_OFFSET;
95
96 eeprom_map[eeprom_id].offset =
97 *(u16 *)(iwm->eeprom + eeprom_map[off_id].offset) << 1;
98 }
99
100 addr = eeprom_map[eeprom_id].offset;
101
102 udma_cmd.eop = 1;
103 udma_cmd.credit_group = 0x4;
104 udma_cmd.ra_tid = UMAC_HDI_ACT_TBL_IDX_HOST_CMD;
105 udma_cmd.lmac_offset = 0;
106
107 umac_cmd.id = UMAC_CMD_OPCODE_EEPROM_PROXY;
108 umac_cmd.resp = 1;
109
110 while (entry_size > 0) {
111 chunk_size = min_t(u32, entry_size, IWM_MAX_EEPROM_DATA_LEN);
112
113 eeprom_cmd.hdr.type =
114 cpu_to_le32(IWM_UMAC_CMD_EEPROM_TYPE_READ);
115 eeprom_cmd.hdr.offset = cpu_to_le32(addr + addr_offset);
116 eeprom_cmd.hdr.len = cpu_to_le32(chunk_size);
117
118 ret = iwm_hal_send_umac_cmd(iwm, &udma_cmd,
119 &umac_cmd, &eeprom_cmd,
120 sizeof(struct iwm_umac_cmd_eeprom_proxy));
121 if (ret < 0) {
122 IWM_ERR(iwm, "Couldn't read eeprom\n");
123 return ret;
124 }
125
126 ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_EEPROM_PROXY,
127 IWM_SRC_UMAC, 2*HZ);
128 if (ret < 0) {
129 IWM_ERR(iwm, "Did not get any eeprom answer\n");
130 return ret;
131 }
132
133 data_offset += chunk_size;
134 addr_offset += chunk_size;
135 entry_size -= chunk_size;
136 }
137
138 return 0;
139}
140
141u8 *iwm_eeprom_access(struct iwm_priv *iwm, u8 eeprom_id)
142{
143 if (!iwm->eeprom)
144 return ERR_PTR(-ENODEV);
145
146 return iwm->eeprom + eeprom_map[eeprom_id].offset;
147}
148
149int iwm_eeprom_init(struct iwm_priv *iwm)
150{
151 int i, ret = 0;
152 char name[32];
153
154 iwm->eeprom = kzalloc(IWM_EEPROM_LEN, GFP_KERNEL);
155 if (!iwm->eeprom)
156 return -ENOMEM;
157
158 for (i = IWM_EEPROM_FIRST; i < IWM_EEPROM_LAST; i++) {
159#ifdef CONFIG_IWM_B0_HW_SUPPORT
160 if (iwm->conf.hw_b0 && (i >= IWM_EEPROM_INDIRECT_OFFSET))
161 break;
162#endif
163 ret = iwm_eeprom_read(iwm, i);
164 if (ret < 0) {
165 IWM_ERR(iwm, "Couldn't read eeprom entry #%d: %s\n",
166 i, eeprom_map[i].name);
167 break;
168 }
169 }
170
171 IWM_DBG_BOOT(iwm, DBG, "EEPROM dump:\n");
172 for (i = IWM_EEPROM_FIRST; i < IWM_EEPROM_LAST; i++) {
173 memset(name, 0, 32);
174 sprintf(name, "%s: ", eeprom_map[i].name);
175
176 IWM_HEXDUMP(iwm, DBG, BOOT, name,
177 iwm->eeprom + eeprom_map[i].offset,
178 eeprom_map[i].length);
179 }
180
181 return ret;
182}
183
184void iwm_eeprom_exit(struct iwm_priv *iwm)
185{
186 kfree(iwm->eeprom);
187}
diff --git a/drivers/net/wireless/iwmc3200wifi/eeprom.h b/drivers/net/wireless/iwmc3200wifi/eeprom.h
new file mode 100644
index 000000000000..cdb31a6a1f5f
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/eeprom.h
@@ -0,0 +1,114 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#ifndef __IWM_EEPROM_H__
40#define __IWM_EEPROM_H__
41
42enum {
43 IWM_EEPROM_SIG = 0,
44 IWM_EEPROM_FIRST = IWM_EEPROM_SIG,
45 IWM_EEPROM_VERSION,
46 IWM_EEPROM_OEM_HW_VERSION,
47 IWM_EEPROM_MAC_VERSION,
48 IWM_EEPROM_CARD_ID,
49 IWM_EEPROM_RADIO_CONF,
50 IWM_EEPROM_SKU_CAP,
51
52 IWM_EEPROM_INDIRECT_OFFSET,
53 IWM_EEPROM_CALIB_RXIQ_OFFSET = IWM_EEPROM_INDIRECT_OFFSET,
54
55 IWM_EEPROM_INDIRECT_DATA,
56 IWM_EEPROM_CALIB_RXIQ = IWM_EEPROM_INDIRECT_DATA,
57
58 IWM_EEPROM_LAST,
59};
60
61#define IWM_EEPROM_SIG_OFF 0x00
62#define IWM_EEPROM_VERSION_OFF (0x54 << 1)
63#define IWM_EEPROM_OEM_HW_VERSION_OFF (0x56 << 1)
64#define IWM_EEPROM_MAC_VERSION_OFF (0x30 << 1)
65#define IWM_EEPROM_CARD_ID_OFF (0x5d << 1)
66#define IWM_EEPROM_RADIO_CONF_OFF (0x58 << 1)
67#define IWM_EEPROM_SKU_CAP_OFF (0x55 << 1)
68#define IWM_EEPROM_CALIB_CONFIG_OFF (0x7c << 1)
69
70#define IWM_EEPROM_SIG_LEN 4
71#define IWM_EEPROM_VERSION_LEN 2
72#define IWM_EEPROM_OEM_HW_VERSION_LEN 2
73#define IWM_EEPROM_MAC_VERSION_LEN 1
74#define IWM_EEPROM_CARD_ID_LEN 2
75#define IWM_EEPROM_RADIO_CONF_LEN 2
76#define IWM_EEPROM_SKU_CAP_LEN 2
77#define IWM_EEPROM_INDIRECT_LEN 2
78
79#define IWM_MAX_EEPROM_DATA_LEN 240
80#define IWM_EEPROM_LEN 0x800
81
82#define IWM_EEPROM_MIN_ALLOWED_VERSION 0x0610
83#define IWM_EEPROM_MAX_ALLOWED_VERSION 0x0700
84#define IWM_EEPROM_CURRENT_VERSION 0x0612
85
86#define IWM_EEPROM_SKU_CAP_BAND_24GHZ (1 << 4)
87#define IWM_EEPROM_SKU_CAP_BAND_52GHZ (1 << 5)
88#define IWM_EEPROM_SKU_CAP_11N_ENABLE (1 << 6)
89
90enum {
91 IWM_EEPROM_CALIB_CAL_HDR,
92 IWM_EEPROM_CALIB_TX_POWER,
93 IWM_EEPROM_CALIB_XTAL,
94 IWM_EEPROM_CALIB_TEMPERATURE,
95 IWM_EEPROM_CALIB_RX_BB_FILTER,
96 IWM_EEPROM_CALIB_RX_IQ,
97 IWM_EEPROM_CALIB_MAX,
98};
99
100#define IWM_EEPROM_CALIB_RXIQ_OFF (IWM_EEPROM_CALIB_CONFIG_OFF + \
101 (IWM_EEPROM_CALIB_RX_IQ << 1))
102#define IWM_EEPROM_CALIB_RXIQ_LEN sizeof(struct iwm_lmac_calib_rxiq)
103
104struct iwm_eeprom_entry {
105 char *name;
106 u32 offset;
107 u32 length;
108};
109
110int iwm_eeprom_init(struct iwm_priv *iwm);
111void iwm_eeprom_exit(struct iwm_priv *iwm);
112u8 *iwm_eeprom_access(struct iwm_priv *iwm, u8 eeprom_id);
113
114#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/fw.c b/drivers/net/wireless/iwmc3200wifi/fw.c
new file mode 100644
index 000000000000..db4ba0864730
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/fw.c
@@ -0,0 +1,388 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#include <linux/kernel.h>
40#include <linux/firmware.h>
41
42#include "iwm.h"
43#include "bus.h"
44#include "hal.h"
45#include "umac.h"
46#include "debug.h"
47#include "fw.h"
48#include "commands.h"
49
50static const char fw_barker[] = "*WESTOPFORNOONE*";
51
52/*
53 * @op_code: Op code we're looking for.
54 * @index: There can be several instances of the same opcode within
55 * the firmware. Index specifies which one we're looking for.
56 */
57static int iwm_fw_op_offset(struct iwm_priv *iwm, const struct firmware *fw,
58 u16 op_code, u32 index)
59{
60 int offset = -EINVAL, fw_offset;
61 u32 op_index = 0;
62 const u8 *fw_ptr;
63 struct iwm_fw_hdr_rec *rec;
64
65 fw_offset = 0;
66 fw_ptr = fw->data;
67
68 /* We first need to look for the firmware barker */
69 if (memcmp(fw_ptr, fw_barker, IWM_HDR_BARKER_LEN)) {
70 IWM_ERR(iwm, "No barker string in this FW\n");
71 return -EINVAL;
72 }
73
74 if (fw->size < IWM_HDR_LEN) {
75 IWM_ERR(iwm, "FW is too small (%d)\n", fw->size);
76 return -EINVAL;
77 }
78
79 fw_offset += IWM_HDR_BARKER_LEN;
80
81 while (fw_offset < fw->size) {
82 rec = (struct iwm_fw_hdr_rec *)(fw_ptr + fw_offset);
83
84 IWM_DBG_FW(iwm, DBG, "FW: op_code: 0x%x, len: %d @ 0x%x\n",
85 rec->op_code, rec->len, fw_offset);
86
87 if (rec->op_code == IWM_HDR_REC_OP_INVALID) {
88 IWM_DBG_FW(iwm, DBG, "Reached INVALID op code\n");
89 break;
90 }
91
92 if (rec->op_code == op_code) {
93 if (op_index == index) {
94 fw_offset += sizeof(struct iwm_fw_hdr_rec);
95 offset = fw_offset;
96 goto out;
97 }
98 op_index++;
99 }
100
101 fw_offset += sizeof(struct iwm_fw_hdr_rec) + rec->len;
102 }
103
104 out:
105 return offset;
106}
107
108static int iwm_load_firmware_chunk(struct iwm_priv *iwm,
109 const struct firmware *fw,
110 struct iwm_fw_img_desc *img_desc)
111{
112 struct iwm_udma_nonwifi_cmd target_cmd;
113 u32 chunk_size;
114 const u8 *chunk_ptr;
115 int ret = 0;
116
117 IWM_DBG_FW(iwm, INFO, "Loading FW chunk: %d bytes @ 0x%x\n",
118 img_desc->length, img_desc->address);
119
120 target_cmd.opcode = UMAC_HDI_OUT_OPCODE_WRITE;
121 target_cmd.handle_by_hw = 1;
122 target_cmd.op2 = 0;
123 target_cmd.resp = 0;
124 target_cmd.eop = 1;
125
126 chunk_size = img_desc->length;
127 chunk_ptr = fw->data + img_desc->offset;
128
129 while (chunk_size > 0) {
130 u32 tmp_chunk_size;
131
132 tmp_chunk_size = min_t(u32, chunk_size,
133 IWM_MAX_NONWIFI_CMD_BUFF_SIZE);
134
135 target_cmd.addr = cpu_to_le32(img_desc->address +
136 (chunk_ptr - fw->data - img_desc->offset));
137 target_cmd.op1_sz = cpu_to_le32(tmp_chunk_size);
138
139 IWM_DBG_FW(iwm, DBG, "\t%d bytes @ 0x%x\n",
140 tmp_chunk_size, target_cmd.addr);
141
142 ret = iwm_hal_send_target_cmd(iwm, &target_cmd, chunk_ptr);
143 if (ret < 0) {
144 IWM_ERR(iwm, "Couldn't load FW chunk\n");
145 break;
146 }
147
148 chunk_size -= tmp_chunk_size;
149 chunk_ptr += tmp_chunk_size;
150 }
151
152 return ret;
153}
154/*
155 * To load a fw image to the target, we basically go through the
156 * fw, looking for OP_MEM_DESC records. Once we found one, we
157 * pass it to iwm_load_firmware_chunk().
158 * The OP_MEM_DESC records contain the actuall memory chunk to be
159 * sent, but also the destination address.
160 */
161static int iwm_load_img(struct iwm_priv *iwm, const char *img_name)
162{
163 const struct firmware *fw;
164 struct iwm_fw_img_desc *img_desc;
165 struct iwm_fw_img_ver *ver;
166 int ret = 0, fw_offset;
167 u32 opcode_idx = 0, build_date;
168 char *build_tag;
169
170 ret = request_firmware(&fw, img_name, iwm_to_dev(iwm));
171 if (ret) {
172 IWM_ERR(iwm, "Request firmware failed");
173 return ret;
174 }
175
176 IWM_DBG_FW(iwm, INFO, "Start to load FW %s\n", img_name);
177
178 while (1) {
179 fw_offset = iwm_fw_op_offset(iwm, fw,
180 IWM_HDR_REC_OP_MEM_DESC,
181 opcode_idx);
182 if (fw_offset < 0)
183 break;
184
185 img_desc = (struct iwm_fw_img_desc *)(fw->data + fw_offset);
186 ret = iwm_load_firmware_chunk(iwm, fw, img_desc);
187 if (ret < 0)
188 goto err_release_fw;
189 opcode_idx++;
190 };
191
192 /* Read firmware version */
193 fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_SW_VER, 0);
194 if (fw_offset < 0)
195 goto err_release_fw;
196
197 ver = (struct iwm_fw_img_ver *)(fw->data + fw_offset);
198
199 /* Read build tag */
200 fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_TAG, 0);
201 if (fw_offset < 0)
202 goto err_release_fw;
203
204 build_tag = (char *)(fw->data + fw_offset);
205
206 /* Read build date */
207 fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_DATE, 0);
208 if (fw_offset < 0)
209 goto err_release_fw;
210
211 build_date = *(u32 *)(fw->data + fw_offset);
212
213 IWM_INFO(iwm, "%s:\n", img_name);
214 IWM_INFO(iwm, "\tVersion: %02X.%02X\n", ver->major, ver->minor);
215 IWM_INFO(iwm, "\tBuild tag: %s\n", build_tag);
216 IWM_INFO(iwm, "\tBuild date: %x-%x-%x\n",
217 IWM_BUILD_YEAR(build_date), IWM_BUILD_MONTH(build_date),
218 IWM_BUILD_DAY(build_date));
219
220
221 err_release_fw:
222 release_firmware(fw);
223
224 return ret;
225}
226
227static int iwm_load_umac(struct iwm_priv *iwm)
228{
229 struct iwm_udma_nonwifi_cmd target_cmd;
230 int ret;
231
232 ret = iwm_load_img(iwm, iwm->bus_ops->umac_name);
233 if (ret < 0)
234 return ret;
235
236 /* We've loaded the UMAC, we can tell the target to jump there */
237 target_cmd.opcode = UMAC_HDI_OUT_OPCODE_JUMP;
238 target_cmd.addr = cpu_to_le32(UMAC_MU_FW_INST_DATA_12_ADDR);
239 target_cmd.op1_sz = 0;
240 target_cmd.op2 = 0;
241 target_cmd.handle_by_hw = 0;
242 target_cmd.resp = 1 ;
243 target_cmd.eop = 1;
244
245 ret = iwm_hal_send_target_cmd(iwm, &target_cmd, NULL);
246 if (ret < 0)
247 IWM_ERR(iwm, "Couldn't send JMP command\n");
248
249 return ret;
250}
251
252static int iwm_load_lmac(struct iwm_priv *iwm, const char *img_name)
253{
254 int ret;
255
256 ret = iwm_load_img(iwm, img_name);
257 if (ret < 0)
258 return ret;
259
260 return iwm_send_umac_reset(iwm,
261 cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_CLK_EN), 0);
262}
263
264/*
265 * We currently have to load 3 FWs:
266 * 1) The UMAC (Upper MAC).
267 * 2) The calibration LMAC (Lower MAC).
268 * We then send the calibration init command, so that the device can
269 * run a first calibration round.
270 * 3) The operational LMAC, which replaces the calibration one when it's
271 * done with the first calibration round.
272 *
273 * Once those 3 FWs have been loaded, we send the periodic calibration
274 * command, and then the device is available for regular 802.11 operations.
275 */
276int iwm_load_fw(struct iwm_priv *iwm)
277{
278 int ret;
279
280 /* We first start downloading the UMAC */
281 ret = iwm_load_umac(iwm);
282 if (ret < 0) {
283 IWM_ERR(iwm, "UMAC loading failed\n");
284 return ret;
285 }
286
287 /* Handle UMAC_ALIVE notification */
288 ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_ALIVE, IWM_SRC_UMAC,
289 WAIT_NOTIF_TIMEOUT);
290 if (ret) {
291 IWM_ERR(iwm, "Handle UMAC_ALIVE failed: %d\n", ret);
292 return ret;
293 }
294
295 /* UMAC is alive, we can download the calibration LMAC */
296 ret = iwm_load_lmac(iwm, iwm->bus_ops->calib_lmac_name);
297 if (ret) {
298 IWM_ERR(iwm, "Calibration LMAC loading failed\n");
299 return ret;
300 }
301
302 /* Handle UMAC_INIT_COMPLETE notification */
303 ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
304 IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
305 if (ret) {
306 IWM_ERR(iwm, "Handle INIT_COMPLETE failed for calibration "
307 "LMAC: %d\n", ret);
308 return ret;
309 }
310
311 /* Read EEPROM data */
312 ret = iwm_eeprom_init(iwm);
313 if (ret < 0) {
314 IWM_ERR(iwm, "Couldn't init eeprom array\n");
315 return ret;
316 }
317
318#ifdef CONFIG_IWM_B0_HW_SUPPORT
319 if (iwm->conf.hw_b0) {
320 clear_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->conf.init_calib_map);
321 clear_bit(PHY_CALIBRATE_RX_IQ_CMD,
322 &iwm->conf.periodic_calib_map);
323 }
324#endif
325 /* Read RX IQ calibration result from EEPROM */
326 if (test_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->conf.init_calib_map)) {
327 iwm_store_rxiq_calib_result(iwm);
328 set_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->calib_done_map);
329 }
330
331 iwm_send_prio_table(iwm);
332 iwm_send_init_calib_cfg(iwm, iwm->conf.init_calib_map);
333
334 while (iwm->calib_done_map != iwm->conf.init_calib_map) {
335 ret = iwm_notif_handle(iwm, CALIBRATION_RES_NOTIFICATION,
336 IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT);
337 if (ret) {
338 IWM_ERR(iwm, "Wait for calibration result timeout\n");
339 goto out;
340 }
341 IWM_DBG_FW(iwm, DBG, "Got calibration result. calib_done_map: "
342 "0x%lx, requested calibrations: 0x%lx\n",
343 iwm->calib_done_map, iwm->conf.init_calib_map);
344 }
345
346 /* Handle LMAC CALIBRATION_COMPLETE notification */
347 ret = iwm_notif_handle(iwm, CALIBRATION_COMPLETE_NOTIFICATION,
348 IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT);
349 if (ret) {
350 IWM_ERR(iwm, "Wait for CALIBRATION_COMPLETE timeout\n");
351 goto out;
352 }
353
354 IWM_INFO(iwm, "LMAC calibration done: 0x%lx\n", iwm->calib_done_map);
355
356 iwm_send_umac_reset(iwm, cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_RESET), 1);
357
358 ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_RESET, IWM_SRC_UMAC,
359 WAIT_NOTIF_TIMEOUT);
360 if (ret) {
361 IWM_ERR(iwm, "Wait for UMAC RESET timeout\n");
362 goto out;
363 }
364
365 /* Download the operational LMAC */
366 ret = iwm_load_lmac(iwm, iwm->bus_ops->lmac_name);
367 if (ret) {
368 IWM_ERR(iwm, "LMAC loading failed\n");
369 goto out;
370 }
371
372 ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
373 IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
374 if (ret) {
375 IWM_ERR(iwm, "Handle INIT_COMPLETE failed for LMAC: %d\n", ret);
376 goto out;
377 }
378
379 iwm_send_prio_table(iwm);
380 iwm_send_calib_results(iwm);
381 iwm_send_periodic_calib_cfg(iwm, iwm->conf.periodic_calib_map);
382
383 return 0;
384
385 out:
386 iwm_eeprom_exit(iwm);
387 return ret;
388}
diff --git a/drivers/net/wireless/iwmc3200wifi/fw.h b/drivers/net/wireless/iwmc3200wifi/fw.h
new file mode 100644
index 000000000000..c70a3b40dad3
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/fw.h
@@ -0,0 +1,100 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#ifndef __IWM_FW_H__
40#define __IWM_FW_H__
41
42/**
43 * struct iwm_fw_hdr_rec - An iwm firmware image is a
44 * concatenation of various records. Each of them is
45 * defined by an ID (aka op code), a length, and the
46 * actual data.
47 * @op_code: The record ID, see IWM_HDR_REC_OP_*
48 *
49 * @len: The record payload length
50 *
51 * @buf: The record payload
52 */
53struct iwm_fw_hdr_rec {
54 u16 op_code;
55 u16 len;
56 u8 buf[0];
57};
58
59/* Header's definitions */
60#define IWM_HDR_LEN (512)
61#define IWM_HDR_BARKER_LEN (16)
62
63/* Header's opcodes */
64#define IWM_HDR_REC_OP_INVALID (0x00)
65#define IWM_HDR_REC_OP_BUILD_DATE (0x01)
66#define IWM_HDR_REC_OP_BUILD_TAG (0x02)
67#define IWM_HDR_REC_OP_SW_VER (0x03)
68#define IWM_HDR_REC_OP_HW_SKU (0x04)
69#define IWM_HDR_REC_OP_BUILD_OPT (0x05)
70#define IWM_HDR_REC_OP_MEM_DESC (0x06)
71#define IWM_HDR_REC_USERDEFS (0x07)
72
73/* Header's records length (in bytes) */
74#define IWM_HDR_REC_LEN_BUILD_DATE (4)
75#define IWM_HDR_REC_LEN_BUILD_TAG (64)
76#define IWM_HDR_REC_LEN_SW_VER (4)
77#define IWM_HDR_REC_LEN_HW_SKU (4)
78#define IWM_HDR_REC_LEN_BUILD_OPT (4)
79#define IWM_HDR_REC_LEN_MEM_DESC (12)
80#define IWM_HDR_REC_LEN_USERDEF (64)
81
82#define IWM_BUILD_YEAR(date) ((date >> 16) & 0xffff)
83#define IWM_BUILD_MONTH(date) ((date >> 8) & 0xff)
84#define IWM_BUILD_DAY(date) (date & 0xff)
85
86struct iwm_fw_img_desc {
87 u32 offset;
88 u32 address;
89 u32 length;
90};
91
92struct iwm_fw_img_ver {
93 u8 minor;
94 u8 major;
95 u16 reserved;
96};
97
98int iwm_load_fw(struct iwm_priv *iwm);
99
100#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/hal.c b/drivers/net/wireless/iwmc3200wifi/hal.c
new file mode 100644
index 000000000000..ee127fe4f43f
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/hal.c
@@ -0,0 +1,464 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39/*
40 * Hardware Abstraction Layer for iwm.
41 *
42 * This file mostly defines an abstraction API for
43 * sending various commands to the target.
44 *
45 * We have 2 types of commands: wifi and non-wifi ones.
46 *
47 * - wifi commands:
48 * They are used for sending LMAC and UMAC commands,
49 * and thus are the most commonly used ones.
50 * There are 2 different wifi command types, the regular
51 * one and the LMAC one. The former is used to send
52 * UMAC commands (see UMAC_CMD_OPCODE_* from umac.h)
53 * while the latter is used for sending commands to the
54 * LMAC. If you look at LMAC commands you'll se that they
55 * are actually regular iwlwifi target commands encapsulated
56 * into a special UMAC command called UMAC passthrough.
57 * This is due to the fact the the host talks exclusively
58 * to the UMAC and so there needs to be a special UMAC
59 * command for talking to the LMAC.
60 * This is how a wifi command is layed out:
61 * ------------------------
62 * | iwm_udma_out_wifi_hdr |
63 * ------------------------
64 * | SW meta_data (32 bits) |
65 * ------------------------
66 * | iwm_dev_cmd_hdr |
67 * ------------------------
68 * | payload |
69 * | .... |
70 *
71 * - non-wifi, or general commands:
72 * Those commands are handled by the device's bootrom,
73 * and are typically sent when the UMAC and the LMAC
74 * are not yet available.
75 * * This is how a non-wifi command is layed out:
76 * ---------------------------
77 * | iwm_udma_out_nonwifi_hdr |
78 * ---------------------------
79 * | payload |
80 * | .... |
81
82 *
83 * All the commands start with a UDMA header, which is
84 * basically a 32 bits field. The 4 LSB there define
85 * an opcode that allows the target to differentiate
86 * between wifi (opcode is 0xf) and non-wifi commands
87 * (opcode is [0..0xe]).
88 *
89 * When a command (wifi or non-wifi) is supposed to receive
90 * an answer, we queue the command buffer. When we do receive
91 * a command response from the UMAC, we go through the list
92 * of pending command, and pass both the command and the answer
93 * to the rx handler. Each command is sent with a unique
94 * sequence id, and the answer is sent with the same one. This
95 * is how we're supposed to match an answer with its command.
96 * See rx.c:iwm_rx_handle_[non]wifi() and iwm_get_pending_[non]wifi()
97 * for the implementation details.
98 */
99#include <linux/kernel.h>
100#include <linux/netdevice.h>
101
102#include "iwm.h"
103#include "bus.h"
104#include "hal.h"
105#include "umac.h"
106#include "debug.h"
107
108static void iwm_nonwifi_cmd_init(struct iwm_priv *iwm,
109 struct iwm_nonwifi_cmd *cmd,
110 struct iwm_udma_nonwifi_cmd *udma_cmd)
111{
112 INIT_LIST_HEAD(&cmd->pending);
113
114 spin_lock(&iwm->cmd_lock);
115
116 cmd->resp_received = 0;
117
118 cmd->seq_num = iwm->nonwifi_seq_num;
119 udma_cmd->seq_num = cpu_to_le16(cmd->seq_num);
120
121 cmd->seq_num = iwm->nonwifi_seq_num++;
122 iwm->nonwifi_seq_num %= UMAC_NONWIFI_SEQ_NUM_MAX;
123
124 if (udma_cmd->resp)
125 list_add_tail(&cmd->pending, &iwm->nonwifi_pending_cmd);
126
127 spin_unlock(&iwm->cmd_lock);
128
129 cmd->buf.start = cmd->buf.payload;
130 cmd->buf.len = 0;
131
132 memcpy(&cmd->udma_cmd, udma_cmd, sizeof(*udma_cmd));
133}
134
135u16 iwm_alloc_wifi_cmd_seq(struct iwm_priv *iwm)
136{
137 u16 seq_num = iwm->wifi_seq_num;
138
139 iwm->wifi_seq_num++;
140 iwm->wifi_seq_num %= UMAC_WIFI_SEQ_NUM_MAX;
141
142 return seq_num;
143}
144
145static void iwm_wifi_cmd_init(struct iwm_priv *iwm,
146 struct iwm_wifi_cmd *cmd,
147 struct iwm_udma_wifi_cmd *udma_cmd,
148 struct iwm_umac_cmd *umac_cmd,
149 struct iwm_lmac_cmd *lmac_cmd,
150 u16 payload_size)
151{
152 INIT_LIST_HEAD(&cmd->pending);
153
154 spin_lock(&iwm->cmd_lock);
155
156 cmd->seq_num = iwm_alloc_wifi_cmd_seq(iwm);
157 umac_cmd->seq_num = cpu_to_le16(cmd->seq_num);
158
159 if (umac_cmd->resp)
160 list_add_tail(&cmd->pending, &iwm->wifi_pending_cmd);
161
162 spin_unlock(&iwm->cmd_lock);
163
164 cmd->buf.start = cmd->buf.payload;
165 cmd->buf.len = 0;
166
167 if (lmac_cmd) {
168 cmd->buf.start -= sizeof(struct iwm_lmac_hdr);
169
170 lmac_cmd->seq_num = cpu_to_le16(cmd->seq_num);
171 lmac_cmd->count = cpu_to_le16(payload_size);
172
173 memcpy(&cmd->lmac_cmd, lmac_cmd, sizeof(*lmac_cmd));
174
175 umac_cmd->count = cpu_to_le16(sizeof(struct iwm_lmac_hdr));
176 } else
177 umac_cmd->count = 0;
178
179 umac_cmd->count = cpu_to_le16(payload_size +
180 le16_to_cpu(umac_cmd->count));
181 udma_cmd->count = cpu_to_le16(sizeof(struct iwm_umac_fw_cmd_hdr) +
182 le16_to_cpu(umac_cmd->count));
183
184 memcpy(&cmd->udma_cmd, udma_cmd, sizeof(*udma_cmd));
185 memcpy(&cmd->umac_cmd, umac_cmd, sizeof(*umac_cmd));
186}
187
188void iwm_cmd_flush(struct iwm_priv *iwm)
189{
190 struct iwm_wifi_cmd *wcmd, *wnext;
191 struct iwm_nonwifi_cmd *nwcmd, *nwnext;
192
193 list_for_each_entry_safe(wcmd, wnext, &iwm->wifi_pending_cmd, pending) {
194 list_del(&wcmd->pending);
195 kfree(wcmd);
196 }
197
198 list_for_each_entry_safe(nwcmd, nwnext, &iwm->nonwifi_pending_cmd,
199 pending) {
200 list_del(&nwcmd->pending);
201 kfree(nwcmd);
202 }
203}
204
205struct iwm_wifi_cmd *iwm_get_pending_wifi_cmd(struct iwm_priv *iwm, u16 seq_num)
206{
207 struct iwm_wifi_cmd *cmd, *next;
208
209 list_for_each_entry_safe(cmd, next, &iwm->wifi_pending_cmd, pending)
210 if (cmd->seq_num == seq_num) {
211 list_del(&cmd->pending);
212 return cmd;
213 }
214
215 return NULL;
216}
217
218struct iwm_nonwifi_cmd *
219iwm_get_pending_nonwifi_cmd(struct iwm_priv *iwm, u8 seq_num, u8 cmd_opcode)
220{
221 struct iwm_nonwifi_cmd *cmd, *next;
222
223 list_for_each_entry_safe(cmd, next, &iwm->nonwifi_pending_cmd, pending)
224 if ((cmd->seq_num == seq_num) &&
225 (cmd->udma_cmd.opcode == cmd_opcode) &&
226 (cmd->resp_received)) {
227 list_del(&cmd->pending);
228 return cmd;
229 }
230
231 return NULL;
232}
233
234static void iwm_build_udma_nonwifi_hdr(struct iwm_priv *iwm,
235 struct iwm_udma_out_nonwifi_hdr *hdr,
236 struct iwm_udma_nonwifi_cmd *cmd)
237{
238 memset(hdr, 0, sizeof(*hdr));
239
240 SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_OPCODE, cmd->opcode);
241 SET_VAL32(hdr->cmd, UDMA_HDI_OUT_NW_CMD_RESP, cmd->resp);
242 SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_EOT, 1);
243 SET_VAL32(hdr->cmd, UDMA_HDI_OUT_NW_CMD_HANDLE_BY_HW,
244 cmd->handle_by_hw);
245 SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_SIGNATURE, UMAC_HDI_OUT_SIGNATURE);
246 SET_VAL32(hdr->cmd, UDMA_HDI_OUT_CMD_NON_WIFI_HW_SEQ_NUM,
247 le16_to_cpu(cmd->seq_num));
248
249 hdr->addr = cmd->addr;
250 hdr->op1_sz = cmd->op1_sz;
251 hdr->op2 = cmd->op2;
252}
253
254static int iwm_send_udma_nonwifi_cmd(struct iwm_priv *iwm,
255 struct iwm_nonwifi_cmd *cmd)
256{
257 struct iwm_udma_out_nonwifi_hdr *udma_hdr;
258 struct iwm_nonwifi_cmd_buff *buf;
259 struct iwm_udma_nonwifi_cmd *udma_cmd = &cmd->udma_cmd;
260
261 buf = &cmd->buf;
262
263 buf->start -= sizeof(struct iwm_umac_nonwifi_out_hdr);
264 buf->len += sizeof(struct iwm_umac_nonwifi_out_hdr);
265
266 udma_hdr = (struct iwm_udma_out_nonwifi_hdr *)(buf->start);
267
268 iwm_build_udma_nonwifi_hdr(iwm, udma_hdr, udma_cmd);
269
270 IWM_DBG_CMD(iwm, DBG,
271 "Send UDMA nonwifi cmd: opcode = 0x%x, resp = 0x%x, "
272 "hw = 0x%x, seqnum = %d, addr = 0x%x, op1_sz = 0x%x, "
273 "op2 = 0x%x\n", udma_cmd->opcode, udma_cmd->resp,
274 udma_cmd->handle_by_hw, cmd->seq_num, udma_cmd->addr,
275 udma_cmd->op1_sz, udma_cmd->op2);
276
277 return iwm_bus_send_chunk(iwm, buf->start, buf->len);
278}
279
280void iwm_udma_wifi_hdr_set_eop(struct iwm_priv *iwm, u8 *buf, u8 eop)
281{
282 struct iwm_udma_out_wifi_hdr *hdr = (struct iwm_udma_out_wifi_hdr *)buf;
283
284 SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_EOT, eop);
285}
286
287void iwm_build_udma_wifi_hdr(struct iwm_priv *iwm,
288 struct iwm_udma_out_wifi_hdr *hdr,
289 struct iwm_udma_wifi_cmd *cmd)
290{
291 memset(hdr, 0, sizeof(*hdr));
292
293 SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_OPCODE, UMAC_HDI_OUT_OPCODE_WIFI);
294 SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_EOT, cmd->eop);
295 SET_VAL32(hdr->cmd, UMAC_HDI_OUT_CMD_SIGNATURE, UMAC_HDI_OUT_SIGNATURE);
296
297 SET_VAL32(hdr->meta_data, UMAC_HDI_OUT_BYTE_COUNT,
298 le16_to_cpu(cmd->count));
299 SET_VAL32(hdr->meta_data, UMAC_HDI_OUT_CREDIT_GRP, cmd->credit_group);
300 SET_VAL32(hdr->meta_data, UMAC_HDI_OUT_RATID, cmd->ra_tid);
301 SET_VAL32(hdr->meta_data, UMAC_HDI_OUT_LMAC_OFFSET, cmd->lmac_offset);
302}
303
304void iwm_build_umac_hdr(struct iwm_priv *iwm,
305 struct iwm_umac_fw_cmd_hdr *hdr,
306 struct iwm_umac_cmd *cmd)
307{
308 memset(hdr, 0, sizeof(*hdr));
309
310 SET_VAL32(hdr->meta_data, UMAC_FW_CMD_BYTE_COUNT,
311 le16_to_cpu(cmd->count));
312 SET_VAL32(hdr->meta_data, UMAC_FW_CMD_TX_STA_COLOR, cmd->color);
313 SET_VAL8(hdr->cmd.flags, UMAC_DEV_CMD_FLAGS_RESP_REQ, cmd->resp);
314
315 hdr->cmd.cmd = cmd->id;
316 hdr->cmd.seq_num = cmd->seq_num;
317}
318
319static int iwm_send_udma_wifi_cmd(struct iwm_priv *iwm,
320 struct iwm_wifi_cmd *cmd)
321{
322 struct iwm_umac_wifi_out_hdr *umac_hdr;
323 struct iwm_wifi_cmd_buff *buf;
324 struct iwm_udma_wifi_cmd *udma_cmd = &cmd->udma_cmd;
325 struct iwm_umac_cmd *umac_cmd = &cmd->umac_cmd;
326 int ret;
327
328 buf = &cmd->buf;
329
330 buf->start -= sizeof(struct iwm_umac_wifi_out_hdr);
331 buf->len += sizeof(struct iwm_umac_wifi_out_hdr);
332
333 umac_hdr = (struct iwm_umac_wifi_out_hdr *)(buf->start);
334
335 iwm_build_udma_wifi_hdr(iwm, &umac_hdr->hw_hdr, udma_cmd);
336 iwm_build_umac_hdr(iwm, &umac_hdr->sw_hdr, umac_cmd);
337
338 IWM_DBG_CMD(iwm, DBG,
339 "Send UDMA wifi cmd: opcode = 0x%x, UMAC opcode = 0x%x, "
340 "eop = 0x%x, count = 0x%x, credit_group = 0x%x, "
341 "ra_tid = 0x%x, lmac_offset = 0x%x, seqnum = %d\n",
342 UMAC_HDI_OUT_OPCODE_WIFI, umac_cmd->id,
343 udma_cmd->eop, udma_cmd->count, udma_cmd->credit_group,
344 udma_cmd->ra_tid, udma_cmd->lmac_offset, cmd->seq_num);
345
346 if (umac_cmd->id == UMAC_CMD_OPCODE_WIFI_PASS_THROUGH)
347 IWM_DBG_CMD(iwm, DBG, "\tLMAC opcode: 0x%x\n",
348 cmd->lmac_cmd.id);
349
350 ret = iwm_tx_credit_alloc(iwm, udma_cmd->credit_group, buf->len);
351
352 /* We keep sending UMAC reset regardless of the command credits.
353 * The UMAC is supposed to be reset anyway and the Tx credits are
354 * reinitialized afterwards. If we are lucky, the reset could
355 * still be done even though we have run out of credits for the
356 * command pool at this moment.*/
357 if (ret && (umac_cmd->id != UMAC_CMD_OPCODE_RESET)) {
358 IWM_DBG_TX(iwm, DBG, "Failed to alloc tx credit for cmd %d\n",
359 umac_cmd->id);
360 return ret;
361 }
362
363 return iwm_bus_send_chunk(iwm, buf->start, buf->len);
364}
365
366/* target_cmd a.k.a udma_nonwifi_cmd can be sent when UMAC is not available */
367int iwm_hal_send_target_cmd(struct iwm_priv *iwm,
368 struct iwm_udma_nonwifi_cmd *udma_cmd,
369 const void *payload)
370{
371 struct iwm_nonwifi_cmd *cmd;
372 int ret;
373
374 cmd = kzalloc(sizeof(struct iwm_nonwifi_cmd), GFP_KERNEL);
375 if (!cmd) {
376 IWM_ERR(iwm, "Couldn't alloc memory for hal cmd\n");
377 return -ENOMEM;
378 }
379
380 iwm_nonwifi_cmd_init(iwm, cmd, udma_cmd);
381
382 if (cmd->udma_cmd.opcode == UMAC_HDI_OUT_OPCODE_WRITE ||
383 cmd->udma_cmd.opcode == UMAC_HDI_OUT_OPCODE_WRITE_PERSISTENT) {
384 cmd->buf.len = le32_to_cpu(cmd->udma_cmd.op1_sz);
385 memcpy(&cmd->buf.payload, payload, cmd->buf.len);
386 }
387
388 ret = iwm_send_udma_nonwifi_cmd(iwm, cmd);
389
390 if (!udma_cmd->resp)
391 kfree(cmd);
392
393 if (ret < 0)
394 return ret;
395
396 return cmd->seq_num;
397}
398
399static void iwm_build_lmac_hdr(struct iwm_priv *iwm, struct iwm_lmac_hdr *hdr,
400 struct iwm_lmac_cmd *cmd)
401{
402 memset(hdr, 0, sizeof(*hdr));
403
404 hdr->id = cmd->id;
405 hdr->flags = 0; /* Is this ever used? */
406 hdr->seq_num = cmd->seq_num;
407}
408
409/*
410 * iwm_hal_send_host_cmd(): sends commands to the UMAC or the LMAC.
411 * Sending command to the LMAC is equivalent to sending a
412 * regular UMAC command with the LMAC passtrough or the LMAC
413 * wrapper UMAC command IDs.
414 */
415int iwm_hal_send_host_cmd(struct iwm_priv *iwm,
416 struct iwm_udma_wifi_cmd *udma_cmd,
417 struct iwm_umac_cmd *umac_cmd,
418 struct iwm_lmac_cmd *lmac_cmd,
419 const void *payload, u16 payload_size)
420{
421 struct iwm_wifi_cmd *cmd;
422 struct iwm_lmac_hdr *hdr;
423 int lmac_hdr_len = 0;
424 int ret;
425
426 cmd = kzalloc(sizeof(struct iwm_wifi_cmd), GFP_KERNEL);
427 if (!cmd) {
428 IWM_ERR(iwm, "Couldn't alloc memory for wifi hal cmd\n");
429 return -ENOMEM;
430 }
431
432 iwm_wifi_cmd_init(iwm, cmd, udma_cmd, umac_cmd, lmac_cmd, payload_size);
433
434 if (lmac_cmd) {
435 hdr = (struct iwm_lmac_hdr *)(cmd->buf.start);
436
437 iwm_build_lmac_hdr(iwm, hdr, &cmd->lmac_cmd);
438 lmac_hdr_len = sizeof(struct iwm_lmac_hdr);
439 }
440
441 memcpy(cmd->buf.payload, payload, payload_size);
442 cmd->buf.len = le16_to_cpu(umac_cmd->count);
443
444 ret = iwm_send_udma_wifi_cmd(iwm, cmd);
445
446 /* We free the cmd if we're not expecting any response */
447 if (!umac_cmd->resp)
448 kfree(cmd);
449 return ret;
450}
451
452/*
453 * iwm_hal_send_umac_cmd(): This is a special case for
454 * iwm_hal_send_host_cmd() to send direct UMAC cmd (without
455 * LMAC involved).
456 */
457int iwm_hal_send_umac_cmd(struct iwm_priv *iwm,
458 struct iwm_udma_wifi_cmd *udma_cmd,
459 struct iwm_umac_cmd *umac_cmd,
460 const void *payload, u16 payload_size)
461{
462 return iwm_hal_send_host_cmd(iwm, udma_cmd, umac_cmd, NULL,
463 payload, payload_size);
464}
diff --git a/drivers/net/wireless/iwmc3200wifi/hal.h b/drivers/net/wireless/iwmc3200wifi/hal.h
new file mode 100644
index 000000000000..0adfdc85765d
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/hal.h
@@ -0,0 +1,236 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#ifndef _IWM_HAL_H_
40#define _IWM_HAL_H_
41
42#include "umac.h"
43
44#define GET_VAL8(s, name) ((s >> name##_POS) & name##_SEED)
45#define GET_VAL16(s, name) ((le16_to_cpu(s) >> name##_POS) & name##_SEED)
46#define GET_VAL32(s, name) ((le32_to_cpu(s) >> name##_POS) & name##_SEED)
47
48#define SET_VAL8(s, name, val) \
49do { \
50 s = (s & ~(name##_SEED << name##_POS)) | \
51 ((val & name##_SEED) << name##_POS); \
52} while (0)
53
54#define SET_VAL16(s, name, val) \
55do { \
56 s = cpu_to_le16((le16_to_cpu(s) & ~(name##_SEED << name##_POS)) | \
57 ((val & name##_SEED) << name##_POS)); \
58} while (0)
59
60#define SET_VAL32(s, name, val) \
61do { \
62 s = cpu_to_le32((le32_to_cpu(s) & ~(name##_SEED << name##_POS)) | \
63 ((val & name##_SEED) << name##_POS)); \
64} while (0)
65
66
67#define UDMA_UMAC_INIT { .eop = 1, \
68 .credit_group = 0x4, \
69 .ra_tid = UMAC_HDI_ACT_TBL_IDX_HOST_CMD, \
70 .lmac_offset = 0 }
71#define UDMA_LMAC_INIT { .eop = 1, \
72 .credit_group = 0x4, \
73 .ra_tid = UMAC_HDI_ACT_TBL_IDX_HOST_CMD, \
74 .lmac_offset = 4 }
75
76
77/* UDMA IN OP CODE -- cmd bits [3:0] */
78#define UDMA_IN_OPCODE_MASK 0xF
79
80#define UDMA_IN_OPCODE_GENERAL_RESP 0x0
81#define UDMA_IN_OPCODE_READ_RESP 0x1
82#define UDMA_IN_OPCODE_WRITE_RESP 0x2
83#define UDMA_IN_OPCODE_PERS_WRITE_RESP 0x5
84#define UDMA_IN_OPCODE_PERS_READ_RESP 0x6
85#define UDMA_IN_OPCODE_RD_MDFY_WR_RESP 0x7
86#define UDMA_IN_OPCODE_EP_MNGMT_MSG 0x8
87#define UDMA_IN_OPCODE_CRDT_CHNG_MSG 0x9
88#define UDMA_IN_OPCODE_CNTRL_DATABASE_MSG 0xA
89#define UDMA_IN_OPCODE_SW_MSG 0xB
90#define UDMA_IN_OPCODE_WIFI 0xF
91#define UDMA_IN_OPCODE_WIFI_LMAC 0x1F
92#define UDMA_IN_OPCODE_WIFI_UMAC 0x2F
93
94/* HW API: udma_hdi_nonwifi API (OUT and IN) */
95
96/* iwm_udma_nonwifi_cmd request response -- bits [9:9] */
97#define UDMA_HDI_OUT_NW_CMD_RESP_POS 9
98#define UDMA_HDI_OUT_NW_CMD_RESP_SEED 0x1
99
100/* iwm_udma_nonwifi_cmd handle by HW -- bits [11:11] */
101#define UDMA_HDI_OUT_NW_CMD_HANDLE_BY_HW_POS 11
102#define UDMA_HDI_OUT_NW_CMD_HANDLE_BY_HW_SEED 0x1
103
104/* iwm_udma_nonwifi_cmd sequence-number -- bits [12:15] */
105#define UDMA_HDI_OUT_NW_CMD_SEQ_NUM_POS 12
106#define UDMA_HDI_OUT_NW_CMD_SEQ_NUM_SEED 0xF
107
108/* UDMA IN Non-WIFI HW sequence number -- bits [12:15] */
109#define UDMA_IN_NW_HW_SEQ_NUM_POS 12
110#define UDMA_IN_NW_HW_SEQ_NUM_SEED 0xF
111
112/* UDMA IN Non-WIFI HW signature -- bits [16:31] */
113#define UDMA_IN_NW_HW_SIG_POS 16
114#define UDMA_IN_NW_HW_SIG_SEED 0xFFFF
115
116/* fixed signature */
117#define UDMA_IN_NW_HW_SIG 0xCBBC
118
119/* UDMA IN Non-WIFI HW block length -- bits [32:35] */
120#define UDMA_IN_NW_HW_LENGTH_SEED 0xF
121#define UDMA_IN_NW_HW_LENGTH_POS 32
122
123/* End of HW API: udma_hdi_nonwifi API (OUT and IN) */
124
125#define IWM_SDIO_FW_MAX_CHUNK_SIZE 2032
126#define IWM_MAX_WIFI_HEADERS_SIZE 32
127#define IWM_MAX_NONWIFI_HEADERS_SIZE 16
128#define IWM_MAX_NONWIFI_CMD_BUFF_SIZE (IWM_SDIO_FW_MAX_CHUNK_SIZE - \
129 IWM_MAX_NONWIFI_HEADERS_SIZE)
130#define IWM_MAX_WIFI_CMD_BUFF_SIZE (IWM_SDIO_FW_MAX_CHUNK_SIZE - \
131 IWM_MAX_WIFI_HEADERS_SIZE)
132
133#define IWM_HAL_CONCATENATE_BUF_SIZE 8192
134
135struct iwm_wifi_cmd_buff {
136 u16 len;
137 u8 *start;
138 u8 hdr[IWM_MAX_WIFI_HEADERS_SIZE];
139 u8 payload[IWM_MAX_WIFI_CMD_BUFF_SIZE];
140};
141
142struct iwm_nonwifi_cmd_buff {
143 u16 len;
144 u8 *start;
145 u8 hdr[IWM_MAX_NONWIFI_HEADERS_SIZE];
146 u8 payload[IWM_MAX_NONWIFI_CMD_BUFF_SIZE];
147};
148
149struct iwm_udma_nonwifi_cmd {
150 u8 opcode;
151 u8 eop;
152 u8 resp;
153 u8 handle_by_hw;
154 __le32 addr;
155 __le32 op1_sz;
156 __le32 op2;
157 __le16 seq_num;
158};
159
160struct iwm_udma_wifi_cmd {
161 __le16 count;
162 u8 eop;
163 u8 credit_group;
164 u8 ra_tid;
165 u8 lmac_offset;
166};
167
168struct iwm_umac_cmd {
169 u8 id;
170 __le16 count;
171 u8 resp;
172 __le16 seq_num;
173 u8 color;
174};
175
176struct iwm_lmac_cmd {
177 u8 id;
178 __le16 count;
179 u8 resp;
180 __le16 seq_num;
181};
182
183struct iwm_nonwifi_cmd {
184 u16 seq_num;
185 bool resp_received;
186 struct list_head pending;
187 struct iwm_udma_nonwifi_cmd udma_cmd;
188 struct iwm_umac_cmd umac_cmd;
189 struct iwm_lmac_cmd lmac_cmd;
190 struct iwm_nonwifi_cmd_buff buf;
191 u32 flags;
192};
193
194struct iwm_wifi_cmd {
195 u16 seq_num;
196 struct list_head pending;
197 struct iwm_udma_wifi_cmd udma_cmd;
198 struct iwm_umac_cmd umac_cmd;
199 struct iwm_lmac_cmd lmac_cmd;
200 struct iwm_wifi_cmd_buff buf;
201 u32 flags;
202};
203
204void iwm_cmd_flush(struct iwm_priv *iwm);
205
206struct iwm_wifi_cmd *iwm_get_pending_wifi_cmd(struct iwm_priv *iwm,
207 u16 seq_num);
208struct iwm_nonwifi_cmd *iwm_get_pending_nonwifi_cmd(struct iwm_priv *iwm,
209 u8 seq_num, u8 cmd_opcode);
210
211
212int iwm_hal_send_target_cmd(struct iwm_priv *iwm,
213 struct iwm_udma_nonwifi_cmd *ucmd,
214 const void *payload);
215
216int iwm_hal_send_host_cmd(struct iwm_priv *iwm,
217 struct iwm_udma_wifi_cmd *udma_cmd,
218 struct iwm_umac_cmd *umac_cmd,
219 struct iwm_lmac_cmd *lmac_cmd,
220 const void *payload, u16 payload_size);
221
222int iwm_hal_send_umac_cmd(struct iwm_priv *iwm,
223 struct iwm_udma_wifi_cmd *udma_cmd,
224 struct iwm_umac_cmd *umac_cmd,
225 const void *payload, u16 payload_size);
226
227u16 iwm_alloc_wifi_cmd_seq(struct iwm_priv *iwm);
228
229void iwm_udma_wifi_hdr_set_eop(struct iwm_priv *iwm, u8 *buf, u8 eop);
230void iwm_build_udma_wifi_hdr(struct iwm_priv *iwm,
231 struct iwm_udma_out_wifi_hdr *hdr,
232 struct iwm_udma_wifi_cmd *cmd);
233void iwm_build_umac_hdr(struct iwm_priv *iwm,
234 struct iwm_umac_fw_cmd_hdr *hdr,
235 struct iwm_umac_cmd *cmd);
236#endif /* _IWM_HAL_H_ */
diff --git a/drivers/net/wireless/iwmc3200wifi/iwm.h b/drivers/net/wireless/iwmc3200wifi/iwm.h
new file mode 100644
index 000000000000..3b29681792bb
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/iwm.h
@@ -0,0 +1,350 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#ifndef __IWM_H__
40#define __IWM_H__
41
42#include <linux/netdevice.h>
43#include <linux/wireless.h>
44#include <net/cfg80211.h>
45
46#include "debug.h"
47#include "hal.h"
48#include "umac.h"
49#include "lmac.h"
50#include "eeprom.h"
51
52#define IWM_COPYRIGHT "Copyright(c) 2009 Intel Corporation"
53#define IWM_AUTHOR "<ilw@linux.intel.com>"
54
55#define CONFIG_IWM_B0_HW_SUPPORT 1
56
57#define IWM_SRC_LMAC UMAC_HDI_IN_SOURCE_FHRX
58#define IWM_SRC_UDMA UMAC_HDI_IN_SOURCE_UDMA
59#define IWM_SRC_UMAC UMAC_HDI_IN_SOURCE_FW
60#define IWM_SRC_NUM 3
61
62#define IWM_POWER_INDEX_MIN 0
63#define IWM_POWER_INDEX_MAX 5
64#define IWM_POWER_INDEX_DEFAULT 3
65
66struct iwm_conf {
67 u32 sdio_ior_timeout;
68 unsigned long init_calib_map;
69 unsigned long periodic_calib_map;
70 bool reset_on_fatal_err;
71 bool auto_connect;
72 bool wimax_not_present;
73 bool enable_qos;
74 u32 mode;
75
76 u32 power_index;
77 u32 frag_threshold;
78 u32 rts_threshold;
79 bool cts_to_self;
80
81 u32 assoc_timeout;
82 u32 roam_timeout;
83 u32 wireless_mode;
84 u32 coexist_mode;
85
86 u8 ibss_band;
87 u8 ibss_channel;
88
89 u8 mac_addr[ETH_ALEN];
90#ifdef CONFIG_IWM_B0_HW_SUPPORT
91 bool hw_b0;
92#endif
93};
94
95enum {
96 COEX_MODE_SA = 1,
97 COEX_MODE_XOR,
98 COEX_MODE_CM,
99 COEX_MODE_MAX,
100};
101
102struct iwm_if_ops;
103struct iwm_wifi_cmd;
104
105struct pool_entry {
106 int id; /* group id */
107 int sid; /* super group id */
108 int min_pages; /* min capacity in pages */
109 int max_pages; /* max capacity in pages */
110 int alloc_pages; /* allocated # of pages. incresed by driver */
111 int total_freed_pages; /* total freed # of pages. incresed by UMAC */
112};
113
114struct spool_entry {
115 int id;
116 int max_pages;
117 int alloc_pages;
118};
119
120struct iwm_tx_credit {
121 spinlock_t lock;
122 int pool_nr;
123 unsigned long full_pools_map; /* bitmap for # of filled tx pools */
124 struct pool_entry pools[IWM_MACS_OUT_GROUPS];
125 struct spool_entry spools[IWM_MACS_OUT_SGROUPS];
126};
127
128struct iwm_notif {
129 struct list_head pending;
130 u32 cmd_id;
131 void *cmd;
132 u8 src;
133 void *buf;
134 unsigned long buf_size;
135};
136
137struct iwm_sta_info {
138 u8 addr[ETH_ALEN];
139 bool valid;
140 bool qos;
141 u8 color;
142};
143
144struct iwm_tx_info {
145 u8 sta;
146 u8 color;
147 u8 tid;
148};
149
150struct iwm_rx_info {
151 unsigned long rx_size;
152 unsigned long rx_buf_size;
153};
154
155#define IWM_NUM_KEYS 4
156
157struct iwm_umac_key_hdr {
158 u8 mac[ETH_ALEN];
159 u8 key_idx;
160 u8 multicast; /* BCast encrypt & BCast decrypt of frames FROM mac */
161} __attribute__ ((packed));
162
163struct iwm_key {
164 struct iwm_umac_key_hdr hdr;
165 u8 in_use;
166 u8 alg;
167 u32 flags;
168 u8 tx_seq[IW_ENCODE_SEQ_MAX_SIZE];
169 u8 rx_seq[IW_ENCODE_SEQ_MAX_SIZE];
170 u8 key_len;
171 u8 key[32];
172};
173
174#define IWM_RX_ID_HASH 0xff
175#define IWM_RX_ID_GET_HASH(id) ((id) % IWM_RX_ID_HASH)
176
177#define IWM_STA_TABLE_NUM 16
178#define IWM_TX_LIST_SIZE 64
179#define IWM_RX_LIST_SIZE 256
180
181#define IWM_SCAN_ID_MAX 0xff
182
183#define IWM_STATUS_READY 0
184#define IWM_STATUS_SCANNING 1
185#define IWM_STATUS_SCAN_ABORTING 2
186#define IWM_STATUS_ASSOCIATING 3
187#define IWM_STATUS_ASSOCIATED 4
188
189#define IWM_RADIO_RFKILL_OFF 0
190#define IWM_RADIO_RFKILL_HW 1
191#define IWM_RADIO_RFKILL_SW 2
192
193struct iwm_tx_queue {
194 int id;
195 struct sk_buff_head queue;
196 struct workqueue_struct *wq;
197 struct work_struct worker;
198 u8 concat_buf[IWM_HAL_CONCATENATE_BUF_SIZE];
199 int concat_count;
200 u8 *concat_ptr;
201};
202
203/* Queues 0 ~ 3 for AC data, 5 for iPAN */
204#define IWM_TX_QUEUES 5
205#define IWM_TX_DATA_QUEUES 4
206#define IWM_TX_CMD_QUEUE 4
207
208struct iwm_bss_info {
209 struct list_head node;
210 struct cfg80211_bss *cfg_bss;
211 struct iwm_umac_notif_bss_info *bss;
212};
213
214typedef int (*iwm_handler)(struct iwm_priv *priv, u8 *buf,
215 unsigned long buf_size, struct iwm_wifi_cmd *cmd);
216
217#define IWM_WATCHDOG_PERIOD (6 * HZ)
218
219struct iwm_priv {
220 struct wireless_dev *wdev;
221 struct iwm_if_ops *bus_ops;
222
223 struct iwm_conf conf;
224
225 unsigned long status;
226 unsigned long radio;
227
228 struct list_head pending_notif;
229 wait_queue_head_t notif_queue;
230
231 wait_queue_head_t nonwifi_queue;
232
233 unsigned long calib_done_map;
234 struct {
235 u8 *buf;
236 u32 size;
237 } calib_res[CALIBRATION_CMD_NUM];
238
239 struct iwm_umac_profile *umac_profile;
240 bool umac_profile_active;
241
242 u8 bssid[ETH_ALEN];
243 u8 channel;
244 u16 rate;
245
246 struct iwm_sta_info sta_table[IWM_STA_TABLE_NUM];
247 struct list_head bss_list;
248
249 void (*nonwifi_rx_handlers[UMAC_HDI_IN_OPCODE_NONWIFI_MAX])
250 (struct iwm_priv *priv, u8 *buf, unsigned long buf_size);
251
252 const iwm_handler *umac_handlers;
253 const iwm_handler *lmac_handlers;
254 DECLARE_BITMAP(lmac_handler_map, LMAC_COMMAND_ID_NUM);
255 DECLARE_BITMAP(umac_handler_map, LMAC_COMMAND_ID_NUM);
256 DECLARE_BITMAP(udma_handler_map, LMAC_COMMAND_ID_NUM);
257
258 struct list_head wifi_pending_cmd;
259 struct list_head nonwifi_pending_cmd;
260 u16 wifi_seq_num;
261 u8 nonwifi_seq_num;
262 spinlock_t cmd_lock;
263
264 u32 core_enabled;
265
266 u8 scan_id;
267 struct cfg80211_scan_request *scan_request;
268
269 struct sk_buff_head rx_list;
270 struct list_head rx_tickets;
271 struct list_head rx_packets[IWM_RX_ID_HASH];
272 struct workqueue_struct *rx_wq;
273 struct work_struct rx_worker;
274
275 struct iwm_tx_credit tx_credit;
276 struct iwm_tx_queue txq[IWM_TX_QUEUES];
277
278 struct iwm_key keys[IWM_NUM_KEYS];
279 struct iwm_key *default_key;
280
281 wait_queue_head_t mlme_queue;
282
283 struct iw_statistics wstats;
284 struct delayed_work stats_request;
285
286 struct iwm_debugfs dbg;
287
288 u8 *eeprom;
289 struct timer_list watchdog;
290 struct work_struct reset_worker;
291 struct rfkill *rfkill;
292
293 char private[0] __attribute__((__aligned__(NETDEV_ALIGN)));
294};
295
296static inline void *iwm_private(struct iwm_priv *iwm)
297{
298 BUG_ON(!iwm);
299 return &iwm->private;
300}
301
302#define hw_to_iwm(h) (h->iwm)
303#define iwm_to_dev(i) (wiphy_dev(i->wdev->wiphy))
304#define iwm_to_wiphy(i) (i->wdev->wiphy)
305#define wiphy_to_iwm(w) (struct iwm_priv *)(wiphy_priv(w))
306#define iwm_to_wdev(i) (i->wdev)
307#define wdev_to_iwm(w) (struct iwm_priv *)(wdev_priv(w))
308#define iwm_to_ndev(i) (i->wdev->netdev)
309#define ndev_to_iwm(n) (wdev_to_iwm(n->ieee80211_ptr))
310#define skb_to_rx_info(s) ((struct iwm_rx_info *)(s->cb))
311#define skb_to_tx_info(s) ((struct iwm_tx_info *)s->cb)
312
313extern const struct iw_handler_def iwm_iw_handler_def;
314
315void *iwm_if_alloc(int sizeof_bus, struct device *dev,
316 struct iwm_if_ops *if_ops);
317void iwm_if_free(struct iwm_priv *iwm);
318int iwm_mode_to_nl80211_iftype(int mode);
319int iwm_priv_init(struct iwm_priv *iwm);
320void iwm_reset(struct iwm_priv *iwm);
321void iwm_tx_credit_init_pools(struct iwm_priv *iwm,
322 struct iwm_umac_notif_alive *alive);
323int iwm_tx_credit_alloc(struct iwm_priv *iwm, int id, int nb);
324int iwm_notif_send(struct iwm_priv *iwm, struct iwm_wifi_cmd *cmd,
325 u8 cmd_id, u8 source, u8 *buf, unsigned long buf_size);
326int iwm_notif_handle(struct iwm_priv *iwm, u32 cmd, u8 source, long timeout);
327void iwm_init_default_profile(struct iwm_priv *iwm,
328 struct iwm_umac_profile *profile);
329void iwm_link_on(struct iwm_priv *iwm);
330void iwm_link_off(struct iwm_priv *iwm);
331int iwm_up(struct iwm_priv *iwm);
332int iwm_down(struct iwm_priv *iwm);
333
334/* TX API */
335void iwm_tx_credit_inc(struct iwm_priv *iwm, int id, int total_freed_pages);
336void iwm_tx_worker(struct work_struct *work);
337int iwm_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
338
339/* RX API */
340void iwm_rx_setup_handlers(struct iwm_priv *iwm);
341int iwm_rx_handle(struct iwm_priv *iwm, u8 *buf, unsigned long buf_size);
342int iwm_rx_handle_resp(struct iwm_priv *iwm, u8 *buf, unsigned long buf_size,
343 struct iwm_wifi_cmd *cmd);
344void iwm_rx_free(struct iwm_priv *iwm);
345
346/* RF Kill API */
347int iwm_rfkill_init(struct iwm_priv *iwm);
348void iwm_rfkill_exit(struct iwm_priv *iwm);
349
350#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/lmac.h b/drivers/net/wireless/iwmc3200wifi/lmac.h
new file mode 100644
index 000000000000..db2e5eea1895
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/lmac.h
@@ -0,0 +1,457 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#ifndef __IWM_LMAC_H__
40#define __IWM_LMAC_H__
41
42struct iwm_lmac_hdr {
43 u8 id;
44 u8 flags;
45 __le16 seq_num;
46} __attribute__ ((packed));
47
48/* LMAC commands */
49#define CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_AFTER_MSK 0x1
50
51struct iwm_lmac_cal_cfg_elt {
52 __le32 enable; /* 1 means LMAC needs to do something */
53 __le32 start; /* 1 to start calibration, 0 to stop */
54 __le32 send_res; /* 1 for sending back results */
55 __le32 apply_res; /* 1 for applying calibration results to HW */
56 __le32 reserved;
57} __attribute__ ((packed));
58
59struct iwm_lmac_cal_cfg_status {
60 struct iwm_lmac_cal_cfg_elt init;
61 struct iwm_lmac_cal_cfg_elt periodic;
62 __le32 flags; /* CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_AFTER_MSK */
63} __attribute__ ((packed));
64
65struct iwm_lmac_cal_cfg_cmd {
66 struct iwm_lmac_cal_cfg_status ucode_cfg;
67 struct iwm_lmac_cal_cfg_status driver_cfg;
68 __le32 reserved;
69} __attribute__ ((packed));
70
71struct iwm_lmac_cal_cfg_resp {
72 __le32 status;
73} __attribute__ ((packed));
74
75#define IWM_CARD_STATE_SW_HW_ENABLED 0x00
76#define IWM_CARD_STATE_HW_DISABLED 0x01
77#define IWM_CARD_STATE_SW_DISABLED 0x02
78#define IWM_CARD_STATE_CTKILL_DISABLED 0x04
79#define IWM_CARD_STATE_IS_RXON 0x10
80
81struct iwm_lmac_card_state {
82 __le32 flags;
83} __attribute__ ((packed));
84
85/**
86 * COEX_PRIORITY_TABLE_CMD
87 *
88 * Priority entry for each state
89 * Will keep two tables, for STA and WIPAN
90 */
91enum {
92 /* UN-ASSOCIATION PART */
93 COEX_UNASSOC_IDLE = 0,
94 COEX_UNASSOC_MANUAL_SCAN,
95 COEX_UNASSOC_AUTO_SCAN,
96
97 /* CALIBRATION */
98 COEX_CALIBRATION,
99 COEX_PERIODIC_CALIBRATION,
100
101 /* CONNECTION */
102 COEX_CONNECTION_ESTAB,
103
104 /* ASSOCIATION PART */
105 COEX_ASSOCIATED_IDLE,
106 COEX_ASSOC_MANUAL_SCAN,
107 COEX_ASSOC_AUTO_SCAN,
108 COEX_ASSOC_ACTIVE_LEVEL,
109
110 /* RF ON/OFF */
111 COEX_RF_ON,
112 COEX_RF_OFF,
113 COEX_STAND_ALONE_DEBUG,
114
115 /* IPNN */
116 COEX_IPAN_ASSOC_LEVEL,
117
118 /* RESERVED */
119 COEX_RSRVD1,
120 COEX_RSRVD2,
121
122 COEX_EVENTS_NUM
123};
124
125#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK 0x1
126#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK 0x2
127#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_MSK 0x4
128
129struct coex_event {
130 u8 req_prio;
131 u8 win_med_prio;
132 u8 reserved;
133 u8 flags;
134} __attribute__ ((packed));
135
136#define COEX_FLAGS_STA_TABLE_VALID_MSK 0x1
137#define COEX_FLAGS_UNASSOC_WAKEUP_UMASK_MSK 0x4
138#define COEX_FLAGS_ASSOC_WAKEUP_UMASK_MSK 0x8
139#define COEX_FLAGS_COEX_ENABLE_MSK 0x80
140
141struct iwm_coex_prio_table_cmd {
142 u8 flags;
143 u8 reserved[3];
144 struct coex_event sta_prio[COEX_EVENTS_NUM];
145} __attribute__ ((packed));
146
147/* Coexistence definitions
148 *
149 * Constants to fill in the Priorities' Tables
150 * RP - Requested Priority
151 * WP - Win Medium Priority: priority assigned when the contention has been won
152 * FLAGS - Combination of COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK and
153 * COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK
154 */
155
156#define COEX_UNASSOC_IDLE_FLAGS 0
157#define COEX_UNASSOC_MANUAL_SCAN_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
158 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
159#define COEX_UNASSOC_AUTO_SCAN_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
160 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
161#define COEX_CALIBRATION_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
162 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
163#define COEX_PERIODIC_CALIBRATION_FLAGS 0
164/* COEX_CONNECTION_ESTAB: we need DELAY_MEDIUM_FREE_NTFY to let WiMAX
165 * disconnect from network. */
166#define COEX_CONNECTION_ESTAB_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
167 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK | \
168 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_MSK)
169#define COEX_ASSOCIATED_IDLE_FLAGS 0
170#define COEX_ASSOC_MANUAL_SCAN_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
171 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
172#define COEX_ASSOC_AUTO_SCAN_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
173 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
174#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
175#define COEX_RF_ON_FLAGS 0
176#define COEX_RF_OFF_FLAGS 0
177#define COEX_STAND_ALONE_DEBUG_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
178 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK)
179#define COEX_IPAN_ASSOC_LEVEL_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
180 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK | \
181 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_MSK)
182#define COEX_RSRVD1_FLAGS 0
183#define COEX_RSRVD2_FLAGS 0
184/* XOR_RF_ON is the event wrapping all radio ownership. We need
185 * DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network. */
186#define COEX_XOR_RF_ON_FLAGS (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_MSK | \
187 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK | \
188 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_MSK)
189
190/* LMAC OP CODES */
191#define REPLY_PAD 0x0
192#define REPLY_ALIVE 0x1
193#define REPLY_ERROR 0x2
194#define REPLY_ECHO 0x3
195#define REPLY_HALT 0x6
196
197/* RXON state commands */
198#define REPLY_RX_ON 0x10
199#define REPLY_RX_ON_ASSOC 0x11
200#define REPLY_RX_OFF 0x12
201#define REPLY_QOS_PARAM 0x13
202#define REPLY_RX_ON_TIMING 0x14
203#define REPLY_INTERNAL_QOS_PARAM 0x15
204#define REPLY_RX_INT_TIMEOUT_CNFG 0x16
205#define REPLY_NULL 0x17
206
207/* Multi-Station support */
208#define REPLY_ADD_STA 0x18
209#define REPLY_REMOVE_STA 0x19
210#define REPLY_RESET_ALL_STA 0x1a
211
212/* RX, TX */
213#define REPLY_ALM_RX 0x1b
214#define REPLY_TX 0x1c
215#define REPLY_TXFIFO_FLUSH 0x1e
216
217/* MISC commands */
218#define REPLY_MGMT_MCAST_KEY 0x1f
219#define REPLY_WEPKEY 0x20
220#define REPLY_INIT_IV 0x21
221#define REPLY_WRITE_MIB 0x22
222#define REPLY_READ_MIB 0x23
223#define REPLY_RADIO_FE 0x24
224#define REPLY_TXFIFO_CFG 0x25
225#define REPLY_WRITE_READ 0x26
226#define REPLY_INSTALL_SEC_KEY 0x27
227
228
229#define REPLY_RATE_SCALE 0x47
230#define REPLY_LEDS_CMD 0x48
231#define REPLY_TX_LINK_QUALITY_CMD 0x4e
232#define REPLY_ANA_MIB_OVERRIDE_CMD 0x4f
233#define REPLY_WRITE2REG_CMD 0x50
234
235/* winfi-wifi coexistence */
236#define COEX_PRIORITY_TABLE_CMD 0x5a
237#define COEX_MEDIUM_NOTIFICATION 0x5b
238#define COEX_EVENT_CMD 0x5c
239
240/* more Protocol and Protocol-test commands */
241#define REPLY_MAX_SLEEP_TIME_CMD 0x61
242#define CALIBRATION_CFG_CMD 0x65
243#define CALIBRATION_RES_NOTIFICATION 0x66
244#define CALIBRATION_COMPLETE_NOTIFICATION 0x67
245
246/* Measurements */
247#define REPLY_QUIET_CMD 0x71
248#define REPLY_CHANNEL_SWITCH 0x72
249#define CHANNEL_SWITCH_NOTIFICATION 0x73
250
251#define REPLY_SPECTRUM_MEASUREMENT_CMD 0x74
252#define SPECTRUM_MEASURE_NOTIFICATION 0x75
253#define REPLY_MEASUREMENT_ABORT_CMD 0x76
254
255/* Power Management */
256#define POWER_TABLE_CMD 0x77
257#define SAVE_RESTORE_ADRESS_CMD 0x78
258#define REPLY_WATERMARK_CMD 0x79
259#define PM_DEBUG_STATISTIC_NOTIFIC 0x7B
260#define PD_FLUSH_N_NOTIFICATION 0x7C
261
262/* Scan commands and notifications */
263#define REPLY_SCAN_REQUEST_CMD 0x80
264#define REPLY_SCAN_ABORT_CMD 0x81
265#define SCAN_START_NOTIFICATION 0x82
266#define SCAN_RESULTS_NOTIFICATION 0x83
267#define SCAN_COMPLETE_NOTIFICATION 0x84
268
269/* Continuous TX commands */
270#define REPLY_CONT_TX_CMD 0x85
271#define END_OF_CONT_TX_NOTIFICATION 0x86
272
273/* Timer/Eeprom commands */
274#define TIMER_CMD 0x87
275#define EEPROM_WRITE_CMD 0x88
276
277/* PAPD commands */
278#define FEEDBACK_REQUEST_NOTIFICATION 0x8b
279#define REPLY_CW_CMD 0x8c
280
281/* IBSS/AP commands Continue */
282#define BEACON_NOTIFICATION 0x90
283#define REPLY_TX_BEACON 0x91
284#define REPLY_REQUEST_ATIM 0x93
285#define WHO_IS_AWAKE_NOTIFICATION 0x94
286#define TX_PWR_DBM_LIMIT_CMD 0x95
287#define QUIET_NOTIFICATION 0x96
288#define TX_PWR_TABLE_CMD 0x97
289#define TX_ANT_CONFIGURATION_CMD 0x98
290#define MEASURE_ABORT_NOTIFICATION 0x99
291#define REPLY_CALIBRATION_TUNE 0x9a
292
293/* bt config command */
294#define REPLY_BT_CONFIG 0x9b
295#define REPLY_STATISTICS_CMD 0x9c
296#define STATISTICS_NOTIFICATION 0x9d
297
298/* RF-KILL commands and notifications */
299#define REPLY_CARD_STATE_CMD 0xa0
300#define CARD_STATE_NOTIFICATION 0xa1
301
302/* Missed beacons notification */
303#define MISSED_BEACONS_NOTIFICATION 0xa2
304#define MISSED_BEACONS_NOTIFICATION_TH_CMD 0xa3
305
306#define REPLY_CT_KILL_CONFIG_CMD 0xa4
307
308/* HD commands and notifications */
309#define REPLY_HD_PARAMS_CMD 0xa6
310#define HD_PARAMS_NOTIFICATION 0xa7
311#define SENSITIVITY_CMD 0xa8
312#define U_APSD_PARAMS_CMD 0xa9
313#define NOISY_PLATFORM_CMD 0xaa
314#define ILLEGAL_CMD 0xac
315#define REPLY_PHY_CALIBRATION_CMD 0xb0
316#define REPLAY_RX_GAIN_CALIB_CMD 0xb1
317
318/* WiPAN commands */
319#define REPLY_WIPAN_PARAMS_CMD 0xb2
320#define REPLY_WIPAN_RX_ON_CMD 0xb3
321#define REPLY_WIPAN_RX_ON_TIMING 0xb4
322#define REPLY_WIPAN_TX_PWR_TABLE_CMD 0xb5
323#define REPLY_WIPAN_RXON_ASSOC_CMD 0xb6
324#define REPLY_WIPAN_QOS_PARAM 0xb7
325#define WIPAN_REPLY_WEPKEY 0xb8
326
327/* BeamForming commands */
328#define BEAMFORMER_CFG_CMD 0xba
329#define BEAMFORMEE_NOTIFICATION 0xbb
330
331/* TGn new Commands */
332#define REPLY_RX_PHY_CMD 0xc0
333#define REPLY_RX_MPDU_CMD 0xc1
334#define REPLY_MULTICAST_HASH 0xc2
335#define REPLY_KDR_RX 0xc3
336#define REPLY_RX_DSP_EXT_INFO 0xc4
337#define REPLY_COMPRESSED_BA 0xc5
338
339/* PNC commands */
340#define PNC_CONFIG_CMD 0xc8
341#define PNC_UPDATE_TABLE_CMD 0xc9
342#define XVT_GENERAL_CTRL_CMD 0xca
343#define REPLY_LEGACY_RADIO_FE 0xdd
344
345/* WoWLAN commands */
346#define WOWLAN_PATTERNS 0xe0
347#define WOWLAN_WAKEUP_FILTER 0xe1
348#define WOWLAN_TSC_RSC_PARAM 0xe2
349#define WOWLAN_TKIP_PARAM 0xe3
350#define WOWLAN_KEK_KCK_MATERIAL 0xe4
351#define WOWLAN_GET_STATUSES 0xe5
352#define WOWLAN_TX_POWER_PER_DB 0xe6
353#define REPLY_WOWLAN_GET_STATUSES WOWLAN_GET_STATUSES
354
355#define REPLY_DEBUG_CMD 0xf0
356#define REPLY_DSP_DEBUG_CMD 0xf1
357#define REPLY_DEBUG_MONITOR_CMD 0xf2
358#define REPLY_DEBUG_XVT_CMD 0xf3
359#define REPLY_DEBUG_DC_CALIB 0xf4
360#define REPLY_DYNAMIC_BP 0xf5
361
362/* General purpose Commands */
363#define REPLY_GP1_CMD 0xfa
364#define REPLY_GP2_CMD 0xfb
365#define REPLY_GP3_CMD 0xfc
366#define REPLY_GP4_CMD 0xfd
367#define REPLY_REPLAY_WRAPPER 0xfe
368#define REPLY_FRAME_DURATION_CALC_CMD 0xff
369
370#define LMAC_COMMAND_ID_MAX 0xff
371#define LMAC_COMMAND_ID_NUM (LMAC_COMMAND_ID_MAX + 1)
372
373
374/* Calibration */
375
376enum {
377 PHY_CALIBRATE_DC_CMD = 0,
378 PHY_CALIBRATE_LO_CMD = 1,
379 PHY_CALIBRATE_RX_BB_CMD = 2,
380 PHY_CALIBRATE_TX_IQ_CMD = 3,
381 PHY_CALIBRATE_RX_IQ_CMD = 4,
382 PHY_CALIBRATION_NOISE_CMD = 5,
383 PHY_CALIBRATE_AGC_TABLE_CMD = 6,
384 PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 7,
385 PHY_CALIBRATE_OPCODES_NUM,
386 SHILOH_PHY_CALIBRATE_DC_CMD = 8,
387 SHILOH_PHY_CALIBRATE_LO_CMD = 9,
388 SHILOH_PHY_CALIBRATE_RX_BB_CMD = 10,
389 SHILOH_PHY_CALIBRATE_TX_IQ_CMD = 11,
390 SHILOH_PHY_CALIBRATE_RX_IQ_CMD = 12,
391 SHILOH_PHY_CALIBRATION_NOISE_CMD = 13,
392 SHILOH_PHY_CALIBRATE_AGC_TABLE_CMD = 14,
393 SHILOH_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
394 SHILOH_PHY_CALIBRATE_BASE_BAND_CMD = 16,
395 SHILOH_PHY_CALIBRATE_TXIQ_PERIODIC_CMD = 17,
396 CALIBRATION_CMD_NUM,
397};
398
399struct iwm_lmac_calib_hdr {
400 u8 opcode;
401 u8 first_grp;
402 u8 grp_num;
403 u8 all_data_valid;
404} __attribute__ ((packed));
405
406#define IWM_LMAC_CALIB_FREQ_GROUPS_NR 7
407#define IWM_CALIB_FREQ_GROUPS_NR 5
408#define IWM_CALIB_DC_MODES_NR 12
409
410struct iwm_calib_rxiq_entry {
411 u16 ptam_postdist_ars;
412 u16 ptam_postdist_arc;
413} __attribute__ ((packed));
414
415struct iwm_calib_rxiq_group {
416 struct iwm_calib_rxiq_entry mode[IWM_CALIB_DC_MODES_NR];
417} __attribute__ ((packed));
418
419struct iwm_lmac_calib_rxiq {
420 struct iwm_calib_rxiq_group group[IWM_LMAC_CALIB_FREQ_GROUPS_NR];
421} __attribute__ ((packed));
422
423struct iwm_calib_rxiq {
424 struct iwm_lmac_calib_hdr hdr;
425 struct iwm_calib_rxiq_group group[IWM_CALIB_FREQ_GROUPS_NR];
426} __attribute__ ((packed));
427
428#define LMAC_STA_ID_SEED 0x0f
429#define LMAC_STA_ID_POS 0
430
431#define LMAC_STA_COLOR_SEED 0x7
432#define LMAC_STA_COLOR_POS 4
433
434struct iwm_lmac_power_report {
435 u8 pa_status;
436 u8 pa_integ_res_A[3];
437 u8 pa_integ_res_B[3];
438 u8 pa_integ_res_C[3];
439} __attribute__ ((packed));
440
441struct iwm_lmac_tx_resp {
442 u8 frame_cnt; /* 1-no aggregation, greater then 1 - aggregation */
443 u8 bt_kill_cnt;
444 __le16 retry_cnt;
445 __le32 initial_tx_rate;
446 __le16 wireless_media_time;
447 struct iwm_lmac_power_report power_report;
448 __le32 tfd_info;
449 __le16 seq_ctl;
450 __le16 byte_cnt;
451 u8 tlc_rate_info;
452 u8 ra_tid;
453 __le16 frame_ctl;
454 __le32 status;
455} __attribute__ ((packed));
456
457#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/main.c b/drivers/net/wireless/iwmc3200wifi/main.c
new file mode 100644
index 000000000000..6a2640f16b6d
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/main.c
@@ -0,0 +1,680 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#include <linux/kernel.h>
40#include <linux/netdevice.h>
41#include <linux/ieee80211.h>
42#include <linux/wireless.h>
43
44#include "iwm.h"
45#include "debug.h"
46#include "bus.h"
47#include "umac.h"
48#include "commands.h"
49#include "hal.h"
50#include "fw.h"
51#include "rx.h"
52
53static struct iwm_conf def_iwm_conf = {
54
55 .sdio_ior_timeout = 5000,
56 .init_calib_map = BIT(PHY_CALIBRATE_DC_CMD) |
57 BIT(PHY_CALIBRATE_LO_CMD) |
58 BIT(PHY_CALIBRATE_TX_IQ_CMD) |
59 BIT(PHY_CALIBRATE_RX_IQ_CMD),
60 .periodic_calib_map = BIT(PHY_CALIBRATE_DC_CMD) |
61 BIT(PHY_CALIBRATE_LO_CMD) |
62 BIT(PHY_CALIBRATE_TX_IQ_CMD) |
63 BIT(PHY_CALIBRATE_RX_IQ_CMD) |
64 BIT(SHILOH_PHY_CALIBRATE_BASE_BAND_CMD),
65 .reset_on_fatal_err = 1,
66 .auto_connect = 1,
67 .wimax_not_present = 0,
68 .enable_qos = 1,
69 .mode = UMAC_MODE_BSS,
70
71 /* UMAC configuration */
72 .power_index = 0,
73 .frag_threshold = IEEE80211_MAX_FRAG_THRESHOLD,
74 .rts_threshold = IEEE80211_MAX_RTS_THRESHOLD,
75 .cts_to_self = 0,
76
77 .assoc_timeout = 2,
78 .roam_timeout = 10,
79 .wireless_mode = WIRELESS_MODE_11A | WIRELESS_MODE_11G,
80 .coexist_mode = COEX_MODE_CM,
81
82 /* IBSS */
83 .ibss_band = UMAC_BAND_2GHZ,
84 .ibss_channel = 1,
85
86 .mac_addr = {0x00, 0x02, 0xb3, 0x01, 0x02, 0x03},
87};
88
89static int modparam_reset;
90module_param_named(reset, modparam_reset, bool, 0644);
91MODULE_PARM_DESC(reset, "reset on firmware errors (default 0 [not reset])");
92
93int iwm_mode_to_nl80211_iftype(int mode)
94{
95 switch (mode) {
96 case UMAC_MODE_BSS:
97 return NL80211_IFTYPE_STATION;
98 case UMAC_MODE_IBSS:
99 return NL80211_IFTYPE_ADHOC;
100 default:
101 return NL80211_IFTYPE_UNSPECIFIED;
102 }
103
104 return 0;
105}
106
107static void iwm_statistics_request(struct work_struct *work)
108{
109 struct iwm_priv *iwm =
110 container_of(work, struct iwm_priv, stats_request.work);
111
112 iwm_send_umac_stats_req(iwm, 0);
113}
114
115static void iwm_reset_worker(struct work_struct *work)
116{
117 struct iwm_priv *iwm;
118 struct iwm_umac_profile *profile = NULL;
119 int uninitialized_var(ret), retry = 0;
120
121 iwm = container_of(work, struct iwm_priv, reset_worker);
122
123 if (iwm->umac_profile_active) {
124 profile = kmalloc(sizeof(struct iwm_umac_profile), GFP_KERNEL);
125 if (profile)
126 memcpy(profile, iwm->umac_profile, sizeof(*profile));
127 else
128 IWM_ERR(iwm, "Couldn't alloc memory for profile\n");
129 }
130
131 iwm_down(iwm);
132
133 while (retry++ < 3) {
134 ret = iwm_up(iwm);
135 if (!ret)
136 break;
137
138 schedule_timeout_uninterruptible(10 * HZ);
139 }
140
141 if (ret) {
142 IWM_WARN(iwm, "iwm_up() failed: %d\n", ret);
143
144 kfree(profile);
145 return;
146 }
147
148 if (profile) {
149 IWM_DBG_MLME(iwm, DBG, "Resend UMAC profile\n");
150 memcpy(iwm->umac_profile, profile, sizeof(*profile));
151 iwm_send_mlme_profile(iwm);
152 kfree(profile);
153 }
154}
155
156static void iwm_watchdog(unsigned long data)
157{
158 struct iwm_priv *iwm = (struct iwm_priv *)data;
159
160 IWM_WARN(iwm, "Watchdog expired: UMAC stalls!\n");
161
162 if (modparam_reset)
163 schedule_work(&iwm->reset_worker);
164}
165
166int iwm_priv_init(struct iwm_priv *iwm)
167{
168 int i;
169 char name[32];
170
171 iwm->status = 0;
172 INIT_LIST_HEAD(&iwm->pending_notif);
173 init_waitqueue_head(&iwm->notif_queue);
174 init_waitqueue_head(&iwm->nonwifi_queue);
175 init_waitqueue_head(&iwm->mlme_queue);
176 memcpy(&iwm->conf, &def_iwm_conf, sizeof(struct iwm_conf));
177 spin_lock_init(&iwm->tx_credit.lock);
178 INIT_LIST_HEAD(&iwm->wifi_pending_cmd);
179 INIT_LIST_HEAD(&iwm->nonwifi_pending_cmd);
180 iwm->wifi_seq_num = UMAC_WIFI_SEQ_NUM_BASE;
181 iwm->nonwifi_seq_num = UMAC_NONWIFI_SEQ_NUM_BASE;
182 spin_lock_init(&iwm->cmd_lock);
183 iwm->scan_id = 1;
184 INIT_DELAYED_WORK(&iwm->stats_request, iwm_statistics_request);
185 INIT_WORK(&iwm->reset_worker, iwm_reset_worker);
186 INIT_LIST_HEAD(&iwm->bss_list);
187
188 skb_queue_head_init(&iwm->rx_list);
189 INIT_LIST_HEAD(&iwm->rx_tickets);
190 for (i = 0; i < IWM_RX_ID_HASH; i++)
191 INIT_LIST_HEAD(&iwm->rx_packets[i]);
192
193 INIT_WORK(&iwm->rx_worker, iwm_rx_worker);
194
195 iwm->rx_wq = create_singlethread_workqueue(KBUILD_MODNAME "_rx");
196 if (!iwm->rx_wq)
197 return -EAGAIN;
198
199 for (i = 0; i < IWM_TX_QUEUES; i++) {
200 INIT_WORK(&iwm->txq[i].worker, iwm_tx_worker);
201 snprintf(name, 32, KBUILD_MODNAME "_tx_%d", i);
202 iwm->txq[i].id = i;
203 iwm->txq[i].wq = create_singlethread_workqueue(name);
204 if (!iwm->txq[i].wq)
205 return -EAGAIN;
206
207 skb_queue_head_init(&iwm->txq[i].queue);
208 }
209
210 for (i = 0; i < IWM_NUM_KEYS; i++)
211 memset(&iwm->keys[i], 0, sizeof(struct iwm_key));
212
213 iwm->default_key = NULL;
214
215 init_timer(&iwm->watchdog);
216 iwm->watchdog.function = iwm_watchdog;
217 iwm->watchdog.data = (unsigned long)iwm;
218
219 return 0;
220}
221
222/*
223 * We reset all the structures, and we reset the UMAC.
224 * After calling this routine, you're expected to reload
225 * the firmware.
226 */
227void iwm_reset(struct iwm_priv *iwm)
228{
229 struct iwm_notif *notif, *next;
230
231 if (test_bit(IWM_STATUS_READY, &iwm->status))
232 iwm_target_reset(iwm);
233
234 iwm->status = 0;
235 iwm->scan_id = 1;
236
237 list_for_each_entry_safe(notif, next, &iwm->pending_notif, pending) {
238 list_del(&notif->pending);
239 kfree(notif->buf);
240 kfree(notif);
241 }
242
243 iwm_cmd_flush(iwm);
244
245 flush_workqueue(iwm->rx_wq);
246
247 iwm_link_off(iwm);
248}
249
250/*
251 * Notification code:
252 *
253 * We're faced with the following issue: Any host command can
254 * have an answer or not, and if there's an answer to expect,
255 * it can be treated synchronously or asynchronously.
256 * To work around the synchronous answer case, we implemented
257 * our notification mechanism.
258 * When a code path needs to wait for a command response
259 * synchronously, it calls notif_handle(), which waits for the
260 * right notification to show up, and then process it. Before
261 * starting to wait, it registered as a waiter for this specific
262 * answer (by toggling a bit in on of the handler_map), so that
263 * the rx code knows that it needs to send a notification to the
264 * waiting processes. It does so by calling iwm_notif_send(),
265 * which adds the notification to the pending notifications list,
266 * and then wakes the waiting processes up.
267 */
268int iwm_notif_send(struct iwm_priv *iwm, struct iwm_wifi_cmd *cmd,
269 u8 cmd_id, u8 source, u8 *buf, unsigned long buf_size)
270{
271 struct iwm_notif *notif;
272
273 notif = kzalloc(sizeof(struct iwm_notif), GFP_KERNEL);
274 if (!notif) {
275 IWM_ERR(iwm, "Couldn't alloc memory for notification\n");
276 return -ENOMEM;
277 }
278
279 INIT_LIST_HEAD(&notif->pending);
280 notif->cmd = cmd;
281 notif->cmd_id = cmd_id;
282 notif->src = source;
283 notif->buf = kzalloc(buf_size, GFP_KERNEL);
284 if (!notif->buf) {
285 IWM_ERR(iwm, "Couldn't alloc notification buffer\n");
286 kfree(notif);
287 return -ENOMEM;
288 }
289 notif->buf_size = buf_size;
290 memcpy(notif->buf, buf, buf_size);
291 list_add_tail(&notif->pending, &iwm->pending_notif);
292
293 wake_up_interruptible(&iwm->notif_queue);
294
295 return 0;
296}
297
298static struct iwm_notif *iwm_notif_find(struct iwm_priv *iwm, u32 cmd,
299 u8 source)
300{
301 struct iwm_notif *notif, *next;
302
303 list_for_each_entry_safe(notif, next, &iwm->pending_notif, pending) {
304 if ((notif->cmd_id == cmd) && (notif->src == source)) {
305 list_del(&notif->pending);
306 return notif;
307 }
308 }
309
310 return NULL;
311}
312
313static struct iwm_notif *iwm_notif_wait(struct iwm_priv *iwm, u32 cmd,
314 u8 source, long timeout)
315{
316 int ret;
317 struct iwm_notif *notif;
318 unsigned long *map = NULL;
319
320 switch (source) {
321 case IWM_SRC_LMAC:
322 map = &iwm->lmac_handler_map[0];
323 break;
324 case IWM_SRC_UMAC:
325 map = &iwm->umac_handler_map[0];
326 break;
327 case IWM_SRC_UDMA:
328 map = &iwm->udma_handler_map[0];
329 break;
330 }
331
332 set_bit(cmd, map);
333
334 ret = wait_event_interruptible_timeout(iwm->notif_queue,
335 ((notif = iwm_notif_find(iwm, cmd, source)) != NULL),
336 timeout);
337 clear_bit(cmd, map);
338
339 if (!ret)
340 return NULL;
341
342 return notif;
343}
344
345int iwm_notif_handle(struct iwm_priv *iwm, u32 cmd, u8 source, long timeout)
346{
347 int ret;
348 struct iwm_notif *notif;
349
350 notif = iwm_notif_wait(iwm, cmd, source, timeout);
351 if (!notif)
352 return -ETIME;
353
354 ret = iwm_rx_handle_resp(iwm, notif->buf, notif->buf_size, notif->cmd);
355 kfree(notif->buf);
356 kfree(notif);
357
358 return ret;
359}
360
361static int iwm_config_boot_params(struct iwm_priv *iwm)
362{
363 struct iwm_udma_nonwifi_cmd target_cmd;
364 int ret;
365
366 /* check Wimax is off and config debug monitor */
367 if (iwm->conf.wimax_not_present) {
368 u32 data1 = 0x1f;
369 u32 addr1 = 0x606BE258;
370
371 u32 data2_set = 0x0;
372 u32 data2_clr = 0x1;
373 u32 addr2 = 0x606BE100;
374
375 u32 data3 = 0x1;
376 u32 addr3 = 0x606BEC00;
377
378 target_cmd.resp = 0;
379 target_cmd.handle_by_hw = 0;
380 target_cmd.eop = 1;
381
382 target_cmd.opcode = UMAC_HDI_OUT_OPCODE_WRITE;
383 target_cmd.addr = cpu_to_le32(addr1);
384 target_cmd.op1_sz = cpu_to_le32(sizeof(u32));
385 target_cmd.op2 = 0;
386
387 ret = iwm_hal_send_target_cmd(iwm, &target_cmd, &data1);
388 if (ret < 0) {
389 IWM_ERR(iwm, "iwm_hal_send_target_cmd failed\n");
390 return ret;
391 }
392
393 target_cmd.opcode = UMAC_HDI_OUT_OPCODE_READ_MODIFY_WRITE;
394 target_cmd.addr = cpu_to_le32(addr2);
395 target_cmd.op1_sz = cpu_to_le32(data2_set);
396 target_cmd.op2 = cpu_to_le32(data2_clr);
397
398 ret = iwm_hal_send_target_cmd(iwm, &target_cmd, &data1);
399 if (ret < 0) {
400 IWM_ERR(iwm, "iwm_hal_send_target_cmd failed\n");
401 return ret;
402 }
403
404 target_cmd.opcode = UMAC_HDI_OUT_OPCODE_WRITE;
405 target_cmd.addr = cpu_to_le32(addr3);
406 target_cmd.op1_sz = cpu_to_le32(sizeof(u32));
407 target_cmd.op2 = 0;
408
409 ret = iwm_hal_send_target_cmd(iwm, &target_cmd, &data3);
410 if (ret < 0) {
411 IWM_ERR(iwm, "iwm_hal_send_target_cmd failed\n");
412 return ret;
413 }
414 }
415
416 return 0;
417}
418
419void iwm_init_default_profile(struct iwm_priv *iwm,
420 struct iwm_umac_profile *profile)
421{
422 memset(profile, 0, sizeof(struct iwm_umac_profile));
423
424 profile->sec.auth_type = UMAC_AUTH_TYPE_OPEN;
425 profile->sec.flags = UMAC_SEC_FLG_LEGACY_PROFILE;
426 profile->sec.ucast_cipher = UMAC_CIPHER_TYPE_NONE;
427 profile->sec.mcast_cipher = UMAC_CIPHER_TYPE_NONE;
428
429 if (iwm->conf.enable_qos)
430 profile->flags |= cpu_to_le16(UMAC_PROFILE_QOS_ALLOWED);
431
432 profile->wireless_mode = iwm->conf.wireless_mode;
433 profile->mode = cpu_to_le32(iwm->conf.mode);
434
435 profile->ibss.atim = 0;
436 profile->ibss.beacon_interval = 100;
437 profile->ibss.join_only = 0;
438 profile->ibss.band = iwm->conf.ibss_band;
439 profile->ibss.channel = iwm->conf.ibss_channel;
440}
441
442void iwm_link_on(struct iwm_priv *iwm)
443{
444 netif_carrier_on(iwm_to_ndev(iwm));
445 netif_tx_wake_all_queues(iwm_to_ndev(iwm));
446
447 iwm_send_umac_stats_req(iwm, 0);
448}
449
450void iwm_link_off(struct iwm_priv *iwm)
451{
452 struct iw_statistics *wstats = &iwm->wstats;
453 int i;
454
455 netif_tx_stop_all_queues(iwm_to_ndev(iwm));
456 netif_carrier_off(iwm_to_ndev(iwm));
457
458 for (i = 0; i < IWM_TX_QUEUES; i++) {
459 skb_queue_purge(&iwm->txq[i].queue);
460
461 iwm->txq[i].concat_count = 0;
462 iwm->txq[i].concat_ptr = iwm->txq[i].concat_buf;
463
464 flush_workqueue(iwm->txq[i].wq);
465 }
466
467 iwm_rx_free(iwm);
468
469 cancel_delayed_work(&iwm->stats_request);
470 memset(wstats, 0, sizeof(struct iw_statistics));
471 wstats->qual.updated = IW_QUAL_ALL_INVALID;
472
473 del_timer_sync(&iwm->watchdog);
474}
475
476static void iwm_bss_list_clean(struct iwm_priv *iwm)
477{
478 struct iwm_bss_info *bss, *next;
479
480 list_for_each_entry_safe(bss, next, &iwm->bss_list, node) {
481 list_del(&bss->node);
482 kfree(bss->bss);
483 kfree(bss);
484 }
485}
486
487static int iwm_channels_init(struct iwm_priv *iwm)
488{
489 int ret;
490
491#ifdef CONFIG_IWM_B0_HW_SUPPORT
492 if (iwm->conf.hw_b0) {
493 IWM_INFO(iwm, "Workaround EEPROM channels for B0 hardware\n");
494 return 0;
495 }
496#endif
497
498 ret = iwm_send_umac_channel_list(iwm);
499 if (ret) {
500 IWM_ERR(iwm, "Send channel list failed\n");
501 return ret;
502 }
503
504 ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_GET_CHAN_INFO_LIST,
505 IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
506 if (ret) {
507 IWM_ERR(iwm, "Didn't get a channel list notification\n");
508 return ret;
509 }
510
511 return 0;
512}
513
514int iwm_up(struct iwm_priv *iwm)
515{
516 int ret;
517 struct iwm_notif *notif_reboot, *notif_ack = NULL;
518
519 ret = iwm_bus_enable(iwm);
520 if (ret) {
521 IWM_ERR(iwm, "Couldn't enable function\n");
522 return ret;
523 }
524
525 iwm_rx_setup_handlers(iwm);
526
527 /* Wait for initial BARKER_REBOOT from hardware */
528 notif_reboot = iwm_notif_wait(iwm, IWM_BARKER_REBOOT_NOTIFICATION,
529 IWM_SRC_UDMA, 2 * HZ);
530 if (!notif_reboot) {
531 IWM_ERR(iwm, "Wait for REBOOT_BARKER timeout\n");
532 goto err_disable;
533 }
534
535 /* We send the barker back */
536 ret = iwm_bus_send_chunk(iwm, notif_reboot->buf, 16);
537 if (ret) {
538 IWM_ERR(iwm, "REBOOT barker response failed\n");
539 kfree(notif_reboot);
540 goto err_disable;
541 }
542
543 kfree(notif_reboot->buf);
544 kfree(notif_reboot);
545
546 /* Wait for ACK_BARKER from hardware */
547 notif_ack = iwm_notif_wait(iwm, IWM_ACK_BARKER_NOTIFICATION,
548 IWM_SRC_UDMA, 2 * HZ);
549 if (!notif_ack) {
550 IWM_ERR(iwm, "Wait for ACK_BARKER timeout\n");
551 goto err_disable;
552 }
553
554 kfree(notif_ack->buf);
555 kfree(notif_ack);
556
557 /* We start to config static boot parameters */
558 ret = iwm_config_boot_params(iwm);
559 if (ret) {
560 IWM_ERR(iwm, "Config boot parameters failed\n");
561 goto err_disable;
562 }
563
564 ret = iwm_read_mac(iwm, iwm_to_ndev(iwm)->dev_addr);
565 if (ret) {
566 IWM_ERR(iwm, "MAC reading failed\n");
567 goto err_disable;
568 }
569
570 /* We can load the FWs */
571 ret = iwm_load_fw(iwm);
572 if (ret) {
573 IWM_ERR(iwm, "FW loading failed\n");
574 goto err_disable;
575 }
576
577 /* We configure the UMAC and enable the wifi module */
578 ret = iwm_send_umac_config(iwm,
579 cpu_to_le32(UMAC_RST_CTRL_FLG_WIFI_CORE_EN) |
580 cpu_to_le32(UMAC_RST_CTRL_FLG_WIFI_LINK_EN) |
581 cpu_to_le32(UMAC_RST_CTRL_FLG_WIFI_MLME_EN));
582 if (ret) {
583 IWM_ERR(iwm, "UMAC config failed\n");
584 goto err_fw;
585 }
586
587 ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_WIFI_CORE_STATUS,
588 IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
589 if (ret) {
590 IWM_ERR(iwm, "Didn't get a wifi core status notification\n");
591 goto err_fw;
592 }
593
594 if (iwm->core_enabled != (UMAC_NTFY_WIFI_CORE_STATUS_LINK_EN |
595 UMAC_NTFY_WIFI_CORE_STATUS_MLME_EN)) {
596 IWM_DBG_BOOT(iwm, DBG, "Not all cores enabled:0x%x\n",
597 iwm->core_enabled);
598 ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_WIFI_CORE_STATUS,
599 IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
600 if (ret) {
601 IWM_ERR(iwm, "Didn't get a core status notification\n");
602 goto err_fw;
603 }
604
605 if (iwm->core_enabled != (UMAC_NTFY_WIFI_CORE_STATUS_LINK_EN |
606 UMAC_NTFY_WIFI_CORE_STATUS_MLME_EN)) {
607 IWM_ERR(iwm, "Not all cores enabled: 0x%x\n",
608 iwm->core_enabled);
609 goto err_fw;
610 } else {
611 IWM_INFO(iwm, "All cores enabled\n");
612 }
613 }
614
615 iwm->umac_profile = kmalloc(sizeof(struct iwm_umac_profile),
616 GFP_KERNEL);
617 if (!iwm->umac_profile) {
618 IWM_ERR(iwm, "Couldn't alloc memory for profile\n");
619 goto err_fw;
620 }
621
622 iwm_init_default_profile(iwm, iwm->umac_profile);
623
624 ret = iwm_channels_init(iwm);
625 if (ret < 0) {
626 IWM_ERR(iwm, "Couldn't init channels\n");
627 goto err_profile;
628 }
629
630 /* Set the READY bit to indicate interface is brought up successfully */
631 set_bit(IWM_STATUS_READY, &iwm->status);
632
633 return 0;
634
635 err_profile:
636 kfree(iwm->umac_profile);
637 iwm->umac_profile = NULL;
638
639 err_fw:
640 iwm_eeprom_exit(iwm);
641
642 err_disable:
643 ret = iwm_bus_disable(iwm);
644 if (ret < 0)
645 IWM_ERR(iwm, "Couldn't disable function\n");
646
647 return -EIO;
648}
649
650int iwm_down(struct iwm_priv *iwm)
651{
652 int ret;
653
654 /* The interface is already down */
655 if (!test_bit(IWM_STATUS_READY, &iwm->status))
656 return 0;
657
658 if (iwm->scan_request) {
659 cfg80211_scan_done(iwm->scan_request, true);
660 iwm->scan_request = NULL;
661 }
662
663 clear_bit(IWM_STATUS_READY, &iwm->status);
664
665 iwm_eeprom_exit(iwm);
666 kfree(iwm->umac_profile);
667 iwm->umac_profile = NULL;
668 iwm_bss_list_clean(iwm);
669
670 iwm->default_key = NULL;
671 iwm->core_enabled = 0;
672
673 ret = iwm_bus_disable(iwm);
674 if (ret < 0) {
675 IWM_ERR(iwm, "Couldn't disable function\n");
676 return ret;
677 }
678
679 return 0;
680}
diff --git a/drivers/net/wireless/iwmc3200wifi/netdev.c b/drivers/net/wireless/iwmc3200wifi/netdev.c
new file mode 100644
index 000000000000..eec7201e91a8
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/netdev.c
@@ -0,0 +1,172 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
5 * Samuel Ortiz <samuel.ortiz@intel.com>
6 * Zhu Yi <yi.zhu@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 */
23
24/*
25 * This is the netdev related hooks for iwm.
26 *
27 * Some interesting code paths:
28 *
29 * iwm_open() (Called at netdev interface bringup time)
30 * -> iwm_up() (main.c)
31 * -> iwm_bus_enable()
32 * -> if_sdio_enable() (In case of an SDIO bus)
33 * -> sdio_enable_func()
34 * -> iwm_notif_wait(BARKER_REBOOT) (wait for reboot barker)
35 * -> iwm_notif_wait(ACK_BARKER) (wait for ACK barker)
36 * -> iwm_load_fw() (fw.c)
37 * -> iwm_load_umac()
38 * -> iwm_load_lmac() (Calibration LMAC)
39 * -> iwm_load_lmac() (Operational LMAC)
40 * -> iwm_send_umac_config()
41 *
42 * iwm_stop() (Called at netdev interface bringdown time)
43 * -> iwm_down()
44 * -> iwm_bus_disable()
45 * -> if_sdio_disable() (In case of an SDIO bus)
46 * -> sdio_disable_func()
47 */
48#include <linux/netdevice.h>
49
50#include "iwm.h"
51#include "cfg80211.h"
52#include "debug.h"
53
54static int iwm_open(struct net_device *ndev)
55{
56 struct iwm_priv *iwm = ndev_to_iwm(ndev);
57 int ret = 0;
58
59 if (!test_bit(IWM_RADIO_RFKILL_SW, &iwm->radio))
60 ret = iwm_up(iwm);
61
62 return ret;
63}
64
65static int iwm_stop(struct net_device *ndev)
66{
67 struct iwm_priv *iwm = ndev_to_iwm(ndev);
68 int ret = 0;
69
70 if (!test_bit(IWM_RADIO_RFKILL_SW, &iwm->radio))
71 ret = iwm_down(iwm);
72
73 return ret;
74}
75
76/*
77 * iwm AC to queue mapping
78 *
79 * AC_VO -> queue 3
80 * AC_VI -> queue 2
81 * AC_BE -> queue 1
82 * AC_BK -> queue 0
83 */
84static const u16 iwm_1d_to_queue[8] = { 1, 0, 0, 1, 2, 2, 3, 3 };
85
86static u16 iwm_select_queue(struct net_device *dev, struct sk_buff *skb)
87{
88 skb->priority = cfg80211_classify8021d(skb);
89
90 return iwm_1d_to_queue[skb->priority];
91}
92
93static const struct net_device_ops iwm_netdev_ops = {
94 .ndo_open = iwm_open,
95 .ndo_stop = iwm_stop,
96 .ndo_start_xmit = iwm_xmit_frame,
97 .ndo_select_queue = iwm_select_queue,
98};
99
100void *iwm_if_alloc(int sizeof_bus, struct device *dev,
101 struct iwm_if_ops *if_ops)
102{
103 struct net_device *ndev;
104 struct wireless_dev *wdev;
105 struct iwm_priv *iwm;
106 int ret = 0;
107
108 wdev = iwm_wdev_alloc(sizeof_bus, dev);
109 if (!wdev) {
110 dev_err(dev, "no memory for wireless device instance\n");
111 return ERR_PTR(-ENOMEM);
112 }
113
114 iwm = wdev_to_iwm(wdev);
115 iwm->bus_ops = if_ops;
116 iwm->wdev = wdev;
117 iwm_priv_init(iwm);
118 wdev->iftype = iwm_mode_to_nl80211_iftype(iwm->conf.mode);
119
120 ndev = alloc_netdev_mq(0, "wlan%d", ether_setup,
121 IWM_TX_QUEUES);
122 if (!ndev) {
123 dev_err(dev, "no memory for network device instance\n");
124 goto out_wdev;
125 }
126
127 ndev->netdev_ops = &iwm_netdev_ops;
128 ndev->wireless_handlers = &iwm_iw_handler_def;
129 ndev->ieee80211_ptr = wdev;
130 SET_NETDEV_DEV(ndev, wiphy_dev(wdev->wiphy));
131 ret = register_netdev(ndev);
132 if (ret < 0) {
133 dev_err(dev, "Failed to register netdev: %d\n", ret);
134 goto out_ndev;
135 }
136
137 wdev->netdev = ndev;
138
139 ret = iwm_rfkill_init(iwm);
140 if (ret) {
141 dev_err(dev, "Failed to init rfkill\n");
142 goto out_rfkill;
143 }
144
145 return iwm;
146
147 out_rfkill:
148 unregister_netdev(ndev);
149
150 out_ndev:
151 free_netdev(ndev);
152
153 out_wdev:
154 iwm_wdev_free(iwm);
155 return ERR_PTR(ret);
156}
157
158void iwm_if_free(struct iwm_priv *iwm)
159{
160 int i;
161
162 if (!iwm_to_ndev(iwm))
163 return;
164
165 iwm_rfkill_exit(iwm);
166 unregister_netdev(iwm_to_ndev(iwm));
167 free_netdev(iwm_to_ndev(iwm));
168 iwm_wdev_free(iwm);
169 destroy_workqueue(iwm->rx_wq);
170 for (i = 0; i < IWM_TX_QUEUES; i++)
171 destroy_workqueue(iwm->txq[i].wq);
172}
diff --git a/drivers/net/wireless/iwmc3200wifi/rfkill.c b/drivers/net/wireless/iwmc3200wifi/rfkill.c
new file mode 100644
index 000000000000..4ca8b495f82d
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/rfkill.c
@@ -0,0 +1,88 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
5 * Samuel Ortiz <samuel.ortiz@intel.com>
6 * Zhu Yi <yi.zhu@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 */
23
24#include <linux/rfkill.h>
25
26#include "iwm.h"
27
28static int iwm_rfkill_soft_toggle(void *data, enum rfkill_state state)
29{
30 struct iwm_priv *iwm = data;
31
32 switch (state) {
33 case RFKILL_STATE_UNBLOCKED:
34 if (test_bit(IWM_RADIO_RFKILL_HW, &iwm->radio))
35 return -EBUSY;
36
37 if (test_and_clear_bit(IWM_RADIO_RFKILL_SW, &iwm->radio) &&
38 (iwm_to_ndev(iwm)->flags & IFF_UP))
39 iwm_up(iwm);
40
41 break;
42 case RFKILL_STATE_SOFT_BLOCKED:
43 if (!test_and_set_bit(IWM_RADIO_RFKILL_SW, &iwm->radio))
44 iwm_down(iwm);
45
46 break;
47 default:
48 break;
49 }
50
51 return 0;
52}
53
54int iwm_rfkill_init(struct iwm_priv *iwm)
55{
56 int ret;
57
58 iwm->rfkill = rfkill_allocate(iwm_to_dev(iwm), RFKILL_TYPE_WLAN);
59 if (!iwm->rfkill) {
60 IWM_ERR(iwm, "Unable to allocate rfkill device\n");
61 return -ENOMEM;
62 }
63
64 iwm->rfkill->name = KBUILD_MODNAME;
65 iwm->rfkill->data = iwm;
66 iwm->rfkill->state = RFKILL_STATE_UNBLOCKED;
67 iwm->rfkill->toggle_radio = iwm_rfkill_soft_toggle;
68
69 ret = rfkill_register(iwm->rfkill);
70 if (ret) {
71 IWM_ERR(iwm, "Failed to register rfkill device\n");
72 goto fail;
73 }
74
75 return 0;
76 fail:
77 rfkill_free(iwm->rfkill);
78 return ret;
79}
80
81void iwm_rfkill_exit(struct iwm_priv *iwm)
82{
83 if (iwm->rfkill)
84 rfkill_unregister(iwm->rfkill);
85
86 rfkill_free(iwm->rfkill);
87 iwm->rfkill = NULL;
88}
diff --git a/drivers/net/wireless/iwmc3200wifi/rx.c b/drivers/net/wireless/iwmc3200wifi/rx.c
new file mode 100644
index 000000000000..d73cf96c6dc6
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/rx.c
@@ -0,0 +1,1431 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#include <linux/kernel.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/wireless.h>
43#include <linux/ieee80211.h>
44#include <linux/if_arp.h>
45#include <linux/list.h>
46#include <net/iw_handler.h>
47
48#include "iwm.h"
49#include "debug.h"
50#include "hal.h"
51#include "umac.h"
52#include "lmac.h"
53#include "commands.h"
54#include "rx.h"
55#include "cfg80211.h"
56#include "eeprom.h"
57
58static int iwm_rx_check_udma_hdr(struct iwm_udma_in_hdr *hdr)
59{
60 if ((le32_to_cpu(hdr->cmd) == UMAC_PAD_TERMINAL) ||
61 (le32_to_cpu(hdr->size) == UMAC_PAD_TERMINAL))
62 return -EINVAL;
63
64 return 0;
65}
66
67static inline int iwm_rx_resp_size(struct iwm_udma_in_hdr *hdr)
68{
69 return ALIGN(le32_to_cpu(hdr->size) + sizeof(struct iwm_udma_in_hdr),
70 16);
71}
72
73/*
74 * Notification handlers:
75 *
76 * For every possible notification we can receive from the
77 * target, we have a handler.
78 * When we get a target notification, and there is no one
79 * waiting for it, it's just processed through the rx code
80 * path:
81 *
82 * iwm_rx_handle()
83 * -> iwm_rx_handle_umac()
84 * -> iwm_rx_handle_wifi()
85 * -> iwm_rx_handle_resp()
86 * -> iwm_ntf_*()
87 *
88 * OR
89 *
90 * -> iwm_rx_handle_non_wifi()
91 *
92 * If there are processes waiting for this notification, then
93 * iwm_rx_handle_wifi() just wakes those processes up and they
94 * grab the pending notification.
95 */
96static int iwm_ntf_error(struct iwm_priv *iwm, u8 *buf,
97 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
98{
99 struct iwm_umac_notif_error *error;
100 struct iwm_fw_error_hdr *fw_err;
101
102 error = (struct iwm_umac_notif_error *)buf;
103 fw_err = &error->err;
104
105
106 IWM_ERR(iwm, "%cMAC FW ERROR:\n",
107 (le32_to_cpu(fw_err->category) == UMAC_SYS_ERR_CAT_LMAC) ? 'L' : 'U');
108 IWM_ERR(iwm, "\tCategory: %d\n", le32_to_cpu(fw_err->category));
109 IWM_ERR(iwm, "\tStatus: 0x%x\n", le32_to_cpu(fw_err->status));
110 IWM_ERR(iwm, "\tPC: 0x%x\n", le32_to_cpu(fw_err->pc));
111 IWM_ERR(iwm, "\tblink1: %d\n", le32_to_cpu(fw_err->blink1));
112 IWM_ERR(iwm, "\tblink2: %d\n", le32_to_cpu(fw_err->blink2));
113 IWM_ERR(iwm, "\tilink1: %d\n", le32_to_cpu(fw_err->ilink1));
114 IWM_ERR(iwm, "\tilink2: %d\n", le32_to_cpu(fw_err->ilink2));
115 IWM_ERR(iwm, "\tData1: 0x%x\n", le32_to_cpu(fw_err->data1));
116 IWM_ERR(iwm, "\tData2: 0x%x\n", le32_to_cpu(fw_err->data2));
117 IWM_ERR(iwm, "\tLine number: %d\n", le32_to_cpu(fw_err->line_num));
118 IWM_ERR(iwm, "\tUMAC status: 0x%x\n", le32_to_cpu(fw_err->umac_status));
119 IWM_ERR(iwm, "\tLMAC status: 0x%x\n", le32_to_cpu(fw_err->lmac_status));
120 IWM_ERR(iwm, "\tSDIO status: 0x%x\n", le32_to_cpu(fw_err->sdio_status));
121
122 return 0;
123}
124
125static int iwm_ntf_umac_alive(struct iwm_priv *iwm, u8 *buf,
126 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
127{
128 struct iwm_umac_notif_alive *alive_resp =
129 (struct iwm_umac_notif_alive *)(buf);
130 u16 status = le16_to_cpu(alive_resp->status);
131
132 if (status == UMAC_NTFY_ALIVE_STATUS_ERR) {
133 IWM_ERR(iwm, "Receive error UMAC_ALIVE\n");
134 return -EIO;
135 }
136
137 iwm_tx_credit_init_pools(iwm, alive_resp);
138
139 return 0;
140}
141
142static int iwm_ntf_init_complete(struct iwm_priv *iwm, u8 *buf,
143 unsigned long buf_size,
144 struct iwm_wifi_cmd *cmd)
145{
146 struct iwm_umac_notif_init_complete *init_complete =
147 (struct iwm_umac_notif_init_complete *)(buf);
148 u16 status = le16_to_cpu(init_complete->status);
149
150 if (status == UMAC_NTFY_INIT_COMPLETE_STATUS_ERR) {
151 IWM_DBG_NTF(iwm, DBG, "Hardware rf kill is on (radio off)\n");
152 set_bit(IWM_RADIO_RFKILL_HW, &iwm->radio);
153 } else {
154 IWM_DBG_NTF(iwm, DBG, "Hardware rf kill is off (radio on)\n");
155 clear_bit(IWM_RADIO_RFKILL_HW, &iwm->radio);
156 }
157
158 return 0;
159}
160
161static int iwm_ntf_tx_credit_update(struct iwm_priv *iwm, u8 *buf,
162 unsigned long buf_size,
163 struct iwm_wifi_cmd *cmd)
164{
165 int pool_nr, total_freed_pages;
166 unsigned long pool_map;
167 int i, id;
168 struct iwm_umac_notif_page_dealloc *dealloc =
169 (struct iwm_umac_notif_page_dealloc *)buf;
170
171 pool_nr = GET_VAL32(dealloc->changes, UMAC_DEALLOC_NTFY_CHANGES_CNT);
172 pool_map = GET_VAL32(dealloc->changes, UMAC_DEALLOC_NTFY_CHANGES_MSK);
173
174 IWM_DBG_TX(iwm, DBG, "UMAC dealloc notification: pool nr %d, "
175 "update map 0x%lx\n", pool_nr, pool_map);
176
177 spin_lock(&iwm->tx_credit.lock);
178
179 for (i = 0; i < pool_nr; i++) {
180 id = GET_VAL32(dealloc->grp_info[i],
181 UMAC_DEALLOC_NTFY_GROUP_NUM);
182 if (test_bit(id, &pool_map)) {
183 total_freed_pages = GET_VAL32(dealloc->grp_info[i],
184 UMAC_DEALLOC_NTFY_PAGE_CNT);
185 iwm_tx_credit_inc(iwm, id, total_freed_pages);
186 }
187 }
188
189 spin_unlock(&iwm->tx_credit.lock);
190
191 return 0;
192}
193
194static int iwm_ntf_umac_reset(struct iwm_priv *iwm, u8 *buf,
195 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
196{
197 IWM_DBG_NTF(iwm, DBG, "UMAC RESET done\n");
198
199 return 0;
200}
201
202static int iwm_ntf_lmac_version(struct iwm_priv *iwm, u8 *buf,
203 unsigned long buf_size,
204 struct iwm_wifi_cmd *cmd)
205{
206 IWM_DBG_NTF(iwm, INFO, "LMAC Version: %x.%x\n", buf[9], buf[8]);
207
208 return 0;
209}
210
211static int iwm_ntf_tx(struct iwm_priv *iwm, u8 *buf,
212 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
213{
214 struct iwm_lmac_tx_resp *tx_resp;
215 struct iwm_umac_wifi_in_hdr *hdr;
216
217 tx_resp = (struct iwm_lmac_tx_resp *)
218 (buf + sizeof(struct iwm_umac_wifi_in_hdr));
219 hdr = (struct iwm_umac_wifi_in_hdr *)buf;
220
221 IWM_DBG_NTF(iwm, DBG, "REPLY_TX, buf size: %lu\n", buf_size);
222
223 IWM_DBG_NTF(iwm, DBG, "Seqnum: %d\n",
224 le16_to_cpu(hdr->sw_hdr.cmd.seq_num));
225 IWM_DBG_NTF(iwm, DBG, "\tFrame cnt: %d\n", tx_resp->frame_cnt);
226 IWM_DBG_NTF(iwm, DBG, "\tRetry cnt: %d\n",
227 le16_to_cpu(tx_resp->retry_cnt));
228 IWM_DBG_NTF(iwm, DBG, "\tSeq ctl: %d\n", le16_to_cpu(tx_resp->seq_ctl));
229 IWM_DBG_NTF(iwm, DBG, "\tByte cnt: %d\n",
230 le16_to_cpu(tx_resp->byte_cnt));
231 IWM_DBG_NTF(iwm, DBG, "\tStatus: 0x%x\n", le32_to_cpu(tx_resp->status));
232
233 return 0;
234}
235
236
237static int iwm_ntf_calib_res(struct iwm_priv *iwm, u8 *buf,
238 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
239{
240 u8 opcode;
241 u8 *calib_buf;
242 struct iwm_lmac_calib_hdr *hdr = (struct iwm_lmac_calib_hdr *)
243 (buf + sizeof(struct iwm_umac_wifi_in_hdr));
244
245 opcode = hdr->opcode;
246
247 BUG_ON(opcode >= CALIBRATION_CMD_NUM ||
248 opcode < PHY_CALIBRATE_OPCODES_NUM);
249
250 IWM_DBG_NTF(iwm, DBG, "Store calibration result for opcode: %d\n",
251 opcode);
252
253 buf_size -= sizeof(struct iwm_umac_wifi_in_hdr);
254 calib_buf = iwm->calib_res[opcode].buf;
255
256 if (!calib_buf || (iwm->calib_res[opcode].size < buf_size)) {
257 kfree(calib_buf);
258 calib_buf = kzalloc(buf_size, GFP_KERNEL);
259 if (!calib_buf) {
260 IWM_ERR(iwm, "Memory allocation failed: calib_res\n");
261 return -ENOMEM;
262 }
263 iwm->calib_res[opcode].buf = calib_buf;
264 iwm->calib_res[opcode].size = buf_size;
265 }
266
267 memcpy(calib_buf, hdr, buf_size);
268 set_bit(opcode - PHY_CALIBRATE_OPCODES_NUM, &iwm->calib_done_map);
269
270 return 0;
271}
272
273static int iwm_ntf_calib_complete(struct iwm_priv *iwm, u8 *buf,
274 unsigned long buf_size,
275 struct iwm_wifi_cmd *cmd)
276{
277 IWM_DBG_NTF(iwm, DBG, "Calibration completed\n");
278
279 return 0;
280}
281
282static int iwm_ntf_calib_cfg(struct iwm_priv *iwm, u8 *buf,
283 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
284{
285 struct iwm_lmac_cal_cfg_resp *cal_resp;
286
287 cal_resp = (struct iwm_lmac_cal_cfg_resp *)
288 (buf + sizeof(struct iwm_umac_wifi_in_hdr));
289
290 IWM_DBG_NTF(iwm, DBG, "Calibration CFG command status: %d\n",
291 le32_to_cpu(cal_resp->status));
292
293 return 0;
294}
295
296static int iwm_ntf_wifi_status(struct iwm_priv *iwm, u8 *buf,
297 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
298{
299 struct iwm_umac_notif_wifi_status *status =
300 (struct iwm_umac_notif_wifi_status *)buf;
301
302 iwm->core_enabled |= le16_to_cpu(status->status);
303
304 return 0;
305}
306
307static struct iwm_rx_ticket_node *
308iwm_rx_ticket_node_alloc(struct iwm_priv *iwm, struct iwm_rx_ticket *ticket)
309{
310 struct iwm_rx_ticket_node *ticket_node;
311
312 ticket_node = kzalloc(sizeof(struct iwm_rx_ticket_node), GFP_KERNEL);
313 if (!ticket_node) {
314 IWM_ERR(iwm, "Couldn't allocate ticket node\n");
315 return ERR_PTR(-ENOMEM);
316 }
317
318 ticket_node->ticket = kzalloc(sizeof(struct iwm_rx_ticket), GFP_KERNEL);
319 if (!ticket_node->ticket) {
320 IWM_ERR(iwm, "Couldn't allocate RX ticket\n");
321 kfree(ticket_node);
322 return ERR_PTR(-ENOMEM);
323 }
324
325 memcpy(ticket_node->ticket, ticket, sizeof(struct iwm_rx_ticket));
326 INIT_LIST_HEAD(&ticket_node->node);
327
328 return ticket_node;
329}
330
331static void iwm_rx_ticket_node_free(struct iwm_rx_ticket_node *ticket_node)
332{
333 kfree(ticket_node->ticket);
334 kfree(ticket_node);
335}
336
337static struct iwm_rx_packet *iwm_rx_packet_get(struct iwm_priv *iwm, u16 id)
338{
339 u8 id_hash = IWM_RX_ID_GET_HASH(id);
340 struct list_head *packet_list;
341 struct iwm_rx_packet *packet, *next;
342
343 packet_list = &iwm->rx_packets[id_hash];
344
345 list_for_each_entry_safe(packet, next, packet_list, node)
346 if (packet->id == id)
347 return packet;
348
349 return NULL;
350}
351
352static struct iwm_rx_packet *iwm_rx_packet_alloc(struct iwm_priv *iwm, u8 *buf,
353 u32 size, u16 id)
354{
355 struct iwm_rx_packet *packet;
356
357 packet = kzalloc(sizeof(struct iwm_rx_packet), GFP_KERNEL);
358 if (!packet) {
359 IWM_ERR(iwm, "Couldn't allocate packet\n");
360 return ERR_PTR(-ENOMEM);
361 }
362
363 packet->skb = dev_alloc_skb(size);
364 if (!packet->skb) {
365 IWM_ERR(iwm, "Couldn't allocate packet SKB\n");
366 kfree(packet);
367 return ERR_PTR(-ENOMEM);
368 }
369
370 packet->pkt_size = size;
371
372 skb_put(packet->skb, size);
373 memcpy(packet->skb->data, buf, size);
374 INIT_LIST_HEAD(&packet->node);
375 packet->id = id;
376
377 return packet;
378}
379
380void iwm_rx_free(struct iwm_priv *iwm)
381{
382 struct iwm_rx_ticket_node *ticket, *nt;
383 struct iwm_rx_packet *packet, *np;
384 int i;
385
386 list_for_each_entry_safe(ticket, nt, &iwm->rx_tickets, node) {
387 list_del(&ticket->node);
388 iwm_rx_ticket_node_free(ticket);
389 }
390
391 for (i = 0; i < IWM_RX_ID_HASH; i++) {
392 list_for_each_entry_safe(packet, np, &iwm->rx_packets[i],
393 node) {
394 list_del(&packet->node);
395 kfree_skb(packet->skb);
396 kfree(packet);
397 }
398 }
399}
400
401static int iwm_ntf_rx_ticket(struct iwm_priv *iwm, u8 *buf,
402 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
403{
404 struct iwm_umac_notif_rx_ticket *ntf_rx_ticket =
405 (struct iwm_umac_notif_rx_ticket *)buf;
406 struct iwm_rx_ticket *ticket =
407 (struct iwm_rx_ticket *)ntf_rx_ticket->tickets;
408 int i, schedule_rx = 0;
409
410 for (i = 0; i < ntf_rx_ticket->num_tickets; i++) {
411 struct iwm_rx_ticket_node *ticket_node;
412
413 switch (le16_to_cpu(ticket->action)) {
414 case IWM_RX_TICKET_RELEASE:
415 case IWM_RX_TICKET_DROP:
416 /* We can push the packet to the stack */
417 ticket_node = iwm_rx_ticket_node_alloc(iwm, ticket);
418 if (IS_ERR(ticket_node))
419 return PTR_ERR(ticket_node);
420
421 IWM_DBG_NTF(iwm, DBG, "TICKET RELEASE(%d)\n",
422 ticket->id);
423 list_add_tail(&ticket_node->node, &iwm->rx_tickets);
424
425 /*
426 * We received an Rx ticket, most likely there's
427 * a packet pending for it, it's not worth going
428 * through the packet hash list to double check.
429 * Let's just fire the rx worker..
430 */
431 schedule_rx = 1;
432
433 break;
434
435 default:
436 IWM_ERR(iwm, "Invalid RX ticket action: 0x%x\n",
437 ticket->action);
438 }
439
440 ticket++;
441 }
442
443 if (schedule_rx)
444 queue_work(iwm->rx_wq, &iwm->rx_worker);
445
446 return 0;
447}
448
449static int iwm_ntf_rx_packet(struct iwm_priv *iwm, u8 *buf,
450 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
451{
452 struct iwm_umac_wifi_in_hdr *wifi_hdr;
453 struct iwm_rx_packet *packet;
454 u16 id, buf_offset;
455 u32 packet_size;
456
457 IWM_DBG_NTF(iwm, DBG, "\n");
458
459 wifi_hdr = (struct iwm_umac_wifi_in_hdr *)buf;
460 id = le16_to_cpu(wifi_hdr->sw_hdr.cmd.seq_num);
461 buf_offset = sizeof(struct iwm_umac_wifi_in_hdr);
462 packet_size = buf_size - sizeof(struct iwm_umac_wifi_in_hdr);
463
464 IWM_DBG_NTF(iwm, DBG, "CMD:0x%x, seqnum: %d, packet size: %d\n",
465 wifi_hdr->sw_hdr.cmd.cmd, id, packet_size);
466 IWM_DBG_RX(iwm, DBG, "Packet id: %d\n", id);
467 IWM_HEXDUMP(iwm, DBG, RX, "PACKET: ", buf + buf_offset, packet_size);
468
469 packet = iwm_rx_packet_alloc(iwm, buf + buf_offset, packet_size, id);
470 if (IS_ERR(packet))
471 return PTR_ERR(packet);
472
473 list_add_tail(&packet->node, &iwm->rx_packets[IWM_RX_ID_GET_HASH(id)]);
474
475 /* We might (unlikely) have received the packet _after_ the ticket */
476 queue_work(iwm->rx_wq, &iwm->rx_worker);
477
478 return 0;
479}
480
481/* MLME handlers */
482static int iwm_mlme_assoc_start(struct iwm_priv *iwm, u8 *buf,
483 unsigned long buf_size,
484 struct iwm_wifi_cmd *cmd)
485{
486 struct iwm_umac_notif_assoc_start *start;
487
488 start = (struct iwm_umac_notif_assoc_start *)buf;
489
490 set_bit(IWM_STATUS_ASSOCIATING, &iwm->status);
491
492 IWM_DBG_MLME(iwm, INFO, "Association with %pM Started, reason: %d\n",
493 start->bssid, le32_to_cpu(start->roam_reason));
494
495 wake_up_interruptible(&iwm->mlme_queue);
496
497 return 0;
498}
499
500static int iwm_mlme_assoc_complete(struct iwm_priv *iwm, u8 *buf,
501 unsigned long buf_size,
502 struct iwm_wifi_cmd *cmd)
503{
504 struct iwm_umac_notif_assoc_complete *complete =
505 (struct iwm_umac_notif_assoc_complete *)buf;
506 union iwreq_data wrqu;
507
508 IWM_DBG_MLME(iwm, INFO, "Association with %pM completed, status: %d\n",
509 complete->bssid, complete->status);
510
511 memset(&wrqu, 0, sizeof(wrqu));
512
513 clear_bit(IWM_STATUS_ASSOCIATING, &iwm->status);
514
515 switch (le32_to_cpu(complete->status)) {
516 case UMAC_ASSOC_COMPLETE_SUCCESS:
517 set_bit(IWM_STATUS_ASSOCIATED, &iwm->status);
518 memcpy(iwm->bssid, complete->bssid, ETH_ALEN);
519 iwm->channel = complete->channel;
520
521 iwm_link_on(iwm);
522
523 memcpy(wrqu.ap_addr.sa_data, complete->bssid, ETH_ALEN);
524 break;
525 case UMAC_ASSOC_COMPLETE_FAILURE:
526 clear_bit(IWM_STATUS_ASSOCIATED, &iwm->status);
527 memset(iwm->bssid, 0, ETH_ALEN);
528 iwm->channel = 0;
529
530 iwm_link_off(iwm);
531 default:
532 break;
533 }
534
535 if (iwm->conf.mode == UMAC_MODE_IBSS) {
536 cfg80211_ibss_joined(iwm_to_ndev(iwm), iwm->bssid, GFP_KERNEL);
537 return 0;
538 }
539
540 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
541 wireless_send_event(iwm_to_ndev(iwm), SIOCGIWAP, &wrqu, NULL);
542
543 return 0;
544}
545
546static int iwm_mlme_profile_invalidate(struct iwm_priv *iwm, u8 *buf,
547 unsigned long buf_size,
548 struct iwm_wifi_cmd *cmd)
549{
550 struct iwm_umac_notif_profile_invalidate *invalid;
551
552 invalid = (struct iwm_umac_notif_profile_invalidate *)buf;
553
554 IWM_DBG_MLME(iwm, INFO, "Profile Invalidated. Reason: %d\n",
555 le32_to_cpu(invalid->reason));
556
557 clear_bit(IWM_STATUS_ASSOCIATING, &iwm->status);
558 clear_bit(IWM_STATUS_ASSOCIATED, &iwm->status);
559
560 iwm->umac_profile_active = 0;
561 memset(iwm->bssid, 0, ETH_ALEN);
562 iwm->channel = 0;
563
564 iwm_link_off(iwm);
565
566 wake_up_interruptible(&iwm->mlme_queue);
567
568 return 0;
569}
570
571static int iwm_mlme_scan_complete(struct iwm_priv *iwm, u8 *buf,
572 unsigned long buf_size,
573 struct iwm_wifi_cmd *cmd)
574{
575 int ret;
576 struct iwm_umac_notif_scan_complete *scan_complete =
577 (struct iwm_umac_notif_scan_complete *)buf;
578 u32 result = le32_to_cpu(scan_complete->result);
579
580 IWM_DBG_MLME(iwm, INFO, "type:0x%x result:0x%x seq:%d\n",
581 le32_to_cpu(scan_complete->type),
582 le32_to_cpu(scan_complete->result),
583 scan_complete->seq_num);
584
585 if (!test_and_clear_bit(IWM_STATUS_SCANNING, &iwm->status)) {
586 IWM_ERR(iwm, "Scan complete while device not scanning\n");
587 return -EIO;
588 }
589 if (!iwm->scan_request)
590 return 0;
591
592 ret = iwm_cfg80211_inform_bss(iwm);
593
594 cfg80211_scan_done(iwm->scan_request,
595 (result & UMAC_SCAN_RESULT_ABORTED) ? 1 : !!ret);
596 iwm->scan_request = NULL;
597
598 return ret;
599}
600
601static int iwm_mlme_update_sta_table(struct iwm_priv *iwm, u8 *buf,
602 unsigned long buf_size,
603 struct iwm_wifi_cmd *cmd)
604{
605 struct iwm_umac_notif_sta_info *umac_sta =
606 (struct iwm_umac_notif_sta_info *)buf;
607 struct iwm_sta_info *sta;
608 int i;
609
610 switch (le32_to_cpu(umac_sta->opcode)) {
611 case UMAC_OPCODE_ADD_MODIFY:
612 sta = &iwm->sta_table[GET_VAL8(umac_sta->sta_id, LMAC_STA_ID)];
613
614 IWM_DBG_MLME(iwm, INFO, "%s STA: ID = %d, Color = %d, "
615 "addr = %pM, qos = %d\n",
616 sta->valid ? "Modify" : "Add",
617 GET_VAL8(umac_sta->sta_id, LMAC_STA_ID),
618 GET_VAL8(umac_sta->sta_id, LMAC_STA_COLOR),
619 umac_sta->mac_addr,
620 umac_sta->flags & UMAC_STA_FLAG_QOS);
621
622 sta->valid = 1;
623 sta->qos = umac_sta->flags & UMAC_STA_FLAG_QOS;
624 sta->color = GET_VAL8(umac_sta->sta_id, LMAC_STA_COLOR);
625 memcpy(sta->addr, umac_sta->mac_addr, ETH_ALEN);
626 break;
627 case UMAC_OPCODE_REMOVE:
628 IWM_DBG_MLME(iwm, INFO, "Remove STA: ID = %d, Color = %d, "
629 "addr = %pM\n",
630 GET_VAL8(umac_sta->sta_id, LMAC_STA_ID),
631 GET_VAL8(umac_sta->sta_id, LMAC_STA_COLOR),
632 umac_sta->mac_addr);
633
634 sta = &iwm->sta_table[GET_VAL8(umac_sta->sta_id, LMAC_STA_ID)];
635
636 if (!memcmp(sta->addr, umac_sta->mac_addr, ETH_ALEN))
637 sta->valid = 0;
638
639 break;
640 case UMAC_OPCODE_CLEAR_ALL:
641 for (i = 0; i < IWM_STA_TABLE_NUM; i++)
642 iwm->sta_table[i].valid = 0;
643
644 break;
645 default:
646 break;
647 }
648
649 return 0;
650}
651
652static int iwm_mlme_update_bss_table(struct iwm_priv *iwm, u8 *buf,
653 unsigned long buf_size,
654 struct iwm_wifi_cmd *cmd)
655{
656 struct wiphy *wiphy = iwm_to_wiphy(iwm);
657 struct ieee80211_mgmt *mgmt;
658 struct iwm_umac_notif_bss_info *umac_bss =
659 (struct iwm_umac_notif_bss_info *)buf;
660 struct ieee80211_channel *channel;
661 struct ieee80211_supported_band *band;
662 struct iwm_bss_info *bss, *next;
663 s32 signal;
664 int freq;
665 u16 frame_len = le16_to_cpu(umac_bss->frame_len);
666 size_t bss_len = sizeof(struct iwm_umac_notif_bss_info) + frame_len;
667
668 mgmt = (struct ieee80211_mgmt *)(umac_bss->frame_buf);
669
670 IWM_DBG_MLME(iwm, DBG, "New BSS info entry: %pM\n", mgmt->bssid);
671 IWM_DBG_MLME(iwm, DBG, "\tType: 0x%x\n", le32_to_cpu(umac_bss->type));
672 IWM_DBG_MLME(iwm, DBG, "\tTimestamp: %d\n",
673 le32_to_cpu(umac_bss->timestamp));
674 IWM_DBG_MLME(iwm, DBG, "\tTable Index: %d\n",
675 le16_to_cpu(umac_bss->table_idx));
676 IWM_DBG_MLME(iwm, DBG, "\tBand: %d\n", umac_bss->band);
677 IWM_DBG_MLME(iwm, DBG, "\tChannel: %d\n", umac_bss->channel);
678 IWM_DBG_MLME(iwm, DBG, "\tRSSI: %d\n", umac_bss->rssi);
679 IWM_DBG_MLME(iwm, DBG, "\tFrame Length: %d\n", frame_len);
680
681 list_for_each_entry_safe(bss, next, &iwm->bss_list, node)
682 if (bss->bss->table_idx == umac_bss->table_idx)
683 break;
684
685 if (&bss->node != &iwm->bss_list) {
686 /* Remove the old BSS entry, we will add it back later. */
687 list_del(&bss->node);
688 kfree(bss->bss);
689 } else {
690 /* New BSS entry */
691
692 bss = kzalloc(sizeof(struct iwm_bss_info), GFP_KERNEL);
693 if (!bss) {
694 IWM_ERR(iwm, "Couldn't allocate bss_info\n");
695 return -ENOMEM;
696 }
697 }
698
699 bss->bss = kzalloc(bss_len, GFP_KERNEL);
700 if (!bss) {
701 kfree(bss);
702 IWM_ERR(iwm, "Couldn't allocate bss\n");
703 return -ENOMEM;
704 }
705
706 INIT_LIST_HEAD(&bss->node);
707 memcpy(bss->bss, umac_bss, bss_len);
708
709 if (umac_bss->band == UMAC_BAND_2GHZ)
710 band = wiphy->bands[IEEE80211_BAND_2GHZ];
711 else if (umac_bss->band == UMAC_BAND_5GHZ)
712 band = wiphy->bands[IEEE80211_BAND_5GHZ];
713 else {
714 IWM_ERR(iwm, "Invalid band: %d\n", umac_bss->band);
715 goto err;
716 }
717
718 freq = ieee80211_channel_to_frequency(umac_bss->channel);
719 channel = ieee80211_get_channel(wiphy, freq);
720 signal = umac_bss->rssi * 100;
721
722 bss->cfg_bss = cfg80211_inform_bss_frame(wiphy, channel,
723 mgmt, frame_len,
724 signal, GFP_KERNEL);
725 if (!bss->cfg_bss)
726 goto err;
727
728 list_add_tail(&bss->node, &iwm->bss_list);
729
730 return 0;
731 err:
732 kfree(bss->bss);
733 kfree(bss);
734
735 return -EINVAL;
736}
737
738static int iwm_mlme_remove_bss(struct iwm_priv *iwm, u8 *buf,
739 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
740{
741 struct iwm_umac_notif_bss_removed *bss_rm =
742 (struct iwm_umac_notif_bss_removed *)buf;
743 struct iwm_bss_info *bss, *next;
744 u16 table_idx;
745 int i;
746
747 for (i = 0; i < le32_to_cpu(bss_rm->count); i++) {
748 table_idx = (le16_to_cpu(bss_rm->entries[i])
749 & IWM_BSS_REMOVE_INDEX_MSK);
750 list_for_each_entry_safe(bss, next, &iwm->bss_list, node)
751 if (bss->bss->table_idx == cpu_to_le16(table_idx)) {
752 struct ieee80211_mgmt *mgmt;
753
754 mgmt = (struct ieee80211_mgmt *)
755 (bss->bss->frame_buf);
756 IWM_DBG_MLME(iwm, ERR,
757 "BSS removed: %pM\n",
758 mgmt->bssid);
759 list_del(&bss->node);
760 kfree(bss->bss);
761 kfree(bss);
762 }
763 }
764
765 return 0;
766}
767
768static int iwm_mlme_mgt_frame(struct iwm_priv *iwm, u8 *buf,
769 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
770{
771 struct iwm_umac_notif_mgt_frame *mgt_frame =
772 (struct iwm_umac_notif_mgt_frame *)buf;
773 struct ieee80211_mgmt *mgt = (struct ieee80211_mgmt *)mgt_frame->frame;
774 u8 *ie;
775 unsigned int event;
776 union iwreq_data wrqu;
777
778 IWM_HEXDUMP(iwm, DBG, MLME, "MGT: ", mgt_frame->frame,
779 le16_to_cpu(mgt_frame->len));
780
781 if (ieee80211_is_assoc_req(mgt->frame_control)) {
782 ie = mgt->u.assoc_req.variable;;
783 event = IWEVASSOCREQIE;
784 } else if (ieee80211_is_reassoc_req(mgt->frame_control)) {
785 ie = mgt->u.reassoc_req.variable;;
786 event = IWEVASSOCREQIE;
787 } else if (ieee80211_is_assoc_resp(mgt->frame_control)) {
788 ie = mgt->u.assoc_resp.variable;;
789 event = IWEVASSOCRESPIE;
790 } else if (ieee80211_is_reassoc_resp(mgt->frame_control)) {
791 ie = mgt->u.reassoc_resp.variable;;
792 event = IWEVASSOCRESPIE;
793 } else {
794 IWM_ERR(iwm, "Unsupported management frame");
795 return 0;
796 }
797
798 wrqu.data.length = le16_to_cpu(mgt_frame->len) - (ie - (u8 *)mgt);
799
800 IWM_HEXDUMP(iwm, DBG, MLME, "EVT: ", ie, wrqu.data.length);
801 wireless_send_event(iwm_to_ndev(iwm), event, &wrqu, ie);
802
803 return 0;
804}
805
806static int iwm_ntf_mlme(struct iwm_priv *iwm, u8 *buf,
807 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
808{
809 struct iwm_umac_notif_wifi_if *notif =
810 (struct iwm_umac_notif_wifi_if *)buf;
811
812 switch (notif->status) {
813 case WIFI_IF_NTFY_ASSOC_START:
814 return iwm_mlme_assoc_start(iwm, buf, buf_size, cmd);
815 case WIFI_IF_NTFY_ASSOC_COMPLETE:
816 return iwm_mlme_assoc_complete(iwm, buf, buf_size, cmd);
817 case WIFI_IF_NTFY_PROFILE_INVALIDATE_COMPLETE:
818 return iwm_mlme_profile_invalidate(iwm, buf, buf_size, cmd);
819 case WIFI_IF_NTFY_CONNECTION_TERMINATED:
820 IWM_DBG_MLME(iwm, DBG, "Connection terminated\n");
821 break;
822 case WIFI_IF_NTFY_SCAN_COMPLETE:
823 return iwm_mlme_scan_complete(iwm, buf, buf_size, cmd);
824 case WIFI_IF_NTFY_STA_TABLE_CHANGE:
825 return iwm_mlme_update_sta_table(iwm, buf, buf_size, cmd);
826 case WIFI_IF_NTFY_EXTENDED_IE_REQUIRED:
827 IWM_DBG_MLME(iwm, DBG, "Extended IE required\n");
828 break;
829 case WIFI_IF_NTFY_BSS_TRK_TABLE_CHANGED:
830 return iwm_mlme_update_bss_table(iwm, buf, buf_size, cmd);
831 case WIFI_IF_NTFY_BSS_TRK_ENTRIES_REMOVED:
832 return iwm_mlme_remove_bss(iwm, buf, buf_size, cmd);
833 break;
834 case WIFI_IF_NTFY_MGMT_FRAME:
835 return iwm_mlme_mgt_frame(iwm, buf, buf_size, cmd);
836 case WIFI_DBG_IF_NTFY_SCAN_SUPER_JOB_START:
837 case WIFI_DBG_IF_NTFY_SCAN_SUPER_JOB_COMPLETE:
838 case WIFI_DBG_IF_NTFY_SCAN_CHANNEL_START:
839 case WIFI_DBG_IF_NTFY_SCAN_CHANNEL_RESULT:
840 case WIFI_DBG_IF_NTFY_SCAN_MINI_JOB_START:
841 case WIFI_DBG_IF_NTFY_SCAN_MINI_JOB_COMPLETE:
842 case WIFI_DBG_IF_NTFY_CNCT_ATC_START:
843 case WIFI_DBG_IF_NTFY_COEX_NOTIFICATION:
844 case WIFI_DBG_IF_NTFY_COEX_HANDLE_ENVELOP:
845 case WIFI_DBG_IF_NTFY_COEX_HANDLE_RELEASE_ENVELOP:
846 IWM_DBG_MLME(iwm, DBG, "MLME debug notification: 0x%x\n",
847 notif->status);
848 break;
849 default:
850 IWM_ERR(iwm, "Unhandled notification: 0x%x\n", notif->status);
851 break;
852 }
853
854 return 0;
855}
856
857#define IWM_STATS_UPDATE_INTERVAL (2 * HZ)
858
859static int iwm_ntf_statistics(struct iwm_priv *iwm, u8 *buf,
860 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
861{
862 struct iwm_umac_notif_stats *stats = (struct iwm_umac_notif_stats *)buf;
863 struct iw_statistics *wstats = &iwm->wstats;
864 u16 max_rate = 0;
865 int i;
866
867 IWM_DBG_MLME(iwm, DBG, "Statistics notification received\n");
868
869 if (test_bit(IWM_STATUS_ASSOCIATED, &iwm->status)) {
870 for (i = 0; i < UMAC_NTF_RATE_SAMPLE_NR; i++) {
871 max_rate = max_t(u16, max_rate,
872 max(le16_to_cpu(stats->tx_rate[i]),
873 le16_to_cpu(stats->rx_rate[i])));
874 }
875 /* UMAC passes rate info multiplies by 2 */
876 iwm->rate = max_rate >> 1;
877 }
878
879 wstats->status = 0;
880
881 wstats->discard.nwid = le32_to_cpu(stats->rx_drop_other_bssid);
882 wstats->discard.code = le32_to_cpu(stats->rx_drop_decode);
883 wstats->discard.fragment = le32_to_cpu(stats->rx_drop_reassembly);
884 wstats->discard.retries = le32_to_cpu(stats->tx_drop_max_retry);
885
886 wstats->miss.beacon = le32_to_cpu(stats->missed_beacons);
887
888 /* according to cfg80211 */
889 if (stats->rssi_dbm < -110)
890 wstats->qual.qual = 0;
891 else if (stats->rssi_dbm > -40)
892 wstats->qual.qual = 70;
893 else
894 wstats->qual.qual = stats->rssi_dbm + 110;
895
896 wstats->qual.level = stats->rssi_dbm;
897 wstats->qual.noise = stats->noise_dbm;
898 wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
899
900 schedule_delayed_work(&iwm->stats_request, IWM_STATS_UPDATE_INTERVAL);
901
902 mod_timer(&iwm->watchdog, round_jiffies(jiffies + IWM_WATCHDOG_PERIOD));
903
904 return 0;
905}
906
907static int iwm_ntf_eeprom_proxy(struct iwm_priv *iwm, u8 *buf,
908 unsigned long buf_size,
909 struct iwm_wifi_cmd *cmd)
910{
911 struct iwm_umac_cmd_eeprom_proxy *eeprom_proxy =
912 (struct iwm_umac_cmd_eeprom_proxy *)
913 (buf + sizeof(struct iwm_umac_wifi_in_hdr));
914 struct iwm_umac_cmd_eeprom_proxy_hdr *hdr = &eeprom_proxy->hdr;
915 u32 hdr_offset = le32_to_cpu(hdr->offset);
916 u32 hdr_len = le32_to_cpu(hdr->len);
917 u32 hdr_type = le32_to_cpu(hdr->type);
918
919 IWM_DBG_NTF(iwm, DBG, "type: 0x%x, len: %d, offset: 0x%x\n",
920 hdr_type, hdr_len, hdr_offset);
921
922 if ((hdr_offset + hdr_len) > IWM_EEPROM_LEN)
923 return -EINVAL;
924
925#ifdef CONFIG_IWM_B0_HW_SUPPORT
926 if (hdr_offset == IWM_EEPROM_SKU_CAP_OFF) {
927 if (eeprom_proxy->buf[0] == 0xff)
928 iwm->conf.hw_b0 = 1;
929 }
930#endif
931
932 switch (hdr_type) {
933 case IWM_UMAC_CMD_EEPROM_TYPE_READ:
934 memcpy(iwm->eeprom + hdr_offset, eeprom_proxy->buf, hdr_len);
935 break;
936 case IWM_UMAC_CMD_EEPROM_TYPE_WRITE:
937 default:
938 return -ENOTSUPP;
939 }
940
941 return 0;
942}
943
944static int iwm_ntf_channel_info_list(struct iwm_priv *iwm, u8 *buf,
945 unsigned long buf_size,
946 struct iwm_wifi_cmd *cmd)
947{
948 struct iwm_umac_cmd_get_channel_list *ch_list =
949 (struct iwm_umac_cmd_get_channel_list *)
950 (buf + sizeof(struct iwm_umac_wifi_in_hdr));
951 struct wiphy *wiphy = iwm_to_wiphy(iwm);
952 struct ieee80211_supported_band *band;
953 int i;
954
955 band = wiphy->bands[IEEE80211_BAND_2GHZ];
956
957 for (i = 0; i < band->n_channels; i++) {
958 unsigned long ch_mask_0 =
959 le32_to_cpu(ch_list->ch[0].channels_mask);
960 unsigned long ch_mask_2 =
961 le32_to_cpu(ch_list->ch[2].channels_mask);
962
963 if (!test_bit(i, &ch_mask_0))
964 band->channels[i].flags |= IEEE80211_CHAN_DISABLED;
965
966 if (!test_bit(i, &ch_mask_2))
967 band->channels[i].flags |= IEEE80211_CHAN_NO_IBSS;
968 }
969
970 band = wiphy->bands[IEEE80211_BAND_5GHZ];
971
972 for (i = 0; i < min(band->n_channels, 32); i++) {
973 unsigned long ch_mask_1 =
974 le32_to_cpu(ch_list->ch[1].channels_mask);
975 unsigned long ch_mask_3 =
976 le32_to_cpu(ch_list->ch[3].channels_mask);
977
978 if (!test_bit(i, &ch_mask_1))
979 band->channels[i].flags |= IEEE80211_CHAN_DISABLED;
980
981 if (!test_bit(i, &ch_mask_3))
982 band->channels[i].flags |= IEEE80211_CHAN_NO_IBSS;
983 }
984
985 return 0;
986}
987
988static int iwm_ntf_wifi_if_wrapper(struct iwm_priv *iwm, u8 *buf,
989 unsigned long buf_size,
990 struct iwm_wifi_cmd *cmd)
991{
992 struct iwm_umac_wifi_if *hdr =
993 (struct iwm_umac_wifi_if *)cmd->buf.payload;
994
995 IWM_DBG_NTF(iwm, DBG, "WIFI_IF_WRAPPER cmd is delivered to UMAC: "
996 "oid is %d\n", hdr->oid);
997
998 switch (hdr->oid) {
999 case UMAC_WIFI_IF_CMD_SET_PROFILE:
1000 iwm->umac_profile_active = 1;
1001 wake_up_interruptible(&iwm->mlme_queue);
1002 break;
1003 default:
1004 break;
1005 }
1006
1007 return 0;
1008}
1009
1010static int iwm_ntf_card_state(struct iwm_priv *iwm, u8 *buf,
1011 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
1012{
1013 struct iwm_lmac_card_state *state = (struct iwm_lmac_card_state *)
1014 (buf + sizeof(struct iwm_umac_wifi_in_hdr));
1015 u32 flags = le32_to_cpu(state->flags);
1016
1017 IWM_INFO(iwm, "HW RF Kill %s, CT Kill %s\n",
1018 flags & IWM_CARD_STATE_HW_DISABLED ? "ON" : "OFF",
1019 flags & IWM_CARD_STATE_CTKILL_DISABLED ? "ON" : "OFF");
1020
1021 if (flags & IWM_CARD_STATE_HW_DISABLED)
1022 set_bit(IWM_RADIO_RFKILL_HW, &iwm->radio);
1023 else
1024 clear_bit(IWM_RADIO_RFKILL_HW, &iwm->radio);
1025
1026 return 0;
1027}
1028
1029static int iwm_rx_handle_wifi(struct iwm_priv *iwm, u8 *buf,
1030 unsigned long buf_size)
1031{
1032 struct iwm_umac_wifi_in_hdr *wifi_hdr;
1033 struct iwm_wifi_cmd *cmd;
1034 u8 source, cmd_id;
1035 u16 seq_num;
1036 u32 count;
1037 u8 resp;
1038
1039 wifi_hdr = (struct iwm_umac_wifi_in_hdr *)buf;
1040 cmd_id = wifi_hdr->sw_hdr.cmd.cmd;
1041
1042 source = GET_VAL32(wifi_hdr->hw_hdr.cmd, UMAC_HDI_IN_CMD_SOURCE);
1043 if (source >= IWM_SRC_NUM) {
1044 IWM_CRIT(iwm, "invalid source %d\n", source);
1045 return -EINVAL;
1046 }
1047
1048 count = (GET_VAL32(wifi_hdr->sw_hdr.meta_data, UMAC_FW_CMD_BYTE_COUNT));
1049 count += sizeof(struct iwm_umac_wifi_in_hdr) -
1050 sizeof(struct iwm_dev_cmd_hdr);
1051 if (count > buf_size) {
1052 IWM_CRIT(iwm, "count %d, buf size:%ld\n", count, buf_size);
1053 return -EINVAL;
1054 }
1055
1056 resp = GET_VAL32(wifi_hdr->sw_hdr.meta_data, UMAC_FW_CMD_STATUS);
1057
1058 seq_num = le16_to_cpu(wifi_hdr->sw_hdr.cmd.seq_num);
1059
1060 IWM_DBG_RX(iwm, DBG, "CMD:0x%x, source: 0x%x, seqnum: %d\n",
1061 cmd_id, source, seq_num);
1062
1063 /*
1064 * If this is a response to a previously sent command, there must
1065 * be a pending command for this sequence number.
1066 */
1067 cmd = iwm_get_pending_wifi_cmd(iwm, seq_num);
1068
1069 /* Notify the caller only for sync commands. */
1070 switch (source) {
1071 case UMAC_HDI_IN_SOURCE_FHRX:
1072 if (iwm->lmac_handlers[cmd_id] &&
1073 test_bit(cmd_id, &iwm->lmac_handler_map[0]))
1074 return iwm_notif_send(iwm, cmd, cmd_id, source,
1075 buf, count);
1076 break;
1077 case UMAC_HDI_IN_SOURCE_FW:
1078 if (iwm->umac_handlers[cmd_id] &&
1079 test_bit(cmd_id, &iwm->umac_handler_map[0]))
1080 return iwm_notif_send(iwm, cmd, cmd_id, source,
1081 buf, count);
1082 break;
1083 case UMAC_HDI_IN_SOURCE_UDMA:
1084 break;
1085 }
1086
1087 return iwm_rx_handle_resp(iwm, buf, count, cmd);
1088}
1089
1090int iwm_rx_handle_resp(struct iwm_priv *iwm, u8 *buf, unsigned long buf_size,
1091 struct iwm_wifi_cmd *cmd)
1092{
1093 u8 source, cmd_id;
1094 struct iwm_umac_wifi_in_hdr *wifi_hdr;
1095 int ret = 0;
1096
1097 wifi_hdr = (struct iwm_umac_wifi_in_hdr *)buf;
1098 cmd_id = wifi_hdr->sw_hdr.cmd.cmd;
1099
1100 source = GET_VAL32(wifi_hdr->hw_hdr.cmd, UMAC_HDI_IN_CMD_SOURCE);
1101
1102 IWM_DBG_RX(iwm, DBG, "CMD:0x%x, source: 0x%x\n", cmd_id, source);
1103
1104 switch (source) {
1105 case UMAC_HDI_IN_SOURCE_FHRX:
1106 if (iwm->lmac_handlers[cmd_id])
1107 ret = iwm->lmac_handlers[cmd_id]
1108 (iwm, buf, buf_size, cmd);
1109 break;
1110 case UMAC_HDI_IN_SOURCE_FW:
1111 if (iwm->umac_handlers[cmd_id])
1112 ret = iwm->umac_handlers[cmd_id]
1113 (iwm, buf, buf_size, cmd);
1114 break;
1115 case UMAC_HDI_IN_SOURCE_UDMA:
1116 ret = -EINVAL;
1117 break;
1118 }
1119
1120 kfree(cmd);
1121
1122 return ret;
1123}
1124
1125static int iwm_rx_handle_nonwifi(struct iwm_priv *iwm, u8 *buf,
1126 unsigned long buf_size)
1127{
1128 u8 seq_num;
1129 struct iwm_udma_in_hdr *hdr = (struct iwm_udma_in_hdr *)buf;
1130 struct iwm_nonwifi_cmd *cmd, *next;
1131
1132 seq_num = GET_VAL32(hdr->cmd, UDMA_HDI_IN_CMD_NON_WIFI_HW_SEQ_NUM);
1133
1134 /*
1135 * We received a non wifi answer.
1136 * Let's check if there's a pending command for it, and if so
1137 * replace the command payload with the buffer, and then wake the
1138 * callers up.
1139 * That means we only support synchronised non wifi command response
1140 * schemes.
1141 */
1142 list_for_each_entry_safe(cmd, next, &iwm->nonwifi_pending_cmd, pending)
1143 if (cmd->seq_num == seq_num) {
1144 cmd->resp_received = 1;
1145 cmd->buf.len = buf_size;
1146 memcpy(cmd->buf.hdr, buf, buf_size);
1147 wake_up_interruptible(&iwm->nonwifi_queue);
1148 }
1149
1150 return 0;
1151}
1152
1153static int iwm_rx_handle_umac(struct iwm_priv *iwm, u8 *buf,
1154 unsigned long buf_size)
1155{
1156 int ret = 0;
1157 u8 op_code;
1158 unsigned long buf_offset = 0;
1159 struct iwm_udma_in_hdr *hdr;
1160
1161 /*
1162 * To allow for a more efficient bus usage, UMAC
1163 * messages are encapsulated into UDMA ones. This
1164 * way we can have several UMAC messages in one bus
1165 * transfer.
1166 * A UDMA frame size is always aligned on 16 bytes,
1167 * and a UDMA frame must not start with a UMAC_PAD_TERMINAL
1168 * word. This is how we parse a bus frame into several
1169 * UDMA ones.
1170 */
1171 while (buf_offset < buf_size) {
1172
1173 hdr = (struct iwm_udma_in_hdr *)(buf + buf_offset);
1174
1175 if (iwm_rx_check_udma_hdr(hdr) < 0) {
1176 IWM_DBG_RX(iwm, DBG, "End of frame\n");
1177 break;
1178 }
1179
1180 op_code = GET_VAL32(hdr->cmd, UMAC_HDI_IN_CMD_OPCODE);
1181
1182 IWM_DBG_RX(iwm, DBG, "Op code: 0x%x\n", op_code);
1183
1184 if (op_code == UMAC_HDI_IN_OPCODE_WIFI) {
1185 ret |= iwm_rx_handle_wifi(iwm, buf + buf_offset,
1186 buf_size - buf_offset);
1187 } else if (op_code < UMAC_HDI_IN_OPCODE_NONWIFI_MAX) {
1188 if (GET_VAL32(hdr->cmd,
1189 UDMA_HDI_IN_CMD_NON_WIFI_HW_SIG) !=
1190 UDMA_HDI_IN_CMD_NON_WIFI_HW_SIG) {
1191 IWM_ERR(iwm, "Incorrect hw signature\n");
1192 return -EINVAL;
1193 }
1194 ret |= iwm_rx_handle_nonwifi(iwm, buf + buf_offset,
1195 buf_size - buf_offset);
1196 } else {
1197 IWM_ERR(iwm, "Invalid RX opcode: 0x%x\n", op_code);
1198 ret |= -EINVAL;
1199 }
1200
1201 buf_offset += iwm_rx_resp_size(hdr);
1202 }
1203
1204 return ret;
1205}
1206
1207int iwm_rx_handle(struct iwm_priv *iwm, u8 *buf, unsigned long buf_size)
1208{
1209 struct iwm_udma_in_hdr *hdr;
1210
1211 hdr = (struct iwm_udma_in_hdr *)buf;
1212
1213 switch (le32_to_cpu(hdr->cmd)) {
1214 case UMAC_REBOOT_BARKER:
1215 return iwm_notif_send(iwm, NULL, IWM_BARKER_REBOOT_NOTIFICATION,
1216 IWM_SRC_UDMA, buf, buf_size);
1217 case UMAC_ACK_BARKER:
1218 return iwm_notif_send(iwm, NULL, IWM_ACK_BARKER_NOTIFICATION,
1219 IWM_SRC_UDMA, NULL, 0);
1220 default:
1221 IWM_DBG_RX(iwm, DBG, "Received cmd: 0x%x\n", hdr->cmd);
1222 return iwm_rx_handle_umac(iwm, buf, buf_size);
1223 }
1224
1225 return 0;
1226}
1227
1228static const iwm_handler iwm_umac_handlers[] =
1229{
1230 [UMAC_NOTIFY_OPCODE_ERROR] = iwm_ntf_error,
1231 [UMAC_NOTIFY_OPCODE_ALIVE] = iwm_ntf_umac_alive,
1232 [UMAC_NOTIFY_OPCODE_INIT_COMPLETE] = iwm_ntf_init_complete,
1233 [UMAC_NOTIFY_OPCODE_WIFI_CORE_STATUS] = iwm_ntf_wifi_status,
1234 [UMAC_NOTIFY_OPCODE_WIFI_IF_WRAPPER] = iwm_ntf_mlme,
1235 [UMAC_NOTIFY_OPCODE_PAGE_DEALLOC] = iwm_ntf_tx_credit_update,
1236 [UMAC_NOTIFY_OPCODE_RX_TICKET] = iwm_ntf_rx_ticket,
1237 [UMAC_CMD_OPCODE_RESET] = iwm_ntf_umac_reset,
1238 [UMAC_NOTIFY_OPCODE_STATS] = iwm_ntf_statistics,
1239 [UMAC_CMD_OPCODE_EEPROM_PROXY] = iwm_ntf_eeprom_proxy,
1240 [UMAC_CMD_OPCODE_GET_CHAN_INFO_LIST] = iwm_ntf_channel_info_list,
1241 [REPLY_RX_MPDU_CMD] = iwm_ntf_rx_packet,
1242 [UMAC_CMD_OPCODE_WIFI_IF_WRAPPER] = iwm_ntf_wifi_if_wrapper,
1243};
1244
1245static const iwm_handler iwm_lmac_handlers[] =
1246{
1247 [REPLY_TX] = iwm_ntf_tx,
1248 [REPLY_ALIVE] = iwm_ntf_lmac_version,
1249 [CALIBRATION_RES_NOTIFICATION] = iwm_ntf_calib_res,
1250 [CALIBRATION_COMPLETE_NOTIFICATION] = iwm_ntf_calib_complete,
1251 [CALIBRATION_CFG_CMD] = iwm_ntf_calib_cfg,
1252 [REPLY_RX_MPDU_CMD] = iwm_ntf_rx_packet,
1253 [CARD_STATE_NOTIFICATION] = iwm_ntf_card_state,
1254};
1255
1256void iwm_rx_setup_handlers(struct iwm_priv *iwm)
1257{
1258 iwm->umac_handlers = (iwm_handler *) iwm_umac_handlers;
1259 iwm->lmac_handlers = (iwm_handler *) iwm_lmac_handlers;
1260}
1261
1262static void iwm_remove_iv(struct sk_buff *skb, u32 hdr_total_len)
1263{
1264 struct ieee80211_hdr *hdr;
1265 unsigned int hdr_len;
1266
1267 hdr = (struct ieee80211_hdr *)skb->data;
1268
1269 if (!ieee80211_has_protected(hdr->frame_control))
1270 return;
1271
1272 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1273 if (hdr_total_len <= hdr_len)
1274 return;
1275
1276 memmove(skb->data + (hdr_total_len - hdr_len), skb->data, hdr_len);
1277 skb_pull(skb, (hdr_total_len - hdr_len));
1278}
1279
1280static void iwm_rx_adjust_packet(struct iwm_priv *iwm,
1281 struct iwm_rx_packet *packet,
1282 struct iwm_rx_ticket_node *ticket_node)
1283{
1284 u32 payload_offset = 0, payload_len;
1285 struct iwm_rx_ticket *ticket = ticket_node->ticket;
1286 struct iwm_rx_mpdu_hdr *mpdu_hdr;
1287 struct ieee80211_hdr *hdr;
1288
1289 mpdu_hdr = (struct iwm_rx_mpdu_hdr *)packet->skb->data;
1290 payload_offset += sizeof(struct iwm_rx_mpdu_hdr);
1291 /* Padding is 0 or 2 bytes */
1292 payload_len = le16_to_cpu(mpdu_hdr->len) +
1293 (le16_to_cpu(ticket->flags) & IWM_RX_TICKET_PAD_SIZE_MSK);
1294 payload_len -= ticket->tail_len;
1295
1296 IWM_DBG_RX(iwm, DBG, "Packet adjusted, len:%d, offset:%d, "
1297 "ticket offset:%d ticket tail len:%d\n",
1298 payload_len, payload_offset, ticket->payload_offset,
1299 ticket->tail_len);
1300
1301 IWM_HEXDUMP(iwm, DBG, RX, "RAW: ", packet->skb->data, packet->skb->len);
1302
1303 skb_pull(packet->skb, payload_offset);
1304 skb_trim(packet->skb, payload_len);
1305
1306 iwm_remove_iv(packet->skb, ticket->payload_offset);
1307
1308 hdr = (struct ieee80211_hdr *) packet->skb->data;
1309 if (ieee80211_is_data_qos(hdr->frame_control)) {
1310 /* UMAC handed QOS_DATA frame with 2 padding bytes appended
1311 * to the qos_ctl field in IEEE 802.11 headers. */
1312 memmove(packet->skb->data + IEEE80211_QOS_CTL_LEN + 2,
1313 packet->skb->data,
1314 ieee80211_hdrlen(hdr->frame_control) -
1315 IEEE80211_QOS_CTL_LEN);
1316 hdr = (struct ieee80211_hdr *) skb_pull(packet->skb,
1317 IEEE80211_QOS_CTL_LEN + 2);
1318 hdr->frame_control &= ~cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
1319 }
1320
1321 IWM_HEXDUMP(iwm, DBG, RX, "ADJUSTED: ",
1322 packet->skb->data, packet->skb->len);
1323}
1324
1325static void classify8023(struct sk_buff *skb)
1326{
1327 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1328
1329 if (ieee80211_is_data_qos(hdr->frame_control)) {
1330 u8 *qc = ieee80211_get_qos_ctl(hdr);
1331 /* frame has qos control */
1332 skb->priority = *qc & IEEE80211_QOS_CTL_TID_MASK;
1333 } else {
1334 skb->priority = 0;
1335 }
1336}
1337
1338static void iwm_rx_process_packet(struct iwm_priv *iwm,
1339 struct iwm_rx_packet *packet,
1340 struct iwm_rx_ticket_node *ticket_node)
1341{
1342 int ret;
1343 struct sk_buff *skb = packet->skb;
1344 struct wireless_dev *wdev = iwm_to_wdev(iwm);
1345 struct net_device *ndev = iwm_to_ndev(iwm);
1346
1347 IWM_DBG_RX(iwm, DBG, "Processing packet ID %d\n", packet->id);
1348
1349 switch (le16_to_cpu(ticket_node->ticket->action)) {
1350 case IWM_RX_TICKET_RELEASE:
1351 IWM_DBG_RX(iwm, DBG, "RELEASE packet\n");
1352 classify8023(skb);
1353 iwm_rx_adjust_packet(iwm, packet, ticket_node);
1354 ret = ieee80211_data_to_8023(skb, ndev->dev_addr, wdev->iftype);
1355 if (ret < 0) {
1356 IWM_DBG_RX(iwm, DBG, "Couldn't convert 802.11 header - "
1357 "%d\n", ret);
1358 break;
1359 }
1360
1361 IWM_HEXDUMP(iwm, DBG, RX, "802.3: ", skb->data, skb->len);
1362
1363 skb->dev = iwm_to_ndev(iwm);
1364 skb->protocol = eth_type_trans(skb, ndev);
1365 skb->ip_summed = CHECKSUM_UNNECESSARY;
1366 memset(skb->cb, 0, sizeof(skb->cb));
1367
1368 ndev->stats.rx_packets++;
1369 ndev->stats.rx_bytes += skb->len;
1370
1371 if (netif_rx(skb) == NET_RX_DROP) {
1372 IWM_ERR(iwm, "Packet dropped\n");
1373 ndev->stats.rx_dropped++;
1374 }
1375 break;
1376 case IWM_RX_TICKET_DROP:
1377 IWM_DBG_RX(iwm, DBG, "DROP packet\n");
1378 kfree_skb(packet->skb);
1379 break;
1380 default:
1381 IWM_ERR(iwm, "Unknow ticket action: %d\n",
1382 le16_to_cpu(ticket_node->ticket->action));
1383 kfree_skb(packet->skb);
1384 }
1385
1386 kfree(packet);
1387 iwm_rx_ticket_node_free(ticket_node);
1388}
1389
1390/*
1391 * Rx data processing:
1392 *
1393 * We're receiving Rx packet from the LMAC, and Rx ticket from
1394 * the UMAC.
1395 * To forward a target data packet upstream (i.e. to the
1396 * kernel network stack), we must have received an Rx ticket
1397 * that tells us we're allowed to release this packet (ticket
1398 * action is IWM_RX_TICKET_RELEASE). The Rx ticket also indicates,
1399 * among other things, where valid data actually starts in the Rx
1400 * packet.
1401 */
1402void iwm_rx_worker(struct work_struct *work)
1403{
1404 struct iwm_priv *iwm;
1405 struct iwm_rx_ticket_node *ticket, *next;
1406
1407 iwm = container_of(work, struct iwm_priv, rx_worker);
1408
1409 /*
1410 * We go through the tickets list and if there is a pending
1411 * packet for it, we push it upstream.
1412 * We stop whenever a ticket is missing its packet, as we're
1413 * supposed to send the packets in order.
1414 */
1415 list_for_each_entry_safe(ticket, next, &iwm->rx_tickets, node) {
1416 struct iwm_rx_packet *packet =
1417 iwm_rx_packet_get(iwm, le16_to_cpu(ticket->ticket->id));
1418
1419 if (!packet) {
1420 IWM_DBG_RX(iwm, DBG, "Skip rx_work: Wait for ticket %d "
1421 "to be handled first\n",
1422 le16_to_cpu(ticket->ticket->id));
1423 return;
1424 }
1425
1426 list_del(&ticket->node);
1427 list_del(&packet->node);
1428 iwm_rx_process_packet(iwm, packet, ticket);
1429 }
1430}
1431
diff --git a/drivers/net/wireless/iwmc3200wifi/rx.h b/drivers/net/wireless/iwmc3200wifi/rx.h
new file mode 100644
index 000000000000..da0db91cee59
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/rx.h
@@ -0,0 +1,60 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#ifndef __IWM_RX_H__
40#define __IWM_RX_H__
41
42#include <linux/skbuff.h>
43
44#include "umac.h"
45
46struct iwm_rx_ticket_node {
47 struct list_head node;
48 struct iwm_rx_ticket *ticket;
49};
50
51struct iwm_rx_packet {
52 struct list_head node;
53 u16 id;
54 struct sk_buff *skb;
55 unsigned long pkt_size;
56};
57
58void iwm_rx_worker(struct work_struct *work);
59
60#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/sdio.c b/drivers/net/wireless/iwmc3200wifi/sdio.c
new file mode 100644
index 000000000000..edc0a0091058
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/sdio.c
@@ -0,0 +1,516 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39/*
40 * This is the SDIO bus specific hooks for iwm.
41 * It also is the module's entry point.
42 *
43 * Interesting code paths:
44 * iwm_sdio_probe() (Called by an SDIO bus scan)
45 * -> iwm_if_alloc() (netdev.c)
46 * -> iwm_wdev_alloc() (cfg80211.c, allocates and register our wiphy)
47 * -> wiphy_new()
48 * -> wiphy_register()
49 * -> alloc_netdev_mq()
50 * -> register_netdev()
51 *
52 * iwm_sdio_remove()
53 * -> iwm_if_free() (netdev.c)
54 * -> unregister_netdev()
55 * -> iwm_wdev_free() (cfg80211.c)
56 * -> wiphy_unregister()
57 * -> wiphy_free()
58 *
59 * iwm_sdio_isr() (called in process context from the SDIO core code)
60 * -> queue_work(.., isr_worker)
61 * -- [async] --> iwm_sdio_isr_worker()
62 * -> iwm_rx_handle()
63 */
64
65#include <linux/kernel.h>
66#include <linux/netdevice.h>
67#include <linux/debugfs.h>
68#include <linux/mmc/sdio.h>
69#include <linux/mmc/sdio_func.h>
70
71#include "iwm.h"
72#include "debug.h"
73#include "bus.h"
74#include "sdio.h"
75
76static void iwm_sdio_isr_worker(struct work_struct *work)
77{
78 struct iwm_sdio_priv *hw;
79 struct iwm_priv *iwm;
80 struct iwm_rx_info *rx_info;
81 struct sk_buff *skb;
82 u8 *rx_buf;
83 unsigned long rx_size;
84
85 hw = container_of(work, struct iwm_sdio_priv, isr_worker);
86 iwm = hw_to_iwm(hw);
87
88 while (!skb_queue_empty(&iwm->rx_list)) {
89 skb = skb_dequeue(&iwm->rx_list);
90 rx_info = skb_to_rx_info(skb);
91 rx_size = rx_info->rx_size;
92 rx_buf = skb->data;
93
94 IWM_HEXDUMP(iwm, DBG, SDIO, "RX: ", rx_buf, rx_size);
95 if (iwm_rx_handle(iwm, rx_buf, rx_size) < 0)
96 IWM_WARN(iwm, "RX error\n");
97
98 kfree_skb(skb);
99 }
100}
101
102static void iwm_sdio_isr(struct sdio_func *func)
103{
104 struct iwm_priv *iwm;
105 struct iwm_sdio_priv *hw;
106 struct iwm_rx_info *rx_info;
107 struct sk_buff *skb;
108 unsigned long buf_size, read_size;
109 int ret;
110 u8 val;
111
112 hw = sdio_get_drvdata(func);
113 iwm = hw_to_iwm(hw);
114
115 buf_size = hw->blk_size;
116
117 /* We're checking the status */
118 val = sdio_readb(func, IWM_SDIO_INTR_STATUS_ADDR, &ret);
119 if (val == 0 || ret < 0) {
120 IWM_ERR(iwm, "Wrong INTR_STATUS\n");
121 return;
122 }
123
124 /* See if we have free buffers */
125 if (skb_queue_len(&iwm->rx_list) > IWM_RX_LIST_SIZE) {
126 IWM_ERR(iwm, "No buffer for more Rx frames\n");
127 return;
128 }
129
130 /* We first read the transaction size */
131 read_size = sdio_readb(func, IWM_SDIO_INTR_GET_SIZE_ADDR + 1, &ret);
132 read_size = read_size << 8;
133
134 if (ret < 0) {
135 IWM_ERR(iwm, "Couldn't read the xfer size\n");
136 return;
137 }
138
139 /* We need to clear the INT register */
140 sdio_writeb(func, 1, IWM_SDIO_INTR_CLEAR_ADDR, &ret);
141 if (ret < 0) {
142 IWM_ERR(iwm, "Couldn't clear the INT register\n");
143 return;
144 }
145
146 while (buf_size < read_size)
147 buf_size <<= 1;
148
149 skb = dev_alloc_skb(buf_size);
150 if (!skb) {
151 IWM_ERR(iwm, "Couldn't alloc RX skb\n");
152 return;
153 }
154 rx_info = skb_to_rx_info(skb);
155 rx_info->rx_size = read_size;
156 rx_info->rx_buf_size = buf_size;
157
158 /* Now we can read the actual buffer */
159 ret = sdio_memcpy_fromio(func, skb_put(skb, read_size),
160 IWM_SDIO_DATA_ADDR, read_size);
161
162 /* The skb is put on a driver's specific Rx SKB list */
163 skb_queue_tail(&iwm->rx_list, skb);
164
165 /* We can now schedule the actual worker */
166 queue_work(hw->isr_wq, &hw->isr_worker);
167}
168
169static void iwm_sdio_rx_free(struct iwm_sdio_priv *hw)
170{
171 struct iwm_priv *iwm = hw_to_iwm(hw);
172
173 flush_workqueue(hw->isr_wq);
174
175 skb_queue_purge(&iwm->rx_list);
176}
177
178/* Bus ops */
179static int if_sdio_enable(struct iwm_priv *iwm)
180{
181 struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
182 int ret;
183
184 sdio_claim_host(hw->func);
185
186 ret = sdio_enable_func(hw->func);
187 if (ret) {
188 IWM_ERR(iwm, "Couldn't enable the device: is TOP driver "
189 "loaded and functional?\n");
190 goto release_host;
191 }
192
193 iwm_reset(iwm);
194
195 ret = sdio_claim_irq(hw->func, iwm_sdio_isr);
196 if (ret) {
197 IWM_ERR(iwm, "Failed to claim irq: %d\n", ret);
198 goto release_host;
199 }
200
201 sdio_writeb(hw->func, 1, IWM_SDIO_INTR_ENABLE_ADDR, &ret);
202 if (ret < 0) {
203 IWM_ERR(iwm, "Couldn't enable INTR: %d\n", ret);
204 goto release_irq;
205 }
206
207 sdio_release_host(hw->func);
208
209 IWM_DBG_SDIO(iwm, INFO, "IWM SDIO enable\n");
210
211 return 0;
212
213 release_irq:
214 sdio_release_irq(hw->func);
215 release_host:
216 sdio_release_host(hw->func);
217
218 return ret;
219}
220
221static int if_sdio_disable(struct iwm_priv *iwm)
222{
223 struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
224 int ret;
225
226 iwm_reset(iwm);
227
228 sdio_claim_host(hw->func);
229 sdio_writeb(hw->func, 0, IWM_SDIO_INTR_ENABLE_ADDR, &ret);
230 if (ret < 0)
231 IWM_WARN(iwm, "Couldn't disable INTR: %d\n", ret);
232
233 sdio_release_irq(hw->func);
234 sdio_disable_func(hw->func);
235 sdio_release_host(hw->func);
236
237 iwm_sdio_rx_free(hw);
238
239 IWM_DBG_SDIO(iwm, INFO, "IWM SDIO disable\n");
240
241 return 0;
242}
243
244static int if_sdio_send_chunk(struct iwm_priv *iwm, u8 *buf, int count)
245{
246 struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
247 int aligned_count = ALIGN(count, hw->blk_size);
248 int ret;
249
250 if ((unsigned long)buf & 0x3) {
251 IWM_ERR(iwm, "buf <%p> is not dword aligned\n", buf);
252 /* TODO: Is this a hardware limitation? use get_unligned */
253 return -EINVAL;
254 }
255
256 sdio_claim_host(hw->func);
257 ret = sdio_memcpy_toio(hw->func, IWM_SDIO_DATA_ADDR, buf,
258 aligned_count);
259 sdio_release_host(hw->func);
260
261 return ret;
262}
263
264/* debugfs hooks */
265static int iwm_debugfs_sdio_open(struct inode *inode, struct file *filp)
266{
267 filp->private_data = inode->i_private;
268 return 0;
269}
270
271static ssize_t iwm_debugfs_sdio_read(struct file *filp, char __user *buffer,
272 size_t count, loff_t *ppos)
273{
274 struct iwm_priv *iwm = filp->private_data;
275 struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
276 char *buf;
277 u8 cccr;
278 int buf_len = 4096, ret;
279 size_t len = 0;
280
281 if (*ppos != 0)
282 return 0;
283 if (count < sizeof(buf))
284 return -ENOSPC;
285
286 buf = kzalloc(buf_len, GFP_KERNEL);
287 if (!buf)
288 return -ENOMEM;
289
290 sdio_claim_host(hw->func);
291
292 cccr = sdio_f0_readb(hw->func, SDIO_CCCR_IOEx, &ret);
293 if (ret) {
294 IWM_ERR(iwm, "Could not read SDIO_CCCR_IOEx\n");
295 goto err;
296 }
297 len += snprintf(buf + len, buf_len - len, "CCCR_IOEx: 0x%x\n", cccr);
298
299 cccr = sdio_f0_readb(hw->func, SDIO_CCCR_IORx, &ret);
300 if (ret) {
301 IWM_ERR(iwm, "Could not read SDIO_CCCR_IORx\n");
302 goto err;
303 }
304 len += snprintf(buf + len, buf_len - len, "CCCR_IORx: 0x%x\n", cccr);
305
306
307 cccr = sdio_f0_readb(hw->func, SDIO_CCCR_IENx, &ret);
308 if (ret) {
309 IWM_ERR(iwm, "Could not read SDIO_CCCR_IENx\n");
310 goto err;
311 }
312 len += snprintf(buf + len, buf_len - len, "CCCR_IENx: 0x%x\n", cccr);
313
314
315 cccr = sdio_f0_readb(hw->func, SDIO_CCCR_INTx, &ret);
316 if (ret) {
317 IWM_ERR(iwm, "Could not read SDIO_CCCR_INTx\n");
318 goto err;
319 }
320 len += snprintf(buf + len, buf_len - len, "CCCR_INTx: 0x%x\n", cccr);
321
322
323 cccr = sdio_f0_readb(hw->func, SDIO_CCCR_ABORT, &ret);
324 if (ret) {
325 IWM_ERR(iwm, "Could not read SDIO_CCCR_ABORTx\n");
326 goto err;
327 }
328 len += snprintf(buf + len, buf_len - len, "CCCR_ABORT: 0x%x\n", cccr);
329
330 cccr = sdio_f0_readb(hw->func, SDIO_CCCR_IF, &ret);
331 if (ret) {
332 IWM_ERR(iwm, "Could not read SDIO_CCCR_IF\n");
333 goto err;
334 }
335 len += snprintf(buf + len, buf_len - len, "CCCR_IF: 0x%x\n", cccr);
336
337
338 cccr = sdio_f0_readb(hw->func, SDIO_CCCR_CAPS, &ret);
339 if (ret) {
340 IWM_ERR(iwm, "Could not read SDIO_CCCR_CAPS\n");
341 goto err;
342 }
343 len += snprintf(buf + len, buf_len - len, "CCCR_CAPS: 0x%x\n", cccr);
344
345 cccr = sdio_f0_readb(hw->func, SDIO_CCCR_CIS, &ret);
346 if (ret) {
347 IWM_ERR(iwm, "Could not read SDIO_CCCR_CIS\n");
348 goto err;
349 }
350 len += snprintf(buf + len, buf_len - len, "CCCR_CIS: 0x%x\n", cccr);
351
352 ret = simple_read_from_buffer(buffer, len, ppos, buf, buf_len);
353err:
354 sdio_release_host(hw->func);
355
356 kfree(buf);
357
358 return ret;
359}
360
361static const struct file_operations iwm_debugfs_sdio_fops = {
362 .owner = THIS_MODULE,
363 .open = iwm_debugfs_sdio_open,
364 .read = iwm_debugfs_sdio_read,
365};
366
367static int if_sdio_debugfs_init(struct iwm_priv *iwm, struct dentry *parent_dir)
368{
369 int result;
370 struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
371
372 hw->cccr_dentry = debugfs_create_file("cccr", 0200,
373 parent_dir, iwm,
374 &iwm_debugfs_sdio_fops);
375 result = PTR_ERR(hw->cccr_dentry);
376 if (IS_ERR(hw->cccr_dentry) && (result != -ENODEV)) {
377 IWM_ERR(iwm, "Couldn't create CCCR entry: %d\n", result);
378 return result;
379 }
380
381 return 0;
382}
383
384static void if_sdio_debugfs_exit(struct iwm_priv *iwm)
385{
386 struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
387
388 debugfs_remove(hw->cccr_dentry);
389}
390
391static struct iwm_if_ops if_sdio_ops = {
392 .enable = if_sdio_enable,
393 .disable = if_sdio_disable,
394 .send_chunk = if_sdio_send_chunk,
395 .debugfs_init = if_sdio_debugfs_init,
396 .debugfs_exit = if_sdio_debugfs_exit,
397 .umac_name = "iwmc3200wifi-umac-sdio.bin",
398 .calib_lmac_name = "iwmc3200wifi-lmac-calib-sdio.bin",
399 .lmac_name = "iwmc3200wifi-lmac-sdio.bin",
400};
401
402static int iwm_sdio_probe(struct sdio_func *func,
403 const struct sdio_device_id *id)
404{
405 struct iwm_priv *iwm;
406 struct iwm_sdio_priv *hw;
407 struct device *dev = &func->dev;
408 int ret;
409
410 /* check if TOP has already initialized the card */
411 sdio_claim_host(func);
412 ret = sdio_enable_func(func);
413 if (ret) {
414 dev_err(dev, "wait for TOP to enable the device\n");
415 sdio_release_host(func);
416 return ret;
417 }
418
419 ret = sdio_set_block_size(func, IWM_SDIO_BLK_SIZE);
420
421 sdio_disable_func(func);
422 sdio_release_host(func);
423
424 if (ret < 0) {
425 dev_err(dev, "Failed to set block size: %d\n", ret);
426 return ret;
427 }
428
429 iwm = iwm_if_alloc(sizeof(struct iwm_sdio_priv), dev, &if_sdio_ops);
430 if (IS_ERR(iwm)) {
431 dev_err(dev, "allocate SDIO interface failed\n");
432 return PTR_ERR(iwm);
433 }
434
435 hw = iwm_private(iwm);
436 hw->iwm = iwm;
437
438 ret = iwm_debugfs_init(iwm);
439 if (ret < 0) {
440 IWM_ERR(iwm, "Debugfs registration failed\n");
441 goto if_free;
442 }
443
444 sdio_set_drvdata(func, hw);
445
446 hw->func = func;
447 hw->blk_size = IWM_SDIO_BLK_SIZE;
448
449 hw->isr_wq = create_singlethread_workqueue(KBUILD_MODNAME "_sdio");
450 if (!hw->isr_wq) {
451 ret = -ENOMEM;
452 goto debugfs_exit;
453 }
454
455 INIT_WORK(&hw->isr_worker, iwm_sdio_isr_worker);
456
457 dev_info(dev, "IWM SDIO probe\n");
458
459 return 0;
460
461 debugfs_exit:
462 iwm_debugfs_exit(iwm);
463 if_free:
464 iwm_if_free(iwm);
465 return ret;
466}
467
468static void iwm_sdio_remove(struct sdio_func *func)
469{
470 struct iwm_sdio_priv *hw = sdio_get_drvdata(func);
471 struct iwm_priv *iwm = hw_to_iwm(hw);
472 struct device *dev = &func->dev;
473
474 iwm_debugfs_exit(iwm);
475 iwm_if_free(iwm);
476 destroy_workqueue(hw->isr_wq);
477
478 sdio_set_drvdata(func, NULL);
479
480 dev_info(dev, "IWM SDIO remove\n");
481
482 return;
483}
484
485static const struct sdio_device_id iwm_sdio_ids[] = {
486 { SDIO_DEVICE(SDIO_VENDOR_ID_INTEL, SDIO_DEVICE_ID_IWM) },
487 { /* end: all zeroes */ },
488};
489MODULE_DEVICE_TABLE(sdio, iwm_sdio_ids);
490
491static struct sdio_driver iwm_sdio_driver = {
492 .name = "iwm_sdio",
493 .id_table = iwm_sdio_ids,
494 .probe = iwm_sdio_probe,
495 .remove = iwm_sdio_remove,
496};
497
498static int __init iwm_sdio_init_module(void)
499{
500 int ret;
501
502 ret = sdio_register_driver(&iwm_sdio_driver);
503
504 return ret;
505}
506
507static void __exit iwm_sdio_exit_module(void)
508{
509 sdio_unregister_driver(&iwm_sdio_driver);
510}
511
512module_init(iwm_sdio_init_module);
513module_exit(iwm_sdio_exit_module);
514
515MODULE_LICENSE("GPL");
516MODULE_AUTHOR(IWM_COPYRIGHT " " IWM_AUTHOR);
diff --git a/drivers/net/wireless/iwmc3200wifi/sdio.h b/drivers/net/wireless/iwmc3200wifi/sdio.h
new file mode 100644
index 000000000000..b3c156b08dda
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/sdio.h
@@ -0,0 +1,67 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#ifndef __IWM_SDIO_H__
40#define __IWM_SDIO_H__
41
42#define SDIO_VENDOR_ID_INTEL 0x89
43#define SDIO_DEVICE_ID_IWM 0x1403
44
45#define IWM_SDIO_DATA_ADDR 0x0
46#define IWM_SDIO_INTR_ENABLE_ADDR 0x14
47#define IWM_SDIO_INTR_STATUS_ADDR 0x13
48#define IWM_SDIO_INTR_CLEAR_ADDR 0x13
49#define IWM_SDIO_INTR_GET_SIZE_ADDR 0x2C
50
51#define IWM_SDIO_BLK_SIZE 256
52
53#define iwm_to_if_sdio(i) (struct iwm_sdio_priv *)(iwm->private)
54
55struct iwm_sdio_priv {
56 struct sdio_func *func;
57 struct iwm_priv *iwm;
58
59 struct workqueue_struct *isr_wq;
60 struct work_struct isr_worker;
61
62 struct dentry *cccr_dentry;
63
64 unsigned int blk_size;
65};
66
67#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/tx.c b/drivers/net/wireless/iwmc3200wifi/tx.c
new file mode 100644
index 000000000000..e3b4f7902daf
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/tx.c
@@ -0,0 +1,492 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39/*
40 * iwm Tx theory of operation:
41 *
42 * 1) We receive a 802.3 frame from the stack
43 * 2) We convert it to a 802.11 frame [iwm_xmit_frame]
44 * 3) We queue it to its corresponding tx queue [iwm_xmit_frame]
45 * 4) We schedule the tx worker. There is one worker per tx
46 * queue. [iwm_xmit_frame]
47 * 5) The tx worker is scheduled
48 * 6) We go through every queued skb on the tx queue, and for each
49 * and every one of them: [iwm_tx_worker]
50 * a) We check if we have enough Tx credits (see below for a Tx
51 * credits description) for the frame length. [iwm_tx_worker]
52 * b) If we do, we aggregate the Tx frame into a UDMA one, by
53 * concatenating one REPLY_TX command per Tx frame. [iwm_tx_worker]
54 * c) When we run out of credits, or when we reach the maximum
55 * concatenation size, we actually send the concatenated UDMA
56 * frame. [iwm_tx_worker]
57 *
58 * When we run out of Tx credits, the skbs are filling the tx queue,
59 * and eventually we will stop the netdev queue. [iwm_tx_worker]
60 * The tx queue is emptied as we're getting new tx credits, by
61 * scheduling the tx_worker. [iwm_tx_credit_inc]
62 * The netdev queue is started again when we have enough tx credits,
63 * and when our tx queue has some reasonable amout of space available
64 * (i.e. half of the max size). [iwm_tx_worker]
65 */
66
67#include <linux/skbuff.h>
68#include <linux/netdevice.h>
69#include <linux/ieee80211.h>
70
71#include "iwm.h"
72#include "debug.h"
73#include "commands.h"
74#include "hal.h"
75#include "umac.h"
76#include "bus.h"
77
78#define IWM_UMAC_PAGE_ALLOC_WRAP 0xffff
79
80#define BYTES_TO_PAGES(n) (1 + ((n) >> ilog2(IWM_UMAC_PAGE_SIZE)) - \
81 (((n) & (IWM_UMAC_PAGE_SIZE - 1)) == 0))
82
83#define pool_id_to_queue(id) ((id < IWM_TX_CMD_QUEUE) ? id : id - 1)
84#define queue_to_pool_id(q) ((q < IWM_TX_CMD_QUEUE) ? q : q + 1)
85
86/* require to hold tx_credit lock */
87static int iwm_tx_credit_get(struct iwm_tx_credit *tx_credit, int id)
88{
89 struct pool_entry *pool = &tx_credit->pools[id];
90 struct spool_entry *spool = &tx_credit->spools[pool->sid];
91 int spool_pages;
92
93 /* number of pages can be taken from spool by this pool */
94 spool_pages = spool->max_pages - spool->alloc_pages +
95 max(pool->min_pages - pool->alloc_pages, 0);
96
97 return min(pool->max_pages - pool->alloc_pages, spool_pages);
98}
99
100static bool iwm_tx_credit_ok(struct iwm_priv *iwm, int id, int nb)
101{
102 u32 npages = BYTES_TO_PAGES(nb);
103
104 if (npages <= iwm_tx_credit_get(&iwm->tx_credit, id))
105 return 1;
106
107 set_bit(id, &iwm->tx_credit.full_pools_map);
108
109 IWM_DBG_TX(iwm, DBG, "LINK: stop txq[%d], available credit: %d\n",
110 pool_id_to_queue(id),
111 iwm_tx_credit_get(&iwm->tx_credit, id));
112
113 return 0;
114}
115
116void iwm_tx_credit_inc(struct iwm_priv *iwm, int id, int total_freed_pages)
117{
118 struct pool_entry *pool;
119 struct spool_entry *spool;
120 int freed_pages;
121 int queue;
122
123 BUG_ON(id >= IWM_MACS_OUT_GROUPS);
124
125 pool = &iwm->tx_credit.pools[id];
126 spool = &iwm->tx_credit.spools[pool->sid];
127
128 freed_pages = total_freed_pages - pool->total_freed_pages;
129 IWM_DBG_TX(iwm, DBG, "Free %d pages for pool[%d]\n", freed_pages, id);
130
131 if (!freed_pages) {
132 IWM_DBG_TX(iwm, DBG, "No pages are freed by UMAC\n");
133 return;
134 } else if (freed_pages < 0)
135 freed_pages += IWM_UMAC_PAGE_ALLOC_WRAP + 1;
136
137 if (pool->alloc_pages > pool->min_pages) {
138 int spool_pages = pool->alloc_pages - pool->min_pages;
139 spool_pages = min(spool_pages, freed_pages);
140 spool->alloc_pages -= spool_pages;
141 }
142
143 pool->alloc_pages -= freed_pages;
144 pool->total_freed_pages = total_freed_pages;
145
146 IWM_DBG_TX(iwm, DBG, "Pool[%d] pages alloc: %d, total_freed: %d, "
147 "Spool[%d] pages alloc: %d\n", id, pool->alloc_pages,
148 pool->total_freed_pages, pool->sid, spool->alloc_pages);
149
150 if (test_bit(id, &iwm->tx_credit.full_pools_map) &&
151 (pool->alloc_pages < pool->max_pages / 2)) {
152 clear_bit(id, &iwm->tx_credit.full_pools_map);
153
154 queue = pool_id_to_queue(id);
155
156 IWM_DBG_TX(iwm, DBG, "LINK: start txq[%d], available "
157 "credit: %d\n", queue,
158 iwm_tx_credit_get(&iwm->tx_credit, id));
159 queue_work(iwm->txq[queue].wq, &iwm->txq[queue].worker);
160 }
161}
162
163static void iwm_tx_credit_dec(struct iwm_priv *iwm, int id, int alloc_pages)
164{
165 struct pool_entry *pool;
166 struct spool_entry *spool;
167 int spool_pages;
168
169 IWM_DBG_TX(iwm, DBG, "Allocate %d pages for pool[%d]\n",
170 alloc_pages, id);
171
172 BUG_ON(id >= IWM_MACS_OUT_GROUPS);
173
174 pool = &iwm->tx_credit.pools[id];
175 spool = &iwm->tx_credit.spools[pool->sid];
176
177 spool_pages = pool->alloc_pages + alloc_pages - pool->min_pages;
178
179 if (pool->alloc_pages >= pool->min_pages)
180 spool->alloc_pages += alloc_pages;
181 else if (spool_pages > 0)
182 spool->alloc_pages += spool_pages;
183
184 pool->alloc_pages += alloc_pages;
185
186 IWM_DBG_TX(iwm, DBG, "Pool[%d] pages alloc: %d, total_freed: %d, "
187 "Spool[%d] pages alloc: %d\n", id, pool->alloc_pages,
188 pool->total_freed_pages, pool->sid, spool->alloc_pages);
189}
190
191int iwm_tx_credit_alloc(struct iwm_priv *iwm, int id, int nb)
192{
193 u32 npages = BYTES_TO_PAGES(nb);
194 int ret = 0;
195
196 spin_lock(&iwm->tx_credit.lock);
197
198 if (!iwm_tx_credit_ok(iwm, id, nb)) {
199 IWM_DBG_TX(iwm, DBG, "No credit avaliable for pool[%d]\n", id);
200 ret = -ENOSPC;
201 goto out;
202 }
203
204 iwm_tx_credit_dec(iwm, id, npages);
205
206 out:
207 spin_unlock(&iwm->tx_credit.lock);
208 return ret;
209}
210
211/*
212 * Since we're on an SDIO or USB bus, we are not sharing memory
213 * for storing to be transmitted frames. The host needs to push
214 * them upstream. As a consequence there needs to be a way for
215 * the target to let us know if it can actually take more TX frames
216 * or not. This is what Tx credits are for.
217 *
218 * For each Tx HW queue, we have a Tx pool, and then we have one
219 * unique super pool (spool), which is actually a global pool of
220 * all the UMAC pages.
221 * For each Tx pool we have a min_pages, a max_pages fields, and a
222 * alloc_pages fields. The alloc_pages tracks the number of pages
223 * currently allocated from the tx pool.
224 * Here are the rules to check if given a tx frame we have enough
225 * tx credits for it:
226 * 1) We translate the frame length into a number of UMAC pages.
227 * Let's call them n_pages.
228 * 2) For the corresponding tx pool, we check if n_pages +
229 * pool->alloc_pages is higher than pool->min_pages. min_pages
230 * represent a set of pre-allocated pages on the tx pool. If
231 * that's the case, then we need to allocate those pages from
232 * the spool. We can do so until we reach spool->max_pages.
233 * 3) Each tx pool is not allowed to allocate more than pool->max_pages
234 * from the spool, so once we're over min_pages, we can allocate
235 * pages from the spool, but not more than max_pages.
236 *
237 * When the tx code path needs to send a tx frame, it checks first
238 * if it has enough tx credits, following those rules. [iwm_tx_credit_get]
239 * If it does, it then updates the pool and spool counters and
240 * then send the frame. [iwm_tx_credit_alloc and iwm_tx_credit_dec]
241 * On the other side, when the UMAC is done transmitting frames, it
242 * will send a credit update notification to the host. This is when
243 * the pool and spool counters gets to be decreased. [iwm_tx_credit_inc,
244 * called from rx.c:iwm_ntf_tx_credit_update]
245 *
246 */
247void iwm_tx_credit_init_pools(struct iwm_priv *iwm,
248 struct iwm_umac_notif_alive *alive)
249{
250 int i, sid, pool_pages;
251
252 spin_lock(&iwm->tx_credit.lock);
253
254 iwm->tx_credit.pool_nr = le16_to_cpu(alive->page_grp_count);
255 iwm->tx_credit.full_pools_map = 0;
256 memset(&iwm->tx_credit.spools[0], 0, sizeof(struct spool_entry));
257
258 IWM_DBG_TX(iwm, DBG, "Pools number is %d\n", iwm->tx_credit.pool_nr);
259
260 for (i = 0; i < iwm->tx_credit.pool_nr; i++) {
261 __le32 page_grp_state = alive->page_grp_state[i];
262
263 iwm->tx_credit.pools[i].id = GET_VAL32(page_grp_state,
264 UMAC_ALIVE_PAGE_STS_GRP_NUM);
265 iwm->tx_credit.pools[i].sid = GET_VAL32(page_grp_state,
266 UMAC_ALIVE_PAGE_STS_SGRP_NUM);
267 iwm->tx_credit.pools[i].min_pages = GET_VAL32(page_grp_state,
268 UMAC_ALIVE_PAGE_STS_GRP_MIN_SIZE);
269 iwm->tx_credit.pools[i].max_pages = GET_VAL32(page_grp_state,
270 UMAC_ALIVE_PAGE_STS_GRP_MAX_SIZE);
271 iwm->tx_credit.pools[i].alloc_pages = 0;
272 iwm->tx_credit.pools[i].total_freed_pages = 0;
273
274 sid = iwm->tx_credit.pools[i].sid;
275 pool_pages = iwm->tx_credit.pools[i].min_pages;
276
277 if (iwm->tx_credit.spools[sid].max_pages == 0) {
278 iwm->tx_credit.spools[sid].id = sid;
279 iwm->tx_credit.spools[sid].max_pages =
280 GET_VAL32(page_grp_state,
281 UMAC_ALIVE_PAGE_STS_SGRP_MAX_SIZE);
282 iwm->tx_credit.spools[sid].alloc_pages = 0;
283 }
284
285 iwm->tx_credit.spools[sid].alloc_pages += pool_pages;
286
287 IWM_DBG_TX(iwm, DBG, "Pool idx: %d, id: %d, sid: %d, capacity "
288 "min: %d, max: %d, pool alloc: %d, total_free: %d, "
289 "super poll alloc: %d\n",
290 i, iwm->tx_credit.pools[i].id,
291 iwm->tx_credit.pools[i].sid,
292 iwm->tx_credit.pools[i].min_pages,
293 iwm->tx_credit.pools[i].max_pages,
294 iwm->tx_credit.pools[i].alloc_pages,
295 iwm->tx_credit.pools[i].total_freed_pages,
296 iwm->tx_credit.spools[sid].alloc_pages);
297 }
298
299 spin_unlock(&iwm->tx_credit.lock);
300}
301
302#define IWM_UDMA_HDR_LEN sizeof(struct iwm_umac_wifi_out_hdr)
303
304static int iwm_tx_build_packet(struct iwm_priv *iwm, struct sk_buff *skb,
305 int pool_id, u8 *buf)
306{
307 struct iwm_umac_wifi_out_hdr *hdr = (struct iwm_umac_wifi_out_hdr *)buf;
308 struct iwm_udma_wifi_cmd udma_cmd;
309 struct iwm_umac_cmd umac_cmd;
310 struct iwm_tx_info *tx_info = skb_to_tx_info(skb);
311
312 udma_cmd.count = cpu_to_le16(skb->len +
313 sizeof(struct iwm_umac_fw_cmd_hdr));
314 /* set EOP to 0 here. iwm_udma_wifi_hdr_set_eop() will be
315 * called later to set EOP for the last packet. */
316 udma_cmd.eop = 0;
317 udma_cmd.credit_group = pool_id;
318 udma_cmd.ra_tid = tx_info->sta << 4 | tx_info->tid;
319 udma_cmd.lmac_offset = 0;
320
321 umac_cmd.id = REPLY_TX;
322 umac_cmd.count = cpu_to_le16(skb->len);
323 umac_cmd.color = tx_info->color;
324 umac_cmd.resp = 0;
325 umac_cmd.seq_num = cpu_to_le16(iwm_alloc_wifi_cmd_seq(iwm));
326
327 iwm_build_udma_wifi_hdr(iwm, &hdr->hw_hdr, &udma_cmd);
328 iwm_build_umac_hdr(iwm, &hdr->sw_hdr, &umac_cmd);
329
330 memcpy(buf + sizeof(*hdr), skb->data, skb->len);
331
332 return 0;
333}
334
335static int iwm_tx_send_concat_packets(struct iwm_priv *iwm,
336 struct iwm_tx_queue *txq)
337{
338 int ret;
339
340 if (!txq->concat_count)
341 return 0;
342
343 IWM_DBG_TX(iwm, DBG, "Send concatenated Tx: queue %d, %d bytes\n",
344 txq->id, txq->concat_count);
345
346 /* mark EOP for the last packet */
347 iwm_udma_wifi_hdr_set_eop(iwm, txq->concat_ptr, 1);
348
349 ret = iwm_bus_send_chunk(iwm, txq->concat_buf, txq->concat_count);
350
351 txq->concat_count = 0;
352 txq->concat_ptr = txq->concat_buf;
353
354 return ret;
355}
356
357#define CONFIG_IWM_TX_CONCATENATED 1
358
359void iwm_tx_worker(struct work_struct *work)
360{
361 struct iwm_priv *iwm;
362 struct iwm_tx_info *tx_info = NULL;
363 struct sk_buff *skb;
364 int cmdlen, ret;
365 struct iwm_tx_queue *txq;
366 int pool_id;
367
368 txq = container_of(work, struct iwm_tx_queue, worker);
369 iwm = container_of(txq, struct iwm_priv, txq[txq->id]);
370
371 pool_id = queue_to_pool_id(txq->id);
372
373 while (!test_bit(pool_id, &iwm->tx_credit.full_pools_map) &&
374 !skb_queue_empty(&txq->queue)) {
375
376 skb = skb_dequeue(&txq->queue);
377 tx_info = skb_to_tx_info(skb);
378 cmdlen = IWM_UDMA_HDR_LEN + skb->len;
379
380 IWM_DBG_TX(iwm, DBG, "Tx frame on queue %d: skb: 0x%p, sta: "
381 "%d, color: %d\n", txq->id, skb, tx_info->sta,
382 tx_info->color);
383
384#if !CONFIG_IWM_TX_CONCATENATED
385 /* temporarily keep this to comparing the performance */
386 ret = iwm_send_packet(iwm, skb, pool_id);
387#else
388
389 if (txq->concat_count + cmdlen > IWM_HAL_CONCATENATE_BUF_SIZE)
390 iwm_tx_send_concat_packets(iwm, txq);
391
392 ret = iwm_tx_credit_alloc(iwm, pool_id, cmdlen);
393 if (ret) {
394 IWM_DBG_TX(iwm, DBG, "not enough tx_credit for queue "
395 "%d, Tx worker stopped\n", txq->id);
396 skb_queue_head(&txq->queue, skb);
397 break;
398 }
399
400 txq->concat_ptr = txq->concat_buf + txq->concat_count;
401 iwm_tx_build_packet(iwm, skb, pool_id, txq->concat_ptr);
402 txq->concat_count += ALIGN(cmdlen, 16);
403#endif
404 kfree_skb(skb);
405 }
406
407 iwm_tx_send_concat_packets(iwm, txq);
408
409 if (__netif_subqueue_stopped(iwm_to_ndev(iwm), txq->id) &&
410 !test_bit(pool_id, &iwm->tx_credit.full_pools_map) &&
411 (skb_queue_len(&txq->queue) < IWM_TX_LIST_SIZE / 2)) {
412 IWM_DBG_TX(iwm, DBG, "LINK: start netif_subqueue[%d]", txq->id);
413 netif_wake_subqueue(iwm_to_ndev(iwm), txq->id);
414 }
415}
416
417int iwm_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
418{
419 struct iwm_priv *iwm = ndev_to_iwm(netdev);
420 struct net_device *ndev = iwm_to_ndev(iwm);
421 struct wireless_dev *wdev = iwm_to_wdev(iwm);
422 u8 *dst_addr;
423 struct iwm_tx_info *tx_info;
424 struct iwm_tx_queue *txq;
425 struct iwm_sta_info *sta_info;
426 u8 sta_id;
427 u16 queue;
428 int ret;
429
430 if (!test_bit(IWM_STATUS_ASSOCIATED, &iwm->status)) {
431 IWM_DBG_TX(iwm, DBG, "LINK: stop netif_all_queues: "
432 "not associated\n");
433 netif_tx_stop_all_queues(netdev);
434 goto drop;
435 }
436
437 queue = skb_get_queue_mapping(skb);
438 BUG_ON(queue >= IWM_TX_DATA_QUEUES); /* no iPAN yet */
439
440 txq = &iwm->txq[queue];
441
442 /* No free space for Tx, tx_worker is too slow */
443 if (skb_queue_len(&txq->queue) > IWM_TX_LIST_SIZE) {
444 IWM_DBG_TX(iwm, DBG, "LINK: stop netif_subqueue[%d]\n", queue);
445 netif_stop_subqueue(netdev, queue);
446 return NETDEV_TX_BUSY;
447 }
448
449 ret = ieee80211_data_from_8023(skb, netdev->dev_addr, wdev->iftype,
450 iwm->bssid, 0);
451 if (ret) {
452 IWM_ERR(iwm, "build wifi header failed\n");
453 goto drop;
454 }
455
456 dst_addr = ((struct ieee80211_hdr *)(skb->data))->addr1;
457
458 for (sta_id = 0; sta_id < IWM_STA_TABLE_NUM; sta_id++) {
459 sta_info = &iwm->sta_table[sta_id];
460 if (sta_info->valid &&
461 !memcmp(dst_addr, sta_info->addr, ETH_ALEN))
462 break;
463 }
464
465 if (sta_id == IWM_STA_TABLE_NUM) {
466 IWM_ERR(iwm, "STA %pM not found in sta_table, Tx ignored\n",
467 dst_addr);
468 goto drop;
469 }
470
471 tx_info = skb_to_tx_info(skb);
472 tx_info->sta = sta_id;
473 tx_info->color = sta_info->color;
474 /* UMAC uses TID 8 (vs. 0) for non QoS packets */
475 if (sta_info->qos)
476 tx_info->tid = skb->priority;
477 else
478 tx_info->tid = IWM_UMAC_MGMT_TID;
479
480 skb_queue_tail(&iwm->txq[queue].queue, skb);
481
482 queue_work(iwm->txq[queue].wq, &iwm->txq[queue].worker);
483
484 ndev->stats.tx_packets++;
485 ndev->stats.tx_bytes += skb->len;
486 return NETDEV_TX_OK;
487
488 drop:
489 ndev->stats.tx_dropped++;
490 dev_kfree_skb_any(skb);
491 return NETDEV_TX_OK;
492}
diff --git a/drivers/net/wireless/iwmc3200wifi/umac.h b/drivers/net/wireless/iwmc3200wifi/umac.h
new file mode 100644
index 000000000000..4a95cce1f0a6
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/umac.h
@@ -0,0 +1,744 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 * Intel Corporation <ilw@linux.intel.com>
34 * Samuel Ortiz <samuel.ortiz@intel.com>
35 * Zhu Yi <yi.zhu@intel.com>
36 *
37 */
38
39#ifndef __IWM_UMAC_H__
40#define __IWM_UMAC_H__
41
42struct iwm_udma_in_hdr {
43 __le32 cmd;
44 __le32 size;
45} __attribute__ ((packed));
46
47struct iwm_udma_out_nonwifi_hdr {
48 __le32 cmd;
49 __le32 addr;
50 __le32 op1_sz;
51 __le32 op2;
52} __attribute__ ((packed));
53
54struct iwm_udma_out_wifi_hdr {
55 __le32 cmd;
56 __le32 meta_data;
57} __attribute__ ((packed));
58
59/* Sequence numbering */
60#define UMAC_WIFI_SEQ_NUM_BASE 1
61#define UMAC_WIFI_SEQ_NUM_MAX 0x4000
62#define UMAC_NONWIFI_SEQ_NUM_BASE 1
63#define UMAC_NONWIFI_SEQ_NUM_MAX 0x10
64
65/* MAC address address */
66#define WICO_MAC_ADDRESS_ADDR 0x604008F8
67
68/* RA / TID */
69#define UMAC_HDI_ACT_TBL_IDX_TID_POS 0
70#define UMAC_HDI_ACT_TBL_IDX_TID_SEED 0xF
71
72#define UMAC_HDI_ACT_TBL_IDX_RA_POS 4
73#define UMAC_HDI_ACT_TBL_IDX_RA_SEED 0xF
74
75#define UMAC_HDI_ACT_TBL_IDX_RA_UMAC 0xF
76#define UMAC_HDI_ACT_TBL_IDX_TID_UMAC 0x9
77#define UMAC_HDI_ACT_TBL_IDX_TID_LMAC 0xA
78
79#define UMAC_HDI_ACT_TBL_IDX_HOST_CMD \
80 ((UMAC_HDI_ACT_TBL_IDX_RA_UMAC << UMAC_HDI_ACT_TBL_IDX_RA_POS) |\
81 (UMAC_HDI_ACT_TBL_IDX_TID_UMAC << UMAC_HDI_ACT_TBL_IDX_TID_POS))
82#define UMAC_HDI_ACT_TBL_IDX_UMAC_CMD \
83 ((UMAC_HDI_ACT_TBL_IDX_RA_UMAC << UMAC_HDI_ACT_TBL_IDX_RA_POS) |\
84 (UMAC_HDI_ACT_TBL_IDX_TID_LMAC << UMAC_HDI_ACT_TBL_IDX_TID_POS))
85
86/* iwm_umac_notif_alive.page_grp_state Group number -- bits [3:0] */
87#define UMAC_ALIVE_PAGE_STS_GRP_NUM_POS 0
88#define UMAC_ALIVE_PAGE_STS_GRP_NUM_SEED 0xF
89
90/* iwm_umac_notif_alive.page_grp_state Super group number -- bits [7:4] */
91#define UMAC_ALIVE_PAGE_STS_SGRP_NUM_POS 4
92#define UMAC_ALIVE_PAGE_STS_SGRP_NUM_SEED 0xF
93
94/* iwm_umac_notif_alive.page_grp_state Group min size -- bits [15:8] */
95#define UMAC_ALIVE_PAGE_STS_GRP_MIN_SIZE_POS 8
96#define UMAC_ALIVE_PAGE_STS_GRP_MIN_SIZE_SEED 0xFF
97
98/* iwm_umac_notif_alive.page_grp_state Group max size -- bits [23:16] */
99#define UMAC_ALIVE_PAGE_STS_GRP_MAX_SIZE_POS 16
100#define UMAC_ALIVE_PAGE_STS_GRP_MAX_SIZE_SEED 0xFF
101
102/* iwm_umac_notif_alive.page_grp_state Super group max size -- bits [31:24] */
103#define UMAC_ALIVE_PAGE_STS_SGRP_MAX_SIZE_POS 24
104#define UMAC_ALIVE_PAGE_STS_SGRP_MAX_SIZE_SEED 0xFF
105
106/* Barkers */
107#define UMAC_REBOOT_BARKER 0xdeadbeef
108#define UMAC_ACK_BARKER 0xfeedbabe
109#define UMAC_PAD_TERMINAL 0xadadadad
110
111/* UMAC JMP address */
112#define UMAC_MU_FW_INST_DATA_12_ADDR 0xBF0000
113
114/* iwm_umac_hdi_out_hdr.cmd OP code -- bits [3:0] */
115#define UMAC_HDI_OUT_CMD_OPCODE_POS 0
116#define UMAC_HDI_OUT_CMD_OPCODE_SEED 0xF
117
118/* iwm_umac_hdi_out_hdr.cmd End-Of-Transfer -- bits [10:10] */
119#define UMAC_HDI_OUT_CMD_EOT_POS 10
120#define UMAC_HDI_OUT_CMD_EOT_SEED 0x1
121
122/* iwm_umac_hdi_out_hdr.cmd UTFD only usage -- bits [11:11] */
123#define UMAC_HDI_OUT_CMD_UTFD_ONLY_POS 11
124#define UMAC_HDI_OUT_CMD_UTFD_ONLY_SEED 0x1
125
126/* iwm_umac_hdi_out_hdr.cmd Non-WiFi HW sequence number -- bits [12:15] */
127#define UDMA_HDI_OUT_CMD_NON_WIFI_HW_SEQ_NUM_POS 12
128#define UDMA_HDI_OUT_CMD_NON_WIFI_HW_SEQ_NUM_SEED 0xF
129
130/* iwm_umac_hdi_out_hdr.cmd Signature -- bits [31:16] */
131#define UMAC_HDI_OUT_CMD_SIGNATURE_POS 16
132#define UMAC_HDI_OUT_CMD_SIGNATURE_SEED 0xFFFF
133
134/* iwm_umac_hdi_out_hdr.meta_data Byte count -- bits [11:0] */
135#define UMAC_HDI_OUT_BYTE_COUNT_POS 0
136#define UMAC_HDI_OUT_BYTE_COUNT_SEED 0xFFF
137
138/* iwm_umac_hdi_out_hdr.meta_data Credit group -- bits [15:12] */
139#define UMAC_HDI_OUT_CREDIT_GRP_POS 12
140#define UMAC_HDI_OUT_CREDIT_GRP_SEED 0xF
141
142/* iwm_umac_hdi_out_hdr.meta_data RA/TID -- bits [23:16] */
143#define UMAC_HDI_OUT_RATID_POS 16
144#define UMAC_HDI_OUT_RATID_SEED 0xFF
145
146/* iwm_umac_hdi_out_hdr.meta_data LMAC offset -- bits [31:24] */
147#define UMAC_HDI_OUT_LMAC_OFFSET_POS 24
148#define UMAC_HDI_OUT_LMAC_OFFSET_SEED 0xFF
149
150/* Signature */
151#define UMAC_HDI_OUT_SIGNATURE 0xCBBC
152
153/* buffer alignment */
154#define UMAC_HDI_BUF_ALIGN_MSK 0xF
155
156/* iwm_umac_hdi_in_hdr.cmd OP code -- bits [3:0] */
157#define UMAC_HDI_IN_CMD_OPCODE_POS 0
158#define UMAC_HDI_IN_CMD_OPCODE_SEED 0xF
159
160/* iwm_umac_hdi_in_hdr.cmd Non-WiFi API response -- bits [6:4] */
161#define UMAC_HDI_IN_CMD_NON_WIFI_RESP_POS 4
162#define UMAC_HDI_IN_CMD_NON_WIFI_RESP_SEED 0x7
163
164/* iwm_umac_hdi_in_hdr.cmd WiFi API source -- bits [5:4] */
165#define UMAC_HDI_IN_CMD_SOURCE_POS 4
166#define UMAC_HDI_IN_CMD_SOURCE_SEED 0x3
167
168/* iwm_umac_hdi_in_hdr.cmd WiFi API EOT -- bits [6:6] */
169#define UMAC_HDI_IN_CMD_EOT_POS 6
170#define UMAC_HDI_IN_CMD_EOT_SEED 0x1
171
172/* iwm_umac_hdi_in_hdr.cmd timestamp present -- bits [7:7] */
173#define UMAC_HDI_IN_CMD_TIME_STAMP_PRESENT_POS 7
174#define UMAC_HDI_IN_CMD_TIME_STAMP_PRESENT_SEED 0x1
175
176/* iwm_umac_hdi_in_hdr.cmd WiFi Non-last AMSDU -- bits [8:8] */
177#define UMAC_HDI_IN_CMD_NON_LAST_AMSDU_POS 8
178#define UMAC_HDI_IN_CMD_NON_LAST_AMSDU_SEED 0x1
179
180/* iwm_umac_hdi_in_hdr.cmd WiFi HW sequence number -- bits [31:9] */
181#define UMAC_HDI_IN_CMD_HW_SEQ_NUM_POS 9
182#define UMAC_HDI_IN_CMD_HW_SEQ_NUM_SEED 0x7FFFFF
183
184/* iwm_umac_hdi_in_hdr.cmd Non-WiFi HW sequence number -- bits [12:15] */
185#define UDMA_HDI_IN_CMD_NON_WIFI_HW_SEQ_NUM_POS 12
186#define UDMA_HDI_IN_CMD_NON_WIFI_HW_SEQ_NUM_SEED 0xF
187
188/* iwm_umac_hdi_in_hdr.cmd Non-WiFi HW signature -- bits [16:31] */
189#define UDMA_HDI_IN_CMD_NON_WIFI_HW_SIG_POS 16
190#define UDMA_HDI_IN_CMD_NON_WIFI_HW_SIG_SEED 0xFFFF
191
192/* Fixed Non-WiFi signature */
193#define UDMA_HDI_IN_CMD_NON_WIFI_HW_SIG 0xCBBC
194
195/* IN NTFY op-codes */
196#define UMAC_NOTIFY_OPCODE_ALIVE 0xA1
197#define UMAC_NOTIFY_OPCODE_INIT_COMPLETE 0xA2
198#define UMAC_NOTIFY_OPCODE_WIFI_CORE_STATUS 0xA3
199#define UMAC_NOTIFY_OPCODE_ERROR 0xA4
200#define UMAC_NOTIFY_OPCODE_DEBUG 0xA5
201#define UMAC_NOTIFY_OPCODE_WIFI_IF_WRAPPER 0xB0
202#define UMAC_NOTIFY_OPCODE_STATS 0xB1
203#define UMAC_NOTIFY_OPCODE_PAGE_DEALLOC 0xB3
204#define UMAC_NOTIFY_OPCODE_RX_TICKET 0xB4
205#define UMAC_NOTIFY_OPCODE_MAX (UMAC_NOTIFY_OPCODE_RX_TICKET -\
206 UMAC_NOTIFY_OPCODE_ALIVE + 1)
207#define UMAC_NOTIFY_OPCODE_FIRST (UMAC_NOTIFY_OPCODE_ALIVE)
208
209/* HDI OUT OP CODE */
210#define UMAC_HDI_OUT_OPCODE_PING 0x0
211#define UMAC_HDI_OUT_OPCODE_READ 0x1
212#define UMAC_HDI_OUT_OPCODE_WRITE 0x2
213#define UMAC_HDI_OUT_OPCODE_JUMP 0x3
214#define UMAC_HDI_OUT_OPCODE_REBOOT 0x4
215#define UMAC_HDI_OUT_OPCODE_WRITE_PERSISTENT 0x5
216#define UMAC_HDI_OUT_OPCODE_READ_PERSISTENT 0x6
217#define UMAC_HDI_OUT_OPCODE_READ_MODIFY_WRITE 0x7
218/* #define UMAC_HDI_OUT_OPCODE_RESERVED 0x8..0xA */
219#define UMAC_HDI_OUT_OPCODE_WRITE_AUX_REG 0xB
220#define UMAC_HDI_OUT_OPCODE_WIFI 0xF
221
222/* HDI IN OP CODE -- Non WiFi*/
223#define UMAC_HDI_IN_OPCODE_PING 0x0
224#define UMAC_HDI_IN_OPCODE_READ 0x1
225#define UMAC_HDI_IN_OPCODE_WRITE 0x2
226#define UMAC_HDI_IN_OPCODE_WRITE_PERSISTENT 0x5
227#define UMAC_HDI_IN_OPCODE_READ_PERSISTENT 0x6
228#define UMAC_HDI_IN_OPCODE_READ_MODIFY_WRITE 0x7
229#define UMAC_HDI_IN_OPCODE_EP_MGMT 0x8
230#define UMAC_HDI_IN_OPCODE_CREDIT_CHANGE 0x9
231#define UMAC_HDI_IN_OPCODE_CTRL_DATABASE 0xA
232#define UMAC_HDI_IN_OPCODE_WRITE_AUX_REG 0xB
233#define UMAC_HDI_IN_OPCODE_NONWIFI_MAX \
234 (UMAC_HDI_IN_OPCODE_WRITE_AUX_REG + 1)
235#define UMAC_HDI_IN_OPCODE_WIFI 0xF
236
237/* HDI IN SOURCE */
238#define UMAC_HDI_IN_SOURCE_FHRX 0x0
239#define UMAC_HDI_IN_SOURCE_UDMA 0x1
240#define UMAC_HDI_IN_SOURCE_FW 0x2
241#define UMAC_HDI_IN_SOURCE_RESERVED 0x3
242
243/* OUT CMD op-codes */
244#define UMAC_CMD_OPCODE_ECHO 0x01
245#define UMAC_CMD_OPCODE_HALT 0x02
246#define UMAC_CMD_OPCODE_RESET 0x03
247#define UMAC_CMD_OPCODE_BULK_EP_INACT_TIMEOUT 0x09
248#define UMAC_CMD_OPCODE_URB_CANCEL_ACK 0x0A
249#define UMAC_CMD_OPCODE_DCACHE_FLUSH 0x0B
250#define UMAC_CMD_OPCODE_EEPROM_PROXY 0x0C
251#define UMAC_CMD_OPCODE_TX_ECHO 0x0D
252#define UMAC_CMD_OPCODE_DBG_MON 0x0E
253#define UMAC_CMD_OPCODE_INTERNAL_TX 0x0F
254#define UMAC_CMD_OPCODE_SET_PARAM_FIX 0x10
255#define UMAC_CMD_OPCODE_SET_PARAM_VAR 0x11
256#define UMAC_CMD_OPCODE_GET_PARAM 0x12
257#define UMAC_CMD_OPCODE_DBG_EVENT_WRAPPER 0x13
258#define UMAC_CMD_OPCODE_TARGET 0x14
259#define UMAC_CMD_OPCODE_STATISTIC_REQUEST 0x15
260#define UMAC_CMD_OPCODE_GET_CHAN_INFO_LIST 0x16
261#define UMAC_CMD_OPCODE_SET_PARAM_LIST 0x17
262#define UMAC_CMD_OPCODE_GET_PARAM_LIST 0x18
263#define UMAC_CMD_OPCODE_BASE_WRAPPER 0xFA
264#define UMAC_CMD_OPCODE_LMAC_WRAPPER 0xFB
265#define UMAC_CMD_OPCODE_HW_TEST_WRAPPER 0xFC
266#define UMAC_CMD_OPCODE_WIFI_IF_WRAPPER 0xFD
267#define UMAC_CMD_OPCODE_WIFI_WRAPPER 0xFE
268#define UMAC_CMD_OPCODE_WIFI_PASS_THROUGH 0xFF
269
270/* UMAC WiFi interface op-codes */
271#define UMAC_WIFI_IF_CMD_SET_PROFILE 0x11
272#define UMAC_WIFI_IF_CMD_INVALIDATE_PROFILE 0x12
273#define UMAC_WIFI_IF_CMD_SET_EXCLUDE_LIST 0x13
274#define UMAC_WIFI_IF_CMD_SCAN_REQUEST 0x14
275#define UMAC_WIFI_IF_CMD_SCAN_CONFIG 0x15
276#define UMAC_WIFI_IF_CMD_ADD_WEP40_KEY 0x16
277#define UMAC_WIFI_IF_CMD_ADD_WEP104_KEY 0x17
278#define UMAC_WIFI_IF_CMD_ADD_TKIP_KEY 0x18
279#define UMAC_WIFI_IF_CMD_ADD_CCMP_KEY 0x19
280#define UMAC_WIFI_IF_CMD_REMOVE_KEY 0x1A
281#define UMAC_WIFI_IF_CMD_GLOBAL_TX_KEY_ID 0x1B
282#define UMAC_WIFI_IF_CMD_SET_HOST_EXTENDED_IE 0x1C
283#define UMAC_WIFI_IF_CMD_GET_SUPPORTED_CHANNELS 0x1E
284#define UMAC_WIFI_IF_CMD_TX_PWR_TRIGGER 0x20
285
286/* UMAC WiFi interface ports */
287#define UMAC_WIFI_IF_FLG_PORT_DEF 0x00
288#define UMAC_WIFI_IF_FLG_PORT_PAN 0x01
289#define UMAC_WIFI_IF_FLG_PORT_PAN_INVALID WIFI_IF_FLG_PORT_DEF
290
291/* UMAC WiFi interface actions */
292#define UMAC_WIFI_IF_FLG_ACT_GET 0x10
293#define UMAC_WIFI_IF_FLG_ACT_SET 0x20
294
295/* iwm_umac_fw_cmd_hdr.meta_data byte count -- bits [11:0] */
296#define UMAC_FW_CMD_BYTE_COUNT_POS 0
297#define UMAC_FW_CMD_BYTE_COUNT_SEED 0xFFF
298
299/* iwm_umac_fw_cmd_hdr.meta_data status -- bits [15:12] */
300#define UMAC_FW_CMD_STATUS_POS 12
301#define UMAC_FW_CMD_STATUS_SEED 0xF
302
303/* iwm_umac_fw_cmd_hdr.meta_data full TX command by Driver -- bits [16:16] */
304#define UMAC_FW_CMD_TX_DRV_FULL_CMD_POS 16
305#define UMAC_FW_CMD_TX_DRV_FULL_CMD_SEED 0x1
306
307/* iwm_umac_fw_cmd_hdr.meta_data TX command by FW -- bits [17:17] */
308#define UMAC_FW_CMD_TX_FW_CMD_POS 17
309#define UMAC_FW_CMD_TX_FW_CMD_SEED 0x1
310
311/* iwm_umac_fw_cmd_hdr.meta_data TX plaintext mode -- bits [18:18] */
312#define UMAC_FW_CMD_TX_PLAINTEXT_POS 18
313#define UMAC_FW_CMD_TX_PLAINTEXT_SEED 0x1
314
315/* iwm_umac_fw_cmd_hdr.meta_data STA color -- bits [22:20] */
316#define UMAC_FW_CMD_TX_STA_COLOR_POS 20
317#define UMAC_FW_CMD_TX_STA_COLOR_SEED 0x7
318
319/* iwm_umac_fw_cmd_hdr.meta_data TX life time (TU) -- bits [31:24] */
320#define UMAC_FW_CMD_TX_LIFETIME_TU_POS 24
321#define UMAC_FW_CMD_TX_LIFETIME_TU_SEED 0xFF
322
323/* iwm_dev_cmd_hdr.flags Response required -- bits [5:5] */
324#define UMAC_DEV_CMD_FLAGS_RESP_REQ_POS 5
325#define UMAC_DEV_CMD_FLAGS_RESP_REQ_SEED 0x1
326
327/* iwm_dev_cmd_hdr.flags Aborted command -- bits [6:6] */
328#define UMAC_DEV_CMD_FLAGS_ABORT_POS 6
329#define UMAC_DEV_CMD_FLAGS_ABORT_SEED 0x1
330
331/* iwm_dev_cmd_hdr.flags Internal command -- bits [7:7] */
332#define DEV_CMD_FLAGS_FLD_INTERNAL_POS 7
333#define DEV_CMD_FLAGS_FLD_INTERNAL_SEED 0x1
334
335/* Rx */
336/* Rx actions */
337#define IWM_RX_TICKET_DROP 0x0
338#define IWM_RX_TICKET_RELEASE 0x1
339#define IWM_RX_TICKET_SNIFFER 0x2
340#define IWM_RX_TICKET_ENQUEUE 0x3
341
342/* Rx flags */
343#define IWM_RX_TICKET_PAD_SIZE_MSK 0x2
344#define IWM_RX_TICKET_SPECIAL_SNAP_MSK 0x4
345#define IWM_RX_TICKET_AMSDU_MSK 0x8
346#define IWM_RX_TICKET_DROP_REASON_POS 4
347#define IWM_RX_TICKET_DROP_REASON_MSK (0x1F << RX_TICKET_FLAGS_DROP_REASON_POS)
348
349#define IWM_RX_DROP_NO_DROP 0x0
350#define IWM_RX_DROP_BAD_CRC 0x1
351/* L2P no address match */
352#define IWM_RX_DROP_LMAC_ADDR_FILTER 0x2
353/* Multicast address not in list */
354#define IWM_RX_DROP_MCAST_ADDR_FILTER 0x3
355/* Control frames are not sent to the driver */
356#define IWM_RX_DROP_CTL_FRAME 0x4
357/* Our frame is back */
358#define IWM_RX_DROP_OUR_TX 0x5
359/* Association class filtering */
360#define IWM_RX_DROP_CLASS_FILTER 0x6
361/* Duplicated frame */
362#define IWM_RX_DROP_DUPLICATE_FILTER 0x7
363/* Decryption error */
364#define IWM_RX_DROP_SEC_ERR 0x8
365/* Unencrypted frame while encryption is on */
366#define IWM_RX_DROP_SEC_NO_ENCRYPTION 0x9
367/* Replay check failure */
368#define IWM_RX_DROP_SEC_REPLAY_ERR 0xa
369/* uCode and FW key color mismatch, check before replay */
370#define IWM_RX_DROP_SEC_KEY_COLOR_MISMATCH 0xb
371#define IWM_RX_DROP_SEC_TKIP_COUNTER_MEASURE 0xc
372/* No fragmentations Db is found */
373#define IWM_RX_DROP_FRAG_NO_RESOURCE 0xd
374/* Fragmention Db has seqCtl mismatch Vs. non-1st frag */
375#define IWM_RX_DROP_FRAG_ERR 0xe
376#define IWM_RX_DROP_FRAG_LOST 0xf
377#define IWM_RX_DROP_FRAG_COMPLETE 0x10
378/* Should be handled by UMAC */
379#define IWM_RX_DROP_MANAGEMENT 0x11
380/* STA not found by UMAC */
381#define IWM_RX_DROP_NO_STATION 0x12
382/* NULL or QoS NULL */
383#define IWM_RX_DROP_NULL_DATA 0x13
384#define IWM_RX_DROP_BA_REORDER_OLD_SEQCTL 0x14
385#define IWM_RX_DROP_BA_REORDER_DUPLICATE 0x15
386
387struct iwm_rx_ticket {
388 __le16 action;
389 __le16 id;
390 __le16 flags;
391 u8 payload_offset; /* includes: MAC header, pad, IV */
392 u8 tail_len; /* includes: MIC, ICV, CRC (w/o STATUS) */
393} __attribute__ ((packed));
394
395struct iwm_rx_mpdu_hdr {
396 __le16 len;
397 __le16 reserved;
398} __attribute__ ((packed));
399
400/* UMAC SW WIFI API */
401
402struct iwm_dev_cmd_hdr {
403 u8 cmd;
404 u8 flags;
405 __le16 seq_num;
406} __attribute__ ((packed));
407
408struct iwm_umac_fw_cmd_hdr {
409 __le32 meta_data;
410 struct iwm_dev_cmd_hdr cmd;
411} __attribute__ ((packed));
412
413struct iwm_umac_wifi_out_hdr {
414 struct iwm_udma_out_wifi_hdr hw_hdr;
415 struct iwm_umac_fw_cmd_hdr sw_hdr;
416} __attribute__ ((packed));
417
418struct iwm_umac_nonwifi_out_hdr {
419 struct iwm_udma_out_nonwifi_hdr hw_hdr;
420} __attribute__ ((packed));
421
422struct iwm_umac_wifi_in_hdr {
423 struct iwm_udma_in_hdr hw_hdr;
424 struct iwm_umac_fw_cmd_hdr sw_hdr;
425} __attribute__ ((packed));
426
427struct iwm_umac_nonwifi_in_hdr {
428 struct iwm_udma_in_hdr hw_hdr;
429 __le32 time_stamp;
430} __attribute__ ((packed));
431
432#define IWM_UMAC_PAGE_SIZE 0x200
433
434/* Notify structures */
435struct iwm_fw_version {
436 u8 minor;
437 u8 major;
438 __le16 id;
439};
440
441struct iwm_fw_build {
442 u8 type;
443 u8 subtype;
444 u8 platform;
445 u8 opt;
446};
447
448struct iwm_fw_alive_hdr {
449 struct iwm_fw_version ver;
450 struct iwm_fw_build build;
451 __le32 os_build;
452 __le32 log_hdr_addr;
453 __le32 log_buf_addr;
454 __le32 sys_timer_addr;
455};
456
457#define WAIT_NOTIF_TIMEOUT (2 * HZ)
458#define SCAN_COMPLETE_TIMEOUT (3 * HZ)
459
460#define UMAC_NTFY_ALIVE_STATUS_ERR 0xDEAD
461#define UMAC_NTFY_ALIVE_STATUS_OK 0xCAFE
462
463#define UMAC_NTFY_INIT_COMPLETE_STATUS_ERR 0xDEAD
464#define UMAC_NTFY_INIT_COMPLETE_STATUS_OK 0xCAFE
465
466#define UMAC_NTFY_WIFI_CORE_STATUS_LINK_EN 0x40
467#define UMAC_NTFY_WIFI_CORE_STATUS_MLME_EN 0x80
468
469#define IWM_MACS_OUT_GROUPS 6
470#define IWM_MACS_OUT_SGROUPS 1
471
472
473#define WIFI_IF_NTFY_ASSOC_START 0x80
474#define WIFI_IF_NTFY_ASSOC_COMPLETE 0x81
475#define WIFI_IF_NTFY_PROFILE_INVALIDATE_COMPLETE 0x82
476#define WIFI_IF_NTFY_CONNECTION_TERMINATED 0x83
477#define WIFI_IF_NTFY_SCAN_COMPLETE 0x84
478#define WIFI_IF_NTFY_STA_TABLE_CHANGE 0x85
479#define WIFI_IF_NTFY_EXTENDED_IE_REQUIRED 0x86
480#define WIFI_IF_NTFY_RADIO_PREEMPTION 0x87
481#define WIFI_IF_NTFY_BSS_TRK_TABLE_CHANGED 0x88
482#define WIFI_IF_NTFY_BSS_TRK_ENTRIES_REMOVED 0x89
483#define WIFI_IF_NTFY_LINK_QUALITY_STATISTICS 0x8A
484#define WIFI_IF_NTFY_MGMT_FRAME 0x8B
485
486/* DEBUG INDICATIONS */
487#define WIFI_DBG_IF_NTFY_SCAN_SUPER_JOB_START 0xE0
488#define WIFI_DBG_IF_NTFY_SCAN_SUPER_JOB_COMPLETE 0xE1
489#define WIFI_DBG_IF_NTFY_SCAN_CHANNEL_START 0xE2
490#define WIFI_DBG_IF_NTFY_SCAN_CHANNEL_RESULT 0xE3
491#define WIFI_DBG_IF_NTFY_SCAN_MINI_JOB_START 0xE4
492#define WIFI_DBG_IF_NTFY_SCAN_MINI_JOB_COMPLETE 0xE5
493#define WIFI_DBG_IF_NTFY_CNCT_ATC_START 0xE6
494#define WIFI_DBG_IF_NTFY_COEX_NOTIFICATION 0xE7
495#define WIFI_DBG_IF_NTFY_COEX_HANDLE_ENVELOP 0xE8
496#define WIFI_DBG_IF_NTFY_COEX_HANDLE_RELEASE_ENVELOP 0xE9
497
498/* Notification structures */
499struct iwm_umac_notif_wifi_if {
500 struct iwm_umac_wifi_in_hdr hdr;
501 u8 status;
502 u8 flags;
503 __le16 buf_size;
504} __attribute__ ((packed));
505
506#define UMAC_ROAM_REASON_FIRST_SELECTION 0x1
507#define UMAC_ROAM_REASON_AP_DEAUTH 0x2
508#define UMAC_ROAM_REASON_AP_CONNECT_LOST 0x3
509#define UMAC_ROAM_REASON_RSSI 0x4
510#define UMAC_ROAM_REASON_AP_ASSISTED_ROAM 0x5
511#define UMAC_ROAM_REASON_IBSS_COALESCING 0x6
512
513struct iwm_umac_notif_assoc_start {
514 struct iwm_umac_notif_wifi_if mlme_hdr;
515 __le32 roam_reason;
516 u8 bssid[ETH_ALEN];
517 u8 reserved[2];
518} __attribute__ ((packed));
519
520#define UMAC_ASSOC_COMPLETE_SUCCESS 0x0
521#define UMAC_ASSOC_COMPLETE_FAILURE 0x1
522
523struct iwm_umac_notif_assoc_complete {
524 struct iwm_umac_notif_wifi_if mlme_hdr;
525 __le32 status;
526 u8 bssid[ETH_ALEN];
527 u8 band;
528 u8 channel;
529} __attribute__ ((packed));
530
531#define UMAC_PROFILE_INVALID_ASSOC_TIMEOUT 0x0
532#define UMAC_PROFILE_INVALID_ROAM_TIMEOUT 0x1
533#define UMAC_PROFILE_INVALID_REQUEST 0x2
534#define UMAC_PROFILE_INVALID_RF_PREEMPTED 0x3
535
536struct iwm_umac_notif_profile_invalidate {
537 struct iwm_umac_notif_wifi_if mlme_hdr;
538 __le32 reason;
539} __attribute__ ((packed));
540
541#define UMAC_SCAN_RESULT_SUCCESS 0x0
542#define UMAC_SCAN_RESULT_ABORTED 0x1
543#define UMAC_SCAN_RESULT_REJECTED 0x2
544#define UMAC_SCAN_RESULT_FAILED 0x3
545
546struct iwm_umac_notif_scan_complete {
547 struct iwm_umac_notif_wifi_if mlme_hdr;
548 __le32 type;
549 __le32 result;
550 u8 seq_num;
551} __attribute__ ((packed));
552
553#define UMAC_OPCODE_ADD_MODIFY 0x0
554#define UMAC_OPCODE_REMOVE 0x1
555#define UMAC_OPCODE_CLEAR_ALL 0x2
556
557#define UMAC_STA_FLAG_QOS 0x1
558
559struct iwm_umac_notif_sta_info {
560 struct iwm_umac_notif_wifi_if mlme_hdr;
561 __le32 opcode;
562 u8 mac_addr[ETH_ALEN];
563 u8 sta_id; /* bits 0-3: station ID, bits 4-7: station color */
564 u8 flags;
565} __attribute__ ((packed));
566
567#define UMAC_BAND_2GHZ 0
568#define UMAC_BAND_5GHZ 1
569
570#define UMAC_CHANNEL_WIDTH_20MHZ 0
571#define UMAC_CHANNEL_WIDTH_40MHZ 1
572
573struct iwm_umac_notif_bss_info {
574 struct iwm_umac_notif_wifi_if mlme_hdr;
575 __le32 type;
576 __le32 timestamp;
577 __le16 table_idx;
578 __le16 frame_len;
579 u8 band;
580 u8 channel;
581 s8 rssi;
582 u8 reserved;
583 u8 frame_buf[1];
584} __attribute__ ((packed));
585
586#define IWM_BSS_REMOVE_INDEX_MSK 0x0fff
587#define IWM_BSS_REMOVE_FLAGS_MSK 0xfc00
588
589#define IWM_BSS_REMOVE_FLG_AGE 0x1000
590#define IWM_BSS_REMOVE_FLG_TIMEOUT 0x2000
591#define IWM_BSS_REMOVE_FLG_TABLE_FULL 0x4000
592
593struct iwm_umac_notif_bss_removed {
594 struct iwm_umac_notif_wifi_if mlme_hdr;
595 __le32 count;
596 __le16 entries[0];
597} __attribute__ ((packed));
598
599struct iwm_umac_notif_mgt_frame {
600 struct iwm_umac_notif_wifi_if mlme_hdr;
601 __le16 len;
602 u8 frame[1];
603} __attribute__ ((packed));
604
605struct iwm_umac_notif_alive {
606 struct iwm_umac_wifi_in_hdr hdr;
607 __le16 status;
608 __le16 reserved1;
609 struct iwm_fw_alive_hdr alive_data;
610 __le16 reserved2;
611 __le16 page_grp_count;
612 __le32 page_grp_state[IWM_MACS_OUT_GROUPS];
613} __attribute__ ((packed));
614
615struct iwm_umac_notif_init_complete {
616 __le16 status;
617 __le16 reserved;
618} __attribute__ ((packed));
619
620/* error categories */
621enum {
622 UMAC_SYS_ERR_CAT_NONE = 0,
623 UMAC_SYS_ERR_CAT_BOOT,
624 UMAC_SYS_ERR_CAT_UMAC,
625 UMAC_SYS_ERR_CAT_UAXM,
626 UMAC_SYS_ERR_CAT_LMAC,
627 UMAC_SYS_ERR_CAT_MAX
628};
629
630struct iwm_fw_error_hdr {
631 __le32 category;
632 __le32 status;
633 __le32 pc;
634 __le32 blink1;
635 __le32 blink2;
636 __le32 ilink1;
637 __le32 ilink2;
638 __le32 data1;
639 __le32 data2;
640 __le32 line_num;
641 __le32 umac_status;
642 __le32 lmac_status;
643 __le32 sdio_status;
644} __attribute__ ((packed));
645
646struct iwm_umac_notif_error {
647 struct iwm_umac_wifi_in_hdr hdr;
648 struct iwm_fw_error_hdr err;
649} __attribute__ ((packed));
650
651#define UMAC_DEALLOC_NTFY_CHANGES_CNT_POS 0
652#define UMAC_DEALLOC_NTFY_CHANGES_CNT_SEED 0xff
653#define UMAC_DEALLOC_NTFY_CHANGES_MSK_POS 8
654#define UMAC_DEALLOC_NTFY_CHANGES_MSK_SEED 0xffffff
655#define UMAC_DEALLOC_NTFY_PAGE_CNT_POS 0
656#define UMAC_DEALLOC_NTFY_PAGE_CNT_SEED 0xffffff
657#define UMAC_DEALLOC_NTFY_GROUP_NUM_POS 24
658#define UMAC_DEALLOC_NTFY_GROUP_NUM_SEED 0xf
659
660struct iwm_umac_notif_page_dealloc {
661 struct iwm_umac_wifi_in_hdr hdr;
662 __le32 changes;
663 __le32 grp_info[IWM_MACS_OUT_GROUPS];
664} __attribute__ ((packed));
665
666struct iwm_umac_notif_wifi_status {
667 struct iwm_umac_wifi_in_hdr hdr;
668 __le16 status;
669 __le16 reserved;
670} __attribute__ ((packed));
671
672struct iwm_umac_notif_rx_ticket {
673 struct iwm_umac_wifi_in_hdr hdr;
674 u8 num_tickets;
675 u8 reserved[3];
676 struct iwm_rx_ticket tickets[1];
677} __attribute__ ((packed));
678
679/* Tx/Rx rates window (number of max of last update window per second) */
680#define UMAC_NTF_RATE_SAMPLE_NR 4
681
682#define IWM_UMAC_MGMT_TID 8
683#define IWM_UMAC_TID_NR 8
684
685struct iwm_umac_notif_stats {
686 struct iwm_umac_wifi_in_hdr hdr;
687 __le32 flags;
688 __le32 timestamp;
689 __le16 tid_load[IWM_UMAC_TID_NR + 2]; /* 1 non-QoS + 1 dword align */
690 __le16 tx_rate[UMAC_NTF_RATE_SAMPLE_NR];
691 __le16 rx_rate[UMAC_NTF_RATE_SAMPLE_NR];
692 s32 rssi_dbm;
693 s32 noise_dbm;
694 __le32 supp_rates;
695 __le32 missed_beacons;
696 __le32 rx_beacons;
697 __le32 rx_dir_pkts;
698 __le32 rx_nondir_pkts;
699 __le32 rx_multicast;
700 __le32 rx_errors;
701 __le32 rx_drop_other_bssid;
702 __le32 rx_drop_decode;
703 __le32 rx_drop_reassembly;
704 __le32 rx_drop_bad_len;
705 __le32 rx_drop_overflow;
706 __le32 rx_drop_crc;
707 __le32 rx_drop_missed;
708 __le32 tx_dir_pkts;
709 __le32 tx_nondir_pkts;
710 __le32 tx_failure;
711 __le32 tx_errors;
712 __le32 tx_drop_max_retry;
713 __le32 tx_err_abort;
714 __le32 tx_err_carrier;
715 __le32 rx_bytes;
716 __le32 tx_bytes;
717 __le32 tx_power;
718 __le32 tx_max_power;
719 __le32 roam_threshold;
720 __le32 ap_assoc_nr;
721 __le32 scan_full;
722 __le32 scan_abort;
723 __le32 ap_nr;
724 __le32 roam_nr;
725 __le32 roam_missed_beacons;
726 __le32 roam_rssi;
727 __le32 roam_unassoc;
728 __le32 roam_deauth;
729 __le32 roam_ap_loadblance;
730} __attribute__ ((packed));
731
732/* WiFi interface wrapper header */
733struct iwm_umac_wifi_if {
734 u8 oid;
735 u8 flags;
736 __le16 buf_size;
737} __attribute__ ((packed));
738
739#define IWM_SEQ_NUM_HOST_MSK 0x0000
740#define IWM_SEQ_NUM_UMAC_MSK 0x4000
741#define IWM_SEQ_NUM_LMAC_MSK 0x8000
742#define IWM_SEQ_NUM_MSK 0xC000
743
744#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/wext.c b/drivers/net/wireless/iwmc3200wifi/wext.c
new file mode 100644
index 000000000000..584c94d0f399
--- /dev/null
+++ b/drivers/net/wireless/iwmc3200wifi/wext.c
@@ -0,0 +1,723 @@
1/*
2 * Intel Wireless Multicomm 3200 WiFi driver
3 *
4 * Copyright (C) 2009 Intel Corporation <ilw@linux.intel.com>
5 * Samuel Ortiz <samuel.ortiz@intel.com>
6 * Zhu Yi <yi.zhu@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 */
23
24#include <linux/kernel.h>
25#include <linux/netdevice.h>
26#include <linux/wireless.h>
27#include <linux/if_arp.h>
28#include <linux/etherdevice.h>
29#include <net/cfg80211.h>
30#include <net/iw_handler.h>
31
32#include "iwm.h"
33#include "umac.h"
34#include "commands.h"
35#include "debug.h"
36
37static struct iw_statistics *iwm_get_wireless_stats(struct net_device *dev)
38{
39 struct iwm_priv *iwm = ndev_to_iwm(dev);
40 struct iw_statistics *wstats = &iwm->wstats;
41
42 if (!test_bit(IWM_STATUS_ASSOCIATED, &iwm->status)) {
43 memset(wstats, 0, sizeof(struct iw_statistics));
44 wstats->qual.updated = IW_QUAL_ALL_INVALID;
45 }
46
47 return wstats;
48}
49
50static int iwm_wext_siwfreq(struct net_device *dev,
51 struct iw_request_info *info,
52 struct iw_freq *freq, char *extra)
53{
54 struct iwm_priv *iwm = ndev_to_iwm(dev);
55
56 if (freq->flags == IW_FREQ_AUTO)
57 return 0;
58
59 /* frequency/channel can only be set in IBSS mode */
60 if (iwm->conf.mode != UMAC_MODE_IBSS)
61 return -EOPNOTSUPP;
62
63 return cfg80211_ibss_wext_siwfreq(dev, info, freq, extra);
64}
65
66static int iwm_wext_giwfreq(struct net_device *dev,
67 struct iw_request_info *info,
68 struct iw_freq *freq, char *extra)
69{
70 struct iwm_priv *iwm = ndev_to_iwm(dev);
71
72 if (iwm->conf.mode == UMAC_MODE_IBSS)
73 return cfg80211_ibss_wext_giwfreq(dev, info, freq, extra);
74
75 freq->e = 0;
76 freq->m = iwm->channel;
77
78 return 0;
79}
80
81static int iwm_wext_siwap(struct net_device *dev, struct iw_request_info *info,
82 struct sockaddr *ap_addr, char *extra)
83{
84 struct iwm_priv *iwm = ndev_to_iwm(dev);
85
86 if (iwm->conf.mode == UMAC_MODE_IBSS)
87 return cfg80211_ibss_wext_siwap(dev, info, ap_addr, extra);
88
89 if (!test_bit(IWM_STATUS_READY, &iwm->status))
90 return -EIO;
91
92 if (is_zero_ether_addr(ap_addr->sa_data) ||
93 is_broadcast_ether_addr(ap_addr->sa_data)) {
94 IWM_DBG_WEXT(iwm, DBG, "clear mandatory bssid %pM\n",
95 iwm->umac_profile->bssid[0]);
96 memset(&iwm->umac_profile->bssid[0], 0, ETH_ALEN);
97 iwm->umac_profile->bss_num = 0;
98 } else {
99 IWM_DBG_WEXT(iwm, DBG, "add mandatory bssid %pM\n",
100 ap_addr->sa_data);
101 memcpy(&iwm->umac_profile->bssid[0], ap_addr->sa_data,
102 ETH_ALEN);
103 iwm->umac_profile->bss_num = 1;
104 }
105
106 if (iwm->umac_profile_active) {
107 if (!memcmp(&iwm->umac_profile->bssid[0], iwm->bssid, ETH_ALEN))
108 return 0;
109
110 iwm_invalidate_mlme_profile(iwm);
111 }
112
113 if (iwm->umac_profile->ssid.ssid_len)
114 return iwm_send_mlme_profile(iwm);
115
116 return 0;
117}
118
119static int iwm_wext_giwap(struct net_device *dev, struct iw_request_info *info,
120 struct sockaddr *ap_addr, char *extra)
121{
122 struct iwm_priv *iwm = ndev_to_iwm(dev);
123
124 switch (iwm->conf.mode) {
125 case UMAC_MODE_IBSS:
126 return cfg80211_ibss_wext_giwap(dev, info, ap_addr, extra);
127 case UMAC_MODE_BSS:
128 if (test_bit(IWM_STATUS_ASSOCIATED, &iwm->status)) {
129 ap_addr->sa_family = ARPHRD_ETHER;
130 memcpy(&ap_addr->sa_data, iwm->bssid, ETH_ALEN);
131 } else
132 memset(&ap_addr->sa_data, 0, ETH_ALEN);
133 break;
134 default:
135 return -EOPNOTSUPP;
136 }
137
138 return 0;
139}
140
141static int iwm_wext_siwessid(struct net_device *dev,
142 struct iw_request_info *info,
143 struct iw_point *data, char *ssid)
144{
145 struct iwm_priv *iwm = ndev_to_iwm(dev);
146 size_t len = data->length;
147 int ret;
148
149 if (iwm->conf.mode == UMAC_MODE_IBSS)
150 return cfg80211_ibss_wext_siwessid(dev, info, data, ssid);
151
152 if (!test_bit(IWM_STATUS_READY, &iwm->status))
153 return -EIO;
154
155 if (len > 0 && ssid[len - 1] == '\0')
156 len--;
157
158 if (iwm->umac_profile_active) {
159 if (iwm->umac_profile->ssid.ssid_len == len &&
160 !memcmp(iwm->umac_profile->ssid.ssid, ssid, len))
161 return 0;
162
163 ret = iwm_invalidate_mlme_profile(iwm);
164 if (ret < 0) {
165 IWM_ERR(iwm, "Couldn't invalidate profile\n");
166 return ret;
167 }
168 }
169
170 iwm->umac_profile->ssid.ssid_len = len;
171 memcpy(iwm->umac_profile->ssid.ssid, ssid, len);
172
173 return iwm_send_mlme_profile(iwm);
174}
175
176static int iwm_wext_giwessid(struct net_device *dev,
177 struct iw_request_info *info,
178 struct iw_point *data, char *ssid)
179{
180 struct iwm_priv *iwm = ndev_to_iwm(dev);
181
182 if (iwm->conf.mode == UMAC_MODE_IBSS)
183 return cfg80211_ibss_wext_giwessid(dev, info, data, ssid);
184
185 if (!test_bit(IWM_STATUS_READY, &iwm->status))
186 return -EIO;
187
188 data->length = iwm->umac_profile->ssid.ssid_len;
189 if (data->length) {
190 memcpy(ssid, iwm->umac_profile->ssid.ssid, data->length);
191 data->flags = 1;
192 } else
193 data->flags = 0;
194
195 return 0;
196}
197
198static struct iwm_key *
199iwm_key_init(struct iwm_priv *iwm, u8 key_idx, bool in_use,
200 struct iw_encode_ext *ext, u8 alg)
201{
202 struct iwm_key *key = &iwm->keys[key_idx];
203
204 memset(key, 0, sizeof(struct iwm_key));
205 memcpy(key->hdr.mac, ext->addr.sa_data, ETH_ALEN);
206 key->hdr.key_idx = key_idx;
207 if (is_broadcast_ether_addr(ext->addr.sa_data))
208 key->hdr.multicast = 1;
209
210 key->in_use = in_use;
211 key->flags = ext->ext_flags;
212 key->alg = alg;
213 key->key_len = ext->key_len;
214 memcpy(key->key, ext->key, ext->key_len);
215
216 return key;
217}
218
219static int iwm_wext_giwrate(struct net_device *dev,
220 struct iw_request_info *info,
221 struct iw_param *rate, char *extra)
222{
223 struct iwm_priv *iwm = ndev_to_iwm(dev);
224
225 rate->value = iwm->rate * 1000000;
226
227 return 0;
228}
229
230static int iwm_wext_siwencode(struct net_device *dev,
231 struct iw_request_info *info,
232 struct iw_point *erq, char *key_buf)
233{
234 struct iwm_priv *iwm = ndev_to_iwm(dev);
235 struct iwm_key *uninitialized_var(key);
236 int idx, i, uninitialized_var(alg), remove = 0, ret;
237
238 IWM_DBG_WEXT(iwm, DBG, "key len: %d\n", erq->length);
239 IWM_DBG_WEXT(iwm, DBG, "flags: 0x%x\n", erq->flags);
240
241 if (!iwm->umac_profile) {
242 IWM_ERR(iwm, "UMAC profile not allocated yet\n");
243 return -ENODEV;
244 }
245
246 if (erq->length == WLAN_KEY_LEN_WEP40) {
247 alg = UMAC_CIPHER_TYPE_WEP_40;
248 iwm->umac_profile->sec.ucast_cipher = UMAC_CIPHER_TYPE_WEP_40;
249 iwm->umac_profile->sec.mcast_cipher = UMAC_CIPHER_TYPE_WEP_40;
250 } else if (erq->length == WLAN_KEY_LEN_WEP104) {
251 alg = UMAC_CIPHER_TYPE_WEP_104;
252 iwm->umac_profile->sec.ucast_cipher = UMAC_CIPHER_TYPE_WEP_104;
253 iwm->umac_profile->sec.mcast_cipher = UMAC_CIPHER_TYPE_WEP_104;
254 }
255
256 if (erq->flags & IW_ENCODE_RESTRICTED)
257 iwm->umac_profile->sec.auth_type = UMAC_AUTH_TYPE_LEGACY_PSK;
258 else
259 iwm->umac_profile->sec.auth_type = UMAC_AUTH_TYPE_OPEN;
260
261 idx = erq->flags & IW_ENCODE_INDEX;
262 if (idx == 0) {
263 if (iwm->default_key)
264 for (i = 0; i < IWM_NUM_KEYS; i++) {
265 if (iwm->default_key == &iwm->keys[i]) {
266 idx = i;
267 break;
268 }
269 }
270 else
271 iwm->default_key = &iwm->keys[idx];
272 } else if (idx < 1 || idx > 4) {
273 return -EINVAL;
274 } else
275 idx--;
276
277 if (erq->flags & IW_ENCODE_DISABLED)
278 remove = 1;
279 else if (erq->length == 0) {
280 if (!iwm->keys[idx].in_use)
281 return -EINVAL;
282 iwm->default_key = &iwm->keys[idx];
283 }
284
285 if (erq->length) {
286 key = &iwm->keys[idx];
287 memset(key, 0, sizeof(struct iwm_key));
288 memset(key->hdr.mac, 0xff, ETH_ALEN);
289 key->hdr.key_idx = idx;
290 key->hdr.multicast = 1;
291 key->in_use = !remove;
292 key->alg = alg;
293 key->key_len = erq->length;
294 memcpy(key->key, key_buf, erq->length);
295
296 IWM_DBG_WEXT(iwm, DBG, "Setting key %d, default: %d\n",
297 idx, !!iwm->default_key);
298 }
299
300 if (remove) {
301 if ((erq->flags & IW_ENCODE_NOKEY) || (erq->length == 0)) {
302 int j;
303 for (j = 0; j < IWM_NUM_KEYS; j++)
304 if (iwm->keys[j].in_use) {
305 struct iwm_key *k = &iwm->keys[j];
306
307 k->in_use = 0;
308 ret = iwm_set_key(iwm, remove, 0, k);
309 if (ret < 0)
310 return ret;
311 }
312
313 iwm->umac_profile->sec.ucast_cipher =
314 UMAC_CIPHER_TYPE_NONE;
315 iwm->umac_profile->sec.mcast_cipher =
316 UMAC_CIPHER_TYPE_NONE;
317 iwm->umac_profile->sec.auth_type =
318 UMAC_AUTH_TYPE_OPEN;
319
320 return 0;
321 } else {
322 key->in_use = 0;
323 return iwm_set_key(iwm, remove, 0, key);
324 }
325 }
326
327 /*
328 * If we havent set a profile yet, we cant set keys.
329 * Keys will be pushed after we're associated.
330 */
331 if (!iwm->umac_profile_active)
332 return 0;
333
334 /*
335 * If there is a current active profile, but no
336 * default key, it's not worth trying to associate again.
337 */
338 if (!iwm->default_key)
339 return 0;
340
341 /*
342 * Here we have an active profile, but a key setting changed.
343 * We thus have to invalidate the current profile, and push the
344 * new one. Keys will be pushed when association takes place.
345 */
346 ret = iwm_invalidate_mlme_profile(iwm);
347 if (ret < 0) {
348 IWM_ERR(iwm, "Couldn't invalidate profile\n");
349 return ret;
350 }
351
352 return iwm_send_mlme_profile(iwm);
353}
354
355static int iwm_wext_giwencode(struct net_device *dev,
356 struct iw_request_info *info,
357 struct iw_point *erq, char *key)
358{
359 struct iwm_priv *iwm = ndev_to_iwm(dev);
360 int idx, i;
361
362 idx = erq->flags & IW_ENCODE_INDEX;
363 if (idx < 1 || idx > 4) {
364 idx = -1;
365 if (!iwm->default_key) {
366 erq->length = 0;
367 erq->flags |= IW_ENCODE_NOKEY;
368 return 0;
369 } else
370 for (i = 0; i < IWM_NUM_KEYS; i++) {
371 if (iwm->default_key == &iwm->keys[i]) {
372 idx = i;
373 break;
374 }
375 }
376 if (idx < 0)
377 return -EINVAL;
378 } else
379 idx--;
380
381 erq->flags = idx + 1;
382
383 if (!iwm->keys[idx].in_use) {
384 erq->length = 0;
385 erq->flags |= IW_ENCODE_DISABLED;
386 return 0;
387 }
388
389 memcpy(key, iwm->keys[idx].key,
390 min_t(int, erq->length, iwm->keys[idx].key_len));
391 erq->length = iwm->keys[idx].key_len;
392 erq->flags |= IW_ENCODE_ENABLED;
393
394 if (iwm->umac_profile->mode == UMAC_MODE_BSS) {
395 switch (iwm->umac_profile->sec.auth_type) {
396 case UMAC_AUTH_TYPE_OPEN:
397 erq->flags |= IW_ENCODE_OPEN;
398 break;
399 default:
400 erq->flags |= IW_ENCODE_RESTRICTED;
401 break;
402 }
403 }
404
405 return 0;
406}
407
408static int iwm_set_wpa_version(struct iwm_priv *iwm, u8 wpa_version)
409{
410 if (wpa_version & IW_AUTH_WPA_VERSION_WPA2)
411 iwm->umac_profile->sec.flags = UMAC_SEC_FLG_RSNA_ON_MSK;
412 else if (wpa_version & IW_AUTH_WPA_VERSION_WPA)
413 iwm->umac_profile->sec.flags = UMAC_SEC_FLG_WPA_ON_MSK;
414 else
415 iwm->umac_profile->sec.flags = UMAC_SEC_FLG_LEGACY_PROFILE;
416
417 return 0;
418}
419
420static int iwm_wext_siwpower(struct net_device *dev,
421 struct iw_request_info *info,
422 struct iw_param *wrq, char *extra)
423{
424 struct iwm_priv *iwm = ndev_to_iwm(dev);
425 u32 power_index;
426
427 if (wrq->disabled) {
428 power_index = IWM_POWER_INDEX_MIN;
429 goto set;
430 } else
431 power_index = IWM_POWER_INDEX_DEFAULT;
432
433 switch (wrq->flags & IW_POWER_MODE) {
434 case IW_POWER_ON:
435 case IW_POWER_MODE:
436 case IW_POWER_ALL_R:
437 break;
438 default:
439 return -EINVAL;
440 }
441
442 set:
443 if (power_index == iwm->conf.power_index)
444 return 0;
445
446 iwm->conf.power_index = power_index;
447
448 return iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
449 CFG_POWER_INDEX, iwm->conf.power_index);
450}
451
452static int iwm_wext_giwpower(struct net_device *dev,
453 struct iw_request_info *info,
454 union iwreq_data *wrqu, char *extra)
455{
456 struct iwm_priv *iwm = ndev_to_iwm(dev);
457
458 wrqu->power.disabled = (iwm->conf.power_index == IWM_POWER_INDEX_MIN);
459
460 return 0;
461}
462
463static int iwm_set_key_mgt(struct iwm_priv *iwm, u8 key_mgt)
464{
465 u8 *auth_type = &iwm->umac_profile->sec.auth_type;
466
467 if (key_mgt == IW_AUTH_KEY_MGMT_802_1X)
468 *auth_type = UMAC_AUTH_TYPE_8021X;
469 else if (key_mgt == IW_AUTH_KEY_MGMT_PSK) {
470 if (iwm->umac_profile->sec.flags &
471 (UMAC_SEC_FLG_WPA_ON_MSK | UMAC_SEC_FLG_RSNA_ON_MSK))
472 *auth_type = UMAC_AUTH_TYPE_RSNA_PSK;
473 else
474 *auth_type = UMAC_AUTH_TYPE_LEGACY_PSK;
475 } else {
476 IWM_ERR(iwm, "Invalid key mgt: 0x%x\n", key_mgt);
477 return -EINVAL;
478 }
479
480 return 0;
481}
482
483static int iwm_set_cipher(struct iwm_priv *iwm, u8 cipher, u8 ucast)
484{
485 u8 *profile_cipher = ucast ? &iwm->umac_profile->sec.ucast_cipher :
486 &iwm->umac_profile->sec.mcast_cipher;
487
488 switch (cipher) {
489 case IW_AUTH_CIPHER_NONE:
490 *profile_cipher = UMAC_CIPHER_TYPE_NONE;
491 break;
492 case IW_AUTH_CIPHER_WEP40:
493 *profile_cipher = UMAC_CIPHER_TYPE_WEP_40;
494 break;
495 case IW_AUTH_CIPHER_TKIP:
496 *profile_cipher = UMAC_CIPHER_TYPE_TKIP;
497 break;
498 case IW_AUTH_CIPHER_CCMP:
499 *profile_cipher = UMAC_CIPHER_TYPE_CCMP;
500 break;
501 case IW_AUTH_CIPHER_WEP104:
502 *profile_cipher = UMAC_CIPHER_TYPE_WEP_104;
503 break;
504 default:
505 IWM_ERR(iwm, "Unsupported cipher: 0x%x\n", cipher);
506 return -ENOTSUPP;
507 }
508
509 return 0;
510}
511
512static int iwm_set_auth_alg(struct iwm_priv *iwm, u8 auth_alg)
513{
514 u8 *auth_type = &iwm->umac_profile->sec.auth_type;
515
516 switch (auth_alg) {
517 case IW_AUTH_ALG_OPEN_SYSTEM:
518 *auth_type = UMAC_AUTH_TYPE_OPEN;
519 break;
520 case IW_AUTH_ALG_SHARED_KEY:
521 if (iwm->umac_profile->sec.flags &
522 (UMAC_SEC_FLG_WPA_ON_MSK | UMAC_SEC_FLG_RSNA_ON_MSK)) {
523 if (*auth_type == UMAC_AUTH_TYPE_8021X)
524 return -EINVAL;
525 *auth_type = UMAC_AUTH_TYPE_RSNA_PSK;
526 } else {
527 *auth_type = UMAC_AUTH_TYPE_LEGACY_PSK;
528 }
529 break;
530 case IW_AUTH_ALG_LEAP:
531 default:
532 IWM_ERR(iwm, "Unsupported auth alg: 0x%x\n", auth_alg);
533 return -ENOTSUPP;
534 }
535
536 return 0;
537}
538
539static int iwm_wext_siwauth(struct net_device *dev,
540 struct iw_request_info *info,
541 struct iw_param *data, char *extra)
542{
543 struct iwm_priv *iwm = ndev_to_iwm(dev);
544 int ret;
545
546 if ((data->flags) &
547 (IW_AUTH_WPA_VERSION | IW_AUTH_KEY_MGMT |
548 IW_AUTH_WPA_ENABLED | IW_AUTH_80211_AUTH_ALG)) {
549 /* We need to invalidate the current profile */
550 if (iwm->umac_profile_active) {
551 ret = iwm_invalidate_mlme_profile(iwm);
552 if (ret < 0) {
553 IWM_ERR(iwm, "Couldn't invalidate profile\n");
554 return ret;
555 }
556 }
557 }
558
559 switch (data->flags & IW_AUTH_INDEX) {
560 case IW_AUTH_WPA_VERSION:
561 return iwm_set_wpa_version(iwm, data->value);
562 break;
563 case IW_AUTH_CIPHER_PAIRWISE:
564 return iwm_set_cipher(iwm, data->value, 1);
565 break;
566 case IW_AUTH_CIPHER_GROUP:
567 return iwm_set_cipher(iwm, data->value, 0);
568 break;
569 case IW_AUTH_KEY_MGMT:
570 return iwm_set_key_mgt(iwm, data->value);
571 break;
572 case IW_AUTH_80211_AUTH_ALG:
573 return iwm_set_auth_alg(iwm, data->value);
574 break;
575 default:
576 return -ENOTSUPP;
577 }
578
579 return 0;
580}
581
582static int iwm_wext_giwauth(struct net_device *dev,
583 struct iw_request_info *info,
584 struct iw_param *data, char *extra)
585{
586 return 0;
587}
588
589static int iwm_wext_siwencodeext(struct net_device *dev,
590 struct iw_request_info *info,
591 struct iw_point *erq, char *extra)
592{
593 struct iwm_priv *iwm = ndev_to_iwm(dev);
594 struct iwm_key *key;
595 struct iw_encode_ext *ext = (struct iw_encode_ext *) extra;
596 int uninitialized_var(alg), idx, i, remove = 0;
597
598 IWM_DBG_WEXT(iwm, DBG, "alg: 0x%x\n", ext->alg);
599 IWM_DBG_WEXT(iwm, DBG, "key len: %d\n", ext->key_len);
600 IWM_DBG_WEXT(iwm, DBG, "ext_flags: 0x%x\n", ext->ext_flags);
601 IWM_DBG_WEXT(iwm, DBG, "flags: 0x%x\n", erq->flags);
602 IWM_DBG_WEXT(iwm, DBG, "length: 0x%x\n", erq->length);
603
604 switch (ext->alg) {
605 case IW_ENCODE_ALG_NONE:
606 remove = 1;
607 break;
608 case IW_ENCODE_ALG_WEP:
609 if (ext->key_len == WLAN_KEY_LEN_WEP40)
610 alg = UMAC_CIPHER_TYPE_WEP_40;
611 else if (ext->key_len == WLAN_KEY_LEN_WEP104)
612 alg = UMAC_CIPHER_TYPE_WEP_104;
613 else {
614 IWM_ERR(iwm, "Invalid key length: %d\n", ext->key_len);
615 return -EINVAL;
616 }
617
618 break;
619 case IW_ENCODE_ALG_TKIP:
620 alg = UMAC_CIPHER_TYPE_TKIP;
621 break;
622 case IW_ENCODE_ALG_CCMP:
623 alg = UMAC_CIPHER_TYPE_CCMP;
624 break;
625 default:
626 return -EOPNOTSUPP;
627 }
628
629 idx = erq->flags & IW_ENCODE_INDEX;
630
631 if (idx == 0) {
632 if (iwm->default_key)
633 for (i = 0; i < IWM_NUM_KEYS; i++) {
634 if (iwm->default_key == &iwm->keys[i]) {
635 idx = i;
636 break;
637 }
638 }
639 } else if (idx < 1 || idx > 4) {
640 return -EINVAL;
641 } else
642 idx--;
643
644 if (erq->flags & IW_ENCODE_DISABLED)
645 remove = 1;
646 else if ((erq->length == 0) ||
647 (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)) {
648 iwm->default_key = &iwm->keys[idx];
649 if (iwm->umac_profile_active && ext->alg == IW_ENCODE_ALG_WEP)
650 return iwm_set_tx_key(iwm, idx);
651 }
652
653 key = iwm_key_init(iwm, idx, !remove, ext, alg);
654
655 return iwm_set_key(iwm, remove, !iwm->default_key, key);
656}
657
658static const iw_handler iwm_handlers[] =
659{
660 (iw_handler) NULL, /* SIOCSIWCOMMIT */
661 (iw_handler) cfg80211_wext_giwname, /* SIOCGIWNAME */
662 (iw_handler) NULL, /* SIOCSIWNWID */
663 (iw_handler) NULL, /* SIOCGIWNWID */
664 (iw_handler) iwm_wext_siwfreq, /* SIOCSIWFREQ */
665 (iw_handler) iwm_wext_giwfreq, /* SIOCGIWFREQ */
666 (iw_handler) cfg80211_wext_siwmode, /* SIOCSIWMODE */
667 (iw_handler) cfg80211_wext_giwmode, /* SIOCGIWMODE */
668 (iw_handler) NULL, /* SIOCSIWSENS */
669 (iw_handler) NULL, /* SIOCGIWSENS */
670 (iw_handler) NULL /* not used */, /* SIOCSIWRANGE */
671 (iw_handler) cfg80211_wext_giwrange, /* SIOCGIWRANGE */
672 (iw_handler) NULL /* not used */, /* SIOCSIWPRIV */
673 (iw_handler) NULL /* kernel code */, /* SIOCGIWPRIV */
674 (iw_handler) NULL /* not used */, /* SIOCSIWSTATS */
675 (iw_handler) NULL /* kernel code */, /* SIOCGIWSTATS */
676 (iw_handler) NULL, /* SIOCSIWSPY */
677 (iw_handler) NULL, /* SIOCGIWSPY */
678 (iw_handler) NULL, /* SIOCSIWTHRSPY */
679 (iw_handler) NULL, /* SIOCGIWTHRSPY */
680 (iw_handler) iwm_wext_siwap, /* SIOCSIWAP */
681 (iw_handler) iwm_wext_giwap, /* SIOCGIWAP */
682 (iw_handler) NULL, /* SIOCSIWMLME */
683 (iw_handler) NULL, /* SIOCGIWAPLIST */
684 (iw_handler) cfg80211_wext_siwscan, /* SIOCSIWSCAN */
685 (iw_handler) cfg80211_wext_giwscan, /* SIOCGIWSCAN */
686 (iw_handler) iwm_wext_siwessid, /* SIOCSIWESSID */
687 (iw_handler) iwm_wext_giwessid, /* SIOCGIWESSID */
688 (iw_handler) NULL, /* SIOCSIWNICKN */
689 (iw_handler) NULL, /* SIOCGIWNICKN */
690 (iw_handler) NULL, /* -- hole -- */
691 (iw_handler) NULL, /* -- hole -- */
692 (iw_handler) NULL, /* SIOCSIWRATE */
693 (iw_handler) iwm_wext_giwrate, /* SIOCGIWRATE */
694 (iw_handler) cfg80211_wext_siwrts, /* SIOCSIWRTS */
695 (iw_handler) cfg80211_wext_giwrts, /* SIOCGIWRTS */
696 (iw_handler) cfg80211_wext_siwfrag, /* SIOCSIWFRAG */
697 (iw_handler) cfg80211_wext_giwfrag, /* SIOCGIWFRAG */
698 (iw_handler) NULL, /* SIOCSIWTXPOW */
699 (iw_handler) NULL, /* SIOCGIWTXPOW */
700 (iw_handler) NULL, /* SIOCSIWRETRY */
701 (iw_handler) NULL, /* SIOCGIWRETRY */
702 (iw_handler) iwm_wext_siwencode, /* SIOCSIWENCODE */
703 (iw_handler) iwm_wext_giwencode, /* SIOCGIWENCODE */
704 (iw_handler) iwm_wext_siwpower, /* SIOCSIWPOWER */
705 (iw_handler) iwm_wext_giwpower, /* SIOCGIWPOWER */
706 (iw_handler) NULL, /* -- hole -- */
707 (iw_handler) NULL, /* -- hole -- */
708 (iw_handler) NULL, /* SIOCSIWGENIE */
709 (iw_handler) NULL, /* SIOCGIWGENIE */
710 (iw_handler) iwm_wext_siwauth, /* SIOCSIWAUTH */
711 (iw_handler) iwm_wext_giwauth, /* SIOCGIWAUTH */
712 (iw_handler) iwm_wext_siwencodeext, /* SIOCSIWENCODEEXT */
713 (iw_handler) NULL, /* SIOCGIWENCODEEXT */
714 (iw_handler) NULL, /* SIOCSIWPMKSA */
715 (iw_handler) NULL, /* -- hole -- */
716};
717
718const struct iw_handler_def iwm_iw_handler_def = {
719 .num_standard = ARRAY_SIZE(iwm_handlers),
720 .standard = (iw_handler *) iwm_handlers,
721 .get_wireless_stats = iwm_get_wireless_stats,
722};
723
diff --git a/drivers/net/wireless/libertas/cmd.c b/drivers/net/wireless/libertas/cmd.c
index 8c3605cdc64c..c455b9abbfc0 100644
--- a/drivers/net/wireless/libertas/cmd.c
+++ b/drivers/net/wireless/libertas/cmd.c
@@ -119,6 +119,19 @@ int lbs_update_hw_spec(struct lbs_private *priv)
119 lbs_deb_cmd("GET_HW_SPEC: hardware interface 0x%x, hardware spec 0x%04x\n", 119 lbs_deb_cmd("GET_HW_SPEC: hardware interface 0x%x, hardware spec 0x%04x\n",
120 cmd.hwifversion, cmd.version); 120 cmd.hwifversion, cmd.version);
121 121
122 /* Determine mesh_fw_ver from fwrelease and fwcapinfo */
123 /* 5.0.16p0 9.0.0.p0 is known to NOT support any mesh */
124 /* 5.110.22 have mesh command with 0xa3 command id */
125 /* 10.0.0.p0 FW brings in mesh config command with different id */
126 /* Check FW version MSB and initialize mesh_fw_ver */
127 if (MRVL_FW_MAJOR_REV(priv->fwrelease) == MRVL_FW_V5)
128 priv->mesh_fw_ver = MESH_FW_OLD;
129 else if ((MRVL_FW_MAJOR_REV(priv->fwrelease) >= MRVL_FW_V10) &&
130 (priv->fwcapinfo & MESH_CAPINFO_ENABLE_MASK))
131 priv->mesh_fw_ver = MESH_FW_NEW;
132 else
133 priv->mesh_fw_ver = MESH_NONE;
134
122 /* Clamp region code to 8-bit since FW spec indicates that it should 135 /* Clamp region code to 8-bit since FW spec indicates that it should
123 * only ever be 8-bit, even though the field size is 16-bit. Some firmware 136 * only ever be 8-bit, even though the field size is 16-bit. Some firmware
124 * returns non-zero high 8 bits here. 137 * returns non-zero high 8 bits here.
@@ -1036,17 +1049,26 @@ static int __lbs_mesh_config_send(struct lbs_private *priv,
1036 uint16_t action, uint16_t type) 1049 uint16_t action, uint16_t type)
1037{ 1050{
1038 int ret; 1051 int ret;
1052 u16 command = CMD_MESH_CONFIG_OLD;
1039 1053
1040 lbs_deb_enter(LBS_DEB_CMD); 1054 lbs_deb_enter(LBS_DEB_CMD);
1041 1055
1042 cmd->hdr.command = cpu_to_le16(CMD_MESH_CONFIG); 1056 /*
1057 * Command id is 0xac for v10 FW along with mesh interface
1058 * id in bits 14-13-12.
1059 */
1060 if (priv->mesh_fw_ver == MESH_FW_NEW)
1061 command = CMD_MESH_CONFIG |
1062 (MESH_IFACE_ID << MESH_IFACE_BIT_OFFSET);
1063
1064 cmd->hdr.command = cpu_to_le16(command);
1043 cmd->hdr.size = cpu_to_le16(sizeof(struct cmd_ds_mesh_config)); 1065 cmd->hdr.size = cpu_to_le16(sizeof(struct cmd_ds_mesh_config));
1044 cmd->hdr.result = 0; 1066 cmd->hdr.result = 0;
1045 1067
1046 cmd->type = cpu_to_le16(type); 1068 cmd->type = cpu_to_le16(type);
1047 cmd->action = cpu_to_le16(action); 1069 cmd->action = cpu_to_le16(action);
1048 1070
1049 ret = lbs_cmd_with_response(priv, CMD_MESH_CONFIG, cmd); 1071 ret = lbs_cmd_with_response(priv, command, cmd);
1050 1072
1051 lbs_deb_leave(LBS_DEB_CMD); 1073 lbs_deb_leave(LBS_DEB_CMD);
1052 return ret; 1074 return ret;
diff --git a/drivers/net/wireless/libertas/defs.h b/drivers/net/wireless/libertas/defs.h
index e8dfde39abfc..48da157d6cda 100644
--- a/drivers/net/wireless/libertas/defs.h
+++ b/drivers/net/wireless/libertas/defs.h
@@ -227,6 +227,20 @@ static inline void lbs_deb_hex(unsigned int grp, const char *prompt, u8 *buf, in
227#define TxPD_CONTROL_WDS_FRAME (1<<17) 227#define TxPD_CONTROL_WDS_FRAME (1<<17)
228#define TxPD_MESH_FRAME TxPD_CONTROL_WDS_FRAME 228#define TxPD_MESH_FRAME TxPD_CONTROL_WDS_FRAME
229 229
230/** Mesh interface ID */
231#define MESH_IFACE_ID 0x0001
232/** Mesh id should be in bits 14-13-12 */
233#define MESH_IFACE_BIT_OFFSET 0x000c
234/** Mesh enable bit in FW capability */
235#define MESH_CAPINFO_ENABLE_MASK (1<<16)
236
237/** FW definition from Marvell v5 */
238#define MRVL_FW_V5 (0x05)
239/** FW definition from Marvell v10 */
240#define MRVL_FW_V10 (0x0a)
241/** FW major revision definition */
242#define MRVL_FW_MAJOR_REV(x) ((x)>>24)
243
230/** RxPD status */ 244/** RxPD status */
231 245
232#define MRVDRV_RXPD_STATUS_OK 0x0001 246#define MRVDRV_RXPD_STATUS_OK 0x0001
@@ -380,6 +394,13 @@ enum KEY_INFO_WPA {
380 KEY_INFO_WPA_ENABLED = 0x04 394 KEY_INFO_WPA_ENABLED = 0x04
381}; 395};
382 396
397/** mesh_fw_ver */
398enum _mesh_fw_ver {
399 MESH_NONE = 0, /* MESH is not supported */
400 MESH_FW_OLD, /* MESH is supported in FW V5 */
401 MESH_FW_NEW, /* MESH is supported in FW V10 and newer */
402};
403
383/* Default values for fwt commands. */ 404/* Default values for fwt commands. */
384#define FWT_DEFAULT_METRIC 0 405#define FWT_DEFAULT_METRIC 0
385#define FWT_DEFAULT_DIR 1 406#define FWT_DEFAULT_DIR 1
diff --git a/drivers/net/wireless/libertas/dev.h b/drivers/net/wireless/libertas/dev.h
index 27e81fd97c94..a4455ec7c354 100644
--- a/drivers/net/wireless/libertas/dev.h
+++ b/drivers/net/wireless/libertas/dev.h
@@ -101,6 +101,7 @@ struct lbs_mesh_stats {
101/** Private structure for the MV device */ 101/** Private structure for the MV device */
102struct lbs_private { 102struct lbs_private {
103 int mesh_open; 103 int mesh_open;
104 int mesh_fw_ver;
104 int infra_open; 105 int infra_open;
105 int mesh_autostart_enabled; 106 int mesh_autostart_enabled;
106 107
@@ -320,6 +321,8 @@ struct lbs_private {
320 321
321 u32 monitormode; 322 u32 monitormode;
322 u8 fw_ready; 323 u8 fw_ready;
324 u8 fn_init_required;
325 u8 fn_shutdown_required;
323}; 326};
324 327
325extern struct cmd_confirm_sleep confirm_sleep; 328extern struct cmd_confirm_sleep confirm_sleep;
diff --git a/drivers/net/wireless/libertas/host.h b/drivers/net/wireless/libertas/host.h
index d4457ef808a6..fe8f0cb737bc 100644
--- a/drivers/net/wireless/libertas/host.h
+++ b/drivers/net/wireless/libertas/host.h
@@ -83,8 +83,11 @@
83#define CMD_FWT_ACCESS 0x0095 83#define CMD_FWT_ACCESS 0x0095
84#define CMD_802_11_MONITOR_MODE 0x0098 84#define CMD_802_11_MONITOR_MODE 0x0098
85#define CMD_MESH_ACCESS 0x009b 85#define CMD_MESH_ACCESS 0x009b
86#define CMD_MESH_CONFIG 0x00a3 86#define CMD_MESH_CONFIG_OLD 0x00a3
87#define CMD_MESH_CONFIG 0x00ac
87#define CMD_SET_BOOT2_VER 0x00a5 88#define CMD_SET_BOOT2_VER 0x00a5
89#define CMD_FUNC_INIT 0x00a9
90#define CMD_FUNC_SHUTDOWN 0x00aa
88#define CMD_802_11_BEACON_CTRL 0x00b0 91#define CMD_802_11_BEACON_CTRL 0x00b0
89 92
90/* For the IEEE Power Save */ 93/* For the IEEE Power Save */
diff --git a/drivers/net/wireless/libertas/hostcmd.h b/drivers/net/wireless/libertas/hostcmd.h
index a899aeb676bb..391c54ab2b09 100644
--- a/drivers/net/wireless/libertas/hostcmd.h
+++ b/drivers/net/wireless/libertas/hostcmd.h
@@ -13,8 +13,19 @@
13 13
14/* TxPD descriptor */ 14/* TxPD descriptor */
15struct txpd { 15struct txpd {
16 /* Current Tx packet status */ 16 /* union to cope up with later FW revisions */
17 __le32 tx_status; 17 union {
18 /* Current Tx packet status */
19 __le32 tx_status;
20 struct {
21 /* BSS type: client, AP, etc. */
22 u8 bss_type;
23 /* BSS number */
24 u8 bss_num;
25 /* Reserved */
26 __le16 reserved;
27 } bss;
28 } u;
18 /* Tx control */ 29 /* Tx control */
19 __le32 tx_control; 30 __le32 tx_control;
20 __le32 tx_packet_location; 31 __le32 tx_packet_location;
@@ -36,8 +47,17 @@ struct txpd {
36 47
37/* RxPD Descriptor */ 48/* RxPD Descriptor */
38struct rxpd { 49struct rxpd {
39 /* Current Rx packet status */ 50 /* union to cope up with later FW revisions */
40 __le16 status; 51 union {
52 /* Current Rx packet status */
53 __le16 status;
54 struct {
55 /* BSS type: client, AP, etc. */
56 u8 bss_type;
57 /* BSS number */
58 u8 bss_num;
59 } bss;
60 } u;
41 61
42 /* SNR */ 62 /* SNR */
43 u8 snr; 63 u8 snr;
diff --git a/drivers/net/wireless/libertas/if_cs.c b/drivers/net/wireless/libertas/if_cs.c
index cedeac6322fe..2a5b083bf9bd 100644
--- a/drivers/net/wireless/libertas/if_cs.c
+++ b/drivers/net/wireless/libertas/if_cs.c
@@ -273,7 +273,28 @@ static int if_cs_poll_while_fw_download(struct if_cs_card *card, uint addr, u8 r
273 */ 273 */
274#define IF_CS_PRODUCT_ID 0x0000001C 274#define IF_CS_PRODUCT_ID 0x0000001C
275#define IF_CS_CF8385_B1_REV 0x12 275#define IF_CS_CF8385_B1_REV 0x12
276#define IF_CS_CF8381_B3_REV 0x04
276 277
278/*
279 * Used to detect other cards than CF8385 since their revisions of silicon
280 * doesn't match those from CF8385, eg. CF8381 B3 works with this driver.
281 */
282#define CF8381_MANFID 0x02db
283#define CF8381_CARDID 0x6064
284#define CF8385_MANFID 0x02df
285#define CF8385_CARDID 0x8103
286
287static inline int if_cs_hw_is_cf8381(struct pcmcia_device *p_dev)
288{
289 return (p_dev->manf_id == CF8381_MANFID &&
290 p_dev->card_id == CF8381_CARDID);
291}
292
293static inline int if_cs_hw_is_cf8385(struct pcmcia_device *p_dev)
294{
295 return (p_dev->manf_id == CF8385_MANFID &&
296 p_dev->card_id == CF8385_CARDID);
297}
277 298
278/********************************************************************/ 299/********************************************************************/
279/* I/O and interrupt handling */ 300/* I/O and interrupt handling */
@@ -757,6 +778,7 @@ static void if_cs_release(struct pcmcia_device *p_dev)
757static int if_cs_probe(struct pcmcia_device *p_dev) 778static int if_cs_probe(struct pcmcia_device *p_dev)
758{ 779{
759 int ret = -ENOMEM; 780 int ret = -ENOMEM;
781 unsigned int prod_id;
760 struct lbs_private *priv; 782 struct lbs_private *priv;
761 struct if_cs_card *card; 783 struct if_cs_card *card;
762 /* CIS parsing */ 784 /* CIS parsing */
@@ -859,7 +881,14 @@ static int if_cs_probe(struct pcmcia_device *p_dev)
859 p_dev->io.BasePort1 + p_dev->io.NumPorts1 - 1); 881 p_dev->io.BasePort1 + p_dev->io.NumPorts1 - 1);
860 882
861 /* Check if we have a current silicon */ 883 /* Check if we have a current silicon */
862 if (if_cs_read8(card, IF_CS_PRODUCT_ID) < IF_CS_CF8385_B1_REV) { 884 prod_id = if_cs_read8(card, IF_CS_PRODUCT_ID);
885 if (if_cs_hw_is_cf8381(p_dev) && prod_id < IF_CS_CF8381_B3_REV) {
886 lbs_pr_err("old chips like 8381 rev B3 aren't supported\n");
887 ret = -ENODEV;
888 goto out2;
889 }
890
891 if (if_cs_hw_is_cf8385(p_dev) && prod_id < IF_CS_CF8385_B1_REV) {
863 lbs_pr_err("old chips like 8385 rev B1 aren't supported\n"); 892 lbs_pr_err("old chips like 8385 rev B1 aren't supported\n");
864 ret = -ENODEV; 893 ret = -ENODEV;
865 goto out2; 894 goto out2;
@@ -950,7 +979,8 @@ static void if_cs_detach(struct pcmcia_device *p_dev)
950/********************************************************************/ 979/********************************************************************/
951 980
952static struct pcmcia_device_id if_cs_ids[] = { 981static struct pcmcia_device_id if_cs_ids[] = {
953 PCMCIA_DEVICE_MANF_CARD(0x02df, 0x8103), 982 PCMCIA_DEVICE_MANF_CARD(CF8381_MANFID, CF8381_CARDID),
983 PCMCIA_DEVICE_MANF_CARD(CF8385_MANFID, CF8385_CARDID),
954 PCMCIA_DEVICE_NULL, 984 PCMCIA_DEVICE_NULL,
955}; 985};
956MODULE_DEVICE_TABLE(pcmcia, if_cs_ids); 986MODULE_DEVICE_TABLE(pcmcia, if_cs_ids);
diff --git a/drivers/net/wireless/libertas/if_sdio.c b/drivers/net/wireless/libertas/if_sdio.c
index 76f4c653d641..a7e3fc119b70 100644
--- a/drivers/net/wireless/libertas/if_sdio.c
+++ b/drivers/net/wireless/libertas/if_sdio.c
@@ -48,8 +48,11 @@ static char *lbs_fw_name = NULL;
48module_param_named(fw_name, lbs_fw_name, charp, 0644); 48module_param_named(fw_name, lbs_fw_name, charp, 0644);
49 49
50static const struct sdio_device_id if_sdio_ids[] = { 50static const struct sdio_device_id if_sdio_ids[] = {
51 { SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_LIBERTAS) }, 51 { SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL,
52 { /* end: all zeroes */ }, 52 SDIO_DEVICE_ID_MARVELL_LIBERTAS) },
53 { SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL,
54 SDIO_DEVICE_ID_MARVELL_8688WLAN) },
55 { /* end: all zeroes */ },
53}; 56};
54 57
55MODULE_DEVICE_TABLE(sdio, if_sdio_ids); 58MODULE_DEVICE_TABLE(sdio, if_sdio_ids);
@@ -58,20 +61,30 @@ struct if_sdio_model {
58 int model; 61 int model;
59 const char *helper; 62 const char *helper;
60 const char *firmware; 63 const char *firmware;
64 struct if_sdio_card *card;
61}; 65};
62 66
63static struct if_sdio_model if_sdio_models[] = { 67static struct if_sdio_model if_sdio_models[] = {
64 { 68 {
65 /* 8385 */ 69 /* 8385 */
66 .model = 0x04, 70 .model = IF_SDIO_MODEL_8385,
67 .helper = "sd8385_helper.bin", 71 .helper = "sd8385_helper.bin",
68 .firmware = "sd8385.bin", 72 .firmware = "sd8385.bin",
73 .card = NULL,
69 }, 74 },
70 { 75 {
71 /* 8686 */ 76 /* 8686 */
72 .model = 0x0B, 77 .model = IF_SDIO_MODEL_8686,
73 .helper = "sd8686_helper.bin", 78 .helper = "sd8686_helper.bin",
74 .firmware = "sd8686.bin", 79 .firmware = "sd8686.bin",
80 .card = NULL,
81 },
82 {
83 /* 8688 */
84 .model = IF_SDIO_MODEL_8688,
85 .helper = "sd8688_helper.bin",
86 .firmware = "sd8688.bin",
87 .card = NULL,
75 }, 88 },
76}; 89};
77 90
@@ -87,6 +100,7 @@ struct if_sdio_card {
87 100
88 int model; 101 int model;
89 unsigned long ioport; 102 unsigned long ioport;
103 unsigned int scratch_reg;
90 104
91 const char *helper; 105 const char *helper;
92 const char *firmware; 106 const char *firmware;
@@ -98,25 +112,29 @@ struct if_sdio_card {
98 112
99 struct workqueue_struct *workqueue; 113 struct workqueue_struct *workqueue;
100 struct work_struct packet_worker; 114 struct work_struct packet_worker;
115
116 u8 rx_unit;
101}; 117};
102 118
103/********************************************************************/ 119/********************************************************************/
104/* I/O */ 120/* I/O */
105/********************************************************************/ 121/********************************************************************/
106 122
123/*
124 * For SD8385/SD8686, this function reads firmware status after
125 * the image is downloaded, or reads RX packet length when
126 * interrupt (with IF_SDIO_H_INT_UPLD bit set) is received.
127 * For SD8688, this function reads firmware status only.
128 */
107static u16 if_sdio_read_scratch(struct if_sdio_card *card, int *err) 129static u16 if_sdio_read_scratch(struct if_sdio_card *card, int *err)
108{ 130{
109 int ret, reg; 131 int ret;
110 u16 scratch; 132 u16 scratch;
111 133
112 if (card->model == 0x04) 134 scratch = sdio_readb(card->func, card->scratch_reg, &ret);
113 reg = IF_SDIO_SCRATCH_OLD;
114 else
115 reg = IF_SDIO_SCRATCH;
116
117 scratch = sdio_readb(card->func, reg, &ret);
118 if (!ret) 135 if (!ret)
119 scratch |= sdio_readb(card->func, reg + 1, &ret) << 8; 136 scratch |= sdio_readb(card->func, card->scratch_reg + 1,
137 &ret) << 8;
120 138
121 if (err) 139 if (err)
122 *err = ret; 140 *err = ret;
@@ -127,6 +145,46 @@ static u16 if_sdio_read_scratch(struct if_sdio_card *card, int *err)
127 return scratch; 145 return scratch;
128} 146}
129 147
148static u8 if_sdio_read_rx_unit(struct if_sdio_card *card)
149{
150 int ret;
151 u8 rx_unit;
152
153 rx_unit = sdio_readb(card->func, IF_SDIO_RX_UNIT, &ret);
154
155 if (ret)
156 rx_unit = 0;
157
158 return rx_unit;
159}
160
161static u16 if_sdio_read_rx_len(struct if_sdio_card *card, int *err)
162{
163 int ret;
164 u16 rx_len;
165
166 switch (card->model) {
167 case IF_SDIO_MODEL_8385:
168 case IF_SDIO_MODEL_8686:
169 rx_len = if_sdio_read_scratch(card, &ret);
170 break;
171 case IF_SDIO_MODEL_8688:
172 default: /* for newer chipsets */
173 rx_len = sdio_readb(card->func, IF_SDIO_RX_LEN, &ret);
174 if (!ret)
175 rx_len <<= card->rx_unit;
176 else
177 rx_len = 0xffff; /* invalid length */
178
179 break;
180 }
181
182 if (err)
183 *err = ret;
184
185 return rx_len;
186}
187
130static int if_sdio_handle_cmd(struct if_sdio_card *card, 188static int if_sdio_handle_cmd(struct if_sdio_card *card,
131 u8 *buffer, unsigned size) 189 u8 *buffer, unsigned size)
132{ 190{
@@ -207,7 +265,7 @@ static int if_sdio_handle_event(struct if_sdio_card *card,
207 265
208 lbs_deb_enter(LBS_DEB_SDIO); 266 lbs_deb_enter(LBS_DEB_SDIO);
209 267
210 if (card->model == 0x04) { 268 if (card->model == IF_SDIO_MODEL_8385) {
211 event = sdio_readb(card->func, IF_SDIO_EVENT, &ret); 269 event = sdio_readb(card->func, IF_SDIO_EVENT, &ret);
212 if (ret) 270 if (ret)
213 goto out; 271 goto out;
@@ -245,7 +303,7 @@ static int if_sdio_card_to_host(struct if_sdio_card *card)
245 303
246 lbs_deb_enter(LBS_DEB_SDIO); 304 lbs_deb_enter(LBS_DEB_SDIO);
247 305
248 size = if_sdio_read_scratch(card, &ret); 306 size = if_sdio_read_rx_len(card, &ret);
249 if (ret) 307 if (ret)
250 goto out; 308 goto out;
251 309
@@ -488,7 +546,6 @@ static int if_sdio_prog_helper(struct if_sdio_card *card)
488 ret = 0; 546 ret = 0;
489 547
490release: 548release:
491 sdio_set_block_size(card->func, 0);
492 sdio_release_host(card->func); 549 sdio_release_host(card->func);
493 kfree(chunk_buffer); 550 kfree(chunk_buffer);
494release_fw: 551release_fw:
@@ -624,7 +681,6 @@ static int if_sdio_prog_real(struct if_sdio_card *card)
624 ret = 0; 681 ret = 0;
625 682
626release: 683release:
627 sdio_set_block_size(card->func, 0);
628 sdio_release_host(card->func); 684 sdio_release_host(card->func);
629 kfree(chunk_buffer); 685 kfree(chunk_buffer);
630release_fw: 686release_fw:
@@ -653,6 +709,8 @@ static int if_sdio_prog_firmware(struct if_sdio_card *card)
653 if (ret) 709 if (ret)
654 goto out; 710 goto out;
655 711
712 lbs_deb_sdio("firmware status = %#x\n", scratch);
713
656 if (scratch == IF_SDIO_FIRMWARE_OK) { 714 if (scratch == IF_SDIO_FIRMWARE_OK) {
657 lbs_deb_sdio("firmware already loaded\n"); 715 lbs_deb_sdio("firmware already loaded\n");
658 goto success; 716 goto success;
@@ -667,6 +725,9 @@ static int if_sdio_prog_firmware(struct if_sdio_card *card)
667 goto out; 725 goto out;
668 726
669success: 727success:
728 sdio_claim_host(card->func);
729 sdio_set_block_size(card->func, IF_SDIO_BLOCK_SIZE);
730 sdio_release_host(card->func);
670 ret = 0; 731 ret = 0;
671 732
672out: 733out:
@@ -820,10 +881,10 @@ static int if_sdio_probe(struct sdio_func *func,
820 if (sscanf(func->card->info[i], 881 if (sscanf(func->card->info[i],
821 "ID: %x", &model) == 1) 882 "ID: %x", &model) == 1)
822 break; 883 break;
823 if (!strcmp(func->card->info[i], "IBIS Wireless SDIO Card")) { 884 if (!strcmp(func->card->info[i], "IBIS Wireless SDIO Card")) {
824 model = 4; 885 model = IF_SDIO_MODEL_8385;
825 break; 886 break;
826 } 887 }
827 } 888 }
828 889
829 if (i == func->card->num_info) { 890 if (i == func->card->num_info) {
@@ -837,6 +898,20 @@ static int if_sdio_probe(struct sdio_func *func,
837 898
838 card->func = func; 899 card->func = func;
839 card->model = model; 900 card->model = model;
901
902 switch (card->model) {
903 case IF_SDIO_MODEL_8385:
904 card->scratch_reg = IF_SDIO_SCRATCH_OLD;
905 break;
906 case IF_SDIO_MODEL_8686:
907 card->scratch_reg = IF_SDIO_SCRATCH;
908 break;
909 case IF_SDIO_MODEL_8688:
910 default: /* for newer chipsets */
911 card->scratch_reg = IF_SDIO_FW_STATUS;
912 break;
913 }
914
840 spin_lock_init(&card->lock); 915 spin_lock_init(&card->lock);
841 card->workqueue = create_workqueue("libertas_sdio"); 916 card->workqueue = create_workqueue("libertas_sdio");
842 INIT_WORK(&card->packet_worker, if_sdio_host_to_card_worker); 917 INIT_WORK(&card->packet_worker, if_sdio_host_to_card_worker);
@@ -852,6 +927,8 @@ static int if_sdio_probe(struct sdio_func *func,
852 goto free; 927 goto free;
853 } 928 }
854 929
930 if_sdio_models[i].card = card;
931
855 card->helper = if_sdio_models[i].helper; 932 card->helper = if_sdio_models[i].helper;
856 card->firmware = if_sdio_models[i].firmware; 933 card->firmware = if_sdio_models[i].firmware;
857 934
@@ -914,15 +991,32 @@ static int if_sdio_probe(struct sdio_func *func,
914 991
915 priv->fw_ready = 1; 992 priv->fw_ready = 1;
916 993
994 sdio_claim_host(func);
995
996 /*
997 * Get rx_unit if the chip is SD8688 or newer.
998 * SD8385 & SD8686 do not have rx_unit.
999 */
1000 if ((card->model != IF_SDIO_MODEL_8385)
1001 && (card->model != IF_SDIO_MODEL_8686))
1002 card->rx_unit = if_sdio_read_rx_unit(card);
1003 else
1004 card->rx_unit = 0;
1005
917 /* 1006 /*
918 * Enable interrupts now that everything is set up 1007 * Enable interrupts now that everything is set up
919 */ 1008 */
920 sdio_claim_host(func);
921 sdio_writeb(func, 0x0f, IF_SDIO_H_INT_MASK, &ret); 1009 sdio_writeb(func, 0x0f, IF_SDIO_H_INT_MASK, &ret);
922 sdio_release_host(func); 1010 sdio_release_host(func);
923 if (ret) 1011 if (ret)
924 goto reclaim; 1012 goto reclaim;
925 1013
1014 /*
1015 * FUNC_INIT is required for SD8688 WLAN/BT multiple functions
1016 */
1017 priv->fn_init_required =
1018 (card->model == IF_SDIO_MODEL_8688) ? 1 : 0;
1019
926 ret = lbs_start_card(priv); 1020 ret = lbs_start_card(priv);
927 if (ret) 1021 if (ret)
928 goto err_activate_card; 1022 goto err_activate_card;
@@ -963,23 +1057,30 @@ static void if_sdio_remove(struct sdio_func *func)
963{ 1057{
964 struct if_sdio_card *card; 1058 struct if_sdio_card *card;
965 struct if_sdio_packet *packet; 1059 struct if_sdio_packet *packet;
1060 int ret;
966 1061
967 lbs_deb_enter(LBS_DEB_SDIO); 1062 lbs_deb_enter(LBS_DEB_SDIO);
968 1063
969 card = sdio_get_drvdata(func); 1064 card = sdio_get_drvdata(func);
970 1065
1066 lbs_stop_card(card->priv);
1067
971 card->priv->surpriseremoved = 1; 1068 card->priv->surpriseremoved = 1;
972 1069
973 lbs_deb_sdio("call remove card\n"); 1070 lbs_deb_sdio("call remove card\n");
974 lbs_stop_card(card->priv);
975 lbs_remove_card(card->priv); 1071 lbs_remove_card(card->priv);
976 1072
977 flush_workqueue(card->workqueue); 1073 flush_workqueue(card->workqueue);
978 destroy_workqueue(card->workqueue); 1074 destroy_workqueue(card->workqueue);
979 1075
980 sdio_claim_host(func); 1076 sdio_claim_host(func);
1077
1078 /* Disable interrupts */
1079 sdio_writeb(func, 0x00, IF_SDIO_H_INT_MASK, &ret);
1080
981 sdio_release_irq(func); 1081 sdio_release_irq(func);
982 sdio_disable_func(func); 1082 sdio_disable_func(func);
1083
983 sdio_release_host(func); 1084 sdio_release_host(func);
984 1085
985 while (card->packets) { 1086 while (card->packets) {
@@ -1022,8 +1123,23 @@ static int __init if_sdio_init_module(void)
1022 1123
1023static void __exit if_sdio_exit_module(void) 1124static void __exit if_sdio_exit_module(void)
1024{ 1125{
1126 int i;
1127 struct if_sdio_card *card;
1128
1025 lbs_deb_enter(LBS_DEB_SDIO); 1129 lbs_deb_enter(LBS_DEB_SDIO);
1026 1130
1131 for (i = 0; i < ARRAY_SIZE(if_sdio_models); i++) {
1132 card = if_sdio_models[i].card;
1133
1134 /*
1135 * FUNC_SHUTDOWN is required for SD8688 WLAN/BT
1136 * multiple functions
1137 */
1138 if (card && card->priv)
1139 card->priv->fn_shutdown_required =
1140 (card->model == IF_SDIO_MODEL_8688) ? 1 : 0;
1141 }
1142
1027 sdio_unregister_driver(&if_sdio_driver); 1143 sdio_unregister_driver(&if_sdio_driver);
1028 1144
1029 lbs_deb_leave(LBS_DEB_SDIO); 1145 lbs_deb_leave(LBS_DEB_SDIO);
diff --git a/drivers/net/wireless/libertas/if_sdio.h b/drivers/net/wireless/libertas/if_sdio.h
index 533bdfbf5d2a..60c9b2fcef03 100644
--- a/drivers/net/wireless/libertas/if_sdio.h
+++ b/drivers/net/wireless/libertas/if_sdio.h
@@ -12,6 +12,10 @@
12#ifndef _LBS_IF_SDIO_H 12#ifndef _LBS_IF_SDIO_H
13#define _LBS_IF_SDIO_H 13#define _LBS_IF_SDIO_H
14 14
15#define IF_SDIO_MODEL_8385 0x04
16#define IF_SDIO_MODEL_8686 0x0b
17#define IF_SDIO_MODEL_8688 0x10
18
15#define IF_SDIO_IOPORT 0x00 19#define IF_SDIO_IOPORT 0x00
16 20
17#define IF_SDIO_H_INT_MASK 0x04 21#define IF_SDIO_H_INT_MASK 0x04
@@ -38,8 +42,14 @@
38 42
39#define IF_SDIO_SCRATCH 0x34 43#define IF_SDIO_SCRATCH 0x34
40#define IF_SDIO_SCRATCH_OLD 0x80fe 44#define IF_SDIO_SCRATCH_OLD 0x80fe
45#define IF_SDIO_FW_STATUS 0x40
41#define IF_SDIO_FIRMWARE_OK 0xfedc 46#define IF_SDIO_FIRMWARE_OK 0xfedc
42 47
48#define IF_SDIO_RX_LEN 0x42
49#define IF_SDIO_RX_UNIT 0x43
50
43#define IF_SDIO_EVENT 0x80fc 51#define IF_SDIO_EVENT 0x80fc
44 52
53#define IF_SDIO_BLOCK_SIZE 256
54
45#endif 55#endif
diff --git a/drivers/net/wireless/libertas/if_spi.c b/drivers/net/wireless/libertas/if_spi.c
index 07311e71af92..5fa55fe1f860 100644
--- a/drivers/net/wireless/libertas/if_spi.c
+++ b/drivers/net/wireless/libertas/if_spi.c
@@ -731,7 +731,7 @@ static int if_spi_c2h_data(struct if_spi_card *card)
731 goto out; 731 goto out;
732 } else if (len > MRVDRV_ETH_RX_PACKET_BUFFER_SIZE) { 732 } else if (len > MRVDRV_ETH_RX_PACKET_BUFFER_SIZE) {
733 lbs_pr_err("%s: error: card has %d bytes of data, but " 733 lbs_pr_err("%s: error: card has %d bytes of data, but "
734 "our maximum skb size is %u\n", 734 "our maximum skb size is %lu\n",
735 __func__, len, MRVDRV_ETH_RX_PACKET_BUFFER_SIZE); 735 __func__, len, MRVDRV_ETH_RX_PACKET_BUFFER_SIZE);
736 err = -EINVAL; 736 err = -EINVAL;
737 goto out; 737 goto out;
@@ -814,6 +814,13 @@ static void if_spi_e2h(struct if_spi_card *card)
814 if (err) 814 if (err)
815 goto out; 815 goto out;
816 816
817 /* re-enable the card event interrupt */
818 spu_write_u16(card, IF_SPI_HOST_INT_STATUS_REG,
819 ~IF_SPI_HICU_CARD_EVENT);
820
821 /* generate a card interrupt */
822 spu_write_u16(card, IF_SPI_CARD_INT_CAUSE_REG, IF_SPI_CIC_HOST_EVENT);
823
817 spin_lock_irqsave(&priv->driver_lock, flags); 824 spin_lock_irqsave(&priv->driver_lock, flags);
818 lbs_queue_event(priv, cause & 0xff); 825 lbs_queue_event(priv, cause & 0xff);
819 spin_unlock_irqrestore(&priv->driver_lock, flags); 826 spin_unlock_irqrestore(&priv->driver_lock, flags);
@@ -1020,6 +1027,7 @@ static int __devinit if_spi_probe(struct spi_device *spi)
1020 struct libertas_spi_platform_data *pdata = spi->dev.platform_data; 1027 struct libertas_spi_platform_data *pdata = spi->dev.platform_data;
1021 int err = 0; 1028 int err = 0;
1022 u32 scratch; 1029 u32 scratch;
1030 struct sched_param param = { .sched_priority = 1 };
1023 1031
1024 lbs_deb_enter(LBS_DEB_SPI); 1032 lbs_deb_enter(LBS_DEB_SPI);
1025 1033
@@ -1123,6 +1131,9 @@ static int __devinit if_spi_probe(struct spi_device *spi)
1123 lbs_pr_err("error creating SPI thread: err=%d\n", err); 1131 lbs_pr_err("error creating SPI thread: err=%d\n", err);
1124 goto remove_card; 1132 goto remove_card;
1125 } 1133 }
1134 if (sched_setscheduler(card->spi_thread, SCHED_FIFO, &param))
1135 lbs_pr_err("Error setting scheduler, using default.\n");
1136
1126 err = request_irq(spi->irq, if_spi_host_interrupt, 1137 err = request_irq(spi->irq, if_spi_host_interrupt,
1127 IRQF_TRIGGER_FALLING, "libertas_spi", card); 1138 IRQF_TRIGGER_FALLING, "libertas_spi", card);
1128 if (err) { 1139 if (err) {
diff --git a/drivers/net/wireless/libertas/if_usb.c b/drivers/net/wireless/libertas/if_usb.c
index ea3dc038be76..d649caebf08a 100644
--- a/drivers/net/wireless/libertas/if_usb.c
+++ b/drivers/net/wireless/libertas/if_usb.c
@@ -686,8 +686,7 @@ static inline void process_cmdrequest(int recvlength, uint8_t *recvbuff,
686 return; 686 return;
687 } 687 }
688 688
689 if (!in_interrupt()) 689 BUG_ON(!in_interrupt());
690 BUG();
691 690
692 spin_lock(&priv->driver_lock); 691 spin_lock(&priv->driver_lock);
693 692
diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c
index 8ae935ac32f1..a58a12352672 100644
--- a/drivers/net/wireless/libertas/main.c
+++ b/drivers/net/wireless/libertas/main.c
@@ -1002,9 +1002,17 @@ static int lbs_setup_firmware(struct lbs_private *priv)
1002{ 1002{
1003 int ret = -1; 1003 int ret = -1;
1004 s16 curlevel = 0, minlevel = 0, maxlevel = 0; 1004 s16 curlevel = 0, minlevel = 0, maxlevel = 0;
1005 struct cmd_header cmd;
1005 1006
1006 lbs_deb_enter(LBS_DEB_FW); 1007 lbs_deb_enter(LBS_DEB_FW);
1007 1008
1009 if (priv->fn_init_required) {
1010 memset(&cmd, 0, sizeof(cmd));
1011 if (__lbs_cmd(priv, CMD_FUNC_INIT, &cmd, sizeof(cmd),
1012 lbs_cmd_copyback, (unsigned long) &cmd))
1013 lbs_pr_alert("CMD_FUNC_INIT command failed\n");
1014 }
1015
1008 /* Read MAC address from firmware */ 1016 /* Read MAC address from firmware */
1009 memset(priv->current_addr, 0xff, ETH_ALEN); 1017 memset(priv->current_addr, 0xff, ETH_ALEN);
1010 ret = lbs_update_hw_spec(priv); 1018 ret = lbs_update_hw_spec(priv);
@@ -1192,6 +1200,9 @@ struct lbs_private *lbs_add_card(void *card, struct device *dmdev)
1192 priv->mesh_open = 0; 1200 priv->mesh_open = 0;
1193 priv->infra_open = 0; 1201 priv->infra_open = 0;
1194 1202
1203 priv->fn_init_required = 0;
1204 priv->fn_shutdown_required = 0;
1205
1195 /* Setup the OS Interface to our functions */ 1206 /* Setup the OS Interface to our functions */
1196 dev->netdev_ops = &lbs_netdev_ops; 1207 dev->netdev_ops = &lbs_netdev_ops;
1197 dev->watchdog_timeo = 5 * HZ; 1208 dev->watchdog_timeo = 5 * HZ;
@@ -1307,8 +1318,10 @@ int lbs_start_card(struct lbs_private *priv)
1307 1318
1308 lbs_update_channel(priv); 1319 lbs_update_channel(priv);
1309 1320
1310 /* 5.0.16p0 is known to NOT support any mesh */ 1321 /* Check mesh FW version and appropriately send the mesh start
1311 if (priv->fwrelease > 0x05001000) { 1322 * command
1323 */
1324 if (priv->mesh_fw_ver == MESH_FW_OLD) {
1312 /* Enable mesh, if supported, and work out which TLV it uses. 1325 /* Enable mesh, if supported, and work out which TLV it uses.
1313 0x100 + 291 is an unofficial value used in 5.110.20.pXX 1326 0x100 + 291 is an unofficial value used in 5.110.20.pXX
1314 0x100 + 37 is the official value used in 5.110.21.pXX 1327 0x100 + 37 is the official value used in 5.110.21.pXX
@@ -1322,27 +1335,35 @@ int lbs_start_card(struct lbs_private *priv)
1322 It's just that 5.110.20.pXX will not have done anything 1335 It's just that 5.110.20.pXX will not have done anything
1323 useful */ 1336 useful */
1324 1337
1325 priv->mesh_tlv = 0x100 + 291; 1338 priv->mesh_tlv = TLV_TYPE_OLD_MESH_ID;
1326 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START, 1339 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
1327 priv->curbssparams.channel)) { 1340 priv->curbssparams.channel)) {
1328 priv->mesh_tlv = 0x100 + 37; 1341 priv->mesh_tlv = TLV_TYPE_MESH_ID;
1329 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START, 1342 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
1330 priv->curbssparams.channel)) 1343 priv->curbssparams.channel))
1331 priv->mesh_tlv = 0; 1344 priv->mesh_tlv = 0;
1332 } 1345 }
1333 if (priv->mesh_tlv) { 1346 } else if (priv->mesh_fw_ver == MESH_FW_NEW) {
1334 lbs_add_mesh(priv); 1347 /* 10.0.0.pXX new firmwares should succeed with TLV
1335 1348 * 0x100+37; Do not invoke command with old TLV.
1336 if (device_create_file(&dev->dev, &dev_attr_lbs_mesh)) 1349 */
1337 lbs_pr_err("cannot register lbs_mesh attribute\n"); 1350 priv->mesh_tlv = TLV_TYPE_MESH_ID;
1338 1351 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
1339 /* While rtap isn't related to mesh, only mesh-enabled 1352 priv->curbssparams.channel))
1340 * firmware implements the rtap functionality via 1353 priv->mesh_tlv = 0;
1341 * CMD_802_11_MONITOR_MODE. 1354 }
1342 */ 1355 if (priv->mesh_tlv) {
1343 if (device_create_file(&dev->dev, &dev_attr_lbs_rtap)) 1356 lbs_add_mesh(priv);
1344 lbs_pr_err("cannot register lbs_rtap attribute\n"); 1357
1345 } 1358 if (device_create_file(&dev->dev, &dev_attr_lbs_mesh))
1359 lbs_pr_err("cannot register lbs_mesh attribute\n");
1360
1361 /* While rtap isn't related to mesh, only mesh-enabled
1362 * firmware implements the rtap functionality via
1363 * CMD_802_11_MONITOR_MODE.
1364 */
1365 if (device_create_file(&dev->dev, &dev_attr_lbs_rtap))
1366 lbs_pr_err("cannot register lbs_rtap attribute\n");
1346 } 1367 }
1347 1368
1348 lbs_debugfs_init_one(priv, dev); 1369 lbs_debugfs_init_one(priv, dev);
@@ -1363,11 +1384,20 @@ void lbs_stop_card(struct lbs_private *priv)
1363 struct net_device *dev; 1384 struct net_device *dev;
1364 struct cmd_ctrl_node *cmdnode; 1385 struct cmd_ctrl_node *cmdnode;
1365 unsigned long flags; 1386 unsigned long flags;
1387 struct cmd_header cmd;
1366 1388
1367 lbs_deb_enter(LBS_DEB_MAIN); 1389 lbs_deb_enter(LBS_DEB_MAIN);
1368 1390
1369 if (!priv) 1391 if (!priv)
1370 goto out; 1392 goto out;
1393
1394 if (priv->fn_shutdown_required) {
1395 memset(&cmd, 0, sizeof(cmd));
1396 if (__lbs_cmd(priv, CMD_FUNC_SHUTDOWN, &cmd, sizeof(cmd),
1397 lbs_cmd_copyback, (unsigned long) &cmd))
1398 lbs_pr_alert("CMD_FUNC_SHUTDOWN command failed\n");
1399 }
1400
1371 dev = priv->dev; 1401 dev = priv->dev;
1372 1402
1373 netif_stop_queue(dev); 1403 netif_stop_queue(dev);
diff --git a/drivers/net/wireless/libertas/rx.c b/drivers/net/wireless/libertas/rx.c
index 8e669775cb5d..65f02cc6752f 100644
--- a/drivers/net/wireless/libertas/rx.c
+++ b/drivers/net/wireless/libertas/rx.c
@@ -25,7 +25,6 @@ struct rfc1042hdr {
25} __attribute__ ((packed)); 25} __attribute__ ((packed));
26 26
27struct rxpackethdr { 27struct rxpackethdr {
28 struct rxpd rx_pd;
29 struct eth803hdr eth803_hdr; 28 struct eth803hdr eth803_hdr;
30 struct rfc1042hdr rfc1042_hdr; 29 struct rfc1042hdr rfc1042_hdr;
31} __attribute__ ((packed)); 30} __attribute__ ((packed));
@@ -158,10 +157,18 @@ int lbs_process_rxed_packet(struct lbs_private *priv, struct sk_buff *skb)
158 if (priv->monitormode) 157 if (priv->monitormode)
159 return process_rxed_802_11_packet(priv, skb); 158 return process_rxed_802_11_packet(priv, skb);
160 159
161 p_rx_pkt = (struct rxpackethdr *) skb->data; 160 p_rx_pd = (struct rxpd *) skb->data;
162 p_rx_pd = &p_rx_pkt->rx_pd; 161 p_rx_pkt = (struct rxpackethdr *) ((u8 *)p_rx_pd +
163 if (priv->mesh_dev && (p_rx_pd->rx_control & RxPD_MESH_FRAME)) 162 le32_to_cpu(p_rx_pd->pkt_ptr));
164 dev = priv->mesh_dev; 163 if (priv->mesh_dev) {
164 if (priv->mesh_fw_ver == MESH_FW_OLD) {
165 if (p_rx_pd->rx_control & RxPD_MESH_FRAME)
166 dev = priv->mesh_dev;
167 } else if (priv->mesh_fw_ver == MESH_FW_NEW) {
168 if (p_rx_pd->u.bss.bss_num == MESH_IFACE_ID)
169 dev = priv->mesh_dev;
170 }
171 }
165 172
166 lbs_deb_hex(LBS_DEB_RX, "RX Data: Before chop rxpd", skb->data, 173 lbs_deb_hex(LBS_DEB_RX, "RX Data: Before chop rxpd", skb->data,
167 min_t(unsigned int, skb->len, 100)); 174 min_t(unsigned int, skb->len, 100));
@@ -174,20 +181,9 @@ int lbs_process_rxed_packet(struct lbs_private *priv, struct sk_buff *skb)
174 goto done; 181 goto done;
175 } 182 }
176 183
177 /* 184 lbs_deb_rx("rx data: skb->len - pkt_ptr = %d-%zd = %zd\n",
178 * Check rxpd status and update 802.3 stat, 185 skb->len, (size_t)le32_to_cpu(p_rx_pd->pkt_ptr),
179 */ 186 skb->len - (size_t)le32_to_cpu(p_rx_pd->pkt_ptr));
180 if (!(p_rx_pd->status & cpu_to_le16(MRVDRV_RXPD_STATUS_OK))) {
181 lbs_deb_rx("rx err: frame received with bad status\n");
182 lbs_pr_alert("rxpd not ok\n");
183 dev->stats.rx_errors++;
184 ret = 0;
185 dev_kfree_skb(skb);
186 goto done;
187 }
188
189 lbs_deb_rx("rx data: skb->len-sizeof(RxPd) = %d-%zd = %zd\n",
190 skb->len, sizeof(struct rxpd), skb->len - sizeof(struct rxpd));
191 187
192 lbs_deb_hex(LBS_DEB_RX, "RX Data: Dest", p_rx_pkt->eth803_hdr.dest_addr, 188 lbs_deb_hex(LBS_DEB_RX, "RX Data: Dest", p_rx_pkt->eth803_hdr.dest_addr,
193 sizeof(p_rx_pkt->eth803_hdr.dest_addr)); 189 sizeof(p_rx_pkt->eth803_hdr.dest_addr));
@@ -221,14 +217,14 @@ int lbs_process_rxed_packet(struct lbs_private *priv, struct sk_buff *skb)
221 /* Chop off the rxpd + the excess memory from the 802.2/llc/snap header 217 /* Chop off the rxpd + the excess memory from the 802.2/llc/snap header
222 * that was removed 218 * that was removed
223 */ 219 */
224 hdrchop = (u8 *) p_ethhdr - (u8 *) p_rx_pkt; 220 hdrchop = (u8 *)p_ethhdr - (u8 *)p_rx_pd;
225 } else { 221 } else {
226 lbs_deb_hex(LBS_DEB_RX, "RX Data: LLC/SNAP", 222 lbs_deb_hex(LBS_DEB_RX, "RX Data: LLC/SNAP",
227 (u8 *) & p_rx_pkt->rfc1042_hdr, 223 (u8 *) & p_rx_pkt->rfc1042_hdr,
228 sizeof(p_rx_pkt->rfc1042_hdr)); 224 sizeof(p_rx_pkt->rfc1042_hdr));
229 225
230 /* Chop off the rxpd */ 226 /* Chop off the rxpd */
231 hdrchop = (u8 *) & p_rx_pkt->eth803_hdr - (u8 *) p_rx_pkt; 227 hdrchop = (u8 *)&p_rx_pkt->eth803_hdr - (u8 *)p_rx_pd;
232 } 228 }
233 229
234 /* Chop off the leading header bytes so the skb points to the start of 230 /* Chop off the leading header bytes so the skb points to the start of
@@ -334,14 +330,6 @@ static int process_rxed_802_11_packet(struct lbs_private *priv,
334 goto done; 330 goto done;
335 } 331 }
336 332
337 /*
338 * Check rxpd status and update 802.3 stat,
339 */
340 if (!(prxpd->status & cpu_to_le16(MRVDRV_RXPD_STATUS_OK))) {
341 //lbs_deb_rx("rx err: frame received with bad status\n");
342 dev->stats.rx_errors++;
343 }
344
345 lbs_deb_rx("rx data: skb->len-sizeof(RxPd) = %d-%zd = %zd\n", 333 lbs_deb_rx("rx data: skb->len-sizeof(RxPd) = %d-%zd = %zd\n",
346 skb->len, sizeof(struct rxpd), skb->len - sizeof(struct rxpd)); 334 skb->len, sizeof(struct rxpd), skb->len - sizeof(struct rxpd));
347 335
@@ -353,8 +341,6 @@ static int process_rxed_802_11_packet(struct lbs_private *priv,
353 radiotap_hdr.hdr.it_pad = 0; 341 radiotap_hdr.hdr.it_pad = 0;
354 radiotap_hdr.hdr.it_len = cpu_to_le16 (sizeof(struct rx_radiotap_hdr)); 342 radiotap_hdr.hdr.it_len = cpu_to_le16 (sizeof(struct rx_radiotap_hdr));
355 radiotap_hdr.hdr.it_present = cpu_to_le32 (RX_RADIOTAP_PRESENT); 343 radiotap_hdr.hdr.it_present = cpu_to_le32 (RX_RADIOTAP_PRESENT);
356 if (!(prxpd->status & cpu_to_le16(MRVDRV_RXPD_STATUS_OK)))
357 radiotap_hdr.flags |= IEEE80211_RADIOTAP_F_BADFCS;
358 radiotap_hdr.rate = convert_mv_rate_to_radiotap(prxpd->rx_rate); 344 radiotap_hdr.rate = convert_mv_rate_to_radiotap(prxpd->rx_rate);
359 /* XXX must check no carryout */ 345 /* XXX must check no carryout */
360 radiotap_hdr.antsignal = prxpd->snr + prxpd->nf; 346 radiotap_hdr.antsignal = prxpd->snr + prxpd->nf;
diff --git a/drivers/net/wireless/libertas/tx.c b/drivers/net/wireless/libertas/tx.c
index f10aa39a6b68..160cfd8311c0 100644
--- a/drivers/net/wireless/libertas/tx.c
+++ b/drivers/net/wireless/libertas/tx.c
@@ -132,8 +132,12 @@ int lbs_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
132 txpd->tx_packet_length = cpu_to_le16(pkt_len); 132 txpd->tx_packet_length = cpu_to_le16(pkt_len);
133 txpd->tx_packet_location = cpu_to_le32(sizeof(struct txpd)); 133 txpd->tx_packet_location = cpu_to_le32(sizeof(struct txpd));
134 134
135 if (dev == priv->mesh_dev) 135 if (dev == priv->mesh_dev) {
136 txpd->tx_control |= cpu_to_le32(TxPD_MESH_FRAME); 136 if (priv->mesh_fw_ver == MESH_FW_OLD)
137 txpd->tx_control |= cpu_to_le32(TxPD_MESH_FRAME);
138 else if (priv->mesh_fw_ver == MESH_FW_NEW)
139 txpd->u.bss.bss_num = MESH_IFACE_ID;
140 }
137 141
138 lbs_deb_hex(LBS_DEB_TX, "txpd", (u8 *) &txpd, sizeof(struct txpd)); 142 lbs_deb_hex(LBS_DEB_TX, "txpd", (u8 *) &txpd, sizeof(struct txpd));
139 143
diff --git a/drivers/net/wireless/libertas/types.h b/drivers/net/wireless/libertas/types.h
index fb7a2d1a2525..de03b9c9c204 100644
--- a/drivers/net/wireless/libertas/types.h
+++ b/drivers/net/wireless/libertas/types.h
@@ -94,6 +94,8 @@ struct ieeetypes_assocrsp {
94#define TLV_TYPE_TSFTIMESTAMP (PROPRIETARY_TLV_BASE_ID + 19) 94#define TLV_TYPE_TSFTIMESTAMP (PROPRIETARY_TLV_BASE_ID + 19)
95#define TLV_TYPE_RSSI_HIGH (PROPRIETARY_TLV_BASE_ID + 22) 95#define TLV_TYPE_RSSI_HIGH (PROPRIETARY_TLV_BASE_ID + 22)
96#define TLV_TYPE_SNR_HIGH (PROPRIETARY_TLV_BASE_ID + 23) 96#define TLV_TYPE_SNR_HIGH (PROPRIETARY_TLV_BASE_ID + 23)
97#define TLV_TYPE_MESH_ID (PROPRIETARY_TLV_BASE_ID + 37)
98#define TLV_TYPE_OLD_MESH_ID (PROPRIETARY_TLV_BASE_ID + 291)
97 99
98/** TLV related data structures*/ 100/** TLV related data structures*/
99struct mrvlietypesheader { 101struct mrvlietypesheader {
diff --git a/drivers/net/wireless/libertas_tf/if_usb.c b/drivers/net/wireless/libertas_tf/if_usb.c
index 59634c33b1f9..392337b37b1d 100644
--- a/drivers/net/wireless/libertas_tf/if_usb.c
+++ b/drivers/net/wireless/libertas_tf/if_usb.c
@@ -461,8 +461,7 @@ static inline void process_cmdrequest(int recvlength, uint8_t *recvbuff,
461 return; 461 return;
462 } 462 }
463 463
464 if (!in_interrupt()) 464 BUG_ON(!in_interrupt());
465 BUG();
466 465
467 spin_lock(&priv->driver_lock); 466 spin_lock(&priv->driver_lock);
468 memcpy(priv->cmd_resp_buff, recvbuff + MESSAGE_HEADER_LEN, 467 memcpy(priv->cmd_resp_buff, recvbuff + MESSAGE_HEADER_LEN,
diff --git a/drivers/net/wireless/libertas_tf/main.c b/drivers/net/wireless/libertas_tf/main.c
index e7289e2e7f16..10a99e26d392 100644
--- a/drivers/net/wireless/libertas_tf/main.c
+++ b/drivers/net/wireless/libertas_tf/main.c
@@ -366,36 +366,6 @@ static int lbtf_op_config(struct ieee80211_hw *hw, u32 changed)
366 return 0; 366 return 0;
367} 367}
368 368
369static int lbtf_op_config_interface(struct ieee80211_hw *hw,
370 struct ieee80211_vif *vif,
371 struct ieee80211_if_conf *conf)
372{
373 struct lbtf_private *priv = hw->priv;
374 struct sk_buff *beacon;
375
376 switch (priv->vif->type) {
377 case NL80211_IFTYPE_AP:
378 case NL80211_IFTYPE_MESH_POINT:
379 beacon = ieee80211_beacon_get(hw, vif);
380 if (beacon) {
381 lbtf_beacon_set(priv, beacon);
382 kfree_skb(beacon);
383 lbtf_beacon_ctrl(priv, 1, hw->conf.beacon_int);
384 }
385 break;
386 default:
387 break;
388 }
389
390 if (conf->bssid) {
391 u8 null_bssid[ETH_ALEN] = {0};
392 bool activate = compare_ether_addr(conf->bssid, null_bssid);
393 lbtf_set_bssid(priv, activate, conf->bssid);
394 }
395
396 return 0;
397}
398
399#define SUPPORTED_FIF_FLAGS (FIF_PROMISC_IN_BSS | FIF_ALLMULTI) 369#define SUPPORTED_FIF_FLAGS (FIF_PROMISC_IN_BSS | FIF_ALLMULTI)
400static void lbtf_op_configure_filter(struct ieee80211_hw *hw, 370static void lbtf_op_configure_filter(struct ieee80211_hw *hw,
401 unsigned int changed_flags, 371 unsigned int changed_flags,
@@ -451,6 +421,29 @@ static void lbtf_op_bss_info_changed(struct ieee80211_hw *hw,
451 u32 changes) 421 u32 changes)
452{ 422{
453 struct lbtf_private *priv = hw->priv; 423 struct lbtf_private *priv = hw->priv;
424 struct sk_buff *beacon;
425
426 if (changes & (BSS_CHANGED_BEACON | BSS_CHANGED_BEACON_INT)) {
427 switch (priv->vif->type) {
428 case NL80211_IFTYPE_AP:
429 case NL80211_IFTYPE_MESH_POINT:
430 beacon = ieee80211_beacon_get(hw, vif);
431 if (beacon) {
432 lbtf_beacon_set(priv, beacon);
433 kfree_skb(beacon);
434 lbtf_beacon_ctrl(priv, 1,
435 bss_conf->beacon_int);
436 }
437 break;
438 default:
439 break;
440 }
441 }
442
443 if (changes & BSS_CHANGED_BSSID) {
444 bool activate = !is_zero_ether_addr(bss_conf->bssid);
445 lbtf_set_bssid(priv, activate, bss_conf->bssid);
446 }
454 447
455 if (changes & BSS_CHANGED_ERP_PREAMBLE) { 448 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
456 if (bss_conf->use_short_preamble) 449 if (bss_conf->use_short_preamble)
@@ -459,8 +452,6 @@ static void lbtf_op_bss_info_changed(struct ieee80211_hw *hw,
459 priv->preamble = CMD_TYPE_LONG_PREAMBLE; 452 priv->preamble = CMD_TYPE_LONG_PREAMBLE;
460 lbtf_set_radio_control(priv); 453 lbtf_set_radio_control(priv);
461 } 454 }
462
463 return;
464} 455}
465 456
466static const struct ieee80211_ops lbtf_ops = { 457static const struct ieee80211_ops lbtf_ops = {
@@ -470,7 +461,6 @@ static const struct ieee80211_ops lbtf_ops = {
470 .add_interface = lbtf_op_add_interface, 461 .add_interface = lbtf_op_add_interface,
471 .remove_interface = lbtf_op_remove_interface, 462 .remove_interface = lbtf_op_remove_interface,
472 .config = lbtf_op_config, 463 .config = lbtf_op_config,
473 .config_interface = lbtf_op_config_interface,
474 .configure_filter = lbtf_op_configure_filter, 464 .configure_filter = lbtf_op_configure_filter,
475 .bss_info_changed = lbtf_op_bss_info_changed, 465 .bss_info_changed = lbtf_op_bss_info_changed,
476}; 466};
diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c
index d4fdc8b7d7d8..574b8bb121e1 100644
--- a/drivers/net/wireless/mac80211_hwsim.c
+++ b/drivers/net/wireless/mac80211_hwsim.c
@@ -291,6 +291,14 @@ struct mac80211_hwsim_data {
291 bool ps_poll_pending; 291 bool ps_poll_pending;
292 struct dentry *debugfs; 292 struct dentry *debugfs;
293 struct dentry *debugfs_ps; 293 struct dentry *debugfs_ps;
294
295 /*
296 * Only radios in the same group can communicate together (the
297 * channel has to match too). Each bit represents a group. A
298 * radio can be in more then one group.
299 */
300 u64 group;
301 struct dentry *debugfs_group;
294}; 302};
295 303
296 304
@@ -412,7 +420,8 @@ static bool mac80211_hwsim_tx_frame(struct ieee80211_hw *hw,
412 420
413 if (!data2->started || !data2->radio_enabled || 421 if (!data2->started || !data2->radio_enabled ||
414 !hwsim_ps_rx_ok(data2, skb) || 422 !hwsim_ps_rx_ok(data2, skb) ||
415 data->channel->center_freq != data2->channel->center_freq) 423 data->channel->center_freq != data2->channel->center_freq ||
424 !(data->group & data2->group))
416 continue; 425 continue;
417 426
418 nskb = skb_copy(skb, GFP_ATOMIC); 427 nskb = skb_copy(skb, GFP_ATOMIC);
@@ -553,18 +562,15 @@ static int mac80211_hwsim_config(struct ieee80211_hw *hw, u32 changed)
553 struct mac80211_hwsim_data *data = hw->priv; 562 struct mac80211_hwsim_data *data = hw->priv;
554 struct ieee80211_conf *conf = &hw->conf; 563 struct ieee80211_conf *conf = &hw->conf;
555 564
556 printk(KERN_DEBUG "%s:%s (freq=%d radio_enabled=%d beacon_int=%d)\n", 565 printk(KERN_DEBUG "%s:%s (freq=%d radio_enabled=%d idle=%d ps=%d)\n",
557 wiphy_name(hw->wiphy), __func__, 566 wiphy_name(hw->wiphy), __func__,
558 conf->channel->center_freq, conf->radio_enabled, 567 conf->channel->center_freq, conf->radio_enabled,
559 conf->beacon_int); 568 !!(conf->flags & IEEE80211_CONF_IDLE),
569 !!(conf->flags & IEEE80211_CONF_PS));
560 570
561 data->channel = conf->channel; 571 data->channel = conf->channel;
562 data->radio_enabled = conf->radio_enabled; 572 data->radio_enabled = conf->radio_enabled;
563 data->beacon_int = 1024 * conf->beacon_int / 1000 * HZ / 1000; 573 if (!data->started || !data->radio_enabled || !data->beacon_int)
564 if (data->beacon_int < 1)
565 data->beacon_int = 1;
566
567 if (!data->started || !data->radio_enabled)
568 del_timer(&data->beacon_timer); 574 del_timer(&data->beacon_timer);
569 else 575 else
570 mod_timer(&data->beacon_timer, jiffies + data->beacon_int); 576 mod_timer(&data->beacon_timer, jiffies + data->beacon_int);
@@ -592,35 +598,26 @@ static void mac80211_hwsim_configure_filter(struct ieee80211_hw *hw,
592 *total_flags = data->rx_filter; 598 *total_flags = data->rx_filter;
593} 599}
594 600
595static int mac80211_hwsim_config_interface(struct ieee80211_hw *hw,
596 struct ieee80211_vif *vif,
597 struct ieee80211_if_conf *conf)
598{
599 struct hwsim_vif_priv *vp = (void *)vif->drv_priv;
600
601 hwsim_check_magic(vif);
602 if (conf->changed & IEEE80211_IFCC_BSSID) {
603 DECLARE_MAC_BUF(mac);
604 printk(KERN_DEBUG "%s:%s: BSSID changed: %pM\n",
605 wiphy_name(hw->wiphy), __func__,
606 conf->bssid);
607 memcpy(vp->bssid, conf->bssid, ETH_ALEN);
608 }
609 return 0;
610}
611
612static void mac80211_hwsim_bss_info_changed(struct ieee80211_hw *hw, 601static void mac80211_hwsim_bss_info_changed(struct ieee80211_hw *hw,
613 struct ieee80211_vif *vif, 602 struct ieee80211_vif *vif,
614 struct ieee80211_bss_conf *info, 603 struct ieee80211_bss_conf *info,
615 u32 changed) 604 u32 changed)
616{ 605{
617 struct hwsim_vif_priv *vp = (void *)vif->drv_priv; 606 struct hwsim_vif_priv *vp = (void *)vif->drv_priv;
607 struct mac80211_hwsim_data *data = hw->priv;
618 608
619 hwsim_check_magic(vif); 609 hwsim_check_magic(vif);
620 610
621 printk(KERN_DEBUG "%s:%s(changed=0x%x)\n", 611 printk(KERN_DEBUG "%s:%s(changed=0x%x)\n",
622 wiphy_name(hw->wiphy), __func__, changed); 612 wiphy_name(hw->wiphy), __func__, changed);
623 613
614 if (changed & BSS_CHANGED_BSSID) {
615 printk(KERN_DEBUG "%s:%s: BSSID changed: %pM\n",
616 wiphy_name(hw->wiphy), __func__,
617 info->bssid);
618 memcpy(vp->bssid, info->bssid, ETH_ALEN);
619 }
620
624 if (changed & BSS_CHANGED_ASSOC) { 621 if (changed & BSS_CHANGED_ASSOC) {
625 printk(KERN_DEBUG " %s: ASSOC: assoc=%d aid=%d\n", 622 printk(KERN_DEBUG " %s: ASSOC: assoc=%d aid=%d\n",
626 wiphy_name(hw->wiphy), info->assoc, info->aid); 623 wiphy_name(hw->wiphy), info->assoc, info->aid);
@@ -628,6 +625,14 @@ static void mac80211_hwsim_bss_info_changed(struct ieee80211_hw *hw,
628 vp->aid = info->aid; 625 vp->aid = info->aid;
629 } 626 }
630 627
628 if (changed & BSS_CHANGED_BEACON_INT) {
629 printk(KERN_DEBUG " %s: BCNINT: %d\n",
630 wiphy_name(hw->wiphy), info->beacon_int);
631 data->beacon_int = 1024 * info->beacon_int / 1000 * HZ / 1000;
632 if (WARN_ON(!data->beacon_int))
633 data->beacon_int = 1;
634 }
635
631 if (changed & BSS_CHANGED_ERP_CTS_PROT) { 636 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
632 printk(KERN_DEBUG " %s: ERP_CTS_PROT: %d\n", 637 printk(KERN_DEBUG " %s: ERP_CTS_PROT: %d\n",
633 wiphy_name(hw->wiphy), info->use_cts_prot); 638 wiphy_name(hw->wiphy), info->use_cts_prot);
@@ -646,7 +651,7 @@ static void mac80211_hwsim_bss_info_changed(struct ieee80211_hw *hw,
646 if (changed & BSS_CHANGED_HT) { 651 if (changed & BSS_CHANGED_HT) {
647 printk(KERN_DEBUG " %s: HT: op_mode=0x%x\n", 652 printk(KERN_DEBUG " %s: HT: op_mode=0x%x\n",
648 wiphy_name(hw->wiphy), 653 wiphy_name(hw->wiphy),
649 info->ht.operation_mode); 654 info->ht_operation_mode);
650 } 655 }
651 656
652 if (changed & BSS_CHANGED_BASIC_RATES) { 657 if (changed & BSS_CHANGED_BASIC_RATES) {
@@ -704,7 +709,6 @@ static const struct ieee80211_ops mac80211_hwsim_ops =
704 .remove_interface = mac80211_hwsim_remove_interface, 709 .remove_interface = mac80211_hwsim_remove_interface,
705 .config = mac80211_hwsim_config, 710 .config = mac80211_hwsim_config,
706 .configure_filter = mac80211_hwsim_configure_filter, 711 .configure_filter = mac80211_hwsim_configure_filter,
707 .config_interface = mac80211_hwsim_config_interface,
708 .bss_info_changed = mac80211_hwsim_bss_info_changed, 712 .bss_info_changed = mac80211_hwsim_bss_info_changed,
709 .sta_notify = mac80211_hwsim_sta_notify, 713 .sta_notify = mac80211_hwsim_sta_notify,
710 .set_tim = mac80211_hwsim_set_tim, 714 .set_tim = mac80211_hwsim_set_tim,
@@ -725,6 +729,7 @@ static void mac80211_hwsim_free(void)
725 spin_unlock_bh(&hwsim_radio_lock); 729 spin_unlock_bh(&hwsim_radio_lock);
726 730
727 list_for_each_entry(data, &tmplist, list) { 731 list_for_each_entry(data, &tmplist, list) {
732 debugfs_remove(data->debugfs_group);
728 debugfs_remove(data->debugfs_ps); 733 debugfs_remove(data->debugfs_ps);
729 debugfs_remove(data->debugfs); 734 debugfs_remove(data->debugfs);
730 ieee80211_unregister_hw(data->hw); 735 ieee80211_unregister_hw(data->hw);
@@ -877,6 +882,24 @@ DEFINE_SIMPLE_ATTRIBUTE(hwsim_fops_ps, hwsim_fops_ps_read, hwsim_fops_ps_write,
877 "%llu\n"); 882 "%llu\n");
878 883
879 884
885static int hwsim_fops_group_read(void *dat, u64 *val)
886{
887 struct mac80211_hwsim_data *data = dat;
888 *val = data->group;
889 return 0;
890}
891
892static int hwsim_fops_group_write(void *dat, u64 val)
893{
894 struct mac80211_hwsim_data *data = dat;
895 data->group = val;
896 return 0;
897}
898
899DEFINE_SIMPLE_ATTRIBUTE(hwsim_fops_group,
900 hwsim_fops_group_read, hwsim_fops_group_write,
901 "%llx\n");
902
880static int __init init_mac80211_hwsim(void) 903static int __init init_mac80211_hwsim(void)
881{ 904{
882 int i, err = 0; 905 int i, err = 0;
@@ -981,6 +1004,8 @@ static int __init init_mac80211_hwsim(void)
981 1004
982 hw->wiphy->bands[band] = sband; 1005 hw->wiphy->bands[band] = sband;
983 } 1006 }
1007 /* By default all radios are belonging to the first group */
1008 data->group = 1;
984 1009
985 /* Work to be done prior to ieee80211_register_hw() */ 1010 /* Work to be done prior to ieee80211_register_hw() */
986 switch (regtest) { 1011 switch (regtest) {
@@ -1105,6 +1130,9 @@ static int __init init_mac80211_hwsim(void)
1105 data->debugfs_ps = debugfs_create_file("ps", 0666, 1130 data->debugfs_ps = debugfs_create_file("ps", 0666,
1106 data->debugfs, data, 1131 data->debugfs, data,
1107 &hwsim_fops_ps); 1132 &hwsim_fops_ps);
1133 data->debugfs_group = debugfs_create_file("group", 0666,
1134 data->debugfs, data,
1135 &hwsim_fops_group);
1108 1136
1109 setup_timer(&data->beacon_timer, mac80211_hwsim_beacon, 1137 setup_timer(&data->beacon_timer, mac80211_hwsim_beacon,
1110 (unsigned long) hw); 1138 (unsigned long) hw);
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c
index a9a970469c2a..a263d5c84c08 100644
--- a/drivers/net/wireless/mwl8k.c
+++ b/drivers/net/wireless/mwl8k.c
@@ -2369,7 +2369,7 @@ static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2369 if (info->use_cts_prot) { 2369 if (info->use_cts_prot) {
2370 prot_mode = MWL8K_FRAME_PROT_11G; 2370 prot_mode = MWL8K_FRAME_PROT_11G;
2371 } else { 2371 } else {
2372 switch (info->ht.operation_mode & 2372 switch (info->ht_operation_mode &
2373 IEEE80211_HT_OP_MODE_PROTECTION) { 2373 IEEE80211_HT_OP_MODE_PROTECTION) {
2374 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: 2374 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2375 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY; 2375 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
@@ -3089,19 +3089,6 @@ static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3089 return rc ? -EINVAL : 0; 3089 return rc ? -EINVAL : 0;
3090} 3090}
3091 3091
3092static int mwl8k_config_interface(struct ieee80211_hw *hw,
3093 struct ieee80211_vif *vif,
3094 struct ieee80211_if_conf *conf)
3095{
3096 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
3097 u32 changed = conf->changed;
3098
3099 if (changed & IEEE80211_IFCC_BSSID)
3100 memcpy(mv_vif->bssid, conf->bssid, IEEE80211_ADDR_LEN);
3101
3102 return 0;
3103}
3104
3105struct mwl8k_bss_info_changed_worker { 3092struct mwl8k_bss_info_changed_worker {
3106 struct mwl8k_work_struct header; 3093 struct mwl8k_work_struct header;
3107 struct ieee80211_vif *vif; 3094 struct ieee80211_vif *vif;
@@ -3183,8 +3170,12 @@ static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3183{ 3170{
3184 struct mwl8k_bss_info_changed_worker *worker; 3171 struct mwl8k_bss_info_changed_worker *worker;
3185 struct mwl8k_priv *priv = hw->priv; 3172 struct mwl8k_priv *priv = hw->priv;
3173 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
3186 int rc; 3174 int rc;
3187 3175
3176 if (changed & BSS_CHANGED_BSSID)
3177 memcpy(mv_vif->bssid, info->bssid, IEEE80211_ADDR_LEN);
3178
3188 if ((changed & BSS_CHANGED_ASSOC) == 0) 3179 if ((changed & BSS_CHANGED_ASSOC) == 0)
3189 return; 3180 return;
3190 3181
@@ -3442,7 +3433,6 @@ static const struct ieee80211_ops mwl8k_ops = {
3442 .add_interface = mwl8k_add_interface, 3433 .add_interface = mwl8k_add_interface,
3443 .remove_interface = mwl8k_remove_interface, 3434 .remove_interface = mwl8k_remove_interface,
3444 .config = mwl8k_config, 3435 .config = mwl8k_config,
3445 .config_interface = mwl8k_config_interface,
3446 .bss_info_changed = mwl8k_bss_info_changed, 3436 .bss_info_changed = mwl8k_bss_info_changed,
3447 .configure_filter = mwl8k_configure_filter, 3437 .configure_filter = mwl8k_configure_filter,
3448 .set_rts_threshold = mwl8k_set_rts_threshold, 3438 .set_rts_threshold = mwl8k_set_rts_threshold,
diff --git a/drivers/net/wireless/p54/p54.h b/drivers/net/wireless/p54/p54.h
index ecf8b6ed5a47..db3df947d8ed 100644
--- a/drivers/net/wireless/p54/p54.h
+++ b/drivers/net/wireless/p54/p54.h
@@ -125,6 +125,7 @@ struct p54_led_dev {
125 struct led_classdev led_dev; 125 struct led_classdev led_dev;
126 char name[P54_LED_MAX_NAME_LEN + 1]; 126 char name[P54_LED_MAX_NAME_LEN + 1];
127 127
128 unsigned int toggled;
128 unsigned int index; 129 unsigned int index;
129 unsigned int registered; 130 unsigned int registered;
130}; 131};
@@ -133,55 +134,74 @@ struct p54_led_dev {
133 134
134struct p54_common { 135struct p54_common {
135 struct ieee80211_hw *hw; 136 struct ieee80211_hw *hw;
136 u32 rx_start; 137 struct ieee80211_vif *vif;
137 u32 rx_end;
138 struct sk_buff_head tx_queue;
139 void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb); 138 void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb);
140 int (*open)(struct ieee80211_hw *dev); 139 int (*open)(struct ieee80211_hw *dev);
141 void (*stop)(struct ieee80211_hw *dev); 140 void (*stop)(struct ieee80211_hw *dev);
142 int mode; 141 struct sk_buff_head tx_queue;
142 struct mutex conf_mutex;
143
144 /* memory management (as seen by the firmware) */
145 u32 rx_start;
146 u32 rx_end;
143 u16 rx_mtu; 147 u16 rx_mtu;
144 u8 headroom; 148 u8 headroom;
145 u8 tailroom; 149 u8 tailroom;
146 struct mutex conf_mutex; 150
147 u8 mac_addr[ETH_ALEN]; 151 /* firmware/hardware info */
148 u8 bssid[ETH_ALEN]; 152 unsigned int tx_hdr_len;
153 unsigned int fw_var;
154 unsigned int fw_interface;
155 u8 version;
156
157 /* (e)DCF / QOS state */
158 bool use_short_slot;
159 struct ieee80211_tx_queue_stats tx_stats[8];
160 struct p54_edcf_queue_param qos_params[8];
161
162 /* Radio data */
163 u16 rxhw;
149 u8 rx_diversity_mask; 164 u8 rx_diversity_mask;
150 u8 tx_diversity_mask; 165 u8 tx_diversity_mask;
166 unsigned int output_power;
167 int noise;
168 /* calibration, output power limit and rssi<->dBm conversation data */
151 struct pda_iq_autocal_entry *iq_autocal; 169 struct pda_iq_autocal_entry *iq_autocal;
152 unsigned int iq_autocal_len; 170 unsigned int iq_autocal_len;
153 struct p54_cal_database *output_limit;
154 struct p54_cal_database *curve_data; 171 struct p54_cal_database *curve_data;
172 struct p54_cal_database *output_limit;
155 struct p54_rssi_linear_approximation rssical_db[IEEE80211_NUM_BANDS]; 173 struct p54_rssi_linear_approximation rssical_db[IEEE80211_NUM_BANDS];
174
175 /* BBP/MAC state */
176 u8 mac_addr[ETH_ALEN];
177 u8 bssid[ETH_ALEN];
178 u16 wakeup_timer;
156 unsigned int filter_flags; 179 unsigned int filter_flags;
157 bool use_short_slot; 180 int mode;
158 u16 rxhw; 181 u32 tsf_low32, tsf_high32;
159 u8 version;
160 unsigned int tx_hdr_len;
161 unsigned int fw_var;
162 unsigned int fw_interface;
163 unsigned int output_power;
164 u32 tsf_low32;
165 u32 tsf_high32;
166 u32 basic_rate_mask; 182 u32 basic_rate_mask;
167 u16 wakeup_timer;
168 u16 aid; 183 u16 aid;
169 struct ieee80211_tx_queue_stats tx_stats[8];
170 struct p54_edcf_queue_param qos_params[8];
171 struct ieee80211_low_level_stats stats;
172 struct delayed_work work;
173 struct sk_buff *cached_beacon; 184 struct sk_buff *cached_beacon;
174 int noise; 185
175 void *eeprom; 186 /* cryptographic engine information */
176 struct completion eeprom_comp;
177 u8 privacy_caps; 187 u8 privacy_caps;
178 u8 rx_keycache_size; 188 u8 rx_keycache_size;
189 unsigned long *used_rxkeys;
190
179 /* LED management */ 191 /* LED management */
180#ifdef CONFIG_P54_LEDS 192#ifdef CONFIG_P54_LEDS
181 struct p54_led_dev assoc_led; 193 struct p54_led_dev leds[4];
182 struct p54_led_dev tx_led; 194 struct delayed_work led_work;
183#endif /* CONFIG_P54_LEDS */ 195#endif /* CONFIG_P54_LEDS */
184 u16 softled_state; /* bit field of glowing LEDs */ 196 u16 softled_state; /* bit field of glowing LEDs */
197
198 /* statistics */
199 struct ieee80211_low_level_stats stats;
200 struct delayed_work work;
201
202 /* eeprom handling */
203 void *eeprom;
204 struct completion eeprom_comp;
185}; 205};
186 206
187int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb); 207int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb);
diff --git a/drivers/net/wireless/p54/p54common.c b/drivers/net/wireless/p54/p54common.c
index c8f0232ee5e0..b618bd14583f 100644
--- a/drivers/net/wireless/p54/p54common.c
+++ b/drivers/net/wireless/p54/p54common.c
@@ -249,7 +249,7 @@ int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
249 dev->queues = P54_QUEUE_AC_NUM; 249 dev->queues = P54_QUEUE_AC_NUM;
250 } 250 }
251 251
252 if (!modparam_nohwcrypt) 252 if (!modparam_nohwcrypt) {
253 printk(KERN_INFO "%s: cryptographic accelerator " 253 printk(KERN_INFO "%s: cryptographic accelerator "
254 "WEP:%s, TKIP:%s, CCMP:%s\n", 254 "WEP:%s, TKIP:%s, CCMP:%s\n",
255 wiphy_name(dev->wiphy), 255 wiphy_name(dev->wiphy),
@@ -259,6 +259,26 @@ int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
259 (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP) ? 259 (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP) ?
260 "YES" : "no"); 260 "YES" : "no");
261 261
262 if (priv->rx_keycache_size) {
263 /*
264 * NOTE:
265 *
266 * The firmware provides at most 255 (0 - 254) slots
267 * for keys which are then used to offload decryption.
268 * As a result the 255 entry (aka 0xff) can be used
269 * safely by the driver to mark keys that didn't fit
270 * into the full cache. This trick saves us from
271 * keeping a extra list for uploaded keys.
272 */
273
274 priv->used_rxkeys = kzalloc(BITS_TO_LONGS(
275 priv->rx_keycache_size), GFP_KERNEL);
276
277 if (!priv->used_rxkeys)
278 return -ENOMEM;
279 }
280 }
281
262 return 0; 282 return 0;
263} 283}
264EXPORT_SYMBOL_GPL(p54_parse_firmware); 284EXPORT_SYMBOL_GPL(p54_parse_firmware);
@@ -749,8 +769,6 @@ static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
749 769
750 rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi); 770 rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
751 rx_status.noise = priv->noise; 771 rx_status.noise = priv->noise;
752 /* XX correct? */
753 rx_status.qual = (100 * hdr->rssi) / 127;
754 if (hdr->rate & 0x10) 772 if (hdr->rate & 0x10)
755 rx_status.flag |= RX_FLAG_SHORTPRE; 773 rx_status.flag |= RX_FLAG_SHORTPRE;
756 if (dev->conf.channel->band == IEEE80211_BAND_5GHZ) 774 if (dev->conf.channel->band == IEEE80211_BAND_5GHZ)
@@ -804,44 +822,37 @@ void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
804 struct ieee80211_tx_info *info; 822 struct ieee80211_tx_info *info;
805 struct p54_tx_info *range; 823 struct p54_tx_info *range;
806 unsigned long flags; 824 unsigned long flags;
807 u32 freed = 0, last_addr = priv->rx_start;
808 825
809 if (unlikely(!skb || !dev || !skb_queue_len(&priv->tx_queue))) 826 if (unlikely(!skb || !dev || skb_queue_empty(&priv->tx_queue)))
810 return; 827 return;
811 828
812 /* 829 /* There used to be a check here to see if the SKB was on the
813 * don't try to free an already unlinked skb 830 * TX queue or not. This can never happen because all SKBs we
831 * see here successfully went through p54_assign_address()
832 * which means the SKB is on the ->tx_queue.
814 */ 833 */
815 if (unlikely((!skb->next) || (!skb->prev)))
816 return;
817 834
818 spin_lock_irqsave(&priv->tx_queue.lock, flags); 835 spin_lock_irqsave(&priv->tx_queue.lock, flags);
819 info = IEEE80211_SKB_CB(skb); 836 info = IEEE80211_SKB_CB(skb);
820 range = (void *)info->rate_driver_data; 837 range = (void *)info->rate_driver_data;
821 if (skb->prev != (struct sk_buff *)&priv->tx_queue) { 838 if (!skb_queue_is_first(&priv->tx_queue, skb)) {
822 struct ieee80211_tx_info *ni; 839 struct ieee80211_tx_info *ni;
823 struct p54_tx_info *mr; 840 struct p54_tx_info *mr;
824 841
825 ni = IEEE80211_SKB_CB(skb->prev); 842 ni = IEEE80211_SKB_CB(skb_queue_prev(&priv->tx_queue, skb));
826 mr = (struct p54_tx_info *)ni->rate_driver_data; 843 mr = (struct p54_tx_info *)ni->rate_driver_data;
827 last_addr = mr->end_addr;
828 } 844 }
829 if (skb->next != (struct sk_buff *)&priv->tx_queue) { 845 if (!skb_queue_is_last(&priv->tx_queue, skb)) {
830 struct ieee80211_tx_info *ni; 846 struct ieee80211_tx_info *ni;
831 struct p54_tx_info *mr; 847 struct p54_tx_info *mr;
832 848
833 ni = IEEE80211_SKB_CB(skb->next); 849 ni = IEEE80211_SKB_CB(skb_queue_next(&priv->tx_queue, skb));
834 mr = (struct p54_tx_info *)ni->rate_driver_data; 850 mr = (struct p54_tx_info *)ni->rate_driver_data;
835 freed = mr->start_addr - last_addr; 851 }
836 } else
837 freed = priv->rx_end - last_addr;
838 __skb_unlink(skb, &priv->tx_queue); 852 __skb_unlink(skb, &priv->tx_queue);
839 spin_unlock_irqrestore(&priv->tx_queue.lock, flags); 853 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
840 dev_kfree_skb_any(skb); 854 dev_kfree_skb_any(skb);
841 855 p54_wake_free_queues(dev);
842 if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
843 IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
844 p54_wake_free_queues(dev);
845} 856}
846EXPORT_SYMBOL_GPL(p54_free_skb); 857EXPORT_SYMBOL_GPL(p54_free_skb);
847 858
@@ -853,15 +864,13 @@ static struct sk_buff *p54_find_tx_entry(struct ieee80211_hw *dev,
853 unsigned long flags; 864 unsigned long flags;
854 865
855 spin_lock_irqsave(&priv->tx_queue.lock, flags); 866 spin_lock_irqsave(&priv->tx_queue.lock, flags);
856 entry = priv->tx_queue.next; 867 skb_queue_walk(&priv->tx_queue, entry) {
857 while (entry != (struct sk_buff *)&priv->tx_queue) {
858 struct p54_hdr *hdr = (struct p54_hdr *) entry->data; 868 struct p54_hdr *hdr = (struct p54_hdr *) entry->data;
859 869
860 if (hdr->req_id == req_id) { 870 if (hdr->req_id == req_id) {
861 spin_unlock_irqrestore(&priv->tx_queue.lock, flags); 871 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
862 return entry; 872 return entry;
863 } 873 }
864 entry = entry->next;
865 } 874 }
866 spin_unlock_irqrestore(&priv->tx_queue.lock, flags); 875 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
867 return NULL; 876 return NULL;
@@ -875,37 +884,29 @@ static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
875 struct sk_buff *entry; 884 struct sk_buff *entry;
876 u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom; 885 u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
877 struct p54_tx_info *range = NULL; 886 struct p54_tx_info *range = NULL;
878 u32 freed = 0;
879 u32 last_addr = priv->rx_start;
880 unsigned long flags; 887 unsigned long flags;
881 int count, idx; 888 int count, idx;
882 889
883 spin_lock_irqsave(&priv->tx_queue.lock, flags); 890 spin_lock_irqsave(&priv->tx_queue.lock, flags);
884 entry = (struct sk_buff *) priv->tx_queue.next; 891 skb_queue_walk(&priv->tx_queue, entry) {
885 while (entry != (struct sk_buff *)&priv->tx_queue) {
886 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry); 892 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
887 struct p54_hdr *entry_hdr; 893 struct p54_hdr *entry_hdr;
888 struct p54_tx_data *entry_data; 894 struct p54_tx_data *entry_data;
889 unsigned int pad = 0, frame_len; 895 unsigned int pad = 0, frame_len;
890 896
891 range = (void *)info->rate_driver_data; 897 range = (void *)info->rate_driver_data;
892 if (range->start_addr != addr) { 898 if (range->start_addr != addr)
893 last_addr = range->end_addr;
894 entry = entry->next;
895 continue; 899 continue;
896 }
897 900
898 if (entry->next != (struct sk_buff *)&priv->tx_queue) { 901 if (!skb_queue_is_last(&priv->tx_queue, entry)) {
899 struct ieee80211_tx_info *ni; 902 struct ieee80211_tx_info *ni;
900 struct p54_tx_info *mr; 903 struct p54_tx_info *mr;
901 904
902 ni = IEEE80211_SKB_CB(entry->next); 905 ni = IEEE80211_SKB_CB(skb_queue_next(&priv->tx_queue,
906 entry));
903 mr = (struct p54_tx_info *)ni->rate_driver_data; 907 mr = (struct p54_tx_info *)ni->rate_driver_data;
904 freed = mr->start_addr - last_addr; 908 }
905 } else
906 freed = priv->rx_end - last_addr;
907 909
908 last_addr = range->end_addr;
909 __skb_unlink(entry, &priv->tx_queue); 910 __skb_unlink(entry, &priv->tx_queue);
910 spin_unlock_irqrestore(&priv->tx_queue.lock, flags); 911 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
911 912
@@ -992,9 +993,7 @@ static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
992 spin_unlock_irqrestore(&priv->tx_queue.lock, flags); 993 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
993 994
994out: 995out:
995 if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 + 996 p54_wake_free_queues(dev);
996 IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
997 p54_wake_free_queues(dev);
998} 997}
999 998
1000static void p54_rx_eeprom_readback(struct ieee80211_hw *dev, 999static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
@@ -1044,6 +1043,7 @@ static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
1044 1043
1045static void p54_rx_trap(struct ieee80211_hw *dev, struct sk_buff *skb) 1044static void p54_rx_trap(struct ieee80211_hw *dev, struct sk_buff *skb)
1046{ 1045{
1046 struct p54_common *priv = dev->priv;
1047 struct p54_hdr *hdr = (struct p54_hdr *) skb->data; 1047 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
1048 struct p54_trap *trap = (struct p54_trap *) hdr->data; 1048 struct p54_trap *trap = (struct p54_trap *) hdr->data;
1049 u16 event = le16_to_cpu(trap->event); 1049 u16 event = le16_to_cpu(trap->event);
@@ -1057,6 +1057,8 @@ static void p54_rx_trap(struct ieee80211_hw *dev, struct sk_buff *skb)
1057 wiphy_name(dev->wiphy), freq); 1057 wiphy_name(dev->wiphy), freq);
1058 break; 1058 break;
1059 case P54_TRAP_NO_BEACON: 1059 case P54_TRAP_NO_BEACON:
1060 if (priv->vif)
1061 ieee80211_beacon_loss(priv->vif);
1060 break; 1062 break;
1061 case P54_TRAP_SCAN: 1063 case P54_TRAP_SCAN:
1062 break; 1064 break;
@@ -1162,23 +1164,21 @@ static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
1162 } 1164 }
1163 } 1165 }
1164 1166
1165 entry = priv->tx_queue.next; 1167 skb_queue_walk(&priv->tx_queue, entry) {
1166 while (left--) {
1167 u32 hole_size; 1168 u32 hole_size;
1168 info = IEEE80211_SKB_CB(entry); 1169 info = IEEE80211_SKB_CB(entry);
1169 range = (void *)info->rate_driver_data; 1170 range = (void *)info->rate_driver_data;
1170 hole_size = range->start_addr - last_addr; 1171 hole_size = range->start_addr - last_addr;
1171 if (!target_skb && hole_size >= len) { 1172 if (!target_skb && hole_size >= len) {
1172 target_skb = entry->prev; 1173 target_skb = skb_queue_prev(&priv->tx_queue, entry);
1173 hole_size -= len; 1174 hole_size -= len;
1174 target_addr = last_addr; 1175 target_addr = last_addr;
1175 } 1176 }
1176 largest_hole = max(largest_hole, hole_size); 1177 largest_hole = max(largest_hole, hole_size);
1177 last_addr = range->end_addr; 1178 last_addr = range->end_addr;
1178 entry = entry->next;
1179 } 1179 }
1180 if (!target_skb && priv->rx_end - last_addr >= len) { 1180 if (!target_skb && priv->rx_end - last_addr >= len) {
1181 target_skb = priv->tx_queue.prev; 1181 target_skb = skb_peek_tail(&priv->tx_queue);
1182 largest_hole = max(largest_hole, priv->rx_end - last_addr - len); 1182 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
1183 if (!skb_queue_empty(&priv->tx_queue)) { 1183 if (!skb_queue_empty(&priv->tx_queue)) {
1184 info = IEEE80211_SKB_CB(target_skb); 1184 info = IEEE80211_SKB_CB(target_skb);
@@ -1452,7 +1452,8 @@ static int p54_tx_fill(struct ieee80211_hw *dev, struct sk_buff *skb,
1452 1452
1453 if (info->control.sta) 1453 if (info->control.sta)
1454 *aid = info->control.sta->aid; 1454 *aid = info->control.sta->aid;
1455 else 1455
1456 if (info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
1456 *flags |= P54_HDR_FLAG_DATA_OUT_NOCANCEL; 1457 *flags |= P54_HDR_FLAG_DATA_OUT_NOCANCEL;
1457 break; 1458 break;
1458 } 1459 }
@@ -1939,7 +1940,8 @@ static int p54_set_ps(struct ieee80211_hw *dev)
1939 int i; 1940 int i;
1940 1941
1941 if (dev->conf.flags & IEEE80211_CONF_PS) 1942 if (dev->conf.flags & IEEE80211_CONF_PS)
1942 mode = P54_PSM | P54_PSM_DTIM | P54_PSM_MCBC; 1943 mode = P54_PSM | P54_PSM_BEACON_TIMEOUT | P54_PSM_DTIM |
1944 P54_PSM_CHECKSUM | P54_PSM_MCBC;
1943 else 1945 else
1944 mode = P54_PSM_CAM; 1946 mode = P54_PSM_CAM;
1945 1947
@@ -1957,9 +1959,10 @@ static int p54_set_ps(struct ieee80211_hw *dev)
1957 psm->intervals[i].periods = cpu_to_le16(1); 1959 psm->intervals[i].periods = cpu_to_le16(1);
1958 } 1960 }
1959 1961
1960 psm->beacon_rssi_skip_max = 60; 1962 psm->beacon_rssi_skip_max = 200;
1961 psm->rssi_delta_threshold = 0; 1963 psm->rssi_delta_threshold = 0;
1962 psm->nr = 0; 1964 psm->nr = 10;
1965 psm->exclude[0] = 0;
1963 1966
1964 priv->tx(dev, skb); 1967 priv->tx(dev, skb);
1965 1968
@@ -2081,20 +2084,21 @@ out:
2081static void p54_stop(struct ieee80211_hw *dev) 2084static void p54_stop(struct ieee80211_hw *dev)
2082{ 2085{
2083 struct p54_common *priv = dev->priv; 2086 struct p54_common *priv = dev->priv;
2084 struct sk_buff *skb;
2085 2087
2086 mutex_lock(&priv->conf_mutex); 2088 mutex_lock(&priv->conf_mutex);
2087 priv->mode = NL80211_IFTYPE_UNSPECIFIED; 2089 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
2088 priv->softled_state = 0; 2090 priv->softled_state = 0;
2089 p54_set_leds(dev); 2091 p54_set_leds(dev);
2090 2092
2093#ifdef CONFIG_P54_LEDS
2094 cancel_delayed_work_sync(&priv->led_work);
2095#endif /* CONFIG_P54_LEDS */
2091 cancel_delayed_work_sync(&priv->work); 2096 cancel_delayed_work_sync(&priv->work);
2092 if (priv->cached_beacon) 2097 if (priv->cached_beacon)
2093 p54_tx_cancel(dev, priv->cached_beacon); 2098 p54_tx_cancel(dev, priv->cached_beacon);
2094 2099
2095 priv->stop(dev); 2100 priv->stop(dev);
2096 while ((skb = skb_dequeue(&priv->tx_queue))) 2101 skb_queue_purge(&priv->tx_queue);
2097 kfree_skb(skb);
2098 priv->cached_beacon = NULL; 2102 priv->cached_beacon = NULL;
2099 priv->tsf_high32 = priv->tsf_low32 = 0; 2103 priv->tsf_high32 = priv->tsf_low32 = 0;
2100 mutex_unlock(&priv->conf_mutex); 2104 mutex_unlock(&priv->conf_mutex);
@@ -2111,6 +2115,8 @@ static int p54_add_interface(struct ieee80211_hw *dev,
2111 return -EOPNOTSUPP; 2115 return -EOPNOTSUPP;
2112 } 2116 }
2113 2117
2118 priv->vif = conf->vif;
2119
2114 switch (conf->type) { 2120 switch (conf->type) {
2115 case NL80211_IFTYPE_STATION: 2121 case NL80211_IFTYPE_STATION:
2116 case NL80211_IFTYPE_ADHOC: 2122 case NL80211_IFTYPE_ADHOC:
@@ -2135,6 +2141,7 @@ static void p54_remove_interface(struct ieee80211_hw *dev,
2135 struct p54_common *priv = dev->priv; 2141 struct p54_common *priv = dev->priv;
2136 2142
2137 mutex_lock(&priv->conf_mutex); 2143 mutex_lock(&priv->conf_mutex);
2144 priv->vif = NULL;
2138 if (priv->cached_beacon) 2145 if (priv->cached_beacon)
2139 p54_tx_cancel(dev, priv->cached_beacon); 2146 p54_tx_cancel(dev, priv->cached_beacon);
2140 priv->mode = NL80211_IFTYPE_MONITOR; 2147 priv->mode = NL80211_IFTYPE_MONITOR;
@@ -2174,41 +2181,6 @@ out:
2174 return ret; 2181 return ret;
2175} 2182}
2176 2183
2177static int p54_config_interface(struct ieee80211_hw *dev,
2178 struct ieee80211_vif *vif,
2179 struct ieee80211_if_conf *conf)
2180{
2181 struct p54_common *priv = dev->priv;
2182 int ret = 0;
2183
2184 mutex_lock(&priv->conf_mutex);
2185 if (conf->changed & IEEE80211_IFCC_BSSID) {
2186 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2187 ret = p54_setup_mac(dev);
2188 if (ret)
2189 goto out;
2190 }
2191
2192 if (conf->changed & IEEE80211_IFCC_BEACON) {
2193 ret = p54_scan(dev, P54_SCAN_EXIT, 0);
2194 if (ret)
2195 goto out;
2196 ret = p54_setup_mac(dev);
2197 if (ret)
2198 goto out;
2199 ret = p54_beacon_update(dev, vif);
2200 if (ret)
2201 goto out;
2202 ret = p54_set_edcf(dev);
2203 if (ret)
2204 goto out;
2205 }
2206
2207out:
2208 mutex_unlock(&priv->conf_mutex);
2209 return ret;
2210}
2211
2212static void p54_configure_filter(struct ieee80211_hw *dev, 2184static void p54_configure_filter(struct ieee80211_hw *dev,
2213 unsigned int changed_flags, 2185 unsigned int changed_flags,
2214 unsigned int *total_flags, 2186 unsigned int *total_flags,
@@ -2312,8 +2284,32 @@ static void p54_bss_info_changed(struct ieee80211_hw *dev,
2312 u32 changed) 2284 u32 changed)
2313{ 2285{
2314 struct p54_common *priv = dev->priv; 2286 struct p54_common *priv = dev->priv;
2287 int ret;
2288
2289 mutex_lock(&priv->conf_mutex);
2290 if (changed & BSS_CHANGED_BSSID) {
2291 memcpy(priv->bssid, info->bssid, ETH_ALEN);
2292 ret = p54_setup_mac(dev);
2293 if (ret)
2294 goto out;
2295 }
2296
2297 if (changed & BSS_CHANGED_BEACON) {
2298 ret = p54_scan(dev, P54_SCAN_EXIT, 0);
2299 if (ret)
2300 goto out;
2301 ret = p54_setup_mac(dev);
2302 if (ret)
2303 goto out;
2304 ret = p54_beacon_update(dev, vif);
2305 if (ret)
2306 goto out;
2307 }
2308 /* XXX: this mimics having two callbacks... clean up */
2309 out:
2310 mutex_unlock(&priv->conf_mutex);
2315 2311
2316 if (changed & BSS_CHANGED_ERP_SLOT) { 2312 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_BEACON)) {
2317 priv->use_short_slot = info->use_short_slot; 2313 priv->use_short_slot = info->use_short_slot;
2318 p54_set_edcf(dev); 2314 p54_set_edcf(dev);
2319 } 2315 }
@@ -2334,7 +2330,6 @@ static void p54_bss_info_changed(struct ieee80211_hw *dev,
2334 p54_setup_mac(dev); 2330 p54_setup_mac(dev);
2335 } 2331 }
2336 } 2332 }
2337
2338} 2333}
2339 2334
2340static int p54_set_key(struct ieee80211_hw *dev, enum set_key_cmd cmd, 2335static int p54_set_key(struct ieee80211_hw *dev, enum set_key_cmd cmd,
@@ -2344,61 +2339,84 @@ static int p54_set_key(struct ieee80211_hw *dev, enum set_key_cmd cmd,
2344 struct p54_common *priv = dev->priv; 2339 struct p54_common *priv = dev->priv;
2345 struct sk_buff *skb; 2340 struct sk_buff *skb;
2346 struct p54_keycache *rxkey; 2341 struct p54_keycache *rxkey;
2342 int slot, ret = 0;
2347 u8 algo = 0; 2343 u8 algo = 0;
2348 2344
2349 if (modparam_nohwcrypt) 2345 if (modparam_nohwcrypt)
2350 return -EOPNOTSUPP; 2346 return -EOPNOTSUPP;
2351 2347
2352 if (cmd == DISABLE_KEY) 2348 mutex_lock(&priv->conf_mutex);
2353 algo = 0; 2349 if (cmd == SET_KEY) {
2354 else {
2355 switch (key->alg) { 2350 switch (key->alg) {
2356 case ALG_TKIP: 2351 case ALG_TKIP:
2357 if (!(priv->privacy_caps & (BR_DESC_PRIV_CAP_MICHAEL | 2352 if (!(priv->privacy_caps & (BR_DESC_PRIV_CAP_MICHAEL |
2358 BR_DESC_PRIV_CAP_TKIP))) 2353 BR_DESC_PRIV_CAP_TKIP))) {
2359 return -EOPNOTSUPP; 2354 ret = -EOPNOTSUPP;
2355 goto out_unlock;
2356 }
2360 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 2357 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2361 algo = P54_CRYPTO_TKIPMICHAEL; 2358 algo = P54_CRYPTO_TKIPMICHAEL;
2362 break; 2359 break;
2363 case ALG_WEP: 2360 case ALG_WEP:
2364 if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_WEP)) 2361 if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_WEP)) {
2365 return -EOPNOTSUPP; 2362 ret = -EOPNOTSUPP;
2363 goto out_unlock;
2364 }
2366 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 2365 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2367 algo = P54_CRYPTO_WEP; 2366 algo = P54_CRYPTO_WEP;
2368 break; 2367 break;
2369 case ALG_CCMP: 2368 case ALG_CCMP:
2370 if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP)) 2369 if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP)) {
2371 return -EOPNOTSUPP; 2370 ret = -EOPNOTSUPP;
2371 goto out_unlock;
2372 }
2372 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 2373 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2373 algo = P54_CRYPTO_AESCCMP; 2374 algo = P54_CRYPTO_AESCCMP;
2374 break; 2375 break;
2375 default: 2376 default:
2376 return -EOPNOTSUPP; 2377 ret = -EOPNOTSUPP;
2378 goto out_unlock;
2377 } 2379 }
2378 } 2380 slot = bitmap_find_free_region(priv->used_rxkeys,
2381 priv->rx_keycache_size, 0);
2379 2382
2380 if (key->keyidx > priv->rx_keycache_size) { 2383 if (slot < 0) {
2381 /* 2384 /*
2382 * The device supports the choosen algorithm, but the firmware 2385 * The device supports the choosen algorithm, but the
2383 * does not provide enough key slots to store all of them. 2386 * firmware does not provide enough key slots to store
2384 * So, incoming frames have to be decoded by the mac80211 stack, 2387 * all of them.
2385 * but we can still offload encryption for outgoing frames. 2388 * But encryption offload for outgoing frames is always
2386 */ 2389 * possible, so we just pretend that the upload was
2390 * successful and do the decryption in software.
2391 */
2387 2392
2388 return 0; 2393 /* mark the key as invalid. */
2394 key->hw_key_idx = 0xff;
2395 goto out_unlock;
2396 }
2397 } else {
2398 slot = key->hw_key_idx;
2399
2400 if (slot == 0xff) {
2401 /* This key was not uploaded into the rx key cache. */
2402
2403 goto out_unlock;
2404 }
2405
2406 bitmap_release_region(priv->used_rxkeys, slot, 0);
2407 algo = 0;
2389 } 2408 }
2390 2409
2391 mutex_lock(&priv->conf_mutex);
2392 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey), 2410 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey),
2393 P54_CONTROL_TYPE_RX_KEYCACHE, GFP_ATOMIC); 2411 P54_CONTROL_TYPE_RX_KEYCACHE, GFP_KERNEL);
2394 if (!skb) { 2412 if (!skb) {
2395 mutex_unlock(&priv->conf_mutex); 2413 bitmap_release_region(priv->used_rxkeys, slot, 0);
2396 return -ENOMEM; 2414 ret = -ENOSPC;
2415 goto out_unlock;
2397 } 2416 }
2398 2417
2399 /* TODO: some devices have 4 more free slots for rx keys */
2400 rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey)); 2418 rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey));
2401 rxkey->entry = key->keyidx; 2419 rxkey->entry = slot;
2402 rxkey->key_id = key->keyidx; 2420 rxkey->key_id = key->keyidx;
2403 rxkey->key_type = algo; 2421 rxkey->key_type = algo;
2404 if (sta) 2422 if (sta)
@@ -2416,11 +2434,51 @@ static int p54_set_key(struct ieee80211_hw *dev, enum set_key_cmd cmd,
2416 } 2434 }
2417 2435
2418 priv->tx(dev, skb); 2436 priv->tx(dev, skb);
2437 key->hw_key_idx = slot;
2438
2439out_unlock:
2419 mutex_unlock(&priv->conf_mutex); 2440 mutex_unlock(&priv->conf_mutex);
2420 return 0; 2441 return ret;
2421} 2442}
2422 2443
2423#ifdef CONFIG_P54_LEDS 2444#ifdef CONFIG_P54_LEDS
2445static void p54_update_leds(struct work_struct *work)
2446{
2447 struct p54_common *priv = container_of(work, struct p54_common,
2448 led_work.work);
2449 int err, i, tmp, blink_delay = 400;
2450 bool rerun = false;
2451
2452 /* Don't toggle the LED, when the device is down. */
2453 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
2454 return ;
2455
2456 for (i = 0; i < ARRAY_SIZE(priv->leds); i++)
2457 if (priv->leds[i].toggled) {
2458 priv->softled_state |= BIT(i);
2459
2460 tmp = 70 + 200 / (priv->leds[i].toggled);
2461 if (tmp < blink_delay)
2462 blink_delay = tmp;
2463
2464 if (priv->leds[i].led_dev.brightness == LED_OFF)
2465 rerun = true;
2466
2467 priv->leds[i].toggled =
2468 !!priv->leds[i].led_dev.brightness;
2469 } else
2470 priv->softled_state &= ~BIT(i);
2471
2472 err = p54_set_leds(priv->hw);
2473 if (err && net_ratelimit())
2474 printk(KERN_ERR "%s: failed to update LEDs.\n",
2475 wiphy_name(priv->hw->wiphy));
2476
2477 if (rerun)
2478 queue_delayed_work(priv->hw->workqueue, &priv->led_work,
2479 msecs_to_jiffies(blink_delay));
2480}
2481
2424static void p54_led_brightness_set(struct led_classdev *led_dev, 2482static void p54_led_brightness_set(struct led_classdev *led_dev,
2425 enum led_brightness brightness) 2483 enum led_brightness brightness)
2426{ 2484{
@@ -2428,28 +2486,23 @@ static void p54_led_brightness_set(struct led_classdev *led_dev,
2428 led_dev); 2486 led_dev);
2429 struct ieee80211_hw *dev = led->hw_dev; 2487 struct ieee80211_hw *dev = led->hw_dev;
2430 struct p54_common *priv = dev->priv; 2488 struct p54_common *priv = dev->priv;
2431 int err;
2432 2489
2433 /* Don't toggle the LED, when the device is down. */
2434 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED) 2490 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
2435 return ; 2491 return ;
2436 2492
2437 if (brightness != LED_OFF) 2493 if (brightness) {
2438 priv->softled_state |= BIT(led->index); 2494 led->toggled++;
2439 else 2495 queue_delayed_work(priv->hw->workqueue, &priv->led_work,
2440 priv->softled_state &= ~BIT(led->index); 2496 HZ/10);
2441 2497 }
2442 err = p54_set_leds(dev);
2443 if (err && net_ratelimit())
2444 printk(KERN_ERR "%s: failed to update %s LED.\n",
2445 wiphy_name(dev->wiphy), led_dev->name);
2446} 2498}
2447 2499
2448static int p54_register_led(struct ieee80211_hw *dev, 2500static int p54_register_led(struct ieee80211_hw *dev,
2449 struct p54_led_dev *led,
2450 unsigned int led_index, 2501 unsigned int led_index,
2451 char *name, char *trigger) 2502 char *name, char *trigger)
2452{ 2503{
2504 struct p54_common *priv = dev->priv;
2505 struct p54_led_dev *led = &priv->leds[led_index];
2453 int err; 2506 int err;
2454 2507
2455 if (led->registered) 2508 if (led->registered)
@@ -2482,19 +2535,30 @@ static int p54_init_leds(struct ieee80211_hw *dev)
2482 * TODO: 2535 * TODO:
2483 * Figure out if the EEPROM contains some hints about the number 2536 * Figure out if the EEPROM contains some hints about the number
2484 * of available/programmable LEDs of the device. 2537 * of available/programmable LEDs of the device.
2485 * But for now, we can assume that we have two programmable LEDs.
2486 */ 2538 */
2487 2539
2488 err = p54_register_led(dev, &priv->assoc_led, 0, "assoc", 2540 INIT_DELAYED_WORK(&priv->led_work, p54_update_leds);
2541
2542 err = p54_register_led(dev, 0, "assoc",
2489 ieee80211_get_assoc_led_name(dev)); 2543 ieee80211_get_assoc_led_name(dev));
2490 if (err) 2544 if (err)
2491 return err; 2545 return err;
2492 2546
2493 err = p54_register_led(dev, &priv->tx_led, 1, "tx", 2547 err = p54_register_led(dev, 1, "tx",
2494 ieee80211_get_tx_led_name(dev)); 2548 ieee80211_get_tx_led_name(dev));
2495 if (err) 2549 if (err)
2496 return err; 2550 return err;
2497 2551
2552 err = p54_register_led(dev, 2, "rx",
2553 ieee80211_get_rx_led_name(dev));
2554 if (err)
2555 return err;
2556
2557 err = p54_register_led(dev, 3, "radio",
2558 ieee80211_get_radio_led_name(dev));
2559 if (err)
2560 return err;
2561
2498 err = p54_set_leds(dev); 2562 err = p54_set_leds(dev);
2499 return err; 2563 return err;
2500} 2564}
@@ -2502,11 +2566,11 @@ static int p54_init_leds(struct ieee80211_hw *dev)
2502static void p54_unregister_leds(struct ieee80211_hw *dev) 2566static void p54_unregister_leds(struct ieee80211_hw *dev)
2503{ 2567{
2504 struct p54_common *priv = dev->priv; 2568 struct p54_common *priv = dev->priv;
2569 int i;
2505 2570
2506 if (priv->tx_led.registered) 2571 for (i = 0; i < ARRAY_SIZE(priv->leds); i++)
2507 led_classdev_unregister(&priv->tx_led.led_dev); 2572 if (priv->leds[i].registered)
2508 if (priv->assoc_led.registered) 2573 led_classdev_unregister(&priv->leds[i].led_dev);
2509 led_classdev_unregister(&priv->assoc_led.led_dev);
2510} 2574}
2511#endif /* CONFIG_P54_LEDS */ 2575#endif /* CONFIG_P54_LEDS */
2512 2576
@@ -2520,7 +2584,6 @@ static const struct ieee80211_ops p54_ops = {
2520 .sta_notify = p54_sta_notify, 2584 .sta_notify = p54_sta_notify,
2521 .set_key = p54_set_key, 2585 .set_key = p54_set_key,
2522 .config = p54_config, 2586 .config = p54_config,
2523 .config_interface = p54_config_interface,
2524 .bss_info_changed = p54_bss_info_changed, 2587 .bss_info_changed = p54_bss_info_changed,
2525 .configure_filter = p54_configure_filter, 2588 .configure_filter = p54_configure_filter,
2526 .conf_tx = p54_conf_tx, 2589 .conf_tx = p54_conf_tx,
@@ -2607,21 +2670,10 @@ void p54_free_common(struct ieee80211_hw *dev)
2607 kfree(priv->iq_autocal); 2670 kfree(priv->iq_autocal);
2608 kfree(priv->output_limit); 2671 kfree(priv->output_limit);
2609 kfree(priv->curve_data); 2672 kfree(priv->curve_data);
2673 kfree(priv->used_rxkeys);
2610 2674
2611#ifdef CONFIG_P54_LEDS 2675#ifdef CONFIG_P54_LEDS
2612 p54_unregister_leds(dev); 2676 p54_unregister_leds(dev);
2613#endif /* CONFIG_P54_LEDS */ 2677#endif /* CONFIG_P54_LEDS */
2614} 2678}
2615EXPORT_SYMBOL_GPL(p54_free_common); 2679EXPORT_SYMBOL_GPL(p54_free_common);
2616
2617static int __init p54_init(void)
2618{
2619 return 0;
2620}
2621
2622static void __exit p54_exit(void)
2623{
2624}
2625
2626module_init(p54_init);
2627module_exit(p54_exit);
diff --git a/drivers/net/wireless/p54/p54spi.c b/drivers/net/wireless/p54/p54spi.c
index d1fe577de3d4..83116baeb110 100644
--- a/drivers/net/wireless/p54/p54spi.c
+++ b/drivers/net/wireless/p54/p54spi.c
@@ -96,7 +96,7 @@ static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
96 spi_message_add_tail(&t[0], &m); 96 spi_message_add_tail(&t[0], &m);
97 97
98 t[1].tx_buf = buf; 98 t[1].tx_buf = buf;
99 t[1].len = len; 99 t[1].len = len & ~1;
100 spi_message_add_tail(&t[1], &m); 100 spi_message_add_tail(&t[1], &m);
101 101
102 if (len % 2) { 102 if (len % 2) {
@@ -167,15 +167,31 @@ static const struct p54spi_spi_reg p54spi_registers_array[] =
167static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, __le32 bits) 167static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, __le32 bits)
168{ 168{
169 int i; 169 int i;
170 __le32 buffer;
171 170
172 for (i = 0; i < 2000; i++) { 171 for (i = 0; i < 2000; i++) {
173 p54spi_spi_read(priv, reg, &buffer, sizeof(buffer)); 172 __le32 buffer = p54spi_read32(priv, reg);
174 if (buffer == bits) 173 if ((buffer & bits) == bits)
175 return 1; 174 return 1;
175 }
176 return 0;
177}
176 178
177 msleep(1); 179static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
180 const void *buf, size_t len)
181{
182 if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL,
183 cpu_to_le32(HOST_ALLOWED))) {
184 dev_err(&priv->spi->dev, "spi_write_dma not allowed "
185 "to DMA write.\n");
186 return -EAGAIN;
178 } 187 }
188
189 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
190 cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
191
192 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
193 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
194 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
179 return 0; 195 return 0;
180} 196}
181 197
@@ -228,8 +244,15 @@ static int p54spi_request_eeprom(struct ieee80211_hw *dev)
228static int p54spi_upload_firmware(struct ieee80211_hw *dev) 244static int p54spi_upload_firmware(struct ieee80211_hw *dev)
229{ 245{
230 struct p54s_priv *priv = dev->priv; 246 struct p54s_priv *priv = dev->priv;
231 unsigned long fw_len, fw_addr; 247 unsigned long fw_len, _fw_len;
232 long _fw_len; 248 unsigned int offset = 0;
249 int err = 0;
250 u8 *fw;
251
252 fw_len = priv->firmware->size;
253 fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
254 if (!fw)
255 return -ENOMEM;
233 256
234 /* stop the device */ 257 /* stop the device */
235 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16( 258 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
@@ -244,36 +267,17 @@ static int p54spi_upload_firmware(struct ieee80211_hw *dev)
244 267
245 msleep(TARGET_BOOT_SLEEP); 268 msleep(TARGET_BOOT_SLEEP);
246 269
247 fw_addr = ISL38XX_DEV_FIRMWARE_ADDR;
248 fw_len = priv->firmware->size;
249
250 while (fw_len > 0) { 270 while (fw_len > 0) {
251 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE); 271 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
252 272
253 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL, 273 err = p54spi_spi_write_dma(priv, cpu_to_le32(
254 cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE)); 274 ISL38XX_DEV_FIRMWARE_ADDR + offset),
255 275 (fw + offset), _fw_len);
256 if (p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, 276 if (err < 0)
257 cpu_to_le32(HOST_ALLOWED)) == 0) { 277 goto out;
258 dev_err(&priv->spi->dev, "fw_upload not allowed "
259 "to DMA write.");
260 return -EAGAIN;
261 }
262
263 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN,
264 cpu_to_le16(_fw_len));
265 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE,
266 cpu_to_le32(fw_addr));
267
268 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA,
269 &priv->firmware->data, _fw_len);
270 278
271 fw_len -= _fw_len; 279 fw_len -= _fw_len;
272 fw_addr += _fw_len; 280 offset += _fw_len;
273
274 /* FIXME: I think this doesn't work if firmware is large,
275 * this loop goes to second round. fw->data is not
276 * increased at all! */
277 } 281 }
278 282
279 BUG_ON(fw_len != 0); 283 BUG_ON(fw_len != 0);
@@ -292,7 +296,10 @@ static int p54spi_upload_firmware(struct ieee80211_hw *dev)
292 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16( 296 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
293 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT)); 297 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
294 msleep(TARGET_BOOT_SLEEP); 298 msleep(TARGET_BOOT_SLEEP);
295 return 0; 299
300out:
301 kfree(fw);
302 return err;
296} 303}
297 304
298static void p54spi_power_off(struct p54s_priv *priv) 305static void p54spi_power_off(struct p54s_priv *priv)
@@ -318,29 +325,21 @@ static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
318 p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val)); 325 p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
319} 326}
320 327
321static void p54spi_wakeup(struct p54s_priv *priv) 328static int p54spi_wakeup(struct p54s_priv *priv)
322{ 329{
323 unsigned long timeout;
324 u32 ints;
325
326 /* wake the chip */ 330 /* wake the chip */
327 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS, 331 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
328 cpu_to_le32(SPI_TARGET_INT_WAKEUP)); 332 cpu_to_le32(SPI_TARGET_INT_WAKEUP));
329 333
330 /* And wait for the READY interrupt */ 334 /* And wait for the READY interrupt */
331 timeout = jiffies + HZ; 335 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
332 336 cpu_to_le32(SPI_HOST_INT_READY))) {
333 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS); 337 dev_err(&priv->spi->dev, "INT_READY timeout\n");
334 while (!(ints & SPI_HOST_INT_READY)) { 338 return -EBUSY;
335 if (time_after(jiffies, timeout))
336 goto out;
337 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
338 } 339 }
339 340
340 p54spi_int_ack(priv, SPI_HOST_INT_READY); 341 p54spi_int_ack(priv, SPI_HOST_INT_READY);
341 342 return 0;
342out:
343 return;
344} 343}
345 344
346static inline void p54spi_sleep(struct p54s_priv *priv) 345static inline void p54spi_sleep(struct p54s_priv *priv)
@@ -372,27 +371,48 @@ static int p54spi_rx(struct p54s_priv *priv)
372{ 371{
373 struct sk_buff *skb; 372 struct sk_buff *skb;
374 u16 len; 373 u16 len;
374 u16 rx_head[2];
375#define READAHEAD_SZ (sizeof(rx_head)-sizeof(u16))
375 376
376 p54spi_wakeup(priv); 377 if (p54spi_wakeup(priv) < 0)
377 378 return -EBUSY;
378 /* dummy read to flush SPI DMA controller bug */
379 p54spi_read16(priv, SPI_ADRS_GEN_PURP_1);
380 379
381 len = p54spi_read16(priv, SPI_ADRS_DMA_DATA); 380 /* Read data size and first data word in one SPI transaction
381 * This is workaround for firmware/DMA bug,
382 * when first data word gets lost under high load.
383 */
384 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, rx_head, sizeof(rx_head));
385 len = rx_head[0];
382 386
383 if (len == 0) { 387 if (len == 0) {
384 dev_err(&priv->spi->dev, "rx request of zero bytes"); 388 p54spi_sleep(priv);
389 dev_err(&priv->spi->dev, "rx request of zero bytes\n");
385 return 0; 390 return 0;
386 } 391 }
387 392
388 skb = dev_alloc_skb(len); 393 /* Firmware may insert up to 4 padding bytes after the lmac header,
394 * but it does not amend the size of SPI data transfer.
395 * Such packets has correct data size in header, thus referencing
396 * past the end of allocated skb. Reserve extra 4 bytes for this case */
397 skb = dev_alloc_skb(len + 4);
389 if (!skb) { 398 if (!skb) {
399 p54spi_sleep(priv);
390 dev_err(&priv->spi->dev, "could not alloc skb"); 400 dev_err(&priv->spi->dev, "could not alloc skb");
391 return 0; 401 return -ENOMEM;
392 } 402 }
393 403
394 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, skb_put(skb, len), len); 404 if (len <= READAHEAD_SZ) {
405 memcpy(skb_put(skb, len), rx_head + 1, len);
406 } else {
407 memcpy(skb_put(skb, READAHEAD_SZ), rx_head + 1, READAHEAD_SZ);
408 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA,
409 skb_put(skb, len - READAHEAD_SZ),
410 len - READAHEAD_SZ);
411 }
395 p54spi_sleep(priv); 412 p54spi_sleep(priv);
413 /* Put additional bytes to compensate for the possible
414 * alignment-caused truncation */
415 skb_put(skb, 4);
396 416
397 if (p54_rx(priv->hw, skb) == 0) 417 if (p54_rx(priv->hw, skb) == 0)
398 dev_kfree_skb(skb); 418 dev_kfree_skb(skb);
@@ -414,39 +434,28 @@ static irqreturn_t p54spi_interrupt(int irq, void *config)
414static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb) 434static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
415{ 435{
416 struct p54_hdr *hdr = (struct p54_hdr *) skb->data; 436 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
417 struct p54s_dma_regs dma_regs;
418 unsigned long timeout;
419 int ret = 0; 437 int ret = 0;
420 u32 ints;
421
422 p54spi_wakeup(priv);
423 438
424 dma_regs.cmd = cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE); 439 if (p54spi_wakeup(priv) < 0)
425 dma_regs.len = cpu_to_le16(skb->len); 440 return -EBUSY;
426 dma_regs.addr = hdr->req_id;
427 441
428 p54spi_spi_write(priv, SPI_ADRS_DMA_WRITE_CTRL, &dma_regs, 442 ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
429 sizeof(dma_regs)); 443 if (ret < 0)
430 444 goto out;
431 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, skb->data, skb->len);
432 445
433 timeout = jiffies + 2 * HZ; 446 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
434 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS); 447 cpu_to_le32(SPI_HOST_INT_WR_READY))) {
435 while (!(ints & SPI_HOST_INT_WR_READY)) { 448 dev_err(&priv->spi->dev, "WR_READY timeout\n");
436 if (time_after(jiffies, timeout)) { 449 ret = -EAGAIN;
437 dev_err(&priv->spi->dev, "WR_READY timeout"); 450 goto out;
438 ret = -1;
439 goto out;
440 }
441 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
442 } 451 }
443 452
444 p54spi_int_ack(priv, SPI_HOST_INT_WR_READY); 453 p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
445 p54spi_sleep(priv);
446 454
447out:
448 if (FREE_AFTER_TX(skb)) 455 if (FREE_AFTER_TX(skb))
449 p54_free_skb(priv->hw, skb); 456 p54_free_skb(priv->hw, skb);
457out:
458 p54spi_sleep(priv);
450 return ret; 459 return ret;
451} 460}
452 461
@@ -516,8 +525,7 @@ static void p54spi_work(struct work_struct *work)
516 525
517 mutex_lock(&priv->mutex); 526 mutex_lock(&priv->mutex);
518 527
519 if (priv->fw_state == FW_STATE_OFF && 528 if (priv->fw_state == FW_STATE_OFF)
520 priv->fw_state == FW_STATE_RESET)
521 goto out; 529 goto out;
522 530
523 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS); 531 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
@@ -544,11 +552,6 @@ static void p54spi_work(struct work_struct *work)
544 } 552 }
545 553
546 ret = p54spi_wq_tx(priv); 554 ret = p54spi_wq_tx(priv);
547 if (ret < 0)
548 goto out;
549
550 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
551
552out: 555out:
553 mutex_unlock(&priv->mutex); 556 mutex_unlock(&priv->mutex);
554} 557}
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c
index 6cc6cbc9234f..f40c0f468b27 100644
--- a/drivers/net/wireless/p54/p54usb.c
+++ b/drivers/net/wireless/p54/p54usb.c
@@ -81,6 +81,29 @@ static struct usb_device_id p54u_table[] __devinitdata = {
81 81
82MODULE_DEVICE_TABLE(usb, p54u_table); 82MODULE_DEVICE_TABLE(usb, p54u_table);
83 83
84static const struct {
85 u32 intf;
86 enum p54u_hw_type type;
87 char fw[FIRMWARE_NAME_MAX];
88 char fw_legacy[FIRMWARE_NAME_MAX];
89 char hw[20];
90} p54u_fwlist[__NUM_P54U_HWTYPES] = {
91 {
92 .type = P54U_NET2280,
93 .intf = FW_LM86,
94 .fw = "isl3886usb",
95 .fw_legacy = "isl3890usb",
96 .hw = "ISL3886 + net2280",
97 },
98 {
99 .type = P54U_3887,
100 .intf = FW_LM87,
101 .fw = "isl3887usb",
102 .fw_legacy = "isl3887usb_bare",
103 .hw = "ISL3887",
104 },
105};
106
84static void p54u_rx_cb(struct urb *urb) 107static void p54u_rx_cb(struct urb *urb)
85{ 108{
86 struct sk_buff *skb = (struct sk_buff *) urb->context; 109 struct sk_buff *skb = (struct sk_buff *) urb->context;
@@ -125,11 +148,7 @@ static void p54u_rx_cb(struct urb *urb)
125 } 148 }
126 skb_reset_tail_pointer(skb); 149 skb_reset_tail_pointer(skb);
127 skb_trim(skb, 0); 150 skb_trim(skb, 0);
128 if (urb->transfer_buffer != skb_tail_pointer(skb)) { 151 urb->transfer_buffer = skb_tail_pointer(skb);
129 /* this should not happen */
130 WARN_ON(1);
131 urb->transfer_buffer = skb_tail_pointer(skb);
132 }
133 } 152 }
134 skb_queue_tail(&priv->rx_queue, skb); 153 skb_queue_tail(&priv->rx_queue, skb);
135 usb_anchor_urb(urb, &priv->submitted); 154 usb_anchor_urb(urb, &priv->submitted);
@@ -206,53 +225,6 @@ static int p54u_init_urbs(struct ieee80211_hw *dev)
206 return ret; 225 return ret;
207} 226}
208 227
209static void p54u_tx_3887(struct ieee80211_hw *dev, struct sk_buff *skb)
210{
211 struct p54u_priv *priv = dev->priv;
212 struct urb *addr_urb, *data_urb;
213 int err = 0;
214
215 addr_urb = usb_alloc_urb(0, GFP_ATOMIC);
216 if (!addr_urb)
217 return;
218
219 data_urb = usb_alloc_urb(0, GFP_ATOMIC);
220 if (!data_urb) {
221 usb_free_urb(addr_urb);
222 return;
223 }
224
225 usb_fill_bulk_urb(addr_urb, priv->udev,
226 usb_sndbulkpipe(priv->udev, P54U_PIPE_DATA),
227 &((struct p54_hdr *)skb->data)->req_id, 4,
228 p54u_tx_dummy_cb, dev);
229 usb_fill_bulk_urb(data_urb, priv->udev,
230 usb_sndbulkpipe(priv->udev, P54U_PIPE_DATA),
231 skb->data, skb->len, FREE_AFTER_TX(skb) ?
232 p54u_tx_cb : p54u_tx_dummy_cb, skb);
233 addr_urb->transfer_flags |= URB_ZERO_PACKET;
234 data_urb->transfer_flags |= URB_ZERO_PACKET;
235
236 usb_anchor_urb(addr_urb, &priv->submitted);
237 err = usb_submit_urb(addr_urb, GFP_ATOMIC);
238 if (err) {
239 usb_unanchor_urb(addr_urb);
240 goto out;
241 }
242
243 usb_anchor_urb(data_urb, &priv->submitted);
244 err = usb_submit_urb(data_urb, GFP_ATOMIC);
245 if (err)
246 usb_unanchor_urb(data_urb);
247
248 out:
249 usb_free_urb(addr_urb);
250 usb_free_urb(data_urb);
251
252 if (err)
253 p54_free_skb(dev, skb);
254}
255
256static __le32 p54u_lm87_chksum(const __le32 *data, size_t length) 228static __le32 p54u_lm87_chksum(const __le32 *data, size_t length)
257{ 229{
258 u32 chk = 0; 230 u32 chk = 0;
@@ -425,20 +397,16 @@ static int p54u_bulk_msg(struct p54u_priv *priv, unsigned int ep,
425 data, len, &alen, 2000); 397 data, len, &alen, 2000);
426} 398}
427 399
428static const char p54u_romboot_3887[] = "~~~~"; 400static int p54u_device_reset(struct ieee80211_hw *dev)
429static const char p54u_firmware_upload_3887[] = "<\r";
430
431static int p54u_device_reset_3887(struct ieee80211_hw *dev)
432{ 401{
433 struct p54u_priv *priv = dev->priv; 402 struct p54u_priv *priv = dev->priv;
434 int ret, lock = (priv->intf->condition != USB_INTERFACE_BINDING); 403 int ret, lock = (priv->intf->condition != USB_INTERFACE_BINDING);
435 u8 buf[4];
436 404
437 if (lock) { 405 if (lock) {
438 ret = usb_lock_device_for_reset(priv->udev, priv->intf); 406 ret = usb_lock_device_for_reset(priv->udev, priv->intf);
439 if (ret < 0) { 407 if (ret < 0) {
440 dev_err(&priv->udev->dev, "(p54usb) unable to lock " 408 dev_err(&priv->udev->dev, "(p54usb) unable to lock "
441 " device for reset: %d\n", ret); 409 "device for reset (%d)!\n", ret);
442 return ret; 410 return ret;
443 } 411 }
444 } 412 }
@@ -447,26 +415,34 @@ static int p54u_device_reset_3887(struct ieee80211_hw *dev)
447 if (lock) 415 if (lock)
448 usb_unlock_device(priv->udev); 416 usb_unlock_device(priv->udev);
449 417
450 if (ret) { 418 if (ret)
451 dev_err(&priv->udev->dev, "(p54usb) unable to reset " 419 dev_err(&priv->udev->dev, "(p54usb) unable to reset "
452 "device: %d\n", ret); 420 "device (%d)!\n", ret);
453 return ret; 421
454 } 422 return ret;
423}
424
425static const char p54u_romboot_3887[] = "~~~~";
426static int p54u_firmware_reset_3887(struct ieee80211_hw *dev)
427{
428 struct p54u_priv *priv = dev->priv;
429 u8 buf[4];
430 int ret;
455 431
456 memcpy(&buf, p54u_romboot_3887, sizeof(buf)); 432 memcpy(&buf, p54u_romboot_3887, sizeof(buf));
457 ret = p54u_bulk_msg(priv, P54U_PIPE_DATA, 433 ret = p54u_bulk_msg(priv, P54U_PIPE_DATA,
458 buf, sizeof(buf)); 434 buf, sizeof(buf));
459 if (ret) 435 if (ret)
460 dev_err(&priv->udev->dev, "(p54usb) unable to jump to " 436 dev_err(&priv->udev->dev, "(p54usb) unable to jump to "
461 "boot ROM: %d\n", ret); 437 "boot ROM (%d)!\n", ret);
462 438
463 return ret; 439 return ret;
464} 440}
465 441
442static const char p54u_firmware_upload_3887[] = "<\r";
466static int p54u_upload_firmware_3887(struct ieee80211_hw *dev) 443static int p54u_upload_firmware_3887(struct ieee80211_hw *dev)
467{ 444{
468 struct p54u_priv *priv = dev->priv; 445 struct p54u_priv *priv = dev->priv;
469 const struct firmware *fw_entry = NULL;
470 int err, alen; 446 int err, alen;
471 u8 carry = 0; 447 u8 carry = 0;
472 u8 *buf, *tmp; 448 u8 *buf, *tmp;
@@ -475,51 +451,29 @@ static int p54u_upload_firmware_3887(struct ieee80211_hw *dev)
475 struct x2_header *hdr; 451 struct x2_header *hdr;
476 unsigned long timeout; 452 unsigned long timeout;
477 453
454 err = p54u_firmware_reset_3887(dev);
455 if (err)
456 return err;
457
478 tmp = buf = kmalloc(P54U_FW_BLOCK, GFP_KERNEL); 458 tmp = buf = kmalloc(P54U_FW_BLOCK, GFP_KERNEL);
479 if (!buf) { 459 if (!buf) {
480 dev_err(&priv->udev->dev, "(p54usb) cannot allocate firmware" 460 dev_err(&priv->udev->dev, "(p54usb) cannot allocate firmware"
481 "upload buffer!\n"); 461 "upload buffer!\n");
482 err = -ENOMEM; 462 return -ENOMEM;
483 goto err_bufalloc;
484 }
485
486 err = p54u_device_reset_3887(dev);
487 if (err)
488 goto err_reset;
489
490 err = request_firmware(&fw_entry, "isl3887usb", &priv->udev->dev);
491 if (err) {
492 dev_err(&priv->udev->dev, "p54usb: cannot find firmware "
493 "(isl3887usb)\n");
494 err = request_firmware(&fw_entry, "isl3887usb_bare",
495 &priv->udev->dev);
496 if (err)
497 goto err_req_fw_failed;
498 }
499
500 err = p54_parse_firmware(dev, fw_entry);
501 if (err)
502 goto err_upload_failed;
503
504 if (priv->common.fw_interface != FW_LM87) {
505 dev_err(&priv->udev->dev, "wrong firmware, "
506 "please get a LM87 firmware and try again.\n");
507 err = -EINVAL;
508 goto err_upload_failed;
509 } 463 }
510 464
511 left = block_size = min((size_t)P54U_FW_BLOCK, fw_entry->size); 465 left = block_size = min((size_t)P54U_FW_BLOCK, priv->fw->size);
512 strcpy(buf, p54u_firmware_upload_3887); 466 strcpy(buf, p54u_firmware_upload_3887);
513 left -= strlen(p54u_firmware_upload_3887); 467 left -= strlen(p54u_firmware_upload_3887);
514 tmp += strlen(p54u_firmware_upload_3887); 468 tmp += strlen(p54u_firmware_upload_3887);
515 469
516 data = fw_entry->data; 470 data = priv->fw->data;
517 remains = fw_entry->size; 471 remains = priv->fw->size;
518 472
519 hdr = (struct x2_header *)(buf + strlen(p54u_firmware_upload_3887)); 473 hdr = (struct x2_header *)(buf + strlen(p54u_firmware_upload_3887));
520 memcpy(hdr->signature, X2_SIGNATURE, X2_SIGNATURE_SIZE); 474 memcpy(hdr->signature, X2_SIGNATURE, X2_SIGNATURE_SIZE);
521 hdr->fw_load_addr = cpu_to_le32(ISL38XX_DEV_FIRMWARE_ADDR); 475 hdr->fw_load_addr = cpu_to_le32(ISL38XX_DEV_FIRMWARE_ADDR);
522 hdr->fw_length = cpu_to_le32(fw_entry->size); 476 hdr->fw_length = cpu_to_le32(priv->fw->size);
523 hdr->crc = cpu_to_le32(~crc32_le(~0, (void *)&hdr->fw_load_addr, 477 hdr->crc = cpu_to_le32(~crc32_le(~0, (void *)&hdr->fw_load_addr,
524 sizeof(u32)*2)); 478 sizeof(u32)*2));
525 left -= sizeof(*hdr); 479 left -= sizeof(*hdr);
@@ -561,7 +515,8 @@ static int p54u_upload_firmware_3887(struct ieee80211_hw *dev)
561 left = block_size = min((unsigned int)P54U_FW_BLOCK, remains); 515 left = block_size = min((unsigned int)P54U_FW_BLOCK, remains);
562 } 516 }
563 517
564 *((__le32 *)buf) = cpu_to_le32(~crc32_le(~0, fw_entry->data, fw_entry->size)); 518 *((__le32 *)buf) = cpu_to_le32(~crc32_le(~0, priv->fw->data,
519 priv->fw->size));
565 err = p54u_bulk_msg(priv, P54U_PIPE_DATA, buf, sizeof(u32)); 520 err = p54u_bulk_msg(priv, P54U_PIPE_DATA, buf, sizeof(u32));
566 if (err) { 521 if (err) {
567 dev_err(&priv->udev->dev, "(p54usb) firmware upload failed!\n"); 522 dev_err(&priv->udev->dev, "(p54usb) firmware upload failed!\n");
@@ -612,19 +567,14 @@ static int p54u_upload_firmware_3887(struct ieee80211_hw *dev)
612 if (err) 567 if (err)
613 goto err_upload_failed; 568 goto err_upload_failed;
614 569
615 err_upload_failed: 570err_upload_failed:
616 release_firmware(fw_entry);
617 err_req_fw_failed:
618 err_reset:
619 kfree(buf); 571 kfree(buf);
620 err_bufalloc:
621 return err; 572 return err;
622} 573}
623 574
624static int p54u_upload_firmware_net2280(struct ieee80211_hw *dev) 575static int p54u_upload_firmware_net2280(struct ieee80211_hw *dev)
625{ 576{
626 struct p54u_priv *priv = dev->priv; 577 struct p54u_priv *priv = dev->priv;
627 const struct firmware *fw_entry = NULL;
628 const struct p54p_csr *devreg = (const struct p54p_csr *) P54U_DEV_BASE; 578 const struct p54p_csr *devreg = (const struct p54p_csr *) P54U_DEV_BASE;
629 int err, alen; 579 int err, alen;
630 void *buf; 580 void *buf;
@@ -639,33 +589,6 @@ static int p54u_upload_firmware_net2280(struct ieee80211_hw *dev)
639 return -ENOMEM; 589 return -ENOMEM;
640 } 590 }
641 591
642 err = request_firmware(&fw_entry, "isl3886usb", &priv->udev->dev);
643 if (err) {
644 dev_err(&priv->udev->dev, "(p54usb) cannot find firmware "
645 "(isl3886usb)\n");
646 err = request_firmware(&fw_entry, "isl3890usb",
647 &priv->udev->dev);
648 if (err) {
649 kfree(buf);
650 return err;
651 }
652 }
653
654 err = p54_parse_firmware(dev, fw_entry);
655 if (err) {
656 kfree(buf);
657 release_firmware(fw_entry);
658 return err;
659 }
660
661 if (priv->common.fw_interface != FW_LM86) {
662 dev_err(&priv->udev->dev, "wrong firmware, "
663 "please get a LM86(USB) firmware and try again.\n");
664 kfree(buf);
665 release_firmware(fw_entry);
666 return -EINVAL;
667 }
668
669#define P54U_WRITE(type, addr, data) \ 592#define P54U_WRITE(type, addr, data) \
670 do {\ 593 do {\
671 err = p54u_write(priv, buf, type,\ 594 err = p54u_write(priv, buf, type,\
@@ -765,8 +688,8 @@ static int p54u_upload_firmware_net2280(struct ieee80211_hw *dev)
765 P54U_WRITE(NET2280_DEV_U32, &devreg->int_ack, reg); 688 P54U_WRITE(NET2280_DEV_U32, &devreg->int_ack, reg);
766 689
767 /* finally, we can upload firmware now! */ 690 /* finally, we can upload firmware now! */
768 remains = fw_entry->size; 691 remains = priv->fw->size;
769 data = fw_entry->data; 692 data = priv->fw->data;
770 offset = ISL38XX_DEV_FIRMWARE_ADDR; 693 offset = ISL38XX_DEV_FIRMWARE_ADDR;
771 694
772 while (remains) { 695 while (remains) {
@@ -875,12 +798,54 @@ static int p54u_upload_firmware_net2280(struct ieee80211_hw *dev)
875#undef P54U_WRITE 798#undef P54U_WRITE
876#undef P54U_READ 799#undef P54U_READ
877 800
878 fail: 801fail:
879 release_firmware(fw_entry);
880 kfree(buf); 802 kfree(buf);
881 return err; 803 return err;
882} 804}
883 805
806static int p54u_load_firmware(struct ieee80211_hw *dev)
807{
808 struct p54u_priv *priv = dev->priv;
809 int err, i;
810
811 BUILD_BUG_ON(ARRAY_SIZE(p54u_fwlist) != __NUM_P54U_HWTYPES);
812
813 for (i = 0; i < __NUM_P54U_HWTYPES; i++)
814 if (p54u_fwlist[i].type == priv->hw_type)
815 break;
816
817 if (i == __NUM_P54U_HWTYPES)
818 return -EOPNOTSUPP;
819
820 err = request_firmware(&priv->fw, p54u_fwlist[i].fw, &priv->udev->dev);
821 if (err) {
822 dev_err(&priv->udev->dev, "(p54usb) cannot load firmware %s "
823 "(%d)!\n", p54u_fwlist[i].fw, err);
824
825 err = request_firmware(&priv->fw, p54u_fwlist[i].fw_legacy,
826 &priv->udev->dev);
827 if (err)
828 return err;
829 }
830
831 err = p54_parse_firmware(dev, priv->fw);
832 if (err)
833 goto out;
834
835 if (priv->common.fw_interface != p54u_fwlist[i].intf) {
836 dev_err(&priv->udev->dev, "wrong firmware, please get "
837 "a firmware for \"%s\" and try again.\n",
838 p54u_fwlist[i].hw);
839 err = -EINVAL;
840 }
841
842out:
843 if (err)
844 release_firmware(priv->fw);
845
846 return err;
847}
848
884static int p54u_open(struct ieee80211_hw *dev) 849static int p54u_open(struct ieee80211_hw *dev)
885{ 850{
886 struct p54u_priv *priv = dev->priv; 851 struct p54u_priv *priv = dev->priv;
@@ -922,6 +887,7 @@ static int __devinit p54u_probe(struct usb_interface *intf,
922 } 887 }
923 888
924 priv = dev->priv; 889 priv = dev->priv;
890 priv->hw_type = P54U_INVALID_HW;
925 891
926 SET_IEEE80211_DEV(dev, &intf->dev); 892 SET_IEEE80211_DEV(dev, &intf->dev);
927 usb_set_intfdata(intf, dev); 893 usb_set_intfdata(intf, dev);
@@ -953,37 +919,48 @@ static int __devinit p54u_probe(struct usb_interface *intf,
953 priv->common.open = p54u_open; 919 priv->common.open = p54u_open;
954 priv->common.stop = p54u_stop; 920 priv->common.stop = p54u_stop;
955 if (recognized_pipes < P54U_PIPE_NUMBER) { 921 if (recognized_pipes < P54U_PIPE_NUMBER) {
922#ifdef CONFIG_PM
923 /* ISL3887 needs a full reset on resume */
924 udev->reset_resume = 1;
925 err = p54u_device_reset(dev);
926#endif
927
956 priv->hw_type = P54U_3887; 928 priv->hw_type = P54U_3887;
957 err = p54u_upload_firmware_3887(dev); 929 dev->extra_tx_headroom += sizeof(struct lm87_tx_hdr);
958 if (priv->common.fw_interface == FW_LM87) { 930 priv->common.tx_hdr_len = sizeof(struct lm87_tx_hdr);
959 dev->extra_tx_headroom += sizeof(struct lm87_tx_hdr); 931 priv->common.tx = p54u_tx_lm87;
960 priv->common.tx_hdr_len = sizeof(struct lm87_tx_hdr); 932 priv->upload_fw = p54u_upload_firmware_3887;
961 priv->common.tx = p54u_tx_lm87;
962 } else
963 priv->common.tx = p54u_tx_3887;
964 } else { 933 } else {
965 priv->hw_type = P54U_NET2280; 934 priv->hw_type = P54U_NET2280;
966 dev->extra_tx_headroom += sizeof(struct net2280_tx_hdr); 935 dev->extra_tx_headroom += sizeof(struct net2280_tx_hdr);
967 priv->common.tx_hdr_len = sizeof(struct net2280_tx_hdr); 936 priv->common.tx_hdr_len = sizeof(struct net2280_tx_hdr);
968 priv->common.tx = p54u_tx_net2280; 937 priv->common.tx = p54u_tx_net2280;
969 err = p54u_upload_firmware_net2280(dev); 938 priv->upload_fw = p54u_upload_firmware_net2280;
970 } 939 }
940 err = p54u_load_firmware(dev);
971 if (err) 941 if (err)
972 goto err_free_dev; 942 goto err_free_dev;
973 943
944 err = priv->upload_fw(dev);
945 if (err)
946 goto err_free_fw;
947
974 p54u_open(dev); 948 p54u_open(dev);
975 err = p54_read_eeprom(dev); 949 err = p54_read_eeprom(dev);
976 p54u_stop(dev); 950 p54u_stop(dev);
977 if (err) 951 if (err)
978 goto err_free_dev; 952 goto err_free_fw;
979 953
980 err = p54_register_common(dev, &udev->dev); 954 err = p54_register_common(dev, &udev->dev);
981 if (err) 955 if (err)
982 goto err_free_dev; 956 goto err_free_fw;
983 957
984 return 0; 958 return 0;
985 959
986 err_free_dev: 960err_free_fw:
961 release_firmware(priv->fw);
962
963err_free_dev:
987 ieee80211_free_hw(dev); 964 ieee80211_free_hw(dev);
988 usb_set_intfdata(intf, NULL); 965 usb_set_intfdata(intf, NULL);
989 usb_put_dev(udev); 966 usb_put_dev(udev);
@@ -1002,20 +979,64 @@ static void __devexit p54u_disconnect(struct usb_interface *intf)
1002 979
1003 priv = dev->priv; 980 priv = dev->priv;
1004 usb_put_dev(interface_to_usbdev(intf)); 981 usb_put_dev(interface_to_usbdev(intf));
982 release_firmware(priv->fw);
1005 p54_free_common(dev); 983 p54_free_common(dev);
1006 ieee80211_free_hw(dev); 984 ieee80211_free_hw(dev);
1007} 985}
1008 986
1009static int p54u_pre_reset(struct usb_interface *intf) 987static int p54u_pre_reset(struct usb_interface *intf)
1010{ 988{
989 struct ieee80211_hw *dev = usb_get_intfdata(intf);
990
991 if (!dev)
992 return -ENODEV;
993
994 p54u_stop(dev);
1011 return 0; 995 return 0;
1012} 996}
1013 997
998static int p54u_resume(struct usb_interface *intf)
999{
1000 struct ieee80211_hw *dev = usb_get_intfdata(intf);
1001 struct p54u_priv *priv;
1002
1003 if (!dev)
1004 return -ENODEV;
1005
1006 priv = dev->priv;
1007 if (unlikely(!(priv->upload_fw && priv->fw)))
1008 return 0;
1009
1010 return priv->upload_fw(dev);
1011}
1012
1014static int p54u_post_reset(struct usb_interface *intf) 1013static int p54u_post_reset(struct usb_interface *intf)
1015{ 1014{
1015 struct ieee80211_hw *dev = usb_get_intfdata(intf);
1016 struct p54u_priv *priv;
1017 int err;
1018
1019 err = p54u_resume(intf);
1020 if (err)
1021 return err;
1022
1023 /* reinitialize old device state */
1024 priv = dev->priv;
1025 if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED)
1026 ieee80211_restart_hw(dev);
1027
1016 return 0; 1028 return 0;
1017} 1029}
1018 1030
1031#ifdef CONFIG_PM
1032
1033static int p54u_suspend(struct usb_interface *intf, pm_message_t message)
1034{
1035 return p54u_pre_reset(intf);
1036}
1037
1038#endif /* CONFIG_PM */
1039
1019static struct usb_driver p54u_driver = { 1040static struct usb_driver p54u_driver = {
1020 .name = "p54usb", 1041 .name = "p54usb",
1021 .id_table = p54u_table, 1042 .id_table = p54u_table,
@@ -1023,6 +1044,11 @@ static struct usb_driver p54u_driver = {
1023 .disconnect = p54u_disconnect, 1044 .disconnect = p54u_disconnect,
1024 .pre_reset = p54u_pre_reset, 1045 .pre_reset = p54u_pre_reset,
1025 .post_reset = p54u_post_reset, 1046 .post_reset = p54u_post_reset,
1047#ifdef CONFIG_PM
1048 .suspend = p54u_suspend,
1049 .resume = p54u_resume,
1050 .reset_resume = p54u_resume,
1051#endif /* CONFIG_PM */
1026 .soft_unbind = 1, 1052 .soft_unbind = 1,
1027}; 1053};
1028 1054
diff --git a/drivers/net/wireless/p54/p54usb.h b/drivers/net/wireless/p54/p54usb.h
index 8bc58982d8dd..e935b79f7f75 100644
--- a/drivers/net/wireless/p54/p54usb.h
+++ b/drivers/net/wireless/p54/p54usb.h
@@ -123,18 +123,26 @@ struct p54u_rx_info {
123 struct ieee80211_hw *dev; 123 struct ieee80211_hw *dev;
124}; 124};
125 125
126enum p54u_hw_type {
127 P54U_INVALID_HW,
128 P54U_NET2280,
129 P54U_3887,
130
131 /* keep last */
132 __NUM_P54U_HWTYPES,
133};
134
126struct p54u_priv { 135struct p54u_priv {
127 struct p54_common common; 136 struct p54_common common;
128 struct usb_device *udev; 137 struct usb_device *udev;
129 struct usb_interface *intf; 138 struct usb_interface *intf;
130 enum { 139 int (*upload_fw)(struct ieee80211_hw *dev);
131 P54U_NET2280 = 0,
132 P54U_3887
133 } hw_type;
134 140
141 enum p54u_hw_type hw_type;
135 spinlock_t lock; 142 spinlock_t lock;
136 struct sk_buff_head rx_queue; 143 struct sk_buff_head rx_queue;
137 struct usb_anchor submitted; 144 struct usb_anchor submitted;
145 const struct firmware *fw;
138}; 146};
139 147
140#endif /* P54USB_H */ 148#endif /* P54USB_H */
diff --git a/drivers/net/wireless/ray_cs.c b/drivers/net/wireless/ray_cs.c
index fa90d1d8d82e..22e71856aa24 100644
--- a/drivers/net/wireless/ray_cs.c
+++ b/drivers/net/wireless/ray_cs.c
@@ -892,7 +892,7 @@ static int ray_dev_init(struct net_device *dev)
892#endif /* RAY_IMMEDIATE_INIT */ 892#endif /* RAY_IMMEDIATE_INIT */
893 893
894 /* copy mac and broadcast addresses to linux device */ 894 /* copy mac and broadcast addresses to linux device */
895 memcpy(&dev->dev_addr, &local->sparm.b4.a_mac_addr, ADDRLEN); 895 memcpy(dev->dev_addr, &local->sparm.b4.a_mac_addr, ADDRLEN);
896 memset(dev->broadcast, 0xff, ETH_ALEN); 896 memset(dev->broadcast, 0xff, ETH_ALEN);
897 897
898 DEBUG(2, "ray_dev_init ending\n"); 898 DEBUG(2, "ray_dev_init ending\n");
diff --git a/drivers/net/wireless/rndis_wlan.c b/drivers/net/wireless/rndis_wlan.c
index bebf735cd4bd..c254fdf446fd 100644
--- a/drivers/net/wireless/rndis_wlan.c
+++ b/drivers/net/wireless/rndis_wlan.c
@@ -2,7 +2,7 @@
2 * Driver for RNDIS based wireless USB devices. 2 * Driver for RNDIS based wireless USB devices.
3 * 3 *
4 * Copyright (C) 2007 by Bjorge Dijkstra <bjd@jooz.net> 4 * Copyright (C) 2007 by Bjorge Dijkstra <bjd@jooz.net>
5 * Copyright (C) 2008 by Jussi Kivilinna <jussi.kivilinna@mbnet.fi> 5 * Copyright (C) 2008-2009 by Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
@@ -42,6 +42,7 @@
42#include <linux/ctype.h> 42#include <linux/ctype.h>
43#include <linux/spinlock.h> 43#include <linux/spinlock.h>
44#include <net/iw_handler.h> 44#include <net/iw_handler.h>
45#include <net/cfg80211.h>
45#include <linux/usb/usbnet.h> 46#include <linux/usb/usbnet.h>
46#include <linux/usb/rndis_host.h> 47#include <linux/usb/rndis_host.h>
47 48
@@ -195,6 +196,18 @@ enum ndis_80211_priv_filter {
195 ndis_80211_priv_8021x_wep 196 ndis_80211_priv_8021x_wep
196}; 197};
197 198
199enum ndis_80211_addkey_bits {
200 ndis_80211_addkey_8021x_auth = cpu_to_le32(1 << 28),
201 ndis_80211_addkey_set_init_recv_seq = cpu_to_le32(1 << 29),
202 ndis_80211_addkey_pairwise_key = cpu_to_le32(1 << 30),
203 ndis_80211_addkey_transmit_key = cpu_to_le32(1 << 31),
204};
205
206enum ndis_80211_addwep_bits {
207 ndis_80211_addwep_perclient_key = cpu_to_le32(1 << 30),
208 ndis_80211_addwep_transmit_key = cpu_to_le32(1 << 31),
209};
210
198struct ndis_80211_ssid { 211struct ndis_80211_ssid {
199 __le32 length; 212 __le32 length;
200 u8 essid[NDIS_802_11_LENGTH_SSID]; 213 u8 essid[NDIS_802_11_LENGTH_SSID];
@@ -308,7 +321,6 @@ enum wpa_key_mgmt { KEY_MGMT_802_1X, KEY_MGMT_PSK, KEY_MGMT_NONE,
308#define CAP_MODE_80211B 2 321#define CAP_MODE_80211B 2
309#define CAP_MODE_80211G 4 322#define CAP_MODE_80211G 4
310#define CAP_MODE_MASK 7 323#define CAP_MODE_MASK 7
311#define CAP_SUPPORT_TXPOWER 8
312 324
313#define WORK_LINK_UP (1<<0) 325#define WORK_LINK_UP (1<<0)
314#define WORK_LINK_DOWN (1<<1) 326#define WORK_LINK_DOWN (1<<1)
@@ -316,25 +328,61 @@ enum wpa_key_mgmt { KEY_MGMT_802_1X, KEY_MGMT_PSK, KEY_MGMT_NONE,
316 328
317#define COMMAND_BUFFER_SIZE (CONTROL_BUFFER_SIZE + sizeof(struct rndis_set)) 329#define COMMAND_BUFFER_SIZE (CONTROL_BUFFER_SIZE + sizeof(struct rndis_set))
318 330
331static const struct ieee80211_channel rndis_channels[] = {
332 { .center_freq = 2412 },
333 { .center_freq = 2417 },
334 { .center_freq = 2422 },
335 { .center_freq = 2427 },
336 { .center_freq = 2432 },
337 { .center_freq = 2437 },
338 { .center_freq = 2442 },
339 { .center_freq = 2447 },
340 { .center_freq = 2452 },
341 { .center_freq = 2457 },
342 { .center_freq = 2462 },
343 { .center_freq = 2467 },
344 { .center_freq = 2472 },
345 { .center_freq = 2484 },
346};
347
348static const struct ieee80211_rate rndis_rates[] = {
349 { .bitrate = 10 },
350 { .bitrate = 20, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
351 { .bitrate = 55, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
352 { .bitrate = 110, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
353 { .bitrate = 60 },
354 { .bitrate = 90 },
355 { .bitrate = 120 },
356 { .bitrate = 180 },
357 { .bitrate = 240 },
358 { .bitrate = 360 },
359 { .bitrate = 480 },
360 { .bitrate = 540 }
361};
362
319/* RNDIS device private data */ 363/* RNDIS device private data */
320struct rndis_wext_private { 364struct rndis_wext_private {
321 char name[32];
322
323 struct usbnet *usbdev; 365 struct usbnet *usbdev;
324 366
367 struct wireless_dev wdev;
368
369 struct cfg80211_scan_request *scan_request;
370
325 struct workqueue_struct *workqueue; 371 struct workqueue_struct *workqueue;
326 struct delayed_work stats_work; 372 struct delayed_work stats_work;
373 struct delayed_work scan_work;
327 struct work_struct work; 374 struct work_struct work;
328 struct mutex command_lock; 375 struct mutex command_lock;
329 spinlock_t stats_lock; 376 spinlock_t stats_lock;
330 unsigned long work_pending; 377 unsigned long work_pending;
331 378
379 struct ieee80211_supported_band band;
380 struct ieee80211_channel channels[ARRAY_SIZE(rndis_channels)];
381 struct ieee80211_rate rates[ARRAY_SIZE(rndis_rates)];
382
332 struct iw_statistics iwstats; 383 struct iw_statistics iwstats;
333 struct iw_statistics privstats; 384 struct iw_statistics privstats;
334 385
335 int nick_len;
336 char nick[32];
337
338 int caps; 386 int caps;
339 int multicast_size; 387 int multicast_size;
340 388
@@ -357,6 +405,7 @@ struct rndis_wext_private {
357 int encr_tx_key_index; 405 int encr_tx_key_index;
358 char encr_keys[4][32]; 406 char encr_keys[4][32];
359 int encr_key_len[4]; 407 int encr_key_len[4];
408 char encr_key_wpa[4];
360 int wpa_version; 409 int wpa_version;
361 int wpa_keymgmt; 410 int wpa_keymgmt;
362 int wpa_authalg; 411 int wpa_authalg;
@@ -368,8 +417,22 @@ struct rndis_wext_private {
368 u8 command_buffer[COMMAND_BUFFER_SIZE]; 417 u8 command_buffer[COMMAND_BUFFER_SIZE];
369}; 418};
370 419
420/*
421 * cfg80211 ops
422 */
423static int rndis_change_virtual_intf(struct wiphy *wiphy, int ifindex,
424 enum nl80211_iftype type, u32 *flags,
425 struct vif_params *params);
426
427static int rndis_scan(struct wiphy *wiphy, struct net_device *dev,
428 struct cfg80211_scan_request *request);
429
430static struct cfg80211_ops rndis_config_ops = {
431 .change_virtual_intf = rndis_change_virtual_intf,
432 .scan = rndis_scan,
433};
371 434
372static const int rates_80211g[8] = { 6, 9, 12, 18, 24, 36, 48, 54 }; 435static void *rndis_wiphy_privid = &rndis_wiphy_privid;
373 436
374static const int bcm4320_power_output[4] = { 25, 50, 75, 100 }; 437static const int bcm4320_power_output[4] = { 25, 50, 75, 100 };
375 438
@@ -894,7 +957,7 @@ static int set_infra_mode(struct usbnet *usbdev, int mode)
894 if (priv->wpa_keymgmt == 0 || 957 if (priv->wpa_keymgmt == 0 ||
895 priv->wpa_keymgmt == IW_AUTH_KEY_MGMT_802_1X) { 958 priv->wpa_keymgmt == IW_AUTH_KEY_MGMT_802_1X) {
896 for (i = 0; i < 4; i++) { 959 for (i = 0; i < 4; i++) {
897 if (priv->encr_key_len[i] > 0) 960 if (priv->encr_key_len[i] > 0 && !priv->encr_key_wpa[i])
898 add_wep_key(usbdev, priv->encr_keys[i], 961 add_wep_key(usbdev, priv->encr_keys[i],
899 priv->encr_key_len[i], i); 962 priv->encr_key_len[i], i);
900 } 963 }
@@ -948,7 +1011,7 @@ static int add_wep_key(struct usbnet *usbdev, char *key, int key_len, int index)
948 memcpy(&ndis_key.material, key, key_len); 1011 memcpy(&ndis_key.material, key, key_len);
949 1012
950 if (index == priv->encr_tx_key_index) { 1013 if (index == priv->encr_tx_key_index) {
951 ndis_key.index |= cpu_to_le32(1 << 31); 1014 ndis_key.index |= ndis_80211_addwep_transmit_key;
952 ret = set_encr_mode(usbdev, IW_AUTH_CIPHER_WEP104, 1015 ret = set_encr_mode(usbdev, IW_AUTH_CIPHER_WEP104,
953 IW_AUTH_CIPHER_NONE); 1016 IW_AUTH_CIPHER_NONE);
954 if (ret) 1017 if (ret)
@@ -965,12 +1028,81 @@ static int add_wep_key(struct usbnet *usbdev, char *key, int key_len, int index)
965 } 1028 }
966 1029
967 priv->encr_key_len[index] = key_len; 1030 priv->encr_key_len[index] = key_len;
1031 priv->encr_key_wpa[index] = 0;
968 memcpy(&priv->encr_keys[index], key, key_len); 1032 memcpy(&priv->encr_keys[index], key, key_len);
969 1033
970 return 0; 1034 return 0;
971} 1035}
972 1036
973 1037
1038static int add_wpa_key(struct usbnet *usbdev, const u8 *key, int key_len,
1039 int index, const struct sockaddr *addr,
1040 const u8 *rx_seq, int alg, int flags)
1041{
1042 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
1043 struct ndis_80211_key ndis_key;
1044 int ret;
1045
1046 if (index < 0 || index >= 4)
1047 return -EINVAL;
1048 if (key_len > sizeof(ndis_key.material) || key_len < 0)
1049 return -EINVAL;
1050 if ((flags & ndis_80211_addkey_set_init_recv_seq) && !rx_seq)
1051 return -EINVAL;
1052 if ((flags & ndis_80211_addkey_pairwise_key) && !addr)
1053 return -EINVAL;
1054
1055 devdbg(usbdev, "add_wpa_key(%i): flags:%i%i%i", index,
1056 !!(flags & ndis_80211_addkey_transmit_key),
1057 !!(flags & ndis_80211_addkey_pairwise_key),
1058 !!(flags & ndis_80211_addkey_set_init_recv_seq));
1059
1060 memset(&ndis_key, 0, sizeof(ndis_key));
1061
1062 ndis_key.size = cpu_to_le32(sizeof(ndis_key) -
1063 sizeof(ndis_key.material) + key_len);
1064 ndis_key.length = cpu_to_le32(key_len);
1065 ndis_key.index = cpu_to_le32(index) | flags;
1066
1067 if (alg == IW_ENCODE_ALG_TKIP && key_len == 32) {
1068 /* wpa_supplicant gives us the Michael MIC RX/TX keys in
1069 * different order than NDIS spec, so swap the order here. */
1070 memcpy(ndis_key.material, key, 16);
1071 memcpy(ndis_key.material + 16, key + 24, 8);
1072 memcpy(ndis_key.material + 24, key + 16, 8);
1073 } else
1074 memcpy(ndis_key.material, key, key_len);
1075
1076 if (flags & ndis_80211_addkey_set_init_recv_seq)
1077 memcpy(ndis_key.rsc, rx_seq, 6);
1078
1079 if (flags & ndis_80211_addkey_pairwise_key) {
1080 /* pairwise key */
1081 memcpy(ndis_key.bssid, addr->sa_data, ETH_ALEN);
1082 } else {
1083 /* group key */
1084 if (priv->infra_mode == ndis_80211_infra_adhoc)
1085 memset(ndis_key.bssid, 0xff, ETH_ALEN);
1086 else
1087 get_bssid(usbdev, ndis_key.bssid);
1088 }
1089
1090 ret = rndis_set_oid(usbdev, OID_802_11_ADD_KEY, &ndis_key,
1091 le32_to_cpu(ndis_key.size));
1092 devdbg(usbdev, "add_wpa_key: OID_802_11_ADD_KEY -> %08X", ret);
1093 if (ret != 0)
1094 return ret;
1095
1096 priv->encr_key_len[index] = key_len;
1097 priv->encr_key_wpa[index] = 1;
1098
1099 if (flags & ndis_80211_addkey_transmit_key)
1100 priv->encr_tx_key_index = index;
1101
1102 return 0;
1103}
1104
1105
974/* remove_key is for both wep and wpa */ 1106/* remove_key is for both wep and wpa */
975static int remove_key(struct usbnet *usbdev, int index, u8 bssid[ETH_ALEN]) 1107static int remove_key(struct usbnet *usbdev, int index, u8 bssid[ETH_ALEN])
976{ 1108{
@@ -983,6 +1115,7 @@ static int remove_key(struct usbnet *usbdev, int index, u8 bssid[ETH_ALEN])
983 return 0; 1115 return 0;
984 1116
985 priv->encr_key_len[index] = 0; 1117 priv->encr_key_len[index] = 0;
1118 priv->encr_key_wpa[index] = 0;
986 memset(&priv->encr_keys[index], 0, sizeof(priv->encr_keys[index])); 1119 memset(&priv->encr_keys[index], 0, sizeof(priv->encr_keys[index]));
987 1120
988 if (priv->wpa_cipher_pair == IW_AUTH_CIPHER_TKIP || 1121 if (priv->wpa_cipher_pair == IW_AUTH_CIPHER_TKIP ||
@@ -994,7 +1127,8 @@ static int remove_key(struct usbnet *usbdev, int index, u8 bssid[ETH_ALEN])
994 if (bssid) { 1127 if (bssid) {
995 /* pairwise key */ 1128 /* pairwise key */
996 if (memcmp(bssid, ffff_bssid, ETH_ALEN) != 0) 1129 if (memcmp(bssid, ffff_bssid, ETH_ALEN) != 0)
997 remove_key.index |= cpu_to_le32(1 << 30); 1130 remove_key.index |=
1131 ndis_80211_addkey_pairwise_key;
998 memcpy(remove_key.bssid, bssid, 1132 memcpy(remove_key.bssid, bssid,
999 sizeof(remove_key.bssid)); 1133 sizeof(remove_key.bssid));
1000 } else 1134 } else
@@ -1086,131 +1220,180 @@ static void set_multicast_list(struct usbnet *usbdev)
1086 1220
1087 1221
1088/* 1222/*
1089 * wireless extension handlers 1223 * cfg80211 ops
1090 */ 1224 */
1091 1225static int rndis_change_virtual_intf(struct wiphy *wiphy, int ifindex,
1092static int rndis_iw_commit(struct net_device *dev, 1226 enum nl80211_iftype type, u32 *flags,
1093 struct iw_request_info *info, union iwreq_data *wrqu, char *extra) 1227 struct vif_params *params)
1094{ 1228{
1095 /* dummy op */ 1229 struct net_device *dev;
1096 return 0; 1230 struct usbnet *usbdev;
1231 int mode;
1232
1233 /* we're under RTNL */
1234 dev = __dev_get_by_index(&init_net, ifindex);
1235 if (!dev)
1236 return -ENODEV;
1237 usbdev = netdev_priv(dev);
1238
1239 switch (type) {
1240 case NL80211_IFTYPE_ADHOC:
1241 mode = ndis_80211_infra_adhoc;
1242 break;
1243 case NL80211_IFTYPE_STATION:
1244 mode = ndis_80211_infra_infra;
1245 break;
1246 default:
1247 return -EINVAL;
1248 }
1249
1250 return set_infra_mode(usbdev, mode);
1097} 1251}
1098 1252
1099 1253
1100static int rndis_iw_get_range(struct net_device *dev, 1254#define SCAN_DELAY_JIFFIES (HZ)
1101 struct iw_request_info *info, union iwreq_data *wrqu, char *extra) 1255static int rndis_scan(struct wiphy *wiphy, struct net_device *dev,
1256 struct cfg80211_scan_request *request)
1102{ 1257{
1103 struct iw_range *range = (struct iw_range *)extra;
1104 struct usbnet *usbdev = netdev_priv(dev); 1258 struct usbnet *usbdev = netdev_priv(dev);
1105 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev); 1259 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
1106 int len, ret, i, j, num, has_80211g_rates; 1260 int ret;
1107 u8 rates[8]; 1261 __le32 tmp;
1108 __le32 tx_power;
1109 1262
1110 devdbg(usbdev, "SIOCGIWRANGE"); 1263 devdbg(usbdev, "cfg80211.scan");
1111 1264
1112 /* clear iw_range struct */ 1265 if (!request)
1113 memset(range, 0, sizeof(*range)); 1266 return -EINVAL;
1114 wrqu->data.length = sizeof(*range);
1115 1267
1116 range->txpower_capa = IW_TXPOW_MWATT; 1268 if (priv->scan_request && priv->scan_request != request)
1117 range->num_txpower = 1; 1269 return -EBUSY;
1118 if (priv->caps & CAP_SUPPORT_TXPOWER) {
1119 len = sizeof(tx_power);
1120 ret = rndis_query_oid(usbdev, OID_802_11_TX_POWER_LEVEL,
1121 &tx_power, &len);
1122 if (ret == 0 && le32_to_cpu(tx_power) != 0xFF)
1123 range->txpower[0] = le32_to_cpu(tx_power);
1124 else
1125 range->txpower[0] = get_bcm4320_power(priv);
1126 } else
1127 range->txpower[0] = get_bcm4320_power(priv);
1128 1270
1129 len = sizeof(rates); 1271 priv->scan_request = request;
1130 ret = rndis_query_oid(usbdev, OID_802_11_SUPPORTED_RATES, &rates, 1272
1131 &len); 1273 tmp = cpu_to_le32(1);
1132 has_80211g_rates = 0; 1274 ret = rndis_set_oid(usbdev, OID_802_11_BSSID_LIST_SCAN, &tmp,
1275 sizeof(tmp));
1133 if (ret == 0) { 1276 if (ret == 0) {
1134 j = 0; 1277 /* Wait before retrieving scan results from device */
1135 for (i = 0; i < len; i++) { 1278 queue_delayed_work(priv->workqueue, &priv->scan_work,
1136 if (rates[i] == 0) 1279 SCAN_DELAY_JIFFIES);
1137 break; 1280 }
1138 range->bitrate[j] = (rates[i] & 0x7f) * 500000;
1139 /* check for non 802.11b rates */
1140 if (range->bitrate[j] == 6000000 ||
1141 range->bitrate[j] == 9000000 ||
1142 (range->bitrate[j] >= 12000000 &&
1143 range->bitrate[j] != 22000000))
1144 has_80211g_rates = 1;
1145 j++;
1146 }
1147 range->num_bitrates = j;
1148 } else
1149 range->num_bitrates = 0;
1150
1151 /* fill in 802.11g rates */
1152 if (has_80211g_rates) {
1153 num = range->num_bitrates;
1154 for (i = 0; i < ARRAY_SIZE(rates_80211g); i++) {
1155 for (j = 0; j < num; j++) {
1156 if (range->bitrate[j] ==
1157 rates_80211g[i] * 1000000)
1158 break;
1159 }
1160 if (j == num)
1161 range->bitrate[range->num_bitrates++] =
1162 rates_80211g[i] * 1000000;
1163 if (range->num_bitrates == IW_MAX_BITRATES)
1164 break;
1165 }
1166 1281
1167 /* estimated max real througput in bps */ 1282 return ret;
1168 range->throughput = 54 * 1000 * 1000 / 2; 1283}
1169 1284
1170 /* ~35% more with afterburner */ 1285
1171 if (priv->param_afterburner) 1286static struct cfg80211_bss *rndis_bss_info_update(struct usbnet *usbdev,
1172 range->throughput = range->throughput / 100 * 135; 1287 struct ndis_80211_bssid_ex *bssid)
1173 } else { 1288{
1174 /* estimated max real througput in bps */ 1289 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
1175 range->throughput = 11 * 1000 * 1000 / 2; 1290 struct ieee80211_channel *channel;
1291 s32 signal;
1292 u64 timestamp;
1293 u16 capability;
1294 u16 beacon_interval;
1295 struct ndis_80211_fixed_ies *fixed;
1296 int ie_len, bssid_len;
1297 u8 *ie;
1298
1299 /* parse bssid structure */
1300 bssid_len = le32_to_cpu(bssid->length);
1301
1302 if (bssid_len < sizeof(struct ndis_80211_bssid_ex) +
1303 sizeof(struct ndis_80211_fixed_ies))
1304 return NULL;
1305
1306 fixed = (struct ndis_80211_fixed_ies *)bssid->ies;
1307
1308 ie = (void *)(bssid->ies + sizeof(struct ndis_80211_fixed_ies));
1309 ie_len = min(bssid_len - (int)sizeof(*bssid),
1310 (int)le32_to_cpu(bssid->ie_length));
1311 ie_len -= sizeof(struct ndis_80211_fixed_ies);
1312 if (ie_len < 0)
1313 return NULL;
1314
1315 /* extract data for cfg80211_inform_bss */
1316 channel = ieee80211_get_channel(priv->wdev.wiphy,
1317 KHZ_TO_MHZ(le32_to_cpu(bssid->config.ds_config)));
1318 if (!channel)
1319 return NULL;
1320
1321 signal = level_to_qual(le32_to_cpu(bssid->rssi));
1322 timestamp = le64_to_cpu(*(__le64 *)fixed->timestamp);
1323 capability = le16_to_cpu(fixed->capabilities);
1324 beacon_interval = le16_to_cpu(fixed->beacon_interval);
1325
1326 return cfg80211_inform_bss(priv->wdev.wiphy, channel, bssid->mac,
1327 timestamp, capability, beacon_interval, ie, ie_len, signal,
1328 GFP_KERNEL);
1329}
1330
1331
1332static int rndis_check_bssid_list(struct usbnet *usbdev)
1333{
1334 void *buf = NULL;
1335 struct ndis_80211_bssid_list_ex *bssid_list;
1336 struct ndis_80211_bssid_ex *bssid;
1337 int ret = -EINVAL, len, count, bssid_len;
1338
1339 devdbg(usbdev, "check_bssid_list");
1340
1341 len = CONTROL_BUFFER_SIZE;
1342 buf = kmalloc(len, GFP_KERNEL);
1343 if (!buf) {
1344 ret = -ENOMEM;
1345 goto out;
1176 } 1346 }
1177 1347
1178 range->num_channels = 14; 1348 ret = rndis_query_oid(usbdev, OID_802_11_BSSID_LIST, buf, &len);
1349 if (ret != 0)
1350 goto out;
1179 1351
1180 for (i = 0; (i < 14) && (i < IW_MAX_FREQUENCIES); i++) { 1352 bssid_list = buf;
1181 range->freq[i].i = i + 1; 1353 bssid = bssid_list->bssid;
1182 range->freq[i].m = ieee80211_dsss_chan_to_freq(i + 1) * 100000; 1354 bssid_len = le32_to_cpu(bssid->length);
1183 range->freq[i].e = 1; 1355 count = le32_to_cpu(bssid_list->num_items);
1356 devdbg(usbdev, "check_bssid_list: %d BSSIDs found", count);
1357
1358 while (count && ((void *)bssid + bssid_len) <= (buf + len)) {
1359 rndis_bss_info_update(usbdev, bssid);
1360
1361 bssid = (void *)bssid + bssid_len;
1362 bssid_len = le32_to_cpu(bssid->length);
1363 count--;
1184 } 1364 }
1185 range->num_frequency = i;
1186 1365
1187 range->min_rts = 0; 1366out:
1188 range->max_rts = 2347; 1367 kfree(buf);
1189 range->min_frag = 256; 1368 return ret;
1190 range->max_frag = 2346; 1369}
1370
1191 1371
1192 range->max_qual.qual = 100; 1372static void rndis_get_scan_results(struct work_struct *work)
1193 range->max_qual.level = 154; 1373{
1194 range->max_qual.updated = IW_QUAL_QUAL_UPDATED 1374 struct rndis_wext_private *priv =
1195 | IW_QUAL_LEVEL_UPDATED 1375 container_of(work, struct rndis_wext_private, scan_work.work);
1196 | IW_QUAL_NOISE_INVALID; 1376 struct usbnet *usbdev = priv->usbdev;
1377 int ret;
1197 1378
1198 range->we_version_compiled = WIRELESS_EXT; 1379 devdbg(usbdev, "get_scan_results");
1199 range->we_version_source = WIRELESS_EXT;
1200 1380
1201 range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 | 1381 ret = rndis_check_bssid_list(usbdev);
1202 IW_ENC_CAPA_CIPHER_TKIP | IW_ENC_CAPA_CIPHER_CCMP; 1382
1203 return 0; 1383 cfg80211_scan_done(priv->scan_request, ret < 0);
1384
1385 priv->scan_request = NULL;
1204} 1386}
1205 1387
1206 1388
1207static int rndis_iw_get_name(struct net_device *dev, 1389/*
1390 * wireless extension handlers
1391 */
1392
1393static int rndis_iw_commit(struct net_device *dev,
1208 struct iw_request_info *info, union iwreq_data *wrqu, char *extra) 1394 struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
1209{ 1395{
1210 struct usbnet *usbdev = netdev_priv(dev); 1396 /* dummy op */
1211 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
1212
1213 strcpy(wrqu->name, priv->name);
1214 return 0; 1397 return 0;
1215} 1398}
1216 1399
@@ -1422,55 +1605,6 @@ static int rndis_iw_get_auth(struct net_device *dev,
1422} 1605}
1423 1606
1424 1607
1425static int rndis_iw_get_mode(struct net_device *dev,
1426 struct iw_request_info *info,
1427 union iwreq_data *wrqu, char *extra)
1428{
1429 struct usbnet *usbdev = netdev_priv(dev);
1430 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
1431
1432 switch (priv->infra_mode) {
1433 case ndis_80211_infra_adhoc:
1434 wrqu->mode = IW_MODE_ADHOC;
1435 break;
1436 case ndis_80211_infra_infra:
1437 wrqu->mode = IW_MODE_INFRA;
1438 break;
1439 /*case ndis_80211_infra_auto_unknown:*/
1440 default:
1441 wrqu->mode = IW_MODE_AUTO;
1442 break;
1443 }
1444 devdbg(usbdev, "SIOCGIWMODE: %08x", wrqu->mode);
1445 return 0;
1446}
1447
1448
1449static int rndis_iw_set_mode(struct net_device *dev,
1450 struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
1451{
1452 struct usbnet *usbdev = netdev_priv(dev);
1453 int mode;
1454
1455 devdbg(usbdev, "SIOCSIWMODE: %08x", wrqu->mode);
1456
1457 switch (wrqu->mode) {
1458 case IW_MODE_ADHOC:
1459 mode = ndis_80211_infra_adhoc;
1460 break;
1461 case IW_MODE_INFRA:
1462 mode = ndis_80211_infra_infra;
1463 break;
1464 /*case IW_MODE_AUTO:*/
1465 default:
1466 mode = ndis_80211_infra_auto_unknown;
1467 break;
1468 }
1469
1470 return set_infra_mode(usbdev, mode);
1471}
1472
1473
1474static int rndis_iw_set_encode(struct net_device *dev, 1608static int rndis_iw_set_encode(struct net_device *dev,
1475 struct iw_request_info *info, union iwreq_data *wrqu, char *extra) 1609 struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
1476{ 1610{
@@ -1539,9 +1673,7 @@ static int rndis_iw_set_encode_ext(struct net_device *dev,
1539 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; 1673 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1540 struct usbnet *usbdev = netdev_priv(dev); 1674 struct usbnet *usbdev = netdev_priv(dev);
1541 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev); 1675 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
1542 struct ndis_80211_key ndis_key; 1676 int keyidx, flags;
1543 int keyidx, ret;
1544 u8 *addr;
1545 1677
1546 keyidx = wrqu->encoding.flags & IW_ENCODE_INDEX; 1678 keyidx = wrqu->encoding.flags & IW_ENCODE_INDEX;
1547 1679
@@ -1564,250 +1696,16 @@ static int rndis_iw_set_encode_ext(struct net_device *dev,
1564 ext->alg == IW_ENCODE_ALG_NONE || ext->key_len == 0) 1696 ext->alg == IW_ENCODE_ALG_NONE || ext->key_len == 0)
1565 return remove_key(usbdev, keyidx, NULL); 1697 return remove_key(usbdev, keyidx, NULL);
1566 1698
1567 if (ext->key_len > sizeof(ndis_key.material)) 1699 flags = 0;
1568 return -1; 1700 if (ext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID)
1569 1701 flags |= ndis_80211_addkey_set_init_recv_seq;
1570 memset(&ndis_key, 0, sizeof(ndis_key)); 1702 if (!(ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY))
1571 1703 flags |= ndis_80211_addkey_pairwise_key;
1572 ndis_key.size = cpu_to_le32(sizeof(ndis_key) -
1573 sizeof(ndis_key.material) + ext->key_len);
1574 ndis_key.length = cpu_to_le32(ext->key_len);
1575 ndis_key.index = cpu_to_le32(keyidx);
1576
1577 if (ext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) {
1578 memcpy(ndis_key.rsc, ext->rx_seq, 6);
1579 ndis_key.index |= cpu_to_le32(1 << 29);
1580 }
1581
1582 addr = ext->addr.sa_data;
1583 if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
1584 /* group key */
1585 if (priv->infra_mode == ndis_80211_infra_adhoc)
1586 memset(ndis_key.bssid, 0xff, ETH_ALEN);
1587 else
1588 get_bssid(usbdev, ndis_key.bssid);
1589 } else {
1590 /* pairwise key */
1591 ndis_key.index |= cpu_to_le32(1 << 30);
1592 memcpy(ndis_key.bssid, addr, ETH_ALEN);
1593 }
1594
1595 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)
1596 ndis_key.index |= cpu_to_le32(1 << 31);
1597
1598 if (ext->alg == IW_ENCODE_ALG_TKIP && ext->key_len == 32) {
1599 /* wpa_supplicant gives us the Michael MIC RX/TX keys in
1600 * different order than NDIS spec, so swap the order here. */
1601 memcpy(ndis_key.material, ext->key, 16);
1602 memcpy(ndis_key.material + 16, ext->key + 24, 8);
1603 memcpy(ndis_key.material + 24, ext->key + 16, 8);
1604 } else
1605 memcpy(ndis_key.material, ext->key, ext->key_len);
1606
1607 ret = rndis_set_oid(usbdev, OID_802_11_ADD_KEY, &ndis_key,
1608 le32_to_cpu(ndis_key.size));
1609 devdbg(usbdev, "SIOCSIWENCODEEXT: OID_802_11_ADD_KEY -> %08X", ret);
1610 if (ret != 0)
1611 return ret;
1612
1613 priv->encr_key_len[keyidx] = ext->key_len;
1614 memcpy(&priv->encr_keys[keyidx], ndis_key.material, ext->key_len);
1615 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) 1704 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)
1616 priv->encr_tx_key_index = keyidx; 1705 flags |= ndis_80211_addkey_transmit_key;
1617 1706
1618 return 0; 1707 return add_wpa_key(usbdev, ext->key, ext->key_len, keyidx, &ext->addr,
1619} 1708 ext->rx_seq, ext->alg, flags);
1620
1621
1622static int rndis_iw_set_scan(struct net_device *dev,
1623 struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
1624{
1625 struct usbnet *usbdev = netdev_priv(dev);
1626 union iwreq_data evt;
1627 int ret = -EINVAL;
1628 __le32 tmp;
1629
1630 devdbg(usbdev, "SIOCSIWSCAN");
1631
1632 if (wrqu->data.flags == 0) {
1633 tmp = cpu_to_le32(1);
1634 ret = rndis_set_oid(usbdev, OID_802_11_BSSID_LIST_SCAN, &tmp,
1635 sizeof(tmp));
1636 evt.data.flags = 0;
1637 evt.data.length = 0;
1638 wireless_send_event(dev, SIOCGIWSCAN, &evt, NULL);
1639 }
1640 return ret;
1641}
1642
1643
1644static char *rndis_translate_scan(struct net_device *dev,
1645 struct iw_request_info *info, char *cev,
1646 char *end_buf,
1647 struct ndis_80211_bssid_ex *bssid)
1648{
1649 struct usbnet *usbdev = netdev_priv(dev);
1650 u8 *ie;
1651 char *current_val;
1652 int bssid_len, ie_len, i;
1653 u32 beacon, atim;
1654 struct iw_event iwe;
1655 unsigned char sbuf[32];
1656
1657 bssid_len = le32_to_cpu(bssid->length);
1658
1659 devdbg(usbdev, "BSSID %pM", bssid->mac);
1660 iwe.cmd = SIOCGIWAP;
1661 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
1662 memcpy(iwe.u.ap_addr.sa_data, bssid->mac, ETH_ALEN);
1663 cev = iwe_stream_add_event(info, cev, end_buf, &iwe, IW_EV_ADDR_LEN);
1664
1665 devdbg(usbdev, "SSID(%d) %s", le32_to_cpu(bssid->ssid.length),
1666 bssid->ssid.essid);
1667 iwe.cmd = SIOCGIWESSID;
1668 iwe.u.essid.length = le32_to_cpu(bssid->ssid.length);
1669 iwe.u.essid.flags = 1;
1670 cev = iwe_stream_add_point(info, cev, end_buf, &iwe, bssid->ssid.essid);
1671
1672 devdbg(usbdev, "MODE %d", le32_to_cpu(bssid->net_infra));
1673 iwe.cmd = SIOCGIWMODE;
1674 switch (le32_to_cpu(bssid->net_infra)) {
1675 case ndis_80211_infra_adhoc:
1676 iwe.u.mode = IW_MODE_ADHOC;
1677 break;
1678 case ndis_80211_infra_infra:
1679 iwe.u.mode = IW_MODE_INFRA;
1680 break;
1681 /*case ndis_80211_infra_auto_unknown:*/
1682 default:
1683 iwe.u.mode = IW_MODE_AUTO;
1684 break;
1685 }
1686 cev = iwe_stream_add_event(info, cev, end_buf, &iwe, IW_EV_UINT_LEN);
1687
1688 devdbg(usbdev, "FREQ %d kHz", le32_to_cpu(bssid->config.ds_config));
1689 iwe.cmd = SIOCGIWFREQ;
1690 dsconfig_to_freq(le32_to_cpu(bssid->config.ds_config), &iwe.u.freq);
1691 cev = iwe_stream_add_event(info, cev, end_buf, &iwe, IW_EV_FREQ_LEN);
1692
1693 devdbg(usbdev, "QUAL %d", le32_to_cpu(bssid->rssi));
1694 iwe.cmd = IWEVQUAL;
1695 iwe.u.qual.qual = level_to_qual(le32_to_cpu(bssid->rssi));
1696 iwe.u.qual.level = le32_to_cpu(bssid->rssi);
1697 iwe.u.qual.updated = IW_QUAL_QUAL_UPDATED
1698 | IW_QUAL_LEVEL_UPDATED
1699 | IW_QUAL_NOISE_INVALID;
1700 cev = iwe_stream_add_event(info, cev, end_buf, &iwe, IW_EV_QUAL_LEN);
1701
1702 devdbg(usbdev, "ENCODE %d", le32_to_cpu(bssid->privacy));
1703 iwe.cmd = SIOCGIWENCODE;
1704 iwe.u.data.length = 0;
1705 if (le32_to_cpu(bssid->privacy) == ndis_80211_priv_accept_all)
1706 iwe.u.data.flags = IW_ENCODE_DISABLED;
1707 else
1708 iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
1709
1710 cev = iwe_stream_add_point(info, cev, end_buf, &iwe, NULL);
1711
1712 devdbg(usbdev, "RATES:");
1713 current_val = cev + iwe_stream_lcp_len(info);
1714 iwe.cmd = SIOCGIWRATE;
1715 for (i = 0; i < sizeof(bssid->rates); i++) {
1716 if (bssid->rates[i] & 0x7f) {
1717 iwe.u.bitrate.value =
1718 ((bssid->rates[i] & 0x7f) *
1719 500000);
1720 devdbg(usbdev, " %d", iwe.u.bitrate.value);
1721 current_val = iwe_stream_add_value(info, cev,
1722 current_val, end_buf, &iwe,
1723 IW_EV_PARAM_LEN);
1724 }
1725 }
1726
1727 if ((current_val - cev) > iwe_stream_lcp_len(info))
1728 cev = current_val;
1729
1730 beacon = le32_to_cpu(bssid->config.beacon_period);
1731 devdbg(usbdev, "BCN_INT %d", beacon);
1732 iwe.cmd = IWEVCUSTOM;
1733 snprintf(sbuf, sizeof(sbuf), "bcn_int=%d", beacon);
1734 iwe.u.data.length = strlen(sbuf);
1735 cev = iwe_stream_add_point(info, cev, end_buf, &iwe, sbuf);
1736
1737 atim = le32_to_cpu(bssid->config.atim_window);
1738 devdbg(usbdev, "ATIM %d", atim);
1739 iwe.cmd = IWEVCUSTOM;
1740 snprintf(sbuf, sizeof(sbuf), "atim=%u", atim);
1741 iwe.u.data.length = strlen(sbuf);
1742 cev = iwe_stream_add_point(info, cev, end_buf, &iwe, sbuf);
1743
1744 ie = (void *)(bssid->ies + sizeof(struct ndis_80211_fixed_ies));
1745 ie_len = min(bssid_len - (int)sizeof(*bssid),
1746 (int)le32_to_cpu(bssid->ie_length));
1747 ie_len -= sizeof(struct ndis_80211_fixed_ies);
1748 while (ie_len >= 2 && 2 + ie[1] <= ie_len) {
1749 if ((ie[0] == WLAN_EID_GENERIC && ie[1] >= 4 &&
1750 memcmp(ie + 2, "\x00\x50\xf2\x01", 4) == 0) ||
1751 ie[0] == WLAN_EID_RSN) {
1752 devdbg(usbdev, "IE: WPA%d",
1753 (ie[0] == WLAN_EID_RSN) ? 2 : 1);
1754 iwe.cmd = IWEVGENIE;
1755 /* arbitrary cut-off at 64 */
1756 iwe.u.data.length = min(ie[1] + 2, 64);
1757 cev = iwe_stream_add_point(info, cev, end_buf, &iwe, ie);
1758 }
1759
1760 ie_len -= 2 + ie[1];
1761 ie += 2 + ie[1];
1762 }
1763
1764 return cev;
1765}
1766
1767
1768static int rndis_iw_get_scan(struct net_device *dev,
1769 struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
1770{
1771 struct usbnet *usbdev = netdev_priv(dev);
1772 void *buf = NULL;
1773 char *cev = extra;
1774 struct ndis_80211_bssid_list_ex *bssid_list;
1775 struct ndis_80211_bssid_ex *bssid;
1776 int ret = -EINVAL, len, count, bssid_len;
1777
1778 devdbg(usbdev, "SIOCGIWSCAN");
1779
1780 len = CONTROL_BUFFER_SIZE;
1781 buf = kmalloc(len, GFP_KERNEL);
1782 if (!buf) {
1783 ret = -ENOMEM;
1784 goto out;
1785 }
1786
1787 ret = rndis_query_oid(usbdev, OID_802_11_BSSID_LIST, buf, &len);
1788
1789 if (ret != 0)
1790 goto out;
1791
1792 bssid_list = buf;
1793 bssid = bssid_list->bssid;
1794 bssid_len = le32_to_cpu(bssid->length);
1795 count = le32_to_cpu(bssid_list->num_items);
1796 devdbg(usbdev, "SIOCGIWSCAN: %d BSSIDs found", count);
1797
1798 while (count && ((void *)bssid + bssid_len) <= (buf + len)) {
1799 cev = rndis_translate_scan(dev, info, cev,
1800 extra + IW_SCAN_MAX_DATA, bssid);
1801 bssid = (void *)bssid + bssid_len;
1802 bssid_len = le32_to_cpu(bssid->length);
1803 count--;
1804 }
1805
1806out:
1807 wrqu->data.length = cev - extra;
1808 wrqu->data.flags = 0;
1809 kfree(buf);
1810 return ret;
1811} 1709}
1812 1710
1813 1711
@@ -1936,39 +1834,6 @@ static int rndis_iw_get_frag(struct net_device *dev,
1936} 1834}
1937 1835
1938 1836
1939static int rndis_iw_set_nick(struct net_device *dev,
1940 struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
1941{
1942 struct usbnet *usbdev = netdev_priv(dev);
1943 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
1944
1945 devdbg(usbdev, "SIOCSIWNICK");
1946
1947 priv->nick_len = wrqu->data.length;
1948 if (priv->nick_len > 32)
1949 priv->nick_len = 32;
1950
1951 memcpy(priv->nick, extra, priv->nick_len);
1952 return 0;
1953}
1954
1955
1956static int rndis_iw_get_nick(struct net_device *dev,
1957 struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
1958{
1959 struct usbnet *usbdev = netdev_priv(dev);
1960 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
1961
1962 wrqu->data.flags = 1;
1963 wrqu->data.length = priv->nick_len;
1964 memcpy(extra, priv->nick, priv->nick_len);
1965
1966 devdbg(usbdev, "SIOCGIWNICK: '%s'", priv->nick);
1967
1968 return 0;
1969}
1970
1971
1972static int rndis_iw_set_freq(struct net_device *dev, 1837static int rndis_iw_set_freq(struct net_device *dev,
1973 struct iw_request_info *info, union iwreq_data *wrqu, char *extra) 1838 struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
1974{ 1839{
@@ -2023,18 +1888,10 @@ static int rndis_iw_get_txpower(struct net_device *dev,
2023 struct usbnet *usbdev = netdev_priv(dev); 1888 struct usbnet *usbdev = netdev_priv(dev);
2024 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev); 1889 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
2025 __le32 tx_power; 1890 __le32 tx_power;
2026 int ret = 0, len;
2027 1891
2028 if (priv->radio_on) { 1892 if (priv->radio_on) {
2029 if (priv->caps & CAP_SUPPORT_TXPOWER) { 1893 /* fake since changing tx_power (by userlevel) not supported */
2030 len = sizeof(tx_power); 1894 tx_power = cpu_to_le32(get_bcm4320_power(priv));
2031 ret = rndis_query_oid(usbdev, OID_802_11_TX_POWER_LEVEL,
2032 &tx_power, &len);
2033 if (ret != 0)
2034 return ret;
2035 } else
2036 /* fake incase not supported */
2037 tx_power = cpu_to_le32(get_bcm4320_power(priv));
2038 1895
2039 wrqu->txpower.flags = IW_TXPOW_MWATT; 1896 wrqu->txpower.flags = IW_TXPOW_MWATT;
2040 wrqu->txpower.value = le32_to_cpu(tx_power); 1897 wrqu->txpower.value = le32_to_cpu(tx_power);
@@ -2047,7 +1904,7 @@ static int rndis_iw_get_txpower(struct net_device *dev,
2047 1904
2048 devdbg(usbdev, "SIOCGIWTXPOW: %d", wrqu->txpower.value); 1905 devdbg(usbdev, "SIOCGIWTXPOW: %d", wrqu->txpower.value);
2049 1906
2050 return ret; 1907 return 0;
2051} 1908}
2052 1909
2053 1910
@@ -2057,7 +1914,6 @@ static int rndis_iw_set_txpower(struct net_device *dev,
2057 struct usbnet *usbdev = netdev_priv(dev); 1914 struct usbnet *usbdev = netdev_priv(dev);
2058 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev); 1915 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
2059 __le32 tx_power = 0; 1916 __le32 tx_power = 0;
2060 int ret = 0;
2061 1917
2062 if (!wrqu->txpower.disabled) { 1918 if (!wrqu->txpower.disabled) {
2063 if (wrqu->txpower.flags == IW_TXPOW_MWATT) 1919 if (wrqu->txpower.flags == IW_TXPOW_MWATT)
@@ -2080,22 +1936,10 @@ static int rndis_iw_set_txpower(struct net_device *dev,
2080 devdbg(usbdev, "SIOCSIWTXPOW: %d", le32_to_cpu(tx_power)); 1936 devdbg(usbdev, "SIOCSIWTXPOW: %d", le32_to_cpu(tx_power));
2081 1937
2082 if (le32_to_cpu(tx_power) != 0) { 1938 if (le32_to_cpu(tx_power) != 0) {
2083 if (priv->caps & CAP_SUPPORT_TXPOWER) { 1939 /* txpower unsupported, just turn radio on */
2084 /* turn radio on first */ 1940 if (!priv->radio_on)
2085 if (!priv->radio_on) 1941 return disassociate(usbdev, 1);
2086 disassociate(usbdev, 1); 1942 return 0; /* all ready on */
2087
2088 ret = rndis_set_oid(usbdev, OID_802_11_TX_POWER_LEVEL,
2089 &tx_power, sizeof(tx_power));
2090 if (ret != 0)
2091 ret = -EOPNOTSUPP;
2092 return ret;
2093 } else {
2094 /* txpower unsupported, just turn radio on */
2095 if (!priv->radio_on)
2096 return disassociate(usbdev, 1);
2097 return 0; /* all ready on */
2098 }
2099 } 1943 }
2100 1944
2101 /* tx_power == 0, turn off radio */ 1945 /* tx_power == 0, turn off radio */
@@ -2165,20 +2009,18 @@ static struct iw_statistics *rndis_get_wireless_stats(struct net_device *dev)
2165static const iw_handler rndis_iw_handler[] = 2009static const iw_handler rndis_iw_handler[] =
2166{ 2010{
2167 IW_IOCTL(SIOCSIWCOMMIT) = rndis_iw_commit, 2011 IW_IOCTL(SIOCSIWCOMMIT) = rndis_iw_commit,
2168 IW_IOCTL(SIOCGIWNAME) = rndis_iw_get_name, 2012 IW_IOCTL(SIOCGIWNAME) = (iw_handler) cfg80211_wext_giwname,
2169 IW_IOCTL(SIOCSIWFREQ) = rndis_iw_set_freq, 2013 IW_IOCTL(SIOCSIWFREQ) = rndis_iw_set_freq,
2170 IW_IOCTL(SIOCGIWFREQ) = rndis_iw_get_freq, 2014 IW_IOCTL(SIOCGIWFREQ) = rndis_iw_get_freq,
2171 IW_IOCTL(SIOCSIWMODE) = rndis_iw_set_mode, 2015 IW_IOCTL(SIOCSIWMODE) = (iw_handler) cfg80211_wext_siwmode,
2172 IW_IOCTL(SIOCGIWMODE) = rndis_iw_get_mode, 2016 IW_IOCTL(SIOCGIWMODE) = (iw_handler) cfg80211_wext_giwmode,
2173 IW_IOCTL(SIOCGIWRANGE) = rndis_iw_get_range, 2017 IW_IOCTL(SIOCGIWRANGE) = (iw_handler) cfg80211_wext_giwrange,
2174 IW_IOCTL(SIOCSIWAP) = rndis_iw_set_bssid, 2018 IW_IOCTL(SIOCSIWAP) = rndis_iw_set_bssid,
2175 IW_IOCTL(SIOCGIWAP) = rndis_iw_get_bssid, 2019 IW_IOCTL(SIOCGIWAP) = rndis_iw_get_bssid,
2176 IW_IOCTL(SIOCSIWSCAN) = rndis_iw_set_scan, 2020 IW_IOCTL(SIOCSIWSCAN) = (iw_handler) cfg80211_wext_siwscan,
2177 IW_IOCTL(SIOCGIWSCAN) = rndis_iw_get_scan, 2021 IW_IOCTL(SIOCGIWSCAN) = (iw_handler) cfg80211_wext_giwscan,
2178 IW_IOCTL(SIOCSIWESSID) = rndis_iw_set_essid, 2022 IW_IOCTL(SIOCSIWESSID) = rndis_iw_set_essid,
2179 IW_IOCTL(SIOCGIWESSID) = rndis_iw_get_essid, 2023 IW_IOCTL(SIOCGIWESSID) = rndis_iw_get_essid,
2180 IW_IOCTL(SIOCSIWNICKN) = rndis_iw_set_nick,
2181 IW_IOCTL(SIOCGIWNICKN) = rndis_iw_get_nick,
2182 IW_IOCTL(SIOCGIWRATE) = rndis_iw_get_rate, 2024 IW_IOCTL(SIOCGIWRATE) = rndis_iw_get_rate,
2183 IW_IOCTL(SIOCSIWRTS) = rndis_iw_set_rts, 2025 IW_IOCTL(SIOCSIWRTS) = rndis_iw_set_rts,
2184 IW_IOCTL(SIOCGIWRTS) = rndis_iw_get_rts, 2026 IW_IOCTL(SIOCGIWRTS) = rndis_iw_get_rts,
@@ -2306,16 +2148,8 @@ static int rndis_wext_get_caps(struct usbnet *usbdev)
2306 __le32 items[8]; 2148 __le32 items[8];
2307 } networks_supported; 2149 } networks_supported;
2308 int len, retval, i, n; 2150 int len, retval, i, n;
2309 __le32 tx_power;
2310 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev); 2151 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
2311 2152
2312 /* determine if supports setting txpower */
2313 len = sizeof(tx_power);
2314 retval = rndis_query_oid(usbdev, OID_802_11_TX_POWER_LEVEL, &tx_power,
2315 &len);
2316 if (retval == 0 && le32_to_cpu(tx_power) != 0xFF)
2317 priv->caps |= CAP_SUPPORT_TXPOWER;
2318
2319 /* determine supported modes */ 2153 /* determine supported modes */
2320 len = sizeof(networks_supported); 2154 len = sizeof(networks_supported);
2321 retval = rndis_query_oid(usbdev, OID_802_11_NETWORK_TYPES_SUPPORTED, 2155 retval = rndis_query_oid(usbdev, OID_802_11_NETWORK_TYPES_SUPPORTED,
@@ -2338,12 +2172,6 @@ static int rndis_wext_get_caps(struct usbnet *usbdev)
2338 break; 2172 break;
2339 } 2173 }
2340 } 2174 }
2341 if (priv->caps & CAP_MODE_80211A)
2342 strcat(priv->name, "a");
2343 if (priv->caps & CAP_MODE_80211B)
2344 strcat(priv->name, "b");
2345 if (priv->caps & CAP_MODE_80211G)
2346 strcat(priv->name, "g");
2347 } 2175 }
2348 2176
2349 return retval; 2177 return retval;
@@ -2387,7 +2215,7 @@ static void rndis_update_wireless_stats(struct work_struct *work)
2387 if (ret == 0) { 2215 if (ret == 0) {
2388 memset(&iwstats.qual, 0, sizeof(iwstats.qual)); 2216 memset(&iwstats.qual, 0, sizeof(iwstats.qual));
2389 iwstats.qual.qual = level_to_qual(le32_to_cpu(rssi)); 2217 iwstats.qual.qual = level_to_qual(le32_to_cpu(rssi));
2390 iwstats.qual.level = le32_to_cpu(rssi); 2218 iwstats.qual.level = level_to_qual(le32_to_cpu(rssi));
2391 iwstats.qual.updated = IW_QUAL_QUAL_UPDATED 2219 iwstats.qual.updated = IW_QUAL_QUAL_UPDATED
2392 | IW_QUAL_LEVEL_UPDATED 2220 | IW_QUAL_LEVEL_UPDATED
2393 | IW_QUAL_NOISE_INVALID; 2221 | IW_QUAL_NOISE_INVALID;
@@ -2457,7 +2285,17 @@ end:
2457} 2285}
2458 2286
2459 2287
2460static int bcm4320_early_init(struct usbnet *usbdev) 2288static int bcm4320a_early_init(struct usbnet *usbdev)
2289{
2290 /* bcm4320a doesn't handle configuration parameters well. Try
2291 * set any and you get partially zeroed mac and broken device.
2292 */
2293
2294 return 0;
2295}
2296
2297
2298static int bcm4320b_early_init(struct usbnet *usbdev)
2461{ 2299{
2462 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev); 2300 struct rndis_wext_private *priv = get_rndis_wext_priv(usbdev);
2463 char buf[8]; 2301 char buf[8];
@@ -2538,20 +2376,28 @@ static const struct net_device_ops rndis_wext_netdev_ops = {
2538 2376
2539static int rndis_wext_bind(struct usbnet *usbdev, struct usb_interface *intf) 2377static int rndis_wext_bind(struct usbnet *usbdev, struct usb_interface *intf)
2540{ 2378{
2379 struct wiphy *wiphy;
2541 struct rndis_wext_private *priv; 2380 struct rndis_wext_private *priv;
2542 int retval, len; 2381 int retval, len;
2543 __le32 tmp; 2382 __le32 tmp;
2544 2383
2545 /* allocate rndis private data */ 2384 /* allocate wiphy and rndis private data
2546 priv = kzalloc(sizeof(struct rndis_wext_private), GFP_KERNEL); 2385 * NOTE: We only support a single virtual interface, so wiphy
2547 if (!priv) 2386 * and wireless_dev are somewhat synonymous for this device.
2387 */
2388 wiphy = wiphy_new(&rndis_config_ops, sizeof(struct rndis_wext_private));
2389 if (!wiphy)
2548 return -ENOMEM; 2390 return -ENOMEM;
2549 2391
2392 priv = wiphy_priv(wiphy);
2393 usbdev->net->ieee80211_ptr = &priv->wdev;
2394 priv->wdev.wiphy = wiphy;
2395 priv->wdev.iftype = NL80211_IFTYPE_STATION;
2396
2550 /* These have to be initialized before calling generic_rndis_bind(). 2397 /* These have to be initialized before calling generic_rndis_bind().
2551 * Otherwise we'll be in big trouble in rndis_wext_early_init(). 2398 * Otherwise we'll be in big trouble in rndis_wext_early_init().
2552 */ 2399 */
2553 usbdev->driver_priv = priv; 2400 usbdev->driver_priv = priv;
2554 strcpy(priv->name, "IEEE802.11");
2555 usbdev->net->wireless_handlers = &rndis_iw_handlers; 2401 usbdev->net->wireless_handlers = &rndis_iw_handlers;
2556 priv->usbdev = usbdev; 2402 priv->usbdev = usbdev;
2557 2403
@@ -2562,6 +2408,7 @@ static int rndis_wext_bind(struct usbnet *usbdev, struct usb_interface *intf)
2562 priv->workqueue = create_singlethread_workqueue("rndis_wlan"); 2408 priv->workqueue = create_singlethread_workqueue("rndis_wlan");
2563 INIT_WORK(&priv->work, rndis_wext_worker); 2409 INIT_WORK(&priv->work, rndis_wext_worker);
2564 INIT_DELAYED_WORK(&priv->stats_work, rndis_update_wireless_stats); 2410 INIT_DELAYED_WORK(&priv->stats_work, rndis_update_wireless_stats);
2411 INIT_DELAYED_WORK(&priv->scan_work, rndis_get_scan_results);
2565 2412
2566 /* try bind rndis_host */ 2413 /* try bind rndis_host */
2567 retval = generic_rndis_bind(usbdev, intf, FLAG_RNDIS_PHYM_WIRELESS); 2414 retval = generic_rndis_bind(usbdev, intf, FLAG_RNDIS_PHYM_WIRELESS);
@@ -2600,7 +2447,32 @@ static int rndis_wext_bind(struct usbnet *usbdev, struct usb_interface *intf)
2600 | IW_QUAL_QUAL_INVALID 2447 | IW_QUAL_QUAL_INVALID
2601 | IW_QUAL_LEVEL_INVALID; 2448 | IW_QUAL_LEVEL_INVALID;
2602 2449
2450 /* fill-out wiphy structure and register w/ cfg80211 */
2451 memcpy(wiphy->perm_addr, usbdev->net->dev_addr, ETH_ALEN);
2452 wiphy->privid = rndis_wiphy_privid;
2453 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION)
2454 | BIT(NL80211_IFTYPE_ADHOC);
2455 wiphy->max_scan_ssids = 1;
2456
2457 /* TODO: fill-out band information based on priv->caps */
2603 rndis_wext_get_caps(usbdev); 2458 rndis_wext_get_caps(usbdev);
2459
2460 memcpy(priv->channels, rndis_channels, sizeof(rndis_channels));
2461 memcpy(priv->rates, rndis_rates, sizeof(rndis_rates));
2462 priv->band.channels = priv->channels;
2463 priv->band.n_channels = ARRAY_SIZE(rndis_channels);
2464 priv->band.bitrates = priv->rates;
2465 priv->band.n_bitrates = ARRAY_SIZE(rndis_rates);
2466 wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
2467 wiphy->signal_type = CFG80211_SIGNAL_TYPE_UNSPEC;
2468
2469 set_wiphy_dev(wiphy, &usbdev->udev->dev);
2470
2471 if (wiphy_register(wiphy)) {
2472 retval = -ENODEV;
2473 goto fail;
2474 }
2475
2604 set_default_iw_params(usbdev); 2476 set_default_iw_params(usbdev);
2605 2477
2606 /* turn radio on */ 2478 /* turn radio on */
@@ -2615,11 +2487,12 @@ static int rndis_wext_bind(struct usbnet *usbdev, struct usb_interface *intf)
2615 2487
2616fail: 2488fail:
2617 cancel_delayed_work_sync(&priv->stats_work); 2489 cancel_delayed_work_sync(&priv->stats_work);
2490 cancel_delayed_work_sync(&priv->scan_work);
2618 cancel_work_sync(&priv->work); 2491 cancel_work_sync(&priv->work);
2619 flush_workqueue(priv->workqueue); 2492 flush_workqueue(priv->workqueue);
2620 destroy_workqueue(priv->workqueue); 2493 destroy_workqueue(priv->workqueue);
2621 2494
2622 kfree(priv); 2495 wiphy_free(wiphy);
2623 return retval; 2496 return retval;
2624} 2497}
2625 2498
@@ -2632,15 +2505,18 @@ static void rndis_wext_unbind(struct usbnet *usbdev, struct usb_interface *intf)
2632 disassociate(usbdev, 0); 2505 disassociate(usbdev, 0);
2633 2506
2634 cancel_delayed_work_sync(&priv->stats_work); 2507 cancel_delayed_work_sync(&priv->stats_work);
2508 cancel_delayed_work_sync(&priv->scan_work);
2635 cancel_work_sync(&priv->work); 2509 cancel_work_sync(&priv->work);
2636 flush_workqueue(priv->workqueue); 2510 flush_workqueue(priv->workqueue);
2637 destroy_workqueue(priv->workqueue); 2511 destroy_workqueue(priv->workqueue);
2638 2512
2639 if (priv && priv->wpa_ie_len) 2513 if (priv && priv->wpa_ie_len)
2640 kfree(priv->wpa_ie); 2514 kfree(priv->wpa_ie);
2641 kfree(priv);
2642 2515
2643 rndis_unbind(usbdev, intf); 2516 rndis_unbind(usbdev, intf);
2517
2518 wiphy_unregister(priv->wdev.wiphy);
2519 wiphy_free(priv->wdev.wiphy);
2644} 2520}
2645 2521
2646 2522
@@ -2659,7 +2535,7 @@ static const struct driver_info bcm4320b_info = {
2659 .rx_fixup = rndis_rx_fixup, 2535 .rx_fixup = rndis_rx_fixup,
2660 .tx_fixup = rndis_tx_fixup, 2536 .tx_fixup = rndis_tx_fixup,
2661 .reset = rndis_wext_reset, 2537 .reset = rndis_wext_reset,
2662 .early_init = bcm4320_early_init, 2538 .early_init = bcm4320b_early_init,
2663 .link_change = rndis_wext_link_change, 2539 .link_change = rndis_wext_link_change,
2664}; 2540};
2665 2541
@@ -2672,7 +2548,7 @@ static const struct driver_info bcm4320a_info = {
2672 .rx_fixup = rndis_rx_fixup, 2548 .rx_fixup = rndis_rx_fixup,
2673 .tx_fixup = rndis_tx_fixup, 2549 .tx_fixup = rndis_tx_fixup,
2674 .reset = rndis_wext_reset, 2550 .reset = rndis_wext_reset,
2675 .early_init = bcm4320_early_init, 2551 .early_init = bcm4320a_early_init,
2676 .link_change = rndis_wext_link_change, 2552 .link_change = rndis_wext_link_change,
2677}; 2553};
2678 2554
@@ -2685,7 +2561,7 @@ static const struct driver_info rndis_wext_info = {
2685 .rx_fixup = rndis_rx_fixup, 2561 .rx_fixup = rndis_rx_fixup,
2686 .tx_fixup = rndis_tx_fixup, 2562 .tx_fixup = rndis_tx_fixup,
2687 .reset = rndis_wext_reset, 2563 .reset = rndis_wext_reset,
2688 .early_init = bcm4320_early_init, 2564 .early_init = bcm4320a_early_init,
2689 .link_change = rndis_wext_link_change, 2565 .link_change = rndis_wext_link_change,
2690}; 2566};
2691 2567
diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig
index bfc5d9cf716e..18ee7d6c4028 100644
--- a/drivers/net/wireless/rt2x00/Kconfig
+++ b/drivers/net/wireless/rt2x00/Kconfig
@@ -77,6 +77,20 @@ config RT73USB
77 77
78 When compiled as a module, this driver will be called "rt73usb.ko". 78 When compiled as a module, this driver will be called "rt73usb.ko".
79 79
80config RT2800USB
81 tristate "Ralink rt2800 (USB) support"
82 depends on USB
83 select RT2X00_LIB_USB
84 select RT2X00_LIB_HT
85 select RT2X00_LIB_FIRMWARE
86 select RT2X00_LIB_CRYPTO
87 select CRC_CCITT
88 ---help---
89 This adds support for rt2800 wireless chipset family.
90 Supported chips: RT2770, RT2870 & RT3070.
91
92 When compiled as a module, this driver will be called "rt2800usb.ko".
93
80config RT2X00_LIB_PCI 94config RT2X00_LIB_PCI
81 tristate 95 tristate
82 select RT2X00_LIB 96 select RT2X00_LIB
@@ -88,6 +102,9 @@ config RT2X00_LIB_USB
88config RT2X00_LIB 102config RT2X00_LIB
89 tristate 103 tristate
90 104
105config RT2X00_LIB_HT
106 boolean
107
91config RT2X00_LIB_FIRMWARE 108config RT2X00_LIB_FIRMWARE
92 boolean 109 boolean
93 select FW_LOADER 110 select FW_LOADER
diff --git a/drivers/net/wireless/rt2x00/Makefile b/drivers/net/wireless/rt2x00/Makefile
index f22d808d8c51..bfc7226f0afe 100644
--- a/drivers/net/wireless/rt2x00/Makefile
+++ b/drivers/net/wireless/rt2x00/Makefile
@@ -8,6 +8,7 @@ rt2x00lib-$(CONFIG_RT2X00_LIB_CRYPTO) += rt2x00crypto.o
8rt2x00lib-$(CONFIG_RT2X00_LIB_RFKILL) += rt2x00rfkill.o 8rt2x00lib-$(CONFIG_RT2X00_LIB_RFKILL) += rt2x00rfkill.o
9rt2x00lib-$(CONFIG_RT2X00_LIB_FIRMWARE) += rt2x00firmware.o 9rt2x00lib-$(CONFIG_RT2X00_LIB_FIRMWARE) += rt2x00firmware.o
10rt2x00lib-$(CONFIG_RT2X00_LIB_LEDS) += rt2x00leds.o 10rt2x00lib-$(CONFIG_RT2X00_LIB_LEDS) += rt2x00leds.o
11rt2x00lib-$(CONFIG_RT2X00_LIB_HT) += rt2x00ht.o
11 12
12obj-$(CONFIG_RT2X00_LIB) += rt2x00lib.o 13obj-$(CONFIG_RT2X00_LIB) += rt2x00lib.o
13obj-$(CONFIG_RT2X00_LIB_PCI) += rt2x00pci.o 14obj-$(CONFIG_RT2X00_LIB_PCI) += rt2x00pci.o
@@ -17,3 +18,4 @@ obj-$(CONFIG_RT2500PCI) += rt2500pci.o
17obj-$(CONFIG_RT61PCI) += rt61pci.o 18obj-$(CONFIG_RT61PCI) += rt61pci.o
18obj-$(CONFIG_RT2500USB) += rt2500usb.o 19obj-$(CONFIG_RT2500USB) += rt2500usb.o
19obj-$(CONFIG_RT73USB) += rt73usb.o 20obj-$(CONFIG_RT73USB) += rt73usb.o
21obj-$(CONFIG_RT2800USB) += rt2800usb.o
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index 0f08773328c6..0197531bd88c 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -335,10 +335,11 @@ static void rt2400pci_config_erp(struct rt2x00_dev *rt2x00dev,
335 preamble_mask = erp->short_preamble << 3; 335 preamble_mask = erp->short_preamble << 3;
336 336
337 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 337 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
338 rt2x00_set_field32(&reg, TXCSR1_ACK_TIMEOUT, 338 rt2x00_set_field32(&reg, TXCSR1_ACK_TIMEOUT, erp->ack_timeout);
339 erp->ack_timeout);
340 rt2x00_set_field32(&reg, TXCSR1_ACK_CONSUME_TIME, 339 rt2x00_set_field32(&reg, TXCSR1_ACK_CONSUME_TIME,
341 erp->ack_consume_time); 340 erp->ack_consume_time);
341 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);
342 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
342 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg); 343 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
343 344
344 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg); 345 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg);
@@ -371,6 +372,11 @@ static void rt2400pci_config_erp(struct rt2x00_dev *rt2x00dev,
371 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time); 372 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time);
372 rt2x00pci_register_write(rt2x00dev, CSR11, reg); 373 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
373 374
375 rt2x00pci_register_read(rt2x00dev, CSR12, &reg);
376 rt2x00_set_field32(&reg, CSR12_BEACON_INTERVAL, erp->beacon_int * 16);
377 rt2x00_set_field32(&reg, CSR12_CFP_MAX_DURATION, erp->beacon_int * 16);
378 rt2x00pci_register_write(rt2x00dev, CSR12, reg);
379
374 rt2x00pci_register_read(rt2x00dev, CSR18, &reg); 380 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
375 rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs); 381 rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs);
376 rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs); 382 rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs);
@@ -503,24 +509,6 @@ static void rt2400pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
503 rt2x00pci_register_write(rt2x00dev, CSR11, reg); 509 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
504} 510}
505 511
506static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev,
507 struct rt2x00lib_conf *libconf)
508{
509 u32 reg;
510
511 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
512 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);
513 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
514 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
515
516 rt2x00pci_register_read(rt2x00dev, CSR12, &reg);
517 rt2x00_set_field32(&reg, CSR12_BEACON_INTERVAL,
518 libconf->conf->beacon_int * 16);
519 rt2x00_set_field32(&reg, CSR12_CFP_MAX_DURATION,
520 libconf->conf->beacon_int * 16);
521 rt2x00pci_register_write(rt2x00dev, CSR12, reg);
522}
523
524static void rt2400pci_config_ps(struct rt2x00_dev *rt2x00dev, 512static void rt2400pci_config_ps(struct rt2x00_dev *rt2x00dev,
525 struct rt2x00lib_conf *libconf) 513 struct rt2x00lib_conf *libconf)
526{ 514{
@@ -558,8 +546,6 @@ static void rt2400pci_config(struct rt2x00_dev *rt2x00dev,
558 libconf->conf->power_level); 546 libconf->conf->power_level);
559 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS) 547 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
560 rt2400pci_config_retry_limit(rt2x00dev, libconf); 548 rt2400pci_config_retry_limit(rt2x00dev, libconf);
561 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
562 rt2400pci_config_duration(rt2x00dev, libconf);
563 if (flags & IEEE80211_CONF_CHANGE_PS) 549 if (flags & IEEE80211_CONF_CHANGE_PS)
564 rt2400pci_config_ps(rt2x00dev, libconf); 550 rt2400pci_config_ps(rt2x00dev, libconf);
565} 551}
@@ -1361,7 +1347,7 @@ static int rt2400pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
1361 */ 1347 */
1362 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 1348 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1363 rt2x00pci_register_read(rt2x00dev, CSR0, &reg); 1349 rt2x00pci_register_read(rt2x00dev, CSR0, &reg);
1364 rt2x00_set_chip(rt2x00dev, RT2460, value, reg); 1350 rt2x00_set_chip_rf(rt2x00dev, value, reg);
1365 1351
1366 if (!rt2x00_rf(&rt2x00dev->chip, RF2420) && 1352 if (!rt2x00_rf(&rt2x00dev->chip, RF2420) &&
1367 !rt2x00_rf(&rt2x00dev->chip, RF2421)) { 1353 !rt2x00_rf(&rt2x00dev->chip, RF2421)) {
@@ -1580,7 +1566,6 @@ static const struct ieee80211_ops rt2400pci_mac80211_ops = {
1580 .add_interface = rt2x00mac_add_interface, 1566 .add_interface = rt2x00mac_add_interface,
1581 .remove_interface = rt2x00mac_remove_interface, 1567 .remove_interface = rt2x00mac_remove_interface,
1582 .config = rt2x00mac_config, 1568 .config = rt2x00mac_config,
1583 .config_interface = rt2x00mac_config_interface,
1584 .configure_filter = rt2x00mac_configure_filter, 1569 .configure_filter = rt2x00mac_configure_filter,
1585 .get_stats = rt2x00mac_get_stats, 1570 .get_stats = rt2x00mac_get_stats,
1586 .bss_info_changed = rt2x00mac_bss_info_changed, 1571 .bss_info_changed = rt2x00mac_bss_info_changed,
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index 276a8232aaa0..f95cb646f85a 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -341,10 +341,11 @@ static void rt2500pci_config_erp(struct rt2x00_dev *rt2x00dev,
341 preamble_mask = erp->short_preamble << 3; 341 preamble_mask = erp->short_preamble << 3;
342 342
343 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 343 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
344 rt2x00_set_field32(&reg, TXCSR1_ACK_TIMEOUT, 344 rt2x00_set_field32(&reg, TXCSR1_ACK_TIMEOUT, erp->ack_timeout);
345 erp->ack_timeout);
346 rt2x00_set_field32(&reg, TXCSR1_ACK_CONSUME_TIME, 345 rt2x00_set_field32(&reg, TXCSR1_ACK_CONSUME_TIME,
347 erp->ack_consume_time); 346 erp->ack_consume_time);
347 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);
348 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
348 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg); 349 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
349 350
350 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg); 351 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg);
@@ -377,6 +378,11 @@ static void rt2500pci_config_erp(struct rt2x00_dev *rt2x00dev,
377 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time); 378 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time);
378 rt2x00pci_register_write(rt2x00dev, CSR11, reg); 379 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
379 380
381 rt2x00pci_register_read(rt2x00dev, CSR12, &reg);
382 rt2x00_set_field32(&reg, CSR12_BEACON_INTERVAL, erp->beacon_int * 16);
383 rt2x00_set_field32(&reg, CSR12_CFP_MAX_DURATION, erp->beacon_int * 16);
384 rt2x00pci_register_write(rt2x00dev, CSR12, reg);
385
380 rt2x00pci_register_read(rt2x00dev, CSR18, &reg); 386 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
381 rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs); 387 rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs);
382 rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs); 388 rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs);
@@ -552,24 +558,6 @@ static void rt2500pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
552 rt2x00pci_register_write(rt2x00dev, CSR11, reg); 558 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
553} 559}
554 560
555static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev,
556 struct rt2x00lib_conf *libconf)
557{
558 u32 reg;
559
560 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
561 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);
562 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
563 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
564
565 rt2x00pci_register_read(rt2x00dev, CSR12, &reg);
566 rt2x00_set_field32(&reg, CSR12_BEACON_INTERVAL,
567 libconf->conf->beacon_int * 16);
568 rt2x00_set_field32(&reg, CSR12_CFP_MAX_DURATION,
569 libconf->conf->beacon_int * 16);
570 rt2x00pci_register_write(rt2x00dev, CSR12, reg);
571}
572
573static void rt2500pci_config_ps(struct rt2x00_dev *rt2x00dev, 561static void rt2500pci_config_ps(struct rt2x00_dev *rt2x00dev,
574 struct rt2x00lib_conf *libconf) 562 struct rt2x00lib_conf *libconf)
575{ 563{
@@ -609,8 +597,6 @@ static void rt2500pci_config(struct rt2x00_dev *rt2x00dev,
609 libconf->conf->power_level); 597 libconf->conf->power_level);
610 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS) 598 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
611 rt2500pci_config_retry_limit(rt2x00dev, libconf); 599 rt2500pci_config_retry_limit(rt2x00dev, libconf);
612 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
613 rt2500pci_config_duration(rt2x00dev, libconf);
614 if (flags & IEEE80211_CONF_CHANGE_PS) 600 if (flags & IEEE80211_CONF_CHANGE_PS)
615 rt2500pci_config_ps(rt2x00dev, libconf); 601 rt2500pci_config_ps(rt2x00dev, libconf);
616} 602}
@@ -1525,7 +1511,7 @@ static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
1525 */ 1511 */
1526 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 1512 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1527 rt2x00pci_register_read(rt2x00dev, CSR0, &reg); 1513 rt2x00pci_register_read(rt2x00dev, CSR0, &reg);
1528 rt2x00_set_chip(rt2x00dev, RT2560, value, reg); 1514 rt2x00_set_chip_rf(rt2x00dev, value, reg);
1529 1515
1530 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) && 1516 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1531 !rt2x00_rf(&rt2x00dev->chip, RF2523) && 1517 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
@@ -1879,7 +1865,6 @@ static const struct ieee80211_ops rt2500pci_mac80211_ops = {
1879 .add_interface = rt2x00mac_add_interface, 1865 .add_interface = rt2x00mac_add_interface,
1880 .remove_interface = rt2x00mac_remove_interface, 1866 .remove_interface = rt2x00mac_remove_interface,
1881 .config = rt2x00mac_config, 1867 .config = rt2x00mac_config,
1882 .config_interface = rt2x00mac_config_interface,
1883 .configure_filter = rt2x00mac_configure_filter, 1868 .configure_filter = rt2x00mac_configure_filter,
1884 .get_stats = rt2x00mac_get_stats, 1869 .get_stats = rt2x00mac_get_stats,
1885 .bss_info_changed = rt2x00mac_bss_info_changed, 1870 .bss_info_changed = rt2x00mac_bss_info_changed,
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index 9e630e70fc97..69f966f1ce54 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -503,6 +503,10 @@ static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
503 503
504 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates); 504 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
505 505
506 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
507 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, erp->beacon_int * 4);
508 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
509
506 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time); 510 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
507 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs); 511 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
508 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs); 512 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
@@ -632,17 +636,6 @@ static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
632 rt2500usb_rf_write(rt2x00dev, 3, rf3); 636 rt2500usb_rf_write(rt2x00dev, 3, rf3);
633} 637}
634 638
635static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
636 struct rt2x00lib_conf *libconf)
637{
638 u16 reg;
639
640 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
641 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
642 libconf->conf->beacon_int * 4);
643 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
644}
645
646static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev, 639static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
647 struct rt2x00lib_conf *libconf) 640 struct rt2x00lib_conf *libconf)
648{ 641{
@@ -680,8 +673,6 @@ static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
680 !(flags & IEEE80211_CONF_CHANGE_CHANNEL)) 673 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
681 rt2500usb_config_txpower(rt2x00dev, 674 rt2500usb_config_txpower(rt2x00dev,
682 libconf->conf->power_level); 675 libconf->conf->power_level);
683 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
684 rt2500usb_config_duration(rt2x00dev, libconf);
685 if (flags & IEEE80211_CONF_CHANGE_PS) 676 if (flags & IEEE80211_CONF_CHANGE_PS)
686 rt2500usb_config_ps(rt2x00dev, libconf); 677 rt2500usb_config_ps(rt2x00dev, libconf);
687} 678}
@@ -1559,7 +1550,7 @@ static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1559 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg); 1550 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1560 rt2x00_set_chip(rt2x00dev, RT2570, value, reg); 1551 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1561 1552
1562 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) { 1553 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x000ffff0, 0)) {
1563 ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); 1554 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1564 return -ENODEV; 1555 return -ENODEV;
1565 } 1556 }
@@ -1908,7 +1899,6 @@ static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1908 .add_interface = rt2x00mac_add_interface, 1899 .add_interface = rt2x00mac_add_interface,
1909 .remove_interface = rt2x00mac_remove_interface, 1900 .remove_interface = rt2x00mac_remove_interface,
1910 .config = rt2x00mac_config, 1901 .config = rt2x00mac_config,
1911 .config_interface = rt2x00mac_config_interface,
1912 .configure_filter = rt2x00mac_configure_filter, 1902 .configure_filter = rt2x00mac_configure_filter,
1913 .set_key = rt2x00mac_set_key, 1903 .set_key = rt2x00mac_set_key,
1914 .get_stats = rt2x00mac_get_stats, 1904 .get_stats = rt2x00mac_get_stats,
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
new file mode 100644
index 000000000000..142ad34fdc49
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -0,0 +1,3066 @@
1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2800usb
23 Abstract: rt2800usb device specific routines.
24 Supported chipsets: RT2800U.
25 */
26
27#include <linux/crc-ccitt.h>
28#include <linux/delay.h>
29#include <linux/etherdevice.h>
30#include <linux/init.h>
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/usb.h>
34
35#include "rt2x00.h"
36#include "rt2x00usb.h"
37#include "rt2800usb.h"
38
39/*
40 * Allow hardware encryption to be disabled.
41 */
42static int modparam_nohwcrypt = 1;
43module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
44MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
45
46/*
47 * Register access.
48 * All access to the CSR registers will go through the methods
49 * rt2x00usb_register_read and rt2x00usb_register_write.
50 * BBP and RF register require indirect register access,
51 * and use the CSR registers BBPCSR and RFCSR to achieve this.
52 * These indirect registers work with busy bits,
53 * and we will try maximal REGISTER_BUSY_COUNT times to access
54 * the register while taking a REGISTER_BUSY_DELAY us delay
55 * between each attampt. When the busy bit is still set at that time,
56 * the access attempt is considered to have failed,
57 * and we will print an error.
58 * The _lock versions must be used if you already hold the csr_mutex
59 */
60#define WAIT_FOR_BBP(__dev, __reg) \
61 rt2x00usb_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))
62#define WAIT_FOR_RFCSR(__dev, __reg) \
63 rt2x00usb_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg))
64#define WAIT_FOR_RF(__dev, __reg) \
65 rt2x00usb_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg))
66#define WAIT_FOR_MCU(__dev, __reg) \
67 rt2x00usb_regbusy_read((__dev), H2M_MAILBOX_CSR, \
68 H2M_MAILBOX_CSR_OWNER, (__reg))
69
70static void rt2800usb_bbp_write(struct rt2x00_dev *rt2x00dev,
71 const unsigned int word, const u8 value)
72{
73 u32 reg;
74
75 mutex_lock(&rt2x00dev->csr_mutex);
76
77 /*
78 * Wait until the BBP becomes available, afterwards we
79 * can safely write the new data into the register.
80 */
81 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
82 reg = 0;
83 rt2x00_set_field32(&reg, BBP_CSR_CFG_VALUE, value);
84 rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
85 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
86 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 0);
87
88 rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
89 }
90
91 mutex_unlock(&rt2x00dev->csr_mutex);
92}
93
94static void rt2800usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95 const unsigned int word, u8 *value)
96{
97 u32 reg;
98
99 mutex_lock(&rt2x00dev->csr_mutex);
100
101 /*
102 * Wait until the BBP becomes available, afterwards we
103 * can safely write the read request into the register.
104 * After the data has been written, we wait until hardware
105 * returns the correct value, if at any time the register
106 * doesn't become available in time, reg will be 0xffffffff
107 * which means we return 0xff to the caller.
108 */
109 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
110 reg = 0;
111 rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
112 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
113 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 1);
114
115 rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
116
117 WAIT_FOR_BBP(rt2x00dev, &reg);
118 }
119
120 *value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE);
121
122 mutex_unlock(&rt2x00dev->csr_mutex);
123}
124
125static void rt2800usb_rfcsr_write(struct rt2x00_dev *rt2x00dev,
126 const unsigned int word, const u8 value)
127{
128 u32 reg;
129
130 mutex_lock(&rt2x00dev->csr_mutex);
131
132 /*
133 * Wait until the RFCSR becomes available, afterwards we
134 * can safely write the new data into the register.
135 */
136 if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
137 reg = 0;
138 rt2x00_set_field32(&reg, RF_CSR_CFG_DATA, value);
139 rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
140 rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 1);
141 rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
142
143 rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
144 }
145
146 mutex_unlock(&rt2x00dev->csr_mutex);
147}
148
149static void rt2800usb_rfcsr_read(struct rt2x00_dev *rt2x00dev,
150 const unsigned int word, u8 *value)
151{
152 u32 reg;
153
154 mutex_lock(&rt2x00dev->csr_mutex);
155
156 /*
157 * Wait until the RFCSR becomes available, afterwards we
158 * can safely write the read request into the register.
159 * After the data has been written, we wait until hardware
160 * returns the correct value, if at any time the register
161 * doesn't become available in time, reg will be 0xffffffff
162 * which means we return 0xff to the caller.
163 */
164 if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
165 reg = 0;
166 rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
167 rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 0);
168 rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
169
170 rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
171
172 WAIT_FOR_RFCSR(rt2x00dev, &reg);
173 }
174
175 *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA);
176
177 mutex_unlock(&rt2x00dev->csr_mutex);
178}
179
180static void rt2800usb_rf_write(struct rt2x00_dev *rt2x00dev,
181 const unsigned int word, const u32 value)
182{
183 u32 reg;
184
185 mutex_lock(&rt2x00dev->csr_mutex);
186
187 /*
188 * Wait until the RF becomes available, afterwards we
189 * can safely write the new data into the register.
190 */
191 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
192 reg = 0;
193 rt2x00_set_field32(&reg, RF_CSR_CFG0_REG_VALUE_BW, value);
194 rt2x00_set_field32(&reg, RF_CSR_CFG0_STANDBYMODE, 0);
195 rt2x00_set_field32(&reg, RF_CSR_CFG0_SEL, 0);
196 rt2x00_set_field32(&reg, RF_CSR_CFG0_BUSY, 1);
197
198 rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg);
199 rt2x00_rf_write(rt2x00dev, word, value);
200 }
201
202 mutex_unlock(&rt2x00dev->csr_mutex);
203}
204
205static void rt2800usb_mcu_request(struct rt2x00_dev *rt2x00dev,
206 const u8 command, const u8 token,
207 const u8 arg0, const u8 arg1)
208{
209 u32 reg;
210
211 mutex_lock(&rt2x00dev->csr_mutex);
212
213 /*
214 * Wait until the MCU becomes available, afterwards we
215 * can safely write the new data into the register.
216 */
217 if (WAIT_FOR_MCU(rt2x00dev, &reg)) {
218 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_OWNER, 1);
219 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_CMD_TOKEN, token);
220 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG0, arg0);
221 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG1, arg1);
222 rt2x00usb_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg);
223
224 reg = 0;
225 rt2x00_set_field32(&reg, HOST_CMD_CSR_HOST_COMMAND, command);
226 rt2x00usb_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg);
227 }
228
229 mutex_unlock(&rt2x00dev->csr_mutex);
230}
231
232#ifdef CONFIG_RT2X00_LIB_DEBUGFS
233static const struct rt2x00debug rt2800usb_rt2x00debug = {
234 .owner = THIS_MODULE,
235 .csr = {
236 .read = rt2x00usb_register_read,
237 .write = rt2x00usb_register_write,
238 .flags = RT2X00DEBUGFS_OFFSET,
239 .word_base = CSR_REG_BASE,
240 .word_size = sizeof(u32),
241 .word_count = CSR_REG_SIZE / sizeof(u32),
242 },
243 .eeprom = {
244 .read = rt2x00_eeprom_read,
245 .write = rt2x00_eeprom_write,
246 .word_base = EEPROM_BASE,
247 .word_size = sizeof(u16),
248 .word_count = EEPROM_SIZE / sizeof(u16),
249 },
250 .bbp = {
251 .read = rt2800usb_bbp_read,
252 .write = rt2800usb_bbp_write,
253 .word_base = BBP_BASE,
254 .word_size = sizeof(u8),
255 .word_count = BBP_SIZE / sizeof(u8),
256 },
257 .rf = {
258 .read = rt2x00_rf_read,
259 .write = rt2800usb_rf_write,
260 .word_base = RF_BASE,
261 .word_size = sizeof(u32),
262 .word_count = RF_SIZE / sizeof(u32),
263 },
264};
265#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
266
267#ifdef CONFIG_RT2X00_LIB_RFKILL
268static int rt2800usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
269{
270 u32 reg;
271
272 rt2x00usb_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
273 return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);
274}
275#else
276#define rt2800usb_rfkill_poll NULL
277#endif /* CONFIG_RT2X00_LIB_RFKILL */
278
279#ifdef CONFIG_RT2X00_LIB_LEDS
280static void rt2800usb_brightness_set(struct led_classdev *led_cdev,
281 enum led_brightness brightness)
282{
283 struct rt2x00_led *led =
284 container_of(led_cdev, struct rt2x00_led, led_dev);
285 unsigned int enabled = brightness != LED_OFF;
286 unsigned int bg_mode =
287 (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
288 unsigned int polarity =
289 rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
290 EEPROM_FREQ_LED_POLARITY);
291 unsigned int ledmode =
292 rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
293 EEPROM_FREQ_LED_MODE);
294
295 if (led->type == LED_TYPE_RADIO) {
296 rt2800usb_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
297 enabled ? 0x20 : 0);
298 } else if (led->type == LED_TYPE_ASSOC) {
299 rt2800usb_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
300 enabled ? (bg_mode ? 0x60 : 0xa0) : 0x20);
301 } else if (led->type == LED_TYPE_QUALITY) {
302 /*
303 * The brightness is divided into 6 levels (0 - 5),
304 * The specs tell us the following levels:
305 * 0, 1 ,3, 7, 15, 31
306 * to determine the level in a simple way we can simply
307 * work with bitshifting:
308 * (1 << level) - 1
309 */
310 rt2800usb_mcu_request(led->rt2x00dev, MCU_LED_STRENGTH, 0xff,
311 (1 << brightness / (LED_FULL / 6)) - 1,
312 polarity);
313 }
314}
315
316static int rt2800usb_blink_set(struct led_classdev *led_cdev,
317 unsigned long *delay_on,
318 unsigned long *delay_off)
319{
320 struct rt2x00_led *led =
321 container_of(led_cdev, struct rt2x00_led, led_dev);
322 u32 reg;
323
324 rt2x00usb_register_read(led->rt2x00dev, LED_CFG, &reg);
325 rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on);
326 rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
327 rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
328 rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
329 rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 12);
330 rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
331 rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
332 rt2x00usb_register_write(led->rt2x00dev, LED_CFG, reg);
333
334 return 0;
335}
336
337static void rt2800usb_init_led(struct rt2x00_dev *rt2x00dev,
338 struct rt2x00_led *led,
339 enum led_type type)
340{
341 led->rt2x00dev = rt2x00dev;
342 led->type = type;
343 led->led_dev.brightness_set = rt2800usb_brightness_set;
344 led->led_dev.blink_set = rt2800usb_blink_set;
345 led->flags = LED_INITIALIZED;
346}
347#endif /* CONFIG_RT2X00_LIB_LEDS */
348
349/*
350 * Configuration handlers.
351 */
352static void rt2800usb_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
353 struct rt2x00lib_crypto *crypto,
354 struct ieee80211_key_conf *key)
355{
356 struct mac_wcid_entry wcid_entry;
357 struct mac_iveiv_entry iveiv_entry;
358 u32 offset;
359 u32 reg;
360
361 offset = MAC_WCID_ATTR_ENTRY(key->hw_key_idx);
362
363 rt2x00usb_register_read(rt2x00dev, offset, &reg);
364 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_KEYTAB,
365 !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
366 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER,
367 (crypto->cmd == SET_KEY) * crypto->cipher);
368 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX,
369 (crypto->cmd == SET_KEY) * crypto->bssidx);
370 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher);
371 rt2x00usb_register_write(rt2x00dev, offset, reg);
372
373 offset = MAC_IVEIV_ENTRY(key->hw_key_idx);
374
375 memset(&iveiv_entry, 0, sizeof(iveiv_entry));
376 if ((crypto->cipher == CIPHER_TKIP) ||
377 (crypto->cipher == CIPHER_TKIP_NO_MIC) ||
378 (crypto->cipher == CIPHER_AES))
379 iveiv_entry.iv[3] |= 0x20;
380 iveiv_entry.iv[3] |= key->keyidx << 6;
381 rt2x00usb_register_multiwrite(rt2x00dev, offset,
382 &iveiv_entry, sizeof(iveiv_entry));
383
384 offset = MAC_WCID_ENTRY(key->hw_key_idx);
385
386 memset(&wcid_entry, 0, sizeof(wcid_entry));
387 if (crypto->cmd == SET_KEY)
388 memcpy(&wcid_entry, crypto->address, ETH_ALEN);
389 rt2x00usb_register_multiwrite(rt2x00dev, offset,
390 &wcid_entry, sizeof(wcid_entry));
391}
392
393static int rt2800usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
394 struct rt2x00lib_crypto *crypto,
395 struct ieee80211_key_conf *key)
396{
397 struct hw_key_entry key_entry;
398 struct rt2x00_field32 field;
399 int timeout;
400 u32 offset;
401 u32 reg;
402
403 if (crypto->cmd == SET_KEY) {
404 key->hw_key_idx = (4 * crypto->bssidx) + key->keyidx;
405
406 memcpy(key_entry.key, crypto->key,
407 sizeof(key_entry.key));
408 memcpy(key_entry.tx_mic, crypto->tx_mic,
409 sizeof(key_entry.tx_mic));
410 memcpy(key_entry.rx_mic, crypto->rx_mic,
411 sizeof(key_entry.rx_mic));
412
413 offset = SHARED_KEY_ENTRY(key->hw_key_idx);
414 timeout = REGISTER_TIMEOUT32(sizeof(key_entry));
415 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
416 USB_VENDOR_REQUEST_OUT,
417 offset, &key_entry,
418 sizeof(key_entry),
419 timeout);
420 }
421
422 /*
423 * The cipher types are stored over multiple registers
424 * starting with SHARED_KEY_MODE_BASE each word will have
425 * 32 bits and contains the cipher types for 2 bssidx each.
426 * Using the correct defines correctly will cause overhead,
427 * so just calculate the correct offset.
428 */
429 field.bit_offset = 4 * (key->hw_key_idx % 8);
430 field.bit_mask = 0x7 << field.bit_offset;
431
432 offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8);
433
434 rt2x00usb_register_read(rt2x00dev, offset, &reg);
435 rt2x00_set_field32(&reg, field,
436 (crypto->cmd == SET_KEY) * crypto->cipher);
437 rt2x00usb_register_write(rt2x00dev, offset, reg);
438
439 /*
440 * Update WCID information
441 */
442 rt2800usb_config_wcid_attr(rt2x00dev, crypto, key);
443
444 return 0;
445}
446
447static int rt2800usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
448 struct rt2x00lib_crypto *crypto,
449 struct ieee80211_key_conf *key)
450{
451 struct hw_key_entry key_entry;
452 int timeout;
453 u32 offset;
454
455 if (crypto->cmd == SET_KEY) {
456 /*
457 * 1 pairwise key is possible per AID, this means that the AID
458 * equals our hw_key_idx. Make sure the WCID starts _after_ the
459 * last possible shared key entry.
460 */
461 if (crypto->aid > (256 - 32))
462 return -ENOSPC;
463
464 key->hw_key_idx = 32 + crypto->aid;
465
466 memcpy(key_entry.key, crypto->key,
467 sizeof(key_entry.key));
468 memcpy(key_entry.tx_mic, crypto->tx_mic,
469 sizeof(key_entry.tx_mic));
470 memcpy(key_entry.rx_mic, crypto->rx_mic,
471 sizeof(key_entry.rx_mic));
472
473 offset = PAIRWISE_KEY_ENTRY(key->hw_key_idx);
474 timeout = REGISTER_TIMEOUT32(sizeof(key_entry));
475 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
476 USB_VENDOR_REQUEST_OUT,
477 offset, &key_entry,
478 sizeof(key_entry),
479 timeout);
480 }
481
482 /*
483 * Update WCID information
484 */
485 rt2800usb_config_wcid_attr(rt2x00dev, crypto, key);
486
487 return 0;
488}
489
490static void rt2800usb_config_filter(struct rt2x00_dev *rt2x00dev,
491 const unsigned int filter_flags)
492{
493 u32 reg;
494
495 /*
496 * Start configuration steps.
497 * Note that the version error will always be dropped
498 * and broadcast frames will always be accepted since
499 * there is no filter for it at this time.
500 */
501 rt2x00usb_register_read(rt2x00dev, RX_FILTER_CFG, &reg);
502 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR,
503 !(filter_flags & FIF_FCSFAIL));
504 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR,
505 !(filter_flags & FIF_PLCPFAIL));
506 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME,
507 !(filter_flags & FIF_PROMISC_IN_BSS));
508 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
509 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
510 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST,
511 !(filter_flags & FIF_ALLMULTI));
512 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
513 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
514 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK,
515 !(filter_flags & FIF_CONTROL));
516 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END,
517 !(filter_flags & FIF_CONTROL));
518 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_ACK,
519 !(filter_flags & FIF_CONTROL));
520 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CTS,
521 !(filter_flags & FIF_CONTROL));
522 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_RTS,
523 !(filter_flags & FIF_CONTROL));
524 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL,
525 !(filter_flags & FIF_CONTROL));
526 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
527 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
528 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL,
529 !(filter_flags & FIF_CONTROL));
530 rt2x00usb_register_write(rt2x00dev, RX_FILTER_CFG, reg);
531}
532
533static void rt2800usb_config_intf(struct rt2x00_dev *rt2x00dev,
534 struct rt2x00_intf *intf,
535 struct rt2x00intf_conf *conf,
536 const unsigned int flags)
537{
538 unsigned int beacon_base;
539 u32 reg;
540
541 if (flags & CONFIG_UPDATE_TYPE) {
542 /*
543 * Clear current synchronisation setup.
544 * For the Beacon base registers we only need to clear
545 * the first byte since that byte contains the VALID and OWNER
546 * bits which (when set to 0) will invalidate the entire beacon.
547 */
548 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
549 rt2x00usb_register_write(rt2x00dev, beacon_base, 0);
550
551 /*
552 * Enable synchronisation.
553 */
554 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
555 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
556 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, conf->sync);
557 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
558 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
559 }
560
561 if (flags & CONFIG_UPDATE_MAC) {
562 reg = le32_to_cpu(conf->mac[1]);
563 rt2x00_set_field32(&reg, MAC_ADDR_DW1_UNICAST_TO_ME_MASK, 0xff);
564 conf->mac[1] = cpu_to_le32(reg);
565
566 rt2x00usb_register_multiwrite(rt2x00dev, MAC_ADDR_DW0,
567 conf->mac, sizeof(conf->mac));
568 }
569
570 if (flags & CONFIG_UPDATE_BSSID) {
571 reg = le32_to_cpu(conf->bssid[1]);
572 rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_ID_MASK, 0);
573 rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_BCN_NUM, 0);
574 conf->bssid[1] = cpu_to_le32(reg);
575
576 rt2x00usb_register_multiwrite(rt2x00dev, MAC_BSSID_DW0,
577 conf->bssid, sizeof(conf->bssid));
578 }
579}
580
581static void rt2800usb_config_erp(struct rt2x00_dev *rt2x00dev,
582 struct rt2x00lib_erp *erp)
583{
584 u32 reg;
585
586 rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
587 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT,
588 DIV_ROUND_UP(erp->ack_timeout, erp->slot_time));
589 rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
590
591 rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
592 rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY,
593 !!erp->short_preamble);
594 rt2x00_set_field32(&reg, AUTO_RSP_CFG_AR_PREAMBLE,
595 !!erp->short_preamble);
596 rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
597
598 rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
599 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL,
600 erp->cts_protection ? 2 : 0);
601 rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
602
603 rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE,
604 erp->basic_rates);
605 rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
606
607 rt2x00usb_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
608 rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
609 rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
610 rt2x00usb_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
611
612 rt2x00usb_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
613 rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs);
614 rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs);
615 rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
616 rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, erp->eifs);
617 rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
618 rt2x00usb_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
619
620 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
621 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL,
622 erp->beacon_int * 16);
623 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
624}
625
626static void rt2800usb_config_ant(struct rt2x00_dev *rt2x00dev,
627 struct antenna_setup *ant)
628{
629 u8 r1;
630 u8 r3;
631
632 rt2800usb_bbp_read(rt2x00dev, 1, &r1);
633 rt2800usb_bbp_read(rt2x00dev, 3, &r3);
634
635 /*
636 * Configure the TX antenna.
637 */
638 switch ((int)ant->tx) {
639 case 1:
640 rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0);
641 break;
642 case 2:
643 rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 2);
644 break;
645 case 3:
646 /* Do nothing */
647 break;
648 }
649
650 /*
651 * Configure the RX antenna.
652 */
653 switch ((int)ant->rx) {
654 case 1:
655 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
656 break;
657 case 2:
658 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 1);
659 break;
660 case 3:
661 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 2);
662 break;
663 }
664
665 rt2800usb_bbp_write(rt2x00dev, 3, r3);
666 rt2800usb_bbp_write(rt2x00dev, 1, r1);
667}
668
669static void rt2800usb_config_lna_gain(struct rt2x00_dev *rt2x00dev,
670 struct rt2x00lib_conf *libconf)
671{
672 u16 eeprom;
673 short lna_gain;
674
675 if (libconf->rf.channel <= 14) {
676 rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
677 lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_BG);
678 } else if (libconf->rf.channel <= 64) {
679 rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
680 lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_A0);
681 } else if (libconf->rf.channel <= 128) {
682 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &eeprom);
683 lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_BG2_LNA_A1);
684 } else {
685 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A2, &eeprom);
686 lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_A2_LNA_A2);
687 }
688
689 rt2x00dev->lna_gain = lna_gain;
690}
691
692static void rt2800usb_config_channel_rt2x(struct rt2x00_dev *rt2x00dev,
693 struct ieee80211_conf *conf,
694 struct rf_channel *rf,
695 struct channel_info *info)
696{
697 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
698
699 if (rt2x00dev->default_ant.tx == 1)
700 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_TX1, 1);
701
702 if (rt2x00dev->default_ant.rx == 1) {
703 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX1, 1);
704 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
705 } else if (rt2x00dev->default_ant.rx == 2)
706 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
707
708 if (rf->channel > 14) {
709 /*
710 * When TX power is below 0, we should increase it by 7 to
711 * make it a positive value (Minumum value is -7).
712 * However this means that values between 0 and 7 have
713 * double meaning, and we should set a 7DBm boost flag.
714 */
715 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A_7DBM_BOOST,
716 (info->tx_power1 >= 0));
717
718 if (info->tx_power1 < 0)
719 info->tx_power1 += 7;
720
721 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A,
722 TXPOWER_A_TO_DEV(info->tx_power1));
723
724 rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A_7DBM_BOOST,
725 (info->tx_power2 >= 0));
726
727 if (info->tx_power2 < 0)
728 info->tx_power2 += 7;
729
730 rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A,
731 TXPOWER_A_TO_DEV(info->tx_power2));
732 } else {
733 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_G,
734 TXPOWER_G_TO_DEV(info->tx_power1));
735 rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_G,
736 TXPOWER_G_TO_DEV(info->tx_power2));
737 }
738
739 rt2x00_set_field32(&rf->rf4, RF4_HT40, conf_is_ht40(conf));
740
741 rt2800usb_rf_write(rt2x00dev, 1, rf->rf1);
742 rt2800usb_rf_write(rt2x00dev, 2, rf->rf2);
743 rt2800usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
744 rt2800usb_rf_write(rt2x00dev, 4, rf->rf4);
745
746 udelay(200);
747
748 rt2800usb_rf_write(rt2x00dev, 1, rf->rf1);
749 rt2800usb_rf_write(rt2x00dev, 2, rf->rf2);
750 rt2800usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
751 rt2800usb_rf_write(rt2x00dev, 4, rf->rf4);
752
753 udelay(200);
754
755 rt2800usb_rf_write(rt2x00dev, 1, rf->rf1);
756 rt2800usb_rf_write(rt2x00dev, 2, rf->rf2);
757 rt2800usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
758 rt2800usb_rf_write(rt2x00dev, 4, rf->rf4);
759}
760
761static void rt2800usb_config_channel_rt3x(struct rt2x00_dev *rt2x00dev,
762 struct ieee80211_conf *conf,
763 struct rf_channel *rf,
764 struct channel_info *info)
765{
766 u8 rfcsr;
767
768 rt2800usb_rfcsr_write(rt2x00dev, 2, rf->rf1);
769 rt2800usb_rfcsr_write(rt2x00dev, 2, rf->rf3);
770
771 rt2800usb_rfcsr_read(rt2x00dev, 6, &rfcsr);
772 rt2x00_set_field8(&rfcsr, RFCSR6_R, rf->rf2);
773 rt2800usb_rfcsr_write(rt2x00dev, 6, rfcsr);
774
775 rt2800usb_rfcsr_read(rt2x00dev, 12, &rfcsr);
776 rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER,
777 TXPOWER_G_TO_DEV(info->tx_power1));
778 rt2800usb_rfcsr_write(rt2x00dev, 12, rfcsr);
779
780 rt2800usb_rfcsr_read(rt2x00dev, 23, &rfcsr);
781 rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset);
782 rt2800usb_rfcsr_write(rt2x00dev, 23, rfcsr);
783
784 rt2800usb_rfcsr_write(rt2x00dev, 24,
785 rt2x00dev->calibration[conf_is_ht40(conf)]);
786
787 rt2800usb_rfcsr_read(rt2x00dev, 23, &rfcsr);
788 rt2x00_set_field8(&rfcsr, RFCSR7_RF_TUNING, 1);
789 rt2800usb_rfcsr_write(rt2x00dev, 23, rfcsr);
790}
791
792static void rt2800usb_config_channel(struct rt2x00_dev *rt2x00dev,
793 struct ieee80211_conf *conf,
794 struct rf_channel *rf,
795 struct channel_info *info)
796{
797 u32 reg;
798 unsigned int tx_pin;
799 u8 bbp;
800
801 if (rt2x00_rev(&rt2x00dev->chip) != RT3070_VERSION)
802 rt2800usb_config_channel_rt2x(rt2x00dev, conf, rf, info);
803 else
804 rt2800usb_config_channel_rt3x(rt2x00dev, conf, rf, info);
805
806 /*
807 * Change BBP settings
808 */
809 rt2800usb_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
810 rt2800usb_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
811 rt2800usb_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
812 rt2800usb_bbp_write(rt2x00dev, 86, 0);
813
814 if (rf->channel <= 14) {
815 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
816 rt2800usb_bbp_write(rt2x00dev, 82, 0x62);
817 rt2800usb_bbp_write(rt2x00dev, 75, 0x46);
818 } else {
819 rt2800usb_bbp_write(rt2x00dev, 82, 0x84);
820 rt2800usb_bbp_write(rt2x00dev, 75, 0x50);
821 }
822 } else {
823 rt2800usb_bbp_write(rt2x00dev, 82, 0xf2);
824
825 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
826 rt2800usb_bbp_write(rt2x00dev, 75, 0x46);
827 else
828 rt2800usb_bbp_write(rt2x00dev, 75, 0x50);
829 }
830
831 rt2x00usb_register_read(rt2x00dev, TX_BAND_CFG, &reg);
832 rt2x00_set_field32(&reg, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf));
833 rt2x00_set_field32(&reg, TX_BAND_CFG_A, rf->channel > 14);
834 rt2x00_set_field32(&reg, TX_BAND_CFG_BG, rf->channel <= 14);
835 rt2x00usb_register_write(rt2x00dev, TX_BAND_CFG, reg);
836
837 tx_pin = 0;
838
839 /* Turn on unused PA or LNA when not using 1T or 1R */
840 if (rt2x00dev->default_ant.tx != 1) {
841 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 1);
842 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1);
843 }
844
845 /* Turn on unused PA or LNA when not using 1T or 1R */
846 if (rt2x00dev->default_ant.rx != 1) {
847 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1);
848 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1);
849 }
850
851 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1);
852 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1);
853 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1);
854 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_TRSW_EN, 1);
855 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, rf->channel <= 14);
856 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, rf->channel > 14);
857
858 rt2x00usb_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
859
860 rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
861 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
862 rt2800usb_bbp_write(rt2x00dev, 4, bbp);
863
864 rt2800usb_bbp_read(rt2x00dev, 3, &bbp);
865 rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
866 rt2800usb_bbp_write(rt2x00dev, 3, bbp);
867
868 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
869 if (conf_is_ht40(conf)) {
870 rt2800usb_bbp_write(rt2x00dev, 69, 0x1a);
871 rt2800usb_bbp_write(rt2x00dev, 70, 0x0a);
872 rt2800usb_bbp_write(rt2x00dev, 73, 0x16);
873 } else {
874 rt2800usb_bbp_write(rt2x00dev, 69, 0x16);
875 rt2800usb_bbp_write(rt2x00dev, 70, 0x08);
876 rt2800usb_bbp_write(rt2x00dev, 73, 0x11);
877 }
878 }
879
880 msleep(1);
881}
882
883static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
884 const int txpower)
885{
886 u32 reg;
887 u32 value = TXPOWER_G_TO_DEV(txpower);
888 u8 r1;
889
890 rt2800usb_bbp_read(rt2x00dev, 1, &r1);
891 rt2x00_set_field8(&reg, BBP1_TX_POWER, 0);
892 rt2800usb_bbp_write(rt2x00dev, 1, r1);
893
894 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_0, &reg);
895 rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value);
896 rt2x00_set_field32(&reg, TX_PWR_CFG_0_2MBS, value);
897 rt2x00_set_field32(&reg, TX_PWR_CFG_0_55MBS, value);
898 rt2x00_set_field32(&reg, TX_PWR_CFG_0_11MBS, value);
899 rt2x00_set_field32(&reg, TX_PWR_CFG_0_6MBS, value);
900 rt2x00_set_field32(&reg, TX_PWR_CFG_0_9MBS, value);
901 rt2x00_set_field32(&reg, TX_PWR_CFG_0_12MBS, value);
902 rt2x00_set_field32(&reg, TX_PWR_CFG_0_18MBS, value);
903 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_0, reg);
904
905 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_1, &reg);
906 rt2x00_set_field32(&reg, TX_PWR_CFG_1_24MBS, value);
907 rt2x00_set_field32(&reg, TX_PWR_CFG_1_36MBS, value);
908 rt2x00_set_field32(&reg, TX_PWR_CFG_1_48MBS, value);
909 rt2x00_set_field32(&reg, TX_PWR_CFG_1_54MBS, value);
910 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS0, value);
911 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS1, value);
912 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS2, value);
913 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS3, value);
914 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_1, reg);
915
916 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_2, &reg);
917 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS4, value);
918 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS5, value);
919 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS6, value);
920 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS7, value);
921 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS8, value);
922 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS9, value);
923 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS10, value);
924 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS11, value);
925 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_2, reg);
926
927 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_3, &reg);
928 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS12, value);
929 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS13, value);
930 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS14, value);
931 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS15, value);
932 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN1, value);
933 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN2, value);
934 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN3, value);
935 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN4, value);
936 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_3, reg);
937
938 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_4, &reg);
939 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN5, value);
940 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN6, value);
941 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN7, value);
942 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN8, value);
943 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_4, reg);
944}
945
946static void rt2800usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
947 struct rt2x00lib_conf *libconf)
948{
949 u32 reg;
950
951 rt2x00usb_register_read(rt2x00dev, TX_RTY_CFG, &reg);
952 rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT,
953 libconf->conf->short_frame_max_tx_count);
954 rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT,
955 libconf->conf->long_frame_max_tx_count);
956 rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
957 rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
958 rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
959 rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
960 rt2x00usb_register_write(rt2x00dev, TX_RTY_CFG, reg);
961}
962
963static void rt2800usb_config_ps(struct rt2x00_dev *rt2x00dev,
964 struct rt2x00lib_conf *libconf)
965{
966 enum dev_state state =
967 (libconf->conf->flags & IEEE80211_CONF_PS) ?
968 STATE_SLEEP : STATE_AWAKE;
969 u32 reg;
970
971 if (state == STATE_SLEEP) {
972 rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0);
973
974 rt2x00usb_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
975 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 5);
976 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE,
977 libconf->conf->listen_interval - 1);
978 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 1);
979 rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
980
981 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
982 } else {
983 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
984
985 rt2x00usb_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
986 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 0);
987 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE, 0);
988 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 0);
989 rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
990 }
991}
992
993static void rt2800usb_config(struct rt2x00_dev *rt2x00dev,
994 struct rt2x00lib_conf *libconf,
995 const unsigned int flags)
996{
997 /* Always recalculate LNA gain before changing configuration */
998 rt2800usb_config_lna_gain(rt2x00dev, libconf);
999
1000 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
1001 rt2800usb_config_channel(rt2x00dev, libconf->conf,
1002 &libconf->rf, &libconf->channel);
1003 if (flags & IEEE80211_CONF_CHANGE_POWER)
1004 rt2800usb_config_txpower(rt2x00dev, libconf->conf->power_level);
1005 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
1006 rt2800usb_config_retry_limit(rt2x00dev, libconf);
1007 if (flags & IEEE80211_CONF_CHANGE_PS)
1008 rt2800usb_config_ps(rt2x00dev, libconf);
1009}
1010
1011/*
1012 * Link tuning
1013 */
1014static void rt2800usb_link_stats(struct rt2x00_dev *rt2x00dev,
1015 struct link_qual *qual)
1016{
1017 u32 reg;
1018
1019 /*
1020 * Update FCS error count from register.
1021 */
1022 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, &reg);
1023 qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR);
1024}
1025
1026static u8 rt2800usb_get_default_vgc(struct rt2x00_dev *rt2x00dev)
1027{
1028 if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
1029 if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION)
1030 return 0x1c + (2 * rt2x00dev->lna_gain);
1031 else
1032 return 0x2e + rt2x00dev->lna_gain;
1033 }
1034
1035 if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags))
1036 return 0x32 + (rt2x00dev->lna_gain * 5) / 3;
1037 else
1038 return 0x3a + (rt2x00dev->lna_gain * 5) / 3;
1039}
1040
1041static inline void rt2800usb_set_vgc(struct rt2x00_dev *rt2x00dev,
1042 struct link_qual *qual, u8 vgc_level)
1043{
1044 if (qual->vgc_level != vgc_level) {
1045 rt2800usb_bbp_write(rt2x00dev, 66, vgc_level);
1046 qual->vgc_level = vgc_level;
1047 qual->vgc_level_reg = vgc_level;
1048 }
1049}
1050
1051static void rt2800usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
1052 struct link_qual *qual)
1053{
1054 rt2800usb_set_vgc(rt2x00dev, qual,
1055 rt2800usb_get_default_vgc(rt2x00dev));
1056}
1057
1058static void rt2800usb_link_tuner(struct rt2x00_dev *rt2x00dev,
1059 struct link_qual *qual, const u32 count)
1060{
1061 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION)
1062 return;
1063
1064 /*
1065 * When RSSI is better then -80 increase VGC level with 0x10
1066 */
1067 rt2800usb_set_vgc(rt2x00dev, qual,
1068 rt2800usb_get_default_vgc(rt2x00dev) +
1069 ((qual->rssi > -80) * 0x10));
1070}
1071
1072/*
1073 * Firmware functions
1074 */
1075static char *rt2800usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
1076{
1077 return FIRMWARE_RT2870;
1078}
1079
1080static bool rt2800usb_check_crc(const u8 *data, const size_t len)
1081{
1082 u16 fw_crc;
1083 u16 crc;
1084
1085 /*
1086 * The last 2 bytes in the firmware array are the crc checksum itself,
1087 * this means that we should never pass those 2 bytes to the crc
1088 * algorithm.
1089 */
1090 fw_crc = (data[len - 2] << 8 | data[len - 1]);
1091
1092 /*
1093 * Use the crc ccitt algorithm.
1094 * This will return the same value as the legacy driver which
1095 * used bit ordering reversion on the both the firmware bytes
1096 * before input input as well as on the final output.
1097 * Obviously using crc ccitt directly is much more efficient.
1098 */
1099 crc = crc_ccitt(~0, data, len - 2);
1100
1101 /*
1102 * There is a small difference between the crc-itu-t + bitrev and
1103 * the crc-ccitt crc calculation. In the latter method the 2 bytes
1104 * will be swapped, use swab16 to convert the crc to the correct
1105 * value.
1106 */
1107 crc = swab16(crc);
1108
1109 return fw_crc == crc;
1110}
1111
1112static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
1113 const u8 *data, const size_t len)
1114{
1115 u16 chipset = (rt2x00_rev(&rt2x00dev->chip) >> 16) & 0xffff;
1116 size_t offset = 0;
1117
1118 /*
1119 * Firmware files:
1120 * There are 2 variations of the rt2870 firmware.
1121 * a) size: 4kb
1122 * b) size: 8kb
1123 * Note that (b) contains 2 seperate firmware blobs of 4k
1124 * within the file. The first blob is the same firmware as (a),
1125 * but the second blob is for the additional chipsets.
1126 */
1127 if (len != 4096 && len != 8192)
1128 return FW_BAD_LENGTH;
1129
1130 /*
1131 * Check if we need the upper 4kb firmware data or not.
1132 */
1133 if ((len == 4096) &&
1134 (chipset != 0x2860) &&
1135 (chipset != 0x2872) &&
1136 (chipset != 0x3070))
1137 return FW_BAD_VERSION;
1138
1139 /*
1140 * 8kb firmware files must be checked as if it were
1141 * 2 seperate firmware files.
1142 */
1143 while (offset < len) {
1144 if (!rt2800usb_check_crc(data + offset, 4096))
1145 return FW_BAD_CRC;
1146
1147 offset += 4096;
1148 }
1149
1150 return FW_OK;
1151}
1152
1153static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1154 const u8 *data, const size_t len)
1155{
1156 unsigned int i;
1157 int status;
1158 u32 reg;
1159 u32 offset;
1160 u32 length;
1161 u16 chipset = (rt2x00_rev(&rt2x00dev->chip) >> 16) & 0xffff;
1162
1163 /*
1164 * Check which section of the firmware we need.
1165 */
1166 if ((chipset == 0x2860) ||
1167 (chipset == 0x2872) ||
1168 (chipset == 0x3070)) {
1169 offset = 0;
1170 length = 4096;
1171 } else {
1172 offset = 4096;
1173 length = 4096;
1174 }
1175
1176 /*
1177 * Wait for stable hardware.
1178 */
1179 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1180 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1181 if (reg && reg != ~0)
1182 break;
1183 msleep(1);
1184 }
1185
1186 if (i == REGISTER_BUSY_COUNT) {
1187 ERROR(rt2x00dev, "Unstable hardware.\n");
1188 return -EBUSY;
1189 }
1190
1191 /*
1192 * Write firmware to device.
1193 */
1194 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
1195 USB_VENDOR_REQUEST_OUT,
1196 FIRMWARE_IMAGE_BASE,
1197 data + offset, length,
1198 REGISTER_TIMEOUT32(length));
1199
1200 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
1201 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
1202
1203 /*
1204 * Send firmware request to device to load firmware,
1205 * we need to specify a long timeout time.
1206 */
1207 status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
1208 0, USB_MODE_FIRMWARE,
1209 REGISTER_TIMEOUT_FIRMWARE);
1210 if (status < 0) {
1211 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
1212 return status;
1213 }
1214
1215 msleep(10);
1216 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
1217
1218 /*
1219 * Send signal to firmware during boot time.
1220 */
1221 rt2800usb_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0);
1222
1223 if ((chipset == 0x3070) ||
1224 (chipset == 0x3071) ||
1225 (chipset == 0x3572)) {
1226 udelay(200);
1227 rt2800usb_mcu_request(rt2x00dev, MCU_CURRENT, 0, 0, 0);
1228 udelay(10);
1229 }
1230
1231 /*
1232 * Wait for device to stabilize.
1233 */
1234 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1235 rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
1236 if (rt2x00_get_field32(reg, PBF_SYS_CTRL_READY))
1237 break;
1238 msleep(1);
1239 }
1240
1241 if (i == REGISTER_BUSY_COUNT) {
1242 ERROR(rt2x00dev, "PBF system register not ready.\n");
1243 return -EBUSY;
1244 }
1245
1246 /*
1247 * Initialize firmware.
1248 */
1249 rt2x00usb_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
1250 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
1251 msleep(1);
1252
1253 return 0;
1254}
1255
1256/*
1257 * Initialization functions.
1258 */
1259static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1260{
1261 u32 reg;
1262 unsigned int i;
1263
1264 /*
1265 * Wait untill BBP and RF are ready.
1266 */
1267 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1268 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1269 if (reg && reg != ~0)
1270 break;
1271 msleep(1);
1272 }
1273
1274 if (i == REGISTER_BUSY_COUNT) {
1275 ERROR(rt2x00dev, "Unstable hardware.\n");
1276 return -EBUSY;
1277 }
1278
1279 rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
1280 rt2x00usb_register_write(rt2x00dev, PBF_SYS_CTRL, reg & ~0x00002000);
1281
1282 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1283 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
1284 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);
1285 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1286
1287 rt2x00usb_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000);
1288
1289 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
1290 USB_MODE_RESET, REGISTER_TIMEOUT);
1291
1292 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
1293
1294 rt2x00usb_register_read(rt2x00dev, BCN_OFFSET0, &reg);
1295 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */
1296 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN1, 0xe8); /* 0x3a00 */
1297 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN2, 0xf0); /* 0x3c00 */
1298 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN3, 0xf8); /* 0x3e00 */
1299 rt2x00usb_register_write(rt2x00dev, BCN_OFFSET0, reg);
1300
1301 rt2x00usb_register_read(rt2x00dev, BCN_OFFSET1, &reg);
1302 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN4, 0xc8); /* 0x3200 */
1303 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN5, 0xd0); /* 0x3400 */
1304 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN6, 0x77); /* 0x1dc0 */
1305 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN7, 0x6f); /* 0x1bc0 */
1306 rt2x00usb_register_write(rt2x00dev, BCN_OFFSET1, reg);
1307
1308 rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
1309 rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
1310
1311 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
1312
1313 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
1314 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL, 0);
1315 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);
1316 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, 0);
1317 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);
1318 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
1319 rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
1320 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
1321
1322 if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) {
1323 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
1324 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
1325 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
1326 } else {
1327 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
1328 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
1329 }
1330
1331 rt2x00usb_register_read(rt2x00dev, TX_LINK_CFG, &reg);
1332 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB_LIFETIME, 32);
1333 rt2x00_set_field32(&reg, TX_LINK_CFG_MFB_ENABLE, 0);
1334 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_UMFS_ENABLE, 0);
1335 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_MRQ_EN, 0);
1336 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_RDG_EN, 0);
1337 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_CF_ACK_EN, 1);
1338 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB, 0);
1339 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFS, 0);
1340 rt2x00usb_register_write(rt2x00dev, TX_LINK_CFG, reg);
1341
1342 rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
1343 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9);
1344 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10);
1345 rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
1346
1347 rt2x00usb_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
1348 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
1349 if (rt2x00_rev(&rt2x00dev->chip) >= RT2880E_VERSION &&
1350 rt2x00_rev(&rt2x00dev->chip) < RT3070_VERSION)
1351 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
1352 else
1353 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
1354 rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_PSDU, 0);
1355 rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
1356 rt2x00usb_register_write(rt2x00dev, MAX_LEN_CFG, reg);
1357
1358 rt2x00usb_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
1359
1360 rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
1361 rt2x00_set_field32(&reg, AUTO_RSP_CFG_AUTORESPONDER, 1);
1362 rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MMODE, 0);
1363 rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MREF, 0);
1364 rt2x00_set_field32(&reg, AUTO_RSP_CFG_DUAL_CTS_EN, 0);
1365 rt2x00_set_field32(&reg, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0);
1366 rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
1367
1368 rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
1369 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 8);
1370 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0);
1371 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1);
1372 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1373 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1374 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1375 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1376 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1377 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1378 rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg);
1379
1380 rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
1381 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 8);
1382 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0);
1383 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1);
1384 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1385 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1386 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1387 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1388 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1389 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1390 rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
1391
1392 rt2x00usb_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
1393 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_RATE, 0x4004);
1394 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_CTRL, 0);
1395 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_NAV, 1);
1396 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1397 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1398 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1399 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
1400 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1401 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
1402 rt2x00usb_register_write(rt2x00dev, MM20_PROT_CFG, reg);
1403
1404 rt2x00usb_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
1405 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
1406 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
1407 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1);
1408 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1409 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1410 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1411 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1412 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1413 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1414 rt2x00usb_register_write(rt2x00dev, MM40_PROT_CFG, reg);
1415
1416 rt2x00usb_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
1417 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_RATE, 0x4004);
1418 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_CTRL, 0);
1419 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_NAV, 1);
1420 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1421 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1422 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1423 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
1424 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1425 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
1426 rt2x00usb_register_write(rt2x00dev, GF20_PROT_CFG, reg);
1427
1428 rt2x00usb_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
1429 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_RATE, 0x4084);
1430 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_CTRL, 0);
1431 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_NAV, 1);
1432 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1433 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1434 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1435 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1436 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1437 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1438 rt2x00usb_register_write(rt2x00dev, GF40_PROT_CFG, reg);
1439
1440 rt2x00usb_register_write(rt2x00dev, PBF_CFG, 0xf40006);
1441
1442 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1443 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
1444 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
1445 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
1446 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
1447 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_WP_DMA_BURST_SIZE, 3);
1448 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 0);
1449 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_BIG_ENDIAN, 0);
1450 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_HDR_SCATTER, 0);
1451 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_HDR_SEG_LEN, 0);
1452 rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
1453
1454 rt2x00usb_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f);
1455 rt2x00usb_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002);
1456
1457 rt2x00usb_register_read(rt2x00dev, TX_RTS_CFG, &reg);
1458 rt2x00_set_field32(&reg, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 32);
1459 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES,
1460 IEEE80211_MAX_RTS_THRESHOLD);
1461 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_FBK_EN, 0);
1462 rt2x00usb_register_write(rt2x00dev, TX_RTS_CFG, reg);
1463
1464 rt2x00usb_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
1465 rt2x00usb_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
1466
1467 /*
1468 * ASIC will keep garbage value after boot, clear encryption keys.
1469 */
1470 for (i = 0; i < 256; i++) {
1471 u32 wcid[2] = { 0xffffffff, 0x00ffffff };
1472 rt2x00usb_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i),
1473 wcid, sizeof(wcid));
1474
1475 rt2x00usb_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 1);
1476 rt2x00usb_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0);
1477 }
1478
1479 for (i = 0; i < 16; i++)
1480 rt2x00usb_register_write(rt2x00dev,
1481 SHARED_KEY_MODE_ENTRY(i), 0);
1482
1483 /*
1484 * Clear all beacons
1485 * For the Beacon base registers we only need to clear
1486 * the first byte since that byte contains the VALID and OWNER
1487 * bits which (when set to 0) will invalidate the entire beacon.
1488 */
1489 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1490 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1491 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1492 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1493 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE4, 0);
1494 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE5, 0);
1495 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE6, 0);
1496 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
1497
1498 rt2x00usb_register_read(rt2x00dev, USB_CYC_CFG, &reg);
1499 rt2x00_set_field32(&reg, USB_CYC_CFG_CLOCK_CYCLE, 30);
1500 rt2x00usb_register_write(rt2x00dev, USB_CYC_CFG, reg);
1501
1502 rt2x00usb_register_read(rt2x00dev, HT_FBK_CFG0, &reg);
1503 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS0FBK, 0);
1504 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS1FBK, 0);
1505 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS2FBK, 1);
1506 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS3FBK, 2);
1507 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS4FBK, 3);
1508 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS5FBK, 4);
1509 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS6FBK, 5);
1510 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS7FBK, 6);
1511 rt2x00usb_register_write(rt2x00dev, HT_FBK_CFG0, reg);
1512
1513 rt2x00usb_register_read(rt2x00dev, HT_FBK_CFG1, &reg);
1514 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS8FBK, 8);
1515 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS9FBK, 8);
1516 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS10FBK, 9);
1517 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS11FBK, 10);
1518 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS12FBK, 11);
1519 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS13FBK, 12);
1520 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS14FBK, 13);
1521 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS15FBK, 14);
1522 rt2x00usb_register_write(rt2x00dev, HT_FBK_CFG1, reg);
1523
1524 rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG0, &reg);
1525 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS0FBK, 8);
1526 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS1FBK, 8);
1527 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS2FBK, 3);
1528 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS3FBK, 10);
1529 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS4FBK, 11);
1530 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS5FBK, 12);
1531 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS6FBK, 13);
1532 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS7FBK, 14);
1533 rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG0, reg);
1534
1535 rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG1, &reg);
1536 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS0FBK, 0);
1537 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS1FBK, 0);
1538 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS2FBK, 1);
1539 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS3FBK, 2);
1540 rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG1, reg);
1541
1542 /*
1543 * We must clear the error counters.
1544 * These registers are cleared on read,
1545 * so we may pass a useless variable to store the value.
1546 */
1547 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, &reg);
1548 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT1, &reg);
1549 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT2, &reg);
1550 rt2x00usb_register_read(rt2x00dev, TX_STA_CNT0, &reg);
1551 rt2x00usb_register_read(rt2x00dev, TX_STA_CNT1, &reg);
1552 rt2x00usb_register_read(rt2x00dev, TX_STA_CNT2, &reg);
1553
1554 return 0;
1555}
1556
1557static int rt2800usb_wait_bbp_rf_ready(struct rt2x00_dev *rt2x00dev)
1558{
1559 unsigned int i;
1560 u32 reg;
1561
1562 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1563 rt2x00usb_register_read(rt2x00dev, MAC_STATUS_CFG, &reg);
1564 if (!rt2x00_get_field32(reg, MAC_STATUS_CFG_BBP_RF_BUSY))
1565 return 0;
1566
1567 udelay(REGISTER_BUSY_DELAY);
1568 }
1569
1570 ERROR(rt2x00dev, "BBP/RF register access failed, aborting.\n");
1571 return -EACCES;
1572}
1573
1574static int rt2800usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
1575{
1576 unsigned int i;
1577 u8 value;
1578
1579 /*
1580 * BBP was enabled after firmware was loaded,
1581 * but we need to reactivate it now.
1582 */
1583 rt2x00usb_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
1584 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
1585 msleep(1);
1586
1587 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1588 rt2800usb_bbp_read(rt2x00dev, 0, &value);
1589 if ((value != 0xff) && (value != 0x00))
1590 return 0;
1591 udelay(REGISTER_BUSY_DELAY);
1592 }
1593
1594 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1595 return -EACCES;
1596}
1597
1598static int rt2800usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1599{
1600 unsigned int i;
1601 u16 eeprom;
1602 u8 reg_id;
1603 u8 value;
1604
1605 if (unlikely(rt2800usb_wait_bbp_rf_ready(rt2x00dev) ||
1606 rt2800usb_wait_bbp_ready(rt2x00dev)))
1607 return -EACCES;
1608
1609 rt2800usb_bbp_write(rt2x00dev, 65, 0x2c);
1610 rt2800usb_bbp_write(rt2x00dev, 66, 0x38);
1611 rt2800usb_bbp_write(rt2x00dev, 69, 0x12);
1612 rt2800usb_bbp_write(rt2x00dev, 70, 0x0a);
1613 rt2800usb_bbp_write(rt2x00dev, 73, 0x10);
1614 rt2800usb_bbp_write(rt2x00dev, 81, 0x37);
1615 rt2800usb_bbp_write(rt2x00dev, 82, 0x62);
1616 rt2800usb_bbp_write(rt2x00dev, 83, 0x6a);
1617 rt2800usb_bbp_write(rt2x00dev, 84, 0x99);
1618 rt2800usb_bbp_write(rt2x00dev, 86, 0x00);
1619 rt2800usb_bbp_write(rt2x00dev, 91, 0x04);
1620 rt2800usb_bbp_write(rt2x00dev, 92, 0x00);
1621 rt2800usb_bbp_write(rt2x00dev, 103, 0x00);
1622 rt2800usb_bbp_write(rt2x00dev, 105, 0x05);
1623
1624 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
1625 rt2800usb_bbp_write(rt2x00dev, 69, 0x16);
1626 rt2800usb_bbp_write(rt2x00dev, 73, 0x12);
1627 }
1628
1629 if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION) {
1630 rt2800usb_bbp_write(rt2x00dev, 84, 0x19);
1631 }
1632
1633 if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) {
1634 rt2800usb_bbp_write(rt2x00dev, 70, 0x0a);
1635 rt2800usb_bbp_write(rt2x00dev, 84, 0x99);
1636 rt2800usb_bbp_write(rt2x00dev, 105, 0x05);
1637 }
1638
1639 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1640 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1641
1642 if (eeprom != 0xffff && eeprom != 0x0000) {
1643 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1644 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1645 rt2800usb_bbp_write(rt2x00dev, reg_id, value);
1646 }
1647 }
1648
1649 return 0;
1650}
1651
1652static u8 rt2800usb_init_rx_filter(struct rt2x00_dev *rt2x00dev,
1653 bool bw40, u8 rfcsr24, u8 filter_target)
1654{
1655 unsigned int i;
1656 u8 bbp;
1657 u8 rfcsr;
1658 u8 passband;
1659 u8 stopband;
1660 u8 overtuned = 0;
1661
1662 rt2800usb_rfcsr_write(rt2x00dev, 24, rfcsr24);
1663
1664 rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
1665 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40);
1666 rt2800usb_bbp_write(rt2x00dev, 4, bbp);
1667
1668 rt2800usb_rfcsr_read(rt2x00dev, 22, &rfcsr);
1669 rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1);
1670 rt2800usb_rfcsr_write(rt2x00dev, 22, rfcsr);
1671
1672 /*
1673 * Set power & frequency of passband test tone
1674 */
1675 rt2800usb_bbp_write(rt2x00dev, 24, 0);
1676
1677 for (i = 0; i < 100; i++) {
1678 rt2800usb_bbp_write(rt2x00dev, 25, 0x90);
1679 msleep(1);
1680
1681 rt2800usb_bbp_read(rt2x00dev, 55, &passband);
1682 if (passband)
1683 break;
1684 }
1685
1686 /*
1687 * Set power & frequency of stopband test tone
1688 */
1689 rt2800usb_bbp_write(rt2x00dev, 24, 0x06);
1690
1691 for (i = 0; i < 100; i++) {
1692 rt2800usb_bbp_write(rt2x00dev, 25, 0x90);
1693 msleep(1);
1694
1695 rt2800usb_bbp_read(rt2x00dev, 55, &stopband);
1696
1697 if ((passband - stopband) <= filter_target) {
1698 rfcsr24++;
1699 overtuned += ((passband - stopband) == filter_target);
1700 } else
1701 break;
1702
1703 rt2800usb_rfcsr_write(rt2x00dev, 24, rfcsr24);
1704 }
1705
1706 rfcsr24 -= !!overtuned;
1707
1708 rt2800usb_rfcsr_write(rt2x00dev, 24, rfcsr24);
1709 return rfcsr24;
1710}
1711
1712static int rt2800usb_init_rfcsr(struct rt2x00_dev *rt2x00dev)
1713{
1714 u8 rfcsr;
1715 u8 bbp;
1716
1717 if (rt2x00_rev(&rt2x00dev->chip) != RT3070_VERSION)
1718 return 0;
1719
1720 /*
1721 * Init RF calibration.
1722 */
1723 rt2800usb_rfcsr_read(rt2x00dev, 30, &rfcsr);
1724 rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);
1725 rt2800usb_rfcsr_write(rt2x00dev, 30, rfcsr);
1726 msleep(1);
1727 rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
1728 rt2800usb_rfcsr_write(rt2x00dev, 30, rfcsr);
1729
1730 rt2800usb_rfcsr_write(rt2x00dev, 4, 0x40);
1731 rt2800usb_rfcsr_write(rt2x00dev, 5, 0x03);
1732 rt2800usb_rfcsr_write(rt2x00dev, 6, 0x02);
1733 rt2800usb_rfcsr_write(rt2x00dev, 7, 0x70);
1734 rt2800usb_rfcsr_write(rt2x00dev, 9, 0x0f);
1735 rt2800usb_rfcsr_write(rt2x00dev, 10, 0x71);
1736 rt2800usb_rfcsr_write(rt2x00dev, 11, 0x21);
1737 rt2800usb_rfcsr_write(rt2x00dev, 12, 0x7b);
1738 rt2800usb_rfcsr_write(rt2x00dev, 14, 0x90);
1739 rt2800usb_rfcsr_write(rt2x00dev, 15, 0x58);
1740 rt2800usb_rfcsr_write(rt2x00dev, 16, 0xb3);
1741 rt2800usb_rfcsr_write(rt2x00dev, 17, 0x92);
1742 rt2800usb_rfcsr_write(rt2x00dev, 18, 0x2c);
1743 rt2800usb_rfcsr_write(rt2x00dev, 19, 0x02);
1744 rt2800usb_rfcsr_write(rt2x00dev, 20, 0xba);
1745 rt2800usb_rfcsr_write(rt2x00dev, 21, 0xdb);
1746 rt2800usb_rfcsr_write(rt2x00dev, 24, 0x16);
1747 rt2800usb_rfcsr_write(rt2x00dev, 25, 0x01);
1748 rt2800usb_rfcsr_write(rt2x00dev, 27, 0x03);
1749 rt2800usb_rfcsr_write(rt2x00dev, 29, 0x1f);
1750
1751 /*
1752 * Set RX Filter calibration for 20MHz and 40MHz
1753 */
1754 rt2x00dev->calibration[0] =
1755 rt2800usb_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
1756 rt2x00dev->calibration[1] =
1757 rt2800usb_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
1758
1759 /*
1760 * Set back to initial state
1761 */
1762 rt2800usb_bbp_write(rt2x00dev, 24, 0);
1763
1764 rt2800usb_rfcsr_read(rt2x00dev, 22, &rfcsr);
1765 rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
1766 rt2800usb_rfcsr_write(rt2x00dev, 22, rfcsr);
1767
1768 /*
1769 * set BBP back to BW20
1770 */
1771 rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
1772 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
1773 rt2800usb_bbp_write(rt2x00dev, 4, bbp);
1774
1775 return 0;
1776}
1777
1778/*
1779 * Device state switch handlers.
1780 */
1781static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1782 enum dev_state state)
1783{
1784 u32 reg;
1785
1786 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1787 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX,
1788 (state == STATE_RADIO_RX_ON) ||
1789 (state == STATE_RADIO_RX_ON_LINK));
1790 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1791}
1792
1793static int rt2800usb_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
1794{
1795 unsigned int i;
1796 u32 reg;
1797
1798 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1799 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1800 if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
1801 !rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY))
1802 return 0;
1803
1804 msleep(1);
1805 }
1806
1807 ERROR(rt2x00dev, "WPDMA TX/RX busy, aborting.\n");
1808 return -EACCES;
1809}
1810
1811static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1812{
1813 u32 reg;
1814 u16 word;
1815
1816 /*
1817 * Initialize all registers.
1818 */
1819 if (unlikely(rt2800usb_wait_wpdma_ready(rt2x00dev) ||
1820 rt2800usb_init_registers(rt2x00dev) ||
1821 rt2800usb_init_bbp(rt2x00dev) ||
1822 rt2800usb_init_rfcsr(rt2x00dev)))
1823 return -EIO;
1824
1825 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1826 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
1827 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1828
1829 udelay(50);
1830
1831 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1832 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
1833 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1);
1834 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1);
1835 rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
1836
1837
1838 rt2x00usb_register_read(rt2x00dev, USB_DMA_CFG, &reg);
1839 rt2x00_set_field32(&reg, USB_DMA_CFG_PHY_CLEAR, 0);
1840 /* Don't use bulk in aggregation when working with USB 1.1 */
1841 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_EN,
1842 (rt2x00dev->rx->usb_maxpacket == 512));
1843 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_TIMEOUT, 128);
1844 /*
1845 * Total room for RX frames in kilobytes, PBF might still exceed
1846 * this limit so reduce the number to prevent errors.
1847 */
1848 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_LIMIT,
1849 ((RX_ENTRIES * DATA_FRAME_SIZE) / 1024) - 3);
1850 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_EN, 1);
1851 rt2x00_set_field32(&reg, USB_DMA_CFG_TX_BULK_EN, 1);
1852 rt2x00usb_register_write(rt2x00dev, USB_DMA_CFG, reg);
1853
1854 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1855 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
1856 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);
1857 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1858
1859 /*
1860 * Initialize LED control
1861 */
1862 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED1, &word);
1863 rt2800usb_mcu_request(rt2x00dev, MCU_LED_1, 0xff,
1864 word & 0xff, (word >> 8) & 0xff);
1865
1866 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED2, &word);
1867 rt2800usb_mcu_request(rt2x00dev, MCU_LED_2, 0xff,
1868 word & 0xff, (word >> 8) & 0xff);
1869
1870 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED3, &word);
1871 rt2800usb_mcu_request(rt2x00dev, MCU_LED_3, 0xff,
1872 word & 0xff, (word >> 8) & 0xff);
1873
1874 return 0;
1875}
1876
1877static void rt2800usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1878{
1879 u32 reg;
1880
1881 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1882 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
1883 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
1884 rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
1885
1886 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
1887 rt2x00usb_register_write(rt2x00dev, PWR_PIN_CFG, 0);
1888 rt2x00usb_register_write(rt2x00dev, TX_PIN_CFG, 0);
1889
1890 /* Wait for DMA, ignore error */
1891 rt2800usb_wait_wpdma_ready(rt2x00dev);
1892
1893 rt2x00usb_disable_radio(rt2x00dev);
1894}
1895
1896static int rt2800usb_set_state(struct rt2x00_dev *rt2x00dev,
1897 enum dev_state state)
1898{
1899 if (state == STATE_AWAKE)
1900 rt2800usb_mcu_request(rt2x00dev, MCU_WAKEUP, 0xff, 0, 0);
1901 else
1902 rt2800usb_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0, 2);
1903
1904 return 0;
1905}
1906
1907static int rt2800usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1908 enum dev_state state)
1909{
1910 int retval = 0;
1911
1912 switch (state) {
1913 case STATE_RADIO_ON:
1914 /*
1915 * Before the radio can be enabled, the device first has
1916 * to be woken up. After that it needs a bit of time
1917 * to be fully awake and the radio can be enabled.
1918 */
1919 rt2800usb_set_state(rt2x00dev, STATE_AWAKE);
1920 msleep(1);
1921 retval = rt2800usb_enable_radio(rt2x00dev);
1922 break;
1923 case STATE_RADIO_OFF:
1924 /*
1925 * After the radio has been disablee, the device should
1926 * be put to sleep for powersaving.
1927 */
1928 rt2800usb_disable_radio(rt2x00dev);
1929 rt2800usb_set_state(rt2x00dev, STATE_SLEEP);
1930 break;
1931 case STATE_RADIO_RX_ON:
1932 case STATE_RADIO_RX_ON_LINK:
1933 case STATE_RADIO_RX_OFF:
1934 case STATE_RADIO_RX_OFF_LINK:
1935 rt2800usb_toggle_rx(rt2x00dev, state);
1936 break;
1937 case STATE_RADIO_IRQ_ON:
1938 case STATE_RADIO_IRQ_OFF:
1939 /* No support, but no error either */
1940 break;
1941 case STATE_DEEP_SLEEP:
1942 case STATE_SLEEP:
1943 case STATE_STANDBY:
1944 case STATE_AWAKE:
1945 retval = rt2800usb_set_state(rt2x00dev, state);
1946 break;
1947 default:
1948 retval = -ENOTSUPP;
1949 break;
1950 }
1951
1952 if (unlikely(retval))
1953 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1954 state, retval);
1955
1956 return retval;
1957}
1958
1959/*
1960 * TX descriptor initialization
1961 */
1962static void rt2800usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1963 struct sk_buff *skb,
1964 struct txentry_desc *txdesc)
1965{
1966 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1967 __le32 *txi = skbdesc->desc;
1968 __le32 *txwi = &txi[TXINFO_DESC_SIZE / sizeof(__le32)];
1969 u32 word;
1970
1971 /*
1972 * Initialize TX Info descriptor
1973 */
1974 rt2x00_desc_read(txwi, 0, &word);
1975 rt2x00_set_field32(&word, TXWI_W0_FRAG,
1976 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1977 rt2x00_set_field32(&word, TXWI_W0_MIMO_PS, 0);
1978 rt2x00_set_field32(&word, TXWI_W0_CF_ACK, 0);
1979 rt2x00_set_field32(&word, TXWI_W0_TS,
1980 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1981 rt2x00_set_field32(&word, TXWI_W0_AMPDU,
1982 test_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags));
1983 rt2x00_set_field32(&word, TXWI_W0_MPDU_DENSITY, txdesc->mpdu_density);
1984 rt2x00_set_field32(&word, TXWI_W0_TX_OP, txdesc->ifs);
1985 rt2x00_set_field32(&word, TXWI_W0_MCS, txdesc->mcs);
1986 rt2x00_set_field32(&word, TXWI_W0_BW,
1987 test_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags));
1988 rt2x00_set_field32(&word, TXWI_W0_SHORT_GI,
1989 test_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags));
1990 rt2x00_set_field32(&word, TXWI_W0_STBC, txdesc->stbc);
1991 rt2x00_set_field32(&word, TXWI_W0_PHYMODE, txdesc->rate_mode);
1992 rt2x00_desc_write(txwi, 0, word);
1993
1994 rt2x00_desc_read(txwi, 1, &word);
1995 rt2x00_set_field32(&word, TXWI_W1_ACK,
1996 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1997 rt2x00_set_field32(&word, TXWI_W1_NSEQ,
1998 test_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags));
1999 rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size);
2000 rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID,
2001 test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ?
2002 txdesc->key_idx : 0xff);
2003 rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
2004 skb->len - txdesc->l2pad);
2005 rt2x00_set_field32(&word, TXWI_W1_PACKETID,
2006 skbdesc->entry->entry_idx);
2007 rt2x00_desc_write(txwi, 1, word);
2008
2009 /*
2010 * Always write 0 to IV/EIV fields, hardware will insert the IV
2011 * from the IVEIV register when TXINFO_W0_WIV is set to 0.
2012 * When TXINFO_W0_WIV is set to 1 it will use the IV data
2013 * from the descriptor. The TXWI_W1_WIRELESS_CLI_ID indicates which
2014 * crypto entry in the registers should be used to encrypt the frame.
2015 */
2016 _rt2x00_desc_write(txwi, 2, 0 /* skbdesc->iv[0] */);
2017 _rt2x00_desc_write(txwi, 3, 0 /* skbdesc->iv[1] */);
2018
2019 /*
2020 * Initialize TX descriptor
2021 */
2022 rt2x00_desc_read(txi, 0, &word);
2023 rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_PKT_LEN,
2024 skb->len + TXWI_DESC_SIZE);
2025 rt2x00_set_field32(&word, TXINFO_W0_WIV,
2026 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags));
2027 rt2x00_set_field32(&word, TXINFO_W0_QSEL, 2);
2028 rt2x00_set_field32(&word, TXINFO_W0_SW_USE_LAST_ROUND, 0);
2029 rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_NEXT_VALID, 0);
2030 rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_BURST,
2031 test_bit(ENTRY_TXD_BURST, &txdesc->flags));
2032 rt2x00_desc_write(txi, 0, word);
2033}
2034
2035/*
2036 * TX data initialization
2037 */
2038static void rt2800usb_write_beacon(struct queue_entry *entry)
2039{
2040 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
2041 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
2042 unsigned int beacon_base;
2043 u32 reg;
2044
2045 /*
2046 * Add the descriptor in front of the skb.
2047 */
2048 skb_push(entry->skb, entry->queue->desc_size);
2049 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
2050 skbdesc->desc = entry->skb->data;
2051
2052 /*
2053 * Disable beaconing while we are reloading the beacon data,
2054 * otherwise we might be sending out invalid data.
2055 */
2056 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
2057 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);
2058 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);
2059 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
2060 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
2061
2062 /*
2063 * Write entire beacon with descriptor to register.
2064 */
2065 beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
2066 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
2067 USB_VENDOR_REQUEST_OUT, beacon_base,
2068 entry->skb->data, entry->skb->len,
2069 REGISTER_TIMEOUT32(entry->skb->len));
2070
2071 /*
2072 * Clean up the beacon skb.
2073 */
2074 dev_kfree_skb(entry->skb);
2075 entry->skb = NULL;
2076}
2077
2078static int rt2800usb_get_tx_data_len(struct queue_entry *entry)
2079{
2080 int length;
2081
2082 /*
2083 * The length _must_ include 4 bytes padding,
2084 * it should always be multiple of 4,
2085 * but it must _not_ be a multiple of the USB packet size.
2086 */
2087 length = roundup(entry->skb->len + 4, 4);
2088 length += (4 * !(length % entry->queue->usb_maxpacket));
2089
2090 return length;
2091}
2092
2093static void rt2800usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
2094 const enum data_queue_qid queue)
2095{
2096 u32 reg;
2097
2098 if (queue != QID_BEACON) {
2099 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
2100 return;
2101 }
2102
2103 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
2104 if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) {
2105 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
2106 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
2107 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
2108 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
2109 }
2110}
2111
2112/*
2113 * RX control handlers
2114 */
2115static void rt2800usb_fill_rxdone(struct queue_entry *entry,
2116 struct rxdone_entry_desc *rxdesc)
2117{
2118 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
2119 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
2120 __le32 *rxd = (__le32 *)entry->skb->data;
2121 __le32 *rxwi;
2122 u32 rxd0;
2123 u32 rxwi0;
2124 u32 rxwi1;
2125 u32 rxwi2;
2126 u32 rxwi3;
2127
2128 /*
2129 * Copy descriptor to the skbdesc->desc buffer, making it safe from
2130 * moving of frame data in rt2x00usb.
2131 */
2132 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
2133 rxd = (__le32 *)skbdesc->desc;
2134 rxwi = &rxd[RXD_DESC_SIZE / sizeof(__le32)];
2135
2136 /*
2137 * It is now safe to read the descriptor on all architectures.
2138 */
2139 rt2x00_desc_read(rxd, 0, &rxd0);
2140 rt2x00_desc_read(rxwi, 0, &rxwi0);
2141 rt2x00_desc_read(rxwi, 1, &rxwi1);
2142 rt2x00_desc_read(rxwi, 2, &rxwi2);
2143 rt2x00_desc_read(rxwi, 3, &rxwi3);
2144
2145 if (rt2x00_get_field32(rxd0, RXD_W0_CRC_ERROR))
2146 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
2147
2148 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
2149 rxdesc->cipher = rt2x00_get_field32(rxwi0, RXWI_W0_UDF);
2150 rxdesc->cipher_status =
2151 rt2x00_get_field32(rxd0, RXD_W0_CIPHER_ERROR);
2152 }
2153
2154 if (rt2x00_get_field32(rxd0, RXD_W0_DECRYPTED)) {
2155 /*
2156 * Hardware has stripped IV/EIV data from 802.11 frame during
2157 * decryption. Unfortunately the descriptor doesn't contain
2158 * any fields with the EIV/IV data either, so they can't
2159 * be restored by rt2x00lib.
2160 */
2161 rxdesc->flags |= RX_FLAG_IV_STRIPPED;
2162
2163 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
2164 rxdesc->flags |= RX_FLAG_DECRYPTED;
2165 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
2166 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
2167 }
2168
2169 if (rt2x00_get_field32(rxd0, RXD_W0_MY_BSS))
2170 rxdesc->dev_flags |= RXDONE_MY_BSS;
2171
2172 if (rt2x00_get_field32(rxd0, RXD_W0_L2PAD))
2173 rxdesc->dev_flags |= RXDONE_L2PAD;
2174
2175 if (rt2x00_get_field32(rxwi1, RXWI_W1_SHORT_GI))
2176 rxdesc->flags |= RX_FLAG_SHORT_GI;
2177
2178 if (rt2x00_get_field32(rxwi1, RXWI_W1_BW))
2179 rxdesc->flags |= RX_FLAG_40MHZ;
2180
2181 /*
2182 * Detect RX rate, always use MCS as signal type.
2183 */
2184 rxdesc->dev_flags |= RXDONE_SIGNAL_MCS;
2185 rxdesc->rate_mode = rt2x00_get_field32(rxwi1, RXWI_W1_PHYMODE);
2186 rxdesc->signal = rt2x00_get_field32(rxwi1, RXWI_W1_MCS);
2187
2188 /*
2189 * Mask of 0x8 bit to remove the short preamble flag.
2190 */
2191 if (rxdesc->rate_mode == RATE_MODE_CCK)
2192 rxdesc->signal &= ~0x8;
2193
2194 rxdesc->rssi =
2195 (rt2x00_get_field32(rxwi2, RXWI_W2_RSSI0) +
2196 rt2x00_get_field32(rxwi2, RXWI_W2_RSSI1)) / 2;
2197
2198 rxdesc->noise =
2199 (rt2x00_get_field32(rxwi3, RXWI_W3_SNR0) +
2200 rt2x00_get_field32(rxwi3, RXWI_W3_SNR1)) / 2;
2201
2202 rxdesc->size = rt2x00_get_field32(rxwi0, RXWI_W0_MPDU_TOTAL_BYTE_COUNT);
2203
2204 /*
2205 * Remove RXWI descriptor from start of buffer.
2206 */
2207 skb_pull(entry->skb, skbdesc->desc_len);
2208 skb_trim(entry->skb, rxdesc->size);
2209}
2210
2211/*
2212 * Device probe functions.
2213 */
2214static int rt2800usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
2215{
2216 u16 word;
2217 u8 *mac;
2218 u8 default_lna_gain;
2219
2220 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
2221
2222 /*
2223 * Start validation of the data that has been read.
2224 */
2225 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
2226 if (!is_valid_ether_addr(mac)) {
2227 DECLARE_MAC_BUF(macbuf);
2228
2229 random_ether_addr(mac);
2230 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
2231 }
2232
2233 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
2234 if (word == 0xffff) {
2235 rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2);
2236 rt2x00_set_field16(&word, EEPROM_ANTENNA_TXPATH, 1);
2237 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820);
2238 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
2239 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
2240 } else if (rt2x00_rev(&rt2x00dev->chip) < RT2883_VERSION) {
2241 /*
2242 * There is a max of 2 RX streams for RT2870 series
2243 */
2244 if (rt2x00_get_field16(word, EEPROM_ANTENNA_RXPATH) > 2)
2245 rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2);
2246 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
2247 }
2248
2249 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
2250 if (word == 0xffff) {
2251 rt2x00_set_field16(&word, EEPROM_NIC_HW_RADIO, 0);
2252 rt2x00_set_field16(&word, EEPROM_NIC_DYNAMIC_TX_AGC, 0);
2253 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_BG, 0);
2254 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_A, 0);
2255 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
2256 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_BG, 0);
2257 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_A, 0);
2258 rt2x00_set_field16(&word, EEPROM_NIC_WPS_PBC, 0);
2259 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_BG, 0);
2260 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_A, 0);
2261 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
2262 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
2263 }
2264
2265 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
2266 if ((word & 0x00ff) == 0x00ff) {
2267 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
2268 rt2x00_set_field16(&word, EEPROM_FREQ_LED_MODE,
2269 LED_MODE_TXRX_ACTIVITY);
2270 rt2x00_set_field16(&word, EEPROM_FREQ_LED_POLARITY, 0);
2271 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
2272 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED1, 0x5555);
2273 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED2, 0x2221);
2274 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED3, 0xa9f8);
2275 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
2276 }
2277
2278 /*
2279 * During the LNA validation we are going to use
2280 * lna0 as correct value. Note that EEPROM_LNA
2281 * is never validated.
2282 */
2283 rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &word);
2284 default_lna_gain = rt2x00_get_field16(word, EEPROM_LNA_A0);
2285
2286 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG, &word);
2287 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG_OFFSET0)) > 10)
2288 rt2x00_set_field16(&word, EEPROM_RSSI_BG_OFFSET0, 0);
2289 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG_OFFSET1)) > 10)
2290 rt2x00_set_field16(&word, EEPROM_RSSI_BG_OFFSET1, 0);
2291 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG, word);
2292
2293 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &word);
2294 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG2_OFFSET2)) > 10)
2295 rt2x00_set_field16(&word, EEPROM_RSSI_BG2_OFFSET2, 0);
2296 if (rt2x00_get_field16(word, EEPROM_RSSI_BG2_LNA_A1) == 0x00 ||
2297 rt2x00_get_field16(word, EEPROM_RSSI_BG2_LNA_A1) == 0xff)
2298 rt2x00_set_field16(&word, EEPROM_RSSI_BG2_LNA_A1,
2299 default_lna_gain);
2300 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG2, word);
2301
2302 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A, &word);
2303 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A_OFFSET0)) > 10)
2304 rt2x00_set_field16(&word, EEPROM_RSSI_A_OFFSET0, 0);
2305 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A_OFFSET1)) > 10)
2306 rt2x00_set_field16(&word, EEPROM_RSSI_A_OFFSET1, 0);
2307 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_A, word);
2308
2309 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A2, &word);
2310 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A2_OFFSET2)) > 10)
2311 rt2x00_set_field16(&word, EEPROM_RSSI_A2_OFFSET2, 0);
2312 if (rt2x00_get_field16(word, EEPROM_RSSI_A2_LNA_A2) == 0x00 ||
2313 rt2x00_get_field16(word, EEPROM_RSSI_A2_LNA_A2) == 0xff)
2314 rt2x00_set_field16(&word, EEPROM_RSSI_A2_LNA_A2,
2315 default_lna_gain);
2316 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_A2, word);
2317
2318 return 0;
2319}
2320
2321static int rt2800usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
2322{
2323 u32 reg;
2324 u16 value;
2325 u16 eeprom;
2326
2327 /*
2328 * Read EEPROM word for configuration.
2329 */
2330 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
2331
2332 /*
2333 * Identify RF chipset.
2334 */
2335 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
2336 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
2337 rt2x00_set_chip(rt2x00dev, RT2870, value, reg);
2338
2339 /*
2340 * The check for rt2860 is not a typo, some rt2870 hardware
2341 * identifies itself as rt2860 in the CSR register.
2342 */
2343 if (!rt2x00_check_rev(&rt2x00dev->chip, 0xfff00000, 0x28600000) &&
2344 !rt2x00_check_rev(&rt2x00dev->chip, 0xfff00000, 0x28700000) &&
2345 !rt2x00_check_rev(&rt2x00dev->chip, 0xfff00000, 0x28800000) &&
2346 !rt2x00_check_rev(&rt2x00dev->chip, 0xffff0000, 0x30700000)) {
2347 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
2348 return -ENODEV;
2349 }
2350
2351 if (!rt2x00_rf(&rt2x00dev->chip, RF2820) &&
2352 !rt2x00_rf(&rt2x00dev->chip, RF2850) &&
2353 !rt2x00_rf(&rt2x00dev->chip, RF2720) &&
2354 !rt2x00_rf(&rt2x00dev->chip, RF2750) &&
2355 !rt2x00_rf(&rt2x00dev->chip, RF3020) &&
2356 !rt2x00_rf(&rt2x00dev->chip, RF2020)) {
2357 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
2358 return -ENODEV;
2359 }
2360
2361 /*
2362 * Identify default antenna configuration.
2363 */
2364 rt2x00dev->default_ant.tx =
2365 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH);
2366 rt2x00dev->default_ant.rx =
2367 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH);
2368
2369 /*
2370 * Read frequency offset and RF programming sequence.
2371 */
2372 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
2373 rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
2374
2375 /*
2376 * Read external LNA informations.
2377 */
2378 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
2379
2380 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_A))
2381 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
2382 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG))
2383 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
2384
2385 /*
2386 * Detect if this device has an hardware controlled radio.
2387 */
2388#ifdef CONFIG_RT2X00_LIB_RFKILL
2389 if (rt2x00_get_field16(eeprom, EEPROM_NIC_HW_RADIO))
2390 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
2391#endif /* CONFIG_RT2X00_LIB_RFKILL */
2392
2393 /*
2394 * Store led settings, for correct led behaviour.
2395 */
2396#ifdef CONFIG_RT2X00_LIB_LEDS
2397 rt2800usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
2398 rt2800usb_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
2399 rt2800usb_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
2400
2401 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ,
2402 &rt2x00dev->led_mcu_reg);
2403#endif /* CONFIG_RT2X00_LIB_LEDS */
2404
2405 return 0;
2406}
2407
2408/*
2409 * RF value list for rt2870
2410 * Supports: 2.4 GHz (all) & 5.2 GHz (RF2850 & RF2750)
2411 */
2412static const struct rf_channel rf_vals[] = {
2413 { 1, 0x18402ecc, 0x184c0786, 0x1816b455, 0x1800510b },
2414 { 2, 0x18402ecc, 0x184c0786, 0x18168a55, 0x1800519f },
2415 { 3, 0x18402ecc, 0x184c078a, 0x18168a55, 0x1800518b },
2416 { 4, 0x18402ecc, 0x184c078a, 0x18168a55, 0x1800519f },
2417 { 5, 0x18402ecc, 0x184c078e, 0x18168a55, 0x1800518b },
2418 { 6, 0x18402ecc, 0x184c078e, 0x18168a55, 0x1800519f },
2419 { 7, 0x18402ecc, 0x184c0792, 0x18168a55, 0x1800518b },
2420 { 8, 0x18402ecc, 0x184c0792, 0x18168a55, 0x1800519f },
2421 { 9, 0x18402ecc, 0x184c0796, 0x18168a55, 0x1800518b },
2422 { 10, 0x18402ecc, 0x184c0796, 0x18168a55, 0x1800519f },
2423 { 11, 0x18402ecc, 0x184c079a, 0x18168a55, 0x1800518b },
2424 { 12, 0x18402ecc, 0x184c079a, 0x18168a55, 0x1800519f },
2425 { 13, 0x18402ecc, 0x184c079e, 0x18168a55, 0x1800518b },
2426 { 14, 0x18402ecc, 0x184c07a2, 0x18168a55, 0x18005193 },
2427
2428 /* 802.11 UNI / HyperLan 2 */
2429 { 36, 0x18402ecc, 0x184c099a, 0x18158a55, 0x180ed1a3 },
2430 { 38, 0x18402ecc, 0x184c099e, 0x18158a55, 0x180ed193 },
2431 { 40, 0x18402ec8, 0x184c0682, 0x18158a55, 0x180ed183 },
2432 { 44, 0x18402ec8, 0x184c0682, 0x18158a55, 0x180ed1a3 },
2433 { 46, 0x18402ec8, 0x184c0686, 0x18158a55, 0x180ed18b },
2434 { 48, 0x18402ec8, 0x184c0686, 0x18158a55, 0x180ed19b },
2435 { 52, 0x18402ec8, 0x184c068a, 0x18158a55, 0x180ed193 },
2436 { 54, 0x18402ec8, 0x184c068a, 0x18158a55, 0x180ed1a3 },
2437 { 56, 0x18402ec8, 0x184c068e, 0x18158a55, 0x180ed18b },
2438 { 60, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed183 },
2439 { 62, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed193 },
2440 { 64, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed1a3 },
2441
2442 /* 802.11 HyperLan 2 */
2443 { 100, 0x18402ec8, 0x184c06b2, 0x18178a55, 0x180ed783 },
2444 { 102, 0x18402ec8, 0x184c06b2, 0x18578a55, 0x180ed793 },
2445 { 104, 0x18402ec8, 0x185c06b2, 0x18578a55, 0x180ed1a3 },
2446 { 108, 0x18402ecc, 0x185c0a32, 0x18578a55, 0x180ed193 },
2447 { 110, 0x18402ecc, 0x184c0a36, 0x18178a55, 0x180ed183 },
2448 { 112, 0x18402ecc, 0x184c0a36, 0x18178a55, 0x180ed19b },
2449 { 116, 0x18402ecc, 0x184c0a3a, 0x18178a55, 0x180ed1a3 },
2450 { 118, 0x18402ecc, 0x184c0a3e, 0x18178a55, 0x180ed193 },
2451 { 120, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed183 },
2452 { 124, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed193 },
2453 { 126, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed15b },
2454 { 128, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed1a3 },
2455 { 132, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed18b },
2456 { 134, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed193 },
2457 { 136, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed19b },
2458 { 140, 0x18402ec4, 0x184c038a, 0x18178a55, 0x180ed183 },
2459
2460 /* 802.11 UNII */
2461 { 149, 0x18402ec4, 0x184c038a, 0x18178a55, 0x180ed1a7 },
2462 { 151, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed187 },
2463 { 153, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed18f },
2464 { 157, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed19f },
2465 { 159, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed1a7 },
2466 { 161, 0x18402ec4, 0x184c0392, 0x18178a55, 0x180ed187 },
2467 { 165, 0x18402ec4, 0x184c0392, 0x18178a55, 0x180ed197 },
2468 { 167, 0x18402ec4, 0x184c03d2, 0x18179855, 0x1815531f },
2469 { 169, 0x18402ec4, 0x184c03d2, 0x18179855, 0x18155327 },
2470 { 171, 0x18402ec4, 0x184c03d6, 0x18179855, 0x18155307 },
2471 { 173, 0x18402ec4, 0x184c03d6, 0x18179855, 0x1815530f },
2472
2473 /* 802.11 Japan */
2474 { 184, 0x15002ccc, 0x1500491e, 0x1509be55, 0x150c0a0b },
2475 { 188, 0x15002ccc, 0x15004922, 0x1509be55, 0x150c0a13 },
2476 { 192, 0x15002ccc, 0x15004926, 0x1509be55, 0x150c0a1b },
2477 { 196, 0x15002ccc, 0x1500492a, 0x1509be55, 0x150c0a23 },
2478 { 208, 0x15002ccc, 0x1500493a, 0x1509be55, 0x150c0a13 },
2479 { 212, 0x15002ccc, 0x1500493e, 0x1509be55, 0x150c0a1b },
2480 { 216, 0x15002ccc, 0x15004982, 0x1509be55, 0x150c0a23 },
2481};
2482
2483/*
2484 * RF value list for rt3070
2485 * Supports: 2.4 GHz
2486 */
2487static const struct rf_channel rf_vals_3070[] = {
2488 {1, 241, 2, 2 },
2489 {2, 241, 2, 7 },
2490 {3, 242, 2, 2 },
2491 {4, 242, 2, 7 },
2492 {5, 243, 2, 2 },
2493 {6, 243, 2, 7 },
2494 {7, 244, 2, 2 },
2495 {8, 244, 2, 7 },
2496 {9, 245, 2, 2 },
2497 {10, 245, 2, 7 },
2498 {11, 246, 2, 2 },
2499 {12, 246, 2, 7 },
2500 {13, 247, 2, 2 },
2501 {14, 248, 2, 4 },
2502};
2503
2504static int rt2800usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2505{
2506 struct hw_mode_spec *spec = &rt2x00dev->spec;
2507 struct channel_info *info;
2508 char *tx_power1;
2509 char *tx_power2;
2510 unsigned int i;
2511 u16 eeprom;
2512
2513 /*
2514 * Initialize all hw fields.
2515 */
2516 rt2x00dev->hw->flags =
2517 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
2518 IEEE80211_HW_SIGNAL_DBM |
2519 IEEE80211_HW_SUPPORTS_PS |
2520 IEEE80211_HW_PS_NULLFUNC_STACK;
2521 rt2x00dev->hw->extra_tx_headroom = TXINFO_DESC_SIZE + TXWI_DESC_SIZE;
2522
2523 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
2524 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
2525 rt2x00_eeprom_addr(rt2x00dev,
2526 EEPROM_MAC_ADDR_0));
2527
2528 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
2529
2530 /*
2531 * Initialize HT information.
2532 */
2533 spec->ht.ht_supported = true;
2534 spec->ht.cap =
2535 IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
2536 IEEE80211_HT_CAP_GRN_FLD |
2537 IEEE80211_HT_CAP_SGI_20 |
2538 IEEE80211_HT_CAP_SGI_40 |
2539 IEEE80211_HT_CAP_TX_STBC |
2540 IEEE80211_HT_CAP_RX_STBC |
2541 IEEE80211_HT_CAP_PSMP_SUPPORT;
2542 spec->ht.ampdu_factor = 3;
2543 spec->ht.ampdu_density = 4;
2544 spec->ht.mcs.tx_params =
2545 IEEE80211_HT_MCS_TX_DEFINED |
2546 IEEE80211_HT_MCS_TX_RX_DIFF |
2547 ((rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) - 1) <<
2548 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
2549
2550 switch (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH)) {
2551 case 3:
2552 spec->ht.mcs.rx_mask[2] = 0xff;
2553 case 2:
2554 spec->ht.mcs.rx_mask[1] = 0xff;
2555 case 1:
2556 spec->ht.mcs.rx_mask[0] = 0xff;
2557 spec->ht.mcs.rx_mask[4] = 0x1; /* MCS32 */
2558 break;
2559 }
2560
2561 /*
2562 * Initialize hw_mode information.
2563 */
2564 spec->supported_bands = SUPPORT_BAND_2GHZ;
2565 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
2566
2567 if (rt2x00_rf(&rt2x00dev->chip, RF2820) ||
2568 rt2x00_rf(&rt2x00dev->chip, RF2720)) {
2569 spec->num_channels = 14;
2570 spec->channels = rf_vals;
2571 } else if (rt2x00_rf(&rt2x00dev->chip, RF2850) ||
2572 rt2x00_rf(&rt2x00dev->chip, RF2750)) {
2573 spec->supported_bands |= SUPPORT_BAND_5GHZ;
2574 spec->num_channels = ARRAY_SIZE(rf_vals);
2575 spec->channels = rf_vals;
2576 } else if (rt2x00_rf(&rt2x00dev->chip, RF3020) ||
2577 rt2x00_rf(&rt2x00dev->chip, RF2020)) {
2578 spec->num_channels = ARRAY_SIZE(rf_vals_3070);
2579 spec->channels = rf_vals_3070;
2580 }
2581
2582 /*
2583 * Create channel information array
2584 */
2585 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
2586 if (!info)
2587 return -ENOMEM;
2588
2589 spec->channels_info = info;
2590
2591 tx_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG1);
2592 tx_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG2);
2593
2594 for (i = 0; i < 14; i++) {
2595 info[i].tx_power1 = TXPOWER_G_FROM_DEV(tx_power1[i]);
2596 info[i].tx_power2 = TXPOWER_G_FROM_DEV(tx_power2[i]);
2597 }
2598
2599 if (spec->num_channels > 14) {
2600 tx_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A1);
2601 tx_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A2);
2602
2603 for (i = 14; i < spec->num_channels; i++) {
2604 info[i].tx_power1 = TXPOWER_A_FROM_DEV(tx_power1[i]);
2605 info[i].tx_power2 = TXPOWER_A_FROM_DEV(tx_power2[i]);
2606 }
2607 }
2608
2609 return 0;
2610}
2611
2612static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)
2613{
2614 int retval;
2615
2616 /*
2617 * Allocate eeprom data.
2618 */
2619 retval = rt2800usb_validate_eeprom(rt2x00dev);
2620 if (retval)
2621 return retval;
2622
2623 retval = rt2800usb_init_eeprom(rt2x00dev);
2624 if (retval)
2625 return retval;
2626
2627 /*
2628 * Initialize hw specifications.
2629 */
2630 retval = rt2800usb_probe_hw_mode(rt2x00dev);
2631 if (retval)
2632 return retval;
2633
2634 /*
2635 * This device requires firmware.
2636 */
2637 __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
2638 __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
2639 __set_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags);
2640 if (!modparam_nohwcrypt)
2641 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
2642
2643 /*
2644 * Set the rssi offset.
2645 */
2646 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
2647
2648 return 0;
2649}
2650
2651/*
2652 * IEEE80211 stack callback functions.
2653 */
2654static void rt2800usb_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx,
2655 u32 *iv32, u16 *iv16)
2656{
2657 struct rt2x00_dev *rt2x00dev = hw->priv;
2658 struct mac_iveiv_entry iveiv_entry;
2659 u32 offset;
2660
2661 offset = MAC_IVEIV_ENTRY(hw_key_idx);
2662 rt2x00usb_register_multiread(rt2x00dev, offset,
2663 &iveiv_entry, sizeof(iveiv_entry));
2664
2665 memcpy(&iveiv_entry.iv[0], iv16, sizeof(iv16));
2666 memcpy(&iveiv_entry.iv[4], iv32, sizeof(iv32));
2667}
2668
2669static int rt2800usb_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
2670{
2671 struct rt2x00_dev *rt2x00dev = hw->priv;
2672 u32 reg;
2673 bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
2674
2675 rt2x00usb_register_read(rt2x00dev, TX_RTS_CFG, &reg);
2676 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES, value);
2677 rt2x00usb_register_write(rt2x00dev, TX_RTS_CFG, reg);
2678
2679 rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
2680 rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, enabled);
2681 rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg);
2682
2683 rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
2684 rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, enabled);
2685 rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
2686
2687 rt2x00usb_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
2688 rt2x00_set_field32(&reg, MM20_PROT_CFG_RTS_TH_EN, enabled);
2689 rt2x00usb_register_write(rt2x00dev, MM20_PROT_CFG, reg);
2690
2691 rt2x00usb_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
2692 rt2x00_set_field32(&reg, MM40_PROT_CFG_RTS_TH_EN, enabled);
2693 rt2x00usb_register_write(rt2x00dev, MM40_PROT_CFG, reg);
2694
2695 rt2x00usb_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
2696 rt2x00_set_field32(&reg, GF20_PROT_CFG_RTS_TH_EN, enabled);
2697 rt2x00usb_register_write(rt2x00dev, GF20_PROT_CFG, reg);
2698
2699 rt2x00usb_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
2700 rt2x00_set_field32(&reg, GF40_PROT_CFG_RTS_TH_EN, enabled);
2701 rt2x00usb_register_write(rt2x00dev, GF40_PROT_CFG, reg);
2702
2703 return 0;
2704}
2705
2706static int rt2800usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2707 const struct ieee80211_tx_queue_params *params)
2708{
2709 struct rt2x00_dev *rt2x00dev = hw->priv;
2710 struct data_queue *queue;
2711 struct rt2x00_field32 field;
2712 int retval;
2713 u32 reg;
2714 u32 offset;
2715
2716 /*
2717 * First pass the configuration through rt2x00lib, that will
2718 * update the queue settings and validate the input. After that
2719 * we are free to update the registers based on the value
2720 * in the queue parameter.
2721 */
2722 retval = rt2x00mac_conf_tx(hw, queue_idx, params);
2723 if (retval)
2724 return retval;
2725
2726 /*
2727 * We only need to perform additional register initialization
2728 * for WMM queues/
2729 */
2730 if (queue_idx >= 4)
2731 return 0;
2732
2733 queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
2734
2735 /* Update WMM TXOP register */
2736 offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
2737 field.bit_offset = (queue_idx & 1) * 16;
2738 field.bit_mask = 0xffff << field.bit_offset;
2739
2740 rt2x00usb_register_read(rt2x00dev, offset, &reg);
2741 rt2x00_set_field32(&reg, field, queue->txop);
2742 rt2x00usb_register_write(rt2x00dev, offset, reg);
2743
2744 /* Update WMM registers */
2745 field.bit_offset = queue_idx * 4;
2746 field.bit_mask = 0xf << field.bit_offset;
2747
2748 rt2x00usb_register_read(rt2x00dev, WMM_AIFSN_CFG, &reg);
2749 rt2x00_set_field32(&reg, field, queue->aifs);
2750 rt2x00usb_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
2751
2752 rt2x00usb_register_read(rt2x00dev, WMM_CWMIN_CFG, &reg);
2753 rt2x00_set_field32(&reg, field, queue->cw_min);
2754 rt2x00usb_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
2755
2756 rt2x00usb_register_read(rt2x00dev, WMM_CWMAX_CFG, &reg);
2757 rt2x00_set_field32(&reg, field, queue->cw_max);
2758 rt2x00usb_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
2759
2760 /* Update EDCA registers */
2761 offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
2762
2763 rt2x00usb_register_read(rt2x00dev, offset, &reg);
2764 rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop);
2765 rt2x00_set_field32(&reg, EDCA_AC0_CFG_AIFSN, queue->aifs);
2766 rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMIN, queue->cw_min);
2767 rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMAX, queue->cw_max);
2768 rt2x00usb_register_write(rt2x00dev, offset, reg);
2769
2770 return 0;
2771}
2772
2773static u64 rt2800usb_get_tsf(struct ieee80211_hw *hw)
2774{
2775 struct rt2x00_dev *rt2x00dev = hw->priv;
2776 u64 tsf;
2777 u32 reg;
2778
2779 rt2x00usb_register_read(rt2x00dev, TSF_TIMER_DW1, &reg);
2780 tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
2781 rt2x00usb_register_read(rt2x00dev, TSF_TIMER_DW0, &reg);
2782 tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
2783
2784 return tsf;
2785}
2786
2787static const struct ieee80211_ops rt2800usb_mac80211_ops = {
2788 .tx = rt2x00mac_tx,
2789 .start = rt2x00mac_start,
2790 .stop = rt2x00mac_stop,
2791 .add_interface = rt2x00mac_add_interface,
2792 .remove_interface = rt2x00mac_remove_interface,
2793 .config = rt2x00mac_config,
2794 .configure_filter = rt2x00mac_configure_filter,
2795 .set_key = rt2x00mac_set_key,
2796 .get_stats = rt2x00mac_get_stats,
2797 .get_tkip_seq = rt2800usb_get_tkip_seq,
2798 .set_rts_threshold = rt2800usb_set_rts_threshold,
2799 .bss_info_changed = rt2x00mac_bss_info_changed,
2800 .conf_tx = rt2800usb_conf_tx,
2801 .get_tx_stats = rt2x00mac_get_tx_stats,
2802 .get_tsf = rt2800usb_get_tsf,
2803};
2804
2805static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
2806 .probe_hw = rt2800usb_probe_hw,
2807 .get_firmware_name = rt2800usb_get_firmware_name,
2808 .check_firmware = rt2800usb_check_firmware,
2809 .load_firmware = rt2800usb_load_firmware,
2810 .initialize = rt2x00usb_initialize,
2811 .uninitialize = rt2x00usb_uninitialize,
2812 .clear_entry = rt2x00usb_clear_entry,
2813 .set_device_state = rt2800usb_set_device_state,
2814 .rfkill_poll = rt2800usb_rfkill_poll,
2815 .link_stats = rt2800usb_link_stats,
2816 .reset_tuner = rt2800usb_reset_tuner,
2817 .link_tuner = rt2800usb_link_tuner,
2818 .write_tx_desc = rt2800usb_write_tx_desc,
2819 .write_tx_data = rt2x00usb_write_tx_data,
2820 .write_beacon = rt2800usb_write_beacon,
2821 .get_tx_data_len = rt2800usb_get_tx_data_len,
2822 .kick_tx_queue = rt2800usb_kick_tx_queue,
2823 .kill_tx_queue = rt2x00usb_kill_tx_queue,
2824 .fill_rxdone = rt2800usb_fill_rxdone,
2825 .config_shared_key = rt2800usb_config_shared_key,
2826 .config_pairwise_key = rt2800usb_config_pairwise_key,
2827 .config_filter = rt2800usb_config_filter,
2828 .config_intf = rt2800usb_config_intf,
2829 .config_erp = rt2800usb_config_erp,
2830 .config_ant = rt2800usb_config_ant,
2831 .config = rt2800usb_config,
2832};
2833
2834static const struct data_queue_desc rt2800usb_queue_rx = {
2835 .entry_num = RX_ENTRIES,
2836 .data_size = AGGREGATION_SIZE,
2837 .desc_size = RXD_DESC_SIZE + RXWI_DESC_SIZE,
2838 .priv_size = sizeof(struct queue_entry_priv_usb),
2839};
2840
2841static const struct data_queue_desc rt2800usb_queue_tx = {
2842 .entry_num = TX_ENTRIES,
2843 .data_size = AGGREGATION_SIZE,
2844 .desc_size = TXINFO_DESC_SIZE + TXWI_DESC_SIZE,
2845 .priv_size = sizeof(struct queue_entry_priv_usb),
2846};
2847
2848static const struct data_queue_desc rt2800usb_queue_bcn = {
2849 .entry_num = 8 * BEACON_ENTRIES,
2850 .data_size = MGMT_FRAME_SIZE,
2851 .desc_size = TXINFO_DESC_SIZE + TXWI_DESC_SIZE,
2852 .priv_size = sizeof(struct queue_entry_priv_usb),
2853};
2854
2855static const struct rt2x00_ops rt2800usb_ops = {
2856 .name = KBUILD_MODNAME,
2857 .max_sta_intf = 1,
2858 .max_ap_intf = 8,
2859 .eeprom_size = EEPROM_SIZE,
2860 .rf_size = RF_SIZE,
2861 .tx_queues = NUM_TX_QUEUES,
2862 .rx = &rt2800usb_queue_rx,
2863 .tx = &rt2800usb_queue_tx,
2864 .bcn = &rt2800usb_queue_bcn,
2865 .lib = &rt2800usb_rt2x00_ops,
2866 .hw = &rt2800usb_mac80211_ops,
2867#ifdef CONFIG_RT2X00_LIB_DEBUGFS
2868 .debugfs = &rt2800usb_rt2x00debug,
2869#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2870};
2871
2872/*
2873 * rt2800usb module information.
2874 */
2875static struct usb_device_id rt2800usb_device_table[] = {
2876 /* Abocom */
2877 { USB_DEVICE(0x07b8, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
2878 { USB_DEVICE(0x07b8, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
2879 { USB_DEVICE(0x07b8, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
2880 { USB_DEVICE(0x07b8, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
2881 { USB_DEVICE(0x07b8, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
2882 { USB_DEVICE(0x1482, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
2883 /* AirTies */
2884 { USB_DEVICE(0x1eda, 0x2310), USB_DEVICE_DATA(&rt2800usb_ops) },
2885 /* Amigo */
2886 { USB_DEVICE(0x0e0b, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) },
2887 { USB_DEVICE(0x0e0b, 0x9041), USB_DEVICE_DATA(&rt2800usb_ops) },
2888 /* Amit */
2889 { USB_DEVICE(0x15c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) },
2890 /* ASUS */
2891 { USB_DEVICE(0x0b05, 0x1731), USB_DEVICE_DATA(&rt2800usb_ops) },
2892 { USB_DEVICE(0x0b05, 0x1732), USB_DEVICE_DATA(&rt2800usb_ops) },
2893 { USB_DEVICE(0x0b05, 0x1742), USB_DEVICE_DATA(&rt2800usb_ops) },
2894 { USB_DEVICE(0x0b05, 0x1760), USB_DEVICE_DATA(&rt2800usb_ops) },
2895 { USB_DEVICE(0x0b05, 0x1761), USB_DEVICE_DATA(&rt2800usb_ops) },
2896 /* AzureWave */
2897 { USB_DEVICE(0x13d3, 0x3247), USB_DEVICE_DATA(&rt2800usb_ops) },
2898 { USB_DEVICE(0x13d3, 0x3262), USB_DEVICE_DATA(&rt2800usb_ops) },
2899 { USB_DEVICE(0x13d3, 0x3273), USB_DEVICE_DATA(&rt2800usb_ops) },
2900 { USB_DEVICE(0x13d3, 0x3284), USB_DEVICE_DATA(&rt2800usb_ops) },
2901 /* Belkin */
2902 { USB_DEVICE(0x050d, 0x8053), USB_DEVICE_DATA(&rt2800usb_ops) },
2903 { USB_DEVICE(0x050d, 0x805c), USB_DEVICE_DATA(&rt2800usb_ops) },
2904 { USB_DEVICE(0x050d, 0x815c), USB_DEVICE_DATA(&rt2800usb_ops) },
2905 { USB_DEVICE(0x050d, 0x825a), USB_DEVICE_DATA(&rt2800usb_ops) },
2906 /* Buffalo */
2907 { USB_DEVICE(0x0411, 0x00e8), USB_DEVICE_DATA(&rt2800usb_ops) },
2908 { USB_DEVICE(0x0411, 0x012e), USB_DEVICE_DATA(&rt2800usb_ops) },
2909 /* Conceptronic */
2910 { USB_DEVICE(0x14b2, 0x3c06), USB_DEVICE_DATA(&rt2800usb_ops) },
2911 { USB_DEVICE(0x14b2, 0x3c07), USB_DEVICE_DATA(&rt2800usb_ops) },
2912 { USB_DEVICE(0x14b2, 0x3c08), USB_DEVICE_DATA(&rt2800usb_ops) },
2913 { USB_DEVICE(0x14b2, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
2914 { USB_DEVICE(0x14b2, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) },
2915 { USB_DEVICE(0x14b2, 0x3c12), USB_DEVICE_DATA(&rt2800usb_ops) },
2916 { USB_DEVICE(0x14b2, 0x3c23), USB_DEVICE_DATA(&rt2800usb_ops) },
2917 { USB_DEVICE(0x14b2, 0x3c25), USB_DEVICE_DATA(&rt2800usb_ops) },
2918 { USB_DEVICE(0x14b2, 0x3c27), USB_DEVICE_DATA(&rt2800usb_ops) },
2919 { USB_DEVICE(0x14b2, 0x3c28), USB_DEVICE_DATA(&rt2800usb_ops) },
2920 /* Corega */
2921 { USB_DEVICE(0x07aa, 0x002f), USB_DEVICE_DATA(&rt2800usb_ops) },
2922 { USB_DEVICE(0x07aa, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) },
2923 { USB_DEVICE(0x07aa, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) },
2924 { USB_DEVICE(0x18c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) },
2925 { USB_DEVICE(0x18c5, 0x0012), USB_DEVICE_DATA(&rt2800usb_ops) },
2926 /* D-Link */
2927 { USB_DEVICE(0x07d1, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
2928 { USB_DEVICE(0x07d1, 0x3c0a), USB_DEVICE_DATA(&rt2800usb_ops) },
2929 { USB_DEVICE(0x07d1, 0x3c0b), USB_DEVICE_DATA(&rt2800usb_ops) },
2930 { USB_DEVICE(0x07d1, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) },
2931 { USB_DEVICE(0x07d1, 0x3c13), USB_DEVICE_DATA(&rt2800usb_ops) },
2932 /* Edimax */
2933 { USB_DEVICE(0x7392, 0x7711), USB_DEVICE_DATA(&rt2800usb_ops) },
2934 { USB_DEVICE(0x7392, 0x7717), USB_DEVICE_DATA(&rt2800usb_ops) },
2935 { USB_DEVICE(0x7392, 0x7718), USB_DEVICE_DATA(&rt2800usb_ops) },
2936 /* EnGenius */
2937 { USB_DEVICE(0X1740, 0x9701), USB_DEVICE_DATA(&rt2800usb_ops) },
2938 { USB_DEVICE(0x1740, 0x9702), USB_DEVICE_DATA(&rt2800usb_ops) },
2939 { USB_DEVICE(0x1740, 0x9703), USB_DEVICE_DATA(&rt2800usb_ops) },
2940 { USB_DEVICE(0x1740, 0x9705), USB_DEVICE_DATA(&rt2800usb_ops) },
2941 { USB_DEVICE(0x1740, 0x9706), USB_DEVICE_DATA(&rt2800usb_ops) },
2942 { USB_DEVICE(0x1740, 0x9801), USB_DEVICE_DATA(&rt2800usb_ops) },
2943 /* Gemtek */
2944 { USB_DEVICE(0x15a9, 0x0010), USB_DEVICE_DATA(&rt2800usb_ops) },
2945 /* Gigabyte */
2946 { USB_DEVICE(0x1044, 0x800b), USB_DEVICE_DATA(&rt2800usb_ops) },
2947 { USB_DEVICE(0x1044, 0x800c), USB_DEVICE_DATA(&rt2800usb_ops) },
2948 { USB_DEVICE(0x1044, 0x800d), USB_DEVICE_DATA(&rt2800usb_ops) },
2949 /* Hawking */
2950 { USB_DEVICE(0x0e66, 0x0001), USB_DEVICE_DATA(&rt2800usb_ops) },
2951 { USB_DEVICE(0x0e66, 0x0003), USB_DEVICE_DATA(&rt2800usb_ops) },
2952 { USB_DEVICE(0x0e66, 0x0009), USB_DEVICE_DATA(&rt2800usb_ops) },
2953 { USB_DEVICE(0x0e66, 0x000b), USB_DEVICE_DATA(&rt2800usb_ops) },
2954 /* LevelOne */
2955 { USB_DEVICE(0x1740, 0x0605), USB_DEVICE_DATA(&rt2800usb_ops) },
2956 { USB_DEVICE(0x1740, 0x0615), USB_DEVICE_DATA(&rt2800usb_ops) },
2957 /* Linksys */
2958 { USB_DEVICE(0x1737, 0x0070), USB_DEVICE_DATA(&rt2800usb_ops) },
2959 { USB_DEVICE(0x1737, 0x0071), USB_DEVICE_DATA(&rt2800usb_ops) },
2960 { USB_DEVICE(0x1737, 0x0077), USB_DEVICE_DATA(&rt2800usb_ops) },
2961 /* Logitec */
2962 { USB_DEVICE(0x0789, 0x0162), USB_DEVICE_DATA(&rt2800usb_ops) },
2963 { USB_DEVICE(0x0789, 0x0163), USB_DEVICE_DATA(&rt2800usb_ops) },
2964 { USB_DEVICE(0x0789, 0x0164), USB_DEVICE_DATA(&rt2800usb_ops) },
2965 /* Motorola */
2966 { USB_DEVICE(0x100d, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) },
2967 { USB_DEVICE(0x100d, 0x9032), USB_DEVICE_DATA(&rt2800usb_ops) },
2968 /* Ovislink */
2969 { USB_DEVICE(0x1b75, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
2970 /* Pegatron */
2971 { USB_DEVICE(0x1d4d, 0x0002), USB_DEVICE_DATA(&rt2800usb_ops) },
2972 { USB_DEVICE(0x1d4d, 0x000c), USB_DEVICE_DATA(&rt2800usb_ops) },
2973 /* Philips */
2974 { USB_DEVICE(0x0471, 0x200f), USB_DEVICE_DATA(&rt2800usb_ops) },
2975 /* Planex */
2976 { USB_DEVICE(0x2019, 0xed06), USB_DEVICE_DATA(&rt2800usb_ops) },
2977 { USB_DEVICE(0x2019, 0xab24), USB_DEVICE_DATA(&rt2800usb_ops) },
2978 { USB_DEVICE(0x2019, 0xab25), USB_DEVICE_DATA(&rt2800usb_ops) },
2979 /* Qcom */
2980 { USB_DEVICE(0x18e8, 0x6259), USB_DEVICE_DATA(&rt2800usb_ops) },
2981 /* Quanta */
2982 { USB_DEVICE(0x1a32, 0x0304), USB_DEVICE_DATA(&rt2800usb_ops) },
2983 /* Ralink */
2984 { USB_DEVICE(0x0db0, 0x6899), USB_DEVICE_DATA(&rt2800usb_ops) },
2985 { USB_DEVICE(0x148f, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) },
2986 { USB_DEVICE(0x148f, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
2987 { USB_DEVICE(0x148f, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
2988 { USB_DEVICE(0x148f, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
2989 { USB_DEVICE(0x148f, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
2990 { USB_DEVICE(0x148f, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
2991 { USB_DEVICE(0x148f, 0x3572), USB_DEVICE_DATA(&rt2800usb_ops) },
2992 /* Samsung */
2993 { USB_DEVICE(0x04e8, 0x2018), USB_DEVICE_DATA(&rt2800usb_ops) },
2994 /* Siemens */
2995 { USB_DEVICE(0x129b, 0x1828), USB_DEVICE_DATA(&rt2800usb_ops) },
2996 /* Sitecom */
2997 { USB_DEVICE(0x0df6, 0x0017), USB_DEVICE_DATA(&rt2800usb_ops) },
2998 { USB_DEVICE(0x0df6, 0x002b), USB_DEVICE_DATA(&rt2800usb_ops) },
2999 { USB_DEVICE(0x0df6, 0x002c), USB_DEVICE_DATA(&rt2800usb_ops) },
3000 { USB_DEVICE(0x0df6, 0x002d), USB_DEVICE_DATA(&rt2800usb_ops) },
3001 { USB_DEVICE(0x0df6, 0x0039), USB_DEVICE_DATA(&rt2800usb_ops) },
3002 { USB_DEVICE(0x0df6, 0x003b), USB_DEVICE_DATA(&rt2800usb_ops) },
3003 { USB_DEVICE(0x0df6, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) },
3004 { USB_DEVICE(0x0df6, 0x003d), USB_DEVICE_DATA(&rt2800usb_ops) },
3005 { USB_DEVICE(0x0df6, 0x003e), USB_DEVICE_DATA(&rt2800usb_ops) },
3006 { USB_DEVICE(0x0df6, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) },
3007 { USB_DEVICE(0x0df6, 0x0040), USB_DEVICE_DATA(&rt2800usb_ops) },
3008 /* SMC */
3009 { USB_DEVICE(0x083a, 0x6618), USB_DEVICE_DATA(&rt2800usb_ops) },
3010 { USB_DEVICE(0x083a, 0x7511), USB_DEVICE_DATA(&rt2800usb_ops) },
3011 { USB_DEVICE(0x083a, 0x7512), USB_DEVICE_DATA(&rt2800usb_ops) },
3012 { USB_DEVICE(0x083a, 0x7522), USB_DEVICE_DATA(&rt2800usb_ops) },
3013 { USB_DEVICE(0x083a, 0x8522), USB_DEVICE_DATA(&rt2800usb_ops) },
3014 { USB_DEVICE(0x083a, 0xa512), USB_DEVICE_DATA(&rt2800usb_ops) },
3015 { USB_DEVICE(0x083a, 0xa618), USB_DEVICE_DATA(&rt2800usb_ops) },
3016 { USB_DEVICE(0x083a, 0xb522), USB_DEVICE_DATA(&rt2800usb_ops) },
3017 { USB_DEVICE(0x083a, 0xc522), USB_DEVICE_DATA(&rt2800usb_ops) },
3018 /* Sparklan */
3019 { USB_DEVICE(0x15a9, 0x0006), USB_DEVICE_DATA(&rt2800usb_ops) },
3020 /* Sweex */
3021 { USB_DEVICE(0x177f, 0x0153), USB_DEVICE_DATA(&rt2800usb_ops) },
3022 { USB_DEVICE(0x177f, 0x0302), USB_DEVICE_DATA(&rt2800usb_ops) },
3023 { USB_DEVICE(0x177f, 0x0313), USB_DEVICE_DATA(&rt2800usb_ops) },
3024 /* U-Media*/
3025 { USB_DEVICE(0x157e, 0x300e), USB_DEVICE_DATA(&rt2800usb_ops) },
3026 /* ZCOM */
3027 { USB_DEVICE(0x0cde, 0x0022), USB_DEVICE_DATA(&rt2800usb_ops) },
3028 { USB_DEVICE(0x0cde, 0x0025), USB_DEVICE_DATA(&rt2800usb_ops) },
3029 /* Zinwell */
3030 { USB_DEVICE(0x5a57, 0x0280), USB_DEVICE_DATA(&rt2800usb_ops) },
3031 { USB_DEVICE(0x5a57, 0x0282), USB_DEVICE_DATA(&rt2800usb_ops) },
3032 /* Zyxel */
3033 { USB_DEVICE(0x0586, 0x3416), USB_DEVICE_DATA(&rt2800usb_ops) },
3034 { USB_DEVICE(0x0586, 0x341a), USB_DEVICE_DATA(&rt2800usb_ops) },
3035 { 0, }
3036};
3037
3038MODULE_AUTHOR(DRV_PROJECT);
3039MODULE_VERSION(DRV_VERSION);
3040MODULE_DESCRIPTION("Ralink RT2800 USB Wireless LAN driver.");
3041MODULE_SUPPORTED_DEVICE("Ralink RT2870 USB chipset based cards");
3042MODULE_DEVICE_TABLE(usb, rt2800usb_device_table);
3043MODULE_FIRMWARE(FIRMWARE_RT2870);
3044MODULE_LICENSE("GPL");
3045
3046static struct usb_driver rt2800usb_driver = {
3047 .name = KBUILD_MODNAME,
3048 .id_table = rt2800usb_device_table,
3049 .probe = rt2x00usb_probe,
3050 .disconnect = rt2x00usb_disconnect,
3051 .suspend = rt2x00usb_suspend,
3052 .resume = rt2x00usb_resume,
3053};
3054
3055static int __init rt2800usb_init(void)
3056{
3057 return usb_register(&rt2800usb_driver);
3058}
3059
3060static void __exit rt2800usb_exit(void)
3061{
3062 usb_deregister(&rt2800usb_driver);
3063}
3064
3065module_init(rt2800usb_init);
3066module_exit(rt2800usb_exit);
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.h b/drivers/net/wireless/rt2x00/rt2800usb.h
new file mode 100644
index 000000000000..61a8be61d3f5
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800usb.h
@@ -0,0 +1,1945 @@
1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2800usb
23 Abstract: Data structures and registers for the rt2800usb module.
24 Supported chipsets: RT2800U.
25 */
26
27#ifndef RT2800USB_H
28#define RT2800USB_H
29
30/*
31 * RF chip defines.
32 *
33 * RF2820 2.4G 2T3R
34 * RF2850 2.4G/5G 2T3R
35 * RF2720 2.4G 1T2R
36 * RF2750 2.4G/5G 1T2R
37 * RF3020 2.4G 1T1R
38 * RF2020 2.4G B/G
39 */
40#define RF2820 0x0001
41#define RF2850 0x0002
42#define RF2720 0x0003
43#define RF2750 0x0004
44#define RF3020 0x0005
45#define RF2020 0x0006
46
47/*
48 * RT2870 version
49 */
50#define RT2860C_VERSION 0x28600100
51#define RT2860D_VERSION 0x28600101
52#define RT2880E_VERSION 0x28720200
53#define RT2883_VERSION 0x28830300
54#define RT3070_VERSION 0x30700200
55
56/*
57 * Signal information.
58 * Defaul offset is required for RSSI <-> dBm conversion.
59 */
60#define DEFAULT_RSSI_OFFSET 120 /* FIXME */
61
62/*
63 * Register layout information.
64 */
65#define CSR_REG_BASE 0x1000
66#define CSR_REG_SIZE 0x0800
67#define EEPROM_BASE 0x0000
68#define EEPROM_SIZE 0x0110
69#define BBP_BASE 0x0000
70#define BBP_SIZE 0x0080
71#define RF_BASE 0x0004
72#define RF_SIZE 0x0010
73
74/*
75 * Number of TX queues.
76 */
77#define NUM_TX_QUEUES 4
78
79/*
80 * USB registers.
81 */
82
83/*
84 * HOST-MCU shared memory
85 */
86#define HOST_CMD_CSR 0x0404
87#define HOST_CMD_CSR_HOST_COMMAND FIELD32(0x000000ff)
88
89/*
90 * INT_SOURCE_CSR: Interrupt source register.
91 * Write one to clear corresponding bit.
92 * TX_FIFO_STATUS: FIFO Statistics is full, sw should read 0x171c
93 */
94#define INT_SOURCE_CSR 0x0200
95#define INT_SOURCE_CSR_RXDELAYINT FIELD32(0x00000001)
96#define INT_SOURCE_CSR_TXDELAYINT FIELD32(0x00000002)
97#define INT_SOURCE_CSR_RX_DONE FIELD32(0x00000004)
98#define INT_SOURCE_CSR_AC0_DMA_DONE FIELD32(0x00000008)
99#define INT_SOURCE_CSR_AC1_DMA_DONE FIELD32(0x00000010)
100#define INT_SOURCE_CSR_AC2_DMA_DONE FIELD32(0x00000020)
101#define INT_SOURCE_CSR_AC3_DMA_DONE FIELD32(0x00000040)
102#define INT_SOURCE_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
103#define INT_SOURCE_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
104#define INT_SOURCE_CSR_MCU_COMMAND FIELD32(0x00000200)
105#define INT_SOURCE_CSR_RXTX_COHERENT FIELD32(0x00000400)
106#define INT_SOURCE_CSR_TBTT FIELD32(0x00000800)
107#define INT_SOURCE_CSR_PRE_TBTT FIELD32(0x00001000)
108#define INT_SOURCE_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
109#define INT_SOURCE_CSR_AUTO_WAKEUP FIELD32(0x00004000)
110#define INT_SOURCE_CSR_GPTIMER FIELD32(0x00008000)
111#define INT_SOURCE_CSR_RX_COHERENT FIELD32(0x00010000)
112#define INT_SOURCE_CSR_TX_COHERENT FIELD32(0x00020000)
113
114/*
115 * INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF.
116 */
117#define INT_MASK_CSR 0x0204
118#define INT_MASK_CSR_RXDELAYINT FIELD32(0x00000001)
119#define INT_MASK_CSR_TXDELAYINT FIELD32(0x00000002)
120#define INT_MASK_CSR_RX_DONE FIELD32(0x00000004)
121#define INT_MASK_CSR_AC0_DMA_DONE FIELD32(0x00000008)
122#define INT_MASK_CSR_AC1_DMA_DONE FIELD32(0x00000010)
123#define INT_MASK_CSR_AC2_DMA_DONE FIELD32(0x00000020)
124#define INT_MASK_CSR_AC3_DMA_DONE FIELD32(0x00000040)
125#define INT_MASK_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
126#define INT_MASK_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
127#define INT_MASK_CSR_MCU_COMMAND FIELD32(0x00000200)
128#define INT_MASK_CSR_RXTX_COHERENT FIELD32(0x00000400)
129#define INT_MASK_CSR_TBTT FIELD32(0x00000800)
130#define INT_MASK_CSR_PRE_TBTT FIELD32(0x00001000)
131#define INT_MASK_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
132#define INT_MASK_CSR_AUTO_WAKEUP FIELD32(0x00004000)
133#define INT_MASK_CSR_GPTIMER FIELD32(0x00008000)
134#define INT_MASK_CSR_RX_COHERENT FIELD32(0x00010000)
135#define INT_MASK_CSR_TX_COHERENT FIELD32(0x00020000)
136
137/*
138 * WPDMA_GLO_CFG
139 */
140#define WPDMA_GLO_CFG 0x0208
141#define WPDMA_GLO_CFG_ENABLE_TX_DMA FIELD32(0x00000001)
142#define WPDMA_GLO_CFG_TX_DMA_BUSY FIELD32(0x00000002)
143#define WPDMA_GLO_CFG_ENABLE_RX_DMA FIELD32(0x00000004)
144#define WPDMA_GLO_CFG_RX_DMA_BUSY FIELD32(0x00000008)
145#define WPDMA_GLO_CFG_WP_DMA_BURST_SIZE FIELD32(0x00000030)
146#define WPDMA_GLO_CFG_TX_WRITEBACK_DONE FIELD32(0x00000040)
147#define WPDMA_GLO_CFG_BIG_ENDIAN FIELD32(0x00000080)
148#define WPDMA_GLO_CFG_RX_HDR_SCATTER FIELD32(0x0000ff00)
149#define WPDMA_GLO_CFG_HDR_SEG_LEN FIELD32(0xffff0000)
150
151/*
152 * WPDMA_RST_IDX
153 */
154#define WPDMA_RST_IDX 0x020c
155#define WPDMA_RST_IDX_DTX_IDX0 FIELD32(0x00000001)
156#define WPDMA_RST_IDX_DTX_IDX1 FIELD32(0x00000002)
157#define WPDMA_RST_IDX_DTX_IDX2 FIELD32(0x00000004)
158#define WPDMA_RST_IDX_DTX_IDX3 FIELD32(0x00000008)
159#define WPDMA_RST_IDX_DTX_IDX4 FIELD32(0x00000010)
160#define WPDMA_RST_IDX_DTX_IDX5 FIELD32(0x00000020)
161#define WPDMA_RST_IDX_DRX_IDX0 FIELD32(0x00010000)
162
163/*
164 * DELAY_INT_CFG
165 */
166#define DELAY_INT_CFG 0x0210
167#define DELAY_INT_CFG_RXMAX_PTIME FIELD32(0x000000ff)
168#define DELAY_INT_CFG_RXMAX_PINT FIELD32(0x00007f00)
169#define DELAY_INT_CFG_RXDLY_INT_EN FIELD32(0x00008000)
170#define DELAY_INT_CFG_TXMAX_PTIME FIELD32(0x00ff0000)
171#define DELAY_INT_CFG_TXMAX_PINT FIELD32(0x7f000000)
172#define DELAY_INT_CFG_TXDLY_INT_EN FIELD32(0x80000000)
173
174/*
175 * WMM_AIFSN_CFG: Aifsn for each EDCA AC
176 * AIFSN0: AC_BE
177 * AIFSN1: AC_BK
178 * AIFSN1: AC_VI
179 * AIFSN1: AC_VO
180 */
181#define WMM_AIFSN_CFG 0x0214
182#define WMM_AIFSN_CFG_AIFSN0 FIELD32(0x0000000f)
183#define WMM_AIFSN_CFG_AIFSN1 FIELD32(0x000000f0)
184#define WMM_AIFSN_CFG_AIFSN2 FIELD32(0x00000f00)
185#define WMM_AIFSN_CFG_AIFSN3 FIELD32(0x0000f000)
186
187/*
188 * WMM_CWMIN_CSR: CWmin for each EDCA AC
189 * CWMIN0: AC_BE
190 * CWMIN1: AC_BK
191 * CWMIN1: AC_VI
192 * CWMIN1: AC_VO
193 */
194#define WMM_CWMIN_CFG 0x0218
195#define WMM_CWMIN_CFG_CWMIN0 FIELD32(0x0000000f)
196#define WMM_CWMIN_CFG_CWMIN1 FIELD32(0x000000f0)
197#define WMM_CWMIN_CFG_CWMIN2 FIELD32(0x00000f00)
198#define WMM_CWMIN_CFG_CWMIN3 FIELD32(0x0000f000)
199
200/*
201 * WMM_CWMAX_CSR: CWmax for each EDCA AC
202 * CWMAX0: AC_BE
203 * CWMAX1: AC_BK
204 * CWMAX1: AC_VI
205 * CWMAX1: AC_VO
206 */
207#define WMM_CWMAX_CFG 0x021c
208#define WMM_CWMAX_CFG_CWMAX0 FIELD32(0x0000000f)
209#define WMM_CWMAX_CFG_CWMAX1 FIELD32(0x000000f0)
210#define WMM_CWMAX_CFG_CWMAX2 FIELD32(0x00000f00)
211#define WMM_CWMAX_CFG_CWMAX3 FIELD32(0x0000f000)
212
213/*
214 * AC_TXOP0: AC_BK/AC_BE TXOP register
215 * AC0TXOP: AC_BK in unit of 32us
216 * AC1TXOP: AC_BE in unit of 32us
217 */
218#define WMM_TXOP0_CFG 0x0220
219#define WMM_TXOP0_CFG_AC0TXOP FIELD32(0x0000ffff)
220#define WMM_TXOP0_CFG_AC1TXOP FIELD32(0xffff0000)
221
222/*
223 * AC_TXOP1: AC_VO/AC_VI TXOP register
224 * AC2TXOP: AC_VI in unit of 32us
225 * AC3TXOP: AC_VO in unit of 32us
226 */
227#define WMM_TXOP1_CFG 0x0224
228#define WMM_TXOP1_CFG_AC2TXOP FIELD32(0x0000ffff)
229#define WMM_TXOP1_CFG_AC3TXOP FIELD32(0xffff0000)
230
231/*
232 * GPIO_CTRL_CFG:
233 */
234#define GPIO_CTRL_CFG 0x0228
235#define GPIO_CTRL_CFG_BIT0 FIELD32(0x00000001)
236#define GPIO_CTRL_CFG_BIT1 FIELD32(0x00000002)
237#define GPIO_CTRL_CFG_BIT2 FIELD32(0x00000004)
238#define GPIO_CTRL_CFG_BIT3 FIELD32(0x00000008)
239#define GPIO_CTRL_CFG_BIT4 FIELD32(0x00000010)
240#define GPIO_CTRL_CFG_BIT5 FIELD32(0x00000020)
241#define GPIO_CTRL_CFG_BIT6 FIELD32(0x00000040)
242#define GPIO_CTRL_CFG_BIT7 FIELD32(0x00000080)
243#define GPIO_CTRL_CFG_BIT8 FIELD32(0x00000100)
244
245/*
246 * MCU_CMD_CFG
247 */
248#define MCU_CMD_CFG 0x022c
249
250/*
251 * AC_BK register offsets
252 */
253#define TX_BASE_PTR0 0x0230
254#define TX_MAX_CNT0 0x0234
255#define TX_CTX_IDX0 0x0238
256#define TX_DTX_IDX0 0x023c
257
258/*
259 * AC_BE register offsets
260 */
261#define TX_BASE_PTR1 0x0240
262#define TX_MAX_CNT1 0x0244
263#define TX_CTX_IDX1 0x0248
264#define TX_DTX_IDX1 0x024c
265
266/*
267 * AC_VI register offsets
268 */
269#define TX_BASE_PTR2 0x0250
270#define TX_MAX_CNT2 0x0254
271#define TX_CTX_IDX2 0x0258
272#define TX_DTX_IDX2 0x025c
273
274/*
275 * AC_VO register offsets
276 */
277#define TX_BASE_PTR3 0x0260
278#define TX_MAX_CNT3 0x0264
279#define TX_CTX_IDX3 0x0268
280#define TX_DTX_IDX3 0x026c
281
282/*
283 * HCCA register offsets
284 */
285#define TX_BASE_PTR4 0x0270
286#define TX_MAX_CNT4 0x0274
287#define TX_CTX_IDX4 0x0278
288#define TX_DTX_IDX4 0x027c
289
290/*
291 * MGMT register offsets
292 */
293#define TX_BASE_PTR5 0x0280
294#define TX_MAX_CNT5 0x0284
295#define TX_CTX_IDX5 0x0288
296#define TX_DTX_IDX5 0x028c
297
298/*
299 * RX register offsets
300 */
301#define RX_BASE_PTR 0x0290
302#define RX_MAX_CNT 0x0294
303#define RX_CRX_IDX 0x0298
304#define RX_DRX_IDX 0x029c
305
306/*
307 * USB_DMA_CFG
308 * RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns.
309 * RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes.
310 * PHY_CLEAR: phy watch dog enable.
311 * TX_CLEAR: Clear USB DMA TX path.
312 * TXOP_HALT: Halt TXOP count down when TX buffer is full.
313 * RX_BULK_AGG_EN: Enable Rx Bulk Aggregation.
314 * RX_BULK_EN: Enable USB DMA Rx.
315 * TX_BULK_EN: Enable USB DMA Tx.
316 * EP_OUT_VALID: OUT endpoint data valid.
317 * RX_BUSY: USB DMA RX FSM busy.
318 * TX_BUSY: USB DMA TX FSM busy.
319 */
320#define USB_DMA_CFG 0x02a0
321#define USB_DMA_CFG_RX_BULK_AGG_TIMEOUT FIELD32(0x000000ff)
322#define USB_DMA_CFG_RX_BULK_AGG_LIMIT FIELD32(0x0000ff00)
323#define USB_DMA_CFG_PHY_CLEAR FIELD32(0x00010000)
324#define USB_DMA_CFG_TX_CLEAR FIELD32(0x00080000)
325#define USB_DMA_CFG_TXOP_HALT FIELD32(0x00100000)
326#define USB_DMA_CFG_RX_BULK_AGG_EN FIELD32(0x00200000)
327#define USB_DMA_CFG_RX_BULK_EN FIELD32(0x00400000)
328#define USB_DMA_CFG_TX_BULK_EN FIELD32(0x00800000)
329#define USB_DMA_CFG_EP_OUT_VALID FIELD32(0x3f000000)
330#define USB_DMA_CFG_RX_BUSY FIELD32(0x40000000)
331#define USB_DMA_CFG_TX_BUSY FIELD32(0x80000000)
332
333/*
334 * USB_CYC_CFG
335 */
336#define USB_CYC_CFG 0x02a4
337#define USB_CYC_CFG_CLOCK_CYCLE FIELD32(0x000000ff)
338
339/*
340 * PBF_SYS_CTRL
341 * HOST_RAM_WRITE: enable Host program ram write selection
342 */
343#define PBF_SYS_CTRL 0x0400
344#define PBF_SYS_CTRL_READY FIELD32(0x00000080)
345#define PBF_SYS_CTRL_HOST_RAM_WRITE FIELD32(0x00010000)
346
347/*
348 * PBF registers
349 * Most are for debug. Driver doesn't touch PBF register.
350 */
351#define PBF_CFG 0x0408
352#define PBF_MAX_PCNT 0x040c
353#define PBF_CTRL 0x0410
354#define PBF_INT_STA 0x0414
355#define PBF_INT_ENA 0x0418
356
357/*
358 * BCN_OFFSET0:
359 */
360#define BCN_OFFSET0 0x042c
361#define BCN_OFFSET0_BCN0 FIELD32(0x000000ff)
362#define BCN_OFFSET0_BCN1 FIELD32(0x0000ff00)
363#define BCN_OFFSET0_BCN2 FIELD32(0x00ff0000)
364#define BCN_OFFSET0_BCN3 FIELD32(0xff000000)
365
366/*
367 * BCN_OFFSET1:
368 */
369#define BCN_OFFSET1 0x0430
370#define BCN_OFFSET1_BCN4 FIELD32(0x000000ff)
371#define BCN_OFFSET1_BCN5 FIELD32(0x0000ff00)
372#define BCN_OFFSET1_BCN6 FIELD32(0x00ff0000)
373#define BCN_OFFSET1_BCN7 FIELD32(0xff000000)
374
375/*
376 * PBF registers
377 * Most are for debug. Driver doesn't touch PBF register.
378 */
379#define TXRXQ_PCNT 0x0438
380#define PBF_DBG 0x043c
381
382/*
383 * RF registers
384 */
385#define RF_CSR_CFG 0x0500
386#define RF_CSR_CFG_DATA FIELD32(0x000000ff)
387#define RF_CSR_CFG_REGNUM FIELD32(0x00001f00)
388#define RF_CSR_CFG_WRITE FIELD32(0x00010000)
389#define RF_CSR_CFG_BUSY FIELD32(0x00020000)
390
391/*
392 * MAC Control/Status Registers(CSR).
393 * Some values are set in TU, whereas 1 TU == 1024 us.
394 */
395
396/*
397 * MAC_CSR0: ASIC revision number.
398 * ASIC_REV: 0
399 * ASIC_VER: 2870
400 */
401#define MAC_CSR0 0x1000
402#define MAC_CSR0_ASIC_REV FIELD32(0x0000ffff)
403#define MAC_CSR0_ASIC_VER FIELD32(0xffff0000)
404
405/*
406 * MAC_SYS_CTRL:
407 */
408#define MAC_SYS_CTRL 0x1004
409#define MAC_SYS_CTRL_RESET_CSR FIELD32(0x00000001)
410#define MAC_SYS_CTRL_RESET_BBP FIELD32(0x00000002)
411#define MAC_SYS_CTRL_ENABLE_TX FIELD32(0x00000004)
412#define MAC_SYS_CTRL_ENABLE_RX FIELD32(0x00000008)
413#define MAC_SYS_CTRL_CONTINUOUS_TX FIELD32(0x00000010)
414#define MAC_SYS_CTRL_LOOPBACK FIELD32(0x00000020)
415#define MAC_SYS_CTRL_WLAN_HALT FIELD32(0x00000040)
416#define MAC_SYS_CTRL_RX_TIMESTAMP FIELD32(0x00000080)
417
418/*
419 * MAC_ADDR_DW0: STA MAC register 0
420 */
421#define MAC_ADDR_DW0 0x1008
422#define MAC_ADDR_DW0_BYTE0 FIELD32(0x000000ff)
423#define MAC_ADDR_DW0_BYTE1 FIELD32(0x0000ff00)
424#define MAC_ADDR_DW0_BYTE2 FIELD32(0x00ff0000)
425#define MAC_ADDR_DW0_BYTE3 FIELD32(0xff000000)
426
427/*
428 * MAC_ADDR_DW1: STA MAC register 1
429 * UNICAST_TO_ME_MASK:
430 * Used to mask off bits from byte 5 of the MAC address
431 * to determine the UNICAST_TO_ME bit for RX frames.
432 * The full mask is complemented by BSS_ID_MASK:
433 * MASK = BSS_ID_MASK & UNICAST_TO_ME_MASK
434 */
435#define MAC_ADDR_DW1 0x100c
436#define MAC_ADDR_DW1_BYTE4 FIELD32(0x000000ff)
437#define MAC_ADDR_DW1_BYTE5 FIELD32(0x0000ff00)
438#define MAC_ADDR_DW1_UNICAST_TO_ME_MASK FIELD32(0x00ff0000)
439
440/*
441 * MAC_BSSID_DW0: BSSID register 0
442 */
443#define MAC_BSSID_DW0 0x1010
444#define MAC_BSSID_DW0_BYTE0 FIELD32(0x000000ff)
445#define MAC_BSSID_DW0_BYTE1 FIELD32(0x0000ff00)
446#define MAC_BSSID_DW0_BYTE2 FIELD32(0x00ff0000)
447#define MAC_BSSID_DW0_BYTE3 FIELD32(0xff000000)
448
449/*
450 * MAC_BSSID_DW1: BSSID register 1
451 * BSS_ID_MASK:
452 * 0: 1-BSSID mode (BSS index = 0)
453 * 1: 2-BSSID mode (BSS index: Byte5, bit 0)
454 * 2: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
455 * 3: 8-BSSID mode (BSS index: byte5, bit 0 - 2)
456 * This mask is used to mask off bits 0, 1 and 2 of byte 5 of the
457 * BSSID. This will make sure that those bits will be ignored
458 * when determining the MY_BSS of RX frames.
459 */
460#define MAC_BSSID_DW1 0x1014
461#define MAC_BSSID_DW1_BYTE4 FIELD32(0x000000ff)
462#define MAC_BSSID_DW1_BYTE5 FIELD32(0x0000ff00)
463#define MAC_BSSID_DW1_BSS_ID_MASK FIELD32(0x00030000)
464#define MAC_BSSID_DW1_BSS_BCN_NUM FIELD32(0x001c0000)
465
466/*
467 * MAX_LEN_CFG: Maximum frame length register.
468 * MAX_MPDU: rt2860b max 16k bytes
469 * MAX_PSDU: Maximum PSDU length
470 * (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16
471 */
472#define MAX_LEN_CFG 0x1018
473#define MAX_LEN_CFG_MAX_MPDU FIELD32(0x00000fff)
474#define MAX_LEN_CFG_MAX_PSDU FIELD32(0x00003000)
475#define MAX_LEN_CFG_MIN_PSDU FIELD32(0x0000c000)
476#define MAX_LEN_CFG_MIN_MPDU FIELD32(0x000f0000)
477
478/*
479 * BBP_CSR_CFG: BBP serial control register
480 * VALUE: Register value to program into BBP
481 * REG_NUM: Selected BBP register
482 * READ_CONTROL: 0 write BBP, 1 read BBP
483 * BUSY: ASIC is busy executing BBP commands
484 * BBP_PAR_DUR: 0 4 MAC clocks, 1 8 MAC clocks
485 * BBP_RW_MODE: 0 serial, 1 paralell
486 */
487#define BBP_CSR_CFG 0x101c
488#define BBP_CSR_CFG_VALUE FIELD32(0x000000ff)
489#define BBP_CSR_CFG_REGNUM FIELD32(0x0000ff00)
490#define BBP_CSR_CFG_READ_CONTROL FIELD32(0x00010000)
491#define BBP_CSR_CFG_BUSY FIELD32(0x00020000)
492#define BBP_CSR_CFG_BBP_PAR_DUR FIELD32(0x00040000)
493#define BBP_CSR_CFG_BBP_RW_MODE FIELD32(0x00080000)
494
495/*
496 * RF_CSR_CFG0: RF control register
497 * REGID_AND_VALUE: Register value to program into RF
498 * BITWIDTH: Selected RF register
499 * STANDBYMODE: 0 high when standby, 1 low when standby
500 * SEL: 0 RF_LE0 activate, 1 RF_LE1 activate
501 * BUSY: ASIC is busy executing RF commands
502 */
503#define RF_CSR_CFG0 0x1020
504#define RF_CSR_CFG0_REGID_AND_VALUE FIELD32(0x00ffffff)
505#define RF_CSR_CFG0_BITWIDTH FIELD32(0x1f000000)
506#define RF_CSR_CFG0_REG_VALUE_BW FIELD32(0x1fffffff)
507#define RF_CSR_CFG0_STANDBYMODE FIELD32(0x20000000)
508#define RF_CSR_CFG0_SEL FIELD32(0x40000000)
509#define RF_CSR_CFG0_BUSY FIELD32(0x80000000)
510
511/*
512 * RF_CSR_CFG1: RF control register
513 * REGID_AND_VALUE: Register value to program into RF
514 * RFGAP: Gap between BB_CONTROL_RF and RF_LE
515 * 0: 3 system clock cycle (37.5usec)
516 * 1: 5 system clock cycle (62.5usec)
517 */
518#define RF_CSR_CFG1 0x1024
519#define RF_CSR_CFG1_REGID_AND_VALUE FIELD32(0x00ffffff)
520#define RF_CSR_CFG1_RFGAP FIELD32(0x1f000000)
521
522/*
523 * RF_CSR_CFG2: RF control register
524 * VALUE: Register value to program into RF
525 * RFGAP: Gap between BB_CONTROL_RF and RF_LE
526 * 0: 3 system clock cycle (37.5usec)
527 * 1: 5 system clock cycle (62.5usec)
528 */
529#define RF_CSR_CFG2 0x1028
530#define RF_CSR_CFG2_VALUE FIELD32(0x00ffffff)
531
532/*
533 * LED_CFG: LED control
534 * color LED's:
535 * 0: off
536 * 1: blinking upon TX2
537 * 2: periodic slow blinking
538 * 3: always on
539 * LED polarity:
540 * 0: active low
541 * 1: active high
542 */
543#define LED_CFG 0x102c
544#define LED_CFG_ON_PERIOD FIELD32(0x000000ff)
545#define LED_CFG_OFF_PERIOD FIELD32(0x0000ff00)
546#define LED_CFG_SLOW_BLINK_PERIOD FIELD32(0x003f0000)
547#define LED_CFG_R_LED_MODE FIELD32(0x03000000)
548#define LED_CFG_G_LED_MODE FIELD32(0x0c000000)
549#define LED_CFG_Y_LED_MODE FIELD32(0x30000000)
550#define LED_CFG_LED_POLAR FIELD32(0x40000000)
551
552/*
553 * XIFS_TIME_CFG: MAC timing
554 * CCKM_SIFS_TIME: unit 1us. Applied after CCK RX/TX
555 * OFDM_SIFS_TIME: unit 1us. Applied after OFDM RX/TX
556 * OFDM_XIFS_TIME: unit 1us. Applied after OFDM RX
557 * when MAC doesn't reference BBP signal BBRXEND
558 * EIFS: unit 1us
559 * BB_RXEND_ENABLE: reference RXEND signal to begin XIFS defer
560 *
561 */
562#define XIFS_TIME_CFG 0x1100
563#define XIFS_TIME_CFG_CCKM_SIFS_TIME FIELD32(0x000000ff)
564#define XIFS_TIME_CFG_OFDM_SIFS_TIME FIELD32(0x0000ff00)
565#define XIFS_TIME_CFG_OFDM_XIFS_TIME FIELD32(0x000f0000)
566#define XIFS_TIME_CFG_EIFS FIELD32(0x1ff00000)
567#define XIFS_TIME_CFG_BB_RXEND_ENABLE FIELD32(0x20000000)
568
569/*
570 * BKOFF_SLOT_CFG:
571 */
572#define BKOFF_SLOT_CFG 0x1104
573#define BKOFF_SLOT_CFG_SLOT_TIME FIELD32(0x000000ff)
574#define BKOFF_SLOT_CFG_CC_DELAY_TIME FIELD32(0x0000ff00)
575
576/*
577 * NAV_TIME_CFG:
578 */
579#define NAV_TIME_CFG 0x1108
580#define NAV_TIME_CFG_SIFS FIELD32(0x000000ff)
581#define NAV_TIME_CFG_SLOT_TIME FIELD32(0x0000ff00)
582#define NAV_TIME_CFG_EIFS FIELD32(0x01ff0000)
583#define NAV_TIME_ZERO_SIFS FIELD32(0x02000000)
584
585/*
586 * CH_TIME_CFG: count as channel busy
587 */
588#define CH_TIME_CFG 0x110c
589
590/*
591 * PBF_LIFE_TIMER: TX/RX MPDU timestamp timer (free run) Unit: 1us
592 */
593#define PBF_LIFE_TIMER 0x1110
594
595/*
596 * BCN_TIME_CFG:
597 * BEACON_INTERVAL: in unit of 1/16 TU
598 * TSF_TICKING: Enable TSF auto counting
599 * TSF_SYNC: Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
600 * BEACON_GEN: Enable beacon generator
601 */
602#define BCN_TIME_CFG 0x1114
603#define BCN_TIME_CFG_BEACON_INTERVAL FIELD32(0x0000ffff)
604#define BCN_TIME_CFG_TSF_TICKING FIELD32(0x00010000)
605#define BCN_TIME_CFG_TSF_SYNC FIELD32(0x00060000)
606#define BCN_TIME_CFG_TBTT_ENABLE FIELD32(0x00080000)
607#define BCN_TIME_CFG_BEACON_GEN FIELD32(0x00100000)
608#define BCN_TIME_CFG_TX_TIME_COMPENSATE FIELD32(0xf0000000)
609
610/*
611 * TBTT_SYNC_CFG:
612 */
613#define TBTT_SYNC_CFG 0x1118
614
615/*
616 * TSF_TIMER_DW0: Local lsb TSF timer, read-only
617 */
618#define TSF_TIMER_DW0 0x111c
619#define TSF_TIMER_DW0_LOW_WORD FIELD32(0xffffffff)
620
621/*
622 * TSF_TIMER_DW1: Local msb TSF timer, read-only
623 */
624#define TSF_TIMER_DW1 0x1120
625#define TSF_TIMER_DW1_HIGH_WORD FIELD32(0xffffffff)
626
627/*
628 * TBTT_TIMER: TImer remains till next TBTT, read-only
629 */
630#define TBTT_TIMER 0x1124
631
632/*
633 * INT_TIMER_CFG:
634 */
635#define INT_TIMER_CFG 0x1128
636
637/*
638 * INT_TIMER_EN: GP-timer and pre-tbtt Int enable
639 */
640#define INT_TIMER_EN 0x112c
641
642/*
643 * CH_IDLE_STA: channel idle time
644 */
645#define CH_IDLE_STA 0x1130
646
647/*
648 * CH_BUSY_STA: channel busy time
649 */
650#define CH_BUSY_STA 0x1134
651
652/*
653 * MAC_STATUS_CFG:
654 * BBP_RF_BUSY: When set to 0, BBP and RF are stable.
655 * if 1 or higher one of the 2 registers is busy.
656 */
657#define MAC_STATUS_CFG 0x1200
658#define MAC_STATUS_CFG_BBP_RF_BUSY FIELD32(0x00000003)
659
660/*
661 * PWR_PIN_CFG:
662 */
663#define PWR_PIN_CFG 0x1204
664
665/*
666 * AUTOWAKEUP_CFG: Manual power control / status register
667 * TBCN_BEFORE_WAKE: ForceWake has high privilege than PutToSleep when both set
668 * AUTOWAKE: 0:sleep, 1:awake
669 */
670#define AUTOWAKEUP_CFG 0x1208
671#define AUTOWAKEUP_CFG_AUTO_LEAD_TIME FIELD32(0x000000ff)
672#define AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE FIELD32(0x00007f00)
673#define AUTOWAKEUP_CFG_AUTOWAKE FIELD32(0x00008000)
674
675/*
676 * EDCA_AC0_CFG:
677 */
678#define EDCA_AC0_CFG 0x1300
679#define EDCA_AC0_CFG_TX_OP FIELD32(0x000000ff)
680#define EDCA_AC0_CFG_AIFSN FIELD32(0x00000f00)
681#define EDCA_AC0_CFG_CWMIN FIELD32(0x0000f000)
682#define EDCA_AC0_CFG_CWMAX FIELD32(0x000f0000)
683
684/*
685 * EDCA_AC1_CFG:
686 */
687#define EDCA_AC1_CFG 0x1304
688#define EDCA_AC1_CFG_TX_OP FIELD32(0x000000ff)
689#define EDCA_AC1_CFG_AIFSN FIELD32(0x00000f00)
690#define EDCA_AC1_CFG_CWMIN FIELD32(0x0000f000)
691#define EDCA_AC1_CFG_CWMAX FIELD32(0x000f0000)
692
693/*
694 * EDCA_AC2_CFG:
695 */
696#define EDCA_AC2_CFG 0x1308
697#define EDCA_AC2_CFG_TX_OP FIELD32(0x000000ff)
698#define EDCA_AC2_CFG_AIFSN FIELD32(0x00000f00)
699#define EDCA_AC2_CFG_CWMIN FIELD32(0x0000f000)
700#define EDCA_AC2_CFG_CWMAX FIELD32(0x000f0000)
701
702/*
703 * EDCA_AC3_CFG:
704 */
705#define EDCA_AC3_CFG 0x130c
706#define EDCA_AC3_CFG_TX_OP FIELD32(0x000000ff)
707#define EDCA_AC3_CFG_AIFSN FIELD32(0x00000f00)
708#define EDCA_AC3_CFG_CWMIN FIELD32(0x0000f000)
709#define EDCA_AC3_CFG_CWMAX FIELD32(0x000f0000)
710
711/*
712 * EDCA_TID_AC_MAP:
713 */
714#define EDCA_TID_AC_MAP 0x1310
715
716/*
717 * TX_PWR_CFG_0:
718 */
719#define TX_PWR_CFG_0 0x1314
720#define TX_PWR_CFG_0_1MBS FIELD32(0x0000000f)
721#define TX_PWR_CFG_0_2MBS FIELD32(0x000000f0)
722#define TX_PWR_CFG_0_55MBS FIELD32(0x00000f00)
723#define TX_PWR_CFG_0_11MBS FIELD32(0x0000f000)
724#define TX_PWR_CFG_0_6MBS FIELD32(0x000f0000)
725#define TX_PWR_CFG_0_9MBS FIELD32(0x00f00000)
726#define TX_PWR_CFG_0_12MBS FIELD32(0x0f000000)
727#define TX_PWR_CFG_0_18MBS FIELD32(0xf0000000)
728
729/*
730 * TX_PWR_CFG_1:
731 */
732#define TX_PWR_CFG_1 0x1318
733#define TX_PWR_CFG_1_24MBS FIELD32(0x0000000f)
734#define TX_PWR_CFG_1_36MBS FIELD32(0x000000f0)
735#define TX_PWR_CFG_1_48MBS FIELD32(0x00000f00)
736#define TX_PWR_CFG_1_54MBS FIELD32(0x0000f000)
737#define TX_PWR_CFG_1_MCS0 FIELD32(0x000f0000)
738#define TX_PWR_CFG_1_MCS1 FIELD32(0x00f00000)
739#define TX_PWR_CFG_1_MCS2 FIELD32(0x0f000000)
740#define TX_PWR_CFG_1_MCS3 FIELD32(0xf0000000)
741
742/*
743 * TX_PWR_CFG_2:
744 */
745#define TX_PWR_CFG_2 0x131c
746#define TX_PWR_CFG_2_MCS4 FIELD32(0x0000000f)
747#define TX_PWR_CFG_2_MCS5 FIELD32(0x000000f0)
748#define TX_PWR_CFG_2_MCS6 FIELD32(0x00000f00)
749#define TX_PWR_CFG_2_MCS7 FIELD32(0x0000f000)
750#define TX_PWR_CFG_2_MCS8 FIELD32(0x000f0000)
751#define TX_PWR_CFG_2_MCS9 FIELD32(0x00f00000)
752#define TX_PWR_CFG_2_MCS10 FIELD32(0x0f000000)
753#define TX_PWR_CFG_2_MCS11 FIELD32(0xf0000000)
754
755/*
756 * TX_PWR_CFG_3:
757 */
758#define TX_PWR_CFG_3 0x1320
759#define TX_PWR_CFG_3_MCS12 FIELD32(0x0000000f)
760#define TX_PWR_CFG_3_MCS13 FIELD32(0x000000f0)
761#define TX_PWR_CFG_3_MCS14 FIELD32(0x00000f00)
762#define TX_PWR_CFG_3_MCS15 FIELD32(0x0000f000)
763#define TX_PWR_CFG_3_UKNOWN1 FIELD32(0x000f0000)
764#define TX_PWR_CFG_3_UKNOWN2 FIELD32(0x00f00000)
765#define TX_PWR_CFG_3_UKNOWN3 FIELD32(0x0f000000)
766#define TX_PWR_CFG_3_UKNOWN4 FIELD32(0xf0000000)
767
768/*
769 * TX_PWR_CFG_4:
770 */
771#define TX_PWR_CFG_4 0x1324
772#define TX_PWR_CFG_4_UKNOWN5 FIELD32(0x0000000f)
773#define TX_PWR_CFG_4_UKNOWN6 FIELD32(0x000000f0)
774#define TX_PWR_CFG_4_UKNOWN7 FIELD32(0x00000f00)
775#define TX_PWR_CFG_4_UKNOWN8 FIELD32(0x0000f000)
776
777/*
778 * TX_PIN_CFG:
779 */
780#define TX_PIN_CFG 0x1328
781#define TX_PIN_CFG_PA_PE_A0_EN FIELD32(0x00000001)
782#define TX_PIN_CFG_PA_PE_G0_EN FIELD32(0x00000002)
783#define TX_PIN_CFG_PA_PE_A1_EN FIELD32(0x00000004)
784#define TX_PIN_CFG_PA_PE_G1_EN FIELD32(0x00000008)
785#define TX_PIN_CFG_PA_PE_A0_POL FIELD32(0x00000010)
786#define TX_PIN_CFG_PA_PE_G0_POL FIELD32(0x00000020)
787#define TX_PIN_CFG_PA_PE_A1_POL FIELD32(0x00000040)
788#define TX_PIN_CFG_PA_PE_G1_POL FIELD32(0x00000080)
789#define TX_PIN_CFG_LNA_PE_A0_EN FIELD32(0x00000100)
790#define TX_PIN_CFG_LNA_PE_G0_EN FIELD32(0x00000200)
791#define TX_PIN_CFG_LNA_PE_A1_EN FIELD32(0x00000400)
792#define TX_PIN_CFG_LNA_PE_G1_EN FIELD32(0x00000800)
793#define TX_PIN_CFG_LNA_PE_A0_POL FIELD32(0x00001000)
794#define TX_PIN_CFG_LNA_PE_G0_POL FIELD32(0x00002000)
795#define TX_PIN_CFG_LNA_PE_A1_POL FIELD32(0x00004000)
796#define TX_PIN_CFG_LNA_PE_G1_POL FIELD32(0x00008000)
797#define TX_PIN_CFG_RFTR_EN FIELD32(0x00010000)
798#define TX_PIN_CFG_RFTR_POL FIELD32(0x00020000)
799#define TX_PIN_CFG_TRSW_EN FIELD32(0x00040000)
800#define TX_PIN_CFG_TRSW_POL FIELD32(0x00080000)
801
802/*
803 * TX_BAND_CFG: 0x1 use upper 20MHz, 0x0 use lower 20MHz
804 */
805#define TX_BAND_CFG 0x132c
806#define TX_BAND_CFG_HT40_PLUS FIELD32(0x00000001)
807#define TX_BAND_CFG_A FIELD32(0x00000002)
808#define TX_BAND_CFG_BG FIELD32(0x00000004)
809
810/*
811 * TX_SW_CFG0:
812 */
813#define TX_SW_CFG0 0x1330
814
815/*
816 * TX_SW_CFG1:
817 */
818#define TX_SW_CFG1 0x1334
819
820/*
821 * TX_SW_CFG2:
822 */
823#define TX_SW_CFG2 0x1338
824
825/*
826 * TXOP_THRES_CFG:
827 */
828#define TXOP_THRES_CFG 0x133c
829
830/*
831 * TXOP_CTRL_CFG:
832 */
833#define TXOP_CTRL_CFG 0x1340
834
835/*
836 * TX_RTS_CFG:
837 * RTS_THRES: unit:byte
838 * RTS_FBK_EN: enable rts rate fallback
839 */
840#define TX_RTS_CFG 0x1344
841#define TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT FIELD32(0x000000ff)
842#define TX_RTS_CFG_RTS_THRES FIELD32(0x00ffff00)
843#define TX_RTS_CFG_RTS_FBK_EN FIELD32(0x01000000)
844
845/*
846 * TX_TIMEOUT_CFG:
847 * MPDU_LIFETIME: expiration time = 2^(9+MPDU LIFE TIME) us
848 * RX_ACK_TIMEOUT: unit:slot. Used for TX procedure
849 * TX_OP_TIMEOUT: TXOP timeout value for TXOP truncation.
850 * it is recommended that:
851 * (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT)
852 */
853#define TX_TIMEOUT_CFG 0x1348
854#define TX_TIMEOUT_CFG_MPDU_LIFETIME FIELD32(0x000000f0)
855#define TX_TIMEOUT_CFG_RX_ACK_TIMEOUT FIELD32(0x0000ff00)
856#define TX_TIMEOUT_CFG_TX_OP_TIMEOUT FIELD32(0x00ff0000)
857
858/*
859 * TX_RTY_CFG:
860 * SHORT_RTY_LIMIT: short retry limit
861 * LONG_RTY_LIMIT: long retry limit
862 * LONG_RTY_THRE: Long retry threshoold
863 * NON_AGG_RTY_MODE: Non-Aggregate MPDU retry mode
864 * 0:expired by retry limit, 1: expired by mpdu life timer
865 * AGG_RTY_MODE: Aggregate MPDU retry mode
866 * 0:expired by retry limit, 1: expired by mpdu life timer
867 * TX_AUTO_FB_ENABLE: Tx retry PHY rate auto fallback enable
868 */
869#define TX_RTY_CFG 0x134c
870#define TX_RTY_CFG_SHORT_RTY_LIMIT FIELD32(0x000000ff)
871#define TX_RTY_CFG_LONG_RTY_LIMIT FIELD32(0x0000ff00)
872#define TX_RTY_CFG_LONG_RTY_THRE FIELD32(0x0fff0000)
873#define TX_RTY_CFG_NON_AGG_RTY_MODE FIELD32(0x10000000)
874#define TX_RTY_CFG_AGG_RTY_MODE FIELD32(0x20000000)
875#define TX_RTY_CFG_TX_AUTO_FB_ENABLE FIELD32(0x40000000)
876
877/*
878 * TX_LINK_CFG:
879 * REMOTE_MFB_LIFETIME: remote MFB life time. unit: 32us
880 * MFB_ENABLE: TX apply remote MFB 1:enable
881 * REMOTE_UMFS_ENABLE: remote unsolicit MFB enable
882 * 0: not apply remote remote unsolicit (MFS=7)
883 * TX_MRQ_EN: MCS request TX enable
884 * TX_RDG_EN: RDG TX enable
885 * TX_CF_ACK_EN: Piggyback CF-ACK enable
886 * REMOTE_MFB: remote MCS feedback
887 * REMOTE_MFS: remote MCS feedback sequence number
888 */
889#define TX_LINK_CFG 0x1350
890#define TX_LINK_CFG_REMOTE_MFB_LIFETIME FIELD32(0x000000ff)
891#define TX_LINK_CFG_MFB_ENABLE FIELD32(0x00000100)
892#define TX_LINK_CFG_REMOTE_UMFS_ENABLE FIELD32(0x00000200)
893#define TX_LINK_CFG_TX_MRQ_EN FIELD32(0x00000400)
894#define TX_LINK_CFG_TX_RDG_EN FIELD32(0x00000800)
895#define TX_LINK_CFG_TX_CF_ACK_EN FIELD32(0x00001000)
896#define TX_LINK_CFG_REMOTE_MFB FIELD32(0x00ff0000)
897#define TX_LINK_CFG_REMOTE_MFS FIELD32(0xff000000)
898
899/*
900 * HT_FBK_CFG0:
901 */
902#define HT_FBK_CFG0 0x1354
903#define HT_FBK_CFG0_HTMCS0FBK FIELD32(0x0000000f)
904#define HT_FBK_CFG0_HTMCS1FBK FIELD32(0x000000f0)
905#define HT_FBK_CFG0_HTMCS2FBK FIELD32(0x00000f00)
906#define HT_FBK_CFG0_HTMCS3FBK FIELD32(0x0000f000)
907#define HT_FBK_CFG0_HTMCS4FBK FIELD32(0x000f0000)
908#define HT_FBK_CFG0_HTMCS5FBK FIELD32(0x00f00000)
909#define HT_FBK_CFG0_HTMCS6FBK FIELD32(0x0f000000)
910#define HT_FBK_CFG0_HTMCS7FBK FIELD32(0xf0000000)
911
912/*
913 * HT_FBK_CFG1:
914 */
915#define HT_FBK_CFG1 0x1358
916#define HT_FBK_CFG1_HTMCS8FBK FIELD32(0x0000000f)
917#define HT_FBK_CFG1_HTMCS9FBK FIELD32(0x000000f0)
918#define HT_FBK_CFG1_HTMCS10FBK FIELD32(0x00000f00)
919#define HT_FBK_CFG1_HTMCS11FBK FIELD32(0x0000f000)
920#define HT_FBK_CFG1_HTMCS12FBK FIELD32(0x000f0000)
921#define HT_FBK_CFG1_HTMCS13FBK FIELD32(0x00f00000)
922#define HT_FBK_CFG1_HTMCS14FBK FIELD32(0x0f000000)
923#define HT_FBK_CFG1_HTMCS15FBK FIELD32(0xf0000000)
924
925/*
926 * LG_FBK_CFG0:
927 */
928#define LG_FBK_CFG0 0x135c
929#define LG_FBK_CFG0_OFDMMCS0FBK FIELD32(0x0000000f)
930#define LG_FBK_CFG0_OFDMMCS1FBK FIELD32(0x000000f0)
931#define LG_FBK_CFG0_OFDMMCS2FBK FIELD32(0x00000f00)
932#define LG_FBK_CFG0_OFDMMCS3FBK FIELD32(0x0000f000)
933#define LG_FBK_CFG0_OFDMMCS4FBK FIELD32(0x000f0000)
934#define LG_FBK_CFG0_OFDMMCS5FBK FIELD32(0x00f00000)
935#define LG_FBK_CFG0_OFDMMCS6FBK FIELD32(0x0f000000)
936#define LG_FBK_CFG0_OFDMMCS7FBK FIELD32(0xf0000000)
937
938/*
939 * LG_FBK_CFG1:
940 */
941#define LG_FBK_CFG1 0x1360
942#define LG_FBK_CFG0_CCKMCS0FBK FIELD32(0x0000000f)
943#define LG_FBK_CFG0_CCKMCS1FBK FIELD32(0x000000f0)
944#define LG_FBK_CFG0_CCKMCS2FBK FIELD32(0x00000f00)
945#define LG_FBK_CFG0_CCKMCS3FBK FIELD32(0x0000f000)
946
947/*
948 * CCK_PROT_CFG: CCK Protection
949 * PROTECT_RATE: Protection control frame rate for CCK TX(RTS/CTS/CFEnd)
950 * PROTECT_CTRL: Protection control frame type for CCK TX
951 * 0:none, 1:RTS/CTS, 2:CTS-to-self
952 * PROTECT_NAV: TXOP protection type for CCK TX
953 * 0:none, 1:ShortNAVprotect, 2:LongNAVProtect
954 * TX_OP_ALLOW_CCK: CCK TXOP allowance, 0:disallow
955 * TX_OP_ALLOW_OFDM: CCK TXOP allowance, 0:disallow
956 * TX_OP_ALLOW_MM20: CCK TXOP allowance, 0:disallow
957 * TX_OP_ALLOW_MM40: CCK TXOP allowance, 0:disallow
958 * TX_OP_ALLOW_GF20: CCK TXOP allowance, 0:disallow
959 * TX_OP_ALLOW_GF40: CCK TXOP allowance, 0:disallow
960 * RTS_TH_EN: RTS threshold enable on CCK TX
961 */
962#define CCK_PROT_CFG 0x1364
963#define CCK_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
964#define CCK_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
965#define CCK_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
966#define CCK_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
967#define CCK_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
968#define CCK_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
969#define CCK_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
970#define CCK_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
971#define CCK_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
972#define CCK_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
973
974/*
975 * OFDM_PROT_CFG: OFDM Protection
976 */
977#define OFDM_PROT_CFG 0x1368
978#define OFDM_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
979#define OFDM_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
980#define OFDM_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
981#define OFDM_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
982#define OFDM_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
983#define OFDM_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
984#define OFDM_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
985#define OFDM_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
986#define OFDM_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
987#define OFDM_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
988
989/*
990 * MM20_PROT_CFG: MM20 Protection
991 */
992#define MM20_PROT_CFG 0x136c
993#define MM20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
994#define MM20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
995#define MM20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
996#define MM20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
997#define MM20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
998#define MM20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
999#define MM20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1000#define MM20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1001#define MM20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1002#define MM20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1003
1004/*
1005 * MM40_PROT_CFG: MM40 Protection
1006 */
1007#define MM40_PROT_CFG 0x1370
1008#define MM40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1009#define MM40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1010#define MM40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1011#define MM40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1012#define MM40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1013#define MM40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1014#define MM40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1015#define MM40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1016#define MM40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1017#define MM40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1018
1019/*
1020 * GF20_PROT_CFG: GF20 Protection
1021 */
1022#define GF20_PROT_CFG 0x1374
1023#define GF20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1024#define GF20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1025#define GF20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1026#define GF20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1027#define GF20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1028#define GF20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1029#define GF20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1030#define GF20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1031#define GF20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1032#define GF20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1033
1034/*
1035 * GF40_PROT_CFG: GF40 Protection
1036 */
1037#define GF40_PROT_CFG 0x1378
1038#define GF40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1039#define GF40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1040#define GF40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1041#define GF40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1042#define GF40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1043#define GF40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1044#define GF40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1045#define GF40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1046#define GF40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1047#define GF40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1048
1049/*
1050 * EXP_CTS_TIME:
1051 */
1052#define EXP_CTS_TIME 0x137c
1053
1054/*
1055 * EXP_ACK_TIME:
1056 */
1057#define EXP_ACK_TIME 0x1380
1058
1059/*
1060 * RX_FILTER_CFG: RX configuration register.
1061 */
1062#define RX_FILTER_CFG 0x1400
1063#define RX_FILTER_CFG_DROP_CRC_ERROR FIELD32(0x00000001)
1064#define RX_FILTER_CFG_DROP_PHY_ERROR FIELD32(0x00000002)
1065#define RX_FILTER_CFG_DROP_NOT_TO_ME FIELD32(0x00000004)
1066#define RX_FILTER_CFG_DROP_NOT_MY_BSSD FIELD32(0x00000008)
1067#define RX_FILTER_CFG_DROP_VER_ERROR FIELD32(0x00000010)
1068#define RX_FILTER_CFG_DROP_MULTICAST FIELD32(0x00000020)
1069#define RX_FILTER_CFG_DROP_BROADCAST FIELD32(0x00000040)
1070#define RX_FILTER_CFG_DROP_DUPLICATE FIELD32(0x00000080)
1071#define RX_FILTER_CFG_DROP_CF_END_ACK FIELD32(0x00000100)
1072#define RX_FILTER_CFG_DROP_CF_END FIELD32(0x00000200)
1073#define RX_FILTER_CFG_DROP_ACK FIELD32(0x00000400)
1074#define RX_FILTER_CFG_DROP_CTS FIELD32(0x00000800)
1075#define RX_FILTER_CFG_DROP_RTS FIELD32(0x00001000)
1076#define RX_FILTER_CFG_DROP_PSPOLL FIELD32(0x00002000)
1077#define RX_FILTER_CFG_DROP_BA FIELD32(0x00004000)
1078#define RX_FILTER_CFG_DROP_BAR FIELD32(0x00008000)
1079#define RX_FILTER_CFG_DROP_CNTL FIELD32(0x00010000)
1080
1081/*
1082 * AUTO_RSP_CFG:
1083 * AUTORESPONDER: 0: disable, 1: enable
1084 * BAC_ACK_POLICY: 0:long, 1:short preamble
1085 * CTS_40_MMODE: Response CTS 40MHz duplicate mode
1086 * CTS_40_MREF: Response CTS 40MHz duplicate mode
1087 * AR_PREAMBLE: Auto responder preamble 0:long, 1:short preamble
1088 * DUAL_CTS_EN: Power bit value in control frame
1089 * ACK_CTS_PSM_BIT:Power bit value in control frame
1090 */
1091#define AUTO_RSP_CFG 0x1404
1092#define AUTO_RSP_CFG_AUTORESPONDER FIELD32(0x00000001)
1093#define AUTO_RSP_CFG_BAC_ACK_POLICY FIELD32(0x00000002)
1094#define AUTO_RSP_CFG_CTS_40_MMODE FIELD32(0x00000004)
1095#define AUTO_RSP_CFG_CTS_40_MREF FIELD32(0x00000008)
1096#define AUTO_RSP_CFG_AR_PREAMBLE FIELD32(0x00000010)
1097#define AUTO_RSP_CFG_DUAL_CTS_EN FIELD32(0x00000040)
1098#define AUTO_RSP_CFG_ACK_CTS_PSM_BIT FIELD32(0x00000080)
1099
1100/*
1101 * LEGACY_BASIC_RATE:
1102 */
1103#define LEGACY_BASIC_RATE 0x1408
1104
1105/*
1106 * HT_BASIC_RATE:
1107 */
1108#define HT_BASIC_RATE 0x140c
1109
1110/*
1111 * HT_CTRL_CFG:
1112 */
1113#define HT_CTRL_CFG 0x1410
1114
1115/*
1116 * SIFS_COST_CFG:
1117 */
1118#define SIFS_COST_CFG 0x1414
1119
1120/*
1121 * RX_PARSER_CFG:
1122 * Set NAV for all received frames
1123 */
1124#define RX_PARSER_CFG 0x1418
1125
1126/*
1127 * TX_SEC_CNT0:
1128 */
1129#define TX_SEC_CNT0 0x1500
1130
1131/*
1132 * RX_SEC_CNT0:
1133 */
1134#define RX_SEC_CNT0 0x1504
1135
1136/*
1137 * CCMP_FC_MUTE:
1138 */
1139#define CCMP_FC_MUTE 0x1508
1140
1141/*
1142 * TXOP_HLDR_ADDR0:
1143 */
1144#define TXOP_HLDR_ADDR0 0x1600
1145
1146/*
1147 * TXOP_HLDR_ADDR1:
1148 */
1149#define TXOP_HLDR_ADDR1 0x1604
1150
1151/*
1152 * TXOP_HLDR_ET:
1153 */
1154#define TXOP_HLDR_ET 0x1608
1155
1156/*
1157 * QOS_CFPOLL_RA_DW0:
1158 */
1159#define QOS_CFPOLL_RA_DW0 0x160c
1160
1161/*
1162 * QOS_CFPOLL_RA_DW1:
1163 */
1164#define QOS_CFPOLL_RA_DW1 0x1610
1165
1166/*
1167 * QOS_CFPOLL_QC:
1168 */
1169#define QOS_CFPOLL_QC 0x1614
1170
1171/*
1172 * RX_STA_CNT0: RX PLCP error count & RX CRC error count
1173 */
1174#define RX_STA_CNT0 0x1700
1175#define RX_STA_CNT0_CRC_ERR FIELD32(0x0000ffff)
1176#define RX_STA_CNT0_PHY_ERR FIELD32(0xffff0000)
1177
1178/*
1179 * RX_STA_CNT1: RX False CCA count & RX LONG frame count
1180 */
1181#define RX_STA_CNT1 0x1704
1182#define RX_STA_CNT1_FALSE_CCA FIELD32(0x0000ffff)
1183#define RX_STA_CNT1_PLCP_ERR FIELD32(0xffff0000)
1184
1185/*
1186 * RX_STA_CNT2:
1187 */
1188#define RX_STA_CNT2 0x1708
1189#define RX_STA_CNT2_RX_DUPLI_COUNT FIELD32(0x0000ffff)
1190#define RX_STA_CNT2_RX_FIFO_OVERFLOW FIELD32(0xffff0000)
1191
1192/*
1193 * TX_STA_CNT0: TX Beacon count
1194 */
1195#define TX_STA_CNT0 0x170c
1196#define TX_STA_CNT0_TX_FAIL_COUNT FIELD32(0x0000ffff)
1197#define TX_STA_CNT0_TX_BEACON_COUNT FIELD32(0xffff0000)
1198
1199/*
1200 * TX_STA_CNT1: TX tx count
1201 */
1202#define TX_STA_CNT1 0x1710
1203#define TX_STA_CNT1_TX_SUCCESS FIELD32(0x0000ffff)
1204#define TX_STA_CNT1_TX_RETRANSMIT FIELD32(0xffff0000)
1205
1206/*
1207 * TX_STA_CNT2: TX tx count
1208 */
1209#define TX_STA_CNT2 0x1714
1210#define TX_STA_CNT2_TX_ZERO_LEN_COUNT FIELD32(0x0000ffff)
1211#define TX_STA_CNT2_TX_UNDER_FLOW_COUNT FIELD32(0xffff0000)
1212
1213/*
1214 * TX_STA_FIFO: TX Result for specific PID status fifo register
1215 */
1216#define TX_STA_FIFO 0x1718
1217#define TX_STA_FIFO_VALID FIELD32(0x00000001)
1218#define TX_STA_FIFO_PID_TYPE FIELD32(0x0000001e)
1219#define TX_STA_FIFO_TX_SUCCESS FIELD32(0x00000020)
1220#define TX_STA_FIFO_TX_AGGRE FIELD32(0x00000040)
1221#define TX_STA_FIFO_TX_ACK_REQUIRED FIELD32(0x00000080)
1222#define TX_STA_FIFO_WCID FIELD32(0x0000ff00)
1223#define TX_STA_FIFO_SUCCESS_RATE FIELD32(0xffff0000)
1224
1225/*
1226 * TX_AGG_CNT: Debug counter
1227 */
1228#define TX_AGG_CNT 0x171c
1229#define TX_AGG_CNT_NON_AGG_TX_COUNT FIELD32(0x0000ffff)
1230#define TX_AGG_CNT_AGG_TX_COUNT FIELD32(0xffff0000)
1231
1232/*
1233 * TX_AGG_CNT0:
1234 */
1235#define TX_AGG_CNT0 0x1720
1236#define TX_AGG_CNT0_AGG_SIZE_1_COUNT FIELD32(0x0000ffff)
1237#define TX_AGG_CNT0_AGG_SIZE_2_COUNT FIELD32(0xffff0000)
1238
1239/*
1240 * TX_AGG_CNT1:
1241 */
1242#define TX_AGG_CNT1 0x1724
1243#define TX_AGG_CNT1_AGG_SIZE_3_COUNT FIELD32(0x0000ffff)
1244#define TX_AGG_CNT1_AGG_SIZE_4_COUNT FIELD32(0xffff0000)
1245
1246/*
1247 * TX_AGG_CNT2:
1248 */
1249#define TX_AGG_CNT2 0x1728
1250#define TX_AGG_CNT2_AGG_SIZE_5_COUNT FIELD32(0x0000ffff)
1251#define TX_AGG_CNT2_AGG_SIZE_6_COUNT FIELD32(0xffff0000)
1252
1253/*
1254 * TX_AGG_CNT3:
1255 */
1256#define TX_AGG_CNT3 0x172c
1257#define TX_AGG_CNT3_AGG_SIZE_7_COUNT FIELD32(0x0000ffff)
1258#define TX_AGG_CNT3_AGG_SIZE_8_COUNT FIELD32(0xffff0000)
1259
1260/*
1261 * TX_AGG_CNT4:
1262 */
1263#define TX_AGG_CNT4 0x1730
1264#define TX_AGG_CNT4_AGG_SIZE_9_COUNT FIELD32(0x0000ffff)
1265#define TX_AGG_CNT4_AGG_SIZE_10_COUNT FIELD32(0xffff0000)
1266
1267/*
1268 * TX_AGG_CNT5:
1269 */
1270#define TX_AGG_CNT5 0x1734
1271#define TX_AGG_CNT5_AGG_SIZE_11_COUNT FIELD32(0x0000ffff)
1272#define TX_AGG_CNT5_AGG_SIZE_12_COUNT FIELD32(0xffff0000)
1273
1274/*
1275 * TX_AGG_CNT6:
1276 */
1277#define TX_AGG_CNT6 0x1738
1278#define TX_AGG_CNT6_AGG_SIZE_13_COUNT FIELD32(0x0000ffff)
1279#define TX_AGG_CNT6_AGG_SIZE_14_COUNT FIELD32(0xffff0000)
1280
1281/*
1282 * TX_AGG_CNT7:
1283 */
1284#define TX_AGG_CNT7 0x173c
1285#define TX_AGG_CNT7_AGG_SIZE_15_COUNT FIELD32(0x0000ffff)
1286#define TX_AGG_CNT7_AGG_SIZE_16_COUNT FIELD32(0xffff0000)
1287
1288/*
1289 * MPDU_DENSITY_CNT:
1290 * TX_ZERO_DEL: TX zero length delimiter count
1291 * RX_ZERO_DEL: RX zero length delimiter count
1292 */
1293#define MPDU_DENSITY_CNT 0x1740
1294#define MPDU_DENSITY_CNT_TX_ZERO_DEL FIELD32(0x0000ffff)
1295#define MPDU_DENSITY_CNT_RX_ZERO_DEL FIELD32(0xffff0000)
1296
1297/*
1298 * Security key table memory.
1299 * MAC_WCID_BASE: 8-bytes (use only 6 bytes) * 256 entry
1300 * PAIRWISE_KEY_TABLE_BASE: 32-byte * 256 entry
1301 * MAC_IVEIV_TABLE_BASE: 8-byte * 256-entry
1302 * MAC_WCID_ATTRIBUTE_BASE: 4-byte * 256-entry
1303 * SHARED_KEY_TABLE_BASE: 32-byte * 16-entry
1304 * SHARED_KEY_MODE_BASE: 4-byte * 16-entry
1305 */
1306#define MAC_WCID_BASE 0x1800
1307#define PAIRWISE_KEY_TABLE_BASE 0x4000
1308#define MAC_IVEIV_TABLE_BASE 0x6000
1309#define MAC_WCID_ATTRIBUTE_BASE 0x6800
1310#define SHARED_KEY_TABLE_BASE 0x6c00
1311#define SHARED_KEY_MODE_BASE 0x7000
1312
1313#define MAC_WCID_ENTRY(__idx) \
1314 ( MAC_WCID_BASE + ((__idx) * sizeof(struct mac_wcid_entry)) )
1315#define PAIRWISE_KEY_ENTRY(__idx) \
1316 ( PAIRWISE_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
1317#define MAC_IVEIV_ENTRY(__idx) \
1318 ( MAC_IVEIV_TABLE_BASE + ((__idx) & sizeof(struct mac_iveiv_entry)) )
1319#define MAC_WCID_ATTR_ENTRY(__idx) \
1320 ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
1321#define SHARED_KEY_ENTRY(__idx) \
1322 ( SHARED_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
1323#define SHARED_KEY_MODE_ENTRY(__idx) \
1324 ( SHARED_KEY_MODE_BASE + ((__idx) * sizeof(u32)) )
1325
1326struct mac_wcid_entry {
1327 u8 mac[6];
1328 u8 reserved[2];
1329} __attribute__ ((packed));
1330
1331struct hw_key_entry {
1332 u8 key[16];
1333 u8 tx_mic[8];
1334 u8 rx_mic[8];
1335} __attribute__ ((packed));
1336
1337struct mac_iveiv_entry {
1338 u8 iv[8];
1339} __attribute__ ((packed));
1340
1341/*
1342 * MAC_WCID_ATTRIBUTE:
1343 */
1344#define MAC_WCID_ATTRIBUTE_KEYTAB FIELD32(0x00000001)
1345#define MAC_WCID_ATTRIBUTE_CIPHER FIELD32(0x0000000e)
1346#define MAC_WCID_ATTRIBUTE_BSS_IDX FIELD32(0x00000070)
1347#define MAC_WCID_ATTRIBUTE_RX_WIUDF FIELD32(0x00000380)
1348
1349/*
1350 * SHARED_KEY_MODE:
1351 */
1352#define SHARED_KEY_MODE_BSS0_KEY0 FIELD32(0x00000007)
1353#define SHARED_KEY_MODE_BSS0_KEY1 FIELD32(0x00000070)
1354#define SHARED_KEY_MODE_BSS0_KEY2 FIELD32(0x00000700)
1355#define SHARED_KEY_MODE_BSS0_KEY3 FIELD32(0x00007000)
1356#define SHARED_KEY_MODE_BSS1_KEY0 FIELD32(0x00070000)
1357#define SHARED_KEY_MODE_BSS1_KEY1 FIELD32(0x00700000)
1358#define SHARED_KEY_MODE_BSS1_KEY2 FIELD32(0x07000000)
1359#define SHARED_KEY_MODE_BSS1_KEY3 FIELD32(0x70000000)
1360
1361/*
1362 * HOST-MCU communication
1363 */
1364
1365/*
1366 * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
1367 */
1368#define H2M_MAILBOX_CSR 0x7010
1369#define H2M_MAILBOX_CSR_ARG0 FIELD32(0x000000ff)
1370#define H2M_MAILBOX_CSR_ARG1 FIELD32(0x0000ff00)
1371#define H2M_MAILBOX_CSR_CMD_TOKEN FIELD32(0x00ff0000)
1372#define H2M_MAILBOX_CSR_OWNER FIELD32(0xff000000)
1373
1374/*
1375 * H2M_MAILBOX_CID:
1376 */
1377#define H2M_MAILBOX_CID 0x7014
1378#define H2M_MAILBOX_CID_CMD0 FIELD32(0x000000ff)
1379#define H2M_MAILBOX_CID_CMD1 FIELD32(0x0000ff00)
1380#define H2M_MAILBOX_CID_CMD2 FIELD32(0x00ff0000)
1381#define H2M_MAILBOX_CID_CMD3 FIELD32(0xff000000)
1382
1383/*
1384 * H2M_MAILBOX_STATUS:
1385 */
1386#define H2M_MAILBOX_STATUS 0x701c
1387
1388/*
1389 * H2M_INT_SRC:
1390 */
1391#define H2M_INT_SRC 0x7024
1392
1393/*
1394 * H2M_BBP_AGENT:
1395 */
1396#define H2M_BBP_AGENT 0x7028
1397
1398/*
1399 * MCU_LEDCS: LED control for MCU Mailbox.
1400 */
1401#define MCU_LEDCS_LED_MODE FIELD8(0x1f)
1402#define MCU_LEDCS_POLARITY FIELD8(0x01)
1403
1404/*
1405 * HW_CS_CTS_BASE:
1406 * Carrier-sense CTS frame base address.
1407 * It's where mac stores carrier-sense frame for carrier-sense function.
1408 */
1409#define HW_CS_CTS_BASE 0x7700
1410
1411/*
1412 * HW_DFS_CTS_BASE:
1413 * FS CTS frame base address. It's where mac stores CTS frame for DFS.
1414 */
1415#define HW_DFS_CTS_BASE 0x7780
1416
1417/*
1418 * TXRX control registers - base address 0x3000
1419 */
1420
1421/*
1422 * TXRX_CSR1:
1423 * rt2860b UNKNOWN reg use R/O Reg Addr 0x77d0 first..
1424 */
1425#define TXRX_CSR1 0x77d0
1426
1427/*
1428 * HW_DEBUG_SETTING_BASE:
1429 * since NULL frame won't be that long (256 byte)
1430 * We steal 16 tail bytes to save debugging settings
1431 */
1432#define HW_DEBUG_SETTING_BASE 0x77f0
1433#define HW_DEBUG_SETTING_BASE2 0x7770
1434
1435/*
1436 * HW_BEACON_BASE
1437 * In order to support maximum 8 MBSS and its maximum length
1438 * is 512 bytes for each beacon
1439 * Three section discontinue memory segments will be used.
1440 * 1. The original region for BCN 0~3
1441 * 2. Extract memory from FCE table for BCN 4~5
1442 * 3. Extract memory from Pair-wise key table for BCN 6~7
1443 * It occupied those memory of wcid 238~253 for BCN 6
1444 * and wcid 222~237 for BCN 7
1445 *
1446 * IMPORTANT NOTE: Not sure why legacy driver does this,
1447 * but HW_BEACON_BASE7 is 0x0200 bytes below HW_BEACON_BASE6.
1448 */
1449#define HW_BEACON_BASE0 0x7800
1450#define HW_BEACON_BASE1 0x7a00
1451#define HW_BEACON_BASE2 0x7c00
1452#define HW_BEACON_BASE3 0x7e00
1453#define HW_BEACON_BASE4 0x7200
1454#define HW_BEACON_BASE5 0x7400
1455#define HW_BEACON_BASE6 0x5dc0
1456#define HW_BEACON_BASE7 0x5bc0
1457
1458#define HW_BEACON_OFFSET(__index) \
1459 ( ((__index) < 4) ? ( HW_BEACON_BASE0 + (__index * 0x0200) ) : \
1460 (((__index) < 6) ? ( HW_BEACON_BASE4 + ((__index - 4) * 0x0200) ) : \
1461 (HW_BEACON_BASE6 - ((__index - 6) * 0x0200))) )
1462
1463/*
1464 * 8051 firmware image.
1465 */
1466#define FIRMWARE_RT2870 "rt2870.bin"
1467#define FIRMWARE_IMAGE_BASE 0x3000
1468
1469/*
1470 * BBP registers.
1471 * The wordsize of the BBP is 8 bits.
1472 */
1473
1474/*
1475 * BBP 1: TX Antenna
1476 */
1477#define BBP1_TX_POWER FIELD8(0x07)
1478#define BBP1_TX_ANTENNA FIELD8(0x18)
1479
1480/*
1481 * BBP 3: RX Antenna
1482 */
1483#define BBP3_RX_ANTENNA FIELD8(0x18)
1484#define BBP3_HT40_PLUS FIELD8(0x20)
1485
1486/*
1487 * BBP 4: Bandwidth
1488 */
1489#define BBP4_TX_BF FIELD8(0x01)
1490#define BBP4_BANDWIDTH FIELD8(0x18)
1491
1492/*
1493 * RFCSR registers
1494 * The wordsize of the RFCSR is 8 bits.
1495 */
1496
1497/*
1498 * RFCSR 6:
1499 */
1500#define RFCSR6_R FIELD8(0x03)
1501
1502/*
1503 * RFCSR 7:
1504 */
1505#define RFCSR7_RF_TUNING FIELD8(0x01)
1506
1507/*
1508 * RFCSR 12:
1509 */
1510#define RFCSR12_TX_POWER FIELD8(0x1f)
1511
1512/*
1513 * RFCSR 22:
1514 */
1515#define RFCSR22_BASEBAND_LOOPBACK FIELD8(0x01)
1516
1517/*
1518 * RFCSR 23:
1519 */
1520#define RFCSR23_FREQ_OFFSET FIELD8(0x7f)
1521
1522/*
1523 * RFCSR 30:
1524 */
1525#define RFCSR30_RF_CALIBRATION FIELD8(0x80)
1526
1527/*
1528 * RF registers
1529 */
1530
1531/*
1532 * RF 2
1533 */
1534#define RF2_ANTENNA_RX2 FIELD32(0x00000040)
1535#define RF2_ANTENNA_TX1 FIELD32(0x00004000)
1536#define RF2_ANTENNA_RX1 FIELD32(0x00020000)
1537
1538/*
1539 * RF 3
1540 */
1541#define RF3_TXPOWER_G FIELD32(0x00003e00)
1542#define RF3_TXPOWER_A_7DBM_BOOST FIELD32(0x00000200)
1543#define RF3_TXPOWER_A FIELD32(0x00003c00)
1544
1545/*
1546 * RF 4
1547 */
1548#define RF4_TXPOWER_G FIELD32(0x000007c0)
1549#define RF4_TXPOWER_A_7DBM_BOOST FIELD32(0x00000040)
1550#define RF4_TXPOWER_A FIELD32(0x00000780)
1551#define RF4_FREQ_OFFSET FIELD32(0x001f8000)
1552#define RF4_HT40 FIELD32(0x00200000)
1553
1554/*
1555 * EEPROM content.
1556 * The wordsize of the EEPROM is 16 bits.
1557 */
1558
1559/*
1560 * EEPROM Version
1561 */
1562#define EEPROM_VERSION 0x0001
1563#define EEPROM_VERSION_FAE FIELD16(0x00ff)
1564#define EEPROM_VERSION_VERSION FIELD16(0xff00)
1565
1566/*
1567 * HW MAC address.
1568 */
1569#define EEPROM_MAC_ADDR_0 0x0002
1570#define EEPROM_MAC_ADDR_BYTE0 FIELD16(0x00ff)
1571#define EEPROM_MAC_ADDR_BYTE1 FIELD16(0xff00)
1572#define EEPROM_MAC_ADDR_1 0x0003
1573#define EEPROM_MAC_ADDR_BYTE2 FIELD16(0x00ff)
1574#define EEPROM_MAC_ADDR_BYTE3 FIELD16(0xff00)
1575#define EEPROM_MAC_ADDR_2 0x0004
1576#define EEPROM_MAC_ADDR_BYTE4 FIELD16(0x00ff)
1577#define EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00)
1578
1579/*
1580 * EEPROM ANTENNA config
1581 * RXPATH: 1: 1R, 2: 2R, 3: 3R
1582 * TXPATH: 1: 1T, 2: 2T
1583 */
1584#define EEPROM_ANTENNA 0x001a
1585#define EEPROM_ANTENNA_RXPATH FIELD16(0x000f)
1586#define EEPROM_ANTENNA_TXPATH FIELD16(0x00f0)
1587#define EEPROM_ANTENNA_RF_TYPE FIELD16(0x0f00)
1588
1589/*
1590 * EEPROM NIC config
1591 * CARDBUS_ACCEL: 0 - enable, 1 - disable
1592 */
1593#define EEPROM_NIC 0x001b
1594#define EEPROM_NIC_HW_RADIO FIELD16(0x0001)
1595#define EEPROM_NIC_DYNAMIC_TX_AGC FIELD16(0x0002)
1596#define EEPROM_NIC_EXTERNAL_LNA_BG FIELD16(0x0004)
1597#define EEPROM_NIC_EXTERNAL_LNA_A FIELD16(0x0008)
1598#define EEPROM_NIC_CARDBUS_ACCEL FIELD16(0x0010)
1599#define EEPROM_NIC_BW40M_SB_BG FIELD16(0x0020)
1600#define EEPROM_NIC_BW40M_SB_A FIELD16(0x0040)
1601#define EEPROM_NIC_WPS_PBC FIELD16(0x0080)
1602#define EEPROM_NIC_BW40M_BG FIELD16(0x0100)
1603#define EEPROM_NIC_BW40M_A FIELD16(0x0200)
1604
1605/*
1606 * EEPROM frequency
1607 */
1608#define EEPROM_FREQ 0x001d
1609#define EEPROM_FREQ_OFFSET FIELD16(0x00ff)
1610#define EEPROM_FREQ_LED_MODE FIELD16(0x7f00)
1611#define EEPROM_FREQ_LED_POLARITY FIELD16(0x1000)
1612
1613/*
1614 * EEPROM LED
1615 * POLARITY_RDY_G: Polarity RDY_G setting.
1616 * POLARITY_RDY_A: Polarity RDY_A setting.
1617 * POLARITY_ACT: Polarity ACT setting.
1618 * POLARITY_GPIO_0: Polarity GPIO0 setting.
1619 * POLARITY_GPIO_1: Polarity GPIO1 setting.
1620 * POLARITY_GPIO_2: Polarity GPIO2 setting.
1621 * POLARITY_GPIO_3: Polarity GPIO3 setting.
1622 * POLARITY_GPIO_4: Polarity GPIO4 setting.
1623 * LED_MODE: Led mode.
1624 */
1625#define EEPROM_LED1 0x001e
1626#define EEPROM_LED2 0x001f
1627#define EEPROM_LED3 0x0020
1628#define EEPROM_LED_POLARITY_RDY_BG FIELD16(0x0001)
1629#define EEPROM_LED_POLARITY_RDY_A FIELD16(0x0002)
1630#define EEPROM_LED_POLARITY_ACT FIELD16(0x0004)
1631#define EEPROM_LED_POLARITY_GPIO_0 FIELD16(0x0008)
1632#define EEPROM_LED_POLARITY_GPIO_1 FIELD16(0x0010)
1633#define EEPROM_LED_POLARITY_GPIO_2 FIELD16(0x0020)
1634#define EEPROM_LED_POLARITY_GPIO_3 FIELD16(0x0040)
1635#define EEPROM_LED_POLARITY_GPIO_4 FIELD16(0x0080)
1636#define EEPROM_LED_LED_MODE FIELD16(0x1f00)
1637
1638/*
1639 * EEPROM LNA
1640 */
1641#define EEPROM_LNA 0x0022
1642#define EEPROM_LNA_BG FIELD16(0x00ff)
1643#define EEPROM_LNA_A0 FIELD16(0xff00)
1644
1645/*
1646 * EEPROM RSSI BG offset
1647 */
1648#define EEPROM_RSSI_BG 0x0023
1649#define EEPROM_RSSI_BG_OFFSET0 FIELD16(0x00ff)
1650#define EEPROM_RSSI_BG_OFFSET1 FIELD16(0xff00)
1651
1652/*
1653 * EEPROM RSSI BG2 offset
1654 */
1655#define EEPROM_RSSI_BG2 0x0024
1656#define EEPROM_RSSI_BG2_OFFSET2 FIELD16(0x00ff)
1657#define EEPROM_RSSI_BG2_LNA_A1 FIELD16(0xff00)
1658
1659/*
1660 * EEPROM RSSI A offset
1661 */
1662#define EEPROM_RSSI_A 0x0025
1663#define EEPROM_RSSI_A_OFFSET0 FIELD16(0x00ff)
1664#define EEPROM_RSSI_A_OFFSET1 FIELD16(0xff00)
1665
1666/*
1667 * EEPROM RSSI A2 offset
1668 */
1669#define EEPROM_RSSI_A2 0x0026
1670#define EEPROM_RSSI_A2_OFFSET2 FIELD16(0x00ff)
1671#define EEPROM_RSSI_A2_LNA_A2 FIELD16(0xff00)
1672
1673/*
1674 * EEPROM TXpower delta: 20MHZ AND 40 MHZ use different power.
1675 * This is delta in 40MHZ.
1676 * VALUE: Tx Power dalta value (MAX=4)
1677 * TYPE: 1: Plus the delta value, 0: minus the delta value
1678 * TXPOWER: Enable:
1679 */
1680#define EEPROM_TXPOWER_DELTA 0x0028
1681#define EEPROM_TXPOWER_DELTA_VALUE FIELD16(0x003f)
1682#define EEPROM_TXPOWER_DELTA_TYPE FIELD16(0x0040)
1683#define EEPROM_TXPOWER_DELTA_TXPOWER FIELD16(0x0080)
1684
1685/*
1686 * EEPROM TXPOWER 802.11BG
1687 */
1688#define EEPROM_TXPOWER_BG1 0x0029
1689#define EEPROM_TXPOWER_BG2 0x0030
1690#define EEPROM_TXPOWER_BG_SIZE 7
1691#define EEPROM_TXPOWER_BG_1 FIELD16(0x00ff)
1692#define EEPROM_TXPOWER_BG_2 FIELD16(0xff00)
1693
1694/*
1695 * EEPROM TXPOWER 802.11A
1696 */
1697#define EEPROM_TXPOWER_A1 0x003c
1698#define EEPROM_TXPOWER_A2 0x0053
1699#define EEPROM_TXPOWER_A_SIZE 6
1700#define EEPROM_TXPOWER_A_1 FIELD16(0x00ff)
1701#define EEPROM_TXPOWER_A_2 FIELD16(0xff00)
1702
1703/*
1704 * EEPROM TXpower byrate: 20MHZ power
1705 */
1706#define EEPROM_TXPOWER_BYRATE 0x006f
1707
1708/*
1709 * EEPROM BBP.
1710 */
1711#define EEPROM_BBP_START 0x0078
1712#define EEPROM_BBP_SIZE 16
1713#define EEPROM_BBP_VALUE FIELD16(0x00ff)
1714#define EEPROM_BBP_REG_ID FIELD16(0xff00)
1715
1716/*
1717 * MCU mailbox commands.
1718 */
1719#define MCU_SLEEP 0x30
1720#define MCU_WAKEUP 0x31
1721#define MCU_RADIO_OFF 0x35
1722#define MCU_CURRENT 0x36
1723#define MCU_LED 0x50
1724#define MCU_LED_STRENGTH 0x51
1725#define MCU_LED_1 0x52
1726#define MCU_LED_2 0x53
1727#define MCU_LED_3 0x54
1728#define MCU_RADAR 0x60
1729#define MCU_BOOT_SIGNAL 0x72
1730#define MCU_BBP_SIGNAL 0x80
1731#define MCU_POWER_SAVE 0x83
1732
1733/*
1734 * MCU mailbox tokens
1735 */
1736#define TOKEN_WAKUP 3
1737
1738/*
1739 * DMA descriptor defines.
1740 */
1741#define TXD_DESC_SIZE ( 4 * sizeof(__le32) )
1742#define TXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
1743#define TXWI_DESC_SIZE ( 4 * sizeof(__le32) )
1744#define RXD_DESC_SIZE ( 1 * sizeof(__le32) )
1745#define RXWI_DESC_SIZE ( 4 * sizeof(__le32) )
1746
1747/*
1748 * TX descriptor format for TX, PRIO and Beacon Ring.
1749 */
1750
1751/*
1752 * Word0
1753 */
1754#define TXD_W0_SD_PTR0 FIELD32(0xffffffff)
1755
1756/*
1757 * Word1
1758 */
1759#define TXD_W1_SD_LEN1 FIELD32(0x00003fff)
1760#define TXD_W1_LAST_SEC1 FIELD32(0x00004000)
1761#define TXD_W1_BURST FIELD32(0x00008000)
1762#define TXD_W1_SD_LEN0 FIELD32(0x3fff0000)
1763#define TXD_W1_LAST_SEC0 FIELD32(0x40000000)
1764#define TXD_W1_DMA_DONE FIELD32(0x80000000)
1765
1766/*
1767 * Word2
1768 */
1769#define TXD_W2_SD_PTR1 FIELD32(0xffffffff)
1770
1771/*
1772 * Word3
1773 * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
1774 * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
1775 * 0:MGMT, 1:HCCA 2:EDCA
1776 */
1777#define TXD_W3_WIV FIELD32(0x01000000)
1778#define TXD_W3_QSEL FIELD32(0x06000000)
1779#define TXD_W3_TCO FIELD32(0x20000000)
1780#define TXD_W3_UCO FIELD32(0x40000000)
1781#define TXD_W3_ICO FIELD32(0x80000000)
1782
1783/*
1784 * TX Info structure
1785 */
1786
1787/*
1788 * Word0
1789 * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
1790 * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
1791 * 0:MGMT, 1:HCCA 2:EDCA
1792 * USB_DMA_NEXT_VALID: Used ONLY in USB bulk Aggregation, NextValid
1793 * DMA_TX_BURST: used ONLY in USB bulk Aggregation.
1794 * Force USB DMA transmit frame from current selected endpoint
1795 */
1796#define TXINFO_W0_USB_DMA_TX_PKT_LEN FIELD32(0x0000ffff)
1797#define TXINFO_W0_WIV FIELD32(0x01000000)
1798#define TXINFO_W0_QSEL FIELD32(0x06000000)
1799#define TXINFO_W0_SW_USE_LAST_ROUND FIELD32(0x08000000)
1800#define TXINFO_W0_USB_DMA_NEXT_VALID FIELD32(0x40000000)
1801#define TXINFO_W0_USB_DMA_TX_BURST FIELD32(0x80000000)
1802
1803/*
1804 * TX WI structure
1805 */
1806
1807/*
1808 * Word0
1809 * FRAG: 1 To inform TKIP engine this is a fragment.
1810 * MIMO_PS: The remote peer is in dynamic MIMO-PS mode
1811 * TX_OP: 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs
1812 * BW: Channel bandwidth 20MHz or 40 MHz
1813 * STBC: 1: STBC support MCS =0-7, 2,3 : RESERVED
1814 */
1815#define TXWI_W0_FRAG FIELD32(0x00000001)
1816#define TXWI_W0_MIMO_PS FIELD32(0x00000002)
1817#define TXWI_W0_CF_ACK FIELD32(0x00000004)
1818#define TXWI_W0_TS FIELD32(0x00000008)
1819#define TXWI_W0_AMPDU FIELD32(0x00000010)
1820#define TXWI_W0_MPDU_DENSITY FIELD32(0x000000e0)
1821#define TXWI_W0_TX_OP FIELD32(0x00000300)
1822#define TXWI_W0_MCS FIELD32(0x007f0000)
1823#define TXWI_W0_BW FIELD32(0x00800000)
1824#define TXWI_W0_SHORT_GI FIELD32(0x01000000)
1825#define TXWI_W0_STBC FIELD32(0x06000000)
1826#define TXWI_W0_IFS FIELD32(0x08000000)
1827#define TXWI_W0_PHYMODE FIELD32(0xc0000000)
1828
1829/*
1830 * Word1
1831 */
1832#define TXWI_W1_ACK FIELD32(0x00000001)
1833#define TXWI_W1_NSEQ FIELD32(0x00000002)
1834#define TXWI_W1_BW_WIN_SIZE FIELD32(0x000000fc)
1835#define TXWI_W1_WIRELESS_CLI_ID FIELD32(0x0000ff00)
1836#define TXWI_W1_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
1837#define TXWI_W1_PACKETID FIELD32(0xf0000000)
1838
1839/*
1840 * Word2
1841 */
1842#define TXWI_W2_IV FIELD32(0xffffffff)
1843
1844/*
1845 * Word3
1846 */
1847#define TXWI_W3_EIV FIELD32(0xffffffff)
1848
1849/*
1850 * RX descriptor format for RX Ring.
1851 */
1852
1853/*
1854 * Word0
1855 * UNICAST_TO_ME: This RX frame is unicast to me.
1856 * MULTICAST: This is a multicast frame.
1857 * BROADCAST: This is a broadcast frame.
1858 * MY_BSS: this frame belongs to the same BSSID.
1859 * CRC_ERROR: CRC error.
1860 * CIPHER_ERROR: 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid.
1861 * AMSDU: rx with 802.3 header, not 802.11 header.
1862 */
1863
1864#define RXD_W0_BA FIELD32(0x00000001)
1865#define RXD_W0_DATA FIELD32(0x00000002)
1866#define RXD_W0_NULLDATA FIELD32(0x00000004)
1867#define RXD_W0_FRAG FIELD32(0x00000008)
1868#define RXD_W0_UNICAST_TO_ME FIELD32(0x00000010)
1869#define RXD_W0_MULTICAST FIELD32(0x00000020)
1870#define RXD_W0_BROADCAST FIELD32(0x00000040)
1871#define RXD_W0_MY_BSS FIELD32(0x00000080)
1872#define RXD_W0_CRC_ERROR FIELD32(0x00000100)
1873#define RXD_W0_CIPHER_ERROR FIELD32(0x00000600)
1874#define RXD_W0_AMSDU FIELD32(0x00000800)
1875#define RXD_W0_HTC FIELD32(0x00001000)
1876#define RXD_W0_RSSI FIELD32(0x00002000)
1877#define RXD_W0_L2PAD FIELD32(0x00004000)
1878#define RXD_W0_AMPDU FIELD32(0x00008000)
1879#define RXD_W0_DECRYPTED FIELD32(0x00010000)
1880#define RXD_W0_PLCP_RSSI FIELD32(0x00020000)
1881#define RXD_W0_CIPHER_ALG FIELD32(0x00040000)
1882#define RXD_W0_LAST_AMSDU FIELD32(0x00080000)
1883#define RXD_W0_PLCP_SIGNAL FIELD32(0xfff00000)
1884
1885/*
1886 * RX WI structure
1887 */
1888
1889/*
1890 * Word0
1891 */
1892#define RXWI_W0_WIRELESS_CLI_ID FIELD32(0x000000ff)
1893#define RXWI_W0_KEY_INDEX FIELD32(0x00000300)
1894#define RXWI_W0_BSSID FIELD32(0x00001c00)
1895#define RXWI_W0_UDF FIELD32(0x0000e000)
1896#define RXWI_W0_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
1897#define RXWI_W0_TID FIELD32(0xf0000000)
1898
1899/*
1900 * Word1
1901 */
1902#define RXWI_W1_FRAG FIELD32(0x0000000f)
1903#define RXWI_W1_SEQUENCE FIELD32(0x0000fff0)
1904#define RXWI_W1_MCS FIELD32(0x007f0000)
1905#define RXWI_W1_BW FIELD32(0x00800000)
1906#define RXWI_W1_SHORT_GI FIELD32(0x01000000)
1907#define RXWI_W1_STBC FIELD32(0x06000000)
1908#define RXWI_W1_PHYMODE FIELD32(0xc0000000)
1909
1910/*
1911 * Word2
1912 */
1913#define RXWI_W2_RSSI0 FIELD32(0x000000ff)
1914#define RXWI_W2_RSSI1 FIELD32(0x0000ff00)
1915#define RXWI_W2_RSSI2 FIELD32(0x00ff0000)
1916
1917/*
1918 * Word3
1919 */
1920#define RXWI_W3_SNR0 FIELD32(0x000000ff)
1921#define RXWI_W3_SNR1 FIELD32(0x0000ff00)
1922
1923/*
1924 * Macro's for converting txpower from EEPROM to mac80211 value
1925 * and from mac80211 value to register value.
1926 */
1927#define MIN_G_TXPOWER 0
1928#define MIN_A_TXPOWER -7
1929#define MAX_G_TXPOWER 31
1930#define MAX_A_TXPOWER 15
1931#define DEFAULT_TXPOWER 5
1932
1933#define TXPOWER_G_FROM_DEV(__txpower) \
1934 ((__txpower) > MAX_G_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
1935
1936#define TXPOWER_G_TO_DEV(__txpower) \
1937 clamp_t(char, __txpower, MIN_G_TXPOWER, MAX_G_TXPOWER)
1938
1939#define TXPOWER_A_FROM_DEV(__txpower) \
1940 ((__txpower) > MAX_A_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
1941
1942#define TXPOWER_A_TO_DEV(__txpower) \
1943 clamp_t(char, __txpower, MIN_A_TXPOWER, MAX_A_TXPOWER)
1944
1945#endif /* RT2800USB_H */
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 84bd6f19acb0..2b64a6198698 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -103,6 +103,15 @@
103#define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate)) 103#define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate))
104 104
105/* 105/*
106 * Determine the alignment requirement,
107 * to make sure the 802.11 payload is padded to a 4-byte boundrary
108 * we must determine the address of the payload and calculate the
109 * amount of bytes needed to move the data.
110 */
111#define ALIGN_SIZE(__skb, __header) \
112 ( ((unsigned long)((__skb)->data + (__header))) & 3 )
113
114/*
106 * Standard timing and size defines. 115 * Standard timing and size defines.
107 * These values should follow the ieee80211 specifications. 116 * These values should follow the ieee80211 specifications.
108 */ 117 */
@@ -138,6 +147,7 @@ struct rt2x00_chip {
138#define RT2561 0x0302 147#define RT2561 0x0302
139#define RT2661 0x0401 148#define RT2661 0x0401
140#define RT2571 0x1300 149#define RT2571 0x1300
150#define RT2870 0x1600
141 151
142 u16 rf; 152 u16 rf;
143 u32 rev; 153 u32 rev;
@@ -357,6 +367,7 @@ static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif)
357 * for @tx_power_a, @tx_power_bg and @channels. 367 * for @tx_power_a, @tx_power_bg and @channels.
358 * @channels: Device/chipset specific channel values (See &struct rf_channel). 368 * @channels: Device/chipset specific channel values (See &struct rf_channel).
359 * @channels_info: Additional information for channels (See &struct channel_info). 369 * @channels_info: Additional information for channels (See &struct channel_info).
370 * @ht: Driver HT Capabilities (See &ieee80211_sta_ht_cap).
360 */ 371 */
361struct hw_mode_spec { 372struct hw_mode_spec {
362 unsigned int supported_bands; 373 unsigned int supported_bands;
@@ -370,6 +381,8 @@ struct hw_mode_spec {
370 unsigned int num_channels; 381 unsigned int num_channels;
371 const struct rf_channel *channels; 382 const struct rf_channel *channels;
372 const struct channel_info *channels_info; 383 const struct channel_info *channels_info;
384
385 struct ieee80211_sta_ht_cap ht;
373}; 386};
374 387
375/* 388/*
@@ -404,6 +417,8 @@ struct rt2x00lib_erp {
404 short pifs; 417 short pifs;
405 short difs; 418 short difs;
406 short eifs; 419 short eifs;
420
421 u16 beacon_int;
407}; 422};
408 423
409/* 424/*
@@ -590,6 +605,7 @@ enum rt2x00_flags {
590 DRIVER_REQUIRE_SCHEDULED, 605 DRIVER_REQUIRE_SCHEDULED,
591 DRIVER_REQUIRE_DMA, 606 DRIVER_REQUIRE_DMA,
592 DRIVER_REQUIRE_COPY_IV, 607 DRIVER_REQUIRE_COPY_IV,
608 DRIVER_REQUIRE_L2PAD,
593 609
594 /* 610 /*
595 * Driver features 611 * Driver features
@@ -606,6 +622,7 @@ enum rt2x00_flags {
606 CONFIG_EXTERNAL_LNA_BG, 622 CONFIG_EXTERNAL_LNA_BG,
607 CONFIG_DOUBLE_ANTENNA, 623 CONFIG_DOUBLE_ANTENNA,
608 CONFIG_DISABLE_LINK_TUNING, 624 CONFIG_DISABLE_LINK_TUNING,
625 CONFIG_CHANNEL_HT40,
609}; 626};
610 627
611/* 628/*
@@ -672,6 +689,12 @@ struct rt2x00_dev {
672 unsigned long flags; 689 unsigned long flags;
673 690
674 /* 691 /*
692 * Device information, Bus IRQ and name (PCI, SoC)
693 */
694 int irq;
695 const char *name;
696
697 /*
675 * Chipset identification. 698 * Chipset identification.
676 */ 699 */
677 struct rt2x00_chip chip; 700 struct rt2x00_chip chip;
@@ -772,6 +795,13 @@ struct rt2x00_dev {
772 u8 freq_offset; 795 u8 freq_offset;
773 796
774 /* 797 /*
798 * Calibration information (for rt2800usb & rt2800pci).
799 * [0] -> BW20
800 * [1] -> BW40
801 */
802 u8 calibration[2];
803
804 /*
775 * Low level statistics which will have 805 * Low level statistics which will have
776 * to be kept up to date while device is running. 806 * to be kept up to date while device is running.
777 */ 807 */
@@ -860,6 +890,18 @@ static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev,
860 rt2x00dev->chip.rev = rev; 890 rt2x00dev->chip.rev = rev;
861} 891}
862 892
893static inline void rt2x00_set_chip_rt(struct rt2x00_dev *rt2x00dev,
894 const u16 rt)
895{
896 rt2x00dev->chip.rt = rt;
897}
898
899static inline void rt2x00_set_chip_rf(struct rt2x00_dev *rt2x00dev,
900 const u16 rf, const u32 rev)
901{
902 rt2x00_set_chip(rt2x00dev, rt2x00dev->chip.rt, rf, rev);
903}
904
863static inline char rt2x00_rt(const struct rt2x00_chip *chipset, const u16 chip) 905static inline char rt2x00_rt(const struct rt2x00_chip *chipset, const u16 chip)
864{ 906{
865 return (chipset->rt == chip); 907 return (chipset->rt == chip);
@@ -875,11 +917,10 @@ static inline u32 rt2x00_rev(const struct rt2x00_chip *chipset)
875 return chipset->rev; 917 return chipset->rev;
876} 918}
877 919
878static inline u16 rt2x00_check_rev(const struct rt2x00_chip *chipset, 920static inline bool rt2x00_check_rev(const struct rt2x00_chip *chipset,
879 const u32 rev) 921 const u32 mask, const u32 rev)
880{ 922{
881 return (((chipset->rev & 0xffff0) == rev) && 923 return ((chipset->rev & mask) == rev);
882 !!(chipset->rev & 0x0000f));
883} 924}
884 925
885/** 926/**
@@ -925,9 +966,6 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw,
925void rt2x00mac_remove_interface(struct ieee80211_hw *hw, 966void rt2x00mac_remove_interface(struct ieee80211_hw *hw,
926 struct ieee80211_if_init_conf *conf); 967 struct ieee80211_if_init_conf *conf);
927int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed); 968int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed);
928int rt2x00mac_config_interface(struct ieee80211_hw *hw,
929 struct ieee80211_vif *vif,
930 struct ieee80211_if_conf *conf);
931void rt2x00mac_configure_filter(struct ieee80211_hw *hw, 969void rt2x00mac_configure_filter(struct ieee80211_hw *hw,
932 unsigned int changed_flags, 970 unsigned int changed_flags,
933 unsigned int *total_flags, 971 unsigned int *total_flags,
diff --git a/drivers/net/wireless/rt2x00/rt2x00config.c b/drivers/net/wireless/rt2x00/rt2x00config.c
index 9c2f5517af2a..c5bbf0b6e207 100644
--- a/drivers/net/wireless/rt2x00/rt2x00config.c
+++ b/drivers/net/wireless/rt2x00/rt2x00config.c
@@ -106,6 +106,7 @@ void rt2x00lib_config_erp(struct rt2x00_dev *rt2x00dev,
106 } 106 }
107 107
108 erp.basic_rates = bss_conf->basic_rates; 108 erp.basic_rates = bss_conf->basic_rates;
109 erp.beacon_int = bss_conf->beacon_int;
109 110
110 rt2x00dev->ops->lib->config_erp(rt2x00dev, &erp); 111 rt2x00dev->ops->lib->config_erp(rt2x00dev, &erp);
111} 112}
@@ -173,6 +174,11 @@ void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,
173 libconf.conf = conf; 174 libconf.conf = conf;
174 175
175 if (ieee80211_flags & IEEE80211_CONF_CHANGE_CHANNEL) { 176 if (ieee80211_flags & IEEE80211_CONF_CHANGE_CHANNEL) {
177 if (conf_is_ht40(conf))
178 __set_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags);
179 else
180 __clear_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags);
181
176 memcpy(&libconf.rf, 182 memcpy(&libconf.rf,
177 &rt2x00dev->spec.channels[conf->channel->hw_value], 183 &rt2x00dev->spec.channels[conf->channel->hw_value],
178 sizeof(libconf.rf)); 184 sizeof(libconf.rf));
diff --git a/drivers/net/wireless/rt2x00/rt2x00crypto.c b/drivers/net/wireless/rt2x00/rt2x00crypto.c
index 0b41845d9543..bc4e81e21841 100644
--- a/drivers/net/wireless/rt2x00/rt2x00crypto.c
+++ b/drivers/net/wireless/rt2x00/rt2x00crypto.c
@@ -33,7 +33,7 @@ enum cipher rt2x00crypto_key_to_cipher(struct ieee80211_key_conf *key)
33{ 33{
34 switch (key->alg) { 34 switch (key->alg) {
35 case ALG_WEP: 35 case ALG_WEP:
36 if (key->keylen == LEN_WEP40) 36 if (key->keylen == WLAN_KEY_LEN_WEP40)
37 return CIPHER_WEP64; 37 return CIPHER_WEP64;
38 else 38 else
39 return CIPHER_WEP128; 39 return CIPHER_WEP128;
@@ -65,7 +65,8 @@ void rt2x00crypto_create_tx_descriptor(struct queue_entry *entry,
65 __set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags); 65 __set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags);
66 66
67 txdesc->key_idx = hw_key->hw_key_idx; 67 txdesc->key_idx = hw_key->hw_key_idx;
68 txdesc->iv_offset = ieee80211_get_hdrlen_from_skb(entry->skb); 68 txdesc->iv_offset = txdesc->header_length;
69 txdesc->iv_len = hw_key->iv_len;
69 70
70 if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV)) 71 if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV))
71 __set_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags); 72 __set_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags);
@@ -103,47 +104,44 @@ unsigned int rt2x00crypto_tx_overhead(struct rt2x00_dev *rt2x00dev,
103 return overhead; 104 return overhead;
104} 105}
105 106
106void rt2x00crypto_tx_copy_iv(struct sk_buff *skb, unsigned int iv_len) 107void rt2x00crypto_tx_copy_iv(struct sk_buff *skb, struct txentry_desc *txdesc)
107{ 108{
108 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); 109 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
109 unsigned int header_length = ieee80211_get_hdrlen_from_skb(skb);
110 110
111 if (unlikely(!iv_len)) 111 if (unlikely(!txdesc->iv_len))
112 return; 112 return;
113 113
114 /* Copy IV/EIV data */ 114 /* Copy IV/EIV data */
115 memcpy(skbdesc->iv, skb->data + header_length, iv_len); 115 memcpy(skbdesc->iv, skb->data + txdesc->iv_offset, txdesc->iv_len);
116} 116}
117 117
118void rt2x00crypto_tx_remove_iv(struct sk_buff *skb, unsigned int iv_len) 118void rt2x00crypto_tx_remove_iv(struct sk_buff *skb, struct txentry_desc *txdesc)
119{ 119{
120 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); 120 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
121 unsigned int header_length = ieee80211_get_hdrlen_from_skb(skb);
122 121
123 if (unlikely(!iv_len)) 122 if (unlikely(!txdesc->iv_len))
124 return; 123 return;
125 124
126 /* Copy IV/EIV data */ 125 /* Copy IV/EIV data */
127 memcpy(skbdesc->iv, skb->data + header_length, iv_len); 126 memcpy(skbdesc->iv, skb->data + txdesc->iv_offset, txdesc->iv_len);
128 127
129 /* Move ieee80211 header */ 128 /* Move ieee80211 header */
130 memmove(skb->data + iv_len, skb->data, header_length); 129 memmove(skb->data + txdesc->iv_len, skb->data, txdesc->iv_offset);
131 130
132 /* Pull buffer to correct size */ 131 /* Pull buffer to correct size */
133 skb_pull(skb, iv_len); 132 skb_pull(skb, txdesc->iv_len);
134 133
135 /* IV/EIV data has officially be stripped */ 134 /* IV/EIV data has officially be stripped */
136 skbdesc->flags |= FRAME_DESC_IV_STRIPPED; 135 skbdesc->flags |= SKBDESC_IV_STRIPPED;
137} 136}
138 137
139void rt2x00crypto_tx_insert_iv(struct sk_buff *skb) 138void rt2x00crypto_tx_insert_iv(struct sk_buff *skb, unsigned int header_length)
140{ 139{
141 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); 140 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
142 unsigned int header_length = ieee80211_get_hdrlen_from_skb(skb);
143 const unsigned int iv_len = 141 const unsigned int iv_len =
144 ((!!(skbdesc->iv[0])) * 4) + ((!!(skbdesc->iv[1])) * 4); 142 ((!!(skbdesc->iv[0])) * 4) + ((!!(skbdesc->iv[1])) * 4);
145 143
146 if (!(skbdesc->flags & FRAME_DESC_IV_STRIPPED)) 144 if (!(skbdesc->flags & SKBDESC_IV_STRIPPED))
147 return; 145 return;
148 146
149 skb_push(skb, iv_len); 147 skb_push(skb, iv_len);
@@ -155,14 +153,15 @@ void rt2x00crypto_tx_insert_iv(struct sk_buff *skb)
155 memcpy(skb->data + header_length, skbdesc->iv, iv_len); 153 memcpy(skb->data + header_length, skbdesc->iv, iv_len);
156 154
157 /* IV/EIV data has returned into the frame */ 155 /* IV/EIV data has returned into the frame */
158 skbdesc->flags &= ~FRAME_DESC_IV_STRIPPED; 156 skbdesc->flags &= ~SKBDESC_IV_STRIPPED;
159} 157}
160 158
161void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, unsigned int align, 159void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, bool l2pad,
162 unsigned int header_length, 160 unsigned int header_length,
163 struct rxdone_entry_desc *rxdesc) 161 struct rxdone_entry_desc *rxdesc)
164{ 162{
165 unsigned int payload_len = rxdesc->size - header_length; 163 unsigned int payload_len = rxdesc->size - header_length;
164 unsigned int align = ALIGN_SIZE(skb, header_length);
166 unsigned int iv_len; 165 unsigned int iv_len;
167 unsigned int icv_len; 166 unsigned int icv_len;
168 unsigned int transfer = 0; 167 unsigned int transfer = 0;
@@ -192,32 +191,48 @@ void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, unsigned int align,
192 } 191 }
193 192
194 /* 193 /*
195 * Make room for new data, note that we increase both 194 * Make room for new data. There are 2 possibilities
196 * headsize and tailsize when required. The tailsize is 195 * either the alignment is already present between
197 * only needed when ICV data needs to be inserted and 196 * the 802.11 header and payload. In that case we
198 * the padding is smaller than the ICV data. 197 * we have to move the header less then the iv_len
199 * When alignment requirements is greater than the 198 * since we can use the already available l2pad bytes
200 * ICV data we must trim the skb to the correct size 199 * for the iv data.
201 * because we need to remove the extra bytes. 200 * When the alignment must be added manually we must
201 * move the header more then iv_len since we must
202 * make room for the payload move as well.
202 */ 203 */
203 skb_push(skb, iv_len + align); 204 if (l2pad) {
204 if (align < icv_len) 205 skb_push(skb, iv_len - align);
205 skb_put(skb, icv_len - align); 206 skb_put(skb, icv_len);
206 else if (align > icv_len)
207 skb_trim(skb, rxdesc->size + iv_len + icv_len);
208 207
209 /* Move ieee80211 header */ 208 /* Move ieee80211 header */
210 memmove(skb->data + transfer, 209 memmove(skb->data + transfer,
211 skb->data + transfer + iv_len + align, 210 skb->data + transfer + (iv_len - align),
212 header_length); 211 header_length);
213 transfer += header_length; 212 transfer += header_length;
213 } else {
214 skb_push(skb, iv_len + align);
215 if (align < icv_len)
216 skb_put(skb, icv_len - align);
217 else if (align > icv_len)
218 skb_trim(skb, rxdesc->size + iv_len + icv_len);
219
220 /* Move ieee80211 header */
221 memmove(skb->data + transfer,
222 skb->data + transfer + iv_len + align,
223 header_length);
224 transfer += header_length;
225 }
214 226
215 /* Copy IV/EIV data */ 227 /* Copy IV/EIV data */
216 memcpy(skb->data + transfer, rxdesc->iv, iv_len); 228 memcpy(skb->data + transfer, rxdesc->iv, iv_len);
217 transfer += iv_len; 229 transfer += iv_len;
218 230
219 /* Move payload */ 231 /*
220 if (align) { 232 * Move payload for alignment purposes. Note that
233 * this is only needed when no l2 padding is present.
234 */
235 if (!l2pad) {
221 memmove(skb->data + transfer, 236 memmove(skb->data + transfer,
222 skb->data + transfer + align, 237 skb->data + transfer + align,
223 payload_len); 238 payload_len);
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index 5752aaae906b..57813e72c808 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -227,6 +227,7 @@ void rt2x00lib_txdone(struct queue_entry *entry,
227 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb); 227 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
228 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 228 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
229 enum data_queue_qid qid = skb_get_queue_mapping(entry->skb); 229 enum data_queue_qid qid = skb_get_queue_mapping(entry->skb);
230 unsigned int header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
230 u8 rate_idx, rate_flags; 231 u8 rate_idx, rate_flags;
231 232
232 /* 233 /*
@@ -235,13 +236,19 @@ void rt2x00lib_txdone(struct queue_entry *entry,
235 rt2x00queue_unmap_skb(rt2x00dev, entry->skb); 236 rt2x00queue_unmap_skb(rt2x00dev, entry->skb);
236 237
237 /* 238 /*
239 * Remove L2 padding which was added during
240 */
241 if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags))
242 rt2x00queue_payload_align(entry->skb, true, header_length);
243
244 /*
238 * If the IV/EIV data was stripped from the frame before it was 245 * If the IV/EIV data was stripped from the frame before it was
239 * passed to the hardware, we should now reinsert it again because 246 * passed to the hardware, we should now reinsert it again because
240 * mac80211 will expect the the same data to be present it the 247 * mac80211 will expect the the same data to be present it the
241 * frame as it was passed to us. 248 * frame as it was passed to us.
242 */ 249 */
243 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) 250 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags))
244 rt2x00crypto_tx_insert_iv(entry->skb); 251 rt2x00crypto_tx_insert_iv(entry->skb, header_length);
245 252
246 /* 253 /*
247 * Send frame to debugfs immediately, after this call is completed 254 * Send frame to debugfs immediately, after this call is completed
@@ -253,7 +260,8 @@ void rt2x00lib_txdone(struct queue_entry *entry,
253 * Update TX statistics. 260 * Update TX statistics.
254 */ 261 */
255 rt2x00dev->link.qual.tx_success += 262 rt2x00dev->link.qual.tx_success +=
256 test_bit(TXDONE_SUCCESS, &txdesc->flags); 263 test_bit(TXDONE_SUCCESS, &txdesc->flags) ||
264 test_bit(TXDONE_UNKNOWN, &txdesc->flags);
257 rt2x00dev->link.qual.tx_failed += 265 rt2x00dev->link.qual.tx_failed +=
258 test_bit(TXDONE_FAILURE, &txdesc->flags); 266 test_bit(TXDONE_FAILURE, &txdesc->flags);
259 267
@@ -271,14 +279,16 @@ void rt2x00lib_txdone(struct queue_entry *entry,
271 tx_info->status.rates[1].idx = -1; /* terminate */ 279 tx_info->status.rates[1].idx = -1; /* terminate */
272 280
273 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) { 281 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
274 if (test_bit(TXDONE_SUCCESS, &txdesc->flags)) 282 if (test_bit(TXDONE_SUCCESS, &txdesc->flags) ||
283 test_bit(TXDONE_UNKNOWN, &txdesc->flags))
275 tx_info->flags |= IEEE80211_TX_STAT_ACK; 284 tx_info->flags |= IEEE80211_TX_STAT_ACK;
276 else if (test_bit(TXDONE_FAILURE, &txdesc->flags)) 285 else if (test_bit(TXDONE_FAILURE, &txdesc->flags))
277 rt2x00dev->low_level_stats.dot11ACKFailureCount++; 286 rt2x00dev->low_level_stats.dot11ACKFailureCount++;
278 } 287 }
279 288
280 if (rate_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 289 if (rate_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
281 if (test_bit(TXDONE_SUCCESS, &txdesc->flags)) 290 if (test_bit(TXDONE_SUCCESS, &txdesc->flags) ||
291 test_bit(TXDONE_UNKNOWN, &txdesc->flags))
282 rt2x00dev->low_level_stats.dot11RTSSuccessCount++; 292 rt2x00dev->low_level_stats.dot11RTSSuccessCount++;
283 else if (test_bit(TXDONE_FAILURE, &txdesc->flags)) 293 else if (test_bit(TXDONE_FAILURE, &txdesc->flags))
284 rt2x00dev->low_level_stats.dot11RTSFailureCount++; 294 rt2x00dev->low_level_stats.dot11RTSFailureCount++;
@@ -316,19 +326,54 @@ void rt2x00lib_txdone(struct queue_entry *entry,
316} 326}
317EXPORT_SYMBOL_GPL(rt2x00lib_txdone); 327EXPORT_SYMBOL_GPL(rt2x00lib_txdone);
318 328
329static int rt2x00lib_rxdone_read_signal(struct rt2x00_dev *rt2x00dev,
330 struct rxdone_entry_desc *rxdesc)
331{
332 struct ieee80211_supported_band *sband;
333 const struct rt2x00_rate *rate;
334 unsigned int i;
335 int signal;
336 int type;
337
338 /*
339 * For non-HT rates the MCS value needs to contain the
340 * actually used rate modulation (CCK or OFDM).
341 */
342 if (rxdesc->dev_flags & RXDONE_SIGNAL_MCS)
343 signal = RATE_MCS(rxdesc->rate_mode, rxdesc->signal);
344 else
345 signal = rxdesc->signal;
346
347 type = (rxdesc->dev_flags & RXDONE_SIGNAL_MASK);
348
349 sband = &rt2x00dev->bands[rt2x00dev->curr_band];
350 for (i = 0; i < sband->n_bitrates; i++) {
351 rate = rt2x00_get_rate(sband->bitrates[i].hw_value);
352
353 if (((type == RXDONE_SIGNAL_PLCP) &&
354 (rate->plcp == signal)) ||
355 ((type == RXDONE_SIGNAL_BITRATE) &&
356 (rate->bitrate == signal)) ||
357 ((type == RXDONE_SIGNAL_MCS) &&
358 (rate->mcs == signal))) {
359 return i;
360 }
361 }
362
363 WARNING(rt2x00dev, "Frame received with unrecognized signal, "
364 "signal=0x%.4x, type=%d.\n", signal, type);
365 return 0;
366}
367
319void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev, 368void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
320 struct queue_entry *entry) 369 struct queue_entry *entry)
321{ 370{
322 struct rxdone_entry_desc rxdesc; 371 struct rxdone_entry_desc rxdesc;
323 struct sk_buff *skb; 372 struct sk_buff *skb;
324 struct ieee80211_rx_status *rx_status = &rt2x00dev->rx_status; 373 struct ieee80211_rx_status *rx_status = &rt2x00dev->rx_status;
325 struct ieee80211_supported_band *sband;
326 const struct rt2x00_rate *rate;
327 unsigned int header_length; 374 unsigned int header_length;
328 unsigned int align; 375 bool l2pad;
329 unsigned int i; 376 int rate_idx;
330 int idx = -1;
331
332 /* 377 /*
333 * Allocate a new sk_buffer. If no new buffer available, drop the 378 * Allocate a new sk_buffer. If no new buffer available, drop the
334 * received frame and reuse the existing buffer. 379 * received frame and reuse the existing buffer.
@@ -348,12 +393,15 @@ void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
348 memset(&rxdesc, 0, sizeof(rxdesc)); 393 memset(&rxdesc, 0, sizeof(rxdesc));
349 rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc); 394 rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc);
350 395
396 /* Trim buffer to correct size */
397 skb_trim(entry->skb, rxdesc.size);
398
351 /* 399 /*
352 * The data behind the ieee80211 header must be 400 * The data behind the ieee80211 header must be
353 * aligned on a 4 byte boundary. 401 * aligned on a 4 byte boundary.
354 */ 402 */
355 header_length = ieee80211_get_hdrlen_from_skb(entry->skb); 403 header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
356 align = ((unsigned long)(entry->skb->data + header_length)) & 3; 404 l2pad = !!(rxdesc.dev_flags & RXDONE_L2PAD);
357 405
358 /* 406 /*
359 * Hardware might have stripped the IV/EIV/ICV data, 407 * Hardware might have stripped the IV/EIV/ICV data,
@@ -362,40 +410,24 @@ void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
362 * in which case we should reinsert the data into the frame. 410 * in which case we should reinsert the data into the frame.
363 */ 411 */
364 if ((rxdesc.dev_flags & RXDONE_CRYPTO_IV) && 412 if ((rxdesc.dev_flags & RXDONE_CRYPTO_IV) &&
365 (rxdesc.flags & RX_FLAG_IV_STRIPPED)) { 413 (rxdesc.flags & RX_FLAG_IV_STRIPPED))
366 rt2x00crypto_rx_insert_iv(entry->skb, align, 414 rt2x00crypto_rx_insert_iv(entry->skb, l2pad, header_length,
367 header_length, &rxdesc); 415 &rxdesc);
368 } else if (align) { 416 else
369 skb_push(entry->skb, align); 417 rt2x00queue_payload_align(entry->skb, l2pad, header_length);
370 /* Move entire frame in 1 command */
371 memmove(entry->skb->data, entry->skb->data + align,
372 rxdesc.size);
373 }
374
375 /* Update data pointers, trim buffer to correct size */
376 skb_trim(entry->skb, rxdesc.size);
377 418
378 /* 419 /*
379 * Update RX statistics. 420 * Check if the frame was received using HT. In that case,
421 * the rate is the MCS index and should be passed to mac80211
422 * directly. Otherwise we need to translate the signal to
423 * the correct bitrate index.
380 */ 424 */
381 sband = &rt2x00dev->bands[rt2x00dev->curr_band]; 425 if (rxdesc.rate_mode == RATE_MODE_CCK ||
382 for (i = 0; i < sband->n_bitrates; i++) { 426 rxdesc.rate_mode == RATE_MODE_OFDM) {
383 rate = rt2x00_get_rate(sband->bitrates[i].hw_value); 427 rate_idx = rt2x00lib_rxdone_read_signal(rt2x00dev, &rxdesc);
384 428 } else {
385 if (((rxdesc.dev_flags & RXDONE_SIGNAL_PLCP) && 429 rxdesc.flags |= RX_FLAG_HT;
386 (rate->plcp == rxdesc.signal)) || 430 rate_idx = rxdesc.signal;
387 ((rxdesc.dev_flags & RXDONE_SIGNAL_BITRATE) &&
388 (rate->bitrate == rxdesc.signal))) {
389 idx = i;
390 break;
391 }
392 }
393
394 if (idx < 0) {
395 WARNING(rt2x00dev, "Frame received with unrecognized signal,"
396 "signal=0x%.2x, type=%d.\n", rxdesc.signal,
397 (rxdesc.dev_flags & RXDONE_SIGNAL_MASK));
398 idx = 0;
399 } 431 }
400 432
401 /* 433 /*
@@ -405,7 +437,7 @@ void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
405 rt2x00debug_update_crypto(rt2x00dev, &rxdesc); 437 rt2x00debug_update_crypto(rt2x00dev, &rxdesc);
406 438
407 rx_status->mactime = rxdesc.timestamp; 439 rx_status->mactime = rxdesc.timestamp;
408 rx_status->rate_idx = idx; 440 rx_status->rate_idx = rate_idx;
409 rx_status->qual = rt2x00link_calculate_signal(rt2x00dev, rxdesc.rssi); 441 rx_status->qual = rt2x00link_calculate_signal(rt2x00dev, rxdesc.rssi);
410 rx_status->signal = rxdesc.rssi; 442 rx_status->signal = rxdesc.rssi;
411 rx_status->noise = rxdesc.noise; 443 rx_status->noise = rxdesc.noise;
@@ -440,72 +472,84 @@ const struct rt2x00_rate rt2x00_supported_rates[12] = {
440 .bitrate = 10, 472 .bitrate = 10,
441 .ratemask = BIT(0), 473 .ratemask = BIT(0),
442 .plcp = 0x00, 474 .plcp = 0x00,
475 .mcs = RATE_MCS(RATE_MODE_CCK, 0),
443 }, 476 },
444 { 477 {
445 .flags = DEV_RATE_CCK | DEV_RATE_SHORT_PREAMBLE, 478 .flags = DEV_RATE_CCK | DEV_RATE_SHORT_PREAMBLE,
446 .bitrate = 20, 479 .bitrate = 20,
447 .ratemask = BIT(1), 480 .ratemask = BIT(1),
448 .plcp = 0x01, 481 .plcp = 0x01,
482 .mcs = RATE_MCS(RATE_MODE_CCK, 1),
449 }, 483 },
450 { 484 {
451 .flags = DEV_RATE_CCK | DEV_RATE_SHORT_PREAMBLE, 485 .flags = DEV_RATE_CCK | DEV_RATE_SHORT_PREAMBLE,
452 .bitrate = 55, 486 .bitrate = 55,
453 .ratemask = BIT(2), 487 .ratemask = BIT(2),
454 .plcp = 0x02, 488 .plcp = 0x02,
489 .mcs = RATE_MCS(RATE_MODE_CCK, 2),
455 }, 490 },
456 { 491 {
457 .flags = DEV_RATE_CCK | DEV_RATE_SHORT_PREAMBLE, 492 .flags = DEV_RATE_CCK | DEV_RATE_SHORT_PREAMBLE,
458 .bitrate = 110, 493 .bitrate = 110,
459 .ratemask = BIT(3), 494 .ratemask = BIT(3),
460 .plcp = 0x03, 495 .plcp = 0x03,
496 .mcs = RATE_MCS(RATE_MODE_CCK, 3),
461 }, 497 },
462 { 498 {
463 .flags = DEV_RATE_OFDM, 499 .flags = DEV_RATE_OFDM,
464 .bitrate = 60, 500 .bitrate = 60,
465 .ratemask = BIT(4), 501 .ratemask = BIT(4),
466 .plcp = 0x0b, 502 .plcp = 0x0b,
503 .mcs = RATE_MCS(RATE_MODE_OFDM, 0),
467 }, 504 },
468 { 505 {
469 .flags = DEV_RATE_OFDM, 506 .flags = DEV_RATE_OFDM,
470 .bitrate = 90, 507 .bitrate = 90,
471 .ratemask = BIT(5), 508 .ratemask = BIT(5),
472 .plcp = 0x0f, 509 .plcp = 0x0f,
510 .mcs = RATE_MCS(RATE_MODE_OFDM, 1),
473 }, 511 },
474 { 512 {
475 .flags = DEV_RATE_OFDM, 513 .flags = DEV_RATE_OFDM,
476 .bitrate = 120, 514 .bitrate = 120,
477 .ratemask = BIT(6), 515 .ratemask = BIT(6),
478 .plcp = 0x0a, 516 .plcp = 0x0a,
517 .mcs = RATE_MCS(RATE_MODE_OFDM, 2),
479 }, 518 },
480 { 519 {
481 .flags = DEV_RATE_OFDM, 520 .flags = DEV_RATE_OFDM,
482 .bitrate = 180, 521 .bitrate = 180,
483 .ratemask = BIT(7), 522 .ratemask = BIT(7),
484 .plcp = 0x0e, 523 .plcp = 0x0e,
524 .mcs = RATE_MCS(RATE_MODE_OFDM, 3),
485 }, 525 },
486 { 526 {
487 .flags = DEV_RATE_OFDM, 527 .flags = DEV_RATE_OFDM,
488 .bitrate = 240, 528 .bitrate = 240,
489 .ratemask = BIT(8), 529 .ratemask = BIT(8),
490 .plcp = 0x09, 530 .plcp = 0x09,
531 .mcs = RATE_MCS(RATE_MODE_OFDM, 4),
491 }, 532 },
492 { 533 {
493 .flags = DEV_RATE_OFDM, 534 .flags = DEV_RATE_OFDM,
494 .bitrate = 360, 535 .bitrate = 360,
495 .ratemask = BIT(9), 536 .ratemask = BIT(9),
496 .plcp = 0x0d, 537 .plcp = 0x0d,
538 .mcs = RATE_MCS(RATE_MODE_OFDM, 5),
497 }, 539 },
498 { 540 {
499 .flags = DEV_RATE_OFDM, 541 .flags = DEV_RATE_OFDM,
500 .bitrate = 480, 542 .bitrate = 480,
501 .ratemask = BIT(10), 543 .ratemask = BIT(10),
502 .plcp = 0x08, 544 .plcp = 0x08,
545 .mcs = RATE_MCS(RATE_MODE_OFDM, 6),
503 }, 546 },
504 { 547 {
505 .flags = DEV_RATE_OFDM, 548 .flags = DEV_RATE_OFDM,
506 .bitrate = 540, 549 .bitrate = 540,
507 .ratemask = BIT(11), 550 .ratemask = BIT(11),
508 .plcp = 0x0c, 551 .plcp = 0x0c,
552 .mcs = RATE_MCS(RATE_MODE_OFDM, 7),
509 }, 553 },
510}; 554};
511 555
@@ -581,6 +625,8 @@ static int rt2x00lib_probe_hw_modes(struct rt2x00_dev *rt2x00dev,
581 rt2x00dev->bands[IEEE80211_BAND_2GHZ].bitrates = rates; 625 rt2x00dev->bands[IEEE80211_BAND_2GHZ].bitrates = rates;
582 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 626 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
583 &rt2x00dev->bands[IEEE80211_BAND_2GHZ]; 627 &rt2x00dev->bands[IEEE80211_BAND_2GHZ];
628 memcpy(&rt2x00dev->bands[IEEE80211_BAND_2GHZ].ht_cap,
629 &spec->ht, sizeof(spec->ht));
584 } 630 }
585 631
586 /* 632 /*
@@ -597,6 +643,8 @@ static int rt2x00lib_probe_hw_modes(struct rt2x00_dev *rt2x00dev,
597 rt2x00dev->bands[IEEE80211_BAND_5GHZ].bitrates = &rates[4]; 643 rt2x00dev->bands[IEEE80211_BAND_5GHZ].bitrates = &rates[4];
598 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 644 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
599 &rt2x00dev->bands[IEEE80211_BAND_5GHZ]; 645 &rt2x00dev->bands[IEEE80211_BAND_5GHZ];
646 memcpy(&rt2x00dev->bands[IEEE80211_BAND_5GHZ].ht_cap,
647 &spec->ht, sizeof(spec->ht));
600 } 648 }
601 649
602 return 0; 650 return 0;
diff --git a/drivers/net/wireless/rt2x00/rt2x00ht.c b/drivers/net/wireless/rt2x00/rt2x00ht.c
new file mode 100644
index 000000000000..e3cec839e540
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2x00ht.c
@@ -0,0 +1,69 @@
1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2x00lib
23 Abstract: rt2x00 HT specific routines.
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28
29#include "rt2x00.h"
30#include "rt2x00lib.h"
31
32void rt2x00ht_create_tx_descriptor(struct queue_entry *entry,
33 struct txentry_desc *txdesc,
34 const struct rt2x00_rate *hwrate)
35{
36 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
37 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
38
39 if (tx_info->control.sta)
40 txdesc->mpdu_density =
41 tx_info->control.sta->ht_cap.ampdu_density;
42 else
43 txdesc->mpdu_density = 0;
44
45 txdesc->ba_size = 7; /* FIXME: What value is needed? */
46 txdesc->stbc = 0; /* FIXME: What value is needed? */
47
48 txdesc->mcs = rt2x00_get_rate_mcs(hwrate->mcs);
49 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
50 txdesc->mcs |= 0x08;
51
52 /*
53 * Convert flags
54 */
55 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
56 __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
57
58 /*
59 * Determine HT Mix/Greenfield rate mode
60 */
61 if (txrate->flags & IEEE80211_TX_RC_MCS)
62 txdesc->rate_mode = RATE_MODE_HT_MIX;
63 if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
64 txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
65 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
66 __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
67 if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
68 __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
69}
diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h
index a631613177d0..39e00b3d7811 100644
--- a/drivers/net/wireless/rt2x00/rt2x00lib.h
+++ b/drivers/net/wireless/rt2x00/rt2x00lib.h
@@ -32,8 +32,8 @@
32 * Interval defines 32 * Interval defines
33 * Both the link tuner as the rfkill will be called once per second. 33 * Both the link tuner as the rfkill will be called once per second.
34 */ 34 */
35#define LINK_TUNE_INTERVAL ( round_jiffies_relative(HZ) ) 35#define LINK_TUNE_INTERVAL round_jiffies_relative(HZ)
36#define RFKILL_POLL_INTERVAL ( 1000 ) 36#define RFKILL_POLL_INTERVAL 1000
37 37
38/* 38/*
39 * rt2x00_rate: Per rate device information 39 * rt2x00_rate: Per rate device information
@@ -48,6 +48,7 @@ struct rt2x00_rate {
48 unsigned short ratemask; 48 unsigned short ratemask;
49 49
50 unsigned short plcp; 50 unsigned short plcp;
51 unsigned short mcs;
51}; 52};
52 53
53extern const struct rt2x00_rate rt2x00_supported_rates[12]; 54extern const struct rt2x00_rate rt2x00_supported_rates[12];
@@ -57,6 +58,14 @@ static inline const struct rt2x00_rate *rt2x00_get_rate(const u16 hw_value)
57 return &rt2x00_supported_rates[hw_value & 0xff]; 58 return &rt2x00_supported_rates[hw_value & 0xff];
58} 59}
59 60
61#define RATE_MCS(__mode, __mcs) \
62 ( (((__mode) & 0x00ff) << 8) | ((__mcs) & 0x00ff) )
63
64static inline int rt2x00_get_rate_mcs(const u16 mcs_value)
65{
66 return (mcs_value & 0x00ff);
67}
68
60/* 69/*
61 * Radio control handlers. 70 * Radio control handlers.
62 */ 71 */
@@ -113,6 +122,23 @@ void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb);
113void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); 122void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb);
114 123
115/** 124/**
125 * rt2x00queue_payload_align - Align 802.11 payload to 4-byte boundary
126 * @skb: The skb to align
127 * @l2pad: Should L2 padding be used
128 * @header_length: Length of 802.11 header
129 *
130 * This function prepares the @skb to be send to the device or mac80211.
131 * If @l2pad is set to true padding will occur between the 802.11 header
132 * and payload. Otherwise the padding will be done in front of the 802.11
133 * header.
134 * When @l2pad is set the function will check for the &SKBDESC_L2_PADDED
135 * flag in &skb_frame_desc. If that flag is set, the padding is removed
136 * and the flag cleared. Otherwise the padding is added and the flag is set.
137 */
138void rt2x00queue_payload_align(struct sk_buff *skb,
139 bool l2pad, unsigned int header_length);
140
141/**
116 * rt2x00queue_write_tx_frame - Write TX frame to hardware 142 * rt2x00queue_write_tx_frame - Write TX frame to hardware
117 * @queue: Queue over which the frame should be send 143 * @queue: Queue over which the frame should be send
118 * @skb: The skb to send 144 * @skb: The skb to send
@@ -295,10 +321,12 @@ void rt2x00crypto_create_tx_descriptor(struct queue_entry *entry,
295 struct txentry_desc *txdesc); 321 struct txentry_desc *txdesc);
296unsigned int rt2x00crypto_tx_overhead(struct rt2x00_dev *rt2x00dev, 322unsigned int rt2x00crypto_tx_overhead(struct rt2x00_dev *rt2x00dev,
297 struct sk_buff *skb); 323 struct sk_buff *skb);
298void rt2x00crypto_tx_copy_iv(struct sk_buff *skb, unsigned int iv_len); 324void rt2x00crypto_tx_copy_iv(struct sk_buff *skb,
299void rt2x00crypto_tx_remove_iv(struct sk_buff *skb, unsigned int iv_len); 325 struct txentry_desc *txdesc);
300void rt2x00crypto_tx_insert_iv(struct sk_buff *skb); 326void rt2x00crypto_tx_remove_iv(struct sk_buff *skb,
301void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, unsigned int align, 327 struct txentry_desc *txdesc);
328void rt2x00crypto_tx_insert_iv(struct sk_buff *skb, unsigned int header_length);
329void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, bool l2pad,
302 unsigned int header_length, 330 unsigned int header_length,
303 struct rxdone_entry_desc *rxdesc); 331 struct rxdone_entry_desc *rxdesc);
304#else 332#else
@@ -319,21 +347,21 @@ static inline unsigned int rt2x00crypto_tx_overhead(struct rt2x00_dev *rt2x00dev
319} 347}
320 348
321static inline void rt2x00crypto_tx_copy_iv(struct sk_buff *skb, 349static inline void rt2x00crypto_tx_copy_iv(struct sk_buff *skb,
322 unsigned int iv_len) 350 struct txentry_desc *txdesc)
323{ 351{
324} 352}
325 353
326static inline void rt2x00crypto_tx_remove_iv(struct sk_buff *skb, 354static inline void rt2x00crypto_tx_remove_iv(struct sk_buff *skb,
327 unsigned int iv_len) 355 struct txentry_desc *txdesc)
328{ 356{
329} 357}
330 358
331static inline void rt2x00crypto_tx_insert_iv(struct sk_buff *skb) 359static inline void rt2x00crypto_tx_insert_iv(struct sk_buff *skb,
360 unsigned int header_length)
332{ 361{
333} 362}
334 363
335static inline void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, 364static inline void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, bool l2pad,
336 unsigned int align,
337 unsigned int header_length, 365 unsigned int header_length,
338 struct rxdone_entry_desc *rxdesc) 366 struct rxdone_entry_desc *rxdesc)
339{ 367{
@@ -341,6 +369,21 @@ static inline void rt2x00crypto_rx_insert_iv(struct sk_buff *skb,
341#endif /* CONFIG_RT2X00_LIB_CRYPTO */ 369#endif /* CONFIG_RT2X00_LIB_CRYPTO */
342 370
343/* 371/*
372 * HT handlers.
373 */
374#ifdef CONFIG_RT2X00_LIB_HT
375void rt2x00ht_create_tx_descriptor(struct queue_entry *entry,
376 struct txentry_desc *txdesc,
377 const struct rt2x00_rate *hwrate);
378#else
379static inline void rt2x00ht_create_tx_descriptor(struct queue_entry *entry,
380 struct txentry_desc *txdesc,
381 const struct rt2x00_rate *hwrate)
382{
383}
384#endif /* CONFIG_RT2X00_LIB_HT */
385
386/*
344 * RFkill handlers. 387 * RFkill handlers.
345 */ 388 */
346#ifdef CONFIG_RT2X00_LIB_RFKILL 389#ifdef CONFIG_RT2X00_LIB_RFKILL
diff --git a/drivers/net/wireless/rt2x00/rt2x00link.c b/drivers/net/wireless/rt2x00/rt2x00link.c
index 7eb5cd7e5f32..eb9b981b9139 100644
--- a/drivers/net/wireless/rt2x00/rt2x00link.c
+++ b/drivers/net/wireless/rt2x00/rt2x00link.c
@@ -387,7 +387,7 @@ void rt2x00link_reset_tuner(struct rt2x00_dev *rt2x00dev, bool antenna)
387 rt2x00link_antenna_reset(rt2x00dev); 387 rt2x00link_antenna_reset(rt2x00dev);
388} 388}
389 389
390void rt2x00link_reset_qual(struct rt2x00_dev *rt2x00dev) 390static void rt2x00link_reset_qual(struct rt2x00_dev *rt2x00dev)
391{ 391{
392 struct link_qual *qual = &rt2x00dev->link.qual; 392 struct link_qual *qual = &rt2x00dev->link.qual;
393 393
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index c41a0b9e473d..c4c06b4e1f08 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -390,56 +390,6 @@ int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed)
390} 390}
391EXPORT_SYMBOL_GPL(rt2x00mac_config); 391EXPORT_SYMBOL_GPL(rt2x00mac_config);
392 392
393int rt2x00mac_config_interface(struct ieee80211_hw *hw,
394 struct ieee80211_vif *vif,
395 struct ieee80211_if_conf *conf)
396{
397 struct rt2x00_dev *rt2x00dev = hw->priv;
398 struct rt2x00_intf *intf = vif_to_intf(vif);
399 int update_bssid = 0;
400 int status = 0;
401
402 /*
403 * Mac80211 might be calling this function while we are trying
404 * to remove the device or perhaps suspending it.
405 */
406 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
407 return 0;
408
409 spin_lock(&intf->lock);
410
411 /*
412 * conf->bssid can be NULL if coming from the internal
413 * beacon update routine.
414 */
415 if (conf->changed & IEEE80211_IFCC_BSSID && conf->bssid) {
416 update_bssid = 1;
417 memcpy(&intf->bssid, conf->bssid, ETH_ALEN);
418 }
419
420 spin_unlock(&intf->lock);
421
422 /*
423 * Call rt2x00_config_intf() outside of the spinlock context since
424 * the call will sleep for USB drivers. By using the ieee80211_if_conf
425 * values as arguments we make keep access to rt2x00_intf thread safe
426 * even without the lock.
427 */
428 rt2x00lib_config_intf(rt2x00dev, intf, vif->type, NULL,
429 update_bssid ? conf->bssid : NULL);
430
431 /*
432 * Update the beacon.
433 */
434 if (conf->changed & (IEEE80211_IFCC_BEACON |
435 IEEE80211_IFCC_BEACON_ENABLED))
436 status = rt2x00queue_update_beacon(rt2x00dev, vif,
437 conf->enable_beacon);
438
439 return status;
440}
441EXPORT_SYMBOL_GPL(rt2x00mac_config_interface);
442
443void rt2x00mac_configure_filter(struct ieee80211_hw *hw, 393void rt2x00mac_configure_filter(struct ieee80211_hw *hw,
444 unsigned int changed_flags, 394 unsigned int changed_flags,
445 unsigned int *total_flags, 395 unsigned int *total_flags,
@@ -623,6 +573,44 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
623 struct rt2x00_dev *rt2x00dev = hw->priv; 573 struct rt2x00_dev *rt2x00dev = hw->priv;
624 struct rt2x00_intf *intf = vif_to_intf(vif); 574 struct rt2x00_intf *intf = vif_to_intf(vif);
625 unsigned int delayed = 0; 575 unsigned int delayed = 0;
576 int update_bssid = 0;
577
578 /*
579 * Mac80211 might be calling this function while we are trying
580 * to remove the device or perhaps suspending it.
581 */
582 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
583 return;
584
585 spin_lock(&intf->lock);
586
587 /*
588 * conf->bssid can be NULL if coming from the internal
589 * beacon update routine.
590 */
591 if (changes & BSS_CHANGED_BSSID) {
592 update_bssid = 1;
593 memcpy(&intf->bssid, bss_conf->bssid, ETH_ALEN);
594 }
595
596 spin_unlock(&intf->lock);
597
598 /*
599 * Call rt2x00_config_intf() outside of the spinlock context since
600 * the call will sleep for USB drivers. By using the ieee80211_if_conf
601 * values as arguments we make keep access to rt2x00_intf thread safe
602 * even without the lock.
603 */
604 if (changes & BSS_CHANGED_BSSID)
605 rt2x00lib_config_intf(rt2x00dev, intf, vif->type, NULL,
606 update_bssid ? bss_conf->bssid : NULL);
607
608 /*
609 * Update the beacon.
610 */
611 if (changes & (BSS_CHANGED_BEACON | BSS_CHANGED_BEACON_ENABLED))
612 rt2x00queue_update_beacon(rt2x00dev, vif,
613 bss_conf->enable_beacon);
626 614
627 /* 615 /*
628 * When the association status has changed we must reset the link 616 * When the association status has changed we must reset the link
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.c b/drivers/net/wireless/rt2x00/rt2x00pci.c
index 9730b4f8fd26..cdd5154bd4c0 100644
--- a/drivers/net/wireless/rt2x00/rt2x00pci.c
+++ b/drivers/net/wireless/rt2x00/rt2x00pci.c
@@ -170,7 +170,6 @@ static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
170 170
171int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev) 171int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
172{ 172{
173 struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);
174 struct data_queue *queue; 173 struct data_queue *queue;
175 int status; 174 int status;
176 175
@@ -186,11 +185,11 @@ int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
186 /* 185 /*
187 * Register interrupt handler. 186 * Register interrupt handler.
188 */ 187 */
189 status = request_irq(pci_dev->irq, rt2x00dev->ops->lib->irq_handler, 188 status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler,
190 IRQF_SHARED, pci_name(pci_dev), rt2x00dev); 189 IRQF_SHARED, rt2x00dev->name, rt2x00dev);
191 if (status) { 190 if (status) {
192 ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n", 191 ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
193 pci_dev->irq, status); 192 rt2x00dev->irq, status);
194 goto exit; 193 goto exit;
195 } 194 }
196 195
@@ -270,6 +269,7 @@ int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
270 struct ieee80211_hw *hw; 269 struct ieee80211_hw *hw;
271 struct rt2x00_dev *rt2x00dev; 270 struct rt2x00_dev *rt2x00dev;
272 int retval; 271 int retval;
272 u16 chip;
273 273
274 retval = pci_request_regions(pci_dev, pci_name(pci_dev)); 274 retval = pci_request_regions(pci_dev, pci_name(pci_dev));
275 if (retval) { 275 if (retval) {
@@ -307,6 +307,14 @@ int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
307 rt2x00dev->dev = &pci_dev->dev; 307 rt2x00dev->dev = &pci_dev->dev;
308 rt2x00dev->ops = ops; 308 rt2x00dev->ops = ops;
309 rt2x00dev->hw = hw; 309 rt2x00dev->hw = hw;
310 rt2x00dev->irq = pci_dev->irq;
311 rt2x00dev->name = pci_name(pci_dev);
312
313 /*
314 * Determine RT chipset by reading PCI header.
315 */
316 pci_read_config_word(pci_dev, PCI_DEVICE_ID, &chip);
317 rt2x00_set_chip_rt(rt2x00dev, chip);
310 318
311 retval = rt2x00pci_alloc_reg(rt2x00dev); 319 retval = rt2x00pci_alloc_reg(rt2x00dev);
312 if (retval) 320 if (retval)
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c
index a5664bd8493e..44e5b3279ca7 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -148,6 +148,35 @@ void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
148 dev_kfree_skb_any(skb); 148 dev_kfree_skb_any(skb);
149} 149}
150 150
151void rt2x00queue_payload_align(struct sk_buff *skb,
152 bool l2pad, unsigned int header_length)
153{
154 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
155 unsigned int frame_length = skb->len;
156 unsigned int align = ALIGN_SIZE(skb, header_length);
157
158 if (!align)
159 return;
160
161 if (l2pad) {
162 if (skbdesc->flags & SKBDESC_L2_PADDED) {
163 /* Remove L2 padding */
164 memmove(skb->data + align, skb->data, header_length);
165 skb_pull(skb, align);
166 skbdesc->flags &= ~SKBDESC_L2_PADDED;
167 } else {
168 /* Add L2 padding */
169 skb_push(skb, align);
170 memmove(skb->data, skb->data + align, header_length);
171 skbdesc->flags |= SKBDESC_L2_PADDED;
172 }
173 } else {
174 /* Generic payload alignment to 4-byte boundary */
175 skb_push(skb, align);
176 memmove(skb->data, skb->data + align, frame_length);
177 }
178}
179
151static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry, 180static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
152 struct txentry_desc *txdesc) 181 struct txentry_desc *txdesc)
153{ 182{
@@ -259,6 +288,12 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
259 txdesc->aifs = entry->queue->aifs; 288 txdesc->aifs = entry->queue->aifs;
260 289
261 /* 290 /*
291 * Header and alignment information.
292 */
293 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
294 txdesc->l2pad = ALIGN_SIZE(entry->skb, txdesc->header_length);
295
296 /*
262 * Check whether this frame is to be acked. 297 * Check whether this frame is to be acked.
263 */ 298 */
264 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) 299 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
@@ -326,6 +361,7 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
326 * Apply TX descriptor handling by components 361 * Apply TX descriptor handling by components
327 */ 362 */
328 rt2x00crypto_create_tx_descriptor(entry, txdesc); 363 rt2x00crypto_create_tx_descriptor(entry, txdesc);
364 rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
329 rt2x00queue_create_tx_descriptor_seq(entry, txdesc); 365 rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
330 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate); 366 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
331} 367}
@@ -368,7 +404,6 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
368 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX); 404 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
369 struct txentry_desc txdesc; 405 struct txentry_desc txdesc;
370 struct skb_frame_desc *skbdesc; 406 struct skb_frame_desc *skbdesc;
371 unsigned int iv_len = 0;
372 u8 rate_idx, rate_flags; 407 u8 rate_idx, rate_flags;
373 408
374 if (unlikely(rt2x00queue_full(queue))) 409 if (unlikely(rt2x00queue_full(queue)))
@@ -390,9 +425,6 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
390 entry->skb = skb; 425 entry->skb = skb;
391 rt2x00queue_create_tx_descriptor(entry, &txdesc); 426 rt2x00queue_create_tx_descriptor(entry, &txdesc);
392 427
393 if (IEEE80211_SKB_CB(skb)->control.hw_key != NULL)
394 iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len;
395
396 /* 428 /*
397 * All information is retrieved from the skb->cb array, 429 * All information is retrieved from the skb->cb array,
398 * now we should claim ownership of the driver part of that 430 * now we should claim ownership of the driver part of that
@@ -415,11 +447,15 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
415 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) && 447 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
416 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) { 448 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
417 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags)) 449 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
418 rt2x00crypto_tx_copy_iv(skb, iv_len); 450 rt2x00crypto_tx_copy_iv(skb, &txdesc);
419 else 451 else
420 rt2x00crypto_tx_remove_iv(skb, iv_len); 452 rt2x00crypto_tx_remove_iv(skb, &txdesc);
421 } 453 }
422 454
455 if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
456 rt2x00queue_payload_align(entry->skb, true,
457 txdesc.header_length);
458
423 /* 459 /*
424 * It could be possible that the queue was corrupted and this 460 * It could be possible that the queue was corrupted and this
425 * call failed. Since we always return NETDEV_TX_OK to mac80211, 461 * call failed. Since we always return NETDEV_TX_OK to mac80211,
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.h b/drivers/net/wireless/rt2x00/rt2x00queue.h
index 97e2ab08f080..b5e06347c8a7 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.h
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.h
@@ -35,9 +35,12 @@
35 * for USB devices this restriction does not apply, but the value of 35 * for USB devices this restriction does not apply, but the value of
36 * 2432 makes sense since it is big enough to contain the maximum fragment 36 * 2432 makes sense since it is big enough to contain the maximum fragment
37 * size according to the ieee802.11 specs. 37 * size according to the ieee802.11 specs.
38 * The aggregation size depends on support from the driver, but should
39 * be something around 3840 bytes.
38 */ 40 */
39#define DATA_FRAME_SIZE 2432 41#define DATA_FRAME_SIZE 2432
40#define MGMT_FRAME_SIZE 256 42#define MGMT_FRAME_SIZE 256
43#define AGGREGATION_SIZE 3840
41 44
42/** 45/**
43 * DOC: Number of entries per queue 46 * DOC: Number of entries per queue
@@ -87,13 +90,16 @@ enum data_queue_qid {
87 * 90 *
88 * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX 91 * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
89 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX 92 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
90 * @FRAME_DESC_IV_STRIPPED: Frame contained a IV/EIV provided by 93 * @SKBDESC_IV_STRIPPED: Frame contained a IV/EIV provided by
91 * mac80211 but was stripped for processing by the driver. 94 * mac80211 but was stripped for processing by the driver.
95 * @SKBDESC_L2_PADDED: Payload has been padded for 4-byte alignment,
96 * the padded bytes are located between header and payload.
92 */ 97 */
93enum skb_frame_desc_flags { 98enum skb_frame_desc_flags {
94 SKBDESC_DMA_MAPPED_RX = 1 << 0, 99 SKBDESC_DMA_MAPPED_RX = 1 << 0,
95 SKBDESC_DMA_MAPPED_TX = 1 << 1, 100 SKBDESC_DMA_MAPPED_TX = 1 << 1,
96 FRAME_DESC_IV_STRIPPED = 1 << 2, 101 SKBDESC_IV_STRIPPED = 1 << 2,
102 SKBDESC_L2_PADDED = 1 << 3
97}; 103};
98 104
99/** 105/**
@@ -145,16 +151,20 @@ static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
145 * 151 *
146 * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value. 152 * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
147 * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value. 153 * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
154 * @RXDONE_SIGNAL_MCS: Signal field contains the mcs value.
148 * @RXDONE_MY_BSS: Does this frame originate from device's BSS. 155 * @RXDONE_MY_BSS: Does this frame originate from device's BSS.
149 * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data. 156 * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
150 * @RXDONE_CRYPTO_ICV: Driver provided ICV data. 157 * @RXDONE_CRYPTO_ICV: Driver provided ICV data.
158 * @RXDONE_L2PAD: 802.11 payload has been padded to 4-byte boundary.
151 */ 159 */
152enum rxdone_entry_desc_flags { 160enum rxdone_entry_desc_flags {
153 RXDONE_SIGNAL_PLCP = 1 << 0, 161 RXDONE_SIGNAL_PLCP = BIT(0),
154 RXDONE_SIGNAL_BITRATE = 1 << 1, 162 RXDONE_SIGNAL_BITRATE = BIT(1),
155 RXDONE_MY_BSS = 1 << 2, 163 RXDONE_SIGNAL_MCS = BIT(2),
156 RXDONE_CRYPTO_IV = 1 << 3, 164 RXDONE_MY_BSS = BIT(3),
157 RXDONE_CRYPTO_ICV = 1 << 4, 165 RXDONE_CRYPTO_IV = BIT(4),
166 RXDONE_CRYPTO_ICV = BIT(5),
167 RXDONE_L2PAD = BIT(6),
158}; 168};
159 169
160/** 170/**
@@ -163,7 +173,7 @@ enum rxdone_entry_desc_flags {
163 * from &rxdone_entry_desc to a signal value type. 173 * from &rxdone_entry_desc to a signal value type.
164 */ 174 */
165#define RXDONE_SIGNAL_MASK \ 175#define RXDONE_SIGNAL_MASK \
166 ( RXDONE_SIGNAL_PLCP | RXDONE_SIGNAL_BITRATE ) 176 ( RXDONE_SIGNAL_PLCP | RXDONE_SIGNAL_BITRATE | RXDONE_SIGNAL_MCS )
167 177
168/** 178/**
169 * struct rxdone_entry_desc: RX Entry descriptor 179 * struct rxdone_entry_desc: RX Entry descriptor
@@ -177,6 +187,7 @@ enum rxdone_entry_desc_flags {
177 * @size: Data size of the received frame. 187 * @size: Data size of the received frame.
178 * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags). 188 * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
179 * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags). 189 * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
190 * @rate_mode: Rate mode (See @enum rate_modulation).
180 * @cipher: Cipher type used during decryption. 191 * @cipher: Cipher type used during decryption.
181 * @cipher_status: Decryption status. 192 * @cipher_status: Decryption status.
182 * @iv: IV/EIV data used during decryption. 193 * @iv: IV/EIV data used during decryption.
@@ -190,6 +201,7 @@ struct rxdone_entry_desc {
190 int size; 201 int size;
191 int flags; 202 int flags;
192 int dev_flags; 203 int dev_flags;
204 u16 rate_mode;
193 u8 cipher; 205 u8 cipher;
194 u8 cipher_status; 206 u8 cipher_status;
195 207
@@ -243,6 +255,9 @@ struct txdone_entry_desc {
243 * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared). 255 * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
244 * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware. 256 * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
245 * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware. 257 * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
258 * @ENTRY_TXD_HT_AMPDU: This frame is part of an AMPDU.
259 * @ENTRY_TXD_HT_BW_40: Use 40MHz Bandwidth.
260 * @ENTRY_TXD_HT_SHORT_GI: Use short GI.
246 */ 261 */
247enum txentry_desc_flags { 262enum txentry_desc_flags {
248 ENTRY_TXD_RTS_FRAME, 263 ENTRY_TXD_RTS_FRAME,
@@ -258,6 +273,9 @@ enum txentry_desc_flags {
258 ENTRY_TXD_ENCRYPT_PAIRWISE, 273 ENTRY_TXD_ENCRYPT_PAIRWISE,
259 ENTRY_TXD_ENCRYPT_IV, 274 ENTRY_TXD_ENCRYPT_IV,
260 ENTRY_TXD_ENCRYPT_MMIC, 275 ENTRY_TXD_ENCRYPT_MMIC,
276 ENTRY_TXD_HT_AMPDU,
277 ENTRY_TXD_HT_BW_40,
278 ENTRY_TXD_HT_SHORT_GI,
261}; 279};
262 280
263/** 281/**
@@ -267,11 +285,17 @@ enum txentry_desc_flags {
267 * 285 *
268 * @flags: Descriptor flags (See &enum queue_entry_flags). 286 * @flags: Descriptor flags (See &enum queue_entry_flags).
269 * @queue: Queue identification (See &enum data_queue_qid). 287 * @queue: Queue identification (See &enum data_queue_qid).
288 * @header_length: Length of 802.11 header.
289 * @l2pad: Amount of padding to align 802.11 payload to 4-byte boundrary.
270 * @length_high: PLCP length high word. 290 * @length_high: PLCP length high word.
271 * @length_low: PLCP length low word. 291 * @length_low: PLCP length low word.
272 * @signal: PLCP signal. 292 * @signal: PLCP signal.
273 * @service: PLCP service. 293 * @service: PLCP service.
294 * @msc: MCS.
295 * @stbc: STBC.
296 * @ba_size: BA size.
274 * @rate_mode: Rate mode (See @enum rate_modulation). 297 * @rate_mode: Rate mode (See @enum rate_modulation).
298 * @mpdu_density: MDPU density.
275 * @retry_limit: Max number of retries. 299 * @retry_limit: Max number of retries.
276 * @aifs: AIFS value. 300 * @aifs: AIFS value.
277 * @ifs: IFS value. 301 * @ifs: IFS value.
@@ -280,18 +304,26 @@ enum txentry_desc_flags {
280 * @cipher: Cipher type used for encryption. 304 * @cipher: Cipher type used for encryption.
281 * @key_idx: Key index used for encryption. 305 * @key_idx: Key index used for encryption.
282 * @iv_offset: Position where IV should be inserted by hardware. 306 * @iv_offset: Position where IV should be inserted by hardware.
307 * @iv_len: Length of IV data.
283 */ 308 */
284struct txentry_desc { 309struct txentry_desc {
285 unsigned long flags; 310 unsigned long flags;
286 311
287 enum data_queue_qid queue; 312 enum data_queue_qid queue;
288 313
314 u16 header_length;
315 u16 l2pad;
316
289 u16 length_high; 317 u16 length_high;
290 u16 length_low; 318 u16 length_low;
291 u16 signal; 319 u16 signal;
292 u16 service; 320 u16 service;
293 321
322 u16 mcs;
323 u16 stbc;
324 u16 ba_size;
294 u16 rate_mode; 325 u16 rate_mode;
326 u16 mpdu_density;
295 327
296 short retry_limit; 328 short retry_limit;
297 short aifs; 329 short aifs;
@@ -302,6 +334,7 @@ struct txentry_desc {
302 enum cipher cipher; 334 enum cipher cipher;
303 u16 key_idx; 335 u16 key_idx;
304 u16 iv_offset; 336 u16 iv_offset;
337 u16 iv_len;
305}; 338};
306 339
307/** 340/**
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 2ca8b7a9722c..a8bf5c432858 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -603,15 +603,22 @@ static void rt61pci_config_erp(struct rt2x00_dev *rt2x00dev,
603 603
604 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg); 604 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
605 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, erp->ack_timeout); 605 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, erp->ack_timeout);
606 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
606 rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg); 607 rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg);
607 608
608 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg); 609 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg);
610 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
609 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 611 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
610 !!erp->short_preamble); 612 !!erp->short_preamble);
611 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg); 613 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
612 614
613 rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, erp->basic_rates); 615 rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, erp->basic_rates);
614 616
617 rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
618 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
619 erp->beacon_int * 16);
620 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
621
615 rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg); 622 rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg);
616 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time); 623 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time);
617 rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg); 624 rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg);
@@ -938,25 +945,6 @@ static void rt61pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
938 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg); 945 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
939} 946}
940 947
941static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev,
942 struct rt2x00lib_conf *libconf)
943{
944 u32 reg;
945
946 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
947 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
948 rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg);
949
950 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg);
951 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
952 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
953
954 rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
955 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
956 libconf->conf->beacon_int * 16);
957 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
958}
959
960static void rt61pci_config_ps(struct rt2x00_dev *rt2x00dev, 948static void rt61pci_config_ps(struct rt2x00_dev *rt2x00dev,
961 struct rt2x00lib_conf *libconf) 949 struct rt2x00lib_conf *libconf)
962{ 950{
@@ -1016,8 +1004,6 @@ static void rt61pci_config(struct rt2x00_dev *rt2x00dev,
1016 rt61pci_config_txpower(rt2x00dev, libconf->conf->power_level); 1004 rt61pci_config_txpower(rt2x00dev, libconf->conf->power_level);
1017 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS) 1005 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
1018 rt61pci_config_retry_limit(rt2x00dev, libconf); 1006 rt61pci_config_retry_limit(rt2x00dev, libconf);
1019 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
1020 rt61pci_config_duration(rt2x00dev, libconf);
1021 if (flags & IEEE80211_CONF_CHANGE_PS) 1007 if (flags & IEEE80211_CONF_CHANGE_PS)
1022 rt61pci_config_ps(rt2x00dev, libconf); 1008 rt61pci_config_ps(rt2x00dev, libconf);
1023} 1009}
@@ -2308,7 +2294,6 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2308 u32 reg; 2294 u32 reg;
2309 u16 value; 2295 u16 value;
2310 u16 eeprom; 2296 u16 eeprom;
2311 u16 device;
2312 2297
2313 /* 2298 /*
2314 * Read EEPROM word for configuration. 2299 * Read EEPROM word for configuration.
@@ -2317,14 +2302,10 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2317 2302
2318 /* 2303 /*
2319 * Identify RF chipset. 2304 * Identify RF chipset.
2320 * To determine the RT chip we have to read the
2321 * PCI header of the device.
2322 */ 2305 */
2323 pci_read_config_word(to_pci_dev(rt2x00dev->dev),
2324 PCI_CONFIG_HEADER_DEVICE, &device);
2325 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 2306 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
2326 rt2x00pci_register_read(rt2x00dev, MAC_CSR0, &reg); 2307 rt2x00pci_register_read(rt2x00dev, MAC_CSR0, &reg);
2327 rt2x00_set_chip(rt2x00dev, device, value, reg); 2308 rt2x00_set_chip_rf(rt2x00dev, value, reg);
2328 2309
2329 if (!rt2x00_rf(&rt2x00dev->chip, RF5225) && 2310 if (!rt2x00_rf(&rt2x00dev->chip, RF5225) &&
2330 !rt2x00_rf(&rt2x00dev->chip, RF5325) && 2311 !rt2x00_rf(&rt2x00dev->chip, RF5325) &&
@@ -2740,7 +2721,6 @@ static const struct ieee80211_ops rt61pci_mac80211_ops = {
2740 .add_interface = rt2x00mac_add_interface, 2721 .add_interface = rt2x00mac_add_interface,
2741 .remove_interface = rt2x00mac_remove_interface, 2722 .remove_interface = rt2x00mac_remove_interface,
2742 .config = rt2x00mac_config, 2723 .config = rt2x00mac_config,
2743 .config_interface = rt2x00mac_config_interface,
2744 .configure_filter = rt2x00mac_configure_filter, 2724 .configure_filter = rt2x00mac_configure_filter,
2745 .set_key = rt2x00mac_set_key, 2725 .set_key = rt2x00mac_set_key,
2746 .get_stats = rt2x00mac_get_stats, 2726 .get_stats = rt2x00mac_get_stats,
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h
index 41e8959919f6..6c71f77c8165 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.h
+++ b/drivers/net/wireless/rt2x00/rt61pci.h
@@ -63,12 +63,6 @@
63 */ 63 */
64 64
65/* 65/*
66 * PCI Configuration Header
67 */
68#define PCI_CONFIG_HEADER_VENDOR 0x0000
69#define PCI_CONFIG_HEADER_DEVICE 0x0002
70
71/*
72 * HOST_CMD_CSR: For HOST to interrupt embedded processor 66 * HOST_CMD_CSR: For HOST to interrupt embedded processor
73 */ 67 */
74#define HOST_CMD_CSR 0x0008 68#define HOST_CMD_CSR 0x0008
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index 853b2b279b64..211a3d6bc054 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -566,15 +566,22 @@ static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
566 566
567 rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, &reg); 567 rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
568 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, erp->ack_timeout); 568 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, erp->ack_timeout);
569 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
569 rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg); 570 rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
570 571
571 rt2x00usb_register_read(rt2x00dev, TXRX_CSR4, &reg); 572 rt2x00usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
573 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
572 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 574 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
573 !!erp->short_preamble); 575 !!erp->short_preamble);
574 rt2x00usb_register_write(rt2x00dev, TXRX_CSR4, reg); 576 rt2x00usb_register_write(rt2x00dev, TXRX_CSR4, reg);
575 577
576 rt2x00usb_register_write(rt2x00dev, TXRX_CSR5, erp->basic_rates); 578 rt2x00usb_register_write(rt2x00dev, TXRX_CSR5, erp->basic_rates);
577 579
580 rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
581 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
582 erp->beacon_int * 16);
583 rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
584
578 rt2x00usb_register_read(rt2x00dev, MAC_CSR9, &reg); 585 rt2x00usb_register_read(rt2x00dev, MAC_CSR9, &reg);
579 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time); 586 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time);
580 rt2x00usb_register_write(rt2x00dev, MAC_CSR9, reg); 587 rt2x00usb_register_write(rt2x00dev, MAC_CSR9, reg);
@@ -834,25 +841,6 @@ static void rt73usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
834 rt2x00usb_register_write(rt2x00dev, TXRX_CSR4, reg); 841 rt2x00usb_register_write(rt2x00dev, TXRX_CSR4, reg);
835} 842}
836 843
837static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
838 struct rt2x00lib_conf *libconf)
839{
840 u32 reg;
841
842 rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
843 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
844 rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
845
846 rt2x00usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
847 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
848 rt2x00usb_register_write(rt2x00dev, TXRX_CSR4, reg);
849
850 rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
851 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
852 libconf->conf->beacon_int * 16);
853 rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
854}
855
856static void rt73usb_config_ps(struct rt2x00_dev *rt2x00dev, 844static void rt73usb_config_ps(struct rt2x00_dev *rt2x00dev,
857 struct rt2x00lib_conf *libconf) 845 struct rt2x00lib_conf *libconf)
858{ 846{
@@ -906,8 +894,6 @@ static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
906 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level); 894 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
907 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS) 895 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
908 rt73usb_config_retry_limit(rt2x00dev, libconf); 896 rt73usb_config_retry_limit(rt2x00dev, libconf);
909 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
910 rt73usb_config_duration(rt2x00dev, libconf);
911 if (flags & IEEE80211_CONF_CHANGE_PS) 897 if (flags & IEEE80211_CONF_CHANGE_PS)
912 rt73usb_config_ps(rt2x00dev, libconf); 898 rt73usb_config_ps(rt2x00dev, libconf);
913} 899}
@@ -1846,7 +1832,8 @@ static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1846 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg); 1832 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1847 rt2x00_set_chip(rt2x00dev, RT2571, value, reg); 1833 rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1848 1834
1849 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) { 1835 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x000ffff0, 0x25730) ||
1836 rt2x00_check_rev(&rt2x00dev->chip, 0x0000000f, 0)) {
1850 ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); 1837 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1851 return -ENODEV; 1838 return -ENODEV;
1852 } 1839 }
@@ -2259,7 +2246,6 @@ static const struct ieee80211_ops rt73usb_mac80211_ops = {
2259 .add_interface = rt2x00mac_add_interface, 2246 .add_interface = rt2x00mac_add_interface,
2260 .remove_interface = rt2x00mac_remove_interface, 2247 .remove_interface = rt2x00mac_remove_interface,
2261 .config = rt2x00mac_config, 2248 .config = rt2x00mac_config,
2262 .config_interface = rt2x00mac_config_interface,
2263 .configure_filter = rt2x00mac_configure_filter, 2249 .configure_filter = rt2x00mac_configure_filter,
2264 .set_key = rt2x00mac_set_key, 2250 .set_key = rt2x00mac_set_key,
2265 .get_stats = rt2x00mac_get_stats, 2251 .get_stats = rt2x00mac_get_stats,
diff --git a/drivers/net/wireless/rtl818x/Makefile b/drivers/net/wireless/rtl818x/Makefile
index c113b3e69046..37e3d4db0c40 100644
--- a/drivers/net/wireless/rtl818x/Makefile
+++ b/drivers/net/wireless/rtl818x/Makefile
@@ -1,5 +1,5 @@
1rtl8180-objs := rtl8180_dev.o rtl8180_rtl8225.o rtl8180_sa2400.o rtl8180_max2820.o rtl8180_grf5101.o 1rtl8180-objs := rtl8180_dev.o rtl8180_rtl8225.o rtl8180_sa2400.o rtl8180_max2820.o rtl8180_grf5101.o
2rtl8187-objs := rtl8187_dev.o rtl8187_rtl8225.o 2rtl8187-objs := rtl8187_dev.o rtl8187_rtl8225.o rtl8187_leds.o
3 3
4obj-$(CONFIG_RTL8180) += rtl8180.o 4obj-$(CONFIG_RTL8180) += rtl8180.o
5obj-$(CONFIG_RTL8187) += rtl8187.o 5obj-$(CONFIG_RTL8187) += rtl8187.o
diff --git a/drivers/net/wireless/rtl818x/rtl8180_dev.c b/drivers/net/wireless/rtl818x/rtl8180_dev.c
index 387c133ec0f2..7e65d7c31802 100644
--- a/drivers/net/wireless/rtl818x/rtl8180_dev.c
+++ b/drivers/net/wireless/rtl818x/rtl8180_dev.c
@@ -702,30 +702,26 @@ static int rtl8180_config(struct ieee80211_hw *dev, u32 changed)
702 return 0; 702 return 0;
703} 703}
704 704
705static int rtl8180_config_interface(struct ieee80211_hw *dev,
706 struct ieee80211_vif *vif,
707 struct ieee80211_if_conf *conf)
708{
709 struct rtl8180_priv *priv = dev->priv;
710 int i;
711
712 for (i = 0; i < ETH_ALEN; i++)
713 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
714
715 if (is_valid_ether_addr(conf->bssid))
716 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
717 else
718 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
719
720 return 0;
721}
722
723static void rtl8180_bss_info_changed(struct ieee80211_hw *dev, 705static void rtl8180_bss_info_changed(struct ieee80211_hw *dev,
724 struct ieee80211_vif *vif, 706 struct ieee80211_vif *vif,
725 struct ieee80211_bss_conf *info, 707 struct ieee80211_bss_conf *info,
726 u32 changed) 708 u32 changed)
727{ 709{
728 struct rtl8180_priv *priv = dev->priv; 710 struct rtl8180_priv *priv = dev->priv;
711 int i;
712
713 if (changed & BSS_CHANGED_BSSID) {
714 for (i = 0; i < ETH_ALEN; i++)
715 rtl818x_iowrite8(priv, &priv->map->BSSID[i],
716 info->bssid[i]);
717
718 if (is_valid_ether_addr(info->bssid))
719 rtl818x_iowrite8(priv, &priv->map->MSR,
720 RTL818X_MSR_INFRA);
721 else
722 rtl818x_iowrite8(priv, &priv->map->MSR,
723 RTL818X_MSR_NO_LINK);
724 }
729 725
730 if (changed & BSS_CHANGED_ERP_SLOT && priv->rf->conf_erp) 726 if (changed & BSS_CHANGED_ERP_SLOT && priv->rf->conf_erp)
731 priv->rf->conf_erp(dev, info); 727 priv->rf->conf_erp(dev, info);
@@ -770,7 +766,6 @@ static const struct ieee80211_ops rtl8180_ops = {
770 .add_interface = rtl8180_add_interface, 766 .add_interface = rtl8180_add_interface,
771 .remove_interface = rtl8180_remove_interface, 767 .remove_interface = rtl8180_remove_interface,
772 .config = rtl8180_config, 768 .config = rtl8180_config,
773 .config_interface = rtl8180_config_interface,
774 .bss_info_changed = rtl8180_bss_info_changed, 769 .bss_info_changed = rtl8180_bss_info_changed,
775 .configure_filter = rtl8180_configure_filter, 770 .configure_filter = rtl8180_configure_filter,
776}; 771};
diff --git a/drivers/net/wireless/rtl818x/rtl8187.h b/drivers/net/wireless/rtl818x/rtl8187.h
index edeff82a4d06..c09bfefc70f3 100644
--- a/drivers/net/wireless/rtl818x/rtl8187.h
+++ b/drivers/net/wireless/rtl818x/rtl8187.h
@@ -16,6 +16,7 @@
16#define RTL8187_H 16#define RTL8187_H
17 17
18#include "rtl818x.h" 18#include "rtl818x.h"
19#include "rtl8187_leds.h"
19 20
20#define RTL8187_EEPROM_TXPWR_BASE 0x05 21#define RTL8187_EEPROM_TXPWR_BASE 0x05
21#define RTL8187_EEPROM_MAC_ADDR 0x07 22#define RTL8187_EEPROM_MAC_ADDR 0x07
@@ -102,6 +103,12 @@ struct rtl8187_priv {
102 struct usb_anchor anchored; 103 struct usb_anchor anchored;
103 struct delayed_work work; 104 struct delayed_work work;
104 struct ieee80211_hw *dev; 105 struct ieee80211_hw *dev;
106#ifdef CONFIG_RTL8187_LEDS
107 struct rtl8187_led led_tx;
108 struct rtl8187_led led_rx;
109 struct delayed_work led_on;
110 struct delayed_work led_off;
111#endif
105 u16 txpwr_base; 112 u16 txpwr_base;
106 u8 asic_rev; 113 u8 asic_rev;
107 u8 is_rtl8187b; 114 u8 is_rtl8187b;
diff --git a/drivers/net/wireless/rtl818x/rtl8187_dev.c b/drivers/net/wireless/rtl818x/rtl8187_dev.c
index d51ba0a88c23..294250e294dd 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_dev.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_dev.c
@@ -29,6 +29,9 @@
29 29
30#include "rtl8187.h" 30#include "rtl8187.h"
31#include "rtl8187_rtl8225.h" 31#include "rtl8187_rtl8225.h"
32#ifdef CONFIG_RTL8187_LEDS
33#include "rtl8187_leds.h"
34#endif
32 35
33MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); 36MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
34MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); 37MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
@@ -320,12 +323,7 @@ static void rtl8187_rx_cb(struct urb *urb)
320 unsigned long f; 323 unsigned long f;
321 324
322 spin_lock_irqsave(&priv->rx_queue.lock, f); 325 spin_lock_irqsave(&priv->rx_queue.lock, f);
323 if (skb->next) 326 __skb_unlink(skb, &priv->rx_queue);
324 __skb_unlink(skb, &priv->rx_queue);
325 else {
326 spin_unlock_irqrestore(&priv->rx_queue.lock, f);
327 return;
328 }
329 spin_unlock_irqrestore(&priv->rx_queue.lock, f); 327 spin_unlock_irqrestore(&priv->rx_queue.lock, f);
330 skb_put(skb, urb->actual_length); 328 skb_put(skb, urb->actual_length);
331 329
@@ -736,10 +734,10 @@ static const u8 rtl8187b_reg_table[][3] = {
736 {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, 734 {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
737 {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0}, 735 {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
738 {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, 736 {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
739 {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0}, 737 {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
740 738
741 {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, 739 {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
742 {0x8E, 0x08, 0}, {0x8F, 0x00, 0} 740 {0x8F, 0x00, 0}
743}; 741};
744 742
745static int rtl8187b_init_hw(struct ieee80211_hw *dev) 743static int rtl8187b_init_hw(struct ieee80211_hw *dev)
@@ -1089,32 +1087,6 @@ static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1089 return 0; 1087 return 0;
1090} 1088}
1091 1089
1092static int rtl8187_config_interface(struct ieee80211_hw *dev,
1093 struct ieee80211_vif *vif,
1094 struct ieee80211_if_conf *conf)
1095{
1096 struct rtl8187_priv *priv = dev->priv;
1097 int i;
1098 u8 reg;
1099
1100 mutex_lock(&priv->conf_mutex);
1101 for (i = 0; i < ETH_ALEN; i++)
1102 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
1103
1104 if (is_valid_ether_addr(conf->bssid)) {
1105 reg = RTL818X_MSR_INFRA;
1106 if (priv->is_rtl8187b)
1107 reg |= RTL818X_MSR_ENEDCA;
1108 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1109 } else {
1110 reg = RTL818X_MSR_NO_LINK;
1111 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1112 }
1113
1114 mutex_unlock(&priv->conf_mutex);
1115 return 0;
1116}
1117
1118/* 1090/*
1119 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for 1091 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1120 * example. Thus we have to use raw values for AC_*_PARAM register addresses. 1092 * example. Thus we have to use raw values for AC_*_PARAM register addresses.
@@ -1192,6 +1164,27 @@ static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1192 u32 changed) 1164 u32 changed)
1193{ 1165{
1194 struct rtl8187_priv *priv = dev->priv; 1166 struct rtl8187_priv *priv = dev->priv;
1167 int i;
1168 u8 reg;
1169
1170 if (changed & BSS_CHANGED_BSSID) {
1171 mutex_lock(&priv->conf_mutex);
1172 for (i = 0; i < ETH_ALEN; i++)
1173 rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1174 info->bssid[i]);
1175
1176 if (is_valid_ether_addr(info->bssid)) {
1177 reg = RTL818X_MSR_INFRA;
1178 if (priv->is_rtl8187b)
1179 reg |= RTL818X_MSR_ENEDCA;
1180 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1181 } else {
1182 reg = RTL818X_MSR_NO_LINK;
1183 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1184 }
1185
1186 mutex_unlock(&priv->conf_mutex);
1187 }
1195 1188
1196 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) 1189 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1197 rtl8187_conf_erp(priv, info->use_short_slot, 1190 rtl8187_conf_erp(priv, info->use_short_slot,
@@ -1273,7 +1266,6 @@ static const struct ieee80211_ops rtl8187_ops = {
1273 .add_interface = rtl8187_add_interface, 1266 .add_interface = rtl8187_add_interface,
1274 .remove_interface = rtl8187_remove_interface, 1267 .remove_interface = rtl8187_remove_interface,
1275 .config = rtl8187_config, 1268 .config = rtl8187_config,
1276 .config_interface = rtl8187_config_interface,
1277 .bss_info_changed = rtl8187_bss_info_changed, 1269 .bss_info_changed = rtl8187_bss_info_changed,
1278 .configure_filter = rtl8187_configure_filter, 1270 .configure_filter = rtl8187_configure_filter,
1279 .conf_tx = rtl8187_conf_tx 1271 .conf_tx = rtl8187_conf_tx
@@ -1480,9 +1472,6 @@ static int __devinit rtl8187_probe(struct usb_interface *intf,
1480 (*channel++).hw_value = txpwr >> 8; 1472 (*channel++).hw_value = txpwr >> 8;
1481 } 1473 }
1482 1474
1483 if (priv->is_rtl8187b)
1484 printk(KERN_WARNING "rtl8187: 8187B chip detected.\n");
1485
1486 /* 1475 /*
1487 * XXX: Once this driver supports anything that requires 1476 * XXX: Once this driver supports anything that requires
1488 * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ. 1477 * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
@@ -1514,6 +1503,12 @@ static int __devinit rtl8187_probe(struct usb_interface *intf,
1514 wiphy_name(dev->wiphy), dev->wiphy->perm_addr, 1503 wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1515 chip_name, priv->asic_rev, priv->rf->name); 1504 chip_name, priv->asic_rev, priv->rf->name);
1516 1505
1506#ifdef CONFIG_RTL8187_LEDS
1507 eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1508 reg &= 0xFF;
1509 rtl8187_leds_init(dev, reg);
1510#endif
1511
1517 return 0; 1512 return 0;
1518 1513
1519 err_free_dmabuf: 1514 err_free_dmabuf:
@@ -1533,6 +1528,9 @@ static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1533 if (!dev) 1528 if (!dev)
1534 return; 1529 return;
1535 1530
1531#ifdef CONFIG_RTL8187_LEDS
1532 rtl8187_leds_exit(dev);
1533#endif
1536 ieee80211_unregister_hw(dev); 1534 ieee80211_unregister_hw(dev);
1537 1535
1538 priv = dev->priv; 1536 priv = dev->priv;
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.c b/drivers/net/wireless/rtl818x/rtl8187_leds.c
new file mode 100644
index 000000000000..b44253592243
--- /dev/null
+++ b/drivers/net/wireless/rtl818x/rtl8187_leds.c
@@ -0,0 +1,218 @@
1/*
2 * Linux LED driver for RTL8187
3 *
4 * Copyright 2009 Larry Finger <Larry.Finger@lwfinger.net>
5 *
6 * Based on the LED handling in the r8187 driver, which is:
7 * Copyright (c) Realtek Semiconductor Corp. All rights reserved.
8 *
9 * Thanks to Realtek for their support!
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#ifdef CONFIG_RTL8187_LEDS
17
18#include <net/mac80211.h>
19#include <linux/usb.h>
20#include <linux/eeprom_93cx6.h>
21
22#include "rtl8187.h"
23#include "rtl8187_leds.h"
24
25static void led_turn_on(struct work_struct *work)
26{
27 /* As this routine does read/write operations on the hardware, it must
28 * be run from a work queue.
29 */
30 u8 reg;
31 struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
32 led_on.work);
33 struct rtl8187_led *led = &priv->led_tx;
34
35 /* Don't change the LED, when the device is down. */
36 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
37 return ;
38
39 /* Skip if the LED is not registered. */
40 if (!led->dev)
41 return;
42 mutex_lock(&priv->conf_mutex);
43 switch (led->ledpin) {
44 case LED_PIN_GPIO0:
45 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x01);
46 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0x00);
47 break;
48 case LED_PIN_LED0:
49 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~(1 << 4);
50 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
51 break;
52 case LED_PIN_LED1:
53 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~(1 << 5);
54 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
55 break;
56 case LED_PIN_HW:
57 default:
58 break;
59 }
60 mutex_unlock(&priv->conf_mutex);
61}
62
63static void led_turn_off(struct work_struct *work)
64{
65 /* As this routine does read/write operations on the hardware, it must
66 * be run from a work queue.
67 */
68 u8 reg;
69 struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
70 led_off.work);
71 struct rtl8187_led *led = &priv->led_tx;
72
73 /* Don't change the LED, when the device is down. */
74 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
75 return ;
76
77 /* Skip if the LED is not registered. */
78 if (!led->dev)
79 return;
80 mutex_lock(&priv->conf_mutex);
81 switch (led->ledpin) {
82 case LED_PIN_GPIO0:
83 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x01);
84 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0x01);
85 break;
86 case LED_PIN_LED0:
87 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) | (1 << 4);
88 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
89 break;
90 case LED_PIN_LED1:
91 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) | (1 << 5);
92 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
93 break;
94 case LED_PIN_HW:
95 default:
96 break;
97 }
98 mutex_unlock(&priv->conf_mutex);
99}
100
101/* Callback from the LED subsystem. */
102static void rtl8187_led_brightness_set(struct led_classdev *led_dev,
103 enum led_brightness brightness)
104{
105 struct rtl8187_led *led = container_of(led_dev, struct rtl8187_led,
106 led_dev);
107 struct ieee80211_hw *hw = led->dev;
108 struct rtl8187_priv *priv = hw->priv;
109
110 if (brightness == LED_OFF) {
111 queue_delayed_work(hw->workqueue, &priv->led_off, 0);
112 /* The LED is off for 1/20 sec so that it just blinks. */
113 queue_delayed_work(hw->workqueue, &priv->led_on, HZ / 20);
114 } else
115 queue_delayed_work(hw->workqueue, &priv->led_on, 0);
116}
117
118static int rtl8187_register_led(struct ieee80211_hw *dev,
119 struct rtl8187_led *led, const char *name,
120 const char *default_trigger, u8 ledpin)
121{
122 int err;
123 struct rtl8187_priv *priv = dev->priv;
124
125 if (led->dev)
126 return -EEXIST;
127 if (!default_trigger)
128 return -EINVAL;
129 led->dev = dev;
130 led->ledpin = ledpin;
131 strncpy(led->name, name, sizeof(led->name));
132
133 led->led_dev.name = led->name;
134 led->led_dev.default_trigger = default_trigger;
135 led->led_dev.brightness_set = rtl8187_led_brightness_set;
136
137 err = led_classdev_register(&priv->udev->dev, &led->led_dev);
138 if (err) {
139 printk(KERN_INFO "LEDs: Failed to register %s\n", name);
140 led->dev = NULL;
141 return err;
142 }
143 return 0;
144}
145
146static void rtl8187_unregister_led(struct rtl8187_led *led)
147{
148 led_classdev_unregister(&led->led_dev);
149 led->dev = NULL;
150}
151
152void rtl8187_leds_init(struct ieee80211_hw *dev, u16 custid)
153{
154 struct rtl8187_priv *priv = dev->priv;
155 char name[RTL8187_LED_MAX_NAME_LEN + 1];
156 u8 ledpin;
157 int err;
158
159 /* According to the vendor driver, the LED operation depends on the
160 * customer ID encoded in the EEPROM
161 */
162 printk(KERN_INFO "rtl8187: Customer ID is 0x%02X\n", custid);
163 switch (custid) {
164 case EEPROM_CID_RSVD0:
165 case EEPROM_CID_RSVD1:
166 case EEPROM_CID_SERCOMM_PS:
167 case EEPROM_CID_QMI:
168 case EEPROM_CID_DELL:
169 case EEPROM_CID_TOSHIBA:
170 ledpin = LED_PIN_GPIO0;
171 break;
172 case EEPROM_CID_ALPHA0:
173 ledpin = LED_PIN_LED0;
174 break;
175 case EEPROM_CID_HW:
176 ledpin = LED_PIN_HW;
177 break;
178 default:
179 ledpin = LED_PIN_GPIO0;
180 }
181
182 INIT_DELAYED_WORK(&priv->led_on, led_turn_on);
183 INIT_DELAYED_WORK(&priv->led_off, led_turn_off);
184
185 snprintf(name, sizeof(name),
186 "rtl8187-%s::tx", wiphy_name(dev->wiphy));
187 err = rtl8187_register_led(dev, &priv->led_tx, name,
188 ieee80211_get_tx_led_name(dev), ledpin);
189 if (err)
190 goto error;
191 snprintf(name, sizeof(name),
192 "rtl8187-%s::rx", wiphy_name(dev->wiphy));
193 err = rtl8187_register_led(dev, &priv->led_rx, name,
194 ieee80211_get_rx_led_name(dev), ledpin);
195 if (!err) {
196 queue_delayed_work(dev->workqueue, &priv->led_on, 0);
197 return;
198 }
199 /* registration of RX LED failed - unregister TX */
200 rtl8187_unregister_led(&priv->led_tx);
201error:
202 /* If registration of either failed, cancel delayed work */
203 cancel_delayed_work_sync(&priv->led_off);
204 cancel_delayed_work_sync(&priv->led_on);
205}
206
207void rtl8187_leds_exit(struct ieee80211_hw *dev)
208{
209 struct rtl8187_priv *priv = dev->priv;
210
211 rtl8187_unregister_led(&priv->led_tx);
212 /* turn the LED off before exiting */
213 queue_delayed_work(dev->workqueue, &priv->led_off, 0);
214 cancel_delayed_work_sync(&priv->led_off);
215 rtl8187_unregister_led(&priv->led_rx);
216}
217#endif /* def CONFIG_RTL8187_LED */
218
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.h b/drivers/net/wireless/rtl818x/rtl8187_leds.h
new file mode 100644
index 000000000000..a0332027aead
--- /dev/null
+++ b/drivers/net/wireless/rtl818x/rtl8187_leds.h
@@ -0,0 +1,57 @@
1/*
2 * Definitions for RTL8187 leds
3 *
4 * Copyright 2009 Larry Finger <Larry.Finger@lwfinger.net>
5 *
6 * Based on the LED handling in the r8187 driver, which is:
7 * Copyright (c) Realtek Semiconductor Corp. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef RTL8187_LED_H
15#define RTL8187_LED_H
16
17#ifdef CONFIG_RTL8187_LEDS
18
19#define RTL8187_LED_MAX_NAME_LEN 21
20
21#include <linux/leds.h>
22#include <linux/types.h>
23
24enum {
25 LED_PIN_LED0,
26 LED_PIN_LED1,
27 LED_PIN_GPIO0,
28 LED_PIN_HW
29};
30
31enum {
32 EEPROM_CID_RSVD0 = 0x00,
33 EEPROM_CID_RSVD1 = 0xFF,
34 EEPROM_CID_ALPHA0 = 0x01,
35 EEPROM_CID_SERCOMM_PS = 0x02,
36 EEPROM_CID_HW = 0x03,
37 EEPROM_CID_TOSHIBA = 0x04,
38 EEPROM_CID_QMI = 0x07,
39 EEPROM_CID_DELL = 0x08
40};
41
42struct rtl8187_led {
43 struct ieee80211_hw *dev;
44 /* The LED class device */
45 struct led_classdev led_dev;
46 /* The pin/method used to control the led */
47 u8 ledpin;
48 /* The unique name string for this LED device. */
49 char name[RTL8187_LED_MAX_NAME_LEN + 1];
50};
51
52void rtl8187_leds_init(struct ieee80211_hw *dev, u16 code);
53void rtl8187_leds_exit(struct ieee80211_hw *dev);
54
55#endif /* def CONFIG_RTL8187_LED */
56
57#endif /* RTL8187_LED_H */
diff --git a/drivers/net/wireless/strip.c b/drivers/net/wireless/strip.c
index f95204632690..b7b0c46adb46 100644
--- a/drivers/net/wireless/strip.c
+++ b/drivers/net/wireless/strip.c
@@ -2509,7 +2509,7 @@ static void strip_dev_setup(struct net_device *dev)
2509 * netdev_priv(dev) Already holds a pointer to our struct strip 2509 * netdev_priv(dev) Already holds a pointer to our struct strip
2510 */ 2510 */
2511 2511
2512 *(MetricomAddress *) & dev->broadcast = broadcast_address; 2512 *(MetricomAddress *)dev->broadcast = broadcast_address;
2513 dev->dev_addr[0] = 0; 2513 dev->dev_addr[0] = 0;
2514 dev->addr_len = sizeof(MetricomAddress); 2514 dev->addr_len = sizeof(MetricomAddress);
2515 2515
diff --git a/drivers/net/wireless/wavelan.c b/drivers/net/wireless/wavelan.c
index 3ab3eb957189..25d27b64f528 100644
--- a/drivers/net/wireless/wavelan.c
+++ b/drivers/net/wireless/wavelan.c
@@ -2869,10 +2869,6 @@ static int wavelan_packet_xmit(struct sk_buff *skb, struct net_device * dev)
2869 if (lp->tx_n_in_use == (NTXBLOCKS - 1)) 2869 if (lp->tx_n_in_use == (NTXBLOCKS - 1))
2870 return 1; 2870 return 1;
2871 } 2871 }
2872#ifdef DEBUG_TX_ERROR
2873 if (skb->next)
2874 printk(KERN_INFO "skb has next\n");
2875#endif
2876 2872
2877 /* Do we need some padding? */ 2873 /* Do we need some padding? */
2878 /* Note : on wireless the propagation time is in the order of 1us, 2874 /* Note : on wireless the propagation time is in the order of 1us,
diff --git a/drivers/net/wireless/wavelan_cs.c b/drivers/net/wireless/wavelan_cs.c
index e55b33961aeb..1a90d69f18a9 100644
--- a/drivers/net/wireless/wavelan_cs.c
+++ b/drivers/net/wireless/wavelan_cs.c
@@ -3107,11 +3107,6 @@ wavelan_packet_xmit(struct sk_buff * skb,
3107 * so the Tx buffer is now free */ 3107 * so the Tx buffer is now free */
3108 } 3108 }
3109 3109
3110#ifdef DEBUG_TX_ERROR
3111 if (skb->next)
3112 printk(KERN_INFO "skb has next\n");
3113#endif
3114
3115 /* Check if we need some padding */ 3110 /* Check if we need some padding */
3116 /* Note : on wireless the propagation time is in the order of 1us, 3111 /* Note : on wireless the propagation time is in the order of 1us,
3117 * and we don't have the Ethernet specific requirement of beeing 3112 * and we don't have the Ethernet specific requirement of beeing
diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig
new file mode 100644
index 000000000000..a82c4cd436d8
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/Kconfig
@@ -0,0 +1,11 @@
1config WL12XX
2 tristate "TI wl1251/wl1271 support"
3 depends on MAC80211 && WLAN_80211 && SPI_MASTER && GENERIC_HARDIRQS && EXPERIMENTAL
4 select FW_LOADER
5 select CRC7
6 ---help---
7 This module adds support for wireless adapters based on
8 TI wl1251/wl1271 chipsets.
9
10 If you choose to build a module, it'll be called wl12xx. Say N if
11 unsure.
diff --git a/drivers/net/wireless/wl12xx/Makefile b/drivers/net/wireless/wl12xx/Makefile
new file mode 100644
index 000000000000..d43de27dc54c
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/Makefile
@@ -0,0 +1,4 @@
1wl12xx-objs = main.o spi.o event.o tx.o rx.o \
2 ps.o cmd.o acx.o boot.o init.o wl1251.o \
3 debugfs.o
4obj-$(CONFIG_WL12XX) += wl12xx.o
diff --git a/drivers/net/wireless/wl12xx/acx.c b/drivers/net/wireless/wl12xx/acx.c
new file mode 100644
index 000000000000..1cfd458ad5ab
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/acx.c
@@ -0,0 +1,689 @@
1#include "acx.h"
2
3#include <linux/module.h>
4#include <linux/crc7.h>
5#include <linux/spi/spi.h>
6
7#include "wl12xx.h"
8#include "wl12xx_80211.h"
9#include "reg.h"
10#include "spi.h"
11#include "ps.h"
12
13int wl12xx_acx_frame_rates(struct wl12xx *wl, u8 ctrl_rate, u8 ctrl_mod,
14 u8 mgt_rate, u8 mgt_mod)
15{
16 int ret;
17 struct acx_fw_gen_frame_rates rates;
18
19 wl12xx_debug(DEBUG_ACX, "acx frame rates");
20
21 rates.header.id = ACX_FW_GEN_FRAME_RATES;
22 rates.header.len = sizeof(struct acx_fw_gen_frame_rates) -
23 sizeof(struct acx_header);
24
25 rates.tx_ctrl_frame_rate = ctrl_rate;
26 rates.tx_ctrl_frame_mod = ctrl_mod;
27 rates.tx_mgt_frame_rate = mgt_rate;
28 rates.tx_mgt_frame_mod = mgt_mod;
29
30 ret = wl12xx_cmd_configure(wl, &rates, sizeof(rates));
31 if (ret < 0) {
32 wl12xx_error("Failed to set FW rates and modulation");
33 return ret;
34 }
35
36 return 0;
37}
38
39
40int wl12xx_acx_station_id(struct wl12xx *wl)
41{
42 int ret, i;
43 struct dot11_station_id mac;
44
45 wl12xx_debug(DEBUG_ACX, "acx dot11_station_id");
46
47 mac.header.id = DOT11_STATION_ID;
48 mac.header.len = sizeof(mac) - sizeof(struct acx_header);
49
50 for (i = 0; i < ETH_ALEN; i++)
51 mac.mac[i] = wl->mac_addr[ETH_ALEN - 1 - i];
52
53 ret = wl12xx_cmd_configure(wl, &mac, sizeof(mac));
54 if (ret < 0)
55 return ret;
56
57 return 0;
58}
59
60int wl12xx_acx_default_key(struct wl12xx *wl, u8 key_id)
61{
62 struct acx_dot11_default_key default_key;
63 int ret;
64
65 wl12xx_debug(DEBUG_ACX, "acx dot11_default_key (%d)", key_id);
66
67 default_key.header.id = DOT11_DEFAULT_KEY;
68 default_key.header.len = sizeof(default_key) -
69 sizeof(struct acx_header);
70
71 default_key.id = key_id;
72
73 ret = wl12xx_cmd_configure(wl, &default_key, sizeof(default_key));
74 if (ret < 0) {
75 wl12xx_error("Couldnt set default key");
76 return ret;
77 }
78
79 wl->default_key = key_id;
80
81 return 0;
82}
83
84int wl12xx_acx_wake_up_conditions(struct wl12xx *wl, u8 listen_interval)
85{
86 struct acx_wake_up_condition wake_up;
87
88 wl12xx_debug(DEBUG_ACX, "acx wake up conditions");
89
90 wake_up.header.id = ACX_WAKE_UP_CONDITIONS;
91 wake_up.header.len = sizeof(wake_up) - sizeof(struct acx_header);
92
93 wake_up.wake_up_event = WAKE_UP_EVENT_DTIM_BITMAP;
94 wake_up.listen_interval = listen_interval;
95
96 return wl12xx_cmd_configure(wl, &wake_up, sizeof(wake_up));
97}
98
99int wl12xx_acx_sleep_auth(struct wl12xx *wl, u8 sleep_auth)
100{
101 int ret;
102 struct acx_sleep_auth auth;
103
104 wl12xx_debug(DEBUG_ACX, "acx sleep auth");
105
106 auth.header.id = ACX_SLEEP_AUTH;
107 auth.header.len = sizeof(auth) - sizeof(struct acx_header);
108
109 auth.sleep_auth = sleep_auth;
110
111 ret = wl12xx_cmd_configure(wl, &auth, sizeof(auth));
112 if (ret < 0)
113 return ret;
114
115 return 0;
116}
117
118int wl12xx_acx_fw_version(struct wl12xx *wl, char *buf, size_t len)
119{
120 struct wl12xx_command cmd;
121 struct acx_revision *rev;
122 int ret;
123
124 wl12xx_debug(DEBUG_ACX, "acx fw rev");
125
126 memset(&cmd, 0, sizeof(cmd));
127
128 ret = wl12xx_cmd_interrogate(wl, ACX_FW_REV, sizeof(*rev), &cmd);
129 if (ret < 0) {
130 wl12xx_warning("ACX_FW_REV interrogate failed");
131 return ret;
132 }
133
134 rev = (struct acx_revision *) &cmd.parameters;
135
136 /* be careful with the buffer sizes */
137 strncpy(buf, rev->fw_version, min(len, sizeof(rev->fw_version)));
138
139 /*
140 * if the firmware version string is exactly
141 * sizeof(rev->fw_version) long or fw_len is less than
142 * sizeof(rev->fw_version) it won't be null terminated
143 */
144 buf[min(len, sizeof(rev->fw_version)) - 1] = '\0';
145
146 return 0;
147}
148
149int wl12xx_acx_tx_power(struct wl12xx *wl, int power)
150{
151 struct acx_current_tx_power ie;
152 int ret;
153
154 wl12xx_debug(DEBUG_ACX, "acx dot11_cur_tx_pwr");
155
156 if (power < 0 || power > 25)
157 return -EINVAL;
158
159 memset(&ie, 0, sizeof(ie));
160
161 ie.header.id = DOT11_CUR_TX_PWR;
162 ie.header.len = sizeof(ie) - sizeof(struct acx_header);
163 ie.current_tx_power = power * 10;
164
165 ret = wl12xx_cmd_configure(wl, &ie, sizeof(ie));
166 if (ret < 0) {
167 wl12xx_warning("configure of tx power failed: %d", ret);
168 return ret;
169 }
170
171 return 0;
172}
173
174int wl12xx_acx_feature_cfg(struct wl12xx *wl)
175{
176 struct acx_feature_config feature;
177 int ret;
178
179 wl12xx_debug(DEBUG_ACX, "acx feature cfg");
180
181 memset(&feature, 0, sizeof(feature));
182
183 feature.header.id = ACX_FEATURE_CFG;
184 feature.header.len = sizeof(feature) - sizeof(struct acx_header);
185
186 /* DF_ENCRYPTION_DISABLE and DF_SNIFF_MODE_ENABLE are disabled */
187 feature.data_flow_options = 0;
188 feature.options = 0;
189
190 ret = wl12xx_cmd_configure(wl, &feature, sizeof(feature));
191 if (ret < 0)
192 wl12xx_error("Couldnt set HW encryption");
193
194 return ret;
195}
196
197int wl12xx_acx_mem_map(struct wl12xx *wl, void *mem_map, size_t len)
198{
199 struct wl12xx_command cmd;
200 int ret;
201
202 wl12xx_debug(DEBUG_ACX, "acx mem map");
203
204 ret = wl12xx_cmd_interrogate(wl, ACX_MEM_MAP, len, &cmd);
205 if (ret < 0)
206 return ret;
207 else if (cmd.status != CMD_STATUS_SUCCESS)
208 return -EIO;
209
210 memcpy(mem_map, &cmd.parameters, len);
211
212 return 0;
213}
214
215int wl12xx_acx_data_path_params(struct wl12xx *wl,
216 struct acx_data_path_params_resp *data_path)
217{
218 struct acx_data_path_params params;
219 struct wl12xx_command cmd;
220 int ret;
221
222 wl12xx_debug(DEBUG_ACX, "acx data path params");
223
224 params.rx_packet_ring_chunk_size = DP_RX_PACKET_RING_CHUNK_SIZE;
225 params.tx_packet_ring_chunk_size = DP_TX_PACKET_RING_CHUNK_SIZE;
226
227 params.rx_packet_ring_chunk_num = DP_RX_PACKET_RING_CHUNK_NUM;
228 params.tx_packet_ring_chunk_num = DP_TX_PACKET_RING_CHUNK_NUM;
229
230 params.tx_complete_threshold = 1;
231
232 params.tx_complete_ring_depth = FW_TX_CMPLT_BLOCK_SIZE;
233
234 params.tx_complete_timeout = DP_TX_COMPLETE_TIME_OUT;
235
236 params.header.id = ACX_DATA_PATH_PARAMS;
237 params.header.len = sizeof(params) - sizeof(struct acx_header);
238
239 ret = wl12xx_cmd_configure(wl, &params, sizeof(params));
240 if (ret < 0)
241 return ret;
242
243
244 ret = wl12xx_cmd_interrogate(wl, ACX_DATA_PATH_PARAMS,
245 sizeof(struct acx_data_path_params_resp),
246 &cmd);
247
248 if (ret < 0) {
249 wl12xx_warning("failed to read data path parameters: %d", ret);
250 return ret;
251 } else if (cmd.status != CMD_STATUS_SUCCESS) {
252 wl12xx_warning("data path parameter acx status failed");
253 return -EIO;
254 }
255
256 memcpy(data_path, &cmd.parameters, sizeof(*data_path));
257
258 return 0;
259}
260
261int wl12xx_acx_rx_msdu_life_time(struct wl12xx *wl, u32 life_time)
262{
263 struct rx_msdu_lifetime msdu_lifetime;
264 int ret;
265
266 wl12xx_debug(DEBUG_ACX, "acx rx msdu life time");
267
268 msdu_lifetime.header.id = DOT11_RX_MSDU_LIFE_TIME;
269 msdu_lifetime.header.len = sizeof(msdu_lifetime) -
270 sizeof(struct acx_header);
271 msdu_lifetime.lifetime = life_time;
272
273 ret = wl12xx_cmd_configure(wl, &msdu_lifetime, sizeof(msdu_lifetime));
274 if (ret < 0) {
275 wl12xx_warning("failed to set rx msdu life time: %d", ret);
276 return ret;
277 }
278
279 return 0;
280}
281
282int wl12xx_acx_rx_config(struct wl12xx *wl, u32 config, u32 filter)
283{
284 struct acx_rx_config rx_config;
285 int ret;
286
287 wl12xx_debug(DEBUG_ACX, "acx rx config");
288
289 rx_config.header.id = ACX_RX_CFG;
290 rx_config.header.len = sizeof(rx_config) - sizeof(struct acx_header);
291 rx_config.config_options = config;
292 rx_config.filter_options = filter;
293
294 ret = wl12xx_cmd_configure(wl, &rx_config, sizeof(rx_config));
295 if (ret < 0) {
296 wl12xx_warning("failed to set rx config: %d", ret);
297 return ret;
298 }
299
300 return 0;
301}
302
303int wl12xx_acx_pd_threshold(struct wl12xx *wl)
304{
305 struct acx_packet_detection packet_detection;
306 int ret;
307
308 wl12xx_debug(DEBUG_ACX, "acx data pd threshold");
309
310 /* FIXME: threshold value not set */
311 packet_detection.header.id = ACX_PD_THRESHOLD;
312 packet_detection.header.len = sizeof(packet_detection) -
313 sizeof(struct acx_header);
314
315 ret = wl12xx_cmd_configure(wl, &packet_detection,
316 sizeof(packet_detection));
317 if (ret < 0) {
318 wl12xx_warning("failed to set pd threshold: %d", ret);
319 return ret;
320 }
321
322 return 0;
323}
324
325int wl12xx_acx_slot(struct wl12xx *wl, enum acx_slot_type slot_time)
326{
327 struct acx_slot slot;
328 int ret;
329
330 wl12xx_debug(DEBUG_ACX, "acx slot");
331
332 slot.header.id = ACX_SLOT;
333 slot.header.len = sizeof(slot) - sizeof(struct acx_header);
334
335 slot.wone_index = STATION_WONE_INDEX;
336 slot.slot_time = slot_time;
337
338 ret = wl12xx_cmd_configure(wl, &slot, sizeof(slot));
339 if (ret < 0) {
340 wl12xx_warning("failed to set slot time: %d", ret);
341 return ret;
342 }
343
344 return 0;
345}
346
347int wl12xx_acx_group_address_tbl(struct wl12xx *wl)
348{
349 struct multicast_grp_addr_start multicast;
350 int ret;
351
352 wl12xx_debug(DEBUG_ACX, "acx group address tbl");
353
354 /* MAC filtering */
355 multicast.header.id = DOT11_GROUP_ADDRESS_TBL;
356 multicast.header.len = sizeof(multicast) - sizeof(struct acx_header);
357
358 multicast.enabled = 0;
359 multicast.num_groups = 0;
360 memset(multicast.mac_table, 0, ADDRESS_GROUP_MAX_LEN);
361
362 ret = wl12xx_cmd_configure(wl, &multicast, sizeof(multicast));
363 if (ret < 0) {
364 wl12xx_warning("failed to set group addr table: %d", ret);
365 return ret;
366 }
367
368 return 0;
369}
370
371int wl12xx_acx_service_period_timeout(struct wl12xx *wl)
372{
373 struct acx_rx_timeout rx_timeout;
374 int ret;
375
376 wl12xx_debug(DEBUG_ACX, "acx service period timeout");
377
378 /* RX timeout */
379 rx_timeout.header.id = ACX_SERVICE_PERIOD_TIMEOUT;
380 rx_timeout.header.len = sizeof(rx_timeout) - sizeof(struct acx_header);
381
382 rx_timeout.ps_poll_timeout = RX_TIMEOUT_PS_POLL_DEF;
383 rx_timeout.upsd_timeout = RX_TIMEOUT_UPSD_DEF;
384
385 ret = wl12xx_cmd_configure(wl, &rx_timeout, sizeof(rx_timeout));
386 if (ret < 0) {
387 wl12xx_warning("failed to set service period timeout: %d",
388 ret);
389 return ret;
390 }
391
392 return 0;
393}
394
395int wl12xx_acx_rts_threshold(struct wl12xx *wl, u16 rts_threshold)
396{
397 struct acx_rts_threshold rts;
398 int ret;
399
400 wl12xx_debug(DEBUG_ACX, "acx rts threshold");
401
402 rts.header.id = DOT11_RTS_THRESHOLD;
403 rts.header.len = sizeof(rts) - sizeof(struct acx_header);
404
405 rts.threshold = rts_threshold;
406
407 ret = wl12xx_cmd_configure(wl, &rts, sizeof(rts));
408 if (ret < 0) {
409 wl12xx_warning("failed to set rts threshold: %d", ret);
410 return ret;
411 }
412
413 return 0;
414}
415
416int wl12xx_acx_beacon_filter_opt(struct wl12xx *wl)
417{
418 struct acx_beacon_filter_option beacon_filter;
419 int ret;
420
421 wl12xx_debug(DEBUG_ACX, "acx beacon filter opt");
422
423 beacon_filter.header.id = ACX_BEACON_FILTER_OPT;
424 beacon_filter.header.len = sizeof(beacon_filter) -
425 sizeof(struct acx_header);
426
427 beacon_filter.enable = 0;
428 beacon_filter.max_num_beacons = 0;
429
430 ret = wl12xx_cmd_configure(wl, &beacon_filter, sizeof(beacon_filter));
431 if (ret < 0) {
432 wl12xx_warning("failed to set beacon filter opt: %d", ret);
433 return ret;
434 }
435
436 return 0;
437}
438
439int wl12xx_acx_beacon_filter_table(struct wl12xx *wl)
440{
441 struct acx_beacon_filter_ie_table ie_table;
442 int ret;
443
444 wl12xx_debug(DEBUG_ACX, "acx beacon filter table");
445
446 ie_table.header.id = ACX_BEACON_FILTER_TABLE;
447 ie_table.header.len = sizeof(ie_table) - sizeof(struct acx_header);
448
449 ie_table.num_ie = 0;
450 memset(ie_table.table, 0, BEACON_FILTER_TABLE_MAX_SIZE);
451
452 ret = wl12xx_cmd_configure(wl, &ie_table, sizeof(ie_table));
453 if (ret < 0) {
454 wl12xx_warning("failed to set beacon filter table: %d", ret);
455 return ret;
456 }
457
458 return 0;
459}
460
461int wl12xx_acx_sg_enable(struct wl12xx *wl)
462{
463 struct acx_bt_wlan_coex pta;
464 int ret;
465
466 wl12xx_debug(DEBUG_ACX, "acx sg enable");
467
468 pta.header.id = ACX_SG_ENABLE;
469 pta.header.len = sizeof(pta) - sizeof(struct acx_header);
470
471 pta.enable = SG_ENABLE;
472
473 ret = wl12xx_cmd_configure(wl, &pta, sizeof(pta));
474 if (ret < 0) {
475 wl12xx_warning("failed to set softgemini enable: %d", ret);
476 return ret;
477 }
478
479 return 0;
480}
481
482int wl12xx_acx_sg_cfg(struct wl12xx *wl)
483{
484 struct acx_bt_wlan_coex_param param;
485 int ret;
486
487 wl12xx_debug(DEBUG_ACX, "acx sg cfg");
488
489 /* BT-WLAN coext parameters */
490 param.header.id = ACX_SG_CFG;
491 param.header.len = sizeof(param) - sizeof(struct acx_header);
492
493 param.min_rate = RATE_INDEX_24MBPS;
494 param.bt_hp_max_time = PTA_BT_HP_MAXTIME_DEF;
495 param.wlan_hp_max_time = PTA_WLAN_HP_MAX_TIME_DEF;
496 param.sense_disable_timer = PTA_SENSE_DISABLE_TIMER_DEF;
497 param.rx_time_bt_hp = PTA_PROTECTIVE_RX_TIME_DEF;
498 param.tx_time_bt_hp = PTA_PROTECTIVE_TX_TIME_DEF;
499 param.rx_time_bt_hp_fast = PTA_PROTECTIVE_RX_TIME_FAST_DEF;
500 param.tx_time_bt_hp_fast = PTA_PROTECTIVE_TX_TIME_FAST_DEF;
501 param.wlan_cycle_fast = PTA_CYCLE_TIME_FAST_DEF;
502 param.bt_anti_starvation_period = PTA_ANTI_STARVE_PERIOD_DEF;
503 param.next_bt_lp_packet = PTA_TIMEOUT_NEXT_BT_LP_PACKET_DEF;
504 param.wake_up_beacon = PTA_TIME_BEFORE_BEACON_DEF;
505 param.hp_dm_max_guard_time = PTA_HPDM_MAX_TIME_DEF;
506 param.next_wlan_packet = PTA_TIME_OUT_NEXT_WLAN_DEF;
507 param.antenna_type = PTA_ANTENNA_TYPE_DEF;
508 param.signal_type = PTA_SIGNALING_TYPE_DEF;
509 param.afh_leverage_on = PTA_AFH_LEVERAGE_ON_DEF;
510 param.quiet_cycle_num = PTA_NUMBER_QUIET_CYCLE_DEF;
511 param.max_cts = PTA_MAX_NUM_CTS_DEF;
512 param.wlan_packets_num = PTA_NUMBER_OF_WLAN_PACKETS_DEF;
513 param.bt_packets_num = PTA_NUMBER_OF_BT_PACKETS_DEF;
514 param.missed_rx_avalanche = PTA_RX_FOR_AVALANCHE_DEF;
515 param.wlan_elp_hp = PTA_ELP_HP_DEF;
516 param.bt_anti_starvation_cycles = PTA_ANTI_STARVE_NUM_CYCLE_DEF;
517 param.ack_mode_dual_ant = PTA_ACK_MODE_DEF;
518 param.pa_sd_enable = PTA_ALLOW_PA_SD_DEF;
519 param.pta_auto_mode_enable = PTA_AUTO_MODE_NO_CTS_DEF;
520 param.bt_hp_respected_num = PTA_BT_HP_RESPECTED_DEF;
521
522 ret = wl12xx_cmd_configure(wl, &param, sizeof(param));
523 if (ret < 0) {
524 wl12xx_warning("failed to set sg config: %d", ret);
525 return ret;
526 }
527
528 return 0;
529}
530
531int wl12xx_acx_cca_threshold(struct wl12xx *wl)
532{
533 struct acx_energy_detection detection;
534 int ret;
535
536 wl12xx_debug(DEBUG_ACX, "acx cca threshold");
537
538 detection.header.id = ACX_CCA_THRESHOLD;
539 detection.header.len = sizeof(detection) - sizeof(struct acx_header);
540
541 detection.rx_cca_threshold = CCA_THRSH_DISABLE_ENERGY_D;
542 detection.tx_energy_detection = 0;
543
544 ret = wl12xx_cmd_configure(wl, &detection, sizeof(detection));
545 if (ret < 0) {
546 wl12xx_warning("failed to set cca threshold: %d", ret);
547 return ret;
548 }
549
550 return 0;
551}
552
553int wl12xx_acx_bcn_dtim_options(struct wl12xx *wl)
554{
555 struct acx_beacon_broadcast bb;
556 int ret;
557
558 wl12xx_debug(DEBUG_ACX, "acx bcn dtim options");
559
560 bb.header.id = ACX_BCN_DTIM_OPTIONS;
561 bb.header.len = sizeof(bb) - sizeof(struct acx_header);
562
563 bb.beacon_rx_timeout = BCN_RX_TIMEOUT_DEF_VALUE;
564 bb.broadcast_timeout = BROADCAST_RX_TIMEOUT_DEF_VALUE;
565 bb.rx_broadcast_in_ps = RX_BROADCAST_IN_PS_DEF_VALUE;
566 bb.ps_poll_threshold = CONSECUTIVE_PS_POLL_FAILURE_DEF;
567
568 ret = wl12xx_cmd_configure(wl, &bb, sizeof(bb));
569 if (ret < 0) {
570 wl12xx_warning("failed to set rx config: %d", ret);
571 return ret;
572 }
573
574 return 0;
575}
576
577int wl12xx_acx_aid(struct wl12xx *wl, u16 aid)
578{
579 struct acx_aid acx_aid;
580 int ret;
581
582 wl12xx_debug(DEBUG_ACX, "acx aid");
583
584 acx_aid.header.id = ACX_AID;
585 acx_aid.header.len = sizeof(acx_aid) - sizeof(struct acx_header);
586
587 acx_aid.aid = aid;
588
589 ret = wl12xx_cmd_configure(wl, &acx_aid, sizeof(acx_aid));
590 if (ret < 0) {
591 wl12xx_warning("failed to set aid: %d", ret);
592 return ret;
593 }
594
595 return 0;
596}
597
598int wl12xx_acx_event_mbox_mask(struct wl12xx *wl, u32 event_mask)
599{
600 struct acx_event_mask mask;
601 int ret;
602
603 wl12xx_debug(DEBUG_ACX, "acx event mbox mask");
604
605 mask.header.id = ACX_EVENT_MBOX_MASK;
606 mask.header.len = sizeof(mask) - sizeof(struct acx_header);
607
608 /* high event mask is unused */
609 mask.high_event_mask = 0xffffffff;
610
611 mask.event_mask = event_mask;
612
613 ret = wl12xx_cmd_configure(wl, &mask, sizeof(mask));
614 if (ret < 0) {
615 wl12xx_warning("failed to set aid: %d", ret);
616 return ret;
617 }
618
619 return 0;
620}
621
622int wl12xx_acx_set_preamble(struct wl12xx *wl, enum acx_preamble_type preamble)
623{
624 struct acx_preamble ie;
625 int ret;
626
627 wl12xx_debug(DEBUG_ACX, "acx_set_preamble");
628
629 memset(&ie, 0, sizeof(ie));
630
631 ie.header.id = ACX_PREAMBLE_TYPE;
632 ie.header.len = sizeof(ie) - sizeof(struct acx_header);
633 ie.preamble = preamble;
634 ret = wl12xx_cmd_configure(wl, &ie, sizeof(ie));
635 if (ret < 0) {
636 wl12xx_warning("Setting of preamble failed: %d", ret);
637 return ret;
638 }
639 return 0;
640}
641
642int wl12xx_acx_cts_protect(struct wl12xx *wl,
643 enum acx_ctsprotect_type ctsprotect)
644{
645 struct acx_ctsprotect ie;
646 int ret;
647
648 wl12xx_debug(DEBUG_ACX, "acx_set_ctsprotect");
649
650 memset(&ie, 0, sizeof(ie));
651
652 ie.header.id = ACX_CTS_PROTECTION;
653 ie.header.len = sizeof(ie) - sizeof(struct acx_header);
654 ie.ctsprotect = ctsprotect;
655 ret = wl12xx_cmd_configure(wl, &ie, sizeof(ie));
656 if (ret < 0) {
657 wl12xx_warning("Setting of ctsprotect failed: %d", ret);
658 return ret;
659 }
660 return 0;
661}
662
663int wl12xx_acx_statistics(struct wl12xx *wl, struct acx_statistics *stats)
664{
665 struct wl12xx_command *answer;
666 int ret;
667
668 wl12xx_debug(DEBUG_ACX, "acx statistics");
669
670 answer = kmalloc(sizeof(*answer), GFP_KERNEL);
671 if (!answer) {
672 wl12xx_warning("could not allocate memory for acx statistics");
673 ret = -ENOMEM;
674 goto out;
675 }
676
677 ret = wl12xx_cmd_interrogate(wl, ACX_STATISTICS, sizeof(*answer),
678 answer);
679 if (ret < 0) {
680 wl12xx_warning("acx statistics failed: %d", ret);
681 goto out;
682 }
683
684 memcpy(stats, answer->parameters, sizeof(*stats));
685
686out:
687 kfree(answer);
688 return ret;
689}
diff --git a/drivers/net/wireless/wl12xx/acx.h b/drivers/net/wireless/wl12xx/acx.h
new file mode 100644
index 000000000000..fb2d2340993c
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/acx.h
@@ -0,0 +1,1245 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL12XX_ACX_H__
26#define __WL12XX_ACX_H__
27
28#include "wl12xx.h"
29
30/* Target's information element */
31struct acx_header {
32 u16 id;
33 u16 len;
34};
35
36struct acx_error_counter {
37 struct acx_header header;
38
39 /* The number of PLCP errors since the last time this */
40 /* information element was interrogated. This field is */
41 /* automatically cleared when it is interrogated.*/
42 u32 PLCP_error;
43
44 /* The number of FCS errors since the last time this */
45 /* information element was interrogated. This field is */
46 /* automatically cleared when it is interrogated.*/
47 u32 FCS_error;
48
49 /* The number of MPDUs without PLCP header errors received*/
50 /* since the last time this information element was interrogated. */
51 /* This field is automatically cleared when it is interrogated.*/
52 u32 valid_frame;
53
54 /* the number of missed sequence numbers in the squentially */
55 /* values of frames seq numbers */
56 u32 seq_num_miss;
57} __attribute__ ((packed));
58
59struct acx_revision {
60 struct acx_header header;
61
62 /*
63 * The WiLink firmware version, an ASCII string x.x.x.x,
64 * that uniquely identifies the current firmware.
65 * The left most digit is incremented each time a
66 * significant change is made to the firmware, such as
67 * code redesign or new platform support.
68 * The second digit is incremented when major enhancements
69 * are added or major fixes are made.
70 * The third digit is incremented for each GA release.
71 * The fourth digit is incremented for each build.
72 * The first two digits identify a firmware release version,
73 * in other words, a unique set of features.
74 * The first three digits identify a GA release.
75 */
76 char fw_version[20];
77
78 /*
79 * This 4 byte field specifies the WiLink hardware version.
80 * bits 0 - 15: Reserved.
81 * bits 16 - 23: Version ID - The WiLink version ID
82 * (1 = first spin, 2 = second spin, and so on).
83 * bits 24 - 31: Chip ID - The WiLink chip ID.
84 */
85 u32 hw_version;
86} __attribute__ ((packed));
87
88enum wl12xx_psm_mode {
89 /* Active mode */
90 WL12XX_PSM_CAM = 0,
91
92 /* Power save mode */
93 WL12XX_PSM_PS = 1,
94
95 /* Extreme low power */
96 WL12XX_PSM_ELP = 2,
97};
98
99struct acx_sleep_auth {
100 struct acx_header header;
101
102 /* The sleep level authorization of the device. */
103 /* 0 - Always active*/
104 /* 1 - Power down mode: light / fast sleep*/
105 /* 2 - ELP mode: Deep / Max sleep*/
106 u8 sleep_auth;
107 u8 padding[3];
108} __attribute__ ((packed));
109
110#define TIM_ELE_ID 5
111#define PARTIAL_VBM_MAX 251
112
113struct tim {
114 u8 identity;
115 u8 length;
116 u8 dtim_count;
117 u8 dtim_period;
118 u8 bitmap_ctrl;
119 u8 pvb_field[PARTIAL_VBM_MAX]; /* Partial Virtual Bitmap */
120} __attribute__ ((packed));
121
122/* Virtual Bit Map update */
123struct vbm_update_request {
124 __le16 len;
125 u8 padding[2];
126 struct tim tim;
127} __attribute__ ((packed));
128
129enum {
130 HOSTIF_PCI_MASTER_HOST_INDIRECT,
131 HOSTIF_PCI_MASTER_HOST_DIRECT,
132 HOSTIF_SLAVE,
133 HOSTIF_PKT_RING,
134 HOSTIF_DONTCARE = 0xFF
135};
136
137#define DEFAULT_UCAST_PRIORITY 0
138#define DEFAULT_RX_Q_PRIORITY 0
139#define DEFAULT_NUM_STATIONS 1
140#define DEFAULT_RXQ_PRIORITY 0 /* low 0 .. 15 high */
141#define DEFAULT_RXQ_TYPE 0x07 /* All frames, Data/Ctrl/Mgmt */
142#define TRACE_BUFFER_MAX_SIZE 256
143
144#define DP_RX_PACKET_RING_CHUNK_SIZE 1600
145#define DP_TX_PACKET_RING_CHUNK_SIZE 1600
146#define DP_RX_PACKET_RING_CHUNK_NUM 2
147#define DP_TX_PACKET_RING_CHUNK_NUM 2
148#define DP_TX_COMPLETE_TIME_OUT 20
149#define FW_TX_CMPLT_BLOCK_SIZE 16
150
151struct acx_data_path_params {
152 struct acx_header header;
153
154 u16 rx_packet_ring_chunk_size;
155 u16 tx_packet_ring_chunk_size;
156
157 u8 rx_packet_ring_chunk_num;
158 u8 tx_packet_ring_chunk_num;
159
160 /*
161 * Maximum number of packets that can be gathered
162 * in the TX complete ring before an interrupt
163 * is generated.
164 */
165 u8 tx_complete_threshold;
166
167 /* Number of pending TX complete entries in cyclic ring.*/
168 u8 tx_complete_ring_depth;
169
170 /*
171 * Max num microseconds since a packet enters the TX
172 * complete ring until an interrupt is generated.
173 */
174 u32 tx_complete_timeout;
175} __attribute__ ((packed));
176
177
178struct acx_data_path_params_resp {
179 struct acx_header header;
180
181 u16 rx_packet_ring_chunk_size;
182 u16 tx_packet_ring_chunk_size;
183
184 u8 rx_packet_ring_chunk_num;
185 u8 tx_packet_ring_chunk_num;
186
187 u8 pad[2];
188
189 u32 rx_packet_ring_addr;
190 u32 tx_packet_ring_addr;
191
192 u32 rx_control_addr;
193 u32 tx_control_addr;
194
195 u32 tx_complete_addr;
196} __attribute__ ((packed));
197
198#define TX_MSDU_LIFETIME_MIN 0
199#define TX_MSDU_LIFETIME_MAX 3000
200#define TX_MSDU_LIFETIME_DEF 512
201#define RX_MSDU_LIFETIME_MIN 0
202#define RX_MSDU_LIFETIME_MAX 0xFFFFFFFF
203#define RX_MSDU_LIFETIME_DEF 512000
204
205struct rx_msdu_lifetime {
206 struct acx_header header;
207
208 /*
209 * The maximum amount of time, in TU, before the
210 * firmware discards the MSDU.
211 */
212 u32 lifetime;
213} __attribute__ ((packed));
214
215/*
216 * RX Config Options Table
217 * Bit Definition
218 * === ==========
219 * 31:14 Reserved
220 * 13 Copy RX Status - when set, write three receive status words
221 * to top of rx'd MPDUs.
222 * When cleared, do not write three status words (added rev 1.5)
223 * 12 Reserved
224 * 11 RX Complete upon FCS error - when set, give rx complete
225 * interrupt for FCS errors, after the rx filtering, e.g. unicast
226 * frames not to us with FCS error will not generate an interrupt.
227 * 10 SSID Filter Enable - When set, the WiLink discards all beacon,
228 * probe request, and probe response frames with an SSID that does
229 * not match the SSID specified by the host in the START/JOIN
230 * command.
231 * When clear, the WiLink receives frames with any SSID.
232 * 9 Broadcast Filter Enable - When set, the WiLink discards all
233 * broadcast frames. When clear, the WiLink receives all received
234 * broadcast frames.
235 * 8:6 Reserved
236 * 5 BSSID Filter Enable - When set, the WiLink discards any frames
237 * with a BSSID that does not match the BSSID specified by the
238 * host.
239 * When clear, the WiLink receives frames from any BSSID.
240 * 4 MAC Addr Filter - When set, the WiLink discards any frames
241 * with a destination address that does not match the MAC address
242 * of the adaptor.
243 * When clear, the WiLink receives frames destined to any MAC
244 * address.
245 * 3 Promiscuous - When set, the WiLink receives all valid frames
246 * (i.e., all frames that pass the FCS check).
247 * When clear, only frames that pass the other filters specified
248 * are received.
249 * 2 FCS - When set, the WiLink includes the FCS with the received
250 * frame.
251 * When cleared, the FCS is discarded.
252 * 1 PLCP header - When set, write all data from baseband to frame
253 * buffer including PHY header.
254 * 0 Reserved - Always equal to 0.
255 *
256 * RX Filter Options Table
257 * Bit Definition
258 * === ==========
259 * 31:12 Reserved - Always equal to 0.
260 * 11 Association - When set, the WiLink receives all association
261 * related frames (association request/response, reassocation
262 * request/response, and disassociation). When clear, these frames
263 * are discarded.
264 * 10 Auth/De auth - When set, the WiLink receives all authentication
265 * and de-authentication frames. When clear, these frames are
266 * discarded.
267 * 9 Beacon - When set, the WiLink receives all beacon frames.
268 * When clear, these frames are discarded.
269 * 8 Contention Free - When set, the WiLink receives all contention
270 * free frames.
271 * When clear, these frames are discarded.
272 * 7 Control - When set, the WiLink receives all control frames.
273 * When clear, these frames are discarded.
274 * 6 Data - When set, the WiLink receives all data frames.
275 * When clear, these frames are discarded.
276 * 5 FCS Error - When set, the WiLink receives frames that have FCS
277 * errors.
278 * When clear, these frames are discarded.
279 * 4 Management - When set, the WiLink receives all management
280 * frames.
281 * When clear, these frames are discarded.
282 * 3 Probe Request - When set, the WiLink receives all probe request
283 * frames.
284 * When clear, these frames are discarded.
285 * 2 Probe Response - When set, the WiLink receives all probe
286 * response frames.
287 * When clear, these frames are discarded.
288 * 1 RTS/CTS/ACK - When set, the WiLink receives all RTS, CTS and ACK
289 * frames.
290 * When clear, these frames are discarded.
291 * 0 Rsvd Type/Sub Type - When set, the WiLink receives all frames
292 * that have reserved frame types and sub types as defined by the
293 * 802.11 specification.
294 * When clear, these frames are discarded.
295 */
296struct acx_rx_config {
297 struct acx_header header;
298
299 u32 config_options;
300 u32 filter_options;
301} __attribute__ ((packed));
302
303enum {
304 QOS_AC_BE = 0,
305 QOS_AC_BK,
306 QOS_AC_VI,
307 QOS_AC_VO,
308 QOS_HIGHEST_AC_INDEX = QOS_AC_VO,
309};
310
311#define MAX_NUM_OF_AC (QOS_HIGHEST_AC_INDEX+1)
312#define FIRST_AC_INDEX QOS_AC_BE
313#define MAX_NUM_OF_802_1d_TAGS 8
314#define AC_PARAMS_MAX_TSID 15
315#define MAX_APSD_CONF 0xffff
316
317#define QOS_TX_HIGH_MIN (0)
318#define QOS_TX_HIGH_MAX (100)
319
320#define QOS_TX_HIGH_BK_DEF (25)
321#define QOS_TX_HIGH_BE_DEF (35)
322#define QOS_TX_HIGH_VI_DEF (35)
323#define QOS_TX_HIGH_VO_DEF (35)
324
325#define QOS_TX_LOW_BK_DEF (15)
326#define QOS_TX_LOW_BE_DEF (25)
327#define QOS_TX_LOW_VI_DEF (25)
328#define QOS_TX_LOW_VO_DEF (25)
329
330struct acx_tx_queue_qos_config {
331 struct acx_header header;
332
333 u8 qid;
334 u8 pad[3];
335
336 /* Max number of blocks allowd in the queue */
337 u16 high_threshold;
338
339 /* Lowest memory blocks guaranteed for this queue */
340 u16 low_threshold;
341} __attribute__ ((packed));
342
343struct acx_packet_detection {
344 struct acx_header header;
345
346 u32 threshold;
347} __attribute__ ((packed));
348
349
350enum acx_slot_type {
351 SLOT_TIME_LONG = 0,
352 SLOT_TIME_SHORT = 1,
353 DEFAULT_SLOT_TIME = SLOT_TIME_SHORT,
354 MAX_SLOT_TIMES = 0xFF
355};
356
357#define STATION_WONE_INDEX 0
358
359struct acx_slot {
360 struct acx_header header;
361
362 u8 wone_index; /* Reserved */
363 u8 slot_time;
364 u8 reserved[6];
365} __attribute__ ((packed));
366
367
368#define ADDRESS_GROUP_MAX (8)
369#define ADDRESS_GROUP_MAX_LEN (ETH_ALEN * ADDRESS_GROUP_MAX)
370
371struct multicast_grp_addr_start {
372 struct acx_header header;
373
374 u8 enabled;
375 u8 num_groups;
376 u8 pad[2];
377 u8 mac_table[ADDRESS_GROUP_MAX_LEN];
378} __attribute__ ((packed));
379
380
381#define RX_TIMEOUT_PS_POLL_MIN 0
382#define RX_TIMEOUT_PS_POLL_MAX (200000)
383#define RX_TIMEOUT_PS_POLL_DEF (15)
384#define RX_TIMEOUT_UPSD_MIN 0
385#define RX_TIMEOUT_UPSD_MAX (200000)
386#define RX_TIMEOUT_UPSD_DEF (15)
387
388struct acx_rx_timeout {
389 struct acx_header header;
390
391 /*
392 * The longest time the STA will wait to receive
393 * traffic from the AP after a PS-poll has been
394 * transmitted.
395 */
396 u16 ps_poll_timeout;
397
398 /*
399 * The longest time the STA will wait to receive
400 * traffic from the AP after a frame has been sent
401 * from an UPSD enabled queue.
402 */
403 u16 upsd_timeout;
404} __attribute__ ((packed));
405
406#define RTS_THRESHOLD_MIN 0
407#define RTS_THRESHOLD_MAX 4096
408#define RTS_THRESHOLD_DEF 2347
409
410struct acx_rts_threshold {
411 struct acx_header header;
412
413 u16 threshold;
414 u8 pad[2];
415} __attribute__ ((packed));
416
417struct acx_beacon_filter_option {
418 struct acx_header header;
419
420 u8 enable;
421
422 /*
423 * The number of beacons without the unicast TIM
424 * bit set that the firmware buffers before
425 * signaling the host about ready frames.
426 * When set to 0 and the filter is enabled, beacons
427 * without the unicast TIM bit set are dropped.
428 */
429 u8 max_num_beacons;
430 u8 pad[2];
431} __attribute__ ((packed));
432
433/*
434 * ACXBeaconFilterEntry (not 221)
435 * Byte Offset Size (Bytes) Definition
436 * =========== ============ ==========
437 * 0 1 IE identifier
438 * 1 1 Treatment bit mask
439 *
440 * ACXBeaconFilterEntry (221)
441 * Byte Offset Size (Bytes) Definition
442 * =========== ============ ==========
443 * 0 1 IE identifier
444 * 1 1 Treatment bit mask
445 * 2 3 OUI
446 * 5 1 Type
447 * 6 2 Version
448 *
449 *
450 * Treatment bit mask - The information element handling:
451 * bit 0 - The information element is compared and transferred
452 * in case of change.
453 * bit 1 - The information element is transferred to the host
454 * with each appearance or disappearance.
455 * Note that both bits can be set at the same time.
456 */
457#define BEACON_FILTER_TABLE_MAX_IE_NUM (32)
458#define BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM (6)
459#define BEACON_FILTER_TABLE_IE_ENTRY_SIZE (2)
460#define BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE (6)
461#define BEACON_FILTER_TABLE_MAX_SIZE ((BEACON_FILTER_TABLE_MAX_IE_NUM * \
462 BEACON_FILTER_TABLE_IE_ENTRY_SIZE) + \
463 (BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM * \
464 BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE))
465
466struct acx_beacon_filter_ie_table {
467 struct acx_header header;
468
469 u8 num_ie;
470 u8 table[BEACON_FILTER_TABLE_MAX_SIZE];
471 u8 pad[3];
472} __attribute__ ((packed));
473
474enum {
475 SG_ENABLE = 0,
476 SG_DISABLE,
477 SG_SENSE_NO_ACTIVITY,
478 SG_SENSE_ACTIVE
479};
480
481struct acx_bt_wlan_coex {
482 struct acx_header header;
483
484 /*
485 * 0 -> PTA enabled
486 * 1 -> PTA disabled
487 * 2 -> sense no active mode, i.e.
488 * an interrupt is sent upon
489 * BT activity.
490 * 3 -> PTA is switched on in response
491 * to the interrupt sending.
492 */
493 u8 enable;
494 u8 pad[3];
495} __attribute__ ((packed));
496
497#define PTA_ANTENNA_TYPE_DEF (0)
498#define PTA_BT_HP_MAXTIME_DEF (2000)
499#define PTA_WLAN_HP_MAX_TIME_DEF (5000)
500#define PTA_SENSE_DISABLE_TIMER_DEF (1350)
501#define PTA_PROTECTIVE_RX_TIME_DEF (1500)
502#define PTA_PROTECTIVE_TX_TIME_DEF (1500)
503#define PTA_TIMEOUT_NEXT_BT_LP_PACKET_DEF (3000)
504#define PTA_SIGNALING_TYPE_DEF (1)
505#define PTA_AFH_LEVERAGE_ON_DEF (0)
506#define PTA_NUMBER_QUIET_CYCLE_DEF (0)
507#define PTA_MAX_NUM_CTS_DEF (3)
508#define PTA_NUMBER_OF_WLAN_PACKETS_DEF (2)
509#define PTA_NUMBER_OF_BT_PACKETS_DEF (2)
510#define PTA_PROTECTIVE_RX_TIME_FAST_DEF (1500)
511#define PTA_PROTECTIVE_TX_TIME_FAST_DEF (3000)
512#define PTA_CYCLE_TIME_FAST_DEF (8700)
513#define PTA_RX_FOR_AVALANCHE_DEF (5)
514#define PTA_ELP_HP_DEF (0)
515#define PTA_ANTI_STARVE_PERIOD_DEF (500)
516#define PTA_ANTI_STARVE_NUM_CYCLE_DEF (4)
517#define PTA_ALLOW_PA_SD_DEF (1)
518#define PTA_TIME_BEFORE_BEACON_DEF (6300)
519#define PTA_HPDM_MAX_TIME_DEF (1600)
520#define PTA_TIME_OUT_NEXT_WLAN_DEF (2550)
521#define PTA_AUTO_MODE_NO_CTS_DEF (0)
522#define PTA_BT_HP_RESPECTED_DEF (3)
523#define PTA_WLAN_RX_MIN_RATE_DEF (24)
524#define PTA_ACK_MODE_DEF (1)
525
526struct acx_bt_wlan_coex_param {
527 struct acx_header header;
528
529 /*
530 * The minimum rate of a received WLAN packet in the STA,
531 * during protective mode, of which a new BT-HP request
532 * during this Rx will always be respected and gain the antenna.
533 */
534 u32 min_rate;
535
536 /* Max time the BT HP will be respected. */
537 u16 bt_hp_max_time;
538
539 /* Max time the WLAN HP will be respected. */
540 u16 wlan_hp_max_time;
541
542 /*
543 * The time between the last BT activity
544 * and the moment when the sense mode returns
545 * to SENSE_INACTIVE.
546 */
547 u16 sense_disable_timer;
548
549 /* Time before the next BT HP instance */
550 u16 rx_time_bt_hp;
551 u16 tx_time_bt_hp;
552
553 /* range: 10-20000 default: 1500 */
554 u16 rx_time_bt_hp_fast;
555 u16 tx_time_bt_hp_fast;
556
557 /* range: 2000-65535 default: 8700 */
558 u16 wlan_cycle_fast;
559
560 /* range: 0 - 15000 (Msec) default: 1000 */
561 u16 bt_anti_starvation_period;
562
563 /* range 400-10000(Usec) default: 3000 */
564 u16 next_bt_lp_packet;
565
566 /* Deafult: worst case for BT DH5 traffic */
567 u16 wake_up_beacon;
568
569 /* range: 0-50000(Usec) default: 1050 */
570 u16 hp_dm_max_guard_time;
571
572 /*
573 * This is to prevent both BT & WLAN antenna
574 * starvation.
575 * Range: 100-50000(Usec) default:2550
576 */
577 u16 next_wlan_packet;
578
579 /* 0 -> shared antenna */
580 u8 antenna_type;
581
582 /*
583 * 0 -> TI legacy
584 * 1 -> Palau
585 */
586 u8 signal_type;
587
588 /*
589 * BT AFH status
590 * 0 -> no AFH
591 * 1 -> from dedicated GPIO
592 * 2 -> AFH on (from host)
593 */
594 u8 afh_leverage_on;
595
596 /*
597 * The number of cycles during which no
598 * TX will be sent after 1 cycle of RX
599 * transaction in protective mode
600 */
601 u8 quiet_cycle_num;
602
603 /*
604 * The maximum number of CTSs that will
605 * be sent for receiving RX packet in
606 * protective mode
607 */
608 u8 max_cts;
609
610 /*
611 * The number of WLAN packets
612 * transferred in common mode before
613 * switching to BT.
614 */
615 u8 wlan_packets_num;
616
617 /*
618 * The number of BT packets
619 * transferred in common mode before
620 * switching to WLAN.
621 */
622 u8 bt_packets_num;
623
624 /* range: 1-255 default: 5 */
625 u8 missed_rx_avalanche;
626
627 /* range: 0-1 default: 1 */
628 u8 wlan_elp_hp;
629
630 /* range: 0 - 15 default: 4 */
631 u8 bt_anti_starvation_cycles;
632
633 u8 ack_mode_dual_ant;
634
635 /*
636 * Allow PA_SD assertion/de-assertion
637 * during enabled BT activity.
638 */
639 u8 pa_sd_enable;
640
641 /*
642 * Enable/Disable PTA in auto mode:
643 * Support Both Active & P.S modes
644 */
645 u8 pta_auto_mode_enable;
646
647 /* range: 0 - 20 default: 1 */
648 u8 bt_hp_respected_num;
649} __attribute__ ((packed));
650
651#define CCA_THRSH_ENABLE_ENERGY_D 0x140A
652#define CCA_THRSH_DISABLE_ENERGY_D 0xFFEF
653
654struct acx_energy_detection {
655 struct acx_header header;
656
657 /* The RX Clear Channel Assessment threshold in the PHY */
658 u16 rx_cca_threshold;
659 u8 tx_energy_detection;
660 u8 pad;
661} __attribute__ ((packed));
662
663#define BCN_RX_TIMEOUT_DEF_VALUE 10000
664#define BROADCAST_RX_TIMEOUT_DEF_VALUE 20000
665#define RX_BROADCAST_IN_PS_DEF_VALUE 1
666#define CONSECUTIVE_PS_POLL_FAILURE_DEF 4
667
668struct acx_beacon_broadcast {
669 struct acx_header header;
670
671 u16 beacon_rx_timeout;
672 u16 broadcast_timeout;
673
674 /* Enables receiving of broadcast packets in PS mode */
675 u8 rx_broadcast_in_ps;
676
677 /* Consecutive PS Poll failures before updating the host */
678 u8 ps_poll_threshold;
679 u8 pad[2];
680} __attribute__ ((packed));
681
682struct acx_event_mask {
683 struct acx_header header;
684
685 u32 event_mask;
686 u32 high_event_mask; /* Unused */
687} __attribute__ ((packed));
688
689#define CFG_RX_FCS BIT(2)
690#define CFG_RX_ALL_GOOD BIT(3)
691#define CFG_UNI_FILTER_EN BIT(4)
692#define CFG_BSSID_FILTER_EN BIT(5)
693#define CFG_MC_FILTER_EN BIT(6)
694#define CFG_MC_ADDR0_EN BIT(7)
695#define CFG_MC_ADDR1_EN BIT(8)
696#define CFG_BC_REJECT_EN BIT(9)
697#define CFG_SSID_FILTER_EN BIT(10)
698#define CFG_RX_INT_FCS_ERROR BIT(11)
699#define CFG_RX_INT_ENCRYPTED BIT(12)
700#define CFG_RX_WR_RX_STATUS BIT(13)
701#define CFG_RX_FILTER_NULTI BIT(14)
702#define CFG_RX_RESERVE BIT(15)
703#define CFG_RX_TIMESTAMP_TSF BIT(16)
704
705#define CFG_RX_RSV_EN BIT(0)
706#define CFG_RX_RCTS_ACK BIT(1)
707#define CFG_RX_PRSP_EN BIT(2)
708#define CFG_RX_PREQ_EN BIT(3)
709#define CFG_RX_MGMT_EN BIT(4)
710#define CFG_RX_FCS_ERROR BIT(5)
711#define CFG_RX_DATA_EN BIT(6)
712#define CFG_RX_CTL_EN BIT(7)
713#define CFG_RX_CF_EN BIT(8)
714#define CFG_RX_BCN_EN BIT(9)
715#define CFG_RX_AUTH_EN BIT(10)
716#define CFG_RX_ASSOC_EN BIT(11)
717
718#define SCAN_PASSIVE BIT(0)
719#define SCAN_5GHZ_BAND BIT(1)
720#define SCAN_TRIGGERED BIT(2)
721#define SCAN_PRIORITY_HIGH BIT(3)
722
723struct acx_fw_gen_frame_rates {
724 struct acx_header header;
725
726 u8 tx_ctrl_frame_rate; /* RATE_* */
727 u8 tx_ctrl_frame_mod; /* CCK_* or PBCC_* */
728 u8 tx_mgt_frame_rate;
729 u8 tx_mgt_frame_mod;
730} __attribute__ ((packed));
731
732/* STA MAC */
733struct dot11_station_id {
734 struct acx_header header;
735
736 u8 mac[ETH_ALEN];
737 u8 pad[2];
738} __attribute__ ((packed));
739
740/* HW encryption keys */
741#define NUM_ACCESS_CATEGORIES_COPY 4
742#define MAX_KEY_SIZE 32
743
744/* When set, disable HW encryption */
745#define DF_ENCRYPTION_DISABLE 0x01
746/* When set, disable HW decryption */
747#define DF_SNIFF_MODE_ENABLE 0x80
748
749struct acx_feature_config {
750 struct acx_header header;
751
752 u32 options;
753 u32 data_flow_options;
754} __attribute__ ((packed));
755
756enum acx_key_action {
757 KEY_ADD_OR_REPLACE = 1,
758 KEY_REMOVE = 2,
759 KEY_SET_ID = 3,
760 MAX_KEY_ACTION = 0xffff,
761};
762
763enum acx_key_type {
764 KEY_WEP_DEFAULT = 0,
765 KEY_WEP_ADDR = 1,
766 KEY_AES_GROUP = 4,
767 KEY_AES_PAIRWISE = 5,
768 KEY_WEP_GROUP = 6,
769 KEY_TKIP_MIC_GROUP = 10,
770 KEY_TKIP_MIC_PAIRWISE = 11,
771};
772
773/*
774 *
775 * key_type_e key size key format
776 * ---------- --------- ----------
777 * 0x00 5, 13, 29 Key data
778 * 0x01 5, 13, 29 Key data
779 * 0x04 16 16 bytes of key data
780 * 0x05 16 16 bytes of key data
781 * 0x0a 32 16 bytes of TKIP key data
782 * 8 bytes of RX MIC key data
783 * 8 bytes of TX MIC key data
784 * 0x0b 32 16 bytes of TKIP key data
785 * 8 bytes of RX MIC key data
786 * 8 bytes of TX MIC key data
787 *
788 */
789
790struct acx_set_key {
791 /* Ignored for default WEP key */
792 u8 addr[ETH_ALEN];
793
794 /* key_action_e */
795 u16 key_action;
796
797 u16 reserved_1;
798
799 /* key size in bytes */
800 u8 key_size;
801
802 /* key_type_e */
803 u8 key_type;
804 u8 ssid_profile;
805
806 /*
807 * TKIP, AES: frame's key id field.
808 * For WEP default key: key id;
809 */
810 u8 id;
811 u8 reserved_2[6];
812 u8 key[MAX_KEY_SIZE];
813 u16 ac_seq_num16[NUM_ACCESS_CATEGORIES_COPY];
814 u32 ac_seq_num32[NUM_ACCESS_CATEGORIES_COPY];
815} __attribute__ ((packed));
816
817struct acx_current_tx_power {
818 struct acx_header header;
819
820 u8 current_tx_power;
821 u8 padding[3];
822} __attribute__ ((packed));
823
824struct acx_dot11_default_key {
825 struct acx_header header;
826
827 u8 id;
828 u8 pad[3];
829} __attribute__ ((packed));
830
831struct acx_tsf_info {
832 struct acx_header header;
833
834 u32 current_tsf_msb;
835 u32 current_tsf_lsb;
836 u32 last_TBTT_msb;
837 u32 last_TBTT_lsb;
838 u8 last_dtim_count;
839 u8 pad[3];
840} __attribute__ ((packed));
841
842/* 802.11 PS */
843enum acx_ps_mode {
844 STATION_ACTIVE_MODE,
845 STATION_POWER_SAVE_MODE
846};
847
848struct acx_ps_params {
849 u8 ps_mode; /* STATION_* */
850 u8 send_null_data; /* Do we have to send NULL data packet ? */
851 u8 retries; /* Number of retires for the initial NULL data packet */
852
853 /*
854 * TUs during which the target stays awake after switching
855 * to power save mode.
856 */
857 u8 hang_over_period;
858 u16 null_data_rate;
859 u8 pad[2];
860} __attribute__ ((packed));
861
862enum acx_wake_up_event {
863 WAKE_UP_EVENT_BEACON_BITMAP = 0x01, /* Wake on every Beacon*/
864 WAKE_UP_EVENT_DTIM_BITMAP = 0x02, /* Wake on every DTIM*/
865 WAKE_UP_EVENT_N_DTIM_BITMAP = 0x04, /* Wake on every Nth DTIM */
866 WAKE_UP_EVENT_N_BEACONS_BITMAP = 0x08, /* Wake on every Nth Beacon */
867 WAKE_UP_EVENT_BITS_MASK = 0x0F
868};
869
870struct acx_wake_up_condition {
871 struct acx_header header;
872
873 u8 wake_up_event; /* Only one bit can be set */
874 u8 listen_interval;
875 u8 pad[2];
876} __attribute__ ((packed));
877
878struct acx_aid {
879 struct acx_header header;
880
881 /*
882 * To be set when associated with an AP.
883 */
884 u16 aid;
885 u8 pad[2];
886} __attribute__ ((packed));
887
888enum acx_preamble_type {
889 ACX_PREAMBLE_LONG = 0,
890 ACX_PREAMBLE_SHORT = 1
891};
892
893struct acx_preamble {
894 struct acx_header header;
895 /*
896 * When set, the WiLink transmits the frames with a short preamble and
897 * when cleared, the WiLink transmits the frames with a long preamble.
898 */
899 u8 preamble;
900 u8 padding[3];
901} __attribute__ ((packed));
902
903enum acx_ctsprotect_type {
904 CTSPROTECT_DISABLE = 0,
905 CTSPROTECT_ENABLE = 1
906};
907
908struct acx_ctsprotect {
909 struct acx_header header;
910 u8 ctsprotect;
911 u8 padding[3];
912} __attribute__ ((packed));
913
914struct acx_tx_statistics {
915 u32 internal_desc_overflow;
916} __attribute__ ((packed));
917
918struct acx_rx_statistics {
919 u32 out_of_mem;
920 u32 hdr_overflow;
921 u32 hw_stuck;
922 u32 dropped;
923 u32 fcs_err;
924 u32 xfr_hint_trig;
925 u32 path_reset;
926 u32 reset_counter;
927} __attribute__ ((packed));
928
929struct acx_dma_statistics {
930 u32 rx_requested;
931 u32 rx_errors;
932 u32 tx_requested;
933 u32 tx_errors;
934} __attribute__ ((packed));
935
936struct acx_isr_statistics {
937 /* host command complete */
938 u32 cmd_cmplt;
939
940 /* fiqisr() */
941 u32 fiqs;
942
943 /* (INT_STS_ND & INT_TRIG_RX_HEADER) */
944 u32 rx_headers;
945
946 /* (INT_STS_ND & INT_TRIG_RX_CMPLT) */
947 u32 rx_completes;
948
949 /* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */
950 u32 rx_mem_overflow;
951
952 /* (INT_STS_ND & INT_TRIG_S_RX_RDY) */
953 u32 rx_rdys;
954
955 /* irqisr() */
956 u32 irqs;
957
958 /* (INT_STS_ND & INT_TRIG_TX_PROC) */
959 u32 tx_procs;
960
961 /* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */
962 u32 decrypt_done;
963
964 /* (INT_STS_ND & INT_TRIG_DMA0) */
965 u32 dma0_done;
966
967 /* (INT_STS_ND & INT_TRIG_DMA1) */
968 u32 dma1_done;
969
970 /* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */
971 u32 tx_exch_complete;
972
973 /* (INT_STS_ND & INT_TRIG_COMMAND) */
974 u32 commands;
975
976 /* (INT_STS_ND & INT_TRIG_RX_PROC) */
977 u32 rx_procs;
978
979 /* (INT_STS_ND & INT_TRIG_PM_802) */
980 u32 hw_pm_mode_changes;
981
982 /* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */
983 u32 host_acknowledges;
984
985 /* (INT_STS_ND & INT_TRIG_PM_PCI) */
986 u32 pci_pm;
987
988 /* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */
989 u32 wakeups;
990
991 /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */
992 u32 low_rssi;
993} __attribute__ ((packed));
994
995struct acx_wep_statistics {
996 /* WEP address keys configured */
997 u32 addr_key_count;
998
999 /* default keys configured */
1000 u32 default_key_count;
1001
1002 u32 reserved;
1003
1004 /* number of times that WEP key not found on lookup */
1005 u32 key_not_found;
1006
1007 /* number of times that WEP key decryption failed */
1008 u32 decrypt_fail;
1009
1010 /* WEP packets decrypted */
1011 u32 packets;
1012
1013 /* WEP decrypt interrupts */
1014 u32 interrupt;
1015} __attribute__ ((packed));
1016
1017#define ACX_MISSED_BEACONS_SPREAD 10
1018
1019struct acx_pwr_statistics {
1020 /* the amount of enters into power save mode (both PD & ELP) */
1021 u32 ps_enter;
1022
1023 /* the amount of enters into ELP mode */
1024 u32 elp_enter;
1025
1026 /* the amount of missing beacon interrupts to the host */
1027 u32 missing_bcns;
1028
1029 /* the amount of wake on host-access times */
1030 u32 wake_on_host;
1031
1032 /* the amount of wake on timer-expire */
1033 u32 wake_on_timer_exp;
1034
1035 /* the number of packets that were transmitted with PS bit set */
1036 u32 tx_with_ps;
1037
1038 /* the number of packets that were transmitted with PS bit clear */
1039 u32 tx_without_ps;
1040
1041 /* the number of received beacons */
1042 u32 rcvd_beacons;
1043
1044 /* the number of entering into PowerOn (power save off) */
1045 u32 power_save_off;
1046
1047 /* the number of entries into power save mode */
1048 u16 enable_ps;
1049
1050 /*
1051 * the number of exits from power save, not including failed PS
1052 * transitions
1053 */
1054 u16 disable_ps;
1055
1056 /*
1057 * the number of times the TSF counter was adjusted because
1058 * of drift
1059 */
1060 u32 fix_tsf_ps;
1061
1062 /* Gives statistics about the spread continuous missed beacons.
1063 * The 16 LSB are dedicated for the PS mode.
1064 * The 16 MSB are dedicated for the PS mode.
1065 * cont_miss_bcns_spread[0] - single missed beacon.
1066 * cont_miss_bcns_spread[1] - two continuous missed beacons.
1067 * cont_miss_bcns_spread[2] - three continuous missed beacons.
1068 * ...
1069 * cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
1070 */
1071 u32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD];
1072
1073 /* the number of beacons in awake mode */
1074 u32 rcvd_awake_beacons;
1075} __attribute__ ((packed));
1076
1077struct acx_mic_statistics {
1078 u32 rx_pkts;
1079 u32 calc_failure;
1080} __attribute__ ((packed));
1081
1082struct acx_aes_statistics {
1083 u32 encrypt_fail;
1084 u32 decrypt_fail;
1085 u32 encrypt_packets;
1086 u32 decrypt_packets;
1087 u32 encrypt_interrupt;
1088 u32 decrypt_interrupt;
1089} __attribute__ ((packed));
1090
1091struct acx_event_statistics {
1092 u32 heart_beat;
1093 u32 calibration;
1094 u32 rx_mismatch;
1095 u32 rx_mem_empty;
1096 u32 rx_pool;
1097 u32 oom_late;
1098 u32 phy_transmit_error;
1099 u32 tx_stuck;
1100} __attribute__ ((packed));
1101
1102struct acx_ps_statistics {
1103 u32 pspoll_timeouts;
1104 u32 upsd_timeouts;
1105 u32 upsd_max_sptime;
1106 u32 upsd_max_apturn;
1107 u32 pspoll_max_apturn;
1108 u32 pspoll_utilization;
1109 u32 upsd_utilization;
1110} __attribute__ ((packed));
1111
1112struct acx_rxpipe_statistics {
1113 u32 rx_prep_beacon_drop;
1114 u32 descr_host_int_trig_rx_data;
1115 u32 beacon_buffer_thres_host_int_trig_rx_data;
1116 u32 missed_beacon_host_int_trig_rx_data;
1117 u32 tx_xfr_host_int_trig_rx_data;
1118} __attribute__ ((packed));
1119
1120struct acx_statistics {
1121 struct acx_header header;
1122
1123 struct acx_tx_statistics tx;
1124 struct acx_rx_statistics rx;
1125 struct acx_dma_statistics dma;
1126 struct acx_isr_statistics isr;
1127 struct acx_wep_statistics wep;
1128 struct acx_pwr_statistics pwr;
1129 struct acx_aes_statistics aes;
1130 struct acx_mic_statistics mic;
1131 struct acx_event_statistics event;
1132 struct acx_ps_statistics ps;
1133 struct acx_rxpipe_statistics rxpipe;
1134} __attribute__ ((packed));
1135
1136enum {
1137 ACX_WAKE_UP_CONDITIONS = 0x0002,
1138 ACX_MEM_CFG = 0x0003,
1139 ACX_SLOT = 0x0004,
1140 ACX_QUEUE_HEAD = 0x0005, /* for MASTER mode only */
1141 ACX_AC_CFG = 0x0007,
1142 ACX_MEM_MAP = 0x0008,
1143 ACX_AID = 0x000A,
1144 ACX_RADIO_PARAM = 0x000B, /* Not used */
1145 ACX_CFG = 0x000C, /* Not used */
1146 ACX_FW_REV = 0x000D,
1147 ACX_MEDIUM_USAGE = 0x000F,
1148 ACX_RX_CFG = 0x0010,
1149 ACX_TX_QUEUE_CFG = 0x0011, /* FIXME: only used by wl1251 */
1150 ACX_BSS_IN_PS = 0x0012, /* for AP only */
1151 ACX_STATISTICS = 0x0013, /* Debug API */
1152 ACX_FEATURE_CFG = 0x0015,
1153 ACX_MISC_CFG = 0x0017, /* Not used */
1154 ACX_TID_CFG = 0x001A,
1155 ACX_BEACON_FILTER_OPT = 0x001F,
1156 ACX_LOW_RSSI = 0x0020,
1157 ACX_NOISE_HIST = 0x0021,
1158 ACX_HDK_VERSION = 0x0022, /* ??? */
1159 ACX_PD_THRESHOLD = 0x0023,
1160 ACX_DATA_PATH_PARAMS = 0x0024, /* WO */
1161 ACX_DATA_PATH_RESP_PARAMS = 0x0024, /* RO */
1162 ACX_CCA_THRESHOLD = 0x0025,
1163 ACX_EVENT_MBOX_MASK = 0x0026,
1164#ifdef FW_RUNNING_AS_AP
1165 ACX_DTIM_PERIOD = 0x0027, /* for AP only */
1166#else
1167 ACX_WR_TBTT_AND_DTIM = 0x0027, /* STA only */
1168#endif
1169 ACX_ACI_OPTION_CFG = 0x0029, /* OBSOLETE (for 1251)*/
1170 ACX_GPIO_CFG = 0x002A, /* Not used */
1171 ACX_GPIO_SET = 0x002B, /* Not used */
1172 ACX_PM_CFG = 0x002C, /* To Be Documented */
1173 ACX_CONN_MONIT_PARAMS = 0x002D,
1174 ACX_AVERAGE_RSSI = 0x002E, /* Not used */
1175 ACX_CONS_TX_FAILURE = 0x002F,
1176 ACX_BCN_DTIM_OPTIONS = 0x0031,
1177 ACX_SG_ENABLE = 0x0032,
1178 ACX_SG_CFG = 0x0033,
1179 ACX_ANTENNA_DIVERSITY_CFG = 0x0035, /* To Be Documented */
1180 ACX_LOW_SNR = 0x0037, /* To Be Documented */
1181 ACX_BEACON_FILTER_TABLE = 0x0038,
1182 ACX_ARP_IP_FILTER = 0x0039,
1183 ACX_ROAMING_STATISTICS_TBL = 0x003B,
1184 ACX_RATE_POLICY = 0x003D,
1185 ACX_CTS_PROTECTION = 0x003E,
1186 ACX_SLEEP_AUTH = 0x003F,
1187 ACX_PREAMBLE_TYPE = 0x0040,
1188 ACX_ERROR_CNT = 0x0041,
1189 ACX_FW_GEN_FRAME_RATES = 0x0042,
1190 ACX_IBSS_FILTER = 0x0044,
1191 ACX_SERVICE_PERIOD_TIMEOUT = 0x0045,
1192 ACX_TSF_INFO = 0x0046,
1193 ACX_CONFIG_PS_WMM = 0x0049,
1194 ACX_ENABLE_RX_DATA_FILTER = 0x004A,
1195 ACX_SET_RX_DATA_FILTER = 0x004B,
1196 ACX_GET_DATA_FILTER_STATISTICS = 0x004C,
1197 ACX_POWER_LEVEL_TABLE = 0x004D,
1198 ACX_BET_ENABLE = 0x0050,
1199 DOT11_STATION_ID = 0x1001,
1200 DOT11_RX_MSDU_LIFE_TIME = 0x1004,
1201 DOT11_CUR_TX_PWR = 0x100D,
1202 DOT11_DEFAULT_KEY = 0x1010,
1203 DOT11_RX_DOT11_MODE = 0x1012,
1204 DOT11_RTS_THRESHOLD = 0x1013,
1205 DOT11_GROUP_ADDRESS_TBL = 0x1014,
1206
1207 MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL,
1208
1209 MAX_IE = 0xFFFF
1210};
1211
1212
1213int wl12xx_acx_frame_rates(struct wl12xx *wl, u8 ctrl_rate, u8 ctrl_mod,
1214 u8 mgt_rate, u8 mgt_mod);
1215int wl12xx_acx_station_id(struct wl12xx *wl);
1216int wl12xx_acx_default_key(struct wl12xx *wl, u8 key_id);
1217int wl12xx_acx_wake_up_conditions(struct wl12xx *wl, u8 listen_interval);
1218int wl12xx_acx_sleep_auth(struct wl12xx *wl, u8 sleep_auth);
1219int wl12xx_acx_fw_version(struct wl12xx *wl, char *buf, size_t len);
1220int wl12xx_acx_tx_power(struct wl12xx *wl, int power);
1221int wl12xx_acx_feature_cfg(struct wl12xx *wl);
1222int wl12xx_acx_mem_map(struct wl12xx *wl, void *mem_map, size_t len);
1223int wl12xx_acx_data_path_params(struct wl12xx *wl,
1224 struct acx_data_path_params_resp *data_path);
1225int wl12xx_acx_rx_msdu_life_time(struct wl12xx *wl, u32 life_time);
1226int wl12xx_acx_rx_config(struct wl12xx *wl, u32 config, u32 filter);
1227int wl12xx_acx_pd_threshold(struct wl12xx *wl);
1228int wl12xx_acx_slot(struct wl12xx *wl, enum acx_slot_type slot_time);
1229int wl12xx_acx_group_address_tbl(struct wl12xx *wl);
1230int wl12xx_acx_service_period_timeout(struct wl12xx *wl);
1231int wl12xx_acx_rts_threshold(struct wl12xx *wl, u16 rts_threshold);
1232int wl12xx_acx_beacon_filter_opt(struct wl12xx *wl);
1233int wl12xx_acx_beacon_filter_table(struct wl12xx *wl);
1234int wl12xx_acx_sg_enable(struct wl12xx *wl);
1235int wl12xx_acx_sg_cfg(struct wl12xx *wl);
1236int wl12xx_acx_cca_threshold(struct wl12xx *wl);
1237int wl12xx_acx_bcn_dtim_options(struct wl12xx *wl);
1238int wl12xx_acx_aid(struct wl12xx *wl, u16 aid);
1239int wl12xx_acx_event_mbox_mask(struct wl12xx *wl, u32 event_mask);
1240int wl12xx_acx_set_preamble(struct wl12xx *wl, enum acx_preamble_type preamble);
1241int wl12xx_acx_cts_protect(struct wl12xx *wl,
1242 enum acx_ctsprotect_type ctsprotect);
1243int wl12xx_acx_statistics(struct wl12xx *wl, struct acx_statistics *stats);
1244
1245#endif /* __WL12XX_ACX_H__ */
diff --git a/drivers/net/wireless/wl12xx/boot.c b/drivers/net/wireless/wl12xx/boot.c
new file mode 100644
index 000000000000..48ac08c429bd
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/boot.c
@@ -0,0 +1,295 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include <linux/gpio.h>
25
26#include "reg.h"
27#include "boot.h"
28#include "spi.h"
29#include "event.h"
30
31static void wl12xx_boot_enable_interrupts(struct wl12xx *wl)
32{
33 enable_irq(wl->irq);
34}
35
36void wl12xx_boot_target_enable_interrupts(struct wl12xx *wl)
37{
38 wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_MASK, ~(wl->intr_mask));
39 wl12xx_reg_write32(wl, HI_CFG, HI_CFG_DEF_VAL);
40}
41
42int wl12xx_boot_soft_reset(struct wl12xx *wl)
43{
44 unsigned long timeout;
45 u32 boot_data;
46
47 /* perform soft reset */
48 wl12xx_reg_write32(wl, ACX_REG_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT);
49
50 /* SOFT_RESET is self clearing */
51 timeout = jiffies + usecs_to_jiffies(SOFT_RESET_MAX_TIME);
52 while (1) {
53 boot_data = wl12xx_reg_read32(wl, ACX_REG_SLV_SOFT_RESET);
54 wl12xx_debug(DEBUG_BOOT, "soft reset bootdata 0x%x", boot_data);
55 if ((boot_data & ACX_SLV_SOFT_RESET_BIT) == 0)
56 break;
57
58 if (time_after(jiffies, timeout)) {
59 /* 1.2 check pWhalBus->uSelfClearTime if the
60 * timeout was reached */
61 wl12xx_error("soft reset timeout");
62 return -1;
63 }
64
65 udelay(SOFT_RESET_STALL_TIME);
66 }
67
68 /* disable Rx/Tx */
69 wl12xx_reg_write32(wl, ENABLE, 0x0);
70
71 /* disable auto calibration on start*/
72 wl12xx_reg_write32(wl, SPARE_A2, 0xffff);
73
74 return 0;
75}
76
77int wl12xx_boot_init_seq(struct wl12xx *wl)
78{
79 u32 scr_pad6, init_data, tmp, elp_cmd, ref_freq;
80
81 /*
82 * col #1: INTEGER_DIVIDER
83 * col #2: FRACTIONAL_DIVIDER
84 * col #3: ATTN_BB
85 * col #4: ALPHA_BB
86 * col #5: STOP_TIME_BB
87 * col #6: BB_PLL_LOOP_FILTER
88 */
89 static const u32 LUT[REF_FREQ_NUM][LUT_PARAM_NUM] = {
90
91 { 83, 87381, 0xB, 5, 0xF00, 3}, /* REF_FREQ_19_2*/
92 { 61, 141154, 0xB, 5, 0x1450, 2}, /* REF_FREQ_26_0*/
93 { 41, 174763, 0xC, 6, 0x2D00, 1}, /* REF_FREQ_38_4*/
94 { 40, 0, 0xC, 6, 0x2EE0, 1}, /* REF_FREQ_40_0*/
95 { 47, 162280, 0xC, 6, 0x2760, 1} /* REF_FREQ_33_6 */
96 };
97
98 /* read NVS params */
99 scr_pad6 = wl12xx_reg_read32(wl, SCR_PAD6);
100 wl12xx_debug(DEBUG_BOOT, "scr_pad6 0x%x", scr_pad6);
101
102 /* read ELP_CMD */
103 elp_cmd = wl12xx_reg_read32(wl, ELP_CMD);
104 wl12xx_debug(DEBUG_BOOT, "elp_cmd 0x%x", elp_cmd);
105
106 /* set the BB calibration time to be 300 usec (PLL_CAL_TIME) */
107 ref_freq = scr_pad6 & 0x000000FF;
108 wl12xx_debug(DEBUG_BOOT, "ref_freq 0x%x", ref_freq);
109
110 wl12xx_reg_write32(wl, PLL_CAL_TIME, 0x9);
111
112 /*
113 * PG 1.2: set the clock buffer time to be 210 usec (CLK_BUF_TIME)
114 */
115 wl12xx_reg_write32(wl, CLK_BUF_TIME, 0x6);
116
117 /*
118 * set the clock detect feature to work in the restart wu procedure
119 * (ELP_CFG_MODE[14]) and Select the clock source type
120 * (ELP_CFG_MODE[13:12])
121 */
122 tmp = ((scr_pad6 & 0x0000FF00) << 4) | 0x00004000;
123 wl12xx_reg_write32(wl, ELP_CFG_MODE, tmp);
124
125 /* PG 1.2: enable the BB PLL fix. Enable the PLL_LIMP_CLK_EN_CMD */
126 elp_cmd |= 0x00000040;
127 wl12xx_reg_write32(wl, ELP_CMD, elp_cmd);
128
129 /* PG 1.2: Set the BB PLL stable time to be 1000usec
130 * (PLL_STABLE_TIME) */
131 wl12xx_reg_write32(wl, CFG_PLL_SYNC_CNT, 0x20);
132
133 /* PG 1.2: read clock request time */
134 init_data = wl12xx_reg_read32(wl, CLK_REQ_TIME);
135
136 /*
137 * PG 1.2: set the clock request time to be ref_clk_settling_time -
138 * 1ms = 4ms
139 */
140 if (init_data > 0x21)
141 tmp = init_data - 0x21;
142 else
143 tmp = 0;
144 wl12xx_reg_write32(wl, CLK_REQ_TIME, tmp);
145
146 /* set BB PLL configurations in RF AFE */
147 wl12xx_reg_write32(wl, 0x003058cc, 0x4B5);
148
149 /* set RF_AFE_REG_5 */
150 wl12xx_reg_write32(wl, 0x003058d4, 0x50);
151
152 /* set RF_AFE_CTRL_REG_2 */
153 wl12xx_reg_write32(wl, 0x00305948, 0x11c001);
154
155 /*
156 * change RF PLL and BB PLL divider for VCO clock and adjust VCO
157 * bais current(RF_AFE_REG_13)
158 */
159 wl12xx_reg_write32(wl, 0x003058f4, 0x1e);
160
161 /* set BB PLL configurations */
162 tmp = LUT[ref_freq][LUT_PARAM_INTEGER_DIVIDER] | 0x00017000;
163 wl12xx_reg_write32(wl, 0x00305840, tmp);
164
165 /* set fractional divider according to Appendix C-BB PLL
166 * Calculations
167 */
168 tmp = LUT[ref_freq][LUT_PARAM_FRACTIONAL_DIVIDER];
169 wl12xx_reg_write32(wl, 0x00305844, tmp);
170
171 /* set the initial data for the sigma delta */
172 wl12xx_reg_write32(wl, 0x00305848, 0x3039);
173
174 /*
175 * set the accumulator attenuation value, calibration loop1
176 * (alpha), calibration loop2 (beta), calibration loop3 (gamma) and
177 * the VCO gain
178 */
179 tmp = (LUT[ref_freq][LUT_PARAM_ATTN_BB] << 16) |
180 (LUT[ref_freq][LUT_PARAM_ALPHA_BB] << 12) | 0x1;
181 wl12xx_reg_write32(wl, 0x00305854, tmp);
182
183 /*
184 * set the calibration stop time after holdoff time expires and set
185 * settling time HOLD_OFF_TIME_BB
186 */
187 tmp = LUT[ref_freq][LUT_PARAM_STOP_TIME_BB] | 0x000A0000;
188 wl12xx_reg_write32(wl, 0x00305858, tmp);
189
190 /*
191 * set BB PLL Loop filter capacitor3- BB_C3[2:0] and set BB PLL
192 * constant leakage current to linearize PFD to 0uA -
193 * BB_ILOOPF[7:3]
194 */
195 tmp = LUT[ref_freq][LUT_PARAM_BB_PLL_LOOP_FILTER] | 0x00000030;
196 wl12xx_reg_write32(wl, 0x003058f8, tmp);
197
198 /*
199 * set regulator output voltage for n divider to
200 * 1.35-BB_REFDIV[1:0], set charge pump current- BB_CPGAIN[4:2],
201 * set BB PLL Loop filter capacitor2- BB_C2[7:5], set gain of BB
202 * PLL auto-call to normal mode- BB_CALGAIN_3DB[8]
203 */
204 wl12xx_reg_write32(wl, 0x003058f0, 0x29);
205
206 /* enable restart wakeup sequence (ELP_CMD[0]) */
207 wl12xx_reg_write32(wl, ELP_CMD, elp_cmd | 0x1);
208
209 /* restart sequence completed */
210 udelay(2000);
211
212 return 0;
213}
214
215int wl12xx_boot_run_firmware(struct wl12xx *wl)
216{
217 int loop, ret;
218 u32 chip_id, interrupt;
219
220 wl->chip.op_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
221
222 chip_id = wl12xx_reg_read32(wl, CHIP_ID_B);
223
224 wl12xx_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
225
226 if (chip_id != wl->chip.id) {
227 wl12xx_error("chip id doesn't match after firmware boot");
228 return -EIO;
229 }
230
231 /* wait for init to complete */
232 loop = 0;
233 while (loop++ < INIT_LOOP) {
234 udelay(INIT_LOOP_DELAY);
235 interrupt = wl12xx_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
236
237 if (interrupt == 0xffffffff) {
238 wl12xx_error("error reading hardware complete "
239 "init indication");
240 return -EIO;
241 }
242 /* check that ACX_INTR_INIT_COMPLETE is enabled */
243 else if (interrupt & wl->chip.intr_init_complete) {
244 wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_ACK,
245 wl->chip.intr_init_complete);
246 break;
247 }
248 }
249
250 if (loop >= INIT_LOOP) {
251 wl12xx_error("timeout waiting for the hardware to "
252 "complete initialization");
253 return -EIO;
254 }
255
256 /* get hardware config command mail box */
257 wl->cmd_box_addr = wl12xx_reg_read32(wl, REG_COMMAND_MAILBOX_PTR);
258
259 /* get hardware config event mail box */
260 wl->event_box_addr = wl12xx_reg_read32(wl, REG_EVENT_MAILBOX_PTR);
261
262 /* set the working partition to its "running" mode offset */
263 wl12xx_set_partition(wl,
264 wl->chip.p_table[PART_WORK].mem.start,
265 wl->chip.p_table[PART_WORK].mem.size,
266 wl->chip.p_table[PART_WORK].reg.start,
267 wl->chip.p_table[PART_WORK].reg.size);
268
269 wl12xx_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x event_box_addr 0x%x",
270 wl->cmd_box_addr, wl->event_box_addr);
271
272 /*
273 * in case of full asynchronous mode the firmware event must be
274 * ready to receive event from the command mailbox
275 */
276
277 /* enable gpio interrupts */
278 wl12xx_boot_enable_interrupts(wl);
279
280 wl->chip.op_target_enable_interrupts(wl);
281
282 /* unmask all mbox events */
283 wl->event_mask = 0xffffffff;
284
285 ret = wl12xx_event_unmask(wl);
286 if (ret < 0) {
287 wl12xx_error("EVENT mask setting failed");
288 return ret;
289 }
290
291 wl12xx_event_mbox_config(wl);
292
293 /* firmware startup completed */
294 return 0;
295}
diff --git a/drivers/net/wireless/wl12xx/boot.h b/drivers/net/wireless/wl12xx/boot.h
new file mode 100644
index 000000000000..4fa73132baae
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/boot.h
@@ -0,0 +1,40 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#ifndef __BOOT_H__
25#define __BOOT_H__
26
27#include "wl12xx.h"
28
29int wl12xx_boot_soft_reset(struct wl12xx *wl);
30int wl12xx_boot_init_seq(struct wl12xx *wl);
31int wl12xx_boot_run_firmware(struct wl12xx *wl);
32void wl12xx_boot_target_enable_interrupts(struct wl12xx *wl);
33
34/* number of times we try to read the INIT interrupt */
35#define INIT_LOOP 20000
36
37/* delay between retries */
38#define INIT_LOOP_DELAY 50
39
40#endif
diff --git a/drivers/net/wireless/wl12xx/cmd.c b/drivers/net/wireless/wl12xx/cmd.c
new file mode 100644
index 000000000000..f73ab602b7ae
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/cmd.c
@@ -0,0 +1,353 @@
1#include "cmd.h"
2
3#include <linux/module.h>
4#include <linux/crc7.h>
5#include <linux/spi/spi.h>
6
7#include "wl12xx.h"
8#include "wl12xx_80211.h"
9#include "reg.h"
10#include "spi.h"
11#include "ps.h"
12
13int wl12xx_cmd_send(struct wl12xx *wl, u16 type, void *buf, size_t buf_len)
14{
15 struct wl12xx_command cmd;
16 unsigned long timeout;
17 size_t cmd_len;
18 u32 intr;
19 int ret = 0;
20
21 memset(&cmd, 0, sizeof(cmd));
22 cmd.id = type;
23 cmd.status = 0;
24 memcpy(cmd.parameters, buf, buf_len);
25 cmd_len = ALIGN(buf_len, 4) + CMDMBOX_HEADER_LEN;
26
27 wl12xx_ps_elp_wakeup(wl);
28
29 wl12xx_spi_mem_write(wl, wl->cmd_box_addr, &cmd, cmd_len);
30
31 wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_CMD);
32
33 timeout = jiffies + msecs_to_jiffies(WL12XX_COMMAND_TIMEOUT);
34
35 intr = wl12xx_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
36 while (!(intr & wl->chip.intr_cmd_complete)) {
37 if (time_after(jiffies, timeout)) {
38 wl12xx_error("command complete timeout");
39 ret = -ETIMEDOUT;
40 goto out;
41 }
42
43 msleep(1);
44
45 intr = wl12xx_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
46 }
47
48 wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_ACK,
49 wl->chip.intr_cmd_complete);
50
51out:
52 wl12xx_ps_elp_sleep(wl);
53
54 return ret;
55}
56
57int wl12xx_cmd_test(struct wl12xx *wl, void *buf, size_t buf_len, u8 answer)
58{
59 int ret;
60
61 wl12xx_debug(DEBUG_CMD, "cmd test");
62
63 ret = wl12xx_cmd_send(wl, CMD_TEST, buf, buf_len);
64 if (ret < 0) {
65 wl12xx_warning("TEST command failed");
66 return ret;
67 }
68
69 if (answer) {
70 struct wl12xx_command *cmd_answer;
71
72 /*
73 * The test command got in, we can read the answer.
74 * The answer would be a wl12xx_command, where the
75 * parameter array contains the actual answer.
76 */
77
78 wl12xx_ps_elp_wakeup(wl);
79
80 wl12xx_spi_mem_read(wl, wl->cmd_box_addr, buf, buf_len);
81
82 wl12xx_ps_elp_sleep(wl);
83
84 cmd_answer = buf;
85 if (cmd_answer->status != CMD_STATUS_SUCCESS)
86 wl12xx_error("TEST command answer error: %d",
87 cmd_answer->status);
88 }
89
90 return 0;
91}
92
93
94int wl12xx_cmd_interrogate(struct wl12xx *wl, u16 ie_id, u16 ie_len,
95 void *answer)
96{
97 struct wl12xx_command *cmd;
98 struct acx_header header;
99 int ret;
100
101 wl12xx_debug(DEBUG_CMD, "cmd interrogate");
102
103 header.id = ie_id;
104 header.len = ie_len - sizeof(header);
105
106 ret = wl12xx_cmd_send(wl, CMD_INTERROGATE, &header, sizeof(header));
107 if (ret < 0) {
108 wl12xx_error("INTERROGATE command failed");
109 return ret;
110 }
111
112 wl12xx_ps_elp_wakeup(wl);
113
114 /* the interrogate command got in, we can read the answer */
115 wl12xx_spi_mem_read(wl, wl->cmd_box_addr, answer,
116 CMDMBOX_HEADER_LEN + ie_len);
117
118 wl12xx_ps_elp_sleep(wl);
119
120 cmd = answer;
121 if (cmd->status != CMD_STATUS_SUCCESS)
122 wl12xx_error("INTERROGATE command error: %d",
123 cmd->status);
124
125 return 0;
126
127}
128
129int wl12xx_cmd_configure(struct wl12xx *wl, void *ie, int ie_len)
130{
131 int ret;
132
133 wl12xx_debug(DEBUG_CMD, "cmd configure");
134
135 ret = wl12xx_cmd_send(wl, CMD_CONFIGURE, ie,
136 ie_len);
137 if (ret < 0) {
138 wl12xx_warning("CONFIGURE command NOK");
139 return ret;
140 }
141
142 return 0;
143
144}
145
146int wl12xx_cmd_vbm(struct wl12xx *wl, u8 identity,
147 void *bitmap, u16 bitmap_len, u8 bitmap_control)
148{
149 struct vbm_update_request vbm;
150 int ret;
151
152 wl12xx_debug(DEBUG_CMD, "cmd vbm");
153
154 /* Count and period will be filled by the target */
155 vbm.tim.bitmap_ctrl = bitmap_control;
156 if (bitmap_len > PARTIAL_VBM_MAX) {
157 wl12xx_warning("cmd vbm len is %d B, truncating to %d",
158 bitmap_len, PARTIAL_VBM_MAX);
159 bitmap_len = PARTIAL_VBM_MAX;
160 }
161 memcpy(vbm.tim.pvb_field, bitmap, bitmap_len);
162 vbm.tim.identity = identity;
163 vbm.tim.length = bitmap_len + 3;
164
165 vbm.len = cpu_to_le16(bitmap_len + 5);
166
167 ret = wl12xx_cmd_send(wl, CMD_VBM, &vbm, sizeof(vbm));
168 if (ret < 0) {
169 wl12xx_error("VBM command failed");
170 return ret;
171 }
172
173 return 0;
174}
175
176int wl12xx_cmd_data_path(struct wl12xx *wl, u8 channel, u8 enable)
177{
178 int ret;
179 u16 cmd_rx, cmd_tx;
180
181 wl12xx_debug(DEBUG_CMD, "cmd data path");
182
183 if (enable) {
184 cmd_rx = CMD_ENABLE_RX;
185 cmd_tx = CMD_ENABLE_TX;
186 } else {
187 cmd_rx = CMD_DISABLE_RX;
188 cmd_tx = CMD_DISABLE_TX;
189 }
190
191 ret = wl12xx_cmd_send(wl, cmd_rx, &channel, sizeof(channel));
192 if (ret < 0) {
193 wl12xx_error("rx %s cmd for channel %d failed",
194 enable ? "start" : "stop", channel);
195 return ret;
196 }
197
198 wl12xx_debug(DEBUG_BOOT, "rx %s cmd channel %d",
199 enable ? "start" : "stop", channel);
200
201 ret = wl12xx_cmd_send(wl, cmd_tx, &channel, sizeof(channel));
202 if (ret < 0) {
203 wl12xx_error("tx %s cmd for channel %d failed",
204 enable ? "start" : "stop", channel);
205 return ret;
206 }
207
208 wl12xx_debug(DEBUG_BOOT, "tx %s cmd channel %d",
209 enable ? "start" : "stop", channel);
210
211 return 0;
212}
213
214int wl12xx_cmd_join(struct wl12xx *wl, u8 bss_type, u8 dtim_interval,
215 u16 beacon_interval, u8 wait)
216{
217 unsigned long timeout;
218 struct cmd_join join = {};
219 int ret, i;
220 u8 *bssid;
221
222 /* FIXME: this should be in main.c */
223 ret = wl12xx_acx_frame_rates(wl, DEFAULT_HW_GEN_TX_RATE,
224 DEFAULT_HW_GEN_MODULATION_TYPE,
225 wl->tx_mgmt_frm_rate,
226 wl->tx_mgmt_frm_mod);
227 if (ret < 0)
228 return ret;
229
230 wl12xx_debug(DEBUG_CMD, "cmd join");
231
232 /* Reverse order BSSID */
233 bssid = (u8 *)&join.bssid_lsb;
234 for (i = 0; i < ETH_ALEN; i++)
235 bssid[i] = wl->bssid[ETH_ALEN - i - 1];
236
237 join.rx_config_options = wl->rx_config;
238 join.rx_filter_options = wl->rx_filter;
239
240 join.basic_rate_set = RATE_MASK_1MBPS | RATE_MASK_2MBPS |
241 RATE_MASK_5_5MBPS | RATE_MASK_11MBPS;
242
243 join.beacon_interval = beacon_interval;
244 join.dtim_interval = dtim_interval;
245 join.bss_type = bss_type;
246 join.channel = wl->channel;
247 join.ctrl = JOIN_CMD_CTRL_TX_FLUSH;
248
249 ret = wl12xx_cmd_send(wl, CMD_START_JOIN, &join, sizeof(join));
250 if (ret < 0) {
251 wl12xx_error("failed to initiate cmd join");
252 return ret;
253 }
254
255 timeout = msecs_to_jiffies(JOIN_TIMEOUT);
256
257 /*
258 * ugly hack: we should wait for JOIN_EVENT_COMPLETE_ID but to
259 * simplify locking we just sleep instead, for now
260 */
261 if (wait)
262 msleep(10);
263
264 return 0;
265}
266
267int wl12xx_cmd_ps_mode(struct wl12xx *wl, u8 ps_mode)
268{
269 int ret;
270 struct acx_ps_params ps_params;
271
272 /* FIXME: this should be in ps.c */
273 ret = wl12xx_acx_wake_up_conditions(wl, wl->listen_int);
274 if (ret < 0) {
275 wl12xx_error("Couldnt set wake up conditions");
276 return ret;
277 }
278
279 wl12xx_debug(DEBUG_CMD, "cmd set ps mode");
280
281 ps_params.ps_mode = ps_mode;
282 ps_params.send_null_data = 1;
283 ps_params.retries = 5;
284 ps_params.hang_over_period = 128;
285 ps_params.null_data_rate = 1; /* 1 Mbps */
286
287 ret = wl12xx_cmd_send(wl, CMD_SET_PS_MODE, &ps_params,
288 sizeof(ps_params));
289 if (ret < 0) {
290 wl12xx_error("cmd set_ps_mode failed");
291 return ret;
292 }
293
294 return 0;
295}
296
297int wl12xx_cmd_read_memory(struct wl12xx *wl, u32 addr, u32 len, void *answer)
298{
299 struct cmd_read_write_memory mem_cmd, *mem_answer;
300 struct wl12xx_command cmd;
301 int ret;
302
303 wl12xx_debug(DEBUG_CMD, "cmd read memory");
304
305 memset(&mem_cmd, 0, sizeof(mem_cmd));
306 mem_cmd.addr = addr;
307 mem_cmd.size = len;
308
309 ret = wl12xx_cmd_send(wl, CMD_READ_MEMORY, &mem_cmd, sizeof(mem_cmd));
310 if (ret < 0) {
311 wl12xx_error("read memory command failed: %d", ret);
312 return ret;
313 }
314
315 /* the read command got in, we can now read the answer */
316 wl12xx_spi_mem_read(wl, wl->cmd_box_addr, &cmd,
317 CMDMBOX_HEADER_LEN + sizeof(mem_cmd));
318
319 if (cmd.status != CMD_STATUS_SUCCESS)
320 wl12xx_error("error in read command result: %d", cmd.status);
321
322 mem_answer = (struct cmd_read_write_memory *) cmd.parameters;
323 memcpy(answer, mem_answer->value, len);
324
325 return 0;
326}
327
328int wl12xx_cmd_template_set(struct wl12xx *wl, u16 cmd_id,
329 void *buf, size_t buf_len)
330{
331 struct wl12xx_cmd_packet_template template;
332 int ret;
333
334 wl12xx_debug(DEBUG_CMD, "cmd template %d", cmd_id);
335
336 memset(&template, 0, sizeof(template));
337
338 WARN_ON(buf_len > WL12XX_MAX_TEMPLATE_SIZE);
339 buf_len = min_t(size_t, buf_len, WL12XX_MAX_TEMPLATE_SIZE);
340 template.size = cpu_to_le16(buf_len);
341
342 if (buf)
343 memcpy(template.template, buf, buf_len);
344
345 ret = wl12xx_cmd_send(wl, cmd_id, &template,
346 sizeof(template.size) + buf_len);
347 if (ret < 0) {
348 wl12xx_warning("cmd set_template failed: %d", ret);
349 return ret;
350 }
351
352 return 0;
353}
diff --git a/drivers/net/wireless/wl12xx/cmd.h b/drivers/net/wireless/wl12xx/cmd.h
new file mode 100644
index 000000000000..aa307dcd081f
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/cmd.h
@@ -0,0 +1,265 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL12XX_CMD_H__
26#define __WL12XX_CMD_H__
27
28#include "wl12xx.h"
29
30int wl12xx_cmd_send(struct wl12xx *wl, u16 type, void *buf, size_t buf_len);
31int wl12xx_cmd_test(struct wl12xx *wl, void *buf, size_t buf_len, u8 answer);
32int wl12xx_cmd_interrogate(struct wl12xx *wl, u16 ie_id, u16 ie_len,
33 void *answer);
34int wl12xx_cmd_configure(struct wl12xx *wl, void *ie, int ie_len);
35int wl12xx_cmd_vbm(struct wl12xx *wl, u8 identity,
36 void *bitmap, u16 bitmap_len, u8 bitmap_control);
37int wl12xx_cmd_data_path(struct wl12xx *wl, u8 channel, u8 enable);
38int wl12xx_cmd_join(struct wl12xx *wl, u8 bss_type, u8 dtim_interval,
39 u16 beacon_interval, u8 wait);
40int wl12xx_cmd_ps_mode(struct wl12xx *wl, u8 ps_mode);
41int wl12xx_cmd_read_memory(struct wl12xx *wl, u32 addr, u32 len, void *answer);
42int wl12xx_cmd_template_set(struct wl12xx *wl, u16 cmd_id,
43 void *buf, size_t buf_len);
44
45/* unit ms */
46#define WL12XX_COMMAND_TIMEOUT 2000
47
48#define WL12XX_MAX_TEMPLATE_SIZE 300
49
50struct wl12xx_cmd_packet_template {
51 __le16 size;
52 u8 template[WL12XX_MAX_TEMPLATE_SIZE];
53} __attribute__ ((packed));
54
55enum wl12xx_commands {
56 CMD_RESET = 0,
57 CMD_INTERROGATE = 1, /*use this to read information elements*/
58 CMD_CONFIGURE = 2, /*use this to write information elements*/
59 CMD_ENABLE_RX = 3,
60 CMD_ENABLE_TX = 4,
61 CMD_DISABLE_RX = 5,
62 CMD_DISABLE_TX = 6,
63 CMD_SCAN = 8,
64 CMD_STOP_SCAN = 9,
65 CMD_VBM = 10,
66 CMD_START_JOIN = 11,
67 CMD_SET_KEYS = 12,
68 CMD_READ_MEMORY = 13,
69 CMD_WRITE_MEMORY = 14,
70 CMD_BEACON = 19,
71 CMD_PROBE_RESP = 20,
72 CMD_NULL_DATA = 21,
73 CMD_PROBE_REQ = 22,
74 CMD_TEST = 23,
75 CMD_RADIO_CALIBRATE = 25, /* OBSOLETE */
76 CMD_ENABLE_RX_PATH = 27, /* OBSOLETE */
77 CMD_NOISE_HIST = 28,
78 CMD_RX_RESET = 29,
79 CMD_PS_POLL = 30,
80 CMD_QOS_NULL_DATA = 31,
81 CMD_LNA_CONTROL = 32,
82 CMD_SET_BCN_MODE = 33,
83 CMD_MEASUREMENT = 34,
84 CMD_STOP_MEASUREMENT = 35,
85 CMD_DISCONNECT = 36,
86 CMD_SET_PS_MODE = 37,
87 CMD_CHANNEL_SWITCH = 38,
88 CMD_STOP_CHANNEL_SWICTH = 39,
89 CMD_AP_DISCOVERY = 40,
90 CMD_STOP_AP_DISCOVERY = 41,
91 CMD_SPS_SCAN = 42,
92 CMD_STOP_SPS_SCAN = 43,
93 CMD_HEALTH_CHECK = 45,
94 CMD_DEBUG = 46,
95 CMD_TRIGGER_SCAN_TO = 47,
96
97 NUM_COMMANDS,
98 MAX_COMMAND_ID = 0xFFFF,
99};
100
101#define MAX_CMD_PARAMS 572
102
103struct wl12xx_command {
104 u16 id;
105 u16 status;
106 u8 parameters[MAX_CMD_PARAMS];
107};
108
109enum {
110 CMD_MAILBOX_IDLE = 0,
111 CMD_STATUS_SUCCESS = 1,
112 CMD_STATUS_UNKNOWN_CMD = 2,
113 CMD_STATUS_UNKNOWN_IE = 3,
114 CMD_STATUS_REJECT_MEAS_SG_ACTIVE = 11,
115 CMD_STATUS_RX_BUSY = 13,
116 CMD_STATUS_INVALID_PARAM = 14,
117 CMD_STATUS_TEMPLATE_TOO_LARGE = 15,
118 CMD_STATUS_OUT_OF_MEMORY = 16,
119 CMD_STATUS_STA_TABLE_FULL = 17,
120 CMD_STATUS_RADIO_ERROR = 18,
121 CMD_STATUS_WRONG_NESTING = 19,
122 CMD_STATUS_TIMEOUT = 21, /* Driver internal use.*/
123 CMD_STATUS_FW_RESET = 22, /* Driver internal use.*/
124 MAX_COMMAND_STATUS = 0xff
125};
126
127
128/*
129 * CMD_READ_MEMORY
130 *
131 * The host issues this command to read the WiLink device memory/registers.
132 *
133 * Note: The Base Band address has special handling (16 bits registers and
134 * addresses). For more information, see the hardware specification.
135 */
136/*
137 * CMD_WRITE_MEMORY
138 *
139 * The host issues this command to write the WiLink device memory/registers.
140 *
141 * The Base Band address has special handling (16 bits registers and
142 * addresses). For more information, see the hardware specification.
143 */
144#define MAX_READ_SIZE 256
145
146struct cmd_read_write_memory {
147 /* The address of the memory to read from or write to.*/
148 u32 addr;
149
150 /* The amount of data in bytes to read from or write to the WiLink
151 * device.*/
152 u32 size;
153
154 /* The actual value read from or written to the Wilink. The source
155 of this field is the Host in WRITE command or the Wilink in READ
156 command. */
157 u8 value[MAX_READ_SIZE];
158};
159
160#define CMDMBOX_HEADER_LEN 4
161#define CMDMBOX_INFO_ELEM_HEADER_LEN 4
162
163
164struct basic_scan_parameters {
165 u32 rx_config_options;
166 u32 rx_filter_options;
167
168 /*
169 * Scan options:
170 * bit 0: When this bit is set, passive scan.
171 * bit 1: Band, when this bit is set we scan
172 * in the 5Ghz band.
173 * bit 2: voice mode, 0 for normal scan.
174 * bit 3: scan priority, 1 for high priority.
175 */
176 u16 scan_options;
177
178 /* Number of channels to scan */
179 u8 num_channels;
180
181 /* Number opf probe requests to send, per channel */
182 u8 num_probe_requests;
183
184 /* Rate and modulation for probe requests */
185 u16 tx_rate;
186
187 u8 tid_trigger;
188 u8 ssid_len;
189 u32 ssid[8];
190
191} __attribute__ ((packed));
192
193struct basic_scan_channel_parameters {
194 u32 min_duration; /* in TU */
195 u32 max_duration; /* in TU */
196 u32 bssid_lsb;
197 u16 bssid_msb;
198
199 /*
200 * bits 0-3: Early termination count.
201 * bits 4-5: Early termination condition.
202 */
203 u8 early_termination;
204
205 u8 tx_power_att;
206 u8 channel;
207 u8 pad[3];
208} __attribute__ ((packed));
209
210/* SCAN parameters */
211#define SCAN_MAX_NUM_OF_CHANNELS 16
212
213struct cmd_scan {
214 struct basic_scan_parameters params;
215 struct basic_scan_channel_parameters channels[SCAN_MAX_NUM_OF_CHANNELS];
216} __attribute__ ((packed));
217
218enum {
219 BSS_TYPE_IBSS = 0,
220 BSS_TYPE_STA_BSS = 2,
221 BSS_TYPE_AP_BSS = 3,
222 MAX_BSS_TYPE = 0xFF
223};
224
225#define JOIN_CMD_CTRL_TX_FLUSH 0x80 /* Firmware flushes all Tx */
226#define JOIN_CMD_CTRL_EARLY_WAKEUP_ENABLE 0x01 /* Early wakeup time */
227
228
229struct cmd_join {
230 u32 bssid_lsb;
231 u16 bssid_msb;
232 u16 beacon_interval; /* in TBTTs */
233 u32 rx_config_options;
234 u32 rx_filter_options;
235
236 /*
237 * The target uses this field to determine the rate at
238 * which to transmit control frame responses (such as
239 * ACK or CTS frames).
240 */
241 u16 basic_rate_set;
242 u8 dtim_interval;
243 u8 tx_ctrl_frame_rate; /* OBSOLETE */
244 u8 tx_ctrl_frame_mod; /* OBSOLETE */
245 /*
246 * bits 0-2: This bitwise field specifies the type
247 * of BSS to start or join (BSS_TYPE_*).
248 * bit 4: Band - The radio band in which to join
249 * or start.
250 * 0 - 2.4GHz band
251 * 1 - 5GHz band
252 * bits 3, 5-7: Reserved
253 */
254 u8 bss_type;
255 u8 channel;
256 u8 ssid_len;
257 u8 ssid[IW_ESSID_MAX_SIZE];
258 u8 ctrl; /* JOIN_CMD_CTRL_* */
259 u8 tx_mgt_frame_rate; /* OBSOLETE */
260 u8 tx_mgt_frame_mod; /* OBSOLETE */
261 u8 reserved;
262} __attribute__ ((packed));
263
264
265#endif /* __WL12XX_CMD_H__ */
diff --git a/drivers/net/wireless/wl12xx/debugfs.c b/drivers/net/wireless/wl12xx/debugfs.c
new file mode 100644
index 000000000000..cdb368ce4dae
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/debugfs.c
@@ -0,0 +1,508 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include "debugfs.h"
25
26#include <linux/skbuff.h>
27
28#include "wl12xx.h"
29#include "acx.h"
30
31/* ms */
32#define WL12XX_DEBUGFS_STATS_LIFETIME 1000
33
34/* debugfs macros idea from mac80211 */
35
36#define DEBUGFS_READONLY_FILE(name, buflen, fmt, value...) \
37static ssize_t name## _read(struct file *file, char __user *userbuf, \
38 size_t count, loff_t *ppos) \
39{ \
40 struct wl12xx *wl = file->private_data; \
41 char buf[buflen]; \
42 int res; \
43 \
44 res = scnprintf(buf, buflen, fmt "\n", ##value); \
45 return simple_read_from_buffer(userbuf, count, ppos, buf, res); \
46} \
47 \
48static const struct file_operations name## _ops = { \
49 .read = name## _read, \
50 .open = wl12xx_open_file_generic, \
51};
52
53#define DEBUGFS_ADD(name, parent) \
54 wl->debugfs.name = debugfs_create_file(#name, 0400, parent, \
55 wl, &name## _ops); \
56 if (IS_ERR(wl->debugfs.name)) { \
57 ret = PTR_ERR(wl->debugfs.name); \
58 wl->debugfs.name = NULL; \
59 goto out; \
60 }
61
62#define DEBUGFS_DEL(name) \
63 do { \
64 debugfs_remove(wl->debugfs.name); \
65 wl->debugfs.name = NULL; \
66 } while (0)
67
68#define DEBUGFS_FWSTATS_FILE(sub, name, buflen, fmt) \
69static ssize_t sub## _ ##name## _read(struct file *file, \
70 char __user *userbuf, \
71 size_t count, loff_t *ppos) \
72{ \
73 struct wl12xx *wl = file->private_data; \
74 char buf[buflen]; \
75 int res; \
76 \
77 wl12xx_debugfs_update_stats(wl); \
78 \
79 res = scnprintf(buf, buflen, fmt "\n", \
80 wl->stats.fw_stats->sub.name); \
81 return simple_read_from_buffer(userbuf, count, ppos, buf, res); \
82} \
83 \
84static const struct file_operations sub## _ ##name## _ops = { \
85 .read = sub## _ ##name## _read, \
86 .open = wl12xx_open_file_generic, \
87};
88
89#define DEBUGFS_FWSTATS_ADD(sub, name) \
90 DEBUGFS_ADD(sub## _ ##name, wl->debugfs.fw_statistics)
91
92#define DEBUGFS_FWSTATS_DEL(sub, name) \
93 DEBUGFS_DEL(sub## _ ##name)
94
95static void wl12xx_debugfs_update_stats(struct wl12xx *wl)
96{
97 mutex_lock(&wl->mutex);
98
99 if (wl->state == WL12XX_STATE_ON &&
100 time_after(jiffies, wl->stats.fw_stats_update +
101 msecs_to_jiffies(WL12XX_DEBUGFS_STATS_LIFETIME))) {
102 wl12xx_acx_statistics(wl, wl->stats.fw_stats);
103 wl->stats.fw_stats_update = jiffies;
104 }
105
106 mutex_unlock(&wl->mutex);
107}
108
109static int wl12xx_open_file_generic(struct inode *inode, struct file *file)
110{
111 file->private_data = inode->i_private;
112 return 0;
113}
114
115DEBUGFS_FWSTATS_FILE(tx, internal_desc_overflow, 20, "%u");
116
117DEBUGFS_FWSTATS_FILE(rx, out_of_mem, 20, "%u");
118DEBUGFS_FWSTATS_FILE(rx, hdr_overflow, 20, "%u");
119DEBUGFS_FWSTATS_FILE(rx, hw_stuck, 20, "%u");
120DEBUGFS_FWSTATS_FILE(rx, dropped, 20, "%u");
121DEBUGFS_FWSTATS_FILE(rx, fcs_err, 20, "%u");
122DEBUGFS_FWSTATS_FILE(rx, xfr_hint_trig, 20, "%u");
123DEBUGFS_FWSTATS_FILE(rx, path_reset, 20, "%u");
124DEBUGFS_FWSTATS_FILE(rx, reset_counter, 20, "%u");
125
126DEBUGFS_FWSTATS_FILE(dma, rx_requested, 20, "%u");
127DEBUGFS_FWSTATS_FILE(dma, rx_errors, 20, "%u");
128DEBUGFS_FWSTATS_FILE(dma, tx_requested, 20, "%u");
129DEBUGFS_FWSTATS_FILE(dma, tx_errors, 20, "%u");
130
131DEBUGFS_FWSTATS_FILE(isr, cmd_cmplt, 20, "%u");
132DEBUGFS_FWSTATS_FILE(isr, fiqs, 20, "%u");
133DEBUGFS_FWSTATS_FILE(isr, rx_headers, 20, "%u");
134DEBUGFS_FWSTATS_FILE(isr, rx_mem_overflow, 20, "%u");
135DEBUGFS_FWSTATS_FILE(isr, rx_rdys, 20, "%u");
136DEBUGFS_FWSTATS_FILE(isr, irqs, 20, "%u");
137DEBUGFS_FWSTATS_FILE(isr, tx_procs, 20, "%u");
138DEBUGFS_FWSTATS_FILE(isr, decrypt_done, 20, "%u");
139DEBUGFS_FWSTATS_FILE(isr, dma0_done, 20, "%u");
140DEBUGFS_FWSTATS_FILE(isr, dma1_done, 20, "%u");
141DEBUGFS_FWSTATS_FILE(isr, tx_exch_complete, 20, "%u");
142DEBUGFS_FWSTATS_FILE(isr, commands, 20, "%u");
143DEBUGFS_FWSTATS_FILE(isr, rx_procs, 20, "%u");
144DEBUGFS_FWSTATS_FILE(isr, hw_pm_mode_changes, 20, "%u");
145DEBUGFS_FWSTATS_FILE(isr, host_acknowledges, 20, "%u");
146DEBUGFS_FWSTATS_FILE(isr, pci_pm, 20, "%u");
147DEBUGFS_FWSTATS_FILE(isr, wakeups, 20, "%u");
148DEBUGFS_FWSTATS_FILE(isr, low_rssi, 20, "%u");
149
150DEBUGFS_FWSTATS_FILE(wep, addr_key_count, 20, "%u");
151DEBUGFS_FWSTATS_FILE(wep, default_key_count, 20, "%u");
152/* skipping wep.reserved */
153DEBUGFS_FWSTATS_FILE(wep, key_not_found, 20, "%u");
154DEBUGFS_FWSTATS_FILE(wep, decrypt_fail, 20, "%u");
155DEBUGFS_FWSTATS_FILE(wep, packets, 20, "%u");
156DEBUGFS_FWSTATS_FILE(wep, interrupt, 20, "%u");
157
158DEBUGFS_FWSTATS_FILE(pwr, ps_enter, 20, "%u");
159DEBUGFS_FWSTATS_FILE(pwr, elp_enter, 20, "%u");
160DEBUGFS_FWSTATS_FILE(pwr, missing_bcns, 20, "%u");
161DEBUGFS_FWSTATS_FILE(pwr, wake_on_host, 20, "%u");
162DEBUGFS_FWSTATS_FILE(pwr, wake_on_timer_exp, 20, "%u");
163DEBUGFS_FWSTATS_FILE(pwr, tx_with_ps, 20, "%u");
164DEBUGFS_FWSTATS_FILE(pwr, tx_without_ps, 20, "%u");
165DEBUGFS_FWSTATS_FILE(pwr, rcvd_beacons, 20, "%u");
166DEBUGFS_FWSTATS_FILE(pwr, power_save_off, 20, "%u");
167DEBUGFS_FWSTATS_FILE(pwr, enable_ps, 20, "%u");
168DEBUGFS_FWSTATS_FILE(pwr, disable_ps, 20, "%u");
169DEBUGFS_FWSTATS_FILE(pwr, fix_tsf_ps, 20, "%u");
170/* skipping cont_miss_bcns_spread for now */
171DEBUGFS_FWSTATS_FILE(pwr, rcvd_awake_beacons, 20, "%u");
172
173DEBUGFS_FWSTATS_FILE(mic, rx_pkts, 20, "%u");
174DEBUGFS_FWSTATS_FILE(mic, calc_failure, 20, "%u");
175
176DEBUGFS_FWSTATS_FILE(aes, encrypt_fail, 20, "%u");
177DEBUGFS_FWSTATS_FILE(aes, decrypt_fail, 20, "%u");
178DEBUGFS_FWSTATS_FILE(aes, encrypt_packets, 20, "%u");
179DEBUGFS_FWSTATS_FILE(aes, decrypt_packets, 20, "%u");
180DEBUGFS_FWSTATS_FILE(aes, encrypt_interrupt, 20, "%u");
181DEBUGFS_FWSTATS_FILE(aes, decrypt_interrupt, 20, "%u");
182
183DEBUGFS_FWSTATS_FILE(event, heart_beat, 20, "%u");
184DEBUGFS_FWSTATS_FILE(event, calibration, 20, "%u");
185DEBUGFS_FWSTATS_FILE(event, rx_mismatch, 20, "%u");
186DEBUGFS_FWSTATS_FILE(event, rx_mem_empty, 20, "%u");
187DEBUGFS_FWSTATS_FILE(event, rx_pool, 20, "%u");
188DEBUGFS_FWSTATS_FILE(event, oom_late, 20, "%u");
189DEBUGFS_FWSTATS_FILE(event, phy_transmit_error, 20, "%u");
190DEBUGFS_FWSTATS_FILE(event, tx_stuck, 20, "%u");
191
192DEBUGFS_FWSTATS_FILE(ps, pspoll_timeouts, 20, "%u");
193DEBUGFS_FWSTATS_FILE(ps, upsd_timeouts, 20, "%u");
194DEBUGFS_FWSTATS_FILE(ps, upsd_max_sptime, 20, "%u");
195DEBUGFS_FWSTATS_FILE(ps, upsd_max_apturn, 20, "%u");
196DEBUGFS_FWSTATS_FILE(ps, pspoll_max_apturn, 20, "%u");
197DEBUGFS_FWSTATS_FILE(ps, pspoll_utilization, 20, "%u");
198DEBUGFS_FWSTATS_FILE(ps, upsd_utilization, 20, "%u");
199
200DEBUGFS_FWSTATS_FILE(rxpipe, rx_prep_beacon_drop, 20, "%u");
201DEBUGFS_FWSTATS_FILE(rxpipe, descr_host_int_trig_rx_data, 20, "%u");
202DEBUGFS_FWSTATS_FILE(rxpipe, beacon_buffer_thres_host_int_trig_rx_data,
203 20, "%u");
204DEBUGFS_FWSTATS_FILE(rxpipe, missed_beacon_host_int_trig_rx_data, 20, "%u");
205DEBUGFS_FWSTATS_FILE(rxpipe, tx_xfr_host_int_trig_rx_data, 20, "%u");
206
207DEBUGFS_READONLY_FILE(retry_count, 20, "%u", wl->stats.retry_count);
208DEBUGFS_READONLY_FILE(excessive_retries, 20, "%u",
209 wl->stats.excessive_retries);
210
211static ssize_t tx_queue_len_read(struct file *file, char __user *userbuf,
212 size_t count, loff_t *ppos)
213{
214 struct wl12xx *wl = file->private_data;
215 u32 queue_len;
216 char buf[20];
217 int res;
218
219 queue_len = skb_queue_len(&wl->tx_queue);
220
221 res = scnprintf(buf, sizeof(buf), "%u\n", queue_len);
222 return simple_read_from_buffer(userbuf, count, ppos, buf, res);
223}
224
225static const struct file_operations tx_queue_len_ops = {
226 .read = tx_queue_len_read,
227 .open = wl12xx_open_file_generic,
228};
229
230static void wl12xx_debugfs_delete_files(struct wl12xx *wl)
231{
232 DEBUGFS_FWSTATS_DEL(tx, internal_desc_overflow);
233
234 DEBUGFS_FWSTATS_DEL(rx, out_of_mem);
235 DEBUGFS_FWSTATS_DEL(rx, hdr_overflow);
236 DEBUGFS_FWSTATS_DEL(rx, hw_stuck);
237 DEBUGFS_FWSTATS_DEL(rx, dropped);
238 DEBUGFS_FWSTATS_DEL(rx, fcs_err);
239 DEBUGFS_FWSTATS_DEL(rx, xfr_hint_trig);
240 DEBUGFS_FWSTATS_DEL(rx, path_reset);
241 DEBUGFS_FWSTATS_DEL(rx, reset_counter);
242
243 DEBUGFS_FWSTATS_DEL(dma, rx_requested);
244 DEBUGFS_FWSTATS_DEL(dma, rx_errors);
245 DEBUGFS_FWSTATS_DEL(dma, tx_requested);
246 DEBUGFS_FWSTATS_DEL(dma, tx_errors);
247
248 DEBUGFS_FWSTATS_DEL(isr, cmd_cmplt);
249 DEBUGFS_FWSTATS_DEL(isr, fiqs);
250 DEBUGFS_FWSTATS_DEL(isr, rx_headers);
251 DEBUGFS_FWSTATS_DEL(isr, rx_mem_overflow);
252 DEBUGFS_FWSTATS_DEL(isr, rx_rdys);
253 DEBUGFS_FWSTATS_DEL(isr, irqs);
254 DEBUGFS_FWSTATS_DEL(isr, tx_procs);
255 DEBUGFS_FWSTATS_DEL(isr, decrypt_done);
256 DEBUGFS_FWSTATS_DEL(isr, dma0_done);
257 DEBUGFS_FWSTATS_DEL(isr, dma1_done);
258 DEBUGFS_FWSTATS_DEL(isr, tx_exch_complete);
259 DEBUGFS_FWSTATS_DEL(isr, commands);
260 DEBUGFS_FWSTATS_DEL(isr, rx_procs);
261 DEBUGFS_FWSTATS_DEL(isr, hw_pm_mode_changes);
262 DEBUGFS_FWSTATS_DEL(isr, host_acknowledges);
263 DEBUGFS_FWSTATS_DEL(isr, pci_pm);
264 DEBUGFS_FWSTATS_DEL(isr, wakeups);
265 DEBUGFS_FWSTATS_DEL(isr, low_rssi);
266
267 DEBUGFS_FWSTATS_DEL(wep, addr_key_count);
268 DEBUGFS_FWSTATS_DEL(wep, default_key_count);
269 /* skipping wep.reserved */
270 DEBUGFS_FWSTATS_DEL(wep, key_not_found);
271 DEBUGFS_FWSTATS_DEL(wep, decrypt_fail);
272 DEBUGFS_FWSTATS_DEL(wep, packets);
273 DEBUGFS_FWSTATS_DEL(wep, interrupt);
274
275 DEBUGFS_FWSTATS_DEL(pwr, ps_enter);
276 DEBUGFS_FWSTATS_DEL(pwr, elp_enter);
277 DEBUGFS_FWSTATS_DEL(pwr, missing_bcns);
278 DEBUGFS_FWSTATS_DEL(pwr, wake_on_host);
279 DEBUGFS_FWSTATS_DEL(pwr, wake_on_timer_exp);
280 DEBUGFS_FWSTATS_DEL(pwr, tx_with_ps);
281 DEBUGFS_FWSTATS_DEL(pwr, tx_without_ps);
282 DEBUGFS_FWSTATS_DEL(pwr, rcvd_beacons);
283 DEBUGFS_FWSTATS_DEL(pwr, power_save_off);
284 DEBUGFS_FWSTATS_DEL(pwr, enable_ps);
285 DEBUGFS_FWSTATS_DEL(pwr, disable_ps);
286 DEBUGFS_FWSTATS_DEL(pwr, fix_tsf_ps);
287 /* skipping cont_miss_bcns_spread for now */
288 DEBUGFS_FWSTATS_DEL(pwr, rcvd_awake_beacons);
289
290 DEBUGFS_FWSTATS_DEL(mic, rx_pkts);
291 DEBUGFS_FWSTATS_DEL(mic, calc_failure);
292
293 DEBUGFS_FWSTATS_DEL(aes, encrypt_fail);
294 DEBUGFS_FWSTATS_DEL(aes, decrypt_fail);
295 DEBUGFS_FWSTATS_DEL(aes, encrypt_packets);
296 DEBUGFS_FWSTATS_DEL(aes, decrypt_packets);
297 DEBUGFS_FWSTATS_DEL(aes, encrypt_interrupt);
298 DEBUGFS_FWSTATS_DEL(aes, decrypt_interrupt);
299
300 DEBUGFS_FWSTATS_DEL(event, heart_beat);
301 DEBUGFS_FWSTATS_DEL(event, calibration);
302 DEBUGFS_FWSTATS_DEL(event, rx_mismatch);
303 DEBUGFS_FWSTATS_DEL(event, rx_mem_empty);
304 DEBUGFS_FWSTATS_DEL(event, rx_pool);
305 DEBUGFS_FWSTATS_DEL(event, oom_late);
306 DEBUGFS_FWSTATS_DEL(event, phy_transmit_error);
307 DEBUGFS_FWSTATS_DEL(event, tx_stuck);
308
309 DEBUGFS_FWSTATS_DEL(ps, pspoll_timeouts);
310 DEBUGFS_FWSTATS_DEL(ps, upsd_timeouts);
311 DEBUGFS_FWSTATS_DEL(ps, upsd_max_sptime);
312 DEBUGFS_FWSTATS_DEL(ps, upsd_max_apturn);
313 DEBUGFS_FWSTATS_DEL(ps, pspoll_max_apturn);
314 DEBUGFS_FWSTATS_DEL(ps, pspoll_utilization);
315 DEBUGFS_FWSTATS_DEL(ps, upsd_utilization);
316
317 DEBUGFS_FWSTATS_DEL(rxpipe, rx_prep_beacon_drop);
318 DEBUGFS_FWSTATS_DEL(rxpipe, descr_host_int_trig_rx_data);
319 DEBUGFS_FWSTATS_DEL(rxpipe, beacon_buffer_thres_host_int_trig_rx_data);
320 DEBUGFS_FWSTATS_DEL(rxpipe, missed_beacon_host_int_trig_rx_data);
321 DEBUGFS_FWSTATS_DEL(rxpipe, tx_xfr_host_int_trig_rx_data);
322
323 DEBUGFS_DEL(tx_queue_len);
324 DEBUGFS_DEL(retry_count);
325 DEBUGFS_DEL(excessive_retries);
326}
327
328static int wl12xx_debugfs_add_files(struct wl12xx *wl)
329{
330 int ret = 0;
331
332 DEBUGFS_FWSTATS_ADD(tx, internal_desc_overflow);
333
334 DEBUGFS_FWSTATS_ADD(rx, out_of_mem);
335 DEBUGFS_FWSTATS_ADD(rx, hdr_overflow);
336 DEBUGFS_FWSTATS_ADD(rx, hw_stuck);
337 DEBUGFS_FWSTATS_ADD(rx, dropped);
338 DEBUGFS_FWSTATS_ADD(rx, fcs_err);
339 DEBUGFS_FWSTATS_ADD(rx, xfr_hint_trig);
340 DEBUGFS_FWSTATS_ADD(rx, path_reset);
341 DEBUGFS_FWSTATS_ADD(rx, reset_counter);
342
343 DEBUGFS_FWSTATS_ADD(dma, rx_requested);
344 DEBUGFS_FWSTATS_ADD(dma, rx_errors);
345 DEBUGFS_FWSTATS_ADD(dma, tx_requested);
346 DEBUGFS_FWSTATS_ADD(dma, tx_errors);
347
348 DEBUGFS_FWSTATS_ADD(isr, cmd_cmplt);
349 DEBUGFS_FWSTATS_ADD(isr, fiqs);
350 DEBUGFS_FWSTATS_ADD(isr, rx_headers);
351 DEBUGFS_FWSTATS_ADD(isr, rx_mem_overflow);
352 DEBUGFS_FWSTATS_ADD(isr, rx_rdys);
353 DEBUGFS_FWSTATS_ADD(isr, irqs);
354 DEBUGFS_FWSTATS_ADD(isr, tx_procs);
355 DEBUGFS_FWSTATS_ADD(isr, decrypt_done);
356 DEBUGFS_FWSTATS_ADD(isr, dma0_done);
357 DEBUGFS_FWSTATS_ADD(isr, dma1_done);
358 DEBUGFS_FWSTATS_ADD(isr, tx_exch_complete);
359 DEBUGFS_FWSTATS_ADD(isr, commands);
360 DEBUGFS_FWSTATS_ADD(isr, rx_procs);
361 DEBUGFS_FWSTATS_ADD(isr, hw_pm_mode_changes);
362 DEBUGFS_FWSTATS_ADD(isr, host_acknowledges);
363 DEBUGFS_FWSTATS_ADD(isr, pci_pm);
364 DEBUGFS_FWSTATS_ADD(isr, wakeups);
365 DEBUGFS_FWSTATS_ADD(isr, low_rssi);
366
367 DEBUGFS_FWSTATS_ADD(wep, addr_key_count);
368 DEBUGFS_FWSTATS_ADD(wep, default_key_count);
369 /* skipping wep.reserved */
370 DEBUGFS_FWSTATS_ADD(wep, key_not_found);
371 DEBUGFS_FWSTATS_ADD(wep, decrypt_fail);
372 DEBUGFS_FWSTATS_ADD(wep, packets);
373 DEBUGFS_FWSTATS_ADD(wep, interrupt);
374
375 DEBUGFS_FWSTATS_ADD(pwr, ps_enter);
376 DEBUGFS_FWSTATS_ADD(pwr, elp_enter);
377 DEBUGFS_FWSTATS_ADD(pwr, missing_bcns);
378 DEBUGFS_FWSTATS_ADD(pwr, wake_on_host);
379 DEBUGFS_FWSTATS_ADD(pwr, wake_on_timer_exp);
380 DEBUGFS_FWSTATS_ADD(pwr, tx_with_ps);
381 DEBUGFS_FWSTATS_ADD(pwr, tx_without_ps);
382 DEBUGFS_FWSTATS_ADD(pwr, rcvd_beacons);
383 DEBUGFS_FWSTATS_ADD(pwr, power_save_off);
384 DEBUGFS_FWSTATS_ADD(pwr, enable_ps);
385 DEBUGFS_FWSTATS_ADD(pwr, disable_ps);
386 DEBUGFS_FWSTATS_ADD(pwr, fix_tsf_ps);
387 /* skipping cont_miss_bcns_spread for now */
388 DEBUGFS_FWSTATS_ADD(pwr, rcvd_awake_beacons);
389
390 DEBUGFS_FWSTATS_ADD(mic, rx_pkts);
391 DEBUGFS_FWSTATS_ADD(mic, calc_failure);
392
393 DEBUGFS_FWSTATS_ADD(aes, encrypt_fail);
394 DEBUGFS_FWSTATS_ADD(aes, decrypt_fail);
395 DEBUGFS_FWSTATS_ADD(aes, encrypt_packets);
396 DEBUGFS_FWSTATS_ADD(aes, decrypt_packets);
397 DEBUGFS_FWSTATS_ADD(aes, encrypt_interrupt);
398 DEBUGFS_FWSTATS_ADD(aes, decrypt_interrupt);
399
400 DEBUGFS_FWSTATS_ADD(event, heart_beat);
401 DEBUGFS_FWSTATS_ADD(event, calibration);
402 DEBUGFS_FWSTATS_ADD(event, rx_mismatch);
403 DEBUGFS_FWSTATS_ADD(event, rx_mem_empty);
404 DEBUGFS_FWSTATS_ADD(event, rx_pool);
405 DEBUGFS_FWSTATS_ADD(event, oom_late);
406 DEBUGFS_FWSTATS_ADD(event, phy_transmit_error);
407 DEBUGFS_FWSTATS_ADD(event, tx_stuck);
408
409 DEBUGFS_FWSTATS_ADD(ps, pspoll_timeouts);
410 DEBUGFS_FWSTATS_ADD(ps, upsd_timeouts);
411 DEBUGFS_FWSTATS_ADD(ps, upsd_max_sptime);
412 DEBUGFS_FWSTATS_ADD(ps, upsd_max_apturn);
413 DEBUGFS_FWSTATS_ADD(ps, pspoll_max_apturn);
414 DEBUGFS_FWSTATS_ADD(ps, pspoll_utilization);
415 DEBUGFS_FWSTATS_ADD(ps, upsd_utilization);
416
417 DEBUGFS_FWSTATS_ADD(rxpipe, rx_prep_beacon_drop);
418 DEBUGFS_FWSTATS_ADD(rxpipe, descr_host_int_trig_rx_data);
419 DEBUGFS_FWSTATS_ADD(rxpipe, beacon_buffer_thres_host_int_trig_rx_data);
420 DEBUGFS_FWSTATS_ADD(rxpipe, missed_beacon_host_int_trig_rx_data);
421 DEBUGFS_FWSTATS_ADD(rxpipe, tx_xfr_host_int_trig_rx_data);
422
423 DEBUGFS_ADD(tx_queue_len, wl->debugfs.rootdir);
424 DEBUGFS_ADD(retry_count, wl->debugfs.rootdir);
425 DEBUGFS_ADD(excessive_retries, wl->debugfs.rootdir);
426
427out:
428 if (ret < 0)
429 wl12xx_debugfs_delete_files(wl);
430
431 return ret;
432}
433
434void wl12xx_debugfs_reset(struct wl12xx *wl)
435{
436 memset(wl->stats.fw_stats, 0, sizeof(*wl->stats.fw_stats));
437 wl->stats.retry_count = 0;
438 wl->stats.excessive_retries = 0;
439}
440
441int wl12xx_debugfs_init(struct wl12xx *wl)
442{
443 int ret;
444
445 wl->debugfs.rootdir = debugfs_create_dir(KBUILD_MODNAME, NULL);
446
447 if (IS_ERR(wl->debugfs.rootdir)) {
448 ret = PTR_ERR(wl->debugfs.rootdir);
449 wl->debugfs.rootdir = NULL;
450 goto err;
451 }
452
453 wl->debugfs.fw_statistics = debugfs_create_dir("fw-statistics",
454 wl->debugfs.rootdir);
455
456 if (IS_ERR(wl->debugfs.fw_statistics)) {
457 ret = PTR_ERR(wl->debugfs.fw_statistics);
458 wl->debugfs.fw_statistics = NULL;
459 goto err_root;
460 }
461
462 wl->stats.fw_stats = kzalloc(sizeof(*wl->stats.fw_stats),
463 GFP_KERNEL);
464
465 if (!wl->stats.fw_stats) {
466 ret = -ENOMEM;
467 goto err_fw;
468 }
469
470 wl->stats.fw_stats_update = jiffies;
471
472 ret = wl12xx_debugfs_add_files(wl);
473
474 if (ret < 0)
475 goto err_file;
476
477 return 0;
478
479err_file:
480 kfree(wl->stats.fw_stats);
481 wl->stats.fw_stats = NULL;
482
483err_fw:
484 debugfs_remove(wl->debugfs.fw_statistics);
485 wl->debugfs.fw_statistics = NULL;
486
487err_root:
488 debugfs_remove(wl->debugfs.rootdir);
489 wl->debugfs.rootdir = NULL;
490
491err:
492 return ret;
493}
494
495void wl12xx_debugfs_exit(struct wl12xx *wl)
496{
497 wl12xx_debugfs_delete_files(wl);
498
499 kfree(wl->stats.fw_stats);
500 wl->stats.fw_stats = NULL;
501
502 debugfs_remove(wl->debugfs.fw_statistics);
503 wl->debugfs.fw_statistics = NULL;
504
505 debugfs_remove(wl->debugfs.rootdir);
506 wl->debugfs.rootdir = NULL;
507
508}
diff --git a/drivers/net/wireless/wl12xx/debugfs.h b/drivers/net/wireless/wl12xx/debugfs.h
new file mode 100644
index 000000000000..562cdcbcc874
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/debugfs.h
@@ -0,0 +1,33 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#ifndef WL12XX_DEBUGFS_H
25#define WL12XX_DEBUGFS_H
26
27#include "wl12xx.h"
28
29int wl12xx_debugfs_init(struct wl12xx *wl);
30void wl12xx_debugfs_exit(struct wl12xx *wl);
31void wl12xx_debugfs_reset(struct wl12xx *wl);
32
33#endif /* WL12XX_DEBUGFS_H */
diff --git a/drivers/net/wireless/wl12xx/event.c b/drivers/net/wireless/wl12xx/event.c
new file mode 100644
index 000000000000..99529ca89a7e
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/event.c
@@ -0,0 +1,127 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#include "wl12xx.h"
26#include "reg.h"
27#include "spi.h"
28#include "event.h"
29#include "ps.h"
30
31static int wl12xx_event_scan_complete(struct wl12xx *wl,
32 struct event_mailbox *mbox)
33{
34 wl12xx_debug(DEBUG_EVENT, "status: 0x%x, channels: %d",
35 mbox->scheduled_scan_status,
36 mbox->scheduled_scan_channels);
37
38 if (wl->scanning) {
39 mutex_unlock(&wl->mutex);
40 ieee80211_scan_completed(wl->hw, false);
41 mutex_lock(&wl->mutex);
42 wl->scanning = false;
43 }
44
45 return 0;
46}
47
48static void wl12xx_event_mbox_dump(struct event_mailbox *mbox)
49{
50 wl12xx_debug(DEBUG_EVENT, "MBOX DUMP:");
51 wl12xx_debug(DEBUG_EVENT, "\tvector: 0x%x", mbox->events_vector);
52 wl12xx_debug(DEBUG_EVENT, "\tmask: 0x%x", mbox->events_mask);
53}
54
55static int wl12xx_event_process(struct wl12xx *wl, struct event_mailbox *mbox)
56{
57 int ret;
58 u32 vector;
59
60 wl12xx_event_mbox_dump(mbox);
61
62 vector = mbox->events_vector & ~(mbox->events_mask);
63 wl12xx_debug(DEBUG_EVENT, "vector: 0x%x", vector);
64
65 if (vector & SCAN_COMPLETE_EVENT_ID) {
66 ret = wl12xx_event_scan_complete(wl, mbox);
67 if (ret < 0)
68 return ret;
69 }
70
71 if (vector & BSS_LOSE_EVENT_ID) {
72 wl12xx_debug(DEBUG_EVENT, "BSS_LOSE_EVENT");
73
74 if (wl->psm_requested && wl->psm) {
75 ret = wl12xx_ps_set_mode(wl, STATION_ACTIVE_MODE);
76 if (ret < 0)
77 return ret;
78 }
79 }
80
81 return 0;
82}
83
84int wl12xx_event_unmask(struct wl12xx *wl)
85{
86 int ret;
87
88 ret = wl12xx_acx_event_mbox_mask(wl, ~(wl->event_mask));
89 if (ret < 0)
90 return ret;
91
92 return 0;
93}
94
95void wl12xx_event_mbox_config(struct wl12xx *wl)
96{
97 wl->mbox_ptr[0] = wl12xx_reg_read32(wl, REG_EVENT_MAILBOX_PTR);
98 wl->mbox_ptr[1] = wl->mbox_ptr[0] + sizeof(struct event_mailbox);
99
100 wl12xx_debug(DEBUG_EVENT, "MBOX ptrs: 0x%x 0x%x",
101 wl->mbox_ptr[0], wl->mbox_ptr[1]);
102}
103
104int wl12xx_event_handle(struct wl12xx *wl, u8 mbox_num)
105{
106 struct event_mailbox mbox;
107 int ret;
108
109 wl12xx_debug(DEBUG_EVENT, "EVENT on mbox %d", mbox_num);
110
111 if (mbox_num > 1)
112 return -EINVAL;
113
114 /* first we read the mbox descriptor */
115 wl12xx_spi_mem_read(wl, wl->mbox_ptr[mbox_num], &mbox,
116 sizeof(struct event_mailbox));
117
118 /* process the descriptor */
119 ret = wl12xx_event_process(wl, &mbox);
120 if (ret < 0)
121 return ret;
122
123 /* then we let the firmware know it can go on...*/
124 wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_EVENT_ACK);
125
126 return 0;
127}
diff --git a/drivers/net/wireless/wl12xx/event.h b/drivers/net/wireless/wl12xx/event.h
new file mode 100644
index 000000000000..1f4c2f7438a7
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/event.h
@@ -0,0 +1,121 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL12XX_EVENT_H__
26#define __WL12XX_EVENT_H__
27
28/*
29 * Mbox events
30 *
31 * The event mechanism is based on a pair of event buffers (buffers A and
32 * B) at fixed locations in the target's memory. The host processes one
33 * buffer while the other buffer continues to collect events. If the host
34 * is not processing events, an interrupt is issued to signal that a buffer
35 * is ready. Once the host is done with processing events from one buffer,
36 * it signals the target (with an ACK interrupt) that the event buffer is
37 * free.
38 */
39
40enum {
41 RESERVED1_EVENT_ID = BIT(0),
42 RESERVED2_EVENT_ID = BIT(1),
43 MEASUREMENT_START_EVENT_ID = BIT(2),
44 SCAN_COMPLETE_EVENT_ID = BIT(3),
45 CALIBRATION_COMPLETE_EVENT_ID = BIT(4),
46 ROAMING_TRIGGER_LOW_RSSI_EVENT_ID = BIT(5),
47 PS_REPORT_EVENT_ID = BIT(6),
48 SYNCHRONIZATION_TIMEOUT_EVENT_ID = BIT(7),
49 HEALTH_REPORT_EVENT_ID = BIT(8),
50 ACI_DETECTION_EVENT_ID = BIT(9),
51 DEBUG_REPORT_EVENT_ID = BIT(10),
52 MAC_STATUS_EVENT_ID = BIT(11),
53 DISCONNECT_EVENT_COMPLETE_ID = BIT(12),
54 JOIN_EVENT_COMPLETE_ID = BIT(13),
55 CHANNEL_SWITCH_COMPLETE_EVENT_ID = BIT(14),
56 BSS_LOSE_EVENT_ID = BIT(15),
57 ROAMING_TRIGGER_MAX_TX_RETRY_EVENT_ID = BIT(16),
58 MEASUREMENT_COMPLETE_EVENT_ID = BIT(17),
59 AP_DISCOVERY_COMPLETE_EVENT_ID = BIT(18),
60 SCHEDULED_SCAN_COMPLETE_EVENT_ID = BIT(19),
61 PSPOLL_DELIVERY_FAILURE_EVENT_ID = BIT(20),
62 RESET_BSS_EVENT_ID = BIT(21),
63 REGAINED_BSS_EVENT_ID = BIT(22),
64 ROAMING_TRIGGER_REGAINED_RSSI_EVENT_ID = BIT(23),
65 ROAMING_TRIGGER_LOW_SNR_EVENT_ID = BIT(24),
66 ROAMING_TRIGGER_REGAINED_SNR_EVENT_ID = BIT(25),
67
68 DBG_EVENT_ID = BIT(26),
69 BT_PTA_SENSE_EVENT_ID = BIT(27),
70 BT_PTA_PREDICTION_EVENT_ID = BIT(28),
71 BT_PTA_AVALANCHE_EVENT_ID = BIT(29),
72
73 PLT_RX_CALIBRATION_COMPLETE_EVENT_ID = BIT(30),
74
75 EVENT_MBOX_ALL_EVENT_ID = 0x7fffffff,
76};
77
78struct event_debug_report {
79 u8 debug_event_id;
80 u8 num_params;
81 u16 pad;
82 u32 report_1;
83 u32 report_2;
84 u32 report_3;
85} __attribute__ ((packed));
86
87struct event_mailbox {
88 u32 events_vector;
89 u32 events_mask;
90 u32 reserved_1;
91 u32 reserved_2;
92
93 char average_rssi_level;
94 u8 ps_status;
95 u8 channel_switch_status;
96 u8 scheduled_scan_status;
97
98 /* Channels scanned by the scheduled scan */
99 u16 scheduled_scan_channels;
100
101 /* If bit 0 is set -> target's fatal error */
102 u16 health_report;
103 u16 bad_fft_counter;
104 u8 bt_pta_sense_info;
105 u8 bt_pta_protective_info;
106 u32 reserved;
107 u32 debug_report[2];
108
109 /* Number of FCS errors since last event */
110 u32 fcs_err_counter;
111
112 struct event_debug_report report;
113 u8 average_snr_level;
114 u8 padding[19];
115} __attribute__ ((packed));
116
117int wl12xx_event_unmask(struct wl12xx *wl);
118void wl12xx_event_mbox_config(struct wl12xx *wl);
119int wl12xx_event_handle(struct wl12xx *wl, u8 mbox);
120
121#endif
diff --git a/drivers/net/wireless/wl12xx/init.c b/drivers/net/wireless/wl12xx/init.c
new file mode 100644
index 000000000000..2a573a6010bd
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/init.c
@@ -0,0 +1,200 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26
27#include "init.h"
28#include "wl12xx_80211.h"
29#include "acx.h"
30#include "cmd.h"
31
32int wl12xx_hw_init_hwenc_config(struct wl12xx *wl)
33{
34 int ret;
35
36 ret = wl12xx_acx_feature_cfg(wl);
37 if (ret < 0) {
38 wl12xx_warning("couldn't set feature config");
39 return ret;
40 }
41
42 ret = wl12xx_acx_default_key(wl, wl->default_key);
43 if (ret < 0) {
44 wl12xx_warning("couldn't set default key");
45 return ret;
46 }
47
48 return 0;
49}
50
51int wl12xx_hw_init_templates_config(struct wl12xx *wl)
52{
53 int ret;
54 u8 partial_vbm[PARTIAL_VBM_MAX];
55
56 /* send empty templates for fw memory reservation */
57 ret = wl12xx_cmd_template_set(wl, CMD_PROBE_REQ, NULL,
58 sizeof(struct wl12xx_probe_req_template));
59 if (ret < 0)
60 return ret;
61
62 ret = wl12xx_cmd_template_set(wl, CMD_NULL_DATA, NULL,
63 sizeof(struct wl12xx_null_data_template));
64 if (ret < 0)
65 return ret;
66
67 ret = wl12xx_cmd_template_set(wl, CMD_PS_POLL, NULL,
68 sizeof(struct wl12xx_ps_poll_template));
69 if (ret < 0)
70 return ret;
71
72 ret = wl12xx_cmd_template_set(wl, CMD_QOS_NULL_DATA, NULL,
73 sizeof
74 (struct wl12xx_qos_null_data_template));
75 if (ret < 0)
76 return ret;
77
78 ret = wl12xx_cmd_template_set(wl, CMD_PROBE_RESP, NULL,
79 sizeof
80 (struct wl12xx_probe_resp_template));
81 if (ret < 0)
82 return ret;
83
84 ret = wl12xx_cmd_template_set(wl, CMD_BEACON, NULL,
85 sizeof
86 (struct wl12xx_beacon_template));
87 if (ret < 0)
88 return ret;
89
90 /* tim templates, first reserve space then allocate an empty one */
91 memset(partial_vbm, 0, PARTIAL_VBM_MAX);
92 ret = wl12xx_cmd_vbm(wl, TIM_ELE_ID, partial_vbm, PARTIAL_VBM_MAX, 0);
93 if (ret < 0)
94 return ret;
95
96 ret = wl12xx_cmd_vbm(wl, TIM_ELE_ID, partial_vbm, 1, 0);
97 if (ret < 0)
98 return ret;
99
100 return 0;
101}
102
103int wl12xx_hw_init_rx_config(struct wl12xx *wl, u32 config, u32 filter)
104{
105 int ret;
106
107 ret = wl12xx_acx_rx_msdu_life_time(wl, RX_MSDU_LIFETIME_DEF);
108 if (ret < 0)
109 return ret;
110
111 ret = wl12xx_acx_rx_config(wl, config, filter);
112 if (ret < 0)
113 return ret;
114
115 return 0;
116}
117
118int wl12xx_hw_init_phy_config(struct wl12xx *wl)
119{
120 int ret;
121
122 ret = wl12xx_acx_pd_threshold(wl);
123 if (ret < 0)
124 return ret;
125
126 ret = wl12xx_acx_slot(wl, DEFAULT_SLOT_TIME);
127 if (ret < 0)
128 return ret;
129
130 ret = wl12xx_acx_group_address_tbl(wl);
131 if (ret < 0)
132 return ret;
133
134 ret = wl12xx_acx_service_period_timeout(wl);
135 if (ret < 0)
136 return ret;
137
138 ret = wl12xx_acx_rts_threshold(wl, RTS_THRESHOLD_DEF);
139 if (ret < 0)
140 return ret;
141
142 return 0;
143}
144
145int wl12xx_hw_init_beacon_filter(struct wl12xx *wl)
146{
147 int ret;
148
149 ret = wl12xx_acx_beacon_filter_opt(wl);
150 if (ret < 0)
151 return ret;
152
153 ret = wl12xx_acx_beacon_filter_table(wl);
154 if (ret < 0)
155 return ret;
156
157 return 0;
158}
159
160int wl12xx_hw_init_pta(struct wl12xx *wl)
161{
162 int ret;
163
164 ret = wl12xx_acx_sg_enable(wl);
165 if (ret < 0)
166 return ret;
167
168 ret = wl12xx_acx_sg_cfg(wl);
169 if (ret < 0)
170 return ret;
171
172 return 0;
173}
174
175int wl12xx_hw_init_energy_detection(struct wl12xx *wl)
176{
177 int ret;
178
179 ret = wl12xx_acx_cca_threshold(wl);
180 if (ret < 0)
181 return ret;
182
183 return 0;
184}
185
186int wl12xx_hw_init_beacon_broadcast(struct wl12xx *wl)
187{
188 int ret;
189
190 ret = wl12xx_acx_bcn_dtim_options(wl);
191 if (ret < 0)
192 return ret;
193
194 return 0;
195}
196
197int wl12xx_hw_init_power_auth(struct wl12xx *wl)
198{
199 return wl12xx_acx_sleep_auth(wl, WL12XX_PSM_CAM);
200}
diff --git a/drivers/net/wireless/wl12xx/init.h b/drivers/net/wireless/wl12xx/init.h
new file mode 100644
index 000000000000..c8b6cd0b7c3e
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/init.h
@@ -0,0 +1,40 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#ifndef __WL12XX_INIT_H__
25#define __WL12XX_INIT_H__
26
27#include "wl12xx.h"
28
29int wl12xx_hw_init_hwenc_config(struct wl12xx *wl);
30int wl12xx_hw_init_templates_config(struct wl12xx *wl);
31int wl12xx_hw_init_mem_config(struct wl12xx *wl);
32int wl12xx_hw_init_rx_config(struct wl12xx *wl, u32 config, u32 filter);
33int wl12xx_hw_init_phy_config(struct wl12xx *wl);
34int wl12xx_hw_init_beacon_filter(struct wl12xx *wl);
35int wl12xx_hw_init_pta(struct wl12xx *wl);
36int wl12xx_hw_init_energy_detection(struct wl12xx *wl);
37int wl12xx_hw_init_beacon_broadcast(struct wl12xx *wl);
38int wl12xx_hw_init_power_auth(struct wl12xx *wl);
39
40#endif
diff --git a/drivers/net/wireless/wl12xx/main.c b/drivers/net/wireless/wl12xx/main.c
new file mode 100644
index 000000000000..603d6114882e
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/main.c
@@ -0,0 +1,1358 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include <linux/module.h>
25#include <linux/interrupt.h>
26#include <linux/firmware.h>
27#include <linux/delay.h>
28#include <linux/irq.h>
29#include <linux/spi/spi.h>
30#include <linux/crc32.h>
31#include <linux/etherdevice.h>
32#include <linux/spi/wl12xx.h>
33
34#include "wl12xx.h"
35#include "wl12xx_80211.h"
36#include "reg.h"
37#include "wl1251.h"
38#include "spi.h"
39#include "event.h"
40#include "tx.h"
41#include "rx.h"
42#include "ps.h"
43#include "init.h"
44#include "debugfs.h"
45
46static void wl12xx_disable_interrupts(struct wl12xx *wl)
47{
48 disable_irq(wl->irq);
49}
50
51static void wl12xx_power_off(struct wl12xx *wl)
52{
53 wl->set_power(false);
54}
55
56static void wl12xx_power_on(struct wl12xx *wl)
57{
58 wl->set_power(true);
59}
60
61static irqreturn_t wl12xx_irq(int irq, void *cookie)
62{
63 struct wl12xx *wl;
64
65 wl12xx_debug(DEBUG_IRQ, "IRQ");
66
67 wl = cookie;
68
69 schedule_work(&wl->irq_work);
70
71 return IRQ_HANDLED;
72}
73
74static int wl12xx_fetch_firmware(struct wl12xx *wl)
75{
76 const struct firmware *fw;
77 int ret;
78
79 ret = request_firmware(&fw, wl->chip.fw_filename, &wl->spi->dev);
80
81 if (ret < 0) {
82 wl12xx_error("could not get firmware: %d", ret);
83 return ret;
84 }
85
86 if (fw->size % 4) {
87 wl12xx_error("firmware size is not multiple of 32 bits: %zu",
88 fw->size);
89 ret = -EILSEQ;
90 goto out;
91 }
92
93 wl->fw_len = fw->size;
94 wl->fw = kmalloc(wl->fw_len, GFP_KERNEL);
95
96 if (!wl->fw) {
97 wl12xx_error("could not allocate memory for the firmware");
98 ret = -ENOMEM;
99 goto out;
100 }
101
102 memcpy(wl->fw, fw->data, wl->fw_len);
103
104 ret = 0;
105
106out:
107 release_firmware(fw);
108
109 return ret;
110}
111
112static int wl12xx_fetch_nvs(struct wl12xx *wl)
113{
114 const struct firmware *fw;
115 int ret;
116
117 ret = request_firmware(&fw, wl->chip.nvs_filename, &wl->spi->dev);
118
119 if (ret < 0) {
120 wl12xx_error("could not get nvs file: %d", ret);
121 return ret;
122 }
123
124 if (fw->size % 4) {
125 wl12xx_error("nvs size is not multiple of 32 bits: %zu",
126 fw->size);
127 ret = -EILSEQ;
128 goto out;
129 }
130
131 wl->nvs_len = fw->size;
132 wl->nvs = kmalloc(wl->nvs_len, GFP_KERNEL);
133
134 if (!wl->nvs) {
135 wl12xx_error("could not allocate memory for the nvs file");
136 ret = -ENOMEM;
137 goto out;
138 }
139
140 memcpy(wl->nvs, fw->data, wl->nvs_len);
141
142 ret = 0;
143
144out:
145 release_firmware(fw);
146
147 return ret;
148}
149
150static void wl12xx_fw_wakeup(struct wl12xx *wl)
151{
152 u32 elp_reg;
153
154 elp_reg = ELPCTRL_WAKE_UP;
155 wl12xx_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, elp_reg);
156 elp_reg = wl12xx_read32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR);
157
158 if (!(elp_reg & ELPCTRL_WLAN_READY)) {
159 wl12xx_warning("WLAN not ready");
160 elp_reg = ELPCTRL_WAKE_UP_WLAN_READY;
161 wl12xx_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, elp_reg);
162 }
163}
164
165static int wl12xx_chip_wakeup(struct wl12xx *wl)
166{
167 int ret = 0;
168
169 wl12xx_power_on(wl);
170 msleep(wl->chip.power_on_sleep);
171 wl12xx_spi_reset(wl);
172 wl12xx_spi_init(wl);
173
174 /* We don't need a real memory partition here, because we only want
175 * to use the registers at this point. */
176 wl12xx_set_partition(wl,
177 0x00000000,
178 0x00000000,
179 REGISTERS_BASE,
180 REGISTERS_DOWN_SIZE);
181
182 /* ELP module wake up */
183 wl12xx_fw_wakeup(wl);
184
185 /* whal_FwCtrl_BootSm() */
186
187 /* 0. read chip id from CHIP_ID */
188 wl->chip.id = wl12xx_reg_read32(wl, CHIP_ID_B);
189
190 /* 1. check if chip id is valid */
191
192 switch (wl->chip.id) {
193 case CHIP_ID_1251_PG12:
194 wl12xx_debug(DEBUG_BOOT, "chip id 0x%x (1251 PG12)",
195 wl->chip.id);
196
197 wl1251_setup(wl);
198
199 break;
200 case CHIP_ID_1271_PG10:
201 case CHIP_ID_1251_PG10:
202 case CHIP_ID_1251_PG11:
203 default:
204 wl12xx_error("unsupported chip id: 0x%x", wl->chip.id);
205 ret = -ENODEV;
206 goto out;
207 }
208
209 if (wl->fw == NULL) {
210 ret = wl12xx_fetch_firmware(wl);
211 if (ret < 0)
212 goto out;
213 }
214
215 /* No NVS from netlink, try to get it from the filesystem */
216 if (wl->nvs == NULL) {
217 ret = wl12xx_fetch_nvs(wl);
218 if (ret < 0)
219 goto out;
220 }
221
222out:
223 return ret;
224}
225
226static void wl12xx_filter_work(struct work_struct *work)
227{
228 struct wl12xx *wl =
229 container_of(work, struct wl12xx, filter_work);
230 int ret;
231
232 mutex_lock(&wl->mutex);
233
234 if (wl->state == WL12XX_STATE_OFF)
235 goto out;
236
237 ret = wl12xx_cmd_join(wl, wl->bss_type, 1, 100, 0);
238 if (ret < 0)
239 goto out;
240
241out:
242 mutex_unlock(&wl->mutex);
243}
244
245int wl12xx_plt_start(struct wl12xx *wl)
246{
247 int ret;
248
249 wl12xx_notice("power up");
250
251 if (wl->state != WL12XX_STATE_OFF) {
252 wl12xx_error("cannot go into PLT state because not "
253 "in off state: %d", wl->state);
254 return -EBUSY;
255 }
256
257 wl->state = WL12XX_STATE_PLT;
258
259 ret = wl12xx_chip_wakeup(wl);
260 if (ret < 0)
261 return ret;
262
263 ret = wl->chip.op_boot(wl);
264 if (ret < 0)
265 return ret;
266
267 wl12xx_notice("firmware booted in PLT mode (%s)", wl->chip.fw_ver);
268
269 ret = wl->chip.op_plt_init(wl);
270 if (ret < 0)
271 return ret;
272
273 return 0;
274}
275
276int wl12xx_plt_stop(struct wl12xx *wl)
277{
278 wl12xx_notice("power down");
279
280 if (wl->state != WL12XX_STATE_PLT) {
281 wl12xx_error("cannot power down because not in PLT "
282 "state: %d", wl->state);
283 return -EBUSY;
284 }
285
286 wl12xx_disable_interrupts(wl);
287 wl12xx_power_off(wl);
288
289 wl->state = WL12XX_STATE_OFF;
290
291 return 0;
292}
293
294
295static int wl12xx_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
296{
297 struct wl12xx *wl = hw->priv;
298
299 skb_queue_tail(&wl->tx_queue, skb);
300
301 schedule_work(&wl->tx_work);
302
303 /*
304 * The workqueue is slow to process the tx_queue and we need stop
305 * the queue here, otherwise the queue will get too long.
306 */
307 if (skb_queue_len(&wl->tx_queue) >= WL12XX_TX_QUEUE_MAX_LENGTH) {
308 ieee80211_stop_queues(wl->hw);
309
310 /*
311 * FIXME: this is racy, the variable is not properly
312 * protected. Maybe fix this by removing the stupid
313 * variable altogether and checking the real queue state?
314 */
315 wl->tx_queue_stopped = true;
316 }
317
318 return NETDEV_TX_OK;
319}
320
321static int wl12xx_op_start(struct ieee80211_hw *hw)
322{
323 struct wl12xx *wl = hw->priv;
324 int ret = 0;
325
326 wl12xx_debug(DEBUG_MAC80211, "mac80211 start");
327
328 mutex_lock(&wl->mutex);
329
330 if (wl->state != WL12XX_STATE_OFF) {
331 wl12xx_error("cannot start because not in off state: %d",
332 wl->state);
333 ret = -EBUSY;
334 goto out;
335 }
336
337 ret = wl12xx_chip_wakeup(wl);
338 if (ret < 0)
339 return ret;
340
341 ret = wl->chip.op_boot(wl);
342 if (ret < 0)
343 goto out;
344
345 ret = wl->chip.op_hw_init(wl);
346 if (ret < 0)
347 goto out;
348
349 ret = wl12xx_acx_station_id(wl);
350 if (ret < 0)
351 goto out;
352
353 wl->state = WL12XX_STATE_ON;
354
355 wl12xx_info("firmware booted (%s)", wl->chip.fw_ver);
356
357out:
358 if (ret < 0)
359 wl12xx_power_off(wl);
360
361 mutex_unlock(&wl->mutex);
362
363 return ret;
364}
365
366static void wl12xx_op_stop(struct ieee80211_hw *hw)
367{
368 struct wl12xx *wl = hw->priv;
369
370 wl12xx_info("down");
371
372 wl12xx_debug(DEBUG_MAC80211, "mac80211 stop");
373
374 mutex_lock(&wl->mutex);
375
376 WARN_ON(wl->state != WL12XX_STATE_ON);
377
378 if (wl->scanning) {
379 mutex_unlock(&wl->mutex);
380 ieee80211_scan_completed(wl->hw, true);
381 mutex_lock(&wl->mutex);
382 wl->scanning = false;
383 }
384
385 wl->state = WL12XX_STATE_OFF;
386
387 wl12xx_disable_interrupts(wl);
388
389 mutex_unlock(&wl->mutex);
390
391 cancel_work_sync(&wl->irq_work);
392 cancel_work_sync(&wl->tx_work);
393 cancel_work_sync(&wl->filter_work);
394
395 mutex_lock(&wl->mutex);
396
397 /* let's notify MAC80211 about the remaining pending TX frames */
398 wl12xx_tx_flush(wl);
399
400 wl12xx_power_off(wl);
401
402 memset(wl->bssid, 0, ETH_ALEN);
403 wl->listen_int = 1;
404 wl->bss_type = MAX_BSS_TYPE;
405
406 wl->data_in_count = 0;
407 wl->rx_counter = 0;
408 wl->rx_handled = 0;
409 wl->rx_current_buffer = 0;
410 wl->rx_last_id = 0;
411 wl->next_tx_complete = 0;
412 wl->elp = false;
413 wl->psm = 0;
414 wl->tx_queue_stopped = false;
415 wl->power_level = WL12XX_DEFAULT_POWER_LEVEL;
416
417 wl12xx_debugfs_reset(wl);
418
419 mutex_unlock(&wl->mutex);
420}
421
422static int wl12xx_op_add_interface(struct ieee80211_hw *hw,
423 struct ieee80211_if_init_conf *conf)
424{
425 struct wl12xx *wl = hw->priv;
426 DECLARE_MAC_BUF(mac);
427 int ret = 0;
428
429 wl12xx_debug(DEBUG_MAC80211, "mac80211 add interface type %d mac %s",
430 conf->type, print_mac(mac, conf->mac_addr));
431
432 mutex_lock(&wl->mutex);
433
434 switch (conf->type) {
435 case NL80211_IFTYPE_STATION:
436 wl->bss_type = BSS_TYPE_STA_BSS;
437 break;
438 case NL80211_IFTYPE_ADHOC:
439 wl->bss_type = BSS_TYPE_IBSS;
440 break;
441 default:
442 ret = -EOPNOTSUPP;
443 goto out;
444 }
445
446 if (memcmp(wl->mac_addr, conf->mac_addr, ETH_ALEN)) {
447 memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
448 SET_IEEE80211_PERM_ADDR(wl->hw, wl->mac_addr);
449 ret = wl12xx_acx_station_id(wl);
450 if (ret < 0)
451 goto out;
452 }
453
454out:
455 mutex_unlock(&wl->mutex);
456 return ret;
457}
458
459static void wl12xx_op_remove_interface(struct ieee80211_hw *hw,
460 struct ieee80211_if_init_conf *conf)
461{
462 wl12xx_debug(DEBUG_MAC80211, "mac80211 remove interface");
463}
464
465static int wl12xx_build_null_data(struct wl12xx *wl)
466{
467 struct wl12xx_null_data_template template;
468
469 if (!is_zero_ether_addr(wl->bssid)) {
470 memcpy(template.header.da, wl->bssid, ETH_ALEN);
471 memcpy(template.header.bssid, wl->bssid, ETH_ALEN);
472 } else {
473 memset(template.header.da, 0xff, ETH_ALEN);
474 memset(template.header.bssid, 0xff, ETH_ALEN);
475 }
476
477 memcpy(template.header.sa, wl->mac_addr, ETH_ALEN);
478 template.header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_DATA |
479 IEEE80211_STYPE_NULLFUNC);
480
481 return wl12xx_cmd_template_set(wl, CMD_NULL_DATA, &template,
482 sizeof(template));
483
484}
485
486static int wl12xx_build_ps_poll(struct wl12xx *wl, u16 aid)
487{
488 struct wl12xx_ps_poll_template template;
489
490 memcpy(template.bssid, wl->bssid, ETH_ALEN);
491 memcpy(template.ta, wl->mac_addr, ETH_ALEN);
492 template.aid = aid;
493 template.fc = cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL);
494
495 return wl12xx_cmd_template_set(wl, CMD_PS_POLL, &template,
496 sizeof(template));
497
498}
499
500static int wl12xx_op_config(struct ieee80211_hw *hw, u32 changed)
501{
502 struct wl12xx *wl = hw->priv;
503 struct ieee80211_conf *conf = &hw->conf;
504 int channel, ret = 0;
505
506 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
507
508 wl12xx_debug(DEBUG_MAC80211, "mac80211 config ch %d psm %s power %d",
509 channel,
510 conf->flags & IEEE80211_CONF_PS ? "on" : "off",
511 conf->power_level);
512
513 mutex_lock(&wl->mutex);
514
515 if (channel != wl->channel) {
516 /* FIXME: use beacon interval provided by mac80211 */
517 ret = wl12xx_cmd_join(wl, wl->bss_type, 1, 100, 0);
518 if (ret < 0)
519 goto out;
520
521 wl->channel = channel;
522 }
523
524 ret = wl12xx_build_null_data(wl);
525 if (ret < 0)
526 goto out;
527
528 if (conf->flags & IEEE80211_CONF_PS && !wl->psm_requested) {
529 wl12xx_info("psm enabled");
530
531 wl->psm_requested = true;
532
533 /*
534 * We enter PSM only if we're already associated.
535 * If we're not, we'll enter it when joining an SSID,
536 * through the bss_info_changed() hook.
537 */
538 ret = wl12xx_ps_set_mode(wl, STATION_POWER_SAVE_MODE);
539 } else if (!(conf->flags & IEEE80211_CONF_PS) &&
540 wl->psm_requested) {
541 wl12xx_info("psm disabled");
542
543 wl->psm_requested = false;
544
545 if (wl->psm)
546 ret = wl12xx_ps_set_mode(wl, STATION_ACTIVE_MODE);
547 }
548
549 if (conf->power_level != wl->power_level) {
550 ret = wl12xx_acx_tx_power(wl, conf->power_level);
551 if (ret < 0)
552 goto out;
553
554 wl->power_level = conf->power_level;
555 }
556
557out:
558 mutex_unlock(&wl->mutex);
559 return ret;
560}
561
562#define WL12XX_SUPPORTED_FILTERS (FIF_PROMISC_IN_BSS | \
563 FIF_ALLMULTI | \
564 FIF_FCSFAIL | \
565 FIF_BCN_PRBRESP_PROMISC | \
566 FIF_CONTROL | \
567 FIF_OTHER_BSS)
568
569static void wl12xx_op_configure_filter(struct ieee80211_hw *hw,
570 unsigned int changed,
571 unsigned int *total,
572 int mc_count,
573 struct dev_addr_list *mc_list)
574{
575 struct wl12xx *wl = hw->priv;
576
577 wl12xx_debug(DEBUG_MAC80211, "mac80211 configure filter");
578
579 *total &= WL12XX_SUPPORTED_FILTERS;
580 changed &= WL12XX_SUPPORTED_FILTERS;
581
582 if (changed == 0)
583 /* no filters which we support changed */
584 return;
585
586 /* FIXME: wl->rx_config and wl->rx_filter are not protected */
587
588 wl->rx_config = WL12XX_DEFAULT_RX_CONFIG;
589 wl->rx_filter = WL12XX_DEFAULT_RX_FILTER;
590
591 if (*total & FIF_PROMISC_IN_BSS) {
592 wl->rx_config |= CFG_BSSID_FILTER_EN;
593 wl->rx_config |= CFG_RX_ALL_GOOD;
594 }
595 if (*total & FIF_ALLMULTI)
596 /*
597 * CFG_MC_FILTER_EN in rx_config needs to be 0 to receive
598 * all multicast frames
599 */
600 wl->rx_config &= ~CFG_MC_FILTER_EN;
601 if (*total & FIF_FCSFAIL)
602 wl->rx_filter |= CFG_RX_FCS_ERROR;
603 if (*total & FIF_BCN_PRBRESP_PROMISC) {
604 wl->rx_config &= ~CFG_BSSID_FILTER_EN;
605 wl->rx_config &= ~CFG_SSID_FILTER_EN;
606 }
607 if (*total & FIF_CONTROL)
608 wl->rx_filter |= CFG_RX_CTL_EN;
609 if (*total & FIF_OTHER_BSS)
610 wl->rx_filter &= ~CFG_BSSID_FILTER_EN;
611
612 /*
613 * FIXME: workqueues need to be properly cancelled on stop(), for
614 * now let's just disable changing the filter settings. They will
615 * be updated any on config().
616 */
617 /* schedule_work(&wl->filter_work); */
618}
619
620/* HW encryption */
621static int wl12xx_set_key_type(struct wl12xx *wl, struct acx_set_key *key,
622 enum set_key_cmd cmd,
623 struct ieee80211_key_conf *mac80211_key,
624 const u8 *addr)
625{
626 switch (mac80211_key->alg) {
627 case ALG_WEP:
628 if (is_broadcast_ether_addr(addr))
629 key->key_type = KEY_WEP_DEFAULT;
630 else
631 key->key_type = KEY_WEP_ADDR;
632
633 mac80211_key->hw_key_idx = mac80211_key->keyidx;
634 break;
635 case ALG_TKIP:
636 if (is_broadcast_ether_addr(addr))
637 key->key_type = KEY_TKIP_MIC_GROUP;
638 else
639 key->key_type = KEY_TKIP_MIC_PAIRWISE;
640
641 mac80211_key->hw_key_idx = mac80211_key->keyidx;
642 break;
643 case ALG_CCMP:
644 if (is_broadcast_ether_addr(addr))
645 key->key_type = KEY_AES_GROUP;
646 else
647 key->key_type = KEY_AES_PAIRWISE;
648 mac80211_key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
649 break;
650 default:
651 wl12xx_error("Unknown key algo 0x%x", mac80211_key->alg);
652 return -EOPNOTSUPP;
653 }
654
655 return 0;
656}
657
658static int wl12xx_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
659 struct ieee80211_vif *vif,
660 struct ieee80211_sta *sta,
661 struct ieee80211_key_conf *key)
662{
663 struct wl12xx *wl = hw->priv;
664 struct acx_set_key wl_key;
665 const u8 *addr;
666 int ret;
667
668 static const u8 bcast_addr[ETH_ALEN] =
669 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
670
671 wl12xx_debug(DEBUG_MAC80211, "mac80211 set key");
672
673 memset(&wl_key, 0, sizeof(wl_key));
674
675 addr = sta ? sta->addr : bcast_addr;
676
677 wl12xx_debug(DEBUG_CRYPT, "CMD: 0x%x", cmd);
678 wl12xx_dump(DEBUG_CRYPT, "ADDR: ", addr, ETH_ALEN);
679 wl12xx_debug(DEBUG_CRYPT, "Key: algo:0x%x, id:%d, len:%d flags 0x%x",
680 key->alg, key->keyidx, key->keylen, key->flags);
681 wl12xx_dump(DEBUG_CRYPT, "KEY: ", key->key, key->keylen);
682
683 mutex_lock(&wl->mutex);
684
685 switch (cmd) {
686 case SET_KEY:
687 wl_key.key_action = KEY_ADD_OR_REPLACE;
688 break;
689 case DISABLE_KEY:
690 wl_key.key_action = KEY_REMOVE;
691 break;
692 default:
693 wl12xx_error("Unsupported key cmd 0x%x", cmd);
694 break;
695 }
696
697 ret = wl12xx_set_key_type(wl, &wl_key, cmd, key, addr);
698 if (ret < 0) {
699 wl12xx_error("Set KEY type failed");
700 goto out;
701 }
702
703 if (wl_key.key_type != KEY_WEP_DEFAULT)
704 memcpy(wl_key.addr, addr, ETH_ALEN);
705
706 if ((wl_key.key_type == KEY_TKIP_MIC_GROUP) ||
707 (wl_key.key_type == KEY_TKIP_MIC_PAIRWISE)) {
708 /*
709 * We get the key in the following form:
710 * TKIP (16 bytes) - TX MIC (8 bytes) - RX MIC (8 bytes)
711 * but the target is expecting:
712 * TKIP - RX MIC - TX MIC
713 */
714 memcpy(wl_key.key, key->key, 16);
715 memcpy(wl_key.key + 16, key->key + 24, 8);
716 memcpy(wl_key.key + 24, key->key + 16, 8);
717
718 } else {
719 memcpy(wl_key.key, key->key, key->keylen);
720 }
721 wl_key.key_size = key->keylen;
722
723 wl_key.id = key->keyidx;
724 wl_key.ssid_profile = 0;
725
726 wl12xx_dump(DEBUG_CRYPT, "TARGET KEY: ", &wl_key, sizeof(wl_key));
727
728 if (wl12xx_cmd_send(wl, CMD_SET_KEYS, &wl_key, sizeof(wl_key)) < 0) {
729 wl12xx_error("Set KEY failed");
730 ret = -EOPNOTSUPP;
731 goto out;
732 }
733
734out:
735 mutex_unlock(&wl->mutex);
736 return ret;
737}
738
739static int wl12xx_build_basic_rates(char *rates)
740{
741 u8 index = 0;
742
743 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
744 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
745 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
746 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
747
748 return index;
749}
750
751static int wl12xx_build_extended_rates(char *rates)
752{
753 u8 index = 0;
754
755 rates[index++] = IEEE80211_OFDM_RATE_6MB;
756 rates[index++] = IEEE80211_OFDM_RATE_9MB;
757 rates[index++] = IEEE80211_OFDM_RATE_12MB;
758 rates[index++] = IEEE80211_OFDM_RATE_18MB;
759 rates[index++] = IEEE80211_OFDM_RATE_24MB;
760 rates[index++] = IEEE80211_OFDM_RATE_36MB;
761 rates[index++] = IEEE80211_OFDM_RATE_48MB;
762 rates[index++] = IEEE80211_OFDM_RATE_54MB;
763
764 return index;
765}
766
767
768static int wl12xx_build_probe_req(struct wl12xx *wl, u8 *ssid, size_t ssid_len)
769{
770 struct wl12xx_probe_req_template template;
771 struct wl12xx_ie_rates *rates;
772 char *ptr;
773 u16 size;
774
775 ptr = (char *)&template;
776 size = sizeof(struct ieee80211_header);
777
778 memset(template.header.da, 0xff, ETH_ALEN);
779 memset(template.header.bssid, 0xff, ETH_ALEN);
780 memcpy(template.header.sa, wl->mac_addr, ETH_ALEN);
781 template.header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
782
783 /* IEs */
784 /* SSID */
785 template.ssid.header.id = WLAN_EID_SSID;
786 template.ssid.header.len = ssid_len;
787 if (ssid_len && ssid)
788 memcpy(template.ssid.ssid, ssid, ssid_len);
789 size += sizeof(struct wl12xx_ie_header) + ssid_len;
790 ptr += size;
791
792 /* Basic Rates */
793 rates = (struct wl12xx_ie_rates *)ptr;
794 rates->header.id = WLAN_EID_SUPP_RATES;
795 rates->header.len = wl12xx_build_basic_rates(rates->rates);
796 size += sizeof(struct wl12xx_ie_header) + rates->header.len;
797 ptr += sizeof(struct wl12xx_ie_header) + rates->header.len;
798
799 /* Extended rates */
800 rates = (struct wl12xx_ie_rates *)ptr;
801 rates->header.id = WLAN_EID_EXT_SUPP_RATES;
802 rates->header.len = wl12xx_build_extended_rates(rates->rates);
803 size += sizeof(struct wl12xx_ie_header) + rates->header.len;
804
805 wl12xx_dump(DEBUG_SCAN, "PROBE REQ: ", &template, size);
806
807 return wl12xx_cmd_template_set(wl, CMD_PROBE_REQ, &template,
808 size);
809}
810
811static int wl12xx_hw_scan(struct wl12xx *wl, u8 *ssid, size_t len,
812 u8 active_scan, u8 high_prio, u8 num_channels,
813 u8 probe_requests)
814{
815 int i, ret;
816 u32 split_scan = 0;
817 u16 scan_options = 0;
818 struct cmd_scan *params;
819 struct wl12xx_command *cmd_answer;
820
821 if (wl->scanning)
822 return -EINVAL;
823
824 params = kzalloc(sizeof(*params), GFP_KERNEL);
825 if (!params)
826 return -ENOMEM;
827
828 params->params.rx_config_options = cpu_to_le32(CFG_RX_ALL_GOOD);
829 params->params.rx_filter_options =
830 cpu_to_le32(CFG_RX_PRSP_EN | CFG_RX_MGMT_EN | CFG_RX_BCN_EN);
831
832 /* High priority scan */
833 if (!active_scan)
834 scan_options |= SCAN_PASSIVE;
835 if (high_prio)
836 scan_options |= SCAN_PRIORITY_HIGH;
837 params->params.scan_options = scan_options;
838
839 params->params.num_channels = num_channels;
840 params->params.num_probe_requests = probe_requests;
841 params->params.tx_rate = cpu_to_le16(1 << 1); /* 2 Mbps */
842 params->params.tid_trigger = 0;
843
844 for (i = 0; i < num_channels; i++) {
845 params->channels[i].min_duration = cpu_to_le32(30000);
846 params->channels[i].max_duration = cpu_to_le32(60000);
847 memset(&params->channels[i].bssid_lsb, 0xff, 4);
848 memset(&params->channels[i].bssid_msb, 0xff, 2);
849 params->channels[i].early_termination = 0;
850 params->channels[i].tx_power_att = 0;
851 params->channels[i].channel = i + 1;
852 memset(params->channels[i].pad, 0, 3);
853 }
854
855 for (i = num_channels; i < SCAN_MAX_NUM_OF_CHANNELS; i++)
856 memset(&params->channels[i], 0,
857 sizeof(struct basic_scan_channel_parameters));
858
859 if (len && ssid) {
860 params->params.ssid_len = len;
861 memcpy(params->params.ssid, ssid, len);
862 } else {
863 params->params.ssid_len = 0;
864 memset(params->params.ssid, 0, 32);
865 }
866
867 ret = wl12xx_build_probe_req(wl, ssid, len);
868 if (ret < 0) {
869 wl12xx_error("PROBE request template failed");
870 goto out;
871 }
872
873 ret = wl12xx_cmd_send(wl, CMD_TRIGGER_SCAN_TO, &split_scan,
874 sizeof(u32));
875 if (ret < 0) {
876 wl12xx_error("Split SCAN failed");
877 goto out;
878 }
879
880 wl12xx_dump(DEBUG_SCAN, "SCAN: ", params, sizeof(*params));
881
882 wl->scanning = true;
883
884 ret = wl12xx_cmd_send(wl, CMD_SCAN, params, sizeof(*params));
885 if (ret < 0)
886 wl12xx_error("SCAN failed");
887
888 wl12xx_spi_mem_read(wl, wl->cmd_box_addr, params, sizeof(*params));
889
890 cmd_answer = (struct wl12xx_command *) params;
891 if (cmd_answer->status != CMD_STATUS_SUCCESS) {
892 wl12xx_error("TEST command answer error: %d",
893 cmd_answer->status);
894 wl->scanning = false;
895 ret = -EIO;
896 goto out;
897 }
898
899out:
900 kfree(params);
901 return ret;
902
903}
904
905static int wl12xx_op_hw_scan(struct ieee80211_hw *hw,
906 struct cfg80211_scan_request *req)
907{
908 struct wl12xx *wl = hw->priv;
909 int ret;
910 u8 *ssid = NULL;
911 size_t ssid_len = 0;
912
913 wl12xx_debug(DEBUG_MAC80211, "mac80211 hw scan");
914
915 if (req->n_ssids) {
916 ssid = req->ssids[0].ssid;
917 ssid_len = req->ssids[0].ssid_len;
918 }
919
920 mutex_lock(&wl->mutex);
921 ret = wl12xx_hw_scan(hw->priv, ssid, ssid_len, 1, 0, 13, 3);
922 mutex_unlock(&wl->mutex);
923
924 return ret;
925}
926
927static int wl12xx_op_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
928{
929 struct wl12xx *wl = hw->priv;
930 int ret;
931
932 ret = wl12xx_acx_rts_threshold(wl, (u16) value);
933
934 if (ret < 0)
935 wl12xx_warning("wl12xx_op_set_rts_threshold failed: %d", ret);
936
937 return ret;
938}
939
940static void wl12xx_op_bss_info_changed(struct ieee80211_hw *hw,
941 struct ieee80211_vif *vif,
942 struct ieee80211_bss_conf *bss_conf,
943 u32 changed)
944{
945 enum acx_ps_mode mode;
946 struct wl12xx *wl = hw->priv;
947 struct sk_buff *beacon;
948 int ret;
949
950 wl12xx_debug(DEBUG_MAC80211, "mac80211 bss info changed");
951
952 mutex_lock(&wl->mutex);
953
954 if (changed & BSS_CHANGED_ASSOC) {
955 if (bss_conf->assoc) {
956 wl->aid = bss_conf->aid;
957
958 ret = wl12xx_build_ps_poll(wl, wl->aid);
959 if (ret < 0)
960 goto out;
961
962 ret = wl12xx_acx_aid(wl, wl->aid);
963 if (ret < 0)
964 goto out;
965
966 /* If we want to go in PSM but we're not there yet */
967 if (wl->psm_requested && !wl->psm) {
968 mode = STATION_POWER_SAVE_MODE;
969 ret = wl12xx_ps_set_mode(wl, mode);
970 if (ret < 0)
971 goto out;
972 }
973 }
974 }
975 if (changed & BSS_CHANGED_ERP_SLOT) {
976 if (bss_conf->use_short_slot)
977 ret = wl12xx_acx_slot(wl, SLOT_TIME_SHORT);
978 else
979 ret = wl12xx_acx_slot(wl, SLOT_TIME_LONG);
980 if (ret < 0) {
981 wl12xx_warning("Set slot time failed %d", ret);
982 goto out;
983 }
984 }
985
986 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
987 if (bss_conf->use_short_preamble)
988 wl12xx_acx_set_preamble(wl, ACX_PREAMBLE_SHORT);
989 else
990 wl12xx_acx_set_preamble(wl, ACX_PREAMBLE_LONG);
991 }
992
993 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
994 if (bss_conf->use_cts_prot)
995 ret = wl12xx_acx_cts_protect(wl, CTSPROTECT_ENABLE);
996 else
997 ret = wl12xx_acx_cts_protect(wl, CTSPROTECT_DISABLE);
998 if (ret < 0) {
999 wl12xx_warning("Set ctsprotect failed %d", ret);
1000 goto out;
1001 }
1002 }
1003
1004 if (changed & BSS_CHANGED_BSSID) {
1005 memcpy(wl->bssid, bss_conf->bssid, ETH_ALEN);
1006
1007 ret = wl12xx_build_null_data(wl);
1008 if (ret < 0)
1009 goto out;
1010
1011 if (wl->bss_type != BSS_TYPE_IBSS) {
1012 ret = wl12xx_cmd_join(wl, wl->bss_type, 5, 100, 1);
1013 if (ret < 0)
1014 goto out;
1015 }
1016 }
1017
1018 if (changed & BSS_CHANGED_BEACON) {
1019 beacon = ieee80211_beacon_get(hw, vif);
1020 ret = wl12xx_cmd_template_set(wl, CMD_BEACON, beacon->data,
1021 beacon->len);
1022
1023 if (ret < 0) {
1024 dev_kfree_skb(beacon);
1025 goto out;
1026 }
1027
1028 ret = wl12xx_cmd_template_set(wl, CMD_PROBE_RESP, beacon->data,
1029 beacon->len);
1030
1031 dev_kfree_skb(beacon);
1032
1033 if (ret < 0)
1034 goto out;
1035
1036 ret = wl12xx_cmd_join(wl, wl->bss_type, 1, 100, 0);
1037
1038 if (ret < 0)
1039 goto out;
1040 }
1041
1042out:
1043 mutex_unlock(&wl->mutex);
1044}
1045
1046
1047/* can't be const, mac80211 writes to this */
1048static struct ieee80211_rate wl12xx_rates[] = {
1049 { .bitrate = 10,
1050 .hw_value = 0x1,
1051 .hw_value_short = 0x1, },
1052 { .bitrate = 20,
1053 .hw_value = 0x2,
1054 .hw_value_short = 0x2,
1055 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
1056 { .bitrate = 55,
1057 .hw_value = 0x4,
1058 .hw_value_short = 0x4,
1059 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
1060 { .bitrate = 110,
1061 .hw_value = 0x20,
1062 .hw_value_short = 0x20,
1063 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
1064 { .bitrate = 60,
1065 .hw_value = 0x8,
1066 .hw_value_short = 0x8, },
1067 { .bitrate = 90,
1068 .hw_value = 0x10,
1069 .hw_value_short = 0x10, },
1070 { .bitrate = 120,
1071 .hw_value = 0x40,
1072 .hw_value_short = 0x40, },
1073 { .bitrate = 180,
1074 .hw_value = 0x80,
1075 .hw_value_short = 0x80, },
1076 { .bitrate = 240,
1077 .hw_value = 0x200,
1078 .hw_value_short = 0x200, },
1079 { .bitrate = 360,
1080 .hw_value = 0x400,
1081 .hw_value_short = 0x400, },
1082 { .bitrate = 480,
1083 .hw_value = 0x800,
1084 .hw_value_short = 0x800, },
1085 { .bitrate = 540,
1086 .hw_value = 0x1000,
1087 .hw_value_short = 0x1000, },
1088};
1089
1090/* can't be const, mac80211 writes to this */
1091static struct ieee80211_channel wl12xx_channels[] = {
1092 { .hw_value = 1, .center_freq = 2412},
1093 { .hw_value = 2, .center_freq = 2417},
1094 { .hw_value = 3, .center_freq = 2422},
1095 { .hw_value = 4, .center_freq = 2427},
1096 { .hw_value = 5, .center_freq = 2432},
1097 { .hw_value = 6, .center_freq = 2437},
1098 { .hw_value = 7, .center_freq = 2442},
1099 { .hw_value = 8, .center_freq = 2447},
1100 { .hw_value = 9, .center_freq = 2452},
1101 { .hw_value = 10, .center_freq = 2457},
1102 { .hw_value = 11, .center_freq = 2462},
1103 { .hw_value = 12, .center_freq = 2467},
1104 { .hw_value = 13, .center_freq = 2472},
1105};
1106
1107/* can't be const, mac80211 writes to this */
1108static struct ieee80211_supported_band wl12xx_band_2ghz = {
1109 .channels = wl12xx_channels,
1110 .n_channels = ARRAY_SIZE(wl12xx_channels),
1111 .bitrates = wl12xx_rates,
1112 .n_bitrates = ARRAY_SIZE(wl12xx_rates),
1113};
1114
1115static const struct ieee80211_ops wl12xx_ops = {
1116 .start = wl12xx_op_start,
1117 .stop = wl12xx_op_stop,
1118 .add_interface = wl12xx_op_add_interface,
1119 .remove_interface = wl12xx_op_remove_interface,
1120 .config = wl12xx_op_config,
1121 .configure_filter = wl12xx_op_configure_filter,
1122 .tx = wl12xx_op_tx,
1123 .set_key = wl12xx_op_set_key,
1124 .hw_scan = wl12xx_op_hw_scan,
1125 .bss_info_changed = wl12xx_op_bss_info_changed,
1126 .set_rts_threshold = wl12xx_op_set_rts_threshold,
1127};
1128
1129static int wl12xx_register_hw(struct wl12xx *wl)
1130{
1131 int ret;
1132
1133 if (wl->mac80211_registered)
1134 return 0;
1135
1136 SET_IEEE80211_PERM_ADDR(wl->hw, wl->mac_addr);
1137
1138 ret = ieee80211_register_hw(wl->hw);
1139 if (ret < 0) {
1140 wl12xx_error("unable to register mac80211 hw: %d", ret);
1141 return ret;
1142 }
1143
1144 wl->mac80211_registered = true;
1145
1146 wl12xx_notice("loaded");
1147
1148 return 0;
1149}
1150
1151static int wl12xx_init_ieee80211(struct wl12xx *wl)
1152{
1153 /* The tx descriptor buffer and the TKIP space */
1154 wl->hw->extra_tx_headroom = sizeof(struct tx_double_buffer_desc)
1155 + WL12XX_TKIP_IV_SPACE;
1156
1157 /* unit us */
1158 /* FIXME: find a proper value */
1159 wl->hw->channel_change_time = 10000;
1160
1161 wl->hw->flags = IEEE80211_HW_SIGNAL_DBM |
1162 IEEE80211_HW_NOISE_DBM;
1163
1164 wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1165 wl->hw->wiphy->max_scan_ssids = 1;
1166 wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wl12xx_band_2ghz;
1167
1168 SET_IEEE80211_DEV(wl->hw, &wl->spi->dev);
1169
1170 return 0;
1171}
1172
1173#define WL12XX_DEFAULT_CHANNEL 1
1174static int __devinit wl12xx_probe(struct spi_device *spi)
1175{
1176 struct wl12xx_platform_data *pdata;
1177 struct ieee80211_hw *hw;
1178 struct wl12xx *wl;
1179 int ret, i;
1180 static const u8 nokia_oui[3] = {0x00, 0x1f, 0xdf};
1181
1182 pdata = spi->dev.platform_data;
1183 if (!pdata) {
1184 wl12xx_error("no platform data");
1185 return -ENODEV;
1186 }
1187
1188 hw = ieee80211_alloc_hw(sizeof(*wl), &wl12xx_ops);
1189 if (!hw) {
1190 wl12xx_error("could not alloc ieee80211_hw");
1191 return -ENOMEM;
1192 }
1193
1194 wl = hw->priv;
1195 memset(wl, 0, sizeof(*wl));
1196
1197 wl->hw = hw;
1198 dev_set_drvdata(&spi->dev, wl);
1199 wl->spi = spi;
1200
1201 wl->data_in_count = 0;
1202
1203 skb_queue_head_init(&wl->tx_queue);
1204
1205 INIT_WORK(&wl->tx_work, wl12xx_tx_work);
1206 INIT_WORK(&wl->filter_work, wl12xx_filter_work);
1207 wl->channel = WL12XX_DEFAULT_CHANNEL;
1208 wl->scanning = false;
1209 wl->default_key = 0;
1210 wl->listen_int = 1;
1211 wl->rx_counter = 0;
1212 wl->rx_handled = 0;
1213 wl->rx_current_buffer = 0;
1214 wl->rx_last_id = 0;
1215 wl->rx_config = WL12XX_DEFAULT_RX_CONFIG;
1216 wl->rx_filter = WL12XX_DEFAULT_RX_FILTER;
1217 wl->elp = false;
1218 wl->psm = 0;
1219 wl->psm_requested = false;
1220 wl->tx_queue_stopped = false;
1221 wl->power_level = WL12XX_DEFAULT_POWER_LEVEL;
1222
1223 /* We use the default power on sleep time until we know which chip
1224 * we're using */
1225 wl->chip.power_on_sleep = WL12XX_DEFAULT_POWER_ON_SLEEP;
1226
1227 for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++)
1228 wl->tx_frames[i] = NULL;
1229
1230 wl->next_tx_complete = 0;
1231
1232 /*
1233 * In case our MAC address is not correctly set,
1234 * we use a random but Nokia MAC.
1235 */
1236 memcpy(wl->mac_addr, nokia_oui, 3);
1237 get_random_bytes(wl->mac_addr + 3, 3);
1238
1239 wl->state = WL12XX_STATE_OFF;
1240 mutex_init(&wl->mutex);
1241
1242 wl->tx_mgmt_frm_rate = DEFAULT_HW_GEN_TX_RATE;
1243 wl->tx_mgmt_frm_mod = DEFAULT_HW_GEN_MODULATION_TYPE;
1244
1245 /* This is the only SPI value that we need to set here, the rest
1246 * comes from the board-peripherals file */
1247 spi->bits_per_word = 32;
1248
1249 ret = spi_setup(spi);
1250 if (ret < 0) {
1251 wl12xx_error("spi_setup failed");
1252 goto out_free;
1253 }
1254
1255 wl->set_power = pdata->set_power;
1256 if (!wl->set_power) {
1257 wl12xx_error("set power function missing in platform data");
1258 return -ENODEV;
1259 }
1260
1261 wl->irq = spi->irq;
1262 if (wl->irq < 0) {
1263 wl12xx_error("irq missing in platform data");
1264 return -ENODEV;
1265 }
1266
1267 ret = request_irq(wl->irq, wl12xx_irq, 0, DRIVER_NAME, wl);
1268 if (ret < 0) {
1269 wl12xx_error("request_irq() failed: %d", ret);
1270 goto out_free;
1271 }
1272
1273 set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING);
1274
1275 disable_irq(wl->irq);
1276
1277 ret = wl12xx_init_ieee80211(wl);
1278 if (ret)
1279 goto out_irq;
1280
1281 ret = wl12xx_register_hw(wl);
1282 if (ret)
1283 goto out_irq;
1284
1285 wl12xx_debugfs_init(wl);
1286
1287 wl12xx_notice("initialized");
1288
1289 return 0;
1290
1291 out_irq:
1292 free_irq(wl->irq, wl);
1293
1294 out_free:
1295 ieee80211_free_hw(hw);
1296
1297 return ret;
1298}
1299
1300static int __devexit wl12xx_remove(struct spi_device *spi)
1301{
1302 struct wl12xx *wl = dev_get_drvdata(&spi->dev);
1303
1304 ieee80211_unregister_hw(wl->hw);
1305
1306 wl12xx_debugfs_exit(wl);
1307
1308 free_irq(wl->irq, wl);
1309 kfree(wl->target_mem_map);
1310 kfree(wl->data_path);
1311 kfree(wl->fw);
1312 wl->fw = NULL;
1313 kfree(wl->nvs);
1314 wl->nvs = NULL;
1315 ieee80211_free_hw(wl->hw);
1316
1317 return 0;
1318}
1319
1320
1321static struct spi_driver wl12xx_spi_driver = {
1322 .driver = {
1323 .name = "wl12xx",
1324 .bus = &spi_bus_type,
1325 .owner = THIS_MODULE,
1326 },
1327
1328 .probe = wl12xx_probe,
1329 .remove = __devexit_p(wl12xx_remove),
1330};
1331
1332static int __init wl12xx_init(void)
1333{
1334 int ret;
1335
1336 ret = spi_register_driver(&wl12xx_spi_driver);
1337 if (ret < 0) {
1338 wl12xx_error("failed to register spi driver: %d", ret);
1339 goto out;
1340 }
1341
1342out:
1343 return ret;
1344}
1345
1346static void __exit wl12xx_exit(void)
1347{
1348 spi_unregister_driver(&wl12xx_spi_driver);
1349
1350 wl12xx_notice("unloaded");
1351}
1352
1353module_init(wl12xx_init);
1354module_exit(wl12xx_exit);
1355
1356MODULE_LICENSE("GPL");
1357MODULE_AUTHOR("Kalle Valo <Kalle.Valo@nokia.com>, "
1358 "Luciano Coelho <luciano.coelho@nokia.com>");
diff --git a/drivers/net/wireless/wl12xx/ps.c b/drivers/net/wireless/wl12xx/ps.c
new file mode 100644
index 000000000000..83a10117330b
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/ps.c
@@ -0,0 +1,151 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include "reg.h"
25#include "ps.h"
26#include "spi.h"
27
28#define WL12XX_WAKEUP_TIMEOUT 2000
29
30/* Routines to toggle sleep mode while in ELP */
31void wl12xx_ps_elp_sleep(struct wl12xx *wl)
32{
33 if (wl->elp || !wl->psm)
34 return;
35
36 wl12xx_debug(DEBUG_PSM, "chip to elp");
37
38 wl12xx_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_SLEEP);
39
40 wl->elp = true;
41}
42
43int wl12xx_ps_elp_wakeup(struct wl12xx *wl)
44{
45 unsigned long timeout;
46 u32 elp_reg;
47
48 if (!wl->elp)
49 return 0;
50
51 wl12xx_debug(DEBUG_PSM, "waking up chip from elp");
52
53 timeout = jiffies + msecs_to_jiffies(WL12XX_WAKEUP_TIMEOUT);
54
55 wl12xx_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_WAKE_UP);
56
57 elp_reg = wl12xx_read32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR);
58
59 /*
60 * FIXME: we should wait for irq from chip but, as a temporary
61 * solution to simplify locking, let's poll instead
62 */
63 while (!(elp_reg & ELPCTRL_WLAN_READY)) {
64 if (time_after(jiffies, timeout)) {
65 wl12xx_error("elp wakeup timeout");
66 return -ETIMEDOUT;
67 }
68 msleep(1);
69 elp_reg = wl12xx_read32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR);
70 }
71
72 wl12xx_debug(DEBUG_PSM, "wakeup time: %u ms",
73 jiffies_to_msecs(jiffies) -
74 (jiffies_to_msecs(timeout) - WL12XX_WAKEUP_TIMEOUT));
75
76 wl->elp = false;
77
78 return 0;
79}
80
81static int wl12xx_ps_set_elp(struct wl12xx *wl, bool enable)
82{
83 int ret;
84
85 if (enable) {
86 wl12xx_debug(DEBUG_PSM, "sleep auth psm/elp");
87
88 /*
89 * FIXME: we should PSM_ELP, but because of firmware wakeup
90 * problems let's use only PSM_PS
91 */
92 ret = wl12xx_acx_sleep_auth(wl, WL12XX_PSM_PS);
93 if (ret < 0)
94 return ret;
95
96 wl12xx_ps_elp_sleep(wl);
97 } else {
98 wl12xx_debug(DEBUG_PSM, "sleep auth cam");
99
100 /*
101 * When the target is in ELP, we can only
102 * access the ELP control register. Thus,
103 * we have to wake the target up before
104 * changing the power authorization.
105 */
106
107 wl12xx_ps_elp_wakeup(wl);
108
109 ret = wl12xx_acx_sleep_auth(wl, WL12XX_PSM_CAM);
110 if (ret < 0)
111 return ret;
112 }
113
114 return 0;
115}
116
117int wl12xx_ps_set_mode(struct wl12xx *wl, enum acx_ps_mode mode)
118{
119 int ret;
120
121 switch (mode) {
122 case STATION_POWER_SAVE_MODE:
123 wl12xx_debug(DEBUG_PSM, "entering psm");
124 ret = wl12xx_cmd_ps_mode(wl, STATION_POWER_SAVE_MODE);
125 if (ret < 0)
126 return ret;
127
128 ret = wl12xx_ps_set_elp(wl, true);
129 if (ret < 0)
130 return ret;
131
132 wl->psm = 1;
133 break;
134 case STATION_ACTIVE_MODE:
135 default:
136 wl12xx_debug(DEBUG_PSM, "leaving psm");
137 ret = wl12xx_ps_set_elp(wl, false);
138 if (ret < 0)
139 return ret;
140
141 ret = wl12xx_cmd_ps_mode(wl, STATION_ACTIVE_MODE);
142 if (ret < 0)
143 return ret;
144
145 wl->psm = 0;
146 break;
147 }
148
149 return ret;
150}
151
diff --git a/drivers/net/wireless/wl12xx/ps.h b/drivers/net/wireless/wl12xx/ps.h
new file mode 100644
index 000000000000..5d7c52553830
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/ps.h
@@ -0,0 +1,36 @@
1#ifndef __WL12XX_PS_H__
2#define __WL12XX_PS_H__
3
4/*
5 * This file is part of wl12xx
6 *
7 * Copyright (c) 1998-2007 Texas Instruments Incorporated
8 * Copyright (C) 2008 Nokia Corporation
9 *
10 * Contact: Kalle Valo <kalle.valo@nokia.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 *
26 */
27
28#include "wl12xx.h"
29#include "acx.h"
30
31int wl12xx_ps_set_mode(struct wl12xx *wl, enum acx_ps_mode mode);
32void wl12xx_ps_elp_sleep(struct wl12xx *wl);
33int wl12xx_ps_elp_wakeup(struct wl12xx *wl);
34
35
36#endif /* __WL12XX_PS_H__ */
diff --git a/drivers/net/wireless/wl12xx/reg.h b/drivers/net/wireless/wl12xx/reg.h
new file mode 100644
index 000000000000..e421643215cd
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/reg.h
@@ -0,0 +1,745 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __REG_H__
26#define __REG_H__
27
28#include <linux/bitops.h>
29#include "wl12xx.h"
30
31#define REGISTERS_BASE 0x00300000
32#define DRPW_BASE 0x00310000
33
34#define REGISTERS_DOWN_SIZE 0x00008800
35#define REGISTERS_WORK_SIZE 0x0000b000
36
37#define HW_ACCESS_ELP_CTRL_REG_ADDR 0x1FFFC
38
39/* ELP register commands */
40#define ELPCTRL_WAKE_UP 0x1
41#define ELPCTRL_WAKE_UP_WLAN_READY 0x5
42#define ELPCTRL_SLEEP 0x0
43/* ELP WLAN_READY bit */
44#define ELPCTRL_WLAN_READY 0x2
45
46/*
47 * Interrupt registers.
48 * 64 bit interrupt sources registers ws ced.
49 * sme interupts were removed and new ones were added.
50 * Order was changed.
51 */
52#define FIQ_MASK (REGISTERS_BASE + 0x0400)
53#define FIQ_MASK_L (REGISTERS_BASE + 0x0400)
54#define FIQ_MASK_H (REGISTERS_BASE + 0x0404)
55#define FIQ_MASK_SET (REGISTERS_BASE + 0x0408)
56#define FIQ_MASK_SET_L (REGISTERS_BASE + 0x0408)
57#define FIQ_MASK_SET_H (REGISTERS_BASE + 0x040C)
58#define FIQ_MASK_CLR (REGISTERS_BASE + 0x0410)
59#define FIQ_MASK_CLR_L (REGISTERS_BASE + 0x0410)
60#define FIQ_MASK_CLR_H (REGISTERS_BASE + 0x0414)
61#define IRQ_MASK (REGISTERS_BASE + 0x0418)
62#define IRQ_MASK_L (REGISTERS_BASE + 0x0418)
63#define IRQ_MASK_H (REGISTERS_BASE + 0x041C)
64#define IRQ_MASK_SET (REGISTERS_BASE + 0x0420)
65#define IRQ_MASK_SET_L (REGISTERS_BASE + 0x0420)
66#define IRQ_MASK_SET_H (REGISTERS_BASE + 0x0424)
67#define IRQ_MASK_CLR (REGISTERS_BASE + 0x0428)
68#define IRQ_MASK_CLR_L (REGISTERS_BASE + 0x0428)
69#define IRQ_MASK_CLR_H (REGISTERS_BASE + 0x042C)
70#define ECPU_MASK (REGISTERS_BASE + 0x0448)
71#define FIQ_STS_L (REGISTERS_BASE + 0x044C)
72#define FIQ_STS_H (REGISTERS_BASE + 0x0450)
73#define IRQ_STS_L (REGISTERS_BASE + 0x0454)
74#define IRQ_STS_H (REGISTERS_BASE + 0x0458)
75#define INT_STS_ND (REGISTERS_BASE + 0x0464)
76#define INT_STS_RAW_L (REGISTERS_BASE + 0x0464)
77#define INT_STS_RAW_H (REGISTERS_BASE + 0x0468)
78#define INT_STS_CLR (REGISTERS_BASE + 0x04B4)
79#define INT_STS_CLR_L (REGISTERS_BASE + 0x04B4)
80#define INT_STS_CLR_H (REGISTERS_BASE + 0x04B8)
81#define INT_ACK (REGISTERS_BASE + 0x046C)
82#define INT_ACK_L (REGISTERS_BASE + 0x046C)
83#define INT_ACK_H (REGISTERS_BASE + 0x0470)
84#define INT_TRIG (REGISTERS_BASE + 0x0474)
85#define INT_TRIG_L (REGISTERS_BASE + 0x0474)
86#define INT_TRIG_H (REGISTERS_BASE + 0x0478)
87#define HOST_STS_L (REGISTERS_BASE + 0x045C)
88#define HOST_STS_H (REGISTERS_BASE + 0x0460)
89#define HOST_MASK (REGISTERS_BASE + 0x0430)
90#define HOST_MASK_L (REGISTERS_BASE + 0x0430)
91#define HOST_MASK_H (REGISTERS_BASE + 0x0434)
92#define HOST_MASK_SET (REGISTERS_BASE + 0x0438)
93#define HOST_MASK_SET_L (REGISTERS_BASE + 0x0438)
94#define HOST_MASK_SET_H (REGISTERS_BASE + 0x043C)
95#define HOST_MASK_CLR (REGISTERS_BASE + 0x0440)
96#define HOST_MASK_CLR_L (REGISTERS_BASE + 0x0440)
97#define HOST_MASK_CLR_H (REGISTERS_BASE + 0x0444)
98
99/* Host Interrupts*/
100#define HINT_MASK (REGISTERS_BASE + 0x0494)
101#define HINT_MASK_SET (REGISTERS_BASE + 0x0498)
102#define HINT_MASK_CLR (REGISTERS_BASE + 0x049C)
103#define HINT_STS_ND_MASKED (REGISTERS_BASE + 0x04A0)
104/*1150 spec calls this HINT_STS_RAW*/
105#define HINT_STS_ND (REGISTERS_BASE + 0x04B0)
106#define HINT_STS_CLR (REGISTERS_BASE + 0x04A4)
107#define HINT_ACK (REGISTERS_BASE + 0x04A8)
108#define HINT_TRIG (REGISTERS_BASE + 0x04AC)
109
110/* Device Configuration registers*/
111#define SOR_CFG (REGISTERS_BASE + 0x0800)
112#define ECPU_CTRL (REGISTERS_BASE + 0x0804)
113#define HI_CFG (REGISTERS_BASE + 0x0808)
114#define EE_START (REGISTERS_BASE + 0x080C)
115
116#define CHIP_ID_B (REGISTERS_BASE + 0x5674)
117
118#define CHIP_ID_1251_PG10 (0x7010101)
119#define CHIP_ID_1251_PG11 (0x7020101)
120#define CHIP_ID_1251_PG12 (0x7030101)
121
122#define ENABLE (REGISTERS_BASE + 0x5450)
123
124/* Power Management registers */
125#define ELP_CFG_MODE (REGISTERS_BASE + 0x5804)
126#define ELP_CMD (REGISTERS_BASE + 0x5808)
127#define PLL_CAL_TIME (REGISTERS_BASE + 0x5810)
128#define CLK_REQ_TIME (REGISTERS_BASE + 0x5814)
129#define CLK_BUF_TIME (REGISTERS_BASE + 0x5818)
130
131#define CFG_PLL_SYNC_CNT (REGISTERS_BASE + 0x5820)
132
133/* Scratch Pad registers*/
134#define SCR_PAD0 (REGISTERS_BASE + 0x5608)
135#define SCR_PAD1 (REGISTERS_BASE + 0x560C)
136#define SCR_PAD2 (REGISTERS_BASE + 0x5610)
137#define SCR_PAD3 (REGISTERS_BASE + 0x5614)
138#define SCR_PAD4 (REGISTERS_BASE + 0x5618)
139#define SCR_PAD4_SET (REGISTERS_BASE + 0x561C)
140#define SCR_PAD4_CLR (REGISTERS_BASE + 0x5620)
141#define SCR_PAD5 (REGISTERS_BASE + 0x5624)
142#define SCR_PAD5_SET (REGISTERS_BASE + 0x5628)
143#define SCR_PAD5_CLR (REGISTERS_BASE + 0x562C)
144#define SCR_PAD6 (REGISTERS_BASE + 0x5630)
145#define SCR_PAD7 (REGISTERS_BASE + 0x5634)
146#define SCR_PAD8 (REGISTERS_BASE + 0x5638)
147#define SCR_PAD9 (REGISTERS_BASE + 0x563C)
148
149/* Spare registers*/
150#define SPARE_A1 (REGISTERS_BASE + 0x0994)
151#define SPARE_A2 (REGISTERS_BASE + 0x0998)
152#define SPARE_A3 (REGISTERS_BASE + 0x099C)
153#define SPARE_A4 (REGISTERS_BASE + 0x09A0)
154#define SPARE_A5 (REGISTERS_BASE + 0x09A4)
155#define SPARE_A6 (REGISTERS_BASE + 0x09A8)
156#define SPARE_A7 (REGISTERS_BASE + 0x09AC)
157#define SPARE_A8 (REGISTERS_BASE + 0x09B0)
158#define SPARE_B1 (REGISTERS_BASE + 0x5420)
159#define SPARE_B2 (REGISTERS_BASE + 0x5424)
160#define SPARE_B3 (REGISTERS_BASE + 0x5428)
161#define SPARE_B4 (REGISTERS_BASE + 0x542C)
162#define SPARE_B5 (REGISTERS_BASE + 0x5430)
163#define SPARE_B6 (REGISTERS_BASE + 0x5434)
164#define SPARE_B7 (REGISTERS_BASE + 0x5438)
165#define SPARE_B8 (REGISTERS_BASE + 0x543C)
166
167enum wl12xx_acx_int_reg {
168 ACX_REG_INTERRUPT_TRIG,
169 ACX_REG_INTERRUPT_TRIG_H,
170
171/*=============================================
172 Host Interrupt Mask Register - 32bit (RW)
173 ------------------------------------------
174 Setting a bit in this register masks the
175 corresponding interrupt to the host.
176 0 - RX0 - Rx first dubble buffer Data Interrupt
177 1 - TXD - Tx Data Interrupt
178 2 - TXXFR - Tx Transfer Interrupt
179 3 - RX1 - Rx second dubble buffer Data Interrupt
180 4 - RXXFR - Rx Transfer Interrupt
181 5 - EVENT_A - Event Mailbox interrupt
182 6 - EVENT_B - Event Mailbox interrupt
183 7 - WNONHST - Wake On Host Interrupt
184 8 - TRACE_A - Debug Trace interrupt
185 9 - TRACE_B - Debug Trace interrupt
186 10 - CDCMP - Command Complete Interrupt
187 11 -
188 12 -
189 13 -
190 14 - ICOMP - Initialization Complete Interrupt
191 16 - SG SE - Soft Gemini - Sense enable interrupt
192 17 - SG SD - Soft Gemini - Sense disable interrupt
193 18 - -
194 19 - -
195 20 - -
196 21- -
197 Default: 0x0001
198*==============================================*/
199 ACX_REG_INTERRUPT_MASK,
200
201/*=============================================
202 Host Interrupt Mask Set 16bit, (Write only)
203 ------------------------------------------
204 Setting a bit in this register sets
205 the corresponding bin in ACX_HINT_MASK register
206 without effecting the mask
207 state of other bits (0 = no effect).
208==============================================*/
209 ACX_REG_HINT_MASK_SET,
210
211/*=============================================
212 Host Interrupt Mask Clear 16bit,(Write only)
213 ------------------------------------------
214 Setting a bit in this register clears
215 the corresponding bin in ACX_HINT_MASK register
216 without effecting the mask
217 state of other bits (0 = no effect).
218=============================================*/
219 ACX_REG_HINT_MASK_CLR,
220
221/*=============================================
222 Host Interrupt Status Nondestructive Read
223 16bit,(Read only)
224 ------------------------------------------
225 The host can read this register to determine
226 which interrupts are active.
227 Reading this register doesn't
228 effect its content.
229=============================================*/
230 ACX_REG_INTERRUPT_NO_CLEAR,
231
232/*=============================================
233 Host Interrupt Status Clear on Read Register
234 16bit,(Read only)
235 ------------------------------------------
236 The host can read this register to determine
237 which interrupts are active.
238 Reading this register clears it,
239 thus making all interrupts inactive.
240==============================================*/
241 ACX_REG_INTERRUPT_CLEAR,
242
243/*=============================================
244 Host Interrupt Acknowledge Register
245 16bit,(Write only)
246 ------------------------------------------
247 The host can set individual bits in this
248 register to clear (acknowledge) the corresp.
249 interrupt status bits in the HINT_STS_CLR and
250 HINT_STS_ND registers, thus making the
251 assotiated interrupt inactive. (0-no effect)
252==============================================*/
253 ACX_REG_INTERRUPT_ACK,
254
255/*===============================================
256 Host Software Reset - 32bit RW
257 ------------------------------------------
258 [31:1] Reserved
259 0 SOFT_RESET Soft Reset - When this bit is set,
260 it holds the Wlan hardware in a soft reset state.
261 This reset disables all MAC and baseband processor
262 clocks except the CardBus/PCI interface clock.
263 It also initializes all MAC state machines except
264 the host interface. It does not reload the
265 contents of the EEPROM. When this bit is cleared
266 (not self-clearing), the Wlan hardware
267 exits the software reset state.
268===============================================*/
269 ACX_REG_SLV_SOFT_RESET,
270
271/*===============================================
272 EEPROM Burst Read Start - 32bit RW
273 ------------------------------------------
274 [31:1] Reserved
275 0 ACX_EE_START - EEPROM Burst Read Start 0
276 Setting this bit starts a burst read from
277 the external EEPROM.
278 If this bit is set (after reset) before an EEPROM read/write,
279 the burst read starts at EEPROM address 0.
280 Otherwise, it starts at the address
281 following the address of the previous access.
282 TheWlan hardware hardware clears this bit automatically.
283
284 Default: 0x00000000
285*================================================*/
286 ACX_REG_EE_START,
287
288/* Embedded ARM CPU Control */
289
290/*===============================================
291 Halt eCPU - 32bit RW
292 ------------------------------------------
293 0 HALT_ECPU Halt Embedded CPU - This bit is the
294 compliment of bit 1 (MDATA2) in the SOR_CFG register.
295 During a hardware reset, this bit holds
296 the inverse of MDATA2.
297 When downloading firmware from the host,
298 set this bit (pull down MDATA2).
299 The host clears this bit after downloading the firmware into
300 zero-wait-state SSRAM.
301 When loading firmware from Flash, clear this bit (pull up MDATA2)
302 so that the eCPU can run the bootloader code in Flash
303 HALT_ECPU eCPU State
304 --------------------
305 1 halt eCPU
306 0 enable eCPU
307 ===============================================*/
308 ACX_REG_ECPU_CONTROL,
309
310 ACX_REG_TABLE_LEN
311};
312
313#define ACX_SLV_SOFT_RESET_BIT BIT(1)
314#define ACX_REG_EEPROM_START_BIT BIT(1)
315
316/* Command/Information Mailbox Pointers */
317
318/*===============================================
319 Command Mailbox Pointer - 32bit RW
320 ------------------------------------------
321 This register holds the start address of
322 the command mailbox located in the Wlan hardware memory.
323 The host must read this pointer after a reset to
324 find the location of the command mailbox.
325 The Wlan hardware initializes the command mailbox
326 pointer with the default address of the command mailbox.
327 The command mailbox pointer is not valid until after
328 the host receives the Init Complete interrupt from
329 the Wlan hardware.
330 ===============================================*/
331#define REG_COMMAND_MAILBOX_PTR (SCR_PAD0)
332
333/*===============================================
334 Information Mailbox Pointer - 32bit RW
335 ------------------------------------------
336 This register holds the start address of
337 the information mailbox located in the Wlan hardware memory.
338 The host must read this pointer after a reset to find
339 the location of the information mailbox.
340 The Wlan hardware initializes the information mailbox pointer
341 with the default address of the information mailbox.
342 The information mailbox pointer is not valid
343 until after the host receives the Init Complete interrupt from
344 the Wlan hardware.
345 ===============================================*/
346#define REG_EVENT_MAILBOX_PTR (SCR_PAD1)
347
348
349/* Misc */
350
351#define REG_ENABLE_TX_RX (ENABLE)
352/*
353 * Rx configuration (filter) information element
354 * ---------------------------------------------
355 */
356#define REG_RX_CONFIG (RX_CFG)
357#define REG_RX_FILTER (RX_FILTER_CFG)
358
359
360#define RX_CFG_ENABLE_PHY_HEADER_PLCP 0x0002
361
362/* promiscuous - receives all valid frames */
363#define RX_CFG_PROMISCUOUS 0x0008
364
365/* receives frames from any BSSID */
366#define RX_CFG_BSSID 0x0020
367
368/* receives frames destined to any MAC address */
369#define RX_CFG_MAC 0x0010
370
371#define RX_CFG_ENABLE_ONLY_MY_DEST_MAC 0x0010
372#define RX_CFG_ENABLE_ANY_DEST_MAC 0x0000
373#define RX_CFG_ENABLE_ONLY_MY_BSSID 0x0020
374#define RX_CFG_ENABLE_ANY_BSSID 0x0000
375
376/* discards all broadcast frames */
377#define RX_CFG_DISABLE_BCAST 0x0200
378
379#define RX_CFG_ENABLE_ONLY_MY_SSID 0x0400
380#define RX_CFG_ENABLE_RX_CMPLT_FCS_ERROR 0x0800
381#define RX_CFG_COPY_RX_STATUS 0x2000
382#define RX_CFG_TSF 0x10000
383
384#define RX_CONFIG_OPTION_ANY_DST_MY_BSS (RX_CFG_ENABLE_ANY_DEST_MAC | \
385 RX_CFG_ENABLE_ONLY_MY_BSSID)
386
387#define RX_CONFIG_OPTION_MY_DST_ANY_BSS (RX_CFG_ENABLE_ONLY_MY_DEST_MAC\
388 | RX_CFG_ENABLE_ANY_BSSID)
389
390#define RX_CONFIG_OPTION_ANY_DST_ANY_BSS (RX_CFG_ENABLE_ANY_DEST_MAC | \
391 RX_CFG_ENABLE_ANY_BSSID)
392
393#define RX_CONFIG_OPTION_MY_DST_MY_BSS (RX_CFG_ENABLE_ONLY_MY_DEST_MAC\
394 | RX_CFG_ENABLE_ONLY_MY_BSSID)
395
396#define RX_CONFIG_OPTION_FOR_SCAN (RX_CFG_ENABLE_PHY_HEADER_PLCP \
397 | RX_CFG_ENABLE_RX_CMPLT_FCS_ERROR \
398 | RX_CFG_COPY_RX_STATUS | RX_CFG_TSF)
399
400#define RX_CONFIG_OPTION_FOR_MEASUREMENT (RX_CFG_ENABLE_ANY_DEST_MAC)
401
402#define RX_CONFIG_OPTION_FOR_JOIN (RX_CFG_ENABLE_ONLY_MY_BSSID | \
403 RX_CFG_ENABLE_ONLY_MY_DEST_MAC)
404
405#define RX_CONFIG_OPTION_FOR_IBSS_JOIN (RX_CFG_ENABLE_ONLY_MY_SSID | \
406 RX_CFG_ENABLE_ONLY_MY_DEST_MAC)
407
408#define RX_FILTER_OPTION_DEF (CFG_RX_MGMT_EN | CFG_RX_DATA_EN\
409 | CFG_RX_CTL_EN | CFG_RX_BCN_EN\
410 | CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
411
412#define RX_FILTER_OPTION_FILTER_ALL 0
413
414#define RX_FILTER_OPTION_DEF_PRSP_BCN (CFG_RX_PRSP_EN | CFG_RX_MGMT_EN\
415 | CFG_RX_RCTS_ACK | CFG_RX_BCN_EN)
416
417#define RX_FILTER_OPTION_JOIN (CFG_RX_MGMT_EN | CFG_RX_DATA_EN\
418 | CFG_RX_BCN_EN | CFG_RX_AUTH_EN\
419 | CFG_RX_ASSOC_EN | CFG_RX_RCTS_ACK\
420 | CFG_RX_PRSP_EN)
421
422
423/*===============================================
424 Phy regs
425 ===============================================*/
426#define ACX_PHY_ADDR_REG SBB_ADDR
427#define ACX_PHY_DATA_REG SBB_DATA
428#define ACX_PHY_CTRL_REG SBB_CTL
429#define ACX_PHY_REG_WR_MASK 0x00000001ul
430#define ACX_PHY_REG_RD_MASK 0x00000002ul
431
432
433/*===============================================
434 EEPROM Read/Write Request 32bit RW
435 ------------------------------------------
436 1 EE_READ - EEPROM Read Request 1 - Setting this bit
437 loads a single byte of data into the EE_DATA
438 register from the EEPROM location specified in
439 the EE_ADDR register.
440 The Wlan hardware hardware clears this bit automatically.
441 EE_DATA is valid when this bit is cleared.
442
443 0 EE_WRITE - EEPROM Write Request - Setting this bit
444 writes a single byte of data from the EE_DATA register into the
445 EEPROM location specified in the EE_ADDR register.
446 The Wlan hardware hardware clears this bit automatically.
447*===============================================*/
448#define ACX_EE_CTL_REG EE_CTL
449#define EE_WRITE 0x00000001ul
450#define EE_READ 0x00000002ul
451
452/*===============================================
453 EEPROM Address - 32bit RW
454 ------------------------------------------
455 This register specifies the address
456 within the EEPROM from/to which to read/write data.
457 ===============================================*/
458#define ACX_EE_ADDR_REG EE_ADDR
459
460/*===============================================
461 EEPROM Data - 32bit RW
462 ------------------------------------------
463 This register either holds the read 8 bits of
464 data from the EEPROM or the write data
465 to be written to the EEPROM.
466 ===============================================*/
467#define ACX_EE_DATA_REG EE_DATA
468
469/*===============================================
470 EEPROM Base Address - 32bit RW
471 ------------------------------------------
472 This register holds the upper nine bits
473 [23:15] of the 24-bit Wlan hardware memory
474 address for burst reads from EEPROM accesses.
475 The EEPROM provides the lower 15 bits of this address.
476 The MSB of the address from the EEPROM is ignored.
477 ===============================================*/
478#define ACX_EE_CFG EE_CFG
479
480/*===============================================
481 GPIO Output Values -32bit, RW
482 ------------------------------------------
483 [31:16] Reserved
484 [15: 0] Specify the output values (at the output driver inputs) for
485 GPIO[15:0], respectively.
486 ===============================================*/
487#define ACX_GPIO_OUT_REG GPIO_OUT
488#define ACX_MAX_GPIO_LINES 15
489
490/*===============================================
491 Contention window -32bit, RW
492 ------------------------------------------
493 [31:26] Reserved
494 [25:16] Max (0x3ff)
495 [15:07] Reserved
496 [06:00] Current contention window value - default is 0x1F
497 ===============================================*/
498#define ACX_CONT_WIND_CFG_REG CONT_WIND_CFG
499#define ACX_CONT_WIND_MIN_MASK 0x0000007f
500#define ACX_CONT_WIND_MAX 0x03ff0000
501
502/*
503 * Indirect slave register/memory registers
504 * ----------------------------------------
505 */
506#define HW_SLAVE_REG_ADDR_REG 0x00000004
507#define HW_SLAVE_REG_DATA_REG 0x00000008
508#define HW_SLAVE_REG_CTRL_REG 0x0000000c
509
510#define SLAVE_AUTO_INC 0x00010000
511#define SLAVE_NO_AUTO_INC 0x00000000
512#define SLAVE_HOST_LITTLE_ENDIAN 0x00000000
513
514#define HW_SLAVE_MEM_ADDR_REG SLV_MEM_ADDR
515#define HW_SLAVE_MEM_DATA_REG SLV_MEM_DATA
516#define HW_SLAVE_MEM_CTRL_REG SLV_MEM_CTL
517#define HW_SLAVE_MEM_ENDIAN_REG SLV_END_CTL
518
519#define HW_FUNC_EVENT_INT_EN 0x8000
520#define HW_FUNC_EVENT_MASK_REG 0x00000034
521
522#define ACX_MAC_TIMESTAMP_REG (MAC_TIMESTAMP)
523
524/*===============================================
525 HI_CFG Interface Configuration Register Values
526 ------------------------------------------
527 ===============================================*/
528#define HI_CFG_UART_ENABLE 0x00000004
529#define HI_CFG_RST232_ENABLE 0x00000008
530#define HI_CFG_CLOCK_REQ_SELECT 0x00000010
531#define HI_CFG_HOST_INT_ENABLE 0x00000020
532#define HI_CFG_VLYNQ_OUTPUT_ENABLE 0x00000040
533#define HI_CFG_HOST_INT_ACTIVE_LOW 0x00000080
534#define HI_CFG_UART_TX_OUT_GPIO_15 0x00000100
535#define HI_CFG_UART_TX_OUT_GPIO_14 0x00000200
536#define HI_CFG_UART_TX_OUT_GPIO_7 0x00000400
537
538/*
539 * NOTE: USE_ACTIVE_HIGH compilation flag should be defined in makefile
540 * for platforms using active high interrupt level
541 */
542#ifdef USE_ACTIVE_HIGH
543#define HI_CFG_DEF_VAL \
544 (HI_CFG_UART_ENABLE | \
545 HI_CFG_RST232_ENABLE | \
546 HI_CFG_CLOCK_REQ_SELECT | \
547 HI_CFG_HOST_INT_ENABLE)
548#else
549#define HI_CFG_DEF_VAL \
550 (HI_CFG_UART_ENABLE | \
551 HI_CFG_RST232_ENABLE | \
552 HI_CFG_CLOCK_REQ_SELECT | \
553 HI_CFG_HOST_INT_ENABLE)
554
555#endif
556
557#define REF_FREQ_19_2 0
558#define REF_FREQ_26_0 1
559#define REF_FREQ_38_4 2
560#define REF_FREQ_40_0 3
561#define REF_FREQ_33_6 4
562#define REF_FREQ_NUM 5
563
564#define LUT_PARAM_INTEGER_DIVIDER 0
565#define LUT_PARAM_FRACTIONAL_DIVIDER 1
566#define LUT_PARAM_ATTN_BB 2
567#define LUT_PARAM_ALPHA_BB 3
568#define LUT_PARAM_STOP_TIME_BB 4
569#define LUT_PARAM_BB_PLL_LOOP_FILTER 5
570#define LUT_PARAM_NUM 6
571
572#define ACX_EEPROMLESS_IND_REG (SCR_PAD4)
573#define USE_EEPROM 0
574#define SOFT_RESET_MAX_TIME 1000000
575#define SOFT_RESET_STALL_TIME 1000
576#define NVS_DATA_BUNDARY_ALIGNMENT 4
577
578
579/* Firmware image load chunk size */
580#define CHUNK_SIZE 512
581
582/* Firmware image header size */
583#define FW_HDR_SIZE 8
584
585#define ECPU_CONTROL_HALT 0x00000101
586
587
588/******************************************************************************
589
590 CHANNELS, BAND & REG DOMAINS definitions
591
592******************************************************************************/
593
594
595enum {
596 RADIO_BAND_2_4GHZ = 0, /* 2.4 Ghz band */
597 RADIO_BAND_5GHZ = 1, /* 5 Ghz band */
598 RADIO_BAND_JAPAN_4_9_GHZ = 2,
599 DEFAULT_BAND = RADIO_BAND_2_4GHZ,
600 INVALID_BAND = 0xFE,
601 MAX_RADIO_BANDS = 0xFF
602};
603
604enum {
605 NO_RATE = 0,
606 RATE_1MBPS = 0x0A,
607 RATE_2MBPS = 0x14,
608 RATE_5_5MBPS = 0x37,
609 RATE_6MBPS = 0x0B,
610 RATE_9MBPS = 0x0F,
611 RATE_11MBPS = 0x6E,
612 RATE_12MBPS = 0x0A,
613 RATE_18MBPS = 0x0E,
614 RATE_22MBPS = 0xDC,
615 RATE_24MBPS = 0x09,
616 RATE_36MBPS = 0x0D,
617 RATE_48MBPS = 0x08,
618 RATE_54MBPS = 0x0C
619};
620
621enum {
622 RATE_INDEX_1MBPS = 0,
623 RATE_INDEX_2MBPS = 1,
624 RATE_INDEX_5_5MBPS = 2,
625 RATE_INDEX_6MBPS = 3,
626 RATE_INDEX_9MBPS = 4,
627 RATE_INDEX_11MBPS = 5,
628 RATE_INDEX_12MBPS = 6,
629 RATE_INDEX_18MBPS = 7,
630 RATE_INDEX_22MBPS = 8,
631 RATE_INDEX_24MBPS = 9,
632 RATE_INDEX_36MBPS = 10,
633 RATE_INDEX_48MBPS = 11,
634 RATE_INDEX_54MBPS = 12,
635 RATE_INDEX_MAX = RATE_INDEX_54MBPS,
636 MAX_RATE_INDEX,
637 INVALID_RATE_INDEX = MAX_RATE_INDEX,
638 RATE_INDEX_ENUM_MAX_SIZE = 0x7FFFFFFF
639};
640
641enum {
642 RATE_MASK_1MBPS = 0x1,
643 RATE_MASK_2MBPS = 0x2,
644 RATE_MASK_5_5MBPS = 0x4,
645 RATE_MASK_11MBPS = 0x20,
646};
647
648#define SHORT_PREAMBLE_BIT BIT(0) /* CCK or Barker depending on the rate */
649#define OFDM_RATE_BIT BIT(6)
650#define PBCC_RATE_BIT BIT(7)
651
652enum {
653 CCK_LONG = 0,
654 CCK_SHORT = SHORT_PREAMBLE_BIT,
655 PBCC_LONG = PBCC_RATE_BIT,
656 PBCC_SHORT = PBCC_RATE_BIT | SHORT_PREAMBLE_BIT,
657 OFDM = OFDM_RATE_BIT
658};
659
660/******************************************************************************
661
662Transmit-Descriptor RATE-SET field definitions...
663
664Define a new "Rate-Set" for TX path that incorporates the
665Rate & Modulation info into a single 16-bit field.
666
667TxdRateSet_t:
668b15 - Indicates Preamble type (1=SHORT, 0=LONG).
669 Notes:
670 Must be LONG (0) for 1Mbps rate.
671 Does not apply (set to 0) for RevG-OFDM rates.
672b14 - Indicates PBCC encoding (1=PBCC, 0=not).
673 Notes:
674 Does not apply (set to 0) for rates 1 and 2 Mbps.
675 Does not apply (set to 0) for RevG-OFDM rates.
676b13 - Unused (set to 0).
677b12-b0 - Supported Rate indicator bits as defined below.
678
679******************************************************************************/
680
681
682#define TNETW1251_CHIP_ID_PG1_0 0x07010101
683#define TNETW1251_CHIP_ID_PG1_1 0x07020101
684#define TNETW1251_CHIP_ID_PG1_2 0x07030101
685
686/*************************************************************************
687
688 Interrupt Trigger Register (Host -> WiLink)
689
690**************************************************************************/
691
692/* Hardware to Embedded CPU Interrupts - first 32-bit register set */
693
694/*
695 * Host Command Interrupt. Setting this bit masks
696 * the interrupt that the host issues to inform
697 * the FW that it has sent a command
698 * to the Wlan hardware Command Mailbox.
699 */
700#define INTR_TRIG_CMD BIT(0)
701
702/*
703 * Host Event Acknowlegde Interrupt. The host
704 * sets this bit to acknowledge that it received
705 * the unsolicited information from the event
706 * mailbox.
707 */
708#define INTR_TRIG_EVENT_ACK BIT(1)
709
710/*
711 * The host sets this bit to inform the Wlan
712 * FW that a TX packet is in the XFER
713 * Buffer #0.
714 */
715#define INTR_TRIG_TX_PROC0 BIT(2)
716
717/*
718 * The host sets this bit to inform the FW
719 * that it read a packet from RX XFER
720 * Buffer #0.
721 */
722#define INTR_TRIG_RX_PROC0 BIT(3)
723
724#define INTR_TRIG_DEBUG_ACK BIT(4)
725
726#define INTR_TRIG_STATE_CHANGED BIT(5)
727
728
729/* Hardware to Embedded CPU Interrupts - second 32-bit register set */
730
731/*
732 * The host sets this bit to inform the FW
733 * that it read a packet from RX XFER
734 * Buffer #1.
735 */
736#define INTR_TRIG_RX_PROC1 BIT(17)
737
738/*
739 * The host sets this bit to inform the Wlan
740 * hardware that a TX packet is in the XFER
741 * Buffer #1.
742 */
743#define INTR_TRIG_TX_PROC1 BIT(18)
744
745#endif
diff --git a/drivers/net/wireless/wl12xx/rx.c b/drivers/net/wireless/wl12xx/rx.c
new file mode 100644
index 000000000000..981ea259eb89
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/rx.c
@@ -0,0 +1,208 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#include <linux/skbuff.h>
26#include <net/mac80211.h>
27
28#include "wl12xx.h"
29#include "reg.h"
30#include "spi.h"
31#include "rx.h"
32
33static void wl12xx_rx_header(struct wl12xx *wl,
34 struct wl12xx_rx_descriptor *desc)
35{
36 u32 rx_packet_ring_addr;
37
38 rx_packet_ring_addr = wl->data_path->rx_packet_ring_addr;
39 if (wl->rx_current_buffer)
40 rx_packet_ring_addr += wl->data_path->rx_packet_ring_chunk_size;
41
42 wl12xx_spi_mem_read(wl, rx_packet_ring_addr, desc,
43 sizeof(struct wl12xx_rx_descriptor));
44}
45
46static void wl12xx_rx_status(struct wl12xx *wl,
47 struct wl12xx_rx_descriptor *desc,
48 struct ieee80211_rx_status *status,
49 u8 beacon)
50{
51 memset(status, 0, sizeof(struct ieee80211_rx_status));
52
53 status->band = IEEE80211_BAND_2GHZ;
54 status->mactime = desc->timestamp;
55
56 /*
57 * The rx status timestamp is a 32 bits value while the TSF is a
58 * 64 bits one.
59 * For IBSS merging, TSF is mandatory, so we have to get it
60 * somehow, so we ask for ACX_TSF_INFO.
61 * That could be moved to the get_tsf() hook, but unfortunately,
62 * this one must be atomic, while our SPI routines can sleep.
63 */
64 if ((wl->bss_type == BSS_TYPE_IBSS) && beacon) {
65 u64 mactime;
66 int ret;
67 struct wl12xx_command cmd;
68 struct acx_tsf_info *tsf_info;
69
70 memset(&cmd, 0, sizeof(cmd));
71
72 ret = wl12xx_cmd_interrogate(wl, ACX_TSF_INFO,
73 sizeof(struct acx_tsf_info),
74 &cmd);
75 if (ret < 0) {
76 wl12xx_warning("ACX_FW_REV interrogate failed");
77 return;
78 }
79
80 tsf_info = (struct acx_tsf_info *)&(cmd.parameters);
81
82 mactime = tsf_info->current_tsf_lsb |
83 (tsf_info->current_tsf_msb << 31);
84
85 status->mactime = mactime;
86 }
87
88 status->signal = desc->rssi;
89 status->qual = (desc->rssi - WL12XX_RX_MIN_RSSI) * 100 /
90 (WL12XX_RX_MAX_RSSI - WL12XX_RX_MIN_RSSI);
91 status->qual = min(status->qual, 100);
92 status->qual = max(status->qual, 0);
93
94 /*
95 * FIXME: guessing that snr needs to be divided by two, otherwise
96 * the values don't make any sense
97 */
98 status->noise = desc->rssi - desc->snr / 2;
99
100 status->freq = ieee80211_channel_to_frequency(desc->channel);
101
102 status->flag |= RX_FLAG_TSFT;
103
104 if (desc->flags & RX_DESC_ENCRYPTION_MASK) {
105 status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED;
106
107 if (likely(!(desc->flags & RX_DESC_DECRYPT_FAIL)))
108 status->flag |= RX_FLAG_DECRYPTED;
109
110 if (unlikely(desc->flags & RX_DESC_MIC_FAIL))
111 status->flag |= RX_FLAG_MMIC_ERROR;
112 }
113
114 if (unlikely(!(desc->flags & RX_DESC_VALID_FCS)))
115 status->flag |= RX_FLAG_FAILED_FCS_CRC;
116
117
118 /* FIXME: set status->rate_idx */
119}
120
121static void wl12xx_rx_body(struct wl12xx *wl,
122 struct wl12xx_rx_descriptor *desc)
123{
124 struct sk_buff *skb;
125 struct ieee80211_rx_status status;
126 u8 *rx_buffer, beacon = 0;
127 u16 length, *fc;
128 u32 curr_id, last_id_inc, rx_packet_ring_addr;
129
130 length = WL12XX_RX_ALIGN(desc->length - PLCP_HEADER_LENGTH);
131 curr_id = (desc->flags & RX_DESC_SEQNUM_MASK) >> RX_DESC_PACKETID_SHIFT;
132 last_id_inc = (wl->rx_last_id + 1) % (RX_MAX_PACKET_ID + 1);
133
134 if (last_id_inc != curr_id) {
135 wl12xx_warning("curr ID:%d, last ID inc:%d",
136 curr_id, last_id_inc);
137 wl->rx_last_id = curr_id;
138 } else {
139 wl->rx_last_id = last_id_inc;
140 }
141
142 rx_packet_ring_addr = wl->data_path->rx_packet_ring_addr +
143 sizeof(struct wl12xx_rx_descriptor) + 20;
144 if (wl->rx_current_buffer)
145 rx_packet_ring_addr += wl->data_path->rx_packet_ring_chunk_size;
146
147 skb = dev_alloc_skb(length);
148 if (!skb) {
149 wl12xx_error("Couldn't allocate RX frame");
150 return;
151 }
152
153 rx_buffer = skb_put(skb, length);
154 wl12xx_spi_mem_read(wl, rx_packet_ring_addr, rx_buffer, length);
155
156 /* The actual lenght doesn't include the target's alignment */
157 skb->len = desc->length - PLCP_HEADER_LENGTH;
158
159 fc = (u16 *)skb->data;
160
161 if ((*fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_BEACON)
162 beacon = 1;
163
164 wl12xx_rx_status(wl, desc, &status, beacon);
165
166 wl12xx_debug(DEBUG_RX, "rx skb 0x%p: %d B %s", skb, skb->len,
167 beacon ? "beacon" : "");
168
169 ieee80211_rx(wl->hw, skb, &status);
170}
171
172static void wl12xx_rx_ack(struct wl12xx *wl)
173{
174 u32 data, addr;
175
176 if (wl->rx_current_buffer) {
177 addr = ACX_REG_INTERRUPT_TRIG_H;
178 data = INTR_TRIG_RX_PROC1;
179 } else {
180 addr = ACX_REG_INTERRUPT_TRIG;
181 data = INTR_TRIG_RX_PROC0;
182 }
183
184 wl12xx_reg_write32(wl, addr, data);
185
186 /* Toggle buffer ring */
187 wl->rx_current_buffer = !wl->rx_current_buffer;
188}
189
190
191void wl12xx_rx(struct wl12xx *wl)
192{
193 struct wl12xx_rx_descriptor rx_desc;
194
195 if (wl->state != WL12XX_STATE_ON)
196 return;
197
198 /* We first read the frame's header */
199 wl12xx_rx_header(wl, &rx_desc);
200
201 /* Now we can read the body */
202 wl12xx_rx_body(wl, &rx_desc);
203
204 /* Finally, we need to ACK the RX */
205 wl12xx_rx_ack(wl);
206
207 return;
208}
diff --git a/drivers/net/wireless/wl12xx/rx.h b/drivers/net/wireless/wl12xx/rx.h
new file mode 100644
index 000000000000..8a23fdea5016
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/rx.h
@@ -0,0 +1,122 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL12XX_RX_H__
26#define __WL12XX_RX_H__
27
28#include <linux/bitops.h>
29
30/*
31 * RX PATH
32 *
33 * The Rx path uses a double buffer and an rx_contro structure, each located
34 * at a fixed address in the device memory. The host keeps track of which
35 * buffer is available and alternates between them on a per packet basis.
36 * The size of each of the two buffers is large enough to hold the longest
37 * 802.3 packet.
38 * The RX path goes like that:
39 * 1) The target generates an interrupt each time a new packet is received.
40 * There are 2 RX interrupts, one for each buffer.
41 * 2) The host reads the received packet from one of the double buffers.
42 * 3) The host triggers a target interrupt.
43 * 4) The target prepares the next RX packet.
44 */
45
46#define WL12XX_RX_MAX_RSSI -30
47#define WL12XX_RX_MIN_RSSI -95
48
49#define WL12XX_RX_ALIGN_TO 4
50#define WL12XX_RX_ALIGN(len) (((len) + WL12XX_RX_ALIGN_TO - 1) & \
51 ~(WL12XX_RX_ALIGN_TO - 1))
52
53#define SHORT_PREAMBLE_BIT BIT(0)
54#define OFDM_RATE_BIT BIT(6)
55#define PBCC_RATE_BIT BIT(7)
56
57#define PLCP_HEADER_LENGTH 8
58#define RX_DESC_PACKETID_SHIFT 11
59#define RX_MAX_PACKET_ID 3
60
61#define RX_DESC_VALID_FCS 0x0001
62#define RX_DESC_MATCH_RXADDR1 0x0002
63#define RX_DESC_MCAST 0x0004
64#define RX_DESC_STAINTIM 0x0008
65#define RX_DESC_VIRTUAL_BM 0x0010
66#define RX_DESC_BCAST 0x0020
67#define RX_DESC_MATCH_SSID 0x0040
68#define RX_DESC_MATCH_BSSID 0x0080
69#define RX_DESC_ENCRYPTION_MASK 0x0300
70#define RX_DESC_MEASURMENT 0x0400
71#define RX_DESC_SEQNUM_MASK 0x1800
72#define RX_DESC_MIC_FAIL 0x2000
73#define RX_DESC_DECRYPT_FAIL 0x4000
74
75struct wl12xx_rx_descriptor {
76 u32 timestamp; /* In microseconds */
77 u16 length; /* Paylod length, including headers */
78 u16 flags;
79
80 /*
81 * 0 - 802.11
82 * 1 - 802.3
83 * 2 - IP
84 * 3 - Raw Codec
85 */
86 u8 type;
87
88 /*
89 * Recevied Rate:
90 * 0x0A - 1MBPS
91 * 0x14 - 2MBPS
92 * 0x37 - 5_5MBPS
93 * 0x0B - 6MBPS
94 * 0x0F - 9MBPS
95 * 0x6E - 11MBPS
96 * 0x0A - 12MBPS
97 * 0x0E - 18MBPS
98 * 0xDC - 22MBPS
99 * 0x09 - 24MBPS
100 * 0x0D - 36MBPS
101 * 0x08 - 48MBPS
102 * 0x0C - 54MBPS
103 */
104 u8 rate;
105
106 u8 mod_pre; /* Modulation and preamble */
107 u8 channel;
108
109 /*
110 * 0 - 2.4 Ghz
111 * 1 - 5 Ghz
112 */
113 u8 band;
114
115 s8 rssi; /* in dB */
116 u8 rcpi; /* in dB */
117 u8 snr; /* in dB */
118} __attribute__ ((packed));
119
120void wl12xx_rx(struct wl12xx *wl);
121
122#endif
diff --git a/drivers/net/wireless/wl12xx/spi.c b/drivers/net/wireless/wl12xx/spi.c
new file mode 100644
index 000000000000..abdf171a47e7
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/spi.c
@@ -0,0 +1,358 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include <linux/module.h>
25#include <linux/crc7.h>
26#include <linux/spi/spi.h>
27
28#include "wl12xx.h"
29#include "wl12xx_80211.h"
30#include "reg.h"
31#include "spi.h"
32#include "ps.h"
33
34static int wl12xx_translate_reg_addr(struct wl12xx *wl, int addr)
35{
36 /* If the address is lower than REGISTERS_BASE, it means that this is
37 * a chip-specific register address, so look it up in the registers
38 * table */
39 if (addr < REGISTERS_BASE) {
40 /* Make sure we don't go over the table */
41 if (addr >= ACX_REG_TABLE_LEN) {
42 wl12xx_error("address out of range (%d)", addr);
43 return -EINVAL;
44 }
45 addr = wl->chip.acx_reg_table[addr];
46 }
47
48 return addr - wl->physical_reg_addr + wl->virtual_reg_addr;
49}
50
51static int wl12xx_translate_mem_addr(struct wl12xx *wl, int addr)
52{
53 return addr - wl->physical_mem_addr + wl->virtual_mem_addr;
54}
55
56
57void wl12xx_spi_reset(struct wl12xx *wl)
58{
59 u8 *cmd;
60 struct spi_transfer t;
61 struct spi_message m;
62
63 cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
64 if (!cmd) {
65 wl12xx_error("could not allocate cmd for spi reset");
66 return;
67 }
68
69 memset(&t, 0, sizeof(t));
70 spi_message_init(&m);
71
72 memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
73
74 t.tx_buf = cmd;
75 t.len = WSPI_INIT_CMD_LEN;
76 spi_message_add_tail(&t, &m);
77
78 spi_sync(wl->spi, &m);
79
80 wl12xx_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN);
81}
82
83void wl12xx_spi_init(struct wl12xx *wl)
84{
85 u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
86 struct spi_transfer t;
87 struct spi_message m;
88
89 cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
90 if (!cmd) {
91 wl12xx_error("could not allocate cmd for spi init");
92 return;
93 }
94
95 memset(crc, 0, sizeof(crc));
96 memset(&t, 0, sizeof(t));
97 spi_message_init(&m);
98
99 /*
100 * Set WSPI_INIT_COMMAND
101 * the data is being send from the MSB to LSB
102 */
103 cmd[2] = 0xff;
104 cmd[3] = 0xff;
105 cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
106 cmd[0] = 0;
107 cmd[7] = 0;
108 cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
109 cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
110
111 if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
112 cmd[5] |= WSPI_INIT_CMD_DIS_FIXEDBUSY;
113 else
114 cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY;
115
116 cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
117 | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;
118
119 crc[0] = cmd[1];
120 crc[1] = cmd[0];
121 crc[2] = cmd[7];
122 crc[3] = cmd[6];
123 crc[4] = cmd[5];
124
125 cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
126 cmd[4] |= WSPI_INIT_CMD_END;
127
128 t.tx_buf = cmd;
129 t.len = WSPI_INIT_CMD_LEN;
130 spi_message_add_tail(&t, &m);
131
132 spi_sync(wl->spi, &m);
133
134 wl12xx_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN);
135}
136
137/* Set the SPI partitions to access the chip addresses
138 *
139 * There are two VIRTUAL (SPI) partitions (the memory partition and the
140 * registers partition), which are mapped to two different areas of the
141 * PHYSICAL (hardware) memory. This function also makes other checks to
142 * ensure that the partitions are not overlapping. In the diagram below, the
143 * memory partition comes before the register partition, but the opposite is
144 * also supported.
145 *
146 * PHYSICAL address
147 * space
148 *
149 * | |
150 * ...+----+--> mem_start
151 * VIRTUAL address ... | |
152 * space ... | | [PART_0]
153 * ... | |
154 * 0x00000000 <--+----+... ...+----+--> mem_start + mem_size
155 * | | ... | |
156 * |MEM | ... | |
157 * | | ... | |
158 * part_size <--+----+... | | {unused area)
159 * | | ... | |
160 * |REG | ... | |
161 * part_size | | ... | |
162 * + <--+----+... ...+----+--> reg_start
163 * reg_size ... | |
164 * ... | | [PART_1]
165 * ... | |
166 * ...+----+--> reg_start + reg_size
167 * | |
168 *
169 */
170void wl12xx_set_partition(struct wl12xx *wl,
171 u32 mem_start, u32 mem_size,
172 u32 reg_start, u32 reg_size)
173{
174 u8 tx_buf[sizeof(u32) + 2 * sizeof(struct wl12xx_partition)];
175 struct wl12xx_partition *partition;
176 struct spi_transfer t;
177 struct spi_message m;
178 u32 *cmd;
179 size_t len;
180 int addr;
181
182 spi_message_init(&m);
183 memset(&t, 0, sizeof(t));
184 memset(tx_buf, 0, sizeof(tx_buf));
185
186 cmd = (u32 *) tx_buf;
187 partition = (struct wl12xx_partition *) (tx_buf + sizeof(u32));
188 addr = HW_ACCESS_PART0_SIZE_ADDR;
189 len = 2 * sizeof(struct wl12xx_partition);
190
191 *cmd |= WSPI_CMD_WRITE;
192 *cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH;
193 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
194
195 wl12xx_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
196 mem_start, mem_size);
197 wl12xx_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
198 reg_start, reg_size);
199
200 /* Make sure that the two partitions together don't exceed the
201 * address range */
202 if ((mem_size + reg_size) > HW_ACCESS_MEMORY_MAX_RANGE) {
203 wl12xx_debug(DEBUG_SPI, "Total size exceeds maximum virtual"
204 " address range. Truncating partition[0].");
205 mem_size = HW_ACCESS_MEMORY_MAX_RANGE - reg_size;
206 wl12xx_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
207 mem_start, mem_size);
208 wl12xx_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
209 reg_start, reg_size);
210 }
211
212 if ((mem_start < reg_start) &&
213 ((mem_start + mem_size) > reg_start)) {
214 /* Guarantee that the memory partition doesn't overlap the
215 * registers partition */
216 wl12xx_debug(DEBUG_SPI, "End of partition[0] is "
217 "overlapping partition[1]. Adjusted.");
218 mem_size = reg_start - mem_start;
219 wl12xx_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
220 mem_start, mem_size);
221 wl12xx_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
222 reg_start, reg_size);
223 } else if ((reg_start < mem_start) &&
224 ((reg_start + reg_size) > mem_start)) {
225 /* Guarantee that the register partition doesn't overlap the
226 * memory partition */
227 wl12xx_debug(DEBUG_SPI, "End of partition[1] is"
228 " overlapping partition[0]. Adjusted.");
229 reg_size = mem_start - reg_start;
230 wl12xx_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
231 mem_start, mem_size);
232 wl12xx_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
233 reg_start, reg_size);
234 }
235
236 partition[0].start = mem_start;
237 partition[0].size = mem_size;
238 partition[1].start = reg_start;
239 partition[1].size = reg_size;
240
241 wl->physical_mem_addr = mem_start;
242 wl->physical_reg_addr = reg_start;
243
244 wl->virtual_mem_addr = 0;
245 wl->virtual_reg_addr = mem_size;
246
247 t.tx_buf = tx_buf;
248 t.len = sizeof(tx_buf);
249 spi_message_add_tail(&t, &m);
250
251 spi_sync(wl->spi, &m);
252}
253
254void wl12xx_spi_read(struct wl12xx *wl, int addr, void *buf,
255 size_t len)
256{
257 struct spi_transfer t[3];
258 struct spi_message m;
259 char busy_buf[TNETWIF_READ_OFFSET_BYTES];
260 u32 cmd;
261
262 cmd = 0;
263 cmd |= WSPI_CMD_READ;
264 cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH;
265 cmd |= addr & WSPI_CMD_BYTE_ADDR;
266
267 spi_message_init(&m);
268 memset(t, 0, sizeof(t));
269
270 t[0].tx_buf = &cmd;
271 t[0].len = 4;
272 spi_message_add_tail(&t[0], &m);
273
274 /* Busy and non busy words read */
275 t[1].rx_buf = busy_buf;
276 t[1].len = TNETWIF_READ_OFFSET_BYTES;
277 spi_message_add_tail(&t[1], &m);
278
279 t[2].rx_buf = buf;
280 t[2].len = len;
281 spi_message_add_tail(&t[2], &m);
282
283 spi_sync(wl->spi, &m);
284
285 /* FIXME: check busy words */
286
287 wl12xx_dump(DEBUG_SPI, "spi_read cmd -> ", &cmd, sizeof(cmd));
288 wl12xx_dump(DEBUG_SPI, "spi_read buf <- ", buf, len);
289}
290
291void wl12xx_spi_write(struct wl12xx *wl, int addr, void *buf,
292 size_t len)
293{
294 struct spi_transfer t[2];
295 struct spi_message m;
296 u32 cmd;
297
298 cmd = 0;
299 cmd |= WSPI_CMD_WRITE;
300 cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH;
301 cmd |= addr & WSPI_CMD_BYTE_ADDR;
302
303 spi_message_init(&m);
304 memset(t, 0, sizeof(t));
305
306 t[0].tx_buf = &cmd;
307 t[0].len = sizeof(cmd);
308 spi_message_add_tail(&t[0], &m);
309
310 t[1].tx_buf = buf;
311 t[1].len = len;
312 spi_message_add_tail(&t[1], &m);
313
314 spi_sync(wl->spi, &m);
315
316 wl12xx_dump(DEBUG_SPI, "spi_write cmd -> ", &cmd, sizeof(cmd));
317 wl12xx_dump(DEBUG_SPI, "spi_write buf -> ", buf, len);
318}
319
320void wl12xx_spi_mem_read(struct wl12xx *wl, int addr, void *buf,
321 size_t len)
322{
323 int physical;
324
325 physical = wl12xx_translate_mem_addr(wl, addr);
326
327 wl12xx_spi_read(wl, physical, buf, len);
328}
329
330void wl12xx_spi_mem_write(struct wl12xx *wl, int addr, void *buf,
331 size_t len)
332{
333 int physical;
334
335 physical = wl12xx_translate_mem_addr(wl, addr);
336
337 wl12xx_spi_write(wl, physical, buf, len);
338}
339
340u32 wl12xx_mem_read32(struct wl12xx *wl, int addr)
341{
342 return wl12xx_read32(wl, wl12xx_translate_mem_addr(wl, addr));
343}
344
345void wl12xx_mem_write32(struct wl12xx *wl, int addr, u32 val)
346{
347 wl12xx_write32(wl, wl12xx_translate_mem_addr(wl, addr), val);
348}
349
350u32 wl12xx_reg_read32(struct wl12xx *wl, int addr)
351{
352 return wl12xx_read32(wl, wl12xx_translate_reg_addr(wl, addr));
353}
354
355void wl12xx_reg_write32(struct wl12xx *wl, int addr, u32 val)
356{
357 wl12xx_write32(wl, wl12xx_translate_reg_addr(wl, addr), val);
358}
diff --git a/drivers/net/wireless/wl12xx/spi.h b/drivers/net/wireless/wl12xx/spi.h
new file mode 100644
index 000000000000..fd3227e904a8
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/spi.h
@@ -0,0 +1,109 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL12XX_SPI_H__
26#define __WL12XX_SPI_H__
27
28#include "cmd.h"
29#include "acx.h"
30#include "reg.h"
31
32#define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0
33
34#define HW_ACCESS_PART0_SIZE_ADDR 0x1FFC0
35#define HW_ACCESS_PART0_START_ADDR 0x1FFC4
36#define HW_ACCESS_PART1_SIZE_ADDR 0x1FFC8
37#define HW_ACCESS_PART1_START_ADDR 0x1FFCC
38
39#define HW_ACCESS_REGISTER_SIZE 4
40
41#define HW_ACCESS_PRAM_MAX_RANGE 0x3c000
42
43#define WSPI_CMD_READ 0x40000000
44#define WSPI_CMD_WRITE 0x00000000
45#define WSPI_CMD_FIXED 0x20000000
46#define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
47#define WSPI_CMD_BYTE_LENGTH_OFFSET 17
48#define WSPI_CMD_BYTE_ADDR 0x0001FFFF
49
50#define WSPI_INIT_CMD_CRC_LEN 5
51
52#define WSPI_INIT_CMD_START 0x00
53#define WSPI_INIT_CMD_TX 0x40
54/* the extra bypass bit is sampled by the TNET as '1' */
55#define WSPI_INIT_CMD_BYPASS_BIT 0x80
56#define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
57#define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
58#define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
59#define WSPI_INIT_CMD_IOD 0x40
60#define WSPI_INIT_CMD_IP 0x20
61#define WSPI_INIT_CMD_CS 0x10
62#define WSPI_INIT_CMD_WS 0x08
63#define WSPI_INIT_CMD_WSPI 0x01
64#define WSPI_INIT_CMD_END 0x01
65
66#define WSPI_INIT_CMD_LEN 8
67
68#define TNETWIF_READ_OFFSET_BYTES 8
69#define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
70 ((TNETWIF_READ_OFFSET_BYTES - 4) / sizeof(u32))
71#define HW_ACCESS_WSPI_INIT_CMD_MASK 0
72
73
74/* Raw target IO, address is not translated */
75void wl12xx_spi_read(struct wl12xx *wl, int addr, void *buf, size_t len);
76void wl12xx_spi_write(struct wl12xx *wl, int addr, void *buf, size_t len);
77
78/* Memory target IO, address is tranlated to partition 0 */
79void wl12xx_spi_mem_read(struct wl12xx *wl, int addr, void *buf, size_t len);
80void wl12xx_spi_mem_write(struct wl12xx *wl, int addr, void *buf, size_t len);
81u32 wl12xx_mem_read32(struct wl12xx *wl, int addr);
82void wl12xx_mem_write32(struct wl12xx *wl, int addr, u32 val);
83
84/* Registers IO */
85u32 wl12xx_reg_read32(struct wl12xx *wl, int addr);
86void wl12xx_reg_write32(struct wl12xx *wl, int addr, u32 val);
87
88/* INIT and RESET words */
89void wl12xx_spi_reset(struct wl12xx *wl);
90void wl12xx_spi_init(struct wl12xx *wl);
91void wl12xx_set_partition(struct wl12xx *wl,
92 u32 part_start, u32 part_size,
93 u32 reg_start, u32 reg_size);
94
95static inline u32 wl12xx_read32(struct wl12xx *wl, int addr)
96{
97 u32 response;
98
99 wl12xx_spi_read(wl, addr, &response, sizeof(u32));
100
101 return response;
102}
103
104static inline void wl12xx_write32(struct wl12xx *wl, int addr, u32 val)
105{
106 wl12xx_spi_write(wl, addr, &val, sizeof(u32));
107}
108
109#endif /* __WL12XX_SPI_H__ */
diff --git a/drivers/net/wireless/wl12xx/tx.c b/drivers/net/wireless/wl12xx/tx.c
new file mode 100644
index 000000000000..62145e205a8c
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/tx.c
@@ -0,0 +1,557 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#include <linux/kernel.h>
26#include <linux/module.h>
27
28#include "wl12xx.h"
29#include "reg.h"
30#include "spi.h"
31#include "tx.h"
32#include "ps.h"
33
34static bool wl12xx_tx_double_buffer_busy(struct wl12xx *wl, u32 data_out_count)
35{
36 int used, data_in_count;
37
38 data_in_count = wl->data_in_count;
39
40 if (data_in_count < data_out_count)
41 /* data_in_count has wrapped */
42 data_in_count += TX_STATUS_DATA_OUT_COUNT_MASK + 1;
43
44 used = data_in_count - data_out_count;
45
46 WARN_ON(used < 0);
47 WARN_ON(used > DP_TX_PACKET_RING_CHUNK_NUM);
48
49 if (used >= DP_TX_PACKET_RING_CHUNK_NUM)
50 return true;
51 else
52 return false;
53}
54
55static int wl12xx_tx_path_status(struct wl12xx *wl)
56{
57 u32 status, addr, data_out_count;
58 bool busy;
59
60 addr = wl->data_path->tx_control_addr;
61 status = wl12xx_mem_read32(wl, addr);
62 data_out_count = status & TX_STATUS_DATA_OUT_COUNT_MASK;
63 busy = wl12xx_tx_double_buffer_busy(wl, data_out_count);
64
65 if (busy)
66 return -EBUSY;
67
68 return 0;
69}
70
71static int wl12xx_tx_id(struct wl12xx *wl, struct sk_buff *skb)
72{
73 int i;
74
75 for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++)
76 if (wl->tx_frames[i] == NULL) {
77 wl->tx_frames[i] = skb;
78 return i;
79 }
80
81 return -EBUSY;
82}
83
84static void wl12xx_tx_control(struct tx_double_buffer_desc *tx_hdr,
85 struct ieee80211_tx_info *control, u16 fc)
86{
87 *(u16 *)&tx_hdr->control = 0;
88
89 tx_hdr->control.rate_policy = 0;
90
91 /* 802.11 packets */
92 tx_hdr->control.packet_type = 0;
93
94 if (control->flags & IEEE80211_TX_CTL_NO_ACK)
95 tx_hdr->control.ack_policy = 1;
96
97 tx_hdr->control.tx_complete = 1;
98
99 if ((fc & IEEE80211_FTYPE_DATA) &&
100 ((fc & IEEE80211_STYPE_QOS_DATA) ||
101 (fc & IEEE80211_STYPE_QOS_NULLFUNC)))
102 tx_hdr->control.qos = 1;
103}
104
105/* RSN + MIC = 8 + 8 = 16 bytes (worst case - AES). */
106#define MAX_MSDU_SECURITY_LENGTH 16
107#define MAX_MPDU_SECURITY_LENGTH 16
108#define WLAN_QOS_HDR_LEN 26
109#define MAX_MPDU_HEADER_AND_SECURITY (MAX_MPDU_SECURITY_LENGTH + \
110 WLAN_QOS_HDR_LEN)
111#define HW_BLOCK_SIZE 252
112static void wl12xx_tx_frag_block_num(struct tx_double_buffer_desc *tx_hdr)
113{
114 u16 payload_len, frag_threshold, mem_blocks;
115 u16 num_mpdus, mem_blocks_per_frag;
116
117 frag_threshold = IEEE80211_MAX_FRAG_THRESHOLD;
118 tx_hdr->frag_threshold = cpu_to_le16(frag_threshold);
119
120 payload_len = tx_hdr->length + MAX_MSDU_SECURITY_LENGTH;
121
122 if (payload_len > frag_threshold) {
123 mem_blocks_per_frag =
124 ((frag_threshold + MAX_MPDU_HEADER_AND_SECURITY) /
125 HW_BLOCK_SIZE) + 1;
126 num_mpdus = payload_len / frag_threshold;
127 mem_blocks = num_mpdus * mem_blocks_per_frag;
128 payload_len -= num_mpdus * frag_threshold;
129 num_mpdus++;
130
131 } else {
132 mem_blocks_per_frag = 0;
133 mem_blocks = 0;
134 num_mpdus = 1;
135 }
136
137 mem_blocks += (payload_len / HW_BLOCK_SIZE) + 1;
138
139 if (num_mpdus > 1)
140 mem_blocks += min(num_mpdus, mem_blocks_per_frag);
141
142 tx_hdr->num_mem_blocks = mem_blocks;
143}
144
145static int wl12xx_tx_fill_hdr(struct wl12xx *wl, struct sk_buff *skb,
146 struct ieee80211_tx_info *control)
147{
148 struct tx_double_buffer_desc *tx_hdr;
149 struct ieee80211_rate *rate;
150 int id;
151 u16 fc;
152
153 if (!skb)
154 return -EINVAL;
155
156 id = wl12xx_tx_id(wl, skb);
157 if (id < 0)
158 return id;
159
160 fc = *(u16 *)skb->data;
161 tx_hdr = (struct tx_double_buffer_desc *) skb_push(skb,
162 sizeof(*tx_hdr));
163
164 tx_hdr->length = cpu_to_le16(skb->len - sizeof(*tx_hdr));
165 rate = ieee80211_get_tx_rate(wl->hw, control);
166 tx_hdr->rate = cpu_to_le16(rate->hw_value);
167 tx_hdr->expiry_time = cpu_to_le32(1 << 16);
168 tx_hdr->id = id;
169
170 /* FIXME: how to get the correct queue id? */
171 tx_hdr->xmit_queue = 0;
172
173 wl12xx_tx_control(tx_hdr, control, fc);
174 wl12xx_tx_frag_block_num(tx_hdr);
175
176 return 0;
177}
178
179/* We copy the packet to the target */
180static int wl12xx_tx_send_packet(struct wl12xx *wl, struct sk_buff *skb,
181 struct ieee80211_tx_info *control)
182{
183 struct tx_double_buffer_desc *tx_hdr;
184 int len;
185 u32 addr;
186
187 if (!skb)
188 return -EINVAL;
189
190 tx_hdr = (struct tx_double_buffer_desc *) skb->data;
191
192 if (control->control.hw_key &&
193 control->control.hw_key->alg == ALG_TKIP) {
194 int hdrlen;
195 u16 fc;
196 u8 *pos;
197
198 fc = *(u16 *)(skb->data + sizeof(*tx_hdr));
199 tx_hdr->length += WL12XX_TKIP_IV_SPACE;
200
201 hdrlen = ieee80211_hdrlen(fc);
202
203 pos = skb_push(skb, WL12XX_TKIP_IV_SPACE);
204 memmove(pos, pos + WL12XX_TKIP_IV_SPACE,
205 sizeof(*tx_hdr) + hdrlen);
206 }
207
208 /* Revisit. This is a workaround for getting non-aligned packets.
209 This happens at least with EAPOL packets from the user space.
210 Our DMA requires packets to be aligned on a 4-byte boundary.
211 */
212 if (unlikely((long)skb->data & 0x03)) {
213 int offset = (4 - (long)skb->data) & 0x03;
214 wl12xx_debug(DEBUG_TX, "skb offset %d", offset);
215
216 /* check whether the current skb can be used */
217 if (!skb_cloned(skb) && (skb_tailroom(skb) >= offset)) {
218 unsigned char *src = skb->data;
219
220 /* align the buffer on a 4-byte boundary */
221 skb_reserve(skb, offset);
222 memmove(skb->data, src, skb->len);
223 } else {
224 wl12xx_info("No handler, fixme!");
225 return -EINVAL;
226 }
227 }
228
229 /* Our skb->data at this point includes the HW header */
230 len = WL12XX_TX_ALIGN(skb->len);
231
232 if (wl->data_in_count & 0x1)
233 addr = wl->data_path->tx_packet_ring_addr +
234 wl->data_path->tx_packet_ring_chunk_size;
235 else
236 addr = wl->data_path->tx_packet_ring_addr;
237
238 wl12xx_spi_mem_write(wl, addr, skb->data, len);
239
240 wl12xx_debug(DEBUG_TX, "tx id %u skb 0x%p payload %u rate 0x%x",
241 tx_hdr->id, skb, tx_hdr->length, tx_hdr->rate);
242
243 return 0;
244}
245
246static void wl12xx_tx_trigger(struct wl12xx *wl)
247{
248 u32 data, addr;
249
250 if (wl->data_in_count & 0x1) {
251 addr = ACX_REG_INTERRUPT_TRIG_H;
252 data = INTR_TRIG_TX_PROC1;
253 } else {
254 addr = ACX_REG_INTERRUPT_TRIG;
255 data = INTR_TRIG_TX_PROC0;
256 }
257
258 wl12xx_reg_write32(wl, addr, data);
259
260 /* Bumping data in */
261 wl->data_in_count = (wl->data_in_count + 1) &
262 TX_STATUS_DATA_OUT_COUNT_MASK;
263}
264
265/* caller must hold wl->mutex */
266static int wl12xx_tx_frame(struct wl12xx *wl, struct sk_buff *skb)
267{
268 struct ieee80211_tx_info *info;
269 int ret = 0;
270 u8 idx;
271
272 info = IEEE80211_SKB_CB(skb);
273
274 if (info->control.hw_key) {
275 idx = info->control.hw_key->hw_key_idx;
276 if (unlikely(wl->default_key != idx)) {
277 ret = wl12xx_acx_default_key(wl, idx);
278 if (ret < 0)
279 return ret;
280 }
281 }
282
283 ret = wl12xx_tx_path_status(wl);
284 if (ret < 0)
285 return ret;
286
287 ret = wl12xx_tx_fill_hdr(wl, skb, info);
288 if (ret < 0)
289 return ret;
290
291 ret = wl12xx_tx_send_packet(wl, skb, info);
292 if (ret < 0)
293 return ret;
294
295 wl12xx_tx_trigger(wl);
296
297 return ret;
298}
299
300void wl12xx_tx_work(struct work_struct *work)
301{
302 struct wl12xx *wl = container_of(work, struct wl12xx, tx_work);
303 struct sk_buff *skb;
304 bool woken_up = false;
305 int ret;
306
307 mutex_lock(&wl->mutex);
308
309 if (unlikely(wl->state == WL12XX_STATE_OFF))
310 goto out;
311
312 while ((skb = skb_dequeue(&wl->tx_queue))) {
313 if (!woken_up) {
314 wl12xx_ps_elp_wakeup(wl);
315 woken_up = true;
316 }
317
318 ret = wl12xx_tx_frame(wl, skb);
319 if (ret == -EBUSY) {
320 /* firmware buffer is full, stop queues */
321 wl12xx_debug(DEBUG_TX, "tx_work: fw buffer full, "
322 "stop queues");
323 ieee80211_stop_queues(wl->hw);
324 wl->tx_queue_stopped = true;
325 skb_queue_head(&wl->tx_queue, skb);
326 goto out;
327 } else if (ret < 0) {
328 dev_kfree_skb(skb);
329 goto out;
330 }
331 }
332
333out:
334 if (woken_up)
335 wl12xx_ps_elp_sleep(wl);
336
337 mutex_unlock(&wl->mutex);
338}
339
340static const char *wl12xx_tx_parse_status(u8 status)
341{
342 /* 8 bit status field, one character per bit plus null */
343 static char buf[9];
344 int i = 0;
345
346 memset(buf, 0, sizeof(buf));
347
348 if (status & TX_DMA_ERROR)
349 buf[i++] = 'm';
350 if (status & TX_DISABLED)
351 buf[i++] = 'd';
352 if (status & TX_RETRY_EXCEEDED)
353 buf[i++] = 'r';
354 if (status & TX_TIMEOUT)
355 buf[i++] = 't';
356 if (status & TX_KEY_NOT_FOUND)
357 buf[i++] = 'k';
358 if (status & TX_ENCRYPT_FAIL)
359 buf[i++] = 'e';
360 if (status & TX_UNAVAILABLE_PRIORITY)
361 buf[i++] = 'p';
362
363 /* bit 0 is unused apparently */
364
365 return buf;
366}
367
368static void wl12xx_tx_packet_cb(struct wl12xx *wl,
369 struct tx_result *result)
370{
371 struct ieee80211_tx_info *info;
372 struct sk_buff *skb;
373 int hdrlen, ret;
374 u8 *frame;
375
376 skb = wl->tx_frames[result->id];
377 if (skb == NULL) {
378 wl12xx_error("SKB for packet %d is NULL", result->id);
379 return;
380 }
381
382 info = IEEE80211_SKB_CB(skb);
383
384 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
385 (result->status == TX_SUCCESS))
386 info->flags |= IEEE80211_TX_STAT_ACK;
387
388 info->status.rates[0].count = result->ack_failures + 1;
389 wl->stats.retry_count += result->ack_failures;
390
391 /*
392 * We have to remove our private TX header before pushing
393 * the skb back to mac80211.
394 */
395 frame = skb_pull(skb, sizeof(struct tx_double_buffer_desc));
396 if (info->control.hw_key &&
397 info->control.hw_key->alg == ALG_TKIP) {
398 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
399 memmove(frame + WL12XX_TKIP_IV_SPACE, frame, hdrlen);
400 skb_pull(skb, WL12XX_TKIP_IV_SPACE);
401 }
402
403 wl12xx_debug(DEBUG_TX, "tx status id %u skb 0x%p failures %u rate 0x%x"
404 " status 0x%x (%s)",
405 result->id, skb, result->ack_failures, result->rate,
406 result->status, wl12xx_tx_parse_status(result->status));
407
408
409 ieee80211_tx_status(wl->hw, skb);
410
411 wl->tx_frames[result->id] = NULL;
412
413 if (wl->tx_queue_stopped) {
414 wl12xx_debug(DEBUG_TX, "cb: queue was stopped");
415
416 skb = skb_dequeue(&wl->tx_queue);
417
418 /* The skb can be NULL because tx_work might have been
419 scheduled before the queue was stopped making the
420 queue empty */
421
422 if (skb) {
423 ret = wl12xx_tx_frame(wl, skb);
424 if (ret == -EBUSY) {
425 /* firmware buffer is still full */
426 wl12xx_debug(DEBUG_TX, "cb: fw buffer "
427 "still full");
428 skb_queue_head(&wl->tx_queue, skb);
429 return;
430 } else if (ret < 0) {
431 dev_kfree_skb(skb);
432 return;
433 }
434 }
435
436 wl12xx_debug(DEBUG_TX, "cb: waking queues");
437 ieee80211_wake_queues(wl->hw);
438 wl->tx_queue_stopped = false;
439 }
440}
441
442/* Called upon reception of a TX complete interrupt */
443void wl12xx_tx_complete(struct wl12xx *wl)
444{
445 int i, result_index, num_complete = 0;
446 struct tx_result result[FW_TX_CMPLT_BLOCK_SIZE], *result_ptr;
447
448 if (unlikely(wl->state != WL12XX_STATE_ON))
449 return;
450
451 /* First we read the result */
452 wl12xx_spi_mem_read(wl, wl->data_path->tx_complete_addr,
453 result, sizeof(result));
454
455 result_index = wl->next_tx_complete;
456
457 for (i = 0; i < ARRAY_SIZE(result); i++) {
458 result_ptr = &result[result_index];
459
460 if (result_ptr->done_1 == 1 &&
461 result_ptr->done_2 == 1) {
462 wl12xx_tx_packet_cb(wl, result_ptr);
463
464 result_ptr->done_1 = 0;
465 result_ptr->done_2 = 0;
466
467 result_index = (result_index + 1) &
468 (FW_TX_CMPLT_BLOCK_SIZE - 1);
469 num_complete++;
470 } else {
471 break;
472 }
473 }
474
475 /* Every completed frame needs to be acknowledged */
476 if (num_complete) {
477 /*
478 * If we've wrapped, we have to clear
479 * the results in 2 steps.
480 */
481 if (result_index > wl->next_tx_complete) {
482 /* Only 1 write is needed */
483 wl12xx_spi_mem_write(wl,
484 wl->data_path->tx_complete_addr +
485 (wl->next_tx_complete *
486 sizeof(struct tx_result)),
487 &result[wl->next_tx_complete],
488 num_complete *
489 sizeof(struct tx_result));
490
491
492 } else if (result_index < wl->next_tx_complete) {
493 /* 2 writes are needed */
494 wl12xx_spi_mem_write(wl,
495 wl->data_path->tx_complete_addr +
496 (wl->next_tx_complete *
497 sizeof(struct tx_result)),
498 &result[wl->next_tx_complete],
499 (FW_TX_CMPLT_BLOCK_SIZE -
500 wl->next_tx_complete) *
501 sizeof(struct tx_result));
502
503 wl12xx_spi_mem_write(wl,
504 wl->data_path->tx_complete_addr,
505 result,
506 (num_complete -
507 FW_TX_CMPLT_BLOCK_SIZE +
508 wl->next_tx_complete) *
509 sizeof(struct tx_result));
510
511 } else {
512 /* We have to write the whole array */
513 wl12xx_spi_mem_write(wl,
514 wl->data_path->tx_complete_addr,
515 result,
516 FW_TX_CMPLT_BLOCK_SIZE *
517 sizeof(struct tx_result));
518 }
519
520 }
521
522 wl->next_tx_complete = result_index;
523}
524
525/* caller must hold wl->mutex */
526void wl12xx_tx_flush(struct wl12xx *wl)
527{
528 int i;
529 struct sk_buff *skb;
530 struct ieee80211_tx_info *info;
531
532 /* TX failure */
533/* control->flags = 0; FIXME */
534
535 while ((skb = skb_dequeue(&wl->tx_queue))) {
536 info = IEEE80211_SKB_CB(skb);
537
538 wl12xx_debug(DEBUG_TX, "flushing skb 0x%p", skb);
539
540 if (!(info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS))
541 continue;
542
543 ieee80211_tx_status(wl->hw, skb);
544 }
545
546 for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++)
547 if (wl->tx_frames[i] != NULL) {
548 skb = wl->tx_frames[i];
549 info = IEEE80211_SKB_CB(skb);
550
551 if (!(info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS))
552 continue;
553
554 ieee80211_tx_status(wl->hw, skb);
555 wl->tx_frames[i] = NULL;
556 }
557}
diff --git a/drivers/net/wireless/wl12xx/tx.h b/drivers/net/wireless/wl12xx/tx.h
new file mode 100644
index 000000000000..dc82691f4c14
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/tx.h
@@ -0,0 +1,215 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL12XX_TX_H__
26#define __WL12XX_TX_H__
27
28#include <linux/bitops.h>
29
30/*
31 *
32 * TX PATH
33 *
34 * The Tx path uses a double buffer and a tx_control structure, each located
35 * at a fixed address in the device's memory. On startup, the host retrieves
36 * the pointers to these addresses. A double buffer allows for continuous data
37 * flow towards the device. The host keeps track of which buffer is available
38 * and alternates between these two buffers on a per packet basis.
39 *
40 * The size of each of the two buffers is large enough to hold the longest
41 * 802.3 packet - maximum size Ethernet packet + header + descriptor.
42 * TX complete indication will be received a-synchronously in a TX done cyclic
43 * buffer which is composed of 16 tx_result descriptors structures and is used
44 * in a cyclic manner.
45 *
46 * The TX (HOST) procedure is as follows:
47 * 1. Read the Tx path status, that will give the data_out_count.
48 * 2. goto 1, if not possible.
49 * i.e. if data_in_count - data_out_count >= HwBuffer size (2 for double
50 * buffer).
51 * 3. Copy the packet (preceded by double_buffer_desc), if possible.
52 * i.e. if data_in_count - data_out_count < HwBuffer size (2 for double
53 * buffer).
54 * 4. increment data_in_count.
55 * 5. Inform the firmware by generating a firmware internal interrupt.
56 * 6. FW will increment data_out_count after it reads the buffer.
57 *
58 * The TX Complete procedure:
59 * 1. To get a TX complete indication the host enables the tx_complete flag in
60 * the TX descriptor Structure.
61 * 2. For each packet with a Tx Complete field set, the firmware adds the
62 * transmit results to the cyclic buffer (txDoneRing) and sets both done_1
63 * and done_2 to 1 to indicate driver ownership.
64 * 3. The firmware sends a Tx Complete interrupt to the host to trigger the
65 * host to process the new data. Note: interrupt will be send per packet if
66 * TX complete indication was requested in tx_control or per crossing
67 * aggregation threshold.
68 * 4. After receiving the Tx Complete interrupt, the host reads the
69 * TxDescriptorDone information in a cyclic manner and clears both done_1
70 * and done_2 fields.
71 *
72 */
73
74#define TX_COMPLETE_REQUIRED_BIT 0x80
75#define TX_STATUS_DATA_OUT_COUNT_MASK 0xf
76#define WL12XX_TX_ALIGN_TO 4
77#define WL12XX_TX_ALIGN(len) (((len) + WL12XX_TX_ALIGN_TO - 1) & \
78 ~(WL12XX_TX_ALIGN_TO - 1))
79#define WL12XX_TKIP_IV_SPACE 4
80
81struct tx_control {
82 /* Rate Policy (class) index */
83 unsigned rate_policy:3;
84
85 /* When set, no ack policy is expected */
86 unsigned ack_policy:1;
87
88 /*
89 * Packet type:
90 * 0 -> 802.11
91 * 1 -> 802.3
92 * 2 -> IP
93 * 3 -> raw codec
94 */
95 unsigned packet_type:2;
96
97 /* If set, this is a QoS-Null or QoS-Data frame */
98 unsigned qos:1;
99
100 /*
101 * If set, the target triggers the tx complete INT
102 * upon frame sending completion.
103 */
104 unsigned tx_complete:1;
105
106 /* 2 bytes padding before packet header */
107 unsigned xfer_pad:1;
108
109 unsigned reserved:7;
110} __attribute__ ((packed));
111
112
113struct tx_double_buffer_desc {
114 /* Length of payload, including headers. */
115 u16 length;
116
117 /*
118 * A bit mask that specifies the initial rate to be used
119 * Possible values are:
120 * 0x0001 - 1Mbits
121 * 0x0002 - 2Mbits
122 * 0x0004 - 5.5Mbits
123 * 0x0008 - 6Mbits
124 * 0x0010 - 9Mbits
125 * 0x0020 - 11Mbits
126 * 0x0040 - 12Mbits
127 * 0x0080 - 18Mbits
128 * 0x0100 - 22Mbits
129 * 0x0200 - 24Mbits
130 * 0x0400 - 36Mbits
131 * 0x0800 - 48Mbits
132 * 0x1000 - 54Mbits
133 */
134 u16 rate;
135
136 /* Time in us that a packet can spend in the target */
137 u32 expiry_time;
138
139 /* index of the TX queue used for this packet */
140 u8 xmit_queue;
141
142 /* Used to identify a packet */
143 u8 id;
144
145 struct tx_control control;
146
147 /*
148 * The FW should cut the packet into fragments
149 * of this size.
150 */
151 u16 frag_threshold;
152
153 /* Numbers of HW queue blocks to be allocated */
154 u8 num_mem_blocks;
155
156 u8 reserved;
157} __attribute__ ((packed));
158
159enum {
160 TX_SUCCESS = 0,
161 TX_DMA_ERROR = BIT(7),
162 TX_DISABLED = BIT(6),
163 TX_RETRY_EXCEEDED = BIT(5),
164 TX_TIMEOUT = BIT(4),
165 TX_KEY_NOT_FOUND = BIT(3),
166 TX_ENCRYPT_FAIL = BIT(2),
167 TX_UNAVAILABLE_PRIORITY = BIT(1),
168};
169
170struct tx_result {
171 /*
172 * Ownership synchronization between the host and
173 * the firmware. If done_1 and done_2 are cleared,
174 * owned by the FW (no info ready).
175 */
176 u8 done_1;
177
178 /* same as double_buffer_desc->id */
179 u8 id;
180
181 /*
182 * Total air access duration consumed by this
183 * packet, including all retries and overheads.
184 */
185 u16 medium_usage;
186
187 /* Total media delay (from 1st EDCA AIFS counter until TX Complete). */
188 u32 medium_delay;
189
190 /* Time between host xfer and tx complete */
191 u32 fw_hnadling_time;
192
193 /* The LS-byte of the last TKIP sequence number. */
194 u8 lsb_seq_num;
195
196 /* Retry count */
197 u8 ack_failures;
198
199 /* At which rate we got a ACK */
200 u16 rate;
201
202 u16 reserved;
203
204 /* TX_* */
205 u8 status;
206
207 /* See done_1 */
208 u8 done_2;
209} __attribute__ ((packed));
210
211void wl12xx_tx_work(struct work_struct *work);
212void wl12xx_tx_complete(struct wl12xx *wl);
213void wl12xx_tx_flush(struct wl12xx *wl);
214
215#endif
diff --git a/drivers/net/wireless/wl12xx/wl1251.c b/drivers/net/wireless/wl12xx/wl1251.c
new file mode 100644
index 000000000000..ce1561a41fa4
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/wl1251.c
@@ -0,0 +1,709 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26
27#include "wl1251.h"
28#include "reg.h"
29#include "spi.h"
30#include "boot.h"
31#include "event.h"
32#include "acx.h"
33#include "tx.h"
34#include "rx.h"
35#include "ps.h"
36#include "init.h"
37
38static struct wl12xx_partition_set wl1251_part_table[PART_TABLE_LEN] = {
39 [PART_DOWN] = {
40 .mem = {
41 .start = 0x00000000,
42 .size = 0x00016800
43 },
44 .reg = {
45 .start = REGISTERS_BASE,
46 .size = REGISTERS_DOWN_SIZE
47 },
48 },
49
50 [PART_WORK] = {
51 .mem = {
52 .start = 0x00028000,
53 .size = 0x00014000
54 },
55 .reg = {
56 .start = REGISTERS_BASE,
57 .size = REGISTERS_WORK_SIZE
58 },
59 },
60
61 /* WL1251 doesn't use the DRPW partition, so we don't set it here */
62};
63
64static enum wl12xx_acx_int_reg wl1251_acx_reg_table[ACX_REG_TABLE_LEN] = {
65 [ACX_REG_INTERRUPT_TRIG] = (REGISTERS_BASE + 0x0474),
66 [ACX_REG_INTERRUPT_TRIG_H] = (REGISTERS_BASE + 0x0478),
67 [ACX_REG_INTERRUPT_MASK] = (REGISTERS_BASE + 0x0494),
68 [ACX_REG_HINT_MASK_SET] = (REGISTERS_BASE + 0x0498),
69 [ACX_REG_HINT_MASK_CLR] = (REGISTERS_BASE + 0x049C),
70 [ACX_REG_INTERRUPT_NO_CLEAR] = (REGISTERS_BASE + 0x04B0),
71 [ACX_REG_INTERRUPT_CLEAR] = (REGISTERS_BASE + 0x04A4),
72 [ACX_REG_INTERRUPT_ACK] = (REGISTERS_BASE + 0x04A8),
73 [ACX_REG_SLV_SOFT_RESET] = (REGISTERS_BASE + 0x0000),
74 [ACX_REG_EE_START] = (REGISTERS_BASE + 0x080C),
75 [ACX_REG_ECPU_CONTROL] = (REGISTERS_BASE + 0x0804)
76};
77
78static int wl1251_upload_firmware(struct wl12xx *wl)
79{
80 struct wl12xx_partition_set *p_table = wl->chip.p_table;
81 int addr, chunk_num, partition_limit;
82 size_t fw_data_len;
83 u8 *p;
84
85 /* whal_FwCtrl_LoadFwImageSm() */
86
87 wl12xx_debug(DEBUG_BOOT, "chip id before fw upload: 0x%x",
88 wl12xx_reg_read32(wl, CHIP_ID_B));
89
90 /* 10.0 check firmware length and set partition */
91 fw_data_len = (wl->fw[4] << 24) | (wl->fw[5] << 16) |
92 (wl->fw[6] << 8) | (wl->fw[7]);
93
94 wl12xx_debug(DEBUG_BOOT, "fw_data_len %zu chunk_size %d", fw_data_len,
95 CHUNK_SIZE);
96
97 if ((fw_data_len % 4) != 0) {
98 wl12xx_error("firmware length not multiple of four");
99 return -EIO;
100 }
101
102 wl12xx_set_partition(wl,
103 p_table[PART_DOWN].mem.start,
104 p_table[PART_DOWN].mem.size,
105 p_table[PART_DOWN].reg.start,
106 p_table[PART_DOWN].reg.size);
107
108 /* 10.1 set partition limit and chunk num */
109 chunk_num = 0;
110 partition_limit = p_table[PART_DOWN].mem.size;
111
112 while (chunk_num < fw_data_len / CHUNK_SIZE) {
113 /* 10.2 update partition, if needed */
114 addr = p_table[PART_DOWN].mem.start +
115 (chunk_num + 2) * CHUNK_SIZE;
116 if (addr > partition_limit) {
117 addr = p_table[PART_DOWN].mem.start +
118 chunk_num * CHUNK_SIZE;
119 partition_limit = chunk_num * CHUNK_SIZE +
120 p_table[PART_DOWN].mem.size;
121 wl12xx_set_partition(wl,
122 addr,
123 p_table[PART_DOWN].mem.size,
124 p_table[PART_DOWN].reg.start,
125 p_table[PART_DOWN].reg.size);
126 }
127
128 /* 10.3 upload the chunk */
129 addr = p_table[PART_DOWN].mem.start + chunk_num * CHUNK_SIZE;
130 p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE;
131 wl12xx_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
132 p, addr);
133 wl12xx_spi_mem_write(wl, addr, p, CHUNK_SIZE);
134
135 chunk_num++;
136 }
137
138 /* 10.4 upload the last chunk */
139 addr = p_table[PART_DOWN].mem.start + chunk_num * CHUNK_SIZE;
140 p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE;
141 wl12xx_debug(DEBUG_BOOT, "uploading fw last chunk (%zu B) 0x%p to 0x%x",
142 fw_data_len % CHUNK_SIZE, p, addr);
143 wl12xx_spi_mem_write(wl, addr, p, fw_data_len % CHUNK_SIZE);
144
145 return 0;
146}
147
148static int wl1251_upload_nvs(struct wl12xx *wl)
149{
150 size_t nvs_len, nvs_bytes_written, burst_len;
151 int nvs_start, i;
152 u32 dest_addr, val;
153 u8 *nvs_ptr, *nvs;
154
155 nvs = wl->nvs;
156 if (nvs == NULL)
157 return -ENODEV;
158
159 nvs_ptr = nvs;
160
161 nvs_len = wl->nvs_len;
162 nvs_start = wl->fw_len;
163
164 /*
165 * Layout before the actual NVS tables:
166 * 1 byte : burst length.
167 * 2 bytes: destination address.
168 * n bytes: data to burst copy.
169 *
170 * This is ended by a 0 length, then the NVS tables.
171 */
172
173 while (nvs_ptr[0]) {
174 burst_len = nvs_ptr[0];
175 dest_addr = (nvs_ptr[1] & 0xfe) | ((u32)(nvs_ptr[2] << 8));
176
177 /* We move our pointer to the data */
178 nvs_ptr += 3;
179
180 for (i = 0; i < burst_len; i++) {
181 val = (nvs_ptr[0] | (nvs_ptr[1] << 8)
182 | (nvs_ptr[2] << 16) | (nvs_ptr[3] << 24));
183
184 wl12xx_debug(DEBUG_BOOT,
185 "nvs burst write 0x%x: 0x%x",
186 dest_addr, val);
187 wl12xx_mem_write32(wl, dest_addr, val);
188
189 nvs_ptr += 4;
190 dest_addr += 4;
191 }
192 }
193
194 /*
195 * We've reached the first zero length, the first NVS table
196 * is 7 bytes further.
197 */
198 nvs_ptr += 7;
199 nvs_len -= nvs_ptr - nvs;
200 nvs_len = ALIGN(nvs_len, 4);
201
202 /* Now we must set the partition correctly */
203 wl12xx_set_partition(wl, nvs_start,
204 wl->chip.p_table[PART_DOWN].mem.size,
205 wl->chip.p_table[PART_DOWN].reg.start,
206 wl->chip.p_table[PART_DOWN].reg.size);
207
208 /* And finally we upload the NVS tables */
209 nvs_bytes_written = 0;
210 while (nvs_bytes_written < nvs_len) {
211 val = (nvs_ptr[0] | (nvs_ptr[1] << 8)
212 | (nvs_ptr[2] << 16) | (nvs_ptr[3] << 24));
213
214 val = cpu_to_le32(val);
215
216 wl12xx_debug(DEBUG_BOOT,
217 "nvs write table 0x%x: 0x%x",
218 nvs_start, val);
219 wl12xx_mem_write32(wl, nvs_start, val);
220
221 nvs_ptr += 4;
222 nvs_bytes_written += 4;
223 nvs_start += 4;
224 }
225
226 return 0;
227}
228
229static int wl1251_boot(struct wl12xx *wl)
230{
231 int ret = 0, minor_minor_e2_ver;
232 u32 tmp, boot_data;
233
234 ret = wl12xx_boot_soft_reset(wl);
235 if (ret < 0)
236 goto out;
237
238 /* 2. start processing NVS file */
239 ret = wl->chip.op_upload_nvs(wl);
240 if (ret < 0)
241 goto out;
242
243 /* write firmware's last address (ie. it's length) to
244 * ACX_EEPROMLESS_IND_REG */
245 wl12xx_reg_write32(wl, ACX_EEPROMLESS_IND_REG, wl->fw_len);
246
247 /* 6. read the EEPROM parameters */
248 tmp = wl12xx_reg_read32(wl, SCR_PAD2);
249
250 /* 7. read bootdata */
251 wl->boot_attr.radio_type = (tmp & 0x0000FF00) >> 8;
252 wl->boot_attr.major = (tmp & 0x00FF0000) >> 16;
253 tmp = wl12xx_reg_read32(wl, SCR_PAD3);
254
255 /* 8. check bootdata and call restart sequence */
256 wl->boot_attr.minor = (tmp & 0x00FF0000) >> 16;
257 minor_minor_e2_ver = (tmp & 0xFF000000) >> 24;
258
259 wl12xx_debug(DEBUG_BOOT, "radioType 0x%x majorE2Ver 0x%x "
260 "minorE2Ver 0x%x minor_minor_e2_ver 0x%x",
261 wl->boot_attr.radio_type, wl->boot_attr.major,
262 wl->boot_attr.minor, minor_minor_e2_ver);
263
264 ret = wl12xx_boot_init_seq(wl);
265 if (ret < 0)
266 goto out;
267
268 /* 9. NVS processing done */
269 boot_data = wl12xx_reg_read32(wl, ACX_REG_ECPU_CONTROL);
270
271 wl12xx_debug(DEBUG_BOOT, "halt boot_data 0x%x", boot_data);
272
273 /* 10. check that ECPU_CONTROL_HALT bits are set in
274 * pWhalBus->uBootData and start uploading firmware
275 */
276 if ((boot_data & ECPU_CONTROL_HALT) == 0) {
277 wl12xx_error("boot failed, ECPU_CONTROL_HALT not set");
278 ret = -EIO;
279 goto out;
280 }
281
282 ret = wl->chip.op_upload_fw(wl);
283 if (ret < 0)
284 goto out;
285
286 /* 10.5 start firmware */
287 ret = wl12xx_boot_run_firmware(wl);
288 if (ret < 0)
289 goto out;
290
291 /* Get and save the firmware version */
292 wl12xx_acx_fw_version(wl, wl->chip.fw_ver, sizeof(wl->chip.fw_ver));
293
294out:
295 return ret;
296}
297
298static int wl1251_mem_cfg(struct wl12xx *wl)
299{
300 struct wl1251_acx_config_memory mem_conf;
301 int ret, i;
302
303 wl12xx_debug(DEBUG_ACX, "wl1251 mem cfg");
304
305 /* memory config */
306 mem_conf.mem_config.num_stations = cpu_to_le16(DEFAULT_NUM_STATIONS);
307 mem_conf.mem_config.rx_mem_block_num = 35;
308 mem_conf.mem_config.tx_min_mem_block_num = 64;
309 mem_conf.mem_config.num_tx_queues = MAX_TX_QUEUES;
310 mem_conf.mem_config.host_if_options = HOSTIF_PKT_RING;
311 mem_conf.mem_config.num_ssid_profiles = 1;
312 mem_conf.mem_config.debug_buffer_size =
313 cpu_to_le16(TRACE_BUFFER_MAX_SIZE);
314
315 /* RX queue config */
316 mem_conf.rx_queue_config.dma_address = 0;
317 mem_conf.rx_queue_config.num_descs = ACX_RX_DESC_DEF;
318 mem_conf.rx_queue_config.priority = DEFAULT_RXQ_PRIORITY;
319 mem_conf.rx_queue_config.type = DEFAULT_RXQ_TYPE;
320
321 /* TX queue config */
322 for (i = 0; i < MAX_TX_QUEUES; i++) {
323 mem_conf.tx_queue_config[i].num_descs = ACX_TX_DESC_DEF;
324 mem_conf.tx_queue_config[i].attributes = i;
325 }
326
327 mem_conf.header.id = ACX_MEM_CFG;
328 mem_conf.header.len = sizeof(struct wl1251_acx_config_memory) -
329 sizeof(struct acx_header);
330 mem_conf.header.len -=
331 (MAX_TX_QUEUE_CONFIGS - mem_conf.mem_config.num_tx_queues) *
332 sizeof(struct wl1251_acx_tx_queue_config);
333
334 ret = wl12xx_cmd_configure(wl, &mem_conf,
335 sizeof(struct wl1251_acx_config_memory));
336 if (ret < 0)
337 wl12xx_warning("wl1251 mem config failed: %d", ret);
338
339 return ret;
340}
341
342static int wl1251_hw_init_mem_config(struct wl12xx *wl)
343{
344 int ret;
345
346 ret = wl1251_mem_cfg(wl);
347 if (ret < 0)
348 return ret;
349
350 wl->target_mem_map = kzalloc(sizeof(struct wl1251_acx_mem_map),
351 GFP_KERNEL);
352 if (!wl->target_mem_map) {
353 wl12xx_error("couldn't allocate target memory map");
354 return -ENOMEM;
355 }
356
357 /* we now ask for the firmware built memory map */
358 ret = wl12xx_acx_mem_map(wl, wl->target_mem_map,
359 sizeof(struct wl1251_acx_mem_map));
360 if (ret < 0) {
361 wl12xx_error("couldn't retrieve firmware memory map");
362 kfree(wl->target_mem_map);
363 wl->target_mem_map = NULL;
364 return ret;
365 }
366
367 return 0;
368}
369
370static void wl1251_set_ecpu_ctrl(struct wl12xx *wl, u32 flag)
371{
372 u32 cpu_ctrl;
373
374 /* 10.5.0 run the firmware (I) */
375 cpu_ctrl = wl12xx_reg_read32(wl, ACX_REG_ECPU_CONTROL);
376
377 /* 10.5.1 run the firmware (II) */
378 cpu_ctrl &= ~flag;
379 wl12xx_reg_write32(wl, ACX_REG_ECPU_CONTROL, cpu_ctrl);
380}
381
382static void wl1251_target_enable_interrupts(struct wl12xx *wl)
383{
384 /* Enable target's interrupts */
385 wl->intr_mask = WL1251_ACX_INTR_RX0_DATA |
386 WL1251_ACX_INTR_RX1_DATA |
387 WL1251_ACX_INTR_TX_RESULT |
388 WL1251_ACX_INTR_EVENT_A |
389 WL1251_ACX_INTR_EVENT_B |
390 WL1251_ACX_INTR_INIT_COMPLETE;
391 wl12xx_boot_target_enable_interrupts(wl);
392}
393
394static void wl1251_irq_work(struct work_struct *work)
395{
396 u32 intr;
397 struct wl12xx *wl =
398 container_of(work, struct wl12xx, irq_work);
399
400 mutex_lock(&wl->mutex);
401
402 wl12xx_debug(DEBUG_IRQ, "IRQ work");
403
404 if (wl->state == WL12XX_STATE_OFF)
405 goto out;
406
407 wl12xx_ps_elp_wakeup(wl);
408
409 wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_MASK, WL1251_ACX_INTR_ALL);
410
411 intr = wl12xx_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR);
412 wl12xx_debug(DEBUG_IRQ, "intr: 0x%x", intr);
413
414 if (wl->data_path) {
415 wl12xx_spi_mem_read(wl, wl->data_path->rx_control_addr,
416 &wl->rx_counter, sizeof(u32));
417
418 /* We handle a frmware bug here */
419 switch ((wl->rx_counter - wl->rx_handled) & 0xf) {
420 case 0:
421 wl12xx_debug(DEBUG_IRQ, "RX: FW and host in sync");
422 intr &= ~WL1251_ACX_INTR_RX0_DATA;
423 intr &= ~WL1251_ACX_INTR_RX1_DATA;
424 break;
425 case 1:
426 wl12xx_debug(DEBUG_IRQ, "RX: FW +1");
427 intr |= WL1251_ACX_INTR_RX0_DATA;
428 intr &= ~WL1251_ACX_INTR_RX1_DATA;
429 break;
430 case 2:
431 wl12xx_debug(DEBUG_IRQ, "RX: FW +2");
432 intr |= WL1251_ACX_INTR_RX0_DATA;
433 intr |= WL1251_ACX_INTR_RX1_DATA;
434 break;
435 default:
436 wl12xx_warning("RX: FW and host out of sync: %d",
437 wl->rx_counter - wl->rx_handled);
438 break;
439 }
440
441 wl->rx_handled = wl->rx_counter;
442
443
444 wl12xx_debug(DEBUG_IRQ, "RX counter: %d", wl->rx_counter);
445 }
446
447 intr &= wl->intr_mask;
448
449 if (intr == 0) {
450 wl12xx_debug(DEBUG_IRQ, "INTR is 0");
451 wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_MASK,
452 ~(wl->intr_mask));
453
454 goto out_sleep;
455 }
456
457 if (intr & WL1251_ACX_INTR_RX0_DATA) {
458 wl12xx_debug(DEBUG_IRQ, "WL1251_ACX_INTR_RX0_DATA");
459 wl12xx_rx(wl);
460 }
461
462 if (intr & WL1251_ACX_INTR_RX1_DATA) {
463 wl12xx_debug(DEBUG_IRQ, "WL1251_ACX_INTR_RX1_DATA");
464 wl12xx_rx(wl);
465 }
466
467 if (intr & WL1251_ACX_INTR_TX_RESULT) {
468 wl12xx_debug(DEBUG_IRQ, "WL1251_ACX_INTR_TX_RESULT");
469 wl12xx_tx_complete(wl);
470 }
471
472 if (intr & (WL1251_ACX_INTR_EVENT_A | WL1251_ACX_INTR_EVENT_B)) {
473 wl12xx_debug(DEBUG_IRQ, "WL1251_ACX_INTR_EVENT (0x%x)", intr);
474 if (intr & WL1251_ACX_INTR_EVENT_A)
475 wl12xx_event_handle(wl, 0);
476 else
477 wl12xx_event_handle(wl, 1);
478 }
479
480 if (intr & WL1251_ACX_INTR_INIT_COMPLETE)
481 wl12xx_debug(DEBUG_IRQ, "WL1251_ACX_INTR_INIT_COMPLETE");
482
483 wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_MASK, ~(wl->intr_mask));
484
485out_sleep:
486 wl12xx_ps_elp_sleep(wl);
487out:
488 mutex_unlock(&wl->mutex);
489}
490
491static int wl1251_hw_init_txq_fill(u8 qid,
492 struct acx_tx_queue_qos_config *config,
493 u32 num_blocks)
494{
495 config->qid = qid;
496
497 switch (qid) {
498 case QOS_AC_BE:
499 config->high_threshold =
500 (QOS_TX_HIGH_BE_DEF * num_blocks) / 100;
501 config->low_threshold =
502 (QOS_TX_LOW_BE_DEF * num_blocks) / 100;
503 break;
504 case QOS_AC_BK:
505 config->high_threshold =
506 (QOS_TX_HIGH_BK_DEF * num_blocks) / 100;
507 config->low_threshold =
508 (QOS_TX_LOW_BK_DEF * num_blocks) / 100;
509 break;
510 case QOS_AC_VI:
511 config->high_threshold =
512 (QOS_TX_HIGH_VI_DEF * num_blocks) / 100;
513 config->low_threshold =
514 (QOS_TX_LOW_VI_DEF * num_blocks) / 100;
515 break;
516 case QOS_AC_VO:
517 config->high_threshold =
518 (QOS_TX_HIGH_VO_DEF * num_blocks) / 100;
519 config->low_threshold =
520 (QOS_TX_LOW_VO_DEF * num_blocks) / 100;
521 break;
522 default:
523 wl12xx_error("Invalid TX queue id: %d", qid);
524 return -EINVAL;
525 }
526
527 return 0;
528}
529
530static int wl1251_hw_init_tx_queue_config(struct wl12xx *wl)
531{
532 struct acx_tx_queue_qos_config config;
533 struct wl1251_acx_mem_map *wl_mem_map = wl->target_mem_map;
534 int ret, i;
535
536 wl12xx_debug(DEBUG_ACX, "acx tx queue config");
537
538 config.header.id = ACX_TX_QUEUE_CFG;
539 config.header.len = sizeof(struct acx_tx_queue_qos_config) -
540 sizeof(struct acx_header);
541
542 for (i = 0; i < MAX_NUM_OF_AC; i++) {
543 ret = wl1251_hw_init_txq_fill(i, &config,
544 wl_mem_map->num_tx_mem_blocks);
545 if (ret < 0)
546 return ret;
547
548 ret = wl12xx_cmd_configure(wl, &config, sizeof(config));
549 if (ret < 0)
550 return ret;
551 }
552
553 return 0;
554}
555
556static int wl1251_hw_init_data_path_config(struct wl12xx *wl)
557{
558 int ret;
559
560 /* asking for the data path parameters */
561 wl->data_path = kzalloc(sizeof(struct acx_data_path_params_resp),
562 GFP_KERNEL);
563 if (!wl->data_path) {
564 wl12xx_error("Couldnt allocate data path parameters");
565 return -ENOMEM;
566 }
567
568 ret = wl12xx_acx_data_path_params(wl, wl->data_path);
569 if (ret < 0) {
570 kfree(wl->data_path);
571 wl->data_path = NULL;
572 return ret;
573 }
574
575 return 0;
576}
577
578static int wl1251_hw_init(struct wl12xx *wl)
579{
580 struct wl1251_acx_mem_map *wl_mem_map;
581 int ret;
582
583 ret = wl12xx_hw_init_hwenc_config(wl);
584 if (ret < 0)
585 return ret;
586
587 /* Template settings */
588 ret = wl12xx_hw_init_templates_config(wl);
589 if (ret < 0)
590 return ret;
591
592 /* Default memory configuration */
593 ret = wl1251_hw_init_mem_config(wl);
594 if (ret < 0)
595 return ret;
596
597 /* Default data path configuration */
598 ret = wl1251_hw_init_data_path_config(wl);
599 if (ret < 0)
600 goto out_free_memmap;
601
602 /* RX config */
603 ret = wl12xx_hw_init_rx_config(wl,
604 RX_CFG_PROMISCUOUS | RX_CFG_TSF,
605 RX_FILTER_OPTION_DEF);
606 /* RX_CONFIG_OPTION_ANY_DST_ANY_BSS,
607 RX_FILTER_OPTION_FILTER_ALL); */
608 if (ret < 0)
609 goto out_free_data_path;
610
611 /* TX queues config */
612 ret = wl1251_hw_init_tx_queue_config(wl);
613 if (ret < 0)
614 goto out_free_data_path;
615
616 /* PHY layer config */
617 ret = wl12xx_hw_init_phy_config(wl);
618 if (ret < 0)
619 goto out_free_data_path;
620
621 /* Beacon filtering */
622 ret = wl12xx_hw_init_beacon_filter(wl);
623 if (ret < 0)
624 goto out_free_data_path;
625
626 /* Bluetooth WLAN coexistence */
627 ret = wl12xx_hw_init_pta(wl);
628 if (ret < 0)
629 goto out_free_data_path;
630
631 /* Energy detection */
632 ret = wl12xx_hw_init_energy_detection(wl);
633 if (ret < 0)
634 goto out_free_data_path;
635
636 /* Beacons and boradcast settings */
637 ret = wl12xx_hw_init_beacon_broadcast(wl);
638 if (ret < 0)
639 goto out_free_data_path;
640
641 /* Enable data path */
642 ret = wl12xx_cmd_data_path(wl, wl->channel, 1);
643 if (ret < 0)
644 goto out_free_data_path;
645
646 /* Default power state */
647 ret = wl12xx_hw_init_power_auth(wl);
648 if (ret < 0)
649 goto out_free_data_path;
650
651 wl_mem_map = wl->target_mem_map;
652 wl12xx_info("%d tx blocks at 0x%x, %d rx blocks at 0x%x",
653 wl_mem_map->num_tx_mem_blocks,
654 wl->data_path->tx_control_addr,
655 wl_mem_map->num_rx_mem_blocks,
656 wl->data_path->rx_control_addr);
657
658 return 0;
659
660 out_free_data_path:
661 kfree(wl->data_path);
662
663 out_free_memmap:
664 kfree(wl->target_mem_map);
665
666 return ret;
667}
668
669static int wl1251_plt_init(struct wl12xx *wl)
670{
671 int ret;
672
673 ret = wl1251_hw_init_mem_config(wl);
674 if (ret < 0)
675 return ret;
676
677 ret = wl12xx_cmd_data_path(wl, wl->channel, 1);
678 if (ret < 0)
679 return ret;
680
681 return 0;
682}
683
684void wl1251_setup(struct wl12xx *wl)
685{
686 /* FIXME: Is it better to use strncpy here or is this ok? */
687 wl->chip.fw_filename = WL1251_FW_NAME;
688 wl->chip.nvs_filename = WL1251_NVS_NAME;
689
690 /* Now we know what chip we're using, so adjust the power on sleep
691 * time accordingly */
692 wl->chip.power_on_sleep = WL1251_POWER_ON_SLEEP;
693
694 wl->chip.intr_cmd_complete = WL1251_ACX_INTR_CMD_COMPLETE;
695 wl->chip.intr_init_complete = WL1251_ACX_INTR_INIT_COMPLETE;
696
697 wl->chip.op_upload_nvs = wl1251_upload_nvs;
698 wl->chip.op_upload_fw = wl1251_upload_firmware;
699 wl->chip.op_boot = wl1251_boot;
700 wl->chip.op_set_ecpu_ctrl = wl1251_set_ecpu_ctrl;
701 wl->chip.op_target_enable_interrupts = wl1251_target_enable_interrupts;
702 wl->chip.op_hw_init = wl1251_hw_init;
703 wl->chip.op_plt_init = wl1251_plt_init;
704
705 wl->chip.p_table = wl1251_part_table;
706 wl->chip.acx_reg_table = wl1251_acx_reg_table;
707
708 INIT_WORK(&wl->irq_work, wl1251_irq_work);
709}
diff --git a/drivers/net/wireless/wl12xx/wl1251.h b/drivers/net/wireless/wl12xx/wl1251.h
new file mode 100644
index 000000000000..1f4a44330394
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/wl1251.h
@@ -0,0 +1,165 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#ifndef __WL1251_H__
25#define __WL1251_H__
26
27#include <linux/bitops.h>
28
29#include "wl12xx.h"
30#include "acx.h"
31
32#define WL1251_FW_NAME "wl1251-fw.bin"
33#define WL1251_NVS_NAME "wl1251-nvs.bin"
34
35#define WL1251_POWER_ON_SLEEP 10 /* in miliseconds */
36
37void wl1251_setup(struct wl12xx *wl);
38
39
40struct wl1251_acx_memory {
41 __le16 num_stations; /* number of STAs to be supported. */
42 u16 reserved_1;
43
44 /*
45 * Nmber of memory buffers for the RX mem pool.
46 * The actual number may be less if there are
47 * not enough blocks left for the minimum num
48 * of TX ones.
49 */
50 u8 rx_mem_block_num;
51 u8 reserved_2;
52 u8 num_tx_queues; /* From 1 to 16 */
53 u8 host_if_options; /* HOST_IF* */
54 u8 tx_min_mem_block_num;
55 u8 num_ssid_profiles;
56 __le16 debug_buffer_size;
57} __attribute__ ((packed));
58
59
60#define ACX_RX_DESC_MIN 1
61#define ACX_RX_DESC_MAX 127
62#define ACX_RX_DESC_DEF 32
63struct wl1251_acx_rx_queue_config {
64 u8 num_descs;
65 u8 pad;
66 u8 type;
67 u8 priority;
68 __le32 dma_address;
69} __attribute__ ((packed));
70
71#define ACX_TX_DESC_MIN 1
72#define ACX_TX_DESC_MAX 127
73#define ACX_TX_DESC_DEF 16
74struct wl1251_acx_tx_queue_config {
75 u8 num_descs;
76 u8 pad[2];
77 u8 attributes;
78} __attribute__ ((packed));
79
80#define MAX_TX_QUEUE_CONFIGS 5
81#define MAX_TX_QUEUES 4
82struct wl1251_acx_config_memory {
83 struct acx_header header;
84
85 struct wl1251_acx_memory mem_config;
86 struct wl1251_acx_rx_queue_config rx_queue_config;
87 struct wl1251_acx_tx_queue_config tx_queue_config[MAX_TX_QUEUE_CONFIGS];
88} __attribute__ ((packed));
89
90struct wl1251_acx_mem_map {
91 struct acx_header header;
92
93 void *code_start;
94 void *code_end;
95
96 void *wep_defkey_start;
97 void *wep_defkey_end;
98
99 void *sta_table_start;
100 void *sta_table_end;
101
102 void *packet_template_start;
103 void *packet_template_end;
104
105 void *queue_memory_start;
106 void *queue_memory_end;
107
108 void *packet_memory_pool_start;
109 void *packet_memory_pool_end;
110
111 void *debug_buffer1_start;
112 void *debug_buffer1_end;
113
114 void *debug_buffer2_start;
115 void *debug_buffer2_end;
116
117 /* Number of blocks FW allocated for TX packets */
118 u32 num_tx_mem_blocks;
119
120 /* Number of blocks FW allocated for RX packets */
121 u32 num_rx_mem_blocks;
122} __attribute__ ((packed));
123
124/*************************************************************************
125
126 Host Interrupt Register (WiLink -> Host)
127
128**************************************************************************/
129
130/* RX packet is ready in Xfer buffer #0 */
131#define WL1251_ACX_INTR_RX0_DATA BIT(0)
132
133/* TX result(s) are in the TX complete buffer */
134#define WL1251_ACX_INTR_TX_RESULT BIT(1)
135
136/* OBSOLETE */
137#define WL1251_ACX_INTR_TX_XFR BIT(2)
138
139/* RX packet is ready in Xfer buffer #1 */
140#define WL1251_ACX_INTR_RX1_DATA BIT(3)
141
142/* Event was entered to Event MBOX #A */
143#define WL1251_ACX_INTR_EVENT_A BIT(4)
144
145/* Event was entered to Event MBOX #B */
146#define WL1251_ACX_INTR_EVENT_B BIT(5)
147
148/* OBSOLETE */
149#define WL1251_ACX_INTR_WAKE_ON_HOST BIT(6)
150
151/* Trace meassge on MBOX #A */
152#define WL1251_ACX_INTR_TRACE_A BIT(7)
153
154/* Trace meassge on MBOX #B */
155#define WL1251_ACX_INTR_TRACE_B BIT(8)
156
157/* Command processing completion */
158#define WL1251_ACX_INTR_CMD_COMPLETE BIT(9)
159
160/* Init sequence is done */
161#define WL1251_ACX_INTR_INIT_COMPLETE BIT(14)
162
163#define WL1251_ACX_INTR_ALL 0xFFFFFFFF
164
165#endif
diff --git a/drivers/net/wireless/wl12xx/wl12xx.h b/drivers/net/wireless/wl12xx/wl12xx.h
new file mode 100644
index 000000000000..48641437414b
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/wl12xx.h
@@ -0,0 +1,409 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008-2009 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL12XX_H__
26#define __WL12XX_H__
27
28#include <linux/mutex.h>
29#include <linux/list.h>
30#include <linux/bitops.h>
31#include <net/mac80211.h>
32
33#define DRIVER_NAME "wl12xx"
34#define DRIVER_PREFIX DRIVER_NAME ": "
35
36enum {
37 DEBUG_NONE = 0,
38 DEBUG_IRQ = BIT(0),
39 DEBUG_SPI = BIT(1),
40 DEBUG_BOOT = BIT(2),
41 DEBUG_MAILBOX = BIT(3),
42 DEBUG_NETLINK = BIT(4),
43 DEBUG_EVENT = BIT(5),
44 DEBUG_TX = BIT(6),
45 DEBUG_RX = BIT(7),
46 DEBUG_SCAN = BIT(8),
47 DEBUG_CRYPT = BIT(9),
48 DEBUG_PSM = BIT(10),
49 DEBUG_MAC80211 = BIT(11),
50 DEBUG_CMD = BIT(12),
51 DEBUG_ACX = BIT(13),
52 DEBUG_ALL = ~0,
53};
54
55#define DEBUG_LEVEL (DEBUG_NONE)
56
57#define DEBUG_DUMP_LIMIT 1024
58
59#define wl12xx_error(fmt, arg...) \
60 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
61
62#define wl12xx_warning(fmt, arg...) \
63 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
64
65#define wl12xx_notice(fmt, arg...) \
66 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
67
68#define wl12xx_info(fmt, arg...) \
69 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
70
71#define wl12xx_debug(level, fmt, arg...) \
72 do { \
73 if (level & DEBUG_LEVEL) \
74 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
75 } while (0)
76
77#define wl12xx_dump(level, prefix, buf, len) \
78 do { \
79 if (level & DEBUG_LEVEL) \
80 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
81 DUMP_PREFIX_OFFSET, 16, 1, \
82 buf, \
83 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
84 0); \
85 } while (0)
86
87#define wl12xx_dump_ascii(level, prefix, buf, len) \
88 do { \
89 if (level & DEBUG_LEVEL) \
90 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
91 DUMP_PREFIX_OFFSET, 16, 1, \
92 buf, \
93 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
94 true); \
95 } while (0)
96
97#define WL12XX_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
98 CFG_BSSID_FILTER_EN)
99
100#define WL12XX_DEFAULT_RX_FILTER (CFG_RX_PRSP_EN | \
101 CFG_RX_MGMT_EN | \
102 CFG_RX_DATA_EN | \
103 CFG_RX_CTL_EN | \
104 CFG_RX_BCN_EN | \
105 CFG_RX_AUTH_EN | \
106 CFG_RX_ASSOC_EN)
107
108
109struct boot_attr {
110 u32 radio_type;
111 u8 mac_clock;
112 u8 arm_clock;
113 int firmware_debug;
114 u32 minor;
115 u32 major;
116 u32 bugfix;
117};
118
119enum wl12xx_state {
120 WL12XX_STATE_OFF,
121 WL12XX_STATE_ON,
122 WL12XX_STATE_PLT,
123};
124
125enum wl12xx_partition_type {
126 PART_DOWN,
127 PART_WORK,
128 PART_DRPW,
129
130 PART_TABLE_LEN
131};
132
133struct wl12xx_partition {
134 u32 size;
135 u32 start;
136};
137
138struct wl12xx_partition_set {
139 struct wl12xx_partition mem;
140 struct wl12xx_partition reg;
141};
142
143struct wl12xx;
144
145/* FIXME: I'm not sure about this structure name */
146struct wl12xx_chip {
147 u32 id;
148
149 const char *fw_filename;
150 const char *nvs_filename;
151
152 char fw_ver[21];
153
154 unsigned int power_on_sleep;
155 int intr_cmd_complete;
156 int intr_init_complete;
157
158 int (*op_upload_fw)(struct wl12xx *wl);
159 int (*op_upload_nvs)(struct wl12xx *wl);
160 int (*op_boot)(struct wl12xx *wl);
161 void (*op_set_ecpu_ctrl)(struct wl12xx *wl, u32 flag);
162 void (*op_target_enable_interrupts)(struct wl12xx *wl);
163 int (*op_hw_init)(struct wl12xx *wl);
164 int (*op_plt_init)(struct wl12xx *wl);
165
166 struct wl12xx_partition_set *p_table;
167 enum wl12xx_acx_int_reg *acx_reg_table;
168};
169
170struct wl12xx_stats {
171 struct acx_statistics *fw_stats;
172 unsigned long fw_stats_update;
173
174 unsigned int retry_count;
175 unsigned int excessive_retries;
176};
177
178struct wl12xx_debugfs {
179 struct dentry *rootdir;
180 struct dentry *fw_statistics;
181
182 struct dentry *tx_internal_desc_overflow;
183
184 struct dentry *rx_out_of_mem;
185 struct dentry *rx_hdr_overflow;
186 struct dentry *rx_hw_stuck;
187 struct dentry *rx_dropped;
188 struct dentry *rx_fcs_err;
189 struct dentry *rx_xfr_hint_trig;
190 struct dentry *rx_path_reset;
191 struct dentry *rx_reset_counter;
192
193 struct dentry *dma_rx_requested;
194 struct dentry *dma_rx_errors;
195 struct dentry *dma_tx_requested;
196 struct dentry *dma_tx_errors;
197
198 struct dentry *isr_cmd_cmplt;
199 struct dentry *isr_fiqs;
200 struct dentry *isr_rx_headers;
201 struct dentry *isr_rx_mem_overflow;
202 struct dentry *isr_rx_rdys;
203 struct dentry *isr_irqs;
204 struct dentry *isr_tx_procs;
205 struct dentry *isr_decrypt_done;
206 struct dentry *isr_dma0_done;
207 struct dentry *isr_dma1_done;
208 struct dentry *isr_tx_exch_complete;
209 struct dentry *isr_commands;
210 struct dentry *isr_rx_procs;
211 struct dentry *isr_hw_pm_mode_changes;
212 struct dentry *isr_host_acknowledges;
213 struct dentry *isr_pci_pm;
214 struct dentry *isr_wakeups;
215 struct dentry *isr_low_rssi;
216
217 struct dentry *wep_addr_key_count;
218 struct dentry *wep_default_key_count;
219 /* skipping wep.reserved */
220 struct dentry *wep_key_not_found;
221 struct dentry *wep_decrypt_fail;
222 struct dentry *wep_packets;
223 struct dentry *wep_interrupt;
224
225 struct dentry *pwr_ps_enter;
226 struct dentry *pwr_elp_enter;
227 struct dentry *pwr_missing_bcns;
228 struct dentry *pwr_wake_on_host;
229 struct dentry *pwr_wake_on_timer_exp;
230 struct dentry *pwr_tx_with_ps;
231 struct dentry *pwr_tx_without_ps;
232 struct dentry *pwr_rcvd_beacons;
233 struct dentry *pwr_power_save_off;
234 struct dentry *pwr_enable_ps;
235 struct dentry *pwr_disable_ps;
236 struct dentry *pwr_fix_tsf_ps;
237 /* skipping cont_miss_bcns_spread for now */
238 struct dentry *pwr_rcvd_awake_beacons;
239
240 struct dentry *mic_rx_pkts;
241 struct dentry *mic_calc_failure;
242
243 struct dentry *aes_encrypt_fail;
244 struct dentry *aes_decrypt_fail;
245 struct dentry *aes_encrypt_packets;
246 struct dentry *aes_decrypt_packets;
247 struct dentry *aes_encrypt_interrupt;
248 struct dentry *aes_decrypt_interrupt;
249
250 struct dentry *event_heart_beat;
251 struct dentry *event_calibration;
252 struct dentry *event_rx_mismatch;
253 struct dentry *event_rx_mem_empty;
254 struct dentry *event_rx_pool;
255 struct dentry *event_oom_late;
256 struct dentry *event_phy_transmit_error;
257 struct dentry *event_tx_stuck;
258
259 struct dentry *ps_pspoll_timeouts;
260 struct dentry *ps_upsd_timeouts;
261 struct dentry *ps_upsd_max_sptime;
262 struct dentry *ps_upsd_max_apturn;
263 struct dentry *ps_pspoll_max_apturn;
264 struct dentry *ps_pspoll_utilization;
265 struct dentry *ps_upsd_utilization;
266
267 struct dentry *rxpipe_rx_prep_beacon_drop;
268 struct dentry *rxpipe_descr_host_int_trig_rx_data;
269 struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
270 struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
271 struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
272
273 struct dentry *tx_queue_len;
274
275 struct dentry *retry_count;
276 struct dentry *excessive_retries;
277};
278
279struct wl12xx {
280 struct ieee80211_hw *hw;
281 bool mac80211_registered;
282
283 struct spi_device *spi;
284
285 void (*set_power)(bool enable);
286 int irq;
287
288 enum wl12xx_state state;
289 struct mutex mutex;
290
291 int physical_mem_addr;
292 int physical_reg_addr;
293 int virtual_mem_addr;
294 int virtual_reg_addr;
295
296 struct wl12xx_chip chip;
297
298 int cmd_box_addr;
299 int event_box_addr;
300 struct boot_attr boot_attr;
301
302 u8 *fw;
303 size_t fw_len;
304 u8 *nvs;
305 size_t nvs_len;
306
307 u8 bssid[ETH_ALEN];
308 u8 mac_addr[ETH_ALEN];
309 u8 bss_type;
310 u8 listen_int;
311 int channel;
312
313 void *target_mem_map;
314 struct acx_data_path_params_resp *data_path;
315
316 /* Number of TX packets transferred to the FW, modulo 16 */
317 u32 data_in_count;
318
319 /* Frames scheduled for transmission, not handled yet */
320 struct sk_buff_head tx_queue;
321 bool tx_queue_stopped;
322
323 struct work_struct tx_work;
324 struct work_struct filter_work;
325
326 /* Pending TX frames */
327 struct sk_buff *tx_frames[16];
328
329 /*
330 * Index pointing to the next TX complete entry
331 * in the cyclic XT complete array we get from
332 * the FW.
333 */
334 u32 next_tx_complete;
335
336 /* FW Rx counter */
337 u32 rx_counter;
338
339 /* Rx frames handled */
340 u32 rx_handled;
341
342 /* Current double buffer */
343 u32 rx_current_buffer;
344 u32 rx_last_id;
345
346 /* The target interrupt mask */
347 u32 intr_mask;
348 struct work_struct irq_work;
349
350 /* The mbox event mask */
351 u32 event_mask;
352
353 /* Mailbox pointers */
354 u32 mbox_ptr[2];
355
356 /* Are we currently scanning */
357 bool scanning;
358
359 /* Our association ID */
360 u16 aid;
361
362 /* Default key (for WEP) */
363 u32 default_key;
364
365 unsigned int tx_mgmt_frm_rate;
366 unsigned int tx_mgmt_frm_mod;
367
368 unsigned int rx_config;
369 unsigned int rx_filter;
370
371 /* is firmware in elp mode */
372 bool elp;
373
374 /* we can be in psm, but not in elp, we have to differentiate */
375 bool psm;
376
377 /* PSM mode requested */
378 bool psm_requested;
379
380 /* in dBm */
381 int power_level;
382
383 struct wl12xx_stats stats;
384 struct wl12xx_debugfs debugfs;
385};
386
387int wl12xx_plt_start(struct wl12xx *wl);
388int wl12xx_plt_stop(struct wl12xx *wl);
389
390#define DEFAULT_HW_GEN_MODULATION_TYPE CCK_LONG /* Long Preamble */
391#define DEFAULT_HW_GEN_TX_RATE RATE_2MBPS
392#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
393
394#define WL12XX_DEFAULT_POWER_LEVEL 20
395
396#define WL12XX_TX_QUEUE_MAX_LENGTH 20
397
398/* Different chips need different sleep times after power on. WL1271 needs
399 * 200ms, WL1251 needs only 10ms. By default we use 200ms, but as soon as we
400 * know the chip ID, we change the sleep value in the wl12xx chip structure,
401 * so in subsequent power ons, we don't waste more time then needed. */
402#define WL12XX_DEFAULT_POWER_ON_SLEEP 200
403
404#define CHIP_ID_1251_PG10 (0x7010101)
405#define CHIP_ID_1251_PG11 (0x7020101)
406#define CHIP_ID_1251_PG12 (0x7030101)
407#define CHIP_ID_1271_PG10 (0x4030101)
408
409#endif
diff --git a/drivers/net/wireless/wl12xx/wl12xx_80211.h b/drivers/net/wireless/wl12xx/wl12xx_80211.h
new file mode 100644
index 000000000000..657c2dbcb7d3
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/wl12xx_80211.h
@@ -0,0 +1,156 @@
1#ifndef __WL12XX_80211_H__
2#define __WL12XX_80211_H__
3
4#include <linux/if_ether.h> /* ETH_ALEN */
5
6/* RATES */
7#define IEEE80211_CCK_RATE_1MB 0x02
8#define IEEE80211_CCK_RATE_2MB 0x04
9#define IEEE80211_CCK_RATE_5MB 0x0B
10#define IEEE80211_CCK_RATE_11MB 0x16
11#define IEEE80211_OFDM_RATE_6MB 0x0C
12#define IEEE80211_OFDM_RATE_9MB 0x12
13#define IEEE80211_OFDM_RATE_12MB 0x18
14#define IEEE80211_OFDM_RATE_18MB 0x24
15#define IEEE80211_OFDM_RATE_24MB 0x30
16#define IEEE80211_OFDM_RATE_36MB 0x48
17#define IEEE80211_OFDM_RATE_48MB 0x60
18#define IEEE80211_OFDM_RATE_54MB 0x6C
19#define IEEE80211_BASIC_RATE_MASK 0x80
20
21#define IEEE80211_CCK_RATE_1MB_MASK (1<<0)
22#define IEEE80211_CCK_RATE_2MB_MASK (1<<1)
23#define IEEE80211_CCK_RATE_5MB_MASK (1<<2)
24#define IEEE80211_CCK_RATE_11MB_MASK (1<<3)
25#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4)
26#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5)
27#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6)
28#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7)
29#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8)
30#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9)
31#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10)
32#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11)
33
34#define IEEE80211_CCK_RATES_MASK 0x0000000F
35#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \
36 IEEE80211_CCK_RATE_2MB_MASK)
37#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \
38 IEEE80211_CCK_RATE_5MB_MASK | \
39 IEEE80211_CCK_RATE_11MB_MASK)
40
41#define IEEE80211_OFDM_RATES_MASK 0x00000FF0
42#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \
43 IEEE80211_OFDM_RATE_12MB_MASK | \
44 IEEE80211_OFDM_RATE_24MB_MASK)
45#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \
46 IEEE80211_OFDM_RATE_9MB_MASK | \
47 IEEE80211_OFDM_RATE_18MB_MASK | \
48 IEEE80211_OFDM_RATE_36MB_MASK | \
49 IEEE80211_OFDM_RATE_48MB_MASK | \
50 IEEE80211_OFDM_RATE_54MB_MASK)
51#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
52 IEEE80211_CCK_DEFAULT_RATES_MASK)
53
54
55/* This really should be 8, but not for our firmware */
56#define MAX_SUPPORTED_RATES 32
57#define COUNTRY_STRING_LEN 3
58#define MAX_COUNTRY_TRIPLETS 32
59
60/* Headers */
61struct ieee80211_header {
62 __le16 frame_ctl;
63 __le16 duration_id;
64 u8 da[ETH_ALEN];
65 u8 sa[ETH_ALEN];
66 u8 bssid[ETH_ALEN];
67 __le16 seq_ctl;
68 u8 payload[0];
69} __attribute__ ((packed));
70
71struct wl12xx_ie_header {
72 u8 id;
73 u8 len;
74} __attribute__ ((packed));
75
76/* IEs */
77
78struct wl12xx_ie_ssid {
79 struct wl12xx_ie_header header;
80 char ssid[IW_ESSID_MAX_SIZE];
81} __attribute__ ((packed));
82
83struct wl12xx_ie_rates {
84 struct wl12xx_ie_header header;
85 u8 rates[MAX_SUPPORTED_RATES];
86} __attribute__ ((packed));
87
88struct wl12xx_ie_ds_params {
89 struct wl12xx_ie_header header;
90 u8 channel;
91} __attribute__ ((packed));
92
93struct country_triplet {
94 u8 channel;
95 u8 num_channels;
96 u8 max_tx_power;
97} __attribute__ ((packed));
98
99struct wl12xx_ie_country {
100 struct wl12xx_ie_header header;
101 u8 country_string[COUNTRY_STRING_LEN];
102 struct country_triplet triplets[MAX_COUNTRY_TRIPLETS];
103} __attribute__ ((packed));
104
105
106/* Templates */
107
108struct wl12xx_beacon_template {
109 struct ieee80211_header header;
110 __le32 time_stamp[2];
111 __le16 beacon_interval;
112 __le16 capability;
113 struct wl12xx_ie_ssid ssid;
114 struct wl12xx_ie_rates rates;
115 struct wl12xx_ie_rates ext_rates;
116 struct wl12xx_ie_ds_params ds_params;
117 struct wl12xx_ie_country country;
118} __attribute__ ((packed));
119
120struct wl12xx_null_data_template {
121 struct ieee80211_header header;
122} __attribute__ ((packed));
123
124struct wl12xx_ps_poll_template {
125 u16 fc;
126 u16 aid;
127 u8 bssid[ETH_ALEN];
128 u8 ta[ETH_ALEN];
129} __attribute__ ((packed));
130
131struct wl12xx_qos_null_data_template {
132 struct ieee80211_header header;
133 __le16 qos_ctl;
134} __attribute__ ((packed));
135
136struct wl12xx_probe_req_template {
137 struct ieee80211_header header;
138 struct wl12xx_ie_ssid ssid;
139 struct wl12xx_ie_rates rates;
140 struct wl12xx_ie_rates ext_rates;
141} __attribute__ ((packed));
142
143
144struct wl12xx_probe_resp_template {
145 struct ieee80211_header header;
146 __le32 time_stamp[2];
147 __le16 beacon_interval;
148 __le16 capability;
149 struct wl12xx_ie_ssid ssid;
150 struct wl12xx_ie_rates rates;
151 struct wl12xx_ie_rates ext_rates;
152 struct wl12xx_ie_ds_params ds_params;
153 struct wl12xx_ie_country country;
154} __attribute__ ((packed));
155
156#endif
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c
index c3a51266de20..40b07b988224 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.c
+++ b/drivers/net/wireless/zd1211rw/zd_mac.c
@@ -420,9 +420,9 @@ static void cs_set_control(struct zd_mac *mac, struct zd_ctrlset *cs,
420 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 420 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
421 cs->control |= ZD_CS_NEED_RANDOM_BACKOFF; 421 cs->control |= ZD_CS_NEED_RANDOM_BACKOFF;
422 422
423 /* Multicast */ 423 /* No ACK expected (multicast, etc.) */
424 if (is_multicast_ether_addr(header->addr1)) 424 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
425 cs->control |= ZD_CS_MULTICAST; 425 cs->control |= ZD_CS_NO_ACK;
426 426
427 /* PS-POLL */ 427 /* PS-POLL */
428 if (ieee80211_is_pspoll(header->frame_control)) 428 if (ieee80211_is_pspoll(header->frame_control))
@@ -755,52 +755,6 @@ static int zd_op_config(struct ieee80211_hw *hw, u32 changed)
755 return zd_chip_set_channel(&mac->chip, conf->channel->hw_value); 755 return zd_chip_set_channel(&mac->chip, conf->channel->hw_value);
756} 756}
757 757
758static int zd_op_config_interface(struct ieee80211_hw *hw,
759 struct ieee80211_vif *vif,
760 struct ieee80211_if_conf *conf)
761{
762 struct zd_mac *mac = zd_hw_mac(hw);
763 int associated;
764 int r;
765
766 if (mac->type == NL80211_IFTYPE_MESH_POINT ||
767 mac->type == NL80211_IFTYPE_ADHOC) {
768 associated = true;
769 if (conf->changed & IEEE80211_IFCC_BEACON) {
770 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
771
772 if (!beacon)
773 return -ENOMEM;
774 r = zd_mac_config_beacon(hw, beacon);
775 kfree_skb(beacon);
776
777 if (r < 0)
778 return r;
779 }
780
781 if (conf->changed & IEEE80211_IFCC_BEACON_ENABLED) {
782 u32 interval;
783
784 if (conf->enable_beacon)
785 interval = BCN_MODE_IBSS | hw->conf.beacon_int;
786 else
787 interval = 0;
788
789 r = zd_set_beacon_interval(&mac->chip, interval);
790 if (r < 0)
791 return r;
792 }
793 } else
794 associated = is_valid_ether_addr(conf->bssid);
795
796 spin_lock_irq(&mac->lock);
797 mac->associated = associated;
798 spin_unlock_irq(&mac->lock);
799
800 /* TODO: do hardware bssid filtering */
801 return 0;
802}
803
804static void zd_process_intr(struct work_struct *work) 758static void zd_process_intr(struct work_struct *work)
805{ 759{
806 u16 int_status; 760 u16 int_status;
@@ -923,9 +877,42 @@ static void zd_op_bss_info_changed(struct ieee80211_hw *hw,
923{ 877{
924 struct zd_mac *mac = zd_hw_mac(hw); 878 struct zd_mac *mac = zd_hw_mac(hw);
925 unsigned long flags; 879 unsigned long flags;
880 int associated;
926 881
927 dev_dbg_f(zd_mac_dev(mac), "changes: %x\n", changes); 882 dev_dbg_f(zd_mac_dev(mac), "changes: %x\n", changes);
928 883
884 if (mac->type == NL80211_IFTYPE_MESH_POINT ||
885 mac->type == NL80211_IFTYPE_ADHOC) {
886 associated = true;
887 if (changes & BSS_CHANGED_BEACON) {
888 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
889
890 if (beacon) {
891 zd_mac_config_beacon(hw, beacon);
892 kfree_skb(beacon);
893 }
894 }
895
896 if (changes & BSS_CHANGED_BEACON_ENABLED) {
897 u32 interval;
898
899 if (bss_conf->enable_beacon)
900 interval = BCN_MODE_IBSS |
901 bss_conf->beacon_int;
902 else
903 interval = 0;
904
905 zd_set_beacon_interval(&mac->chip, interval);
906 }
907 } else
908 associated = is_valid_ether_addr(bss_conf->bssid);
909
910 spin_lock_irq(&mac->lock);
911 mac->associated = associated;
912 spin_unlock_irq(&mac->lock);
913
914 /* TODO: do hardware bssid filtering */
915
929 if (changes & BSS_CHANGED_ERP_PREAMBLE) { 916 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
930 spin_lock_irqsave(&mac->lock, flags); 917 spin_lock_irqsave(&mac->lock, flags);
931 mac->short_preamble = bss_conf->use_short_preamble; 918 mac->short_preamble = bss_conf->use_short_preamble;
@@ -952,7 +939,6 @@ static const struct ieee80211_ops zd_ops = {
952 .add_interface = zd_op_add_interface, 939 .add_interface = zd_op_add_interface,
953 .remove_interface = zd_op_remove_interface, 940 .remove_interface = zd_op_remove_interface,
954 .config = zd_op_config, 941 .config = zd_op_config,
955 .config_interface = zd_op_config_interface,
956 .configure_filter = zd_op_configure_filter, 942 .configure_filter = zd_op_configure_filter,
957 .bss_info_changed = zd_op_bss_info_changed, 943 .bss_info_changed = zd_op_bss_info_changed,
958 .get_tsf = zd_op_get_tsf, 944 .get_tsf = zd_op_get_tsf,
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.h b/drivers/net/wireless/zd1211rw/zd_mac.h
index 4c05d3ee4c37..7c2759118d13 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.h
+++ b/drivers/net/wireless/zd1211rw/zd_mac.h
@@ -87,7 +87,7 @@ struct zd_ctrlset {
87 87
88/* zd_ctrlset control field */ 88/* zd_ctrlset control field */
89#define ZD_CS_NEED_RANDOM_BACKOFF 0x01 89#define ZD_CS_NEED_RANDOM_BACKOFF 0x01
90#define ZD_CS_MULTICAST 0x02 90#define ZD_CS_NO_ACK 0x02
91 91
92#define ZD_CS_FRAME_TYPE_MASK 0x0c 92#define ZD_CS_FRAME_TYPE_MASK 0x0c
93#define ZD_CS_DATA_FRAME 0x00 93#define ZD_CS_DATA_FRAME 0x00
diff --git a/drivers/net/yellowfin.c b/drivers/net/yellowfin.c
index 7477ffdcddb4..3c7a5053f1da 100644
--- a/drivers/net/yellowfin.c
+++ b/drivers/net/yellowfin.c
@@ -717,7 +717,7 @@ static void yellowfin_tx_timeout(struct net_device *dev)
717 if (yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE) 717 if (yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE)
718 netif_wake_queue (dev); /* Typical path */ 718 netif_wake_queue (dev); /* Typical path */
719 719
720 dev->trans_start = jiffies; 720 dev->trans_start = jiffies; /* prevent tx timeout */
721 dev->stats.tx_errors++; 721 dev->stats.tx_errors++;
722} 722}
723 723
@@ -876,7 +876,6 @@ static int yellowfin_start_xmit(struct sk_buff *skb, struct net_device *dev)
876 netif_start_queue (dev); /* Typical path */ 876 netif_start_queue (dev); /* Typical path */
877 else 877 else
878 yp->tx_full = 1; 878 yp->tx_full = 1;
879 dev->trans_start = jiffies;
880 879
881 if (yellowfin_debug > 4) { 880 if (yellowfin_debug > 4) {
882 printk(KERN_DEBUG "%s: Yellowfin transmit frame #%d queued in slot %d.\n", 881 printk(KERN_DEBUG "%s: Yellowfin transmit frame #%d queued in slot %d.\n",